WIFI: update rtl8723ds driver to v5.6.5_31752.20181221_COEX20181130-2e2e [1/2]

PD#OTT-1672

Problem:
Wi-Fi Direct Test Group Client Test

Solution:
rtl8723ds driver to v5.6.5_31752.20181221_COEX20181130-2e2e

Verify:
ampere

Change-Id: I96f4f31304c0293cfbffdf03478186241b4f3d1b
Signed-off-by: Rongjun Chen <rongjun.chen@amlogic.com>

534 files changed, 114051 insertions, 66535 deletions

diff --git a/rtl8723DS/Kconfig b/rtl8723DS/Kconfig
index 63bbe8e..63bbe8e 100755..100644
--- a/rtl8723DS/Kconfig
+++ b/rtl8723DS/Kconfig
diff --git a/rtl8723DS/Makefile b/rtl8723DS/Makefile
index 00921f8..56b669b 100755
--- a/rtl8723DS/Makefile
+++ b/rtl8723DS/Makefile
@@ -36,9 +36,12 @@ CONFIG_RTL8723B = n
 CONFIG_RTL8814A = n
 CONFIG_RTL8723C = n
 CONFIG_RTL8188F = n
+CONFIG_RTL8188GTV = n
 CONFIG_RTL8822B = n
 CONFIG_RTL8723D = y
 CONFIG_RTL8821C = n
+CONFIG_RTL8710B = n
+CONFIG_RTL8192F = n
 ######################### Interface ###########################
 CONFIG_USB_HCI = n
 CONFIG_PCI_HCI = n
@@ -49,13 +52,11 @@ CONFIG_MP_INCLUDED = y
 CONFIG_POWER_SAVING = y
 CONFIG_USB_AUTOSUSPEND = n
 CONFIG_HW_PWRP_DETECTION = n
-CONFIG_WIFI_TEST = n
 CONFIG_BT_COEXIST = y
 CONFIG_INTEL_WIDI = n
 CONFIG_WAPI_SUPPORT = n
 CONFIG_EFUSE_CONFIG_FILE = y
 CONFIG_EXT_CLK = n
-CONFIG_XTAL_26M = n
 CONFIG_TRAFFIC_PROTECT = n
 CONFIG_LOAD_PHY_PARA_FROM_FILE = y
 CONFIG_TXPWR_BY_RATE_EN = y
@@ -67,16 +68,19 @@ CONFIG_SIGNAL_SCALE_MAPPING = n
 CONFIG_80211W = n
 CONFIG_REDUCE_TX_CPU_LOADING = n
 CONFIG_BR_EXT = y
-CONFIG_ANTENNA_DIVERSITY = n
 CONFIG_TDLS = n
 CONFIG_WIFI_MONITOR = n
 CONFIG_MCC_MODE = n
 CONFIG_APPEND_VENDOR_IE_ENABLE = n
 CONFIG_RTW_NAPI = y
 CONFIG_RTW_GRO = y
+CONFIG_RTW_NETIF_SG = y
+CONFIG_TX_CSUM_OFFLOAD = n
 CONFIG_RTW_IPCAM_APPLICATION = n
 CONFIG_RTW_REPEATER_SON = n
-CONFIG_RTW_WIFI_HAL = y
+CONFIG_RTW_WIFI_HAL = n
+CONFIG_ICMP_VOQ = n
+CONFIG_IP_R_MONITOR = n #arp VOQ and high rate
 ########################## Debug ###########################
 CONFIG_RTW_DEBUG = y
 # default log level is _DRV_INFO_ = 4,
@@ -84,10 +88,17 @@ CONFIG_RTW_DEBUG = y
 CONFIG_RTW_LOG_LEVEL = 4
 ######################## Wake On Lan ##########################
 CONFIG_WOWLAN = n
-CONFIG_WAKEUP_TYPE = 0x7 #bit2: deauth, bit1: unicast, bit0: magic pkt.
+#bit2: deauth, bit1: unicast, bit0: magic pkt.
+CONFIG_WAKEUP_TYPE = 0x7
+#bit0: disBBRF off, #bit1: Wireless remote controller (WRC)
+CONFIG_SUSPEND_TYPE = 0
+CONFIG_WOW_STA_MIX = n
 CONFIG_GPIO_WAKEUP = n
 CONFIG_WAKEUP_GPIO_IDX = default
-CONFIG_HIGH_ACTIVE = n
+CONFIG_HIGH_ACTIVE_DEV2HST = n
+######### only for USB #########
+CONFIG_ONE_PIN_GPIO = n
+CONFIG_HIGH_ACTIVE_HST2DEV = n
 CONFIG_PNO_SUPPORT = n
 CONFIG_PNO_SET_DEBUG = n
 CONFIG_AP_WOWLAN = n
@@ -139,19 +150,26 @@ CONFIG_PLATFORM_ACTIONS_ATV5201 = n
 CONFIG_PLATFORM_ACTIONS_ATM705X = n
 CONFIG_PLATFORM_ARM_SUN50IW1P1 = n
 CONFIG_PLATFORM_ARM_RTD299X = n
+CONFIG_PLATFORM_ARM_LGE = n
 CONFIG_PLATFORM_ARM_SPREADTRUM_6820 = n
 CONFIG_PLATFORM_ARM_SPREADTRUM_8810 = n
-CONFIG_PLATFORM_AML_S905 = y
 CONFIG_PLATFORM_ARM_WMT = n
 CONFIG_PLATFORM_TI_DM365 = n
 CONFIG_PLATFORM_MOZART = n
 CONFIG_PLATFORM_RTK119X = n
+CONFIG_PLATFORM_RTK119X_AM = n
 CONFIG_PLATFORM_RTK129X = n
+CONFIG_PLATFORM_RTK390X = n
 CONFIG_PLATFORM_NOVATEK_NT72668 = n
 CONFIG_PLATFORM_HISILICON = n
+CONFIG_PLATFORM_HISILICON_HI3798 = n
 CONFIG_PLATFORM_NV_TK1 = n
+CONFIG_PLATFORM_NV_TK1_UBUNTU = n
 CONFIG_PLATFORM_RTL8197D = n
-###############################################################
+CONFIG_PLATFORM_AML_S905 = y
+CONFIG_PLATFORM_ZTE_ZX296716 = n
+########### CUSTOMER ################################
+CONFIG_CUSTOMER_HUAWEI_GENERAL = n
 
 CONFIG_DRVEXT_MODULE = n
 
@@ -187,7 +205,8 @@ _OS_INTFS_FILES :=	os_dep/osdep_service.o \
 			os_dep/linux/rtw_cfgvendor.o \
 			os_dep/linux/wifi_regd.o \
 			os_dep/linux/rtw_android.o \
-			os_dep/linux/rtw_proc.o
+			os_dep/linux/rtw_proc.o \
+			os_dep/linux/rtw_rhashtable.o
 
 ifeq ($(CONFIG_MP_INCLUDED), y)
 _OS_INTFS_FILES += os_dep/linux/ioctl_mp.o
@@ -215,6 +234,7 @@ _HAL_INTFS_FILES :=	hal/hal_intf.o \
 			hal/hal_mp.o \
 			hal/hal_mcc.o \
 			hal/hal_hci/hal_$(HCI_NAME).o \
+			hal/led/hal_led.o \
 			hal/led/hal_$(HCI_NAME)_led.o
 
 
@@ -223,7 +243,6 @@ _PLATFORM_FILES := platform/platform_ops.o
 
 EXTRA_CFLAGS += -I$(src)/hal/btc
 
-include $(M)/hal/phydm/phydm.mk
 ########### HAL_RTL8188E #################################
 ifeq ($(CONFIG_RTL8188E), y)
 
@@ -733,16 +752,183 @@ endif
 
 endif
 
+########### HAL_RTL8188GTV #################################
+ifeq ($(CONFIG_RTL8188GTV), y)
+
+RTL871X = rtl8188gtv
+ifeq ($(CONFIG_USB_HCI), y)
+MODULE_NAME = 8188gtvu
+endif
+ifeq ($(CONFIG_SDIO_HCI), y)
+MODULE_NAME = 8189gtvs
+endif
+
+EXTRA_CFLAGS += -DCONFIG_RTL8188GTV
+
+_HAL_INTFS_FILES += hal/HalPwrSeqCmd.o \
+					hal/$(RTL871X)/Hal8188GTVPwrSeq.o\
+					hal/$(RTL871X)/$(RTL871X)_sreset.o
+
+_HAL_INTFS_FILES +=	hal/$(RTL871X)/$(RTL871X)_hal_init.o \
+			hal/$(RTL871X)/$(RTL871X)_phycfg.o \
+			hal/$(RTL871X)/$(RTL871X)_rf6052.o \
+			hal/$(RTL871X)/$(RTL871X)_dm.o \
+			hal/$(RTL871X)/$(RTL871X)_rxdesc.o \
+			hal/$(RTL871X)/$(RTL871X)_cmd.o \
+			hal/$(RTL871X)/hal8188gtv_fw.o
+
+_HAL_INTFS_FILES +=	\
+			hal/$(RTL871X)/$(HCI_NAME)/$(HCI_NAME)_halinit.o \
+			hal/$(RTL871X)/$(HCI_NAME)/rtl$(MODULE_NAME)_led.o \
+			hal/$(RTL871X)/$(HCI_NAME)/rtl$(MODULE_NAME)_xmit.o \
+			hal/$(RTL871X)/$(HCI_NAME)/rtl$(MODULE_NAME)_recv.o
+
+ifeq ($(CONFIG_PCI_HCI), y)
+_HAL_INTFS_FILES += hal/$(RTL871X)/$(HCI_NAME)/$(HCI_NAME)_ops_linux.o
+else
+_HAL_INTFS_FILES += hal/$(RTL871X)/$(HCI_NAME)/$(HCI_NAME)_ops.o
+endif
+
+ifeq ($(CONFIG_USB_HCI), y)
+_HAL_INTFS_FILES +=hal/efuse/$(RTL871X)/HalEfuseMask8188GTV_USB.o
+endif
+
+ifeq ($(CONFIG_SDIO_HCI), y)
+_HAL_INTFS_FILES +=hal/efuse/$(RTL871X)/HalEfuseMask8188GTV_SDIO.o
+endif
+
+endif
+
 ########### HAL_RTL8822B #################################
 ifeq ($(CONFIG_RTL8822B), y)
-include $(TopDIR)/rtl8822b.mk
+RTL871X := rtl8822b
+ifeq ($(CONFIG_USB_HCI), y)
+ifeq ($(CONFIG_BT_COEXIST), n)
+MODULE_NAME = 8812bu
+else
+MODULE_NAME = 88x2bu
+endif
+endif
+ifeq ($(CONFIG_PCI_HCI), y)
+MODULE_NAME = 88x2be
+endif
+ifeq ($(CONFIG_SDIO_HCI), y)
+MODULE_NAME = 88x2bs
 endif
 
+endif
 ########### HAL_RTL8821C #################################
 ifeq ($(CONFIG_RTL8821C), y)
-include $(TopDIR)/rtl8821c.mk
+RTL871X := rtl8821c
+ifeq ($(CONFIG_USB_HCI), y)
+MODULE_NAME = 8821cu
+endif
+ifeq ($(CONFIG_PCI_HCI), y)
+MODULE_NAME = 8821ce
+endif
+ifeq ($(CONFIG_SDIO_HCI), y)
+MODULE_NAME = 8821cs
 endif
 
+endif
+
+########### HAL_RTL8710B #################################
+ifeq ($(CONFIG_RTL8710B), y)
+
+RTL871X = rtl8710b
+ifeq ($(CONFIG_USB_HCI), y)
+MODULE_NAME = 8710bu
+MODULE_SUB_NAME = 8710bu
+endif
+
+EXTRA_CFLAGS += -DCONFIG_RTL8710B
+
+_HAL_INTFS_FILES += hal/HalPwrSeqCmd.o \
+					hal/$(RTL871X)/Hal8710BPwrSeq.o\
+					hal/$(RTL871X)/$(RTL871X)_sreset.o
+
+_HAL_INTFS_FILES +=	hal/$(RTL871X)/$(RTL871X)_hal_init.o \
+			hal/$(RTL871X)/$(RTL871X)_phycfg.o \
+			hal/$(RTL871X)/$(RTL871X)_rf6052.o \
+			hal/$(RTL871X)/$(RTL871X)_dm.o \
+			hal/$(RTL871X)/$(RTL871X)_rxdesc.o \
+			hal/$(RTL871X)/$(RTL871X)_cmd.o \
+			hal/$(RTL871X)/hal8710b_fw.o \
+			hal/$(RTL871X)/$(RTL871X)_lps_poff.o
+
+
+_HAL_INTFS_FILES +=	\
+			hal/$(RTL871X)/$(HCI_NAME)/$(HCI_NAME)_halinit.o \
+			hal/$(RTL871X)/$(HCI_NAME)/rtl$(MODULE_SUB_NAME)_led.o \
+			hal/$(RTL871X)/$(HCI_NAME)/rtl$(MODULE_SUB_NAME)_xmit.o \
+			hal/$(RTL871X)/$(HCI_NAME)/rtl$(MODULE_SUB_NAME)_recv.o
+
+_HAL_INTFS_FILES += hal/$(RTL871X)/$(HCI_NAME)/$(HCI_NAME)_ops.o
+
+ifeq ($(CONFIG_USB_HCI), y)
+_HAL_INTFS_FILES +=hal/efuse/$(RTL871X)/HalEfuseMask8710B_USB.o
+endif
+
+endif
+
+########### HAL_RTL8192F #################################
+ifeq ($(CONFIG_RTL8192F), y)
+
+RTL871X = rtl8192f
+ifeq ($(CONFIG_USB_HCI), y)
+MODULE_NAME = 8192fu
+MODULE_SUB_NAME = 8192fu
+endif
+ifeq ($(CONFIG_PCI_HCI), y)
+MODULE_NAME = 8192fe
+MODULE_SUB_NAME = 8192fe
+endif
+ifeq ($(CONFIG_SDIO_HCI), y)
+MODULE_NAME = 8192fs
+MODULE_SUB_NAME = 8192fs
+endif
+
+EXTRA_CFLAGS += -DCONFIG_RTL8192F
+
+_HAL_INTFS_FILES += hal/HalPwrSeqCmd.o \
+					hal/$(RTL871X)/Hal8192FPwrSeq.o\
+					hal/$(RTL871X)/$(RTL871X)_sreset.o
+
+_HAL_INTFS_FILES +=	hal/$(RTL871X)/$(RTL871X)_hal_init.o \
+			hal/$(RTL871X)/$(RTL871X)_phycfg.o \
+			hal/$(RTL871X)/$(RTL871X)_rf6052.o \
+			hal/$(RTL871X)/$(RTL871X)_dm.o \
+			hal/$(RTL871X)/$(RTL871X)_rxdesc.o \
+			hal/$(RTL871X)/$(RTL871X)_cmd.o \
+			hal/$(RTL871X)/hal8192f_fw.o \
+			hal/$(RTL871X)/$(RTL871X)_lps_poff.o
+
+
+_HAL_INTFS_FILES +=	\
+			hal/$(RTL871X)/$(HCI_NAME)/$(HCI_NAME)_halinit.o \
+			hal/$(RTL871X)/$(HCI_NAME)/rtl$(MODULE_SUB_NAME)_led.o \
+			hal/$(RTL871X)/$(HCI_NAME)/rtl$(MODULE_SUB_NAME)_xmit.o \
+			hal/$(RTL871X)/$(HCI_NAME)/rtl$(MODULE_SUB_NAME)_recv.o
+			
+ifeq ($(CONFIG_PCI_HCI), y)
+_HAL_INTFS_FILES += hal/$(RTL871X)/$(HCI_NAME)/$(HCI_NAME)_ops_linux.o
+else
+_HAL_INTFS_FILES += hal/$(RTL871X)/$(HCI_NAME)/$(HCI_NAME)_ops.o
+endif
+
+ifeq ($(CONFIG_SDIO_HCI), y)
+_HAL_INTFS_FILES += hal/efuse/$(RTL871X)/HalEfuseMask8192F_SDIO.o
+endif
+
+ifeq ($(CONFIG_USB_HCI), y)
+_HAL_INTFS_FILES += hal/efuse/$(RTL871X)/HalEfuseMask8192F_USB.o
+endif
+
+ifeq ($(CONFIG_PCI_HCI), y)
+_HAL_INTFS_FILES += hal/efuse/$(RTL871X)/HalEfuseMask8192F_PCIE.o
+endif
+
+endif
 ########### AUTO_CFG  #################################
 
 ifeq ($(CONFIG_AUTOCFG_CP), y)
@@ -784,10 +970,6 @@ ifeq ($(CONFIG_HW_PWRP_DETECTION), y)
 EXTRA_CFLAGS += -DCONFIG_HW_PWRP_DETECTION
 endif
 
-ifeq ($(CONFIG_WIFI_TEST), y)
-EXTRA_CFLAGS += -DCONFIG_WIFI_TEST
-endif
-
 ifeq ($(CONFIG_BT_COEXIST), y)
 EXTRA_CFLAGS += -DCONFIG_BT_COEXIST
 endif
@@ -830,10 +1012,6 @@ ifeq ($(CONFIG_EXT_CLK), y)
 EXTRA_CFLAGS += -DCONFIG_EXT_CLK
 endif
 
-ifeq ($(CONFIG_XTAL_26M), y)
-EXTRA_CFLAGS += -DCONFIG_XTAL_26M
-endif
-
 ifeq ($(CONFIG_TRAFFIC_PROTECT), y)
 EXTRA_CFLAGS += -DCONFIG_TRAFFIC_PROTECT
 endif
@@ -894,6 +1072,10 @@ endif
 
 ifeq ($(CONFIG_WOWLAN), y)
 EXTRA_CFLAGS += -DCONFIG_WOWLAN -DRTW_WAKEUP_EVENT=$(CONFIG_WAKEUP_TYPE)
+EXTRA_CFLAGS += -DRTW_SUSPEND_TYPE=$(CONFIG_SUSPEND_TYPE)
+ifeq ($(CONFIG_WOW_STA_MIX), y)
+EXTRA_CFLAGS += -DRTW_WOW_STA_MIX
+endif
 ifeq ($(CONFIG_SDIO_HCI), y)
 EXTRA_CFLAGS += -DCONFIG_RTW_SDIO_PM_KEEP_POWER
 endif
@@ -915,11 +1097,20 @@ endif
 
 ifeq ($(CONFIG_GPIO_WAKEUP), y)
 EXTRA_CFLAGS += -DCONFIG_GPIO_WAKEUP
-ifeq ($(CONFIG_HIGH_ACTIVE), y)
-EXTRA_CFLAGS += -DHIGH_ACTIVE=1
+ifeq ($(CONFIG_ONE_PIN_GPIO), y)
+EXTRA_CFLAGS += -DCONFIG_RTW_ONE_PIN_GPIO
+endif
+ifeq ($(CONFIG_HIGH_ACTIVE_DEV2HST), y)
+EXTRA_CFLAGS += -DHIGH_ACTIVE_DEV2HST=1
 else
-EXTRA_CFLAGS += -DHIGH_ACTIVE=0
+EXTRA_CFLAGS += -DHIGH_ACTIVE_DEV2HST=0
+endif
 endif
+
+ifeq ($(CONFIG_HIGH_ACTIVE_HST2DEV), y)
+EXTRA_CFLAGS += -DHIGH_ACTIVE_HST2DEV=1
+else
+EXTRA_CFLAGS += -DHIGH_ACTIVE_HST2DEV=0
 endif
 
 ifneq ($(CONFIG_WAKEUP_GPIO_IDX), default)
@@ -942,9 +1133,6 @@ EXTRA_CFLAGS += -DCONFIG_BR_EXT
 EXTRA_CFLAGS += '-DCONFIG_BR_EXT_BRNAME="'$(BR_NAME)'"'
 endif
 
-ifeq ($(CONFIG_ANTENNA_DIVERSITY), y)
-EXTRA_CFLAGS += -DCONFIG_ANTENNA_DIVERSITY
-endif
 
 ifeq ($(CONFIG_TDLS), y)
 EXTRA_CFLAGS += -DCONFIG_TDLS
@@ -977,10 +1165,29 @@ EXTRA_CFLAGS += -DCONFIG_WIFI_MONITOR
 endif
 endif
 
+ifeq ($(CONFIG_RTW_NETIF_SG), y)
+EXTRA_CFLAGS += -DCONFIG_RTW_NETIF_SG
+endif
+
+ifeq ($(CONFIG_TX_CSUM_OFFLOAD), y)
+EXTRA_CFLAGS += -DCONFIG_TX_CSUM_OFFLOAD
+endif
+
+ifeq ($(CONFIG_ICMP_VOQ), y)
+EXTRA_CFLAGS += -DCONFIG_ICMP_VOQ
+endif
+
+ifeq ($(CONFIG_IP_R_MONITOR), y)
+EXTRA_CFLAGS += -DCONFIG_IP_R_MONITOR
+endif
+
 ifeq ($(CONFIG_RTW_WIFI_HAL), y)
 #EXTRA_CFLAGS += -DCONFIG_RTW_WIFI_HAL_DEBUG
 EXTRA_CFLAGS += -DCONFIG_RTW_WIFI_HAL
 EXTRA_CFLAGS += -DCONFIG_RTW_CFGVEDNOR_LLSTATS
+EXTRA_CFLAGS += -DCONFIG_RTW_CFGVENDOR_RANDOM_MAC_OUI
+EXTRA_CFLAGS += -DCONFIG_RTW_CFGVEDNOR_RSSIMONITOR
+EXTRA_CFLAGS += -DCONFIG_RTW_CFGVENDOR_WIFI_LOGGER
 endif
 
 ifeq ($(CONFIG_MP_VHT_HW_TX_MODE), y)
@@ -1030,17 +1237,26 @@ EXTRA_CFLAGS += -DCONFIG_RADIO_WORK
 EXTRA_CFLAGS += -DRTW_VENDOR_EXT_SUPPORT
 EXTRA_CFLAGS += -DRTW_ENABLE_WIFI_CONTROL_FUNC
 ARCH ?= arm
-# for ubuntu environment
-#CROSS_COMPILE ?=
-#KVER := $(shell uname -r)
-#KSRC := /lib/modules/$(KVER)/build
-#MODDESTDIR := /lib/modules/$(KVER)/kernel/drivers/net/wireless/
-#INSTALL_PREFIX :=
+
 CROSS_COMPILE := /mnt/newdisk/android_sdk/nvidia_tk1/android_L/prebuilts/gcc/linux-x86/arm/arm-eabi-4.8/bin/arm-eabi-
 KSRC :=/mnt/newdisk/android_sdk/nvidia_tk1/android_L/out/target/product/shieldtablet/obj/KERNEL/
 MODULE_NAME = wlan
 endif
 
+ifeq ($(CONFIG_PLATFORM_NV_TK1_UBUNTU), y)
+EXTRA_CFLAGS += -DCONFIG_PLATFORM_NV_TK1
+EXTRA_CFLAGS += -DCONFIG_LITTLE_ENDIAN
+EXTRA_CFLAGS += -DCONFIG_IOCTL_CFG80211 -DRTW_USE_CFG80211_STA_EVENT
+
+ARCH ?= arm
+
+CROSS_COMPILE ?=
+KVER := $(shell uname -r)
+KSRC := /lib/modules/$(KVER)/build
+MODDESTDIR := /lib/modules/$(KVER)/kernel/drivers/net/wireless/
+INSTALL_PREFIX :=
+endif
+
 ifeq ($(CONFIG_PLATFORM_ACTIONS_ATM702X), y)
 EXTRA_CFLAGS += -DCONFIG_LITTLE_ENDIAN -DCONFIG_PLATFORM_ANDROID -DCONFIG_PLATFORM_ACTIONS_ATM702X
 #ARCH := arm
@@ -1143,7 +1359,6 @@ endif
 
 ifeq ($(CONFIG_PLATFORM_ANDROID_INTEL_X86), y)
 EXTRA_CFLAGS += -DCONFIG_PLATFORM_ANDROID_INTEL_X86
-EXTRA_CFLAGS += -DCONFIG_PLATFORM_INTEL_CHT_ANDROID60 # Kernel 3.14 but has been applied some 4.3 patch
 EXTRA_CFLAGS += -DCONFIG_PLATFORM_INTEL_BYT
 EXTRA_CFLAGS += -DCONFIG_LITTLE_ENDIAN -DCONFIG_PLATFORM_ANDROID
 EXTRA_CFLAGS += -DCONFIG_CONCURRENT_MODE
@@ -1369,6 +1584,7 @@ EXTRA_CFLAGS += -DCONFIG_IOCTL_CFG80211 -DRTW_USE_CFG80211_STA_EVENT
 EXTRA_CFLAGS += -DCONFIG_CONCURRENT_MODE
 # default setting for Power control
 EXTRA_CFLAGS += -DRTW_ENABLE_WIFI_CONTROL_FUNC
+EXTRA_CFLAGS += -DRTW_SUPPORT_PLATFORM_SHUTDOWN
 # default setting for Special function
 ARCH := arm
 CROSS_COMPILE := /home/android_sdk/Rockchip/Rk3188/prebuilts/gcc/linux-x86/arm/arm-eabi-4.6/bin/arm-eabi-
@@ -1382,6 +1598,9 @@ EXTRA_CFLAGS += -DRTW_ENABLE_WIFI_CONTROL_FUNC
 EXTRA_CFLAGS += -DCONFIG_LITTLE_ENDIAN
 EXTRA_CFLAGS += -DCONFIG_CONCURRENT_MODE
 EXTRA_CFLAGS += -DCONFIG_IOCTL_CFG80211
+ifeq ($(CONFIG_SDIO_HCI), y)
+EXTRA_CFLAGS += -DRTW_SUPPORT_PLATFORM_SHUTDOWN
+endif
 EXTRA_CFLAGS += -fno-pic
 ARCH := arm
 CROSS_COMPILE := /home/android_sdk/Rockchip/rk3066_20130607/prebuilts/gcc/linux-x86/arm/arm-linux-androideabi-4.6/bin/arm-linux-androideabi-
@@ -1576,10 +1795,9 @@ endif
 
 ifeq ($(CONFIG_PLATFORM_ARM_RTD299X), y)
 EXTRA_CFLAGS += -DCONFIG_LITTLE_ENDIAN
-EXTRA_CFLAGS += -DUSB_XMITBUF_ALIGN_SZ=1024 -DUSB_PACKET_OFFSET_SZ=0
 EXTRA_CFLAGS += -DCONFIG_CONCURRENT_MODE
-ifeq ($(CONFIG_ANDROID), y)
 EXTRA_CFLAGS += -DCONFIG_IOCTL_CFG80211 -DRTW_USE_CFG80211_STA_EVENT
+ifeq ($(CONFIG_ANDROID), y)
 # Enable this for Android 5.0
 EXTRA_CFLAGS += -DCONFIG_RADIO_WORK
 endif
@@ -1587,6 +1805,32 @@ endif
 INSTALL_PREFIX :=
 endif
 
+ifeq ($(CONFIG_PLATFORM_ARM_RTD299X_LG), y)
+EXTRA_CFLAGS += -DCONFIG_LITTLE_ENDIAN
+EXTRA_CFLAGS += -DCONFIG_IOCTL_CFG80211 -DRTW_USE_CFG80211_STA_EVENT
+EXTRA_CFLAGS += -DCONFIG_CONCURRENT_MODE
+EXTRA_CFLAGS += -DRTW_P2P_GROUP_INTERFACE=1
+EXTRA_CFLAGS += -DCONFIG_IFACE_NUMBER=3
+#EXTRA_CFLAGS += -DCONFIG_FIX_HWPORT
+EXTRA_CFLAGS += -DLGE_PRIVATE
+EXTRA_CFLAGS += -DPURE_SUPPLICANT
+EXTRA_CFLAGS += -DCONFIG_CUSTOMIZED_COUNTRY_CHPLAN_MAP -DCONFIG_RTW_IOCTL_SET_COUNTRY
+EXTRA_CFLAGS += -DDBG_RX_DFRAME_RAW_DATA
+EXTRA_CFLAGS += -DRTW_REDUCE_SCAN_SWITCH_CH_TIME
+ARCH ?= arm
+KVER ?=
+
+ifneq ($(PLATFORM), WEBOS)
+$(info PLATFORM is empty)
+CROSS_COMPILE ?= /mnt/newdisk/LGE/arm-lg115x-linux-gnueabi-4.8-2016.03-x86_64/bin/arm-lg115x-linux-gnueabi-
+KSRC ?= /mnt/newdisk/LGE/linux-rockhopper_k3lp_drd4tv_423
+endif
+
+CROSS_COMPILE ?=
+KSRC ?= $(LINUX_SRC)
+INSTALL_PREFIX ?=
+endif
+
 ifeq ($(CONFIG_PLATFORM_HISILICON), y)
 EXTRA_CFLAGS += -DCONFIG_LITTLE_ENDIAN -DCONFIG_PLATFORM_HISILICON
 ifeq ($(SUPPORT_CONCURRENT),y)
@@ -1603,6 +1847,42 @@ ifeq ($(KSRC),)
 endif
 endif
 
+ifeq ($(CONFIG_PLATFORM_HISILICON_HI3798), y)
+EXTRA_CFLAGS += -DCONFIG_PLATFORM_HISILICON
+EXTRA_CFLAGS += -DCONFIG_PLATFORM_HISILICON_HI3798
+#EXTRA_CFLAGS += -DCONFIG_PLATFORM_HISILICON_HI3798_MV200_HDMI_DONGLE
+EXTRA_CFLAGS += -DCONFIG_LITTLE_ENDIAN
+# default setting for Android
+EXTRA_CFLAGS += -DCONFIG_CONCURRENT_MODE
+EXTRA_CFLAGS += -DCONFIG_IOCTL_CFG80211
+EXTRA_CFLAGS += -DRTW_USE_CFG80211_STA_EVENT
+# default setting for Android 5.x and later
+#EXTRA_CFLAGS += -DCONFIG_RADIO_WORK
+
+# If system could power on and recognize Wi-Fi SDIO automatically,
+# platfrom operations are not necessary.
+#ifeq ($(CONFIG_SDIO_HCI), y)
+#EXTRA_CFLAGS += -DCONFIG_PLATFORM_OPS
+#_PLATFORM_FILES += platform/platform_hisilicon_hi3798_sdio.o
+#EXTRA_CFLAGS += -DCONFIG_HISI_SDIO_ID=1
+#endif
+
+ARCH ?= arm
+CROSS_COMPILE ?= /HiSTBAndroidV600R003C00SPC021_git_0512/device/hisilicon/bigfish/sdk/tools/linux/toolchains/arm-histbv310-linux/bin/arm-histbv310-linux-
+ifndef KSRC
+KSRC := /HiSTBAndroidV600R003C00SPC021_git_0512/device/hisilicon/bigfish/sdk/source/kernel/linux-3.18.y
+KSRC += O=/HiSTBAndroidV600R003C00SPC021_git_0512/out/target/product/Hi3798MV200/obj/KERNEL_OBJ
+endif
+
+ifeq ($(CONFIG_RTL8822B), y)
+ifeq ($(CONFIG_SDIO_HCI), y)
+CONFIG_RTL8822BS ?= m
+USER_MODULE_NAME := rtl8822bs
+endif
+endif
+
+endif
+
 # Platform setting
 ifeq ($(CONFIG_PLATFORM_ARM_SPREADTRUM_6820), y)
 ifeq ($(CONFIG_ANDROID_2X), y)
@@ -1636,18 +1916,6 @@ _PLATFORM_FILES += platform/platform_sprd_sdio.o
 endif
 endif
 
-ifeq ($(CONFIG_PLATFORM_AML_S905), y)
-EXTRA_CFLAGS += -Wno-error=date-time
-EXTRA_CFLAGS += -DCONFIG_PLATFORM_AML_S905
-EXTRA_CFLAGS += -DCONFIG_LITTLE_ENDIAN -fno-pic
-EXTRA_CFLAGS += -DCONFIG_IOCTL_CFG80211 -DCONFIG_CONCURRENT_MODE
-EXTRA_CFLAGS += -DCONFIG_P2P_IPS -DRTW_USE_CFG80211_STA_EVENT
-EXTRA_CFLAGS += -DCONFIG_RADIO_WORK
-ifeq ($(CONFIG_SDIO_HCI), y)
-EXTRA_CFLAGS += -DCONFIG_PLATFORM_OPS
-_PLATFORM_FILES += platform/platform_AML_S905_sdio.o
-endif
-endif
 ifeq ($(CONFIG_PLATFORM_ARM_WMT), y)
 EXTRA_CFLAGS += -DCONFIG_LITTLE_ENDIAN
 EXTRA_CFLAGS += -DCONFIG_CONCURRENT_MODE
@@ -1668,7 +1936,6 @@ EXTRA_CFLAGS += -DCONFIG_LITTLE_ENDIAN
 EXTRA_CFLAGS += -DCONFIG_TRAFFIC_PROTECT
 # default setting for Android 4.1, 4.2
 EXTRA_CFLAGS += -DCONFIG_CONCURRENT_MODE
-EXTRA_CFLAGS += -DCONFIG_IFACE_NUMBER=3
 EXTRA_CFLAGS += -DCONFIG_IOCTL_CFG80211 -DRTW_USE_CFG80211_STA_EVENT
 #EXTRA_CFLAGS +=  -DCONFIG_QOS_OPTIMIZATION
 EXTRA_CFLAGS += -DCONFIG_QOS_OPTIMIZATION
@@ -1688,12 +1955,32 @@ ARCH := arm
 #CROSS_COMPILE := arm-linux-gnueabihf-
 KVER  := 3.10.24
 #KSRC :=/home/android_sdk/Allwinner/a20/android-kitkat44/lichee/linux-3.4
-CROSS_COMPILE := $(CROSS)
-KSRC := $(LINUX_KERNEL_PATH)
+CROSS_COMPILE := /home/realtek/software_phoenix/phoenix/toolchain/usr/local/arm-2013.11/bin/arm-linux-gnueabihf-
+KSRC := /home/realtek/software_phoenix/linux-kernel
 MODULE_NAME := 8192eu
 
 endif
 
+ifeq ($(CONFIG_PLATFORM_RTK119X_AM), y)
+EXTRA_CFLAGS += -DCONFIG_PLATFORM_RTK119X_AM
+EXTRA_CFLAGS += -DCONFIG_LITTLE_ENDIAN
+EXTRA_CFLAGS += -DCONFIG_TRAFFIC_PROTECT
+EXTRA_CFLAGS += -DCONFIG_CONCURRENT_MODE -DCONFIG_FULL_CH_IN_P2P_HANDSHAKE
+EXTRA_CFLAGS += -DCONFIG_IFACE_NUMBER=3
+EXTRA_CFLAGS += -DCONFIG_IOCTL_CFG80211 -DRTW_USE_CFG80211_STA_EVENT
+
+ifeq ($(CONFIG_USB_HCI), y)
+EXTRA_CFLAGS += -DCONFIG_USE_USB_BUFFER_ALLOC_TX
+endif
+
+ARCH := arm
+
+#CROSS_COMPILE := arm-linux-gnueabihf-
+KVER  := 3.10.24
+#KSRC :=
+CROSS_COMPILE :=
+endif
+
 ifeq ($(CONFIG_PLATFORM_RTK129X), y)
 EXTRA_CFLAGS += -DCONFIG_LITTLE_ENDIAN
 EXTRA_CFLAGS += -DRTK_129X_PLATFORM
@@ -1723,10 +2010,27 @@ ARCH := arm64
 
 # ==== Cross compile setting for Android 4.4 SDK =====
 #CROSS_COMPILE := arm-linux-gnueabihf-
-KVER  := 4.1.10
-CROSS_COMPILE := $(CROSS)
-KSRC := $(LINUX_KERNEL_PATH)
-MODULE_NAME := 8822be
+#KVER  := 4.1.10
+#CROSS_COMPILE := $(CROSS)
+#KSRC := $(LINUX_KERNEL_PATH)
+CROSS_COMPILE := /home/android_sdk/DHC/trunk-6.0.0_r1-QA160627/phoenix/toolchain/asdk64-4.9.4-a53-EL-3.10-g2.19-a64nt-160307/bin/asdk64-linux-
+KSRC := /home/android_sdk/DHC/trunk-6.0.0_r1-QA160627/linux-kernel
+endif
+
+ifeq ($(CONFIG_PLATFORM_RTK390X), y)
+EXTRA_CFLAGS += -DCONFIG_LITTLE_ENDIAN
+EXTRA_CFLAGS += -DCONFIG_PLATFORM_RTK390X
+EXTRA_CFLAGS += -DCONFIG_IOCTL_CFG80211 -DRTW_USE_CFG80211_STA_EVENT
+EXTRA_CFLAGS += -DCONFIG_RTW_NETIF_SG
+ifeq ($(CONFIG_USB_HCI), y)
+EXTRA_CFLAGS += -DCONFIG_USE_USB_BUFFER_ALLOC_TX
+endif
+
+ARCH:=rlx
+
+CROSS_COMPILE:=mips-linux-
+KSRC:= /home/realtek/share/Develop/IPCAM_SDK/RealSil/rts3901_sdk_v1.2_vanilla/linux-3.10
+
 endif
 
 ifeq ($(CONFIG_PLATFORM_NOVATEK_NT72668), y)
@@ -1762,6 +2066,77 @@ CROSS_COMPILE:= $(DIR_LINUX)/../toolchain/rsdk-1.5.5-5281-EB-2.6.30-0.9.30.3-110
 KSRC := $(DIR_LINUX)
 endif
 
+ifeq ($(CONFIG_PLATFORM_AML_S905), y)
+EXTRA_CFLAGS += -DCONFIG_PLATFORM_AML_S905
+EXTRA_CFLAGS += -DCONFIG_LITTLE_ENDIAN -fno-pic
+# default setting for Android
+EXTRA_CFLAGS += -DCONFIG_CONCURRENT_MODE
+EXTRA_CFLAGS += -DCONFIG_IOCTL_CFG80211
+EXTRA_CFLAGS += -DRTW_USE_CFG80211_STA_EVENT
+# default setting for Android 5.x and later
+EXTRA_CFLAGS += -DCONFIG_RADIO_WORK
+
+ifeq ($(CONFIG_SDIO_HCI), y)
+EXTRA_CFLAGS += -DCONFIG_PLATFORM_OPS
+_PLATFORM_FILES += platform/platform_aml_s905_sdio.o
+endif
+
+ARCH ?= arm64
+CROSS_COMPILE ?= /4.4_S905L_8822bs_compile/gcc-linaro-aarch64-linux-gnu-4.9-2014.09_linux/bin/aarch64-linux-gnu-
+ifndef KSRC
+KSRC := /4.4_S905L_8822bs_compile/common
+# To locate output files in a separate directory.
+KSRC += O=/4.4_S905L_8822bs_compile/KERNEL_OBJ
+endif
+
+ifeq ($(CONFIG_RTL8822B), y)
+ifeq ($(CONFIG_SDIO_HCI), y)
+CONFIG_RTL8822BS ?= m
+USER_MODULE_NAME := 8822bs
+endif
+endif
+
+endif
+
+ifeq ($(CONFIG_PLATFORM_ZTE_ZX296716), y)
+EXTRA_CFLAGS += -Wno-error=date-time
+EXTRA_CFLAGS += -DCONFIG_PLATFORM_ZTE_ZX296716
+EXTRA_CFLAGS += -DCONFIG_LITTLE_ENDIAN
+# default setting for Android
+EXTRA_CFLAGS += -DCONFIG_CONCURRENT_MODE
+EXTRA_CFLAGS += -DCONFIG_IOCTL_CFG80211
+EXTRA_CFLAGS += -DRTW_USE_CFG80211_STA_EVENT
+# default setting for Android 5.x and later
+#EXTRA_CFLAGS += -DCONFIG_RADIO_WORK
+
+ifeq ($(CONFIG_SDIO_HCI), y)
+# mark this temporarily
+#EXTRA_CFLAGS += -DCONFIG_PLATFORM_OPS
+#_PLATFORM_FILES += platform/platform_zte_zx296716_sdio.o
+endif
+
+ARCH ?= arm64
+CROSS_COMPILE ?=
+KSRC ?=
+
+ifeq ($(CONFIG_RTL8822B), y)
+ifeq ($(CONFIG_SDIO_HCI), y)
+CONFIG_RTL8822BS ?= m
+USER_MODULE_NAME := 8822bs
+endif
+endif
+
+endif
+
+########### CUSTOMER ################################
+ifeq ($(CONFIG_CUSTOMER_HUAWEI_GENERAL), y)
+CONFIG_CUSTOMER_HUAWEI = y
+endif
+
+ifeq ($(CONFIG_CUSTOMER_HUAWEI), y)
+EXTRA_CFLAGS += -DCONFIG_HUAWEI_PROC
+endif
+
 ifeq ($(CONFIG_MULTIDRV), y)
 
 ifeq ($(CONFIG_SDIO_HCI), y)
@@ -1786,6 +2161,19 @@ endif
 
 ifneq ($(KERNELRELEASE),)
 
+########### this part for *.mk ############################
+include $(src)/hal/phydm/phydm.mk
+
+########### HAL_RTL8822B #################################
+ifeq ($(CONFIG_RTL8822B), y)
+include $(src)/rtl8822b.mk
+endif
+
+########### HAL_RTL8821C #################################
+ifeq ($(CONFIG_RTL8821C), y)
+include $(src)/rtl8821c.mk
+endif
+
 rtk_core :=	core/rtw_cmd.o \
 		core/rtw_security.o \
 		core/rtw_debug.o \
@@ -1800,9 +2188,13 @@ rtk_core :=	core/rtw_cmd.o \
 		core/rtw_vht.o \
 		core/rtw_pwrctrl.o \
 		core/rtw_rf.o \
+		core/rtw_chplan.o \
 		core/rtw_recv.o \
 		core/rtw_sta_mgt.o \
 		core/rtw_ap.o \
+		core/mesh/rtw_mesh.o \
+		core/mesh/rtw_mesh_pathtbl.o \
+		core/mesh/rtw_mesh_hwmp.o \
 		core/rtw_xmit.o	\
 		core/rtw_p2p.o \
 		core/rtw_rson.o \
@@ -1910,7 +2302,7 @@ clean:
 	cd hal ; rm -fr */*/*.mod.c */*/*.mod */*/*.o */*/.*.cmd */*/*.ko
 	cd hal ; rm -fr */*.mod.c */*.mod */*.o */.*.cmd */*.ko
 	cd hal ; rm -fr *.mod.c *.mod *.o .*.cmd *.ko
-	cd core/efuse ; rm -fr *.mod.c *.mod *.o .*.cmd *.ko
+	cd core ; rm -fr */*.mod.c */*.mod */*.o */.*.cmd */*.ko
 	cd core ; rm -fr *.mod.c *.mod *.o .*.cmd *.ko
 	cd os_dep/linux ; rm -fr *.mod.c *.mod *.o .*.cmd *.ko
 	cd os_dep ; rm -fr *.mod.c *.mod *.o .*.cmd *.ko
diff --git a/rtl8723DS/clean b/rtl8723DS/clean
index 8766421..8766421 100755..100644
--- a/rtl8723DS/clean
+++ b/rtl8723DS/clean
diff --git a/rtl8723DS/core/efuse/rtw_efuse.c b/rtl8723DS/core/efuse/rtw_efuse.c
index 744bada..44d8ac4 100755..100644
--- a/rtl8723DS/core/efuse/rtw_efuse.c
+++ b/rtl8723DS/core/efuse/rtw_efuse.c
@@ -62,7 +62,7 @@ BOOLEAN efuse_IsMasked(PADAPTER pAdapter, u16 Offset)
 	if (pAdapter->registrypriv.boffefusemask)
 		return FALSE;
 
-#if DEV_BUS_TYPE == RT_USB_INTERFACE
+#ifdef CONFIG_USB_HCI
 #if defined(CONFIG_RTL8188E)
 	if (IS_HARDWARE_TYPE_8188E(pAdapter))
 		return (IS_MASKED(8188E, _MUSB, Offset)) ? TRUE : FALSE;
@@ -99,6 +99,10 @@ BOOLEAN efuse_IsMasked(PADAPTER pAdapter, u16 Offset)
 	if (IS_HARDWARE_TYPE_8188F(pAdapter))
 		return (IS_MASKED(8188F, _MUSB, Offset)) ? TRUE : FALSE;
 #endif
+#if defined(CONFIG_RTL8188GTV)
+	if (IS_HARDWARE_TYPE_8188GTV(pAdapter))
+		return (IS_MASKED(8188GTV, _MUSB, Offset)) ? TRUE : FALSE;
+#endif
 #if defined(CONFIG_RTL8822B)
 	if (IS_HARDWARE_TYPE_8822B(pAdapter))
 		return (IS_MASKED(8822B, _MUSB, Offset)) ? TRUE : FALSE;
@@ -107,13 +111,22 @@ BOOLEAN efuse_IsMasked(PADAPTER pAdapter, u16 Offset)
 	if (IS_HARDWARE_TYPE_8723D(pAdapter))
 		return (IS_MASKED(8723D, _MUSB, Offset)) ? TRUE : FALSE;
 #endif
-
+#if defined(CONFIG_RTL8710B)
+	if (IS_HARDWARE_TYPE_8710B(pAdapter))
+		return (IS_MASKED(8710B, _MUSB, Offset)) ? TRUE : FALSE;
+#endif
 #if defined(CONFIG_RTL8821C)
 	if (IS_HARDWARE_TYPE_8821CU(pAdapter))
 		return (IS_MASKED(8821C, _MUSB, Offset)) ? TRUE : FALSE;
 #endif
 
-#elif DEV_BUS_TYPE == RT_PCI_INTERFACE
+#if defined(CONFIG_RTL8192F)
+	if (IS_HARDWARE_TYPE_8192FU(pAdapter))
+		return (IS_MASKED(8192F, _MUSB, Offset)) ? TRUE : FALSE;
+#endif
+#endif /*CONFIG_USB_HCI*/
+
+#ifdef CONFIG_PCI_HCI
 #if defined(CONFIG_RTL8188E)
 	if (IS_HARDWARE_TYPE_8188E(pAdapter))
 		return (IS_MASKED(8188E, _MPCIE, Offset)) ? TRUE : FALSE;
@@ -147,7 +160,13 @@ BOOLEAN efuse_IsMasked(PADAPTER pAdapter, u16 Offset)
 		return (IS_MASKED(8821C, _MPCIE, Offset)) ? TRUE : FALSE;
 #endif
 
-#elif DEV_BUS_TYPE == RT_SDIO_INTERFACE
+#if defined(CONFIG_RTL8192F)
+	if (IS_HARDWARE_TYPE_8192FE(pAdapter))
+		return (IS_MASKED(8192F, _MPCIE, Offset)) ? TRUE : FALSE;
+#endif
+#endif /*CONFIG_PCI_HCI*/
+
+#ifdef CONFIG_SDIO_HCI
 #ifdef CONFIG_RTL8188E_SDIO
 	if (IS_HARDWARE_TYPE_8188E(pAdapter))
 		return (IS_MASKED(8188E, _MSDIO, Offset)) ? TRUE : FALSE;
@@ -156,10 +175,14 @@ BOOLEAN efuse_IsMasked(PADAPTER pAdapter, u16 Offset)
 	if (IS_HARDWARE_TYPE_8723BS(pAdapter))
 		return (IS_MASKED(8723B, _MSDIO, Offset)) ? TRUE : FALSE;
 #endif
-#ifdef CONFIG_RTL8188F_SDIO
+#ifdef CONFIG_RTL8188F
 	if (IS_HARDWARE_TYPE_8188F(pAdapter))
 		return (IS_MASKED(8188F, _MSDIO, Offset)) ? TRUE : FALSE;
 #endif
+#ifdef CONFIG_RTL8188GTV
+	if (IS_HARDWARE_TYPE_8188GTV(pAdapter))
+		return (IS_MASKED(8188GTV, _MSDIO, Offset)) ? TRUE : FALSE;
+#endif
 #ifdef CONFIG_RTL8192E
 	if (IS_HARDWARE_TYPE_8192ES(pAdapter))
 		return (IS_MASKED(8192E, _MSDIO, Offset)) ? TRUE : FALSE;
@@ -176,7 +199,11 @@ BOOLEAN efuse_IsMasked(PADAPTER pAdapter, u16 Offset)
 	if (IS_HARDWARE_TYPE_8822B(pAdapter))
 		return (IS_MASKED(8822B, _MSDIO, Offset)) ? TRUE : FALSE;
 #endif
+#if defined(CONFIG_RTL8192F)
+	if (IS_HARDWARE_TYPE_8192FS(pAdapter))
+		return (IS_MASKED(8192F, _MSDIO, Offset)) ? TRUE : FALSE;
 #endif
+#endif /*CONFIG_SDIO_HCI*/
 
 	return FALSE;
 }
@@ -185,7 +212,7 @@ void rtw_efuse_mask_array(PADAPTER pAdapter, u8 *pArray)
 {
 	PHAL_DATA_TYPE pHalData = GET_HAL_DATA(pAdapter);
 
-#if DEV_BUS_TYPE == RT_USB_INTERFACE
+#ifdef CONFIG_USB_HCI
 #if defined(CONFIG_RTL8188E)
 	if (IS_HARDWARE_TYPE_8188E(pAdapter))
 		GET_MASK_ARRAY(8188E, _MUSB, pArray);
@@ -214,6 +241,10 @@ void rtw_efuse_mask_array(PADAPTER pAdapter, u8 *pArray)
 	if (IS_HARDWARE_TYPE_8188F(pAdapter))
 		GET_MASK_ARRAY(8188F, _MUSB, pArray);
 #endif
+#if defined(CONFIG_RTL8188GTV)
+	if (IS_HARDWARE_TYPE_8188GTV(pAdapter))
+		GET_MASK_ARRAY(8188GTV, _MUSB, pArray);
+#endif
 #if defined(CONFIG_RTL8814A)
 	if (IS_HARDWARE_TYPE_8814A(pAdapter))
 		GET_MASK_ARRAY(8814A, _MUSB, pArray);
@@ -226,9 +257,13 @@ void rtw_efuse_mask_array(PADAPTER pAdapter, u8 *pArray)
 	if (IS_HARDWARE_TYPE_8821CU(pAdapter))
 		GET_MASK_ARRAY(8821C, _MUSB, pArray);
 #endif
+#if defined(CONFIG_RTL8192F)
+	if (IS_HARDWARE_TYPE_8192FU(pAdapter))
+		GET_MASK_ARRAY(8192F, _MUSB, pArray);
+#endif
+#endif /*CONFIG_USB_HCI*/
 
-
-#elif DEV_BUS_TYPE == RT_PCI_INTERFACE
+#ifdef CONFIG_PCI_HCI
 #if defined(CONFIG_RTL8188E)
 	if (IS_HARDWARE_TYPE_8188E(pAdapter))
 		GET_MASK_ARRAY(8188E, _MPCIE, pArray);
@@ -261,9 +296,13 @@ void rtw_efuse_mask_array(PADAPTER pAdapter, u8 *pArray)
 	if (IS_HARDWARE_TYPE_8821CE(pAdapter))
 		GET_MASK_ARRAY(8821C, _MPCIE, pArray);
 #endif
+#if defined(CONFIG_RTL8192F)
+	if (IS_HARDWARE_TYPE_8192FE(pAdapter))
+		GET_MASK_ARRAY(8192F, _MPCIE, pArray);
+#endif
+#endif /*CONFIG_PCI_HCI*/
 
-
-#elif DEV_BUS_TYPE == RT_SDIO_INTERFACE
+#ifdef CONFIG_SDIO_HCI
 #if defined(CONFIG_RTL8188E)
 	if (IS_HARDWARE_TYPE_8188E(pAdapter))
 		GET_MASK_ARRAY(8188E, _MSDIO, pArray);
@@ -276,6 +315,10 @@ void rtw_efuse_mask_array(PADAPTER pAdapter, u8 *pArray)
 	if (IS_HARDWARE_TYPE_8188F(pAdapter))
 		GET_MASK_ARRAY(8188F, _MSDIO, pArray);
 #endif
+#if defined(CONFIG_RTL8188GTV)
+	if (IS_HARDWARE_TYPE_8188GTV(pAdapter))
+		GET_MASK_ARRAY(8188GTV, _MSDIO, pArray);
+#endif
 #if defined(CONFIG_RTL8192E)
 	if (IS_HARDWARE_TYPE_8192ES(pAdapter))
 		GET_MASK_ARRAY(8192E, _MSDIO, pArray);
@@ -292,14 +335,18 @@ void rtw_efuse_mask_array(PADAPTER pAdapter, u8 *pArray)
 	if (IS_HARDWARE_TYPE_8822B(pAdapter))
 		GET_MASK_ARRAY(8822B , _MSDIO, pArray);
 #endif
-#endif /*#elif DEV_BUS_TYPE == RT_SDIO_INTERFACE*/
+#if defined(CONFIG_RTL8192F)
+	if (IS_HARDWARE_TYPE_8192FS(pAdapter))
+		GET_MASK_ARRAY(8192F, _MSDIO, pArray);
+#endif
+#endif /*CONFIG_SDIO_HCI*/
 }
 
 u16 rtw_get_efuse_mask_arraylen(PADAPTER pAdapter)
 {
 	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(pAdapter);
 
-#if DEV_BUS_TYPE == RT_USB_INTERFACE
+#ifdef CONFIG_USB_HCI
 #if defined(CONFIG_RTL8188E)
 	if (IS_HARDWARE_TYPE_8188E(pAdapter))
 		return GET_MASK_ARRAY_LEN(8188E, _MUSB);
@@ -328,6 +375,10 @@ u16 rtw_get_efuse_mask_arraylen(PADAPTER pAdapter)
 	if (IS_HARDWARE_TYPE_8188F(pAdapter))
 		return GET_MASK_ARRAY_LEN(8188F, _MUSB);
 #endif
+#if defined(CONFIG_RTL8188GTV)
+	if (IS_HARDWARE_TYPE_8188GTV(pAdapter))
+		return GET_MASK_ARRAY_LEN(8188GTV, _MUSB);
+#endif
 #if defined(CONFIG_RTL8814A)
 	if (IS_HARDWARE_TYPE_8814A(pAdapter))
 		return GET_MASK_ARRAY_LEN(8814A, _MUSB);
@@ -340,9 +391,13 @@ u16 rtw_get_efuse_mask_arraylen(PADAPTER pAdapter)
 	if (IS_HARDWARE_TYPE_8821CU(pAdapter))
 		return GET_MASK_ARRAY_LEN(8821C, _MUSB);
 #endif
+#if defined(CONFIG_RTL8192F)
+	if (IS_HARDWARE_TYPE_8192FU(pAdapter))
+		return GET_MASK_ARRAY_LEN(8192F, _MUSB);
+#endif
+#endif /*CONFIG_USB_HCI*/
 
-
-#elif DEV_BUS_TYPE == RT_PCI_INTERFACE
+#ifdef CONFIG_PCI_HCI
 #if defined(CONFIG_RTL8188E)
 	if (IS_HARDWARE_TYPE_8188E(pAdapter))
 		return GET_MASK_ARRAY_LEN(8188E, _MPCIE);
@@ -375,9 +430,13 @@ u16 rtw_get_efuse_mask_arraylen(PADAPTER pAdapter)
 	if (IS_HARDWARE_TYPE_8821CE(pAdapter))
 		return GET_MASK_ARRAY_LEN(8821C, _MPCIE);
 #endif
+#if defined(CONFIG_RTL8192F)
+	if (IS_HARDWARE_TYPE_8192FE(pAdapter))
+		return GET_MASK_ARRAY_LEN(8192F, _MPCIE);
+#endif
+#endif /*CONFIG_PCI_HCI*/
 
-
-#elif DEV_BUS_TYPE == RT_SDIO_INTERFACE
+#ifdef CONFIG_SDIO_HCI
 #if defined(CONFIG_RTL8188E)
 	if (IS_HARDWARE_TYPE_8188E(pAdapter))
 		return GET_MASK_ARRAY_LEN(8188E, _MSDIO);
@@ -390,6 +449,10 @@ u16 rtw_get_efuse_mask_arraylen(PADAPTER pAdapter)
 	if (IS_HARDWARE_TYPE_8188F(pAdapter))
 		return GET_MASK_ARRAY_LEN(8188F, _MSDIO);
 #endif
+#if defined(CONFIG_RTL8188GTV)
+	if (IS_HARDWARE_TYPE_8188GTV(pAdapter))
+		return GET_MASK_ARRAY_LEN(8188GTV, _MSDIO);
+#endif
 #if defined(CONFIG_RTL8192E)
 	if (IS_HARDWARE_TYPE_8192ES(pAdapter))
 		return GET_MASK_ARRAY_LEN(8192E, _MSDIO);
@@ -406,7 +469,11 @@ u16 rtw_get_efuse_mask_arraylen(PADAPTER pAdapter)
 	if (IS_HARDWARE_TYPE_8822B(pAdapter))
 		return GET_MASK_ARRAY_LEN(8822B, _MSDIO);
 #endif
+#if defined(CONFIG_RTL8192F)
+	if (IS_HARDWARE_TYPE_8192FS(pAdapter))
+		return GET_MASK_ARRAY_LEN(8192F, _MSDIO);
 #endif
+#endif/*CONFIG_SDIO_HCI*/
 	return 0;
 }
 
@@ -577,7 +644,7 @@ void rtw_efuse_analyze(PADAPTER	padapter, u8 Type, u8 Fake)
 	for (bank = startBank; bank <= endBank; bank++) {
 		if (!hal_EfuseSwitchToBank(padapter, bank, bPseudoTest)) {
 			RTW_INFO("EFUSE_SwitchToBank() Fail!!\n");
-			return;
+			goto out_free_buffer;
 		}
 
 		eFuse_Addr = bank * EFUSE_MAX_BANK_SIZE;
@@ -586,7 +653,7 @@ void rtw_efuse_analyze(PADAPTER	padapter, u8 Type, u8 Fake)
 
 		if (efuseHeader == 0xFF && bank == startBank && Fake != TRUE) {
 			RTW_INFO("Non-PGed Efuse\n");
-			return;
+			goto out_free_buffer;
 		}
 		RTW_INFO("EFUSE_REAL_CONTENT_LEN = %d\n", maprawlen);
 
@@ -719,10 +786,57 @@ void rtw_efuse_analyze(PADAPTER	padapter, u8 Type, u8 Fake)
 			);
 		}
 	_RTW_PRINT_SEL(RTW_DBGDUMP, "\n");
+
+out_free_buffer:
 	if (eFuseWord)
 		rtw_mfree((u8 *)eFuseWord, EFUSE_MAX_SECTION_NUM * (EFUSE_MAX_WORD_UNIT * 2));
 }
 
+VOID efuse_PreUpdateAction(
+	PADAPTER	pAdapter,
+	pu4Byte	BackupRegs)
+{
+	if (IS_HARDWARE_TYPE_8812AU(pAdapter) || IS_HARDWARE_TYPE_8822BU(pAdapter)) {
+		/* <20131115, Kordan> Turn off Rx to prevent from being busy when writing the EFUSE. (Asked by Chunchu.)*/
+		BackupRegs[0] = phy_query_mac_reg(pAdapter, REG_RCR, bMaskDWord);
+		BackupRegs[1] = phy_query_mac_reg(pAdapter, REG_RXFLTMAP0, bMaskDWord);
+		BackupRegs[2] = phy_query_mac_reg(pAdapter, REG_RXFLTMAP0+4, bMaskDWord);
+#ifdef CONFIG_RTL8812A
+		BackupRegs[3] = phy_query_mac_reg(pAdapter, REG_AFE_MISC, bMaskDWord);
+#endif
+		PlatformEFIOWrite4Byte(pAdapter, REG_RCR, 0x1);
+		PlatformEFIOWrite1Byte(pAdapter, REG_RXFLTMAP0, 0);
+		PlatformEFIOWrite1Byte(pAdapter, REG_RXFLTMAP0+1, 0);
+		PlatformEFIOWrite1Byte(pAdapter, REG_RXFLTMAP0+2, 0);
+		PlatformEFIOWrite1Byte(pAdapter, REG_RXFLTMAP0+3, 0);
+		PlatformEFIOWrite1Byte(pAdapter, REG_RXFLTMAP0+4, 0);
+		PlatformEFIOWrite1Byte(pAdapter, REG_RXFLTMAP0+5, 0);
+#ifdef CONFIG_RTL8812A
+		/* <20140410, Kordan> 0x11 = 0x4E, lower down LX_SPS0 voltage. (Asked by Chunchu)*/
+		phy_set_mac_reg(pAdapter, REG_AFE_MISC, bMaskByte1, 0x4E);
+#endif
+		RTW_INFO(" %s , done\n", __func__);
+
+		}
+}
+
+
+VOID efuse_PostUpdateAction(
+	PADAPTER	pAdapter,
+	pu4Byte	BackupRegs)
+{
+	if (IS_HARDWARE_TYPE_8812AU(pAdapter) || IS_HARDWARE_TYPE_8822BU(pAdapter)) {
+		/* <20131115, Kordan> Turn on Rx and restore the registers. (Asked by Chunchu.)*/
+		phy_set_mac_reg(pAdapter, REG_RCR, bMaskDWord, BackupRegs[0]);
+		phy_set_mac_reg(pAdapter, REG_RXFLTMAP0, bMaskDWord, BackupRegs[1]);
+		phy_set_mac_reg(pAdapter, REG_RXFLTMAP0+4, bMaskDWord, BackupRegs[2]);
+#ifdef CONFIG_RTL8812A
+		phy_set_mac_reg(pAdapter, REG_AFE_MISC, bMaskDWord, BackupRegs[3]);
+#endif
+	RTW_INFO(" %s , done\n", __func__);
+	}
+}
+
 
 #ifdef RTW_HALMAC
 #include "../../hal/hal_halmac.h"
@@ -945,19 +1059,25 @@ u8 rtw_efuse_map_read(PADAPTER adapter, u16 addr, u16 cnts, u8 *data)
 	u8 *efuse = NULL;
 	u32 size, i;
 	int err;
+	u32	backupRegs[4] = {0};
+	u8 status = _SUCCESS;
 
+	efuse_PreUpdateAction(adapter, backupRegs);
 
 	d = adapter_to_dvobj(adapter);
 	err = rtw_halmac_get_logical_efuse_size(d, &size);
-	if (err)
-		return _FAIL;
-
+	if (err) {
+		status = _FAIL;
+		goto exit;
+	}
 	/* size error handle */
 	if ((addr + cnts) > size) {
 		if (addr < size)
 			cnts = size - addr;
-		else
-			return _FAIL;
+		else {
+			status = _FAIL;
+			goto exit;
+		}
 	}
 
 	if (cnts > 16)
@@ -967,18 +1087,24 @@ u8 rtw_efuse_map_read(PADAPTER adapter, u16 addr, u16 cnts, u8 *data)
 		err = rtw_halmac_read_logical_efuse_map(d, efuse, size, NULL, 0);
 		if (err) {
 			rtw_mfree(efuse, size);
-			return _FAIL;
+			status = _FAIL;
+			goto exit;
 		}
 
 		_rtw_memcpy(data, efuse + addr, cnts);
 		rtw_mfree(efuse, size);
 	} else {
 		err = rtw_halmac_read_logical_efuse(d, addr, cnts, data);
-		if (err)
-			return _FAIL;
+		if (err) {
+			status = _FAIL;
+			goto exit;
+		}
 	}
+	status = _SUCCESS;
+exit:
+	efuse_PostUpdateAction(adapter, backupRegs);
 
-	return _SUCCESS;
+	return status;
 }
 
 u8 rtw_efuse_map_write(PADAPTER adapter, u16 addr, u16 cnts, u8 *data)
@@ -989,23 +1115,34 @@ u8 rtw_efuse_map_write(PADAPTER adapter, u16 addr, u16 cnts, u8 *data)
 	int err;
 	u8 mask_buf[64] = "";
 	u16 mask_len = sizeof(u8) * rtw_get_efuse_mask_arraylen(adapter);
+	u32 backupRegs[4] = {0};
+	u8 status = _SUCCESS;;
+
+	efuse_PreUpdateAction(adapter, backupRegs);
 
 	d = adapter_to_dvobj(adapter);
 	err = rtw_halmac_get_logical_efuse_size(d, &size);
-	if (err)
-		return _FAIL;
+	if (err) {
+		status = _FAIL;
+		goto exit;
+	}
 
-	if ((addr + cnts) > size)
-		return _FAIL;
+	if ((addr + cnts) > size) {
+		status = _FAIL;
+		goto exit;
+	}
 
 	efuse = rtw_zmalloc(size);
-	if (!efuse)
-		return _FAIL;
+	if (!efuse) {
+		status = _FAIL;
+		goto exit;
+	}
 
 	err = rtw_halmac_read_logical_efuse_map(d, efuse, size, NULL, 0);
 	if (err) {
 		rtw_mfree(efuse, size);
-		return _FAIL;
+		status = _FAIL;
+		goto exit;
 	}
 
 	_rtw_memcpy(efuse + addr, data, cnts);
@@ -1030,12 +1167,16 @@ u8 rtw_efuse_map_write(PADAPTER adapter, u16 addr, u16 cnts, u8 *data)
 
 	if (err) {
 		rtw_mfree(efuse, size);
-		return _FAIL;
+		status = _FAIL;
+		goto exit;
 	}
 
 	rtw_mfree(efuse, size);
+	status = _SUCCESS;
+exit :
+	efuse_PostUpdateAction(adapter, backupRegs);
 
-	return _SUCCESS;
+	return status;
 }
 
 int Efuse_PgPacketRead(PADAPTER adapter, u8 offset, u8 *data, BOOLEAN test)
@@ -1525,61 +1666,23 @@ hal_EfusePgPacketWriteData(
 	return _TRUE;
 }
 
-
-#define EFUSE_CTRL				0x30		/* E-Fuse Control. */
-
-/*  11/16/2008 MH Read one byte from real Efuse. */
-u8
-efuse_OneByteRead(
-	IN	PADAPTER	pAdapter,
-	IN	u16			addr,
-	IN	u8			*data,
-	IN	BOOLEAN		bPseudoTest)
+u8 efuse_OneByteRead(struct _ADAPTER *a, u16 addr, u8 *data, u8 bPseudoTest)
 {
-	u32	tmpidx = 0;
-	u8	bResult;
-	u8	readbyte;
-	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(pAdapter);
-
-	if (IS_HARDWARE_TYPE_8723B(pAdapter) ||
-	    (IS_HARDWARE_TYPE_8192E(pAdapter) && (!IS_A_CUT(pHalData->version_id))) ||
-	    (IS_VENDOR_8188E_I_CUT_SERIES(pAdapter)) || (IS_CHIP_VENDOR_SMIC(pHalData->version_id))
-	   ) {
-		/* <20130121, Kordan> For SMIC EFUSE specificatoin. */
-		/* 0x34[11]: SW force PGMEN input of efuse to high. (for the bank selected by 0x34[9:8])	 */
-		/* phy_set_mac_reg(pAdapter, 0x34, BIT11, 0); */
-		rtw_write16(pAdapter, 0x34, rtw_read16(pAdapter, 0x34) & (~BIT11));
-	}
-
-	/* -----------------e-fuse reg ctrl --------------------------------- */
-	/* address			 */
-	rtw_write8(pAdapter, EFUSE_CTRL + 1, (u8)(addr & 0xff));
-	rtw_write8(pAdapter, EFUSE_CTRL + 2, ((u8)((addr >> 8) & 0x03)) |
-		   (rtw_read8(pAdapter, EFUSE_CTRL + 2) & 0xFC));
-
-	/* rtw_write8(pAdapter, EFUSE_CTRL+3,  0x72); */ /* read cmd	 */
-	/* Write bit 32 0 */
-	readbyte = rtw_read8(pAdapter, EFUSE_CTRL + 3);
-	rtw_write8(pAdapter, EFUSE_CTRL + 3, (readbyte & 0x7f));
+		struct dvobj_priv *d;
+		int err;
+		u8 ret = _TRUE;
 
-	while (!(0x80 & rtw_read8(pAdapter, EFUSE_CTRL + 3)) && (tmpidx < 1000)) {
-		rtw_mdelay_os(1);
-		tmpidx++;
-	}
-	if (tmpidx < 100) {
-		*data = rtw_read8(pAdapter, EFUSE_CTRL);
-		bResult = _TRUE;
-	} else {
-		*data = 0xff;
-		bResult = _FALSE;
-		RTW_INFO("%s: [ERROR] addr=0x%x bResult=%d time out 1s !!!\n", __FUNCTION__, addr, bResult);
-		RTW_INFO("%s: [ERROR] EFUSE_CTRL =0x%08x !!!\n", __FUNCTION__, rtw_read32(pAdapter, EFUSE_CTRL));
-	}
+		d = adapter_to_dvobj(a);
+		err = rtw_halmac_read_physical_efuse(d, addr, 1, data);
+		if (err) {
+			RTW_ERR("%s: addr=0x%x FAIL!!!\n", __FUNCTION__, addr);
+			ret = _FALSE;
+		}
 
-	return bResult;
+		return ret;
+	
 }
 
-
 static u16
 hal_EfuseGetCurrentSize_BT(
 	PADAPTER	padapter,
@@ -1719,47 +1822,6 @@ u8 EfusePgPacketWrite_BT(
 #define EFUSE_CTRL			REG_EFUSE_CTRL		/* E-Fuse Control. */
 /* ------------------------------------------------------------------------------ */
 
-VOID efuse_PreUpdateAction(
-	PADAPTER	pAdapter,
-	pu4Byte	BackupRegs)
-{
-#if defined(CONFIG_RTL8812A)
-	if (IS_HARDWARE_TYPE_8812AU(pAdapter)) {
-		/* <20131115, Kordan> Turn off Rx to prevent from being busy when writing the EFUSE. (Asked by Chunchu.)*/
-		BackupRegs[0] = phy_query_mac_reg(pAdapter, REG_RCR, bMaskDWord);
-		BackupRegs[1] = phy_query_mac_reg(pAdapter, REG_RXFLTMAP0, bMaskDWord);
-		BackupRegs[2] = phy_query_mac_reg(pAdapter, REG_RXFLTMAP0+4, bMaskDWord);
-		BackupRegs[3] = phy_query_mac_reg(pAdapter, REG_AFE_MISC, bMaskDWord);
-
-		PlatformEFIOWrite4Byte(pAdapter, REG_RCR, 0x1);
-		PlatformEFIOWrite1Byte(pAdapter, REG_RXFLTMAP0, 0);
-		PlatformEFIOWrite1Byte(pAdapter, REG_RXFLTMAP0+1, 0);
-		PlatformEFIOWrite1Byte(pAdapter, REG_RXFLTMAP0+2, 0);
-		PlatformEFIOWrite1Byte(pAdapter, REG_RXFLTMAP0+3, 0);
-		PlatformEFIOWrite1Byte(pAdapter, REG_RXFLTMAP0+4, 0);
-		PlatformEFIOWrite1Byte(pAdapter, REG_RXFLTMAP0+5, 0);
-
-		/* <20140410, Kordan> 0x11 = 0x4E, lower down LX_SPS0 voltage. (Asked by Chunchu)*/
-		phy_set_mac_reg(pAdapter, REG_AFE_MISC, bMaskByte1, 0x4E);
-		}
-#endif
-}
-
-VOID efuse_PostUpdateAction(
-	PADAPTER	pAdapter,
-	pu4Byte	BackupRegs)
-{
-#if defined(CONFIG_RTL8812A)
-	if (IS_HARDWARE_TYPE_8812AU(pAdapter)) {
-		/* <20131115, Kordan> Turn on Rx and restore the registers. (Asked by Chunchu.)*/
-		phy_set_mac_reg(pAdapter, REG_RCR, bMaskDWord, BackupRegs[0]);
-		phy_set_mac_reg(pAdapter, REG_RXFLTMAP0, bMaskDWord, BackupRegs[1]);
-		phy_set_mac_reg(pAdapter, REG_RXFLTMAP0+4, bMaskDWord, BackupRegs[2]);
-		phy_set_mac_reg(pAdapter, REG_AFE_MISC, bMaskDWord, BackupRegs[3]);
-	}
-#endif
-}
-
 
 BOOLEAN
 Efuse_Read1ByteFromFakeContent(
@@ -2004,6 +2066,14 @@ efuse_OneByteRead(
 		return bResult;
 	}
 
+#ifdef CONFIG_RTL8710B
+	/* <20171208, Peter>, Dont do the following write16(0x34) */
+	if (IS_HARDWARE_TYPE_8710B(pAdapter)) {
+		bResult = pAdapter->hal_func.efuse_indirect_read4(pAdapter, addr, data);
+		return bResult;
+	}
+#endif
+
 	if (IS_HARDWARE_TYPE_8723B(pAdapter) ||
 	    (IS_HARDWARE_TYPE_8192E(pAdapter) && (!IS_A_CUT(pHalData->version_id))) ||
 	    (IS_VENDOR_8188E_I_CUT_SERIES(pAdapter)) || (IS_CHIP_VENDOR_SMIC(pHalData->version_id))
@@ -2694,31 +2764,6 @@ EFUSE_ShadowWrite(
 
 }	/* EFUSE_ShadowWrite */
 
-VOID
-Efuse_InitSomeVar(
-	IN		PADAPTER	pAdapter
-);
-VOID
-Efuse_InitSomeVar(
-	IN		PADAPTER	pAdapter
-)
-{
-	u8 i;
-
-	_rtw_memset((PVOID)&fakeEfuseContent[0], 0xff, EFUSE_MAX_HW_SIZE);
-	_rtw_memset((PVOID)&fakeEfuseInitMap[0], 0xff, EFUSE_MAX_MAP_LEN);
-	_rtw_memset((PVOID)&fakeEfuseModifiedMap[0], 0xff, EFUSE_MAX_MAP_LEN);
-
-	for (i = 0; i < EFUSE_MAX_BT_BANK; i++)
-		_rtw_memset((PVOID)&BTEfuseContent[i][0], EFUSE_MAX_HW_SIZE, 0xff);
-	_rtw_memset((PVOID)&BTEfuseInitMap[0], 0xff, EFUSE_BT_MAX_MAP_LEN);
-	_rtw_memset((PVOID)&BTEfuseModifiedMap[0], 0xff, EFUSE_BT_MAX_MAP_LEN);
-
-	for (i = 0; i < EFUSE_MAX_BT_BANK; i++)
-		_rtw_memset((PVOID)&fakeBTEfuseContent[i][0], 0xff, EFUSE_MAX_HW_SIZE);
-	_rtw_memset((PVOID)&fakeBTEfuseInitMap[0], 0xff, EFUSE_BT_MAX_MAP_LEN);
-	_rtw_memset((PVOID)&fakeBTEfuseModifiedMap[0], 0xff, EFUSE_BT_MAX_MAP_LEN);
-}
 #endif /* !RTW_HALMAC */
 /*-----------------------------------------------------------------------------
  * Function:	efuse_ShadowRead1Byte
diff --git a/rtl8723DS/core/mesh/rtw_mesh.c b/rtl8723DS/core/mesh/rtw_mesh.c
new file mode 100644
index 0000000..7d3a2e3
--- a/dev/null
+++ b/rtl8723DS/core/mesh/rtw_mesh.c
@@ -0,0 +1,4101 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2007 - 2017 Realtek Corporation.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ *****************************************************************************/
+#define _RTW_MESH_C_
+
+#ifdef CONFIG_RTW_MESH
+#include <drv_types.h>
+
+const char *_rtw_mesh_plink_str[] = {
+	"UNKNOWN",
+	"LISTEN",
+	"OPN_SNT",
+	"OPN_RCVD",
+	"CNF_RCVD",
+	"ESTAB",
+	"HOLDING",
+	"BLOCKED",
+};
+
+const char *_rtw_mesh_ps_str[] = {
+	"UNKNOWN",
+	"ACTIVE",
+	"LSLEEP",
+	"DSLEEP",
+};
+
+const char *_action_self_protected_str[] = {
+	"ACT_SELF_PROTECTED_RSVD",
+	"MESH_OPEN",
+	"MESH_CONF",
+	"MESH_CLOSE",
+	"MESH_GK_INFORM",
+	"MESH_GK_ACK",
+};
+
+inline u8 *rtw_set_ie_mesh_id(u8 *buf, u32 *buf_len, const char *mesh_id, u8 id_len)
+{
+	return rtw_set_ie(buf, WLAN_EID_MESH_ID, id_len, mesh_id, buf_len);
+}
+
+inline u8 *rtw_set_ie_mesh_config(u8 *buf, u32 *buf_len
+	, u8 path_sel_proto, u8 path_sel_metric, u8 congest_ctl_mode, u8 sync_method, u8 auth_proto
+	, u8 num_of_peerings, bool cto_mgate, bool cto_as
+	, bool accept_peerings, bool mcca_sup, bool mcca_en, bool forwarding
+	, bool mbca_en, bool tbtt_adj, bool ps_level)
+{
+
+	u8 conf[7] = {0};
+
+	SET_MESH_CONF_ELE_PATH_SEL_PROTO_ID(conf, path_sel_proto);
+	SET_MESH_CONF_ELE_PATH_SEL_METRIC_ID(conf, path_sel_metric);
+	SET_MESH_CONF_ELE_CONGEST_CTRL_MODE_ID(conf, congest_ctl_mode);
+	SET_MESH_CONF_ELE_SYNC_METHOD_ID(conf, sync_method);
+	SET_MESH_CONF_ELE_AUTH_PROTO_ID(conf, auth_proto);
+
+	SET_MESH_CONF_ELE_CTO_MGATE(conf, cto_mgate);
+	SET_MESH_CONF_ELE_NUM_OF_PEERINGS(conf, num_of_peerings);
+	SET_MESH_CONF_ELE_CTO_AS(conf, cto_as);
+
+	SET_MESH_CONF_ELE_ACCEPT_PEERINGS(conf, accept_peerings);
+	SET_MESH_CONF_ELE_MCCA_SUP(conf, mcca_sup);
+	SET_MESH_CONF_ELE_MCCA_EN(conf, mcca_en);
+	SET_MESH_CONF_ELE_FORWARDING(conf, forwarding);
+	SET_MESH_CONF_ELE_MBCA_EN(conf, mbca_en);
+	SET_MESH_CONF_ELE_TBTT_ADJ(conf, tbtt_adj);
+	SET_MESH_CONF_ELE_PS_LEVEL(conf, ps_level);
+
+	return rtw_set_ie(buf, WLAN_EID_MESH_CONFIG, 7, conf, buf_len);
+}
+
+inline u8 *rtw_set_ie_mpm(u8 *buf, u32 *buf_len
+	, u8 proto_id, u16 llid, u16 *plid, u16 *reason, u8 *chosen_pmk)
+{
+	u8 data[24] = {0};
+	u8 *pos = data;
+
+	RTW_PUT_LE16(pos, proto_id);
+	pos += 2;
+
+	RTW_PUT_LE16(pos, llid);
+	pos += 2;
+
+	if (plid) {
+		RTW_PUT_LE16(pos, *plid);
+		pos += 2;
+	}
+
+	if (reason) {
+		RTW_PUT_LE16(pos, *reason);
+		pos += 2;
+	}
+
+	if (chosen_pmk) {
+		_rtw_memcpy(pos, chosen_pmk, 16);
+		pos += 16;
+	}
+
+	return rtw_set_ie(buf, WLAN_EID_MPM, pos - data, data, buf_len);
+}
+
+bool rtw_bss_is_forwarding(WLAN_BSSID_EX *bss)
+{
+	u8 *ie;
+	int ie_len;
+	bool ret = 0;
+
+	ie = rtw_get_ie(BSS_EX_TLV_IES(bss), WLAN_EID_MESH_CONFIG, &ie_len,
+			BSS_EX_TLV_IES_LEN(bss));
+	if (!ie || ie_len != 7)
+		goto exit;
+
+	ret = GET_MESH_CONF_ELE_FORWARDING(ie + 2);
+
+exit:
+	return ret;
+}
+
+bool rtw_bss_is_cto_mgate(WLAN_BSSID_EX *bss)
+{
+	u8 *ie;
+	int ie_len;
+	bool ret = 0;
+
+	ie = rtw_get_ie(BSS_EX_TLV_IES(bss), WLAN_EID_MESH_CONFIG, &ie_len,
+			BSS_EX_TLV_IES_LEN(bss));
+	if (!ie || ie_len != 7)
+		goto exit;
+
+	ret = GET_MESH_CONF_ELE_CTO_MGATE(ie + 2);
+
+exit:
+	return ret;
+}
+
+int rtw_bss_is_same_mbss(WLAN_BSSID_EX *a, WLAN_BSSID_EX *b)
+{
+	int ret = 0;
+	u8 *a_mconf_ie, *b_mconf_ie;
+	sint a_mconf_ie_len, b_mconf_ie_len;
+
+	if (a->InfrastructureMode != Ndis802_11_mesh)
+		goto exit;
+	a_mconf_ie = rtw_get_ie(BSS_EX_TLV_IES(a), WLAN_EID_MESH_CONFIG, &a_mconf_ie_len, BSS_EX_TLV_IES_LEN(a));
+	if (!a_mconf_ie || a_mconf_ie_len != 7)
+		goto exit;
+	if (b->InfrastructureMode != Ndis802_11_mesh)
+		goto exit;
+	b_mconf_ie = rtw_get_ie(BSS_EX_TLV_IES(b), WLAN_EID_MESH_CONFIG, &b_mconf_ie_len, BSS_EX_TLV_IES_LEN(b));
+	if (!b_mconf_ie || b_mconf_ie_len != 7)
+		goto exit;
+
+	if (a->mesh_id.SsidLength != b->mesh_id.SsidLength
+		|| _rtw_memcmp(a->mesh_id.Ssid, b->mesh_id.Ssid, a->mesh_id.SsidLength) == _FALSE)
+		goto exit;
+
+	if (_rtw_memcmp(a_mconf_ie + 2, b_mconf_ie + 2, 5) == _FALSE)
+		goto exit;
+
+	ret = 1;
+
+exit:
+	return ret;
+}
+
+int rtw_bss_is_candidate_mesh_peer(WLAN_BSSID_EX *self, WLAN_BSSID_EX *target, u8 ch, u8 add_peer)
+{
+	int ret = 0;
+	u8 *mconf_ie;
+	sint mconf_ie_len;
+	int i, j;
+
+	if (!rtw_bss_is_same_mbss(self, target))
+		goto exit;
+
+	if (ch && self->Configuration.DSConfig != target->Configuration.DSConfig)
+		goto exit;
+
+	if (add_peer) {
+		/* Accept additional mesh peerings */
+		mconf_ie = rtw_get_ie(BSS_EX_TLV_IES(target), WLAN_EID_MESH_CONFIG, &mconf_ie_len, BSS_EX_TLV_IES_LEN(target));
+		if (!mconf_ie || mconf_ie_len != 7)
+			goto exit;
+		if (GET_MESH_CONF_ELE_ACCEPT_PEERINGS(mconf_ie + 2) == 0)
+			goto exit;
+	}
+
+	/* BSSBasicRateSet */
+	for (i = 0; i < NDIS_802_11_LENGTH_RATES_EX; i++) {
+		if (target->SupportedRates[i] == 0)
+			break;	
+		if (target->SupportedRates[i] & 0x80) {
+			u8 match = 0;
+
+			if (!ch) {
+				/* off-channel, check target with our hardcode capability */
+				if (target->Configuration.DSConfig > 14)
+					match = rtw_is_basic_rate_ofdm(target->SupportedRates[i]);
+				else
+					match = rtw_is_basic_rate_mix(target->SupportedRates[i]);
+			} else { 
+				for (j = 0; j < NDIS_802_11_LENGTH_RATES_EX; j++) {
+					if (self->SupportedRates[j] == 0)
+						break;
+					if (self->SupportedRates[j] == target->SupportedRates[i]) {
+						match = 1;
+						break;
+					}
+				}
+			}
+			if (!match)
+				goto exit;
+		}
+	}
+
+
+	/* BSSBasicMCSSet */
+
+	/* 802.1X connected to AS ? */
+
+	ret = 1;
+
+exit:
+	return ret;
+}
+
+void rtw_mesh_bss_peering_status(WLAN_BSSID_EX *bss, u8 *nop, u8 *accept)
+{
+	u8 *ie;
+	int ie_len;
+
+	if (nop)
+		*nop = 0;
+	if (accept)
+		*accept = 0;
+
+	ie = rtw_get_ie(BSS_EX_TLV_IES(bss), WLAN_EID_MESH_CONFIG, &ie_len,
+			BSS_EX_TLV_IES_LEN(bss));
+	if (!ie || ie_len != 7)
+		goto exit;
+
+	if (nop)
+		*nop = GET_MESH_CONF_ELE_NUM_OF_PEERINGS(ie + 2);
+	if (accept)
+		*accept = GET_MESH_CONF_ELE_ACCEPT_PEERINGS(ie + 2);
+
+exit:
+	return;
+}
+
+#if CONFIG_RTW_MESH_ACNODE_PREVENT
+void rtw_mesh_update_scanned_acnode_status(_adapter *adapter, struct wlan_network *scanned)
+{
+	bool acnode;
+	u8 nop, accept;
+
+	rtw_mesh_bss_peering_status(&scanned->network, &nop, &accept);
+
+	acnode = !nop && accept;
+
+	if (acnode && scanned->acnode_stime == 0) {
+		scanned->acnode_stime = rtw_get_current_time();
+		if (scanned->acnode_stime == 0)
+			scanned->acnode_stime++;
+	} else if (!acnode) {
+		scanned->acnode_stime = 0;
+		scanned->acnode_notify_etime = 0;
+	}
+}
+
+bool rtw_mesh_scanned_is_acnode_confirmed(_adapter *adapter, struct wlan_network *scanned)
+{
+	return scanned->acnode_stime
+			&& rtw_get_passing_time_ms(scanned->acnode_stime)
+				> adapter->mesh_cfg.peer_sel_policy.acnode_conf_timeout_ms;
+}
+
+static bool rtw_mesh_scanned_is_acnode_allow_notify(_adapter *adapter, struct wlan_network *scanned)
+{
+	return scanned->acnode_notify_etime
+			&& rtw_time_after(scanned->acnode_notify_etime, rtw_get_current_time());
+}
+
+bool rtw_mesh_acnode_prevent_allow_sacrifice(_adapter *adapter)
+{
+	struct rtw_mesh_cfg *mcfg = &adapter->mesh_cfg;
+	struct sta_priv *stapriv = &adapter->stapriv;
+	bool allow = 0;
+
+	if (!mcfg->peer_sel_policy.acnode_prevent
+		|| mcfg->max_peer_links <= 1
+		|| stapriv->asoc_list_cnt < mcfg->max_peer_links)
+		goto exit;
+
+#if CONFIG_RTW_MESH_CTO_MGATE_BLACKLIST
+	if (rtw_mesh_cto_mgate_required(adapter))
+		goto exit;
+#endif
+
+	allow = 1;
+
+exit:
+	return allow;
+}
+
+static bool rtw_mesh_acnode_candidate_exist(_adapter *adapter)
+{
+	struct rtw_mesh_cfg *mcfg = &adapter->mesh_cfg;
+	struct sta_priv *stapriv = &adapter->stapriv;
+	struct mlme_priv *mlme = &adapter->mlmepriv;
+	_queue *queue = &(mlme->scanned_queue);
+	_list *head, *list;
+	_irqL irqL;
+	struct wlan_network *scanned = NULL;
+	struct sta_info *sta = NULL;
+	bool need = 0;
+
+	_enter_critical_bh(&(mlme->scanned_queue.lock), &irqL);
+
+	head = get_list_head(queue);
+	list = get_next(head);
+	while (!rtw_end_of_queue_search(head, list)) {
+		scanned = LIST_CONTAINOR(list, struct wlan_network, list);
+		list = get_next(list);
+
+		if (rtw_get_passing_time_ms(scanned->last_scanned) < mcfg->peer_sel_policy.scanr_exp_ms
+			&& rtw_mesh_scanned_is_acnode_confirmed(adapter, scanned)
+			&& (!mcfg->rssi_threshold || mcfg->rssi_threshold <= scanned->network.Rssi)
+			#if CONFIG_RTW_MACADDR_ACL
+			&& rtw_access_ctrl(adapter, scanned->network.MacAddress) == _TRUE
+			#endif
+			&& rtw_bss_is_candidate_mesh_peer(&mlme->cur_network.network, &scanned->network, 1, 1)
+			#if CONFIG_RTW_MESH_PEER_BLACKLIST
+			&& !rtw_mesh_peer_blacklist_search(adapter, scanned->network.MacAddress)
+			#endif
+			#if CONFIG_RTW_MESH_CTO_MGATE_BLACKLIST
+			&& rtw_mesh_cto_mgate_network_filter(adapter, scanned)
+			#endif
+		) {
+			need = 1;
+			break;
+		}
+	}
+
+	_exit_critical_bh(&(mlme->scanned_queue.lock), &irqL);
+
+exit:
+	return need;
+}
+
+static int rtw_mesh_acnode_prevent_sacrifice_chk(_adapter *adapter, struct sta_info **sac, struct sta_info *com)
+{
+	struct rtw_mesh_cfg *mcfg = &adapter->mesh_cfg;
+	int updated = 0;
+
+	/*
+	* TODO: compare next_hop reference cnt of forwarding info
+	* don't sacrifice working next_hop or choose sta with least cnt
+	*/
+
+	if (*sac == NULL) {
+		updated = 1;
+		goto exit;
+	}
+
+#if CONFIG_RTW_MESH_CTO_MGATE_BLACKLIST
+	if (mcfg->peer_sel_policy.cto_mgate_require
+		&& !mcfg->dot11MeshGateAnnouncementProtocol
+	) {
+		if (IS_CTO_MGATE_CONF_TIMEOUT(com->plink)) {
+			if (!IS_CTO_MGATE_CONF_TIMEOUT((*sac)->plink)) {
+				/* blacklist > not blacklist */
+				updated = 1;
+				goto exit;
+			}
+		} else if (!IS_CTO_MGATE_CONF_DISABLED(com->plink)) {
+			if (IS_CTO_MGATE_CONF_DISABLED((*sac)->plink)) {
+				/* confirming > disabled */
+				updated = 1;
+				goto exit;
+			}
+		}
+	}
+#endif
+
+exit:
+	if (updated)
+		*sac = com;
+
+	return updated;
+}
+
+struct sta_info *_rtw_mesh_acnode_prevent_pick_sacrifice(_adapter *adapter)
+{
+	struct sta_priv *stapriv = &adapter->stapriv;
+	_list *head, *list;
+	struct sta_info *sta, *sacrifice = NULL;
+	u8 nop;
+
+	head = &stapriv->asoc_list;
+	list = get_next(head);
+	while (rtw_end_of_queue_search(head, list) == _FALSE) {
+		sta = LIST_CONTAINOR(list, struct sta_info, asoc_list);
+		list = get_next(list);
+
+		if (!sta->plink || !sta->plink->scanned) {
+			rtw_warn_on(1);
+			continue;
+		}
+
+		rtw_mesh_bss_peering_status(&sta->plink->scanned->network, &nop, NULL);
+		if (nop < 2)
+			continue;
+
+		rtw_mesh_acnode_prevent_sacrifice_chk(adapter, &sacrifice, sta);
+	}
+
+	return sacrifice;
+}
+
+struct sta_info *rtw_mesh_acnode_prevent_pick_sacrifice(_adapter *adapter)
+{
+	struct sta_priv *stapriv = &adapter->stapriv;
+	struct sta_info *sacrifice = NULL;
+
+	enter_critical_bh(&stapriv->asoc_list_lock);
+
+	sacrifice = _rtw_mesh_acnode_prevent_pick_sacrifice(adapter);
+
+	exit_critical_bh(&stapriv->asoc_list_lock);
+
+	return sacrifice;
+}
+
+static void rtw_mesh_acnode_rsvd_chk(_adapter *adapter)
+{
+	struct rtw_mesh_info *minfo = &adapter->mesh_info;
+	struct mesh_plink_pool *plink_ctl = &minfo->plink_ctl;
+	u8 acnode_rsvd = 0;
+
+	if (rtw_mesh_acnode_prevent_allow_sacrifice(adapter)
+		&& rtw_mesh_acnode_prevent_pick_sacrifice(adapter)
+		&& rtw_mesh_acnode_candidate_exist(adapter))
+		acnode_rsvd = 1;
+
+	if (plink_ctl->acnode_rsvd != acnode_rsvd) {
+		plink_ctl->acnode_rsvd = acnode_rsvd;
+		RTW_INFO(FUNC_ADPT_FMT" acnode_rsvd = %d\n", FUNC_ADPT_ARG(adapter), plink_ctl->acnode_rsvd);
+		update_beacon(adapter, WLAN_EID_MESH_CONFIG, NULL, 1);
+	}
+}
+
+static void rtw_mesh_acnode_set_notify_etime(_adapter *adapter, u8 *rframe_whdr)
+{
+	if (adapter->mesh_info.plink_ctl.acnode_rsvd) {
+		struct wlan_network *scanned = rtw_find_network(&adapter->mlmepriv.scanned_queue, get_addr2_ptr(rframe_whdr));
+
+		if (rtw_mesh_scanned_is_acnode_confirmed(adapter, scanned)) {
+			scanned->acnode_notify_etime = rtw_get_current_time()
+				+ rtw_ms_to_systime(adapter->mesh_cfg.peer_sel_policy.acnode_notify_timeout_ms);
+			if (scanned->acnode_notify_etime == 0)
+				scanned->acnode_notify_etime++;
+		}
+	}
+}
+
+void dump_mesh_acnode_prevent_settings(void *sel, _adapter *adapter)
+{
+	struct mesh_peer_sel_policy *peer_sel_policy = &adapter->mesh_cfg.peer_sel_policy;
+
+	RTW_PRINT_SEL(sel, "%-6s %-12s %-14s\n"
+		, "enable", "conf_timeout", "nofity_timeout");
+	RTW_PRINT_SEL(sel, "%6u %12u %14u\n"
+		, peer_sel_policy->acnode_prevent
+		, peer_sel_policy->acnode_conf_timeout_ms
+		, peer_sel_policy->acnode_notify_timeout_ms);
+}
+#endif /* CONFIG_RTW_MESH_ACNODE_PREVENT */
+
+#if CONFIG_RTW_MESH_PEER_BLACKLIST
+int rtw_mesh_peer_blacklist_add(_adapter *adapter, const u8 *addr)
+{
+	struct rtw_mesh_cfg *mcfg = &adapter->mesh_cfg;
+	struct rtw_mesh_info *minfo = &adapter->mesh_info;
+	struct mesh_plink_pool *plink_ctl = &minfo->plink_ctl;
+
+	return rtw_blacklist_add(&plink_ctl->peer_blacklist, addr
+		, mcfg->peer_sel_policy.peer_blacklist_timeout_ms);
+}
+
+int rtw_mesh_peer_blacklist_del(_adapter *adapter, const u8 *addr)
+{
+	struct rtw_mesh_info *minfo = &adapter->mesh_info;
+	struct mesh_plink_pool *plink_ctl = &minfo->plink_ctl;
+
+	return rtw_blacklist_del(&plink_ctl->peer_blacklist, addr);
+}
+
+int rtw_mesh_peer_blacklist_search(_adapter *adapter, const u8 *addr)
+{
+	struct rtw_mesh_info *minfo = &adapter->mesh_info;
+	struct mesh_plink_pool *plink_ctl = &minfo->plink_ctl;
+
+	return rtw_blacklist_search(&plink_ctl->peer_blacklist, addr);
+}
+
+void rtw_mesh_peer_blacklist_flush(_adapter *adapter)
+{
+	struct rtw_mesh_info *minfo = &adapter->mesh_info;
+	struct mesh_plink_pool *plink_ctl = &minfo->plink_ctl;
+
+	rtw_blacklist_flush(&plink_ctl->peer_blacklist);
+}
+
+void dump_mesh_peer_blacklist(void *sel, _adapter *adapter)
+{
+	struct rtw_mesh_info *minfo = &adapter->mesh_info;
+	struct mesh_plink_pool *plink_ctl = &minfo->plink_ctl;
+
+	dump_blacklist(sel, &plink_ctl->peer_blacklist, "blacklist");
+}
+
+void dump_mesh_peer_blacklist_settings(void *sel, _adapter *adapter)
+{
+	struct mesh_peer_sel_policy *peer_sel_policy = &adapter->mesh_cfg.peer_sel_policy;
+
+	RTW_PRINT_SEL(sel, "%-12s %-17s\n"
+		, "conf_timeout", "blacklist_timeout");
+	RTW_PRINT_SEL(sel, "%12u %17u\n"
+		, peer_sel_policy->peer_conf_timeout_ms
+		, peer_sel_policy->peer_blacklist_timeout_ms);
+}
+#endif /* CONFIG_RTW_MESH_PEER_BLACKLIST */
+
+#if CONFIG_RTW_MESH_CTO_MGATE_BLACKLIST
+u8 rtw_mesh_cto_mgate_required(_adapter *adapter)
+{
+	struct rtw_mesh_cfg *mcfg = &adapter->mesh_cfg;
+	struct mlme_ext_priv *mlmeext = &adapter->mlmeextpriv;
+
+	return mcfg->peer_sel_policy.cto_mgate_require
+		&& !rtw_bss_is_cto_mgate(&(mlmeext->mlmext_info.network));
+}
+
+u8 rtw_mesh_cto_mgate_network_filter(_adapter *adapter, struct wlan_network *scanned)
+{
+	struct rtw_mesh_cfg *mcfg = &adapter->mesh_cfg;
+	struct mlme_ext_priv *mlmeext = &adapter->mlmeextpriv;
+
+	return !rtw_mesh_cto_mgate_required(adapter)
+			|| (rtw_bss_is_cto_mgate(&scanned->network)
+				&& !rtw_mesh_cto_mgate_blacklist_search(adapter, scanned->network.MacAddress));
+}
+
+int rtw_mesh_cto_mgate_blacklist_add(_adapter *adapter, const u8 *addr)
+{
+	struct rtw_mesh_cfg *mcfg = &adapter->mesh_cfg;
+	struct rtw_mesh_info *minfo = &adapter->mesh_info;
+	struct mesh_plink_pool *plink_ctl = &minfo->plink_ctl;
+
+	return rtw_blacklist_add(&plink_ctl->cto_mgate_blacklist, addr
+		, mcfg->peer_sel_policy.cto_mgate_blacklist_timeout_ms);
+}
+
+int rtw_mesh_cto_mgate_blacklist_del(_adapter *adapter, const u8 *addr)
+{
+	struct rtw_mesh_info *minfo = &adapter->mesh_info;
+	struct mesh_plink_pool *plink_ctl = &minfo->plink_ctl;
+
+	return rtw_blacklist_del(&plink_ctl->cto_mgate_blacklist, addr);
+}
+
+int rtw_mesh_cto_mgate_blacklist_search(_adapter *adapter, const u8 *addr)
+{
+	struct rtw_mesh_info *minfo = &adapter->mesh_info;
+	struct mesh_plink_pool *plink_ctl = &minfo->plink_ctl;
+
+	return rtw_blacklist_search(&plink_ctl->cto_mgate_blacklist, addr);
+}
+
+void rtw_mesh_cto_mgate_blacklist_flush(_adapter *adapter)
+{
+	struct rtw_mesh_info *minfo = &adapter->mesh_info;
+	struct mesh_plink_pool *plink_ctl = &minfo->plink_ctl;
+
+	rtw_blacklist_flush(&plink_ctl->cto_mgate_blacklist);
+}
+
+void dump_mesh_cto_mgate_blacklist(void *sel, _adapter *adapter)
+{
+	struct rtw_mesh_info *minfo = &adapter->mesh_info;
+	struct mesh_plink_pool *plink_ctl = &minfo->plink_ctl;
+
+	dump_blacklist(sel, &plink_ctl->cto_mgate_blacklist, "blacklist");
+}
+
+void dump_mesh_cto_mgate_blacklist_settings(void *sel, _adapter *adapter)
+{
+	struct mesh_peer_sel_policy *peer_sel_policy = &adapter->mesh_cfg.peer_sel_policy;
+
+	RTW_PRINT_SEL(sel, "%-12s %-17s\n"
+		, "conf_timeout", "blacklist_timeout");
+	RTW_PRINT_SEL(sel, "%12u %17u\n"
+		, peer_sel_policy->cto_mgate_conf_timeout_ms
+		, peer_sel_policy->cto_mgate_blacklist_timeout_ms);
+}
+
+static void rtw_mesh_cto_mgate_blacklist_chk(_adapter *adapter)
+{
+	struct rtw_mesh_info *minfo = &adapter->mesh_info;
+	struct mesh_plink_pool *plink_ctl = &minfo->plink_ctl;
+	_queue *blist = &plink_ctl->cto_mgate_blacklist;
+	_list *list, *head;
+	struct blacklist_ent *ent = NULL;
+	struct wlan_network *scanned = NULL;
+
+	enter_critical_bh(&blist->lock);
+	head = &blist->queue;
+	list = get_next(head);
+	while (rtw_end_of_queue_search(head, list) == _FALSE) {
+		ent = LIST_CONTAINOR(list, struct blacklist_ent, list);
+		list = get_next(list);
+
+		if (rtw_time_after(rtw_get_current_time(), ent->exp_time)) {
+			rtw_list_delete(&ent->list);
+			rtw_mfree(ent, sizeof(struct blacklist_ent));
+			continue;
+		}
+
+		scanned = rtw_find_network(&adapter->mlmepriv.scanned_queue, ent->addr);
+		if (!scanned)
+			continue;
+
+		if (rtw_bss_is_forwarding(&scanned->network)) {
+			rtw_list_delete(&ent->list);
+			rtw_mfree(ent, sizeof(struct blacklist_ent));
+		}
+	}
+
+	exit_critical_bh(&blist->lock);
+}
+#endif /* CONFIG_RTW_MESH_CTO_MGATE_BLACKLIST */
+
+void rtw_chk_candidate_peer_notify(_adapter *adapter, struct wlan_network *scanned)
+{
+	struct rf_ctl_t *rfctl = adapter_to_rfctl(adapter);
+	struct mlme_priv *mlme = &adapter->mlmepriv;
+	struct rtw_mesh_info *minfo = &adapter->mesh_info;
+	struct rtw_mesh_cfg *mcfg = &adapter->mesh_cfg;
+	struct mesh_plink_pool *plink_ctl = &minfo->plink_ctl;
+	bool acnode = 0;
+
+	if (IS_CH_WAITING(rfctl) && !IS_UNDER_CAC(rfctl))
+		goto exit;
+
+	if (plink_ctl->num >= RTW_MESH_MAX_PEER_CANDIDATES)
+		goto exit;
+
+#if CONFIG_RTW_MESH_ACNODE_PREVENT
+	if (plink_ctl->acnode_rsvd) {
+		acnode = rtw_mesh_scanned_is_acnode_confirmed(adapter, scanned);
+		if (acnode && !rtw_mesh_scanned_is_acnode_allow_notify(adapter, scanned))
+			goto exit;
+	}
+#endif
+
+	/* wpa_supplicant's auto peer will initiate peering when candidate peer is reported without max_peer_links consideration */
+	if (plink_ctl->num >= mcfg->max_peer_links + acnode ? 1 : 0)
+		goto exit;
+
+	if (rtw_get_passing_time_ms(scanned->last_scanned) >= mcfg->peer_sel_policy.scanr_exp_ms
+		|| (mcfg->rssi_threshold && mcfg->rssi_threshold > scanned->network.Rssi)
+		|| !rtw_bss_is_candidate_mesh_peer(&mlme->cur_network.network, &scanned->network, 1, 1)
+		#if CONFIG_RTW_MACADDR_ACL
+		|| rtw_access_ctrl(adapter, scanned->network.MacAddress) == _FALSE
+		#endif
+		|| rtw_mesh_plink_get(adapter, scanned->network.MacAddress)
+		#if CONFIG_RTW_MESH_PEER_BLACKLIST
+		|| rtw_mesh_peer_blacklist_search(adapter, scanned->network.MacAddress)
+		#endif
+		#if CONFIG_RTW_MESH_CTO_MGATE_BLACKLIST
+		|| !rtw_mesh_cto_mgate_network_filter(adapter, scanned)
+		#endif
+	)
+		goto exit;
+
+#if CONFIG_RTW_MESH_ACNODE_PREVENT
+	if (acnode) {
+		scanned->acnode_notify_etime = 0;
+		RTW_INFO(FUNC_ADPT_FMT" acnode "MAC_FMT"\n"
+			, FUNC_ADPT_ARG(adapter), MAC_ARG(scanned->network.MacAddress));
+	}
+#endif
+
+#ifdef CONFIG_IOCTL_CFG80211
+	rtw_cfg80211_notify_new_peer_candidate(adapter->rtw_wdev
+		, scanned->network.MacAddress
+		, BSS_EX_TLV_IES(&scanned->network)
+		, BSS_EX_TLV_IES_LEN(&scanned->network)
+		, GFP_ATOMIC
+	);
+#endif
+
+exit:
+	return;
+}
+
+void rtw_mesh_peer_status_chk(_adapter *adapter)
+{
+	struct mlme_priv *mlme = &adapter->mlmepriv;
+	struct rtw_mesh_cfg *mcfg = &adapter->mesh_cfg;
+	struct rtw_mesh_info *minfo = &adapter->mesh_info;
+	struct mesh_plink_pool *plink_ctl = &minfo->plink_ctl;
+	struct mesh_plink_ent *plink;
+	_list *head, *list;
+	struct sta_info *sta = NULL;
+	struct sta_priv *stapriv = &adapter->stapriv;
+	int stainfo_offset;
+#if CONFIG_RTW_MESH_CTO_MGATE_BLACKLIST
+	u8 cto_mgate, forwarding, mgate;
+#endif
+	u8 flush;
+	s8 flush_list[NUM_STA];
+	u8 flush_num = 0;
+	int i;
+
+#if CONFIG_RTW_MESH_CTO_MGATE_BLACKLIST
+	if (rtw_mesh_cto_mgate_required(adapter)) {
+		/* active scan on operating channel */
+		issue_probereq_ex(adapter, &adapter->mlmepriv.cur_network.network.mesh_id, NULL, 0, 0, 0, 0);
+	}
+#endif
+
+	enter_critical_bh(&(plink_ctl->lock));
+
+	/* check established peers */
+	enter_critical_bh(&stapriv->asoc_list_lock);
+
+	head = &stapriv->asoc_list;
+	list = get_next(head);
+	while (rtw_end_of_queue_search(head, list) == _FALSE) {
+		sta = LIST_CONTAINOR(list, struct sta_info, asoc_list);
+		list = get_next(list);
+
+		if (!sta->plink || !sta->plink->scanned) {
+			rtw_warn_on(1);
+			continue;
+		}
+		plink = sta->plink;
+		flush = 0;
+
+		/* remove unsuitable peer */
+		if (!rtw_bss_is_candidate_mesh_peer(&mlme->cur_network.network, &plink->scanned->network, 1, 0)
+			#if CONFIG_RTW_MACADDR_ACL
+			|| rtw_access_ctrl(adapter, plink->addr) == _FALSE
+			#endif
+		) {
+			flush = 1;
+			goto flush_add;
+		}
+
+		#if CONFIG_RTW_MESH_CTO_MGATE_BLACKLIST
+		cto_mgate = rtw_bss_is_cto_mgate(&(plink->scanned->network));
+		forwarding = rtw_bss_is_forwarding(&(plink->scanned->network));
+		mgate = rtw_mesh_gate_search(minfo->mesh_paths, sta->cmn.mac_addr);
+
+		/* CTO_MGATE required, remove peer without CTO_MGATE */
+		if (rtw_mesh_cto_mgate_required(adapter) && !cto_mgate) {
+			flush = 1;
+			goto flush_add;
+		}
+
+		/* cto_mgate_conf status update */
+		if (IS_CTO_MGATE_CONF_DISABLED(plink)) {
+			if (cto_mgate && !forwarding && !mgate)
+				SET_CTO_MGATE_CONF_END_TIME(plink, mcfg->peer_sel_policy.cto_mgate_conf_timeout_ms);
+			else
+				rtw_mesh_cto_mgate_blacklist_del(adapter, sta->cmn.mac_addr);
+		} else {
+			/* cto_mgate_conf ongoing */
+			if (cto_mgate && !forwarding && !mgate) {
+				if (IS_CTO_MGATE_CONF_TIMEOUT(plink)) {
+					rtw_mesh_cto_mgate_blacklist_add(adapter, sta->cmn.mac_addr);
+
+					/* CTO_MGATE required, remove peering can't achieve CTO_MGATE */
+					if (rtw_mesh_cto_mgate_required(adapter)) {
+						flush = 1;
+						goto flush_add;
+					}	
+				}
+			} else {
+				SET_CTO_MGATE_CONF_DISABLED(plink);
+				rtw_mesh_cto_mgate_blacklist_del(adapter, sta->cmn.mac_addr);
+			}
+		}
+		#endif /* CONFIG_RTW_MESH_CTO_MGATE_BLACKLIST */
+
+flush_add:
+		if (flush) {
+			rtw_list_delete(&sta->asoc_list);
+			stapriv->asoc_list_cnt--;
+			STA_SET_MESH_PLINK(sta, NULL);
+
+			stainfo_offset = rtw_stainfo_offset(stapriv, sta);
+			if (stainfo_offset_valid(stainfo_offset))
+				flush_list[flush_num++] = stainfo_offset;
+			else
+				rtw_warn_on(1);
+		}
+	}
+
+	exit_critical_bh(&stapriv->asoc_list_lock);
+
+	/* check non-established peers */
+	for (i = 0; i < RTW_MESH_MAX_PEER_CANDIDATES; i++) {
+		plink = &plink_ctl->ent[i];
+		if (plink->valid != _TRUE || plink->plink_state == RTW_MESH_PLINK_ESTAB)
+			continue;
+
+		/* remove unsuitable peer */
+		if (!rtw_bss_is_candidate_mesh_peer(&mlme->cur_network.network, &plink->scanned->network, 1, 1)
+			#if CONFIG_RTW_MACADDR_ACL
+			|| rtw_access_ctrl(adapter, plink->addr) == _FALSE
+			#endif
+		) {
+			_rtw_mesh_expire_peer_ent(adapter, plink);
+			continue;
+		}
+
+		#if CONFIG_RTW_MESH_PEER_BLACKLIST
+		/* peer confirm check timeout, add to black list */
+		if (IS_PEER_CONF_TIMEOUT(plink)) {
+			rtw_mesh_peer_blacklist_add(adapter, plink->addr);
+			_rtw_mesh_expire_peer_ent(adapter, plink);
+		}
+		#endif
+	}
+
+	exit_critical_bh(&(plink_ctl->lock));
+
+	if (flush_num) {
+		u8 sta_addr[ETH_ALEN];
+		u8 updated = _FALSE;
+
+		for (i = 0; i < flush_num; i++) {
+			sta = rtw_get_stainfo_by_offset(stapriv, flush_list[i]);
+			_rtw_memcpy(sta_addr, sta->cmn.mac_addr, ETH_ALEN);
+
+			updated |= ap_free_sta(adapter, sta, _TRUE, WLAN_REASON_DEAUTH_LEAVING, _FALSE);
+			rtw_mesh_expire_peer(adapter, sta_addr);
+		}
+
+		associated_clients_update(adapter, updated, STA_INFO_UPDATE_ALL);
+	}
+
+#if CONFIG_RTW_MESH_CTO_MGATE_BLACKLIST
+	/* loop cto_mgate_blacklist to remove ent according to scan_r */
+	rtw_mesh_cto_mgate_blacklist_chk(adapter);
+#endif
+
+#if CONFIG_RTW_MESH_ACNODE_PREVENT
+	rtw_mesh_acnode_rsvd_chk(adapter);
+#endif
+
+	return;
+}
+
+#if CONFIG_RTW_MESH_OFFCH_CAND
+static u8 rtw_mesh_offch_cto_mgate_required(_adapter *adapter)
+{
+#if CONFIG_RTW_MESH_CTO_MGATE_BLACKLIST
+	struct rtw_mesh_cfg *mcfg = &adapter->mesh_cfg;
+	struct mlme_priv *mlme = &adapter->mlmepriv;
+	_queue *queue = &(mlme->scanned_queue);
+	_list *head, *pos;
+	struct wlan_network *scanned = NULL;
+	u8 ret = 0;
+
+	if (!rtw_mesh_cto_mgate_required(adapter))
+		goto exit;
+
+	enter_critical_bh(&(mlme->scanned_queue.lock));
+
+	head = get_list_head(queue);
+	pos = get_next(head);
+	while (!rtw_end_of_queue_search(head, pos)) {
+		scanned = LIST_CONTAINOR(pos, struct wlan_network, list);
+
+		if (rtw_get_passing_time_ms(scanned->last_scanned) < mcfg->peer_sel_policy.scanr_exp_ms
+			&& (!mcfg->rssi_threshold || mcfg->rssi_threshold <= scanned->network.Rssi)
+			#if CONFIG_RTW_MACADDR_ACL
+			&& rtw_access_ctrl(adapter, scanned->network.MacAddress) == _TRUE
+			#endif
+			&& rtw_bss_is_candidate_mesh_peer(&mlme->cur_network.network, &scanned->network, 1, 1)
+			&& rtw_bss_is_cto_mgate(&scanned->network)
+			#if CONFIG_RTW_MESH_PEER_BLACKLIST
+			&& !rtw_mesh_peer_blacklist_search(adapter, scanned->network.MacAddress)
+			#endif
+			&& !rtw_mesh_cto_mgate_blacklist_search(adapter, scanned->network.MacAddress)
+		)
+			break;
+
+		pos = get_next(pos);
+	}
+
+	if (rtw_end_of_queue_search(head, pos))
+		ret = 1;
+
+	exit_critical_bh(&(mlme->scanned_queue.lock));
+
+exit:
+	return ret;
+#else
+	return 0;
+#endif /* CONFIG_RTW_MESH_CTO_MGATE_BLACKLIST */
+}
+
+u8 rtw_mesh_offch_candidate_accepted(_adapter *adapter)
+{
+	struct rtw_mesh_info *minfo = &adapter->mesh_info;
+	struct mesh_plink_pool *plink_ctl = &minfo->plink_ctl;
+	u8 ret = 0;
+
+	if (!adapter->mesh_cfg.peer_sel_policy.offch_cand)
+		goto exit;
+
+	ret = MLME_IS_MESH(adapter) && MLME_IS_ASOC(adapter)
+		&& (!plink_ctl->num || rtw_mesh_offch_cto_mgate_required(adapter))
+		;
+
+#ifdef CONFIG_CONCURRENT_MODE
+	if (ret) {
+		struct mi_state mstate_no_self;
+
+		rtw_mi_status_no_self(adapter, &mstate_no_self);
+		if (MSTATE_STA_LD_NUM(&mstate_no_self))
+			ret = 0;
+	}
+#endif
+
+exit:
+	return ret;
+}
+
+/*
+ * this function is called under off channel candidate is required 
+ * the channel with maximum candidate count is selected
+*/
+u8 rtw_mesh_select_operating_ch(_adapter *adapter)
+{
+	struct rf_ctl_t *rfctl = adapter_to_rfctl(adapter);
+	struct rtw_mesh_cfg *mcfg = &adapter->mesh_cfg;
+	struct mlme_priv *mlme = &adapter->mlmepriv;
+	_queue *queue = &(mlme->scanned_queue);
+	_list *head, *pos;
+	_irqL irqL;
+	struct wlan_network *scanned = NULL;
+	int i;
+	/* statistics for candidate accept peering */
+	u8 cand_ap_cnt[MAX_CHANNEL_NUM] = {0};
+	u8 max_cand_ap_ch = 0;
+	u8 max_cand_ap_cnt = 0;
+	/* statistics for candidate including not accept peering */
+	u8 cand_cnt[MAX_CHANNEL_NUM] = {0};
+	u8 max_cand_ch = 0;
+	u8 max_cand_cnt = 0;
+
+	_enter_critical_bh(&(mlme->scanned_queue.lock), &irqL);
+
+	head = get_list_head(queue);
+	pos = get_next(head);
+	while (!rtw_end_of_queue_search(head, pos)) {
+		scanned = LIST_CONTAINOR(pos, struct wlan_network, list);
+		pos = get_next(pos);
+
+		if (rtw_get_passing_time_ms(scanned->last_scanned) < mcfg->peer_sel_policy.scanr_exp_ms
+			&& (!mcfg->rssi_threshold || mcfg->rssi_threshold <= scanned->network.Rssi)
+			#if CONFIG_RTW_MACADDR_ACL
+			&& rtw_access_ctrl(adapter, scanned->network.MacAddress) == _TRUE
+			#endif
+			&& rtw_bss_is_candidate_mesh_peer(&mlme->cur_network.network, &scanned->network, 0, 0)
+			#if CONFIG_RTW_MESH_PEER_BLACKLIST
+			&& !rtw_mesh_peer_blacklist_search(adapter, scanned->network.MacAddress)
+			#endif
+			#if CONFIG_RTW_MESH_CTO_MGATE_BLACKLIST
+			&& rtw_mesh_cto_mgate_network_filter(adapter, scanned)
+			#endif
+		) {
+			int ch_set_idx = rtw_chset_search_ch(rfctl->channel_set, scanned->network.Configuration.DSConfig);
+
+			if (ch_set_idx >= 0
+				&& !CH_IS_NON_OCP(&rfctl->channel_set[ch_set_idx])
+			) {
+				u8 nop, accept;
+
+				rtw_mesh_bss_peering_status(&scanned->network, &nop, &accept);
+				cand_cnt[ch_set_idx]++;
+				if (max_cand_cnt < cand_cnt[ch_set_idx]) {
+					max_cand_cnt = cand_cnt[ch_set_idx];
+					max_cand_ch = rfctl->channel_set[ch_set_idx].ChannelNum;
+				}
+				if (accept) {
+					cand_ap_cnt[ch_set_idx]++;
+					if (max_cand_ap_cnt < cand_ap_cnt[ch_set_idx]) {
+						max_cand_ap_cnt = cand_ap_cnt[ch_set_idx];
+						max_cand_ap_ch = rfctl->channel_set[ch_set_idx].ChannelNum;
+					}
+				}
+			}
+		}
+	}
+
+	_exit_critical_bh(&(mlme->scanned_queue.lock), &irqL);
+
+	return max_cand_ap_ch ? max_cand_ap_ch : max_cand_ch;
+}
+
+void dump_mesh_offch_cand_settings(void *sel, _adapter *adapter)
+{
+	struct mesh_peer_sel_policy *peer_sel_policy = &adapter->mesh_cfg.peer_sel_policy;
+
+	RTW_PRINT_SEL(sel, "%-6s %-11s\n"
+		, "enable", "find_int_ms");
+	RTW_PRINT_SEL(sel, "%6u %11u\n"
+		, peer_sel_policy->offch_cand, peer_sel_policy->offch_find_int_ms);
+}
+#endif /* CONFIG_RTW_MESH_OFFCH_CAND */
+
+void dump_mesh_peer_sel_policy(void *sel, _adapter *adapter)
+{
+	struct mesh_peer_sel_policy *peer_sel_policy = &adapter->mesh_cfg.peer_sel_policy;
+
+	RTW_PRINT_SEL(sel, "%-12s\n", "scanr_exp_ms");
+	RTW_PRINT_SEL(sel, "%12u\n", peer_sel_policy->scanr_exp_ms);
+}
+
+void dump_mesh_networks(void *sel, _adapter *adapter)
+{
+#if CONFIG_RTW_MESH_ACNODE_PREVENT
+#define NSTATE_TITLE_FMT_ACN " %-5s"
+#define NSTATE_VALUE_FMT_ACN " %5d"
+#define NSTATE_TITLE_ARG_ACN , "acn"
+#define NSTATE_VALUE_ARG_ACN , (acn_ms < 99999 ? acn_ms : 99999)
+#else
+#define NSTATE_TITLE_FMT_ACN ""
+#define NSTATE_VALUE_FMT_ACN ""
+#define NSTATE_TITLE_ARG_ACN
+#define NSTATE_VALUE_ARG_ACN
+#endif
+
+	struct mlme_priv *mlme = &(adapter->mlmepriv);
+	_queue *queue = &(mlme->scanned_queue);
+	struct wlan_network	*network;
+	_list *list, *head;
+	u8 same_mbss;
+	u8 candidate;
+	struct mesh_plink_ent *plink;
+	u8 blocked;
+	u8 established;
+	s32 age_ms;
+#if CONFIG_RTW_MESH_ACNODE_PREVENT
+	s32 acn_ms;
+#endif
+	u8 *mesh_conf_ie;
+	sint mesh_conf_ie_len;
+	struct wlan_network **mesh_networks;
+	u8 mesh_network_cnt = 0;
+	int i;
+
+	mesh_networks = rtw_zvmalloc(mlme->max_bss_cnt * sizeof(struct wlan_network *));
+	if (!mesh_networks)
+		return;
+
+	enter_critical_bh(&queue->lock);
+	head = get_list_head(queue);
+	list = get_next(head);
+
+	while (rtw_end_of_queue_search(head, list) == _FALSE) {
+		network = LIST_CONTAINOR(list, struct wlan_network, list);
+		list = get_next(list);
+
+		if (network->network.InfrastructureMode != Ndis802_11_mesh)
+			continue;
+
+		mesh_conf_ie = rtw_get_ie(BSS_EX_TLV_IES(&network->network), WLAN_EID_MESH_CONFIG
+			, &mesh_conf_ie_len, BSS_EX_TLV_IES_LEN(&network->network));
+		if (!mesh_conf_ie || mesh_conf_ie_len != 7)
+			continue;
+
+		mesh_networks[mesh_network_cnt++] = network;
+	}
+
+	exit_critical_bh(&queue->lock);
+
+	RTW_PRINT_SEL(sel, "  %-17s %-3s %-4s %-5s %-32s %-3s %-3s %-3s"
+		NSTATE_TITLE_FMT_ACN
+		"\n"
+		, "bssid", "ch", "rssi", "age", "mesh_id", "nop", "fwd", "cto"
+		NSTATE_TITLE_ARG_ACN
+	);
+
+	for (i = 0; i < mesh_network_cnt; i++) {
+		network = mesh_networks[i];
+
+		if (network->network.InfrastructureMode != Ndis802_11_mesh)
+			continue;
+
+		mesh_conf_ie = rtw_get_ie(BSS_EX_TLV_IES(&network->network), WLAN_EID_MESH_CONFIG
+			, &mesh_conf_ie_len, BSS_EX_TLV_IES_LEN(&network->network));
+		if (!mesh_conf_ie || mesh_conf_ie_len != 7)
+			continue;
+
+		age_ms = rtw_get_passing_time_ms(network->last_scanned);
+		#if CONFIG_RTW_MESH_ACNODE_PREVENT
+		if (network->acnode_stime == 0)
+			acn_ms = 0;
+		else
+			acn_ms = rtw_get_passing_time_ms(network->acnode_stime);
+		#endif
+		same_mbss = 0;
+		candidate = 0;
+		plink = NULL;
+		blocked = 0;
+		established = 0;
+
+		if (MLME_IS_MESH(adapter) && MLME_IS_ASOC(adapter)) {
+			plink = rtw_mesh_plink_get(adapter, network->network.MacAddress);
+			if (plink && plink->plink_state == RTW_MESH_PLINK_ESTAB)
+				established = 1;
+			else if (plink && plink->plink_state == RTW_MESH_PLINK_BLOCKED)
+				blocked = 1;
+			else if (plink)
+				;
+			else if (rtw_bss_is_candidate_mesh_peer(&mlme->cur_network.network, &network->network, 0, 1))
+				candidate = 1;
+			else if (rtw_bss_is_same_mbss(&mlme->cur_network.network, &network->network))
+				same_mbss = 1;
+		}
+
+		RTW_PRINT_SEL(sel, "%c "MAC_FMT" %3d %4ld %5d %-32s %c%2u %3u %c%c "
+			NSTATE_VALUE_FMT_ACN
+			"\n"
+			, established ? 'E' : (blocked ? 'B' : (plink ? 'N' : (candidate ? 'C' : (same_mbss ? 'S' : ' '))))
+			, MAC_ARG(network->network.MacAddress)
+			, network->network.Configuration.DSConfig
+			, network->network.Rssi
+			, age_ms < 99999 ? age_ms : 99999
+			, network->network.mesh_id.Ssid
+			, GET_MESH_CONF_ELE_ACCEPT_PEERINGS(mesh_conf_ie + 2) ? '+' : ' '
+			, GET_MESH_CONF_ELE_NUM_OF_PEERINGS(mesh_conf_ie + 2)
+			, GET_MESH_CONF_ELE_FORWARDING(mesh_conf_ie + 2)
+			, GET_MESH_CONF_ELE_CTO_MGATE(mesh_conf_ie + 2) ? 'G' : ' '
+			, GET_MESH_CONF_ELE_CTO_AS(mesh_conf_ie + 2) ? 'A' : ' '
+			NSTATE_VALUE_ARG_ACN
+		);
+	}
+
+	rtw_vmfree(mesh_networks, mlme->max_bss_cnt * sizeof(struct wlan_network *));
+}
+
+void rtw_mesh_adjust_chbw(u8 req_ch, u8 *req_bw, u8 *req_offset)
+{
+	if (req_ch >= 5 && req_ch <= 9) {
+		/* prevent secondary channel offset mismatch */
+		if (*req_bw > CHANNEL_WIDTH_20) {
+			*req_bw = CHANNEL_WIDTH_20;
+			*req_offset = HAL_PRIME_CHNL_OFFSET_DONT_CARE;
+		}
+	}
+}
+
+int rtw_sae_check_frames(_adapter *adapter, const u8 *buf, u32 len, u8 tx)
+{
+	const u8 *frame_body = buf + sizeof(struct rtw_ieee80211_hdr_3addr);
+	u16 alg;
+	u16 seq;
+	u16 status;
+	int ret = 0;
+
+	alg = RTW_GET_LE16(frame_body);
+	if (alg != 3)
+		goto exit;
+
+	seq = RTW_GET_LE16(frame_body + 2);
+	status = RTW_GET_LE16(frame_body + 4);
+
+	RTW_INFO("RTW_%s:AUTH alg:0x%04x, seq:0x%04x, status:0x%04x\n"
+		, (tx == _TRUE) ? "Tx" : "Rx", alg, seq, status);
+
+	ret = 1;
+
+#if CONFIG_RTW_MESH_PEER_BLACKLIST
+	if (tx && seq == 1)
+		rtw_mesh_plink_set_peer_conf_timeout(adapter, GetAddr1Ptr(buf));
+#endif
+
+exit:
+	return ret;
+}
+
+#if CONFIG_RTW_MPM_TX_IES_SYNC_BSS
+#ifdef CONFIG_RTW_MESH_AEK
+static int rtw_mpm_ampe_dec(_adapter *adapter, struct mesh_plink_ent *plink
+	, u8 *fhead, size_t flen, u8* fbody, u8 *mic_ie, u8 *ampe_buf)
+{	
+	int ret = _FAIL, verify_ret;
+	const u8 *aad[] = {adapter_mac_addr(adapter), plink->addr, fbody};
+	const size_t aad_len[] = {ETH_ALEN, ETH_ALEN, mic_ie - fbody};
+	u8 *iv_crypt;
+	size_t iv_crypt_len = flen - (mic_ie + 2 - fhead);
+
+	iv_crypt = rtw_malloc(iv_crypt_len);
+	if (!iv_crypt)
+		goto exit;
+
+	_rtw_memcpy(iv_crypt, mic_ie + 2, iv_crypt_len);
+
+	verify_ret = aes_siv_decrypt(plink->aek, iv_crypt, iv_crypt_len
+		, 3, aad, aad_len, ampe_buf);
+
+	rtw_mfree(iv_crypt, iv_crypt_len);
+
+	if (verify_ret) {
+		RTW_WARN("verify error, aek_valid=%u\n", plink->aek_valid);
+		goto exit;
+	} else if (*ampe_buf != WLAN_EID_AMPE) {
+		RTW_WARN("plaintext is not AMPE IE\n");
+		goto exit;
+	} else if (AES_BLOCK_SIZE + 2 + *(ampe_buf + 1) > iv_crypt_len) {
+		RTW_WARN("plaintext AMPE IE length is not valid\n");
+		goto exit;
+	}
+
+	ret = _SUCCESS;
+
+exit:
+	return ret;
+}
+
+static int rtw_mpm_ampe_enc(_adapter *adapter, struct mesh_plink_ent *plink
+	, u8* fbody, u8 *mic_ie, u8 *ampe_buf, bool inverse)
+{
+	int ret = _FAIL, protect_ret;
+	const u8 *aad[3];
+	const size_t aad_len[3] = {ETH_ALEN, ETH_ALEN, mic_ie - fbody};
+	u8 *ampe_ie;
+	size_t ampe_ie_len = *(ampe_buf + 1) + 2; /* including id & len */
+
+	if (inverse) {
+		aad[0] = plink->addr;
+		aad[1] = adapter_mac_addr(adapter);
+	} else {
+		aad[0] = adapter_mac_addr(adapter);
+		aad[1] = plink->addr;
+	}
+	aad[2] = fbody;
+
+	ampe_ie = rtw_malloc(ampe_ie_len);
+	if (!ampe_ie)
+		goto exit;
+
+	_rtw_memcpy(ampe_ie, ampe_buf, ampe_ie_len);
+
+	protect_ret = aes_siv_encrypt(plink->aek, ampe_ie, ampe_ie_len
+		, 3, aad, aad_len, mic_ie + 2);
+
+	rtw_mfree(ampe_ie, ampe_ie_len);
+
+	if (protect_ret) {
+		RTW_WARN("protect error, aek_valid=%u\n", plink->aek_valid);
+		goto exit;
+	}
+
+	ret = _SUCCESS;
+
+exit:
+	return ret;
+}
+#endif /* CONFIG_RTW_MESH_AEK */
+
+static int rtw_mpm_tx_ies_sync_bss(_adapter *adapter, struct mesh_plink_ent *plink
+	, u8 *fhead, size_t flen, u8* fbody, u8 tlv_ies_offset, u8 *mpm_ie, u8 *mic_ie
+	, u8 **nbuf, size_t *nlen)
+{
+	int ret = _FAIL;
+	struct mlme_priv *mlme = &(adapter->mlmepriv);
+	struct mlme_ext_priv *mlmeext = &adapter->mlmeextpriv;
+	struct mlme_ext_info *mlmeinfo = &(mlmeext->mlmext_info);
+	WLAN_BSSID_EX *network = &(mlmeinfo->network);
+	uint left;
+	u8 *pos;
+
+	uint mpm_ielen = *(mpm_ie + 1);
+	u8 *fpos;
+	u8 *new_buf = NULL;
+	size_t new_len = 0;
+
+	u8 *new_fhead;
+	size_t new_flen;
+	u8 *new_fbody;
+	u8 *new_mic_ie;
+
+#ifdef CONFIG_RTW_MESH_AEK
+	u8 *ampe_buf = NULL;
+	size_t ampe_buf_len = 0;
+
+	/* decode */
+	if (mic_ie) {
+		ampe_buf_len = flen - (mic_ie + 2 + AES_BLOCK_SIZE - fhead);
+		ampe_buf = rtw_malloc(ampe_buf_len);
+		if (!ampe_buf)
+			goto exit;
+
+		if (rtw_mpm_ampe_dec(adapter, plink, fhead, flen, fbody, mic_ie, ampe_buf) != _SUCCESS)
+			goto exit;
+
+		if (*(ampe_buf + 1) >= 68) {
+			_rtw_memcpy(plink->sel_pcs, ampe_buf + 2, 4);
+			_rtw_memcpy(plink->l_nonce, ampe_buf + 6, 32);
+			_rtw_memcpy(plink->p_nonce, ampe_buf + 38, 32);
+		}
+	}
+#endif
+
+	/* count for new frame length  */
+	new_len = sizeof(struct rtw_ieee80211_hdr_3addr) + tlv_ies_offset;
+	left = BSS_EX_TLV_IES_LEN(network);
+	pos = BSS_EX_TLV_IES(network);
+	while (left >= 2) {
+		u8 id, elen;
+	
+		id = *pos++;
+		elen = *pos++;
+		left -= 2;
+
+		if (elen > left)
+			break;
+
+		switch (id) {
+		case WLAN_EID_SSID:
+		case WLAN_EID_DS_PARAMS:
+		case WLAN_EID_TIM:
+			break;
+		default:
+			new_len += 2 + elen;
+		}
+
+		left -= elen;
+		pos += elen;
+	}
+	new_len += mpm_ielen + 2;
+	if (mic_ie)
+		new_len += AES_BLOCK_SIZE + 2 + ampe_buf_len;
+
+	/* alloc new frame */
+	new_buf = rtw_malloc(new_len);
+	if (!new_buf) {
+		rtw_warn_on(1);
+		goto exit;
+	}
+
+	/* build new frame  */
+	_rtw_memcpy(new_buf, fhead, sizeof(struct rtw_ieee80211_hdr_3addr) + tlv_ies_offset);
+	new_fhead = new_buf;
+	new_flen = new_len;
+	new_fbody = new_fhead + sizeof(struct rtw_ieee80211_hdr_3addr);
+
+	fpos = new_fbody + tlv_ies_offset;
+	left = BSS_EX_TLV_IES_LEN(network);
+	pos = BSS_EX_TLV_IES(network);
+	while (left >= 2) {
+		u8 id, elen;
+	
+		id = *pos++;
+		elen = *pos++;
+		left -= 2;
+
+		if (elen > left)
+			break;
+
+		switch (id) {
+		case WLAN_EID_SSID:
+		case WLAN_EID_DS_PARAMS:
+		case WLAN_EID_TIM:
+			break;
+		default:
+			fpos = rtw_set_ie(fpos, id, elen, pos, NULL);
+			if (id == WLAN_EID_MESH_CONFIG)
+				fpos = rtw_set_ie(fpos, WLAN_EID_MPM, mpm_ielen, mpm_ie + 2, NULL);
+		}
+
+		left -= elen;
+		pos += elen;
+	}
+	if (mic_ie) {
+		new_mic_ie = fpos;
+		*fpos++ = WLAN_EID_MIC;
+		*fpos++ = AES_BLOCK_SIZE;
+	}
+
+#ifdef CONFIG_RTW_MESH_AEK
+	/* encode */
+	if (mic_ie) {
+		int enc_ret = rtw_mpm_ampe_enc(adapter, plink, new_fbody, new_mic_ie, ampe_buf, 0);
+		if (enc_ret != _SUCCESS)
+			goto exit;
+	}
+#endif
+
+	*nlen = new_len;
+	*nbuf = new_buf;
+
+	ret = _SUCCESS;
+
+exit:
+	if (ret != _SUCCESS && new_buf)
+		rtw_mfree(new_buf, new_len);
+
+#ifdef CONFIG_RTW_MESH_AEK
+	if (ampe_buf)
+		rtw_mfree(ampe_buf, ampe_buf_len);
+#endif
+
+	return ret;
+}
+#endif /* CONFIG_RTW_MPM_TX_IES_SYNC_BSS */
+
+struct mpm_frame_info {
+	u8 *aid;
+	u16 aid_v;
+	u8 *pid;
+	u16 pid_v;
+	u8 *llid;
+	u16 llid_v;
+	u8 *plid;
+	u16 plid_v;
+	u8 *reason;
+	u16 reason_v;
+	u8 *chosen_pmk;
+};
+
+/*
+* pid:00000 llid:00000 chosen_pmk:0x00000000000000000000000000000000
+* aid:00000 pid:00000 llid:00000 plid:00000 chosen_pmk:0x00000000000000000000000000000000
+* pid:00000 llid:00000 plid:00000 reason:00000 chosen_pmk:0x00000000000000000000000000000000
+*/
+#define MPM_LOG_BUF_LEN 92 /* this length is limited for legal combination */
+static void rtw_mpm_info_msg(struct mpm_frame_info *mpm_info, u8 *mpm_log_buf)
+{
+	int cnt = 0;
+
+	if (mpm_info->aid) {
+		cnt += snprintf(mpm_log_buf + cnt, MPM_LOG_BUF_LEN - cnt - 1, "aid:%u ", mpm_info->aid_v);
+		if (cnt >= MPM_LOG_BUF_LEN - 1)
+			goto exit;
+	}
+	if (mpm_info->pid) {
+		cnt += snprintf(mpm_log_buf + cnt, MPM_LOG_BUF_LEN - cnt - 1, "pid:%u ", mpm_info->pid_v);
+		if (cnt >= MPM_LOG_BUF_LEN - 1)
+			goto exit;
+	}
+	if (mpm_info->llid) {
+		cnt += snprintf(mpm_log_buf + cnt, MPM_LOG_BUF_LEN - cnt - 1, "llid:%u ", mpm_info->llid_v);
+		if (cnt >= MPM_LOG_BUF_LEN - 1)
+			goto exit;
+	}
+	if (mpm_info->plid) {
+		cnt += snprintf(mpm_log_buf + cnt, MPM_LOG_BUF_LEN - cnt - 1, "plid:%u ", mpm_info->plid_v);
+		if (cnt >= MPM_LOG_BUF_LEN - 1)
+			goto exit;
+	}
+	if (mpm_info->reason) {
+		cnt += snprintf(mpm_log_buf + cnt, MPM_LOG_BUF_LEN - cnt - 1, "reason:%u ", mpm_info->reason_v);
+		if (cnt >= MPM_LOG_BUF_LEN - 1)
+			goto exit;
+	}
+	if (mpm_info->chosen_pmk) {
+		cnt += snprintf(mpm_log_buf + cnt, MPM_LOG_BUF_LEN - cnt - 1, "chosen_pmk:0x"KEY_FMT, KEY_ARG(mpm_info->chosen_pmk));
+		if (cnt >= MPM_LOG_BUF_LEN - 1)
+			goto exit;
+	}
+
+exit:
+	return;
+}
+
+static int rtw_mpm_check_frames(_adapter *adapter, u8 action, const u8 **buf, size_t *len, u8 tx)
+{
+	struct rtw_mesh_info *minfo = &adapter->mesh_info;
+	struct mesh_plink_pool *plink_ctl = &minfo->plink_ctl;
+	struct mesh_plink_ent *plink = NULL;
+	u8 *nbuf = NULL;
+	size_t nlen = 0;
+	u8 *fhead = (u8 *)*buf;
+	size_t flen = *len;
+	u8 *peer_addr = tx ? GetAddr1Ptr(fhead) : get_addr2_ptr(fhead);
+	u8 *frame_body = fhead + sizeof(struct rtw_ieee80211_hdr_3addr);
+	struct mpm_frame_info mpm_info;
+	u8 tlv_ies_offset;
+	u8 *mpm_ie = NULL;
+	uint mpm_ielen = 0;
+	u8 *mic_ie = NULL;
+	uint mic_ielen = 0;
+	int ret = 0;
+	u8 mpm_log_buf[MPM_LOG_BUF_LEN] = {0};
+
+	if (action == RTW_ACT_SELF_PROTECTED_MESH_OPEN)
+		tlv_ies_offset = 4;
+	else if (action == RTW_ACT_SELF_PROTECTED_MESH_CONF)
+		tlv_ies_offset = 6;
+	else if (action == RTW_ACT_SELF_PROTECTED_MESH_CLOSE)
+		tlv_ies_offset = 2;
+	else {
+		rtw_warn_on(1);
+		goto exit;
+	}
+
+	plink = rtw_mesh_plink_get(adapter, peer_addr);
+	if (!plink && (tx == _TRUE || action == RTW_ACT_SELF_PROTECTED_MESH_CONF)) {
+		/* warning message if no plink when: 1.TX all MPM or 2.RX CONF */
+		RTW_WARN("RTW_%s:%s without plink of "MAC_FMT"\n"
+			, (tx == _TRUE) ? "Tx" : "Rx", action_self_protected_str(action), MAC_ARG(peer_addr));
+		goto exit;
+	}
+
+	_rtw_memset(&mpm_info, 0, sizeof(struct mpm_frame_info));
+
+	if (action == RTW_ACT_SELF_PROTECTED_MESH_CONF) {
+		mpm_info.aid = (u8 *)frame_body + 4;
+		mpm_info.aid_v = RTW_GET_LE16(mpm_info.aid);
+	}
+
+	mpm_ie = rtw_get_ie(fhead + sizeof(struct rtw_ieee80211_hdr_3addr) + tlv_ies_offset
+		, WLAN_EID_MPM, &mpm_ielen
+		, flen - sizeof(struct rtw_ieee80211_hdr_3addr) - tlv_ies_offset);
+	if (!mpm_ie || mpm_ielen < 2 + 2)
+		goto exit;
+
+	mpm_info.pid = mpm_ie + 2;
+	mpm_info.pid_v = RTW_GET_LE16(mpm_info.pid);
+	mpm_info.llid = mpm_info.pid + 2;
+	mpm_info.llid_v = RTW_GET_LE16(mpm_info.llid);
+
+	switch (action) {
+	case RTW_ACT_SELF_PROTECTED_MESH_OPEN:
+		/* pid:2, llid:2, (chosen_pmk:16) */
+		if (mpm_info.pid_v == 0 && mpm_ielen == 4)
+			;
+		else if (mpm_info.pid_v == 1 && mpm_ielen == 20)
+			mpm_info.chosen_pmk = mpm_info.llid + 2;
+		else
+			goto exit;
+		break;
+	case RTW_ACT_SELF_PROTECTED_MESH_CONF:
+		/* pid:2, llid:2, plid:2, (chosen_pmk:16) */
+		mpm_info.plid = mpm_info.llid + 2;
+		mpm_info.plid_v = RTW_GET_LE16(mpm_info.plid);
+		if (mpm_info.pid_v == 0 && mpm_ielen == 6)
+			;
+		else if (mpm_info.pid_v == 1 && mpm_ielen == 22)
+			mpm_info.chosen_pmk = mpm_info.plid + 2;
+		else
+			goto exit;
+		break;
+	case RTW_ACT_SELF_PROTECTED_MESH_CLOSE:
+		/* pid:2, llid:2, (plid:2), reason:2, (chosen_pmk:16) */
+		if (mpm_info.pid_v == 0 && mpm_ielen == 6) {
+			/* MPM, without plid */
+			mpm_info.reason = mpm_info.llid + 2;
+			mpm_info.reason_v = RTW_GET_LE16(mpm_info.reason);
+		} else if (mpm_info.pid_v == 0 && mpm_ielen == 8) {
+			/* MPM, with plid */
+			mpm_info.plid = mpm_info.llid + 2;
+			mpm_info.plid_v = RTW_GET_LE16(mpm_info.plid);
+			mpm_info.reason = mpm_info.plid + 2;
+			mpm_info.reason_v = RTW_GET_LE16(mpm_info.reason);
+		} else if (mpm_info.pid_v == 1 && mpm_ielen == 22) {
+			/* AMPE, without plid */
+			mpm_info.reason = mpm_info.llid + 2;
+			mpm_info.reason_v = RTW_GET_LE16(mpm_info.reason);
+			mpm_info.chosen_pmk = mpm_info.reason + 2;
+		} else if (mpm_info.pid_v == 1 && mpm_ielen == 24) {
+			/* AMPE, with plid */
+			mpm_info.plid = mpm_info.llid + 2;
+			mpm_info.plid_v = RTW_GET_LE16(mpm_info.plid);
+			mpm_info.reason = mpm_info.plid + 2;
+			mpm_info.reason_v = RTW_GET_LE16(mpm_info.reason);
+			mpm_info.chosen_pmk = mpm_info.reason + 2;
+		} else
+			goto exit;
+		break;
+	};
+
+	if (mpm_info.pid_v == 1) {
+		mic_ie = rtw_get_ie(fhead + sizeof(struct rtw_ieee80211_hdr_3addr) + tlv_ies_offset
+			, WLAN_EID_MIC, &mic_ielen
+			, flen - sizeof(struct rtw_ieee80211_hdr_3addr) - tlv_ies_offset);
+		if (!mic_ie || mic_ielen != AES_BLOCK_SIZE)
+			goto exit;
+	}
+
+#if CONFIG_RTW_MPM_TX_IES_SYNC_BSS
+	if ((action == RTW_ACT_SELF_PROTECTED_MESH_OPEN || action == RTW_ACT_SELF_PROTECTED_MESH_CONF)
+		&& tx == _TRUE
+	) {
+#define DBG_RTW_MPM_TX_IES_SYNC_BSS 0
+
+		if (mpm_info.pid_v == 1 && (!plink || !MESH_PLINK_AEK_VALID(plink))) {
+			RTW_WARN("AEK not ready, IEs can't sync with BSS\n");
+			goto bypass_sync_bss;
+		}
+
+		if (DBG_RTW_MPM_TX_IES_SYNC_BSS) {
+			RTW_INFO(FUNC_ADPT_FMT" before:\n", FUNC_ADPT_ARG(adapter));
+			dump_ies(RTW_DBGDUMP
+				, fhead + sizeof(struct rtw_ieee80211_hdr_3addr) + tlv_ies_offset
+				, flen - sizeof(struct rtw_ieee80211_hdr_3addr) - tlv_ies_offset);
+		}
+
+		rtw_mpm_tx_ies_sync_bss(adapter, plink
+			, fhead, flen, frame_body, tlv_ies_offset, mpm_ie, mic_ie
+			, &nbuf, &nlen);
+		if (!nbuf)
+			goto exit;
+
+		/* update pointer & len for new frame */
+		fhead = nbuf;
+		flen = nlen;
+		frame_body = fhead + sizeof(struct rtw_ieee80211_hdr_3addr);
+		if (mpm_info.pid_v == 1) {
+			mic_ie = rtw_get_ie(fhead + sizeof(struct rtw_ieee80211_hdr_3addr) + tlv_ies_offset
+				, WLAN_EID_MIC, &mic_ielen
+				, flen - sizeof(struct rtw_ieee80211_hdr_3addr) - tlv_ies_offset);
+		}
+
+		if (DBG_RTW_MPM_TX_IES_SYNC_BSS) {
+			RTW_INFO(FUNC_ADPT_FMT" after:\n", FUNC_ADPT_ARG(adapter));
+			dump_ies(RTW_DBGDUMP
+				, fhead + sizeof(struct rtw_ieee80211_hdr_3addr) + tlv_ies_offset
+				, flen - sizeof(struct rtw_ieee80211_hdr_3addr) - tlv_ies_offset);
+		}
+	}
+bypass_sync_bss:
+#endif /* CONFIG_RTW_MPM_TX_IES_SYNC_BSS */
+
+	if (!plink)
+		goto mpm_log;
+
+#if CONFIG_RTW_MESH_PEER_BLACKLIST
+	if (action == RTW_ACT_SELF_PROTECTED_MESH_OPEN) {
+		if (tx)
+			rtw_mesh_plink_set_peer_conf_timeout(adapter, peer_addr);
+
+	} else
+#endif
+#if CONFIG_RTW_MESH_ACNODE_PREVENT
+	if (action == RTW_ACT_SELF_PROTECTED_MESH_CLOSE) {
+		if (tx && mpm_info.reason && mpm_info.reason_v == WLAN_REASON_MESH_MAX_PEERS) {
+			if (rtw_mesh_scanned_is_acnode_confirmed(adapter, plink->scanned)
+				&& rtw_mesh_acnode_prevent_allow_sacrifice(adapter)
+			) {
+				struct sta_info *sac = rtw_mesh_acnode_prevent_pick_sacrifice(adapter);
+
+				if (sac) {
+					struct sta_priv *stapriv = &adapter->stapriv;
+					_irqL irqL;
+					u8 sta_addr[ETH_ALEN];
+					u8 updated = _FALSE;
+
+					_enter_critical_bh(&stapriv->asoc_list_lock, &irqL);
+					if (!rtw_is_list_empty(&sac->asoc_list)) {
+						rtw_list_delete(&sac->asoc_list);
+						stapriv->asoc_list_cnt--;
+						STA_SET_MESH_PLINK(sac, NULL);
+					}
+					_exit_critical_bh(&stapriv->asoc_list_lock, &irqL);
+					RTW_INFO(FUNC_ADPT_FMT" sacrifice "MAC_FMT" for acnode\n"
+						, FUNC_ADPT_ARG(adapter), MAC_ARG(sac->cmn.mac_addr));
+
+					_rtw_memcpy(sta_addr, sac->cmn.mac_addr, ETH_ALEN);
+					updated = ap_free_sta(adapter, sac, 0, 0, 1);
+					rtw_mesh_expire_peer(stapriv->padapter, sta_addr);
+
+					associated_clients_update(adapter, updated, STA_INFO_UPDATE_ALL);
+				}
+			}
+		}
+	} else
+#endif
+	if (action == RTW_ACT_SELF_PROTECTED_MESH_CONF) {
+		_irqL irqL;
+		u8 *ies = NULL;
+		u16 ies_len = 0;
+
+		_enter_critical_bh(&(plink_ctl->lock), &irqL);
+
+		plink = _rtw_mesh_plink_get(adapter, peer_addr);
+		if (!plink)
+			goto release_plink_ctl;
+
+		if (tx == _FALSE) {
+			ies = plink->rx_conf_ies;
+			ies_len = plink->rx_conf_ies_len;
+			plink->rx_conf_ies = NULL;
+			plink->rx_conf_ies_len = 0;
+
+			plink->llid = mpm_info.plid_v;
+			plink->plid = mpm_info.llid_v;
+			plink->peer_aid = mpm_info.aid_v;
+			if (mpm_info.pid_v == 1)
+				_rtw_memcpy(plink->chosen_pmk, mpm_info.chosen_pmk, 16);
+		}
+		#ifdef CONFIG_RTW_MESH_DRIVER_AID
+		else {
+			ies = plink->tx_conf_ies;
+			ies_len = plink->tx_conf_ies_len;
+			plink->tx_conf_ies = NULL;
+			plink->tx_conf_ies_len = 0;
+		}
+		#endif
+
+		if (ies && ies_len)
+			rtw_mfree(ies, ies_len);
+
+		#ifndef CONFIG_RTW_MESH_DRIVER_AID
+		if (tx == _TRUE)
+			goto release_plink_ctl; /* no need to copy tx conf ies */
+		#endif
+
+		/* copy mesh confirm IEs */
+		if (mpm_info.pid_v == 1) /* not include MIC & encrypted AMPE */
+			ies_len = (mic_ie - fhead) - sizeof(struct rtw_ieee80211_hdr_3addr) - 2;
+		else
+			ies_len = flen - sizeof(struct rtw_ieee80211_hdr_3addr) - 2;
+
+		ies = rtw_zmalloc(ies_len);
+		if (ies) {
+			_rtw_memcpy(ies, fhead + sizeof(struct rtw_ieee80211_hdr_3addr) + 2, ies_len);
+			if (tx == _FALSE) {
+				plink->rx_conf_ies = ies;
+				plink->rx_conf_ies_len = ies_len;
+			}
+			#ifdef CONFIG_RTW_MESH_DRIVER_AID	
+			else {
+				plink->tx_conf_ies = ies;
+				plink->tx_conf_ies_len = ies_len;
+			}
+			#endif
+		}
+
+release_plink_ctl:
+		_exit_critical_bh(&(plink_ctl->lock), &irqL);
+	}
+
+mpm_log:
+	rtw_mpm_info_msg(&mpm_info, mpm_log_buf);
+	RTW_INFO("RTW_%s:%s %s\n"
+		, (tx == _TRUE) ? "Tx" : "Rx"
+		, action_self_protected_str(action)
+		, mpm_log_buf
+	);
+
+	ret = 1;
+
+exit:
+	if (nbuf) {
+		if (ret == 1) {
+			*buf = nbuf;
+			*len = nlen;
+		} else
+			rtw_mfree(nbuf, nlen);
+	}
+
+	return ret;
+}
+
+static int rtw_mesh_check_frames(_adapter *adapter, const u8 **buf, size_t *len, u8 tx)
+{
+	int is_mesh_frame = -1;
+	const u8 *frame_body;
+	u8 category, action;
+
+	frame_body = *buf + sizeof(struct rtw_ieee80211_hdr_3addr);
+	category = frame_body[0];
+
+	if (category == RTW_WLAN_CATEGORY_SELF_PROTECTED) {
+		action = frame_body[1];
+		switch (action) {
+		case RTW_ACT_SELF_PROTECTED_MESH_OPEN:
+		case RTW_ACT_SELF_PROTECTED_MESH_CONF:
+		case RTW_ACT_SELF_PROTECTED_MESH_CLOSE:
+			rtw_mpm_check_frames(adapter, action, buf, len, tx);
+			is_mesh_frame = action;
+			break;
+		case RTW_ACT_SELF_PROTECTED_MESH_GK_INFORM:
+		case RTW_ACT_SELF_PROTECTED_MESH_GK_ACK:
+			RTW_INFO("RTW_%s:%s\n", (tx == _TRUE) ? "Tx" : "Rx", action_self_protected_str(action));
+			is_mesh_frame = action;
+			break;
+		default:
+			break;
+		};
+	}
+
+exit:
+	return is_mesh_frame;
+}
+
+int rtw_mesh_check_frames_tx(_adapter *adapter, const u8 **buf, size_t *len)
+{
+	return rtw_mesh_check_frames(adapter, buf, len, _TRUE);
+}
+
+int rtw_mesh_check_frames_rx(_adapter *adapter, const u8 *buf, size_t len)
+{
+	return rtw_mesh_check_frames(adapter, &buf, &len, _FALSE);
+}
+
+int rtw_mesh_on_auth(_adapter *adapter, union recv_frame *rframe)
+{
+	u8 *whdr = rframe->u.hdr.rx_data;
+
+#if CONFIG_RTW_MACADDR_ACL
+	if (rtw_access_ctrl(adapter, get_addr2_ptr(whdr)) == _FALSE)
+		return _SUCCESS;
+#endif
+
+	if (!rtw_mesh_plink_get(adapter, get_addr2_ptr(whdr))) {
+		#if CONFIG_RTW_MESH_ACNODE_PREVENT
+		rtw_mesh_acnode_set_notify_etime(adapter, whdr);
+		#endif
+
+		if (adapter_to_rfctl(adapter)->offch_state == OFFCHS_NONE)
+			issue_probereq(adapter, &adapter->mlmepriv.cur_network.network.mesh_id, get_addr2_ptr(whdr));
+
+		/* only peer being added (checked by notify conditions) is allowed */
+		return _SUCCESS;
+	}
+
+	rtw_cfg80211_rx_mframe(adapter, rframe, NULL);
+	return _SUCCESS;
+}
+
+unsigned int on_action_self_protected(_adapter *adapter, union recv_frame *rframe)
+{
+	unsigned int ret = _FAIL;
+	struct sta_info *sta = NULL;
+	u8 *pframe = rframe->u.hdr.rx_data;
+	uint frame_len = rframe->u.hdr.len;
+	u8 *frame_body = (u8 *)(pframe + sizeof(struct rtw_ieee80211_hdr_3addr));
+	u8 category;
+	u8 action;
+
+	/* check RA matches or not */
+	if (!_rtw_memcmp(adapter_mac_addr(adapter), GetAddr1Ptr(pframe), ETH_ALEN))
+		goto exit;
+
+	category = frame_body[0];
+	if (category != RTW_WLAN_CATEGORY_SELF_PROTECTED)
+		goto exit;
+
+	action = frame_body[1];
+	switch (action) {
+	case RTW_ACT_SELF_PROTECTED_MESH_OPEN:
+	case RTW_ACT_SELF_PROTECTED_MESH_CONF:
+	case RTW_ACT_SELF_PROTECTED_MESH_CLOSE:
+	case RTW_ACT_SELF_PROTECTED_MESH_GK_INFORM:
+	case RTW_ACT_SELF_PROTECTED_MESH_GK_ACK:
+		if (!(MLME_IS_MESH(adapter) && MLME_IS_ASOC(adapter)))
+			goto exit;
+#ifdef CONFIG_IOCTL_CFG80211
+		#if CONFIG_RTW_MACADDR_ACL
+		if (rtw_access_ctrl(adapter, get_addr2_ptr(pframe)) == _FALSE)
+			goto exit;
+		#endif
+		#if CONFIG_RTW_MESH_CTO_MGATE_BLACKLIST
+		if (rtw_mesh_cto_mgate_required(adapter)
+			/* only peer being added (checked by notify conditions) is allowed */
+			&& !rtw_mesh_plink_get(adapter, get_addr2_ptr(pframe)))
+			goto exit;
+		#endif
+		rtw_cfg80211_rx_action(adapter, rframe, NULL);
+		ret = _SUCCESS;
+#endif /* CONFIG_IOCTL_CFG80211 */
+		break;
+	default:
+		break;
+	}
+
+exit:
+	return ret;
+}
+
+const u8 ae_to_mesh_ctrl_len[] = {
+	6,
+	12, /* MESH_FLAGS_AE_A4 */
+	18, /* MESH_FLAGS_AE_A5_A6 */
+	0,
+};
+
+unsigned int on_action_mesh(_adapter *adapter, union recv_frame *rframe)
+{
+	unsigned int ret = _FAIL;
+	struct sta_info *sta = NULL;
+	struct sta_priv *stapriv = &adapter->stapriv;
+	u8 *pframe = rframe->u.hdr.rx_data;
+	uint frame_len = rframe->u.hdr.len;
+	u8 *frame_body = (u8 *)(pframe + sizeof(struct rtw_ieee80211_hdr_3addr));
+	u8 category;
+	u8 action;
+
+	if (!MLME_IS_MESH(adapter))
+		goto exit;
+
+	/* check stainfo exist? */
+
+	category = frame_body[0];
+	if (category != RTW_WLAN_CATEGORY_MESH)
+		goto exit;
+
+	action = frame_body[1];
+	switch (action) {
+	case RTW_ACT_MESH_HWMP_PATH_SELECTION:
+		rtw_mesh_rx_path_sel_frame(adapter, rframe);
+		ret = _SUCCESS;
+		break;
+	default:
+		break;
+	}
+
+exit:
+	return ret;
+}
+
+bool rtw_mesh_update_bss_peering_status(_adapter *adapter, WLAN_BSSID_EX *bss)
+{
+	struct sta_priv *stapriv = &adapter->stapriv;
+	struct rtw_mesh_cfg *mcfg = &adapter->mesh_cfg;
+	struct rtw_mesh_info *minfo = &adapter->mesh_info;
+	struct mesh_plink_pool *plink_ctl = &minfo->plink_ctl;
+	u8 num_of_peerings = stapriv->asoc_list_cnt;
+	bool accept_peerings = stapriv->asoc_list_cnt < mcfg->max_peer_links;
+	u8 *ie;
+	int ie_len;
+	bool updated = 0;
+
+#if CONFIG_RTW_MESH_ACNODE_PREVENT
+	accept_peerings |= plink_ctl->acnode_rsvd;
+#endif
+
+	ie = rtw_get_ie(BSS_EX_TLV_IES(bss), WLAN_EID_MESH_CONFIG, &ie_len, BSS_EX_TLV_IES_LEN(bss));
+	if (!ie || ie_len != 7) {
+		rtw_warn_on(1);
+		goto exit;
+	}
+
+	if (GET_MESH_CONF_ELE_NUM_OF_PEERINGS(ie + 2) != num_of_peerings) {
+		SET_MESH_CONF_ELE_NUM_OF_PEERINGS(ie + 2, num_of_peerings);
+		updated = 1;
+	}
+
+	if (GET_MESH_CONF_ELE_ACCEPT_PEERINGS(ie + 2) != accept_peerings) {
+		SET_MESH_CONF_ELE_ACCEPT_PEERINGS(ie + 2, accept_peerings);
+		updated = 1;
+	}
+
+exit:
+	return updated;
+}
+
+bool rtw_mesh_update_bss_formation_info(_adapter *adapter, WLAN_BSSID_EX *bss)
+{
+	struct rtw_mesh_cfg *mcfg = &adapter->mesh_cfg;
+	struct rtw_mesh_info *minfo = &adapter->mesh_info;
+	u8 cto_mgate = (minfo->num_gates || mcfg->dot11MeshGateAnnouncementProtocol);
+	u8 cto_as = 0;
+	u8 *ie;
+	int ie_len;
+	bool updated = 0;
+
+	ie = rtw_get_ie(BSS_EX_TLV_IES(bss), WLAN_EID_MESH_CONFIG, &ie_len,
+			BSS_EX_TLV_IES_LEN(bss));
+	if (!ie || ie_len != 7) {
+		rtw_warn_on(1);
+		goto exit;
+	}
+
+	if (GET_MESH_CONF_ELE_CTO_MGATE(ie + 2) != cto_mgate) {
+		SET_MESH_CONF_ELE_CTO_MGATE(ie + 2, cto_mgate);
+		updated = 1;
+	}
+
+	if (GET_MESH_CONF_ELE_CTO_AS(ie + 2) != cto_as) {
+		SET_MESH_CONF_ELE_CTO_AS(ie + 2, cto_as);
+		updated = 1;
+	}
+
+exit:
+	return updated;
+}
+
+bool rtw_mesh_update_bss_forwarding_state(_adapter *adapter, WLAN_BSSID_EX *bss)
+{
+	struct rtw_mesh_cfg *mcfg = &adapter->mesh_cfg;
+	u8 forward = mcfg->dot11MeshForwarding;
+	u8 *ie;
+	int ie_len;
+	bool updated = 0;
+
+	ie = rtw_get_ie(BSS_EX_TLV_IES(bss), WLAN_EID_MESH_CONFIG, &ie_len,
+			BSS_EX_TLV_IES_LEN(bss));
+	if (!ie || ie_len != 7) {
+		rtw_warn_on(1);
+		goto exit;
+	}
+
+	if (GET_MESH_CONF_ELE_FORWARDING(ie + 2) != forward) {
+		SET_MESH_CONF_ELE_FORWARDING(ie + 2, forward);
+		updated = 1;
+	}
+
+exit:
+	return updated;
+}
+
+struct mesh_plink_ent *_rtw_mesh_plink_get(_adapter *adapter, const u8 *hwaddr)
+{
+	struct rtw_mesh_info *minfo = &adapter->mesh_info;
+	struct mesh_plink_pool *plink_ctl = &minfo->plink_ctl;
+	struct mesh_plink_ent *ent = NULL;
+	int i;
+
+	for (i = 0; i < RTW_MESH_MAX_PEER_CANDIDATES; i++) {
+		if (plink_ctl->ent[i].valid == _TRUE
+			&& _rtw_memcmp(plink_ctl->ent[i].addr, hwaddr, ETH_ALEN) == _TRUE
+		) {
+			ent = &plink_ctl->ent[i];
+			break;
+		}
+	}
+
+exit:
+	return ent;
+}
+
+struct mesh_plink_ent *rtw_mesh_plink_get(_adapter *adapter, const u8 *hwaddr)
+{
+	struct rtw_mesh_info *minfo = &adapter->mesh_info;
+	struct mesh_plink_pool *plink_ctl = &minfo->plink_ctl;
+	struct mesh_plink_ent *ent = NULL;
+	_irqL irqL;
+
+	_enter_critical_bh(&(plink_ctl->lock), &irqL);
+	ent = _rtw_mesh_plink_get(adapter, hwaddr);
+	_exit_critical_bh(&(plink_ctl->lock), &irqL);
+
+exit:
+	return ent;
+}
+
+struct mesh_plink_ent *rtw_mesh_plink_get_no_estab_by_idx(_adapter *adapter, u8 idx)
+{
+	struct rtw_mesh_info *minfo = &adapter->mesh_info;
+	struct mesh_plink_pool *plink_ctl = &minfo->plink_ctl;
+	struct mesh_plink_ent *ent = NULL;
+	int i, j = 0;
+	_irqL irqL;
+
+	_enter_critical_bh(&(plink_ctl->lock), &irqL);
+	for (i = 0; i < RTW_MESH_MAX_PEER_CANDIDATES; i++) {
+		if (plink_ctl->ent[i].valid == _TRUE
+			&& plink_ctl->ent[i].plink_state != RTW_MESH_PLINK_ESTAB
+		) {
+			if (j == idx) {
+				ent = &plink_ctl->ent[i];
+				break;
+			}
+			j++;
+		}
+	}
+	_exit_critical_bh(&(plink_ctl->lock), &irqL);
+
+	return ent;
+}
+
+int _rtw_mesh_plink_add(_adapter *adapter, const u8 *hwaddr)
+{
+	struct rtw_mesh_info *minfo = &adapter->mesh_info;
+	struct mesh_plink_pool *plink_ctl = &minfo->plink_ctl;
+	struct mesh_plink_ent *ent = NULL;
+	u8 exist = _FALSE;
+	int i;
+
+	for (i = 0; i < RTW_MESH_MAX_PEER_CANDIDATES; i++) {
+		if (plink_ctl->ent[i].valid == _TRUE
+			&& _rtw_memcmp(plink_ctl->ent[i].addr, hwaddr, ETH_ALEN) == _TRUE
+		) {
+			ent = &plink_ctl->ent[i];
+			exist = _TRUE;
+			break;
+		}
+
+		if (ent == NULL && plink_ctl->ent[i].valid == _FALSE)
+			ent = &plink_ctl->ent[i];
+	}
+
+	if (exist == _FALSE && ent) {
+		_rtw_memcpy(ent->addr, hwaddr, ETH_ALEN);
+		ent->valid = _TRUE;
+		#ifdef CONFIG_RTW_MESH_AEK
+		ent->aek_valid = 0;
+		#endif
+		ent->llid = 0;
+		ent->plid = 0;
+		_rtw_memset(ent->chosen_pmk, 0, 16);
+		#ifdef CONFIG_RTW_MESH_AEK
+		_rtw_memset(ent->sel_pcs, 0, 4);
+		_rtw_memset(ent->l_nonce, 0, 32);
+		_rtw_memset(ent->p_nonce, 0, 32);
+		#endif
+		ent->plink_state = RTW_MESH_PLINK_LISTEN;
+		#ifndef CONFIG_RTW_MESH_DRIVER_AID
+		ent->aid = 0;
+		#endif
+		ent->peer_aid = 0;
+		SET_PEER_CONF_DISABLED(ent);
+		SET_CTO_MGATE_CONF_DISABLED(ent);
+		plink_ctl->num++;
+	}
+
+exit:
+	return exist == _TRUE ? RTW_ALREADY : (ent ? _SUCCESS : _FAIL);
+}
+
+int rtw_mesh_plink_add(_adapter *adapter, const u8 *hwaddr)
+{
+	struct rtw_mesh_info *minfo = &adapter->mesh_info;
+	struct mesh_plink_pool *plink_ctl = &minfo->plink_ctl;
+	_irqL irqL;
+	int ret;
+
+	_enter_critical_bh(&(plink_ctl->lock), &irqL);
+	ret = _rtw_mesh_plink_add(adapter, hwaddr);
+	_exit_critical_bh(&(plink_ctl->lock), &irqL);
+
+	return ret;
+}
+
+int rtw_mesh_plink_set_state(_adapter *adapter, const u8 *hwaddr, u8 state)
+{
+	struct rtw_mesh_info *minfo = &adapter->mesh_info;
+	struct mesh_plink_pool *plink_ctl = &minfo->plink_ctl;
+	struct mesh_plink_ent *ent = NULL;
+	_irqL irqL;
+
+	_enter_critical_bh(&(plink_ctl->lock), &irqL);
+	ent = _rtw_mesh_plink_get(adapter, hwaddr);
+	if (ent)
+		ent->plink_state = state;
+	_exit_critical_bh(&(plink_ctl->lock), &irqL);
+
+exit:
+	return ent ? _SUCCESS : _FAIL;
+}
+
+#ifdef CONFIG_RTW_MESH_AEK
+int rtw_mesh_plink_set_aek(_adapter *adapter, const u8 *hwaddr, const u8 *aek)
+{
+	struct rtw_mesh_info *minfo = &adapter->mesh_info;
+	struct mesh_plink_pool *plink_ctl = &minfo->plink_ctl;
+	struct mesh_plink_ent *ent = NULL;
+	_irqL irqL;
+
+	_enter_critical_bh(&(plink_ctl->lock), &irqL);
+	ent = _rtw_mesh_plink_get(adapter, hwaddr);
+	if (ent) {
+		_rtw_memcpy(ent->aek, aek, 32);
+		ent->aek_valid = 1;
+	}
+	_exit_critical_bh(&(plink_ctl->lock), &irqL);
+
+exit:
+	return ent ? _SUCCESS : _FAIL;
+}
+#endif
+
+#if CONFIG_RTW_MESH_PEER_BLACKLIST
+int rtw_mesh_plink_set_peer_conf_timeout(_adapter *adapter, const u8 *hwaddr)
+{
+	struct rtw_mesh_cfg *mcfg = &adapter->mesh_cfg;
+	struct rtw_mesh_info *minfo = &adapter->mesh_info;
+	struct mesh_plink_pool *plink_ctl = &minfo->plink_ctl;
+	struct mesh_plink_ent *ent = NULL;
+	_irqL irqL;
+
+	_enter_critical_bh(&(plink_ctl->lock), &irqL);
+	ent = _rtw_mesh_plink_get(adapter, hwaddr);
+	if (ent) {
+		if (IS_PEER_CONF_DISABLED(ent))
+			SET_PEER_CONF_END_TIME(ent, mcfg->peer_sel_policy.peer_conf_timeout_ms);
+	}
+	_exit_critical_bh(&(plink_ctl->lock), &irqL);
+
+exit:
+	return ent ? _SUCCESS : _FAIL;
+}
+#endif
+
+void _rtw_mesh_plink_del_ent(_adapter *adapter, struct mesh_plink_ent *ent)
+{
+	struct rtw_mesh_info *minfo = &adapter->mesh_info;
+	struct mesh_plink_pool *plink_ctl = &minfo->plink_ctl;
+
+	ent->valid = _FALSE;
+	#ifdef CONFIG_RTW_MESH_DRIVER_AID
+	if (ent->tx_conf_ies && ent->tx_conf_ies_len)
+		rtw_mfree(ent->tx_conf_ies, ent->tx_conf_ies_len);
+	ent->tx_conf_ies = NULL;
+	ent->tx_conf_ies_len = 0;
+	#endif
+	if (ent->rx_conf_ies && ent->rx_conf_ies_len)
+		rtw_mfree(ent->rx_conf_ies, ent->rx_conf_ies_len);
+	ent->rx_conf_ies = NULL;
+	ent->rx_conf_ies_len = 0;
+	if (ent->scanned)
+		ent->scanned = NULL;
+	plink_ctl->num--;
+}
+
+int rtw_mesh_plink_del(_adapter *adapter, const u8 *hwaddr)
+{
+	struct rtw_mesh_info *minfo = &adapter->mesh_info;
+	struct mesh_plink_pool *plink_ctl = &minfo->plink_ctl;
+	struct mesh_plink_ent *ent = NULL;
+	u8 exist = _FALSE;
+	int i;
+	_irqL irqL;
+
+	_enter_critical_bh(&(plink_ctl->lock), &irqL);
+	for (i = 0; i < RTW_MESH_MAX_PEER_CANDIDATES; i++) {
+		if (plink_ctl->ent[i].valid == _TRUE
+			&& _rtw_memcmp(plink_ctl->ent[i].addr, hwaddr, ETH_ALEN) == _TRUE
+		) {
+			ent = &plink_ctl->ent[i];
+			exist = _TRUE;
+			break;
+		}
+	}
+
+	if (exist == _TRUE)
+		_rtw_mesh_plink_del_ent(adapter, ent);
+
+	_exit_critical_bh(&(plink_ctl->lock), &irqL);
+
+exit:
+	return exist == _TRUE ? _SUCCESS : RTW_ALREADY;
+}
+
+void rtw_mesh_plink_ctl_init(_adapter *adapter)
+{
+	struct rtw_mesh_info *minfo = &adapter->mesh_info;
+	struct mesh_plink_pool *plink_ctl = &minfo->plink_ctl;
+	int i;
+
+	_rtw_spinlock_init(&plink_ctl->lock);
+	plink_ctl->num = 0;
+	for (i = 0; i < RTW_MESH_MAX_PEER_CANDIDATES; i++)
+		plink_ctl->ent[i].valid = _FALSE;
+
+#if CONFIG_RTW_MESH_PEER_BLACKLIST
+	_rtw_init_queue(&plink_ctl->peer_blacklist);
+#endif
+#if CONFIG_RTW_MESH_CTO_MGATE_BLACKLIST
+	_rtw_init_queue(&plink_ctl->cto_mgate_blacklist);
+#endif
+}
+
+void rtw_mesh_plink_ctl_deinit(_adapter *adapter)
+{
+	struct rtw_mesh_info *minfo = &adapter->mesh_info;
+	struct mesh_plink_pool *plink_ctl = &minfo->plink_ctl;
+	struct mesh_plink_ent *ent;
+	int i;
+	_irqL irqL;
+
+	_enter_critical_bh(&(plink_ctl->lock), &irqL);
+	for (i = 0; i < RTW_MESH_MAX_PEER_CANDIDATES; i++) {
+		ent = &plink_ctl->ent[i];
+		#ifdef CONFIG_RTW_MESH_DRIVER_AID
+		if (ent->tx_conf_ies && ent->tx_conf_ies_len)
+			rtw_mfree(ent->tx_conf_ies, ent->tx_conf_ies_len);
+		#endif
+		if (ent->rx_conf_ies && ent->rx_conf_ies_len)
+			rtw_mfree(ent->rx_conf_ies, ent->rx_conf_ies_len);
+	}
+	_exit_critical_bh(&(plink_ctl->lock), &irqL);
+
+	_rtw_spinlock_free(&plink_ctl->lock);
+
+#if CONFIG_RTW_MESH_PEER_BLACKLIST
+	rtw_mesh_peer_blacklist_flush(adapter);
+	_rtw_deinit_queue(&plink_ctl->peer_blacklist);
+#endif
+#if CONFIG_RTW_MESH_CTO_MGATE_BLACKLIST
+	rtw_mesh_cto_mgate_blacklist_flush(adapter);
+	_rtw_deinit_queue(&plink_ctl->cto_mgate_blacklist);
+#endif
+}
+
+void dump_mesh_plink_ctl(void *sel, _adapter *adapter)
+{
+	struct rtw_mesh_info *minfo = &adapter->mesh_info;
+	struct mesh_plink_pool *plink_ctl = &minfo->plink_ctl;
+	struct mesh_plink_ent *ent;
+	int i;
+
+	RTW_PRINT_SEL(sel, "num:%u\n", plink_ctl->num);
+	#if CONFIG_RTW_MESH_ACNODE_PREVENT
+	RTW_PRINT_SEL(sel, "acnode_rsvd:%u\n", plink_ctl->acnode_rsvd);
+	#endif
+
+	for (i = 0; i < RTW_MESH_MAX_PEER_CANDIDATES; i++)  {
+		ent = &plink_ctl->ent[i];
+		if (!ent->valid)
+			continue;
+
+		RTW_PRINT_SEL(sel, "\n");
+		RTW_PRINT_SEL(sel, "peer:"MAC_FMT"\n", MAC_ARG(ent->addr));
+		RTW_PRINT_SEL(sel, "plink_state:%s\n", rtw_mesh_plink_str(ent->plink_state));
+
+		#ifdef CONFIG_RTW_MESH_AEK
+		if (ent->aek_valid)
+			RTW_PRINT_SEL(sel, "aek:"KEY_FMT KEY_FMT"\n", KEY_ARG(ent->aek), KEY_ARG(ent->aek + 16));
+		#endif
+
+		RTW_PRINT_SEL(sel, "llid:%u, plid:%u\n", ent->llid, ent->plid);
+		#ifndef CONFIG_RTW_MESH_DRIVER_AID
+		RTW_PRINT_SEL(sel, "aid:%u\n", ent->aid);
+		#endif
+		RTW_PRINT_SEL(sel, "peer_aid:%u\n", ent->peer_aid);
+
+		RTW_PRINT_SEL(sel, "chosen_pmk:"KEY_FMT"\n", KEY_ARG(ent->chosen_pmk));
+
+		#ifdef CONFIG_RTW_MESH_AEK
+		RTW_PRINT_SEL(sel, "sel_pcs:%02x%02x%02x%02x\n"
+			, ent->sel_pcs[0], ent->sel_pcs[1], ent->sel_pcs[2], ent->sel_pcs[3]);
+		RTW_PRINT_SEL(sel, "l_nonce:"KEY_FMT KEY_FMT"\n", KEY_ARG(ent->l_nonce), KEY_ARG(ent->l_nonce + 16));
+		RTW_PRINT_SEL(sel, "p_nonce:"KEY_FMT KEY_FMT"\n", KEY_ARG(ent->p_nonce), KEY_ARG(ent->p_nonce + 16));
+		#endif
+
+		#ifdef CONFIG_RTW_MESH_DRIVER_AID
+		RTW_PRINT_SEL(sel, "tx_conf_ies:%p, len:%u\n", ent->tx_conf_ies, ent->tx_conf_ies_len);
+		#endif
+		RTW_PRINT_SEL(sel, "rx_conf_ies:%p, len:%u\n", ent->rx_conf_ies, ent->rx_conf_ies_len);
+		RTW_PRINT_SEL(sel, "scanned:%p\n", ent->scanned);
+
+		#if CONFIG_RTW_MESH_PEER_BLACKLIST
+		if (!IS_PEER_CONF_DISABLED(ent)) {
+			if (!IS_PEER_CONF_TIMEOUT(ent))
+				RTW_PRINT_SEL(sel, "peer_conf:%d\n", rtw_systime_to_ms(ent->peer_conf_end_time - rtw_get_current_time()));
+			else
+				RTW_PRINT_SEL(sel, "peer_conf:TIMEOUT\n");
+		}
+		#endif
+
+		#if CONFIG_RTW_MESH_CTO_MGATE_BLACKLIST
+		if (!IS_CTO_MGATE_CONF_DISABLED(ent)) {
+			if (!IS_CTO_MGATE_CONF_TIMEOUT(ent))
+				RTW_PRINT_SEL(sel, "cto_mgate_conf:%d\n", rtw_systime_to_ms(ent->cto_mgate_conf_end_time - rtw_get_current_time()));
+			else
+				RTW_PRINT_SEL(sel, "cto_mgate_conf:TIMEOUT\n");
+		}
+		#endif
+	}
+}
+
+/* this function is called with plink_ctl being locked */
+int rtw_mesh_peer_establish(_adapter *adapter, struct mesh_plink_ent *plink, struct sta_info *sta)
+{
+#ifndef DBG_RTW_MESH_PEER_ESTABLISH
+#define DBG_RTW_MESH_PEER_ESTABLISH 0
+#endif
+
+	struct sta_priv *stapriv = &adapter->stapriv;
+	struct rtw_mesh_cfg *mcfg = &adapter->mesh_cfg;
+	struct rtw_mesh_info *minfo = &adapter->mesh_info;
+	struct mesh_plink_pool *plink_ctl = &minfo->plink_ctl;
+	u8 *tlv_ies;
+	u16 tlv_ieslen;
+	struct rtw_ieee802_11_elems elems;
+	_irqL irqL;
+	int i;
+	int ret = _FAIL;
+
+	if (!plink->rx_conf_ies || !plink->rx_conf_ies_len) {
+		RTW_INFO(FUNC_ADPT_FMT" no rx confirm from sta "MAC_FMT"\n"
+			, FUNC_ADPT_ARG(adapter), MAC_ARG(sta->cmn.mac_addr));
+		goto exit;
+	}
+
+	if (plink->rx_conf_ies_len < 4) {
+		RTW_INFO(FUNC_ADPT_FMT" confirm from sta "MAC_FMT" too short\n"
+			, FUNC_ADPT_ARG(adapter), MAC_ARG(sta->cmn.mac_addr));
+		goto exit;
+	}
+
+#ifdef CONFIG_RTW_MESH_DRIVER_AID
+	if (!plink->tx_conf_ies || !plink->tx_conf_ies_len) {
+		RTW_INFO(FUNC_ADPT_FMT" no tx confirm to sta "MAC_FMT"\n"
+			, FUNC_ADPT_ARG(adapter), MAC_ARG(sta->cmn.mac_addr));
+		goto exit;
+	}
+
+	if (plink->tx_conf_ies_len < 4) {
+		RTW_INFO(FUNC_ADPT_FMT" confirm to sta "MAC_FMT" too short\n"
+			, FUNC_ADPT_ARG(adapter), MAC_ARG(sta->cmn.mac_addr));
+		goto exit;
+	}
+#endif
+
+	tlv_ies = plink->rx_conf_ies + 4;
+	tlv_ieslen = plink->rx_conf_ies_len - 4;
+
+	if (DBG_RTW_MESH_PEER_ESTABLISH)
+		dump_ies(RTW_DBGDUMP, tlv_ies, tlv_ieslen);
+
+	if (rtw_ieee802_11_parse_elems(tlv_ies, tlv_ieslen, &elems, 1) == ParseFailed) {
+		RTW_INFO(FUNC_ADPT_FMT" sta "MAC_FMT" sent invalid confirm\n"
+			, FUNC_ADPT_ARG(adapter), MAC_ARG(sta->cmn.mac_addr));
+		goto exit;
+	}
+
+	SET_PEER_CONF_DISABLED(plink);
+	if (rtw_bss_is_cto_mgate(&plink->scanned->network)
+		&& !rtw_bss_is_forwarding(&plink->scanned->network))
+		SET_CTO_MGATE_CONF_END_TIME(plink, mcfg->peer_sel_policy.cto_mgate_conf_timeout_ms);
+	else
+		SET_CTO_MGATE_CONF_DISABLED(plink);
+
+	sta->state &= (~WIFI_FW_AUTH_SUCCESS);
+	sta->state |= WIFI_FW_ASSOC_STATE;
+
+	rtw_ap_parse_sta_capability(adapter, sta, plink->rx_conf_ies);
+
+	if (rtw_ap_parse_sta_supported_rates(adapter, sta, tlv_ies, tlv_ieslen) != _STATS_SUCCESSFUL_)
+		goto exit;
+	
+	if (rtw_ap_parse_sta_security_ie(adapter, sta, &elems) != _STATS_SUCCESSFUL_)
+		goto exit;
+
+	rtw_ap_parse_sta_wmm_ie(adapter, sta, tlv_ies, tlv_ieslen);
+#ifdef CONFIG_RTS_FULL_BW
+	/*check vendor IE*/
+	rtw_parse_sta_vendor_ie_8812(adapter, sta, tlv_ies, tlv_ieslen);
+#endif/*CONFIG_RTS_FULL_BW*/
+
+	rtw_ap_parse_sta_ht_ie(adapter, sta, &elems);
+	rtw_ap_parse_sta_vht_ie(adapter, sta, &elems);
+
+	/* AID */
+#ifdef CONFIG_RTW_MESH_DRIVER_AID
+	sta->cmn.aid = RTW_GET_LE16(plink->tx_conf_ies + 2);
+#else
+	sta->cmn.aid = plink->aid;
+#endif
+	stapriv->sta_aid[sta->cmn.aid - 1] = sta;
+	RTW_INFO(FUNC_ADPT_FMT" sta "MAC_FMT" aid:%u\n"
+		, FUNC_ADPT_ARG(adapter), MAC_ARG(sta->cmn.mac_addr), sta->cmn.aid);
+
+	sta->state &= (~WIFI_FW_ASSOC_STATE);
+	sta->state |= WIFI_FW_ASSOC_SUCCESS;
+
+	sta->local_mps = RTW_MESH_PS_ACTIVE;
+
+	rtw_ewma_err_rate_init(&sta->metrics.err_rate);
+	rtw_ewma_err_rate_add(&sta->metrics.err_rate, 1);
+	/* init data_rate to 1M */
+	sta->metrics.data_rate = 10;
+
+	_enter_critical_bh(&stapriv->asoc_list_lock, &irqL);
+	if (rtw_is_list_empty(&sta->asoc_list)) {
+		STA_SET_MESH_PLINK(sta, plink);
+		/* TBD: up layer timeout mechanism */
+		/* sta->expire_to = mcfg->plink_timeout / 2; */
+		rtw_list_insert_tail(&sta->asoc_list, &stapriv->asoc_list);
+		stapriv->asoc_list_cnt++;
+	}
+	_exit_critical_bh(&stapriv->asoc_list_lock, &irqL);
+
+	bss_cap_update_on_sta_join(adapter, sta);
+	sta_info_update(adapter, sta);
+	report_add_sta_event(adapter, sta->cmn.mac_addr);
+
+	ret = _SUCCESS;
+
+exit:
+	return ret;
+}
+
+void rtw_mesh_expire_peer_notify(_adapter *adapter, const u8 *peer_addr)
+{
+	u8 null_ssid[2] = {0, 0};
+
+#ifdef CONFIG_IOCTL_CFG80211
+	rtw_cfg80211_notify_new_peer_candidate(adapter->rtw_wdev
+		, peer_addr
+		, null_ssid
+		, 2
+		, GFP_ATOMIC
+	);
+#endif
+
+exit:
+	return;
+}
+
+static u8 *rtw_mesh_construct_peer_mesh_close(_adapter *adapter, struct mesh_plink_ent *plink, u16 reason, u32 *len)
+{
+	struct rtw_mesh_info *minfo = &adapter->mesh_info;
+	u8 *frame = NULL, *pos;
+	u32 flen;
+	struct rtw_ieee80211_hdr *whdr;
+
+	if (minfo->mesh_auth_id && !MESH_PLINK_AEK_VALID(plink))
+		goto exit;
+
+	flen = sizeof(struct rtw_ieee80211_hdr_3addr)
+		+ 2 /* category, action */
+		+ 2 + minfo->mesh_id_len /* mesh id */
+		+ 2 + 8 + (minfo->mesh_auth_id ? 16 : 0) /* mpm */
+		+ (minfo->mesh_auth_id ? 2 + AES_BLOCK_SIZE : 0) /* mic */
+		+ (minfo->mesh_auth_id ? 70 : 0) /* ampe */
+		;
+
+	pos = frame = rtw_zmalloc(flen);
+	if (!frame)
+		goto exit;
+
+	whdr = (struct rtw_ieee80211_hdr *)frame;
+	_rtw_memcpy(whdr->addr1, adapter_mac_addr(adapter), ETH_ALEN);
+	_rtw_memcpy(whdr->addr2, plink->addr, ETH_ALEN);
+	_rtw_memcpy(whdr->addr3, adapter_mac_addr(adapter), ETH_ALEN);
+
+	set_frame_sub_type(frame, WIFI_ACTION);
+
+	pos += sizeof(struct rtw_ieee80211_hdr_3addr);
+	*(pos++) = RTW_WLAN_CATEGORY_SELF_PROTECTED;
+	*(pos++) = RTW_ACT_SELF_PROTECTED_MESH_CLOSE;
+
+	pos = rtw_set_ie_mesh_id(pos, NULL, minfo->mesh_id, minfo->mesh_id_len);
+
+	pos = rtw_set_ie_mpm(pos, NULL
+		, minfo->mesh_auth_id ? 1 : 0
+		, plink->plid
+		, &plink->llid
+		, &reason
+		, minfo->mesh_auth_id ? plink->chosen_pmk : NULL);
+
+#ifdef CONFIG_RTW_MESH_AEK
+	if (minfo->mesh_auth_id) {
+		u8 ampe_buf[70];
+		int enc_ret;
+
+		*pos = WLAN_EID_MIC;
+		*(pos + 1) = AES_BLOCK_SIZE;
+
+		ampe_buf[0] = WLAN_EID_AMPE;
+		ampe_buf[1] = 68;
+		_rtw_memcpy(ampe_buf + 2, plink->sel_pcs, 4);
+		_rtw_memcpy(ampe_buf + 6, plink->p_nonce, 32);
+		_rtw_memcpy(ampe_buf + 38, plink->l_nonce, 32);
+
+		enc_ret = rtw_mpm_ampe_enc(adapter, plink
+			, frame + sizeof(struct rtw_ieee80211_hdr_3addr)
+			, pos, ampe_buf, 1);
+		if (enc_ret != _SUCCESS) {
+			rtw_mfree(frame, flen);
+			frame = NULL;
+			goto exit;
+		}
+	}
+#endif
+
+	*len = flen;
+
+exit:
+	return frame;
+}
+
+void _rtw_mesh_expire_peer_ent(_adapter *adapter, struct mesh_plink_ent *plink)
+{
+#if defined(CONFIG_RTW_MESH_STA_DEL_DISASOC)
+	_rtw_mesh_plink_del_ent(adapter, plink);
+	rtw_cfg80211_indicate_sta_disassoc(adapter, plink->addr, 0);
+#else
+	u8 *frame = NULL;
+	u32 flen;
+
+	if (plink->plink_state == RTW_MESH_PLINK_ESTAB)
+		frame = rtw_mesh_construct_peer_mesh_close(adapter, plink, WLAN_REASON_MESH_CLOSE, &flen);
+
+	if (frame) {
+		struct mlme_ext_priv *mlmeext = &adapter->mlmeextpriv;
+		struct wireless_dev *wdev = adapter->rtw_wdev;
+		s32 freq = rtw_ch2freq(mlmeext->cur_channel);
+
+		#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 37)) || defined(COMPAT_KERNEL_RELEASE)
+		rtw_cfg80211_rx_mgmt(wdev, freq, 0, frame, flen, GFP_ATOMIC);
+		#else
+		cfg80211_rx_action(adapter->pnetdev, freq, frame, flen, GFP_ATOMIC);
+		#endif
+
+		rtw_mfree(frame, flen);
+	} else {
+		rtw_mesh_expire_peer_notify(adapter, plink->addr);
+		RTW_INFO(FUNC_ADPT_FMT" set "MAC_FMT" plink unknown\n"
+			, FUNC_ADPT_ARG(adapter), MAC_ARG(plink->addr));
+		plink->plink_state = RTW_MESH_PLINK_UNKNOWN;
+	}
+#endif
+}
+
+void rtw_mesh_expire_peer(_adapter *adapter, const u8 *peer_addr)
+{
+	struct rtw_mesh_info *minfo = &adapter->mesh_info;
+	struct mesh_plink_pool *plink_ctl = &minfo->plink_ctl;
+	struct mesh_plink_ent *plink;
+	_irqL irqL;
+
+	_enter_critical_bh(&(plink_ctl->lock), &irqL);
+
+	plink = _rtw_mesh_plink_get(adapter, peer_addr);
+	if (!plink)
+		goto exit;
+
+	_rtw_mesh_expire_peer_ent(adapter, plink);
+
+exit:
+	_exit_critical_bh(&(plink_ctl->lock), &irqL);
+}
+
+u8 rtw_mesh_ps_annc(_adapter *adapter, u8 ps)
+{
+	_irqL irqL;
+	_list *head, *list;
+	struct sta_info *sta;
+	struct sta_priv *stapriv = &adapter->stapriv;
+	u8 sta_alive_num = 0, i;
+	char sta_alive_list[NUM_STA];
+	u8 annc_cnt = 0;
+
+	if (rtw_linked_check(adapter) == _FALSE)
+		goto exit;
+
+	_enter_critical_bh(&stapriv->asoc_list_lock, &irqL);
+
+	head = &stapriv->asoc_list;
+	list = get_next(head);
+	while ((rtw_end_of_queue_search(head, list)) == _FALSE) {
+		int stainfo_offset;
+
+		sta = LIST_CONTAINOR(list, struct sta_info, asoc_list);
+		list = get_next(list);
+
+		stainfo_offset = rtw_stainfo_offset(stapriv, sta);
+		if (stainfo_offset_valid(stainfo_offset))
+			sta_alive_list[sta_alive_num++] = stainfo_offset;
+	}
+	_exit_critical_bh(&stapriv->asoc_list_lock, &irqL);
+
+	for (i = 0; i < sta_alive_num; i++) {
+		sta = rtw_get_stainfo_by_offset(stapriv, sta_alive_list[i]);
+		if (!sta)
+			continue;
+
+		issue_qos_nulldata(adapter, sta->cmn.mac_addr, 7, ps, 3, 500);
+		annc_cnt++;
+	}
+
+exit:
+	return annc_cnt;
+}
+
+static void mpath_tx_tasklet_hdl(void *priv)
+{
+	_adapter *adapter = (_adapter *)priv;
+	struct rtw_mesh_info *minfo = &adapter->mesh_info;
+	struct xmit_frame *xframe;
+	_list *list, *head;
+	_list tmp;
+	u32 tmp_len;
+	s32 res;
+
+	_rtw_init_listhead(&tmp);
+
+	while (1) {
+		tmp_len = 0;
+		enter_critical_bh(&minfo->mpath_tx_queue.lock);
+		if (minfo->mpath_tx_queue_len) {
+			rtw_list_splice_init(&minfo->mpath_tx_queue.queue, &tmp);
+			tmp_len = minfo->mpath_tx_queue_len;
+			minfo->mpath_tx_queue_len = 0;
+		}
+		exit_critical_bh(&minfo->mpath_tx_queue.lock);
+
+		if (!tmp_len)
+			break;
+
+		head = &tmp;
+		list = get_next(head);
+		while (rtw_end_of_queue_search(head, list) == _FALSE) {
+			xframe = LIST_CONTAINOR(list, struct xmit_frame, list);
+			list = get_next(list);
+			rtw_list_delete(&xframe->list);
+			res = rtw_xmit_posthandle(adapter, xframe, xframe->pkt);
+			if (res < 0) {
+				#ifdef DBG_TX_DROP_FRAME
+				RTW_INFO("DBG_TX_DROP_FRAME %s rtw_xmit fail\n", __FUNCTION__);
+				#endif
+				adapter->xmitpriv.tx_drop++;
+			}
+		}
+	}
+}
+
+static void rtw_mpath_tx_queue_flush(_adapter *adapter)
+{
+	struct rtw_mesh_info *minfo = &adapter->mesh_info;
+	struct xmit_frame *xframe;
+	_list *list, *head;
+	_list tmp;
+
+	_rtw_init_listhead(&tmp);
+
+	enter_critical_bh(&minfo->mpath_tx_queue.lock);
+	rtw_list_splice_init(&minfo->mpath_tx_queue.queue, &tmp);
+	minfo->mpath_tx_queue_len = 0;
+	exit_critical_bh(&minfo->mpath_tx_queue.lock);
+
+	head = &tmp;
+	list = get_next(head);
+	while (rtw_end_of_queue_search(head, list) == _FALSE) {
+		xframe = LIST_CONTAINOR(list, struct xmit_frame, list);
+		list = get_next(list);
+		rtw_list_delete(&xframe->list);
+		rtw_free_xmitframe(&adapter->xmitpriv, xframe);
+	}
+}
+
+#ifdef PLATFORM_LINUX /* 3.10 ~ 4.13 checked */
+#if defined(CONFIG_SLUB)
+#include <linux/slub_def.h>
+#elif defined(CONFIG_SLAB)
+#include <linux/slab_def.h>
+#endif
+typedef struct kmem_cache rtw_mcache;
+#endif
+
+rtw_mcache *rtw_mcache_create(const char *name, size_t size)
+{
+#ifdef PLATFORM_LINUX /* 3.10 ~ 4.13 checked */
+	return kmem_cache_create(name, size, 0, 0, NULL);
+#else
+	#error "TBD\n";
+#endif
+}
+
+void rtw_mcache_destroy(rtw_mcache *s)
+{
+#ifdef PLATFORM_LINUX /* 3.10 ~ 4.13 checked */
+	kmem_cache_destroy(s);
+#else
+	#error "TBD\n";
+#endif
+}
+
+void *_rtw_mcache_alloc(rtw_mcache *cachep)
+{
+#ifdef PLATFORM_LINUX /* 3.10 ~ 4.13 checked */
+	return kmem_cache_alloc(cachep, GFP_ATOMIC);
+#else
+	#error "TBD\n";
+#endif
+}
+
+void _rtw_mcache_free(rtw_mcache *cachep, void *objp)
+{
+#ifdef PLATFORM_LINUX /* 3.10 ~ 4.13 checked */
+	kmem_cache_free(cachep, objp);
+#else
+	#error "TBD\n";
+#endif
+}
+
+#ifdef DBG_MEM_ALLOC
+inline void *dbg_rtw_mcache_alloc(rtw_mcache *cachep, const enum mstat_f flags, const char *func, const int line)
+{
+	void *p;
+	u32 sz = cachep->size;
+
+	if (match_mstat_sniff_rules(flags, sz))
+		RTW_INFO("DBG_MEM_ALLOC %s:%d %s(%u)\n", func, line, __func__, sz);
+
+	p = _rtw_mcache_alloc(cachep);
+
+	rtw_mstat_update(
+		flags
+		, p ? MSTAT_ALLOC_SUCCESS : MSTAT_ALLOC_FAIL
+		, sz
+	);
+
+	return p;
+}
+
+inline void dbg_rtw_mcache_free(rtw_mcache *cachep, void *pbuf, const enum mstat_f flags, const char *func, const int line)
+{
+	u32 sz = cachep->size;
+
+	if (match_mstat_sniff_rules(flags, sz))
+		RTW_INFO("DBG_MEM_ALLOC %s:%d %s(%u)\n", func, line, __func__, sz);
+
+	_rtw_mcache_free(cachep, pbuf);
+
+	rtw_mstat_update(
+		flags
+		, MSTAT_FREE
+		, sz
+	);
+}
+
+#define rtw_mcache_alloc(cachep) dbg_rtw_mcache_alloc(cachep, MSTAT_TYPE_PHY, __FUNCTION__, __LINE__)
+#define rtw_mcache_free(cachep, objp) dbg_rtw_mcache_free(cachep, objp, MSTAT_TYPE_PHY, __FUNCTION__, __LINE__)
+#else
+#define rtw_mcache_alloc(cachep) _rtw_mcache_alloc(cachep)
+#define rtw_mcache_free(cachep, objp) _rtw_mcache_free(cachep, objp)
+#endif /* DBG_MEM_ALLOC */
+
+/* Mesh Received Cache */
+#define RTW_MRC_BUCKETS			256 /* must be a power of 2 */
+#define RTW_MRC_QUEUE_MAX_LEN	4
+#define RTW_MRC_TIMEOUT_MS		(3 * 1000)
+
+/**
+ * struct rtw_mrc_entry - entry in the Mesh Received Cache
+ *
+ * @seqnum: mesh sequence number of the frame
+ * @exp_time: expiration time of the entry
+ * @msa: mesh source address of the frame
+ * @list: hashtable list pointer
+ *
+ * The Mesh Received Cache keeps track of the latest received frames that
+ * have been received by a mesh interface and discards received frames
+ * that are found in the cache.
+ */
+struct rtw_mrc_entry {
+	rtw_hlist_node list;
+	systime exp_time;
+	u32 seqnum;
+	u8 msa[ETH_ALEN];
+};
+
+struct rtw_mrc {
+	rtw_hlist_head bucket[RTW_MRC_BUCKETS];
+	u32 idx_mask;
+	rtw_mcache *cache;
+};
+
+static int rtw_mrc_init(_adapter *adapter)
+{
+	struct rtw_mesh_info *minfo = &adapter->mesh_info;
+	char cache_name[IFNAMSIZ + 8 + 1];
+	int i;
+
+	minfo->mrc = rtw_malloc(sizeof(struct rtw_mrc));
+	if (!minfo->mrc)
+		return -ENOMEM;
+	minfo->mrc->idx_mask = RTW_MRC_BUCKETS - 1;
+	for (i = 0; i < RTW_MRC_BUCKETS; i++)
+		rtw_hlist_head_init(&minfo->mrc->bucket[i]);
+
+	sprintf(cache_name, "rtw_mrc_%s", ADPT_ARG(adapter));
+	minfo->mrc->cache = rtw_mcache_create(cache_name, sizeof(struct rtw_mrc_entry));
+
+	return 0;
+}
+
+static void rtw_mrc_free(_adapter *adapter)
+{
+	struct rtw_mesh_info *minfo = &adapter->mesh_info;
+	struct rtw_mrc *mrc = minfo->mrc;
+	struct rtw_mrc_entry *p;
+	rtw_hlist_node *np, *n;
+	int i;
+
+	if (!mrc)
+		return;
+
+	for (i = 0; i < RTW_MRC_BUCKETS; i++) {
+		rtw_hlist_for_each_entry_safe(p, np, n, &mrc->bucket[i], list) {
+			rtw_hlist_del(&p->list);
+			rtw_mcache_free(mrc->cache, p);
+		}
+	}
+
+	rtw_mcache_destroy(mrc->cache);
+
+	rtw_mfree(mrc, sizeof(struct rtw_mrc));
+	minfo->mrc = NULL;
+}
+
+/**
+ * rtw_mrc_check - Check frame in mesh received cache and add if absent.
+ *
+ * @adapter:	interface
+ * @msa:		mesh source address
+ * @seq:		mesh seq number
+ *
+ * Returns: 0 if the frame is not in the cache, nonzero otherwise.
+ *
+ * Checks using the mesh source address and the mesh sequence number if we have
+ * received this frame lately. If the frame is not in the cache, it is added to
+ * it.
+ */
+static int rtw_mrc_check(_adapter *adapter, const u8 *msa, u32 seq)
+{
+	struct rtw_mesh_info *minfo = &adapter->mesh_info;
+	struct rtw_mrc *mrc = minfo->mrc;
+	int entries = 0;
+	u8 idx;
+	struct rtw_mrc_entry *p;
+	rtw_hlist_node *np, *n;
+	u8 timeout;
+
+	if (!mrc)
+		return -1;
+
+	idx = seq & mrc->idx_mask;
+	rtw_hlist_for_each_entry_safe(p, np, n, &mrc->bucket[idx], list) {
+		++entries;
+		timeout = rtw_time_after(rtw_get_current_time(), p->exp_time);
+		if (timeout || entries == RTW_MRC_QUEUE_MAX_LEN) {
+			if (!timeout)
+				minfo->mshstats.mrc_del_qlen++;
+
+			rtw_hlist_del(&p->list);
+			rtw_mcache_free(mrc->cache, p);
+			--entries;
+		} else if ((seq == p->seqnum) && _rtw_memcmp(msa, p->msa, ETH_ALEN) == _TRUE)
+			return -1;
+	}
+
+	p = rtw_mcache_alloc(mrc->cache);
+	if (!p)
+		return 0;
+
+	p->seqnum = seq;
+	p->exp_time = rtw_get_current_time() + rtw_ms_to_systime(RTW_MRC_TIMEOUT_MS);
+	_rtw_memcpy(p->msa, msa, ETH_ALEN);
+	rtw_hlist_add_head(&p->list, &mrc->bucket[idx]);
+	return 0;
+}
+
+static int rtw_mesh_decache(_adapter *adapter, const u8 *msa, u32 seq)
+{
+	return rtw_mrc_check(adapter, msa, seq);
+}
+
+#ifndef RTW_MESH_SCAN_RESULT_EXP_MS
+#define RTW_MESH_SCAN_RESULT_EXP_MS (10 * 1000)
+#endif
+
+#ifndef RTW_MESH_ACNODE_PREVENT
+#define RTW_MESH_ACNODE_PREVENT 0
+#endif
+#ifndef RTW_MESH_ACNODE_CONF_TIMEOUT_MS
+#define RTW_MESH_ACNODE_CONF_TIMEOUT_MS (20 * 1000)
+#endif
+#ifndef RTW_MESH_ACNODE_NOTIFY_TIMEOUT_MS
+#define RTW_MESH_ACNODE_NOTIFY_TIMEOUT_MS (2 * 1000)
+#endif
+
+#ifndef RTW_MESH_OFFCH_CAND
+#define RTW_MESH_OFFCH_CAND 1
+#endif
+#ifndef RTW_MESH_OFFCH_CAND_FIND_INT_MS
+#define RTW_MESH_OFFCH_CAND_FIND_INT_MS (10 * 1000)
+#endif
+
+#ifndef RTW_MESH_PEER_CONF_TIMEOUT_MS
+#define RTW_MESH_PEER_CONF_TIMEOUT_MS (20 * 1000)
+#endif
+#ifndef RTW_MESH_PEER_BLACKLIST_TIMEOUT_MS
+#define RTW_MESH_PEER_BLACKLIST_TIMEOUT_MS (20 * 1000)
+#endif
+
+#ifndef RTW_MESH_CTO_MGATE_REQUIRE
+#define RTW_MESH_CTO_MGATE_REQUIRE 0
+#endif
+#ifndef RTW_MESH_CTO_MGATE_CONF_TIMEOUT_MS
+#define RTW_MESH_CTO_MGATE_CONF_TIMEOUT_MS (20 * 1000)
+#endif
+#ifndef RTW_MESH_CTO_MGATE_BLACKLIST_TIMEOUT_MS
+#define RTW_MESH_CTO_MGATE_BLACKLIST_TIMEOUT_MS (20 * 1000)
+#endif
+
+void rtw_mesh_cfg_init_peer_sel_policy(struct rtw_mesh_cfg *mcfg)
+{
+	struct mesh_peer_sel_policy *sel_policy = &mcfg->peer_sel_policy;
+
+	sel_policy->scanr_exp_ms = RTW_MESH_SCAN_RESULT_EXP_MS;
+
+#if CONFIG_RTW_MESH_ACNODE_PREVENT
+	sel_policy->acnode_prevent = RTW_MESH_ACNODE_PREVENT;
+	sel_policy->acnode_conf_timeout_ms = RTW_MESH_ACNODE_CONF_TIMEOUT_MS;
+	sel_policy->acnode_notify_timeout_ms = RTW_MESH_ACNODE_NOTIFY_TIMEOUT_MS;
+#endif
+
+#if CONFIG_RTW_MESH_OFFCH_CAND
+	sel_policy->offch_cand = RTW_MESH_OFFCH_CAND;
+	sel_policy->offch_find_int_ms = RTW_MESH_OFFCH_CAND_FIND_INT_MS;
+#endif
+
+#if CONFIG_RTW_MESH_PEER_BLACKLIST
+	sel_policy->peer_conf_timeout_ms = RTW_MESH_PEER_CONF_TIMEOUT_MS;
+	sel_policy->peer_blacklist_timeout_ms = RTW_MESH_PEER_BLACKLIST_TIMEOUT_MS;
+#endif
+
+#if CONFIG_RTW_MESH_CTO_MGATE_BLACKLIST
+	sel_policy->cto_mgate_require = RTW_MESH_CTO_MGATE_REQUIRE;
+	sel_policy->cto_mgate_conf_timeout_ms = RTW_MESH_CTO_MGATE_CONF_TIMEOUT_MS;
+	sel_policy->cto_mgate_blacklist_timeout_ms = RTW_MESH_CTO_MGATE_BLACKLIST_TIMEOUT_MS;
+#endif
+}
+
+void rtw_mesh_cfg_init(_adapter *adapter)
+{
+	struct rtw_mesh_cfg *mcfg = &adapter->mesh_cfg;
+
+	mcfg->max_peer_links = RTW_MESH_MAX_PEER_LINKS;
+	mcfg->plink_timeout = RTW_MESH_PEER_LINK_TIMEOUT;
+
+	mcfg->dot11MeshTTL = RTW_MESH_TTL;
+	mcfg->element_ttl = RTW_MESH_DEFAULT_ELEMENT_TTL;
+	mcfg->dot11MeshHWMPmaxPREQretries = RTW_MESH_MAX_PREQ_RETRIES;
+	mcfg->path_refresh_time = RTW_MESH_PATH_REFRESH_TIME;
+	mcfg->min_discovery_timeout = RTW_MESH_MIN_DISCOVERY_TIMEOUT;
+	mcfg->dot11MeshHWMPactivePathTimeout = RTW_MESH_PATH_TIMEOUT;
+	mcfg->dot11MeshHWMPpreqMinInterval = RTW_MESH_PREQ_MIN_INT;
+	mcfg->dot11MeshHWMPperrMinInterval = RTW_MESH_PERR_MIN_INT;
+	mcfg->dot11MeshHWMPnetDiameterTraversalTime = RTW_MESH_DIAM_TRAVERSAL_TIME;
+	mcfg->dot11MeshHWMPRootMode = RTW_IEEE80211_ROOTMODE_NO_ROOT;
+	mcfg->dot11MeshHWMPRannInterval = RTW_MESH_RANN_INTERVAL;
+	mcfg->dot11MeshGateAnnouncementProtocol = _FALSE;
+	mcfg->dot11MeshForwarding = _TRUE;
+	mcfg->rssi_threshold = 0;
+	mcfg->dot11MeshHWMPactivePathToRootTimeout = RTW_MESH_PATH_TO_ROOT_TIMEOUT;
+	mcfg->dot11MeshHWMProotInterval = RTW_MESH_ROOT_INTERVAL;
+	mcfg->dot11MeshHWMPconfirmationInterval = RTW_MESH_ROOT_CONFIRMATION_INTERVAL;
+	mcfg->path_gate_timeout_factor = 3;
+	rtw_mesh_cfg_init_peer_sel_policy(mcfg);
+#ifdef CONFIG_RTW_MESH_ADD_ROOT_CHK
+	mcfg->sane_metric_delta = RTW_MESH_SANE_METRIC_DELTA;
+	mcfg->max_root_add_chk_cnt = RTW_MESH_MAX_ROOT_ADD_CHK_CNT;
+#endif
+
+#if CONFIG_RTW_MESH_DATA_BMC_TO_UC
+	mcfg->b2u_flags_msrc = 0;
+	mcfg->b2u_flags_mfwd = RTW_MESH_B2U_GA_UCAST;
+#endif
+}
+
+void rtw_mesh_cfg_init_max_peer_links(_adapter *adapter, u8 stack_conf)
+{
+	struct rtw_mesh_cfg *mcfg = &adapter->mesh_cfg;
+
+	mcfg->max_peer_links = RTW_MESH_MAX_PEER_LINKS;
+
+	if (mcfg->max_peer_links > stack_conf)
+		mcfg->max_peer_links = stack_conf;
+}
+
+void rtw_mesh_cfg_init_plink_timeout(_adapter *adapter, u32 stack_conf)
+{
+	struct rtw_mesh_cfg *mcfg = &adapter->mesh_cfg;
+
+	mcfg->plink_timeout = stack_conf;
+}
+
+void rtw_mesh_init_mesh_info(_adapter *adapter)
+{
+	struct rtw_mesh_info *minfo = &adapter->mesh_info;
+
+	_rtw_memset(minfo, 0, sizeof(struct rtw_mesh_info));
+
+	rtw_mesh_plink_ctl_init(adapter);
+	
+	minfo->last_preq = rtw_get_current_time();
+	/* minfo->last_sn_update = rtw_get_current_time(); */
+	minfo->next_perr = rtw_get_current_time();
+	
+	ATOMIC_SET(&minfo->mpaths, 0);
+	rtw_mesh_pathtbl_init(adapter);
+
+	_rtw_init_queue(&minfo->mpath_tx_queue);
+	tasklet_init(&minfo->mpath_tx_tasklet
+		, (void(*)(unsigned long))mpath_tx_tasklet_hdl
+		, (unsigned long)adapter);
+
+	rtw_mrc_init(adapter);
+
+	_rtw_init_listhead(&minfo->preq_queue.list);
+	_rtw_spinlock_init(&minfo->mesh_preq_queue_lock);
+	
+	rtw_init_timer(&adapter->mesh_path_timer, adapter, rtw_ieee80211_mesh_path_timer, adapter);
+	rtw_init_timer(&adapter->mesh_path_root_timer, adapter, rtw_ieee80211_mesh_path_root_timer, adapter);
+	rtw_init_timer(&adapter->mesh_atlm_param_req_timer, adapter, rtw_mesh_atlm_param_req_timer, adapter);
+	_init_workitem(&adapter->mesh_work, rtw_mesh_work_hdl, NULL);
+}
+
+void rtw_mesh_deinit_mesh_info(_adapter *adapter)
+{
+	struct rtw_mesh_info *minfo = &adapter->mesh_info;
+
+	tasklet_kill(&minfo->mpath_tx_tasklet);
+	rtw_mpath_tx_queue_flush(adapter);
+	_rtw_deinit_queue(&adapter->mesh_info.mpath_tx_queue);
+
+	rtw_mrc_free(adapter);
+
+	rtw_mesh_pathtbl_unregister(adapter);
+
+	rtw_mesh_plink_ctl_deinit(adapter);
+
+	_cancel_workitem_sync(&adapter->mesh_work);
+	_cancel_timer_ex(&adapter->mesh_path_timer);
+	_cancel_timer_ex(&adapter->mesh_path_root_timer);
+	_cancel_timer_ex(&adapter->mesh_atlm_param_req_timer);
+}
+
+/**
+ * rtw_mesh_nexthop_resolve - lookup next hop; conditionally start path discovery
+ *
+ * @skb: 802.11 frame to be sent
+ * @sdata: network subif the frame will be sent through
+ *
+ * Lookup next hop for given skb and start path discovery if no
+ * forwarding information is found.
+ *
+ * Returns: 0 if the next hop was found and -ENOENT if the frame was queued.
+ * skb is freeed here if no mpath could be allocated.
+ */
+int rtw_mesh_nexthop_resolve(_adapter *adapter,
+			struct xmit_frame *xframe)
+{
+	struct pkt_attrib *attrib = &xframe->attrib;
+	struct rtw_mesh_path *mpath;
+	struct xmit_frame *xframe_to_free = NULL;
+	u8 *target_addr = attrib->mda;
+	int err = 0;
+	int ret = _SUCCESS;
+
+	rtw_rcu_read_lock();
+	err = rtw_mesh_nexthop_lookup(adapter, target_addr, attrib->msa, attrib->ra);
+	if (!err)
+		goto endlookup;
+
+	/* no nexthop found, start resolving */
+	mpath = rtw_mesh_path_lookup(adapter, target_addr);
+	if (!mpath) {
+		mpath = rtw_mesh_path_add(adapter, target_addr);
+		if (IS_ERR(mpath)) {
+			xframe->pkt = NULL; /* free pkt outside */
+			rtw_mesh_path_discard_frame(adapter, xframe);
+			err = PTR_ERR(mpath);
+			ret = _FAIL;
+			goto endlookup;
+		}
+	}
+
+	if (!(mpath->flags & RTW_MESH_PATH_RESOLVING))
+		rtw_mesh_queue_preq(mpath, RTW_PREQ_Q_F_START);
+
+	enter_critical_bh(&mpath->frame_queue.lock);
+
+	if (mpath->frame_queue_len >= RTW_MESH_FRAME_QUEUE_LEN) {
+		xframe_to_free = LIST_CONTAINOR(get_next(get_list_head(&mpath->frame_queue)), struct xmit_frame, list);
+		rtw_list_delete(&(xframe_to_free->list));
+		mpath->frame_queue_len--;
+	}
+
+	rtw_list_insert_tail(&xframe->list, get_list_head(&mpath->frame_queue));
+	mpath->frame_queue_len++;
+
+	exit_critical_bh(&mpath->frame_queue.lock);
+
+	ret = RTW_RA_RESOLVING;
+	if (xframe_to_free)
+		rtw_mesh_path_discard_frame(adapter, xframe_to_free);
+
+endlookup:
+	rtw_rcu_read_unlock();
+	return ret;
+}
+
+/**
+ * rtw_mesh_nexthop_lookup - put the appropriate next hop on a mesh frame. Calling
+ * this function is considered "using" the associated mpath, so preempt a path
+ * refresh if this mpath expires soon.
+ *
+ * @skb: 802.11 frame to be sent
+ * @sdata: network subif the frame will be sent through
+ *
+ * Returns: 0 if the next hop was found. Nonzero otherwise.
+ */
+int rtw_mesh_nexthop_lookup(_adapter *adapter,
+	const u8 *mda, const u8 *msa, u8 *ra)
+{
+	struct rtw_mesh_path *mpath;
+	struct sta_info *next_hop;
+	const u8 *target_addr = mda;
+	int err = -ENOENT;
+
+	rtw_rcu_read_lock();
+	mpath = rtw_mesh_path_lookup(adapter, target_addr);
+
+	if (!mpath || !(mpath->flags & RTW_MESH_PATH_ACTIVE))
+		goto endlookup;
+
+	if (rtw_time_after(rtw_get_current_time(),
+		       mpath->exp_time -
+		       rtw_ms_to_systime(adapter->mesh_cfg.path_refresh_time)) &&
+	    _rtw_memcmp(adapter_mac_addr(adapter), msa, ETH_ALEN) == _TRUE &&
+	    !(mpath->flags & RTW_MESH_PATH_RESOLVING) &&
+	    !(mpath->flags & RTW_MESH_PATH_FIXED)) {
+		rtw_mesh_queue_preq(mpath, RTW_PREQ_Q_F_START | RTW_PREQ_Q_F_REFRESH);
+	}
+
+	next_hop = rtw_rcu_dereference(mpath->next_hop);
+	if (next_hop) {
+		_rtw_memcpy(ra, next_hop->cmn.mac_addr, ETH_ALEN);
+		err = 0;
+	}
+
+endlookup:
+	rtw_rcu_read_unlock();
+	return err;
+}
+
+#if CONFIG_RTW_MESH_DATA_BMC_TO_UC
+static bool rtw_mesh_data_bmc_to_uc(_adapter *adapter
+	, const u8 *da, const u8 *sa, const u8 *mda, const u8 *msa
+	, u8 ae_need, const u8 *ori_ta, u8 mfwd_ttl
+	, _list *b2u_list, u8 *b2u_num, u32 *b2u_mseq)
+{
+	struct sta_priv *stapriv = &adapter->stapriv;
+	struct xmit_priv *xmitpriv = &adapter->xmitpriv;
+	_irqL irqL;
+	_list *head, *list;
+	struct sta_info *sta;
+	char b2u_sta_id[NUM_STA];
+	u8 b2u_sta_num = 0;
+	bool bmc_need = _FALSE;
+	int i;
+
+	_enter_critical_bh(&stapriv->asoc_list_lock, &irqL);
+	head = &stapriv->asoc_list;
+	list = get_next(head);
+
+	while ((rtw_end_of_queue_search(head, list)) == _FALSE) {
+		int stainfo_offset;
+
+		sta = LIST_CONTAINOR(list, struct sta_info, asoc_list);
+		list = get_next(list);
+	
+		stainfo_offset = rtw_stainfo_offset(stapriv, sta);
+		if (stainfo_offset_valid(stainfo_offset))
+			b2u_sta_id[b2u_sta_num++] = stainfo_offset;
+	}
+	_exit_critical_bh(&stapriv->asoc_list_lock, &irqL);
+
+	if (!b2u_sta_num)
+		goto exit;
+
+	for (i = 0; i < b2u_sta_num; i++) {
+		struct xmit_frame *b2uframe;
+		struct pkt_attrib *attrib;
+
+		sta = rtw_get_stainfo_by_offset(stapriv, b2u_sta_id[i]);
+		if (!(sta->state & _FW_LINKED)
+			|| _rtw_memcmp(sta->cmn.mac_addr, msa, ETH_ALEN) == _TRUE
+			|| (ori_ta && _rtw_memcmp(sta->cmn.mac_addr, ori_ta, ETH_ALEN) == _TRUE)
+			|| is_broadcast_mac_addr(sta->cmn.mac_addr)
+			|| is_zero_mac_addr(sta->cmn.mac_addr))
+			continue;
+
+		b2uframe = rtw_alloc_xmitframe(xmitpriv);
+		if (!b2uframe) {
+			bmc_need = _TRUE;
+			break;
+		}
+
+		if ((*b2u_num)++ == 0 && !ori_ta) {
+			*b2u_mseq = (cpu_to_le32(adapter->mesh_info.mesh_seqnum));
+			adapter->mesh_info.mesh_seqnum++;
+		}
+
+		attrib = &b2uframe->attrib;
+
+		attrib->mb2u = 1;
+		attrib->mseq = *b2u_mseq;
+		attrib->mfwd_ttl = ori_ta ? mfwd_ttl : 0;
+		_rtw_memcpy(attrib->ra, sta->cmn.mac_addr, ETH_ALEN);
+		_rtw_memcpy(attrib->ta, adapter_mac_addr(adapter), ETH_ALEN);
+		_rtw_memcpy(attrib->mda, mda, ETH_ALEN);
+		_rtw_memcpy(attrib->msa, msa, ETH_ALEN);
+		_rtw_memcpy(attrib->dst, da, ETH_ALEN);
+		_rtw_memcpy(attrib->src, sa, ETH_ALEN);
+		attrib->mesh_frame_mode = ae_need ? MESH_UCAST_PX_DATA : MESH_UCAST_DATA;
+
+		rtw_list_insert_tail(&b2uframe->list, b2u_list);
+	}
+
+exit:
+	return bmc_need;
+}
+
+void dump_mesh_b2u_flags(void *sel, _adapter *adapter)
+{
+	struct rtw_mesh_cfg *mcfg = &adapter->mesh_cfg;
+
+	RTW_PRINT_SEL(sel, "%4s %4s\n", "msrc", "mfwd");
+	RTW_PRINT_SEL(sel, "0x%02x 0x%02x\n", mcfg->b2u_flags_msrc, mcfg->b2u_flags_mfwd);
+}
+#endif /* CONFIG_RTW_MESH_DATA_BMC_TO_UC */
+
+int rtw_mesh_addr_resolve(_adapter *adapter, struct xmit_frame *xframe, _pkt *pkt, _list *b2u_list)
+{
+	struct pkt_file pktfile;
+	struct ethhdr etherhdr;
+	struct pkt_attrib *attrib;
+	struct rtw_mesh_path *mpath = NULL, *mppath = NULL;
+	u8 is_da_mcast;
+	u8 ae_need;
+#if CONFIG_RTW_MESH_DATA_BMC_TO_UC
+	bool bmc_need = _TRUE;
+	u8 b2u_num = 0;
+	u32 b2u_mseq = 0;
+#endif
+	int res = _SUCCESS;
+
+	_rtw_open_pktfile(pkt, &pktfile);
+	if (_rtw_pktfile_read(&pktfile, (u8 *)&etherhdr, ETH_HLEN) != ETH_HLEN) {
+		res = _FAIL;
+		goto exit;
+	}
+	
+	xframe->pkt = pkt;
+#if CONFIG_RTW_MESH_DATA_BMC_TO_UC
+	_rtw_init_listhead(b2u_list);
+#endif
+
+	is_da_mcast = IS_MCAST(etherhdr.h_dest);
+	if (!is_da_mcast) {
+		struct sta_info *next_hop; 
+		bool mpp_lookup = 1;
+	
+		mpath = rtw_mesh_path_lookup(adapter, etherhdr.h_dest);
+		if (mpath) {
+			mpp_lookup = 0;
+			next_hop = rtw_rcu_dereference(mpath->next_hop);
+			if (!next_hop
+				|| !(mpath->flags & (RTW_MESH_PATH_ACTIVE | RTW_MESH_PATH_RESOLVING))
+			) {
+				/* mpath is not valid, search mppath */
+				mpp_lookup = 1;
+			}
+		}
+
+		if (mpp_lookup) {
+			mppath = rtw_mpp_path_lookup(adapter, etherhdr.h_dest);
+			if (mppath)
+				mppath->exp_time = rtw_get_current_time();
+		}
+
+		if (mppath && mpath)
+			rtw_mesh_path_del(adapter, mpath->dst);
+
+		ae_need = _rtw_memcmp(adapter_mac_addr(adapter), etherhdr.h_source, ETH_ALEN) == _FALSE
+			|| (mppath && _rtw_memcmp(mppath->mpp, etherhdr.h_dest, ETH_ALEN) == _FALSE);
+	} else {
+		ae_need = _rtw_memcmp(adapter_mac_addr(adapter), etherhdr.h_source, ETH_ALEN) == _FALSE;
+
+		#if CONFIG_RTW_MESH_DATA_BMC_TO_UC
+		if (rtw_msrc_b2u_policy_chk(adapter->mesh_cfg.b2u_flags_msrc, etherhdr.h_dest)) {
+			bmc_need = rtw_mesh_data_bmc_to_uc(adapter
+				, etherhdr.h_dest, etherhdr.h_source
+				, etherhdr.h_dest, adapter_mac_addr(adapter), ae_need, NULL, 0
+				, b2u_list, &b2u_num, &b2u_mseq);
+			if (bmc_need == _FALSE) {
+				res = RTW_BMC_NO_NEED;
+				goto exit;
+			}
+		}
+		#endif
+	}
+
+	attrib = &xframe->attrib;
+
+#if CONFIG_RTW_MESH_DATA_BMC_TO_UC
+	if (b2u_num) {
+		attrib->mb2u = 1;
+		attrib->mseq = b2u_mseq;
+	} else
+		attrib->mb2u = 0;
+#endif
+
+	attrib->mfwd_ttl = 0;
+	_rtw_memcpy(attrib->dst, etherhdr.h_dest, ETH_ALEN);
+	_rtw_memcpy(attrib->src, etherhdr.h_source, ETH_ALEN);
+	_rtw_memcpy(attrib->ta, adapter_mac_addr(adapter), ETH_ALEN);
+
+	if (is_da_mcast) {
+		attrib->mesh_frame_mode = ae_need ? MESH_BMCAST_PX_DATA : MESH_BMCAST_DATA;
+		_rtw_memcpy(attrib->ra, attrib->dst, ETH_ALEN);
+		_rtw_memcpy(attrib->msa, adapter_mac_addr(adapter), ETH_ALEN);
+	} else {
+		attrib->mesh_frame_mode = ae_need ? MESH_UCAST_PX_DATA : MESH_UCAST_DATA;
+		_rtw_memcpy(attrib->mda, (mppath && ae_need) ? mppath->mpp : attrib->dst, ETH_ALEN);
+		_rtw_memcpy(attrib->msa, adapter_mac_addr(adapter), ETH_ALEN);
+		/* RA needs to be resolved */
+		res = rtw_mesh_nexthop_resolve(adapter, xframe);
+	}
+
+exit:
+	return res;
+}
+
+s8 rtw_mesh_tx_set_whdr_mctrl_len(u8 mesh_frame_mode, struct pkt_attrib *attrib)
+{
+	u8 ret = 0;
+	switch (mesh_frame_mode) {
+	case MESH_UCAST_DATA:
+		attrib->hdrlen = WLAN_HDR_A4_QOS_LEN;
+		/* mesh flag + mesh TTL + Mesh SN. no ext addr. */
+		attrib->meshctrl_len = 6;
+		break;
+	case MESH_BMCAST_DATA:
+		attrib->hdrlen = WLAN_HDR_A3_QOS_LEN;
+		/* mesh flag + mesh TTL + Mesh SN. no ext addr. */
+		attrib->meshctrl_len = 6;
+		break;
+	case MESH_UCAST_PX_DATA:
+		attrib->hdrlen = WLAN_HDR_A4_QOS_LEN;
+		/* mesh flag + mesh TTL + Mesh SN + extaddr1 + extaddr2. */
+		attrib->meshctrl_len = 18;
+		break;
+	case MESH_BMCAST_PX_DATA:
+		attrib->hdrlen = WLAN_HDR_A3_QOS_LEN;
+		/* mesh flag + mesh TTL + Mesh SN + extaddr1 */
+		attrib->meshctrl_len = 12;
+		break;
+	default:
+		RTW_WARN("Invalid mesh frame mode:%u\n", mesh_frame_mode);
+		ret = -1;
+		break;
+	}				
+
+	return ret;
+}
+
+void rtw_mesh_tx_build_mctrl(_adapter *adapter, struct pkt_attrib *attrib, u8 *buf)
+{
+	struct rtw_ieee80211s_hdr *mctrl = (struct rtw_ieee80211s_hdr *)buf;
+
+	_rtw_memset(mctrl, 0, XATTRIB_GET_MCTRL_LEN(attrib));
+
+	if (attrib->mfwd_ttl
+		#if CONFIG_RTW_MESH_DATA_BMC_TO_UC
+		|| attrib->mb2u
+		#endif
+	) {
+		#if CONFIG_RTW_MESH_DATA_BMC_TO_UC
+		if (!attrib->mfwd_ttl)
+			mctrl->ttl = adapter->mesh_cfg.dot11MeshTTL;
+		else
+		#endif
+			mctrl->ttl = attrib->mfwd_ttl;
+
+		mctrl->seqnum = (cpu_to_le32(attrib->mseq));
+	} else {
+		mctrl->ttl = adapter->mesh_cfg.dot11MeshTTL;
+		mctrl->seqnum = (cpu_to_le32(adapter->mesh_info.mesh_seqnum));
+		adapter->mesh_info.mesh_seqnum++;
+	}
+
+	switch (attrib->mesh_frame_mode){
+	case MESH_UCAST_DATA:
+	case MESH_BMCAST_DATA:
+		break;
+	case MESH_UCAST_PX_DATA:
+		mctrl->flags |= MESH_FLAGS_AE_A5_A6;
+		_rtw_memcpy(mctrl->eaddr1, attrib->dst, ETH_ALEN);
+		_rtw_memcpy(mctrl->eaddr2, attrib->src, ETH_ALEN);
+		break;
+	case MESH_BMCAST_PX_DATA:
+		mctrl->flags |= MESH_FLAGS_AE_A4;
+		_rtw_memcpy(mctrl->eaddr1, attrib->src, ETH_ALEN);
+		break;
+	case MESH_MHOP_UCAST_ACT:
+		/* TBD */
+		break;
+	case MESH_MHOP_BMCAST_ACT:
+		/* TBD */
+		break;
+	default:
+		break;
+	}
+}
+
+u8 rtw_mesh_tx_build_whdr(_adapter *adapter, struct pkt_attrib *attrib
+	, u16 *fctrl, struct rtw_ieee80211_hdr *whdr)
+{
+	switch (attrib->mesh_frame_mode) {
+	case MESH_UCAST_DATA:		/* 1, 1, RA, TA, mDA(=DA),	mSA(=SA) */
+	case MESH_UCAST_PX_DATA:	/* 1, 1, RA, TA, mDA,		mSA,		[DA, SA] */
+		SetToDs(fctrl);
+		SetFrDs(fctrl);
+		_rtw_memcpy(whdr->addr1, attrib->ra, ETH_ALEN);
+		_rtw_memcpy(whdr->addr2, attrib->ta, ETH_ALEN);
+		_rtw_memcpy(whdr->addr3, attrib->mda, ETH_ALEN);
+		_rtw_memcpy(whdr->addr4, attrib->msa, ETH_ALEN);
+		break;
+	case MESH_BMCAST_DATA:		/* 0, 1, RA(DA), TA, mSA(SA) */
+	case MESH_BMCAST_PX_DATA:	/* 0, 1, RA(DA), TA, mSA,		[SA] */
+		SetFrDs(fctrl);
+		_rtw_memcpy(whdr->addr1, attrib->ra, ETH_ALEN);
+		_rtw_memcpy(whdr->addr2, attrib->ta, ETH_ALEN);
+		_rtw_memcpy(whdr->addr3, attrib->msa, ETH_ALEN);
+		break;
+	case MESH_MHOP_UCAST_ACT:
+		/* TBD */
+		RTW_INFO("MESH_MHOP_UCAST_ACT\n");
+		break;
+	case MESH_MHOP_BMCAST_ACT:
+		/* TBD */
+		RTW_INFO("MESH_MHOP_BMCAST_ACT\n");
+		break;
+	default:
+		RTW_WARN("Invalid mesh frame mode\n");
+		break;
+	}
+	
+	return 0;
+}
+
+int rtw_mesh_rx_data_validate_hdr(_adapter *adapter, union recv_frame *rframe, struct sta_info **sta)
+{
+	struct sta_priv *stapriv = &adapter->stapriv;
+	struct rx_pkt_attrib *rattrib = &rframe->u.hdr.attrib;
+	u8 *whdr = get_recvframe_data(rframe);
+	u8 is_ra_bmc = 0;
+	u8 a4_shift = 0;
+	u8 ps;
+	u8 *qc;
+	u8 mps_mode = RTW_MESH_PS_UNKNOWN;
+	sint ret = _FAIL;
+
+	if (!(MLME_STATE(adapter) & WIFI_ASOC_STATE))
+		goto exit;
+
+	if (!rattrib->qos)
+		goto exit;
+
+	switch (rattrib->to_fr_ds) {
+	case 1:
+		if (!IS_MCAST(GetAddr1Ptr(whdr)))
+			goto exit;
+		*sta = rtw_get_stainfo(stapriv, get_addr2_ptr(whdr));
+		if (*sta == NULL) {
+			ret = _SUCCESS; /* return _SUCCESS to drop at sta checking */
+			goto exit;
+		}
+		_rtw_memcpy(rattrib->ra, GetAddr1Ptr(whdr), ETH_ALEN);
+		_rtw_memcpy(rattrib->ta, get_addr2_ptr(whdr), ETH_ALEN);
+		_rtw_memcpy(rattrib->mda, GetAddr1Ptr(whdr), ETH_ALEN);
+		_rtw_memcpy(rattrib->msa, GetAddr3Ptr(whdr), ETH_ALEN); /* may change after checking AMSDU subframe header */
+		_rtw_memcpy(rattrib->dst, GetAddr1Ptr(whdr), ETH_ALEN);
+		_rtw_memcpy(rattrib->src, GetAddr3Ptr(whdr), ETH_ALEN); /* may change after checking mesh ctrl field */
+		_rtw_memcpy(rattrib->bssid, get_addr2_ptr(whdr), ETH_ALEN);
+		is_ra_bmc = 1;
+		break;
+	case 3:
+		if (IS_MCAST(GetAddr1Ptr(whdr)))
+			goto exit;
+		*sta = rtw_get_stainfo(stapriv, get_addr2_ptr(whdr));
+		if (*sta == NULL) {
+			ret = _SUCCESS; /* return _SUCCESS to drop at sta checking */
+			goto exit;
+		}
+		_rtw_memcpy(rattrib->ra, GetAddr1Ptr(whdr), ETH_ALEN);
+		_rtw_memcpy(rattrib->ta, get_addr2_ptr(whdr), ETH_ALEN);
+		_rtw_memcpy(rattrib->mda, GetAddr3Ptr(whdr), ETH_ALEN); /* may change after checking AMSDU subframe header */
+		_rtw_memcpy(rattrib->msa, GetAddr4Ptr(whdr), ETH_ALEN); /* may change after checking AMSDU subframe header */
+		_rtw_memcpy(rattrib->dst, GetAddr3Ptr(whdr), ETH_ALEN); /* may change after checking mesh ctrl field */
+		_rtw_memcpy(rattrib->src, GetAddr4Ptr(whdr), ETH_ALEN); /* may change after checking mesh ctrl field */
+		_rtw_memcpy(rattrib->bssid, get_addr2_ptr(whdr), ETH_ALEN);
+		a4_shift = ETH_ALEN;
+		break;
+	default:
+		goto exit;
+	}
+
+	qc = whdr + WLAN_HDR_A3_LEN + a4_shift;
+	ps = GetPwrMgt(whdr);
+	mps_mode = ps ? (is_ra_bmc || (get_mps_lv(qc)) ? RTW_MESH_PS_DSLEEP : RTW_MESH_PS_LSLEEP) : RTW_MESH_PS_ACTIVE;
+
+	if (ps) {
+		if (!((*sta)->state & WIFI_SLEEP_STATE))
+			stop_sta_xmit(adapter, *sta);
+	} else {
+		if ((*sta)->state & WIFI_SLEEP_STATE)
+			wakeup_sta_to_xmit(adapter, *sta);
+	}
+
+	if (is_ra_bmc)
+		(*sta)->nonpeer_mps = mps_mode;
+	else {
+		(*sta)->peer_mps = mps_mode;
+		if (mps_mode != RTW_MESH_PS_ACTIVE && (*sta)->nonpeer_mps == RTW_MESH_PS_ACTIVE)
+			(*sta)->nonpeer_mps = RTW_MESH_PS_DSLEEP;
+	}
+
+	if (get_frame_sub_type(whdr) & BIT(6)) {
+		/* No data, will not indicate to upper layer, temporily count it here */
+		count_rx_stats(adapter, rframe, *sta);
+		ret = RTW_RX_HANDLED;
+		goto exit;
+	}
+
+	rattrib->mesh_ctrl_present = get_mctrl_present(qc) ? 1 : 0;
+	if (!rattrib->mesh_ctrl_present)
+		goto exit;
+
+	ret = _SUCCESS;
+
+exit:
+	return ret;
+}
+
+int rtw_mesh_rx_data_validate_mctrl(_adapter *adapter, union recv_frame *rframe
+	, const struct rtw_ieee80211s_hdr *mctrl, const u8 *mda, const u8 *msa
+	, u8 *mctrl_len
+	, const u8 **da, const u8 **sa)
+{
+	struct rx_pkt_attrib *rattrib = &rframe->u.hdr.attrib;
+	u8 mlen;
+	u8 ae;
+	int ret = _SUCCESS;
+
+	ae = mctrl->flags & MESH_FLAGS_AE;
+	mlen = ae_to_mesh_ctrl_len[ae];
+	switch (rattrib->to_fr_ds) {
+	case 1:
+		*da = mda;
+		if (ae == MESH_FLAGS_AE_A4)
+			*sa = mctrl->eaddr1;
+		else if (ae == 0)
+			*sa = msa;
+		else
+			ret = _FAIL;
+		break;
+	case 3:
+		if (ae == MESH_FLAGS_AE_A5_A6) {
+			*da = mctrl->eaddr1;
+			*sa = mctrl->eaddr2;
+		} else if (ae == 0) {
+			*da = mda;
+			*sa = msa;
+		} else
+			ret = _FAIL;
+		break;
+	default:
+		ret = _FAIL;
+	}
+
+	if (ret == _FAIL) {
+		#ifdef DBG_RX_DROP_FRAME
+		RTW_INFO("DBG_RX_DROP_FRAME "FUNC_ADPT_FMT" invalid tfDS:%u AE:%u combination ra="MAC_FMT" ta="MAC_FMT"\n"
+			, FUNC_ADPT_ARG(adapter), rattrib->to_fr_ds, ae, MAC_ARG(rattrib->ra), MAC_ARG(rattrib->ta));
+		#endif
+		*mctrl_len = 0;
+	} else
+		*mctrl_len = mlen;
+
+	return ret;	
+}
+
+inline int rtw_mesh_rx_validate_mctrl_non_amsdu(_adapter *adapter, union recv_frame *rframe)
+{
+	struct rx_pkt_attrib *rattrib = &rframe->u.hdr.attrib;
+	const u8 *da, *sa;
+	int ret;
+
+	ret = rtw_mesh_rx_data_validate_mctrl(adapter, rframe
+			, (struct rtw_ieee80211s_hdr *)(get_recvframe_data(rframe) + rattrib->hdrlen + rattrib->iv_len)
+			, rattrib->mda, rattrib->msa
+			, &rattrib->mesh_ctrl_len
+			, &da, &sa);
+
+	if (ret == _SUCCESS) {
+		_rtw_memcpy(rattrib->dst, da, ETH_ALEN);
+		_rtw_memcpy(rattrib->src, sa, ETH_ALEN);
+	}
+
+	return ret;
+}
+
+/**
+ * rtw_mesh_rx_nexthop_resolve - lookup next hop; conditionally start path discovery
+ *
+ * @skb: 802.11 frame to be sent
+ * @sdata: network subif the frame will be sent through
+ *
+ * Lookup next hop for given skb and start path discovery if no
+ * forwarding information is found.
+ *
+ * Returns: 0 if the next hop was found and -ENOENT if the frame was queued.
+ * skb is freeed here if no mpath could be allocated.
+ */
+static int rtw_mesh_rx_nexthop_resolve(_adapter *adapter,
+	const u8 *mda, const u8 *msa, u8 *ra)
+{
+	struct rtw_mesh_path *mpath;
+	struct xmit_frame *xframe_to_free = NULL;
+	int err = 0;
+	int ret = _SUCCESS;
+
+	rtw_rcu_read_lock();
+	err = rtw_mesh_nexthop_lookup(adapter, mda, msa, ra);
+	if (!err)
+		goto endlookup;
+
+	/* no nexthop found, start resolving */
+	mpath = rtw_mesh_path_lookup(adapter, mda);
+	if (!mpath) {
+		mpath = rtw_mesh_path_add(adapter, mda);
+		if (IS_ERR(mpath)) {
+			err = PTR_ERR(mpath);
+			ret = _FAIL;
+			goto endlookup;
+		}
+	}
+
+	if (!(mpath->flags & RTW_MESH_PATH_RESOLVING))
+		rtw_mesh_queue_preq(mpath, RTW_PREQ_Q_F_START);
+
+	ret = _FAIL;
+
+endlookup:
+	rtw_rcu_read_unlock();
+	return ret;
+}
+
+#define RTW_MESH_DECACHE_BMC 1
+#define RTW_MESH_DECACHE_UC 0
+
+#define RTW_MESH_FORWARD_MDA_SELF_COND 0
+#define DBG_RTW_MESH_FORWARD_MDA_SELF_COND 0
+int rtw_mesh_rx_msdu_act_check(union recv_frame *rframe
+	, const u8 *mda, const u8 *msa
+	, const u8 *da, const u8 *sa
+	, struct rtw_ieee80211s_hdr *mctrl
+	, struct xmit_frame **fwd_frame, _list *b2u_list)
+{
+	_adapter *adapter = rframe->u.hdr.adapter;
+	struct rtw_mesh_cfg *mcfg = &adapter->mesh_cfg;
+	struct rtw_mesh_info *minfo = &adapter->mesh_info;
+	struct rx_pkt_attrib *rattrib = &rframe->u.hdr.attrib;
+	struct rtw_mesh_path *mppath;
+	u8 is_mda_bmc = IS_MCAST(mda); 
+	u8 is_mda_self = !is_mda_bmc && _rtw_memcmp(mda, adapter_mac_addr(adapter), ETH_ALEN);
+	struct xmit_frame *xframe;
+	struct pkt_attrib *xattrib;
+	u8 fwd_ra[ETH_ALEN] = {0};
+	u8 fwd_mpp[ETH_ALEN] = {0}; /* forward to other gate */
+	u32 fwd_mseq;
+	int act = 0;
+	u8 ae_need;
+#if CONFIG_RTW_MESH_DATA_BMC_TO_UC
+	bool bmc_need = _TRUE;
+	u8 b2u_num = 0;
+#endif
+
+	/* fwd info lifetime update */
+	#if 0
+	if (!is_mda_self)
+		mDA(A3) fwinfo.lifetime
+	mSA(A4) fwinfo.lifetime
+	Precursor-to-mDA(A2) fwinfo.lifetime
+	#endif
+
+	/* update/create pxoxy info for SA, mSA */
+	if ((mctrl->flags & MESH_FLAGS_AE)
+		&& sa != msa && _rtw_memcmp(sa, msa, ETH_ALEN) == _FALSE
+	) {
+		const u8 *proxied_addr = sa;
+		const u8 *mpp_addr = msa;
+
+		rtw_rcu_read_lock();
+		mppath = rtw_mpp_path_lookup(adapter, proxied_addr);
+		if (!mppath)
+			rtw_mpp_path_add(adapter, proxied_addr, mpp_addr);
+		else {
+			enter_critical_bh(&mppath->state_lock);
+			if (_rtw_memcmp(mppath->mpp, mpp_addr, ETH_ALEN) == _FALSE)
+				_rtw_memcpy(mppath->mpp, mpp_addr, ETH_ALEN);
+			mppath->exp_time = rtw_get_current_time();
+			exit_critical_bh(&mppath->state_lock);
+		}
+		rtw_rcu_read_unlock();
+	}
+
+	/* mSA is self, need no further process */
+	if (_rtw_memcmp(msa, adapter_mac_addr(adapter), ETH_ALEN) == _TRUE)
+		goto exit;
+
+	fwd_mseq = le32_to_cpu(mctrl->seqnum);
+
+	/* check duplicate MSDU from mSA */
+	if (((RTW_MESH_DECACHE_BMC && is_mda_bmc)
+			|| (RTW_MESH_DECACHE_UC && !is_mda_bmc))
+		&& rtw_mesh_decache(adapter, msa, fwd_mseq)
+	) {
+		minfo->mshstats.dropped_frames_duplicate++;
+		goto exit;
+	}
+
+	if (is_mda_bmc) {
+		/* mDA is bmc addr */
+		act |= RTW_RX_MSDU_ACT_INDICATE;
+		if (!mcfg->dot11MeshForwarding)
+			goto exit;
+		goto fwd_chk;
+
+	} else if (!is_mda_self) {
+		/* mDA is unicast but not self */
+		if (!mcfg->dot11MeshForwarding) {
+			rtw_mesh_path_error_tx(adapter
+				, adapter->mesh_cfg.element_ttl
+				, mda, 0
+				, WLAN_REASON_MESH_PATH_NOFORWARD
+				, rattrib->ta
+			);
+			#ifdef DBG_RX_DROP_FRAME
+			RTW_INFO("DBG_RX_DROP_FRAME "FUNC_ADPT_FMT" mDA("MAC_FMT") not self, !dot11MeshForwarding\n"
+				, FUNC_ADPT_ARG(adapter), MAC_ARG(mda));
+			#endif
+			goto exit;
+		}
+
+		if (rtw_mesh_rx_nexthop_resolve(adapter, mda, msa, fwd_ra) != _SUCCESS) {
+			/* mDA is unknown */
+			rtw_mesh_path_error_tx(adapter
+				, adapter->mesh_cfg.element_ttl
+				, mda, 0
+				, WLAN_REASON_MESH_PATH_NOFORWARD
+				, rattrib->ta
+			);
+			#ifdef DBG_RX_DROP_FRAME
+			RTW_INFO("DBG_RX_DROP_FRAME "FUNC_ADPT_FMT" mDA("MAC_FMT") unknown\n"
+				, FUNC_ADPT_ARG(adapter), MAC_ARG(mda));
+			#endif
+			minfo->mshstats.dropped_frames_no_route++;
+			goto exit;
+
+		} else {
+			/* mDA is known in fwd info */
+			#if 0
+			if	(TA is not in precursors)
+				goto exit;
+			#endif
+			goto fwd_chk;
+		}
+
+	} else {
+		/* mDA is self */
+		#if RTW_MESH_FORWARD_MDA_SELF_COND
+		if (da == mda
+			|| _rtw_memcmp(da, adapter_mac_addr(adapter), ETH_ALEN)
+		) {
+			/* DA is self, indicate */
+			act |= RTW_RX_MSDU_ACT_INDICATE;
+			goto exit;
+		}
+
+		if (rtw_get_iface_by_macddr(adapter, da)) {
+			/* DA is buddy, indicate */
+			act |= RTW_RX_MSDU_ACT_INDICATE;
+			#if DBG_RTW_MESH_FORWARD_MDA_SELF_COND
+			RTW_INFO(FUNC_ADPT_FMT" DA("MAC_FMT") is buddy("ADPT_FMT")\n"
+				, FUNC_ADPT_ARG(adapter), MAC_ARG(da), ADPT_ARG(rtw_get_iface_by_macddr(adapter, da)));
+			#endif
+			goto exit;
+		}
+
+		/* DA is not self or buddy */
+		if (rtw_mesh_nexthop_lookup(adapter, da, msa, fwd_ra) == 0) {
+			/* DA is known in fwd info */
+			if (!mcfg->dot11MeshForwarding) {
+				/* path error to? */
+				#if defined(DBG_RX_DROP_FRAME) || DBG_RTW_MESH_FORWARD_MDA_SELF_COND
+				RTW_INFO("DBG_RX_DROP_FRAME "FUNC_ADPT_FMT" DA("MAC_FMT") not self, !dot11MeshForwarding\n"
+					, FUNC_ADPT_ARG(adapter), MAC_ARG(da));
+				#endif
+				goto exit;
+			}
+			mda = da;
+			#if DBG_RTW_MESH_FORWARD_MDA_SELF_COND
+			RTW_INFO(FUNC_ADPT_FMT" fwd to DA("MAC_FMT"), fwd_RA("MAC_FMT")\n"
+				, FUNC_ADPT_ARG(adapter), MAC_ARG(da), MAC_ARG(fwd_ra));
+			#endif
+			goto fwd_chk;
+		}
+
+		rtw_rcu_read_lock();
+		mppath = rtw_mpp_path_lookup(adapter, da);
+		if (mppath) {
+			if (_rtw_memcmp(mppath->mpp, adapter_mac_addr(adapter), ETH_ALEN) == _FALSE) {
+				/* DA is proxied by others */
+				if (!mcfg->dot11MeshForwarding) {
+					/* path error to? */
+					#if defined(DBG_RX_DROP_FRAME) || DBG_RTW_MESH_FORWARD_MDA_SELF_COND
+					RTW_INFO("DBG_RX_DROP_FRAME "FUNC_ADPT_FMT" DA("MAC_FMT") is proxied by ("MAC_FMT"), !dot11MeshForwarding\n"
+						, FUNC_ADPT_ARG(adapter), MAC_ARG(da), MAC_ARG(mppath->mpp));
+					#endif
+					rtw_rcu_read_unlock();
+					goto exit;
+				}
+				_rtw_memcpy(fwd_mpp, mppath->mpp, ETH_ALEN);
+				mda = fwd_mpp;
+				msa = adapter_mac_addr(adapter);
+				rtw_rcu_read_unlock();
+
+				/* resolve RA */
+				if (rtw_mesh_nexthop_lookup(adapter, mda, msa, fwd_ra) != 0) {
+					minfo->mshstats.dropped_frames_no_route++;
+					#if defined(DBG_RX_DROP_FRAME) || DBG_RTW_MESH_FORWARD_MDA_SELF_COND
+					RTW_INFO("DBG_RX_DROP_FRAME "FUNC_ADPT_FMT" DA("MAC_FMT") is proxied by ("MAC_FMT"), RA resolve fail\n"
+						, FUNC_ADPT_ARG(adapter), MAC_ARG(da), MAC_ARG(mppath->mpp));
+					#endif
+					goto exit;
+				}
+				#if DBG_RTW_MESH_FORWARD_MDA_SELF_COND
+				RTW_INFO(FUNC_ADPT_FMT" DA("MAC_FMT") is proxied by ("MAC_FMT"), fwd_RA("MAC_FMT")\n"
+					, FUNC_ADPT_ARG(adapter), MAC_ARG(da), MAC_ARG(mppath->mpp), MAC_ARG(fwd_ra));
+				#endif
+				goto fwd_chk; /*  forward to other gate */
+			} else {
+				#if DBG_RTW_MESH_FORWARD_MDA_SELF_COND
+				RTW_INFO(FUNC_ADPT_FMT" DA("MAC_FMT") is proxied by self\n"
+					, FUNC_ADPT_ARG(adapter), MAC_ARG(da));
+				#endif
+			}
+		}
+		rtw_rcu_read_unlock();
+
+		if (!mppath) {
+			#if DBG_RTW_MESH_FORWARD_MDA_SELF_COND
+			RTW_INFO(FUNC_ADPT_FMT" DA("MAC_FMT") unknown\n"
+				, FUNC_ADPT_ARG(adapter), MAC_ARG(da));
+			#endif
+			/* DA is unknown */
+			#if 0 /* TODO: flags with AE bit */
+			rtw_mesh_path_error_tx(adapter
+				, adapter->mesh_cfg.element_ttl
+				, mda, adapter->mesh_info.last_sn_update
+				, WLAN_REASON_MESH_PATH_NOPROXY
+				, msa
+			);
+			#endif
+		}
+
+		/*
+		* indicate to DS for both cases:
+		* 1.) DA is proxied by self
+		* 2.) DA is unknown
+		*/
+		#endif /* RTW_MESH_FORWARD_MDA_SELF_COND */
+		act |= RTW_RX_MSDU_ACT_INDICATE;
+		goto exit;
+	}
+
+fwd_chk:
+
+	if (adapter->stapriv.asoc_list_cnt <= 1)
+		goto exit;
+
+	if (mctrl->ttl == 1) {
+		minfo->mshstats.dropped_frames_ttl++;
+		if (!act) {
+			#ifdef DBG_RX_DROP_FRAME
+			RTW_INFO("DBG_RX_DROP_FRAME "FUNC_ADPT_FMT" ttl reaches 0, not forwarding\n"
+				, FUNC_ADPT_ARG(adapter));
+			#endif
+		}
+		goto exit;
+	}
+
+#if CONFIG_RTW_MESH_DATA_BMC_TO_UC
+	_rtw_init_listhead(b2u_list);
+#endif
+
+	ae_need = _rtw_memcmp(da , mda, ETH_ALEN) == _FALSE
+		|| _rtw_memcmp(sa , msa, ETH_ALEN) == _FALSE;
+
+#if CONFIG_RTW_MESH_DATA_BMC_TO_UC
+	if (is_mda_bmc
+		&& rtw_mfwd_b2u_policy_chk(mcfg->b2u_flags_mfwd, mda, rattrib->to_fr_ds == 3)
+	) {
+		bmc_need = rtw_mesh_data_bmc_to_uc(adapter
+			, da, sa, mda, msa, ae_need, rframe->u.hdr.psta->cmn.mac_addr, mctrl->ttl - 1
+			, b2u_list, &b2u_num, &fwd_mseq);
+	}
+
+	if (bmc_need == _TRUE)
+#endif
+	{
+		xframe = rtw_alloc_xmitframe(&adapter->xmitpriv);
+		if (!xframe) {
+			#ifdef DBG_TX_DROP_FRAME
+			RTW_INFO("DBG_TX_DROP_FRAME "FUNC_ADPT_FMT" rtw_alloc_xmitframe fail\n"
+				, FUNC_ADPT_ARG(adapter));
+			#endif
+			goto exit;
+		}
+
+		xattrib = &xframe->attrib;
+
+#if CONFIG_RTW_MESH_DATA_BMC_TO_UC
+		if (b2u_num)
+			xattrib->mb2u = 1;
+		else
+			xattrib->mb2u = 0;
+#endif
+		xattrib->mfwd_ttl = mctrl->ttl - 1;
+		xattrib->mseq = fwd_mseq;
+		_rtw_memcpy(xattrib->dst, da, ETH_ALEN);
+		_rtw_memcpy(xattrib->src, sa, ETH_ALEN);
+		_rtw_memcpy(xattrib->mda, mda, ETH_ALEN);
+		_rtw_memcpy(xattrib->msa, msa, ETH_ALEN);
+		_rtw_memcpy(xattrib->ta, adapter_mac_addr(adapter), ETH_ALEN);
+
+		if (is_mda_bmc) {
+			xattrib->mesh_frame_mode = ae_need ? MESH_BMCAST_PX_DATA : MESH_BMCAST_DATA;
+			_rtw_memcpy(xattrib->ra, mda, ETH_ALEN);
+		} else {
+			xattrib->mesh_frame_mode = ae_need ? MESH_UCAST_PX_DATA : MESH_UCAST_DATA;
+			_rtw_memcpy(xattrib->ra, fwd_ra, ETH_ALEN);
+		}
+
+		*fwd_frame = xframe;
+	}
+
+	act |= RTW_RX_MSDU_ACT_FORWARD;
+	if (is_mda_bmc)
+		minfo->mshstats.fwded_mcast++;
+	else
+		minfo->mshstats.fwded_unicast++;
+	minfo->mshstats.fwded_frames++;
+
+exit:
+	return act;
+}
+
+void dump_mesh_stats(void *sel, _adapter *adapter)
+{
+	struct rtw_mesh_info *minfo = &adapter->mesh_info;
+	struct rtw_mesh_stats *stats = &minfo->mshstats;
+
+	RTW_PRINT_SEL(sel, "fwd_bmc:%u\n", stats->fwded_mcast);
+	RTW_PRINT_SEL(sel, "fwd_uc:%u\n", stats->fwded_unicast);
+
+	RTW_PRINT_SEL(sel, "drop_ttl:%u\n", stats->dropped_frames_ttl);
+	RTW_PRINT_SEL(sel, "drop_no_route:%u\n", stats->dropped_frames_no_route);
+	RTW_PRINT_SEL(sel, "drop_congestion:%u\n", stats->dropped_frames_congestion);
+	RTW_PRINT_SEL(sel, "drop_dup:%u\n", stats->dropped_frames_duplicate);
+
+	RTW_PRINT_SEL(sel, "mrc_del_qlen:%u\n", stats->mrc_del_qlen);
+}
+#endif /* CONFIG_RTW_MESH */
+
diff --git a/rtl8723DS/core/mesh/rtw_mesh.h b/rtl8723DS/core/mesh/rtw_mesh.h
new file mode 100644
index 0000000..6f7f707
--- a/dev/null
+++ b/rtl8723DS/core/mesh/rtw_mesh.h
@@ -0,0 +1,534 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2007 - 2017 Realtek Corporation.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ *****************************************************************************/
+#ifndef __RTW_MESH_H_
+#define __RTW_MESH_H_
+
+#ifndef CONFIG_AP_MODE
+	#error "CONFIG_RTW_MESH can't be enabled when CONFIG_AP_MODE is not defined\n"
+#endif
+
+#define RTW_MESH_TTL				31
+#define RTW_MESH_PERR_MIN_INT			100
+#define RTW_MESH_DEFAULT_ELEMENT_TTL		31
+#define RTW_MESH_RANN_INTERVAL			5000
+#define RTW_MESH_PATH_TO_ROOT_TIMEOUT		6000
+#define RTW_MESH_DIAM_TRAVERSAL_TIME		50
+#define RTW_MESH_PATH_TIMEOUT			5000
+#define RTW_MESH_PREQ_MIN_INT			10
+#define RTW_MESH_MAX_PREQ_RETRIES		4
+#define RTW_MESH_MIN_DISCOVERY_TIMEOUT 		(2 * RTW_MESH_DIAM_TRAVERSAL_TIME)
+#define RTW_MESH_ROOT_CONFIRMATION_INTERVAL	2000
+#define RTW_MESH_PATH_REFRESH_TIME		1000
+#define RTW_MESH_ROOT_INTERVAL			5000
+
+#define RTW_MESH_SANE_METRIC_DELTA		100
+#define RTW_MESH_MAX_ROOT_ADD_CHK_CNT		2
+
+#define RTW_MESH_PLINK_UNKNOWN	0
+#define RTW_MESH_PLINK_LISTEN	1
+#define RTW_MESH_PLINK_OPN_SNT	2
+#define RTW_MESH_PLINK_OPN_RCVD 3
+#define RTW_MESH_PLINK_CNF_RCVD 4
+#define RTW_MESH_PLINK_ESTAB	5
+#define RTW_MESH_PLINK_HOLDING	6
+#define RTW_MESH_PLINK_BLOCKED	7
+
+extern const char *_rtw_mesh_plink_str[];
+#define rtw_mesh_plink_str(s) ((s <= RTW_MESH_PLINK_BLOCKED) ? _rtw_mesh_plink_str[s] : _rtw_mesh_plink_str[RTW_MESH_PLINK_UNKNOWN])
+
+#define RTW_MESH_PS_UNKNOWN 0
+#define RTW_MESH_PS_ACTIVE 1
+#define RTW_MESH_PS_LSLEEP 2
+#define RTW_MESH_PS_DSLEEP 3
+
+extern const char *_rtw_mesh_ps_str[];
+#define rtw_mesh_ps_str(mps) ((mps <= RTW_MESH_PS_DSLEEP) ? _rtw_mesh_ps_str[mps] : _rtw_mesh_ps_str[RTW_MESH_PS_UNKNOWN])
+
+#define GET_MESH_CONF_ELE_PATH_SEL_PROTO_ID(_iec)		LE_BITS_TO_1BYTE(((u8 *)(_iec)) + 0, 0, 8)
+#define GET_MESH_CONF_ELE_PATH_SEL_METRIC_ID(_iec)		LE_BITS_TO_1BYTE(((u8 *)(_iec)) + 1, 0, 8)
+#define GET_MESH_CONF_ELE_CONGEST_CTRL_MODE_ID(_iec)	LE_BITS_TO_1BYTE(((u8 *)(_iec)) + 2, 0, 8)
+#define GET_MESH_CONF_ELE_SYNC_METHOD_ID(_iec)			LE_BITS_TO_1BYTE(((u8 *)(_iec)) + 3, 0, 8)
+#define GET_MESH_CONF_ELE_AUTH_PROTO_ID(_iec)			LE_BITS_TO_1BYTE(((u8 *)(_iec)) + 4, 0, 8)
+
+#define GET_MESH_CONF_ELE_MESH_FORMATION(_iec)			LE_BITS_TO_1BYTE(((u8 *)(_iec)) + 5, 0, 8)
+#define GET_MESH_CONF_ELE_CTO_MGATE(_iec)				LE_BITS_TO_1BYTE(((u8 *)(_iec)) + 5, 0, 1)
+#define GET_MESH_CONF_ELE_NUM_OF_PEERINGS(_iec)			LE_BITS_TO_1BYTE(((u8 *)(_iec)) + 5, 1, 6)
+#define GET_MESH_CONF_ELE_CTO_AS(_iec)					LE_BITS_TO_1BYTE(((u8 *)(_iec)) + 5, 7, 1)
+
+#define GET_MESH_CONF_ELE_MESH_CAP(_iec)				LE_BITS_TO_1BYTE(((u8 *)(_iec)) + 6, 0, 8)
+#define GET_MESH_CONF_ELE_ACCEPT_PEERINGS(_iec)			LE_BITS_TO_1BYTE(((u8 *)(_iec)) + 6, 0, 1)
+#define GET_MESH_CONF_ELE_MCCA_SUP(_iec)				LE_BITS_TO_1BYTE(((u8 *)(_iec)) + 6, 1, 1)
+#define GET_MESH_CONF_ELE_MCCA_EN(_iec)					LE_BITS_TO_1BYTE(((u8 *)(_iec)) + 6, 2, 1)
+#define GET_MESH_CONF_ELE_FORWARDING(_iec)				LE_BITS_TO_1BYTE(((u8 *)(_iec)) + 6, 3, 1)
+#define GET_MESH_CONF_ELE_MBCA_EN(_iec)					LE_BITS_TO_1BYTE(((u8 *)(_iec)) + 6, 4, 1)
+#define GET_MESH_CONF_ELE_TBTT_ADJ(_iec)				LE_BITS_TO_1BYTE(((u8 *)(_iec)) + 6, 5, 1)
+#define GET_MESH_CONF_ELE_PS_LEVEL(_iec)				LE_BITS_TO_1BYTE(((u8 *)(_iec)) + 6, 6, 1)
+
+#define SET_MESH_CONF_ELE_PATH_SEL_PROTO_ID(_iec, _val)		SET_BITS_TO_LE_1BYTE(((u8 *)(_iec)) + 0, 0, 8, _val)
+#define SET_MESH_CONF_ELE_PATH_SEL_METRIC_ID(_iec, _val)	SET_BITS_TO_LE_1BYTE(((u8 *)(_iec)) + 1, 0, 8, _val)
+#define SET_MESH_CONF_ELE_CONGEST_CTRL_MODE_ID(_iec, _val)	SET_BITS_TO_LE_1BYTE(((u8 *)(_iec)) + 2, 0, 8, _val)
+#define SET_MESH_CONF_ELE_SYNC_METHOD_ID(_iec, _val)		SET_BITS_TO_LE_1BYTE(((u8 *)(_iec)) + 3, 0, 8, _val)
+#define SET_MESH_CONF_ELE_AUTH_PROTO_ID(_iec, _val)			SET_BITS_TO_LE_1BYTE(((u8 *)(_iec)) + 4, 0, 8, _val)
+
+#define SET_MESH_CONF_ELE_CTO_MGATE(_iec, _val)				SET_BITS_TO_LE_1BYTE(((u8 *)(_iec)) + 5, 0, 1, _val)
+#define SET_MESH_CONF_ELE_NUM_OF_PEERINGS(_iec, _val)		SET_BITS_TO_LE_1BYTE(((u8 *)(_iec)) + 5, 1, 6, _val)
+#define SET_MESH_CONF_ELE_CTO_AS(_iec, _val)				SET_BITS_TO_LE_1BYTE(((u8 *)(_iec)) + 5, 7, 1, _val)
+
+#define SET_MESH_CONF_ELE_ACCEPT_PEERINGS(_iec, _val)		SET_BITS_TO_LE_1BYTE(((u8 *)(_iec)) + 6, 0, 1, _val)
+#define SET_MESH_CONF_ELE_MCCA_SUP(_iec, _val)				SET_BITS_TO_LE_1BYTE(((u8 *)(_iec)) + 6, 1, 1, _val)
+#define SET_MESH_CONF_ELE_MCCA_EN(_iec, _val)				SET_BITS_TO_LE_1BYTE(((u8 *)(_iec)) + 6, 2, 1, _val)
+#define SET_MESH_CONF_ELE_FORWARDING(_iec, _val)			SET_BITS_TO_LE_1BYTE(((u8 *)(_iec)) + 6, 3, 1, _val)
+#define SET_MESH_CONF_ELE_MBCA_EN(_iec, _val)				SET_BITS_TO_LE_1BYTE(((u8 *)(_iec)) + 6, 4, 1, _val)
+#define SET_MESH_CONF_ELE_TBTT_ADJ(_iec, _val)				SET_BITS_TO_LE_1BYTE(((u8 *)(_iec)) + 6, 5, 1, _val)
+#define SET_MESH_CONF_ELE_PS_LEVEL(_iec, _val)				SET_BITS_TO_LE_1BYTE(((u8 *)(_iec)) + 6, 6, 1, _val)
+
+/* Mesh flags */
+#define MESH_FLAGS_AE		0x3 /* mask */
+#define MESH_FLAGS_AE_A4 	0x1
+#define MESH_FLAGS_AE_A5_A6	0x2
+
+/* Max number of paths */
+#define RTW_MESH_MAX_PATHS 1024
+
+#define RTW_PREQ_Q_F_START	0x1
+#define RTW_PREQ_Q_F_REFRESH	0x2
+#define RTW_PREQ_Q_F_CHK	0x4
+#define RTW_PREQ_Q_F_PEER_AKA	0x8
+struct rtw_mesh_preq_queue {
+	_list list;
+	u8 dst[ETH_ALEN];
+	u8 flags;
+};
+
+extern const u8 ae_to_mesh_ctrl_len[];
+
+enum mesh_frame_type {
+	MESH_UCAST_DATA		= 0x0,
+	MESH_BMCAST_DATA	= 0x1,
+	MESH_UCAST_PX_DATA	= 0x2,
+	MESH_BMCAST_PX_DATA	= 0x3,
+	MESH_MHOP_UCAST_ACT	= 0x4,
+	MESH_MHOP_BMCAST_ACT	= 0x5,
+};
+
+enum mpath_sel_frame_type {
+	MPATH_PREQ = 0,
+	MPATH_PREP,
+	MPATH_PERR,
+	MPATH_RANN
+};
+
+/**
+ * enum rtw_mesh_deferred_task_flags - mesh deferred tasks
+ *
+ *
+ *
+ * @RTW_MESH_WORK_HOUSEKEEPING: run the periodic mesh housekeeping tasks
+ * @RTW_MESH_WORK_ROOT: the mesh root station needs to send a frame
+ * @RTW_MESH_WORK_DRIFT_ADJUST: time to compensate for clock drift relative to other
+ * mesh nodes
+ * @RTW_MESH_WORK_MBSS_CHANGED: rebuild beacon and notify driver of BSS changes
+ */
+enum rtw_mesh_deferred_task_flags {
+	RTW_MESH_WORK_HOUSEKEEPING,
+	RTW_MESH_WORK_ROOT,
+	RTW_MESH_WORK_DRIFT_ADJUST,
+	RTW_MESH_WORK_MBSS_CHANGED,
+};
+
+#define RTW_MESH_MAX_PEER_CANDIDATES 15 /* aid consideration */
+#define RTW_MESH_MAX_PEER_LINKS 8
+#define RTW_MESH_PEER_LINK_TIMEOUT 20
+
+#define RTW_MESH_PEER_CONF_DISABLED 0 /* special time value means no confirmation ongoing */
+#if CONFIG_RTW_MESH_PEER_BLACKLIST
+#define IS_PEER_CONF_DISABLED(plink) ((plink)->peer_conf_end_time == RTW_MESH_PEER_CONF_DISABLED)
+#define IS_PEER_CONF_TIMEOUT(plink)(!IS_PEER_CONF_DISABLED(plink) && rtw_time_after(rtw_get_current_time(), (plink)->peer_conf_end_time))
+#define SET_PEER_CONF_DISABLED(plink) (plink)->peer_conf_end_time = RTW_MESH_PEER_CONF_DISABLED
+#define SET_PEER_CONF_END_TIME(plink, timeout_ms) \
+	do { \
+		(plink)->peer_conf_end_time = rtw_get_current_time() + rtw_ms_to_systime(timeout_ms); \
+		if ((plink)->peer_conf_end_time == RTW_MESH_PEER_CONF_DISABLED) \
+			(plink)->peer_conf_end_time++; \
+	} while (0)
+#else
+#define IS_PEER_CONF_DISABLED(plink) 1
+#define IS_PEER_CONF_TIMEOUT(plink) 0
+#define SET_PEER_CONF_DISABLED(plink) do {} while (0)
+#define SET_PEER_CONF_END_TIME(plink, timeout_ms) do {} while (0)
+#endif /* CONFIG_RTW_MESH_PEER_BLACKLIST */
+
+#define RTW_MESH_CTO_MGATE_CONF_DISABLED 0 /* special time value means no confirmation ongoing */
+#if CONFIG_RTW_MESH_CTO_MGATE_BLACKLIST
+#define IS_CTO_MGATE_CONF_DISABLED(plink) ((plink)->cto_mgate_conf_end_time == RTW_MESH_CTO_MGATE_CONF_DISABLED)
+#define IS_CTO_MGATE_CONF_TIMEOUT(plink)(!IS_CTO_MGATE_CONF_DISABLED(plink) && rtw_time_after(rtw_get_current_time(), (plink)->cto_mgate_conf_end_time))
+#define SET_CTO_MGATE_CONF_DISABLED(plink) (plink)->cto_mgate_conf_end_time = RTW_MESH_CTO_MGATE_CONF_DISABLED
+#define SET_CTO_MGATE_CONF_END_TIME(plink, timeout_ms) \
+	do { \
+		(plink)->cto_mgate_conf_end_time = rtw_get_current_time() + rtw_ms_to_systime(timeout_ms); \
+		if ((plink)->cto_mgate_conf_end_time == RTW_MESH_CTO_MGATE_CONF_DISABLED) \
+			(plink)->cto_mgate_conf_end_time++; \
+	} while (0)
+#else
+#define IS_CTO_MGATE_CONF_DISABLED(plink) 1
+#define IS_CTO_MGATE_CONF_TIMEOUT(plink) 0
+#define SET_CTO_MGATE_CONF_DISABLED(plink) do {} while (0)
+#define SET_CTO_MGATE_CONF_END_TIME(plink, timeout_ms) do {} while (0)
+#endif /* CONFIG_RTW_MESH_CTO_MGATE_BLACKLIST */
+
+struct mesh_plink_ent {
+	u8 valid;
+	u8 addr[ETH_ALEN];
+	u8 plink_state;
+
+#ifdef CONFIG_RTW_MESH_AEK
+	u8 aek_valid;
+	u8 aek[32];
+#endif
+
+	u16 llid;
+	u16 plid;
+#ifndef CONFIG_RTW_MESH_DRIVER_AID
+	u16 aid; /* aid assigned from upper layer */
+#endif
+	u16 peer_aid; /* aid assigned from peer */
+
+	u8 chosen_pmk[16];
+
+#ifdef CONFIG_RTW_MESH_AEK
+	u8 sel_pcs[4];
+	u8 l_nonce[32];
+	u8 p_nonce[32];
+#endif
+
+#ifdef CONFIG_RTW_MESH_DRIVER_AID
+	u8 *tx_conf_ies;
+	u16 tx_conf_ies_len;
+#endif
+	u8 *rx_conf_ies;
+	u16 rx_conf_ies_len;
+
+	struct wlan_network *scanned;
+
+#if CONFIG_RTW_MESH_PEER_BLACKLIST
+	systime peer_conf_end_time;
+#endif
+#if CONFIG_RTW_MESH_CTO_MGATE_BLACKLIST
+	systime cto_mgate_conf_end_time;
+#endif
+};
+
+#ifdef CONFIG_RTW_MESH_AEK
+#define MESH_PLINK_AEK_VALID(ent) ent->aek_valid
+#else
+#define MESH_PLINK_AEK_VALID(ent) 0
+#endif
+
+struct mesh_plink_pool {
+	_lock lock;
+	u8 num; /* current ent being used */
+	struct mesh_plink_ent ent[RTW_MESH_MAX_PEER_CANDIDATES];
+
+#if CONFIG_RTW_MESH_ACNODE_PREVENT
+	u8 acnode_rsvd;
+#endif
+
+#if CONFIG_RTW_MESH_PEER_BLACKLIST
+	_queue peer_blacklist;
+#endif
+#if CONFIG_RTW_MESH_CTO_MGATE_BLACKLIST
+	_queue cto_mgate_blacklist;
+#endif
+};
+
+struct mesh_peer_sel_policy {
+	u32 scanr_exp_ms;
+
+#if CONFIG_RTW_MESH_ACNODE_PREVENT
+	u8 acnode_prevent;
+	u32 acnode_conf_timeout_ms;
+	u32 acnode_notify_timeout_ms;
+#endif
+
+#if CONFIG_RTW_MESH_OFFCH_CAND
+	u8 offch_cand;
+	u32 offch_find_int_ms; /* 0 means no offch find triggerred by driver self*/
+#endif
+
+#if CONFIG_RTW_MESH_PEER_BLACKLIST
+	u32 peer_conf_timeout_ms;
+	u32 peer_blacklist_timeout_ms;
+#endif
+
+#if CONFIG_RTW_MESH_CTO_MGATE_BLACKLIST
+	u8 cto_mgate_require;
+	u32 cto_mgate_conf_timeout_ms;
+	u32 cto_mgate_blacklist_timeout_ms;
+#endif
+};
+
+/* b2u flags */
+#define RTW_MESH_B2U_ALL		BIT0
+#define RTW_MESH_B2U_GA_UCAST	BIT1 /* Group addressed unicast frame, forward only */
+#define RTW_MESH_B2U_BCAST		BIT2
+#define RTW_MESH_B2U_IP_MCAST	BIT3
+
+#define rtw_msrc_b2u_policy_chk(flags, mda) ( \
+	(flags & RTW_MESH_B2U_ALL) \
+	|| ((flags & RTW_MESH_B2U_BCAST) && is_broadcast_mac_addr(mda)) \
+	|| ((flags & RTW_MESH_B2U_IP_MCAST) && (IP_MCAST_MAC(mda) || ICMPV6_MCAST_MAC(mda))) \
+	)
+
+#define rtw_mfwd_b2u_policy_chk(flags, mda, ucst) ( \
+	(flags & RTW_MESH_B2U_ALL) \
+	|| ((flags & RTW_MESH_B2U_GA_UCAST) && ucst) \
+	|| ((flags & RTW_MESH_B2U_BCAST) && is_broadcast_mac_addr(mda)) \
+	|| ((flags & RTW_MESH_B2U_IP_MCAST) && (IP_MCAST_MAC(mda) || ICMPV6_MCAST_MAC(mda))) \
+	)
+
+/**
+ * @sane_metric_delta: Controlling if trigger additional path check mechanism
+ * @max_root_add_chk_cnt: The retry cnt to send additional root confirmation
+ *	PREQ through old(last) path
+ */
+struct rtw_mesh_cfg {
+	u8 max_peer_links; /* peering limit */
+	u32 plink_timeout; /* seconds */
+
+	u8 dot11MeshTTL;
+	u8 element_ttl;
+	u32 path_refresh_time;
+	u16 dot11MeshHWMPpreqMinInterval;
+	u16 dot11MeshHWMPnetDiameterTraversalTime;
+	u32 dot11MeshHWMPactivePathTimeout;
+	u8 dot11MeshHWMPmaxPREQretries;
+	u16 min_discovery_timeout;
+	u16 dot11MeshHWMPconfirmationInterval;
+	u16 dot11MeshHWMPperrMinInterval;
+	u8 dot11MeshHWMPRootMode;
+	BOOLEAN dot11MeshForwarding;
+	s32 rssi_threshold; /* in dBm, 0: no specified */
+	u16 dot11MeshHWMPRannInterval;
+	BOOLEAN dot11MeshGateAnnouncementProtocol;
+	u32 dot11MeshHWMPactivePathToRootTimeout;
+	u16 dot11MeshHWMProotInterval;
+	u8 path_gate_timeout_factor;
+#ifdef CONFIG_RTW_MESH_ADD_ROOT_CHK
+	u16 sane_metric_delta;
+	u8 max_root_add_chk_cnt;
+#endif
+
+	struct mesh_peer_sel_policy peer_sel_policy;
+
+#if CONFIG_RTW_MESH_DATA_BMC_TO_UC
+	u8 b2u_flags_msrc;
+	u8 b2u_flags_mfwd;
+#endif
+};
+
+struct rtw_mesh_stats {
+	u32 fwded_mcast;		/* Mesh forwarded multicast frames */
+	u32 fwded_unicast;		/* Mesh forwarded unicast frames */
+	u32 fwded_frames;		/* Mesh total forwarded frames */
+	u32 dropped_frames_ttl;	/* Not transmitted since mesh_ttl == 0*/
+	u32 dropped_frames_no_route;	/* Not transmitted, no route found */
+	u32 dropped_frames_congestion;/* Not forwarded due to congestion */
+	u32 dropped_frames_duplicate;
+
+	u32 mrc_del_qlen; /* MRC entry deleted cause by queue length limit */
+};
+
+struct rtw_mrc;
+
+struct rtw_mesh_info {
+	u8 mesh_id[NDIS_802_11_LENGTH_SSID];
+	size_t mesh_id_len;
+	/* Active Path Selection Protocol Identifier */
+	u8 mesh_pp_id;
+	/* Active Path Selection Metric Identifier */
+	u8 mesh_pm_id;
+	/* Congestion Control Mode Identifier */
+	u8 mesh_cc_id;
+	/* Synchronization Protocol Identifier */
+	u8 mesh_sp_id;
+	/* Authentication Protocol Identifier */
+	u8 mesh_auth_id;
+
+	struct mesh_plink_pool plink_ctl;
+
+	u32 mesh_seqnum;
+	/* MSTA's own hwmp sequence number */
+	u32 sn;
+	systime last_preq;
+	systime last_sn_update;
+	systime next_perr;
+	/* Last used Path Discovery ID */
+	u32 preq_id;
+	
+	ATOMIC_T mpaths;
+	struct rtw_mesh_table *mesh_paths;
+	struct rtw_mesh_table *mpp_paths;
+	int mesh_paths_generation;
+	int mpp_paths_generation;
+
+	int num_gates;
+	struct rtw_mesh_path *max_addr_gate;
+	bool max_addr_gate_is_larger_than_self;
+
+	struct rtw_mesh_stats mshstats;
+
+	_queue mpath_tx_queue;
+	u32 mpath_tx_queue_len;
+	struct tasklet_struct mpath_tx_tasklet;
+
+	struct rtw_mrc *mrc;
+
+	_lock mesh_preq_queue_lock;
+	struct rtw_mesh_preq_queue preq_queue;
+	int preq_queue_len;
+};
+
+extern const char *_action_self_protected_str[];
+#define action_self_protected_str(action) ((action < RTW_ACT_SELF_PROTECTED_NUM) ? _action_self_protected_str[action] : _action_self_protected_str[0])
+
+u8 *rtw_set_ie_mesh_id(u8 *buf, u32 *buf_len, const char *mesh_id, u8 id_len);
+u8 *rtw_set_ie_mesh_config(u8 *buf, u32 *buf_len
+	, u8 path_sel_proto, u8 path_sel_metric, u8 congest_ctl_mode, u8 sync_method, u8 auth_proto
+	, u8 num_of_peerings, bool cto_mgate, bool cto_as
+	, bool accept_peerings, bool mcca_sup, bool mcca_en, bool forwarding
+	, bool mbca_en, bool tbtt_adj, bool ps_level);
+
+int rtw_bss_is_same_mbss(WLAN_BSSID_EX *a, WLAN_BSSID_EX *b);
+int rtw_bss_is_candidate_mesh_peer(WLAN_BSSID_EX *self, WLAN_BSSID_EX *target, u8 ch, u8 add_peer);
+
+void rtw_chk_candidate_peer_notify(_adapter *adapter, struct wlan_network *scanned);
+
+void rtw_mesh_peer_status_chk(_adapter *adapter);
+
+#if CONFIG_RTW_MESH_ACNODE_PREVENT
+void rtw_mesh_update_scanned_acnode_status(_adapter *adapter, struct wlan_network *scanned);
+bool rtw_mesh_scanned_is_acnode_confirmed(_adapter *adapter, struct wlan_network *scanned);
+bool rtw_mesh_acnode_prevent_allow_sacrifice(_adapter *adapter);
+struct sta_info *rtw_mesh_acnode_prevent_pick_sacrifice(_adapter *adapter);
+void dump_mesh_acnode_prevent_settings(void *sel, _adapter *adapter);
+#endif
+
+#if CONFIG_RTW_MESH_OFFCH_CAND
+u8 rtw_mesh_offch_candidate_accepted(_adapter *adapter);
+u8 rtw_mesh_select_operating_ch(_adapter *adapter);
+void dump_mesh_offch_cand_settings(void *sel, _adapter *adapter);
+#endif
+
+#if CONFIG_RTW_MESH_PEER_BLACKLIST
+int rtw_mesh_peer_blacklist_add(_adapter *adapter, const u8 *addr);
+int rtw_mesh_peer_blacklist_del(_adapter *adapter, const u8 *addr);
+int rtw_mesh_peer_blacklist_search(_adapter *adapter, const u8 *addr);
+void rtw_mesh_peer_blacklist_flush(_adapter *adapter);
+void dump_mesh_peer_blacklist(void *sel, _adapter *adapter);
+void dump_mesh_peer_blacklist_settings(void *sel, _adapter *adapter);
+#endif
+#if CONFIG_RTW_MESH_CTO_MGATE_BLACKLIST
+u8 rtw_mesh_cto_mgate_required(_adapter *adapter);
+u8 rtw_mesh_cto_mgate_network_filter(_adapter *adapter, struct wlan_network *scanned);
+int rtw_mesh_cto_mgate_blacklist_add(_adapter *adapter, const u8 *addr);
+int rtw_mesh_cto_mgate_blacklist_del(_adapter *adapter, const u8 *addr);
+int rtw_mesh_cto_mgate_blacklist_search(_adapter *adapter, const u8 *addr);
+void rtw_mesh_cto_mgate_blacklist_flush(_adapter *adapter);
+void dump_mesh_cto_mgate_blacklist(void *sel, _adapter *adapter);
+void dump_mesh_cto_mgate_blacklist_settings(void *sel, _adapter *adapter);
+#endif
+void dump_mesh_peer_sel_policy(void *sel, _adapter *adapter);
+void dump_mesh_networks(void *sel, _adapter *adapter);
+
+void rtw_mesh_adjust_chbw(u8 req_ch, u8 *req_bw, u8 *req_offset);
+
+int rtw_sae_check_frames(_adapter *adapter, const u8 *buf, u32 len, u8 tx);
+int rtw_mesh_check_frames_tx(_adapter *adapter, const u8 **buf, size_t *len);
+int rtw_mesh_check_frames_rx(_adapter *adapter, const u8 *buf, size_t len);
+
+int rtw_mesh_on_auth(_adapter *adapter, union recv_frame *rframe);
+unsigned int on_action_self_protected(_adapter *adapter, union recv_frame *rframe);
+
+bool rtw_mesh_update_bss_peering_status(_adapter *adapter, WLAN_BSSID_EX *bss);
+bool rtw_mesh_update_bss_formation_info(_adapter *adapter, WLAN_BSSID_EX *bss);
+bool rtw_mesh_update_bss_forwarding_state(_adapter *adapter, WLAN_BSSID_EX *bss);
+
+struct mesh_plink_ent *_rtw_mesh_plink_get(_adapter *adapter, const u8 *hwaddr);
+struct mesh_plink_ent *rtw_mesh_plink_get(_adapter *adapter, const u8 *hwaddr);
+struct mesh_plink_ent *rtw_mesh_plink_get_no_estab_by_idx(_adapter *adapter, u8 idx);
+int _rtw_mesh_plink_add(_adapter *adapter, const u8 *hwaddr);
+int rtw_mesh_plink_add(_adapter *adapter, const u8 *hwaddr);
+int rtw_mesh_plink_set_state(_adapter *adapter, const u8 *hwaddr, u8 state);
+#ifdef CONFIG_RTW_MESH_AEK
+int rtw_mesh_plink_set_aek(_adapter *adapter, const u8 *hwaddr, const u8 *aek);
+#endif
+#if CONFIG_RTW_MESH_PEER_BLACKLIST
+int rtw_mesh_plink_set_peer_conf_timeout(_adapter *adapter, const u8 *hwaddr);
+#endif
+void _rtw_mesh_plink_del_ent(_adapter *adapter, struct mesh_plink_ent *ent);
+int rtw_mesh_plink_del(_adapter *adapter, const u8 *hwaddr);
+void rtw_mesh_plink_ctl_init(_adapter *adapter);
+void rtw_mesh_plink_ctl_deinit(_adapter *adapter);
+void dump_mesh_plink_ctl(void *sel, _adapter *adapter);
+
+int rtw_mesh_peer_establish(_adapter *adapter, struct mesh_plink_ent *plink, struct sta_info *sta);
+void _rtw_mesh_expire_peer_ent(_adapter *adapter, struct mesh_plink_ent *plink);
+void rtw_mesh_expire_peer(_adapter *adapter, const u8 *peer_addr);
+u8 rtw_mesh_ps_annc(_adapter *adapter, u8 ps);
+
+unsigned int on_action_mesh(_adapter *adapter, union recv_frame *rframe);
+
+void rtw_mesh_cfg_init(_adapter *adapter);
+void rtw_mesh_cfg_init_max_peer_links(_adapter *adapter, u8 stack_conf);
+void rtw_mesh_cfg_init_plink_timeout(_adapter *adapter, u32 stack_conf);
+void rtw_mesh_init_mesh_info(_adapter *adapter);
+void rtw_mesh_deinit_mesh_info(_adapter *adapter);
+
+#if CONFIG_RTW_MESH_DATA_BMC_TO_UC
+void dump_mesh_b2u_flags(void *sel, _adapter *adapter);
+#endif
+
+int rtw_mesh_addr_resolve(_adapter *adapter, struct xmit_frame *xframe, _pkt *pkt, _list *b2u_list);
+
+s8 rtw_mesh_tx_set_whdr_mctrl_len(u8 mesh_frame_mode, struct pkt_attrib *attrib);
+void rtw_mesh_tx_build_mctrl(_adapter *adapter, struct pkt_attrib *attrib, u8 *buf);
+u8 rtw_mesh_tx_build_whdr(_adapter *adapter, struct pkt_attrib *attrib
+	, u16 *fctrl, struct rtw_ieee80211_hdr *whdr);
+
+int rtw_mesh_rx_data_validate_hdr(_adapter *adapter, union recv_frame *rframe, struct sta_info **sta);
+int rtw_mesh_rx_data_validate_mctrl(_adapter *adapter, union recv_frame *rframe
+	, const struct rtw_ieee80211s_hdr *mctrl, const u8 *mda, const u8 *msa
+	, u8 *mctrl_len, const u8 **da, const u8 **sa);
+int rtw_mesh_rx_validate_mctrl_non_amsdu(_adapter *adapter, union recv_frame *rframe);
+
+int rtw_mesh_rx_msdu_act_check(union recv_frame *rframe
+	, const u8 *mda, const u8 *msa
+	, const u8 *da, const u8 *sa
+	, struct rtw_ieee80211s_hdr *mctrl
+	, struct xmit_frame **fwd_frame, _list *b2u_list);
+
+void dump_mesh_stats(void *sel, _adapter *adapter);
+
+#if defined(PLATFORM_LINUX) && (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 32))
+#define rtw_lockdep_assert_held(l) lockdep_assert_held(l)
+#define rtw_lockdep_is_held(l) lockdep_is_held(l)
+#else
+#error "TBD\n"
+#endif
+
+#include "rtw_mesh_pathtbl.h"
+#include "rtw_mesh_hwmp.h"
+#endif /* __RTW_MESH_H_ */
+
diff --git a/rtl8723DS/core/mesh/rtw_mesh_hwmp.c b/rtl8723DS/core/mesh/rtw_mesh_hwmp.c
new file mode 100644
index 0000000..f64aa3d
--- a/dev/null
+++ b/rtl8723DS/core/mesh/rtw_mesh_hwmp.c
@@ -0,0 +1,1665 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2007 - 2017 Realtek Corporation.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ *****************************************************************************/
+#define _RTW_HWMP_C_
+
+#ifdef CONFIG_RTW_MESH
+#include <drv_types.h>
+#include <hal_data.h>
+
+#define RTW_TEST_FRAME_LEN	8192
+#define RTW_MAX_METRIC	0xffffffff
+#define RTW_ARITH_SHIFT	8
+#define RTW_LINK_FAIL_THRESH 95
+#define RTW_MAX_PREQ_QUEUE_LEN	64
+#define RTW_ATLM_REQ_CYCLE 1000
+
+#define rtw_ilog2(n)			\
+(					\
+	(n) < 2 ? 0 :			\
+	(n) & (1ULL << 63) ? 63 :	\
+	(n) & (1ULL << 62) ? 62 :	\
+	(n) & (1ULL << 61) ? 61 :	\
+	(n) & (1ULL << 60) ? 60 :	\
+	(n) & (1ULL << 59) ? 59 :	\
+	(n) & (1ULL << 58) ? 58 :	\
+	(n) & (1ULL << 57) ? 57 :	\
+	(n) & (1ULL << 56) ? 56 :	\
+	(n) & (1ULL << 55) ? 55 :	\
+	(n) & (1ULL << 54) ? 54 :	\
+	(n) & (1ULL << 53) ? 53 :	\
+	(n) & (1ULL << 52) ? 52 :	\
+	(n) & (1ULL << 51) ? 51 :	\
+	(n) & (1ULL << 50) ? 50 :	\
+	(n) & (1ULL << 49) ? 49 :	\
+	(n) & (1ULL << 48) ? 48 :	\
+	(n) & (1ULL << 47) ? 47 :	\
+	(n) & (1ULL << 46) ? 46 :	\
+	(n) & (1ULL << 45) ? 45 :	\
+	(n) & (1ULL << 44) ? 44 :	\
+	(n) & (1ULL << 43) ? 43 :	\
+	(n) & (1ULL << 42) ? 42 :	\
+	(n) & (1ULL << 41) ? 41 :	\
+	(n) & (1ULL << 40) ? 40 :	\
+	(n) & (1ULL << 39) ? 39 :	\
+	(n) & (1ULL << 38) ? 38 :	\
+	(n) & (1ULL << 37) ? 37 :	\
+	(n) & (1ULL << 36) ? 36 :	\
+	(n) & (1ULL << 35) ? 35 :	\
+	(n) & (1ULL << 34) ? 34 :	\
+	(n) & (1ULL << 33) ? 33 :	\
+	(n) & (1ULL << 32) ? 32 :	\
+	(n) & (1ULL << 31) ? 31 :	\
+	(n) & (1ULL << 30) ? 30 :	\
+	(n) & (1ULL << 29) ? 29 :	\
+	(n) & (1ULL << 28) ? 28 :	\
+	(n) & (1ULL << 27) ? 27 :	\
+	(n) & (1ULL << 26) ? 26 :	\
+	(n) & (1ULL << 25) ? 25 :	\
+	(n) & (1ULL << 24) ? 24 :	\
+	(n) & (1ULL << 23) ? 23 :	\
+	(n) & (1ULL << 22) ? 22 :	\
+	(n) & (1ULL << 21) ? 21 :	\
+	(n) & (1ULL << 20) ? 20 :	\
+	(n) & (1ULL << 19) ? 19 :	\
+	(n) & (1ULL << 18) ? 18 :	\
+	(n) & (1ULL << 17) ? 17 :	\
+	(n) & (1ULL << 16) ? 16 :	\
+	(n) & (1ULL << 15) ? 15 :	\
+	(n) & (1ULL << 14) ? 14 :	\
+	(n) & (1ULL << 13) ? 13 :	\
+	(n) & (1ULL << 12) ? 12 :	\
+	(n) & (1ULL << 11) ? 11 :	\
+	(n) & (1ULL << 10) ? 10 :	\
+	(n) & (1ULL <<  9) ?  9 :	\
+	(n) & (1ULL <<  8) ?  8 :	\
+	(n) & (1ULL <<  7) ?  7 :	\
+	(n) & (1ULL <<  6) ?  6 :	\
+	(n) & (1ULL <<  5) ?  5 :	\
+	(n) & (1ULL <<  4) ?  4 :	\
+	(n) & (1ULL <<  3) ?  3 :	\
+	(n) & (1ULL <<  2) ?  2 :	\
+	1				\
+)
+
+enum rtw_mpath_frame_type {
+	RTW_MPATH_PREQ = 0,
+	RTW_MPATH_PREP,
+	RTW_MPATH_PERR,
+	RTW_MPATH_RANN
+};
+
+static inline u32 rtw_u32_field_get(const u8 *preq_elem, int shift, BOOLEAN ae)
+{
+	if (ae)
+		shift += 6;
+	return LE_BITS_TO_4BYTE(preq_elem + shift, 0, 32);
+}
+
+static inline u16 rtw_u16_field_get(const u8 *preq_elem, int shift, BOOLEAN ae)
+{
+	if (ae)
+		shift += 6;
+	return LE_BITS_TO_2BYTE(preq_elem + shift, 0, 16);
+}
+
+/* HWMP IE processing macros */
+#define RTW_AE_F			(1<<6)
+#define RTW_AE_F_SET(x)			(*x & RTW_AE_F)
+#define RTW_PREQ_IE_FLAGS(x)		(*(x))
+#define RTW_PREQ_IE_HOPCOUNT(x)		(*(x + 1))
+#define RTW_PREQ_IE_TTL(x)		(*(x + 2))
+#define RTW_PREQ_IE_PREQ_ID(x)		rtw_u32_field_get(x, 3, 0)
+#define RTW_PREQ_IE_ORIG_ADDR(x)	(x + 7)
+#define RTW_PREQ_IE_ORIG_SN(x)		rtw_u32_field_get(x, 13, 0)
+#define RTW_PREQ_IE_LIFETIME(x)		rtw_u32_field_get(x, 17, RTW_AE_F_SET(x))
+#define RTW_PREQ_IE_METRIC(x) 		rtw_u32_field_get(x, 21, RTW_AE_F_SET(x))
+#define RTW_PREQ_IE_TARGET_F(x)		(*(RTW_AE_F_SET(x) ? x + 32 : x + 26))
+#define RTW_PREQ_IE_TARGET_ADDR(x) 	(RTW_AE_F_SET(x) ? x + 33 : x + 27)
+#define RTW_PREQ_IE_TARGET_SN(x) 	rtw_u32_field_get(x, 33, RTW_AE_F_SET(x))
+
+#define RTW_PREP_IE_FLAGS(x)		RTW_PREQ_IE_FLAGS(x)
+#define RTW_PREP_IE_HOPCOUNT(x)		RTW_PREQ_IE_HOPCOUNT(x)
+#define RTW_PREP_IE_TTL(x)		RTW_PREQ_IE_TTL(x)
+#define RTW_PREP_IE_ORIG_ADDR(x)	(RTW_AE_F_SET(x) ? x + 27 : x + 21)
+#define RTW_PREP_IE_ORIG_SN(x)		rtw_u32_field_get(x, 27, RTW_AE_F_SET(x))
+#define RTW_PREP_IE_LIFETIME(x)		rtw_u32_field_get(x, 13, RTW_AE_F_SET(x))
+#define RTW_PREP_IE_METRIC(x)		rtw_u32_field_get(x, 17, RTW_AE_F_SET(x))
+#define RTW_PREP_IE_TARGET_ADDR(x)	(x + 3)
+#define RTW_PREP_IE_TARGET_SN(x)	rtw_u32_field_get(x, 9, 0)
+
+#define RTW_PERR_IE_TTL(x)		(*(x))
+#define RTW_PERR_IE_TARGET_FLAGS(x)	(*(x + 2))
+#define RTW_PERR_IE_TARGET_ADDR(x)	(x + 3)
+#define RTW_PERR_IE_TARGET_SN(x)	rtw_u32_field_get(x, 9, 0)
+#define RTW_PERR_IE_TARGET_RCODE(x)	rtw_u16_field_get(x, 13, 0)
+
+#define RTW_TU_TO_SYSTIME(x)	(rtw_us_to_systime((x) * 1024))
+#define RTW_TU_TO_EXP_TIME(x)	(rtw_get_current_time() + RTW_TU_TO_SYSTIME(x))
+#define RTW_MSEC_TO_TU(x) (x*1000/1024)
+#define RTW_SN_GT(x, y) ((s32)(y - x) < 0)
+#define RTW_SN_LT(x, y) ((s32)(x - y) < 0)
+#define RTW_MAX_SANE_SN_DELTA 32
+
+static inline u32 RTW_SN_DELTA(u32 x, u32 y)
+{
+	return x >= y ? x - y : y - x;
+}
+
+#define rtw_net_traversal_jiffies(adapter) \
+	rtw_ms_to_systime(adapter->mesh_cfg.dot11MeshHWMPnetDiameterTraversalTime)
+#define rtw_default_lifetime(adapter) \
+	RTW_MSEC_TO_TU(adapter->mesh_cfg.dot11MeshHWMPactivePathTimeout)
+#define rtw_min_preq_int_jiff(adapter) \
+	(rtw_ms_to_systime(adapter->mesh_cfg.dot11MeshHWMPpreqMinInterval))
+#define rtw_max_preq_retries(adapter) (adapter->mesh_cfg.dot11MeshHWMPmaxPREQretries)
+#define rtw_disc_timeout_jiff(adapter) \
+	rtw_ms_to_systime(adapter->mesh_cfg.min_discovery_timeout)
+#define rtw_root_path_confirmation_jiffies(adapter) \
+	rtw_ms_to_systime(adapter->mesh_cfg.dot11MeshHWMPconfirmationInterval)
+
+static inline BOOLEAN rtw_ether_addr_equal(const u8 *addr1, const u8 *addr2)
+{
+	return _rtw_memcmp(addr1, addr2, ETH_ALEN);
+}
+
+#ifdef PLATFORM_LINUX
+#define rtw_print_ratelimit()	printk_ratelimit()
+#define rtw_mod_timer(ptimer, expires) mod_timer(&(ptimer)->timer, expires)
+#else
+
+#endif
+
+#define RTW_MESH_EWMA_PRECISION 20
+#define RTW_MESH_EWMA_WEIGHT_RCP 8
+#define RTW_TOTAL_PKT_MIN_THRESHOLD 1
+inline void rtw_ewma_err_rate_init(struct rtw_ewma_err_rate *e)
+{
+	e->internal = 0;
+}
+inline unsigned long rtw_ewma_err_rate_read(struct rtw_ewma_err_rate *e)
+{
+	return e->internal >> (RTW_MESH_EWMA_PRECISION);
+}
+inline void rtw_ewma_err_rate_add(struct rtw_ewma_err_rate *e,
+				  unsigned long val)
+{
+	unsigned long internal = e->internal;
+	unsigned long weight_rcp = rtw_ilog2(RTW_MESH_EWMA_WEIGHT_RCP);
+	unsigned long precision = RTW_MESH_EWMA_PRECISION;
+
+	(e->internal) = internal ? (((internal << weight_rcp) - internal) +
+			(val << precision)) >> weight_rcp :
+			(val << precision);
+}
+
+static const u8 bcast_addr[ETH_ALEN] = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff};
+
+static int rtw_mesh_path_sel_frame_tx(enum rtw_mpath_frame_type mpath_action, u8 flags,
+				      const u8 *originator_addr, u32 originator_sn,
+				      u8 target_flags, const u8 *target,
+				      u32 target_sn, const u8 *da, u8 hopcount, u8 ttl,
+				      u32 lifetime, u32 metric, u32 preq_id, 
+				      _adapter *adapter)
+{
+	struct xmit_priv *pxmitpriv = &(adapter->xmitpriv);
+	struct mlme_ext_priv *pmlmeext = &(adapter->mlmeextpriv);
+	struct xmit_frame *pmgntframe = NULL;
+	struct rtw_ieee80211_hdr *pwlanhdr = NULL;
+	struct pkt_attrib *pattrib = NULL;
+	u8 category = RTW_WLAN_CATEGORY_MESH;
+	u8 action = RTW_ACT_MESH_HWMP_PATH_SELECTION;
+	u16 *fctrl = NULL;
+	u8 *pos, ie_len;
+
+
+	pmgntframe = alloc_mgtxmitframe(pxmitpriv);
+	if (pmgntframe == NULL)
+		return -1;
+
+	pattrib = &pmgntframe->attrib;
+	update_mgntframe_attrib(adapter, pattrib);
+	_rtw_memset(pmgntframe->buf_addr, 0, WLANHDR_OFFSET + TXDESC_OFFSET);
+
+	pos = (u8 *)(pmgntframe->buf_addr) + TXDESC_OFFSET;
+	pwlanhdr = (struct rtw_ieee80211_hdr *)pos;
+
+
+	fctrl = &(pwlanhdr->frame_ctl);
+	*(fctrl) = 0;
+
+	_rtw_memcpy(pwlanhdr->addr1, da, ETH_ALEN);
+	_rtw_memcpy(pwlanhdr->addr2, adapter_mac_addr(adapter), ETH_ALEN);
+	_rtw_memcpy(pwlanhdr->addr3, adapter_mac_addr(adapter), ETH_ALEN);
+
+	SetSeqNum(pwlanhdr, pmlmeext->mgnt_seq);
+	pmlmeext->mgnt_seq++;
+	set_frame_sub_type(pos, WIFI_ACTION);
+
+	pos += sizeof(struct rtw_ieee80211_hdr_3addr);
+	pattrib->pktlen = sizeof(struct rtw_ieee80211_hdr_3addr);
+
+	pos = rtw_set_fixed_ie(pos, 1, &(category), &(pattrib->pktlen));
+	pos = rtw_set_fixed_ie(pos, 1, &(action), &(pattrib->pktlen));
+
+	switch (mpath_action) {
+	case RTW_MPATH_PREQ:
+		RTW_HWMP_DBG("sending PREQ to "MAC_FMT"\n", MAC_ARG(target));
+		ie_len = 37;
+		pattrib->pktlen += (ie_len + 2);
+		*pos++ = WLAN_EID_PREQ;
+		break;
+	case RTW_MPATH_PREP:
+		RTW_HWMP_DBG("sending PREP to "MAC_FMT"\n", MAC_ARG(originator_addr));
+		ie_len = 31;
+		pattrib->pktlen += (ie_len + 2);
+		*pos++ = WLAN_EID_PREP;
+		break;
+	case RTW_MPATH_RANN:
+		RTW_HWMP_DBG("sending RANN from "MAC_FMT"\n", MAC_ARG(originator_addr));
+		ie_len = sizeof(struct rtw_ieee80211_rann_ie);
+		pattrib->pktlen += (ie_len + 2);
+		*pos++ = WLAN_EID_RANN;
+		break;
+	default:
+		rtw_free_xmitbuf(pxmitpriv, pmgntframe->pxmitbuf);
+		rtw_free_xmitframe(pxmitpriv, pmgntframe);
+		return _FAIL;
+	}
+	*pos++ = ie_len;
+	*pos++ = flags;
+	*pos++ = hopcount;
+	*pos++ = ttl;
+	if (mpath_action == RTW_MPATH_PREP) {
+		_rtw_memcpy(pos, target, ETH_ALEN);
+		pos += ETH_ALEN;
+		*(u32 *)pos = cpu_to_le32(target_sn);
+		pos += 4;
+	} else {
+		if (mpath_action == RTW_MPATH_PREQ) {
+			*(u32 *)pos = cpu_to_le32(preq_id);
+			pos += 4;
+		}
+		_rtw_memcpy(pos, originator_addr, ETH_ALEN);
+		pos += ETH_ALEN;
+		*(u32 *)pos = cpu_to_le32(originator_sn);
+		pos += 4;
+	}
+	*(u32 *)pos = cpu_to_le32(lifetime);
+	pos += 4;
+	*(u32 *)pos = cpu_to_le32(metric);
+	pos += 4;
+	if (mpath_action == RTW_MPATH_PREQ) {
+		*pos++ = 1; /* support only 1 destination now */
+		*pos++ = target_flags;
+		_rtw_memcpy(pos, target, ETH_ALEN);
+		pos += ETH_ALEN;
+		*(u32 *)pos = cpu_to_le32(target_sn);
+		pos += 4;
+	} else if (mpath_action == RTW_MPATH_PREP) {
+		_rtw_memcpy(pos, originator_addr, ETH_ALEN);
+		pos += ETH_ALEN;
+		*(u32 *)pos = cpu_to_le32(originator_sn);
+		pos += 4;
+	}
+
+	pattrib->last_txcmdsz = pattrib->pktlen;
+	dump_mgntframe(adapter, pmgntframe);
+	return 0;
+}
+
+int rtw_mesh_path_error_tx(_adapter *adapter,
+			   u8 ttl, const u8 *target, u32 target_sn,
+			   u16 perr_reason_code, const u8 *ra)
+{
+
+	struct xmit_priv *pxmitpriv = &(adapter->xmitpriv);
+	struct mlme_ext_priv *pmlmeext = &(adapter->mlmeextpriv);
+	struct xmit_frame *pmgntframe = NULL;
+	struct rtw_ieee80211_hdr *pwlanhdr = NULL;
+	struct pkt_attrib *pattrib = NULL;
+	struct rtw_mesh_info *minfo = &adapter->mesh_info;
+	u8 category = RTW_WLAN_CATEGORY_MESH;
+	u8 action = RTW_ACT_MESH_HWMP_PATH_SELECTION;
+	u8 *pos, ie_len;
+	u16 *fctrl = NULL;
+
+	if (rtw_time_before(rtw_get_current_time(), minfo->next_perr))
+		return -1;
+
+	pmgntframe = alloc_mgtxmitframe(pxmitpriv);
+	if (pmgntframe == NULL)
+		return -1;
+
+	pattrib = &pmgntframe->attrib;
+	update_mgntframe_attrib(adapter, pattrib);
+	_rtw_memset(pmgntframe->buf_addr, 0, WLANHDR_OFFSET + TXDESC_OFFSET);
+
+	pos = (u8 *)(pmgntframe->buf_addr) + TXDESC_OFFSET;
+	pwlanhdr = (struct rtw_ieee80211_hdr *)pos;
+
+	fctrl = &(pwlanhdr->frame_ctl);
+	*(fctrl) = 0;
+
+	_rtw_memcpy(pwlanhdr->addr1, ra, ETH_ALEN);
+	_rtw_memcpy(pwlanhdr->addr2, adapter_mac_addr(adapter), ETH_ALEN);
+	_rtw_memcpy(pwlanhdr->addr3, adapter_mac_addr(adapter), ETH_ALEN);
+
+	SetSeqNum(pwlanhdr, pmlmeext->mgnt_seq);
+	pmlmeext->mgnt_seq++;
+	set_frame_sub_type(pos, WIFI_ACTION);
+
+	pos += sizeof(struct rtw_ieee80211_hdr_3addr);
+	pattrib->pktlen = sizeof(struct rtw_ieee80211_hdr_3addr);
+
+	pos = rtw_set_fixed_ie(pos, 1, &(category), &(pattrib->pktlen));
+	pos = rtw_set_fixed_ie(pos, 1, &(action), &(pattrib->pktlen));
+
+	ie_len = 15;
+	pattrib->pktlen += (2 + ie_len);
+	*pos++ = WLAN_EID_PERR;
+	*pos++ = ie_len;
+	/* ttl */
+	*pos++ = ttl;
+	/* The Number of Destinations N */
+	*pos++ = 1;
+	/* Flags format | B7 | B6 | B5:B0 | = | rsvd | AE | rsvd | */
+	*pos = 0;
+	pos++;
+	_rtw_memcpy(pos, target, ETH_ALEN);
+	pos += ETH_ALEN;
+	*(u32 *)pos = cpu_to_le32(target_sn);
+	pos += 4;
+	*(u16 *)pos = cpu_to_le16(perr_reason_code);
+
+	adapter->mesh_info.next_perr = RTW_TU_TO_EXP_TIME(
+				adapter->mesh_cfg.dot11MeshHWMPperrMinInterval);
+	pattrib->last_txcmdsz = pattrib->pktlen;
+	/* Send directly. Rewrite it if deferred tx is needed */
+	dump_mgntframe(adapter, pmgntframe);
+
+	RTW_HWMP_DBG("TX PERR toward "MAC_FMT", ra = "MAC_FMT"\n", MAC_ARG(target), MAC_ARG(ra));
+	
+	return 0;
+}
+
+static u32 rtw_get_vht_bitrate(u8 mcs, u8 bw, u8 nss, u8 sgi)
+{
+	static const u32 base[4][10] = {
+		{   6500000,
+		   13000000,
+		   19500000,
+		   26000000,
+		   39000000,
+		   52000000,
+		   58500000,
+		   65000000,
+		   78000000,
+		/* not in the spec, but some devices use this: */
+		   86500000,
+		},
+		{  13500000,
+		   27000000,
+		   40500000,
+		   54000000,
+		   81000000,
+		  108000000,
+		  121500000,
+		  135000000,
+		  162000000,
+		  180000000,
+		},
+		{  29300000,
+		   58500000,
+		   87800000,
+		  117000000,
+		  175500000,
+		  234000000,
+		  263300000,
+		  292500000,
+		  351000000,
+		  390000000,
+		},
+		{  58500000,
+		  117000000,
+		  175500000,
+		  234000000,
+		  351000000,
+		  468000000,
+		  526500000,
+		  585000000,
+		  702000000,
+		  780000000,
+		},
+	};
+	u32 bitrate;
+	int bw_idx;
+
+	if (mcs > 9) {
+		RTW_HWMP_INFO("Invalid mcs = %d\n", mcs);
+		return 0;
+	}
+
+	if (nss > 4 || nss < 1) {
+		RTW_HWMP_INFO("Now only support nss = 1, 2, 3, 4\n");
+	}
+
+	switch (bw) {
+	case CHANNEL_WIDTH_160:
+		bw_idx = 3;
+		break;
+	case CHANNEL_WIDTH_80:
+		bw_idx = 2;
+		break;
+	case CHANNEL_WIDTH_40:
+		bw_idx = 1;
+		break;
+	case CHANNEL_WIDTH_20:
+		bw_idx = 0;
+		break;
+	default:
+		RTW_HWMP_INFO("bw = %d currently not supported\n", bw);
+		return 0;
+	}
+
+	bitrate = base[bw_idx][mcs];
+	bitrate *= nss;
+
+	if (sgi)
+		bitrate = (bitrate / 9) * 10;
+
+	/* do NOT round down here */
+	return (bitrate + 50000) / 100000;
+}
+
+static u32 rtw_get_ht_bitrate(u8 mcs, u8 bw, u8 sgi)
+{
+	int modulation, streams, bitrate;
+
+	/* the formula below does only work for MCS values smaller than 32 */
+	if (mcs >= 32) {
+		RTW_HWMP_INFO("Invalid mcs = %d\n", mcs);
+		return 0;
+	}
+
+	if (bw > 1) {
+		RTW_HWMP_INFO("Now HT only support bw = 0(20Mhz), 1(40Mhz)\n");
+		return 0;
+	}
+
+	modulation = mcs & 7;
+	streams = (mcs >> 3) + 1;
+
+	bitrate = (bw == 1) ? 13500000 : 6500000;
+
+	if (modulation < 4)
+		bitrate *= (modulation + 1);
+	else if (modulation == 4)
+		bitrate *= (modulation + 2);
+	else
+		bitrate *= (modulation + 3);
+
+	bitrate *= streams;
+
+	if (sgi)
+		bitrate = (bitrate / 9) * 10;
+
+	/* do NOT round down here */
+	return (bitrate + 50000) / 100000;
+}
+
+/**
+ * @bw: 0(20Mhz), 1(40Mhz), 2(80Mhz), 3(160Mhz)
+ * @rate_idx: DESC_RATEXXXX & 0x7f
+ * @sgi: DESC_RATEXXXX >> 7
+ * Returns: bitrate in 100kbps
+ */
+static u32 rtw_desc_rate_to_bitrate(u8 bw, u8 rate_idx, u8 sgi)
+{
+	u32 bitrate;
+
+	if (rate_idx <= DESC_RATE54M){
+		u16 ofdm_rate[12] = {10, 20, 55, 110,
+			60, 90, 120, 180, 240, 360, 480, 540};
+		bitrate = ofdm_rate[rate_idx];
+	} else if ((DESC_RATEMCS0 <= rate_idx) &&
+		   (rate_idx <= DESC_RATEMCS31)) {
+		u8 mcs = rate_idx - DESC_RATEMCS0;
+		bitrate = rtw_get_ht_bitrate(mcs, bw, sgi);
+	} else if ((DESC_RATEVHTSS1MCS0 <= rate_idx) &&
+		   (rate_idx <= DESC_RATEVHTSS4MCS9)) {
+		u8 mcs = (rate_idx - DESC_RATEVHTSS1MCS0) % 10;
+		u8 nss = ((rate_idx - DESC_RATEVHTSS1MCS0) / 10) + 1;
+		bitrate = rtw_get_vht_bitrate(mcs, bw, nss, sgi);
+	} else {
+		/* 60Ghz ??? */
+		bitrate = 1;
+	}
+
+	return bitrate;
+}
+
+static u32 rtw_airtime_link_metric_get(_adapter *adapter, struct sta_info *sta)
+{
+	struct dm_struct *dm = adapter_to_phydm(adapter);
+	int device_constant = phydm_get_plcp(dm, sta->cmn.mac_id) << RTW_ARITH_SHIFT;
+	u32 test_frame_len = RTW_TEST_FRAME_LEN << RTW_ARITH_SHIFT;
+	u32 s_unit = 1 << RTW_ARITH_SHIFT;
+	u32 err;
+	u16 rate;
+	u32 tx_time, estimated_retx;
+	u64 result;
+	/* The fail_avg should <= 100 here */
+	u32 fail_avg = (u32)rtw_ewma_err_rate_read(&sta->metrics.err_rate);
+
+	if (fail_avg > RTW_LINK_FAIL_THRESH)
+		return RTW_MAX_METRIC;
+
+	rate = sta->metrics.data_rate;
+	/* rate unit is 100Kbps, min rate = 10 */
+	if (rate < 10) {
+		RTW_HWMP_INFO("rate = %d\n", rate);
+		return RTW_MAX_METRIC;
+	}
+
+	err = (fail_avg << RTW_ARITH_SHIFT) / 100;
+
+	/* test_frame_len*10 to adjust the unit of rate(100kbps/unit) */
+	tx_time = (device_constant + 10 * test_frame_len / rate);
+	estimated_retx = ((1 << (2 * RTW_ARITH_SHIFT)) / (s_unit - err));
+	result = (tx_time * estimated_retx) >> (2 * RTW_ARITH_SHIFT);
+	/* Convert us to 0.01 TU(10.24us). x/10.24 = x*100/1024 */
+	result = (result * 100) >> 10;
+
+	return (u32)result;
+}
+
+void rtw_ieee80211s_update_metric(_adapter *adapter, u8 mac_id,
+				  u8 per, u8 rate,
+				  u8 bw, u8 total_pkt)
+{
+	struct dvobj_priv *dvobj = adapter_to_dvobj(adapter);
+	struct macid_ctl_t *macid_ctl = dvobj_to_macidctl(dvobj);
+	struct sta_info *sta;
+	u8 rate_idx;
+	u8 sgi;
+
+	sta = macid_ctl->sta[mac_id];
+	if (!sta)
+		return;
+
+	/* if RA, use reported rate */
+	if (adapter->fix_rate == 0xff) {
+		rate_idx = rate & 0x7f;
+		sgi = rate >> 7;
+	} else {
+		rate_idx = adapter->fix_rate & 0x7f;
+		sgi = adapter->fix_rate >> 7;
+	}
+	sta->metrics.data_rate = rtw_desc_rate_to_bitrate(bw, rate_idx, sgi);
+
+	if (total_pkt < RTW_TOTAL_PKT_MIN_THRESHOLD)
+		return;
+
+	/* TBD: sta->metrics.overhead = phydm_get_plcp(void *dm_void, u16 macid); */
+	sta->metrics.total_pkt = total_pkt;
+
+	rtw_ewma_err_rate_add(&sta->metrics.err_rate, per);
+	if (rtw_ewma_err_rate_read(&sta->metrics.err_rate) > 
+			RTW_LINK_FAIL_THRESH)
+		rtw_mesh_plink_broken(sta);
+}
+
+static void rtw_hwmp_preq_frame_process(_adapter *adapter,
+					struct rtw_ieee80211_hdr_3addr *mgmt,
+					const u8 *preq_elem, u32 originator_metric)
+{
+	struct rtw_mesh_info *minfo = &adapter->mesh_info;
+	struct rtw_mesh_cfg *mshcfg = &adapter->mesh_cfg;
+	struct rtw_mesh_path *path = NULL;
+	const u8 *target_addr, *originator_addr;
+	const u8 *da;
+	u8 target_flags, ttl, flags, to_gate_ask = 0;
+	u32 originator_sn, target_sn, lifetime, target_metric = 0;
+	BOOLEAN reply = _FALSE;
+	BOOLEAN forward = _TRUE;
+	BOOLEAN preq_is_gate;
+
+	/* Update target SN, if present */
+	target_addr = RTW_PREQ_IE_TARGET_ADDR(preq_elem);
+	originator_addr = RTW_PREQ_IE_ORIG_ADDR(preq_elem);
+	target_sn = RTW_PREQ_IE_TARGET_SN(preq_elem);
+	originator_sn = RTW_PREQ_IE_ORIG_SN(preq_elem);
+	target_flags = RTW_PREQ_IE_TARGET_F(preq_elem);
+	/* PREQ gate announcements */
+	flags = RTW_PREQ_IE_FLAGS(preq_elem);
+	preq_is_gate = !!(flags & RTW_IEEE80211_PREQ_IS_GATE_FLAG);
+
+	RTW_HWMP_DBG("received PREQ from "MAC_FMT"\n", MAC_ARG(originator_addr));
+
+	if (rtw_ether_addr_equal(target_addr, adapter_mac_addr(adapter))) {
+		RTW_HWMP_DBG("PREQ is for us\n");
+#ifdef CONFIG_RTW_MESH_ON_DMD_GANN
+		rtw_rcu_read_lock();
+		path = rtw_mesh_path_lookup(adapter, originator_addr);
+		if (path) {
+			if (preq_is_gate)
+				rtw_mesh_path_add_gate(path);
+			else if (path->is_gate) {
+				enter_critical_bh(&path->state_lock);
+				rtw_mesh_gate_del(adapter->mesh_info.mesh_paths, path);
+				exit_critical_bh(&path->state_lock);
+			}
+		}
+		path = NULL;
+		rtw_rcu_read_unlock();
+#endif
+		forward = _FALSE;
+		reply = _TRUE;
+		to_gate_ask = 1;
+		target_metric = 0;
+		if (rtw_time_after(rtw_get_current_time(), minfo->last_sn_update +
+					rtw_net_traversal_jiffies(adapter)) ||
+		    rtw_time_before(rtw_get_current_time(), minfo->last_sn_update)) {
+			++minfo->sn;
+			minfo->last_sn_update = rtw_get_current_time();
+		}
+		target_sn = minfo->sn;
+	} else if (is_broadcast_mac_addr(target_addr) &&
+		   (target_flags & RTW_IEEE80211_PREQ_TO_FLAG)) {
+		rtw_rcu_read_lock();
+		path = rtw_mesh_path_lookup(adapter, originator_addr);
+		if (path) {
+			if (flags & RTW_IEEE80211_PREQ_PROACTIVE_PREP_FLAG) {
+				reply = _TRUE;
+				target_addr = adapter_mac_addr(adapter);
+				target_sn = ++minfo->sn;
+				target_metric = 0;
+				minfo->last_sn_update = rtw_get_current_time();
+			}
+
+			if (preq_is_gate) {
+				lifetime = RTW_PREQ_IE_LIFETIME(preq_elem);
+				path->gate_ann_int = lifetime;
+				path->gate_asked = false;
+				rtw_mesh_path_add_gate(path);
+			} else if (path->is_gate) {
+				enter_critical_bh(&path->state_lock);
+				rtw_mesh_gate_del(adapter->mesh_info.mesh_paths, path);
+				exit_critical_bh(&path->state_lock);
+			}
+		}
+		rtw_rcu_read_unlock();
+	} else {
+		rtw_rcu_read_lock();
+#ifdef CONFIG_RTW_MESH_ON_DMD_GANN
+		path = rtw_mesh_path_lookup(adapter, originator_addr);
+		if (path) {
+			if (preq_is_gate)
+				rtw_mesh_path_add_gate(path);
+			else if (path->is_gate) {
+				enter_critical_bh(&path->state_lock);
+				rtw_mesh_gate_del(adapter->mesh_info.mesh_paths, path);
+				exit_critical_bh(&path->state_lock);
+			}
+		}
+		path = NULL;
+#endif
+		path = rtw_mesh_path_lookup(adapter, target_addr);
+		if (path) {
+			if ((!(path->flags & RTW_MESH_PATH_SN_VALID)) ||
+					RTW_SN_LT(path->sn, target_sn)) {
+				path->sn = target_sn;
+				path->flags |= RTW_MESH_PATH_SN_VALID;
+			} else if ((!(target_flags & RTW_IEEE80211_PREQ_TO_FLAG)) &&
+					(path->flags & RTW_MESH_PATH_ACTIVE)) {
+				reply = _TRUE;
+				target_metric = path->metric;
+				target_sn = path->sn;
+				/* Case E2 of sec 13.10.9.3 IEEE 802.11-2012*/
+				target_flags |= RTW_IEEE80211_PREQ_TO_FLAG;
+			}
+		}
+		rtw_rcu_read_unlock();
+	}
+
+	if (reply) {
+		lifetime = RTW_PREQ_IE_LIFETIME(preq_elem);
+		ttl = mshcfg->element_ttl;
+		if (ttl != 0 && !to_gate_ask) {
+			RTW_HWMP_DBG("replying to the PREQ\n");
+			rtw_mesh_path_sel_frame_tx(RTW_MPATH_PREP, 0, originator_addr,
+						   originator_sn, 0, target_addr,
+						   target_sn, mgmt->addr2, 0, ttl,
+						   lifetime, target_metric, 0,
+						   adapter);
+		} else if (ttl != 0 && to_gate_ask) {
+			RTW_HWMP_DBG("replying to the PREQ (PREQ for us)\n");
+			if (mshcfg->dot11MeshGateAnnouncementProtocol) {
+				/* BIT 7 is used to identify the prep is from mesh gate */
+				to_gate_ask = RTW_IEEE80211_PREQ_IS_GATE_FLAG | BIT(7);
+			} else {
+				to_gate_ask = 0;
+			}
+
+			rtw_mesh_path_sel_frame_tx(RTW_MPATH_PREP, to_gate_ask, originator_addr,
+						   originator_sn, 0, target_addr,
+						   target_sn, mgmt->addr2, 0, ttl,
+						   lifetime, target_metric, 0,
+						   adapter);
+		} else {
+			minfo->mshstats.dropped_frames_ttl++;
+		}
+	}
+
+	if (forward && mshcfg->dot11MeshForwarding) {
+		u32 preq_id;
+		u8 hopcount;
+
+		ttl = RTW_PREQ_IE_TTL(preq_elem);
+		lifetime = RTW_PREQ_IE_LIFETIME(preq_elem);
+		if (ttl <= 1) {
+			minfo->mshstats.dropped_frames_ttl++;
+			return;
+		}
+		RTW_HWMP_DBG("forwarding the PREQ from "MAC_FMT"\n", MAC_ARG(originator_addr));
+		--ttl;
+		preq_id = RTW_PREQ_IE_PREQ_ID(preq_elem);
+		hopcount = RTW_PREQ_IE_HOPCOUNT(preq_elem) + 1;
+		da = (path && path->is_root) ?
+			path->rann_snd_addr : bcast_addr;
+
+		if (flags & RTW_IEEE80211_PREQ_PROACTIVE_PREP_FLAG) {
+			target_addr = RTW_PREQ_IE_TARGET_ADDR(preq_elem);
+			target_sn = RTW_PREQ_IE_TARGET_SN(preq_elem);
+		}
+
+		rtw_mesh_path_sel_frame_tx(RTW_MPATH_PREQ, flags, originator_addr,
+					   originator_sn, target_flags, target_addr,
+					   target_sn, da, hopcount, ttl, lifetime,
+					   originator_metric, preq_id, adapter);
+		if (!is_multicast_mac_addr(da))
+			minfo->mshstats.fwded_unicast++;
+		else
+			minfo->mshstats.fwded_mcast++;
+		minfo->mshstats.fwded_frames++;
+	}
+}
+
+static inline struct sta_info *
+rtw_next_hop_deref_protected(struct rtw_mesh_path *path)
+{
+	return rtw_rcu_dereference_protected(path->next_hop,
+					 rtw_lockdep_is_held(&path->state_lock));
+}
+
+static void rtw_hwmp_prep_frame_process(_adapter *adapter,
+					struct rtw_ieee80211_hdr_3addr *mgmt,
+					const u8 *prep_elem, u32 metric)
+{
+	struct rtw_mesh_cfg *mshcfg = &adapter->mesh_cfg;
+	struct rtw_mesh_stats *mshstats = &adapter->mesh_info.mshstats;
+	struct rtw_mesh_path *path;
+	const u8 *target_addr, *originator_addr;
+	u8 ttl, hopcount, flags;
+	u8 next_hop[ETH_ALEN];
+	u32 target_sn, originator_sn, lifetime;
+
+	RTW_HWMP_DBG("received PREP from "MAC_FMT"\n",
+		  MAC_ARG(RTW_PREP_IE_TARGET_ADDR(prep_elem)));
+
+	originator_addr = RTW_PREP_IE_ORIG_ADDR(prep_elem);
+	if (rtw_ether_addr_equal(originator_addr, adapter_mac_addr(adapter))) {
+		/* destination, no forwarding required */
+		rtw_rcu_read_lock();
+		target_addr = RTW_PREP_IE_TARGET_ADDR(prep_elem);
+		path = rtw_mesh_path_lookup(adapter, target_addr);
+		if (path && path->gate_asked) {
+			flags = RTW_PREP_IE_FLAGS(prep_elem);
+			if (flags & BIT(7)) {
+				enter_critical_bh(&path->state_lock);
+				path->gate_asked = false;
+				exit_critical_bh(&path->state_lock);
+				if (!(flags & RTW_IEEE80211_PREQ_IS_GATE_FLAG)) {
+					enter_critical_bh(&path->state_lock);
+					rtw_mesh_gate_del(adapter->mesh_info.mesh_paths, path);
+					exit_critical_bh(&path->state_lock);
+				}
+			}
+		}
+
+		rtw_rcu_read_unlock();
+		return;
+	}
+
+	if (!mshcfg->dot11MeshForwarding)
+		return;
+
+	ttl = RTW_PREP_IE_TTL(prep_elem);
+	if (ttl <= 1) {
+		mshstats->dropped_frames_ttl++;
+		return;
+	}
+
+	rtw_rcu_read_lock();
+	path = rtw_mesh_path_lookup(adapter, originator_addr);
+	if (path)
+		enter_critical_bh(&path->state_lock);
+	else
+		goto fail;
+	if (!(path->flags & RTW_MESH_PATH_ACTIVE)) {
+		exit_critical_bh(&path->state_lock);
+		goto fail;
+	}
+	_rtw_memcpy(next_hop, rtw_next_hop_deref_protected(path)->cmn.mac_addr, ETH_ALEN);
+	exit_critical_bh(&path->state_lock);
+	--ttl;
+	flags = RTW_PREP_IE_FLAGS(prep_elem);
+	lifetime = RTW_PREP_IE_LIFETIME(prep_elem);
+	hopcount = RTW_PREP_IE_HOPCOUNT(prep_elem) + 1;
+	target_addr = RTW_PREP_IE_TARGET_ADDR(prep_elem);
+	target_sn = RTW_PREP_IE_TARGET_SN(prep_elem);
+	originator_sn = RTW_PREP_IE_ORIG_SN(prep_elem);
+
+	rtw_mesh_path_sel_frame_tx(RTW_MPATH_PREP, flags, originator_addr, originator_sn, 0,
+				   target_addr, target_sn, next_hop, hopcount,
+				   ttl, lifetime, metric, 0, adapter);
+	rtw_rcu_read_unlock();
+
+	mshstats->fwded_unicast++;
+	mshstats->fwded_frames++;
+	return;
+
+fail:
+	rtw_rcu_read_unlock();
+	mshstats->dropped_frames_no_route++;
+}
+
+static void rtw_hwmp_perr_frame_process(_adapter *adapter,
+					struct rtw_ieee80211_hdr_3addr *mgmt,
+					const u8 *perr_elem)
+{
+	struct rtw_mesh_cfg *mshcfg = &adapter->mesh_cfg;
+	struct rtw_mesh_stats *mshstats = &adapter->mesh_info.mshstats;
+	struct rtw_mesh_path *path;
+	u8 ttl;
+	const u8 *ta, *target_addr;
+	u32 target_sn;
+	u16 perr_reason_code;
+
+	ta = mgmt->addr2;
+	ttl = RTW_PERR_IE_TTL(perr_elem);
+	if (ttl <= 1) {
+		mshstats->dropped_frames_ttl++;
+		return;
+	}
+	ttl--;
+	target_addr = RTW_PERR_IE_TARGET_ADDR(perr_elem);
+	target_sn = RTW_PERR_IE_TARGET_SN(perr_elem);
+	perr_reason_code = RTW_PERR_IE_TARGET_RCODE(perr_elem);
+
+	RTW_HWMP_DBG("received PERR toward target "MAC_FMT"\n", MAC_ARG(target_addr));
+
+	rtw_rcu_read_lock();
+	path = rtw_mesh_path_lookup(adapter, target_addr);
+	if (path) {
+		struct sta_info *sta;
+
+		enter_critical_bh(&path->state_lock);
+		sta = rtw_next_hop_deref_protected(path);
+		if (path->flags & RTW_MESH_PATH_ACTIVE &&
+		    rtw_ether_addr_equal(ta, sta->cmn.mac_addr) &&
+		    !(path->flags & RTW_MESH_PATH_FIXED) &&
+		    (!(path->flags & RTW_MESH_PATH_SN_VALID) ||
+		    RTW_SN_GT(target_sn, path->sn)  || target_sn == 0)) {
+			path->flags &= ~RTW_MESH_PATH_ACTIVE;
+			if (target_sn != 0)
+				path->sn = target_sn;
+			else
+				path->sn += 1;
+			exit_critical_bh(&path->state_lock);
+			if (!mshcfg->dot11MeshForwarding)
+				goto endperr;
+			rtw_mesh_path_error_tx(adapter, ttl, target_addr,
+					       target_sn, perr_reason_code,
+					       bcast_addr);
+		} else
+			exit_critical_bh(&path->state_lock);
+	}
+endperr:
+	rtw_rcu_read_unlock();
+}
+
+static void rtw_hwmp_rann_frame_process(_adapter *adapter,
+					struct rtw_ieee80211_hdr_3addr *mgmt,
+					const struct rtw_ieee80211_rann_ie *rann)
+{
+	struct sta_info *sta;
+	struct sta_priv *pstapriv = &adapter->stapriv;
+	struct rtw_mesh_cfg *mshcfg = &adapter->mesh_cfg;
+	struct rtw_mesh_stats *mshstats = &adapter->mesh_info.mshstats;
+	struct rtw_mesh_path *path;
+	u8 ttl, flags, hopcount;
+	const u8 *originator_addr;
+	u32 originator_sn, metric, metric_txsta, interval;
+	BOOLEAN root_is_gate;
+
+	ttl = rann->rann_ttl;
+	flags = rann->rann_flags;
+	root_is_gate = !!(flags & RTW_RANN_FLAG_IS_GATE);
+	originator_addr = rann->rann_addr;
+	originator_sn = le32_to_cpu(rann->rann_seq);
+	interval = le32_to_cpu(rann->rann_interval);
+	hopcount = rann->rann_hopcount;
+	hopcount++;
+	metric = le32_to_cpu(rann->rann_metric);
+
+	/*  Ignore our own RANNs */
+	if (rtw_ether_addr_equal(originator_addr, adapter_mac_addr(adapter)))
+		return;
+
+	RTW_HWMP_DBG("received RANN from "MAC_FMT" via neighbour "MAC_FMT" (is_gate=%d)\n",
+		  MAC_ARG(originator_addr), MAC_ARG(mgmt->addr2), root_is_gate);
+
+	rtw_rcu_read_lock();
+	sta = rtw_get_stainfo(pstapriv, mgmt->addr2);
+	if (!sta) {
+		rtw_rcu_read_unlock();
+		return;
+	}
+
+	metric_txsta = rtw_airtime_link_metric_get(adapter, sta);
+
+	path = rtw_mesh_path_lookup(adapter, originator_addr);
+	if (!path) {
+		path = rtw_mesh_path_add(adapter, originator_addr);
+		if (IS_ERR(path)) {
+			rtw_rcu_read_unlock();
+			mshstats->dropped_frames_no_route++;
+			return;
+		}
+	}
+
+	if (!(RTW_SN_LT(path->sn, originator_sn)) &&
+	    !(path->sn == originator_sn && metric < path->rann_metric)) {
+		rtw_rcu_read_unlock();
+		return;
+	}
+
+	if ((!(path->flags & (RTW_MESH_PATH_ACTIVE | RTW_MESH_PATH_RESOLVING)) ||
+	     (rtw_time_after(rtw_get_current_time(), path->last_preq_to_root +
+				  rtw_root_path_confirmation_jiffies(adapter)) ||
+	     rtw_time_before(rtw_get_current_time(), path->last_preq_to_root))) &&
+	     !(path->flags & RTW_MESH_PATH_FIXED) && (ttl != 0)) {
+		u8 preq_node_flag = RTW_PREQ_Q_F_START | RTW_PREQ_Q_F_REFRESH;
+
+		RTW_HWMP_DBG("time to refresh root path "MAC_FMT"\n",
+			  MAC_ARG(originator_addr));
+#ifdef CONFIG_RTW_MESH_ADD_ROOT_CHK
+		if (RTW_SN_LT(path->sn, originator_sn) &&
+		    (path->rann_metric + mshcfg->sane_metric_delta < metric) &&
+		    _rtw_memcmp(bcast_addr, path->rann_snd_addr, ETH_ALEN) == _FALSE) {
+			RTW_HWMP_DBG("Trigger additional check for root "
+				     "confirm PREQ. rann_snd_addr = "MAC_FMT
+				     "add_chk_rann_snd_addr= "MAC_FMT"\n",
+					MAC_ARG(mgmt->addr2),
+					MAC_ARG(path->rann_snd_addr));
+			_rtw_memcpy(path->add_chk_rann_snd_addr,
+				    path->rann_snd_addr, ETH_ALEN);
+			preq_node_flag |= RTW_PREQ_Q_F_CHK;
+			
+		}
+#endif
+		rtw_mesh_queue_preq(path, preq_node_flag);
+		path->last_preq_to_root = rtw_get_current_time();
+	}
+
+	path->sn = originator_sn;
+	path->rann_metric = metric + metric_txsta;
+	path->is_root = _TRUE;
+	/* Recording RANNs sender address to send individually
+	 * addressed PREQs destined for root mesh STA */
+	_rtw_memcpy(path->rann_snd_addr, mgmt->addr2, ETH_ALEN);
+
+	if (root_is_gate) {
+		path->gate_ann_int = interval;
+		path->gate_asked = false;
+		rtw_mesh_path_add_gate(path);
+	} else if (path->is_gate) {
+		enter_critical_bh(&path->state_lock);
+		rtw_mesh_gate_del(adapter->mesh_info.mesh_paths, path);
+		exit_critical_bh(&path->state_lock);
+	}
+
+	if (ttl <= 1) {
+		mshstats->dropped_frames_ttl++;
+		rtw_rcu_read_unlock();
+		return;
+	}
+	ttl--;
+
+	if (mshcfg->dot11MeshForwarding) {
+		rtw_mesh_path_sel_frame_tx(RTW_MPATH_RANN, flags, originator_addr,
+					   originator_sn, 0, NULL, 0, bcast_addr,
+					   hopcount, ttl, interval,
+					   metric + metric_txsta, 0, adapter);
+	}
+
+	rtw_rcu_read_unlock();
+}
+
+static u32 rtw_hwmp_route_info_get(_adapter *adapter,
+				   struct rtw_ieee80211_hdr_3addr *mgmt,
+				   const u8 *hwmp_ie, enum rtw_mpath_frame_type action)
+{
+	struct rtw_mesh_path *path;
+	struct sta_priv *pstapriv = &adapter->stapriv;
+	struct sta_info *sta;
+	BOOLEAN fresh_info;
+	const u8 *originator_addr, *ta;
+	u32 originator_sn, originator_metric;
+	unsigned long originator_lifetime, exp_time;
+	u32 last_hop_metric, new_metric;
+	BOOLEAN process = _TRUE;
+
+	rtw_rcu_read_lock();
+	sta = rtw_get_stainfo(pstapriv, mgmt->addr2);
+	if (!sta) {
+		rtw_rcu_read_unlock();
+		return 0;
+	}
+
+	last_hop_metric = rtw_airtime_link_metric_get(adapter, sta);
+	/* Update and check originator routing info */
+	fresh_info = _TRUE;
+
+	switch (action) {
+	case RTW_MPATH_PREQ:
+		originator_addr = RTW_PREQ_IE_ORIG_ADDR(hwmp_ie);
+		originator_sn = RTW_PREQ_IE_ORIG_SN(hwmp_ie);
+		originator_lifetime = RTW_PREQ_IE_LIFETIME(hwmp_ie);
+		originator_metric = RTW_PREQ_IE_METRIC(hwmp_ie);
+		break;
+	case RTW_MPATH_PREP:
+		/* Note: For coding, the naming is not consist with spec */
+		originator_addr = RTW_PREP_IE_TARGET_ADDR(hwmp_ie);
+		originator_sn = RTW_PREP_IE_TARGET_SN(hwmp_ie);
+		originator_lifetime = RTW_PREP_IE_LIFETIME(hwmp_ie);
+		originator_metric = RTW_PREP_IE_METRIC(hwmp_ie);
+		break;
+	default:
+		rtw_rcu_read_unlock();
+		return 0;
+	}
+	new_metric = originator_metric + last_hop_metric;
+	if (new_metric < originator_metric)
+		new_metric = RTW_MAX_METRIC;
+	exp_time = RTW_TU_TO_EXP_TIME(originator_lifetime);
+
+	if (rtw_ether_addr_equal(originator_addr, adapter_mac_addr(adapter))) {
+		process = _FALSE;
+		fresh_info = _FALSE;
+	} else {
+		path = rtw_mesh_path_lookup(adapter, originator_addr);
+		if (path) {
+			enter_critical_bh(&path->state_lock);
+			if (path->flags & RTW_MESH_PATH_FIXED)
+				fresh_info = _FALSE;
+			else if ((path->flags & RTW_MESH_PATH_ACTIVE) &&
+			    (path->flags & RTW_MESH_PATH_SN_VALID)) {
+				if (RTW_SN_GT(path->sn, originator_sn) ||
+				    (path->sn == originator_sn &&
+				     new_metric >= path->metric)) {
+					process = _FALSE;
+					fresh_info = _FALSE;
+				}
+			} else if (!(path->flags & RTW_MESH_PATH_ACTIVE)) {
+				BOOLEAN have_sn, newer_sn, bounced;
+
+				have_sn = path->flags & RTW_MESH_PATH_SN_VALID;
+				newer_sn = have_sn && RTW_SN_GT(originator_sn, path->sn);
+				bounced = have_sn &&
+					  (RTW_SN_DELTA(originator_sn, path->sn) >
+							RTW_MAX_SANE_SN_DELTA);
+
+				if (!have_sn || newer_sn) {
+				} else if (bounced) {
+				} else {
+					process = _FALSE;
+					fresh_info = _FALSE;
+				}
+			}
+		} else {
+			path = rtw_mesh_path_add(adapter, originator_addr);
+			if (IS_ERR(path)) {
+				rtw_rcu_read_unlock();
+				return 0;
+			}
+			enter_critical_bh(&path->state_lock);
+		}
+
+		if (fresh_info) {
+			rtw_mesh_path_assign_nexthop(path, sta);
+			path->flags |= RTW_MESH_PATH_SN_VALID;
+			path->metric = new_metric;
+			path->sn = originator_sn;
+			path->exp_time = rtw_time_after(path->exp_time, exp_time)
+					  ?  path->exp_time : exp_time;
+			rtw_mesh_path_activate(path);
+#ifdef CONFIG_RTW_MESH_ADD_ROOT_CHK
+			if (path->is_root && (action == RTW_MPATH_PREP)) {
+				_rtw_memcpy(path->rann_snd_addr, 
+				mgmt->addr2, ETH_ALEN);
+				path->rann_metric = new_metric;
+			}
+#endif
+			exit_critical_bh(&path->state_lock);
+			rtw_mesh_path_tx_pending(path);
+		} else
+			exit_critical_bh(&path->state_lock);
+	}
+
+	/* Update and check transmitter routing info */
+	ta = mgmt->addr2;
+	if (rtw_ether_addr_equal(originator_addr, ta))
+		fresh_info = _FALSE;
+	else {
+		fresh_info = _TRUE;
+
+		path = rtw_mesh_path_lookup(adapter, ta);
+		if (path) {
+			enter_critical_bh(&path->state_lock);
+			if ((path->flags & RTW_MESH_PATH_FIXED) ||
+				((path->flags & RTW_MESH_PATH_ACTIVE) &&
+					(last_hop_metric > path->metric)))
+				fresh_info = _FALSE;
+		} else {
+			path = rtw_mesh_path_add(adapter, ta);
+			if (IS_ERR(path)) {
+				rtw_rcu_read_unlock();
+				return 0;
+			}
+			enter_critical_bh(&path->state_lock);
+		}
+
+		if (fresh_info) {
+			rtw_mesh_path_assign_nexthop(path, sta);
+			path->metric = last_hop_metric;
+			path->exp_time = rtw_time_after(path->exp_time, exp_time)
+					  ?  path->exp_time : exp_time;
+			rtw_mesh_path_activate(path);
+			exit_critical_bh(&path->state_lock);
+			rtw_mesh_path_tx_pending(path);
+		} else
+			exit_critical_bh(&path->state_lock);
+	}
+
+	rtw_rcu_read_unlock();
+
+	return process ? new_metric : 0;
+}
+
+static void rtw_mesh_rx_hwmp_frame_cnts(_adapter *adapter, u8 *addr)
+{
+	struct sta_info *sta;
+
+	sta = rtw_get_stainfo(&adapter->stapriv, addr);
+	if (sta)
+		sta->sta_stats.rx_hwmp_pkts++;
+}
+
+void rtw_mesh_rx_path_sel_frame(_adapter *adapter, union recv_frame *rframe)
+{
+	struct mesh_plink_ent *plink = NULL;
+	struct rtw_ieee802_11_elems elems;
+	u32 path_metric;
+	struct rx_pkt_attrib *attrib = &rframe->u.hdr.attrib;
+	u8 *pframe = rframe->u.hdr.rx_data, *start;
+	uint frame_len = rframe->u.hdr.len, left;
+	struct rtw_ieee80211_hdr_3addr *frame_hdr = (struct rtw_ieee80211_hdr_3addr *)pframe;
+	u8 *frame_body = (u8 *)(pframe + sizeof(struct rtw_ieee80211_hdr_3addr));
+	ParseRes parse_res;
+
+	plink = rtw_mesh_plink_get(adapter, get_addr2_ptr(pframe));
+	if (!plink || plink->plink_state != RTW_MESH_PLINK_ESTAB)
+		return;
+
+	rtw_mesh_rx_hwmp_frame_cnts(adapter, get_addr2_ptr(pframe));
+
+	/* Mesh action frame IE offset = 2 */
+	attrib->hdrlen = sizeof(struct rtw_ieee80211_hdr_3addr);
+	left = frame_len - attrib->hdrlen - attrib->iv_len - attrib->icv_len - 2;
+	start = pframe + attrib->hdrlen + 2;
+
+	parse_res = rtw_ieee802_11_parse_elems(start, left, &elems, 1);
+	if (parse_res == ParseFailed)
+		RTW_HWMP_INFO(FUNC_ADPT_FMT" Path Select Frame ParseFailed\n"
+			, FUNC_ADPT_ARG(adapter));
+	else if (parse_res == ParseUnknown)
+		RTW_HWMP_INFO(FUNC_ADPT_FMT" Path Select Frame ParseUnknown\n"
+			, FUNC_ADPT_ARG(adapter));
+
+	if (elems.preq) {
+		if (elems.preq_len != 37)
+			/* Right now we support just 1 destination and no AE */
+			return;
+		path_metric = rtw_hwmp_route_info_get(adapter, frame_hdr, elems.preq,
+						  MPATH_PREQ);
+		if (path_metric)
+			rtw_hwmp_preq_frame_process(adapter, frame_hdr, elems.preq,
+						path_metric);
+	}
+	if (elems.prep) {
+		if (elems.prep_len != 31)
+			/* Right now we support no AE */
+			return;
+		path_metric = rtw_hwmp_route_info_get(adapter, frame_hdr, elems.prep,
+						  MPATH_PREP);
+		if (path_metric)
+			rtw_hwmp_prep_frame_process(adapter, frame_hdr, elems.prep,
+						path_metric);
+	}
+	if (elems.perr) {
+		if (elems.perr_len != 15)
+			/* Right now we support only one destination per PERR */
+			return;
+		rtw_hwmp_perr_frame_process(adapter, frame_hdr, elems.perr);
+	}
+	if (elems.rann)
+		rtw_hwmp_rann_frame_process(adapter, frame_hdr, (struct rtw_ieee80211_rann_ie *)elems.rann);
+}
+
+void rtw_mesh_queue_preq(struct rtw_mesh_path *path, u8 flags)
+{
+	_adapter *adapter = path->adapter;
+	struct rtw_mesh_info *minfo = &adapter->mesh_info;
+	struct rtw_mesh_preq_queue *preq_node;
+
+	preq_node = rtw_malloc(sizeof(struct rtw_mesh_preq_queue));
+	if (!preq_node) {
+		RTW_HWMP_INFO("could not allocate PREQ node\n");
+		return;
+	}
+
+	enter_critical_bh(&minfo->mesh_preq_queue_lock);
+	if (minfo->preq_queue_len == RTW_MAX_PREQ_QUEUE_LEN) {
+		exit_critical_bh(&minfo->mesh_preq_queue_lock);
+		rtw_mfree(preq_node, sizeof(struct rtw_mesh_preq_queue));
+		if (rtw_print_ratelimit())
+			RTW_HWMP_INFO("PREQ node queue full\n");
+		return;
+	}
+
+	_rtw_spinlock(&path->state_lock);
+	if (path->flags & RTW_MESH_PATH_REQ_QUEUED) {
+		_rtw_spinunlock(&path->state_lock);
+		exit_critical_bh(&minfo->mesh_preq_queue_lock);
+		rtw_mfree(preq_node, sizeof(struct rtw_mesh_preq_queue));
+		return;
+	}
+
+	_rtw_memcpy(preq_node->dst, path->dst, ETH_ALEN);
+	preq_node->flags = flags;
+
+	path->flags |= RTW_MESH_PATH_REQ_QUEUED;
+#ifdef CONFIG_RTW_MESH_ADD_ROOT_CHK
+	if (flags & RTW_PREQ_Q_F_CHK)
+		path->flags |= RTW_MESH_PATH_ROOT_ADD_CHK;
+#endif
+	if (flags & RTW_PREQ_Q_F_PEER_AKA)
+		path->flags |= RTW_MESH_PATH_PEER_AKA;
+	_rtw_spinunlock(&path->state_lock);
+
+	rtw_list_insert_tail(&preq_node->list, &minfo->preq_queue.list);
+	++minfo->preq_queue_len;
+	exit_critical_bh(&minfo->mesh_preq_queue_lock);
+
+	if (rtw_time_after(rtw_get_current_time(), minfo->last_preq + rtw_min_preq_int_jiff(adapter)))
+		rtw_mesh_work(&adapter->mesh_work);
+
+	else if (rtw_time_before(rtw_get_current_time(), minfo->last_preq)) {
+		/* systime wrapped around issue */
+		minfo->last_preq = rtw_get_current_time() - rtw_min_preq_int_jiff(adapter) - 1;
+		rtw_mesh_work(&adapter->mesh_work);
+	} else
+		rtw_mod_timer(&adapter->mesh_path_timer, minfo->last_preq +
+					rtw_min_preq_int_jiff(adapter) + 1);
+}
+
+static const u8 *rtw_hwmp_preq_da(struct rtw_mesh_path *path,
+			    BOOLEAN is_root_add_chk, BOOLEAN da_is_peer)
+{
+	const u8 *da;
+
+	if (da_is_peer)
+		da = path->dst;
+	else if (path->is_root)
+#ifdef CONFIG_RTW_MESH_ADD_ROOT_CHK
+		da = is_root_add_chk ? path->add_chk_rann_snd_addr:
+				       path->rann_snd_addr;
+#else
+		da = path->rann_snd_addr;
+#endif
+	else
+		da = bcast_addr;
+
+	return da;
+}
+
+void rtw_mesh_path_start_discovery(_adapter *adapter)
+{
+	struct rtw_mesh_info *minfo = &adapter->mesh_info;
+	struct rtw_mesh_cfg *mshcfg = &adapter->mesh_cfg;
+	struct rtw_mesh_preq_queue *preq_node;
+	struct rtw_mesh_path *path;
+	u8 ttl, target_flags = 0;
+	const u8 *da;
+	u32 lifetime;
+	u8 flags = 0;
+	BOOLEAN is_root_add_chk = _FALSE;
+	BOOLEAN da_is_peer;
+
+	enter_critical_bh(&minfo->mesh_preq_queue_lock);
+	if (!minfo->preq_queue_len ||
+		rtw_time_before(rtw_get_current_time(), minfo->last_preq +
+				rtw_min_preq_int_jiff(adapter))) {
+		exit_critical_bh(&minfo->mesh_preq_queue_lock);
+		return;
+	}
+
+	preq_node = rtw_list_first_entry(&minfo->preq_queue.list,
+			struct rtw_mesh_preq_queue, list);
+	rtw_list_delete(&preq_node->list); /* list_del_init(&preq_node->list); */
+	--minfo->preq_queue_len;
+	exit_critical_bh(&minfo->mesh_preq_queue_lock);
+
+	rtw_rcu_read_lock();
+	path = rtw_mesh_path_lookup(adapter, preq_node->dst);
+	if (!path)
+		goto enddiscovery;
+
+	enter_critical_bh(&path->state_lock);
+	if (path->flags & (RTW_MESH_PATH_DELETED | RTW_MESH_PATH_FIXED)) {
+		exit_critical_bh(&path->state_lock);
+		goto enddiscovery;
+	}
+	path->flags &= ~RTW_MESH_PATH_REQ_QUEUED;
+	if (preq_node->flags & RTW_PREQ_Q_F_START) {
+		if (path->flags & RTW_MESH_PATH_RESOLVING) {
+			exit_critical_bh(&path->state_lock);
+			goto enddiscovery;
+		} else {
+			path->flags &= ~RTW_MESH_PATH_RESOLVED;
+			path->flags |= RTW_MESH_PATH_RESOLVING;
+			path->discovery_retries = 0;
+			path->discovery_timeout = rtw_disc_timeout_jiff(adapter);
+		}
+	} else if (!(path->flags & RTW_MESH_PATH_RESOLVING) ||
+			path->flags & RTW_MESH_PATH_RESOLVED) {
+		path->flags &= ~RTW_MESH_PATH_RESOLVING;
+		exit_critical_bh(&path->state_lock);
+		goto enddiscovery;
+	}
+
+	minfo->last_preq = rtw_get_current_time();
+
+	if (rtw_time_after(rtw_get_current_time(), minfo->last_sn_update +
+				rtw_net_traversal_jiffies(adapter)) ||
+	    rtw_time_before(rtw_get_current_time(), minfo->last_sn_update)) {
+		++minfo->sn;
+		minfo->last_sn_update = rtw_get_current_time();
+	}
+	lifetime = rtw_default_lifetime(adapter);
+	ttl = mshcfg->element_ttl;
+	if (ttl == 0) {
+		minfo->mshstats.dropped_frames_ttl++;
+		exit_critical_bh(&path->state_lock);
+		goto enddiscovery;
+	}
+
+	if (preq_node->flags & RTW_PREQ_Q_F_REFRESH)
+		target_flags |= RTW_IEEE80211_PREQ_TO_FLAG;
+	else
+		target_flags &= ~RTW_IEEE80211_PREQ_TO_FLAG;
+
+#ifdef CONFIG_RTW_MESH_ADD_ROOT_CHK
+	is_root_add_chk = !!(path->flags & RTW_MESH_PATH_ROOT_ADD_CHK);
+#endif
+	da_is_peer = !!(path->flags & RTW_MESH_PATH_PEER_AKA);
+	exit_critical_bh(&path->state_lock);
+
+	da = rtw_hwmp_preq_da(path, is_root_add_chk, da_is_peer);
+
+#ifdef CONFIG_RTW_MESH_ON_DMD_GANN
+	flags = (mshcfg->dot11MeshGateAnnouncementProtocol)
+		? RTW_IEEE80211_PREQ_IS_GATE_FLAG : 0;
+#endif
+	rtw_mesh_path_sel_frame_tx(RTW_MPATH_PREQ, flags, adapter_mac_addr(adapter), minfo->sn,
+				   target_flags, path->dst, path->sn, da, 0,
+				   ttl, lifetime, 0, minfo->preq_id++, adapter);
+	rtw_mod_timer(&path->timer, rtw_get_current_time() + path->discovery_timeout);
+
+enddiscovery:
+	rtw_rcu_read_unlock();
+	rtw_mfree(preq_node, sizeof(struct rtw_mesh_preq_queue));
+}
+
+void rtw_mesh_path_timer(void *ctx)
+{
+	struct rtw_mesh_path *path = (void *) ctx;
+	_adapter *adapter = path->adapter;
+	int ret;
+	u8 retry = 0;
+#ifdef CONFIG_RTW_MESH_ADD_ROOT_CHK
+	struct rtw_mesh_cfg *mshcfg = &adapter->mesh_cfg;
+#endif
+	/* TBD: Proctect for suspend */
+#if 0
+	if (suspending)
+		return;
+#endif
+	enter_critical_bh(&path->state_lock);
+	if (path->flags & RTW_MESH_PATH_RESOLVED ||
+			(!(path->flags & RTW_MESH_PATH_RESOLVING))) {
+		path->flags &= ~(RTW_MESH_PATH_RESOLVING |
+				 RTW_MESH_PATH_RESOLVED |
+				 RTW_MESH_PATH_ROOT_ADD_CHK |
+				 RTW_MESH_PATH_PEER_AKA);
+		exit_critical_bh(&path->state_lock);
+	} else if (path->discovery_retries < rtw_max_preq_retries(adapter)) {
+		++path->discovery_retries;
+		path->discovery_timeout *= 2;
+		path->flags &= ~RTW_MESH_PATH_REQ_QUEUED;
+#ifdef CONFIG_RTW_MESH_ADD_ROOT_CHK
+		if (path->discovery_retries > mshcfg->max_root_add_chk_cnt)
+			path->flags &= ~RTW_MESH_PATH_ROOT_ADD_CHK;
+#endif
+		if (path->gate_asked)
+			retry |= RTW_PREQ_Q_F_REFRESH;
+
+		exit_critical_bh(&path->state_lock);
+		rtw_mesh_queue_preq(path, retry);
+	} else {
+		path->flags &= ~(RTW_MESH_PATH_RESOLVING |
+				  RTW_MESH_PATH_RESOLVED |
+				  RTW_MESH_PATH_REQ_QUEUED |
+				  RTW_MESH_PATH_ROOT_ADD_CHK |
+				  RTW_MESH_PATH_PEER_AKA);
+		path->exp_time = rtw_get_current_time();
+		exit_critical_bh(&path->state_lock);
+		if (!path->is_gate && rtw_mesh_gate_num(adapter) > 0) {
+			ret = rtw_mesh_path_send_to_gates(path);
+			if (ret)
+				RTW_HWMP_DBG("no gate was reachable\n");
+		} else
+			rtw_mesh_path_flush_pending(path);
+	}
+}
+
+
+void rtw_mesh_path_tx_root_frame(_adapter *adapter)
+{
+	struct rtw_mesh_cfg *mshcfg = &adapter->mesh_cfg;
+	struct rtw_mesh_info *minfo = &adapter->mesh_info;
+	u32 interval = mshcfg->dot11MeshHWMPRannInterval;
+	u8 flags, target_flags = 0;
+
+	flags = (mshcfg->dot11MeshGateAnnouncementProtocol)
+			? RTW_RANN_FLAG_IS_GATE : 0;
+
+	switch (mshcfg->dot11MeshHWMPRootMode) {
+	case RTW_IEEE80211_PROACTIVE_RANN:
+		rtw_mesh_path_sel_frame_tx(RTW_MPATH_RANN, flags, adapter_mac_addr(adapter),
+					   ++minfo->sn, 0, NULL, 0, bcast_addr,
+					   0, mshcfg->element_ttl,
+					   interval, 0, 0, adapter);
+		break;
+	case RTW_IEEE80211_PROACTIVE_PREQ_WITH_PREP:
+		flags |= RTW_IEEE80211_PREQ_PROACTIVE_PREP_FLAG;
+	case RTW_IEEE80211_PROACTIVE_PREQ_NO_PREP:
+		interval = mshcfg->dot11MeshHWMPactivePathToRootTimeout;
+		target_flags |= RTW_IEEE80211_PREQ_TO_FLAG |
+				RTW_IEEE80211_PREQ_USN_FLAG;
+		rtw_mesh_path_sel_frame_tx(RTW_MPATH_PREQ, flags, adapter_mac_addr(adapter),
+					   ++minfo->sn, target_flags,
+					   (u8 *) bcast_addr, 0, bcast_addr,
+					   0, mshcfg->element_ttl, interval,
+					   0, minfo->preq_id++, adapter);
+		break;
+	default:
+		RTW_HWMP_INFO("Proactive mechanism not supported\n");
+		return;
+	}
+}
+
+void rtw_mesh_work(_workitem *work)
+{
+	/* use kernel global workqueue */
+	_set_workitem(work);
+}
+
+void rtw_ieee80211_mesh_path_timer(void *ctx)
+{
+	_adapter *adapter = (_adapter *)ctx;
+	rtw_mesh_work(&adapter->mesh_work);
+}
+
+void rtw_ieee80211_mesh_path_root_timer(void *ctx)
+{
+	_adapter *adapter = (_adapter *)ctx;
+
+	rtw_set_bit(RTW_MESH_WORK_ROOT, &adapter->wrkq_flags);
+
+	rtw_mesh_work(&adapter->mesh_work);
+}
+
+static void rtw_ieee80211_mesh_rootpath(_adapter *adapter)
+{
+	u32 interval;
+
+	rtw_mesh_path_tx_root_frame(adapter);
+
+	if (adapter->mesh_cfg.dot11MeshHWMPRootMode == RTW_IEEE80211_PROACTIVE_RANN)
+		interval = adapter->mesh_cfg.dot11MeshHWMPRannInterval;
+	else
+		interval = adapter->mesh_cfg.dot11MeshHWMProotInterval;
+
+	rtw_mod_timer(&adapter->mesh_path_root_timer,
+		  RTW_TU_TO_EXP_TIME(interval));
+}
+
+BOOLEAN rtw_ieee80211_mesh_root_setup(_adapter *adapter)
+{
+	BOOLEAN root_enabled = _FALSE;
+
+	if (adapter->mesh_cfg.dot11MeshHWMPRootMode > RTW_IEEE80211_ROOTMODE_ROOT) {
+		rtw_set_bit(RTW_MESH_WORK_ROOT, &adapter->wrkq_flags);
+		root_enabled = _TRUE;
+	}
+	else {
+		rtw_clear_bit(RTW_MESH_WORK_ROOT, &adapter->wrkq_flags);
+		/* stop running timer */
+		_cancel_timer_ex(&adapter->mesh_path_root_timer);
+		root_enabled = _FALSE;
+	}
+
+	return root_enabled;
+}
+
+void rtw_mesh_work_hdl(_workitem *work)
+{
+	_adapter *adapter = container_of(work, _adapter, mesh_work);
+
+	while(adapter->mesh_info.preq_queue_len) {
+		if (rtw_time_after(rtw_get_current_time(),
+		       adapter->mesh_info.last_preq + rtw_min_preq_int_jiff(adapter)))
+		       /* It will consume preq_queue_len */
+		       rtw_mesh_path_start_discovery(adapter);
+		else {
+			struct rtw_mesh_info *minfo = &adapter->mesh_info;
+
+			rtw_mod_timer(&adapter->mesh_path_timer,
+				minfo->last_preq + rtw_min_preq_int_jiff(adapter) + 1);
+			break;
+		}
+	}
+
+	if (rtw_test_and_clear_bit(RTW_MESH_WORK_ROOT, &adapter->wrkq_flags))
+		rtw_ieee80211_mesh_rootpath(adapter);
+}
+
+#ifndef RTW_PER_CMD_SUPPORT_FW
+static void rtw_update_metric_directly(_adapter *adapter)
+{
+	struct dvobj_priv *dvobj = adapter_to_dvobj(adapter);
+	struct macid_ctl_t *macid_ctl = dvobj_to_macidctl(dvobj);
+	u8 i;
+
+	for (i = 0; i < macid_ctl->num; i++) {
+		u8 role;
+		role = GET_H2CCMD_MSRRPT_PARM_ROLE(&macid_ctl->h2c_msr[i]);
+		if (role == H2C_MSR_ROLE_MESH) {
+			struct sta_info *sta = macid_ctl->sta[i];
+			u8 rate_idx, sgi, bw;
+			u32 rate;
+
+			if (!sta)
+				continue;
+			rate_idx = rtw_get_current_tx_rate(adapter, sta);
+			sgi = rtw_get_current_tx_sgi(adapter, sta);
+			bw = sta->cmn.bw_mode;
+			rate = rtw_desc_rate_to_bitrate(bw, rate_idx, sgi);
+			sta->metrics.data_rate = rate;
+		}
+	}
+}
+#endif
+
+void rtw_mesh_atlm_param_req_timer(void *ctx)
+{
+	_adapter *adapter = (_adapter *)ctx;
+	u8 ret = _FAIL;
+
+#ifdef RTW_PER_CMD_SUPPORT_FW
+	ret = rtw_req_per_cmd(adapter);
+	if (ret == _FAIL)
+		RTW_HWMP_INFO("rtw_req_per_cmd fail\n");
+#else
+	rtw_update_metric_directly(adapter);
+#endif
+	_set_timer(&adapter->mesh_atlm_param_req_timer, RTW_ATLM_REQ_CYCLE);
+}
+
+#endif /* CONFIG_RTW_MESH */
+
diff --git a/rtl8723DS/core/mesh/rtw_mesh_hwmp.h b/rtl8723DS/core/mesh/rtw_mesh_hwmp.h
new file mode 100644
index 0000000..9433417
--- a/dev/null
+++ b/rtl8723DS/core/mesh/rtw_mesh_hwmp.h
@@ -0,0 +1,60 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2007 - 2017 Realtek Corporation.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ *****************************************************************************/
+#ifndef __RTW_MESH_HWMP_H_
+#define __RTW_MESH_HWMP_H_
+
+#ifndef DBG_RTW_HWMP
+#define DBG_RTW_HWMP 0
+#endif
+#if DBG_RTW_HWMP
+#define RTW_HWMP_DBG(fmt, arg...) RTW_PRINT(fmt, ##arg)
+#else
+#define RTW_HWMP_DBG(fmt, arg...) RTW_DBG(fmt, ##arg)
+#endif
+
+#ifndef INFO_RTW_HWMP
+#define INFO_RTW_HWMP 0
+#endif
+#if INFO_RTW_HWMP
+#define RTW_HWMP_INFO(fmt, arg...) RTW_PRINT(fmt, ##arg)
+#else
+#define RTW_HWMP_INFO(fmt, arg...) RTW_INFO(fmt, ##arg)
+#endif
+
+
+void rtw_ewma_err_rate_init(struct rtw_ewma_err_rate *e);
+unsigned long rtw_ewma_err_rate_read(struct rtw_ewma_err_rate *e);
+void rtw_ewma_err_rate_add(struct rtw_ewma_err_rate *e, unsigned long val);
+int rtw_mesh_path_error_tx(_adapter *adapter,
+			   u8 ttl, const u8 *target, u32 target_sn,
+			   u16 target_rcode, const u8 *ra);
+void rtw_ieee80211s_update_metric(_adapter *adapter, u8 mac_id,
+				  u8 per, u8 rate,
+				  u8 bw, u8 total_pkt);
+void rtw_mesh_rx_path_sel_frame(_adapter *adapter, union recv_frame *rframe);
+void rtw_mesh_queue_preq(struct rtw_mesh_path *mpath, u8 flags);
+void rtw_mesh_path_start_discovery(_adapter *adapter);
+void rtw_mesh_path_timer(void *ctx);
+void rtw_mesh_path_tx_root_frame(_adapter *adapter);
+void rtw_mesh_work_hdl(_workitem *work);
+void rtw_ieee80211_mesh_path_timer(void *ctx);
+void rtw_ieee80211_mesh_path_root_timer(void *ctx);
+BOOLEAN rtw_ieee80211_mesh_root_setup(_adapter *adapter);
+void rtw_mesh_work(_workitem *work);
+void rtw_mesh_atlm_param_req_timer(void *ctx);
+
+#endif /* __RTW_MESH_HWMP_H_ */
+
+
diff --git a/rtl8723DS/core/mesh/rtw_mesh_pathtbl.c b/rtl8723DS/core/mesh/rtw_mesh_pathtbl.c
new file mode 100644
index 0000000..d879160
--- a/dev/null
+++ b/rtl8723DS/core/mesh/rtw_mesh_pathtbl.c
@@ -0,0 +1,1237 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2007 - 2017 Realtek Corporation.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ *****************************************************************************/
+#define _RTW_MESH_PATHTBL_C_
+
+#ifdef CONFIG_RTW_MESH
+#include <drv_types.h>
+#include <linux/jhash.h>
+
+#ifdef PLATFORM_LINUX
+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 0, 0))
+static void rtw_mpath_free_rcu(struct rtw_mesh_path *mpath)
+{
+	kfree_rcu(mpath, rcu);
+	rtw_mstat_update(MSTAT_TYPE_PHY, MSTAT_FREE, sizeof(struct rtw_mesh_path));
+}
+#else
+static void rtw_mpath_free_rcu_callback(rtw_rcu_head *head)
+{
+	struct rtw_mesh_path *mpath;
+
+	mpath = container_of(head, struct rtw_mesh_path, rcu);
+	rtw_mfree(mpath, sizeof(struct rtw_mesh_path));
+}
+
+static void rtw_mpath_free_rcu(struct rtw_mesh_path *mpath)
+{
+	call_rcu(&mpath->rcu, rtw_mpath_free_rcu_callback);
+}
+#endif
+#endif /* PLATFORM_LINUX */
+
+static void rtw_mesh_path_free_rcu(struct rtw_mesh_table *tbl, struct rtw_mesh_path *mpath);
+
+static u32 rtw_mesh_table_hash(const void *addr, u32 len, u32 seed)
+{
+	/* Use last four bytes of hw addr as hash index */
+	return jhash_1word(*(u32 *)(addr+2), seed);
+}
+
+static const rtw_rhashtable_params rtw_mesh_rht_params = {
+	.nelem_hint = 2,
+	.automatic_shrinking = true,
+	.key_len = ETH_ALEN,
+	.key_offset = offsetof(struct rtw_mesh_path, dst),
+	.head_offset = offsetof(struct rtw_mesh_path, rhash),
+	.hashfn = rtw_mesh_table_hash,
+};
+
+static inline bool rtw_mpath_expired(struct rtw_mesh_path *mpath)
+{
+	return (mpath->flags & RTW_MESH_PATH_ACTIVE) &&
+	       rtw_time_after(rtw_get_current_time(), mpath->exp_time) &&
+	       !(mpath->flags & RTW_MESH_PATH_FIXED);
+}
+
+static void rtw_mesh_path_rht_free(void *ptr, void *tblptr)
+{
+	struct rtw_mesh_path *mpath = ptr;
+	struct rtw_mesh_table *tbl = tblptr;
+
+	rtw_mesh_path_free_rcu(tbl, mpath);
+}
+
+static struct rtw_mesh_table *rtw_mesh_table_alloc(void)
+{
+	struct rtw_mesh_table *newtbl;
+
+	newtbl = rtw_malloc(sizeof(struct rtw_mesh_table));
+	if (!newtbl)
+		return NULL;
+
+	rtw_hlist_head_init(&newtbl->known_gates);
+	ATOMIC_SET(&newtbl->entries,  0);
+	_rtw_spinlock_init(&newtbl->gates_lock);
+
+	return newtbl;
+}
+
+static void rtw_mesh_table_free(struct rtw_mesh_table *tbl)
+{
+	rtw_rhashtable_free_and_destroy(&tbl->rhead,
+				    rtw_mesh_path_rht_free, tbl);
+	rtw_mfree(tbl, sizeof(struct rtw_mesh_table));
+}
+
+/**
+ *
+ * rtw_mesh_path_assign_nexthop - update mesh path next hop
+ *
+ * @mpath: mesh path to update
+ * @sta: next hop to assign
+ *
+ * Locking: mpath->state_lock must be held when calling this function
+ */
+void rtw_mesh_path_assign_nexthop(struct rtw_mesh_path *mpath, struct sta_info *sta)
+{
+	struct xmit_frame *xframe;
+	_list *list, *head;
+
+	rtw_rcu_assign_pointer(mpath->next_hop, sta);
+
+	enter_critical_bh(&mpath->frame_queue.lock);
+	head = &mpath->frame_queue.queue;
+	list = get_next(head);
+	while (rtw_end_of_queue_search(head, list) == _FALSE) {
+		xframe = LIST_CONTAINOR(list, struct xmit_frame, list);
+		list = get_next(list);
+		_rtw_memcpy(xframe->attrib.ra, sta->cmn.mac_addr, ETH_ALEN);
+	}
+
+	exit_critical_bh(&mpath->frame_queue.lock);
+}
+
+static void rtw_prepare_for_gate(struct xmit_frame *xframe, char *dst_addr,
+			     struct rtw_mesh_path *gate_mpath)
+{
+	struct pkt_attrib *attrib = &xframe->attrib;
+	char *next_hop;
+
+	if (attrib->mesh_frame_mode == MESH_UCAST_DATA)
+		attrib->mesh_frame_mode = MESH_UCAST_PX_DATA;
+
+	/* update next hop */
+	rtw_rcu_read_lock();
+	next_hop = rtw_rcu_dereference(gate_mpath->next_hop)->cmn.mac_addr;
+	_rtw_memcpy(attrib->ra, next_hop, ETH_ALEN);
+	rtw_rcu_read_unlock();
+	_rtw_memcpy(attrib->mda, dst_addr, ETH_ALEN);
+}
+
+/**
+ *
+ * rtw_mesh_path_move_to_queue - Move or copy frames from one mpath queue to another
+ *
+ * This function is used to transfer or copy frames from an unresolved mpath to
+ * a gate mpath.  The function also adds the Address Extension field and
+ * updates the next hop.
+ *
+ * If a frame already has an Address Extension field, only the next hop and
+ * destination addresses are updated.
+ *
+ * The gate mpath must be an active mpath with a valid mpath->next_hop.
+ *
+ * @mpath: An active mpath the frames will be sent to (i.e. the gate)
+ * @from_mpath: The failed mpath
+ * @copy: When true, copy all the frames to the new mpath queue.  When false,
+ * move them.
+ */
+static void rtw_mesh_path_move_to_queue(struct rtw_mesh_path *gate_mpath,
+				    struct rtw_mesh_path *from_mpath,
+				    bool copy)
+{
+	struct xmit_frame *fskb;
+	_list *list, *head;
+	_list failq;
+	u32 failq_len;
+	_irqL flags;
+
+	if (rtw_warn_on(gate_mpath == from_mpath))
+		return;
+	if (rtw_warn_on(!gate_mpath->next_hop))
+		return;
+
+	_rtw_init_listhead(&failq);
+
+	_enter_critical_bh(&from_mpath->frame_queue.lock, &flags);
+	rtw_list_splice_init(&from_mpath->frame_queue.queue, &failq);
+	failq_len = from_mpath->frame_queue_len;
+	from_mpath->frame_queue_len = 0;
+	_exit_critical_bh(&from_mpath->frame_queue.lock, &flags);
+
+	head = &failq;
+	list = get_next(head);
+	while (rtw_end_of_queue_search(head, list) == _FALSE) {
+		if (gate_mpath->frame_queue_len >= RTW_MESH_FRAME_QUEUE_LEN) {
+			RTW_MPATH_DBG(FUNC_ADPT_FMT" mpath queue for gate %pM is full!\n"
+				, FUNC_ADPT_ARG(gate_mpath->adapter), gate_mpath->dst);
+			break;
+		}
+
+		fskb = LIST_CONTAINOR(list, struct xmit_frame, list);
+		list = get_next(list);
+
+		rtw_list_delete(&fskb->list);
+		failq_len--;
+		rtw_prepare_for_gate(fskb, gate_mpath->dst, gate_mpath);
+		_enter_critical_bh(&gate_mpath->frame_queue.lock, &flags);
+		rtw_list_insert_tail(&fskb->list, get_list_head(&gate_mpath->frame_queue));
+		gate_mpath->frame_queue_len++;
+		_exit_critical_bh(&gate_mpath->frame_queue.lock, &flags);
+
+		#if 0 /* TODO: copy */
+		skb = rtw_skb_copy(fskb);
+		if (rtw_warn_on(!skb))
+			break;
+
+		rtw_prepare_for_gate(skb, gate_mpath->dst, gate_mpath);
+		skb_queue_tail(&gate_mpath->frame_queue, skb);
+
+		if (copy)
+			continue;
+
+		__skb_unlink(fskb, &failq);
+		rtw_skb_free(fskb);
+		#endif
+	}
+
+	RTW_MPATH_DBG(FUNC_ADPT_FMT" mpath queue for gate %pM has %d frames\n"
+		, FUNC_ADPT_ARG(gate_mpath->adapter), gate_mpath->dst, gate_mpath->frame_queue_len);
+
+	if (!copy)
+		return;
+
+	_enter_critical_bh(&from_mpath->frame_queue.lock, &flags);
+	rtw_list_splice(&failq, &from_mpath->frame_queue.queue);
+	from_mpath->frame_queue_len += failq_len;
+	_exit_critical_bh(&from_mpath->frame_queue.lock, &flags);
+}
+
+
+static struct rtw_mesh_path *rtw_mpath_lookup(struct rtw_mesh_table *tbl, const u8 *dst)
+{
+	struct rtw_mesh_path *mpath;
+
+	if (!tbl)
+		return NULL;
+
+	mpath = rtw_rhashtable_lookup_fast(&tbl->rhead, dst, rtw_mesh_rht_params);
+
+	if (mpath && rtw_mpath_expired(mpath)) {
+		enter_critical_bh(&mpath->state_lock);
+		mpath->flags &= ~RTW_MESH_PATH_ACTIVE;
+		exit_critical_bh(&mpath->state_lock);
+	}
+	return mpath;
+}
+
+/**
+ * rtw_mesh_path_lookup - look up a path in the mesh path table
+ * @sdata: local subif
+ * @dst: hardware address (ETH_ALEN length) of destination
+ *
+ * Returns: pointer to the mesh path structure, or NULL if not found
+ *
+ * Locking: must be called within a read rcu section.
+ */
+struct rtw_mesh_path *
+rtw_mesh_path_lookup(_adapter *adapter, const u8 *dst)
+{
+	return rtw_mpath_lookup(adapter->mesh_info.mesh_paths, dst);
+}
+
+struct rtw_mesh_path *
+rtw_mpp_path_lookup(_adapter *adapter, const u8 *dst)
+{
+	return rtw_mpath_lookup(adapter->mesh_info.mpp_paths, dst);
+}
+
+static struct rtw_mesh_path *
+__rtw_mesh_path_lookup_by_idx(struct rtw_mesh_table *tbl, int idx)
+{
+	int i = 0, ret;
+	struct rtw_mesh_path *mpath = NULL;
+	rtw_rhashtable_iter iter;
+
+	if (!tbl)
+		return NULL;
+
+	ret = rtw_rhashtable_walk_enter(&tbl->rhead, &iter);
+	if (ret)
+		return NULL;
+
+	ret = rtw_rhashtable_walk_start(&iter);
+	if (ret && ret != -EAGAIN)
+		goto err;
+
+	while ((mpath = rtw_rhashtable_walk_next(&iter))) {
+		if (IS_ERR(mpath) && PTR_ERR(mpath) == -EAGAIN)
+			continue;
+		if (IS_ERR(mpath))
+			break;
+		if (i++ == idx)
+			break;
+	}
+err:
+	rtw_rhashtable_walk_stop(&iter);
+	rtw_rhashtable_walk_exit(&iter);
+
+	if (IS_ERR(mpath) || !mpath)
+		return NULL;
+
+	if (rtw_mpath_expired(mpath)) {
+		enter_critical_bh(&mpath->state_lock);
+		mpath->flags &= ~RTW_MESH_PATH_ACTIVE;
+		exit_critical_bh(&mpath->state_lock);
+	}
+	return mpath;
+}
+
+/**
+ * rtw_mesh_path_lookup_by_idx - look up a path in the mesh path table by its index
+ * @idx: index
+ * @sdata: local subif, or NULL for all entries
+ *
+ * Returns: pointer to the mesh path structure, or NULL if not found.
+ *
+ * Locking: must be called within a read rcu section.
+ */
+struct rtw_mesh_path *
+rtw_mesh_path_lookup_by_idx(_adapter *adapter, int idx)
+{
+	return __rtw_mesh_path_lookup_by_idx(adapter->mesh_info.mesh_paths, idx);
+}
+
+void dump_mpath(void *sel, _adapter *adapter)
+{
+	struct rtw_mesh_path *mpath;
+	int idx = 0;
+	char dst[ETH_ALEN];
+	char next_hop[ETH_ALEN];
+	u32 sn, metric, qlen;
+	u32 exp_ms = 0, dto_ms;
+	u8 drty;
+	enum rtw_mesh_path_flags flags;
+
+	RTW_PRINT_SEL(sel, "%-17s %-17s %-10s %-10s %-4s %-6s %-6s %-4s flags\n"
+		, "dst", "next_hop", "sn", "metric", "qlen", "exp_ms", "dto_ms", "drty"
+	);
+
+	do {
+		rtw_rcu_read_lock();
+
+		mpath = rtw_mesh_path_lookup_by_idx(adapter, idx);
+		if (mpath) {
+			_rtw_memcpy(dst, mpath->dst, ETH_ALEN);
+			_rtw_memcpy(next_hop, mpath->next_hop->cmn.mac_addr, ETH_ALEN);
+			sn = mpath->sn;
+			metric = mpath->metric;
+			qlen = mpath->frame_queue_len;
+			if (rtw_time_after(mpath->exp_time, rtw_get_current_time()))
+				exp_ms = rtw_get_remaining_time_ms(mpath->exp_time);
+			dto_ms = rtw_systime_to_ms(mpath->discovery_timeout);
+			drty = mpath->discovery_retries;
+			flags = mpath->flags;
+		}
+
+		rtw_rcu_read_unlock();
+
+		if (mpath) {
+			RTW_PRINT_SEL(sel, MAC_FMT" "MAC_FMT" %10u %10u %4u %6u %6u %4u%s%s%s%s%s\n"
+				, MAC_ARG(dst), MAC_ARG(next_hop), sn, metric, qlen
+				, exp_ms < 999999 ? exp_ms : 999999
+				, dto_ms < 999999 ? dto_ms : 999999
+				, drty
+				, (flags & RTW_MESH_PATH_ACTIVE) ? " ACT" : ""
+				, (flags & RTW_MESH_PATH_RESOLVING) ? " RSVING" : ""
+				, (flags & RTW_MESH_PATH_SN_VALID) ? " SN_VALID" : ""
+				, (flags & RTW_MESH_PATH_FIXED) ?  " FIXED" : ""
+				, (flags & RTW_MESH_PATH_RESOLVED) ? " RSVED" : ""
+			);
+		}
+
+		idx++;
+	} while (mpath);
+}
+
+/**
+ * rtw_mpp_path_lookup_by_idx - look up a path in the proxy path table by its index
+ * @idx: index
+ * @sdata: local subif, or NULL for all entries
+ *
+ * Returns: pointer to the proxy path structure, or NULL if not found.
+ *
+ * Locking: must be called within a read rcu section.
+ */
+struct rtw_mesh_path *
+rtw_mpp_path_lookup_by_idx(_adapter *adapter, int idx)
+{
+	return __rtw_mesh_path_lookup_by_idx(adapter->mesh_info.mpp_paths, idx);
+}
+
+/**
+ * rtw_mesh_path_add_gate - add the given mpath to a mesh gate to our path table
+ * @mpath: gate path to add to table
+ */
+int rtw_mesh_path_add_gate(struct rtw_mesh_path *mpath)
+{
+	struct rtw_mesh_cfg *mcfg;
+	struct rtw_mesh_info *minfo;
+	struct rtw_mesh_table *tbl;
+	int err, ori_num_gates;
+
+	rtw_rcu_read_lock();
+	tbl = mpath->adapter->mesh_info.mesh_paths;
+	if (!tbl) {
+		err = -ENOENT;
+		goto err_rcu;
+	}
+
+	enter_critical_bh(&mpath->state_lock);
+	mcfg = &mpath->adapter->mesh_cfg;
+	mpath->gate_timeout = rtw_get_current_time() +
+			      rtw_ms_to_systime(mcfg->path_gate_timeout_factor *
+					        mpath->gate_ann_int);
+	if (mpath->is_gate) {
+		err = -EEXIST;
+		exit_critical_bh(&mpath->state_lock);
+		goto err_rcu;
+	}
+
+	minfo = &mpath->adapter->mesh_info;
+	mpath->is_gate = true;
+	_rtw_spinlock(&tbl->gates_lock);
+	ori_num_gates = minfo->num_gates;
+	minfo->num_gates++;
+	rtw_hlist_add_head_rcu(&mpath->gate_list, &tbl->known_gates);
+
+	if (ori_num_gates == 0
+		|| rtw_macaddr_is_larger(mpath->dst, minfo->max_addr_gate->dst)
+	) {
+		minfo->max_addr_gate = mpath;
+		minfo->max_addr_gate_is_larger_than_self =
+			rtw_macaddr_is_larger(mpath->dst, adapter_mac_addr(mpath->adapter));
+	}
+
+	_rtw_spinunlock(&tbl->gates_lock);
+
+	exit_critical_bh(&mpath->state_lock);
+
+	if (ori_num_gates == 0) {
+		update_beacon(mpath->adapter, WLAN_EID_MESH_CONFIG, NULL, _TRUE);
+		#if CONFIG_RTW_MESH_CTO_MGATE_CARRIER
+		if (!rtw_mesh_cto_mgate_required(mpath->adapter))
+			rtw_netif_carrier_on(mpath->adapter->pnetdev);
+		#endif
+	}
+
+	RTW_MPATH_DBG(
+		  FUNC_ADPT_FMT" Mesh path: Recorded new gate: %pM. %d known gates\n",
+		  FUNC_ADPT_ARG(mpath->adapter),
+		  mpath->dst, mpath->adapter->mesh_info.num_gates);
+	err = 0;
+err_rcu:
+	rtw_rcu_read_unlock();
+	return err;
+}
+
+/**
+ * rtw_mesh_gate_del - remove a mesh gate from the list of known gates
+ * @tbl: table which holds our list of known gates
+ * @mpath: gate mpath
+ */
+void rtw_mesh_gate_del(struct rtw_mesh_table *tbl, struct rtw_mesh_path *mpath)
+{
+	struct rtw_mesh_cfg *mcfg;
+	struct rtw_mesh_info *minfo;
+	int ori_num_gates;
+
+	rtw_lockdep_assert_held(&mpath->state_lock);
+	if (!mpath->is_gate)
+		return;
+
+	mcfg = &mpath->adapter->mesh_cfg;
+	minfo = &mpath->adapter->mesh_info;
+
+	mpath->is_gate = false;
+	enter_critical_bh(&tbl->gates_lock);
+	rtw_hlist_del_rcu(&mpath->gate_list);
+	ori_num_gates = minfo->num_gates;
+	minfo->num_gates--;
+
+	if (ori_num_gates == 1) {
+		minfo->max_addr_gate = NULL;
+		minfo->max_addr_gate_is_larger_than_self = 0;
+	} else if (minfo->max_addr_gate == mpath) {
+		struct rtw_mesh_path *gate, *max_addr_gate = NULL;
+		rtw_hlist_node *node;
+
+		rtw_hlist_for_each_entry_rcu(gate, node, &tbl->known_gates, gate_list) {
+			if (!max_addr_gate || rtw_macaddr_is_larger(gate->dst, max_addr_gate->dst))
+				max_addr_gate = gate;
+		}
+		minfo->max_addr_gate = max_addr_gate;
+		minfo->max_addr_gate_is_larger_than_self =
+			rtw_macaddr_is_larger(max_addr_gate->dst, adapter_mac_addr(mpath->adapter));
+	}
+
+	exit_critical_bh(&tbl->gates_lock);
+
+	if (ori_num_gates == 1) {
+		update_beacon(mpath->adapter, WLAN_EID_MESH_CONFIG, NULL, _TRUE);
+		#if CONFIG_RTW_MESH_CTO_MGATE_CARRIER
+		if (rtw_mesh_cto_mgate_required(mpath->adapter))
+			rtw_netif_carrier_off(mpath->adapter->pnetdev);
+		#endif
+	}
+
+	RTW_MPATH_DBG(
+		  FUNC_ADPT_FMT" Mesh path: Deleted gate: %pM. %d known gates\n",
+		  FUNC_ADPT_ARG(mpath->adapter),
+		  mpath->dst, mpath->adapter->mesh_info.num_gates);
+}
+
+/**
+ * rtw_mesh_gate_search - search a mesh gate from the list of known gates
+ * @tbl: table which holds our list of known gates
+ * @addr: address of gate
+ */
+bool rtw_mesh_gate_search(struct rtw_mesh_table *tbl, const u8 *addr)
+{
+	struct rtw_mesh_path *gate;
+	rtw_hlist_node *node;
+	bool exist = 0;
+
+	rtw_rcu_read_lock();
+	rtw_hlist_for_each_entry_rcu(gate, node, &tbl->known_gates, gate_list) {
+		if (_rtw_memcmp(gate->dst, addr, ETH_ALEN) == _TRUE) {
+			exist = 1;
+			break;
+		}
+	}
+
+	rtw_rcu_read_unlock();
+
+	return exist;
+}
+
+/**
+ * rtw_mesh_gate_num - number of gates known to this interface
+ * @sdata: subif data
+ */
+int rtw_mesh_gate_num(_adapter *adapter)
+{
+	return adapter->mesh_info.num_gates;
+}
+
+bool rtw_mesh_is_primary_gate(_adapter *adapter)
+{
+	struct rtw_mesh_cfg *mcfg = &adapter->mesh_cfg;
+	struct rtw_mesh_info *minfo = &adapter->mesh_info;
+
+	return mcfg->dot11MeshGateAnnouncementProtocol
+		&& !minfo->max_addr_gate_is_larger_than_self;
+}
+
+void dump_known_gates(void *sel, _adapter *adapter)
+{
+	struct rtw_mesh_info *minfo = &adapter->mesh_info;
+	struct rtw_mesh_table *tbl;
+	struct rtw_mesh_path *gate;
+	rtw_hlist_node *node;
+
+	if (!rtw_mesh_gate_num(adapter))
+		goto exit;
+
+	rtw_rcu_read_lock();
+
+	tbl = minfo->mesh_paths;
+	if (!tbl)
+		goto unlock;
+
+	RTW_PRINT_SEL(sel, "num:%d\n", rtw_mesh_gate_num(adapter));
+
+	rtw_hlist_for_each_entry_rcu(gate, node, &tbl->known_gates, gate_list) {
+		RTW_PRINT_SEL(sel, "%c"MAC_FMT"\n"
+			, gate == minfo->max_addr_gate ? '*' : ' '
+			, MAC_ARG(gate->dst));
+	}
+
+unlock:
+	rtw_rcu_read_unlock();
+exit:
+	return;
+}
+
+static
+struct rtw_mesh_path *rtw_mesh_path_new(_adapter *adapter,
+				const u8 *dst)
+{
+	struct rtw_mesh_path *new_mpath;
+
+	new_mpath = rtw_zmalloc(sizeof(struct rtw_mesh_path));
+	if (!new_mpath)
+		return NULL;
+
+	_rtw_memcpy(new_mpath->dst, dst, ETH_ALEN);
+	_rtw_memset(new_mpath->rann_snd_addr, 0xFF, ETH_ALEN);
+	new_mpath->is_root = false;
+	new_mpath->adapter = adapter;
+	new_mpath->flags = 0;
+	new_mpath->gate_asked = false;
+	_rtw_init_queue(&new_mpath->frame_queue);
+	new_mpath->frame_queue_len = 0;
+	new_mpath->exp_time = rtw_get_current_time();
+	_rtw_spinlock_init(&new_mpath->state_lock);
+	rtw_init_timer(&new_mpath->timer, adapter, rtw_mesh_path_timer, new_mpath);
+
+	return new_mpath;
+}
+
+/**
+ * rtw_mesh_path_add - allocate and add a new path to the mesh path table
+ * @dst: destination address of the path (ETH_ALEN length)
+ * @sdata: local subif
+ *
+ * Returns: 0 on success
+ *
+ * State: the initial state of the new path is set to 0
+ */
+struct rtw_mesh_path *rtw_mesh_path_add(_adapter *adapter,
+				const u8 *dst)
+{
+	struct rtw_mesh_table *tbl = adapter->mesh_info.mesh_paths;
+	struct rtw_mesh_path *mpath, *new_mpath;
+	int ret;
+
+	if (!tbl)
+		return ERR_PTR(-ENOTSUPP);
+
+	if (_rtw_memcmp(dst, adapter_mac_addr(adapter), ETH_ALEN) == _TRUE)
+		/* never add ourselves as neighbours */
+		return ERR_PTR(-ENOTSUPP);
+
+	if (is_multicast_mac_addr(dst))
+		return ERR_PTR(-ENOTSUPP);
+
+	if (ATOMIC_INC_UNLESS(&adapter->mesh_info.mpaths, RTW_MESH_MAX_MPATHS) == 0)
+		return ERR_PTR(-ENOSPC);
+
+	new_mpath = rtw_mesh_path_new(adapter, dst);
+	if (!new_mpath)
+		return ERR_PTR(-ENOMEM);
+
+	do {
+		ret = rtw_rhashtable_lookup_insert_fast(&tbl->rhead,
+						    &new_mpath->rhash,
+						    rtw_mesh_rht_params);
+
+		if (ret == -EEXIST)
+			mpath = rtw_rhashtable_lookup_fast(&tbl->rhead,
+						       dst,
+						       rtw_mesh_rht_params);
+
+	} while (unlikely(ret == -EEXIST && !mpath));
+
+	if (ret && ret != -EEXIST)
+		return ERR_PTR(ret);
+
+	/* At this point either new_mpath was added, or we found a
+	 * matching entry already in the table; in the latter case
+	 * free the unnecessary new entry.
+	 */
+	if (ret == -EEXIST) {
+		rtw_mfree(new_mpath, sizeof(struct rtw_mesh_path));
+		new_mpath = mpath;
+	}
+	adapter->mesh_info.mesh_paths_generation++;
+	return new_mpath;
+}
+
+int rtw_mpp_path_add(_adapter *adapter,
+		 const u8 *dst, const u8 *mpp)
+{
+	struct rtw_mesh_table *tbl = adapter->mesh_info.mpp_paths;
+	struct rtw_mesh_path *new_mpath;
+	int ret;
+
+	if (!tbl)
+		return -ENOTSUPP;
+
+	if (_rtw_memcmp(dst, adapter_mac_addr(adapter), ETH_ALEN) == _TRUE)
+		/* never add ourselves as neighbours */
+		return -ENOTSUPP;
+
+	if (is_multicast_mac_addr(dst))
+		return -ENOTSUPP;
+
+	new_mpath = rtw_mesh_path_new(adapter, dst);
+
+	if (!new_mpath)
+		return -ENOMEM;
+
+	_rtw_memcpy(new_mpath->mpp, mpp, ETH_ALEN);
+	ret = rtw_rhashtable_lookup_insert_fast(&tbl->rhead,
+					    &new_mpath->rhash,
+					    rtw_mesh_rht_params);
+
+	adapter->mesh_info.mpp_paths_generation++;
+	return ret;
+}
+
+void dump_mpp(void *sel, _adapter *adapter)
+{
+	struct rtw_mesh_path *mpath;
+	int idx = 0;
+	char dst[ETH_ALEN];
+	char mpp[ETH_ALEN];
+
+	RTW_PRINT_SEL(sel, "%-17s %-17s\n", "dst", "mpp");
+
+	do {
+		rtw_rcu_read_lock();
+
+		mpath = rtw_mpp_path_lookup_by_idx(adapter, idx);
+		if (mpath) {
+			_rtw_memcpy(dst, mpath->dst, ETH_ALEN);
+			_rtw_memcpy(mpp, mpath->mpp, ETH_ALEN);
+		}
+
+		rtw_rcu_read_unlock();
+
+		if (mpath) {
+			RTW_PRINT_SEL(sel, MAC_FMT" "MAC_FMT"\n"
+				, MAC_ARG(dst), MAC_ARG(mpp));
+		}
+
+		idx++;
+	} while (mpath);
+}
+
+/**
+ * rtw_mesh_plink_broken - deactivates paths and sends perr when a link breaks
+ *
+ * @sta: broken peer link
+ *
+ * This function must be called from the rate control algorithm if enough
+ * delivery errors suggest that a peer link is no longer usable.
+ */
+void rtw_mesh_plink_broken(struct sta_info *sta)
+{
+	_adapter *adapter = sta->padapter;
+	struct rtw_mesh_table *tbl = adapter->mesh_info.mesh_paths;
+	static const u8 bcast[ETH_ALEN] = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff};
+	struct rtw_mesh_path *mpath;
+	rtw_rhashtable_iter iter;
+	int ret;
+
+	if (!tbl)
+		return;
+
+	ret = rtw_rhashtable_walk_enter(&tbl->rhead, &iter);
+	if (ret)
+		return;
+
+	ret = rtw_rhashtable_walk_start(&iter);
+	if (ret && ret != -EAGAIN)
+		goto out;
+
+	while ((mpath = rtw_rhashtable_walk_next(&iter))) {
+		if (IS_ERR(mpath) && PTR_ERR(mpath) == -EAGAIN)
+			continue;
+		if (IS_ERR(mpath))
+			break;
+		if (rtw_rcu_access_pointer(mpath->next_hop) == sta &&
+		    mpath->flags & RTW_MESH_PATH_ACTIVE &&
+		    !(mpath->flags & RTW_MESH_PATH_FIXED)) {
+			enter_critical_bh(&mpath->state_lock);
+			mpath->flags &= ~RTW_MESH_PATH_ACTIVE;
+			++mpath->sn;
+			exit_critical_bh(&mpath->state_lock);
+			rtw_mesh_path_error_tx(adapter,
+				adapter->mesh_cfg.element_ttl,
+				mpath->dst, mpath->sn,
+				WLAN_REASON_MESH_PATH_DEST_UNREACHABLE, bcast);
+		}
+	}
+out:
+	rtw_rhashtable_walk_stop(&iter);
+	rtw_rhashtable_walk_exit(&iter);
+}
+
+static void rtw_mesh_path_free_rcu(struct rtw_mesh_table *tbl,
+			       struct rtw_mesh_path *mpath)
+{
+	_adapter *adapter = mpath->adapter;
+
+	enter_critical_bh(&mpath->state_lock);
+	mpath->flags |= RTW_MESH_PATH_RESOLVING | RTW_MESH_PATH_DELETED;
+	rtw_mesh_gate_del(tbl, mpath);
+	exit_critical_bh(&mpath->state_lock);
+	_cancel_timer_ex(&mpath->timer);
+	ATOMIC_DEC(&adapter->mesh_info.mpaths);
+	ATOMIC_DEC(&tbl->entries);
+	_rtw_spinlock_free(&mpath->state_lock);
+
+	rtw_mesh_path_flush_pending(mpath);
+
+	rtw_mpath_free_rcu(mpath);
+}
+
+static void __rtw_mesh_path_del(struct rtw_mesh_table *tbl, struct rtw_mesh_path *mpath)
+{
+	rtw_rhashtable_remove_fast(&tbl->rhead, &mpath->rhash, rtw_mesh_rht_params);
+	rtw_mesh_path_free_rcu(tbl, mpath);
+}
+
+/**
+ * rtw_mesh_path_flush_by_nexthop - Deletes mesh paths if their next hop matches
+ *
+ * @sta: mesh peer to match
+ *
+ * RCU notes: this function is called when a mesh plink transitions from
+ * PLINK_ESTAB to any other state, since PLINK_ESTAB state is the only one that
+ * allows path creation. This will happen before the sta can be freed (because
+ * sta_info_destroy() calls this) so any reader in a rcu read block will be
+ * protected against the plink disappearing.
+ */
+void rtw_mesh_path_flush_by_nexthop(struct sta_info *sta)
+{
+	_adapter *adapter = sta->padapter;
+	struct rtw_mesh_table *tbl = adapter->mesh_info.mesh_paths;
+	struct rtw_mesh_path *mpath;
+	rtw_rhashtable_iter iter;
+	int ret;
+
+	if (!tbl)
+		return;
+
+	ret = rtw_rhashtable_walk_enter(&tbl->rhead, &iter);
+	if (ret)
+		return;
+
+	ret = rtw_rhashtable_walk_start(&iter);
+	if (ret && ret != -EAGAIN)
+		goto out;
+
+	while ((mpath = rtw_rhashtable_walk_next(&iter))) {
+		if (IS_ERR(mpath) && PTR_ERR(mpath) == -EAGAIN)
+			continue;
+		if (IS_ERR(mpath))
+			break;
+
+		if (rtw_rcu_access_pointer(mpath->next_hop) == sta)
+			__rtw_mesh_path_del(tbl, mpath);
+	}
+out:
+	rtw_rhashtable_walk_stop(&iter);
+	rtw_rhashtable_walk_exit(&iter);
+}
+
+static void rtw_mpp_flush_by_proxy(_adapter *adapter,
+			       const u8 *proxy)
+{
+	struct rtw_mesh_table *tbl = adapter->mesh_info.mpp_paths;
+	struct rtw_mesh_path *mpath;
+	rtw_rhashtable_iter iter;
+	int ret;
+
+	if (!tbl)
+		return;
+
+	ret = rtw_rhashtable_walk_enter(&tbl->rhead, &iter);
+	if (ret)
+		return;
+
+	ret = rtw_rhashtable_walk_start(&iter);
+	if (ret && ret != -EAGAIN)
+		goto out;
+
+	while ((mpath = rtw_rhashtable_walk_next(&iter))) {
+		if (IS_ERR(mpath) && PTR_ERR(mpath) == -EAGAIN)
+			continue;
+		if (IS_ERR(mpath))
+			break;
+
+		if (_rtw_memcmp(mpath->mpp, proxy, ETH_ALEN) == _TRUE)
+			__rtw_mesh_path_del(tbl, mpath);
+	}
+out:
+	rtw_rhashtable_walk_stop(&iter);
+	rtw_rhashtable_walk_exit(&iter);
+}
+
+static void rtw_table_flush_by_iface(struct rtw_mesh_table *tbl)
+{
+	struct rtw_mesh_path *mpath;
+	rtw_rhashtable_iter iter;
+	int ret;
+
+	if (!tbl)
+		return;
+	
+	ret = rtw_rhashtable_walk_enter(&tbl->rhead, &iter);
+	if (ret)
+		return;
+
+	ret = rtw_rhashtable_walk_start(&iter);
+	if (ret && ret != -EAGAIN)
+		goto out;
+
+	while ((mpath = rtw_rhashtable_walk_next(&iter))) {
+		if (IS_ERR(mpath) && PTR_ERR(mpath) == -EAGAIN)
+			continue;
+		if (IS_ERR(mpath))
+			break;
+		__rtw_mesh_path_del(tbl, mpath);
+	}
+out:
+	rtw_rhashtable_walk_stop(&iter);
+	rtw_rhashtable_walk_exit(&iter);
+}
+
+/**
+ * rtw_mesh_path_flush_by_iface - Deletes all mesh paths associated with a given iface
+ *
+ * This function deletes both mesh paths as well as mesh portal paths.
+ *
+ * @sdata: interface data to match
+ *
+ */
+void rtw_mesh_path_flush_by_iface(_adapter *adapter)
+{
+	rtw_table_flush_by_iface(adapter->mesh_info.mesh_paths);
+	rtw_table_flush_by_iface(adapter->mesh_info.mpp_paths);
+}
+
+/**
+ * rtw_table_path_del - delete a path from the mesh or mpp table
+ *
+ * @tbl: mesh or mpp path table
+ * @sdata: local subif
+ * @addr: dst address (ETH_ALEN length)
+ *
+ * Returns: 0 if successful
+ */
+static int rtw_table_path_del(struct rtw_mesh_table *tbl,
+			  const u8 *addr)
+{
+	struct rtw_mesh_path *mpath;
+
+	if (!tbl)
+		return -ENXIO;
+
+	rtw_rcu_read_lock();
+	mpath = rtw_rhashtable_lookup_fast(&tbl->rhead, addr, rtw_mesh_rht_params);
+	if (!mpath) {
+		rtw_rcu_read_unlock();
+		return -ENXIO;
+	}
+
+	__rtw_mesh_path_del(tbl, mpath);
+	rtw_rcu_read_unlock();
+	return 0;
+}
+
+
+/**
+ * rtw_mesh_path_del - delete a mesh path from the table
+ *
+ * @addr: dst address (ETH_ALEN length)
+ * @sdata: local subif
+ *
+ * Returns: 0 if successful
+ */
+int rtw_mesh_path_del(_adapter *adapter, const u8 *addr)
+{
+	int err;
+
+	/* flush relevant mpp entries first */
+	rtw_mpp_flush_by_proxy(adapter, addr);
+
+	err = rtw_table_path_del(adapter->mesh_info.mesh_paths, addr);
+	adapter->mesh_info.mesh_paths_generation++;
+	return err;
+}
+
+/**
+ * rtw_mesh_path_tx_pending - sends pending frames in a mesh path queue
+ *
+ * @mpath: mesh path to activate
+ *
+ * Locking: the state_lock of the mpath structure must NOT be held when calling
+ * this function.
+ */
+void rtw_mesh_path_tx_pending(struct rtw_mesh_path *mpath)
+{
+	if (mpath->flags & RTW_MESH_PATH_ACTIVE) {
+		struct rtw_mesh_info *minfo = &mpath->adapter->mesh_info;
+		_list q;
+		u32 q_len = 0;
+
+		_rtw_init_listhead(&q);
+
+		/* move to local queue */
+		enter_critical_bh(&mpath->frame_queue.lock);
+		if (mpath->frame_queue_len) {
+			rtw_list_splice_init(&mpath->frame_queue.queue, &q);
+			q_len = mpath->frame_queue_len;
+			mpath->frame_queue_len = 0;
+		}
+		exit_critical_bh(&mpath->frame_queue.lock);
+
+		if (q_len) {
+			/* move to mpath_tx_queue */
+			enter_critical_bh(&minfo->mpath_tx_queue.lock);
+			rtw_list_splice_tail(&q, &minfo->mpath_tx_queue.queue);
+			minfo->mpath_tx_queue_len += q_len;
+			exit_critical_bh(&minfo->mpath_tx_queue.lock);
+
+			/* schedule mpath_tx_tasklet */
+			tasklet_hi_schedule(&minfo->mpath_tx_tasklet);
+		}
+	}
+}
+
+/**
+ * rtw_mesh_path_send_to_gates - sends pending frames to all known mesh gates
+ *
+ * @mpath: mesh path whose queue will be emptied
+ *
+ * If there is only one gate, the frames are transferred from the failed mpath
+ * queue to that gate's queue.  If there are more than one gates, the frames
+ * are copied from each gate to the next.  After frames are copied, the
+ * mpath queues are emptied onto the transmission queue.
+ */
+int rtw_mesh_path_send_to_gates(struct rtw_mesh_path *mpath)
+{
+	_adapter *adapter = mpath->adapter;
+	struct rtw_mesh_table *tbl;
+	struct rtw_mesh_path *from_mpath = mpath;
+	struct rtw_mesh_path *gate;
+	bool copy = false;
+	rtw_hlist_node *node;
+
+	tbl = adapter->mesh_info.mesh_paths;
+	if (!tbl)
+		return 0;
+
+	rtw_rcu_read_lock();
+	rtw_hlist_for_each_entry_rcu(gate, node, &tbl->known_gates, gate_list) {
+		if (gate->flags & RTW_MESH_PATH_ACTIVE) {
+			RTW_MPATH_DBG(FUNC_ADPT_FMT" Forwarding to %pM\n",
+				FUNC_ADPT_ARG(adapter), gate->dst);
+			rtw_mesh_path_move_to_queue(gate, from_mpath, copy);
+			from_mpath = gate;
+			copy = true;
+		} else {
+			RTW_MPATH_DBG(
+				  FUNC_ADPT_FMT" Not forwarding to %pM (flags %#x)\n",
+				  FUNC_ADPT_ARG(adapter), gate->dst, gate->flags);
+		}
+	}
+
+	rtw_hlist_for_each_entry_rcu(gate, node, &tbl->known_gates, gate_list) {
+		RTW_MPATH_DBG(FUNC_ADPT_FMT" Sending to %pM\n",
+			FUNC_ADPT_ARG(adapter), gate->dst);
+		rtw_mesh_path_tx_pending(gate);
+	}
+	rtw_rcu_read_unlock();
+
+	return (from_mpath == mpath) ? -EHOSTUNREACH : 0;
+}
+
+/**
+ * rtw_mesh_path_discard_frame - discard a frame whose path could not be resolved
+ *
+ * @skb: frame to discard
+ * @sdata: network subif the frame was to be sent through
+ *
+ * Locking: the function must me called within a rcu_read_lock region
+ */
+void rtw_mesh_path_discard_frame(_adapter *adapter,
+			     struct xmit_frame *xframe)
+{
+	rtw_free_xmitframe(&adapter->xmitpriv, xframe);
+	adapter->mesh_info.mshstats.dropped_frames_no_route++;
+}
+
+/**
+ * rtw_mesh_path_flush_pending - free the pending queue of a mesh path
+ *
+ * @mpath: mesh path whose queue has to be freed
+ *
+ * Locking: the function must me called within a rcu_read_lock region
+ */
+void rtw_mesh_path_flush_pending(struct rtw_mesh_path *mpath)
+{
+	struct xmit_frame *xframe;
+	_list *list, *head;
+	_list tmp;
+
+	_rtw_init_listhead(&tmp);
+
+	enter_critical_bh(&mpath->frame_queue.lock);
+	rtw_list_splice_init(&mpath->frame_queue.queue, &tmp);
+	mpath->frame_queue_len = 0;
+	exit_critical_bh(&mpath->frame_queue.lock);
+
+	head = &tmp;
+	list = get_next(head);
+	while (rtw_end_of_queue_search(head, list) == _FALSE) {
+		xframe = LIST_CONTAINOR(list, struct xmit_frame, list);
+		list = get_next(list);
+		rtw_list_delete(&xframe->list);
+		rtw_mesh_path_discard_frame(mpath->adapter, xframe);
+	}
+}
+
+/**
+ * rtw_mesh_path_fix_nexthop - force a specific next hop for a mesh path
+ *
+ * @mpath: the mesh path to modify
+ * @next_hop: the next hop to force
+ *
+ * Locking: this function must be called holding mpath->state_lock
+ */
+void rtw_mesh_path_fix_nexthop(struct rtw_mesh_path *mpath, struct sta_info *next_hop)
+{
+	enter_critical_bh(&mpath->state_lock);
+	rtw_mesh_path_assign_nexthop(mpath, next_hop);
+	mpath->sn = 0xffff;
+	mpath->metric = 0;
+	mpath->hop_count = 0;
+	mpath->exp_time = 0;
+	mpath->flags = RTW_MESH_PATH_FIXED | RTW_MESH_PATH_SN_VALID;
+	rtw_mesh_path_activate(mpath);
+	exit_critical_bh(&mpath->state_lock);
+	rtw_ewma_err_rate_init(&next_hop->metrics.err_rate);
+	/* init it at a low value - 0 start is tricky */
+	rtw_ewma_err_rate_add(&next_hop->metrics.err_rate, 1);
+	rtw_mesh_path_tx_pending(mpath);
+}
+
+int rtw_mesh_pathtbl_init(_adapter *adapter)
+{
+	struct rtw_mesh_table *tbl_path, *tbl_mpp;
+	int ret;
+
+	tbl_path = rtw_mesh_table_alloc();
+	if (!tbl_path)
+		return -ENOMEM;
+
+	tbl_mpp = rtw_mesh_table_alloc();
+	if (!tbl_mpp) {
+		ret = -ENOMEM;
+		goto free_path;
+	}
+
+	rtw_rhashtable_init(&tbl_path->rhead, &rtw_mesh_rht_params);
+	rtw_rhashtable_init(&tbl_mpp->rhead, &rtw_mesh_rht_params);
+
+	adapter->mesh_info.mesh_paths = tbl_path;
+	adapter->mesh_info.mpp_paths = tbl_mpp;
+
+	return 0;
+
+free_path:
+	rtw_mesh_table_free(tbl_path);
+	return ret;
+}
+
+static
+void rtw_mesh_path_tbl_expire(_adapter *adapter,
+			  struct rtw_mesh_table *tbl)
+{
+	struct rtw_mesh_path *mpath;
+	rtw_rhashtable_iter iter;
+	int ret;
+
+	if (!tbl)
+		return;
+
+	ret = rtw_rhashtable_walk_enter(&tbl->rhead, &iter);
+	if (ret)
+		return;
+
+	ret = rtw_rhashtable_walk_start(&iter);
+	if (ret && ret != -EAGAIN)
+		goto out;
+
+	while ((mpath = rtw_rhashtable_walk_next(&iter))) {
+		if (IS_ERR(mpath) && PTR_ERR(mpath) == -EAGAIN)
+			continue;
+		if (IS_ERR(mpath))
+			break;
+		if ((!(mpath->flags & RTW_MESH_PATH_RESOLVING)) &&
+		    (!(mpath->flags & RTW_MESH_PATH_FIXED)) &&
+		     rtw_time_after(rtw_get_current_time(), mpath->exp_time + RTW_MESH_PATH_EXPIRE))
+			__rtw_mesh_path_del(tbl, mpath);
+
+		if (mpath->is_gate &&  /* need not to deal with non-gate case */
+		    rtw_time_after(rtw_get_current_time(), mpath->gate_timeout)) {
+			RTW_MPATH_DBG(FUNC_ADPT_FMT"mpath [%pM] expired systime is %lu systime is %lu\n",
+				      FUNC_ADPT_ARG(adapter), mpath->dst,
+				      mpath->gate_timeout, rtw_get_current_time());
+			enter_critical_bh(&mpath->state_lock);
+			if (mpath->gate_asked) { /* asked gate before */
+				rtw_mesh_gate_del(tbl, mpath);
+				exit_critical_bh(&mpath->state_lock);
+			} else {
+				mpath->gate_asked = true;
+				mpath->gate_timeout = rtw_get_current_time() + rtw_ms_to_systime(mpath->gate_ann_int);
+				exit_critical_bh(&mpath->state_lock);
+				rtw_mesh_queue_preq(mpath, RTW_PREQ_Q_F_START | RTW_PREQ_Q_F_REFRESH);
+				RTW_MPATH_DBG(FUNC_ADPT_FMT"mpath [%pM] ask mesh gate existence (is_root=%d)\n",
+				      FUNC_ADPT_ARG(adapter), mpath->dst, mpath->is_root);
+			}
+		}
+	}
+
+out:
+	rtw_rhashtable_walk_stop(&iter);
+	rtw_rhashtable_walk_exit(&iter);
+}
+
+void rtw_mesh_path_expire(_adapter *adapter)
+{
+	rtw_mesh_path_tbl_expire(adapter, adapter->mesh_info.mesh_paths);
+	rtw_mesh_path_tbl_expire(adapter, adapter->mesh_info.mpp_paths);
+}
+
+void rtw_mesh_pathtbl_unregister(_adapter *adapter)
+{
+	if (adapter->mesh_info.mesh_paths) {
+		rtw_mesh_table_free(adapter->mesh_info.mesh_paths);
+		adapter->mesh_info.mesh_paths = NULL;
+	}
+
+	if (adapter->mesh_info.mpp_paths) {
+		rtw_mesh_table_free(adapter->mesh_info.mpp_paths);
+		adapter->mesh_info.mpp_paths = NULL;
+	}
+}
+#endif /* CONFIG_RTW_MESH */
+
diff --git a/rtl8723DS/core/mesh/rtw_mesh_pathtbl.h b/rtl8723DS/core/mesh/rtw_mesh_pathtbl.h
new file mode 100644
index 0000000..650b239
--- a/dev/null
+++ b/rtl8723DS/core/mesh/rtw_mesh_pathtbl.h
@@ -0,0 +1,208 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2007 - 2017 Realtek Corporation.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ *****************************************************************************/
+#ifndef __RTW_MESH_PATHTBL_H_
+#define __RTW_MESH_PATHTBL_H_
+
+#ifndef DBG_RTW_MPATH
+#define DBG_RTW_MPATH 1
+#endif
+#if DBG_RTW_MPATH
+#define RTW_MPATH_DBG(fmt, arg...) RTW_PRINT(fmt, ##arg)
+#else
+#define RTW_MPATH_DBG(fmt, arg...) do {} while (0)
+#endif
+
+/**
+ * enum rtw_mesh_path_flags - mesh path flags
+ *
+ * @RTW_MESH_PATH_ACTIVE: the mesh path can be used for forwarding
+ * @RTW_MESH_PATH_RESOLVING: the discovery process is running for this mesh path
+ * @RTW_MESH_PATH_SN_VALID: the mesh path contains a valid destination sequence
+ *	number
+ * @RTW_MESH_PATH_FIXED: the mesh path has been manually set and should not be
+ *	modified
+ * @RTW_MESH_PATH_RESOLVED: the mesh path can has been resolved
+ * @RTW_MESH_PATH_REQ_QUEUED: there is an unsent path request for this destination
+ *	already queued up, waiting for the discovery process to start.
+ * @RTW_MESH_PATH_DELETED: the mesh path has been deleted and should no longer
+ *	be used
+ * @RTW_MESH_PATH_ROOT_ADD_CHK: root additional check in root mode.
+ *	With this flag, It will try the last used rann_snd_addr
+ * @RTW_MESH_PATH_PEER_AKA: only used toward a peer, only used in active keep
+ *	alive mechanism. PREQ's da = path dst
+ * 
+ * RTW_MESH_PATH_RESOLVED is used by the mesh path timer to
+ * decide when to stop or cancel the mesh path discovery.
+ */
+enum rtw_mesh_path_flags {
+	RTW_MESH_PATH_ACTIVE =	BIT(0),
+	RTW_MESH_PATH_RESOLVING =	BIT(1),
+	RTW_MESH_PATH_SN_VALID =	BIT(2),
+	RTW_MESH_PATH_FIXED	=	BIT(3),
+	RTW_MESH_PATH_RESOLVED =	BIT(4),
+	RTW_MESH_PATH_REQ_QUEUED =	BIT(5),
+	RTW_MESH_PATH_DELETED =	BIT(6),
+	RTW_MESH_PATH_ROOT_ADD_CHK =	BIT(7),
+	RTW_MESH_PATH_PEER_AKA =	BIT(8),
+};
+
+/**
+ * struct rtw_mesh_path - mesh path structure
+ *
+ * @dst: mesh path destination mac address
+ * @mpp: mesh proxy mac address
+ * @rhash: rhashtable list pointer
+ * @gate_list: list pointer for known gates list
+ * @sdata: mesh subif
+ * @next_hop: mesh neighbor to which frames for this destination will be
+ *	forwarded
+ * @timer: mesh path discovery timer
+ * @frame_queue: pending queue for frames sent to this destination while the
+ *	path is unresolved
+ * @rcu: rcu head for freeing mesh path
+ * @sn: target sequence number
+ * @metric: current metric to this destination
+ * @hop_count: hops to destination
+ * @exp_time: in jiffies, when the path will expire or when it expired
+ * @discovery_timeout: timeout (lapse in jiffies) used for the last discovery
+ *	retry
+ * @discovery_retries: number of discovery retries
+ * @flags: mesh path flags, as specified on &enum rtw_mesh_path_flags
+ * @state_lock: mesh path state lock used to protect changes to the
+ * mpath itself.  No need to take this lock when adding or removing
+ * an mpath to a hash bucket on a path table.
+ * @rann_snd_addr: the RANN sender address
+ * @rann_metric: the aggregated path metric towards the root node
+ * @last_preq_to_root: Timestamp of last PREQ sent to root
+ * @is_root: the destination station of this path is a root node
+ * @is_gate: the destination station of this path is a mesh gate
+ *
+ *
+ * The dst address is unique in the mesh path table. Since the mesh_path is
+ * protected by RCU, deleting the next_hop STA must remove / substitute the
+ * mesh_path structure and wait until that is no longer reachable before
+ * destroying the STA completely.
+ */
+struct rtw_mesh_path {
+	u8 dst[ETH_ALEN];
+	u8 mpp[ETH_ALEN];	/* used for MPP or MAP */
+	rtw_rhash_head rhash;
+	rtw_hlist_node gate_list;
+	_adapter *adapter;
+	struct sta_info __rcu *next_hop;
+	_timer timer;
+	_queue frame_queue;
+	u32 frame_queue_len;
+	rtw_rcu_head rcu;
+	u32 sn;
+	u32 metric;
+	u8 hop_count;
+	systime exp_time;
+	systime discovery_timeout;
+	systime gate_timeout;
+	u32 gate_ann_int;    /* gate announce interval */
+	u8 discovery_retries;
+	enum rtw_mesh_path_flags flags;
+	_lock state_lock;
+	u8 rann_snd_addr[ETH_ALEN];
+#ifdef CONFIG_RTW_MESH_ADD_ROOT_CHK
+	u8 add_chk_rann_snd_addr[ETH_ALEN];
+#endif
+	u32 rann_metric;
+	unsigned long last_preq_to_root;
+	bool is_root;
+	bool is_gate;
+	bool gate_asked;
+};
+
+/**
+ * struct rtw_mesh_table
+ *
+ * @known_gates: list of known mesh gates and their mpaths by the station. The
+ * gate's mpath may or may not be resolved and active.
+ * @gates_lock: protects updates to known_gates
+ * @rhead: the rhashtable containing struct mesh_paths, keyed by dest addr
+ * @entries: number of entries in the table
+ */
+struct rtw_mesh_table {
+	rtw_hlist_head known_gates;
+	_lock gates_lock;
+	rtw_rhashtable rhead;
+	ATOMIC_T entries;
+};
+
+#define RTW_MESH_PATH_EXPIRE (600 * HZ)
+
+/* Maximum number of paths per interface */
+#define RTW_MESH_MAX_MPATHS		1024
+
+/* Number of frames buffered per destination for unresolved destinations */
+#define RTW_MESH_FRAME_QUEUE_LEN	10
+
+int rtw_mesh_nexthop_lookup(_adapter *adapter,
+	const u8 *mda, const u8 *msa, u8 *ra);
+int rtw_mesh_nexthop_resolve(_adapter *adapter,
+			 struct xmit_frame *xframe);
+
+struct rtw_mesh_path *rtw_mesh_path_lookup(_adapter *adapter,
+				   const u8 *dst);
+struct rtw_mesh_path *rtw_mpp_path_lookup(_adapter *adapter,
+				  const u8 *dst);
+int rtw_mpp_path_add(_adapter *adapter,
+		 const u8 *dst, const u8 *mpp);
+void dump_mpp(void *sel, _adapter *adapter);
+
+struct rtw_mesh_path *
+rtw_mesh_path_lookup_by_idx(_adapter *adapter, int idx);
+void dump_mpath(void *sel, _adapter *adapter);
+
+struct rtw_mesh_path *
+rtw_mpp_path_lookup_by_idx(_adapter *adapter, int idx);
+void rtw_mesh_path_fix_nexthop(struct rtw_mesh_path *mpath, struct sta_info *next_hop);
+void rtw_mesh_path_expire(_adapter *adapter);
+
+struct rtw_mesh_path *
+rtw_mesh_path_add(_adapter *adapter, const u8 *dst);
+
+int rtw_mesh_path_add_gate(struct rtw_mesh_path *mpath);
+void rtw_mesh_gate_del(struct rtw_mesh_table *tbl, struct rtw_mesh_path *mpath);
+bool rtw_mesh_gate_search(struct rtw_mesh_table *tbl, const u8 *addr);
+int rtw_mesh_path_send_to_gates(struct rtw_mesh_path *mpath);
+int rtw_mesh_gate_num(_adapter *adapter);
+bool rtw_mesh_is_primary_gate(_adapter *adapter);
+void dump_known_gates(void *sel, _adapter *adapter);
+
+void rtw_mesh_plink_broken(struct sta_info *sta);
+
+void rtw_mesh_path_assign_nexthop(struct rtw_mesh_path *mpath, struct sta_info *sta);
+void rtw_mesh_path_flush_pending(struct rtw_mesh_path *mpath);
+void rtw_mesh_path_tx_pending(struct rtw_mesh_path *mpath);
+int rtw_mesh_pathtbl_init(_adapter *adapter);
+void rtw_mesh_pathtbl_unregister(_adapter *adapter);
+int rtw_mesh_path_del(_adapter *adapter, const u8 *addr);
+
+void rtw_mesh_path_flush_by_nexthop(struct sta_info *sta);
+void rtw_mesh_path_discard_frame(_adapter *adapter,
+			     struct xmit_frame *xframe);
+
+static inline void rtw_mesh_path_activate(struct rtw_mesh_path *mpath)
+{
+	mpath->flags |= RTW_MESH_PATH_ACTIVE | RTW_MESH_PATH_RESOLVED;
+}
+
+void rtw_mesh_path_flush_by_iface(_adapter *adapter);
+
+#endif /* __RTW_MESH_PATHTBL_H_ */
+
diff --git a/rtl8723DS/core/rtw_ap.c b/rtl8723DS/core/rtw_ap.c
index f227198..a8903ba 100755..100644
--- a/rtl8723DS/core/rtw_ap.c
+++ b/rtl8723DS/core/rtw_ap.c
@@ -27,13 +27,10 @@ extern unsigned char	WFD_OUI[];
 
 void init_mlme_ap_info(_adapter *padapter)
 {
-	struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv;
 	struct mlme_priv *pmlmepriv = &(padapter->mlmepriv);
 
 	_rtw_spinlock_init(&pmlmepriv->bcn_update_lock);
-
 	/* pmlmeext->bstart_bss = _FALSE; */
-
 }
 
 void free_mlme_ap_info(_adapter *padapter)
@@ -295,6 +292,12 @@ u8 chk_sta_is_alive(struct sta_info *psta)
 		if (psta->state & WIFI_SLEEP_STATE)
 			ret = _TRUE;
 #endif
+#ifdef CONFIG_RTW_MESH
+		if (MLME_IS_MESH(psta->padapter) &&
+		    (psta->sta_stats.last_rx_hwmp_pkts !=
+		     psta->sta_stats.rx_hwmp_pkts))
+			ret = _TRUE;
+#endif
 	} else
 		ret = _TRUE;
 
@@ -303,6 +306,83 @@ u8 chk_sta_is_alive(struct sta_info *psta)
 	return ret;
 }
 
+/**
+ * issue_aka_chk_frame - issue active keep alive check frame
+ *	aka = active keep alive
+ */
+static int issue_aka_chk_frame(_adapter *adapter, struct sta_info *psta)
+{
+	int ret = _FAIL;
+	u8 *target_addr = psta->cmn.mac_addr;
+
+	if (MLME_IS_AP(adapter)) {
+		/* issue null data to check sta alive */
+		if (psta->state & WIFI_SLEEP_STATE)
+			ret = issue_nulldata(adapter, target_addr, 0, 1, 50);
+		else
+			ret = issue_nulldata(adapter, target_addr, 0, 3, 50);
+	}
+
+#ifdef CONFIG_RTW_MESH
+	if (MLME_IS_MESH(adapter)) {
+		struct rtw_mesh_path *mpath;
+
+		rtw_rcu_read_lock();
+		mpath = rtw_mesh_path_lookup(adapter, target_addr);
+		if (!mpath) {
+			mpath = rtw_mesh_path_add(adapter, target_addr);
+			if (IS_ERR(mpath)) {
+				rtw_rcu_read_unlock();
+				RTW_ERR(FUNC_ADPT_FMT" rtw_mesh_path_add for "MAC_FMT" fail.\n",
+					FUNC_ADPT_ARG(adapter), MAC_ARG(target_addr));
+				return _FAIL;
+			}
+		}
+		if (mpath->flags & RTW_MESH_PATH_ACTIVE)
+			ret = _SUCCESS;
+		else {
+			u8 flags = RTW_PREQ_Q_F_START | RTW_PREQ_Q_F_PEER_AKA;
+			/* issue PREQ to check peer alive */
+			rtw_mesh_queue_preq(mpath, flags);
+			ret = _FALSE;
+		}
+		rtw_rcu_read_unlock();
+	}
+#endif
+	return ret;
+}
+
+#ifdef RTW_CONFIG_RFREG18_WA
+static void rtw_check_restore_rf18(_adapter *padapter)
+{
+	PHAL_DATA_TYPE	pHalData = GET_HAL_DATA(padapter);
+	struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv);
+	u32 reg;
+	u8 union_ch = 0, union_bw = 0, union_offset = 0, setchbw = _FALSE;
+		
+	reg = rtw_hal_read_rfreg(padapter, 0, 0x18, 0x3FF);
+	if ((reg & 0xFF) == 0)
+			setchbw = _TRUE;
+	reg = rtw_hal_read_rfreg(padapter, 1, 0x18, 0x3FF);
+	if ((reg & 0xFF) == 0)
+			setchbw = _TRUE;
+
+	if (setchbw) {
+		if (!rtw_mi_get_ch_setting_union(padapter, &union_ch, &union_bw, &union_offset)) {
+			RTW_INFO("Hit RF(0x18)=0!! restore original channel setting.\n");
+			union_ch =  pmlmeext->cur_channel;
+			union_offset = pmlmeext->cur_ch_offset ;
+			union_bw = pmlmeext->cur_bwmode;
+		} else {
+			RTW_INFO("Hit RF(0x18)=0!! set ch(%x) offset(%x) bwmode(%x)\n", union_ch, union_offset, union_bw);
+		}
+		/*	Initial the channel_bw setting procedure.	*/
+		pHalData->current_channel = 0;
+		set_channel_bwmode(padapter, union_ch, union_offset, union_bw);
+	}
+}
+#endif
+
 void	expire_timeout_chk(_adapter *padapter)
 {
 	_irqL irqL;
@@ -314,6 +394,22 @@ void	expire_timeout_chk(_adapter *padapter)
 	char chk_alive_list[NUM_STA];
 	int i;
 
+#ifdef CONFIG_RTW_MESH
+	if (MLME_IS_MESH(padapter)
+		&& check_fwstate(&padapter->mlmepriv, WIFI_ASOC_STATE)
+	) {
+		struct rtw_mesh_cfg *mcfg = &padapter->mesh_cfg;
+
+		rtw_mesh_path_expire(padapter);
+
+		/* TBD: up layer timeout mechanism */
+		/* if (!mcfg->plink_timeout)
+			return; */
+#ifndef CONFIG_ACTIVE_KEEP_ALIVE_CHECK
+		return;
+#endif
+	}
+#endif
 
 #ifdef CONFIG_MCC_MODE
 	/*	then driver may check fail due to not recv client's frame under sitesurvey,
@@ -331,8 +427,8 @@ void	expire_timeout_chk(_adapter *padapter)
 	/* check auth_queue */
 #ifdef DBG_EXPIRATION_CHK
 	if (rtw_end_of_queue_search(phead, plist) == _FALSE) {
-		RTW_INFO(FUNC_NDEV_FMT" auth_list, cnt:%u\n"
-			, FUNC_NDEV_ARG(padapter->pnetdev), pstapriv->auth_list_cnt);
+		RTW_INFO(FUNC_ADPT_FMT" auth_list, cnt:%u\n"
+			, FUNC_ADPT_ARG(padapter), pstapriv->auth_list_cnt);
 	}
 #endif
 	while ((rtw_end_of_queue_search(phead, plist)) == _FALSE) {
@@ -353,9 +449,8 @@ void	expire_timeout_chk(_adapter *padapter)
 				rtw_list_delete(&psta->auth_list);
 				pstapriv->auth_list_cnt--;
 
-				RTW_INFO("auth expire %02X%02X%02X%02X%02X%02X\n",
-					psta->cmn.mac_addr[0], psta->cmn.mac_addr[1], psta->cmn.mac_addr[2],
-					psta->cmn.mac_addr[3], psta->cmn.mac_addr[4], psta->cmn.mac_addr[5]);
+				RTW_INFO(FUNC_ADPT_FMT" auth expire "MAC_FMT"\n"
+					, FUNC_ADPT_ARG(padapter), MAC_ARG(psta->cmn.mac_addr));
 
 				_exit_critical_bh(&pstapriv->auth_list_lock, &irqL);
 
@@ -381,8 +476,8 @@ void	expire_timeout_chk(_adapter *padapter)
 	/* check asoc_queue */
 #ifdef DBG_EXPIRATION_CHK
 	if (rtw_end_of_queue_search(phead, plist) == _FALSE) {
-		RTW_INFO(FUNC_NDEV_FMT" asoc_list, cnt:%u\n"
-			, FUNC_NDEV_ARG(padapter->pnetdev), pstapriv->asoc_list_cnt);
+		RTW_INFO(FUNC_ADPT_FMT" asoc_list, cnt:%u\n"
+			, FUNC_ADPT_ARG(padapter), pstapriv->asoc_list_cnt);
 	}
 #endif
 	while ((rtw_end_of_queue_search(phead, plist)) == _FALSE) {
@@ -526,8 +621,8 @@ void	expire_timeout_chk(_adapter *padapter)
 			if (psta->sleepq_len > (NR_XMITFRAME / pstapriv->asoc_list_cnt)
 			    && padapter->xmitpriv.free_xmitframe_cnt < ((NR_XMITFRAME / pstapriv->asoc_list_cnt) / 2)
 			   ) {
-				RTW_INFO("%s sta:"MAC_FMT", sleepq_len:%u, free_xmitframe_cnt:%u, asoc_list_cnt:%u, clear sleep_q\n", __func__
-					 , MAC_ARG(psta->cmn.mac_addr)
+				RTW_INFO(FUNC_ADPT_FMT" sta:"MAC_FMT", sleepq_len:%u, free_xmitframe_cnt:%u, asoc_list_cnt:%u, clear sleep_q\n"
+					, FUNC_ADPT_ARG(padapter), MAC_ARG(psta->cmn.mac_addr)
 					, psta->sleepq_len, padapter->xmitpriv.free_xmitframe_cnt, pstapriv->asoc_list_cnt);
 				wakeup_sta_to_xmit(padapter, psta);
 			}
@@ -537,10 +632,12 @@ void	expire_timeout_chk(_adapter *padapter)
 	_exit_critical_bh(&pstapriv->asoc_list_lock, &irqL);
 
 	if (chk_alive_num) {
+#if defined(CONFIG_ACTIVE_KEEP_ALIVE_CHECK)
 		u8 backup_ch = 0, backup_bw = 0, backup_offset = 0;
 		u8 union_ch = 0, union_bw = 0, union_offset = 0;
 		u8 switch_channel_by_drv = _TRUE;
 		struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv;
+#endif
 		char del_asoc_list[NUM_STA];
 
 		_rtw_memset(del_asoc_list, NUM_STA, NUM_STA);
@@ -571,7 +668,9 @@ void	expire_timeout_chk(_adapter *padapter)
 
 		/* check loop */
 		for (i = 0; i < chk_alive_num; i++) {
+			#ifdef CONFIG_ACTIVE_KEEP_ALIVE_CHECK
 			int ret = _FAIL;
+			#endif
 
 			psta = rtw_get_stainfo_by_offset(pstapriv, chk_alive_list[i]);
 
@@ -587,20 +686,19 @@ void	expire_timeout_chk(_adapter *padapter)
 
 			#ifdef CONFIG_ACTIVE_KEEP_ALIVE_CHECK
 			if (pmlmeext->active_keep_alive_check) {
-				/* issue null data to check sta alive*/
-				if (psta->state & WIFI_SLEEP_STATE)
-					ret = issue_nulldata(padapter, psta->cmn.mac_addr, 0, 1, 50);
-				else
-					ret = issue_nulldata(padapter, psta->cmn.mac_addr, 0, 3, 50);
+				/* issue active keep alive frame to check */
+				ret = issue_aka_chk_frame(padapter, psta);
 
 				psta->keep_alive_trycnt++;
 				if (ret == _SUCCESS) {
-					RTW_INFO("asoc check, sta(" MAC_FMT ") is alive\n", MAC_ARG(psta->cmn.mac_addr));
+					RTW_INFO(FUNC_ADPT_FMT" asoc check, "MAC_FMT" is alive\n"
+						, FUNC_ADPT_ARG(padapter), MAC_ARG(psta->cmn.mac_addr));
 					psta->expire_to = pstapriv->expire_to;
 					psta->keep_alive_trycnt = 0;
 					continue;
 				} else if (psta->keep_alive_trycnt <= 3) {
-					RTW_INFO("ack check for asoc expire, keep_alive_trycnt=%d\n", psta->keep_alive_trycnt);
+					RTW_INFO(FUNC_ADPT_FMT" asoc check, "MAC_FMT" keep_alive_trycnt=%d\n"
+						, FUNC_ADPT_ARG(padapter) , MAC_ARG(psta->cmn.mac_addr), psta->keep_alive_trycnt);
 					psta->expire_to = 1;
 					continue;
 				}
@@ -613,6 +711,7 @@ void	expire_timeout_chk(_adapter *padapter)
 			if (rtw_is_list_empty(&psta->asoc_list) == _FALSE) {
 				rtw_list_delete(&psta->asoc_list);
 				pstapriv->asoc_list_cnt--;
+				STA_SET_MESH_PLINK(psta, NULL);
 			}
 			_exit_critical_bh(&pstapriv->asoc_list_lock, &irqL);
 		}
@@ -627,8 +726,13 @@ void	expire_timeout_chk(_adapter *padapter)
 			psta = rtw_get_stainfo_by_offset(pstapriv, del_asoc_list[i]);
 			_rtw_memcpy(sta_addr, psta->cmn.mac_addr, ETH_ALEN);
 
-			RTW_INFO("asoc expire "MAC_FMT", state=0x%x\n", MAC_ARG(psta->cmn.mac_addr), psta->state);
-			updated = ap_free_sta(padapter, psta, _FALSE, WLAN_REASON_DEAUTH_LEAVING, _FALSE);
+			RTW_INFO(FUNC_ADPT_FMT" asoc expire "MAC_FMT", state=0x%x\n"
+				, FUNC_ADPT_ARG(padapter), MAC_ARG(psta->cmn.mac_addr), psta->state);
+			updated |= ap_free_sta(padapter, psta, _FALSE, WLAN_REASON_DEAUTH_LEAVING, _FALSE);
+			#ifdef CONFIG_RTW_MESH
+			if (MLME_IS_MESH(padapter))
+				rtw_mesh_expire_peer(padapter, sta_addr);
+			#endif
 		}
 
 		#ifdef CONFIG_ACTIVE_KEEP_ALIVE_CHECK
@@ -640,13 +744,14 @@ void	expire_timeout_chk(_adapter *padapter)
 		#endif
 	}
 
+#ifdef RTW_CONFIG_RFREG18_WA
+	rtw_check_restore_rf18(padapter);
+#endif
 	associated_clients_update(padapter, updated, STA_INFO_UPDATE_ALL);
 }
 
 void rtw_ap_update_sta_ra_info(_adapter *padapter, struct sta_info *psta)
 {
-	int i;
-	u8 rf_type;
 	unsigned char sta_band = 0;
 	u64 tx_ra_bitmap = 0;
 	struct mlme_priv *pmlmepriv = &(padapter->mlmepriv);
@@ -833,8 +938,9 @@ _exit:
 
 void rtw_init_bmc_sta_tx_rate(_adapter *padapter, struct sta_info *psta)
 {
-	struct mlme_priv *pmlmepriv = &(padapter->mlmepriv);
+#ifdef CONFIG_BMC_TX_LOW_RATE
 	struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv);
+#endif
 	u8 rate_idx = 0;
 	u8 brate_table[] = {MGN_1M, MGN_2M, MGN_5_5M, MGN_11M,
 		MGN_6M, MGN_9M, MGN_12M, MGN_18M, MGN_24M, MGN_36M, MGN_48M, MGN_54M};
@@ -873,7 +979,12 @@ void update_bmc_sta(_adapter *padapter)
 
 	if (psta) {
 		psta->cmn.aid = 0;/* default set to 0 */
-		psta->qos_option = 0;
+#ifdef CONFIG_RTW_MESH
+		if (MLME_IS_MESH(padapter))
+			psta->qos_option = 1;
+		else
+#endif
+			psta->qos_option = 0;
 #ifdef CONFIG_80211N_HT
 		psta->htpriv.ht_option = _FALSE;
 #endif /* CONFIG_80211N_HT */
@@ -963,7 +1074,7 @@ void update_sta_info_apmode(_adapter *padapter, struct sta_info *psta)
 
 	/*alloc macid when call rtw_alloc_stainfo(),release macid when call rtw_free_stainfo()*/
 
-	if (psecuritypriv->dot11AuthAlgrthm == dot11AuthAlgrthm_8021X)
+	if (!MLME_IS_MESH(padapter) && psecuritypriv->dot11AuthAlgrthm == dot11AuthAlgrthm_8021X)
 		psta->ieee8021x_blocked = _TRUE;
 	else
 		psta->ieee8021x_blocked = _FALSE;
@@ -987,6 +1098,10 @@ void update_sta_info_apmode(_adapter *padapter, struct sta_info *psta)
 		else
 			psta->cmn.bw_mode = CHANNEL_WIDTH_20;
 
+		if (phtpriv_sta->op_present
+			&& !GET_HT_OP_ELE_STA_CHL_WIDTH(phtpriv_sta->ht_op))
+			psta->cmn.bw_mode = CHANNEL_WIDTH_20;
+
 		if (psta->ht_40mhz_intolerant)
 			psta->cmn.bw_mode = CHANNEL_WIDTH_20;
 
@@ -1066,17 +1181,20 @@ void update_sta_info_apmode(_adapter *padapter, struct sta_info *psta)
 	rtw_hal_set_odm_var(padapter, HAL_ODM_STA_INFO, psta, _TRUE);
 
 	_enter_critical_bh(&psta->lock, &irqL);
-	psta->state |= _FW_LINKED;
-	_exit_critical_bh(&psta->lock, &irqL);
 
+	/* Check encryption */
+	if (!MLME_IS_MESH(padapter) && psecuritypriv->dot11AuthAlgrthm == dot11AuthAlgrthm_8021X)
+		psta->state |= WIFI_UNDER_KEY_HANDSHAKE;
+
+	psta->state |= _FW_LINKED;
 
+	_exit_critical_bh(&psta->lock, &irqL);
 }
 
 static void update_ap_info(_adapter *padapter, struct sta_info *psta)
 {
 	struct mlme_priv *pmlmepriv = &(padapter->mlmepriv);
 	WLAN_BSSID_EX *pnetwork = (WLAN_BSSID_EX *)&pmlmepriv->cur_network.network;
-	struct security_priv *psecuritypriv = &padapter->securitypriv;
 	struct mlme_ext_priv	*pmlmeext = &(padapter->mlmeextpriv);
 #ifdef CONFIG_80211N_HT
 	struct ht_priv	*phtpriv_ap = &pmlmepriv->htpriv;
@@ -1127,7 +1245,7 @@ static void update_ap_info(_adapter *padapter, struct sta_info *psta)
 
 static void rtw_set_hw_wmm_param(_adapter *padapter)
 {
-	u8	ACI, ACM, AIFS, ECWMin, ECWMax, aSifsTime;
+	u8	AIFS, ECWMin, ECWMax, aSifsTime;
 	u8	acm_mask;
 	u16	TXOP;
 	u32	acParm, i;
@@ -1138,11 +1256,13 @@ static void rtw_set_hw_wmm_param(_adapter *padapter)
 	struct registry_priv	*pregpriv = &padapter->registrypriv;
 
 	acm_mask = 0;
-
-	if (is_supported_5g(pmlmeext->cur_wireless_mode) ||
-	    (pmlmeext->cur_wireless_mode & WIRELESS_11_24N))
+#ifdef CONFIG_80211N_HT
+	if (pregpriv->ht_enable &&
+		(is_supported_5g(pmlmeext->cur_wireless_mode) ||
+	    (pmlmeext->cur_wireless_mode & WIRELESS_11_24N)))
 		aSifsTime = 16;
 	else
+#endif /* CONFIG_80211N_HT */
 		aSifsTime = 10;
 
 	if (pmlmeinfo->WMM_enable == 0) {
@@ -1272,12 +1392,11 @@ static void rtw_set_hw_wmm_param(_adapter *padapter)
 	}
 
 }
-
+#ifdef CONFIG_80211N_HT
 static void update_hw_ht_param(_adapter *padapter)
 {
 	unsigned char		max_AMPDU_len;
 	unsigned char		min_MPDU_spacing;
-	struct registry_priv	*pregpriv = &padapter->registrypriv;
 	struct mlme_ext_priv	*pmlmeext = &padapter->mlmeextpriv;
 	struct mlme_ext_info	*pmlmeinfo = &(pmlmeext->mlmext_info);
 
@@ -1317,7 +1436,7 @@ static void update_hw_ht_param(_adapter *padapter)
 	/* pmlmeinfo->HT_protection = pmlmeinfo->HT_info.infos[1] & 0x3; */
 
 }
-
+#endif /* CONFIG_80211N_HT */
 static void rtw_ap_check_scan(_adapter *padapter)
 {
 	_irqL	irqL;
@@ -1408,9 +1527,9 @@ static void rtw_ap_check_scan(_adapter *padapter)
 	}
 
 	_exit_critical_bh(&(pmlmepriv->scanned_queue.lock), &irqL);
-
+#ifdef CONFIG_80211N_HT
 	pmlmepriv->num_sta_no_ht = 0; /* reset to 0 after ap do scanning*/
-
+#endif
 }
 
 void rtw_start_bss_hdl_after_chbw_decided(_adapter *adapter)
@@ -1442,10 +1561,58 @@ void rtw_start_bss_hdl_after_chbw_decided(_adapter *adapter)
 	update_ap_info(adapter, sta);
 }
 
+#ifdef CONFIG_FW_HANDLE_TXBCN
+bool rtw_ap_nums_check(_adapter *adapter)
+{
+	if (rtw_ap_get_nums(adapter) < CONFIG_LIMITED_AP_NUM)
+		return _TRUE;
+	return _FALSE;
+}
+u8 rtw_ap_allocate_vapid(struct dvobj_priv *dvobj)
+{
+	u8 vap_id;
+
+	for (vap_id = 0; vap_id < CONFIG_LIMITED_AP_NUM; vap_id++) {
+		if (!(dvobj->vap_map & BIT(vap_id)))
+			break;
+	}
+
+	if (vap_id < CONFIG_LIMITED_AP_NUM)
+		dvobj->vap_map |= BIT(vap_id);
+
+	return vap_id;
+}
+u8 rtw_ap_release_vapid(struct dvobj_priv *dvobj, u8 vap_id)
+{
+	if (vap_id >= CONFIG_LIMITED_AP_NUM) {
+		RTW_ERR("%s - vapid(%d) failed\n", __func__, vap_id);
+		rtw_warn_on(1);
+		return _FAIL;
+	}
+	dvobj->vap_map &= ~ BIT(vap_id);
+	return _SUCCESS;
+}
+#endif
+static void _rtw_iface_undersurvey_chk(const char *func, _adapter *adapter)
+{
+	int i;
+	_adapter *iface;
+	struct dvobj_priv *dvobj = adapter_to_dvobj(adapter);
+	struct mlme_priv *pmlmepriv;
+
+	for (i = 0; i < dvobj->iface_nums; i++) {
+		iface = dvobj->padapters[i];
+		if ((iface) && rtw_is_adapter_up(iface)) {
+			pmlmepriv = &iface->mlmepriv;
+			if (check_fwstate(pmlmepriv, _FW_UNDER_SURVEY))
+				RTW_ERR("%s ("ADPT_FMT") under survey\n", func, ADPT_ARG(iface));
+		}
+	}
+}
 void start_bss_network(_adapter *padapter, struct createbss_parm *parm)
 {
 #define DUMP_ADAPTERS_STATUS 0
-	u8 self_action = MLME_ACTION_UNKNOWN;
+	u8 mlme_act = MLME_ACTION_UNKNOWN;
 	u8 val8;
 	u16 bcn_interval;
 	u32	acparm;
@@ -1457,28 +1624,29 @@ void start_bss_network(_adapter *padapter, struct createbss_parm *parm)
 	struct mlme_ext_info	*pmlmeinfo = &(pmlmeext->mlmext_info);
 	WLAN_BSSID_EX *pnetwork_mlmeext = &(pmlmeinfo->network);
 	struct dvobj_priv *pdvobj = padapter->dvobj;
-	s16 req_ch = -1, req_bw = -1, req_offset = -1;
-	bool ch_setting_changed = _FALSE;
+	s16 req_ch = REQ_CH_NONE, req_bw = REQ_BW_NONE, req_offset = REQ_OFFSET_NONE;
 	u8 ch_to_set = 0, bw_to_set, offset_to_set;
 	u8 doiqk = _FALSE;
 	/* use for check ch bw offset can be allowed or not */
 	u8 chbw_allow = _TRUE;
-
-	if (MLME_IS_AP(padapter))
-		self_action = MLME_AP_STARTED;
-	else if (MLME_IS_MESH(padapter))
-		self_action = MLME_MESH_STARTED;
-	else
-		rtw_warn_on(1);
+	int i;
+	u8 ifbmp_ch_changed = 0;
 
 	if (parm->req_ch != 0) {
 		/* bypass other setting, go checking ch, bw, offset */
+		mlme_act = MLME_OPCH_SWITCH;
 		req_ch = parm->req_ch;
 		req_bw = parm->req_bw;
 		req_offset = parm->req_offset;
 		goto chbw_decision;
 	} else {
-		/* inform this request comes from upper layer */
+		/* request comes from upper layer */
+		if (MLME_IS_AP(padapter))
+			mlme_act = MLME_AP_STARTED;
+		else if (MLME_IS_MESH(padapter))
+			mlme_act = MLME_MESH_STARTED;
+		else
+			rtw_warn_on(1);
 		req_ch = 0;
 		_rtw_memcpy(pnetwork_mlmeext, pnetwork, pnetwork->Length);
 	}
@@ -1516,7 +1684,9 @@ void start_bss_network(_adapter *padapter, struct createbss_parm *parm)
 
 	if (pmlmepriv->cur_network.join_res != _TRUE) { /* setting only at  first time */
 		/* WEP Key will be set before this function, do not clear CAM. */
-		if ((psecuritypriv->dot11PrivacyAlgrthm != _WEP40_) && (psecuritypriv->dot11PrivacyAlgrthm != _WEP104_))
+		if ((psecuritypriv->dot11PrivacyAlgrthm != _WEP40_) && (psecuritypriv->dot11PrivacyAlgrthm != _WEP104_)
+			&& !MLME_IS_MESH(padapter) /* mesh group key is set before this function */
+		)
 			flush_all_cam_entry(padapter);	/* clear CAM */
 	}
 
@@ -1526,21 +1696,6 @@ void start_bss_network(_adapter *padapter, struct createbss_parm *parm)
 	/* Set BSSID REG */
 	rtw_hal_set_hwreg(padapter, HW_VAR_BSSID, pnetwork->MacAddress);
 
-	/* Set EDCA param reg */
-#ifdef CONFIG_CONCURRENT_MODE
-	acparm = 0x005ea42b;
-#else
-	acparm = 0x002F3217; /* VO */
-#endif
-	rtw_hal_set_hwreg(padapter, HW_VAR_AC_PARAM_VO, (u8 *)(&acparm));
-	acparm = 0x005E4317; /* VI */
-	rtw_hal_set_hwreg(padapter, HW_VAR_AC_PARAM_VI, (u8 *)(&acparm));
-	/* acparm = 0x00105320; */ /* BE */
-	acparm = 0x005ea42b;
-	rtw_hal_set_hwreg(padapter, HW_VAR_AC_PARAM_BE, (u8 *)(&acparm));
-	acparm = 0x0000A444; /* BK */
-	rtw_hal_set_hwreg(padapter, HW_VAR_AC_PARAM_BK, (u8 *)(&acparm));
-
 	/* Set Security */
 	val8 = (psecuritypriv->dot11AuthAlgrthm == dot11AuthAlgrthm_8021X) ? 0xcc : 0xcf;
 	rtw_hal_set_hwreg(padapter, HW_VAR_SEC_CFG, (u8 *)(&val8));
@@ -1548,19 +1703,32 @@ void start_bss_network(_adapter *padapter, struct createbss_parm *parm)
 	/* Beacon Control related register */
 	rtw_hal_set_hwreg(padapter, HW_VAR_BEACON_INTERVAL, (u8 *)(&bcn_interval));
 
+	rtw_hal_rcr_set_chk_bssid(padapter, mlme_act);
+
 chbw_decision:
-	ch_setting_changed = rtw_ap_chbw_decision(padapter, req_ch, req_bw, req_offset
-		     , &ch_to_set, &bw_to_set, &offset_to_set, &chbw_allow);
+	ifbmp_ch_changed = rtw_ap_chbw_decision(padapter, parm->ifbmp, parm->excl_ifbmp
+						, req_ch, req_bw, req_offset
+						, &ch_to_set, &bw_to_set, &offset_to_set, &chbw_allow);
+
+	for (i = 0; i < pdvobj->iface_nums; i++) {
+		if (!(parm->ifbmp & BIT(i)) || !pdvobj->padapters[i])
+			continue;
 
-	/* let pnetwork_mlme == pnetwork_mlmeext */
-	_rtw_memcpy(pnetwork, pnetwork_mlmeext, pnetwork_mlmeext->Length);
+		/* let pnetwork_mlme == pnetwork_mlmeext */
+		_rtw_memcpy(&(pdvobj->padapters[i]->mlmepriv.cur_network.network)
+			, &(pdvobj->padapters[i]->mlmeextpriv.mlmext_info.network)
+			, pdvobj->padapters[i]->mlmeextpriv.mlmext_info.network.Length);
 
-	rtw_start_bss_hdl_after_chbw_decided(padapter);
+		rtw_start_bss_hdl_after_chbw_decided(pdvobj->padapters[i]);
+
+		/* Set EDCA param reg after update cur_wireless_mode & update_capinfo */
+		if (pregpriv->wifi_spec == 1)
+			rtw_set_hw_wmm_param(pdvobj->padapters[i]);
+	}
 
 #if defined(CONFIG_DFS_MASTER)
-	rtw_dfs_master_status_apply(padapter, self_action);
+	rtw_dfs_rd_en_decision(padapter, mlme_act, parm->excl_ifbmp);
 #endif
-	rtw_hal_rcr_set_chk_bssid(padapter, self_action);
 
 #ifdef CONFIG_MCC_MODE
 	if (MCC_EN(padapter)) {
@@ -1583,7 +1751,6 @@ chbw_decision:
 #endif /* CONFIG_MCC_MODE */
 
 	if (!IS_CH_WAITING(adapter_to_rfctl(padapter))) {
-
 		doiqk = _TRUE;
 		rtw_hal_set_hwreg(padapter , HW_VAR_DO_IQK , &doiqk);
 	}
@@ -1601,81 +1768,124 @@ chbw_decision:
 	rtw_hal_set_mcc_setting_start_bss_network(padapter, chbw_allow);
 #endif
 
-	if (ch_setting_changed == _TRUE
-		&& (MLME_IS_GO(padapter) || MLME_IS_MESH(padapter)) /* pure AP is not needed*/
-		&& check_fwstate(pmlmepriv, WIFI_ASOC_STATE)
-	) {
-		#if defined(CONFIG_IOCTL_CFG80211) && (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 5, 0))
-		rtw_cfg80211_ch_switch_notify(padapter
-			, pmlmeext->cur_channel, pmlmeext->cur_bwmode, pmlmeext->cur_ch_offset
-			, pmlmepriv->htpriv.ht_option);
-		#endif
+#if defined(CONFIG_IOCTL_CFG80211) && (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 5, 0))
+	for (i = 0; i < pdvobj->iface_nums; i++) {
+		if (!(ifbmp_ch_changed & BIT(i)) || !pdvobj->padapters[i])
+			continue;
+
+		/* pure AP is not needed*/
+		if (MLME_IS_GO(pdvobj->padapters[i])
+			|| MLME_IS_MESH(pdvobj->padapters[i])
+		) {
+			u8 ht_option = 0;
+
+			#ifdef CONFIG_80211N_HT
+			ht_option = pdvobj->padapters[i]->mlmepriv.htpriv.ht_option;
+			#endif
+
+			rtw_cfg80211_ch_switch_notify(pdvobj->padapters[i]
+				, pdvobj->padapters[i]->mlmeextpriv.cur_channel
+				, pdvobj->padapters[i]->mlmeextpriv.cur_bwmode
+				, pdvobj->padapters[i]->mlmeextpriv.cur_ch_offset
+				, ht_option);
+		}
 	}
+#endif /* defined(CONFIG_IOCTL_CFG80211) && (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 5, 0)) */
 
 	if (DUMP_ADAPTERS_STATUS) {
 		RTW_INFO(FUNC_ADPT_FMT" done\n", FUNC_ADPT_ARG(padapter));
 		dump_adapters_status(RTW_DBGDUMP , adapter_to_dvobj(padapter));
 	}
 
+#ifdef CONFIG_MCC_MODE
 update_beacon:
-	/* update beacon content only if bstart_bss is _TRUE */
-	if (_TRUE == pmlmeext->bstart_bss) {
+#endif
 
-		_irqL irqL;
+	for (i = 0; i < pdvobj->iface_nums; i++) {
+		struct mlme_priv *mlme;
 
-		if ((ATOMIC_READ(&pmlmepriv->olbc) == _TRUE) || (ATOMIC_READ(&pmlmepriv->olbc_ht) == _TRUE)) {
-			/* AP is not starting a 40 MHz BSS in presence of an 802.11g BSS. */
+		if (!(parm->ifbmp & BIT(i)) || !pdvobj->padapters[i])
+			continue;
 
-			pmlmepriv->ht_op_mode &= (~HT_INFO_OPERATION_MODE_OP_MODE_MASK);
-			pmlmepriv->ht_op_mode |= OP_MODE_MAY_BE_LEGACY_STAS;
-			update_beacon(padapter, _HT_ADD_INFO_IE_, NULL, _FALSE);
+		/* update beacon content only if bstart_bss is _TRUE */
+		if (pdvobj->padapters[i]->mlmeextpriv.bstart_bss != _TRUE)
+			continue;
+
+		mlme = &(pdvobj->padapters[i]->mlmepriv);
+
+		#ifdef CONFIG_80211N_HT
+		if ((ATOMIC_READ(&mlme->olbc) == _TRUE) || (ATOMIC_READ(&mlme->olbc_ht) == _TRUE)) {
+			/* AP is not starting a 40 MHz BSS in presence of an 802.11g BSS. */
+			mlme->ht_op_mode &= (~HT_INFO_OPERATION_MODE_OP_MODE_MASK);
+			mlme->ht_op_mode |= OP_MODE_MAY_BE_LEGACY_STAS;
+			update_beacon(pdvobj->padapters[i], _HT_ADD_INFO_IE_, NULL, _FALSE);
 		}
+		#endif
 
-		update_beacon(padapter, _TIM_IE_, NULL, _FALSE);
+		update_beacon(pdvobj->padapters[i], _TIM_IE_, NULL, _FALSE);
+	}
+
+	if (mlme_act != MLME_OPCH_SWITCH
+		&& pmlmeext->bstart_bss == _TRUE
+	) {
+#ifdef CONFIG_SUPPORT_MULTI_BCN
+		_irqL irqL;
 
-#ifdef CONFIG_SWTIMER_BASED_TXBCN
 		_enter_critical_bh(&pdvobj->ap_if_q.lock, &irqL);
 		if (rtw_is_list_empty(&padapter->list)) {
+			#ifdef CONFIG_FW_HANDLE_TXBCN
+			padapter->vap_id = rtw_ap_allocate_vapid(pdvobj);
+			#endif
 			rtw_list_insert_tail(&padapter->list, get_list_head(&pdvobj->ap_if_q));
 			pdvobj->nr_ap_if++;
 			pdvobj->inter_bcn_space = DEFAULT_BCN_INTERVAL / pdvobj->nr_ap_if;
 		}
 		_exit_critical_bh(&pdvobj->ap_if_q.lock, &irqL);
 
+		#ifdef CONFIG_SWTIMER_BASED_TXBCN
+		rtw_ap_set_mbid_num(padapter, pdvobj->nr_ap_if);
 		rtw_hal_set_hwreg(padapter, HW_VAR_BEACON_INTERVAL, (u8 *)(&pdvobj->inter_bcn_space));
+		#endif /*CONFIG_SWTIMER_BASED_TXBCN*/
 
-#endif /*CONFIG_SWTIMER_BASED_TXBCN*/
+#endif /*CONFIG_SUPPORT_MULTI_BCN*/
 
+		#ifdef CONFIG_HW_P0_TSF_SYNC
+		correct_TSF(padapter, mlme_act);
+		#endif
 	}
 
 	rtw_scan_wait_completed(padapter);
 
+	_rtw_iface_undersurvey_chk(__func__, padapter);
 	/* send beacon */
-	if (!rtw_mi_check_fwstate(padapter, _FW_UNDER_SURVEY)) {
-
-		/*update_beacon(padapter, _TIM_IE_, NULL, _TRUE);*/
-
+	ResumeTxBeacon(padapter);
+	{
 #if !defined(CONFIG_INTERRUPT_BASED_TXBCN)
-#if defined(CONFIG_USB_HCI) || defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI)
+#if defined(CONFIG_USB_HCI) || defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI) || defined(CONFIG_PCI_BCN_POLLING)
 #ifdef CONFIG_SWTIMER_BASED_TXBCN
-		if (pdvobj->nr_ap_if == 1) {
+		if (pdvobj->nr_ap_if == 1
+			&& mlme_act != MLME_OPCH_SWITCH
+		) {
 			RTW_INFO("start SW BCN TIMER!\n");
 			_set_timer(&pdvobj->txbcn_timer, bcn_interval);
 		}
 #else
-		/* other case will  tx beacon when bcn interrupt coming in. */
-		if (send_beacon(padapter) == _FAIL)
-			RTW_INFO("issue_beacon, fail!\n");
+		for (i = 0; i < pdvobj->iface_nums; i++) {
+			if (!(parm->ifbmp & BIT(i)) || !pdvobj->padapters[i])
+				continue;
+
+			if (send_beacon(pdvobj->padapters[i]) == _FAIL)
+				RTW_INFO(ADPT_FMT" issue_beacon, fail!\n", ADPT_ARG(pdvobj->padapters[i]));
+		}
 #endif
 #endif
 #endif /* !defined(CONFIG_INTERRUPT_BASED_TXBCN) */
-	}
-
-	/*Set EDCA param reg after update cur_wireless_mode & update_capinfo*/
-	if (pregpriv->wifi_spec == 1)
-		rtw_set_hw_wmm_param(padapter);
 
-	/*pmlmeext->bstart_bss = _TRUE;*/
+#ifdef CONFIG_FW_HANDLE_TXBCN
+		if (mlme_act != MLME_OPCH_SWITCH)
+			rtw_ap_mbid_bcn_en(padapter, padapter->vap_id);
+#endif
+	}
 }
 
 int rtw_check_beacon_data(_adapter *padapter, u8 *pbuf,  int len)
@@ -1691,20 +1901,19 @@ int rtw_check_beacon_data(_adapter *padapter, u8 *pbuf,  int len)
 	u8	channel, network_type, supportRate[NDIS_802_11_LENGTH_RATES_EX];
 	int supportRateNum = 0;
 	u8 OUI1[] = {0x00, 0x50, 0xf2, 0x01};
-	u8 wps_oui[4] = {0x0, 0x50, 0xf2, 0x04};
 	u8 WMM_PARA_IE[] = {0x00, 0x50, 0xf2, 0x02, 0x01, 0x01};
+	HT_CAP_AMPDU_DENSITY best_ampdu_density;
 	struct registry_priv *pregistrypriv = &padapter->registrypriv;
 	struct security_priv *psecuritypriv = &padapter->securitypriv;
 	struct mlme_priv *pmlmepriv = &(padapter->mlmepriv);
 	WLAN_BSSID_EX *pbss_network = (WLAN_BSSID_EX *)&pmlmepriv->cur_network.network;
-	struct sta_priv *pstapriv = &padapter->stapriv;
 	u8 *ie = pbss_network->IEs;
 	u8 vht_cap = _FALSE;
 	struct mlme_ext_priv	*pmlmeext = &(padapter->mlmeextpriv);
 	struct mlme_ext_info	*pmlmeinfo = &(pmlmeext->mlmext_info);
 	struct rf_ctl_t *rfctl = adapter_to_rfctl(padapter);
 	u8 rf_num = 0;
-
+	int ret_rm;
 	/* SSID */
 	/* Supported rates */
 	/* DS Params */
@@ -1732,7 +1941,9 @@ int rtw_check_beacon_data(_adapter *padapter, u8 *pbuf,  int len)
 	_rtw_memcpy(ie, pbuf, pbss_network->IELength);
 
 
-	if (pbss_network->InfrastructureMode != Ndis802_11APMode) {
+	if (pbss_network->InfrastructureMode != Ndis802_11APMode
+		&& pbss_network->InfrastructureMode != Ndis802_11_mesh
+	) {
 		rtw_warn_on(1);
 		return _FAIL;
 	}
@@ -1767,6 +1978,18 @@ int rtw_check_beacon_data(_adapter *padapter, u8 *pbuf,  int len)
 #endif
 	}
 
+#ifdef CONFIG_RTW_MESH
+	/* Mesh ID */
+	if (MLME_IS_MESH(padapter)) {
+		p = rtw_get_ie(ie + _BEACON_IE_OFFSET_, WLAN_EID_MESH_ID, &ie_len, (pbss_network->IELength - _BEACON_IE_OFFSET_));
+		if (p && ie_len > 0) {
+			_rtw_memset(&pbss_network->mesh_id, 0, sizeof(NDIS_802_11_SSID));
+			_rtw_memcpy(pbss_network->mesh_id.Ssid, (p + 2), ie_len);
+			pbss_network->mesh_id.SsidLength = ie_len;
+		}
+	}
+#endif
+
 	/* chnnel */
 	channel = 0;
 	pbss_network->Configuration.Length = 0;
@@ -1781,6 +2004,13 @@ int rtw_check_beacon_data(_adapter *padapter, u8 *pbuf,  int len)
 	/* get supported rates */
 	p = rtw_get_ie(ie + _BEACON_IE_OFFSET_, _SUPPORTEDRATES_IE_, &ie_len, (pbss_network->IELength - _BEACON_IE_OFFSET_));
 	if (p !=  NULL) {
+		if (padapter->registrypriv.wireless_mode == WIRELESS_11B) {
+			ret_rm = rtw_remove_ie_g_rate(ie , &len, _BEACON_IE_OFFSET_, _SUPPORTEDRATES_IE_);
+			RTW_DBG("%s, rtw_remove_ie_g_rate=%d\n", __FUNCTION__,ret_rm);
+			ie_len = ie_len - ret_rm;
+			pbss_network->IELength=pbss_network->IELength - ret_rm;
+		}
+		RTW_DBG("%s, ie_len=%u\n", __FUNCTION__, ie_len);
 		_rtw_memcpy(supportRate, p + 2, ie_len);
 		supportRateNum = ie_len;
 	}
@@ -1788,8 +2018,15 @@ int rtw_check_beacon_data(_adapter *padapter, u8 *pbuf,  int len)
 	/* get ext_supported rates */
 	p = rtw_get_ie(ie + _BEACON_IE_OFFSET_, _EXT_SUPPORTEDRATES_IE_, &ie_len, pbss_network->IELength - _BEACON_IE_OFFSET_);
 	if (p !=  NULL) {
-		_rtw_memcpy(supportRate + supportRateNum, p + 2, ie_len);
-		supportRateNum += ie_len;
+		if (padapter->registrypriv.wireless_mode == WIRELESS_11B) {
+			pbss_network->IELength = pbss_network->IELength-*(p+1) -2;
+			ret_rm = rtw_ies_remove_ie(ie , &len,_BEACON_IE_OFFSET_,
+					_EXT_SUPPORTEDRATES_IE_,NULL,0);
+			RTW_DBG("%s, remove_ie of ext_supported rates =%d\n", __FUNCTION__, ret_rm);
+		} else {
+			_rtw_memcpy(supportRate + supportRateNum, p + 2, ie_len);
+			supportRateNum += ie_len;
+		}
 
 	}
 
@@ -1800,8 +2037,16 @@ int rtw_check_beacon_data(_adapter *padapter, u8 *pbuf,  int len)
 
 	/* parsing ERP_IE */
 	p = rtw_get_ie(ie + _BEACON_IE_OFFSET_, _ERPINFO_IE_, &ie_len, (pbss_network->IELength - _BEACON_IE_OFFSET_));
-	if (p && ie_len > 0)
-		ERP_IE_handler(padapter, (PNDIS_802_11_VARIABLE_IEs)p);
+	if (p && ie_len > 0)  {
+		if(padapter->registrypriv.wireless_mode == WIRELESS_11B ) {
+
+			pbss_network->IELength = pbss_network->IELength - *(p+1) - 2;
+			ret_rm = rtw_ies_remove_ie(ie , &len, _BEACON_IE_OFFSET_, _ERPINFO_IE_,NULL,0);
+			RTW_DBG("%s, remove_ie of ERP_IE=%d\n", __FUNCTION__, ret_rm);
+		} else 
+			ERP_IE_handler(padapter, (PNDIS_802_11_VARIABLE_IEs)p);
+
+	}
 
 	/* update privacy/security */
 	if (cap & BIT(4))
@@ -1820,7 +2065,7 @@ int rtw_check_beacon_data(_adapter *padapter, u8 *pbuf,  int len)
 	if (p && ie_len > 0) {
 		if (rtw_parse_wpa2_ie(p, ie_len + 2, &group_cipher, &pairwise_cipher, NULL, &mfp_opt) == _SUCCESS) {
 			psecuritypriv->dot11AuthAlgrthm = dot11AuthAlgrthm_8021X;
-
+			psecuritypriv->ndisauthtype = Ndis802_11AuthModeWPA2PSK;
 			psecuritypriv->dot8021xalg = 1;/* psk,  todo:802.1x */
 			psecuritypriv->wpa_psk |= BIT(1);
 
@@ -1878,7 +2123,7 @@ int rtw_check_beacon_data(_adapter *padapter, u8 *pbuf,  int len)
 		if ((p) && (_rtw_memcmp(p + 2, OUI1, 4))) {
 			if (rtw_parse_wpa_ie(p, ie_len + 2, &group_cipher, &pairwise_cipher, NULL) == _SUCCESS) {
 				psecuritypriv->dot11AuthAlgrthm = dot11AuthAlgrthm_8021X;
-
+				psecuritypriv->ndisauthtype = Ndis802_11AuthModeWPAPSK;
 				psecuritypriv->dot8021xalg = 1;/* psk,  todo:802.1x */
 
 				psecuritypriv->wpa_psk |= BIT(0);
@@ -1934,6 +2179,13 @@ int rtw_check_beacon_data(_adapter *padapter, u8 *pbuf,  int len)
 
 	}
 
+#ifdef CONFIG_RTW_MESH
+	if (MLME_IS_MESH(padapter)) {
+		/* MFP is mandatory for secure mesh */
+		if (padapter->mesh_info.mesh_auth_id)
+			mfp_opt = MFP_REQUIRED;
+	} else
+#endif
 	if (mfp_opt == MFP_INVALID) {
 		RTW_INFO(FUNC_ADPT_FMT" invalid MFP setting\n", FUNC_ADPT_ARG(padapter));
 		return _FAIL;
@@ -1943,6 +2195,10 @@ int rtw_check_beacon_data(_adapter *padapter, u8 *pbuf,  int len)
 	/* wmm */
 	ie_len = 0;
 	pmlmepriv->qospriv.qos_option = 0;
+#ifdef CONFIG_RTW_MESH
+	if (MLME_IS_MESH(padapter))
+		pmlmepriv->qospriv.qos_option = 1;
+#endif
 	if (pregistrypriv->wmm_enable) {
 		for (p = ie + _BEACON_IE_OFFSET_; ; p += (ie_len + 2)) {
 			p = rtw_get_ie(p, _VENDOR_SPECIFIC_IE_, &ie_len, (pbss_network->IELength - _BEACON_IE_OFFSET_ - (ie_len + 2)));
@@ -1957,6 +2213,8 @@ int rtw_check_beacon_data(_adapter *padapter, u8 *pbuf,  int len)
 				*(p + 18) &= ~BIT(4); /* VI */
 				*(p + 22) &= ~BIT(4); /* VO */
 
+				WMM_param_handler(padapter, (PNDIS_802_11_VARIABLE_IEs)p);
+
 				break;
 			}
 
@@ -1965,130 +2223,134 @@ int rtw_check_beacon_data(_adapter *padapter, u8 *pbuf,  int len)
 		}
 	}
 #ifdef CONFIG_80211N_HT
-	/* parsing HT_CAP_IE */
-	p = rtw_get_ie(ie + _BEACON_IE_OFFSET_, _HT_CAPABILITY_IE_, &ie_len, (pbss_network->IELength - _BEACON_IE_OFFSET_));
-	if (p && ie_len > 0) {
-		u8 rf_type = 0;
-		HT_CAP_AMPDU_FACTOR max_rx_ampdu_factor = MAX_AMPDU_FACTOR_64K;
-		struct rtw_ieee80211_ht_cap *pht_cap = (struct rtw_ieee80211_ht_cap *)(p + 2);
-
-		if (0) {
-			RTW_INFO(FUNC_ADPT_FMT" HT_CAP_IE from upper layer:\n", FUNC_ADPT_ARG(padapter));
-			dump_ht_cap_ie_content(RTW_DBGDUMP, p + 2, ie_len);
-		}
+	if(padapter->registrypriv.ht_enable &&
+		is_supported_ht(padapter->registrypriv.wireless_mode)) {
+		/* parsing HT_CAP_IE */
+		p = rtw_get_ie(ie + _BEACON_IE_OFFSET_, _HT_CAPABILITY_IE_, &ie_len, (pbss_network->IELength - _BEACON_IE_OFFSET_));
+		if (p && ie_len > 0) {
+			u8 rf_type = 0;
+			HT_CAP_AMPDU_FACTOR max_rx_ampdu_factor = MAX_AMPDU_FACTOR_64K;
+			struct rtw_ieee80211_ht_cap *pht_cap = (struct rtw_ieee80211_ht_cap *)(p + 2);
+
+			if (0) {
+				RTW_INFO(FUNC_ADPT_FMT" HT_CAP_IE from upper layer:\n", FUNC_ADPT_ARG(padapter));
+				dump_ht_cap_ie_content(RTW_DBGDUMP, p + 2, ie_len);
+			}
 
-		pHT_caps_ie = p;
+			pHT_caps_ie = p;
 
-		ht_cap = _TRUE;
-		network_type |= WIRELESS_11_24N;
+			ht_cap = _TRUE;
+			network_type |= WIRELESS_11_24N;
 
-		rtw_ht_use_default_setting(padapter);
+			rtw_ht_use_default_setting(padapter);
 
-		/* Update HT Capabilities Info field */
-		if (pmlmepriv->htpriv.sgi_20m == _FALSE)
-			pht_cap->cap_info &= ~(IEEE80211_HT_CAP_SGI_20);
+			/* Update HT Capabilities Info field */
+			if (pmlmepriv->htpriv.sgi_20m == _FALSE)
+				pht_cap->cap_info &= ~(IEEE80211_HT_CAP_SGI_20);
 
-		if (pmlmepriv->htpriv.sgi_40m == _FALSE)
-			pht_cap->cap_info &= ~(IEEE80211_HT_CAP_SGI_40);
+			if (pmlmepriv->htpriv.sgi_40m == _FALSE)
+				pht_cap->cap_info &= ~(IEEE80211_HT_CAP_SGI_40);
 
-		if (!TEST_FLAG(pmlmepriv->htpriv.ldpc_cap, LDPC_HT_ENABLE_RX))
-			pht_cap->cap_info &= ~(IEEE80211_HT_CAP_LDPC_CODING);
+			if (!TEST_FLAG(pmlmepriv->htpriv.ldpc_cap, LDPC_HT_ENABLE_RX))
+				pht_cap->cap_info &= ~(IEEE80211_HT_CAP_LDPC_CODING);
 
-		if (!TEST_FLAG(pmlmepriv->htpriv.stbc_cap, STBC_HT_ENABLE_TX))
-			pht_cap->cap_info &= ~(IEEE80211_HT_CAP_TX_STBC);
+			if (!TEST_FLAG(pmlmepriv->htpriv.stbc_cap, STBC_HT_ENABLE_TX))
+				pht_cap->cap_info &= ~(IEEE80211_HT_CAP_TX_STBC);
 
-		if (!TEST_FLAG(pmlmepriv->htpriv.stbc_cap, STBC_HT_ENABLE_RX))
-			pht_cap->cap_info &= ~(IEEE80211_HT_CAP_RX_STBC_3R);
+			if (!TEST_FLAG(pmlmepriv->htpriv.stbc_cap, STBC_HT_ENABLE_RX))
+				pht_cap->cap_info &= ~(IEEE80211_HT_CAP_RX_STBC_3R);
 
-		/* Update A-MPDU Parameters field */
-		pht_cap->ampdu_params_info &= ~(IEEE80211_HT_CAP_AMPDU_FACTOR | IEEE80211_HT_CAP_AMPDU_DENSITY);
+			/* Update A-MPDU Parameters field */
+			pht_cap->ampdu_params_info &= ~(IEEE80211_HT_CAP_AMPDU_FACTOR | IEEE80211_HT_CAP_AMPDU_DENSITY);
 
-		if ((psecuritypriv->wpa_pairwise_cipher & WPA_CIPHER_CCMP) ||
-		    (psecuritypriv->wpa2_pairwise_cipher & WPA_CIPHER_CCMP))
-			pht_cap->ampdu_params_info |= (IEEE80211_HT_CAP_AMPDU_DENSITY & (0x07 << 2));
-		else
-			pht_cap->ampdu_params_info |= (IEEE80211_HT_CAP_AMPDU_DENSITY & 0x00);
+			if ((psecuritypriv->wpa_pairwise_cipher & WPA_CIPHER_CCMP) ||
+				(psecuritypriv->wpa2_pairwise_cipher & WPA_CIPHER_CCMP)) {
+				rtw_hal_get_def_var(padapter, HW_VAR_BEST_AMPDU_DENSITY, &best_ampdu_density);
+				pht_cap->ampdu_params_info |= (IEEE80211_HT_CAP_AMPDU_DENSITY & (best_ampdu_density << 2));
+			} else
+				pht_cap->ampdu_params_info |= (IEEE80211_HT_CAP_AMPDU_DENSITY & 0x00);
 
-		rtw_hal_get_def_var(padapter, HW_VAR_MAX_RX_AMPDU_FACTOR, &max_rx_ampdu_factor);
-		pht_cap->ampdu_params_info |= (IEEE80211_HT_CAP_AMPDU_FACTOR & max_rx_ampdu_factor); /* set  Max Rx AMPDU size  to 64K */
+			rtw_hal_get_def_var(padapter, HW_VAR_MAX_RX_AMPDU_FACTOR, &max_rx_ampdu_factor);
+			pht_cap->ampdu_params_info |= (IEEE80211_HT_CAP_AMPDU_FACTOR & max_rx_ampdu_factor); /* set  Max Rx AMPDU size  to 64K */
 
-		_rtw_memcpy(&(pmlmeinfo->HT_caps), pht_cap, sizeof(struct HT_caps_element));
+			_rtw_memcpy(&(pmlmeinfo->HT_caps), pht_cap, sizeof(struct HT_caps_element));
 
-		/* Update Supported MCS Set field */
-		{
-			struct hal_spec_t *hal_spec = GET_HAL_SPEC(padapter);
-			u8 rx_nss = 0;
-			int i;
+			/* Update Supported MCS Set field */
+			{
+				struct hal_spec_t *hal_spec = GET_HAL_SPEC(padapter);
+				u8 rx_nss = 0;
+				int i;
 
-			rtw_hal_get_hwreg(padapter, HW_VAR_RF_TYPE, (u8 *)(&rf_type));
-			rx_nss = rtw_min(rf_type_to_rf_rx_cnt(rf_type), hal_spec->rx_nss_num);
+				rtw_hal_get_hwreg(padapter, HW_VAR_RF_TYPE, (u8 *)(&rf_type));
+				rx_nss = rtw_min(rf_type_to_rf_rx_cnt(rf_type), hal_spec->rx_nss_num);
 
-			/* RX MCS Bitmask */
-			switch (rx_nss) {
-			case 1:
-				set_mcs_rate_by_mask(HT_CAP_ELE_RX_MCS_MAP(pht_cap), MCS_RATE_1R);
-				break;
-			case 2:
-				set_mcs_rate_by_mask(HT_CAP_ELE_RX_MCS_MAP(pht_cap), MCS_RATE_2R);
-				break;
-			case 3:
-				set_mcs_rate_by_mask(HT_CAP_ELE_RX_MCS_MAP(pht_cap), MCS_RATE_3R);
-				break;
-			case 4:
-				set_mcs_rate_by_mask(HT_CAP_ELE_RX_MCS_MAP(pht_cap), MCS_RATE_4R);
-				break;
-			default:
-				RTW_WARN("rf_type:%d or rx_nss:%u is not expected\n", rf_type, hal_spec->rx_nss_num);
+				/* RX MCS Bitmask */
+				switch (rx_nss) {
+				case 1:
+					set_mcs_rate_by_mask(HT_CAP_ELE_RX_MCS_MAP(pht_cap), MCS_RATE_1R);
+					break;
+				case 2:
+					set_mcs_rate_by_mask(HT_CAP_ELE_RX_MCS_MAP(pht_cap), MCS_RATE_2R);
+					break;
+				case 3:
+					set_mcs_rate_by_mask(HT_CAP_ELE_RX_MCS_MAP(pht_cap), MCS_RATE_3R);
+					break;
+				case 4:
+					set_mcs_rate_by_mask(HT_CAP_ELE_RX_MCS_MAP(pht_cap), MCS_RATE_4R);
+					break;
+				default:
+					RTW_WARN("rf_type:%d or rx_nss:%u is not expected\n", rf_type, hal_spec->rx_nss_num);
+				}
+				for (i = 0; i < 10; i++)
+					*(HT_CAP_ELE_RX_MCS_MAP(pht_cap) + i) &= padapter->mlmeextpriv.default_supported_mcs_set[i];
 			}
-			for (i = 0; i < 10; i++)
-				*(HT_CAP_ELE_RX_MCS_MAP(pht_cap) + i) &= padapter->mlmeextpriv.default_supported_mcs_set[i];
-		}
 
 #ifdef CONFIG_BEAMFORMING
-		/* Use registry value to enable HT Beamforming. */
-		/* ToDo: use configure file to set these capability. */
-		pht_cap->tx_BF_cap_info = 0;
-
-		/* HT Beamformer */
-		if (TEST_FLAG(pmlmepriv->htpriv.beamform_cap, BEAMFORMING_HT_BEAMFORMER_ENABLE)) {
-			/* Transmit NDP Capable */
-			SET_HT_CAP_TXBF_TRANSMIT_NDP_CAP(pht_cap, 1);
-			/* Explicit Compressed Steering Capable */
-			SET_HT_CAP_TXBF_EXPLICIT_COMP_STEERING_CAP(pht_cap, 1);
-			/* Compressed Steering Number Antennas */
-			SET_HT_CAP_TXBF_COMP_STEERING_NUM_ANTENNAS(pht_cap, 1);
-			rtw_hal_get_def_var(padapter, HAL_DEF_BEAMFORMER_CAP, (u8 *)&rf_num);
-			SET_HT_CAP_TXBF_CHNL_ESTIMATION_NUM_ANTENNAS(pht_cap, rf_num);
-		}
+			/* Use registry value to enable HT Beamforming. */
+			/* ToDo: use configure file to set these capability. */
+			pht_cap->tx_BF_cap_info = 0;
+
+			/* HT Beamformer */
+			if (TEST_FLAG(pmlmepriv->htpriv.beamform_cap, BEAMFORMING_HT_BEAMFORMER_ENABLE)) {
+				/* Transmit NDP Capable */
+				SET_HT_CAP_TXBF_TRANSMIT_NDP_CAP(pht_cap, 1);
+				/* Explicit Compressed Steering Capable */
+				SET_HT_CAP_TXBF_EXPLICIT_COMP_STEERING_CAP(pht_cap, 1);
+				/* Compressed Steering Number Antennas */
+				SET_HT_CAP_TXBF_COMP_STEERING_NUM_ANTENNAS(pht_cap, 1);
+				rtw_hal_get_def_var(padapter, HAL_DEF_BEAMFORMER_CAP, (u8 *)&rf_num);
+				SET_HT_CAP_TXBF_CHNL_ESTIMATION_NUM_ANTENNAS(pht_cap, rf_num);
+			}
 
-		/* HT Beamformee */
-		if (TEST_FLAG(pmlmepriv->htpriv.beamform_cap, BEAMFORMING_HT_BEAMFORMEE_ENABLE)) {
-			/* Receive NDP Capable */
-			SET_HT_CAP_TXBF_RECEIVE_NDP_CAP(pht_cap, 1);
-			/* Explicit Compressed Beamforming Feedback Capable */
-			SET_HT_CAP_TXBF_EXPLICIT_COMP_FEEDBACK_CAP(pht_cap, 2);
-			rtw_hal_get_def_var(padapter, HAL_DEF_BEAMFORMEE_CAP, (u8 *)&rf_num);
-			SET_HT_CAP_TXBF_COMP_STEERING_NUM_ANTENNAS(pht_cap, rf_num);
-		}
+			/* HT Beamformee */
+			if (TEST_FLAG(pmlmepriv->htpriv.beamform_cap, BEAMFORMING_HT_BEAMFORMEE_ENABLE)) {
+				/* Receive NDP Capable */
+				SET_HT_CAP_TXBF_RECEIVE_NDP_CAP(pht_cap, 1);
+				/* Explicit Compressed Beamforming Feedback Capable */
+				SET_HT_CAP_TXBF_EXPLICIT_COMP_FEEDBACK_CAP(pht_cap, 2);
+				rtw_hal_get_def_var(padapter, HAL_DEF_BEAMFORMEE_CAP, (u8 *)&rf_num);
+				SET_HT_CAP_TXBF_COMP_STEERING_NUM_ANTENNAS(pht_cap, rf_num);
+			}
 #endif /* CONFIG_BEAMFORMING */
 
-		_rtw_memcpy(&pmlmepriv->htpriv.ht_cap, p + 2, ie_len);
+			_rtw_memcpy(&pmlmepriv->htpriv.ht_cap, p + 2, ie_len);
 
-		if (0) {
-			RTW_INFO(FUNC_ADPT_FMT" HT_CAP_IE driver masked:\n", FUNC_ADPT_ARG(padapter));
-			dump_ht_cap_ie_content(RTW_DBGDUMP, p + 2, ie_len);
+			if (0) {
+				RTW_INFO(FUNC_ADPT_FMT" HT_CAP_IE driver masked:\n", FUNC_ADPT_ARG(padapter));
+				dump_ht_cap_ie_content(RTW_DBGDUMP, p + 2, ie_len);
+			}
 		}
-	}
 
-	/* parsing HT_INFO_IE */
-	p = rtw_get_ie(ie + _BEACON_IE_OFFSET_, _HT_ADD_INFO_IE_, &ie_len, (pbss_network->IELength - _BEACON_IE_OFFSET_));
-	if (p && ie_len > 0) {
-		pHT_info_ie = p;
-		if (channel == 0)
-			pbss_network->Configuration.DSConfig = GET_HT_OP_ELE_PRI_CHL(pHT_info_ie + 2);
-		else if (channel != GET_HT_OP_ELE_PRI_CHL(pHT_info_ie + 2)) {
-			RTW_INFO(FUNC_ADPT_FMT" ch inconsistent, DSSS:%u, HT primary:%u\n"
-				, FUNC_ADPT_ARG(padapter), channel, GET_HT_OP_ELE_PRI_CHL(pHT_info_ie + 2));
+		/* parsing HT_INFO_IE */
+		p = rtw_get_ie(ie + _BEACON_IE_OFFSET_, _HT_ADD_INFO_IE_, &ie_len, (pbss_network->IELength - _BEACON_IE_OFFSET_));
+		if (p && ie_len > 0) {
+			pHT_info_ie = p;
+			if (channel == 0)
+				pbss_network->Configuration.DSConfig = GET_HT_OP_ELE_PRI_CHL(pHT_info_ie + 2);
+			else if (channel != GET_HT_OP_ELE_PRI_CHL(pHT_info_ie + 2)) {
+				RTW_INFO(FUNC_ADPT_FMT" ch inconsistent, DSSS:%u, HT primary:%u\n"
+					, FUNC_ADPT_ARG(padapter), channel, GET_HT_OP_ELE_PRI_CHL(pHT_info_ie + 2));
+			}
 		}
 	}
 #endif /* CONFIG_80211N_HT */
@@ -2123,7 +2385,9 @@ int rtw_check_beacon_data(_adapter *padapter, u8 *pbuf,  int len)
 	}
 
 	/* ht_cap	 */
-	if (pregistrypriv->ht_enable && ht_cap == _TRUE) {
+	if (padapter->registrypriv.ht_enable &&
+		is_supported_ht(padapter->registrypriv.wireless_mode) && ht_cap == _TRUE) {
+
 		pmlmepriv->htpriv.ht_option = _TRUE;
 		pmlmepriv->qospriv.qos_option = 1;
 
@@ -2136,30 +2400,43 @@ int rtw_check_beacon_data(_adapter *padapter, u8 *pbuf,  int len)
 #endif
 
 #ifdef CONFIG_80211AC_VHT
-
-	/* Parsing VHT CAP IE */
-	p = rtw_get_ie(ie + _BEACON_IE_OFFSET_, EID_VHTCapability, &ie_len, (pbss_network->IELength - _BEACON_IE_OFFSET_));
-	if (p && ie_len > 0)
-		vht_cap = _TRUE;
-	/* Parsing VHT OPERATION IE */
-
-
+	pmlmepriv->ori_vht_en = 0;
 	pmlmepriv->vhtpriv.vht_option = _FALSE;
-	/* if channel in 5G band, then add vht ie . */
-	if ((pbss_network->Configuration.DSConfig > 14)
-		&& (pmlmepriv->htpriv.ht_option == _TRUE)
+
+	if (pmlmepriv->htpriv.ht_option == _TRUE
+		&& pbss_network->Configuration.DSConfig > 14
 		&& REGSTY_IS_11AC_ENABLE(pregistrypriv)
-		&& hal_chk_proto_cap(padapter, PROTO_CAP_11AC)
+		&& is_supported_vht(pregistrypriv->wireless_mode)
 		&& (!rfctl->country_ent || COUNTRY_CHPLAN_EN_11AC(rfctl->country_ent))
 	) {
-		if (vht_cap == _TRUE)
+		/* Parsing VHT CAP IE */
+		p = rtw_get_ie(ie + _BEACON_IE_OFFSET_, EID_VHTCapability, &ie_len, (pbss_network->IELength - _BEACON_IE_OFFSET_));
+		if (p && ie_len > 0)
+			vht_cap = _TRUE;
+
+		/* Parsing VHT OPERATION IE */
+
+		if (vht_cap == _TRUE
+			&& MLME_IS_MESH(padapter) /* allow only mesh temporarily before VHT IE checking is ready */
+		) {
+			rtw_check_for_vht20(padapter, ie + _BEACON_IE_OFFSET_, pbss_network->IELength - _BEACON_IE_OFFSET_);
+			pmlmepriv->ori_vht_en = 1;
 			pmlmepriv->vhtpriv.vht_option = _TRUE;
-		else if (REGSTY_IS_11AC_AUTO(pregistrypriv))
+		} else if (REGSTY_IS_11AC_AUTO(pregistrypriv)) {
+			rtw_vht_ies_detach(padapter, pbss_network);
 			rtw_vht_ies_attach(padapter, pbss_network);
+		}
 	}
+
+	if (pmlmepriv->vhtpriv.vht_option == _FALSE)
+		rtw_vht_ies_detach(padapter, pbss_network);
 #endif /* CONFIG_80211AC_VHT */
 
-	if(pbss_network->Configuration.DSConfig <= 14 && padapter->registrypriv.wifi_spec == 1) {
+#ifdef CONFIG_80211N_HT
+	if(padapter->registrypriv.ht_enable &&
+					is_supported_ht(padapter->registrypriv.wireless_mode) &&
+		pbss_network->Configuration.DSConfig <= 14 && padapter->registrypriv.wifi_spec == 1 &&
+		pbss_network->IELength + 10 <= MAX_IE_SZ) {
 		uint len = 0;
 
 		SET_EXT_CAPABILITY_ELE_BSS_COEXIST(pmlmepriv->ext_capab_ie_data, 1);
@@ -2167,11 +2444,12 @@ int rtw_check_beacon_data(_adapter *padapter, u8 *pbuf,  int len)
 		rtw_set_ie(pbss_network->IEs + pbss_network->IELength, EID_EXTCapability, 8, pmlmepriv->ext_capab_ie_data, &len);
 		pbss_network->IELength += pmlmepriv->ext_capab_ie_len;
 	}
+#endif /* CONFIG_80211N_HT */
 
 	pbss_network->Length = get_WLAN_BSSID_EX_sz((WLAN_BSSID_EX *)pbss_network);
 
 	rtw_ies_get_chbw(pbss_network->IEs + _BEACON_IE_OFFSET_, pbss_network->IELength - _BEACON_IE_OFFSET_
-		, &pmlmepriv->ori_ch, &pmlmepriv->ori_bw, &pmlmepriv->ori_offset);
+		, &pmlmepriv->ori_ch, &pmlmepriv->ori_bw, &pmlmepriv->ori_offset, 1, 1);
 	rtw_warn_on(pmlmepriv->ori_ch == 0);
 
 	{
@@ -2207,14 +2485,24 @@ int rtw_check_beacon_data(_adapter *padapter, u8 *pbuf,  int len)
 }
 
 #if CONFIG_RTW_MACADDR_ACL
-void rtw_macaddr_acl_init(_adapter *adapter)
+void rtw_macaddr_acl_init(_adapter *adapter, u8 period)
 {
 	struct sta_priv *stapriv = &adapter->stapriv;
-	struct wlan_acl_pool *acl = &stapriv->acl_list;
-	_queue *acl_node_q = &acl->acl_node_q;
+	struct wlan_acl_pool *acl;
+	_queue *acl_node_q;
 	int i;
 	_irqL irqL;
 
+	if (period >= RTW_ACL_PERIOD_NUM) {
+		rtw_warn_on(1);
+		return;
+	}
+
+	acl = &stapriv->acl_list[period];
+	acl_node_q = &acl->acl_node_q;
+
+	_rtw_spinlock_init(&(acl_node_q->lock));
+
 	_enter_critical_bh(&(acl_node_q->lock), &irqL);
 	_rtw_init_listhead(&(acl_node_q->queue));
 	acl->num = 0;
@@ -2226,15 +2514,23 @@ void rtw_macaddr_acl_init(_adapter *adapter)
 	_exit_critical_bh(&(acl_node_q->lock), &irqL);
 }
 
-void rtw_macaddr_acl_deinit(_adapter *adapter)
+static void _rtw_macaddr_acl_deinit(_adapter *adapter, u8 period, bool clear_only)
 {
 	struct sta_priv *stapriv = &adapter->stapriv;
-	struct wlan_acl_pool *acl = &stapriv->acl_list;
-	_queue *acl_node_q = &acl->acl_node_q;
+	struct wlan_acl_pool *acl;
+	_queue *acl_node_q;
 	_irqL irqL;
 	_list *head, *list;
 	struct rtw_wlan_acl_node *acl_node;
 
+	if (period >= RTW_ACL_PERIOD_NUM) {
+		rtw_warn_on(1);
+		return;
+	}
+
+	acl = &stapriv->acl_list[period];
+	acl_node_q = &acl->acl_node_q;
+
 	_enter_critical_bh(&(acl_node_q->lock), &irqL);
 	head = get_list_head(acl_node_q);
 	list = get_next(head);
@@ -2250,24 +2546,42 @@ void rtw_macaddr_acl_deinit(_adapter *adapter)
 	}
 	_exit_critical_bh(&(acl_node_q->lock), &irqL);
 
+	if (!clear_only)
+		_rtw_spinlock_free(&(acl_node_q->lock));
+
 	rtw_warn_on(acl->num);
 	acl->mode = RTW_ACL_MODE_DISABLED;
 }
 
-void rtw_set_macaddr_acl(_adapter *adapter, int mode)
+void rtw_macaddr_acl_deinit(_adapter *adapter, u8 period)
+{
+	_rtw_macaddr_acl_deinit(adapter, period, 0);
+}
+
+void rtw_macaddr_acl_clear(_adapter *adapter, u8 period)
+{
+	_rtw_macaddr_acl_deinit(adapter, period, 1);
+}
+
+void rtw_set_macaddr_acl(_adapter *adapter, u8 period, int mode)
 {
 	struct sta_priv *stapriv = &adapter->stapriv;
-	struct wlan_acl_pool *acl = &stapriv->acl_list;
+	struct wlan_acl_pool *acl;
+
+	if (period >= RTW_ACL_PERIOD_NUM) {
+		rtw_warn_on(1);
+		return;
+	}
 
-	RTW_INFO(FUNC_ADPT_FMT" mode=%d\n", FUNC_ADPT_ARG(adapter), mode);
+	acl = &stapriv->acl_list[period];
 
-	acl->mode = mode;
+	RTW_INFO(FUNC_ADPT_FMT" p=%u, mode=%d\n"
+		, FUNC_ADPT_ARG(adapter), period, mode);
 
-	if (mode == RTW_ACL_MODE_DISABLED)
-		rtw_macaddr_acl_deinit(adapter);
+	acl->mode = mode;
 }
 
-int rtw_acl_add_sta(_adapter *adapter, const u8 *addr)
+int rtw_acl_add_sta(_adapter *adapter, u8 period, const u8 *addr)
 {
 	_irqL irqL;
 	_list *list, *head;
@@ -2275,8 +2589,17 @@ int rtw_acl_add_sta(_adapter *adapter, const u8 *addr)
 	int i = -1, ret = 0;
 	struct rtw_wlan_acl_node *acl_node;
 	struct sta_priv *stapriv = &adapter->stapriv;
-	struct wlan_acl_pool *acl = &stapriv->acl_list;
-	_queue *acl_node_q = &acl->acl_node_q;
+	struct wlan_acl_pool *acl;
+	_queue *acl_node_q;
+
+	if (period >= RTW_ACL_PERIOD_NUM) {
+		rtw_warn_on(1);
+		ret = -1;
+		goto exit;
+	}
+
+	acl = &stapriv->acl_list[period];
+	acl_node_q = &acl->acl_node_q;
 
 	_enter_critical_bh(&(acl_node_q->lock), &irqL);
 
@@ -2323,26 +2646,34 @@ release_lock:
 	if (!existed && (i < 0 || i >= NUM_ACL))
 		ret = -1;
 
-	RTW_INFO(FUNC_ADPT_FMT" "MAC_FMT" %s (acl_num=%d)\n"
-		 , FUNC_ADPT_ARG(adapter), MAC_ARG(addr)
+	RTW_INFO(FUNC_ADPT_FMT" p=%u "MAC_FMT" %s (acl_num=%d)\n"
+		 , FUNC_ADPT_ARG(adapter), period, MAC_ARG(addr)
 		, (existed ? "existed" : ((i < 0 || i >= NUM_ACL) ? "no room" : "added"))
 		 , acl->num);
-
+exit:
 	return ret;
 }
 
-int rtw_acl_remove_sta(_adapter *adapter, const u8 *addr)
+int rtw_acl_remove_sta(_adapter *adapter, u8 period, const u8 *addr)
 {
 	_irqL irqL;
 	_list *list, *head;
 	int ret = 0;
 	struct rtw_wlan_acl_node *acl_node;
 	struct sta_priv *stapriv = &adapter->stapriv;
-	struct wlan_acl_pool *acl = &stapriv->acl_list;
-	_queue	*acl_node_q = &acl->acl_node_q;
+	struct wlan_acl_pool *acl;
+	_queue	*acl_node_q;
 	u8 is_baddr = is_broadcast_mac_addr(addr);
 	u8 match = 0;
 
+	if (period >= RTW_ACL_PERIOD_NUM) {
+		rtw_warn_on(1);
+		goto exit;
+	}
+
+	acl = &stapriv->acl_list[period];
+	acl_node_q = &acl->acl_node_q;
+
 	_enter_critical_bh(&(acl_node_q->lock), &irqL);
 
 	head = get_list_head(acl_node_q);
@@ -2364,51 +2695,59 @@ int rtw_acl_remove_sta(_adapter *adapter, const u8 *addr)
 
 	_exit_critical_bh(&(acl_node_q->lock), &irqL);
 
-	RTW_INFO(FUNC_ADPT_FMT" "MAC_FMT" %s (acl_num=%d)\n"
-		 , FUNC_ADPT_ARG(adapter), MAC_ARG(addr)
+	RTW_INFO(FUNC_ADPT_FMT" p=%u "MAC_FMT" %s (acl_num=%d)\n"
+		 , FUNC_ADPT_ARG(adapter), period, MAC_ARG(addr)
 		 , is_baddr ? "clear all" : (match ? "match" : "no found")
 		 , acl->num);
 
+exit:
 	return ret;
 }
 #endif /* CONFIG_RTW_MACADDR_ACL */
 
-u8 rtw_ap_set_pairwise_key(_adapter *padapter, struct sta_info *psta)
+u8 rtw_ap_set_sta_key(_adapter *adapter, const u8 *addr, u8 alg, const u8 *key, u8 keyid, u8 gk)
 {
-	struct cmd_obj			*ph2c;
-	struct set_stakey_parm	*psetstakey_para;
-	struct cmd_priv			*pcmdpriv = &padapter->cmdpriv;
+	struct cmd_priv *cmdpriv = &adapter->cmdpriv;
+	struct cmd_obj *cmd;
+	struct set_stakey_parm *param;
 	u8	res = _SUCCESS;
 
-	ph2c = (struct cmd_obj *)rtw_zmalloc(sizeof(struct cmd_obj));
-	if (ph2c == NULL) {
+	cmd = (struct cmd_obj *)rtw_zmalloc(sizeof(struct cmd_obj));
+	if (cmd == NULL) {
 		res = _FAIL;
 		goto exit;
 	}
 
-	psetstakey_para = (struct set_stakey_parm *)rtw_zmalloc(sizeof(struct set_stakey_parm));
-	if (psetstakey_para == NULL) {
-		rtw_mfree((u8 *) ph2c, sizeof(struct cmd_obj));
+	param = (struct set_stakey_parm *)rtw_zmalloc(sizeof(struct set_stakey_parm));
+	if (param == NULL) {
+		rtw_mfree((u8 *) cmd, sizeof(struct cmd_obj));
 		res = _FAIL;
 		goto exit;
 	}
 
-	init_h2fwcmd_w_parm_no_rsp(ph2c, psetstakey_para, _SetStaKey_CMD_);
-
+	init_h2fwcmd_w_parm_no_rsp(cmd, param, _SetStaKey_CMD_);
 
-	psetstakey_para->algorithm = (u8)psta->dot118021XPrivacy;
+	_rtw_memcpy(param->addr, addr, ETH_ALEN);
+	param->algorithm = alg;
+	param->keyid = keyid;
+	_rtw_memcpy(param->key, key, 16);
+	param->gk = gk;
 
-	_rtw_memcpy(psetstakey_para->addr, psta->cmn.mac_addr, ETH_ALEN);
-
-	_rtw_memcpy(psetstakey_para->key, &psta->dot118021x_UncstKey, 16);
-
-
-	res = rtw_enqueue_cmd(pcmdpriv, ph2c);
+	res = rtw_enqueue_cmd(cmdpriv, cmd);
 
 exit:
-
 	return res;
+}
 
+u8 rtw_ap_set_pairwise_key(_adapter *padapter, struct sta_info *psta)
+{
+	return rtw_ap_set_sta_key(padapter
+		, psta->cmn.mac_addr
+		, psta->dot118021XPrivacy
+		, psta->dot118021x_UncstKey.skey
+		, 0
+		, 0
+	);
 }
 
 static int rtw_ap_set_key(_adapter *padapter, u8 *key, u8 alg, int keyid, u8 set_tx)
@@ -2608,7 +2947,7 @@ static void associated_stainfo_update(_adapter *padapter, struct sta_info *psta,
 	struct mlme_priv *pmlmepriv = &(padapter->mlmepriv);
 
 	RTW_INFO("%s: "MAC_FMT", updated_type=0x%x\n", __func__, MAC_ARG(psta->cmn.mac_addr), sta_info_type);
-
+#ifdef CONFIG_80211N_HT
 	if (sta_info_type & STA_INFO_UPDATE_BW) {
 
 		if ((psta->flags & WLAN_STA_HT) && !psta->ht_20mhz_set) {
@@ -2621,7 +2960,7 @@ static void associated_stainfo_update(_adapter *padapter, struct sta_info *psta,
 			}
 		}
 	}
-
+#endif /* CONFIG_80211N_HT */
 	/*
 		if (sta_info_type & STA_INFO_UPDATE_RATE) {
 
@@ -2710,6 +3049,7 @@ static void update_bcn_htcap_ie(_adapter *padapter)
 
 static void update_bcn_htinfo_ie(_adapter *padapter)
 {
+#ifdef CONFIG_80211N_HT
 	/*
 	u8 beacon_updated = _FALSE;
 	u32 sta_info_update_type = STA_INFO_UPDATE_NONE;
@@ -2788,7 +3128,7 @@ static void update_bcn_htinfo_ie(_adapter *padapter)
 	}
 
 	/*associated_clients_update(padapter, beacon_updated, sta_info_update_type);*/
-
+#endif /* CONFIG_80211N_HT */
 }
 
 static void update_bcn_rsn_ie(_adapter *padapter)
@@ -2904,6 +3244,7 @@ void _update_beacon(_adapter *padapter, u8 ie_id, u8 *oui, u8 tx, const char *ta
 	_irqL irqL;
 	struct mlme_priv *pmlmepriv;
 	struct mlme_ext_priv *pmlmeext;
+	bool updated = 1; /* treat as upadated by default */
 
 	if (!padapter)
 		return;
@@ -2941,6 +3282,14 @@ void _update_beacon(_adapter *padapter, u8 ie_id, u8 *oui, u8 tx, const char *ta
 		update_bcn_ext_capab_ie(padapter);
 		break;
 
+#ifdef CONFIG_RTW_MESH
+	case WLAN_EID_MESH_CONFIG:
+		updated = rtw_mesh_update_bss_peering_status(padapter, &(pmlmeext->mlmext_info.network));
+		updated |= rtw_mesh_update_bss_formation_info(padapter, &(pmlmeext->mlmext_info.network));
+		updated |= rtw_mesh_update_bss_forwarding_state(padapter, &(pmlmeext->mlmext_info.network));
+		break;
+#endif
+
 	case _VENDOR_SPECIFIC_IE_:
 		update_bcn_vendor_spec_ie(padapter, oui);
 		break;
@@ -2950,13 +3299,14 @@ void _update_beacon(_adapter *padapter, u8 ie_id, u8 *oui, u8 tx, const char *ta
 		break;
 	}
 
-	pmlmepriv->update_bcn = _TRUE;
+	if (updated)
+		pmlmepriv->update_bcn = _TRUE;
 
 	_exit_critical_bh(&pmlmepriv->bcn_update_lock, &irqL);
 
 #ifndef CONFIG_INTERRUPT_BASED_TXBCN
-#if defined(CONFIG_USB_HCI) || defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI)
-	if (tx) {
+#if defined(CONFIG_USB_HCI) || defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI) || defined(CONFIG_PCI_BCN_POLLING)
+	if (tx && updated) {
 		/* send_beacon(padapter); */ /* send_beacon must execute on TSR level */
 		if (0)
 			RTW_INFO(FUNC_ADPT_FMT" ie_id:%u - %s\n", FUNC_ADPT_ARG(padapter), ie_id, tag);
@@ -3042,25 +3392,23 @@ void rtw_process_ht_action_smps(_adapter *padapter, u8 *ta, u8 ctrl_field)
 	if (psta == NULL)
 		return;
 
-	e_field = (ctrl_field & BIT(0)) ? 1 : 0;
-	m_field = (ctrl_field & BIT(1)) ? 1 : 0;
+	e_field = (ctrl_field & BIT(0)) ? 1 : 0; /*SM Power Save Enabled*/
+	m_field = (ctrl_field & BIT(1)) ? 1 : 0; /*SM Mode, 0:static SMPS, 1:dynamic SMPS*/
 
 	if (e_field) {
-
-		/* enable */
-		/* 0:static SMPS, 1:dynamic SMPS, 3:SMPS disabled, 2:reserved*/
-
-		if (m_field) /*mode*/
-			psta->htpriv.smps_cap = 1;
+		if (m_field) { /*mode*/
+			psta->htpriv.smps_cap = WLAN_HT_CAP_SM_PS_DYNAMIC;
+			RTW_ERR("Don't support dynamic SMPS\n");
+		}
 		else
-			psta->htpriv.smps_cap = 0;
+			psta->htpriv.smps_cap = WLAN_HT_CAP_SM_PS_STATIC;
 	} else {
 		/*disable*/
-		psta->htpriv.smps_cap = 3;
+		psta->htpriv.smps_cap = WLAN_HT_CAP_SM_PS_DISABLED;
 	}
 
-	rtw_dm_ra_mask_wk_cmd(padapter, (u8 *)psta);
-
+	if (psta->htpriv.smps_cap != WLAN_HT_CAP_SM_PS_DYNAMIC)
+		rtw_ssmps_wk_cmd(padapter, psta, e_field, 1);
 }
 
 /*
@@ -3289,66 +3637,80 @@ void bss_cap_update_on_sta_join(_adapter *padapter, struct sta_info *psta)
 	}
 
 #ifdef CONFIG_80211N_HT
-	if (psta->flags & WLAN_STA_HT) {
-		u16 ht_capab = le16_to_cpu(psta->htpriv.ht_cap.cap_info);
+	if(padapter->registrypriv.ht_enable &&
+		is_supported_ht(padapter->registrypriv.wireless_mode)) {
+		if (psta->flags & WLAN_STA_HT) {
+			u16 ht_capab = le16_to_cpu(psta->htpriv.ht_cap.cap_info);
 
-		RTW_INFO("HT: STA " MAC_FMT " HT Capabilities Info: 0x%04x\n",
-			MAC_ARG(psta->cmn.mac_addr), ht_capab);
+			RTW_INFO("HT: STA " MAC_FMT " HT Capabilities Info: 0x%04x\n",
+				MAC_ARG(psta->cmn.mac_addr), ht_capab);
 
-		if (psta->no_ht_set) {
-			psta->no_ht_set = 0;
-			pmlmepriv->num_sta_no_ht--;
-		}
+			if (psta->no_ht_set) {
+				psta->no_ht_set = 0;
+				pmlmepriv->num_sta_no_ht--;
+			}
 
-		if ((ht_capab & IEEE80211_HT_CAP_GRN_FLD) == 0) {
-			if (!psta->no_ht_gf_set) {
-				psta->no_ht_gf_set = 1;
-				pmlmepriv->num_sta_ht_no_gf++;
+			if ((ht_capab & IEEE80211_HT_CAP_GRN_FLD) == 0) {
+				if (!psta->no_ht_gf_set) {
+					psta->no_ht_gf_set = 1;
+					pmlmepriv->num_sta_ht_no_gf++;
+				}
+				RTW_INFO("%s STA " MAC_FMT " - no "
+					 "greenfield, num of non-gf stations %d\n",
+					 __FUNCTION__, MAC_ARG(psta->cmn.mac_addr),
+					 pmlmepriv->num_sta_ht_no_gf);
 			}
-			RTW_INFO("%s STA " MAC_FMT " - no "
-				 "greenfield, num of non-gf stations %d\n",
-				 __FUNCTION__, MAC_ARG(psta->cmn.mac_addr),
-				 pmlmepriv->num_sta_ht_no_gf);
-		}
 
-		if ((ht_capab & IEEE80211_HT_CAP_SUP_WIDTH) == 0) {
-			if (!psta->ht_20mhz_set) {
-				psta->ht_20mhz_set = 1;
-				pmlmepriv->num_sta_ht_20mhz++;
+			if ((ht_capab & IEEE80211_HT_CAP_SUP_WIDTH) == 0) {
+				if (!psta->ht_20mhz_set) {
+					psta->ht_20mhz_set = 1;
+					pmlmepriv->num_sta_ht_20mhz++;
+				}
+				RTW_INFO("%s STA " MAC_FMT " - 20 MHz HT, "
+					 "num of 20MHz HT STAs %d\n",
+					 __FUNCTION__, MAC_ARG(psta->cmn.mac_addr),
+					 pmlmepriv->num_sta_ht_20mhz);
 			}
-			RTW_INFO("%s STA " MAC_FMT " - 20 MHz HT, "
-				 "num of 20MHz HT STAs %d\n",
-				 __FUNCTION__, MAC_ARG(psta->cmn.mac_addr),
-				 pmlmepriv->num_sta_ht_20mhz);
-		}
 
-		if (((ht_capab & RTW_IEEE80211_HT_CAP_40MHZ_INTOLERANT) != 0) &&
-			(psta->ht_40mhz_intolerant == 0)) {
-			psta->ht_40mhz_intolerant = 1;
-			pmlmepriv->num_sta_40mhz_intolerant++;
-			RTW_INFO("%s STA " MAC_FMT " - 40MHZ_INTOLERANT, ",
-				   __FUNCTION__, MAC_ARG(psta->cmn.mac_addr));
-		}
+			if (((ht_capab & RTW_IEEE80211_HT_CAP_40MHZ_INTOLERANT) != 0) &&
+				(psta->ht_40mhz_intolerant == 0)) {
+				psta->ht_40mhz_intolerant = 1;
+				pmlmepriv->num_sta_40mhz_intolerant++;
+				RTW_INFO("%s STA " MAC_FMT " - 40MHZ_INTOLERANT, ",
+					   __FUNCTION__, MAC_ARG(psta->cmn.mac_addr));
+			}
 
-	} else {
-		if (!psta->no_ht_set) {
-			psta->no_ht_set = 1;
-			pmlmepriv->num_sta_no_ht++;
+		} else {
+			if (!psta->no_ht_set) {
+				psta->no_ht_set = 1;
+				pmlmepriv->num_sta_no_ht++;
+			}
+			if (pmlmepriv->htpriv.ht_option == _TRUE) {
+				RTW_INFO("%s STA " MAC_FMT
+					 " - no HT, num of non-HT stations %d\n",
+					 __FUNCTION__, MAC_ARG(psta->cmn.mac_addr),
+					 pmlmepriv->num_sta_no_ht);
+			}
 		}
-		if (pmlmepriv->htpriv.ht_option == _TRUE) {
-			RTW_INFO("%s STA " MAC_FMT
-				 " - no HT, num of non-HT stations %d\n",
-				 __FUNCTION__, MAC_ARG(psta->cmn.mac_addr),
-				 pmlmepriv->num_sta_no_ht);
+
+		if (rtw_ht_operation_update(padapter) > 0) {
+			update_beacon(padapter, _HT_CAPABILITY_IE_, NULL, _FALSE);
+			update_beacon(padapter, _HT_ADD_INFO_IE_, NULL, _FALSE);
+			beacon_updated = _TRUE;
 		}
 	}
+#endif /* CONFIG_80211N_HT */
 
-	if (rtw_ht_operation_update(padapter) > 0) {
-		update_beacon(padapter, _HT_CAPABILITY_IE_, NULL, _FALSE);
-		update_beacon(padapter, _HT_ADD_INFO_IE_, NULL, _FALSE);
+#ifdef CONFIG_RTW_MESH
+	if (MLME_IS_MESH(padapter)) {
+		struct sta_priv *pstapriv = &padapter->stapriv;
+
+		update_beacon(padapter, WLAN_EID_MESH_CONFIG, NULL, _FALSE);
+		if (pstapriv->asoc_list_cnt == 1)
+			_set_timer(&padapter->mesh_atlm_param_req_timer, 0);
 		beacon_updated = _TRUE;
 	}
-#endif /* CONFIG_80211N_HT */
+#endif
 
 	if (beacon_updated)
 		update_beacon(padapter, 0xFF, NULL, _TRUE);
@@ -3431,6 +3793,15 @@ u8 bss_cap_update_on_sta_leave(_adapter *padapter, struct sta_info *psta)
 	}
 #endif /* CONFIG_80211N_HT */
 
+#ifdef CONFIG_RTW_MESH
+	if (MLME_IS_MESH(padapter)) {
+		update_beacon(padapter, WLAN_EID_MESH_CONFIG, NULL, _FALSE);
+		if (pstapriv->asoc_list_cnt == 0)
+			_cancel_timer_ex(&padapter->mesh_atlm_param_req_timer);
+		beacon_updated = _TRUE;
+	}
+#endif
+
 	if (beacon_updated == _TRUE)
 		update_beacon(padapter, 0xFF, NULL, _TRUE);
 
@@ -3449,9 +3820,6 @@ u8 ap_free_sta(_adapter *padapter, struct sta_info *psta, bool active, u16 reaso
 {
 	_irqL irqL;
 	u8 beacon_updated = _FALSE;
-	struct mlme_priv *pmlmepriv = &(padapter->mlmepriv);
-	struct mlme_ext_priv	*pmlmeext = &(padapter->mlmeextpriv);
-	struct sta_priv *pstapriv = &padapter->stapriv;
 
 	if (!psta)
 		return beacon_updated;
@@ -3466,25 +3834,33 @@ u8 ap_free_sta(_adapter *padapter, struct sta_info *psta, bool active, u16 reaso
 
 #endif /* CONFIG_80211N_HT */
 
-		issue_deauth(padapter, psta->cmn.mac_addr, reason);
+		if (!MLME_IS_MESH(padapter))
+			issue_deauth(padapter, psta->cmn.mac_addr, reason);
 	}
 
+#ifdef CONFIG_RTW_MESH
+	if (MLME_IS_MESH(padapter))
+		rtw_mesh_path_flush_by_nexthop(psta);
+#endif
+
 #ifdef CONFIG_BEAMFORMING
 	beamforming_wk_cmd(padapter, BEAMFORMING_CTRL_LEAVE, psta->cmn.mac_addr, ETH_ALEN, 1);
 #endif
 
+#ifdef CONFIG_80211N_HT
 	psta->htpriv.agg_enable_bitmap = 0x0;/* reset */
 	psta->htpriv.candidate_tid_bitmap = 0x0;/* reset */
+#endif
 
 	/* clear cam entry / key */
 	rtw_clearstakey_cmd(padapter, psta, enqueue);
 
 
 	_enter_critical_bh(&psta->lock, &irqL);
-	psta->state &= ~_FW_LINKED;
+	psta->state &= ~(_FW_LINKED | WIFI_UNDER_KEY_HANDSHAKE);
 	_exit_critical_bh(&psta->lock, &irqL);
 
-	{
+	if (!MLME_IS_MESH(padapter)) {
 #ifdef CONFIG_IOCTL_CFG80211
 		#ifdef COMPAT_KERNEL_RELEASE
 		rtw_cfg80211_indicate_sta_disassoc(padapter, psta->cmn.mac_addr, reason);
@@ -3498,14 +3874,9 @@ u8 ap_free_sta(_adapter *padapter, struct sta_info *psta, bool active, u16 reaso
 #endif
 	}
 
-	report_del_sta_event(padapter, psta->cmn.mac_addr, reason, enqueue, _FALSE);
-
 	beacon_updated = bss_cap_update_on_sta_leave(padapter, psta);
 
-	/* _enter_critical_bh(&(pstapriv->sta_hash_lock), &irqL);					 */
-	rtw_free_stainfo(padapter, psta);
-	/* _exit_critical_bh(&(pstapriv->sta_hash_lock), &irqL); */
-
+	report_del_sta_event(padapter, psta->cmn.mac_addr, reason, enqueue, _FALSE);
 
 	return beacon_updated;
 
@@ -3554,8 +3925,6 @@ int rtw_sta_flush(_adapter *padapter, bool enqueue)
 	int ret = 0;
 	struct sta_info *psta = NULL;
 	struct sta_priv *pstapriv = &padapter->stapriv;
-	struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv;
-	struct mlme_ext_info	*pmlmeinfo = &(pmlmeext->mlmext_info);
 	u8 bc_addr[ETH_ALEN] = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff};
 	u8 flush_num = 0;
 	char flush_list[NUM_STA];
@@ -3578,6 +3947,7 @@ int rtw_sta_flush(_adapter *padapter, bool enqueue)
 
 		rtw_list_delete(&psta->asoc_list);
 		pstapriv->asoc_list_cnt--;
+		STA_SET_MESH_PLINK(psta, NULL);
 
 		stainfo_offset = rtw_stainfo_offset(pstapriv, psta);
 		if (stainfo_offset_valid(stainfo_offset))
@@ -3589,11 +3959,20 @@ int rtw_sta_flush(_adapter *padapter, bool enqueue)
 
 	/* call ap_free_sta() for each sta picked */
 	for (i = 0; i < flush_num; i++) {
+		u8 sta_addr[ETH_ALEN];
+
 		psta = rtw_get_stainfo_by_offset(pstapriv, flush_list[i]);
+		_rtw_memcpy(sta_addr, psta->cmn.mac_addr, ETH_ALEN);
+
 		ap_free_sta(padapter, psta, _TRUE, WLAN_REASON_DEAUTH_LEAVING, enqueue);
+		#ifdef CONFIG_RTW_MESH
+		if (MLME_IS_MESH(padapter))
+			rtw_mesh_expire_peer(padapter, sta_addr);
+		#endif
 	}
 
-	issue_deauth(padapter, bc_addr, WLAN_REASON_DEAUTH_LEAVING);
+	if (!MLME_IS_MESH(padapter))
+		issue_deauth(padapter, bc_addr, WLAN_REASON_DEAUTH_LEAVING);
 
 	associated_clients_update(padapter, _TRUE, STA_INFO_UPDATE_ALL);
 
@@ -3654,9 +4033,7 @@ void ap_sta_info_defer_update(_adapter *padapter, struct sta_info *psta)
 /* restore hw setting from sw data structures */
 void rtw_ap_restore_network(_adapter *padapter)
 {
-	struct mlme_priv *mlmepriv = &padapter->mlmepriv;
 	struct mlme_ext_priv	*pmlmeext = &padapter->mlmeextpriv;
-	struct mlme_ext_info	*pmlmeinfo = &(pmlmeext->mlmext_info);
 	struct sta_priv *pstapriv = &padapter->stapriv;
 	struct sta_info *psta;
 	struct security_priv *psecuritypriv = &(padapter->securitypriv);
@@ -3666,7 +4043,10 @@ void rtw_ap_restore_network(_adapter *padapter)
 	char chk_alive_list[NUM_STA];
 	int i;
 
-	rtw_setopmode_cmd(padapter, Ndis802_11APMode, RTW_CMDF_DIRECTLY);
+	rtw_setopmode_cmd(padapter
+		, MLME_IS_AP(padapter) ? Ndis802_11APMode : Ndis802_11_mesh
+		, RTW_CMDF_DIRECTLY
+	);
 
 	set_channel_bwmode(padapter, pmlmeext->cur_channel, pmlmeext->cur_ch_offset, pmlmeext->cur_bwmode);
 
@@ -3722,7 +4102,9 @@ void start_ap_mode(_adapter *padapter)
 	struct sta_priv *pstapriv = &padapter->stapriv;
 	struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv;
 	struct mlme_ext_info	*pmlmeinfo = &(pmlmeext->mlmext_info);
+#ifdef CONFIG_CONCURRENT_MODE
 	struct security_priv *psecuritypriv = &padapter->securitypriv;
+#endif
 
 	pmlmepriv->update_bcn = _FALSE;
 
@@ -3766,10 +4148,6 @@ void start_ap_mode(_adapter *padapter)
 	for (i = 0 ;  i < pstapriv->max_aid; i++)
 		pstapriv->sta_aid[i] = NULL;
 
-#if CONFIG_RTW_MACADDR_ACL
-	rtw_macaddr_acl_init(padapter);
-#endif
-
 	psta = rtw_get_bcmc_stainfo(padapter);
 	/*_enter_critical_bh(&(pstapriv->sta_hash_lock), &irqL);*/
 	if (psta)
@@ -3805,11 +4183,13 @@ void rtw_ap_bcmc_sta_flush(_adapter *padapter)
 void stop_ap_mode(_adapter *padapter)
 {
 	u8 self_action = MLME_ACTION_UNKNOWN;
-	_irqL irqL;
 	struct sta_info *psta = NULL;
 	struct mlme_priv *pmlmepriv = &(padapter->mlmepriv);
 	struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv;
+#ifdef CONFIG_SUPPORT_MULTI_BCN
 	struct dvobj_priv *pdvobj = padapter->dvobj;
+	_irqL irqL;
+#endif
 
 	RTW_INFO("%s -"ADPT_FMT"\n", __func__, ADPT_ARG(padapter));
 
@@ -3831,14 +4211,14 @@ void stop_ap_mode(_adapter *padapter)
 	padapter->securitypriv.ndisencryptstatus = Ndis802_11WEPDisabled;
 
 #ifdef CONFIG_DFS_MASTER
-	rtw_dfs_master_status_apply(padapter, self_action);
+	rtw_dfs_rd_en_decision(padapter, self_action, 0);
 #endif
 
 	/* free scan queue */
 	rtw_free_network_queue(padapter, _TRUE);
 
 #if CONFIG_RTW_MACADDR_ACL
-	rtw_macaddr_acl_deinit(padapter);
+	rtw_macaddr_acl_clear(padapter, RTW_ACL_PERIOD_BSS);
 #endif
 
 	rtw_sta_flush(padapter, _TRUE);
@@ -3857,22 +4237,35 @@ void stop_ap_mode(_adapter *padapter)
 
 	rtw_free_mlme_priv_ie_data(pmlmepriv);
 
-#ifdef CONFIG_SWTIMER_BASED_TXBCN
+#ifdef CONFIG_SUPPORT_MULTI_BCN
 	if (pmlmeext->bstart_bss == _TRUE) {
+		#ifdef CONFIG_FW_HANDLE_TXBCN
+		u8 free_apid = CONFIG_LIMITED_AP_NUM;
+		#endif
+
 		_enter_critical_bh(&pdvobj->ap_if_q.lock, &irqL);
 		pdvobj->nr_ap_if--;
 		if (pdvobj->nr_ap_if > 0)
 			pdvobj->inter_bcn_space = DEFAULT_BCN_INTERVAL / pdvobj->nr_ap_if;
 		else
 			pdvobj->inter_bcn_space = DEFAULT_BCN_INTERVAL;
-
+		#ifdef CONFIG_FW_HANDLE_TXBCN
+		rtw_ap_release_vapid(pdvobj, padapter->vap_id);
+		free_apid = padapter->vap_id;
+		padapter->vap_id = CONFIG_LIMITED_AP_NUM;
+		#endif
 		rtw_list_delete(&padapter->list);
 		_exit_critical_bh(&pdvobj->ap_if_q.lock, &irqL);
+		#ifdef CONFIG_FW_HANDLE_TXBCN
+		rtw_ap_mbid_bcn_dis(padapter, free_apid);
+		#endif
 
+		#ifdef CONFIG_SWTIMER_BASED_TXBCN
 		rtw_hal_set_hwreg(padapter, HW_VAR_BEACON_INTERVAL, (u8 *)(&pdvobj->inter_bcn_space));
 
 		if (pdvobj->nr_ap_if == 0)
 			_cancel_timer_ex(&pdvobj->txbcn_timer);
+		#endif
 	}
 #endif
 
@@ -3880,6 +4273,10 @@ void stop_ap_mode(_adapter *padapter)
 
 	rtw_hal_rcr_set_chk_bssid(padapter, self_action);
 
+#ifdef CONFIG_HW_P0_TSF_SYNC
+	correct_TSF(padapter, self_action);
+#endif
+
 #ifdef CONFIG_BT_COEXIST
 	rtw_btcoex_MediaStatusNotify(padapter, 0); /* disconnect */
 #endif
@@ -4012,244 +4409,527 @@ void rtw_ap_update_bss_chbw(_adapter *adapter, WLAN_BSSID_EX *bss, u8 ch, u8 bw,
 #endif /* CONFIG_80211N_HT */
 }
 
-bool rtw_ap_chbw_decision(_adapter *adapter, s16 req_ch, s8 req_bw, s8 req_offset
-			  , u8 *ch, u8 *bw, u8 *offset, u8 *chbw_allow)
+static u8 rtw_ap_update_chbw_by_ifbmp(struct dvobj_priv *dvobj, u8 ifbmp
+	, u8 cur_ie_ch[], u8 cur_ie_bw[], u8 cur_ie_offset[]
+	, u8 dec_ch[], u8 dec_bw[], u8 dec_offset[]
+	, const char *caller)
 {
-	u8 cur_ie_ch, cur_ie_bw, cur_ie_offset;
-	u8 dec_ch, dec_bw, dec_offset;
-	u8 u_ch = 0, u_offset, u_bw;
-	bool changed = _FALSE;
-	struct mlme_ext_priv *mlmeext = &(adapter->mlmeextpriv);
-	WLAN_BSSID_EX *network = &(mlmeext->mlmext_info.network);
-	struct mi_state mstate;
-	bool set_u_ch = _FALSE, set_dec_ch = _FALSE;
-
-	rtw_ies_get_chbw(BSS_EX_TLV_IES(network), BSS_EX_TLV_IES_LEN(network)
-		, &cur_ie_ch, &cur_ie_bw, &cur_ie_offset);
+	_adapter *iface;
+	struct mlme_ext_priv *mlmeext;
+	WLAN_BSSID_EX *network;
+	u8 ifbmp_ch_changed = 0;
+	int i;
 
-#ifdef CONFIG_MCC_MODE
-	if (MCC_EN(adapter)) {
-		if (rtw_hal_check_mcc_status(adapter, MCC_STATUS_DOING_MCC)) {
-			/* check channel settings are the same */
-			if (cur_ie_ch == mlmeext->cur_channel
-				&& cur_ie_bw == mlmeext->cur_bwmode
-					&& cur_ie_offset == mlmeext->cur_ch_offset) {
+	for (i = 0; i < dvobj->iface_nums; i++) {
+		if (!(ifbmp & BIT(i)) || !dvobj->padapters)
+			continue;
 
+		iface = dvobj->padapters[i];
+		mlmeext = &(iface->mlmeextpriv);
 
-					RTW_INFO(FUNC_ADPT_FMT"req ch settings are the same as current ch setting, go to exit\n"
-						, FUNC_ADPT_ARG(adapter));
+		if (MLME_IS_ASOC(iface)) {
+			RTW_INFO(FUNC_ADPT_FMT" %u,%u,%u => %u,%u,%u%s\n", caller, ADPT_ARG(iface)
+				, mlmeext->cur_channel, mlmeext->cur_bwmode, mlmeext->cur_ch_offset
+				, dec_ch[i], dec_bw[i], dec_offset[i]
+				, MLME_IS_OPCH_SW(iface) ? " OPCH_SW" : "");
+		} else {
+			RTW_INFO(FUNC_ADPT_FMT" %u,%u,%u => %u,%u,%u%s\n", caller, ADPT_ARG(iface)
+				, cur_ie_ch[i], cur_ie_bw[i], cur_ie_offset[i]
+				, dec_ch[i], dec_bw[i], dec_offset[i]
+				, MLME_IS_OPCH_SW(iface) ? " OPCH_SW" : "");
+		}
+	}
 
-					*chbw_allow = _FALSE;
-					goto exit;
-			} else {
-					RTW_INFO(FUNC_ADPT_FMT"request channel settings are not the same as current channel setting(%d,%d,%d,%d,%d,%d), restart MCC\n"
-						, FUNC_ADPT_ARG(adapter)
-						, cur_ie_ch, cur_ie_bw, cur_ie_bw
-						, mlmeext->cur_channel, mlmeext->cur_bwmode, mlmeext->cur_ch_offset);
+	for (i = 0; i < dvobj->iface_nums; i++) {
+		if (!(ifbmp & BIT(i)) || !dvobj->padapters)
+			continue;
 
-				rtw_hal_set_mcc_setting_disconnect(adapter);
+		iface = dvobj->padapters[i];
+		mlmeext = &(iface->mlmeextpriv);
+		network = &(mlmeext->mlmext_info.network);
+
+		/* ch setting differs from mlmeext.network IE */
+		if (cur_ie_ch[i] != dec_ch[i]
+			|| cur_ie_bw[i] != dec_bw[i]
+			|| cur_ie_offset[i] != dec_offset[i])
+			ifbmp_ch_changed |= BIT(i);
+
+		/* ch setting differs from existing one */
+		if (MLME_IS_ASOC(iface)
+			&& (mlmeext->cur_channel != dec_ch[i]
+				|| mlmeext->cur_bwmode != dec_bw[i]
+				|| mlmeext->cur_ch_offset != dec_offset[i])
+		) {
+			if (rtw_linked_check(iface) == _TRUE) {
+				#ifdef CONFIG_SPCT_CH_SWITCH
+				if (1)
+					rtw_ap_inform_ch_switch(iface, dec_ch[i], dec_offset[i]);
+				else
+				#endif
+					rtw_sta_flush(iface, _FALSE);
 			}
-		}	
+		}
+
+		mlmeext->cur_channel = dec_ch[i];
+		mlmeext->cur_bwmode = dec_bw[i];
+		mlmeext->cur_ch_offset = dec_offset[i];
+
+		rtw_ap_update_bss_chbw(iface, network, dec_ch[i], dec_bw[i], dec_offset[i]);
 	}
-#endif /* CONFIG_MCC_MODE */
 
-	/* use chbw of cur_ie updated with specifying req as temporary decision */
-	dec_ch = (req_ch <= 0) ? cur_ie_ch : req_ch;
-	dec_bw = (req_bw < 0) ? cur_ie_bw : req_bw;
-	dec_offset = (req_offset < 0) ? cur_ie_offset : req_offset;
+	return ifbmp_ch_changed;
+}
 
-	rtw_mi_status_no_self(adapter, &mstate);
-	RTW_INFO(FUNC_ADPT_FMT" ld_sta_num:%u, lg_sta_num%u, ap_num:%u, mesh_num:%u\n"
-		, FUNC_ADPT_ARG(adapter), MSTATE_STA_LD_NUM(&mstate), MSTATE_STA_LG_NUM(&mstate)
-		, MSTATE_AP_NUM(&mstate), MSTATE_MESH_NUM(&mstate));
+static u8 rtw_ap_ch_specific_chk(_adapter *adapter, u8 ch, u8 *bw, u8 *offset, const char *caller)
+{
+	struct dvobj_priv *dvobj = adapter_to_dvobj(adapter);
+	RT_CHANNEL_INFO *chset = adapter_to_chset(adapter);
+	u8 ret = _SUCCESS;
 
-	if (MSTATE_STA_LD_NUM(&mstate) || MSTATE_AP_NUM(&mstate) || MSTATE_MESH_NUM(&mstate)) {
-		/* has linked STA or AP/Mesh mode, follow */
+	if (rtw_chset_search_ch(chset, ch) < 0) {
+		RTW_WARN("%s ch:%u doesn't fit in chplan\n", caller, ch);
+		ret = _FAIL;
+		goto exit;
+	}
 
-		rtw_warn_on(!rtw_mi_get_ch_setting_union_no_self(adapter, &u_ch, &u_bw, &u_offset));
+	rtw_adjust_chbw(adapter, ch, bw, offset);
 
-		RTW_INFO(FUNC_ADPT_FMT" union no self: %u,%u,%u\n", FUNC_ADPT_ARG(adapter), u_ch, u_bw, u_offset);
-		RTW_INFO(FUNC_ADPT_FMT" req: %d,%d,%d\n", FUNC_ADPT_ARG(adapter), req_ch, req_bw, req_offset);
+	if (!rtw_get_offset_by_chbw(ch, *bw, offset)) {
+		RTW_WARN("%s %u,%u has no valid offset\n", caller, ch, *bw);
+		ret = _FAIL;
+		goto exit;
+	}
 
-		rtw_adjust_chbw(adapter, u_ch, &dec_bw, &dec_offset);
-#ifdef CONFIG_MCC_MODE
-		if (MCC_EN(adapter)) {
-			if (!rtw_is_chbw_grouped(u_ch, u_bw, u_offset, dec_ch, dec_bw, dec_offset)) {
-				mlmeext->cur_channel = *ch = dec_ch = cur_ie_ch;
-				mlmeext->cur_bwmode = *bw = dec_bw = cur_ie_bw;
-				mlmeext->cur_ch_offset = *offset = dec_offset = cur_ie_offset;
-				/* channel bw offset can not be allowed, need MCC */
-				*chbw_allow = _FALSE;
-				RTW_INFO(FUNC_ADPT_FMT" enable mcc: %u,%u,%u\n", FUNC_ADPT_ARG(adapter)
-					 , *ch, *bw, *offset);
-				goto exit;
-			} else
-				/* channel bw offset can be allowed, not need MCC */
-				*chbw_allow = _TRUE;
+	while (!rtw_chset_is_chbw_valid(chset, ch, *bw, *offset)
+		|| (rtw_odm_dfs_domain_unknown(dvobj) && rtw_is_dfs_chbw(ch, *bw, *offset))
+	) {
+		if (*bw > CHANNEL_WIDTH_20)
+			(*bw)--;
+		if (*bw == CHANNEL_WIDTH_20) {
+			*offset = HAL_PRIME_CHNL_OFFSET_DONT_CARE;
+			break;
 		}
-#endif /* CONFIG_MCC_MODE */
-		rtw_sync_chbw(&dec_ch, &dec_bw, &dec_offset
-			      , &u_ch, &u_bw, &u_offset);
+	}
 
-		rtw_ap_update_bss_chbw(adapter, network, dec_ch, dec_bw, dec_offset);
+	if (rtw_odm_dfs_domain_unknown(dvobj) && rtw_is_dfs_chbw(ch, *bw, *offset)) {
+		RTW_WARN("%s DFS channel %u can't be used\n", caller, ch);
+		ret = _FAIL;
+		goto exit;
+	}
 
-		set_u_ch = _TRUE;
-	} else if (MSTATE_STA_LG_NUM(&mstate)) {
-		/* has linking STA */
+exit:
+	return ret;
+}
 
-		rtw_warn_on(!rtw_mi_get_ch_setting_union_no_self(adapter, &u_ch, &u_bw, &u_offset));
+static bool rtw_ap_choose_chbw(_adapter *adapter, u8 sel_ch, u8 max_bw, u8 cur_ch
+	, u8 *ch, u8 *bw, u8 *offset, u8 mesh_only, const char *caller)
+{
+	struct dvobj_priv *dvobj = adapter_to_dvobj(adapter);
+	struct rf_ctl_t *rfctl = adapter_to_rfctl(adapter);
+	bool ch_avail = _FALSE;
 
-		RTW_INFO(FUNC_ADPT_FMT" union no self: %u,%u,%u\n", FUNC_ADPT_ARG(adapter), u_ch, u_bw, u_offset);
-		RTW_INFO(FUNC_ADPT_FMT" req: %d,%d,%d\n", FUNC_ADPT_ARG(adapter), req_ch, req_bw, req_offset);
+#if defined(CONFIG_DFS_MASTER)
+	if (!rtw_odm_dfs_domain_unknown(dvobj)) {
+		if (rfctl->radar_detected
+			&& rfctl->dbg_dfs_choose_dfs_ch_first
+		) {
+			ch_avail = rtw_choose_shortest_waiting_ch(rfctl, sel_ch, max_bw
+						, ch, bw, offset
+						, RTW_CHF_2G | RTW_CHF_NON_DFS
+						, cur_ch
+						, rfctl->ch_sel_same_band_prefer, mesh_only);
+			if (ch_avail == _TRUE) {
+				RTW_INFO("%s choose 5G DFS channel for debug\n", caller);
+				goto exit;
+			}
+		}
 
-		rtw_adjust_chbw(adapter, dec_ch, &dec_bw, &dec_offset);
+		if (rfctl->radar_detected
+			&& rfctl->dfs_ch_sel_d_flags
+		) {
+			ch_avail = rtw_choose_shortest_waiting_ch(rfctl, sel_ch, max_bw
+						, ch, bw, offset
+						, rfctl->dfs_ch_sel_d_flags
+						, cur_ch
+						, rfctl->ch_sel_same_band_prefer, mesh_only);
+			if (ch_avail == _TRUE) {
+				RTW_INFO("%s choose with dfs_ch_sel_d_flags:0x%02x for debug\n"
+					, caller, rfctl->dfs_ch_sel_d_flags);
+				goto exit;
+			}
+		}
+
+		ch_avail = rtw_choose_shortest_waiting_ch(rfctl, sel_ch, max_bw
+					, ch, bw, offset
+					, 0
+					, cur_ch
+					, rfctl->ch_sel_same_band_prefer, mesh_only);
+	} else
+#endif /* defined(CONFIG_DFS_MASTER) */
+	{
+		ch_avail = rtw_choose_shortest_waiting_ch(rfctl, sel_ch, max_bw
+					, ch, bw, offset
+					, RTW_CHF_DFS
+					, cur_ch
+					, rfctl->ch_sel_same_band_prefer, mesh_only);
+	}
+
+exit:
+	if (ch_avail == _FALSE)
+		RTW_WARN("%s no available channel\n", caller);
 
-		if (rtw_is_chbw_grouped(u_ch, u_bw, u_offset, dec_ch, dec_bw, dec_offset)) {
+	return ch_avail;
+}
 
-			rtw_sync_chbw(&dec_ch, &dec_bw, &dec_offset
-				      , &u_ch, &u_bw, &u_offset);
+u8 rtw_ap_chbw_decision(_adapter *adapter, u8 ifbmp, u8 excl_ifbmp
+	, s16 req_ch, s8 req_bw, s8 req_offset
+	, u8 *ch, u8 *bw, u8 *offset, u8 *chbw_allow)
+{
+	struct dvobj_priv *dvobj = adapter_to_dvobj(adapter);
+	RT_CHANNEL_INFO *chset = adapter_to_chset(adapter);
+	struct rf_ctl_t *rfctl = adapter_to_rfctl(adapter);
+	bool ch_avail = _FALSE;
+	u8 cur_ie_ch[CONFIG_IFACE_NUMBER] = {0};
+	u8 cur_ie_bw[CONFIG_IFACE_NUMBER] = {0};
+	u8 cur_ie_offset[CONFIG_IFACE_NUMBER] = {0};
+	u8 dec_ch[CONFIG_IFACE_NUMBER] = {0};
+	u8 dec_bw[CONFIG_IFACE_NUMBER] = {0};
+	u8 dec_offset[CONFIG_IFACE_NUMBER] = {0};
+	u8 u_ch = 0, u_bw = 0, u_offset = 0;
+	struct mlme_ext_priv *mlmeext;
+	WLAN_BSSID_EX *network;
+	struct mi_state mstate;
+	struct mi_state mstate_others;
+	bool set_u_ch = _FALSE;
+	u8 ifbmp_others = 0xFF & ~ifbmp & ~excl_ifbmp;
+	u8 ifbmp_ch_changed = 0;
+	bool ifbmp_all_mesh = 0;
+	_adapter *iface;
+	int i;
 
-			rtw_ap_update_bss_chbw(adapter, network, dec_ch, dec_bw, dec_offset);
+#ifdef CONFIG_RTW_MESH
+	for (i = 0; i < dvobj->iface_nums; i++)
+		if ((ifbmp & BIT(i)) && dvobj->padapters)
+			if (!MLME_IS_MESH(dvobj->padapters[i]))
+				break;
+	ifbmp_all_mesh = i >= dvobj->iface_nums ? 1 : 0;
+#endif
 
-			set_u_ch = _TRUE;
+	RTW_INFO("%s ifbmp:0x%02x excl_ifbmp:0x%02x req:%d,%d,%d\n", __func__
+		, ifbmp, excl_ifbmp, req_ch, req_bw, req_offset);
+	rtw_mi_status_by_ifbmp(dvobj, ifbmp, &mstate);
+	rtw_mi_status_by_ifbmp(dvobj, ifbmp_others, &mstate_others);
+	RTW_INFO("%s others ld_sta_num:%u, lg_sta_num:%u, ap_num:%u, mesh_num:%u\n"
+		, __func__, MSTATE_STA_LD_NUM(&mstate_others), MSTATE_STA_LG_NUM(&mstate_others)
+		, MSTATE_AP_NUM(&mstate_others), MSTATE_MESH_NUM(&mstate_others));
 
-			/* channel bw offset can be allowed, not need MCC */
-			*chbw_allow = _TRUE;
+	for (i = 0; i < dvobj->iface_nums; i++) {
+		if (!(ifbmp & BIT(i)) || !dvobj->padapters[i])
+			continue;
+		iface = dvobj->padapters[i];
+		mlmeext = &(iface->mlmeextpriv);
+		network = &(mlmeext->mlmext_info.network);
+
+		/* get current IE channel settings */
+		rtw_ies_get_chbw(BSS_EX_TLV_IES(network), BSS_EX_TLV_IES_LEN(network)
+			, &cur_ie_ch[i], &cur_ie_bw[i], &cur_ie_offset[i], 1, 1);
+
+		/* prepare temporary channel setting decision */
+		if (req_ch == 0) {
+			/* request comes from upper layer, use cur_ie values */
+			dec_ch[i] = cur_ie_ch[i];
+			dec_bw[i] = cur_ie_bw[i];
+			dec_offset[i] = cur_ie_offset[i];
 		} else {
+			/* use chbw of cur_ie updated with specifying req as temporary decision */
+			dec_ch[i] = (req_ch <= REQ_CH_NONE) ? cur_ie_ch[i] : req_ch;
+			if (req_bw <= REQ_BW_NONE) {
+				if (req_bw == REQ_BW_ORI)
+					dec_bw[i] = iface->mlmepriv.ori_bw;
+				else
+					dec_bw[i] = cur_ie_bw[i];
+			} else
+				dec_bw[i] = req_bw;
+			dec_offset[i] = (req_offset <= REQ_OFFSET_NONE) ? cur_ie_offset[i] : req_offset;
+		}
+	}
+
+	if (MSTATE_STA_LD_NUM(&mstate_others) || MSTATE_STA_LG_NUM(&mstate_others)
+		|| MSTATE_AP_NUM(&mstate_others) || MSTATE_MESH_NUM(&mstate_others)
+	) {
+		/* has linked/linking STA or has AP/Mesh mode */
+		rtw_warn_on(!rtw_mi_get_ch_setting_union_by_ifbmp(dvobj, ifbmp_others, &u_ch, &u_bw, &u_offset));
+		RTW_INFO("%s others union:%u,%u,%u\n", __func__, u_ch, u_bw, u_offset);
+	}
+
 #ifdef CONFIG_MCC_MODE
-			if (MCC_EN(adapter)) {
-				mlmeext->cur_channel = *ch = dec_ch;
-				mlmeext->cur_bwmode = *bw = dec_bw;
-				mlmeext->cur_ch_offset = *offset = dec_offset;
+	if (MCC_EN(adapter) && req_ch == 0) {
+		if (rtw_hal_check_mcc_status(adapter, MCC_STATUS_DOING_MCC)) {
+			u8 if_id = adapter->iface_id;
+
+			mlmeext = &(adapter->mlmeextpriv);
+
+			/* check channel settings are the same */
+			if (cur_ie_ch[if_id] == mlmeext->cur_channel
+				&& cur_ie_bw[if_id] == mlmeext->cur_bwmode
+				&& cur_ie_offset[if_id] == mlmeext->cur_ch_offset) {
+
+				RTW_INFO(FUNC_ADPT_FMT"req ch settings are the same as current ch setting, go to exit\n"
+					, FUNC_ADPT_ARG(adapter));
 
-				/* channel bw offset can not be allowed, need MCC */
 				*chbw_allow = _FALSE;
-				RTW_INFO(FUNC_ADPT_FMT" enable mcc: %u,%u,%u\n", FUNC_ADPT_ARG(adapter)
-					 , *ch, *bw, *offset);
 				goto exit;
+			} else {
+				RTW_INFO(FUNC_ADPT_FMT"request channel settings are not the same as current channel setting(%d,%d,%d,%d,%d,%d), restart MCC\n"
+					, FUNC_ADPT_ARG(adapter)
+					, cur_ie_ch[if_id], cur_ie_bw[if_id], cur_ie_offset[if_id]
+					, mlmeext->cur_channel, mlmeext->cur_bwmode, mlmeext->cur_ch_offset);
+
+				rtw_hal_set_mcc_setting_disconnect(adapter);
 			}
+		}	
+	}
 #endif /* CONFIG_MCC_MODE */
-			/* set this for possible ch change when join down*/
-			set_fwstate(&adapter->mlmepriv, WIFI_OP_CH_SWITCHING);
+
+	if (MSTATE_STA_LG_NUM(&mstate_others) && !MSTATE_STA_LD_NUM(&mstate_others)) {
+		/* has linking STA but no linked STA */
+
+		for (i = 0; i < dvobj->iface_nums; i++) {
+			if (!(ifbmp & BIT(i)) || !dvobj->padapters[i])
+				continue;
+			iface = dvobj->padapters[i];
+
+			rtw_adjust_chbw(iface, dec_ch[i], &dec_bw[i], &dec_offset[i]);
+			#ifdef CONFIG_RTW_MESH
+			if (MLME_IS_MESH(iface))
+				rtw_mesh_adjust_chbw(dec_ch[i], &dec_bw[i], &dec_offset[i]);
+			#endif
+
+			if (rtw_is_chbw_grouped(u_ch, u_bw, u_offset, dec_ch[i], dec_bw[i], dec_offset[i])) {
+				rtw_chset_sync_chbw(chset
+					, &dec_ch[i], &dec_bw[i], &dec_offset[i]
+					, &u_ch, &u_bw, &u_offset);
+				set_u_ch = _TRUE;
+
+				/* channel bw offset can be allowed, not need MCC */
+				*chbw_allow = _TRUE;
+			} else {
+				#ifdef CONFIG_MCC_MODE
+				if (MCC_EN(iface)) {
+					mlmeext = &(iface->mlmeextpriv);
+					mlmeext->cur_channel = *ch = dec_ch[i];
+					mlmeext->cur_bwmode = *bw = dec_bw[i];
+					mlmeext->cur_ch_offset = *offset = dec_offset[i];
+
+					/* channel bw offset can not be allowed, need MCC */
+					*chbw_allow = _FALSE;
+					RTW_INFO(FUNC_ADPT_FMT" enable mcc: %u,%u,%u\n", FUNC_ADPT_ARG(iface)
+						 , *ch, *bw, *offset);
+					goto exit;
+				}
+				#endif /* CONFIG_MCC_MODE */
+
+				/* set this for possible ch change when join down*/
+				set_fwstate(&iface->mlmepriv, WIFI_OP_CH_SWITCHING);
+			}
 		}
-	} else {
-		/* single AP/Mesh mode */
 
-		RTW_INFO(FUNC_ADPT_FMT" req: %d,%d,%d\n", FUNC_ADPT_ARG(adapter), req_ch, req_bw, req_offset);
+	} else if (MSTATE_STA_LD_NUM(&mstate_others)
+		|| MSTATE_AP_NUM(&mstate_others) || MSTATE_MESH_NUM(&mstate_others)
+	) {
+		/* has linked STA mode or AP/Mesh mode */
 
-		/* check temporary decision first */
-		rtw_adjust_chbw(adapter, dec_ch, &dec_bw, &dec_offset);
-		if (!rtw_get_offset_by_chbw(dec_ch, dec_bw, &dec_offset)) {
-			if (req_ch == -1 || req_bw == -1)
-				goto choose_chbw;
-			RTW_WARN(FUNC_ADPT_FMT" req: %u,%u has no valid offset\n", FUNC_ADPT_ARG(adapter), dec_ch, dec_bw);
-			*chbw_allow = _FALSE;
-			goto exit;
+		for (i = 0; i < dvobj->iface_nums; i++) {
+			if (!(ifbmp & BIT(i)) || !dvobj->padapters[i])
+				continue;
+			iface = dvobj->padapters[i];
+
+			rtw_adjust_chbw(iface, u_ch, &dec_bw[i], &dec_offset[i]);
+			#ifdef CONFIG_RTW_MESH
+			if (MLME_IS_MESH(iface))
+				rtw_mesh_adjust_chbw(u_ch, &dec_bw[i], &dec_offset[i]);
+			#endif
+
+			#ifdef CONFIG_MCC_MODE
+			if (MCC_EN(iface)) {
+				if (!rtw_is_chbw_grouped(u_ch, u_bw, u_offset, dec_ch[i], dec_bw[i], dec_offset[i])) {
+					mlmeext = &(iface->mlmeextpriv);
+					mlmeext->cur_channel = *ch = dec_ch[i] = cur_ie_ch[i];
+					mlmeext->cur_bwmode = *bw = dec_bw[i] = cur_ie_bw[i];
+					mlmeext->cur_ch_offset = *offset = dec_offset[i] = cur_ie_offset[i];
+					/* channel bw offset can not be allowed, need MCC */
+					*chbw_allow = _FALSE;
+					RTW_INFO(FUNC_ADPT_FMT" enable mcc: %u,%u,%u\n", FUNC_ADPT_ARG(iface)
+						 , *ch, *bw, *offset);
+					goto exit;
+				} else
+					/* channel bw offset can be allowed, not need MCC */
+					*chbw_allow = _TRUE;
+			}
+			#endif /* CONFIG_MCC_MODE */
+
+			if (req_ch == 0 && dec_bw[i] > u_bw
+				&& rtw_is_dfs_chbw(u_ch, u_bw, u_offset)
+			) {
+				/* request comes from upper layer, prevent from additional channel waiting */
+				dec_bw[i] = u_bw;
+				if (dec_bw[i] == CHANNEL_WIDTH_20)
+					dec_offset[i] = HAL_PRIME_CHNL_OFFSET_DONT_CARE;
+			}
+
+			/* follow */
+			rtw_chset_sync_chbw(chset
+				, &dec_ch[i], &dec_bw[i], &dec_offset[i]
+				, &u_ch, &u_bw, &u_offset);
 		}
 
-		if (!rtw_chset_is_chbw_valid(adapter_to_chset(adapter), dec_ch, dec_bw, dec_offset)) {
-			if (req_ch == -1 || req_bw == -1)
-				goto choose_chbw;
-			RTW_WARN(FUNC_ADPT_FMT" req: %u,%u,%u doesn't fit in chplan\n", FUNC_ADPT_ARG(adapter), dec_ch, dec_bw, dec_offset);
-			*chbw_allow = _FALSE;
-			goto exit;
+		set_u_ch = _TRUE;
+
+	} else {
+		/* autonomous decision */
+		u8 ori_ch = 0;
+		u8 max_bw;
+
+		/* autonomous decision, not need MCC */
+		*chbw_allow = _TRUE;
+
+		if (req_ch <= REQ_CH_NONE) /* channel is not specified */
+			goto choose_chbw;
+
+		/* get tmp dec union of ifbmp */
+		for (i = 0; i < dvobj->iface_nums; i++) {
+			if (!(ifbmp & BIT(i)) || !dvobj->padapters[i])
+				continue;
+			if (u_ch == 0) {
+				u_ch = dec_ch[i];
+				u_bw = dec_bw[i];
+				u_offset = dec_offset[i];
+				rtw_adjust_chbw(adapter, u_ch, &u_bw, &u_offset);
+				rtw_get_offset_by_chbw(u_ch, u_bw, &u_offset);
+			} else {
+				u8 tmp_ch = dec_ch[i];
+				u8 tmp_bw = dec_bw[i];
+				u8 tmp_offset = dec_offset[i];
+				
+				rtw_adjust_chbw(adapter, tmp_ch, &tmp_bw, &tmp_offset);
+				rtw_get_offset_by_chbw(tmp_ch, tmp_bw, &tmp_offset);
+
+				rtw_warn_on(!rtw_is_chbw_grouped(u_ch, u_bw, u_offset, tmp_ch, tmp_bw, tmp_offset));
+				rtw_sync_chbw(&tmp_ch, &tmp_bw, &tmp_offset, &u_ch, &u_bw, &u_offset);
+			}
 		}
 
-		if (rtw_odm_dfs_domain_unknown(adapter) && rtw_is_dfs_chbw(dec_ch, dec_bw, dec_offset)) {
-			if (req_ch >= 0)
-				RTW_WARN(FUNC_ADPT_FMT" DFS channel %u,%u,%u can't be used\n", FUNC_ADPT_ARG(adapter), dec_ch, dec_bw, dec_offset);
+		#ifdef CONFIG_RTW_MESH
+		/* if ifbmp are all mesh, apply bw restriction */
+		if (ifbmp_all_mesh)
+			rtw_mesh_adjust_chbw(u_ch, &u_bw, &u_offset);
+		#endif
+
+		RTW_INFO("%s ifbmp:0x%02x tmp union:%u,%u,%u\n", __func__, ifbmp, u_ch, u_bw, u_offset);
+
+		/* check if tmp dec union is usable */
+		if (rtw_ap_ch_specific_chk(adapter, u_ch, &u_bw, &u_offset, __func__) == _FAIL) {
+			/* channel can't be used */
 			if (req_ch > 0) {
 				/* specific channel and not from IE => don't change channel setting */
-				*chbw_allow = _FALSE;
 				goto exit;
 			}
 			goto choose_chbw;
-		}
-
-		if (rtw_chset_is_ch_non_ocp(adapter_to_chset(adapter), dec_ch, dec_bw, dec_offset) == _FALSE)
+		} else if (rtw_chset_is_chbw_non_ocp(chset, u_ch, u_bw, u_offset)) {
+			RTW_WARN("%s DFS channel %u,%u under non ocp\n", __func__, u_ch, u_bw);
+			if (req_ch > 0 && req_bw > REQ_BW_NONE) {
+				/* change_chbw with specific channel and specific bw, goto update_bss_chbw directly */
+				goto update_bss_chbw;
+			}
+		} else
 			goto update_bss_chbw;
 
 choose_chbw:
-		if (req_bw < 0)
-			req_bw = cur_ie_bw;
+		req_ch = req_ch > 0 ? req_ch : 0;
+		max_bw = req_bw > REQ_BW_NONE ? req_bw : CHANNEL_WIDTH_20;
+		for (i = 0; i < dvobj->iface_nums; i++) {
+			if (!(ifbmp & BIT(i)) || !dvobj->padapters[i])
+				continue;
+			iface = dvobj->padapters[i];
+			mlmeext = &(iface->mlmeextpriv);
+
+			if (req_bw <= REQ_BW_NONE) {
+				if (req_bw == REQ_BW_ORI) {
+					if (max_bw < iface->mlmepriv.ori_bw)
+						max_bw = iface->mlmepriv.ori_bw;
+				} else {
+					if (max_bw < cur_ie_bw[i])
+						max_bw = cur_ie_bw[i];
+				}
+			}
 
-#if defined(CONFIG_DFS_MASTER)
-		if (!rtw_odm_dfs_domain_unknown(adapter)) {
-			/* choose 5G DFS channel for debug */
-			if (adapter_to_rfctl(adapter)->dbg_dfs_master_choose_dfs_ch_first
-				&& rtw_choose_shortest_waiting_ch(adapter, req_bw, &dec_ch, &dec_bw, &dec_offset, RTW_CHF_2G | RTW_CHF_NON_DFS) == _TRUE)
-				RTW_INFO(FUNC_ADPT_FMT" choose 5G DFS channel for debug\n", FUNC_ADPT_ARG(adapter));
-			else if (adapter_to_rfctl(adapter)->dfs_ch_sel_d_flags
-				&& rtw_choose_shortest_waiting_ch(adapter, req_bw, &dec_ch, &dec_bw, &dec_offset, adapter_to_rfctl(adapter)->dfs_ch_sel_d_flags) == _TRUE)
-				RTW_INFO(FUNC_ADPT_FMT" choose with dfs_ch_sel_d_flags:0x%02x for debug\n", FUNC_ADPT_ARG(adapter), adapter_to_rfctl(adapter)->dfs_ch_sel_d_flags);
-			else if (rtw_choose_shortest_waiting_ch(adapter, req_bw, &dec_ch, &dec_bw, &dec_offset, 0) == _FALSE) {
-				RTW_WARN(FUNC_ADPT_FMT" no available channel\n", FUNC_ADPT_ARG(adapter));
-				*chbw_allow = _FALSE;
-				goto exit;
+			if (MSTATE_AP_NUM(&mstate) || MSTATE_MESH_NUM(&mstate)) {
+				if (ori_ch == 0)
+					ori_ch = mlmeext->cur_channel;
+				else if (ori_ch != mlmeext->cur_channel)
+					rtw_warn_on(1);
+			} else {
+				if (ori_ch == 0)
+					ori_ch = cur_ie_ch[i];
+				else if (ori_ch != cur_ie_ch[i])
+					rtw_warn_on(1);
 			}
-		} else
-#endif /* defined(CONFIG_DFS_MASTER) */
-		if (rtw_choose_shortest_waiting_ch(adapter, req_bw, &dec_ch, &dec_bw, &dec_offset, RTW_CHF_DFS) == _FALSE) {
-			RTW_WARN(FUNC_ADPT_FMT" no available channel\n", FUNC_ADPT_ARG(adapter));
-			*chbw_allow = _FALSE;
-			goto exit;
 		}
 
-update_bss_chbw:
-		rtw_ap_update_bss_chbw(adapter, network, dec_ch, dec_bw, dec_offset);
+		ch_avail = rtw_ap_choose_chbw(adapter, req_ch, max_bw
+			, ori_ch, &u_ch, &u_bw, &u_offset, ifbmp_all_mesh, __func__);
+		if (ch_avail == _FALSE)
+			goto exit;
 
-		/* channel bw offset can be allowed for single AP, not need MCC */
-		*chbw_allow = _TRUE;
-		set_dec_ch = _TRUE;
-	}
+update_bss_chbw:
+		for (i = 0; i < dvobj->iface_nums; i++) {
+			if (!(ifbmp & BIT(i)) || !dvobj->padapters[i])
+				continue;
+			iface = dvobj->padapters[i];
 
-	if (rtw_mi_check_fwstate(adapter, _FW_UNDER_SURVEY)) {
-		/* scanning, leave ch setting to scan state machine */
-		set_u_ch = set_dec_ch = _FALSE;
-	}
+			dec_ch[i] = u_ch;
+			if (dec_bw[i] > u_bw)
+				dec_bw[i] = u_bw;
+			if (dec_bw[i] == CHANNEL_WIDTH_20)
+				dec_offset[i] = HAL_PRIME_CHNL_OFFSET_DONT_CARE;
+			else
+				dec_offset[i] = u_offset;
 
-	if (mlmeext->cur_channel != dec_ch
-	    || mlmeext->cur_bwmode != dec_bw
-	    || mlmeext->cur_ch_offset != dec_offset)
-		changed = _TRUE;
+			#ifdef CONFIG_RTW_MESH
+			if (MLME_IS_MESH(iface))
+				rtw_mesh_adjust_chbw(dec_ch[i], &dec_bw[i], &dec_offset[i]);
+			#endif
+		}
 
-	if (changed == _TRUE && rtw_linked_check(adapter) == _TRUE) {
-#ifdef CONFIG_SPCT_CH_SWITCH
-		if (1)
-			rtw_ap_inform_ch_switch(adapter, dec_ch, dec_offset);
-		else
-#endif
-			rtw_sta_flush(adapter, _FALSE);
+		set_u_ch = _TRUE;
 	}
 
-	mlmeext->cur_channel = dec_ch;
-	mlmeext->cur_bwmode = dec_bw;
-	mlmeext->cur_ch_offset = dec_offset;
+	ifbmp_ch_changed = rtw_ap_update_chbw_by_ifbmp(dvobj, ifbmp
+							, cur_ie_ch, cur_ie_bw, cur_ie_offset
+							, dec_ch, dec_bw, dec_offset
+							, __func__);
 
 	if (u_ch != 0)
-		RTW_INFO(FUNC_ADPT_FMT" union: %u,%u,%u\n", FUNC_ADPT_ARG(adapter), u_ch, u_bw, u_offset);
+		RTW_INFO("%s union:%u,%u,%u\n", __func__, u_ch, u_bw, u_offset);
 
-	RTW_INFO(FUNC_ADPT_FMT" dec: %u,%u,%u\n", FUNC_ADPT_ARG(adapter), dec_ch, dec_bw, dec_offset);
+	if (rtw_mi_check_fwstate(adapter, _FW_UNDER_SURVEY)) {
+		/* scanning, leave ch setting to scan state machine */
+		set_u_ch = _FALSE;
+	}
 
 	if (set_u_ch == _TRUE) {
 		*ch = u_ch;
 		*bw = u_bw;
 		*offset = u_offset;
-	} else if (set_dec_ch == _TRUE) {
-		*ch = dec_ch;
-		*bw = dec_bw;
-		*offset = dec_offset;
 	}
 exit:
-	return changed;
+	return ifbmp_ch_changed;
 }
 
-u8 rtw_ap_sta_linking_state_check(_adapter *adapter)
+u8 rtw_ap_sta_states_check(_adapter *adapter)
 {
 	struct sta_info *psta;
-	struct mlme_priv *pmlmepriv = &adapter->mlmepriv;
 	struct sta_priv *pstapriv = &adapter->stapriv;
-	int i;
 	_list *plist, *phead;
 	_irqL irqL;
 	u8 rst = _FALSE;
@@ -4264,9 +4944,16 @@ u8 rtw_ap_sta_linking_state_check(_adapter *adapter)
 	phead = &pstapriv->asoc_list;
 	plist = get_next(phead);
 	while ((rtw_end_of_queue_search(phead, plist)) == _FALSE) {
+
 		psta = LIST_CONTAINOR(plist, struct sta_info, asoc_list);
 		plist = get_next(plist);
-		if (!(psta->state &_FW_LINKED)) {
+
+		if (!(psta->state & _FW_LINKED)) {
+			RTW_INFO(ADPT_FMT"- SoftAP/Mesh - sta under linking, its state = 0x%x\n", ADPT_ARG(adapter), psta->state);
+			rst = _TRUE;
+			break;
+		} else if (psta->state & WIFI_UNDER_KEY_HANDSHAKE) {
+			RTW_INFO(ADPT_FMT"- SoftAP/Mesh - sta under key handshaking, its state = 0x%x\n", ADPT_ARG(adapter), psta->state);
 			rst = _TRUE;
 			break;
 		}
@@ -4445,7 +5132,7 @@ void rtw_ap_parse_sta_capability(_adapter *adapter, struct sta_info *sta, u8 *ca
 
 u16 rtw_ap_parse_sta_supported_rates(_adapter *adapter, struct sta_info *sta, u8 *tlv_ies, u16 tlv_ies_len)
 {
-	u8 rate_set[16];
+	u8 rate_set[12];
 	u8 rate_num;
 	int i;
 	u16 status = _STATS_SUCCESSFUL_;
@@ -4540,6 +5227,13 @@ u16 rtw_ap_parse_sta_security_ie(_adapter *adapter, struct sta_info *sta, struct
 		wpa_ie_len = 0;
 	}
 
+#ifdef CONFIG_RTW_MESH
+	if (MLME_IS_MESH(adapter)) {
+		/* MFP is mandatory for secure mesh */
+		if (adapter->mesh_info.mesh_auth_id)
+			sta->flags |= WLAN_STA_MFP;
+	} else
+#endif
 	if ((sec->mfp_opt == MFP_REQUIRED && mfp_opt == MFP_NO) || mfp_opt == MFP_INVALID) 
 		status = WLAN_STATUS_ROBUST_MGMT_FRAME_POLICY_VIOLATION;
 	else if (sec->mfp_opt >= MFP_OPTIONAL && mfp_opt >= MFP_OPTIONAL)
@@ -4635,6 +5329,13 @@ void rtw_ap_parse_sta_wmm_ie(_adapter *adapter, struct sta_info *sta, u8 *tlv_ie
 	if (!mlme->qospriv.qos_option)
 		goto exit;
 
+#ifdef CONFIG_RTW_MESH
+	if (MLME_IS_MESH(adapter)) {
+		/* QoS is mandatory in mesh */
+		sta->flags |= WLAN_STA_WME;
+	}
+#endif
+
 	p = rtw_get_ie_ex(tlv_ies, tlv_ies_len, WLAN_EID_VENDOR_SPECIFIC, WMM_IE, 6, NULL, NULL);
 	if (!p)
 		goto exit;
@@ -4691,6 +5392,11 @@ void rtw_ap_parse_sta_ht_ie(_adapter *adapter, struct sta_info *sta, struct rtw_
 		sta->flags |= WLAN_STA_HT;
 		sta->flags |= WLAN_STA_WME;
 		_rtw_memcpy(&sta->htpriv.ht_cap, elems->ht_capabilities, sizeof(struct rtw_ieee80211_ht_cap));
+
+		if (elems->ht_operation && elems->ht_operation_len == HT_OP_IE_LEN) {
+			_rtw_memcpy(sta->htpriv.ht_op, elems->ht_operation, HT_OP_IE_LEN);
+			sta->htpriv.op_present = 1;
+		}
 	}
 exit:
 #endif
@@ -4709,14 +5415,19 @@ void rtw_ap_parse_sta_vht_ie(_adapter *adapter, struct sta_info *sta, struct rtw
 		goto exit;
 
 	_rtw_memset(&sta->vhtpriv, 0, sizeof(struct vht_priv));
-	if (elems->vht_capabilities && elems->vht_capabilities_len == 12) {
+	if (elems->vht_capabilities && elems->vht_capabilities_len == VHT_CAP_IE_LEN) {
 		sta->flags |= WLAN_STA_VHT;
-		_rtw_memcpy(sta->vhtpriv.vht_cap, elems->vht_capabilities, 12);
+		_rtw_memcpy(sta->vhtpriv.vht_cap, elems->vht_capabilities, VHT_CAP_IE_LEN);
+
+		if (elems->vht_operation && elems->vht_operation_len== VHT_OP_IE_LEN) {
+			_rtw_memcpy(sta->vhtpriv.vht_op, elems->vht_operation, VHT_OP_IE_LEN);
+			sta->vhtpriv.op_present = 1;
+		}
 
-		if (elems->vht_op_mode_notify && elems->vht_op_mode_notify_len == 1)
+		if (elems->vht_op_mode_notify && elems->vht_op_mode_notify_len == 1) {
 			_rtw_memcpy(&sta->vhtpriv.vht_op_mode_notify, elems->vht_op_mode_notify, 1);
-		else /* for Frame without Operating Mode notify ie; default: 80M */
-			sta->vhtpriv.vht_op_mode_notify = CHANNEL_WIDTH_80;
+			sta->vhtpriv.notify_present = 1;
+		}
 	}
 exit:
 #endif
diff --git a/rtl8723DS/core/rtw_beamforming.c b/rtl8723DS/core/rtw_beamforming.c
index 95c8005..7e5fd7b 100755..100644
--- a/rtl8723DS/core/rtw_beamforming.c
+++ b/rtl8723DS/core/rtw_beamforming.c
@@ -1068,22 +1068,20 @@ static void _bfer_remove_entry(PADAPTER adapter, struct beamformer_entry *entry)
 
 static u8 _bfer_set_entry_gid(PADAPTER adapter, u8 *addr, u8 *gid, u8 *position)
 {
-	struct beamformer_entry *bfer = NULL;
-
+	struct beamformer_entry bfer;
 
-	bfer = _bfer_get_entry_by_addr(adapter, addr);
-	if (!bfer) {
-		RTW_INFO("%s: Cannot find BFer entry!!\n", __FUNCTION__);
-		return _FAIL;
-	}
+	memset(&bfer, 0, sizeof(bfer));
+	memcpy(bfer.mac_addr, addr, ETH_ALEN);
 
 	/* Parsing Membership Status Array */
-	_rtw_memcpy(bfer->gid_valid, gid, 8);
+	memcpy(bfer.gid_valid, gid, 8);
+
 	/* Parsing User Position Array */
-	_rtw_memcpy(bfer->user_position, position, 16);
+	memcpy(bfer.user_position, position, 16);
 
 	/* Config HW GID table */
-	rtw_bf_cmd(adapter, BEAMFORMING_CTRL_SET_GID_TABLE, (u8*)&bfer, sizeof(struct beamformer_entry *), 1);
+	rtw_bf_cmd(adapter, BEAMFORMING_CTRL_SET_GID_TABLE, (u8 *) &bfer,
+			sizeof(bfer), 1);
 
 	return _SUCCESS;
 }
@@ -1794,6 +1792,7 @@ void rtw_bf_init(PADAPTER adapter)
 	info->beamformee_mu_reg_maping = 0;
 	info->first_mu_bfee_index = 0xFF;
 	info->mu_bfer_curidx = 0xFF;
+	info->cur_csi_rpt_rate = HALMAC_OFDM24;
 
 	_sounding_init(&info->sounding_info);
 	rtw_init_timer(&info->sounding_timer, adapter, _sounding_timer_handler, adapter);
@@ -1832,7 +1831,7 @@ void rtw_bf_cmd_hdl(PADAPTER adapter, u8 type, u8 *pbuf)
 		break;
 
 	case BEAMFORMING_CTRL_SET_GID_TABLE:
-		rtw_hal_set_hwreg(adapter, HW_VAR_SOUNDING_SET_GID_TABLE, *(void**)pbuf);
+		rtw_hal_set_hwreg(adapter, HW_VAR_SOUNDING_SET_GID_TABLE, pbuf);
 		break;
 
 	case BEAMFORMING_CTRL_SET_CSI_REPORT:
@@ -2917,7 +2916,7 @@ u32	rtw_beamforming_get_report_frame(PADAPTER	 Adapter, union recv_frame *precv_
 	u32	ret = _SUCCESS;
 #if (BEAMFORMING_SUPPORT == 1)
 	PHAL_DATA_TYPE	pHalData = GET_HAL_DATA(Adapter);
-	struct PHY_DM_STRUCT		*pDM_Odm = &(pHalData->odmpriv);
+	struct dm_struct		*pDM_Odm = &(pHalData->odmpriv);
 
 	ret = beamforming_get_report_frame(pDM_Odm, precv_frame);
 
@@ -2964,7 +2963,7 @@ void	rtw_beamforming_get_ndpa_frame(PADAPTER	 Adapter, union recv_frame *precv_f
 {
 #if (BEAMFORMING_SUPPORT == 1)
 	PHAL_DATA_TYPE	pHalData = GET_HAL_DATA(Adapter);
-	struct PHY_DM_STRUCT		*pDM_Odm = &(pHalData->odmpriv);
+	struct dm_struct		*pDM_Odm = &(pHalData->odmpriv);
 
 	beamforming_get_ndpa_frame(pDM_Odm, precv_frame);
 
@@ -3040,7 +3039,7 @@ void	rtw_beamforming_get_ndpa_frame(PADAPTER	 Adapter, union recv_frame *precv_f
 void	beamforming_wk_hdl(_adapter *padapter, u8 type, u8 *pbuf)
 {
 	PHAL_DATA_TYPE	pHalData = GET_HAL_DATA(padapter);
-	struct PHY_DM_STRUCT		*pDM_Odm = &(pHalData->odmpriv);
+	struct dm_struct		*pDM_Odm = &(pHalData->odmpriv);
 
 #if (BEAMFORMING_SUPPORT == 1) /*(BEAMFORMING_SUPPORT == 1)- for PHYDM beamfoming*/
 	switch (type) {
@@ -3048,7 +3047,7 @@ void	beamforming_wk_hdl(_adapter *padapter, u8 type, u8 *pbuf)
 		struct sta_info	*psta = (PVOID)pbuf;
 		u16			staIdx = psta->cmn.mac_id;
 
-		beamforming_enter(pDM_Odm, staIdx);
+		beamforming_enter(pDM_Odm, staIdx, adapter_mac_addr(psta->padapter));
 		break;
 	}
 	case BEAMFORMING_CTRL_LEAVE:
diff --git a/rtl8723DS/core/rtw_br_ext.c b/rtl8723DS/core/rtw_br_ext.c
index 6509df3..9a0effd 100755..100644
--- a/rtl8723DS/core/rtw_br_ext.c
+++ b/rtl8723DS/core/rtw_br_ext.c
@@ -301,7 +301,7 @@ static int update_nd_link_layer_addr(unsigned char *data, int len, unsigned char
 	return 0;
 }
 
-
+#ifdef SUPPORT_RX_UNI2MCAST
 static void convert_ipv6_mac_to_mc(struct sk_buff *skb)
 {
 	struct ipv6hdr *iph = (struct ipv6hdr *)(skb->data + ETH_HLEN);
@@ -319,6 +319,7 @@ static void convert_ipv6_mac_to_mc(struct sk_buff *skb)
 #endif
 }
 #endif /* CL_IPV6_PASS */
+#endif /* SUPPORT_RX_UNI2MCAST */
 
 
 static __inline__ int __nat25_network_hash(unsigned char *networkAddr)
diff --git a/rtl8723DS/core/rtw_bt_mp.c b/rtl8723DS/core/rtw_bt_mp.c
index 9b4fc24..9b4fc24 100755..100644
--- a/rtl8723DS/core/rtw_bt_mp.c
+++ b/rtl8723DS/core/rtw_bt_mp.c
diff --git a/rtl8723DS/core/rtw_btcoex.c b/rtl8723DS/core/rtw_btcoex.c
index d1d8355..d5b89bd 100755..100644
--- a/rtl8723DS/core/rtw_btcoex.c
+++ b/rtl8723DS/core/rtw_btcoex.c
@@ -437,7 +437,6 @@ u8 rtw_btcoex_LPS_Leave(PADAPTER padapter)
 
 	if (pwrpriv->pwr_mode != PS_MODE_ACTIVE) {
 		rtw_set_ps_mode(padapter, PS_MODE_ACTIVE, 0, 0, "BTCOEX");
-		LPS_RF_ON_check(padapter, 100);
 		pwrpriv->bpower_saving = _FALSE;
 	}
 
diff --git a/rtl8723DS/core/rtw_btcoex_wifionly.c b/rtl8723DS/core/rtw_btcoex_wifionly.c
index e26b3a0..d9872b0 100755..100644
--- a/rtl8723DS/core/rtw_btcoex_wifionly.c
+++ b/rtl8723DS/core/rtw_btcoex_wifionly.c
@@ -26,6 +26,11 @@ void rtw_btcoex_wifionly_scan_notify(PADAPTER padapter)
 	hal_btcoex_wifionly_scan_notify(padapter);
 }
 
+void rtw_btcoex_wifionly_connect_notify(PADAPTER padapter)
+{
+	hal_btcoex_wifionly_connect_notify(padapter);
+}
+
 void rtw_btcoex_wifionly_hw_config(PADAPTER padapter)
 {
 	hal_btcoex_wifionly_hw_config(padapter);
diff --git a/rtl8723DS/core/rtw_chplan.c b/rtl8723DS/core/rtw_chplan.c
new file mode 100644
index 0000000..2c40bc2
--- a/dev/null
+++ b/rtl8723DS/core/rtw_chplan.c
@@ -0,0 +1,1193 @@
+/******************************************************************************

+ *

+ * Copyright(c) 2007 - 2018 Realtek Corporation.

+ *

+ * This program is free software; you can redistribute it and/or modify it

+ * under the terms of version 2 of the GNU General Public License as

+ * published by the Free Software Foundation.

+ *

+ * This program is distributed in the hope that it will be useful, but WITHOUT

+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or

+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for

+ * more details.

+ *

+ *****************************************************************************/

+#define _RTW_CHPLAN_C_

+

+#include <drv_types.h>

+

+#define RTW_DOMAIN_MAP_VER	"37e"

+#define RTW_COUNTRY_MAP_VER	"21"

+

+#ifdef LEGACY_CHANNEL_PLAN_REF

+/********************************************************

+ChannelPlan definitions

+*********************************************************/

+static RT_CHANNEL_PLAN legacy_channel_plan[] = {

+	/* 0x00, RTW_CHPLAN_FCC */						{{1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112, 116, 132, 136, 140, 149, 153, 157, 161, 165}, 32},

+	/* 0x01, RTW_CHPLAN_IC */						{{1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112, 116, 136, 140, 149, 153, 157, 161, 165}, 31},

+	/* 0x02, RTW_CHPLAN_ETSI */						{{1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140}, 32},

+	/* 0x03, RTW_CHPLAN_SPAIN */						{{1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13}, 13},

+	/* 0x04, RTW_CHPLAN_FRANCE */					{{1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13}, 13},

+	/* 0x05, RTW_CHPLAN_MKK */						{{1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13}, 13},

+	/* 0x06, RTW_CHPLAN_MKK1 */						{{1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13}, 13},

+	/* 0x07, RTW_CHPLAN_ISRAEL */					{{1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 36, 40, 44, 48, 52, 56, 60, 64}, 21},

+	/* 0x08, RTW_CHPLAN_TELEC */						{{1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 36, 40, 44, 48, 52, 56, 60, 64}, 22},

+	/* 0x09, RTW_CHPLAN_GLOBAL_DOAMIN */			{{1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14}, 14},

+	/* 0x0A, RTW_CHPLAN_WORLD_WIDE_13 */			{{1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13}, 13},

+	/* 0x0B, RTW_CHPLAN_TAIWAN */					{{1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 56, 60, 64, 100, 104, 108, 112, 116, 136, 140, 149, 153, 157, 161, 165}, 26},

+	/* 0x0C, RTW_CHPLAN_CHINA */					{{1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 149, 153, 157, 161, 165}, 18},

+	/* 0x0D, RTW_CHPLAN_SINGAPORE_INDIA_MEXICO */	{{1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 36, 40, 44, 48, 52, 56, 60, 64, 149, 153, 157, 161, 165}, 24},

+	/* 0x0E, RTW_CHPLAN_KOREA */					{{1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112, 116, 120, 124, 149, 153, 157, 161, 165}, 31},

+	/* 0x0F, RTW_CHPLAN_TURKEY */					{{1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 36, 40, 44, 48, 52, 56, 60, 64}, 19},

+	/* 0x10, RTW_CHPLAN_JAPAN */						{{1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140}, 32},

+	/* 0x11, RTW_CHPLAN_FCC_NO_DFS */				{{1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 36, 40, 44, 48, 149, 153, 157, 161, 165}, 20},

+	/* 0x12, RTW_CHPLAN_JAPAN_NO_DFS */				{{1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 36, 40, 44, 48}, 17},

+	/* 0x13, RTW_CHPLAN_WORLD_WIDE_5G */			{{1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140, 149, 153, 157, 161, 165}, 37},

+	/* 0x14, RTW_CHPLAN_TAIWAN_NO_DFS */			{{1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 56, 60, 64, 149, 153, 157, 161, 165}, 19},

+};

+#endif

+

+enum rtw_rd_2g {

+	RTW_RD_2G_NULL = 0,

+	RTW_RD_2G_WORLD = 1,	/* Worldwird 13 */

+	RTW_RD_2G_ETSI1 = 2,	/* Europe */

+	RTW_RD_2G_FCC1 = 3,		/* US */

+	RTW_RD_2G_MKK1 = 4,		/* Japan */

+	RTW_RD_2G_ETSI2 = 5,	/* France */

+	RTW_RD_2G_GLOBAL = 6,	/* Global domain */

+	RTW_RD_2G_MKK2 = 7,		/* Japan */

+	RTW_RD_2G_FCC2 = 8,		/* US */

+	RTW_RD_2G_IC1 = 9,		/* Canada */

+	RTW_RD_2G_WORLD1 = 10,	/* Worldwide 11 */

+	RTW_RD_2G_KCC1 = 11,	/* Korea */

+	RTW_RD_2G_IC2 = 12,		/* Canada */

+

+	RTW_RD_2G_MAX,

+};

+

+enum rtw_rd_5g {

+	RTW_RD_5G_NULL = 0,		/*	*/

+	RTW_RD_5G_ETSI1 = 1,	/* Europe */

+	RTW_RD_5G_ETSI2 = 2,	/* Australia, New Zealand */

+	RTW_RD_5G_ETSI3 = 3,	/* Russia */

+	RTW_RD_5G_FCC1 = 4,		/* US */

+	RTW_RD_5G_FCC2 = 5,		/* FCC w/o DFS Channels */

+	RTW_RD_5G_FCC3 = 6,		/* Bolivia, Chile, El Salvador, Venezuela */

+	RTW_RD_5G_FCC4 = 7,		/* Venezuela */

+	RTW_RD_5G_FCC5 = 8,		/* China */

+	RTW_RD_5G_FCC6 = 9,		/*	*/

+	RTW_RD_5G_FCC7 = 10,	/* US(w/o Weather radar) */

+	RTW_RD_5G_IC1 = 11,		/* Canada(w/o Weather radar) */

+	RTW_RD_5G_KCC1 = 12,	/* Korea */

+	RTW_RD_5G_MKK1 = 13,	/* Japan */

+	RTW_RD_5G_MKK2 = 14,	/* Japan (W52, W53) */

+	RTW_RD_5G_MKK3 = 15,	/* Japan (W56) */

+	RTW_RD_5G_NCC1 = 16,	/* Taiwan, (w/o Weather radar) */

+	RTW_RD_5G_NCC2 = 17,	/* Taiwan, Band2, Band4 */

+	RTW_RD_5G_NCC3 = 18,	/* Taiwan w/o DFS, Band4 only */

+	RTW_RD_5G_ETSI4 = 19,	/* Europe w/o DFS, Band1 only */

+	RTW_RD_5G_ETSI5 = 20,	/* Australia, New Zealand(w/o Weather radar) */

+	RTW_RD_5G_FCC8 = 21,	/* Latin America */

+	RTW_RD_5G_ETSI6 = 22,	/* Israel, Bahrain, Egypt, India, China, Malaysia */

+	RTW_RD_5G_ETSI7 = 23,	/* China */

+	RTW_RD_5G_ETSI8 = 24,	/* Jordan */

+	RTW_RD_5G_ETSI9 = 25,	/* Lebanon */

+	RTW_RD_5G_ETSI10 = 26,	/* Qatar */

+	RTW_RD_5G_ETSI11 = 27,	/* Russia */

+	RTW_RD_5G_NCC4 = 28,	/* Taiwan, (w/o Weather radar) */

+	RTW_RD_5G_ETSI12 = 29,	/* Indonesia */

+	RTW_RD_5G_FCC9 = 30,	/* (w/o Weather radar) */

+	RTW_RD_5G_ETSI13 = 31,	/* (w/o Weather radar) */

+	RTW_RD_5G_FCC10 = 32,	/* Argentina(w/o Weather radar) */

+	RTW_RD_5G_MKK4 = 33,	/* Japan (W52) */

+	RTW_RD_5G_ETSI14 = 34,	/* Russia */

+	RTW_RD_5G_FCC11 = 35,	/* US(include CH144) */

+	RTW_RD_5G_ETSI15 = 36,	/* Malaysia */

+	RTW_RD_5G_MKK5 = 37,	/* Japan */

+	RTW_RD_5G_ETSI16 = 38,	/* Europe */

+	RTW_RD_5G_ETSI17 = 39,	/* Europe */

+	RTW_RD_5G_FCC12 = 40,	/* FCC */

+	RTW_RD_5G_FCC13 = 41,	/* FCC */

+	RTW_RD_5G_FCC14 = 42,	/* FCC w/o Weather radar(w/o 5600~5650MHz) */

+	RTW_RD_5G_FCC15 = 43,	/* FCC w/o Band3 */

+	RTW_RD_5G_FCC16 = 44,	/* FCC w/o Band3 */

+	RTW_RD_5G_ETSI18 = 45,	/* ETSI w/o DFS Band2&3 */

+	RTW_RD_5G_ETSI19 = 46,	/* Europe */

+	RTW_RD_5G_FCC17 = 47,	/* FCC w/o Weather radar(w/o 5600~5650MHz) */

+	RTW_RD_5G_ETSI20 = 48,	/* Europe */

+	RTW_RD_5G_IC2 = 49,		/* Canada(w/o Weather radar), include ch144 */

+	RTW_RD_5G_ETSI21 = 50,	/* Australia, New Zealand(w/o Weather radar) */

+	RTW_RD_5G_FCC18 = 51,	/*  */

+	RTW_RD_5G_WORLD = 52,	/* Worldwide */

+	RTW_RD_5G_CHILE1 = 53,	/* Chile */

+	RTW_RD_5G_ACMA1 = 54,	/* Australia, New Zealand (w/o Weather radar) (w/o Ch120~Ch128) */

+	RTW_RD_5G_WORLD1 = 55,	/* 5G Worldwide Band1&2 */

+	RTW_RD_5G_CHILE2 = 56,	/* Chile (Band2,Band3) */

+	RTW_RD_5G_KCC2 = 57,	/* Korea (New standard) */

+

+	/* === Below are driver defined for legacy channel plan compatible, DON'T assign index ==== */

+	RTW_RD_5G_OLD_FCC1,

+	RTW_RD_5G_OLD_NCC1,

+	RTW_RD_5G_OLD_KCC1,

+

+	RTW_RD_5G_MAX,

+};

+

+struct ch_list_t {

+	u8 *len_ch;

+};

+

+#define CH_LIST_ENT(_len, arg...) \

+	{.len_ch = (u8[_len + 1]) {_len, ##arg}, }

+

+#define CH_LIST_LEN(_ch_list) (_ch_list.len_ch[0])

+#define CH_LIST_CH(_ch_list, _i) (_ch_list.len_ch[_i + 1])

+

+struct chplan_ent_t {

+	u8 rd_2g;

+#ifdef CONFIG_IEEE80211_BAND_5GHZ

+	u8 rd_5g;

+#endif

+	u8 regd; /* value of REGULATION_TXPWR_LMT */

+};

+

+#ifdef CONFIG_IEEE80211_BAND_5GHZ

+#define CHPLAN_ENT(i2g, i5g, regd) {i2g, i5g, regd}

+#else

+#define CHPLAN_ENT(i2g, i5g, regd) {i2g, regd}

+#endif

+

+static struct ch_list_t RTW_ChannelPlan2G[] = {

+	/* 0, RTW_RD_2G_NULL */		CH_LIST_ENT(0),

+	/* 1, RTW_RD_2G_WORLD */	CH_LIST_ENT(13, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13),

+	/* 2, RTW_RD_2G_ETSI1 */		CH_LIST_ENT(13, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13),

+	/* 3, RTW_RD_2G_FCC1 */		CH_LIST_ENT(11, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11),

+	/* 4, RTW_RD_2G_MKK1 */		CH_LIST_ENT(14, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14),

+	/* 5, RTW_RD_2G_ETSI2 */		CH_LIST_ENT(4, 10, 11, 12, 13),

+	/* 6, RTW_RD_2G_GLOBAL */	CH_LIST_ENT(14, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14),

+	/* 7, RTW_RD_2G_MKK2 */		CH_LIST_ENT(13, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13),

+	/* 8, RTW_RD_2G_FCC2 */		CH_LIST_ENT(13, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13),

+	/* 9, RTW_RD_2G_IC1 */		CH_LIST_ENT(13, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13),

+	/* 10, RTW_RD_2G_WORLD1 */	CH_LIST_ENT(11, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11),

+	/* 11, RTW_RD_2G_KCC1 */	CH_LIST_ENT(13, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13),

+	/* 12, RTW_RD_2G_IC2 */		CH_LIST_ENT(11, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11),

+};

+

+#ifdef CONFIG_IEEE80211_BAND_5GHZ

+static struct ch_list_t RTW_ChannelPlan5G[] = {

+	/* 0, RTW_RD_5G_NULL */		CH_LIST_ENT(0),

+	/* 1, RTW_RD_5G_ETSI1 */		CH_LIST_ENT(19, 36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140),

+	/* 2, RTW_RD_5G_ETSI2 */		CH_LIST_ENT(24, 36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140, 149, 153, 157, 161, 165),

+	/* 3, RTW_RD_5G_ETSI3 */		CH_LIST_ENT(22, 36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112, 116, 120, 124, 128, 132, 149, 153, 157, 161, 165),

+	/* 4, RTW_RD_5G_FCC1 */		CH_LIST_ENT(24, 36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140, 149, 153, 157, 161, 165),

+	/* 5, RTW_RD_5G_FCC2 */		CH_LIST_ENT(9, 36, 40, 44, 48, 149, 153, 157, 161, 165),

+	/* 6, RTW_RD_5G_FCC3 */		CH_LIST_ENT(13, 36, 40, 44, 48, 52, 56, 60, 64, 149, 153, 157, 161, 165),

+	/* 7, RTW_RD_5G_FCC4 */		CH_LIST_ENT(12, 36, 40, 44, 48, 52, 56, 60, 64, 149, 153, 157, 161),

+	/* 8, RTW_RD_5G_FCC5 */		CH_LIST_ENT(5, 149, 153, 157, 161, 165),

+	/* 9, RTW_RD_5G_FCC6 */		CH_LIST_ENT(8, 36, 40, 44, 48, 52, 56, 60, 64),

+	/* 10, RTW_RD_5G_FCC7 */	CH_LIST_ENT(21, 36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112, 116, 132, 136, 140, 149, 153, 157, 161, 165),

+	/* 11, RTW_RD_5G_IC1 */		CH_LIST_ENT(21, 36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112, 116, 132, 136, 140, 149, 153, 157, 161, 165),

+	/* 12, RTW_RD_5G_KCC1 */	CH_LIST_ENT(19, 36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112, 116, 120, 124, 149, 153, 157, 161),

+	/* 13, RTW_RD_5G_MKK1 */	CH_LIST_ENT(19, 36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140),

+	/* 14, RTW_RD_5G_MKK2 */	CH_LIST_ENT(8, 36, 40, 44, 48, 52, 56, 60, 64),

+	/* 15, RTW_RD_5G_MKK3 */	CH_LIST_ENT(11, 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140),

+	/* 16, RTW_RD_5G_NCC1 */	CH_LIST_ENT(16, 56, 60, 64, 100, 104, 108, 112, 116, 132, 136, 140, 149, 153, 157, 161, 165),

+	/* 17, RTW_RD_5G_NCC2 */	CH_LIST_ENT(8, 56, 60, 64, 149, 153, 157, 161, 165),

+	/* 18, RTW_RD_5G_NCC3 */	CH_LIST_ENT(5, 149, 153, 157, 161, 165),

+	/* 19, RTW_RD_5G_ETSI4 */	CH_LIST_ENT(4, 36, 40, 44, 48),

+	/* 20, RTW_RD_5G_ETSI5 */	CH_LIST_ENT(21, 36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112, 116, 132, 136, 140, 149, 153, 157, 161, 165),

+	/* 21, RTW_RD_5G_FCC8 */	CH_LIST_ENT(4, 149, 153, 157, 161),

+	/* 22, RTW_RD_5G_ETSI6 */	CH_LIST_ENT(8, 36, 40, 44, 48, 52, 56, 60, 64),

+	/* 23, RTW_RD_5G_ETSI7 */	CH_LIST_ENT(13, 36, 40, 44, 48, 52, 56, 60, 64, 149, 153, 157, 161, 165),

+	/* 24, RTW_RD_5G_ETSI8 */	CH_LIST_ENT(9, 36, 40, 44, 48, 149, 153, 157, 161, 165),

+	/* 25, RTW_RD_5G_ETSI9 */	CH_LIST_ENT(11, 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140),

+	/* 26, RTW_RD_5G_ETSI10 */	CH_LIST_ENT(5, 149, 153, 157, 161, 165),

+	/* 27, RTW_RD_5G_ETSI11 */	CH_LIST_ENT(16, 36, 40, 44, 48, 52, 56, 60, 64, 132, 136, 140, 149, 153, 157, 161, 165),

+	/* 28, RTW_RD_5G_NCC4 */	CH_LIST_ENT(17, 52, 56, 60, 64, 100, 104, 108, 112, 116, 132, 136, 140, 149, 153, 157, 161, 165),

+	/* 29, RTW_RD_5G_ETSI12 */	CH_LIST_ENT(4, 149, 153, 157, 161),

+	/* 30, RTW_RD_5G_FCC9 */	CH_LIST_ENT(21, 36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112, 116, 132, 136, 140, 149, 153, 157, 161, 165),

+	/* 31, RTW_RD_5G_ETSI13 */	CH_LIST_ENT(16, 36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112, 116, 132, 136, 140),

+	/* 32, RTW_RD_5G_FCC10 */	CH_LIST_ENT(20, 36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112, 116, 132, 136, 140, 149, 153, 157, 161),

+	/* 33, RTW_RD_5G_MKK4 */	CH_LIST_ENT(4, 36, 40, 44, 48),

+	/* 34, RTW_RD_5G_ETSI14 */	CH_LIST_ENT(11, 36, 40, 44, 48, 52, 56, 60, 64, 132, 136, 140),

+	/* 35, RTW_RD_5G_FCC11 */	CH_LIST_ENT(25, 36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140, 144, 149, 153, 157, 161, 165),

+	/* 36, RTW_RD_5G_ETSI15 */	CH_LIST_ENT(21, 36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112, 116, 120, 124, 128, 149, 153, 157, 161, 165),

+	/* 37, RTW_RD_5G_MKK5 */	CH_LIST_ENT(24, 36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140, 149, 153, 157, 161, 165),

+	/* 38, RTW_RD_5G_ETSI16 */	CH_LIST_ENT(24, 36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140, 149, 153, 157, 161, 165),

+	/* 39, RTW_RD_5G_ETSI17 */	CH_LIST_ENT(24, 36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140, 149, 153, 157, 161, 165),

+	/* 40, RTW_RD_5G_FCC12*/	CH_LIST_ENT(24, 36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140, 149, 153, 157, 161, 165),

+	/* 41, RTW_RD_5G_FCC13 */	CH_LIST_ENT(24, 36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140, 149, 153, 157, 161, 165),

+	/* 42, RTW_RD_5G_FCC14 */	CH_LIST_ENT(21, 36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112, 116, 132, 136, 140, 149, 153, 157, 161, 165),

+	/* 43, RTW_RD_5G_FCC15 */	CH_LIST_ENT(13, 36, 40, 44, 48, 52, 56, 60, 64, 149, 153, 157, 161, 165),

+	/* 44, RTW_RD_5G_FCC16 */	CH_LIST_ENT(13, 36, 40, 44, 48, 52, 56, 60, 64, 149, 153, 157, 161, 165),

+	/* 45, RTW_RD_5G_ETSI18 */	CH_LIST_ENT(9, 36, 40, 44, 48, 149, 153, 157, 161, 165),

+	/* 46, RTW_RD_5G_ETSI19 */	CH_LIST_ENT(24, 36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140, 149, 153, 157, 161, 165),

+	/* 47, RTW_RD_5G_FCC17 */	CH_LIST_ENT(16, 36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112, 116, 132, 136, 140),

+	/* 48, RTW_RD_5G_ETSI20 */	CH_LIST_ENT(9, 52, 56, 60, 64, 149, 153, 157, 161, 165),

+	/* 49, RTW_RD_5G_IC2 */		CH_LIST_ENT(22, 36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112, 116, 132, 136, 140, 144, 149, 153, 157, 161, 165),

+	/* 50, RTW_RD_5G_ETSI21 */	CH_LIST_ENT(13, 100, 104, 108, 112, 116, 132, 136, 140, 149, 153, 157, 161, 165),

+	/* 51, RTW_RD_5G_FCC18 */	CH_LIST_ENT(8, 100, 104, 108, 112, 116, 132, 136, 140),

+	/* 52, RTW_RD_5G_WORLD */	CH_LIST_ENT(25, 36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140, 144, 149, 153, 157, 161, 165),

+	/* 53, RTW_RD_5G_CHILE1 */	CH_LIST_ENT(25, 36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140, 144, 149, 153, 157, 161, 165),

+	/* 54, RTW_RD_5G_ACMA1 */	CH_LIST_ENT(21, 36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112, 116, 132, 136, 140, 149, 153, 157, 161, 165),

+	/* 55, RTW_RD_5G_WORLD1 */	CH_LIST_ENT(8, 36, 40, 44, 48, 52, 56, 60, 64),

+	/* 56, RTW_RD_5G_CHILE2 */	CH_LIST_ENT(16, 52, 56, 60, 64, 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140, 144),

+	/* 57, RTW_RD_5G_KCC2 */	CH_LIST_ENT(24, 36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140, 149, 153, 157, 161, 165),

+

+	/* === Below are driver defined for legacy channel plan compatible, NO static index assigned ==== */

+	/* RTW_RD_5G_OLD_FCC1 */	CH_LIST_ENT(20, 36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112, 116, 136, 140, 149, 153, 157, 161, 165),

+	/* RTW_RD_5G_OLD_NCC1 */	CH_LIST_ENT(15, 56, 60, 64, 100, 104, 108, 112, 116, 136, 140, 149, 153, 157, 161, 165),

+	/* RTW_RD_5G_OLD_KCC1 */	CH_LIST_ENT(20, 36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112, 116, 120, 124, 149, 153, 157, 161, 165),

+};

+#endif /* CONFIG_IEEE80211_BAND_5GHZ */

+

+static struct chplan_ent_t RTW_ChannelPlanMap[RTW_CHPLAN_MAX] = {

+	/* ===== 0x00 ~ 0x1F, legacy channel plan ===== */

+	CHPLAN_ENT(RTW_RD_2G_FCC1,		RTW_RD_5G_KCC1,		TXPWR_LMT_FCC),		/* 0x00, RTW_CHPLAN_FCC */

+	CHPLAN_ENT(RTW_RD_2G_FCC1,		RTW_RD_5G_OLD_FCC1,	TXPWR_LMT_FCC),		/* 0x01, RTW_CHPLAN_IC */

+	CHPLAN_ENT(RTW_RD_2G_ETSI1,		RTW_RD_5G_ETSI1,	TXPWR_LMT_ETSI),	/* 0x02, RTW_CHPLAN_ETSI */

+	CHPLAN_ENT(RTW_RD_2G_ETSI1,		RTW_RD_5G_NULL,		TXPWR_LMT_ETSI),	/* 0x03, RTW_CHPLAN_SPAIN */

+	CHPLAN_ENT(RTW_RD_2G_ETSI1,		RTW_RD_5G_NULL,		TXPWR_LMT_ETSI),	/* 0x04, RTW_CHPLAN_FRANCE */

+	CHPLAN_ENT(RTW_RD_2G_MKK1,		RTW_RD_5G_NULL,		TXPWR_LMT_MKK),		/* 0x05, RTW_CHPLAN_MKK */

+	CHPLAN_ENT(RTW_RD_2G_MKK1,		RTW_RD_5G_NULL,		TXPWR_LMT_MKK),		/* 0x06, RTW_CHPLAN_MKK1 */

+	CHPLAN_ENT(RTW_RD_2G_ETSI1,		RTW_RD_5G_FCC6,		TXPWR_LMT_ETSI),	/* 0x07, RTW_CHPLAN_ISRAEL */

+	CHPLAN_ENT(RTW_RD_2G_MKK1,		RTW_RD_5G_FCC6,		TXPWR_LMT_MKK),		/* 0x08, RTW_CHPLAN_TELEC */

+	CHPLAN_ENT(RTW_RD_2G_MKK1,		RTW_RD_5G_NULL,		TXPWR_LMT_WW),		/* 0x09, RTW_CHPLAN_GLOBAL_DOAMIN */

+	CHPLAN_ENT(RTW_RD_2G_WORLD,		RTW_RD_5G_NULL,		TXPWR_LMT_WW),		/* 0x0A, RTW_CHPLAN_WORLD_WIDE_13 */

+	CHPLAN_ENT(RTW_RD_2G_FCC1,		RTW_RD_5G_OLD_NCC1,	TXPWR_LMT_FCC),		/* 0x0B, RTW_CHPLAN_TAIWAN */

+	CHPLAN_ENT(RTW_RD_2G_ETSI1,		RTW_RD_5G_FCC5,		TXPWR_LMT_ETSI),	/* 0x0C, RTW_CHPLAN_CHINA */

+	CHPLAN_ENT(RTW_RD_2G_FCC1,		RTW_RD_5G_FCC3,		TXPWR_LMT_WW),		/* 0x0D, RTW_CHPLAN_SINGAPORE_INDIA_MEXICO */ /* ETSI:Singapore, India. FCC:Mexico => WW */

+	CHPLAN_ENT(RTW_RD_2G_FCC1,		RTW_RD_5G_OLD_KCC1,	TXPWR_LMT_ETSI),	/* 0x0E, RTW_CHPLAN_KOREA */

+	CHPLAN_ENT(RTW_RD_2G_FCC1,		RTW_RD_5G_FCC6,		TXPWR_LMT_ETSI),	/* 0x0F, RTW_CHPLAN_TURKEY */

+	CHPLAN_ENT(RTW_RD_2G_ETSI1,		RTW_RD_5G_ETSI1,	TXPWR_LMT_MKK),		/* 0x10, RTW_CHPLAN_JAPAN */

+	CHPLAN_ENT(RTW_RD_2G_FCC1,		RTW_RD_5G_FCC2,		TXPWR_LMT_FCC),		/* 0x11, RTW_CHPLAN_FCC_NO_DFS */

+	CHPLAN_ENT(RTW_RD_2G_ETSI1,		RTW_RD_5G_FCC7,		TXPWR_LMT_MKK),		/* 0x12, RTW_CHPLAN_JAPAN_NO_DFS */

+	CHPLAN_ENT(RTW_RD_2G_WORLD,		RTW_RD_5G_FCC1,		TXPWR_LMT_WW),		/* 0x13, RTW_CHPLAN_WORLD_WIDE_5G */

+	CHPLAN_ENT(RTW_RD_2G_FCC1,		RTW_RD_5G_NCC2,		TXPWR_LMT_FCC),		/* 0x14, RTW_CHPLAN_TAIWAN_NO_DFS */

+	CHPLAN_ENT(RTW_RD_2G_WORLD,		RTW_RD_5G_FCC7,		TXPWR_LMT_ETSI),	/* 0x15, RTW_CHPLAN_ETSI_NO_DFS */

+	CHPLAN_ENT(RTW_RD_2G_WORLD,		RTW_RD_5G_NCC1,		TXPWR_LMT_ETSI),	/* 0x16, RTW_CHPLAN_KOREA_NO_DFS */

+	CHPLAN_ENT(RTW_RD_2G_MKK1,		RTW_RD_5G_FCC7,		TXPWR_LMT_MKK),		/* 0x17, RTW_CHPLAN_JAPAN_NO_DFS */

+	CHPLAN_ENT(RTW_RD_2G_NULL,		RTW_RD_5G_FCC5,		TXPWR_LMT_ETSI),	/* 0x18, RTW_CHPLAN_PAKISTAN_NO_DFS */

+	CHPLAN_ENT(RTW_RD_2G_FCC1,		RTW_RD_5G_FCC5,		TXPWR_LMT_FCC),		/* 0x19, RTW_CHPLAN_TAIWAN2_NO_DFS */

+	CHPLAN_ENT(RTW_RD_2G_NULL,		RTW_RD_5G_NULL,		TXPWR_LMT_WW),		/* 0x1A, */

+	CHPLAN_ENT(RTW_RD_2G_NULL,		RTW_RD_5G_NULL,		TXPWR_LMT_WW),		/* 0x1B, */

+	CHPLAN_ENT(RTW_RD_2G_NULL,		RTW_RD_5G_NULL,		TXPWR_LMT_WW),		/* 0x1C, */

+	CHPLAN_ENT(RTW_RD_2G_NULL,		RTW_RD_5G_NULL,		TXPWR_LMT_WW),		/* 0x1D, */

+	CHPLAN_ENT(RTW_RD_2G_NULL,		RTW_RD_5G_NULL,		TXPWR_LMT_WW),		/* 0x1E, */

+	CHPLAN_ENT(RTW_RD_2G_NULL,		RTW_RD_5G_FCC1,		TXPWR_LMT_WW),		/* 0x1F, RTW_CHPLAN_WORLD_WIDE_ONLY_5G */

+

+	/* ===== 0x20 ~ 0x7F, new channel plan ===== */

+	CHPLAN_ENT(RTW_RD_2G_WORLD,		RTW_RD_5G_NULL,		TXPWR_LMT_WW),		/* 0x20, RTW_CHPLAN_WORLD_NULL */

+	CHPLAN_ENT(RTW_RD_2G_ETSI1,		RTW_RD_5G_NULL,		TXPWR_LMT_ETSI),	/* 0x21, RTW_CHPLAN_ETSI1_NULL */

+	CHPLAN_ENT(RTW_RD_2G_FCC1,		RTW_RD_5G_NULL,		TXPWR_LMT_FCC),		/* 0x22, RTW_CHPLAN_FCC1_NULL */

+	CHPLAN_ENT(RTW_RD_2G_MKK1,		RTW_RD_5G_NULL,		TXPWR_LMT_MKK),		/* 0x23, RTW_CHPLAN_MKK1_NULL */

+	CHPLAN_ENT(RTW_RD_2G_ETSI2,		RTW_RD_5G_NULL,		TXPWR_LMT_ETSI),	/* 0x24, RTW_CHPLAN_ETSI2_NULL */

+	CHPLAN_ENT(RTW_RD_2G_FCC1,		RTW_RD_5G_FCC1,		TXPWR_LMT_FCC),		/* 0x25, RTW_CHPLAN_FCC1_FCC1 */

+	CHPLAN_ENT(RTW_RD_2G_WORLD,		RTW_RD_5G_ETSI1,	TXPWR_LMT_ETSI),	/* 0x26, RTW_CHPLAN_WORLD_ETSI1 */

+	CHPLAN_ENT(RTW_RD_2G_MKK1,		RTW_RD_5G_MKK1,		TXPWR_LMT_MKK),		/* 0x27, RTW_CHPLAN_MKK1_MKK1 */

+	CHPLAN_ENT(RTW_RD_2G_WORLD,		RTW_RD_5G_KCC1,		TXPWR_LMT_KCC),		/* 0x28, RTW_CHPLAN_WORLD_KCC1 */

+	CHPLAN_ENT(RTW_RD_2G_WORLD,		RTW_RD_5G_FCC2,		TXPWR_LMT_FCC),		/* 0x29, RTW_CHPLAN_WORLD_FCC2 */

+	CHPLAN_ENT(RTW_RD_2G_FCC2,		RTW_RD_5G_NULL,		TXPWR_LMT_FCC),		/* 0x2A, RTW_CHPLAN_FCC2_NULL */

+	CHPLAN_ENT(RTW_RD_2G_IC1,		RTW_RD_5G_IC2,		TXPWR_LMT_IC),		/* 0x2B, RTW_CHPLAN_IC1_IC2 */

+	CHPLAN_ENT(RTW_RD_2G_MKK2,		RTW_RD_5G_NULL,		TXPWR_LMT_MKK),		/* 0x2C, RTW_CHPLAN_MKK2_NULL */

+	CHPLAN_ENT(RTW_RD_2G_WORLD,		RTW_RD_5G_CHILE1,	TXPWR_LMT_CHILE),	/* 0x2D, RTW_CHPLAN_WORLD_CHILE1 */

+	CHPLAN_ENT(RTW_RD_2G_WORLD1,	RTW_RD_5G_WORLD1,	TXPWR_LMT_WW),		/* 0x2E, RTW_CHPLAN_WORLD1_WORLD1 */

+	CHPLAN_ENT(RTW_RD_2G_WORLD,		RTW_RD_5G_CHILE2,	TXPWR_LMT_CHILE),	/* 0x2F, RTW_CHPLAN_WORLD_CHILE2 */

+	CHPLAN_ENT(RTW_RD_2G_WORLD,		RTW_RD_5G_FCC3,		TXPWR_LMT_FCC),		/* 0x30, RTW_CHPLAN_WORLD_FCC3 */

+	CHPLAN_ENT(RTW_RD_2G_WORLD,		RTW_RD_5G_FCC4,		TXPWR_LMT_FCC),		/* 0x31, RTW_CHPLAN_WORLD_FCC4 */

+	CHPLAN_ENT(RTW_RD_2G_WORLD,		RTW_RD_5G_FCC5,		TXPWR_LMT_FCC),		/* 0x32, RTW_CHPLAN_WORLD_FCC5 */

+	CHPLAN_ENT(RTW_RD_2G_WORLD,		RTW_RD_5G_FCC6,		TXPWR_LMT_FCC),		/* 0x33, RTW_CHPLAN_WORLD_FCC6 */

+	CHPLAN_ENT(RTW_RD_2G_FCC1,		RTW_RD_5G_FCC7,		TXPWR_LMT_FCC),		/* 0x34, RTW_CHPLAN_FCC1_FCC7 */

+	CHPLAN_ENT(RTW_RD_2G_WORLD,		RTW_RD_5G_ETSI2,	TXPWR_LMT_ETSI),	/* 0x35, RTW_CHPLAN_WORLD_ETSI2 */

+	CHPLAN_ENT(RTW_RD_2G_WORLD,		RTW_RD_5G_ETSI3,	TXPWR_LMT_ETSI),	/* 0x36, RTW_CHPLAN_WORLD_ETSI3 */

+	CHPLAN_ENT(RTW_RD_2G_MKK1,		RTW_RD_5G_MKK2,		TXPWR_LMT_MKK),		/* 0x37, RTW_CHPLAN_MKK1_MKK2 */

+	CHPLAN_ENT(RTW_RD_2G_MKK1,		RTW_RD_5G_MKK3,		TXPWR_LMT_MKK),		/* 0x38, RTW_CHPLAN_MKK1_MKK3 */

+	CHPLAN_ENT(RTW_RD_2G_FCC1,		RTW_RD_5G_NCC1,		TXPWR_LMT_FCC),		/* 0x39, RTW_CHPLAN_FCC1_NCC1 */

+	CHPLAN_ENT(RTW_RD_2G_ETSI1,		RTW_RD_5G_ETSI1,	TXPWR_LMT_ETSI),	/* 0x3A, RTW_CHPLAN_ETSI1_ETSI1 */

+	CHPLAN_ENT(RTW_RD_2G_ETSI1,		RTW_RD_5G_ACMA1,	TXPWR_LMT_ACMA),	/* 0x3B, RTW_CHPLAN_ETSI1_ACMA1 */

+	CHPLAN_ENT(RTW_RD_2G_ETSI1,		RTW_RD_5G_ETSI6,	TXPWR_LMT_ETSI),	/* 0x3C, RTW_CHPLAN_ETSI1_ETSI6 */

+	CHPLAN_ENT(RTW_RD_2G_ETSI1,		RTW_RD_5G_ETSI12,	TXPWR_LMT_ETSI),	/* 0x3D, RTW_CHPLAN_ETSI1_ETSI12 */

+	CHPLAN_ENT(RTW_RD_2G_KCC1,		RTW_RD_5G_KCC2,		TXPWR_LMT_KCC),		/* 0x3E, RTW_CHPLAN_KCC1_KCC2 */

+	CHPLAN_ENT(RTW_RD_2G_FCC1,		RTW_RD_5G_FCC11,	TXPWR_LMT_FCC),		/* 0x3F, RTW_CHPLAN_FCC1_FCC11*/

+	CHPLAN_ENT(RTW_RD_2G_FCC1,		RTW_RD_5G_NCC2,		TXPWR_LMT_FCC),		/* 0x40, RTW_CHPLAN_FCC1_NCC2 */

+	CHPLAN_ENT(RTW_RD_2G_GLOBAL,	RTW_RD_5G_NULL,		TXPWR_LMT_WW),		/* 0x41, RTW_CHPLAN_GLOBAL_NULL */

+	CHPLAN_ENT(RTW_RD_2G_ETSI1,		RTW_RD_5G_ETSI4,	TXPWR_LMT_ETSI),	/* 0x42, RTW_CHPLAN_ETSI1_ETSI4 */

+	CHPLAN_ENT(RTW_RD_2G_FCC1,		RTW_RD_5G_FCC2,		TXPWR_LMT_FCC),		/* 0x43, RTW_CHPLAN_FCC1_FCC2 */

+	CHPLAN_ENT(RTW_RD_2G_FCC1,		RTW_RD_5G_NCC3,		TXPWR_LMT_FCC),		/* 0x44, RTW_CHPLAN_FCC1_NCC3 */

+	CHPLAN_ENT(RTW_RD_2G_WORLD,		RTW_RD_5G_ACMA1,	TXPWR_LMT_ACMA),	/* 0x45, RTW_CHPLAN_WORLD_ACMA1 */

+	CHPLAN_ENT(RTW_RD_2G_FCC1,		RTW_RD_5G_FCC8,		TXPWR_LMT_FCC),		/* 0x46, RTW_CHPLAN_FCC1_FCC8 */

+	CHPLAN_ENT(RTW_RD_2G_WORLD,		RTW_RD_5G_ETSI6,	TXPWR_LMT_ETSI),	/* 0x47, RTW_CHPLAN_WORLD_ETSI6 */

+	CHPLAN_ENT(RTW_RD_2G_WORLD,		RTW_RD_5G_ETSI7,	TXPWR_LMT_ETSI),	/* 0x48, RTW_CHPLAN_WORLD_ETSI7 */

+	CHPLAN_ENT(RTW_RD_2G_WORLD,		RTW_RD_5G_ETSI8,	TXPWR_LMT_ETSI),	/* 0x49, RTW_CHPLAN_WORLD_ETSI8 */

+	CHPLAN_ENT(RTW_RD_2G_IC2,		RTW_RD_5G_IC2,		TXPWR_LMT_IC),		/* 0x4A, RTW_CHPLAN_IC2_IC2 */

+	CHPLAN_ENT(RTW_RD_2G_NULL,		RTW_RD_5G_NULL,		TXPWR_LMT_WW),		/* 0x4B, */

+	CHPLAN_ENT(RTW_RD_2G_NULL,		RTW_RD_5G_NULL,		TXPWR_LMT_WW),		/* 0x4C, */

+	CHPLAN_ENT(RTW_RD_2G_NULL,		RTW_RD_5G_NULL,		TXPWR_LMT_WW),		/* 0x4D, */

+	CHPLAN_ENT(RTW_RD_2G_NULL,		RTW_RD_5G_NULL,		TXPWR_LMT_WW),		/* 0x4E, */

+	CHPLAN_ENT(RTW_RD_2G_NULL,		RTW_RD_5G_NULL,		TXPWR_LMT_WW),		/* 0x4F, */

+	CHPLAN_ENT(RTW_RD_2G_WORLD,		RTW_RD_5G_ETSI9,	TXPWR_LMT_ETSI),	/* 0x50, RTW_CHPLAN_WORLD_ETSI9 */

+	CHPLAN_ENT(RTW_RD_2G_WORLD,		RTW_RD_5G_ETSI10,	TXPWR_LMT_ETSI),	/* 0x51, RTW_CHPLAN_WORLD_ETSI10 */

+	CHPLAN_ENT(RTW_RD_2G_WORLD,		RTW_RD_5G_ETSI11,	TXPWR_LMT_ETSI),	/* 0x52, RTW_CHPLAN_WORLD_ETSI11 */

+	CHPLAN_ENT(RTW_RD_2G_FCC1,		RTW_RD_5G_NCC4,		TXPWR_LMT_FCC),		/* 0x53, RTW_CHPLAN_FCC1_NCC4 */

+	CHPLAN_ENT(RTW_RD_2G_WORLD,		RTW_RD_5G_ETSI12,	TXPWR_LMT_ETSI),	/* 0x54, RTW_CHPLAN_WORLD_ETSI12 */

+	CHPLAN_ENT(RTW_RD_2G_FCC1,		RTW_RD_5G_FCC9,		TXPWR_LMT_FCC),		/* 0x55, RTW_CHPLAN_FCC1_FCC9 */

+	CHPLAN_ENT(RTW_RD_2G_WORLD,		RTW_RD_5G_ETSI13,	TXPWR_LMT_ETSI),	/* 0x56, RTW_CHPLAN_WORLD_ETSI13 */

+	CHPLAN_ENT(RTW_RD_2G_FCC1,		RTW_RD_5G_FCC10,	TXPWR_LMT_FCC),		/* 0x57, RTW_CHPLAN_FCC1_FCC10 */

+	CHPLAN_ENT(RTW_RD_2G_MKK2,		RTW_RD_5G_MKK4,		TXPWR_LMT_MKK),		/* 0x58, RTW_CHPLAN_MKK2_MKK4 */

+	CHPLAN_ENT(RTW_RD_2G_WORLD,		RTW_RD_5G_ETSI14,	TXPWR_LMT_ETSI),	/* 0x59, RTW_CHPLAN_WORLD_ETSI14 */

+	CHPLAN_ENT(RTW_RD_2G_NULL,		RTW_RD_5G_NULL,		TXPWR_LMT_WW),		/* 0x5A, */

+	CHPLAN_ENT(RTW_RD_2G_NULL,		RTW_RD_5G_NULL,		TXPWR_LMT_WW),		/* 0x5B, */

+	CHPLAN_ENT(RTW_RD_2G_NULL,		RTW_RD_5G_NULL,		TXPWR_LMT_WW),		/* 0x5C, */

+	CHPLAN_ENT(RTW_RD_2G_NULL,		RTW_RD_5G_NULL,		TXPWR_LMT_WW),		/* 0x5D, */

+	CHPLAN_ENT(RTW_RD_2G_NULL,		RTW_RD_5G_NULL,		TXPWR_LMT_WW),		/* 0x5E, */

+	CHPLAN_ENT(RTW_RD_2G_NULL,		RTW_RD_5G_NULL,		TXPWR_LMT_WW),		/* 0x5F, */

+	CHPLAN_ENT(RTW_RD_2G_FCC1,		RTW_RD_5G_FCC5,		TXPWR_LMT_FCC),		/* 0x60, RTW_CHPLAN_FCC1_FCC5 */

+	CHPLAN_ENT(RTW_RD_2G_FCC2,		RTW_RD_5G_FCC7,		TXPWR_LMT_FCC),		/* 0x61, RTW_CHPLAN_FCC2_FCC7 */

+	CHPLAN_ENT(RTW_RD_2G_FCC2,		RTW_RD_5G_FCC1,		TXPWR_LMT_FCC),		/* 0x62, RTW_CHPLAN_FCC2_FCC1 */

+	CHPLAN_ENT(RTW_RD_2G_WORLD,		RTW_RD_5G_ETSI15,	TXPWR_LMT_ETSI),	/* 0x63, RTW_CHPLAN_WORLD_ETSI15 */

+	CHPLAN_ENT(RTW_RD_2G_MKK2,		RTW_RD_5G_MKK5,		TXPWR_LMT_MKK),		/* 0x64, RTW_CHPLAN_MKK2_MKK5 */

+	CHPLAN_ENT(RTW_RD_2G_ETSI1,		RTW_RD_5G_ETSI16,	TXPWR_LMT_ETSI),	/* 0x65, RTW_CHPLAN_ETSI1_ETSI16 */

+	CHPLAN_ENT(RTW_RD_2G_FCC1,		RTW_RD_5G_FCC14,	TXPWR_LMT_FCC),		/* 0x66, RTW_CHPLAN_FCC1_FCC14 */

+	CHPLAN_ENT(RTW_RD_2G_FCC1,		RTW_RD_5G_FCC12,	TXPWR_LMT_FCC),		/* 0x67, RTW_CHPLAN_FCC1_FCC12 */

+	CHPLAN_ENT(RTW_RD_2G_FCC2,		RTW_RD_5G_FCC14,	TXPWR_LMT_FCC),		/* 0x68, RTW_CHPLAN_FCC2_FCC14 */

+	CHPLAN_ENT(RTW_RD_2G_FCC2,		RTW_RD_5G_FCC12,	TXPWR_LMT_FCC),		/* 0x69, RTW_CHPLAN_FCC2_FCC12 */

+	CHPLAN_ENT(RTW_RD_2G_ETSI1,		RTW_RD_5G_ETSI17,	TXPWR_LMT_ETSI),	/* 0x6A, RTW_CHPLAN_ETSI1_ETSI17 */

+	CHPLAN_ENT(RTW_RD_2G_WORLD,		RTW_RD_5G_FCC16,	TXPWR_LMT_FCC),		/* 0x6B, RTW_CHPLAN_WORLD_FCC16 */

+	CHPLAN_ENT(RTW_RD_2G_WORLD,		RTW_RD_5G_FCC13,	TXPWR_LMT_FCC),		/* 0x6C, RTW_CHPLAN_WORLD_FCC13 */

+	CHPLAN_ENT(RTW_RD_2G_FCC2,		RTW_RD_5G_FCC15,	TXPWR_LMT_FCC),		/* 0x6D, RTW_CHPLAN_FCC2_FCC15 */

+	CHPLAN_ENT(RTW_RD_2G_WORLD,		RTW_RD_5G_FCC12,	TXPWR_LMT_FCC),		/* 0x6E, RTW_CHPLAN_WORLD_FCC12 */

+	CHPLAN_ENT(RTW_RD_2G_NULL,		RTW_RD_5G_ETSI8,	TXPWR_LMT_ETSI),	/* 0x6F, RTW_CHPLAN_NULL_ETSI8 */

+	CHPLAN_ENT(RTW_RD_2G_NULL,		RTW_RD_5G_ETSI18,	TXPWR_LMT_ETSI),	/* 0x70, RTW_CHPLAN_NULL_ETSI18 */

+	CHPLAN_ENT(RTW_RD_2G_NULL,		RTW_RD_5G_ETSI17,	TXPWR_LMT_ETSI),	/* 0x71, RTW_CHPLAN_NULL_ETSI17 */

+	CHPLAN_ENT(RTW_RD_2G_NULL,		RTW_RD_5G_ETSI19,	TXPWR_LMT_ETSI),	/* 0x72, RTW_CHPLAN_NULL_ETSI19 */

+	CHPLAN_ENT(RTW_RD_2G_WORLD,		RTW_RD_5G_FCC7,		TXPWR_LMT_FCC),		/* 0x73, RTW_CHPLAN_WORLD_FCC7 */

+	CHPLAN_ENT(RTW_RD_2G_FCC2,		RTW_RD_5G_FCC17,	TXPWR_LMT_FCC),		/* 0x74, RTW_CHPLAN_FCC2_FCC17 */

+	CHPLAN_ENT(RTW_RD_2G_WORLD,		RTW_RD_5G_ETSI20,	TXPWR_LMT_ETSI),	/* 0x75, RTW_CHPLAN_WORLD_ETSI20 */

+	CHPLAN_ENT(RTW_RD_2G_FCC2,		RTW_RD_5G_FCC11,	TXPWR_LMT_FCC),		/* 0x76, RTW_CHPLAN_FCC2_FCC11 */

+	CHPLAN_ENT(RTW_RD_2G_WORLD,		RTW_RD_5G_ETSI21,	TXPWR_LMT_ETSI),	/* 0x77, RTW_CHPLAN_WORLD_ETSI21 */

+	CHPLAN_ENT(RTW_RD_2G_FCC1,		RTW_RD_5G_FCC18,	TXPWR_LMT_FCC),		/* 0x78, RTW_CHPLAN_FCC1_FCC18 */

+	CHPLAN_ENT(RTW_RD_2G_MKK2,		RTW_RD_5G_MKK1,		TXPWR_LMT_MKK),		/* 0x79, RTW_CHPLAN_MKK2_MKK1 */

+};

+

+static struct chplan_ent_t RTW_CHANNEL_PLAN_MAP_REALTEK_DEFINE =

+	CHPLAN_ENT(RTW_RD_2G_WORLD,		RTW_RD_5G_FCC1,		TXPWR_LMT_FCC);		/* 0x7F, Realtek Define */

+

+u8 rtw_chplan_get_default_regd(u8 id)

+{

+	u8 regd;

+

+	if (id == RTW_CHPLAN_REALTEK_DEFINE)

+		regd = RTW_CHANNEL_PLAN_MAP_REALTEK_DEFINE.regd;

+	else

+		regd = RTW_ChannelPlanMap[id].regd;

+

+	return regd;

+}

+

+bool rtw_chplan_is_empty(u8 id)

+{

+	struct chplan_ent_t *chplan_map;

+

+	if (id == RTW_CHPLAN_REALTEK_DEFINE)

+		chplan_map = &RTW_CHANNEL_PLAN_MAP_REALTEK_DEFINE;

+	else

+		chplan_map = &RTW_ChannelPlanMap[id];

+

+	if (chplan_map->rd_2g == RTW_RD_2G_NULL

+		#ifdef CONFIG_IEEE80211_BAND_5GHZ

+		&& chplan_map->rd_5g == RTW_RD_5G_NULL

+		#endif

+	)

+		return _TRUE;

+

+	return _FALSE;

+}

+

+bool rtw_regsty_is_excl_chs(struct registry_priv *regsty, u8 ch)

+{

+	int i;

+

+	for (i = 0; i < MAX_CHANNEL_NUM; i++) {

+		if (regsty->excl_chs[i] == 0)

+			break;

+		if (regsty->excl_chs[i] == ch)

+			return _TRUE;

+	}

+	return _FALSE;

+}

+

+inline static u8 rtw_rd_5g_band1_passive(u8 rtw_rd_5g)

+{

+	u8 passive = 0;

+

+	switch (rtw_rd_5g) {

+	case RTW_RD_5G_FCC13:

+	case RTW_RD_5G_FCC16:

+	case RTW_RD_5G_ETSI18:

+	case RTW_RD_5G_ETSI19:

+	case RTW_RD_5G_WORLD:

+	case RTW_RD_5G_WORLD1:

+		passive = 1;

+	};

+

+	return passive;

+}

+

+inline static u8 rtw_rd_5g_band4_passive(u8 rtw_rd_5g)

+{

+	u8 passive = 0;

+

+	switch (rtw_rd_5g) {

+	case RTW_RD_5G_MKK5:

+	case RTW_RD_5G_ETSI16:

+	case RTW_RD_5G_ETSI18:

+	case RTW_RD_5G_ETSI19:

+	case RTW_RD_5G_WORLD:

+		passive = 1;

+	};

+

+	return passive;

+}

+

+u8 init_channel_set(_adapter *padapter, u8 ChannelPlan, RT_CHANNEL_INFO *channel_set)

+{

+	struct registry_priv *regsty = adapter_to_regsty(padapter);

+	u8	index, chanset_size = 0;

+	u8	b5GBand = _FALSE, b2_4GBand = _FALSE;

+	u8	rd_2g = 0, rd_5g = 0;

+#ifdef CONFIG_DFS_MASTER

+	int i;

+#endif

+

+	if (!rtw_is_channel_plan_valid(ChannelPlan)) {

+		RTW_ERR("ChannelPlan ID 0x%02X error !!!!!\n", ChannelPlan);

+		return chanset_size;

+	}

+

+	_rtw_memset(channel_set, 0, sizeof(RT_CHANNEL_INFO) * MAX_CHANNEL_NUM);

+

+	if (IsSupported24G(regsty->wireless_mode) && hal_chk_band_cap(padapter, BAND_CAP_2G))

+		b2_4GBand = _TRUE;

+

+	if (is_supported_5g(regsty->wireless_mode) && hal_chk_band_cap(padapter, BAND_CAP_5G))

+		b5GBand = _TRUE;

+

+	if (b2_4GBand == _FALSE && b5GBand == _FALSE) {

+		RTW_WARN("HW band_cap has no intersection with SW wireless_mode setting\n");

+		return chanset_size;

+	}

+

+	if (b2_4GBand) {

+		if (ChannelPlan == RTW_CHPLAN_REALTEK_DEFINE)

+			rd_2g = RTW_CHANNEL_PLAN_MAP_REALTEK_DEFINE.rd_2g;

+		else

+			rd_2g = RTW_ChannelPlanMap[ChannelPlan].rd_2g;

+

+		for (index = 0; index < CH_LIST_LEN(RTW_ChannelPlan2G[rd_2g]); index++) {

+			if (rtw_regsty_is_excl_chs(regsty, CH_LIST_CH(RTW_ChannelPlan2G[rd_2g], index)) == _TRUE)

+				continue;

+

+			if (chanset_size >= MAX_CHANNEL_NUM) {

+				RTW_WARN("chset size can't exceed MAX_CHANNEL_NUM(%u)\n", MAX_CHANNEL_NUM);

+				break;

+			}

+

+			channel_set[chanset_size].ChannelNum = CH_LIST_CH(RTW_ChannelPlan2G[rd_2g], index);

+

+			if (ChannelPlan == RTW_CHPLAN_GLOBAL_DOAMIN

+				|| rd_2g == RTW_RD_2G_GLOBAL

+			) {

+				/* Channel 1~11 is active, and 12~14 is passive */

+				if (channel_set[chanset_size].ChannelNum >= 1 && channel_set[chanset_size].ChannelNum <= 11)

+					channel_set[chanset_size].ScanType = SCAN_ACTIVE;

+				else if ((channel_set[chanset_size].ChannelNum  >= 12 && channel_set[chanset_size].ChannelNum  <= 14))

+					channel_set[chanset_size].ScanType  = SCAN_PASSIVE;

+			} else if (ChannelPlan == RTW_CHPLAN_WORLD_WIDE_13

+				|| ChannelPlan == RTW_CHPLAN_WORLD_WIDE_5G

+				|| rd_2g == RTW_RD_2G_WORLD

+			) {

+				/* channel 12~13, passive scan */

+				if (channel_set[chanset_size].ChannelNum <= 11)

+					channel_set[chanset_size].ScanType = SCAN_ACTIVE;

+				else

+					channel_set[chanset_size].ScanType = SCAN_PASSIVE;

+			} else

+				channel_set[chanset_size].ScanType = SCAN_ACTIVE;

+

+			chanset_size++;

+		}

+	}

+

+#ifdef CONFIG_IEEE80211_BAND_5GHZ

+	if (b5GBand) {

+		if (ChannelPlan == RTW_CHPLAN_REALTEK_DEFINE)

+			rd_5g = RTW_CHANNEL_PLAN_MAP_REALTEK_DEFINE.rd_5g;

+		else

+			rd_5g = RTW_ChannelPlanMap[ChannelPlan].rd_5g;

+

+		for (index = 0; index < CH_LIST_LEN(RTW_ChannelPlan5G[rd_5g]); index++) {

+			if (rtw_regsty_is_excl_chs(regsty, CH_LIST_CH(RTW_ChannelPlan5G[rd_5g], index)) == _TRUE)

+				continue;

+			#ifndef CONFIG_DFS

+			if (rtw_is_dfs_ch(CH_LIST_CH(RTW_ChannelPlan5G[rd_5g], index)))

+				continue;

+			#endif

+

+			if (chanset_size >= MAX_CHANNEL_NUM) {

+				RTW_WARN("chset size can't exceed MAX_CHANNEL_NUM(%u)\n", MAX_CHANNEL_NUM);

+				break;

+			}

+

+			channel_set[chanset_size].ChannelNum = CH_LIST_CH(RTW_ChannelPlan5G[rd_5g], index);

+

+			if ((ChannelPlan == RTW_CHPLAN_WORLD_WIDE_5G) /* all channels passive */

+				|| (rtw_is_5g_band1(channel_set[chanset_size].ChannelNum)

+					&& rtw_rd_5g_band1_passive(rd_5g)) /* band1 passive */

+				|| (rtw_is_5g_band4(channel_set[chanset_size].ChannelNum)

+					&& rtw_rd_5g_band4_passive(rd_5g)) /* band4 passive */

+				|| (rtw_is_dfs_ch(channel_set[chanset_size].ChannelNum)) /* DFS channel(band2, 3) passive */

+			)

+				channel_set[chanset_size].ScanType = SCAN_PASSIVE;

+			else

+				channel_set[chanset_size].ScanType = SCAN_ACTIVE;

+

+			chanset_size++;

+		}

+	}

+

+	#ifdef CONFIG_DFS_MASTER

+	for (i = 0; i < chanset_size; i++)

+		channel_set[i].non_ocp_end_time = rtw_get_current_time();

+	#endif

+#endif /* CONFIG_IEEE80211_BAND_5GHZ */

+

+	if (chanset_size)

+		RTW_INFO(FUNC_ADPT_FMT" ChannelPlan ID:0x%02x, ch num:%d\n"

+			, FUNC_ADPT_ARG(padapter), ChannelPlan, chanset_size);

+	else

+		RTW_WARN(FUNC_ADPT_FMT" ChannelPlan ID:0x%02x, final chset has no channel\n"

+			, FUNC_ADPT_ARG(padapter), ChannelPlan);

+

+	return chanset_size;

+}

+

+#ifdef CONFIG_80211AC_VHT

+#define COUNTRY_CHPLAN_ASSIGN_EN_11AC(_val) , .en_11ac = (_val)

+#else

+#define COUNTRY_CHPLAN_ASSIGN_EN_11AC(_val)

+#endif

+

+#if RTW_DEF_MODULE_REGULATORY_CERT

+#define COUNTRY_CHPLAN_ASSIGN_DEF_MODULE_FLAGS(_val) , .def_module_flags = (_val)

+#else

+#define COUNTRY_CHPLAN_ASSIGN_DEF_MODULE_FLAGS(_val)

+#endif

+

+/* has def_module_flags specified, used by common map and HAL dfference map */

+#define COUNTRY_CHPLAN_ENT(_alpha2, _chplan, _en_11ac, _def_module_flags) \

+	{.alpha2 = (_alpha2), .chplan = (_chplan) \

+		COUNTRY_CHPLAN_ASSIGN_EN_11AC(_en_11ac) \

+		COUNTRY_CHPLAN_ASSIGN_DEF_MODULE_FLAGS(_def_module_flags) \

+	}

+

+#ifdef CONFIG_CUSTOMIZED_COUNTRY_CHPLAN_MAP

+

+#include "../platform/custom_country_chplan.h"

+

+#elif RTW_DEF_MODULE_REGULATORY_CERT

+

+/* leave def_module_flags empty, def_module_flags check is done on country_chplan_map */

+#if (RTW_DEF_MODULE_REGULATORY_CERT & RTW_MODULE_RTL8821AE_HMC_M2) /* 2013 certify */

+static const struct country_chplan RTL8821AE_HMC_M2_country_chplan_exc_map[] = {

+	COUNTRY_CHPLAN_ENT("CA", 0x34, 1, 0), /* Canada */

+	COUNTRY_CHPLAN_ENT("CL", 0x30, 1, 0), /* Chile */

+	COUNTRY_CHPLAN_ENT("CN", 0x51, 1, 0), /* China */

+	COUNTRY_CHPLAN_ENT("CO", 0x34, 1, 0), /* Colombia */

+	COUNTRY_CHPLAN_ENT("CR", 0x34, 1, 0), /* Costa Rica */

+	COUNTRY_CHPLAN_ENT("DO", 0x34, 1, 0), /* Dominican Republic */

+	COUNTRY_CHPLAN_ENT("EC", 0x34, 1, 0), /* Ecuador */

+	COUNTRY_CHPLAN_ENT("GT", 0x34, 1, 0), /* Guatemala */

+	COUNTRY_CHPLAN_ENT("KR", 0x28, 1, 0), /* South Korea */

+	COUNTRY_CHPLAN_ENT("MX", 0x34, 1, 0), /* Mexico */

+	COUNTRY_CHPLAN_ENT("MY", 0x47, 1, 0), /* Malaysia */

+	COUNTRY_CHPLAN_ENT("NI", 0x34, 1, 0), /* Nicaragua */

+	COUNTRY_CHPLAN_ENT("PA", 0x34, 1, 0), /* Panama */

+	COUNTRY_CHPLAN_ENT("PE", 0x34, 1, 0), /* Peru */

+	COUNTRY_CHPLAN_ENT("PR", 0x34, 1, 0), /* Puerto Rico */

+	COUNTRY_CHPLAN_ENT("PY", 0x34, 1, 0), /* Paraguay */

+	COUNTRY_CHPLAN_ENT("TW", 0x39, 1, 0), /* Taiwan */

+	COUNTRY_CHPLAN_ENT("UA", 0x36, 0, 0), /* Ukraine */

+	COUNTRY_CHPLAN_ENT("US", 0x34, 1, 0), /* United States of America (USA) */

+};

+#endif

+

+#if (RTW_DEF_MODULE_REGULATORY_CERT & RTW_MODULE_RTL8821AU) /* 2014 certify */

+static const struct country_chplan RTL8821AU_country_chplan_exc_map[] = {

+	COUNTRY_CHPLAN_ENT("CA", 0x34, 1, 0), /* Canada */

+	COUNTRY_CHPLAN_ENT("KR", 0x28, 1, 0), /* South Korea */

+	COUNTRY_CHPLAN_ENT("RU", 0x59, 0, 0), /* Russia(fac/gost), Kaliningrad */

+	COUNTRY_CHPLAN_ENT("TW", 0x39, 1, 0), /* Taiwan */

+	COUNTRY_CHPLAN_ENT("UA", 0x36, 0, 0), /* Ukraine */

+	COUNTRY_CHPLAN_ENT("US", 0x34, 1, 0), /* United States of America (USA) */

+};

+#endif

+

+#if (RTW_DEF_MODULE_REGULATORY_CERT & RTW_MODULE_RTL8812AENF_NGFF) /* 2014 certify */

+static const struct country_chplan RTL8812AENF_NGFF_country_chplan_exc_map[] = {

+	COUNTRY_CHPLAN_ENT("TW", 0x39, 1, 0), /* Taiwan */

+	COUNTRY_CHPLAN_ENT("US", 0x34, 1, 0), /* United States of America (USA) */

+};

+#endif

+

+#if (RTW_DEF_MODULE_REGULATORY_CERT & RTW_MODULE_RTL8812AEBT_HMC) /* 2013 certify */

+static const struct country_chplan RTL8812AEBT_HMC_country_chplan_exc_map[] = {

+	COUNTRY_CHPLAN_ENT("CA", 0x34, 1, 0), /* Canada */

+	COUNTRY_CHPLAN_ENT("KR", 0x28, 1, 0), /* South Korea */

+	COUNTRY_CHPLAN_ENT("RU", 0x59, 0, 0), /* Russia(fac/gost), Kaliningrad */

+	COUNTRY_CHPLAN_ENT("TW", 0x39, 1, 0), /* Taiwan */

+	COUNTRY_CHPLAN_ENT("UA", 0x36, 0, 0), /* Ukraine */

+	COUNTRY_CHPLAN_ENT("US", 0x34, 1, 0), /* United States of America (USA) */

+};

+#endif

+

+#if (RTW_DEF_MODULE_REGULATORY_CERT & RTW_MODULE_RTL8188EE_HMC_M2) /* 2012 certify */

+static const struct country_chplan RTL8188EE_HMC_M2_country_chplan_exc_map[] = {

+	COUNTRY_CHPLAN_ENT("AW", 0x34, 1, 0), /* Aruba */

+	COUNTRY_CHPLAN_ENT("BB", 0x34, 1, 0), /* Barbados */

+	COUNTRY_CHPLAN_ENT("CA", 0x20, 1, 0), /* Canada */

+	COUNTRY_CHPLAN_ENT("CO", 0x34, 1, 0), /* Colombia */

+	COUNTRY_CHPLAN_ENT("CR", 0x34, 1, 0), /* Costa Rica */

+	COUNTRY_CHPLAN_ENT("DO", 0x34, 1, 0), /* Dominican Republic */

+	COUNTRY_CHPLAN_ENT("EC", 0x34, 1, 0), /* Ecuador */

+	COUNTRY_CHPLAN_ENT("GT", 0x34, 1, 0), /* Guatemala */

+	COUNTRY_CHPLAN_ENT("HT", 0x34, 1, 0), /* Haiti */

+	COUNTRY_CHPLAN_ENT("KR", 0x28, 1, 0), /* South Korea */

+	COUNTRY_CHPLAN_ENT("MX", 0x34, 1, 0), /* Mexico */

+	COUNTRY_CHPLAN_ENT("NI", 0x34, 1, 0), /* Nicaragua */

+	COUNTRY_CHPLAN_ENT("PA", 0x34, 1, 0), /* Panama */

+	COUNTRY_CHPLAN_ENT("PE", 0x34, 1, 0), /* Peru */

+	COUNTRY_CHPLAN_ENT("PR", 0x34, 1, 0), /* Puerto Rico */

+	COUNTRY_CHPLAN_ENT("PY", 0x34, 1, 0), /* Paraguay */

+	COUNTRY_CHPLAN_ENT("SC", 0x34, 1, 0), /* Seychelles */

+	COUNTRY_CHPLAN_ENT("TW", 0x39, 1, 0), /* Taiwan */

+	COUNTRY_CHPLAN_ENT("US", 0x34, 1, 0), /* United States of America (USA) */

+	COUNTRY_CHPLAN_ENT("VC", 0x34, 1, 0), /* Saint Vincent and the Grenadines */

+};

+#endif

+

+#if (RTW_DEF_MODULE_REGULATORY_CERT & RTW_MODULE_RTL8723BE_HMC_M2) /* 2013 certify */

+static const struct country_chplan RTL8723BE_HMC_M2_country_chplan_exc_map[] = {

+	COUNTRY_CHPLAN_ENT("AW", 0x34, 1, 0), /* Aruba */

+	COUNTRY_CHPLAN_ENT("BS", 0x34, 1, 0), /* Bahamas */

+	COUNTRY_CHPLAN_ENT("CA", 0x20, 1, 0), /* Canada */

+	COUNTRY_CHPLAN_ENT("CO", 0x34, 1, 0), /* Colombia */

+	COUNTRY_CHPLAN_ENT("CR", 0x34, 1, 0), /* Costa Rica */

+	COUNTRY_CHPLAN_ENT("DO", 0x34, 1, 0), /* Dominican Republic */

+	COUNTRY_CHPLAN_ENT("EC", 0x34, 1, 0), /* Ecuador */

+	COUNTRY_CHPLAN_ENT("GT", 0x34, 1, 0), /* Guatemala */

+	COUNTRY_CHPLAN_ENT("KR", 0x28, 1, 0), /* South Korea */

+	COUNTRY_CHPLAN_ENT("MX", 0x34, 1, 0), /* Mexico */

+	COUNTRY_CHPLAN_ENT("NI", 0x34, 1, 0), /* Nicaragua */

+	COUNTRY_CHPLAN_ENT("PA", 0x34, 1, 0), /* Panama */

+	COUNTRY_CHPLAN_ENT("PE", 0x34, 1, 0), /* Peru */

+	COUNTRY_CHPLAN_ENT("PR", 0x34, 1, 0), /* Puerto Rico */

+	COUNTRY_CHPLAN_ENT("PY", 0x34, 1, 0), /* Paraguay */

+	COUNTRY_CHPLAN_ENT("TW", 0x39, 1, 0), /* Taiwan */

+	COUNTRY_CHPLAN_ENT("US", 0x34, 1, 0), /* United States of America (USA) */

+};

+#endif

+

+#if (RTW_DEF_MODULE_REGULATORY_CERT & RTW_MODULE_RTL8723BS_NGFF1216) /* 2014 certify */

+static const struct country_chplan RTL8723BS_NGFF1216_country_chplan_exc_map[] = {

+	COUNTRY_CHPLAN_ENT("BB", 0x34, 1, 0), /* Barbados */

+	COUNTRY_CHPLAN_ENT("CA", 0x20, 1, 0), /* Canada */

+	COUNTRY_CHPLAN_ENT("CO", 0x34, 1, 0), /* Colombia */

+	COUNTRY_CHPLAN_ENT("CR", 0x34, 1, 0), /* Costa Rica */

+	COUNTRY_CHPLAN_ENT("DO", 0x34, 1, 0), /* Dominican Republic */

+	COUNTRY_CHPLAN_ENT("EC", 0x34, 1, 0), /* Ecuador */

+	COUNTRY_CHPLAN_ENT("GT", 0x34, 1, 0), /* Guatemala */

+	COUNTRY_CHPLAN_ENT("HT", 0x34, 1, 0), /* Haiti */

+	COUNTRY_CHPLAN_ENT("KR", 0x28, 1, 0), /* South Korea */

+	COUNTRY_CHPLAN_ENT("MX", 0x34, 1, 0), /* Mexico */

+	COUNTRY_CHPLAN_ENT("NI", 0x34, 1, 0), /* Nicaragua */

+	COUNTRY_CHPLAN_ENT("PA", 0x34, 1, 0), /* Panama */

+	COUNTRY_CHPLAN_ENT("PE", 0x34, 1, 0), /* Peru */

+	COUNTRY_CHPLAN_ENT("PR", 0x34, 1, 0), /* Puerto Rico */

+	COUNTRY_CHPLAN_ENT("PY", 0x34, 1, 0), /* Paraguay */

+	COUNTRY_CHPLAN_ENT("TW", 0x39, 1, 0), /* Taiwan */

+	COUNTRY_CHPLAN_ENT("US", 0x34, 1, 0), /* United States of America (USA) */

+};

+#endif

+

+#if (RTW_DEF_MODULE_REGULATORY_CERT & RTW_MODULE_RTL8192EEBT_HMC_M2) /* 2013 certify */

+static const struct country_chplan RTL8192EEBT_HMC_M2_country_chplan_exc_map[] = {

+	COUNTRY_CHPLAN_ENT("AW", 0x34, 1, 0), /* Aruba */

+	COUNTRY_CHPLAN_ENT("CA", 0x20, 1, 0), /* Canada */

+	COUNTRY_CHPLAN_ENT("CO", 0x34, 1, 0), /* Colombia */

+	COUNTRY_CHPLAN_ENT("CR", 0x34, 1, 0), /* Costa Rica */

+	COUNTRY_CHPLAN_ENT("DO", 0x34, 1, 0), /* Dominican Republic */

+	COUNTRY_CHPLAN_ENT("EC", 0x34, 1, 0), /* Ecuador */

+	COUNTRY_CHPLAN_ENT("GT", 0x34, 1, 0), /* Guatemala */

+	COUNTRY_CHPLAN_ENT("KR", 0x28, 1, 0), /* South Korea */

+	COUNTRY_CHPLAN_ENT("MX", 0x34, 1, 0), /* Mexico */

+	COUNTRY_CHPLAN_ENT("NI", 0x34, 1, 0), /* Nicaragua */

+	COUNTRY_CHPLAN_ENT("PA", 0x34, 1, 0), /* Panama */

+	COUNTRY_CHPLAN_ENT("PE", 0x34, 1, 0), /* Peru */

+	COUNTRY_CHPLAN_ENT("PR", 0x34, 1, 0), /* Puerto Rico */

+	COUNTRY_CHPLAN_ENT("PY", 0x34, 1, 0), /* Paraguay */

+	COUNTRY_CHPLAN_ENT("SC", 0x34, 1, 0), /* Seychelles */

+	COUNTRY_CHPLAN_ENT("ST", 0x34, 1, 0), /* Sao Tome and Principe */

+	COUNTRY_CHPLAN_ENT("TW", 0x39, 1, 0), /* Taiwan */

+	COUNTRY_CHPLAN_ENT("US", 0x34, 1, 0), /* United States of America (USA) */

+};

+#endif

+

+#if (RTW_DEF_MODULE_REGULATORY_CERT & RTW_MODULE_RTL8723DE_NGFF1630) /* 2016 certify */

+static const struct country_chplan RTL8723DE_NGFF1630_country_chplan_exc_map[] = {

+	COUNTRY_CHPLAN_ENT("CA", 0x2A, 1, 0), /* Canada */

+	COUNTRY_CHPLAN_ENT("KR", 0x28, 1, 0), /* South Korea */

+	COUNTRY_CHPLAN_ENT("MX", 0x34, 1, 0), /* Mexico */

+};

+#endif

+

+#if (RTW_DEF_MODULE_REGULATORY_CERT & RTW_MODULE_RTL8822BE) /* 2016 certify */

+static const struct country_chplan RTL8822BE_country_chplan_exc_map[] = {

+	COUNTRY_CHPLAN_ENT("KR", 0x28, 1, 0), /* South Korea */

+};

+#endif

+

+#if (RTW_DEF_MODULE_REGULATORY_CERT & RTW_MODULE_RTL8821CE) /* 2016 certify */

+static const struct country_chplan RTL8821CE_country_chplan_exc_map[] = {

+	COUNTRY_CHPLAN_ENT("KR", 0x28, 1, 0), /* South Korea */

+};

+#endif

+

+/**

+ * rtw_def_module_get_chplan_from_country -

+ * @country_code: string of country code

+ * @return:

+ * Return NULL for case referring to common map

+ */

+static const struct country_chplan *rtw_def_module_get_chplan_from_country(const char *country_code)

+{

+	const struct country_chplan *ent = NULL;

+	const struct country_chplan *hal_map = NULL;

+	u16 hal_map_sz = 0;

+	int i;

+

+	/* TODO: runtime selection for multi driver */

+#if (RTW_DEF_MODULE_REGULATORY_CERT == RTW_MODULE_RTL8821AE_HMC_M2)

+	hal_map = RTL8821AE_HMC_M2_country_chplan_exc_map;

+	hal_map_sz = sizeof(RTL8821AE_HMC_M2_country_chplan_exc_map) / sizeof(struct country_chplan);

+#elif (RTW_DEF_MODULE_REGULATORY_CERT == RTW_MODULE_RTL8821AU)

+	hal_map = RTL8821AU_country_chplan_exc_map;

+	hal_map_sz = sizeof(RTL8821AU_country_chplan_exc_map) / sizeof(struct country_chplan);

+#elif (RTW_DEF_MODULE_REGULATORY_CERT == RTW_MODULE_RTL8812AENF_NGFF)

+	hal_map = RTL8812AENF_NGFF_country_chplan_exc_map;

+	hal_map_sz = sizeof(RTL8812AENF_NGFF_country_chplan_exc_map) / sizeof(struct country_chplan);

+#elif (RTW_DEF_MODULE_REGULATORY_CERT == RTW_MODULE_RTL8812AEBT_HMC)

+	hal_map = RTL8812AEBT_HMC_country_chplan_exc_map;

+	hal_map_sz = sizeof(RTL8812AEBT_HMC_country_chplan_exc_map) / sizeof(struct country_chplan);

+#elif (RTW_DEF_MODULE_REGULATORY_CERT == RTW_MODULE_RTL8188EE_HMC_M2)

+	hal_map = RTL8188EE_HMC_M2_country_chplan_exc_map;

+	hal_map_sz = sizeof(RTL8188EE_HMC_M2_country_chplan_exc_map) / sizeof(struct country_chplan);

+#elif (RTW_DEF_MODULE_REGULATORY_CERT == RTW_MODULE_RTL8723BE_HMC_M2)

+	hal_map = RTL8723BE_HMC_M2_country_chplan_exc_map;

+	hal_map_sz = sizeof(RTL8723BE_HMC_M2_country_chplan_exc_map) / sizeof(struct country_chplan);

+#elif (RTW_DEF_MODULE_REGULATORY_CERT == RTW_MODULE_RTL8723BS_NGFF1216)

+	hal_map = RTL8723BS_NGFF1216_country_chplan_exc_map;

+	hal_map_sz = sizeof(RTL8723BS_NGFF1216_country_chplan_exc_map) / sizeof(struct country_chplan);

+#elif (RTW_DEF_MODULE_REGULATORY_CERT == RTW_MODULE_RTL8192EEBT_HMC_M2)

+	hal_map = RTL8192EEBT_HMC_M2_country_chplan_exc_map;

+	hal_map_sz = sizeof(RTL8192EEBT_HMC_M2_country_chplan_exc_map) / sizeof(struct country_chplan);

+#elif (RTW_DEF_MODULE_REGULATORY_CERT == RTW_MODULE_RTL8723DE_NGFF1630)

+	hal_map = RTL8723DE_NGFF1630_country_chplan_exc_map;

+	hal_map_sz = sizeof(RTL8723DE_NGFF1630_country_chplan_exc_map) / sizeof(struct country_chplan);

+#elif (RTW_DEF_MODULE_REGULATORY_CERT == RTW_MODULE_RTL8822BE)

+	hal_map = RTL8822BE_country_chplan_exc_map;

+	hal_map_sz = sizeof(RTL8822BE_country_chplan_exc_map) / sizeof(struct country_chplan);

+#elif (RTW_DEF_MODULE_REGULATORY_CERT == RTW_MODULE_RTL8821CE)

+	hal_map = RTL8821CE_country_chplan_exc_map;

+	hal_map_sz = sizeof(RTL8821CE_country_chplan_exc_map) / sizeof(struct country_chplan);

+#endif

+

+	if (hal_map == NULL || hal_map_sz == 0)

+		goto exit;

+

+	for (i = 0; i < hal_map_sz; i++) {

+		if (strncmp(country_code, hal_map[i].alpha2, 2) == 0) {

+			ent = &hal_map[i];

+			break;

+		}

+	}

+

+exit:

+	return ent;

+}

+#endif /* CONFIG_CUSTOMIZED_COUNTRY_CHPLAN_MAP or RTW_DEF_MODULE_REGULATORY_CERT */

+

+static const struct country_chplan country_chplan_map[] = {

+	COUNTRY_CHPLAN_ENT("AD", 0x26, 1, 0x000), /* Andorra */

+	COUNTRY_CHPLAN_ENT("AE", 0x35, 1, 0x7FB), /* United Arab Emirates */

+	COUNTRY_CHPLAN_ENT("AF", 0x42, 1, 0x000), /* Afghanistan */

+	COUNTRY_CHPLAN_ENT("AG", 0x76, 1, 0x000), /* Antigua & Barbuda */

+	COUNTRY_CHPLAN_ENT("AI", 0x26, 1, 0x000), /* Anguilla(UK) */

+	COUNTRY_CHPLAN_ENT("AL", 0x26, 1, 0x7F1), /* Albania */

+	COUNTRY_CHPLAN_ENT("AM", 0x26, 1, 0x6B0), /* Armenia */

+	COUNTRY_CHPLAN_ENT("AN", 0x76, 1, 0x7F1), /* Netherlands Antilles */

+	COUNTRY_CHPLAN_ENT("AO", 0x47, 1, 0x6E0), /* Angola */

+	COUNTRY_CHPLAN_ENT("AQ", 0x26, 1, 0x000), /* Antarctica */

+	COUNTRY_CHPLAN_ENT("AR", 0x61, 1, 0x7F3), /* Argentina */

+	COUNTRY_CHPLAN_ENT("AS", 0x76, 1, 0x000), /* American Samoa */

+	COUNTRY_CHPLAN_ENT("AT", 0x26, 1, 0x7FB), /* Austria */

+	COUNTRY_CHPLAN_ENT("AU", 0x45, 1, 0x7FB), /* Australia */

+	COUNTRY_CHPLAN_ENT("AW", 0x76, 1, 0x0B0), /* Aruba */

+	COUNTRY_CHPLAN_ENT("AZ", 0x26, 1, 0x7F1), /* Azerbaijan */

+	COUNTRY_CHPLAN_ENT("BA", 0x26, 1, 0x7F1), /* Bosnia & Herzegovina */

+	COUNTRY_CHPLAN_ENT("BB", 0x76, 1, 0x650), /* Barbados */

+	COUNTRY_CHPLAN_ENT("BD", 0x26, 1, 0x7F1), /* Bangladesh */

+	COUNTRY_CHPLAN_ENT("BE", 0x26, 1, 0x7FB), /* Belgium */

+	COUNTRY_CHPLAN_ENT("BF", 0x26, 1, 0x6B0), /* Burkina Faso */

+	COUNTRY_CHPLAN_ENT("BG", 0x26, 1, 0x7F1), /* Bulgaria */

+	COUNTRY_CHPLAN_ENT("BH", 0x48, 1, 0x7F1), /* Bahrain */

+	COUNTRY_CHPLAN_ENT("BI", 0x26, 1, 0x6B0), /* Burundi */

+	COUNTRY_CHPLAN_ENT("BJ", 0x26, 1, 0x6B0), /* Benin */

+	COUNTRY_CHPLAN_ENT("BM", 0x76, 1, 0x600), /* Bermuda (UK) */

+	COUNTRY_CHPLAN_ENT("BN", 0x47, 1, 0x610), /* Brunei */

+	COUNTRY_CHPLAN_ENT("BO", 0x73, 1, 0x7F1), /* Bolivia */

+	COUNTRY_CHPLAN_ENT("BR", 0x62, 1, 0x7F1), /* Brazil */

+	COUNTRY_CHPLAN_ENT("BS", 0x76, 1, 0x620), /* Bahamas */

+	COUNTRY_CHPLAN_ENT("BT", 0x26, 1, 0x000), /* Bhutan */

+	COUNTRY_CHPLAN_ENT("BV", 0x26, 1, 0x000), /* Bouvet Island (Norway) */

+	COUNTRY_CHPLAN_ENT("BW", 0x35, 1, 0x6F1), /* Botswana */

+	COUNTRY_CHPLAN_ENT("BY", 0x26, 1, 0x7F1), /* Belarus */

+	COUNTRY_CHPLAN_ENT("BZ", 0x76, 1, 0x000), /* Belize */

+	COUNTRY_CHPLAN_ENT("CA", 0x2B, 1, 0x7FB), /* Canada */

+	COUNTRY_CHPLAN_ENT("CC", 0x26, 1, 0x000), /* Cocos (Keeling) Islands (Australia) */

+	COUNTRY_CHPLAN_ENT("CD", 0x26, 1, 0x6B0), /* Congo, Republic of the */

+	COUNTRY_CHPLAN_ENT("CF", 0x26, 1, 0x6B0), /* Central African Republic */

+	COUNTRY_CHPLAN_ENT("CG", 0x26, 1, 0x6B0), /* Congo, Democratic Republic of the. Zaire */

+	COUNTRY_CHPLAN_ENT("CH", 0x26, 1, 0x7FB), /* Switzerland */

+	COUNTRY_CHPLAN_ENT("CI", 0x26, 1, 0x7F1), /* Cote d'Ivoire */

+	COUNTRY_CHPLAN_ENT("CK", 0x26, 1, 0x000), /* Cook Islands */

+	COUNTRY_CHPLAN_ENT("CL", 0x2D, 1, 0x7F1), /* Chile */

+	COUNTRY_CHPLAN_ENT("CM", 0x26, 1, 0x6B0), /* Cameroon */

+	COUNTRY_CHPLAN_ENT("CN", 0x48, 1, 0x7FB), /* China */

+	COUNTRY_CHPLAN_ENT("CO", 0x76, 1, 0x7F1), /* Colombia */

+	COUNTRY_CHPLAN_ENT("CR", 0x76, 1, 0x7F1), /* Costa Rica */

+	COUNTRY_CHPLAN_ENT("CV", 0x26, 1, 0x6B0), /* Cape Verde */

+	COUNTRY_CHPLAN_ENT("CX", 0x45, 1, 0x000), /* Christmas Island (Australia) */

+	COUNTRY_CHPLAN_ENT("CY", 0x26, 1, 0x7FB), /* Cyprus */

+	COUNTRY_CHPLAN_ENT("CZ", 0x26, 1, 0x7FB), /* Czech Republic */

+	COUNTRY_CHPLAN_ENT("DE", 0x26, 1, 0x7FB), /* Germany */

+	COUNTRY_CHPLAN_ENT("DJ", 0x26, 1, 0x680), /* Djibouti */

+	COUNTRY_CHPLAN_ENT("DK", 0x26, 1, 0x7FB), /* Denmark */

+	COUNTRY_CHPLAN_ENT("DM", 0x76, 1, 0x000), /* Dominica */

+	COUNTRY_CHPLAN_ENT("DO", 0x76, 1, 0x7F1), /* Dominican Republic */

+	COUNTRY_CHPLAN_ENT("DZ", 0x26, 1, 0x7F1), /* Algeria */

+	COUNTRY_CHPLAN_ENT("EC", 0x76, 1, 0x7F1), /* Ecuador */

+	COUNTRY_CHPLAN_ENT("EE", 0x26, 1, 0x7FB), /* Estonia */

+	COUNTRY_CHPLAN_ENT("EG", 0x47, 1, 0x7F1), /* Egypt */

+	COUNTRY_CHPLAN_ENT("EH", 0x47, 1, 0x680), /* Western Sahara */

+	COUNTRY_CHPLAN_ENT("ER", 0x26, 1, 0x000), /* Eritrea */

+	COUNTRY_CHPLAN_ENT("ES", 0x26, 1, 0x7FB), /* Spain, Canary Islands, Ceuta, Melilla */

+	COUNTRY_CHPLAN_ENT("ET", 0x26, 1, 0x4B0), /* Ethiopia */

+	COUNTRY_CHPLAN_ENT("FI", 0x26, 1, 0x7FB), /* Finland */

+	COUNTRY_CHPLAN_ENT("FJ", 0x76, 1, 0x600), /* Fiji */

+	COUNTRY_CHPLAN_ENT("FK", 0x26, 1, 0x000), /* Falkland Islands (Islas Malvinas) (UK) */

+	COUNTRY_CHPLAN_ENT("FM", 0x76, 1, 0x000), /* Micronesia, Federated States of (USA) */

+	COUNTRY_CHPLAN_ENT("FO", 0x26, 1, 0x000), /* Faroe Islands (Denmark) */

+	COUNTRY_CHPLAN_ENT("FR", 0x26, 1, 0x7FB), /* France */

+	COUNTRY_CHPLAN_ENT("GA", 0x26, 1, 0x6B0), /* Gabon */

+	COUNTRY_CHPLAN_ENT("GB", 0x26, 1, 0x7FB), /* Great Britain (United Kingdom; England) */

+	COUNTRY_CHPLAN_ENT("GD", 0x76, 1, 0x0B0), /* Grenada */

+	COUNTRY_CHPLAN_ENT("GE", 0x26, 1, 0x600), /* Georgia */

+	COUNTRY_CHPLAN_ENT("GF", 0x26, 1, 0x080), /* French Guiana */

+	COUNTRY_CHPLAN_ENT("GG", 0x26, 1, 0x000), /* Guernsey (UK) */

+	COUNTRY_CHPLAN_ENT("GH", 0x26, 1, 0x7F1), /* Ghana */

+	COUNTRY_CHPLAN_ENT("GI", 0x26, 1, 0x600), /* Gibraltar (UK) */

+	COUNTRY_CHPLAN_ENT("GL", 0x26, 1, 0x600), /* Greenland (Denmark) */

+	COUNTRY_CHPLAN_ENT("GM", 0x26, 1, 0x6B0), /* Gambia */

+	COUNTRY_CHPLAN_ENT("GN", 0x26, 1, 0x610), /* Guinea */

+	COUNTRY_CHPLAN_ENT("GP", 0x26, 1, 0x600), /* Guadeloupe (France) */

+	COUNTRY_CHPLAN_ENT("GQ", 0x26, 1, 0x6B0), /* Equatorial Guinea */

+	COUNTRY_CHPLAN_ENT("GR", 0x26, 1, 0x7FB), /* Greece */

+	COUNTRY_CHPLAN_ENT("GS", 0x26, 1, 0x000), /* South Georgia and the Sandwich Islands (UK) */

+	COUNTRY_CHPLAN_ENT("GT", 0x61, 1, 0x7F1), /* Guatemala */

+	COUNTRY_CHPLAN_ENT("GU", 0x76, 1, 0x600), /* Guam (USA) */

+	COUNTRY_CHPLAN_ENT("GW", 0x26, 1, 0x6B0), /* Guinea-Bissau */

+	COUNTRY_CHPLAN_ENT("GY", 0x44, 1, 0x000), /* Guyana */

+	COUNTRY_CHPLAN_ENT("HK", 0x35, 1, 0x7FB), /* Hong Kong */

+	COUNTRY_CHPLAN_ENT("HM", 0x45, 1, 0x000), /* Heard and McDonald Islands (Australia) */

+	COUNTRY_CHPLAN_ENT("HN", 0x32, 1, 0x7F1), /* Honduras */

+	COUNTRY_CHPLAN_ENT("HR", 0x26, 1, 0x7F9), /* Croatia */

+	COUNTRY_CHPLAN_ENT("HT", 0x76, 1, 0x650), /* Haiti */

+	COUNTRY_CHPLAN_ENT("HU", 0x26, 1, 0x7FB), /* Hungary */

+	COUNTRY_CHPLAN_ENT("ID", 0x3D, 0, 0x7F3), /* Indonesia */

+	COUNTRY_CHPLAN_ENT("IE", 0x26, 1, 0x7FB), /* Ireland */

+	COUNTRY_CHPLAN_ENT("IL", 0x47, 1, 0x7F1), /* Israel */

+	COUNTRY_CHPLAN_ENT("IM", 0x26, 1, 0x000), /* Isle of Man (UK) */

+	COUNTRY_CHPLAN_ENT("IN", 0x48, 1, 0x7F1), /* India */

+	COUNTRY_CHPLAN_ENT("IO", 0x26, 1, 0x000), /* British Indian Ocean Territory (UK) */

+	COUNTRY_CHPLAN_ENT("IQ", 0x26, 1, 0x000), /* Iraq */

+	COUNTRY_CHPLAN_ENT("IR", 0x26, 0, 0x000), /* Iran */

+	COUNTRY_CHPLAN_ENT("IS", 0x26, 1, 0x7FB), /* Iceland */

+	COUNTRY_CHPLAN_ENT("IT", 0x26, 1, 0x7FB), /* Italy */

+	COUNTRY_CHPLAN_ENT("JE", 0x26, 1, 0x000), /* Jersey (UK) */

+	COUNTRY_CHPLAN_ENT("JM", 0x32, 1, 0x7F1), /* Jamaica */

+	COUNTRY_CHPLAN_ENT("JO", 0x49, 1, 0x7FB), /* Jordan */

+	COUNTRY_CHPLAN_ENT("JP", 0x27, 1, 0x7FF), /* Japan- Telec */

+	COUNTRY_CHPLAN_ENT("KE", 0x47, 1, 0x7F9), /* Kenya */

+	COUNTRY_CHPLAN_ENT("KG", 0x26, 1, 0x7F1), /* Kyrgyzstan */

+	COUNTRY_CHPLAN_ENT("KH", 0x26, 1, 0x7F1), /* Cambodia */

+	COUNTRY_CHPLAN_ENT("KI", 0x26, 1, 0x000), /* Kiribati */

+	COUNTRY_CHPLAN_ENT("KM", 0x26, 1, 0x000), /* Comoros */

+	COUNTRY_CHPLAN_ENT("KN", 0x76, 1, 0x000), /* Saint Kitts and Nevis */

+	COUNTRY_CHPLAN_ENT("KR", 0x3E, 1, 0x7FB), /* South Korea */

+	COUNTRY_CHPLAN_ENT("KW", 0x47, 1, 0x7FB), /* Kuwait */

+	COUNTRY_CHPLAN_ENT("KY", 0x76, 1, 0x000), /* Cayman Islands (UK) */

+	COUNTRY_CHPLAN_ENT("KZ", 0x26, 1, 0x700), /* Kazakhstan */

+	COUNTRY_CHPLAN_ENT("LA", 0x26, 1, 0x000), /* Laos */

+	COUNTRY_CHPLAN_ENT("LB", 0x26, 1, 0x7F1), /* Lebanon */

+	COUNTRY_CHPLAN_ENT("LC", 0x76, 1, 0x000), /* Saint Lucia */

+	COUNTRY_CHPLAN_ENT("LI", 0x26, 1, 0x7FB), /* Liechtenstein */

+	COUNTRY_CHPLAN_ENT("LK", 0x26, 1, 0x7F1), /* Sri Lanka */

+	COUNTRY_CHPLAN_ENT("LR", 0x26, 1, 0x6B0), /* Liberia */

+	COUNTRY_CHPLAN_ENT("LS", 0x26, 1, 0x7F1), /* Lesotho */

+	COUNTRY_CHPLAN_ENT("LT", 0x26, 1, 0x7FB), /* Lithuania */

+	COUNTRY_CHPLAN_ENT("LU", 0x26, 1, 0x7FB), /* Luxembourg */

+	COUNTRY_CHPLAN_ENT("LV", 0x26, 1, 0x7FB), /* Latvia */

+	COUNTRY_CHPLAN_ENT("LY", 0x26, 1, 0x000), /* Libya */

+	COUNTRY_CHPLAN_ENT("MA", 0x47, 1, 0x7F1), /* Morocco */

+	COUNTRY_CHPLAN_ENT("MC", 0x26, 1, 0x7FB), /* Monaco */

+	COUNTRY_CHPLAN_ENT("MD", 0x26, 1, 0x7F1), /* Moldova */

+	COUNTRY_CHPLAN_ENT("ME", 0x26, 1, 0x7F1), /* Montenegro */

+	COUNTRY_CHPLAN_ENT("MF", 0x76, 1, 0x000), /* Saint Martin */

+	COUNTRY_CHPLAN_ENT("MG", 0x26, 1, 0x620), /* Madagascar */

+	COUNTRY_CHPLAN_ENT("MH", 0x76, 1, 0x000), /* Marshall Islands (USA) */

+	COUNTRY_CHPLAN_ENT("MK", 0x26, 1, 0x7F1), /* Republic of Macedonia (FYROM) */

+	COUNTRY_CHPLAN_ENT("ML", 0x26, 1, 0x6B0), /* Mali */

+	COUNTRY_CHPLAN_ENT("MM", 0x26, 1, 0x000), /* Burma (Myanmar) */

+	COUNTRY_CHPLAN_ENT("MN", 0x26, 1, 0x000), /* Mongolia */

+	COUNTRY_CHPLAN_ENT("MO", 0x35, 1, 0x600), /* Macau */

+	COUNTRY_CHPLAN_ENT("MP", 0x76, 1, 0x000), /* Northern Mariana Islands (USA) */

+	COUNTRY_CHPLAN_ENT("MQ", 0x26, 1, 0x640), /* Martinique (France) */

+	COUNTRY_CHPLAN_ENT("MR", 0x26, 1, 0x6A0), /* Mauritania */

+	COUNTRY_CHPLAN_ENT("MS", 0x26, 1, 0x000), /* Montserrat (UK) */

+	COUNTRY_CHPLAN_ENT("MT", 0x26, 1, 0x7FB), /* Malta */

+	COUNTRY_CHPLAN_ENT("MU", 0x26, 1, 0x6B0), /* Mauritius */

+	COUNTRY_CHPLAN_ENT("MV", 0x47, 1, 0x000), /* Maldives */

+	COUNTRY_CHPLAN_ENT("MW", 0x26, 1, 0x6B0), /* Malawi */

+	COUNTRY_CHPLAN_ENT("MX", 0x61, 1, 0x7F1), /* Mexico */

+	COUNTRY_CHPLAN_ENT("MY", 0x63, 1, 0x7F1), /* Malaysia */

+	COUNTRY_CHPLAN_ENT("MZ", 0x26, 1, 0x7F1), /* Mozambique */

+	COUNTRY_CHPLAN_ENT("NA", 0x26, 1, 0x700), /* Namibia */

+	COUNTRY_CHPLAN_ENT("NC", 0x26, 1, 0x000), /* New Caledonia */

+	COUNTRY_CHPLAN_ENT("NE", 0x26, 1, 0x6B0), /* Niger */

+	COUNTRY_CHPLAN_ENT("NF", 0x45, 1, 0x000), /* Norfolk Island (Australia) */

+	COUNTRY_CHPLAN_ENT("NG", 0x75, 1, 0x7F9), /* Nigeria */

+	COUNTRY_CHPLAN_ENT("NI", 0x76, 1, 0x7F1), /* Nicaragua */

+	COUNTRY_CHPLAN_ENT("NL", 0x26, 1, 0x7FB), /* Netherlands */

+	COUNTRY_CHPLAN_ENT("NO", 0x26, 1, 0x7FB), /* Norway */

+	COUNTRY_CHPLAN_ENT("NP", 0x48, 1, 0x6F0), /* Nepal */

+	COUNTRY_CHPLAN_ENT("NR", 0x26, 1, 0x000), /* Nauru */

+	COUNTRY_CHPLAN_ENT("NU", 0x45, 1, 0x000), /* Niue */

+	COUNTRY_CHPLAN_ENT("NZ", 0x45, 1, 0x7FB), /* New Zealand */

+	COUNTRY_CHPLAN_ENT("OM", 0x26, 1, 0x7F9), /* Oman */

+	COUNTRY_CHPLAN_ENT("PA", 0x76, 1, 0x7F1), /* Panama */

+	COUNTRY_CHPLAN_ENT("PE", 0x76, 1, 0x7F1), /* Peru */

+	COUNTRY_CHPLAN_ENT("PF", 0x26, 1, 0x000), /* French Polynesia (France) */

+	COUNTRY_CHPLAN_ENT("PG", 0x35, 1, 0x7F1), /* Papua New Guinea */

+	COUNTRY_CHPLAN_ENT("PH", 0x35, 1, 0x7F1), /* Philippines */

+	COUNTRY_CHPLAN_ENT("PK", 0x51, 1, 0x7F1), /* Pakistan */

+	COUNTRY_CHPLAN_ENT("PL", 0x26, 1, 0x7FB), /* Poland */

+	COUNTRY_CHPLAN_ENT("PM", 0x26, 1, 0x000), /* Saint Pierre and Miquelon (France) */

+	COUNTRY_CHPLAN_ENT("PR", 0x76, 1, 0x7F1), /* Puerto Rico */

+	COUNTRY_CHPLAN_ENT("PT", 0x26, 1, 0x7FB), /* Portugal */

+	COUNTRY_CHPLAN_ENT("PW", 0x76, 1, 0x000), /* Palau */

+	COUNTRY_CHPLAN_ENT("PY", 0x76, 1, 0x7F1), /* Paraguay */

+	COUNTRY_CHPLAN_ENT("QA", 0x35, 1, 0x7F9), /* Qatar */

+	COUNTRY_CHPLAN_ENT("RE", 0x26, 1, 0x000), /* Reunion (France) */

+	COUNTRY_CHPLAN_ENT("RO", 0x26, 1, 0x7F1), /* Romania */

+	COUNTRY_CHPLAN_ENT("RS", 0x26, 1, 0x7F1), /* Serbia, Kosovo */

+	COUNTRY_CHPLAN_ENT("RU", 0x59, 1, 0x7FB), /* Russia(fac/gost), Kaliningrad */

+	COUNTRY_CHPLAN_ENT("RW", 0x26, 1, 0x0B0), /* Rwanda */

+	COUNTRY_CHPLAN_ENT("SA", 0x35, 1, 0x7FB), /* Saudi Arabia */

+	COUNTRY_CHPLAN_ENT("SB", 0x26, 1, 0x000), /* Solomon Islands */

+	COUNTRY_CHPLAN_ENT("SC", 0x76, 1, 0x690), /* Seychelles */

+	COUNTRY_CHPLAN_ENT("SE", 0x26, 1, 0x7FB), /* Sweden */

+	COUNTRY_CHPLAN_ENT("SG", 0x35, 1, 0x7FB), /* Singapore */

+	COUNTRY_CHPLAN_ENT("SH", 0x26, 1, 0x000), /* Saint Helena (UK) */

+	COUNTRY_CHPLAN_ENT("SI", 0x26, 1, 0x7FB), /* Slovenia */

+	COUNTRY_CHPLAN_ENT("SJ", 0x26, 1, 0x000), /* Svalbard (Norway) */

+	COUNTRY_CHPLAN_ENT("SK", 0x26, 1, 0x7FB), /* Slovakia */

+	COUNTRY_CHPLAN_ENT("SL", 0x26, 1, 0x6B0), /* Sierra Leone */

+	COUNTRY_CHPLAN_ENT("SM", 0x26, 1, 0x000), /* San Marino */

+	COUNTRY_CHPLAN_ENT("SN", 0x26, 1, 0x7F1), /* Senegal */

+	COUNTRY_CHPLAN_ENT("SO", 0x26, 1, 0x000), /* Somalia */

+	COUNTRY_CHPLAN_ENT("SR", 0x74, 1, 0x000), /* Suriname */

+	COUNTRY_CHPLAN_ENT("ST", 0x76, 1, 0x680), /* Sao Tome and Principe */

+	COUNTRY_CHPLAN_ENT("SV", 0x30, 1, 0x7F1), /* El Salvador */

+	COUNTRY_CHPLAN_ENT("SX", 0x76, 1, 0x000), /* Sint Marteen */

+	COUNTRY_CHPLAN_ENT("SZ", 0x26, 1, 0x020), /* Swaziland */

+	COUNTRY_CHPLAN_ENT("TC", 0x26, 1, 0x000), /* Turks and Caicos Islands (UK) */

+	COUNTRY_CHPLAN_ENT("TD", 0x26, 1, 0x6B0), /* Chad */

+	COUNTRY_CHPLAN_ENT("TF", 0x26, 1, 0x680), /* French Southern and Antarctic Lands (FR Southern Territories) */

+	COUNTRY_CHPLAN_ENT("TG", 0x26, 1, 0x6B0), /* Togo */

+	COUNTRY_CHPLAN_ENT("TH", 0x35, 1, 0x7F1), /* Thailand */

+	COUNTRY_CHPLAN_ENT("TJ", 0x26, 1, 0x640), /* Tajikistan */

+	COUNTRY_CHPLAN_ENT("TK", 0x45, 1, 0x000), /* Tokelau */

+	COUNTRY_CHPLAN_ENT("TM", 0x26, 1, 0x000), /* Turkmenistan */

+	COUNTRY_CHPLAN_ENT("TN", 0x47, 1, 0x7F1), /* Tunisia */

+	COUNTRY_CHPLAN_ENT("TO", 0x26, 1, 0x000), /* Tonga */

+	COUNTRY_CHPLAN_ENT("TR", 0x26, 1, 0x7F1), /* Turkey, Northern Cyprus */

+	COUNTRY_CHPLAN_ENT("TT", 0x76, 1, 0x3F1), /* Trinidad & Tobago */

+	COUNTRY_CHPLAN_ENT("TV", 0x21, 0, 0x000), /* Tuvalu */

+	COUNTRY_CHPLAN_ENT("TW", 0x76, 1, 0x7FF), /* Taiwan */

+	COUNTRY_CHPLAN_ENT("TZ", 0x26, 1, 0x6F0), /* Tanzania */

+	COUNTRY_CHPLAN_ENT("UA", 0x36, 1, 0x7FB), /* Ukraine */

+	COUNTRY_CHPLAN_ENT("UG", 0x26, 1, 0x6F1), /* Uganda */

+	COUNTRY_CHPLAN_ENT("US", 0x76, 1, 0x7FF), /* United States of America (USA) */

+	COUNTRY_CHPLAN_ENT("UY", 0x30, 1, 0x7F1), /* Uruguay */

+	COUNTRY_CHPLAN_ENT("UZ", 0x47, 1, 0x6F0), /* Uzbekistan */

+	COUNTRY_CHPLAN_ENT("VA", 0x26, 1, 0x000), /* Holy See (Vatican City) */

+	COUNTRY_CHPLAN_ENT("VC", 0x76, 1, 0x010), /* Saint Vincent and the Grenadines */

+	COUNTRY_CHPLAN_ENT("VE", 0x30, 1, 0x7F1), /* Venezuela */

+	COUNTRY_CHPLAN_ENT("VG", 0x76, 1, 0x000), /* British Virgin Islands (UK) */

+	COUNTRY_CHPLAN_ENT("VI", 0x76, 1, 0x000), /* United States Virgin Islands (USA) */

+	COUNTRY_CHPLAN_ENT("VN", 0x35, 1, 0x7F1), /* Vietnam */

+	COUNTRY_CHPLAN_ENT("VU", 0x26, 1, 0x000), /* Vanuatu */

+	COUNTRY_CHPLAN_ENT("WF", 0x26, 1, 0x000), /* Wallis and Futuna (France) */

+	COUNTRY_CHPLAN_ENT("WS", 0x76, 1, 0x000), /* Samoa */

+	COUNTRY_CHPLAN_ENT("YE", 0x26, 1, 0x040), /* Yemen */

+	COUNTRY_CHPLAN_ENT("YT", 0x26, 1, 0x680), /* Mayotte (France) */

+	COUNTRY_CHPLAN_ENT("ZA", 0x35, 1, 0x7F1), /* South Africa */

+	COUNTRY_CHPLAN_ENT("ZM", 0x26, 1, 0x6B0), /* Zambia */

+	COUNTRY_CHPLAN_ENT("ZW", 0x26, 1, 0x7F1), /* Zimbabwe */

+};

+

+/*

+* rtw_get_chplan_from_country -

+* @country_code: string of country code

+*

+* Return pointer of struct country_chplan entry or NULL when unsupported country_code is given

+*/

+const struct country_chplan *rtw_get_chplan_from_country(const char *country_code)

+{

+#if RTW_DEF_MODULE_REGULATORY_CERT

+	const struct country_chplan *exc_ent = NULL;

+#endif

+	const struct country_chplan *ent = NULL;

+	const struct country_chplan *map = NULL;

+	u16 map_sz = 0;

+	char code[2];

+	int i;

+

+	code[0] = alpha_to_upper(country_code[0]);

+	code[1] = alpha_to_upper(country_code[1]);

+

+#ifdef CONFIG_CUSTOMIZED_COUNTRY_CHPLAN_MAP

+	map = CUSTOMIZED_country_chplan_map;

+	map_sz = sizeof(CUSTOMIZED_country_chplan_map) / sizeof(struct country_chplan);

+#else

+	#if RTW_DEF_MODULE_REGULATORY_CERT

+	exc_ent = rtw_def_module_get_chplan_from_country(code);

+	#endif

+	map = country_chplan_map;

+	map_sz = sizeof(country_chplan_map) / sizeof(struct country_chplan);

+#endif

+

+	for (i = 0; i < map_sz; i++) {

+		if (strncmp(code, map[i].alpha2, 2) == 0) {

+			ent = &map[i];

+			break;

+		}

+	}

+

+	#if RTW_DEF_MODULE_REGULATORY_CERT

+	if (!ent || !(COUNTRY_CHPLAN_DEF_MODULE_FALGS(ent) & RTW_DEF_MODULE_REGULATORY_CERT))

+		exc_ent = ent = NULL;

+	if (exc_ent)

+		ent = exc_ent;

+	#endif

+

+	return ent;

+}

+

+void dump_country_chplan(void *sel, const struct country_chplan *ent)

+{

+	RTW_PRINT_SEL(sel, "\"%c%c\", 0x%02X%s\n"

+		, ent->alpha2[0], ent->alpha2[1], ent->chplan

+		, COUNTRY_CHPLAN_EN_11AC(ent) ? " ac" : ""

+	);

+}

+

+void dump_country_chplan_map(void *sel)

+{

+	const struct country_chplan *ent;

+	u8 code[2];

+

+#if RTW_DEF_MODULE_REGULATORY_CERT

+	RTW_PRINT_SEL(sel, "RTW_DEF_MODULE_REGULATORY_CERT:0x%x\n", RTW_DEF_MODULE_REGULATORY_CERT);

+#endif

+#ifdef CONFIG_CUSTOMIZED_COUNTRY_CHPLAN_MAP

+	RTW_PRINT_SEL(sel, "CONFIG_CUSTOMIZED_COUNTRY_CHPLAN_MAP\n");

+#endif

+

+	for (code[0] = 'A'; code[0] <= 'Z'; code[0]++) {

+		for (code[1] = 'A'; code[1] <= 'Z'; code[1]++) {

+			ent = rtw_get_chplan_from_country(code);

+			if (!ent)

+				continue;

+

+			dump_country_chplan(sel, ent);

+		}

+	}

+}

+

+void dump_chplan_id_list(void *sel)

+{

+	u8 first = 1;

+	int i;

+

+	for (i = 0; i < RTW_CHPLAN_MAX; i++) {

+		if (!rtw_is_channel_plan_valid(i))

+			continue;

+

+		if (first) {

+			RTW_PRINT_SEL(sel, "0x%02X ", i);

+			first = 0;

+		} else

+			_RTW_PRINT_SEL(sel, "0x%02X ", i);

+	}

+

+	_RTW_PRINT_SEL(sel, "0x7F\n");

+}

+

+void dump_chplan_test(void *sel)

+{

+	int i, j;

+

+	/* check invalid channel */

+	for (i = 0; i < RTW_RD_2G_MAX; i++) {

+		for (j = 0; j < CH_LIST_LEN(RTW_ChannelPlan2G[i]); j++) {

+			if (rtw_ch2freq(CH_LIST_CH(RTW_ChannelPlan2G[i], j)) == 0)

+				RTW_PRINT_SEL(sel, "invalid ch:%u at (%d,%d)\n", CH_LIST_CH(RTW_ChannelPlan2G[i], j), i, j);

+		}

+	}

+

+#ifdef CONFIG_IEEE80211_BAND_5GHZ

+	for (i = 0; i < RTW_RD_5G_MAX; i++) {

+		for (j = 0; j < CH_LIST_LEN(RTW_ChannelPlan5G[i]); j++) {

+			if (rtw_ch2freq(CH_LIST_CH(RTW_ChannelPlan5G[i], j)) == 0)

+				RTW_PRINT_SEL(sel, "invalid ch:%u at (%d,%d)\n", CH_LIST_CH(RTW_ChannelPlan5G[i], j), i, j);

+		}

+	}

+#endif

+}

+

+void dump_chplan_ver(void *sel)

+{

+	RTW_PRINT_SEL(sel, "%s-%s\n", RTW_DOMAIN_MAP_VER, RTW_COUNTRY_MAP_VER);

+}

diff --git a/rtl8723DS/core/rtw_chplan.h b/rtl8723DS/core/rtw_chplan.h
new file mode 100644
index 0000000..cdf9f75
--- a/dev/null
+++ b/rtl8723DS/core/rtw_chplan.h
@@ -0,0 +1,181 @@
+/******************************************************************************

+ *

+ * Copyright(c) 2007 - 2018 Realtek Corporation.

+ *

+ * This program is free software; you can redistribute it and/or modify it

+ * under the terms of version 2 of the GNU General Public License as

+ * published by the Free Software Foundation.

+ *

+ * This program is distributed in the hope that it will be useful, but WITHOUT

+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or

+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for

+ * more details.

+ *

+ *****************************************************************************/

+#ifndef __RTW_CHPLAN_H__

+#define __RTW_CHPLAN_H__

+

+enum rtw_chplan_id {

+	/* ===== 0x00 ~ 0x1F, legacy channel plan ===== */

+	RTW_CHPLAN_FCC = 0x00,

+	RTW_CHPLAN_IC = 0x01,

+	RTW_CHPLAN_ETSI = 0x02,

+	RTW_CHPLAN_SPAIN = 0x03,

+	RTW_CHPLAN_FRANCE = 0x04,

+	RTW_CHPLAN_MKK = 0x05,

+	RTW_CHPLAN_MKK1 = 0x06,

+	RTW_CHPLAN_ISRAEL = 0x07,

+	RTW_CHPLAN_TELEC = 0x08,

+	RTW_CHPLAN_GLOBAL_DOAMIN = 0x09,

+	RTW_CHPLAN_WORLD_WIDE_13 = 0x0A,

+	RTW_CHPLAN_TAIWAN = 0x0B,

+	RTW_CHPLAN_CHINA = 0x0C,

+	RTW_CHPLAN_SINGAPORE_INDIA_MEXICO = 0x0D,

+	RTW_CHPLAN_KOREA = 0x0E,

+	RTW_CHPLAN_TURKEY = 0x0F,

+	RTW_CHPLAN_JAPAN = 0x10,

+	RTW_CHPLAN_FCC_NO_DFS = 0x11,

+	RTW_CHPLAN_JAPAN_NO_DFS = 0x12,

+	RTW_CHPLAN_WORLD_WIDE_5G = 0x13,

+	RTW_CHPLAN_TAIWAN_NO_DFS = 0x14,

+

+	/* ===== 0x20 ~ 0x7F, new channel plan ===== */

+	RTW_CHPLAN_WORLD_NULL = 0x20,

+	RTW_CHPLAN_ETSI1_NULL = 0x21,

+	RTW_CHPLAN_FCC1_NULL = 0x22,

+	RTW_CHPLAN_MKK1_NULL = 0x23,

+	RTW_CHPLAN_ETSI2_NULL = 0x24,

+	RTW_CHPLAN_FCC1_FCC1 = 0x25,

+	RTW_CHPLAN_WORLD_ETSI1 = 0x26,

+	RTW_CHPLAN_MKK1_MKK1 = 0x27,

+	RTW_CHPLAN_WORLD_KCC1 = 0x28,

+	RTW_CHPLAN_WORLD_FCC2 = 0x29,

+	RTW_CHPLAN_FCC2_NULL = 0x2A,

+	RTW_CHPLAN_IC1_IC2 = 0x2B,

+	RTW_CHPLAN_MKK2_NULL = 0x2C,

+	RTW_CHPLAN_WORLD_CHILE1= 0x2D,

+	RTW_CHPLAN_WORLD1_WORLD1 = 0x2E,

+	RTW_CHPLAN_WORLD_CHILE2 = 0x2F,

+	RTW_CHPLAN_WORLD_FCC3 = 0x30,

+	RTW_CHPLAN_WORLD_FCC4 = 0x31,

+	RTW_CHPLAN_WORLD_FCC5 = 0x32,

+	RTW_CHPLAN_WORLD_FCC6 = 0x33,

+	RTW_CHPLAN_FCC1_FCC7 = 0x34,

+	RTW_CHPLAN_WORLD_ETSI2 = 0x35,

+	RTW_CHPLAN_WORLD_ETSI3 = 0x36,

+	RTW_CHPLAN_MKK1_MKK2 = 0x37,

+	RTW_CHPLAN_MKK1_MKK3 = 0x38,

+	RTW_CHPLAN_FCC1_NCC1 = 0x39,

+	RTW_CHPLAN_ETSI1_ETSI1 = 0x3A,

+	RTW_CHPLAN_ETSI1_ACMA1 = 0x3B,

+	RTW_CHPLAN_ETSI1_ETSI6 = 0x3C,

+	RTW_CHPLAN_ETSI1_ETSI12 = 0x3D,

+	RTW_CHPLAN_KCC1_KCC2 = 0x3E,

+	RTW_CHPLAN_FCC1_FCC11 = 0x3F,

+	RTW_CHPLAN_FCC1_NCC2 = 0x40,

+	RTW_CHPLAN_GLOBAL_NULL = 0x41,

+	RTW_CHPLAN_ETSI1_ETSI4 = 0x42,

+	RTW_CHPLAN_FCC1_FCC2 = 0x43,

+	RTW_CHPLAN_FCC1_NCC3 = 0x44,

+	RTW_CHPLAN_WORLD_ACMA1 = 0x45,

+	RTW_CHPLAN_FCC1_FCC8 = 0x46,

+	RTW_CHPLAN_WORLD_ETSI6 = 0x47,

+	RTW_CHPLAN_WORLD_ETSI7 = 0x48,

+	RTW_CHPLAN_WORLD_ETSI8 = 0x49,

+	RTW_CHPLAN_IC2_IC2 = 0x4A,

+	RTW_CHPLAN_WORLD_ETSI9 = 0x50,

+	RTW_CHPLAN_WORLD_ETSI10 = 0x51,

+	RTW_CHPLAN_WORLD_ETSI11 = 0x52,

+	RTW_CHPLAN_FCC1_NCC4 = 0x53,

+	RTW_CHPLAN_WORLD_ETSI12 = 0x54,

+	RTW_CHPLAN_FCC1_FCC9 = 0x55,

+	RTW_CHPLAN_WORLD_ETSI13 = 0x56,

+	RTW_CHPLAN_FCC1_FCC10 = 0x57,

+	RTW_CHPLAN_MKK2_MKK4 = 0x58,

+	RTW_CHPLAN_WORLD_ETSI14 = 0x59,

+	RTW_CHPLAN_FCC1_FCC5 = 0x60,

+	RTW_CHPLAN_FCC2_FCC7 = 0x61,

+	RTW_CHPLAN_FCC2_FCC1 = 0x62,

+	RTW_CHPLAN_WORLD_ETSI15 = 0x63,

+	RTW_CHPLAN_MKK2_MKK5 = 0x64,

+	RTW_CHPLAN_ETSI1_ETSI16 = 0x65,

+	RTW_CHPLAN_FCC1_FCC14 = 0x66,

+	RTW_CHPLAN_FCC1_FCC12 = 0x67,

+	RTW_CHPLAN_FCC2_FCC14 = 0x68,

+	RTW_CHPLAN_FCC2_FCC12 = 0x69,

+	RTW_CHPLAN_ETSI1_ETSI17 = 0x6A,

+	RTW_CHPLAN_WORLD_FCC16 = 0x6B,

+	RTW_CHPLAN_WORLD_FCC13 = 0x6C,

+	RTW_CHPLAN_FCC2_FCC15 = 0x6D,

+	RTW_CHPLAN_WORLD_FCC12 = 0x6E,

+	RTW_CHPLAN_NULL_ETSI8 = 0x6F,

+	RTW_CHPLAN_NULL_ETSI18 = 0x70,

+	RTW_CHPLAN_NULL_ETSI17 = 0x71,

+	RTW_CHPLAN_NULL_ETSI19 = 0x72,

+	RTW_CHPLAN_WORLD_FCC7 = 0x73,

+	RTW_CHPLAN_FCC2_FCC17 = 0x74,

+	RTW_CHPLAN_WORLD_ETSI20 = 0x75,

+	RTW_CHPLAN_FCC2_FCC11 = 0x76,

+	RTW_CHPLAN_WORLD_ETSI21 = 0x77,

+	RTW_CHPLAN_FCC1_FCC18 = 0x78,

+	RTW_CHPLAN_MKK2_MKK1 = 0x79,

+

+	RTW_CHPLAN_MAX,

+	RTW_CHPLAN_REALTEK_DEFINE = 0x7F,

+	RTW_CHPLAN_UNSPECIFIED = 0xFF,

+};

+

+u8 rtw_chplan_get_default_regd(u8 id);

+bool rtw_chplan_is_empty(u8 id);

+#define rtw_is_channel_plan_valid(chplan) (((chplan) < RTW_CHPLAN_MAX || (chplan) == RTW_CHPLAN_REALTEK_DEFINE) && !rtw_chplan_is_empty(chplan))

+#define rtw_is_legacy_channel_plan(chplan) ((chplan) < 0x20)

+

+struct _RT_CHANNEL_INFO;

+u8 init_channel_set(_adapter *padapter, u8 ChannelPlan, struct _RT_CHANNEL_INFO *channel_set);

+

+#define IS_ALPHA2_NO_SPECIFIED(_alpha2) ((*((u16 *)(_alpha2))) == 0xFFFF)

+

+#define RTW_MODULE_RTL8821AE_HMC_M2		BIT0	/* RTL8821AE(HMC + M.2) */

+#define RTW_MODULE_RTL8821AU			BIT1	/* RTL8821AU */

+#define RTW_MODULE_RTL8812AENF_NGFF		BIT2	/* RTL8812AENF(8812AE+8761)_NGFF */

+#define RTW_MODULE_RTL8812AEBT_HMC		BIT3	/* RTL8812AEBT(8812AE+8761)_HMC */

+#define RTW_MODULE_RTL8188EE_HMC_M2		BIT4	/* RTL8188EE(HMC + M.2) */

+#define RTW_MODULE_RTL8723BE_HMC_M2		BIT5	/* RTL8723BE(HMC + M.2) */

+#define RTW_MODULE_RTL8723BS_NGFF1216	BIT6	/* RTL8723BS(NGFF1216) */

+#define RTW_MODULE_RTL8192EEBT_HMC_M2	BIT7	/* RTL8192EEBT(8192EE+8761AU)_(HMC + M.2) */

+#define RTW_MODULE_RTL8723DE_NGFF1630	BIT8	/* RTL8723DE(NGFF1630) */

+#define RTW_MODULE_RTL8822BE			BIT9	/* RTL8822BE */

+#define RTW_MODULE_RTL8821CE			BIT10	/* RTL8821CE */

+

+struct country_chplan {

+	char alpha2[2];

+	u8 chplan;

+#ifdef CONFIG_80211AC_VHT

+	u8 en_11ac;

+#endif

+#if RTW_DEF_MODULE_REGULATORY_CERT

+	u16 def_module_flags; /* RTW_MODULE_RTLXXX */

+#endif

+};

+

+#ifdef CONFIG_80211AC_VHT

+#define COUNTRY_CHPLAN_EN_11AC(_ent) ((_ent)->en_11ac)

+#else

+#define COUNTRY_CHPLAN_EN_11AC(_ent) 0

+#endif

+

+#if RTW_DEF_MODULE_REGULATORY_CERT

+#define COUNTRY_CHPLAN_DEF_MODULE_FALGS(_ent) ((_ent)->def_module_flags)

+#else

+#define COUNTRY_CHPLAN_DEF_MODULE_FALGS(_ent) 0

+#endif

+

+const struct country_chplan *rtw_get_chplan_from_country(const char *country_code);

+

+void dump_country_chplan(void *sel, const struct country_chplan *ent);

+void dump_country_chplan_map(void *sel);

+void dump_chplan_id_list(void *sel);

+void dump_chplan_test(void *sel);

+void dump_chplan_ver(void *sel);

+

+#endif /* __RTW_CHPLAN_H__ */

diff --git a/rtl8723DS/core/rtw_cmd.c b/rtl8723DS/core/rtw_cmd.c
index 2f22463..5be5617 100755..100644
--- a/rtl8723DS/core/rtw_cmd.c
+++ b/rtl8723DS/core/rtw_cmd.c
@@ -452,7 +452,7 @@ u32 rtw_enqueue_cmd(struct cmd_priv *pcmdpriv, struct cmd_obj *cmd_obj)
 
 #ifdef CONFIG_CONCURRENT_MODE
 	/* change pcmdpriv to primary's pcmdpriv */
-	if (padapter->adapter_type != PRIMARY_ADAPTER)
+	if (!is_primary_adapter(padapter))
 		pcmdpriv = &(GET_PRIMARY_ADAPTER(padapter)->cmdpriv);
 #endif
 
@@ -502,8 +502,6 @@ void rtw_cmd_clr_isr(struct	cmd_priv *pcmdpriv)
 
 void rtw_free_cmd_obj(struct cmd_obj *pcmd)
 {
-	struct drvextra_cmd_parm *extra_parm = NULL;
-
 	if (pcmd->parmbuf != NULL) {
 		/* free parmbuf in cmd_obj */
 		rtw_mfree((unsigned char *)pcmd->parmbuf, pcmd->cmdsz);
@@ -517,7 +515,6 @@ void rtw_free_cmd_obj(struct cmd_obj *pcmd)
 
 	/* free cmd_obj */
 	rtw_mfree((unsigned char *)pcmd, sizeof(struct cmd_obj));
-
 }
 
 
@@ -621,6 +618,10 @@ _next:
 				if (extra_parm && extra_parm->pbuf && extra_parm->size > 0)
 					rtw_mfree(extra_parm->pbuf, extra_parm->size);
 			}
+			#ifdef CONFIG_DFS
+			else if (pcmd->cmdcode == GEN_CMD_CODE(_SetChannelSwitch))
+				adapter_to_rfctl(padapter)->csa_ch = 0;
+			#endif
 			goto post_process;
 		}
 
@@ -717,6 +718,10 @@ post_process:
 			if (extra_parm->pbuf && extra_parm->size > 0)
 				rtw_mfree(extra_parm->pbuf, extra_parm->size);
 		}
+		#ifdef CONFIG_DFS
+		else if (pcmd->cmdcode == GEN_CMD_CODE(_SetChannelSwitch))
+			adapter_to_rfctl(padapter)->csa_ch = 0;
+		#endif
 
 		_enter_critical_mutex(&(pcmd->padapter->cmdpriv.sctx_mutex), NULL);
 		if (pcmd->sctx) {
@@ -863,9 +868,6 @@ u8 rtw_sitesurvey_cmd(_adapter *padapter, struct sitesurvey_parm *pparm)
 	struct sitesurvey_parm	*psurveyPara;
 	struct cmd_priv	*pcmdpriv = &padapter->cmdpriv;
 	struct mlme_priv	*pmlmepriv = &padapter->mlmepriv;
-#ifdef CONFIG_P2P
-	struct wifidirect_info *pwdinfo = &(padapter->wdinfo);
-#endif /* CONFIG_P2P */
 
 #ifdef CONFIG_LPS
 	if (check_fwstate(pmlmepriv, _FW_LINKED) == _TRUE)
@@ -1218,12 +1220,11 @@ void rtw_readtssi_cmdrsp_callback(_adapter	*padapter,  struct cmd_obj *pcmd)
 }
 
 static u8 rtw_createbss_cmd(_adapter  *adapter, int flags, bool adhoc
-			    , s16 req_ch, s8 req_bw, s8 req_offset)
+	, u8 ifbmp, u8 excl_ifbmp, s16 req_ch, s8 req_bw, s8 req_offset)
 {
 	struct cmd_obj *cmdobj;
 	struct createbss_parm *parm;
 	struct cmd_priv *pcmdpriv = &adapter->cmdpriv;
-	struct mlme_priv *pmlmepriv = &adapter->mlmepriv;
 	struct submit_ctx sctx;
 	u8 res = _SUCCESS;
 
@@ -1246,6 +1247,8 @@ static u8 rtw_createbss_cmd(_adapter  *adapter, int flags, bool adhoc
 		parm->adhoc = 1;
 	} else {
 		parm->adhoc = 0;
+		parm->ifbmp = ifbmp;
+		parm->excl_ifbmp = excl_ifbmp;
 		parm->req_ch = req_ch;
 		parm->req_bw = req_bw;
 		parm->req_offset = req_offset;
@@ -1291,7 +1294,8 @@ inline u8 rtw_create_ibss_cmd(_adapter *adapter, int flags)
 {
 	return rtw_createbss_cmd(adapter, flags
 		, 1
-		, 0, -1, -1 /* for now, adhoc doesn't support ch,bw,offset request */
+		, 0, 0
+		, 0, REQ_BW_NONE, REQ_OFFSET_NONE /* for now, adhoc doesn't support ch,bw,offset request */
 	);
 }
 
@@ -1299,14 +1303,17 @@ inline u8 rtw_startbss_cmd(_adapter *adapter, int flags)
 {
 	return rtw_createbss_cmd(adapter, flags
 		, 0
-		, 0, -1, -1 /* excute entire AP setup cmd */
+		, BIT(adapter->iface_id), 0
+		, 0, REQ_BW_NONE, REQ_OFFSET_NONE /* excute entire AP setup cmd */
 	);
 }
 
-inline u8 rtw_change_bss_chbw_cmd(_adapter *adapter, int flags, s16 req_ch, s8 req_bw, s8 req_offset)
+inline u8 rtw_change_bss_chbw_cmd(_adapter *adapter, int flags
+	, u8 ifbmp, u8 excl_ifbmp, s16 req_ch, s8 req_bw, s8 req_offset)
 {
 	return rtw_createbss_cmd(adapter, flags
 		, 0
+		, ifbmp, excl_ifbmp
 		, req_ch, req_bw, req_offset
 	);
 }
@@ -1320,7 +1327,7 @@ static void rtw_ft_validate_akm_type(_adapter  *padapter,
 	u32 tmp_len;
 	u8 *ptmp;
 
-	/*IEEE802.11-2012 Std. Table 8-101¡XAKM suite selectors*/
+	/*IEEE802.11-2012 Std. Table 8-101-AKM suite selectors*/
 	if (rtw_ft_valid_akm(padapter, psecuritypriv->rsn_akm_suite_type)) {
 		ptmp = rtw_get_ie(&pnetwork->network.IEs[12], 
 				_MDIE_, &tmp_len, (pnetwork->network.IELength-12));
@@ -1410,6 +1417,13 @@ u8 rtw_joinbss_cmd(_adapter  *padapter, struct wlan_network *pnetwork)
 
 	pmlmeinfo->assoc_AP_vendor = check_assoc_AP(pnetwork->network.IEs, pnetwork->network.IELength);
 
+#ifdef CONFIG_80211AC_VHT
+	/* save AP beamform_cap info for BCM IOT issue */
+	if (pmlmeinfo->assoc_AP_vendor == HT_IOT_PEER_BROADCOM)
+		pvhtpriv->ap_is_mu_bfer =
+			get_vht_mu_bfer_cap(pnetwork->network.IEs,
+				pnetwork->network.IELength);
+#endif
 	/*
 		Modified by Arvin 2015/05/13
 		Solution for allocating a new WLAN_BSSID_EX to avoid race condition issue between disconnect and joinbss
@@ -1471,39 +1485,40 @@ u8 rtw_joinbss_cmd(_adapter  *padapter, struct wlan_network *pnetwork)
 
 #ifdef CONFIG_80211N_HT
 	phtpriv->ht_option = _FALSE;
-	ptmp = rtw_get_ie(&pnetwork->network.IEs[12], _HT_CAPABILITY_IE_, &tmp_len, pnetwork->network.IELength - 12);
-	if (pregistrypriv->ht_enable && ptmp && tmp_len > 0) {
-		/*	Added by Albert 2010/06/23 */
-		/*	For the WEP mode, we will use the bg mode to do the connection to avoid some IOT issue. */
-		/*	Especially for Realtek 8192u SoftAP. */
-		if ((padapter->securitypriv.dot11PrivacyAlgrthm != _WEP40_) &&
-		    (padapter->securitypriv.dot11PrivacyAlgrthm != _WEP104_) &&
-		    (padapter->securitypriv.dot11PrivacyAlgrthm != _TKIP_)) {
-			rtw_ht_use_default_setting(padapter);
-
-			/* rtw_restructure_ht_ie */
-			rtw_restructure_ht_ie(padapter, &pnetwork->network.IEs[12], &psecnetwork->IEs[0],
-				pnetwork->network.IELength - 12, &psecnetwork->IELength,
-				pnetwork->network.Configuration.DSConfig);
+	if (pregistrypriv->ht_enable && is_supported_ht(pregistrypriv->wireless_mode)) {
+		ptmp = rtw_get_ie(&pnetwork->network.IEs[12], _HT_CAPABILITY_IE_, &tmp_len, pnetwork->network.IELength - 12);
+		if (ptmp && tmp_len > 0) {
+			/*	Added by Albert 2010/06/23 */
+			/*	For the WEP mode, we will use the bg mode to do the connection to avoid some IOT issue. */
+			/*	Especially for Realtek 8192u SoftAP. */
+			if ((padapter->securitypriv.dot11PrivacyAlgrthm != _WEP40_) &&
+			    (padapter->securitypriv.dot11PrivacyAlgrthm != _WEP104_) &&
+			    (padapter->securitypriv.dot11PrivacyAlgrthm != _TKIP_)) {
+				rtw_ht_use_default_setting(padapter);
+
+				/* rtw_restructure_ht_ie */
+				rtw_restructure_ht_ie(padapter, &pnetwork->network.IEs[12], &psecnetwork->IEs[0],
+					pnetwork->network.IELength - 12, &psecnetwork->IELength,
+					pnetwork->network.Configuration.DSConfig);
+			}
 		}
 	}
 
 #ifdef CONFIG_80211AC_VHT
 	pvhtpriv->vht_option = _FALSE;
 	if (phtpriv->ht_option
-	    && REGSTY_IS_11AC_ENABLE(pregistrypriv)
-	    && hal_chk_proto_cap(padapter, PROTO_CAP_11AC)
-	    && (!rfctl->country_ent || COUNTRY_CHPLAN_EN_11AC(rfctl->country_ent))
-	   ) {
+		&& REGSTY_IS_11AC_ENABLE(pregistrypriv)
+		&& is_supported_vht(pregistrypriv->wireless_mode)
+		&& (!rfctl->country_ent || COUNTRY_CHPLAN_EN_11AC(rfctl->country_ent))
+	) {
 		rtw_restructure_vht_ie(padapter, &pnetwork->network.IEs[0], &psecnetwork->IEs[0],
 			pnetwork->network.IELength, &psecnetwork->IELength);
 	}
 #endif
+#endif /* CONFIG_80211N_HT */
 
 	rtw_append_exented_cap(padapter, &psecnetwork->IEs[0], &psecnetwork->IELength);
 
-#endif /* CONFIG_80211N_HT */
-
 #ifdef CONFIG_RTW_80211R
 	rtw_ft_validate_akm_type(padapter, pnetwork);
 #endif
@@ -1561,8 +1576,6 @@ u8 rtw_disassoc_cmd(_adapter *padapter, u32 deauth_timeout_ms, int flags) /* for
 	struct submit_ctx sctx;
 	u8 res = _SUCCESS;
 
-
-
 	/* prepare cmd parameter */
 	param = (struct disconnect_parm *)rtw_zmalloc(sizeof(*param));
 	if (param == NULL) {
@@ -1682,9 +1695,10 @@ u8 rtw_setstakey_cmd(_adapter *padapter, struct sta_info *sta, u8 key_type, bool
 	else
 		GET_ENCRY_ALGO(psecuritypriv, sta, psetstakey_para->algorithm, _FALSE);
 
-	if (key_type == GROUP_KEY)
+	if (key_type == GROUP_KEY) {
 		_rtw_memcpy(&psetstakey_para->key, &psecuritypriv->dot118021XGrpKey[psecuritypriv->dot118021XGrpKeyid].skey, 16);
-	else if (key_type == UNICAST_KEY)
+		psetstakey_para->gk = 1;
+	} else if (key_type == UNICAST_KEY)
 		_rtw_memcpy(&psetstakey_para->key, &sta->dot118021x_UncstKey, 16);
 #ifdef CONFIG_TDLS
 	else if (key_type == TDLS_KEY) {
@@ -1732,8 +1746,6 @@ u8 rtw_clearstakey_cmd(_adapter *padapter, struct sta_info *sta, u8 enqueue)
 	struct set_stakey_parm	*psetstakey_para;
 	struct cmd_priv			*pcmdpriv = &padapter->cmdpriv;
 	struct set_stakey_rsp		*psetstakey_rsp = NULL;
-	struct mlme_priv			*pmlmepriv = &padapter->mlmepriv;
-	struct security_priv		*psecuritypriv = &padapter->securitypriv;
 	s16 cam_id = 0;
 	u8	res = _SUCCESS;
 
@@ -2014,41 +2026,58 @@ exit:
 
 }
 
-u8 rtw_free_assoc_resources_cmd(_adapter *padapter)
+void free_assoc_resources_hdl(_adapter *padapter, u8 lock_scanned_queue)
 {
-	struct cmd_obj		*ph2c;
+	rtw_free_assoc_resources(padapter, lock_scanned_queue);
+}
+
+u8 rtw_free_assoc_resources_cmd(_adapter *padapter, u8 lock_scanned_queue, int flags)
+{
+	struct cmd_obj *cmd;
 	struct drvextra_cmd_parm  *pdrvextra_cmd_parm;
 	struct cmd_priv	*pcmdpriv = &padapter->cmdpriv;
+	struct submit_ctx sctx;
 	u8	res = _SUCCESS;
 
-
-	ph2c = (struct cmd_obj *)rtw_zmalloc(sizeof(struct cmd_obj));
-	if (ph2c == NULL) {
-		res = _FAIL;
-		goto exit;
-	}
-
-	pdrvextra_cmd_parm = (struct drvextra_cmd_parm *)rtw_zmalloc(sizeof(struct drvextra_cmd_parm));
-	if (pdrvextra_cmd_parm == NULL) {
-		rtw_mfree((unsigned char *)ph2c, sizeof(struct cmd_obj));
-		res = _FAIL;
-		goto exit;
+	if (flags & RTW_CMDF_DIRECTLY) {
+		free_assoc_resources_hdl(padapter, lock_scanned_queue);
 	}
+	else {
+		cmd = (struct cmd_obj *)rtw_zmalloc(sizeof(struct cmd_obj));
+		if (cmd == NULL) {
+			res = _FAIL;
+			goto exit;
+		}
 
-	pdrvextra_cmd_parm->ec_id = FREE_ASSOC_RESOURCES;
-	pdrvextra_cmd_parm->type = 0;
-	pdrvextra_cmd_parm->size = 0;
-	pdrvextra_cmd_parm->pbuf = NULL;
+		pdrvextra_cmd_parm = (struct drvextra_cmd_parm *)rtw_zmalloc(sizeof(struct drvextra_cmd_parm));
+		if (pdrvextra_cmd_parm == NULL) {
+			rtw_mfree((unsigned char *)cmd, sizeof(struct cmd_obj));
+			res = _FAIL;
+			goto exit;
+		}
 
-	init_h2fwcmd_w_parm_no_rsp(ph2c, pdrvextra_cmd_parm, GEN_CMD_CODE(_Set_Drv_Extra));
+		pdrvextra_cmd_parm->ec_id = FREE_ASSOC_RESOURCES;
+		pdrvextra_cmd_parm->type = lock_scanned_queue;
+		pdrvextra_cmd_parm->size = 0;
+		pdrvextra_cmd_parm->pbuf = NULL;
 
+		init_h2fwcmd_w_parm_no_rsp(cmd, pdrvextra_cmd_parm, GEN_CMD_CODE(_Set_Drv_Extra));
+		if (flags & RTW_CMDF_WAIT_ACK) {
+			cmd->sctx = &sctx;
+			rtw_sctx_init(&sctx, 2000);
+		}
 
-	/* rtw_enqueue_cmd(pcmdpriv, ph2c);	 */
-	res = rtw_enqueue_cmd(pcmdpriv, ph2c);
+		res = rtw_enqueue_cmd(pcmdpriv, cmd);
 
+		if (res == _SUCCESS && (flags & RTW_CMDF_WAIT_ACK)) {
+			rtw_sctx_wait(&sctx, __func__);
+			_enter_critical_mutex(&pcmdpriv->sctx_mutex, NULL);
+			if (sctx.status == RTW_SCTX_SUBMITTED)
+				cmd->sctx = NULL;
+			_exit_critical_mutex(&pcmdpriv->sctx_mutex, NULL);
+		}
+	}
 exit:
-
-
 	return res;
 
 }
@@ -2165,7 +2194,6 @@ u8 _rtw_set_chplan_cmd(_adapter *adapter, int flags, u8 chplan, const struct cou
 	struct cmd_obj *cmdobj;
 	struct	SetChannelPlan_param *parm;
 	struct cmd_priv *pcmdpriv = &adapter->cmdpriv;
-	struct mlme_priv *pmlmepriv = &adapter->mlmepriv;
 	struct submit_ctx sctx;
 	u8 res = _SUCCESS;
 
@@ -2224,12 +2252,29 @@ u8 _rtw_set_chplan_cmd(_adapter *adapter, int flags, u8 chplan, const struct cou
 			if (sctx.status == RTW_SCTX_SUBMITTED)
 				cmdobj->sctx = NULL;
 			_exit_critical_mutex(&pcmdpriv->sctx_mutex, NULL);
+			if (sctx.status != RTW_SCTX_DONE_SUCCESS)
+				res = _FAIL;
 		}
-	}
 
-exit:
+		/* allow set channel plan when cmd_thread is not running */
+		if (res != _SUCCESS && (flags & RTW_CMDF_WAIT_ACK)) {
+			parm = (struct SetChannelPlan_param *)rtw_zmalloc(sizeof(*parm));
+			if (parm == NULL) {
+				res = _FAIL;
+				goto exit;
+			}
+			parm->country_ent = country_ent;
+			parm->channel_plan = chplan;
 
+			if (H2C_SUCCESS != set_chplan_hdl(adapter, (u8 *)parm))
+				res = _FAIL;
+			else
+				res = _SUCCESS;
+			rtw_mfree((u8 *)parm, sizeof(*parm));
+		}
+	}
 
+exit:
 	return res;
 }
 
@@ -2295,54 +2340,34 @@ exit:
 	return res;
 }
 
-u8 rtw_set_csa_cmd(_adapter *padapter, u8 new_ch_no)
+u8 rtw_set_csa_cmd(_adapter *adapter)
 {
-	struct	cmd_obj	*pcmdobj;
-	struct	SetChannelSwitch_param *setChannelSwitch_param;
-	struct	mlme_priv *pmlmepriv = &padapter->mlmepriv;
-	struct	cmd_priv   *pcmdpriv = &padapter->cmdpriv;
-
+	struct cmd_obj *cmdobj;
+	struct cmd_priv *cmdpriv = &adapter->cmdpriv;
 	u8	res = _SUCCESS;
 
-
-
-	pcmdobj = (struct	cmd_obj *)rtw_zmalloc(sizeof(struct	cmd_obj));
-	if (pcmdobj == NULL) {
-		res = _FAIL;
-		goto exit;
-	}
-
-	setChannelSwitch_param = (struct SetChannelSwitch_param *)rtw_zmalloc(sizeof(struct	SetChannelSwitch_param));
-	if (setChannelSwitch_param == NULL) {
-		rtw_mfree((u8 *)pcmdobj, sizeof(struct cmd_obj));
+	cmdobj = rtw_zmalloc(sizeof(struct cmd_obj));
+	if (cmdobj == NULL) {
 		res = _FAIL;
 		goto exit;
 	}
 
-	setChannelSwitch_param->new_ch_no = new_ch_no;
-
-	init_h2fwcmd_w_parm_no_rsp(pcmdobj, setChannelSwitch_param, GEN_CMD_CODE(_SetChannelSwitch));
-	res = rtw_enqueue_cmd(pcmdpriv, pcmdobj);
+	init_h2fwcmd_w_parm_no_parm_rsp(cmdobj, GEN_CMD_CODE(_SetChannelSwitch));
+	res = rtw_enqueue_cmd(cmdpriv, cmdobj);
 
 exit:
-
-
 	return res;
 }
 
 u8 rtw_tdls_cmd(_adapter *padapter, u8 *addr, u8 option)
 {
+	u8 res = _SUCCESS;
+#ifdef CONFIG_TDLS
 	struct	cmd_obj	*pcmdobj;
 	struct	TDLSoption_param	*TDLSoption;
 	struct	mlme_priv *pmlmepriv = &padapter->mlmepriv;
 	struct	cmd_priv   *pcmdpriv = &padapter->cmdpriv;
 
-	u8	res = _SUCCESS;
-
-
-#ifdef CONFIG_TDLS
-
-
 	pcmdobj = (struct	cmd_obj *)rtw_zmalloc(sizeof(struct	cmd_obj));
 	if (pcmdobj == NULL) {
 		res = _FAIL;
@@ -2364,11 +2389,8 @@ u8 rtw_tdls_cmd(_adapter *padapter, u8 *addr, u8 option)
 	init_h2fwcmd_w_parm_no_rsp(pcmdobj, TDLSoption, GEN_CMD_CODE(_TDLS));
 	res = rtw_enqueue_cmd(pcmdpriv, pcmdobj);
 
-#endif /* CONFIG_TDLS */
-
 exit:
-
-
+#endif /* CONFIG_TDLS */
 
 	return res;
 }
@@ -2407,6 +2429,600 @@ exit:
 	return res;
 }
 
+u8 rtw_periodic_tsf_update_end_cmd(_adapter *adapter)
+{
+	struct cmd_obj *cmdobj;
+	struct drvextra_cmd_parm *parm;
+	struct cmd_priv *cmdpriv = &adapter->cmdpriv;
+	u8 res = _SUCCESS;
+
+	cmdobj = (struct cmd_obj *)rtw_zmalloc(sizeof(struct cmd_obj));
+	if (cmdobj == NULL) {
+		res = _FAIL;
+		goto exit;
+	}
+
+	parm = (struct drvextra_cmd_parm *)rtw_zmalloc(sizeof(struct drvextra_cmd_parm));
+	if (parm == NULL) {
+		rtw_mfree((unsigned char *)cmdobj, sizeof(struct cmd_obj));
+		res = _FAIL;
+		goto exit;
+	}
+
+	parm->ec_id = PERIOD_TSF_UPDATE_END_WK_CID;
+	parm->type = 0;
+	parm->size = 0;
+	parm->pbuf = NULL;
+
+	init_h2fwcmd_w_parm_no_rsp(cmdobj, parm, GEN_CMD_CODE(_Set_Drv_Extra));
+
+	res = rtw_enqueue_cmd(cmdpriv, cmdobj);
+
+exit:
+	return res;
+}
+u8 rtw_ssmps_wk_hdl(_adapter *adapter, struct ssmps_cmd_parm *ssmp_param)
+{
+	u8 res = _SUCCESS;
+	struct sta_info *sta = ssmp_param->sta;
+	u8 smps = ssmp_param->smps;
+
+	if (sta == NULL)
+		return _FALSE;
+
+	if (smps)
+		rtw_ssmps_enter(adapter, sta);
+	else
+		rtw_ssmps_leave(adapter, sta);
+	return res;
+}
+
+u8 rtw_ssmps_wk_cmd(_adapter *adapter, struct sta_info *sta, u8 smps, u8 enqueue)
+{
+	struct cmd_obj *cmdobj;
+	struct drvextra_cmd_parm *cmd_parm;
+	struct ssmps_cmd_parm *ssmp_param;
+	struct cmd_priv	*pcmdpriv = &adapter->cmdpriv;
+	u8	res = _SUCCESS;
+
+	if (enqueue) {
+		cmdobj = (struct cmd_obj *)rtw_zmalloc(sizeof(struct cmd_obj));
+		if (cmdobj == NULL) {
+			res = _FAIL;
+			goto exit;
+		}
+
+		cmd_parm = (struct drvextra_cmd_parm *)rtw_zmalloc(sizeof(struct drvextra_cmd_parm));
+		if (cmd_parm == NULL) {
+			rtw_mfree((unsigned char *)cmdobj, sizeof(struct cmd_obj));
+			res = _FAIL;
+			goto exit;
+		}
+
+		ssmp_param = (struct ssmps_cmd_parm *)rtw_zmalloc(sizeof(struct ssmps_cmd_parm));
+		if (ssmp_param == NULL) {
+			rtw_mfree((u8 *)cmdobj, sizeof(struct cmd_obj));
+			rtw_mfree((u8 *)cmd_parm, sizeof(struct drvextra_cmd_parm));
+			res = _FAIL;
+			goto exit;
+		}
+
+		ssmp_param->smps = smps;
+		ssmp_param->sta = sta;
+
+		cmd_parm->ec_id = SSMPS_WK_CID;
+		cmd_parm->type = 0;
+		cmd_parm->size = sizeof(struct ssmps_cmd_parm);
+		cmd_parm->pbuf = (u8 *)ssmp_param;
+
+		init_h2fwcmd_w_parm_no_rsp(cmdobj, cmd_parm, GEN_CMD_CODE(_Set_Drv_Extra));
+
+		res = rtw_enqueue_cmd(pcmdpriv, cmdobj);
+	} else {
+		struct ssmps_cmd_parm tmp_ssmp_param;
+
+		tmp_ssmp_param.smps = smps;
+		tmp_ssmp_param.sta = sta;
+		rtw_ssmps_wk_hdl(adapter, &tmp_ssmp_param);
+	}
+
+exit:
+	return res;
+}
+
+#ifdef CONFIG_SUPPORT_STATIC_SMPS
+u8 _ssmps_chk_by_tp(_adapter *adapter, u8 from_timer)
+{
+	u8 enter_smps = _FALSE;
+	struct mlme_priv *pmlmepriv = &adapter->mlmepriv;
+	struct mlme_ext_priv *pmlmeext = &(adapter->mlmeextpriv);
+	struct sta_priv *pstapriv = &adapter->stapriv;
+	struct sta_info *psta;
+	u32 tx_tp_mbits, rx_tp_mbits;
+
+	if (!MLME_IS_STA(adapter) ||
+		!hal_is_mimo_support(adapter) ||
+		!pmlmeext->ssmps_en ||
+		(pmlmeext->cur_channel > 14)
+	)
+		return enter_smps;
+
+	psta = rtw_get_stainfo(pstapriv, get_bssid(pmlmepriv));
+	if (psta == NULL) {
+		RTW_ERR(ADPT_FMT" sta == NULL\n", ADPT_ARG(adapter));
+		rtw_warn_on(1);
+		return enter_smps;
+	}
+
+	if (psta->cmn.mimo_type == RF_1T1R)
+		return enter_smps;
+
+	tx_tp_mbits = psta->sta_stats.tx_tp_kbits >> 10;
+	rx_tp_mbits = psta->sta_stats.rx_tp_kbits >> 10;
+
+	#ifdef DBG_STATIC_SMPS
+	if (pmlmeext->ssmps_test) {
+		enter_smps = (pmlmeext->ssmps_test_en == 1) ? _TRUE : _FALSE;
+	}
+	else
+	#endif
+	{
+		if ((tx_tp_mbits <= pmlmeext->ssmps_tx_tp_th) &&
+			(rx_tp_mbits <= pmlmeext->ssmps_rx_tp_th))
+			enter_smps = _TRUE;
+		else
+			enter_smps = _FALSE;
+	}
+
+	if (1) {
+		RTW_INFO(FUNC_ADPT_FMT" tx_tp:%d [%d], rx_tp:%d [%d] , SSMPS enter :%s\n",
+			FUNC_ADPT_ARG(adapter),
+			tx_tp_mbits, pmlmeext->ssmps_tx_tp_th,
+			rx_tp_mbits, pmlmeext->ssmps_rx_tp_th,
+			(enter_smps == _TRUE) ? "True" : "False");
+		#ifdef DBG_STATIC_SMPS
+		RTW_INFO(FUNC_ADPT_FMT" test:%d test_en:%d\n",
+			FUNC_ADPT_ARG(adapter),
+			pmlmeext->ssmps_test,
+			pmlmeext->ssmps_test_en);
+		#endif
+	}
+
+	if (enter_smps) {
+		if (!from_timer && psta->cmn.sm_ps != SM_PS_STATIC)
+			rtw_ssmps_enter(adapter, psta);
+	} else {
+		if (!from_timer && psta->cmn.sm_ps != SM_PS_DISABLE)
+			rtw_ssmps_leave(adapter, psta);
+		else {
+			u8 ps_change = _FALSE;
+
+			if (enter_smps && psta->cmn.sm_ps != SM_PS_STATIC)
+				ps_change = _TRUE;
+			else if (!enter_smps && psta->cmn.sm_ps != SM_PS_DISABLE)
+				ps_change = _TRUE;
+
+			if (ps_change)
+				rtw_ssmps_wk_cmd(adapter, psta, enter_smps, 1);
+		}
+	}
+
+	return enter_smps;
+}
+#endif /*CONFIG_SUPPORT_STATIC_SMPS*/
+
+#ifdef CONFIG_CTRL_TXSS_BY_TP
+void rtw_ctrl_txss_update_mimo_type(_adapter *adapter, struct sta_info *sta)
+{
+	struct mlme_ext_priv *pmlmeext = &(adapter->mlmeextpriv);
+
+	pmlmeext->txss_momi_type_bk = sta->cmn.mimo_type;
+}
+
+u8 rtw_ctrl_txss(_adapter *adapter, struct sta_info *sta, u8 tx_1ss)
+{
+	struct mlme_ext_priv *pmlmeext = &(adapter->mlmeextpriv);
+	struct pwrctrl_priv *pwrpriv = adapter_to_pwrctl(adapter);
+	enum bb_path txpath = BB_PATH_A | BB_PATH_B;
+	enum bb_path rxpath = BB_PATH_A | BB_PATH_B;
+	u8 tx2path = _FALSE;
+	u8 lps_changed = _FALSE;
+	u8 rst = _SUCCESS;
+
+	if (pmlmeext->txss_1ss == tx_1ss)
+		return _FALSE;
+
+	if (pwrpriv->bLeisurePs && pwrpriv->pwr_mode != PS_MODE_ACTIVE) {
+		lps_changed = _TRUE;
+		LPS_Leave(adapter, "LPS_CTRL_TXSS");
+	}
+
+	RTW_INFO(ADPT_FMT" STA [" MAC_FMT "] set tx to %d ss\n",
+		ADPT_ARG(adapter), MAC_ARG(sta->cmn.mac_addr),
+		(tx_1ss) ? 1 : rtw_get_sta_tx_nss(adapter, sta));
+
+	/*ra re-registed*/
+	sta->cmn.mimo_type = (tx_1ss) ? RF_1T1R : pmlmeext->txss_momi_type_bk;
+	rtw_phydm_ra_registed(adapter, sta);
+
+	/*configure trx mode*/
+	rtw_hal_get_rf_path(adapter_to_dvobj(adapter), NULL, &txpath, &rxpath);
+	txpath = (tx_1ss) ? BB_PATH_A : txpath;
+	if (phydm_api_trx_mode(adapter_to_phydm(adapter), txpath, rxpath, tx2path) == FALSE)
+		rst = _FALSE;
+
+	pmlmeext->txss_1ss = tx_1ss;
+
+	if (lps_changed)
+		LPS_Enter(adapter, "LPS_CTRL_TXSS");
+
+	return rst;
+}
+
+u8 rtw_ctrl_txss_wk_hdl(_adapter *adapter, struct txss_cmd_parm *txss_param)
+{
+	if (!txss_param->sta)
+		return _FALSE;
+
+	return rtw_ctrl_txss(adapter, txss_param->sta, txss_param->tx_1ss);
+}
+
+u8 rtw_ctrl_txss_wk_cmd(_adapter *adapter, struct sta_info *sta, u8 tx_1ss, u8 flag)
+{
+	struct cmd_obj *cmdobj;
+	struct drvextra_cmd_parm *cmd_parm;
+	struct txss_cmd_parm *txss_param;
+	struct cmd_priv *pcmdpriv = &adapter->cmdpriv;
+	struct submit_ctx sctx;
+	u8	res = _SUCCESS;
+
+	txss_param = (struct txss_cmd_parm *)rtw_zmalloc(sizeof(struct txss_cmd_parm));
+	if (txss_param == NULL) {
+		res = _FAIL;
+		goto exit;
+	}
+
+	txss_param->tx_1ss = tx_1ss;
+	txss_param->sta = sta;
+
+	if (flag & RTW_CMDF_DIRECTLY) {
+		res = rtw_ctrl_txss_wk_hdl(adapter, txss_param);
+		rtw_mfree((u8 *)txss_param, sizeof(*txss_param));
+	} else {
+		cmdobj = (struct cmd_obj *)rtw_zmalloc(sizeof(struct cmd_obj));
+		if (cmdobj == NULL) {
+			res = _FAIL;
+			goto exit;
+		}
+
+		cmd_parm = (struct drvextra_cmd_parm *)rtw_zmalloc(sizeof(struct drvextra_cmd_parm));
+		if (cmd_parm == NULL) {
+			rtw_mfree((u8 *)cmdobj, sizeof(struct cmd_obj));
+			res = _FAIL;
+			goto exit;
+		}
+
+		cmd_parm->ec_id = TXSS_WK_CID;
+		cmd_parm->type = 0;
+		cmd_parm->size = sizeof(struct txss_cmd_parm);
+		cmd_parm->pbuf = (u8 *)txss_param;
+
+		init_h2fwcmd_w_parm_no_rsp(cmdobj, cmd_parm, GEN_CMD_CODE(_Set_Drv_Extra));
+
+		if (flag & RTW_CMDF_WAIT_ACK) {
+			cmdobj->sctx = &sctx;
+			rtw_sctx_init(&sctx, 10 * 1000);
+		}
+
+		res = rtw_enqueue_cmd(pcmdpriv, cmdobj);
+		if (res == _SUCCESS && (flag & RTW_CMDF_WAIT_ACK)) {
+			rtw_sctx_wait(&sctx, __func__);
+			_enter_critical_mutex(&pcmdpriv->sctx_mutex, NULL);
+			if (sctx.status == RTW_SCTX_SUBMITTED)
+				cmdobj->sctx = NULL;
+			_exit_critical_mutex(&pcmdpriv->sctx_mutex, NULL);
+			if (sctx.status != RTW_SCTX_DONE_SUCCESS)
+				res = _FAIL;
+		}
+	}
+
+exit:
+	return res;
+}
+
+void rtw_ctrl_tx_ss_by_tp(_adapter *adapter, u8 from_timer)
+{
+	u8 tx_1ss  = _FALSE; /*change tx from 2ss to 1ss*/
+	struct mlme_priv *pmlmepriv = &adapter->mlmepriv;
+	struct mlme_ext_priv *pmlmeext = &(adapter->mlmeextpriv);
+	struct sta_priv *pstapriv = &adapter->stapriv;
+	struct sta_info *psta;
+	u32 tx_tp_mbits;
+
+	if (!MLME_IS_STA(adapter) ||
+		!hal_is_mimo_support(adapter) ||
+		!pmlmeext->txss_ctrl_en
+	)
+		return;
+
+	psta = rtw_get_stainfo(pstapriv, get_bssid(pmlmepriv));
+	if (psta == NULL) {
+		RTW_ERR(ADPT_FMT" sta == NULL\n", ADPT_ARG(adapter));
+		rtw_warn_on(1);
+		return;
+	}
+
+	tx_tp_mbits = psta->sta_stats.tx_tp_kbits >> 10;
+	if (tx_tp_mbits >= pmlmeext->txss_tp_th) {
+		tx_1ss = _FALSE;
+	} else {
+		if (pmlmeext->txss_tp_chk_cnt && --pmlmeext->txss_tp_chk_cnt)
+			tx_1ss = _FALSE;
+		else
+			tx_1ss = _TRUE;
+	}
+
+	if (1) {
+		RTW_INFO(FUNC_ADPT_FMT" tx_tp:%d [%d] tx_1ss(%d):%s\n",
+			FUNC_ADPT_ARG(adapter),
+			tx_tp_mbits, pmlmeext->txss_tp_th,
+			pmlmeext->txss_tp_chk_cnt,
+			(tx_1ss == _TRUE) ? "True" : "False");
+	}
+
+	if (pmlmeext->txss_1ss != tx_1ss) {
+		if (from_timer)
+			rtw_ctrl_txss_wk_cmd(adapter, psta, tx_1ss, 0);
+		else
+			rtw_ctrl_txss(adapter, psta, tx_1ss);
+	}
+}
+#ifdef DBG_CTRL_TXSS
+void dbg_ctrl_txss(_adapter *adapter, u8 tx_1ss)
+{
+	struct mlme_priv *pmlmepriv = &adapter->mlmepriv;
+	struct mlme_ext_priv *pmlmeext = &(adapter->mlmeextpriv);
+	struct sta_priv *pstapriv = &adapter->stapriv;
+	struct sta_info *psta;
+
+	if (!MLME_IS_STA(adapter) ||
+		!hal_is_mimo_support(adapter)
+	)
+		return;
+
+	psta = rtw_get_stainfo(pstapriv, get_bssid(pmlmepriv));
+	if (psta == NULL) {
+		RTW_ERR(ADPT_FMT" sta == NULL\n", ADPT_ARG(adapter));
+		rtw_warn_on(1);
+		return;
+	}
+
+	rtw_ctrl_txss(adapter, psta, tx_1ss);
+}
+#endif
+#endif /*CONFIG_CTRL_TXSS_BY_TP*/
+
+#ifdef CONFIG_LPS
+#ifdef CONFIG_LPS_CHK_BY_TP
+#ifdef LPS_BCN_CNT_MONITOR
+static u8 _bcn_cnt_expected(struct sta_info *psta)
+{
+	_adapter *adapter = psta->padapter;
+	struct mlme_ext_priv *pmlmeext = &adapter->mlmeextpriv;
+	struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info);
+	u8 dtim = rtw_get_bcn_dtim_period(adapter);
+	u8 bcn_cnt = 0;
+
+	if ((pmlmeinfo->bcn_interval !=0) && (dtim != 0))
+		bcn_cnt = 2000 / pmlmeinfo->bcn_interval / dtim * 4 / 5; /*2s*/
+	if (0)
+		RTW_INFO("%s bcn_cnt:%d\n", bcn_cnt);
+
+	if (bcn_cnt == 0) {
+		RTW_ERR(FUNC_ADPT_FMT" bcn_cnt == 0\n", FUNC_ADPT_ARG(adapter));
+		rtw_warn_on(1);
+	}
+
+	return bcn_cnt;
+}
+#endif
+u8 _lps_chk_by_tp(_adapter *adapter, u8 from_timer)
+{
+	u8 enter_ps = _FALSE;
+	struct mlme_priv *pmlmepriv = &adapter->mlmepriv;
+	struct sta_priv *pstapriv = &adapter->stapriv;
+	struct sta_info *psta;
+	struct pwrctrl_priv *pwrpriv = adapter_to_pwrctl(adapter);
+	u32 tx_tp_mbits, rx_tp_mbits, bi_tp_mbits;
+	u8 rx_bcn_cnt;
+
+	psta = rtw_get_stainfo(pstapriv, get_bssid(pmlmepriv));
+	if (psta == NULL) {
+		RTW_ERR(ADPT_FMT" sta == NULL\n", ADPT_ARG(adapter));
+		rtw_warn_on(1);
+		return enter_ps;
+	}
+
+	rx_bcn_cnt = rtw_get_bcn_cnt(psta->padapter);
+	psta->sta_stats.acc_tx_bytes = psta->sta_stats.tx_bytes;
+	psta->sta_stats.acc_rx_bytes = psta->sta_stats.rx_bytes;
+
+#if 1
+	tx_tp_mbits = psta->sta_stats.tx_tp_kbits >> 10;
+	rx_tp_mbits = psta->sta_stats.rx_tp_kbits >> 10;
+	bi_tp_mbits = tx_tp_mbits + rx_tp_mbits;
+#else
+	tx_tp_mbits = psta->sta_stats.smooth_tx_tp_kbits >> 10;
+	rx_tp_mbits = psta->sta_stats.smooth_rx_tp_kbits >> 10;
+	bi_tp_mbits = tx_tp_mbits + rx_tp_mbits;
+#endif
+
+	if ((bi_tp_mbits >= pwrpriv->lps_bi_tp_th) ||
+		(tx_tp_mbits >= pwrpriv->lps_tx_tp_th) ||
+		(rx_tp_mbits >= pwrpriv->lps_rx_tp_th)) {
+		enter_ps = _FALSE;
+		pwrpriv->lps_chk_cnt = pwrpriv->lps_chk_cnt_th;
+	}
+	else {
+#ifdef LPS_BCN_CNT_MONITOR
+		u8 bcn_cnt = _bcn_cnt_expected(psta);
+
+		if (bcn_cnt && (rx_bcn_cnt < bcn_cnt)) {
+			pwrpriv->lps_chk_cnt = 2;
+			RTW_ERR(FUNC_ADPT_FMT" BCN_CNT:%d(%d) invalid\n",
+				FUNC_ADPT_ARG(adapter), rx_bcn_cnt, bcn_cnt);
+		}
+#endif
+
+		if (pwrpriv->lps_chk_cnt && --pwrpriv->lps_chk_cnt)
+			enter_ps = _FALSE;
+		else
+			enter_ps = _TRUE;
+	}
+
+	if (1) {
+		RTW_INFO(FUNC_ADPT_FMT" tx_tp:%d [%d], rx_tp:%d [%d], bi_tp:%d [%d], enter_ps(%d):%s\n",
+			FUNC_ADPT_ARG(adapter),
+			tx_tp_mbits, pwrpriv->lps_tx_tp_th,
+			rx_tp_mbits, pwrpriv->lps_rx_tp_th,
+			bi_tp_mbits, pwrpriv->lps_bi_tp_th,
+			pwrpriv->lps_chk_cnt,
+			(enter_ps == _TRUE) ? "True" : "False");
+		RTW_INFO(FUNC_ADPT_FMT" tx_pkt_cnt :%d [%d], rx_pkt_cnt :%d [%d]\n",
+			FUNC_ADPT_ARG(adapter),
+			pmlmepriv->LinkDetectInfo.NumTxOkInPeriod,
+			pwrpriv->lps_tx_pkts,
+			pmlmepriv->LinkDetectInfo.NumRxUnicastOkInPeriod,
+			pwrpriv->lps_rx_pkts);
+		if (!adapter->bsta_tp_dump)
+			RTW_INFO(FUNC_ADPT_FMT" bcn_cnt:%d (per-%d second)\n",
+			FUNC_ADPT_ARG(adapter),
+			rx_bcn_cnt,
+			2);
+	}
+
+	if (enter_ps) {
+		if (!from_timer)
+			LPS_Enter(adapter, "TRAFFIC_IDLE");
+	} else {
+		if (!from_timer)
+			LPS_Leave(adapter, "TRAFFIC_BUSY");
+		else {
+			#ifdef CONFIG_CONCURRENT_MODE
+			#ifndef CONFIG_FW_MULTI_PORT_SUPPORT
+			if (adapter->hw_port == HW_PORT0)
+			#endif
+			#endif
+				rtw_lps_ctrl_wk_cmd(adapter, LPS_CTRL_TRAFFIC_BUSY, 1);
+		}
+	}
+
+	return enter_ps;
+}
+#endif
+
+static u8 _lps_chk_by_pkt_cnts(_adapter *padapter, u8 from_timer, u8 bBusyTraffic)
+{		
+	struct mlme_priv *pmlmepriv = &(padapter->mlmepriv);
+	u8	bEnterPS = _FALSE;
+
+	/* check traffic for  powersaving. */
+	if (((pmlmepriv->LinkDetectInfo.NumRxUnicastOkInPeriod + pmlmepriv->LinkDetectInfo.NumTxOkInPeriod) > 8) ||
+		#ifdef CONFIG_LPS_SLOW_TRANSITION
+		(pmlmepriv->LinkDetectInfo.NumRxUnicastOkInPeriod > 2)
+		#else /* CONFIG_LPS_SLOW_TRANSITION */
+		(pmlmepriv->LinkDetectInfo.NumRxUnicastOkInPeriod > 4)
+		#endif /* CONFIG_LPS_SLOW_TRANSITION */
+	) {
+		#ifdef DBG_RX_COUNTER_DUMP
+		if (padapter->dump_rx_cnt_mode & DUMP_DRV_TRX_COUNTER_DATA)
+			RTW_INFO("(-)Tx = %d, Rx = %d\n", pmlmepriv->LinkDetectInfo.NumTxOkInPeriod, pmlmepriv->LinkDetectInfo.NumRxUnicastOkInPeriod);
+		#endif
+
+		bEnterPS = _FALSE;
+		#ifdef CONFIG_LPS_SLOW_TRANSITION
+		if (bBusyTraffic == _TRUE) {
+			if (pmlmepriv->LinkDetectInfo.TrafficTransitionCount <= 4)
+				pmlmepriv->LinkDetectInfo.TrafficTransitionCount = 4;
+
+			pmlmepriv->LinkDetectInfo.TrafficTransitionCount++;
+
+			/* RTW_INFO("Set TrafficTransitionCount to %d\n", pmlmepriv->LinkDetectInfo.TrafficTransitionCount); */
+
+			if (pmlmepriv->LinkDetectInfo.TrafficTransitionCount > 30/*TrafficTransitionLevel*/)
+				pmlmepriv->LinkDetectInfo.TrafficTransitionCount = 30;
+		}
+		#endif /* CONFIG_LPS_SLOW_TRANSITION */
+	} else {
+		#ifdef DBG_RX_COUNTER_DUMP
+		if (padapter->dump_rx_cnt_mode & DUMP_DRV_TRX_COUNTER_DATA)
+			RTW_INFO("(+)Tx = %d, Rx = %d\n", pmlmepriv->LinkDetectInfo.NumTxOkInPeriod, pmlmepriv->LinkDetectInfo.NumRxUnicastOkInPeriod);
+		#endif
+
+		#ifdef CONFIG_LPS_SLOW_TRANSITION
+		if (pmlmepriv->LinkDetectInfo.TrafficTransitionCount >= 2)
+			pmlmepriv->LinkDetectInfo.TrafficTransitionCount -= 2;
+		else
+			pmlmepriv->LinkDetectInfo.TrafficTransitionCount = 0;
+
+		if (pmlmepriv->LinkDetectInfo.TrafficTransitionCount == 0)
+			bEnterPS = _TRUE;
+		#else /* CONFIG_LPS_SLOW_TRANSITION */
+			bEnterPS = _TRUE;
+		#endif /* CONFIG_LPS_SLOW_TRANSITION */
+	}
+
+	#ifdef CONFIG_DYNAMIC_DTIM
+	if (pmlmepriv->LinkDetectInfo.LowPowerTransitionCount == 8)
+		bEnterPS = _FALSE;
+
+	RTW_INFO("LowPowerTransitionCount=%d\n", pmlmepriv->LinkDetectInfo.LowPowerTransitionCount);
+	#endif /* CONFIG_DYNAMIC_DTIM */
+
+	/* LeisurePS only work in infra mode. */
+	if (bEnterPS) {
+		if (!from_timer) {
+			#ifdef CONFIG_DYNAMIC_DTIM
+			if (pmlmepriv->LinkDetectInfo.LowPowerTransitionCount < 8)
+				adapter_to_pwrctl(padapter)->dtim = 1;
+			else
+				adapter_to_pwrctl(padapter)->dtim = 3;
+			#endif /* CONFIG_DYNAMIC_DTIM */
+			LPS_Enter(padapter, "TRAFFIC_IDLE");
+		} else {
+			/* do this at caller */
+			/* rtw_lps_ctrl_wk_cmd(adapter, LPS_CTRL_ENTER, 1); */
+			/* rtw_hal_dm_watchdog_in_lps(padapter); */
+		}
+
+		#ifdef CONFIG_DYNAMIC_DTIM
+		if (adapter_to_pwrctl(padapter)->bFwCurrentInPSMode == _TRUE)
+			pmlmepriv->LinkDetectInfo.LowPowerTransitionCount++;
+		#endif /* CONFIG_DYNAMIC_DTIM */
+	} else {
+		#ifdef CONFIG_DYNAMIC_DTIM
+		if (pmlmepriv->LinkDetectInfo.LowPowerTransitionCount != 8)
+			pmlmepriv->LinkDetectInfo.LowPowerTransitionCount = 0;
+		else
+			pmlmepriv->LinkDetectInfo.LowPowerTransitionCount++;
+		#endif /* CONFIG_DYNAMIC_DTIM */
+
+		if (!from_timer)
+			LPS_Leave(padapter, "TRAFFIC_BUSY");
+		else {
+			#ifdef CONFIG_CONCURRENT_MODE
+			#ifndef CONFIG_FW_MULTI_PORT_SUPPORT
+			if (padapter->hw_port == HW_PORT0)
+			#endif
+			#endif
+				rtw_lps_ctrl_wk_cmd(padapter, LPS_CTRL_TRAFFIC_BUSY, 1);
+		}
+	}
+
+	return bEnterPS;
+}
+#endif /* CONFIG_LPS */
+
 /* from_timer == 1 means driver is in LPS */
 u8 traffic_status_watchdog(_adapter *padapter, u8 from_timer)
 {
@@ -2423,12 +3039,20 @@ u8 traffic_status_watchdog(_adapter *padapter, u8 from_timer)
 	struct tdls_txmgmt txmgmt;
 	u8 baddr[ETH_ALEN] = { 0xff, 0xff, 0xff, 0xff, 0xff, 0xff };
 #endif /* CONFIG_TDLS */
-
+#ifdef CONFIG_TRAFFIC_PROTECT
 	RT_LINK_DETECT_T *link_detect = &pmlmepriv->LinkDetectInfo;
+#endif
 
-	BusyThresholdHigh = 100;
-	BusyThresholdLow = 75;
-
+#ifdef CONFIG_BT_COEXIST
+	if (padapter->registrypriv.wifi_spec != 1) {
+		BusyThresholdHigh = 25;
+		BusyThresholdLow = 10;
+	} else
+#endif /* CONFIG_BT_COEXIST */
+	{
+		BusyThresholdHigh = 100;
+		BusyThresholdLow = 75;
+	}
 	BusyThreshold = BusyThresholdHigh;
 
 
@@ -2493,110 +3117,27 @@ u8 traffic_status_watchdog(_adapter *padapter, u8 from_timer)
 #endif /* CONFIG_TDLS_AUTOSETUP */
 #endif /* CONFIG_TDLS */
 
-#ifdef CONFIG_LPS
-		/* check traffic for  powersaving. */
-		if (((pmlmepriv->LinkDetectInfo.NumRxUnicastOkInPeriod + pmlmepriv->LinkDetectInfo.NumTxOkInPeriod) > 8) ||
-#ifdef CONFIG_LPS_SLOW_TRANSITION
-		    (pmlmepriv->LinkDetectInfo.NumRxUnicastOkInPeriod > 2)
-#else /* CONFIG_LPS_SLOW_TRANSITION */
-		    (pmlmepriv->LinkDetectInfo.NumRxUnicastOkInPeriod > 4)
-#endif /* CONFIG_LPS_SLOW_TRANSITION */
-		   ) {
-#ifdef DBG_RX_COUNTER_DUMP
-			if (padapter->dump_rx_cnt_mode & DUMP_DRV_TRX_COUNTER_DATA)
-				RTW_INFO("(-)Tx = %d, Rx = %d\n", pmlmepriv->LinkDetectInfo.NumTxOkInPeriod, pmlmepriv->LinkDetectInfo.NumRxUnicastOkInPeriod);
+#ifdef CONFIG_SUPPORT_STATIC_SMPS
+		_ssmps_chk_by_tp(padapter, from_timer);
 #endif
-			bEnterPS = _FALSE;
-#ifdef CONFIG_LPS_SLOW_TRANSITION
-			if (bBusyTraffic == _TRUE) {
-				if (pmlmepriv->LinkDetectInfo.TrafficTransitionCount <= 4)
-					pmlmepriv->LinkDetectInfo.TrafficTransitionCount = 4;
-
-				pmlmepriv->LinkDetectInfo.TrafficTransitionCount++;
-
-				/* RTW_INFO("Set TrafficTransitionCount to %d\n", pmlmepriv->LinkDetectInfo.TrafficTransitionCount); */
-
-				if (pmlmepriv->LinkDetectInfo.TrafficTransitionCount > 30/*TrafficTransitionLevel*/)
-					pmlmepriv->LinkDetectInfo.TrafficTransitionCount = 30;
-			}
-#endif /* CONFIG_LPS_SLOW_TRANSITION */
-
-		} else {
-#ifdef DBG_RX_COUNTER_DUMP
-			if (padapter->dump_rx_cnt_mode & DUMP_DRV_TRX_COUNTER_DATA)
-				RTW_INFO("(+)Tx = %d, Rx = %d\n", pmlmepriv->LinkDetectInfo.NumTxOkInPeriod, pmlmepriv->LinkDetectInfo.NumRxUnicastOkInPeriod);
+#ifdef CONFIG_CTRL_TXSS_BY_TP
+		rtw_ctrl_tx_ss_by_tp(padapter, from_timer);
 #endif
-#ifdef CONFIG_LPS_SLOW_TRANSITION
-			if (pmlmepriv->LinkDetectInfo.TrafficTransitionCount >= 2)
-				pmlmepriv->LinkDetectInfo.TrafficTransitionCount -= 2;
-			else
-				pmlmepriv->LinkDetectInfo.TrafficTransitionCount = 0;
-
-			if (pmlmepriv->LinkDetectInfo.TrafficTransitionCount == 0)
-				bEnterPS = _TRUE;
-#else /* CONFIG_LPS_SLOW_TRANSITION */
-			bEnterPS = _TRUE;
-#endif /* CONFIG_LPS_SLOW_TRANSITION */
-		}
 
-#ifdef CONFIG_DYNAMIC_DTIM
-		if (pmlmepriv->LinkDetectInfo.LowPowerTransitionCount == 8)
-			bEnterPS = _FALSE;
-
-		RTW_INFO("LowPowerTransitionCount=%d\n", pmlmepriv->LinkDetectInfo.LowPowerTransitionCount);
-#endif /* CONFIG_DYNAMIC_DTIM */
-
-		/* LeisurePS only work in infra mode. */
-		if (bEnterPS) {
-			if (!from_timer) {
-#ifdef CONFIG_DYNAMIC_DTIM
-				if (pmlmepriv->LinkDetectInfo.LowPowerTransitionCount < 8)
-					adapter_to_pwrctl(padapter)->dtim = 1;
-				else
-					adapter_to_pwrctl(padapter)->dtim = 3;
-#endif /* CONFIG_DYNAMIC_DTIM */
-				LPS_Enter(padapter, "TRAFFIC_IDLE");
-			} else {
-				/* do this at caller */
-				/* rtw_lps_ctrl_wk_cmd(adapter, LPS_CTRL_ENTER, 1); */
-				/* rtw_hal_dm_watchdog_in_lps(padapter); */
-			}
-#ifdef CONFIG_DYNAMIC_DTIM
-			if (adapter_to_pwrctl(padapter)->bFwCurrentInPSMode == _TRUE)
-				pmlmepriv->LinkDetectInfo.LowPowerTransitionCount++;
-#endif /* CONFIG_DYNAMIC_DTIM */
-		} else {
-#ifdef CONFIG_DYNAMIC_DTIM
-			if (pmlmepriv->LinkDetectInfo.LowPowerTransitionCount != 8)
-				pmlmepriv->LinkDetectInfo.LowPowerTransitionCount = 0;
+#ifdef CONFIG_LPS
+		if (adapter_to_pwrctl(padapter)->bLeisurePs && MLME_IS_STA(padapter)) {
+			#ifdef CONFIG_LPS_CHK_BY_TP
+			if (adapter_to_pwrctl(padapter)->lps_chk_by_tp)
+				bEnterPS = _lps_chk_by_tp(padapter, from_timer);
 			else
-				pmlmepriv->LinkDetectInfo.LowPowerTransitionCount++;
-#endif /* CONFIG_DYNAMIC_DTIM			 */
-			if (!from_timer)
-				LPS_Leave(padapter, "TRAFFIC_BUSY");
-			else {
-#ifdef CONFIG_CONCURRENT_MODE
-				#ifndef CONFIG_FW_MULTI_PORT_SUPPORT
-				if (padapter->hw_port == HW_PORT0)
-				#endif
-#endif
-					rtw_lps_ctrl_wk_cmd(padapter, LPS_CTRL_TRAFFIC_BUSY, 1);
-			}
+			#endif /*CONFIG_LPS_CHK_BY_TP*/
+				bEnterPS = _lps_chk_by_pkt_cnts(padapter, from_timer, bBusyTraffic);
 		}
-
 #endif /* CONFIG_LPS */
+
 	} else {
 #ifdef CONFIG_LPS
-		struct dvobj_priv *dvobj = adapter_to_dvobj(padapter);
-		int n_assoc_iface = 0;
-		int i;
-
-		for (i = 0; i < dvobj->iface_nums; i++) {
-			if (check_fwstate(&(dvobj->padapters[i]->mlmepriv), WIFI_ASOC_STATE))
-				n_assoc_iface++;
-		}
-
-		if (!from_timer && n_assoc_iface == 0)
+		if (!from_timer && rtw_mi_get_assoc_if_num(padapter) == 0)
 			LPS_Leave(padapter, "NON_LINKED");
 #endif
 	}
@@ -2633,6 +3174,9 @@ static void dynamic_update_bcn_check(_adapter *padapter)
 	if (!padapter->registrypriv.wifi_spec)
 		return;
 
+	if (!padapter->registrypriv.ht_enable || !is_supported_ht(padapter->registrypriv.wireless_mode))
+		return;
+
 	if (!MLME_IS_AP(padapter))
 		return;
 
@@ -2642,7 +3186,7 @@ static void dynamic_update_bcn_check(_adapter *padapter)
 
 		if (count % 10 == 0) {
 			count = 1;
-
+#ifdef CONFIG_80211N_HT
 			if (_FALSE == ATOMIC_READ(&pmlmepriv->olbc)
 				&& _FALSE == ATOMIC_READ(&pmlmepriv->olbc_ht)) {
 
@@ -2651,8 +3195,10 @@ static void dynamic_update_bcn_check(_adapter *padapter)
 					update_beacon(padapter, _HT_ADD_INFO_IE_, NULL, _TRUE);
 				}
 			}
+#endif /* CONFIG_80211N_HT */
 		}
 
+#ifdef CONFIG_80211N_HT
 		/* In 2s, there are any legacy AP, update HT info, and then reset count  */
 
 		if (_FALSE != ATOMIC_READ(&pmlmepriv->olbc)
@@ -2667,18 +3213,21 @@ static void dynamic_update_bcn_check(_adapter *padapter)
 			ATOMIC_SET(&pmlmepriv->olbc_ht, _FALSE);
 			count = 0;
 		}
-
+#endif /* CONFIG_80211N_HT */
 		count ++;
 	}
 }
 void rtw_iface_dynamic_chk_wk_hdl(_adapter *padapter)
 {
-	struct mlme_priv *pmlmepriv = &(padapter->mlmepriv);
-
 	#ifdef CONFIG_ACTIVE_KEEP_ALIVE_CHECK
 	#ifdef CONFIG_AP_MODE
-	if (MLME_IS_AP(padapter) || MLME_IS_MESH(padapter))
+	if (MLME_IS_AP(padapter) || MLME_IS_MESH(padapter)) {
 		expire_timeout_chk(padapter);
+		#ifdef CONFIG_RTW_MESH
+		if (MLME_IS_MESH(padapter) && MLME_IS_ASOC(padapter))
+			rtw_mesh_peer_status_chk(padapter);
+		#endif
+	}
 	#endif
 	#endif /* CONFIG_ACTIVE_KEEP_ALIVE_CHECK */
 	dynamic_update_bcn_check(padapter);
@@ -2697,6 +3246,11 @@ void rtw_iface_dynamic_chk_wk_hdl(_adapter *padapter)
 	#endif /* !RTW_BEAMFORMING_VERSION_2 */
 	#endif
 
+#ifdef CONFIG_RTW_CFGVEDNOR_RSSIMONITOR
+        rtw_cfgvendor_rssi_monitor_evt(padapter);
+#endif
+
+
 }
 void rtw_dynamic_chk_wk_hdl(_adapter *padapter)
 {
@@ -2732,6 +3286,7 @@ void rtw_dynamic_chk_wk_hdl(_adapter *padapter)
 	rtw_hal_mcc_sw_status_check(padapter);
 #endif /* CONFIG_MCC_MODE */
 
+	rtw_hal_periodic_tsf_update_chk(padapter);
 }
 
 #ifdef CONFIG_LPS
@@ -3131,11 +3686,6 @@ void reset_securitypriv_hdl(_adapter *padapter)
 	rtw_reset_securitypriv(padapter);
 }
 
-void free_assoc_resources_hdl(_adapter *padapter)
-{
-	rtw_free_assoc_resources(padapter, 1);
-}
-
 #ifdef CONFIG_P2P
 u8 p2p_protocol_wk_cmd(_adapter *padapter, int intCmdType)
 {
@@ -3360,7 +3910,7 @@ u8 rtw_ps_cmd(_adapter *padapter)
 	u8	res = _SUCCESS;
 
 #ifdef CONFIG_CONCURRENT_MODE
-	if (padapter->adapter_type != PRIMARY_ADAPTER)
+	if (!is_primary_adapter(padapter))
 		goto exit;
 #endif
 
@@ -3392,6 +3942,96 @@ exit:
 
 }
 
+#ifdef CONFIG_DFS
+void rtw_dfs_ch_switch_hdl(struct dvobj_priv *dvobj)
+{
+	struct rf_ctl_t *rfctl = dvobj_to_rfctl(dvobj);
+	_adapter *pri_adapter = dvobj_get_primary_adapter(dvobj);
+	u8 ifbmp_m = rtw_mi_get_ap_mesh_ifbmp(pri_adapter);
+	u8 ifbmp_s = rtw_mi_get_ld_sta_ifbmp(pri_adapter);
+	s16 req_ch;
+
+	rtw_hal_macid_sleep_all_used(pri_adapter);
+
+	if (rtw_chset_search_ch(rfctl->channel_set, rfctl->csa_ch) >= 0
+		&& !rtw_chset_is_ch_non_ocp(rfctl->channel_set, rfctl->csa_ch)
+	) {
+		/* CSA channel available and valid */
+		req_ch = rfctl->csa_ch;
+		RTW_INFO("%s valid CSA ch%u\n", __func__, rfctl->csa_ch);
+	} else if (ifbmp_m) {
+		/* no available or valid CSA channel, having AP/MESH ifaces */
+		req_ch = REQ_CH_NONE;
+		RTW_INFO("%s ch sel by AP/MESH ifaces\n", __func__);
+	} else {
+		/* no available or valid CSA channel and no AP/MESH ifaces */
+		if (!IsSupported24G(dvobj_to_regsty(dvobj)->wireless_mode)
+			#ifdef CONFIG_DFS_MASTER
+			|| rfctl->radar_detected
+			#endif
+		)
+			req_ch = 36;
+		else
+			req_ch = 1;
+		RTW_INFO("%s switch to ch%d\n", __func__, req_ch);
+	}
+
+	/*  issue deauth for all asoc STA ifaces */
+	if (ifbmp_s) {
+		_adapter *iface;
+		int i;
+
+		for (i = 0; i < dvobj->iface_nums; i++) {
+			iface = dvobj->padapters[i];
+			if (!iface || !(ifbmp_s & BIT(iface->iface_id)))
+				continue;
+			set_fwstate(&iface->mlmepriv, WIFI_OP_CH_SWITCHING);
+
+			/* TODO: true op ch switching */
+			issue_deauth(iface, get_bssid(&iface->mlmepriv), WLAN_REASON_DEAUTH_LEAVING);
+		}
+	}
+
+#ifdef CONFIG_AP_MODE
+	if (ifbmp_m) {
+		/* trigger channel selection without consideraton of asoc STA ifaces */
+		rtw_change_bss_chbw_cmd(dvobj_get_primary_adapter(dvobj), RTW_CMDF_DIRECTLY
+			, ifbmp_m, ifbmp_s, req_ch, REQ_BW_ORI, REQ_OFFSET_NONE);
+	} else
+#endif
+	{
+		/* no AP/MESH iface, switch DFS status and channel directly */
+		rtw_warn_on(req_ch <= 0);
+		#ifdef CONFIG_DFS_MASTER
+		rtw_dfs_rd_en_decision(pri_adapter, MLME_OPCH_SWITCH, ifbmp_s);
+		#endif
+		set_channel_bwmode(pri_adapter, req_ch, HAL_PRIME_CHNL_OFFSET_DONT_CARE, CHANNEL_WIDTH_20);
+	}
+
+	/* make asoc STA ifaces disconnect */
+	/* TODO: true op ch switching */
+	if (ifbmp_s) {
+		_adapter *iface;
+		int i;
+	
+		for (i = 0; i < dvobj->iface_nums; i++) {
+			iface = dvobj->padapters[i];
+			if (!iface || !(ifbmp_s & BIT(iface->iface_id)))
+				continue;
+			rtw_disassoc_cmd(iface, 0, RTW_CMDF_DIRECTLY);
+			rtw_indicate_disconnect(iface, 0, _FALSE);
+			rtw_free_assoc_resources(iface, _TRUE);
+			rtw_free_network_queue(iface, _TRUE);
+		}
+	}
+
+	rfctl->csa_ch = 0;
+
+	rtw_hal_macid_wakeup_all_used(pri_adapter);
+	rtw_mi_os_xmit_schedule(pri_adapter);
+}
+#endif /* CONFIG_DFS */
+
 #ifdef CONFIG_AP_MODE
 
 static void rtw_chk_hi_queue_hdl(_adapter *padapter)
@@ -3467,18 +4107,18 @@ exit:
 }
 
 #ifdef CONFIG_DFS_MASTER
-u8 rtw_dfs_master_hdl(_adapter *adapter)
+u8 rtw_dfs_rd_hdl(_adapter *adapter)
 {
+	struct dvobj_priv *dvobj = adapter_to_dvobj(adapter);
 	struct rf_ctl_t *rfctl = adapter_to_rfctl(adapter);
-	struct mlme_priv *mlme = &adapter->mlmepriv;
 
-	if (!rfctl->dfs_master_enabled)
+	if (!rfctl->radar_detect_enabled)
 		goto exit;
 
-	if (rtw_get_on_cur_ch_time(adapter) == 0
-		|| rtw_get_passing_time_ms(rtw_get_on_cur_ch_time(adapter)) < 300
+	if (dvobj->oper_channel != rfctl->radar_detect_ch
+		|| rtw_get_passing_time_ms(rtw_get_on_oper_ch_time(adapter)) < 300
 	) {
-		/* offchannel , bypass radar detect */
+		/* offchannel, bypass radar detect */
 		goto cac_status_chk;
 	}
 
@@ -3487,53 +4127,43 @@ u8 rtw_dfs_master_hdl(_adapter *adapter)
 		goto cac_status_chk;
 	}
 
-	if (!rfctl->dbg_dfs_master_fake_radar_detect_cnt
+	if (!rfctl->dbg_dfs_fake_radar_detect_cnt
 		&& rtw_odm_radar_detect(adapter) != _TRUE)
 		goto cac_status_chk;
 
-	if (rfctl->dbg_dfs_master_fake_radar_detect_cnt != 0) {
-		RTW_INFO(FUNC_ADPT_FMT" fake radar detect, cnt:%d\n", FUNC_ADPT_ARG(adapter)
-			, rfctl->dbg_dfs_master_fake_radar_detect_cnt);
-		rfctl->dbg_dfs_master_fake_radar_detect_cnt--;
+	if (!rfctl->dbg_dfs_fake_radar_detect_cnt
+		&& rfctl->dbg_dfs_radar_detect_trigger_non
+	) {
+		/* radar detect debug mode, trigger no mlme flow */
+		RTW_INFO("%s radar detected on test mode, trigger no mlme flow\n", __func__);
+		goto cac_status_chk;
 	}
 
-	if (rfctl->dbg_dfs_master_radar_detect_trigger_non) {
-		/* radar detect debug mode, trigger no mlme flow */
-		if (0)
-			RTW_INFO(FUNC_ADPT_FMT" radar detected, trigger no mlme flow for debug\n", FUNC_ADPT_ARG(adapter));
-	} else {
-		/* TODO: move timer to rfctl */
-		struct dvobj_priv *dvobj = adapter_to_dvobj(adapter);
-		int i;
+	if (rfctl->dbg_dfs_fake_radar_detect_cnt != 0) {
+		RTW_INFO("%s fake radar detected, cnt:%d\n", __func__
+			, rfctl->dbg_dfs_fake_radar_detect_cnt);
+		rfctl->dbg_dfs_fake_radar_detect_cnt--;
+	} else
+		RTW_INFO("%s radar detected\n", __func__);
 
-		for (i = 0; i < dvobj->iface_nums; i++) {
-			if (!dvobj->padapters[i])
-				continue;
-			if (check_fwstate(&dvobj->padapters[i]->mlmepriv, WIFI_AP_STATE | WIFI_MESH_STATE)
-				&& check_fwstate(&dvobj->padapters[i]->mlmepriv, WIFI_ASOC_STATE))
-				break;
-		}
+	rfctl->radar_detected = 1;
 
-		if (i >= dvobj->iface_nums) {
-			/* what? */
-			rtw_warn_on(1);
-		} else {
-			rtw_chset_update_non_ocp(rfctl->channel_set
-				, rfctl->radar_detect_ch, rfctl->radar_detect_bw, rfctl->radar_detect_offset);
-			rfctl->radar_detected = 1;
+	rtw_chset_update_non_ocp(rfctl->channel_set
+		, rfctl->radar_detect_ch, rfctl->radar_detect_bw, rfctl->radar_detect_offset);
 
-			/* trigger channel selection */
-			rtw_change_bss_chbw_cmd(dvobj->padapters[i], RTW_CMDF_DIRECTLY, -1, dvobj->padapters[i]->mlmepriv.ori_bw, -1);
-		}
+	rtw_dfs_ch_switch_hdl(dvobj);
 
-		if (rfctl->dfs_master_enabled)
-			goto set_timer;
-		goto exit;
-	}
+	if (rfctl->radar_detect_enabled)
+		goto set_timer;
+	goto exit;
 
 cac_status_chk:
 
-	if (!IS_CH_WAITING(rfctl) && !IS_CAC_STOPPED(rfctl)) {
+	if (!IS_CAC_STOPPED(rfctl)
+		&& ((IS_UNDER_CAC(rfctl) && rfctl->cac_force_stop)
+			|| !IS_CH_WAITING(rfctl)
+			)
+	) {
 		u8 pause = 0x00;
 
 		rtw_hal_set_hwreg(adapter, HW_VAR_TXPAUSE, &pause);
@@ -3559,39 +4189,40 @@ cac_status_chk:
 	}
 
 set_timer:
-	_set_timer(&mlme->dfs_master_timer, DFS_MASTER_TIMER_MS);
+	_set_timer(&rfctl->radar_detect_timer
+		, rtw_odm_radar_detect_polling_int_ms(dvobj));
 
 exit:
 	return H2C_SUCCESS;
 }
 
-u8 rtw_dfs_master_cmd(_adapter *adapter, bool enqueue)
+u8 rtw_dfs_rd_cmd(_adapter *adapter, bool enqueue)
 {
 	struct cmd_obj *cmdobj;
-	struct drvextra_cmd_parm *pdrvextra_cmd_parm;
-	struct cmd_priv *pcmdpriv = &adapter->cmdpriv;
+	struct drvextra_cmd_parm *parm;
+	struct cmd_priv *cmdpriv = &adapter->cmdpriv;
 	u8 res = _FAIL;
 
 	if (enqueue) {
-		cmdobj = (struct cmd_obj *)rtw_zmalloc(sizeof(struct cmd_obj));
+		cmdobj = rtw_zmalloc(sizeof(struct cmd_obj));
 		if (cmdobj == NULL)
 			goto exit;
 
-		pdrvextra_cmd_parm = (struct drvextra_cmd_parm *)rtw_zmalloc(sizeof(struct drvextra_cmd_parm));
-		if (pdrvextra_cmd_parm == NULL) {
-			rtw_mfree((u8 *)cmdobj, sizeof(struct cmd_obj));
+		parm = rtw_zmalloc(sizeof(struct drvextra_cmd_parm));
+		if (parm == NULL) {
+			rtw_mfree(cmdobj, sizeof(struct cmd_obj));
 			goto exit;
 		}
 
-		pdrvextra_cmd_parm->ec_id = DFS_MASTER_WK_CID;
-		pdrvextra_cmd_parm->type = 0;
-		pdrvextra_cmd_parm->size = 0;
-		pdrvextra_cmd_parm->pbuf = NULL;
+		parm->ec_id = DFS_RADAR_DETECT_WK_CID;
+		parm->type = 0;
+		parm->size = 0;
+		parm->pbuf = NULL;
 
-		init_h2fwcmd_w_parm_no_rsp(cmdobj, pdrvextra_cmd_parm, GEN_CMD_CODE(_Set_Drv_Extra));
-		res = rtw_enqueue_cmd(pcmdpriv, cmdobj);
+		init_h2fwcmd_w_parm_no_rsp(cmdobj, parm, GEN_CMD_CODE(_Set_Drv_Extra));
+		res = rtw_enqueue_cmd(cmdpriv, cmdobj);
 	} else {
-		rtw_dfs_master_hdl(adapter);
+		rtw_dfs_rd_hdl(adapter);
 		res = _SUCCESS;
 	}
 
@@ -3599,24 +4230,25 @@ exit:
 	return res;
 }
 
-void rtw_dfs_master_timer_hdl(void *ctx)
+void rtw_dfs_rd_timer_hdl(void *ctx)
 {
-	_adapter *adapter = (_adapter *)ctx;
+	struct rf_ctl_t *rfctl = (struct rf_ctl_t *)ctx;
+	struct dvobj_priv *dvobj = rfctl_to_dvobj(rfctl);
 
-	rtw_dfs_master_cmd(adapter, _TRUE);
+	rtw_dfs_rd_cmd(dvobj_get_primary_adapter(dvobj), _TRUE);
 }
 
-void rtw_dfs_master_enable(_adapter *adapter, u8 ch, u8 bw, u8 offset)
+static void rtw_dfs_rd_enable(struct rf_ctl_t *rfctl, u8 ch, u8 bw, u8 offset, bool bypass_cac)
 {
-	struct rf_ctl_t *rfctl = adapter_to_rfctl(adapter);
-
-	/* TODO: move timer to rfctl */
-	adapter = GET_PRIMARY_ADAPTER(adapter);
+	struct dvobj_priv *dvobj = rfctl_to_dvobj(rfctl);
+	_adapter *adapter = dvobj_get_primary_adapter(dvobj);
 
-	RTW_INFO(FUNC_ADPT_FMT" on %u,%u,%u\n", FUNC_ADPT_ARG(adapter), ch, bw, offset);
+	RTW_INFO("%s on %u,%u,%u\n", __func__, ch, bw, offset);
 
-	if (rtw_is_cac_reset_needed(adapter, ch, bw, offset) == _TRUE)
-		rtw_reset_cac(adapter, ch, bw, offset);
+	if (bypass_cac)
+		rfctl->cac_start_time = rfctl->cac_end_time = RTW_CAC_STOPPED;
+	else if (rtw_is_cac_reset_needed(rfctl, ch, bw, offset) == _TRUE)
+		rtw_reset_cac(rfctl, ch, bw, offset);
 
 	rfctl->radar_detect_by_others = _FALSE;
 	rfctl->radar_detect_ch = ch;
@@ -3628,10 +4260,14 @@ void rtw_dfs_master_enable(_adapter *adapter, u8 ch, u8 bw, u8 offset)
 	if (IS_CH_WAITING(rfctl))
 		StopTxBeacon(adapter);
 
-	if (!rfctl->dfs_master_enabled) {
-		RTW_INFO(FUNC_ADPT_FMT" set dfs_master_enabled\n", FUNC_ADPT_ARG(adapter));
-		rfctl->dfs_master_enabled = 1;
-		_set_timer(&adapter->mlmepriv.dfs_master_timer, DFS_MASTER_TIMER_MS);
+	if (!rfctl->radar_detect_enabled) {
+		RTW_INFO("%s set radar_detect_enabled\n", __func__);
+		rfctl->radar_detect_enabled = 1;
+		#ifdef CONFIG_LPS
+		LPS_Leave(adapter, "RADAR_DETECT_EN");
+		#endif
+		_set_timer(&rfctl->radar_detect_timer
+			, rtw_odm_radar_detect_polling_int_ms(dvobj));
 
 		if (rtw_rfctl_overlap_radar_detect_ch(rfctl)) {
 			if (IS_CH_WAITING(rfctl)) {
@@ -3644,27 +4280,24 @@ void rtw_dfs_master_enable(_adapter *adapter, u8 ch, u8 bw, u8 offset)
 	}
 }
 
-void rtw_dfs_master_disable(_adapter *adapter, u8 ch, u8 bw, u8 offset, bool by_others)
+static void rtw_dfs_rd_disable(struct rf_ctl_t *rfctl, u8 ch, u8 bw, u8 offset, bool by_others)
 {
-	struct rf_ctl_t *rfctl = adapter_to_rfctl(adapter);
-
-	/* TODO: move timer to rfctl */
-	adapter = GET_PRIMARY_ADAPTER(adapter);
+	_adapter *adapter = dvobj_get_primary_adapter(rfctl_to_dvobj(rfctl));
 
 	rfctl->radar_detect_by_others = by_others;
 
-	if (rfctl->dfs_master_enabled) {
+	if (rfctl->radar_detect_enabled) {
 		bool overlap_radar_detect_ch = rtw_rfctl_overlap_radar_detect_ch(rfctl);
 
-		RTW_INFO(FUNC_ADPT_FMT" clear dfs_master_enabled\n", FUNC_ADPT_ARG(adapter));
+		RTW_INFO("%s clear radar_detect_enabled\n", __func__);
 
-		rfctl->dfs_master_enabled = 0;
+		rfctl->radar_detect_enabled = 0;
 		rfctl->radar_detected = 0;
 		rfctl->radar_detect_ch = 0;
 		rfctl->radar_detect_bw = 0;
 		rfctl->radar_detect_offset = 0;
 		rfctl->cac_start_time = rfctl->cac_end_time = RTW_CAC_STOPPED;
-		_cancel_timer_ex(&adapter->mlmepriv.dfs_master_timer);
+		_cancel_timer_ex(&rfctl->radar_detect_timer);
 
 		if (rtw_mi_check_fwstate(adapter, WIFI_UNDER_LINKING|WIFI_SITE_MONITOR) == _FALSE) {
 			ResumeTxBeacon(adapter);
@@ -3686,71 +4319,75 @@ void rtw_dfs_master_disable(_adapter *adapter, u8 ch, u8 bw, u8 offset, bool by_
 	}
 }
 
-void rtw_dfs_master_status_apply(_adapter *adapter, u8 self_action)
+void rtw_dfs_rd_en_decision(_adapter *adapter, u8 mlme_act, u8 excl_ifbmp)
 {
+	struct dvobj_priv *dvobj = adapter_to_dvobj(adapter);
+	struct rf_ctl_t *rfctl = adapter_to_rfctl(adapter);
 	struct mlme_ext_priv *mlmeext = &adapter->mlmeextpriv;
 	struct mi_state mstate;
+	u8 ifbmp;
 	u8 u_ch, u_bw, u_offset;
 	bool ld_sta_in_dfs = _FALSE;
 	bool sync_ch = _FALSE; /* _FALSE: asign channel directly */
 	bool needed = _FALSE;
 
-	rtw_mi_status_no_self(adapter, &mstate);
-	rtw_mi_get_ch_setting_union_no_self(adapter, &u_ch, &u_bw, &u_offset);
-	if (u_ch != 0)
-		sync_ch = _TRUE;
-
-	switch (self_action) {
-	case MLME_STA_CONNECTING:
-		MSTATE_STA_LG_NUM(&mstate)++;
-		break;
-	case MLME_STA_CONNECTED:
-		MSTATE_STA_LD_NUM(&mstate)++;
-		break;
-	case MLME_STA_DISCONNECTED:
-		break;
+	if (mlme_act == MLME_OPCH_SWITCH
+		|| mlme_act == MLME_ACTION_NONE
+	) {
+		ifbmp = ~excl_ifbmp;
+		rtw_mi_status_by_ifbmp(dvobj, ifbmp, &mstate);
+		rtw_mi_get_ch_setting_union_by_ifbmp(dvobj, ifbmp, &u_ch, &u_bw, &u_offset);
+	} else {
+		ifbmp = ~excl_ifbmp & ~BIT(adapter->iface_id);
+		rtw_mi_status_by_ifbmp(dvobj, ifbmp, &mstate);
+		rtw_mi_get_ch_setting_union_by_ifbmp(dvobj, ifbmp, &u_ch, &u_bw, &u_offset);
+		if (u_ch != 0)
+			sync_ch = _TRUE;
+
+		switch (mlme_act) {
+		case MLME_STA_CONNECTING:
+			MSTATE_STA_LG_NUM(&mstate)++;
+			break;
+		case MLME_STA_CONNECTED:
+			MSTATE_STA_LD_NUM(&mstate)++;
+			break;
+		case MLME_STA_DISCONNECTED:
+			break;
 #ifdef CONFIG_AP_MODE
-	case MLME_AP_STARTED:
-		MSTATE_AP_NUM(&mstate)++;
-		break;
-	case MLME_AP_STOPPED:
-		break;
+		case MLME_AP_STARTED:
+			MSTATE_AP_NUM(&mstate)++;
+			break;
+		case MLME_AP_STOPPED:
+			break;
 #endif
 #ifdef CONFIG_RTW_MESH
-	case MLME_MESH_STARTED:
-		MSTATE_MESH_NUM(&mstate)++;
-		break;
-	case MLME_MESH_STOPPED:
-		break;
+		case MLME_MESH_STARTED:
+			MSTATE_MESH_NUM(&mstate)++;
+			break;
+		case MLME_MESH_STOPPED:
+			break;
 #endif
-	case MLME_ACTION_NONE:
-		/* caller without effect of decision */
-		break;
-	default:
-		rtw_warn_on(1);
-		break;
-	}
-
-	if (sync_ch == _TRUE) {
-		if (!rtw_is_chbw_grouped(mlmeext->cur_channel, mlmeext->cur_bwmode, mlmeext->cur_ch_offset, u_ch, u_bw, u_offset)) {
-			RTW_INFO(FUNC_ADPT_FMT" can't sync %u,%u,%u with %u,%u,%u\n", FUNC_ADPT_ARG(adapter)
-				, mlmeext->cur_channel, mlmeext->cur_bwmode, mlmeext->cur_ch_offset, u_ch, u_bw, u_offset);
-			goto apply;
+		default:
+			rtw_warn_on(1);
+			break;
 		}
 
-		rtw_sync_chbw(&mlmeext->cur_channel, &mlmeext->cur_bwmode, &mlmeext->cur_ch_offset
-			, &u_ch, &u_bw, &u_offset);
-	} else {
-		u_ch = mlmeext->cur_channel;
-		u_bw = mlmeext->cur_bwmode;
-		u_offset = mlmeext->cur_ch_offset;
-	}
+		if (sync_ch == _TRUE) {
+			if (!MLME_IS_OPCH_SW(adapter)) {
+				if (!rtw_is_chbw_grouped(mlmeext->cur_channel, mlmeext->cur_bwmode, mlmeext->cur_ch_offset, u_ch, u_bw, u_offset)) {
+					RTW_INFO(FUNC_ADPT_FMT" can't sync %u,%u,%u with %u,%u,%u\n", FUNC_ADPT_ARG(adapter)
+						, mlmeext->cur_channel, mlmeext->cur_bwmode, mlmeext->cur_ch_offset, u_ch, u_bw, u_offset);
+					goto apply;
+				}
 
-	if (MSTATE_STA_LD_NUM(&mstate) > 0) {
-		/* rely on AP on which STA mode connects */
-		if (rtw_is_dfs_chbw(u_ch, u_bw, u_offset))
-			ld_sta_in_dfs = _TRUE;
-		goto apply;
+				rtw_sync_chbw(&mlmeext->cur_channel, &mlmeext->cur_bwmode, &mlmeext->cur_ch_offset
+					, &u_ch, &u_bw, &u_offset);
+			}
+		} else {
+			u_ch = mlmeext->cur_channel;
+			u_bw = mlmeext->cur_bwmode;
+			u_offset = mlmeext->cur_ch_offset;
+		}
 	}
 
 	if (MSTATE_STA_LG_NUM(&mstate) > 0) {
@@ -3758,6 +4395,19 @@ void rtw_dfs_master_status_apply(_adapter *adapter, u8 self_action)
 		goto apply;
 	}
 
+	if (MSTATE_STA_LD_NUM(&mstate) > 0) {
+		if (rtw_is_dfs_chbw(u_ch, u_bw, u_offset)) {
+			/*
+			* if operate as slave w/o radar detect,
+			* rely on AP on which STA mode connects
+			*/
+			if (IS_DFS_SLAVE_WITH_RD(rfctl) && !rtw_odm_dfs_domain_unknown(dvobj))
+				needed = _TRUE;
+			ld_sta_in_dfs = _TRUE;
+		}
+		goto apply;
+	}
+
 	if (!MSTATE_AP_NUM(&mstate) && !MSTATE_MESH_NUM(&mstate)) {
 		/* No working AP/Mesh mode */
 		goto apply;
@@ -3768,17 +4418,46 @@ void rtw_dfs_master_status_apply(_adapter *adapter, u8 self_action)
 
 apply:
 
-	RTW_INFO(FUNC_ADPT_FMT" needed:%d, self_action:%u\n"
-		, FUNC_ADPT_ARG(adapter), needed, self_action);
+	RTW_INFO(FUNC_ADPT_FMT" needed:%d, mlme_act:%u, excl_ifbmp:0x%02x\n"
+		, FUNC_ADPT_ARG(adapter), needed, mlme_act, excl_ifbmp);
 	RTW_INFO(FUNC_ADPT_FMT" ld_sta_num:%u, lg_sta_num:%u, ap_num:%u, mesh_num:%u, %u,%u,%u\n"
 		, FUNC_ADPT_ARG(adapter), MSTATE_STA_LD_NUM(&mstate), MSTATE_STA_LG_NUM(&mstate)
 		, MSTATE_AP_NUM(&mstate), MSTATE_MESH_NUM(&mstate)
 		, u_ch, u_bw, u_offset);
 
 	if (needed == _TRUE)
-		rtw_dfs_master_enable(adapter, u_ch, u_bw, u_offset);
+		rtw_dfs_rd_enable(rfctl, u_ch, u_bw, u_offset, ld_sta_in_dfs);
 	else
-		rtw_dfs_master_disable(adapter, u_ch, u_bw, u_offset, ld_sta_in_dfs);
+		rtw_dfs_rd_disable(rfctl, u_ch, u_bw, u_offset, ld_sta_in_dfs);
+}
+
+u8 rtw_dfs_rd_en_decision_cmd(_adapter *adapter)
+{
+	struct cmd_obj *cmdobj;
+	struct drvextra_cmd_parm *parm;
+	struct cmd_priv *cmdpriv = &adapter->cmdpriv;
+	u8 res = _FAIL;
+
+	cmdobj = rtw_zmalloc(sizeof(struct cmd_obj));
+	if (cmdobj == NULL)
+		goto exit;
+
+	parm = rtw_zmalloc(sizeof(struct drvextra_cmd_parm));
+	if (parm == NULL) {
+		rtw_mfree(cmdobj, sizeof(struct cmd_obj));
+		goto exit;
+	}
+
+	parm->ec_id = DFS_RADAR_DETECT_EN_DEC_WK_CID;
+	parm->type = 0;
+	parm->size = 0;
+	parm->pbuf = NULL;
+
+	init_h2fwcmd_w_parm_no_rsp(cmdobj, parm, GEN_CMD_CODE(_Set_Drv_Extra));
+	res = rtw_enqueue_cmd(cmdpriv, cmdobj);
+
+exit:
+	return res;
 }
 #endif /* CONFIG_DFS_MASTER */
 
@@ -3987,13 +4666,16 @@ static s32 rtw_mp_cmd_hdl(_adapter *padapter, u8 mp_cmd_id)
 	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(padapter);
 	int ret = H2C_SUCCESS;
 	uint status = _SUCCESS;
-	u8 rfreg0;
 
 	if (mp_cmd_id == MP_START) {
 		if (padapter->registrypriv.mp_mode == 0) {
 			rtw_intf_stop(padapter);
 			rtw_hal_deinit(padapter);
 			padapter->registrypriv.mp_mode = 1;
+#if (CONFIG_BTCOEX_SUPPORT_WIFI_ONLY_CFG == 1)
+		padapter->mppriv.CureFuseBTCoex = pHalData->EEPROMBluetoothCoexist;
+		pHalData->EEPROMBluetoothCoexist = _FALSE;
+#endif
 #ifdef CONFIG_RF_POWER_TRIM
 			if (!IS_HARDWARE_TYPE_8814A(padapter) && !IS_HARDWARE_TYPE_8822B(padapter)) {
 				padapter->registrypriv.RegPwrTrimEnable = 1;
@@ -4001,11 +4683,22 @@ static s32 rtw_mp_cmd_hdl(_adapter *padapter, u8 mp_cmd_id)
 			}
 #endif /*CONFIG_RF_POWER_TRIM*/
 			rtw_reset_drv_sw(padapter);
+#ifdef CONFIG_NEW_NETDEV_HDL
+			if (!rtw_is_hw_init_completed(padapter)) {
+				status = rtw_hal_init(padapter);
+				if (status == _FAIL) {
+					ret = H2C_REJECTED;
+					goto exit;
+				}
+				rtw_hal_iface_init(padapter);
+			}
+#else
 			status = rtw_hal_init(padapter);
 			if (status == _FAIL) {
 				ret = H2C_REJECTED;
 				goto exit;
 			}
+#endif /*CONFIG_NEW_NETDEV_HDL*/
 #ifndef RTW_HALMAC
 			rtw_intf_start(padapter);
 #endif /* !RTW_HALMAC */
@@ -4051,12 +4744,26 @@ static s32 rtw_mp_cmd_hdl(_adapter *padapter, u8 mp_cmd_id)
 			rtw_intf_stop(padapter);
 			rtw_hal_deinit(padapter);
 			padapter->registrypriv.mp_mode = 0;
+#if (CONFIG_BTCOEX_SUPPORT_WIFI_ONLY_CFG == 1)
+			pHalData->EEPROMBluetoothCoexist = padapter->mppriv.CureFuseBTCoex;
+#endif
 			rtw_reset_drv_sw(padapter);
+#ifdef CONFIG_NEW_NETDEV_HDL
+			if (!rtw_is_hw_init_completed(padapter)) {
+				status = rtw_hal_init(padapter);
+				if (status == _FAIL) {
+					ret = H2C_REJECTED;
+					goto exit;
+				}
+				rtw_hal_iface_init(padapter);
+			}
+#else
 			status = rtw_hal_init(padapter);
 			if (status == _FAIL) {
 				ret = H2C_REJECTED;
 				goto exit;
 			}
+#endif /*CONFIG_NEW_NETDEV_HDL*/
 #ifndef RTW_HALMAC
 			rtw_intf_start(padapter);
 #endif /* !RTW_HALMAC */
@@ -4618,6 +5325,69 @@ exit:
 	return;
 }
 
+#if defined(CONFIG_RTW_MESH) && defined(RTW_PER_CMD_SUPPORT_FW)
+static s32 rtw_req_per_cmd_hdl(_adapter *adapter)
+{
+	struct dvobj_priv *dvobj = adapter_to_dvobj(adapter);
+	struct macid_ctl_t *macid_ctl = dvobj_to_macidctl(dvobj);
+	struct macid_bmp req_macid_bmp, *macid_bmp;
+	u8 i, ret = _FAIL;
+
+	macid_bmp = &macid_ctl->if_g[adapter->iface_id];
+	_rtw_memcpy(&req_macid_bmp, macid_bmp, sizeof(struct macid_bmp));
+
+	/* Clear none mesh's macid */
+	for (i = 0; i < macid_ctl->num; i++) {
+		u8 role;
+		role = GET_H2CCMD_MSRRPT_PARM_ROLE(&macid_ctl->h2c_msr[i]);
+		if (role != H2C_MSR_ROLE_MESH)
+			rtw_macid_map_clr(&req_macid_bmp, i);
+	}
+
+	/* group_macid: always be 0 in NIC, so only pass macid_bitmap.m0
+	 * rpt_type: 0 includes all info in 1, use 0 for now 
+	 * macid_bitmap: pass m0 only for NIC
+	 */
+	ret = rtw_hal_set_req_per_rpt_cmd(adapter, 0, 0, req_macid_bmp.m0);
+
+	return ret;
+}
+
+u8 rtw_req_per_cmd(_adapter *adapter)
+{
+	struct cmd_obj *cmdobj;
+	struct drvextra_cmd_parm *parm;
+	struct cmd_priv *pcmdpriv = &adapter->cmdpriv;
+	struct submit_ctx sctx;
+	u8 res = _SUCCESS;
+
+	parm = (struct drvextra_cmd_parm *)rtw_zmalloc(sizeof(struct drvextra_cmd_parm));
+	if (parm == NULL) {
+		res = _FAIL;
+		goto exit;
+	}
+
+	parm->ec_id = REQ_PER_CMD_WK_CID;
+	parm->type = 0;
+	parm->size = 0;
+	parm->pbuf = NULL;
+
+	cmdobj = (struct cmd_obj *)rtw_zmalloc(sizeof(*cmdobj));
+	if (cmdobj == NULL) {
+		res = _FAIL;
+		rtw_mfree((u8 *)parm, sizeof(*parm));
+		goto exit;
+	}
+
+	init_h2fwcmd_w_parm_no_rsp(cmdobj, parm, GEN_CMD_CODE(_Set_Drv_Extra));
+
+	res = rtw_enqueue_cmd(pcmdpriv, cmdobj);
+
+exit:
+	return res;
+}
+#endif
+
 u8 rtw_drvextra_cmd_hdl(_adapter *padapter, unsigned char *pbuf)
 {
 	int ret = H2C_SUCCESS;
@@ -4689,7 +5459,7 @@ u8 rtw_drvextra_cmd_hdl(_adapter *padapter, unsigned char *pbuf)
 		reset_securitypriv_hdl(padapter);
 		break;
 	case FREE_ASSOC_RESOURCES:
-		free_assoc_resources_hdl(padapter);
+		free_assoc_resources_hdl(padapter, (u8)pdrvextra_cmd->type);
 		break;
 	case C2H_WK_CID:
 		switch (pdrvextra_cmd->type) {
@@ -4723,8 +5493,11 @@ u8 rtw_drvextra_cmd_hdl(_adapter *padapter, unsigned char *pbuf)
 		break;
 #endif
 #ifdef CONFIG_DFS_MASTER
-	case DFS_MASTER_WK_CID:
-		rtw_dfs_master_hdl(padapter);
+	case DFS_RADAR_DETECT_WK_CID:
+		rtw_dfs_rd_hdl(padapter);
+		break;
+	case DFS_RADAR_DETECT_EN_DEC_WK_CID:
+		rtw_dfs_rd_en_decision(padapter, MLME_ACTION_NONE, 0);
 		break;
 #endif
 	case SESSION_TRACKER_WK_CID:
@@ -4733,6 +5506,9 @@ u8 rtw_drvextra_cmd_hdl(_adapter *padapter, unsigned char *pbuf)
 	case EN_HW_UPDATE_TSF_WK_CID:
 		rtw_hal_set_hwreg(padapter, HW_VAR_EN_HW_UPDATE_TSF, NULL);
 		break;
+	case PERIOD_TSF_UPDATE_END_WK_CID:
+		rtw_hal_periodic_tsf_update_chk(padapter);
+		break;
 	case TEST_H2C_CID:
 		rtw_hal_fill_h2c_cmd(padapter, pdrvextra_cmd->pbuf[0], pdrvextra_cmd->size - 1, &pdrvextra_cmd->pbuf[1]);
 		break;
@@ -4763,6 +5539,22 @@ u8 rtw_drvextra_cmd_hdl(_adapter *padapter, unsigned char *pbuf)
 		ret = rtw_set_mcc_duration_hdl(padapter, pdrvextra_cmd->type, pdrvextra_cmd->pbuf);
 		break;
 #endif /* CONFIG_MCC_MODE */
+#if defined(CONFIG_RTW_MESH) && defined(RTW_PER_CMD_SUPPORT_FW)
+	case REQ_PER_CMD_WK_CID:
+		ret = rtw_req_per_cmd_hdl(padapter);
+		break;
+#endif
+#ifdef CONFIG_SUPPORT_STATIC_SMPS
+	case SSMPS_WK_CID :
+		rtw_ssmps_wk_hdl(padapter, (struct ssmps_cmd_parm *)pdrvextra_cmd->pbuf);
+		break;
+#endif
+#ifdef CONFIG_CTRL_TXSS_BY_TP
+	case TXSS_WK_CID :
+		rtw_ctrl_txss_wk_hdl(padapter, (struct txss_cmd_parm *)pdrvextra_cmd->pbuf);
+		break;
+#endif
+
 	default:
 		break;
 	}
@@ -4842,7 +5634,6 @@ void rtw_joinbss_cmd_callback(_adapter	*padapter,  struct cmd_obj *pcmd)
 void rtw_create_ibss_post_hdl(_adapter *padapter, int status)
 {
 	_irqL irqL;
-	struct sta_info *psta = NULL;
 	struct wlan_network *pwlan = NULL;
 	struct	mlme_priv *pmlmepriv = &padapter->mlmepriv;
 	WLAN_BSSID_EX *pdev_network = &padapter->registrypriv.dev_network;
@@ -4889,7 +5680,6 @@ void rtw_create_ibss_post_hdl(_adapter *padapter, int status)
 
 createbss_cmd_fail:
 	_exit_critical_bh(&pmlmepriv->lock, &irqL);
-exit:
 	return;
 }
 
diff --git a/rtl8723DS/core/rtw_debug.c b/rtl8723DS/core/rtw_debug.c
index 4236998..62e9261 100755..100644
--- a/rtl8723DS/core/rtw_debug.c
+++ b/rtl8723DS/core/rtw_debug.c
@@ -129,9 +129,18 @@ void dump_drv_cfg(void *sel)
 	RTW_PRINT_SEL(sel, "CONFIG_RTW_80211R\n");
 #endif
 
+#ifdef CONFIG_RTW_NETIF_SG
+	RTW_PRINT_SEL(sel, "CONFIG_RTW_NETIF_SG\n");
+#endif
+
 #ifdef CONFIG_RTW_WIFI_HAL
 	RTW_PRINT_SEL(sel, "CONFIG_RTW_WIFI_HAL\n");
 #endif
+
+#ifdef CONFIG_RTW_TPT_MODE
+	RTW_PRINT_SEL(sel, "CONFIG_RTW_TPT_MODE\n");
+#endif 
+
 #ifdef CONFIG_USB_HCI
 #ifdef CONFIG_SUPPORT_USB_INT
 	RTW_PRINT_SEL(sel, "CONFIG_SUPPORT_USB_INT\n");
@@ -171,6 +180,21 @@ void dump_drv_cfg(void *sel)
 #ifdef CONFIG_PCI_HCI
 #endif
 
+	RTW_PRINT_SEL(sel, "CONFIG_IFACE_NUMBER = %d\n", CONFIG_IFACE_NUMBER);
+#ifdef CONFIG_MI_WITH_MBSSID_CAM
+	RTW_PRINT_SEL(sel, "CONFIG_MI_WITH_MBSSID_CAM\n");
+#endif
+#ifdef CONFIG_SWTIMER_BASED_TXBCN
+	RTW_PRINT_SEL(sel, "CONFIG_SWTIMER_BASED_TXBCN\n");
+#endif
+#ifdef CONFIG_FW_HANDLE_TXBCN
+	RTW_PRINT_SEL(sel, "CONFIG_FW_HANDLE_TXBCN\n");
+	RTW_PRINT_SEL(sel, "CONFIG_LIMITED_AP_NUM = %d\n", CONFIG_LIMITED_AP_NUM);
+#endif
+#ifdef CONFIG_CLIENT_PORT_CFG
+	RTW_PRINT_SEL(sel, "CONFIG_CLIENT_PORT_CFG\n");
+#endif
+
 	RTW_PRINT_SEL(sel, "\n=== XMIT-INFO ===\n");
 	RTW_PRINT_SEL(sel, "NR_XMITFRAME = %d\n", NR_XMITFRAME);
 	RTW_PRINT_SEL(sel, "NR_XMITBUFF = %d\n", NR_XMITBUFF);
@@ -261,7 +285,7 @@ void mac_reg_dump(void *sel, _adapter *adapter)
 #endif /* CONFIG_RTL8814A */
 
 
-#if defined(CONFIG_RTL8822B) || defined(CONFIG_RTL8821C)
+#if defined(CONFIG_RTL8822B) || defined(CONFIG_RTL8821C) ||defined(CONFIG_RTL8192F)
 	for (i = 0x1000; i < 0x1800; i += 4) {
 		if (j % 4 == 1)
 			RTW_PRINT_SEL(sel, "0x%04x", i);
@@ -269,7 +293,8 @@ void mac_reg_dump(void *sel, _adapter *adapter)
 		if ((j++) % 4 == 0)
 			_RTW_PRINT_SEL(sel, "\n");
 	}
-#endif /* CONFIG_RTL8822B */
+#endif /* CONFIG_RTL8822B  or 8821c or 8192f*/
+
 }
 
 void bb_reg_dump(void *sel, _adapter *adapter)
@@ -298,7 +323,7 @@ void bb_reg_dump(void *sel, _adapter *adapter)
 
 void bb_reg_dump_ex(void *sel, _adapter *adapter)
 {
-	int i, j = 1;
+	int i;
 
 	RTW_PRINT_SEL(sel, "======= BB REG =======\n");
 	for (i = 0x800; i < 0x1000; i += 4) {
@@ -417,11 +442,25 @@ void dump_adapters_status(void *sel, struct dvobj_priv *dvobj)
 	int i;
 	_adapter *iface;
 	u8 u_ch, u_bw, u_offset;
-
+#if (defined(CONFIG_SUPPORT_MULTI_BCN) && defined(CONFIG_FW_HANDLE_TXBCN)) || defined(CONFIG_CLIENT_PORT_CFG)
+	char str_val[64] = {'\0'};
+#endif
 	dump_mi_status(sel, dvobj);
 
+#if defined(CONFIG_SUPPORT_MULTI_BCN) && defined(CONFIG_FW_HANDLE_TXBCN)
+	RTW_PRINT_SEL(sel, "[AP] LIMITED_AP_NUM:%d\n", CONFIG_LIMITED_AP_NUM);
+	RTW_PRINT_SEL(sel, "[AP] vap_map:0x%02x\n", dvobj->vap_map);
+#endif
+#ifdef CONFIG_HW_P0_TSF_SYNC
+	RTW_PRINT_SEL(sel, "[AP] p0 tsf sync port = %d\n", dvobj->p0_tsf.sync_port);
+	RTW_PRINT_SEL(sel, "[AP] p0 tsf timer offset = %d\n", dvobj->p0_tsf.offset);
+#endif
+#ifdef CONFIG_CLIENT_PORT_CFG
+	RTW_PRINT_SEL(sel, "[CLT] clt_num = %d\n", dvobj->clt_port.num);
+	RTW_PRINT_SEL(sel, "[CLT] clt_map = 0x%02x\n", dvobj->clt_port.bmp);
+#endif
 #ifdef CONFIG_FW_MULTI_PORT_SUPPORT
-	RTW_PRINT_SEL(sel, "default port id:%d\n\n", dvobj->default_port_id);
+	RTW_PRINT_SEL(sel, "[MI] default port id:%d\n\n", dvobj->dft.port_id);
 #endif /* CONFIG_FW_MULTI_PORT_SUPPORT */
 
 	RTW_PRINT_SEL(sel, "dev status:%s%s\n\n"
@@ -448,12 +487,38 @@ void dump_adapters_status(void *sel, struct dvobj_priv *dvobj)
 #define P2P_INFO_DASH
 #endif
 
+#ifdef DBG_TSF_UPDATE
+#define TSF_PAUSE_TIME_TITLE_FMT " %-5s"
+#define TSF_PAUSE_TIME_TITLE_ARG , "tsfup"
+#define TSF_PAUSE_TIME_VALUE_FMT " %5d"
+#define TSF_PAUSE_TIME_VALUE_ARG , ((iface->mlmeextpriv.tsf_update_required && iface->mlmeextpriv.tsf_update_pause_stime) ? (rtw_get_passing_time_ms(iface->mlmeextpriv.tsf_update_pause_stime) > 99999 ? 99999 : rtw_get_passing_time_ms(iface->mlmeextpriv.tsf_update_pause_stime)) : 0)
+#else
+#define TSF_PAUSE_TIME_TITLE_FMT ""
+#define TSF_PAUSE_TIME_TITLE_ARG
+#define TSF_PAUSE_TIME_VALUE_FMT ""
+#define TSF_PAUSE_TIME_VALUE_ARG
+#endif
+
+#if (defined(CONFIG_SUPPORT_MULTI_BCN) && defined(CONFIG_FW_HANDLE_TXBCN)) || defined(CONFIG_CLIENT_PORT_CFG)
+#define INFO_FMT	" %-4s"
+#define INFO_ARG	, "info"
+#define INFO_CNT_FMT	" %-20s"
+#define INFO_CNT_ARG	, str_val
+#else
+#define INFO_FMT	""
+#define INFO_ARG
+#define INFO_CNT_FMT	""
+#define INFO_CNT_ARG
+#endif
+
 	RTW_PRINT_SEL(sel, "%-2s %-15s %c %-3s %-3s %-3s %-17s %-4s %-7s"
 		P2P_INFO_TITLE_FMT
-		" %s\n"
+		TSF_PAUSE_TIME_TITLE_FMT
+		" %s"INFO_FMT"\n"
 		, "id", "ifname", ' ', "bup", "nup", "ncd", "macaddr", "port", "ch"
 		P2P_INFO_TITLE_ARG
-		, "status");
+		TSF_PAUSE_TIME_TITLE_ARG
+		, "status"INFO_ARG);
 
 	RTW_PRINT_SEL(sel, "---------------------------------------------------------------"
 		P2P_INFO_DASH
@@ -462,21 +527,64 @@ void dump_adapters_status(void *sel, struct dvobj_priv *dvobj)
 	for (i = 0; i < dvobj->iface_nums; i++) {
 		iface = dvobj->padapters[i];
 		if (iface) {
+			#if (defined(CONFIG_SUPPORT_MULTI_BCN) && defined(CONFIG_FW_HANDLE_TXBCN)) || defined(CONFIG_CLIENT_PORT_CFG)
+			_rtw_memset(&str_val, '\0', sizeof(str_val));
+			#endif
+			#if defined(CONFIG_SUPPORT_MULTI_BCN) && defined(CONFIG_FW_HANDLE_TXBCN)
+			if (MLME_IS_AP(iface) || MLME_IS_MESH(iface)) {
+				u8 len;
+				char *p = str_val;
+				char tmp_str[10] = {'\0'};
+
+				len = snprintf(tmp_str, sizeof(tmp_str), "%s", "ap_id:");
+				strncpy(p, tmp_str, len);
+				p += len;
+				_rtw_memset(&tmp_str, '\0', sizeof(tmp_str));
+				#ifdef DBG_HW_PORT
+				len = snprintf(tmp_str, sizeof(tmp_str), "%d (%d,%d)", iface->vap_id, iface->hw_port, iface->client_port);
+				#else
+				len = snprintf(tmp_str, sizeof(tmp_str), "%d", iface->vap_id);
+				#endif
+				strncpy(p, tmp_str, len);
+			}
+			#endif
+			#ifdef CONFIG_CLIENT_PORT_CFG
+			if (MLME_IS_STA(iface)) {
+				u8 len;
+				char *p = str_val;
+				char tmp_str[10] = {'\0'};
+
+				len = snprintf(tmp_str, sizeof(tmp_str), "%s", "c_pid:");
+				strncpy(p, tmp_str, len);
+				p += len;
+				_rtw_memset(&tmp_str, '\0', sizeof(tmp_str));
+				#ifdef DBG_HW_PORT
+				len = snprintf(tmp_str, sizeof(tmp_str), "%d (%d,%d)", iface->client_port, iface->hw_port, iface->client_port);
+				#else
+				len = snprintf(tmp_str, sizeof(tmp_str), "%d", iface->client_port);
+				#endif
+				strncpy(p, tmp_str, len);
+			}
+			#endif
+
 			RTW_PRINT_SEL(sel, "%2d %-15s %c %3u %3u %3u "MAC_FMT" %4hhu %3u,%u,%u"
 				P2P_INFO_VALUE_FMT
-				" "MLME_STATE_FMT"\n"
+				TSF_PAUSE_TIME_VALUE_FMT
+				" "MLME_STATE_FMT" " INFO_CNT_FMT"\n"
 				, i, iface->registered ? ADPT_ARG(iface) : NULL
 				, iface->registered ? 'R' : ' '
 				, iface->bup
 				, iface->netif_up
 				, iface->net_closed
 				, MAC_ARG(adapter_mac_addr(iface))
-				, get_hw_port(iface)
+				, rtw_hal_get_port(iface)
 				, iface->mlmeextpriv.cur_channel
 				, iface->mlmeextpriv.cur_bwmode
 				, iface->mlmeextpriv.cur_ch_offset
 				P2P_INFO_VALUE_ARG
+				TSF_PAUSE_TIME_VALUE_ARG
 				, MLME_STATE_ARG(iface)
+				INFO_CNT_ARG
 			);
 		}
 	}
@@ -513,24 +621,11 @@ void dump_adapters_status(void *sel, struct dvobj_priv *dvobj)
 		else {
 			u32 non_ocp_ms;
 			u32 cac_ms;
-			u8 dfs_domain = rtw_odm_get_dfs_domain(dvobj_get_primary_adapter(dvobj));
+			u8 dfs_domain = rtw_odm_get_dfs_domain(dvobj);
 
 			_RTW_PRINT_SEL(sel, ", domain:%u", dfs_domain);
 
-			for (i = 0; i < dvobj->iface_nums; i++) {
-				if (!dvobj->padapters[i])
-					continue;
-				if (check_fwstate(&dvobj->padapters[i]->mlmepriv, WIFI_AP_STATE | WIFI_MESH_STATE)
-					&& check_fwstate(&dvobj->padapters[i]->mlmepriv, WIFI_ASOC_STATE))
-					break;
-			}
-
-			if (i >= dvobj->iface_nums) {
-				RTW_PRINT_SEL(sel, "DFS master enable without AP/Mesh mode???");
-				goto end_dfs_master;
-			}
-
-			rtw_get_ch_waiting_ms(dvobj->padapters[i]
+			rtw_get_ch_waiting_ms(rfctl
 				, rfctl->radar_detect_ch
 				, rfctl->radar_detect_bw
 				, rfctl->radar_detect_offset
@@ -697,7 +792,6 @@ int proc_get_read_reg(struct seq_file *m, void *v)
 
 ssize_t proc_set_read_reg(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data)
 {
-	struct net_device *dev = data;
 	char tmp[16];
 	u32 addr, len;
 
@@ -753,9 +847,9 @@ int proc_get_rx_stat(struct seq_file *m, void *v)
 
 			if (pstats == NULL)
 				continue;
-			if ((_rtw_memcmp(psta->cmn.mac_addr, bc_addr, 6) !=  _TRUE)
-				&& (_rtw_memcmp(psta->cmn.mac_addr, null_addr, 6) != _TRUE)
-				&& (_rtw_memcmp(psta->cmn.mac_addr, adapter_mac_addr(adapter), 6) != _TRUE)) {
+			if ((_rtw_memcmp(psta->cmn.mac_addr, bc_addr, ETH_ALEN) !=  _TRUE)
+				&& (_rtw_memcmp(psta->cmn.mac_addr, null_addr, ETH_ALEN) != _TRUE)
+				&& (_rtw_memcmp(psta->cmn.mac_addr, adapter_mac_addr(adapter), ETH_ALEN) != _TRUE)) {
 				RTW_PRINT_SEL(m, "MAC :\t\t"MAC_FMT "\n", MAC_ARG(psta->cmn.mac_addr));
 				RTW_PRINT_SEL(m, "data_rx_cnt :\t%llu\n", sta_rx_data_uc_pkts(psta) - pstats->last_rx_data_uc_pkts);
 				pstats->last_rx_data_uc_pkts = sta_rx_data_uc_pkts(psta);
@@ -783,9 +877,12 @@ int proc_get_tx_stat(struct seq_file *m, void *v)
 	_list	*plist, *phead;
 	struct net_device *dev = m->private;
 	_adapter *adapter = (_adapter *)rtw_netdev_priv(dev);
-	struct sta_info *psta = NULL, *sta_rec[NUM_STA];
+	struct sta_info *psta = NULL;
+	u8 sta_mac[NUM_STA][ETH_ALEN] = {{0}};
+	uint mac_id[NUM_STA];
 	struct stainfo_stats	*pstats = NULL;
 	struct sta_priv	*pstapriv = &(adapter->stapriv);
+	struct sta_priv	*pstapriv_primary = &(GET_PRIMARY_ADAPTER(adapter))->stapriv;
 	u32 i, macid_rec_idx = 0;
 	u8 bc_addr[ETH_ALEN] = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff};
 	u8 null_addr[ETH_ALEN] = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00};
@@ -793,40 +890,54 @@ int proc_get_tx_stat(struct seq_file *m, void *v)
 
 	_enter_critical_bh(&pstapriv->sta_hash_lock, &irqL);
 	for (i = 0; i < NUM_STA; i++) {
-		sta_rec[i] = NULL;
 		phead = &(pstapriv->sta_hash[i]);
 		plist = get_next(phead);
 		while ((rtw_end_of_queue_search(phead, plist)) == _FALSE) {
 			psta = LIST_CONTAINOR(plist, struct sta_info, hash_list);
 			plist = get_next(plist);
-			if ((_rtw_memcmp(psta->cmn.mac_addr, bc_addr, 6) !=  _TRUE)
-				&& (_rtw_memcmp(psta->cmn.mac_addr, null_addr, 6) != _TRUE)
-				&& (_rtw_memcmp(psta->cmn.mac_addr, adapter_mac_addr(adapter), 6) != _TRUE)) {
-				sta_rec[macid_rec_idx++] = psta;
+			if ((_rtw_memcmp(psta->cmn.mac_addr, bc_addr, ETH_ALEN) !=  _TRUE)
+				&& (_rtw_memcmp(psta->cmn.mac_addr, null_addr, ETH_ALEN) != _TRUE)
+				&& (_rtw_memcmp(psta->cmn.mac_addr, adapter_mac_addr(adapter), ETH_ALEN) != _TRUE)) {
+				_rtw_memcpy(&sta_mac[macid_rec_idx][0], psta->cmn.mac_addr, ETH_ALEN);
+				mac_id[macid_rec_idx] = psta->cmn.mac_id;
+				macid_rec_idx++;
 			}
 		}
 	}
 	_exit_critical_bh(&pstapriv->sta_hash_lock, &irqL);
 	for (i = 0; i < macid_rec_idx; i++) {
-		pstats = &(sta_rec[i]->sta_stats);
-		if (pstats == NULL)
-			continue;
-		pstapriv->c2h_sta = sta_rec[i];
-		rtw_hal_reqtxrpt(adapter, sta_rec[i]->cmn.mac_id);
+		_rtw_memcpy(pstapriv_primary->c2h_sta_mac, &sta_mac[i][0], ETH_ALEN);
+		pstapriv_primary->c2h_adapter_id = adapter->iface_id;
 		rtw_sctx_init(&gotc2h, 60);
-		pstapriv->gotc2h = &gotc2h;
+		pstapriv_primary->gotc2h = &gotc2h;
+		rtw_hal_reqtxrpt(adapter, mac_id[i]);
 		if (rtw_sctx_wait(&gotc2h, __func__)) {
-			RTW_PRINT_SEL(m, "MAC :\t\t"MAC_FMT "\n", MAC_ARG(sta_rec[i]->cmn.mac_addr));
-			RTW_PRINT_SEL(m, "data_sent_cnt :\t%u\n", pstats->tx_ok_cnt + pstats->tx_fail_cnt);
-			RTW_PRINT_SEL(m, "success_cnt :\t%u\n", pstats->tx_ok_cnt);
-			RTW_PRINT_SEL(m, "failure_cnt :\t%u\n", pstats->tx_fail_cnt);
-			RTW_PRINT_SEL(m, "retry_cnt :\t%u\n\n", pstats->tx_retry_cnt);
+			psta = rtw_get_stainfo(pstapriv, &sta_mac[i][0]);
+			if(psta) {
+				pstats = &psta->sta_stats;
+#ifndef ROKU_PRIVATE
+				RTW_PRINT_SEL(m, "data_sent_cnt :\t%u\n", pstats->tx_ok_cnt + pstats->tx_fail_cnt);
+				RTW_PRINT_SEL(m, "success_cnt :\t%u\n", pstats->tx_ok_cnt);
+				RTW_PRINT_SEL(m, "failure_cnt :\t%u\n", pstats->tx_fail_cnt);
+				RTW_PRINT_SEL(m, "retry_cnt :\t%u\n\n", pstats->tx_retry_cnt);
+#else
+				RTW_PRINT_SEL(m, "MAC: " MAC_FMT " sent: %u fail: %u retry: %u\n",
+				MAC_ARG(&sta_mac[i][0]), pstats->tx_ok_cnt, pstats->tx_fail_cnt, pstats->tx_retry_cnt);
+#endif /* ROKU_PRIVATE */
+
+			} else
+				RTW_PRINT_SEL(m, "STA is gone\n");
 		} else {
+			//to avoid c2h modify counters
+			pstapriv_primary->gotc2h = NULL;
+			_rtw_memset(pstapriv_primary->c2h_sta_mac, 0, ETH_ALEN);
+			pstapriv_primary->c2h_adapter_id = CONFIG_IFACE_NUMBER;
 			RTW_PRINT_SEL(m, "Warming : Query timeout, operation abort!!\n");
-			RTW_PRINT_SEL(m, "\n");
-			pstapriv->c2h_sta = NULL;
 			break;
 		}
+		pstapriv_primary->gotc2h = NULL;
+		_rtw_memset(pstapriv_primary->c2h_sta_mac, 0, ETH_ALEN);
+		pstapriv_primary->c2h_adapter_id = CONFIG_IFACE_NUMBER;
 	}
 	return 0;
 }
@@ -931,11 +1042,11 @@ int proc_get_roam_param(struct seq_file *m, void *v)
 	_adapter *adapter = (_adapter *)rtw_netdev_priv(dev);
 	struct mlme_priv *mlme = &adapter->mlmepriv;
 
-	RTW_PRINT_SEL(m, "%12s %12s %11s %14s\n", "rssi_diff_th", "scanr_exp_ms", "scan_int_ms", "rssi_threshold");
-	RTW_PRINT_SEL(m, "%-12u %-12u %-11u %-14u\n"
+	RTW_PRINT_SEL(m, "%12s %15s %26s %16s\n", "rssi_diff_th", "scanr_exp_ms", "scan_interval(unit:2 sec)", "rssi_threshold");
+	RTW_PRINT_SEL(m, "%-15u %-13u %-27u %-11u\n"
 		, mlme->roam_rssi_diff_th
 		, mlme->roam_scanr_exp_ms
-		, mlme->roam_scan_int_ms
+		, mlme->roam_scan_int
 		, mlme->roam_rssi_threshold
 	);
 
@@ -951,7 +1062,7 @@ ssize_t proc_set_roam_param(struct file *file, const char __user *buffer, size_t
 	char tmp[32];
 	u8 rssi_diff_th;
 	u32 scanr_exp_ms;
-	u32 scan_int_ms;
+	u32 scan_int;
 	u8 rssi_threshold;
 
 	if (count < 1)
@@ -964,14 +1075,14 @@ ssize_t proc_set_roam_param(struct file *file, const char __user *buffer, size_t
 
 	if (buffer && !copy_from_user(tmp, buffer, count)) {
 
-		int num = sscanf(tmp, "%hhu %u %u %hhu", &rssi_diff_th, &scanr_exp_ms, &scan_int_ms, &rssi_threshold);
+		int num = sscanf(tmp, "%hhu %u %u %hhu", &rssi_diff_th, &scanr_exp_ms, &scan_int, &rssi_threshold);
 
 		if (num >= 1)
 			mlme->roam_rssi_diff_th = rssi_diff_th;
 		if (num >= 2)
 			mlme->roam_scanr_exp_ms = scanr_exp_ms;
 		if (num >= 3)
-			mlme->roam_scan_int_ms = scan_int_ms;
+			mlme->roam_scan_int = scan_int;
 		if (num >= 4)
 			mlme->roam_rssi_threshold = rssi_threshold;
 	}
@@ -1226,87 +1337,6 @@ int proc_get_scan_abort(struct seq_file *m, void *v)
 	return 0;
 }
 
-#ifdef CONFIG_SCAN_BACKOP
-int proc_get_backop_flags_sta(struct seq_file *m, void *v)
-{
-	struct net_device *dev = m->private;
-	_adapter *adapter = (_adapter *)rtw_netdev_priv(dev);
-	struct mlme_ext_priv *mlmeext = &adapter->mlmeextpriv;
-
-	RTW_PRINT_SEL(m, "0x%02x\n", mlmeext_scan_backop_flags_sta(mlmeext));
-
-	return 0;
-}
-
-ssize_t proc_set_backop_flags_sta(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data)
-{
-	struct net_device *dev = data;
-	_adapter *adapter = (_adapter *)rtw_netdev_priv(dev);
-	struct mlme_ext_priv *mlmeext = &adapter->mlmeextpriv;
-
-	char tmp[32];
-	u8 flags;
-
-	if (count < 1)
-		return -EFAULT;
-
-	if (count > sizeof(tmp)) {
-		rtw_warn_on(1);
-		return -EFAULT;
-	}
-
-	if (buffer && !copy_from_user(tmp, buffer, count)) {
-
-		int num = sscanf(tmp, "%hhx", &flags);
-
-		if (num == 1)
-			mlmeext_assign_scan_backop_flags_sta(mlmeext, flags);
-	}
-
-	return count;
-}
-
-int proc_get_backop_flags_ap(struct seq_file *m, void *v)
-{
-	struct net_device *dev = m->private;
-	_adapter *adapter = (_adapter *)rtw_netdev_priv(dev);
-	struct mlme_ext_priv *mlmeext = &adapter->mlmeextpriv;
-
-	RTW_PRINT_SEL(m, "0x%02x\n", mlmeext_scan_backop_flags_ap(mlmeext));
-
-	return 0;
-}
-
-ssize_t proc_set_backop_flags_ap(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data)
-{
-	struct net_device *dev = data;
-	_adapter *adapter = (_adapter *)rtw_netdev_priv(dev);
-	struct mlme_ext_priv *mlmeext = &adapter->mlmeextpriv;
-
-	char tmp[32];
-	u8 flags;
-
-	if (count < 1)
-		return -EFAULT;
-
-	if (count > sizeof(tmp)) {
-		rtw_warn_on(1);
-		return -EFAULT;
-	}
-
-	if (buffer && !copy_from_user(tmp, buffer, count)) {
-
-		int num = sscanf(tmp, "%hhx", &flags);
-
-		if (num == 1)
-			mlmeext_assign_scan_backop_flags_ap(mlmeext, flags);
-	}
-
-	return count;
-}
-
-#endif /* CONFIG_SCAN_BACKOP */
-
 #ifdef CONFIG_RTW_REPEATER_SON
 int proc_get_rson_data(struct seq_file *m, void *v)
 {
@@ -1370,6 +1400,11 @@ int proc_get_survey_info(struct seq_file *m, void *v)
 	char flag_str[64];
 	int ielen = 0;
 	u32 wpsielen = 0;
+#ifdef CONFIG_RTW_MESH
+	const char *ssid_title_str = "ssid/mesh_id";
+#else
+	const char *ssid_title_str = "ssid";
+#endif
 
 	_enter_critical_bh(&(pmlmepriv->scanned_queue.lock), &irqL);
 	phead = get_list_head(queue);
@@ -1383,7 +1418,7 @@ int proc_get_survey_info(struct seq_file *m, void *v)
 	rtw_rson_show_survey_info(m, plist, phead);
 #else
 
-	RTW_PRINT_SEL(m, "%5s  %-17s  %3s  %-3s  %-4s  %-4s  %5s  %32s  %32s\n", "index", "bssid", "ch", "RSSI", "SdBm", "Noise", "age", "flag", "ssid");
+	RTW_PRINT_SEL(m, "%5s  %-17s  %3s  %-3s  %-4s  %-4s  %5s  %32s  %32s\n", "index", "bssid", "ch", "RSSI", "SdBm", "Noise", "age", "flag", ssid_title_str);
 	while (1) {
 		if (rtw_end_of_queue_search(phead, plist) == _TRUE)
 			break;
@@ -1415,19 +1450,21 @@ int proc_get_survey_info(struct seq_file *m, void *v)
 			(ie_wpa2) ? "[WPA2]" : "",
 			(!ie_wpa && !ie_wpa && ie_cap & BIT(4)) ? "[WEP]" : "",
 			(ie_wps) ? "[WPS]" : "",
-			(pnetwork->network.InfrastructureMode == Ndis802_11IBSS) ? "[IBSS]" : "",
+			(pnetwork->network.InfrastructureMode == Ndis802_11IBSS) ? "[IBSS]" :
+				(pnetwork->network.InfrastructureMode == Ndis802_11_mesh) ? "[MESH]" : "",
 			(ie_cap & BIT(0)) ? "[ESS]" : "",
 			(ie_p2p) ? "[P2P]" : "");
 		RTW_PRINT_SEL(m, "%5d  "MAC_FMT"  %3d  %3d  %4d  %4d    %5d  %32s  %32s\n",
-			      ++index,
-			      MAC_ARG(pnetwork->network.MacAddress),
-			      pnetwork->network.Configuration.DSConfig,
-			      (int)pnetwork->network.Rssi,
-			      notify_signal,
-			      notify_noise,
+			++index,
+			MAC_ARG(pnetwork->network.MacAddress),
+			pnetwork->network.Configuration.DSConfig,
+			(int)pnetwork->network.Rssi,
+			notify_signal,
+			notify_noise,
 			rtw_get_passing_time_ms(pnetwork->last_scanned),
-			      flag_str,
-			      pnetwork->network.Ssid.Ssid);
+			flag_str,
+			pnetwork->network.InfrastructureMode == Ndis802_11_mesh ? pnetwork->network.mesh_id.Ssid : pnetwork->network.Ssid.Ssid
+		);
 		plist = get_next(plist);
 	}
 #endif
@@ -1439,17 +1476,26 @@ _exit:
 
 ssize_t proc_set_survey_info(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data)
 {
-	_irqL irqL;
 	struct net_device *dev = data;
 	_adapter *padapter = (_adapter *)rtw_netdev_priv(dev);
-	struct mlme_priv	*pmlmepriv = &(padapter->mlmepriv);
-	bool need_indicate_scan_done = _FALSE;
 	u8 _status = _FALSE;
-	NDIS_802_11_SSID ssid[RTW_SSID_SCAN_AMOUNT];
-
+	u8 ssc_chk;
 	if (count < 1)
 		return -EFAULT;
 
+#if 1
+	ssc_chk = rtw_sitesurvey_condition_check(padapter, _FALSE);
+	if (ssc_chk != SS_ALLOW)
+		goto exit;
+
+	rtw_ps_deny(padapter, PS_DENY_SCAN);
+	if (_FAIL == rtw_pwr_wakeup(padapter))
+		goto cancel_ps_deny;
+	if (!rtw_is_adapter_up(padapter)) {
+		RTW_INFO("scan abort!! adapter cannot use\n");
+		goto cancel_ps_deny;
+	}
+#else
 #ifdef CONFIG_MP_INCLUDED
 	if (rtw_mp_mode_check(padapter)) {
 		RTW_INFO("MP mode block Scan request\n");
@@ -1491,6 +1537,7 @@ ssize_t proc_set_survey_info(struct file *file, const char __user *buffer, size_
 		goto cancel_ps_deny;
 	}
 #endif
+#endif
 	_status = rtw_set_802_11_bssid_list_scan(padapter, NULL);
 
 cancel_ps_deny:
@@ -1498,6 +1545,68 @@ cancel_ps_deny:
 exit:
 	return count;
 }
+#ifdef ROKU_PRIVATE
+int proc_get_infra_ap(struct seq_file *m, void *v)
+{
+	struct net_device *dev = m->private;
+	struct sta_info *psta;
+	_adapter *padapter = (_adapter *)rtw_netdev_priv(dev);
+	struct mlme_priv *pmlmepriv = &(padapter->mlmepriv);
+	struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv;
+	struct ht_priv_infra_ap *phtpriv = &pmlmepriv->htpriv_infra_ap;
+#ifdef CONFIG_80211AC_VHT
+	struct vht_priv_infra_ap *pvhtpriv = &pmlmepriv->vhtpriv_infra_ap;
+#endif
+	struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info);
+	struct wlan_network *cur_network = &(pmlmepriv->cur_network);
+	struct sta_priv *pstapriv = &padapter->stapriv;
+
+	if (check_fwstate(pmlmepriv, WIFI_STATION_STATE)) {
+		psta = rtw_get_stainfo(pstapriv, cur_network->network.MacAddress);
+		if (psta) {
+			unsigned int i, j;
+			unsigned int Rx_ss = 0, Tx_ss = 0;
+			struct recv_reorder_ctrl *preorder_ctrl;
+
+			RTW_PRINT_SEL(m, "SSID=%s\n", pmlmeinfo->network.Ssid.Ssid);
+			RTW_PRINT_SEL(m, "sta's macaddr:" MAC_FMT "\n", MAC_ARG(psta->cmn.mac_addr));
+			RTW_PRINT_SEL(m, "Supported rate=");
+			for (i = 0; i < NDIS_802_11_LENGTH_RATES_EX; i++) {
+				if (pmlmeinfo->SupportedRates_infra_ap[i] == 0)
+					break;
+				RTW_PRINT_SEL(m, " 0x%x", pmlmeinfo->SupportedRates_infra_ap[i]);
+			}
+			RTW_PRINT_SEL(m, "\n");
+#ifdef CONFIG_80211N_HT
+			if (pmlmeinfo->ht_vht_received & BIT(0)) {
+				RTW_PRINT_SEL(m, "Supported MCS set=");
+				for (i = 0; i < 16 ; i++)
+					RTW_PRINT_SEL(m, " 0x%02x",  phtpriv->MCS_set_infra_ap[i]);
+				RTW_PRINT_SEL(m, "\n");
+				RTW_PRINT_SEL(m, "highest supported data rate=0x%x\n", phtpriv->rx_highest_data_rate_infra_ap);
+				RTW_PRINT_SEL(m, "HT_supported_channel_width_set=0x%x\n", phtpriv->channel_width_infra_ap);
+				RTW_PRINT_SEL(m, "sgi_20m=%d, sgi_40m=%d\n", phtpriv->sgi_20m_infra_ap, phtpriv->sgi_40m_infra_ap);
+				RTW_PRINT_SEL(m, "ldpc_cap=0x%x, stbc_cap=0x%x\n", phtpriv->ldpc_cap_infra_ap, phtpriv->stbc_cap_infra_ap);
+				RTW_PRINT_SEL(m, "HT_number_of_stream=%d\n", phtpriv->Rx_ss_infra_ap);
+			}
+#endif
+
+#ifdef CONFIG_80211AC_VHT
+			if (pmlmeinfo->ht_vht_received & BIT(1)) {
+				RTW_PRINT_SEL(m, "VHT_supported_channel_width_set=0x%x\n", pvhtpriv->channel_width_infra_ap);
+				RTW_PRINT_SEL(m, "vht_ldpc_cap=0x%x, vht_stbc_cap=0x%x, vht_beamform_cap=0x%x\n", pvhtpriv->ldpc_cap_infra_ap, pvhtpriv->stbc_cap_infra_ap, pvhtpriv->beamform_cap_infra_ap);
+				RTW_PRINT_SEL(m, "Rx_vht_mcs_map=0x%x, Tx_vht_mcs_map=0x%x\n", *(u16 *)pvhtpriv->vht_mcs_map_infra_ap, *(u16 *)pvhtpriv->vht_mcs_map_tx_infra_ap);
+				RTW_PRINT_SEL(m, "VHT_number_of_stream=%d\n", pvhtpriv->number_of_streams_infra_ap);
+			}
+#endif
+		} else
+			RTW_PRINT_SEL(m, "can't get sta's macaddr, cur_network's macaddr:" MAC_FMT "\n", MAC_ARG(cur_network->network.MacAddress));
+	} else
+		RTW_PRINT_SEL(m, "this only applies to STA mode\n");
+	return 0;
+}
+
+#endif /* ROKU_PRIVATE */
 
 int proc_get_ap_info(struct seq_file *m, void *v)
 {
@@ -1507,8 +1616,14 @@ int proc_get_ap_info(struct seq_file *m, void *v)
 	struct mlme_priv *pmlmepriv = &(padapter->mlmepriv);
 	struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv;
 	struct wlan_network *cur_network = &(pmlmepriv->cur_network);
+	struct mlme_ext_info	*pmlmeinfo = &(pmlmeext->mlmext_info);
 	struct sta_priv *pstapriv = &padapter->stapriv;
 
+	/* ap vendor */
+	char vendor[VENDOR_NAME_LEN] = {0};
+	get_assoc_AP_Vendor(vendor,pmlmeinfo->assoc_AP_vendor);
+	RTW_PRINT_SEL(m,"AP Vendor %s\n", vendor);
+
 	psta = rtw_get_stainfo(pstapriv, cur_network->network.MacAddress);
 	if (psta) {
 		RTW_PRINT_SEL(m, "SSID=%s\n", cur_network->network.Ssid.Ssid);
@@ -1530,7 +1645,6 @@ int proc_get_ap_info(struct seq_file *m, void *v)
 		RTW_PRINT_SEL(m, "vht_ldpc_cap=0x%x, vht_stbc_cap=0x%x, vht_beamform_cap=0x%x\n", psta->vhtpriv.ldpc_cap, psta->vhtpriv.stbc_cap, psta->vhtpriv.beamform_cap);
 		RTW_PRINT_SEL(m, "vht_mcs_map=0x%x, vht_highest_rate=0x%x, vht_ampdu_len=%d\n", *(u16 *)psta->vhtpriv.vht_mcs_map, psta->vhtpriv.vht_highest_rate, psta->vhtpriv.ampdu_len);
 #endif
-
 		sta_rx_reorder_ctl_dump(m, psta);
 	} else
 		RTW_PRINT_SEL(m, "can't get sta's macaddr, cur_network's macaddr:" MAC_FMT "\n", MAC_ARG(cur_network->network.MacAddress));
@@ -1554,7 +1668,7 @@ ssize_t proc_reset_trx_info(struct file *file, const char __user *buffer, size_t
 	if (buffer && !copy_from_user(cmd, buffer, count)) {
 		int num = sscanf(cmd, "%hhx", &cnt);
 
-		if (0 == cnt) {
+		if (num == 1 && cnt == 0) {
 			precvpriv->dbg_rx_ampdu_drop_count = 0;
 			precvpriv->dbg_rx_ampdu_forced_indicate_count = 0;
 			precvpriv->dbg_rx_ampdu_loss_count = 0;
@@ -1576,6 +1690,14 @@ int proc_get_trx_info(struct seq_file *m, void *v)
 	struct xmit_priv *pxmitpriv = &padapter->xmitpriv;
 	struct recv_priv  *precvpriv = &padapter->recvpriv;
 	struct hw_xmit *phwxmit;
+	u16 vo_params[4], vi_params[4], be_params[4], bk_params[4];
+
+	padapter->hal_func.read_wmmedca_reg(padapter, vo_params, vi_params, be_params, bk_params);
+
+	RTW_PRINT_SEL(m, "wmm_edca_vo, aifs = %u us, cw_min = %u, cw_max = %u, txop_limit = %u us\n", vo_params[0], vo_params[1], vo_params[2], vo_params[3]);
+	RTW_PRINT_SEL(m, "wmm_edca_vi, aifs = %u us, cw_min = %u, cw_max = %u, txop_limit = %u us\n", vi_params[0], vi_params[1], vi_params[2], vi_params[3]);
+	RTW_PRINT_SEL(m, "wmm_edca_be, aifs = %u us, cw_min = %u, cw_max = %u, txop_limit = %u us\n", be_params[0], be_params[1], be_params[2], be_params[3]);
+	RTW_PRINT_SEL(m, "wmm_edca_bk, aifs = %u us, cw_min = %u, cw_max = %u, txop_limit = %u us\n", bk_params[0], bk_params[1], bk_params[2], bk_params[3]);
 
 	dump_os_queue(m, padapter);
 
@@ -1614,43 +1736,6 @@ int proc_get_trx_info(struct seq_file *m, void *v)
 	return 0;
 }
 
-int proc_get_dis_pwt(struct seq_file *m, void *v)
-{
-	struct net_device *dev = m->private;
-	_adapter *padapter = (_adapter *)rtw_netdev_priv(dev);
-	u8 dis_pwt = 0;
-	rtw_hal_get_def_var(padapter, HAL_DEF_DBG_DIS_PWT, &(dis_pwt));
-	RTW_PRINT_SEL(m, " Tx Power training mode:%s\n", (dis_pwt == _TRUE) ? "Disable" : "Enable");
-	return 0;
-}
-ssize_t proc_set_dis_pwt(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data)
-{
-	struct net_device *dev = data;
-	_adapter *padapter = (_adapter *)rtw_netdev_priv(dev);
-	char tmp[4] = {0};
-	u8 dis_pwt = 0;
-
-	if (count < 1)
-		return -EFAULT;
-
-	if (count > sizeof(tmp)) {
-		rtw_warn_on(1);
-		return -EFAULT;
-	}
-
-	if (buffer && !copy_from_user(tmp, buffer, count)) {
-
-		int num = sscanf(tmp, "%hhx", &dis_pwt);
-		RTW_INFO("Set Tx Power training mode:%s\n", (dis_pwt == _TRUE) ? "Disable" : "Enable");
-
-		if (num >= 1)
-			rtw_hal_set_def_var(padapter, HAL_DEF_DBG_DIS_PWT, &(dis_pwt));
-	}
-
-	return count;
-
-}
-
 int proc_get_rate_ctl(struct seq_file *m, void *v)
 {
 	struct net_device *dev = m->private;
@@ -1673,14 +1758,21 @@ int proc_get_rate_ctl(struct seq_file *m, void *v)
 	return 0;
 }
 
+#ifdef 	CONFIG_PHDYM_FW_FIXRATE
+void phydm_fw_fix_rate(void *dm_void, u8 en, u8	macid, u8 bw, u8 rate);
+#endif
 ssize_t proc_set_rate_ctl(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data)
 {
 	struct net_device *dev = data;
 	_adapter *adapter = (_adapter *)rtw_netdev_priv(dev);
 	HAL_DATA_TYPE *hal_data = GET_HAL_DATA(adapter);
 	char tmp[32];
-	u8 fix_rate;
-	u8 data_fb;
+	u8 fix_rate = 0xFF;
+#ifdef 	CONFIG_PHDYM_FW_FIXRATE
+	u8 bw = 0;
+#else
+	u8 data_fb = 0;
+#endif
 
 	if (count < 1)
 		return -EFAULT;
@@ -1691,7 +1783,56 @@ ssize_t proc_set_rate_ctl(struct file *file, const char __user *buffer, size_t c
 	}
 
 	if (buffer && !copy_from_user(tmp, buffer, count)) {
+#ifdef 	CONFIG_PHDYM_FW_FIXRATE
+		struct dm_struct *dm = adapter_to_phydm(adapter);
+		u8 en = 1, macid = 255;
+		_irqL	irqL;
+		_list	*plist, *phead;
+		struct sta_info *psta = NULL;
+		struct sta_priv	*pstapriv = &(adapter->stapriv);
+		u8 bc_addr[ETH_ALEN] = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff};
+		u8 null_addr[ETH_ALEN] = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00};
+		uint mac_id[NUM_STA];
+		int i, macid_rec_idx = 0;
+		int num = sscanf(tmp, "%hhx %hhu %hhu", &fix_rate, &bw, &macid);
 
+		if (num < 1) {
+			RTW_INFO("Invalid input!! \"ex: echo <rate> <bw> <macid> > /proc/.../rate_ctl\"\n");
+			return count;
+		}
+
+		if ((fix_rate == 0) || (fix_rate == 0xFF))
+			en = 0;
+			
+		if (macid != 255) {
+			RTW_INFO("Call phydm_fw_fix_rate()--en[%d] mac_id[%d] bw[%d] fix_rate[%d]\n", en, macid, bw, fix_rate);
+			phydm_fw_fix_rate(dm, en, macid, bw, fix_rate);
+			return count;
+		}
+
+		/*	no specific macid, apply to all macids except bc/mc macid */
+		_enter_critical_bh(&pstapriv->sta_hash_lock, &irqL);
+		for (i = 0; i < NUM_STA; i++) {
+			phead = &(pstapriv->sta_hash[i]);
+			plist = get_next(phead);
+			while ((rtw_end_of_queue_search(phead, plist)) == _FALSE) {
+				psta = LIST_CONTAINOR(plist, struct sta_info, hash_list);
+				plist = get_next(plist);
+				if ((_rtw_memcmp(psta->cmn.mac_addr, bc_addr, ETH_ALEN) !=  _TRUE)
+					&& (_rtw_memcmp(psta->cmn.mac_addr, null_addr, ETH_ALEN) != _TRUE)
+					&& (_rtw_memcmp(psta->cmn.mac_addr, adapter_mac_addr(adapter), ETH_ALEN) != _TRUE)) {
+						mac_id[macid_rec_idx] = psta->cmn.mac_id;
+						macid_rec_idx++;
+				}
+			}
+		}
+		_exit_critical_bh(&pstapriv->sta_hash_lock, &irqL);
+
+		for (i = 0; i < macid_rec_idx; i++) {
+			RTW_INFO("Call phydm_fw_fix_rate()--en[%d] mac_id[%d] bw[%d] fix_rate[%d]\n", en, mac_id[i], bw, fix_rate);
+			phydm_fw_fix_rate(dm, en, mac_id[i], bw, fix_rate);
+		}
+#else
 		int num = sscanf(tmp, "%hhx %hhu", &fix_rate, &data_fb);
 
 		if (num >= 1) {
@@ -1708,6 +1849,7 @@ ssize_t proc_set_rate_ctl(struct file *file, const char __user *buffer, size_t c
 		}
 		if (num >= 2)
 			adapter->data_fb = data_fb ? 1 : 0;
+#endif
 	}
 
 	return count;
@@ -1718,8 +1860,6 @@ int proc_get_bmc_tx_rate(struct seq_file *m, void *v)
 {
 	struct net_device *dev = m->private;
 	_adapter *adapter = (_adapter *)rtw_netdev_priv(dev);
-	struct mlme_priv *pmlmepriv = &(adapter->mlmepriv);
-	struct sta_info *psta = NULL;
 
 	if (!MLME_IS_AP(adapter) && !MLME_IS_MESH(adapter)) {
 		RTW_PRINT_SEL(m, "[ERROR] Not in SoftAP/Mesh mode !!\n");
@@ -1734,7 +1874,6 @@ ssize_t proc_set_bmc_tx_rate(struct file *file, const char __user *buffer, size_
 {
 	struct net_device *dev = data;
 	_adapter *adapter = (_adapter *)rtw_netdev_priv(dev);
-	HAL_DATA_TYPE *hal_data = GET_HAL_DATA(adapter);
 	char tmp[32];
 	u8 bmc_tx_rate;
 
@@ -1763,7 +1902,6 @@ ssize_t proc_set_bmc_tx_rate(struct file *file, const char __user *buffer, size_
 int proc_get_tx_power_offset(struct seq_file *m, void *v)
 {
 	struct net_device *dev = m->private;
-	int i;
 	_adapter *adapter = (_adapter *)rtw_netdev_priv(dev);
 
 	RTW_PRINT_SEL(m, "Tx power offset - %u\n", adapter->power_offset);
@@ -1880,9 +2018,10 @@ ssize_t proc_set_rx_cnt_dump(struct file *file, const char __user *buffer, size_
 
 		int num = sscanf(tmp, "%hhx", &dump_rx_cnt_mode);
 
-		rtw_dump_phy_rxcnts_preprocess(adapter, dump_rx_cnt_mode);
-		adapter->dump_rx_cnt_mode = dump_rx_cnt_mode;
-
+		if (num == 1) {
+			rtw_dump_phy_rxcnts_preprocess(adapter, dump_rx_cnt_mode);
+			adapter->dump_rx_cnt_mode = dump_rx_cnt_mode;
+		}
 	}
 
 	return count;
@@ -1914,10 +2053,7 @@ bool rtw_fwdl_test_trigger_wintint_rdy_fail(void)
 
 ssize_t proc_set_fwdl_test_case(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data)
 {
-	struct net_device *dev = data;
-	_adapter *padapter = (_adapter *)rtw_netdev_priv(dev);
 	char tmp[32];
-	int num;
 
 	if (count < 1)
 		return -EFAULT;
@@ -1928,7 +2064,7 @@ ssize_t proc_set_fwdl_test_case(struct file *file, const char __user *buffer, si
 	}
 
 	if (buffer && !copy_from_user(tmp, buffer, count))
-		num = sscanf(tmp, "%hhu %hhu", &fwdl_test_chksum_fail, &fwdl_test_wintint_rdy_fail);
+		sscanf(tmp, "%hhu %hhu", &fwdl_test_chksum_fail, &fwdl_test_wintint_rdy_fail);
 
 	return count;
 }
@@ -1947,10 +2083,7 @@ bool rtw_del_rx_ampdu_test_trigger_no_tx_fail(void)
 
 ssize_t proc_set_del_rx_ampdu_test_case(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data)
 {
-	struct net_device *dev = data;
-	_adapter *padapter = (_adapter *)rtw_netdev_priv(dev);
 	char tmp[32];
-	int num;
 
 	if (count < 1)
 		return -EFAULT;
@@ -1961,56 +2094,10 @@ ssize_t proc_set_del_rx_ampdu_test_case(struct file *file, const char __user *bu
 	}
 
 	if (buffer && !copy_from_user(tmp, buffer, count))
-		num = sscanf(tmp, "%hhu", &del_rx_ampdu_test_no_tx_fail);
-
-	return count;
-}
-
-#ifdef CONFIG_DFS_MASTER
-int proc_get_dfs_master_test_case(struct seq_file *m, void *v)
-{
-	struct net_device *dev = m->private;
-	_adapter *adapter = (_adapter *)rtw_netdev_priv(dev);
-	struct rf_ctl_t *rfctl = adapter_to_rfctl(adapter);
-
-	RTW_PRINT_SEL(m, "%-24s %-19s\n", "radar_detect_trigger_non", "choose_dfs_ch_first");
-	RTW_PRINT_SEL(m, "%24hhu %19hhu\n"
-		, rfctl->dbg_dfs_master_radar_detect_trigger_non
-		, rfctl->dbg_dfs_master_choose_dfs_ch_first
-	);
-
-	return 0;
-}
-
-ssize_t proc_set_dfs_master_test_case(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data)
-{
-	struct net_device *dev = data;
-	_adapter *adapter = (_adapter *)rtw_netdev_priv(dev);
-	struct rf_ctl_t *rfctl = adapter_to_rfctl(adapter);
-	char tmp[32];
-	u8 radar_detect_trigger_non;
-	u8 choose_dfs_ch_first;
-
-	if (count < 1)
-		return -EFAULT;
-
-	if (count > sizeof(tmp)) {
-		rtw_warn_on(1);
-		return -EFAULT;
-	}
-
-	if (buffer && !copy_from_user(tmp, buffer, count)) {
-		int num = sscanf(tmp, "%hhu %hhu", &radar_detect_trigger_non, &choose_dfs_ch_first);
-
-		if (num >= 1)
-			rfctl->dbg_dfs_master_radar_detect_trigger_non = radar_detect_trigger_non;
-		if (num >= 2)
-			rfctl->dbg_dfs_master_choose_dfs_ch_first = choose_dfs_ch_first;
-	}
+		sscanf(tmp, "%hhu", &del_rx_ampdu_test_no_tx_fail);
 
 	return count;
 }
-#endif /* CONFIG_DFS_MASTER */
 
 static u32 g_wait_hiq_empty_ms = 0;
 
@@ -2021,10 +2108,7 @@ u32 rtw_get_wait_hiq_empty_ms(void)
 
 ssize_t proc_set_wait_hiq_empty(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data)
 {
-	struct net_device *dev = data;
-	_adapter *padapter = (_adapter *)rtw_netdev_priv(dev);
 	char tmp[32];
-	int num;
 
 	if (count < 1)
 		return -EFAULT;
@@ -2035,7 +2119,7 @@ ssize_t proc_set_wait_hiq_empty(struct file *file, const char __user *buffer, si
 	}
 
 	if (buffer && !copy_from_user(tmp, buffer, count))
-		num = sscanf(tmp, "%u", &g_wait_hiq_empty_ms);
+		sscanf(tmp, "%u", &g_wait_hiq_empty_ms);
 
 	return count;
 }
@@ -2061,8 +2145,6 @@ bool rtw_sta_linking_test_force_fail(void)
 
 ssize_t proc_set_sta_linking_test(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data)
 {
-	struct net_device *dev = data;
-	_adapter *padapter = (_adapter *)rtw_netdev_priv(dev);
 	char tmp[32];
 
 	if (count < 1)
@@ -2087,6 +2169,47 @@ ssize_t proc_set_sta_linking_test(struct file *file, const char __user *buffer,
 	return count;
 }
 
+#ifdef CONFIG_AP_MODE
+static u16 ap_linking_test_force_auth_fail = 0;
+static u16 ap_linking_test_force_asoc_fail = 0;
+
+u16 rtw_ap_linking_test_force_auth_fail(void)
+{
+	return ap_linking_test_force_auth_fail;
+}
+
+u16 rtw_ap_linking_test_force_asoc_fail(void)
+{
+	return ap_linking_test_force_asoc_fail;
+}
+
+ssize_t proc_set_ap_linking_test(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data)
+{
+	char tmp[32];
+
+	if (count < 1)
+		return -EFAULT;
+
+	if (count > sizeof(tmp)) {
+		rtw_warn_on(1);
+		return -EFAULT;
+	}
+
+	if (buffer && !copy_from_user(tmp, buffer, count)) {
+		u16 force_auth_fail = 0;
+		u16 force_asoc_fail = 0;
+		int num = sscanf(tmp, "%hu %hu", &force_auth_fail, &force_asoc_fail);
+
+		if (num >= 1)
+			ap_linking_test_force_auth_fail = force_auth_fail;
+		if (num >= 2)
+			ap_linking_test_force_asoc_fail = force_asoc_fail;
+	}
+
+	return count;
+}
+#endif /* CONFIG_AP_MODE */
+
 int proc_get_ps_dbg_info(struct seq_file *m, void *v)
 {
 	struct net_device *dev = m->private;
@@ -2147,7 +2270,7 @@ ssize_t proc_set_ps_dbg_info(struct file *file, const char __user *buffer, size_
 
 		int num = sscanf(tmp, "%hhx", &ps_dbg_cmd_id);
 
-		if (ps_dbg_cmd_id == 1) /*Clean all*/
+		if (num == 1 && ps_dbg_cmd_id == 1) /*Clean all*/
 			_rtw_memset(pdbgpriv, 0, sizeof(struct debug_priv));
 
 	}
@@ -2463,7 +2586,7 @@ ssize_t proc_set_hw_status(struct file *file, const char __user *buffer, size_t
 
 		int num = sscanf(tmp, "%d ", &enable);
 
-		if (regsty && enable <= 1) {
+		if (num == 1 && regsty && enable <= 1) {
 			regsty->check_hw_status = enable;
 			RTW_INFO("check_hw_status=%d\n", regsty->check_hw_status);
 		}
@@ -2472,14 +2595,68 @@ ssize_t proc_set_hw_status(struct file *file, const char __user *buffer, size_t
 	return count;
 }
 
-int proc_get_trx_info_debug(struct seq_file *m, void *v)
+#ifdef CONFIG_HUAWEI_PROC
+int proc_get_huawei_trx_info(struct seq_file *sel, void *v)
 {
-	struct net_device *dev = m->private;
+	struct net_device *dev = sel->private;
 	_adapter *padapter = (_adapter *)rtw_netdev_priv(dev);
-	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(padapter);
+	struct dm_struct *dm = adapter_to_phydm(padapter);
+	struct sta_info *psta;
+	struct dvobj_priv *dvobj = adapter_to_dvobj(padapter);
+	struct macid_ctl_t *macid_ctl = dvobj_to_macidctl(dvobj);
+	struct ra_sta_info *ra_info;
+	u8 curr_tx_sgi = _FALSE;
+	u8 curr_tx_rate = 0;
+	u8 mac_id;
+#ifdef DBG_RX_SIGNAL_DISPLAY_RAW_DATA
+	u8 isCCKrate, rf_path;
+	PHAL_DATA_TYPE	pHalData =  GET_HAL_DATA(padapter);
+	struct rx_raw_rssi *psample_pkt_rssi = &padapter->recvpriv.raw_rssi_info;
+#endif
 
-	int i;
+	if (!dm->is_linked) {
+		RTW_PRINT_SEL(sel, "NO link\n\n");
+		return 0;
+	}
 
+	/*============  tx info ============	*/
+	for (mac_id = 0; mac_id < macid_ctl->num; mac_id++) {
+		if (rtw_macid_is_used(macid_ctl, mac_id) && !rtw_macid_is_bmc(macid_ctl, mac_id)) {
+			psta = macid_ctl->sta[mac_id];
+			if (!psta)
+				continue;
+
+			RTW_PRINT_SEL(sel, "STA [" MAC_FMT "]\n", MAC_ARG(psta->cmn.mac_addr));
+
+			ra_info = &psta->cmn.ra_info;
+			curr_tx_sgi = rtw_get_current_tx_sgi(padapter, psta);
+			curr_tx_rate = rtw_get_current_tx_rate(padapter, psta);
+			RTW_PRINT_SEL(sel, "curr_tx_rate : %s (%s)\n",
+					HDATA_RATE(curr_tx_rate), (curr_tx_sgi) ? "S" : "L");
+			RTW_PRINT_SEL(sel, "curr_tx_bw : %s\n", ch_width_str(ra_info->curr_tx_bw));
+		}
+	}
+
+	/*============  rx info ============	*/
+	RTW_PRINT_SEL(sel, "rx_rate : %s\n", HDATA_RATE(dm->rx_rate));
+#ifdef DBG_RX_SIGNAL_DISPLAY_RAW_DATA
+	isCCKrate = (psample_pkt_rssi->data_rate <= DESC_RATE11M) ? TRUE : FALSE;
+
+	for (rf_path = 0; rf_path < pHalData->NumTotalRFPath; rf_path++) {
+		if (!isCCKrate)
+			_RTW_PRINT_SEL(sel , "RF_PATH_%d : rx_ofdm_pwr:%d(dBm), rx_ofdm_snr:%d(dB)\n",
+				rf_path, psample_pkt_rssi->ofdm_pwr[rf_path], psample_pkt_rssi->ofdm_snr[rf_path]);
+	}
+#endif
+	RTW_PRINT_SEL(sel, "\n");
+	return 0;
+}
+#endif /* CONFIG_HUAWEI_PROC */
+
+int proc_get_trx_info_debug(struct seq_file *m, void *v)
+{
+	struct net_device *dev = m->private;
+	_adapter *padapter = (_adapter *)rtw_netdev_priv(dev);
 
 	/*============  tx info ============	*/
 	rtw_hal_get_def_var(padapter, HW_DEF_RA_INFO_DUMP, m);
@@ -2487,7 +2664,6 @@ int proc_get_trx_info_debug(struct seq_file *m, void *v)
 	/*============  rx info ============	*/
 	rtw_hal_set_odm_var(padapter, HAL_ODM_RX_INFO_DUMP, m, _FALSE);
 
-
 	return 0;
 }
 
@@ -2495,14 +2671,11 @@ int proc_get_rx_signal(struct seq_file *m, void *v)
 {
 	struct net_device *dev = m->private;
 	_adapter *padapter = (_adapter *)rtw_netdev_priv(dev);
-	struct mlme_priv *pmlmepriv = &(padapter->mlmepriv);
 
 	RTW_PRINT_SEL(m, "rssi:%d\n", padapter->recvpriv.rssi);
-	/* RTW_PRINT_SEL(m, "rxpwdb:%d\n", padapter->recvpriv.rxpwdb); */
-	RTW_PRINT_SEL(m, "signal_strength:%u\n", padapter->recvpriv.signal_strength);
-	RTW_PRINT_SEL(m, "signal_qual:%u\n", padapter->recvpriv.signal_qual);
 #ifdef CONFIG_MP_INCLUDED
 	if (padapter->registrypriv.mp_mode == 1) {
+		struct dm_struct *odm = adapter_to_phydm(padapter);
 		if (padapter->mppriv.antenna_rx == ANTENNA_A)
 			RTW_PRINT_SEL(m, "Antenna: A\n");
 		else if (padapter->mppriv.antenna_rx == ANTENNA_B)
@@ -2519,9 +2692,16 @@ int proc_get_rx_signal(struct seq_file *m, void *v)
 			RTW_PRINT_SEL(m, "Antenna: CD\n");
 		else
 			RTW_PRINT_SEL(m, "Antenna: __\n");
+
+		RTW_PRINT_SEL(m, "rx_rate = %s\n", HDATA_RATE(odm->rx_rate));
 		return 0;
-	}
+	} else 
 #endif
+	{
+		/* RTW_PRINT_SEL(m, "rxpwdb:%d\n", padapter->recvpriv.rxpwdb); */
+		RTW_PRINT_SEL(m, "signal_strength:%u\n", padapter->recvpriv.signal_strength);
+		RTW_PRINT_SEL(m, "signal_qual:%u\n", padapter->recvpriv.signal_qual);
+	}
 #ifdef DBG_RX_SIGNAL_DISPLAY_RAW_DATA
 	rtw_odm_get_perpkt_rssi(m, padapter);
 	rtw_get_raw_rssi_info(m, padapter);
@@ -2548,9 +2728,12 @@ ssize_t proc_set_rx_signal(struct file *file, const char __user *buffer, size_t
 
 		int num = sscanf(tmp, "%u %u", &is_signal_dbg, &signal_strength);
 
+		if (num < 1)
+			return count;
+
 		is_signal_dbg = is_signal_dbg == 0 ? 0 : 1;
 
-		if (is_signal_dbg && num != 2)
+		if (is_signal_dbg && num < 2)
 			return count;
 
 		signal_strength = signal_strength > 100 ? 100 : signal_strength;
@@ -2568,6 +2751,36 @@ ssize_t proc_set_rx_signal(struct file *file, const char __user *buffer, size_t
 	return count;
 
 }
+
+int proc_get_mac_rptbuf(struct seq_file *m, void *v)
+{
+	struct net_device *dev = m->private;
+	_adapter *padapter = (_adapter *)rtw_netdev_priv(dev);
+	u16 i;
+	u16 mac_id;
+	u32 shcut_addr = 0;
+	u32 read_addr = 0;
+#ifdef CONFIG_RTL8814A
+	RTW_PRINT_SEL(m, "TX ShortCut:\n");
+	for (mac_id = 0; mac_id < 64; mac_id++) {
+		rtw_write16(padapter, 0x140, 0x662 | ((mac_id & BIT5) >> 5));
+		shcut_addr = 0x8000;
+		shcut_addr = shcut_addr | ((mac_id & 0x1f) << 7);
+		RTW_PRINT_SEL(m, "mac_id=%d, 0x140=%x =>\n", mac_id, 0x662 | ((mac_id & BIT5) >> 5));
+		for (i = 0; i < 30; i++) {
+			read_addr = 0;
+			read_addr = shcut_addr | (i << 2);
+			RTW_PRINT_SEL(m, "i=%02d: MAC_%04x= %08x ", i, read_addr, rtw_read32(padapter, read_addr));
+			if (!((i + 1) % 4))
+				RTW_PRINT_SEL(m, "\n");
+			if (i == 29)
+				RTW_PRINT_SEL(m, "\n");
+		}
+	}
+#endif /* CONFIG_RTL8814A */
+	return 0;
+}
+
 #ifdef CONFIG_80211N_HT
 
 int proc_get_ht_enable(struct seq_file *m, void *v)
@@ -2602,7 +2815,7 @@ ssize_t proc_set_ht_enable(struct file *file, const char __user *buffer, size_t
 
 		int num = sscanf(tmp, "%d ", &mode);
 
-		if (pregpriv && mode < 2) {
+		if ( num == 1 && pregpriv && mode < 2) {
 			pregpriv->ht_enable = mode;
 			RTW_INFO("ht_enable=%d\n", pregpriv->ht_enable);
 		}
@@ -2648,11 +2861,9 @@ ssize_t proc_set_bw_mode(struct file *file, const char __user *buffer, size_t co
 		bw_5g = mode >> 4;
 		bw_2g = mode & 0x0f;
 
-		if (pregpriv && bw_2g <= 4 && bw_5g <= 4) {
-
+		if (num == 1 && pregpriv && bw_2g <= 4 && bw_5g <= 4) {
 			pregpriv->bw_mode = mode;
 			printk("bw_mode=0x%x\n", mode);
-
 		}
 	}
 
@@ -2692,7 +2903,7 @@ ssize_t proc_set_ampdu_enable(struct file *file, const char __user *buffer, size
 
 		int num = sscanf(tmp, "%d ", &mode);
 
-		if (pregpriv && mode < 2) {
+		if (num == 1 && pregpriv && mode < 2) {
 			pregpriv->ampdu_enable = mode;
 			printk("ampdu_enable=%d\n", mode);
 		}
@@ -2703,34 +2914,6 @@ ssize_t proc_set_ampdu_enable(struct file *file, const char __user *buffer, size
 
 }
 
-int proc_get_mac_rptbuf(struct seq_file *m, void *v)
-{
-	struct net_device *dev = m->private;
-	_adapter *padapter = (_adapter *)rtw_netdev_priv(dev);
-	u16 i;
-	u16 mac_id;
-	u32 shcut_addr = 0;
-	u32 read_addr = 0;
-#ifdef CONFIG_RTL8814A
-	RTW_PRINT_SEL(m, "TX ShortCut:\n");
-	for (mac_id = 0; mac_id < 64; mac_id++) {
-		rtw_write16(padapter, 0x140, 0x662 | ((mac_id & BIT5) >> 5));
-		shcut_addr = 0x8000;
-		shcut_addr = shcut_addr | ((mac_id & 0x1f) << 7);
-		RTW_PRINT_SEL(m, "mac_id=%d, 0x140=%x =>\n", mac_id, 0x662 | ((mac_id & BIT5) >> 5));
-		for (i = 0; i < 30; i++) {
-			read_addr = 0;
-			read_addr = shcut_addr | (i << 2);
-			RTW_PRINT_SEL(m, "i=%02d: MAC_%04x= %08x ", i, read_addr, rtw_read32(padapter, read_addr));
-			if (!((i + 1) % 4))
-				RTW_PRINT_SEL(m, "\n");
-			if (i == 29)
-				RTW_PRINT_SEL(m, "\n");
-		}
-	}
-#endif /* CONFIG_RTL8814A */
-	return 0;
-}
 
 void dump_regsty_rx_ampdu_size_limit(void *sel, _adapter *adapter)
 {
@@ -2779,9 +2962,6 @@ ssize_t proc_set_rx_ampdu(struct file *file, const char __user *buffer, size_t c
 {
 	struct net_device *dev = data;
 	_adapter *padapter = (_adapter *)rtw_netdev_priv(dev);
-	struct registry_priv	*pregpriv = &padapter->registrypriv;
-	struct mlme_ext_priv	*pmlmeext = &padapter->mlmeextpriv;
-	struct mlme_ext_info	*pmlmeinfo = &(pmlmeext->mlmext_info);
 	char tmp[32];
 	u8 accept;
 	u8 size;
@@ -2806,9 +2986,9 @@ ssize_t proc_set_rx_ampdu(struct file *file, const char __user *buffer, size_t c
 		rtw_rx_ampdu_apply(padapter);
 	}
 
-exit:
 	return count;
 }
+
 int proc_get_rx_ampdu_factor(struct seq_file *m, void *v)
 {
 	struct net_device *dev = m->private;
@@ -3089,8 +3269,6 @@ int proc_get_en_fwps(struct seq_file *m, void *v)
 	struct net_device *dev = m->private;
 	_adapter *padapter = (_adapter *)rtw_netdev_priv(dev);
 	struct registry_priv	*pregpriv = &padapter->registrypriv;
-	struct mlme_ext_priv	*pmlmeext = &padapter->mlmeextpriv;
-	struct mlme_ext_info	*pmlmeinfo = &(pmlmeext->mlmext_info);
 
 	if (pregpriv)
 		RTW_PRINT_SEL(m, "check_fw_ps = %d , 1:enable get FW PS state , 0: disable get FW PS state\n"
@@ -3104,8 +3282,6 @@ ssize_t proc_set_en_fwps(struct file *file, const char __user *buffer, size_t co
 	struct net_device *dev = data;
 	_adapter *padapter = (_adapter *)rtw_netdev_priv(dev);
 	struct registry_priv	*pregpriv = &padapter->registrypriv;
-	struct mlme_ext_priv	*pmlmeext = &padapter->mlmeextpriv;
-	struct mlme_ext_info	*pmlmeinfo = &(pmlmeext->mlmext_info);
 	char tmp[32];
 	u32 mode;
 
@@ -3121,7 +3297,7 @@ ssize_t proc_set_en_fwps(struct file *file, const char __user *buffer, size_t co
 
 		int num = sscanf(tmp, "%d ", &mode);
 
-		if (pregpriv &&  mode < 2) {
+		if (num == 1 && pregpriv &&  mode < 2) {
 			pregpriv->check_fw_ps = mode;
 			RTW_INFO("pregpriv->check_fw_ps=%d\n", pregpriv->check_fw_ps);
 		}
@@ -3186,7 +3362,9 @@ void rtw_get_dft_phy_cap(void *sel, _adapter *adapter)
 	#ifdef CONFIG_80211AC_VHT
 	rtw_vht_use_default_setting(adapter);
 	#endif
+	#ifdef CONFIG_80211N_HT
 	rtw_dump_dft_phy_cap(sel, adapter);
+	#endif
 }
 
 void rtw_dump_drv_phy_cap(void *sel, _adapter *adapter)
@@ -3201,7 +3379,7 @@ void rtw_dump_drv_phy_cap(void *sel, _adapter *adapter)
 	RTW_PRINT_SEL(sel, "[DRV CAP] Tx Path Num Index : %d\n", (phy_spec->trx_cap >> 8) & 0xFF);/*Tx Path Num Index	[15:8]*/
 	RTW_PRINT_SEL(sel, "[DRV CAP] Rx Path Num Index : %d\n", (phy_spec->trx_cap & 0xFF));/*Rx Path Num Index	[7:0]*/
 	#endif
-
+	#ifdef CONFIG_80211N_HT
 	RTW_PRINT_SEL(sel, "[DRV CAP] STBC Capability : 0x%02x\n", pregistry_priv->stbc_cap);
 	RTW_PRINT_SEL(sel, "[DRV CAP] VHT STBC Tx : %s\n", (TEST_FLAG(pregistry_priv->stbc_cap, BIT1)) ? "V" : "X"); /*BIT1: Enable VHT STBC Tx*/
 	RTW_PRINT_SEL(sel, "[DRV CAP] VHT STBC Rx : %s\n", (TEST_FLAG(pregistry_priv->stbc_cap, BIT0)) ? "V" : "X"); /*BIT0: Enable VHT STBC Rx*/
@@ -3213,6 +3391,7 @@ void rtw_dump_drv_phy_cap(void *sel, _adapter *adapter)
 	RTW_PRINT_SEL(sel, "[DRV CAP] VHT LDPC Rx : %s\n", (TEST_FLAG(pregistry_priv->ldpc_cap, BIT0)) ? "V" : "X"); /*BIT0: Enable VHT LDPC Rx*/
 	RTW_PRINT_SEL(sel, "[DRV CAP] HT LDPC Tx : %s\n", (TEST_FLAG(pregistry_priv->ldpc_cap, BIT5)) ? "V" : "X"); /*BIT5: Enable HT LDPC Tx*/
 	RTW_PRINT_SEL(sel, "[DRV CAP] HT LDPC Rx : %s\n\n", (TEST_FLAG(pregistry_priv->ldpc_cap, BIT4)) ? "V" : "X"); /*BIT4: Enable HT LDPC Rx*/
+	#endif /* CONFIG_80211N_HT */
 	#ifdef CONFIG_BEAMFORMING
 	#if 0
 	RTW_PRINT_SEL(sel, "[DRV CAP] TxBF parameter : 0x%08x\n", phy_spec->txbf_param);
@@ -3275,7 +3454,7 @@ ssize_t proc_set_stbc_cap(struct file *file, const char __user *buffer, size_t c
 
 		int num = sscanf(tmp, "%d ", &mode);
 
-		if (pregpriv) {
+		if (num == 1 && pregpriv) {
 			pregpriv->stbc_cap = mode;
 			RTW_INFO("stbc_cap = 0x%02x\n", mode);
 		}
@@ -3315,7 +3494,7 @@ ssize_t proc_set_rx_stbc(struct file *file, const char __user *buffer, size_t co
 
 		int num = sscanf(tmp, "%d ", &mode);
 
-		if (pregpriv && (mode == 0 || mode == 1 || mode == 2 || mode == 3)) {
+		if (num == 1 && pregpriv && (mode == 0 || mode == 1 || mode == 2 || mode == 3)) {
 			pregpriv->rx_stbc = mode;
 			printk("rx_stbc=%d\n", mode);
 		}
@@ -3356,7 +3535,7 @@ ssize_t proc_set_ldpc_cap(struct file *file, const char __user *buffer, size_t c
 
 		int num = sscanf(tmp, "%d ", &mode);
 
-		if (pregpriv) {
+		if (num == 1 && pregpriv) {
 			pregpriv->ldpc_cap = mode;
 			RTW_INFO("ldpc_cap = 0x%02x\n", mode);
 		}
@@ -3397,7 +3576,7 @@ ssize_t proc_set_txbf_cap(struct file *file, const char __user *buffer, size_t c
 
 		int num = sscanf(tmp, "%d ", &mode);
 
-		if (pregpriv) {
+		if (num == 1 && pregpriv) {
 			pregpriv->beamform_cap = mode;
 			RTW_INFO("beamform_cap = 0x%02x\n", mode);
 		}
@@ -3493,6 +3672,10 @@ int proc_get_all_sta_info(struct seq_file *m, void *v)
 				RTW_PRINT_SEL(m, "rtsen=%d, cts2slef=%d\n", psta->rtsen, psta->cts2self);
 				RTW_PRINT_SEL(m, "state=0x%x, aid=%d, macid=%d, raid=%d\n",
 					psta->state, psta->cmn.aid, psta->cmn.mac_id, psta->cmn.ra_info.rate_id);
+#ifdef CONFIG_RTS_FULL_BW
+				if(psta->vendor_8812)
+					RTW_PRINT_SEL(m,"Vendor Realtek 8812\n");
+#endif/*CONFIG_RTS_FULL_BW*/
 #ifdef CONFIG_80211N_HT
 				RTW_PRINT_SEL(m, "qos_en=%d, ht_en=%d, init_rate=%d\n", psta->qos_option, psta->htpriv.ht_option, psta->init_rate);
 				RTW_PRINT_SEL(m, "bwmode=%d, ch_offset=%d, sgi_20m=%d,sgi_40m=%d\n"
@@ -3501,6 +3684,11 @@ int proc_get_all_sta_info(struct seq_file *m, void *v)
 				RTW_PRINT_SEL(m, "tx_amsdu_enable = %d\n", psta->htpriv.tx_amsdu_enable);
 				RTW_PRINT_SEL(m, "agg_enable_bitmap=%x, candidate_tid_bitmap=%x\n", psta->htpriv.agg_enable_bitmap, psta->htpriv.candidate_tid_bitmap);
 #endif /* CONFIG_80211N_HT */
+#ifdef CONFIG_80211AC_VHT
+				RTW_PRINT_SEL(m, "vht_en=%d, vht_sgi_80m=%d\n", psta->vhtpriv.vht_option, psta->vhtpriv.sgi_80m);
+				RTW_PRINT_SEL(m, "vht_ldpc_cap=0x%x, vht_stbc_cap=0x%x, vht_beamform_cap=0x%x\n", psta->vhtpriv.ldpc_cap, psta->vhtpriv.stbc_cap, psta->vhtpriv.beamform_cap);
+				RTW_PRINT_SEL(m, "vht_mcs_map=0x%x, vht_highest_rate=0x%x, vht_ampdu_len=%d\n", *(u16 *)psta->vhtpriv.vht_mcs_map, psta->vhtpriv.vht_highest_rate, psta->vhtpriv.ampdu_len);
+#endif
 				RTW_PRINT_SEL(m, "sleepq_len=%d\n", psta->sleepq_len);
 				RTW_PRINT_SEL(m, "sta_xmitpriv.vo_q_qcnt=%d\n", psta->sta_xmitpriv.vo_q.qcnt);
 				RTW_PRINT_SEL(m, "sta_xmitpriv.vi_q_qcnt=%d\n", psta->sta_xmitpriv.vi_q.qcnt);
@@ -3527,11 +3715,17 @@ int proc_get_all_sta_info(struct seq_file *m, void *v)
 				RTW_PRINT_SEL(m, "rx_uc_bytes=%llu\n", sta_rx_uc_bytes(psta));
 				RTW_PRINT_SEL(m, "rx_mc_bytes=%llu\n", psta->sta_stats.rx_mc_bytes);
 				RTW_PRINT_SEL(m, "rx_bc_bytes=%llu\n", psta->sta_stats.rx_bc_bytes);
-				RTW_PRINT_SEL(m, "rx_avg_tp =%d (Bps)\n", psta->cmn.rx_moving_average_tp);
+				if (psta->sta_stats.rx_tp_kbits >> 10)
+					RTW_PRINT_SEL(m, "rx_tp =%d (Mbps)\n", psta->sta_stats.rx_tp_kbits >> 10);
+				else
+					RTW_PRINT_SEL(m, "rx_tp =%d (Kbps)\n", psta->sta_stats.rx_tp_kbits);
 
 				RTW_PRINT_SEL(m, "tx_data_pkts=%llu\n", psta->sta_stats.tx_pkts);
 				RTW_PRINT_SEL(m, "tx_bytes=%llu\n", psta->sta_stats.tx_bytes);
-				RTW_PRINT_SEL(m, "tx_avg_tp =%d (MBps)\n", psta->cmn.tx_moving_average_tp);
+				if (psta->sta_stats.tx_tp_kbits >> 10)
+					RTW_PRINT_SEL(m, "tx_tp =%d (Mbps)\n", psta->sta_stats.tx_tp_kbits >> 10);
+				else
+					RTW_PRINT_SEL(m, "tx_tp =%d (Kbps)\n", psta->sta_stats.tx_tp_kbits);
 #ifdef CONFIG_RTW_80211K
 				RTW_PRINT_SEL(m, "rm_en_cap="RM_CAP_FMT"\n", RM_CAP_ARG(psta->rm_en_cap));
 #endif
@@ -3596,7 +3790,6 @@ int proc_get_best_channel(struct seq_file *m, void *v)
 	struct net_device *dev = m->private;
 	_adapter *padapter = (_adapter *)rtw_netdev_priv(dev);
 	struct rf_ctl_t *rfctl = adapter_to_rfctl(padapter);
-	struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv;
 	u32 i, best_channel_24G = 1, best_channel_5G = 36, index_24G = 0, index_5G = 0;
 
 	for (i = 0; i < rfctl->max_chan_nums && rfctl->channel_set[i].ChannelNum != 0; i++) {
@@ -3652,7 +3845,6 @@ ssize_t proc_set_best_channel(struct file *file, const char __user *buffer, size
 	struct net_device *dev = data;
 	_adapter *padapter = (_adapter *)rtw_netdev_priv(dev);
 	struct rf_ctl_t *rfctl = adapter_to_rfctl(padapter);
-	struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv;
 	char tmp[32];
 
 	if (count < 1)
@@ -3829,14 +4021,11 @@ int proc_get_sreset(struct seq_file *m, void *v)
 	struct debug_priv *pdbgpriv = &psdpriv->drv_dbg;
 	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(padapter);
 	struct sreset_priv *psrtpriv = &pHalData->srestpriv;
-	struct mlme_priv *pmlmepriv = &(padapter->mlmepriv);
 
 	if (psrtpriv->dbg_sreset_ctrl == _TRUE) {
 		RTW_PRINT_SEL(m, "self_dect_tx_cnt:%llu\n", psrtpriv->self_dect_tx_cnt);
 		RTW_PRINT_SEL(m, "self_dect_rx_cnt:%llu\n", psrtpriv->self_dect_rx_cnt);
 		RTW_PRINT_SEL(m, "self_dect_fw_cnt:%llu\n", psrtpriv->self_dect_fw_cnt);
-		RTW_PRINT_SEL(m, "self_dect_scan_cnt:%llu\n", psrtpriv->self_dect_scan_cnt);
-		RTW_PRINT_SEL(m, "txbuf_empty_cnt:%llu\n", psrtpriv->txbuf_empty_cnt);
 		RTW_PRINT_SEL(m, "tx_dma_status_cnt:%llu\n", psrtpriv->tx_dma_status_cnt);
 		RTW_PRINT_SEL(m, "rx_dma_status_cnt:%llu\n", psrtpriv->rx_dma_status_cnt);
 		RTW_PRINT_SEL(m, "self_dect_case:%d\n", psrtpriv->self_dect_case);
@@ -3866,9 +4055,12 @@ ssize_t proc_set_sreset(struct file *file, const char __user *buffer, size_t cou
 
 		int num = sscanf(tmp, "%d", &trigger_point);
 
+		if (num < 1)
+			return count;
+
 		if (trigger_point == SRESET_TGP_NULL)
 			rtw_hal_sreset_reset(padapter);
-		else if (trigger_point == 99)
+		else if (trigger_point == SRESET_TGP_INFO)
 			psrtpriv->dbg_sreset_ctrl = _TRUE;
 		else
 			sreset_set_trigger_point(padapter, trigger_point);
@@ -3881,6 +4073,160 @@ ssize_t proc_set_sreset(struct file *file, const char __user *buffer, size_t cou
 
 #ifdef CONFIG_PCI_HCI
 
+ssize_t proc_set_pci_bridge_conf_space(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data)
+{
+	struct net_device *dev = data;
+	_adapter *padapter = (_adapter *)rtw_netdev_priv(dev);
+	struct dvobj_priv       *pdvobjpriv = adapter_to_dvobj(padapter);
+	struct pci_dev  *pdev = pdvobjpriv->ppcidev;
+	struct pci_dev  *bridge_pdev = pdev->bus->self;
+
+	char tmp[32] = { 0 };
+	int num;
+
+	u32 reg = 0, value = 0;
+
+	if (count < 1)
+		return -EFAULT;
+
+	if (count > sizeof(tmp)) {
+		rtw_warn_on(1);
+		return -EFAULT;
+	}
+
+	if (buffer && !copy_from_user(tmp, buffer, count)) {
+
+		num = sscanf(tmp, "%x %x", &reg, &value);
+		if (num != 2) {
+			RTW_INFO("invalid parameter!\n");
+			return count;
+		}
+
+		if (reg >= 0x1000) {
+			RTW_INFO("invalid register!\n");
+			return count;
+		}
+
+		if (value > 0xFF) {
+			RTW_INFO("invalid value! Only one byte\n");
+			return count;
+		}
+
+		RTW_INFO(FUNC_ADPT_FMT ": register 0x%x value 0x%x\n",
+			FUNC_ADPT_ARG(padapter), reg, value);
+
+		pci_write_config_byte(bridge_pdev, reg, value);
+	}
+	return count;
+}
+
+
+int proc_get_pci_bridge_conf_space(struct seq_file *m, void *v)
+{
+	struct net_device *dev = m->private;
+	_adapter *padapter = (_adapter *) rtw_netdev_priv(dev);
+	struct dvobj_priv       *pdvobjpriv = adapter_to_dvobj(padapter);
+	struct pci_dev  *pdev = pdvobjpriv->ppcidev;
+	struct pci_dev  *bridge_pdev = pdev->bus->self;
+
+	u32 tmp[4] = { 0 };
+	u32 i, j;
+
+	RTW_PRINT_SEL(m, "\n*****  PCI Host Device Configuration Space*****\n\n");
+
+	for (i = 0; i < 0x1000; i += 0x10) {
+		for (j = 0 ; j < 4 ; j++)
+			pci_read_config_dword(bridge_pdev, i + j * 4, tmp+j);
+
+		RTW_PRINT_SEL(m, "%03x: %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x\n",
+			i, tmp[0] & 0xFF, (tmp[0] >> 8) & 0xFF, (tmp[0] >> 16) & 0xFF, (tmp[0] >> 24) & 0xFF,
+			tmp[1] & 0xFF, (tmp[1] >> 8) & 0xFF, (tmp[1] >> 16) & 0xFF, (tmp[1] >> 24) & 0xFF,
+			tmp[2] & 0xFF, (tmp[2] >> 8) & 0xFF, (tmp[2] >> 16) & 0xFF, (tmp[2] >> 24) & 0xFF,
+			tmp[3] & 0xFF, (tmp[3] >> 8) & 0xFF, (tmp[3] >> 16) & 0xFF, (tmp[3] >> 24) & 0xFF);
+	}
+	return 0;
+}
+
+
+ssize_t proc_set_pci_conf_space(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data)
+{
+	struct net_device *dev = data;
+	_adapter *padapter = (_adapter *)rtw_netdev_priv(dev);
+	struct dvobj_priv       *pdvobjpriv = adapter_to_dvobj(padapter);
+	struct pci_dev  *pdev = pdvobjpriv->ppcidev;
+
+	char tmp[32] = { 0 };
+	int num;
+
+	u32 reg = 0, value = 0;
+
+	if (count < 1)
+		return -EFAULT;
+
+	if (count > sizeof(tmp)) {
+		rtw_warn_on(1);
+		return -EFAULT;
+	}
+
+	if (buffer && !copy_from_user(tmp, buffer, count)) {
+
+		num = sscanf(tmp, "%x %x", &reg, &value);
+
+		if (num != 2) {
+			RTW_INFO("invalid parameter!\n");
+			return count;
+		}
+
+
+		if (reg >= 0x1000) {
+			RTW_INFO("invalid register!\n");
+			return count;
+		}
+
+		if (value > 0xFF) {
+			RTW_INFO("invalid value! Only one byte\n");
+			return count;
+		}
+
+		RTW_INFO(FUNC_ADPT_FMT ": register 0x%x value 0x%x\n",
+			FUNC_ADPT_ARG(padapter), reg, value);
+
+		pci_write_config_byte(pdev, reg, value);
+
+
+	}
+	return count;
+}
+
+
+int proc_get_pci_conf_space(struct seq_file *m, void *v)
+{
+	struct net_device *dev = m->private;
+	_adapter *padapter = (_adapter *) rtw_netdev_priv(dev);
+	struct dvobj_priv       *pdvobjpriv = adapter_to_dvobj(padapter);
+	struct pci_dev  *pdev = pdvobjpriv->ppcidev;
+	struct pci_dev  *bridge_pdev = pdev->bus->self;
+
+	u32 tmp[4] = { 0 };
+	u32 i, j;
+
+	RTW_PRINT_SEL(m, "\n*****  PCI Device Configuration Space *****\n\n");
+
+	for (i = 0; i < 0x1000; i += 0x10) {
+		for (j = 0 ; j < 4 ; j++)
+			pci_read_config_dword(pdev, i + j * 4, tmp+j);
+
+		RTW_PRINT_SEL(m, "%03x: %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x\n",
+			i, tmp[0] & 0xFF, (tmp[0] >> 8) & 0xFF, (tmp[0] >> 16) & 0xFF, (tmp[0] >> 24) & 0xFF,
+			tmp[1] & 0xFF, (tmp[1] >> 8) & 0xFF, (tmp[1] >> 16) & 0xFF, (tmp[1] >> 24) & 0xFF,
+			tmp[2] & 0xFF, (tmp[2] >> 8) & 0xFF, (tmp[2] >> 16) & 0xFF, (tmp[2] >> 24) & 0xFF,
+			tmp[3] & 0xFF, (tmp[3] >> 8) & 0xFF, (tmp[3] >> 16) & 0xFF, (tmp[3] >> 24) & 0xFF);
+	}
+
+	return 0;
+}
+
+
 int proc_get_pci_aspm(struct seq_file *m, void *v)
 {
 	struct net_device *dev = m->private;
@@ -4316,7 +4662,7 @@ ssize_t proc_set_wakeup_event(struct file *file, const char __user *buffer,
 	else
 		return -EFAULT;
 
-	if (wakeup_event <= 0x07) {
+	if (num == 1 && wakeup_event <= 0x07) {
 		registry_par->wakeup_event = wakeup_event;
 
 		if (wakeup_event & BIT(1))
@@ -4385,6 +4731,11 @@ ssize_t proc_set_wowlan_gpio_info(struct file *file, const char __user *buffer,
 
 		num = sscanf(tmp, "%u", &is_high_active);
 
+		if (num != 1) {
+			RTW_INFO("Invalid format\n");
+			return count;
+		}
+
 		is_high_active = is_high_active == 0 ? 0 : 1;
 
 		pwrpriv->is_high_active = is_high_active;
@@ -4399,6 +4750,7 @@ ssize_t proc_set_wowlan_gpio_info(struct file *file, const char __user *buffer,
 			rtw_hal_set_output_gpio(padapter, WAKEUP_GPIO_IDX, 0);
 		#else
 		val8 = (pwrpriv->is_high_active == 0) ? 1 : 0;
+		rtw_hal_switch_gpio_wl_ctrl(padapter, WAKEUP_GPIO_IDX, _TRUE);
 		rtw_hal_set_output_gpio(padapter, WAKEUP_GPIO_IDX, val8);
 		#endif
 		rtw_ps_deny_cancel(padapter, PS_DENY_IOCTL);
@@ -4444,7 +4796,7 @@ int proc_get_p2p_wowlan_info(struct seq_file *m, void *v)
 	return 0;
 }
 #endif /* CONFIG_P2P_WOWLAN */
-
+#ifdef CONFIG_BCN_CNT_CONFIRM_HDL
 int proc_get_new_bcn_max(struct seq_file *m, void *v)
 {
 	extern int new_bcn_max;
@@ -4471,14 +4823,14 @@ ssize_t proc_set_new_bcn_max(struct file *file, const char __user *buffer, size_
 
 	return count;
 }
-
+#endif
 #ifdef CONFIG_POWER_SAVING
 int proc_get_ps_info(struct seq_file *m, void *v)
 {
 	struct net_device *dev = m->private;
 	_adapter *padapter = (_adapter *)rtw_netdev_priv(dev);
 	struct pwrctrl_priv *pwrpriv = adapter_to_pwrctl(padapter);
-	u8 ips_mode = pwrpriv->ips_mode;
+	u8 ips_mode = pwrpriv->ips_mode_req;
 	u8 lps_mode = pwrpriv->power_mgnt;
 	u8 lps_level = pwrpriv->lps_level;
 	char *str = "";
@@ -4535,7 +4887,60 @@ int proc_get_ps_info(struct seq_file *m, void *v)
 	return 0;
 }
 
-#ifdef CONFIG_WMMPS_STA	
+ssize_t proc_set_ps_info(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data)
+{
+	struct net_device *dev = data;
+	struct _ADAPTER *adapter = (_adapter *)rtw_netdev_priv(dev);
+	struct dvobj_priv *dvobj = adapter_to_dvobj(adapter);
+	char tmp[8];
+	int num = 0;
+	int mode = 0;
+	int en = 0;
+
+	if (count > sizeof(tmp)) {
+		rtw_warn_on(1);
+		return -EFAULT;
+	}
+
+	if (!buffer || copy_from_user(tmp, buffer, count))
+		goto exit;
+
+	num = sscanf(tmp, "%d %d", &mode, &en);
+	if (num >  2) {
+		RTW_ERR("%s: invalid parameter!\n", __FUNCTION__);
+		goto exit;
+	}
+
+	if (num == 1 && mode == 0) {
+		/* back to original LPS/IPS Mode */
+		RTW_INFO("%s: back to original LPS/IPS Mode\n", __FUNCTION__);
+
+		rtw_pm_set_lps(adapter, adapter->registrypriv.power_mgnt);
+		
+		rtw_pm_set_ips(adapter, adapter->registrypriv.ips_mode);
+
+		goto exit;
+	}
+	
+	if (mode == 1) { 
+		/* LPS */
+		RTW_INFO("%s: LPS: %s, en=%d\n", __FUNCTION__, (en == 0) ? "disable":"enable", en);	
+		if (rtw_pm_set_lps(adapter, en) != 0 )
+			RTW_ERR("%s: invalid parameter, mode=%d, level=%d\n", __FUNCTION__, mode, en);
+		
+	} else if (mode == 2) {
+		/* IPS */
+		RTW_INFO("%s: IPS: %s, en=%d\n", __FUNCTION__, (en == 0) ? "disable":"enable", en);	
+		if (rtw_pm_set_ips(adapter, en) != 0 )
+			RTW_ERR("%s: invalid parameter, mode=%d, level=%d\n", __FUNCTION__, mode, en);
+	} else
+		RTW_ERR("%s: invalid parameter, mode = %d!\n", __FUNCTION__, mode);
+
+exit:
+	return count;
+}
+
+#ifdef CONFIG_WMMPS_STA
 int proc_get_wmmps_info(struct seq_file *m, void *v)
 {
 	struct net_device *dev = m->private;
@@ -4595,18 +5000,18 @@ ssize_t proc_set_wmmps_info(struct file *file, const char __user *buffer, size_t
 	if (buffer && !copy_from_user(tmp, buffer, count)) {
 
 		int num = sscanf(tmp, "%hhu %hhx", &uapsd_max_sp_len_setting, &uapsd_ac_setting);
-		
+
 		if (pregpriv) {
-			if (num >= 1){	
+			if (num >= 1) {
 				pregpriv->uapsd_max_sp_len = uapsd_max_sp_len_setting;
 				RTW_INFO("uapsd_max_sp_len = %d\n", pregpriv->uapsd_max_sp_len);
 			}
 
-			if (num >= 2){
+			if (num >= 2) {
 				pregpriv->uapsd_ac_enable = uapsd_ac_setting;
 				RTW_INFO("uapsd_ac_enable = 0x%02x\n", pregpriv->uapsd_ac_enable);
 			}
-		}	
+		}
 	}
 
 	return count;
@@ -4647,7 +5052,7 @@ ssize_t proc_set_tdls_enable(struct file *file, const char __user *buffer, size_
 
 		int num = sscanf(tmp, "%d ", &en_tdls);
 
-		if (pregpriv) {
+		if (num == 1 && pregpriv) {
 			if (en_tdls > 0)
 				rtw_enable_tdls_func(padapter);
 			else
@@ -5070,7 +5475,6 @@ int proc_get_monitor(struct seq_file *m, void *v)
 	struct net_device *dev = m->private;
 	_adapter *padapter = (_adapter *)rtw_netdev_priv(dev);
 	struct mlme_priv *pmlmepriv = &(padapter->mlmepriv);
-	struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv;
 
 	if (WIFI_MONITOR_STATE == get_fwstate(pmlmepriv)) {
 		RTW_PRINT_SEL(m, "Monitor mode : Enable\n");
@@ -5392,6 +5796,7 @@ ssize_t proc_set_tx_deauth(struct file *file, const char __user *buffer, size_t
 		/* TX unicast deauth to AP */
 		issue_deauth_11w(padapter, get_my_bssid(&(pmlmeinfo->network)), 0, (u8)key_type);
 	} else if (check_fwstate(pmlmepriv, WIFI_AP_STATE) == _TRUE) {
+		u8 updated = _FALSE;
 
 		if (key_type == 3)
 			issue_deauth_11w(padapter, bc_addr, 0, IEEE80211W_RIGHT_KEY);
@@ -5420,24 +5825,22 @@ ssize_t proc_set_tx_deauth(struct file *file, const char __user *buffer, size_t
 
 					psta = rtw_get_stainfo(pstapriv, &mac_addr[index][0]);
 					if (psta && key_type != IEEE80211W_WRONG_KEY && key_type != IEEE80211W_NO_KEY) {
-						u8 updated = _FALSE;
-
 						_enter_critical_bh(&pstapriv->asoc_list_lock, &irqL);
 						if (rtw_is_list_empty(&psta->asoc_list) == _FALSE) {
 							rtw_list_delete(&psta->asoc_list);
 							pstapriv->asoc_list_cnt--;
-							updated = ap_free_sta(padapter, psta, _FALSE, WLAN_REASON_PREV_AUTH_NOT_VALID, _TRUE);
+							updated |= ap_free_sta(padapter, psta, _FALSE, WLAN_REASON_PREV_AUTH_NOT_VALID, _TRUE);
 
 						}
 						_exit_critical_bh(&pstapriv->asoc_list_lock, &irqL);
-
-						associated_clients_update(padapter, updated, STA_INFO_UPDATE_ALL);
 					}
 
 					RTW_INFO("STA[%u]:"MAC_FMT"\n", index , MAC_ARG(&mac_addr[index][0]));
 				}
 			}
 		}
+
+		associated_clients_update(padapter, updated, STA_INFO_UPDATE_ALL);
 	}
 
 	return count;
@@ -5512,6 +5915,48 @@ int proc_get_tx_auth(struct seq_file *m, void *v)
 }
 #endif /* CONFIG_IEEE80211W */
 
+#ifdef CONFIG_CUSTOMER01_SMART_ANTENNA
+static u32 phase_idx;
+int proc_get_pathb_phase(struct seq_file *m, void *v)
+{
+	struct net_device *dev = m->private;
+	_adapter *padapter = (_adapter *)rtw_netdev_priv(dev);
+
+	RTW_PRINT_SEL(m, "PathB phase index =%d\n", phase_idx);
+	return 0;
+}
+
+ssize_t proc_set_pathb_phase(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data)
+{
+	struct net_device *dev = data;
+	_adapter *padapter = (_adapter *)rtw_netdev_priv(dev);
+	char tmp[255];
+	int num;
+	u32 tmp_idx;
+
+	if (NULL == buffer) {
+		RTW_INFO(FUNC_ADPT_FMT ": input buffer is NULL!\n", FUNC_ADPT_ARG(padapter));
+		return -EFAULT;
+	}
+
+	if (count < 1) {
+		RTW_INFO(FUNC_ADPT_FMT ": input length is 0!\n", FUNC_ADPT_ARG(padapter));
+		return -EFAULT;
+	}
+
+	if (buffer && !copy_from_user(tmp, buffer, count)) {
+		num = sscanf(tmp, "%u", &tmp_idx);
+		if ((tmp_idx < 0) || (tmp_idx > 11)) {
+			RTW_INFO(FUNC_ADPT_FMT "Invalid input value\n", FUNC_ADPT_ARG(padapter));
+			return count;
+		}
+		phase_idx = tmp_idx;
+		rtw_hal_set_pathb_phase(padapter, phase_idx);
+	}
+	return count;
+}
+#endif
+
 #ifdef CONFIG_MCC_MODE
 int proc_get_mcc_info(struct seq_file *m, void *v)
 {
@@ -5930,7 +6375,10 @@ int proc_get_ack_timeout(struct seq_file *m, void *v)
 {
 	struct net_device *dev = m->private;
 	_adapter *padapter = (_adapter *)rtw_netdev_priv(dev);
-	u8 ack_timeout_val, ack_timeout_val_cck;
+	u8 ack_timeout_val;
+#ifdef CONFIG_RTL8821C
+	u8 ack_timeout_val_cck;
+#endif
 
 	ack_timeout_val = rtw_read8(padapter, REG_ACKTO);
 
@@ -6043,6 +6491,178 @@ int proc_get_fw_offload(struct seq_file *m, void *v)
 	RTW_PRINT_SEL(m, "Channel switch FW offload:%s\n", hal->ch_switch_offload?"enable":"disable");
 	return 0;
 }
+#ifdef CONFIG_FW_HANDLE_TXBCN
+extern void rtw_hal_set_fw_ap_bcn_offload_cmd(_adapter *adapter, bool fw_bcn_en, u8 tbtt_rpt_map);
+ssize_t proc_set_fw_tbtt_rpt(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data)
+{
+	struct net_device *dev = data;
+	_adapter *adapter = (_adapter *)rtw_netdev_priv(dev);
+	char tmp[32];
+	u32 fw_tbtt_rpt, fw_bcn_offload;
+
+
+	if (buffer == NULL) {
+		RTW_INFO("input buffer is NULL!\n");
+		return -EFAULT;
+	}
+
+	if (count < 1) {
+		RTW_INFO("input length is 0!\n");
+		return -EFAULT;
+	}
+
+	if (count > sizeof(tmp)) {
+		RTW_INFO("input length is too large\n");
+		rtw_warn_on(1);
+		return -EFAULT;
+	}
+
+	if (buffer && !copy_from_user(tmp, buffer, count)) {
+		int num = sscanf(tmp, "%d %x",&fw_bcn_offload, &fw_tbtt_rpt);
+
+		if (num < 2) {
+			RTW_INFO("input parameters < 2\n");
+			return -EINVAL;
+		}
+		rtw_hal_set_fw_ap_bcn_offload_cmd(adapter, fw_bcn_offload, fw_tbtt_rpt);
+	}
+
+	return count;
+}
+
+int proc_get_fw_tbtt_rpt(struct seq_file *m, void *v)
+{
+	struct net_device *dev = m->private;
+	_adapter *adapter = (_adapter *)rtw_netdev_priv(dev);
+	struct dvobj_priv *dvobj = adapter_to_dvobj(adapter);
+
+	RTW_PRINT_SEL(m, "FW BCN offload:%s\n", dvobj->fw_bcn_offload ? "enable" : "disable");
+	RTW_PRINT_SEL(m, "FW TBTT RPT:%x\n", dvobj->vap_tbtt_rpt_map);
+	return 0;
+}
+
+#endif
+
+#ifdef CONFIG_CTRL_TXSS_BY_TP
+ssize_t proc_set_txss_tp(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data)
+{
+	struct net_device *dev = data;
+	_adapter *adapter = (_adapter *)rtw_netdev_priv(dev);
+	struct mlme_ext_priv *pmlmeext = &(adapter->mlmeextpriv);
+
+	char tmp[32];
+	u32 enable = 0;
+	u32 txss_tx_tp = 0;
+	int txss_chk_cnt = 0;
+
+	if (buffer == NULL) {
+		RTW_INFO("input buffer is NULL!\n");
+		return -EFAULT;
+	}
+
+	if (count < 1) {
+		RTW_INFO("input length is 0!\n");
+		return -EFAULT;
+	}
+
+	if (count > sizeof(tmp)) {
+		RTW_INFO("input length is too large\n");
+		rtw_warn_on(1);
+		return -EFAULT;
+	}
+
+	if (buffer && !copy_from_user(tmp, buffer, count)) {
+		int num = sscanf(tmp, "%u %u %d",
+			&enable, &txss_tx_tp, &txss_chk_cnt);
+
+		if (num < 1) {
+			RTW_INFO("input parameters < 1\n");
+			return -EINVAL;
+		}
+		pmlmeext->txss_ctrl_en = enable;
+
+		if (txss_tx_tp)
+			pmlmeext->txss_tp_th = txss_tx_tp;
+		if (txss_chk_cnt)
+			pmlmeext->txss_tp_chk_cnt = txss_chk_cnt;
+
+		RTW_INFO("%s txss_ctl_en :%s , txss_tp_th:%d, tp_chk_cnt:%d\n",
+			__func__, pmlmeext->txss_tp_th ? "Y" : "N",
+			pmlmeext->txss_tp_th, pmlmeext->txss_tp_chk_cnt);
+
+	}
+
+	return count;
+}
+
+int proc_get_txss_tp(struct seq_file *m, void *v)
+{
+	struct net_device *dev = m->private;
+	_adapter *adapter = (_adapter *)rtw_netdev_priv(dev);
+	struct mlme_ext_priv *pmlmeext = &(adapter->mlmeextpriv);
+
+	RTW_PRINT_SEL(m, "TXSS  Control - %s\n", pmlmeext->txss_ctrl_en ? "enable" : "disable");
+	RTW_PRINT_SEL(m, "TXSS  Tx TP TH - %d\n", pmlmeext->txss_tp_th);
+	RTW_PRINT_SEL(m, "TXSS  check cnt - %d\n", pmlmeext->txss_tp_chk_cnt);
+
+	return 0;
+}
+#ifdef DBG_CTRL_TXSS
+ssize_t proc_set_txss_ctrl(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data)
+{
+	struct net_device *dev = data;
+	_adapter *adapter = (_adapter *)rtw_netdev_priv(dev);
+	struct mlme_ext_priv *pmlmeext = &(adapter->mlmeextpriv);
+
+	char tmp[32];
+	u32 tx_1ss = 0;
+
+	if (buffer == NULL) {
+		RTW_INFO("input buffer is NULL!\n");
+		return -EFAULT;
+	}
+
+	if (count < 1) {
+		RTW_INFO("input length is 0!\n");
+		return -EFAULT;
+	}
+
+	if (count > sizeof(tmp)) {
+		RTW_INFO("input length is too large\n");
+		rtw_warn_on(1);
+		return -EFAULT;
+	}
+
+	if (buffer && !copy_from_user(tmp, buffer, count)) {
+		int num = sscanf(tmp, "%u",	&tx_1ss);
+
+		if (num < 1) {
+			RTW_INFO("input parameters < 1\n");
+			return -EINVAL;
+		}
+
+		pmlmeext->txss_ctrl_en = _FALSE;
+
+		dbg_ctrl_txss(adapter, tx_1ss);
+
+		RTW_INFO("%s set tx to  1ss :%s\n", __func__, tx_1ss ? "Y" : "N");
+	}
+
+	return count;
+}
+
+int proc_get_txss_ctrl(struct seq_file *m, void *v)
+{
+	struct net_device *dev = m->private;
+	_adapter *adapter = (_adapter *)rtw_netdev_priv(dev);
+	struct mlme_ext_priv *pmlmeext = &(adapter->mlmeextpriv);
+
+	RTW_PRINT_SEL(m, "TXSS  1ss - %s\n", pmlmeext->txss_1ss ? "Y" : "N");
+
+	return 0;
+}
+#endif
+#endif
 
 #ifdef CONFIG_DBG_RF_CAL
 int proc_get_iqk_info(struct seq_file *m, void *v)
@@ -6072,6 +6692,11 @@ ssize_t proc_set_iqk(struct file *file, const char __user *buffer, size_t count,
 
 		int num = sscanf(tmp, "%d %d %d", &recovery, &clear, &segment);
 
+		if (num != 3) {
+			RTW_INFO("Invalid format\n");
+			return count;
+		}
+
 		rtw_hal_iqk_test(padapter, recovery, clear, segment);
 	}
 
@@ -6106,6 +6731,11 @@ ssize_t proc_set_lck(struct file *file, const char __user *buffer, size_t count,
 
 		int num = sscanf(tmp, "%d", &trigger);
 
+		if (num != 1) {
+			RTW_INFO("Invalid format\n");
+			return count;
+		}
+
 		rtw_hal_lck_test(padapter);
 	}
 
@@ -6113,12 +6743,178 @@ ssize_t proc_set_lck(struct file *file, const char __user *buffer, size_t count,
 }
 #endif /* CONFIG_DBG_RF_CAL */
 
+#ifdef CONFIG_LPS_CHK_BY_TP
+ssize_t proc_set_lps_chk_tp(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data)
+{
+	struct net_device *dev = data;
+	_adapter *adapter = (_adapter *)rtw_netdev_priv(dev);
+	struct pwrctrl_priv *pwrpriv = adapter_to_pwrctl(adapter);
+	char tmp[32];
+	u32 enable = 0;
+	u32 lps_tx_tp = 0, lps_rx_tp = 0, lps_bi_tp = 0;
+	int lps_chk_cnt_th = 0;
+	u32 lps_tx_pkts = 0, lps_rx_pkts = 0;
+
+	if (buffer == NULL) {
+		RTW_INFO("input buffer is NULL!\n");
+		return -EFAULT;
+	}
+
+	if (count < 1) {
+		RTW_INFO("input length is 0!\n");
+		return -EFAULT;
+	}
+
+	if (count > sizeof(tmp)) {
+		RTW_INFO("input length is too large\n");
+		rtw_warn_on(1);
+		return -EFAULT;
+	}
+
+	if (buffer && !copy_from_user(tmp, buffer, count)) {
+		int num = sscanf(tmp, "%u %u %u %u %d %u %u",
+			&enable, &lps_tx_tp, &lps_rx_tp, &lps_bi_tp,
+			&lps_chk_cnt_th, &lps_tx_pkts, &lps_rx_pkts);
+
+		if (num < 1) {
+			RTW_INFO("input parameters < 1\n");
+			return -EINVAL;
+		}
+		pwrpriv->lps_chk_by_tp = enable;
+
+		if (lps_tx_tp) {
+			pwrpriv->lps_tx_tp_th = lps_tx_tp;
+			pwrpriv->lps_rx_tp_th = lps_tx_tp;
+			pwrpriv->lps_bi_tp_th = lps_tx_tp;
+		}
+		if (lps_rx_tp)
+			pwrpriv->lps_rx_tp_th = lps_rx_tp;
+		if (lps_bi_tp)
+			pwrpriv->lps_bi_tp_th = lps_bi_tp;
+
+		if (lps_chk_cnt_th)
+			pwrpriv->lps_chk_cnt_th = lps_chk_cnt_th;
+
+		if (lps_tx_pkts)
+			pwrpriv->lps_tx_pkts = lps_tx_pkts;
+
+		if (lps_rx_pkts)
+			pwrpriv->lps_rx_pkts = lps_rx_pkts;
+
+		RTW_INFO("%s lps_chk_by_tp:%s , lps_tx_tp_th:%d, lps_tx_tp_th:%d, lps_bi_tp:%d\n",
+			__func__, pwrpriv->lps_chk_by_tp ? "Y" : "N",
+			pwrpriv->lps_tx_tp_th, pwrpriv->lps_tx_tp_th, pwrpriv->lps_bi_tp_th);
+		RTW_INFO("%s lps_chk_cnt_th:%d , lps_tx_pkts:%d, lps_rx_pkts:%d\n",
+			__func__, pwrpriv->lps_chk_cnt_th, pwrpriv->lps_tx_pkts, pwrpriv->lps_rx_pkts);
+	}
+
+	return count;
+}
+
+int proc_get_lps_chk_tp(struct seq_file *m, void *v)
+{
+	struct net_device *dev = m->private;
+	_adapter *adapter = (_adapter *)rtw_netdev_priv(dev);
+	struct pwrctrl_priv *pwrpriv = adapter_to_pwrctl(adapter);
+
+	RTW_PRINT_SEL(m, "LPS chk by tp - %s\n", pwrpriv->lps_chk_by_tp ? "enable" : "disable");
+	RTW_PRINT_SEL(m, "LPS Tx TP TH - %d(Mbps)\n", pwrpriv->lps_tx_tp_th);
+	RTW_PRINT_SEL(m, "LPS Rx TP TH - %d(Mbps)\n", pwrpriv->lps_rx_tp_th);
+	RTW_PRINT_SEL(m, "LPS BI TP TH - %d(Mbps)\n", pwrpriv->lps_bi_tp_th);
+
+	RTW_PRINT_SEL(m, "LPS CHK CNT - %d\n", pwrpriv->lps_chk_cnt_th);
+	RTW_PRINT_SEL(m, "LPS Tx PKTs - %d\n", pwrpriv->lps_tx_pkts);
+	RTW_PRINT_SEL(m, "LPS Rx PKTs - %d\n", pwrpriv->lps_rx_pkts);
+	return 0;
+}
+#endif /*CONFIG_LPS_CHK_BY_TP*/
+#ifdef CONFIG_SUPPORT_STATIC_SMPS
+ssize_t proc_set_smps(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data)
+{
+	struct net_device *dev = data;
+	_adapter *adapter = (_adapter *)rtw_netdev_priv(dev);
+	struct mlme_ext_priv *pmlmeext = &(adapter->mlmeextpriv);
+	char tmp[32];
+	u32 enable = 0;
+	u32 smps_en, smps_tx_tp = 0, smps_rx_tp = 0;
+	u32 smps_test = 0, smps_test_en = 0;
+
+	if (buffer == NULL) {
+		RTW_INFO("input buffer is NULL!\n");
+		return -EFAULT;
+	}
+
+	if (count < 1) {
+		RTW_INFO("input length is 0!\n");
+		return -EFAULT;
+	}
+
+	if (count > sizeof(tmp)) {
+		RTW_INFO("input length is too large\n");
+		rtw_warn_on(1);
+		return -EFAULT;
+	}
+
+	if (buffer && !copy_from_user(tmp, buffer, count)) {
+		int num = sscanf(tmp, "%u %u %u %u %u", &smps_en, &smps_tx_tp, &smps_rx_tp,
+			&smps_test, &smps_test_en);
+
+		if (num < 1) {
+			RTW_INFO("input parameters < 1\n");
+			return -EINVAL;
+		}
+
+		pmlmeext->ssmps_en = smps_en;
+		if (smps_tx_tp) {
+			pmlmeext->ssmps_tx_tp_th= smps_tx_tp;
+			pmlmeext->ssmps_rx_tp_th= smps_tx_tp;
+		}
+		if (smps_rx_tp)
+			pmlmeext->ssmps_rx_tp_th = smps_rx_tp;
+
+		#ifdef DBG_STATIC_SMPS
+		if (num > 3) {
+			pmlmeext->ssmps_test = smps_test;
+			pmlmeext->ssmps_test_en = smps_test_en;
+		}
+		#endif
+		RTW_INFO("SM PS : %s tx_tp_th:%d, rx_tp_th:%d\n",
+			(smps_en) ? "Enable" : "Disable",
+			pmlmeext->ssmps_tx_tp_th,
+			pmlmeext->ssmps_rx_tp_th);
+		#ifdef DBG_STATIC_SMPS
+		RTW_INFO("SM PS : %s ssmps_test_en:%d\n",
+			(smps_test) ? "Enable" : "Disable",
+			pmlmeext->ssmps_test_en);
+		#endif
+	}
+
+	return count;
+}
+
+int proc_get_smps(struct seq_file *m, void *v)
+{
+	struct net_device *dev = m->private;
+	_adapter *adapter = (_adapter *)rtw_netdev_priv(dev);
+	struct mlme_ext_priv *pmlmeext = &(adapter->mlmeextpriv);
+
+	RTW_PRINT_SEL(m, "Static SMPS %s\n", pmlmeext->ssmps_en ? "enable" : "disable");
+	RTW_PRINT_SEL(m, "Tx TP TH %d\n", pmlmeext->ssmps_tx_tp_th);
+	RTW_PRINT_SEL(m, "Rx TP TH %d\n", pmlmeext->ssmps_rx_tp_th);
+	#ifdef DBG_STATIC_SMPS
+	RTW_PRINT_SEL(m, "test %d, test_en:%d\n", pmlmeext->ssmps_test, pmlmeext->ssmps_test_en);
+	#endif
+	return 0;
+}
+#endif /*CONFIG_SUPPORT_STATIC_SMPS*/
+
 #endif /* CONFIG_PROC_DEBUG */
 #define RTW_BUFDUMP_BSIZE		16
 #if 1
 inline void RTW_BUF_DUMP_SEL(uint _loglevel, void *sel, u8 *_titlestring,
 					bool _idx_show, const u8 *_hexdata, int _hexdatalen)
 {
+#ifdef CONFIG_RTW_DEBUG
 	int __i;
 	u8 *ptr = (u8 *)_hexdata;
 
@@ -6144,6 +6940,7 @@ inline void RTW_BUF_DUMP_SEL(uint _loglevel, void *sel, u8 *_titlestring,
 		}
 		_RTW_PRINT_SEL(sel, "\n");
 	}
+#endif
 }
 #else
 inline void _RTW_STR_DUMP_SEL(void *sel, char *str_out)
diff --git a/rtl8723DS/core/rtw_eeprom.c b/rtl8723DS/core/rtw_eeprom.c
index d48996e..d48996e 100755..100644
--- a/rtl8723DS/core/rtw_eeprom.c
+++ b/rtl8723DS/core/rtw_eeprom.c
diff --git a/rtl8723DS/core/rtw_ieee80211.c b/rtl8723DS/core/rtw_ieee80211.c
index d76e816..c867197 100755..100644
--- a/rtl8723DS/core/rtw_ieee80211.c
+++ b/rtl8723DS/core/rtw_ieee80211.c
@@ -127,6 +127,19 @@ int rtw_get_bit_value_from_ieee_value(u8 val)
 	}
 	return 0;
 }
+uint rtw_get_cckrate_size(u8 *rate, u32 rate_length)
+{
+	int i = 0;
+	while(i < rate_length){
+		RTW_DBG("%s, rate[%d]=%u\n", __FUNCTION__, i, rate[i]);
+		if (((rate[i] & 0x7f) == 2) || ((rate[i] & 0x7f) == 4) ||
+			((rate[i] & 0x7f) == 11)  || ((rate[i] & 0x7f) == 22))
+			i++;
+		else
+			break;
+	}
+	return i;
+}
 
 uint	rtw_is_cckrates_included(u8 *rate)
 {
@@ -224,9 +237,9 @@ inline u8 secondary_ch_offset_to_hal_ch_offset(u8 ch_offset)
 	if (ch_offset == SCN)
 		return HAL_PRIME_CHNL_OFFSET_DONT_CARE;
 	else if (ch_offset == SCA)
-		return HAL_PRIME_CHNL_OFFSET_UPPER;
-	else if (ch_offset == SCB)
 		return HAL_PRIME_CHNL_OFFSET_LOWER;
+	else if (ch_offset == SCB)
+		return HAL_PRIME_CHNL_OFFSET_UPPER;
 
 	return HAL_PRIME_CHNL_OFFSET_DONT_CARE;
 }
@@ -236,9 +249,9 @@ inline u8 hal_ch_offset_to_secondary_ch_offset(u8 ch_offset)
 	if (ch_offset == HAL_PRIME_CHNL_OFFSET_DONT_CARE)
 		return SCN;
 	else if (ch_offset == HAL_PRIME_CHNL_OFFSET_LOWER)
-		return SCB;
-	else if (ch_offset == HAL_PRIME_CHNL_OFFSET_UPPER)
 		return SCA;
+	else if (ch_offset == HAL_PRIME_CHNL_OFFSET_UPPER)
+		return SCB;
 
 	return SCN;
 }
@@ -381,6 +394,52 @@ exit:
 	return ret;
 }
 
+ /* Returns:  remove size OR  _FAIL: not updated*/
+int rtw_remove_ie_g_rate(u8 *ie, uint *ie_len, uint offset, u8 eid)
+{
+	int ret = _FAIL;
+	u8 *tem_target_ie;
+	u8 *target_ie;
+	u32 target_ielen,temp_target_ielen,cck_rate_size,rm_size;
+	u8 *start;
+	uint search_len;
+	u8 *remain_ies;
+	uint remain_len;
+	if (!ie || !ie_len || *ie_len <= offset)
+		goto exit;
+
+	start = ie + offset;
+	search_len = *ie_len - offset;
+
+	while (1) {
+		tem_target_ie=rtw_get_ie(start,eid,&temp_target_ielen,search_len);
+		
+		/*if(tem_target_ie)
+			RTW_INFO("%s, tem_target_ie=%u\n", __FUNCTION__,*tem_target_ie);*/
+		if (tem_target_ie && temp_target_ielen) {
+			cck_rate_size = rtw_get_cckrate_size((tem_target_ie+2), temp_target_ielen);
+			rm_size = temp_target_ielen - cck_rate_size;
+			RTW_DBG("%s,cck_rate_size=%u rm_size=%u\n", __FUNCTION__, cck_rate_size, rm_size);
+			temp_target_ielen=temp_target_ielen + 2;/*org size of  Supposrted Rates(include id + length)*/
+			/*RTW_INFO("%s, temp_target_ielen=%u\n", __FUNCTION__,temp_target_ielen);*/
+			remain_ies = tem_target_ie + temp_target_ielen;
+			remain_len = search_len - (remain_ies - start);
+			target_ielen=cck_rate_size;/*discount g mode rate 6, 9 12,18Mbps,id , length*/
+			*(tem_target_ie+1)=target_ielen;/*set new length to Supposrted Rates*/
+			target_ie=tem_target_ie+target_ielen + 2;/*set target ie to address of rate 6Mbps */
+	
+			_rtw_memmove(target_ie, remain_ies, remain_len);
+			*ie_len = *ie_len - rm_size;
+			ret = rm_size;
+
+			start = target_ie;
+			search_len = remain_len;
+		} else
+			break;
+	}
+exit:
+	return ret;
+}
 void rtw_set_supported_rate(u8 *SupportedRates, uint mode)
 {
 
@@ -496,7 +555,7 @@ int rtw_generate_ie(struct registry_priv *pregistrypriv)
 
 #ifdef CONFIG_80211N_HT
 	/* HT Cap. */
-	if (((pregistrypriv->wireless_mode & WIRELESS_11_5N) || (pregistrypriv->wireless_mode & WIRELESS_11_24N))
+	if (is_supported_ht(pregistrypriv->wireless_mode)
 	    && (pregistrypriv->ht_enable == _TRUE)) {
 		/* todo: */
 	}
@@ -677,7 +736,6 @@ int rtw_parse_wpa_ie(u8 *wpa_ie, int wpa_ie_len, int *group_cipher, int *pairwis
 
 int rtw_rsne_info_parse(const u8 *ie, uint ie_len, struct rsne_info *info)
 {
-	int i;
 	const u8 *pos = ie;
 	u16 cnt;
 
@@ -819,7 +877,7 @@ exit:
 int rtw_get_wapi_ie(u8 *in_ie, uint in_len, u8 *wapi_ie, u16 *wapi_len)
 {
 	int len = 0;
-	u8 authmode, i;
+	u8 authmode;
 	uint	cnt;
 	u8 wapi_oui1[4] = {0x0, 0x14, 0x72, 0x01};
 	u8 wapi_oui2[4] = {0x0, 0x14, 0x72, 0x02};
@@ -862,7 +920,7 @@ int rtw_get_wapi_ie(u8 *in_ie, uint in_len, u8 *wapi_ie, u16 *wapi_len)
 
 int rtw_get_sec_ie(u8 *in_ie, uint in_len, u8 *rsn_ie, u16 *rsn_len, u8 *wpa_ie, u16 *wpa_len)
 {
-	u8 authmode, sec_idx, i;
+	u8 authmode, sec_idx;
 	u8 wpa_oui[4] = {0x0, 0x50, 0xf2, 0x01};
 	uint	cnt;
 
@@ -1311,6 +1369,24 @@ ParseRes rtw_ieee802_11_parse_elems(u8 *start, uint len,
 			elems->rm_en_cap = pos;
 			elems->rm_en_cap_len = elen;
 			break;
+#ifdef CONFIG_RTW_MESH
+		case WLAN_EID_PREQ:
+			elems->preq = pos;
+			elems->preq_len = elen;
+			break;
+		case WLAN_EID_PREP:
+			elems->prep = pos;
+			elems->prep_len = elen;
+			break;
+		case WLAN_EID_PERR:
+			elems->perr = pos;
+			elems->perr_len = elen;
+			break;
+		case WLAN_EID_RANN:
+			elems->rann = pos;
+			elems->rann_len = elen;
+			break;
+#endif
 		default:
 			unknown++;
 			if (!show_errors)
@@ -1525,10 +1601,6 @@ void dump_ht_cap_ie_content(void *sel, const u8 *buf, u32 buf_len)
 
 void dump_ht_cap_ie(void *sel, const u8 *ie, u32 ie_len)
 {
-	const u8 *pos = ie;
-	u16 id;
-	u16 len;
-
 	const u8 *ht_cap_ie;
 	sint ht_cap_ielen;
 
@@ -1562,10 +1634,6 @@ void dump_ht_op_ie_content(void *sel, const u8 *buf, u32 buf_len)
 
 void dump_ht_op_ie(void *sel, const u8 *ie, u32 ie_len)
 {
-	const u8 *pos = ie;
-	u16 id;
-	u16 len;
-
 	const u8 *ht_op_ie;
 	sint ht_op_ielen;
 
@@ -1639,8 +1707,10 @@ void dump_wps_ie(void *sel, const u8 *ie, u32 ie_len)
  * @ch: pointer of ch, used as output
  * @bw: pointer of bw, used as output
  * @offset: pointer of offset, used as output
+ * @ht: check HT IEs
+ * @vht: check VHT IEs, if true imply ht is true
  */
-void rtw_ies_get_chbw(u8 *ies, int ies_len, u8 *ch, u8 *bw, u8 *offset)
+void rtw_ies_get_chbw(u8 *ies, int ies_len, u8 *ch, u8 *bw, u8 *offset, u8 ht, u8 vht)
 {
 	u8 *p;
 	int	ie_len;
@@ -1654,7 +1724,7 @@ void rtw_ies_get_chbw(u8 *ies, int ies_len, u8 *ch, u8 *bw, u8 *offset)
 		*ch = *(p + 2);
 
 #ifdef CONFIG_80211N_HT
-	{
+	if (ht || vht) {
 		u8 *ht_cap_ie, *ht_op_ie;
 		int ht_cap_ielen, ht_op_ielen;
 
@@ -1687,44 +1757,29 @@ void rtw_ies_get_chbw(u8 *ies, int ies_len, u8 *ch, u8 *bw, u8 *offset)
 				}
 			}
 		}
-	}
-#endif /* CONFIG_80211N_HT */
+
 #ifdef CONFIG_80211AC_VHT
-	{
-		u8 *vht_op_ie;
-		int vht_op_ielen;
-
-		vht_op_ie = rtw_get_ie(ies, EID_VHTOperation, &vht_op_ielen, ies_len);
-		if (vht_op_ie && vht_op_ielen) {
-			/* enable VHT 80 before check enable HT40 or not */
-			if (GET_VHT_OPERATION_ELE_CHL_WIDTH(vht_op_ie + 2)  >=  1) {
-				/* for HT40, enable VHT80 */
-				if (*bw == CHANNEL_WIDTH_40)
+		if (vht) {
+			u8 *vht_op_ie;
+			int vht_op_ielen;
+
+			vht_op_ie = rtw_get_ie(ies, EID_VHTOperation, &vht_op_ielen, ies_len);
+			if (vht_op_ie && vht_op_ielen) {
+				if (GET_VHT_OPERATION_ELE_CHL_WIDTH(vht_op_ie + 2) >= 1)
 					*bw = CHANNEL_WIDTH_80;
-				/* for HT20, enable VHT20 */
-				else if (*bw == CHANNEL_WIDTH_20) {
-					/* modify VHT OP IE */
-					SET_VHT_OPERATION_ELE_CHL_WIDTH(vht_op_ie + 2, 0);
-					/* reset to 0 for VHT20 */
-					SET_VHT_OPERATION_ELE_CHL_CENTER_FREQ1(vht_op_ie + 2, 0);
-					SET_VHT_OPERATION_ELE_CHL_CENTER_FREQ2(vht_op_ie + 2, 0);
-				}
-			} else {
-				/*
-				  VHT OP WIDTH = 0  under HT20/HT40
-				  if REGSTY_BW_5G(pregistrypriv) < CHANNEL_WIDTH_80 in rtw_build_vht_operation_ie
-				*/
 			}
 		}
+#endif /* CONFIG_80211AC_VHT */
+
 	}
-#endif
+#endif /* CONFIG_80211N_HT */
 }
 
-void rtw_bss_get_chbw(WLAN_BSSID_EX *bss, u8 *ch, u8 *bw, u8 *offset)
+void rtw_bss_get_chbw(WLAN_BSSID_EX *bss, u8 *ch, u8 *bw, u8 *offset, u8 ht, u8 vht)
 {
 	rtw_ies_get_chbw(bss->IEs + sizeof(NDIS_802_11_FIXED_IEs)
 		, bss->IELength - sizeof(NDIS_802_11_FIXED_IEs)
-		, ch, bw, offset);
+		, ch, bw, offset, ht, vht);
 
 	if (*ch == 0)
 		*ch = bss->Configuration.DSConfig;
@@ -1791,7 +1846,7 @@ void rtw_sync_chbw(u8 *req_ch, u8 *req_bw, u8 *req_offset
 		if (*g_bw == CHANNEL_WIDTH_40 || *g_bw == CHANNEL_WIDTH_80)
 			*req_offset = *g_offset;
 		else if (*g_bw == CHANNEL_WIDTH_20)
-			*req_offset = rtw_get_offset_by_ch(*req_ch);
+			rtw_get_offset_by_chbw(*req_ch, *req_bw, req_offset);
 
 		if (*req_offset == HAL_PRIME_CHNL_OFFSET_DONT_CARE) {
 			RTW_ERR("%s req 80MHz BW without offset, down to 20MHz\n", __func__);
@@ -1803,7 +1858,7 @@ void rtw_sync_chbw(u8 *req_ch, u8 *req_bw, u8 *req_offset
 		if (*g_bw == CHANNEL_WIDTH_40 || *g_bw == CHANNEL_WIDTH_80)
 			*req_offset = *g_offset;
 		else if (*g_bw == CHANNEL_WIDTH_20)
-			*req_offset = rtw_get_offset_by_ch(*req_ch);
+			rtw_get_offset_by_chbw(*req_ch, *req_bw, req_offset);
 
 		if (*req_offset == HAL_PRIME_CHNL_OFFSET_DONT_CARE) {
 			RTW_ERR("%s req 40MHz BW without offset, down to 20MHz\n", __func__);
@@ -1836,7 +1891,7 @@ u32 rtw_get_p2p_merged_ies_len(u8 *in_ie, u32 in_len)
 	PNDIS_802_11_VARIABLE_IEs	pIE;
 	u8 OUI[4] = { 0x50, 0x6f, 0x9a, 0x09 };
 	int i = 0;
-	int j = 0, len = 0;
+	int len = 0;
 
 	while (i < in_len) {
 		pIE = (PNDIS_802_11_VARIABLE_IEs)(in_ie + i);
diff --git a/rtl8723DS/core/rtw_io.c b/rtl8723DS/core/rtw_io.c
index cb8e6b8..159894a 100755..100644
--- a/rtl8723DS/core/rtw_io.c
+++ b/rtl8723DS/core/rtw_io.c
@@ -419,9 +419,13 @@ u32 _rtw_write_port_and_wait(_adapter *adapter, u32 addr, u32 cnt, u8 *pmem, int
 
 	ret = _rtw_write_port(adapter, addr, cnt, pmem);
 
-	if (ret == _SUCCESS)
+	if (ret == _SUCCESS) {
 		ret = rtw_sctx_wait(&sctx, __func__);
 
+		if (ret != _SUCCESS)
+			pxmitbuf->sctx = NULL;
+	}
+
 	return ret;
 }
 
@@ -484,39 +488,192 @@ void rtw_reset_continual_io_error(struct dvobj_priv *dvobj)
 }
 
 #ifdef DBG_IO
+#define RTW_IO_SNIFF_TYPE_RANGE	0 /* specific address range is accessed */
+#define RTW_IO_SNIFF_TYPE_EN	1 /* part or all sniffed range is enabled */
+#define RTW_IO_SNIFF_TYPE_DIS	2 /* part or all sniffed range is disabled */
+
+struct rtw_io_sniff_ent {
+	u8 chip;
+	u8 hci;
+	u32 addr;
+	u8 type;
+	union {
+		u32 end_addr;
+		u32 mask;
+	} u;
+	char *tag;
+};
+
+const char *rtw_io_sniff_ent_get_tag(const struct rtw_io_sniff_ent *ent)
+{
+	return ent->tag;
+}
+
+#define RTW_IO_SNIFF_RANGE_ENT(_chip, _hci, _addr, _end_addr, _tag) \
+	{.chip = _chip, .hci = _hci, .addr = _addr, .u.end_addr = _end_addr, .tag = _tag, .type = RTW_IO_SNIFF_TYPE_RANGE,}
+
+#define RTW_IO_SNIFF_EN_ENT(_chip, _hci, _addr, _mask, _tag) \
+	{.chip = _chip, .hci = _hci, .addr = _addr, .u.mask = _mask, .tag = _tag, .type = RTW_IO_SNIFF_TYPE_EN,}
 
-u32 read_sniff_ranges[][2] = {
-	/* {0x520, 0x523}, */
+#define RTW_IO_SNIFF_DIS_ENT(_chip, _hci, _addr, _mask, _tag) \
+	{.chip = _chip, .hci = _hci, .addr = _addr, .u.mask = _mask, .tag = _tag, .type = RTW_IO_SNIFF_TYPE_DIS,}
+
+const struct rtw_io_sniff_ent read_sniff[] = {
+#ifdef DBG_IO_HCI_EN_CHK
+	RTW_IO_SNIFF_EN_ENT(MAX_CHIP_TYPE, RTW_SDIO, 0x02, 0x1FC, "SDIO 0x02[8:2] not all 0"),
+	RTW_IO_SNIFF_EN_ENT(MAX_CHIP_TYPE, RTW_USB, 0x02, 0x1E0, "USB 0x02[8:5] not all 0"),
+	RTW_IO_SNIFF_EN_ENT(MAX_CHIP_TYPE, RTW_PCIE, 0x02, 0x01C, "PCI 0x02[4:2] not all 0"),
+#endif
+#ifdef DBG_IO_SNIFF_EXAMPLE
+	RTW_IO_SNIFF_RANGE_ENT(MAX_CHIP_TYPE, 0, 0x522, 0x522, "read TXPAUSE"),
+	RTW_IO_SNIFF_DIS_ENT(MAX_CHIP_TYPE, 0, 0x02, 0x3, "0x02[1:0] not all 1"),
+#endif
 };
 
-u32 write_sniff_ranges[][2] = {
-	/* {0x520, 0x523}, */
-	/* {0x4c, 0x4c}, */
+const int read_sniff_num = sizeof(read_sniff) / sizeof(struct rtw_io_sniff_ent);
+
+const struct rtw_io_sniff_ent write_sniff[] = {
+#ifdef DBG_IO_HCI_EN_CHK
+	RTW_IO_SNIFF_EN_ENT(MAX_CHIP_TYPE, RTW_SDIO, 0x02, 0x1FC, "SDIO 0x02[8:2] not all 0"),
+	RTW_IO_SNIFF_EN_ENT(MAX_CHIP_TYPE, RTW_USB, 0x02, 0x1E0, "USB 0x02[8:5] not all 0"),
+	RTW_IO_SNIFF_EN_ENT(MAX_CHIP_TYPE, RTW_PCIE, 0x02, 0x01C, "PCI 0x02[4:2] not all 0"),
+#endif
+#ifdef DBG_IO_SNIFF_EXAMPLE
+	RTW_IO_SNIFF_RANGE_ENT(MAX_CHIP_TYPE, 0, 0x522, 0x522, "write TXPAUSE"),
+	RTW_IO_SNIFF_DIS_ENT(MAX_CHIP_TYPE, 0, 0x02, 0x3, "0x02[1:0] not all 1"),
+#endif
 };
 
-int read_sniff_num = sizeof(read_sniff_ranges) / sizeof(u32) / 2;
-int write_sniff_num = sizeof(write_sniff_ranges) / sizeof(u32) / 2;
+const int write_sniff_num = sizeof(write_sniff) / sizeof(struct rtw_io_sniff_ent);
+
+static bool match_io_sniff_ranges(_adapter *adapter
+	, const struct rtw_io_sniff_ent *sniff, int i, u32 addr, u16 len)
+{
+
+	/* check if IO range after sniff end address */
+	if (addr > sniff->u.end_addr)
+		return 0;
+
+	return 1;
+}
+
+static bool match_io_sniff_en(_adapter *adapter
+	, const struct rtw_io_sniff_ent *sniff, int i, u32 addr, u8 len, u32 val)
+{
+	u8 sniff_len;
+	u8 shift;
+	u32 mask;
+	bool ret = 0;
+
+	/* check if IO range after sniff end address */
+	sniff_len = 4;
+	while (!(sniff->u.mask & (0xFF << ((sniff_len - 1) * 8)))) {
+		sniff_len--;
+		if (sniff_len == 0)
+			goto exit;
+	}
+	if (sniff->addr + sniff_len <= addr)
+		goto exit;
+
+	if (sniff->addr > addr) {
+		shift = (sniff->addr - addr) * 8;
+		mask = sniff->u.mask << shift;
+	} else if (sniff->addr < addr) {
+		shift = (addr - sniff->addr) * 8;
+		mask = sniff->u.mask >> shift;
+	} else {
+		shift = 0;
+		mask = sniff->u.mask;
+	}
+
+	if (sniff->type == RTW_IO_SNIFF_TYPE_DIS) {
+		if (len == 4)
+			mask &= 0xFFFFFFFF;
+		else if (len == 3)
+			mask &= 0x00FFFFFF;
+		else if (len == 2)
+			mask &= 0x0000FFFF;
+		else if (len == 1)
+			mask &= 0x000000FF;
+		else
+			mask &= 0x00000000;
+	}
+	
+	if ((sniff->type == RTW_IO_SNIFF_TYPE_EN && (mask & val))
+		|| (sniff->type == RTW_IO_SNIFF_TYPE_DIS && (mask & val) != mask)
+	) {
+		ret = 1;
+		if (0)
+			RTW_INFO(FUNC_ADPT_FMT" addr:0x%x len:%u val:0x%x i:%d sniff_len:%u shift:%u mask:0x%x\n"
+				, FUNC_ADPT_ARG(adapter), addr, len, val, i, sniff_len, shift, mask);
+	}
+
+exit:
+	return ret;
+}
+
+static bool match_io_sniff(_adapter *adapter
+	, const struct rtw_io_sniff_ent *sniff, int i, u32 addr, u8 len, u32 val)
+{
+	bool ret = 0;
+
+	if (sniff->chip != MAX_CHIP_TYPE
+		&& sniff->chip != rtw_get_chip_type(adapter))
+		goto exit;
+	if (sniff->hci
+		&& !(sniff->hci & rtw_get_intf_type(adapter)))
+		goto exit;
+	if (sniff->addr >= addr + len) /* IO range below sniff start address */
+		goto exit;
+
+	switch (sniff->type) {
+	case RTW_IO_SNIFF_TYPE_RANGE:
+		ret = match_io_sniff_ranges(adapter, sniff, i, addr, len);
+		break;
+	case RTW_IO_SNIFF_TYPE_EN:
+	case RTW_IO_SNIFF_TYPE_DIS:
+		if (len == 1 || len == 2 || len == 4)
+			ret = match_io_sniff_en(adapter, sniff, i, addr, len, val);
+		break;
+	default:
+		rtw_warn_on(1);
+		break;
+	}
+
+exit:
+	return ret;
+}
 
-bool match_read_sniff_ranges(u32 addr, u16 len)
+const struct rtw_io_sniff_ent *match_read_sniff(_adapter *adapter
+	, u32 addr, u16 len, u32 val)
 {
 	int i;
+	bool ret = 0;
+
 	for (i = 0; i < read_sniff_num; i++) {
-		if (addr + len > read_sniff_ranges[i][0] && addr <= read_sniff_ranges[i][1])
-			return _TRUE;
+		ret = match_io_sniff(adapter, &read_sniff[i], i, addr, len, val);
+		if (ret)
+			goto exit;
 	}
 
-	return _FALSE;
+exit:
+	return ret ? &read_sniff[i] : NULL;
 }
 
-bool match_write_sniff_ranges(u32 addr, u16 len)
+const struct rtw_io_sniff_ent *match_write_sniff(_adapter *adapter
+	, u32 addr, u16 len, u32 val)
 {
 	int i;
+	bool ret = 0;
+
 	for (i = 0; i < write_sniff_num; i++) {
-		if (addr + len > write_sniff_ranges[i][0] && addr <= write_sniff_ranges[i][1])
-			return _TRUE;
+		ret = match_io_sniff(adapter, &write_sniff[i], i, addr, len, val);
+		if (ret)
+			goto exit;
 	}
 
-	return _FALSE;
+exit:
+	return ret ? &write_sniff[i] : NULL;
 }
 
 struct rf_sniff_ent {
@@ -538,7 +695,7 @@ struct rf_sniff_ent rf_write_sniff_ranges[] = {
 int rf_read_sniff_num = sizeof(rf_read_sniff_ranges) / sizeof(struct rf_sniff_ent);
 int rf_write_sniff_num = sizeof(rf_write_sniff_ranges) / sizeof(struct rf_sniff_ent);
 
-bool match_rf_read_sniff_ranges(u8 path, u32 addr, u32 mask)
+bool match_rf_read_sniff_ranges(_adapter *adapter, u8 path, u32 addr, u32 mask)
 {
 	int i;
 
@@ -551,7 +708,7 @@ bool match_rf_read_sniff_ranges(u8 path, u32 addr, u32 mask)
 	return _FALSE;
 }
 
-bool match_rf_write_sniff_ranges(u8 path, u32 addr, u32 mask)
+bool match_rf_write_sniff_ranges(_adapter *adapter, u8 path, u32 addr, u32 mask)
 {
 	int i;
 
@@ -567,9 +724,12 @@ bool match_rf_write_sniff_ranges(u8 path, u32 addr, u32 mask)
 u8 dbg_rtw_read8(_adapter *adapter, u32 addr, const char *caller, const int line)
 {
 	u8 val = _rtw_read8(adapter, addr);
+	const struct rtw_io_sniff_ent *ent = match_read_sniff(adapter, addr, 1, val);
 
-	if (match_read_sniff_ranges(addr, 1))
-		RTW_INFO("DBG_IO %s:%d rtw_read8(0x%04x) return 0x%02x\n", caller, line, addr, val);
+	if (ent) {
+		RTW_INFO("DBG_IO %s:%d rtw_read8(0x%04x) return 0x%02x %s\n"
+			, caller, line, addr, val, rtw_io_sniff_ent_get_tag(ent));
+	}
 
 	return val;
 }
@@ -577,9 +737,12 @@ u8 dbg_rtw_read8(_adapter *adapter, u32 addr, const char *caller, const int line
 u16 dbg_rtw_read16(_adapter *adapter, u32 addr, const char *caller, const int line)
 {
 	u16 val = _rtw_read16(adapter, addr);
+	const struct rtw_io_sniff_ent *ent = match_read_sniff(adapter, addr, 2, val);
 
-	if (match_read_sniff_ranges(addr, 2))
-		RTW_INFO("DBG_IO %s:%d rtw_read16(0x%04x) return 0x%04x\n", caller, line, addr, val);
+	if (ent) {
+		RTW_INFO("DBG_IO %s:%d rtw_read16(0x%04x) return 0x%04x %s\n"
+			, caller, line, addr, val, rtw_io_sniff_ent_get_tag(ent));
+	}
 
 	return val;
 }
@@ -587,38 +750,57 @@ u16 dbg_rtw_read16(_adapter *adapter, u32 addr, const char *caller, const int li
 u32 dbg_rtw_read32(_adapter *adapter, u32 addr, const char *caller, const int line)
 {
 	u32 val = _rtw_read32(adapter, addr);
+	const struct rtw_io_sniff_ent *ent = match_read_sniff(adapter, addr, 4, val);
 
-	if (match_read_sniff_ranges(addr, 4))
-		RTW_INFO("DBG_IO %s:%d rtw_read32(0x%04x) return 0x%08x\n", caller, line, addr, val);
+	if (ent) {
+		RTW_INFO("DBG_IO %s:%d rtw_read32(0x%04x) return 0x%08x %s\n"
+			, caller, line, addr, val, rtw_io_sniff_ent_get_tag(ent));
+	}
 
 	return val;
 }
 
 int dbg_rtw_write8(_adapter *adapter, u32 addr, u8 val, const char *caller, const int line)
 {
-	if (match_write_sniff_ranges(addr, 1))
-		RTW_INFO("DBG_IO %s:%d rtw_write8(0x%04x, 0x%02x)\n", caller, line, addr, val);
+	const struct rtw_io_sniff_ent *ent = match_write_sniff(adapter, addr, 1, val);
+
+	if (ent) {
+		RTW_INFO("DBG_IO %s:%d rtw_write8(0x%04x, 0x%02x) %s\n"
+			, caller, line, addr, val, rtw_io_sniff_ent_get_tag(ent));
+	}
 
 	return _rtw_write8(adapter, addr, val);
 }
 int dbg_rtw_write16(_adapter *adapter, u32 addr, u16 val, const char *caller, const int line)
 {
-	if (match_write_sniff_ranges(addr, 2))
-		RTW_INFO("DBG_IO %s:%d rtw_write16(0x%04x, 0x%04x)\n", caller, line, addr, val);
+	const struct rtw_io_sniff_ent *ent = match_write_sniff(adapter, addr, 2, val);
+
+	if (ent) {
+		RTW_INFO("DBG_IO %s:%d rtw_write16(0x%04x, 0x%04x) %s\n"
+			, caller, line, addr, val, rtw_io_sniff_ent_get_tag(ent));
+	}
 
 	return _rtw_write16(adapter, addr, val);
 }
 int dbg_rtw_write32(_adapter *adapter, u32 addr, u32 val, const char *caller, const int line)
 {
-	if (match_write_sniff_ranges(addr, 4))
-		RTW_INFO("DBG_IO %s:%d rtw_write32(0x%04x, 0x%08x)\n", caller, line, addr, val);
+	const struct rtw_io_sniff_ent *ent = match_write_sniff(adapter, addr, 4, val);
+
+	if (ent) {
+		RTW_INFO("DBG_IO %s:%d rtw_write32(0x%04x, 0x%08x) %s\n"
+			, caller, line, addr, val, rtw_io_sniff_ent_get_tag(ent));
+	}
 
 	return _rtw_write32(adapter, addr, val);
 }
 int dbg_rtw_writeN(_adapter *adapter, u32 addr , u32 length , u8 *data, const char *caller, const int line)
 {
-	if (match_write_sniff_ranges(addr, length))
-		RTW_INFO("DBG_IO %s:%d rtw_writeN(0x%04x, %u)\n", caller, line, addr, length);
+	const struct rtw_io_sniff_ent *ent = match_write_sniff(adapter, addr, length, 0);
+
+	if (ent) {
+		RTW_INFO("DBG_IO %s:%d rtw_writeN(0x%04x, %u) %s\n"
+			, caller, line, addr, length, rtw_io_sniff_ent_get_tag(ent));
+	}
 
 	return _rtw_writeN(adapter, addr, length, data);
 }
@@ -629,8 +811,12 @@ u8 dbg_rtw_sd_f0_read8(_adapter *adapter, u32 addr, const char *caller, const in
 	u8 val = _rtw_sd_f0_read8(adapter, addr);
 
 #if 0
-	if (match_read_sniff_ranges(addr, 1))
-		RTW_INFO("DBG_IO %s:%d rtw_sd_f0_read8(0x%04x) return 0x%02x\n", caller, line, addr, val);
+	const struct rtw_io_sniff_ent *ent = match_read_sniff(adapter, addr, 1, val);
+
+	if (ent) {
+		RTW_INFO("DBG_IO %s:%d rtw_sd_f0_read8(0x%04x) return 0x%02x %s\n"
+			, caller, line, addr, val, rtw_io_sniff_ent_get_tag(ent));
+	}
 #endif
 
 	return val;
@@ -640,9 +826,12 @@ u8 dbg_rtw_sd_f0_read8(_adapter *adapter, u32 addr, const char *caller, const in
 u8 dbg_rtw_sd_iread8(_adapter *adapter, u32 addr, const char *caller, const int line)
 {
 	u8 val = rtw_sd_iread8(adapter, addr);
+	const struct rtw_io_sniff_ent *ent = match_read_sniff(adapter, addr, 1, val);
 
-	if (match_read_sniff_ranges(addr, 1))
-		RTW_INFO("DBG_IO %s:%d rtw_sd_iread8(0x%04x) return 0x%02x\n", caller, line, addr, val);
+	if (ent) {
+		RTW_INFO("DBG_IO %s:%d rtw_sd_iread8(0x%04x) return 0x%02x %s\n"
+			, caller, line, addr, val, rtw_io_sniff_ent_get_tag(ent));
+	}
 
 	return val;
 }
@@ -650,9 +839,12 @@ u8 dbg_rtw_sd_iread8(_adapter *adapter, u32 addr, const char *caller, const int
 u16 dbg_rtw_sd_iread16(_adapter *adapter, u32 addr, const char *caller, const int line)
 {
 	u16 val = _rtw_sd_iread16(adapter, addr);
+	const struct rtw_io_sniff_ent *ent = match_read_sniff(adapter, addr, 2, val);
 
-	if (match_read_sniff_ranges(addr, 2))
-		RTW_INFO("DBG_IO %s:%d rtw_sd_iread16(0x%04x) return 0x%04x\n", caller, line, addr, val);
+	if (ent) {
+		RTW_INFO("DBG_IO %s:%d rtw_sd_iread16(0x%04x) return 0x%04x %s\n"
+			, caller, line, addr, val, rtw_io_sniff_ent_get_tag(ent));
+	}
 
 	return val;
 }
@@ -660,31 +852,46 @@ u16 dbg_rtw_sd_iread16(_adapter *adapter, u32 addr, const char *caller, const in
 u32 dbg_rtw_sd_iread32(_adapter *adapter, u32 addr, const char *caller, const int line)
 {
 	u32 val = _rtw_sd_iread32(adapter, addr);
+	const struct rtw_io_sniff_ent *ent = match_read_sniff(adapter, addr, 4, val);
 
-	if (match_read_sniff_ranges(addr, 4))
-		RTW_INFO("DBG_IO %s:%d rtw_sd_iread32(0x%04x) return 0x%08x\n", caller, line, addr, val);
+	if (ent) {
+		RTW_INFO("DBG_IO %s:%d rtw_sd_iread32(0x%04x) return 0x%08x %s\n"
+			, caller, line, addr, val, rtw_io_sniff_ent_get_tag(ent));
+	}
 
 	return val;
 }
 
 int dbg_rtw_sd_iwrite8(_adapter *adapter, u32 addr, u8 val, const char *caller, const int line)
 {
-	if (match_write_sniff_ranges(addr, 1))
-		RTW_INFO("DBG_IO %s:%d rtw_sd_iwrite8(0x%04x, 0x%02x)\n", caller, line, addr, val);
+	const struct rtw_io_sniff_ent *ent = match_write_sniff(adapter, addr, 1, val);
+
+	if (ent) {
+		RTW_INFO("DBG_IO %s:%d rtw_sd_iwrite8(0x%04x, 0x%02x) %s\n"
+			, caller, line, addr, val, rtw_io_sniff_ent_get_tag(ent));
+	}
 
 	return _rtw_sd_iwrite8(adapter, addr, val);
 }
 int dbg_rtw_sd_iwrite16(_adapter *adapter, u32 addr, u16 val, const char *caller, const int line)
 {
-	if (match_write_sniff_ranges(addr, 2))
-		RTW_INFO("DBG_IO %s:%d rtw_sd_iwrite16(0x%04x, 0x%04x)\n", caller, line, addr, val);
+	const struct rtw_io_sniff_ent *ent = match_write_sniff(adapter, addr, 2, val);
+
+	if (ent) {
+		RTW_INFO("DBG_IO %s:%d rtw_sd_iwrite16(0x%04x, 0x%04x) %s\n"
+			, caller, line, addr, val, rtw_io_sniff_ent_get_tag(ent));
+	}
 
 	return _rtw_sd_iwrite16(adapter, addr, val);
 }
 int dbg_rtw_sd_iwrite32(_adapter *adapter, u32 addr, u32 val, const char *caller, const int line)
 {
-	if (match_write_sniff_ranges(addr, 4))
-		RTW_INFO("DBG_IO %s:%d rtw_sd_iwrite32(0x%04x, 0x%08x)\n", caller, line, addr, val);
+	const struct rtw_io_sniff_ent *ent = match_write_sniff(adapter, addr, 4, val);
+
+	if (ent) {
+		RTW_INFO("DBG_IO %s:%d rtw_sd_iwrite32(0x%04x, 0x%08x) %s\n"
+			, caller, line, addr, val, rtw_io_sniff_ent_get_tag(ent));
+	}
 
 	return _rtw_sd_iwrite32(adapter, addr, val);
 }
diff --git a/rtl8723DS/core/rtw_ioctl_query.c b/rtl8723DS/core/rtw_ioctl_query.c
index 6f7613e..6f7613e 100755..100644
--- a/rtl8723DS/core/rtw_ioctl_query.c
+++ b/rtl8723DS/core/rtw_ioctl_query.c
diff --git a/rtl8723DS/core/rtw_ioctl_rtl.c b/rtl8723DS/core/rtw_ioctl_rtl.c
index 5d9e76b..5d9e76b 100755..100644
--- a/rtl8723DS/core/rtw_ioctl_rtl.c
+++ b/rtl8723DS/core/rtw_ioctl_rtl.c
diff --git a/rtl8723DS/core/rtw_ioctl_set.c b/rtl8723DS/core/rtw_ioctl_set.c
index 1d92420..d32a014 100755..100644
--- a/rtl8723DS/core/rtw_ioctl_set.c
+++ b/rtl8723DS/core/rtw_ioctl_set.c
@@ -42,7 +42,9 @@ u8 rtw_validate_bssid(u8 *bssid)
 
 u8 rtw_validate_ssid(NDIS_802_11_SSID *ssid)
 {
+#ifdef CONFIG_VALIDATE_SSID
 	u8	 i;
+#endif
 	u8	ret = _TRUE;
 
 
@@ -106,10 +108,17 @@ u8 rtw_do_join(_adapter *padapter)
 		if (pmlmepriv->LinkDetectInfo.bBusyTraffic == _FALSE
 		    || rtw_to_roam(padapter) > 0
 		   ) {
-			/* submit site_survey_cmd */
-			ret = rtw_sitesurvey_cmd(padapter, &parm);
-			if (_SUCCESS != ret) {
+			u8 ssc_chk = rtw_sitesurvey_condition_check(padapter, _FALSE);
+
+			if ((ssc_chk == SS_ALLOW) || (ssc_chk == SS_DENY_BUSY_TRAFFIC) ){
+				/* submit site_survey_cmd */
+				ret = rtw_sitesurvey_cmd(padapter, &parm);
+				if (_SUCCESS != ret)
+					pmlmepriv->to_join = _FALSE;
+			} else {
+				/*if (ssc_chk == SS_DENY_BUDDY_UNDER_SURVEY)*/
 				pmlmepriv->to_join = _FALSE;
+				ret = _FAIL;
 			}
 		} else {
 			pmlmepriv->to_join = _FALSE;
@@ -155,26 +164,22 @@ u8 rtw_do_join(_adapter *padapter)
 				/* can't associate ; reset under-linking			 */
 				_clr_fwstate_(pmlmepriv, _FW_UNDER_LINKING);
 
-#if 0
-				if ((check_fwstate(pmlmepriv, WIFI_STATION_STATE) == _TRUE)) {
-					if (_rtw_memcmp(pmlmepriv->cur_network.network.Ssid.Ssid, pmlmepriv->assoc_ssid.Ssid, pmlmepriv->assoc_ssid.SsidLength)) {
-						/* for funk to do roaming */
-						/* funk will reconnect, but funk will not sitesurvey before reconnect */
-						if (pmlmepriv->sitesurveyctrl.traffic_busy == _FALSE)
-							rtw_sitesurvey_cmd(padapter, &parm);
-					}
-
-				}
-#endif
-
 				/* when set_ssid/set_bssid for rtw_do_join(), but there are no desired bss in scanning queue */
 				/* we try to issue sitesurvey firstly			 */
 				if (pmlmepriv->LinkDetectInfo.bBusyTraffic == _FALSE
 				    || rtw_to_roam(padapter) > 0
 				   ) {
-					/* RTW_INFO("rtw_do_join() when   no desired bss in scanning queue\n"); */
-					ret = rtw_sitesurvey_cmd(padapter, &parm);
-					if (_SUCCESS != ret) {
+					u8 ssc_chk = rtw_sitesurvey_condition_check(padapter, _FALSE);
+
+					if ((ssc_chk == SS_ALLOW) || (ssc_chk == SS_DENY_BUSY_TRAFFIC)){
+						/* RTW_INFO(("rtw_do_join() when   no desired bss in scanning queue\n"); */
+						ret = rtw_sitesurvey_cmd(padapter, &parm);
+						if (_SUCCESS != ret)
+							pmlmepriv->to_join = _FALSE;
+					} else {
+						/*if (ssc_chk == SS_DENY_BUDDY_UNDER_SURVEY) {
+						} else {*/
+						ret = _FAIL;
 						pmlmepriv->to_join = _FALSE;
 					}
 				} else {
@@ -307,7 +312,7 @@ u8 rtw_set_802_11_bssid(_adapter *padapter, u8 *bssid)
 			if (check_fwstate(pmlmepriv, _FW_LINKED) == _TRUE)
 				rtw_indicate_disconnect(padapter, 0, _FALSE);
 
-			rtw_free_assoc_resources(padapter, 1);
+			rtw_free_assoc_resources_cmd(padapter, _TRUE, 0);
 
 			if ((check_fwstate(pmlmepriv, WIFI_ADHOC_MASTER_STATE) == _TRUE)) {
 				_clr_fwstate_(pmlmepriv, WIFI_ADHOC_MASTER_STATE);
@@ -344,7 +349,6 @@ u8 rtw_set_802_11_ssid(_adapter *padapter, NDIS_802_11_SSID *ssid)
 {
 	_irqL irqL;
 	u8 status = _SUCCESS;
-	u32 cur_time = 0;
 
 	struct mlme_priv *pmlmepriv = &padapter->mlmepriv;
 	struct wlan_network *pnetwork = &pmlmepriv->cur_network;
@@ -379,7 +383,7 @@ u8 rtw_set_802_11_ssid(_adapter *padapter, NDIS_802_11_SSID *ssid)
 					if (check_fwstate(pmlmepriv, _FW_LINKED) == _TRUE)
 						rtw_indicate_disconnect(padapter, 0, _FALSE);
 
-					rtw_free_assoc_resources(padapter, 1);
+					rtw_free_assoc_resources_cmd(padapter, _TRUE, 0);
 
 					if (check_fwstate(pmlmepriv, WIFI_ADHOC_MASTER_STATE) == _TRUE) {
 						_clr_fwstate_(pmlmepriv, WIFI_ADHOC_MASTER_STATE);
@@ -400,7 +404,7 @@ u8 rtw_set_802_11_ssid(_adapter *padapter, NDIS_802_11_SSID *ssid)
 			if (check_fwstate(pmlmepriv, _FW_LINKED) == _TRUE)
 				rtw_indicate_disconnect(padapter, 0, _FALSE);
 
-			rtw_free_assoc_resources(padapter, 1);
+			rtw_free_assoc_resources_cmd(padapter, _TRUE, 0);
 
 			if (check_fwstate(pmlmepriv, WIFI_ADHOC_MASTER_STATE) == _TRUE) {
 				_clr_fwstate_(pmlmepriv, WIFI_ADHOC_MASTER_STATE);
@@ -442,7 +446,6 @@ u8 rtw_set_802_11_connect(_adapter *padapter, u8 *bssid, NDIS_802_11_SSID *ssid)
 {
 	_irqL irqL;
 	u8 status = _SUCCESS;
-	u32 cur_time = 0;
 	bool bssid_valid = _TRUE;
 	bool ssid_valid = _TRUE;
 	struct mlme_priv *pmlmepriv = &padapter->mlmepriv;
@@ -520,8 +523,10 @@ u8 rtw_set_802_11_infrastructure_mode(_adapter *padapter,
 	if (*pold_state != networktype) {
 		/* RTW_INFO("change mode, old_mode=%d, new_mode=%d, fw_state=0x%x\n", *pold_state, networktype, get_fwstate(pmlmepriv)); */
 
-		if (*pold_state == Ndis802_11APMode) {
-			/* change to other mode from Ndis802_11APMode			 */
+		if (*pold_state == Ndis802_11APMode
+			|| *pold_state == Ndis802_11_mesh
+		) {
+			/* change to other mode from Ndis802_11APMode/Ndis802_11_mesh */
 			cur_network->join_res = -1;
 			ap2sta_mode = _TRUE;
 #ifdef CONFIG_NATIVEAP_MLME
@@ -536,7 +541,7 @@ u8 rtw_set_802_11_infrastructure_mode(_adapter *padapter,
 
 		if ((check_fwstate(pmlmepriv, _FW_LINKED) == _TRUE) ||
 		    (check_fwstate(pmlmepriv, WIFI_ADHOC_MASTER_STATE) == _TRUE))
-			rtw_free_assoc_resources(padapter, 1);
+			rtw_free_assoc_resources_cmd(padapter, _TRUE, 0);
 
 		if ((*pold_state == Ndis802_11Infrastructure) || (*pold_state == Ndis802_11IBSS)) {
 			if (check_fwstate(pmlmepriv, _FW_LINKED) == _TRUE) {
@@ -569,6 +574,13 @@ u8 rtw_set_802_11_infrastructure_mode(_adapter *padapter,
 
 			break;
 
+#ifdef CONFIG_RTW_MESH
+		case Ndis802_11_mesh:
+			set_fwstate(pmlmepriv, WIFI_MESH_STATE);
+			start_ap_mode(padapter);
+			break;
+#endif
+
 		case Ndis802_11AutoUnknown:
 		case Ndis802_11InfrastructureMax:
 			break;
@@ -603,7 +615,7 @@ u8 rtw_set_802_11_disassociate(_adapter *padapter)
 		rtw_disassoc_cmd(padapter, 0, 0);
 		rtw_indicate_disconnect(padapter, 0, _FALSE);
 		/* modify for CONFIG_IEEE80211W, none 11w can use it */
-		rtw_free_assoc_resources_cmd(padapter);
+		rtw_free_assoc_resources_cmd(padapter, _TRUE, 0);
 		if (_FAIL == rtw_pwr_wakeup(padapter))
 			RTW_INFO("%s(): rtw_pwr_wakeup fail !!!\n", __FUNCTION__);
 	}
@@ -759,10 +771,13 @@ exit:
 */
 u16 rtw_get_cur_max_rate(_adapter *adapter)
 {
+	int j;
 	int	i = 0;
 	u16	rate = 0, max_rate = 0;
 	struct mlme_priv	*pmlmepriv = &adapter->mlmepriv;
 	WLAN_BSSID_EX	*pcur_bss = &pmlmepriv->cur_network.network;
+	int	sta_bssrate_len = 0;
+	unsigned char	sta_bssrate[NumRates];
 	struct sta_info *psta = NULL;
 	u8	short_GI = 0;
 #ifdef CONFIG_80211N_HT
@@ -802,16 +817,38 @@ u16 rtw_get_cur_max_rate(_adapter *adapter)
 	else
 #endif /* CONFIG_80211N_HT */
 	{
+		/*station mode show :station && ap support rate; softap :show ap support rate*/	
+		if (check_fwstate(pmlmepriv, WIFI_STATION_STATE) == _TRUE)
+			get_rate_set(adapter, sta_bssrate, &sta_bssrate_len);/*get sta rate and length*/
+
+
 		while ((pcur_bss->SupportedRates[i] != 0) && (pcur_bss->SupportedRates[i] != 0xFF)) {
-			rate = pcur_bss->SupportedRates[i] & 0x7F;
-			if (rate > max_rate)
-				max_rate = rate;
+			rate = pcur_bss->SupportedRates[i] & 0x7F;/*AP support rates*/
+			/*RTW_INFO("%s rate=%02X \n", __func__, rate);*/
+
+			/*check STA  support rate or not */
+			if (check_fwstate(pmlmepriv, WIFI_STATION_STATE) == _TRUE) {
+				for (j = 0; j < sta_bssrate_len; j++) {
+					/* Avoid the proprietary data rate (22Mbps) of Handlink WSG-4000 AP */
+					if ((rate | IEEE80211_BASIC_RATE_MASK)
+					    == (sta_bssrate[j] | IEEE80211_BASIC_RATE_MASK)) {
+						if (rate > max_rate) {
+							max_rate = rate;
+						}
+						break;
+					}
+				}
+			} else {
+			
+				if (rate > max_rate)
+					max_rate = rate;
+
+			}
 			i++;
 		}
 
 		max_rate = max_rate * 10 / 2;
 	}
-
 	return max_rate;
 }
 
@@ -841,9 +878,6 @@ int rtw_set_scan_mode(_adapter *adapter, RT_SCAN_TYPE scan_mode)
 */
 int rtw_set_channel_plan(_adapter *adapter, u8 channel_plan)
 {
-	struct registry_priv *pregistrypriv = &adapter->registrypriv;
-	struct mlme_priv *pmlmepriv = &adapter->mlmepriv;
-
 	/* handle by cmd_thread to sync with scan operation */
 	return rtw_set_chplan_cmd(adapter, RTW_CMDF_WAIT_ACK, channel_plan, 1);
 }
diff --git a/rtl8723DS/core/rtw_iol.c b/rtl8723DS/core/rtw_iol.c
index aafac3f..643ec6c 100755..100644
--- a/rtl8723DS/core/rtw_iol.c
+++ b/rtl8723DS/core/rtw_iol.c
@@ -301,24 +301,36 @@ int _rtw_IOL_append_WD_cmd(struct xmit_frame *xmit_frame, u16 addr, u32 value)
 #ifdef DBG_IO
 int dbg_rtw_IOL_append_WB_cmd(struct xmit_frame *xmit_frame, u16 addr, u8 value, const char *caller, const int line)
 {
-	if (match_write_sniff_ranges(addr, 1))
-		RTW_INFO("DBG_IO %s:%d IOL_WB(0x%04x, 0x%02x)\n", caller, line, addr, value);
+	const struct rtw_io_sniff_ent *ent = match_write_sniff(xmit_frame->padapter, addr, 1, value);
+
+	if (ent) {
+		RTW_INFO("DBG_IO %s:%d IOL_WB(0x%04x, 0x%02x) %s\n"
+			, caller, line, addr, value, rtw_io_sniff_ent_get_tag(ent));
+	}
 
 	return _rtw_IOL_append_WB_cmd(xmit_frame, addr, value);
 }
 
 int dbg_rtw_IOL_append_WW_cmd(struct xmit_frame *xmit_frame, u16 addr, u16 value, const char *caller, const int line)
 {
-	if (match_write_sniff_ranges(addr, 2))
-		RTW_INFO("DBG_IO %s:%d IOL_WW(0x%04x, 0x%04x)\n", caller, line, addr, value);
+	const struct rtw_io_sniff_ent *ent = match_write_sniff(xmit_frame->padapter, addr, 2, value);
+
+	if (ent) {
+		RTW_INFO("DBG_IO %s:%d IOL_WW(0x%04x, 0x%04x) %s\n"
+			, caller, line, addr, value, rtw_io_sniff_ent_get_tag(ent));
+	}
 
 	return _rtw_IOL_append_WW_cmd(xmit_frame, addr, value);
 }
 
 int dbg_rtw_IOL_append_WD_cmd(struct xmit_frame *xmit_frame, u16 addr, u32 value, const char *caller, const int line)
 {
-	if (match_write_sniff_ranges(addr, 4))
-		RTW_INFO("DBG_IO %s:%d IOL_WD(0x%04x, 0x%08x)\n", caller, line, addr, value);
+	const struct rtw_io_sniff_ent *ent = match_write_sniff(xmit_frame->padapter, addr, 4, value);
+
+	if (ent) {
+		RTW_INFO("DBG_IO %s:%d IOL_WD(0x%04x, 0x%08x) %s\n"
+			, caller, line, addr, value, rtw_io_sniff_ent_get_tag(ent));
+	}
 
 	return _rtw_IOL_append_WD_cmd(xmit_frame, addr, value);
 }
diff --git a/rtl8723DS/core/rtw_mem.c b/rtl8723DS/core/rtw_mem.c
index d9f5652..d9f5652 100755..100644
--- a/rtl8723DS/core/rtw_mem.c
+++ b/rtl8723DS/core/rtw_mem.c
diff --git a/rtl8723DS/core/rtw_mi.c b/rtl8723DS/core/rtw_mi.c
index a41c276..2a9adde 100755..100644
--- a/rtl8723DS/core/rtw_mi.c
+++ b/rtl8723DS/core/rtw_mi.c
@@ -27,6 +27,7 @@ void rtw_mi_update_union_chan_inf(_adapter *adapter, u8 ch, u8 offset , u8 bw)
 	iface_state->union_offset = offset;
 }
 
+#ifdef DBG_IFACE_STATUS
 #ifdef CONFIG_P2P
 static u8 _rtw_mi_p2p_listen_scan_chk(_adapter *adapter)
 {
@@ -46,6 +47,8 @@ static u8 _rtw_mi_p2p_listen_scan_chk(_adapter *adapter)
 	return p2p_listen_scan_state;
 }
 #endif
+#endif
+
 u8 rtw_mi_stayin_union_ch_chk(_adapter *adapter)
 {
 	u8 rst = _TRUE;
@@ -104,9 +107,8 @@ u8 rtw_mi_stayin_union_band_chk(_adapter *adapter)
 }
 
 /* Find union about ch, bw, ch_offset of all linked/linking interfaces */
-int _rtw_mi_get_ch_setting_union(_adapter *adapter, u8 *ch, u8 *bw, u8 *offset, bool include_self)
+int rtw_mi_get_ch_setting_union_by_ifbmp(struct dvobj_priv *dvobj, u8 ifbmp, u8 *ch, u8 *bw, u8 *offset)
 {
-	struct dvobj_priv *dvobj = adapter_to_dvobj(adapter);
 	_adapter *iface;
 	struct mlme_ext_priv *mlmeext;
 	int i;
@@ -124,6 +126,9 @@ int _rtw_mi_get_ch_setting_union(_adapter *adapter, u8 *ch, u8 *bw, u8 *offset,
 
 	for (i = 0; i < dvobj->iface_nums; i++) {
 		iface = dvobj->padapters[i];
+		if (!iface || !(ifbmp & BIT(iface->iface_id)))
+			continue;
+
 		mlmeext = &iface->mlmeextpriv;
 
 		if (!check_fwstate(&iface->mlmepriv, _FW_LINKED | _FW_UNDER_LINKING))
@@ -132,9 +137,6 @@ int _rtw_mi_get_ch_setting_union(_adapter *adapter, u8 *ch, u8 *bw, u8 *offset,
 		if (check_fwstate(&iface->mlmepriv, WIFI_OP_CH_SWITCHING))
 			continue;
 
-		if (include_self == _FALSE && adapter == iface)
-			continue;
-
 		if (num == 0) {
 			ch_ret = mlmeext->cur_channel;
 			bw_ret = mlmeext->cur_bwmode;
@@ -173,22 +175,17 @@ int _rtw_mi_get_ch_setting_union(_adapter *adapter, u8 *ch, u8 *bw, u8 *offset,
 
 inline int rtw_mi_get_ch_setting_union(_adapter *adapter, u8 *ch, u8 *bw, u8 *offset)
 {
-	return _rtw_mi_get_ch_setting_union(adapter, ch, bw, offset, 1);
+	return rtw_mi_get_ch_setting_union_by_ifbmp(adapter_to_dvobj(adapter), 0xFF, ch, bw, offset);
 }
 
 inline int rtw_mi_get_ch_setting_union_no_self(_adapter *adapter, u8 *ch, u8 *bw, u8 *offset)
 {
-	return _rtw_mi_get_ch_setting_union(adapter, ch, bw, offset, 0);
+	return rtw_mi_get_ch_setting_union_by_ifbmp(adapter_to_dvobj(adapter), 0xFF & ~BIT(adapter->iface_id), ch, bw, offset);
 }
 
-#define MI_STATUS_SELF_ONLY		0
-#define MI_STATUS_OTHERS_ONLY	1
-#define MI_STATUS_ALL			2
-
 /* For now, not return union_ch/bw/offset */
-void _rtw_mi_status(_adapter *adapter, struct mi_state *mstate, u8 target_sel)
+void rtw_mi_status_by_ifbmp(struct dvobj_priv *dvobj, u8 ifbmp, struct mi_state *mstate)
 {
-	struct dvobj_priv *dvobj = adapter_to_dvobj(adapter);
 	_adapter *iface;
 	int i;
 
@@ -196,10 +193,7 @@ void _rtw_mi_status(_adapter *adapter, struct mi_state *mstate, u8 target_sel)
 
 	for (i = 0; i < dvobj->iface_nums; i++) {
 		iface = dvobj->padapters[i];
-
-		if (target_sel == MI_STATUS_SELF_ONLY && iface != adapter)
-			continue;
-		if (target_sel == MI_STATUS_OTHERS_ONLY && iface == adapter)
+		if (!iface || !(ifbmp & BIT(iface->iface_id)))
 			continue;
 
 		if (check_fwstate(&iface->mlmepriv, WIFI_STATION_STATE) == _TRUE) {
@@ -211,6 +205,10 @@ void _rtw_mi_status(_adapter *adapter, struct mi_state *mstate, u8 target_sel)
 				if (iface->tdlsinfo.link_established == _TRUE)
 					MSTATE_TDLS_LD_NUM(mstate)++;
 				#endif
+				#ifdef CONFIG_P2P
+				if (MLME_IS_GC(iface))
+					MSTATE_P2P_GC_NUM(mstate)++;
+				#endif
 			}
 			if (check_fwstate(&iface->mlmepriv, _FW_UNDER_LINKING) == _TRUE)
 				MSTATE_STA_LG_NUM(mstate)++;
@@ -221,6 +219,10 @@ void _rtw_mi_status(_adapter *adapter, struct mi_state *mstate, u8 target_sel)
 				MSTATE_AP_NUM(mstate)++;
 				if (iface->stapriv.asoc_sta_count > 2)
 					MSTATE_AP_LD_NUM(mstate)++;
+				#ifdef CONFIG_P2P
+				if (MLME_IS_GO(iface))
+					MSTATE_P2P_GO_NUM(mstate)++;
+				#endif
 			} else
 				MSTATE_AP_STARTING_NUM(mstate)++;
 #endif
@@ -262,23 +264,26 @@ void _rtw_mi_status(_adapter *adapter, struct mi_state *mstate, u8 target_sel)
 			MSTATE_ROCH_NUM(mstate)++;
 		#endif
 #endif /* CONFIG_IOCTL_CFG80211 */
-
+#ifdef CONFIG_P2P
+		if (MLME_IS_PD(iface))
+			MSTATE_P2P_DV_NUM(mstate)++;
+#endif
 	}
 }
 
 inline void rtw_mi_status(_adapter *adapter, struct mi_state *mstate)
 {
-	return _rtw_mi_status(adapter, mstate, MI_STATUS_ALL);
+	return rtw_mi_status_by_ifbmp(adapter_to_dvobj(adapter), 0xFF, mstate);
 }
 
 inline void rtw_mi_status_no_self(_adapter *adapter, struct mi_state *mstate)
 {
-	return _rtw_mi_status(adapter, mstate, MI_STATUS_OTHERS_ONLY);
+	return rtw_mi_status_by_ifbmp(adapter_to_dvobj(adapter), 0xFF & ~BIT(adapter->iface_id), mstate);
 }
 
 inline void rtw_mi_status_no_others(_adapter *adapter, struct mi_state *mstate)
 {
-	return _rtw_mi_status(adapter, mstate, MI_STATUS_SELF_ONLY);
+	return rtw_mi_status_by_ifbmp(adapter_to_dvobj(adapter), BIT(adapter->iface_id), mstate);
 }
 
 /* For now, not handle union_ch/bw/offset */
@@ -332,7 +337,9 @@ void dump_mi_status(void *sel, struct dvobj_priv *dvobj)
 	RTW_PRINT_SEL(sel, "linked_mesh_num:%d\n", DEV_MESH_LD_NUM(dvobj));
 #endif
 #ifdef CONFIG_P2P
-	RTW_PRINT_SEL(sel, "p2p_device_num:%d\n", rtw_mi_stay_in_p2p_mode(dvobj->padapters[IFACE_ID0]));
+	RTW_PRINT_SEL(sel, "p2p_device_num:%d\n", DEV_P2P_DV_NUM(dvobj));
+	RTW_PRINT_SEL(sel, "p2p_gc_num:%d\n", DEV_P2P_GC_NUM(dvobj));
+	RTW_PRINT_SEL(sel, "p2p_go_num:%d\n", DEV_P2P_GO_NUM(dvobj));
 #endif
 	RTW_PRINT_SEL(sel, "scan_num:%d\n", DEV_SCAN_NUM(dvobj));
 	RTW_PRINT_SEL(sel, "under_wps_num:%d\n", DEV_WPS_NUM(dvobj));
@@ -360,9 +367,7 @@ inline void rtw_mi_update_iface_status(struct mlme_priv *pmlmepriv, sint state)
 	struct dvobj_priv *dvobj = adapter_to_dvobj(adapter);
 	struct mi_state *iface_state = &dvobj->iface_state;
 	struct mi_state tmp_mstate;
-	u8 i;
 	u8 u_ch, u_offset, u_bw;
-	_adapter *iface;
 
 	if (state == WIFI_MONITOR_STATE
 		|| state == 0xFFFFFFFF
@@ -748,6 +753,30 @@ void rtw_mi_buddy_intf_stop(_adapter *adapter)
 	_rtw_mi_process(adapter, _TRUE, NULL, _rtw_mi_intf_stop);
 }
 
+#ifdef CONFIG_NEW_NETDEV_HDL
+static u8 _rtw_mi_hal_iface_init(_adapter *padapter, void *data)
+{
+	if (rtw_hal_iface_init(padapter) == _SUCCESS)
+		return _TRUE;
+	return _FALSE;
+}
+u8 rtw_mi_hal_iface_init(_adapter *padapter)
+{
+	int i;
+	_adapter *iface;
+	struct dvobj_priv *dvobj = adapter_to_dvobj(padapter);
+
+	u8 ret = _TRUE;
+
+	for (i = 0; i < dvobj->iface_nums; i++) {
+		iface = dvobj->padapters[i];
+		if (iface && iface->netif_up)
+			rtw_hal_iface_init(padapter);
+	}
+	return ret;
+}
+#endif
+
 static u8 _rtw_mi_suspend_free_assoc_resource(_adapter *padapter, void *data)
 {
 	return rtw_suspend_free_assoc_resource(padapter);
@@ -864,7 +893,6 @@ u8 _rtw_mi_busy_traffic_check(_adapter *padapter, void *data)
 		if (check_sc_interval) {
 			/* Miracast can't do AP scan*/
 			passtime = rtw_get_passing_time_ms(pmlmepriv->lastscantime);
-			pmlmepriv->lastscantime = rtw_get_current_time();
 			if (passtime > BUSY_TRAFFIC_SCAN_DENY_PERIOD) {
 				RTW_INFO(ADPT_FMT" bBusyTraffic == _TRUE\n", ADPT_ARG(padapter));
 				return _TRUE;
@@ -1089,20 +1117,6 @@ u8 rtw_mi_buddy_dynamic_check_timer_handlder(_adapter *padapter)
 	return _rtw_mi_process(padapter, _TRUE, NULL, _rtw_mi_dynamic_check_timer_handlder);
 }
 
-static u8 _rtw_mi_dev_unload(_adapter *adapter, void *data)
-{
-	rtw_dev_unload(adapter);
-	return _TRUE;
-}
-u8 rtw_mi_dev_unload(_adapter *padapter)
-{
-	return _rtw_mi_process(padapter, _FALSE, NULL, _rtw_mi_dev_unload);
-}
-u8 rtw_mi_buddy_dev_unload(_adapter *padapter)
-{
-	return _rtw_mi_process(padapter, _TRUE, NULL, _rtw_mi_dev_unload);
-}
-
 static u8 _rtw_mi_dynamic_chk_wk_hdl(_adapter *adapter, void *data)
 {
 	rtw_iface_dynamic_chk_wk_hdl(adapter);
@@ -1163,6 +1177,29 @@ u8 rtw_mi_sreset_adapter_hdl(_adapter *padapter, u8 bstart)
 
 	return _rtw_mi_process(padapter, _FALSE, &in_data, _rtw_mi_sreset_adapter_hdl);
 }
+
+#if defined(DBG_CONFIG_ERROR_RESET) && defined(CONFIG_CONCURRENT_MODE)
+void rtw_mi_ap_info_restore(_adapter *adapter)
+{
+	int i;
+	_adapter *iface;
+	struct mlme_priv *pmlmepriv;
+	struct dvobj_priv *dvobj = adapter_to_dvobj(adapter);
+
+	for (i = 0; i < dvobj->iface_nums; i++) {
+		iface = dvobj->padapters[i];
+		if (iface) {
+			pmlmepriv = &iface->mlmepriv;
+
+			if (MLME_IS_AP(iface) || MLME_IS_MESH(iface)) {
+				RTW_INFO(FUNC_ADPT_FMT" %s\n", FUNC_ADPT_ARG(iface), MLME_IS_AP(iface) ? "AP" : "MESH");
+				rtw_iface_bcmc_sec_cam_map_restore(iface);
+			}
+		}
+	}
+}
+#endif /*#if defined(DBG_CONFIG_ERROR_RESET) && defined(CONFIG_CONCURRENT_MODE)*/
+
 u8 rtw_mi_buddy_sreset_adapter_hdl(_adapter *padapter, u8 bstart)
 {
 	u8 in_data = bstart;
@@ -1176,7 +1213,7 @@ static u8 _rtw_mi_tx_beacon_hdl(_adapter *adapter, void *data)
 	) {
 		adapter->mlmepriv.update_bcn = _TRUE;
 #ifndef CONFIG_INTERRUPT_BASED_TXBCN
-#if defined(CONFIG_USB_HCI) || defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI)
+#if defined(CONFIG_USB_HCI) || defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI) || defined(CONFIG_PCI_BCN_POLLING)
 		tx_beacon_hdl(adapter, NULL);
 #endif
 #endif
@@ -1262,7 +1299,7 @@ _adapter *rtw_get_iface_by_id(_adapter *padapter, u8 iface_id)
 	return  dvobj->padapters[iface_id];
 }
 
-_adapter *rtw_get_iface_by_macddr(_adapter *padapter, u8 *mac_addr)
+_adapter *rtw_get_iface_by_macddr(_adapter *padapter, const u8 *mac_addr)
 {
 	int i;
 	_adapter *iface = NULL;
@@ -1354,9 +1391,10 @@ void rtw_dbg_skb_process(_adapter *padapter, union recv_frame *precvframe, union
 static s32 _rtw_mi_buddy_clone_bcmc_packet(_adapter *adapter, union recv_frame *precvframe, u8 *pphy_status, union recv_frame *pcloneframe)
 {
 	s32 ret = _SUCCESS;
+#ifdef CONFIG_SKB_ALLOCATED
 	u8 *pbuf = precvframe->u.hdr.rx_data;
+#endif
 	struct rx_pkt_attrib *pattrib = NULL;
-	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(adapter);
 
 	if (pcloneframe) {
 		pcloneframe->u.hdr.adapter = adapter;
@@ -1451,6 +1489,45 @@ _adapter *rtw_mi_get_ap_adapter(_adapter *padapter)
 }
 #endif
 
+u8 rtw_mi_get_ld_sta_ifbmp(_adapter *adapter)
+{
+	struct dvobj_priv *dvobj = adapter_to_dvobj(adapter);
+	int i;
+	_adapter *iface = NULL;
+	u8 ifbmp = 0;
+
+	for (i = 0; i < dvobj->iface_nums; i++) {
+		iface = dvobj->padapters[i];
+		if (!iface)
+			continue;
+
+		if (MLME_IS_STA(iface) && MLME_IS_ASOC(iface))
+			ifbmp |= BIT(i);
+	}
+
+	return ifbmp;
+}
+
+u8 rtw_mi_get_ap_mesh_ifbmp(_adapter *adapter)
+{
+	struct dvobj_priv *dvobj = adapter_to_dvobj(adapter);
+	int i;
+	_adapter *iface = NULL;
+	u8 ifbmp = 0;
+
+	for (i = 0; i < dvobj->iface_nums; i++) {
+		iface = dvobj->padapters[i];
+		if (!iface)
+			continue;
+
+		if (CHK_MLME_STATE(iface, WIFI_AP_STATE | WIFI_MESH_STATE)
+			&& MLME_IS_ASOC(iface))
+			ifbmp |= BIT(i);
+	}
+
+	return ifbmp;
+}
+
 void rtw_mi_update_ap_bmc_camid(_adapter *padapter, u8 camid_a, u8 camid_b)
 {
 #ifdef CONFIG_CONCURRENT_MODE
@@ -1476,3 +1553,19 @@ void rtw_mi_update_ap_bmc_camid(_adapter *padapter, u8 camid_a, u8 camid_b)
 #endif
 }
 
+u8 rtw_mi_get_assoc_if_num(_adapter *adapter)
+{
+	struct dvobj_priv *dvobj = adapter_to_dvobj(adapter);
+	u8 n_assoc_iface = 0;
+#if 1
+	u8 i;
+
+	for (i = 0; i < dvobj->iface_nums; i++) {
+		if (check_fwstate(&(dvobj->padapters[i]->mlmepriv), WIFI_ASOC_STATE))
+			n_assoc_iface++;
+	}
+#else
+	n_assoc_iface = DEV_STA_LD_NUM(dvobj) + DEV_AP_NUM(dvobj) + DEV_ADHOC_NUM(dvobj) + DEV_MESH_NUM(dvobj);
+#endif
+	return n_assoc_iface;
+}
diff --git a/rtl8723DS/core/rtw_mlme.c b/rtl8723DS/core/rtw_mlme.c
index a744d07..ca7ca56 100755..100644
--- a/rtl8723DS/core/rtw_mlme.c
+++ b/rtl8723DS/core/rtw_mlme.c
@@ -27,10 +27,6 @@ void rtw_init_mlme_timer(_adapter *padapter)
 	rtw_init_timer(&(pmlmepriv->assoc_timer), padapter, rtw_join_timeout_handler, padapter);
 	rtw_init_timer(&(pmlmepriv->scan_to_timer), padapter, rtw_scan_timeout_handler, padapter);
 
-#ifdef CONFIG_DFS_MASTER
-	rtw_init_timer(&(pmlmepriv->dfs_master_timer), padapter, rtw_dfs_master_timer_hdl, padapter);
-#endif
-
 #ifdef CONFIG_SET_SCAN_DENY_TIMER
 	rtw_init_timer(&(pmlmepriv->set_scan_deny_timer), padapter, rtw_set_scan_deny_timer_hdl, padapter);
 #endif
@@ -47,6 +43,7 @@ sint	_rtw_init_mlme_priv(_adapter *padapter)
 	u8	*pbuf;
 	struct wlan_network	*pnetwork;
 	struct mlme_priv		*pmlmepriv = &padapter->mlmepriv;
+	struct rf_ctl_t *rfctl = adapter_to_rfctl(padapter);
 	sint	res = _SUCCESS;
 
 
@@ -65,11 +62,7 @@ sint	_rtw_init_mlme_priv(_adapter *padapter)
 	pmlmepriv->nic_hdl = (u8 *)padapter;
 
 	pmlmepriv->pscanned = NULL;
-	/*pmlmepriv->fw_state = WIFI_STATION_STATE; */ /*Must sync with rtw_wdev_alloc()*/
-	/*init_fwstate(pmlmepriv, WIFI_STATION_STATE);*/
-	init_fwstate(pmlmepriv, WIFI_NULL_STATE);/*assigned interface role(STA/AP) must after execute set_opmode*/
-
-	/* wdev->iftype = NL80211_IFTYPE_STATION*/
+	init_fwstate(pmlmepriv, WIFI_STATION_STATE);
 	pmlmepriv->cur_network.network.InfrastructureMode = Ndis802_11AutoUnknown;
 	pmlmepriv->scan_mode = SCAN_ACTIVE; /* 1: active, 0: pasive. Maybe someday we should rename this varable to "active_mode" (Jeff) */
 
@@ -81,7 +74,15 @@ sint	_rtw_init_mlme_priv(_adapter *padapter)
 
 	_rtw_memset(&pmlmepriv->assoc_ssid, 0, sizeof(NDIS_802_11_SSID));
 
-	pbuf = rtw_zvmalloc(MAX_BSS_CNT * (sizeof(struct wlan_network)));
+	if (padapter->registrypriv.max_bss_cnt != 0)
+		pmlmepriv->max_bss_cnt = padapter->registrypriv.max_bss_cnt;
+	else if (rfctl->max_chan_nums <= MAX_CHANNEL_NUM_2G)
+		pmlmepriv->max_bss_cnt = MAX_BSS_CNT;
+	else
+		pmlmepriv->max_bss_cnt = MAX_BSS_CNT + MAX_BSS_CNT;
+
+
+	pbuf = rtw_zvmalloc(pmlmepriv->max_bss_cnt * (sizeof(struct wlan_network)));
 
 	if (pbuf == NULL) {
 		res = _FAIL;
@@ -91,7 +92,7 @@ sint	_rtw_init_mlme_priv(_adapter *padapter)
 
 	pnetwork = (struct wlan_network *)pbuf;
 
-	for (i = 0; i < MAX_BSS_CNT; i++) {
+	for (i = 0; i < pmlmepriv->max_bss_cnt; i++) {
 		_rtw_init_listhead(&(pnetwork->list));
 
 		rtw_list_insert_tail(&(pnetwork->list), &(pmlmepriv->free_bss_pool.queue));
@@ -110,7 +111,7 @@ sint	_rtw_init_mlme_priv(_adapter *padapter)
 #ifdef CONFIG_LAYER2_ROAMING
 #define RTW_ROAM_SCAN_RESULT_EXP_MS (5*1000)
 #define RTW_ROAM_RSSI_DIFF_TH 10
-#define RTW_ROAM_SCAN_INTERVAL_MS (10*1000)
+#define RTW_ROAM_SCAN_INTERVAL (5)    /* 5*(2 second)*/
 #define RTW_ROAM_RSSI_THRESHOLD 70
 
 	pmlmepriv->roam_flags = 0
@@ -125,9 +126,10 @@ sint	_rtw_init_mlme_priv(_adapter *padapter)
 
 	pmlmepriv->roam_scanr_exp_ms = RTW_ROAM_SCAN_RESULT_EXP_MS;
 	pmlmepriv->roam_rssi_diff_th = RTW_ROAM_RSSI_DIFF_TH;
-	pmlmepriv->roam_scan_int_ms = RTW_ROAM_SCAN_INTERVAL_MS;
+	pmlmepriv->roam_scan_int 	 = RTW_ROAM_SCAN_INTERVAL;
 	pmlmepriv->roam_rssi_threshold = RTW_ROAM_RSSI_THRESHOLD;
 	pmlmepriv->need_to_roam = _FALSE;
+	pmlmepriv->last_roaming = rtw_get_current_time();
 #endif /* CONFIG_LAYER2_ROAMING */
 
 #ifdef CONFIG_RTW_80211R
@@ -295,6 +297,7 @@ exit:
 
 void _rtw_free_mlme_priv(struct mlme_priv *pmlmepriv)
 {
+	_adapter *adapter = mlme_to_adapter(pmlmepriv);
 	if (NULL == pmlmepriv) {
 		rtw_warn_on(1);
 		goto exit;
@@ -305,7 +308,7 @@ void _rtw_free_mlme_priv(struct mlme_priv *pmlmepriv)
 		rtw_mfree_mlme_priv_lock(pmlmepriv);
 
 		if (pmlmepriv->free_bss_buf)
-			rtw_vmfree(pmlmepriv->free_bss_buf, MAX_BSS_CNT * sizeof(struct wlan_network));
+			rtw_vmfree(pmlmepriv->free_bss_buf, pmlmepriv->max_bss_cnt * sizeof(struct wlan_network));
 	}
 exit:
 	return;
@@ -382,6 +385,11 @@ struct	wlan_network *_rtw_alloc_network(struct	mlme_priv *pmlmepriv) /* (_queue
 	pnetwork->network_type = 0;
 	pnetwork->fixed = _FALSE;
 	pnetwork->last_scanned = rtw_get_current_time();
+#if defined(CONFIG_RTW_MESH) && CONFIG_RTW_MESH_ACNODE_PREVENT
+	pnetwork->acnode_stime = 0;
+	pnetwork->acnode_notify_etime = 0;
+#endif
+
 	pnetwork->aid = 0;
 	pnetwork->join_res = 0;
 
@@ -461,53 +469,6 @@ exit:
 	return;
 }
 
-
-/*
-	return the wlan_network with the matching addr
-
-	Shall be calle under atomic context... to avoid possible racing condition...
-*/
-struct wlan_network *_rtw_find_network(_queue *scanned_queue, u8 *addr)
-{
-
-	/* _irqL irqL; */
-	_list	*phead, *plist;
-	struct	wlan_network *pnetwork = NULL;
-	u8 zero_addr[ETH_ALEN] = {0, 0, 0, 0, 0, 0};
-
-
-	if (_rtw_memcmp(zero_addr, addr, ETH_ALEN)) {
-		pnetwork = NULL;
-		goto exit;
-	}
-
-	/* _enter_critical_bh(&scanned_queue->lock, &irqL); */
-
-	phead = get_list_head(scanned_queue);
-	plist = get_next(phead);
-
-	while (plist != phead) {
-		pnetwork = LIST_CONTAINOR(plist, struct wlan_network , list);
-
-		if (_rtw_memcmp(addr, pnetwork->network.MacAddress, ETH_ALEN) == _TRUE)
-			break;
-
-		plist = get_next(plist);
-	}
-
-	if (plist == phead)
-		pnetwork = NULL;
-
-	/* _exit_critical_bh(&scanned_queue->lock, &irqL); */
-
-exit:
-
-
-	return pnetwork;
-
-}
-
-
 void _rtw_free_network_queue(_adapter *padapter, u8 isfreeall)
 {
 	_irqL irqL;
@@ -648,14 +609,44 @@ void rtw_free_network_queue(_adapter *dev, u8 isfreeall)
 	_rtw_free_network_queue(dev, isfreeall);
 }
 
-/*
-	return the wlan_network with the matching addr
+struct wlan_network *_rtw_find_network(_queue *scanned_queue, const u8 *addr)
+{
+	_list	*phead, *plist;
+	struct	wlan_network *pnetwork = NULL;
+	u8 zero_addr[ETH_ALEN] = {0, 0, 0, 0, 0, 0};
 
-	Shall be calle under atomic context... to avoid possible racing condition...
-*/
-struct	wlan_network *rtw_find_network(_queue *scanned_queue, u8 *addr)
+	if (_rtw_memcmp(zero_addr, addr, ETH_ALEN)) {
+		pnetwork = NULL;
+		goto exit;
+	}
+
+	phead = get_list_head(scanned_queue);
+	plist = get_next(phead);
+
+	while (plist != phead) {
+		pnetwork = LIST_CONTAINOR(plist, struct wlan_network , list);
+
+		if (_rtw_memcmp(addr, pnetwork->network.MacAddress, ETH_ALEN) == _TRUE)
+			break;
+
+		plist = get_next(plist);
+	}
+
+	if (plist == phead)
+		pnetwork = NULL;
+
+exit:
+	return pnetwork;
+}
+
+struct wlan_network *rtw_find_network(_queue *scanned_queue, const u8 *addr)
 {
-	struct	wlan_network *pnetwork = _rtw_find_network(scanned_queue, addr);
+	struct	wlan_network *pnetwork;
+	_irqL irqL;
+
+	 _enter_critical_bh(&scanned_queue->lock, &irqL);
+	pnetwork = _rtw_find_network(scanned_queue, addr);
+	_exit_critical_bh(&scanned_queue->lock, &irqL);
 
 	return pnetwork;
 }
@@ -757,7 +748,7 @@ struct wlan_network *_rtw_find_same_network(_queue *scanned_queue, struct wlan_n
 
 	if (plist == phead)
 		found = NULL;
-exit:
+
 	return found;
 }
 
@@ -796,7 +787,7 @@ struct	wlan_network	*rtw_get_oldest_wlan_network(_queue *scanned_queue)
 		pwlan = LIST_CONTAINOR(plist, struct wlan_network, list);
 
 		if (pwlan->fixed != _TRUE) {
-			if (oldest == NULL || time_after(oldest->last_scanned, pwlan->last_scanned))
+			if (oldest == NULL || rtw_time_after(oldest->last_scanned, pwlan->last_scanned))
 				oldest = pwlan;
 		}
 
@@ -809,14 +800,15 @@ struct	wlan_network	*rtw_get_oldest_wlan_network(_queue *scanned_queue)
 void update_network(WLAN_BSSID_EX *dst, WLAN_BSSID_EX *src,
 		    _adapter *padapter, bool update_ie)
 {
+#if defined(DBG_RX_SIGNAL_DISPLAY_SSID_MONITORED) && 1
 	u8 ss_ori = dst->PhyInfo.SignalStrength;
 	u8 sq_ori = dst->PhyInfo.SignalQuality;
-	long rssi_ori = dst->Rssi;
-
 	u8 ss_smp = src->PhyInfo.SignalStrength;
-	u8 sq_smp = src->PhyInfo.SignalQuality;
 	long rssi_smp = src->Rssi;
+#endif
+	long rssi_ori = dst->Rssi;
 
+	u8 sq_smp = src->PhyInfo.SignalQuality;
 	u8 ss_final;
 	u8 sq_final;
 	long rssi_final;
@@ -949,13 +941,12 @@ bool rtw_update_scanned_network(_adapter *adapter, WLAN_BSSID_EX *target)
 	_list	*plist, *phead;
 	ULONG	bssid_ex_sz;
 	struct mlme_priv	*pmlmepriv = &(adapter->mlmepriv);
-	struct mlme_ext_priv	*pmlmeext = &(adapter->mlmeextpriv);
 #ifdef CONFIG_P2P
 	struct wifidirect_info *pwdinfo = &(adapter->wdinfo);
 #endif /* CONFIG_P2P */
 	_queue	*queue	= &(pmlmepriv->scanned_queue);
 	struct wlan_network	*pnetwork = NULL;
-	struct wlan_network	*oldest = NULL;
+	struct wlan_network	*choice = NULL;
 	int target_find = 0;
 	u8 feature = 0;
 	bool update_ie = _FALSE;
@@ -996,14 +987,27 @@ bool rtw_update_scanned_network(_adapter *adapter, WLAN_BSSID_EX *target)
 		}
 
 		if (rtw_roam_flags(adapter)) {
-			/* TODO: don't  select netowrk in the same ess as oldest if it's new enough*/
+			/* TODO: don't  select netowrk in the same ess as choice if it's new enough*/
+		}
+		if (pnetwork->fixed) {
+			plist = get_next(plist);
+			continue;
 		}
+			
 #ifdef CONFIG_RSSI_PRIORITY
-		if ((oldest == NULL) || (pnetwork->network.PhyInfo.SignalStrength < oldest->network.PhyInfo.SignalStrength))
-			oldest = pnetwork;
+		if ((choice == NULL) || (pnetwork->network.PhyInfo.SignalStrength < choice->network.PhyInfo.SignalStrength))
+			#ifdef CONFIG_RTW_MESH
+			if (!MLME_IS_MESH(adapter) || !MLME_IS_ASOC(adapter)
+				|| !rtw_bss_is_same_mbss(&pmlmepriv->cur_network.network, &pnetwork->network))
+			#endif
+				choice = pnetwork;
 #else
-		if (oldest == NULL || time_after(oldest->last_scanned, pnetwork->last_scanned))
-			oldest = pnetwork;
+		if (choice == NULL || rtw_time_after(choice->last_scanned, pnetwork->last_scanned))
+			#ifdef CONFIG_RTW_MESH
+			if (!MLME_IS_MESH(adapter) || !MLME_IS_ASOC(adapter)
+				|| !rtw_bss_is_same_mbss(&pmlmepriv->cur_network.network, &pnetwork->network))
+			#endif
+				choice = pnetwork;
 #endif
 		plist = get_next(plist);
 
@@ -1015,12 +1019,12 @@ bool rtw_update_scanned_network(_adapter *adapter, WLAN_BSSID_EX *target)
 	/* if (rtw_end_of_queue_search(phead,plist)== _TRUE) { */
 	if (!target_find) {
 		if (_rtw_queue_empty(&(pmlmepriv->free_bss_pool)) == _TRUE) {
-			/* If there are no more slots, expire the oldest */
-			/* list_del_init(&oldest->list); */
-			pnetwork = oldest;
-			if (pnetwork == NULL) {
-				goto exit;
-			}
+			/* If there are no more slots, expire the choice */
+			/* list_del_init(&choice->list); */
+			pnetwork = choice;
+			if (pnetwork == NULL)
+				goto unlock_scan_queue;
+
 #ifdef CONFIG_RSSI_PRIORITY
 		RTW_DBG("%s => ssid:%s ,bssid:"MAC_FMT"  will be deleted from scanned_queue (rssi:%ld , ss:%d)\n",
 			__func__, pnetwork->network.Ssid.Ssid, MAC_ARG(pnetwork->network.MacAddress), pnetwork->network.Rssi, pnetwork->network.PhyInfo.SignalStrength);
@@ -1037,6 +1041,10 @@ bool rtw_update_scanned_network(_adapter *adapter, WLAN_BSSID_EX *target)
 			/* variable initialize */
 			pnetwork->fixed = _FALSE;
 			pnetwork->last_scanned = rtw_get_current_time();
+			#if defined(CONFIG_RTW_MESH) && CONFIG_RTW_MESH_ACNODE_PREVENT
+			pnetwork->acnode_stime = 0;
+			pnetwork->acnode_notify_etime = 0;
+			#endif
 
 			pnetwork->network_type = 0;
 			pnetwork->aid = 0;
@@ -1049,10 +1057,8 @@ bool rtw_update_scanned_network(_adapter *adapter, WLAN_BSSID_EX *target)
 			/* Otherwise just pull from the free list */
 
 			pnetwork = rtw_alloc_network(pmlmepriv); /* will update scan_time */
-
-			if (pnetwork == NULL) {
-				goto exit;
-			}
+			if (pnetwork == NULL)
+				goto unlock_scan_queue;
 
 			bssid_ex_sz = get_WLAN_BSSID_EX_sz(target);
 			target->Length = bssid_ex_sz;
@@ -1075,6 +1081,9 @@ bool rtw_update_scanned_network(_adapter *adapter, WLAN_BSSID_EX *target)
 		 * be already expired. In this case we do the same as we found a new
 		 * net and call the new_net handler
 		 */
+		#if defined(CONFIG_RTW_MESH) && CONFIG_RTW_MESH_ACNODE_PREVENT
+		systime last_scanned = pnetwork->last_scanned;
+		#endif
 
 		pnetwork->last_scanned = rtw_get_current_time();
 
@@ -1082,31 +1091,53 @@ bool rtw_update_scanned_network(_adapter *adapter, WLAN_BSSID_EX *target)
 		if ((pnetwork->network.IELength > target->IELength) && (target->Reserved[0] == BSS_TYPE_BCN))
 			update_ie = _FALSE;
 
-		/* probe resp(3) > beacon(1) > probe req(2) */
-		if ((target->Reserved[0] != BSS_TYPE_PROB_REQ) &&
-		    (target->Reserved[0] >= pnetwork->network.Reserved[0])
-		   )
+		if (MLME_IS_MESH(adapter)
+			/* probe resp(3) > beacon(1) > probe req(2) */
+			|| (target->Reserved[0] != BSS_TYPE_PROB_REQ
+				&& target->Reserved[0] >= pnetwork->network.Reserved[0])
+		)
 			update_ie = _TRUE;
 		else
 			update_ie = _FALSE;
 
+		#if defined(CONFIG_RTW_MESH) && CONFIG_RTW_MESH_ACNODE_PREVENT
+		if (!MLME_IS_MESH(adapter) || !MLME_IS_ASOC(adapter)
+			|| pnetwork->network.Configuration.DSConfig != target->Configuration.DSConfig
+			|| rtw_get_passing_time_ms(last_scanned) > adapter->mesh_cfg.peer_sel_policy.scanr_exp_ms
+			|| !rtw_bss_is_same_mbss(&pnetwork->network, target)
+		) {
+			pnetwork->acnode_stime = 0;
+			pnetwork->acnode_notify_etime = 0;
+		}
+		#endif
 		update_network(&(pnetwork->network), target, adapter, update_ie);
 	}
 
-exit:
+	#if defined(CONFIG_RTW_MESH) && CONFIG_RTW_MESH_ACNODE_PREVENT
+	if (MLME_IS_MESH(adapter) && MLME_IS_ASOC(adapter))
+		rtw_mesh_update_scanned_acnode_status(adapter, pnetwork);
+	#endif
+
+unlock_scan_queue:
 	_exit_critical_bh(&queue->lock, &irqL);
+
+#ifdef CONFIG_RTW_MESH
+	if (pnetwork && MLME_IS_MESH(adapter)
+		&& check_fwstate(pmlmepriv, WIFI_ASOC_STATE)
+		&& !check_fwstate(pmlmepriv, WIFI_SITE_MONITOR)
+	)
+		rtw_chk_candidate_peer_notify(adapter, pnetwork);
+#endif
+
 	return update_ie;
 }
 
 void rtw_add_network(_adapter *adapter, WLAN_BSSID_EX *pnetwork);
 void rtw_add_network(_adapter *adapter, WLAN_BSSID_EX *pnetwork)
 {
-	_irqL irqL;
-	struct	mlme_priv	*pmlmepriv = &(((_adapter *)adapter)->mlmepriv);
 	bool update_ie;
 	/* _queue	*queue	= &(pmlmepriv->scanned_queue); */
 
-
 	/* _enter_critical_bh(&queue->lock, &irqL); */
 
 #if defined(CONFIG_P2P) && defined(CONFIG_P2P_REMOVE_GROUP_INFO)
@@ -1240,7 +1271,7 @@ void rtw_survey_event_callback(_adapter	*adapter, u8 *pbuf)
 
 			_rtw_memcpy(pmlmepriv->cur_network.network.IEs, pnetwork->IEs, 8);
 			_enter_critical_bh(&(pmlmepriv->scanned_queue.lock), &irqL);
-			ibss_wlan = rtw_find_network(&pmlmepriv->scanned_queue,  pnetwork->MacAddress);
+			ibss_wlan = _rtw_find_network(&pmlmepriv->scanned_queue,  pnetwork->MacAddress);
 			if (ibss_wlan) {
 				_rtw_memcpy(ibss_wlan->network.IEs , pnetwork->IEs, 8);
 				_exit_critical_bh(&(pmlmepriv->scanned_queue.lock), &irqL);
@@ -1348,13 +1379,15 @@ void rtw_surveydone_event_callback(_adapter	*adapter, u8 *pbuf)
 				RTW_INFO("try_to_join, but select scanning queue fail, to_roam:%d\n", rtw_to_roam(adapter));
 
 				if (rtw_to_roam(adapter) != 0) {
+					u8 ssc_chk = rtw_sitesurvey_condition_check(adapter, _FALSE);
 
 					rtw_init_sitesurvey_parm(adapter, &parm);
 					_rtw_memcpy(&parm.ssid[0], &pmlmepriv->assoc_ssid, sizeof(NDIS_802_11_SSID));
 					parm.ssid_num = 1;
 
 					if (rtw_dec_to_roam(adapter) == 0
-					    || _SUCCESS != rtw_sitesurvey_cmd(adapter, &parm)
+						|| (ssc_chk != SS_ALLOW && ssc_chk != SS_DENY_BUSY_TRAFFIC)
+						|| _SUCCESS != rtw_sitesurvey_cmd(adapter, &parm)
 					   ) {
 						rtw_set_to_roam(adapter, 0);
 #ifdef CONFIG_INTEL_WIDI
@@ -1364,7 +1397,7 @@ void rtw_surveydone_event_callback(_adapter	*adapter, u8 *pbuf)
 							RTW_INFO("change to widi listen\n");
 						}
 #endif /* CONFIG_INTEL_WIDI */
-						rtw_free_assoc_resources(adapter, 1);
+						rtw_free_assoc_resources(adapter, _TRUE);
 						rtw_indicate_disconnect(adapter, 0, _FALSE);
 					} else
 						pmlmepriv->to_join = _TRUE;
@@ -1424,6 +1457,143 @@ void rtw_surveydone_event_callback(_adapter	*adapter, u8 *pbuf)
 	rtw_cfg80211_indicate_scan_done_for_buddy(adapter, _FALSE);
 #endif
 
+#ifdef CONFIG_RTW_MESH
+	#if CONFIG_RTW_MESH_OFFCH_CAND
+	if (rtw_mesh_offch_candidate_accepted(adapter)) {
+		u8 ch;
+
+		ch = rtw_mesh_select_operating_ch(adapter);
+		if (ch && pmlmepriv->cur_network.network.Configuration.DSConfig != ch) {
+			u8 ifbmp = rtw_mi_get_ap_mesh_ifbmp(adapter);
+
+			if (ifbmp) {
+				/* switch to selected channel */
+				rtw_change_bss_chbw_cmd(adapter, RTW_CMDF_DIRECTLY, ifbmp, 0, ch, REQ_BW_ORI, REQ_OFFSET_NONE);
+				issue_probereq_ex(adapter, &pmlmepriv->cur_network.network.mesh_id, NULL, 0, 0, 0, 0);
+			} else
+				rtw_warn_on(1);
+		}
+	}
+	#endif
+#endif /* CONFIG_RTW_MESH */
+}
+
+u8 _rtw_sitesurvey_condition_check(const char *caller, _adapter *adapter, bool check_sc_interval)
+{
+	u8 ss_condition = SS_ALLOW;
+	struct mlme_priv *pmlmepriv = &adapter->mlmepriv;
+#ifdef DBG_LA_MODE
+	struct registry_priv *registry_par = &adapter->registrypriv;
+#endif
+
+#ifdef CONFIG_MP_INCLUDED
+	if (rtw_mp_mode_check(adapter)) {
+		RTW_INFO("%s ("ADPT_FMT") MP mode block Scan request\n", caller, ADPT_ARG(adapter));
+		ss_condition = SS_DENY_MP_MODE;
+		goto _exit;
+	}
+#endif
+
+#ifdef DBG_LA_MODE
+	if(registry_par->la_mode_en == 1 && MLME_IS_ASOC(adapter)) {
+		RTW_INFO("%s ("ADPT_FMT") LA debug mode block Scan request\n", caller, ADPT_ARG(adapter));
+		ss_condition = SS_DENY_LA_MODE;
+		goto _exit;
+	}
+#endif
+
+#ifdef CONFIG_RTW_REPEATER_SON
+	if (adapter->rtw_rson_scanstage == RSON_SCAN_PROCESS) {
+		RTW_INFO("%s ("ADPT_FMT") blocking scan for under rson scanning process\n", caller, ADPT_ARG(adapter));
+		ss_condition = SS_DENY_RSON_SCANING;
+		goto _exit;
+	}
+#endif
+#ifdef CONFIG_IOCTL_CFG80211
+	if (adapter_wdev_data(adapter)->block_scan == _TRUE) {
+		RTW_INFO("%s ("ADPT_FMT") wdev_priv.block_scan is set\n", caller, ADPT_ARG(adapter));
+		ss_condition = SS_DENY_BLOCK_SCAN;
+		goto _exit;
+	}
+#endif
+
+	if (adapter_to_dvobj(adapter)->scan_deny == _TRUE) {
+		RTW_INFO("%s ("ADPT_FMT") tpt mode, scan deny!\n", caller, ADPT_ARG(adapter));
+		ss_condition = SS_DENY_BLOCK_SCAN;
+		goto _exit;
+	}
+
+	if (rtw_is_scan_deny(adapter)) {
+		RTW_INFO("%s ("ADPT_FMT") : scan deny\n", caller, ADPT_ARG(adapter));
+		ss_condition = SS_DENY_BY_DRV;
+		goto _exit;
+	}
+
+	if (check_fwstate(pmlmepriv, WIFI_AP_STATE)){
+		if(check_fwstate(pmlmepriv, WIFI_UNDER_WPS)) {
+			RTW_INFO("%s ("ADPT_FMT") : scan abort!! AP mode process WPS\n", caller, ADPT_ARG(adapter));
+			ss_condition = SS_DENY_SELF_AP_UNDER_WPS;
+			goto _exit;
+		} else if (check_fwstate(pmlmepriv, _FW_UNDER_LINKING) == _TRUE) {
+			RTW_INFO("%s ("ADPT_FMT") : scan abort!!AP mode under linking (fwstate=0x%x)\n",
+				caller, ADPT_ARG(adapter), pmlmepriv->fw_state);
+			ss_condition = SS_DENY_SELF_AP_UNDER_LINKING;
+			goto _exit;
+		} else if (check_fwstate(pmlmepriv, _FW_UNDER_SURVEY) == _TRUE) {
+			RTW_INFO("%s ("ADPT_FMT") : scan abort!!AP mode under survey (fwstate=0x%x)\n",
+				caller, ADPT_ARG(adapter), pmlmepriv->fw_state);
+			ss_condition = SS_DENY_SELF_AP_UNDER_SURVEY;
+			goto _exit;
+		}
+	} else {
+		if (check_fwstate(pmlmepriv, _FW_UNDER_LINKING) == _TRUE) {
+			RTW_INFO("%s ("ADPT_FMT") : scan abort!!STA mode under linking (fwstate=0x%x)\n",
+				caller, ADPT_ARG(adapter), pmlmepriv->fw_state);
+			ss_condition = SS_DENY_SELF_STA_UNDER_LINKING;
+			goto _exit;
+		} else if (check_fwstate(pmlmepriv, _FW_UNDER_SURVEY) == _TRUE) {
+			RTW_INFO("%s ("ADPT_FMT") : scan abort!!STA mode under survey (fwstate=0x%x)\n",
+				caller, ADPT_ARG(adapter), pmlmepriv->fw_state);
+			ss_condition = SS_DENY_SELF_STA_UNDER_SURVEY;
+			goto _exit;
+		}
+	}
+
+#ifdef CONFIG_CONCURRENT_MODE
+	if (rtw_mi_buddy_check_fwstate(adapter, _FW_UNDER_LINKING | WIFI_UNDER_WPS)) {
+		RTW_INFO("%s ("ADPT_FMT") : scan abort!! buddy_intf under linking or wps\n", caller, ADPT_ARG(adapter));
+		ss_condition = SS_DENY_BUDDY_UNDER_LINK_WPS;
+		goto _exit;
+
+	} else if (rtw_mi_buddy_check_fwstate(adapter, _FW_UNDER_SURVEY)) {
+		RTW_INFO("%s ("ADPT_FMT") : scan abort!! buddy_intf under survey\n", caller, ADPT_ARG(adapter));
+		ss_condition = SS_DENY_BUDDY_UNDER_SURVEY;
+		goto _exit;
+	}
+#endif /* CONFIG_CONCURRENT_MODE */
+
+	if (pmlmepriv->LinkDetectInfo.bBusyTraffic == _TRUE) {
+		RTW_INFO("%s ("ADPT_FMT") : scan abort!! BusyTraffic\n",
+			 caller, ADPT_ARG(adapter));
+		ss_condition = SS_DENY_BUSY_TRAFFIC;
+		goto _exit;
+	}
+	/*
+	 * Rule for Android.
+	 * If scan interval > BUSY_TRAFFIC_SCAN_DENY_PERIOD,
+	 * it is a periodical background scan.
+	 * Skip background scan when other interface is busy.
+	 */
+	if ((rtw_get_passing_time_ms(pmlmepriv->lastscantime) > BUSY_TRAFFIC_SCAN_DENY_PERIOD)
+	    && rtw_mi_buddy_busy_traffic_check(adapter, _FALSE)) {
+		RTW_INFO("%s ("ADPT_FMT") : scan abort!! others BusyTraffic\n",
+			 caller, ADPT_ARG(adapter));
+		ss_condition = SS_DENY_BUSY_TRAFFIC;
+		goto _exit;
+	}
+
+_exit :
+	return ss_condition;
 }
 
 void rtw_dummy_event_callback(_adapter *adapter , u8 *pbuf)
@@ -1479,12 +1649,11 @@ void rtw_reset_rx_info(_adapter *adapter)
 /*
 *rtw_free_assoc_resources: the caller has to lock pmlmepriv->lock
 */
-void rtw_free_assoc_resources(_adapter *adapter, int lock_scanned_queue)
+void rtw_free_assoc_resources(_adapter *adapter, u8 lock_scanned_queue)
 {
 	_irqL irqL;
 	struct wlan_network *pwlan = NULL;
 	struct	mlme_priv *pmlmepriv = &adapter->mlmepriv;
-	struct	sta_priv *pstapriv = &adapter->stapriv;
 	struct wlan_network *tgt_network = &pmlmepriv->cur_network;
 
 
@@ -1531,26 +1700,27 @@ void rtw_free_assoc_resources(_adapter *adapter, int lock_scanned_queue)
 	if (lock_scanned_queue)
 		_enter_critical_bh(&(pmlmepriv->scanned_queue.lock), &irqL);
 
-	pwlan = _rtw_find_same_network(&pmlmepriv->scanned_queue, tgt_network);
-	if ((pwlan)  && (!check_fwstate(pmlmepriv, WIFI_UNDER_WPS))) {
-		pwlan->fixed = _FALSE;
+	if (check_fwstate(pmlmepriv, WIFI_UNDER_WPS) || (pmlmepriv->wpa_phase == _TRUE)){
+		RTW_INFO("Dont free disconnecting network of scanned_queue due to uner %s %s phase\n\n",
+			check_fwstate(pmlmepriv, WIFI_UNDER_WPS) ? "WPS" : "",
+			(pmlmepriv->wpa_phase == _TRUE) ? "WPA" : "");
+	} else {
+		pwlan = _rtw_find_same_network(&pmlmepriv->scanned_queue, tgt_network);
+		if (pwlan) {
+			pwlan->fixed = _FALSE;
 
-		RTW_INFO("free disconnecting network of scanned_queue\n");
-		rtw_free_network_nolock(adapter, pwlan);
+			RTW_INFO("Free disconnecting network of scanned_queue\n");
+			rtw_free_network_nolock(adapter, pwlan);
 #ifdef CONFIG_P2P
-		if (!rtw_p2p_chk_state(&adapter->wdinfo, P2P_STATE_NONE)) {
-			rtw_mi_set_scan_deny(adapter, 2000);
-			/* rtw_clear_scan_deny(adapter);			 */
-		}
+			if (!rtw_p2p_chk_state(&adapter->wdinfo, P2P_STATE_NONE)) {
+				rtw_set_scan_deny(adapter, 2000);
+				/* rtw_clear_scan_deny(adapter); */
+			}
 #endif /* CONFIG_P2P */
-	} else {
-		if (pwlan == NULL)
-			RTW_INFO("free disconnecting network of scanned_queue failed due to pwlan== NULL\n\n");
-		if (check_fwstate(pmlmepriv, WIFI_UNDER_WPS))
-			RTW_INFO("donot free disconnecting network of scanned_queue when WIFI_UNDER_WPS\n\n");
+		} else
+			RTW_ERR("Free disconnecting network of scanned_queue failed due to pwlan == NULL\n\n");
 	}
 
-
 	if ((check_fwstate(pmlmepriv, WIFI_ADHOC_MASTER_STATE) && (adapter->stapriv.asoc_sta_count == 1))
 	    /*||check_fwstate(pmlmepriv, WIFI_STATION_STATE)*/) {
 		if (pwlan)
@@ -1573,9 +1743,6 @@ void rtw_free_assoc_resources(_adapter *adapter, int lock_scanned_queue)
 void rtw_indicate_connect(_adapter *padapter)
 {
 	struct mlme_priv	*pmlmepriv = &padapter->mlmepriv;
-	struct xmit_priv	*pxmitpriv = &padapter->xmitpriv;
-
-
 
 	pmlmepriv->to_join = _FALSE;
 
@@ -1608,18 +1775,21 @@ void rtw_indicate_connect(_adapter *padapter)
 */
 void rtw_indicate_disconnect(_adapter *padapter, u16 reason, u8 locally_generated)
 {
-	struct	mlme_priv *pmlmepriv = &padapter->mlmepriv;
+	struct mlme_priv *pmlmepriv = &padapter->mlmepriv;
 	struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv);
 	struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info);
 	WLAN_BSSID_EX	*cur_network = &(pmlmeinfo->network);
+#ifdef CONFIG_WAPI_SUPPORT
 	struct sta_info *psta;
 	struct sta_priv *pstapriv = &padapter->stapriv;
+#endif
 	u8 *wps_ie = NULL;
 	uint wpsie_len = 0;
 
+	if (check_fwstate(pmlmepriv, WIFI_UNDER_WPS))
+		pmlmepriv->wpa_phase = _TRUE;
 
-
-	_clr_fwstate_(pmlmepriv, _FW_UNDER_LINKING | WIFI_UNDER_WPS);
+	_clr_fwstate_(pmlmepriv, _FW_UNDER_LINKING | WIFI_UNDER_WPS | WIFI_OP_CH_SWITCHING | WIFI_UNDER_KEY_HANDSHAKE);
 
 	/* force to clear cur_network_scanned's SELECTED REGISTRAR */
 	if (pmlmepriv->cur_network_scanned) {
@@ -1748,7 +1918,6 @@ static u32 _rtw_wait_scan_done(_adapter *adapter, u8 abort, u32 timeout_ms)
 void rtw_scan_wait_completed(_adapter *adapter)
 {
 	struct mlme_ext_priv *pmlmeext = &adapter->mlmeextpriv;
-	struct mlme_ext_info *pmlmeinfo = &pmlmeext->mlmext_info;
 	struct ss_res *ss = &pmlmeext->sitesurvey_res;
 
 	_rtw_wait_scan_done(adapter, _FALSE, ss->scan_timeout_ms);
@@ -1829,6 +1998,10 @@ static struct sta_info *rtw_joinbss_update_stainfo(_adapter *padapter, struct wl
 	struct recv_reorder_ctrl *preorder_ctrl;
 	struct sta_priv *pstapriv = &padapter->stapriv;
 	struct mlme_ext_priv	*pmlmeext = &padapter->mlmeextpriv;
+#ifdef CONFIG_RTS_FULL_BW
+	struct	mlme_priv	*pmlmepriv = &(padapter->mlmepriv);
+	struct wlan_network  *cur_network = &(pmlmepriv->cur_network);
+#endif/*CONFIG_RTS_FULL_BW*/
 
 	psta = rtw_get_stainfo(pstapriv, pnetwork->network.MacAddress);
 	if (psta == NULL)
@@ -1839,18 +2012,6 @@ static struct sta_info *rtw_joinbss_update_stainfo(_adapter *padapter, struct wl
 
 		psta->cmn.aid  = pnetwork->join_res;
 
-#if 0 /* alloc macid when call rtw_alloc_stainfo(), and release macid when call rtw_free_stainfo() */
-#ifdef CONFIG_CONCURRENT_MODE
-
-		if (PRIMARY_ADAPTER == padapter->adapter_type)
-			psta->cmn.mac_id = 0;
-		else
-			psta->cmn.mac_id = 2;
-#else
-		psta->cmn.mac_id = 0;
-#endif
-#endif /* removed */
-
 		update_sta_info(padapter, psta);
 
 		/* update station supportRate */
@@ -1926,7 +2087,9 @@ static struct sta_info *rtw_joinbss_update_stainfo(_adapter *padapter, struct wl
 #ifdef	CONFIG_RTW_80211K
 	_rtw_memcpy(&psta->rm_en_cap, pnetwork->network.PhyInfo.rm_en_cap, 5);
 #endif
-
+#ifdef CONFIG_RTS_FULL_BW
+	rtw_parse_sta_vendor_ie_8812(padapter, psta, BSS_EX_TLV_IES(&cur_network->network), BSS_EX_TLV_IES_LEN(&cur_network->network));
+#endif
 	return psta;
 
 }
@@ -1936,12 +2099,12 @@ static struct sta_info *rtw_joinbss_update_stainfo(_adapter *padapter, struct wl
 static void rtw_joinbss_update_network(_adapter *padapter, struct wlan_network *ptarget_wlan, struct wlan_network  *pnetwork)
 {
 	struct mlme_priv	*pmlmepriv = &(padapter->mlmepriv);
+	struct security_priv *psecuritypriv = &padapter->securitypriv;
 	struct wlan_network  *cur_network = &(pmlmepriv->cur_network);
+	sint tmp_fw_state = 0x0;
 
 	RTW_INFO("%s\n", __FUNCTION__);
 
-
-
 	/* why not use ptarget_wlan?? */
 	_rtw_memcpy(&cur_network->network, &pnetwork->network, pnetwork->network.Length);
 	/* some IEs in pnetwork is wrong, so we should use ptarget_wlan IEs */
@@ -1975,13 +2138,15 @@ static void rtw_joinbss_update_network(_adapter *padapter, struct wlan_network *
 
 	switch (pnetwork->network.InfrastructureMode) {
 	case Ndis802_11Infrastructure:
+		/* Check encryption */
+		if (psecuritypriv->dot11AuthAlgrthm == dot11AuthAlgrthm_8021X)
+			tmp_fw_state = tmp_fw_state | WIFI_UNDER_KEY_HANDSHAKE;
+
+		if (check_fwstate(pmlmepriv, WIFI_UNDER_WPS))
+			tmp_fw_state = tmp_fw_state | WIFI_UNDER_WPS;
+
+		init_fwstate(pmlmepriv, WIFI_STATION_STATE | tmp_fw_state);
 
-		if (pmlmepriv->fw_state & WIFI_UNDER_WPS)
-			/*pmlmepriv->fw_state = WIFI_STATION_STATE|WIFI_UNDER_WPS;*/
-			init_fwstate(pmlmepriv, WIFI_STATION_STATE | WIFI_UNDER_WPS);
-		else
-			/*pmlmepriv->fw_state = WIFI_STATION_STATE;*/
-			init_fwstate(pmlmepriv, WIFI_STATION_STATE);
 		break;
 	case Ndis802_11IBSS:
 		/*pmlmepriv->fw_state = WIFI_ADHOC_STATE;*/
@@ -2009,9 +2174,9 @@ static void rtw_joinbss_update_network(_adapter *padapter, struct wlan_network *
  * if join_res > 0, update "cur_network->network" from "pnetwork->network" if (ptarget_wlan !=NULL).
  */
 /* #define REJOIN */
-void rtw_joinbss_event_prehandle(_adapter *adapter, u8 *pbuf)
+void rtw_joinbss_event_prehandle(_adapter *adapter, u8 *pbuf, u16 status)
 {
-	_irqL irqL, irqL2;
+	_irqL irqL;
 	static u8 retry = 0;
 	struct sta_info *ptarget_sta = NULL, *pcur_sta = NULL;
 	struct	sta_priv *pstapriv = &adapter->stapriv;
@@ -2051,9 +2216,8 @@ void rtw_joinbss_event_prehandle(_adapter *adapter, u8 *pbuf)
 	the_same_macaddr = _rtw_memcmp(pnetwork->network.MacAddress, cur_network->network.MacAddress, ETH_ALEN);
 
 	pnetwork->network.Length = get_WLAN_BSSID_EX_sz(&pnetwork->network);
-	if (pnetwork->network.Length > sizeof(WLAN_BSSID_EX)) {
-		goto ignore_joinbss_callback;
-	}
+	if (pnetwork->network.Length > sizeof(WLAN_BSSID_EX))
+		goto exit;
 
 	_enter_critical_bh(&pmlmepriv->lock, &irqL);
 
@@ -2068,9 +2232,9 @@ void rtw_joinbss_event_prehandle(_adapter *adapter, u8 *pbuf)
 			/* s1. find ptarget_wlan */
 			if (check_fwstate(pmlmepriv, _FW_LINKED)) {
 				if (the_same_macaddr == _TRUE)
-					ptarget_wlan = rtw_find_network(&pmlmepriv->scanned_queue, cur_network->network.MacAddress);
+					ptarget_wlan = _rtw_find_network(&pmlmepriv->scanned_queue, cur_network->network.MacAddress);
 				else {
-					pcur_wlan = rtw_find_network(&pmlmepriv->scanned_queue, cur_network->network.MacAddress);
+					pcur_wlan = _rtw_find_network(&pmlmepriv->scanned_queue, cur_network->network.MacAddress);
 					if (pcur_wlan)
 						pcur_wlan->fixed = _FALSE;
 
@@ -2081,7 +2245,7 @@ void rtw_joinbss_event_prehandle(_adapter *adapter, u8 *pbuf)
 						/* _exit_critical_bh(&(pstapriv->sta_hash_lock), &irqL2); */
 					}
 
-					ptarget_wlan = rtw_find_network(&pmlmepriv->scanned_queue, pnetwork->network.MacAddress);
+					ptarget_wlan = _rtw_find_network(&pmlmepriv->scanned_queue, pnetwork->network.MacAddress);
 					if (check_fwstate(pmlmepriv, WIFI_STATION_STATE) == _TRUE) {
 						if (ptarget_wlan)
 							ptarget_wlan->fixed = _TRUE;
@@ -2135,9 +2299,10 @@ void rtw_joinbss_event_prehandle(_adapter *adapter, u8 *pbuf)
 
 	} else if (pnetwork->join_res == -4) {
 		rtw_reset_securitypriv(adapter);
+		pmlmepriv->join_status = status;
 		_set_timer(&pmlmepriv->assoc_timer, 1);
 
-		/* rtw_free_assoc_resources(adapter, 1); */
+		/* rtw_free_assoc_resources(adapter, _TRUE); */
 
 		if ((check_fwstate(pmlmepriv, _FW_UNDER_LINKING)) == _TRUE) {
 			_clr_fwstate_(pmlmepriv, _FW_UNDER_LINKING);
@@ -2160,9 +2325,9 @@ void rtw_joinbss_event_prehandle(_adapter *adapter, u8 *pbuf)
 			rtw_indicate_connect(adapter);
 		} else {
 #endif
-
+			pmlmepriv->join_status = status;
 			_set_timer(&pmlmepriv->assoc_timer, 1);
-			/* rtw_free_assoc_resources(adapter, 1); */
+			/* rtw_free_assoc_resources(adapter, _TRUE); */
 			_clr_fwstate_(pmlmepriv, _FW_UNDER_LINKING);
 
 #ifdef REJOIN
@@ -2173,6 +2338,9 @@ void rtw_joinbss_event_prehandle(_adapter *adapter, u8 *pbuf)
 
 ignore_joinbss_callback:
 	_exit_critical_bh(&pmlmepriv->lock, &irqL);
+
+exit:
+	return;
 }
 
 void rtw_joinbss_event_callback(_adapter *adapter, u8 *pbuf)
@@ -2340,31 +2508,32 @@ void rtw_stassoc_event_callback(_adapter *adapter, u8 *pbuf)
 #ifndef CONFIG_AUTO_AP_MODE
 			ap_sta_info_defer_update(adapter, psta);
 
-			/* report to upper layer */
-			RTW_INFO("indicate_sta_assoc_event to upper layer - hostapd\n");
-#ifdef CONFIG_IOCTL_CFG80211
-			_enter_critical_bh(&psta->lock, &irqL);
-			if (psta->passoc_req && psta->assoc_req_len > 0) {
-				passoc_req = rtw_zmalloc(psta->assoc_req_len);
-				if (passoc_req) {
-					assoc_req_len = psta->assoc_req_len;
-					_rtw_memcpy(passoc_req, psta->passoc_req, assoc_req_len);
-
-					rtw_mfree(psta->passoc_req , psta->assoc_req_len);
-					psta->passoc_req = NULL;
-					psta->assoc_req_len = 0;
+			if (!MLME_IS_MESH(adapter)) {
+				/* report to upper layer */
+				RTW_INFO("indicate_sta_assoc_event to upper layer - hostapd\n");
+				#ifdef CONFIG_IOCTL_CFG80211
+				_enter_critical_bh(&psta->lock, &irqL);
+				if (psta->passoc_req && psta->assoc_req_len > 0) {
+					passoc_req = rtw_zmalloc(psta->assoc_req_len);
+					if (passoc_req) {
+						assoc_req_len = psta->assoc_req_len;
+						_rtw_memcpy(passoc_req, psta->passoc_req, assoc_req_len);
+
+						rtw_mfree(psta->passoc_req , psta->assoc_req_len);
+						psta->passoc_req = NULL;
+						psta->assoc_req_len = 0;
+					}
 				}
-			}
-			_exit_critical_bh(&psta->lock, &irqL);
+				_exit_critical_bh(&psta->lock, &irqL);
 
-			if (passoc_req && assoc_req_len > 0) {
-				rtw_cfg80211_indicate_sta_assoc(adapter, passoc_req, assoc_req_len);
-
-				rtw_mfree(passoc_req, assoc_req_len);
+				if (passoc_req && assoc_req_len > 0) {
+					rtw_cfg80211_indicate_sta_assoc(adapter, passoc_req, assoc_req_len);
+					rtw_mfree(passoc_req, assoc_req_len);
+				}
+				#else /* !CONFIG_IOCTL_CFG80211	 */
+				rtw_indicate_sta_assoc_event(adapter, psta);
+				#endif /* !CONFIG_IOCTL_CFG80211 */
 			}
-#else /* !CONFIG_IOCTL_CFG80211	 */
-			rtw_indicate_sta_assoc_event(adapter, psta);
-#endif /* !CONFIG_IOCTL_CFG80211 */
 #endif /* !CONFIG_AUTO_AP_MODE */
 
 #ifdef CONFIG_BEAMFORMING
@@ -2400,7 +2569,7 @@ void rtw_stassoc_event_callback(_adapter *adapter, u8 *pbuf)
 	    (check_fwstate(pmlmepriv, WIFI_ADHOC_STATE) == _TRUE)) {
 		if (adapter->stapriv.asoc_sta_count == 2) {
 			_enter_critical_bh(&(pmlmepriv->scanned_queue.lock), &irqL);
-			ptarget_wlan = rtw_find_network(&pmlmepriv->scanned_queue, cur_network->network.MacAddress);
+			ptarget_wlan = _rtw_find_network(&pmlmepriv->scanned_queue, cur_network->network.MacAddress);
 			pmlmepriv->cur_network_scanned = ptarget_wlan;
 			if (ptarget_wlan)
 				ptarget_wlan->fixed = _TRUE;
@@ -2421,6 +2590,9 @@ void rtw_stassoc_event_callback(_adapter *adapter, u8 *pbuf)
 #endif
 
 exit:
+#ifdef CONFIG_RTS_FULL_BW
+	rtw_set_rts_bw(adapter);
+#endif/*CONFIG_RTS_FULL_BW*/
 	return;
 }
 
@@ -2573,9 +2745,11 @@ void rtw_roam_nb_info_init(_adapter *padapter)
 	pnb->preference_en = _FALSE;
 	pnb->nb_rpt_is_same = _TRUE;
 	pnb->last_nb_rpt_entries = 0;
+#ifdef CONFIG_RTW_WNM
 	rtw_init_timer(&pnb->roam_scan_timer, 
 		padapter, rtw_wnm_roam_scan_hdl, 
 		padapter);
+#endif
 }
 
 u8 rtw_roam_nb_scan_list_set(
@@ -2684,11 +2858,7 @@ void rtw_stadel_event_callback(_adapter *adapter, u8 *pbuf)
 	u8 *pibss = NULL;
 	struct	mlme_priv	*pmlmepriv = &(adapter->mlmepriv);
 	struct	stadel_event *pstadel	= (struct stadel_event *)pbuf;
-	struct	sta_priv *pstapriv = &adapter->stapriv;
 	struct wlan_network *tgt_network = &(pmlmepriv->cur_network);
-	struct mlme_ext_priv	*pmlmeext = &adapter->mlmeextpriv;
-	struct mlme_ext_info	*pmlmeinfo = &(pmlmeext->mlmext_info);
-
 
 	RTW_INFO("%s(mac_id=%d)=" MAC_FMT "\n", __func__, pstadel->mac_id, MAC_ARG(pstadel->macaddr));
 	rtw_sta_mstatus_disc_rpt(adapter, pstadel->mac_id);
@@ -2707,6 +2877,11 @@ void rtw_stadel_event_callback(_adapter *adapter, u8 *pbuf)
 	if (psta)
 		rtw_wfd_st_switch(psta, 0);
 
+	if (MLME_IS_MESH(adapter)) {
+		rtw_free_stainfo(adapter, psta);
+		goto exit;
+	}
+
 	if (MLME_IS_AP(adapter)) {
 #ifdef CONFIG_IOCTL_CFG80211
 #ifdef COMPAT_KERNEL_RELEASE
@@ -2716,7 +2891,9 @@ void rtw_stadel_event_callback(_adapter *adapter, u8 *pbuf)
 #endif /* (LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 37)) || defined(CONFIG_CFG80211_FORCE_COMPATIBLE_2_6_37_UNDER) */
 #endif /* CONFIG_IOCTL_CFG80211 */
 
-		return;
+		rtw_free_stainfo(adapter, psta);
+
+		goto exit;
 	}
 
 	mlmeext_sta_del_event_callback(adapter);
@@ -2759,18 +2936,9 @@ void rtw_stadel_event_callback(_adapter *adapter, u8 *pbuf)
 
 		rtw_free_uc_swdec_pending_queue(adapter);
 
-		rtw_free_assoc_resources(adapter, 1);
+		rtw_free_assoc_resources(adapter, _TRUE);
 		rtw_free_mlme_priv_ie_data(pmlmepriv);
 
-		_enter_critical_bh(&(pmlmepriv->scanned_queue.lock), &irqL);
-		/* remove the network entry in scanned_queue */
-		pwlan = rtw_find_network(&pmlmepriv->scanned_queue, tgt_network->network.MacAddress);
-		if ((pwlan)  && (!check_fwstate(pmlmepriv, WIFI_UNDER_WPS))) {
-			pwlan->fixed = _FALSE;
-			rtw_free_network_nolock(adapter, pwlan);
-		}
-		_exit_critical_bh(&(pmlmepriv->scanned_queue.lock), &irqL);
-
 		rtw_indicate_disconnect(adapter, *(u16 *)pstadel->rsvd, pstadel->locally_generated);
 #ifdef CONFIG_INTEL_WIDI
 		if (!rtw_to_roam(adapter))
@@ -2791,8 +2959,8 @@ void rtw_stadel_event_callback(_adapter *adapter, u8 *pbuf)
 			/* rtw_indicate_disconnect(adapter); */ /* removed@20091105 */
 			_enter_critical_bh(&(pmlmepriv->scanned_queue.lock), &irqL);
 			/* free old ibss network */
-			/* pwlan = rtw_find_network(&pmlmepriv->scanned_queue, pstadel->macaddr); */
-			pwlan = rtw_find_network(&pmlmepriv->scanned_queue, tgt_network->network.MacAddress);
+			/* pwlan = _rtw_find_network(&pmlmepriv->scanned_queue, pstadel->macaddr); */
+			pwlan = _rtw_find_network(&pmlmepriv->scanned_queue, tgt_network->network.MacAddress);
 			if (pwlan) {
 				pwlan->fixed = _FALSE;
 				rtw_free_network_nolock(adapter, pwlan);
@@ -2824,8 +2992,11 @@ void rtw_stadel_event_callback(_adapter *adapter, u8 *pbuf)
 	}
 
 	_exit_critical_bh(&pmlmepriv->lock, &irqL2);
-
-
+exit:
+	#ifdef CONFIG_RTS_FULL_BW
+	rtw_set_rts_bw(adapter);
+	#endif/*CONFIG_RTS_FULL_BW*/
+	return;
 }
 
 
@@ -2906,7 +3077,7 @@ void rtw_join_timeout_handler(void *ctx)
 				rtw_ft_clr_flags(adapter, RTW_FT_PEER_EN|RTW_FT_PEER_OTD_EN);
 				rtw_ft_reset_status(adapter);
 #endif
-				rtw_indicate_disconnect(adapter, 0, _FALSE);
+				rtw_indicate_disconnect(adapter, pmlmepriv->join_status, _FALSE);
 				break;
 			}
 		}
@@ -2914,16 +3085,18 @@ void rtw_join_timeout_handler(void *ctx)
 	} else
 #endif
 	{
-		rtw_indicate_disconnect(adapter, 0, _FALSE);
+		rtw_indicate_disconnect(adapter, pmlmepriv->join_status, _FALSE);
 		free_scanqueue(pmlmepriv);/* ??? */
 
 #ifdef CONFIG_IOCTL_CFG80211
 		/* indicate disconnect for the case that join_timeout and check_fwstate != FW_LINKED */
-		rtw_cfg80211_indicate_disconnect(adapter, 0, _FALSE);
+		rtw_cfg80211_indicate_disconnect(adapter, pmlmepriv->join_status, _FALSE);
 #endif /* CONFIG_IOCTL_CFG80211 */
 
 	}
 
+	pmlmepriv->join_status = 0; /* reset */
+
 	_exit_critical_bh(&pmlmepriv->lock, &irqL);
 
 
@@ -2965,9 +3138,11 @@ void rtw_scan_timeout_handler(void *ctx)
 
 void rtw_mlme_reset_auto_scan_int(_adapter *adapter, u8 *reason)
 {
-	struct mlme_priv *mlme = &adapter->mlmepriv;
-	struct mlme_ext_priv	*pmlmeext = &adapter->mlmeextpriv;
-	struct mlme_ext_info	*pmlmeinfo = &(pmlmeext->mlmext_info);
+#if defined(CONFIG_RTW_MESH) && defined(CONFIG_DFS_MASTER)
+#if CONFIG_RTW_MESH_OFFCH_CAND 
+	struct rf_ctl_t *rfctl = adapter_to_rfctl(adapter);
+#endif
+#endif
 	u8 u_ch;
 	u32 interval_ms = 0xffffffff; /* 0xffffffff: special value to make min() works well, also means no auto scan */
 
@@ -2975,16 +3150,29 @@ void rtw_mlme_reset_auto_scan_int(_adapter *adapter, u8 *reason)
 	rtw_mi_get_ch_setting_union(adapter, &u_ch, NULL, NULL);
 
 	if (hal_chk_bw_cap(adapter, BW_CAP_40M)
-	    && is_client_associated_to_ap(adapter) == _TRUE
-	    && u_ch >= 1 && u_ch <= 14
-	    && adapter->registrypriv.wifi_spec
-	    /* TODO: AP Connected is 40MHz capability? */
-	   ) {
+		&& is_client_associated_to_ap(adapter) == _TRUE
+		&& u_ch >= 1 && u_ch <= 14
+		&& adapter->registrypriv.wifi_spec
+		/* TODO: AP Connected is 40MHz capability? */
+	) {
 		interval_ms = rtw_min(interval_ms, 60 * 1000);
 		*reason |= RTW_AUTO_SCAN_REASON_2040_BSS;
 	}
 
-exit:
+#ifdef CONFIG_RTW_MESH
+	#if CONFIG_RTW_MESH_OFFCH_CAND
+	if (adapter->mesh_cfg.peer_sel_policy.offch_find_int_ms
+		&& rtw_mesh_offch_candidate_accepted(adapter)
+		#ifdef CONFIG_DFS_MASTER
+		&& (!rfctl->radar_detect_ch || (IS_CH_WAITING(rfctl) && !IS_UNDER_CAC(rfctl)))
+		#endif
+	) {
+		interval_ms = rtw_min(interval_ms, adapter->mesh_cfg.peer_sel_policy.offch_find_int_ms);
+		*reason |= RTW_AUTO_SCAN_REASON_MESH_OFFCH_CAND;
+	}
+	#endif
+#endif /* CONFIG_RTW_MESH */
+
 	if (interval_ms == 0xffffffff)
 		interval_ms = 0;
 
@@ -2997,8 +3185,25 @@ void rtw_drv_scan_by_self(_adapter *padapter, u8 reason)
 	struct sitesurvey_parm parm;
 	struct mlme_priv *pmlmepriv = &padapter->mlmepriv;
 	int i;
+#if 1
+	u8 ssc_chk;
 
+	ssc_chk = rtw_sitesurvey_condition_check(padapter, _FALSE);
+	if( ssc_chk == SS_DENY_BUSY_TRAFFIC) {
+		#ifdef CONFIG_LAYER2_ROAMING
+		if (rtw_chk_roam_flags(padapter, RTW_ROAM_ACTIVE) && pmlmepriv->need_to_roam == _TRUE)
+			RTW_INFO(FUNC_ADPT_FMT" need to roam, don't care BusyTraffic\n", FUNC_ADPT_ARG(padapter));
+		else
+		#endif
+			RTW_INFO(FUNC_ADPT_FMT" exit BusyTraffic\n", FUNC_ADPT_ARG(padapter));
+			goto exit;
+	}
+	else if (ssc_chk != SS_ALLOW)
+		goto exit;
 
+	if (!rtw_is_adapter_up(padapter))
+		goto exit;
+#else
 	if (rtw_is_scan_deny(padapter))
 		goto exit;
 
@@ -3031,6 +3236,7 @@ void rtw_drv_scan_by_self(_adapter *padapter, u8 reason)
 		goto exit;
 	}
 #endif
+#endif
 
 	RTW_INFO(FUNC_ADPT_FMT" reason:0x%02x\n", FUNC_ADPT_ARG(padapter), reason);
 
@@ -3173,7 +3379,8 @@ static void collect_sta_traffic_statistics(_adapter *adapter)
 {
 	struct macid_ctl_t *macid_ctl = &adapter->dvobj->macid_ctl;
 	struct sta_info *sta;
-	u16 curr_tx_mbytes = 0, curr_rx_mbytes = 0;
+	u64 curr_tx_bytes = 0, curr_rx_bytes = 0;
+	u32 curr_tx_mbytes = 0, curr_rx_mbytes = 0;
 	int i;
 
 	for (i = 0; i < MACID_NUM_SW_LIMIT; i++) {
@@ -3188,16 +3395,24 @@ static void collect_sta_traffic_statistics(_adapter *adapter)
 			if (sta->sta_stats.last_rx_mc_bytes > sta->sta_stats.rx_mc_bytes)
 				sta->sta_stats.last_rx_mc_bytes = sta->sta_stats.rx_mc_bytes;
 
-			curr_tx_mbytes = ((sta->sta_stats.tx_bytes - sta->sta_stats.last_tx_bytes) >> 20) / 2; /*MBps*/
-			curr_rx_mbytes = ((sta->sta_stats.rx_bytes - sta->sta_stats.last_rx_bytes) >> 20) / 2; /*MBps*/
-			sta->sta_stats.tx_tp_mbytes = curr_tx_mbytes;
-			sta->sta_stats.rx_tp_mbytes = curr_rx_mbytes;
+			curr_tx_bytes = sta->sta_stats.tx_bytes - sta->sta_stats.last_tx_bytes;
+			curr_rx_bytes = sta->sta_stats.rx_bytes - sta->sta_stats.last_rx_bytes;
+			sta->sta_stats.tx_tp_kbits = (curr_tx_bytes * 8 / 2) >> 10;/*Kbps*/
+			sta->sta_stats.rx_tp_kbits = (curr_rx_bytes * 8 / 2) >> 10;/*Kbps*/
+
+			sta->sta_stats.smooth_tx_tp_kbits = (sta->sta_stats.smooth_tx_tp_kbits * 6 / 10) + (sta->sta_stats.tx_tp_kbits * 4 / 10);/*Kbps*/
+			sta->sta_stats.smooth_rx_tp_kbits = (sta->sta_stats.smooth_rx_tp_kbits * 6 / 10) + (sta->sta_stats.rx_tp_kbits * 4 / 10);/*Kbps*/
+
+			curr_tx_mbytes = (curr_tx_bytes / 2) >> 20;/*MBps*/
+			curr_rx_mbytes = (curr_rx_bytes / 2) >> 20;/*MBps*/
 
 			sta->cmn.tx_moving_average_tp =
-				(sta->cmn.tx_moving_average_tp / 10) + (curr_tx_mbytes * 9 / 10);
+				(sta->cmn.tx_moving_average_tp / 10) + (curr_tx_mbytes * 9 / 10); /*MBps*/
 
 			sta->cmn.rx_moving_average_tp =
-				(sta->cmn.rx_moving_average_tp / 10) + (curr_rx_mbytes * 9 /10);
+				(sta->cmn.rx_moving_average_tp / 10) + (curr_rx_mbytes * 9 /10); /*MBps*/
+
+			rtw_collect_bcn_info(sta->padapter);
 
 			if (adapter->bsta_tp_dump)
 				dump_sta_traffic(RTW_DBGDUMP, adapter, sta);
@@ -3248,8 +3463,8 @@ static void collect_traffic_statistics(_adapter *padapter)
 	pdvobjpriv->traffic_stat.last_tx_bytes = pdvobjpriv->traffic_stat.tx_bytes;
 	pdvobjpriv->traffic_stat.last_rx_bytes = pdvobjpriv->traffic_stat.rx_bytes;
 
-	pdvobjpriv->traffic_stat.cur_tx_tp = (u32)(pdvobjpriv->traffic_stat.cur_tx_bytes * 8 / 2 / 1024 / 1024);
-	pdvobjpriv->traffic_stat.cur_rx_tp = (u32)(pdvobjpriv->traffic_stat.cur_rx_bytes * 8 / 2 / 1024 / 1024);
+	pdvobjpriv->traffic_stat.cur_tx_tp = (u32)(pdvobjpriv->traffic_stat.cur_tx_bytes * 8 / 2 / 1024 / 1024);/*Mbps*/
+	pdvobjpriv->traffic_stat.cur_rx_tp = (u32)(pdvobjpriv->traffic_stat.cur_rx_bytes * 8 / 2 / 1024 / 1024);/*Mbps*/
 
 	#ifdef DBG_TRAFFIC_STATISTIC
 	RTW_INFO("\n========================\n");
@@ -3259,9 +3474,16 @@ static void collect_traffic_statistics(_adapter *padapter)
 	RTW_INFO("last_tx_bytes:%lld\n", pdvobjpriv->traffic_stat.last_tx_bytes);
 	RTW_INFO("last_rx_bytes:%lld\n", pdvobjpriv->traffic_stat.last_rx_bytes);
 
-	RTW_INFO("cur_tx_tp:%d\n", pdvobjpriv->traffic_stat.cur_tx_tp);
-	RTW_INFO("cur_rx_tp:%d\n", pdvobjpriv->traffic_stat.cur_rx_tp);
+	RTW_INFO("cur_tx_tp:%d (Mbps)\n", pdvobjpriv->traffic_stat.cur_tx_tp);
+	RTW_INFO("cur_rx_tp:%d (Mbps)\n", pdvobjpriv->traffic_stat.cur_rx_tp);
 	#endif
+
+#ifdef CONFIG_RTW_NAPI
+#ifdef CONFIG_RTW_NAPI_DYNAMIC
+	dynamic_napi_th_chk (padapter);
+#endif /* CONFIG_RTW_NAPI_DYNAMIC */
+#endif
+	
 }
 
 void rtw_dynamic_check_timer_handlder(void *ctx)
@@ -3339,6 +3561,16 @@ static int rtw_check_roaming_candidate(struct mlme_priv *mlme
 {
 	int updated = _FALSE;
 	_adapter *adapter = container_of(mlme, _adapter, mlmepriv);
+	struct rf_ctl_t *rfctl = adapter_to_rfctl(adapter);
+	RT_CHANNEL_INFO *chset = rfctl->channel_set;
+	u8 ch = competitor->network.Configuration.DSConfig;
+
+	if (rtw_chset_search_ch(chset, ch) < 0)
+		goto exit;
+	if (IS_DFS_SLAVE_WITH_RD(rfctl)
+		&& !rtw_odm_dfs_domain_unknown(rfctl_to_dvobj(rfctl))
+		&& rtw_chset_is_ch_non_ocp(chset, ch))
+		goto exit;
 
 #if defined(CONFIG_RTW_REPEATER_SON) &&  (!defined(CONFIG_RTW_REPEATER_SON_ROOT))
 	if (rtw_rson_isupdate_roamcan(mlme, candidate, competitor))
@@ -3417,8 +3649,6 @@ int rtw_select_roaming_candidate(struct mlme_priv *mlme)
 	_queue	*queue	= &(mlme->scanned_queue);
 	struct	wlan_network	*pnetwork = NULL;
 	struct	wlan_network	*candidate = NULL;
-	u8		bSupportAntDiv = _FALSE;
-
 
 	if (mlme->cur_network_scanned == NULL) {
 		rtw_warn_on(1);
@@ -3508,8 +3738,15 @@ static int rtw_check_join_candidate(struct mlme_priv *mlme
 {
 	int updated = _FALSE;
 	_adapter *adapter = container_of(mlme, _adapter, mlmepriv);
+	struct rf_ctl_t *rfctl = adapter_to_rfctl(adapter);
+	RT_CHANNEL_INFO *chset = rfctl->channel_set;
+	u8 ch = competitor->network.Configuration.DSConfig;
 
-	if (rtw_chset_search_ch(adapter_to_chset(adapter), competitor->network.Configuration.DSConfig) < 0)
+	if (rtw_chset_search_ch(chset, ch) < 0)
+		goto exit;
+	if (IS_DFS_SLAVE_WITH_RD(rfctl)
+		&& !rtw_odm_dfs_domain_unknown(rfctl_to_dvobj(rfctl))
+		&& rtw_chset_is_ch_non_ocp(chset, ch))
 		goto exit;
 
 #if defined(CONFIG_RTW_REPEATER_SON) &&  (!defined(CONFIG_RTW_REPEATER_SON_ROOT))
@@ -3599,8 +3836,9 @@ int rtw_select_and_join_from_scanned_queue(struct mlme_priv *pmlmepriv)
 	_queue	*queue	= &(pmlmepriv->scanned_queue);
 	struct	wlan_network	*pnetwork = NULL;
 	struct	wlan_network	*candidate = NULL;
+#ifdef CONFIG_ANTENNA_DIVERSITY
 	u8		bSupportAntDiv = _FALSE;
-
+#endif
 
 	adapter = (_adapter *)pmlmepriv->nic_hdl;
 
@@ -3671,7 +3909,7 @@ candidate_exist:
 		{
 			rtw_disassoc_cmd(adapter, 0, 0);
 			rtw_indicate_disconnect(adapter, 0, _FALSE);
-			rtw_free_assoc_resources(adapter, 0);
+			rtw_free_assoc_resources_cmd(adapter, _TRUE, 0);
 		}
 	}
 
@@ -3746,7 +3984,6 @@ sint rtw_set_key(_adapter *adapter, struct security_priv *psecuritypriv, sint ke
 	struct cmd_obj		*pcmd;
 	struct setkey_parm	*psetkeyparm;
 	struct cmd_priv		*pcmdpriv = &(adapter->cmdpriv);
-	struct mlme_priv		*pmlmepriv = &(adapter->mlmepriv);
 	sint	res = _SUCCESS;
 
 
@@ -4099,16 +4336,13 @@ exit:
 
 sint rtw_restruct_sec_ie(_adapter *adapter, u8 *out_ie)
 {
-	u8 authmode = 0x0, securitytype, match;
-	u8 sec_ie[255], uncst_oui[4], bkup_ie[255];
-	u8 wpa_oui[4] = {0x0, 0x50, 0xf2, 0x01};
-	uint	ielength = 0, cnt, remove_cnt;
+	u8 authmode = 0x0;
+	uint	ielength = 0;
 	int iEntry;
 
 	struct mlme_priv *pmlmepriv = &adapter->mlmepriv;
 	struct security_priv *psecuritypriv = &adapter->securitypriv;
 	uint	ndisauthmode = psecuritypriv->ndisauthtype;
-	uint ndissecuritytype = psecuritypriv->ndisencryptstatus;
 
 	if ((ndisauthmode == Ndis802_11AuthModeWPA) || (ndisauthmode == Ndis802_11AuthModeWPAPSK))
 		authmode = _WPA_IE_ID_;
@@ -4339,15 +4573,23 @@ void	rtw_ht_use_default_setting(_adapter *padapter)
 	/* Beamforming setting */
 	CLEAR_FLAGS(phtpriv->beamform_cap);
 #ifdef CONFIG_BEAMFORMING
-	rtw_hal_get_def_var(padapter, HAL_DEF_EXPLICIT_BEAMFORMER, (u8 *)&bHwSupportBeamformer);
-	rtw_hal_get_def_var(padapter, HAL_DEF_EXPLICIT_BEAMFORMEE, (u8 *)&bHwSupportBeamformee);
-	if (TEST_FLAG(pregistrypriv->beamform_cap, BIT4) && bHwSupportBeamformer) {
-		SET_FLAG(phtpriv->beamform_cap, BEAMFORMING_HT_BEAMFORMER_ENABLE);
-		RTW_INFO("[HT] HAL Support Beamformer\n");
-	}
-	if (TEST_FLAG(pregistrypriv->beamform_cap, BIT5) && bHwSupportBeamformee) {
-		SET_FLAG(phtpriv->beamform_cap, BEAMFORMING_HT_BEAMFORMEE_ENABLE);
-		RTW_INFO("[HT] HAL Support Beamformee\n");
+#ifdef RTW_BEAMFORMING_VERSION_2
+	/* only enable beamforming in STA client mode */
+	if (MLME_IS_STA(padapter) && !MLME_IS_GC(padapter)
+				  && !MLME_IS_ADHOC(padapter)
+				  && !MLME_IS_MESH(padapter))
+#endif
+	{
+		rtw_hal_get_def_var(padapter, HAL_DEF_EXPLICIT_BEAMFORMER, (u8 *)&bHwSupportBeamformer);
+		rtw_hal_get_def_var(padapter, HAL_DEF_EXPLICIT_BEAMFORMEE, (u8 *)&bHwSupportBeamformee);
+		if (TEST_FLAG(pregistrypriv->beamform_cap, BIT4) && bHwSupportBeamformer) {
+			SET_FLAG(phtpriv->beamform_cap, BEAMFORMING_HT_BEAMFORMER_ENABLE);
+			RTW_INFO("[HT] HAL Support Beamformer\n");
+		}
+		if (TEST_FLAG(pregistrypriv->beamform_cap, BIT5) && bHwSupportBeamformee) {
+			SET_FLAG(phtpriv->beamform_cap, BEAMFORMING_HT_BEAMFORMEE_ENABLE);
+			RTW_INFO("[HT] HAL Support Beamformee\n");
+		}
 	}
 #endif /* CONFIG_BEAMFORMING */
 }
@@ -4365,7 +4607,7 @@ void rtw_build_wmm_ie_ht(_adapter *padapter, u8 *out_ie, uint *pout_len)
 		padapter->mlmepriv.qospriv.qos_option = 1;
 	}
 }
-
+#if defined(CONFIG_80211N_HT)
 /* the fucntion is >= passive_level */
 unsigned int rtw_restructure_ht_ie(_adapter *padapter, u8 *in_ie, u8 *out_ie, uint in_len, uint *pout_len, u8 channel)
 {
@@ -4375,7 +4617,7 @@ unsigned int rtw_restructure_ht_ie(_adapter *padapter, u8 *in_ie, u8 *out_ie, ui
 	HT_CAP_AMPDU_DENSITY best_ampdu_density;
 	unsigned char *p, *pframe;
 	struct rtw_ieee80211_ht_cap ht_capie;
-	u8	cbw40_enable = 0, rf_type = 0, operation_bw = 0, rf_num = 0, rx_stbc_nss = 0, rx_nss = 0;
+	u8	cbw40_enable = 0, rf_type = 0, rf_num = 0, rx_stbc_nss = 0, rx_nss = 0;
 	struct registry_priv *pregistrypriv = &padapter->registrypriv;
 	struct mlme_priv	*pmlmepriv = &padapter->mlmepriv;
 	struct ht_priv		*phtpriv = &pmlmepriv->htpriv;
@@ -4397,36 +4639,7 @@ unsigned int rtw_restructure_ht_ie(_adapter *padapter, u8 *in_ie, u8 *out_ie, ui
 	if (phtpriv->sgi_20m)
 		ht_capie.cap_info |= IEEE80211_HT_CAP_SGI_20;
 
-	/* Get HT BW */
-	if (in_ie == NULL) {
-		/* TDLS: TODO 20/40 issue */
-		if (check_fwstate(pmlmepriv, WIFI_STATION_STATE)) {
-			operation_bw = padapter->mlmeextpriv.cur_bwmode;
-			if (operation_bw > CHANNEL_WIDTH_40)
-				operation_bw = CHANNEL_WIDTH_40;
-		} else
-			/* TDLS: TODO 40? */
-			operation_bw = CHANNEL_WIDTH_40;
-	} else {
-		p = rtw_get_ie(in_ie, _HT_ADD_INFO_IE_, &ielen, in_len);
-		if (p && (ielen == sizeof(struct ieee80211_ht_addt_info))) {
-			struct HT_info_element *pht_info = (struct HT_info_element *)(p + 2);
-			if (pht_info->infos[0] & BIT(2)) {
-				switch (pht_info->infos[0] & 0x3) {
-				case 1:
-				case 3:
-					operation_bw = CHANNEL_WIDTH_40;
-					break;
-				default:
-					operation_bw = CHANNEL_WIDTH_20;
-					break;
-				}
-			} else
-				operation_bw = CHANNEL_WIDTH_20;
-		}
-	}
-
-	/* to disable 40M Hz support while gd_bw_40MHz_en = 0 */
+	/* check if 40MHz is allowed according to hal cap and registry */
 	if (hal_chk_bw_cap(padapter, BW_CAP_40M)) {
 		if (channel > 14) {
 			if (REGSTY_IS_BW_5G_SUPPORT(pregistrypriv, CHANNEL_WIDTH_40))
@@ -4437,10 +4650,61 @@ unsigned int rtw_restructure_ht_ie(_adapter *padapter, u8 *in_ie, u8 *out_ie, ui
 		}
 	}
 
-	if ((cbw40_enable == 1) && (operation_bw == CHANNEL_WIDTH_40)) {
-		ht_capie.cap_info |= IEEE80211_HT_CAP_SUP_WIDTH;
-		if (phtpriv->sgi_40m)
-			ht_capie.cap_info |= IEEE80211_HT_CAP_SGI_40;
+	if (cbw40_enable) {
+		struct rf_ctl_t *rfctl = adapter_to_rfctl(padapter);
+		RT_CHANNEL_INFO *chset = rfctl->channel_set;
+		u8 oper_bw = CHANNEL_WIDTH_20, oper_offset = HAL_PRIME_CHNL_OFFSET_DONT_CARE;
+
+		if (in_ie == NULL) {
+			/* TDLS: TODO 20/40 issue */
+			if (check_fwstate(pmlmepriv, WIFI_STATION_STATE)) {
+				oper_bw = padapter->mlmeextpriv.cur_bwmode;
+				if (oper_bw > CHANNEL_WIDTH_40)
+					oper_bw = CHANNEL_WIDTH_40;
+			} else
+				/* TDLS: TODO 40? */
+				oper_bw = CHANNEL_WIDTH_40;
+		} else {
+			p = rtw_get_ie(in_ie, WLAN_EID_HT_OPERATION, &ielen, in_len);
+			if (p && ielen == HT_OP_IE_LEN) {
+				if (GET_HT_OP_ELE_STA_CHL_WIDTH(p + 2)) {
+					switch (GET_HT_OP_ELE_2ND_CHL_OFFSET(p + 2)) {
+					case SCA:
+						oper_bw = CHANNEL_WIDTH_40;
+						oper_offset = HAL_PRIME_CHNL_OFFSET_LOWER;
+						break;
+					case SCB:
+						oper_bw = CHANNEL_WIDTH_40;
+						oper_offset = HAL_PRIME_CHNL_OFFSET_UPPER;
+						break;
+					}
+				}
+			}
+		}
+
+		/* adjust bw to fit in channel plan setting */
+		if (oper_bw == CHANNEL_WIDTH_40
+			&& oper_offset != HAL_PRIME_CHNL_OFFSET_DONT_CARE /* check this because TDLS has no info to set offset */
+			&& (!rtw_chset_is_chbw_valid(chset, channel, oper_bw, oper_offset)
+				|| (IS_DFS_SLAVE_WITH_RD(rfctl)
+					&& !rtw_odm_dfs_domain_unknown(rfctl_to_dvobj(rfctl))
+					&& rtw_chset_is_chbw_non_ocp(chset, channel, oper_bw, oper_offset))
+				)
+		) {
+			oper_bw = CHANNEL_WIDTH_20;
+			oper_offset = HAL_PRIME_CHNL_OFFSET_DONT_CARE;
+			rtw_warn_on(!rtw_chset_is_chbw_valid(chset, channel, oper_bw, oper_offset));
+			if (IS_DFS_SLAVE_WITH_RD(rfctl) && !rtw_odm_dfs_domain_unknown(rfctl_to_dvobj(rfctl)))
+				rtw_warn_on(rtw_chset_is_chbw_non_ocp(chset, channel, oper_bw, oper_offset));
+		}
+
+		if (oper_bw == CHANNEL_WIDTH_40) {
+			ht_capie.cap_info |= IEEE80211_HT_CAP_SUP_WIDTH;
+			if (phtpriv->sgi_40m)
+				ht_capie.cap_info |= IEEE80211_HT_CAP_SGI_40;
+		}
+
+		cbw40_enable = oper_bw == CHANNEL_WIDTH_40 ? 1 : 0;
 	}
 
 	/* todo: disable SM power save mode */
@@ -4484,7 +4748,7 @@ unsigned int rtw_restructure_ht_ie(_adapter *padapter, u8 *in_ie, u8 *out_ie, ui
 		break;
 	case 2:
 		#ifdef CONFIG_DISABLE_MCS13TO15
-		if (((cbw40_enable == 1) && (operation_bw == CHANNEL_WIDTH_40)) && (pregistrypriv->wifi_spec != 1))
+		if (cbw40_enable && pregistrypriv->wifi_spec != 1)
 			set_mcs_rate_by_mask(ht_capie.supp_mcs_set, MCS_RATE_2R_13TO15_OFF);
 		else
 		#endif
@@ -4570,7 +4834,7 @@ unsigned int rtw_restructure_ht_ie(_adapter *padapter, u8 *in_ie, u8 *out_ie, ui
 #ifdef CONFIG_80211AC_VHT
 		/* IOT action suggested by Yu Chen 2017/3/3 */
 		if ((pmlmeinfo->assoc_AP_vendor == HT_IOT_PEER_BROADCOM) &&
-			!GET_VHT_CAPABILITY_ELE_MU_BFER(&pvhtpriv->beamform_cap))
+			!pvhtpriv->ap_is_mu_bfer)
 			rf_num = (rf_num >= 2 ? 2 : rf_num);
 #endif
 		SET_HT_CAP_TXBF_COMP_STEERING_NUM_ANTENNAS(&ht_capie, rf_num);
@@ -4738,6 +5002,7 @@ void rtw_update_ht_cap(_adapter *padapter, u8 *pie, uint ie_len, u8 channel)
 	/*  */
 	pmlmeinfo->HT_protection = pmlmeinfo->HT_info.infos[1] & 0x3;
 }
+#endif
 
 #ifdef CONFIG_TDLS
 void rtw_issue_addbareq_cmd_tdls(_adapter *padapter, struct xmit_frame *pxmitframe)
@@ -4770,6 +5035,7 @@ void rtw_issue_addbareq_cmd_tdls(_adapter *padapter, struct xmit_frame *pxmitfra
 }
 #endif /* CONFIG_TDLS */
 
+#ifdef CONFIG_80211N_HT
 void rtw_issue_addbareq_cmd(_adapter *padapter, struct xmit_frame *pxmitframe)
 {
 	u8 issued;
@@ -4820,7 +5086,7 @@ void rtw_issue_addbareq_cmd(_adapter *padapter, struct xmit_frame *pxmitframe)
 	}
 
 }
-
+#endif /* CONFIG_80211N_HT */
 void rtw_append_exented_cap(_adapter *padapter, u8 *out_ie, uint *pout_len)
 {
 	struct mlme_priv	*pmlmepriv = &padapter->mlmepriv;
@@ -4929,8 +5195,10 @@ bool rtw_adjust_chbw(_adapter *adapter, u8 req_ch, u8 *req_bw, u8 *req_offset)
 	struct registry_priv *regsty = adapter_to_regsty(adapter);
 	u8 allowed_bw;
 
-	if (req_ch <= 14)
+	if (req_ch < 14)
 		allowed_bw = REGSTY_BW_2G(regsty);
+	else if (req_ch == 14)
+		allowed_bw = CHANNEL_WIDTH_20;
 	else
 		allowed_bw = REGSTY_BW_5G(regsty);
 
@@ -5062,3 +5330,17 @@ inline void rtw_wfd_st_switch(struct sta_info *sta, bool on)
 		rtw_st_ctl_unregister(&sta->st_ctl, SESSION_TRACKER_REG_ID_WFD);
 #endif
 }
+
+void dump_arp_pkt(void *sel, u8 *da, u8 *sa, u8 *arp, bool tx)
+{
+	RTW_PRINT_SEL(sel, "%s ARP da="MAC_FMT", sa="MAC_FMT"\n"
+		, tx ? "send" : "recv", MAC_ARG(da), MAC_ARG(sa));
+	RTW_PRINT_SEL(sel, "htype=%u, ptype=0x%04x, hlen=%u, plen=%u, oper=%u\n"
+		, GET_ARP_HTYPE(arp), GET_ARP_PTYPE(arp), GET_ARP_HLEN(arp)
+		, GET_ARP_PLEN(arp), GET_ARP_OPER(arp));
+	RTW_PRINT_SEL(sel, "sha="MAC_FMT", spa="IP_FMT"\n"
+		, MAC_ARG(ARP_SENDER_MAC_ADDR(arp)), IP_ARG(ARP_SENDER_IP_ADDR(arp)));
+	RTW_PRINT_SEL(sel, "tha="MAC_FMT", tpa="IP_FMT"\n"
+		, MAC_ARG(ARP_TARGET_MAC_ADDR(arp)), IP_ARG(ARP_TARGET_IP_ADDR(arp)));
+}
+
diff --git a/rtl8723DS/core/rtw_mlme_ext.c b/rtl8723DS/core/rtw_mlme_ext.c
index c29bb75..1770042 100755
--- a/rtl8723DS/core/rtw_mlme_ext.c
+++ b/rtl8723DS/core/rtw_mlme_ext.c
@@ -85,7 +85,10 @@ struct action_handler OnAction_tbl[] = {
 	{RTW_WLAN_CATEGORY_WNM, "ACTION_WNM", &on_action_wnm},
 #endif
 	{RTW_WLAN_CATEGORY_UNPROTECTED_WNM, "ACTION_UNPROTECTED_WNM", &DoReserved},
-	{RTW_WLAN_CATEGORY_SELF_PROTECTED, "ACTION_SELF_PROTECTED", &DoReserved},
+#ifdef CONFIG_RTW_MESH
+	{RTW_WLAN_CATEGORY_MESH, "ACTION_MESH", &on_action_mesh},
+	{RTW_WLAN_CATEGORY_SELF_PROTECTED, "ACTION_SELF_PROTECTED", &on_action_self_protected},
+#endif
 	{RTW_WLAN_CATEGORY_WMM, "ACTION_WMM", &OnAction_wmm},
 	{RTW_WLAN_CATEGORY_VHT, "ACTION_VHT", &OnAction_vht},
 	{RTW_WLAN_CATEGORY_P2P, "ACTION_P2P", &OnAction_p2p},
@@ -111,388 +114,6 @@ unsigned char RSN_TKIP_CIPHER[4] = {0x00, 0x0f, 0xac, 0x02};
 
 extern unsigned char REALTEK_96B_IE[];
 
-#ifdef LEGACY_CHANNEL_PLAN_REF
-/********************************************************
-ChannelPlan definitions
-*********************************************************/
-static RT_CHANNEL_PLAN legacy_channel_plan[] = {
-	/* 0x00, RTW_CHPLAN_FCC */						{{1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112, 116, 132, 136, 140, 149, 153, 157, 161, 165}, 32},
-	/* 0x01, RTW_CHPLAN_IC */						{{1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112, 116, 136, 140, 149, 153, 157, 161, 165}, 31},
-	/* 0x02, RTW_CHPLAN_ETSI */						{{1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140}, 32},
-	/* 0x03, RTW_CHPLAN_SPAIN */						{{1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13}, 13},
-	/* 0x04, RTW_CHPLAN_FRANCE */					{{1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13}, 13},
-	/* 0x05, RTW_CHPLAN_MKK */						{{1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13}, 13},
-	/* 0x06, RTW_CHPLAN_MKK1 */						{{1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13}, 13},
-	/* 0x07, RTW_CHPLAN_ISRAEL */					{{1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 36, 40, 44, 48, 52, 56, 60, 64}, 21},
-	/* 0x08, RTW_CHPLAN_TELEC */						{{1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 36, 40, 44, 48, 52, 56, 60, 64}, 22},
-	/* 0x09, RTW_CHPLAN_GLOBAL_DOAMIN */			{{1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14}, 14},
-	/* 0x0A, RTW_CHPLAN_WORLD_WIDE_13 */			{{1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13}, 13},
-	/* 0x0B, RTW_CHPLAN_TAIWAN */					{{1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 56, 60, 64, 100, 104, 108, 112, 116, 136, 140, 149, 153, 157, 161, 165}, 26},
-	/* 0x0C, RTW_CHPLAN_CHINA */					{{1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 149, 153, 157, 161, 165}, 18},
-	/* 0x0D, RTW_CHPLAN_SINGAPORE_INDIA_MEXICO */	{{1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 36, 40, 44, 48, 52, 56, 60, 64, 149, 153, 157, 161, 165}, 24},
-	/* 0x0E, RTW_CHPLAN_KOREA */					{{1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112, 116, 120, 124, 149, 153, 157, 161, 165}, 31},
-	/* 0x0F, RTW_CHPLAN_TURKEY */					{{1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 36, 40, 44, 48, 52, 56, 60, 64}, 19},
-	/* 0x10, RTW_CHPLAN_JAPAN */						{{1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140}, 32},
-	/* 0x11, RTW_CHPLAN_FCC_NO_DFS */				{{1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 36, 40, 44, 48, 149, 153, 157, 161, 165}, 20},
-	/* 0x12, RTW_CHPLAN_JAPAN_NO_DFS */				{{1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 36, 40, 44, 48}, 17},
-	/* 0x13, RTW_CHPLAN_WORLD_WIDE_5G */			{{1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140, 149, 153, 157, 161, 165}, 37},
-	/* 0x14, RTW_CHPLAN_TAIWAN_NO_DFS */			{{1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 56, 60, 64, 149, 153, 157, 161, 165}, 19},
-};
-#endif
-
-enum rtw_rd_2g {
-	RTW_RD_2G_NULL = 0,
-	RTW_RD_2G_WORLD = 1,	/* Worldwird 13 */
-	RTW_RD_2G_ETSI1 = 2,	/* Europe */
-	RTW_RD_2G_FCC1 = 3,		/* US */
-	RTW_RD_2G_MKK1 = 4,		/* Japan */
-	RTW_RD_2G_ETSI2 = 5,	/* France */
-	RTW_RD_2G_GLOBAL = 6,	/* Global domain */
-	RTW_RD_2G_MKK2 = 7,		/* Japan */
-	RTW_RD_2G_FCC2 = 8,		/* US */
-	RTW_RD_2G_IC1 = 9,		/* Canada */
-
-	RTW_RD_2G_MAX,
-};
-
-enum rtw_rd_5g {
-	RTW_RD_5G_NULL = 0,		/*	*/
-	RTW_RD_5G_ETSI1 = 1,	/* Europe */
-	RTW_RD_5G_ETSI2 = 2,	/* Australia, New Zealand */
-	RTW_RD_5G_ETSI3 = 3,	/* Russia */
-	RTW_RD_5G_FCC1 = 4,		/* US */
-	RTW_RD_5G_FCC2 = 5,		/* FCC w/o DFS Channels */
-	RTW_RD_5G_FCC3 = 6,		/* Bolivia, Chile, El Salvador, Venezuela */
-	RTW_RD_5G_FCC4 = 7,		/* Venezuela */
-	RTW_RD_5G_FCC5 = 8,		/* China */
-	RTW_RD_5G_FCC6 = 9,		/*	*/
-	RTW_RD_5G_FCC7 = 10,	/* US(w/o Weather radar) */
-	RTW_RD_5G_IC1 = 11,		/* Canada(w/o Weather radar) */
-	RTW_RD_5G_KCC1 = 12,	/* Korea */
-	RTW_RD_5G_MKK1 = 13,	/* Japan */
-	RTW_RD_5G_MKK2 = 14,	/* Japan (W52, W53) */
-	RTW_RD_5G_MKK3 = 15,	/* Japan (W56) */
-	RTW_RD_5G_NCC1 = 16,	/* Taiwan, (w/o Weather radar) */
-	RTW_RD_5G_NCC2 = 17,	/* Taiwan, Band2, Band4 */
-	RTW_RD_5G_NCC3 = 18,	/* Taiwan w/o DFS, Band4 only */
-	RTW_RD_5G_ETSI4 = 19,	/* Europe w/o DFS, Band1 only */
-	RTW_RD_5G_ETSI5 = 20,	/* Australia, New Zealand(w/o Weather radar) */
-	RTW_RD_5G_FCC8 = 21,	/* Latin America */
-	RTW_RD_5G_ETSI6 = 22,	/* Israel, Bahrain, Egypt, India, China, Malaysia */
-	RTW_RD_5G_ETSI7 = 23,	/* China */
-	RTW_RD_5G_ETSI8 = 24,	/* Jordan */
-	RTW_RD_5G_ETSI9 = 25,	/* Lebanon */
-	RTW_RD_5G_ETSI10 = 26,	/* Qatar */
-	RTW_RD_5G_ETSI11 = 27,	/* Russia */
-	RTW_RD_5G_NCC4 = 28,	/* Taiwan, (w/o Weather radar) */
-	RTW_RD_5G_ETSI12 = 29,	/* Indonesia */
-	RTW_RD_5G_FCC9 = 30,	/* (w/o Weather radar) */
-	RTW_RD_5G_ETSI13 = 31,	/* (w/o Weather radar) */
-	RTW_RD_5G_FCC10 = 32,	/* Argentina(w/o Weather radar) */
-	RTW_RD_5G_MKK4 = 33,	/* Japan (W52) */
-	RTW_RD_5G_ETSI14 = 34,	/* Russia */
-	RTW_RD_5G_FCC11 = 35,	/* US(include CH144) */
-	RTW_RD_5G_ETSI15 = 36,	/* Malaysia */
-	RTW_RD_5G_MKK5 = 37,	/* Japan */
-	RTW_RD_5G_ETSI16 = 38,	/* Europe */
-	RTW_RD_5G_ETSI17 = 39,	/* Europe */
-	RTW_RD_5G_FCC12 = 40,	/* FCC */
-	RTW_RD_5G_FCC13 = 41,	/* FCC */
-	RTW_RD_5G_FCC14 = 42,	/* FCC w/o Weather radar(w/o 5600~5650MHz) */
-	RTW_RD_5G_FCC15 = 43,	/* FCC w/o Band3 */
-	RTW_RD_5G_FCC16 = 44,	/* FCC w/o Band3 */
-	RTW_RD_5G_ETSI18 = 45,	/* ETSI w/o DFS Band2&3 */
-	RTW_RD_5G_ETSI19 = 46,	/* Europe */
-	RTW_RD_5G_FCC17 = 47,	/* FCC w/o Weather radar(w/o 5600~5650MHz) */
-	RTW_RD_5G_ETSI20 = 48,	/* Europe */
-	RTW_RD_5G_IC2 = 49,		/* Canada(w/o Weather radar), include ch144 */
-	RTW_RD_5G_ETSI21 = 50,	/* Australia, New Zealand(w/o Weather radar) */
-	RTW_RD_5G_FCC18 = 51,	/*  */
-	RTW_RD_5G_WORLD = 52,	/* Worldwide */
-	RTW_RD_5G_CHILE1 = 53,	/* Chile */
-	RTW_RD_5G_ACMA1 = 54,	/* Australia, New Zealand (w/o Weather radar) (w/o Ch120~Ch128) */
-
-	/* === Below are driver defined for legacy channel plan compatible, DON'T assign index ==== */
-	RTW_RD_5G_OLD_FCC1,
-	RTW_RD_5G_OLD_NCC1,
-	RTW_RD_5G_OLD_KCC1,
-
-	RTW_RD_5G_MAX,
-};
-
-static struct ch_list_t RTW_ChannelPlan2G[] = {
-	/* 0, RTW_RD_2G_NULL */		CH_LIST_ENT(0),
-	/* 1, RTW_RD_2G_WORLD */	CH_LIST_ENT(13, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13),
-	/* 2, RTW_RD_2G_ETSI1 */		CH_LIST_ENT(13, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13),
-	/* 3, RTW_RD_2G_FCC1 */		CH_LIST_ENT(11, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11),
-	/* 4, RTW_RD_2G_MKK1 */		CH_LIST_ENT(14, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14),
-	/* 5, RTW_RD_2G_ETSI2 */		CH_LIST_ENT(4, 10, 11, 12, 13),
-	/* 6, RTW_RD_2G_GLOBAL */	CH_LIST_ENT(14, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14),
-	/* 7, RTW_RD_2G_MKK2 */		CH_LIST_ENT(13, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13),
-	/* 8, RTW_RD_2G_FCC2 */		CH_LIST_ENT(13, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13),
-	/* 9, RTW_RD_2G_IC1 */		CH_LIST_ENT(13, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13),
-};
-
-#ifdef CONFIG_IEEE80211_BAND_5GHZ
-static struct ch_list_t RTW_ChannelPlan5G[] = {
-	/* 0, RTW_RD_5G_NULL */		CH_LIST_ENT(0),
-	/* 1, RTW_RD_5G_ETSI1 */		CH_LIST_ENT(19, 36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140),
-	/* 2, RTW_RD_5G_ETSI2 */		CH_LIST_ENT(24, 36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140, 149, 153, 157, 161, 165),
-	/* 3, RTW_RD_5G_ETSI3 */		CH_LIST_ENT(22, 36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112, 116, 120, 124, 128, 132, 149, 153, 157, 161, 165),
-	/* 4, RTW_RD_5G_FCC1 */		CH_LIST_ENT(24, 36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140, 149, 153, 157, 161, 165),
-	/* 5, RTW_RD_5G_FCC2 */		CH_LIST_ENT(9, 36, 40, 44, 48, 149, 153, 157, 161, 165),
-	/* 6, RTW_RD_5G_FCC3 */		CH_LIST_ENT(13, 36, 40, 44, 48, 52, 56, 60, 64, 149, 153, 157, 161, 165),
-	/* 7, RTW_RD_5G_FCC4 */		CH_LIST_ENT(12, 36, 40, 44, 48, 52, 56, 60, 64, 149, 153, 157, 161),
-	/* 8, RTW_RD_5G_FCC5 */		CH_LIST_ENT(5, 149, 153, 157, 161, 165),
-	/* 9, RTW_RD_5G_FCC6 */		CH_LIST_ENT(8, 36, 40, 44, 48, 52, 56, 60, 64),
-	/* 10, RTW_RD_5G_FCC7 */	CH_LIST_ENT(21, 36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112, 116, 132, 136, 140, 149, 153, 157, 161, 165),
-	/* 11, RTW_RD_5G_IC1 */		CH_LIST_ENT(21, 36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112, 116, 132, 136, 140, 149, 153, 157, 161, 165),
-	/* 12, RTW_RD_5G_KCC1 */	CH_LIST_ENT(19, 36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112, 116, 120, 124, 149, 153, 157, 161),
-	/* 13, RTW_RD_5G_MKK1 */	CH_LIST_ENT(19, 36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140),
-	/* 14, RTW_RD_5G_MKK2 */	CH_LIST_ENT(8, 36, 40, 44, 48, 52, 56, 60, 64),
-	/* 15, RTW_RD_5G_MKK3 */	CH_LIST_ENT(11, 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140),
-	/* 16, RTW_RD_5G_NCC1 */	CH_LIST_ENT(16, 56, 60, 64, 100, 104, 108, 112, 116, 132, 136, 140, 149, 153, 157, 161, 165),
-	/* 17, RTW_RD_5G_NCC2 */	CH_LIST_ENT(8, 56, 60, 64, 149, 153, 157, 161, 165),
-	/* 18, RTW_RD_5G_NCC3 */	CH_LIST_ENT(5, 149, 153, 157, 161, 165),
-	/* 19, RTW_RD_5G_ETSI4 */	CH_LIST_ENT(4, 36, 40, 44, 48),
-	/* 20, RTW_RD_5G_ETSI5 */	CH_LIST_ENT(21, 36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112, 116, 132, 136, 140, 149, 153, 157, 161, 165),
-	/* 21, RTW_RD_5G_FCC8 */	CH_LIST_ENT(4, 149, 153, 157, 161),
-	/* 22, RTW_RD_5G_ETSI6 */	CH_LIST_ENT(8, 36, 40, 44, 48, 52, 56, 60, 64),
-	/* 23, RTW_RD_5G_ETSI7 */	CH_LIST_ENT(13, 36, 40, 44, 48, 52, 56, 60, 64, 149, 153, 157, 161, 165),
-	/* 24, RTW_RD_5G_ETSI8 */	CH_LIST_ENT(9, 36, 40, 44, 48, 149, 153, 157, 161, 165),
-	/* 25, RTW_RD_5G_ETSI9 */	CH_LIST_ENT(11, 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140),
-	/* 26, RTW_RD_5G_ETSI10 */	CH_LIST_ENT(5, 149, 153, 157, 161, 165),
-	/* 27, RTW_RD_5G_ETSI11 */	CH_LIST_ENT(16, 36, 40, 44, 48, 52, 56, 60, 64, 132, 136, 140, 149, 153, 157, 161, 165),
-	/* 28, RTW_RD_5G_NCC4 */	CH_LIST_ENT(17, 52, 56, 60, 64, 100, 104, 108, 112, 116, 132, 136, 140, 149, 153, 157, 161, 165),
-	/* 29, RTW_RD_5G_ETSI12 */	CH_LIST_ENT(4, 149, 153, 157, 161),
-	/* 30, RTW_RD_5G_FCC9 */	CH_LIST_ENT(21, 36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112, 116, 132, 136, 140, 149, 153, 157, 161, 165),
-	/* 31, RTW_RD_5G_ETSI13 */	CH_LIST_ENT(16, 36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112, 116, 132, 136, 140),
-	/* 32, RTW_RD_5G_FCC10 */	CH_LIST_ENT(20, 36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112, 116, 132, 136, 140, 149, 153, 157, 161),
-	/* 33, RTW_RD_5G_MKK4 */	CH_LIST_ENT(4, 36, 40, 44, 48),
-	/* 34, RTW_RD_5G_ETSI14 */	CH_LIST_ENT(11, 36, 40, 44, 48, 52, 56, 60, 64, 132, 136, 140),
-	/* 35, RTW_RD_5G_FCC11 */	CH_LIST_ENT(25, 36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140, 144, 149, 153, 157, 161, 165),
-	/* 36, RTW_RD_5G_ETSI15 */	CH_LIST_ENT(21, 36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112, 116, 120, 124, 128, 149, 153, 157, 161, 165),
-	/* 37, RTW_RD_5G_MKK5 */	CH_LIST_ENT(24, 36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140, 149, 153, 157, 161, 165),
-	/* 38, RTW_RD_5G_ETSI16 */	CH_LIST_ENT(24, 36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140, 149, 153, 157, 161, 165),
-	/* 39, RTW_RD_5G_ETSI17 */	CH_LIST_ENT(24, 36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140, 149, 153, 157, 161, 165),
-	/* 40, RTW_RD_5G_FCC12*/	CH_LIST_ENT(24, 36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140, 149, 153, 157, 161, 165),
-	/* 41, RTW_RD_5G_FCC13 */	CH_LIST_ENT(24, 36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140, 149, 153, 157, 161, 165),
-	/* 42, RTW_RD_5G_FCC14 */	CH_LIST_ENT(21, 36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112, 116, 132, 136, 140, 149, 153, 157, 161, 165),
-	/* 43, RTW_RD_5G_FCC15 */	CH_LIST_ENT(13, 36, 40, 44, 48, 52, 56, 60, 64, 149, 153, 157, 161, 165),
-	/* 44, RTW_RD_5G_FCC16 */	CH_LIST_ENT(13, 36, 40, 44, 48, 52, 56, 60, 64, 149, 153, 157, 161, 165),
-	/* 45, RTW_RD_5G_ETSI18 */	CH_LIST_ENT(9, 36, 40, 44, 48, 149, 153, 157, 161, 165),
-	/* 46, RTW_RD_5G_ETSI19 */	CH_LIST_ENT(24, 36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140, 149, 153, 157, 161, 165),
-	/* 47, RTW_RD_5G_FCC17 */	CH_LIST_ENT(16, 36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112, 116, 132, 136, 140),
-	/* 48, RTW_RD_5G_ETSI20 */	CH_LIST_ENT(9, 52, 56, 60, 64, 149, 153, 157, 161, 165),
-	/* 49, RTW_RD_5G_IC2 */		CH_LIST_ENT(22, 36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112, 116, 132, 136, 140, 144, 149, 153, 157, 161, 165),
-	/* 50, RTW_RD_5G_ETSI21 */	CH_LIST_ENT(13, 100, 104, 108, 112, 116, 132, 136, 140, 149, 153, 157, 161, 165),
-	/* 51, RTW_RD_5G_FCC18 */	CH_LIST_ENT(8, 100, 104, 108, 112, 116, 132, 136, 140),
-	/* 52, RTW_RD_5G_WORLD */	CH_LIST_ENT(25, 36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140, 144, 149, 153, 157, 161, 165),
-	/* 53, RTW_RD_5G_CHILE1 */	CH_LIST_ENT(25, 36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140, 144, 149, 153, 157, 161, 165),
-	/* 54, RTW_RD_5G_ACMA1 */	CH_LIST_ENT(21, 36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112, 116, 132, 136, 140, 149, 153, 157, 161, 165),
-
-	/* === Below are driver defined for legacy channel plan compatible, NO static index assigned ==== */
-	/* RTW_RD_5G_OLD_FCC1 */	CH_LIST_ENT(20, 36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112, 116, 136, 140, 149, 153, 157, 161, 165),
-	/* RTW_RD_5G_OLD_NCC1 */	CH_LIST_ENT(15, 56, 60, 64, 100, 104, 108, 112, 116, 136, 140, 149, 153, 157, 161, 165),
-	/* RTW_RD_5G_OLD_KCC1 */	CH_LIST_ENT(20, 36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112, 116, 120, 124, 149, 153, 157, 161, 165),
-};
-#endif /* CONFIG_IEEE80211_BAND_5GHZ */
-
-static RT_CHANNEL_PLAN_MAP	RTW_ChannelPlanMap[RTW_CHPLAN_MAX] = {
-	/* ===== 0x00 ~ 0x1F, legacy channel plan ===== */
-	CHPLAN_ENT(RTW_RD_2G_FCC1,		RTW_RD_5G_KCC1,		TXPWR_LMT_FCC),		/* 0x00, RTW_CHPLAN_FCC */
-	CHPLAN_ENT(RTW_RD_2G_FCC1,		RTW_RD_5G_OLD_FCC1,	TXPWR_LMT_FCC),		/* 0x01, RTW_CHPLAN_IC */
-	CHPLAN_ENT(RTW_RD_2G_ETSI1,		RTW_RD_5G_ETSI1,	TXPWR_LMT_ETSI),	/* 0x02, RTW_CHPLAN_ETSI */
-	CHPLAN_ENT(RTW_RD_2G_ETSI1,		RTW_RD_5G_NULL,		TXPWR_LMT_ETSI),	/* 0x03, RTW_CHPLAN_SPAIN */
-	CHPLAN_ENT(RTW_RD_2G_ETSI1,		RTW_RD_5G_NULL,		TXPWR_LMT_ETSI),	/* 0x04, RTW_CHPLAN_FRANCE */
-	CHPLAN_ENT(RTW_RD_2G_MKK1,		RTW_RD_5G_NULL,		TXPWR_LMT_MKK),		/* 0x05, RTW_CHPLAN_MKK */
-	CHPLAN_ENT(RTW_RD_2G_MKK1,		RTW_RD_5G_NULL,		TXPWR_LMT_MKK),		/* 0x06, RTW_CHPLAN_MKK1 */
-	CHPLAN_ENT(RTW_RD_2G_ETSI1,		RTW_RD_5G_FCC6,		TXPWR_LMT_ETSI),	/* 0x07, RTW_CHPLAN_ISRAEL */
-	CHPLAN_ENT(RTW_RD_2G_MKK1,		RTW_RD_5G_FCC6,		TXPWR_LMT_MKK),		/* 0x08, RTW_CHPLAN_TELEC */
-	CHPLAN_ENT(RTW_RD_2G_MKK1,		RTW_RD_5G_NULL,		TXPWR_LMT_WW),		/* 0x09, RTW_CHPLAN_GLOBAL_DOAMIN */
-	CHPLAN_ENT(RTW_RD_2G_WORLD,		RTW_RD_5G_NULL,		TXPWR_LMT_WW),		/* 0x0A, RTW_CHPLAN_WORLD_WIDE_13 */
-	CHPLAN_ENT(RTW_RD_2G_FCC1,		RTW_RD_5G_OLD_NCC1,	TXPWR_LMT_FCC),		/* 0x0B, RTW_CHPLAN_TAIWAN */
-	CHPLAN_ENT(RTW_RD_2G_ETSI1,		RTW_RD_5G_FCC5,		TXPWR_LMT_ETSI),	/* 0x0C, RTW_CHPLAN_CHINA */
-	CHPLAN_ENT(RTW_RD_2G_FCC1,		RTW_RD_5G_FCC3,		TXPWR_LMT_WW),		/* 0x0D, RTW_CHPLAN_SINGAPORE_INDIA_MEXICO */ /* ETSI:Singapore, India. FCC:Mexico => WW */
-	CHPLAN_ENT(RTW_RD_2G_FCC1,		RTW_RD_5G_OLD_KCC1,	TXPWR_LMT_ETSI),	/* 0x0E, RTW_CHPLAN_KOREA */
-	CHPLAN_ENT(RTW_RD_2G_FCC1,		RTW_RD_5G_FCC6,		TXPWR_LMT_ETSI),	/* 0x0F, RTW_CHPLAN_TURKEY */
-	CHPLAN_ENT(RTW_RD_2G_ETSI1,		RTW_RD_5G_ETSI1,	TXPWR_LMT_MKK),		/* 0x10, RTW_CHPLAN_JAPAN */
-	CHPLAN_ENT(RTW_RD_2G_FCC1,		RTW_RD_5G_FCC2,		TXPWR_LMT_FCC),		/* 0x11, RTW_CHPLAN_FCC_NO_DFS */
-	CHPLAN_ENT(RTW_RD_2G_ETSI1,		RTW_RD_5G_FCC7,		TXPWR_LMT_MKK),		/* 0x12, RTW_CHPLAN_JAPAN_NO_DFS */
-	CHPLAN_ENT(RTW_RD_2G_WORLD,		RTW_RD_5G_FCC1,		TXPWR_LMT_WW),		/* 0x13, RTW_CHPLAN_WORLD_WIDE_5G */
-	CHPLAN_ENT(RTW_RD_2G_FCC1,		RTW_RD_5G_NCC2,		TXPWR_LMT_FCC),		/* 0x14, RTW_CHPLAN_TAIWAN_NO_DFS */
-	CHPLAN_ENT(RTW_RD_2G_WORLD,		RTW_RD_5G_FCC7,		TXPWR_LMT_ETSI),	/* 0x15, RTW_CHPLAN_ETSI_NO_DFS */
-	CHPLAN_ENT(RTW_RD_2G_WORLD,		RTW_RD_5G_NCC1,		TXPWR_LMT_ETSI),	/* 0x16, RTW_CHPLAN_KOREA_NO_DFS */
-	CHPLAN_ENT(RTW_RD_2G_MKK1,		RTW_RD_5G_FCC7,		TXPWR_LMT_MKK),		/* 0x17, RTW_CHPLAN_JAPAN_NO_DFS */
-	CHPLAN_ENT(RTW_RD_2G_NULL,		RTW_RD_5G_FCC5,		TXPWR_LMT_ETSI),	/* 0x18, RTW_CHPLAN_PAKISTAN_NO_DFS */
-	CHPLAN_ENT(RTW_RD_2G_FCC1,		RTW_RD_5G_FCC5,		TXPWR_LMT_FCC),		/* 0x19, RTW_CHPLAN_TAIWAN2_NO_DFS */
-	CHPLAN_ENT(RTW_RD_2G_NULL,		RTW_RD_5G_NULL,		TXPWR_LMT_WW),		/* 0x1A, */
-	CHPLAN_ENT(RTW_RD_2G_NULL,		RTW_RD_5G_NULL,		TXPWR_LMT_WW),		/* 0x1B, */
-	CHPLAN_ENT(RTW_RD_2G_NULL,		RTW_RD_5G_NULL,		TXPWR_LMT_WW),		/* 0x1C, */
-	CHPLAN_ENT(RTW_RD_2G_NULL,		RTW_RD_5G_NULL,		TXPWR_LMT_WW),		/* 0x1D, */
-	CHPLAN_ENT(RTW_RD_2G_NULL,		RTW_RD_5G_NULL,		TXPWR_LMT_WW),		/* 0x1E, */
-	CHPLAN_ENT(RTW_RD_2G_NULL,		RTW_RD_5G_FCC1,		TXPWR_LMT_WW),		/* 0x1F, RTW_CHPLAN_WORLD_WIDE_ONLY_5G */
-
-	/* ===== 0x20 ~ 0x7F, new channel plan ===== */
-	CHPLAN_ENT(RTW_RD_2G_WORLD,		RTW_RD_5G_NULL,		TXPWR_LMT_WW),		/* 0x20, RTW_CHPLAN_WORLD_NULL */
-	CHPLAN_ENT(RTW_RD_2G_ETSI1,		RTW_RD_5G_NULL,		TXPWR_LMT_ETSI),	/* 0x21, RTW_CHPLAN_ETSI1_NULL */
-	CHPLAN_ENT(RTW_RD_2G_FCC1,		RTW_RD_5G_NULL,		TXPWR_LMT_FCC),		/* 0x22, RTW_CHPLAN_FCC1_NULL */
-	CHPLAN_ENT(RTW_RD_2G_MKK1,		RTW_RD_5G_NULL,		TXPWR_LMT_MKK),		/* 0x23, RTW_CHPLAN_MKK1_NULL */
-	CHPLAN_ENT(RTW_RD_2G_ETSI2,		RTW_RD_5G_NULL,		TXPWR_LMT_ETSI),	/* 0x24, RTW_CHPLAN_ETSI2_NULL */
-	CHPLAN_ENT(RTW_RD_2G_FCC1,		RTW_RD_5G_FCC1,		TXPWR_LMT_FCC),		/* 0x25, RTW_CHPLAN_FCC1_FCC1 */
-	CHPLAN_ENT(RTW_RD_2G_WORLD,		RTW_RD_5G_ETSI1,	TXPWR_LMT_ETSI),	/* 0x26, RTW_CHPLAN_WORLD_ETSI1 */
-	CHPLAN_ENT(RTW_RD_2G_MKK1,		RTW_RD_5G_MKK1,		TXPWR_LMT_MKK),		/* 0x27, RTW_CHPLAN_MKK1_MKK1 */
-	CHPLAN_ENT(RTW_RD_2G_WORLD,		RTW_RD_5G_KCC1,		TXPWR_LMT_KCC),		/* 0x28, RTW_CHPLAN_WORLD_KCC1 */
-	CHPLAN_ENT(RTW_RD_2G_WORLD,		RTW_RD_5G_FCC2,		TXPWR_LMT_FCC),		/* 0x29, RTW_CHPLAN_WORLD_FCC2 */
-	CHPLAN_ENT(RTW_RD_2G_FCC2,		RTW_RD_5G_NULL,		TXPWR_LMT_FCC),		/* 0x2A, RTW_CHPLAN_FCC2_NULL */
-	CHPLAN_ENT(RTW_RD_2G_IC1,		RTW_RD_5G_IC2,		TXPWR_LMT_IC),		/* 0x2B, RTW_CHPLAN_IC1_IC2 */
-	CHPLAN_ENT(RTW_RD_2G_MKK2,		RTW_RD_5G_NULL,		TXPWR_LMT_MKK),		/* 0x2C, RTW_CHPLAN_MKK2_NULL */
-	CHPLAN_ENT(RTW_RD_2G_WORLD,		RTW_RD_5G_CHILE1,	TXPWR_LMT_CHILE),	/* 0x2D, RTW_CHPLAN_WORLD_CHILE1 */
-	CHPLAN_ENT(RTW_RD_2G_NULL,		RTW_RD_5G_NULL,		TXPWR_LMT_WW),		/* 0x2E, */
-	CHPLAN_ENT(RTW_RD_2G_NULL,		RTW_RD_5G_NULL,		TXPWR_LMT_WW),		/* 0x2F, */
-	CHPLAN_ENT(RTW_RD_2G_WORLD,		RTW_RD_5G_FCC3,		TXPWR_LMT_FCC),		/* 0x30, RTW_CHPLAN_WORLD_FCC3 */
-	CHPLAN_ENT(RTW_RD_2G_WORLD,		RTW_RD_5G_FCC4,		TXPWR_LMT_FCC),		/* 0x31, RTW_CHPLAN_WORLD_FCC4 */
-	CHPLAN_ENT(RTW_RD_2G_WORLD,		RTW_RD_5G_FCC5,		TXPWR_LMT_FCC),		/* 0x32, RTW_CHPLAN_WORLD_FCC5 */
-	CHPLAN_ENT(RTW_RD_2G_WORLD,		RTW_RD_5G_FCC6,		TXPWR_LMT_FCC),		/* 0x33, RTW_CHPLAN_WORLD_FCC6 */
-	CHPLAN_ENT(RTW_RD_2G_FCC1,		RTW_RD_5G_FCC7,		TXPWR_LMT_FCC),		/* 0x34, RTW_CHPLAN_FCC1_FCC7 */
-	CHPLAN_ENT(RTW_RD_2G_WORLD,		RTW_RD_5G_ETSI2,	TXPWR_LMT_ETSI),	/* 0x35, RTW_CHPLAN_WORLD_ETSI2 */
-	CHPLAN_ENT(RTW_RD_2G_WORLD,		RTW_RD_5G_ETSI3,	TXPWR_LMT_ETSI),	/* 0x36, RTW_CHPLAN_WORLD_ETSI3 */
-	CHPLAN_ENT(RTW_RD_2G_MKK1,		RTW_RD_5G_MKK2,		TXPWR_LMT_MKK),		/* 0x37, RTW_CHPLAN_MKK1_MKK2 */
-	CHPLAN_ENT(RTW_RD_2G_MKK1,		RTW_RD_5G_MKK3,		TXPWR_LMT_MKK),		/* 0x38, RTW_CHPLAN_MKK1_MKK3 */
-	CHPLAN_ENT(RTW_RD_2G_FCC1,		RTW_RD_5G_NCC1,		TXPWR_LMT_FCC),		/* 0x39, RTW_CHPLAN_FCC1_NCC1 */
-	CHPLAN_ENT(RTW_RD_2G_NULL,		RTW_RD_5G_NULL,		TXPWR_LMT_WW),		/* 0x3A, */
-	CHPLAN_ENT(RTW_RD_2G_NULL,		RTW_RD_5G_NULL,		TXPWR_LMT_WW),		/* 0x3B, */
-	CHPLAN_ENT(RTW_RD_2G_NULL,		RTW_RD_5G_NULL,		TXPWR_LMT_WW),		/* 0x3C, */
-	CHPLAN_ENT(RTW_RD_2G_NULL,		RTW_RD_5G_NULL,		TXPWR_LMT_WW),		/* 0x3D, */
-	CHPLAN_ENT(RTW_RD_2G_NULL,		RTW_RD_5G_NULL,		TXPWR_LMT_WW),		/* 0x3E, */
-	CHPLAN_ENT(RTW_RD_2G_NULL,		RTW_RD_5G_NULL,		TXPWR_LMT_WW),		/* 0x3F, */
-	CHPLAN_ENT(RTW_RD_2G_FCC1,		RTW_RD_5G_NCC2,		TXPWR_LMT_FCC),		/* 0x40, RTW_CHPLAN_FCC1_NCC2 */
-	CHPLAN_ENT(RTW_RD_2G_GLOBAL,	RTW_RD_5G_NULL,		TXPWR_LMT_WW),		/* 0x41, RTW_CHPLAN_GLOBAL_NULL */
-	CHPLAN_ENT(RTW_RD_2G_ETSI1,		RTW_RD_5G_ETSI4,	TXPWR_LMT_ETSI),	/* 0x42, RTW_CHPLAN_ETSI1_ETSI4 */
-	CHPLAN_ENT(RTW_RD_2G_FCC1,		RTW_RD_5G_FCC2,		TXPWR_LMT_FCC),		/* 0x43, RTW_CHPLAN_FCC1_FCC2 */
-	CHPLAN_ENT(RTW_RD_2G_FCC1,		RTW_RD_5G_NCC3,		TXPWR_LMT_FCC),		/* 0x44, RTW_CHPLAN_FCC1_NCC3 */
-	CHPLAN_ENT(RTW_RD_2G_WORLD,		RTW_RD_5G_ACMA1,	TXPWR_LMT_ACMA),	/* 0x45, RTW_CHPLAN_WORLD_ACMA1 */
-	CHPLAN_ENT(RTW_RD_2G_FCC1,		RTW_RD_5G_FCC8,		TXPWR_LMT_FCC),		/* 0x46, RTW_CHPLAN_FCC1_FCC8 */
-	CHPLAN_ENT(RTW_RD_2G_WORLD,		RTW_RD_5G_ETSI6,	TXPWR_LMT_ETSI),	/* 0x47, RTW_CHPLAN_WORLD_ETSI6 */
-	CHPLAN_ENT(RTW_RD_2G_WORLD,		RTW_RD_5G_ETSI7,	TXPWR_LMT_ETSI),	/* 0x48, RTW_CHPLAN_WORLD_ETSI7 */
-	CHPLAN_ENT(RTW_RD_2G_WORLD,		RTW_RD_5G_ETSI8,	TXPWR_LMT_ETSI),	/* 0x49, RTW_CHPLAN_WORLD_ETSI8 */
-	CHPLAN_ENT(RTW_RD_2G_NULL,		RTW_RD_5G_NULL,		TXPWR_LMT_WW),		/* 0x4A, */
-	CHPLAN_ENT(RTW_RD_2G_NULL,		RTW_RD_5G_NULL,		TXPWR_LMT_WW),		/* 0x4B, */
-	CHPLAN_ENT(RTW_RD_2G_NULL,		RTW_RD_5G_NULL,		TXPWR_LMT_WW),		/* 0x4C, */
-	CHPLAN_ENT(RTW_RD_2G_NULL,		RTW_RD_5G_NULL,		TXPWR_LMT_WW),		/* 0x4D, */
-	CHPLAN_ENT(RTW_RD_2G_NULL,		RTW_RD_5G_NULL,		TXPWR_LMT_WW),		/* 0x4E, */
-	CHPLAN_ENT(RTW_RD_2G_NULL,		RTW_RD_5G_NULL,		TXPWR_LMT_WW),		/* 0x4F, */
-	CHPLAN_ENT(RTW_RD_2G_WORLD,		RTW_RD_5G_ETSI9,	TXPWR_LMT_ETSI),	/* 0x50, RTW_CHPLAN_WORLD_ETSI9 */
-	CHPLAN_ENT(RTW_RD_2G_WORLD,		RTW_RD_5G_ETSI10,	TXPWR_LMT_ETSI),	/* 0x51, RTW_CHPLAN_WORLD_ETSI10 */
-	CHPLAN_ENT(RTW_RD_2G_WORLD,		RTW_RD_5G_ETSI11,	TXPWR_LMT_ETSI),	/* 0x52, RTW_CHPLAN_WORLD_ETSI11 */
-	CHPLAN_ENT(RTW_RD_2G_FCC1,		RTW_RD_5G_NCC4,		TXPWR_LMT_FCC),		/* 0x53, RTW_CHPLAN_FCC1_NCC4 */
-	CHPLAN_ENT(RTW_RD_2G_WORLD,		RTW_RD_5G_ETSI12,	TXPWR_LMT_ETSI),	/* 0x54, RTW_CHPLAN_WORLD_ETSI12 */
-	CHPLAN_ENT(RTW_RD_2G_FCC1,		RTW_RD_5G_FCC9,		TXPWR_LMT_FCC),		/* 0x55, RTW_CHPLAN_FCC1_FCC9 */
-	CHPLAN_ENT(RTW_RD_2G_WORLD,		RTW_RD_5G_ETSI13,	TXPWR_LMT_ETSI),	/* 0x56, RTW_CHPLAN_WORLD_ETSI13 */
-	CHPLAN_ENT(RTW_RD_2G_FCC1,		RTW_RD_5G_FCC10,	TXPWR_LMT_FCC),		/* 0x57, RTW_CHPLAN_FCC1_FCC10 */
-	CHPLAN_ENT(RTW_RD_2G_MKK2,		RTW_RD_5G_MKK4,		TXPWR_LMT_MKK),		/* 0x58, RTW_CHPLAN_MKK2_MKK4 */
-	CHPLAN_ENT(RTW_RD_2G_WORLD,		RTW_RD_5G_ETSI14,	TXPWR_LMT_ETSI),	/* 0x59, RTW_CHPLAN_WORLD_ETSI14 */
-	CHPLAN_ENT(RTW_RD_2G_NULL,		RTW_RD_5G_NULL,		TXPWR_LMT_WW),		/* 0x5A, */
-	CHPLAN_ENT(RTW_RD_2G_NULL,		RTW_RD_5G_NULL,		TXPWR_LMT_WW),		/* 0x5B, */
-	CHPLAN_ENT(RTW_RD_2G_NULL,		RTW_RD_5G_NULL,		TXPWR_LMT_WW),		/* 0x5C, */
-	CHPLAN_ENT(RTW_RD_2G_NULL,		RTW_RD_5G_NULL,		TXPWR_LMT_WW),		/* 0x5D, */
-	CHPLAN_ENT(RTW_RD_2G_NULL,		RTW_RD_5G_NULL,		TXPWR_LMT_WW),		/* 0x5E, */
-	CHPLAN_ENT(RTW_RD_2G_NULL,		RTW_RD_5G_NULL,		TXPWR_LMT_WW),		/* 0x5F, */
-	CHPLAN_ENT(RTW_RD_2G_FCC1,		RTW_RD_5G_FCC5,		TXPWR_LMT_FCC),		/* 0x60, RTW_CHPLAN_FCC1_FCC5 */
-	CHPLAN_ENT(RTW_RD_2G_FCC2,		RTW_RD_5G_FCC7,		TXPWR_LMT_FCC),		/* 0x61, RTW_CHPLAN_FCC2_FCC7 */
-	CHPLAN_ENT(RTW_RD_2G_FCC2,		RTW_RD_5G_FCC1,		TXPWR_LMT_FCC),		/* 0x62, RTW_CHPLAN_FCC2_FCC1 */
-	CHPLAN_ENT(RTW_RD_2G_WORLD,		RTW_RD_5G_ETSI15,	TXPWR_LMT_ETSI),	/* 0x63, RTW_CHPLAN_WORLD_ETSI15 */
-	CHPLAN_ENT(RTW_RD_2G_MKK2,		RTW_RD_5G_MKK5,		TXPWR_LMT_MKK),		/* 0x64, RTW_CHPLAN_MKK2_MKK5 */
-	CHPLAN_ENT(RTW_RD_2G_ETSI1,		RTW_RD_5G_ETSI16,	TXPWR_LMT_ETSI),	/* 0x65, RTW_CHPLAN_ETSI1_ETSI16 */
-	CHPLAN_ENT(RTW_RD_2G_FCC1,		RTW_RD_5G_FCC14,	TXPWR_LMT_FCC),		/* 0x66, RTW_CHPLAN_FCC1_FCC14 */
-	CHPLAN_ENT(RTW_RD_2G_FCC1,		RTW_RD_5G_FCC12,	TXPWR_LMT_FCC),		/* 0x67, RTW_CHPLAN_FCC1_FCC12 */
-	CHPLAN_ENT(RTW_RD_2G_FCC2,		RTW_RD_5G_FCC14,	TXPWR_LMT_FCC),		/* 0x68, RTW_CHPLAN_FCC2_FCC14 */
-	CHPLAN_ENT(RTW_RD_2G_FCC2,		RTW_RD_5G_FCC12,	TXPWR_LMT_FCC),		/* 0x69, RTW_CHPLAN_FCC2_FCC12 */
-	CHPLAN_ENT(RTW_RD_2G_ETSI1,		RTW_RD_5G_ETSI17,	TXPWR_LMT_ETSI),	/* 0x6A, RTW_CHPLAN_ETSI1_ETSI17 */
-	CHPLAN_ENT(RTW_RD_2G_WORLD,		RTW_RD_5G_FCC16,	TXPWR_LMT_FCC),		/* 0x6B, RTW_CHPLAN_WORLD_FCC16 */
-	CHPLAN_ENT(RTW_RD_2G_WORLD,		RTW_RD_5G_FCC13,	TXPWR_LMT_FCC),		/* 0x6C, RTW_CHPLAN_WORLD_FCC13 */
-	CHPLAN_ENT(RTW_RD_2G_FCC2,		RTW_RD_5G_FCC15,	TXPWR_LMT_FCC),		/* 0x6D, RTW_CHPLAN_FCC2_FCC15 */
-	CHPLAN_ENT(RTW_RD_2G_WORLD,		RTW_RD_5G_FCC12,	TXPWR_LMT_FCC),		/* 0x6E, RTW_CHPLAN_WORLD_FCC12 */
-	CHPLAN_ENT(RTW_RD_2G_NULL,		RTW_RD_5G_ETSI8,	TXPWR_LMT_ETSI),	/* 0x6F, RTW_CHPLAN_NULL_ETSI8 */
-	CHPLAN_ENT(RTW_RD_2G_NULL,		RTW_RD_5G_ETSI18,	TXPWR_LMT_ETSI),	/* 0x70, RTW_CHPLAN_NULL_ETSI18 */
-	CHPLAN_ENT(RTW_RD_2G_NULL,		RTW_RD_5G_ETSI17,	TXPWR_LMT_ETSI),	/* 0x71, RTW_CHPLAN_NULL_ETSI17 */
-	CHPLAN_ENT(RTW_RD_2G_NULL,		RTW_RD_5G_ETSI19,	TXPWR_LMT_ETSI),	/* 0x72, RTW_CHPLAN_NULL_ETSI19 */
-	CHPLAN_ENT(RTW_RD_2G_WORLD,		RTW_RD_5G_FCC7,		TXPWR_LMT_FCC),		/* 0x73, RTW_CHPLAN_WORLD_FCC7 */
-	CHPLAN_ENT(RTW_RD_2G_FCC2,		RTW_RD_5G_FCC17,	TXPWR_LMT_FCC),		/* 0x74, RTW_CHPLAN_FCC2_FCC17 */
-	CHPLAN_ENT(RTW_RD_2G_WORLD,		RTW_RD_5G_ETSI20,	TXPWR_LMT_ETSI),	/* 0x75, RTW_CHPLAN_WORLD_ETSI20 */
-	CHPLAN_ENT(RTW_RD_2G_FCC2,		RTW_RD_5G_FCC11,	TXPWR_LMT_FCC),		/* 0x76, RTW_CHPLAN_FCC2_FCC11 */
-	CHPLAN_ENT(RTW_RD_2G_WORLD,		RTW_RD_5G_ETSI21,	TXPWR_LMT_ETSI),	/* 0x77, RTW_CHPLAN_WORLD_ETSI21 */
-	CHPLAN_ENT(RTW_RD_2G_FCC1,		RTW_RD_5G_FCC18,	TXPWR_LMT_FCC),		/* 0x78, RTW_CHPLAN_FCC1_FCC18 */
-	CHPLAN_ENT(RTW_RD_2G_MKK2,		RTW_RD_5G_MKK1,		TXPWR_LMT_MKK),		/* 0x79, RTW_CHPLAN_MKK2_MKK1 */
-};
-
-static RT_CHANNEL_PLAN_MAP RTW_CHANNEL_PLAN_MAP_REALTEK_DEFINE =
-	CHPLAN_ENT(RTW_RD_2G_WORLD,		RTW_RD_5G_FCC1,		TXPWR_LMT_FCC);		/* 0x7F, Realtek Define */
-
-bool rtw_chplan_is_empty(u8 id)
-{
-	RT_CHANNEL_PLAN_MAP *chplan_map;
-
-	if (id == RTW_CHPLAN_REALTEK_DEFINE)
-		chplan_map = &RTW_CHANNEL_PLAN_MAP_REALTEK_DEFINE;
-	else
-		chplan_map = &RTW_ChannelPlanMap[id];
-
-	if (chplan_map->Index2G == RTW_RD_2G_NULL
-		#ifdef CONFIG_IEEE80211_BAND_5GHZ
-		&& chplan_map->Index5G == RTW_RD_5G_NULL
-		#endif
-	)
-		return _TRUE;
-
-	return _FALSE;
-}
-
-bool rtw_regsty_is_excl_chs(struct registry_priv *regsty, u8 ch)
-{
-	int i;
-
-	for (i = 0; i < MAX_CHANNEL_NUM; i++) {
-		if (regsty->excl_chs[i] == 0)
-			break;
-		if (regsty->excl_chs[i] == ch)
-			return _TRUE;
-	}
-	return _FALSE;
-}
-
-inline u8 rtw_rd_5g_band1_passive(u8 rtw_rd_5g)
-{
-	u8 passive = 0;
-
-	switch (rtw_rd_5g) {
-	case RTW_RD_5G_FCC13:
-	case RTW_RD_5G_FCC16:
-	case RTW_RD_5G_ETSI18:
-	case RTW_RD_5G_ETSI19:
-	case RTW_RD_5G_WORLD:
-		passive = 1;
-	};
-
-	return passive;
-}
-
-inline u8 rtw_rd_5g_band4_passive(u8 rtw_rd_5g)
-{
-	u8 passive = 0;
-
-	switch (rtw_rd_5g) {
-	case RTW_RD_5G_MKK5:
-	case RTW_RD_5G_ETSI16:
-	case RTW_RD_5G_ETSI18:
-	case RTW_RD_5G_ETSI19:
-	case RTW_RD_5G_WORLD:
-		passive = 1;
-	};
-
-	return passive;
-}
-
 static void init_channel_list(_adapter *padapter, RT_CHANNEL_INFO *channel_set
 	, struct p2p_channels *channel_list)
 {
@@ -527,14 +148,14 @@ static void init_channel_list(_adapter *padapter, RT_CHANNEL_INFO *channel_set
 		for (ch = o->min_chan; ch <= o->max_chan; ch += o->inc) {
 			if (rtw_chset_search_ch(channel_set, ch) == -1)
 				continue;
-
+#if defined(CONFIG_80211N_HT) || defined(CONFIG_80211AC_VHT)
 			if ((padapter->registrypriv.ht_enable == 0) && (o->inc == 8))
 				continue;
 
 			if ((REGSTY_IS_BW_5G_SUPPORT(regsty, CHANNEL_WIDTH_40)) &&
 			    ((o->bw == BW40MINUS) || (o->bw == BW40PLUS)))
 				continue;
-
+#endif
 			if (reg == NULL) {
 				reg = &channel_list->reg_class[cla];
 				cla++;
@@ -549,132 +170,10 @@ static void init_channel_list(_adapter *padapter, RT_CHANNEL_INFO *channel_set
 
 }
 
-static u8 init_channel_set(_adapter *padapter, u8 ChannelPlan, RT_CHANNEL_INFO *channel_set)
-{
-	struct rf_ctl_t *rfctl = adapter_to_rfctl(padapter);
-	struct registry_priv *regsty = adapter_to_regsty(padapter);
-	u8	index, chanset_size = 0;
-	u8	b5GBand = _FALSE, b2_4GBand = _FALSE;
-	u8	Index2G = 0, Index5G = 0;
-	int i;
-
-	if (!rtw_is_channel_plan_valid(ChannelPlan)) {
-		RTW_ERR("ChannelPlan ID 0x%02X error !!!!!\n", ChannelPlan);
-		return chanset_size;
-	}
-
-	_rtw_memset(channel_set, 0, sizeof(RT_CHANNEL_INFO) * MAX_CHANNEL_NUM);
-
-	if (IsSupported24G(regsty->wireless_mode) && hal_chk_band_cap(padapter, BAND_CAP_2G))
-		b2_4GBand = _TRUE;
-
-	if (is_supported_5g(regsty->wireless_mode) && hal_chk_band_cap(padapter, BAND_CAP_5G))
-		b5GBand = _TRUE;
-
-	if (b2_4GBand == _FALSE && b5GBand == _FALSE) {
-		RTW_WARN("HW band_cap has no intersection with SW wireless_mode setting\n");
-		return chanset_size;
-	}
-
-	if (b2_4GBand) {
-		if (ChannelPlan == RTW_CHPLAN_REALTEK_DEFINE)
-			Index2G = RTW_CHANNEL_PLAN_MAP_REALTEK_DEFINE.Index2G;
-		else
-			Index2G = RTW_ChannelPlanMap[ChannelPlan].Index2G;
-
-		for (index = 0; index < CH_LIST_LEN(RTW_ChannelPlan2G[Index2G]); index++) {
-			if (rtw_regsty_is_excl_chs(regsty, CH_LIST_CH(RTW_ChannelPlan2G[Index2G], index)) == _TRUE)
-				continue;
-
-			if (chanset_size >= MAX_CHANNEL_NUM) {
-				RTW_WARN("chset size can't exceed MAX_CHANNEL_NUM(%u)\n", MAX_CHANNEL_NUM);
-				break;
-			}
-
-			channel_set[chanset_size].ChannelNum = CH_LIST_CH(RTW_ChannelPlan2G[Index2G], index);
-
-			if (ChannelPlan == RTW_CHPLAN_GLOBAL_DOAMIN
-				|| Index2G == RTW_RD_2G_GLOBAL
-			) {
-				/* Channel 1~11 is active, and 12~14 is passive */
-				if (channel_set[chanset_size].ChannelNum >= 1 && channel_set[chanset_size].ChannelNum <= 11)
-					channel_set[chanset_size].ScanType = SCAN_ACTIVE;
-				else if ((channel_set[chanset_size].ChannelNum  >= 12 && channel_set[chanset_size].ChannelNum  <= 14))
-					channel_set[chanset_size].ScanType  = SCAN_PASSIVE;
-			} else if (ChannelPlan == RTW_CHPLAN_WORLD_WIDE_13
-				|| ChannelPlan == RTW_CHPLAN_WORLD_WIDE_5G
-				|| Index2G == RTW_RD_2G_WORLD
-			) {
-				/* channel 12~13, passive scan */
-				if (channel_set[chanset_size].ChannelNum <= 11)
-					channel_set[chanset_size].ScanType = SCAN_ACTIVE;
-				else
-					channel_set[chanset_size].ScanType = SCAN_PASSIVE;
-			} else
-				channel_set[chanset_size].ScanType = SCAN_ACTIVE;
-
-			chanset_size++;
-		}
-	}
-
-#ifdef CONFIG_IEEE80211_BAND_5GHZ
-	if (b5GBand) {
-		if (ChannelPlan == RTW_CHPLAN_REALTEK_DEFINE)
-			Index5G = RTW_CHANNEL_PLAN_MAP_REALTEK_DEFINE.Index5G;
-		else
-			Index5G = RTW_ChannelPlanMap[ChannelPlan].Index5G;
-
-		for (index = 0; index < CH_LIST_LEN(RTW_ChannelPlan5G[Index5G]); index++) {
-			if (rtw_regsty_is_excl_chs(regsty, CH_LIST_CH(RTW_ChannelPlan5G[Index5G], index)) == _TRUE)
-				continue;
-			#ifndef CONFIG_DFS
-			if (rtw_is_dfs_ch(CH_LIST_CH(RTW_ChannelPlan5G[Index5G], index)))
-				continue;
-			#endif
-
-			if (chanset_size >= MAX_CHANNEL_NUM) {
-				RTW_WARN("chset size can't exceed MAX_CHANNEL_NUM(%u)\n", MAX_CHANNEL_NUM);
-				break;
-			}
-
-			channel_set[chanset_size].ChannelNum = CH_LIST_CH(RTW_ChannelPlan5G[Index5G], index);
-
-			if ((ChannelPlan == RTW_CHPLAN_WORLD_WIDE_5G) /* all channels passive */
-				|| (rtw_is_5g_band1(channel_set[chanset_size].ChannelNum)
-					&& rtw_rd_5g_band1_passive(Index5G)) /* band1 passive */
-				|| (rtw_is_5g_band4(channel_set[chanset_size].ChannelNum)
-					&& rtw_rd_5g_band4_passive(Index5G)) /* band4 passive */
-				|| (rtw_is_dfs_ch(channel_set[chanset_size].ChannelNum)) /* DFS channel(band2, 3) passive */
-			)
-				channel_set[chanset_size].ScanType = SCAN_PASSIVE;
-			else
-				channel_set[chanset_size].ScanType = SCAN_ACTIVE;
-
-			chanset_size++;
-		}
-	}
-
-	#ifdef CONFIG_DFS_MASTER
-	for (i = 0; i < chanset_size; i++)
-		channel_set[i].non_ocp_end_time = rtw_get_current_time();
-	#endif
-#endif /* CONFIG_IEEE80211_BAND_5GHZ */
-
-	if (chanset_size)
-		RTW_INFO(FUNC_ADPT_FMT" ChannelPlan ID:0x%02x, ch num:%d\n"
-			, FUNC_ADPT_ARG(padapter), ChannelPlan, chanset_size);
-	else
-		RTW_WARN(FUNC_ADPT_FMT" ChannelPlan ID:0x%02x, final chset has no channel\n"
-			, FUNC_ADPT_ARG(padapter), ChannelPlan);
-
-	return chanset_size;
-}
-
 #ifdef CONFIG_TXPWR_LIMIT
 void rtw_txpwr_init_regd(struct rf_ctl_t *rfctl)
 {
 	u8 regd;
-	u8 regd_name;
 	struct regd_exc_ent *exc;
 	struct txpwr_lmt_ent *ent;
 	_irqL irqL;
@@ -717,11 +216,7 @@ void rtw_txpwr_init_regd(struct rf_ctl_t *rfctl)
 	}
 
 	/* follow default channel plan mapping */
-	if (rfctl->ChannelPlan == RTW_CHPLAN_REALTEK_DEFINE)
-		regd = RTW_CHANNEL_PLAN_MAP_REALTEK_DEFINE.regd;
-	else
-		regd = RTW_ChannelPlanMap[rfctl->ChannelPlan].regd;
-
+	regd = rtw_chplan_get_default_regd(rfctl->ChannelPlan);
 	if (regd == TXPWR_LMT_NONE)
 		rfctl->regd_name = regd_str(TXPWR_LMT_NONE);
 	else if (regd == TXPWR_LMT_WW)
@@ -789,10 +284,14 @@ void rtw_rfctl_init(_adapter *adapter)
 	_rtw_init_listhead(&rfctl->txpwr_lmt_list);
 #endif
 
+	rfctl->ch_sel_same_band_prefer = 1;
+
 #ifdef CONFIG_DFS_MASTER
 	rfctl->cac_start_time = rfctl->cac_end_time = RTW_CAC_STOPPED;
-
-	/* TODO: dfs_master_timer */
+	rtw_init_timer(&(rfctl->radar_detect_timer), adapter, rtw_dfs_rd_timer_hdl, rfctl);
+#endif
+#ifdef CONFIG_DFS_SLAVE_WITH_RADAR_DETECT
+	rfctl->dfs_slave_with_rd = 1;
 #endif
 }
 
@@ -807,21 +306,16 @@ void rtw_rfctl_deinit(_adapter *adapter)
 	rtw_txpwr_lmt_list_free(rfctl);
 	_rtw_mutex_free(&rfctl->txpwr_lmt_mutex);
 #endif
-
-#ifdef CONFIG_DFS_MASTER
-	/* TODO: dfs_master_timer */
-#endif
 }
 
 #ifdef CONFIG_DFS_MASTER
 /*
-* called in rtw_dfs_master_enable()
+* called in rtw_dfs_rd_enable()
 * assume the request channel coverage is DFS range
 * base on the current status and the request channel coverage to check if need to reset complete CAC time
 */
-bool rtw_is_cac_reset_needed(_adapter *adapter, u8 ch, u8 bw, u8 offset)
+bool rtw_is_cac_reset_needed(struct rf_ctl_t *rfctl, u8 ch, u8 bw, u8 offset)
 {
-	struct rf_ctl_t *rfctl = adapter_to_rfctl(adapter);
 	bool needed = _FALSE;
 	u32 cur_hi, cur_lo, hi, lo;
 
@@ -918,7 +412,7 @@ bool rtw_rfctl_is_tx_blocked_by_ch_waiting(struct rf_ctl_t *rfctl)
 	return rtw_rfctl_overlap_radar_detect_ch(rfctl) && IS_CH_WAITING(rfctl);
 }
 
-bool rtw_chset_is_ch_non_ocp(RT_CHANNEL_INFO *ch_set, u8 ch, u8 bw, u8 offset)
+bool rtw_chset_is_chbw_non_ocp(RT_CHANNEL_INFO *ch_set, u8 ch, u8 bw, u8 offset)
 {
 	bool ret = _FALSE;
 	u32 hi = 0, lo = 0;
@@ -948,6 +442,11 @@ exit:
 	return ret;
 }
 
+bool rtw_chset_is_ch_non_ocp(RT_CHANNEL_INFO *ch_set, u8 ch)
+{
+	return rtw_chset_is_chbw_non_ocp(ch_set, ch, CHANNEL_WIDTH_20, HAL_PRIME_CHNL_OFFSET_DONT_CARE);
+}
+
 u32 rtw_chset_get_ch_non_ocp_ms(RT_CHANNEL_INFO *ch_set, u8 ch, u8 bw, u8 offset)
 {
 	int ms = 0;
@@ -1027,20 +526,19 @@ inline void rtw_chset_update_non_ocp_ms(RT_CHANNEL_INFO *ch_set, u8 ch, u8 bw, u
 	_rtw_chset_update_non_ocp(ch_set, ch, bw, offset, ms);
 }
 
-u32 rtw_get_ch_waiting_ms(_adapter *adapter, u8 ch, u8 bw, u8 offset, u32 *r_non_ocp_ms, u32 *r_cac_ms)
+u32 rtw_get_ch_waiting_ms(struct rf_ctl_t *rfctl, u8 ch, u8 bw, u8 offset, u32 *r_non_ocp_ms, u32 *r_cac_ms)
 {
-	struct rf_ctl_t *rfctl = adapter_to_rfctl(adapter);
-	struct mlme_ext_priv *mlmeext = &adapter->mlmeextpriv;
+	struct dvobj_priv *dvobj = rfctl_to_dvobj(rfctl);
 	u32 non_ocp_ms;
 	u32 cac_ms;
 	u8 in_rd_range = 0; /* if in current radar detection range*/
 
-	if (rtw_chset_is_ch_non_ocp(rfctl->channel_set, ch, bw, offset))
+	if (rtw_chset_is_chbw_non_ocp(rfctl->channel_set, ch, bw, offset))
 		non_ocp_ms = rtw_chset_get_ch_non_ocp_ms(rfctl->channel_set, ch, bw, offset);
 	else
 		non_ocp_ms = 0;
 
-	if (rfctl->dfs_master_enabled) {
+	if (rfctl->radar_detect_enabled) {
 		u32 cur_hi, cur_lo, hi, lo;
 
 		if (rtw_chbw_to_freq_range(ch, bw, offset, &hi, &lo) == _FALSE) {
@@ -1064,7 +562,7 @@ u32 rtw_get_ch_waiting_ms(_adapter *adapter, u8 ch, u8 bw, u8 offset, u32 *r_non
 			cac_ms = rtw_systime_to_ms(rfctl->cac_end_time - rtw_get_current_time());
 		else
 			cac_ms = 0;
-	} else if (rtw_is_long_cac_ch(ch, bw, offset, rtw_odm_get_dfs_domain(adapter)))
+	} else if (rtw_is_long_cac_ch(ch, bw, offset, rtw_odm_get_dfs_domain(dvobj)))
 		cac_ms = CAC_TIME_CE_MS;
 	else
 		cac_ms = CAC_TIME_MS;
@@ -1077,13 +575,12 @@ u32 rtw_get_ch_waiting_ms(_adapter *adapter, u8 ch, u8 bw, u8 offset, u32 *r_non
 	return non_ocp_ms + cac_ms;
 }
 
-void rtw_reset_cac(_adapter *adapter, u8 ch, u8 bw, u8 offset)
+void rtw_reset_cac(struct rf_ctl_t *rfctl, u8 ch, u8 bw, u8 offset)
 {
-	struct rf_ctl_t *rfctl = adapter_to_rfctl(adapter);
 	u32 non_ocp_ms;
 	u32 cac_ms;
 
-	rtw_get_ch_waiting_ms(adapter
+	rtw_get_ch_waiting_ms(rfctl
 		, ch
 		, bw
 		, offset
@@ -1102,17 +599,48 @@ void rtw_reset_cac(_adapter *adapter, u8 ch, u8 bw, u8 offset)
 	if (rfctl->cac_end_time == RTW_CAC_STOPPED)
 		rfctl->cac_end_time++;
 }
+
+u32 rtw_force_stop_cac(struct rf_ctl_t *rfctl, u32 timeout_ms)
+{
+	struct dvobj_priv *dvobj = rfctl_to_dvobj(rfctl);
+	systime start;
+	u32 pass_ms;
+
+	start = rtw_get_current_time();
+
+	rfctl->cac_force_stop = 1;
+
+	while (rtw_get_passing_time_ms(start) <= timeout_ms
+		&& IS_UNDER_CAC(rfctl)
+	) {
+		if (dev_is_surprise_removed(dvobj) || dev_is_drv_stopped(dvobj))
+			break;
+		rtw_msleep_os(20);
+	}
+
+	if (IS_UNDER_CAC(rfctl)) {
+		if (!dev_is_surprise_removed(dvobj) && !dev_is_drv_stopped(dvobj))
+			RTW_INFO("%s waiting for cac stop timeout!\n", __func__);
+	}
+
+	rfctl->cac_force_stop = 0;
+
+	pass_ms = rtw_get_passing_time_ms(start);
+
+	return pass_ms;
+}
 #endif /* CONFIG_DFS_MASTER */
 
 /* choose channel with shortest waiting (non ocp + cac) time */
-bool rtw_choose_shortest_waiting_ch(_adapter *adapter, u8 req_bw, u8 *dec_ch, u8 *dec_bw, u8 *dec_offset, u8 d_flags)
+bool rtw_choose_shortest_waiting_ch(struct rf_ctl_t *rfctl, u8 sel_ch, u8 max_bw
+	, u8 *dec_ch, u8 *dec_bw, u8 *dec_offset
+	, u8 d_flags, u8 cur_ch, u8 same_band_prefer, u8 mesh_only)
 {
 #ifndef DBG_CHOOSE_SHORTEST_WAITING_CH
 #define DBG_CHOOSE_SHORTEST_WAITING_CH 0
 #endif
-
-	struct rf_ctl_t *rfctl = adapter_to_rfctl(adapter);
-	struct registry_priv *regsty = adapter_to_regsty(adapter);
+	struct dvobj_priv *dvobj = rfctl_to_dvobj(rfctl);
+	struct registry_priv *regsty = dvobj_to_regsty(dvobj);
 	u8 ch, bw, offset;
 	u8 ch_c = 0, bw_c = 0, offset_c = 0;
 	int i;
@@ -1124,8 +652,8 @@ bool rtw_choose_shortest_waiting_ch(_adapter *adapter, u8 req_bw, u8 *dec_ch, u8
 	}
 
 	/* full search and narrow bw judegement first to avoid potetial judegement timing issue */
-	for (bw = CHANNEL_WIDTH_20; bw <= req_bw; bw++) {
-		if (!hal_is_bw_support(adapter, bw))
+	for (bw = CHANNEL_WIDTH_20; bw <= max_bw; bw++) {
+		if (!hal_is_bw_support(dvobj_get_primary_adapter(dvobj), bw))
 			continue;
 
 		for (i = 0; i < rfctl->max_chan_nums; i++) {
@@ -1134,6 +662,8 @@ bool rtw_choose_shortest_waiting_ch(_adapter *adapter, u8 req_bw, u8 *dec_ch, u8
 			u32 waiting_ms = 0;
 
 			ch = rfctl->channel_set[i].ChannelNum;
+			if (sel_ch > 0 && ch != sel_ch)
+				continue;
 
 			if ((d_flags & RTW_CHF_2G) && ch <= 14)
 				continue;
@@ -1149,38 +679,46 @@ bool rtw_choose_shortest_waiting_ch(_adapter *adapter, u8 req_bw, u8 *dec_ch, u8
 					continue;
 			}
 
+			if (mesh_only && ch >= 5 && ch <= 9 && bw > CHANNEL_WIDTH_20)
+				continue;
+
 			if (!rtw_get_offset_by_chbw(ch, bw, &offset))
 				continue;
 
 			if (!rtw_chset_is_chbw_valid(rfctl->channel_set, ch, bw, offset))
 				continue;
 
-			if ((d_flags & RTW_CHF_NON_OCP) && rtw_chset_is_ch_non_ocp(rfctl->channel_set, ch, bw, offset))
+			if ((d_flags & RTW_CHF_NON_OCP) && rtw_chset_is_chbw_non_ocp(rfctl->channel_set, ch, bw, offset))
 				continue;
 
 			if ((d_flags & RTW_CHF_DFS) && rtw_is_dfs_chbw(ch, bw, offset))
 				continue;
 
-			if ((d_flags & RTW_CHF_LONG_CAC) && rtw_is_long_cac_ch(ch, bw, offset, rtw_odm_get_dfs_domain(adapter)))
+			if ((d_flags & RTW_CHF_LONG_CAC) && rtw_is_long_cac_ch(ch, bw, offset, rtw_odm_get_dfs_domain(dvobj)))
 				continue;
 
 			if ((d_flags & RTW_CHF_NON_DFS) && !rtw_is_dfs_chbw(ch, bw, offset))
 				continue;
 
-			if ((d_flags & RTW_CHF_NON_LONG_CAC) && !rtw_is_long_cac_ch(ch, bw, offset, rtw_odm_get_dfs_domain(adapter)))
+			if ((d_flags & RTW_CHF_NON_LONG_CAC) && !rtw_is_long_cac_ch(ch, bw, offset, rtw_odm_get_dfs_domain(dvobj)))
 				continue;
 
 			#ifdef CONFIG_DFS_MASTER
-			waiting_ms = rtw_get_ch_waiting_ms(adapter, ch, bw, offset, &non_ocp_ms, &cac_ms);
+			waiting_ms = rtw_get_ch_waiting_ms(rfctl, ch, bw, offset, &non_ocp_ms, &cac_ms);
 			#endif
 
 			if (DBG_CHOOSE_SHORTEST_WAITING_CH)
-				RTW_INFO(FUNC_ADPT_FMT":%u,%u,%u %u(non_ocp:%u, cac:%u)\n"
-					, FUNC_ADPT_ARG(adapter), ch, bw, offset, waiting_ms, non_ocp_ms, cac_ms);
+				RTW_INFO("%s:%u,%u,%u %u(non_ocp:%u, cac:%u)\n"
+					, __func__, ch, bw, offset, waiting_ms, non_ocp_ms, cac_ms);
 
 			if (ch_c == 0
+				/* first: smaller wating time */
 				|| min_waiting_ms > waiting_ms
-				|| (min_waiting_ms == waiting_ms && bw > bw_c) /* wider bw first */
+				/* then: wider bw */
+				|| (min_waiting_ms == waiting_ms && bw > bw_c)
+				/* then: same band if requested */
+				|| (same_band_prefer && min_waiting_ms == waiting_ms && bw == bw_c
+					&& !rtw_is_same_band(cur_ch, ch_c) && rtw_is_same_band(cur_ch, ch))
 			) {
 				ch_c = ch;
 				bw_c = bw;
@@ -1191,8 +729,10 @@ bool rtw_choose_shortest_waiting_ch(_adapter *adapter, u8 req_bw, u8 *dec_ch, u8
 	}
 
 	if (ch_c != 0) {
-		RTW_INFO(FUNC_ADPT_FMT": d_flags:0x%02x %u,%u,%u waiting_ms:%u\n"
-			, FUNC_ADPT_ARG(adapter), d_flags, ch_c, bw_c, offset_c, min_waiting_ms);
+		RTW_INFO("%s: d_flags:0x%02x cur_ch:%u sb_prefer:%u%s %u,%u,%u waiting_ms:%u\n"
+			, __func__, d_flags, cur_ch, same_band_prefer
+			, mesh_only ? " mesh_only" : ""
+			, ch_c, bw_c, offset_c, min_waiting_ms);
 
 		*dec_ch = ch_c;
 		*dec_bw = bw_c;
@@ -1200,82 +740,14 @@ bool rtw_choose_shortest_waiting_ch(_adapter *adapter, u8 req_bw, u8 *dec_ch, u8
 		return _TRUE;
 	}
 
-	if (d_flags == 0)
+	if (d_flags == 0) {
+		RTW_INFO("%s: sel_ch:%u max_bw:%u d_flags:0x%02x cur_ch:%u sb_prefer:%u%s\n"
+			, __func__, sel_ch, max_bw, d_flags, cur_ch, same_band_prefer
+			, mesh_only ? " mesh_only" : "");
 		rtw_warn_on(1);
-
-	return _FALSE;
-}
-
-void dump_country_chplan(void *sel, const struct country_chplan *ent)
-{
-	RTW_PRINT_SEL(sel, "\"%c%c\", 0x%02X%s\n"
-		, ent->alpha2[0], ent->alpha2[1], ent->chplan
-		, COUNTRY_CHPLAN_EN_11AC(ent) ? " ac" : ""
-	);
-}
-
-void dump_country_chplan_map(void *sel)
-{
-	const struct country_chplan *ent;
-	u8 code[2];
-
-#if RTW_DEF_MODULE_REGULATORY_CERT
-	RTW_PRINT_SEL(sel, "RTW_DEF_MODULE_REGULATORY_CERT:0x%x\n", RTW_DEF_MODULE_REGULATORY_CERT);
-#endif
-#ifdef CONFIG_CUSTOMIZED_COUNTRY_CHPLAN_MAP
-	RTW_PRINT_SEL(sel, "CONFIG_CUSTOMIZED_COUNTRY_CHPLAN_MAP\n");
-#endif
-
-	for (code[0] = 'A'; code[0] <= 'Z'; code[0]++) {
-		for (code[1] = 'A'; code[1] <= 'Z'; code[1]++) {
-			ent = rtw_get_chplan_from_country(code);
-			if (!ent)
-				continue;
-
-			dump_country_chplan(sel, ent);
-		}
-	}
-}
-
-void dump_chplan_id_list(void *sel)
-{
-	u8 first = 1;
-	int i;
-
-	for (i = 0; i < RTW_CHPLAN_MAX; i++) {
-		if (!rtw_is_channel_plan_valid(i))
-			continue;
-
-		if (first) {
-			RTW_PRINT_SEL(sel, "0x%02X ", i);
-			first = 0;
-		} else
-			_RTW_PRINT_SEL(sel, "0x%02X ", i);
 	}
 
-	_RTW_PRINT_SEL(sel, "0x7F\n");
-}
-
-void dump_chplan_test(void *sel)
-{
-	int i, j;
-
-	/* check invalid channel */
-	for (i = 0; i < RTW_RD_2G_MAX; i++) {
-		for (j = 0; j < CH_LIST_LEN(RTW_ChannelPlan2G[i]); j++) {
-			if (rtw_ch2freq(CH_LIST_CH(RTW_ChannelPlan2G[i], j)) == 0)
-				RTW_PRINT_SEL(sel, "invalid ch:%u at (%d,%d)\n", CH_LIST_CH(RTW_ChannelPlan2G[i], j), i, j);
-		}
-	}
-
-#ifdef CONFIG_IEEE80211_BAND_5GHZ
-	for (i = 0; i < RTW_RD_5G_MAX; i++) {
-		for (j = 0; j < CH_LIST_LEN(RTW_ChannelPlan5G[i]); j++) {
-			if (rtw_ch2freq(CH_LIST_CH(RTW_ChannelPlan5G[i], j)) == 0)
-				RTW_PRINT_SEL(sel, "invalid ch:%u at (%d,%d)\n", CH_LIST_CH(RTW_ChannelPlan5G[i], j), i, j);
-		}
-	}
-#endif
+	return _FALSE;
 }
 
 void dump_chset(void *sel, RT_CHANNEL_INFO *ch_set)
@@ -1306,11 +778,10 @@ void dump_chset(void *sel, RT_CHANNEL_INFO *ch_set)
 	RTW_PRINT_SEL(sel, "total ch number:%d\n", i);
 }
 
-void dump_cur_chset(void *sel, _adapter *adapter)
+void dump_cur_chset(void *sel, struct rf_ctl_t *rfctl)
 {
-	struct rf_ctl_t *rfctl = adapter_to_rfctl(adapter);
-	struct registry_priv *regsty = adapter_to_regsty(adapter);
-	HAL_DATA_TYPE *hal_data = GET_HAL_DATA(adapter);
+	struct dvobj_priv *dvobj = rfctl_to_dvobj(rfctl);
+	struct registry_priv *regsty = dvobj_to_regsty(dvobj);
 	int i;
 
 	if (rfctl->country_ent)
@@ -1323,7 +794,7 @@ void dump_cur_chset(void *sel, _adapter *adapter)
 #endif
 
 #ifdef CONFIG_DFS_MASTER
-	RTW_PRINT_SEL(sel, "dfs_domain:%u\n", rtw_odm_get_dfs_domain(adapter));
+	RTW_PRINT_SEL(sel, "dfs_domain:%u\n", rtw_odm_get_dfs_domain(dvobj));
 #endif
 
 	for (i = 0; i < MAX_CHANNEL_NUM; i++)
@@ -1401,6 +872,50 @@ exit:
 	return valid;
 }
 
+/**
+ * rtw_chset_sync_chbw - obey g_ch, adjust g_bw, g_offset, bw, offset to fit in channel plan
+ * @ch_set: channel plan to check
+ * @req_ch: pointer of the request ch, may be modified further
+ * @req_bw: pointer of the request bw, may be modified further
+ * @req_offset: pointer of the request offset, may be modified further
+ * @g_ch: pointer of the ongoing group ch
+ * @g_bw: pointer of the ongoing group bw, may be modified further
+ * @g_offset: pointer of the ongoing group offset, may be modified further
+ */
+void rtw_chset_sync_chbw(RT_CHANNEL_INFO *ch_set, u8 *req_ch, u8 *req_bw, u8 *req_offset
+	, u8 *g_ch, u8 *g_bw, u8 *g_offset)
+{
+	u8 r_ch, r_bw, r_offset;
+	u8 u_ch, u_bw, u_offset;
+	u8 cur_bw = *req_bw;
+
+	while (1) {
+		r_ch = *req_ch;
+		r_bw = cur_bw;
+		r_offset = *req_offset;
+		u_ch = *g_ch;
+		u_bw = *g_bw;
+		u_offset = *g_offset;
+
+		rtw_sync_chbw(&r_ch, &r_bw, &r_offset, &u_ch, &u_bw, &u_offset);
+
+		if (rtw_chset_is_chbw_valid(ch_set, r_ch, r_bw, r_offset))
+			break;
+		if (cur_bw == CHANNEL_WIDTH_20) {
+			rtw_warn_on(1);
+			break;
+		}
+		cur_bw--;
+	};
+
+	*req_ch = r_ch;
+	*req_bw = r_bw;
+	*req_offset = r_offset;
+	*g_ch = u_ch;
+	*g_bw = u_bw;
+	*g_offset = u_offset;
+}
+
 /*
  * Check the @param ch is fit with setband setting of @param adapter
  * @adapter: the given adapter
@@ -1459,8 +974,18 @@ Following are the initialization functions for WiFi MLME
 int init_hw_mlme_ext(_adapter *padapter)
 {
 	struct	mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv;
+	HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter);
 	u8 rx_bar_enble = _TRUE;
 
+	/*
+	 * Sync driver status and hardware setting
+	 */
+
+	/* Modify to make sure first time change channel(band) would be done properly */
+	pHalData->current_channel = 0;
+	pHalData->current_channel_bw = CHANNEL_WIDTH_MAX;
+	pHalData->current_band_type = BAND_MAX;
+
 	/* set_opmode_cmd(padapter, infra_client_with_mlme); */ /* removed */
 	rtw_hal_set_hwreg(padapter, HW_VAR_ENABLE_RX_BAR, &rx_bar_enble);
 	set_channel_bwmode(padapter, pmlmeext->cur_channel, pmlmeext->cur_ch_offset, pmlmeext->cur_bwmode);
@@ -1470,16 +995,40 @@ int init_hw_mlme_ext(_adapter *padapter)
 
 void init_mlme_default_rate_set(_adapter *padapter)
 {
-	struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv;
-
-	unsigned char	mixed_datarate[NumRates] = {_1M_RATE_, _2M_RATE_, _5M_RATE_, _11M_RATE_, _6M_RATE_, _9M_RATE_, _12M_RATE_, _18M_RATE_, _24M_RATE_, _36M_RATE_, _48M_RATE_, _54M_RATE_, 0xff};
-	unsigned char	mixed_basicrate[NumRates] = {_1M_RATE_, _2M_RATE_, _5M_RATE_, _11M_RATE_, _6M_RATE_, _12M_RATE_, _24M_RATE_, 0xff,};
+	struct	mlme_ext_priv	*pmlmeext = &padapter->mlmeextpriv;
+	unsigned	char end_set[1] = {0xff};
+	u8	offset_datarate = 0;
+	u8	offset_basicrate = 0;
+#ifdef CONFIG_80211N_HT
 	unsigned char	supported_mcs_set[16] = {0xff, 0xff, 0xff, 0x00, 0x00, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0};
+#endif
 
-	_rtw_memcpy(pmlmeext->datarate, mixed_datarate, NumRates);
-	_rtw_memcpy(pmlmeext->basicrate, mixed_basicrate, NumRates);
+	if (IsSupportedTxCCK(padapter->registrypriv.wireless_mode)) {
 
-	_rtw_memcpy(pmlmeext->default_supported_mcs_set, supported_mcs_set, sizeof(pmlmeext->default_supported_mcs_set));
+		unsigned char	datarate_b[B_MODE_RATE_NUM] ={_1M_RATE_, _2M_RATE_, _5M_RATE_, _11M_RATE_};
+		_rtw_memcpy(pmlmeext->datarate, datarate_b, B_MODE_RATE_NUM);
+		_rtw_memcpy(pmlmeext->basicrate, datarate_b, B_MODE_RATE_NUM);
+		offset_datarate += B_MODE_RATE_NUM;
+		offset_basicrate += B_MODE_RATE_NUM;
+		RTW_INFO("%s: support CCK\n", __func__);
+	}
+	if(IsSupportedTxOFDM(padapter->registrypriv.wireless_mode)) {
+		unsigned char	datarate_g[G_MODE_RATE_NUM] ={_6M_RATE_, _9M_RATE_, _12M_RATE_, _18M_RATE_,_24M_RATE_, _36M_RATE_, _48M_RATE_, _54M_RATE_};
+		unsigned char	basicrate_g[G_MODE_BASIC_RATE_NUM] = {_6M_RATE_, _12M_RATE_, _24M_RATE_};
+		_rtw_memcpy(pmlmeext->datarate + offset_datarate, datarate_g, G_MODE_RATE_NUM);
+		_rtw_memcpy(pmlmeext->basicrate + offset_basicrate,basicrate_g, G_MODE_BASIC_RATE_NUM);
+		offset_datarate += G_MODE_RATE_NUM;
+		offset_basicrate += G_MODE_BASIC_RATE_NUM;
+		RTW_INFO("%s: support OFDM\n", __func__);
+
+	}
+	_rtw_memcpy(pmlmeext->datarate + offset_datarate, end_set, 1);
+	_rtw_memcpy(pmlmeext->basicrate + offset_basicrate, end_set, 1);
+
+#ifdef CONFIG_80211N_HT
+	if( padapter->registrypriv.ht_enable && is_supported_ht(padapter->registrypriv.wireless_mode))
+		_rtw_memcpy(pmlmeext->default_supported_mcs_set, supported_mcs_set, sizeof(pmlmeext->default_supported_mcs_set));
+#endif
 }
 
 static void init_mlme_ext_priv_value(_adapter *padapter)
@@ -1499,7 +1048,6 @@ static void init_mlme_ext_priv_value(_adapter *padapter)
 	pmlmeext->retry = 0;
 
 	pmlmeext->cur_wireless_mode = padapter->registrypriv.wireless_mode;
-
 	init_mlme_default_rate_set(padapter);
 
 	if (pmlmeext->cur_channel > 14)
@@ -1515,7 +1063,12 @@ static void init_mlme_ext_priv_value(_adapter *padapter)
 	pmlmeext->sitesurvey_res.rx_ampdu_size = RX_AMPDU_SIZE_INVALID;
 #ifdef CONFIG_SCAN_BACKOP
 	mlmeext_assign_scan_backop_flags_sta(pmlmeext, /*SS_BACKOP_EN|*/SS_BACKOP_PS_ANNC | SS_BACKOP_TX_RESUME);
+	#ifdef CONFIG_AP_MODE
 	mlmeext_assign_scan_backop_flags_ap(pmlmeext, SS_BACKOP_EN | SS_BACKOP_PS_ANNC | SS_BACKOP_TX_RESUME);
+	#endif
+	#ifdef CONFIG_RTW_MESH
+	mlmeext_assign_scan_backop_flags_mesh(pmlmeext, /*SS_BACKOP_EN | */SS_BACKOP_PS_ANNC | SS_BACKOP_TX_RESUME);
+	#endif
 	pmlmeext->sitesurvey_res.scan_cnt = 0;
 	pmlmeext->sitesurvey_res.scan_cnt_max = RTW_SCAN_NUM_OF_CH;
 	pmlmeext->sitesurvey_res.backop_ms = RTW_BACK_OP_CH_MS;
@@ -1546,6 +1099,11 @@ static void init_mlme_ext_priv_value(_adapter *padapter)
 
 	pmlmeext->action_public_rxseq = 0xffff;
 	pmlmeext->action_public_dialog_token = 0xff;
+#ifdef ROKU_PRIVATE
+/*infra mode, used to store AP's info*/
+	_rtw_memset(pmlmeinfo->SupportedRates_infra_ap, 0, NDIS_802_11_LENGTH_RATES_EX);
+	pmlmeinfo->ht_vht_received = 0;
+#endif /* ROKU_PRIVATE */
 }
 
 void init_mlme_ext_timer(_adapter *padapter)
@@ -1569,7 +1127,6 @@ int	init_mlme_ext_priv(_adapter *padapter)
 	int	res = _SUCCESS;
 	struct registry_priv *pregistrypriv = &padapter->registrypriv;
 	struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv;
-	struct mlme_priv *pmlmepriv = &(padapter->mlmepriv);
 	struct mlme_ext_info	*pmlmeinfo = &(pmlmeext->mlmext_info);
 
 	/* We don't need to memset padapter->XXX to zero, because adapter is allocated by rtw_zvmalloc(). */
@@ -1602,6 +1159,24 @@ int	init_mlme_ext_priv(_adapter *padapter)
 	pmlmeext->fixed_chan = 0xFF;
 #endif
 
+	pmlmeext->tsf_update_pause_factor = pregistrypriv->tsf_update_pause_factor;
+	pmlmeext->tsf_update_restore_factor = pregistrypriv->tsf_update_restore_factor;
+
+#ifdef CONFIG_SUPPORT_STATIC_SMPS
+	pmlmeext->ssmps_en = _FALSE;
+	pmlmeext->ssmps_tx_tp_th = SSMPS_TX_TP_TH;/*Mbps*/
+	pmlmeext->ssmps_rx_tp_th = SSMPS_RX_TP_TH;/*Mbps*/
+	#ifdef DBG_STATIC_SMPS
+	pmlmeext->ssmps_test = _FALSE;
+	#endif
+#endif
+
+#ifdef CONFIG_CTRL_TXSS_BY_TP
+	pmlmeext->txss_ctrl_en = _TRUE;
+	pmlmeext->txss_tp_th = TXSS_TP_TH;
+	pmlmeext->txss_tp_chk_cnt = TXSS_TP_CHK_CNT;
+#endif
+
 	return res;
 
 }
@@ -1619,12 +1194,14 @@ void free_mlme_ext_priv(struct mlme_ext_priv *pmlmeext)
 	}
 }
 
+#ifdef CONFIG_PATCH_JOIN_WRONG_CHANNEL
 static u8 cmp_pkt_chnl_diff(_adapter *padapter, u8 *pframe, uint packet_len)
 {
 	/* if the channel is same, return 0. else return channel differential	 */
 	uint len;
 	u8 channel;
 	u8 *p;
+
 	p = rtw_get_ie(pframe + WLAN_HDR_A3_LEN + _BEACON_IE_OFFSET_, _DSSET_IE_, &len, packet_len - _BEACON_IE_OFFSET_);
 	if (p) {
 		channel = *(p + 2);
@@ -1635,6 +1212,7 @@ static u8 cmp_pkt_chnl_diff(_adapter *padapter, u8 *pframe, uint packet_len)
 	} else
 		return 0;
 }
+#endif /* CONFIG_PATCH_JOIN_WRONG_CHANNEL */
 
 static void _mgt_dispatcher(_adapter *padapter, struct mlme_handler *ptable, union recv_frame *precv_frame)
 {
@@ -1645,7 +1223,25 @@ static void _mgt_dispatcher(_adapter *padapter, struct mlme_handler *ptable, uni
 		/* receive the frames that ra(a1) is my address or ra(a1) is bc address. */
 		if (!_rtw_memcmp(GetAddr1Ptr(pframe), adapter_mac_addr(padapter), ETH_ALEN) &&
 		    !_rtw_memcmp(GetAddr1Ptr(pframe), bc_addr, ETH_ALEN))
+#ifdef CONFIG_RTW_CFGVENDOR_RANDOM_MAC_OUI
+		{
+			struct rtw_wdev_priv *pwdev_priv = adapter_wdev_data(padapter);
+
+			if (check_fwstate(&padapter->mlmepriv, WIFI_STATION_STATE) != _TRUE)
+				return;
+
+		    if (check_fwstate(&padapter->mlmepriv, _FW_LINKED) == _TRUE)
+				return;
+
+		    if ( pwdev_priv->pno_mac_addr[0] == 0xFF)
+				return;
+
+		    if (!_rtw_memcmp(GetAddr1Ptr(pframe), adapter_pno_mac_addr(padapter), ETH_ALEN))
+				return;
+		}
+#else
 			return;
+#endif
 
 		ptable->func(padapter, precv_frame);
 	}
@@ -1656,9 +1252,6 @@ void mgt_dispatcher(_adapter *padapter, union recv_frame *precv_frame)
 {
 	int index;
 	struct mlme_handler *ptable;
-#ifdef CONFIG_AP_MODE
-	struct mlme_priv *pmlmepriv = &padapter->mlmepriv;
-#endif /* CONFIG_AP_MODE */
 	u8 bc_addr[ETH_ALEN] = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff};
 	u8 *pframe = precv_frame->u.hdr.rx_data;
 	struct sta_info *psta = rtw_get_stainfo(&padapter->stapriv, get_addr2_ptr(pframe));
@@ -1684,7 +1277,25 @@ void mgt_dispatcher(_adapter *padapter, union recv_frame *precv_frame)
 	/* receive the frames that ra(a1) is my address or ra(a1) is bc address. */
 	if (!_rtw_memcmp(GetAddr1Ptr(pframe), adapter_mac_addr(padapter), ETH_ALEN) &&
 	    !_rtw_memcmp(GetAddr1Ptr(pframe), bc_addr, ETH_ALEN))
+#ifdef CONFIG_RTW_CFGVENDOR_RANDOM_MAC_OUI
+		{
+			struct rtw_wdev_priv *pwdev_priv = adapter_wdev_data(padapter);
+
+			if (check_fwstate(&padapter->mlmepriv, WIFI_STATION_STATE) != _TRUE)
+				return;
+
+			if (check_fwstate(&padapter->mlmepriv, _FW_LINKED) == _TRUE)
+				return;
+
+			if ( pwdev_priv->pno_mac_addr[0] == 0xFF)
+				return;
+
+			if (!_rtw_memcmp(GetAddr1Ptr(pframe), adapter_pno_mac_addr(padapter), ETH_ALEN))
+				return;
+		}
+#else
 		return;
+#endif
 
 	ptable = mlme_sta_tbl;
 
@@ -1727,7 +1338,7 @@ void mgt_dispatcher(_adapter *padapter, union recv_frame *precv_frame)
 #ifdef CONFIG_AP_MODE
 	switch (get_frame_sub_type(pframe)) {
 	case WIFI_AUTH:
-		if (MLME_IS_AP(padapter))
+		if (MLME_IS_AP(padapter) || MLME_IS_MESH(padapter))
 			ptable->func = &OnAuth;
 		else
 			ptable->func = &OnAuthClient;
@@ -1870,7 +1481,7 @@ unsigned int OnProbeReq(_adapter *padapter, union recv_frame *precv_frame)
 		/*	Commented by Kurt 2012/10/16 */
 		/*	IOT issue: Google Nexus7 use 1M rate to send p2p_probe_req after GO nego completed and Nexus7 is client */
 		if (padapter->registrypriv.wifi_spec == 1) {
-			if (pattrib->data_rate <= 3)
+			if (pattrib->data_rate <= DESC_RATE11M)
 				wifi_test_chk_rate = 0;
 		}
 
@@ -1995,13 +1606,16 @@ _continue:
 			psta->cmn.bw_mode = CHANNEL_WIDTH_20;
 			psta->ieee8021x_blocked = _FALSE;
 #ifdef CONFIG_80211N_HT
-			psta->htpriv.ht_option = _TRUE;
-			psta->htpriv.ampdu_enable = _FALSE;
-			psta->htpriv.sgi_20m = _FALSE;
-			psta->htpriv.sgi_40m = _FALSE;
-			psta->htpriv.ch_offset = HAL_PRIME_CHNL_OFFSET_DONT_CARE;
-			psta->htpriv.agg_enable_bitmap = 0x0;/* reset */
-			psta->htpriv.candidate_tid_bitmap = 0x0;/* reset */
+			if(padapter->registrypriv.ht_enable &&
+				is_supported_ht(padapter->registrypriv.wireless_mode)) {
+				psta->htpriv.ht_option = _TRUE;
+				psta->htpriv.ampdu_enable = _FALSE;
+				psta->htpriv.sgi_20m = _FALSE;
+				psta->htpriv.sgi_40m = _FALSE;
+				psta->htpriv.ch_offset = HAL_PRIME_CHNL_OFFSET_DONT_CARE;
+				psta->htpriv.agg_enable_bitmap = 0x0;/* reset */
+				psta->htpriv.candidate_tid_bitmap = 0x0;/* reset */
+			}
 #endif
 
 			rtw_hal_set_odm_var(padapter, HAL_ODM_STA_INFO, psta, _TRUE);
@@ -2047,9 +1661,20 @@ _non_rc_device:
 			goto _issue_probersp;
 
 		if ((ielen != 0 && _FALSE == _rtw_memcmp((void *)(p + 2), (void *)cur->Ssid.Ssid, cur->Ssid.SsidLength))
-		    || (ielen == 0 && pmlmeinfo->hidden_ssid_mode)
-		   )
-			return _SUCCESS;
+			|| (ielen == 0 && pmlmeinfo->hidden_ssid_mode))
+			goto exit;
+
+		#ifdef CONFIG_RTW_MESH
+		if (MLME_IS_MESH(padapter)) {
+			p = rtw_get_ie(pframe + WLAN_HDR_A3_LEN + _PROBEREQ_IE_OFFSET_, WLAN_EID_MESH_ID, (int *)&ielen,
+					len - WLAN_HDR_A3_LEN - _PROBEREQ_IE_OFFSET_);
+
+			if (!p)
+				goto exit;
+			if (ielen != 0 && _rtw_memcmp((void *)(p + 2), (void *)cur->mesh_id.Ssid, cur->mesh_id.SsidLength) == _FALSE)
+				goto exit;
+		}
+		#endif
 
 _issue_probersp:
 		if (((check_fwstate(pmlmepriv, _FW_LINKED) == _TRUE &&
@@ -2060,16 +1685,14 @@ _issue_probersp:
 
 	}
 
+exit:
 	return _SUCCESS;
 
 }
 
 unsigned int OnProbeRsp(_adapter *padapter, union recv_frame *precv_frame)
 {
-	struct sta_info		*psta;
 	struct mlme_ext_priv	*pmlmeext = &padapter->mlmeextpriv;
-	struct mlme_ext_info	*pmlmeinfo = &(pmlmeext->mlmext_info);
-	struct sta_priv		*pstapriv = &padapter->stapriv;
 	u8	*pframe = precv_frame->u.hdr.rx_data;
 #ifdef CONFIG_P2P
 	struct wifidirect_info	*pwdinfo = &padapter->wdinfo;
@@ -2117,10 +1740,11 @@ unsigned int OnProbeRsp(_adapter *padapter, union recv_frame *precv_frame)
 
 
 	if ((mlmeext_chk_scan_state(pmlmeext, SCAN_PROCESS))
-#ifdef CONFIG_RTW_REPEATER_SON
+		|| (MLME_IS_MESH(padapter) && check_fwstate(&padapter->mlmepriv, WIFI_ASOC_STATE))
+		#ifdef CONFIG_RTW_REPEATER_SON
 		|| (padapter->rtw_rson_scanstage == RSON_SCAN_PROCESS)
-#endif
-		) {
+		#endif
+	) {
 		rtw_mi_report_survey_event(padapter, precv_frame);
 		return _SUCCESS;
 	}
@@ -2155,12 +1779,11 @@ static void rtw_check_legacy_ap(_adapter *padapter, u8 *pframe, u32 len)
 
 	if (pmlmeext->bstart_bss == _TRUE) {
 		int left;
-		u16 capability;
 		unsigned char *pos;
 		struct rtw_ieee802_11_elems elems;
-		struct HT_info_element *pht_info = NULL;
+#ifdef CONFIG_80211N_HT
 		u16 cur_op_mode; 
-
+#endif
 		/* checking IEs */
 		left = len - sizeof(struct rtw_ieee80211_hdr_3addr) - _BEACON_IE_OFFSET_;
 		pos = pframe + sizeof(struct rtw_ieee80211_hdr_3addr) + _BEACON_IE_OFFSET_;
@@ -2168,9 +1791,9 @@ static void rtw_check_legacy_ap(_adapter *padapter, u8 *pframe, u32 len)
 			RTW_INFO("%s: parse fail for "MAC_FMT"\n", __func__, MAC_ARG(GetAddr3Ptr(pframe)));
 			return;
 		}
-
+#ifdef CONFIG_80211N_HT
 		cur_op_mode = pmlmepriv->ht_op_mode & HT_INFO_OPERATION_MODE_OP_MODE_MASK;
-
+#endif
 		/* for legacy ap */
 		if (elems.ht_capabilities == NULL && elems.ht_capabilities_len == 0) {
 
@@ -2195,8 +1818,6 @@ unsigned int OnBeacon(_adapter *padapter, union recv_frame *precv_frame)
 	uint len = precv_frame->u.hdr.len;
 	WLAN_BSSID_EX *pbss;
 	int ret = _SUCCESS;
-	u8 *p = NULL;
-	u32 ielen = 0;
 #ifdef CONFIG_TDLS
 	struct sta_info *ptdls_sta;
 	struct tdls_info *ptdlsinfo = &padapter->tdlsinfo;
@@ -2207,19 +1828,10 @@ unsigned int OnBeacon(_adapter *padapter, union recv_frame *precv_frame)
 
 	if (validate_beacon_len(pframe, len) == _FALSE)
 		return _SUCCESS;
-#ifdef CONFIG_ATTEMPT_TO_FIX_AP_BEACON_ERROR
-	p = rtw_get_ie(pframe + sizeof(struct rtw_ieee80211_hdr_3addr) + _BEACON_IE_OFFSET_, _EXT_SUPPORTEDRATES_IE_, &ielen,
-		precv_frame->u.hdr.len - sizeof(struct rtw_ieee80211_hdr_3addr) - _BEACON_IE_OFFSET_);
-	if ((p != NULL) && (ielen > 0)) {
-		if ((*(p + 1 + ielen) == 0x2D) && (*(p + 2 + ielen) != 0x2D)) {
-			/* Invalid value 0x2D is detected in Extended Supported Rates (ESR) IE. Try to fix the IE length to avoid failed Beacon parsing. */
-			RTW_INFO("[WIFIDBG] Error in ESR IE is detected in Beacon of BSSID:"MAC_FMT". Fix the length of ESR IE to avoid failed Beacon parsing.\n", MAC_ARG(GetAddr3Ptr(pframe)));
-			*(p + 1) = ielen - 1;
-		}
-	}
-#endif
 
-	if (mlmeext_chk_scan_state(pmlmeext, SCAN_PROCESS)) {
+	if (mlmeext_chk_scan_state(pmlmeext, SCAN_PROCESS)
+		|| (MLME_IS_MESH(padapter) && check_fwstate(pmlmepriv, WIFI_ASOC_STATE))
+	) {
 		rtw_mi_report_survey_event(padapter, precv_frame);
 		return _SUCCESS;
 	}
@@ -2253,12 +1865,13 @@ unsigned int OnBeacon(_adapter *padapter, union recv_frame *precv_frame)
 						RTW_INFO("%s: beacon keys ready\n", __func__);
 						_rtw_memcpy(&pmlmepriv->cur_beacon_keys,
 							&recv_beacon, sizeof(recv_beacon));
-						pmlmepriv->new_beacon_cnts = 0;
 					} else {
 						RTW_ERR("%s: get beacon keys failed\n", __func__);
 						_rtw_memset(&pmlmepriv->cur_beacon_keys, 0, sizeof(recv_beacon));
-						pmlmepriv->new_beacon_cnts = 0;
 					}
+					#ifdef CONFIG_BCN_CNT_CONFIRM_HDL
+					pmlmepriv->new_beacon_cnts = 0;
+					#endif
 				}
 				rtw_mfree((u8 *)pbss, sizeof(WLAN_BSSID_EX));
 			}
@@ -2268,14 +1881,8 @@ unsigned int OnBeacon(_adapter *padapter, union recv_frame *precv_frame)
 
 			/* update TSF Value */
 			update_TSF(pmlmeext, pframe, len);
-
-			/* reset for adaptive_early_32k */
-			pmlmeext->adaptive_tsf_done = _FALSE;
-			pmlmeext->DrvBcnEarly = 0xff;
-			pmlmeext->DrvBcnTimeOut = 0xff;
 			pmlmeext->bcn_cnt = 0;
-			_rtw_memset(pmlmeext->bcn_delay_cnt, 0, sizeof(pmlmeext->bcn_delay_cnt));
-			_rtw_memset(pmlmeext->bcn_delay_ratio, 0, sizeof(pmlmeext->bcn_delay_ratio));
+			pmlmeext->last_bcn_cnt = 0;
 
 #ifdef CONFIG_P2P_PS
 			/* Comment by YiWei , in wifi p2p spec the "3.3 P2P Power Management" , "These mechanisms are available in a P2P Group in which only P2P Devices are associated." */
@@ -2330,9 +1937,10 @@ unsigned int OnBeacon(_adapter *padapter, union recv_frame *precv_frame)
 				}
 
 				pmlmepriv->cur_network_scanned->network.Rssi = precv_frame->u.hdr.attrib.phy_info.recv_signal_power;
-
-				adaptive_early_32k(pmlmeext, pframe, len);
-
+				pmlmeext->bcn_cnt++;
+#ifdef CONFIG_BCN_RECV_TIME
+				rtw_rx_bcn_time_update(padapter, len, precv_frame->u.hdr.attrib.data_rate);
+#endif
 #ifdef CONFIG_TDLS
 #ifdef CONFIG_TDLS_CH_SW
 				if (rtw_tdls_is_chsw_allowed(padapter) == _TRUE) {
@@ -2349,15 +1957,17 @@ unsigned int OnBeacon(_adapter *padapter, union recv_frame *precv_frame)
 #endif
 #endif /* CONFIG_TDLS */
 
-#ifdef CONFIG_DFS
-				process_csa_ie(padapter, pframe, len);	/* channel switch announcement */
-#endif /* CONFIG_DFS */
+				#ifdef CONFIG_DFS
+				process_csa_ie(padapter
+					, pframe + WLAN_HDR_A3_LEN + _BEACON_IE_OFFSET_
+					, len - (WLAN_HDR_A3_LEN + _BEACON_IE_OFFSET_));
+				#endif
 
 #ifdef CONFIG_P2P_PS
 				process_p2p_ps_ie(padapter, (pframe + WLAN_HDR_A3_LEN), (len - WLAN_HDR_A3_LEN));
 #endif /* CONFIG_P2P_PS */
 
-				if (pmlmeext->en_hw_update_tsf)
+				if (pmlmeext->tsf_update_required && pmlmeext->en_hw_update_tsf)
 					rtw_enable_hw_update_tsf_cmd(padapter);
 
 #if 0 /* move to validate_recv_mgnt_frame */
@@ -2366,7 +1976,6 @@ unsigned int OnBeacon(_adapter *padapter, union recv_frame *precv_frame)
 			}
 
 		} else if ((pmlmeinfo->state & 0x03) == WIFI_FW_ADHOC_STATE) {
-			_irqL irqL;
 			u8 rate_set[16];
 			u8 rate_num = 0;
 
@@ -2379,7 +1988,7 @@ unsigned int OnBeacon(_adapter *padapter, union recv_frame *precv_frame)
 				if ((sta_rx_pkts(psta) & 0xf) == 0)
 					update_beacon_info(padapter, pframe, len, psta);
 
-				if (pmlmeext->en_hw_update_tsf)
+				if (pmlmeext->tsf_update_required && pmlmeext->en_hw_update_tsf)
 					rtw_enable_hw_update_tsf_cmd(padapter);
 			} else {
 				rtw_ies_get_supported_rate(pframe + WLAN_HDR_A3_LEN + _BEACON_IE_OFFSET_, len - WLAN_HDR_A3_LEN - _BEACON_IE_OFFSET_, rate_set, &rate_num);
@@ -2444,6 +2053,14 @@ unsigned int OnAuth(_adapter *padapter, union recv_frame *precv_frame)
 	if ((pmlmeinfo->state & 0x03) != WIFI_FW_AP_STATE)
 		return _FAIL;
 
+	if (!MLME_IS_ASOC(padapter))
+		return _SUCCESS;
+
+#if defined(CONFIG_IOCTL_CFG80211) && defined(CONFIG_RTW_MESH)
+	if (MLME_IS_MESH(padapter))
+		return rtw_mesh_on_auth(padapter, precv_frame);
+#endif
+
 	RTW_INFO("+OnAuth\n");
 
 	sa = get_addr2_ptr(pframe);
@@ -2473,6 +2090,13 @@ unsigned int OnAuth(_adapter *padapter, union recv_frame *precv_frame)
 
 	RTW_INFO("auth alg=%x, seq=%X\n", algorithm, seq);
 
+	if (rtw_ap_linking_test_force_auth_fail()) {
+		status = rtw_ap_linking_test_force_auth_fail();
+		RTW_INFO(FUNC_ADPT_FMT" force auth fail with status:%u\n"
+			, FUNC_ADPT_ARG(padapter), status);
+		goto auth_fail;
+	}
+
 	if (auth_mode == 2 &&
 	    psecuritypriv->dot11PrivacyAlgrthm != _WEP40_ &&
 	    psecuritypriv->dot11PrivacyAlgrthm != _WEP104_)
@@ -2647,7 +2271,7 @@ auth_fail:
 	pstat = &stat;
 	_rtw_memset((char *)pstat, '\0', sizeof(stat));
 	pstat->auth_seq = 2;
-	_rtw_memcpy(pstat->cmn.mac_addr, sa, 6);
+	_rtw_memcpy(pstat->cmn.mac_addr, sa, ETH_ALEN);
 
 #ifdef CONFIG_NATIVEAP_MLME
 	issue_auth(padapter, pstat, (unsigned short)status);
@@ -2693,6 +2317,7 @@ unsigned int OnAuthClient(_adapter *padapter, union recv_frame *precv_frame)
 			/* pmlmeinfo->reauth_count = 0; */
 		}
 
+		pmlmeinfo->auth_status = status;
 		set_link_timer(pmlmeext, 1);
 		goto authclnt_fail;
 	}
@@ -2751,14 +2376,13 @@ unsigned int OnAssocReq(_adapter *padapter, union recv_frame *precv_frame)
 {
 #ifdef CONFIG_AP_MODE
 	_irqL irqL;
-	u16 capab_info, listen_interval;
+	u16 listen_interval;
 	struct rtw_ieee802_11_elems elems;
 	struct sta_info	*pstat;
-	unsigned char		reassoc, *p, *pos;
-	int		i, ie_len, left;
+	unsigned char		reassoc, *pos;
+	int		left;
 	unsigned short		status = _STATS_SUCCESSFUL_;
 	unsigned short		frame_type, ie_offset = 0;
-	struct mlme_priv *pmlmepriv = &padapter->mlmepriv;
 	struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv;
 	struct mlme_ext_info	*pmlmeinfo = &(pmlmeext->mlmext_info);
 	WLAN_BSSID_EX	*cur = &(pmlmeinfo->network);
@@ -2828,6 +2452,13 @@ unsigned int OnAssocReq(_adapter *padapter, union recv_frame *precv_frame)
 	}
 #endif
 
+	if (rtw_ap_linking_test_force_asoc_fail()) {
+		status = rtw_ap_linking_test_force_asoc_fail();
+		RTW_INFO(FUNC_ADPT_FMT" force asoc fail with status:%u\n"
+			, FUNC_ADPT_ARG(padapter), status);
+		goto OnAssocReqFail;
+	}
+
 	/* now parse all ieee802_11 ie to point to elems */
 	left = pkt_len - (IEEE80211_3ADDR_LEN + ie_offset);
 	pos = pframe + (IEEE80211_3ADDR_LEN + ie_offset);
@@ -2881,6 +2512,12 @@ unsigned int OnAssocReq(_adapter *padapter, union recv_frame *precv_frame)
 	rtw_ap_parse_sta_wmm_ie(padapter, pstat
 		, pframe + WLAN_HDR_A3_LEN + ie_offset, pkt_len - WLAN_HDR_A3_LEN - ie_offset);
 
+#ifdef CONFIG_RTS_FULL_BW
+	/*check vendor IE*/
+	rtw_parse_sta_vendor_ie_8812(padapter, pstat
+		, pframe + WLAN_HDR_A3_LEN + ie_offset, pkt_len - WLAN_HDR_A3_LEN - ie_offset);
+#endif/*CONFIG_RTS_FULL_BW*/
+
 	rtw_ap_parse_sta_ht_ie(padapter, pstat, &elems);
 	rtw_ap_parse_sta_vht_ie(padapter, pstat, &elems);
 
@@ -3091,7 +2728,9 @@ unsigned int OnAssocRsp(_adapter *padapter, union recv_frame *precv_frame)
 	/* WLAN_BSSID_EX 		*cur_network = &(pmlmeinfo->network); */
 	u8 *pframe = precv_frame->u.hdr.rx_data;
 	uint pkt_len = precv_frame->u.hdr.len;
+#ifdef CONFIG_WAPI_SUPPORT
 	PNDIS_802_11_VARIABLE_IEs	pWapiIE = NULL;
+#endif
 
 	RTW_INFO("%s\n", __FUNCTION__);
 
@@ -3124,6 +2763,14 @@ unsigned int OnAssocRsp(_adapter *padapter, union recv_frame *precv_frame)
 
 	/* AID */
 	res = pmlmeinfo->aid = (int)(le16_to_cpu(*(unsigned short *)(pframe + WLAN_HDR_A3_LEN + 4)) & 0x3fff);
+	
+	/* check aid value */
+	if (res < 1 || res > 2007) {
+		RTW_INFO("assoc reject, aid: %d\n", res);
+		pmlmeinfo->state = WIFI_FW_NULL_STATE;
+		res = -4;
+		goto report_assoc_result;
+	}
 
 	/* following are moved to join event callback function */
 	/* to handle HT, WMM, rate adaptive, update MAC reg */
@@ -3149,6 +2796,9 @@ unsigned int OnAssocRsp(_adapter *padapter, union recv_frame *precv_frame)
 
 		case _HT_CAPABILITY_IE_:	/* HT caps */
 			HT_caps_handler(padapter, pIE);
+#ifdef ROKU_PRIVATE
+			HT_caps_handler_infra_ap(padapter, pIE);
+#endif /* ROKU_PRIVATE */
 			break;
 
 		case _HT_EXTRA_INFO_IE_:	/* HT info */
@@ -3158,6 +2808,9 @@ unsigned int OnAssocRsp(_adapter *padapter, union recv_frame *precv_frame)
 #ifdef CONFIG_80211AC_VHT
 		case EID_VHTCapability:
 			VHT_caps_handler(padapter, pIE);
+#ifdef ROKU_PRIVATE
+			VHT_caps_handler_infra_ap(padapter, pIE);
+#endif /* ROKU_PRIVATE */
 			break;
 
 		case EID_VHTOperation:
@@ -3182,6 +2835,17 @@ unsigned int OnAssocRsp(_adapter *padapter, union recv_frame *precv_frame)
 			RM_IE_handler(padapter, pIE);
 			break;
 #endif
+
+#ifdef ROKU_PRIVATE
+		/* Infra mode, used to store AP's info , Parse the supported rates from AssocRsp */
+		case _SUPPORTEDRATES_IE_:
+			Supported_rate_infra_ap(padapter, pIE);
+			break;
+
+		case _EXT_SUPPORTEDRATES_IE_:
+			Extended_Supported_rate_infra_ap(padapter, pIE);
+			break;
+#endif /* ROKU_PRIVATE */
 		default:
 			break;
 		}
@@ -3205,7 +2869,7 @@ report_assoc_result:
 	else
 		rtw_buf_free(&pmlmepriv->assoc_rsp, &pmlmepriv->assoc_rsp_len);
 
-	report_join_res(padapter, res);
+	report_join_res(padapter, res, status);
 
 #if defined(CONFIG_LAYER2_ROAMING) && defined(CONFIG_RTW_80211K)
 	rtw_roam_nb_discover(padapter, _TRUE);
@@ -3239,8 +2903,6 @@ unsigned int OnDeAuth(_adapter *padapter, union recv_frame *precv_frame)
 
 	reason = le16_to_cpu(*(unsigned short *)(pframe + WLAN_HDR_A3_LEN));
 
-	rtw_lock_rx_suspend_timeout(8000);
-
 #ifdef CONFIG_AP_MODE
 	if (MLME_IS_AP(padapter)) {
 		_irqL irqL;
@@ -3274,7 +2936,7 @@ unsigned int OnDeAuth(_adapter *padapter, union recv_frame *precv_frame)
 		return _SUCCESS;
 	} else
 #endif
-	{
+	if (!MLME_IS_MESH(padapter)) {
 		int	ignore_received_deauth = 0;
 
 		/*	Commented by Albert 20130604 */
@@ -3329,8 +2991,6 @@ unsigned int OnDisassoc(_adapter *padapter, union recv_frame *precv_frame)
 
 	reason = le16_to_cpu(*(unsigned short *)(pframe + WLAN_HDR_A3_LEN));
 
-	rtw_lock_rx_suspend_timeout(8000);
-
 #ifdef CONFIG_AP_MODE
 	if (MLME_IS_AP(padapter)) {
 		_irqL irqL;
@@ -3363,7 +3023,7 @@ unsigned int OnDisassoc(_adapter *padapter, union recv_frame *precv_frame)
 		return _SUCCESS;
 	} else
 #endif
-	{
+	if (!MLME_IS_MESH(padapter)) {
 		RTW_PRINT(FUNC_ADPT_FMT" reason=%u, ta=%pM\n"
 			, FUNC_ADPT_ARG(padapter), reason, get_addr2_ptr(pframe));
 
@@ -3448,8 +3108,6 @@ unsigned int on_action_spct(_adapter *padapter, union recv_frame *precv_frame)
 	u8 category;
 	u8 action;
 
-	RTW_INFO(FUNC_NDEV_FMT"\n", FUNC_NDEV_ARG(padapter->pnetdev));
-
 	psta = rtw_get_stainfo(pstapriv, get_addr2_ptr(pframe));
 
 	if (!psta)
@@ -3460,6 +3118,9 @@ unsigned int on_action_spct(_adapter *padapter, union recv_frame *precv_frame)
 		goto exit;
 
 	action = frame_body[1];
+
+	RTW_INFO(FUNC_ADPT_FMT" action:%u\n", FUNC_ADPT_ARG(padapter), action);
+
 	switch (action) {
 	case RTW_WLAN_ACTION_SPCT_MSR_REQ:
 	case RTW_WLAN_ACTION_SPCT_MSR_RPRT:
@@ -3468,8 +3129,13 @@ unsigned int on_action_spct(_adapter *padapter, union recv_frame *precv_frame)
 		break;
 	case RTW_WLAN_ACTION_SPCT_CHL_SWITCH:
 #ifdef CONFIG_SPCT_CH_SWITCH
-		ret = on_action_spct_ch_switch(padapter, psta, &frame_body[2],
-				       frame_len - (frame_body - pframe) - 2);
+		ret = on_action_spct_ch_switch(padapter, psta
+				, frame_body + 2, frame_len - (frame_body - pframe) - 2);
+#elif defined(CONFIG_DFS)
+		if (MLME_IS_STA(padapter) && MLME_IS_ASOC(padapter)) {
+			process_csa_ie(padapter
+				, frame_body + 2, frame_len - (frame_body - pframe) - 2);
+		}
 #endif
 		break;
 	default:
@@ -3809,7 +3475,6 @@ u8 rx_ampdu_apply_sta(_adapter *adapter, struct sta_info *sta, u8 accept, u8 siz
 u16 rtw_rx_ampdu_apply(_adapter *adapter)
 {
 	u16 adj_cnt = 0;
-	struct mlme_ext_priv *mlmeext = &adapter->mlmeextpriv;
 	struct sta_info *sta;
 	u8 accept = rtw_rx_ampdu_is_accept(adapter);
 	u8 size;
@@ -3995,6 +3660,25 @@ unsigned int OnAction_back(_adapter *padapter, union recv_frame *precv_frame)
 	return _SUCCESS;
 }
 
+#ifdef CONFIG_APPEND_VENDOR_IE_ENABLE
+u32 rtw_build_vendor_ie(_adapter *padapter , unsigned char **pframe , u8 mgmt_frame_tyte)
+{
+	int vendor_ie_num = 0;
+	struct mlme_priv *pmlmepriv = &(padapter->mlmepriv);
+	u32 len = 0;
+
+	for (vendor_ie_num = 0 ; vendor_ie_num < WLAN_MAX_VENDOR_IE_NUM ; vendor_ie_num++) {
+		if (pmlmepriv->vendor_ielen[vendor_ie_num] > 0 && pmlmepriv->vendor_ie_mask[vendor_ie_num] & mgmt_frame_tyte) {
+			_rtw_memcpy(*pframe , pmlmepriv->vendor_ie[vendor_ie_num] , pmlmepriv->vendor_ielen[vendor_ie_num]);
+			*pframe +=  pmlmepriv->vendor_ielen[vendor_ie_num];
+			len += pmlmepriv->vendor_ielen[vendor_ie_num];
+		}
+	}
+
+	return len;
+}
+#endif
+
 #ifdef CONFIG_P2P
 int get_reg_classes_full_count(struct p2p_channels *channel_list)
 {
@@ -4015,8 +3699,7 @@ void issue_p2p_GO_request(_adapter *padapter, u8 *raddr)
 	u32			p2poui = cpu_to_be32(P2POUI);
 	u8			oui_subtype = P2P_GO_NEGO_REQ;
 	u8			wpsie[255] = { 0x00 }, p2pie[255] = { 0x00 };
-	u8			wpsielen = 0, p2pielen = 0, i;
-	u8			channel_cnt_24g = 0, channel_cnt_5gl = 0, channel_cnt_5gh = 0;
+	u8			wpsielen = 0, p2pielen = 0;
 	u16			len_channellist_attr = 0;
 #ifdef CONFIG_WFD
 	u32					wfdielen = 0;
@@ -4029,7 +3712,6 @@ void issue_p2p_GO_request(_adapter *padapter, u8 *raddr)
 	unsigned short				*fctrl;
 	struct xmit_priv			*pxmitpriv = &(padapter->xmitpriv);
 	struct mlme_ext_priv	*pmlmeext = &(padapter->mlmeextpriv);
-	struct mlme_ext_info	*pmlmeinfo = &(pmlmeext->mlmext_info);
 	struct wifidirect_info	*pwdinfo = &(padapter->wdinfo);
 
 
@@ -4413,11 +4095,10 @@ void issue_p2p_GO_response(_adapter *padapter, u8 *raddr, u8 *frame_body, uint l
 	u32			p2poui = cpu_to_be32(P2POUI);
 	u8			oui_subtype = P2P_GO_NEGO_RESP;
 	u8			wpsie[255] = { 0x00 }, p2pie[255] = { 0x00 };
-	u8			p2pielen = 0, i;
+	u8			p2pielen = 0;
 	uint			wpsielen = 0;
 	u16			wps_devicepassword_id = 0x0000;
 	uint			wps_devicepassword_id_len = 0;
-	u8			channel_cnt_24g = 0, channel_cnt_5gl = 0, channel_cnt_5gh;
 	u16			len_channellist_attr = 0;
 
 	struct xmit_frame			*pmgntframe;
@@ -4427,7 +4108,6 @@ void issue_p2p_GO_response(_adapter *padapter, u8 *raddr, u8 *frame_body, uint l
 	unsigned short				*fctrl;
 	struct xmit_priv			*pxmitpriv = &(padapter->xmitpriv);
 	struct mlme_ext_priv	*pmlmeext = &(padapter->mlmeextpriv);
-	struct mlme_ext_info	*pmlmeinfo = &(pmlmeext->mlmext_info);
 	struct wifidirect_info	*pwdinfo = &(padapter->wdinfo);
 
 #ifdef CONFIG_WFD
@@ -4831,8 +4511,8 @@ void issue_p2p_GO_confirm(_adapter *padapter, u8 *raddr, u8 result)
 	u8			action = P2P_PUB_ACTION_ACTION;
 	u32			p2poui = cpu_to_be32(P2POUI);
 	u8			oui_subtype = P2P_GO_NEGO_CONF;
-	u8			wpsie[255] = { 0x00 }, p2pie[255] = { 0x00 };
-	u8			wpsielen = 0, p2pielen = 0;
+	u8			p2pie[255] = { 0x00 };
+	u8			p2pielen = 0;
 
 	struct xmit_frame			*pmgntframe;
 	struct pkt_attrib			*pattrib;
@@ -4841,7 +4521,6 @@ void issue_p2p_GO_confirm(_adapter *padapter, u8 *raddr, u8 result)
 	unsigned short				*fctrl;
 	struct xmit_priv			*pxmitpriv = &(padapter->xmitpriv);
 	struct mlme_ext_priv	*pmlmeext = &(padapter->mlmeextpriv);
-	struct mlme_ext_info	*pmlmeinfo = &(pmlmeext->mlmext_info);
 	struct wifidirect_info	*pwdinfo = &(padapter->wdinfo);
 #ifdef CONFIG_WFD
 	u32					wfdielen = 0;
@@ -5067,9 +4746,8 @@ void issue_p2p_invitation_request(_adapter *padapter, u8 *raddr)
 	u32			p2poui = cpu_to_be32(P2POUI);
 	u8			oui_subtype = P2P_INVIT_REQ;
 	u8			p2pie[255] = { 0x00 };
-	u8			p2pielen = 0, i;
+	u8			p2pielen = 0;
 	u8			dialogToken = 3;
-	u8			channel_cnt_24g = 0, channel_cnt_5gl = 0, channel_cnt_5gh = 0;
 	u16			len_channellist_attr = 0;
 #ifdef CONFIG_WFD
 	u32					wfdielen = 0;
@@ -5082,7 +4760,6 @@ void issue_p2p_invitation_request(_adapter *padapter, u8 *raddr)
 	unsigned short				*fctrl;
 	struct xmit_priv			*pxmitpriv = &(padapter->xmitpriv);
 	struct mlme_ext_priv	*pmlmeext = &(padapter->mlmeextpriv);
-	struct mlme_ext_info	*pmlmeinfo = &(pmlmeext->mlmext_info);
 	struct wifidirect_info	*pwdinfo = &(padapter->wdinfo);
 
 
@@ -5367,8 +5044,7 @@ void issue_p2p_invitation_response(_adapter *padapter, u8 *raddr, u8 dialogToken
 	u32			p2poui = cpu_to_be32(P2POUI);
 	u8			oui_subtype = P2P_INVIT_RESP;
 	u8			p2pie[255] = { 0x00 };
-	u8			p2pielen = 0, i;
-	u8			channel_cnt_24g = 0, channel_cnt_5gl = 0, channel_cnt_5gh = 0;
+	u8			p2pielen = 0;
 	u16			len_channellist_attr = 0;
 #ifdef CONFIG_WFD
 	u32					wfdielen = 0;
@@ -5381,7 +5057,6 @@ void issue_p2p_invitation_response(_adapter *padapter, u8 *raddr, u8 dialogToken
 	unsigned short				*fctrl;
 	struct xmit_priv			*pxmitpriv = &(padapter->xmitpriv);
 	struct mlme_ext_priv	*pmlmeext = &(padapter->mlmeextpriv);
-	struct mlme_ext_info	*pmlmeinfo = &(pmlmeext->mlmext_info);
 	struct wifidirect_info	*pwdinfo = &(padapter->wdinfo);
 
 
@@ -5617,7 +5292,6 @@ void issue_p2p_provision_request(_adapter *padapter, u8 *pssid, u8 ussidlen, u8
 	unsigned short				*fctrl;
 	struct xmit_priv			*pxmitpriv = &(padapter->xmitpriv);
 	struct mlme_ext_priv	*pmlmeext = &(padapter->mlmeextpriv);
-	struct mlme_ext_info	*pmlmeinfo = &(pmlmeext->mlmext_info);
 	struct wifidirect_info	*pwdinfo = &(padapter->wdinfo);
 
 
@@ -5738,7 +5412,6 @@ void issue_probersp_p2p(_adapter *padapter, unsigned char *da)
 	unsigned char					*mac;
 	struct xmit_priv	*pxmitpriv = &(padapter->xmitpriv);
 	struct mlme_ext_priv	*pmlmeext = &(padapter->mlmeextpriv);
-	struct mlme_ext_info	*pmlmeinfo = &(pmlmeext->mlmext_info);
 	struct mlme_priv *pmlmepriv = &(padapter->mlmepriv);
 	/* WLAN_BSSID_EX 		*cur_network = &(pmlmeinfo->network); */
 	u16					beacon_interval = 100;
@@ -6047,6 +5720,11 @@ void issue_probersp_p2p(_adapter *padapter, unsigned char *da)
 	pattrib->pktlen += wfdielen;
 #endif
 
+/* Vendor Specific IE */
+#ifdef CONFIG_APPEND_VENDOR_IE_ENABLE
+	pattrib->pktlen += rtw_build_vendor_ie(padapter , &pframe , WIFI_P2P_PROBERESP_VENDOR_IE_BIT);
+#endif
+
 	pattrib->last_txcmdsz = pattrib->pktlen;
 
 
@@ -6065,11 +5743,8 @@ int _issue_probereq_p2p(_adapter *padapter, u8 *da, int wait_ack)
 	struct rtw_ieee80211_hdr	*pwlanhdr;
 	unsigned short		*fctrl;
 	unsigned char			*mac;
-	unsigned char			bssrate[NumRates];
 	struct xmit_priv		*pxmitpriv = &(padapter->xmitpriv);
 	struct mlme_ext_priv	*pmlmeext = &(padapter->mlmeextpriv);
-	struct mlme_ext_info	*pmlmeinfo = &(pmlmeext->mlmext_info);
-	int	bssrate_len = 0;
 	u8	bc_addr[] = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff};
 	struct wifidirect_info	*pwdinfo = &(padapter->wdinfo);
 	u8					wpsie[255] = { 0x00 }, p2pie[255] = { 0x00 };
@@ -6365,6 +6040,11 @@ int _issue_probereq_p2p(_adapter *padapter, u8 *da, int wait_ack)
 	pattrib->pktlen += wfdielen;
 #endif
 
+/* Vendor Specific IE */
+#ifdef CONFIG_APPEND_VENDOR_IE_ENABLE
+	pattrib->pktlen += rtw_build_vendor_ie(padapter , &pframe , WIFI_P2P_PROBEREQ_VENDOR_IE_BIT);
+#endif
+
 	pattrib->last_txcmdsz = pattrib->pktlen;
 
 
@@ -6464,7 +6144,7 @@ unsigned int on_action_public_p2p(union recv_frame *precv_frame)
 	u8 *frame_body;
 #ifdef CONFIG_P2P
 	u8 *p2p_ie;
-	u32	p2p_ielen, wps_ielen;
+	u32	p2p_ielen;
 	struct	wifidirect_info	*pwdinfo = &(padapter->wdinfo);
 	u8	result = P2P_STATUS_SUCCESS;
 	u8	empty_addr[ETH_ALEN] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 };
@@ -6602,7 +6282,6 @@ unsigned int on_action_public_p2p(union recv_frame *precv_frame)
 				u8	status_code = P2P_STATUS_FAIL_INFO_UNAVAILABLE;
 				struct group_id_info group_id;
 				u8	invitation_flag = 0;
-				int j = 0;
 
 				merged_p2p_ielen = rtw_get_p2p_merged_ies_len(frame_body + _PUBLIC_ACTION_IE_OFFSET_, len - _PUBLIC_ACTION_IE_OFFSET_);
 
@@ -6837,7 +6516,6 @@ unsigned int on_action_public_vendor(union recv_frame *precv_frame)
 {
 	unsigned int ret = _FAIL;
 	u8 *pframe = precv_frame->u.hdr.rx_data;
-	uint frame_len = precv_frame->u.hdr.len;
 	u8 *frame_body = pframe + sizeof(struct rtw_ieee80211_hdr_3addr);
 
 	if (_rtw_memcmp(frame_body + 2, P2P_OUI, 4) == _TRUE) {
@@ -6858,7 +6536,6 @@ unsigned int on_action_public_default(union recv_frame *precv_frame, u8 action)
 {
 	unsigned int ret = _FAIL;
 	u8 *pframe = precv_frame->u.hdr.rx_data;
-	uint frame_len = precv_frame->u.hdr.len;
 	u8 *frame_body = pframe + sizeof(struct rtw_ieee80211_hdr_3addr);
 	u8 token;
 	_adapter *adapter = precv_frame->u.hdr.adapter;
@@ -7483,7 +7160,6 @@ exit:
 unsigned int OnAction_ht(_adapter *padapter, union recv_frame *precv_frame)
 {
 	u8 *pframe = precv_frame->u.hdr.rx_data;
-	uint frame_len = precv_frame->u.hdr.len;
 	u8 *frame_body = pframe + sizeof(struct rtw_ieee80211_hdr_3addr);
 	u8 category, action;
 
@@ -7582,9 +7258,7 @@ unsigned int OnAction_wmm(_adapter *padapter, union recv_frame *precv_frame)
 unsigned int OnAction_vht(_adapter *padapter, union recv_frame *precv_frame)
 {
 #ifdef CONFIG_80211AC_VHT
-	struct rx_pkt_attrib *prxattrib = &precv_frame->u.hdr.attrib;
 	u8 *pframe = precv_frame->u.hdr.rx_data;
-	uint frame_len = precv_frame->u.hdr.len;
 	struct rtw_ieee80211_hdr_3addr *whdr = (struct rtw_ieee80211_hdr_3addr *)pframe;
 	u8 *frame_body = pframe + sizeof(struct rtw_ieee80211_hdr_3addr);
 	u8 category, action;
@@ -7851,6 +7525,11 @@ void update_mgntframe_attrib(_adapter *padapter, struct pkt_attrib *pattrib)
 	u8	wireless_mode;
 	struct mlme_ext_priv	*pmlmeext = &(padapter->mlmeextpriv);
 	struct xmit_priv		*pxmitpriv = &padapter->xmitpriv;
+
+#ifdef CONFIG_P2P_PS_NOA_USE_MACID_SLEEP
+	struct wifidirect_info *pwdinfo = &(padapter->wdinfo);
+#endif /* CONFIG_P2P_PS_NOA_USE_MACID_SLEEP */
+
 	/* _rtw_memset((u8 *)(pattrib), 0, sizeof(struct pkt_attrib)); */
 
 	pattrib->hdrlen = 24;
@@ -7863,6 +7542,33 @@ void update_mgntframe_attrib(_adapter *padapter, struct pkt_attrib *pattrib)
 	update_mcc_mgntframe_attrib(padapter, pattrib);
 #endif
 
+
+#ifdef CONFIG_P2P_PS_NOA_USE_MACID_SLEEP
+#ifdef CONFIG_CONCURRENT_MODE
+	if (rtw_mi_buddy_check_fwstate(padapter, WIFI_ASOC_STATE))
+#endif /* CONFIG_CONCURRENT_MODE */
+		if (MLME_IS_GC(padapter)) {
+			if (pwdinfo->p2p_ps_mode > P2P_PS_NONE) {
+				struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv;
+				struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info);
+				WLAN_BSSID_EX *cur_network = &(pmlmeinfo->network);
+				struct sta_priv *pstapriv = &padapter->stapriv;
+				struct sta_info *psta;
+
+				psta = rtw_get_stainfo(pstapriv, cur_network->MacAddress);
+				if (psta) {
+					/* use macid sleep during NoA, mgmt frame use ac queue & ap macid */
+					pattrib->mac_id = psta->cmn.mac_id;
+					pattrib->qsel = QSLT_VO;
+				} else {
+					if (pwdinfo->p2p_ps_state != P2P_PS_DISABLE)
+						RTW_ERR("%s , psta was NULL\n", __func__);
+				}
+			}
+		}
+#endif /* CONFIG_P2P_PS_NOA_USE_MACID_SLEEP */
+
+
 	pattrib->pktlen = 0;
 
 	if (IS_CCK_RATE(pmlmeext->tx_rate))
@@ -8029,25 +7735,6 @@ int update_hidden_ssid(u8 *ies, u32 ies_len, u8 hidden_ssid_mode)
 	return len_diff;
 }
 
-#ifdef CONFIG_APPEND_VENDOR_IE_ENABLE
-u32 rtw_build_vendor_ie(_adapter *padapter , unsigned char *pframe , u8 mgmt_frame_tyte)
-{
-	int vendor_ie_num = 0;
-	struct mlme_priv *pmlmepriv = &(padapter->mlmepriv);
-	u32 len = 0;
-
-	for (vendor_ie_num = 0 ; vendor_ie_num < WLAN_MAX_VENDOR_IE_NUM ; vendor_ie_num++) {
-		if (pmlmepriv->vendor_ielen[vendor_ie_num] > 0 && pmlmepriv->vendor_ie_mask[vendor_ie_num] & mgmt_frame_tyte) {
-			_rtw_memcpy(pframe , pmlmepriv->vendor_ie[vendor_ie_num] , pmlmepriv->vendor_ielen[vendor_ie_num]);
-			pframe +=  pmlmepriv->vendor_ielen[vendor_ie_num];
-			len += pmlmepriv->vendor_ielen[vendor_ie_num];
-		}
-	}
-
-	return len;
-}
-#endif
-
 void issue_beacon(_adapter *padapter, int timeout_ms)
 {
 	struct xmit_frame	*pmgntframe;
@@ -8096,6 +7783,10 @@ void issue_beacon(_adapter *padapter, int timeout_ms)
 	if (padapter->hw_port == HW_PORT1)
 		pattrib->mbssid = 1;
 #endif
+#ifdef CONFIG_FW_HANDLE_TXBCN
+	if (padapter->vap_id != CONFIG_LIMITED_AP_NUM)
+		pattrib->mbssid = padapter->vap_id;
+#endif
 
 	_rtw_memset(pmgntframe->buf_addr, 0, WLANHDR_OFFSET + TXDESC_OFFSET);
 
@@ -8241,6 +7932,12 @@ void issue_beacon(_adapter *padapter, int timeout_ms)
 				_clr_fwstate_(pmlmepriv, WIFI_UNDER_WPS);
 		}
 
+#ifdef CONFIG_RTW_80211K
+		pframe = rtw_set_ie(pframe, _EID_RRM_EN_CAP_IE_,
+			sizeof(padapter->rmpriv.rm_en_cap_def),
+			padapter->rmpriv.rm_en_cap_def, &pattrib->pktlen);
+#endif
+
 #ifdef CONFIG_P2P
 		if (rtw_p2p_chk_role(pwdinfo, P2P_ROLE_GO)) {
 			u32 len;
@@ -8273,8 +7970,13 @@ void issue_beacon(_adapter *padapter, int timeout_ms)
 		rtw_rson_append_ie(padapter, pframe, &pattrib->pktlen);
 #endif
 #ifdef CONFIG_APPEND_VENDOR_IE_ENABLE
-		pattrib->pktlen += rtw_build_vendor_ie(padapter , pframe , WIFI_BEACON_VENDOR_IE_BIT);
+		pattrib->pktlen += rtw_build_vendor_ie(padapter , &pframe , WIFI_BEACON_VENDOR_IE_BIT);
 #endif
+
+#ifdef CONFIG_RTL8812A 
+		pframe = rtw_hal_set_8812a_vendor_ie(padapter, pframe, &pattrib->pktlen );
+#endif/*CONFIG_RTL8812A*/
+
 		goto _issue_bcn;
 
 	}
@@ -8338,8 +8040,10 @@ _issue_bcn:
 	_exit_critical_bh(&pmlmepriv->bcn_update_lock, &irqL);
 #endif /* #if defined (CONFIG_AP_MODE) && defined (CONFIG_NATIVEAP_MLME) */
 
-	if ((pattrib->pktlen + TXDESC_SIZE) > 512) {
-		RTW_INFO("beacon frame too large\n");
+	if ((pattrib->pktlen + TXDESC_SIZE) > MAX_BEACON_LEN) {
+		RTW_ERR("beacon frame too large ,len(%d,%d)\n",
+			(pattrib->pktlen + TXDESC_SIZE), MAX_BEACON_LEN);
+		rtw_warn_on(1);
 		return;
 	}
 
@@ -8373,9 +8077,6 @@ void issue_probersp(_adapter *padapter, unsigned char *da, u8 is_valid_p2p_probe
 	unsigned int	rate_len;
 #ifdef CONFIG_P2P
 	struct wifidirect_info	*pwdinfo = &(padapter->wdinfo);
-#ifdef CONFIG_WFD
-	u32					wfdielen = 0;
-#endif
 #endif /* CONFIG_P2P */
 
 	/* RTW_INFO("%s\n", __FUNCTION__); */
@@ -8497,7 +8198,7 @@ void issue_probersp(_adapter *padapter, unsigned char *da, u8 is_valid_p2p_probe
 		rtw_rson_append_ie(padapter, pframe, &pattrib->pktlen);
 #endif
 #ifdef CONFIG_APPEND_VENDOR_IE_ENABLE
-		pattrib->pktlen += rtw_build_vendor_ie(padapter , pframe , WIFI_PROBERESP_VENDOR_IE_BIT);
+		pattrib->pktlen += rtw_build_vendor_ie(padapter , &pframe , WIFI_PROBERESP_VENDOR_IE_BIT);
 #endif
 	} else
 #endif
@@ -8555,6 +8256,12 @@ void issue_probersp(_adapter *padapter, unsigned char *da, u8 is_valid_p2p_probe
 
 	}
 
+#ifdef CONFIG_RTW_80211K
+	pframe = rtw_set_ie(pframe, _EID_RRM_EN_CAP_IE_,
+		sizeof(padapter->rmpriv.rm_en_cap_def),
+		padapter->rmpriv.rm_en_cap_def, &pattrib->pktlen);
+#endif
+
 #ifdef CONFIG_P2P
 	if (rtw_p2p_chk_role(pwdinfo, P2P_ROLE_GO)
 	    /* IOT issue, When wifi_spec is not set, send probe_resp with P2P IE even if probe_req has no P2P IE */
@@ -8617,6 +8324,9 @@ void issue_probersp(_adapter *padapter, unsigned char *da, u8 is_valid_p2p_probe
 	}
 #endif /* CONFIG_AUTO_AP_MODE */
 
+#ifdef CONFIG_RTL8812A 
+	pframe = rtw_hal_set_8812a_vendor_ie(padapter, pframe, &pattrib->pktlen);
+#endif/*CONFIG_RTL8812A*/
 
 	pattrib->last_txcmdsz = pattrib->pktlen;
 
@@ -8627,7 +8337,7 @@ void issue_probersp(_adapter *padapter, unsigned char *da, u8 is_valid_p2p_probe
 
 }
 
-int _issue_probereq(_adapter *padapter, NDIS_802_11_SSID *pssid, u8 *da, u8 ch, bool append_wps, int wait_ack)
+int _issue_probereq(_adapter *padapter, const NDIS_802_11_SSID *pssid, const u8 *da, u8 ch, bool append_wps, int wait_ack)
 {
 	int ret = _FAIL;
 	struct xmit_frame		*pmgntframe;
@@ -8640,9 +8350,11 @@ int _issue_probereq(_adapter *padapter, NDIS_802_11_SSID *pssid, u8 *da, u8 ch,
 	struct xmit_priv		*pxmitpriv = &(padapter->xmitpriv);
 	struct mlme_priv *pmlmepriv = &(padapter->mlmepriv);
 	struct mlme_ext_priv	*pmlmeext = &(padapter->mlmeextpriv);
-	struct mlme_ext_info	*pmlmeinfo = &(pmlmeext->mlmext_info);
 	int	bssrate_len = 0;
 	u8	bc_addr[] = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff};
+#ifdef CONFIG_RTW_CFGVENDOR_RANDOM_MAC_OUI
+	struct rtw_wdev_priv *pwdev_priv = adapter_wdev_data(padapter);
+#endif
 
 	if (rtw_rfctl_is_tx_blocked_by_ch_waiting(adapter_to_rfctl(padapter)))
 		goto exit;
@@ -8661,6 +8373,13 @@ int _issue_probereq(_adapter *padapter, NDIS_802_11_SSID *pssid, u8 *da, u8 ch,
 	pframe = (u8 *)(pmgntframe->buf_addr) + TXDESC_OFFSET;
 	pwlanhdr = (struct rtw_ieee80211_hdr *)pframe;
 
+#ifdef CONFIG_RTW_CFGVENDOR_RANDOM_MAC_OUI
+	if ((pwdev_priv->pno_mac_addr[0] != 0xFF)
+	    && (check_fwstate(&padapter->mlmepriv, WIFI_STATION_STATE) == _TRUE)
+	    && (check_fwstate(&padapter->mlmepriv, _FW_LINKED) == _FALSE))
+		mac = pwdev_priv->pno_mac_addr;
+	else
+#endif
 	mac = adapter_mac_addr(padapter);
 
 	fctrl = &(pwlanhdr->frame_ctl);
@@ -8678,14 +8397,30 @@ int _issue_probereq(_adapter *padapter, NDIS_802_11_SSID *pssid, u8 *da, u8 ch,
 
 	_rtw_memcpy(pwlanhdr->addr2, mac, ETH_ALEN);
 
-	SetSeqNum(pwlanhdr, pmlmeext->mgnt_seq);
-	pmlmeext->mgnt_seq++;
+#ifdef CONFIG_RTW_CFGVENDOR_RANDOM_MAC_OUI
+	if ((pwdev_priv->pno_mac_addr[0] != 0xFF)
+	    && (check_fwstate(&padapter->mlmepriv, WIFI_STATION_STATE) == _TRUE)
+	    && (check_fwstate(&padapter->mlmepriv, _FW_LINKED) == _FALSE)) {
+#ifdef CONFIG_RTW_DEBUG
+		RTW_DBG("%s pno_scan_seq_num: %d\n", __func__,
+			 pwdev_priv->pno_scan_seq_num);
+#endif
+		SetSeqNum(pwlanhdr, pwdev_priv->pno_scan_seq_num);
+		pattrib->seqnum = pwdev_priv->pno_scan_seq_num;
+		pattrib->qos_en = 1;
+		pwdev_priv->pno_scan_seq_num++;
+	} else
+#endif
+	{
+		SetSeqNum(pwlanhdr, pmlmeext->mgnt_seq);
+		pmlmeext->mgnt_seq++;
+	}
 	set_frame_sub_type(pframe, WIFI_PROBEREQ);
 
 	pframe += sizeof(struct rtw_ieee80211_hdr_3addr);
 	pattrib->pktlen = sizeof(struct rtw_ieee80211_hdr_3addr);
 
-	if (pssid)
+	if (pssid && !MLME_IS_MESH(padapter))
 		pframe = rtw_set_ie(pframe, _SSID_IE_, pssid->SsidLength, pssid->Ssid, &(pattrib->pktlen));
 	else
 		pframe = rtw_set_ie(pframe, _SSID_IE_, 0, NULL, &(pattrib->pktlen));
@@ -8701,6 +8436,15 @@ int _issue_probereq(_adapter *padapter, NDIS_802_11_SSID *pssid, u8 *da, u8 ch,
 	if (ch)
 		pframe = rtw_set_ie(pframe, _DSSET_IE_, 1, &ch, &pattrib->pktlen);
 
+#ifdef CONFIG_RTW_MESH
+	if (MLME_IS_MESH(padapter)) {
+		if (pssid)
+			pframe = rtw_set_ie_mesh_id(pframe, &pattrib->pktlen, pssid->Ssid, pssid->SsidLength);
+		else
+			pframe = rtw_set_ie_mesh_id(pframe, &pattrib->pktlen, NULL, 0);
+	}
+#endif
+
 	if (append_wps) {
 		/* add wps_ie for wps2.0 */
 		if (pmlmepriv->wps_probe_req_ie_len > 0 && pmlmepriv->wps_probe_req_ie) {
@@ -8711,9 +8455,14 @@ int _issue_probereq(_adapter *padapter, NDIS_802_11_SSID *pssid, u8 *da, u8 ch,
 		}
 	}
 #ifdef CONFIG_APPEND_VENDOR_IE_ENABLE
-	pattrib->pktlen += rtw_build_vendor_ie(padapter , pframe , WIFI_PROBEREQ_VENDOR_IE_BIT);
+	pattrib->pktlen += rtw_build_vendor_ie(padapter , &pframe , WIFI_PROBEREQ_VENDOR_IE_BIT);
 #endif
 
+#ifdef CONFIG_RTL8812A 
+	pframe = rtw_hal_set_8812a_vendor_ie(padapter, pframe, &pattrib->pktlen );
+#endif/*CONFIG_RTL8812A*/
+
+
 	pattrib->last_txcmdsz = pattrib->pktlen;
 
 
@@ -8728,7 +8477,7 @@ exit:
 	return ret;
 }
 
-inline void issue_probereq(_adapter *padapter, NDIS_802_11_SSID *pssid, u8 *da)
+inline void issue_probereq(_adapter *padapter, const NDIS_802_11_SSID *pssid, const u8 *da)
 {
 	_issue_probereq(padapter, pssid, da, 0, 1, _FALSE);
 }
@@ -8738,7 +8487,7 @@ inline void issue_probereq(_adapter *padapter, NDIS_802_11_SSID *pssid, u8 *da)
  * wait_ms > 0 means you want to wait ack through C2H_CCX_TX_RPT, and the value of wait_ms means the interval between each TX
  * try_cnt means the maximal TX count to try
  */
-int issue_probereq_ex(_adapter *padapter, NDIS_802_11_SSID *pssid, u8 *da, u8 ch, bool append_wps,
+int issue_probereq_ex(_adapter *padapter, const NDIS_802_11_SSID *pssid, const u8 *da, u8 ch, bool append_wps,
 		      int try_cnt, int wait_ms)
 {
 	int ret = _FAIL;
@@ -9147,8 +8896,14 @@ void issue_asocrsp(_adapter *padapter, unsigned short status, struct sta_info *p
 
 #endif /* CONFIG_P2P */
 #ifdef CONFIG_APPEND_VENDOR_IE_ENABLE
-	pattrib->pktlen += rtw_build_vendor_ie(padapter , pframe , WIFI_ASSOCRESP_VENDOR_IE_BIT);
+	pattrib->pktlen += rtw_build_vendor_ie(padapter , &pframe , WIFI_ASSOCRESP_VENDOR_IE_BIT);
 #endif
+
+#ifdef CONFIG_RTL8812A 
+	pframe = rtw_hal_set_8812a_vendor_ie(padapter, pframe, &pattrib->pktlen );
+#endif/*CONFIG_RTL8812A*/
+
+
 	pattrib->last_txcmdsz = pattrib->pktlen;
 
 	dump_mgntframe(padapter, pmgntframe);
@@ -9161,14 +8916,13 @@ void _issue_assocreq(_adapter *padapter, u8 is_reassoc)
 	int ret = _FAIL;
 	struct xmit_frame				*pmgntframe;
 	struct pkt_attrib				*pattrib;
-	unsigned char					*pframe, *p;
+	unsigned char					*pframe;
 	struct rtw_ieee80211_hdr			*pwlanhdr;
 	unsigned short				*fctrl;
 	unsigned short				val16;
-	unsigned int					i, j, ie_len, index = 0;
-	unsigned char					rf_type, bssrate[NumRates], sta_bssrate[NumRates];
+	unsigned int					i, j, index = 0;
+	unsigned char					bssrate[NumRates], sta_bssrate[NumRates];
 	PNDIS_802_11_VARIABLE_IEs	pIE;
-	struct registry_priv	*pregpriv = &padapter->registrypriv;
 	struct xmit_priv		*pxmitpriv = &(padapter->xmitpriv);
 	struct mlme_priv *pmlmepriv = &(padapter->mlmepriv);
 	struct mlme_ext_priv	*pmlmeext = &(padapter->mlmeextpriv);
@@ -9585,19 +9339,24 @@ void _issue_assocreq(_adapter *padapter, u8 is_reassoc)
 		}
 	}
 
-#endif /* CONFIG_P2P */
-
 #ifdef CONFIG_WFD
 	wfdielen = rtw_append_assoc_req_wfd_ie(padapter, pframe);
 	pframe += wfdielen;
 	pattrib->pktlen += wfdielen;
 #endif
+#endif /* CONFIG_P2P */
+
 #ifdef CONFIG_RTW_REPEATER_SON
 	rtw_rson_append_ie(padapter, pframe, &pattrib->pktlen);
 #endif
 #ifdef CONFIG_APPEND_VENDOR_IE_ENABLE
-	pattrib->pktlen += rtw_build_vendor_ie(padapter , pframe , WIFI_ASSOCREQ_VENDOR_IE_BIT);
+	pattrib->pktlen += rtw_build_vendor_ie(padapter , &pframe , WIFI_ASSOCREQ_VENDOR_IE_BIT);
 #endif
+
+#ifdef CONFIG_RTL8812A 
+	pframe = rtw_hal_set_8812a_vendor_ie(padapter, pframe, &pattrib->pktlen );
+#endif/*CONFIG_RTL8812A*/
+
 #ifdef CONFIG_RTW_80211R
 	rtw_ft_build_assoc_req_ies(padapter, is_reassoc, pattrib, &pframe);
 #endif
@@ -9638,6 +9397,7 @@ static int _issue_nulldata(_adapter *padapter, unsigned char *da, unsigned int p
 	struct xmit_priv	*pxmitpriv;
 	struct mlme_ext_priv	*pmlmeext;
 	struct mlme_ext_info	*pmlmeinfo;
+	u8 a4_shift;
 
 	/* RTW_INFO("%s:%d\n", __FUNCTION__, power_mode); */
 
@@ -9672,20 +9432,34 @@ static int _issue_nulldata(_adapter *padapter, unsigned char *da, unsigned int p
 		SetFrDs(fctrl);
 	else if (MLME_IS_STA(padapter))
 		SetToDs(fctrl);
+	else if (MLME_IS_MESH(padapter)) {
+		SetToDs(fctrl);
+		SetFrDs(fctrl);
+	}
 
 	if (power_mode)
 		SetPwrMgt(fctrl);
 
-	_rtw_memcpy(pwlanhdr->addr1, da, ETH_ALEN);
-	_rtw_memcpy(pwlanhdr->addr2, adapter_mac_addr(padapter), ETH_ALEN);
-	_rtw_memcpy(pwlanhdr->addr3, get_my_bssid(&(pmlmeinfo->network)), ETH_ALEN);
+	if (get_tofr_ds(fctrl) == 3) {
+		_rtw_memcpy(pwlanhdr->addr1, da, ETH_ALEN);
+		_rtw_memcpy(pwlanhdr->addr2, adapter_mac_addr(padapter), ETH_ALEN);
+		_rtw_memcpy(pwlanhdr->addr3, da, ETH_ALEN);
+		_rtw_memcpy(pwlanhdr->addr4, adapter_mac_addr(padapter), ETH_ALEN);
+		a4_shift = ETH_ALEN;
+		pattrib->hdrlen += ETH_ALEN;
+	} else {
+		_rtw_memcpy(pwlanhdr->addr1, da, ETH_ALEN);
+		_rtw_memcpy(pwlanhdr->addr2, adapter_mac_addr(padapter), ETH_ALEN);
+		_rtw_memcpy(pwlanhdr->addr3, get_my_bssid(&(pmlmeinfo->network)), ETH_ALEN);
+		a4_shift = 0;
+	}
 
 	SetSeqNum(pwlanhdr, pmlmeext->mgnt_seq);
 	pmlmeext->mgnt_seq++;
 	set_frame_sub_type(pframe, WIFI_DATA_NULL);
 
-	pframe += sizeof(struct rtw_ieee80211_hdr_3addr);
-	pattrib->pktlen = sizeof(struct rtw_ieee80211_hdr_3addr);
+	pframe += sizeof(struct rtw_ieee80211_hdr_3addr) + a4_shift;
+	pattrib->pktlen = sizeof(struct rtw_ieee80211_hdr_3addr) + a4_shift;
 
 	pattrib->last_txcmdsz = pattrib->pktlen;
 
@@ -9757,7 +9531,7 @@ exit:
 }
 
 /* when wait_ack is ture, this function shoule be called at process context */
-static int _issue_qos_nulldata(_adapter *padapter, unsigned char *da, u16 tid, int wait_ack)
+static int _issue_qos_nulldata(_adapter *padapter, unsigned char *da, u16 tid, u8 ps, int wait_ack)
 {
 	int ret = _FAIL;
 	struct xmit_frame			*pmgntframe;
@@ -9768,11 +9542,12 @@ static int _issue_qos_nulldata(_adapter *padapter, unsigned char *da, u16 tid, i
 	struct xmit_priv			*pxmitpriv = &(padapter->xmitpriv);
 	struct mlme_ext_priv	*pmlmeext = &(padapter->mlmeextpriv);
 	struct mlme_ext_info	*pmlmeinfo = &(pmlmeext->mlmext_info);
+	u8 a4_shift;
 
 	if (rtw_rfctl_is_tx_blocked_by_ch_waiting(adapter_to_rfctl(padapter)))
 		goto exit;
 
-	RTW_INFO("%s\n", __FUNCTION__);
+	/* RTW_INFO("%s\n", __FUNCTION__); */
 
 	pmgntframe = alloc_mgtxmitframe(pxmitpriv);
 	if (pmgntframe == NULL)
@@ -9800,10 +9575,31 @@ static int _issue_qos_nulldata(_adapter *padapter, unsigned char *da, u16 tid, i
 		SetFrDs(fctrl);
 	else if (MLME_IS_STA(padapter))
 		SetToDs(fctrl);
+	else if (MLME_IS_MESH(padapter)) {
+		SetToDs(fctrl);
+		SetFrDs(fctrl);
+	}
+
+	if (ps)
+		SetPwrMgt(fctrl);
 
 	if (pattrib->mdata)
 		SetMData(fctrl);
 
+	if (get_tofr_ds(fctrl) == 3) {
+		_rtw_memcpy(pwlanhdr->addr1, da, ETH_ALEN);
+		_rtw_memcpy(pwlanhdr->addr2, adapter_mac_addr(padapter), ETH_ALEN);
+		_rtw_memcpy(pwlanhdr->addr3, da, ETH_ALEN);
+		_rtw_memcpy(pwlanhdr->addr4, adapter_mac_addr(padapter), ETH_ALEN);
+		a4_shift = ETH_ALEN;
+		pattrib->hdrlen += ETH_ALEN;
+	} else {
+		_rtw_memcpy(pwlanhdr->addr1, da, ETH_ALEN);
+		_rtw_memcpy(pwlanhdr->addr2, adapter_mac_addr(padapter), ETH_ALEN);
+		_rtw_memcpy(pwlanhdr->addr3, get_my_bssid(&(pmlmeinfo->network)), ETH_ALEN);
+		a4_shift = 0;
+	}
+
 	qc = (unsigned short *)(pframe + pattrib->hdrlen - 2);
 
 	SetPriority(qc, tid);
@@ -9812,16 +9608,12 @@ static int _issue_qos_nulldata(_adapter *padapter, unsigned char *da, u16 tid, i
 
 	SetAckpolicy(qc, pattrib->ack_policy);
 
-	_rtw_memcpy(pwlanhdr->addr1, da, ETH_ALEN);
-	_rtw_memcpy(pwlanhdr->addr2, adapter_mac_addr(padapter), ETH_ALEN);
-	_rtw_memcpy(pwlanhdr->addr3, get_my_bssid(&(pmlmeinfo->network)), ETH_ALEN);
-
 	SetSeqNum(pwlanhdr, pmlmeext->mgnt_seq);
 	pmlmeext->mgnt_seq++;
 	set_frame_sub_type(pframe, WIFI_QOS_DATA_NULL);
 
-	pframe += sizeof(struct rtw_ieee80211_hdr_3addr_qos);
-	pattrib->pktlen = sizeof(struct rtw_ieee80211_hdr_3addr_qos);
+	pframe += sizeof(struct rtw_ieee80211_hdr_3addr_qos) + a4_shift;
+	pattrib->pktlen = sizeof(struct rtw_ieee80211_hdr_3addr_qos) + a4_shift;
 
 	pattrib->last_txcmdsz = pattrib->pktlen;
 
@@ -9843,7 +9635,7 @@ exit:
  * try_cnt means the maximal TX count to try
  * da == NULL for station mode
  */
-int issue_qos_nulldata(_adapter *padapter, unsigned char *da, u16 tid, int try_cnt, int wait_ms)
+int issue_qos_nulldata(_adapter *padapter, unsigned char *da, u16 tid, u8 ps, int try_cnt, int wait_ms)
 {
 	int ret = _FAIL;
 	int i = 0;
@@ -9859,7 +9651,7 @@ int issue_qos_nulldata(_adapter *padapter, unsigned char *da, u16 tid, int try_c
 		da = get_my_bssid(&(pmlmeinfo->network));
 
 	do {
-		ret = _issue_qos_nulldata(padapter, da, tid, wait_ms > 0 ? _TRUE : _FALSE);
+		ret = _issue_qos_nulldata(padapter, da, tid, ps, wait_ms > 0 ? _TRUE : _FALSE);
 
 		i++;
 
@@ -10029,17 +9821,13 @@ exit:
 
 void issue_action_spct_ch_switch(_adapter *padapter, u8 *ra, u8 new_ch, u8 ch_offset)
 {
-	_irqL	irqL;
-	_list		*plist, *phead;
-	struct xmit_frame			*pmgntframe;
-	struct pkt_attrib			*pattrib;
+	struct xmit_frame *pmgntframe;
+	struct pkt_attrib *pattrib;
 	unsigned char				*pframe;
 	struct rtw_ieee80211_hdr	*pwlanhdr;
 	unsigned short			*fctrl;
 	struct xmit_priv			*pxmitpriv = &(padapter->xmitpriv);
-	struct mlme_priv *pmlmepriv = &padapter->mlmepriv;
 	struct mlme_ext_priv	*pmlmeext = &(padapter->mlmeextpriv);
-	struct mlme_ext_info	*pmlmeinfo = &(pmlmeext->mlmext_info);
 
 	if (rtw_rfctl_is_tx_blocked_by_ch_waiting(adapter_to_rfctl(padapter)))
 		return;
@@ -10912,14 +10700,15 @@ unsigned int send_delba(_adapter *padapter, u8 initiator, u8 *addr)
 
 unsigned int send_beacon(_adapter *padapter)
 {
-	u8	bxmitok = _FALSE;
-	int	issue = 0;
-	int poll = 0;
-#if defined(CONFIG_PCI_HCI) && defined(RTL8814AE_SW_BCN)
-	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(padapter);
-#endif
+#if defined(CONFIG_PCI_HCI) && !defined(CONFIG_PCI_BCN_POLLING)
+	#ifdef CONFIG_FW_HANDLE_TXBCN
+	u8 vap_id = padapter->vap_id;
+
+	/* bypass TX BCN because vap_id is invalid*/
+	if (vap_id == CONFIG_LIMITED_AP_NUM)
+		return _SUCCESS;
+	#endif
 
-#ifdef CONFIG_PCI_HCI
 	/* bypass TX BCN queue because op ch is switching/waiting */
 	if (check_fwstate(&padapter->mlmepriv, WIFI_OP_CH_SWITCHING)
 		|| IS_CH_WAITING(adapter_to_rfctl(padapter))
@@ -10932,20 +10721,39 @@ unsigned int send_beacon(_adapter *padapter)
 
 	/* 8192EE Port select for Beacon DL */
 	rtw_hal_set_hwreg(padapter, HW_VAR_DL_BCN_SEL, NULL);
+	#ifdef CONFIG_FW_HANDLE_TXBCN
+	rtw_hal_set_hwreg(padapter, HW_VAR_BCN_HEAD_SEL, &vap_id);
+	#endif
 
 	issue_beacon(padapter, 0);
 
-#ifdef RTL8814AE_SW_BCN
-	if (pHalData->bCorrectBCN != 0)
+	#ifdef CONFIG_FW_HANDLE_TXBCN
+	vap_id = 0xFF;
+	rtw_hal_set_hwreg(padapter, HW_VAR_BCN_HEAD_SEL, &vap_id);
+	#endif
+
+	#ifdef RTL8814AE_SW_BCN
+	if (GET_HAL_DATA(padapter)->bCorrectBCN != 0)
 		RTW_INFO("%s, line%d, Warnning, pHalData->bCorrectBCN != 0\n", __func__, __LINE__);
-	pHalData->bCorrectBCN = 1;
-#endif
+	GET_HAL_DATA(padapter)->bCorrectBCN = 1;
+	#endif
 
 	return _SUCCESS;
 #endif
 
-#if defined(CONFIG_USB_HCI) || defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI)
+/* CONFIG_PCI_BCN_POLLING is for pci interface beacon polling mode */
+#if defined(CONFIG_USB_HCI) || defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI)|| defined(CONFIG_PCI_BCN_POLLING) 
+	u8 bxmitok = _FALSE;
+	int issue = 0;
+	int poll = 0;
 	systime start = rtw_get_current_time();
+	#ifdef CONFIG_FW_HANDLE_TXBCN
+	u8 vap_id = padapter->vap_id;
+
+	/* bypass TX BCN because vap_id is invalid*/
+	if (vap_id == CONFIG_LIMITED_AP_NUM)
+		return _SUCCESS;
+	#endif
 
 	/* bypass TX BCN queue because op ch is switching/waiting */
 	if (check_fwstate(&padapter->mlmepriv, WIFI_OP_CH_SWITCHING)
@@ -10953,27 +10761,44 @@ unsigned int send_beacon(_adapter *padapter)
 	)
 		return _SUCCESS;
 
-#if defined(CONFIG_USB_HCI)
-#if defined(CONFIG_RTL8812A)
+	#if defined(CONFIG_USB_HCI)
+	#if defined(CONFIG_RTL8812A)
 	if (IS_FULL_SPEED_USB(padapter)) {
 		issue_beacon(padapter, 300);
 		bxmitok = _TRUE;
 	} else
-#endif
-#endif
+	#endif
+	#endif
 	{
 		rtw_hal_set_hwreg(padapter, HW_VAR_BCN_VALID, NULL);
 		rtw_hal_set_hwreg(padapter, HW_VAR_DL_BCN_SEL, NULL);
+		#ifdef CONFIG_FW_HANDLE_TXBCN
+		rtw_hal_set_hwreg(padapter, HW_VAR_BCN_HEAD_SEL, &vap_id);
+		#endif
 		do {
+			#if defined(CONFIG_PCI_BCN_POLLING) 
+			issue_beacon(padapter, 0);
+			#else
 			issue_beacon(padapter, 100);
+			#endif
 			issue++;
 			do {
+				#if defined(CONFIG_PCI_BCN_POLLING) 
+				rtw_msleep_os(1);
+				#else
 				rtw_yield_os();
+				#endif
 				rtw_hal_get_hwreg(padapter, HW_VAR_BCN_VALID, (u8 *)(&bxmitok));
 				poll++;
 			} while ((poll % 10) != 0 && _FALSE == bxmitok && !RTW_CANNOT_RUN(padapter));
-
+			#if defined(CONFIG_PCI_BCN_POLLING) 
+			rtw_hal_unmap_beacon_icf(padapter);
+			#endif
 		} while (bxmitok == _FALSE && (issue < 100) && !RTW_CANNOT_RUN(padapter));
+		#ifdef CONFIG_FW_HANDLE_TXBCN
+		vap_id = 0xFF;
+		rtw_hal_set_hwreg(padapter, HW_VAR_BCN_HEAD_SEL, &vap_id);
+		#endif
 	}
 	if (RTW_CANNOT_RUN(padapter))
 		return _FAIL;
@@ -10993,12 +10818,13 @@ unsigned int send_beacon(_adapter *padapter)
 		else if (0)
 			RTW_INFO("%s success, issue:%d, poll:%d, %u ms\n", __FUNCTION__, issue, poll, rtw_get_passing_time_ms(start));
 
+		#ifdef CONFIG_FW_CORRECT_BCN
 		rtw_hal_fw_correct_bcn(padapter);
-
+		#endif
 		return _SUCCESS;
 	}
 
-#endif
+#endif /*defined(CONFIG_USB_HCI) || defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI)*/
 
 }
 
@@ -11029,7 +10855,7 @@ BOOLEAN IsLegal5GChannel(
 u8 collect_bss_info(_adapter *padapter, union recv_frame *precv_frame, WLAN_BSSID_EX *bssid)
 {
 	int	i;
-	u32	len;
+	sint len;
 	u8	*p;
 	u8	rf_path;
 	u16	val16, subtype;
@@ -11038,7 +10864,6 @@ u8 collect_bss_info(_adapter *padapter, union recv_frame *precv_frame, WLAN_BSSI
 	u8 ie_offset;
 	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(padapter);
 	struct registry_priv	*pregistrypriv = &padapter->registrypriv;
-	struct mlme_priv 	*pmlmepriv = &padapter->mlmepriv;
 	struct mlme_ext_priv	*pmlmeext = &padapter->mlmeextpriv;
 	struct mlme_ext_info	*pmlmeinfo = &(pmlmeext->mlmext_info);
 
@@ -11123,6 +10948,11 @@ u8 collect_bss_info(_adapter *padapter, union recv_frame *precv_frame, WLAN_BSSI
 			RTW_INFO("%s()-%d: IE too long (%d) for survey event\n", __FUNCTION__, __LINE__, len);
 			return _FAIL;
 		}
+		if (rtw_validate_value(_SUPPORTEDRATES_IE_, p+2, len) == _FALSE) {
+			rtw_absorb_ssid_ifneed(padapter, bssid, pframe);
+			RTW_DBG_DUMP("Invalidated Support Rate IE --", p, len+2);
+			return _FAIL;
+		}
 		_rtw_memcpy(bssid->SupportedRates, (p + 2), len);
 		i = len;
 	}
@@ -11133,6 +10963,11 @@ u8 collect_bss_info(_adapter *padapter, union recv_frame *precv_frame, WLAN_BSSI
 			RTW_INFO("%s()-%d: IE too long (%d) for survey event\n", __FUNCTION__, __LINE__, len);
 			return _FAIL;
 		}
+		if (rtw_validate_value(_EXT_SUPPORTEDRATES_IE_, p+2, len) == _FALSE) {
+			rtw_absorb_ssid_ifneed(padapter, bssid, pframe);
+			RTW_DBG_DUMP("Invalidated EXT Support Rate IE --", p, len+2);
+			return _FAIL;
+		}
 		_rtw_memcpy(bssid->SupportedRates + i, (p + 2), len);
 	}
 
@@ -11201,12 +11036,49 @@ u8 collect_bss_info(_adapter *padapter, union recv_frame *precv_frame, WLAN_BSSI
 
 	val16 = rtw_get_capability((WLAN_BSSID_EX *)bssid);
 
-	if (val16 & BIT(0)) {
+	if ((val16 & 0x03) == cap_ESS) {
 		bssid->InfrastructureMode = Ndis802_11Infrastructure;
 		_rtw_memcpy(bssid->MacAddress, get_addr2_ptr(pframe), ETH_ALEN);
-	} else {
+	} else if ((val16 & 0x03) == cap_IBSS){
 		bssid->InfrastructureMode = Ndis802_11IBSS;
 		_rtw_memcpy(bssid->MacAddress, GetAddr3Ptr(pframe), ETH_ALEN);
+	} else if ((val16 & 0x03) == 0x00){
+		u8 *mesh_id_ie, *mesh_conf_ie;
+		sint mesh_id_ie_len, mesh_conf_ie_len;
+
+		mesh_id_ie = rtw_get_ie(bssid->IEs + ie_offset, WLAN_EID_MESH_ID, &mesh_id_ie_len, bssid->IELength - ie_offset);
+		mesh_conf_ie = rtw_get_ie(bssid->IEs + ie_offset, WLAN_EID_MESH_CONFIG, &mesh_conf_ie_len, bssid->IELength - ie_offset);
+		if (mesh_id_ie || mesh_conf_ie) {
+			if (!mesh_id_ie) {
+				RTW_INFO("cannot find Mesh ID for survey event\n");
+				return _FAIL;
+			}
+			if (mesh_id_ie_len) {
+				if (mesh_id_ie_len > NDIS_802_11_LENGTH_SSID) {
+					RTW_INFO("Mesh ID too long (%d) for survey event\n", mesh_id_ie_len);
+					return _FAIL;
+				}
+				_rtw_memcpy(bssid->mesh_id.Ssid, (mesh_id_ie + 2), mesh_id_ie_len);
+				bssid->mesh_id.SsidLength = mesh_id_ie_len;
+			} else
+				bssid->mesh_id.SsidLength = 0;
+
+			if (!mesh_conf_ie) {
+				RTW_INFO("cannot find Mesh config for survey event\n");
+				return _FAIL;
+			}
+			if (mesh_conf_ie_len != 7) {
+				RTW_INFO("invalid Mesh conf IE len (%d) for survey event\n", mesh_conf_ie_len);
+				return _FAIL;
+			}
+
+			bssid->InfrastructureMode = Ndis802_11_mesh;
+			_rtw_memcpy(bssid->MacAddress, GetAddr3Ptr(pframe), ETH_ALEN);
+		} else {
+			/* default cases */
+			bssid->InfrastructureMode = Ndis802_11IBSS;
+			_rtw_memcpy(bssid->MacAddress, GetAddr3Ptr(pframe), ETH_ALEN);
+		}
 	}
 
 	if (val16 & BIT(4))
@@ -11306,15 +11178,15 @@ void start_create_ibss(_adapter *padapter)
 		/* issue beacon */
 		if (send_beacon(padapter) == _FAIL) {
 
-			report_join_res(padapter, -1);
+			report_join_res(padapter, -1, WLAN_STATUS_UNSPECIFIED_FAILURE);
 			pmlmeinfo->state = WIFI_FW_NULL_STATE;
 		} else {
 			rtw_hal_set_hwreg(padapter, HW_VAR_BSSID, padapter->registrypriv.dev_network.MacAddress);
+			rtw_hal_rcr_set_chk_bssid(padapter, MLME_ADHOC_STARTED);
 			join_type = 0;
 			rtw_hal_set_hwreg(padapter, HW_VAR_MLME_JOIN, (u8 *)(&join_type));
-			rtw_hal_rcr_set_chk_bssid(padapter, MLME_ADHOC_STARTED);
 
-			report_join_res(padapter, 1);
+			report_join_res(padapter, 1, WLAN_STATUS_SUCCESS);
 			pmlmeinfo->state |= WIFI_FW_ASSOC_SUCCESS;
 			rtw_indicate_connect(padapter);
 		}
@@ -11423,7 +11295,6 @@ void start_clnt_join(_adapter *padapter)
 		}
 	} else if (caps & cap_IBSS) { /* adhoc client */
 		Set_MSR(padapter, WIFI_FW_ADHOC_STATE);
-		rtw_hal_rcr_set_chk_bssid(padapter, MLME_ADHOC_STARTED);
 
 		val8 = 0xcf;
 		rtw_hal_set_hwreg(padapter, HW_VAR_SEC_CFG, (u8 *)(&val8));
@@ -11432,7 +11303,7 @@ void start_clnt_join(_adapter *padapter)
 
 		pmlmeinfo->state = WIFI_FW_ADHOC_STATE;
 
-		report_join_res(padapter, 1);
+		report_join_res(padapter, 1, WLAN_STATUS_SUCCESS);
 	} else {
 		/* RTW_INFO("marc: invalid cap:%x\n", caps); */
 		return;
@@ -11508,7 +11379,7 @@ unsigned int receive_disconnect(_adapter *padapter, unsigned char *MacAddr, unsi
 			if (report_del_sta_event(padapter, MacAddr, reason, _TRUE, locally_generated) != _FAIL)
 				pmlmeinfo->state = WIFI_FW_NULL_STATE;
 		} else if (pmlmeinfo->state & WIFI_FW_LINKING_STATE) {
-			if (report_join_res(padapter, -2) != _FAIL)
+			if (report_join_res(padapter, -2, reason) != _FAIL)
 				pmlmeinfo->state = WIFI_FW_NULL_STATE;
 		} else
 			RTW_INFO(FUNC_ADPT_FMT" - End to Disconnect\n", FUNC_ADPT_ARG(padapter));
@@ -11543,7 +11414,7 @@ static void process_80211d(PADAPTER padapter, WLAN_BSSID_EX *bssid)
 		u8 *ie, *p;
 		u32 len;
 		RT_CHANNEL_PLAN chplan_ap;
-		RT_CHANNEL_INFO chplan_sta[MAX_CHANNEL_NUM];
+		RT_CHANNEL_INFO *chplan_sta = NULL;
 		u8 country[4];
 		u8 fcn; /* first channel number */
 		u8 noc; /* number of channel */
@@ -11591,7 +11462,11 @@ static void process_80211d(PADAPTER padapter, WLAN_BSSID_EX *bssid)
 		_RTW_INFO("}\n");
 #endif
 
-		_rtw_memcpy(chplan_sta, rfctl->channel_set, sizeof(chplan_sta));
+		chplan_sta = rtw_malloc(sizeof(RT_CHANNEL_INFO) * MAX_CHANNEL_NUM);
+		if (!chplan_sta)
+			goto done_update_chplan_from_ap;
+
+		_rtw_memcpy(chplan_sta, rfctl->channel_set, sizeof(RT_CHANNEL_INFO) * MAX_CHANNEL_NUM);
 #ifdef CONFIG_RTW_DEBUG
 		i = 0;
 		RTW_INFO("%s: STA channel plan {", __FUNCTION__);
@@ -11763,26 +11638,10 @@ static void process_80211d(PADAPTER padapter, WLAN_BSSID_EX *bssid)
 			k++;
 		}
 #endif
-	}
-
-	/* If channel is used by AP, set channel scan type to active */
-	channel = bssid->Configuration.DSConfig;
-	chplan_new = rfctl->channel_set;
-	i = 0;
-	while (i < MAX_CHANNEL_NUM && chplan_new[i].ChannelNum != 0) {
-		if (chplan_new[i].ChannelNum == channel) {
-			if (chplan_new[i].ScanType == SCAN_PASSIVE) {
-				/* 5G Bnad 2, 3 (DFS) doesn't change to active scan */
-				if (rtw_is_dfs_ch(channel))
-					break;
 
-				chplan_new[i].ScanType = SCAN_ACTIVE;
-				RTW_INFO("%s: change channel %d scan type from passive to active\n",
-					 __FUNCTION__, channel);
-			}
-			break;
-		}
-		i++;
+done_update_chplan_from_ap:
+		if (chplan_sta)
+			rtw_mfree(chplan_sta, sizeof(RT_CHANNEL_INFO) * MAX_CHANNEL_NUM);
 	}
 }
 #endif
@@ -11851,15 +11710,21 @@ void report_survey_event(_adapter *padapter, union recv_frame *precv_frame)
 	process_80211d(padapter, &psurvey_evt->bss);
 #endif
 
-#ifdef CONFIG_DFS
 	ch_set_idx = rtw_chset_search_ch(chset, psurvey_evt->bss.Configuration.DSConfig);
 	if (ch_set_idx >= 0) {
-		if (psurvey_evt->bss.InfrastructureMode == Ndis802_11Infrastructure
-			&& (psurvey_evt->bss.Ssid.SsidLength == 0
-				|| is_all_null(psurvey_evt->bss.Ssid.Ssid, psurvey_evt->bss.Ssid.SsidLength) == _TRUE))
-			chset[ch_set_idx].hidden_bss_cnt++;
+		if (psurvey_evt->bss.InfrastructureMode == Ndis802_11Infrastructure) {
+			if (chset[ch_set_idx].ScanType == SCAN_PASSIVE
+				&& !rtw_is_dfs_ch(psurvey_evt->bss.Configuration.DSConfig)
+			) {
+				RTW_INFO("%s: change ch:%d to active\n", __func__, psurvey_evt->bss.Configuration.DSConfig);
+				chset[ch_set_idx].ScanType = SCAN_ACTIVE;
+			}
+			#ifdef CONFIG_DFS
+			if (hidden_ssid_ap(&psurvey_evt->bss))
+				chset[ch_set_idx].hidden_bss_cnt++;
+			#endif
+		}
 	}
-#endif
 
 	rtw_enqueue_cmd(pcmdpriv, pcmd_obj);
 
@@ -11915,7 +11780,7 @@ void report_surveydone_event(_adapter *padapter)
 
 }
 
-u32 report_join_res(_adapter *padapter, int res)
+u32 report_join_res(_adapter *padapter, int aid_res, u16 status)
 {
 	struct cmd_obj *pcmd_obj;
 	u8	*pevtcmd;
@@ -11954,12 +11819,12 @@ u32 report_join_res(_adapter *padapter, int res)
 
 	pjoinbss_evt = (struct joinbss_event *)(pevtcmd + sizeof(struct C2HEvent_Header));
 	_rtw_memcpy((unsigned char *)(&(pjoinbss_evt->network.network)), &(pmlmeinfo->network), sizeof(WLAN_BSSID_EX));
-	pjoinbss_evt->network.join_res	= pjoinbss_evt->network.aid = res;
+	pjoinbss_evt->network.join_res	= pjoinbss_evt->network.aid = aid_res;
 
-	RTW_INFO("report_join_res(%d)\n", res);
+	RTW_INFO("report_join_res(%d, %u)\n", aid_res, status);
 
 
-	rtw_joinbss_event_prehandle(padapter, (u8 *)&pjoinbss_evt->network);
+	rtw_joinbss_event_prehandle(padapter, (u8 *)&pjoinbss_evt->network, status);
 
 
 	ret = rtw_enqueue_cmd(pcmdpriv, pcmd_obj);
@@ -11976,7 +11841,6 @@ void report_wmm_edca_update(_adapter *padapter)
 	struct wmm_event		*pwmm_event;
 	struct C2HEvent_Header	*pc2h_evt_hdr;
 	struct mlme_ext_priv		*pmlmeext = &padapter->mlmeextpriv;
-	struct mlme_ext_info	*pmlmeinfo = &(pmlmeext->mlmext_info);
 	struct cmd_priv *pcmdpriv = &padapter->cmdpriv;
 
 	pcmd_obj = (struct cmd_obj *)rtw_zmalloc(sizeof(struct cmd_obj));
@@ -12313,7 +12177,6 @@ static void rtw_mlmeext_disconnect(_adapter *padapter)
 	struct mlme_priv		*pmlmepriv = &padapter->mlmepriv;
 	struct mlme_ext_priv	*pmlmeext = &padapter->mlmeextpriv;
 	struct mlme_ext_info	*pmlmeinfo = &(pmlmeext->mlmext_info);
-	WLAN_BSSID_EX		*pnetwork = (WLAN_BSSID_EX *)(&(pmlmeinfo->network));
 	u8 self_action = MLME_ACTION_UNKNOWN;
 	u8 state_backup = (pmlmeinfo->state & 0x03);
 	u8 ASIX_ID[] = {0x00, 0x0E, 0xC6};
@@ -12326,17 +12189,20 @@ static void rtw_mlmeext_disconnect(_adapter *padapter)
 		self_action = MLME_STA_DISCONNECTED;
 	else if (MLME_IS_ADHOC(padapter) || MLME_IS_ADHOC_MASTER(padapter))
 		self_action = MLME_ADHOC_STOPPED;
-	else if (MLME_IS_NULL(padapter))
-		self_action = MLME_ACTION_NONE;
 	else {
 		RTW_INFO("state:0x%x\n", MLME_STATE(padapter));
 		rtw_warn_on(1);
 	}
 
 	/* set_opmode_cmd(padapter, infra_client_with_mlme); */
-
+#ifdef CONFIG_HW_P0_TSF_SYNC
+	if (self_action == MLME_STA_DISCONNECTED)
+		correct_TSF(padapter, self_action);
+#endif
 	rtw_hal_set_hwreg(padapter, HW_VAR_MLME_DISCONNECT, 0);
 	rtw_hal_set_hwreg(padapter, HW_VAR_BSSID, null_addr);
+	if (self_action == MLME_STA_DISCONNECTED)
+		rtw_hal_rcr_set_chk_bssid(padapter, self_action);
 
 	/* set MSR to no link state->infra. mode */
 	Set_MSR(padapter, _HW_STATE_STATION_);
@@ -12369,19 +12235,23 @@ static void rtw_mlmeext_disconnect(_adapter *padapter)
 	/* switch to the 20M Hz mode after disconnect */
 	pmlmeext->cur_bwmode = CHANNEL_WIDTH_20;
 	pmlmeext->cur_ch_offset = HAL_PRIME_CHNL_OFFSET_DONT_CARE;
+#ifdef CONFIG_CTRL_TXSS_BY_TP
+	pmlmeext->txss_1ss = _FALSE;
+#endif
 
 #ifdef CONFIG_FCS_MODE
 	if (EN_FCS(padapter))
 		rtw_hal_set_hwreg(padapter, HW_VAR_STOP_FCS_MODE, NULL);
 #endif
 
-#ifdef CONFIG_DFS_MASTER
-	rtw_dfs_master_status_apply(padapter, self_action);
-#endif
-
-	{
+	if (!(MLME_IS_STA(padapter) && MLME_IS_OPCH_SW(padapter))) {
+		/* DFS and channel status no need to check here for STA under OPCH_SW */
 		u8 ch, bw, offset;
 
+		#ifdef CONFIG_DFS_MASTER
+		rtw_dfs_rd_en_decision(padapter, self_action, 0);
+		#endif
+
 		if (rtw_mi_get_ch_setting_union_no_self(padapter, &ch, &bw, &offset) != 0) {
 			set_channel_bwmode(padapter, ch, offset, bw);
 			rtw_mi_update_union_chan_inf(padapter, ch, offset, bw);
@@ -12414,29 +12284,39 @@ static void rtw_mlmeext_disconnect(_adapter *padapter)
 		pmlmepriv->qospriv.uapsd_ap_supported = 0;
 	}
 #endif /* CONFIG_WMMPS_STA */
+#ifdef CONFIG_RTS_FULL_BW
+	rtw_set_rts_bw(padapter);
+#endif/*CONFIG_RTS_FULL_BW*/
 
 }
 
 void mlmeext_joinbss_event_callback(_adapter *padapter, int join_res)
 {
-	struct sta_info		*psta, *psta_bmc;
+	struct sta_info		*psta;
 	struct mlme_ext_priv	*pmlmeext = &padapter->mlmeextpriv;
 	struct mlme_ext_info	*pmlmeinfo = &(pmlmeext->mlmext_info);
 	WLAN_BSSID_EX		*cur_network = &(pmlmeinfo->network);
 	struct sta_priv		*pstapriv = &padapter->stapriv;
 	u8	join_type;
-#ifdef CONFIG_ARP_KEEP_ALIVE
 	struct mlme_priv	*pmlmepriv = &padapter->mlmepriv;
-#endif
+
+#ifndef CONFIG_IOCTL_CFG80211
 	struct security_priv *psecuritypriv = &padapter->securitypriv;
+#endif
+
+	if (pmlmepriv->wpa_phase == _TRUE)
+		pmlmepriv->wpa_phase = _FALSE;
 
 	if (join_res < 0) {
 		join_type = 1;
 		rtw_hal_set_hwreg(padapter, HW_VAR_MLME_JOIN, (u8 *)(&join_type));
 		rtw_hal_set_hwreg(padapter, HW_VAR_BSSID, null_addr);
+		if ((pmlmeinfo->state & 0x03) == WIFI_FW_STATION_STATE)
+			rtw_hal_rcr_set_chk_bssid(padapter, MLME_STA_DISCONNECTED);
 
 		goto exit_mlmeext_joinbss_event_callback;
 	}
+
 #ifdef CONFIG_ARP_KEEP_ALIVE
 	pmlmepriv->bGetGateway = 1;
 	pmlmepriv->GetGatewayTryCnt = 0;
@@ -12454,6 +12334,10 @@ void mlmeext_joinbss_event_callback(_adapter *padapter, int join_res)
 	/* update IOT-releated issue */
 	update_IOT_info(padapter);
 
+	#ifdef CONFIG_RTS_FULL_BW
+	rtw_set_rts_bw(padapter);
+	#endif/*CONFIG_RTS_FULL_BW*/
+
 	rtw_hal_set_hwreg(padapter, HW_VAR_BASIC_RATE, cur_network->SupportedRates);
 
 	/* BCN interval */
@@ -12464,10 +12348,10 @@ void mlmeext_joinbss_event_callback(_adapter *padapter, int join_res)
 
 	/* WMM, Update EDCA param */
 	WMMOnAssocRsp(padapter);
-
+#ifdef CONFIG_80211N_HT
 	/* HT */
 	HTOnAssocRsp(padapter);
-
+#endif /* CONFIG_80211N_HT */
 #ifdef CONFIG_80211AC_VHT
 	/* VHT */
 	VHTOnAssocRsp(padapter);
@@ -12477,10 +12361,6 @@ void mlmeext_joinbss_event_callback(_adapter *padapter, int join_res)
 	if (psta) { /* only for infra. mode */
 		psta->wireless_mode = pmlmeext->cur_wireless_mode;
 
-#ifdef CONFIG_FW_MULTI_PORT_SUPPORT
-		rtw_hal_set_default_port_id_cmd(padapter, psta->cmn.mac_id);
-#endif
-
 		/* set per sta rate after updating HT cap. */
 		set_sta_rate(padapter, psta);
 
@@ -12503,8 +12383,10 @@ void mlmeext_joinbss_event_callback(_adapter *padapter, int join_res)
 	rtw_hal_set_hwreg(padapter, HW_VAR_MLME_JOIN, (u8 *)(&join_type));
 
 	if ((pmlmeinfo->state & 0x03) == WIFI_FW_STATION_STATE) {
+		rtw_hal_rcr_set_chk_bssid(padapter, MLME_STA_CONNECTED);
+
 		/* correcting TSF */
-		correct_TSF(padapter, pmlmeext);
+		correct_TSF(padapter, MLME_STA_CONNECTED);
 
 		/* set_link_timer(pmlmeext, DISCONNECT_TO); */
 	}
@@ -12547,7 +12429,7 @@ void mlmeext_sta_add_event_callback(_adapter *padapter, struct sta_info *psta)
 			/* update_TSF(pmlmeext, pframe, len);			 */
 
 			/* correcting TSF */
-			correct_TSF(padapter, pmlmeext);
+			correct_TSF(padapter, MLME_ADHOC_STARTED);
 
 			/* start beacon */
 			if (send_beacon(padapter) == _FAIL)
@@ -12575,12 +12457,8 @@ void mlmeext_sta_add_event_callback(_adapter *padapter, struct sta_info *psta)
 
 void mlmeext_sta_del_event_callback(_adapter *padapter)
 {
-	struct mlme_ext_priv	*pmlmeext = &padapter->mlmeextpriv;
-	struct mlme_ext_info	*pmlmeinfo = &(pmlmeext->mlmext_info);
-
 	if (is_client_associated_to_ap(padapter) || is_IBSS_empty(padapter))
 		rtw_mlmeext_disconnect(padapter);
-
 }
 
 /****************************************************************************
@@ -12642,10 +12520,10 @@ void rtw_delba_check(_adapter *padapter, struct sta_info *psta, u8 from_timer)
 u8 chk_ap_is_alive(_adapter *padapter, struct sta_info *psta)
 {
 	u8 ret = _FALSE;
+#ifdef DBG_EXPIRATION_CHK
 	struct mlme_ext_priv	*pmlmeext = &padapter->mlmeextpriv;
 	struct mlme_ext_info	*pmlmeinfo = &(pmlmeext->mlmext_info);
 
-#ifdef DBG_EXPIRATION_CHK
 	RTW_INFO(FUNC_ADPT_FMT" rx:"STA_PKTS_FMT", beacon:%llu, probersp_to_self:%llu"
 		/*", probersp_bm:%llu, probersp_uo:%llu, probereq:%llu, BI:%u"*/
 		 ", retry:%u\n"
@@ -12812,7 +12690,6 @@ void linked_status_chk(_adapter *padapter, u8 from_timer)
 {
 	u32	i;
 	struct sta_info		*psta;
-	struct xmit_priv		*pxmitpriv = &(padapter->xmitpriv);
 	struct mlme_ext_priv	*pmlmeext = &padapter->mlmeextpriv;
 	struct mlme_ext_info	*pmlmeinfo = &(pmlmeext->mlmext_info);
 	struct sta_priv		*pstapriv = &padapter->stapriv;
@@ -12838,12 +12715,14 @@ void linked_status_chk(_adapter *padapter, u8 from_timer)
 #elif defined(CONFIG_LAYER2_ROAMING)
 		if (rtw_chk_roam_flags(padapter, RTW_ROAM_ACTIVE)) {
 			RTW_INFO("signal_strength_data.avg_val = %d\n", precvpriv->signal_strength_data.avg_val);
-			if (precvpriv->signal_strength_data.avg_val < pmlmepriv->roam_rssi_threshold) {
+			if ((precvpriv->signal_strength_data.avg_val < pmlmepriv->roam_rssi_threshold)
+				&& (rtw_get_passing_time_ms(pmlmepriv->last_roaming) >= pmlmepriv->roam_scan_int*2000)) {
 #ifdef CONFIG_RTW_80211K
 				rtw_roam_nb_discover(padapter, _FALSE);
 #endif
 				pmlmepriv->need_to_roam = _TRUE;
 				rtw_drv_scan_by_self(padapter, RTW_AUTO_SCAN_REASON_ROAM);
+				pmlmepriv->last_roaming = rtw_get_current_time();
 			} else
 				pmlmepriv->need_to_roam = _FALSE;
 		}
@@ -12873,7 +12752,7 @@ void linked_status_chk(_adapter *padapter, u8 from_timer)
 				pmlmepriv->bGetGateway = 0;
 			else {
 				_rtw_memset(pmlmepriv->gw_ip, 0, 4);
-				_rtw_memset(pmlmepriv->gw_mac_addr, 0, 6);
+				_rtw_memset(pmlmepriv->gw_mac_addr, 0, ETH_ALEN);
 			}
 		}
 #endif
@@ -12920,8 +12799,8 @@ void linked_status_chk(_adapter *padapter, u8 from_timer)
 			if (sta_last_tx_pkts(psta) == sta_tx_pkts(psta))
 				tx_chk = _FAIL;
 
-#if defined(CONFIG_ACTIVE_KEEP_ALIVE_CHECK) && !defined(CONFIG_LPS_LCLK_WD_TIMER)
-			if (pmlmeext->active_keep_alive_check && (rx_chk == _FAIL || tx_chk == _FAIL)
+#ifdef CONFIG_ACTIVE_KEEP_ALIVE_CHECK
+			if (!from_timer && pmlmeext->active_keep_alive_check && (rx_chk == _FAIL || tx_chk == _FAIL)
 			) {
 				u8 backup_ch = 0, backup_bw = 0, backup_offset = 0;
 				u8 union_ch = 0, union_bw = 0, union_offset = 0;
@@ -12953,7 +12832,10 @@ void linked_status_chk(_adapter *padapter, u8 from_timer)
 					issue_probereq_ex(padapter, &pmlmeinfo->network.Ssid, psta->cmn.mac_addr, 0, 0, 3, 1);
 
 				if ((tx_chk != _SUCCESS && pmlmeinfo->link_count++ == link_count_limit) || rx_chk != _SUCCESS) {
-					tx_chk = issue_nulldata(padapter, psta->cmn.mac_addr, 0, 3, 1);
+					if (rtw_mi_check_fwstate(padapter, _FW_UNDER_SURVEY))
+						tx_chk = issue_nulldata(padapter, psta->cmn.mac_addr, 1, 3, 1);
+					else
+						tx_chk = issue_nulldata(padapter, psta->cmn.mac_addr, 0, 3, 1);
 					/* if tx acked and p2p disabled, set rx_chk _SUCCESS to reset retry count */
 					if (tx_chk == _SUCCESS && !is_p2p_enable)
 						rx_chk = _SUCCESS;
@@ -12988,7 +12870,7 @@ bypass_active_keep_alive:
 					#ifdef DBG_EXPIRATION_CHK
 					RTW_INFO("%s issue_nulldata(%d)\n", __FUNCTION__, from_timer ? 1 : 0);
 					#endif
-					if (from_timer)
+					if (from_timer || rtw_mi_check_fwstate(padapter, _FW_UNDER_SURVEY))
 						tx_chk = issue_nulldata(padapter, NULL, 1, 0, 0);
 					else
 						tx_chk = issue_nulldata(padapter, NULL, 0, 1, 1);
@@ -13069,9 +12951,6 @@ void survey_timer_hdl(void *ctx)
 	struct sitesurvey_parm *psurveyPara;
 	struct cmd_priv *pcmdpriv = &padapter->cmdpriv;
 	struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv;
-#ifdef CONFIG_P2P
-	struct wifidirect_info *pwdinfo = &(padapter->wdinfo);
-#endif
 
 	if (mlmeext_scan_state(pmlmeext) > SCAN_DISABLE) {
 		cmd = (struct cmd_obj *)rtw_zmalloc(sizeof(struct cmd_obj));
@@ -13127,21 +13006,25 @@ void link_timer_hdl(void *ctx)
 	if (pmlmeext->join_abort && pmlmeinfo->state != WIFI_FW_NULL_STATE) {
 		RTW_INFO(FUNC_ADPT_FMT" join abort\n", FUNC_ADPT_ARG(padapter));
 		pmlmeinfo->state = WIFI_FW_NULL_STATE;
-		report_join_res(padapter, -4);
+		report_join_res(padapter, -4, WLAN_STATUS_UNSPECIFIED_FAILURE);
 		goto exit;
 	}
 
 	if (pmlmeinfo->state & WIFI_FW_AUTH_NULL) {
 		RTW_INFO("link_timer_hdl:no beacon while connecting\n");
 		pmlmeinfo->state = WIFI_FW_NULL_STATE;
-		report_join_res(padapter, -3);
+		report_join_res(padapter, -3, WLAN_STATUS_UNSPECIFIED_FAILURE);
 	} else if (pmlmeinfo->state & WIFI_FW_AUTH_STATE) {
 		/* re-auth timer */
 		if (++pmlmeinfo->reauth_count > REAUTH_LIMIT) {
 			/* if (pmlmeinfo->auth_algo != dot11AuthAlgrthm_Auto) */
 			/* { */
 			pmlmeinfo->state = 0;
-			report_join_res(padapter, -1);
+			if (pmlmeinfo->auth_status) {
+				report_join_res(padapter, -1, pmlmeinfo->auth_status);
+				pmlmeinfo->auth_status = 0; /* reset */
+			} else
+				report_join_res(padapter, -1, WLAN_STATUS_UNSPECIFIED_FAILURE);
 			return;
 			/* } */
 			/* else */
@@ -13166,7 +13049,7 @@ void link_timer_hdl(void *ctx)
 					rtw_free_stainfo(padapter,  psta);
 			}
 #endif
-			report_join_res(padapter, -2);
+			report_join_res(padapter, -2, WLAN_STATUS_UNSPECIFIED_FAILURE);
 			return;
 		}
 
@@ -13317,12 +13200,13 @@ void rtw_ft_update_bcn(_adapter *padapter, union recv_frame *precv_frame)
 					RTW_INFO("%s: beacon keys ready\n", __func__);
 					_rtw_memcpy(&pmlmepriv->cur_beacon_keys,
 						&recv_beacon, sizeof(recv_beacon));
-					pmlmepriv->new_beacon_cnts = 0;
 				} else {
 					RTW_ERR("%s: get beacon keys failed\n", __func__);
 					_rtw_memset(&pmlmepriv->cur_beacon_keys, 0, sizeof(recv_beacon));
-					pmlmepriv->new_beacon_cnts = 0;
 				}
+				#ifdef CONFIG_BCN_CNT_CONFIRM_HDL
+				pmlmepriv->new_beacon_cnts = 0;
+				#endif
 			}
 			rtw_mfree((u8*)pbss, sizeof(WLAN_BSSID_EX));
 		}
@@ -13334,15 +13218,8 @@ void rtw_ft_update_bcn(_adapter *padapter, union recv_frame *precv_frame)
 
 		/* update TSF Value */
 		update_TSF(pmlmeext, pframe, len);
-
-		/* reset for adaptive_early_32k */
-		pmlmeext->adaptive_tsf_done = _FALSE;
-		pmlmeext->DrvBcnEarly = 0xff;
-		pmlmeext->DrvBcnTimeOut = 0xff;
 		pmlmeext->bcn_cnt = 0;
-		_rtw_memset(pmlmeext->bcn_delay_cnt, 0, sizeof(pmlmeext->bcn_delay_cnt));
-		_rtw_memset(pmlmeext->bcn_delay_ratio, 0, sizeof(pmlmeext->bcn_delay_ratio));
-
+		pmlmeext->last_bcn_cnt = 0;
 		pmlmepriv->ft_roam.ft_updated_bcn = _TRUE;
 	}
 }
@@ -13844,7 +13721,9 @@ u8 setopmode_hdl(_adapter *padapter, u8 *pbuf)
 	struct mlme_ext_info	*pmlmeinfo = &(pmlmeext->mlmext_info);
 	struct setopmode_parm *psetop = (struct setopmode_parm *)pbuf;
 
-	if (psetop->mode == Ndis802_11APMode) {
+	if (psetop->mode == Ndis802_11APMode
+		|| psetop->mode == Ndis802_11_mesh
+	) {
 		pmlmeinfo->state = WIFI_FW_AP_STATE;
 		type = _HW_STATE_AP_;
 	} else if (psetop->mode == Ndis802_11Infrastructure) {
@@ -13884,8 +13763,10 @@ u8 setopmode_hdl(_adapter *padapter, u8 *pbuf)
 	}
 
 #ifdef CONFIG_BT_COEXIST
-	if (psetop->mode == Ndis802_11APMode ||
-		psetop->mode == Ndis802_11Monitor) {
+	if (psetop->mode == Ndis802_11APMode
+		|| psetop->mode == Ndis802_11_mesh
+		|| psetop->mode == Ndis802_11Monitor
+	) {
 		/* Do this after port switch to */
 		/* prevent from downloading rsvd page to wrong port */
 		rtw_btcoex_MediaStatusNotify(padapter, 1); /* connect */
@@ -13907,7 +13788,9 @@ u8 createbss_hdl(_adapter *padapter, u8 *pbuf)
 	/* u8	initialgain; */
 
 #ifdef CONFIG_AP_MODE
-	if (pmlmeinfo->state == WIFI_FW_AP_STATE) {
+	if ((parm->req_ch == 0 && pmlmeinfo->state == WIFI_FW_AP_STATE)
+		|| parm->req_ch != 0
+	) {
 		start_bss_network(padapter, parm);
 		goto exit;
 	}
@@ -13961,7 +13844,6 @@ u8 join_cmd_hdl(_adapter *padapter, u8 *pbuf)
 {
 	u8	join_type;
 	PNDIS_802_11_VARIABLE_IEs	pIE;
-	struct registry_priv	*pregpriv = &padapter->registrypriv;
 	struct mlme_ext_priv	*pmlmeext = &padapter->mlmeextpriv;
 	struct mlme_ext_info	*pmlmeinfo = &(pmlmeext->mlmext_info);
 	WLAN_BSSID_EX		*pnetwork = (WLAN_BSSID_EX *)(&(pmlmeinfo->network));
@@ -13991,6 +13873,8 @@ u8 join_cmd_hdl(_adapter *padapter, u8 *pbuf)
 
 
 		rtw_hal_set_hwreg(padapter, HW_VAR_MLME_DISCONNECT, 0);
+		if (pmlmeinfo->state & WIFI_FW_STATION_STATE)
+			rtw_hal_rcr_set_chk_bssid(padapter, MLME_STA_DISCONNECTED);
 	}
 
 #ifdef CONFIG_ANTENNA_DIVERSITY
@@ -14013,7 +13897,10 @@ u8 join_cmd_hdl(_adapter *padapter, u8 *pbuf)
 	pmlmeinfo->bwmode_updated = _FALSE;
 	/* pmlmeinfo->assoc_AP_vendor = HT_IOT_PEER_MAX; */
 	pmlmeinfo->VHT_enable = 0;
-
+#ifdef ROKU_PRIVATE
+	pmlmeinfo->ht_vht_received = 0;
+	_rtw_memset(pmlmeinfo->SupportedRates_infra_ap, 0, NDIS_802_11_LENGTH_RATES_EX);
+#endif /* ROKU_PRIVATE */
 	_rtw_memcpy(pnetwork, pbuf, FIELD_OFFSET(WLAN_BSSID_EX, IELength));
 	pnetwork->IELength = ((WLAN_BSSID_EX *)pbuf)->IELength;
 
@@ -14021,7 +13908,7 @@ u8 join_cmd_hdl(_adapter *padapter, u8 *pbuf)
 		return H2C_PARAMETERS_ERROR;
 
 	if (pnetwork->IELength < 2) {
-		report_join_res(padapter, (-4));
+		report_join_res(padapter, (-4), WLAN_STATUS_UNSPECIFIED_FAILURE);
 		return H2C_SUCCESS;
 	}
 	_rtw_memcpy(pnetwork->IEs, ((WLAN_BSSID_EX *)pbuf)->IEs, pnetwork->IELength);
@@ -14067,7 +13954,7 @@ u8 join_cmd_hdl(_adapter *padapter, u8 *pbuf)
 	}
 
 	rtw_bss_get_chbw(pnetwork
-		, &pmlmeext->cur_channel, &pmlmeext->cur_bwmode, &pmlmeext->cur_ch_offset);
+		, &pmlmeext->cur_channel, &pmlmeext->cur_bwmode, &pmlmeext->cur_ch_offset, 1, 1);
 
 	rtw_adjust_chbw(padapter, pmlmeext->cur_channel, &pmlmeext->cur_bwmode, &pmlmeext->cur_ch_offset);
 
@@ -14102,7 +13989,7 @@ u8 join_cmd_hdl(_adapter *padapter, u8 *pbuf)
 
 	/* check channel, bandwidth, offset and switch */
 	if (rtw_chk_start_clnt_join(padapter, &u_ch, &u_bw, &u_offset) == _FAIL) {
-		report_join_res(padapter, (-4));
+		report_join_res(padapter, (-4), WLAN_STATUS_UNSPECIFIED_FAILURE);
 		return H2C_SUCCESS;
 	}
 
@@ -14114,10 +14001,14 @@ u8 join_cmd_hdl(_adapter *padapter, u8 *pbuf)
 	/*rtw_hal_set_odm_var(padapter, HAL_ODM_INITIAL_GAIN, &initialgain, _FALSE);*/
 
 	rtw_hal_set_hwreg(padapter, HW_VAR_BSSID, pmlmeinfo->network.MacAddress);
-	join_type = 0;
-	rtw_hal_set_hwreg(padapter, HW_VAR_MLME_JOIN, (u8 *)(&join_type));
 	if (MLME_IS_STA(padapter))
 		rtw_hal_rcr_set_chk_bssid(padapter, MLME_STA_CONNECTING);
+	else
+		rtw_hal_rcr_set_chk_bssid(padapter, MLME_ADHOC_STARTED);
+
+	join_type = 0;
+	rtw_hal_set_hwreg(padapter, HW_VAR_MLME_JOIN, (u8 *)(&join_type));
+
 	doiqk = _TRUE;
 	rtw_hal_set_hwreg(padapter , HW_VAR_DO_IQK , &doiqk);
 
@@ -14138,34 +14029,35 @@ u8 join_cmd_hdl(_adapter *padapter, u8 *pbuf)
 
 u8 disconnect_hdl(_adapter *padapter, unsigned char *pbuf)
 {
+#ifdef CONFIG_DFS
+	struct rf_ctl_t *rfctl = adapter_to_rfctl(padapter);
+#endif
 	struct disconnect_parm *param = (struct disconnect_parm *)pbuf;
 	struct mlme_ext_priv	*pmlmeext = &padapter->mlmeextpriv;
 	struct mlme_ext_info	*pmlmeinfo = &(pmlmeext->mlmext_info);
 	WLAN_BSSID_EX		*pnetwork = (WLAN_BSSID_EX *)(&(pmlmeinfo->network));
 	u8 val8;
 
-	if (is_client_associated_to_ap(padapter)) {
-#ifdef CONFIG_DFS
-		if (padapter->mlmepriv.handle_dfs == _FALSE)
-#endif /* CONFIG_DFS */
-#ifdef CONFIG_PLATFORM_ROCKCHIPS
-			/* To avoid connecting to AP fail during resume process, change retry count from 5 to 1 */
-			issue_deauth_ex(padapter, pnetwork->MacAddress, WLAN_REASON_DEAUTH_LEAVING, 1, 100);
-#else
-			issue_deauth_ex(padapter, pnetwork->MacAddress, WLAN_REASON_DEAUTH_LEAVING, param->deauth_timeout_ms / 100, 100);
-#endif /* CONFIG_PLATFORM_ROCKCHIPS */
+	if (is_client_associated_to_ap(padapter)
+		#ifdef CONFIG_DFS
+		&& !IS_RADAR_DETECTED(rfctl) && !rfctl->csa_ch
+		#endif
+	) {
+		#ifdef CONFIG_PLATFORM_ROCKCHIPS
+		/* To avoid connecting to AP fail during resume process, change retry count from 5 to 1 */
+		issue_deauth_ex(padapter, pnetwork->MacAddress, WLAN_REASON_DEAUTH_LEAVING, 1, 100);
+		#else
+		issue_deauth_ex(padapter, pnetwork->MacAddress, WLAN_REASON_DEAUTH_LEAVING, param->deauth_timeout_ms / 100, 100);
+		#endif /* CONFIG_PLATFORM_ROCKCHIPS */
 	}
 
-#ifdef CONFIG_DFS
-	if (padapter->mlmepriv.handle_dfs == _TRUE)
-		padapter->mlmepriv.handle_dfs = _FALSE;
-#endif /* CONFIG_DFS */
-
+#ifndef CONFIG_SUPPORT_MULTI_BCN
 	if (((pmlmeinfo->state & 0x03) == WIFI_FW_ADHOC_STATE) || ((pmlmeinfo->state & 0x03) == WIFI_FW_AP_STATE)) {
 		/* Stop BCN */
 		val8 = 0;
 		rtw_hal_set_hwreg(padapter, HW_VAR_BCN_FUNC, (u8 *)(&val8));
 	}
+#endif
 
 	rtw_mlmeext_disconnect(padapter);
 
@@ -14202,7 +14094,6 @@ const char *scan_state_str(u8 state)
 static bool scan_abort_hdl(_adapter *adapter)
 {
 	struct mlme_ext_priv *pmlmeext = &adapter->mlmeextpriv;
-	struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info);
 	struct ss_res *ss = &pmlmeext->sitesurvey_res;
 #ifdef CONFIG_P2P
 	struct wifidirect_info *pwdinfo = &adapter->wdinfo;
@@ -14336,6 +14227,35 @@ exit:
 	return ret_num;
 }
 
+#ifdef CONFIG_SCAN_BACKOP
+u8 rtw_scan_backop_decision(_adapter *adapter)
+{
+	struct mlme_ext_priv *mlmeext = &adapter->mlmeextpriv;
+	struct mi_state mstate;
+	u8 backop_flags = 0;
+
+	rtw_mi_status(adapter, &mstate);
+
+	if ((MSTATE_STA_LD_NUM(&mstate) && mlmeext_chk_scan_backop_flags_sta(mlmeext, SS_BACKOP_EN))
+		|| (MSTATE_STA_NUM(&mstate) && mlmeext_chk_scan_backop_flags_sta(mlmeext, SS_BACKOP_EN_NL)))
+		backop_flags |= mlmeext_scan_backop_flags_sta(mlmeext);
+
+#ifdef CONFIG_AP_MODE
+	if ((MSTATE_AP_LD_NUM(&mstate) && mlmeext_chk_scan_backop_flags_ap(mlmeext, SS_BACKOP_EN))
+		|| (MSTATE_AP_NUM(&mstate) && mlmeext_chk_scan_backop_flags_ap(mlmeext, SS_BACKOP_EN_NL)))
+		backop_flags |= mlmeext_scan_backop_flags_ap(mlmeext);
+#endif
+
+#ifdef CONFIG_RTW_MESH
+	if ((MSTATE_MESH_LD_NUM(&mstate) && mlmeext_chk_scan_backop_flags_mesh(mlmeext, SS_BACKOP_EN))
+		|| (MSTATE_MESH_NUM(&mstate) && mlmeext_chk_scan_backop_flags_mesh(mlmeext, SS_BACKOP_EN_NL)))
+		backop_flags |= mlmeext_scan_backop_flags_mesh(mlmeext);
+#endif
+
+	return backop_flags;
+}
+#endif
+
 #define SCANNING_TIMEOUT_EX	2000
 u32 rtw_scan_timeout_decision(_adapter *padapter)
 {
@@ -14343,7 +14263,6 @@ u32 rtw_scan_timeout_decision(_adapter *padapter)
 	u8 max_chan_num;
 	u16 scan_ms;
 	struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv;
-	struct mlme_ext_info *pmlmeinfo = &pmlmeext->mlmext_info;
 	struct ss_res *ss = &pmlmeext->sitesurvey_res;
 
 	if (is_supported_5g(padapter->registrypriv.wireless_mode)
@@ -14353,7 +14272,7 @@ u32 rtw_scan_timeout_decision(_adapter *padapter)
 		max_chan_num = MAX_CHANNEL_NUM_2G;/*single band*/
 
 	#ifdef CONFIG_SCAN_BACKOP
-	if (rtw_mi_buddy_check_mlmeinfo_state(padapter, WIFI_FW_AP_STATE))
+	if (rtw_scan_backop_decision(padapter))
 		back_op_times = (max_chan_num / ss->scan_cnt_max) * ss->backop_ms;
 	#endif
 
@@ -14378,7 +14297,6 @@ static int rtw_scan_ch_decision(_adapter *padapter, struct rtw_ieee80211_channel
 		u32 out_num, struct rtw_ieee80211_channel *in, u32 in_num)
 {
 	int i, j;
-	int scan_ch_num = 0;
 	int set_idx;
 	u8 chan;
 	struct rf_ctl_t *rfctl = adapter_to_rfctl(padapter);
@@ -14503,13 +14421,15 @@ static u8 sitesurvey_pick_ch_behavior(_adapter *padapter, u8 *ch, RT_SCAN_TYPE *
 	u8 scan_ch = 0;
 	RT_SCAN_TYPE scan_type = SCAN_PASSIVE;
 	struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv;
-	struct mlme_ext_info *pmlmeinfo = &pmlmeext->mlmext_info;
 	struct ss_res *ss = &pmlmeext->sitesurvey_res;
 	struct rf_ctl_t *rfctl = adapter_to_rfctl(padapter);
 	int ch_set_idx;
 #ifdef CONFIG_P2P
 	struct wifidirect_info *pwdinfo = &padapter->wdinfo;
 #endif
+#ifdef CONFIG_SCAN_BACKOP
+	u8 backop_flags = 0;
+#endif
 
 	/* handle scan abort request */
 	scan_abort_hdl(padapter);
@@ -14537,18 +14457,37 @@ static u8 sitesurvey_pick_ch_behavior(_adapter *padapter, u8 *ch, RT_SCAN_TYPE *
 	{
 		struct rtw_ieee80211_channel *ch;
 
+		#ifdef CONFIG_SCAN_BACKOP
+		backop_flags = rtw_scan_backop_decision(padapter);
+		#endif
+
 #ifdef CONFIG_DFS
-		if (ss->channel_idx != 0 && ss->dfs_ch_ssid_scan == 0
-			&& pmlmeext->sitesurvey_res.ssid_num
-			&& rtw_is_dfs_ch(ss->ch[ss->channel_idx - 1].hw_value)
-		) {
-			ch_set_idx = rtw_chset_search_ch(rfctl->channel_set, ss->ch[ss->channel_idx - 1].hw_value);
-			if (ch_set_idx != -1 && rfctl->channel_set[ch_set_idx].hidden_bss_cnt) {
-				ss->channel_idx--;
-				ss->dfs_ch_ssid_scan = 1;
-			}
-		} else
-			ss->dfs_ch_ssid_scan = 0;
+		#ifdef CONFIG_SCAN_BACKOP
+		if (!(backop_flags && ss->scan_cnt >= ss->scan_cnt_max))
+		#endif
+		{
+			#ifdef CONFIG_RTW_WIFI_HAL
+			if (adapter_to_dvobj(padapter)->nodfs) {
+				while ( ss->channel_idx < ss->ch_num && rtw_is_dfs_ch(ss->ch[ss->channel_idx].hw_value))
+					ss->channel_idx++;
+			} else
+			#endif
+			if (ss->channel_idx != 0 && ss->dfs_ch_ssid_scan == 0
+				&& pmlmeext->sitesurvey_res.ssid_num
+				&& rtw_is_dfs_ch(ss->ch[ss->channel_idx - 1].hw_value)
+			) {
+				ch_set_idx = rtw_chset_search_ch(rfctl->channel_set, ss->ch[ss->channel_idx - 1].hw_value);
+				if (ch_set_idx != -1 && rfctl->channel_set[ch_set_idx].hidden_bss_cnt
+					&& (!IS_DFS_SLAVE_WITH_RD(rfctl)
+						|| rtw_odm_dfs_domain_unknown(rfctl_to_dvobj(rfctl))
+						|| !CH_IS_NON_OCP(&rfctl->channel_set[ch_set_idx]))
+				) {
+					ss->channel_idx--;
+					ss->dfs_ch_ssid_scan = 1;
+				}
+			} else
+				ss->dfs_ch_ssid_scan = 0;
+		}
 #endif /* CONFIG_DFS */
 
 		if (ss->channel_idx < ss->ch_num) {
@@ -14566,31 +14505,18 @@ static u8 sitesurvey_pick_ch_behavior(_adapter *padapter, u8 *ch, RT_SCAN_TYPE *
 
 	if (scan_ch != 0) {
 		next_state = SCAN_PROCESS;
-#ifdef CONFIG_SCAN_BACKOP
-		{
-			struct mi_state mstate;
-			u8 backop_flags = 0;
-
-			rtw_mi_status(padapter, &mstate);
 
-			if ((MSTATE_STA_LD_NUM(&mstate) && mlmeext_chk_scan_backop_flags_sta(pmlmeext, SS_BACKOP_EN))
-				|| (MSTATE_STA_NUM(&mstate) && mlmeext_chk_scan_backop_flags_sta(pmlmeext, SS_BACKOP_EN_NL)))
-				backop_flags |= mlmeext_scan_backop_flags_sta(pmlmeext);
-
-			if ((MSTATE_AP_LD_NUM(&mstate) && mlmeext_chk_scan_backop_flags_ap(pmlmeext, SS_BACKOP_EN))
-				|| (MSTATE_AP_NUM(&mstate) && mlmeext_chk_scan_backop_flags_ap(pmlmeext, SS_BACKOP_EN_NL)))
-				backop_flags |= mlmeext_scan_backop_flags_ap(pmlmeext);
-
-			if (backop_flags) {
-				if (ss->scan_cnt < ss->scan_cnt_max)
-					ss->scan_cnt++;
-				else {
-					mlmeext_assign_scan_backop_flags(pmlmeext, backop_flags);
-					next_state = SCAN_BACKING_OP;
-				}
+		#ifdef CONFIG_SCAN_BACKOP
+		if (backop_flags) {
+			if (ss->scan_cnt < ss->scan_cnt_max)
+				ss->scan_cnt++;
+			else {
+				mlmeext_assign_scan_backop_flags(pmlmeext, backop_flags);
+				next_state = SCAN_BACKING_OP;
 			}
 		}
-#endif /* CONFIG_SCAN_BACKOP */
+		#endif
+
 	} else if (rtw_p2p_findphase_ex_is_needed(pwdinfo)) {
 		/* go p2p listen */
 		next_state = SCAN_TO_P2P_LISTEN;
@@ -14650,13 +14576,14 @@ static u8 sitesurvey_pick_ch_behavior(_adapter *padapter, u8 *ch, RT_SCAN_TYPE *
 void site_survey(_adapter *padapter, u8 survey_channel, RT_SCAN_TYPE ScanType)
 {
 	struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv;
-	struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info);
 	struct ss_res *ss = &pmlmeext->sitesurvey_res;
 	u8 ssid_scan = 0;
 
 #ifdef CONFIG_P2P
+#ifndef CONFIG_IOCTL_CFG80211
 	struct wifidirect_info *pwdinfo = &(padapter->wdinfo);
 #endif
+#endif
 
 	if (survey_channel != 0) {
 		set_channel_bwmode(padapter, survey_channel, HAL_PRIME_CHNL_OFFSET_DONT_CARE, CHANNEL_WIDTH_20);
@@ -14773,7 +14700,9 @@ void survey_done_set_ch_bw(_adapter *padapter)
 					FUNC_ADPT_ARG(padapter), cur_channel, cur_bwmode, cur_ch_offset);
 		}
 	}
+#ifdef CONFIG_MCC_MODE
 exit:
+#endif
 	set_channel_bwmode(padapter, cur_channel, cur_ch_offset, cur_bwmode);
 }
 
@@ -14812,6 +14741,11 @@ u8 rtw_ps_annc(_adapter *adapter, bool ps)
 				issue_nulldata(iface, NULL, ps, 3, 500);
 				ps_anc = 1;
 			}
+		#ifdef CONFIG_RTW_MESH
+		} else if (MLME_IS_MESH(iface)) {
+			if (rtw_mesh_ps_annc(iface, ps))
+				ps_anc = 1;
+		#endif
 		}
 	}
 	return ps_anc;
@@ -14889,6 +14823,7 @@ void sitesurvey_set_igi(_adapter *adapter)
 			igi = 0x28;
 		else
 		#endif /* CONFIG_P2P */
+
 		if (ss->igi)
 			igi = ss->igi;
 		else
@@ -14982,11 +14917,15 @@ void sitesurvey_set_offch_state(_adapter *adapter, u8 scan_state)
 u8 sitesurvey_cmd_hdl(_adapter *padapter, u8 *pbuf)
 {
 	struct sitesurvey_parm	*pparm = (struct sitesurvey_parm *)pbuf;
+#ifdef DBG_CHECK_FW_PS_STATE
 	struct dvobj_priv *dvobj = padapter->dvobj;
 	struct debug_priv *pdbgpriv = &dvobj->drv_dbg;
+#endif
 	struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv;
-	struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info);
 	struct ss_res *ss = &pmlmeext->sitesurvey_res;
+#ifdef CONFIG_RTW_CFGVENDOR_RANDOM_MAC_OUI
+		struct rtw_wdev_priv *pwdev_priv = adapter_wdev_data(padapter);
+#endif
 	u8 val8;
 
 #ifdef CONFIG_P2P
@@ -15021,6 +14960,21 @@ operation_by_state:
 		goto operation_by_state;
 
 	case SCAN_START:
+#ifdef CONFIG_RTW_CFGVENDOR_RANDOM_MAC_OUI
+		if ((pwdev_priv->pno_mac_addr[0] != 0xFF)
+			    && (check_fwstate(&padapter->mlmepriv, WIFI_STATION_STATE) == _TRUE)
+	    	    && (check_fwstate(&padapter->mlmepriv, _FW_LINKED) == _FALSE)) {
+			u16 seq_num;
+
+			rtw_hal_pno_random_gen_mac_addr(padapter);
+			rtw_hal_set_hw_mac_addr(padapter, pwdev_priv->pno_mac_addr);
+			get_random_bytes(&seq_num, 2);
+			pwdev_priv->pno_scan_seq_num = seq_num & 0xFFF;
+			RTW_INFO("%s pno_scan_seq_num %d\n", __func__,
+				 pwdev_priv->pno_scan_seq_num);
+		}
+#endif
+
 		/*
 		* prepare to leave operating channel
 		*/
@@ -15091,27 +15045,29 @@ operation_by_state:
 
 		/* still SCAN_PROCESS state */
 		#ifdef DBG_SITESURVEY
-#ifdef CONFIG_P2P
-			RTW_INFO(FUNC_ADPT_FMT" %s ch:%u (cnt:%u,idx:%d) at %dms, %c%c%c\n"
-				 , FUNC_ADPT_ARG(padapter)
-				 , mlmeext_scan_state_str(pmlmeext)
-				 , scan_ch
+			#ifdef CONFIG_P2P
+			RTW_INFO(FUNC_ADPT_FMT" %s ch:%u (cnt:%u,idx:%d) at %dms, %c%c%c%c\n"
+				, FUNC_ADPT_ARG(padapter)
+				, mlmeext_scan_state_str(pmlmeext)
+				, scan_ch
 				, pwdinfo->find_phase_state_exchange_cnt, ss->channel_idx
 				, rtw_get_passing_time_ms(padapter->mlmepriv.scan_start_time)
 				, scan_type ? 'A' : 'P', ss->scan_mode ? 'A' : 'P'
-				 , ss->ssid[0].SsidLength ? 'S' : ' '
-				);
-#else
-			RTW_INFO(FUNC_ADPT_FMT" %s ch:%u (idx:%d) at %dms, %c%c%c\n"
-				 , FUNC_ADPT_ARG(padapter)
-				 , mlmeext_scan_state_str(pmlmeext)
-				 , scan_ch
-				 , ss->channel_idx
+				, ss->ssid[0].SsidLength ? 'S' : ' '
+				, ss->dfs_ch_ssid_scan ? 'D' : ' '
+			);
+			#else
+			RTW_INFO(FUNC_ADPT_FMT" %s ch:%u (idx:%d) at %dms, %c%c%c%c\n"
+				, FUNC_ADPT_ARG(padapter)
+				, mlmeext_scan_state_str(pmlmeext)
+				, scan_ch
+				, ss->channel_idx
 				, rtw_get_passing_time_ms(padapter->mlmepriv.scan_start_time)
 				, scan_type ? 'A' : 'P', ss->scan_mode ? 'A' : 'P'
-				 , ss->ssid[0].SsidLength ? 'S' : ' '
-				);
-#endif /* CONFIG_P2P */
+				, ss->ssid[0].SsidLength ? 'S' : ' '
+				, ss->dfs_ch_ssid_scan ? 'D' : ' '
+			);
+			#endif /* CONFIG_P2P */
 		#endif /*DBG_SITESURVEY*/
 #ifdef DBG_FIXED_CHAN
 		if (pmlmeext->fixed_chan != 0xff)
@@ -15126,7 +15082,12 @@ operation_by_state:
 		else
 			scan_ms = 40;
 #else
-		scan_ms = ss->scan_ch_ms;
+		#if defined(CONFIG_RTW_ACS) && defined(CONFIG_RTW_ACS_DBG)
+		if (IS_ACS_ENABLE(padapter) && rtw_is_acs_st_valid(padapter))
+			scan_ms = rtw_acs_get_adv_st(padapter);
+		else
+		#endif /*CONFIG_RTW_ACS*/
+			scan_ms = ss->scan_ch_ms;
 #endif
 
 #if defined(CONFIG_ANTENNA_DIVERSITY) || defined(DBG_SCAN_SW_ANTDIV_BL)
@@ -15135,8 +15096,12 @@ operation_by_state:
 #endif
 
 #ifdef CONFIG_RTW_ACS
-		if (IS_ACS_ENABLE(padapter))
-			rtw_acs_trigger(padapter, scan_ms, scan_ch);
+		if (IS_ACS_ENABLE(padapter)) {
+			if (pparm->token)
+				rtw_acs_trigger(padapter, scan_ms, scan_ch, NHM_PID_IEEE_11K_HIGH);
+			else
+				rtw_acs_trigger(padapter, scan_ms, scan_ch, NHM_PID_ACS);
+		}
 #endif
 
 #ifdef CONFIG_BACKGROUND_NOISE_MONITOR
@@ -15284,6 +15249,9 @@ operation_by_state:
 #endif /* CONFIG_P2P */
 
 	case SCAN_COMPLETE:
+#ifdef CONFIG_RTW_CFGVENDOR_RANDOM_MAC_OUI
+		rtw_hal_set_hw_mac_addr(padapter, adapter_mac_addr(padapter));
+#endif
 #ifdef CONFIG_P2P
 		if (rtw_p2p_chk_state(pwdinfo, P2P_STATE_SCAN)
 		    || rtw_p2p_chk_state(pwdinfo, P2P_STATE_FIND_PHASE_SEARCH)
@@ -15398,7 +15366,7 @@ u8 setkey_hdl(_adapter *padapter, u8 *pbuf)
 		cam_id = rtw_iface_bcmc_id_get(padapter);
 	else
 #endif
-		cam_id = rtw_camid_alloc(padapter, NULL, pparm->keyid, &used);
+		cam_id = rtw_camid_alloc(padapter, NULL, pparm->keyid, 1, &used);
 
 	if (cam_id < 0)
 		goto enable_mc;
@@ -15484,6 +15452,7 @@ u8 setkey_hdl(_adapter *padapter, u8 *pbuf)
 	    _rtw_camctl_chk_cap(padapter, SEC_CAP_CHK_BMC)) {
 		struct set_stakey_parm	sta_pparm;
 
+		_rtw_memset(&sta_pparm, 0, sizeof(struct set_stakey_parm));
 		sta_pparm.algorithm = pparm->algorithm;
 		sta_pparm.keyid = pparm->keyid;
 		_rtw_memcpy(sta_pparm.key, pparm->key, 16);
@@ -15511,6 +15480,7 @@ void rtw_ap_wep_pk_setting(_adapter *adapter, struct sta_info *psta)
 		if ((psecuritypriv->key_mask & BIT(keyid)) && (keyid == psecuritypriv->dot11PrivacyKeyIndex)) {
 			sta_pparm.algorithm = psecuritypriv->dot11PrivacyAlgrthm;
 			sta_pparm.keyid = keyid;
+			sta_pparm.gk = 0;
 			_rtw_memcpy(sta_pparm.key, &(psecuritypriv->dot11DefKey[keyid].skey[0]), 16);
 			_rtw_memcpy(sta_pparm.addr, psta->cmn.mac_addr, ETH_ALEN);
 
@@ -15527,7 +15497,6 @@ u8 set_stakey_hdl(_adapter *padapter, u8 *pbuf)
 	u16 ctrl = 0;
 	s16 cam_id = 0;
 	bool used;
-	u8 kid = 0;
 	u8 ret = H2C_SUCCESS;
 	struct mlme_ext_priv	*pmlmeext = &padapter->mlmeextpriv;
 	struct mlme_ext_info	*pmlmeinfo = &(pmlmeext->mlmext_info);
@@ -15546,14 +15515,13 @@ u8 set_stakey_hdl(_adapter *padapter, u8 *pbuf)
 	}
 
 	pmlmeinfo->enc_algo = pparm->algorithm;
-	if (is_wep_enc(pparm->algorithm))
-		kid = pparm->keyid;
-	cam_id = rtw_camid_alloc(padapter, psta, kid, &used);
+
+	cam_id = rtw_camid_alloc(padapter, psta, pparm->keyid, pparm->gk, &used);
 	if (cam_id < 0)
 		goto exit;
 
-	/* cam entry searched is group key */
-	if (used == _TRUE && rtw_camid_is_gk(padapter, cam_id) == _TRUE) {
+	/* cam entry searched is group key when setting pariwise key */
+	if (!pparm->gk && used == _TRUE && rtw_camid_is_gk(padapter, cam_id) == _TRUE) {
 		s16 camid_clr;
 
 		RTW_PRINT(FUNC_ADPT_FMT" pairwise key with "MAC_FMT" id:%u the same key id as group key\n"
@@ -15579,9 +15547,12 @@ write_to_cam:
 			rtw_camid_free(padapter, cam_id);
 		}
 	} else {
-		RTW_PRINT("set pairwise key camid:%d, addr:"MAC_FMT", kid:%d, type:%s\n",
-			cam_id, MAC_ARG(pparm->addr), pparm->keyid, security_type_str(pparm->algorithm));
+		RTW_PRINT("set %s key camid:%d, addr:"MAC_FMT", kid:%d, type:%s\n"
+			, pparm->gk ? "group" : "pairwise"
+			, cam_id, MAC_ARG(pparm->addr), pparm->keyid, security_type_str(pparm->algorithm));
 		ctrl = BIT(15) | ((pparm->algorithm) << 2) | pparm->keyid;
+		if (pparm->gk)
+			ctrl |= BIT(6);
 		write_cam(padapter, cam_id, ctrl, pparm->addr, pparm->key);
 	}
 	ret = H2C_SUCCESS_RSP;
@@ -15628,10 +15599,10 @@ u8 add_ba_hdl(_adapter *padapter, unsigned char *pbuf)
 u8 add_ba_rsp_hdl(_adapter *padapter, unsigned char *pbuf)
 {
 	struct addBaRsp_parm *pparm = (struct addBaRsp_parm *)pbuf;
-	u8 ret = _TRUE, i = 0, try_cnt = 3, wait_ms = 50;
 	struct recv_reorder_ctrl *preorder_ctrl;
 	struct sta_priv *pstapriv = &padapter->stapriv;
 	struct sta_info *psta;
+	u8 ret = _TRUE;
 
 	psta = rtw_get_stainfo(pstapriv, pparm->addr);
 	if (!psta)
@@ -15873,7 +15844,7 @@ u8 chk_bmc_sleepq_hdl(_adapter *padapter, unsigned char *pbuf)
 
 u8 tx_beacon_hdl(_adapter *padapter, unsigned char *pbuf)
 {
-
+	/*RTW_INFO(FUNC_ADPT_FMT, FUNC_ADPT_ARG(padapter));*/
 #ifdef CONFIG_SWTIMER_BASED_TXBCN
 
 	tx_beacon_handlder(padapter->dvobj);
@@ -15901,8 +15872,6 @@ u8 tx_beacon_hdl(_adapter *padapter, unsigned char *pbuf)
 void change_band_update_ie(_adapter *padapter, WLAN_BSSID_EX *pnetwork, u8 ch)
 {
 	u8	network_type, rate_len, total_rate_len, remainder_rate_len;
-	struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv);
-	struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info);
 	struct mlme_priv *pmlmepriv = &(padapter->mlmepriv);
 	struct rf_ctl_t *rfctl = adapter_to_rfctl(padapter);
 	u8	erpinfo = 0x4;
@@ -15915,13 +15884,12 @@ void change_band_update_ie(_adapter *padapter, WLAN_BSSID_EX *pnetwork, u8 ch)
 		/* if channel in 5G band, then add vht ie . */
 		if ((pmlmepriv->htpriv.ht_option == _TRUE)
 			&& REGSTY_IS_11AC_ENABLE(&padapter->registrypriv)
-			&& hal_chk_proto_cap(padapter, PROTO_CAP_11AC)
+			&& is_supported_vht(padapter->registrypriv.wireless_mode)
 			&& (!rfctl->country_ent || COUNTRY_CHPLAN_EN_11AC(rfctl->country_ent))
 		) {
-			if (REGSTY_IS_11AC_AUTO(&padapter->registrypriv))
+			if (REGSTY_IS_11AC_AUTO(&padapter->registrypriv)
+				|| pmlmepriv->ori_vht_en)
 				rtw_vht_ies_attach(padapter, pnetwork);
-			/*else*/
-				/*TODO vht_enable == 1*/
 		}
 		#endif
 	} else {
@@ -15997,21 +15965,34 @@ void rtw_join_done_chk_ch(_adapter *adapter, int join_res)
 			if ((MLME_IS_AP(iface) || MLME_IS_MESH(iface))
 				&& check_fwstate(mlme, WIFI_ASOC_STATE)
 			) {
+				u8 ori_ch, ori_bw, ori_offset;
 				bool is_grouped = rtw_is_chbw_grouped(u_ch, u_bw, u_offset
 					, mlmeext->cur_channel, mlmeext->cur_bwmode, mlmeext->cur_ch_offset);
 
 				if (is_grouped == _FALSE) {
 					/* handle AP which need to switch ch setting */
 
+					ori_ch = mlmeext->cur_channel;
+					ori_bw = mlmeext->cur_bwmode;
+					ori_offset = mlmeext->cur_ch_offset;
+
 					/* restore original bw, adjust bw by registry setting on target ch */
 					mlmeext->cur_bwmode = mlme->ori_bw;
 					mlmeext->cur_channel = u_ch;
-					rtw_adjust_chbw(iface
-						, mlmeext->cur_channel, &mlmeext->cur_bwmode, &mlmeext->cur_ch_offset);
+					rtw_adjust_chbw(iface, mlmeext->cur_channel, &mlmeext->cur_bwmode, &mlmeext->cur_ch_offset);
+					#ifdef CONFIG_RTW_MESH
+					if (MLME_IS_MESH(iface))
+						rtw_mesh_adjust_chbw(mlmeext->cur_channel, &mlmeext->cur_bwmode, &mlmeext->cur_ch_offset);
+					#endif
 
-					rtw_sync_chbw(&mlmeext->cur_channel, &mlmeext->cur_bwmode, &mlmeext->cur_ch_offset
+					rtw_chset_sync_chbw(adapter_to_chset(adapter)
+						, &mlmeext->cur_channel, &mlmeext->cur_bwmode, &mlmeext->cur_ch_offset
 						, &u_ch, &u_bw, &u_offset);
 
+					RTW_INFO(FUNC_ADPT_FMT" %u,%u,%u => %u,%u,%u\n", FUNC_ADPT_ARG(iface)
+						, ori_ch, ori_bw, ori_offset
+						, mlmeext->cur_channel, mlmeext->cur_bwmode, mlmeext->cur_ch_offset);
+
 					rtw_ap_update_bss_chbw(iface, &(mlmeext->mlmext_info.network)
 						, mlmeext->cur_channel, mlmeext->cur_bwmode, mlmeext->cur_ch_offset);
 
@@ -16021,9 +16002,15 @@ void rtw_join_done_chk_ch(_adapter *adapter, int join_res)
 
 					if (MLME_IS_GO(iface) || MLME_IS_MESH(iface)) { /* pure AP is not needed*/
 						#if defined(CONFIG_IOCTL_CFG80211) && (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 5, 0))
+						u8 ht_option = 0;
+
+						#ifdef CONFIG_80211N_HT
+						ht_option = mlme->htpriv.ht_option;
+						#endif
+
 						rtw_cfg80211_ch_switch_notify(iface
 							, mlmeext->cur_channel, mlmeext->cur_bwmode, mlmeext->cur_ch_offset
-							, mlme->htpriv.ht_option);
+							, ht_option);
 						#endif
 					}
 				}
@@ -16034,7 +16021,7 @@ void rtw_join_done_chk_ch(_adapter *adapter, int join_res)
 		}
 
 #ifdef CONFIG_DFS_MASTER
-		rtw_dfs_master_status_apply(adapter, MLME_STA_CONNECTED);
+		rtw_dfs_rd_en_decision(adapter, MLME_STA_CONNECTED, 0);
 #endif
 	} else {
 		for (i = 0; i < dvobj->iface_nums; i++) {
@@ -16053,11 +16040,12 @@ void rtw_join_done_chk_ch(_adapter *adapter, int join_res)
 			}
 		}
 #ifdef CONFIG_DFS_MASTER
-		rtw_dfs_master_status_apply(adapter, MLME_STA_DISCONNECTED);
+		rtw_dfs_rd_en_decision(adapter, MLME_STA_DISCONNECTED, 0);
 #endif
 	}
 
 	if (rtw_mi_get_ch_setting_union(adapter, &u_ch, &u_bw, &u_offset)) {
+		RTW_INFO(FUNC_ADPT_FMT" union:%u,%u,%u\n", FUNC_ADPT_ARG(adapter), u_ch, u_bw, u_offset);
 		set_channel_bwmode(adapter, u_ch, u_offset, u_bw);
 		rtw_mi_update_union_chan_inf(adapter, u_ch, u_offset, u_bw);
 	}
@@ -16070,7 +16058,9 @@ void rtw_join_done_chk_ch(_adapter *adapter, int join_res)
 
 int rtw_chk_start_clnt_join(_adapter *adapter, u8 *ch, u8 *bw, u8 *offset)
 {
+#ifdef CONFIG_CONCURRENT_MODE
 	bool chbw_allow = _TRUE;
+#endif
 	bool connect_allow = _TRUE;
 	struct mlme_ext_priv	*pmlmeext = &adapter->mlmeextpriv;
 	u8 cur_ch, cur_bw, cur_ch_offset;
@@ -16107,7 +16097,7 @@ int rtw_chk_start_clnt_join(_adapter *adapter, u8 *ch, u8 *bw, u8 *offset)
 		dvobj = adapter_to_dvobj(adapter);
 
 		rtw_mi_status_no_self(adapter, &mstate);
-		RTW_INFO(FUNC_ADPT_FMT" ld_sta_num:%u, ap_num:%u, mesh_num:%u\n"
+		RTW_INFO(FUNC_ADPT_FMT" others ld_sta_num:%u, ap_num:%u, mesh_num:%u\n"
 			, FUNC_ADPT_ARG(adapter), MSTATE_STA_LD_NUM(&mstate)
 			, MSTATE_AP_NUM(&mstate), MSTATE_MESH_NUM(&mstate));
 
@@ -16120,7 +16110,7 @@ int rtw_chk_start_clnt_join(_adapter *adapter, u8 *ch, u8 *bw, u8 *offset)
 			dump_adapters_status(RTW_DBGDUMP , dvobj);
 			rtw_warn_on(1);
 		}
-		RTW_INFO(FUNC_ADPT_FMT" union no self: %u,%u,%u\n"
+		RTW_INFO(FUNC_ADPT_FMT" others union:%u,%u,%u\n"
 			 , FUNC_ADPT_ARG(adapter), u_ch, u_bw, u_offset);
 
 		/* chbw_allow? */
@@ -16163,7 +16153,7 @@ int rtw_chk_start_clnt_join(_adapter *adapter, u8 *ch, u8 *bw, u8 *offset)
 		}
 #endif /* CONFIG_CFG80211_ONECHANNEL_UNDER_CONCURRENT */
 
-		if (MSTATE_STA_LD_NUM(&mstate) + MSTATE_AP_LD_NUM(&mstate) + MSTATE_MESH_LD_NUM(&mstate) >= 2)
+		if (MSTATE_STA_LD_NUM(&mstate) + MSTATE_AP_LD_NUM(&mstate) + MSTATE_MESH_LD_NUM(&mstate) >= 4)
 			connect_allow = _FALSE;
 
 		RTW_INFO(FUNC_ADPT_FMT" connect_allow:%d\n"
@@ -16175,10 +16165,6 @@ int rtw_chk_start_clnt_join(_adapter *adapter, u8 *ch, u8 *bw, u8 *offset)
 connect_allow_hdl:
 		/* connect_allow == _TRUE */
 
-#ifdef CONFIG_DFS_MASTER
-		rtw_dfs_master_status_apply(adapter, MLME_STA_CONNECTING);
-#endif
-
 		if (chbw_allow == _FALSE) {
 			u_ch = cur_ch;
 			u_bw = cur_bw;
@@ -16210,10 +16196,14 @@ connect_allow_hdl:
 				) {
 					rtw_disassoc_cmd(iface, 500, RTW_CMDF_DIRECTLY);
 					rtw_indicate_disconnect(iface, 0, _FALSE);
-					rtw_free_assoc_resources(iface, 1);
+					rtw_free_assoc_resources(iface, _TRUE);
 				}
 			}
 		}
+
+		#ifdef CONFIG_DFS_MASTER
+		rtw_dfs_rd_en_decision(adapter, MLME_STA_CONNECTING, 0);
+		#endif
 	}
 #endif /* CONFIG_CONCURRENT_MODE */
 
@@ -16233,7 +16223,6 @@ exit:
 u8 rtw_set_chbw_hdl(_adapter *padapter, u8 *pbuf)
 {
 	struct set_ch_parm *set_ch_parm;
-	struct mlme_priv		*pmlmepriv = &padapter->mlmepriv;
 	struct mlme_ext_priv	*pmlmeext = &padapter->mlmeextpriv;
 
 	if (!pbuf)
@@ -16258,7 +16247,6 @@ u8 set_chplan_hdl(_adapter *padapter, unsigned char *pbuf)
 {
 	struct SetChannelPlan_param *setChannelPlan_param;
 	struct rf_ctl_t *rfctl = adapter_to_rfctl(padapter);
-	struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv;
 
 	if (!pbuf)
 		return H2C_PARAMETERS_ERROR;
@@ -16280,8 +16268,8 @@ u8 set_chplan_hdl(_adapter *padapter, unsigned char *pbuf)
 	rtw_hal_set_odm_var(padapter, HAL_ODM_REGULATION, NULL, _TRUE);
 
 #ifdef CONFIG_IOCTL_CFG80211
-	rtw_reg_notify_by_driver(padapter);
-#endif /* CONFIG_IOCTL_CFG80211 */
+	rtw_regd_apply_flags(adapter_to_wiphy(padapter));
+#endif
 
 	return	H2C_SUCCESS;
 }
@@ -16302,41 +16290,15 @@ u8 led_blink_hdl(_adapter *padapter, unsigned char *pbuf)
 	return	H2C_SUCCESS;
 }
 
-u8 set_csa_hdl(_adapter *padapter, unsigned char *pbuf)
+u8 set_csa_hdl(_adapter *adapter, unsigned char *pbuf)
 {
 #ifdef CONFIG_DFS
-	struct SetChannelSwitch_param *setChannelSwitch_param;
-	u8 new_ch_no;
-	u8 gval8 = 0x00, sval8 = 0xff;
-
-	if (!pbuf)
-		return H2C_PARAMETERS_ERROR;
-
-	setChannelSwitch_param = (struct SetChannelSwitch_param *)pbuf;
-	new_ch_no = setChannelSwitch_param->new_ch_no;
-
-	rtw_hal_get_hwreg(padapter, HW_VAR_TXPAUSE, &gval8);
-
-	rtw_hal_set_hwreg(padapter, HW_VAR_TXPAUSE, &sval8);
-
-	RTW_INFO("DFS detected! Swiching channel to %d!\n", new_ch_no);
-	set_channel_bwmode(padapter, new_ch_no, HAL_PRIME_CHNL_OFFSET_DONT_CARE, CHANNEL_WIDTH_20);
-
-	rtw_hal_set_hwreg(padapter, HW_VAR_TXPAUSE, &gval8);
-
-	rtw_disassoc_cmd(padapter, 0, RTW_CMDF_DIRECTLY);
-	rtw_indicate_disconnect(padapter, 0, _FALSE);
-	rtw_free_assoc_resources(padapter, 1);
-	rtw_free_network_queue(padapter, _TRUE);
-
-	if (rtw_is_dfs_ch(new_ch_no))
-		RTW_INFO("Switched to DFS band (ch %u) again!!\n", new_ch_no);
+	struct rf_ctl_t *rfctl = adapter_to_rfctl(adapter);
 
+	if (rfctl->csa_ch)
+		rtw_dfs_ch_switch_hdl(adapter_to_dvobj(adapter));
+#endif
 	return	H2C_SUCCESS;
-#else
-	return	H2C_REJECTED;
-#endif /* CONFIG_DFS */
-
 }
 
 u8 tdls_hdl(_adapter *padapter, unsigned char *pbuf)
diff --git a/rtl8723DS/core/rtw_mp.c b/rtl8723DS/core/rtw_mp.c
index 0700470..5cf9f25 100755..100644
--- a/rtl8723DS/core/rtw_mp.c
+++ b/rtl8723DS/core/rtw_mp.c
@@ -147,6 +147,7 @@ static void _init_mp_priv_(struct mp_priv *pmp_priv)
 	pmp_priv->bloopback = _FALSE;
 
 	pmp_priv->bloadefusemap = _FALSE;
+	pmp_priv->brx_filter_beacon = _FALSE;
 
 	pnetwork = &pmp_priv->mp_network.network;
 	_rtw_memcpy(pnetwork->MacAddress, pmp_priv->network_macaddr, ETH_ALEN);
@@ -222,6 +223,7 @@ static int init_mp_priv_by_os(struct mp_priv *pmp_priv)
 #endif
 
 #ifdef PLATFORM_LINUX
+#if 0
 static int init_mp_priv_by_os(struct mp_priv *pmp_priv)
 {
 	int i, res;
@@ -263,6 +265,7 @@ _exit_init_mp_priv:
 	return res;
 }
 #endif
+#endif
 
 static void mp_init_xmit_attrib(struct mp_tx *pmptx, PADAPTER padapter)
 {
@@ -298,6 +301,11 @@ static void mp_init_xmit_attrib(struct mp_tx *pmptx, PADAPTER padapter)
 
 	pattrib->pktlen = 1500;
 
+	if (pHalData->rf_type == RF_2T2R)
+		pattrib->raid = RATEID_IDX_BGN_40M_2SS;
+	else
+		pattrib->raid = RATEID_IDX_BGN_40M_1SS;
+
 #ifdef CONFIG_80211AC_VHT
 	if (pHalData->rf_type == RF_1T1R)
 		pattrib->raid = RATEID_IDX_VHT_1SS;
@@ -363,7 +371,7 @@ void free_mp_priv(struct mp_priv *pmp_priv)
 	pmp_priv->pmp_xmtframe_buf = NULL;
 }
 
-
+#if 0
 static VOID PHY_IQCalibrate_default(
 	IN	PADAPTER	pAdapter,
 	IN	BOOLEAN	bReCovery
@@ -386,7 +394,7 @@ static VOID PHY_SetRFPathSwitch_default(
 {
 	RTW_INFO("%s\n", __func__);
 }
-
+#endif
 
 void mpt_InitHWConfig(PADAPTER Adapter)
 {
@@ -453,8 +461,8 @@ void mpt_InitHWConfig(PADAPTER Adapter)
 	else if (IS_HARDWARE_TYPE_8821C(Adapter))
 		PlatformEFIOWrite2Byte(Adapter, REG_RXFLTMAP1_8821C, 0x2000);
 #endif /* CONFIG_RTL8821C */
-#ifdef CONFIG_RTL8188F
-	else if (IS_HARDWARE_TYPE_8188F(Adapter)) {
+#if defined(CONFIG_RTL8188F) || defined(CONFIG_RTL8188GTV)
+	else if (IS_HARDWARE_TYPE_8188F(Adapter) || IS_HARDWARE_TYPE_8188GTV(Adapter)) {
 		if (IS_A_CUT(hal->version_id) || IS_B_CUT(hal->version_id)) {
 			RTW_INFO("%s() Active large power detection\n", __func__);
 			phy_active_large_power_detection_8188f(&(GET_HAL_DATA(Adapter)->odmpriv));
@@ -505,6 +513,10 @@ static u8 PHY_QueryRFPathSwitch(PADAPTER padapter)
 #ifdef CONFIG_RTL8188F
 		bmain = PHY_QueryRFPathSwitch_8188F(padapter);
 #endif
+	} else if (IS_HARDWARE_TYPE_8188GTV(padapter)) {
+#ifdef CONFIG_RTL8188GTV
+		bmain = PHY_QueryRFPathSwitch_8188GTV(padapter);
+#endif
 	} else if (IS_HARDWARE_TYPE_8822B(padapter)) {
 #ifdef CONFIG_RTL8822B
 		bmain = PHY_QueryRFPathSwitch_8822B(padapter);
@@ -527,62 +539,68 @@ static u8 PHY_QueryRFPathSwitch(PADAPTER padapter)
 
 static void  PHY_SetRFPathSwitch(PADAPTER padapter , BOOLEAN bMain) {
 
+	PHAL_DATA_TYPE hal = GET_HAL_DATA(padapter);
+	struct dm_struct *phydm = &hal->odmpriv;
+
 	if (IS_HARDWARE_TYPE_8723B(padapter)) {
 #ifdef CONFIG_RTL8723B
-		phy_set_rf_path_switch_8723b(padapter, bMain);
+		phy_set_rf_path_switch_8723b(phydm, bMain);
 #endif
 	} else if (IS_HARDWARE_TYPE_8188E(padapter)) {
 #ifdef CONFIG_RTL8188E
-		phy_set_rf_path_switch_8188e(padapter, bMain);
+		phy_set_rf_path_switch_8188e(phydm, bMain);
 #endif
-	} else if (IS_HARDWARE_TYPE_8814A(padapter)) {	
+	} else if (IS_HARDWARE_TYPE_8814A(padapter)) {
 #ifdef CONFIG_RTL8814A
-		phy_set_rf_path_switch_8814a(padapter, bMain);
+		phy_set_rf_path_switch_8814a(phydm, bMain);
 #endif
 	} else if (IS_HARDWARE_TYPE_8812(padapter) || IS_HARDWARE_TYPE_8821(padapter)) {
 #if defined(CONFIG_RTL8812A) || defined(CONFIG_RTL8821A)
-		phy_set_rf_path_switch_8812a(padapter, bMain);
+		phy_set_rf_path_switch_8812a(phydm, bMain);
 #endif
 	} else if (IS_HARDWARE_TYPE_8192E(padapter)) {
 #ifdef CONFIG_RTL8192E
-		phy_set_rf_path_switch_8192e(padapter, bMain);
+		phy_set_rf_path_switch_8192e(phydm, bMain);
 #endif
 	} else if (IS_HARDWARE_TYPE_8703B(padapter)) {
 #ifdef CONFIG_RTL8703B
-		phy_set_rf_path_switch_8703b(padapter, bMain);
+		phy_set_rf_path_switch_8703b(phydm, bMain);
 #endif
-	} else if (IS_HARDWARE_TYPE_8188F(padapter)) {
-#ifdef CONFIG_RTL8188F
-		phy_set_rf_path_switch_8188f(padapter, bMain);
+	} else if (IS_HARDWARE_TYPE_8188F(padapter) || IS_HARDWARE_TYPE_8188GTV(padapter)) {
+#if defined(CONFIG_RTL8188F) || defined(CONFIG_RTL8188GTV)
+		phy_set_rf_path_switch_8188f(phydm, bMain);
+#endif
+	} else if (IS_HARDWARE_TYPE_8192F(padapter)) {
+#ifdef CONFIG_RTL8192F
+		phy_set_rf_path_switch_8192f(padapter, bMain);
 #endif
 	} else if (IS_HARDWARE_TYPE_8822B(padapter)) {
 #ifdef CONFIG_RTL8822B
-		phy_set_rf_path_switch_8822b(padapter, bMain);
+		phy_set_rf_path_switch_8822b(phydm, bMain);
 #endif
 	} else if (IS_HARDWARE_TYPE_8723D(padapter)) {
 #ifdef CONFIG_RTL8723D
-		phy_set_rf_path_switch_8723d(padapter, bMain);
+		phy_set_rf_path_switch_8723d(phydm, bMain);
 #endif
 	} else if (IS_HARDWARE_TYPE_8821C(padapter)) {
 #ifdef CONFIG_RTL8821C
-		phy_set_rf_path_switch_8821c(padapter, bMain);
+		phy_set_rf_path_switch_8821c(phydm, bMain);
 #endif
 	}
 }
 
 
 static void phy_switch_rf_path_set(PADAPTER padapter , u8 *prf_set_State) {
-
+#ifdef CONFIG_RTL8821C
 	HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter);
-	struct PHY_DM_STRUCT		*p_dm = &pHalData->odmpriv;
+	struct dm_struct *p_dm = &pHalData->odmpriv;
 
-#ifdef CONFIG_RTL8821C
 	if (IS_HARDWARE_TYPE_8821C(padapter)) {
 		config_phydm_set_ant_path(p_dm, *prf_set_State, p_dm->current_ant_num_8821c);
 		/* Do IQK when switching to BTG/WLG, requested by RF Binson */
-		if (prf_set_State == SWITCH_TO_BTG || prf_set_State == SWITCH_TO_WLG)
-			PHY_IQCalibrate(prf_set_State, FALSE);
-	}		
+		if (*prf_set_State == SWITCH_TO_BTG || *prf_set_State == SWITCH_TO_WLG)
+			PHY_IQCalibrate(padapter, FALSE);
+	}
 #endif
 
 }
@@ -616,7 +634,6 @@ MPT_InitializeAdapter(
 	s32		rtStatus = _SUCCESS;
 	PMPT_CONTEXT	pMptCtx = &pAdapter->mppriv.mpt_ctx;
 	u32		ledsetting;
-	struct mlme_priv *pmlmepriv = &pAdapter->mlmepriv;
 
 	pMptCtx->bMptDrvUnload = _FALSE;
 	pMptCtx->bMassProdTest = _FALSE;
@@ -640,11 +657,12 @@ MPT_InitializeAdapter(
 		/* <20130522, Kordan> Turn off equalizer to improve Rx sensitivity. (Asked by EEChou)*/
 		phy_set_bb_reg(pAdapter, 0xA00, BIT8, 0x0);
 		PHY_SetRFPathSwitch(pAdapter, 1/*pHalData->bDefaultAntenna*/); /*default use Main*/
-		/*<20130522, Kordan> 0x51 and 0x71 should be set immediately after path switched, or they might be overwritten. */
-		if ((pHalData->PackageType == PACKAGE_TFBGA79) || (pHalData->PackageType == PACKAGE_TFBGA90))
-			phy_set_rf_reg(pAdapter, RF_PATH_A, 0x51, bRFRegOffsetMask, 0x6B10E);
-		else
+
+		if (pHalData->PackageType == PACKAGE_DEFAULT)
 			phy_set_rf_reg(pAdapter, RF_PATH_A, 0x51, bRFRegOffsetMask, 0x6B04E);
+		else
+			phy_set_rf_reg(pAdapter, RF_PATH_A, 0x51, bRFRegOffsetMask, 0x6F10E);
+
 	}
 	/*set ant to wifi side in mp mode*/
 	rtw_write16(pAdapter, 0x870, 0x300);
@@ -779,7 +797,7 @@ static void init_mp_data(PADAPTER padapter)
 {
 	u8 v8;
 	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(padapter);
-	struct PHY_DM_STRUCT		*pDM_Odm = &pHalData->odmpriv;
+	struct dm_struct		*pDM_Odm = &pHalData->odmpriv;
 
 	/*disable BCN*/
 	v8 = rtw_read8(padapter, REG_BCN_CTRL);
@@ -792,7 +810,7 @@ static void init_mp_data(PADAPTER padapter)
 void MPT_PwrCtlDM(PADAPTER padapter, u32 bstart)
 {
 	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(padapter);
-	struct PHY_DM_STRUCT		*pDM_Odm = &pHalData->odmpriv;
+	struct dm_struct		*pDM_Odm = &pHalData->odmpriv;
 	u32	rf_ability;
 
 	if (bstart == 1) {
@@ -811,9 +829,9 @@ void MPT_PwrCtlDM(PADAPTER padapter, u32 bstart)
 		pDM_Odm->rf_calibrate_info.txpowertrack_control = _FALSE;
 		padapter->mppriv.mp_dm = 0;
 		{
-			struct _TXPWRTRACK_CFG	c;
+			struct txpwrtrack_cfg c;
 			u1Byte	chnl = 0 ;
-			_rtw_memset(&c, 0, sizeof(struct _TXPWRTRACK_CFG));
+			_rtw_memset(&c, 0, sizeof(struct txpwrtrack_cfg));
 			configure_txpower_track(pDM_Odm, &c);
 			odm_clear_txpowertracking_state(pDM_Odm);
 			if (*c.odm_tx_pwr_track_set_pwr) {
@@ -822,6 +840,9 @@ void MPT_PwrCtlDM(PADAPTER padapter, u32 bstart)
 				else if (pDM_Odm->support_ic_type == ODM_RTL8723D) {
 					(*c.odm_tx_pwr_track_set_pwr)(pDM_Odm, BBSWING, RF_PATH_A, chnl);
 					SetTxPower(padapter);
+				} else if (pDM_Odm->support_ic_type == ODM_RTL8192F) {
+					(*c.odm_tx_pwr_track_set_pwr)(pDM_Odm, MIX_MODE, RF_PATH_A, chnl);
+					(*c.odm_tx_pwr_track_set_pwr)(pDM_Odm, MIX_MODE, RF_PATH_B, chnl);
 				} else {
 					(*c.odm_tx_pwr_track_set_pwr)(pDM_Odm, BBSWING, RF_PATH_A, chnl);
 					(*c.odm_tx_pwr_track_set_pwr)(pDM_Odm, BBSWING, RF_PATH_B, chnl);
@@ -838,7 +859,6 @@ u32 mp_join(PADAPTER padapter, u8 mode)
 	WLAN_BSSID_EX bssid;
 	struct sta_info *psta;
 	u32 length;
-	u8 val8, join_type;
 	_irqL irqL;
 	s32 res = _SUCCESS;
 
@@ -849,9 +869,6 @@ u32 mp_join(PADAPTER padapter, u8 mode)
 	struct mlme_ext_info	*pmlmeinfo = &(pmlmeext->mlmext_info);
 	WLAN_BSSID_EX		*pnetwork = (WLAN_BSSID_EX *)(&(pmlmeinfo->network));
 
-#ifdef CONFIG_IOCTL_CFG80211
-	struct wireless_dev *pwdev = padapter->rtw_wdev;
-#endif /* #ifdef CONFIG_IOCTL_CFG80211 */
 	/* 1. initialize a new WLAN_BSSID_EX */
 	_rtw_memset(&bssid, 0, sizeof(WLAN_BSSID_EX));
 	RTW_INFO("%s ,pmppriv->network_macaddr=%x %x %x %x %x %x\n", __func__,
@@ -890,7 +907,7 @@ u32 mp_join(PADAPTER padapter, u8 mode)
 	if (check_fwstate(pmlmepriv, _FW_LINKED) == _TRUE) {
 		rtw_disassoc_cmd(padapter, 500, 0);
 		rtw_indicate_disconnect(padapter, 0, _FALSE);
-		rtw_free_assoc_resources(padapter, 1);
+		rtw_free_assoc_resources_cmd(padapter, _TRUE, 0);
 	}
 	pmppriv->prev_fw_state = get_fwstate(pmlmepriv);
 	/*pmlmepriv->fw_state = WIFI_MP_STATE;*/
@@ -938,13 +955,8 @@ end_of_mp_start_test:
 			/* set msr to WIFI_FW_ADHOC_STATE */
 			pmlmeinfo->state = WIFI_FW_ADHOC_STATE;
 			Set_MSR(padapter, (pmlmeinfo->state & 0x3));
-
 			rtw_hal_set_hwreg(padapter, HW_VAR_BSSID, padapter->registrypriv.dev_network.MacAddress);
-			join_type = 0;
-			rtw_hal_set_hwreg(padapter, HW_VAR_MLME_JOIN, (u8 *)(&join_type));
 			rtw_hal_rcr_set_chk_bssid(padapter, MLME_ADHOC_STARTED);
-
-			report_join_res(padapter, 1);
 			pmlmeinfo->state |= WIFI_FW_ASSOC_SUCCESS;
 		} else {
 			Set_MSR(padapter, WIFI_FW_STATION_STATE);
@@ -963,6 +975,9 @@ end_of_mp_start_test:
 s32 mp_start_test(PADAPTER padapter)
 {
 	struct mp_priv *pmppriv = &padapter->mppriv;
+#ifdef CONFIG_PCI_HCI
+	PHAL_DATA_TYPE hal;
+#endif
 	s32 res = _SUCCESS;
 
 	padapter->registrypriv.mp_mode = 1;
@@ -986,6 +1001,9 @@ s32 mp_start_test(PADAPTER padapter)
 #ifdef CONFIG_RTL8188F
 	rtl8188f_InitHalDm(padapter);
 #endif
+#ifdef CONFIG_RTL8188GTV
+	rtl8188gtv_InitHalDm(padapter);
+#endif
 #ifdef CONFIG_RTL8188E
 	rtl8188e_InitHalDm(padapter);
 #endif
@@ -993,6 +1011,13 @@ s32 mp_start_test(PADAPTER padapter)
 	rtl8723d_InitHalDm(padapter);
 #endif /* CONFIG_RTL8723D */
 
+#ifdef CONFIG_PCI_HCI
+	hal = GET_HAL_DATA(padapter);
+	hal->pci_backdoor_ctrl = 0;
+	rtw_pci_aspm_config(padapter);
+#endif
+
+
 	/* 3 0. update mp_priv */
 
 	if (!RF_TYPE_VALID(padapter->registrypriv.rf_config)) {
@@ -1032,6 +1057,10 @@ void mp_stop_test(PADAPTER padapter)
 	struct mlme_priv *pmlmepriv = &padapter->mlmepriv;
 	struct wlan_network *tgt_network = &pmlmepriv->cur_network;
 	struct sta_info *psta;
+#ifdef CONFIG_PCI_HCI
+	struct registry_priv  *registry_par = &padapter->registrypriv;
+	PHAL_DATA_TYPE hal;
+#endif
 
 	_irqL irqL;
 
@@ -1045,7 +1074,7 @@ void mp_stop_test(PADAPTER padapter)
 		rtw_indicate_disconnect(padapter, 0, _FALSE);
 
 		/* 3 2. clear psta used in mp test mode.
-		*	rtw_free_assoc_resources(padapter, 1); */
+		*	rtw_free_assoc_resources(padapter, _TRUE); */
 		psta = rtw_get_stainfo(&padapter->stapriv, tgt_network->network.MacAddress);
 		if (psta)
 			rtw_free_stainfo(padapter, psta);
@@ -1063,6 +1092,12 @@ end_of_mp_stop_test:
 
 		_exit_critical_bh(&pmlmepriv->lock, &irqL);
 
+#ifdef CONFIG_PCI_HCI
+		hal = GET_HAL_DATA(padapter);
+		hal->pci_backdoor_ctrl = registry_par->pci_aspm_config;
+		rtw_pci_aspm_config(padapter);
+#endif
+
 #ifdef CONFIG_RTL8812A
 		rtl8812_InitHalDm(padapter);
 #endif
@@ -1078,6 +1113,9 @@ end_of_mp_stop_test:
 #ifdef CONFIG_RTL8188F
 		rtl8188f_InitHalDm(padapter);
 #endif
+#ifdef CONFIG_RTL8188GTV
+		rtl8188gtv_InitHalDm(padapter);
+#endif
 #ifdef CONFIG_RTL8723D
 		rtl8723d_InitHalDm(padapter);
 #endif
@@ -1143,6 +1181,7 @@ static VOID mpt_AdjustRFRegByRateByChan92CU(PADAPTER pAdapter, u8 RateIdx, u8 Ch
  * 01/09/2009	MHC		Add CCK modification for 40MHZ. Suggestion from SD3.
  *
  *---------------------------------------------------------------------------*/
+#if 0
 static void mpt_SwitchRfSetting(PADAPTER pAdapter)
 {
 	hal_mpt_SwitchRfSetting(pAdapter);
@@ -1154,6 +1193,7 @@ static void MPT_CCKTxPowerAdjust(PADAPTER Adapter, BOOLEAN bInCH14)
 {
 	hal_mpt_CCKTxPowerAdjust(Adapter, bInCH14);
 }
+#endif
 
 /*---------------------------hal\rtl8192c\MPT_HelperFunc.c---------------------------*/
 
@@ -1232,6 +1272,7 @@ s32 SetThermalMeter(PADAPTER pAdapter, u8 target_ther)
 	return hal_mpt_SetThermalMeter(pAdapter, target_ther);
 }
 
+#if 0
 static void TriggerRFThermalMeter(PADAPTER pAdapter)
 {
 	hal_mpt_TriggerRFThermalMeter(pAdapter);
@@ -1241,6 +1282,7 @@ static u8 ReadRFThermalMeter(PADAPTER pAdapter)
 {
 	return hal_mpt_ReadRFThermalMeter(pAdapter);
 }
+#endif
 
 void GetThermalMeter(PADAPTER pAdapter, u8 *value)
 {
@@ -1314,7 +1356,7 @@ static struct xmit_frame *alloc_mp_xmitframe(struct xmit_priv *pxmitpriv)
 
 }
 
-#ifdef CONFIG_PCIE_HCI
+#ifdef CONFIG_PCI_HCI
 static u8 check_nic_enough_desc(_adapter *padapter, struct pkt_attrib *pattrib)
 {
 	u32 prio;
@@ -1374,7 +1416,7 @@ static thread_return mp_xmit_packet_thread(thread_context context)
 	RTW_INFO("%s:pkTx Start\n", __func__);
 	while (1) {
 		pxmitframe = alloc_mp_xmitframe(pxmitpriv);
-#ifdef CONFIG_PCIE_HCI
+#ifdef CONFIG_PCI_HCI
 		if(check_nic_enough_desc(padapter, &pmptx->attrib) == _FALSE) {
 			rtw_usleep_os(1000);
 			continue;
@@ -1488,7 +1530,7 @@ void fill_tx_desc_8814a(PADAPTER padapter)
 
 	u32	pkt_size = pattrib->last_txcmdsz;
 	s32 bmcast = IS_MCAST(pattrib->ra);
-	u8 data_rate, pwr_status, offset;
+	u8 offset;
 
 	/* SET_TX_DESC_FIRST_SEG_8814A(pDesc, 1); */
 	SET_TX_DESC_LAST_SEG_8814A(pDesc, 1);
@@ -1742,6 +1784,37 @@ void fill_tx_desc_8188f(PADAPTER padapter)
 }
 #endif
 
+#if defined(CONFIG_RTL8188GTV)
+void fill_tx_desc_8188gtv(PADAPTER padapter)
+{
+	struct mp_priv *pmp_priv = &padapter->mppriv;
+	struct pkt_attrib *pattrib = &(pmp_priv->tx.attrib);
+	u8 *ptxdesc = pmp_priv->tx.desc;
+
+	SET_TX_DESC_AGG_BREAK_8188GTV(ptxdesc, 1);
+	SET_TX_DESC_MACID_8188GTV(ptxdesc, pattrib->mac_id);
+	SET_TX_DESC_QUEUE_SEL_8188GTV(ptxdesc, pattrib->qsel);
+
+	SET_TX_DESC_RATE_ID_8188GTV(ptxdesc, pattrib->raid);
+	SET_TX_DESC_SEQ_8188GTV(ptxdesc, pattrib->seqnum);
+	SET_TX_DESC_HWSEQ_EN_8188GTV(ptxdesc, 1);
+	SET_TX_DESC_USE_RATE_8188GTV(ptxdesc, 1);
+	SET_TX_DESC_DISABLE_FB_8188GTV(ptxdesc, 1);
+
+	if (pmp_priv->preamble)
+		if (HwRateToMPTRate(pmp_priv->rateidx) <=  MPT_RATE_54M)
+			SET_TX_DESC_DATA_SHORT_8188GTV(ptxdesc, 1);
+
+	if (pmp_priv->bandwidth == CHANNEL_WIDTH_40)
+		SET_TX_DESC_DATA_BW_8188GTV(ptxdesc, 1);
+
+	SET_TX_DESC_TX_RATE_8188GTV(ptxdesc, pmp_priv->rateidx);
+
+	SET_TX_DESC_DATA_RATE_FB_LIMIT_8188GTV(ptxdesc, 0x1F);
+	SET_TX_DESC_RTS_RATE_FB_LIMIT_8188GTV(ptxdesc, 0xF);
+}
+#endif
+
 #if defined(CONFIG_RTL8723D)
 void fill_tx_desc_8723d(PADAPTER padapter)
 {
@@ -1774,6 +1847,70 @@ void fill_tx_desc_8723d(PADAPTER padapter)
 }
 #endif
 
+#if defined(CONFIG_RTL8710B)
+void fill_tx_desc_8710b(PADAPTER padapter)
+{
+	struct mp_priv *pmp_priv = &padapter->mppriv;
+	struct pkt_attrib *pattrib = &(pmp_priv->tx.attrib);
+	u8 *ptxdesc = pmp_priv->tx.desc;
+
+	SET_TX_DESC_BK_8710B(ptxdesc, 1);
+	SET_TX_DESC_MACID_8710B(ptxdesc, pattrib->mac_id);
+	SET_TX_DESC_QUEUE_SEL_8710B(ptxdesc, pattrib->qsel);
+
+	SET_TX_DESC_RATE_ID_8710B(ptxdesc, pattrib->raid);
+	SET_TX_DESC_SEQ_8710B(ptxdesc, pattrib->seqnum);
+	SET_TX_DESC_HWSEQ_EN_8710B(ptxdesc, 1);
+	SET_TX_DESC_USE_RATE_8710B(ptxdesc, 1);
+	SET_TX_DESC_DISABLE_FB_8710B(ptxdesc, 1);
+
+	if (pmp_priv->preamble) {
+		if (HwRateToMPTRate(pmp_priv->rateidx) <=  MPT_RATE_54M)
+			SET_TX_DESC_DATA_SHORT_8710B(ptxdesc, 1);
+	}
+
+	if (pmp_priv->bandwidth == CHANNEL_WIDTH_40)
+		SET_TX_DESC_DATA_BW_8710B(ptxdesc, 1);
+
+	SET_TX_DESC_TX_RATE_8710B(ptxdesc, pmp_priv->rateidx);
+
+	SET_TX_DESC_DATA_RATE_FB_LIMIT_8710B(ptxdesc, 0x1F);
+	SET_TX_DESC_RTS_RATE_FB_LIMIT_8710B(ptxdesc, 0xF);
+}
+#endif
+
+#if defined(CONFIG_RTL8192F)
+void fill_tx_desc_8192f(PADAPTER padapter)
+{
+	struct mp_priv *pmp_priv = &padapter->mppriv;
+	struct pkt_attrib *pattrib = &(pmp_priv->tx.attrib);
+	u8 *ptxdesc = pmp_priv->tx.desc;
+
+	SET_TX_DESC_BK_8192F(ptxdesc, 1);
+	SET_TX_DESC_MACID_8192F(ptxdesc, pattrib->mac_id);
+	SET_TX_DESC_QUEUE_SEL_8192F(ptxdesc, pattrib->qsel);
+
+	SET_TX_DESC_RATE_ID_8192F(ptxdesc, pattrib->raid);
+	SET_TX_DESC_SEQ_8192F(ptxdesc, pattrib->seqnum);
+	SET_TX_DESC_HWSEQ_EN_8192F(ptxdesc, 1);
+	SET_TX_DESC_USE_RATE_8192F(ptxdesc, 1);
+	SET_TX_DESC_DISABLE_FB_8192F(ptxdesc, 1);
+
+	if (pmp_priv->preamble) {
+		if (HwRateToMPTRate(pmp_priv->rateidx) <=  MPT_RATE_54M)
+			SET_TX_DESC_DATA_SHORT_8192F(ptxdesc, 1);
+	}
+
+	if (pmp_priv->bandwidth == CHANNEL_WIDTH_40)
+		SET_TX_DESC_DATA_BW_8192F(ptxdesc, 1);
+
+	SET_TX_DESC_TX_RATE_8192F(ptxdesc, pmp_priv->rateidx);
+
+	SET_TX_DESC_DATA_RATE_FB_LIMIT_8192F(ptxdesc, 0x1F);
+	SET_TX_DESC_RTS_RATE_FB_LIMIT_8192F(ptxdesc, 0xF);
+}
+
+#endif
 static void Rtw_MPSetMacTxEDCA(PADAPTER padapter)
 {
 
@@ -1791,8 +1928,8 @@ static void Rtw_MPSetMacTxEDCA(PADAPTER padapter)
 
 void SetPacketTx(PADAPTER padapter)
 {
-	u8 *ptr, *pkt_start, *pkt_end, *fctrl;
-	u32 pkt_size, offset, startPlace, i;
+	u8 *ptr, *pkt_start, *pkt_end;
+	u32 pkt_size, i;
 	struct rtw_ieee80211_hdr *hdr;
 	u8 payload;
 	s32 bmcast;
@@ -1813,7 +1950,7 @@ void SetPacketTx(PADAPTER padapter)
 	_rtw_memcpy(pattrib->ta, pattrib->src, ETH_ALEN);
 	_rtw_memcpy(pattrib->ra, pattrib->dst, ETH_ALEN);
 	bmcast = IS_MCAST(pattrib->ra);
-	if (bmcast) 
+	if (bmcast)
 		pattrib->psta = rtw_get_bcmc_stainfo(padapter);
 	else
 		pattrib->psta = rtw_get_stainfo(&padapter->stapriv, get_bssid(&padapter->mlmepriv));
@@ -1886,10 +2023,24 @@ void SetPacketTx(PADAPTER padapter)
 		fill_tx_desc_8188f(padapter);
 #endif
 
+#if defined(CONFIG_RTL8188GTV)
+	if (IS_HARDWARE_TYPE_8188GTV(padapter))
+		fill_tx_desc_8188gtv(padapter);
+#endif
+
 #if defined(CONFIG_RTL8723D)
 	if (IS_HARDWARE_TYPE_8723D(padapter))
 		fill_tx_desc_8723d(padapter);
 #endif
+#if defined(CONFIG_RTL8192F)
+		if (IS_HARDWARE_TYPE_8192F(padapter))
+			fill_tx_desc_8192f(padapter);
+#endif
+
+#if defined(CONFIG_RTL8710B)
+	if (IS_HARDWARE_TYPE_8710B(padapter))
+		fill_tx_desc_8710b(padapter);
+#endif
 
 	/* 3 4. make wlan header, make_wlanhdr() */
 	hdr = (struct rtw_ieee80211_hdr *)pkt_start;
@@ -1985,6 +2136,7 @@ void SetPacketRx(PADAPTER pAdapter, u8 bStartRx, u8 bAB)
 			write_bbreg(pAdapter, 0x550, BIT3, bEnable);
 #endif
 			rtw_write16(pAdapter, REG_RXFLTMAP0, 0xFFEF); /* REG_RXFLTMAP0 (RX Filter Map Group 0) */
+			pmppriv->brx_filter_beacon = _TRUE;
 
 		} else {
 			pHalData->ReceiveConfig |= RCR_ADF;
@@ -2054,6 +2206,167 @@ u32 GetPhyRxPktCRC32Error(PADAPTER pAdapter)
 	return OFDM_cnt + CCK_cnt + HT_cnt;
 }
 
+struct psd_init_regs {
+	/* 3 wire */
+	int reg_88c;
+	int reg_c00;
+	int reg_e00;
+	int reg_1800;
+	int reg_1a00;
+	/* cck */
+	int reg_800;
+	int reg_808;
+};
+
+static int rtw_mp_psd_init(PADAPTER padapter, struct psd_init_regs *regs)
+{
+	HAL_DATA_TYPE	*phal_data	= GET_HAL_DATA(padapter);
+
+	switch (phal_data->rf_type) {
+	/* 1R */
+	case RF_1T1R:
+		if (hal_chk_proto_cap(padapter, PROTO_CAP_11AC)) {
+			/* 11AC 1R PSD Setting 3wire & cck off */
+			regs->reg_c00 = rtw_read32(padapter, 0xC00);
+			phy_set_bb_reg(padapter, 0xC00, 0x3, 0x00);
+			regs->reg_808 = rtw_read32(padapter, 0x808);
+			phy_set_bb_reg(padapter, 0x808, 0x10000000, 0x0);
+		} else {
+			/* 11N 3-wire off 1 */
+			regs->reg_88c = rtw_read32(padapter, 0x88C);
+			phy_set_bb_reg(padapter, 0x88C, 0x300000, 0x3);
+			/* 11N CCK off */
+			regs->reg_800 = rtw_read32(padapter, 0x800);
+			phy_set_bb_reg(padapter, 0x800, 0x1000000, 0x0);
+		}
+	break;
+
+	/* 2R */
+	case RF_1T2R:
+	case RF_2T2R:
+		if (hal_chk_proto_cap(padapter, PROTO_CAP_11AC)) {
+			/* 11AC 2R PSD Setting 3wire & cck off */
+			regs->reg_c00 = rtw_read32(padapter, 0xC00);
+			regs->reg_e00 = rtw_read32(padapter, 0xE00);
+			phy_set_bb_reg(padapter, 0xC00, 0x3, 0x00);
+			phy_set_bb_reg(padapter, 0xE00, 0x3, 0x00);
+			regs->reg_808 = rtw_read32(padapter, 0x808);
+			phy_set_bb_reg(padapter, 0x808, 0x10000000, 0x0);
+		} else {
+			/* 11N 3-wire off 2 */
+			regs->reg_88c = rtw_read32(padapter, 0x88C);
+			phy_set_bb_reg(padapter, 0x88C, 0xF00000, 0xF);
+			/* 11N CCK off */
+			regs->reg_800 = rtw_read32(padapter, 0x800);
+			phy_set_bb_reg(padapter, 0x800, 0x1000000, 0x0);
+		}
+	break;
+
+	/* 3R */
+	case RF_2T3R:
+	case RF_3T3R:
+		if (hal_chk_proto_cap(padapter, PROTO_CAP_11AC)) {
+			/* 11AC 3R PSD Setting 3wire & cck off */
+			regs->reg_c00 = rtw_read32(padapter, 0xC00);
+			regs->reg_e00 = rtw_read32(padapter, 0xE00);
+			regs->reg_1800 = rtw_read32(padapter, 0x1800);
+			phy_set_bb_reg(padapter, 0xC00, 0x3, 0x00);
+			phy_set_bb_reg(padapter, 0xE00, 0x3, 0x00);
+			phy_set_bb_reg(padapter, 0x1800, 0x3, 0x00);
+			regs->reg_808 = rtw_read32(padapter, 0x808);
+			phy_set_bb_reg(padapter, 0x808, 0x10000000, 0x0);
+		} else {
+			RTW_ERR("%s: 11n don't support 3R\n", __func__);
+			return -1;
+		}
+		break;
+
+	/* 4R */
+	case RF_2T4R:
+	case RF_3T4R:
+	case RF_4T4R:
+		if (hal_chk_proto_cap(padapter, PROTO_CAP_11AC)) {
+			/* 11AC 4R PSD Setting 3wire & cck off */
+			regs->reg_c00 = rtw_read32(padapter, 0xC00);
+			regs->reg_e00 = rtw_read32(padapter, 0xE00);
+			regs->reg_1800 = rtw_read32(padapter, 0x1800);
+			regs->reg_1a00 = rtw_read32(padapter, 0x1A00);
+			phy_set_bb_reg(padapter, 0xC00, 0x3, 0x00);
+			phy_set_bb_reg(padapter, 0xE00, 0x3, 0x00);
+			phy_set_bb_reg(padapter, 0x1800, 0x3, 0x00);
+			phy_set_bb_reg(padapter, 0x1A00, 0x3, 0x00);
+			regs->reg_808 = rtw_read32(padapter, 0x808);
+			phy_set_bb_reg(padapter, 0x808, 0x10000000, 0x0);
+		} else {
+			RTW_ERR("%s: 11n don't support 4R\n", __func__);
+			return -1;
+		}
+		break;
+
+	default:
+		RTW_ERR("%s: unknown %d rf type\n", __func__, phal_data->rf_type);
+		return -1;
+	}
+
+	/* Set PSD points, 0=128, 1=256, 2=512, 3=1024 */
+	if (hal_chk_proto_cap(padapter, PROTO_CAP_11AC))
+		phy_set_bb_reg(padapter, 0x910, 0xC000, 3);
+	else
+		phy_set_bb_reg(padapter, 0x808, 0xC000, 3);
+
+	RTW_INFO("%s: set %d rf type done\n", __func__, phal_data->rf_type);
+	return 0;
+}
+
+static int rtw_mp_psd_close(PADAPTER padapter, struct psd_init_regs *regs)
+{
+	HAL_DATA_TYPE	*phal_data	= GET_HAL_DATA(padapter);
+
+
+	if (!hal_chk_proto_cap(padapter, PROTO_CAP_11AC)) {
+		/* 11n 3wire restore */
+		rtw_write32(padapter, 0x88C, regs->reg_88c);
+		/* 11n cck restore */
+		rtw_write32(padapter, 0x800, regs->reg_800);
+		RTW_INFO("%s: restore %d rf type\n", __func__, phal_data->rf_type);
+		return 0;
+	}
+
+	/* 11ac 3wire restore */
+	switch (phal_data->rf_type) {
+	case RF_1T1R:
+		rtw_write32(padapter, 0xC00, regs->reg_c00);
+		break;
+	case RF_1T2R:
+	case RF_2T2R:
+		rtw_write32(padapter, 0xC00, regs->reg_c00);
+		rtw_write32(padapter, 0xE00, regs->reg_e00);
+		break;
+	case RF_2T3R:
+	case RF_3T3R:
+		rtw_write32(padapter, 0xC00, regs->reg_c00);
+		rtw_write32(padapter, 0xE00, regs->reg_e00);
+		rtw_write32(padapter, 0x1800, regs->reg_1800);
+		break;
+	case RF_2T4R:
+	case RF_3T4R:
+	case RF_4T4R:
+		rtw_write32(padapter, 0xC00, regs->reg_c00);
+		rtw_write32(padapter, 0xE00, regs->reg_e00);
+		rtw_write32(padapter, 0x1800, regs->reg_1800);
+		rtw_write32(padapter, 0x1A00, regs->reg_1a00);
+		break;
+	default:
+		RTW_WARN("%s: unknown %d rf type\n", __func__, phal_data->rf_type);
+		break;
+	}
+
+	/* 11ac cck restore */
+	rtw_write32(padapter, 0x808, regs->reg_808);
+	RTW_INFO("%s: restore %d rf type done\n", __func__, phal_data->rf_type);
+	return 0;
+}
+
 /* reg 0x808[9:0]: FFT data x
  * reg 0x808[22]:  0  -->  1  to get 1 FFT data y
  * reg 0x8B4[15:0]: FFT data y report */
@@ -2082,7 +2395,11 @@ static u32 rtw_GetPSDData(PADAPTER pAdapter, u32 point)
 	rtw_mdelay_os(1);
 
 	psd_val = rtw_read32(pAdapter, psd_regL);
+#if defined(CONFIG_RTL8821C)
+	psd_val = (psd_val & 0x00FFFFFF) / 32;
+#else
 	psd_val &= 0x0000FFFF;
+#endif
 
 	return psd_val;
 }
@@ -2099,7 +2416,8 @@ u32 mp_query_psd(PADAPTER pAdapter, u8 *data)
 {
 	u32 i, psd_pts = 0, psd_start = 0, psd_stop = 0;
 	u32 psd_data = 0;
-
+	struct psd_init_regs regs = {};
+	int psd_analysis = 0;
 
 #ifdef PLATFORM_LINUX
 	if (!netif_running(pAdapter->pnetdev)) {
@@ -2115,6 +2433,11 @@ u32 mp_query_psd(PADAPTER pAdapter, u8 *data)
 		psd_pts = 128;
 		psd_start = 64;
 		psd_stop = 128;
+	} else if (strncmp(data, "analysis,", 9) == 0) {
+		if (rtw_mp_psd_init(pAdapter, &regs) != 0)
+			return 0;
+		psd_analysis = 1;
+		sscanf(data + 9, "pts=%d,start=%d,stop=%d", &psd_pts, &psd_start, &psd_stop);
 	} else
 		sscanf(data, "pts=%d,start=%d,stop=%d", &psd_pts, &psd_start, &psd_stop);
 
@@ -2136,6 +2459,9 @@ u32 mp_query_psd(PADAPTER pAdapter, u8 *data)
 	rtw_mdelay_os(100);
 #endif
 
+	if (psd_analysis)
+		rtw_mp_psd_close(pAdapter, &regs);
+
 	return strlen(data) + 1;
 }
 
@@ -2732,7 +3058,6 @@ ULONG mpt_ProQueryCalTxPower(
 	PMPT_CONTEXT		pMptCtx = &(pAdapter->mppriv.mpt_ctx);
 
 	ULONG			TxPower = 1;
-	u1Byte			rate = 0;
 	struct txpwr_idx_comp tic;
 	u8 mgn_rate = mpt_to_mgnt_rate(pMptCtx->mpt_rate_index);
 
@@ -2743,10 +3068,14 @@ ULONG mpt_ProQueryCalTxPower(
 		, TxPower, tic.base, (tic.by_rate > tic.limit ? tic.limit : tic.by_rate), tic.by_rate, tic.limit, tic.tpt, tic.ebias);
 
 	pAdapter->mppriv.txpoweridx = (u8)TxPower;
-	pMptCtx->TxPwrLevel[RF_PATH_A] = (u8)TxPower;
-	pMptCtx->TxPwrLevel[RF_PATH_B] = (u8)TxPower;
-	pMptCtx->TxPwrLevel[RF_PATH_C] = (u8)TxPower;
-	pMptCtx->TxPwrLevel[RF_PATH_D]  = (u8)TxPower;
+	if (RfPath == RF_PATH_A)
+		pMptCtx->TxPwrLevel[RF_PATH_A] = (u8)TxPower;
+	else if (RfPath == RF_PATH_B)
+		pMptCtx->TxPwrLevel[RF_PATH_B] = (u8)TxPower;
+	else if (RfPath == RF_PATH_C)
+		pMptCtx->TxPwrLevel[RF_PATH_C] = (u8)TxPower;
+	else if (RfPath == RF_PATH_D)
+		pMptCtx->TxPwrLevel[RF_PATH_D]    = (u8)TxPower;
 	hal_mpt_SetTxPower(pAdapter);
 
 	return TxPower;
diff --git a/rtl8723DS/core/rtw_mp_ioctl.c b/rtl8723DS/core/rtw_mp_ioctl.c
index 035d281..035d281 100755..100644
--- a/rtl8723DS/core/rtw_mp_ioctl.c
+++ b/rtl8723DS/core/rtw_mp_ioctl.c
diff --git a/rtl8723DS/core/rtw_odm.c b/rtl8723DS/core/rtw_odm.c
index d5833b9..7204181 100755..100644
--- a/rtl8723DS/core/rtw_odm.c
+++ b/rtl8723DS/core/rtw_odm.c
@@ -19,7 +19,7 @@
 u32 rtw_phydm_ability_ops(_adapter *adapter, HAL_PHYDM_OPS ops, u32 ability)
 {
 	HAL_DATA_TYPE *pHalData = GET_HAL_DATA(adapter);
-	struct PHY_DM_STRUCT *podmpriv = &pHalData->odmpriv;
+	struct dm_struct *podmpriv = &pHalData->odmpriv;
 	u32 result = 0;
 
 	switch (ops) {
@@ -56,7 +56,7 @@ u32 rtw_phydm_ability_ops(_adapter *adapter, HAL_PHYDM_OPS ops, u32 ability)
 /* set ODM_CMNINFO_IC_TYPE based on chip_type */
 void rtw_odm_init_ic_type(_adapter *adapter)
 {
-	struct PHY_DM_STRUCT *odm = adapter_to_phydm(adapter);
+	struct dm_struct *odm = adapter_to_phydm(adapter);
 	u4Byte ic_type = chip_type_to_odm_ic_type(rtw_get_chip_type(adapter));
 
 	rtw_warn_on(!ic_type);
@@ -103,43 +103,16 @@ void rtw_odm_adaptivity_mode_msg(void *sel, _adapter *adapter)
 		_RTW_PRINT_SEL(sel, "INVALID\n");
 }
 
-#define RTW_ADAPTIVITY_DML_DISABLE 0
-#define RTW_ADAPTIVITY_DML_ENABLE 1
-
-void rtw_odm_adaptivity_dml_msg(void *sel, _adapter *adapter)
-{
-	struct registry_priv *regsty = &adapter->registrypriv;
-
-	RTW_PRINT_SEL(sel, "RTW_ADAPTIVITY_DML_");
-
-	if (regsty->adaptivity_dml == RTW_ADAPTIVITY_DML_DISABLE)
-		_RTW_PRINT_SEL(sel, "DISABLE\n");
-	else if (regsty->adaptivity_dml == RTW_ADAPTIVITY_DML_ENABLE)
-		_RTW_PRINT_SEL(sel, "ENABLE\n");
-	else
-		_RTW_PRINT_SEL(sel, "INVALID\n");
-}
-
-void rtw_odm_adaptivity_dc_backoff_msg(void *sel, _adapter *adapter)
-{
-	struct registry_priv *regsty = &adapter->registrypriv;
-
-	RTW_PRINT_SEL(sel, "RTW_ADAPTIVITY_DC_BACKOFF:%u\n", regsty->adaptivity_dc_backoff);
-}
-
 void rtw_odm_adaptivity_config_msg(void *sel, _adapter *adapter)
 {
 	rtw_odm_adaptivity_ver_msg(sel, adapter);
 	rtw_odm_adaptivity_en_msg(sel, adapter);
 	rtw_odm_adaptivity_mode_msg(sel, adapter);
-	rtw_odm_adaptivity_dml_msg(sel, adapter);
-	rtw_odm_adaptivity_dc_backoff_msg(sel, adapter);
 }
 
 bool rtw_odm_adaptivity_needed(_adapter *adapter)
 {
 	struct registry_priv *regsty = &adapter->registrypriv;
-	struct mlme_priv *mlme = &adapter->mlmepriv;
 	bool ret = _FALSE;
 
 	if (regsty->adaptivity_en == RTW_ADAPTIVITY_EN_ENABLE)
@@ -150,44 +123,32 @@ bool rtw_odm_adaptivity_needed(_adapter *adapter)
 
 void rtw_odm_adaptivity_parm_msg(void *sel, _adapter *adapter)
 {
-	struct PHY_DM_STRUCT *odm = adapter_to_phydm(adapter);
+	struct dm_struct *odm = adapter_to_phydm(adapter);
 
 	rtw_odm_adaptivity_config_msg(sel, adapter);
 
-	RTW_PRINT_SEL(sel, "%10s %16s %16s %22s %12s\n"
-		, "th_l2h_ini", "th_edcca_hl_diff", "th_l2h_ini_mode2", "th_edcca_hl_diff_mode2", "edcca_enable");
-	RTW_PRINT_SEL(sel, "0x%-8x %-16d 0x%-14x %-22d %-12d\n"
+	RTW_PRINT_SEL(sel, "%10s %16s\n"
+		, "th_l2h_ini", "th_edcca_hl_diff");
+	RTW_PRINT_SEL(sel, "0x%-8x %-16d\n"
 		, (u8)odm->th_l2h_ini
 		, odm->th_edcca_hl_diff
-		, (u8)odm->th_l2h_ini_mode2
-		, odm->th_edcca_hl_diff_mode2
-		, odm->edcca_enable
-	);
-
-	RTW_PRINT_SEL(sel, "%15s %9s\n", "AdapEnableState", "Adap_Flag");
-	RTW_PRINT_SEL(sel, "%-15x %-9x\n"
-		, odm->adaptivity_enable
-		, odm->adaptivity_flag
 	);
 }
 
-void rtw_odm_adaptivity_parm_set(_adapter *adapter, s8 th_l2h_ini, s8 th_edcca_hl_diff, s8 th_l2h_ini_mode2, s8 th_edcca_hl_diff_mode2, u8 edcca_enable)
+void rtw_odm_adaptivity_parm_set(_adapter *adapter, s8 th_l2h_ini, s8 th_edcca_hl_diff)
 {
-	struct PHY_DM_STRUCT *odm = adapter_to_phydm(adapter);
+	struct dm_struct *odm = adapter_to_phydm(adapter);
 
 	odm->th_l2h_ini = th_l2h_ini;
 	odm->th_edcca_hl_diff = th_edcca_hl_diff;
-	odm->th_l2h_ini_mode2 = th_l2h_ini_mode2;
-	odm->th_edcca_hl_diff_mode2 = th_edcca_hl_diff_mode2;
-	odm->edcca_enable = edcca_enable;
 }
 
 void rtw_odm_get_perpkt_rssi(void *sel, _adapter *adapter)
 {
-	struct PHY_DM_STRUCT *odm = adapter_to_phydm(adapter);
+	struct dm_struct *odm = adapter_to_phydm(adapter);
 
-	RTW_PRINT_SEL(sel, "rx_rate = %s, RSSI_A = %d(%%), RSSI_B = %d(%%)\n",
-		      HDATA_RATE(odm->rx_rate), odm->RSSI_A, odm->RSSI_B);
+	RTW_PRINT_SEL(sel, "rx_rate = %s, rssi_a = %d(%%), rssi_b = %d(%%)\n",
+		      HDATA_RATE(odm->rx_rate), odm->rssi_a, odm->rssi_b);
 }
 
 
@@ -217,10 +178,10 @@ void rtw_odm_releasespinlock(_adapter *adapter,	enum rt_spinlock_type type)
 	}
 }
 
-inline u8 rtw_odm_get_dfs_domain(_adapter *adapter)
+inline u8 rtw_odm_get_dfs_domain(struct dvobj_priv *dvobj)
 {
 #ifdef CONFIG_DFS_MASTER
-	struct PHY_DM_STRUCT *pDM_Odm = adapter_to_phydm(adapter);
+	struct dm_struct *pDM_Odm = dvobj_to_phydm(dvobj);
 
 	return pDM_Odm->dfs_region_domain;
 #else
@@ -228,10 +189,10 @@ inline u8 rtw_odm_get_dfs_domain(_adapter *adapter)
 #endif
 }
 
-inline u8 rtw_odm_dfs_domain_unknown(_adapter *adapter)
+inline u8 rtw_odm_dfs_domain_unknown(struct dvobj_priv *dvobj)
 {
 #ifdef CONFIG_DFS_MASTER
-	return rtw_odm_get_dfs_domain(adapter) == PHYDM_DFS_DOMAIN_UNKNOWN;
+	return rtw_odm_get_dfs_domain(dvobj) == PHYDM_DFS_DOMAIN_UNKNOWN;
 #else
 	return 1;
 #endif
@@ -258,6 +219,11 @@ inline BOOLEAN rtw_odm_radar_detect(_adapter *adapter)
 {
 	return phydm_radar_detect(adapter_to_phydm(adapter));
 }
+
+inline u8 rtw_odm_radar_detect_polling_int_ms(struct dvobj_priv *dvobj)
+{
+	return phydm_dfs_polling_time(dvobj_to_phydm(dvobj));
+}
 #endif /* CONFIG_DFS_MASTER */
 
 void rtw_odm_parse_rx_phy_status_chinfo(union recv_frame *rframe, u8 *phys)
@@ -268,11 +234,11 @@ void rtw_odm_parse_rx_phy_status_chinfo(union recv_frame *rframe, u8 *phys)
 
 #if (ODM_PHY_STATUS_NEW_TYPE_SUPPORT == 1)
 	_adapter *adapter = rframe->u.hdr.adapter;
-	struct PHY_DM_STRUCT *phydm = adapter_to_phydm(adapter);
+	struct dm_struct *phydm = adapter_to_phydm(adapter);
 	struct rx_pkt_attrib *attrib = &rframe->u.hdr.attrib;
 	u8 *wlanhdr = get_recvframe_data(rframe);
 
-	if (phydm->support_ic_type & ODM_IC_PHY_STATUE_NEW_TYPE) {
+	if (phydm->support_ic_type & PHYSTS_2ND_TYPE_IC) {
 		/*
 		* 8723D:
 		* type_0(CCK)
@@ -301,7 +267,7 @@ void rtw_odm_parse_rx_phy_status_chinfo(union recv_frame *rframe, u8 *phys)
 		*/
 
 		if ((*phys & 0xf) == 0) {
-			struct _phy_status_rpt_jaguar2_type0 *phys_t0 = (struct _phy_status_rpt_jaguar2_type0 *)phys;
+			struct phy_sts_rpt_jgr2_type0 *phys_t0 = (struct phy_sts_rpt_jgr2_type0 *)phys;
 
 			if (DBG_RX_PHYSTATUS_CHINFO) {
 				RTW_PRINT("phys_t%u ta="MAC_FMT" %s, %s(band:%u, ch:%u, l_rxsc:%u)\n"
@@ -314,7 +280,7 @@ void rtw_odm_parse_rx_phy_status_chinfo(union recv_frame *rframe, u8 *phys)
 			}
 
 		} else if ((*phys & 0xf) == 1) {
-			struct _phy_status_rpt_jaguar2_type1 *phys_t1 = (struct _phy_status_rpt_jaguar2_type1 *)phys;
+			struct phy_sts_rpt_jgr2_type1 *phys_t1 = (struct phy_sts_rpt_jgr2_type1 *)phys;
 			u8 rxsc = (attrib->data_rate > DESC_RATE11M && attrib->data_rate < DESC_RATEMCS0) ? phys_t1->l_rxsc : phys_t1->ht_rxsc;
 			u8 pkt_cch = 0;
 			u8 pkt_bw = CHANNEL_WIDTH_20;
@@ -435,7 +401,7 @@ type1_end:
 				attrib->ch = pkt_cch;
 
 		} else {
-			struct _phy_status_rpt_jaguar2_type2 *phys_t2 = (struct _phy_status_rpt_jaguar2_type2 *)phys;
+			struct phy_sts_rpt_jgr2_type2 *phys_t2 = (struct phy_sts_rpt_jgr2_type2 *)phys;
 
 			if (DBG_RX_PHYSTATUS_CHINFO) {
 				RTW_PRINT("phys_t%u ta="MAC_FMT" %s, %s(band:%u, ch:%u, l_rxsc:%u, ht_rxsc:%u)\n"
diff --git a/rtl8723DS/core/rtw_p2p.c b/rtl8723DS/core/rtw_p2p.c
index 271d67a..b0bd8e7 100755..100644
--- a/rtl8723DS/core/rtw_p2p.c
+++ b/rtl8723DS/core/rtw_p2p.c
@@ -290,7 +290,6 @@ static void issue_p2p_provision_resp(struct wifidirect_info *pwdinfo, u8 *raddr,
 	unsigned short				*fctrl;
 	struct xmit_priv			*pxmitpriv = &(padapter->xmitpriv);
 	struct mlme_ext_priv	*pmlmeext = &(padapter->mlmeextpriv);
-	struct mlme_ext_info	*pmlmeinfo = &(pmlmeext->mlmext_info);
 
 
 	pmgntframe = alloc_mgtxmitframe(pxmitpriv);
@@ -2807,8 +2806,6 @@ u8 process_p2p_group_negotation_resp(struct wifidirect_info *pwdinfo, u8 *pframe
 		u8	attr_content = 0x00;
 		u32	attr_contentlen = 0;
 		u8	operatingch_info[5] = { 0x00 };
-		uint	ch_cnt = 0;
-		u8	ch_content[100] = { 0x00 };
 		u8	groupid[38];
 		u16	cap_attr;
 		u8	peer_ch_list[100] = { 0x00 };
@@ -2974,7 +2971,9 @@ u8 process_p2p_group_negotation_resp(struct wifidirect_info *pwdinfo, u8 *pframe
 
 u8 process_p2p_group_negotation_confirm(struct wifidirect_info *pwdinfo, u8 *pframe, uint len)
 {
+#ifdef CONFIG_CONCURRENT_MODE
 	_adapter *padapter = pwdinfo->padapter;
+#endif
 	u8 *ies;
 	u32 ies_len;
 	u8 *p2p_ie;
@@ -3097,8 +3096,6 @@ void p2p_concurrent_handler(_adapter *padapter);
 void restore_p2p_state_handler(_adapter	*padapter)
 {
 	struct wifidirect_info  *pwdinfo = &padapter->wdinfo;
-	struct mlme_priv		*pmlmepriv = &padapter->mlmepriv;
-
 
 	if (rtw_p2p_chk_state(pwdinfo, P2P_STATE_GONEGO_ING) || rtw_p2p_chk_state(pwdinfo, P2P_STATE_GONEGO_FAIL))
 		rtw_p2p_set_role(pwdinfo, P2P_ROLE_DEVICE);
@@ -3175,9 +3172,11 @@ void p2p_concurrent_handler(_adapter	*padapter)
 	struct mlme_ext_info	*pmlmeinfo = &(pmlmeext->mlmext_info);
 	u8					val8;
 
+#ifdef CONFIG_IOCTL_CFG80211
 	if (pwdinfo->driver_interface == DRIVER_CFG80211
 		&& !rtw_cfg80211_get_is_roch(padapter))
 		return;
+#endif
 
 	if (rtw_mi_check_status(padapter, MI_LINKED)) {
 		u8 union_ch = rtw_mi_get_union_chan(padapter);
@@ -3293,16 +3292,15 @@ u8 roch_stay_in_cur_chan(_adapter *padapter)
 		if (iface) {
 			pmlmepriv = &iface->mlmepriv;
 
-			if (check_fwstate(pmlmepriv, _FW_UNDER_LINKING | WIFI_UNDER_WPS) == _TRUE) {
-				RTW_ERR(ADPT_FMT"- _FW_UNDER_LINKING |WIFI_UNDER_WPS (mlme state:0x%x)\n",
+			if (check_fwstate(pmlmepriv, _FW_UNDER_LINKING | WIFI_UNDER_WPS | WIFI_UNDER_KEY_HANDSHAKE) == _TRUE) {
+				RTW_INFO(ADPT_FMT"- _FW_UNDER_LINKING |WIFI_UNDER_WPS | WIFI_UNDER_KEY_HANDSHAKE (mlme state:0x%x)\n",
 						ADPT_ARG(iface), get_fwstate(&iface->mlmepriv));
 				rst = _TRUE;
 				break;
 			}
 			#ifdef CONFIG_AP_MODE
 			if (MLME_IS_AP(iface) || MLME_IS_MESH(iface)) {
-				if (rtw_ap_sta_linking_state_check(iface) == _TRUE) {
-					RTW_ERR(ADPT_FMT"- SoftAP/Mesh -have sta under linking\n", ADPT_ARG(iface));
+				if (rtw_ap_sta_states_check(iface) == _TRUE) {
 					rst = _TRUE;
 					break;
 				}
@@ -3320,8 +3318,12 @@ static int ro_ch_handler(_adapter *adapter, u8 *buf)
 	struct p2p_roch_parm *roch_parm = (struct p2p_roch_parm *)buf;
 	struct rtw_wdev_priv *pwdev_priv = adapter_wdev_data(adapter);
 	struct cfg80211_wifidirect_info *pcfg80211_wdinfo = &adapter->cfg80211_wdinfo;
-	struct wifidirect_info *pwdinfo = &adapter->wdinfo;
+#ifdef CONFIG_CONCURRENT_MODE
 	struct mlme_ext_priv *pmlmeext = &adapter->mlmeextpriv;
+#ifdef RTW_ROCH_BACK_OP
+	struct wifidirect_info *pwdinfo = &adapter->wdinfo;
+#endif
+#endif
 	u8 ready_on_channel = _FALSE;
 	u8 remain_ch;
 	unsigned int duration;
@@ -3440,6 +3442,7 @@ static int cancel_ro_ch_handler(_adapter *padapter, u8 *buf)
 
 #if defined(RTW_ROCH_BACK_OP) && defined(CONFIG_CONCURRENT_MODE)
 	_cancel_timer_ex(&pwdinfo->ap_p2p_switch_timer);
+	ATOMIC_SET(&pwdev_priv->switch_ch_to, 1);
 #endif
 
 	if (rtw_mi_get_ch_setting_union(padapter, &ch, &bw, &offset) != 0) {
@@ -3474,7 +3477,7 @@ static int cancel_ro_ch_handler(_adapter *padapter, u8 *buf)
 
 	rtw_cfg80211_set_is_roch(padapter, _FALSE);
 	pcfg80211_wdinfo->ro_ch_wdev = NULL;
-	pcfg80211_wdinfo->last_ro_ch_time = rtw_get_current_time();
+	rtw_cfg80211_set_last_ro_ch_time(padapter);
 
 	rtw_cfg80211_remain_on_channel_expired(wdev
 		, pcfg80211_wdinfo->remain_on_ch_cookie
@@ -3501,6 +3504,7 @@ static void ro_ch_timer_process(void *FunctionContext)
 	p2p_cancel_roch_cmd(adapter, 0, NULL, 0);
 }
 
+#if 0
 static void rtw_change_p2pie_op_ch(_adapter *padapter, const u8 *frame_body, u32 len, u8 ch)
 {
 	u8 *ies, *p2p_ie;
@@ -3531,7 +3535,9 @@ static void rtw_change_p2pie_op_ch(_adapter *padapter, const u8 *frame_body, u32
 		p2p_ie = rtw_get_p2p_ie(p2p_ie + p2p_ielen, ies_len - (p2p_ie - ies + p2p_ielen), NULL, &p2p_ielen);
 	}
 }
+#endif
 
+#if defined(CONFIG_CONCURRENT_MODE) && defined(CONFIG_CFG80211_ONECHANNEL_UNDER_CONCURRENT)
 static void rtw_change_p2pie_ch_list(_adapter *padapter, const u8 *frame_body, u32 len, u8 ch)
 {
 	u8 *ies, *p2p_ie;
@@ -3575,11 +3581,12 @@ static void rtw_change_p2pie_ch_list(_adapter *padapter, const u8 *frame_body, u
 		p2p_ie = rtw_get_p2p_ie(p2p_ie + p2p_ielen, ies_len - (p2p_ie - ies + p2p_ielen), NULL, &p2p_ielen);
 	}
 }
+#endif
 
+#if defined(CONFIG_CONCURRENT_MODE) && defined(CONFIG_CFG80211_ONECHANNEL_UNDER_CONCURRENT)
 static bool rtw_chk_p2pie_ch_list_with_buddy(_adapter *padapter, const u8 *frame_body, u32 len)
 {
 	bool fit = _FALSE;
-#ifdef CONFIG_CONCURRENT_MODE
 	u8 *ies, *p2p_ie;
 	u32 ies_len, p2p_ielen;
 	u8 union_ch = rtw_mi_get_union_chan(padapter);
@@ -3621,14 +3628,14 @@ static bool rtw_chk_p2pie_ch_list_with_buddy(_adapter *padapter, const u8 *frame
 		/* Get the next P2P IE */
 		p2p_ie = rtw_get_p2p_ie(p2p_ie + p2p_ielen, ies_len - (p2p_ie - ies + p2p_ielen), NULL, &p2p_ielen);
 	}
-#endif
+
 	return fit;
 }
 
+#if defined(CONFIG_P2P_INVITE_IOT)
 static bool rtw_chk_p2pie_op_ch_with_buddy(_adapter *padapter, const u8 *frame_body, u32 len)
 {
 	bool fit = _FALSE;
-#ifdef CONFIG_CONCURRENT_MODE
 	u8 *ies, *p2p_ie;
 	u32 ies_len, p2p_ielen;
 	u8 union_ch = rtw_mi_get_union_chan(padapter);
@@ -3657,13 +3664,13 @@ static bool rtw_chk_p2pie_op_ch_with_buddy(_adapter *padapter, const u8 *frame_b
 		/* Get the next P2P IE */
 		p2p_ie = rtw_get_p2p_ie(p2p_ie + p2p_ielen, ies_len - (p2p_ie - ies + p2p_ielen), NULL, &p2p_ielen);
 	}
-#endif
+
 	return fit;
 }
+#endif
 
 static void rtw_cfg80211_adjust_p2pie_channel(_adapter *padapter, const u8 *frame_body, u32 len)
 {
-#ifdef CONFIG_CONCURRENT_MODE
 	u8 *ies, *p2p_ie;
 	u32 ies_len, p2p_ielen;
 	u8 union_ch = rtw_mi_get_union_chan(padapter);
@@ -3726,8 +3733,8 @@ static void rtw_cfg80211_adjust_p2pie_channel(_adapter *padapter, const u8 *fram
 
 	}
 
-#endif
 }
+#endif
 
 #ifdef CONFIG_WFD
 u32 rtw_xframe_build_wfd_ie(struct xmit_frame *xframe)
@@ -3811,8 +3818,6 @@ u32 rtw_xframe_build_wfd_ie(struct xmit_frame *xframe)
 bool rtw_xframe_del_wfd_ie(struct xmit_frame *xframe)
 {
 #define DBG_XFRAME_DEL_WFD_IE 0
-
-	_adapter *adapter = xframe->padapter;
 	u8 *frame = xframe->buf_addr + TXDESC_OFFSET;
 	u8 *frame_body = frame + sizeof(struct rtw_ieee80211_hdr_3addr);
 	u8 *frame_tail = frame + xframe->attrib.pktlen;
@@ -3859,12 +3864,9 @@ bool rtw_xframe_del_wfd_ie(struct xmit_frame *xframe)
 void rtw_xframe_chk_wfd_ie(struct xmit_frame *xframe)
 {
 	_adapter *adapter = xframe->padapter;
-	u8 *frame = xframe->buf_addr + TXDESC_OFFSET;
-	u8 *frame_body = frame + sizeof(struct rtw_ieee80211_hdr_3addr);
-	u8 *frame_tail = frame + xframe->attrib.pktlen;
-
+#ifdef CONFIG_IOCTL_CFG80211
 	struct wifidirect_info *wdinfo = &adapter->wdinfo;
-	struct mlme_priv *mlme = &adapter->mlmepriv;
+#endif
 	u8 build = 0;
 	u8 del = 0;
 
@@ -3872,7 +3874,7 @@ void rtw_xframe_chk_wfd_ie(struct xmit_frame *xframe)
 		del = 1;
 
 #ifdef CONFIG_IOCTL_CFG80211
-	if (_TRUE == wdinfo->wfd_info->wfd_enable)
+	if (wdinfo->wfd_info->wfd_enable == _TRUE)
 #endif
 		del = build = 1;
 
@@ -3892,7 +3894,6 @@ u8 *dump_p2p_attr_ch_list(u8 *p2p_ie, uint p2p_ielen, u8 *buf, u32 buf_len)
 	int w_sz = 0;
 	u8 ch_cnt = 0;
 	u8 ch_list[40];
-	bool continuous = _FALSE;
 
 	pattr = rtw_get_p2p_attr_content(p2p_ie, p2p_ielen, P2P_ATTR_CH_LIST, NULL, &attr_contentlen);
 	if (pattr != NULL) {
@@ -4195,10 +4196,13 @@ int rtw_p2p_check_frames(_adapter *padapter, const u8 *buf, u32 len, u8 tx)
 				if (!tx) {
 					#if defined(CONFIG_CONCURRENT_MODE) && defined(CONFIG_CFG80211_ONECHANNEL_UNDER_CONCURRENT)
 					if (rtw_mi_check_status(padapter, MI_LINKED) && padapter->registrypriv.full_ch_in_p2p_handshake == 0) {
+						#if defined(CONFIG_P2P_INVITE_IOT)
 						if (op_ch != -1 && rtw_chk_p2pie_op_ch_with_buddy(padapter, frame_body, len - sizeof(struct rtw_ieee80211_hdr_3addr)) == _FALSE) {
 							RTW_INFO(FUNC_ADPT_FMT" op_ch:%u has no intersect with buddy\n", FUNC_ADPT_ARG(padapter), op_ch);
 							rtw_change_p2pie_ch_list(padapter, frame_body, len - sizeof(struct rtw_ieee80211_hdr_3addr), 0);
-						} else if (rtw_chk_p2pie_ch_list_with_buddy(padapter, frame_body, len - sizeof(struct rtw_ieee80211_hdr_3addr)) == _FALSE) {
+						} else
+						#endif
+						if (rtw_chk_p2pie_ch_list_with_buddy(padapter, frame_body, len - sizeof(struct rtw_ieee80211_hdr_3addr)) == _FALSE) {
 							RTW_INFO(FUNC_ADPT_FMT" ch_list has no intersect with buddy\n", FUNC_ADPT_ARG(padapter));
 							rtw_change_p2pie_ch_list(padapter, frame_body, len - sizeof(struct rtw_ieee80211_hdr_3addr), 0);
 						}
@@ -4348,7 +4352,6 @@ void rtw_init_cfg80211_wifidirect_info(_adapter	*padapter)
 s32 p2p_protocol_wk_hdl(_adapter *padapter, int intCmdType, u8 *buf)
 {
 	int ret = H2C_SUCCESS;
-	struct wifidirect_info	*pwdinfo = &(padapter->wdinfo);
 
 	switch (intCmdType) {
 	case P2P_FIND_PHASE_WK:
@@ -4425,7 +4428,6 @@ int process_p2p_cross_connect_ie(PADAPTER padapter, u8 *IEs, u32 IELength)
 	u8	p2p_attr[MAX_P2P_IE_LEN] = { 0x00 };/* NoA length should be n*(13) + 2 */
 	u32	attr_contentlen = 0;
 
-	struct wifidirect_info	*pwdinfo = &(padapter->wdinfo);
 
 
 	if (IELength <= _BEACON_IE_OFFSET_)
@@ -4548,7 +4550,6 @@ void p2p_ps_wk_hdl(_adapter *padapter, u8 p2p_ps_state)
 {
 	struct pwrctrl_priv		*pwrpriv = adapter_to_pwrctl(padapter);
 	struct wifidirect_info	*pwdinfo = &(padapter->wdinfo);
-	struct mlme_priv	*pmlmepriv = &padapter->mlmepriv;
 	u32 ps_deny = 0;
 
 	/* Pre action for p2p state */
@@ -4726,7 +4727,6 @@ static void pre_tx_scan_timer_process(void *FunctionContext)
 	struct	wifidirect_info				*pwdinfo = &adapter->wdinfo;
 	_irqL							irqL;
 	struct mlme_priv					*pmlmepriv = &adapter->mlmepriv;
-	u8								_status = 0;
 
 	if (rtw_p2p_chk_state(pwdinfo, P2P_STATE_NONE))
 		return;
@@ -5040,7 +5040,6 @@ void init_wifidirect_info(_adapter *padapter, enum P2P_ROLE role)
 #ifdef CONFIG_WFD
 	struct wifi_display_info	*pwfd_info = &padapter->wfd_info;
 #endif
-	u8 union_ch = 0;
 	pwdinfo = &padapter->wdinfo;
 
 	pwdinfo->padapter = padapter;
@@ -5055,6 +5054,8 @@ void init_wifidirect_info(_adapter *padapter, enum P2P_ROLE role)
 		&& pwdinfo->driver_interface != DRIVER_CFG80211
 	) {
 		#ifdef CONFIG_CONCURRENT_MODE
+		u8 union_ch = 0;
+
 		if (rtw_mi_check_status(padapter, MI_LINKED))
 			union_ch = rtw_mi_get_union_chan(padapter);
 
@@ -5190,6 +5191,14 @@ void init_wifidirect_info(_adapter *padapter, enum P2P_ROLE role)
 	pwdinfo->p2p_info.scan_op_ch_only = 0;
 }
 
+void _rtw_p2p_set_role(struct wifidirect_info *wdinfo, enum P2P_ROLE role)
+{
+	if (wdinfo->role != role) {
+		wdinfo->role = role;
+		rtw_mi_update_iface_status(&(wdinfo->padapter->mlmepriv), 0);
+	}
+}
+
 #ifdef CONFIG_DBG_P2P
 
 /**
@@ -5338,9 +5347,6 @@ int rtw_p2p_enable(_adapter *padapter, enum P2P_ROLE role)
 	struct wifidirect_info *pwdinfo = &(padapter->wdinfo);
 
 	if (role == P2P_ROLE_DEVICE || role == P2P_ROLE_CLIENT || role == P2P_ROLE_GO) {
-		u8 channel, ch_offset;
-		u16 bwmode;
-
 #if defined(CONFIG_CONCURRENT_MODE) && (!defined(RTW_P2P_GROUP_INTERFACE) || !RTW_P2P_GROUP_INTERFACE)
 		/*	Commented by Albert 2011/12/30 */
 		/*	The driver just supports 1 P2P group operation. */
diff --git a/rtl8723DS/core/rtw_pwrctrl.c b/rtl8723DS/core/rtw_pwrctrl.c
index a446ef6..fa66c2a 100755..100644
--- a/rtl8723DS/core/rtw_pwrctrl.c
+++ b/rtl8723DS/core/rtw_pwrctrl.c
@@ -18,13 +18,13 @@
 #include <hal_data.h>
 #include <hal_com_h2c.h>
 
+#ifdef DBG_CHECK_FW_PS_STATE
 int rtw_fw_ps_state(PADAPTER padapter)
 {
 	struct dvobj_priv *psdpriv = padapter->dvobj;
 	struct debug_priv *pdbgpriv = &psdpriv->drv_dbg;
 	int ret = _FAIL, dont_care = 0;
 	u16 fw_ps_state = 0;
-	u32 start_time;
 	struct pwrctrl_priv *pwrpriv = adapter_to_pwrctl(padapter);
 	struct registry_priv  *registry_par = &padapter->registrypriv;
 
@@ -40,6 +40,15 @@ int rtw_fw_ps_state(PADAPTER padapter)
 			 , rtw_is_drv_stopped(padapter) ? "True" : "False");
 		goto exit_fw_ps_state;
 	}
+	#if defined(CONFIG_RTL8822B) || defined(CONFIG_RTL8821C) || defined(CONFIG_RTL8822C)
+	rtw_hal_get_hwreg(padapter, HW_VAR_FW_PS_STATE, (u8 *)&fw_ps_state);
+	if ((fw_ps_state & BIT_LPS_STATUS) == 0)
+		ret = _SUCCESS;
+	else {
+		pdbgpriv->dbg_poll_fail_cnt++;
+		RTW_INFO("%s: fw_ps_state=%04x\n", __FUNCTION__, fw_ps_state);
+	}
+	#else
 	rtw_hal_set_hwreg(padapter, HW_VAR_SET_REQ_FW_PS, (u8 *)&dont_care);
 	{
 		/* 4. if 0x88[7]=1, driver set cmd to leave LPS/IPS. */
@@ -58,13 +67,13 @@ int rtw_fw_ps_state(PADAPTER padapter)
 			RTW_INFO("%s: fw_ps_state=%04x\n", __FUNCTION__, fw_ps_state);
 		}
 	}
-
+	#endif
 
 exit_fw_ps_state:
 	_exit_pwrlock(&pwrpriv->check_32k_lock);
 	return ret;
 }
-
+#endif /*DBG_CHECK_FW_PS_STATE*/
 #ifdef CONFIG_IPS
 void _ips_enter(_adapter *padapter)
 {
@@ -144,8 +153,10 @@ int _ips_leave(_adapter *padapter)
 int ips_leave(_adapter *padapter)
 {
 	struct pwrctrl_priv *pwrpriv = adapter_to_pwrctl(padapter);
+#ifdef DBG_CHECK_FW_PS_STATE
 	struct dvobj_priv *psdpriv = padapter->dvobj;
 	struct debug_priv *pdbgpriv = &psdpriv->drv_dbg;
+#endif
 	int ret;
 
 	if (!is_primary_adapter(padapter))
@@ -192,9 +203,6 @@ bool rtw_pwr_unassociated_idle(_adapter *adapter)
 	struct mlme_priv *pmlmepriv;
 #ifdef CONFIG_P2P
 	struct wifidirect_info	*pwdinfo;
-#ifdef CONFIG_IOCTL_CFG80211
-	struct cfg80211_wifidirect_info *pcfg80211_wdinfo;
-#endif
 #endif
 
 	bool ret = _FALSE;
@@ -204,7 +212,7 @@ bool rtw_pwr_unassociated_idle(_adapter *adapter)
 		goto exit;
 	}
 
-	if (time_after(adapter_to_pwrctl(adapter)->ips_deny_time, rtw_get_current_time())) {
+	if (rtw_time_after(adapter_to_pwrctl(adapter)->ips_deny_time, rtw_get_current_time())) {
 		/* RTW_INFO("%s ips_deny_time\n", __func__); */
 		goto exit;
 	}
@@ -215,9 +223,6 @@ bool rtw_pwr_unassociated_idle(_adapter *adapter)
 			pmlmepriv = &(iface->mlmepriv);
 #ifdef CONFIG_P2P
 			pwdinfo = &(iface->wdinfo);
-#ifdef CONFIG_IOCTL_CFG80211
-			pcfg80211_wdinfo = &iface->cfg80211_wdinfo;
-#endif
 #endif
 			if (check_fwstate(pmlmepriv, WIFI_ASOC_STATE | WIFI_SITE_MONITOR)
 				|| check_fwstate(pmlmepriv, WIFI_UNDER_LINKING | WIFI_UNDER_WPS)
@@ -226,13 +231,12 @@ bool rtw_pwr_unassociated_idle(_adapter *adapter)
 				|| check_fwstate(pmlmepriv, WIFI_ADHOC_MASTER_STATE | WIFI_ADHOC_STATE)
 				#if defined(CONFIG_P2P) && defined(CONFIG_IOCTL_CFG80211)
 				|| rtw_cfg80211_get_is_roch(iface) == _TRUE
+				|| (rtw_cfg80211_is_ro_ch_once(adapter)
+					&& rtw_cfg80211_get_last_ro_ch_passing_ms(adapter) < 3000)
 				#elif defined(CONFIG_P2P)
 				|| rtw_p2p_chk_state(pwdinfo, P2P_STATE_IDLE)
 				|| rtw_p2p_chk_state(pwdinfo, P2P_STATE_LISTEN)
 				#endif
-				#if defined(CONFIG_P2P) && defined(CONFIG_IOCTL_CFG80211)
-				|| rtw_get_passing_time_ms(pcfg80211_wdinfo->last_ro_ch_time) < 3000
-				#endif
 			)
 				goto exit;
 
@@ -270,9 +274,6 @@ exit:
  */
 void rtw_ps_processor(_adapter *padapter)
 {
-#ifdef CONFIG_P2P
-	struct wifidirect_info	*pwdinfo = &(padapter->wdinfo);
-#endif /* CONFIG_P2P */
 	struct pwrctrl_priv *pwrpriv = adapter_to_pwrctl(padapter);
 	struct mlme_priv *pmlmepriv = &(padapter->mlmepriv);
 	struct dvobj_priv *psdpriv = padapter->dvobj;
@@ -405,9 +406,69 @@ void pwr_state_check_handler(void *ctx)
 }
 
 #ifdef CONFIG_LPS
+#ifdef CONFIG_CHECK_LEAVE_LPS
+#ifdef CONFIG_LPS_CHK_BY_TP
+void traffic_check_for_leave_lps_by_tp(PADAPTER padapter, u8 tx, struct sta_info *sta)
+{
+	struct stainfo_stats *pstats = &sta->sta_stats;
+	u64 cur_acc_tx_bytes = 0, cur_acc_rx_bytes = 0;
+	u32 tx_tp_kbyte = 0, rx_tp_kbyte = 0;
+	u32 tx_tp_th = 0, rx_tp_th = 0;
+	struct pwrctrl_priv *pwrpriv = adapter_to_pwrctl(padapter);
+	u8	leave_lps = _FALSE;
+
+	if (tx) { /* from tx */
+		cur_acc_tx_bytes = pstats->tx_bytes - pstats->acc_tx_bytes;
+		tx_tp_kbyte = cur_acc_tx_bytes >> 10;
+		tx_tp_th = pwrpriv->lps_tx_tp_th * 1024 / 8 * 2; /*KBytes @2s*/
+
+		if (tx_tp_kbyte >= tx_tp_th ||
+			padapter->mlmepriv.LinkDetectInfo.NumTxOkInPeriod >= pwrpriv->lps_tx_pkts){
+			if (pwrpriv->bLeisurePs
+				&& (pwrpriv->pwr_mode != PS_MODE_ACTIVE)
+				#ifdef CONFIG_BT_COEXIST
+				&& (rtw_btcoex_IsBtControlLps(padapter) == _FALSE)
+				#endif
+			) {
+				leave_lps = _TRUE;
+			}
+		}
+
+	} else { /* from rx path */
+		cur_acc_rx_bytes = pstats->rx_bytes - pstats->acc_rx_bytes;
+		rx_tp_kbyte = cur_acc_rx_bytes >> 10;
+		rx_tp_th = pwrpriv->lps_rx_tp_th * 1024 / 8 * 2;
+
+		if (rx_tp_kbyte>= rx_tp_th ||
+			padapter->mlmepriv.LinkDetectInfo.NumRxUnicastOkInPeriod >= pwrpriv->lps_rx_pkts) {
+			if (pwrpriv->bLeisurePs
+				&& (pwrpriv->pwr_mode != PS_MODE_ACTIVE)
+				#ifdef CONFIG_BT_COEXIST
+				&& (rtw_btcoex_IsBtControlLps(padapter) == _FALSE)
+				#endif
+			) {
+				leave_lps = _TRUE;
+			}
+		}
+	}
+
+	if (leave_lps) {
+		#ifdef DBG_LPS_CHK_BY_TP
+		RTW_INFO("leave lps via %s, ", tx ? "Tx" : "Rx");
+		if (tx)
+			RTW_INFO("Tx = %d [%d] (KB)\n", tx_tp_kbyte, tx_tp_th);
+		else
+			RTW_INFO("Rx = %d [%d] (KB)\n", rx_tp_kbyte, rx_tp_th);
+		#endif
+		pwrpriv->lps_chk_cnt = pwrpriv->lps_chk_cnt_th;
+		/* rtw_lps_ctrl_wk_cmd(padapter, LPS_CTRL_LEAVE, 1); */
+		rtw_lps_ctrl_wk_cmd(padapter, tx ? LPS_CTRL_TX_TRAFFIC_LEAVE : LPS_CTRL_RX_TRAFFIC_LEAVE, 1);
+	}
+}
+#endif /*CONFIG_LPS_CHK_BY_TP*/
+
 void	traffic_check_for_leave_lps(PADAPTER padapter, u8 tx, u32 tx_packets)
 {
-#ifdef CONFIG_CHECK_LEAVE_LPS
 	static systime start_time = 0;
 	static u32 xmit_cnt = 0;
 	u8	bLeaveLPS = _FALSE;
@@ -457,62 +518,76 @@ void	traffic_check_for_leave_lps(PADAPTER padapter, u8 tx, u32 tx_packets)
 		/* rtw_lps_ctrl_wk_cmd(padapter, LPS_CTRL_LEAVE, 1); */
 		rtw_lps_ctrl_wk_cmd(padapter, tx ? LPS_CTRL_TX_TRAFFIC_LEAVE : LPS_CTRL_RX_TRAFFIC_LEAVE, tx ? 0 : 1);
 	}
-#endif /* CONFIG_CHECK_LEAVE_LPS */
 }
+#endif /* CONFIG_CHECK_LEAVE_LPS */
 
 #ifdef CONFIG_LPS_LCLK
-u8 rtw_cpwm_polling(_adapter *adapter, u8 cpwm_orig)
+#define LPS_CPWM_TIMEOUT_MS	10 /*ms*/
+#define LPS_RPWM_RETRY_CNT		3
+
+u8 rtw_cpwm_polling(_adapter *adapter, u8 rpwm, u8 cpwm_orig)
 {
-	u8 result = _FAIL;
-	u8 cpwm_now;
-	u8 poll_cnt = 0;
+	u8 rst = _FAIL;
+	u8 cpwm_now = 0;
 	systime start_time;
 	struct pwrctrl_priv *pwrpriv = adapter_to_pwrctl(adapter);
+	#ifdef DBG_CHECK_FW_PS_STATE
 	struct debug_priv *pdbgpriv = &(adapter_to_dvobj(adapter)->drv_dbg);
+	#endif
 
-	/*RTW_INFO("%s.....\n", __func__);*/
-
-	start_time = rtw_get_current_time();
+	pwrpriv->rpwm_retry = 0;
 
-	/* polling cpwm */
 	do {
-		rtw_msleep_os(1);
-		poll_cnt++;
-		cpwm_now = 0;
-		rtw_hal_get_hwreg(adapter, HW_VAR_CPWM, &cpwm_now);
-
-		if ((cpwm_orig ^ cpwm_now) & 0x80) {
-			pwrpriv->cpwm = PS_STATE_S4;
-			pwrpriv->cpwm_tog = cpwm_now & PS_TOGGLE;
-			#ifdef DBG_CHECK_FW_PS_STATE
-			RTW_INFO("%s: polling cpwm OK! poll_cnt=%d, cpwm_orig=%02x, cpwm_now=%02x , 0x100=0x%x\n"
-				, __func__, poll_cnt, cpwm_orig, cpwm_now, rtw_read8(adapter, REG_CR));
-			if (rtw_fw_ps_state(adapter) == _FAIL) {
-				RTW_INFO("leave 32k but fw state in 32k\n");
-				pdbgpriv->dbg_rpwm_toogle_cnt++;
-			}
-			#endif /* DBG_CHECK_FW_PS_STATE */
-			result = _SUCCESS;
-			break;
-		}
+		start_time = rtw_get_current_time();
+		do {
+			rtw_msleep_os(1);
+			rtw_hal_get_hwreg(adapter, HW_VAR_CPWM, &cpwm_now);
 
-		if (rtw_get_passing_time_ms(start_time) > LPS_RPWM_WAIT_MS) {
-			RTW_ERR("%s: polling cpwm timeout! poll_cnt=%d, cpwm_orig=%02x, cpwm_now=%02x\n"
-				, __func__, poll_cnt, cpwm_orig, cpwm_now);
-			#ifdef DBG_CHECK_FW_PS_STATE
-			if (rtw_fw_ps_state(adapter) == _FAIL) {
-				RTW_INFO("rpwm timeout and fw ps state in 32k\n");
-				pdbgpriv->dbg_rpwm_timeout_fail_cnt++;
+			if ((cpwm_orig ^ cpwm_now) & 0x80) {
+				pwrpriv->cpwm = PS_STATE_S4;
+				pwrpriv->cpwm_tog = cpwm_now & PS_TOGGLE;
+				rst = _SUCCESS;
+				break;
 			}
-			#endif /* DBG_CHECK_FW_PS_STATE */
+		} while (rtw_get_passing_time_ms(start_time) < LPS_CPWM_TIMEOUT_MS && !RTW_CANNOT_RUN(adapter));
 
-			#ifdef CONFIG_LPS_RPWM_TIMER
-			_set_timer(&pwrpriv->pwr_rpwm_timer, 1);
-			#endif /* CONFIG_LPS_RPWM_TIMER */
+		if (rst == _SUCCESS)
 			break;
+		else {
+			/* rpwm retry */
+			cpwm_orig = cpwm_now;
+			rpwm &= ~PS_TOGGLE;
+			rpwm |= pwrpriv->tog;
+			rtw_hal_set_hwreg(adapter, HW_VAR_SET_RPWM, (u8 *)(&rpwm));
+			pwrpriv->tog += 0x80;
 		}
-	} while (1);
-	return result;
+	} while (pwrpriv->rpwm_retry++ < LPS_RPWM_RETRY_CNT && !RTW_CANNOT_RUN(adapter));
+
+	if (rst == _SUCCESS) {
+		#ifdef DBG_CHECK_FW_PS_STATE
+		RTW_INFO("%s: polling cpwm OK! rpwm_retry=%d, cpwm_orig=%02x, cpwm_now=%02x , 0x100=0x%x\n"
+			, __func__, pwrpriv->rpwm_retry, cpwm_orig, cpwm_now, rtw_read8(adapter, REG_CR));
+		if (rtw_fw_ps_state(adapter) == _FAIL) {
+			RTW_INFO("leave 32k but fw state in 32k\n");
+			pdbgpriv->dbg_rpwm_toogle_cnt++;
+		}
+		#endif /* DBG_CHECK_FW_PS_STATE */
+	} else {
+		RTW_ERR("%s: polling cpwm timeout! rpwm_retry=%d, cpwm_orig=%02x, cpwm_now=%02x\n"
+				, __func__, pwrpriv->rpwm_retry, cpwm_orig, cpwm_now);
+		#ifdef DBG_CHECK_FW_PS_STATE
+		if (rtw_fw_ps_state(adapter) == _FAIL) {
+			RTW_INFO("rpwm timeout and fw ps state in 32k\n");
+			pdbgpriv->dbg_rpwm_timeout_fail_cnt++;
+		}
+		#endif /* DBG_CHECK_FW_PS_STATE */
+
+		#ifdef CONFIG_LPS_RPWM_TIMER
+		_set_timer(&pwrpriv->pwr_rpwm_timer, 1);
+		#endif /* CONFIG_LPS_RPWM_TIMER */
+	}
+
+	return rst;
 }
 #endif
 /*
@@ -524,15 +599,13 @@ u8 rtw_cpwm_polling(_adapter *adapter, u8 cpwm_orig)
  *	pslv			power state level, only could be PS_STATE_S0 ~ PS_STATE_S4
  *
  */
-void rtw_set_rpwm(PADAPTER padapter, u8 pslv)
+u8 rtw_set_rpwm(PADAPTER padapter, u8 pslv)
 {
-	u8	rpwm;
+	u8	rpwm = 0xFF;
 	struct pwrctrl_priv *pwrpriv = adapter_to_pwrctl(padapter);
 #ifdef CONFIG_LPS_LCLK
 	u8 cpwm_orig;
 #endif
-	struct dvobj_priv *psdpriv = padapter->dvobj;
-	struct debug_priv *pdbgpriv = &psdpriv->drv_dbg;
 
 	pslv = PS_STATE(pslv);
 
@@ -548,7 +621,7 @@ void rtw_set_rpwm(PADAPTER padapter, u8 pslv)
 #endif
 			|| (pwrpriv->lps_level == LPS_NORMAL)
 		   ) {
-			return;
+			return rpwm;
 		}
 	}
 
@@ -557,12 +630,12 @@ void rtw_set_rpwm(PADAPTER padapter, u8 pslv)
 
 		pwrpriv->cpwm = PS_STATE_S4;
 
-		return;
+		return rpwm;
 	}
 
 	if (rtw_is_drv_stopped(padapter))
 		if (pslv < PS_STATE_S2)
-			return;
+			return rpwm;
 
 	rpwm = pslv | pwrpriv->tog;
 #ifdef CONFIG_LPS_LCLK
@@ -580,9 +653,16 @@ void rtw_set_rpwm(PADAPTER padapter, u8 pslv)
 #endif
 
 #if defined(CONFIG_LPS_RPWM_TIMER) && !defined(CONFIG_DETECT_CPWM_BY_POLLING)
-	if (rpwm & PS_ACK)
-		_set_timer(&pwrpriv->pwr_rpwm_timer, LPS_RPWM_WAIT_MS);
+	if (rpwm & PS_ACK) {
+		#if defined(CONFIG_WOWLAN) || defined(CONFIG_AP_WOWLAN) || defined(CONFIG_P2P_WOWLAN)
+		if (pwrpriv->wowlan_mode != _TRUE &&
+			pwrpriv->wowlan_ap_mode != _TRUE &&
+			pwrpriv->wowlan_p2p_mode != _TRUE)
+		#endif
+		_set_timer(&pwrpriv->pwr_rpwm_timer, LPS_CPWM_TIMEOUT_MS);
+	}
 #endif /* CONFIG_LPS_RPWM_TIMER & !CONFIG_DETECT_CPWM_BY_POLLING */
+
 	rtw_hal_set_hwreg(padapter, HW_VAR_SET_RPWM, (u8 *)(&rpwm));
 
 	pwrpriv->tog += 0x80;
@@ -590,14 +670,14 @@ void rtw_set_rpwm(PADAPTER padapter, u8 pslv)
 #ifdef CONFIG_LPS_LCLK
 	/* No LPS 32K, No Ack */
 	if (rpwm & PS_ACK) {
-#ifdef CONFIG_DETECT_CPWM_BY_POLLING
-		rtw_cpwm_polling(padapter, cpwm_orig);
+		#ifdef CONFIG_DETECT_CPWM_BY_POLLING
+		rtw_cpwm_polling(padapter, rpwm, cpwm_orig);
 		#else
 		#if defined(CONFIG_WOWLAN) || defined(CONFIG_AP_WOWLAN) || defined(CONFIG_P2P_WOWLAN)
 		if (pwrpriv->wowlan_mode == _TRUE ||
 			pwrpriv->wowlan_ap_mode == _TRUE ||
 			pwrpriv->wowlan_p2p_mode == _TRUE)
-				rtw_cpwm_polling(padapter, cpwm_orig);
+				rtw_cpwm_polling(padapter, rpwm, cpwm_orig);
 		#endif /*#if defined(CONFIG_WOWLAN) || defined(CONFIG_AP_WOWLAN) || defined(CONFIG_P2P_WOWLAN)*/
 		#endif /*#ifdef CONFIG_DETECT_CPWM_BY_POLLING*/
 	} else
@@ -606,6 +686,7 @@ void rtw_set_rpwm(PADAPTER padapter, u8 pslv)
 		pwrpriv->cpwm = pslv;
 	}
 
+	return rpwm;
 }
 
 u8 PS_RDY_CHECK(_adapter *padapter)
@@ -613,12 +694,6 @@ u8 PS_RDY_CHECK(_adapter *padapter)
 	u32 delta_ms;
 	struct pwrctrl_priv	*pwrpriv = adapter_to_pwrctl(padapter);
 	struct mlme_priv	*pmlmepriv = &(padapter->mlmepriv);
-#ifdef CONFIG_P2P
-	struct wifidirect_info *pwdinfo = &(padapter->wdinfo);
-#ifdef CONFIG_IOCTL_CFG80211
-	struct cfg80211_wifidirect_info *pcfg80211_wdinfo = &padapter->cfg80211_wdinfo;
-#endif /* CONFIG_IOCTL_CFG80211 */
-#endif /* CONFIG_P2P */
 
 #if defined(CONFIG_WOWLAN) || defined(CONFIG_AP_WOWLAN)
 	if (_TRUE == pwrpriv->bInSuspend && pwrpriv->wowlan_mode)
@@ -649,6 +724,9 @@ u8 PS_RDY_CHECK(_adapter *padapter)
 		/* TDLS link is established. */
 		|| (padapter->tdlsinfo.link_established == _TRUE)
 		#endif /* CONFIG_TDLS		 */
+		#ifdef CONFIG_DFS_MASTER
+		|| adapter_to_rfctl(padapter)->radar_detect_enabled
+		#endif
 	)
 		return _FALSE;
 
@@ -784,9 +862,14 @@ void rtw_set_fw_in_ips_mode(PADAPTER padapter, u8 enable)
 void rtw_set_ps_mode(PADAPTER padapter, u8 ps_mode, u8 smart_ps, u8 bcn_ant_mode, const char *msg)
 {
 	struct pwrctrl_priv *pwrpriv = adapter_to_pwrctl(padapter);
+	struct mlme_priv	*pmlmepriv = &(padapter->mlmepriv);
+#if defined(CONFIG_WOWLAN) || defined(CONFIG_AP_WOWLAN) || defined(CONFIG_P2P_WOWLAN)
 	struct dvobj_priv *psdpriv = padapter->dvobj;
 	struct debug_priv *pdbgpriv = &psdpriv->drv_dbg;
+#endif
+#ifdef CONFIG_WMMPS_STA	
 	struct registry_priv *pregistrypriv = &padapter->registrypriv;
+#endif
 #ifdef CONFIG_P2P
 	struct wifidirect_info	*pwdinfo = &(padapter->wdinfo);
 #endif /* CONFIG_P2P */
@@ -914,11 +997,18 @@ void rtw_set_ps_mode(PADAPTER padapter, u8 ps_mode, u8 smart_ps, u8 bcn_ant_mode
 				rtw_hal_set_hwreg(padapter, HW_VAR_LPS_PG_HANDLE, (u8 *)(&lps_pg_hdl_id));
 			}
 #endif
+#ifdef CONFIG_WOWLAN
+			if (pwrpriv->wowlan_mode == _TRUE)
+				rtw_hal_set_hwreg(padapter, HW_VAR_H2C_INACTIVE_IPS, (u8 *)(&ps_mode));
+#endif /* CONFIG_WOWLAN */
+
 			rtw_hal_set_hwreg(padapter, HW_VAR_H2C_FW_PWRMODE, (u8 *)(&ps_mode));
+			rtw_hal_set_hwreg(padapter, HW_VAR_LPS_STATE_CHK, (u8 *)(&ps_mode));
+
 
 #ifdef CONFIG_LPS_PG
 			if (pwrpriv->lps_level == LPS_PG) {
-				lps_pg_hdl_id = LPS_PG_RESEND_H2C;
+				lps_pg_hdl_id = LPS_PG_PHYDM_EN;
 				rtw_hal_set_hwreg(padapter, HW_VAR_LPS_PG_HANDLE, (u8 *)(&lps_pg_hdl_id));
 			}
 #endif
@@ -943,6 +1033,9 @@ void rtw_set_ps_mode(PADAPTER padapter, u8 ps_mode, u8 smart_ps, u8 bcn_ant_mode
 #ifdef CONFIG_P2P_WOWLAN
 		    || (_TRUE == pwrpriv->wowlan_p2p_mode)
 #endif /* CONFIG_P2P_WOWLAN */
+#ifdef CONFIG_WOWLAN
+			|| WOWLAN_IS_STA_MIX_MODE(padapter)
+#endif /* CONFIG_WOWLAN */
 		   ) {
 			u8 pslv;
 
@@ -981,12 +1074,24 @@ void rtw_set_ps_mode(PADAPTER padapter, u8 ps_mode, u8 smart_ps, u8 bcn_ant_mode
 			pwrpriv->pwr_mode = ps_mode;
 			pwrpriv->smart_ps = smart_ps;
 			pwrpriv->bcn_ant_mode = bcn_ant_mode;
+#ifdef CONFIG_LPS_PG
+			if (pwrpriv->lps_level == LPS_PG) {
+				lps_pg_hdl_id = LPS_PG_PHYDM_DIS;
+				rtw_hal_set_hwreg(padapter, HW_VAR_LPS_PG_HANDLE, (u8 *)(&lps_pg_hdl_id));
+			}
+#endif
 
 #ifdef CONFIG_WMMPS_STA	
 			pwrpriv->wmm_smart_ps = pregistrypriv->wmm_smart_ps;
 #endif /* CONFIG_WMMPS_STA */
 			
-			rtw_hal_set_hwreg(padapter, HW_VAR_H2C_FW_PWRMODE, (u8 *)(&ps_mode));
+			
+			if (check_fwstate(pmlmepriv, _FW_LINKED))
+				rtw_hal_set_hwreg(padapter, HW_VAR_H2C_FW_PWRMODE, (u8 *)(&ps_mode));
+#ifdef CONFIG_WOWLAN
+			if (pwrpriv->wowlan_mode == _TRUE)
+				rtw_hal_set_hwreg(padapter, HW_VAR_H2C_INACTIVE_IPS, (u8 *)(&ps_mode));
+#endif /* CONFIG_WOWLAN */
 
 #ifdef CONFIG_P2P_PS
 			/* Set CTWindow after LPS */
@@ -1023,42 +1128,6 @@ void rtw_set_ps_mode(PADAPTER padapter, u8 ps_mode, u8 smart_ps, u8 bcn_ant_mode
 }
 
 /*
- * Return:
- *	0:	Leave OK
- *	-1:	Timeout
- *	-2:	Other error
- */
-s32 LPS_RF_ON_check(PADAPTER padapter, u32 delay_ms)
-{
-	systime start_time;
-	u8 bAwake = _FALSE;
-	s32 err = 0;
-
-
-	start_time = rtw_get_current_time();
-	while (1) {
-		rtw_hal_get_hwreg(padapter, HW_VAR_FWLPS_RF_ON, &bAwake);
-		if (_TRUE == bAwake)
-			break;
-
-		if (rtw_is_surprise_removed(padapter)) {
-			err = -2;
-			RTW_INFO("%s: device surprise removed!!\n", __FUNCTION__);
-			break;
-		}
-
-		if (rtw_get_passing_time_ms(start_time) > delay_ms) {
-			err = -1;
-			RTW_INFO("%s: Wait for FW LPS leave more than %u ms!!!\n", __FUNCTION__, delay_ms);
-			break;
-		}
-		rtw_usleep_os(100);
-	}
-
-	return err;
-}
-
-/*
  *	Description:
  *		Enter the leisure power save mode.
  *   */
@@ -1066,11 +1135,11 @@ void LPS_Enter(PADAPTER padapter, const char *msg)
 {
 	struct dvobj_priv *dvobj = adapter_to_dvobj(padapter);
 	struct pwrctrl_priv	*pwrpriv = dvobj_to_pwrctl(dvobj);
-	struct mlme_priv	*pmlmepriv = &(padapter->mlmepriv);
-	int n_assoc_iface = 0;
 	int i;
 	char buf[32] = {0};
-
+#ifdef DBG_LA_MODE
+	struct registry_priv *registry_par = &(padapter->registrypriv);
+#endif
 
 	/*	RTW_INFO("+LeisurePSEnter\n"); */
 	if (GET_HAL_DATA(padapter)->bFWReady == _FALSE)
@@ -1081,12 +1150,14 @@ void LPS_Enter(PADAPTER padapter, const char *msg)
 		return;
 #endif
 
-	/* Skip lps enter request if number of assocated adapters is not 1 */
-	for (i = 0; i < dvobj->iface_nums; i++) {
-		if (check_fwstate(&(dvobj->padapters[i]->mlmepriv), WIFI_ASOC_STATE))
-			n_assoc_iface++;
+#ifdef DBG_LA_MODE
+	if(registry_par->la_mode_en == 1) {
+		RTW_INFO("%s LA debug mode lps_leave \n", __func__);
+		return;
 	}
-	if (n_assoc_iface != 1)
+#endif
+	/* Skip lps enter request if number of assocated adapters is not 1 */
+	if (rtw_mi_get_assoc_if_num(padapter) != 1)
 		return;
 
 #ifndef CONFIG_FW_MULTI_PORT_SUPPORT
@@ -1100,6 +1171,14 @@ void LPS_Enter(PADAPTER padapter, const char *msg)
 			return;
 	}
 
+#ifdef CONFIG_CLIENT_PORT_CFG
+	if ((rtw_hal_get_port(padapter) == CLT_PORT_INVALID) ||
+		get_clt_num(padapter) > MAX_CLIENT_PORT_NUM){
+		RTW_ERR(ADPT_FMT" cannot get client port or clt num(%d) over than 4\n", ADPT_ARG(padapter), get_clt_num(padapter));
+		return;
+	}
+#endif
+
 #ifdef CONFIG_P2P_PS
 	if (padapter->wdinfo.p2p_ps_mode == P2P_PS_NOA) {
 		return;/* supporting p2p client ps NOA via H2C_8723B_P2P_PS_OFFLOAD */
@@ -1143,10 +1222,10 @@ void LPS_Leave(PADAPTER padapter, const char *msg)
 
 	struct dvobj_priv *dvobj = adapter_to_dvobj(padapter);
 	struct pwrctrl_priv	*pwrpriv = dvobj_to_pwrctl(dvobj);
-	u32 start_time;
-	u8 bAwake = _FALSE;
 	char buf[32] = {0};
+#ifdef DBG_CHECK_FW_PS_STATE
 	struct debug_priv *pdbgpriv = &dvobj->drv_dbg;
+#endif
 
 
 	/*	RTW_INFO("+LeisurePSLeave\n"); */
@@ -1170,9 +1249,6 @@ void LPS_Leave(PADAPTER padapter, const char *msg)
 #ifdef CONFIG_RTW_CFGVEDNOR_LLSTATS	
 			pwrpriv->pwr_saving_time += rtw_get_passing_time_ms(pwrpriv->pwr_saving_start_time);
 #endif /* CONFIG_RTW_CFGVEDNOR_LLSTATS */
-
-			if (pwrpriv->pwr_mode == PS_MODE_ACTIVE)
-				LPS_RF_ON_check(padapter, LPS_LEAVE_TIMEOUT_MS);
 		}
 	}
 
@@ -1205,15 +1281,13 @@ void rtw_wow_lps_level_decide(_adapter *adapter, u8 wow_en)
 void LeaveAllPowerSaveModeDirect(PADAPTER Adapter)
 {
 	PADAPTER pri_padapter = GET_PRIMARY_ADAPTER(Adapter);
-	struct mlme_priv	*pmlmepriv = &(Adapter->mlmepriv);
 	struct pwrctrl_priv *pwrpriv = adapter_to_pwrctl(Adapter);
-	struct dvobj_priv *psdpriv = Adapter->dvobj;
-	struct debug_priv *pdbgpriv = &psdpriv->drv_dbg;
+#ifdef CONFIG_LPS_LCLK
 #ifndef CONFIG_DETECT_CPWM_BY_POLLING
-	u8 cpwm_orig, cpwm_now;
-	systime start_time;
+	u8 cpwm_orig;
 #endif /* CONFIG_DETECT_CPWM_BY_POLLING */
-
+	u8 rpwm;
+#endif
 
 	RTW_INFO("%s.....\n", __FUNCTION__);
 
@@ -1236,46 +1310,15 @@ void LeaveAllPowerSaveModeDirect(PADAPTER Adapter)
 		cpwm_orig = 0;
 		rtw_hal_get_hwreg(Adapter, HW_VAR_CPWM, &cpwm_orig);
 #endif /* CONFIG_DETECT_CPWM_BY_POLLING */
-		rtw_set_rpwm(Adapter, PS_STATE_S4);
+		rpwm = rtw_set_rpwm(Adapter, PS_STATE_S4);
 
 #ifndef CONFIG_DETECT_CPWM_BY_POLLING
-
-		start_time = rtw_get_current_time();
-
-		/* polling cpwm */
-		do {
-			rtw_mdelay_os(1);
-
-			rtw_hal_get_hwreg(Adapter, HW_VAR_CPWM, &cpwm_now);
-			if ((cpwm_orig ^ cpwm_now) & 0x80) {
-				pwrpriv->cpwm = PS_STATE_S4;
-				pwrpriv->cpwm_tog = cpwm_now & PS_TOGGLE;
-#ifdef DBG_CHECK_FW_PS_STATE
-				RTW_INFO("%s: polling cpwm OK! cpwm_orig=%02x, cpwm_now=%02x, 0x100=0x%x\n"
-					, __FUNCTION__, cpwm_orig, cpwm_now, rtw_read8(Adapter, REG_CR));
-				if (rtw_fw_ps_state(Adapter) == _FAIL) {
-					RTW_INFO("%s: leave 32k but fw state in 32k\n", __FUNCTION__);
-					pdbgpriv->dbg_rpwm_toogle_cnt++;
-				}
-#endif /* DBG_CHECK_FW_PS_STATE */
-				break;
-			}
-
-			if (rtw_get_passing_time_ms(start_time) > LPS_RPWM_WAIT_MS) {
-				RTW_INFO("%s: polling cpwm timeout! cpwm_orig=%02x, cpwm_now=%02x\n", __FUNCTION__, cpwm_orig, cpwm_now);
-#ifdef DBG_CHECK_FW_PS_STATE
-				if (rtw_fw_ps_state(Adapter) == _FAIL) {
-					RTW_INFO("rpwm timeout and fw ps state in 32k\n");
-					pdbgpriv->dbg_rpwm_timeout_fail_cnt++;
-				}
-#endif /* DBG_CHECK_FW_PS_STATE */
-				break;
-			}
-		} while (1);
+		if (rpwm != 0xFF && rpwm & PS_ACK)
+			rtw_cpwm_polling(Adapter, rpwm, cpwm_orig);
 #endif /* CONFIG_DETECT_CPWM_BY_POLLING */
 
 		_exit_pwrlock(&pwrpriv->lock);
-#endif
+#endif/*CONFIG_LPS_LCLK*/
 
 #ifdef CONFIG_P2P_PS
 		p2p_ps_wk_cmd(pri_padapter, P2P_PS_DISABLE, 0);
@@ -1315,31 +1358,25 @@ void LeaveAllPowerSaveModeDirect(PADAPTER Adapter)
 void LeaveAllPowerSaveMode(IN PADAPTER Adapter)
 {
 	struct dvobj_priv *dvobj = adapter_to_dvobj(Adapter);
-	struct mlme_priv	*pmlmepriv = &(Adapter->mlmepriv);
 	u8	enqueue = 0;
-	int n_assoc_iface = 0;
 	int i;
 
-
-	/* RTW_INFO("%s.....\n",__FUNCTION__); */
-
+	#ifndef CONFIG_NEW_NETDEV_HDL
 	if (_FALSE == Adapter->bup) {
 		RTW_INFO(FUNC_ADPT_FMT ": bup=%d Skip!\n",
 			 FUNC_ADPT_ARG(Adapter), Adapter->bup);
 		return;
 	}
+	#endif
+
+/*	RTW_INFO(FUNC_ADPT_FMT "\n", FUNC_ADPT_ARG(Adapter));*/
 
 	if (rtw_is_surprise_removed(Adapter)) {
 		RTW_INFO(FUNC_ADPT_FMT ": bSurpriseRemoved=_TRUE Skip!\n", FUNC_ADPT_ARG(Adapter));
 		return;
 	}
 
-	for (i = 0; i < dvobj->iface_nums; i++) {
-		if (check_fwstate(&(dvobj->padapters[i]->mlmepriv), WIFI_ASOC_STATE))
-			n_assoc_iface++;
-	}
-
-	if (n_assoc_iface) {
+	if (rtw_mi_get_assoc_if_num(Adapter)) {
 		/* connect */
 #ifdef CONFIG_LPS_LCLK
 		enqueue = 1;
@@ -1420,7 +1457,7 @@ void LPS_Leave_check(
 			break;
 
 		if (rtw_get_passing_time_ms(start_time) > 100) {
-			RTW_INFO("Wait for cpwm event  than 100 ms!!!\n");
+			RTW_ERR("Wait for cpwm event  than 100 ms!!!\n");
 			break;
 		}
 		rtw_msleep_os(1);
@@ -1504,6 +1541,41 @@ static void dma_event_callback(struct work_struct *work)
 }
 
 #ifdef CONFIG_LPS_RPWM_TIMER
+
+#define DBG_CPWM_CHK_FAIL
+#if defined(DBG_CPWM_CHK_FAIL) && (defined(CONFIG_RTL8822B) || defined(CONFIG_RTL8821C))
+#define CPU_EXCEPTION_CODE 0xFAFAFAFA
+static void rtw_cpwm_chk_fail_debug(_adapter *padapter)
+{
+	u32 cpu_state;
+
+	cpu_state = rtw_read32(padapter, 0x10FC);
+
+	RTW_INFO("[PS-DBG] Reg_10FC =0x%08x\n", cpu_state);
+	RTW_INFO("[PS-DBG] Reg_10F8 =0x%08x\n", rtw_read32(padapter, 0x10F8));
+	RTW_INFO("[PS-DBG] Reg_11F8 =0x%08x\n", rtw_read32(padapter, 0x11F8));
+	RTW_INFO("[PS-DBG] Reg_4A4 =0x%08x\n", rtw_read32(padapter, 0x4A4));
+	RTW_INFO("[PS-DBG] Reg_4A8 =0x%08x\n", rtw_read32(padapter, 0x4A8));
+
+	if (cpu_state == CPU_EXCEPTION_CODE) {
+		RTW_INFO("[PS-DBG] Reg_48C =0x%08x\n", rtw_read32(padapter, 0x48C));
+		RTW_INFO("[PS-DBG] Reg_490 =0x%08x\n", rtw_read32(padapter, 0x490));
+		RTW_INFO("[PS-DBG] Reg_494 =0x%08x\n", rtw_read32(padapter, 0x494));
+		RTW_INFO("[PS-DBG] Reg_498 =0x%08x\n", rtw_read32(padapter, 0x498));
+		RTW_INFO("[PS-DBG] Reg_49C =0x%08x\n", rtw_read32(padapter, 0x49C));
+		RTW_INFO("[PS-DBG] Reg_4A0 =0x%08x\n", rtw_read32(padapter, 0x4A0));
+		RTW_INFO("[PS-DBG] Reg_1BC =0x%08x\n", rtw_read32(padapter, 0x1BC));
+
+		RTW_INFO("[PS-DBG] Reg_008 =0x%08x\n", rtw_read32(padapter, 0x08));
+		RTW_INFO("[PS-DBG] Reg_2F0 =0x%08x\n", rtw_read32(padapter, 0x2F0));
+		RTW_INFO("[PS-DBG] Reg_2F4 =0x%08x\n", rtw_read32(padapter, 0x2F4));
+		RTW_INFO("[PS-DBG] Reg_2F8 =0x%08x\n", rtw_read32(padapter, 0x2F8));
+		RTW_INFO("[PS-DBG] Reg_2FC =0x%08x\n", rtw_read32(padapter, 0x2FC));
+
+		rtw_dump_fifo(RTW_DBGDUMP, padapter, 5, 0, 3072);
+	}
+}
+#endif
 static void rpwmtimeout_workitem_callback(struct work_struct *work)
 {
 	PADAPTER padapter;
@@ -1514,7 +1586,6 @@ static void rpwmtimeout_workitem_callback(struct work_struct *work)
 	pwrpriv = container_of(work, struct pwrctrl_priv, rpwmtimeoutwi);
 	dvobj = pwrctl_to_dvobj(pwrpriv);
 	padapter = dvobj_get_primary_adapter(dvobj);
-	/*	RTW_INFO("+%s: rpwm=0x%02X cpwm=0x%02X\n", __func__, pwrpriv->rpwm, pwrpriv->cpwm); */
 
 	if (!padapter)
 		return;
@@ -1527,8 +1598,25 @@ static void rpwmtimeout_workitem_callback(struct work_struct *work)
 		RTW_INFO("%s: rpwm=0x%02X cpwm=0x%02X CPWM done!\n", __func__, pwrpriv->rpwm, pwrpriv->cpwm);
 		goto exit;
 	}
+
+	if (pwrpriv->rpwm_retry++ < LPS_RPWM_RETRY_CNT) {
+		u8 rpwm = (pwrpriv->rpwm | pwrpriv->tog | PS_ACK);
+
+		rtw_hal_set_hwreg(padapter, HW_VAR_SET_RPWM, (u8 *)(&rpwm));
+
+		pwrpriv->tog += 0x80;
+		_set_timer(&pwrpriv->pwr_rpwm_timer, LPS_CPWM_TIMEOUT_MS);
+		goto exit;
+	}
+
+	pwrpriv->rpwm_retry = 0;
 	_exit_pwrlock(&pwrpriv->lock);
 
+#if defined(DBG_CPWM_CHK_FAIL) && (defined(CONFIG_RTL8822B) || defined(CONFIG_RTL8821C))
+	RTW_INFO("+%s: rpwm=0x%02X cpwm=0x%02X\n", __func__, pwrpriv->rpwm, pwrpriv->cpwm);
+	rtw_cpwm_chk_fail_debug(padapter);
+#endif
+
 	if (rtw_read8(padapter, 0x100) != 0xEA) {
 #if 1
 		struct reportpwrstate_parm report;
@@ -2009,12 +2097,15 @@ void rtw_unregister_evt_alive(PADAPTER padapter)
 void rtw_init_pwrctrl_priv(PADAPTER padapter)
 {
 	struct pwrctrl_priv *pwrctrlpriv = adapter_to_pwrctl(padapter);
+#ifdef CONFIG_WOWLAN
 	struct registry_priv  *registry_par = &padapter->registrypriv;
-
+#endif
+#ifdef CONFIG_GPIO_WAKEUP
 	u8 val8 = 0;
+#endif
 
 #if defined(CONFIG_CONCURRENT_MODE)
-	if (padapter->adapter_type != PRIMARY_ADAPTER)
+	if (!is_primary_adapter(padapter))
 		return;
 #endif
 
@@ -2031,6 +2122,15 @@ void rtw_init_pwrctrl_priv(PADAPTER padapter)
 	pwrctrlpriv->lps_enter_cnts = 0;
 	pwrctrlpriv->lps_leave_cnts = 0;
 	pwrctrlpriv->bips_processing = _FALSE;
+#ifdef CONFIG_LPS_CHK_BY_TP
+	pwrctrlpriv->lps_chk_by_tp = padapter->registrypriv.lps_chk_by_tp;
+	pwrctrlpriv->lps_tx_tp_th = LPS_TX_TP_TH;
+	pwrctrlpriv->lps_rx_tp_th = LPS_RX_TP_TH;
+	pwrctrlpriv->lps_bi_tp_th = LPS_BI_TP_TH;
+	pwrctrlpriv->lps_chk_cnt = pwrctrlpriv->lps_chk_cnt_th = LPS_TP_CHK_CNT;
+	pwrctrlpriv->lps_tx_pkts = LPS_CHK_PKTS_TX;
+	pwrctrlpriv->lps_rx_pkts = LPS_CHK_PKTS_RX;
+#endif
 
 	pwrctrlpriv->ips_mode = padapter->registrypriv.ips_mode;
 	pwrctrlpriv->ips_mode_req = padapter->registrypriv.ips_mode;
@@ -2075,6 +2175,7 @@ void rtw_init_pwrctrl_priv(PADAPTER padapter)
 	pwrctrlpriv->dtim = 0;
 
 	pwrctrlpriv->tog = 0x80;
+	pwrctrlpriv->rpwm_retry = 0;
 
 #ifdef CONFIG_LPS_LCLK
 	rtw_hal_set_hwreg(padapter, HW_VAR_SET_RPWM, (u8 *)(&pwrctrlpriv->rpwm));
@@ -2110,8 +2211,12 @@ void rtw_init_pwrctrl_priv(PADAPTER padapter)
 
 #ifdef CONFIG_GPIO_WAKEUP
 	/*default low active*/
-	pwrctrlpriv->is_high_active = HIGH_ACTIVE;
-
+	pwrctrlpriv->is_high_active = HIGH_ACTIVE_DEV2HST;
+	pwrctrlpriv->hst2dev_high_active = HIGH_ACTIVE_HST2DEV;
+#ifdef CONFIG_RTW_ONE_PIN_GPIO
+	rtw_hal_switch_gpio_wl_ctrl(padapter, WAKEUP_GPIO_IDX, _TRUE);
+	rtw_hal_set_input_gpio(padapter, WAKEUP_GPIO_IDX);
+#else
 	#ifdef CONFIG_WAKEUP_GPIO_INPUT_MODE
 	if (pwrctrlpriv->is_high_active == 0)
 		rtw_hal_set_input_gpio(padapter, WAKEUP_GPIO_IDX);
@@ -2119,11 +2224,11 @@ void rtw_init_pwrctrl_priv(PADAPTER padapter)
 		rtw_hal_set_output_gpio(padapter, WAKEUP_GPIO_IDX, 0);
 	#else
 	val8 = (pwrctrlpriv->is_high_active == 0) ? 1 : 0;
-	rtw_hal_switch_gpio_wl_ctrl(padapter, WAKEUP_GPIO_IDX, _TRUE);
 	rtw_hal_set_output_gpio(padapter, WAKEUP_GPIO_IDX, val8);
 	RTW_INFO("%s: set GPIO_%d %d as default.\n",
 		 __func__, WAKEUP_GPIO_IDX, val8);
 	#endif /*CONFIG_WAKEUP_GPIO_INPUT_MODE*/
+#endif /* CONFIG_RTW_ONE_PIN_GPIO */
 #endif /* CONFIG_GPIO_WAKEUP */
 
 #ifdef CONFIG_WOWLAN
@@ -2159,7 +2264,7 @@ void rtw_free_pwrctrl_priv(PADAPTER adapter)
 	struct pwrctrl_priv *pwrctrlpriv = adapter_to_pwrctl(adapter);
 
 #if defined(CONFIG_CONCURRENT_MODE)
-	if (adapter->adapter_type != PRIMARY_ADAPTER)
+	if (!is_primary_adapter(adapter))
 		return;
 #endif
 
@@ -2391,9 +2496,9 @@ int _rtw_pwr_wakeup(_adapter *padapter, u32 ips_deffer_ms, const char *caller)
 	struct pwrctrl_priv *pwrpriv = dvobj_to_pwrctl(dvobj);
 	struct mlme_priv *pmlmepriv;
 	int ret = _SUCCESS;
-	int i;
 	systime start = rtw_get_current_time();
 
+	/*RTW_INFO(FUNC_ADPT_FMT "===>\n", FUNC_ADPT_ARG(padapter));*/
 	/* for LPS */
 	LeaveAllPowerSaveMode(padapter);
 
@@ -2401,7 +2506,7 @@ int _rtw_pwr_wakeup(_adapter *padapter, u32 ips_deffer_ms, const char *caller)
 	padapter = GET_PRIMARY_ADAPTER(padapter);
 	pmlmepriv = &padapter->mlmepriv;
 
-	if (time_after(rtw_get_current_time() + rtw_ms_to_systime(ips_deffer_ms), pwrpriv->ips_deny_time))
+	if (rtw_time_after(rtw_get_current_time() + rtw_ms_to_systime(ips_deffer_ms), pwrpriv->ips_deny_time))
 		pwrpriv->ips_deny_time = rtw_get_current_time() + rtw_ms_to_systime(ips_deffer_ms);
 
 
@@ -2527,8 +2632,9 @@ int _rtw_pwr_wakeup(_adapter *padapter, u32 ips_deffer_ms, const char *caller)
 	}
 
 exit:
-	if (time_after(rtw_get_current_time() + rtw_ms_to_systime(ips_deffer_ms), pwrpriv->ips_deny_time))
+	if (rtw_time_after(rtw_get_current_time() + rtw_ms_to_systime(ips_deffer_ms), pwrpriv->ips_deny_time))
 		pwrpriv->ips_deny_time = rtw_get_current_time() + rtw_ms_to_systime(ips_deffer_ms);
+	/*RTW_INFO(FUNC_ADPT_FMT "<===\n", FUNC_ADPT_ARG(padapter));*/
 	return ret;
 
 }
@@ -2591,8 +2697,6 @@ int rtw_pm_set_ips(_adapter *padapter, u8 mode)
 void rtw_ps_deny(PADAPTER padapter, PS_DENY_REASON reason)
 {
 	struct pwrctrl_priv *pwrpriv;
-	s32 ret;
-
 
 	/* 	RTW_INFO("+" FUNC_ADPT_FMT ": Request PS deny for %d (0x%08X)\n",
 	 *		FUNC_ADPT_ARG(padapter), reason, BIT(reason)); */
@@ -2651,3 +2755,38 @@ u32 rtw_ps_deny_get(PADAPTER padapter)
 
 	return deny;
 }
+
+static void _rtw_ssmps(_adapter *adapter, struct sta_info *sta)
+{
+	struct mlme_ext_priv *pmlmeext = &(adapter->mlmeextpriv);
+	struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info);
+
+	if (MLME_IS_STA(adapter)) {
+		issue_action_SM_PS_wait_ack(adapter , get_my_bssid(&(pmlmeinfo->network)),
+			sta->cmn.sm_ps, 3 , 1);
+	}
+	else if (MLME_IS_AP(adapter)) {
+
+	}
+	rtw_phydm_ra_registed(adapter, sta);
+}
+void rtw_ssmps_enter(_adapter *adapter, struct sta_info *sta)
+{
+	if (sta->cmn.sm_ps == SM_PS_STATIC)
+		return;
+
+	RTW_INFO(ADPT_FMT" STA [" MAC_FMT "]\n", ADPT_ARG(adapter), MAC_ARG(sta->cmn.mac_addr));
+
+	sta->cmn.sm_ps = SM_PS_STATIC;
+	_rtw_ssmps(adapter, sta);
+}
+void rtw_ssmps_leave(_adapter *adapter, struct sta_info *sta)
+{
+	if (sta->cmn.sm_ps == SM_PS_DISABLE)
+		return;
+
+	RTW_INFO(ADPT_FMT" STA [" MAC_FMT "] \n", ADPT_ARG(adapter), MAC_ARG(sta->cmn.mac_addr));
+	sta->cmn.sm_ps = SM_PS_DISABLE;
+	_rtw_ssmps(adapter, sta);
+}
+
diff --git a/rtl8723DS/core/rtw_recv.c b/rtl8723DS/core/rtw_recv.c
index af1dc46..4b6f152 100755
--- a/rtl8723DS/core/rtw_recv.c
+++ b/rtl8723DS/core/rtw_recv.c
@@ -44,6 +44,17 @@ u8 signal_stat_calc_profile[SIGNAL_STAT_CALC_PROFILE_MAX][2] = {
 
 #endif /* CONFIG_NEW_SIGNAL_STAT_PROCESS */
 
+u8 rtw_bridge_tunnel_header[] = { 0xaa, 0xaa, 0x03, 0x00, 0x00, 0xf8 };
+u8 rtw_rfc1042_header[] = { 0xaa, 0xaa, 0x03, 0x00, 0x00, 0x00 };
+static u8 SNAP_ETH_TYPE_IPX[2] = {0x81, 0x37};
+static u8 SNAP_ETH_TYPE_APPLETALK_AARP[2] = {0x80, 0xf3};
+#ifdef CONFIG_TDLS
+static u8 SNAP_ETH_TYPE_TDLS[2] = {0x89, 0x0d};
+#endif
+
+#ifdef CONFIG_CUSTOMER_ALIBABA_GENERAL
+int recv_frame_monitor(_adapter *padapter, union recv_frame *rframe);
+#endif
 void _rtw_init_sta_recv_priv(struct sta_recv_priv *psta_recvpriv)
 {
 
@@ -686,6 +697,13 @@ union recv_frame *decryptor(_adapter *padapter, union recv_frame *precv_frame)
 #endif
 	}
 
+	#ifdef CONFIG_RTW_MESH
+	if (res != _FAIL
+		&& !prxattrib->amsdu
+		&& prxattrib->mesh_ctrl_present)
+		res = rtw_mesh_rx_validate_mctrl_non_amsdu(padapter, precv_frame);
+	#endif
+
 	if (res == _FAIL) {
 		rtw_free_recvframe(return_packet, &padapter->recvpriv.free_recv_queue);
 		return_packet = NULL;
@@ -767,39 +785,6 @@ union recv_frame *portctrl(_adapter *adapter, union recv_frame *precv_frame)
 
 }
 
-sint recv_decache(union recv_frame *precv_frame, u8 bretry)
-{
-	struct sta_info *sta = precv_frame->u.hdr.psta;
-	struct stainfo_rxcache *prxcache = &sta->sta_recvpriv.rxcache;
-
-	sint tid = precv_frame->u.hdr.attrib.priority;
-	u16 seq_ctrl = ((precv_frame->u.hdr.attrib.seq_num & 0xffff) << 4) |
-		       (precv_frame->u.hdr.attrib.frag_num & 0xf);
-
-	if (tid > 15)
-		return _FAIL;
-
-	if (1) { /* if(bretry) */
-		if (seq_ctrl == prxcache->tid_rxseq[tid]) {
-			/* for non-AMPDU case	*/
-			sta->sta_stats.duplicate_cnt++;
-
-			if (sta->sta_stats.duplicate_cnt % 100 == 0)
-				RTW_INFO("%s: tid=%u seq=%d frag=%d\n", __func__
-					, tid, precv_frame->u.hdr.attrib.seq_num
-					, precv_frame->u.hdr.attrib.frag_num);
-
-			return _FAIL;
-		}
-	}
-
-	prxcache->tid_rxseq[tid] = seq_ctrl;
-
-
-	return _SUCCESS;
-
-}
-
 /* VALID_PN_CHK
  * Return true when PN is legal, otherwise false.
  * Legal PN:
@@ -812,12 +797,10 @@ sint recv_decache(union recv_frame *precv_frame, u8 bretry)
 sint recv_ucast_pn_decache(union recv_frame *precv_frame);
 sint recv_ucast_pn_decache(union recv_frame *precv_frame)
 {
-	_adapter *padapter = precv_frame->u.hdr.adapter;
 	struct rx_pkt_attrib *pattrib = &precv_frame->u.hdr.attrib;
 	struct sta_info *sta = precv_frame->u.hdr.psta;
 	struct stainfo_rxcache *prxcache = &sta->sta_recvpriv.rxcache;
 	u8 *pdata = precv_frame->u.hdr.rx_data;
-	u32 data_len = precv_frame->u.hdr.len;
 	sint tid = precv_frame->u.hdr.attrib.priority;
 	u64 tmp_iv_hdr = 0;
 	u64 curr_pn = 0, pkt_pn = 0;
@@ -852,18 +835,17 @@ sint recv_bcast_pn_decache(union recv_frame *precv_frame)
 	struct security_priv *psecuritypriv = &padapter->securitypriv;
 	struct rx_pkt_attrib *pattrib = &precv_frame->u.hdr.attrib;
 	u8 *pdata = precv_frame->u.hdr.rx_data;
-	u32 data_len = precv_frame->u.hdr.len;
 	u64 tmp_iv_hdr = 0;
 	u64 curr_pn = 0, pkt_pn = 0;
 	u8 key_id;
 
 	if ((pattrib->encrypt == _AES_) &&
-		(check_fwstate(pmlmepriv, WIFI_STATION_STATE) == _TRUE)) {		
+		(check_fwstate(pmlmepriv, WIFI_STATION_STATE) == _TRUE)) {
 
 		tmp_iv_hdr = le64_to_cpu(*(u64*)(pdata + pattrib->hdrlen));
 		key_id = CCMPH_2_KEYID(tmp_iv_hdr);
 		pkt_pn = CCMPH_2_PN(tmp_iv_hdr);
-	
+
 		curr_pn = le64_to_cpu(*(u64*)psecuritypriv->iv_seq[key_id]);
 		curr_pn &= 0x0000ffffffffffff;
 
@@ -876,13 +858,66 @@ sint recv_bcast_pn_decache(union recv_frame *precv_frame)
 	return _SUCCESS;
 }
 
+sint recv_decache(union recv_frame *precv_frame)
+{
+	struct sta_info *psta = precv_frame->u.hdr.psta;
+	struct rx_pkt_attrib *pattrib = &precv_frame->u.hdr.attrib;
+	_adapter *adapter = psta->padapter;
+	sint tid = pattrib->priority;
+	u16 seq_ctrl = ((precv_frame->u.hdr.attrib.seq_num & 0xffff) << 4) |
+		       (precv_frame->u.hdr.attrib.frag_num & 0xf);
+	u16 *prxseq;
+
+	if (tid > 15)
+		return _FAIL;
+
+	if (pattrib->qos) {
+		if (IS_MCAST(pattrib->ra))
+			prxseq = &psta->sta_recvpriv.bmc_tid_rxseq[tid];
+		else
+			prxseq = &psta->sta_recvpriv.rxcache.tid_rxseq[tid];
+	} else {
+		if (IS_MCAST(pattrib->ra)) {
+			prxseq = &psta->sta_recvpriv.nonqos_bmc_rxseq;
+			#ifdef DBG_RX_SEQ
+			RTW_INFO("DBG_RX_SEQ "FUNC_ADPT_FMT" nonqos bmc seq_num:%d\n"
+				, FUNC_ADPT_ARG(adapter), pattrib->seq_num);
+			#endif
+
+		} else {
+			prxseq = &psta->sta_recvpriv.nonqos_rxseq;
+			#ifdef DBG_RX_SEQ
+			RTW_INFO("DBG_RX_SEQ "FUNC_ADPT_FMT" nonqos seq_num:%d\n"
+				, FUNC_ADPT_ARG(adapter), pattrib->seq_num);
+			#endif
+		}
+	}
+
+	if (seq_ctrl == *prxseq) {
+		/* for non-AMPDU case	*/
+		psta->sta_stats.duplicate_cnt++;
+
+		if (psta->sta_stats.duplicate_cnt % 100 == 0)
+			RTW_INFO("%s: tid=%u seq=%d frag=%d\n", __func__
+				, tid, precv_frame->u.hdr.attrib.seq_num
+				, precv_frame->u.hdr.attrib.frag_num);
+
+		#ifdef DBG_RX_DROP_FRAME
+		RTW_INFO("DBG_RX_DROP_FRAME "FUNC_ADPT_FMT" recv_decache _FAIL for sta="MAC_FMT"\n"
+			, FUNC_ADPT_ARG(adapter), MAC_ARG(psta->cmn.mac_addr));
+		#endif
+		return _FAIL;
+	}
+	*prxseq = seq_ctrl;
+
+	return _SUCCESS;
+}
+
 void process_pwrbit_data(_adapter *padapter, union recv_frame *precv_frame, struct sta_info *psta)
 {
 #ifdef CONFIG_AP_MODE
 	unsigned char pwrbit;
 	u8 *ptr = precv_frame->u.hdr.rx_data;
-	struct rx_pkt_attrib *pattrib = &precv_frame->u.hdr.attrib;
-	struct sta_priv *pstapriv = &padapter->stapriv;
 
 	pwrbit = GetPwrMgt(ptr);
 
@@ -910,7 +945,6 @@ void process_wmmps_data(_adapter *padapter, union recv_frame *precv_frame, struc
 {
 #ifdef CONFIG_AP_MODE
 	struct rx_pkt_attrib *pattrib = &precv_frame->u.hdr.attrib;
-	struct sta_priv *pstapriv = &padapter->stapriv;
 
 #ifdef CONFIG_TDLS
 	if (!(psta->tdls_sta_state & TDLS_LINKED_STATE)) {
@@ -955,7 +989,7 @@ void process_wmmps_data(_adapter *padapter, union recv_frame *precv_frame, struc
 				xmit_delivery_enabled_frames(padapter, psta);
 			} else {
 				/* issue one qos null frame with More data bit = 0 and the EOSP bit set (=1) */
-				issue_qos_nulldata(padapter, psta->cmn.mac_addr, (u16)pattrib->priority, 0, 0);
+				issue_qos_nulldata(padapter, psta->cmn.mac_addr, (u16)pattrib->priority, 0, 0, 0);
 			}
 		}
 
@@ -1079,7 +1113,6 @@ exit:
 }
 #endif /* CONFIG_TDLS */
 
-void count_rx_stats(_adapter *padapter, union recv_frame *prframe, struct sta_info *sta);
 void count_rx_stats(_adapter *padapter, union recv_frame *prframe, struct sta_info *sta)
 {
 	int	sz;
@@ -1087,8 +1120,6 @@ void count_rx_stats(_adapter *padapter, union recv_frame *prframe, struct sta_in
 	struct stainfo_stats	*pstats = NULL;
 	struct rx_pkt_attrib	*pattrib = &prframe->u.hdr.attrib;
 	struct recv_priv		*precvpriv = &padapter->recvpriv;
-	struct mlme_ext_priv	*pmlmeext = &padapter->mlmeextpriv;
-	struct mlme_ext_info	*pmlmeinfo = &(pmlmeext->mlmext_info);
 
 	sz = get_recvframe_len(prframe);
 	precvpriv->rx_bytes += sz;
@@ -1108,6 +1139,7 @@ void count_rx_stats(_adapter *padapter, union recv_frame *prframe, struct sta_in
 
 		pstats = &psta->sta_stats;
 
+		pstats->last_rx_time = rtw_get_current_time();
 		pstats->rx_data_pkts++;
 		pstats->rx_bytes += sz;
 		if (is_broadcast_mac_addr(pattrib->ra)) {
@@ -1123,11 +1155,22 @@ void count_rx_stats(_adapter *padapter, union recv_frame *prframe, struct sta_in
 			/*record rx packets for every tid*/
 			pstats->rx_data_qos_pkts[pattrib->priority]++;
 		}
+#ifdef CONFIG_DYNAMIC_SOML
+		rtw_dyn_soml_byte_update(padapter, pattrib->data_rate, sz);
+#endif
+#if defined(CONFIG_CHECK_LEAVE_LPS) && defined(CONFIG_LPS_CHK_BY_TP)
+		if (adapter_to_pwrctl(padapter)->lps_chk_by_tp)
+			traffic_check_for_leave_lps_by_tp(padapter, _FALSE, psta);
+#endif /* CONFIG_LPS */
+
 	}
 
 #ifdef CONFIG_CHECK_LEAVE_LPS
-	traffic_check_for_leave_lps(padapter, _FALSE, 0);
-#endif /* CONFIG_LPS */
+#ifdef CONFIG_LPS_CHK_BY_TP
+	if (!adapter_to_pwrctl(padapter)->lps_chk_by_tp)
+#endif
+		traffic_check_for_leave_lps(padapter, _FALSE, 0);
+#endif /* CONFIG_CHECK_LEAVE_LPS */
 
 }
 
@@ -1359,12 +1402,14 @@ sint ap2sta_data_frame(
 			RTW_INFO("DBG_RX_DROP_FRAME "FUNC_ADPT_FMT" BSSID="MAC_FMT", mybssid="MAC_FMT"\n"
 				, FUNC_ADPT_ARG(adapter), MAC_ARG(pattrib->bssid), MAC_ARG(mybssid));
 			#endif
-
-			if (!bmcast) {
+#ifndef CONFIG_CUSTOMER_ALIBABA_GENERAL
+			if (!bmcast
+				&& !IS_RADAR_DETECTED(adapter_to_rfctl(adapter))
+			) {
 				RTW_INFO(ADPT_FMT" -issue_deauth to the nonassociated ap=" MAC_FMT " for the reason(7)\n", ADPT_ARG(adapter), MAC_ARG(pattrib->bssid));
 				issue_deauth(adapter, pattrib->bssid, WLAN_REASON_CLASS3_FRAME_FROM_NONASSOC_STA);
 			}
-
+#endif
 			ret = _FAIL;
 			goto exit;
 		}
@@ -1470,21 +1515,13 @@ sint sta2ap_data_frame(
 
 		*psta = rtw_get_stainfo(pstapriv, pattrib->ta);
 		if (*psta == NULL) {
-			#ifdef CONFIG_DFS_MASTER
-			struct rf_ctl_t *rfctl = adapter_to_rfctl(adapter);
-
-			/* prevent RX tasklet blocks cmd_thread */
-			if (rfctl->radar_detected == 1)
-				goto bypass_deauth7;
-			#endif
-
-			RTW_INFO("issue_deauth to sta=" MAC_FMT " for the reason(7)\n", MAC_ARG(pattrib->src));
-
-			issue_deauth(adapter, pattrib->src, WLAN_REASON_CLASS3_FRAME_FROM_NONASSOC_STA);
-
-#ifdef CONFIG_DFS_MASTER
-bypass_deauth7:
+			if (!IS_RADAR_DETECTED(adapter_to_rfctl(adapter))) {
+#ifndef CONFIG_CUSTOMER_ALIBABA_GENERAL
+				RTW_INFO("issue_deauth to sta=" MAC_FMT " for the reason(7)\n", MAC_ARG(pattrib->src));
+				issue_deauth(adapter, pattrib->src, WLAN_REASON_CLASS3_FRAME_FROM_NONASSOC_STA);
 #endif
+			}
+
 			ret = RTW_RX_HANDLED;
 			goto exit;
 		}
@@ -1526,8 +1563,10 @@ bypass_deauth7:
 			ret = RTW_RX_HANDLED;
 			goto exit;
 		}
+#ifndef CONFIG_CUSTOMER_ALIBABA_GENERAL
 		RTW_INFO("issue_deauth to sta=" MAC_FMT " for the reason(7)\n", MAC_ARG(pattrib->src));
 		issue_deauth(adapter, pattrib->src, WLAN_REASON_CLASS3_FRAME_FROM_NONASSOC_STA);
+#endif
 		ret = RTW_RX_HANDLED;
 		goto exit;
 	}
@@ -1562,6 +1601,7 @@ sint validate_recv_ctrl_frame(_adapter *padapter, union recv_frame *precv_frame)
 		return _FAIL;
 
 	/* for rx pkt statistics */
+	psta->sta_stats.last_rx_time = rtw_get_current_time();
 	psta->sta_stats.rx_ctrl_pkts++;
 
 	/* only handle ps-poll */
@@ -1719,12 +1759,14 @@ static sint validate_mgmt_protect(_adapter *adapter, union recv_frame *precv_fra
 
 	sint ret;
 
-	if ((!MLME_IS_MESH(adapter) && SEC_IS_BIP_KEY_INSTALLED(sec) == _FALSE)
-		#ifdef CONFIG_RTW_MESH
-		|| (MLME_IS_MESH(adapter) && !adapter->mesh_info.mesh_auth_id)
-		#endif
-	)
-		return pattrib->privacy ? _FAIL : _SUCCESS;
+#ifdef CONFIG_RTW_MESH
+	if (MLME_IS_MESH(adapter)) {
+		if (!adapter->mesh_info.mesh_auth_id)
+			return pattrib->privacy ? _FAIL : _SUCCESS;
+	} else
+#endif
+	if (SEC_IS_BIP_KEY_INSTALLED(sec) == _FALSE)
+		return _SUCCESS;
 
 	ptr = precv_frame->u.hdr.rx_data;
 	type = GetFrameType(ptr);
@@ -1762,7 +1804,7 @@ static sint validate_mgmt_protect(_adapter *adapter, union recv_frame *precv_fra
 
 		if (subtype == WIFI_ACTION)
 			category = *(ptr + sizeof(struct rtw_ieee80211_hdr_3addr));
-	
+
 		if (is_bmc) {
 			/* broadcast cases */
 			if (subtype == WIFI_ACTION) {
@@ -1825,8 +1867,10 @@ bip_verify:
 				igtk = psta->igtk.skey;
 				igtk_id = psta->igtk_id;
 				ipn = &psta->igtk_pn.val;
-			} else
+			} else {
+				/* mesh MFP without IGTK */
 				goto exit;
+			}
 		} else
 		#endif
 		{
@@ -1941,6 +1985,7 @@ sint validate_recv_mgnt_frame(PADAPTER padapter, union recv_frame *precv_frame)
 
 	/* for rx pkt statistics */
 	if (psta) {
+		psta->sta_stats.last_rx_time = rtw_get_current_time();
 		psta->sta_stats.rx_mgnt_pkts++;
 		if (get_frame_sub_type(precv_frame->u.hdr.rx_data) == WIFI_BEACON)
 			psta->sta_stats.rx_beacon_pkts++;
@@ -2006,22 +2051,37 @@ sint validate_recv_mgnt_frame(PADAPTER padapter, union recv_frame *precv_frame)
 #endif
 	mgt_dispatcher(padapter, precv_frame);
 
+#if defined(CONFIG_IEEE80211W) || defined(CONFIG_RTW_MESH)
 exit:
+#endif
 	return _SUCCESS;
 
 }
 
 sint validate_recv_data_frame(_adapter *adapter, union recv_frame *precv_frame)
 {
-	u8 bretry;
+	u8 bretry, a4_shift;
 	struct sta_info *psta = NULL;
 	u8 *ptr = precv_frame->u.hdr.rx_data;
 	struct rx_pkt_attrib	*pattrib = &precv_frame->u.hdr.attrib;
-	struct sta_priv	*pstapriv = &adapter->stapriv;
 	struct security_priv	*psecuritypriv = &adapter->securitypriv;
 	sint ret = _SUCCESS;
 
 	bretry = GetRetry(ptr);
+	a4_shift = (pattrib->to_fr_ds == 3) ? ETH_ALEN : 0;
+
+	/* some address fields are different when using AMSDU */
+	if (pattrib->qos)
+		pattrib->amsdu = GetAMsdu(ptr + WLAN_HDR_A3_LEN + a4_shift);
+	else
+		pattrib->amsdu = 0;
+
+#ifdef CONFIG_RTW_MESH
+	if (MLME_IS_MESH(adapter)) {
+		ret = rtw_mesh_rx_data_validate_hdr(adapter, precv_frame, &psta);
+		goto pre_validate_status_chk;
+	}
+#endif
 
 	switch (pattrib->to_fr_ds) {
 	case 0:
@@ -2058,10 +2118,13 @@ sint validate_recv_data_frame(_adapter *adapter, union recv_frame *precv_frame)
 		break;
 	}
 
+#ifdef CONFIG_RTW_MESH
+pre_validate_status_chk:
+#endif
 	if (ret == _FAIL) {
 		#ifdef DBG_RX_DROP_FRAME
-		RTW_INFO("DBG_RX_DROP_FRAME "FUNC_ADPT_FMT" case:%d, res:%d\n"
-			, FUNC_ADPT_ARG(adapter), pattrib->to_fr_ds, ret);
+		RTW_INFO("DBG_RX_DROP_FRAME "FUNC_ADPT_FMT" case:%d, res:%d, ra="MAC_FMT", ta="MAC_FMT"\n"
+			, FUNC_ADPT_ARG(adapter), pattrib->to_fr_ds, ret, MAC_ARG(GetAddr1Ptr(ptr)), MAC_ARG(get_addr2_ptr(ptr)));
 		#endif
 		goto exit;
 	} else if (ret == RTW_RX_HANDLED)
@@ -2071,45 +2134,46 @@ sint validate_recv_data_frame(_adapter *adapter, union recv_frame *precv_frame)
 	if (psta == NULL) {
 		#ifdef DBG_RX_DROP_FRAME
 		RTW_INFO("DBG_RX_DROP_FRAME "FUNC_ADPT_FMT" psta == NULL, ra="MAC_FMT", ta="MAC_FMT"\n"
-			, FUNC_ADPT_ARG(adapter), MAC_ARG(pattrib->ra), MAC_ARG(pattrib->ta));
+			, FUNC_ADPT_ARG(adapter), MAC_ARG(GetAddr1Ptr(ptr)), MAC_ARG(get_addr2_ptr(ptr)));
 		#endif
 		ret = _FAIL;
 		goto exit;
 	}
 
 	precv_frame->u.hdr.psta = psta;
-
-
-	pattrib->amsdu = 0;
+	precv_frame->u.hdr.preorder_ctrl = NULL;
 	pattrib->ack_policy = 0;
+
 	/* parsing QC field */
 	if (pattrib->qos == 1) {
-		pattrib->priority = GetPriority((ptr + 24));
-		pattrib->ack_policy = GetAckpolicy((ptr + 24));
-		pattrib->amsdu = GetAMsdu((ptr + 24));
-		pattrib->hdrlen = pattrib->to_fr_ds == 3 ? 32 : 26;
-
+		pattrib->priority = GetPriority((ptr + WLAN_HDR_A3_LEN + a4_shift)); /* point to Qos field*/
+		pattrib->ack_policy = GetAckpolicy((ptr + WLAN_HDR_A3_LEN + a4_shift));
+		pattrib->hdrlen = WLAN_HDR_A3_QOS_LEN + a4_shift;
 		if (pattrib->priority != 0 && pattrib->priority != 3)
 			adapter->recvpriv.is_any_non_be_pkts = _TRUE;
 		else
 			adapter->recvpriv.is_any_non_be_pkts = _FALSE;
 	} else {
 		pattrib->priority = 0;
-		pattrib->hdrlen = pattrib->to_fr_ds == 3 ? 30 : 24;
+		pattrib->hdrlen = WLAN_HDR_A3_LEN + a4_shift;
 	}
 
-
 	if (pattrib->order) /* HT-CTRL 11n */
 		pattrib->hdrlen += 4;
 
+	/* decache, drop duplicate recv packets */
+	ret = recv_decache(precv_frame);
+	if (ret  == _FAIL)
+		goto exit;
+
 	if (!IS_MCAST(pattrib->ra)) {
-		precv_frame->u.hdr.preorder_ctrl = &psta->recvreorder_ctrl[pattrib->priority];
 
-		/* decache, drop duplicate recv packets */
-		if ((recv_decache(precv_frame, bretry) == _FAIL) ||
-			(recv_ucast_pn_decache(precv_frame) == _FAIL)) {
+		if (pattrib->qos)
+			precv_frame->u.hdr.preorder_ctrl = &psta->recvreorder_ctrl[pattrib->priority];
+
+		if (recv_ucast_pn_decache(precv_frame) == _FAIL) {
 			#ifdef DBG_RX_DROP_FRAME
-			RTW_INFO("DBG_RX_DROP_FRAME "FUNC_ADPT_FMT" recv_decache return _FAIL for sta="MAC_FMT"\n"
+			RTW_INFO("DBG_RX_DROP_FRAME "FUNC_ADPT_FMT" recv_ucast_pn_decache return _FAIL for sta="MAC_FMT"\n"
 				, FUNC_ADPT_ARG(adapter), MAC_ARG(psta->cmn.mac_addr));
 			#endif
 			ret = _FAIL;
@@ -2118,14 +2182,12 @@ sint validate_recv_data_frame(_adapter *adapter, union recv_frame *precv_frame)
 	} else {
 		if (recv_bcast_pn_decache(precv_frame) == _FAIL) {
 			#ifdef DBG_RX_DROP_FRAME
-			RTW_INFO("DBG_RX_DROP_FRAME "FUNC_ADPT_FMT" recv_bcast_pn_decache _FAIL for invalid PN!\n"
-				, FUNC_ADPT_ARG(adapter));
+			RTW_INFO("DBG_RX_DROP_FRAME "FUNC_ADPT_FMT" recv_bcast_pn_decache return _FAIL for sta="MAC_FMT"\n"
+				, FUNC_ADPT_ARG(adapter), MAC_ARG(psta->cmn.mac_addr));
 			#endif
 			ret = _FAIL;
 			goto exit;
-		}	
-
-		precv_frame->u.hdr.preorder_ctrl = NULL;
+		}
 	}
 
 	if (pattrib->privacy) {
@@ -2143,9 +2205,14 @@ sint validate_recv_data_frame(_adapter *adapter, union recv_frame *precv_frame)
 		pattrib->iv_len = pattrib->icv_len = 0;
 	}
 
-exit:
-
+#ifdef CONFIG_RTW_MESH
+	if (!pattrib->amsdu
+		&& pattrib->mesh_ctrl_present
+		&& (!pattrib->encrypt || pattrib->bdecrypted))
+		ret = rtw_mesh_rx_validate_mctrl_non_amsdu(adapter, precv_frame);
+#endif
 
+exit:
 	return ret;
 }
 
@@ -2320,7 +2387,7 @@ sint validate_recv_frame(_adapter *adapter, union recv_frame *precv_frame)
 				/* dump eapol */
 				rtw_hal_get_def_var(adapter, HAL_DEF_DBG_DUMP_RXPKT, &(bDumpRxPkt));
 				/* get ether_type */
-				_rtw_memcpy(&eth_type, ptr + pattrib->hdrlen + pattrib->iv_len + LLC_HEADER_SIZE, 2);
+				_rtw_memcpy(&eth_type, ptr + pattrib->hdrlen + pattrib->iv_len + RATTRIB_GET_MCTRL_LEN(pattrib) + LLC_HEADER_SIZE, 2);
 				eth_type = ntohs((unsigned short) eth_type);
 				if ((bDumpRxPkt == 4) && (eth_type == 0x888e))
 					dump_rx_packet(ptr);
@@ -2367,8 +2434,8 @@ sint wlanhdr_to_ethhdr(union recv_frame *precvframe)
 	if (pattrib->encrypt)
 		recvframe_pull_tail(precvframe, pattrib->icv_len);
 
-	psnap = (struct ieee80211_snap_hdr *)(ptr + pattrib->hdrlen + pattrib->iv_len);
-	psnap_type = ptr + pattrib->hdrlen + pattrib->iv_len + SNAP_SIZE;
+	psnap = (struct ieee80211_snap_hdr *)(ptr + pattrib->hdrlen + pattrib->iv_len + RATTRIB_GET_MCTRL_LEN(pattrib));
+	psnap_type = ptr + pattrib->hdrlen + pattrib->iv_len + RATTRIB_GET_MCTRL_LEN(pattrib) + SNAP_SIZE;
 	/* convert hdr + possible LLC headers into Ethernet header */
 	/* eth_type = (psnap_type[0] << 8) | psnap_type[1]; */
 	if ((_rtw_memcmp(psnap, rtw_rfc1042_header, SNAP_SIZE) &&
@@ -2383,7 +2450,7 @@ sint wlanhdr_to_ethhdr(union recv_frame *precvframe)
 		bsnaphdr = _FALSE;
 	}
 
-	rmv_len = pattrib->hdrlen + pattrib->iv_len + (bsnaphdr ? SNAP_SIZE : 0);
+	rmv_len = pattrib->hdrlen + pattrib->iv_len + RATTRIB_GET_MCTRL_LEN(pattrib) + (bsnaphdr ? SNAP_SIZE : 0);
 	len = precvframe->u.hdr.len - rmv_len;
 
 
@@ -2422,6 +2489,8 @@ sint wlanhdr_to_ethhdr(union recv_frame *precvframe)
 			len = htons(len);
 			_rtw_memcpy(ptr + 12, &len, 2);
 		}
+
+		rtw_rframe_set_os_pkt(precvframe);
 	}
 
 exiting:
@@ -2430,6 +2499,11 @@ exiting:
 }
 
 #else
+static u8 SNAP_ETH_TYPE_APPLETALK_DDP[2] = {0x80, 0x9b};
+/* Datagram Delivery Protocol */
+static u8 SNAP_HDR_APPLETALK_DDP[3] = {0x08, 0x00, 0x07};
+static u8 oui_8021h[] = {0x00, 0x00, 0xf8};
+static u8 oui_rfc1042[] = {0x00, 0x00, 0x00};
 
 sint wlanhdr_to_ethhdr(union recv_frame *precvframe)
 {
@@ -2702,7 +2776,7 @@ union recv_frame *recvframe_chk_defrag(PADAPTER padapter, union recv_frame *prec
 	struct sta_priv *pstapriv;
 	_list *phead;
 	union recv_frame *prtnframe = NULL;
-	_queue *pfree_recv_queue, *pdefrag_q;
+	_queue *pfree_recv_queue, *pdefrag_q = NULL;
 
 
 	pstapriv = &padapter->stapriv;
@@ -2721,7 +2795,8 @@ union recv_frame *recvframe_chk_defrag(PADAPTER padapter, union recv_frame *prec
 		u8 type = GetFrameType(pfhdr->rx_data);
 		if (type != WIFI_DATA_TYPE) {
 			psta = rtw_get_bcmc_stainfo(padapter);
-			pdefrag_q = &psta->sta_recvpriv.defrag_q;
+			if (psta)
+				pdefrag_q = &psta->sta_recvpriv.defrag_q;
 		} else
 			pdefrag_q = NULL;
 	} else
@@ -2802,6 +2877,13 @@ static int rtw_recv_indicatepkt_check(union recv_frame *rframe, u8 *ehdr_pos, u3
 	_adapter *adapter = rframe->u.hdr.adapter;
 	struct recv_priv *recvpriv = &adapter->recvpriv;
 	struct ethhdr *ehdr = (struct ethhdr *)ehdr_pos;
+#ifdef DBG_IP_R_MONITOR
+	int i;
+	struct rx_pkt_attrib *pattrib = &rframe->u.hdr.attrib;
+	struct mlme_ext_priv *pmlmeext = &adapter->mlmeextpriv;
+	struct mlme_priv	*pmlmepriv = &adapter->mlmepriv;
+	struct wlan_network *cur_network = &(pmlmepriv->cur_network);
+#endif/*DBG_IP_R_MONITOR*/
 	int ret = _FAIL;
 
 #ifdef CONFIG_WAPI_SUPPORT
@@ -2818,7 +2900,11 @@ static int rtw_recv_indicatepkt_check(union recv_frame *rframe, u8 *ehdr_pos, u3
 		rtw_st_ctl_rx(rframe->u.hdr.psta, ehdr_pos);
 
 	if (ntohs(ehdr->h_proto) == 0x888e)
-		RTW_PRINT("recv eapol packet\n");
+		parsing_eapol_packet(adapter, ehdr_pos + ETH_HLEN, rframe->u.hdr.psta, 0);
+#ifdef DBG_ARP_DUMP
+	else if (ntohs(ehdr->h_proto) == ETH_P_ARP)
+		dump_arp_pkt(RTW_DBGDUMP, ehdr->h_dest, ehdr->h_source, ehdr_pos + ETH_HLEN, 0);
+#endif
 
 	if (recvpriv->sink_udpport > 0)
 		rtw_sink_rtp_seq_dbg(adapter, ehdr_pos);
@@ -2839,6 +2925,22 @@ static int rtw_recv_indicatepkt_check(union recv_frame *rframe, u8 *ehdr_pos, u3
 	}
 #endif
 
+#ifdef DBG_IP_R_MONITOR
+	#define LEN_ARP_OP_HDR 7 /*ARP OERATION */
+	if (ntohs(ehdr->h_proto) == ETH_P_ARP) {
+
+		if(check_fwstate(pmlmepriv, WIFI_ASOC_STATE) == _TRUE){
+			if(ehdr_pos[ETHERNET_HEADER_SIZE+LEN_ARP_OP_HDR] == 2) {
+				RTW_INFO("%s,[DBG_ARP] Rx ARP RSP Packet with Dst= "MAC_FMT" ;SeqNum = %d !\n",
+					__FUNCTION__, MAC_ARG(pattrib->dst), pattrib->seq_num);
+				for(i=0;i<(pkt_len -ETHERNET_HEADER_SIZE);i++)
+					RTW_INFO("0x%x ",ehdr_pos[i+ETHERNET_HEADER_SIZE]);
+				RTW_INFO("\n");
+			}
+		}
+	}
+#endif/*DBG_IP_R_MONITOR*/
+
 #ifdef CONFIG_AUTO_AP_MODE
 	if (ntohs(ehdr->h_proto) == 0x8899)
 		rtw_auto_ap_rx_msg_dump(adapter, rframe, ehdr_pos);
@@ -2846,10 +2948,94 @@ static int rtw_recv_indicatepkt_check(union recv_frame *rframe, u8 *ehdr_pos, u3
 
 	ret = _SUCCESS;
 
+#ifdef CONFIG_WAPI_SUPPORT
 exit:
+#endif
 	return ret;
 }
 
+static void recv_free_fwd_resource(_adapter *adapter, struct xmit_frame *fwd_frame, _list *b2u_list)
+{
+	struct xmit_priv *xmitpriv = &adapter->xmitpriv;
+
+	if (fwd_frame)
+		rtw_free_xmitframe(xmitpriv, fwd_frame);
+
+#ifdef CONFIG_RTW_MESH
+#if CONFIG_RTW_MESH_DATA_BMC_TO_UC
+	if (!rtw_is_list_empty(b2u_list)) {
+		struct xmit_frame *b2uframe;
+		_list *list;
+
+		list = get_next(b2u_list);
+		while (rtw_end_of_queue_search(b2u_list, list) == _FALSE) {
+			b2uframe = LIST_CONTAINOR(list, struct xmit_frame, list);
+			list = get_next(list);
+			rtw_list_delete(&b2uframe->list);
+			rtw_free_xmitframe(xmitpriv, b2uframe);
+		}
+	}
+#endif
+#endif /* CONFIG_RTW_MESH */
+}
+
+#ifdef CONFIG_RTW_MESH
+static void recv_fwd_pkt_hdl(_adapter *adapter, _pkt *pkt
+	, u8 act, struct xmit_frame *fwd_frame, _list *b2u_list)
+{
+	struct xmit_priv *xmitpriv = &adapter->xmitpriv;
+	_pkt *fwd_pkt = pkt;
+
+	if (act & RTW_RX_MSDU_ACT_INDICATE) {
+		fwd_pkt = rtw_os_pkt_copy(pkt);
+		if (!fwd_pkt) {
+			#ifdef DBG_TX_DROP_FRAME
+			RTW_INFO("DBG_TX_DROP_FRAME %s rtw_os_pkt_copy fail\n", __func__);
+			#endif
+			recv_free_fwd_resource(adapter, fwd_frame, b2u_list);
+			goto exit;
+		}
+	}
+
+#if CONFIG_RTW_MESH_DATA_BMC_TO_UC
+	if (!rtw_is_list_empty(b2u_list)) {
+		_list *list = get_next(b2u_list);
+		struct xmit_frame *b2uframe;
+
+		while (rtw_end_of_queue_search(b2u_list, list) == _FALSE) {
+			b2uframe = LIST_CONTAINOR(list, struct xmit_frame, list);
+			list = get_next(list);
+			rtw_list_delete(&b2uframe->list);
+
+			if (!fwd_frame && rtw_is_list_empty(b2u_list)) /* the last fwd_pkt */
+				b2uframe->pkt = fwd_pkt;
+			else
+				b2uframe->pkt = rtw_os_pkt_copy(fwd_pkt);
+			if (!b2uframe->pkt) {
+				rtw_free_xmitframe(xmitpriv, b2uframe);
+				continue;
+			}
+
+			rtw_xmit_posthandle(adapter, b2uframe, b2uframe->pkt);
+		}
+	}
+#endif
+
+	if (fwd_frame) {
+		fwd_frame->pkt = fwd_pkt;
+		if (rtw_xmit_posthandle(adapter, fwd_frame, fwd_pkt) < 0) {
+			#ifdef DBG_TX_DROP_FRAME
+			RTW_INFO("DBG_TX_DROP_FRAME %s rtw_xmit_posthandle fail\n", __func__);
+			#endif
+			xmitpriv->tx_drop++;
+		}
+	}
+
+exit:
+	return;
+}
+#endif /* CONFIG_RTW_MESH */
+
 int amsdu_to_msdu(_adapter *padapter, union recv_frame *prframe)
 {
 	struct rx_pkt_attrib *rattrib = &prframe->u.hdr.attrib;
@@ -2860,6 +3046,11 @@ int amsdu_to_msdu(_adapter *padapter, union recv_frame *prframe)
 	_pkt *sub_pkt, *subframes[MAX_SUBFRAME_COUNT];
 	struct recv_priv *precvpriv = &padapter->recvpriv;
 	_queue *pfree_recv_queue = &(precvpriv->free_recv_queue);
+	const u8 *da, *sa;
+	int act;
+	struct xmit_frame *fwd_frame;
+	_list b2u_list;
+	u8 mctrl_len = 0;
 	int	ret = _SUCCESS;
 
 	nr_subframes = 0;
@@ -2873,26 +3064,72 @@ int amsdu_to_msdu(_adapter *padapter, union recv_frame *prframe)
 	pdata = prframe->u.hdr.rx_data;
 
 	while (a_len > ETH_HLEN) {
-
 		/* Offset 12 denote 2 mac address */
 		nSubframe_Length = RTW_GET_BE16(pdata + 12);
-
 		if (a_len < (ETHERNET_HEADER_SIZE + nSubframe_Length)) {
 			RTW_INFO("nRemain_Length is %d and nSubframe_Length is : %d\n", a_len, nSubframe_Length);
 			break;
 		}
 
-		sub_pkt = rtw_os_alloc_msdu_pkt(prframe, nSubframe_Length, pdata);
+		act = RTW_RX_MSDU_ACT_INDICATE;
+		fwd_frame = NULL;
+
+		#ifdef CONFIG_RTW_MESH
+		if (MLME_IS_MESH(padapter)) {
+			u8 *mda = pdata, *msa = pdata + ETH_ALEN;
+			struct rtw_ieee80211s_hdr *mctrl = (struct rtw_ieee80211s_hdr *)(pdata + ETH_HLEN);
+			int v_ret;
+
+			v_ret = rtw_mesh_rx_data_validate_mctrl(padapter, prframe
+				, mctrl, mda, msa, &mctrl_len, &da, &sa);
+			if (v_ret != _SUCCESS)
+				goto move_to_next;
+
+			act = rtw_mesh_rx_msdu_act_check(prframe
+				, mda, msa, da, sa, mctrl, &fwd_frame, &b2u_list);
+		} else
+		#endif
+		{
+			da = pdata;
+			sa = pdata + ETH_ALEN;
+		}
+
+		if (!act)
+			goto move_to_next;
+
+		rtw_led_rx_control(padapter, da);
+
+		sub_pkt = rtw_os_alloc_msdu_pkt(prframe, da, sa
+			, pdata + ETH_HLEN + mctrl_len, nSubframe_Length - mctrl_len);
 		if (sub_pkt == NULL) {
-			RTW_INFO("%s(): allocate sub packet fail !!!\n", __FUNCTION__);
+			if (act & RTW_RX_MSDU_ACT_INDICATE) {
+				#ifdef DBG_RX_DROP_FRAME
+				RTW_INFO("DBG_RX_DROP_FRAME %s rtw_os_alloc_msdu_pkt fail\n", __func__);
+				#endif
+			}
+			if (act & RTW_RX_MSDU_ACT_FORWARD) {
+				#ifdef DBG_TX_DROP_FRAME
+				RTW_INFO("DBG_TX_DROP_FRAME %s rtw_os_alloc_msdu_pkt fail\n", __func__);
+				#endif
+				recv_free_fwd_resource(padapter, fwd_frame, &b2u_list);
+			}
 			break;
 		}
 
+		#ifdef CONFIG_RTW_MESH
+		if (act & RTW_RX_MSDU_ACT_FORWARD) {
+			recv_fwd_pkt_hdl(padapter, sub_pkt, act, fwd_frame, &b2u_list);
+			if (!(act & RTW_RX_MSDU_ACT_INDICATE))
+				goto move_to_next;
+		}
+		#endif
+
 		if (rtw_recv_indicatepkt_check(prframe, rtw_os_pkt_data(sub_pkt), rtw_os_pkt_len(sub_pkt)) == _SUCCESS)
 			subframes[nr_subframes++] = sub_pkt;
 		else
 			rtw_os_pkt_free(sub_pkt);
 
+move_to_next:
 		/* move the data point to data content */
 		pdata += ETH_HLEN;
 		a_len -= ETH_HLEN;
@@ -2934,7 +3171,6 @@ int amsdu_to_msdu(_adapter *padapter, union recv_frame *prframe)
 
 static int recv_process_mpdu(_adapter *padapter, union recv_frame *prframe)
 {
-	struct recv_priv *precvpriv = &padapter->recvpriv;
 	_queue *pfree_recv_queue = &padapter->recvpriv.free_recv_queue;
 	struct rx_pkt_attrib *pattrib = &prframe->u.hdr.attrib;
 	int ret;
@@ -2950,16 +3186,57 @@ static int recv_process_mpdu(_adapter *padapter, union recv_frame *prframe)
 			goto exit;
 		}
 	} else {
+		int act = RTW_RX_MSDU_ACT_INDICATE;
+		struct xmit_frame *fwd_frame = NULL;
+		_list b2u_list;
+
+		#ifdef CONFIG_RTW_MESH
+		if (MLME_IS_MESH(padapter) && pattrib->mesh_ctrl_present) {
+			act = rtw_mesh_rx_msdu_act_check(prframe
+				, pattrib->mda, pattrib->msa
+				, pattrib->dst, pattrib->src
+				, (struct rtw_ieee80211s_hdr *)(get_recvframe_data(prframe) + pattrib->hdrlen + pattrib->iv_len)
+				, &fwd_frame, &b2u_list);
+		}
+		#endif
+
+		if (!act) {
+			rtw_free_recvframe(prframe, pfree_recv_queue);
+			ret = _FAIL;
+			goto exit;
+		}
+
+		rtw_led_rx_control(padapter, pattrib->dst);
+
 		ret = wlanhdr_to_ethhdr(prframe);
 		if (ret != _SUCCESS) {
-			#ifdef DBG_RX_DROP_FRAME
-			RTW_INFO("DBG_RX_DROP_FRAME "FUNC_ADPT_FMT" wlanhdr_to_ethhdr: drop pkt\n"
-				, FUNC_ADPT_ARG(padapter));
-			#endif
+			if (act & RTW_RX_MSDU_ACT_INDICATE) {
+				#ifdef DBG_RX_DROP_FRAME
+				RTW_INFO("DBG_RX_DROP_FRAME "FUNC_ADPT_FMT" wlanhdr_to_ethhdr: drop pkt\n"
+					, FUNC_ADPT_ARG(padapter));
+				#endif
+			}
+			if (act & RTW_RX_MSDU_ACT_FORWARD) {
+				#ifdef DBG_TX_DROP_FRAME
+				RTW_INFO("DBG_TX_DROP_FRAME %s wlanhdr_to_ethhdr fail\n", __func__);
+				#endif
+				recv_free_fwd_resource(padapter, fwd_frame, &b2u_list);
+			}
 			rtw_free_recvframe(prframe, pfree_recv_queue);
 			goto exit;
 		}
 
+		#ifdef CONFIG_RTW_MESH
+		if (act & RTW_RX_MSDU_ACT_FORWARD) {
+			recv_fwd_pkt_hdl(padapter, prframe->u.hdr.pkt, act, fwd_frame, &b2u_list);
+			if (!(act & RTW_RX_MSDU_ACT_INDICATE)) {
+				prframe->u.hdr.pkt = NULL;
+				rtw_free_recvframe(prframe, pfree_recv_queue);
+				goto exit;
+			}
+		}
+		#endif
+
 		if (!RTW_CANNOT_RUN(padapter)) {
 			ret = rtw_recv_indicatepkt_check(prframe
 				, get_recvframe_data(prframe), get_recvframe_len(prframe));
@@ -3250,7 +3527,6 @@ static int recv_indicatepkts_in_order(_adapter *padapter, struct recv_reorder_ct
 static int recv_indicatepkt_reorder(_adapter *padapter, union recv_frame *prframe)
 {
 	_irqL irql;
-	int retval = _SUCCESS;
 	struct rx_pkt_attrib *pattrib = &prframe->u.hdr.attrib;
 	struct recv_reorder_ctrl *preorder_ctrl = prframe->u.hdr.preorder_ctrl;
 	_queue *ppending_recvframe_queue = preorder_ctrl ? &preorder_ctrl->pending_recvframe_queue : NULL;
@@ -3469,7 +3745,6 @@ static sint MPwlanhdr_to_ethhdr(union recv_frame *precvframe)
 
 	sint ret = _SUCCESS;
 	_adapter			*adapter = precvframe->u.hdr.adapter;
-	struct mlme_priv	*pmlmepriv = &adapter->mlmepriv;
 
 	u8	*ptr = get_recvframe_data(precvframe) ; /* point to frame_ctrl field */
 	struct rx_pkt_attrib *pattrib = &precvframe->u.hdr.attrib;
@@ -3537,7 +3812,6 @@ int mp_recv_frame(_adapter *padapter, union recv_frame *rframe)
 {
 	int ret = _SUCCESS;
 	struct rx_pkt_attrib *pattrib = &rframe->u.hdr.attrib;
-	struct recv_priv *precvpriv = &padapter->recvpriv;
 	_queue *pfree_recv_queue = &padapter->recvpriv.free_recv_queue;
 #ifdef CONFIG_MP_INCLUDED
 	struct mlme_priv *pmlmepriv = &padapter->mlmepriv;
@@ -3715,8 +3989,6 @@ static sint fill_radiotap_hdr(_adapter *padapter, union recv_frame *precvframe,
 #endif
 
 	sint ret = _SUCCESS;
-	_adapter			*adapter = precvframe->u.hdr.adapter;
-	struct mlme_priv	*pmlmepriv = &adapter->mlmepriv;
 	struct rx_pkt_attrib *pattrib = &precvframe->u.hdr.attrib;
 
 	HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter);
@@ -3787,9 +4059,9 @@ static sint fill_radiotap_hdr(_adapter *padapter, union recv_frame *precvframe,
 	rt_len += 1;
 
 	/* rate */
-	if (pattrib->data_rate < 12) {
+	if (pattrib->data_rate <= DESC_RATE54M) {
 		rtap_hdr->it_present |= (1 << IEEE80211_RADIOTAP_RATE);
-		if (pattrib->data_rate < 4) {
+		if (pattrib->data_rate <= DESC_RATE11M) {
 			/* CCK */
 			hdr_buf[rt_len] = data_rate[pattrib->data_rate];
 		} else {
@@ -3814,8 +4086,8 @@ static sint fill_radiotap_hdr(_adapter *padapter, union recv_frame *precvframe,
 	else
 		tmp_16bit |= cpu_to_le16(IEEE80211_CHAN_5GHZ);
 
-	if (pattrib->data_rate < 12) {
-		if (pattrib->data_rate < 4) {
+	if (pattrib->data_rate <= DESC_RATE54M) {
+		if (pattrib->data_rate <= DESC_RATE11M) {
 			/* CCK */
 			tmp_16bit |= cpu_to_le16(IEEE80211_CHAN_CCK);
 		} else {
@@ -3858,7 +4130,7 @@ static sint fill_radiotap_hdr(_adapter *padapter, union recv_frame *precvframe,
 	rt_len += 2;
 
 	/* MCS information */
-	if (pattrib->data_rate >= 12 && pattrib->data_rate < 44) {
+	if (pattrib->data_rate >= DESC_RATEMCS0 && pattrib->data_rate <= DESC_RATEMCS31) {
 		rtap_hdr->it_present |= (1 << IEEE80211_RADIOTAP_MCS);
 		/* known, flag */
 		hdr_buf[rt_len] |= BIT1; /* MCS index known */
@@ -3883,7 +4155,7 @@ static sint fill_radiotap_hdr(_adapter *padapter, union recv_frame *precvframe,
 	}
 
 	/* VHT */
-	if (pattrib->data_rate >= 44 && pattrib->data_rate < 84) {
+	if (pattrib->data_rate >= DESC_RATEVHTSS1MCS0 && pattrib->data_rate <= DESC_RATEVHTSS4MCS9) {
 		rtap_hdr->it_present |= (1 << IEEE80211_RADIOTAP_VHT);
 
 		/* known 16 bit, flag 8 bit */
@@ -3925,16 +4197,16 @@ static sint fill_radiotap_hdr(_adapter *padapter, union recv_frame *precvframe,
 		rt_len += 1;
 
 		/* mcs_nss */
-		if (pattrib->data_rate >= 44 && pattrib->data_rate < 54) {
+		if (pattrib->data_rate >= DESC_RATEVHTSS1MCS0 && pattrib->data_rate <= DESC_RATEVHTSS1MCS9) {
 			hdr_buf[rt_len] |= 1;
 			hdr_buf[rt_len] |= data_rate[pattrib->data_rate] << 4;
-		} else if (pattrib->data_rate >= 54 && pattrib->data_rate < 64) {
+		} else if (pattrib->data_rate >= DESC_RATEVHTSS2MCS0 && pattrib->data_rate <= DESC_RATEVHTSS2MCS9) {
 			hdr_buf[rt_len + 1] |= 2;
 			hdr_buf[rt_len + 1] |= data_rate[pattrib->data_rate] << 4;
-		} else if (pattrib->data_rate >= 64 && pattrib->data_rate < 74) {
+		} else if (pattrib->data_rate >= DESC_RATEVHTSS3MCS0 && pattrib->data_rate <= DESC_RATEVHTSS3MCS9) {
 			hdr_buf[rt_len + 2] |= 3;
 			hdr_buf[rt_len + 2] |= data_rate[pattrib->data_rate] << 4;
-		} else if (pattrib->data_rate >= 74 && pattrib->data_rate < 84) {
+		} else if (pattrib->data_rate >= DESC_RATEVHTSS4MCS0 && pattrib->data_rate <= DESC_RATEVHTSS4MCS9) {
 			hdr_buf[rt_len + 3] |= 4;
 			hdr_buf[rt_len + 3] |= data_rate[pattrib->data_rate] << 4;
 		}
@@ -3965,6 +4237,7 @@ static sint fill_radiotap_hdr(_adapter *padapter, union recv_frame *precvframe,
 	ptr = skb_push(pskb, rt_len);
 	if (ptr) {
 		rtap_hdr->it_len = cpu_to_le16(rt_len);
+		rtap_hdr->it_present = cpu_to_le32(rtap_hdr->it_present);
 		memcpy(ptr, rtap_hdr, rt_len);
 	} else
 		ret = _FAIL;
@@ -3976,8 +4249,6 @@ static sint fill_radiotap_hdr(_adapter *padapter, union recv_frame *precvframe,
 int recv_frame_monitor(_adapter *padapter, union recv_frame *rframe)
 {
 	int ret = _SUCCESS;
-	struct rx_pkt_attrib *pattrib = &rframe->u.hdr.attrib;
-	struct recv_priv *precvpriv = &padapter->recvpriv;
 	_queue *pfree_recv_queue = &padapter->recvpriv.free_recv_queue;
 	_pkt *pskb = NULL;
 
@@ -3987,13 +4258,14 @@ int recv_frame_monitor(_adapter *padapter, union recv_frame *rframe)
 	pskb->data = rframe->u.hdr.rx_data;
 	skb_set_tail_pointer(pskb, rframe->u.hdr.len);
 
+#ifndef CONFIG_CUSTOMER_ALIBABA_GENERAL
 	/* fill radiotap header */
 	if (fill_radiotap_hdr(padapter, rframe, (u8 *)pskb) == _FAIL) {
 		ret = _FAIL;
 		rtw_free_recvframe(rframe, pfree_recv_queue); /* free this recv_frame */
 		goto exit;
 	}
-
+#endif
 	/* write skb information to recv frame */
 	skb_reset_mac_header(pskb);
 	rframe->u.hdr.len = pskb->len;
@@ -4023,8 +4295,9 @@ exit:
 int recv_func_prehandle(_adapter *padapter, union recv_frame *rframe)
 {
 	int ret = _SUCCESS;
+#ifdef DBG_RX_COUNTER_DUMP
 	struct rx_pkt_attrib *pattrib = &rframe->u.hdr.attrib;
-	struct recv_priv *precvpriv = &padapter->recvpriv;
+#endif
 	_queue *pfree_recv_queue = &padapter->recvpriv.free_recv_queue;
 
 #ifdef DBG_RX_COUNTER_DUMP
@@ -4069,9 +4342,6 @@ int recv_func_posthandle(_adapter *padapter, union recv_frame *prframe)
 
 	DBG_COUNTER(padapter->rx_logs.core_rx_post);
 
-	/* DATA FRAME */
-	rtw_led_control(padapter, LED_CTL_RX);
-
 	prframe = decryptor(padapter, prframe);
 	if (prframe == NULL) {
 		#ifdef DBG_RX_DROP_FRAME
@@ -4089,7 +4359,7 @@ int recv_func_posthandle(_adapter *padapter, union recv_frame *prframe)
 #endif
 
 #if 0
-	if (padapter->adapter_type == PRIMARY_ADAPTER) {
+	if (is_primary_adapter(padapter)) {
 		RTW_INFO("+++\n");
 		{
 			int i;
@@ -4174,7 +4444,10 @@ int recv_func(_adapter *padapter, union recv_frame *rframe)
 	struct recv_priv *recvpriv = &padapter->recvpriv;
 	struct security_priv *psecuritypriv = &padapter->securitypriv;
 	struct mlme_priv *mlmepriv = &padapter->mlmepriv;
-
+#ifdef CONFIG_CUSTOMER_ALIBABA_GENERAL
+	u8 type;
+	u8 *ptr = rframe->u.hdr.rx_data;
+#endif
 	if (check_fwstate(mlmepriv, WIFI_MONITOR_STATE)) {
 		/* monitor mode */
 #if (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 24))
@@ -4183,7 +4456,18 @@ int recv_func(_adapter *padapter, union recv_frame *rframe)
 		ret = _SUCCESS;
 		goto exit;
 	} else
-
+		{}
+#ifdef CONFIG_CUSTOMER_ALIBABA_GENERAL
+	type = GetFrameType(ptr);
+	if ((type == WIFI_DATA_TYPE)&& check_fwstate(mlmepriv, WIFI_STATION_STATE)) {
+		struct wlan_network *cur_network = &(mlmepriv->cur_network);
+		if ( _rtw_memcmp(get_addr2_ptr(ptr), cur_network->network.MacAddress, ETH_ALEN)==0) {
+			recv_frame_monitor(padapter, rframe);
+			ret = _SUCCESS;
+			goto exit;
+		}
+	}
+#endif
 		/* check if need to handle uc_swdec_pending_queue*/
 		if (check_fwstate(mlmepriv, WIFI_STATION_STATE) && psecuritypriv->busetkipkey) {
 			union recv_frame *pending_frame;
@@ -4370,10 +4654,11 @@ set_timer:
 
 static void rx_process_rssi(_adapter *padapter, union recv_frame *prframe)
 {
-	u32	last_rssi, tmp_val;
 	struct rx_pkt_attrib *pattrib = &prframe->u.hdr.attrib;
 #ifdef CONFIG_NEW_SIGNAL_STAT_PROCESS
 	struct signal_stat *signal_stat = &padapter->recvpriv.signal_strength_data;
+#else /* CONFIG_NEW_SIGNAL_STAT_PROCESS */
+	u32 last_rssi, tmp_val;
 #endif /* CONFIG_NEW_SIGNAL_STAT_PROCESS */
 
 	/* RTW_INFO("process_rssi=> pattrib->rssil(%d) signal_strength(%d)\n ",pattrib->recv_signal_power,pattrib->signal_strength); */
@@ -4420,10 +4705,11 @@ static void rx_process_rssi(_adapter *padapter, union recv_frame *prframe)
 
 static void rx_process_link_qual(_adapter *padapter, union recv_frame *prframe)
 {
-	u32	last_evm = 0, tmpVal;
 	struct rx_pkt_attrib *pattrib;
 #ifdef CONFIG_NEW_SIGNAL_STAT_PROCESS
 	struct signal_stat *signal_stat;
+#else /* CONFIG_NEW_SIGNAL_STAT_PROCESS */
+	u32 last_evm = 0, tmpVal;
 #endif /* CONFIG_NEW_SIGNAL_STAT_PROCESS */
 
 	if (prframe == NULL || padapter == NULL)
@@ -4549,7 +4835,8 @@ void rx_query_phy_status(
 
 	pkt_info.is_packet_match_bssid = (!IsFrameTypeCtrl(wlanhdr))
 		&& (!pattrib->icv_err) && (!pattrib->crc_err)
-		&& _rtw_memcmp(get_hdr_bssid(wlanhdr), get_bssid(&padapter->mlmepriv), ETH_ALEN);
+		&& ((!MLME_IS_MESH(padapter) && _rtw_memcmp(get_hdr_bssid(wlanhdr), get_bssid(&padapter->mlmepriv), ETH_ALEN))
+			|| (MLME_IS_MESH(padapter) && psta));
 
 	pkt_info.is_to_self = (!pattrib->icv_err) && (!pattrib->crc_err)
 		&& _rtw_memcmp(ra, adapter_mac_addr(padapter), ETH_ALEN);
@@ -4570,20 +4857,40 @@ void rx_query_phy_status(
 
 	odm_phy_status_query(&pHalData->odmpriv, p_phy_info, pphy_status, &pkt_info);
 
+	/* If bw is initial value, get from phy status */
+	if (pattrib->bw == CHANNEL_WIDTH_MAX)
+		pattrib->bw = p_phy_info->band_width;
+
 	{
 		precvframe->u.hdr.psta = NULL;
-		if ((!MLME_IS_MESH(padapter) && pkt_info.is_packet_match_bssid)
-			|| padapter->registrypriv.mp_mode == 1
-		) {
-			if (psta) {
-				precvframe->u.hdr.psta = psta;
+		if (padapter->registrypriv.mp_mode != 1) {
+			if ((!MLME_IS_MESH(padapter) && pkt_info.is_packet_match_bssid)
+				|| (MLME_IS_MESH(padapter) && psta)) {
+				if (psta) {
+					precvframe->u.hdr.psta = psta;
+					rx_process_phy_info(padapter, precvframe);
+				}
+			} else if (pkt_info.is_packet_to_self || pkt_info.is_packet_beacon) {
+				if (psta)
+					precvframe->u.hdr.psta = psta;
 				rx_process_phy_info(padapter, precvframe);
 			}
-		} else if (pkt_info.is_packet_to_self || pkt_info.is_packet_beacon) {
-
-			if (psta)
-				precvframe->u.hdr.psta = psta;
-			rx_process_phy_info(padapter, precvframe);
+		} else {
+#ifdef CONFIG_MP_INCLUDED
+			if (padapter->mppriv.brx_filter_beacon == _TRUE) {
+				if (pkt_info.is_packet_beacon) {
+					RTW_INFO("in MP Rx is_packet_beacon\n");
+					if (psta)
+						precvframe->u.hdr.psta = psta;
+					rx_process_phy_info(padapter, precvframe);
+				}
+			} else 
+#endif
+			{
+					if (psta)
+						precvframe->u.hdr.psta = psta;
+					rx_process_phy_info(padapter, precvframe);
+			}
 		}
 	}
 
@@ -4634,9 +4941,9 @@ s32 pre_recv_entry(union recv_frame *precvframe, u8 *pphy_status)
 	u8 *pbuf = precvframe->u.hdr.rx_data;
 	u8 *pda = get_ra(pbuf);
 	u8 ra_is_bmc = IS_MCAST(pda);
+	_adapter *primary_padapter = precvframe->u.hdr.adapter;
 #ifdef CONFIG_CONCURRENT_MODE
 	_adapter *iface = NULL;
-	_adapter *primary_padapter = precvframe->u.hdr.adapter;
 
 	#ifdef CONFIG_MP_INCLUDED
 	if (rtw_mp_mode_check(primary_padapter))
@@ -4646,6 +4953,10 @@ s32 pre_recv_entry(union recv_frame *precvframe, u8 *pphy_status)
 	if (ra_is_bmc == _FALSE) { /*unicast packets*/
 		iface = rtw_get_iface_by_macddr(primary_padapter , pda);
 		if (NULL == iface) {
+		#ifdef CONFIG_RTW_CFGVENDOR_RANDOM_MAC_OUI
+			if (_rtw_memcmp(pda, adapter_pno_mac_addr(primary_padapter),
+					ETH_ALEN) != _TRUE)
+		#endif
 			RTW_INFO("%s [WARN] Cannot find appropriate adapter - mac_addr : "MAC_FMT"\n", __func__, MAC_ARG(pda));
 			/*rtw_warn_on(1);*/
 		} else
@@ -4654,13 +4965,14 @@ s32 pre_recv_entry(union recv_frame *precvframe, u8 *pphy_status)
 		rtw_mi_buddy_clone_bcmc_packet(primary_padapter, precvframe, pphy_status);
 bypass_concurrent_hdl:
 #endif /* CONFIG_CONCURRENT_MODE */
-
-	/* skip unnecessary bmc data frame for primary adapter */
-	if (ra_is_bmc == _TRUE && GetFrameType(pbuf) == WIFI_DATA_TYPE
-		&& !adapter_allow_bmc_data_rx(precvframe->u.hdr.adapter)
-	) {
-		rtw_free_recvframe(precvframe, &precvframe->u.hdr.adapter->recvpriv.free_recv_queue);
-		goto exit;
+	if (primary_padapter->registrypriv.mp_mode != 1) {
+		/* skip unnecessary bmc data frame for primary adapter */
+		if (ra_is_bmc == _TRUE && GetFrameType(pbuf) == WIFI_DATA_TYPE
+			&& !adapter_allow_bmc_data_rx(precvframe->u.hdr.adapter)
+		) {
+			rtw_free_recvframe(precvframe, &precvframe->u.hdr.adapter->recvpriv.free_recv_queue);
+			goto exit;
+		}
 	}
 
 	if (pphy_status)
@@ -4677,11 +4989,13 @@ thread_return rtw_recv_thread(thread_context context)
 	_adapter *adapter = (_adapter *)context;
 	struct recv_priv *recvpriv = &adapter->recvpriv;
 	s32 err = _SUCCESS;
+#ifdef RTW_RECV_THREAD_HIGH_PRIORITY
 #ifdef PLATFORM_LINUX
 	struct sched_param param = { .sched_priority = 1 };
 
 	sched_setscheduler(current, SCHED_FIFO, &param);
 #endif /* PLATFORM_LINUX */
+#endif /*RTW_RECV_THREAD_HIGH_PRIORITY*/
 	thread_enter("RTW_RECV_THREAD");
 
 	RTW_INFO(FUNC_ADPT_FMT" enter\n", FUNC_ADPT_ARG(adapter));
diff --git a/rtl8723DS/core/rtw_rf.c b/rtl8723DS/core/rtw_rf.c
index 3a1e3aa..f5cc458 100755..100644
--- a/rtl8723DS/core/rtw_rf.c
+++ b/rtl8723DS/core/rtw_rf.c
@@ -204,7 +204,6 @@ struct center_chs_ent_t center_chs_5g_by_bw[] = {
  */
 u8 rtw_get_scch_by_cch_offset(u8 cch, u8 bw, u8 offset)
 {
-	int i;
 	u8 t_cch = 0;
 
 	if (bw == CHANNEL_WIDTH_20) {
@@ -470,7 +469,6 @@ bool rtw_chbw_to_freq_range(u8 ch, u8 bw, u8 offset, u32 *hi, u32 *lo)
 	u8 c_ch;
 	u32 freq;
 	u32 hi_ret = 0, lo_ret = 0;
-	int i;
 	bool valid = _FALSE;
 
 	if (hi)
@@ -567,471 +565,6 @@ const u8 _rf_type_to_rf_rx_cnt[] = {
 	1, /*RF_TYPE_MAX*/
 };
 
-#ifdef CONFIG_80211AC_VHT
-#define COUNTRY_CHPLAN_ASSIGN_EN_11AC(_val) , .en_11ac = (_val)
-#else
-#define COUNTRY_CHPLAN_ASSIGN_EN_11AC(_val)
-#endif
-
-#if RTW_DEF_MODULE_REGULATORY_CERT
-#define COUNTRY_CHPLAN_ASSIGN_DEF_MODULE_FLAGS(_val) , .def_module_flags = (_val)
-#else
-#define COUNTRY_CHPLAN_ASSIGN_DEF_MODULE_FLAGS(_val)
-#endif
-
-/* has def_module_flags specified, used by common map and HAL dfference map */
-#define COUNTRY_CHPLAN_ENT(_alpha2, _chplan, _en_11ac, _def_module_flags) \
-	{.alpha2 = (_alpha2), .chplan = (_chplan) \
-		COUNTRY_CHPLAN_ASSIGN_EN_11AC(_en_11ac) \
-		COUNTRY_CHPLAN_ASSIGN_DEF_MODULE_FLAGS(_def_module_flags) \
-	}
-
-#ifdef CONFIG_CUSTOMIZED_COUNTRY_CHPLAN_MAP
-
-#include "../platform/custom_country_chplan.h"
-
-#elif RTW_DEF_MODULE_REGULATORY_CERT
-
-/* leave def_module_flags empty, def_module_flags check is done on country_chplan_map */
-#if (RTW_DEF_MODULE_REGULATORY_CERT & RTW_MODULE_RTL8821AE_HMC_M2) /* 2013 certify */
-static const struct country_chplan RTL8821AE_HMC_M2_country_chplan_exc_map[] = {
-	COUNTRY_CHPLAN_ENT("CA", 0x34, 1, 0), /* Canada */
-	COUNTRY_CHPLAN_ENT("CL", 0x30, 1, 0), /* Chile */
-	COUNTRY_CHPLAN_ENT("CN", 0x51, 1, 0), /* China */
-	COUNTRY_CHPLAN_ENT("MX", 0x34, 1, 0), /* Mexico */
-	COUNTRY_CHPLAN_ENT("MY", 0x47, 1, 0), /* Malaysia */
-	COUNTRY_CHPLAN_ENT("TW", 0x39, 1, 0), /* Taiwan */
-	COUNTRY_CHPLAN_ENT("UA", 0x36, 0, 0), /* Ukraine */
-	COUNTRY_CHPLAN_ENT("US", 0x34, 1, 0), /* United States of America (USA) */
-};
-#endif
-
-#if (RTW_DEF_MODULE_REGULATORY_CERT & RTW_MODULE_RTL8821AU) /* 2014 certify */
-static const struct country_chplan RTL8821AU_country_chplan_exc_map[] = {
-	COUNTRY_CHPLAN_ENT("CA", 0x34, 1, 0), /* Canada */
-	COUNTRY_CHPLAN_ENT("RU", 0x59, 0, 0), /* Russia(fac/gost), Kaliningrad */
-	COUNTRY_CHPLAN_ENT("TW", 0x39, 1, 0), /* Taiwan */
-	COUNTRY_CHPLAN_ENT("UA", 0x36, 0, 0), /* Ukraine */
-	COUNTRY_CHPLAN_ENT("US", 0x34, 1, 0), /* United States of America (USA) */
-};
-#endif
-
-#if (RTW_DEF_MODULE_REGULATORY_CERT & RTW_MODULE_RTL8812AENF_NGFF) /* 2014 certify */
-static const struct country_chplan RTL8812AENF_NGFF_country_chplan_exc_map[] = {
-	COUNTRY_CHPLAN_ENT("TW", 0x39, 1, 0), /* Taiwan */
-	COUNTRY_CHPLAN_ENT("US", 0x34, 1, 0), /* United States of America (USA) */
-};
-#endif
-
-#if (RTW_DEF_MODULE_REGULATORY_CERT & RTW_MODULE_RTL8812AEBT_HMC) /* 2013 certify */
-static const struct country_chplan RTL8812AEBT_HMC_country_chplan_exc_map[] = {
-	COUNTRY_CHPLAN_ENT("CA", 0x34, 1, 0), /* Canada */
-	COUNTRY_CHPLAN_ENT("RU", 0x59, 0, 0), /* Russia(fac/gost), Kaliningrad */
-	COUNTRY_CHPLAN_ENT("TW", 0x39, 1, 0), /* Taiwan */
-	COUNTRY_CHPLAN_ENT("UA", 0x36, 0, 0), /* Ukraine */
-	COUNTRY_CHPLAN_ENT("US", 0x34, 1, 0), /* United States of America (USA) */
-};
-#endif
-
-#if (RTW_DEF_MODULE_REGULATORY_CERT & RTW_MODULE_RTL8188EE_HMC_M2) /* 2012 certify */
-static const struct country_chplan RTL8188EE_HMC_M2_country_chplan_exc_map[] = {
-	COUNTRY_CHPLAN_ENT("CA", 0x20, 1, 0), /* Canada */
-	COUNTRY_CHPLAN_ENT("MX", 0x34, 1, 0), /* Mexico */
-	COUNTRY_CHPLAN_ENT("TW", 0x39, 1, 0), /* Taiwan */
-	COUNTRY_CHPLAN_ENT("US", 0x34, 1, 0), /* United States of America (USA) */
-};
-#endif
-
-#if (RTW_DEF_MODULE_REGULATORY_CERT & RTW_MODULE_RTL8723BE_HMC_M2) /* 2013 certify */
-static const struct country_chplan RTL8723BE_HMC_M2_country_chplan_exc_map[] = {
-	COUNTRY_CHPLAN_ENT("CA", 0x20, 1, 0), /* Canada */
-	COUNTRY_CHPLAN_ENT("MX", 0x34, 1, 0), /* Mexico */
-	COUNTRY_CHPLAN_ENT("TW", 0x39, 1, 0), /* Taiwan */
-	COUNTRY_CHPLAN_ENT("US", 0x34, 1, 0), /* United States of America (USA) */
-};
-#endif
-
-#if (RTW_DEF_MODULE_REGULATORY_CERT & RTW_MODULE_RTL8723BS_NGFF1216) /* 2014 certify */
-static const struct country_chplan RTL8723BS_NGFF1216_country_chplan_exc_map[] = {
-	COUNTRY_CHPLAN_ENT("CA", 0x20, 1, 0), /* Canada */
-	COUNTRY_CHPLAN_ENT("MX", 0x34, 1, 0), /* Mexico */
-	COUNTRY_CHPLAN_ENT("TW", 0x39, 1, 0), /* Taiwan */
-	COUNTRY_CHPLAN_ENT("US", 0x34, 1, 0), /* United States of America (USA) */
-};
-#endif
-
-#if (RTW_DEF_MODULE_REGULATORY_CERT & RTW_MODULE_RTL8192EEBT_HMC_M2) /* 2013 certify */
-static const struct country_chplan RTL8192EEBT_HMC_M2_country_chplan_exc_map[] = {
-	COUNTRY_CHPLAN_ENT("CA", 0x20, 1, 0), /* Canada */
-	COUNTRY_CHPLAN_ENT("MX", 0x34, 1, 0), /* Mexico */
-	COUNTRY_CHPLAN_ENT("TW", 0x39, 1, 0), /* Taiwan */
-	COUNTRY_CHPLAN_ENT("US", 0x34, 1, 0), /* United States of America (USA) */
-};
-#endif
-
-#if (RTW_DEF_MODULE_REGULATORY_CERT & RTW_MODULE_RTL8723DE_NGFF1630) /* 2016 certify */
-static const struct country_chplan RTL8723DE_NGFF1630_country_chplan_exc_map[] = {
-	COUNTRY_CHPLAN_ENT("CA", 0x2A, 1, 0), /* Canada */
-	COUNTRY_CHPLAN_ENT("MX", 0x34, 1, 0), /* Mexico */
-};
-#endif
-
-#if (RTW_DEF_MODULE_REGULATORY_CERT & RTW_MODULE_RTL8822BE) /* 2016 certify */
-static const struct country_chplan RTL8822BE_country_chplan_exc_map[] = {
-};
-#endif
-
-#if (RTW_DEF_MODULE_REGULATORY_CERT & RTW_MODULE_RTL8821CE) /* 2016 certify */
-static const struct country_chplan RTL8821CE_country_chplan_exc_map[] = {
-};
-#endif
-
-/**
- * rtw_def_module_get_chplan_from_country -
- * @country_code: string of country code
- * @return:
- * Return NULL for case referring to common map
- */
-static const struct country_chplan *rtw_def_module_get_chplan_from_country(const char *country_code)
-{
-	const struct country_chplan *ent = NULL;
-	const struct country_chplan *hal_map = NULL;
-	u16 hal_map_sz = 0;
-	int i;
-
-	/* TODO: runtime selection for multi driver */
-#if (RTW_DEF_MODULE_REGULATORY_CERT == RTW_MODULE_RTL8821AE_HMC_M2)
-	hal_map = RTL8821AE_HMC_M2_country_chplan_exc_map;
-	hal_map_sz = sizeof(RTL8821AE_HMC_M2_country_chplan_exc_map) / sizeof(struct country_chplan);
-#elif (RTW_DEF_MODULE_REGULATORY_CERT == RTW_MODULE_RTL8821AU)
-	hal_map = RTL8821AU_country_chplan_exc_map;
-	hal_map_sz = sizeof(RTL8821AU_country_chplan_exc_map) / sizeof(struct country_chplan);
-#elif (RTW_DEF_MODULE_REGULATORY_CERT == RTW_MODULE_RTL8812AENF_NGFF)
-	hal_map = RTL8812AENF_NGFF_country_chplan_exc_map;
-	hal_map_sz = sizeof(RTL8812AENF_NGFF_country_chplan_exc_map) / sizeof(struct country_chplan);
-#elif (RTW_DEF_MODULE_REGULATORY_CERT == RTW_MODULE_RTL8812AEBT_HMC)
-	hal_map = RTL8812AEBT_HMC_country_chplan_exc_map;
-	hal_map_sz = sizeof(RTL8812AEBT_HMC_country_chplan_exc_map) / sizeof(struct country_chplan);
-#elif (RTW_DEF_MODULE_REGULATORY_CERT == RTW_MODULE_RTL8188EE_HMC_M2)
-	hal_map = RTL8188EE_HMC_M2_country_chplan_exc_map;
-	hal_map_sz = sizeof(RTL8188EE_HMC_M2_country_chplan_exc_map) / sizeof(struct country_chplan);
-#elif (RTW_DEF_MODULE_REGULATORY_CERT == RTW_MODULE_RTL8723BE_HMC_M2)
-	hal_map = RTL8723BE_HMC_M2_country_chplan_exc_map;
-	hal_map_sz = sizeof(RTL8723BE_HMC_M2_country_chplan_exc_map) / sizeof(struct country_chplan);
-#elif (RTW_DEF_MODULE_REGULATORY_CERT == RTW_MODULE_RTL8723BS_NGFF1216)
-	hal_map = RTL8723BS_NGFF1216_country_chplan_exc_map;
-	hal_map_sz = sizeof(RTL8723BS_NGFF1216_country_chplan_exc_map) / sizeof(struct country_chplan);
-#elif (RTW_DEF_MODULE_REGULATORY_CERT == RTW_MODULE_RTL8192EEBT_HMC_M2)
-	hal_map = RTL8192EEBT_HMC_M2_country_chplan_exc_map;
-	hal_map_sz = sizeof(RTL8192EEBT_HMC_M2_country_chplan_exc_map) / sizeof(struct country_chplan);
-#elif (RTW_DEF_MODULE_REGULATORY_CERT == RTW_MODULE_RTL8723DE_NGFF1630)
-	hal_map = RTL8723DE_NGFF1630_country_chplan_exc_map;
-	hal_map_sz = sizeof(RTL8723DE_NGFF1630_country_chplan_exc_map) / sizeof(struct country_chplan);
-#elif (RTW_DEF_MODULE_REGULATORY_CERT == RTW_MODULE_RTL8822BE)
-	hal_map = RTL8822BE_country_chplan_exc_map;
-	hal_map_sz = sizeof(RTL8822BE_country_chplan_exc_map) / sizeof(struct country_chplan);
-#elif (RTW_DEF_MODULE_REGULATORY_CERT == RTW_MODULE_RTL8821CE)
-	hal_map = RTL8821CE_country_chplan_exc_map;
-	hal_map_sz = sizeof(RTL8821CE_country_chplan_exc_map) / sizeof(struct country_chplan);
-#endif
-
-	if (hal_map == NULL || hal_map_sz == 0)
-		goto exit;
-
-	for (i = 0; i < hal_map_sz; i++) {
-		if (strncmp(country_code, hal_map[i].alpha2, 2) == 0) {
-			ent = &hal_map[i];
-			break;
-		}
-	}
-
-exit:
-	return ent;
-}
-#endif /* CONFIG_CUSTOMIZED_COUNTRY_CHPLAN_MAP or RTW_DEF_MODULE_REGULATORY_CERT */
-
-static const struct country_chplan country_chplan_map[] = {
-	COUNTRY_CHPLAN_ENT("AD", 0x26, 1, 0x000), /* Andorra */
-	COUNTRY_CHPLAN_ENT("AE", 0x26, 1, 0x7FB), /* United Arab Emirates */
-	COUNTRY_CHPLAN_ENT("AF", 0x42, 1, 0x000), /* Afghanistan */
-	COUNTRY_CHPLAN_ENT("AG", 0x26, 1, 0x000), /* Antigua & Barbuda */
-	COUNTRY_CHPLAN_ENT("AI", 0x26, 1, 0x000), /* Anguilla(UK) */
-	COUNTRY_CHPLAN_ENT("AL", 0x26, 1, 0x7F1), /* Albania */
-	COUNTRY_CHPLAN_ENT("AM", 0x26, 1, 0x6B0), /* Armenia */
-	COUNTRY_CHPLAN_ENT("AN", 0x26, 1, 0x7F1), /* Netherlands Antilles */
-	COUNTRY_CHPLAN_ENT("AO", 0x47, 1, 0x6E0), /* Angola */
-	COUNTRY_CHPLAN_ENT("AQ", 0x26, 1, 0x000), /* Antarctica */
-	COUNTRY_CHPLAN_ENT("AR", 0x57, 1, 0x7F3), /* Argentina */
-	COUNTRY_CHPLAN_ENT("AS", 0x34, 1, 0x000), /* American Samoa */
-	COUNTRY_CHPLAN_ENT("AT", 0x26, 1, 0x7FB), /* Austria */
-	COUNTRY_CHPLAN_ENT("AU", 0x45, 1, 0x7FB), /* Australia */
-	COUNTRY_CHPLAN_ENT("AW", 0x34, 1, 0x0B0), /* Aruba */
-	COUNTRY_CHPLAN_ENT("AZ", 0x26, 1, 0x7F1), /* Azerbaijan */
-	COUNTRY_CHPLAN_ENT("BA", 0x26, 1, 0x7F1), /* Bosnia & Herzegovina */
-	COUNTRY_CHPLAN_ENT("BB", 0x34, 1, 0x650), /* Barbados */
-	COUNTRY_CHPLAN_ENT("BD", 0x26, 1, 0x7F1), /* Bangladesh */
-	COUNTRY_CHPLAN_ENT("BE", 0x26, 1, 0x7FB), /* Belgium */
-	COUNTRY_CHPLAN_ENT("BF", 0x26, 1, 0x6B0), /* Burkina Faso */
-	COUNTRY_CHPLAN_ENT("BG", 0x26, 1, 0x7F1), /* Bulgaria */
-	COUNTRY_CHPLAN_ENT("BH", 0x47, 1, 0x7F1), /* Bahrain */
-	COUNTRY_CHPLAN_ENT("BI", 0x26, 1, 0x6B0), /* Burundi */
-	COUNTRY_CHPLAN_ENT("BJ", 0x26, 1, 0x6B0), /* Benin */
-	COUNTRY_CHPLAN_ENT("BN", 0x47, 1, 0x610), /* Brunei */
-	COUNTRY_CHPLAN_ENT("BO", 0x73, 1, 0x7F1), /* Bolivia */
-	COUNTRY_CHPLAN_ENT("BR", 0x34, 1, 0x7F1), /* Brazil */
-	COUNTRY_CHPLAN_ENT("BS", 0x34, 1, 0x620), /* Bahamas */
-	COUNTRY_CHPLAN_ENT("BW", 0x26, 1, 0x6F1), /* Botswana */
-	COUNTRY_CHPLAN_ENT("BY", 0x26, 1, 0x7F1), /* Belarus */
-	COUNTRY_CHPLAN_ENT("BZ", 0x34, 1, 0x000), /* Belize */
-	COUNTRY_CHPLAN_ENT("CA", 0x2B, 1, 0x7FB), /* Canada */
-	COUNTRY_CHPLAN_ENT("CC", 0x26, 1, 0x000), /* Cocos (Keeling) Islands (Australia) */
-	COUNTRY_CHPLAN_ENT("CD", 0x26, 1, 0x6B0), /* Congo, Republic of the */
-	COUNTRY_CHPLAN_ENT("CF", 0x26, 1, 0x6B0), /* Central African Republic */
-	COUNTRY_CHPLAN_ENT("CG", 0x26, 1, 0x6B0), /* Congo, Democratic Republic of the. Zaire */
-	COUNTRY_CHPLAN_ENT("CH", 0x26, 1, 0x7FB), /* Switzerland */
-	COUNTRY_CHPLAN_ENT("CI", 0x26, 1, 0x7F1), /* Cote d'Ivoire */
-	COUNTRY_CHPLAN_ENT("CK", 0x26, 1, 0x000), /* Cook Islands */
-	COUNTRY_CHPLAN_ENT("CL", 0x2D, 1, 0x7F1), /* Chile */
-	COUNTRY_CHPLAN_ENT("CM", 0x26, 1, 0x6B0), /* Cameroon */
-	COUNTRY_CHPLAN_ENT("CN", 0x48, 1, 0x7FB), /* China */
-	COUNTRY_CHPLAN_ENT("CO", 0x34, 1, 0x7F1), /* Colombia */
-	COUNTRY_CHPLAN_ENT("CR", 0x34, 1, 0x7F1), /* Costa Rica */
-	COUNTRY_CHPLAN_ENT("CV", 0x26, 1, 0x6B0), /* Cape Verde */
-	COUNTRY_CHPLAN_ENT("CX", 0x45, 1, 0x000), /* Christmas Island (Australia) */
-	COUNTRY_CHPLAN_ENT("CY", 0x26, 1, 0x7FB), /* Cyprus */
-	COUNTRY_CHPLAN_ENT("CZ", 0x26, 1, 0x7FB), /* Czech Republic */
-	COUNTRY_CHPLAN_ENT("DE", 0x26, 1, 0x7FB), /* Germany */
-	COUNTRY_CHPLAN_ENT("DJ", 0x26, 1, 0x680), /* Djibouti */
-	COUNTRY_CHPLAN_ENT("DK", 0x26, 1, 0x7FB), /* Denmark */
-	COUNTRY_CHPLAN_ENT("DM", 0x34, 1, 0x000), /* Dominica */
-	COUNTRY_CHPLAN_ENT("DO", 0x34, 1, 0x7F1), /* Dominican Republic */
-	COUNTRY_CHPLAN_ENT("DZ", 0x26, 1, 0x7F1), /* Algeria */
-	COUNTRY_CHPLAN_ENT("EC", 0x34, 1, 0x7F1), /* Ecuador */
-	COUNTRY_CHPLAN_ENT("EE", 0x26, 1, 0x7FB), /* Estonia */
-	COUNTRY_CHPLAN_ENT("EG", 0x47, 1, 0x7F1), /* Egypt */
-	COUNTRY_CHPLAN_ENT("EH", 0x47, 1, 0x680), /* Western Sahara */
-	COUNTRY_CHPLAN_ENT("ER", 0x26, 1, 0x000), /* Eritrea */
-	COUNTRY_CHPLAN_ENT("ES", 0x26, 1, 0x7FB), /* Spain, Canary Islands, Ceuta, Melilla */
-	COUNTRY_CHPLAN_ENT("ET", 0x26, 1, 0x4B0), /* Ethiopia */
-	COUNTRY_CHPLAN_ENT("FI", 0x26, 1, 0x7FB), /* Finland */
-	COUNTRY_CHPLAN_ENT("FJ", 0x34, 1, 0x600), /* Fiji */
-	COUNTRY_CHPLAN_ENT("FK", 0x26, 1, 0x000), /* Falkland Islands (Islas Malvinas) (UK) */
-	COUNTRY_CHPLAN_ENT("FM", 0x34, 1, 0x000), /* Micronesia, Federated States of (USA) */
-	COUNTRY_CHPLAN_ENT("FO", 0x26, 1, 0x000), /* Faroe Islands (Denmark) */
-	COUNTRY_CHPLAN_ENT("FR", 0x26, 1, 0x7FB), /* France */
-	COUNTRY_CHPLAN_ENT("GA", 0x26, 1, 0x6B0), /* Gabon */
-	COUNTRY_CHPLAN_ENT("GB", 0x26, 1, 0x7FB), /* Great Britain (United Kingdom; England) */
-	COUNTRY_CHPLAN_ENT("GD", 0x34, 1, 0x0B0), /* Grenada */
-	COUNTRY_CHPLAN_ENT("GE", 0x26, 1, 0x600), /* Georgia */
-	COUNTRY_CHPLAN_ENT("GF", 0x26, 1, 0x080), /* French Guiana */
-	COUNTRY_CHPLAN_ENT("GG", 0x26, 1, 0x000), /* Guernsey (UK) */
-	COUNTRY_CHPLAN_ENT("GH", 0x26, 1, 0x7F1), /* Ghana */
-	COUNTRY_CHPLAN_ENT("GI", 0x26, 1, 0x600), /* Gibraltar (UK) */
-	COUNTRY_CHPLAN_ENT("GL", 0x26, 1, 0x600), /* Greenland (Denmark) */
-	COUNTRY_CHPLAN_ENT("GM", 0x26, 1, 0x6B0), /* Gambia */
-	COUNTRY_CHPLAN_ENT("GN", 0x26, 1, 0x610), /* Guinea */
-	COUNTRY_CHPLAN_ENT("GP", 0x26, 1, 0x600), /* Guadeloupe (France) */
-	COUNTRY_CHPLAN_ENT("GQ", 0x26, 1, 0x6B0), /* Equatorial Guinea */
-	COUNTRY_CHPLAN_ENT("GR", 0x26, 1, 0x7FB), /* Greece */
-	COUNTRY_CHPLAN_ENT("GS", 0x26, 1, 0x000), /* South Georgia and the Sandwich Islands (UK) */
-	COUNTRY_CHPLAN_ENT("GT", 0x34, 1, 0x7F1), /* Guatemala */
-	COUNTRY_CHPLAN_ENT("GU", 0x34, 1, 0x600), /* Guam (USA) */
-	COUNTRY_CHPLAN_ENT("GW", 0x26, 1, 0x6B0), /* Guinea-Bissau */
-	COUNTRY_CHPLAN_ENT("GY", 0x44, 1, 0x000), /* Guyana */
-	COUNTRY_CHPLAN_ENT("HK", 0x26, 1, 0x7FB), /* Hong Kong */
-	COUNTRY_CHPLAN_ENT("HM", 0x45, 1, 0x000), /* Heard and McDonald Islands (Australia) */
-	COUNTRY_CHPLAN_ENT("HN", 0x32, 1, 0x7F1), /* Honduras */
-	COUNTRY_CHPLAN_ENT("HR", 0x26, 1, 0x7F9), /* Croatia */
-	COUNTRY_CHPLAN_ENT("HT", 0x34, 1, 0x650), /* Haiti */
-	COUNTRY_CHPLAN_ENT("HU", 0x26, 1, 0x7FB), /* Hungary */
-	COUNTRY_CHPLAN_ENT("ID", 0x54, 0, 0x7F3), /* Indonesia */
-	COUNTRY_CHPLAN_ENT("IE", 0x26, 1, 0x7FB), /* Ireland */
-	COUNTRY_CHPLAN_ENT("IL", 0x47, 1, 0x7F1), /* Israel */
-	COUNTRY_CHPLAN_ENT("IM", 0x26, 1, 0x000), /* Isle of Man (UK) */
-	COUNTRY_CHPLAN_ENT("IN", 0x48, 1, 0x7F1), /* India */
-	COUNTRY_CHPLAN_ENT("IQ", 0x26, 1, 0x000), /* Iraq */
-	COUNTRY_CHPLAN_ENT("IR", 0x26, 0, 0x000), /* Iran */
-	COUNTRY_CHPLAN_ENT("IS", 0x26, 1, 0x7FB), /* Iceland */
-	COUNTRY_CHPLAN_ENT("IT", 0x26, 1, 0x7FB), /* Italy */
-	COUNTRY_CHPLAN_ENT("JE", 0x26, 1, 0x000), /* Jersey (UK) */
-	COUNTRY_CHPLAN_ENT("JM", 0x51, 1, 0x7F1), /* Jamaica */
-	COUNTRY_CHPLAN_ENT("JO", 0x49, 1, 0x7FB), /* Jordan */
-	COUNTRY_CHPLAN_ENT("JP", 0x27, 1, 0x7FF), /* Japan- Telec */
-	COUNTRY_CHPLAN_ENT("KE", 0x47, 1, 0x7F9), /* Kenya */
-	COUNTRY_CHPLAN_ENT("KG", 0x26, 1, 0x7F1), /* Kyrgyzstan */
-	COUNTRY_CHPLAN_ENT("KH", 0x26, 1, 0x7F1), /* Cambodia */
-	COUNTRY_CHPLAN_ENT("KI", 0x26, 1, 0x000), /* Kiribati */
-	COUNTRY_CHPLAN_ENT("KN", 0x34, 1, 0x000), /* Saint Kitts and Nevis */
-	COUNTRY_CHPLAN_ENT("KR", 0x28, 1, 0x7FB), /* South Korea */
-	COUNTRY_CHPLAN_ENT("KW", 0x47, 1, 0x7FB), /* Kuwait */
-	COUNTRY_CHPLAN_ENT("KY", 0x34, 1, 0x000), /* Cayman Islands (UK) */
-	COUNTRY_CHPLAN_ENT("KZ", 0x26, 1, 0x700), /* Kazakhstan */
-	COUNTRY_CHPLAN_ENT("LA", 0x26, 1, 0x000), /* Laos */
-	COUNTRY_CHPLAN_ENT("LB", 0x26, 1, 0x7F1), /* Lebanon */
-	COUNTRY_CHPLAN_ENT("LC", 0x34, 1, 0x000), /* Saint Lucia */
-	COUNTRY_CHPLAN_ENT("LI", 0x26, 1, 0x7FB), /* Liechtenstein */
-	COUNTRY_CHPLAN_ENT("LK", 0x26, 1, 0x7F1), /* Sri Lanka */
-	COUNTRY_CHPLAN_ENT("LR", 0x26, 1, 0x6B0), /* Liberia */
-	COUNTRY_CHPLAN_ENT("LS", 0x26, 1, 0x7F1), /* Lesotho */
-	COUNTRY_CHPLAN_ENT("LT", 0x26, 1, 0x7FB), /* Lithuania */
-	COUNTRY_CHPLAN_ENT("LU", 0x26, 1, 0x7FB), /* Luxembourg */
-	COUNTRY_CHPLAN_ENT("LV", 0x26, 1, 0x7FB), /* Latvia */
-	COUNTRY_CHPLAN_ENT("LY", 0x26, 1, 0x000), /* Libya */
-	COUNTRY_CHPLAN_ENT("MA", 0x47, 1, 0x7F1), /* Morocco */
-	COUNTRY_CHPLAN_ENT("MC", 0x26, 1, 0x7FB), /* Monaco */
-	COUNTRY_CHPLAN_ENT("MD", 0x26, 1, 0x7F1), /* Moldova */
-	COUNTRY_CHPLAN_ENT("ME", 0x26, 1, 0x7F1), /* Montenegro */
-	COUNTRY_CHPLAN_ENT("MF", 0x34, 1, 0x000), /* Saint Martin */
-	COUNTRY_CHPLAN_ENT("MG", 0x26, 1, 0x620), /* Madagascar */
-	COUNTRY_CHPLAN_ENT("MH", 0x34, 1, 0x000), /* Marshall Islands (USA) */
-	COUNTRY_CHPLAN_ENT("MK", 0x26, 1, 0x7F1), /* Republic of Macedonia (FYROM) */
-	COUNTRY_CHPLAN_ENT("ML", 0x26, 1, 0x6B0), /* Mali */
-	COUNTRY_CHPLAN_ENT("MM", 0x26, 1, 0x000), /* Burma (Myanmar) */
-	COUNTRY_CHPLAN_ENT("MN", 0x26, 1, 0x000), /* Mongolia */
-	COUNTRY_CHPLAN_ENT("MO", 0x26, 1, 0x600), /* Macau */
-	COUNTRY_CHPLAN_ENT("MP", 0x34, 1, 0x000), /* Northern Mariana Islands (USA) */
-	COUNTRY_CHPLAN_ENT("MQ", 0x26, 1, 0x640), /* Martinique (France) */
-	COUNTRY_CHPLAN_ENT("MR", 0x26, 1, 0x6A0), /* Mauritania */
-	COUNTRY_CHPLAN_ENT("MS", 0x26, 1, 0x000), /* Montserrat (UK) */
-	COUNTRY_CHPLAN_ENT("MT", 0x26, 1, 0x7FB), /* Malta */
-	COUNTRY_CHPLAN_ENT("MU", 0x26, 1, 0x6B0), /* Mauritius */
-	COUNTRY_CHPLAN_ENT("MV", 0x47, 1, 0x000), /* Maldives */
-	COUNTRY_CHPLAN_ENT("MW", 0x26, 1, 0x6B0), /* Malawi */
-	COUNTRY_CHPLAN_ENT("MX", 0x61, 1, 0x7F1), /* Mexico */
-	COUNTRY_CHPLAN_ENT("MY", 0x63, 1, 0x7F1), /* Malaysia */
-	COUNTRY_CHPLAN_ENT("MZ", 0x26, 1, 0x7F1), /* Mozambique */
-	COUNTRY_CHPLAN_ENT("NA", 0x26, 1, 0x700), /* Namibia */
-	COUNTRY_CHPLAN_ENT("NC", 0x26, 1, 0x000), /* New Caledonia */
-	COUNTRY_CHPLAN_ENT("NE", 0x26, 1, 0x6B0), /* Niger */
-	COUNTRY_CHPLAN_ENT("NF", 0x45, 1, 0x000), /* Norfolk Island (Australia) */
-	COUNTRY_CHPLAN_ENT("NG", 0x75, 1, 0x7F9), /* Nigeria */
-	COUNTRY_CHPLAN_ENT("NI", 0x34, 1, 0x7F1), /* Nicaragua */
-	COUNTRY_CHPLAN_ENT("NL", 0x26, 1, 0x7FB), /* Netherlands */
-	COUNTRY_CHPLAN_ENT("NO", 0x26, 1, 0x7FB), /* Norway */
-	COUNTRY_CHPLAN_ENT("NP", 0x47, 1, 0x6F0), /* Nepal */
-	COUNTRY_CHPLAN_ENT("NR", 0x26, 1, 0x000), /* Nauru */
-	COUNTRY_CHPLAN_ENT("NU", 0x45, 1, 0x000), /* Niue */
-	COUNTRY_CHPLAN_ENT("NZ", 0x45, 1, 0x7FB), /* New Zealand */
-	COUNTRY_CHPLAN_ENT("OM", 0x26, 1, 0x7F9), /* Oman */
-	COUNTRY_CHPLAN_ENT("PA", 0x34, 1, 0x7F1), /* Panama */
-	COUNTRY_CHPLAN_ENT("PE", 0x34, 1, 0x7F1), /* Peru */
-	COUNTRY_CHPLAN_ENT("PF", 0x26, 1, 0x000), /* French Polynesia (France) */
-	COUNTRY_CHPLAN_ENT("PG", 0x26, 1, 0x7F1), /* Papua New Guinea */
-	COUNTRY_CHPLAN_ENT("PH", 0x26, 1, 0x7F1), /* Philippines */
-	COUNTRY_CHPLAN_ENT("PK", 0x51, 1, 0x7F1), /* Pakistan */
-	COUNTRY_CHPLAN_ENT("PL", 0x26, 1, 0x7FB), /* Poland */
-	COUNTRY_CHPLAN_ENT("PM", 0x26, 1, 0x000), /* Saint Pierre and Miquelon (France) */
-	COUNTRY_CHPLAN_ENT("PR", 0x34, 1, 0x7F1), /* Puerto Rico */
-	COUNTRY_CHPLAN_ENT("PT", 0x26, 1, 0x7FB), /* Portugal */
-	COUNTRY_CHPLAN_ENT("PW", 0x34, 1, 0x000), /* Palau */
-	COUNTRY_CHPLAN_ENT("PY", 0x34, 1, 0x7F1), /* Paraguay */
-	COUNTRY_CHPLAN_ENT("QA", 0x51, 1, 0x7F9), /* Qatar */
-	COUNTRY_CHPLAN_ENT("RE", 0x26, 1, 0x000), /* Reunion (France) */
-	COUNTRY_CHPLAN_ENT("RO", 0x26, 1, 0x7F1), /* Romania */
-	COUNTRY_CHPLAN_ENT("RS", 0x26, 1, 0x7F1), /* Serbia, Kosovo */
-	COUNTRY_CHPLAN_ENT("RU", 0x59, 1, 0x7FB), /* Russia(fac/gost), Kaliningrad */
-	COUNTRY_CHPLAN_ENT("RW", 0x26, 1, 0x0B0), /* Rwanda */
-	COUNTRY_CHPLAN_ENT("SA", 0x26, 1, 0x7FB), /* Saudi Arabia */
-	COUNTRY_CHPLAN_ENT("SB", 0x26, 1, 0x000), /* Solomon Islands */
-	COUNTRY_CHPLAN_ENT("SC", 0x34, 1, 0x690), /* Seychelles */
-	COUNTRY_CHPLAN_ENT("SE", 0x26, 1, 0x7FB), /* Sweden */
-	COUNTRY_CHPLAN_ENT("SG", 0x26, 1, 0x7FB), /* Singapore */
-	COUNTRY_CHPLAN_ENT("SH", 0x26, 1, 0x000), /* Saint Helena (UK) */
-	COUNTRY_CHPLAN_ENT("SI", 0x26, 1, 0x7FB), /* Slovenia */
-	COUNTRY_CHPLAN_ENT("SJ", 0x26, 1, 0x000), /* Svalbard (Norway) */
-	COUNTRY_CHPLAN_ENT("SK", 0x26, 1, 0x7FB), /* Slovakia */
-	COUNTRY_CHPLAN_ENT("SL", 0x26, 1, 0x6B0), /* Sierra Leone */
-	COUNTRY_CHPLAN_ENT("SM", 0x26, 1, 0x000), /* San Marino */
-	COUNTRY_CHPLAN_ENT("SN", 0x26, 1, 0x7F1), /* Senegal */
-	COUNTRY_CHPLAN_ENT("SO", 0x26, 1, 0x000), /* Somalia */
-	COUNTRY_CHPLAN_ENT("SR", 0x74, 1, 0x000), /* Suriname */
-	COUNTRY_CHPLAN_ENT("ST", 0x34, 1, 0x680), /* Sao Tome and Principe */
-	COUNTRY_CHPLAN_ENT("SV", 0x30, 1, 0x7F1), /* El Salvador */
-	COUNTRY_CHPLAN_ENT("SX", 0x34, 1, 0x000), /* Sint Marteen */
-	COUNTRY_CHPLAN_ENT("SZ", 0x26, 1, 0x020), /* Swaziland */
-	COUNTRY_CHPLAN_ENT("TC", 0x26, 1, 0x000), /* Turks and Caicos Islands (UK) */
-	COUNTRY_CHPLAN_ENT("TD", 0x26, 1, 0x6B0), /* Chad */
-	COUNTRY_CHPLAN_ENT("TF", 0x26, 1, 0x680), /* French Southern and Antarctic Lands (FR Southern Territories) */
-	COUNTRY_CHPLAN_ENT("TG", 0x26, 1, 0x6B0), /* Togo */
-	COUNTRY_CHPLAN_ENT("TH", 0x26, 1, 0x7F1), /* Thailand */
-	COUNTRY_CHPLAN_ENT("TJ", 0x26, 1, 0x640), /* Tajikistan */
-	COUNTRY_CHPLAN_ENT("TK", 0x45, 1, 0x000), /* Tokelau */
-	COUNTRY_CHPLAN_ENT("TM", 0x26, 1, 0x000), /* Turkmenistan */
-	COUNTRY_CHPLAN_ENT("TN", 0x47, 1, 0x7F1), /* Tunisia */
-	COUNTRY_CHPLAN_ENT("TO", 0x26, 1, 0x000), /* Tonga */
-	COUNTRY_CHPLAN_ENT("TR", 0x26, 1, 0x7F1), /* Turkey, Northern Cyprus */
-	COUNTRY_CHPLAN_ENT("TT", 0x42, 1, 0x3F1), /* Trinidad & Tobago */
-	COUNTRY_CHPLAN_ENT("TW", 0x76, 1, 0x7FF), /* Taiwan */
-	COUNTRY_CHPLAN_ENT("TZ", 0x26, 1, 0x6F0), /* Tanzania */
-	COUNTRY_CHPLAN_ENT("UA", 0x36, 1, 0x7FB), /* Ukraine */
-	COUNTRY_CHPLAN_ENT("UG", 0x26, 1, 0x6F1), /* Uganda */
-	COUNTRY_CHPLAN_ENT("US", 0x76, 1, 0x7FF), /* United States of America (USA) */
-	COUNTRY_CHPLAN_ENT("UY", 0x30, 1, 0x7F1), /* Uruguay */
-	COUNTRY_CHPLAN_ENT("UZ", 0x47, 1, 0x6F0), /* Uzbekistan */
-	COUNTRY_CHPLAN_ENT("VA", 0x26, 1, 0x000), /* Holy See (Vatican City) */
-	COUNTRY_CHPLAN_ENT("VC", 0x34, 1, 0x010), /* Saint Vincent and the Grenadines */
-	COUNTRY_CHPLAN_ENT("VE", 0x30, 1, 0x7F1), /* Venezuela */
-	COUNTRY_CHPLAN_ENT("VI", 0x34, 1, 0x000), /* United States Virgin Islands (USA) */
-	COUNTRY_CHPLAN_ENT("VN", 0x26, 1, 0x7F1), /* Vietnam */
-	COUNTRY_CHPLAN_ENT("VU", 0x26, 1, 0x000), /* Vanuatu */
-	COUNTRY_CHPLAN_ENT("WF", 0x26, 1, 0x000), /* Wallis and Futuna (France) */
-	COUNTRY_CHPLAN_ENT("WS", 0x34, 1, 0x000), /* Samoa */
-	COUNTRY_CHPLAN_ENT("YE", 0x26, 1, 0x040), /* Yemen */
-	COUNTRY_CHPLAN_ENT("YT", 0x26, 1, 0x680), /* Mayotte (France) */
-	COUNTRY_CHPLAN_ENT("ZA", 0x26, 1, 0x7F1), /* South Africa */
-	COUNTRY_CHPLAN_ENT("ZM", 0x26, 1, 0x6B0), /* Zambia */
-	COUNTRY_CHPLAN_ENT("ZW", 0x26, 1, 0x7F1), /* Zimbabwe */
-};
-
-/*
-* rtw_get_chplan_from_country -
-* @country_code: string of country code
-*
-* Return pointer of struct country_chplan entry or NULL when unsupported country_code is given
-*/
-const struct country_chplan *rtw_get_chplan_from_country(const char *country_code)
-{
-#if RTW_DEF_MODULE_REGULATORY_CERT
-	const struct country_chplan *exc_ent = NULL;
-#endif
-	const struct country_chplan *ent = NULL;
-	const struct country_chplan *map = NULL;
-	u16 map_sz = 0;
-	char code[2];
-	int i;
-
-	code[0] = alpha_to_upper(country_code[0]);
-	code[1] = alpha_to_upper(country_code[1]);
-
-#ifdef CONFIG_CUSTOMIZED_COUNTRY_CHPLAN_MAP
-	map = CUSTOMIZED_country_chplan_map;
-	map_sz = sizeof(CUSTOMIZED_country_chplan_map) / sizeof(struct country_chplan);
-#else
-	#if RTW_DEF_MODULE_REGULATORY_CERT
-	exc_ent = rtw_def_module_get_chplan_from_country(code);
-	#endif
-	map = country_chplan_map;
-	map_sz = sizeof(country_chplan_map) / sizeof(struct country_chplan);
-#endif
-
-	for (i = 0; i < map_sz; i++) {
-		if (strncmp(code, map[i].alpha2, 2) == 0) {
-			ent = &map[i];
-			break;
-		}
-	}
-
-exit:
-	#if RTW_DEF_MODULE_REGULATORY_CERT
-	if (!ent || !(COUNTRY_CHPLAN_DEF_MODULE_FALGS(ent) & RTW_DEF_MODULE_REGULATORY_CERT))
-		exc_ent = ent = NULL;
-	if (exc_ent)
-		ent = exc_ent;
-	#endif
-
-	return ent;
-}
-
 const char *const _regd_str[] = {
 	"NONE",
 	"FCC",
@@ -1161,7 +694,6 @@ struct regd_exc_ent *_rtw_regd_exc_search(struct rf_ctl_t *rfctl, const char *co
 		break;
 	}
 
-exit:
 	if (match)
 		return ent;
 	else
@@ -1341,13 +873,13 @@ void dump_txpwr_lmt(void *sel, _adapter *adapter)
 						ent = LIST_CONTAINOR(cur, struct txpwr_lmt_ent, list);
 						cur = get_next(cur);
 
-						sprintf(fmt, "%%%zus%%s ", strlen(ent->regd_name) < 4 ? 5 - strlen(ent->regd_name) : 1);
+						sprintf(fmt, "%%%zus%%s ", strlen(ent->regd_name) >= 6 ? 1 : 6 - strlen(ent->regd_name));
 						snprintf(tmp_str, TMP_STR_LEN, fmt
 							, strcmp(ent->regd_name, rfctl->regd_name) == 0 ? "*" : ""
 							, ent->regd_name);
 						_RTW_PRINT_SEL(sel, "%s", tmp_str);
 					}
-					sprintf(fmt, "%%%zus%%s ", strlen(regd_str(TXPWR_LMT_WW)) < 4 ? 5 - strlen(regd_str(TXPWR_LMT_WW)) : 1);
+					sprintf(fmt, "%%%zus%%s ", strlen(regd_str(TXPWR_LMT_WW)) >= 6 ? 1 : 6 - strlen(regd_str(TXPWR_LMT_WW)));
 					snprintf(tmp_str, TMP_STR_LEN, fmt
 						, strcmp(rfctl->regd_name, regd_str(TXPWR_LMT_WW)) == 0 ? "*" : ""
 						, regd_str(TXPWR_LMT_WW));
@@ -1394,45 +926,41 @@ void dump_txpwr_lmt(void *sel, _adapter *adapter)
 							ent = LIST_CONTAINOR(cur, struct txpwr_lmt_ent, list);
 							cur = get_next(cur);
 							lmt = phy_get_txpwr_lmt_abs(adapter, ent->regd_name, band, bw, tlrs, ntx_idx, ch, 0);
-							if (lmt == MAX_POWER_INDEX) {
-								sprintf(fmt, "%%%zus ", strlen(ent->regd_name) >= 5 ? strlen(ent->regd_name) + 1 : 5);
+							if (lmt == hal_spec->txgi_max) {
+								sprintf(fmt, "%%%zus ", strlen(ent->regd_name) >= 6 ? strlen(ent->regd_name) + 1 : 6);
 								snprintf(tmp_str, TMP_STR_LEN, fmt, "NA");
 								_RTW_PRINT_SEL(sel, "%s", tmp_str);
-							} else {
-								if (lmt == -1) { /* -0.5 */
-									sprintf(fmt, "%%%zus ", strlen(ent->regd_name) >= 5 ? strlen(ent->regd_name) + 1 : 5);
-									snprintf(tmp_str, TMP_STR_LEN, fmt, "-0.5");
-									_RTW_PRINT_SEL(sel, "%s", tmp_str);
-								} else if (lmt % 2) { /* n.5 */
-									sprintf(fmt, "%%%zud.5 ", strlen(ent->regd_name) >= 5 ? strlen(ent->regd_name) - 1 : 3);
-									snprintf(tmp_str, TMP_STR_LEN, fmt, lmt / 2);
-									_RTW_PRINT_SEL(sel, "%s", tmp_str);
-								} else { /* n */
-									sprintf(fmt, "%%%zud ", strlen(ent->regd_name) >= 5 ? strlen(ent->regd_name) + 1 : 5);
-									snprintf(tmp_str, TMP_STR_LEN, fmt, lmt / 2);
-									_RTW_PRINT_SEL(sel, "%s", tmp_str);
-								}
+							} else if (lmt > -hal_spec->txgi_pdbm && lmt < 0) { /* -0.xx */
+								sprintf(fmt, "%%%zus-0.%%d ", strlen(ent->regd_name) >= 6 ? strlen(ent->regd_name) - 4 : 1);
+								snprintf(tmp_str, TMP_STR_LEN, fmt, "", (rtw_abs(lmt) % hal_spec->txgi_pdbm) * 100 / hal_spec->txgi_pdbm);
+								_RTW_PRINT_SEL(sel, "%s", tmp_str);
+							} else if (lmt % hal_spec->txgi_pdbm) { /* d.xx */
+								sprintf(fmt, "%%%zud.%%d ", strlen(ent->regd_name) >= 6 ? strlen(ent->regd_name) - 2 : 3);
+								snprintf(tmp_str, TMP_STR_LEN, fmt, lmt / hal_spec->txgi_pdbm, (rtw_abs(lmt) % hal_spec->txgi_pdbm) * 100 / hal_spec->txgi_pdbm);
+								_RTW_PRINT_SEL(sel, "%s", tmp_str);
+							} else { /* d */
+								sprintf(fmt, "%%%zud ", strlen(ent->regd_name) >= 6 ? strlen(ent->regd_name) + 1 : 6);
+								snprintf(tmp_str, TMP_STR_LEN, fmt, lmt / hal_spec->txgi_pdbm);
+								_RTW_PRINT_SEL(sel, "%s", tmp_str);
 							}
 						}
 						lmt = phy_get_txpwr_lmt_abs(adapter, regd_str(TXPWR_LMT_WW), band, bw, tlrs, ntx_idx, ch, 0);
-						if (lmt == MAX_POWER_INDEX) {
-							sprintf(fmt, "%%%zus ", strlen(regd_str(TXPWR_LMT_WW)) >= 5 ? strlen(regd_str(TXPWR_LMT_WW)) + 1 : 5);
+						if (lmt == hal_spec->txgi_max) {
+							sprintf(fmt, "%%%zus ", strlen(regd_str(TXPWR_LMT_WW)) >= 6 ? strlen(regd_str(TXPWR_LMT_WW)) + 1 : 6);
 							snprintf(tmp_str, TMP_STR_LEN, fmt, "NA");
 							_RTW_PRINT_SEL(sel, "%s", tmp_str);
-						} else {
-							if (lmt == -1) { /* -0.5 */
-								sprintf(fmt, "%%%zus ", strlen(regd_str(TXPWR_LMT_WW)) >= 5 ? strlen(regd_str(TXPWR_LMT_WW)) + 1 : 5);
-								snprintf(tmp_str, TMP_STR_LEN, fmt, "-0.5");
-								_RTW_PRINT_SEL(sel, "%s", tmp_str);
-							} else if (lmt % 2) { /* n.5 */
-								sprintf(fmt, "%%%zud.5 ", strlen(regd_str(TXPWR_LMT_WW)) >= 5 ? strlen(regd_str(TXPWR_LMT_WW)) - 1 : 3);
-								snprintf(tmp_str, TMP_STR_LEN, fmt, lmt / 2);
-								_RTW_PRINT_SEL(sel, "%s", tmp_str);
-							} else { /* n */
-								sprintf(fmt, "%%%zud ", strlen(regd_str(TXPWR_LMT_WW)) >= 5 ? strlen(regd_str(TXPWR_LMT_WW)) + 1 : 5);
-								snprintf(tmp_str, TMP_STR_LEN, fmt, lmt / 2);
-								_RTW_PRINT_SEL(sel, "%s", tmp_str);
-							}
+						} else if (lmt > -hal_spec->txgi_pdbm && lmt < 0) { /* -0.xx */
+							sprintf(fmt, "%%%zus-0.%%d ", strlen(regd_str(TXPWR_LMT_WW)) >= 6 ? strlen(regd_str(TXPWR_LMT_WW)) - 4 : 1);
+							snprintf(tmp_str, TMP_STR_LEN, fmt, "", (rtw_abs(lmt) % hal_spec->txgi_pdbm) * 100 / hal_spec->txgi_pdbm);
+							_RTW_PRINT_SEL(sel, "%s", tmp_str);
+						} else if (lmt % hal_spec->txgi_pdbm) { /* d.xx */
+							sprintf(fmt, "%%%zud.%%d ", strlen(regd_str(TXPWR_LMT_WW)) >= 6 ? strlen(regd_str(TXPWR_LMT_WW)) - 2 : 3);
+							snprintf(tmp_str, TMP_STR_LEN, fmt, lmt / hal_spec->txgi_pdbm, (rtw_abs(lmt) % hal_spec->txgi_pdbm) * 100 / hal_spec->txgi_pdbm);
+							_RTW_PRINT_SEL(sel, "%s", tmp_str);
+						} else { /* d */
+							sprintf(fmt, "%%%zud ", strlen(regd_str(TXPWR_LMT_WW)) >= 6 ? strlen(regd_str(TXPWR_LMT_WW)) + 1 : 6);
+							snprintf(tmp_str, TMP_STR_LEN, fmt, lmt / hal_spec->txgi_pdbm);
+							_RTW_PRINT_SEL(sel, "%s", tmp_str);
 						}
 
 						/* dump limit offset of each path */
@@ -1450,8 +978,8 @@ void dump_txpwr_lmt(void *sel, _adapter *adapter)
 								ent = LIST_CONTAINOR(cur, struct txpwr_lmt_ent, list);
 								cur = get_next(cur);
 								lmt_offset = phy_get_txpwr_lmt(adapter, ent->regd_name, band, bw, path, rs, ntx_idx, ch, 0);
-								if (lmt_offset == MAX_POWER_INDEX) {
-									*(lmt_idx + i * RF_PATH_MAX + path) = MAX_POWER_INDEX;
+								if (lmt_offset == hal_spec->txgi_max) {
+									*(lmt_idx + i * RF_PATH_MAX + path) = hal_spec->txgi_max;
 									_RTW_PRINT_SEL(sel, "%3s ", "NA");
 								} else {
 									*(lmt_idx + i * RF_PATH_MAX + path) = lmt_offset + base;
@@ -1460,7 +988,7 @@ void dump_txpwr_lmt(void *sel, _adapter *adapter)
 								i++;
 							}
 							lmt_offset = phy_get_txpwr_lmt(adapter, regd_str(TXPWR_LMT_WW), band, bw, path, rs, ntx_idx, ch, 0);
-							if (lmt_offset == MAX_POWER_INDEX)
+							if (lmt_offset == hal_spec->txgi_max)
 								_RTW_PRINT_SEL(sel, "%3s ", "NA");
 							else
 								_RTW_PRINT_SEL(sel, "%3d ", lmt_offset);
@@ -1502,6 +1030,7 @@ release_lock:
 void rtw_txpwr_lmt_add_with_nlen(struct rf_ctl_t *rfctl, const char *regd_name, u32 nlen
 	, u8 band, u8 bw, u8 tlrs, u8 ntx_idx, u8 ch_idx, s8 lmt)
 {
+	struct hal_spec_t *hal_spec = GET_HAL_SPEC(dvobj_get_primary_adapter(rfctl_to_dvobj(rfctl)));
 	struct txpwr_lmt_ent *ent;
 	_irqL irqL;
 	_list *cur, *head;
@@ -1540,13 +1069,13 @@ void rtw_txpwr_lmt_add_with_nlen(struct rf_ctl_t *rfctl, const char *regd_name,
 			for (k = 0; k < TXPWR_LMT_RS_NUM_2G; ++k)
 				for (m = 0; m < CENTER_CH_2G_NUM; ++m)
 					for (l = 0; l < MAX_TX_COUNT; ++l)
-						ent->lmt_2g[j][k][m][l] = MAX_POWER_INDEX;
+						ent->lmt_2g[j][k][m][l] = hal_spec->txgi_max;
 		#ifdef CONFIG_IEEE80211_BAND_5GHZ
 		for (j = 0; j < MAX_5G_BANDWIDTH_NUM; ++j)
 			for (k = 0; k < TXPWR_LMT_RS_NUM_5G; ++k)
 				for (m = 0; m < CENTER_CH_5G_ALL_NUM; ++m)
 					for (l = 0; l < MAX_TX_COUNT; ++l)
-						ent->lmt_5g[j][k][m][l] = MAX_POWER_INDEX;
+						ent->lmt_5g[j][k][m][l] = hal_spec->txgi_max;
 		#endif
 	}
 
@@ -1563,7 +1092,7 @@ chk_lmt_val:
 	else
 		goto release_lock;
 
-	if (pre_lmt != MAX_POWER_INDEX)
+	if (pre_lmt != hal_spec->txgi_max)
 		RTW_PRINT("duplicate txpwr_lmt for [%s][%s][%s][%s][%uT][%d]\n"
 			, regd_name, band_str(band), ch_width_str(bw), txpwr_lmt_rs_str(tlrs), ntx_idx + 1
 			, band == BAND_ON_2_4G ? ch_idx + 1 : center_ch_5g_all[ch_idx]);
@@ -1684,7 +1213,6 @@ s8 rtw_rf_get_kfree_tx_gain_offset(_adapter *padapter, u8 path, u8 ch)
 	s8 kfree_offset = 0;
 
 #ifdef CONFIG_RF_POWER_TRIM
-	HAL_DATA_TYPE *hal_data = GET_HAL_DATA(padapter);
 	struct kfree_data_t *kfree_data = GET_KFREE_DATA(padapter);
 	s8 bb_gain_sel = rtw_ch_to_bb_gain_sel(ch);
 
@@ -1710,7 +1238,9 @@ exit:
 
 void rtw_rf_set_tx_gain_offset(_adapter *adapter, u8 path, s8 offset)
 {
+#if !defined(CONFIG_RTL8814A) && !defined(CONFIG_RTL8822B) && !defined(CONFIG_RTL8821C)
 	u8 write_value;
+#endif
 	u8 target_path = 0;
 	u32 val32 = 0;
 
@@ -1749,6 +1279,12 @@ void rtw_rf_set_tx_gain_offset(_adapter *adapter, u8 path, s8 offset)
 		rtw_hal_write_rfreg(adapter, target_path, 0x55, 0x0fc000, write_value);
 		break;
 #endif /* CONFIG_RTL8188F */
+#ifdef CONFIG_RTL8188GTV
+	case RTL8188GTV:
+		write_value = RF_TX_GAIN_OFFSET_8188GTV(offset);
+		rtw_hal_write_rfreg(adapter, target_path, 0x55, 0x0fc000, write_value);
+		break;
+#endif /* CONFIG_RTL8188GTV */
 #ifdef CONFIG_RTL8192E
 	case RTL8192E:
 		write_value = RF_TX_GAIN_OFFSET_8192E(offset);
@@ -1762,10 +1298,11 @@ void rtw_rf_set_tx_gain_offset(_adapter *adapter, u8 path, s8 offset)
 		rtw_hal_write_rfreg(adapter, target_path, 0x55, 0x0f8000, write_value);
 		break;
 #endif /* CONFIG_RTL8821A */
-#if defined(CONFIG_RTL8814A) || defined(CONFIG_RTL8822B) || defined(CONFIG_RTL8821C)
+#if defined(CONFIG_RTL8814A) || defined(CONFIG_RTL8822B) || defined(CONFIG_RTL8821C) || defined(CONFIG_RTL8192F)
 	case RTL8814A:
 	case RTL8822B:
 	case RTL8821C:
+	case RTL8192F:
 		RTW_INFO("\nkfree by PhyDM on the sw CH. path %d\n", path);
 		break;
 #endif /* CONFIG_RTL8814A || CONFIG_RTL8822B || CONFIG_RTL8821C */
@@ -1806,34 +1343,6 @@ void rtw_rf_apply_tx_gain_offset(_adapter *adapter, u8 ch)
 	}
 }
 
-inline u8 rtw_is_5g_band1(u8 ch)
-{
-	if (ch >= 36 && ch <= 48)
-		return 1;
-	return 0;
-}
-
-inline u8 rtw_is_5g_band2(u8 ch)
-{
-	if (ch >= 52 && ch <= 64)
-		return 1;
-	return 0;
-}
-
-inline u8 rtw_is_5g_band3(u8 ch)
-{
-	if (ch >= 100 && ch <= 144)
-		return 1;
-	return 0;
-}
-
-inline u8 rtw_is_5g_band4(u8 ch)
-{
-	if (ch >= 149 && ch <= 177)
-		return 1;
-	return 0;
-}
-
 inline u8 rtw_is_dfs_range(u32 hi, u32 lo)
 {
 	return rtw_is_range_overlap(hi, lo, 5720 + 10, 5260 - 10);
diff --git a/rtl8723DS/core/rtw_rm.c b/rtl8723DS/core/rtw_rm.c
index 25efc11..6576597 100755..100644
--- a/rtl8723DS/core/rtw_rm.c
+++ b/rtl8723DS/core/rtw_rm.c
@@ -430,40 +430,17 @@ int issue_null_reply(struct rm_obj *prm)
 int ready_for_scan(struct rm_obj *prm)
 {
 	_adapter *padapter = prm->psta->padapter;
-	struct mlme_priv *pmlmepriv = &padapter->mlmepriv;
-
-
-	if (rtw_is_scan_deny(padapter))
-		return _FALSE;
+	u8 ssc_chk;
 
 	if (!rtw_is_adapter_up(padapter))
 		return _FALSE;
 
-	if (rtw_mi_busy_traffic_check(padapter, _FALSE))
-		return _FALSE;
+	ssc_chk = rtw_sitesurvey_condition_check(padapter, _FALSE);
 
-	if (check_fwstate(pmlmepriv, WIFI_AP_STATE)
-		&& check_fwstate(pmlmepriv, WIFI_UNDER_WPS)) {
-		RTW_INFO(FUNC_ADPT_FMT" WIFI_AP_STATE && WIFI_UNDER_WPS\n",
-		FUNC_ADPT_ARG(padapter));
-		return _FALSE;
-	}
-	if (check_fwstate(pmlmepriv,
-		(_FW_UNDER_SURVEY | _FW_UNDER_LINKING)) == _TRUE) {
-		RTW_INFO(FUNC_ADPT_FMT" _FW_UNDER_SURVEY|_FW_UNDER_LINKING\n",
-			FUNC_ADPT_ARG(padapter));
-		return _FALSE;
-	}
+	if (ssc_chk == SS_ALLOW)
+		return _SUCCESS;
 
-#ifdef CONFIG_CONCURRENT_MODE
-	if (rtw_mi_buddy_check_fwstate(padapter,
-		(_FW_UNDER_SURVEY | _FW_UNDER_LINKING | WIFI_UNDER_WPS))) {
-		RTW_INFO(FUNC_ADPT_FMT", but buddy_intf is under scanning or linking or wps_phase\n",
-			FUNC_ADPT_ARG(padapter));
-		return _FALSE;
-	}
-#endif
-	return _SUCCESS;
+	return _FALSE;
 }
 
 int rm_sitesurvey(struct rm_obj *prm)
@@ -1872,32 +1849,43 @@ int rm_radio_meas_report_cond(struct rm_obj *prm)
 
 int retrieve_radio_meas_result(struct rm_obj *prm)
 {
-	int i;
+	HAL_DATA_TYPE *hal_data = GET_HAL_DATA(prm->psta->padapter);
+	int i, ch = -1;
 	u8 val8;
 
 
+	ch = rtw_chset_search_ch(adapter_to_chset(prm->psta->padapter),
+		prm->q.ch_num);
+
+	if ((ch == -1) || (ch >= MAX_CHANNEL_NUM)) {
+		RTW_ERR("RM: get ch(CH:%d) fail\n", prm->q.ch_num);
+		ch = 0;
+	}
+
 	switch (prm->q.m_type) {
 	case ch_load_req:
-#ifdef CONFOG_RTK_ACS
-		val8 = rtw_acs_get_clm_ratio_by_ch_num(
-			prm->psta->padapter,prm->q.ch_num);
-		val8 = 255 * (val8/100);
+#ifdef CONFIG_RTW_ACS
+		val8 = hal_data->acs.clm_ratio[ch];
 #else
 		val8 = 0;
 #endif
 		prm->p.ch_load = val8;
 		break;
 	case noise_histo_req:
+#ifdef CONFIG_RTW_ACS
 		/* ANPI */
-#ifdef CONFIG_BACKGROUND_NOISE_MONITOR
-		//val8 = rtw_noise_query_by_chan_num(padapter, cur_chan);
-		prm->p.anpi = 0; /* TODO */
+		prm->p.anpi = hal_data->acs.nhm_ratio[ch];
+
+		/* IPI 0~10 */
+		for (i=0;i<11;i++)
+			prm->p.ipi[i] = hal_data->acs.nhm[ch][i];
+		
 #else
 		val8 = 0;
-#endif
-		/* IPI 0~10 TODO */
+		prm->p.anpi = val8;
 		for (i=0;i<11;i++)
-			prm->p.ipi[i] = i;
+			prm->p.ipi[i] = val8;
+#endif
 		break;
 	default:
 		break;
@@ -1987,9 +1975,12 @@ done:
 void rtw_ap_parse_sta_rm_en_cap(_adapter *padapter,
 	struct sta_info *psta, struct rtw_ieee802_11_elems *elem)
 {
-	RTW_INFO("assoc.rm_en_cap="RM_CAP_FMT"\n", RM_CAP_ARG(elem->rm_en_cap));
-	_rtw_memcpy(psta->rm_en_cap,
-		(elem->rm_en_cap), elem->rm_en_cap_len);
+	if (elem->rm_en_cap) {
+		RTW_INFO("assoc.rm_en_cap="RM_CAP_FMT"\n",
+			RM_CAP_ARG(elem->rm_en_cap));
+		_rtw_memcpy(psta->rm_en_cap,
+			(elem->rm_en_cap), elem->rm_en_cap_len);
+	}
 }
 
 void RM_IE_handler(_adapter *padapter, PNDIS_802_11_VARIABLE_IEs pIE)
diff --git a/rtl8723DS/core/rtw_rm_fsm.c b/rtl8723DS/core/rtw_rm_fsm.c
index 1ed3c9d..21fb323 100755..100644
--- a/rtl8723DS/core/rtw_rm_fsm.c
+++ b/rtl8723DS/core/rtw_rm_fsm.c
@@ -656,8 +656,8 @@ static int rm_state_do_meas(struct rm_obj *prm, enum RM_EV_ID evid)
 	case RM_EV_start_meas:
 		if (prm->q.action_code == RM_ACT_RADIO_MEAS_REQ) {
 			/* resotre measurement start time */
-			rtw_hal_get_hwreg(padapter, HW_VAR_TSF, (u8 *)&val64);
-			prm->meas_start_time = val64;
+			prm->meas_start_time = rtw_hal_get_tsftr_by_port(padapter
+									, rtw_hal_get_port(padapter));
 
 			switch (prm->q.m_type) {
 			case bcn_req:
@@ -741,8 +741,8 @@ static int rm_state_do_meas(struct rm_obj *prm, enum RM_EV_ID evid)
 	case RM_EV_state_out:
 		rm_cancel_clock(prm);
 		/* resotre measurement end time */
-		rtw_hal_get_hwreg(padapter, HW_VAR_TSF, (u8 *)&val64);
-		_rtw_memcpy(&prm->meas_end_time, (char *)&val64, sizeof(u64));
+		prm->meas_end_time = rtw_hal_get_tsftr_by_port(padapter
+								, rtw_hal_get_port(padapter));
 
 		val8 = 0; /* Disable free run counter */
 		rtw_hal_set_hwreg(padapter, HW_VAR_FREECNT, &val8);
diff --git a/rtl8723DS/core/rtw_rson.c b/rtl8723DS/core/rtw_rson.c
index 9d3cd53..4fbdbb5 100755..100644
--- a/rtl8723DS/core/rtw_rson.c
+++ b/rtl8723DS/core/rtw_rson.c
@@ -326,6 +326,9 @@ int rtw_rson_isupdate_roamcan(struct mlme_priv *mlme
 		|| (rson_comp.id != CONFIG_RTW_REPEATER_SON_ID))
 		return _FALSE;
 
+	if (is_match_bssid(competitor->network.MacAddress, rtw_rson_block_bssid, rtw_rson_block_bssid_idx) == _TRUE)
+		return _FALSE;
+
 	if ((!mlme->cur_network_scanned)
 		|| (mlme->cur_network_scanned == competitor)
 		|| (rtw_get_rson_struct(&(mlme->cur_network_scanned->network), &rson_curr)) != _TRUE)
@@ -510,7 +513,7 @@ void rtw_rson_scan_cmd_hdl(_adapter *padapter, int op)
 	struct mlme_priv *pmlmepriv = &padapter->mlmepriv;
 	u8 val8;
 
-	if (mlmeext_chk_scan_state(pmlmeext, SCAN_DISABLE) != _FALSE)
+	if (mlmeext_chk_scan_state(pmlmeext, SCAN_DISABLE) != _TRUE)
 		return;
 	if (op == RSON_SCAN_PROCESS) {
 		padapter->rtw_rson_scanstage = RSON_SCAN_PROCESS;
@@ -552,7 +555,7 @@ void rtw_rson_scan_cmd_hdl(_adapter *padapter, int op)
 								RTW_INFO("change to widi listen\n");
 							}
 #endif /* CONFIG_INTEL_WIDI */
-							rtw_free_assoc_resources(padapter, 1);
+							rtw_free_assoc_resources(padapter, _TRUE);
 							rtw_indicate_disconnect(padapter, 0, _FALSE);
 						} else
 							pmlmepriv->to_join = _TRUE;
diff --git a/rtl8723DS/core/rtw_sdio.c b/rtl8723DS/core/rtw_sdio.c
index e8f49bf..e8f49bf 100755..100644
--- a/rtl8723DS/core/rtw_sdio.c
+++ b/rtl8723DS/core/rtw_sdio.c
diff --git a/rtl8723DS/core/rtw_security.c b/rtl8723DS/core/rtw_security.c
index 1cbe845..b537a26 100755..100644
--- a/rtl8723DS/core/rtw_security.c
+++ b/rtl8723DS/core/rtw_security.c
@@ -982,13 +982,6 @@ static void next_key(u8 *key, sint round);
 static void byte_sub(u8 *in, u8 *out);
 static void shift_row(u8 *in, u8 *out);
 static void mix_column(u8 *in, u8 *out);
-#ifndef PLATFORM_FREEBSD
-static void add_round_key(u8 *shiftrow_in,
-			  u8 *mcol_in,
-			  u8 *block_in,
-			  sint round,
-			  u8 *out);
-#endif /* PLATFORM_FREEBSD */
 static void aes128k128d(u8 *key, u8 *data, u8 *ciphertext);
 
 
@@ -1394,8 +1387,7 @@ static sint aes_cipher(u8 *key, uint	hdrlen,
 		((frtype | frsubtype) == WIFI_DATA_CFPOLL) ||
 		((frtype | frsubtype) == WIFI_DATA_CFACKPOLL)) {
 		qc_exists = 1;
-		if (hdrlen !=  WLAN_HDR_A3_QOS_LEN)
-
+		if (hdrlen != WLAN_HDR_A3_QOS_LEN && hdrlen != WLAN_HDR_A4_QOS_LEN)
 			hdrlen += 2;
 	}
 	/* add for CONFIG_IEEE80211W, none 11w also can use */
@@ -1404,8 +1396,7 @@ static sint aes_cipher(u8 *key, uint	hdrlen,
 		  (frsubtype == 0x09) ||
 		  (frsubtype == 0x0a) ||
 		  (frsubtype == 0x0b))) {
-		if (hdrlen !=  WLAN_HDR_A3_QOS_LEN)
-
+		if (hdrlen != WLAN_HDR_A3_QOS_LEN && hdrlen != WLAN_HDR_A4_QOS_LEN)
 			hdrlen += 2;
 		qc_exists = 1;
 	} else
@@ -1715,8 +1706,7 @@ static sint aes_decipher(u8 *key, uint	hdrlen,
 		((frtype | frsubtype) == WIFI_DATA_CFPOLL) ||
 		((frtype | frsubtype) == WIFI_DATA_CFACKPOLL)) {
 		qc_exists = 1;
-		if (hdrlen !=  WLAN_HDR_A3_QOS_LEN)
-
+		if (hdrlen != WLAN_HDR_A3_QOS_LEN && hdrlen != WLAN_HDR_A4_QOS_LEN)
 			hdrlen += 2;
 	} /* only for data packet . add for CONFIG_IEEE80211W, none 11w also can use */
 	else if ((frtype == WIFI_DATA) &&
@@ -1724,8 +1714,7 @@ static sint aes_decipher(u8 *key, uint	hdrlen,
 		  (frsubtype == 0x09) ||
 		  (frsubtype == 0x0a) ||
 		  (frsubtype == 0x0b))) {
-		if (hdrlen !=  WLAN_HDR_A3_QOS_LEN)
-
+		if (hdrlen != WLAN_HDR_A3_QOS_LEN && hdrlen != WLAN_HDR_A4_QOS_LEN)
 			hdrlen += 2;
 		qc_exists = 1;
 	} else
@@ -1933,7 +1922,6 @@ u32	rtw_aes_decrypt(_adapter *padapter, u8 *precvframe)
 
 
 	sint		length;
-	u32	prwskeylen;
 	u8	*pframe, *prwskey;	/* , *payload,*iv */
 	struct	sta_info		*stainfo;
 	struct	rx_pkt_attrib	*prxattrib = &((union recv_frame *)precvframe)->u.hdr.attrib;
@@ -1954,7 +1942,11 @@ u32	rtw_aes_decrypt(_adapter *padapter, u8 *precvframe)
 
 				/* RTW_INFO("rx bc/mc packets, to perform sw rtw_aes_decrypt\n"); */
 				/* prwskey = psecuritypriv->dot118021XGrpKey[psecuritypriv->dot118021XGrpKeyid].skey; */
-				if (psecuritypriv->binstallGrpkey == _FALSE) {
+				if ((!MLME_IS_MESH(padapter) && psecuritypriv->binstallGrpkey == _FALSE)
+					#ifdef CONFIG_RTW_MESH
+					|| !(stainfo->gtk_bmp | BIT(prxattrib->key_index))
+					#endif
+				) {
 					res = _FAIL;
 
 					if (start == 0)
@@ -1986,12 +1978,20 @@ u32	rtw_aes_decrypt(_adapter *padapter, u8 *precvframe)
 				no_gkey_bc_cnt = 0;
 				no_gkey_mc_cnt = 0;
 
-				prwskey = psecuritypriv->dot118021XGrpKey[prxattrib->key_index].skey;
-				if (psecuritypriv->dot118021XGrpKeyid != prxattrib->key_index) {
-					RTW_DBG("not match packet_index=%d, install_index=%d\n"
-						, prxattrib->key_index, psecuritypriv->dot118021XGrpKeyid);
-					res = _FAIL;
-					goto exit;
+				#ifdef CONFIG_RTW_MESH
+				if (MLME_IS_MESH(padapter)) {
+					/* TODO: multiple GK? */
+					prwskey = &stainfo->gtk.skey[0];
+				} else
+				#endif
+				{
+					prwskey = psecuritypriv->dot118021XGrpKey[prxattrib->key_index].skey;
+					if (psecuritypriv->dot118021XGrpKeyid != prxattrib->key_index) {
+						RTW_DBG("not match packet_index=%d, install_index=%d\n"
+							, prxattrib->key_index, psecuritypriv->dot118021XGrpKeyid);
+						res = _FAIL;
+						goto exit;
+					}
 				}
 			} else
 				prwskey = &stainfo->dot118021x_UncstKey.skey[0];
@@ -2131,6 +2131,7 @@ BIP_exit:
 #endif /* CONFIG_IEEE80211W */
 
 #ifndef PLATFORM_FREEBSD
+#if defined(CONFIG_TDLS)
 /* compress 512-bits */
 static int sha256_compress(struct sha256_state *md, unsigned char *buf)
 {
@@ -2311,10 +2312,12 @@ static u8 os_strlen(const char *s)
 		p++;
 	return p - s;
 }
+#endif
 
-static int os_memcmp(void *s1, void *s2, u8 n)
+#if defined(CONFIG_TDLS) || defined(CONFIG_RTW_MESH_AEK)
+static int os_memcmp(const void *s1, const void *s2, u8 n)
 {
-	unsigned char *p1 = s1, *p2 = s2;
+	const unsigned char *p1 = s1, *p2 = s2;
 
 	if (n == 0)
 		return 0;
@@ -2329,6 +2332,7 @@ static int os_memcmp(void *s1, void *s2, u8 n)
 
 	return *p1 - *p2;
 }
+#endif
 
 /**
  * hmac_sha256_vector - HMAC-SHA256 over data vector (RFC 2104)
@@ -2339,6 +2343,7 @@ static int os_memcmp(void *s1, void *s2, u8 n)
  * @len: Lengths of the data blocks
  * @mac: Buffer for the hash (32 bytes)
  */
+#if defined(CONFIG_TDLS)
 static void hmac_sha256_vector(u8 *key, size_t key_len, size_t num_elem,
 			       u8 *addr[], size_t *len, u8 *mac)
 {
@@ -2400,6 +2405,7 @@ static void hmac_sha256_vector(u8 *key, size_t key_len, size_t num_elem,
 	_len[1] = 32;
 	sha256_vector(2, _addr, _len, mac);
 }
+#endif /* CONFIG_TDLS */
 #endif /* PLATFORM_FREEBSD */
 /**
  * sha256_prf - SHA256-based Pseudo-Random Function (IEEE 802.11r, 8.5.1.5.2)
@@ -2415,6 +2421,7 @@ static void hmac_sha256_vector(u8 *key, size_t key_len, size_t num_elem,
  * given key.
  */
 #ifndef PLATFORM_FREEBSD /* Baron */
+#if defined(CONFIG_TDLS)
 static void sha256_prf(u8 *key, size_t key_len, char *label,
 		       u8 *data, size_t data_len, u8 *buf, size_t buf_len)
 {
@@ -2451,6 +2458,7 @@ static void sha256_prf(u8 *key, size_t key_len, char *label,
 		counter++;
 	}
 }
+#endif
 #endif /* PLATFORM_FREEBSD Baron */
 
 /* AES tables*/
@@ -2849,6 +2857,231 @@ int omac1_aes_128(const u8 *key, const u8 *data, size_t data_len, u8 *mac)
 }
 #endif /* PLATFORM_FREEBSD Baron */
 
+#ifdef CONFIG_RTW_MESH_AEK
+/* for AES-SIV */
+#define os_memset _rtw_memset
+#define os_memcpy _rtw_memcpy
+#define os_malloc rtw_malloc
+#define bin_clear_free(bin, len) \
+	do { \
+		if (bin) { \
+			os_memset(bin, 0, len); \
+			rtw_mfree(bin, len); \
+		} \
+	} while (0)
+
+static const u8 zero[AES_BLOCK_SIZE];
+
+static void dbl(u8 *pad)
+{
+	int i, carry;
+
+	carry = pad[0] & 0x80;
+	for (i = 0; i < AES_BLOCK_SIZE - 1; i++)
+		pad[i] = (pad[i] << 1) | (pad[i + 1] >> 7);
+	pad[AES_BLOCK_SIZE - 1] <<= 1;
+	if (carry)
+		pad[AES_BLOCK_SIZE - 1] ^= 0x87;
+}
+
+static void xor(u8 *a, const u8 *b)
+{
+	int i;
+
+	for (i = 0; i < AES_BLOCK_SIZE; i++)
+		*a++ ^= *b++;
+}
+
+static void xorend(u8 *a, int alen, const u8 *b, int blen)
+{
+	int i;
+
+	if (alen < blen)
+		return;
+
+	for (i = 0; i < blen; i++)
+		a[alen - blen + i] ^= b[i];
+}
+
+static void pad_block(u8 *pad, const u8 *addr, size_t len)
+{
+	os_memset(pad, 0, AES_BLOCK_SIZE);
+	os_memcpy(pad, addr, len);
+
+	if (len < AES_BLOCK_SIZE)
+		pad[len] = 0x80;
+}
+
+static int aes_s2v(const u8 *key, size_t num_elem, const u8 *addr[],
+		   size_t *len, u8 *mac)
+{
+	u8 tmp[AES_BLOCK_SIZE], tmp2[AES_BLOCK_SIZE];
+	u8 *buf = NULL;
+	int ret;
+	size_t i;
+
+	if (!num_elem) {
+		os_memcpy(tmp, zero, sizeof(zero));
+		tmp[AES_BLOCK_SIZE - 1] = 1;
+		return omac1_aes_128(key, tmp, sizeof(tmp), mac);
+	}
+
+	ret = omac1_aes_128(key, zero, sizeof(zero), tmp);
+	if (ret)
+		return ret;
+
+	for (i = 0; i < num_elem - 1; i++) {
+		ret = omac1_aes_128(key, addr[i], len[i], tmp2);
+		if (ret)
+			return ret;
+
+		dbl(tmp);
+		xor(tmp, tmp2);
+	}
+	if (len[i] >= AES_BLOCK_SIZE) {
+		buf = os_malloc(len[i]);
+		if (!buf)
+			return -ENOMEM;
+
+		os_memcpy(buf, addr[i], len[i]);
+		xorend(buf, len[i], tmp, AES_BLOCK_SIZE);
+		ret = omac1_aes_128(key, buf, len[i], mac);
+		bin_clear_free(buf, len[i]);
+		return ret;
+	}
+
+	dbl(tmp);
+	pad_block(tmp2, addr[i], len[i]);
+	xor(tmp, tmp2);
+
+	return omac1_aes_128(key, tmp, sizeof(tmp), mac);
+}
+
+/**
+ * aes_128_ctr_encrypt - AES-128 CTR mode encryption
+ * @key: Key for encryption (16 bytes)
+ * @nonce: Nonce for counter mode (16 bytes)
+ * @data: Data to encrypt in-place
+ * @data_len: Length of data in bytes
+ * Returns: 0 on success, -1 on failure
+ */
+int aes_128_ctr_encrypt(const u8 *key, const u8 *nonce,
+			u8 *data, size_t data_len)
+{
+	void *ctx;
+	size_t j, len, left = data_len;
+	int i;
+	u8 *pos = data;
+	u8 counter[AES_BLOCK_SIZE], buf[AES_BLOCK_SIZE];
+
+	ctx = aes_encrypt_init(key, 16);
+	if (ctx == NULL)
+		return -1;
+	os_memcpy(counter, nonce, AES_BLOCK_SIZE);
+
+	while (left > 0) {
+		#if 0
+		aes_encrypt(ctx, counter, buf);
+		#else
+		aes_128_encrypt(ctx, counter, buf);
+		#endif
+
+		len = (left < AES_BLOCK_SIZE) ? left : AES_BLOCK_SIZE;
+		for (j = 0; j < len; j++)
+			pos[j] ^= buf[j];
+		pos += len;
+		left -= len;
+
+		for (i = AES_BLOCK_SIZE - 1; i >= 0; i--) {
+			counter[i]++;
+			if (counter[i])
+				break;
+		}
+	}
+	aes_encrypt_deinit(ctx);
+	return 0;
+}
+
+int aes_siv_encrypt(const u8 *key, const u8 *pw,
+		    size_t pwlen, size_t num_elem,
+		    const u8 *addr[], const size_t *len, u8 *out)
+{
+	const u8 *_addr[6];
+	size_t _len[6];
+	const u8 *k1 = key, *k2 = key + 16;
+	u8 v[AES_BLOCK_SIZE];
+	size_t i;
+	u8 *iv, *crypt_pw;
+
+	if (num_elem > ARRAY_SIZE(_addr) - 1)
+		return -1;
+
+	for (i = 0; i < num_elem; i++) {
+		_addr[i] = addr[i];
+		_len[i] = len[i];
+	}
+	_addr[num_elem] = pw;
+	_len[num_elem] = pwlen;
+
+	if (aes_s2v(k1, num_elem + 1, _addr, _len, v))
+		return -1;
+
+	iv = out;
+	crypt_pw = out + AES_BLOCK_SIZE;
+
+	os_memcpy(iv, v, AES_BLOCK_SIZE);
+	os_memcpy(crypt_pw, pw, pwlen);
+
+	/* zero out 63rd and 31st bits of ctr (from right) */
+	v[8] &= 0x7f;
+	v[12] &= 0x7f;
+	return aes_128_ctr_encrypt(k2, v, crypt_pw, pwlen);
+}
+
+int aes_siv_decrypt(const u8 *key, const u8 *iv_crypt, size_t iv_c_len,
+		    size_t num_elem, const u8 *addr[], const size_t *len,
+		    u8 *out)
+{
+	const u8 *_addr[6];
+	size_t _len[6];
+	const u8 *k1 = key, *k2 = key + 16;
+	size_t crypt_len;
+	size_t i;
+	int ret;
+	u8 iv[AES_BLOCK_SIZE];
+	u8 check[AES_BLOCK_SIZE];
+
+	if (iv_c_len < AES_BLOCK_SIZE || num_elem > ARRAY_SIZE(_addr) - 1)
+		return -1;
+	crypt_len = iv_c_len - AES_BLOCK_SIZE;
+
+	for (i = 0; i < num_elem; i++) {
+		_addr[i] = addr[i];
+		_len[i] = len[i];
+	}
+	_addr[num_elem] = out;
+	_len[num_elem] = crypt_len;
+
+	os_memcpy(iv, iv_crypt, AES_BLOCK_SIZE);
+	os_memcpy(out, iv_crypt + AES_BLOCK_SIZE, crypt_len);
+
+	iv[8] &= 0x7f;
+	iv[12] &= 0x7f;
+
+	ret = aes_128_ctr_encrypt(k2, iv, out, crypt_len);
+	if (ret)
+		return ret;
+
+	ret = aes_s2v(k1, num_elem + 1, _addr, _len, check);
+	if (ret)
+		return ret;
+	if (os_memcmp(check, iv_crypt, AES_BLOCK_SIZE) == 0)
+		return 0;
+
+	return -1;
+}
+#endif /* CONFIG_RTW_MESH_AEK */
+
 #ifdef CONFIG_TDLS
 void wpa_tdls_generate_tpk(_adapter *padapter, PVOID sta)
 {
diff --git a/rtl8723DS/core/rtw_sreset.c b/rtl8723DS/core/rtw_sreset.c
index 936489b..03dba20 100755..100644
--- a/rtl8723DS/core/rtw_sreset.c
+++ b/rtl8723DS/core/rtw_sreset.c
@@ -47,10 +47,9 @@ u8 sreset_get_wifi_status(_adapter *padapter)
 #if defined(DBG_CONFIG_ERROR_DETECT)
 	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(padapter);
 	struct sreset_priv *psrtpriv = &pHalData->srestpriv;
-
 	u8 status = WIFI_STATUS_SUCCESS;
 	u32 val32 = 0;
-	_irqL irqL;
+
 	if (psrtpriv->silent_reset_inprogress == _TRUE)
 		return status;
 	val32 = rtw_read32(padapter, REG_TXDMA_STATUS);
@@ -104,11 +103,9 @@ bool sreset_inprogress(_adapter *padapter)
 
 void sreset_restore_security_station(_adapter *padapter)
 {
-	u8 EntryId = 0;
 	struct mlme_priv *mlmepriv = &padapter->mlmepriv;
 	struct sta_priv *pstapriv = &padapter->stapriv;
 	struct sta_info *psta;
-	struct security_priv *psecuritypriv = &(padapter->securitypriv);
 	struct mlme_ext_info	*pmlmeinfo = &padapter->mlmeextpriv.mlmext_info;
 
 	{
@@ -147,25 +144,6 @@ void sreset_restore_network_station(_adapter *padapter)
 	struct mlme_ext_info	*pmlmeinfo = &(pmlmeext->mlmext_info);
 	u8 doiqk = _FALSE;
 
-#if 0
-	{
-		/* ======================================================= */
-		/* reset related register of Beacon control */
-
-		/* set MSR to nolink */
-		Set_MSR(padapter, _HW_STATE_NOLINK_);
-		/* reject all data frame */
-		rtw_write16(padapter, REG_RXFLTMAP2, 0x00);
-		/* reset TSF */
-		rtw_write8(padapter, REG_DUAL_TSF_RST, (BIT(0) | BIT(1)));
-
-		/* disable update TSF */
-		SetBcnCtrlReg(padapter, BIT(4), 0);
-
-		/* ======================================================= */
-	}
-#endif
-
 	rtw_setopmode_cmd(padapter, Ndis802_11Infrastructure, RTW_CMDF_DIRECTLY);
 
 	{
@@ -173,6 +151,7 @@ void sreset_restore_network_station(_adapter *padapter)
 #ifdef CONFIG_USB_HCI
 		/* TH=1 => means that invalidate usb rx aggregation */
 		/* TH=0 => means that validate usb rx aggregation, use init value. */
+#ifdef CONFIG_80211N_HT
 		if (mlmepriv->htpriv.ht_option) {
 			if (padapter->registrypriv.wifi_spec == 1)
 				threshold = 1;
@@ -183,6 +162,7 @@ void sreset_restore_network_station(_adapter *padapter)
 			threshold = 1;
 			rtw_hal_set_hwreg(padapter, HW_VAR_RXDMA_AGG_PG_TH, (u8 *)(&threshold));
 		}
+#endif /* CONFIG_80211N_HT */
 #endif
 	}
 
@@ -200,8 +180,9 @@ void sreset_restore_network_station(_adapter *padapter)
 
 	{
 		u8	join_type = 0;
-		rtw_hal_set_hwreg(padapter, HW_VAR_MLME_JOIN, (u8 *)(&join_type));
+
 		rtw_hal_rcr_set_chk_bssid(padapter, MLME_STA_CONNECTING);
+		rtw_hal_set_hwreg(padapter, HW_VAR_MLME_JOIN, (u8 *)(&join_type));
 	}
 
 	Set_MSR(padapter, (pmlmeinfo->state & 0x3));
@@ -217,8 +198,6 @@ void sreset_restore_network_station(_adapter *padapter)
 void sreset_restore_network_status(_adapter *padapter)
 {
 	struct mlme_priv *mlmepriv = &padapter->mlmepriv;
-	struct mlme_ext_priv	*pmlmeext = &padapter->mlmeextpriv;
-	struct mlme_ext_info	*pmlmeinfo = &(pmlmeext->mlmext_info);
 
 	if (check_fwstate(mlmepriv, WIFI_STATION_STATE)) {
 		RTW_INFO(FUNC_ADPT_FMT" fwstate:0x%08x - WIFI_STATION_STATE\n", FUNC_ADPT_ARG(padapter), get_fwstate(mlmepriv));
@@ -317,6 +296,9 @@ void sreset_reset(_adapter *padapter)
 	_ips_enter(padapter);
 	_ips_leave(padapter);
 #endif
+#ifdef CONFIG_CONCURRENT_MODE
+	rtw_mi_ap_info_restore(padapter);
+#endif
 	rtw_mi_sreset_adapter_hdl(padapter, _TRUE);/*sreset_start_adapter*/
 
 	psrtpriv->silent_reset_inprogress = _FALSE;
@@ -325,5 +307,8 @@ void sreset_reset(_adapter *padapter)
 
 	RTW_INFO("%s done in %d ms\n", __FUNCTION__, rtw_get_passing_time_ms(start));
 	pdbgpriv->dbg_sreset_cnt++;
+
+	psrtpriv->self_dect_fw = _FALSE;
+	psrtpriv->rx_cnt = 0;
 #endif
 }
diff --git a/rtl8723DS/core/rtw_sta_mgt.c b/rtl8723DS/core/rtw_sta_mgt.c
index d3a5514..f4fbdb4 100755..100644
--- a/rtl8723DS/core/rtw_sta_mgt.c
+++ b/rtl8723DS/core/rtw_sta_mgt.c
@@ -234,7 +234,6 @@ u32	_rtw_init_sta_priv(struct	sta_priv *pstapriv)
 	struct sta_info *psta;
 	s32 i;
 	u32 ret = _FAIL;
-	u16 sz = 0;
 
 	pstapriv->padapter = adapter;
 
@@ -273,8 +272,7 @@ u32	_rtw_init_sta_priv(struct	sta_priv *pstapriv)
 	pstapriv->max_aid = macid_ctl->num;
 	pstapriv->rr_aid = 0;
 	pstapriv->started_aid = 1;
-	sz = pstapriv->max_aid * sizeof(struct sta_info *);
-	pstapriv->sta_aid = rtw_zmalloc(sz);
+	pstapriv->sta_aid = rtw_zmalloc(pstapriv->max_aid * sizeof(struct sta_info *));
 	if (!pstapriv->sta_aid)
 		goto exit;
 	pstapriv->aid_bmp_len = AID_BMP_LEN(pstapriv->max_aid);
@@ -309,7 +307,8 @@ u32	_rtw_init_sta_priv(struct	sta_priv *pstapriv)
 #endif
 
 #if CONFIG_RTW_MACADDR_ACL
-	_rtw_init_queue(&(pstapriv->acl_list.acl_node_q));
+	for (i = 0; i < RTW_ACL_PERIOD_NUM; i++)
+		rtw_macaddr_acl_init(adapter, i);
 #endif
 
 #if CONFIG_RTW_PRE_LINK_STA
@@ -324,7 +323,7 @@ exit:
 			rtw_vmfree(pstapriv->pallocated_stainfo_buf, sizeof(struct sta_info) * NUM_STA + 4);
 		#ifdef CONFIG_AP_MODE
 		if (pstapriv->sta_aid)
-			rtw_mfree(pstapriv->sta_aid, sz);
+			rtw_mfree(pstapriv->sta_aid, pstapriv->max_aid * sizeof(struct sta_info *));
 		if (pstapriv->sta_dz_bitmap)
 			rtw_mfree(pstapriv->sta_dz_bitmap, pstapriv->aid_bmp_len);
 		#endif
@@ -437,7 +436,6 @@ u32	_rtw_free_sta_priv(struct	sta_priv *pstapriv)
 	struct sta_info *psta = NULL;
 	struct recv_reorder_ctrl *preorder_ctrl;
 	int	index;
-	u16 sz = 0;
 
 	if (pstapriv) {
 
@@ -464,7 +462,8 @@ u32	_rtw_free_sta_priv(struct	sta_priv *pstapriv)
 		rtw_mfree_sta_priv_lock(pstapriv);
 
 #if CONFIG_RTW_MACADDR_ACL
-		_rtw_deinit_queue(&(pstapriv->acl_list.acl_node_q));
+		for (index = 0; index < RTW_ACL_PERIOD_NUM; index++)
+			rtw_macaddr_acl_deinit(pstapriv->padapter, index);
 #endif
 
 #if CONFIG_RTW_PRE_LINK_STA
@@ -474,9 +473,8 @@ u32	_rtw_free_sta_priv(struct	sta_priv *pstapriv)
 		if (pstapriv->pallocated_stainfo_buf)
 			rtw_vmfree(pstapriv->pallocated_stainfo_buf, sizeof(struct sta_info) * NUM_STA + 4);
 		#ifdef CONFIG_AP_MODE
-		sz = pstapriv->max_aid * sizeof(struct sta_info *);
 		if (pstapriv->sta_aid)
-			rtw_mfree(pstapriv->sta_aid, sz);
+			rtw_mfree(pstapriv->sta_aid, pstapriv->max_aid * sizeof(struct sta_info *));
 		if (pstapriv->sta_dz_bitmap)
 			rtw_mfree(pstapriv->sta_dz_bitmap, pstapriv->aid_bmp_len);
 		if (pstapriv->tim_bitmap)
@@ -500,7 +498,7 @@ static void rtw_init_recv_timer(struct recv_reorder_ctrl *preorder_ctrl)
 /* struct	sta_info *rtw_alloc_stainfo(_queue *pfree_sta_queue, unsigned char *hwaddr) */
 struct	sta_info *rtw_alloc_stainfo(struct	sta_priv *pstapriv, const u8 *hwaddr)
 {
-	_irqL irqL, irqL2;
+	_irqL irqL2;
 	s32	index;
 	_list	*phash_list;
 	struct sta_info	*psta;
@@ -554,6 +552,7 @@ struct	sta_info *rtw_alloc_stainfo(struct	sta_priv *pstapriv, const u8 *hwaddr)
 
 		for (i = 0; i < 16; i++) {
 			_rtw_memcpy(&psta->sta_recvpriv.rxcache.tid_rxseq[i], &wRxSeqInitialValue, 2);
+			_rtw_memcpy(&psta->sta_recvpriv.bmc_tid_rxseq[i], &wRxSeqInitialValue, 2);
 			_rtw_memset(&psta->sta_recvpriv.rxcache.iv[i], 0, sizeof(psta->sta_recvpriv.rxcache.iv[i]));
 		}
 
@@ -596,6 +595,7 @@ struct	sta_info *rtw_alloc_stainfo(struct	sta_priv *pstapriv, const u8 *hwaddr)
 #endif
 		/* init for the sequence number of received management frame */
 		psta->RxMgmtFrameSeqNum = 0xffff;
+		_rtw_memset(&psta->sta_stats, 0, sizeof(struct stainfo_stats));
 
 		rtw_alloc_macid(pstapriv->padapter, psta);
 
@@ -1044,13 +1044,18 @@ void dump_aid_status(void *sel, _adapter *adapter)
 #endif /* CONFIG_AP_MODE */
 
 #if CONFIG_RTW_MACADDR_ACL
-const char *const _acl_mode_str[] = {
+const char *const _acl_period_str[RTW_ACL_PERIOD_NUM] = {
+	"DEV",
+	"BSS",
+};
+
+const char *const _acl_mode_str[RTW_ACL_MODE_MAX] = {
 	"DISABLED",
 	"ACCEPT_UNLESS_LISTED",
 	"DENY_UNLESS_LISTED",
 };
 
-u8 rtw_access_ctrl(_adapter *adapter, u8 *mac_addr)
+u8 _rtw_access_ctrl(_adapter *adapter, u8 period, const u8 *mac_addr)
 {
 	u8 res = _TRUE;
 	_irqL irqL;
@@ -1058,8 +1063,20 @@ u8 rtw_access_ctrl(_adapter *adapter, u8 *mac_addr)
 	struct rtw_wlan_acl_node *acl_node;
 	u8 match = _FALSE;
 	struct sta_priv *stapriv = &adapter->stapriv;
-	struct wlan_acl_pool *acl = &stapriv->acl_list;
-	_queue	*acl_node_q = &acl->acl_node_q;
+	struct wlan_acl_pool *acl;
+	_queue	*acl_node_q;
+
+	if (period >= RTW_ACL_PERIOD_NUM) {
+		rtw_warn_on(1);
+		goto exit;
+	}
+
+	acl = &stapriv->acl_list[period];
+	acl_node_q = &acl->acl_node_q;
+
+	if (acl->mode != RTW_ACL_MODE_ACCEPT_UNLESS_LISTED
+		&& acl->mode != RTW_ACL_MODE_DENY_UNLESS_LISTED)
+		goto exit;
 
 	_enter_critical_bh(&(acl_node_q->lock), &irqL);
 	head = get_list_head(acl_node_q);
@@ -1079,26 +1096,42 @@ u8 rtw_access_ctrl(_adapter *adapter, u8 *mac_addr)
 
 	if (acl->mode == RTW_ACL_MODE_ACCEPT_UNLESS_LISTED)
 		res = (match == _TRUE) ?  _FALSE : _TRUE;
-	else if (acl->mode == RTW_ACL_MODE_DENY_UNLESS_LISTED)
+	else /* RTW_ACL_MODE_DENY_UNLESS_LISTED */
 		res = (match == _TRUE) ?  _TRUE : _FALSE;
-	else
-		res = _TRUE;
 
+exit:
 	return res;
 }
 
-void dump_macaddr_acl(void *sel, _adapter *adapter)
+u8 rtw_access_ctrl(_adapter *adapter, const u8 *mac_addr)
 {
-	struct sta_priv *stapriv = &adapter->stapriv;
-	struct wlan_acl_pool *acl = &stapriv->acl_list;
 	int i;
 
-	RTW_PRINT_SEL(sel, "mode:%s(%d)\n", acl_mode_str(acl->mode), acl->mode);
-	RTW_PRINT_SEL(sel, "num:%d/%d\n", acl->num, NUM_ACL);
-	for (i = 0; i < NUM_ACL; i++) {
-		if (acl->aclnode[i].valid == _FALSE)
-			continue;
-		RTW_PRINT_SEL(sel, MAC_FMT"\n", MAC_ARG(acl->aclnode[i].addr));
+	for (i = 0; i < RTW_ACL_PERIOD_NUM; i++)
+		if (_rtw_access_ctrl(adapter, i, mac_addr) == _FALSE)
+			return _FALSE;
+
+	return _TRUE;
+}
+
+void dump_macaddr_acl(void *sel, _adapter *adapter)
+{
+	struct sta_priv *stapriv = &adapter->stapriv;
+	struct wlan_acl_pool *acl;
+	int i, j;
+
+	for (j = 0; j < RTW_ACL_PERIOD_NUM; j++) {
+		RTW_PRINT_SEL(sel, "period:%s(%d)\n", acl_period_str(j), j);
+
+		acl = &stapriv->acl_list[j];
+		RTW_PRINT_SEL(sel, "mode:%s(%d)\n", acl_mode_str(acl->mode), acl->mode);
+		RTW_PRINT_SEL(sel, "num:%d/%d\n", acl->num, NUM_ACL);
+		for (i = 0; i < NUM_ACL; i++) {
+			if (acl->aclnode[i].valid == _FALSE)
+				continue;
+			RTW_PRINT_SEL(sel, MAC_FMT"\n", MAC_ARG(acl->aclnode[i].addr));
+		}
+		RTW_PRINT_SEL(sel, "\n");
 	}
 }
 #endif /* CONFIG_RTW_MACADDR_ACL */
diff --git a/rtl8723DS/core/rtw_tdls.c b/rtl8723DS/core/rtw_tdls.c
index 30fa005..4cb3892 100755..100644
--- a/rtl8723DS/core/rtw_tdls.c
+++ b/rtl8723DS/core/rtw_tdls.c
@@ -439,7 +439,7 @@ void rtw_tdls_process_ht_cap(_adapter *padapter, struct sta_info *ptdls_sta, u8
 	}
 
 	if (ptdls_sta->flags & WLAN_STA_HT) {
-		if (padapter->registrypriv.ht_enable == _TRUE) {
+		if (padapter->registrypriv.ht_enable == _TRUE && is_supported_ht(padapter->registrypriv.wireless_mode) ) {
 			ptdls_sta->htpriv.ht_option = _TRUE;
 			ptdls_sta->qos_option = _TRUE;
 		} else {
@@ -559,7 +559,7 @@ void rtw_tdls_process_vht_cap(_adapter *padapter, struct sta_info *ptdls_sta, u8
 
 	if (ptdls_sta->flags & WLAN_STA_VHT) {
 		if (REGSTY_IS_11AC_ENABLE(&padapter->registrypriv)
-		    && hal_chk_proto_cap(padapter, PROTO_CAP_11AC)
+		    && is_supported_vht(padapter->registrypriv.wireless_mode)
 		    && (!rfctl->country_ent || COUNTRY_CHPLAN_EN_11AC(rfctl->country_ent)))
 			ptdls_sta->vhtpriv.vht_option = _TRUE;
 		else
@@ -927,6 +927,20 @@ u8 *rtw_tdls_set_ch_sw(u8 *pframe, struct pkt_attrib *pattrib, struct sta_info *
 
 void rtw_tdls_set_ch_sw_oper_control(_adapter *padapter, u8 enable)
 {
+	HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter);
+
+	if (enable == _TRUE) {
+#ifdef CONFIG_TDLS_CH_SW_V2
+		pHalData->ch_switch_offload = _TRUE;
+#endif
+
+#ifdef CONFIG_TDLS_CH_SW_BY_DRV
+		pHalData->ch_switch_offload = _FALSE;
+#endif
+	}
+	else
+		pHalData->ch_switch_offload = _FALSE;
+	
 	if (ATOMIC_READ(&padapter->tdlsinfo.chsw_info.chsw_on) != enable)
 		ATOMIC_SET(&padapter->tdlsinfo.chsw_info.chsw_on, enable);
 
@@ -979,8 +993,8 @@ s32 rtw_tdls_do_ch_sw(_adapter *padapter, struct sta_info *ptdls_sta, u8 chnl_ty
 
 	/* set mac_id sleep before channel switch */
 	rtw_hal_macid_sleep(padapter, ptdls_sta->cmn.mac_id);
-	
-#ifdef CONFIG_TDLS_CH_SW_BY_DRV
+
+#if defined(CONFIG_TDLS_CH_SW_BY_DRV) || defined(CONFIG_TDLS_CH_SW_V2)
 	set_channel_bwmode(padapter, channel, channel_offset, bwmode);
 	ret = _SUCCESS;
 #else
@@ -2360,7 +2374,7 @@ int On_TDLS_Dis_Req(_adapter *padapter, union recv_frame *precv_frame)
 			if (psta_ap == NULL)
 				goto exit;
 			dst = pIE->data + 12;
-			if (MacAddr_isBcst(dst) == _FALSE && (_rtw_memcmp(adapter_mac_addr(padapter), dst, 6) == _FALSE))
+			if (MacAddr_isBcst(dst) == _FALSE && (_rtw_memcmp(adapter_mac_addr(padapter), dst, ETH_ALEN) == _FALSE))
 				goto exit;
 			break;
 		default:
@@ -2839,7 +2853,7 @@ void rtw_build_tdls_setup_req_ies(_adapter *padapter, struct xmit_frame *pxmitfr
 #ifdef CONFIG_80211AC_VHT
 	if ((padapter->mlmepriv.htpriv.ht_option == _TRUE) && (pmlmeext->cur_channel > 14)
 	    && REGSTY_IS_11AC_ENABLE(pregistrypriv)
-	    && hal_chk_proto_cap(padapter, PROTO_CAP_11AC)
+	    && is_supported_vht(pregistrypriv->wireless_mode)
 	    && (!rfctl->country_ent || COUNTRY_CHPLAN_EN_11AC(rfctl->country_ent))
 	   ) {
 		pframe = rtw_tdls_set_aid(padapter, pframe, pattrib);
@@ -2934,7 +2948,7 @@ void rtw_build_tdls_setup_rsp_ies(_adapter *padapter, struct xmit_frame *pxmitfr
 #ifdef CONFIG_80211AC_VHT
 	if ((padapter->mlmepriv.htpriv.ht_option == _TRUE) && (pmlmeext->cur_channel > 14)
 	    && REGSTY_IS_11AC_ENABLE(pregistrypriv)
-	    && hal_chk_proto_cap(padapter, PROTO_CAP_11AC)
+	    && is_supported_vht(pregistrypriv->wireless_mode)
 	    && (!rfctl->country_ent || COUNTRY_CHPLAN_EN_11AC(rfctl->country_ent))
 	   ) {
 		pframe = rtw_tdls_set_aid(padapter, pframe, pattrib);
@@ -3011,7 +3025,7 @@ void rtw_build_tdls_setup_cfm_ies(_adapter *padapter, struct xmit_frame *pxmitfr
 	if ((padapter->mlmepriv.htpriv.ht_option == _TRUE)
 	    && (ptdls_sta->vhtpriv.vht_option == _TRUE) && (pmlmeext->cur_channel > 14)
 	    && REGSTY_IS_11AC_ENABLE(pregistrypriv)
-	    && hal_chk_proto_cap(padapter, PROTO_CAP_11AC)
+	    && is_supported_vht(pregistrypriv->wireless_mode)
 	    && (!rfctl->country_ent || COUNTRY_CHPLAN_EN_11AC(rfctl->country_ent))
 	   ) {
 		pframe = rtw_tdls_set_vht_operation(padapter, pframe, pattrib, pmlmeext->cur_channel);
diff --git a/rtl8723DS/core/rtw_vht.c b/rtl8723DS/core/rtw_vht.c
index cf710c0..9a7608c 100755..100644
--- a/rtl8723DS/core/rtw_vht.c
+++ b/rtl8723DS/core/rtw_vht.c
@@ -61,10 +61,6 @@ void dump_vht_cap_ie_content(void *sel, const u8 *buf, u32 buf_len)
 
 void dump_vht_cap_ie(void *sel, const u8 *ie, u32 ie_len)
 {
-	const u8 *pos = ie;
-	u16 id;
-	u16 len;
-
 	const u8 *vht_cap_ie;
 	sint vht_cap_ielen;
 
@@ -99,10 +95,6 @@ void dump_vht_op_ie_content(void *sel, const u8 *buf, u32 buf_len)
 
 void dump_vht_op_ie(void *sel, const u8 *ie, u32 ie_len)
 {
-	const u8 *pos = ie;
-	u16 id;
-	u16 len;
-
 	const u8 *vht_op_ie;
 	sint vht_op_ielen;
 
@@ -273,43 +265,53 @@ void	rtw_vht_use_default_setting(_adapter *padapter)
 	/* Beamforming setting */
 	CLEAR_FLAGS(pvhtpriv->beamform_cap);
 #ifdef CONFIG_BEAMFORMING
-	rtw_hal_get_def_var(padapter, HAL_DEF_EXPLICIT_BEAMFORMER, (u8 *)&bHwSupportBeamformer);
-	rtw_hal_get_def_var(padapter, HAL_DEF_EXPLICIT_BEAMFORMEE, (u8 *)&bHwSupportBeamformee);
-	mu_bfer = _FALSE;
-	mu_bfee = _FALSE;
-	rtw_hal_get_def_var(padapter, HAL_DEF_VHT_MU_BEAMFORMER, &mu_bfer);
-	rtw_hal_get_def_var(padapter, HAL_DEF_VHT_MU_BEAMFORMEE, &mu_bfee);
-	if (TEST_FLAG(pregistrypriv->beamform_cap, BIT0) && bHwSupportBeamformer) {
+#ifdef RTW_BEAMFORMING_VERSION_2
+	/* only enable beamforming in STA client mode */
+	if (MLME_IS_STA(padapter) && !MLME_IS_GC(padapter)
+				  && !MLME_IS_ADHOC(padapter)
+				  && !MLME_IS_MESH(padapter))
+#endif
+	{
+		rtw_hal_get_def_var(padapter, HAL_DEF_EXPLICIT_BEAMFORMER,
+			(u8 *)&bHwSupportBeamformer);
+		rtw_hal_get_def_var(padapter, HAL_DEF_EXPLICIT_BEAMFORMEE,
+			(u8 *)&bHwSupportBeamformee);
+		mu_bfer = _FALSE;
+		mu_bfee = _FALSE;
+		rtw_hal_get_def_var(padapter, HAL_DEF_VHT_MU_BEAMFORMER, &mu_bfer);
+		rtw_hal_get_def_var(padapter, HAL_DEF_VHT_MU_BEAMFORMEE, &mu_bfee);
+		if (TEST_FLAG(pregistrypriv->beamform_cap, BIT0) && bHwSupportBeamformer) {
 #ifdef CONFIG_CONCURRENT_MODE
-		if ((pmlmeinfo->state & 0x03) == WIFI_FW_AP_STATE) {
+			if ((pmlmeinfo->state & 0x03) == WIFI_FW_AP_STATE) {
+				SET_FLAG(pvhtpriv->beamform_cap, BEAMFORMING_VHT_BEAMFORMER_ENABLE);
+				RTW_INFO("[VHT] CONCURRENT AP Support Beamformer\n");
+				if (TEST_FLAG(pregistrypriv->beamform_cap, BIT(2))
+				    && (_TRUE == mu_bfer)) {
+					SET_FLAG(pvhtpriv->beamform_cap, BEAMFORMING_VHT_MU_MIMO_AP_ENABLE);
+					RTW_INFO("[VHT] Support MU-MIMO AP\n");
+				}
+			} else
+				RTW_INFO("[VHT] CONCURRENT not AP ;not allow  Support Beamformer\n");
+#else
 			SET_FLAG(pvhtpriv->beamform_cap, BEAMFORMING_VHT_BEAMFORMER_ENABLE);
-			RTW_INFO("[VHT] CONCURRENT AP Support Beamformer\n");
+			RTW_INFO("[VHT] Support Beamformer\n");
 			if (TEST_FLAG(pregistrypriv->beamform_cap, BIT(2))
-			    && (_TRUE == mu_bfer)) {
+			    && (_TRUE == mu_bfer)
+			    && ((pmlmeinfo->state & 0x03) == WIFI_FW_AP_STATE)) {
 				SET_FLAG(pvhtpriv->beamform_cap, BEAMFORMING_VHT_MU_MIMO_AP_ENABLE);
 				RTW_INFO("[VHT] Support MU-MIMO AP\n");
 			}
-		} else
-			RTW_INFO("[VHT] CONCURRENT not AP ;not allow  Support Beamformer\n");
-#else
-		SET_FLAG(pvhtpriv->beamform_cap, BEAMFORMING_VHT_BEAMFORMER_ENABLE);
-		RTW_INFO("[VHT] Support Beamformer\n");
-		if (TEST_FLAG(pregistrypriv->beamform_cap, BIT(2))
-		    && (_TRUE == mu_bfer)
-		    && ((pmlmeinfo->state & 0x03) == WIFI_FW_AP_STATE)) {
-			SET_FLAG(pvhtpriv->beamform_cap, BEAMFORMING_VHT_MU_MIMO_AP_ENABLE);
-			RTW_INFO("[VHT] Support MU-MIMO AP\n");
-		}
 #endif
-	}
-	if (TEST_FLAG(pregistrypriv->beamform_cap, BIT1) && bHwSupportBeamformee) {
-		SET_FLAG(pvhtpriv->beamform_cap, BEAMFORMING_VHT_BEAMFORMEE_ENABLE);
-		RTW_INFO("[VHT] Support Beamformee\n");
-		if (TEST_FLAG(pregistrypriv->beamform_cap, BIT(3))
-		    && (_TRUE == mu_bfee)
-		    && ((pmlmeinfo->state & 0x03) != WIFI_FW_AP_STATE)) {
-			SET_FLAG(pvhtpriv->beamform_cap, BEAMFORMING_VHT_MU_MIMO_STA_ENABLE);
-			RTW_INFO("[VHT] Support MU-MIMO STA\n");
+		}
+		if (TEST_FLAG(pregistrypriv->beamform_cap, BIT1) && bHwSupportBeamformee) {
+			SET_FLAG(pvhtpriv->beamform_cap, BEAMFORMING_VHT_BEAMFORMEE_ENABLE);
+			RTW_INFO("[VHT] Support Beamformee\n");
+			if (TEST_FLAG(pregistrypriv->beamform_cap, BIT(3))
+			    && (_TRUE == mu_bfee)
+			    && ((pmlmeinfo->state & 0x03) != WIFI_FW_AP_STATE)) {
+				SET_FLAG(pvhtpriv->beamform_cap, BEAMFORMING_VHT_MU_MIMO_STA_ENABLE);
+				RTW_INFO("[VHT] Support MU-MIMO STA\n");
+			}
 		}
 	}
 #endif /* CONFIG_BEAMFORMING */
@@ -395,16 +397,34 @@ void	update_sta_vht_info_apmode(_adapter *padapter, PVOID sta)
 	struct mlme_ext_priv	*pmlmeext = &padapter->mlmeextpriv;
 	struct vht_priv	*pvhtpriv_ap = &pmlmepriv->vhtpriv;
 	struct vht_priv	*pvhtpriv_sta = &psta->vhtpriv;
-	u8	cur_ldpc_cap = 0, cur_stbc_cap = 0, bw_mode = 0;
+	u8	cur_ldpc_cap = 0, cur_stbc_cap = 0;
+	s8 bw_mode = -1;
 	u8	*pcap_mcs;
 
 	if (pvhtpriv_sta->vht_option == _FALSE)
 		return;
 
-	bw_mode = GET_VHT_OPERATING_MODE_FIELD_CHNL_WIDTH(&pvhtpriv_sta->vht_op_mode_notify);
+	if (pvhtpriv_sta->op_present) {
+		switch (GET_VHT_OPERATION_ELE_CHL_WIDTH(pvhtpriv_sta->vht_op)) {
+		case 1: /* 80MHz */
+		case 2: /* 160MHz */
+		case 3: /* 80+80 */
+			bw_mode = CHANNEL_WIDTH_80; /* only support up to 80MHz for now */
+			break;
+		}
+	}
+
+	if (pvhtpriv_sta->notify_present)
+		bw_mode = GET_VHT_OPERATING_MODE_FIELD_CHNL_WIDTH(&pvhtpriv_sta->vht_op_mode_notify);
+	else if (MLME_IS_AP(padapter)) {
+		/* for VHT client without Operating Mode Notify IE; minimal 80MHz */
+		if (bw_mode < CHANNEL_WIDTH_80)
+			bw_mode = CHANNEL_WIDTH_80;
+	}
+
+	if (bw_mode != -1)
+		psta->cmn.bw_mode = bw_mode; /* update bw_mode only if get value from VHT IEs */
 
-	/* if (bw_mode > psta->cmn.bw_mode) */
-	psta->cmn.bw_mode = bw_mode;
 	psta->cmn.ra_info.is_vht_enable = _TRUE;
 
 	/* B4 Rx LDPC */
@@ -462,6 +482,83 @@ void	update_hw_vht_param(_adapter *padapter)
 		rtw_hal_set_hwreg(padapter, HW_VAR_AMPDU_FACTOR, (u8 *)(&pvhtpriv->ampdu_len));
 }
 
+#ifdef ROKU_PRIVATE
+u8 VHT_get_ss_from_map(u8 *vht_mcs_map)
+{
+	u8 i, j;
+	u8 ss = 0;
+
+	for (i = 0; i < 2; i++) {
+		if (vht_mcs_map[i] != 0xff) {
+			for (j = 0; j < 8; j += 2) {
+				if (((vht_mcs_map[i] >> j) & 0x03) == 0x03)
+					break;
+				ss++;
+			}
+		}
+
+	}
+
+return ss;
+}
+
+void VHT_caps_handler_infra_ap(_adapter *padapter, PNDIS_802_11_VARIABLE_IEs pIE)
+{
+	struct mlme_priv		*pmlmepriv = &padapter->mlmepriv;
+	struct vht_priv_infra_ap	*pvhtpriv = &pmlmepriv->vhtpriv_infra_ap;
+	u8      cur_stbc_cap_infra_ap = 0;
+	u16	cur_beamform_cap_infra_ap = 0;
+	u8	*pcap_mcs;
+	u8	*pcap_mcs_tx;
+	u8	Rx_ss = 0, Tx_ss = 0;
+
+	struct mlme_ext_priv		*pmlmeext = &padapter->mlmeextpriv;
+	struct mlme_ext_info		*pmlmeinfo = &(pmlmeext->mlmext_info);
+
+	if (pIE == NULL)
+		return;
+
+	pmlmeinfo->ht_vht_received |= BIT(1);
+
+	pvhtpriv->ldpc_cap_infra_ap = GET_VHT_CAPABILITY_ELE_RX_LDPC(pIE->data);
+
+	if (GET_VHT_CAPABILITY_ELE_RX_STBC(pIE->data))
+		SET_FLAG(cur_stbc_cap_infra_ap, STBC_VHT_ENABLE_RX);
+	if (GET_VHT_CAPABILITY_ELE_TX_STBC(pIE->data))
+		SET_FLAG(cur_stbc_cap_infra_ap, STBC_VHT_ENABLE_TX);
+	pvhtpriv->stbc_cap_infra_ap = cur_stbc_cap_infra_ap;
+
+	/*store ap info for channel bandwidth*/
+	pvhtpriv->channel_width_infra_ap = GET_VHT_CAPABILITY_ELE_CHL_WIDTH(pIE->data);
+
+	/*check B11: SU Beamformer Capable and B12: SU Beamformee B19: MU Beamformer B20:MU Beamformee*/
+	if (GET_VHT_CAPABILITY_ELE_SU_BFER(pIE->data))
+		SET_FLAG(cur_beamform_cap_infra_ap, BEAMFORMING_VHT_BEAMFORMER_ENABLE);
+	if (GET_VHT_CAPABILITY_ELE_SU_BFEE(pIE->data))
+		SET_FLAG(cur_beamform_cap_infra_ap, BEAMFORMING_VHT_BEAMFORMEE_ENABLE);
+	if (GET_VHT_CAPABILITY_ELE_MU_BFER(pIE->data))
+		SET_FLAG(cur_beamform_cap_infra_ap, BEAMFORMING_VHT_MU_MIMO_AP_ENABLE);
+	if (GET_VHT_CAPABILITY_ELE_MU_BFEE(pIE->data))
+		SET_FLAG(cur_beamform_cap_infra_ap, BEAMFORMING_VHT_MU_MIMO_STA_ENABLE);
+	pvhtpriv->beamform_cap_infra_ap = cur_beamform_cap_infra_ap;
+
+	/*store information about vht_mcs_set*/
+	pcap_mcs = GET_VHT_CAPABILITY_ELE_RX_MCS(pIE->data);
+	pcap_mcs_tx = GET_VHT_CAPABILITY_ELE_TX_MCS(pIE->data);
+	_rtw_memcpy(pvhtpriv->vht_mcs_map_infra_ap, pcap_mcs, 2);
+	_rtw_memcpy(pvhtpriv->vht_mcs_map_tx_infra_ap, pcap_mcs_tx, 2);
+
+	Rx_ss = VHT_get_ss_from_map(pvhtpriv->vht_mcs_map_infra_ap);
+	Tx_ss = VHT_get_ss_from_map(pvhtpriv->vht_mcs_map_tx_infra_ap);
+	if (Rx_ss >= Tx_ss) {
+		pvhtpriv->number_of_streams_infra_ap = Rx_ss;
+	} else{
+		pvhtpriv->number_of_streams_infra_ap = Tx_ss;
+	}
+
+}
+#endif /* ROKU_PRIVATE */
+
 void VHT_caps_handler(_adapter *padapter, PNDIS_802_11_VARIABLE_IEs pIE)
 {
 	struct hal_spec_t *hal_spec = GET_HAL_SPEC(padapter);
@@ -593,17 +690,21 @@ void rtw_process_vht_op_mode_notify(_adapter *padapter, u8 *pframe, PVOID sta)
 	struct sta_info		*psta = (struct sta_info *)sta;
 	struct mlme_priv		*pmlmepriv = &padapter->mlmepriv;
 	struct vht_priv		*pvhtpriv = &pmlmepriv->vhtpriv;
-	struct mlme_ext_priv	*pmlmeext = &padapter->mlmeextpriv;
 	struct registry_priv *regsty = adapter_to_regsty(padapter);
 	u8	target_bw;
 	u8	target_rxss, current_rxss;
 	u8	update_ra = _FALSE;
+	u8 tx_nss = 0, rf_type = RF_1T1R;
+	struct hal_spec_t *hal_spec = GET_HAL_SPEC(padapter);
 
 	if (pvhtpriv->vht_option == _FALSE)
 		return;
 
 	target_bw = GET_VHT_OPERATING_MODE_FIELD_CHNL_WIDTH(pframe);
-	target_rxss = (GET_VHT_OPERATING_MODE_FIELD_RX_NSS(pframe) + 1);
+
+	rtw_hal_get_hwreg(padapter, HW_VAR_RF_TYPE, (u8 *)(&rf_type));
+	tx_nss = rtw_min(rf_type_to_rf_tx_cnt(rf_type), hal_spec->tx_nss_num);
+	target_rxss = rtw_min(tx_nss, (GET_VHT_OPERATING_MODE_FIELD_RX_NSS(pframe) + 1));
 
 	if (target_bw != psta->cmn.bw_mode) {
 		if (hal_is_bw_support(padapter, target_bw)
@@ -692,7 +793,7 @@ u32	rtw_build_vht_op_mode_notify_ie(_adapter *padapter, u8 *pbuf, u8 bw)
 
 u32	rtw_build_vht_cap_ie(_adapter *padapter, u8 *pbuf)
 {
-	u8	bw, rf_type, rf_num, rx_stbc_nss = 0;
+	u8	bw, rf_num, rx_stbc_nss = 0;
 	u16	HighestRate;
 	u8	*pcap, *pcap_mcs;
 	u32	len = 0;
@@ -710,19 +811,19 @@ u32	rtw_build_vht_cap_ie(_adapter *padapter, u8 *pbuf)
 	rtw_hal_get_def_var(padapter, HAL_DEF_RX_PACKET_OFFSET, &rx_packet_offset);
 	rtw_hal_get_def_var(padapter, HAL_DEF_MAX_RECVBUF_SZ, &max_recvbuf_sz);
 
-	RTW_DBG("%s, line%d, Available RX buf size = %d bytes\n.", __FUNCTION__, __LINE__, max_recvbuf_sz - rx_packet_offset);
+	RTW_DBG("%s, line%d, Available RX buf size = %d bytes\n", __FUNCTION__, __LINE__, max_recvbuf_sz - rx_packet_offset);
 
 	if ((max_recvbuf_sz - rx_packet_offset) >= 11454) {
 		SET_VHT_CAPABILITY_ELE_MAX_MPDU_LENGTH(pcap, 2);
-		RTW_INFO("%s, line%d, Set MAX MPDU len = 11454 bytes\n.", __FUNCTION__, __LINE__);
+		RTW_INFO("%s, line%d, Set MAX MPDU len = 11454 bytes\n", __FUNCTION__, __LINE__);
 	} else if ((max_recvbuf_sz - rx_packet_offset) >= 7991) {
 		SET_VHT_CAPABILITY_ELE_MAX_MPDU_LENGTH(pcap, 1);
-		RTW_INFO("%s, line%d, Set MAX MPDU len = 7991 bytes\n.", __FUNCTION__, __LINE__);
+		RTW_INFO("%s, line%d, Set MAX MPDU len = 7991 bytes\n", __FUNCTION__, __LINE__);
 	} else if ((max_recvbuf_sz - rx_packet_offset) >= 3895) {
 		SET_VHT_CAPABILITY_ELE_MAX_MPDU_LENGTH(pcap, 0);
-		RTW_INFO("%s, line%d, Set MAX MPDU len = 3895 bytes\n.", __FUNCTION__, __LINE__);
+		RTW_INFO("%s, line%d, Set MAX MPDU len = 3895 bytes\n", __FUNCTION__, __LINE__);
 	} else
-		RTW_ERR("%s, line%d, Error!! Available RX buf size < 3895 bytes\n.", __FUNCTION__, __LINE__);
+		RTW_ERR("%s, line%d, Error!! Available RX buf size < 3895 bytes\n", __FUNCTION__, __LINE__);
 
 	/* B2 B3 Supported Channel Width Set */
 	if (hal_chk_bw_cap(padapter, BW_CAP_160M) && REGSTY_IS_BW_5G_SUPPORT(pregistrypriv, CHANNEL_WIDTH_160)) {
@@ -783,10 +884,11 @@ u32	rtw_build_vht_cap_ie(_adapter *padapter, u8 *pbuf)
 		rtw_hal_get_def_var(padapter, HAL_DEF_BEAMFORMEE_CAP, (u8 *)&rf_num);
 
 		/* IOT action suggested by Yu Chen 2017/3/3 */
+#ifdef CONFIG_80211AC_VHT
 		if ((pmlmeinfo->assoc_AP_vendor == HT_IOT_PEER_BROADCOM) &&
-			!GET_VHT_CAPABILITY_ELE_MU_BFER(&pvhtpriv->beamform_cap))
+			!pvhtpriv->ap_is_mu_bfer)
 			rf_num = (rf_num >= 2 ? 2 : rf_num);
-
+#endif
 		/* B13 14 15 Compressed Steering Number of Beamformer Antennas Supported */
 		SET_VHT_CAPABILITY_ELE_BFER_ANT_SUPP(pcap, rf_num);
 		/* B20 SU Beamformee Capable */
@@ -831,61 +933,109 @@ u32	rtw_build_vht_cap_ie(_adapter *padapter, u8 *pbuf)
 
 u32 rtw_restructure_vht_ie(_adapter *padapter, u8 *in_ie, u8 *out_ie, uint in_len, uint *pout_len)
 {
-	u32	ielen = 0, out_len = 0;
-	u8	cap_len = 0, notify_len = 0, notify_bw = 0, operation_bw = 0, supported_chnl_width = 0;
-	u8	*p, *pframe;
+	struct rf_ctl_t *rfctl = adapter_to_rfctl(padapter);
+	RT_CHANNEL_INFO *chset = rfctl->channel_set;
+	u32	ielen;
+	u8 max_bw;
+	u8 oper_ch, oper_bw = CHANNEL_WIDTH_20, oper_offset = HAL_PRIME_CHNL_OFFSET_DONT_CARE;
+	u8 *out_vht_op_ie, *ht_op_ie, *vht_cap_ie, *vht_op_ie;
 	struct registry_priv *pregistrypriv = &padapter->registrypriv;
 	struct mlme_priv	*pmlmepriv = &padapter->mlmepriv;
 	struct vht_priv	*pvhtpriv = &pmlmepriv->vhtpriv;
 
 	rtw_vht_use_default_setting(padapter);
 
-	p = rtw_get_ie(in_ie + 12, EID_VHTCapability, &ielen, in_len - 12);
-	if (p && ielen > 0) {
-		supported_chnl_width = GET_VHT_CAPABILITY_ELE_CHL_WIDTH(p + 2);
+	ht_op_ie = rtw_get_ie(in_ie + 12, WLAN_EID_HT_OPERATION, &ielen, in_len - 12);
+	if (!ht_op_ie || ielen != HT_OP_IE_LEN)
+		goto exit;
+	vht_cap_ie = rtw_get_ie(in_ie + 12, EID_VHTCapability, &ielen, in_len - 12);
+	if (!vht_cap_ie || ielen != VHT_CAP_IE_LEN)
+		goto exit;
+	vht_op_ie = rtw_get_ie(in_ie + 12, EID_VHTOperation, &ielen, in_len - 12);
+	if (!vht_op_ie || ielen != VHT_OP_IE_LEN)
+		goto exit;
 
-		/* VHT Capabilities element */
-		cap_len = rtw_build_vht_cap_ie(padapter, out_ie + *pout_len);
-		*pout_len += cap_len;
+	/* VHT Capabilities element */
+	*pout_len += rtw_build_vht_cap_ie(padapter, out_ie + *pout_len);
 
-		/* Get HT BW */
-		p = rtw_get_ie(in_ie + 12, _HT_EXTRA_INFO_IE_, &ielen, in_len - 12);
-		if (p && ielen > 0) {
-			struct HT_info_element *pht_info = (struct HT_info_element *)(p + 2);
-			if (pht_info->infos[0] & BIT(2))
-				operation_bw = CHANNEL_WIDTH_40;
-			else
-				operation_bw = CHANNEL_WIDTH_20;
-		}
 
-		/* VHT Operation element */
-		p = rtw_get_ie(in_ie + 12, EID_VHTOperation, &ielen, in_len - 12);
-		if (p && ielen > 0) {
-			out_len = *pout_len;
-			if (GET_VHT_OPERATION_ELE_CHL_WIDTH(p + 2) >= 1) {
-				if (supported_chnl_width == 2)
-					operation_bw = CHANNEL_WIDTH_80_80;
-				else if (supported_chnl_width == 1)
-					operation_bw = CHANNEL_WIDTH_160;
-				else
-					operation_bw = CHANNEL_WIDTH_80;
+	/* VHT Operation element */
+	out_vht_op_ie = out_ie + *pout_len;
+	rtw_set_ie(out_vht_op_ie, EID_VHTOperation, VHT_OP_IE_LEN, vht_op_ie + 2 , pout_len);
+
+	/* get primary channel from HT_OP_IE */
+	oper_ch = GET_HT_OP_ELE_PRI_CHL(ht_op_ie + 2);
+
+	/* find the largest bw supported by both registry and hal */
+	max_bw = hal_largest_bw(padapter, REGSTY_BW_5G(pregistrypriv));
+
+	if (max_bw >= CHANNEL_WIDTH_40) {
+		/* get bw offset form HT_OP_IE */
+		if (GET_HT_OP_ELE_STA_CHL_WIDTH(ht_op_ie + 2)) {
+			switch (GET_HT_OP_ELE_2ND_CHL_OFFSET(ht_op_ie + 2)) {
+			case SCA:
+				oper_bw = CHANNEL_WIDTH_40;
+				oper_offset = HAL_PRIME_CHNL_OFFSET_LOWER;
+				break;
+			case SCB:
+				oper_bw = CHANNEL_WIDTH_40;
+				oper_offset = HAL_PRIME_CHNL_OFFSET_UPPER;
+				break;
 			}
-			pframe = rtw_set_ie(out_ie + out_len, EID_VHTOperation, ielen, p + 2 , pout_len);
 		}
 
-		/* find the largest bw supported by both registry and hal */
-		notify_bw = hal_largest_bw(padapter, REGSTY_BW_5G(pregistrypriv));
-
-		if (notify_bw > operation_bw)
-			notify_bw = operation_bw;
+		if (oper_bw == CHANNEL_WIDTH_40) {
+			switch (GET_VHT_OPERATION_ELE_CHL_WIDTH(vht_op_ie + 2)) {
+			case 1: /* 80MHz */
+			case 2: /* 160MHz */
+			case 3: /* 80+80 */
+				oper_bw = CHANNEL_WIDTH_80; /* only support up to 80MHz for now */
+				break;
+			}
 
-		/* Operating Mode Notification element */
-		notify_len = rtw_build_vht_op_mode_notify_ie(padapter, out_ie + *pout_len, notify_bw);
-		*pout_len += notify_len;
+			oper_bw = rtw_min(oper_bw, max_bw);
+
+			/* try downgrage bw to fit in channel plan setting */
+			while (!rtw_chset_is_chbw_valid(chset, oper_ch, oper_bw, oper_offset)
+				|| (IS_DFS_SLAVE_WITH_RD(rfctl)
+					&& !rtw_odm_dfs_domain_unknown(rfctl_to_dvobj(rfctl))
+					&& rtw_chset_is_chbw_non_ocp(chset, oper_ch, oper_bw, oper_offset))
+			) {
+				oper_bw--;
+				if (oper_bw == CHANNEL_WIDTH_20) {
+					oper_offset = HAL_PRIME_CHNL_OFFSET_DONT_CARE;
+					break;
+				}
+			}
+		}
+	}
 
-		pvhtpriv->vht_option = _TRUE;
+	rtw_warn_on(!rtw_chset_is_chbw_valid(chset, oper_ch, oper_bw, oper_offset));
+	if (IS_DFS_SLAVE_WITH_RD(rfctl) && !rtw_odm_dfs_domain_unknown(rfctl_to_dvobj(rfctl)))
+		rtw_warn_on(rtw_chset_is_chbw_non_ocp(chset, oper_ch, oper_bw, oper_offset));
+
+	/* update VHT_OP_IE */
+	if (oper_bw < CHANNEL_WIDTH_80) {
+		SET_VHT_OPERATION_ELE_CHL_WIDTH(out_vht_op_ie + 2, 0);
+		SET_VHT_OPERATION_ELE_CHL_CENTER_FREQ1(out_vht_op_ie + 2, 0);
+		SET_VHT_OPERATION_ELE_CHL_CENTER_FREQ2(out_vht_op_ie + 2, 0);
+	} else if (oper_bw == CHANNEL_WIDTH_80) {
+		u8 cch = rtw_get_center_ch(oper_ch, oper_bw, oper_offset);
+
+		SET_VHT_OPERATION_ELE_CHL_WIDTH(out_vht_op_ie + 2, 1);
+		SET_VHT_OPERATION_ELE_CHL_CENTER_FREQ1(out_vht_op_ie + 2, cch);
+		SET_VHT_OPERATION_ELE_CHL_CENTER_FREQ2(out_vht_op_ie + 2, 0);
+	} else {
+		RTW_ERR(FUNC_ADPT_FMT" unsupported BW:%u\n", FUNC_ADPT_ARG(padapter), oper_bw);
+		rtw_warn_on(1);
 	}
 
+	/* Operating Mode Notification element */
+	*pout_len += rtw_build_vht_op_mode_notify_ie(padapter, out_ie + *pout_len, oper_bw);
+
+	pvhtpriv->vht_option = _TRUE;
+
+exit:
 	return pvhtpriv->vht_option;
 
 }
@@ -944,6 +1094,8 @@ void rtw_vht_ies_attach(_adapter *padapter, WLAN_BSSID_EX *pnetwork)
 										pnetwork->Configuration.DSConfig);
 	pnetwork->IELength += operation_len;
 
+	rtw_check_for_vht20(padapter, pnetwork->IEs + _BEACON_IE_OFFSET_, pnetwork->IELength - _BEACON_IE_OFFSET_);
+
 	pmlmepriv->vhtpriv.vht_option = _TRUE;
 }
 
@@ -958,4 +1110,26 @@ void rtw_vht_ies_detach(_adapter *padapter, WLAN_BSSID_EX *pnetwork)
 	pmlmepriv->vhtpriv.vht_option = _FALSE;
 }
 
+void rtw_check_for_vht20(_adapter *adapter, u8 *ies, int ies_len)
+{
+	u8 ht_ch, ht_bw, ht_offset;
+	u8 vht_ch, vht_bw, vht_offset;
+
+	rtw_ies_get_chbw(ies, ies_len, &ht_ch, &ht_bw, &ht_offset, 1, 0);
+	rtw_ies_get_chbw(ies, ies_len, &vht_ch, &vht_bw, &vht_offset, 1, 1);
+
+	if (ht_bw == CHANNEL_WIDTH_20 && vht_bw >= CHANNEL_WIDTH_80) {
+		u8 *vht_op_ie;
+		int vht_op_ielen;
+
+		RTW_INFO(FUNC_ADPT_FMT" vht80 is not allowed without ht40\n", FUNC_ADPT_ARG(adapter));
+		vht_op_ie = rtw_get_ie(ies, EID_VHTOperation, &vht_op_ielen, ies_len);
+		if (vht_op_ie && vht_op_ielen) {
+			RTW_INFO(FUNC_ADPT_FMT" switch to vht20\n", FUNC_ADPT_ARG(adapter));
+			SET_VHT_OPERATION_ELE_CHL_WIDTH(vht_op_ie + 2, 0);
+			SET_VHT_OPERATION_ELE_CHL_CENTER_FREQ1(vht_op_ie + 2, 0);
+			SET_VHT_OPERATION_ELE_CHL_CENTER_FREQ2(vht_op_ie + 2, 0);
+		}
+	}
+}
 #endif /* CONFIG_80211AC_VHT */
diff --git a/rtl8723DS/core/rtw_wapi.c b/rtl8723DS/core/rtw_wapi.c
index e065b3d..1c4279f 100755..100644
--- a/rtl8723DS/core/rtw_wapi.c
+++ b/rtl8723DS/core/rtw_wapi.c
@@ -1065,7 +1065,7 @@ void wapi_test_set_key(struct _adapter *padapter, u8 *buf)
 void wapi_test_init(struct _adapter *padapter)
 {
 	u8 keybuf[100];
-	u8 mac_addr[6] = {0x00, 0xe0, 0x4c, 0x72, 0x04, 0x70};
+	u8 mac_addr[ETH_ALEN] = {0x00, 0xe0, 0x4c, 0x72, 0x04, 0x70};
 	u8 UskDataKey[16] = {0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08, 0x09, 0x0a, 0x0b, 0x0c, 0x0d, 0x0e, 0x0f};
 	u8 UskMicKey[16] = {0x10, 0x11, 0x12, 0x13, 0x14, 0x15, 0x16, 0x17, 0x18, 0x19, 0x1a, 0x1b, 0x1c, 0x1d, 0x1e, 0x1f};
 	u8 UskId = 0;
@@ -1091,7 +1091,7 @@ void wapi_test_init(struct _adapter *padapter)
 	keybuf[2] = 1; 				/* AE */
 	keybuf[3] = 0; 				/* not update */
 
-	memcpy(keybuf + 4, mac_addr, 6);
+	memcpy(keybuf + 4, mac_addr, ETH_ALEN);
 	memcpy(keybuf + 10, UskDataKey, 16);
 	memcpy(keybuf + 26, UskMicKey, 16);
 	keybuf[42] = UskId;
@@ -1103,7 +1103,7 @@ void wapi_test_init(struct _adapter *padapter)
 	keybuf[2] = 0; 				/* AE */
 	keybuf[3] = 0; 				/* not update */
 
-	memcpy(keybuf + 4, mac_addr, 6);
+	memcpy(keybuf + 4, mac_addr, ETH_ALEN);
 	memcpy(keybuf + 10, UskDataKey, 16);
 	memcpy(keybuf + 26, UskMicKey, 16);
 	keybuf[42] = UskId;
@@ -1116,7 +1116,7 @@ void wapi_test_init(struct _adapter *padapter)
 	keybuf[1] = 1;                               /* Enable TX */
 	keybuf[2] = 1; 				/* AE */
 	keybuf[3] = 0;                              /* not update */
-	memcpy(keybuf + 4, mac_addr, 6);
+	memcpy(keybuf + 4, mac_addr, ETH_ALEN);
 	memcpy(keybuf + 10, MskDataKey, 16);
 	memcpy(keybuf + 26, MskMicKey, 16);
 	keybuf[42] = MskId;
@@ -1127,7 +1127,7 @@ void wapi_test_init(struct _adapter *padapter)
 	keybuf[1] = 1;                               /* Enable TX */
 	keybuf[2] = 0; 				/* AE */
 	keybuf[3] = 0;                              /* not update */
-	memcpy(keybuf + 4, mac_addr, 6);
+	memcpy(keybuf + 4, mac_addr, ETH_ALEN);
 	memcpy(keybuf + 10, MskDataKey, 16);
 	memcpy(keybuf + 26, MskMicKey, 16);
 	keybuf[42] = MskId;
diff --git a/rtl8723DS/core/rtw_wapi_sms4.c b/rtl8723DS/core/rtw_wapi_sms4.c
index 4b7cf95..4b7cf95 100755..100644
--- a/rtl8723DS/core/rtw_wapi_sms4.c
+++ b/rtl8723DS/core/rtw_wapi_sms4.c
diff --git a/rtl8723DS/core/rtw_wlan_util.c b/rtl8723DS/core/rtw_wlan_util.c
index 7df5b45..9699697 100755..100644
--- a/rtl8723DS/core/rtw_wlan_util.c
+++ b/rtl8723DS/core/rtw_wlan_util.c
@@ -52,9 +52,6 @@ extern unsigned char RSN_TKIP_CIPHER[4];
 #define WAIT_FOR_BCN_TO_MIN	(6000)
 #define WAIT_FOR_BCN_TO_MAX	(20000)
 
-#define DISCONNECT_BY_CHK_BCN_FAIL_OBSERV_PERIOD_IN_MS 1000
-#define DISCONNECT_BY_CHK_BCN_FAIL_THRESHOLD 3
-
 static u8 rtw_basic_rate_cck[4] = {
 	IEEE80211_CCK_RATE_1MB | IEEE80211_BASIC_RATE_MASK, IEEE80211_CCK_RATE_2MB | IEEE80211_BASIC_RATE_MASK,
 	IEEE80211_CCK_RATE_5MB | IEEE80211_BASIC_RATE_MASK, IEEE80211_CCK_RATE_11MB | IEEE80211_BASIC_RATE_MASK
@@ -72,8 +69,41 @@ static u8 rtw_basic_rate_mix[7] = {
 	IEEE80211_OFDM_RATE_24MB | IEEE80211_BASIC_RATE_MASK
 };
 
-int new_bcn_max = 3;
+/* test if rate is defined in rtw_basic_rate_cck */
+bool rtw_is_basic_rate_cck(u8 rate)
+{
+	int i;
+
+	for (i = 0; i < 4; i++)
+		if ((rtw_basic_rate_cck[i] & 0x7F) == (rate & 0x7F))
+			return 1;
+	return 0;
+}
+
+/* test if rate is defined in rtw_basic_rate_ofdm */
+bool rtw_is_basic_rate_ofdm(u8 rate)
+{
+	int i;
+
+	for (i = 0; i < 3; i++)
+		if ((rtw_basic_rate_ofdm[i] & 0x7F) == (rate & 0x7F))
+			return 1;
+	return 0;
+}
 
+/* test if rate is defined in rtw_basic_rate_mix */
+bool rtw_is_basic_rate_mix(u8 rate)
+{
+	int i;
+
+	for (i = 0; i < 7; i++)
+		if ((rtw_basic_rate_mix[i] & 0x7F) == (rate & 0x7F))
+			return 1;
+	return 0;
+}
+#ifdef CONFIG_BCN_CNT_CONFIRM_HDL
+int new_bcn_max = 3;
+#endif
 int cckrates_included(unsigned char *rate, int ratelen)
 {
 	int	i;
@@ -507,53 +537,6 @@ exit:
 	return valid;
 }
 
-u8 rtw_get_offset_by_ch(u8 channel)
-{
-	u8 offset = HAL_PRIME_CHNL_OFFSET_DONT_CARE;
-
-	if (channel >= 1 && channel <= 4)
-		offset = HAL_PRIME_CHNL_OFFSET_LOWER;
-	else if (channel >= 5 && channel <= 14)
-		offset = HAL_PRIME_CHNL_OFFSET_UPPER;
-	else {
-		switch (channel) {
-		case 36:
-		case 44:
-		case 52:
-		case 60:
-		case 100:
-		case 108:
-		case 116:
-		case 124:
-		case 132:
-		case 149:
-		case 157:
-			offset = HAL_PRIME_CHNL_OFFSET_LOWER;
-			break;
-		case 40:
-		case 48:
-		case 56:
-		case 64:
-		case 104:
-		case 112:
-		case 120:
-		case 128:
-		case 136:
-		case 153:
-		case 161:
-			offset = HAL_PRIME_CHNL_OFFSET_UPPER;
-			break;
-		default:
-			offset = HAL_PRIME_CHNL_OFFSET_DONT_CARE;
-			break;
-		}
-
-	}
-
-	return offset;
-
-}
-
 u8 rtw_get_center_ch(u8 channel, u8 chnl_bw, u8 chnl_offset)
 {
 	u8 center_ch = channel;
@@ -604,7 +587,6 @@ inline systime rtw_get_on_cur_ch_time(_adapter *adapter)
 void set_channel_bwmode(_adapter *padapter, unsigned char channel, unsigned char channel_offset, unsigned short bwmode)
 {
 	u8 center_ch, chnl_offset80 = HAL_PRIME_CHNL_OFFSET_DONT_CARE;
-	struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv;
 #if (defined(CONFIG_TDLS) && defined(CONFIG_TDLS_CH_SW)) || defined(CONFIG_MCC_MODE)
 	u8 iqk_info_backup = _FALSE;
 #endif
@@ -1176,7 +1158,7 @@ s16 rtw_camid_search(_adapter *adapter, u8 *addr, s16 kid, s8 gk)
 	return cam_id;
 }
 
-s16 rtw_get_camid(_adapter *adapter, struct sta_info *sta, u8 *addr, s16 kid)
+s16 rtw_get_camid(_adapter *adapter, u8 *addr, s16 kid, u8 gk)
 {
 	struct dvobj_priv *dvobj = adapter_to_dvobj(adapter);
 	struct cam_ctl_t *cam_ctl = &dvobj->cam_ctl;
@@ -1197,7 +1179,7 @@ s16 rtw_get_camid(_adapter *adapter, struct sta_info *sta, u8 *addr, s16 kid)
 
 	/* find cam entry which has the same addr, kid (, gk bit) */
 	if (_rtw_camctl_chk_cap(adapter, SEC_CAP_CHK_BMC) == _TRUE)
-		i = _rtw_camid_search(adapter, addr, kid, sta ? _FALSE : _TRUE);
+		i = _rtw_camid_search(adapter, addr, kid, gk);
 	else
 		i = _rtw_camid_search(adapter, addr, kid, -1);
 
@@ -1217,12 +1199,8 @@ s16 rtw_get_camid(_adapter *adapter, struct sta_info *sta, u8 *addr, s16 kid)
 	}
 
 	if (i == cam_ctl->num) {
-		if (sta)
-			RTW_PRINT(FUNC_ADPT_FMT" pairwise key with "MAC_FMT" id:%u no room\n"
-				  , FUNC_ADPT_ARG(adapter), MAC_ARG(addr), kid);
-		else
-			RTW_PRINT(FUNC_ADPT_FMT" group key with "MAC_FMT" id:%u no room\n"
-				  , FUNC_ADPT_ARG(adapter), MAC_ARG(addr), kid);
+		RTW_PRINT(FUNC_ADPT_FMT" %s key with "MAC_FMT" id:%u no room\n"
+			, FUNC_ADPT_ARG(adapter), gk ? "group" : "pairwise", MAC_ARG(addr), kid);
 		rtw_warn_on(1);
 		goto _exit;
 	}
@@ -1234,7 +1212,7 @@ _exit:
 	return cam_id;
 }
 
-s16 rtw_camid_alloc(_adapter *adapter, struct sta_info *sta, u8 kid, bool *used)
+s16 rtw_camid_alloc(_adapter *adapter, struct sta_info *sta, u8 kid, u8 gk, bool *used)
 {
 	struct mlme_ext_info *mlmeinfo = &adapter->mlmeextpriv.mlmext_info;
 	struct dvobj_priv *dvobj = adapter_to_dvobj(adapter);
@@ -1264,7 +1242,7 @@ s16 rtw_camid_alloc(_adapter *adapter, struct sta_info *sta, u8 kid, bool *used)
 #else
 		u8 *addr = adapter_mac_addr(adapter);
 
-		cam_id = rtw_get_camid(adapter, sta, addr, kid);
+		cam_id = rtw_get_camid(adapter, addr, kid, gk);
 		if (1)
 			RTW_PRINT(FUNC_ADPT_FMT" group key with "MAC_FMT" assigned cam_id:%u\n"
 				, FUNC_ADPT_ARG(adapter), MAC_ARG(addr), cam_id);
@@ -1284,7 +1262,7 @@ s16 rtw_camid_alloc(_adapter *adapter, struct sta_info *sta, u8 kid, bool *used)
 			}
 			addr = get_bssid(&adapter->mlmepriv);/*A2*/
 		}
-		cam_id = rtw_get_camid(adapter, sta, addr, kid);
+		cam_id = rtw_get_camid(adapter, addr, kid, gk);
 	}
 
 
@@ -1427,12 +1405,12 @@ void rtw_clean_hw_dk_cam(_adapter *adapter)
 
 void flush_all_cam_entry(_adapter *padapter)
 {
+#ifdef CONFIG_CONCURRENT_MODE
 	struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv;
 	struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info);
 	struct mlme_priv *pmlmepriv = &(padapter->mlmepriv);
 	struct security_priv *psecpriv = &padapter->securitypriv;
 
-#ifdef CONFIG_CONCURRENT_MODE
 	if (check_fwstate(pmlmepriv, WIFI_STATION_STATE)) {
 		struct sta_priv	*pstapriv = &padapter->stapriv;
 		struct sta_info		*psta;
@@ -1806,6 +1784,97 @@ static void bwmode_update_check(_adapter *padapter, PNDIS_802_11_VARIABLE_IEs pI
 #endif /* CONFIG_80211N_HT */
 }
 
+#ifdef ROKU_PRIVATE
+void Supported_rate_infra_ap(_adapter *padapter, PNDIS_802_11_VARIABLE_IEs pIE)
+{
+	unsigned int	i;
+	struct mlme_ext_priv		*pmlmeext = &padapter->mlmeextpriv;
+	struct mlme_ext_info		*pmlmeinfo = &(pmlmeext->mlmext_info);
+
+	if (pIE == NULL)
+		return;
+
+	for (i = 0 ; i < pIE->Length; i++)
+		pmlmeinfo->SupportedRates_infra_ap[i] = (pIE->data[i]);
+
+}
+
+void Extended_Supported_rate_infra_ap(_adapter *padapter, PNDIS_802_11_VARIABLE_IEs pIE)
+{
+	unsigned int i, j;
+	struct mlme_ext_priv		*pmlmeext = &padapter->mlmeextpriv;
+	struct mlme_ext_info		*pmlmeinfo = &(pmlmeext->mlmext_info);
+
+	if (pIE == NULL)
+		return;
+
+	if (pIE->Length > 0) {
+		for (i = 0; i < NDIS_802_11_LENGTH_RATES_EX; i++) {
+			if (pmlmeinfo->SupportedRates_infra_ap[i] == 0)
+				break;
+		}
+		for (j = 0; j < pIE->Length; j++)
+			pmlmeinfo->SupportedRates_infra_ap[i+j] = (pIE->data[j]);
+	}
+
+}
+
+void HT_get_ss_from_mcs_set(u8 *mcs_set, u8 *Rx_ss)
+{
+	u8 i, j;
+	u8 r_ss = 0, t_ss = 0;
+
+	for (i = 0; i < 4; i++) {
+		if ((mcs_set[3-i] & 0xff) != 0x00) {
+			r_ss = 4-i;
+			break;
+		}
+	}
+
+	*Rx_ss = r_ss;
+}
+
+void HT_caps_handler_infra_ap(_adapter *padapter, PNDIS_802_11_VARIABLE_IEs pIE)
+{
+	unsigned int	i;
+	u8	cur_stbc_cap_infra_ap = 0;
+	struct mlme_priv		*pmlmepriv = &padapter->mlmepriv;
+	struct ht_priv_infra_ap		*phtpriv = &pmlmepriv->htpriv_infra_ap;
+
+	struct mlme_ext_priv		*pmlmeext = &padapter->mlmeextpriv;
+	struct mlme_ext_info		*pmlmeinfo = &(pmlmeext->mlmext_info);
+
+	if (pIE == NULL)
+		return;
+
+	pmlmeinfo->ht_vht_received |= BIT(0);
+
+	/*copy MCS_SET*/
+	for (i = 3; i < 19; i++)
+		phtpriv->MCS_set_infra_ap[i-3] = (pIE->data[i]);
+
+	/*get number of stream from mcs set*/
+	HT_get_ss_from_mcs_set(phtpriv->MCS_set_infra_ap, &phtpriv->Rx_ss_infra_ap);
+
+	phtpriv->rx_highest_data_rate_infra_ap = le16_to_cpu(GET_HT_CAP_ELE_RX_HIGHEST_DATA_RATE(pIE->data));
+
+	phtpriv->ldpc_cap_infra_ap = GET_HT_CAP_ELE_LDPC_CAP(pIE->data);
+
+	if (GET_HT_CAP_ELE_RX_STBC(pIE->data))
+		SET_FLAG(cur_stbc_cap_infra_ap, STBC_HT_ENABLE_RX);
+	if (GET_HT_CAP_ELE_TX_STBC(pIE->data))
+		SET_FLAG(cur_stbc_cap_infra_ap, STBC_HT_ENABLE_TX);
+	phtpriv->stbc_cap_infra_ap = cur_stbc_cap_infra_ap;
+
+	/*store ap info SGI 20m 40m*/
+	phtpriv->sgi_20m_infra_ap = GET_HT_CAP_ELE_SHORT_GI20M(pIE->data);
+	phtpriv->sgi_40m_infra_ap = GET_HT_CAP_ELE_SHORT_GI40M(pIE->data);
+
+	/*store ap info for supported channel bandwidth*/
+	phtpriv->channel_width_infra_ap = GET_HT_CAP_ELE_CHL_WIDTH(pIE->data);
+}
+#endif /* ROKU_PRIVATE */
+
 void HT_caps_handler(_adapter *padapter, PNDIS_802_11_VARIABLE_IEs pIE)
 {
 #ifdef CONFIG_80211N_HT
@@ -1817,7 +1886,9 @@ void HT_caps_handler(_adapter *padapter, PNDIS_802_11_VARIABLE_IEs pIE)
 	struct mlme_ext_info	*pmlmeinfo = &(pmlmeext->mlmext_info);
 	struct mlme_priv		*pmlmepriv = &padapter->mlmepriv;
 	struct ht_priv			*phtpriv = &pmlmepriv->htpriv;
+#ifdef CONFIG_DISABLE_MCS13TO15
 	struct registry_priv	*pregistrypriv = &padapter->registrypriv;
+#endif
 	struct hal_spec_t *hal_spec = GET_HAL_SPEC(padapter);
 
 	if (pIE == NULL)
@@ -2023,9 +2094,9 @@ void HTOnAssocRsp(_adapter *padapter)
 	min_MPDU_spacing = (pmlmeinfo->HT_caps.u.HT_cap_element.AMPDU_para & 0x1c) >> 2;
 
 	rtw_hal_set_hwreg(padapter, HW_VAR_AMPDU_MIN_SPACE, (u8 *)(&min_MPDU_spacing));
-
+#ifdef CONFIG_80211N_HT
 	rtw_hal_set_hwreg(padapter, HW_VAR_AMPDU_FACTOR, (u8 *)(&max_AMPDU_len));
-
+#endif /* CONFIG_80211N_HT */
 #if 0 /* move to rtw_update_ht_cap() */
 	if ((pregpriv->bw_mode > 0) &&
 	    (pmlmeinfo->HT_caps.u.HT_cap_element.HT_caps_info & BIT(1)) &&
@@ -2088,7 +2159,6 @@ void ERP_IE_handler(_adapter *padapter, PNDIS_802_11_VARIABLE_IEs pIE)
 void VCS_update(_adapter *padapter, struct sta_info *psta)
 {
 	struct registry_priv	*pregpriv = &padapter->registrypriv;
-	struct mlme_priv	*pmlmepriv = &padapter->mlmepriv;
 	struct mlme_ext_priv	*pmlmeext = &padapter->mlmeextpriv;
 	struct mlme_ext_info	*pmlmeinfo = &(pmlmeext->mlmext_info);
 
@@ -2167,7 +2237,6 @@ int check_ielen(u8 *start, uint len)
 {
 	int left = len;
 	u8 *pos = start;
-	int unknown = 0;
 	u8 id, elen;
 
 	while (left >= 2) {
@@ -2180,7 +2249,7 @@ int check_ielen(u8 *start, uint len)
 					id, elen, (unsigned long) left);
 			return _FALSE;
 		}
-		if ((id == WLAN_EID_VENDOR_SPECIFIC) && (elen < 4))
+		if ((id == WLAN_EID_VENDOR_SPECIFIC) && (elen < 3))
 				return _FALSE;
 
 		left -= elen;
@@ -2207,6 +2276,175 @@ int validate_beacon_len(u8 *pframe, u32 len)
 	return _TRUE;
 }
 
+
+u8 support_rate_ranges[] = {
+	IEEE80211_CCK_RATE_1MB,
+	IEEE80211_CCK_RATE_2MB,
+	IEEE80211_CCK_RATE_5MB,
+	IEEE80211_CCK_RATE_11MB,
+	IEEE80211_OFDM_RATE_6MB,
+	IEEE80211_OFDM_RATE_9MB,
+	IEEE80211_OFDM_RATE_12MB,
+	IEEE80211_OFDM_RATE_18MB,
+	IEEE80211_OFDM_RATE_24MB,
+	IEEE80211_OFDM_RATE_36MB,
+	IEEE80211_OFDM_RATE_48MB,
+	IEEE80211_OFDM_RATE_54MB,
+};
+
+inline bool match_ranges(u16 EID, u32 value)
+{
+	int i;
+	int nr_range;
+
+	switch (EID) {
+	case _EXT_SUPPORTEDRATES_IE_:
+	case _SUPPORTEDRATES_IE_:
+		nr_range = sizeof(support_rate_ranges)/sizeof(u8);
+		for (i = 0; i < nr_range; i++) {
+			/*	clear bit7 before searching.	*/
+			value &= ~BIT(7);
+			if (value == support_rate_ranges[i])
+				return _TRUE;
+		}
+		break;
+	default:
+		break;
+	};
+	return _FALSE;
+}
+
+/*
+ * rtw_validate_value: validate the IE contain.
+ *
+ *	Input : 
+ *		EID : Element ID
+ *		p	: IE buffer (without EID & length)
+ *		len	: IE length
+ *	return: 
+ * 		_TRUE	: All Values are validated.
+ *		_FALSE	: At least one value is NOT validated.
+ */
+bool rtw_validate_value(u16 EID, u8 *p, u16 len)
+{
+	u8 rate;
+	u32 i, nr_val;
+
+	switch (EID) {
+	case _EXT_SUPPORTEDRATES_IE_:
+	case _SUPPORTEDRATES_IE_:
+		nr_val = len;
+		for (i=0; i<nr_val; i++) {
+			rate = *(p+i);
+			if (match_ranges(EID, rate) == _FALSE)
+				return _FALSE;
+		}
+		break;
+	default:
+		break;
+	};
+	return _TRUE;
+}
+
+inline bool hidden_ssid_ap(WLAN_BSSID_EX *snetwork)
+{
+	return ((snetwork->Ssid.SsidLength == 0) ||  
+		is_all_null(snetwork->Ssid.Ssid, snetwork->Ssid.SsidLength) == _TRUE);
+}
+
+/*
+	Get SSID if this ilegal frame(probe resp) comes from a hidden SSID AP.
+	Update the SSID to the corresponding pnetwork in scan queue.
+*/
+void rtw_absorb_ssid_ifneed(_adapter *padapter, WLAN_BSSID_EX *bssid, u8 *pframe)
+{
+	struct wlan_network *scanned = NULL;
+	WLAN_BSSID_EX	*snetwork;
+	u8 ie_offset, *p=NULL, *next_ie=NULL, *mac = get_addr2_ptr(pframe);
+	sint len, ssid_len_ori;
+	u32 remain_len = 0;
+	u8 backupIE[MAX_IE_SZ];
+	u16 subtype = get_frame_sub_type(pframe);
+	_irqL irqL;
+
+	if ((!bssid) || (!pframe))
+		return;
+
+	if (subtype == WIFI_BEACON) {
+		bssid->Reserved[0] = BSS_TYPE_BCN;
+		ie_offset = _BEACON_IE_OFFSET_;
+	} else {
+		/* FIXME : more type */
+		if (subtype == WIFI_PROBERSP) {
+			ie_offset = _PROBERSP_IE_OFFSET_;
+			bssid->Reserved[0] = BSS_TYPE_PROB_RSP;
+		} else if (subtype == WIFI_PROBEREQ) {
+			ie_offset = _PROBEREQ_IE_OFFSET_;
+			bssid->Reserved[0] = BSS_TYPE_PROB_REQ;
+		} else {
+			bssid->Reserved[0] = BSS_TYPE_UNDEF;
+			ie_offset = _FIXED_IE_LENGTH_;
+		}
+	}
+	
+	_enter_critical_bh(&padapter->mlmepriv.scanned_queue.lock, &irqL);
+	scanned = _rtw_find_network(&padapter->mlmepriv.scanned_queue, mac);
+	if (!scanned) {
+		_exit_critical_bh(&padapter->mlmepriv.scanned_queue.lock, &irqL);
+		return;
+	}
+
+	snetwork = &(scanned->network);
+	/* scan queue records as Hidden SSID && Input frame is NOT Hidden SSID	*/
+	if (hidden_ssid_ap(snetwork) && !hidden_ssid_ap(bssid)) {
+		p = rtw_get_ie(snetwork->IEs+ie_offset, _SSID_IE_, &ssid_len_ori, snetwork->IELength-ie_offset);
+		if (!p) {
+			_exit_critical_bh(&padapter->mlmepriv.scanned_queue.lock, &irqL);
+			return;
+		}
+		next_ie = p + 2 + ssid_len_ori;
+		remain_len = snetwork->IELength - (next_ie - snetwork->IEs);
+		scanned->network.Ssid.SsidLength = bssid->Ssid.SsidLength;
+		_rtw_memcpy(scanned->network.Ssid.Ssid, bssid->Ssid.Ssid, bssid->Ssid.SsidLength);
+
+		//update pnetwork->ssid, pnetwork->ssidlen
+		_rtw_memcpy(backupIE, next_ie, remain_len);
+		*(p+1) = bssid->Ssid.SsidLength;
+		_rtw_memcpy(p+2, bssid->Ssid.Ssid, bssid->Ssid.SsidLength);
+		_rtw_memcpy(p+2+bssid->Ssid.SsidLength, backupIE, remain_len);
+		snetwork->IELength += bssid->Ssid.SsidLength;
+	}
+	_exit_critical_bh(&padapter->mlmepriv.scanned_queue.lock, &irqL);
+}
+
+#ifdef DBG_RX_BCN
+void rtw_debug_rx_bcn(_adapter *adapter, u8 *pframe, u32 packet_len)
+{
+	struct mlme_ext_priv *pmlmeext = &adapter->mlmeextpriv;
+	struct mlme_ext_info *mlmeinfo = &(pmlmeext->mlmext_info);
+	u16 sn = ((struct rtw_ieee80211_hdr_3addr *)pframe)->seq_ctl >> 4;
+	u64 tsf, tsf_offset;
+	u8 dtim_cnt, dtim_period, tim_bmap, tim_pvbit;
+
+	update_TSF(pmlmeext, pframe, packet_len);
+	tsf = pmlmeext->TSFValue;
+	tsf_offset = rtw_modular64(pmlmeext->TSFValue, (mlmeinfo->bcn_interval * 1024));
+
+	/*get TIM IE*/
+	/*DTIM Count*/
+	dtim_cnt = pmlmeext->tim[0];
+	/*DTIM Period*/
+	dtim_period = pmlmeext->tim[1];
+	/*Bitmap*/
+	tim_bmap = pmlmeext->tim[2];
+	/*Partial VBitmap AID 0 ~ 7*/
+	tim_pvbit = pmlmeext->tim[3];
+
+	RTW_INFO("[BCN] SN-%d, TSF-%lld(us), offset-%lld, bcn_interval-%d DTIM-%d[%d] bitmap-0x%02x-0x%02x\n",
+		sn, tsf, tsf_offset, mlmeinfo->bcn_interval, dtim_period, dtim_cnt, tim_bmap, tim_pvbit);
+}
+#endif
+
 /*
  * rtw_get_bcn_keys: get beacon keys from recv frame
  *
@@ -2293,50 +2531,36 @@ int rtw_get_bcn_keys(ADAPTER *Adapter, u8 *pframe, u32 packet_len,
 	} else if (capability & BIT(4))
 		recv_beacon->encryp_protocol = ENCRYP_PROTOCOL_WEP;
 
+	if (elems.tim && elems.tim_len) {
+		struct mlme_ext_priv *pmlmeext = &Adapter->mlmeextpriv;
+
+		#ifdef DBG_RX_BCN
+		_rtw_memcpy(pmlmeext->tim, elems.tim, 4);
+		#endif
+		pmlmeext->dtim = elems.tim[1];
+	}
+
 	return _TRUE;
 }
 
 void rtw_dump_bcn_keys(struct beacon_keys *recv_beacon)
 {
-	int i;
-	char *p;
 	u8 ssid[IW_ESSID_MAX_SIZE + 1];
 
 	_rtw_memcpy(ssid, recv_beacon->ssid, recv_beacon->ssid_len);
 	ssid[recv_beacon->ssid_len] = '\0';
 
 	RTW_INFO("%s: ssid = %s\n", __func__, ssid);
-	RTW_INFO("%s: channel = %x\n", __func__, recv_beacon->bcn_channel);
-	RTW_INFO("%s: ht_cap = %x\n", __func__,	recv_beacon->ht_cap_info);
-	RTW_INFO("%s: ht_info_infos_0_sco = %x\n", __func__, recv_beacon->ht_info_infos_0_sco);
+	RTW_INFO("%s: channel = %d\n", __func__, recv_beacon->bcn_channel);
+	RTW_INFO("%s: ht_cap = 0x%04x\n", __func__,	recv_beacon->ht_cap_info);
+	RTW_INFO("%s: ht_info_infos_0_sco = 0x%02x\n", __func__, recv_beacon->ht_info_infos_0_sco);
 	RTW_INFO("%s: sec=%d, group = %x, pair = %x, 8021X = %x\n", __func__,
 		 recv_beacon->encryp_protocol, recv_beacon->group_cipher,
 		 recv_beacon->pairwise_cipher, recv_beacon->is_8021x);
 }
-
+#define DBG_BCN_CNT
 int rtw_check_bcn_info(ADAPTER *Adapter, u8 *pframe, u32 packet_len)
 {
-#if 0
-	unsigned int		len;
-	unsigned char		*p;
-	unsigned short	val16, subtype;
-	struct wlan_network *cur_network = &(Adapter->mlmepriv.cur_network);
-	/* u8 wpa_ie[255],rsn_ie[255]; */
-	u16 wpa_len = 0, rsn_len = 0;
-	u8 encryp_protocol = 0;
-	WLAN_BSSID_EX *bssid;
-	int group_cipher = 0, pairwise_cipher = 0, is_8021x = 0;
-	unsigned char *pbuf;
-	u32 wpa_ielen = 0;
-	u8 *pbssid = GetAddr3Ptr(pframe);
-	u32 hidden_ssid = 0;
-	u8 cur_network_type, network_type = 0;
-	struct HT_info_element *pht_info = NULL;
-	struct rtw_ieee80211_ht_cap *pht_cap = NULL;
-	u32 bcn_channel;
-	unsigned short	ht_cap_info;
-	unsigned char	ht_info_infos_0;
-#endif
 	unsigned int len;
 	u8 *pbssid = GetAddr3Ptr(pframe);
 	struct mlme_priv *pmlmepriv = &Adapter->mlmepriv;
@@ -2362,13 +2586,17 @@ int rtw_check_bcn_info(ADAPTER *Adapter, u8 *pframe, u32 packet_len)
 	if (rtw_get_bcn_keys(Adapter, pframe, packet_len, &recv_beacon) == _FALSE)
 		return _TRUE; /* parsing failed => broken IE */
 
+#ifdef DBG_RX_BCN
+	rtw_debug_bcn(Adapter, pframe, packet_len);
+#endif
+
 	/* don't care hidden ssid, use current beacon ssid directly */
 	if (recv_beacon.ssid_len == 0) {
 		_rtw_memcpy(recv_beacon.ssid, pmlmepriv->cur_beacon_keys.ssid,
 			    pmlmepriv->cur_beacon_keys.ssid_len);
 		recv_beacon.ssid_len = pmlmepriv->cur_beacon_keys.ssid_len;
 	}
-
+#ifdef CONFIG_BCN_CNT_CONFIRM_HDL
 	if (_rtw_memcmp(&recv_beacon, &pmlmepriv->cur_beacon_keys, sizeof(recv_beacon)) == _TRUE)
 		pmlmepriv->new_beacon_cnts = 0;
 	else if ((pmlmepriv->new_beacon_cnts == 0) ||
@@ -2383,7 +2611,7 @@ int rtw_check_bcn_info(ADAPTER *Adapter, u8 *pframe, u32 packet_len)
 		RTW_DBG("%s: new beacon key\n", __func__);
 		RTW_DBG_EXPR(rtw_dump_bcn_keys(&recv_beacon));
 
-		memcpy(&pmlmepriv->new_beacon_keys, &recv_beacon, sizeof(recv_beacon));
+		_rtw_memcpy(&pmlmepriv->new_beacon_keys, &recv_beacon, sizeof(recv_beacon));
 		pmlmepriv->new_beacon_cnts = 1;
 	} else {
 		RTW_DBG("%s: new beacon again (seq=%d)\n", __func__, GetSequence(pframe));
@@ -2391,7 +2619,11 @@ int rtw_check_bcn_info(ADAPTER *Adapter, u8 *pframe, u32 packet_len)
 	}
 
 	/* if counter >= max, it means beacon is changed really */
-	if (pmlmepriv->new_beacon_cnts >= new_bcn_max) {
+	if (pmlmepriv->new_beacon_cnts >= new_bcn_max)
+#else
+	if (_rtw_memcmp(&recv_beacon, &pmlmepriv->cur_beacon_keys, sizeof(recv_beacon)) == _FALSE)
+#endif
+	{
 		/* check bw mode change only? */
 		pmlmepriv->cur_beacon_keys.ht_cap_info = recv_beacon.ht_cap_info;
 		pmlmepriv->cur_beacon_keys.ht_info_infos_0_sco = recv_beacon.ht_info_infos_0_sco;
@@ -2399,204 +2631,35 @@ int rtw_check_bcn_info(ADAPTER *Adapter, u8 *pframe, u32 packet_len)
 				sizeof(recv_beacon)) == _FALSE) {
 			/* beacon is changed, have to do disconnect/connect */
 			RTW_WARN("%s: new beacon occur!!\n", __func__);
+			#ifdef DBG_BCN_CNT
+			rtw_dump_bcn_keys(&recv_beacon);
+			#endif
 			return _FAIL;
 		}
-
+		#ifdef DBG_BCN_CNT
 		RTW_INFO("%s bw mode change\n", __func__);
 		RTW_INFO("%s bcn now: ht_cap_info:%x ht_info_infos_0:%x\n", __func__,
 			 cur_network->BcnInfo.ht_cap_info,
 			 cur_network->BcnInfo.ht_info_infos_0);
+		#endif
 
 		cur_network->BcnInfo.ht_cap_info = recv_beacon.ht_cap_info;
 		cur_network->BcnInfo.ht_info_infos_0 =
 			(cur_network->BcnInfo.ht_info_infos_0 & (~0x03)) |
 			recv_beacon.ht_info_infos_0_sco;
 
+		#ifdef DBG_BCN_CNT
 		RTW_INFO("%s bcn link: ht_cap_info:%x ht_info_infos_0:%x\n", __func__,
 			 cur_network->BcnInfo.ht_cap_info,
 			 cur_network->BcnInfo.ht_info_infos_0);
-
-		memcpy(&pmlmepriv->cur_beacon_keys, &recv_beacon, sizeof(recv_beacon));
+		#endif
+		_rtw_memcpy(&pmlmepriv->cur_beacon_keys, &recv_beacon, sizeof(recv_beacon));
+		#ifdef CONFIG_BCN_CNT_CONFIRM_HDL
 		pmlmepriv->new_beacon_cnts = 0;
+		#endif
 	}
 
 	return _SUCCESS;
-
-#if 0
-	bssid = (WLAN_BSSID_EX *)rtw_zmalloc(sizeof(WLAN_BSSID_EX));
-	if (bssid == NULL) {
-		RTW_INFO("%s rtw_zmalloc fail !!!\n", __func__);
-		return _TRUE;
-	}
-
-	if ((pmlmepriv->timeBcnInfoChkStart != 0) && (rtw_get_passing_time_ms(pmlmepriv->timeBcnInfoChkStart) > DISCONNECT_BY_CHK_BCN_FAIL_OBSERV_PERIOD_IN_MS)) {
-		pmlmepriv->timeBcnInfoChkStart = 0;
-		pmlmepriv->NumOfBcnInfoChkFail = 0;
-	}
-
-	subtype = get_frame_sub_type(pframe) >> 4;
-
-	if (subtype == WIFI_BEACON)
-		bssid->Reserved[0] = 1;
-
-	bssid->Length = sizeof(WLAN_BSSID_EX) - MAX_IE_SZ + len;
-
-	/* below is to copy the information element */
-	bssid->IELength = len;
-	_rtw_memcpy(bssid->IEs, (pframe + sizeof(struct rtw_ieee80211_hdr_3addr)), bssid->IELength);
-
-	/* check bw and channel offset */
-	/* parsing HT_CAP_IE */
-	p = rtw_get_ie(bssid->IEs + _FIXED_IE_LENGTH_, _HT_CAPABILITY_IE_, &len, bssid->IELength - _FIXED_IE_LENGTH_);
-	if (p && len > 0) {
-		pht_cap = (struct rtw_ieee80211_ht_cap *)(p + 2);
-		ht_cap_info = pht_cap->cap_info;
-	} else
-		ht_cap_info = 0;
-	/* parsing HT_INFO_IE */
-	p = rtw_get_ie(bssid->IEs + _FIXED_IE_LENGTH_, _HT_ADD_INFO_IE_, &len, bssid->IELength - _FIXED_IE_LENGTH_);
-	if (p && len > 0) {
-		pht_info = (struct HT_info_element *)(p + 2);
-		ht_info_infos_0 = pht_info->infos[0];
-	} else
-		ht_info_infos_0 = 0;
-	if (ht_cap_info != cur_network->BcnInfo.ht_cap_info ||
-	    ((ht_info_infos_0 & 0x03) != (cur_network->BcnInfo.ht_info_infos_0 & 0x03))) {
-		RTW_INFO("%s bcn now: ht_cap_info:%x ht_info_infos_0:%x\n", __func__,
-			 ht_cap_info, ht_info_infos_0);
-		RTW_INFO("%s bcn link: ht_cap_info:%x ht_info_infos_0:%x\n", __func__,
-			cur_network->BcnInfo.ht_cap_info, cur_network->BcnInfo.ht_info_infos_0);
-		RTW_INFO("%s bw mode change\n", __func__);
-		{
-			/* bcn_info_update */
-			cur_network->BcnInfo.ht_cap_info = ht_cap_info;
-			cur_network->BcnInfo.ht_info_infos_0 = ht_info_infos_0;
-			/* to do : need to check that whether modify related register of BB or not */
-		}
-		/* goto _mismatch; */
-	}
-
-	/* Checking for channel */
-	p = rtw_get_ie(bssid->IEs + _FIXED_IE_LENGTH_, _DSSET_IE_, &len, bssid->IELength - _FIXED_IE_LENGTH_);
-	if (p)
-		bcn_channel = *(p + 2);
-	else {/* In 5G, some ap do not have DSSET IE checking HT info for channel */
-		rtw_get_ie(bssid->IEs + _FIXED_IE_LENGTH_, _HT_ADD_INFO_IE_, &len, bssid->IELength - _FIXED_IE_LENGTH_);
-		if (pht_info)
-			bcn_channel = pht_info->primary_channel;
-		else { /* we don't find channel IE, so don't check it */
-			/* RTW_INFO("Oops: %s we don't find channel IE, so don't check it\n", __func__); */
-			bcn_channel = Adapter->mlmeextpriv.cur_channel;
-		}
-	}
-	if (bcn_channel != Adapter->mlmeextpriv.cur_channel) {
-		RTW_INFO("%s beacon channel:%d cur channel:%d disconnect\n", __func__,
-			 bcn_channel, Adapter->mlmeextpriv.cur_channel);
-		goto _mismatch;
-	}
-
-	/* checking SSID */
-	p = rtw_get_ie(bssid->IEs + _FIXED_IE_LENGTH_, _SSID_IE_, &len, bssid->IELength - _FIXED_IE_LENGTH_);
-	if (p == NULL) {
-		RTW_INFO("%s marc: cannot find SSID for survey event\n", __func__);
-		hidden_ssid = _TRUE;
-	} else
-		hidden_ssid = _FALSE;
-
-	if ((NULL != p) && (_FALSE == hidden_ssid && (*(p + 1)))) {
-		_rtw_memcpy(bssid->Ssid.Ssid, (p + 2), *(p + 1));
-		bssid->Ssid.SsidLength = *(p + 1);
-	} else {
-		bssid->Ssid.SsidLength = 0;
-		bssid->Ssid.Ssid[0] = '\0';
-	}
-
-
-	if (_rtw_memcmp(bssid->Ssid.Ssid, cur_network->network.Ssid.Ssid, 32) == _FALSE ||
-	    bssid->Ssid.SsidLength != cur_network->network.Ssid.SsidLength) {
-		if (bssid->Ssid.Ssid[0] != '\0' && bssid->Ssid.SsidLength != 0) { /* not hidden ssid */
-			RTW_INFO("%s(), SSID is not match\n", __func__);
-			goto _mismatch;
-		}
-	}
-
-	/* check encryption info */
-	val16 = rtw_get_capability((WLAN_BSSID_EX *)bssid);
-
-	if (val16 & BIT(4))
-		bssid->Privacy = 1;
-	else
-		bssid->Privacy = 0;
-
-	if (cur_network->network.Privacy != bssid->Privacy) {
-		RTW_INFO("%s(), privacy is not match\n", __func__);
-		goto _mismatch;
-	}
-
-	rtw_get_sec_ie(bssid->IEs, bssid->IELength, NULL, &rsn_len, NULL, &wpa_len);
-
-	if (rsn_len > 0)
-		encryp_protocol = ENCRYP_PROTOCOL_WPA2;
-	else if (wpa_len > 0)
-		encryp_protocol = ENCRYP_PROTOCOL_WPA;
-	else {
-		if (bssid->Privacy)
-			encryp_protocol = ENCRYP_PROTOCOL_WEP;
-	}
-
-	if (cur_network->BcnInfo.encryp_protocol != encryp_protocol) {
-		RTW_INFO("%s(): enctyp is not match\n", __func__);
-		goto _mismatch;
-	}
-
-	if (encryp_protocol == ENCRYP_PROTOCOL_WPA || encryp_protocol == ENCRYP_PROTOCOL_WPA2) {
-		pbuf = rtw_get_wpa_ie(&bssid->IEs[12], &wpa_ielen, bssid->IELength - 12);
-		if (pbuf && (wpa_ielen > 0)) {
-			rtw_parse_wpa_ie(pbuf, wpa_ielen + 2, &group_cipher, &pairwise_cipher, &is_8021x);
-		} else {
-			pbuf = rtw_get_wpa2_ie(&bssid->IEs[12], &wpa_ielen, bssid->IELength - 12);
-
-			if (pbuf && (wpa_ielen > 0)) {
-				rtw_parse_wpa2_ie(pbuf, wpa_ielen + 2, &group_cipher, &pairwise_cipher, &is_8021x, NULL);
-			}
-		}
-
-		if (pairwise_cipher != cur_network->BcnInfo.pairwise_cipher || group_cipher != cur_network->BcnInfo.group_cipher) {
-			RTW_INFO("%s pairwise_cipher(%x:%x) or group_cipher(%x:%x) is not match\n", __func__,
-				pairwise_cipher, cur_network->BcnInfo.pairwise_cipher,
-				group_cipher, cur_network->BcnInfo.group_cipher);
-			goto _mismatch;
-		}
-
-		if (is_8021x != cur_network->BcnInfo.is_8021x) {
-			RTW_INFO("%s authentication is not match\n", __func__);
-			goto _mismatch;
-		}
-	}
-
-	rtw_mfree((u8 *)bssid, sizeof(WLAN_BSSID_EX));
-	return _SUCCESS;
-
-_mismatch:
-	rtw_mfree((u8 *)bssid, sizeof(WLAN_BSSID_EX));
-
-	if (pmlmepriv->NumOfBcnInfoChkFail == 0)
-		pmlmepriv->timeBcnInfoChkStart = rtw_get_current_time();
-
-	pmlmepriv->NumOfBcnInfoChkFail++;
-	RTW_INFO("%s by "ADPT_FMT" - NumOfChkFail = %d (SeqNum of this Beacon frame = %d).\n", __func__, ADPT_ARG(Adapter), pmlmepriv->NumOfBcnInfoChkFail, GetSequence(pframe));
-
-	if ((pmlmepriv->timeBcnInfoChkStart != 0) && (rtw_get_passing_time_ms(pmlmepriv->timeBcnInfoChkStart) <= DISCONNECT_BY_CHK_BCN_FAIL_OBSERV_PERIOD_IN_MS)
-	    && (pmlmepriv->NumOfBcnInfoChkFail >= DISCONNECT_BY_CHK_BCN_FAIL_THRESHOLD)) {
-		RTW_INFO("%s by "ADPT_FMT" - NumOfChkFail = %d >= threshold : %d (in %d ms), return FAIL.\n", __func__, ADPT_ARG(Adapter), pmlmepriv->NumOfBcnInfoChkFail,
-			DISCONNECT_BY_CHK_BCN_FAIL_THRESHOLD, rtw_get_passing_time_ms(pmlmepriv->timeBcnInfoChkStart));
-		pmlmepriv->timeBcnInfoChkStart = 0;
-		pmlmepriv->NumOfBcnInfoChkFail = 0;
-		return _FAIL;
-	}
-
-	return _SUCCESS;
-#endif
 }
 
 void update_beacon_info(_adapter *padapter, u8 *pframe, uint pkt_len, struct sta_info *psta)
@@ -2654,26 +2717,23 @@ void update_beacon_info(_adapter *padapter, u8 *pframe, uint pkt_len, struct sta
 }
 
 #ifdef CONFIG_DFS
-void process_csa_ie(_adapter *padapter, u8 *pframe, uint pkt_len)
+void process_csa_ie(_adapter *padapter, u8 *ies, uint ies_len)
 {
+	struct rf_ctl_t *rfctl = adapter_to_rfctl(padapter);
 	unsigned int i;
-	unsigned int len;
 	PNDIS_802_11_VARIABLE_IEs	pIE;
-	u8 new_ch_no = 0;
+	u8 ch = 0;
 
-	if (padapter->mlmepriv.handle_dfs == _TRUE)
+	/* TODO: compare with scheduling CSA */
+	if (rfctl->csa_ch)
 		return;
 
-	len = pkt_len - (_BEACON_IE_OFFSET_ + WLAN_HDR_A3_LEN);
-
-	for (i = 0; i < len;) {
-		pIE = (PNDIS_802_11_VARIABLE_IEs)(pframe + (_BEACON_IE_OFFSET_ + WLAN_HDR_A3_LEN) + i);
+	for (i = 0; i + 1 < ies_len;) {
+		pIE = (PNDIS_802_11_VARIABLE_IEs)(ies + i);
 
 		switch (pIE->ElementID) {
 		case _CH_SWTICH_ANNOUNCE_:
-			padapter->mlmepriv.handle_dfs = _TRUE;
-			_rtw_memcpy(&new_ch_no, pIE->data + 1, 1);
-			rtw_set_csa_cmd(padapter, new_ch_no);
+			ch = *(pIE->data + 1);
 			break;
 		default:
 			break;
@@ -2681,9 +2741,65 @@ void process_csa_ie(_adapter *padapter, u8 *pframe, uint pkt_len)
 
 		i += (pIE->Length + 2);
 	}
+
+	if (ch != 0) {
+		rfctl->csa_ch = ch;
+		if (rtw_set_csa_cmd(padapter) != _SUCCESS)
+			rfctl->csa_ch = 0;
+	}
 }
 #endif /* CONFIG_DFS */
 
+void parsing_eapol_packet(_adapter *padapter, u8 *key_payload, struct sta_info *psta, u8 trx_type)
+{
+	struct security_priv *psecuritypriv = &(padapter->securitypriv);
+	struct mlme_priv *pmlmepriv = &(padapter->mlmepriv);
+	struct sta_priv *pstapriv = &(padapter->stapriv);
+	struct ieee802_1x_hdr *hdr;
+	struct wpa_eapol_key *key;
+	u16 key_info, key_data_length;
+	char *trx_msg = trx_type ? "send" : "recv";
+
+	hdr = (struct ieee802_1x_hdr *) key_payload;
+
+	 /* WPS - eapol start packet */
+	if (hdr->type == 1 && hdr->length == 0) {
+		RTW_INFO("%s eapol start packet\n", trx_msg);
+		return;
+	}
+
+	if (hdr->type == 0) { /* WPS - eapol packet */
+		RTW_INFO("%s eapol packet\n", trx_msg);
+		return;
+	}
+
+	key = (struct wpa_eapol_key *) (hdr + 1);
+	key_info = be16_to_cpu(*((u16 *)(key->key_info)));
+	key_data_length = be16_to_cpu(*((u16 *)(key->key_data_length)));
+
+	if (!(key_info & WPA_KEY_INFO_KEY_TYPE)) { /* WPA group key handshake */
+		if (key_info & WPA_KEY_INFO_ACK) {
+			RTW_PRINT("%s eapol packet - WPA Group Key 1/2\n", trx_msg);
+		} else {
+			RTW_PRINT("%s eapol packet - WPA Group Key 2/2\n", trx_msg);
+
+			/* WPA key-handshake has completed */
+			if (psecuritypriv->ndisauthtype == Ndis802_11AuthModeWPAPSK)
+				psta->state &= (~WIFI_UNDER_KEY_HANDSHAKE);
+		}
+	} else if (key_info & WPA_KEY_INFO_MIC) {
+		if (key_data_length == 0)
+			RTW_PRINT("%s eapol packet 4/4\n", trx_msg);
+		else if (key_info & WPA_KEY_INFO_ACK)
+			RTW_PRINT("%s eapol packet 3/4\n", trx_msg);
+		else
+			RTW_PRINT("%s eapol packet 2/4\n", trx_msg);
+	} else {
+		RTW_PRINT("%s eapol packet 1/4\n", trx_msg);
+	}
+
+}
+
 unsigned int is_ap_in_tkip(_adapter *padapter)
 {
 	u32 i;
@@ -3048,6 +3164,107 @@ unsigned char check_assoc_AP(u8 *pframe, uint len)
 	return HT_IOT_PEER_UNKNOWN;
 }
 
+void get_assoc_AP_Vendor(char *vendor, u8 assoc_AP_vendor)
+{
+	switch (assoc_AP_vendor) {
+	
+	case HT_IOT_PEER_UNKNOWN:
+	sprintf(vendor, "%s", "unknown");
+	break;
+
+	case HT_IOT_PEER_REALTEK:
+	case HT_IOT_PEER_REALTEK_92SE:
+	case HT_IOT_PEER_REALTEK_SOFTAP:
+	case HT_IOT_PEER_REALTEK_JAGUAR_BCUTAP:
+	case HT_IOT_PEER_REALTEK_JAGUAR_CCUTAP:
+
+	sprintf(vendor, "%s", "Realtek");
+	break;
+
+	case HT_IOT_PEER_BROADCOM:
+	sprintf(vendor, "%s", "Broadcom");
+	break;
+
+	case HT_IOT_PEER_MARVELL:
+	sprintf(vendor, "%s", "Marvell");
+	break;
+
+	case HT_IOT_PEER_RALINK:
+	sprintf(vendor, "%s", "Ralink");
+	break;
+
+	case HT_IOT_PEER_CISCO:
+	sprintf(vendor, "%s", "Cisco");
+	break;
+
+	case HT_IOT_PEER_AIRGO:
+	sprintf(vendor, "%s", "Airgo");
+	break;
+
+	case HT_IOT_PEER_ATHEROS:
+	sprintf(vendor, "%s", "Atheros");
+	break;
+
+	default:
+	sprintf(vendor, "%s", "unkown");
+	break;
+	}
+
+}
+#ifdef CONFIG_RTS_FULL_BW
+void rtw_parse_sta_vendor_ie_8812(_adapter *adapter, struct sta_info *sta, u8 *tlv_ies, u16 tlv_ies_len)
+{
+	struct mlme_priv *mlme = &adapter->mlmepriv;
+	unsigned char REALTEK_OUI[] = {0x00,0xe0, 0x4c};
+	u8 *p;
+	int i;
+
+	p = rtw_get_ie_ex(tlv_ies, tlv_ies_len, WLAN_EID_VENDOR_SPECIFIC, REALTEK_OUI, 3, NULL, NULL);
+	if (!p)
+		goto exit;
+	else {
+		if(*(p+1) > 6 ) {
+			for(i=0; i<9;i++)
+				RTW_INFO("p[%d]=0x%x",i,*(p+i) );
+				RTW_INFO("\n");
+			if(*(p+6) != 2)
+				goto exit;
+			
+			if(*(p+8) == RT_HT_CAP_USE_JAGUAR_BCUT)
+				sta->vendor_8812 = TRUE;
+			else if (*(p+8) == RT_HT_CAP_USE_JAGUAR_CCUT)
+				sta->vendor_8812 = TRUE;
+		}
+	}
+exit:
+	return;
+}
+#endif/*CONFIG_RTS_FULL_BW*/
+
+#ifdef CONFIG_80211AC_VHT
+unsigned char get_vht_mu_bfer_cap(u8 *pframe, uint len)
+{
+	unsigned int i;
+	unsigned int mu_bfer=0;
+	PNDIS_802_11_VARIABLE_IEs pIE;
+
+	for (i = sizeof(NDIS_802_11_FIXED_IEs); i < len;) {
+		pIE = (PNDIS_802_11_VARIABLE_IEs)(pframe + i);
+
+		switch (pIE->ElementID) {
+
+		case EID_VHTCapability:
+			mu_bfer = GET_VHT_CAPABILITY_ELE_MU_BFER(pIE->data);
+			break;
+		default:
+			break;
+		}
+		i += (pIE->Length + 2);
+	}
+	return mu_bfer;
+}
+#endif
+
 void update_capinfo(PADAPTER Adapter, u16 updateCap)
 {
 	struct mlme_ext_priv	*pmlmeext = &Adapter->mlmeextpriv;
@@ -3147,6 +3364,9 @@ void update_wireless_mode(_adapter *padapter)
 
 	pmlmeext->cur_wireless_mode = network_type & padapter->registrypriv.wireless_mode;
 	/* RTW_INFO("network_type=%02x, padapter->registrypriv.wireless_mode=%02x\n", network_type, padapter->registrypriv.wireless_mode); */
+
+#ifndef RTW_HALMAC
+	/* HALMAC IC do not set HW_VAR_RESP_SIFS here */
 #if 0
 	if ((pmlmeext->cur_wireless_mode == WIRELESS_11G) ||
 	    (pmlmeext->cur_wireless_mode == WIRELESS_11BG)) /* WIRELESS_MODE_G) */
@@ -3159,6 +3379,7 @@ void update_wireless_mode(_adapter *padapter)
                               * change this value if having IOT issues. */
 
 	rtw_hal_set_hwreg(padapter, HW_VAR_RESP_SIFS, (u8 *)&SIFS_Timer);
+#endif
 
 	rtw_hal_set_hwreg(padapter, HW_VAR_WIRELESS_MODE, (u8 *)&(pmlmeext->cur_wireless_mode));
 
@@ -3217,26 +3438,71 @@ void update_sta_basic_rate(struct sta_info *psta, u8 wireless_mode)
 
 int rtw_ies_get_supported_rate(u8 *ies, uint ies_len, u8 *rate_set, u8 *rate_num)
 {
-	u8 *ie;
+	u8 *ie, *p;
 	unsigned int ie_len;
-
+	int i, j;
+
+	struct support_rate_handler support_rate_tbl[] = {
+		{IEEE80211_CCK_RATE_1MB, 		_FALSE,		_FALSE},
+		{IEEE80211_CCK_RATE_2MB, 		_FALSE,		_FALSE},
+		{IEEE80211_CCK_RATE_5MB, 		_FALSE,		_FALSE},
+		{IEEE80211_CCK_RATE_11MB,		_FALSE,		_FALSE},
+		{IEEE80211_OFDM_RATE_6MB,		_FALSE,		_FALSE},
+		{IEEE80211_OFDM_RATE_9MB,		_FALSE,		_FALSE},
+		{IEEE80211_OFDM_RATE_12MB,		_FALSE,		_FALSE},
+		{IEEE80211_OFDM_RATE_18MB,		_FALSE,		_FALSE},
+		{IEEE80211_OFDM_RATE_24MB,		_FALSE,		_FALSE},
+		{IEEE80211_OFDM_RATE_36MB,		_FALSE,		_FALSE},
+		{IEEE80211_OFDM_RATE_48MB,		_FALSE,		_FALSE},
+		{IEEE80211_OFDM_RATE_54MB,		_FALSE,		_FALSE},
+	};
+		
 	if (!rate_set || !rate_num)
 		return _FALSE;
 
 	*rate_num = 0;
-
 	ie = rtw_get_ie(ies, _SUPPORTEDRATES_IE_, &ie_len, ies_len);
 	if (ie == NULL)
 		goto ext_rate;
 
-	_rtw_memcpy(rate_set, ie + 2, ie_len);
-	*rate_num = ie_len;
+	/* get valid supported rates */
+	for (i = 0; i < 12; i++) {
+		p = ie + 2;
+		for (j = 0; j < ie_len; j++) {
+			if ((*p & ~BIT(7)) == support_rate_tbl[i].rate){
+				support_rate_tbl[i].existence = _TRUE;
+				if ((*p) & BIT(7))
+					support_rate_tbl[i].basic = _TRUE;
+			}
+			p++;
+		}
+	}
 
 ext_rate:
 	ie = rtw_get_ie(ies, _EXT_SUPPORTEDRATES_IE_, &ie_len, ies_len);
 	if (ie) {
-		_rtw_memcpy(rate_set + *rate_num, ie + 2, ie_len);
-		*rate_num += ie_len;
+		/* get valid extended supported rates */
+		for (i = 0; i < 12; i++) {
+			p = ie + 2;
+			for (j = 0; j < ie_len; j++) {
+				if ((*p & ~BIT(7)) == support_rate_tbl[i].rate){
+					support_rate_tbl[i].existence = _TRUE;
+					if ((*p) & BIT(7))
+						support_rate_tbl[i].basic = _TRUE;
+				}
+				p++;
+			}
+		}
+	}
+
+	for (i = 0; i < 12; i++){
+		if (support_rate_tbl[i].existence){
+			if (support_rate_tbl[i].basic)
+				rate_set[*rate_num] = support_rate_tbl[i].rate | IEEE80211_BASIC_RATE_MASK;
+			else
+				rate_set[*rate_num] = support_rate_tbl[i].rate;
+			*rate_num += 1;
+		}
 	}
 
 	if (*rate_num == 0)
@@ -3258,8 +3524,6 @@ void process_addba_req(_adapter *padapter, u8 *paddba_req, u8 *addr)
 	u16 tid, start_seq, param;
 	struct sta_priv *pstapriv = &padapter->stapriv;
 	struct ADDBA_request	*preq = (struct ADDBA_request *)paddba_req;
-	struct mlme_ext_priv	*pmlmeext = &padapter->mlmeextpriv;
-	struct mlme_ext_info	*pmlmeinfo = &(pmlmeext->mlmext_info);
 	u8 size, accept = _FALSE;
 
 	psta = rtw_get_stainfo(pstapriv, addr);
@@ -3291,7 +3555,6 @@ exit:
 
 void rtw_process_bar_frame(_adapter *padapter, union recv_frame *precv_frame)
 {
-	struct rx_pkt_attrib *pattrib = &precv_frame->u.hdr.attrib;
 	struct sta_priv *pstapriv = &padapter->stapriv;
 	u8 *pframe = precv_frame->u.hdr.rx_data;
 	struct sta_info *psta = NULL;
@@ -3331,101 +3594,39 @@ void update_TSF(struct mlme_ext_priv *pmlmeext, u8 *pframe, uint len)
 	pmlmeext->TSFValue |= le32_to_cpu(*pbuf);
 }
 
-void correct_TSF(_adapter *padapter, struct mlme_ext_priv *pmlmeext)
+void correct_TSF(_adapter *padapter, u8 mlme_state)
 {
-	rtw_hal_set_hwreg(padapter, HW_VAR_CORRECT_TSF, 0);
+	u8 m_state = mlme_state;
+
+	rtw_hal_set_hwreg(padapter, HW_VAR_CORRECT_TSF, (u8 *)&m_state);
 }
 
-void adaptive_early_32k(struct mlme_ext_priv *pmlmeext, u8 *pframe, uint len)
+#ifdef CONFIG_BCN_RECV_TIME
+/*	calculate beacon receiving time
+	1.RxBCNTime(CCK_1M) = [192us(preamble)] + [length of beacon(byte)*8us] + [10us]
+	2.RxBCNTime(OFDM_6M) = [8us(S) + 8us(L) + 4us(L-SIG)] + [(length of beacon(byte)/3 + 1] *4us] + [10us]
+*/
+inline u16 _rx_bcn_time_calculate(uint bcn_len, u8 data_rate)
 {
-	int i;
-	u8 *pIE;
-	u32 *pbuf;
-	u64 tsf = 0;
-	u32 delay_ms;
-	struct mlme_ext_info	*pmlmeinfo = &(pmlmeext->mlmext_info);
-
-
-	pmlmeext->bcn_cnt++;
-
-	pIE = pframe + sizeof(struct rtw_ieee80211_hdr_3addr);
-	pbuf = (u32 *)pIE;
-
-	tsf = le32_to_cpu(*(pbuf + 1));
-	tsf = tsf << 32;
-	tsf |= le32_to_cpu(*pbuf);
-
-	/* RTW_INFO("%s(): tsf_upper= 0x%08x, tsf_lower=0x%08x\n", __func__, (u32)(tsf>>32), (u32)tsf); */
-
-	/* delay = (timestamp mod 1024*100)/1000 (unit: ms) */
-	/* delay_ms = do_div(tsf, (pmlmeinfo->bcn_interval*1024))/1000; */
-	delay_ms = rtw_modular64(tsf, (pmlmeinfo->bcn_interval * 1024));
-	delay_ms = delay_ms / 1000;
-
-	if (delay_ms >= 8) {
-		pmlmeext->bcn_delay_cnt[8]++;
-		/* pmlmeext->bcn_delay_ratio[8] = (pmlmeext->bcn_delay_cnt[8] * 100) /pmlmeext->bcn_cnt; */
-	} else {
-		pmlmeext->bcn_delay_cnt[delay_ms]++;
-		/* pmlmeext->bcn_delay_ratio[delay_ms] = (pmlmeext->bcn_delay_cnt[delay_ms] * 100) /pmlmeext->bcn_cnt; */
-	}
-
-	/*
-		RTW_INFO("%s(): (a)bcn_cnt = %d\n", __func__, pmlmeext->bcn_cnt);
-
-
-		for(i=0; i<9; i++)
-		{
-			RTW_INFO("%s():bcn_delay_cnt[%d]=%d,  bcn_delay_ratio[%d]=%d\n", __func__, i,
-				pmlmeext->bcn_delay_cnt[i] , i, pmlmeext->bcn_delay_ratio[i]);
-		}
-	*/
-
-	/* dump for  adaptive_early_32k */
-	if (pmlmeext->bcn_cnt > 100 && (pmlmeext->adaptive_tsf_done == _TRUE)) {
-		u8 ratio_20_delay, ratio_80_delay;
-		u8 DrvBcnEarly, DrvBcnTimeOut;
-
-		ratio_20_delay = 0;
-		ratio_80_delay = 0;
-		DrvBcnEarly = 0xff;
-		DrvBcnTimeOut = 0xff;
-
-		RTW_INFO("%s(): bcn_cnt = %d\n", __func__, pmlmeext->bcn_cnt);
-
-		for (i = 0; i < 9; i++) {
-			pmlmeext->bcn_delay_ratio[i] = (pmlmeext->bcn_delay_cnt[i] * 100) / pmlmeext->bcn_cnt;
-
-
-			/* RTW_INFO("%s():bcn_delay_cnt[%d]=%d,  bcn_delay_ratio[%d]=%d\n", __func__, i,  */
-			/*	pmlmeext->bcn_delay_cnt[i] , i, pmlmeext->bcn_delay_ratio[i]); */
-
-			ratio_20_delay += pmlmeext->bcn_delay_ratio[i];
-			ratio_80_delay += pmlmeext->bcn_delay_ratio[i];
-
-			if (ratio_20_delay > 20 && DrvBcnEarly == 0xff) {
-				DrvBcnEarly = i;
-				/* RTW_INFO("%s(): DrvBcnEarly = %d\n", __func__, DrvBcnEarly); */
-			}
-
-			if (ratio_80_delay > 80 && DrvBcnTimeOut == 0xff) {
-				DrvBcnTimeOut = i;
-				/* RTW_INFO("%s(): DrvBcnTimeOut = %d\n", __func__, DrvBcnTimeOut); */
-			}
-
-			/* reset adaptive_early_32k cnt */
-			pmlmeext->bcn_delay_cnt[i] = 0;
-			pmlmeext->bcn_delay_ratio[i] = 0;
-		}
-
-		pmlmeext->DrvBcnEarly = DrvBcnEarly;
-		pmlmeext->DrvBcnTimeOut = DrvBcnTimeOut;
-
-		pmlmeext->bcn_cnt = 0;
-	}
+	u16 rx_bcn_time = 0;/*us*/
 
+	if (data_rate == DESC_RATE1M)
+		rx_bcn_time = 192 + bcn_len * 8 + 10;
+	else if(data_rate == DESC_RATE6M)
+		rx_bcn_time = 8 + 8 + 4 + (bcn_len /3 + 1) * 4 + 10;
+/*
+	else
+		RTW_ERR("%s invalid data rate(0x%02x)\n", __func__, data_rate);
+*/
+	return rx_bcn_time;
 }
+void rtw_rx_bcn_time_update(_adapter *adapter, uint bcn_len, u8 data_rate)
+{
+	struct mlme_ext_priv *pmlmeext = &adapter->mlmeextpriv;
 
+	pmlmeext->bcn_rx_time = _rx_bcn_time_calculate(bcn_len, data_rate);
+}
+#endif
 
 void beacon_timing_control(_adapter *padapter)
 {
@@ -3591,7 +3792,18 @@ inline u8 rtw_iface_bcmc_id_get(_adapter *padapter)
 
 	return macid_ctl->iface_bmc[padapter->iface_id];
 }
+#if defined(DBG_CONFIG_ERROR_RESET) && defined(CONFIG_CONCURRENT_MODE)
+void rtw_iface_bcmc_sec_cam_map_restore(_adapter *adapter)
+{
+	struct dvobj_priv *dvobj = adapter_to_dvobj(adapter);
+	struct cam_ctl_t *cam_ctl = dvobj_to_sec_camctl(dvobj);
+	int cam_id = -1;
 
+	cam_id = rtw_iface_bcmc_id_get(adapter);
+	if (cam_id != INVALID_SEC_MAC_CAM_ID)
+		rtw_sec_cam_map_set(&cam_ctl->used, cam_id);
+}
+#endif
 void rtw_alloc_macid(_adapter *padapter, struct sta_info *psta)
 {
 	int i;
@@ -4744,3 +4956,16 @@ void rtw_dev_pno_debug(struct net_device *net)
 }
 #endif /* CONFIG_PNO_SET_DEBUG */
 #endif /* CONFIG_PNO_SUPPORT */
+
+inline void rtw_collect_bcn_info(_adapter *adapter)
+{
+	struct mlme_ext_priv *pmlmeext = &adapter->mlmeextpriv;
+
+	if (!is_client_associated_to_ap(adapter))
+		return;
+
+	pmlmeext->cur_bcn_cnt = pmlmeext->bcn_cnt - pmlmeext->last_bcn_cnt;
+	pmlmeext->last_bcn_cnt = pmlmeext->bcn_cnt;
+	/*TODO get offset of bcn's timestamp*/
+	/*pmlmeext->bcn_timestamp;*/
+}
diff --git a/rtl8723DS/core/rtw_xmit.c b/rtl8723DS/core/rtw_xmit.c
index 9034d68..93e4044 100755..100644
--- a/rtl8723DS/core/rtw_xmit.c
+++ b/rtl8723DS/core/rtw_xmit.c
@@ -471,7 +471,6 @@ void rtw_get_adapter_tx_rate_bmp_by_bw(_adapter *adapter, u8 bw, u16 *r_bmp_cck_
 {
 	struct dvobj_priv *dvobj = adapter_to_dvobj(adapter);
 	struct macid_ctl_t *macid_ctl = dvobj_to_macidctl(dvobj);
-	struct mlme_ext_priv *mlmeext = &adapter->mlmeextpriv;
 	u8 fix_bw = 0xFF;
 	u16 bmp_cck_ofdm = 0;
 	u32 bmp_ht = 0;
@@ -504,7 +503,6 @@ void rtw_get_adapter_tx_rate_bmp_by_bw(_adapter *adapter, u8 bw, u16 *r_bmp_cck_
 
 	/* TODO: mlmeext->tx_rate*/
 
-exit:
 	if (r_bmp_cck_ofdm)
 		*r_bmp_cck_ofdm = bmp_cck_ofdm;
 	if (r_bmp_ht)
@@ -925,8 +923,7 @@ static void update_attrib_phy_info(_adapter *padapter, struct pkt_attrib *pattri
 	pattrib->triggered = 0;
 	pattrib->ampdu_spacing = 0;
 
-	/* qos_en, ht_en, init rate, ,bw, ch_offset, sgi */
-	pattrib->qos_en = psta->qos_option;
+	/* ht_en, init rate, ,bw, ch_offset, sgi */
 
 	pattrib->raid = psta->cmn.ra_info.rate_id;
 
@@ -938,23 +935,26 @@ static void update_attrib_phy_info(_adapter *padapter, struct pkt_attrib *pattri
 	pattrib->stbc = psta->cmn.stbc_en;
 
 #ifdef CONFIG_80211N_HT
-	pattrib->ht_en = psta->htpriv.ht_option;
-	pattrib->ch_offset = psta->htpriv.ch_offset;
-	pattrib->ampdu_en = _FALSE;
+	if(padapter->registrypriv.ht_enable &&
+		is_supported_ht(padapter->registrypriv.wireless_mode)) {
+		pattrib->ht_en = psta->htpriv.ht_option;
+		pattrib->ch_offset = psta->htpriv.ch_offset;
+		pattrib->ampdu_en = _FALSE;
 
-	if (padapter->driver_ampdu_spacing != 0xFF) /* driver control AMPDU Density for peer sta's rx */
-		pattrib->ampdu_spacing = padapter->driver_ampdu_spacing;
-	else
-		pattrib->ampdu_spacing = psta->htpriv.rx_ampdu_min_spacing;
-
-	/* check if enable ampdu */
-	if (pattrib->ht_en && psta->htpriv.ampdu_enable) {
-		if (psta->htpriv.agg_enable_bitmap & BIT(pattrib->priority)) {
-			pattrib->ampdu_en = _TRUE;
-			if (psta->htpriv.tx_amsdu_enable == _TRUE)
-				pattrib->amsdu_ampdu_en = _TRUE;
-			else
-				pattrib->amsdu_ampdu_en = _FALSE;
+		if (padapter->driver_ampdu_spacing != 0xFF) /* driver control AMPDU Density for peer sta's rx */
+			pattrib->ampdu_spacing = padapter->driver_ampdu_spacing;
+		else
+			pattrib->ampdu_spacing = psta->htpriv.rx_ampdu_min_spacing;
+
+		/* check if enable ampdu */
+		if (pattrib->ht_en && psta->htpriv.ampdu_enable) {
+			if (psta->htpriv.agg_enable_bitmap & BIT(pattrib->priority)) {
+				pattrib->ampdu_en = _TRUE;
+				if (psta->htpriv.tx_amsdu_enable == _TRUE)
+					pattrib->amsdu_ampdu_en = _TRUE;
+				else
+					pattrib->amsdu_ampdu_en = _FALSE;
+			}
 		}
 	}
 #endif /* CONFIG_80211N_HT */
@@ -970,10 +970,13 @@ static void update_attrib_phy_info(_adapter *padapter, struct pkt_attrib *pattri
 
 		pattrib->raid = psta->cmn.ra_info.rate_id;
 #ifdef CONFIG_80211N_HT
-		pattrib->bwmode = rtw_get_tx_bw_mode(padapter, psta);
-		pattrib->ht_en = psta->htpriv.ht_option;
-		pattrib->ch_offset = psta->htpriv.ch_offset;
-		pattrib->sgi = query_ra_short_GI(psta, pattrib->bwmode);
+	if(padapter->registrypriv.ht_enable &&
+		is_supported_ht(padapter->registrypriv.wireless_mode)) {
+			pattrib->bwmode = rtw_get_tx_bw_mode(padapter, psta);
+			pattrib->ht_en = psta->htpriv.ht_option;
+			pattrib->ch_offset = psta->htpriv.ch_offset;
+			pattrib->sgi = query_ra_short_GI(psta, pattrib->bwmode);
+	}
 #endif /* CONFIG_80211N_HT */
 	}
 #endif /* CONFIG_TDLS */
@@ -1185,6 +1188,15 @@ static void set_qos(struct pkt_file *ppktfile, struct pkt_attrib *pattrib)
 			UserPriority = 7;
 		}
 	*/
+
+	#ifdef CONFIG_ICMP_VOQ
+	if(pattrib->icmp_pkt==1)/*use VO queue to send icmp packet*/
+		UserPriority = 7;
+	#endif
+	#ifdef CONFIG_IP_R_MONITOR
+	if (pattrib->ether_type == ETH_P_ARP)
+		UserPriority = 7;
+	#endif/*CONFIG_IP_R_MONITOR*/
 	pattrib->priority = UserPriority;
 	pattrib->hdrlen = WLAN_HDR_A3_QOS_LEN;
 	pattrib->subtype = WIFI_QOS_DATA_TYPE;
@@ -1273,18 +1285,49 @@ exit:
 
 #endif /* CONFIG_TDLS */
 
-/*get non-qos hw_ssn control register,mapping to REG_HW_SEQ0,1,2,3*/
+/*get non-qos hw_ssn control register,mapping to REG_HW_SEQ 0,1,2,3*/
 inline u8 rtw_get_hwseq_no(_adapter *padapter)
 {
 	u8 hwseq_num = 0;
+
 #ifdef CONFIG_CONCURRENT_MODE
-	if (padapter->adapter_type != PRIMARY_ADAPTER)
+	#if defined(CONFIG_RTL8822B) || defined(CONFIG_RTL8821C) || defined(CONFIG_RTL8822C)
+	hwseq_num = padapter->iface_id;
+	if (hwseq_num > 3)
+		hwseq_num = 3;
+	#else
+	if (!is_primary_adapter(padapter))
 		hwseq_num = 1;
-	/* else */
-	/*	hwseq_num = 2; */
+	#endif
 #endif /* CONFIG_CONCURRENT_MODE */
 	return hwseq_num;
 }
+#ifdef CONFIG_LPS
+#define LPS_PT_NORMAL	0
+#define LPS_PT_SP		1/* only DHCP packets is as SPECIAL_PACKET*/
+#define LPS_PT_ICMP		2
+
+/*If EAPOL , ARP , OR DHCP packet, driver must be in active mode.*/
+static u8 _rtw_lps_chk_packet_type(struct pkt_attrib *pattrib)
+{
+	u8 pkt_type = LPS_PT_NORMAL; /*normal data frame*/
+
+	#ifdef CONFIG_WAPI_SUPPORT
+	if ((pattrib->ether_type == 0x88B4) || (pattrib->ether_type == 0x0806) || (pattrib->ether_type == 0x888e) || (pattrib->dhcp_pkt == 1))
+		pkt_type = LPS_PT_SP;
+	#else /* !CONFIG_WAPI_SUPPORT */
+
+	#ifndef CONFIG_LPS_NOT_LEAVE_FOR_ICMP
+	if (pattrib->icmp_pkt == 1)
+		pkt_type = LPS_PT_ICMP;
+	else
+	#endif
+		if (pattrib->dhcp_pkt == 1)
+			pkt_type = LPS_PT_SP;
+	#endif
+	return pkt_type;
+}
+#endif
 static s32 update_attrib(_adapter *padapter, _pkt *pkt, struct pkt_attrib *pattrib)
 {
 	uint i;
@@ -1294,12 +1337,13 @@ static s32 update_attrib(_adapter *padapter, _pkt *pkt, struct pkt_attrib *pattr
 
 	sint bmcast;
 	struct sta_priv		*pstapriv = &padapter->stapriv;
-	struct security_priv	*psecuritypriv = &padapter->securitypriv;
 	struct mlme_priv		*pmlmepriv = &padapter->mlmepriv;
 	struct qos_priv		*pqospriv = &pmlmepriv->qospriv;
 	struct xmit_priv		*pxmitpriv = &padapter->xmitpriv;
 	sint res = _SUCCESS;
-
+#ifdef CONFIG_LPS
+	u8 pkt_type = 0;
+#endif
 
 	DBG_COUNTER(padapter->tx_logs.core_tx_upd_attrib);
 
@@ -1308,11 +1352,12 @@ static s32 update_attrib(_adapter *padapter, _pkt *pkt, struct pkt_attrib *pattr
 
 	pattrib->ether_type = ntohs(etherhdr.h_proto);
 
+	if (MLME_IS_MESH(padapter)) /* address resolve is done for mesh */
+		goto get_sta_info;
 
 	_rtw_memcpy(pattrib->dst, &etherhdr.h_dest, ETH_ALEN);
 	_rtw_memcpy(pattrib->src, &etherhdr.h_source, ETH_ALEN);
 
-
 	if ((check_fwstate(pmlmepriv, WIFI_ADHOC_STATE) == _TRUE) ||
 	    (check_fwstate(pmlmepriv, WIFI_ADHOC_MASTER_STATE) == _TRUE)) {
 		_rtw_memcpy(pattrib->ra, pattrib->dst, ETH_ALEN);
@@ -1334,14 +1379,15 @@ static s32 update_attrib(_adapter *padapter, _pkt *pkt, struct pkt_attrib *pattr
 	} else
 		DBG_COUNTER(padapter->tx_logs.core_tx_upd_attrib_unknown);
 
+get_sta_info:
 	bmcast = IS_MCAST(pattrib->ra);
 	if (bmcast) {
 		psta = rtw_get_bcmc_stainfo(padapter);
 		if (psta == NULL) { /* if we cannot get psta => drop the pkt */
 			DBG_COUNTER(padapter->tx_logs.core_tx_upd_attrib_err_sta);
-#ifdef DBG_TX_DROP_FRAME
+			#ifdef DBG_TX_DROP_FRAME
 			RTW_INFO("DBG_TX_DROP_FRAME %s get sta_info fail, ra:" MAC_FMT"\n", __func__, MAC_ARG(pattrib->ra));
-#endif
+			#endif
 			res = _FAIL;
 			goto exit;
 		}
@@ -1349,9 +1395,9 @@ static s32 update_attrib(_adapter *padapter, _pkt *pkt, struct pkt_attrib *pattr
 		psta = rtw_get_stainfo(pstapriv, pattrib->ra);
 		if (psta == NULL) { /* if we cannot get psta => drop the pkt */
 			DBG_COUNTER(padapter->tx_logs.core_tx_upd_attrib_err_ucast_sta);
-#ifdef DBG_TX_DROP_FRAME
+			#ifdef DBG_TX_DROP_FRAME
 			RTW_INFO("DBG_TX_DROP_FRAME %s get sta_info fail, ra:" MAC_FMT"\n", __func__, MAC_ARG(pattrib->ra));
-#endif
+			#endif
 			res = _FAIL;
 			goto exit;
 		} else if (check_fwstate(pmlmepriv, WIFI_AP_STATE) == _TRUE && !(psta->state & _FW_LINKED)) {
@@ -1438,29 +1484,34 @@ static s32 update_attrib(_adapter *padapter, _pkt *pkt, struct pkt_attrib *pattr
 		}
 
 	} else if (0x888e == pattrib->ether_type)
-		RTW_PRINT("send eapol packet\n");
+		parsing_eapol_packet(padapter, pktfile.cur_addr, psta, 1);
+#ifdef DBG_ARP_DUMP
+	else if (pattrib->ether_type == ETH_P_ARP) {
+		u8 arp[28] = {0};
+
+		_rtw_pktfile_read(&pktfile, arp, 28);
+		dump_arp_pkt(RTW_DBGDUMP, etherhdr.h_dest, etherhdr.h_source, arp, 1);
+	}
+#endif
 
 	if ((pattrib->ether_type == 0x888e) || (pattrib->dhcp_pkt == 1))
 		rtw_mi_set_scan_deny(padapter, 3000);
 
+	if (check_fwstate(pmlmepriv, WIFI_STATION_STATE) &&
+		pattrib->ether_type == ETH_P_ARP &&
+		!IS_MCAST(pattrib->dst)) {
+		rtw_mi_set_scan_deny(padapter, 1000);
+		rtw_mi_scan_abort(padapter, _FALSE); /*rtw_scan_abort_no_wait*/
+	}
+
 #ifdef CONFIG_LPS
-	/* If EAPOL , ARP , OR DHCP packet, driver must be in active mode. */
-#ifdef CONFIG_WAPI_SUPPORT
-	if ((pattrib->ether_type == 0x88B4) || (pattrib->ether_type == 0x0806) || (pattrib->ether_type == 0x888e) || (pattrib->dhcp_pkt == 1))
-#else /* !CONFIG_WAPI_SUPPORT */
-#if 0
-	if ((pattrib->ether_type == 0x0806) || (pattrib->ether_type == 0x888e) || (pattrib->dhcp_pkt == 1))
-#else /* only ICMP/DHCP packets is as SPECIAL_PACKET, and leave LPS when tx IMCP/DHCP packets. */
-	/* if ((pattrib->ether_type == 0x888e) || (pattrib->dhcp_pkt == 1) ) */
-	if (pattrib->icmp_pkt == 1)
-		rtw_lps_ctrl_wk_cmd(padapter, LPS_CTRL_LEAVE, 1);
-	else if (pattrib->dhcp_pkt == 1)
-#endif
-#endif
-	{
+	pkt_type = _rtw_lps_chk_packet_type(pattrib);
+
+	if (pkt_type == LPS_PT_SP) {/*packet is as SPECIAL_PACKET*/
 		DBG_COUNTER(padapter->tx_logs.core_tx_upd_attrib_active);
 		rtw_lps_ctrl_wk_cmd(padapter, LPS_CTRL_SPECIAL_PACKET, 1);
-	}
+	} else if (pkt_type == LPS_PT_ICMP)
+		rtw_lps_ctrl_wk_cmd(padapter, LPS_CTRL_LEAVE, 1);
 #endif /* CONFIG_LPS */
 
 #ifdef CONFIG_BEAMFORMING
@@ -1474,29 +1525,24 @@ static s32 update_attrib(_adapter *padapter, _pkt *pkt, struct pkt_attrib *pattr
 		goto exit;
 	}
 
-	update_attrib_phy_info(padapter, pattrib, psta);
-
-	/* RTW_INFO("%s ==> mac_id(%d)\n",__FUNCTION__,pattrib->mac_id ); */
-
-	pattrib->psta = psta;
-	/* TODO:_unlock */
-
-	pattrib->pctrl = 0;
-
-	pattrib->ack_policy = 0;
 	/* get ether_hdr_len */
 	pattrib->pkt_hdrlen = ETH_HLEN;/* (pattrib->ether_type == 0x8100) ? (14 + 4 ): 14; */ /* vlan tag */
 
 	pattrib->hdrlen = WLAN_HDR_A3_LEN;
 	pattrib->subtype = WIFI_DATA_TYPE;
+	pattrib->qos_en = psta->qos_option;
 	pattrib->priority = 0;
 
-	if (bmcast)
-		pattrib->rate = psta->init_rate;
-
-	if (check_fwstate(pmlmepriv, WIFI_AP_STATE | WIFI_ADHOC_STATE | WIFI_ADHOC_MASTER_STATE)) {
-		if (pattrib->qos_en)
+	if (check_fwstate(pmlmepriv, WIFI_AP_STATE | WIFI_MESH_STATE
+		| WIFI_ADHOC_STATE | WIFI_ADHOC_MASTER_STATE)
+	) {
+		if (pattrib->qos_en) {
 			set_qos(&pktfile, pattrib);
+			#ifdef CONFIG_RTW_MESH
+			if (MLME_IS_MESH(padapter))
+				rtw_mesh_tx_set_whdr_mctrl_len(pattrib->mesh_frame_mode, pattrib);
+			#endif
+		}
 	} else {
 #ifdef CONFIG_TDLS
 		if (pattrib->direct_link == _TRUE) {
@@ -1513,6 +1559,21 @@ static s32 update_attrib(_adapter *padapter, _pkt *pkt, struct pkt_attrib *pattr
 			}
 		}
 	}
+	
+	update_attrib_phy_info(padapter, pattrib, psta);
+
+	/* RTW_INFO("%s ==> mac_id(%d)\n",__FUNCTION__,pattrib->mac_id ); */
+
+	pattrib->psta = psta;
+	/* TODO:_unlock */
+
+	pattrib->pctrl = 0;
+
+	pattrib->ack_policy = 0;
+
+	if (bmcast)
+		pattrib->rate = psta->init_rate;
+
 
 #ifdef CONFIG_WMMPS_STA
 	update_attrib_trigger_frame_info(padapter, pattrib);
@@ -1534,7 +1595,6 @@ static s32 xmitframe_addmic(_adapter *padapter, struct xmit_frame *pxmitframe)
 	u8	*pframe, *payload, mic[8];
 	struct	mic_data		micdata;
 	/* struct	sta_info		*stainfo; */
-	struct	qos_priv   *pqospriv = &(padapter->mlmepriv.qospriv);
 	struct	pkt_attrib	*pattrib = &pxmitframe->attrib;
 	struct	security_priv	*psecuritypriv = &padapter->securitypriv;
 	struct	xmit_priv		*pxmitpriv = &padapter->xmitpriv;
@@ -1618,7 +1678,6 @@ static s32 xmitframe_addmic(_adapter *padapter, struct xmit_frame *pxmitframe)
 
 			}
 
-			/* if(pqospriv->qos_option==1) */
 			if (pattrib->qos_en)
 				priority[0] = (u8)pxmitframe->attrib.priority;
 
@@ -1779,6 +1838,17 @@ s32 rtw_make_wlanhdr(_adapter *padapter , u8 *hdr, struct pkt_attrib *pattrib)
 
 			if (pattrib->qos_en)
 				qos_option = _TRUE;
+#ifdef CONFIG_RTW_MESH
+		} else if (check_fwstate(pmlmepriv, WIFI_MESH_STATE) == _TRUE) {
+			rtw_mesh_tx_build_whdr(padapter, pattrib, fctrl, pwlanhdr);
+			if (pattrib->qos_en)
+				qos_option = _TRUE;
+			else {
+				RTW_WARN("[%s] !qos_en in Mesh\n", __FUNCTION__);
+				res = _FAIL;
+				goto exit;
+			}
+#endif
 		} else {
 			res = _FAIL;
 			goto exit;
@@ -1802,6 +1872,18 @@ s32 rtw_make_wlanhdr(_adapter *padapter , u8 *hdr, struct pkt_attrib *pattrib)
 
 			if(pattrib->amsdu)
 				SetAMsdu(qc, pattrib->amsdu);
+#ifdef CONFIG_RTW_MESH
+			if (MLME_IS_MESH(padapter)) {
+				/* active: don't care, light sleep: 0, deep sleep: 1*/
+				set_mps_lv(qc, 0); //TBD
+
+				/* TBD: temporary set (rspi, eosp) = (0, 1) which means End MPSP */
+				set_rspi(qc, 0);
+				SetEOSP(qc, 1);
+				
+				set_mctrl_present(qc, 1);
+			}
+#endif
 		}
 
 		/* TODO: fill HT Control Field */
@@ -2234,6 +2316,7 @@ u32 rtw_calculate_wlan_pkt_size_by_attribue(struct pkt_attrib *pattrib)
 
 	len = pattrib->hdrlen /* WLAN Header */
 		+ pattrib->iv_len /* IV */
+		+ XATTRIB_GET_MCTRL_LEN(pattrib)
 		+ SNAP_SIZE + sizeof(u16) /* LLC */
 		+ pattrib->pktlen
 		+ (pattrib->encrypt == _TKIP_ ? 8 : 0) /* MIC */
@@ -2347,7 +2430,6 @@ s32 rtw_xmitframe_coalesce_amsdu(_adapter *padapter, struct xmit_frame *pxmitfra
 	pattrib->amsdu = 1;
 
 	if (rtw_make_wlanhdr(padapter, mem_start, pattrib) == _FAIL) {
-		RT_TRACE(_module_rtl871x_xmit_c_, _drv_err_, ("rtw_xmitframe_coalesce: rtw_make_wlanhdr fail; drop pkt\n"));
 		RTW_INFO("rtw_xmitframe_coalesce: rtw_make_wlanhdr fail; drop pkt\n");
 		res = _FAIL;
 		goto exit;
@@ -2366,9 +2448,8 @@ s32 rtw_xmitframe_coalesce_amsdu(_adapter *padapter, struct xmit_frame *pxmitfra
 	if (pattrib->iv_len) {
 		_rtw_memcpy(pframe, pattrib->iv, pattrib->iv_len); // queue or new?
 
-		RT_TRACE(_module_rtl871x_xmit_c_, _drv_notice_,
-			("rtw_xmitframe_coalesce: keyid=%d pattrib->iv[3]=%.2x pframe=%.2x %.2x %.2x %.2x\n",
-			padapter->securitypriv.dot11PrivacyKeyIndex, pattrib->iv[3], *pframe, *(pframe + 1), *(pframe + 2), *(pframe + 3)));
+		RTW_DBG("rtw_xmitframe_coalesce: keyid=%d pattrib->iv[3]=%.2x pframe=%.2x %.2x %.2x %.2x\n",
+			padapter->securitypriv.dot11PrivacyKeyIndex, pattrib->iv[3], *pframe, *(pframe + 1), *(pframe + 2), *(pframe + 3));
 
 		pframe += pattrib->iv_len;
 	}
@@ -2383,16 +2464,28 @@ s32 rtw_xmitframe_coalesce_amsdu(_adapter *padapter, struct xmit_frame *pxmitfra
 		_rtw_open_pktfile(pkt_queue, &pktfile_queue);
 		_rtw_pktfile_read(&pktfile_queue, NULL, pattrib_queue->pkt_hdrlen);
 
-		/* 802.3 MAC Header DA(6)  SA(6)  Len(2)*/
-
-		_rtw_memcpy(pframe, pattrib_queue->dst, ETH_ALEN);
-		pframe += ETH_ALEN;
-
-		_rtw_memcpy(pframe, pattrib_queue->src, ETH_ALEN);
-		pframe += ETH_ALEN;
-
-		len = (u16*) pframe;
-		pframe += 2;
+		#ifdef CONFIG_RTW_MESH
+		if (MLME_IS_MESH(padapter)) {
+			/* mDA(6), mSA(6), len(2), mctrl */
+			_rtw_memcpy(pframe, pattrib_queue->mda, ETH_ALEN);
+			pframe += ETH_ALEN;
+			_rtw_memcpy(pframe, pattrib_queue->msa, ETH_ALEN);
+			pframe += ETH_ALEN;
+			len = (u16*)pframe;
+			pframe += 2;
+			rtw_mesh_tx_build_mctrl(padapter, pattrib_queue, pframe);
+			pframe += XATTRIB_GET_MCTRL_LEN(pattrib_queue);
+		} else
+		#endif
+		{
+			/* 802.3 MAC Header DA(6)  SA(6)  Len(2)*/
+			_rtw_memcpy(pframe, pattrib_queue->dst, ETH_ALEN);
+			pframe += ETH_ALEN;
+			_rtw_memcpy(pframe, pattrib_queue->src, ETH_ALEN);
+			pframe += ETH_ALEN;
+			len = (u16*)pframe;
+			pframe += 2;
+		}
 
 		llc_sz = rtw_put_snap(pframe, pattrib_queue->ether_type);
 		pframe += llc_sz;
@@ -2400,17 +2493,17 @@ s32 rtw_xmitframe_coalesce_amsdu(_adapter *padapter, struct xmit_frame *pxmitfra
 		mem_sz = _rtw_pktfile_read(&pktfile_queue, pframe, pattrib_queue->pktlen);
 		pframe += mem_sz;
 
-		*len = htons(llc_sz + mem_sz);
+		*len = htons(XATTRIB_GET_MCTRL_LEN(pattrib_queue) + llc_sz + mem_sz);
 
 		//calc padding
-		padding = 4 - ((ETH_HLEN + llc_sz + mem_sz) & (4-1));
+		padding = 4 - ((ETH_HLEN + XATTRIB_GET_MCTRL_LEN(pattrib_queue) + llc_sz + mem_sz) & (4-1));
 		if(padding == 4)
 			padding = 0;
 
 		//_rtw_memset(pframe,0xaa, padding);
 		pframe += padding;
 
-		pattrib->last_txcmdsz += ETH_HLEN + llc_sz + mem_sz + padding ;
+		pattrib->last_txcmdsz += ETH_HLEN + XATTRIB_GET_MCTRL_LEN(pattrib_queue) + llc_sz + mem_sz + padding ;
 	}
 
 	//2nd mpdu
@@ -2419,16 +2512,28 @@ s32 rtw_xmitframe_coalesce_amsdu(_adapter *padapter, struct xmit_frame *pxmitfra
 	_rtw_open_pktfile(pkt, &pktfile);
 	_rtw_pktfile_read(&pktfile, NULL, pattrib->pkt_hdrlen);
 
-	/* 802.3 MAC Header  DA(6)  SA(6)  Len(2) */
-
-	_rtw_memcpy(pframe, pattrib->dst, ETH_ALEN);
-	pframe += ETH_ALEN;
-
-	_rtw_memcpy(pframe, pattrib->src, ETH_ALEN);
-	pframe += ETH_ALEN;
-
-	len = (u16*) pframe;
-	pframe += 2;
+#ifdef CONFIG_RTW_MESH
+	if (MLME_IS_MESH(padapter)) {
+		/* mDA(6), mSA(6), len(2), mctrl */
+		_rtw_memcpy(pframe, pattrib->mda, ETH_ALEN);
+		pframe += ETH_ALEN;
+		_rtw_memcpy(pframe, pattrib->msa, ETH_ALEN);
+		pframe += ETH_ALEN;
+		len = (u16*)pframe;
+		pframe += 2;
+		rtw_mesh_tx_build_mctrl(padapter, pattrib, pframe);
+		pframe += XATTRIB_GET_MCTRL_LEN(pattrib);
+	} else
+#endif
+	{
+		/* 802.3 MAC Header  DA(6)  SA(6)  Len(2) */
+		_rtw_memcpy(pframe, pattrib->dst, ETH_ALEN);
+		pframe += ETH_ALEN;
+		_rtw_memcpy(pframe, pattrib->src, ETH_ALEN);
+		pframe += ETH_ALEN;
+		len = (u16*)pframe;
+		pframe += 2;
+	}
 
 	llc_sz = rtw_put_snap(pframe, pattrib->ether_type);
 	pframe += llc_sz;
@@ -2437,14 +2542,14 @@ s32 rtw_xmitframe_coalesce_amsdu(_adapter *padapter, struct xmit_frame *pxmitfra
 
 	pframe += mem_sz;
 
-	*len = htons(llc_sz + mem_sz);
+	*len = htons(XATTRIB_GET_MCTRL_LEN(pattrib) + llc_sz + mem_sz);
 
 	//the last ampdu has no padding
 	padding = 0;
 
 	pattrib->nr_frags = 1;
 
-	pattrib->last_txcmdsz += ETH_HLEN + llc_sz + mem_sz + padding +
+	pattrib->last_txcmdsz += ETH_HLEN + XATTRIB_GET_MCTRL_LEN(pattrib) + llc_sz + mem_sz + padding +
 		((pattrib->bswenc) ? pattrib->icv_len : 0) ;
 
 	if ((pattrib->icv_len > 0) && (pattrib->bswenc)) {
@@ -2453,7 +2558,6 @@ s32 rtw_xmitframe_coalesce_amsdu(_adapter *padapter, struct xmit_frame *pxmitfra
 	}
 
 	if (xmitframe_addmic(padapter, pxmitframe) == _FAIL) {
-		RT_TRACE(_module_rtl871x_xmit_c_, _drv_err_, ("xmitframe_addmic(padapter, pxmitframe)==_FAIL\n"));
 		RTW_INFO("xmitframe_addmic(padapter, pxmitframe)==_FAIL\n");
 		res = _FAIL;
 		goto exit;
@@ -2461,7 +2565,7 @@ s32 rtw_xmitframe_coalesce_amsdu(_adapter *padapter, struct xmit_frame *pxmitfra
 
 	xmitframe_swencrypt(padapter, pxmitframe);
 
-	pattrib->vcs_mode = NONE_VCS;
+	update_attrib_vcs_info(padapter, pxmitframe);
 
 exit:
 	return res;
@@ -2614,6 +2718,14 @@ s32 rtw_xmitframe_coalesce(_adapter *padapter, _pkt *pkt, struct xmit_frame *pxm
 		}
 
 		if (frg_inx == 0) {
+			#ifdef CONFIG_RTW_MESH
+			if (MLME_IS_MESH(padapter)) {
+				rtw_mesh_tx_build_mctrl(padapter, pattrib, pframe);
+				pframe += XATTRIB_GET_MCTRL_LEN(pattrib);
+				mpdu_len -= XATTRIB_GET_MCTRL_LEN(pattrib);
+			}
+			#endif
+
 			llc_sz = rtw_put_snap(pframe, pattrib->ether_type);
 			pframe += llc_sz;
 			mpdu_len -= llc_sz;
@@ -2641,7 +2753,8 @@ s32 rtw_xmitframe_coalesce(_adapter *padapter, _pkt *pkt, struct xmit_frame *pxm
 		if (bmcst || (rtw_endofpktfile(&pktfile) == _TRUE)) {
 			pattrib->nr_frags = frg_inx;
 
-			pattrib->last_txcmdsz = pattrib->hdrlen + pattrib->iv_len + ((pattrib->nr_frags == 1) ? llc_sz : 0) +
+			pattrib->last_txcmdsz = pattrib->hdrlen + pattrib->iv_len +
+				((pattrib->nr_frags == 1) ? (XATTRIB_GET_MCTRL_LEN(pattrib) + llc_sz) : 0) +
 				((pattrib->bswenc) ? pattrib->icv_len : 0) + mem_sz;
 
 			ClearMFrag(mem_start);
@@ -2787,6 +2900,10 @@ s32 rtw_mgmt_xmitframe_coalesce(_adapter *padapter, _pkt *pkt, struct xmit_frame
 			int frame_body_len;
 			u8 mic[16];
 
+			/* IGTK key is not install ex: mesh MFP without IGTK */
+			if (SEC_IS_BIP_KEY_INSTALLED(&padapter->securitypriv) != _TRUE)
+				goto xmitframe_coalesce_success;
+
 			#if DBG_MGMT_XMIT_COALESEC_DUMP
 			if (subtype == WIFI_DEAUTH)
 				RTW_INFO(FUNC_ADPT_FMT" braodcast deauth\n", FUNC_ADPT_ARG(padapter));
@@ -2798,12 +2915,6 @@ s32 rtw_mgmt_xmitframe_coalesce(_adapter *padapter, _pkt *pkt, struct xmit_frame
 			}
 			#endif
 
-			/* IGTK key is not install, it may not support 802.11w */
-			if (SEC_IS_BIP_KEY_INSTALLED(&padapter->securitypriv) != _TRUE) {
-				RTW_INFO("no instll BIP key\n");
-				goto xmitframe_coalesce_success;
-			}
-
 			_rtw_memset(MME, 0, _MME_IE_LENGTH_);
 
 			MGMT_body = pframe + sizeof(struct rtw_ieee80211_hdr_3addr);
@@ -3098,11 +3209,15 @@ void rtw_count_tx_stats(PADAPTER padapter, struct xmit_frame *pxmitframe, int sz
 			pstats->tx_pkts += pkt_num;
 
 			pstats->tx_bytes += sz;
+			#if defined(CONFIG_CHECK_LEAVE_LPS) && defined(CONFIG_LPS_CHK_BY_TP)
+			if (adapter_to_pwrctl(padapter)->lps_chk_by_tp)
+				traffic_check_for_leave_lps_by_tp(padapter, _TRUE, psta);
+			#endif /* CONFIG_LPS */
 		}
 
 #ifdef CONFIG_CHECK_LEAVE_LPS
 		/* traffic_check_for_leave_lps(padapter, _TRUE); */
-#endif /* CONFIG_LPS */
+#endif /* CONFIG_CHECK_LEAVE_LPS */
 
 	}
 }
@@ -3139,9 +3254,6 @@ static struct xmit_buf *__rtw_alloc_cmd_xmitbuf(struct xmit_priv *pxmitpriv,
 	} else
 		RTW_INFO("%s fail, no xmitbuf available !!!\n", __func__);
 
-exit:
-
-
 	return pxmitbuf;
 }
 
@@ -3672,10 +3784,6 @@ struct xmit_frame *rtw_get_xframe(struct xmit_priv *pxmitpriv, int *num_frame)
 	struct registry_priv	*pregpriv = &padapter->registrypriv;
 	int i, inx[4];
 
-#ifdef CONFIG_USB_HCI
-	/*	int j, tmp, acirp_cnt[4]; */
-#endif
-
 	inx[0] = 0;
 	inx[1] = 1;
 	inx[2] = 2;
@@ -3730,10 +3838,6 @@ struct xmit_frame *rtw_dequeue_xframe(struct xmit_priv *pxmitpriv, struct hw_xmi
 	_adapter *padapter = pxmitpriv->adapter;
 	struct registry_priv	*pregpriv = &padapter->registrypriv;
 	int i, inx[4];
-#ifdef CONFIG_USB_HCI
-	/*	int j, tmp, acirp_cnt[4]; */
-#endif
-
 
 	inx[0] = 0;
 	inx[1] = 1;
@@ -3741,7 +3845,7 @@ struct xmit_frame *rtw_dequeue_xframe(struct xmit_priv *pxmitpriv, struct hw_xmi
 	inx[3] = 3;
 
 	if (pregpriv->wifi_spec == 1) {
-		int j, tmp, acirp_cnt[4];
+		int j;
 #if 0
 		if (flags < XMIT_QUEUE_ENTRY) {
 			/* priority exchange according to the completed xmitbuf flags. */
@@ -3904,7 +4008,6 @@ s32 rtw_xmit_classifier(_adapter *padapter, struct xmit_frame *pxmitframe)
 	struct sta_info	*psta;
 	struct tx_servq	*ptxservq;
 	struct pkt_attrib	*pattrib = &pxmitframe->attrib;
-	struct sta_priv	*pstapriv = &padapter->stapriv;
 	struct hw_xmit	*phwxmits =  padapter->xmitpriv.hwxmits;
 	sint res = _SUCCESS;
 
@@ -4052,7 +4155,6 @@ void rtw_init_hwxmits(struct hw_xmit *phwxmit, sint entry)
 int rtw_br_client_tx(_adapter *padapter, struct sk_buff **pskb)
 {
 	struct sk_buff *skb = *pskb;
-	struct xmit_priv *pxmitpriv = &padapter->xmitpriv;
 	_irqL irqL;
 	/* if(check_fwstate(pmlmepriv, WIFI_STATION_STATE|WIFI_ADHOC_STATE) == _TRUE) */
 	{
@@ -4304,30 +4406,32 @@ static void do_queue_select(_adapter	*padapter, struct pkt_attrib *pattrib)
  #if (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 24))
 s32 rtw_monitor_xmit_entry(struct sk_buff *skb, struct net_device *ndev)
 {
-	int ret = 0;
-	int rtap_len;
-	int qos_len = 0;
-	int dot11_hdr_len = 24;
-	int snap_len = 6;
-	unsigned char *pdata;
 	u16 frame_ctl;
-	unsigned char src_mac_addr[6];
-	unsigned char dst_mac_addr[6];
-	struct rtw_ieee80211_hdr *dot11_hdr;
-	struct ieee80211_radiotap_header *rtap_hdr;
+	struct ieee80211_radiotap_header rtap_hdr;
 	_adapter *padapter = (_adapter *)rtw_netdev_priv(ndev);
+	struct pkt_file pktfile;
+	struct rtw_ieee80211_hdr *pwlanhdr;
+	struct pkt_attrib	*pattrib;
+	struct xmit_frame		*pmgntframe;
+	struct mlme_ext_priv	*pmlmeext = &(padapter->mlmeextpriv);
+	struct xmit_priv	*pxmitpriv = &(padapter->xmitpriv);
+	unsigned char	*pframe;
+	u8 dummybuf[32];
+	int len = skb->len, rtap_len;
+
 
-	if (skb)
-		rtw_mstat_update(MSTAT_TYPE_SKB, MSTAT_ALLOC_SUCCESS, skb->truesize);
+	rtw_mstat_update(MSTAT_TYPE_SKB, MSTAT_ALLOC_SUCCESS, skb->truesize);
 
+#ifndef CONFIG_CUSTOMER_ALIBABA_GENERAL
 	if (unlikely(skb->len < sizeof(struct ieee80211_radiotap_header)))
 		goto fail;
 
-	rtap_hdr = (struct ieee80211_radiotap_header *)skb->data;
-	if (unlikely(rtap_hdr->it_version))
+	_rtw_open_pktfile((_pkt *)skb, &pktfile);
+	_rtw_pktfile_read(&pktfile, (u8 *)(&rtap_hdr), sizeof(struct ieee80211_radiotap_header));
+	rtap_len = ieee80211_get_radiotap_len((u8 *)(&rtap_hdr));
+	if (unlikely(rtap_hdr.it_version))
 		goto fail;
 
-	rtap_len = ieee80211_get_radiotap_len(skb->data);
 	if (unlikely(skb->len < rtap_len))
 		goto fail;
 
@@ -4335,106 +4439,115 @@ s32 rtw_monitor_xmit_entry(struct sk_buff *skb, struct net_device *ndev)
 		RTW_INFO("radiotap len (should be 14): %d\n", rtap_len);
 		goto fail;
 	}
+	_rtw_pktfile_read(&pktfile, dummybuf, rtap_len-sizeof(struct ieee80211_radiotap_header));
+	len = len - rtap_len;
+#endif
+	pmgntframe = alloc_mgtxmitframe(pxmitpriv);
+	if (pmgntframe == NULL) {
+		rtw_udelay_os(500);
+		goto fail;
+	}
 
-	/* Skip the ratio tap header */
-	skb_pull(skb, rtap_len);
+	_rtw_memset(pmgntframe->buf_addr, 0, WLANHDR_OFFSET + TXDESC_OFFSET);
+	pframe = (u8 *)(pmgntframe->buf_addr) + TXDESC_OFFSET;
+//	_rtw_memcpy(pframe, (void *)checking, len);
+	_rtw_pktfile_read(&pktfile, pframe, len);
 
-	dot11_hdr = (struct rtw_ieee80211_hdr *)skb->data;
-	frame_ctl = le16_to_cpu(dot11_hdr->frame_ctl);
-	/* Check if the QoS bit is set */
 
+	/* Check DATA/MGNT frames */
+	pwlanhdr = (struct rtw_ieee80211_hdr *)pframe;
+	frame_ctl = le16_to_cpu(pwlanhdr->frame_ctl);
 	if ((frame_ctl & RTW_IEEE80211_FCTL_FTYPE) == RTW_IEEE80211_FTYPE_DATA) {
 
-		struct xmit_frame		*pmgntframe;
-		struct pkt_attrib	*pattrib;
-		unsigned char	*pframe;
-		struct rtw_ieee80211_hdr *pwlanhdr;
-		struct xmit_priv	*pxmitpriv = &(padapter->xmitpriv);
-		struct mlme_ext_priv	*pmlmeext = &(padapter->mlmeextpriv);
-		u8 *buf = skb->data;
-		u32 len = skb->len;
-		u8 category, action;
-		int type = -1;
-
-		pmgntframe = alloc_mgtxmitframe(pxmitpriv);
-		if (pmgntframe == NULL) {
-			rtw_udelay_os(500);
-			goto fail;
-		}
 		pattrib = &pmgntframe->attrib;
-
 		update_monitor_frame_attrib(padapter, pattrib);
 
-		pattrib->retry_ctrl = _FALSE;
-
-		_rtw_memset(pmgntframe->buf_addr, 0, WLANHDR_OFFSET + TXDESC_OFFSET);
-
-		pframe = (u8 *)(pmgntframe->buf_addr) + TXDESC_OFFSET;
-
-		_rtw_memcpy(pframe, (void *)buf, len);
-
-		pattrib->pktlen = len;
-
-		pwlanhdr = (struct rtw_ieee80211_hdr *)pframe;
-
 		if (is_broadcast_mac_addr(pwlanhdr->addr3) || is_broadcast_mac_addr(pwlanhdr->addr1))
 			pattrib->rate = MGN_24M;
 
-		pmlmeext->mgnt_seq = GetSequence(pwlanhdr);
-		pattrib->seqnum = pmlmeext->mgnt_seq;
-		pmlmeext->mgnt_seq++;
-
-		pattrib->last_txcmdsz = pattrib->pktlen;
-
-		dump_mgntframe(padapter, pmgntframe);
-
 	} else {
-		struct xmit_frame		*pmgntframe;
-		struct pkt_attrib	*pattrib;
-		unsigned char	*pframe;
-		struct rtw_ieee80211_hdr *pwlanhdr;
-		struct xmit_priv	*pxmitpriv = &(padapter->xmitpriv);
-		struct mlme_ext_priv	*pmlmeext = &(padapter->mlmeextpriv);
-		u8 *buf = skb->data;
-		u32 len = skb->len;
-		u8 category, action;
-		int type = -1;
-
-		pmgntframe = alloc_mgtxmitframe(pxmitpriv);
-		if (pmgntframe == NULL)
-			goto fail;
 
 		pattrib = &pmgntframe->attrib;
 		update_mgntframe_attrib(padapter, pattrib);
-		pattrib->retry_ctrl = _FALSE;
 
-		_rtw_memset(pmgntframe->buf_addr, 0, WLANHDR_OFFSET + TXDESC_OFFSET);
+	}
+	pattrib->retry_ctrl = _FALSE;
+	pattrib->pktlen = len;
+	pmlmeext->mgnt_seq = GetSequence(pwlanhdr);
+	pattrib->seqnum = pmlmeext->mgnt_seq;
+	pmlmeext->mgnt_seq++;
+	pattrib->last_txcmdsz = pattrib->pktlen;
 
-		pframe = (u8 *)(pmgntframe->buf_addr) + TXDESC_OFFSET;
+	dump_mgntframe(padapter, pmgntframe);
 
-		_rtw_memcpy(pframe, (void *)buf, len);
+fail:
+	rtw_skb_free(skb);
+	return 0;
+}
+#endif
 
-		pattrib->pktlen = len;
+/*
+ * The main transmit(tx) entry post handle
+ *
+ * Return
+ *	1	enqueue
+ *	0	success, hardware will handle this xmit frame(packet)
+ *	<0	fail
+ */
+s32 rtw_xmit_posthandle(_adapter *padapter, struct xmit_frame *pxmitframe, _pkt *pkt)
+{
+#ifdef CONFIG_AP_MODE
+	_irqL irqL0;
+#endif
+	struct xmit_priv *pxmitpriv = &padapter->xmitpriv;
+	s32 res;
 
-		pwlanhdr = (struct rtw_ieee80211_hdr *)pframe;
+	res = update_attrib(padapter, pkt, &pxmitframe->attrib);
 
-		pmlmeext->mgnt_seq = GetSequence(pwlanhdr);
-		pattrib->seqnum = pmlmeext->mgnt_seq;
-		pmlmeext->mgnt_seq++;
+#ifdef CONFIG_MCC_MODE
+	/* record data kernel TX to driver to check MCC concurrent TX */
+	rtw_hal_mcc_calc_tx_bytes_from_kernel(padapter, pxmitframe->attrib.pktlen);
+#endif /* CONFIG_MCC_MODE */
 
-		pattrib->last_txcmdsz = pattrib->pktlen;
+#ifdef CONFIG_WAPI_SUPPORT
+	if (pxmitframe->attrib.ether_type != 0x88B4) {
+		if (rtw_wapi_drop_for_key_absent(padapter, pxmitframe->attrib.ra)) {
+			WAPI_TRACE(WAPI_RX, "drop for key absend when tx\n");
+			res = _FAIL;
+		}
+	}
+#endif
+	if (res == _FAIL) {
+		/*RTW_INFO("%s-"ADPT_FMT" update attrib fail\n", __func__, ADPT_ARG(padapter));*/
+#ifdef DBG_TX_DROP_FRAME
+		RTW_INFO("DBG_TX_DROP_FRAME %s update attrib fail\n", __FUNCTION__);
+#endif
+		rtw_free_xmitframe(pxmitpriv, pxmitframe);
+		return -1;
+	}
+	pxmitframe->pkt = pkt;
 
-		dump_mgntframe(padapter, pmgntframe);
+	rtw_led_tx_control(padapter, pxmitframe->attrib.dst);
 
-	}
+	do_queue_select(padapter, &pxmitframe->attrib);
 
-fail:
+#ifdef CONFIG_AP_MODE
+	_enter_critical_bh(&pxmitpriv->lock, &irqL0);
+	if (xmitframe_enqueue_for_sleeping_sta(padapter, pxmitframe) == _TRUE) {
+		_exit_critical_bh(&pxmitpriv->lock, &irqL0);
+		DBG_COUNTER(padapter->tx_logs.core_tx_ap_enqueue);
+		return 1;
+	}
+	_exit_critical_bh(&pxmitpriv->lock, &irqL0);
+#endif
 
-	rtw_skb_free(skb);
+	/* pre_xmitframe */
+	if (rtw_hal_xmit(padapter, pxmitframe) == _FALSE)
+		return 1;
 
 	return 0;
 }
-#endif
+
 /*
  * The main transmit(tx) entry
  *
@@ -4447,16 +4560,8 @@ s32 rtw_xmit(_adapter *padapter, _pkt **ppkt)
 {
 	static systime start = 0;
 	static u32 drop_cnt = 0;
-#ifdef CONFIG_AP_MODE
-	_irqL irqL0;
-#endif
 	struct xmit_priv *pxmitpriv = &padapter->xmitpriv;
 	struct xmit_frame *pxmitframe = NULL;
-#ifdef CONFIG_BR_EXT
-	struct mlme_priv	*pmlmepriv = &padapter->mlmepriv;
-	void *br_port = NULL;
-#endif /* CONFIG_BR_EXT */
-
 	s32 res;
 
 	DBG_COUNTER(padapter->tx_logs.core_tx);
@@ -4464,6 +4569,9 @@ s32 rtw_xmit(_adapter *padapter, _pkt **ppkt)
 	if (IS_CH_WAITING(adapter_to_rfctl(padapter)))
 		return -1;
 
+	if (rtw_linked_check(padapter) == _FALSE)
+		return -1;
+
 	if (start == 0)
 		start = rtw_get_current_time();
 
@@ -4484,70 +4592,72 @@ s32 rtw_xmit(_adapter *padapter, _pkt **ppkt)
 	}
 
 #ifdef CONFIG_BR_EXT
+	if (check_fwstate(&padapter->mlmepriv, WIFI_STATION_STATE | WIFI_ADHOC_STATE) == _TRUE) {
+		void *br_port = NULL;
 
-#if (LINUX_VERSION_CODE <= KERNEL_VERSION(2, 6, 35))
-	br_port = padapter->pnetdev->br_port;
-#else   /* (LINUX_VERSION_CODE <= KERNEL_VERSION(2, 6, 35)) */
-	rcu_read_lock();
-	br_port = rcu_dereference(padapter->pnetdev->rx_handler_data);
-	rcu_read_unlock();
-#endif /* (LINUX_VERSION_CODE <= KERNEL_VERSION(2, 6, 35)) */
+		#if (LINUX_VERSION_CODE <= KERNEL_VERSION(2, 6, 35))
+		br_port = padapter->pnetdev->br_port;
+		#else
+		rcu_read_lock();
+		br_port = rcu_dereference(padapter->pnetdev->rx_handler_data);
+		rcu_read_unlock();
+		#endif
 
-	if (br_port && check_fwstate(pmlmepriv, WIFI_STATION_STATE | WIFI_ADHOC_STATE) == _TRUE) {
-		res = rtw_br_client_tx(padapter, ppkt);
-		if (res == -1) {
-			rtw_free_xmitframe(pxmitpriv, pxmitframe);
-			DBG_COUNTER(padapter->tx_logs.core_tx_err_brtx);
-			return -1;
+		if (br_port) {
+			res = rtw_br_client_tx(padapter, ppkt);
+			if (res == -1) {
+				rtw_free_xmitframe(pxmitpriv, pxmitframe);
+				DBG_COUNTER(padapter->tx_logs.core_tx_err_brtx);
+				return -1;
+			}
 		}
 	}
-
 #endif /* CONFIG_BR_EXT */
 
-	res = update_attrib(padapter, *ppkt, &pxmitframe->attrib);
+#ifdef CONFIG_RTW_MESH
+	if (MLME_IS_MESH(padapter)) {
+		_list b2u_list;
 
-#ifdef CONFIG_MCC_MODE
-	/* record data kernel TX to driver to check MCC concurrent TX */
-	rtw_hal_mcc_calc_tx_bytes_from_kernel(padapter, pxmitframe->attrib.pktlen);
-#endif /* CONFIG_MCC_MODE */
-
-#ifdef CONFIG_WAPI_SUPPORT
-	if (pxmitframe->attrib.ether_type != 0x88B4) {
-		if (rtw_wapi_drop_for_key_absent(padapter, pxmitframe->attrib.ra)) {
-			WAPI_TRACE(WAPI_RX, "drop for key absend when tx\n");
-			res = _FAIL;
-		}
-	}
-#endif
-	if (res == _FAIL) {
-		/*RTW_INFO("%s-"ADPT_FMT" update attrib fail\n", __func__, ADPT_ARG(padapter));*/
-#ifdef DBG_TX_DROP_FRAME
-		RTW_INFO("DBG_TX_DROP_FRAME %s update attrib fail\n", __FUNCTION__);
-#endif
-		rtw_free_xmitframe(pxmitpriv, pxmitframe);
-		return -1;
-	}
-	pxmitframe->pkt = *ppkt;
+		res = rtw_mesh_addr_resolve(padapter, pxmitframe, *ppkt, &b2u_list);
+		if (res == RTW_RA_RESOLVING)
+			return 1;
+		if (res == _FAIL)
+			return -1;
 
-	rtw_led_control(padapter, LED_CTL_TX);
+		#if CONFIG_RTW_MESH_DATA_BMC_TO_UC
+		if (!rtw_is_list_empty(&b2u_list)) {
+			_list *list = get_next(&b2u_list);
+			struct xmit_frame *b2uframe;
+
+			while ((rtw_end_of_queue_search(&b2u_list, list)) == _FALSE) {
+				b2uframe = LIST_CONTAINOR(list, struct xmit_frame, list);
+				list = get_next(list);
+				rtw_list_delete(&b2uframe->list);
+
+				b2uframe->pkt = rtw_os_pkt_copy(*ppkt);
+				if (!b2uframe->pkt) {
+					if (res == RTW_BMC_NO_NEED)
+						res = _SUCCESS;
+					rtw_free_xmitframe(pxmitpriv, b2uframe);
+					continue;
+				}
 
-	do_queue_select(padapter, &pxmitframe->attrib);
+				rtw_xmit_posthandle(padapter, b2uframe, b2uframe->pkt);
+			}
+		}
+		#endif /* CONFIG_RTW_MESH_DATA_BMC_TO_UC */
 
-#ifdef CONFIG_AP_MODE
-	_enter_critical_bh(&pxmitpriv->lock, &irqL0);
-	if (xmitframe_enqueue_for_sleeping_sta(padapter, pxmitframe) == _TRUE) {
-		_exit_critical_bh(&pxmitpriv->lock, &irqL0);
-		DBG_COUNTER(padapter->tx_logs.core_tx_ap_enqueue);
-		return 1;
+		if (res == RTW_BMC_NO_NEED) {
+			rtw_free_xmitframe(&padapter->xmitpriv, pxmitframe);
+			return 0;
+		}
 	}
-	_exit_critical_bh(&pxmitpriv->lock, &irqL0);
-#endif
+#endif /* CONFIG_RTW_MESH */
 
-	/* pre_xmitframe */
-	if (rtw_hal_xmit(padapter, pxmitframe) == _FALSE)
-		return 1;
+	pxmitframe->pkt = NULL; /* let rtw_xmit_posthandle not to free pkt inside */
+	res = rtw_xmit_posthandle(padapter, pxmitframe, *ppkt);
 
-	return 0;
+	return res;
 }
 
 #ifdef CONFIG_TDLS
@@ -4667,7 +4777,6 @@ sint xmitframe_enqueue_for_sleeping_sta(_adapter *padapter, struct xmit_frame *p
 	struct sta_info *psta = NULL;
 	struct sta_priv *pstapriv = &padapter->stapriv;
 	struct pkt_attrib *pattrib = &pxmitframe->attrib;
-	struct mlme_priv *pmlmepriv = &padapter->mlmepriv;
 	sint bmcst = IS_MCAST(pattrib->ra);
 	bool update_tim = _FALSE;
 #ifdef CONFIG_TDLS
@@ -4899,20 +5008,12 @@ void stop_sta_xmit(_adapter *padapter, struct sta_info *psta)
 #endif /* CONFIG_TDLS */
 		rtw_tim_map_set(padapter, pstapriv->sta_dz_bitmap, psta->cmn.aid);
 
-
-
 	dequeue_xmitframes_to_sleeping_queue(padapter, psta, &pstaxmitpriv->vo_q.sta_pending);
 	rtw_list_delete(&(pstaxmitpriv->vo_q.tx_pending));
-
-
 	dequeue_xmitframes_to_sleeping_queue(padapter, psta, &pstaxmitpriv->vi_q.sta_pending);
 	rtw_list_delete(&(pstaxmitpriv->vi_q.tx_pending));
-
-
 	dequeue_xmitframes_to_sleeping_queue(padapter, psta, &pstaxmitpriv->be_q.sta_pending);
 	rtw_list_delete(&(pstaxmitpriv->be_q.tx_pending));
-
-
 	dequeue_xmitframes_to_sleeping_queue(padapter, psta, &pstaxmitpriv->bk_q.sta_pending);
 	rtw_list_delete(&(pstaxmitpriv->bk_q.tx_pending));
 
@@ -4920,12 +5021,16 @@ void stop_sta_xmit(_adapter *padapter, struct sta_info *psta)
 	if (!(psta->tdls_sta_state & TDLS_LINKED_STATE) && (psta_bmc != NULL)) {
 #endif /* CONFIG_TDLS */
 
-
 		/* for BC/MC Frames */
 		pstaxmitpriv = &psta_bmc->sta_xmitpriv;
+		dequeue_xmitframes_to_sleeping_queue(padapter, psta_bmc, &pstaxmitpriv->vo_q.sta_pending);
+		rtw_list_delete(&(pstaxmitpriv->vo_q.tx_pending));
+		dequeue_xmitframes_to_sleeping_queue(padapter, psta_bmc, &pstaxmitpriv->vi_q.sta_pending);
+		rtw_list_delete(&(pstaxmitpriv->vi_q.tx_pending));
 		dequeue_xmitframes_to_sleeping_queue(padapter, psta_bmc, &pstaxmitpriv->be_q.sta_pending);
 		rtw_list_delete(&(pstaxmitpriv->be_q.tx_pending));
-
+		dequeue_xmitframes_to_sleeping_queue(padapter, psta_bmc, &pstaxmitpriv->bk_q.sta_pending);
+		rtw_list_delete(&(pstaxmitpriv->bk_q.tx_pending));
 
 #ifdef CONFIG_TDLS
 	}
@@ -5192,7 +5297,9 @@ void xmit_delivery_enabled_frames(_adapter *padapter, struct sta_info *psta)
 
 	}
 
+#ifdef CONFIG_TDLS
 exit:
+#endif
 	/* _exit_critical_bh(&psta->sleep_q.lock, &irqL);	 */
 	_exit_critical_bh(&pxmitpriv->lock, &irqL);
 
@@ -5425,7 +5532,6 @@ bool rtw_xmit_ac_blocked(_adapter *adapter)
 	struct rf_ctl_t *rfctl = adapter_to_rfctl(adapter);
 	_adapter *iface;
 	struct mlme_ext_priv *mlmeext;
-	struct mlme_ext_info *mlmeextinfo;
 	bool blocked = _FALSE;
 	int i;
 #ifdef DBG_CONFIG_ERROR_DETECT
@@ -5439,8 +5545,14 @@ bool rtw_xmit_ac_blocked(_adapter *adapter)
 #endif/* #ifdef DBG_CONFIG_ERROR_RESET */
 #endif/* #ifdef DBG_CONFIG_ERROR_DETECT */
 
-	if (rfctl->offch_state != OFFCHS_NONE)
+	if (rfctl->offch_state != OFFCHS_NONE
+		#ifdef CONFIG_DFS
+		|| IS_RADAR_DETECTED(rfctl) || rfctl->csa_ch
+		#endif
+	) {
 		blocked = _TRUE;
+		goto exit;
+	}
 
 	for (i = 0; i < dvobj->iface_nums; i++) {
 		iface = dvobj->padapters[i];
@@ -5636,8 +5748,6 @@ static u8 backup_idx[HW_QUEUE_ENTRY];
 
 void rtw_tx_desc_backup(_adapter *padapter, struct xmit_frame *pxmitframe, u8 desc_size, u8 hwq)
 {
-	u16 reg_rp;
-	u16 reg_wp;
 	u32 tmp32;
 	u8 *pxmit_buf;
 
diff --git a/rtl8723DS/hal/HalPwrSeqCmd.c b/rtl8723DS/hal/HalPwrSeqCmd.c
index 389785c..389785c 100755..100644
--- a/rtl8723DS/hal/HalPwrSeqCmd.c
+++ b/rtl8723DS/hal/HalPwrSeqCmd.c
diff --git a/rtl8723DS/hal/btc/halbtc8723d1ant.c b/rtl8723DS/hal/btc/halbtc8723d1ant.c
index 410e500..35efff3 100755..100644
--- a/rtl8723DS/hal/btc/halbtc8723d1ant.c
+++ b/rtl8723DS/hal/btc/halbtc8723d1ant.c
@@ -48,155 +48,13 @@ const char *const glbt_info_src_8723d_1ant[] = {
 	"BT Info[bt rsp]",
 	"BT Info[bt auto report]",
 };
-/* ************************************************************
- * BtCoex Version Format:
- * 1. date :			glcoex_ver_date_XXXXX_1ant
- * 2. WifiCoexVersion : glcoex_ver_XXXX_1ant
- * 3. BtCoexVersion :	glcoex_ver_btdesired_XXXXX_1ant
- * 4. others :			glcoex_ver_XXXXXX_XXXXX_1ant
- *
- * Variable should be indicated IC and Antenna numbers !!!
- * Please strictly follow this order and naming style !!!
- *
- * ************************************************************ */
-u32	glcoex_ver_date_8723d_1ant = 20171212;
-u32	glcoex_ver_8723d_1ant = 0x22;
-u32 glcoex_ver_btdesired_8723d_1ant = 0x20;
-
-
-/* ************************************************************
- * local function proto type if needed
- * ************************************************************
- * ************************************************************
- * local function start with halbtc8723d1ant_
- * ************************************************************ */
-u8 halbtc8723d1ant_bt_rssi_state(u8 level_num, u8 rssi_thresh, u8 rssi_thresh1)
-{
-	s32			bt_rssi = 0;
-	u8			bt_rssi_state = coex_sta->pre_bt_rssi_state;
-
-	bt_rssi = coex_sta->bt_rssi;
-
-	if (level_num == 2) {
-		if ((coex_sta->pre_bt_rssi_state == BTC_RSSI_STATE_LOW) ||
-		    (coex_sta->pre_bt_rssi_state ==
-		     BTC_RSSI_STATE_STAY_LOW)) {
-			if (bt_rssi >= (rssi_thresh +
-					BTC_RSSI_COEX_THRESH_TOL_8723D_1ANT))
-				bt_rssi_state = BTC_RSSI_STATE_HIGH;
-			else
-				bt_rssi_state = BTC_RSSI_STATE_STAY_LOW;
-		} else {
-			if (bt_rssi < rssi_thresh)
-				bt_rssi_state = BTC_RSSI_STATE_LOW;
-			else
-				bt_rssi_state = BTC_RSSI_STATE_STAY_HIGH;
-		}
-	} else if (level_num == 3) {
-		if (rssi_thresh > rssi_thresh1) {
-			BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-				    "[BTCoex], BT Rssi thresh error!!\n");
-			BTC_TRACE(trace_buf);
-			return coex_sta->pre_bt_rssi_state;
-		}
-
-		if ((coex_sta->pre_bt_rssi_state == BTC_RSSI_STATE_LOW) ||
-		    (coex_sta->pre_bt_rssi_state ==
-		     BTC_RSSI_STATE_STAY_LOW)) {
-			if (bt_rssi >= (rssi_thresh +
-					BTC_RSSI_COEX_THRESH_TOL_8723D_1ANT))
-				bt_rssi_state = BTC_RSSI_STATE_MEDIUM;
-			else
-				bt_rssi_state = BTC_RSSI_STATE_STAY_LOW;
-		} else if ((coex_sta->pre_bt_rssi_state ==
-			    BTC_RSSI_STATE_MEDIUM) ||
-			   (coex_sta->pre_bt_rssi_state ==
-			    BTC_RSSI_STATE_STAY_MEDIUM)) {
-			if (bt_rssi >= (rssi_thresh1 +
-					BTC_RSSI_COEX_THRESH_TOL_8723D_1ANT))
-				bt_rssi_state = BTC_RSSI_STATE_HIGH;
-			else if (bt_rssi < rssi_thresh)
-				bt_rssi_state = BTC_RSSI_STATE_LOW;
-			else
-				bt_rssi_state = BTC_RSSI_STATE_STAY_MEDIUM;
-		} else {
-			if (bt_rssi < rssi_thresh1)
-				bt_rssi_state = BTC_RSSI_STATE_MEDIUM;
-			else
-				bt_rssi_state = BTC_RSSI_STATE_STAY_HIGH;
-		}
-	}
-
-	coex_sta->pre_bt_rssi_state = bt_rssi_state;
-
-	return bt_rssi_state;
-}
-
-u8 halbtc8723d1ant_wifi_rssi_state(IN struct btc_coexist *btcoexist,
-	   IN u8 index, IN u8 level_num, IN u8 rssi_thresh, IN u8 rssi_thresh1)
-{
-	s32			wifi_rssi = 0;
-	u8			wifi_rssi_state = coex_sta->pre_wifi_rssi_state[index];
-
-	btcoexist->btc_get(btcoexist, BTC_GET_S4_WIFI_RSSI, &wifi_rssi);
-
-	if (level_num == 2) {
-		if ((coex_sta->pre_wifi_rssi_state[index] == BTC_RSSI_STATE_LOW)
-		    ||
-		    (coex_sta->pre_wifi_rssi_state[index] ==
-		     BTC_RSSI_STATE_STAY_LOW)) {
-			if (wifi_rssi >= (rssi_thresh +
-					  BTC_RSSI_COEX_THRESH_TOL_8723D_1ANT))
-				wifi_rssi_state = BTC_RSSI_STATE_HIGH;
-			else
-				wifi_rssi_state = BTC_RSSI_STATE_STAY_LOW;
-		} else {
-			if (wifi_rssi < rssi_thresh)
-				wifi_rssi_state = BTC_RSSI_STATE_LOW;
-			else
-				wifi_rssi_state = BTC_RSSI_STATE_STAY_HIGH;
-		}
-	} else if (level_num == 3) {
-		if (rssi_thresh > rssi_thresh1) {
-			BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-				    "[BTCoex], wifi RSSI thresh error!!\n");
-			BTC_TRACE(trace_buf);
-			return coex_sta->pre_wifi_rssi_state[index];
-		}
 
-		if ((coex_sta->pre_wifi_rssi_state[index] == BTC_RSSI_STATE_LOW)
-		    ||
-		    (coex_sta->pre_wifi_rssi_state[index] ==
-		     BTC_RSSI_STATE_STAY_LOW)) {
-			if (wifi_rssi >= (rssi_thresh +
-					  BTC_RSSI_COEX_THRESH_TOL_8723D_1ANT))
-				wifi_rssi_state = BTC_RSSI_STATE_MEDIUM;
-			else
-				wifi_rssi_state = BTC_RSSI_STATE_STAY_LOW;
-		} else if ((coex_sta->pre_wifi_rssi_state[index] ==
-			    BTC_RSSI_STATE_MEDIUM) ||
-			   (coex_sta->pre_wifi_rssi_state[index] ==
-			    BTC_RSSI_STATE_STAY_MEDIUM)) {
-			if (wifi_rssi >= (rssi_thresh1 +
-					  BTC_RSSI_COEX_THRESH_TOL_8723D_1ANT))
-				wifi_rssi_state = BTC_RSSI_STATE_HIGH;
-			else if (wifi_rssi < rssi_thresh)
-				wifi_rssi_state = BTC_RSSI_STATE_LOW;
-			else
-				wifi_rssi_state = BTC_RSSI_STATE_STAY_MEDIUM;
-		} else {
-			if (wifi_rssi < rssi_thresh1)
-				wifi_rssi_state = BTC_RSSI_STATE_MEDIUM;
-			else
-				wifi_rssi_state = BTC_RSSI_STATE_STAY_HIGH;
-		}
-	}
-
-	coex_sta->pre_wifi_rssi_state[index] = wifi_rssi_state;
-
-	return wifi_rssi_state;
-}
+u32	glcoex_ver_date_8723d_1ant = 20181130;
+u32	glcoex_ver_8723d_1ant = 0x2e;
+u32	glcoex_ver_btdesired_8723d_1ant = 0x2d;
 
+#if 0
+static
 void halbtc8723d1ant_update_ra_mask(IN struct btc_coexist *btcoexist,
 				    IN boolean force_exec, IN u32 dis_rate_mask)
 {
@@ -208,6 +66,7 @@ void halbtc8723d1ant_update_ra_mask(IN struct btc_coexist *btcoexist,
 	coex_dm->pre_ra_mask = coex_dm->cur_ra_mask;
 }
 
+static
 void halbtc8723d1ant_auto_rate_fallback_retry(IN struct btc_coexist *btcoexist,
 		IN boolean force_exec, IN u8 type)
 {
@@ -247,6 +106,7 @@ void halbtc8723d1ant_auto_rate_fallback_retry(IN struct btc_coexist *btcoexist,
 	coex_dm->pre_arfr_type = coex_dm->cur_arfr_type;
 }
 
+static
 void halbtc8723d1ant_retry_limit(IN struct btc_coexist *btcoexist,
 				 IN boolean force_exec, IN u8 type)
 {
@@ -272,6 +132,7 @@ void halbtc8723d1ant_retry_limit(IN struct btc_coexist *btcoexist,
 	coex_dm->pre_retry_limit_type = coex_dm->cur_retry_limit_type;
 }
 
+static
 void halbtc8723d1ant_ampdu_max_time(IN struct btc_coexist *btcoexist,
 				    IN boolean force_exec, IN u8 type)
 {
@@ -281,11 +142,11 @@ void halbtc8723d1ant_ampdu_max_time(IN struct btc_coexist *btcoexist,
 	    (coex_dm->pre_ampdu_time_type != coex_dm->cur_ampdu_time_type)) {
 		switch (coex_dm->cur_ampdu_time_type) {
 		case 0:	/* normal mode */
-			btcoexist->btc_write_1byte(btcoexist, 0x456,
+			btcoexist->btc_write_1byte(btcoexist, 0x455,
 					   coex_dm->backup_ampdu_max_time);
 			break;
 		case 1:	/* AMPDU timw = 0x38 * 32us */
-			btcoexist->btc_write_1byte(btcoexist, 0x456,
+			btcoexist->btc_write_1byte(btcoexist, 0x455,
 						   0x38);
 			break;
 		default:
@@ -295,58 +156,177 @@ void halbtc8723d1ant_ampdu_max_time(IN struct btc_coexist *btcoexist,
 
 	coex_dm->pre_ampdu_time_type = coex_dm->cur_ampdu_time_type;
 }
+#endif
 
-void halbtc8723d1ant_limited_tx(IN struct btc_coexist *btcoexist,
-		IN boolean force_exec, IN u8 ra_mask_type, IN u8 arfr_type,
-				IN u8 retry_limit_type, IN u8 ampdu_time_type)
+static void
+halbtc8723d1ant_limited_tx(struct btc_coexist *btcoexist, boolean force_exec,
+			   boolean tx_limit_en,  boolean ampdu_limit_en)
 {
-	switch (ra_mask_type) {
-	case 0:	/* normal mode */
-		halbtc8723d1ant_update_ra_mask(btcoexist, force_exec,
-					       0x0);
-		break;
-	case 1:	/* disable cck 1/2 */
-		halbtc8723d1ant_update_ra_mask(btcoexist, force_exec,
-					       0x00000003);
-		break;
-	case 2:	/* disable cck 1/2/5.5, ofdm 6/9/12/18/24, mcs 0/1/2/3/4 */
-		halbtc8723d1ant_update_ra_mask(btcoexist, force_exec,
-					       0x0001f1f7);
-		break;
-	default:
-		break;
+	boolean wifi_under_b_mode = FALSE;
+	u32	wifi_link_status = 0, num_of_wifi_link = 0;
+
+	btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_LINK_STATUS,
+			   &wifi_link_status);
+
+	num_of_wifi_link = wifi_link_status >> 16;
+
+	/* Force Max Tx retry limit = 8*/
+	if (!coex_sta->wl_tx_limit_en) {
+		coex_sta->wl_0x430_backup =
+			btcoexist->btc_read_4byte(btcoexist, 0x430);
+		coex_sta->wl_0x434_backup =
+			btcoexist->btc_read_4byte(btcoexist, 0x434);
+		coex_sta->wl_0x42a_backup =
+			btcoexist->btc_read_2byte(btcoexist, 0x42a);
 	}
 
-	halbtc8723d1ant_auto_rate_fallback_retry(btcoexist, force_exec,
-			arfr_type);
-	halbtc8723d1ant_retry_limit(btcoexist, force_exec, retry_limit_type);
-	halbtc8723d1ant_ampdu_max_time(btcoexist, force_exec, ampdu_time_type);
+	if (!coex_sta->wl_ampdu_limit_en)
+		coex_sta->wl_0x456_backup = btcoexist->btc_read_1byte(btcoexist,
+								      0x456);
+
+	if (!force_exec && tx_limit_en == coex_sta->wl_tx_limit_en &&
+	    ampdu_limit_en == coex_sta->wl_ampdu_limit_en)
+		return;
+
+	coex_sta->wl_tx_limit_en = tx_limit_en;
+	coex_sta->wl_ampdu_limit_en = ampdu_limit_en;
+
+	if (tx_limit_en) {
+		/* Set BT polluted packet on for Tx rate adaptive not
+		 *including Tx retry break by PTA, 0x45c[19] =1
+		 *
+		 * Set queue life time to avoid can't reach tx retry limit
+		 * if tx is always break by GNT_BT.
+		 */
+		if ((wifi_link_status & WIFI_STA_CONNECTED) &&
+		     num_of_wifi_link == 1) {
+			btcoexist->btc_write_1byte_bitmask(btcoexist, 0x45e, 0x8, 0x1);
+			btcoexist->btc_write_1byte_bitmask(btcoexist, 0x426, 0xf, 0xf);
+		}
+
+		/* Max Tx retry limit = 8*/
+		btcoexist->btc_write_2byte(btcoexist, 0x42a, 0x0808);
+
+		/* AMPDU duration limit*/
+		btcoexist->btc_write_1byte(btcoexist, 0x456, 0x20);
+
+		btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_UNDER_B_MODE,
+				   &wifi_under_b_mode);
+
+		/* Auto rate fallback step within 8 retry*/
+		if (wifi_under_b_mode) {
+			btcoexist->btc_write_4byte(btcoexist, 0x430, 0x1000000);
+			btcoexist->btc_write_4byte(btcoexist, 0x434, 0x1010101);
+		} else {
+			btcoexist->btc_write_4byte(btcoexist, 0x430, 0x1000000);
+			btcoexist->btc_write_4byte(btcoexist, 0x434, 0x4030201);
+		}
+	} else {
+		/* Set BT polluted packet on for Tx rate adaptive not
+		 *including Tx retry break by PTA, 0x45c[19] =1
+		 */
+		btcoexist->btc_write_1byte_bitmask(btcoexist, 0x45e, 0x8, 0x0);
+
+		/* Set queue life time to avoid can't reach tx retry limit
+		 * if tx is always break by GNT_BT.
+		 */
+		btcoexist->btc_write_1byte_bitmask(btcoexist, 0x426, 0xf, 0x0);
+
+		/* Recovery Max Tx retry limit*/
+		btcoexist->btc_write_2byte(btcoexist, 0x42a,
+					   coex_sta->wl_0x42a_backup);
+		btcoexist->btc_write_4byte(btcoexist, 0x430,
+					   coex_sta->wl_0x430_backup);
+		btcoexist->btc_write_4byte(btcoexist, 0x434,
+					   coex_sta->wl_0x434_backup);
+	}
+
+	if (ampdu_limit_en)
+		btcoexist->btc_write_1byte(btcoexist, 0x456, 0x20);
+	else
+		btcoexist->btc_write_1byte(btcoexist, 0x456,
+					   coex_sta->wl_0x456_backup);
 }
 
-void halbtc8723d1ant_limited_rx(IN struct btc_coexist *btcoexist,
-			IN boolean force_exec, IN boolean rej_ap_agg_pkt,
-			IN boolean bt_ctrl_agg_buf_size, IN u8 agg_buf_size)
+static void
+halbtc8723d1ant_limited_rx(struct btc_coexist *btcoexist, boolean force_exec,
+			   boolean rej_ap_agg_pkt, boolean bt_ctrl_agg_buf_size,
+			   u8 agg_buf_size)
 {
-	boolean	reject_rx_agg = rej_ap_agg_pkt;
-	boolean	bt_ctrl_rx_agg_size = bt_ctrl_agg_buf_size;
-	u8	rx_agg_size = agg_buf_size;
-
-	/* ============================================ */
-	/*	Rx Aggregation related setting */
-	/* ============================================ */
-	btcoexist->btc_set(btcoexist, BTC_SET_BL_TO_REJ_AP_AGG_PKT,
-			   &reject_rx_agg);
+#if 0
+	boolean reject_rx_agg = rej_ap_agg_pkt;
+	boolean bt_ctrl_rx_agg_size = bt_ctrl_agg_buf_size;
+	u8 rx_agg_size = agg_buf_size;
+
+	if (!force_exec &&
+	    bt_ctrl_agg_buf_size == coex_sta->wl_rxagg_limit_en &&
+	    agg_buf_size == coex_sta->wl_rxagg_size)
+		return;
+
+	coex_sta->wl_rxagg_limit_en = bt_ctrl_agg_buf_size;
+	coex_sta->wl_rxagg_size = agg_buf_size;
+
+	/*btc->btc_set(btcoexist, BTC_SET_BL_TO_REJ_AP_AGG_PKT,
+	 *&reject_rx_agg);
+	 */
 	/* decide BT control aggregation buf size or not */
 	btcoexist->btc_set(btcoexist, BTC_SET_BL_BT_CTRL_AGG_SIZE,
 			   &bt_ctrl_rx_agg_size);
-	/* aggregation buf size, only work when BT control Rx aggregation size. */
+	/* aggregation buf size, only work
+	 * when BT control Rx aggregation size
+	 */
 	btcoexist->btc_set(btcoexist, BTC_SET_U1_AGG_BUF_SIZE, &rx_agg_size);
 	/* real update aggregation setting */
 	btcoexist->btc_set(btcoexist, BTC_SET_ACT_AGGREGATE_CTRL, NULL);
+#endif
+}
+
+static
+void halbtc8723d1ant_set_fw_low_penalty_ra(IN struct btc_coexist *btcoexist,
+					   IN boolean low_penalty_ra)
+{
+	u8  h2c_parameter[6] = {0};
+
+	h2c_parameter[0] = 0x6;	/* op_code, 0x6= Retry_Penalty */
 
+	if (low_penalty_ra) {
+		h2c_parameter[1] |= BIT(0);
+
+		/* normal rate except MCS7/6/5, OFDM54/48/36 */
+		h2c_parameter[2] = 0x00;
+		h2c_parameter[3] = 0xf7;  /* MCS7 or OFDM54 */
+		h2c_parameter[4] = 0xf8;  /* MCS6 or OFDM48 */
+		h2c_parameter[5] = 0xf9;  /* MCS5 or OFDM36 */
+	}
 
+	btcoexist->btc_fill_h2c(btcoexist, 0x69, 6, h2c_parameter);
 }
 
+static
+void halbtc8723d1ant_low_penalty_ra(IN struct btc_coexist *btcoexist,
+				    IN boolean force_exec,
+				    IN boolean low_penalty_ra)
+{
+	coex_dm->cur_low_penalty_ra = low_penalty_ra;
+
+	if (!force_exec) {
+		if (coex_dm->pre_low_penalty_ra == coex_dm->cur_low_penalty_ra)
+			return;
+	}
+
+	halbtc8723d1ant_set_fw_low_penalty_ra(btcoexist,
+					      coex_dm->cur_low_penalty_ra);
+
+#if 0
+	if (low_penalty_ra)
+		btcoexist->btc_phydm_modify_RA_PCR_threshold(btcoexist, 0, 15);
+	else
+		btcoexist->btc_phydm_modify_RA_PCR_threshold(btcoexist, 0, 0);
+#endif
+	coex_dm->pre_low_penalty_ra = coex_dm->cur_low_penalty_ra;
+}
+
+static
 void halbtc8723d1ant_query_bt_info(IN struct btc_coexist *btcoexist)
 {
 	u8			h2c_parameter[1] = {0};
@@ -360,12 +340,13 @@ void halbtc8723d1ant_query_bt_info(IN struct btc_coexist *btcoexist)
 	BTC_TRACE(trace_buf);
 }
 
+static
 void halbtc8723d1ant_monitor_bt_ctr(IN struct btc_coexist *btcoexist)
 {
 	u32 reg_hp_txrx, reg_lp_txrx, u32tmp;
 	u32 reg_hp_tx = 0, reg_hp_rx = 0, reg_lp_tx = 0, reg_lp_rx = 0;
-	static u8		num_of_bt_counter_chk = 0, cnt_slave = 0, cnt_overhead = 0,
-				cnt_autoslot_hang = 0;
+	static u8	num_of_bt_counter_chk = 0, cnt_overhead = 0,
+		cnt_autoslot_hang = 0;
 	struct	btc_bt_link_info *bt_link_info = &btcoexist->bt_link_info;
 
 	/* to avoid 0x76e[3] = 1 (WLAN_Act control by PTA) during IPS */
@@ -393,59 +374,40 @@ void halbtc8723d1ant_monitor_bt_ctr(IN struct btc_coexist *btcoexist)
 
 	BTC_TRACE(trace_buf);
 
-	if (BT_8723D_1ANT_BT_STATUS_NON_CONNECTED_IDLE ==
-		coex_dm->bt_status) {
+	if (coex_dm->bt_status == BT_8723D_1ANT_BT_STATUS_NON_CONNECTED_IDLE) {
+		if (coex_sta->high_priority_rx >= 15) {
+			if (cnt_overhead < 3)
+				cnt_overhead++;
 
-			if (coex_sta->high_priority_rx >= 15) {
-					if (cnt_overhead < 3)
-						cnt_overhead++;
-
-					if (cnt_overhead == 3)
-						coex_sta->is_hiPri_rx_overhead = TRUE;
-			} else {
-					if (cnt_overhead > 0)
-						cnt_overhead--;
+			if (cnt_overhead == 3)
+				coex_sta->is_hipri_rx_overhead = TRUE;
+		} else {
+			if (cnt_overhead > 0)
+				cnt_overhead--;
 
-					if (cnt_overhead == 0)
-						coex_sta->is_hiPri_rx_overhead = FALSE;
-			}
-	} else
-		coex_sta->is_hiPri_rx_overhead = FALSE;
+			if (cnt_overhead == 0)
+				coex_sta->is_hipri_rx_overhead = FALSE;
+		}
+	} else {
+		coex_sta->is_hipri_rx_overhead = FALSE;
+	}
 
 	BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-			"[BTCoex], Hi-Pri Rx/Tx: %d/%d, Lo-Pri Rx/Tx: %d/%d\n",
-			reg_hp_rx, reg_hp_tx, reg_lp_rx, reg_lp_tx);
+		    "[BTCoex], Hi-Pri Rx/Tx: %d/%d, Lo-Pri Rx/Tx: %d/%d\n",
+		    reg_hp_rx, reg_hp_tx, reg_lp_rx, reg_lp_tx);
 
 	BTC_TRACE(trace_buf);
 
 	/* reset counter */
 	btcoexist->btc_write_1byte(btcoexist, 0x76e, 0xc);
 
-	if ((coex_sta->low_priority_tx > 1150)	&&
-		(!coex_sta->c2h_bt_inquiry_page))
+	if (coex_sta->low_priority_tx > 1150 &&
+	    !coex_sta->c2h_bt_inquiry_page)
 		coex_sta->pop_event_cnt++;
 
-	if ((coex_sta->low_priority_rx >= 1150) &&
-		(coex_sta->low_priority_rx >= coex_sta->low_priority_tx)
-		&& (!coex_sta->under_ips)  && (!coex_sta->c2h_bt_inquiry_page) &&
-		(coex_sta->bt_link_exist))	{
-		if (cnt_slave >= 2) {
-			bt_link_info->slave_role = TRUE;
-			cnt_slave = 2;
-		} else
-			cnt_slave++;
-	} else {
-		if (cnt_slave == 0) {
-			bt_link_info->slave_role = FALSE;
-			cnt_slave = 0;
-		} else
-			cnt_slave--;
-
-	}
-
 	if (coex_sta->is_tdma_btautoslot) {
-		if ((coex_sta->low_priority_tx >= 1300) &&
-			(coex_sta->low_priority_rx <= 150)) {
+		if (coex_sta->low_priority_tx >= 1300 &&
+		    coex_sta->low_priority_rx <= 150) {
 			if (cnt_autoslot_hang >= 2) {
 				coex_sta->is_tdma_btautoslot_hang = TRUE;
 				cnt_autoslot_hang = 2;
@@ -468,11 +430,10 @@ void halbtc8723d1ant_monitor_bt_ctr(IN struct btc_coexist *btcoexist)
 	}
 
 	if (!coex_sta->bt_disabled) {
-
-		if ((coex_sta->high_priority_tx == 0) &&
-			(coex_sta->high_priority_rx == 0) &&
-			(coex_sta->low_priority_tx == 0) &&
-			(coex_sta->low_priority_rx == 0)) {
+		if (coex_sta->high_priority_tx == 0 &&
+		    coex_sta->high_priority_rx == 0 &&
+		    coex_sta->low_priority_tx == 0 &&
+		    coex_sta->low_priority_rx == 0) {
 			num_of_bt_counter_chk++;
 			if (num_of_bt_counter_chk >= 3) {
 				halbtc8723d1ant_query_bt_info(btcoexist);
@@ -483,6 +444,7 @@ void halbtc8723d1ant_monitor_bt_ctr(IN struct btc_coexist *btcoexist)
 
 }
 
+static
 void halbtc8723d1ant_monitor_wifi_ctr(IN struct btc_coexist *btcoexist)
 {
 	s32 wifi_rssi = 0;
@@ -493,13 +455,12 @@ void halbtc8723d1ant_monitor_wifi_ctr(IN struct btc_coexist *btcoexist)
 		  wl_noisy_count1 = 3, wl_noisy_count2 = 0;
 	u32 total_cnt, reg_val1, reg_val2, cnt_cck;
 	u32 cnt_crcok = 0, cnt_crcerr = 0;
-	static u8 cnt = 0, cnt_ccklocking = 0;
+	static u8 cnt = 0, cnt_ccklocking;
 	u8	h2c_parameter[1] = {0};
 	struct	btc_bt_link_info *bt_link_info = &btcoexist->bt_link_info;
 
 	/*send h2c to query WL FW dbg info	*/
-	if (((coex_dm->cur_ps_tdma_on) && (coex_sta->force_lps_ctrl)) ||
-		 ((coex_sta->acl_busy) && (bt_link_info->a2dp_exist))) {
+	if (coex_dm->cur_ps_tdma_on) {
 		h2c_parameter[0] = 0x8;
 		btcoexist->btc_fill_h2c(btcoexist, 0x69, 1, h2c_parameter);
 	}
@@ -595,18 +556,21 @@ void halbtc8723d1ant_monitor_wifi_ctr(IN struct btc_coexist *btcoexist)
 
 }
 
-
-
-
+static
 void halbtc8723d1ant_update_bt_link_info(IN struct btc_coexist *btcoexist)
 {
-	struct	btc_bt_link_info	*bt_link_info = &btcoexist->bt_link_info;
-	boolean		bt_hs_on = FALSE;
-	boolean		bt_busy = FALSE;
-	u32			val = 0;
-	static	u8		pre_num_of_profile = 0, cur_num_of_profile = 0, cnt = 0;
+	struct btc_bt_link_info	*bt_link_info = &btcoexist->bt_link_info;
+	boolean		bt_hs_on = FALSE, bt_busy = FALSE;
+	u32		val = 0, wifi_link_status = 0, num_of_wifi_link = 0;
+	static u8		pre_num_of_profile, cur_num_of_profile, cnt;
+	static boolean	pre_ble_scan_en;
 
-	if (coex_sta->is_ble_scan_toggle) {
+	btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_LINK_STATUS,
+			   &wifi_link_status);
+
+	num_of_wifi_link = wifi_link_status >> 16;
+
+	if (coex_sta->is_ble_scan_en && !pre_ble_scan_en) {
 		BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
 					"[BTCoex], BT ext info bit4 check, query BLE Scan type!!\n");
 				BTC_TRACE(trace_buf);
@@ -623,6 +587,7 @@ void halbtc8723d1ant_update_bt_link_info(IN struct btc_coexist *btcoexist)
 				btcoexist->btc_get_ble_scan_para_from_bt(btcoexist, 0x4);
 	}
 
+	pre_ble_scan_en = coex_sta->is_ble_scan_en;
 	coex_sta->num_of_profile = 0;
 
 	/* set link exist status */
@@ -770,7 +735,8 @@ void halbtc8723d1ant_update_bt_link_info(IN struct btc_coexist *btcoexist)
 			btcoexist->btc_get(btcoexist, BTC_GET_U4_BT_DEVICE_INFO, &val);
 
 			BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-					"[BTCoex], BtInfoNotify(), get BT DEVICE_INFO = %x\n", val);
+				    "[BTCoex], BtInfoNotify(), get BT DEVICE_INFO = %x\n",
+				    val);
 			BTC_TRACE(trace_buf);
 
 			coex_sta->bt_a2dp_vendor_id = (u8)(val & 0xff);
@@ -785,10 +751,13 @@ void halbtc8723d1ant_update_bt_link_info(IN struct btc_coexist *btcoexist)
 			if (cnt > 0)
 				cnt--;
 
-			btcoexist->btc_get(btcoexist, BTC_GET_U4_BT_FORBIDDEN_SLOT_VAL, &val);
+			btcoexist->btc_get(btcoexist,
+					   BTC_GET_U4_BT_FORBIDDEN_SLOT_VAL,
+					   &val);
 
 			BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-					"[BTCoex], BtInfoNotify(), get BT FORBIDDEN_SLOT_VAL = %x, cnt = %d\n", val, cnt);
+				    "[BTCoex], BtInfoNotify(), get BT FORBIDDEN_SLOT_VAL = %x, cnt = %d\n",
+				    val, cnt);
 			BTC_TRACE(trace_buf);
 
 			coex_sta->legacy_forbidden_slot = (u16)(val & 0xffff);
@@ -797,9 +766,40 @@ void halbtc8723d1ant_update_bt_link_info(IN struct btc_coexist *btcoexist)
 	}
 
 	pre_num_of_profile = coex_sta->num_of_profile;
-}
 
+	if (btcoexist->manual_control || btcoexist->stop_coex_dm)
+		return;
+
+	if (num_of_wifi_link == 0 ||
+	    coex_dm->bt_status == BT_8723D_1ANT_BT_STATUS_NON_CONNECTED_IDLE) {
+		halbtc8723d1ant_low_penalty_ra(btcoexist, NORMAL_EXEC, FALSE);
+		halbtc8723d1ant_limited_tx(btcoexist, NORMAL_EXEC, FALSE,
+					   FALSE);
+		halbtc8723d1ant_limited_rx(btcoexist, NM_EXCU, FALSE, TRUE, 64);
+	} else if (wifi_link_status & WIFI_P2P_GO_CONNECTED ||
+		   wifi_link_status & WIFI_P2P_GC_CONNECTED) {
+		halbtc8723d1ant_low_penalty_ra(btcoexist, NORMAL_EXEC, TRUE);
+		halbtc8723d1ant_limited_tx(btcoexist, NM_EXCU, TRUE, TRUE);
+		halbtc8723d1ant_limited_rx(btcoexist, NM_EXCU, FALSE, TRUE, 16);
+	} else {
+		halbtc8723d1ant_low_penalty_ra(btcoexist, NORMAL_EXEC, TRUE);
+
+		if (bt_link_info->hid_exist || coex_sta->hid_pair_cnt > 0 ||
+		    bt_link_info->sco_exist) {
+			halbtc8723d1ant_limited_tx(btcoexist, NM_EXCU, TRUE,
+						   TRUE);
+			halbtc8723d1ant_limited_rx(btcoexist, NM_EXCU, FALSE,
+						   TRUE, 16);
+		} else {
+			halbtc8723d1ant_limited_tx(btcoexist, NM_EXCU, TRUE,
+						   FALSE);
+			halbtc8723d1ant_limited_rx(btcoexist, NM_EXCU, FALSE,
+						   TRUE, 64);
+		}
+	}
+}
 
+static
 void halbtc8723d1ant_update_wifi_channel_info(IN struct btc_coexist *btcoexist,
 		IN u8 type)
 {
@@ -831,6 +831,7 @@ void halbtc8723d1ant_update_wifi_channel_info(IN struct btc_coexist *btcoexist,
 
 }
 
+static
 u8 halbtc8723d1ant_action_algorithm(IN struct btc_coexist *btcoexist)
 {
 	struct  btc_bt_link_info	*bt_link_info = &btcoexist->bt_link_info;
@@ -1035,81 +1036,7 @@ u8 halbtc8723d1ant_action_algorithm(IN struct btc_coexist *btcoexist)
 	return algorithm;
 }
 
-void halbtc8723d1ant_set_bt_auto_report(IN struct btc_coexist *btcoexist,
-					IN boolean enable_auto_report)
-{
-	u8			h2c_parameter[1] = {0};
-
-	h2c_parameter[0] = 0;
-
-	if (enable_auto_report)
-		h2c_parameter[0] |= BIT(0);
-
-	btcoexist->btc_fill_h2c(btcoexist, 0x68, 1, h2c_parameter);
-}
-
-void halbtc8723d1ant_bt_auto_report(IN struct btc_coexist *btcoexist,
-		    IN boolean force_exec, IN boolean enable_auto_report)
-{
-	coex_dm->cur_bt_auto_report = enable_auto_report;
-
-	if (!force_exec) {
-		if (coex_dm->pre_bt_auto_report == coex_dm->cur_bt_auto_report)
-			return;
-	}
-	halbtc8723d1ant_set_bt_auto_report(btcoexist,
-					   coex_dm->cur_bt_auto_report);
-
-	coex_dm->pre_bt_auto_report = coex_dm->cur_bt_auto_report;
-}
-
-void halbtc8723d1ant_set_fw_low_penalty_ra(IN struct btc_coexist
-		*btcoexist, IN boolean low_penalty_ra)
-{
-#if 1
-	u8			h2c_parameter[6] = {0};
-
-	h2c_parameter[0] = 0x6;	/* op_code, 0x6= Retry_Penalty */
-
-	if (low_penalty_ra) {
-		h2c_parameter[1] |= BIT(0);
-		h2c_parameter[2] =
-			0x00;  /* normal rate except MCS7/6/5, OFDM54/48/36 */
-		h2c_parameter[3] = 0xf7;  /* MCS7 or OFDM54 */
-		h2c_parameter[4] = 0xf8;  /* MCS6 or OFDM48 */
-		h2c_parameter[5] = 0xf9;	/* MCS5 or OFDM36	 */
-	}
-
-	btcoexist->btc_fill_h2c(btcoexist, 0x69, 6, h2c_parameter);
-#endif
-}
-
-void halbtc8723d1ant_low_penalty_ra(IN struct btc_coexist *btcoexist,
-			    IN boolean force_exec, IN boolean low_penalty_ra)
-{
-#if 1
-	coex_dm->cur_low_penalty_ra = low_penalty_ra;
-
-	if (!force_exec) {
-		if (coex_dm->pre_low_penalty_ra == coex_dm->cur_low_penalty_ra)
-			return;
-	}
-
-	halbtc8723d1ant_set_fw_low_penalty_ra(btcoexist,
-					      coex_dm->cur_low_penalty_ra);
-
-#if 0
-	if (low_penalty_ra)
-		btcoexist->btc_phydm_modify_RA_PCR_threshold(btcoexist, 0, 15);
-	else
-		btcoexist->btc_phydm_modify_RA_PCR_threshold(btcoexist, 0, 0);
-#endif
-	coex_dm->pre_low_penalty_ra = coex_dm->cur_low_penalty_ra;
-
-#endif
-
-}
-
+static
 void halbtc8723d1ant_write_score_board(
 	IN	struct  btc_coexist		*btcoexist,
 	IN	u16				bitpos,
@@ -1137,7 +1064,7 @@ void halbtc8723d1ant_write_score_board(
 	}
 }
 
-
+static
 void halbtc8723d1ant_read_score_board(
 	IN	struct  btc_coexist		*btcoexist,
 	IN   u16				*score_board_val
@@ -1148,6 +1075,7 @@ void halbtc8723d1ant_read_score_board(
 			    0xaa)) & 0x7fff;
 }
 
+static
 void halbtc8723d1ant_post_state_to_bt(
 	IN	struct  btc_coexist		*btcoexist,
 	IN	u16						type,
@@ -1162,6 +1090,7 @@ void halbtc8723d1ant_post_state_to_bt(
 	halbtc8723d1ant_write_score_board(btcoexist, (u16) type, state);
 }
 
+static
 boolean halbtc8723d1ant_is_wifibt_status_changed(IN struct btc_coexist
 		*btcoexist)
 {
@@ -1264,8 +1193,8 @@ boolean halbtc8723d1ant_is_wifibt_status_changed(IN struct btc_coexist
 			return TRUE;
 		}
 
-		if (pre_bt_setup_link != coex_sta->is_setupLink) {
-			pre_bt_setup_link = coex_sta->is_setupLink;
+		if (pre_bt_setup_link != coex_sta->is_setup_link) {
+			pre_bt_setup_link = coex_sta->is_setup_link;
 			return TRUE;
 		}
 	}
@@ -1273,36 +1202,20 @@ boolean halbtc8723d1ant_is_wifibt_status_changed(IN struct btc_coexist
 	return FALSE;
 }
 
+static
 void halbtc8723d1ant_monitor_bt_enable_disable(IN struct btc_coexist *btcoexist)
 {
 	static u32		bt_disable_cnt = 0;
-	boolean			bt_active = TRUE, bt_disabled = FALSE;
-	u16			u16tmp;
-
-	/* This function check if bt is disabled */
-#if 0
-	if (coex_sta->high_priority_tx == 0 &&
-	    coex_sta->high_priority_rx == 0 &&
-	    coex_sta->low_priority_tx == 0 &&
-	    coex_sta->low_priority_rx == 0)
-		bt_active = FALSE;
-	if (coex_sta->high_priority_tx == 0xffff &&
-	    coex_sta->high_priority_rx == 0xffff &&
-	    coex_sta->low_priority_tx == 0xffff &&
-	    coex_sta->low_priority_rx == 0xffff)
-		bt_active = FALSE;
-
-
-#else
-
-	/* Read BT on/off status from scoreboard[1], enable this only if BT patch support this feature */
-	halbtc8723d1ant_read_score_board(btcoexist,	&u16tmp);
+	boolean		bt_active = TRUE, bt_disabled = FALSE;
+	u16		u16tmp;
 
+	/* This function check if bt is disabled
+	 * Read BT on/off status from scoreboard[1],
+	 *enable this only if BT patch support this feature
+	 */
+	halbtc8723d1ant_read_score_board(btcoexist, &u16tmp);
 	bt_active = u16tmp & BIT(1);
 
-
-#endif
-
 	if (bt_active) {
 		bt_disable_cnt = 0;
 		bt_disabled = FALSE;
@@ -1320,11 +1233,6 @@ void halbtc8723d1ant_monitor_bt_enable_disable(IN struct btc_coexist *btcoexist)
 				   &bt_disabled);
 	}
 
-	if (bt_disabled)
-		halbtc8723d1ant_low_penalty_ra(btcoexist, NORMAL_EXEC, FALSE);
-	else
-		halbtc8723d1ant_low_penalty_ra(btcoexist, NORMAL_EXEC, TRUE);
-
 	if (coex_sta->bt_disabled != bt_disabled) {
 		BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
 			    "[BTCoex], BT is from %s to %s!!\n",
@@ -1336,8 +1244,7 @@ void halbtc8723d1ant_monitor_bt_enable_disable(IN struct btc_coexist *btcoexist)
 
 }
 
-
-
+static
 void halbtc8723d1ant_enable_gnt_to_gpio(IN struct btc_coexist *btcoexist,
 					boolean isenable)
 {
@@ -1377,6 +1284,7 @@ void halbtc8723d1ant_enable_gnt_to_gpio(IN struct btc_coexist *btcoexist,
 #endif
 }
 
+static
 u32 halbtc8723d1ant_ltecoex_indirect_read_reg(IN struct btc_coexist *btcoexist,
 		IN u16 reg_addr)
 {
@@ -1384,7 +1292,7 @@ u32 halbtc8723d1ant_ltecoex_indirect_read_reg(IN struct btc_coexist *btcoexist,
 
 	while (1) {
 		if ((btcoexist->btc_read_1byte(btcoexist, 0x7c3)&BIT(5)) == 0) {
-			delay_ms(50);
+			delay_ms(10);
 			delay_count++;
 			if (delay_count >= 10) {
 				delay_count = 0;
@@ -1402,6 +1310,7 @@ u32 halbtc8723d1ant_ltecoex_indirect_read_reg(IN struct btc_coexist *btcoexist,
 
 }
 
+static
 void halbtc8723d1ant_ltecoex_indirect_write_reg(IN struct btc_coexist
 		*btcoexist,
 		IN u16 reg_addr, IN u32 bit_mask, IN u32 reg_value)
@@ -1415,7 +1324,7 @@ void halbtc8723d1ant_ltecoex_indirect_write_reg(IN struct btc_coexist
 		/* wait for ready bit before access 0x7c0/0x7c4 */
 		while (1) {
 			if ((btcoexist->btc_read_1byte(btcoexist, 0x7c3)&BIT(5)) == 0) {
-				delay_ms(50);
+				delay_ms(10);
 				delay_count++;
 				if (delay_count >= 10) {
 					delay_count = 0;
@@ -1466,6 +1375,7 @@ void halbtc8723d1ant_ltecoex_indirect_write_reg(IN struct btc_coexist
 
 }
 
+static
 void halbtc8723d1ant_ltecoex_enable(IN struct btc_coexist *btcoexist,
 				    IN boolean enable)
 {
@@ -1477,8 +1387,9 @@ void halbtc8723d1ant_ltecoex_enable(IN struct btc_coexist *btcoexist,
 
 }
 
-void halbtc8723d1ant_ltecoex_pathcontrol_owner(IN struct btc_coexist *btcoexist,
-		IN boolean wifi_control)
+static
+void halbtc8723d1ant_coex_ctrl_owner(IN struct btc_coexist *btcoexist,
+				     IN boolean wifi_control)
 {
 	u8 val;
 
@@ -1488,6 +1399,7 @@ void halbtc8723d1ant_ltecoex_pathcontrol_owner(IN struct btc_coexist *btcoexist,
 
 }
 
+static
 void halbtc8723d1ant_ltecoex_set_gnt_bt(IN struct btc_coexist *btcoexist,
 			IN u8 control_block, IN boolean sw_control, IN u8 state)
 {
@@ -1520,7 +1432,7 @@ void halbtc8723d1ant_ltecoex_set_gnt_bt(IN struct btc_coexist *btcoexist,
 				0x38, 0xffffffff, val);
 }
 
-
+static
 void halbtc8723d1ant_ltecoex_set_gnt_wl(IN struct btc_coexist *btcoexist,
 			IN u8 control_block, IN boolean sw_control, IN u8 state)
 {
@@ -1553,7 +1465,7 @@ void halbtc8723d1ant_ltecoex_set_gnt_wl(IN struct btc_coexist *btcoexist,
 		0xffffffff, val);
 }
 
-
+static
 void halbtc8723d1ant_ltecoex_set_coex_table(IN struct btc_coexist *btcoexist,
 		IN u8 table_type, IN u16 table_content)
 {
@@ -1575,107 +1487,39 @@ void halbtc8723d1ant_ltecoex_set_coex_table(IN struct btc_coexist *btcoexist,
 
 }
 
-
-void halbtc8723d1ant_ltecoex_set_break_table(IN struct btc_coexist *btcoexist,
-		IN u8 table_type, IN u8 table_content)
-{
-	u16 reg_addr = 0x0000;
-
-	switch (table_type) {
-	case BT_8723D_1ANT_LBTT_WL_BREAK_LTE:
-		reg_addr = 0xa8;
-		break;
-	case BT_8723D_1ANT_LBTT_BT_BREAK_LTE:
-		reg_addr = 0xac;
-		break;
-	case BT_8723D_1ANT_LBTT_LTE_BREAK_WL:
-		reg_addr = 0xb0;
-		break;
-	case BT_8723D_1ANT_LBTT_LTE_BREAK_BT:
-		reg_addr = 0xb4;
-		break;
-	}
-
-	if (reg_addr != 0x0000)
-		halbtc8723d1ant_ltecoex_indirect_write_reg(btcoexist, reg_addr,
-			0xff, table_content); /* 0xa8[15:0] or 0xb4[15:0] */
-
-}
-
-void halbtc8723d1ant_set_wltoggle_coex_table(IN struct btc_coexist *btcoexist,
-		IN boolean force_exec,  IN u8 interval,
-		IN u8 val0x6c4_b0, IN u8 val0x6c4_b1, IN u8 val0x6c4_b2,
-		IN u8 val0x6c4_b3)
+static
+void halbtc8723d1ant_coex_table(IN struct btc_coexist *btcoexist,
+				IN boolean force_exec, IN u32 val0x6c0,
+				IN u32 val0x6c4, IN u32 val0x6c8,
+				IN u8 val0x6cc)
 {
-	static u8 pre_h2c_parameter[6] = {0};
-	u8	cur_h2c_parameter[6] = {0};
-	u8 i, match_cnt = 0;
-
-	cur_h2c_parameter[0] = 0x7;	/* op_code, 0x7= wlan toggle slot*/
-
-	cur_h2c_parameter[1] = interval;
-	cur_h2c_parameter[2] = val0x6c4_b0;
-	cur_h2c_parameter[3] = val0x6c4_b1;
-	cur_h2c_parameter[4] = val0x6c4_b2;
-	cur_h2c_parameter[5] = val0x6c4_b3;
-
 	if (!force_exec) {
-		for (i = 1; i <= 5; i++) {
-			if (cur_h2c_parameter[i] != pre_h2c_parameter[i])
-				break;
-
-			match_cnt++;
-		}
-
-		if (match_cnt == 5)
+		if (val0x6c0 == coex_dm->cur_val0x6c0 &&
+		    val0x6c4 == coex_dm->cur_val0x6c4 &&
+		    val0x6c8 == coex_dm->cur_val0x6c8 &&
+		    val0x6cc == coex_dm->cur_val0x6cc)
 			return;
 	}
 
-	for (i = 1; i <= 5; i++)
-		pre_h2c_parameter[i] = cur_h2c_parameter[i];
-
-	btcoexist->btc_fill_h2c(btcoexist, 0x69, 6, cur_h2c_parameter);
-}
-
-
-void halbtc8723d1ant_set_coex_table(IN struct btc_coexist *btcoexist,
-	    IN u32 val0x6c0, IN u32 val0x6c4, IN u32 val0x6c8, IN u8 val0x6cc)
-{
 	btcoexist->btc_write_4byte(btcoexist, 0x6c0, val0x6c0);
-
 	btcoexist->btc_write_4byte(btcoexist, 0x6c4, val0x6c4);
-
 	btcoexist->btc_write_4byte(btcoexist, 0x6c8, val0x6c8);
-
 	btcoexist->btc_write_1byte(btcoexist, 0x6cc, val0x6cc);
-}
 
-void halbtc8723d1ant_coex_table(IN struct btc_coexist *btcoexist,
-			IN boolean force_exec, IN u32 val0x6c0, IN u32 val0x6c4,
-				IN u32 val0x6c8, IN u8 val0x6cc)
-{
 	coex_dm->cur_val0x6c0 = val0x6c0;
 	coex_dm->cur_val0x6c4 = val0x6c4;
 	coex_dm->cur_val0x6c8 = val0x6c8;
 	coex_dm->cur_val0x6cc = val0x6cc;
 
-	if (!force_exec) {
-		if ((coex_dm->pre_val0x6c0 == coex_dm->cur_val0x6c0) &&
-		    (coex_dm->pre_val0x6c4 == coex_dm->cur_val0x6c4) &&
-		    (coex_dm->pre_val0x6c8 == coex_dm->cur_val0x6c8) &&
-		    (coex_dm->pre_val0x6cc == coex_dm->cur_val0x6cc))
-			return;
-	}
-
-	halbtc8723d1ant_set_coex_table(btcoexist, val0x6c0, val0x6c4, val0x6c8,
-				       val0x6cc);
+	BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
+		    "[BTCoex], 0x6c0 = 0x%x, 0x6c4 = 0x%x, 0x6c8 = 0x%x, 0x6cc = 0x%x,\n",
+		    coex_dm->cur_val0x6c0, coex_dm->cur_val0x6c4,
+		    coex_dm->cur_val0x6c8, coex_dm->cur_val0x6cc);
+	BTC_TRACE(trace_buf);
 
-	coex_dm->pre_val0x6c0 = coex_dm->cur_val0x6c0;
-	coex_dm->pre_val0x6c4 = coex_dm->cur_val0x6c4;
-	coex_dm->pre_val0x6c8 = coex_dm->cur_val0x6c8;
-	coex_dm->pre_val0x6cc = coex_dm->cur_val0x6cc;
 }
 
+static
 void halbtc8723d1ant_coex_table_with_type(IN struct btc_coexist *btcoexist,
 		IN boolean force_exec, IN u8 type)
 {
@@ -1686,8 +1530,8 @@ void halbtc8723d1ant_coex_table_with_type(IN struct btc_coexist *btcoexist,
 
 	if (coex_sta->concurrent_rx_mode_on == TRUE) {
 		break_table = 0xf0ffffff;  /* set WL hi-pri can break BT */
-		select_table =
-			0xb;		/* set Tx response = Hi-Pri (ex: Transmitting ACK,BA,CTS) */
+		/* set Tx response = Hi-Pri (ex: Transmitting ACK,BA,CTS) */
+		select_table = 0xb;
 	} else {
 		break_table = 0xffffff;
 		select_table = 0x3;
@@ -1761,28 +1605,40 @@ void halbtc8723d1ant_coex_table_with_type(IN struct btc_coexist *btcoexist,
 		break;
 	case 13:
 		halbtc8723d1ant_coex_table(btcoexist, force_exec,
-					   0xaa5555aa, 0xaa5a5a5a, break_table,
+					   0x65555555, 0xaa5a5a5a, break_table,
 					   select_table);
 		break;
 	case 14:
 		halbtc8723d1ant_coex_table(btcoexist, force_exec,
-					   0xaa5555aa, 0x5a5a5a5a, break_table,
+					   0x65555555, 0x5a5a5a5a, break_table,
 					   select_table);
 		break;
 	case 15:
 		halbtc8723d1ant_coex_table(btcoexist, force_exec,
 					   0xaaaaaaaa, 0x5a5a5a5a, break_table,
 					   select_table);
-		/* halbtc8723d1ant_coex_table(btcoexist, force_exec,
-					   0x55555555, 0x5a5a5a5a, break_table,
+		break;
+	case 16:
+		halbtc8723d1ant_coex_table(btcoexist, force_exec,
+					   0x55555555, 0xaaaaaaaa, break_table,
+					   select_table);
+		break;
+	case 17:
+		halbtc8723d1ant_coex_table(btcoexist, force_exec,
+					   0x65555555, 0x65555555, break_table,
+					   select_table);
+		break;
+	case 18:
+		halbtc8723d1ant_coex_table(btcoexist, force_exec,
+					   0x65555555, 0xaaaaaaaa, break_table,
 					   select_table);
-		*/
 		break;
 	default:
 		break;
 	}
 }
 
+static
 void halbtc8723d1ant_set_fw_ignore_wlan_act(IN struct btc_coexist *btcoexist,
 		IN boolean enable)
 {
@@ -1795,6 +1651,7 @@ void halbtc8723d1ant_set_fw_ignore_wlan_act(IN struct btc_coexist *btcoexist,
 	btcoexist->btc_fill_h2c(btcoexist, 0x63, 1, h2c_parameter);
 }
 
+static
 void halbtc8723d1ant_ignore_wlan_act(IN struct btc_coexist *btcoexist,
 				     IN boolean force_exec, IN boolean enable)
 {
@@ -1810,6 +1667,7 @@ void halbtc8723d1ant_ignore_wlan_act(IN struct btc_coexist *btcoexist,
 	coex_dm->pre_ignore_wlan_act = coex_dm->cur_ignore_wlan_act;
 }
 
+static
 void halbtc8723d1ant_set_lps_rpwm(IN struct btc_coexist *btcoexist,
 				  IN u8 lps_val, IN u8 rpwm_val)
 {
@@ -1820,6 +1678,7 @@ void halbtc8723d1ant_set_lps_rpwm(IN struct btc_coexist *btcoexist,
 	btcoexist->btc_set(btcoexist, BTC_SET_U1_RPWM_VAL, &rpwm);
 }
 
+static
 void halbtc8723d1ant_lps_rpwm(IN struct btc_coexist *btcoexist,
 		      IN boolean force_exec, IN u8 lps_val, IN u8 rpwm_val)
 {
@@ -1837,6 +1696,7 @@ void halbtc8723d1ant_lps_rpwm(IN struct btc_coexist *btcoexist,
 	coex_dm->pre_rpwm = coex_dm->cur_rpwm;
 }
 
+static
 void halbtc8723d1ant_ps_tdma_check_for_power_save_state(
 	IN struct btc_coexist *btcoexist, IN boolean new_ps_state)
 {
@@ -1864,6 +1724,7 @@ void halbtc8723d1ant_ps_tdma_check_for_power_save_state(
 	}
 }
 
+static
 void halbtc8723d1ant_power_save_state(IN struct btc_coexist *btcoexist,
 			      IN u8 ps_type, IN u8 lps_val, IN u8 rpwm_val)
 {
@@ -1892,7 +1753,7 @@ void halbtc8723d1ant_power_save_state(IN struct btc_coexist *btcoexist,
 		btcoexist->btc_set(btcoexist,
 				   BTC_SET_ACT_DISABLE_LOW_POWER,
 				   &low_pwr_disable);
-		/* power save must executed before psTdma.			 */
+		/* power save must executed before psTdma.*/
 		btcoexist->btc_set(btcoexist, BTC_SET_ACT_ENTER_LPS,
 				   NULL);
 
@@ -1910,7 +1771,7 @@ void halbtc8723d1ant_power_save_state(IN struct btc_coexist *btcoexist,
 	}
 }
 
-
+static
 void halbtc8723d1ant_set_fw_pstdma(IN struct btc_coexist *btcoexist,
 	   IN u8 byte1, IN u8 byte2, IN u8 byte3, IN u8 byte4, IN u8 byte5)
 {
@@ -1979,31 +1840,17 @@ void halbtc8723d1ant_set_fw_pstdma(IN struct btc_coexist *btcoexist,
 		btcoexist->btc_set(btcoexist, BTC_SET_ACT_POST_NORMAL_LPS, NULL);
 }
 
-
+static
 void halbtc8723d1ant_ps_tdma(IN struct btc_coexist *btcoexist,
 		     IN boolean force_exec, IN boolean turn_on, IN u8 type)
 {
 	struct  btc_bt_link_info *bt_link_info = &btcoexist->bt_link_info;
 	struct  btc_board_info	*board_info = &btcoexist->board_info;
 	boolean	wifi_busy = FALSE;
-	static u8	psTdmaByte4Modify = 0x0, pre_psTdmaByte4Modify = 0x0;
+	static u8 tdma_byte4_modify, pre_tdma_byte4_modify;
 	static boolean	 pre_wifi_busy = FALSE;
 
-
-#if BT_8723D_1ANT_ANTDET_ENABLE
-
-	if (board_info->btdm_ant_num_by_ant_det == 2) {
-#if 0
-		if (turn_on)
-			type = type +
-			       100;
-#endif
-	}
-
-#endif
-
-	coex_dm->cur_ps_tdma_on = turn_on;
-	coex_dm->cur_ps_tdma = type;
+	btcoexist->btc_set_atomic(btcoexist, &coex_dm->setting_tdma, TRUE);
 
 	btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_BUSY, &wifi_busy);
 
@@ -2013,257 +1860,276 @@ void halbtc8723d1ant_ps_tdma(IN struct btc_coexist *btcoexist,
 	}
 
 	/* 0x778 = 0x1 at wifi slot (no blocking BT Low-Pri pkts) */
-	if ((bt_link_info->slave_role) && (bt_link_info->a2dp_exist))
-		psTdmaByte4Modify = 0x1;
+	if (bt_link_info->slave_role && bt_link_info->a2dp_exist)
+		tdma_byte4_modify = 0x1;
 	else
-		psTdmaByte4Modify = 0x0;
-
-	if (pre_psTdmaByte4Modify != psTdmaByte4Modify) {
+		tdma_byte4_modify = 0x0;
 
+	if (pre_tdma_byte4_modify != tdma_byte4_modify) {
 		force_exec = TRUE;
-		pre_psTdmaByte4Modify = psTdmaByte4Modify;
+		pre_tdma_byte4_modify = tdma_byte4_modify;
 	}
 
 	if (!force_exec) {
-		if ((coex_dm->pre_ps_tdma_on == coex_dm->cur_ps_tdma_on) &&
-		    (coex_dm->pre_ps_tdma == coex_dm->cur_ps_tdma))
+		if (turn_on == coex_dm->cur_ps_tdma_on &&
+		    type == coex_dm->cur_ps_tdma) {
+			BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
+				    "[BTCoex], Skip TDMA because no change TDMA(%s, %d)\n",
+				    (coex_dm->cur_ps_tdma_on ? "on" : "off"),
+				    coex_dm->cur_ps_tdma);
+			BTC_TRACE(trace_buf);
+
+			btcoexist->btc_set_atomic(btcoexist,
+						  &coex_dm->setting_tdma,
+						  FALSE);
 			return;
+		}
 	}
 
-	if (coex_dm->cur_ps_tdma_on) {
+	if (turn_on) {
 		BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-			    "[BTCoex], ********** TDMA(on, %d) **********\n",
-			    coex_dm->cur_ps_tdma);
+			    "[BTCoex], ********** TDMA(on, %d)\n", type);
 		BTC_TRACE(trace_buf);
 
-		btcoexist->btc_write_1byte_bitmask(btcoexist, 0x550, 0x8,
-					   0x1);  /* enable TBTT nterrupt */
+		halbtc8723d1ant_post_state_to_bt(btcoexist,
+						 BT_8723D_1ANT_SCOREBOARD_TDMA,
+						 TRUE);
+
+		/* enable TBTT interrupt */
+		btcoexist->btc_write_1byte_bitmask(btcoexist, 0x550, 0x8, 0x1);
 	} else {
 		BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-			    "[BTCoex], ********** TDMA(off, %d) **********\n",
-			    coex_dm->cur_ps_tdma);
+			    "[BTCoex], ********** TDMA(off, %d)\n", type);
 		BTC_TRACE(trace_buf);
+
+		halbtc8723d1ant_post_state_to_bt(btcoexist,
+						 BT_8723D_1ANT_SCOREBOARD_TDMA,
+						 FALSE);
 	}
 
 
 	if (turn_on) {
 		switch (type) {
 		default:
-			halbtc8723d1ant_set_fw_pstdma(btcoexist,
-							0x61, 0x35, 0x03, 0x11, 0x11);
+			halbtc8723d1ant_set_fw_pstdma(btcoexist, 0x61,
+						      0x35, 0x03, 0x11, 0x11);
 			break;
 		case 3:
-			halbtc8723d1ant_set_fw_pstdma(btcoexist,
-							0x51, 0x30, 0x03, 0x10, 0x50);
+			halbtc8723d1ant_set_fw_pstdma(btcoexist, 0x51,
+						      0x30, 0x03, 0x10, 0x50);
 			break;
 		case 4:
-			halbtc8723d1ant_set_fw_pstdma(btcoexist,
-							0x51, 0x21, 0x03, 0x10, 0x50);
+			halbtc8723d1ant_set_fw_pstdma(btcoexist, 0x51,
+						      0x21, 0x03, 0x10, 0x50);
 			break;
 		case 5:
-			halbtc8723d1ant_set_fw_pstdma(btcoexist,
-							0x61, 0x3a, 0x03, 0x11, 0x11);
+			halbtc8723d1ant_set_fw_pstdma(btcoexist, 0x61,
+						      0x3a, 0x03, 0x11, 0x11);
 			break;
 		case 6:
-			halbtc8723d1ant_set_fw_pstdma(btcoexist,
-							0x61, 0x20, 0x03, 0x11, 0x11);
+			halbtc8723d1ant_set_fw_pstdma(btcoexist, 0x61,
+						      0x20, 0x03, 0x11, 0x11);
 			break;
 		case 7:
-			halbtc8723d1ant_set_fw_pstdma(btcoexist,
-							0x51, 0x10, 0x03, 0x10,  0x54 |
-							psTdmaByte4Modify);
+			halbtc8723d1ant_set_fw_pstdma(btcoexist, 0x51,
+						      0x10, 0x03, 0x10,  0x54 |
+						      tdma_byte4_modify);
 			break;
 		case 8:
-			halbtc8723d1ant_set_fw_pstdma(btcoexist,
-							0x51, 0x10, 0x03, 0x10,  0x54 |
-							psTdmaByte4Modify);
+			halbtc8723d1ant_set_fw_pstdma(btcoexist, 0x51,
+						      0x10, 0x03, 0x10,  0x54 |
+						      tdma_byte4_modify);
 			break;
 		case 9:
-			halbtc8723d1ant_set_fw_pstdma(btcoexist,
-							0x51, 0x10, 0x03, 0x10,  0x54 |
-							psTdmaByte4Modify);
+			halbtc8723d1ant_set_fw_pstdma(btcoexist, 0x51,
+						      0x10, 0x03, 0x10,  0x54 |
+						      tdma_byte4_modify);
 			break;
 		case 10:
-			halbtc8723d1ant_set_fw_pstdma(btcoexist,
-							0x61, 0x30, 0x03, 0x11, 0x10);
+			halbtc8723d1ant_set_fw_pstdma(btcoexist, 0x61,
+						      0x30, 0x03, 0x11, 0x10);
 			break;
 		case 11:
-			halbtc8723d1ant_set_fw_pstdma(btcoexist,
-							0x61, 0x25, 0x03, 0x11,  0x11 |
-							psTdmaByte4Modify);
+			halbtc8723d1ant_set_fw_pstdma(btcoexist, 0x61,
+						      0x25, 0x03, 0x11,  0x11 |
+						      tdma_byte4_modify);
 			break;
 		case 12:
-			halbtc8723d1ant_set_fw_pstdma(btcoexist,
-							0x51, 0x35, 0x03, 0x10,  0x50 |
-							psTdmaByte4Modify);
+			halbtc8723d1ant_set_fw_pstdma(btcoexist, 0x51,
+						      0x35, 0x03, 0x10,  0x50 |
+						      tdma_byte4_modify);
 			break;
 		case 13:
-			halbtc8723d1ant_set_fw_pstdma(btcoexist,
-							0x51, 0x10, 0x07, 0x10,  0x54 |
-						      psTdmaByte4Modify);
+			halbtc8723d1ant_set_fw_pstdma(btcoexist, 0x51,
+						      0x10, 0x07, 0x10,  0x54 |
+						      tdma_byte4_modify);
 			break;
 		case 14:
-			halbtc8723d1ant_set_fw_pstdma(btcoexist,
-							0x51, 0x15, 0x03, 0x10,  0x50 |
-						      psTdmaByte4Modify);
+			halbtc8723d1ant_set_fw_pstdma(btcoexist, 0x51,
+						      0x15, 0x03, 0x10,  0x50 |
+						      tdma_byte4_modify);
 			break;
 		case 15:
-			halbtc8723d1ant_set_fw_pstdma(btcoexist,
-							0x51, 0x20, 0x03, 0x10,  0x50 |
-							psTdmaByte4Modify);
+			halbtc8723d1ant_set_fw_pstdma(btcoexist, 0x51,
+						      0x20, 0x03, 0x10,  0x50 |
+						      tdma_byte4_modify);
 			break;
 		case 16:
-			halbtc8723d1ant_set_fw_pstdma(btcoexist,
-							0x61, 0x10, 0x03, 0x11,  0x15 |
-							psTdmaByte4Modify);
+			halbtc8723d1ant_set_fw_pstdma(btcoexist, 0x61,
+						      0x10, 0x03, 0x11,  0x15 |
+						      tdma_byte4_modify);
 			break;
 		case 17:
-			halbtc8723d1ant_set_fw_pstdma(btcoexist,
-							0x61, 0x10, 0x03, 0x11, 0x14);
+			halbtc8723d1ant_set_fw_pstdma(btcoexist, 0x61,
+						      0x10, 0x03, 0x11, 0x14);
 			break;
 		case 18:
-			halbtc8723d1ant_set_fw_pstdma(btcoexist,
-							0x51, 0x30, 0x03, 0x10,  0x50 |
-							psTdmaByte4Modify);
+			halbtc8723d1ant_set_fw_pstdma(btcoexist, 0x51,
+						      0x30, 0x03, 0x10,  0x50 |
+						      tdma_byte4_modify);
 			break;
 		case 19:
-			halbtc8723d1ant_set_fw_pstdma(btcoexist,
-							0x61, 0x15, 0x03, 0x11, 0x10);
+			halbtc8723d1ant_set_fw_pstdma(btcoexist, 0x61,
+						      0x15, 0x03, 0x11, 0x10);
 			break;
 		case 20:
-			halbtc8723d1ant_set_fw_pstdma(btcoexist,
-							0x61, 0x30, 0x03, 0x11, 0x10);
+			halbtc8723d1ant_set_fw_pstdma(btcoexist, 0x61,
+						      0x30, 0x03, 0x11, 0x10);
 			break;
 		case 21:
-			halbtc8723d1ant_set_fw_pstdma(btcoexist,
-							0x61, 0x30, 0x03, 0x11, 0x10);
+			halbtc8723d1ant_set_fw_pstdma(btcoexist, 0x61,
+						      0x30, 0x03, 0x11, 0x10);
 			break;
 		case 22:
-			halbtc8723d1ant_set_fw_pstdma(btcoexist,
-							0x61, 0x25, 0x03, 0x11, 0x10);
+			halbtc8723d1ant_set_fw_pstdma(btcoexist, 0x61,
+						      0x25, 0x03, 0x11, 0x10);
 			break;
 		case 23:
-			halbtc8723d1ant_set_fw_pstdma(btcoexist,
-							0x61, 0x10, 0x03, 0x11, 0x10);
+			halbtc8723d1ant_set_fw_pstdma(btcoexist, 0x61,
+						      0x10, 0x03, 0x11, 0x10);
 			break;
 		case 24:
-			halbtc8723d1ant_set_fw_pstdma(btcoexist,
-							0x51, 0x08, 0x03, 0x10,  0x54 |
-							psTdmaByte4Modify);
+			halbtc8723d1ant_set_fw_pstdma(btcoexist, 0x51,
+						      0x08, 0x03, 0x10,  0x54 |
+						      tdma_byte4_modify);
 			break;
 		case 25:
-			halbtc8723d1ant_set_fw_pstdma(btcoexist,
-							0x51, 0x3a, 0x03, 0x11, 0x50);
+			halbtc8723d1ant_set_fw_pstdma(btcoexist, 0x51,
+						      0x3a, 0x03, 0x11, 0x50);
 			break;
 		case 26:
-			halbtc8723d1ant_set_fw_pstdma(btcoexist,
-							0x51, 0x10, 0x03, 0x10,  0x55);
+			halbtc8723d1ant_set_fw_pstdma(btcoexist, 0x51,
+						      0x10, 0x03, 0x10,  0x55);
 			break;
 		case 27:
-			halbtc8723d1ant_set_fw_pstdma(btcoexist,
-							0x61, 0x10, 0x03, 0x11, 0x15);
+			halbtc8723d1ant_set_fw_pstdma(btcoexist, 0x61,
+						      0x10, 0x03, 0x11, 0x15);
 			break;
 		case 28:
-			halbtc8723d1ant_set_fw_pstdma(btcoexist,
-							0x51, 0x10, 0x0b, 0x10,  0x54);
+			halbtc8723d1ant_set_fw_pstdma(btcoexist, 0x51,
+						      0x10, 0x0b, 0x10,  0x54);
 			break;
 		case 32:
-			halbtc8723d1ant_set_fw_pstdma(btcoexist,
-							0x61, 0x35, 0x03, 0x11, 0x11);
+			halbtc8723d1ant_set_fw_pstdma(btcoexist, 0x61,
+						      0x35, 0x03, 0x11, 0x11);
 			break;
 		case 33:
-			halbtc8723d1ant_set_fw_pstdma(btcoexist,
-							0x61, 0x35, 0x03, 0x11, 0x10);
+			halbtc8723d1ant_set_fw_pstdma(btcoexist, 0x61,
+						      0x35, 0x03, 0x11, 0x10);
 			break;
+		case 34:
+			halbtc8723d1ant_set_fw_pstdma(btcoexist, 0x61,
+						      0x3f, 0x03, 0x11, 0x10);
+			break;	
 		case 36:
-			halbtc8723d1ant_set_fw_pstdma(btcoexist,
-							0x61, 0x48, 0x03, 0x11, 0x10);
+			halbtc8723d1ant_set_fw_pstdma(btcoexist, 0x61,
+						      0x48, 0x03, 0x11, 0x10);
 			break;
 		case 57:
-			halbtc8723d1ant_set_fw_pstdma(btcoexist,
-							0x51, 0x10, 0x03, 0x10,  0x50 |
-							psTdmaByte4Modify);
+			halbtc8723d1ant_set_fw_pstdma(btcoexist, 0x51,
+						      0x10, 0x03, 0x10,  0x50 |
+						      tdma_byte4_modify);
 			break;
 		case 58:
-			halbtc8723d1ant_set_fw_pstdma(btcoexist,
-							0x51, 0x10, 0x03, 0x10,  0x50 |
-							psTdmaByte4Modify);
+			halbtc8723d1ant_set_fw_pstdma(btcoexist, 0x51,
+						      0x10, 0x03, 0x10,  0x50 |
+						      tdma_byte4_modify);
 			break;
 		case 67:
-			halbtc8723d1ant_set_fw_pstdma(btcoexist,
-							0x61, 0x10, 0x03, 0x11,  0x10 |
-							psTdmaByte4Modify);
+			halbtc8723d1ant_set_fw_pstdma(btcoexist, 0x61,
+						      0x10, 0x03, 0x11,  0x10 |
+						      tdma_byte4_modify);
 			break;
 		/*     1-Ant to 2-Ant      TDMA case */
 		case 103:
-			halbtc8723d1ant_set_fw_pstdma(btcoexist,
-							0xd3, 0x3a, 0x03, 0x70, 0x10);
+			halbtc8723d1ant_set_fw_pstdma(btcoexist, 0xd3,
+						      0x3a, 0x03, 0x70, 0x10);
 			break;
 		case 104:
-			halbtc8723d1ant_set_fw_pstdma(btcoexist,
-							0xd3, 0x21, 0x03, 0x70, 0x10);
+			halbtc8723d1ant_set_fw_pstdma(btcoexist, 0xd3,
+						      0x21, 0x03, 0x70, 0x10);
 			break;
 		case 105:
-			halbtc8723d1ant_set_fw_pstdma(btcoexist,
-							0xe3, 0x15, 0x03, 0x71, 0x11);
+			halbtc8723d1ant_set_fw_pstdma(btcoexist, 0xe3,
+						      0x15, 0x03, 0x71, 0x11);
 			break;
 		case 106:
-			halbtc8723d1ant_set_fw_pstdma(btcoexist,
-							0xe3, 0x20, 0x03, 0x71, 0x11);
+			halbtc8723d1ant_set_fw_pstdma(btcoexist, 0xe3,
+						      0x20, 0x03, 0x71, 0x11);
 			break;
 		case 107:
-			halbtc8723d1ant_set_fw_pstdma(btcoexist,
-							0xd3, 0x10, 0x03, 0x70,  0x14 |
-							psTdmaByte4Modify);
+			halbtc8723d1ant_set_fw_pstdma(btcoexist, 0xd3,
+						      0x10, 0x03, 0x70,  0x14 |
+						      tdma_byte4_modify);
 			break;
 		case 108:
-			halbtc8723d1ant_set_fw_pstdma(btcoexist,
-							0xd3, 0x10, 0x03, 0x70,  0x14 |
-							psTdmaByte4Modify);
+			halbtc8723d1ant_set_fw_pstdma(btcoexist, 0xd3,
+						      0x10, 0x03, 0x70,  0x14 |
+						      tdma_byte4_modify);
 			break;
 		case 113:
-			halbtc8723d1ant_set_fw_pstdma(btcoexist,
-							0xd3, 0x25, 0x03, 0x70,  0x10 |
-							psTdmaByte4Modify);
+			halbtc8723d1ant_set_fw_pstdma(btcoexist, 0xd3,
+						      0x25, 0x03, 0x70,  0x10 |
+						      tdma_byte4_modify);
 			break;
 		case 114:
-			halbtc8723d1ant_set_fw_pstdma(btcoexist,
-							0xd3, 0x15, 0x03, 0x70,  0x10 |
-							psTdmaByte4Modify);
+			halbtc8723d1ant_set_fw_pstdma(btcoexist, 0xd3,
+						      0x15, 0x03, 0x70,  0x10 |
+						      tdma_byte4_modify);
 			break;
 		case 115:
-			halbtc8723d1ant_set_fw_pstdma(btcoexist,
-							0xd3, 0x20, 0x03, 0x70,  0x10 |
-							psTdmaByte4Modify);
+			halbtc8723d1ant_set_fw_pstdma(btcoexist, 0xd3,
+						      0x20, 0x03, 0x70,  0x10 |
+						      tdma_byte4_modify);
 			break;
 		case 117:
-			halbtc8723d1ant_set_fw_pstdma(btcoexist,
-							0xe3, 0x10, 0x03, 0x71,  0x14 |
-							psTdmaByte4Modify);
+			halbtc8723d1ant_set_fw_pstdma(btcoexist, 0xe3,
+						      0x10, 0x03, 0x71,  0x14 |
+						      tdma_byte4_modify);
 			break;
 		case 119:
-			halbtc8723d1ant_set_fw_pstdma(btcoexist,
-							0xe3, 0x15, 0x03, 0x71, 0x10);
+			halbtc8723d1ant_set_fw_pstdma(btcoexist, 0xe3,
+						      0x15, 0x03, 0x71, 0x10);
 			break;
 		case 120:
-			halbtc8723d1ant_set_fw_pstdma(btcoexist,
-							0xe3, 0x30, 0x03, 0x71, 0x10);
+			halbtc8723d1ant_set_fw_pstdma(btcoexist, 0xe3,
+						      0x30, 0x03, 0x71, 0x10);
 			break;
 		case 121:
-			halbtc8723d1ant_set_fw_pstdma(btcoexist,
-							0xe3, 0x30, 0x03, 0x71, 0x10);
+			halbtc8723d1ant_set_fw_pstdma(btcoexist, 0xe3,
+						      0x30, 0x03, 0x71, 0x10);
 			break;
 		case 122:
-			halbtc8723d1ant_set_fw_pstdma(btcoexist,
-							0xe3, 0x25, 0x03, 0x71, 0x10);
+			halbtc8723d1ant_set_fw_pstdma(btcoexist, 0xe3,
+						      0x25, 0x03, 0x71, 0x10);
 			break;
 		case 132:
-			halbtc8723d1ant_set_fw_pstdma(btcoexist,
-							0xe3, 0x35, 0x03, 0x71, 0x11);
+			halbtc8723d1ant_set_fw_pstdma(btcoexist, 0xe3,
+						      0x35, 0x03, 0x71, 0x11);
 			break;
 		case 133:
-			halbtc8723d1ant_set_fw_pstdma(btcoexist,
-							0xe3, 0x35, 0x03, 0x71, 0x10);
+			halbtc8723d1ant_set_fw_pstdma(btcoexist, 0xe3,
+						      0x35, 0x03, 0x71, 0x10);
 			break;
 		}
 	} else {
@@ -2271,26 +2137,29 @@ void halbtc8723d1ant_ps_tdma(IN struct btc_coexist *btcoexist,
 		/* disable PS tdma */
 		switch (type) {
 		case 8: /* PTA Control */
-			halbtc8723d1ant_set_fw_pstdma(btcoexist, 0x8,
-						      0x0, 0x0, 0x0, 0x0);
+			halbtc8723d1ant_set_fw_pstdma(btcoexist,
+						      0x8, 0x0, 0x0, 0x0, 0x0);
 			break;
 		case 0:
 		default:  /* Software control, Antenna at BT side */
-			halbtc8723d1ant_set_fw_pstdma(btcoexist, 0x0,
-						      0x0, 0x0, 0x0, 0x0);
+			halbtc8723d1ant_set_fw_pstdma(btcoexist,
+						      0x0, 0x0, 0x0, 0x0, 0x0);
 			break;
 		case 1: /* 2-Ant, 0x778=3, antenna control by antenna diversity */
-			halbtc8723d1ant_set_fw_pstdma(btcoexist, 0x0,
-						      0x0, 0x0, 0x48, 0x0);
+			halbtc8723d1ant_set_fw_pstdma(btcoexist,
+						      0x0, 0x0, 0x0, 0x48, 0x0);
 			break;
 		}
 	}
 
-	coex_dm->pre_ps_tdma_on = coex_dm->cur_ps_tdma_on;
-	coex_dm->pre_ps_tdma = coex_dm->cur_ps_tdma;
-}
+	/* update pre state */
+	coex_dm->cur_ps_tdma_on = turn_on;
+	coex_dm->cur_ps_tdma = type;
 
+	btcoexist->btc_set_atomic(btcoexist, &coex_dm->setting_tdma, FALSE);
+}
 
+static
 void halbtc8723d1ant_set_ant_path(IN struct btc_coexist *btcoexist,
 				  IN u8 ant_pos_type, IN boolean force_exec,
 				  IN u8 phase)
@@ -2302,7 +2171,7 @@ void halbtc8723d1ant_set_ant_path(IN struct btc_coexist *btcoexist,
 	u32			u32tmp1 = 0, u32tmp2 = 0, u32tmp3 = 0;
 	u16			u16tmp0, u16tmp1 = 0;
 
-#if BT_8723D_1ANT_ANTDET_ENABLE
+#if 0
 
 	if (ant_pos_type == BTC_ANT_PATH_PTA) {
 		if ((board_info->btdm_ant_det_finish) &&
@@ -2317,8 +2186,9 @@ void halbtc8723d1ant_set_ant_path(IN struct btc_coexist *btcoexist,
 
 #endif
 
-	u32tmp1 = halbtc8723d1ant_ltecoex_indirect_read_reg(btcoexist,
-				0x38);
+#if BT_8723D_1ANT_COEX_DBG
+
+	u32tmp1 = halbtc8723d1ant_ltecoex_indirect_read_reg(btcoexist, 0x38);
 
 	/* To avoid indirect access fail	*/
 	if (((u32tmp1 & 0xf000) >> 12) != ((u32tmp1 & 0x0f00) >> 8)) {
@@ -2326,7 +2196,6 @@ void halbtc8723d1ant_set_ant_path(IN struct btc_coexist *btcoexist,
 		coex_sta->gnt_error_cnt++;
 	}
 
-#if BT_8723D_1ANT_COEX_DBG
 	u32tmp2 = halbtc8723d1ant_ltecoex_indirect_read_reg(btcoexist, 0x54);
 	u16tmp0 = btcoexist->btc_read_2byte(btcoexist, 0xaa);
 	u16tmp1 = btcoexist->btc_read_2byte(btcoexist, 0x948);
@@ -2349,7 +2218,7 @@ void halbtc8723d1ant_set_ant_path(IN struct btc_coexist *btcoexist,
 	if (!force_exec) {
 		if (coex_dm->cur_ant_pos_type == coex_dm->pre_ant_pos_type) {
 			BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-				"[BTCoex], ********** Skip Antenna Path Setup because no change!!**********\n");
+				"[BTCoex], Skip Antenna Path Setup because no change!!\n");
 			BTC_TRACE(trace_buf);
 			return;
 		}
@@ -2365,19 +2234,8 @@ void halbtc8723d1ant_set_ant_path(IN struct btc_coexist *btcoexist,
 						   0x80, 0x0);
 
 		/* set Path control owner to WL at initial step */
-		halbtc8723d1ant_ltecoex_pathcontrol_owner(btcoexist,
-				BT_8723D_1ANT_PCO_BTSIDE);
-
-		/* set GNT_BT to SW high */
-		halbtc8723d1ant_ltecoex_set_gnt_bt(btcoexist,
-					   BT_8723D_1ANT_GNT_BLOCK_RFC_BB,
-					   BT_8723D_1ANT_GNT_TYPE_CTRL_BY_SW,
-					   BT_8723D_1ANT_SIG_STA_SET_TO_HIGH);
-		/* Set GNT_WL to SW low */
-		halbtc8723d1ant_ltecoex_set_gnt_wl(btcoexist,
-					   BT_8723D_1ANT_GNT_BLOCK_RFC_BB,
-					   BT_8723D_1ANT_GNT_TYPE_CTRL_BY_SW,
-					   BT_8723D_1ANT_SIG_STA_SET_TO_HIGH);
+		halbtc8723d1ant_coex_ctrl_owner(btcoexist,
+						BT_8723D_1ANT_PCO_BTSIDE);
 
 		if (BTC_ANT_PATH_AUTO == ant_pos_type)
 			ant_pos_type = BTC_ANT_PATH_BT;
@@ -2386,18 +2244,26 @@ void halbtc8723d1ant_set_ant_path(IN struct btc_coexist *btcoexist,
 
 		break;
 	case BT_8723D_1ANT_PHASE_COEX_INIT:
-		/* Disable LTE Coex Function in WiFi side (this should be on if LTE coex is required) */
+		/* Disable LTE Coex Function in WiFi side
+		 *(this should be on if LTE coex is required)
+		 */
 		halbtc8723d1ant_ltecoex_enable(btcoexist, 0x0);
 
-		/* GNT_WL_LTE always = 1 (this should be config if LTE coex is required) */
+		/* GNT_WL_LTE always = 1
+		 *(this should be config if LTE coex is required)
+		 */
 		halbtc8723d1ant_ltecoex_set_coex_table(btcoexist,
 				       BT_8723D_1ANT_CTT_WL_VS_LTE, 0xffff);
 
-		/* GNT_BT_LTE always = 1 (this should be config if LTE coex is required) */
+		/* GNT_BT_LTE always = 1
+		 *(this should be config if LTE coex is required)
+		 */
 		halbtc8723d1ant_ltecoex_set_coex_table(btcoexist,
 				       BT_8723D_1ANT_CTT_BT_VS_LTE, 0xffff);
 
-		/* Wait If BT IQK running, because Path control owner is at BT during BT IQK (setup by WiFi firmware) */
+		/* Wait If BT IQK running, because Path control owner is
+		 *at BT during BT IQK (setup by WiFi firmware)
+		 */
 		while (cnt_bt_cal_chk <= 20) {
 			u8tmp0 = btcoexist->btc_read_1byte(btcoexist,
 							   0x49d);
@@ -2405,14 +2271,14 @@ void halbtc8723d1ant_set_ant_path(IN struct btc_coexist *btcoexist,
 			if (u8tmp0 & BIT(0)) {
 				BTC_SPRINTF(trace_buf,
 					    BT_TMP_BUF_SIZE,
-					"[BTCoex], ########### BT is calibrating (wait cnt=%d) ###########\n",
+					    "[BTCoex],  BT is calibrating (wait cnt=%d)\n",
 					    cnt_bt_cal_chk);
 				BTC_TRACE(trace_buf);
 				delay_ms(50);
 			} else {
 				BTC_SPRINTF(trace_buf,
 					    BT_TMP_BUF_SIZE,
-					"[BTCoex], ********** WL is NOT calibrating (wait cnt=%d)**********\n",
+					    "[BTCoex], WL is NOT calibrating (wait cnt=%d)\n",
 					    cnt_bt_cal_chk);
 				BTC_TRACE(trace_buf);
 				break;
@@ -2420,12 +2286,11 @@ void halbtc8723d1ant_set_ant_path(IN struct btc_coexist *btcoexist,
 		}
 
 		/* Set Path control to WL */
-		btcoexist->btc_write_1byte_bitmask(btcoexist, 0x67,
-						   0x80, 0x1);
+		btcoexist->btc_write_1byte_bitmask(btcoexist, 0x67, 0x80, 0x1);
 
 		/* set Path control owner to WL at initial step */
-		halbtc8723d1ant_ltecoex_pathcontrol_owner(btcoexist,
-				BT_8723D_1ANT_PCO_WLSIDE);
+		halbtc8723d1ant_coex_ctrl_owner(btcoexist,
+						BT_8723D_1ANT_PCO_WLSIDE);
 
 		/* set GNT_BT to SW high */
 		halbtc8723d1ant_ltecoex_set_gnt_bt(btcoexist,
@@ -2444,24 +2309,29 @@ void halbtc8723d1ant_set_ant_path(IN struct btc_coexist *btcoexist,
 		coex_sta->run_time_state = FALSE;
 		break;
 	case BT_8723D_1ANT_PHASE_WLANONLY_INIT:
-		/* Disable LTE Coex Function in WiFi side (this should be on if LTE coex is required) */
+		/* Disable LTE Coex Function in WiFi side
+		 *(this should be on if LTE coex is required)
+		 */
 		halbtc8723d1ant_ltecoex_enable(btcoexist, 0x0);
 
-		/* GNT_WL_LTE always = 1 (this should be config if LTE coex is required) */
+		/* GNT_WL_LTE always = 1
+		 *(this should be config if LTE coex is required)
+		 */
 		halbtc8723d1ant_ltecoex_set_coex_table(btcoexist,
 				       BT_8723D_1ANT_CTT_WL_VS_LTE, 0xffff);
 
-		/* GNT_BT_LTE always = 1 (this should be config if LTE coex is required) */
+		/* GNT_BT_LTE always = 1
+		 *(this should be config if LTE coex is required)
+		 */
 		halbtc8723d1ant_ltecoex_set_coex_table(btcoexist,
 				       BT_8723D_1ANT_CTT_BT_VS_LTE, 0xffff);
 
 		/* Set Path control to WL */
-		btcoexist->btc_write_1byte_bitmask(btcoexist, 0x67,
-						   0x80, 0x1);
+		btcoexist->btc_write_1byte_bitmask(btcoexist, 0x67, 0x80, 0x1);
 
 		/* set Path control owner to WL at initial step */
-		halbtc8723d1ant_ltecoex_pathcontrol_owner(btcoexist,
-				BT_8723D_1ANT_PCO_WLSIDE);
+		halbtc8723d1ant_coex_ctrl_owner(btcoexist,
+						BT_8723D_1ANT_PCO_WLSIDE);
 
 		/* set GNT_BT to SW low */
 		halbtc8723d1ant_ltecoex_set_gnt_bt(btcoexist,
@@ -2488,10 +2358,12 @@ void halbtc8723d1ant_set_ant_path(IN struct btc_coexist *btcoexist,
 						   0x80, 0x0);
 
 		/* set Path control owner to BT */
-		halbtc8723d1ant_ltecoex_pathcontrol_owner(btcoexist,
-				BT_8723D_1ANT_PCO_BTSIDE);
+		halbtc8723d1ant_coex_ctrl_owner(btcoexist,
+						BT_8723D_1ANT_PCO_BTSIDE);
 
-		/*halbtc8723d1ant_ignore_wlan_act(btcoexist, FORCE_EXEC, TRUE);*/
+		/* halbtc8723d1ant_ignore_wlan_act
+		 * (btcoexist, FORCE_EXEC, TRUE);
+		 */
 
 		if (BTC_ANT_PATH_AUTO == ant_pos_type)
 			ant_pos_type = BTC_ANT_PATH_BT;
@@ -2502,24 +2374,22 @@ void halbtc8723d1ant_set_ant_path(IN struct btc_coexist *btcoexist,
 
 		/* wait for WL/BT IQK finish, keep 0x38 = 0xff00 for WL IQK */
 		while (cnt_bt_cal_chk <= 20) {
-			u8tmp0 = btcoexist->btc_read_1byte(btcoexist,
-							   0x1e6);
+			u8tmp0 = btcoexist->btc_read_1byte(btcoexist, 0x1e6);
 
-			u8tmp1 = btcoexist->btc_read_1byte(btcoexist,
-							   0x49d);
+			u8tmp1 = btcoexist->btc_read_1byte(btcoexist, 0x49d);
 
 			cnt_bt_cal_chk++;
 			if ((u8tmp0 & BIT(0)) || (u8tmp1 & BIT(0))) {
 				BTC_SPRINTF(trace_buf,
 					    BT_TMP_BUF_SIZE,
-					"[BTCoex], ########### WL or BT is IQK (wait cnt=%d)\n",
+					    "[BTCoex], ########### WL or BT is IQK (wait cnt=%d)\n",
 					    cnt_bt_cal_chk);
 				BTC_TRACE(trace_buf);
 				delay_ms(50);
 			} else {
 				BTC_SPRINTF(trace_buf,
 					    BT_TMP_BUF_SIZE,
-					"[BTCoex], ********** WL and BT is NOT IQK (wait cnt=%d)\n",
+					    "[BTCoex], ********** WL and BT is NOT IQK (wait cnt=%d)\n",
 					    cnt_bt_cal_chk);
 				BTC_TRACE(trace_buf);
 				break;
@@ -2530,8 +2400,8 @@ void halbtc8723d1ant_set_ant_path(IN struct btc_coexist *btcoexist,
 		/* Set Path control to WL */
 		/* btcoexist->btc_write_1byte_bitmask(btcoexist, 0x67, 0x80, 0x1); */
 
-		halbtc8723d1ant_ltecoex_pathcontrol_owner(btcoexist,
-				BT_8723D_1ANT_PCO_WLSIDE);
+		halbtc8723d1ant_coex_ctrl_owner(btcoexist,
+						BT_8723D_1ANT_PCO_WLSIDE);
 
 		/* set GNT_BT to PTA */
 		halbtc8723d1ant_ltecoex_set_gnt_bt(btcoexist,
@@ -2550,12 +2420,11 @@ void halbtc8723d1ant_set_ant_path(IN struct btc_coexist *btcoexist,
 		coex_sta->run_time_state = TRUE;
 		break;
 	case BT_8723D_1ANT_PHASE_BTMPMODE:
-		halbtc8723d1ant_ltecoex_pathcontrol_owner(btcoexist,
-				BT_8723D_1ANT_PCO_WLSIDE);
+		halbtc8723d1ant_coex_ctrl_owner(btcoexist,
+						BT_8723D_1ANT_PCO_WLSIDE);
 
 		/* Set Path control to WL */
-		btcoexist->btc_write_1byte_bitmask(btcoexist, 0x67,
-						   0x80, 0x1);
+		btcoexist->btc_write_1byte_bitmask(btcoexist, 0x67, 0x80, 0x1);
 
 		/* set GNT_BT to high */
 		halbtc8723d1ant_ltecoex_set_gnt_bt(btcoexist,
@@ -2574,12 +2443,11 @@ void halbtc8723d1ant_set_ant_path(IN struct btc_coexist *btcoexist,
 		coex_sta->run_time_state = FALSE;
 		break;
 	case BT_8723D_1ANT_PHASE_ANTENNA_DET:
-		halbtc8723d1ant_ltecoex_pathcontrol_owner(btcoexist,
-				BT_8723D_1ANT_PCO_WLSIDE);
+		halbtc8723d1ant_coex_ctrl_owner(btcoexist,
+						BT_8723D_1ANT_PCO_WLSIDE);
 
 		/* Set Path control to WL */
-		btcoexist->btc_write_1byte_bitmask(btcoexist, 0x67,
-						   0x80, 0x1);
+		btcoexist->btc_write_1byte_bitmask(btcoexist, 0x67, 0x80, 0x1);
 
 		/* set GNT_BT to high */
 		halbtc8723d1ant_ltecoex_set_gnt_bt(btcoexist,
@@ -2612,7 +2480,8 @@ void halbtc8723d1ant_set_ant_path(IN struct btc_coexist *btcoexist,
 			btcoexist->btc_write_2byte(btcoexist, 0x948, 0x40);
 
 	else if ((is_hw_ant_div_on == FALSE) &&
-		(phase != BT_8723D_1ANT_PHASE_WLAN_OFF)) {  /* internal switch setting */
+		(phase != BT_8723D_1ANT_PHASE_WLAN_OFF)) {
+		/* internal switch setting */
 
 		switch (ant_pos_type) {
 
@@ -2620,34 +2489,32 @@ void halbtc8723d1ant_set_ant_path(IN struct btc_coexist *btcoexist,
 			if (board_info->btdm_ant_pos ==
 			    BTC_ANTENNA_AT_MAIN_PORT)
 
-				btcoexist->btc_write_2byte(
-					btcoexist, 0x948, 0x0);
+				btcoexist->btc_write_2byte(btcoexist,
+							   0x948, 0x0);
 			else
-				btcoexist->btc_write_2byte(
-					btcoexist, 0x948, 0x280);
+				btcoexist->btc_write_2byte(btcoexist,
+							   0x948, 0x280);
 
 			break;
 		case BTC_ANT_PATH_BT:
 			if (board_info->btdm_ant_pos ==
 			    BTC_ANTENNA_AT_MAIN_PORT)
-
-				btcoexist->btc_write_2byte(
-					btcoexist, 0x948, 0x280);
+				btcoexist->btc_write_2byte(btcoexist,
+							   0x948, 0x280);
 			else
-				btcoexist->btc_write_2byte(
-					btcoexist, 0x948, 0x0);
+				btcoexist->btc_write_2byte(btcoexist,
+							   0x948, 0x0);
 
 			break;
 		default:
 		case BTC_ANT_PATH_PTA:
 			if (board_info->btdm_ant_pos ==
 			    BTC_ANTENNA_AT_MAIN_PORT)
-				btcoexist->btc_write_2byte(
-					btcoexist, 0x948,
-					0x200);
+				btcoexist->btc_write_2byte(btcoexist,
+							   0x948, 0x200);
 			else
-				btcoexist->btc_write_2byte(
-					btcoexist, 0x948, 0x80);
+				btcoexist->btc_write_2byte(btcoexist,
+							   0x948, 0x80);
 			break;
 		}
 	}
@@ -2662,19 +2529,19 @@ void halbtc8723d1ant_set_ant_path(IN struct btc_coexist *btcoexist,
 	u8tmp0 =  btcoexist->btc_read_1byte(btcoexist, 0x67);
 
 	BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-		"[BTCoex], ********** 0x67 = 0x%x, 0x948 = 0x%x, 0x73 = 0x%x(After Set Ant Pat)\n",
+		    "[BTCoex], 0x67 = 0x%x, 0x948 = 0x%x, 0x73 = 0x%x(After Set Ant Pat)\n",
 		    u8tmp0, u16tmp1, u8tmp1);
 	BTC_TRACE(trace_buf);
 
 	BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-		"[BTCoex], **********0x38= 0x%x, 0x54= 0x%x, 0xaa = 0x%x(After Set Ant Path)\n",
+		    "[BTCoex], 0x38= 0x%x, 0x54= 0x%x, 0xaa = 0x%x(After Set Ant Path)\n",
 		    u32tmp1, u32tmp2, u16tmp0);
 	BTC_TRACE(trace_buf);
 #endif
 
 }
 
-
+static
 boolean halbtc8723d1ant_is_common_action(IN struct btc_coexist *btcoexist)
 {
 	boolean			common = FALSE, wifi_connected = FALSE, wifi_busy = FALSE;
@@ -2741,6 +2608,7 @@ boolean halbtc8723d1ant_is_common_action(IN struct btc_coexist *btcoexist)
  *	Non-Software Coex Mechanism start
  *
  * ********************************************* */
+static
 void halbtc8723d1ant_action_bt_whql_test(IN struct btc_coexist *btcoexist)
 {
 	halbtc8723d1ant_set_ant_path(btcoexist, BTC_ANT_PATH_AUTO, NORMAL_EXEC,
@@ -2749,24 +2617,26 @@ void halbtc8723d1ant_action_bt_whql_test(IN struct btc_coexist *btcoexist)
 	halbtc8723d1ant_ps_tdma(btcoexist, NORMAL_EXEC, FALSE, 8);
 }
 
+static
 void halbtc8723d1ant_action_bt_hs(IN struct btc_coexist *btcoexist)
 {
 	halbtc8723d1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 2);
 	halbtc8723d1ant_ps_tdma(btcoexist, NORMAL_EXEC, TRUE, 5);
 }
 
+static
 void halbtc8723d1ant_action_bt_relink(IN struct btc_coexist *btcoexist)
 {
 	struct  btc_bt_link_info *bt_link_info = &btcoexist->bt_link_info;
 
-	if (((!coex_sta->is_bt_multi_link) && (!bt_link_info->pan_exist)) ||
-		((bt_link_info->a2dp_exist) && (bt_link_info->hid_exist))) {
-
-		halbtc8723d1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 1);
-		halbtc8723d1ant_ps_tdma(btcoexist, NORMAL_EXEC, TRUE, 5);
+	if ((!coex_sta->is_bt_multi_link && !bt_link_info->pan_exist) ||
+	    (bt_link_info->a2dp_exist && bt_link_info->hid_exist)) {
+		halbtc8723d1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 0);
+		halbtc8723d1ant_ps_tdma(btcoexist, NORMAL_EXEC, FALSE, 8);
 	}
 }
 
+static
 void halbtc8723d1ant_action_bt_idle(IN struct btc_coexist *btcoexist)
 {
 	boolean wifi_busy = FALSE;
@@ -2778,12 +2648,9 @@ void halbtc8723d1ant_action_bt_idle(IN struct btc_coexist *btcoexist)
 		halbtc8723d1ant_ps_tdma(btcoexist, NORMAL_EXEC, TRUE, 6);
 	} else {
 	/* if wl busy */
-	if (BT_8723D_1ANT_BT_STATUS_NON_CONNECTED_IDLE ==
-		coex_dm->bt_status) {
-		halbtc8723d1ant_coex_table_with_type(btcoexist,
-							     NORMAL_EXEC, 8);
-
-		halbtc8723d1ant_ps_tdma(btcoexist, NORMAL_EXEC, TRUE, 33);
+	if (BT_8723D_1ANT_BT_STATUS_NON_CONNECTED_IDLE == coex_dm->bt_status) {
+		halbtc8723d1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 8);
+		halbtc8723d1ant_ps_tdma(btcoexist, NORMAL_EXEC, TRUE, 34);
 	} else {
 		halbtc8723d1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 8);
 		halbtc8723d1ant_ps_tdma(btcoexist, NORMAL_EXEC, TRUE, 32);
@@ -2792,6 +2659,7 @@ void halbtc8723d1ant_action_bt_idle(IN struct btc_coexist *btcoexist)
 
 }
 
+static
 void halbtc8723d1ant_action_bt_inquiry(IN struct btc_coexist *btcoexist)
 {
 	struct	btc_bt_link_info *bt_link_info = &btcoexist->bt_link_info;
@@ -2807,48 +2675,53 @@ void halbtc8723d1ant_action_bt_inquiry(IN struct btc_coexist *btcoexist)
 	btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_LINK, &wifi_link);
 	btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_ROAM, &wifi_roam);
 
-
-	if ((coex_sta->bt_create_connection) && ((wifi_link) || (wifi_roam)
-		|| (wifi_scan) || (coex_sta->wifi_is_high_pri_task))) {
-
+	if (coex_sta->bt_create_connection &&
+	    (coex_sta->wifi_is_high_pri_task || coex_sta->wifi_in_scan_task)) {
 		BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-			"[BTCoex], Wifi link/roam/Scan/busy/hi-pri-task + BT Inq/Page!!\n");
+			"[BTCoex], Wifi Scan/hi-pri-task + BT Inq/Page!!\n");
 		BTC_TRACE(trace_buf);
 
-		halbtc8723d1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 1);
-
-		if ((bt_link_info->a2dp_exist) && (!bt_link_info->pan_exist))
+		if (bt_link_info->a2dp_exist && !bt_link_info->pan_exist) {
+			halbtc8723d1ant_coex_table_with_type(btcoexist,
+							     NORMAL_EXEC, 1);
 			halbtc8723d1ant_ps_tdma(btcoexist, NORMAL_EXEC, TRUE, 17);
-		else
-			halbtc8723d1ant_ps_tdma(btcoexist, NORMAL_EXEC, TRUE, 33);
-		} else if ((!wifi_connected) && (!wifi_scan)) {
-
+		} else if (coex_sta->wifi_is_high_pri_task) {
+			halbtc8723d1ant_coex_table_with_type(btcoexist,
+							     NORMAL_EXEC, 16);
+			halbtc8723d1ant_ps_tdma(btcoexist,
+						NORMAL_EXEC, TRUE, 36);
+		} else if (coex_sta->wifi_in_scan_task) {
+			halbtc8723d1ant_coex_table_with_type(btcoexist,
+							     NORMAL_EXEC, 1);
+			halbtc8723d1ant_ps_tdma(btcoexist,
+						NORMAL_EXEC, TRUE, 33);
+		}
+	} else if (!wifi_connected && !wifi_scan) {
 		halbtc8723d1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 0);
 
 		halbtc8723d1ant_ps_tdma(btcoexist, NORMAL_EXEC, FALSE, 8);
 	} else if (bt_link_info->pan_exist) {
-
 		halbtc8723d1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 4);
 
 		halbtc8723d1ant_ps_tdma(btcoexist, NORMAL_EXEC, TRUE, 22);
 	} else if (bt_link_info->a2dp_exist) {
-
 		halbtc8723d1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 4);
 
 		halbtc8723d1ant_ps_tdma(btcoexist, NORMAL_EXEC, TRUE, 16);
 	} else {
-
 		halbtc8723d1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 4);
 
-		if ((wifi_link) || (wifi_roam) || (wifi_scan) ||
-			(coex_sta->wifi_is_high_pri_task))
-			halbtc8723d1ant_ps_tdma(btcoexist, NORMAL_EXEC, TRUE, 21);
+		if (coex_sta->wifi_in_scan_task ||
+		    coex_sta->wifi_is_high_pri_task)
+			halbtc8723d1ant_ps_tdma(btcoexist,
+						NORMAL_EXEC, TRUE, 21);
 		else
-			halbtc8723d1ant_ps_tdma(btcoexist, NORMAL_EXEC, TRUE, 23);
+			halbtc8723d1ant_ps_tdma(btcoexist,
+						NORMAL_EXEC, TRUE, 23);
 	}
 }
 
-
+static
 void halbtc8723d1ant_action_bt_sco_hid_only_busy(IN struct btc_coexist
 		*btcoexist)
 {
@@ -2868,50 +2741,75 @@ void halbtc8723d1ant_action_bt_sco_hid_only_busy(IN struct btc_coexist
 	if (bt_link_info->sco_exist) {
 		if (coex_sta->is_bt_multi_link) {
 			if (coex_sta->specific_pkt_period_cnt > 0)
-				halbtc8723d1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 15);
+				halbtc8723d1ant_coex_table_with_type(btcoexist,
+								     FALSE,
+								     15);
 			else
-				halbtc8723d1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 3);
-			halbtc8723d1ant_ps_tdma(btcoexist, NORMAL_EXEC, TRUE, 25);
+				halbtc8723d1ant_coex_table_with_type(btcoexist,
+								     FALSE,
+								     3);
+			halbtc8723d1ant_ps_tdma(btcoexist,
+						NORMAL_EXEC, TRUE, 25);
 		} else {
-		halbtc8723d1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 1);
-		halbtc8723d1ant_ps_tdma(btcoexist, NORMAL_EXEC, TRUE, 5);
+			halbtc8723d1ant_coex_table_with_type(btcoexist,
+							     NORMAL_EXEC, 1);
+			halbtc8723d1ant_ps_tdma(btcoexist,
+						NORMAL_EXEC, TRUE, 5);
 		}
 	} else if (coex_sta->is_hid_rcu) {
 		halbtc8723d1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 3);
 
 		if (wifi_busy)
-			halbtc8723d1ant_ps_tdma(btcoexist, NORMAL_EXEC, TRUE, 36);
+			halbtc8723d1ant_ps_tdma(btcoexist,
+						NORMAL_EXEC, TRUE, 36);
 		else
-			halbtc8723d1ant_ps_tdma(btcoexist, NORMAL_EXEC, TRUE, 6);
+			halbtc8723d1ant_ps_tdma(btcoexist,
+						NORMAL_EXEC, TRUE, 6);
 	} else {
 
-		if ((wifi_cckdeadlock_ap) && (coex_sta->is_hid_low_pri_tx_overhead)) {
-
+		if (wifi_cckdeadlock_ap &&
+		    coex_sta->is_hid_low_pri_tx_overhead) {
 			if (coex_sta->hid_busy_num < 2)
-				halbtc8723d1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 14);
+				halbtc8723d1ant_coex_table_with_type(btcoexist,
+								     FALSE,
+								     14);
 			else
-				halbtc8723d1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 13);
-			halbtc8723d1ant_ps_tdma(btcoexist, NORMAL_EXEC, TRUE, 18);
+				halbtc8723d1ant_coex_table_with_type(btcoexist,
+								     FALSE,
+								     13);
+			halbtc8723d1ant_ps_tdma(btcoexist,
+						NORMAL_EXEC, TRUE, 18);
 		} else if (coex_sta->is_hid_low_pri_tx_overhead) {
 			if (coex_sta->hid_busy_num < 2)
-				halbtc8723d1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 3);
+				halbtc8723d1ant_coex_table_with_type(btcoexist,
+								     FALSE,
+								     3);
 			else
-				halbtc8723d1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 6);
-			halbtc8723d1ant_ps_tdma(btcoexist, NORMAL_EXEC, TRUE, 18);
+				halbtc8723d1ant_coex_table_with_type(btcoexist,
+								     FALSE,
+								     6);
+			halbtc8723d1ant_ps_tdma(btcoexist,
+						NORMAL_EXEC, TRUE, 18);
 		} else if (coex_sta->hid_busy_num < 2) {
-			halbtc8723d1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 3);
-			halbtc8723d1ant_ps_tdma(btcoexist, NORMAL_EXEC, TRUE, 11);
+			halbtc8723d1ant_coex_table_with_type(btcoexist,
+							     NORMAL_EXEC, 3);
+			halbtc8723d1ant_ps_tdma(btcoexist,
+						NORMAL_EXEC, TRUE, 11);
 		} else if (wifi_bw == 0) { /* if 11bg mode */
-			halbtc8723d1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 11);
-			halbtc8723d1ant_ps_tdma(btcoexist, NORMAL_EXEC, TRUE, 11);
+			halbtc8723d1ant_coex_table_with_type(btcoexist,
+							     NORMAL_EXEC, 11);
+			halbtc8723d1ant_ps_tdma(btcoexist,
+						NORMAL_EXEC, TRUE, 11);
 		} else {
-			halbtc8723d1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 6);
-			halbtc8723d1ant_ps_tdma(btcoexist, NORMAL_EXEC, TRUE, 11);
+			halbtc8723d1ant_coex_table_with_type(btcoexist,
+							     NORMAL_EXEC, 6);
+			halbtc8723d1ant_ps_tdma(btcoexist,
+						NORMAL_EXEC, TRUE, 11);
 		}
 	}
 }
 
-
+static
 void halbtc8723d1ant_action_wifi_only(IN struct btc_coexist *btcoexist)
 {
 	halbtc8723d1ant_set_ant_path(btcoexist, BTC_ANT_PATH_AUTO, FORCE_EXEC,
@@ -2920,67 +2818,54 @@ void halbtc8723d1ant_action_wifi_only(IN struct btc_coexist *btcoexist)
 	halbtc8723d1ant_ps_tdma(btcoexist, FORCE_EXEC, FALSE, 8);
 }
 
+static
 void halbtc8723d1ant_action_wifi_native_lps(IN struct btc_coexist *btcoexist)
 {
-	halbtc8723d1ant_coex_table_with_type(btcoexist,
-					     NORMAL_EXEC, 5);
-	halbtc8723d1ant_ps_tdma(btcoexist, NORMAL_EXEC, FALSE, 8);
-}
-
-void halbtc8723d1ant_action_wifi_cck_dead_lock(IN struct btc_coexist *btcoexist)
-{
 	struct  btc_bt_link_info *bt_link_info = &btcoexist->bt_link_info;
 
-	if ((bt_link_info->hid_exist) && (bt_link_info->a2dp_exist) &&
-		(!bt_link_info->pan_exist)) {
-
-		if ((coex_sta->cck_lock) || (coex_sta->cck_lock_warn)) {
-			halbtc8723d1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 13);
-			halbtc8723d1ant_ps_tdma(btcoexist, NORMAL_EXEC, TRUE, 28);
-		} else {
-
-			halbtc8723d1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 13);
-			halbtc8723d1ant_ps_tdma(btcoexist, NORMAL_EXEC, TRUE, 8);
-		}
-	}
+	if (bt_link_info->pan_exist)
+		halbtc8723d1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 5);
+	else
+		halbtc8723d1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 0);
+	halbtc8723d1ant_ps_tdma(btcoexist, NORMAL_EXEC, FALSE, 8);
 }
 
+static
 void halbtc8723d1ant_action_wifi_multi_port(IN struct btc_coexist *btcoexist)
 {
 	struct  btc_bt_link_info *bt_link_info = &btcoexist->bt_link_info;
 	u8 multi_port_type;
+	u32 traffic_dir;
+	static u8	prewifi_rssi_state = BTC_RSSI_STATE_LOW;
 
 	halbtc8723d1ant_set_ant_path(btcoexist, BTC_ANT_PATH_AUTO, NORMAL_EXEC,
 				     BT_8723D_1ANT_PHASE_2G_RUNTIME);
-
-	btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_DUAL_BAND_CONNECTED, &multi_port_type);
-
-	if (multi_port_type == BTC_MULTIPORT_SCC) {
-		if (bt_link_info->a2dp_exist) {
-			halbtc8723d1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 1);
-			halbtc8723d1ant_ps_tdma(btcoexist, NORMAL_EXEC, TRUE, 17);
-		} else if (bt_link_info->pan_exist) {
-			halbtc8723d1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 1);
-			halbtc8723d1ant_ps_tdma(btcoexist, NORMAL_EXEC, TRUE, 33);
+	btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_TRAFFIC_DIRECTION,
+			   &traffic_dir);
+
+	if (coex_dm->bt_status == BT_8723D_1ANT_BT_STATUS_NON_CONNECTED_IDLE ||
+	    coex_dm->bt_status == BT_8723D_1ANT_BT_STATUS_CONNECTED_IDLE) {
+		if (traffic_dir == BTC_WIFI_TRAFFIC_RX) {
+			halbtc8723d1ant_coex_table_with_type(btcoexist, FALSE,
+							     18);
+			halbtc8723d1ant_ps_tdma(btcoexist, NORMAL_EXEC, TRUE,
+						33);
 		} else {
-			halbtc8723d1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 7);
-			halbtc8723d1ant_ps_tdma(btcoexist, NORMAL_EXEC, FALSE, 8);
+			halbtc8723d1ant_coex_table_with_type(btcoexist, FALSE,
+							     17);
+			halbtc8723d1ant_ps_tdma(btcoexist, NORMAL_EXEC, FALSE,
+						8);
 		}
-	} else  {
-		if ((BT_8723D_1ANT_BT_STATUS_NON_CONNECTED_IDLE ==
-			coex_dm->bt_status) ||
-			(BT_8723D_1ANT_BT_STATUS_CONNECTED_IDLE ==
-			coex_dm->bt_status))
-			halbtc8723d1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 7);
-		else if (!bt_link_info->pan_exist)
-			halbtc8723d1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 7);
-		else
-			halbtc8723d1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 2);
-
+	} else if (!bt_link_info->pan_exist) {
+		halbtc8723d1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 7);
+		halbtc8723d1ant_ps_tdma(btcoexist, NORMAL_EXEC, FALSE, 8);
+	} else {
+		halbtc8723d1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 2);
 		halbtc8723d1ant_ps_tdma(btcoexist, NORMAL_EXEC, FALSE, 8);
 	}
 }
 
+static
 void halbtc8723d1ant_action_wifi_linkscan_process(IN struct btc_coexist
 		*btcoexist)
 {
@@ -2996,132 +2881,156 @@ void halbtc8723d1ant_action_wifi_linkscan_process(IN struct btc_coexist
 		halbtc8723d1ant_ps_tdma(btcoexist, NORMAL_EXEC, TRUE, 21);
 }
 
+static
 void halbtc8723d1ant_action_wifi_connected_bt_acl_busy(IN struct btc_coexist
 		*btcoexist)
 {
 	struct	btc_bt_link_info *bt_link_info = &btcoexist->bt_link_info;
 	boolean wifi_busy = FALSE, wifi_turbo = FALSE, wifi_cckdeadlock_ap = FALSE;
-	u32  wifi_bw = 1;
-	u8	iot_peer = BTC_IOT_PEER_UNKNOWN;
+	u32	wifi_bw = 1;
+	u8	iot_peer = BTC_IOT_PEER_UNKNOWN, table_case;
 
 	btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw);
 	btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_BUSY, &wifi_busy);
-	btcoexist->btc_get(btcoexist, BTC_GET_U1_AP_NUM, &coex_sta->scan_ap_num);
+	btcoexist->btc_get(btcoexist, BTC_GET_U1_AP_NUM,
+			   &coex_sta->scan_ap_num);
 	btcoexist->btc_get(btcoexist, BTC_GET_U1_IOT_PEER, &iot_peer);
 
 	BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-		"############# [BTCoex],  scan_ap_num = %d, wl_noisy_level = %d\n",
-			coex_sta->scan_ap_num, coex_sta->wl_noisy_level);
+		    "############# [BTCoex],  scan_ap_num = %d, wl_noisy_level = %d\n",
+		    coex_sta->scan_ap_num, coex_sta->wl_noisy_level);
 	BTC_TRACE(trace_buf);
 
-	if ((wifi_busy) && (coex_sta->wl_noisy_level == 0))
+	if (wifi_busy && coex_sta->wl_noisy_level == 0)
 		wifi_turbo = TRUE;
 
-	if ((iot_peer == BTC_IOT_PEER_ATHEROS) && (coex_sta->cck_lock_ever))
+	if (coex_sta->cck_lock_ever)
 		wifi_cckdeadlock_ap = TRUE;
 
-	if ((bt_link_info->a2dp_exist) && (coex_sta->is_bt_a2dp_sink)) {
-
+	if (bt_link_info->a2dp_exist && coex_sta->is_bt_a2dp_sink) {
 		if (wifi_cckdeadlock_ap)
-			halbtc8723d1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 13);
+			table_case = 13;
 		else
-			halbtc8723d1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 6);
-
-		halbtc8723d1ant_ps_tdma(btcoexist, NORMAL_EXEC, TRUE, 12);
+			table_case = 6;
+		halbtc8723d1ant_coex_table_with_type(btcoexist,
+						     NORMAL_EXEC, table_case);
+		halbtc8723d1ant_ps_tdma(btcoexist, NORMAL_EXEC, TRUE, 15);
 	} else if (bt_link_info->a2dp_only) { /* A2DP		 */
 
 		if (wifi_cckdeadlock_ap)
-			halbtc8723d1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 13);
+			table_case = 13;
 		else if (wifi_turbo)
-			halbtc8723d1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 8);
+			table_case = 8;
 		else
-			halbtc8723d1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 4);
+			table_case = 4;
+
+		halbtc8723d1ant_coex_table_with_type(btcoexist,
+						     NORMAL_EXEC, table_case);
 
 		if (coex_sta->connect_ap_period_cnt > 0)
-			halbtc8723d1ant_ps_tdma(btcoexist, NORMAL_EXEC, TRUE, 26);
+			halbtc8723d1ant_ps_tdma(btcoexist,
+						NORMAL_EXEC, TRUE, 26);
 		else
-			halbtc8723d1ant_ps_tdma(btcoexist, NORMAL_EXEC, TRUE, 7);
+			halbtc8723d1ant_ps_tdma(btcoexist,
+						NORMAL_EXEC, TRUE, 7);
 
-	} else if (((bt_link_info->a2dp_exist) &&
-			(bt_link_info->pan_exist)) ||
+	} else if ((bt_link_info->a2dp_exist &&
+			bt_link_info->pan_exist) ||
 			(bt_link_info->hid_exist && bt_link_info->a2dp_exist &&
-		bt_link_info->pan_exist)) { /* A2DP+PAN(OPP,FTP), HID+A2DP+PAN(OPP,FTP) */
-
+			bt_link_info->pan_exist)) {
+		/* A2DP+PAN(OPP,FTP), HID+A2DP+PAN(OPP,FTP) */
 		if (wifi_cckdeadlock_ap) {
-			if ((bt_link_info->hid_exist) && (coex_sta->hid_busy_num < 2))
-				halbtc8723d1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 14);
+			if (bt_link_info->hid_exist &&
+			    coex_sta->hid_busy_num < 2)
+				table_case = 14;
 			else
-			halbtc8723d1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 13);
+				table_case = 13;
 		} else if (bt_link_info->hid_exist) {
 			if (coex_sta->hid_busy_num < 2)
-				halbtc8723d1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 3);
+				table_case = 3;
 			else
-			halbtc8723d1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 1);
-		} else if (wifi_turbo)
-			halbtc8723d1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 8);
-		else
-			halbtc8723d1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 4);
+				table_case = 1;
+		} else if (wifi_turbo) {
+			table_case = 8;
+		} else {
+			table_case = 4;
+		}
 
+		halbtc8723d1ant_coex_table_with_type(btcoexist, NORMAL_EXEC,
+						     table_case);
 		if (wifi_busy)
-			halbtc8723d1ant_ps_tdma(btcoexist, NORMAL_EXEC, TRUE, 13);
+			halbtc8723d1ant_ps_tdma(btcoexist, NORMAL_EXEC, TRUE,
+						13);
 		else
-			halbtc8723d1ant_ps_tdma(btcoexist, NORMAL_EXEC, TRUE, 14);
+			halbtc8723d1ant_ps_tdma(btcoexist, NORMAL_EXEC, TRUE,
+						14);
 	} else if (bt_link_info->hid_exist &&
 		   bt_link_info->a2dp_exist) { /* HID+A2DP */
 
 		if (wifi_cckdeadlock_ap) {
-#if 1
 			if (coex_sta->hid_busy_num < 2)
-				halbtc8723d1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 14);
+				table_case = 14;
 			else
-			halbtc8723d1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 13);
+				table_case = 13;
+
+			halbtc8723d1ant_coex_table_with_type(btcoexist,
+							     NORMAL_EXEC,
+							     table_case);
 
 			if (coex_sta->hid_pair_cnt > 1)
-				halbtc8723d1ant_ps_tdma(btcoexist, NORMAL_EXEC, TRUE, 24);
+				halbtc8723d1ant_ps_tdma(btcoexist,
+							NORMAL_EXEC, TRUE, 24);
 			else
-				halbtc8723d1ant_ps_tdma(btcoexist, NORMAL_EXEC, TRUE, 8);
-#endif
-
-#if 0
-			halbtc8723d1ant_action_wifi_cck_dead_lock(btcoexist);
-#endif
+				halbtc8723d1ant_ps_tdma(btcoexist,
+							NORMAL_EXEC, TRUE, 8);
 		} else {
 			if (coex_sta->hid_busy_num < 2) /* 2/18 HID */
-				halbtc8723d1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 3);
+				table_case = 3;
 			else if (wifi_bw == 0)/* if 11bg mode */
-			halbtc8723d1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 12);
+				table_case = 12;
 			else
-			halbtc8723d1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 1);
+				table_case = 1;
+
+			halbtc8723d1ant_coex_table_with_type(btcoexist,
+							     NORMAL_EXEC,
+							     table_case);
 
 			if (coex_sta->hid_pair_cnt > 1)
-				halbtc8723d1ant_ps_tdma(btcoexist, NORMAL_EXEC, TRUE, 24);
+				halbtc8723d1ant_ps_tdma(btcoexist,
+							NORMAL_EXEC, TRUE, 24);
 			else
-			halbtc8723d1ant_ps_tdma(btcoexist, NORMAL_EXEC, TRUE, 8);
+				halbtc8723d1ant_ps_tdma(btcoexist,
+							NORMAL_EXEC, TRUE, 8);
 		}
-
-	} else if ((bt_link_info->pan_only)
+	} else if (bt_link_info->pan_only
 		   || (bt_link_info->hid_exist && bt_link_info->pan_exist)) {
 			/* PAN(OPP,FTP), HID+PAN(OPP,FTP) */
 
 		if (coex_sta->cck_lock_ever) {
-			if ((bt_link_info->hid_exist) && (coex_sta->hid_busy_num < 2))
-				halbtc8723d1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 14);
+			if (bt_link_info->hid_exist &&
+			    coex_sta->hid_busy_num < 2)
+				table_case = 14;
 			else
-				halbtc8723d1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 13);
+				table_case = 13;
 		} else if (bt_link_info->hid_exist) {
 			if (coex_sta->hid_busy_num < 2)
-				halbtc8723d1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 3);
+				table_case = 3;
 			else
-			halbtc8723d1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 1);
-		} else if (wifi_turbo)
-			halbtc8723d1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 8);
-		else
-			halbtc8723d1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 4);
+				table_case = 1;
+		} else if (wifi_turbo) {
+			table_case = 8;
+		} else {
+			table_case = 4;
+		}
 
+		halbtc8723d1ant_coex_table_with_type(btcoexist,
+						     NORMAL_EXEC, table_case);
 		if (!wifi_busy)
-			halbtc8723d1ant_ps_tdma(btcoexist, NORMAL_EXEC, TRUE, 4);
+			halbtc8723d1ant_ps_tdma(btcoexist,
+						NORMAL_EXEC, TRUE, 4);
 		else
-			halbtc8723d1ant_ps_tdma(btcoexist, NORMAL_EXEC, TRUE, 3);
+			halbtc8723d1ant_ps_tdma(btcoexist,
+						NORMAL_EXEC, TRUE, 3);
 	} else {
 		/* BT no-profile busy (0x9) */
 		halbtc8723d1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 4);
@@ -3130,7 +3039,7 @@ void halbtc8723d1ant_action_wifi_connected_bt_acl_busy(IN struct btc_coexist
 
 }
 
-
+static
 void halbtc8723d1ant_action_wifi_not_connected(IN struct btc_coexist *btcoexist)
 {
 	halbtc8723d1ant_set_ant_path(btcoexist, BTC_ANT_PATH_AUTO, NORMAL_EXEC,
@@ -3140,7 +3049,7 @@ void halbtc8723d1ant_action_wifi_not_connected(IN struct btc_coexist *btcoexist)
 	halbtc8723d1ant_ps_tdma(btcoexist, FORCE_EXEC, FALSE, 8);
 }
 
-
+static
 void halbtc8723d1ant_action_wifi_connected(IN struct btc_coexist *btcoexist)
 {
 	struct	btc_bt_link_info *bt_link_info = &btcoexist->bt_link_info;
@@ -3168,7 +3077,7 @@ void halbtc8723d1ant_action_wifi_connected(IN struct btc_coexist *btcoexist)
 		halbtc8723d1ant_action_bt_idle(btcoexist);
 }
 
-
+static
 void halbtc8723d1ant_run_sw_coexist_mechanism(IN struct btc_coexist *btcoexist)
 {
 	u8				algorithm = 0;
@@ -3197,7 +3106,7 @@ void halbtc8723d1ant_run_sw_coexist_mechanism(IN struct btc_coexist *btcoexist)
 			break;
 		case BT_8723D_1ANT_COEX_ALGO_A2DP_PANHS:
 			BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-				"[BTCoex], Action algorithm = A2DP+PAN(HS).\n");
+				    "[BTCoex], Action algorithm = A2DP+PAN(HS).\n");
 			BTC_TRACE(trace_buf);
 			break;
 		case BT_8723D_1ANT_COEX_ALGO_PANEDR:
@@ -3217,12 +3126,12 @@ void halbtc8723d1ant_run_sw_coexist_mechanism(IN struct btc_coexist *btcoexist)
 			break;
 		case BT_8723D_1ANT_COEX_ALGO_PANEDR_HID:
 			BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-				"[BTCoex], Action algorithm = PAN(EDR)+HID.\n");
+				    "[BTCoex], Action algorithm = PAN(EDR)+HID.\n");
 			BTC_TRACE(trace_buf);
 			break;
 		case BT_8723D_1ANT_COEX_ALGO_HID_A2DP_PANEDR:
 			BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-				"[BTCoex], Action algorithm = HID+A2DP+PAN.\n");
+				    "[BTCoex], Action algorithm = HID+A2DP+PAN.\n");
 			BTC_TRACE(trace_buf);
 			break;
 		case BT_8723D_1ANT_COEX_ALGO_HID_A2DP:
@@ -3232,7 +3141,7 @@ void halbtc8723d1ant_run_sw_coexist_mechanism(IN struct btc_coexist *btcoexist)
 			break;
 		default:
 			BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-				"[BTCoex], Action algorithm = coexist All Off!!\n");
+				    "[BTCoex], Action algorithm = coexist All Off!!\n");
 			BTC_TRACE(trace_buf);
 			break;
 		}
@@ -3240,7 +3149,7 @@ void halbtc8723d1ant_run_sw_coexist_mechanism(IN struct btc_coexist *btcoexist)
 	}
 }
 
-
+static
 void halbtc8723d1ant_run_coexist_mechanism(IN struct btc_coexist *btcoexist)
 {
 	struct	btc_bt_link_info *bt_link_info = &btcoexist->bt_link_info;
@@ -3297,15 +3206,14 @@ void halbtc8723d1ant_run_coexist_mechanism(IN struct btc_coexist *btcoexist)
 		return;
 	}
 
-	if (coex_sta->freeze_coexrun_by_btinfo) {
+	if (coex_sta->freeze_coexrun_by_btinfo && !coex_sta->is_setup_link) {
 		BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
 			"[BTCoex], return for freeze_coexrun_by_btinfo\n");
 		BTC_TRACE(trace_buf);
 		return;
 	}
 
-	if ((coex_sta->under_lps) && (!coex_sta->force_lps_ctrl) &&
-		(!coex_sta->acl_busy)) {
+	if (coex_sta->under_lps && !coex_sta->force_lps_ctrl) {
 		BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
 				"[BTCoex], RunCoexistMechanism(), wifi is under LPS !!!\n");
 		BTC_TRACE(trace_buf);
@@ -3328,22 +3236,21 @@ void halbtc8723d1ant_run_coexist_mechanism(IN struct btc_coexist *btcoexist)
 		return;
 	}
 
-	if (coex_sta->c2h_bt_inquiry_page) {
-			BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-					"[BTCoex], BT is under inquiry/page scan !!\n");
-			BTC_TRACE(trace_buf);
-			halbtc8723d1ant_action_bt_inquiry(btcoexist);
-			return;
-	}
-
-	if ((coex_sta->is_setupLink) &&
-		(coex_sta->bt_relink_downcount != 0)) {
+	if (coex_sta->is_setup_link || coex_sta->bt_relink_downcount != 0) {
 		BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
 			"[BTCoex], BT is re-link !!!\n");
 		halbtc8723d1ant_action_bt_relink(btcoexist);
 		return;
 	}
 
+	if (coex_sta->c2h_bt_inquiry_page) {
+		BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
+			    "[BTCoex], BT is under inquiry/page scan !!\n");
+		BTC_TRACE(trace_buf);
+		halbtc8723d1ant_action_bt_inquiry(btcoexist);
+		return;
+	}
+
 	if ((BT_8723D_1ANT_BT_STATUS_ACL_BUSY == coex_dm->bt_status) ||
 		(BT_8723D_1ANT_BT_STATUS_SCO_BUSY == coex_dm->bt_status) ||
 		(BT_8723D_1ANT_BT_STATUS_ACL_SCO_BUSY == coex_dm->bt_status))
@@ -3364,10 +3271,6 @@ void halbtc8723d1ant_run_coexist_mechanism(IN struct btc_coexist *btcoexist)
 				num_of_wifi_link, wifi_link_status);
 		BTC_TRACE(trace_buf);
 
-#if 0
-		halbtc8723d1ant_limited_rx(btcoexist, NORMAL_EXEC, FALSE,
-					FALSE, 0x5);
-#endif
 		if (scan || link || roam || under_4way) {
 			BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
 				"[BTCoex], scan = %d, link = %d, roam = %d 4way = %d!!!\n",
@@ -3396,8 +3299,8 @@ void halbtc8723d1ant_run_coexist_mechanism(IN struct btc_coexist *btcoexist)
 
 	btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw);
 	btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_CONNECTED,
-				&wifi_connected);
-
+			   &wifi_connected);
+#if 0
 	if ((bt_link_info->bt_link_exist) && (wifi_connected)) {
 
 		btcoexist->btc_get(btcoexist, BTC_GET_U1_IOT_PEER, &iot_peer);
@@ -3412,7 +3315,7 @@ void halbtc8723d1ant_run_coexist_mechanism(IN struct btc_coexist *btcoexist)
 						NORMAL_EXEC, FALSE, TRUE, 0x8);
 			}
 	}
-
+#endif
 	halbtc8723d1ant_run_sw_coexist_mechanism(
 			btcoexist);  /* just print debug message */
 
@@ -3426,10 +3329,9 @@ void halbtc8723d1ant_run_coexist_mechanism(IN struct btc_coexist *btcoexist)
 		return;
 	}
 
-	if ((BT_8723D_1ANT_BT_STATUS_NON_CONNECTED_IDLE ==
-		coex_dm->bt_status) ||
-		(BT_8723D_1ANT_BT_STATUS_CONNECTED_IDLE ==
-		coex_dm->bt_status)) {
+	if ((coex_dm->bt_status == BT_8723D_1ANT_BT_STATUS_NON_CONNECTED_IDLE ||
+	     coex_dm->bt_status == BT_8723D_1ANT_BT_STATUS_CONNECTED_IDLE)
+	     && wifi_connected) {
 		BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
 				"############# [BTCoex],  BT Is idle\n");
 		BTC_TRACE(trace_buf);
@@ -3463,7 +3365,7 @@ void halbtc8723d1ant_run_coexist_mechanism(IN struct btc_coexist *btcoexist)
 	 }
 }
 
-
+static
 void halbtc8723d1ant_init_coex_dm(IN struct btc_coexist *btcoexist)
 {
 	/* force to reset coex mechanism */
@@ -3474,16 +3376,17 @@ void halbtc8723d1ant_init_coex_dm(IN struct btc_coexist *btcoexist)
 	BTC_TRACE(trace_buf);
 
 	coex_sta->pop_event_cnt = 0;
-	coex_sta->cnt_RemoteNameReq = 0;
-	coex_sta->cnt_ReInit = 0;
-	coex_sta->cnt_setupLink = 0;
-	coex_sta->cnt_IgnWlanAct = 0;
-	coex_sta->cnt_Page = 0;
-	coex_sta->cnt_RoleSwitch = 0;
+	coex_sta->cnt_remotenamereq = 0;
+	coex_sta->cnt_reinit = 0;
+	coex_sta->cnt_setuplink = 0;
+	coex_sta->cnt_ignwlanact = 0;
+	coex_sta->cnt_page = 0;
+	coex_sta->cnt_roleswitch = 0;
 
 	halbtc8723d1ant_query_bt_info(btcoexist);
 }
 
+static
 void halbtc8723d1ant_init_hw_config(IN struct btc_coexist *btcoexist,
 				    IN boolean back_up, IN boolean wifi_only)
 {
@@ -3492,7 +3395,7 @@ void halbtc8723d1ant_init_hw_config(IN struct btc_coexist *btcoexist,
 	u8	u8tmp0 = 0, u8tmp1 = 0;
 	struct  btc_board_info *board_info = &btcoexist->board_info;
 	u8 i = 0;
-
+	boolean tmp;
 
 	BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
 		    "[BTCoex], 1Ant Init HW Config!!\n");
@@ -3518,7 +3421,6 @@ void halbtc8723d1ant_init_hw_config(IN struct btc_coexist *btcoexist,
 	BTC_TRACE(trace_buf);
 #endif
 
-
 	coex_sta->bt_coex_supported_feature = 0;
 	coex_sta->bt_coex_supported_version = 0;
 	coex_sta->bt_ble_scan_type = 0;
@@ -3535,21 +3437,20 @@ void halbtc8723d1ant_init_hw_config(IN struct btc_coexist *btcoexist,
 	for (i = 0; i <= 9; i++)
 		coex_sta->bt_afh_map[i] = 0;
 
-	/* 0xf0[15:12] --> Chip Cut information */
-	coex_sta->cut_version = (btcoexist->btc_read_1byte(btcoexist,
-				 0xf1) & 0xf0) >> 4;
+	/* 0xf0[15:12] --> kt_ver */
+	coex_sta->kt_ver = (btcoexist->btc_read_1byte(btcoexist,
+						      0xf1) & 0xf0) >> 4;
 
-	if (coex_sta->cut_version >= 0x3)
-		halbtc8723d1ant_post_state_to_bt(btcoexist,
-					 BT_8723D_1ANT_SCOREBOARD_DKTOPP2M,
-					 TRUE);
+	if (coex_sta->kt_ver >= 0x3)
+		tmp =  TRUE;
 	else
-		halbtc8723d1ant_post_state_to_bt(btcoexist,
-					 BT_8723D_1ANT_SCOREBOARD_DKTOPP2M,
-					 FALSE);
+		tmp =  FALSE;
 
-	btcoexist->btc_write_1byte_bitmask(btcoexist, 0x550, 0x8,
-					   0x1);  /* enable TBTT nterrupt */
+	halbtc8723d1ant_post_state_to_bt(btcoexist,
+					 BT_8723D_1ANT_SCOREBOARD_DKTOPP2M,
+					 tmp);
+	/* enable TBTT nterrupt */
+	btcoexist->btc_write_1byte_bitmask(btcoexist, 0x550, 0x8, 0x1);
 
 	/* BT report packet sample rate	 */
 	btcoexist->btc_write_1byte(btcoexist, 0x790, 0x5);
@@ -3566,13 +3467,6 @@ void halbtc8723d1ant_init_hw_config(IN struct btc_coexist *btcoexist,
 
 	halbtc8723d1ant_enable_gnt_to_gpio(btcoexist, TRUE);
 
-#if 0
-	/* check if WL firmware download ok */
-	if (btcoexist->btc_read_1byte(btcoexist, 0x80) == 0xc6)
-		halbtc8723d1ant_post_state_to_bt(btcoexist,
-					 BT_8723D_1ANT_SCOREBOARD_ONOFF, TRUE);
-#endif
-
 	/* PTA parameter */
 	halbtc8723d1ant_coex_table_with_type(btcoexist, FORCE_EXEC, 0);
 
@@ -3600,9 +3494,6 @@ void halbtc8723d1ant_init_hw_config(IN struct btc_coexist *btcoexist,
 
 		btcoexist->stop_coex_dm = TRUE;
 	} else {
-		/*Set BT polluted packet on for Tx rate adaptive not including Tx retry break by PTA, 0x45c[19] =1 */
-		btcoexist->btc_write_1byte_bitmask(btcoexist, 0x45e, 0x8, 0x1);
-
 		coex_sta->concurrent_rx_mode_on = TRUE;
 		btcoexist->btc_write_1byte_bitmask(btcoexist, 0x953, 0x2, 0x1);
 		/* RF 0x1[0] = 0->Set GNT_WL_RF_Rx always = 1 for con-current Rx */
@@ -3626,1276 +3517,9 @@ void halbtc8723d1ant_init_hw_config(IN struct btc_coexist *btcoexist,
 
 }
 
-u32 halbtc8723d1ant_psd_log2base(IN struct btc_coexist *btcoexist, IN u32 val)
-{
-	u8	j;
-	u32	tmp, tmp2, val_integerd_b = 0, tindex, shiftcount = 0;
-	u32	result, val_fractiond_b = 0, table_fraction[21] = {0, 432, 332, 274, 232, 200,
-				   174, 151, 132, 115, 100, 86, 74, 62, 51, 42,
-							   32, 23, 15, 7, 0
-							      };
-
-	if (val == 0)
-		return 0;
-
-	tmp = val;
-
-	while (1) {
-		if (tmp == 1)
-			break;
-		else {
-			tmp = (tmp >> 1);
-			shiftcount++;
-		}
-	}
-
-
-	val_integerd_b = shiftcount + 1;
-
-	tmp2 = 1;
-	for (j = 1; j <= val_integerd_b; j++)
-		tmp2 = tmp2 * 2;
-
-	tmp = (val * 100) / tmp2;
-	tindex = tmp / 5;
-
-	if (tindex > 20)
-		tindex = 20;
-
-	val_fractiond_b = table_fraction[tindex];
-
-	result = val_integerd_b * 100 - val_fractiond_b;
-
-	return result;
-
-
-}
-
-void halbtc8723d1ant_psd_show_antenna_detect_result(IN struct btc_coexist
-		*btcoexist)
-{
-	u8		*cli_buf = btcoexist->cli_buf;
-	struct  btc_board_info	*board_info = &btcoexist->board_info;
-
-	CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
-		   "\r\n============[Antenna Detection info]  ============\n");
-	CL_PRINTF(cli_buf);
-
-	if (psd_scan->ant_det_result == 12) { /* Get Ant Det from BT  */
-
-		if (board_info->btdm_ant_num_by_ant_det == 1)
-			CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
-				   "\r\n %-35s = %s (%d~%d)",
-				   "Ant Det Result", "1-Antenna",
-				   BT_8723D_1ANT_ANTDET_PSDTHRES_1ANT,
-				BT_8723D_1ANT_ANTDET_PSDTHRES_2ANT_GOODISOLATION);
-		else {
-
-			if (psd_scan->ant_det_psd_scan_peak_val >
-			    (BT_8723D_1ANT_ANTDET_PSDTHRES_2ANT_BADISOLATION)
-			    * 100)
-				CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
-					   "\r\n %-35s = %s (>%d)",
-					"Ant Det Result", "2-Antenna (Bad-Isolation)",
-					BT_8723D_1ANT_ANTDET_PSDTHRES_2ANT_BADISOLATION);
-			else
-				CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
-					   "\r\n %-35s = %s (%d~%d)",
-					"Ant Det Result", "2-Antenna (Good-Isolation)",
-					BT_8723D_1ANT_ANTDET_PSDTHRES_2ANT_GOODISOLATION,
-					BT_8723D_1ANT_ANTDET_PSDTHRES_2ANT_BADISOLATION);
-		}
-	} else if (psd_scan->ant_det_result == 1)
-		CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s (>%d)",
-			   "Ant Det Result", "2-Antenna (Bad-Isolation)",
-			   BT_8723D_1ANT_ANTDET_PSDTHRES_2ANT_BADISOLATION);
-	else if (psd_scan->ant_det_result == 2)
-		CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s (%d~%d)",
-			   "Ant Det Result", "2-Antenna (Good-Isolation)",
-			   BT_8723D_1ANT_ANTDET_PSDTHRES_2ANT_GOODISOLATION
-			   + psd_scan->ant_det_thres_offset,
-			   BT_8723D_1ANT_ANTDET_PSDTHRES_2ANT_BADISOLATION);
-	else
-		CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s (%d~%d)",
-			   "Ant Det Result", "1-Antenna",
-			   BT_8723D_1ANT_ANTDET_PSDTHRES_1ANT,
-			   BT_8723D_1ANT_ANTDET_PSDTHRES_2ANT_GOODISOLATION
-			   + psd_scan->ant_det_thres_offset);
-
-	CL_PRINTF(cli_buf);
-
-	CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s ",
-		   "Antenna Detection Finish",
-		   (board_info->btdm_ant_det_finish
-		    ? "Yes" : "No"));
-	CL_PRINTF(cli_buf);
-
-	switch (psd_scan->ant_det_result) {
-	case 0:
-		CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
-			   "(BT is not available)");
-		break;
-	case 1:  /* 2-Ant bad-isolation */
-		CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
-			   "(BT is available)");
-		break;
-	case 2:  /* 2-Ant good-isolation */
-		CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
-			   "(BT is available)");
-		break;
-	case 3:  /* 1-Ant */
-		CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
-			   "(BT is available)");
-		break;
-	case 4:
-		CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
-			   "(Uncertainty result)");
-		break;
-	case 5:
-		CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "(Pre-Scan fai)");
-		break;
-	case 6:
-		CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
-			   "(WiFi is Scanning)");
-		break;
-	case 7:
-		CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
-			   "(BT is not idle)");
-		break;
-	case 8:
-		CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
-			   "(Abort by WiFi Scanning)");
-		break;
-	case 9:
-		CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
-			   "(Antenna Init is not ready)");
-		break;
-	case 10:
-		CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
-			   "(BT is Inquiry or page)");
-		break;
-	case 11:
-		CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
-			   "(BT is Disabled)");
-	case 12:
-		CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
-			   "(BT is available, result from BT");
-		break;
-	}
-	CL_PRINTF(cli_buf);
-
-	if (psd_scan->ant_det_result == 12) {
-		CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d dB",
-			   "PSD Scan Peak Value",
-			   psd_scan->ant_det_psd_scan_peak_val / 100);
-		CL_PRINTF(cli_buf);
-		return;
-	}
-
-	CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d",
-		   "Ant Detect Total Count", psd_scan->ant_det_try_count);
-	CL_PRINTF(cli_buf);
-
-	CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d",
-		   "Ant Detect Fail Count", psd_scan->ant_det_fail_count);
-	CL_PRINTF(cli_buf);
-
-	if ((!board_info->btdm_ant_det_finish) &&
-	    (psd_scan->ant_det_result != 5))
-		return;
-
-	CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s", "BT Response",
-		   (psd_scan->ant_det_result ? "ok" : "fail"));
-	CL_PRINTF(cli_buf);
-
-	CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d ms", "BT Tx Time",
-		   psd_scan->ant_det_bt_tx_time);
-	CL_PRINTF(cli_buf);
-
-	CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d", "BT Tx Ch",
-		   psd_scan->ant_det_bt_le_channel);
-	CL_PRINTF(cli_buf);
-
-	CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d/ %d",
-		   "WiFi PSD Cent-Ch/Offset/Span",
-		   psd_scan->real_cent_freq, psd_scan->real_offset,
-		   psd_scan->real_span);
-	CL_PRINTF(cli_buf);
-
-	CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d dB",
-		   "PSD Pre-Scan Peak Value",
-		   psd_scan->ant_det_pre_psdscan_peak_val / 100);
-	CL_PRINTF(cli_buf);
-
-	CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s (<= %d)",
-		   "PSD Pre-Scan result",
-		   (psd_scan->ant_det_result != 5 ? "ok" : "fail"),
-		   BT_8723D_1ANT_ANTDET_PSDTHRES_BACKGROUND
-		   + psd_scan->ant_det_thres_offset);
-	CL_PRINTF(cli_buf);
-
-	if (psd_scan->ant_det_result == 5)
-		return;
-
-	CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s dB",
-		   "PSD Scan Peak Value", psd_scan->ant_det_peak_val);
-	CL_PRINTF(cli_buf);
-
-	CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s MHz",
-		   "PSD Scan Peak Freq", psd_scan->ant_det_peak_freq);
-	CL_PRINTF(cli_buf);
-
-
-	CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s", "TFBGA Package",
-		   (board_info->tfbga_package) ?  "Yes" : "No");
-	CL_PRINTF(cli_buf);
-
-	CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d",
-		   "PSD Threshold Offset", psd_scan->ant_det_thres_offset);
-	CL_PRINTF(cli_buf);
-
-}
-
-
-
-void halbtc8723d1ant_psd_showdata(IN struct btc_coexist *btcoexist)
-{
-	u8		*cli_buf = btcoexist->cli_buf;
-	u32		delta_freq_per_point;
-	u32		freq, freq1, freq2, n = 0, i = 0, j = 0, m = 0, psd_rep1, psd_rep2;
-
-	if (psd_scan->ant_det_result == 12)
-		return;
-
-	CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
-		   "\r\n\n============[PSD info]  (%d)============\n",
-		   psd_scan->psd_gen_count);
-	CL_PRINTF(cli_buf);
-
-	if (psd_scan->psd_gen_count == 0) {
-		CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n No data !!\n");
-		CL_PRINTF(cli_buf);
-		return;
-	}
-
-	if (psd_scan->psd_point == 0)
-		delta_freq_per_point = 0;
-	else
-		delta_freq_per_point = psd_scan->psd_band_width /
-				       psd_scan->psd_point;
-
-	/* if (psd_scan->is_psd_show_max_only) */
-	if (0) {
-		psd_rep1 = psd_scan->psd_max_value / 100;
-		psd_rep2 = psd_scan->psd_max_value - psd_rep1 * 100;
-
-		freq = ((psd_scan->real_cent_freq - 20) * 1000000 +
-			psd_scan->psd_max_value_point * delta_freq_per_point);
-		freq1 = freq / 1000000;
-		freq2 = freq / 1000 - freq1 * 1000;
-
-		if (freq2 < 100)
-			CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
-				   "\r\n Freq = %d.0%d MHz",
-				   freq1, freq2);
-		else
-			CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
-				   "\r\n Freq = %d.%d MHz",
-				   freq1, freq2);
-
-		if (psd_rep2 < 10)
-			CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
-				   ", Value = %d.0%d dB, (%d)\n",
-				   psd_rep1, psd_rep2, psd_scan->psd_max_value);
-		else
-			CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
-				   ", Value = %d.%d dB, (%d)\n",
-				   psd_rep1, psd_rep2, psd_scan->psd_max_value);
-
-		CL_PRINTF(cli_buf);
-	} else {
-		m = psd_scan->psd_start_point;
-		n = psd_scan->psd_start_point;
-		i = 1;
-		j = 1;
-
-		while (1) {
-			do {
-				freq = ((psd_scan->real_cent_freq - 20) *
-					1000000 + m *
-					delta_freq_per_point);
-				freq1 = freq / 1000000;
-				freq2 = freq / 1000 - freq1 * 1000;
-
-				if (i == 1) {
-					if (freq2 == 0)
-						CL_SPRINTF(cli_buf,
-							   BT_TMP_BUF_SIZE,
-							   "\r\n Freq%6d.000",
-							   freq1);
-					else if (freq2 < 100)
-						CL_SPRINTF(cli_buf,
-							   BT_TMP_BUF_SIZE,
-							   "\r\n Freq%6d.0%2d",
-							   freq1,
-							   freq2);
-					else
-						CL_SPRINTF(cli_buf,
-							   BT_TMP_BUF_SIZE,
-							   "\r\n Freq%6d.%3d",
-							   freq1,
-							   freq2);
-				} else if ((i % 8 == 0) ||
-					   (m == psd_scan->psd_stop_point)) {
-					if (freq2 == 0)
-						CL_SPRINTF(cli_buf,
-							   BT_TMP_BUF_SIZE,
-							   "%6d.000\n", freq1);
-					else if (freq2 < 100)
-						CL_SPRINTF(cli_buf,
-							   BT_TMP_BUF_SIZE,
-							   "%6d.0%2d\n", freq1,
-							   freq2);
-					else
-						CL_SPRINTF(cli_buf,
-							   BT_TMP_BUF_SIZE,
-							   "%6d.%3d\n", freq1,
-							   freq2);
-				} else {
-					if (freq2 == 0)
-						CL_SPRINTF(cli_buf,
-							   BT_TMP_BUF_SIZE,
-							   "%6d.000", freq1);
-					else if (freq2 < 100)
-						CL_SPRINTF(cli_buf,
-							   BT_TMP_BUF_SIZE,
-							   "%6d.0%2d", freq1,
-							   freq2);
-					else
-						CL_SPRINTF(cli_buf,
-							   BT_TMP_BUF_SIZE,
-							   "%6d.%3d", freq1,
-							   freq2);
-				}
-
-				i++;
-				m++;
-				CL_PRINTF(cli_buf);
-
-			} while ((i <= 8) && (m <= psd_scan->psd_stop_point));
-
-
-			do {
-				psd_rep1 = psd_scan->psd_report_max_hold[n] /
-					   100;
-				psd_rep2 = psd_scan->psd_report_max_hold[n] -
-					   psd_rep1 *
-					   100;
-
-				if (j == 1) {
-					if (psd_rep2 < 10)
-						CL_SPRINTF(cli_buf,
-							   BT_TMP_BUF_SIZE,
-							   "\r\n Val %7d.0%d",
-							   psd_rep1,
-							   psd_rep2);
-					else
-						CL_SPRINTF(cli_buf,
-							   BT_TMP_BUF_SIZE,
-							   "\r\n Val %7d.%d",
-							   psd_rep1,
-							   psd_rep2);
-				} else if ((j % 8 == 0)  ||
-					   (n == psd_scan->psd_stop_point)) {
-					if (psd_rep2 < 10)
-						CL_SPRINTF(cli_buf,
-							   BT_TMP_BUF_SIZE,
-							"%7d.0%d\n", psd_rep1,
-							   psd_rep2);
-					else
-						CL_SPRINTF(cli_buf,
-							   BT_TMP_BUF_SIZE,
-							   "%7d.%d\n", psd_rep1,
-							   psd_rep2);
-				} else {
-					if (psd_rep2 < 10)
-						CL_SPRINTF(cli_buf,
-							   BT_TMP_BUF_SIZE,
-							   "%7d.0%d", psd_rep1,
-							   psd_rep2);
-					else
-						CL_SPRINTF(cli_buf,
-							   BT_TMP_BUF_SIZE,
-							   "%7d.%d", psd_rep1,
-							   psd_rep2);
-				}
-
-				j++;
-				n++;
-				CL_PRINTF(cli_buf);
-
-			} while ((j <= 8) && (n <= psd_scan->psd_stop_point));
-
-			if ((m > psd_scan->psd_stop_point) ||
-			    (n > psd_scan->psd_stop_point))
-				break;
-			else {
-				i = 1;
-				j = 1;
-			}
-
-		}
-	}
-
-
-}
-
-
-#ifdef PLATFORM_WINDOWS
-#pragma optimize("", off)
-#endif
-void halbtc8723d1ant_psd_maxholddata(IN struct btc_coexist *btcoexist,
-				     IN u32 gen_count)
-{
-	u32	i = 0;
-	u32 loop_i_max = 0, loop_val_max = 0;
-
-	if (gen_count == 1) {
-		memcpy(psd_scan->psd_report_max_hold,
-		       psd_scan->psd_report,
-		       BT_8723D_1ANT_ANTDET_PSD_POINTS * sizeof(u32));
-	}
-
-	for (i = psd_scan->psd_start_point;
-	     i <= psd_scan->psd_stop_point; i++) {
-
-		/* update max-hold value at each freq point */
-		if (psd_scan->psd_report[i] > psd_scan->psd_report_max_hold[i])
-			psd_scan->psd_report_max_hold[i] =
-				psd_scan->psd_report[i];
-
-		/*  search the max value in this seep */
-		if (psd_scan->psd_report[i] > loop_val_max) {
-			loop_val_max = psd_scan->psd_report[i];
-			loop_i_max = i;
-		}
-	}
-
-	if (gen_count <= BT_8723D_1ANT_ANTDET_PSD_SWWEEPCOUNT)
-		psd_scan->psd_loop_max_value[gen_count - 1] = loop_val_max;
-}
-
-#ifdef PLATFORM_WINDOWS
-#pragma optimize("", off)
-#endif
-u32 halbtc8723d1ant_psd_getdata(IN struct btc_coexist *btcoexist, IN u32 point)
-{
-	/* reg 0x808[9:0]: FFT data x */
-	/* reg 0x808[22]: 0-->1 to get 1 FFT data y */
-	/* reg 0x8b4[15:0]: FFT data y report */
-
-	u32 val = 0, psd_report = 0;
-	int k = 0;
-
-	val = btcoexist->btc_read_4byte(btcoexist, 0x808);
-
-	val &= 0xffbffc00;
-	val |= point;
-
-	btcoexist->btc_write_4byte(btcoexist, 0x808, val);
-
-	val |= 0x00400000;
-	btcoexist->btc_write_4byte(btcoexist, 0x808, val);
-
-	while (1) {
-		if (k++ > BT_8723D_1ANT_ANTDET_SWEEPPOINT_DELAY)
-			break;
-	}
-
-	val = btcoexist->btc_read_4byte(btcoexist, 0x8b4);
-
-	psd_report = val & 0x0000ffff;
-
-	return psd_report;
-}
-
 #ifdef PLATFORM_WINDOWS
 #pragma optimize("", off)
 #endif
-boolean halbtc8723d1ant_psd_sweep_point(IN struct btc_coexist *btcoexist,
-		IN u32 cent_freq, IN s32 offset, IN u32 span, IN u32 points,
-					IN u32 avgnum, IN u32 loopcnt)
-{
-	u32	 i = 0, val = 0, n = 0, k = 0, j, point_index = 0;
-	u32	points1 = 0, psd_report = 0;
-	u32	start_p = 0, stop_p = 0, delta_freq_per_point = 156250;
-	u32    psd_center_freq = 20 * 10 ^ 6;
-	boolean outloop = FALSE, scan, roam, is_sweep_ok = TRUE;
-	u8	 flag = 0;
-	u32	tmp = 0, u32tmp1 = 0;
-	u32	wifi_original_channel = 1;
-	u32 psd_sum = 0, avg_cnt = 0;
-	u32	i_max = 0, val_max = 0, val_max2 = 0;
-
-	BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-		    "xxxxxxxxxxxxxxxx PSD Sweep Start!!\n");
-	BTC_TRACE(trace_buf);
-
-	do {
-		switch (flag) {
-		case 0:  /* Get PSD parameters */
-		default:
-
-			psd_scan->psd_band_width = 40 * 1000000;
-			psd_scan->psd_point = points;
-			psd_scan->psd_start_base = points / 2;
-			psd_scan->psd_avg_num = avgnum;
-			psd_scan->real_cent_freq = cent_freq;
-			psd_scan->real_offset = offset;
-			psd_scan->real_span = span;
-
-
-			points1 = psd_scan->psd_point;
-			delta_freq_per_point = psd_scan->psd_band_width /
-					       psd_scan->psd_point;
-
-			/* PSD point setup */
-			val = btcoexist->btc_read_4byte(btcoexist, 0x808);
-			val &= 0xffff0fff;
-
-			switch (psd_scan->psd_point) {
-			case 128:
-				val |= 0x0;
-				break;
-			case 256:
-			default:
-				val |= 0x00004000;
-				break;
-			case 512:
-				val |= 0x00008000;
-				break;
-			case 1024:
-				val |= 0x0000c000;
-				break;
-			}
-
-			switch (psd_scan->psd_avg_num) {
-			case 1:
-				val |= 0x0;
-				break;
-			case 8:
-				val |= 0x00001000;
-				break;
-			case 16:
-				val |= 0x00002000;
-				break;
-			case 32:
-			default:
-				val |= 0x00003000;
-				break;
-			}
-			btcoexist->btc_write_4byte(btcoexist, 0x808, val);
-
-			flag = 1;
-			break;
-		case 1:	  /* calculate the PSD point index from freq/offset/span */
-			psd_center_freq = psd_scan->psd_band_width / 2 +
-					  offset * (1000000);
-
-			start_p = psd_scan->psd_start_base + (psd_center_freq -
-				span * (1000000) / 2) / delta_freq_per_point;
-			psd_scan->psd_start_point = start_p -
-						    psd_scan->psd_start_base;
-
-			stop_p = psd_scan->psd_start_base + (psd_center_freq +
-				span * (1000000) / 2) / delta_freq_per_point;
-			psd_scan->psd_stop_point = stop_p -
-						   psd_scan->psd_start_base - 1;
-
-			flag = 2;
-			break;
-		case 2:  /* set RF channel/BW/Mode */
-
-			/* set 3-wire off */
-			val = btcoexist->btc_read_4byte(btcoexist, 0x88c);
-			val |= 0x00300000;
-			btcoexist->btc_write_4byte(btcoexist, 0x88c, val);
-
-			/* CCK off */
-			val = btcoexist->btc_read_4byte(btcoexist, 0x800);
-			val &= 0xfeffffff;
-			btcoexist->btc_write_4byte(btcoexist, 0x800, val);
-
-			/* Tx-pause on */
-			btcoexist->btc_write_1byte(btcoexist, 0x522, 0x6f);
-
-			/* store WiFi original channel */
-			wifi_original_channel = btcoexist->btc_get_rf_reg(
-					btcoexist, BTC_RF_A, 0x18, 0x3ff);
-
-			/* Set RF channel */
-			if (cent_freq == 2484)
-				btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A,
-							  0x18, 0x3ff, 0xe);
-			else
-				btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A,
-					  0x18, 0x3ff, (cent_freq - 2412) / 5 +
-						  1); /* WiFi TRx Mask on */
-
-			/* save original RCK value */
-			u32tmp1 =  btcoexist->btc_get_rf_reg(
-					   btcoexist, BTC_RF_A, 0x1d, 0xfffff);
-
-			/* Enter debug mode */
-			btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0xde,
-						  0x2, 0x1);
-
-			/* Set RF Rx filter corner */
-			btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0x1d,
-						  0xfffff, 0x2e);
-
-
-			/* Set  RF mode = Rx, RF Gain = 0x320a0 */
-			btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0x0,
-						  0xfffff, 0x320a0);
-
-			while (1) {
-				if (k++ > BT_8723D_1ANT_ANTDET_SWEEPPOINT_DELAY)
-					break;
-			}
-			flag = 3;
-			break;
-		case 3:
-			psd_scan->psd_gen_count = 0;
-			for (j = 1; j <= loopcnt; j++) {
-
-				btcoexist->btc_get(btcoexist,
-						   BTC_GET_BL_WIFI_SCAN, &scan);
-				btcoexist->btc_get(btcoexist,
-						   BTC_GET_BL_WIFI_ROAM, &roam);
-
-				if (scan || roam) {
-					is_sweep_ok = FALSE;
-					break;
-				}
-				memset(psd_scan->psd_report, 0,
-				       psd_scan->psd_point * sizeof(u32));
-				start_p = psd_scan->psd_start_point +
-					  psd_scan->psd_start_base;
-				stop_p = psd_scan->psd_stop_point +
-					 psd_scan->psd_start_base + 1;
-
-				i = start_p;
-				point_index = 0;
-
-				while (i < stop_p) {
-					if (i >= points1)
-						psd_report =
-							halbtc8723d1ant_psd_getdata(
-							btcoexist, i - points1);
-					else
-						psd_report =
-							halbtc8723d1ant_psd_getdata(
-								btcoexist, i);
-
-					if (psd_report == 0)
-						tmp = 0;
-					else
-						/* tmp =  20*log10((double)psd_report); */
-						/* 20*log2(x)/log2(10), log2Base return theresult of the psd_report*100 */
-						tmp = 6 * halbtc8723d1ant_psd_log2base(
-							btcoexist, psd_report);
-
-					n = i - psd_scan->psd_start_base;
-					psd_scan->psd_report[n] =  tmp;
-
-					BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-						"Point=%d, psd_dB_data = %d\n",
-						    i, psd_scan->psd_report[n]);
-					BTC_TRACE(trace_buf);
-
-					i++;
-
-				}
-
-				halbtc8723d1ant_psd_maxholddata(btcoexist, j);
-
-				psd_scan->psd_gen_count = j;
-
-				/*Accumulate Max PSD value in this loop if the value > threshold */
-				if (psd_scan->psd_loop_max_value[j - 1] >=
-				    4000) {
-					psd_sum = psd_sum +
-						psd_scan->psd_loop_max_value[j -
-								       1];
-					avg_cnt++;
-				}
-
-				BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-					    "Loop=%d, Max_dB_data = %d\n",
-					    j, psd_scan->psd_loop_max_value[j
-							    - 1]);
-				BTC_TRACE(trace_buf);
-
-			}
-
-			if (loopcnt == BT_8723D_1ANT_ANTDET_PSD_SWWEEPCOUNT) {
-
-				/* search the Max Value between each-freq-point-max-hold value of all sweep*/
-				for (i = 1;
-				     i <= BT_8723D_1ANT_ANTDET_PSD_SWWEEPCOUNT;
-				     i++) {
-
-					if (i == 1) {
-						i_max = i;
-						val_max = psd_scan->psd_loop_max_value[i
-								       - 1];
-						val_max2 =
-							psd_scan->psd_loop_max_value[i
-								     - 1];
-					} else if (
-						psd_scan->psd_loop_max_value[i -
-							     1] > val_max) {
-						val_max2 = val_max;
-						i_max = i;
-						val_max = psd_scan->psd_loop_max_value[i
-								       - 1];
-					} else if (
-						psd_scan->psd_loop_max_value[i -
-							     1] > val_max2)
-						val_max2 =
-							psd_scan->psd_loop_max_value[i
-								     - 1];
-
-					BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-						"i = %d, val_hold= %d, val_max = %d, val_max2 = %d\n",
-						i, psd_scan->psd_loop_max_value[i
-								    - 1],
-						    val_max, val_max2);
-
-					BTC_TRACE(trace_buf);
-				}
-
-				psd_scan->psd_max_value_point = i_max;
-				psd_scan->psd_max_value = val_max;
-				psd_scan->psd_max_value2 = val_max2;
-
-				BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-					    "val_max = %d, val_max2 = %d\n",
-					    psd_scan->psd_max_value,
-					    psd_scan->psd_max_value2);
-				BTC_TRACE(trace_buf);
-			}
-
-			if (avg_cnt != 0) {
-				psd_scan->psd_avg_value = (psd_sum / avg_cnt);
-				if ((psd_sum % avg_cnt) >= (avg_cnt / 2))
-					psd_scan->psd_avg_value++;
-			} else
-				psd_scan->psd_avg_value = 0;
-
-			BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-				    "AvgLoop=%d, Avg_dB_data = %d\n",
-				    avg_cnt, psd_scan->psd_avg_value);
-			BTC_TRACE(trace_buf);
-
-			flag = 100;
-			break;
-		case 99:	/* error */
-
-			outloop = TRUE;
-			break;
-		case 100: /* recovery */
-
-			/* set 3-wire on */
-			val = btcoexist->btc_read_4byte(btcoexist, 0x88c);
-			val &= 0xffcfffff;
-			btcoexist->btc_write_4byte(btcoexist, 0x88c, val);
-
-			/* CCK on */
-			val = btcoexist->btc_read_4byte(btcoexist, 0x800);
-			val |= 0x01000000;
-			btcoexist->btc_write_4byte(btcoexist, 0x800, val);
-
-			/* Tx-pause off */
-			btcoexist->btc_write_1byte(btcoexist, 0x522, 0x0);
-
-			/* PSD off */
-			val = btcoexist->btc_read_4byte(btcoexist, 0x808);
-			val &= 0xffbfffff;
-			btcoexist->btc_write_4byte(btcoexist, 0x808, val);
-
-			/* restore RF Rx filter corner */
-			btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0x1d,
-						  0xfffff, u32tmp1);
-
-			/* Exit debug mode */
-			btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0xde,
-						  0x2, 0x0);
-
-			/* restore WiFi original channel */
-			btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0x18,
-						  0x3ff, wifi_original_channel);
-
-			outloop = TRUE;
-			break;
-
-		}
-
-	} while (!outloop);
-
-	BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-		    "xxxxxxxxxxxxxxxx PSD Sweep Stop!!\n");
-	BTC_TRACE(trace_buf);
-	return is_sweep_ok;
-
-}
-
-#ifdef PLATFORM_WINDOWS
-#pragma optimize("", off)
-#endif
-boolean halbtc8723d1ant_psd_antenna_detection(IN struct btc_coexist
-		*btcoexist)
-{
-	u32	i = 0;
-	u32	wlpsd_cent_freq = 2484, wlpsd_span = 2;
-	s32	wlpsd_offset = -4;
-	u32 bt_tx_time, bt_le_channel;
-	u8	bt_le_ch[13] = {3, 6, 8, 11, 13, 16, 18, 21, 23, 26, 28, 31, 33};
-
-	u8	h2c_parameter[3] = {0}, u8tmpa, u8tmpb;
-
-	u8	state = 0;
-	boolean		outloop = FALSE, bt_resp = FALSE, ant_det_finish = FALSE;
-	u32		freq, freq1, freq2, psd_rep1, psd_rep2, delta_freq_per_point,
-			u32tmp, u32tmp0, u32tmp1, u32tmp2 ;
-	struct  btc_board_info	*board_info = &btcoexist->board_info;
-
-	memset(psd_scan->ant_det_peak_val, 0, 16 * sizeof(u8));
-	memset(psd_scan->ant_det_peak_freq, 0, 16 * sizeof(u8));
-
-	psd_scan->ant_det_bt_tx_time =
-		BT_8723D_1ANT_ANTDET_BTTXTIME;	   /* 0.42ms*50 = 20ms (0.42ms = 1 PSD sweep) */
-	psd_scan->ant_det_bt_le_channel = BT_8723D_1ANT_ANTDET_BTTXCHANNEL;
-
-	bt_tx_time = psd_scan->ant_det_bt_tx_time;
-	bt_le_channel = psd_scan->ant_det_bt_le_channel;
-
-	if (board_info->tfbga_package) /* for TFBGA */
-		psd_scan->ant_det_thres_offset = 5;
-	else
-		psd_scan->ant_det_thres_offset = 0;
-
-	do {
-		switch (state) {
-		case 0:
-			if (bt_le_channel == 39)
-				wlpsd_cent_freq = 2484;
-			else {
-				for (i = 1; i <= 13; i++) {
-					if (bt_le_ch[i - 1] ==
-					    bt_le_channel) {
-						wlpsd_cent_freq = 2412
-								  + (i - 1) * 5;
-						break;
-					}
-				}
-
-				if (i == 14) {
-
-					BTC_SPRINTF(trace_buf,
-						    BT_TMP_BUF_SIZE,
-						"xxxxxxxxxxxxxxxx AntennaDetect(), Abort!!, Invalid LE channel = %d\n ",
-						    bt_le_channel);
-					BTC_TRACE(trace_buf);
-					outloop = TRUE;
-					break;
-				}
-			}
-#if 0
-			wlpsd_sweep_count = bt_tx_time * 238 /
-					    100; /* bt_tx_time/0.42								 */
-			wlpsd_sweep_count = wlpsd_sweep_count / 5;
-
-			if (wlpsd_sweep_count % 5 != 0)
-				wlpsd_sweep_count = (wlpsd_sweep_count /
-						     5 + 1) * 5;
-#endif
-			BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-				"xxxxxxxxxxxxxxxx AntennaDetect(), BT_LETxTime=%d,  BT_LECh = %d\n",
-				    bt_tx_time, bt_le_channel);
-			BTC_TRACE(trace_buf);
-			BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-				"xxxxxxxxxxxxxxxx AntennaDetect(), wlpsd_cent_freq=%d,  wlpsd_offset = %d, wlpsd_span = %d, wlpsd_sweep_count = %d\n",
-				    wlpsd_cent_freq,
-				    wlpsd_offset,
-				    wlpsd_span,
-				    BT_8723D_1ANT_ANTDET_PSD_SWWEEPCOUNT);
-			BTC_TRACE(trace_buf);
-
-			state = 1;
-			break;
-		case 1: /* stop coex DM & set antenna path */
-			/* Stop Coex DM */
-			btcoexist->stop_coex_dm = TRUE;
-
-			BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-				"xxxxxxxxxxxxxxxx AntennaDetect(), Stop Coex DM!!\n");
-			BTC_TRACE(trace_buf);
-
-			/* Set coex table */
-			halbtc8723d1ant_coex_table_with_type(btcoexist,
-							     FORCE_EXEC, 0);
-
-			/* Set TDMA off,				 */
-			halbtc8723d1ant_ps_tdma(btcoexist, FORCE_EXEC,
-						FALSE, 0);
-
-			if (board_info->btdm_ant_pos ==
-			    BTC_ANTENNA_AT_MAIN_PORT) {
-				BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-					"xxxxxxxxxxxxxxxx AntennaDetect(), Antenna at Main Port\n");
-				BTC_TRACE(trace_buf);
-			} else {
-				BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-					"xxxxxxxxxxxxxxxx AntennaDetect(), Antenna at Aux Port\n");
-				BTC_TRACE(trace_buf);
-			}
-
-			/* Set Antenna path, switch WiFi to un-certain antenna port */
-			/* Set Antenna Path,  both GNT_WL/GNT_BT = 1, and control by SW */
-			halbtc8723d1ant_set_ant_path(btcoexist, BTC_ANT_PATH_BT,
-						     FORCE_EXEC,
-					     BT_8723D_1ANT_PHASE_ANTENNA_DET);
-
-			BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-				"xxxxxxxxxxxxxxxx AntennaDetect(), Set Antenna to BT!!\n");
-			BTC_TRACE(trace_buf);
-
-			/* Set AFH mask on at WiFi channel 2472MHz +/- 10MHz */
-			h2c_parameter[0] = 0x1;
-			h2c_parameter[1] = 0xd;
-			h2c_parameter[2] = 0x14;
-
-			BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-				"xxxxxxxxxxxxxxxx AntennaDetect(), Set AFH on, Cent-Ch= %d,  Mask=%d\n",
-				    h2c_parameter[1],
-				    h2c_parameter[2]);
-			BTC_TRACE(trace_buf);
-
-			btcoexist->btc_fill_h2c(btcoexist, 0x66, 3,
-						h2c_parameter);
-
-			u32tmp = btcoexist->btc_read_2byte(btcoexist, 0x948);
-			u32tmp0 = btcoexist->btc_read_4byte(btcoexist, 0x70);
-			u32tmp1 = halbtc8723d1ant_ltecoex_indirect_read_reg(
-					  btcoexist, 0x38);
-			u32tmp2 = halbtc8723d1ant_ltecoex_indirect_read_reg(
-					  btcoexist, 0x54);
-
-			BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-				"[BTCoex], ********** 0x948 = 0x%x, 0x70 = 0x%x, 0x38= 0x%x, 0x54= 0x%x (Before Ant Det)\n",
-				    u32tmp, u32tmp0, u32tmp1, u32tmp2);
-			BTC_TRACE(trace_buf);
-
-			state = 2;
-			break;
-		case 2:	/* Pre-sweep background psd */
-			if (!halbtc8723d1ant_psd_sweep_point(btcoexist,
-				     wlpsd_cent_freq, wlpsd_offset, wlpsd_span,
-					     BT_8723D_1ANT_ANTDET_PSD_POINTS,
-				     BT_8723D_1ANT_ANTDET_PSD_AVGNUM, 3)) {
-				ant_det_finish = FALSE;
-				board_info->btdm_ant_num_by_ant_det = 1;
-				psd_scan->ant_det_result = 8;
-				state = 99;
-				break;
-			}
-
-			psd_scan->ant_det_pre_psdscan_peak_val =
-				psd_scan->psd_max_value;
-
-			if (psd_scan->ant_det_pre_psdscan_peak_val >
-			    (BT_8723D_1ANT_ANTDET_PSDTHRES_BACKGROUND
-			     + psd_scan->ant_det_thres_offset) * 100) {
-				BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-					"xxxxxxxxxxxxxxxx AntennaDetect(), Abort Antenna Detection!! becaus background = %d > thres (%d)\n",
-					psd_scan->ant_det_pre_psdscan_peak_val /
-					    100,
-					BT_8723D_1ANT_ANTDET_PSDTHRES_BACKGROUND
-					    + psd_scan->ant_det_thres_offset);
-				BTC_TRACE(trace_buf);
-				ant_det_finish = FALSE;
-				board_info->btdm_ant_num_by_ant_det = 1;
-				psd_scan->ant_det_result = 5;
-				state = 99;
-			} else {
-				BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-					"xxxxxxxxxxxxxxxx AntennaDetect(), Start Antenna Detection!! becaus background = %d <= thres (%d)\n",
-					psd_scan->ant_det_pre_psdscan_peak_val /
-					    100,
-					BT_8723D_1ANT_ANTDET_PSDTHRES_BACKGROUND
-					    + psd_scan->ant_det_thres_offset);
-				BTC_TRACE(trace_buf);
-				state = 3;
-			}
-			break;
-		case 3:
-
-			bt_resp = btcoexist->btc_set_bt_ant_detection(
-					  btcoexist, (u8)(bt_tx_time & 0xff),
-					  (u8)(bt_le_channel & 0xff));
-
-			/* Sync WL Rx PSD with BT Tx time because H2C->Mailbox delay */
-			delay_ms(20);
-
-			if (!halbtc8723d1ant_psd_sweep_point(btcoexist,
-					     wlpsd_cent_freq, wlpsd_offset,
-							     wlpsd_span,
-					     BT_8723D_1ANT_ANTDET_PSD_POINTS,
-					     BT_8723D_1ANT_ANTDET_PSD_AVGNUM,
-				     BT_8723D_1ANT_ANTDET_PSD_SWWEEPCOUNT)) {
-				ant_det_finish = FALSE;
-				board_info->btdm_ant_num_by_ant_det = 1;
-				psd_scan->ant_det_result = 8;
-				state = 99;
-				break;
-			}
-
-#if 1
-			psd_scan->ant_det_psd_scan_peak_val =
-				psd_scan->psd_max_value;
-#endif
-#if 0
-			psd_scan->ant_det_psd_scan_peak_val =
-				((psd_scan->psd_max_value - psd_scan->psd_avg_value) <
-				 800) ?
-				psd_scan->psd_max_value : ((
-						psd_scan->psd_max_value -
-					psd_scan->psd_max_value2 <= 300) ?
-						   psd_scan->psd_avg_value :
-						   psd_scan->psd_max_value2);
-#endif
-			psd_scan->ant_det_psd_scan_peak_freq =
-				psd_scan->psd_max_value_point;
-			state = 4;
-			break;
-		case 4:
-
-			if (psd_scan->psd_point == 0)
-				delta_freq_per_point = 0;
-			else
-				delta_freq_per_point =
-					psd_scan->psd_band_width /
-					psd_scan->psd_point;
-
-			psd_rep1 = psd_scan->ant_det_psd_scan_peak_val / 100;
-			psd_rep2 = psd_scan->ant_det_psd_scan_peak_val -
-				   psd_rep1 *
-				   100;
-
-			freq = ((psd_scan->real_cent_freq - 20) *
-				1000000 + psd_scan->psd_max_value_point
-				* delta_freq_per_point);
-			freq1 = freq / 1000000;
-			freq2 = freq / 1000 - freq1 * 1000;
-
-			if (freq2 < 100) {
-				BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-					"xxxxxxxxxxxxxxxx AntennaDetect(), Max Value: Freq = %d.0%d MHz",
-					    freq1, freq2);
-				BTC_TRACE(trace_buf);
-				CL_SPRINTF(psd_scan->ant_det_peak_freq,
-					   BT_8723D_1ANT_ANTDET_BUF_LEN,
-					   "%d.0%d", freq1, freq2);
-			} else {
-				BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-					"xxxxxxxxxxxxxxxx AntennaDetect(), Max Value: Freq = %d.%d MHz",
-					    freq1, freq2);
-				BTC_TRACE(trace_buf);
-				CL_SPRINTF(psd_scan->ant_det_peak_freq,
-					   BT_8723D_1ANT_ANTDET_BUF_LEN,
-					   "%d.%d", freq1, freq2);
-			}
-
-			if (psd_rep2 < 10) {
-				BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-					    ", Value = %d.0%d dB\n",
-					    psd_rep1, psd_rep2);
-				BTC_TRACE(trace_buf);
-				CL_SPRINTF(psd_scan->ant_det_peak_val,
-					   BT_8723D_1ANT_ANTDET_BUF_LEN,
-					   "%d.0%d", psd_rep1, psd_rep2);
-			} else {
-				BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-					    ", Value = %d.%d dB\n",
-					    psd_rep1, psd_rep2);
-				BTC_TRACE(trace_buf);
-				CL_SPRINTF(psd_scan->ant_det_peak_val,
-					   BT_8723D_1ANT_ANTDET_BUF_LEN,
-					   "%d.%d", psd_rep1, psd_rep2);
-			}
-
-			psd_scan->ant_det_is_btreply_available = TRUE;
-
-			if (bt_resp == FALSE) {
-				psd_scan->ant_det_is_btreply_available =
-					FALSE;
-				psd_scan->ant_det_result = 0;
-				ant_det_finish = FALSE;
-				board_info->btdm_ant_num_by_ant_det = 1;
-				BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-					"xxxxxxxxxxxxxxxx AntennaDetect(), BT Response = Fail\n ");
-				BTC_TRACE(trace_buf);
-			} else if (psd_scan->ant_det_psd_scan_peak_val >
-				(BT_8723D_1ANT_ANTDET_PSDTHRES_2ANT_BADISOLATION)
-				   * 100) {
-				psd_scan->ant_det_result = 1;
-				ant_det_finish = TRUE;
-				board_info->btdm_ant_num_by_ant_det = 2;
-				coex_sta->isolation_btween_wb = (u8)(85 -
-					psd_scan->ant_det_psd_scan_peak_val /
-							     100) & 0xff;
-				BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-					"xxxxxxxxxxxxxxxx AntennaDetect(), Detect Result = 2-Ant, Bad-Isolation!!\n");
-				BTC_TRACE(trace_buf);
-			} else if (psd_scan->ant_det_psd_scan_peak_val >
-				(BT_8723D_1ANT_ANTDET_PSDTHRES_2ANT_GOODISOLATION
-				    + psd_scan->ant_det_thres_offset) * 100) {
-				psd_scan->ant_det_result = 2;
-				ant_det_finish = TRUE;
-				board_info->btdm_ant_num_by_ant_det = 2;
-				coex_sta->isolation_btween_wb = (u8)(85 -
-					psd_scan->ant_det_psd_scan_peak_val /
-							     100) & 0xff;
-				BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-					"xxxxxxxxxxxxxxxx AntennaDetect(), Detect Result = 2-Ant, Good-Isolation!!\n");
-				BTC_TRACE(trace_buf);
-			} else if (psd_scan->ant_det_psd_scan_peak_val >
-				   (BT_8723D_1ANT_ANTDET_PSDTHRES_1ANT) *
-				   100) {
-				psd_scan->ant_det_result = 3;
-				ant_det_finish = TRUE;
-				board_info->btdm_ant_num_by_ant_det = 1;
-				coex_sta->isolation_btween_wb = (u8)(85 -
-					psd_scan->ant_det_psd_scan_peak_val /
-							     100) & 0xff;
-				BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-					"xxxxxxxxxxxxxxxx AntennaDetect(), Detect Result = 1-Ant!!\n");
-				BTC_TRACE(trace_buf);
-			} else {
-				psd_scan->ant_det_result = 4;
-				ant_det_finish = FALSE;
-				board_info->btdm_ant_num_by_ant_det = 1;
-				BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-					"xxxxxxxxxxxxxxxx AntennaDetect(), Detect Result = 1-Ant, un-certainity!!\n");
-				BTC_TRACE(trace_buf);
-			}
-
-			state = 99;
-			break;
-		case 99:  /* restore setup */
-
-			/* Set AFH mask off at WiFi channel 2472MHz +/- 10MHz */
-			h2c_parameter[0] = 0x0;
-			h2c_parameter[1] = 0x0;
-			h2c_parameter[2] = 0x0;
-
-			BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-				"xxxxxxxxxxxxxxxx AntennaDetect(), Set AFH on, Cent-Ch= %d,  Mask=%d\n",
-				    h2c_parameter[1], h2c_parameter[2]);
-			BTC_TRACE(trace_buf);
-
-			btcoexist->btc_fill_h2c(btcoexist, 0x66, 3,
-						h2c_parameter);
-
-			/* Set Antenna Path, GNT_WL/GNT_BT control by PTA */
-			/* Set Antenna path, switch WiFi to certain antenna port */
-			halbtc8723d1ant_set_ant_path(btcoexist,
-					     BTC_ANT_PATH_AUTO, FORCE_EXEC,
-					     BT_8723D_1ANT_PHASE_2G_RUNTIME);
-
-			BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-				"xxxxxxxxxxxxxxxx AntennaDetect(), Set Antenna to PTA\n!!");
-			BTC_TRACE(trace_buf);
-
-			btcoexist->stop_coex_dm = FALSE;
-
-			BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-				"xxxxxxxxxxxxxxxx AntennaDetect(), Resume Coex DM\n!!");
-			BTC_TRACE(trace_buf);
-
-			outloop = TRUE;
-			break;
-		}
-
-	} while (!outloop);
-
-	return ant_det_finish;
-
-}
-
-#ifdef PLATFORM_WINDOWS
-#pragma optimize("", off)
-#endif
-boolean halbtc8723d1ant_psd_antenna_detection_check(IN struct btc_coexist
-		*btcoexist)
-{
-	static u32 ant_det_count = 0, ant_det_fail_count = 0;
-	struct  btc_board_info	*board_info = &btcoexist->board_info;
-
-	boolean scan, roam, ant_det_finish = FALSE;
-
-	btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_SCAN, &scan);
-	btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_ROAM, &roam);
-
-	ant_det_count++;
-
-	psd_scan->ant_det_try_count = ant_det_count;
-
-	if (scan || roam) {
-		ant_det_finish = FALSE;
-		psd_scan->ant_det_result = 6;
-	} else if (coex_sta->bt_disabled) {
-		ant_det_finish = FALSE;
-		psd_scan->ant_det_result = 11;
-	} else if (coex_sta->num_of_profile >= 1) {
-		ant_det_finish = FALSE;
-		psd_scan->ant_det_result = 7;
-	} else if (
-		!psd_scan->ant_det_is_ant_det_available) { /* Antenna initial setup is not ready */
-		ant_det_finish = FALSE;
-		psd_scan->ant_det_result = 9;
-	} else if (coex_sta->c2h_bt_inquiry_page) {
-		ant_det_finish = FALSE;
-		psd_scan->ant_det_result = 10;
-	} else {
-
-		ant_det_finish = halbtc8723d1ant_psd_antenna_detection(
-					 btcoexist);
-
-		delay_ms(psd_scan->ant_det_bt_tx_time);
-	}
-
-	/* board_info->ant_det_result = psd_scan->ant_det_result; */
-
-	if (!ant_det_finish)
-		ant_det_fail_count++;
-
-	psd_scan->ant_det_fail_count = ant_det_fail_count;
-
-	BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-		"xxxxxxxxxxxxxxxx AntennaDetect(), result = %d, fail_count = %d, finish = %s\n",
-		    psd_scan->ant_det_result,
-		    psd_scan->ant_det_fail_count,
-		    ant_det_finish == TRUE ? "Yes" : "No");
-	BTC_TRACE(trace_buf);
-
-	return ant_det_finish;
-
-}
-
-
 
 /* ************************************************************
  * work around function start with wa_halbtc8723d1ant_
@@ -4975,6 +3599,8 @@ void ex_halbtc8723d1ant_power_on_setting(IN struct btc_coexist *btcoexist)
 	/* enable GNT_WL/GNT_BT debug signal to GPIO14/15 */
 	halbtc8723d1ant_enable_gnt_to_gpio(btcoexist, TRUE);
 
+#if BT_8723D_1ANT_COEX_DBG
+
 	BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
 		"[BTCoex], **********  LTE coex Reg 0x38 (Power-On) = 0x%x**********\n",
 		    halbtc8723d1ant_ltecoex_indirect_read_reg(btcoexist, 0x38));
@@ -4986,6 +3612,8 @@ void ex_halbtc8723d1ant_power_on_setting(IN struct btc_coexist *btcoexist)
 		    btcoexist->btc_read_2byte(btcoexist, 0x948));
 	BTC_TRACE(trace_buf);
 
+#endif
+
 }
 
 void ex_halbtc8723d1ant_pre_load_firmware(IN struct btc_coexist *btcoexist)
@@ -5019,7 +3647,7 @@ void ex_halbtc8723d1ant_display_coex_info(IN struct btc_coexist *btcoexist)
 	boolean			lte_coex_on = FALSE;
 
 	CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
-		   "\r\n ============[BT Coexist info]============");
+		   "\r\n ============[BT Coexist info 8723D]============");
 	CL_PRINTF(cli_buf);
 
 	if (btcoexist->manual_control) {
@@ -5075,10 +3703,13 @@ void ex_halbtc8723d1ant_display_coex_info(IN struct btc_coexist *btcoexist)
 	}
 
 	if (psd_scan->ant_det_try_count == 0) {
-		CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d/ %s",
+		CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %s/ %s",
 			   "Ant PG Num/ Mech/ Pos",
-			   board_info->pg_ant_num, board_info->btdm_ant_num,
-			   (board_info->btdm_ant_pos == 1 ? "S1" : "S0"));
+			   board_info->pg_ant_num,
+			   (board_info->btdm_ant_num == 1 ?
+			   "Shared" : "Non-Shared"),
+			   (board_info->btdm_ant_pos == 1 ?
+			   "S1" : "S0"));
 		CL_PRINTF(cli_buf);
 	} else {
 		CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
@@ -5140,7 +3771,7 @@ void ex_halbtc8723d1ant_display_coex_info(IN struct btc_coexist *btcoexist)
 		   "\r\n %-35s = 0x%x/ 0x%x/ v%d/ %c",
 		   "W_FW/ B_FW/ Phy/ Kt",
 		   fw_ver, bt_patch_ver, phyver,
-		   coex_sta->cut_version + 65);
+		   coex_sta->kt_ver + 65);
 	CL_PRINTF(cli_buf);
 
 	CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %02x %02x %02x ",
@@ -5201,21 +3832,13 @@ void ex_halbtc8723d1ant_display_coex_info(IN struct btc_coexist *btcoexist)
 	CL_PRINTF(cli_buf);
 
 	if (bt_link_info->a2dp_exist) {
-		CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s/ %d/ %s",
-			   "A2DP Rate/Bitpool/Auto_Slot",
-			   ((coex_sta->is_A2DP_3M) ? "3M" : "No_3M"),
+		CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
+			   "\r\n %-35s = %s/ %d/ 0x%x/ 0x%x",
+			   "CQDDR/Bitpool/V_ID/D_name",
+			   ((coex_sta->is_A2DP_3M) ? "On" : "Off"),
 			   coex_sta->a2dp_bit_pool,
-			   ((coex_sta->is_autoslot) ? "On" : "Off")
-			  );
-		CL_PRINTF(cli_buf);
-
-		CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x/ %d/ %d",
-			   "V_ID/D_name/FBSlot_Legacy/FBSlot_Le",
 			   coex_sta->bt_a2dp_vendor_id,
-			   coex_sta->bt_a2dp_device_name,
-			   coex_sta->legacy_forbidden_slot,
-			   coex_sta->le_forbidden_slot
-			  );
+			   coex_sta->bt_a2dp_device_name);
 		CL_PRINTF(cli_buf);
 	}
 
@@ -5230,7 +3853,7 @@ void ex_halbtc8723d1ant_display_coex_info(IN struct btc_coexist *btcoexist)
 	CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s/ %d/ %s/ 0x%x",
 				"Role/RoleSwCnt/IgnWlact/Feature",
 				((bt_link_info->slave_role) ? "Slave" : "Master"),
-				coex_sta->cnt_RoleSwitch,
+				coex_sta->cnt_roleswitch,
 				((coex_dm->cur_ignore_wlan_act) ? "Yes" : "No"),
 				coex_sta->bt_coex_supported_feature);
 	CL_PRINTF(cli_buf);
@@ -5251,11 +3874,11 @@ void ex_halbtc8723d1ant_display_coex_info(IN struct btc_coexist *btcoexist)
 
 	CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d/ %d/ %d/ %d",
 		   "ReInit/ReLink/IgnWlact/Page/NameReq",
-		   coex_sta->cnt_ReInit,
-		   coex_sta->cnt_setupLink,
-		   coex_sta->cnt_IgnWlanAct,
-		   coex_sta->cnt_Page,
-		   coex_sta->cnt_RemoteNameReq
+		   coex_sta->cnt_reinit,
+		   coex_sta->cnt_setuplink,
+		   coex_sta->cnt_ignwlanact,
+		   coex_sta->cnt_page,
+		   coex_sta->cnt_remotenamereq
 		  );
 	CL_PRINTF(cli_buf);
 
@@ -5269,7 +3892,7 @@ void ex_halbtc8723d1ant_display_coex_info(IN struct btc_coexist *btcoexist)
 		CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
 			   "\r\n %-35s = 0x%x/ 0x%x/ 0x%04x",
 			   "0xae[4]/0xac[1:0]/Scoreboard(B->W)",
-			   ((coex_sta->bt_reg_vendor_ae & BIT(4)) >> 4),
+			   (int)((coex_sta->bt_reg_vendor_ae & BIT(4)) >> 4),
 			   coex_sta->bt_reg_vendor_ac & 0x3, u16tmp[0]);
 	CL_PRINTF(cli_buf);
 
@@ -5359,6 +3982,12 @@ void ex_halbtc8723d1ant_display_coex_info(IN struct btc_coexist *btcoexist)
 		   coex_sta->wl_fw_dbg_info[5]);
 	CL_PRINTF(cli_buf);
 
+	CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d/ %s",
+		   "TDMA_Togg_cnt/WL5ms_cnt/WL5ms_off",
+		   coex_sta->wl_fw_dbg_info[6], coex_sta->wl_fw_dbg_info[7],
+		   ((coex_sta->is_no_wl_5ms_extend) ? "Yes" : "No"));
+	CL_PRINTF(cli_buf);
+
 	u32tmp[0] = halbtc8723d1ant_ltecoex_indirect_read_reg(btcoexist, 0x38);
 	lte_coex_on = ((u32tmp[0] & BIT(7)) >> 7) ?  TRUE : FALSE;
 
@@ -5396,16 +4025,6 @@ void ex_halbtc8723d1ant_display_coex_info(IN struct btc_coexist *btcoexist)
 	CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s",
 		   "============[Hw setting]============");
 	CL_PRINTF(cli_buf);
-	/*
-		u32tmp[0] = btcoexist->btc_read_4byte(btcoexist, 0x430);
-		u32tmp[1] = btcoexist->btc_read_4byte(btcoexist, 0x434);
-		u16tmp[0] = btcoexist->btc_read_2byte(btcoexist, 0x42a);
-		u8tmp[0] = btcoexist->btc_read_1byte(btcoexist, 0x456);
-		CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/0x%x/0x%x/0x%x",
-			   "0x430/0x434/0x42a/0x456",
-			   u32tmp[0], u32tmp[1], u16tmp[0], u8tmp[0]);
-		CL_PRINTF(cli_buf);
-	*/
 
 	u32tmp[0] = halbtc8723d1ant_ltecoex_indirect_read_reg(btcoexist, 0x38);
 	u32tmp[1] = halbtc8723d1ant_ltecoex_indirect_read_reg(btcoexist, 0x54);
@@ -5471,15 +4090,25 @@ void ex_halbtc8723d1ant_display_coex_info(IN struct btc_coexist *btcoexist)
 		   (int)((u8tmp[3] & BIT(7)) >> 7));
 	CL_PRINTF(cli_buf);
 
+	u32tmp[0] = btcoexist->btc_read_4byte(btcoexist, 0x430);
+	u32tmp[1] = btcoexist->btc_read_4byte(btcoexist, 0x434);
+	u16tmp[0] = btcoexist->btc_read_2byte(btcoexist, 0x42a);
+	u8tmp[0] = btcoexist->btc_read_1byte(btcoexist, 0x426);
+	u8tmp[1] = btcoexist->btc_read_1byte(btcoexist, 0x45e);
+	CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
+		   "\r\n %-35s = 0x%x/ 0x%x/ 0x%x/ 0x%x/ 0x%x",
+		   "0x430/0x434/0x42a/0x426/0x45e[3]",
+		   u32tmp[0], u32tmp[1], u16tmp[0], u8tmp[0],
+		   (int)((u8tmp[1] & BIT(3)) >> 3));
+	CL_PRINTF(cli_buf);
+
 	u8tmp[0] = btcoexist->btc_read_1byte(btcoexist, 0x4c6);
-	u8tmp[1] = btcoexist->btc_read_1byte(btcoexist, 0x40);
-	u8tmp[2] = btcoexist->btc_read_1byte(btcoexist, 0x45e);
+	u16tmp[0] = btcoexist->btc_read_2byte(btcoexist, 0x40);
 
-	CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x/ 0x%x",
-		   "0x4c6[4]/0x40[5]/0x45e[3](TxRetry)",
+	CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
+		   "\r\n %-35s = 0x%x/ 0x%x", "0x4c6[4]/0x40[5]",
 		   (int)((u8tmp[0] & BIT(4)) >> 4),
-		   (int)((u8tmp[1] & BIT(5)) >> 5),
-		   (int)((u8tmp[2] & BIT(3)) >> 3));
+		   (int)((u16tmp[0] & BIT(5)) >> 5));
 	CL_PRINTF(cli_buf);
 
 	u32tmp[0] = btcoexist->btc_read_4byte(btcoexist, 0x550);
@@ -5525,7 +4154,7 @@ void ex_halbtc8723d1ant_display_coex_info(IN struct btc_coexist *btcoexist)
 	CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d %s",
 		   "0x770(Hi-pri rx/tx)",
 		   coex_sta->high_priority_rx, coex_sta->high_priority_tx,
-		   (coex_sta->is_hiPri_rx_overhead ? "(scan overhead!!)" : ""));
+		   (coex_sta->is_hipri_rx_overhead ? "(scan overhead!!)" : ""));
 	CL_PRINTF(cli_buf);
 
 	CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d %s",
@@ -5579,7 +4208,7 @@ void ex_halbtc8723d1ant_ips_notify(IN struct btc_coexist *btcoexist, IN u8 type)
 #endif
 
 		halbtc8723d1ant_init_hw_config(btcoexist, FALSE, FALSE);
-		halbtc8723d1ant_init_coex_dm(btcoexist);;
+		halbtc8723d1ant_init_coex_dm(btcoexist);
 
 		coex_sta->under_ips = FALSE;
 	}
@@ -5644,7 +4273,7 @@ void ex_halbtc8723d1ant_scan_notify(IN struct btc_coexist *btcoexist,
 	if (BTC_SCAN_START == type) {
 
 		if (!wifi_connected)
-			coex_sta->wifi_is_high_pri_task = TRUE;
+			coex_sta->wifi_in_scan_task = TRUE;
 
 		BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
 			    "[BTCoex], SCAN START notify\n");
@@ -5656,7 +4285,7 @@ void ex_halbtc8723d1ant_scan_notify(IN struct btc_coexist *btcoexist,
 					BT_8723D_1ANT_SCOREBOARD_ONOFF,
 					TRUE);
 
-		halbtc8723d1ant_query_bt_info(btcoexist);
+		/*halbtc8723d1ant_query_bt_info(btcoexist);*/
 
 		/* Force antenna setup for no scan result issue */
 		halbtc8723d1ant_set_ant_path(btcoexist, BTC_ANT_PATH_AUTO,
@@ -5667,7 +4296,7 @@ void ex_halbtc8723d1ant_scan_notify(IN struct btc_coexist *btcoexist,
 
 	} else {
 
-		coex_sta->wifi_is_high_pri_task = FALSE;
+		coex_sta->wifi_in_scan_task = FALSE;
 
 		btcoexist->btc_get(btcoexist, BTC_GET_U1_AP_NUM,
 				   &coex_sta->scan_ap_num);
@@ -5781,15 +4410,6 @@ void ex_halbtc8723d1ant_media_status_notify(IN struct btc_coexist *btcoexist,
 			btcoexist->btc_write_1byte(btcoexist, 0x6cf,
 						   0x10); /* CCK Rx */
 		}
-
-		coex_dm->backup_arfr_cnt1 = btcoexist->btc_read_4byte(btcoexist,
-					    0x430);
-		coex_dm->backup_arfr_cnt2 = btcoexist->btc_read_4byte(btcoexist,
-					    0x434);
-		coex_dm->backup_retry_limit = btcoexist->btc_read_2byte(
-						      btcoexist, 0x42a);
-		coex_dm->backup_ampdu_max_time = btcoexist->btc_read_1byte(
-				btcoexist, 0x456);
 	} else {
 
 		BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
@@ -5854,9 +4474,10 @@ void ex_halbtc8723d1ant_specific_packet_notify(IN struct btc_coexist *btcoexist,
 		coex_sta->specific_pkt_period_cnt = 2;
 	}
 
-	if (coex_sta->wifi_is_high_pri_task) {
+	if (coex_sta->wifi_is_high_pri_task || coex_sta->wifi_in_scan_task) {
 		halbtc8723d1ant_post_state_to_bt(btcoexist,
-					 BT_8723D_1ANT_SCOREBOARD_SCAN, TRUE);
+						 BT_8723D_1ANT_SCOREBOARD_SCAN,
+						 TRUE);
 		halbtc8723d1ant_run_coexist_mechanism(btcoexist);
 	}
 }
@@ -5864,13 +4485,14 @@ void ex_halbtc8723d1ant_specific_packet_notify(IN struct btc_coexist *btcoexist,
 void ex_halbtc8723d1ant_bt_info_notify(IN struct btc_coexist *btcoexist,
 				       IN u8 *tmp_buf, IN u8 length)
 {
-	u8			i, rsp_source = 0;
+	struct btc_bt_link_info *bt_link_info = &btcoexist->bt_link_info;
+	u8 i, rsp_source = 0;
 	boolean	wifi_connected = FALSE;
 	boolean	wifi_scan = FALSE, wifi_link = FALSE, wifi_roam = FALSE,
-		    wifi_busy = FALSE;
+		wifi_busy = FALSE;
 	static boolean is_scoreboard_scan = FALSE;
 
-	if (psd_scan->is_AntDet_running == TRUE) {
+	if (psd_scan->is_antdet_running) {
 		BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
 			"[BTCoex], bt_info_notify return for AntDet is running\n");
 		BTC_TRACE(trace_buf);
@@ -5937,7 +4559,7 @@ void ex_halbtc8723d1ant_bt_info_notify(IN struct btc_coexist *btcoexist,
 
 		coex_sta->a2dp_bit_pool = (((
 			coex_sta->bt_info_c2h[rsp_source][1] & 0x49) == 0x49) ?
-				   (coex_sta->bt_info_c2h[rsp_source][6]  & 0x7f) : 0);
+			(coex_sta->bt_info_c2h[rsp_source][6]  & 0x7f) : 0);
 
 		coex_sta->is_bt_a2dp_sink = (coex_sta->bt_info_c2h[rsp_source][6] & 0x80) ?
 									TRUE : FALSE;
@@ -5945,7 +4567,7 @@ void ex_halbtc8723d1ant_bt_info_notify(IN struct btc_coexist *btcoexist,
 		coex_sta->bt_retry_cnt = coex_sta->bt_info_c2h[rsp_source][2] &
 					 0xf;
 
-		coex_sta->is_autoslot = coex_sta->bt_info_ext2 & 0x8;
+		bt_link_info->slave_role  = coex_sta->bt_info_ext2 & 0x8;
 
 		coex_sta->forbidden_slot = coex_sta->bt_info_ext2 & 0x7;
 
@@ -5959,31 +4581,27 @@ void ex_halbtc8723d1ant_bt_info_notify(IN struct btc_coexist *btcoexist,
 			coex_sta->pop_event_cnt++;
 
 		if (coex_sta->c2h_bt_remote_name_req)
-			coex_sta->cnt_RemoteNameReq++;
+			coex_sta->cnt_remotenamereq++;
 
 		if (coex_sta->bt_info_ext & BIT(1))
-			coex_sta->cnt_ReInit++;
+			coex_sta->cnt_reinit++;
 
-		if (coex_sta->bt_info_ext & BIT(2)) {
-			coex_sta->cnt_setupLink++;
-			coex_sta->is_setupLink = TRUE;
+		if (coex_sta->bt_info_ext & BIT(2) ||
+		    (coex_sta->bt_create_connection &&
+		    coex_sta->pnp_awake_period_cnt > 0)) {
+			coex_sta->cnt_setuplink++;
+			coex_sta->is_setup_link = TRUE;
 			coex_sta->bt_relink_downcount = 2;
 			BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
 				    "[BTCoex], Re-Link start in BT info!!\n");
 			BTC_TRACE(trace_buf);
-		} else {
-			coex_sta->is_setupLink = FALSE;
-			coex_sta->bt_relink_downcount = 0;
-			BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-				    "[BTCoex], Re-Link stop in BT info!!\n");
-			BTC_TRACE(trace_buf);
 		}
 
 		if (coex_sta->bt_info_ext & BIT(3))
-			coex_sta->cnt_IgnWlanAct++;
+			coex_sta->cnt_ignwlanact++;
 
 		if (coex_sta->bt_info_ext & BIT(6))
-			coex_sta->cnt_RoleSwitch++;
+			coex_sta->cnt_roleswitch++;
 
 		if (coex_sta->bt_info_ext & BIT(7))
 			coex_sta->is_bt_multi_link = TRUE;
@@ -5996,12 +4614,12 @@ void ex_halbtc8723d1ant_bt_info_notify(IN struct btc_coexist *btcoexist,
 			coex_sta->is_hid_rcu = FALSE;
 
 		if (coex_sta->bt_info_ext & BIT(5))
-			coex_sta->is_ble_scan_toggle = TRUE;
+			coex_sta->is_ble_scan_en = TRUE;
 		else
-			coex_sta->is_ble_scan_toggle = FALSE;
+			coex_sta->is_ble_scan_en = FALSE;
 
 		if (coex_sta->bt_create_connection) {
-			coex_sta->cnt_Page++;
+			coex_sta->cnt_page++;
 
 			btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_BUSY,
 					   &wifi_busy);
@@ -6010,8 +4628,9 @@ void ex_halbtc8723d1ant_bt_info_notify(IN struct btc_coexist *btcoexist,
 			btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_LINK, &wifi_link);
 			btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_ROAM, &wifi_roam);
 
-			if ((wifi_link) || (wifi_roam) || (wifi_scan) ||
-			    (coex_sta->wifi_is_high_pri_task) || (wifi_busy)) {
+			if (wifi_link || wifi_roam ||
+			    coex_sta->wifi_in_scan_task ||
+			    coex_sta->wifi_is_high_pri_task || wifi_busy) {
 
 				is_scoreboard_scan = TRUE;
 				halbtc8723d1ant_post_state_to_bt(btcoexist,
@@ -6087,25 +4706,61 @@ void ex_halbtc8723d1ant_wl_fwdbginfo_notify(IN struct btc_coexist *btcoexist,
 				       IN u8 *tmp_buf, IN u8 length)
 {
 	u8 i = 0;
-	static u8 tmp_buf_pre[10] = {0, 0, 0, 0, 0, 0, 0, 0, 0, 0};
+	static u8 tmp_buf_pre[10], cnt;
+	u8 h2c_parameter[2] = {0};
 
 	BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-			    "[BTCoex], WiFi Fw Dbg info = %d %d %d %d %d %d (len = %d)\n",
-			    tmp_buf[0], tmp_buf[1],
-			    tmp_buf[2], tmp_buf[3],
-			    tmp_buf[4], tmp_buf[5], length);
+		    "[BTCoex], WiFi Fw Dbg info = %d %d %d %d %d %d %d %d (len = %d)\n",
+		    tmp_buf[0], tmp_buf[1], tmp_buf[2], tmp_buf[3], tmp_buf[4],
+		    tmp_buf[5], tmp_buf[6], tmp_buf[7], length);
 	BTC_TRACE(trace_buf);
 
 	if (tmp_buf[0] == 0x8) {
-		for (i = 1; i <= 5; i++) {
+		for (i = 1; i <= 7; i++) {
 			coex_sta->wl_fw_dbg_info[i] =
 				(tmp_buf[i] >= tmp_buf_pre[i]) ?
-				(tmp_buf[i] - tmp_buf_pre[i]) :
-				(255 - tmp_buf_pre[i] + tmp_buf[i]);
+					(tmp_buf[i] - tmp_buf_pre[i]) :
+					(255 - tmp_buf_pre[i] + tmp_buf[i]);
 
 			tmp_buf_pre[i] = tmp_buf[i];
 		}
 	}
+
+	if (!coex_sta->is_no_wl_5ms_extend && coex_sta->force_lps_ctrl &&
+	    !coex_sta->cck_lock_ever) {
+		if (coex_sta->wl_fw_dbg_info[7] <= 5)
+			cnt++;
+		else
+			cnt = 0;
+
+		BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
+			    "[BTCoex], 5ms WL slot extend cnt = %d!!\n", cnt);
+		BTC_TRACE(trace_buf);
+
+		if (cnt == 7) {
+			BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
+				    "[BTCoex], set h2c 0x69 opcode 12 to turn off 5ms WL slot extend!!\n");
+			BTC_TRACE(trace_buf);
+
+			h2c_parameter[0] = 0xc;
+			h2c_parameter[1] = 0x1;
+			btcoexist->btc_fill_h2c(btcoexist, 0x69, 2,
+						h2c_parameter);
+			coex_sta->is_no_wl_5ms_extend = TRUE;
+			cnt = 0;
+		}
+	}
+
+	if (coex_sta->is_no_wl_5ms_extend && coex_sta->cck_lock) {
+		BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
+			    "[BTCoex], set h2c 0x69 opcode 12 to turn on 5ms WL slot extend!!\n");
+		BTC_TRACE(trace_buf);
+
+		h2c_parameter[0] = 0xc;
+		h2c_parameter[1] = 0x0;
+		btcoexist->btc_fill_h2c(btcoexist, 0x69, 2, h2c_parameter);
+		coex_sta->is_no_wl_5ms_extend = FALSE;
+	}
 }
 
 void ex_halbtc8723d1ant_rx_rate_change_notify(IN struct btc_coexist *btcoexist,
@@ -6132,24 +4787,24 @@ void ex_halbtc8723d1ant_rx_rate_change_notify(IN struct btc_coexist *btcoexist,
 		BTC_TRACE(trace_buf);
 	}
 
-	if ((wifi_connected) &&
-		((coex_dm->bt_status ==  BT_8723D_1ANT_BT_STATUS_ACL_BUSY) ||
-		(coex_dm->bt_status ==  BT_8723D_1ANT_BT_STATUS_ACL_SCO_BUSY) ||
-		(coex_dm->bt_status == BT_8723D_1ANT_BT_STATUS_SCO_BUSY))) {
+	if (wifi_connected &&
+	    (coex_dm->bt_status ==  BT_8723D_1ANT_BT_STATUS_ACL_BUSY ||
+	     coex_dm->bt_status ==  BT_8723D_1ANT_BT_STATUS_ACL_SCO_BUSY ||
+	     coex_dm->bt_status == BT_8723D_1ANT_BT_STATUS_SCO_BUSY)) {
 
-		if ((coex_sta->wl_rx_rate == BTC_CCK_5_5) ||
-			(coex_sta->wl_rx_rate == BTC_OFDM_6) ||
-			(coex_sta->wl_rx_rate == BTC_MCS_0)) {
+		if (coex_sta->wl_rx_rate == BTC_CCK_5_5 ||
+		    coex_sta->wl_rx_rate == BTC_OFDM_6 ||
+		    coex_sta->wl_rx_rate == BTC_MCS_0) {
 
 			coex_sta->cck_lock_warn = TRUE;
 
 			BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
 				"[BTCoex], cck lock warning...\n");
 			BTC_TRACE(trace_buf);
-		} else if ((coex_sta->wl_rx_rate == BTC_CCK_1) ||
-			(coex_sta->wl_rx_rate == BTC_CCK_2) ||
-			(coex_sta->wl_rts_rx_rate == BTC_CCK_1) ||
-			(coex_sta->wl_rts_rx_rate == BTC_CCK_2)) {
+		} else if (coex_sta->wl_rx_rate == BTC_CCK_1 ||
+			   coex_sta->wl_rx_rate == BTC_CCK_2 ||
+			   coex_sta->wl_rts_rx_rate == BTC_CCK_1 ||
+			   coex_sta->wl_rts_rx_rate == BTC_CCK_2) {
 
 			coex_sta->cck_lock = TRUE;
 			coex_sta->cck_lock_ever = TRUE;
@@ -6166,10 +4821,10 @@ void ex_halbtc8723d1ant_rx_rate_change_notify(IN struct btc_coexist *btcoexist,
 			BTC_TRACE(trace_buf);
 		}
 	} else {
-		if ((coex_dm->bt_status ==
-			BT_8723D_1ANT_BT_STATUS_CONNECTED_IDLE) ||
-			(coex_dm->bt_status ==
-			BT_8723D_1ANT_BT_STATUS_NON_CONNECTED_IDLE)) {
+		if (coex_dm->bt_status ==
+		    BT_8723D_1ANT_BT_STATUS_CONNECTED_IDLE ||
+		    coex_dm->bt_status ==
+		    BT_8723D_1ANT_BT_STATUS_NON_CONNECTED_IDLE) {
 			coex_sta->cck_lock_warn = FALSE;
 			coex_sta->cck_lock = FALSE;
 		}
@@ -6251,6 +4906,8 @@ void ex_halbtc8723d1ant_halt_notify(IN struct btc_coexist *btcoexist)
 void ex_halbtc8723d1ant_pnp_notify(IN struct btc_coexist *btcoexist,
 				   IN u8 pnp_state)
 {
+	static u8 pre_pnp_state;
+
 	BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, "[BTCoex], Pnp notify\n");
 	BTC_TRACE(trace_buf);
 
@@ -6260,6 +4917,9 @@ void ex_halbtc8723d1ant_pnp_notify(IN struct btc_coexist *btcoexist,
 			    "[BTCoex], Pnp notify to SLEEP\n");
 		BTC_TRACE(trace_buf);
 
+		coex_sta->under_ips = FALSE;
+		coex_sta->under_lps = FALSE;
+
 		halbtc8723d1ant_post_state_to_bt(btcoexist,
 				BT_8723D_1ANT_SCOREBOARD_ACTIVE |
 				BT_8723D_1ANT_SCOREBOARD_ONOFF |
@@ -6280,19 +4940,31 @@ void ex_halbtc8723d1ant_pnp_notify(IN struct btc_coexist *btcoexist,
 		}
 
 		btcoexist->stop_coex_dm = TRUE;
-	} else if (BTC_WIFI_PNP_WAKE_UP == pnp_state) {
+	} else {
 
 		BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
 			    "[BTCoex], Pnp notify to WAKE UP\n");
 		BTC_TRACE(trace_buf);
+
+		coex_sta->pnp_awake_period_cnt = 3;
+
+		/*WoWLAN*/
+		if (pre_pnp_state == BTC_WIFI_PNP_SLEEP_KEEP_ANT ||
+		    pnp_state == BTC_WIFI_PNP_WOWLAN) {
+			coex_sta->run_time_state = TRUE;
+			btcoexist->stop_coex_dm = FALSE;
+			halbtc8723d1ant_run_coexist_mechanism(btcoexist);
+		}
 #if 0
 		halbtc8723d1ant_post_state_to_bt(btcoexist,
 					 BT_8723D_1ANT_SCOREBOARD_ACTIVE, TRUE);
 		halbtc8723d1ant_post_state_to_bt(btcoexist,
 					 BT_8723D_1ANT_SCOREBOARD_ONOFF, TRUE);
 #endif
-		btcoexist->stop_coex_dm = FALSE;
+		/*btcoexist->stop_coex_dm = FALSE;*/
 	}
+
+	pre_pnp_state = pnp_state;
 }
 
 
@@ -6334,7 +5006,7 @@ void ex_halbtc8723d1ant_periodical(IN struct btc_coexist *btcoexist)
 		coex_sta->bt_relink_downcount--;
 
 		if (coex_sta->bt_relink_downcount == 0) {
-			coex_sta->is_setupLink = FALSE;
+			coex_sta->is_setup_link = FALSE;
 			bt_relink_finish = TRUE;
 		}
 	}
@@ -6347,48 +5019,24 @@ void ex_halbtc8723d1ant_periodical(IN struct btc_coexist *btcoexist)
 		if ((coex_sta->specific_pkt_period_cnt == 0) &&
 		    (coex_sta->wifi_is_high_pri_task))
 			coex_sta->wifi_is_high_pri_task = FALSE;
-
 		special_pkt_finish = TRUE;
 	}
 
+	if (coex_sta->pnp_awake_period_cnt > 0)
+		coex_sta->pnp_awake_period_cnt--;
+
+	BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
+		    "[BTCoex], pnp_awake_period_cnt = %d\n",
+				coex_sta->pnp_awake_period_cnt);
+	BTC_TRACE(trace_buf);
+
 	/*for A2DP glitch during connecting AP*/
 	if (coex_sta->connect_ap_period_cnt > 0)
 		coex_sta->connect_ap_period_cnt--;
 
-	if (!coex_sta->bt_disabled) {
-
-#if BT_8723D_1ANT_ANTDET_ENABLE
-
-		if (board_info->btdm_ant_det_finish) {
-			if ((psd_scan->ant_det_result == 12) &&
-			    (psd_scan->ant_det_psd_scan_peak_val == 0)
-			    && (!psd_scan->is_AntDet_running)) {
-				psd_scan->ant_det_psd_scan_peak_val =
-					btcoexist->btc_get_ant_det_val_from_bt(
-					btcoexist) * 100;
-
-				board_info->antdetval = psd_scan->ant_det_psd_scan_peak_val/100;
-				value = board_info->antdetval;
-
-#ifdef PLATFORM_WINDOWS
-				{
-					PWCHAR	registryName;
-
-					registryName = L"antdetval";
-					PlatformWriteCommonDwordRegistry(registryName, &value);
-				}
-#endif
-			}
-		}
-
-#endif
-	}
-
-	if (halbtc8723d1ant_is_wifibt_status_changed(btcoexist) || (bt_relink_finish)
-		|| (special_pkt_finish))
+	if (halbtc8723d1ant_is_wifibt_status_changed(btcoexist) ||
+	    bt_relink_finish || special_pkt_finish)
 		halbtc8723d1ant_run_coexist_mechanism(btcoexist);
-
-
 }
 
 void ex_halbtc8723d1ant_set_antenna_notify(IN struct btc_coexist *btcoexist,
@@ -6426,156 +5074,12 @@ void ex_halbtc8723d1ant_antenna_detection(IN struct btc_coexist *btcoexist,
 	BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
 		    "xxxxxxxxxxxxxxxx Ext Call AntennaDetect()!!\n");
 	BTC_TRACE(trace_buf);
-
-#if BT_8723D_1ANT_ANTDET_ENABLE
-
-	BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-		    "xxxxxxxxxxxxxxxx Call AntennaDetect()!!\n");
-	BTC_TRACE(trace_buf);
-
-	if (seconds == 0) {
-		psd_scan->ant_det_try_count	= 0;
-		psd_scan->ant_det_fail_count	= 0;
-		ant_det_count = 0;
-		ant_det_fail_count = 0;
-		board_info->btdm_ant_det_finish = FALSE;
-		board_info->btdm_ant_num_by_ant_det = 1;
-		return;
-	}
-
-	if (!board_info->btdm_ant_det_finish) {
-		psd_scan->ant_det_inteval_count =
-			psd_scan->ant_det_inteval_count + 2;
-
-		if (psd_scan->ant_det_inteval_count >=
-		    BT_8723D_2ANT_ANTDET_RETRY_INTERVAL) {
-			BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-				"xxxxxxxxxxxxxxxx AntennaDetect(), Antenna Det Timer is up, Try Detect!!\n");
-			BTC_TRACE(trace_buf);
-
-			psd_scan->is_AntDet_running = TRUE;
-
-			halbtc8723d1ant_read_score_board(btcoexist,	&u16tmp);
-
-			if (u16tmp & BIT(
-				2)) { /* Antenna detection is already done before last WL power on   */
-				board_info->btdm_ant_det_finish = TRUE;
-				psd_scan->ant_det_try_count = 1;
-				psd_scan->ant_det_fail_count = 0;
-				board_info->btdm_ant_num_by_ant_det = (u16tmp &
-							       BIT(3)) ? 1 : 2;
-				psd_scan->ant_det_result = 12;
-
-				psd_scan->ant_det_psd_scan_peak_val =
-					btcoexist->btc_get_ant_det_val_from_bt(
-						btcoexist) * 100;
-
-				BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-					"xxxxxxxxxxxxxxxx AntennaDetect(), Antenna Det Result from BT (%d-Ant)\n",
-					board_info->btdm_ant_num_by_ant_det);
-				BTC_TRACE(trace_buf);
-			} else
-				board_info->btdm_ant_det_finish =
-					halbtc8723d1ant_psd_antenna_detection_check(
-						btcoexist);
-
-			board_info->ant_det_result = psd_scan->ant_det_result;
-			btcoexist->bdontenterLPS = FALSE;
-
-			if (board_info->btdm_ant_det_finish) {
-
-				BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-					"xxxxxxxxxxxxxxxx AntennaDetect(), Antenna Det Success!!\n");
-				BTC_TRACE(trace_buf);
-
-				if (board_info->btdm_ant_num_by_ant_det == 2) {
-					board_info->ant_div_cfg = TRUE;
-					halbtc8723d1ant_set_ant_path(btcoexist,
-						BTC_ANT_PATH_WIFI, FORCE_EXEC,
-						BT_8723D_1ANT_PHASE_2G_RUNTIME);
-				} else
-					halbtc8723d1ant_set_ant_path(btcoexist,
-						BTC_ANT_PATH_AUTO, FORCE_EXEC,
-						BT_8723D_1ANT_PHASE_2G_RUNTIME);
-
-				/*for 8723d, btc_set_bt_trx_mask is just used to
-					notify BT stop le tx and Ant Det Result , not set BT RF TRx Mask  */
-				if (psd_scan->ant_det_result != 12) {
-
-					AntDetval = (u8)(
-						psd_scan->ant_det_psd_scan_peak_val
-							    / 100) & 0x7f;
-
-					AntDetval =
-						(board_info->btdm_ant_num_by_ant_det
-						 == 1) ? (AntDetval | 0x80) :
-						AntDetval;
-					board_info->antdetval = AntDetval;
-
-					BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-						"xxxxxx AntennaDetect(), Ant Count = %d, PSD Val = %d\n",
-						    ((AntDetval &
-						      0x80) ? 1
-						     : 2), AntDetval
-						    & 0x7f);
-					BTC_TRACE(trace_buf);
-
-					if (btcoexist->btc_set_bt_trx_mask(
-						    btcoexist, AntDetval))
-						BTC_SPRINTF(trace_buf,
-							    BT_TMP_BUF_SIZE,
-							"xxxxxx AntennaDetect(), Notify BT stop le tx by set_bt_trx_mask ok!\n");
-					else
-						BTC_SPRINTF(trace_buf,
-							    BT_TMP_BUF_SIZE,
-							"xxxxxx AntennaDetect(), Notify BT stop le tx by set_bt_trx_mask fail!\n");
-
-					BTC_TRACE(trace_buf);
-				} else
-					board_info->antdetval =
-						psd_scan->ant_det_psd_scan_peak_val/100;
-
-				board_info->btdm_ant_det_complete_fail = FALSE;
-
-			} else {
-				BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-					"xxxxxxxxxxxxxxxx AntennaDetect(), Antenna Det Fail!!\n");
-				BTC_TRACE(trace_buf);
-
-				board_info->btdm_ant_det_complete_fail = TRUE;
-			}
-
-			psd_scan->ant_det_inteval_count = 0;
-			psd_scan->is_AntDet_running = FALSE;
-			/* stimulate coex running */
-			halbtc8723d1ant_run_coexist_mechanism(
-				btcoexist);
-			BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-				"xxxxxxxxxxxxxxxx AntennaDetect(), Stimulate Coex running\n!!");
-			BTC_TRACE(trace_buf);
-
-		} else {
-			BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-				"xxxxxxxxxxxxxxxx AntennaDetect(), Antenna Det Timer is not up! (%d)\n",
-				    psd_scan->ant_det_inteval_count);
-			BTC_TRACE(trace_buf);
-
-			if (psd_scan->ant_det_inteval_count == 8)
-				btcoexist->bdontenterLPS = TRUE;
-			else
-				btcoexist->bdontenterLPS = FALSE;
-		}
-
-	}
-#endif
-
-
 }
 
 
 void ex_halbtc8723d1ant_display_ant_detection(IN struct btc_coexist *btcoexist)
 {
-#if BT_8723D_1ANT_ANTDET_ENABLE
+#if 0
 	struct  btc_board_info	*board_info = &btcoexist->board_info;
 
 	if (psd_scan->ant_det_try_count != 0)	{
diff --git a/rtl8723DS/hal/btc/halbtc8723d1ant.h b/rtl8723DS/hal/btc/halbtc8723d1ant.h
index c1b986e..b24b9b0 100755..100644
--- a/rtl8723DS/hal/btc/halbtc8723d1ant.h
+++ b/rtl8723DS/hal/btc/halbtc8723d1ant.h
@@ -24,9 +24,9 @@
 #define	BT_8723D_1ANT_COEX_DBG					0
 #define	BT_AUTO_REPORT_ONLY_8723D_1ANT				1
 
-#define	BT_INFO_8723D_1ANT_B_FTP						BIT(7)
-#define	BT_INFO_8723D_1ANT_B_A2DP					BIT(6)
-#define	BT_INFO_8723D_1ANT_B_HID						BIT(5)
+#define	BT_INFO_8723D_1ANT_B_FTP				BIT(7)
+#define	BT_INFO_8723D_1ANT_B_A2DP				BIT(6)
+#define	BT_INFO_8723D_1ANT_B_HID				BIT(5)
 #define	BT_INFO_8723D_1ANT_B_SCO_BUSY				BIT(4)
 #define	BT_INFO_8723D_1ANT_B_ACL_BUSY				BIT(3)
 #define	BT_INFO_8723D_1ANT_B_INQ_PAGE				BIT(2)
@@ -38,67 +38,67 @@
 
 #define	BTC_RSSI_COEX_THRESH_TOL_8723D_1ANT		2
 
-#define  BT_8723D_1ANT_WIFI_NOISY_THRESH							30   /* max: 255 */
-#define  BT_8723D_1ANT_DEFAULT_ISOLATION						15	 /*  unit: dB */
+#define  BT_8723D_1ANT_WIFI_NOISY_THRESH			30 /*max: 255*/
+#define  BT_8723D_1ANT_DEFAULT_ISOLATION			15 /*unit: dB*/
 
 
 /* for Antenna detection */
-#define	BT_8723D_1ANT_ANTDET_PSDTHRES_BACKGROUND					50
-#define	BT_8723D_1ANT_ANTDET_PSDTHRES_2ANT_BADISOLATION				70
-#define	BT_8723D_1ANT_ANTDET_PSDTHRES_2ANT_GOODISOLATION			55
-#define	BT_8723D_1ANT_ANTDET_PSDTHRES_1ANT							35
-#define	BT_8723D_1ANT_ANTDET_RETRY_INTERVAL							10	/* retry timer if ant det is fail, unit: second */
-#define	BT_8723D_1ANT_ANTDET_SWEEPPOINT_DELAY							60000
-#define	BT_8723D_1ANT_ANTDET_ENABLE									1
-#define	BT_8723D_1ANT_ANTDET_BTTXTIME									100
-#define	BT_8723D_1ANT_ANTDET_BTTXCHANNEL								39
-#define	BT_8723D_1ANT_ANTDET_PSD_SWWEEPCOUNT						50
+#define	BT_8723D_1ANT_ANTDET_PSDTHRES_BACKGROUND			50
+#define	BT_8723D_1ANT_ANTDET_PSDTHRES_2ANT_BADISOLATION			70
+#define	BT_8723D_1ANT_ANTDET_PSDTHRES_2ANT_GOODISOLATION		55
+#define	BT_8723D_1ANT_ANTDET_PSDTHRES_1ANT				35
+#define	BT_8723D_1ANT_ANTDET_RETRY_INTERVAL				10
+#define	BT_8723D_1ANT_ANTDET_SWEEPPOINT_DELAY				60000
+#define	BT_8723D_1ANT_ANTDET_ENABLE					0
+#define	BT_8723D_1ANT_ANTDET_BTTXTIME					100
+#define	BT_8723D_1ANT_ANTDET_BTTXCHANNEL				39
+#define	BT_8723D_1ANT_ANTDET_PSD_SWWEEPCOUNT				50
 
 #define	BT_8723D_1ANT_LTECOEX_INDIRECTREG_ACCESS_TIMEOUT		30000
 
 enum bt_8723d_1ant_signal_state {
-	BT_8723D_1ANT_SIG_STA_SET_TO_LOW		= 0x0,
+	BT_8723D_1ANT_SIG_STA_SET_TO_LOW	= 0x0,
 	BT_8723D_1ANT_SIG_STA_SET_BY_HW		= 0x0,
-	BT_8723D_1ANT_SIG_STA_SET_TO_HIGH		= 0x1,
+	BT_8723D_1ANT_SIG_STA_SET_TO_HIGH	= 0x1,
 	BT_8723D_1ANT_SIG_STA_MAX
 };
 
 enum bt_8723d_1ant_path_ctrl_owner {
 	BT_8723D_1ANT_PCO_BTSIDE		= 0x0,
-	BT_8723D_1ANT_PCO_WLSIDE	= 0x1,
+	BT_8723D_1ANT_PCO_WLSIDE		= 0x1,
 	BT_8723D_1ANT_PCO_MAX
 };
 
 enum bt_8723d_1ant_gnt_ctrl_type {
-	BT_8723D_1ANT_GNT_TYPE_CTRL_BY_PTA		= 0x0,
-	BT_8723D_1ANT_GNT_TYPE_CTRL_BY_SW		= 0x1,
+	BT_8723D_1ANT_GNT_TYPE_CTRL_BY_PTA	= 0x0,
+	BT_8723D_1ANT_GNT_TYPE_CTRL_BY_SW	= 0x1,
 	BT_8723D_1ANT_GNT_TYPE_MAX
 };
 
 enum bt_8723d_1ant_gnt_ctrl_block {
 	BT_8723D_1ANT_GNT_BLOCK_RFC_BB		= 0x0,
-	BT_8723D_1ANT_GNT_BLOCK_RFC			= 0x1,
-	BT_8723D_1ANT_GNT_BLOCK_BB			= 0x2,
+	BT_8723D_1ANT_GNT_BLOCK_RFC		= 0x1,
+	BT_8723D_1ANT_GNT_BLOCK_BB		= 0x2,
 	BT_8723D_1ANT_GNT_BLOCK_MAX
 };
 
 enum bt_8723d_1ant_lte_coex_table_type {
-	BT_8723D_1ANT_CTT_WL_VS_LTE			= 0x0,
-	BT_8723D_1ANT_CTT_BT_VS_LTE			= 0x1,
+	BT_8723D_1ANT_CTT_WL_VS_LTE		= 0x0,
+	BT_8723D_1ANT_CTT_BT_VS_LTE		= 0x1,
 	BT_8723D_1ANT_CTT_MAX
 };
 
 enum bt_8723d_1ant_lte_break_table_type {
-	BT_8723D_1ANT_LBTT_WL_BREAK_LTE			= 0x0,
-	BT_8723D_1ANT_LBTT_BT_BREAK_LTE				= 0x1,
-	BT_8723D_1ANT_LBTT_LTE_BREAK_WL			= 0x2,
-	BT_8723D_1ANT_LBTT_LTE_BREAK_BT				= 0x3,
+	BT_8723D_1ANT_LBTT_WL_BREAK_LTE		= 0x0,
+	BT_8723D_1ANT_LBTT_BT_BREAK_LTE		= 0x1,
+	BT_8723D_1ANT_LBTT_LTE_BREAK_WL		= 0x2,
+	BT_8723D_1ANT_LBTT_LTE_BREAK_BT		= 0x3,
 	BT_8723D_1ANT_LBTT_MAX
 };
 
 enum bt_info_src_8723d_1ant {
 	BT_INFO_SRC_8723D_1ANT_WIFI_FW			= 0x0,
-	BT_INFO_SRC_8723D_1ANT_BT_RSP				= 0x1,
+	BT_INFO_SRC_8723D_1ANT_BT_RSP			= 0x1,
 	BT_INFO_SRC_8723D_1ANT_BT_ACTIVE_SEND		= 0x2,
 	BT_INFO_SRC_8723D_1ANT_MAX
 };
@@ -106,20 +106,20 @@ enum bt_info_src_8723d_1ant {
 enum bt_8723d_1ant_bt_status {
 	BT_8723D_1ANT_BT_STATUS_NON_CONNECTED_IDLE	= 0x0,
 	BT_8723D_1ANT_BT_STATUS_CONNECTED_IDLE		= 0x1,
-	BT_8723D_1ANT_BT_STATUS_INQ_PAGE				= 0x2,
-	BT_8723D_1ANT_BT_STATUS_ACL_BUSY				= 0x3,
-	BT_8723D_1ANT_BT_STATUS_SCO_BUSY				= 0x4,
-	BT_8723D_1ANT_BT_STATUS_ACL_SCO_BUSY			= 0x5,
+	BT_8723D_1ANT_BT_STATUS_INQ_PAGE		= 0x2,
+	BT_8723D_1ANT_BT_STATUS_ACL_BUSY		= 0x3,
+	BT_8723D_1ANT_BT_STATUS_SCO_BUSY		= 0x4,
+	BT_8723D_1ANT_BT_STATUS_ACL_SCO_BUSY		= 0x5,
 	BT_8723D_1ANT_BT_STATUS_MAX
 };
 
 enum bt_8723d_1ant_wifi_status {
-	BT_8723D_1ANT_WIFI_STATUS_NON_CONNECTED_IDLE				= 0x0,
-	BT_8723D_1ANT_WIFI_STATUS_NON_CONNECTED_ASSO_AUTH_SCAN		= 0x1,
-	BT_8723D_1ANT_WIFI_STATUS_CONNECTED_SCAN					= 0x2,
-	BT_8723D_1ANT_WIFI_STATUS_CONNECTED_SPECIFIC_PKT				= 0x3,
-	BT_8723D_1ANT_WIFI_STATUS_CONNECTED_IDLE					= 0x4,
-	BT_8723D_1ANT_WIFI_STATUS_CONNECTED_BUSY					= 0x5,
+	BT_8723D_1ANT_WIFI_STATUS_NON_CONNECTED_IDLE		= 0x0,
+	BT_8723D_1ANT_WIFI_STATUS_NON_CONNECTED_ASSO_AUTH_SCAN	= 0x1,
+	BT_8723D_1ANT_WIFI_STATUS_CONNECTED_SCAN		= 0x2,
+	BT_8723D_1ANT_WIFI_STATUS_CONNECTED_SPECIFIC_PKT	= 0x3,
+	BT_8723D_1ANT_WIFI_STATUS_CONNECTED_IDLE		= 0x4,
+	BT_8723D_1ANT_WIFI_STATUS_CONNECTED_BUSY		= 0x5,
 	BT_8723D_1ANT_WIFI_STATUS_MAX
 };
 
@@ -128,36 +128,37 @@ enum bt_8723d_1ant_coex_algo {
 	BT_8723D_1ANT_COEX_ALGO_SCO				= 0x1,
 	BT_8723D_1ANT_COEX_ALGO_HID				= 0x2,
 	BT_8723D_1ANT_COEX_ALGO_A2DP				= 0x3,
-	BT_8723D_1ANT_COEX_ALGO_A2DP_PANHS		= 0x4,
-	BT_8723D_1ANT_COEX_ALGO_PANEDR			= 0x5,
-	BT_8723D_1ANT_COEX_ALGO_PANHS			= 0x6,
-	BT_8723D_1ANT_COEX_ALGO_PANEDR_A2DP		= 0x7,
-	BT_8723D_1ANT_COEX_ALGO_PANEDR_HID		= 0x8,
-	BT_8723D_1ANT_COEX_ALGO_HID_A2DP_PANEDR	= 0x9,
+	BT_8723D_1ANT_COEX_ALGO_A2DP_PANHS			= 0x4,
+	BT_8723D_1ANT_COEX_ALGO_PANEDR				= 0x5,
+	BT_8723D_1ANT_COEX_ALGO_PANHS				= 0x6,
+	BT_8723D_1ANT_COEX_ALGO_PANEDR_A2DP			= 0x7,
+	BT_8723D_1ANT_COEX_ALGO_PANEDR_HID			= 0x8,
+	BT_8723D_1ANT_COEX_ALGO_HID_A2DP_PANEDR			= 0x9,
 	BT_8723D_1ANT_COEX_ALGO_HID_A2DP			= 0xa,
 	BT_8723D_1ANT_COEX_ALGO_MAX				= 0xb,
 };
 
 enum bt_8723d_1ant_phase {
-	BT_8723D_1ANT_PHASE_COEX_INIT								= 0x0,
-	BT_8723D_1ANT_PHASE_WLANONLY_INIT							= 0x1,
-	BT_8723D_1ANT_PHASE_WLAN_OFF								= 0x2,
-	BT_8723D_1ANT_PHASE_2G_RUNTIME								= 0x3,
-	BT_8723D_1ANT_PHASE_5G_RUNTIME								= 0x4,
-	BT_8723D_1ANT_PHASE_BTMPMODE								= 0x5,
-	BT_8723D_1ANT_PHASE_ANTENNA_DET								= 0x6,
-	BT_8723D_1ANT_PHASE_COEX_POWERON							= 0x7,
+	BT_8723D_1ANT_PHASE_COEX_INIT				= 0x0,
+	BT_8723D_1ANT_PHASE_WLANONLY_INIT			= 0x1,
+	BT_8723D_1ANT_PHASE_WLAN_OFF				= 0x2,
+	BT_8723D_1ANT_PHASE_2G_RUNTIME				= 0x3,
+	BT_8723D_1ANT_PHASE_5G_RUNTIME				= 0x4,
+	BT_8723D_1ANT_PHASE_BTMPMODE				= 0x5,
+	BT_8723D_1ANT_PHASE_ANTENNA_DET				= 0x6,
+	BT_8723D_1ANT_PHASE_COEX_POWERON			= 0x7,
 	BT_8723D_1ANT_PHASE_MAX
 };
 
 enum bt_8723d_1ant_Scoreboard {
-	BT_8723D_1ANT_SCOREBOARD_ACTIVE								= BIT(0),
-	BT_8723D_1ANT_SCOREBOARD_ONOFF								= BIT(1),
-	BT_8723D_1ANT_SCOREBOARD_SCAN								= BIT(2),
-	BT_8723D_1ANT_SCOREBOARD_UNDERTEST							= BIT(3),
-	BT_8723D_1ANT_SCOREBOARD_RXGAIN								= BIT(4),
-	BT_8723D_1ANT_SCOREBOARD_DKTOPP2M							= BIT(5),
-	BT_8723D_1ANT_SCOREBOARD_WLBUSY								= BIT(6)
+	BT_8723D_1ANT_SCOREBOARD_ACTIVE				= BIT(0),
+	BT_8723D_1ANT_SCOREBOARD_ONOFF				= BIT(1),
+	BT_8723D_1ANT_SCOREBOARD_SCAN				= BIT(2),
+	BT_8723D_1ANT_SCOREBOARD_UNDERTEST			= BIT(3),
+	BT_8723D_1ANT_SCOREBOARD_RXGAIN				= BIT(4),
+	BT_8723D_1ANT_SCOREBOARD_DKTOPP2M			= BIT(5),
+	BT_8723D_1ANT_SCOREBOARD_WLBUSY				= BIT(6),
+	BT_8723D_1ANT_SCOREBOARD_TDMA				= BIT(9),
 };
 
 struct coex_dm_8723d_1ant {
@@ -167,11 +168,9 @@ struct coex_dm_8723d_1ant {
 	/* fw mechanism */
 	boolean		cur_ignore_wlan_act;
 	boolean		pre_ignore_wlan_act;
-	u8		pre_ps_tdma;
 	u8		cur_ps_tdma;
 	u8		ps_tdma_para[5];
 	u8		ps_tdma_du_adj_type;
-	boolean		pre_ps_tdma_on;
 	boolean		cur_ps_tdma_on;
 	boolean		pre_bt_auto_report;
 	boolean		cur_bt_auto_report;
@@ -183,18 +182,14 @@ struct coex_dm_8723d_1ant {
 	/* sw mechanism */
 	boolean	pre_low_penalty_ra;
 	boolean		cur_low_penalty_ra;
-	u32		pre_val0x6c0;
 	u32		cur_val0x6c0;
-	u32		pre_val0x6c4;
 	u32		cur_val0x6c4;
-	u32		pre_val0x6c8;
 	u32		cur_val0x6c8;
-	u8		pre_val0x6cc;
 	u8		cur_val0x6cc;
 	boolean		limited_dig;
 
-	u32		backup_arfr_cnt1;	/* Auto Rate Fallback Retry cnt */
-	u32		backup_arfr_cnt2;	/* Auto Rate Fallback Retry cnt */
+	u32		backup_arfr_cnt1;
+	u32		backup_arfr_cnt2;
 	u16		backup_retry_limit;
 	u8		backup_ampdu_max_time;
 
@@ -215,170 +210,183 @@ struct coex_dm_8723d_1ant {
 	u32		arp_cnt;
 
 	u8		error_condition;
+	u32		setting_tdma;
 };
 
 struct coex_sta_8723d_1ant {
-	boolean				bt_disabled;
-	boolean				bt_link_exist;
-	boolean				sco_exist;
-	boolean				a2dp_exist;
-	boolean				hid_exist;
-	boolean				pan_exist;
-	boolean				bt_hi_pri_link_exist;
-	u8					num_of_profile;
-
-	boolean				under_lps;
-	boolean				under_ips;
-	u32					specific_pkt_period_cnt;
-	u8					connect_ap_period_cnt;
-	u32					high_priority_tx;
-	u32					high_priority_rx;
-	u32					low_priority_tx;
-	u32					low_priority_rx;
-	boolean             is_hiPri_rx_overhead;
-	s8					bt_rssi;
-	boolean				bt_tx_rx_mask;
-	u8					pre_bt_rssi_state;
-	u8					pre_wifi_rssi_state[4];
-	u8					bt_info_c2h[BT_INFO_SRC_8723D_1ANT_MAX][10];
-	u32					bt_info_c2h_cnt[BT_INFO_SRC_8723D_1ANT_MAX];
-	boolean				bt_whck_test;
-	boolean				c2h_bt_inquiry_page;
-	boolean				c2h_bt_remote_name_req;
-	boolean				c2h_bt_page;				/* Add for win8.1 page out issue */
-	boolean				wifi_is_high_pri_task;		/* Add for win8.1 page out issue */
-	u8					bt_retry_cnt;
-	u8					bt_info_ext;
-	u8					bt_info_ext2;
-	u32					pop_event_cnt;
-	u8					scan_ap_num;
-
-	u32					crc_ok_cck;
-	u32					crc_ok_11g;
-	u32					crc_ok_11n;
-	u32					crc_ok_11n_vht;
-
-	u32					crc_err_cck;
-	u32					crc_err_11g;
-	u32					crc_err_11n;
-	u32					crc_err_11n_vht;
-
-	boolean				cck_lock;
-	boolean				cck_lock_ever;
-	boolean				cck_lock_warn;
-
-	u8					coex_table_type;
-	boolean				force_lps_ctrl;
-	boolean				concurrent_rx_mode_on;
-
-	u16					score_board;
-	u8					isolation_btween_wb;   /* 0~ 50 */
-
-	u8					a2dp_bit_pool;
-	u8					cut_version;
-	boolean				acl_busy;
-	boolean				bt_create_connection;
-
-	u32					bt_coex_supported_feature;
-	u32					bt_coex_supported_version;
-
-	u8					bt_ble_scan_type;
-	u32					bt_ble_scan_para[3];
-
-	boolean				run_time_state;
-	boolean				freeze_coexrun_by_btinfo;
-
-	boolean				is_A2DP_3M;
-	boolean				voice_over_HOGP;
-	u8                  bt_info;
-	boolean				is_autoslot;
-	u8					forbidden_slot;
-	u8					hid_busy_num;
-	u8					hid_pair_cnt;
-
-	u32					cnt_RemoteNameReq;
-	u32					cnt_setupLink;
-	u32					cnt_ReInit;
-	u32					cnt_IgnWlanAct;
-	u32					cnt_Page;
-	u32					cnt_RoleSwitch;
-
-	u16					bt_reg_vendor_ac;
-	u16					bt_reg_vendor_ae;
-
-	boolean				is_setupLink;
-	u8					wl_noisy_level;
-	u32                 gnt_error_cnt;
-
-	u8					bt_afh_map[10];
-	u8					bt_relink_downcount;
-	boolean				is_tdma_btautoslot;
-	boolean				is_tdma_btautoslot_hang;
-
-	boolean				is_rf_state_off;
-
-	boolean				is_hid_low_pri_tx_overhead;
-	boolean				is_bt_multi_link;
-	boolean				is_bt_a2dp_sink;
-
-	u8					wl_fw_dbg_info[10];
-	u8					wl_rx_rate;
-	u8					wl_rts_rx_rate;
-
-	u16					score_board_WB;
-
-	boolean				is_hid_rcu;
-	boolean				is_ble_scan_toggle;
-
-	u16					legacy_forbidden_slot;
-	u16					le_forbidden_slot;
-	u8					bt_a2dp_vendor_id;
-	u32					bt_a2dp_device_name;
-	boolean				is_bt_opp_exist;
+	boolean		bt_disabled;
+	boolean		bt_link_exist;
+	boolean		sco_exist;
+	boolean		a2dp_exist;
+	boolean		hid_exist;
+	boolean		pan_exist;
+	boolean		bt_hi_pri_link_exist;
+	u8		num_of_profile;
+
+	boolean		under_lps;
+	boolean		under_ips;
+	u32		specific_pkt_period_cnt;
+	u8		connect_ap_period_cnt;
+	u8		pnp_awake_period_cnt;
+	u32		high_priority_tx;
+	u32		high_priority_rx;
+	u32		low_priority_tx;
+	u32		low_priority_rx;
+	boolean		is_hipri_rx_overhead;
+	s8		bt_rssi;
+	boolean		bt_tx_rx_mask;
+	u8		pre_bt_rssi_state;
+	u8		pre_wifi_rssi_state[4];
+	u8		bt_info_c2h[BT_INFO_SRC_8723D_1ANT_MAX][10];
+	u32		bt_info_c2h_cnt[BT_INFO_SRC_8723D_1ANT_MAX];
+	boolean		bt_whck_test;
+	boolean		c2h_bt_inquiry_page;
+	boolean		c2h_bt_remote_name_req;
+	boolean		c2h_bt_page;
+	boolean		wifi_is_high_pri_task;
+	boolean		wifi_in_scan_task;
+	u8		bt_retry_cnt;
+	u8		bt_info_ext;
+	u8		bt_info_ext2;
+	u32		pop_event_cnt;
+	u8		scan_ap_num;
+
+	u32		crc_ok_cck;
+	u32		crc_ok_11g;
+	u32		crc_ok_11n;
+	u32		crc_ok_11n_vht;
+
+	u32		crc_err_cck;
+	u32		crc_err_11g;
+	u32		crc_err_11n;
+	u32		crc_err_11n_vht;
+
+	boolean		cck_lock;
+	boolean		cck_lock_ever;
+	boolean		cck_lock_warn;
+
+	u8		coex_table_type;
+	boolean		force_lps_ctrl;
+	boolean		concurrent_rx_mode_on;
+
+	u16		score_board;
+	u8		isolation_btween_wb;   /* 0~ 50 */
+
+	u8		a2dp_bit_pool;
+	u8		kt_ver;
+	boolean		acl_busy;
+	boolean		bt_create_connection;
+
+	u32		bt_coex_supported_feature;
+	u32		bt_coex_supported_version;
+
+	u8		bt_ble_scan_type;
+	u32		bt_ble_scan_para[3];
+
+	boolean		run_time_state;
+	boolean		freeze_coexrun_by_btinfo;
+
+	boolean		is_A2DP_3M;
+	boolean		voice_over_HOGP;
+	u8		bt_info;
+	u8		forbidden_slot;
+	u8		hid_busy_num;
+	u8		hid_pair_cnt;
+
+	u32		cnt_remotenamereq;
+	u32		cnt_setuplink;
+	u32		cnt_reinit;
+	u32		cnt_ignwlanact;
+	u32		cnt_page;
+	u32		cnt_roleswitch;
+
+	u16		bt_reg_vendor_ac;
+	u16		bt_reg_vendor_ae;
+
+	boolean		is_setup_link;
+	u8		wl_noisy_level;
+	u32		gnt_error_cnt;
+
+	u8		bt_afh_map[10];
+	u8		bt_relink_downcount;
+	boolean		is_tdma_btautoslot;
+	boolean		is_tdma_btautoslot_hang;
+
+	boolean		is_rf_state_off;
+
+	boolean		is_hid_low_pri_tx_overhead;
+	boolean		is_bt_multi_link;
+	boolean		is_bt_a2dp_sink;
+
+	u8		wl_fw_dbg_info[10];
+	u8		wl_rx_rate;
+	u8		wl_rts_rx_rate;
+
+	u16		score_board_WB;
+
+	boolean		is_hid_rcu;
+	boolean		is_ble_scan_en;
+
+	u16		legacy_forbidden_slot;
+	u16		le_forbidden_slot;
+	u8		bt_a2dp_vendor_id;
+	u32		bt_a2dp_device_name;
+	boolean		is_bt_opp_exist;
+	boolean		is_no_wl_5ms_extend;
+
+	u16		wl_0x42a_backup;
+	u32		wl_0x430_backup;
+	u32		wl_0x434_backup;
+	u8		wl_0x456_backup;
+
+	boolean		wl_tx_limit_en;
+	boolean		wl_ampdu_limit_en;
+	boolean		wl_rxagg_limit_en;
+	u8		wl_rxagg_size;
 };
 
-#define  BT_8723D_1ANT_ANTDET_PSD_POINTS			256	/* MAX:1024 */
-#define  BT_8723D_1ANT_ANTDET_PSD_AVGNUM			1	/* MAX:3 */
-#define	BT_8723D_1ANT_ANTDET_BUF_LEN				16
+#define  BT_8723D_1ANT_ANTDET_PSD_POINTS			256
+#define  BT_8723D_1ANT_ANTDET_PSD_AVGNUM			1
+#define	BT_8723D_1ANT_ANTDET_BUF_LEN			16
 
 struct psdscan_sta_8723d_1ant {
 
-	u32			ant_det_bt_le_channel;  /* BT LE Channel ex:2412 */
-	u32			ant_det_bt_tx_time;
-	u32			ant_det_pre_psdscan_peak_val;
-	boolean			ant_det_is_ant_det_available;
-	u32			ant_det_psd_scan_peak_val;
-	boolean			ant_det_is_btreply_available;
-	u32			ant_det_psd_scan_peak_freq;
-
-	u8			ant_det_result;
-	u8			ant_det_peak_val[BT_8723D_1ANT_ANTDET_BUF_LEN];
-	u8			ant_det_peak_freq[BT_8723D_1ANT_ANTDET_BUF_LEN];
-	u32			ant_det_try_count;
-	u32			ant_det_fail_count;
-	u32			ant_det_inteval_count;
-	u32			ant_det_thres_offset;
-
-	u32			real_cent_freq;
-	s32			real_offset;
-	u32			real_span;
-
-	u32			psd_band_width;  /* unit: Hz */
-	u32			psd_point;		/* 128/256/512/1024 */
-	u32			psd_report[1024];  /* unit:dB (20logx), 0~255 */
-	u32			psd_report_max_hold[1024];  /* unit:dB (20logx), 0~255 */
-	u32			psd_start_point;
-	u32			psd_stop_point;
-	u32			psd_max_value_point;
-	u32			psd_max_value;
-	u32			psd_max_value2;
-	u32			psd_avg_value;   /* filter loop_max_value that below BT_8723D_1ANT_ANTDET_PSDTHRES_1ANT, and average the rest*/
-	u32			psd_loop_max_value[BT_8723D_1ANT_ANTDET_PSD_SWWEEPCOUNT];  /*max value in each loop */
-	u32			psd_start_base;
-	u32			psd_avg_num;	/* 1/8/16/32 */
-	u32			psd_gen_count;
-	boolean			is_AntDet_running;
-	boolean			is_psd_show_max_only;
+	u32	ant_det_bt_le_channel;  /* BT LE Channel ex:2412 */
+	u32	ant_det_bt_tx_time;
+	u32	ant_det_pre_psdscan_peak_val;
+	boolean	ant_det_is_ant_det_available;
+	u32	ant_det_psd_scan_peak_val;
+	boolean	ant_det_is_btreply_available;
+	u32	ant_det_psd_scan_peak_freq;
+
+	u8	ant_det_result;
+	u8	ant_det_peak_val[BT_8723D_1ANT_ANTDET_BUF_LEN];
+	u8	ant_det_peak_freq[BT_8723D_1ANT_ANTDET_BUF_LEN];
+	u32	ant_det_try_count;
+	u32	ant_det_fail_count;
+	u32	ant_det_inteval_count;
+	u32	ant_det_thres_offset;
+
+	u32	real_cent_freq;
+	s32	real_offset;
+	u32	real_span;
+
+	u32	psd_band_width;
+	u32	psd_point;
+	u32	psd_report[1024];
+	u32	psd_report_max_hold[1024];
+	u32	psd_start_point;
+	u32	psd_stop_point;
+	u32	psd_max_value_point;
+	u32	psd_max_value;
+	u32	psd_max_value2;
+	u32	psd_avg_value;
+	u32	psd_loop_max_value[BT_8723D_1ANT_ANTDET_PSD_SWWEEPCOUNT];
+	u32	psd_start_base;
+	u32	psd_avg_num;	/* 1/8/16/32 */
+	u32	psd_gen_count;
+	boolean	is_antdet_running;
+	boolean	is_psd_show_max_only;
 };
 
 /* *******************************************
diff --git a/rtl8723DS/hal/btc/halbtc8723d2ant.c b/rtl8723DS/hal/btc/halbtc8723d2ant.c
index 36cc109..66796b9 100755..100644
--- a/rtl8723DS/hal/btc/halbtc8723d2ant.c
+++ b/rtl8723DS/hal/btc/halbtc8723d2ant.c
@@ -47,28 +47,12 @@ const char *const glbt_info_src_8723d_2ant[] = {
 	"BT Info[bt rsp]",
 	"BT Info[bt auto report]",
 };
-/* ************************************************************
- * BtCoex Version Format:
- * 1. date :			glcoex_ver_date_XXXXX_1ant
- * 2. WifiCoexVersion : glcoex_ver_XXXX_1ant
- * 3. BtCoexVersion :	glcoex_ver_btdesired_XXXXX_1ant
- * 4. others :			glcoex_ver_XXXXXX_XXXXX_1ant
- *
- * Variable should be indicated IC and Antenna numbers !!!
- * Please strictly follow this order and naming style !!!
- *
- * ************************************************************ */
-u32	glcoex_ver_date_8723d_2ant = 20171212;
-u32	glcoex_ver_8723d_2ant = 0x22;
-u32 glcoex_ver_btdesired_8723d_2ant = 0x20;
 
+u32	glcoex_ver_date_8723d_2ant = 20181130;
+u32	glcoex_ver_8723d_2ant = 0x2e;
+u32	glcoex_ver_btdesired_8723d_2ant = 0x2d;
 
-/* ************************************************************
- * local function proto type if needed
- * ************************************************************
- * ************************************************************
- * local function start with halbtc8723d2ant_
- * ************************************************************ */
+static
 u8 halbtc8723d2ant_bt_rssi_state(IN struct btc_coexist *btcoexist,
 	u8 *ppre_bt_rssi_state, u8 level_num,
 	u8 rssi_thresh, u8 rssi_thresh1)
@@ -129,6 +113,7 @@ u8 halbtc8723d2ant_bt_rssi_state(IN struct btc_coexist *btcoexist,
 	return bt_rssi_state;
 }
 
+static
 u8 halbtc8723d2ant_wifi_rssi_state(IN struct btc_coexist *btcoexist,
 	   IN u8 *pprewifi_rssi_state, IN u8 level_num, IN u8 rssi_thresh,
 				   IN u8 rssi_thresh1)
@@ -189,6 +174,7 @@ u8 halbtc8723d2ant_wifi_rssi_state(IN struct btc_coexist *btcoexist,
 	return wifi_rssi_state;
 }
 
+static
 void halbtc8723d2ant_coex_switch_threshold(IN struct btc_coexist *btcoexist,
 		IN u8 isolation_measuared)
 {
@@ -207,61 +193,177 @@ void halbtc8723d2ant_coex_switch_threshold(IN struct btc_coexist *btcoexist,
 
 	coex_sta->bt_coex_thres		 = BT_8723D_2ANT_BT_RSSI_COEXSWITCH_THRES1;
 	coex_sta->bt_coex_thres2		 = BT_8723D_2ANT_BT_RSSI_COEXSWITCH_THRES2;
+}
 
+static void
+halbtc8723d2ant_limited_tx(struct btc_coexist *btcoexist, boolean force_exec,
+			   boolean tx_limit_en,  boolean ampdu_limit_en)
+{
+	boolean wifi_under_b_mode = FALSE;
+	u32	wifi_link_status = 0, num_of_wifi_link = 0;
 
-	/*
-		coex_sta->wifi_coex_thres		= interference_wl_tx + BT_8723D_2ANT_WIFI_SIR_THRES1;
-		coex_sta->wifi_coex_thres2		= interference_wl_tx + BT_8723D_2ANT_WIFI_SIR_THRES2;
+	btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_LINK_STATUS,
+			   &wifi_link_status);
 
-		coex_sta->bt_coex_thres		= interference_bt_tx + BT_8723D_2ANT_BT_SIR_THRES1;
-		coex_sta->bt_coex_thres2		= interference_bt_tx + BT_8723D_2ANT_BT_SIR_THRES2;
-	*/
+	num_of_wifi_link = wifi_link_status >> 16;
+
+	/* Force Max Tx retry limit = 8*/
+	if (!coex_sta->wl_tx_limit_en) {
+		coex_sta->wl_0x430_backup =
+			btcoexist->btc_read_4byte(btcoexist, 0x430);
+		coex_sta->wl_0x434_backup =
+			btcoexist->btc_read_4byte(btcoexist, 0x434);
+		coex_sta->wl_0x42a_backup =
+			btcoexist->btc_read_2byte(btcoexist, 0x42a);
+	}
 
+	if (!coex_sta->wl_ampdu_limit_en)
+		coex_sta->wl_0x456_backup = btcoexist->btc_read_1byte(btcoexist,
+								      0x456);
 
+	if (!force_exec && tx_limit_en == coex_sta->wl_tx_limit_en &&
+	    ampdu_limit_en == coex_sta->wl_ampdu_limit_en)
+		return;
 
+	coex_sta->wl_tx_limit_en = tx_limit_en;
+	coex_sta->wl_ampdu_limit_en = ampdu_limit_en;
+
+	if (tx_limit_en) {
+		/* Set BT polluted packet on for Tx rate adaptive not
+		 * including Tx retry break by PTA, 0x45c[19] =1
+		 *
+		 * Set queue life time to avoid can't reach tx retry limit
+		 * if tx is always break by GNT_BT.
+		 */
+		if ((wifi_link_status & WIFI_STA_CONNECTED) &&
+		     num_of_wifi_link == 1) {
+			btcoexist->btc_write_1byte_bitmask(btcoexist, 0x45e, 0x8, 0x1);
+			btcoexist->btc_write_1byte_bitmask(btcoexist, 0x426, 0xf, 0xf);
+		}
 
+		/* Max Tx retry limit = 8*/
+		btcoexist->btc_write_2byte(btcoexist, 0x42a, 0x0808);
 
-	/*
-		if  ( BT_8723D_2ANT_WIFI_RSSI_COEXSWITCH_THRES1 < (isolation_measuared -
-					BT_8723D_2ANT_DEFAULT_ISOLATION) )
-			coex_sta->wifi_coex_thres	 = BT_8723D_2ANT_WIFI_RSSI_COEXSWITCH_THRES1;
-		else
-			coex_sta->wifi_coex_thres =  BT_8723D_2ANT_WIFI_RSSI_COEXSWITCH_THRES1 -  (isolation_measuared -
-					BT_8723D_2ANT_DEFAULT_ISOLATION);
+		/* AMPDU duration limit*/
+		btcoexist->btc_write_1byte(btcoexist, 0x456, 0x20);
 
-		if  ( BT_8723D_2ANT_BT_RSSI_COEXSWITCH_THRES1 < (isolation_measuared -
-					BT_8723D_2ANT_DEFAULT_ISOLATION) )
-			coex_sta->bt_coex_thres	 = BT_8723D_2ANT_BT_RSSI_COEXSWITCH_THRES1;
-		else
-			coex_sta->bt_coex_thres =  BT_8723D_2ANT_BT_RSSI_COEXSWITCH_THRES1 -  (isolation_measuared -
-					BT_8723D_2ANT_DEFAULT_ISOLATION);
+		btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_UNDER_B_MODE,
+				   &wifi_under_b_mode);
 
-	*/
+		/* Auto rate fallback step within 8 retry*/
+		if (wifi_under_b_mode) {
+			btcoexist->btc_write_4byte(btcoexist, 0x430, 0x1000000);
+			btcoexist->btc_write_4byte(btcoexist, 0x434, 0x1010101);
+		} else {
+			btcoexist->btc_write_4byte(btcoexist, 0x430, 0x1000000);
+			btcoexist->btc_write_4byte(btcoexist, 0x434, 0x4030201);
+		}
+	} else {
+		/* Set BT polluted packet on for Tx rate adaptive not
+		 *including Tx retry break by PTA, 0x45c[19] =1
+		 */
+		btcoexist->btc_write_1byte_bitmask(btcoexist, 0x45e, 0x8, 0x0);
+
+		/* Set queue life time to avoid can't reach tx retry limit
+		 * if tx is always break by GNT_BT.
+		 */
+		if (num_of_wifi_link  == 1)
+			btcoexist->btc_write_1byte_bitmask(btcoexist, 0x426, 0xf, 0x0);
+
+		/* Recovery Max Tx retry limit*/
+		btcoexist->btc_write_2byte(btcoexist, 0x42a,
+					   coex_sta->wl_0x42a_backup);
+		btcoexist->btc_write_4byte(btcoexist, 0x430,
+					   coex_sta->wl_0x430_backup);
+		btcoexist->btc_write_4byte(btcoexist, 0x434,
+					   coex_sta->wl_0x434_backup);
+	}
+
+	if (ampdu_limit_en)
+		btcoexist->btc_write_1byte(btcoexist, 0x456, 0x20);
+	else
+		btcoexist->btc_write_1byte(btcoexist, 0x456,
+					   coex_sta->wl_0x456_backup);
 }
 
-
-void halbtc8723d2ant_limited_rx(IN struct btc_coexist *btcoexist,
-			IN boolean force_exec, IN boolean rej_ap_agg_pkt,
-			IN boolean bt_ctrl_agg_buf_size, IN u8 agg_buf_size)
+static void
+halbtc8723d2ant_limited_rx(struct btc_coexist *btcoexist, boolean force_exec,
+			   boolean rej_ap_agg_pkt, boolean bt_ctrl_agg_buf_size,
+			   u8 agg_buf_size)
 {
-	boolean	reject_rx_agg = rej_ap_agg_pkt;
-	boolean	bt_ctrl_rx_agg_size = bt_ctrl_agg_buf_size;
-	u8	rx_agg_size = agg_buf_size;
-
-	/* ============================================ */
-	/*	Rx Aggregation related setting */
-	/* ============================================ */
-	btcoexist->btc_set(btcoexist, BTC_SET_BL_TO_REJ_AP_AGG_PKT,
-			   &reject_rx_agg);
+#if 0
+	boolean reject_rx_agg = rej_ap_agg_pkt;
+	boolean bt_ctrl_rx_agg_size = bt_ctrl_agg_buf_size;
+	u8 rx_agg_size = agg_buf_size;
+
+	if (!force_exec &&
+	    bt_ctrl_agg_buf_size == coex_sta->wl_rxagg_limit_en &&
+	    agg_buf_size == coex_sta->wl_rxagg_size)
+		return;
+
+	coex_sta->wl_rxagg_limit_en = bt_ctrl_agg_buf_size;
+	coex_sta->wl_rxagg_size = agg_buf_size;
+
+	/*btc->btc_set(btcoexist, BTC_SET_BL_TO_REJ_AP_AGG_PKT,
+	 *&reject_rx_agg);
+	 */
 	/* decide BT control aggregation buf size or not */
 	btcoexist->btc_set(btcoexist, BTC_SET_BL_BT_CTRL_AGG_SIZE,
 			   &bt_ctrl_rx_agg_size);
-	/* aggregation buf size, only work when BT control Rx aggregation size. */
+	/* aggregation buf size, only work
+	 * when BT control Rx aggregation size
+	 */
 	btcoexist->btc_set(btcoexist, BTC_SET_U1_AGG_BUF_SIZE, &rx_agg_size);
 	/* real update aggregation setting */
 	btcoexist->btc_set(btcoexist, BTC_SET_ACT_AGGREGATE_CTRL, NULL);
+#endif
+}
+
+static
+void halbtc8723d2ant_set_fw_low_penalty_ra(IN struct btc_coexist
+		*btcoexist, IN boolean low_penalty_ra)
+{
+	u8 h2c_parameter[6] = {0};
+
+	h2c_parameter[0] = 0x6;	/* op_code, 0x6= Retry_Penalty */
+
+	if (low_penalty_ra) {
+		h2c_parameter[1] |= BIT(0);
+		h2c_parameter[2] =
+			0x00;  /* normal rate except MCS7/6/5, OFDM54/48/36 */
+		h2c_parameter[3] = 0xf7;  /* MCS7 or OFDM54 */
+		h2c_parameter[4] = 0xf8;  /* MCS6 or OFDM48 */
+		h2c_parameter[5] = 0xf9;	/* MCS5 or OFDM36	 */
+	}
+
+	btcoexist->btc_fill_h2c(btcoexist, 0x69, 6, h2c_parameter);
+}
+
+static
+void halbtc8723d2ant_low_penalty_ra(IN struct btc_coexist *btcoexist,
+				    IN boolean force_exec,
+				    IN boolean low_penalty_ra)
+{
+	coex_dm->cur_low_penalty_ra = low_penalty_ra;
+
+	if (!force_exec) {
+		if (coex_dm->pre_low_penalty_ra == coex_dm->cur_low_penalty_ra)
+			return;
+	}
+
+	halbtc8723d2ant_set_fw_low_penalty_ra(btcoexist,
+					      coex_dm->cur_low_penalty_ra);
+
+#if 0
+	if (low_penalty_ra)
+		btcoexist->btc_phydm_modify_RA_PCR_threshold(btcoexist, 0, 15);
+	else
+		btcoexist->btc_phydm_modify_RA_PCR_threshold(btcoexist, 0, 0);
+#endif
+	coex_dm->pre_low_penalty_ra = coex_dm->cur_low_penalty_ra;
 }
 
+static
 void halbtc8723d2ant_query_bt_info(IN struct btc_coexist *btcoexist)
 {
 	u8			h2c_parameter[1] = {0};
@@ -272,12 +374,13 @@ void halbtc8723d2ant_query_bt_info(IN struct btc_coexist *btcoexist)
 	btcoexist->btc_fill_h2c(btcoexist, 0x61, 1, h2c_parameter);
 }
 
+static
 void halbtc8723d2ant_monitor_bt_ctr(IN struct btc_coexist *btcoexist)
 {
-	u32			reg_hp_txrx, reg_lp_txrx, u32tmp;
-	u32			reg_hp_tx = 0, reg_hp_rx = 0, reg_lp_tx = 0, reg_lp_rx = 0;
-	static u8		num_of_bt_counter_chk = 0, cnt_slave = 0, cnt_overhead = 0,
-				cnt_autoslot_hang = 0;
+	u32 reg_hp_txrx, reg_lp_txrx, u32tmp;
+	u32 reg_hp_tx = 0, reg_hp_rx = 0, reg_lp_tx = 0, reg_lp_rx = 0;
+	static u8	num_of_bt_counter_chk = 0, cnt_overhead = 0,
+		cnt_autoslot_hang = 0;
 
 	struct  btc_bt_link_info *bt_link_info = &btcoexist->bt_link_info;
 
@@ -298,58 +401,39 @@ void halbtc8723d2ant_monitor_bt_ctr(IN struct btc_coexist *btcoexist)
 	coex_sta->low_priority_rx = reg_lp_rx;
 
 	BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-				"[BTCoex], Hi-Pri Rx/Tx: %d/%d, Lo-Pri Rx/Tx: %d/%d\n",
-				reg_hp_rx, reg_hp_tx, reg_lp_rx, reg_lp_tx);
+		    "[BTCoex], Hi-Pri Rx/Tx: %d/%d, Lo-Pri Rx/Tx: %d/%d\n",
+		    reg_hp_rx, reg_hp_tx, reg_lp_rx, reg_lp_tx);
 
 	BTC_TRACE(trace_buf);
 
-	if (BT_8723D_2ANT_BT_STATUS_NON_CONNECTED_IDLE ==
-		coex_dm->bt_status) {
-
-			if (coex_sta->high_priority_rx >= 15) {
-					if (cnt_overhead < 3)
-						cnt_overhead++;
+	if (coex_dm->bt_status == BT_8723D_2ANT_BT_STATUS_NON_CONNECTED_IDLE) {
+		if (coex_sta->high_priority_rx >= 15) {
+			if (cnt_overhead < 3)
+				cnt_overhead++;
 
-					if (cnt_overhead == 3)
-						coex_sta->is_hiPri_rx_overhead = TRUE;
-			 } else {
-					if (cnt_overhead > 0)
-						cnt_overhead--;
+			if (cnt_overhead == 3)
+				coex_sta->is_hipri_rx_overhead = TRUE;
+		} else {
+			if (cnt_overhead > 0)
+				cnt_overhead--;
 
-					if (cnt_overhead == 0)
-						coex_sta->is_hiPri_rx_overhead = FALSE;
-			}
-	} else
-		coex_sta->is_hiPri_rx_overhead = FALSE;
+			if (cnt_overhead == 0)
+				coex_sta->is_hipri_rx_overhead = FALSE;
+		}
+	} else {
+		coex_sta->is_hipri_rx_overhead = FALSE;
+	}
 
 	/* reset counter */
 	btcoexist->btc_write_1byte(btcoexist, 0x76e, 0xc);
 
-	if ((coex_sta->low_priority_tx > 1050)  &&
-	    (!coex_sta->c2h_bt_inquiry_page))
+	if (coex_sta->low_priority_tx > 1050  &&
+	    !coex_sta->c2h_bt_inquiry_page)
 		coex_sta->pop_event_cnt++;
 
-	if ((coex_sta->low_priority_rx >= 950) &&
-	    (coex_sta->low_priority_rx >= coex_sta->low_priority_tx)
-	    && (!coex_sta->under_ips)  && (!coex_sta->c2h_bt_inquiry_page) &&
-	    (coex_sta->bt_link_exist))	{
-		if (cnt_slave >= 2) {
-			bt_link_info->slave_role = TRUE;
-			cnt_slave = 2;
-		} else
-			cnt_slave++;
-	} else {
-		if (cnt_slave == 0)	{
-			bt_link_info->slave_role = FALSE;
-			cnt_slave = 0;
-		} else
-			cnt_slave--;
-
-	}
-
 	if (coex_sta->is_tdma_btautoslot) {
-		if ((coex_sta->low_priority_tx >= 1300) &&
-			(coex_sta->low_priority_rx <= 150)) {
+		if (coex_sta->low_priority_tx >= 1300 &&
+		    coex_sta->low_priority_rx <= 150) {
 			if (cnt_autoslot_hang >= 2) {
 				coex_sta->is_tdma_btautoslot_hang = TRUE;
 				cnt_autoslot_hang = 2;
@@ -365,11 +449,11 @@ void halbtc8723d2ant_monitor_bt_ctr(IN struct btc_coexist *btcoexist)
 	}
 
 	if (coex_sta->sco_exist) {
-		if ((coex_sta->high_priority_tx >= 400) &&
-		(coex_sta->high_priority_rx >= 400))
-			coex_sta->is_eSCO_mode = FALSE;
+		if (coex_sta->high_priority_tx >= 400 &&
+		    coex_sta->high_priority_rx >= 400)
+			coex_sta->is_esco_mode = FALSE;
 		else
-			coex_sta->is_eSCO_mode = TRUE;
+			coex_sta->is_esco_mode = TRUE;
 	}
 
 	if (bt_link_info->hid_only) {
@@ -380,11 +464,10 @@ void halbtc8723d2ant_monitor_bt_ctr(IN struct btc_coexist *btcoexist)
 	}
 
 	if (!coex_sta->bt_disabled) {
-
-		if ((coex_sta->high_priority_tx == 0) &&
-		    (coex_sta->high_priority_rx == 0) &&
-		    (coex_sta->low_priority_tx == 0) &&
-		    (coex_sta->low_priority_rx == 0)) {
+		if (coex_sta->high_priority_tx == 0 &&
+		    coex_sta->high_priority_rx == 0 &&
+		    coex_sta->low_priority_tx == 0 &&
+		    coex_sta->low_priority_rx == 0) {
 			num_of_bt_counter_chk++;
 			if (num_of_bt_counter_chk >= 3) {
 				halbtc8723d2ant_query_bt_info(btcoexist);
@@ -392,9 +475,9 @@ void halbtc8723d2ant_monitor_bt_ctr(IN struct btc_coexist *btcoexist)
 			}
 		}
 	}
-
 }
 
+static
 void halbtc8723d2ant_monitor_wifi_ctr(IN struct btc_coexist *btcoexist)
 {
 	s32 wifi_rssi = 0;
@@ -404,15 +487,14 @@ void halbtc8723d2ant_monitor_wifi_ctr(IN struct btc_coexist *btcoexist)
 	static u8 cck_lock_counter = 0, wl_noisy_count0 = 0,
 		  wl_noisy_count1 = 3, wl_noisy_count2 = 0;
 	u32 total_cnt, reg_val1, reg_val2, cnt_cck;
-	u32 cnt_crcok = 0, cnt_crcerr = 0, cnt_ccklocking = 0;
-	static u8 cnt = 0, cnt_cal = 0;
+	u32 cnt_crcok = 0, cnt_crcerr = 0;
+	static u8 cnt = 0, cnt_cal = 0, cnt_ccklocking = 0;
 	u8	h2c_parameter[1] = {0};
 	struct	btc_bt_link_info *bt_link_info = &btcoexist->bt_link_info;
 
 
 	/*send h2c to query WL FW dbg info	*/
-	if (((coex_dm->cur_ps_tdma_on) && (coex_sta->force_lps_ctrl)) ||
-		 ((coex_sta->acl_busy) && (bt_link_info->a2dp_exist))) {
+	if (coex_dm->cur_ps_tdma_on) {
 		h2c_parameter[0] = 0x8;
 		btcoexist->btc_fill_h2c(btcoexist, 0x69, 1, h2c_parameter);
 	}
@@ -534,17 +616,21 @@ void halbtc8723d2ant_monitor_wifi_ctr(IN struct btc_coexist *btcoexist)
 	}
 }
 
-
-
+static
 void halbtc8723d2ant_update_bt_link_info(IN struct btc_coexist *btcoexist)
 {
-	struct  btc_bt_link_info	*bt_link_info = &btcoexist->bt_link_info;
-	boolean			bt_hs_on = FALSE;
-	boolean			bt_busy = FALSE;
-	u32			val = 0;
-	static	u8		pre_num_of_profile = 0, cur_num_of_profile = 0, cnt = 0;
+	struct  btc_bt_link_info *bt_link_info = &btcoexist->bt_link_info;
+	boolean		bt_hs_on = FALSE, bt_busy = FALSE;
+	u32		val = 0, wifi_link_status = 0, num_of_wifi_link = 0;
+	static u8		pre_num_of_profile, cur_num_of_profile, cnt;
+	static boolean	pre_ble_scan_en;
+
+	btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_LINK_STATUS,
+			   &wifi_link_status);
+
+	num_of_wifi_link = wifi_link_status >> 16;
 
-	if (coex_sta->is_ble_scan_toggle) {
+	if (coex_sta->is_ble_scan_en && !pre_ble_scan_en) {
 		BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
 					"[BTCoex], BT ext info bit4 check, query BLE Scan type!!\n");
 				BTC_TRACE(trace_buf);
@@ -561,6 +647,7 @@ void halbtc8723d2ant_update_bt_link_info(IN struct btc_coexist *btcoexist)
 				btcoexist->btc_get_ble_scan_para_from_bt(btcoexist, 0x4);
 	}
 
+	pre_ble_scan_en = coex_sta->is_ble_scan_en;
 	coex_sta->num_of_profile = 0;
 
 	/* set link exist status */
@@ -708,7 +795,8 @@ void halbtc8723d2ant_update_bt_link_info(IN struct btc_coexist *btcoexist)
 			btcoexist->btc_get(btcoexist, BTC_GET_U4_BT_DEVICE_INFO, &val);
 
 			BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-					"[BTCoex], BtInfoNotify(), get BT DEVICE_INFO = %x\n", val);
+				    "[BTCoex], BtInfoNotify(), get BT DEVICE_INFO = %x\n",
+				    val);
 			BTC_TRACE(trace_buf);
 
 			coex_sta->bt_a2dp_vendor_id = (u8)(val & 0xff);
@@ -723,10 +811,13 @@ void halbtc8723d2ant_update_bt_link_info(IN struct btc_coexist *btcoexist)
 			if (cnt > 0)
 				cnt--;
 
-			btcoexist->btc_get(btcoexist, BTC_GET_U4_BT_FORBIDDEN_SLOT_VAL, &val);
+			btcoexist->btc_get(btcoexist,
+					   BTC_GET_U4_BT_FORBIDDEN_SLOT_VAL,
+					   &val);
 
 			BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-					"[BTCoex], BtInfoNotify(), get BT FORBIDDEN_SLOT_VAL = %x, cnt = %d\n", val, cnt);
+				    "[BTCoex], BtInfoNotify(), get BT FORBIDDEN_SLOT_VAL = %x, cnt = %d\n",
+				    val, cnt);
 			BTC_TRACE(trace_buf);
 
 			coex_sta->legacy_forbidden_slot = (u16)(val & 0xffff);
@@ -735,8 +826,40 @@ void halbtc8723d2ant_update_bt_link_info(IN struct btc_coexist *btcoexist)
 	}
 
 	pre_num_of_profile = coex_sta->num_of_profile;
+
+	if (btcoexist->manual_control || btcoexist->stop_coex_dm)
+		return;
+
+	if (num_of_wifi_link == 0 ||
+	    coex_dm->bt_status == BT_8723D_2ANT_BT_STATUS_NON_CONNECTED_IDLE) {
+		halbtc8723d2ant_low_penalty_ra(btcoexist, NORMAL_EXEC, FALSE);
+		halbtc8723d2ant_limited_tx(btcoexist, NORMAL_EXEC, FALSE,
+					   FALSE);
+		halbtc8723d2ant_limited_rx(btcoexist, NM_EXCU, FALSE, TRUE, 64);
+	} else if (wifi_link_status & WIFI_P2P_GO_CONNECTED ||
+		    wifi_link_status & WIFI_P2P_GC_CONNECTED) {
+		halbtc8723d2ant_low_penalty_ra(btcoexist, NORMAL_EXEC, TRUE);
+		halbtc8723d2ant_limited_tx(btcoexist, NM_EXCU, TRUE, TRUE);
+		halbtc8723d2ant_limited_rx(btcoexist, NM_EXCU, FALSE, TRUE, 16);
+	} else {
+		halbtc8723d2ant_low_penalty_ra(btcoexist, NORMAL_EXEC, TRUE);
+
+		if (bt_link_info->hid_exist || coex_sta->hid_pair_cnt > 0 ||
+		    bt_link_info->sco_exist) {
+			halbtc8723d2ant_limited_tx(btcoexist, NM_EXCU, TRUE,
+						   TRUE);
+			halbtc8723d2ant_limited_rx(btcoexist, NM_EXCU, FALSE,
+						   TRUE, 16);
+		} else {
+			halbtc8723d2ant_limited_tx(btcoexist, NM_EXCU, TRUE,
+						   FALSE);
+			halbtc8723d2ant_limited_rx(btcoexist, NM_EXCU, FALSE,
+						   TRUE, 64);
+		}
+	}
 }
 
+static
 void halbtc8723d2ant_update_wifi_channel_info(IN struct btc_coexist *btcoexist,
 		IN u8 type)
 {
@@ -747,14 +870,15 @@ void halbtc8723d2ant_update_wifi_channel_info(IN struct btc_coexist *btcoexist,
 	/* only 2.4G we need to inform bt the chnl mask */
 	btcoexist->btc_get(btcoexist, BTC_GET_U1_WIFI_CENTRAL_CHNL,
 			   &wifi_central_chnl);
-	if ((BTC_MEDIA_CONNECT == type) &&
-	    (wifi_central_chnl <= 14)) {
-		h2c_parameter[0] =
-			0x1;  /* enable BT AFH skip WL channel for 8723d because BT Rx LO interference */
-		/* h2c_parameter[0] = 0x0; */
+	if (type == BTC_MEDIA_CONNECT && wifi_central_chnl <= 14) {
+		/* enable BT AFH skip WL channel for 8723d
+		 * because BT Rx LO interference
+		 * h2c_parameter[0] = 0x1;
+		 * h2c_parameter[0] = 0x0;
+		 */
 		h2c_parameter[1] = wifi_central_chnl;
 		btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw);
-		if (BTC_WIFI_BW_HT40 == wifi_bw)
+		if (wifi_bw == BTC_WIFI_BW_HT40)
 			h2c_parameter[2] = 0x30;
 		else
 			h2c_parameter[2] = 0x20;
@@ -768,6 +892,7 @@ void halbtc8723d2ant_update_wifi_channel_info(IN struct btc_coexist *btcoexist,
 
 }
 
+static
 void halbtc8723d2ant_write_score_board(
 	IN	struct  btc_coexist		*btcoexist,
 	IN	u16				bitpos,
@@ -785,45 +910,41 @@ void halbtc8723d2ant_write_score_board(
 	coex_sta->score_board_WB = originalval;
 
 	if (originalval != preval) {
-
 		preval = originalval;
-	btcoexist->btc_write_2byte(btcoexist, 0xaa, originalval);
+		btcoexist->btc_write_2byte(btcoexist, 0xaa, originalval);
 	} else {
 		BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-		"[BTCoex], halbtc8723d2ant_write_score_board: return for nochange\n");
+			    "[BTCoex], halbtc8723d2ant_write_score_board: return for nochange\n");
 		BTC_TRACE(trace_buf);
 	}
 }
 
-
-
+static
 void halbtc8723d2ant_read_score_board(
 	IN	struct  btc_coexist		*btcoexist,
 	IN   u16				*score_board_val
 )
 {
-
-	*score_board_val = (btcoexist->btc_read_2byte(btcoexist,
-			    0xaa)) & 0x7fff;
+	*score_board_val = (btcoexist->btc_read_2byte(btcoexist, 0xaa)) &
+				0x7fff;
 }
 
-
+static
 void halbtc8723d2ant_post_state_to_bt(
-	IN	struct  btc_coexist		*btcoexist,
-	IN	u16						type,
-	IN  boolean                 state
+	IN struct  btc_coexist	*btcoexist,
+	IN u16		type,
+	IN boolean	state
 )
 {
 	BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-		"[BTCoex], halbtc8723d2ant_post_state_to_bt: type = %d, state =%d\n",
-		type, state);
+		    "[BTCoex], %s: type = %d, state =%d\n",
+		    __func__, type, state);
 	BTC_TRACE(trace_buf);
 
 	halbtc8723d2ant_write_score_board(btcoexist, (u16) type, state);
-
 }
 
-
+static
 void halbtc8723d2ant_adjust_wl_tx_power(IN struct btc_coexist *btcoexist,
 			      IN boolean force_exec, IN u8 fw_dac_swing_lvl)
 {
@@ -841,11 +962,11 @@ void halbtc8723d2ant_adjust_wl_tx_power(IN struct btc_coexist *btcoexist,
 	coex_dm->pre_fw_dac_swing_lvl = coex_dm->cur_fw_dac_swing_lvl;
 }
 
-
+static
 void halbtc8723d2ant_adjust_bt_tx_power(IN struct btc_coexist *btcoexist,
 				IN boolean force_exec, IN u8 dec_bt_pwr_lvl)
 {
-	u8			h2c_parameter[1] = {0};
+	u8	h2c_parameter[1] = {0};
 
 	coex_dm->cur_bt_dec_pwr_lvl = dec_bt_pwr_lvl;
 
@@ -861,19 +982,26 @@ void halbtc8723d2ant_adjust_bt_tx_power(IN struct btc_coexist *btcoexist,
 	coex_dm->pre_bt_dec_pwr_lvl = coex_dm->cur_bt_dec_pwr_lvl;
 }
 
+static
 void halbtc8723d2ant_adjust_wl_rx_gain(IN struct btc_coexist *btcoexist,
 			       IN boolean force_exec, IN boolean agc_table_en)
 {
-	u32 rx_gain_value_enable[] = {0xec120101, 0xeb130101, 0xce140101, 0xcd150101, 0xcc160101,
-		0xcb170101, 0xca180101, 0x8d190101, 0x8c1a0101, 0x8b1b0101,
-		0x4f1c0101, 0x4e1d0101, 0x4d1e0101, 0x4c1f0101, 0x0e200101,
-		0x0d210101, 0x0c220101, 0x0b230101, 0xcf240001, 0xce250001,
-		0xcd260001, 0xcc270001, 0x8f280001, 0xffffffff};
-	u32 rx_gain_value_disable[] = {0xec120101, 0xeb130101, 0xea140101, 0xe9150101, 0xe8160101,
-		0xe7170101, 0xe6180101, 0xe5190101, 0xe41a0101, 0xe31b0101,
-		0xe21c0101, 0xe11d0101, 0xe01e0101, 0x861f0101, 0x85200101,
-		0x84210101, 0x83220101, 0x82230101, 0x81240101, 0x80250101,
-		0x44260101, 0x43270101, 0x42280101, 0xffffffff};
+	u32 rx_gain_value_enable[] = {0xec120101, 0xeb130101, 0xce140101,
+				      0xcd150101, 0xcc160101, 0xcb170101,
+				      0xca180101, 0x8d190101, 0x8c1a0101,
+				      0x8b1b0101, 0x4f1c0101, 0x4e1d0101,
+				      0x4d1e0101, 0x4c1f0101, 0x0e200101,
+				      0x0d210101, 0x0c220101, 0x0b230101,
+				      0xcf240001, 0xce250001, 0xcd260001,
+				      0xcc270001, 0x8f280001, 0xffffffff};
+	u32 rx_gain_value_disable[] = {0xec120101, 0xeb130101, 0xea140101,
+				       0xe9150101, 0xe8160101, 0xe7170101,
+				       0xe6180101, 0xe5190101, 0xe41a0101,
+				       0xe31b0101, 0xe21c0101, 0xe11d0101,
+				       0xe01e0101, 0x861f0101, 0x85200101,
+				       0x84210101, 0x83220101, 0x82230101,
+				       0x81240101, 0x80250101, 0x44260101,
+				       0x43270101, 0x42280101, 0xffffffff};
 
 	u8 i;
 
@@ -884,122 +1012,51 @@ void halbtc8723d2ant_adjust_wl_rx_gain(IN struct btc_coexist *btcoexist,
 			return;
 	}
 
-		if (agc_table_en) {
-			BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-					"[BTCoex], BB Agc Table On!\n");
-			BTC_TRACE(trace_buf);
+	if (agc_table_en) {
+		BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
+			    "[BTCoex], BB Agc Table On!\n");
+		BTC_TRACE(trace_buf);
 
-			for (i = 0; i <= 100; i++) {
-				if (rx_gain_value_enable[i] == 0xffffffff)
-					break;
+		for (i = 0; i < ARRAY_SIZE(rx_gain_value_enable); i++) {
+			if (rx_gain_value_enable[i] == 0xffffffff)
+				break;
 
-				btcoexist->btc_write_4byte(btcoexist,
-					0xc78, rx_gain_value_enable[i]);
-			}
+			btcoexist->btc_write_4byte(btcoexist,
+				0xc78, rx_gain_value_enable[i]);
+		}
 
-		} else {
-			BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-					"[BTCoex], BB Agc Table Off!\n");
-			BTC_TRACE(trace_buf);
+	} else {
+		BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
+			    "[BTCoex], BB Agc Table Off!\n");
+		BTC_TRACE(trace_buf);
 
-			for (i = 0; i <= 100; i++) {
-				if (rx_gain_value_disable[i] == 0xffffffff)
-					break;
+		for (i = 0; i < ARRAY_SIZE(rx_gain_value_disable); i++) {
+			if (rx_gain_value_disable[i] == 0xffffffff)
+				break;
 
-				btcoexist->btc_write_4byte(btcoexist,
-					0xc78, rx_gain_value_disable[i]);
-			}
+			btcoexist->btc_write_4byte(btcoexist,
+				0xc78, rx_gain_value_disable[i]);
 		}
-
+	}
 
 	coex_dm->pre_agc_table_en = coex_dm->cur_agc_table_en;
 }
 
-
+static
 void halbtc8723d2ant_adjust_bt_rx_gain(IN struct btc_coexist *btcoexist,
 			       IN boolean force_exec, IN boolean rx_gain_en)
 {
+	u8 lna_lvl = 1;
+
+	btcoexist->btc_set(btcoexist, BTC_SET_BL_BT_LNA_CONSTRAIN_LEVEL,
+			   &lna_lvl);
 
 	/* use scoreboard[4] to notify BT Rx gain table change   */
 	halbtc8723d2ant_post_state_to_bt(btcoexist,
 		BT_8723D_2ANT_SCOREBOARD_RXGAIN, rx_gain_en);
 }
 
-
-void halbtc8723d2ant_set_fw_low_penalty_ra(IN struct btc_coexist
-		*btcoexist, IN boolean low_penalty_ra)
-{
-#if 1
-	u8			h2c_parameter[6] = {0};
-
-	h2c_parameter[0] = 0x6;	/* op_code, 0x6= Retry_Penalty */
-
-	if (low_penalty_ra) {
-		h2c_parameter[1] |= BIT(0);
-		h2c_parameter[2] =
-			0x00;  /* normal rate except MCS7/6/5, OFDM54/48/36 */
-		h2c_parameter[3] = 0xf7;  /* MCS7 or OFDM54 */
-		h2c_parameter[4] = 0xf8;  /* MCS6 or OFDM48 */
-		h2c_parameter[5] = 0xf9;	/* MCS5 or OFDM36	 */
-	}
-
-	btcoexist->btc_fill_h2c(btcoexist, 0x69, 6, h2c_parameter);
-#endif
-}
-
-void halbtc8723d2ant_low_penalty_ra(IN struct btc_coexist *btcoexist,
-			    IN boolean force_exec, IN boolean low_penalty_ra)
-{
-#if 1
-	coex_dm->cur_low_penalty_ra = low_penalty_ra;
-
-	if (!force_exec) {
-		if (coex_dm->pre_low_penalty_ra == coex_dm->cur_low_penalty_ra)
-			return;
-	}
-
-	halbtc8723d2ant_set_fw_low_penalty_ra(btcoexist,
-							  coex_dm->cur_low_penalty_ra);
-
-#if 0
-	if (low_penalty_ra)
-		btcoexist->btc_phydm_modify_RA_PCR_threshold(btcoexist, 0, 15);
-	else
-		btcoexist->btc_phydm_modify_RA_PCR_threshold(btcoexist, 0, 0);
-#endif
-	coex_dm->pre_low_penalty_ra = coex_dm->cur_low_penalty_ra;
-
-#endif
-}
-
-void halbtc8723d2ant_set_bt_auto_report(IN struct btc_coexist *btcoexist,
-					IN boolean enable_auto_report)
-{
-	u8			h2c_parameter[1] = {0};
-
-	h2c_parameter[0] = 0;
-
-	if (enable_auto_report)
-		h2c_parameter[0] |= BIT(0);
-
-	btcoexist->btc_fill_h2c(btcoexist, 0x68, 1, h2c_parameter);
-}
-
-void halbtc8723d2ant_bt_auto_report(IN struct btc_coexist *btcoexist,
-		    IN boolean force_exec, IN boolean enable_auto_report)
-{
-	coex_dm->cur_bt_auto_report = enable_auto_report;
-
-	if (!force_exec) {
-		if (coex_dm->pre_bt_auto_report == coex_dm->cur_bt_auto_report)
-			return;
-	}
-	halbtc8723d2ant_set_bt_auto_report(btcoexist,
-					   coex_dm->cur_bt_auto_report);
-
-	coex_dm->pre_bt_auto_report = coex_dm->cur_bt_auto_report;
-}
-
+static
 boolean halbtc8723d2ant_is_wifibt_status_changed(IN struct btc_coexist
 		*btcoexist)
 {
@@ -1102,8 +1159,8 @@ boolean halbtc8723d2ant_is_wifibt_status_changed(IN struct btc_coexist
 			return TRUE;
 		}
 
-		if (pre_bt_setup_link != coex_sta->is_setupLink) {
-			pre_bt_setup_link = coex_sta->is_setupLink;
+		if (pre_bt_setup_link != coex_sta->is_setup_link) {
+			pre_bt_setup_link = coex_sta->is_setup_link;
 			return TRUE;
 		}
 	}
@@ -1111,36 +1168,20 @@ boolean halbtc8723d2ant_is_wifibt_status_changed(IN struct btc_coexist
 	return FALSE;
 }
 
+static
 void halbtc8723d2ant_monitor_bt_enable_disable(IN struct btc_coexist *btcoexist)
 {
 	static u32		bt_disable_cnt = 0;
 	boolean			bt_active = TRUE, bt_disabled = FALSE;
 	u16			u16tmp;
 
-	/* This function check if bt is disabled */
-#if 0
-	if (coex_sta->high_priority_tx == 0 &&
-	    coex_sta->high_priority_rx == 0 &&
-	    coex_sta->low_priority_tx == 0 &&
-	    coex_sta->low_priority_rx == 0)
-		bt_active = FALSE;
-	if (coex_sta->high_priority_tx == 0xffff &&
-	    coex_sta->high_priority_rx == 0xffff &&
-	    coex_sta->low_priority_tx == 0xffff &&
-	    coex_sta->low_priority_rx == 0xffff)
-		bt_active = FALSE;
-
-
-#else
-
-	/* Read BT on/off status from scoreboard[1], enable this only if BT patch support this feature */
-	halbtc8723d2ant_read_score_board(btcoexist,	&u16tmp);
-
+	/* This function check if bt is disabled
+	 * Read BT on/off status from scoreboard[1],
+	 * enable this only if BT patch support this feature
+	 */
+	halbtc8723d2ant_read_score_board(btcoexist, &u16tmp);
 	bt_active = u16tmp & BIT(1);
 
-
-#endif
-
 	if (bt_active) {
 		bt_disable_cnt = 0;
 		bt_disabled = FALSE;
@@ -1158,11 +1199,6 @@ void halbtc8723d2ant_monitor_bt_enable_disable(IN struct btc_coexist *btcoexist)
 				   &bt_disabled);
 	}
 
-	if (bt_disabled)
-		halbtc8723d2ant_low_penalty_ra(btcoexist, NORMAL_EXEC, FALSE);
-	else
-		halbtc8723d2ant_low_penalty_ra(btcoexist, NORMAL_EXEC, TRUE);
-
 	if (coex_sta->bt_disabled != bt_disabled) {
 		BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
 			    "[BTCoex], BT is from %s to %s!!\n",
@@ -1174,8 +1210,7 @@ void halbtc8723d2ant_monitor_bt_enable_disable(IN struct btc_coexist *btcoexist)
 
 }
 
-
-
+static
 void halbtc8723d2ant_enable_gnt_to_gpio(IN struct btc_coexist *btcoexist,
 					boolean isenable)
 {
@@ -1215,6 +1250,7 @@ void halbtc8723d2ant_enable_gnt_to_gpio(IN struct btc_coexist *btcoexist,
 #endif
 }
 
+static
 u32 halbtc8723d2ant_ltecoex_indirect_read_reg(IN struct btc_coexist *btcoexist,
 		IN u16 reg_addr)
 {
@@ -1223,7 +1259,7 @@ u32 halbtc8723d2ant_ltecoex_indirect_read_reg(IN struct btc_coexist *btcoexist,
 	/* wait for ready bit before access 0x7c0/0x7c4 */
 	while (1) {
 		if ((btcoexist->btc_read_1byte(btcoexist, 0x7c3)&BIT(5)) == 0) {
-			delay_ms(50);
+			delay_ms(10);
 			delay_count++;
 			if (delay_count >= 10) {
 				delay_count = 0;
@@ -1240,6 +1276,7 @@ u32 halbtc8723d2ant_ltecoex_indirect_read_reg(IN struct btc_coexist *btcoexist,
 
 }
 
+static
 void halbtc8723d2ant_ltecoex_indirect_write_reg(IN struct btc_coexist
 		*btcoexist,
 		IN u16 reg_addr, IN u32 bit_mask, IN u32 reg_value)
@@ -1253,7 +1290,7 @@ void halbtc8723d2ant_ltecoex_indirect_write_reg(IN struct btc_coexist
 		/* wait for ready bit before access 0x7c0/0x7c4 */
 		while (1) {
 			if ((btcoexist->btc_read_1byte(btcoexist, 0x7c3)&BIT(5)) == 0) {
-				delay_ms(50);
+				delay_ms(10);
 				delay_count++;
 				if (delay_count >= 10) {
 					delay_count = 0;
@@ -1284,7 +1321,7 @@ void halbtc8723d2ant_ltecoex_indirect_write_reg(IN struct btc_coexist
 		/* wait for ready bit before access 0x7c0/0x7c4	*/
 		while (1) {
 			if ((btcoexist->btc_read_1byte(btcoexist, 0x7c3)&BIT(5)) == 0) {
-				delay_ms(50);
+				delay_ms(10);
 				delay_count++;
 				if (delay_count >= 10) {
 					delay_count = 0;
@@ -1304,6 +1341,7 @@ void halbtc8723d2ant_ltecoex_indirect_write_reg(IN struct btc_coexist
 
 }
 
+static
 void halbtc8723d2ant_ltecoex_enable(IN struct btc_coexist *btcoexist,
 				    IN boolean enable)
 {
@@ -1315,8 +1353,9 @@ void halbtc8723d2ant_ltecoex_enable(IN struct btc_coexist *btcoexist,
 
 }
 
-void halbtc8723d2ant_ltecoex_pathcontrol_owner(IN struct btc_coexist *btcoexist,
-		IN boolean wifi_control)
+static
+void halbtc8723d2ant_coex_ctrl_owner(IN struct btc_coexist *btcoexist,
+				     IN boolean wifi_control)
 {
 	u8 val;
 
@@ -1326,6 +1365,7 @@ void halbtc8723d2ant_ltecoex_pathcontrol_owner(IN struct btc_coexist *btcoexist,
 
 }
 
+static
 void halbtc8723d2ant_ltecoex_set_gnt_bt(IN struct btc_coexist *btcoexist,
 			IN u8 control_block, IN boolean sw_control, IN u8 state)
 {
@@ -1358,7 +1398,7 @@ void halbtc8723d2ant_ltecoex_set_gnt_bt(IN struct btc_coexist *btcoexist,
 				0x38, 0xffffffff, val);
 }
 
-
+static
 void halbtc8723d2ant_ltecoex_set_gnt_wl(IN struct btc_coexist *btcoexist,
 			IN u8 control_block, IN boolean sw_control, IN u8 state)
 {
@@ -1391,6 +1431,7 @@ void halbtc8723d2ant_ltecoex_set_gnt_wl(IN struct btc_coexist *btcoexist,
 				0x38, 0xffffffff, val);
 }
 
+static
 void halbtc8723d2ant_ltecoex_set_coex_table(IN struct btc_coexist *btcoexist,
 		IN u8 table_type, IN u16 table_content)
 {
@@ -1412,106 +1453,33 @@ void halbtc8723d2ant_ltecoex_set_coex_table(IN struct btc_coexist *btcoexist,
 
 }
 
-
-void halbtc8723d2ant_ltecoex_set_break_table(IN struct btc_coexist *btcoexist,
-		IN u8 table_type, IN u8 table_content)
-{
-	u16 reg_addr = 0x0000;
-
-	switch (table_type) {
-	case BT_8723D_2ANT_LBTT_WL_BREAK_LTE:
-		reg_addr = 0xa8;
-		break;
-	case BT_8723D_2ANT_LBTT_BT_BREAK_LTE:
-		reg_addr = 0xac;
-		break;
-	case BT_8723D_2ANT_LBTT_LTE_BREAK_WL:
-		reg_addr = 0xb0;
-		break;
-	case BT_8723D_2ANT_LBTT_LTE_BREAK_BT:
-		reg_addr = 0xb4;
-		break;
-	}
-
-	if (reg_addr != 0x0000)
-		halbtc8723d2ant_ltecoex_indirect_write_reg(btcoexist, reg_addr,
-			0xff, table_content); /* 0xa8[15:0] or 0xb4[15:0] */
-
-
-}
-
-void halbtc8723d2ant_set_wltoggle_coex_table(IN struct btc_coexist *btcoexist,
-		IN boolean force_exec,  IN u8 interval,
-		IN u8 val0x6c4_b0, IN u8 val0x6c4_b1, IN u8 val0x6c4_b2,
-		IN u8 val0x6c4_b3)
+static
+void halbtc8723d2ant_coex_table(IN struct btc_coexist *btcoexist,
+				IN boolean force_exec, IN u32 val0x6c0,
+				IN u32 val0x6c4, IN u32 val0x6c8,
+				IN u8 val0x6cc)
 {
-	static u8 pre_h2c_parameter[6] = {0};
-	u8	cur_h2c_parameter[6] = {0};
-	u8 i, match_cnt = 0;
-
-	cur_h2c_parameter[0] = 0x7;	/* op_code, 0x7= wlan toggle slot*/
-
-	cur_h2c_parameter[1] = interval;
-	cur_h2c_parameter[2] = val0x6c4_b0;
-	cur_h2c_parameter[3] = val0x6c4_b1;
-	cur_h2c_parameter[4] = val0x6c4_b2;
-	cur_h2c_parameter[5] = val0x6c4_b3;
-
 	if (!force_exec) {
-		for (i = 1; i <= 5; i++) {
-			if (cur_h2c_parameter[i] != pre_h2c_parameter[i])
-				break;
-
-			match_cnt++;
-		}
-
-		if (match_cnt == 5)
+		if (val0x6c0 == coex_dm->cur_val0x6c0 &&
+		    val0x6c4 == coex_dm->cur_val0x6c4 &&
+		    val0x6c8 == coex_dm->cur_val0x6c8 &&
+		    val0x6cc == coex_dm->cur_val0x6cc)
 			return;
 	}
 
-	for (i = 1; i <= 5; i++)
-		pre_h2c_parameter[i] = cur_h2c_parameter[i];
-
-	btcoexist->btc_fill_h2c(btcoexist, 0x69, 6, cur_h2c_parameter);
-}
-
-void halbtc8723d2ant_set_coex_table(IN struct btc_coexist *btcoexist,
-	    IN u32 val0x6c0, IN u32 val0x6c4, IN u32 val0x6c8, IN u8 val0x6cc)
-{
 	btcoexist->btc_write_4byte(btcoexist, 0x6c0, val0x6c0);
-
 	btcoexist->btc_write_4byte(btcoexist, 0x6c4, val0x6c4);
-
 	btcoexist->btc_write_4byte(btcoexist, 0x6c8, val0x6c8);
-
 	btcoexist->btc_write_1byte(btcoexist, 0x6cc, val0x6cc);
-}
 
-void halbtc8723d2ant_coex_table(IN struct btc_coexist *btcoexist,
-			IN boolean force_exec, IN u32 val0x6c0, IN u32 val0x6c4,
-				IN u32 val0x6c8, IN u8 val0x6cc)
-{
 	coex_dm->cur_val0x6c0 = val0x6c0;
 	coex_dm->cur_val0x6c4 = val0x6c4;
 	coex_dm->cur_val0x6c8 = val0x6c8;
 	coex_dm->cur_val0x6cc = val0x6cc;
 
-	if (!force_exec) {
-		if ((coex_dm->pre_val0x6c0 == coex_dm->cur_val0x6c0) &&
-		    (coex_dm->pre_val0x6c4 == coex_dm->cur_val0x6c4) &&
-		    (coex_dm->pre_val0x6c8 == coex_dm->cur_val0x6c8) &&
-		    (coex_dm->pre_val0x6cc == coex_dm->cur_val0x6cc))
-			return;
-	}
-	halbtc8723d2ant_set_coex_table(btcoexist, val0x6c0, val0x6c4, val0x6c8,
-				       val0x6cc);
-
-	coex_dm->pre_val0x6c0 = coex_dm->cur_val0x6c0;
-	coex_dm->pre_val0x6c4 = coex_dm->cur_val0x6c4;
-	coex_dm->pre_val0x6c8 = coex_dm->cur_val0x6c8;
-	coex_dm->pre_val0x6cc = coex_dm->cur_val0x6cc;
 }
 
+static
 void halbtc8723d2ant_coex_table_with_type(IN struct btc_coexist *btcoexist,
 		IN boolean force_exec, IN u8 type)
 {
@@ -1575,6 +1543,7 @@ void halbtc8723d2ant_coex_table_with_type(IN struct btc_coexist *btcoexist,
 	}
 }
 
+static
 void halbtc8723d2ant_set_fw_ignore_wlan_act(IN struct btc_coexist *btcoexist,
 		IN boolean enable)
 {
@@ -1587,6 +1556,7 @@ void halbtc8723d2ant_set_fw_ignore_wlan_act(IN struct btc_coexist *btcoexist,
 	btcoexist->btc_fill_h2c(btcoexist, 0x63, 1, h2c_parameter);
 }
 
+static
 void halbtc8723d2ant_ignore_wlan_act(IN struct btc_coexist *btcoexist,
 				     IN boolean force_exec, IN boolean enable)
 {
@@ -1602,6 +1572,7 @@ void halbtc8723d2ant_ignore_wlan_act(IN struct btc_coexist *btcoexist,
 	coex_dm->pre_ignore_wlan_act = coex_dm->cur_ignore_wlan_act;
 }
 
+static
 void halbtc8723d2ant_set_lps_rpwm(IN struct btc_coexist *btcoexist,
 				  IN u8 lps_val, IN u8 rpwm_val)
 {
@@ -1612,6 +1583,7 @@ void halbtc8723d2ant_set_lps_rpwm(IN struct btc_coexist *btcoexist,
 	btcoexist->btc_set(btcoexist, BTC_SET_U1_RPWM_VAL, &rpwm);
 }
 
+static
 void halbtc8723d2ant_lps_rpwm(IN struct btc_coexist *btcoexist,
 		      IN boolean force_exec, IN u8 lps_val, IN u8 rpwm_val)
 {
@@ -1629,6 +1601,7 @@ void halbtc8723d2ant_lps_rpwm(IN struct btc_coexist *btcoexist,
 	coex_dm->pre_rpwm = coex_dm->cur_rpwm;
 }
 
+static
 void halbtc8723d2ant_ps_tdma_check_for_power_save_state(
 	IN struct btc_coexist *btcoexist, IN boolean new_ps_state)
 {
@@ -1656,6 +1629,7 @@ void halbtc8723d2ant_ps_tdma_check_for_power_save_state(
 	}
 }
 
+static
 void halbtc8723d2ant_power_save_state(IN struct btc_coexist *btcoexist,
 			      IN u8 ps_type, IN u8 lps_val, IN u8 rpwm_val)
 {
@@ -1699,8 +1673,7 @@ void halbtc8723d2ant_power_save_state(IN struct btc_coexist *btcoexist,
 	}
 }
 
-
-
+static
 void halbtc8723d2ant_set_fw_pstdma(IN struct btc_coexist *btcoexist,
 	   IN u8 byte1, IN u8 byte2, IN u8 byte3, IN u8 byte4, IN u8 byte5)
 {
@@ -1770,48 +1743,62 @@ void halbtc8723d2ant_set_fw_pstdma(IN struct btc_coexist *btcoexist,
 		btcoexist->btc_set(btcoexist, BTC_SET_ACT_POST_NORMAL_LPS, NULL);
 }
 
+static
 void halbtc8723d2ant_ps_tdma(IN struct btc_coexist *btcoexist,
 		     IN boolean force_exec, IN boolean turn_on, IN u8 type)
 {
 
-	static u8			psTdmaByte4Modify = 0x0, pre_psTdmaByte4Modify = 0x0;
+	static u8 tdma_byte4_modify, pre_tdma_byte4_modify;
 	struct  btc_bt_link_info *bt_link_info = &btcoexist->bt_link_info;
 
-
-	coex_dm->cur_ps_tdma_on = turn_on;
-	coex_dm->cur_ps_tdma = type;
+	btcoexist->btc_set_atomic(btcoexist, &coex_dm->setting_tdma, TRUE);
 
 	/* 0x778 = 0x1 at wifi slot (no blocking BT Low-Pri pkts) */
 	if ((bt_link_info->slave_role) && (bt_link_info->a2dp_exist))
-		psTdmaByte4Modify = 0x1;
+		tdma_byte4_modify = 0x1;
 	else
-		psTdmaByte4Modify = 0x0;
-
-	if (pre_psTdmaByte4Modify != psTdmaByte4Modify) {
+		tdma_byte4_modify = 0x0;
 
+	if (pre_tdma_byte4_modify != tdma_byte4_modify) {
 		force_exec = TRUE;
-		pre_psTdmaByte4Modify = psTdmaByte4Modify;
+		pre_tdma_byte4_modify = tdma_byte4_modify;
 	}
 
 	if (!force_exec) {
-		if ((coex_dm->pre_ps_tdma_on == coex_dm->cur_ps_tdma_on) &&
-		    (coex_dm->pre_ps_tdma == coex_dm->cur_ps_tdma))
+		if (turn_on == coex_dm->cur_ps_tdma_on &&
+		    type == coex_dm->cur_ps_tdma) {
+			BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
+				    "[BTCoex], Skip TDMA because no change TDMA(%s, %d)\n",
+				    (coex_dm->cur_ps_tdma_on ? "on" : "off"),
+				    coex_dm->cur_ps_tdma);
+			BTC_TRACE(trace_buf);
+
+			btcoexist->btc_set_atomic(btcoexist,
+						  &coex_dm->setting_tdma,
+						  FALSE);
 			return;
+		}
 	}
 
-	if (coex_dm->cur_ps_tdma_on) {
+	if (turn_on) {
 		BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-			    "[BTCoex], ********** TDMA(on, %d) **********\n",
-			    coex_dm->cur_ps_tdma);
+			    "[BTCoex], ********** TDMA(on, %d)\n", type);
 		BTC_TRACE(trace_buf);
 
-		btcoexist->btc_write_1byte_bitmask(btcoexist, 0x550, 0x8,
-					   0x1);  /* enable TBTT nterrupt */
+		halbtc8723d2ant_post_state_to_bt(btcoexist,
+						 BT_8723D_2ANT_SCOREBOARD_TDMA,
+						 TRUE);
+
+		/* enable TBTT interrupt */
+		btcoexist->btc_write_1byte_bitmask(btcoexist, 0x550, 0x8, 0x1);
 	} else {
 		BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-			    "[BTCoex], ********** TDMA(off, %d) **********\n",
-			    coex_dm->cur_ps_tdma);
+			    "[BTCoex], ********** TDMA(off, %d)\n", type);
 		BTC_TRACE(trace_buf);
+
+		halbtc8723d2ant_post_state_to_bt(btcoexist,
+						 BT_8723D_2ANT_SCOREBOARD_TDMA,
+						 FALSE);
 	}
 
 
@@ -1819,183 +1806,179 @@ void halbtc8723d2ant_ps_tdma(IN struct btc_coexist *btcoexist,
 		switch (type) {
 		case 1:
 			halbtc8723d2ant_set_fw_pstdma(btcoexist, 0x61,
-								0x10, 0x03, 0x91,
-								0x54 | psTdmaByte4Modify);
+						      0x10, 0x03, 0x91, 0x54 |
+						      tdma_byte4_modify);
 			break;
 		case 2:
 		default:
 			halbtc8723d2ant_set_fw_pstdma(btcoexist, 0x61,
-								0x35, 0x03, 0x11,
-								0x11 | psTdmaByte4Modify);
+						      0x35, 0x03, 0x11, 0x11 |
+						      tdma_byte4_modify);
 			break;
 		case 3:
 			halbtc8723d2ant_set_fw_pstdma(btcoexist, 0x61,
-								0x3a, 0x3, 0x91,
-								0x10 | psTdmaByte4Modify);
+						      0x3a, 0x3, 0x91, 0x10 |
+						      tdma_byte4_modify);
 			break;
 		case 4:
 			halbtc8723d2ant_set_fw_pstdma(btcoexist, 0x61,
-								0x21, 0x3, 0x91,
-								0x10 | psTdmaByte4Modify);
+						      0x21, 0x3, 0x91, 0x10 |
+						      tdma_byte4_modify);
 			break;
 		case 5:
 			halbtc8723d2ant_set_fw_pstdma(btcoexist, 0x61,
-								0x25, 0x3, 0x91,
-								0x10 | psTdmaByte4Modify);
+						      0x25, 0x3, 0x91, 0x10 |
+						      tdma_byte4_modify);
 			break;
 		case 6:
 			halbtc8723d2ant_set_fw_pstdma(btcoexist, 0x61,
-								0x10, 0x3, 0x91,
-								0x10 | psTdmaByte4Modify);
+						      0x10, 0x3, 0x91, 0x10 |
+						      tdma_byte4_modify);
 			break;
 		case 7:
 			halbtc8723d2ant_set_fw_pstdma(btcoexist, 0x61,
-								0x20, 0x3, 0x91,
-								0x10 | psTdmaByte4Modify);
+						      0x20, 0x3, 0x91, 0x10 |
+						      tdma_byte4_modify);
 			break;
 		case 8:
 			halbtc8723d2ant_set_fw_pstdma(btcoexist, 0x61,
-								0x15, 0x03, 0x11,
-								0x11);
+						      0x15, 0x03, 0x11, 0x11);
 			break;
 		case 10:
 			halbtc8723d2ant_set_fw_pstdma(btcoexist, 0x61,
-								0x30, 0x03, 0x11,
-								0x10);
+						      0x30, 0x03, 0x11, 0x10);
 			break;
 		case 11:
 			halbtc8723d2ant_set_fw_pstdma(btcoexist, 0x61,
-								0x35, 0x03, 0x11,
-								0x10 | psTdmaByte4Modify);
+						      0x35, 0x03, 0x11, 0x10 |
+						      tdma_byte4_modify);
 			break;
 		case 12:
 			halbtc8723d2ant_set_fw_pstdma(btcoexist, 0x61,
-								0x35, 0x03, 0x11, 0x11);
+						      0x35, 0x03, 0x11, 0x11);
 			break;
 		case 13:
 			halbtc8723d2ant_set_fw_pstdma(btcoexist, 0x61,
-								0x1c, 0x03, 0x11,
-								0x10 | psTdmaByte4Modify);
+						      0x1c, 0x03, 0x11, 0x10 |
+						      tdma_byte4_modify);
 			break;
 		case 14:
 			halbtc8723d2ant_set_fw_pstdma(btcoexist, 0x61,
-								0x20, 0x03, 0x11,
-								0x11);
+						      0x20, 0x03, 0x11, 0x11);
 			break;
 		case 15:
 			halbtc8723d2ant_set_fw_pstdma(btcoexist, 0x61,
-								0x10, 0x03, 0x11,
-								0x14);
+						      0x10, 0x03, 0x11, 0x14);
 			break;
 		case 16:
 			halbtc8723d2ant_set_fw_pstdma(btcoexist, 0x61,
-								0x10, 0x03, 0x11,
-								0x15);
+						      0x10, 0x03, 0x11, 0x15);
 			break;
 		case 21:
 			halbtc8723d2ant_set_fw_pstdma(btcoexist, 0x61,
-								0x30, 0x03, 0x11,
-								0x10);
+						      0x30, 0x03, 0x11, 0x10);
 			break;
 		case 22:
 			halbtc8723d2ant_set_fw_pstdma(btcoexist, 0x61,
-								0x25, 0x03, 0x11,
-								0x10);
+						      0x25, 0x03, 0x11, 0x10);
 			break;
 		case 23:
 			halbtc8723d2ant_set_fw_pstdma(btcoexist, 0x61,
-								0x10, 0x03, 0x11,
-								0x10);
+						      0x10, 0x03, 0x11, 0x10);
 			break;
 		case 51:
 			halbtc8723d2ant_set_fw_pstdma(btcoexist, 0x61,
-								0x10, 0x03, 0x91,
-								0x10 | psTdmaByte4Modify);
+						      0x10, 0x03, 0x91, 0x10 |
+						      tdma_byte4_modify);
 			break;
 		case 101:
 			halbtc8723d2ant_set_fw_pstdma(btcoexist, 0x51,
-								0x10, 0x03, 0x10,
-								0x54 | psTdmaByte4Modify);
+						      0x10, 0x03, 0x10, 0x54 |
+						      tdma_byte4_modify);
 			break;
 		case 102:
 			halbtc8723d2ant_set_fw_pstdma(btcoexist, 0x61,
-								0x35, 0x03, 0x11,
-								0x11 | psTdmaByte4Modify);
+						      0x35, 0x03, 0x11, 0x11 |
+						      tdma_byte4_modify);
 			break;
 		case 103:
 			halbtc8723d2ant_set_fw_pstdma(btcoexist, 0x51,
-								0x30, 0x3, 0x10,
-								0x50 | psTdmaByte4Modify);
+						      0x30, 0x3, 0x10, 0x50 |
+						      tdma_byte4_modify);
 			break;
 		case 104:
 			halbtc8723d2ant_set_fw_pstdma(btcoexist, 0x51,
-								0x21, 0x3, 0x10,
-								0x50 | psTdmaByte4Modify);
+						      0x21, 0x3, 0x10, 0x50 |
+						      tdma_byte4_modify);
 			break;
 		case 105:
 			halbtc8723d2ant_set_fw_pstdma(btcoexist, 0x51,
-								0x35, 0x3, 0x10,
-								0x50 | psTdmaByte4Modify);
+						      0x35, 0x3, 0x10, 0x50 |
+						      tdma_byte4_modify);
 			break;
 		case 106:
 			halbtc8723d2ant_set_fw_pstdma(btcoexist, 0x51,
-								0x10, 0x3, 0x10,
-								0x50 | psTdmaByte4Modify);
+						      0x10, 0x3, 0x10, 0x50 |
+						      tdma_byte4_modify);
 			break;
 		case 107:
 			halbtc8723d2ant_set_fw_pstdma(btcoexist, 0x51,
-								0x10, 0x7, 0x10,
-								0x54);
+						      0x10, 0x7, 0x10, 0x54);
 			break;
 		case 108:
 			halbtc8723d2ant_set_fw_pstdma(btcoexist, 0x51,
-								0x30, 0x3, 0x10,
-								0x50 | psTdmaByte4Modify);
+						      0x30, 0x3, 0x10, 0x50 |
+						      tdma_byte4_modify);
 			break;
 		case 109:
 			halbtc8723d2ant_set_fw_pstdma(btcoexist, 0x51,
-								0x10, 0x03, 0x10,
-								0x54 | psTdmaByte4Modify);
+						      0x10, 0x03, 0x10, 0x54 |
+						      tdma_byte4_modify);
 			break;
 		case 110:
 			halbtc8723d2ant_set_fw_pstdma(btcoexist, 0x51,
-								0x30, 0x03, 0x10,
-								0x50 | psTdmaByte4Modify);
+						      0x30, 0x03, 0x10, 0x50 |
+						      tdma_byte4_modify);
 			break;
 		case 111:
 			halbtc8723d2ant_set_fw_pstdma(btcoexist, 0x61,
-								0x25, 0x03, 0x11,
-								0x11);
+						      0x25, 0x03, 0x11, 0x11);
 			break;
 		case 112:
 			halbtc8723d2ant_set_fw_pstdma(btcoexist, 0x51,
-						      0x4a, 0x3, 0x10,
-						      0x50);
+						      0x4a, 0x3, 0x10, 0x50);
 			break;
 		case 113:
 			halbtc8723d2ant_set_fw_pstdma(btcoexist, 0x61,
-								0x48, 0x03, 0x11,
-								0x10);
+						      0x48, 0x03, 0x11, 0x10);
 			break;
 		case 116:
 			halbtc8723d2ant_set_fw_pstdma(btcoexist, 0x51,
-						      0x08, 0x03, 0x10,
-						      0x54 | psTdmaByte4Modify);
+						      0x08, 0x03, 0x10, 0x54 |
+						      tdma_byte4_modify);
 			break;
 		case 117:
 			halbtc8723d2ant_set_fw_pstdma(btcoexist, 0x61,
-						      0x08, 0x03, 0x10,
-						      0x14 | psTdmaByte4Modify);
+						      0x08, 0x03, 0x10, 0x14 |
+						      tdma_byte4_modify);
 			break;
 		case 119:
 			halbtc8723d2ant_set_fw_pstdma(btcoexist, 0x61,
-						      0x10, 0x03, 0x11,
-						      0x14 | psTdmaByte4Modify);
+						      0x10, 0x03, 0x11, 0x14 |
+						      tdma_byte4_modify);
+			break;
+		case 120:
+			halbtc8723d2ant_set_fw_pstdma(btcoexist, 0x51,
+						      0x10, 0x03, 0x10, 0x55);
+			break;
+		case 121:
+			halbtc8723d2ant_set_fw_pstdma(btcoexist, 0x61,
+						      0x10, 0x03, 0x11, 0x15);
 			break;
 		case 151:
 			halbtc8723d2ant_set_fw_pstdma(btcoexist, 0x51,
-						      0x10, 0x03, 0x10,
-						      0x50 | psTdmaByte4Modify);
+						      0x10, 0x03, 0x10, 0x50 |
+						      tdma_byte4_modify);
 			break;
 		}
 	} else {
@@ -2016,11 +1999,13 @@ void halbtc8723d2ant_ps_tdma(IN struct btc_coexist *btcoexist,
 		}
 	}
 
-	coex_dm->pre_ps_tdma_on = coex_dm->cur_ps_tdma_on;
-	coex_dm->pre_ps_tdma = coex_dm->cur_ps_tdma;
+	coex_dm->cur_ps_tdma_on = turn_on;
+	coex_dm->cur_ps_tdma = type;
 
+	btcoexist->btc_set_atomic(btcoexist, &coex_dm->setting_tdma, FALSE);
 }
 
+static
 void halbtc8723d2ant_set_ant_path(IN struct btc_coexist *btcoexist,
 				  IN u8 ant_pos_type, IN boolean force_exec,
 				  IN u8 phase)
@@ -2036,8 +2021,9 @@ void halbtc8723d2ant_set_ant_path(IN struct btc_coexist *btcoexist,
 	u16				u16tmp0 = 0,  u16tmp1 = 0;
 
 
-	u32tmp1 = halbtc8723d2ant_ltecoex_indirect_read_reg(btcoexist,
-			0x38);
+#if BT_8723D_2ANT_COEX_DBG
+
+	u32tmp1 = halbtc8723d2ant_ltecoex_indirect_read_reg(btcoexist, 0x38);
 
      /* To avoid indirect access fail   */
 	if (((u32tmp1 & 0xf000) >> 12) != ((u32tmp1 & 0x0f00) >> 8)) {
@@ -2045,8 +2031,6 @@ void halbtc8723d2ant_set_ant_path(IN struct btc_coexist *btcoexist,
 		coex_sta->gnt_error_cnt++;
 	}
 
-
-#if BT_8723D_2ANT_COEX_DBG
 	u32tmp2 = halbtc8723d2ant_ltecoex_indirect_read_reg(btcoexist, 0x54);
 	u16tmp0 = btcoexist->btc_read_2byte(btcoexist, 0xaa);
 	u16tmp1 = btcoexist->btc_read_2byte(btcoexist, 0x948);
@@ -2054,12 +2038,12 @@ void halbtc8723d2ant_set_ant_path(IN struct btc_coexist *btcoexist,
 	u8tmp0 =  btcoexist->btc_read_1byte(btcoexist, 0x67);
 
 	BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-		"[BTCoex], ********** 0x67 = 0x%x, 0x948 = 0x%x, 0x73 = 0x%x(Before Set Ant Pat)\n",
+		    "[BTCoex], ********** 0x67 = 0x%x, 0x948 = 0x%x, 0x73 = 0x%x(Before Set Ant Pat)\n",
 		    u8tmp0, u16tmp1, u8tmp1);
 	BTC_TRACE(trace_buf);
 
 	BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-		"[BTCoex], **********0x38= 0x%x, 0x54= 0x%x, 0xaa = 0x%x (Before Set Ant Path)\n",
+		    "[BTCoex], **********0x38= 0x%x, 0x54= 0x%x, 0xaa = 0x%x (Before Set Ant Path)\n",
 		    u32tmp1, u32tmp2, u16tmp0);
 	BTC_TRACE(trace_buf);
 #endif
@@ -2072,7 +2056,7 @@ void halbtc8723d2ant_set_ant_path(IN struct btc_coexist *btcoexist,
 		if (coex_dm->cur_ant_pos_type == coex_dm->pre_ant_pos_type) {
 
 			BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-				"[BTCoex], ********** Skip Antenna Path Setup because no change!!**********\n");
+				    "[BTCoex], Skip Antenna Path Setup because no change!!\n");
 			BTC_TRACE(trace_buf);
 			return;
 		}
@@ -2083,23 +2067,11 @@ void halbtc8723d2ant_set_ant_path(IN struct btc_coexist *btcoexist,
 	switch (phase) {
 	case BT_8723D_2ANT_PHASE_COEX_POWERON:
 		/* Set Path control to WL */
-		btcoexist->btc_write_1byte_bitmask(btcoexist, 0x67,
-						   0x80, 0x0);
+		btcoexist->btc_write_1byte_bitmask(btcoexist, 0x67, 0x80, 0x0);
 
 		/* set Path control owner to WL at initial step */
-		halbtc8723d2ant_ltecoex_pathcontrol_owner(btcoexist,
-				BT_8723D_2ANT_PCO_BTSIDE);
-
-		/* set GNT_BT to SW high */
-		halbtc8723d2ant_ltecoex_set_gnt_bt(btcoexist,
-					   BT_8723D_2ANT_GNT_BLOCK_RFC_BB,
-					   BT_8723D_2ANT_GNT_TYPE_CTRL_BY_SW,
-					   BT_8723D_2ANT_SIG_STA_SET_TO_HIGH);
-		/* Set GNT_WL to SW low */
-		halbtc8723d2ant_ltecoex_set_gnt_wl(btcoexist,
-					   BT_8723D_2ANT_GNT_BLOCK_RFC_BB,
-					   BT_8723D_2ANT_GNT_TYPE_CTRL_BY_SW,
-					   BT_8723D_2ANT_SIG_STA_SET_TO_HIGH);
+		halbtc8723d2ant_coex_ctrl_owner(btcoexist,
+						BT_8723D_2ANT_PCO_BTSIDE);
 
 		if (BTC_ANT_PATH_AUTO == ant_pos_type)
 			ant_pos_type = BTC_ANT_PATH_WIFI;
@@ -2108,57 +2080,56 @@ void halbtc8723d2ant_set_ant_path(IN struct btc_coexist *btcoexist,
 
 		break;
 	case BT_8723D_2ANT_PHASE_COEX_INIT:
-		/* Disable LTE Coex Function in WiFi side (this should be on if LTE coex is required) */
+		/* Disable LTE Coex Function in WiFi side
+		 * (this should be on if LTE coex is required)
+		 */
 		halbtc8723d2ant_ltecoex_enable(btcoexist, 0x0);
 
-		/* GNT_WL_LTE always = 1 (this should be config if LTE coex is required) */
+		/* GNT_WL_LTE always = 1
+		 * (this should be config if LTE coex is required)
+		 */
 		halbtc8723d2ant_ltecoex_set_coex_table(
 			btcoexist,
 			BT_8723D_2ANT_CTT_WL_VS_LTE,
 			0xffff);
 
-		/* GNT_BT_LTE always = 1 (this should be config if LTE coex is required) */
+		/* GNT_BT_LTE always = 1
+		 * (this should be config if LTE coex is required)
+		 */
 		halbtc8723d2ant_ltecoex_set_coex_table(
 			btcoexist,
 			BT_8723D_2ANT_CTT_BT_VS_LTE,
 			0xffff);
 
-		/* Wait If BT IQK running, because Path control owner is at BT during BT IQK (setup by WiFi firmware) */
+		/* Wait If BT IQK running, because Path control owner is
+		 * at BT during BT IQK (setup by WiFi firmware)
+		 */
 		while (cnt_bt_cal_chk <= 20) {
-			u8tmp0 = btcoexist->btc_read_1byte(
-					 btcoexist,
-					 0x49d);
+			u8tmp0 = btcoexist->btc_read_1byte(btcoexist, 0x49d);
 			cnt_bt_cal_chk++;
 			if (u8tmp0 & BIT(0)) {
-				BTC_SPRINTF(
-					trace_buf,
-					BT_TMP_BUF_SIZE,
-					"[BTCoex], ########### BT is calibrating (wait cnt=%d) ###########\n",
-					cnt_bt_cal_chk);
-				BTC_TRACE(
-					trace_buf);
+				BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
+					    "[BTCoex],  BT is calibrating (wait cnt=%d)\n",
+					    cnt_bt_cal_chk);
+				BTC_TRACE(trace_buf);
 				delay_ms(50);
 			} else {
-				BTC_SPRINTF(
-					trace_buf,
-					BT_TMP_BUF_SIZE,
-					"[BTCoex], ********** BT is NOT calibrating (wait cnt=%d)**********\n",
-					cnt_bt_cal_chk);
-				BTC_TRACE(
-					trace_buf);
+				BTC_SPRINTF(trace_buf,
+					    BT_TMP_BUF_SIZE,
+					    "[BTCoex], BT is NOT calibrating (wait cnt=%d)\n",
+					    cnt_bt_cal_chk);
+				BTC_TRACE(trace_buf);
 				break;
 			}
 		}
 
 
 		/* Set Path control to WL */
-		btcoexist->btc_write_1byte_bitmask(btcoexist,
-						   0x67, 0x80, 0x1);
+		btcoexist->btc_write_1byte_bitmask(btcoexist, 0x67, 0x80, 0x1);
 
 		/* set Path control owner to WL at initial step */
-		halbtc8723d2ant_ltecoex_pathcontrol_owner(
-			btcoexist,
-			BT_8723D_2ANT_PCO_WLSIDE);
+		halbtc8723d2ant_coex_ctrl_owner(btcoexist,
+						BT_8723D_2ANT_PCO_WLSIDE);
 
 		/* set GNT_BT to SW high */
 		halbtc8723d2ant_ltecoex_set_gnt_bt(btcoexist,
@@ -2176,25 +2147,29 @@ void halbtc8723d2ant_set_ant_path(IN struct btc_coexist *btcoexist,
 		if (BTC_ANT_PATH_AUTO == ant_pos_type) {
 			if (board_info->btdm_ant_pos ==
 			    BTC_ANTENNA_AT_MAIN_PORT)
-				ant_pos_type =
-					BTC_ANT_WIFI_AT_MAIN;
+				ant_pos_type = BTC_ANT_WIFI_AT_MAIN;
 			else
-				ant_pos_type =
-					BTC_ANT_WIFI_AT_AUX;
+				ant_pos_type = BTC_ANT_WIFI_AT_AUX;
 		}
 
 		break;
 	case BT_8723D_2ANT_PHASE_WLANONLY_INIT:
-		/* Disable LTE Coex Function in WiFi side (this should be on if LTE coex is required) */
+		/* Disable LTE Coex Function in WiFi side
+		 * (this should be on if LTE coex is required)
+		 */
 		halbtc8723d2ant_ltecoex_enable(btcoexist, 0x0);
 
-		/* GNT_WL_LTE always = 1 (this should be config if LTE coex is required) */
+		/* GNT_WL_LTE always = 1
+		 * (this should be config if LTE coex is required)
+		 */
 		halbtc8723d2ant_ltecoex_set_coex_table(
 			btcoexist,
 			BT_8723D_2ANT_CTT_WL_VS_LTE,
 			0xffff);
 
-		/* GNT_BT_LTE always = 1 (this should be config if LTE coex is required) */
+		/* GNT_BT_LTE always = 1
+		 *(this should be config if LTE coex is required)
+		 */
 		halbtc8723d2ant_ltecoex_set_coex_table(
 			btcoexist,
 			BT_8723D_2ANT_CTT_BT_VS_LTE,
@@ -2205,9 +2180,8 @@ void halbtc8723d2ant_set_ant_path(IN struct btc_coexist *btcoexist,
 						   0x67, 0x80, 0x1);
 
 		/* set Path control owner to WL at initial step */
-		halbtc8723d2ant_ltecoex_pathcontrol_owner(
-			btcoexist,
-			BT_8723D_2ANT_PCO_WLSIDE);
+		halbtc8723d2ant_coex_ctrl_owner(btcoexist,
+						BT_8723D_2ANT_PCO_WLSIDE);
 
 		/* set GNT_BT to SW Low */
 		halbtc8723d2ant_ltecoex_set_gnt_bt(btcoexist,
@@ -2225,11 +2199,9 @@ void halbtc8723d2ant_set_ant_path(IN struct btc_coexist *btcoexist,
 		if (BTC_ANT_PATH_AUTO == ant_pos_type) {
 			if (board_info->btdm_ant_pos ==
 			    BTC_ANTENNA_AT_MAIN_PORT)
-				ant_pos_type =
-					BTC_ANT_WIFI_AT_MAIN;
+				ant_pos_type = BTC_ANT_WIFI_AT_MAIN;
 			else
-				ant_pos_type =
-					BTC_ANT_WIFI_AT_AUX;
+				ant_pos_type = BTC_ANT_WIFI_AT_AUX;
 		}
 
 		break;
@@ -2238,15 +2210,11 @@ void halbtc8723d2ant_set_ant_path(IN struct btc_coexist *btcoexist,
 		halbtc8723d2ant_ltecoex_enable(btcoexist, 0x0);
 
 		/* Set Path control to BT */
-		btcoexist->btc_write_1byte_bitmask(btcoexist,
-						   0x67, 0x80, 0x0);
+		btcoexist->btc_write_1byte_bitmask(btcoexist, 0x67, 0x80, 0x0);
 
 		/* set Path control owner to BT */
-		halbtc8723d2ant_ltecoex_pathcontrol_owner(
-			btcoexist,
-			BT_8723D_2ANT_PCO_BTSIDE);
-
-		/*halbtc8723d2ant_ignore_wlan_act(btcoexist, FORCE_EXEC, TRUE);*/
+		halbtc8723d2ant_coex_ctrl_owner(btcoexist,
+						BT_8723D_2ANT_PCO_BTSIDE);
 
 		coex_sta->run_time_state = FALSE;
 		break;
@@ -2263,32 +2231,30 @@ void halbtc8723d2ant_set_ant_path(IN struct btc_coexist *btcoexist,
 					 0x49d);
 
 			cnt_bt_cal_chk++;
-			if ((u8tmp0 & BIT(0)) ||
-			    (u8tmp1 & BIT(0))) {
+			if ((u8tmp0 & BIT(0)) || (u8tmp1 & BIT(0))) {
 				BTC_SPRINTF(trace_buf,
 					    BT_TMP_BUF_SIZE,
-					"[BTCoex], ########### WL or BT is IQK (wait cnt=%d)\n",
+					    "[BTCoex], ########### WL or BT is IQK (wait cnt=%d)\n",
 					    cnt_bt_cal_chk);
 				BTC_TRACE(trace_buf);
 				delay_ms(50);
 			} else {
 				BTC_SPRINTF(trace_buf,
 					    BT_TMP_BUF_SIZE,
-					"[BTCoex], ********** WL and BT is NOT IQK (wait cnt=%d)\n",
+					    "[BTCoex], ********** WL and BT is NOT IQK (wait cnt=%d)\n",
 					    cnt_bt_cal_chk);
 				BTC_TRACE(trace_buf);
 				break;
 			}
 		}
 
-		/* Set Path control to WL */
-		/* btcoexist->btc_write_1byte_bitmask(btcoexist, 0x67, 0x80, 0x1);*/
-
-		/* set Path control owner to WL at runtime step */
-		halbtc8723d2ant_ltecoex_pathcontrol_owner(
-			btcoexist,
-			BT_8723D_2ANT_PCO_WLSIDE);
-
+		/* Set Path control to WL
+		 * btcoexist->btc_write_1byte_bitmask(
+		 * btcoexist, 0x67, 0x80, 0x1);
+		 * set Path control owner to WL at runtime step
+		 */
+		halbtc8723d2ant_coex_ctrl_owner(btcoexist,
+						BT_8723D_2ANT_PCO_WLSIDE);
 
 		halbtc8723d2ant_ltecoex_set_gnt_bt(btcoexist,
 					   BT_8723D_2ANT_GNT_BLOCK_RFC_BB,
@@ -2306,20 +2272,17 @@ void halbtc8723d2ant_set_ant_path(IN struct btc_coexist *btcoexist,
 		if (BTC_ANT_PATH_AUTO == ant_pos_type) {
 			if (board_info->btdm_ant_pos ==
 			    BTC_ANTENNA_AT_MAIN_PORT)
-				ant_pos_type =
-					BTC_ANT_WIFI_AT_MAIN;
+				ant_pos_type = BTC_ANT_WIFI_AT_MAIN;
 			else
-				ant_pos_type =
-					BTC_ANT_WIFI_AT_AUX;
+				ant_pos_type = BTC_ANT_WIFI_AT_AUX;
 		}
 
 		break;
 	case BT_8723D_2ANT_PHASE_2G_FREERUN:
 
 		/* set Path control owner to WL at runtime step */
-		halbtc8723d2ant_ltecoex_pathcontrol_owner(
-			btcoexist,
-			BT_8723D_2ANT_PCO_WLSIDE);
+		halbtc8723d2ant_coex_ctrl_owner(btcoexist,
+						BT_8723D_2ANT_PCO_WLSIDE);
 
 		/* set GNT_BT to SW Hi */
 		halbtc8723d2ant_ltecoex_set_gnt_bt(btcoexist,
@@ -2340,13 +2303,11 @@ void halbtc8723d2ant_set_ant_path(IN struct btc_coexist *btcoexist,
 		halbtc8723d2ant_ltecoex_enable(btcoexist, 0x0);
 
 		/* Set Path control to WL */
-		btcoexist->btc_write_1byte_bitmask(btcoexist,
-						   0x67, 0x80, 0x1);
+		btcoexist->btc_write_1byte_bitmask(btcoexist, 0x67, 0x80, 0x1);
 
 		/* set Path control owner to WL */
-		halbtc8723d2ant_ltecoex_pathcontrol_owner(
-			btcoexist,
-			BT_8723D_2ANT_PCO_WLSIDE);
+		halbtc8723d2ant_coex_ctrl_owner(btcoexist,
+						BT_8723D_2ANT_PCO_WLSIDE);
 
 		/* set GNT_BT to SW Hi */
 		halbtc8723d2ant_ltecoex_set_gnt_bt(btcoexist,
@@ -2365,26 +2326,25 @@ void halbtc8723d2ant_set_ant_path(IN struct btc_coexist *btcoexist,
 		if (BTC_ANT_PATH_AUTO == ant_pos_type) {
 			if (board_info->btdm_ant_pos ==
 			    BTC_ANTENNA_AT_MAIN_PORT)
-				ant_pos_type =
-					BTC_ANT_WIFI_AT_MAIN;
+				ant_pos_type = BTC_ANT_WIFI_AT_MAIN;
 			else
-				ant_pos_type =
-					BTC_ANT_WIFI_AT_AUX;
+				ant_pos_type = BTC_ANT_WIFI_AT_AUX;
 		}
 
 		break;
 	case BT_8723D_2ANT_PHASE_ANTENNA_DET:
 
 		/* Set Path control to WL */
-		btcoexist->btc_write_1byte_bitmask(btcoexist, 0x67,
-						   0x80, 0x1);
+		btcoexist->btc_write_1byte_bitmask(btcoexist, 0x67, 0x80, 0x1);
 
 		/* set Path control owner to WL */
-		halbtc8723d2ant_ltecoex_pathcontrol_owner(btcoexist,
-				BT_8723D_2ANT_PCO_WLSIDE);
+		halbtc8723d2ant_coex_ctrl_owner(btcoexist,
+						BT_8723D_2ANT_PCO_WLSIDE);
 
-		/* Set Antenna Path,  both GNT_WL/GNT_BT = 1, and control by SW */
-		/* set GNT_BT to SW high */
+		/* Set Antenna Path,  both GNT_WL/GNT_BT = 1,
+		 *and control by SW
+		 * set GNT_BT to SW high
+		 */
 		halbtc8723d2ant_ltecoex_set_gnt_bt(btcoexist,
 					   BT_8723D_2ANT_GNT_BLOCK_RFC_BB,
 					   BT_8723D_2ANT_GNT_TYPE_CTRL_BY_SW,
@@ -2406,21 +2366,17 @@ void halbtc8723d2ant_set_ant_path(IN struct btc_coexist *btcoexist,
 
 	is_hw_ant_div_on = board_info->ant_div_cfg;
 
-	if ((is_hw_ant_div_on) && (phase != BT_8723D_2ANT_PHASE_ANTENNA_DET))
+	if (is_hw_ant_div_on && phase != BT_8723D_2ANT_PHASE_ANTENNA_DET)
 		btcoexist->btc_write_2byte(btcoexist, 0x948, 0x140);
 	else if ((is_hw_ant_div_on == FALSE) &&
 		 (phase != BT_8723D_2ANT_PHASE_WLAN_OFF)) {
 
 		switch (ant_pos_type) {
 		case BTC_ANT_WIFI_AT_MAIN:
-
-			btcoexist->btc_write_2byte(btcoexist,
-						   0x948, 0x0);
+			btcoexist->btc_write_2byte(btcoexist, 0x948, 0x0);
 			break;
 		case BTC_ANT_WIFI_AT_AUX:
-
-			btcoexist->btc_write_2byte(btcoexist,
-						   0x948, 0x280);
+			btcoexist->btc_write_2byte(btcoexist, 0x948, 0x280);
 			break;
 		}
 	}
@@ -2435,18 +2391,19 @@ void halbtc8723d2ant_set_ant_path(IN struct btc_coexist *btcoexist,
 	u8tmp0 =  btcoexist->btc_read_1byte(btcoexist, 0x67);
 
 	BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-		"[BTCoex], ********** 0x67 = 0x%x, 0x948 = 0x%x, 0x73 = 0x%x(After Set Ant Pat)\n",
+		    "[BTCoex], ********** 0x67 = 0x%x, 0x948 = 0x%x, 0x73 = 0x%x(After Set Ant Pat)\n",
 		    u8tmp0, u16tmp1, u8tmp1);
 	BTC_TRACE(trace_buf);
 
 	BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-		"[BTCoex], **********0x38= 0x%x, 0x54= 0x%x, 0xaa= 0x%x (After Set Ant Path)\n",
+		    "[BTCoex], **********0x38= 0x%x, 0x54= 0x%x, 0xaa= 0x%x (After Set Ant Path)\n",
 		    u32tmp1, u32tmp2, u16tmp0);
 	BTC_TRACE(trace_buf);
 #endif
 
 }
 
+static
 u8 halbtc8723d2ant_action_algorithm(IN struct btc_coexist *btcoexist)
 {
 	struct  btc_bt_link_info	*bt_link_info = &btcoexist->bt_link_info;
@@ -2482,7 +2439,7 @@ u8 halbtc8723d2ant_action_algorithm(IN struct btc_coexist *btcoexist)
 		}
 	} else if ((bt_link_info->a2dp_exist) && (coex_sta->is_bt_a2dp_sink)) {
 		BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-				    "[BTCoex], A2DP Sink\n");
+			    "[BTCoex], A2DP Sink\n");
 		BTC_TRACE(trace_buf);
 		algorithm = BT_8723D_2ANT_COEX_ALGO_A2DPSINK;
 	} else if (num_of_diff_profile == 1) {
@@ -2597,13 +2554,13 @@ u8 halbtc8723d2ant_action_algorithm(IN struct btc_coexist *btcoexist)
 				   bt_link_info->pan_exist) {
 				if (bt_hs_on) {
 					BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-						"[BTCoex], SCO + HID + PAN(HS)\n");
+						    "[BTCoex], SCO + HID + PAN(HS)\n");
 					BTC_TRACE(trace_buf);
 					algorithm =
 						BT_8723D_2ANT_COEX_ALGO_PANEDR_HID;
 				} else {
 					BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-						"[BTCoex], SCO + HID + PAN(EDR)\n");
+						    "[BTCoex], SCO + HID + PAN(EDR)\n");
 					BTC_TRACE(trace_buf);
 					algorithm =
 						BT_8723D_2ANT_COEX_ALGO_PANEDR_HID;
@@ -2668,8 +2625,7 @@ u8 halbtc8723d2ant_action_algorithm(IN struct btc_coexist *btcoexist)
 	return algorithm;
 }
 
-
-
+static
 void halbtc8723d2ant_action_coex_all_off(IN struct btc_coexist *btcoexist)
 {
 
@@ -2684,6 +2640,7 @@ void halbtc8723d2ant_action_coex_all_off(IN struct btc_coexist *btcoexist)
 	halbtc8723d2ant_ps_tdma(btcoexist, NORMAL_EXEC, FALSE, 0);
 }
 
+static
 void halbtc8723d2ant_action_bt_whql_test(IN struct btc_coexist *btcoexist)
 {
 	halbtc8723d2ant_adjust_wl_tx_power(btcoexist, NORMAL_EXEC, 0xb2);
@@ -2696,6 +2653,7 @@ void halbtc8723d2ant_action_bt_whql_test(IN struct btc_coexist *btcoexist)
 	halbtc8723d2ant_ps_tdma(btcoexist, NORMAL_EXEC, FALSE, 0);
 }
 
+static
 void halbtc8723d2ant_action_freerun(IN struct btc_coexist *btcoexist)
 {
 	boolean wifi_busy = FALSE;
@@ -2722,8 +2680,7 @@ void halbtc8723d2ant_action_freerun(IN struct btc_coexist *btcoexist)
 	halbtc8723d2ant_ps_tdma(btcoexist, FORCE_EXEC, FALSE, 0);
 }
 
-
-
+static
 void halbtc8723d2ant_action_bt_hs(IN struct btc_coexist *btcoexist)
 {
 	static u8	prewifi_rssi_state = BTC_RSSI_STATE_LOW;
@@ -2809,7 +2766,7 @@ void halbtc8723d2ant_action_bt_hs(IN struct btc_coexist *btcoexist)
 
 }
 
-
+static
 void halbtc8723d2ant_action_bt_inquiry(IN struct btc_coexist *btcoexist)
 {
 
@@ -2881,24 +2838,27 @@ void halbtc8723d2ant_action_bt_inquiry(IN struct btc_coexist *btcoexist)
 
 }
 
-
+static
 void halbtc8723d2ant_action_bt_relink(IN struct btc_coexist *btcoexist)
 {
 	struct  btc_bt_link_info *bt_link_info = &btcoexist->bt_link_info;
 
-	if (((!coex_sta->is_bt_multi_link) && (!bt_link_info->pan_exist)) ||
-		((bt_link_info->a2dp_exist) && (bt_link_info->hid_exist))) {
+	if ((!coex_sta->is_bt_multi_link && !bt_link_info->pan_exist) ||
+	    (bt_link_info->a2dp_exist && bt_link_info->hid_exist)) {
 
 		halbtc8723d2ant_adjust_wl_tx_power(btcoexist, FORCE_EXEC, 0xb2);
 		halbtc8723d2ant_adjust_bt_tx_power(btcoexist, NORMAL_EXEC, 0);
-		halbtc8723d2ant_adjust_wl_rx_gain(btcoexist, NORMAL_EXEC, FALSE);
-		halbtc8723d2ant_adjust_bt_rx_gain(btcoexist, NORMAL_EXEC, FALSE);
+		halbtc8723d2ant_adjust_wl_rx_gain(btcoexist,
+						  NORMAL_EXEC, FALSE);
+		halbtc8723d2ant_adjust_bt_rx_gain(btcoexist,
+						  NORMAL_EXEC, FALSE);
 
 		halbtc8723d2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 1);
 		halbtc8723d2ant_ps_tdma(btcoexist, NORMAL_EXEC, TRUE, 8);
 	}
 }
 
+static
 void halbtc8723d2ant_action_bt_idle(IN struct btc_coexist *btcoexist)
 {
 	boolean wifi_busy = FALSE;
@@ -2939,6 +2899,7 @@ void halbtc8723d2ant_action_bt_idle(IN struct btc_coexist *btcoexist)
 
 
 /* SCO only or SCO+PAN(HS) */
+static
 void halbtc8723d2ant_action_sco(IN struct btc_coexist *btcoexist)
 {
 	static u8	prewifi_rssi_state = BTC_RSSI_STATE_LOW;
@@ -2995,7 +2956,7 @@ void halbtc8723d2ant_action_sco(IN struct btc_coexist *btcoexist)
 
 		coex_dm->is_switch_to_1dot5_ant = FALSE;
 
-		if (coex_sta->is_eSCO_mode)
+		if (coex_sta->is_esco_mode)
 			halbtc8723d2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 1);
 		else  /* 2-Ant free run if eSCO mode */
 			halbtc8723d2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 0);
@@ -3005,7 +2966,7 @@ void halbtc8723d2ant_action_sco(IN struct btc_coexist *btcoexist)
 
 }
 
-
+static
 void halbtc8723d2ant_action_hid(IN struct btc_coexist *btcoexist)
 {
 	static u8	prewifi_rssi_state = BTC_RSSI_STATE_LOW;
@@ -3082,6 +3043,7 @@ void halbtc8723d2ant_action_hid(IN struct btc_coexist *btcoexist)
 
 }
 
+static
 void halbtc8723d2ant_action_a2dpsink(IN struct btc_coexist *btcoexist)
 {
 	static u8	prewifi_rssi_state = BTC_RSSI_STATE_LOW;
@@ -3164,12 +3126,13 @@ void halbtc8723d2ant_action_a2dpsink(IN struct btc_coexist *btcoexist)
 		coex_dm->is_switch_to_1dot5_ant = TRUE;
 
 		halbtc8723d2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 8);
-		halbtc8723d2ant_ps_tdma(btcoexist, NORMAL_EXEC, TRUE, 105);
+		halbtc8723d2ant_ps_tdma(btcoexist, NORMAL_EXEC, TRUE, 104);
 	}
 
 }
 
 /* A2DP only / PAN(EDR) only/ A2DP+PAN(HS) */
+static
 void halbtc8723d2ant_action_a2dp(IN struct btc_coexist *btcoexist)
 {
 	static u8	prewifi_rssi_state = BTC_RSSI_STATE_LOW;
@@ -3231,32 +3194,48 @@ void halbtc8723d2ant_action_a2dp(IN struct btc_coexist *btcoexist)
 			80, 0);
 
 #if 1
-	if (BTC_RSSI_HIGH(wifi_rssi_state) &&
-		BTC_RSSI_HIGH(bt_rssi_state)) {
-
+	if (BTC_RSSI_HIGH(wifi_rssi_state) && BTC_RSSI_HIGH(bt_rssi_state)) {
 		halbtc8723d2ant_action_freerun(btcoexist);
 	} else {
 
 		if (wifi_link_status & WIFI_P2P_GC_CONNECTED) {
-			halbtc8723d2ant_adjust_wl_tx_power(btcoexist, NORMAL_EXEC, 0xb2);
-			halbtc8723d2ant_adjust_bt_tx_power(btcoexist, NORMAL_EXEC, 15);
+			halbtc8723d2ant_adjust_wl_tx_power(btcoexist,
+							   NORMAL_EXEC, 0xb2);
+			halbtc8723d2ant_adjust_bt_tx_power(btcoexist,
+							   NORMAL_EXEC, 15);
 
 		} else {
-			halbtc8723d2ant_adjust_wl_tx_power(btcoexist, NORMAL_EXEC, 0x90);
-			halbtc8723d2ant_adjust_bt_tx_power(btcoexist, NORMAL_EXEC, 0x0);
+			halbtc8723d2ant_adjust_wl_tx_power(btcoexist,
+							   NORMAL_EXEC, 0x90);
+			halbtc8723d2ant_adjust_bt_tx_power(btcoexist,
+							   NORMAL_EXEC, 0x0);
 		}
 
-		halbtc8723d2ant_adjust_wl_rx_gain(btcoexist, NORMAL_EXEC, FALSE);
-		halbtc8723d2ant_adjust_bt_rx_gain(btcoexist, NORMAL_EXEC, FALSE);
+		halbtc8723d2ant_adjust_wl_rx_gain(btcoexist,
+						  NORMAL_EXEC, FALSE);
+		halbtc8723d2ant_adjust_bt_rx_gain(btcoexist,
+						  NORMAL_EXEC, FALSE);
 
 		coex_dm->is_switch_to_1dot5_ant = TRUE;
 
 		halbtc8723d2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 8);
 
-		if (BTC_RSSI_HIGH(wifi_rssi_state3))
-			halbtc8723d2ant_ps_tdma(btcoexist, NORMAL_EXEC, TRUE, 119);
-		else
-			halbtc8723d2ant_ps_tdma(btcoexist, NORMAL_EXEC, TRUE, 101);
+		if (BTC_RSSI_HIGH(wifi_rssi_state3)) {
+			if (coex_sta->connect_ap_period_cnt > 0)
+				halbtc8723d2ant_ps_tdma(btcoexist, NORMAL_EXEC,
+							TRUE, 121);
+			else
+				halbtc8723d2ant_ps_tdma(btcoexist, NORMAL_EXEC,
+							TRUE, 119);
+		} else {
+			if (coex_sta->connect_ap_period_cnt > 0)
+				halbtc8723d2ant_ps_tdma(btcoexist, NORMAL_EXEC,
+							TRUE, 120);
+			else
+				halbtc8723d2ant_ps_tdma(btcoexist, NORMAL_EXEC,
+							TRUE, 101);
+		}
+
 	}
 
 #else
@@ -3306,7 +3285,7 @@ void halbtc8723d2ant_action_a2dp(IN struct btc_coexist *btcoexist)
 
 }
 
-
+static
 void halbtc8723d2ant_action_pan_edr(IN struct btc_coexist *btcoexist)
 {
 	static u8	prewifi_rssi_state = BTC_RSSI_STATE_LOW;
@@ -3414,8 +3393,8 @@ void halbtc8723d2ant_action_pan_edr(IN struct btc_coexist *btcoexist)
 		coex_dm->is_switch_to_1dot5_ant = TRUE;
 
 		/* for Lenovo CPT_For_WiFi OPP test  */
-		if ((btcoexist->board_info.customerID == RT_CID_LENOVO_CHINA) &&
-			BTC_RSSI_HIGH(wifi_rssi_state3) && (wifi_busy)) {
+		if (btcoexist->board_info.customer_id == RT_CID_LENOVO_CHINA &&
+		    BTC_RSSI_HIGH(wifi_rssi_state3) && wifi_busy) {
 			halbtc8723d2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 7);
 
 			halbtc8723d2ant_ps_tdma(btcoexist, NORMAL_EXEC, TRUE, 112);
@@ -3434,6 +3413,7 @@ void halbtc8723d2ant_action_pan_edr(IN struct btc_coexist *btcoexist)
 
 }
 
+static
 void halbtc8723d2ant_action_hid_a2dp(IN struct btc_coexist *btcoexist)
 {
 	static u8	prewifi_rssi_state = BTC_RSSI_STATE_LOW;
@@ -3566,7 +3546,7 @@ void halbtc8723d2ant_action_hid_a2dp(IN struct btc_coexist *btcoexist)
 #endif
 }
 
-
+static
 void halbtc8723d2ant_action_a2dp_pan_hs(IN struct btc_coexist *btcoexist)
 {
 	static u8	prewifi_rssi_state = BTC_RSSI_STATE_LOW;
@@ -3678,6 +3658,7 @@ void halbtc8723d2ant_action_a2dp_pan_hs(IN struct btc_coexist *btcoexist)
 
 
 /* PAN(EDR)+A2DP */
+static
 void halbtc8723d2ant_action_pan_edr_a2dp(IN struct btc_coexist *btcoexist)
 {
 	static u8	prewifi_rssi_state = BTC_RSSI_STATE_LOW;
@@ -3779,8 +3760,8 @@ void halbtc8723d2ant_action_pan_edr_a2dp(IN struct btc_coexist *btcoexist)
 		coex_dm->is_switch_to_1dot5_ant = TRUE;
 
 		/* for Lenovo coex test case    */
-		if ((btcoexist->board_info.customerID == RT_CID_LENOVO_CHINA) &&
-			(coex_sta->scan_ap_num <= 10)) {
+		if (btcoexist->board_info.customer_id == RT_CID_LENOVO_CHINA &&
+		    coex_sta->scan_ap_num <= 10) {
 
 			halbtc8723d2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 8);
 
@@ -3806,7 +3787,7 @@ void halbtc8723d2ant_action_pan_edr_a2dp(IN struct btc_coexist *btcoexist)
 
 }
 
-
+static
 void halbtc8723d2ant_action_pan_edr_hid(IN struct btc_coexist *btcoexist)
 {
 	static u8	prewifi_rssi_state = BTC_RSSI_STATE_LOW;
@@ -3890,6 +3871,7 @@ void halbtc8723d2ant_action_pan_edr_hid(IN struct btc_coexist *btcoexist)
 
 
 /* HID+A2DP+PAN(EDR) */
+static
 void halbtc8723d2ant_action_hid_a2dp_pan_edr(IN struct btc_coexist *btcoexist)
 {
 	static u8	prewifi_rssi_state = BTC_RSSI_STATE_LOW;
@@ -3977,12 +3959,19 @@ void halbtc8723d2ant_action_hid_a2dp_pan_edr(IN struct btc_coexist *btcoexist)
 
 }
 
+static
 void halbtc8723d2ant_action_wifi_native_lps(IN struct btc_coexist *btcoexist)
 {
-	halbtc8723d2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 2);
+	struct  btc_bt_link_info *bt_link_info = &btcoexist->bt_link_info;
+
+	if (bt_link_info->pan_exist)
+		halbtc8723d2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 2);
+	else
+		halbtc8723d2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 5);
 	halbtc8723d2ant_ps_tdma(btcoexist, NORMAL_EXEC, FALSE, 0);
 }
 
+static
 void halbtc8723d2ant_action_wifi_multi_port(IN struct btc_coexist *btcoexist)
 {
 	halbtc8723d2ant_adjust_wl_tx_power(btcoexist, NORMAL_EXEC, 0xb2);
@@ -3996,6 +3985,7 @@ void halbtc8723d2ant_action_wifi_multi_port(IN struct btc_coexist *btcoexist)
 	halbtc8723d2ant_ps_tdma(btcoexist, NORMAL_EXEC, FALSE, 0);
 }
 
+static
 void halbtc8723d2ant_action_wifi_linkscan_process(IN struct btc_coexist *btcoexist)
 {
 	struct	btc_bt_link_info *bt_link_info = &btcoexist->bt_link_info;
@@ -4015,6 +4005,7 @@ void halbtc8723d2ant_action_wifi_linkscan_process(IN struct btc_coexist *btcoexi
 		halbtc8723d2ant_ps_tdma(btcoexist, NORMAL_EXEC, TRUE, 21);
 }
 
+static
 void halbtc8723d2ant_action_wifi_not_connected(IN struct btc_coexist *btcoexist)
 {
 	halbtc8723d2ant_adjust_wl_tx_power(btcoexist, NORMAL_EXEC, 0xb2);
@@ -4028,6 +4019,7 @@ void halbtc8723d2ant_action_wifi_not_connected(IN struct btc_coexist *btcoexist)
 	halbtc8723d2ant_ps_tdma(btcoexist, NORMAL_EXEC, FALSE, 0);
 }
 
+static
 void halbtc8723d2ant_action_wifi_connected(IN struct btc_coexist *btcoexist)
 {
 	switch (coex_dm->cur_algorithm) {
@@ -4111,7 +4103,7 @@ void halbtc8723d2ant_action_wifi_connected(IN struct btc_coexist *btcoexist)
 
 }
 
-
+static
 void halbtc8723d2ant_run_coexist_mechanism(IN struct btc_coexist *btcoexist)
 {
 	u8	algorithm = 0;
@@ -4174,8 +4166,7 @@ void halbtc8723d2ant_run_coexist_mechanism(IN struct btc_coexist *btcoexist)
 		return;
 	}
 
-	if ((coex_sta->under_lps) && (!coex_sta->force_lps_ctrl) &&
-		(!coex_sta->acl_busy)) {
+	if (coex_sta->under_lps && !coex_sta->force_lps_ctrl) {
 		BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
 				"[BTCoex], RunCoexistMechanism(), wifi is under LPS !!!\n");
 		BTC_TRACE(trace_buf);
@@ -4207,9 +4198,7 @@ void halbtc8723d2ant_run_coexist_mechanism(IN struct btc_coexist *btcoexist)
 		return;
 	}
 
-	if ((coex_sta->is_setupLink) &&
-		(coex_sta->bt_relink_downcount != 0) &&
-		(!coex_sta->is_2g_freerun)) {
+	if (coex_sta->is_setup_link || coex_sta->bt_relink_downcount != 0) {
 		BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
 			"[BTCoex], BT is re-link !!!\n");
 		BTC_TRACE(trace_buf);
@@ -4265,10 +4254,9 @@ void halbtc8723d2ant_run_coexist_mechanism(IN struct btc_coexist *btcoexist)
 			return;
 	}
 
-	if ((BT_8723D_2ANT_BT_STATUS_NON_CONNECTED_IDLE ==
-			coex_dm->bt_status) ||
-		   (BT_8723D_2ANT_BT_STATUS_CONNECTED_IDLE ==
-			coex_dm->bt_status)) {
+	if ((coex_dm->bt_status == BT_8723D_2ANT_BT_STATUS_NON_CONNECTED_IDLE ||
+	     coex_dm->bt_status == BT_8723D_2ANT_BT_STATUS_CONNECTED_IDLE)
+	     && wifi_connected) {
 
 		BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
 				"[BTCoex], Action 2-Ant, bt idle!!.\n");
@@ -4308,7 +4296,7 @@ void halbtc8723d2ant_run_coexist_mechanism(IN struct btc_coexist *btcoexist)
 	}
 }
 
-
+static
 void halbtc8723d2ant_init_coex_dm(IN struct btc_coexist *btcoexist)
 {
 	BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
@@ -4324,17 +4312,17 @@ void halbtc8723d2ant_init_coex_dm(IN struct btc_coexist *btcoexist)
 	halbtc8723d2ant_low_penalty_ra(btcoexist, NORMAL_EXEC, FALSE);
 
 	coex_sta->pop_event_cnt = 0;
-	coex_sta->cnt_RemoteNameReq = 0;
-	coex_sta->cnt_ReInit = 0;
-	coex_sta->cnt_setupLink = 0;
-	coex_sta->cnt_IgnWlanAct = 0;
-	coex_sta->cnt_Page = 0;
-	coex_sta->cnt_RoleSwitch = 0;
+	coex_sta->cnt_remotenamereq = 0;
+	coex_sta->cnt_reinit = 0;
+	coex_sta->cnt_setuplink = 0;
+	coex_sta->cnt_ignwlanact = 0;
+	coex_sta->cnt_page = 0;
+	coex_sta->cnt_roleswitch = 0;
 
 	halbtc8723d2ant_query_bt_info(btcoexist);
 }
 
-
+static
 void halbtc8723d2ant_init_hw_config(IN struct btc_coexist *btcoexist,
 				    IN boolean wifi_only)
 {
@@ -4385,15 +4373,8 @@ void halbtc8723d2ant_init_hw_config(IN struct btc_coexist *btcoexist,
 	for (i = 0; i <= 9; i++)
 		coex_sta->bt_afh_map[i] = 0;
 
-#if 0
-	btcoexist->btc_get(btcoexist, BTC_GET_U4_VENDOR, &vendor);
-	if (vendor == BTC_VENDOR_LENOVO)
-		coex_dm->switch_thres_offset = 0;
-	else
-		coex_dm->switch_thres_offset = 20;
-#endif
-	/* 0xf0[15:12] --> Chip Cut information */
-	coex_sta->cut_version = (btcoexist->btc_read_1byte(btcoexist,
+	/* 0xf0[15:12] --> kt_ver */
+	coex_sta->kt_ver = (btcoexist->btc_read_1byte(btcoexist,
 				 0xf1) & 0xf0) >> 4;
 
 	coex_sta->dis_ver_info_cnt = 0;
@@ -4421,13 +4402,6 @@ void halbtc8723d2ant_init_hw_config(IN struct btc_coexist *btcoexist,
 
 	halbtc8723d2ant_enable_gnt_to_gpio(btcoexist, TRUE);
 
-#if 0
-	/* check if WL firmware download ok */
-	if (btcoexist->btc_read_1byte(btcoexist, 0x80) == 0xc6)
-		halbtc8723d2ant_post_state_to_bt(btcoexist,
-					 BT_8723D_2ANT_SCOREBOARD_ONOFF, TRUE);
-#endif
-
 	/* Enable counter statistics */
 	btcoexist->btc_write_1byte(btcoexist, 0x76e,
 			   0x4); /* 0x76e[3] =1, WLAN_Act control by PTA */
@@ -4459,9 +4433,6 @@ void halbtc8723d2ant_init_hw_config(IN struct btc_coexist *btcoexist,
 
 		btcoexist->stop_coex_dm = TRUE;
 	} else {
-		/*Set BT polluted packet on for Tx rate adaptive not including Tx retry break by PTA, 0x45c[19] =1 */
-		btcoexist->btc_write_1byte_bitmask(btcoexist, 0x45e, 0x8, 0x1);
-
 		coex_sta->concurrent_rx_mode_on = TRUE;
 		/* btcoexist->btc_write_1byte_bitmask(btcoexist, 0x953, 0x2, 0x1); */
 
@@ -4482,1274 +4453,9 @@ void halbtc8723d2ant_init_hw_config(IN struct btc_coexist *btcoexist,
 	halbtc8723d2ant_ps_tdma(btcoexist, FORCE_EXEC, FALSE, 0);
 }
 
-u32 halbtc8723d2ant_psd_log2base(IN struct btc_coexist *btcoexist, IN u32 val)
-{
-	u8	j;
-	u32	tmp, tmp2, val_integerd_b = 0, tindex, shiftcount = 0;
-	u32	result, val_fractiond_b = 0, table_fraction[21] = {0, 432, 332, 274, 232, 200,
-				   174, 151, 132, 115, 100, 86, 74, 62, 51, 42,
-							   32, 23, 15, 7, 0
-							      };
-
-	if (val == 0)
-		return 0;
-
-	tmp = val;
-
-	while (1) {
-		if (tmp == 1)
-			break;
-		else {
-			tmp = (tmp >> 1);
-			shiftcount++;
-		}
-	}
-
-
-	val_integerd_b = shiftcount + 1;
-
-	tmp2 = 1;
-	for (j = 1; j <= val_integerd_b; j++)
-		tmp2 = tmp2 * 2;
-
-	tmp = (val * 100) / tmp2;
-	tindex = tmp / 5;
-
-	if (tindex > 20)
-		tindex = 20;
-
-	val_fractiond_b = table_fraction[tindex];
-
-	result = val_integerd_b * 100 - val_fractiond_b;
-
-	return result;
-
-
-}
-
-void halbtc8723d2ant_psd_show_antenna_detect_result(IN struct btc_coexist
-		*btcoexist)
-{
-	u8		*cli_buf = btcoexist->cli_buf;
-	struct  btc_board_info	*board_info = &btcoexist->board_info;
-
-	CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
-		   "\r\n============[Antenna Detection info]  ============\n");
-	CL_PRINTF(cli_buf);
-
-	if (psd_scan->ant_det_result == 12) { /* Get Ant Det from BT  */
-
-		if (board_info->btdm_ant_num_by_ant_det == 1)
-			CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
-				   "\r\n %-35s = %s (%d~%d)",
-				   "Ant Det Result", "1-Antenna",
-				   BT_8723D_2ANT_ANTDET_PSDTHRES_1ANT,
-				BT_8723D_2ANT_ANTDET_PSDTHRES_2ANT_GOODISOLATION);
-		else {
-
-			if (psd_scan->ant_det_psd_scan_peak_val >
-			    (BT_8723D_2ANT_ANTDET_PSDTHRES_2ANT_BADISOLATION)
-			    * 100)
-				CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
-					   "\r\n %-35s = %s (>%d)",
-					"Ant Det Result", "2-Antenna (Bad-Isolation)",
-					BT_8723D_2ANT_ANTDET_PSDTHRES_2ANT_BADISOLATION);
-			else
-				CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
-					   "\r\n %-35s = %s (%d~%d)",
-					"Ant Det Result", "2-Antenna (Good-Isolation)",
-					BT_8723D_2ANT_ANTDET_PSDTHRES_2ANT_GOODISOLATION
-					   + psd_scan->ant_det_thres_offset,
-					BT_8723D_2ANT_ANTDET_PSDTHRES_2ANT_BADISOLATION);
-		}
-
-	} else if (psd_scan->ant_det_result == 1)
-		CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s (>%d)",
-			   "Ant Det Result", "2-Antenna (Bad-Isolation)",
-			   BT_8723D_2ANT_ANTDET_PSDTHRES_2ANT_BADISOLATION);
-	else if (psd_scan->ant_det_result == 2)
-		CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s (%d~%d)",
-			   "Ant Det Result", "2-Antenna (Good-Isolation)",
-			   BT_8723D_2ANT_ANTDET_PSDTHRES_2ANT_GOODISOLATION
-			   + psd_scan->ant_det_thres_offset,
-			   BT_8723D_2ANT_ANTDET_PSDTHRES_2ANT_BADISOLATION);
-	else
-		CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s (%d~%d)",
-			   "Ant Det Result", "1-Antenna",
-			   BT_8723D_2ANT_ANTDET_PSDTHRES_1ANT,
-			   BT_8723D_2ANT_ANTDET_PSDTHRES_2ANT_GOODISOLATION
-			   + psd_scan->ant_det_thres_offset);
-
-	CL_PRINTF(cli_buf);
-
-	CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s ",
-		   "Antenna Detection Finish",
-		   (board_info->btdm_ant_det_finish
-		    ? "Yes" : "No"));
-	CL_PRINTF(cli_buf);
-
-	switch (psd_scan->ant_det_result) {
-	case 0:
-		CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
-			   "(BT is not available)");
-		break;
-	case 1:  /* 2-Ant bad-isolation */
-		CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
-			   "(BT is available)");
-		break;
-	case 2:  /* 2-Ant good-isolation */
-		CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
-			   "(BT is available)");
-		break;
-	case 3:  /* 1-Ant */
-		CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
-			   "(BT is available)");
-		break;
-	case 4:
-		CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
-			   "(Uncertainty result)");
-		break;
-	case 5:
-		CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "(Pre-Scan fai)");
-		break;
-	case 6:
-		CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
-			   "(WiFi is Scanning)");
-		break;
-	case 7:
-		CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
-			   "(BT is not idle)");
-		break;
-	case 8:
-		CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
-			   "(Abort by WiFi Scanning)");
-		break;
-	case 9:
-		CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
-			   "(Antenna Init is not ready)");
-		break;
-	case 10:
-		CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
-			   "(BT is Inquiry or page)");
-		break;
-	case 11:
-		CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
-			   "(BT is Disabled)");
-	case 12:
-		CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
-			   "(BT is available, result from BT");
-		break;
-	}
-	CL_PRINTF(cli_buf);
-
-	if (psd_scan->ant_det_result == 12) {
-		CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d dB",
-			   "PSD Scan Peak Value",
-			   psd_scan->ant_det_psd_scan_peak_val / 100);
-		CL_PRINTF(cli_buf);
-		return;
-	}
-
-	CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d",
-		   "Ant Detect Total Count", psd_scan->ant_det_try_count);
-	CL_PRINTF(cli_buf);
-
-	CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d",
-		   "Ant Detect Fail Count", psd_scan->ant_det_fail_count);
-	CL_PRINTF(cli_buf);
-
-	if ((!board_info->btdm_ant_det_finish) &&
-	    (psd_scan->ant_det_result != 5))
-		return;
-
-	CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s", "BT Response",
-		   (psd_scan->ant_det_result ? "ok" : "fail"));
-	CL_PRINTF(cli_buf);
-
-	CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d ms", "BT Tx Time",
-		   psd_scan->ant_det_bt_tx_time);
-	CL_PRINTF(cli_buf);
-
-	CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d", "BT Tx Ch",
-		   psd_scan->ant_det_bt_le_channel);
-	CL_PRINTF(cli_buf);
-
-	CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d/ %d",
-		   "WiFi PSD Cent-Ch/Offset/Span",
-		   psd_scan->real_cent_freq, psd_scan->real_offset,
-		   psd_scan->real_span);
-	CL_PRINTF(cli_buf);
-
-	CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d dB",
-		   "PSD Pre-Scan Peak Value",
-		   psd_scan->ant_det_pre_psdscan_peak_val / 100);
-	CL_PRINTF(cli_buf);
-
-	CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s (<= %d)",
-		   "PSD Pre-Scan result",
-		   (psd_scan->ant_det_result != 5 ? "ok" : "fail"),
-		   BT_8723D_2ANT_ANTDET_PSDTHRES_BACKGROUND
-		   + psd_scan->ant_det_thres_offset);
-	CL_PRINTF(cli_buf);
-
-	if (psd_scan->ant_det_result == 5)
-		return;
-
-	CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s dB",
-		   "PSD Scan Peak Value", psd_scan->ant_det_peak_val);
-	CL_PRINTF(cli_buf);
-
-	CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s MHz",
-		   "PSD Scan Peak Freq", psd_scan->ant_det_peak_freq);
-	CL_PRINTF(cli_buf);
-
-
-	CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s", "TFBGA Package",
-		   (board_info->tfbga_package) ?  "Yes" : "No");
-	CL_PRINTF(cli_buf);
-
-	CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d",
-		   "PSD Threshold Offset", psd_scan->ant_det_thres_offset);
-	CL_PRINTF(cli_buf);
-
-}
-
-void halbtc8723d2ant_psd_showdata(IN struct btc_coexist *btcoexist)
-{
-	u8		*cli_buf = btcoexist->cli_buf;
-	u32		delta_freq_per_point;
-	u32		freq, freq1, freq2, n = 0, i = 0, j = 0, m = 0, psd_rep1, psd_rep2;
-
-	if (psd_scan->ant_det_result == 12)
-		return;
-
-	CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
-		   "\r\n\n============[PSD info]  (%d)============\n",
-		   psd_scan->psd_gen_count);
-	CL_PRINTF(cli_buf);
-
-	if (psd_scan->psd_gen_count == 0) {
-		CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n No data !!\n");
-		CL_PRINTF(cli_buf);
-		return;
-	}
-
-	if (psd_scan->psd_point == 0)
-		delta_freq_per_point = 0;
-	else
-		delta_freq_per_point = psd_scan->psd_band_width /
-				       psd_scan->psd_point;
-
-	/* if (psd_scan->is_psd_show_max_only) */
-	if (0) {
-		psd_rep1 = psd_scan->psd_max_value / 100;
-		psd_rep2 = psd_scan->psd_max_value - psd_rep1 * 100;
-
-		freq = ((psd_scan->real_cent_freq - 20) * 1000000 +
-			psd_scan->psd_max_value_point * delta_freq_per_point);
-		freq1 = freq / 1000000;
-		freq2 = freq / 1000 - freq1 * 1000;
-
-		if (freq2 < 100)
-			CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
-				   "\r\n Freq = %d.0%d MHz",
-				   freq1, freq2);
-		else
-			CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
-				   "\r\n Freq = %d.%d MHz",
-				   freq1, freq2);
-
-		if (psd_rep2 < 10)
-			CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
-				   ", Value = %d.0%d dB, (%d)\n",
-				   psd_rep1, psd_rep2, psd_scan->psd_max_value);
-		else
-			CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
-				   ", Value = %d.%d dB, (%d)\n",
-				   psd_rep1, psd_rep2, psd_scan->psd_max_value);
-
-		CL_PRINTF(cli_buf);
-	} else {
-		m = psd_scan->psd_start_point;
-		n = psd_scan->psd_start_point;
-		i = 1;
-		j = 1;
-
-		while (1) {
-			do {
-				freq = ((psd_scan->real_cent_freq - 20) *
-					1000000 + m *
-					delta_freq_per_point);
-				freq1 = freq / 1000000;
-				freq2 = freq / 1000 - freq1 * 1000;
-
-				if (i == 1) {
-					if (freq2 == 0)
-						CL_SPRINTF(cli_buf,
-							   BT_TMP_BUF_SIZE,
-							   "\r\n Freq%6d.000",
-							   freq1);
-					else if (freq2 < 100)
-						CL_SPRINTF(cli_buf,
-							   BT_TMP_BUF_SIZE,
-							   "\r\n Freq%6d.0%2d",
-							   freq1,
-							   freq2);
-					else
-						CL_SPRINTF(cli_buf,
-							   BT_TMP_BUF_SIZE,
-							   "\r\n Freq%6d.%3d",
-							   freq1,
-							   freq2);
-				} else if ((i % 8 == 0) ||
-					   (m == psd_scan->psd_stop_point)) {
-					if (freq2 == 0)
-						CL_SPRINTF(cli_buf,
-							   BT_TMP_BUF_SIZE,
-							   "%6d.000\n", freq1);
-					else if (freq2 < 100)
-						CL_SPRINTF(cli_buf,
-							   BT_TMP_BUF_SIZE,
-							   "%6d.0%2d\n", freq1,
-							   freq2);
-					else
-						CL_SPRINTF(cli_buf,
-							   BT_TMP_BUF_SIZE,
-							   "%6d.%3d\n", freq1,
-							   freq2);
-				} else {
-					if (freq2 == 0)
-						CL_SPRINTF(cli_buf,
-							   BT_TMP_BUF_SIZE,
-							   "%6d.000", freq1);
-					else if (freq2 < 100)
-						CL_SPRINTF(cli_buf,
-							   BT_TMP_BUF_SIZE,
-							   "%6d.0%2d", freq1,
-							   freq2);
-					else
-						CL_SPRINTF(cli_buf,
-							   BT_TMP_BUF_SIZE,
-							   "%6d.%3d", freq1,
-							   freq2);
-				}
-
-				i++;
-				m++;
-				CL_PRINTF(cli_buf);
-
-			} while ((i <= 8) && (m <= psd_scan->psd_stop_point));
-
-
-			do {
-				psd_rep1 = psd_scan->psd_report_max_hold[n] /
-					   100;
-				psd_rep2 = psd_scan->psd_report_max_hold[n] -
-					   psd_rep1 *
-					   100;
-
-				if (j == 1) {
-					if (psd_rep2 < 10)
-						CL_SPRINTF(cli_buf,
-							   BT_TMP_BUF_SIZE,
-							   "\r\n Val %7d.0%d",
-							   psd_rep1,
-							   psd_rep2);
-					else
-						CL_SPRINTF(cli_buf,
-							   BT_TMP_BUF_SIZE,
-							   "\r\n Val %7d.%d",
-							   psd_rep1,
-							   psd_rep2);
-				} else if ((j % 8 == 0)  ||
-					   (n == psd_scan->psd_stop_point)) {
-					if (psd_rep2 < 10)
-						CL_SPRINTF(cli_buf,
-							   BT_TMP_BUF_SIZE,
-							"%7d.0%d\n", psd_rep1,
-							   psd_rep2);
-					else
-						CL_SPRINTF(cli_buf,
-							   BT_TMP_BUF_SIZE,
-							   "%7d.%d\n", psd_rep1,
-							   psd_rep2);
-				} else {
-					if (psd_rep2 < 10)
-						CL_SPRINTF(cli_buf,
-							   BT_TMP_BUF_SIZE,
-							   "%7d.0%d", psd_rep1,
-							   psd_rep2);
-					else
-						CL_SPRINTF(cli_buf,
-							   BT_TMP_BUF_SIZE,
-							   "%7d.%d", psd_rep1,
-							   psd_rep2);
-				}
-
-				j++;
-				n++;
-				CL_PRINTF(cli_buf);
-
-			} while ((j <= 8) && (n <= psd_scan->psd_stop_point));
-
-			if ((m > psd_scan->psd_stop_point) ||
-			    (n > psd_scan->psd_stop_point))
-				break;
-			else {
-				i = 1;
-				j = 1;
-			}
-
-		}
-	}
-
-
-}
-
-#ifdef PLATFORM_WINDOWS
-#pragma optimize("", off)
-#endif
-void halbtc8723d2ant_psd_maxholddata(IN struct btc_coexist *btcoexist,
-				     IN u32 gen_count)
-{
-	u32 i = 0;
-	u32 loop_i_max = 0, loop_val_max = 0;
-
-	if (gen_count == 1) {
-		memcpy(psd_scan->psd_report_max_hold,
-		       psd_scan->psd_report,
-		       BT_8723D_2ANT_ANTDET_PSD_POINTS * sizeof(u32));
-	}
-
-	for (i = psd_scan->psd_start_point;
-	     i <= psd_scan->psd_stop_point; i++) {
-
-		/* update max-hold value at each freq point */
-		if (psd_scan->psd_report[i] > psd_scan->psd_report_max_hold[i])
-			psd_scan->psd_report_max_hold[i] =
-				psd_scan->psd_report[i];
-
-		/*	search the max value in this seep */
-		if (psd_scan->psd_report[i] > loop_val_max) {
-			loop_val_max = psd_scan->psd_report[i];
-			loop_i_max = i;
-		}
-	}
-
-	if (gen_count <= BT_8723D_2ANT_ANTDET_PSD_SWWEEPCOUNT)
-		psd_scan->psd_loop_max_value[gen_count - 1] = loop_val_max;
-
-}
-
-
-#ifdef PLATFORM_WINDOWS
-#pragma optimize("", off)
-#endif
-u32 halbtc8723d2ant_psd_getdata(IN struct btc_coexist *btcoexist, IN u32 point)
-{
-	/* reg 0x808[9:0]: FFT data x */
-	/* reg 0x808[22]: 0-->1 to get 1 FFT data y */
-	/* reg 0x8b4[15:0]: FFT data y report */
-
-	u32 val = 0, psd_report = 0;
-	int k = 0;
-
-	val = btcoexist->btc_read_4byte(btcoexist, 0x808);
-
-	val &= 0xffbffc00;
-	val |= point;
-
-	btcoexist->btc_write_4byte(btcoexist, 0x808, val);
-
-	val |= 0x00400000;
-	btcoexist->btc_write_4byte(btcoexist, 0x808, val);
-
-	while (1) {
-		if (k++ > BT_8723D_2ANT_ANTDET_SWEEPPOINT_DELAY)
-			break;
-	}
-
-	val = btcoexist->btc_read_4byte(btcoexist, 0x8b4);
-
-	psd_report = val & 0x0000ffff;
-
-	return psd_report;
-}
-
-#ifdef PLATFORM_WINDOWS
-#pragma optimize("", off)
-#endif
-boolean halbtc8723d2ant_psd_sweep_point(IN struct btc_coexist *btcoexist,
-		IN u32 cent_freq, IN s32 offset, IN u32 span, IN u32 points,
-					IN u32 avgnum, IN u32 loopcnt)
-{
-	u32	 i = 0, val = 0, n = 0, k = 0, j, point_index = 0;
-	u32	points1 = 0, psd_report = 0;
-	u32	start_p = 0, stop_p = 0, delta_freq_per_point = 156250;
-	u32    psd_center_freq = 20 * 10 ^ 6;
-	boolean outloop = FALSE, scan, roam, is_sweep_ok = TRUE;
-	u8	 flag = 0;
-	u32	tmp = 0, u32tmp1 = 0;
-	u32	wifi_original_channel = 1;
-	u32 psd_sum = 0, avg_cnt = 0;
-	u32	i_max = 0, val_max = 0, val_max2 = 0;
-
-	BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-		    "xxxxxxxxxxxxxxxx PSD Sweep Start!!\n");
-	BTC_TRACE(trace_buf);
-
-	do {
-		switch (flag) {
-		case 0:  /* Get PSD parameters */
-		default:
-
-			psd_scan->psd_band_width = 40 * 1000000;
-			psd_scan->psd_point = points;
-			psd_scan->psd_start_base = points / 2;
-			psd_scan->psd_avg_num = avgnum;
-			psd_scan->real_cent_freq = cent_freq;
-			psd_scan->real_offset = offset;
-			psd_scan->real_span = span;
-
-
-			points1 = psd_scan->psd_point;
-			delta_freq_per_point = psd_scan->psd_band_width /
-					       psd_scan->psd_point;
-
-			/* PSD point setup */
-			val = btcoexist->btc_read_4byte(btcoexist, 0x808);
-			val &= 0xffff0fff;
-
-			switch (psd_scan->psd_point) {
-			case 128:
-				val |= 0x0;
-				break;
-			case 256:
-			default:
-				val |= 0x00004000;
-				break;
-			case 512:
-				val |= 0x00008000;
-				break;
-			case 1024:
-				val |= 0x0000c000;
-				break;
-			}
-
-			switch (psd_scan->psd_avg_num) {
-			case 1:
-				val |= 0x0;
-				break;
-			case 8:
-				val |= 0x00001000;
-				break;
-			case 16:
-				val |= 0x00002000;
-				break;
-			case 32:
-			default:
-				val |= 0x00003000;
-				break;
-			}
-			btcoexist->btc_write_4byte(btcoexist, 0x808, val);
-
-			flag = 1;
-			break;
-		case 1:	  /* calculate the PSD point index from freq/offset/span */
-			psd_center_freq = psd_scan->psd_band_width / 2 +
-					  offset * (1000000);
-
-			start_p = psd_scan->psd_start_base + (psd_center_freq -
-				span * (1000000) / 2) / delta_freq_per_point;
-			psd_scan->psd_start_point = start_p -
-						    psd_scan->psd_start_base;
-
-			stop_p = psd_scan->psd_start_base + (psd_center_freq +
-				span * (1000000) / 2) / delta_freq_per_point;
-			psd_scan->psd_stop_point = stop_p -
-						   psd_scan->psd_start_base - 1;
-
-			flag = 2;
-			break;
-		case 2:  /* set RF channel/BW/Mode */
-
-			/* set 3-wire off */
-			val = btcoexist->btc_read_4byte(btcoexist, 0x88c);
-			val |= 0x00300000;
-			btcoexist->btc_write_4byte(btcoexist, 0x88c, val);
-
-			/* CCK off */
-			val = btcoexist->btc_read_4byte(btcoexist, 0x800);
-			val &= 0xfeffffff;
-			btcoexist->btc_write_4byte(btcoexist, 0x800, val);
-
-			/* Tx-pause on */
-			btcoexist->btc_write_1byte(btcoexist, 0x522, 0x6f);
-
-			/* store WiFi original channel */
-			wifi_original_channel = btcoexist->btc_get_rf_reg(
-					btcoexist, BTC_RF_A, 0x18, 0x3ff);
-
-			/* Set RF channel */
-			if (cent_freq == 2484)
-				btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A,
-							  0x18, 0x3ff, 0xe);
-			else
-				btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A,
-					  0x18, 0x3ff, (cent_freq - 2412) / 5 +
-						  1); /* WiFi TRx Mask on */
-
-			/* save original RCK value */
-			u32tmp1 =  btcoexist->btc_get_rf_reg(
-					   btcoexist, BTC_RF_A, 0x1d, 0xfffff);
-
-			/* Enter debug mode */
-			btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0xde,
-						  0x2, 0x1);
-
-			/* Set RF Rx filter corner */
-			btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0x1d,
-						  0xfffff, 0x2e);
-
-
-			/* Set  RF mode = Rx, RF Gain = 0x320a0 */
-			btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0x0,
-						  0xfffff, 0x320a0);
-
-			while (1) {
-				if (k++ > BT_8723D_2ANT_ANTDET_SWEEPPOINT_DELAY)
-					break;
-			}
-			flag = 3;
-			break;
-		case 3:
-			psd_scan->psd_gen_count = 0;
-			for (j = 1; j <= loopcnt; j++) {
-
-				btcoexist->btc_get(btcoexist,
-						   BTC_GET_BL_WIFI_SCAN, &scan);
-				btcoexist->btc_get(btcoexist,
-						   BTC_GET_BL_WIFI_ROAM, &roam);
-
-				if (scan || roam) {
-					is_sweep_ok = FALSE;
-					break;
-				}
-				memset(psd_scan->psd_report, 0,
-				       psd_scan->psd_point * sizeof(u32));
-				start_p = psd_scan->psd_start_point +
-					  psd_scan->psd_start_base;
-				stop_p = psd_scan->psd_stop_point +
-					 psd_scan->psd_start_base + 1;
-
-				i = start_p;
-				point_index = 0;
-
-				while (i < stop_p) {
-					if (i >= points1)
-						psd_report =
-							halbtc8723d2ant_psd_getdata(
-							btcoexist, i - points1);
-					else
-						psd_report =
-							halbtc8723d2ant_psd_getdata(
-								btcoexist, i);
-
-					if (psd_report == 0)
-						tmp = 0;
-					else
-						/* tmp =  20*log10((double)psd_report); */
-						/* 20*log2(x)/log2(10), log2Base return theresult of the psd_report*100 */
-						tmp = 6 * halbtc8723d2ant_psd_log2base(
-							btcoexist, psd_report);
-
-					n = i - psd_scan->psd_start_base;
-					psd_scan->psd_report[n] =  tmp;
-
-					BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-						"Point=%d, psd_dB_data = %d\n",
-						    i, psd_scan->psd_report[n]);
-					BTC_TRACE(trace_buf);
-
-					i++;
-
-				}
-
-				halbtc8723d2ant_psd_maxholddata(btcoexist, j);
-
-				psd_scan->psd_gen_count = j;
-
-				/*Accumulate Max PSD value in this loop if the value > threshold */
-				if (psd_scan->psd_loop_max_value[j - 1] >=
-				    4000) {
-					psd_sum = psd_sum +
-						psd_scan->psd_loop_max_value[j -
-								       1];
-					avg_cnt++;
-				}
-
-				BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-					    "Loop=%d, Max_dB_data = %d\n",
-					    j, psd_scan->psd_loop_max_value[j
-							    - 1]);
-				BTC_TRACE(trace_buf);
-
-			}
-
-			if (loopcnt == BT_8723D_2ANT_ANTDET_PSD_SWWEEPCOUNT) {
-
-				/* search the Max Value between each-freq-point-max-hold value of all sweep*/
-				for (i = 1;
-				     i <= BT_8723D_2ANT_ANTDET_PSD_SWWEEPCOUNT;
-				     i++) {
-
-					if (i == 1) {
-						i_max = i;
-						val_max = psd_scan->psd_loop_max_value[i
-								       - 1];
-						val_max2 =
-							psd_scan->psd_loop_max_value[i
-								     - 1];
-					} else if (
-						psd_scan->psd_loop_max_value[i -
-							     1] > val_max) {
-						val_max2 = val_max;
-						i_max = i;
-						val_max = psd_scan->psd_loop_max_value[i
-								       - 1];
-					} else if (
-						psd_scan->psd_loop_max_value[i -
-							     1] > val_max2)
-						val_max2 =
-							psd_scan->psd_loop_max_value[i
-								     - 1];
-
-					BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-						"i = %d, val_hold= %d, val_max = %d, val_max2 = %d\n",
-						i, psd_scan->psd_loop_max_value[i
-								    - 1],
-						    val_max, val_max2);
-
-					BTC_TRACE(trace_buf);
-				}
-
-				psd_scan->psd_max_value_point = i_max;
-				psd_scan->psd_max_value = val_max;
-				psd_scan->psd_max_value2 = val_max2;
-
-				BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-					    "val_max = %d, val_max2 = %d\n",
-					    psd_scan->psd_max_value,
-					    psd_scan->psd_max_value2);
-				BTC_TRACE(trace_buf);
-			}
-
-			if (avg_cnt != 0) {
-				psd_scan->psd_avg_value = (psd_sum / avg_cnt);
-				if ((psd_sum % avg_cnt) >= (avg_cnt / 2))
-					psd_scan->psd_avg_value++;
-			} else
-				psd_scan->psd_avg_value = 0;
-
-			BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-				    "AvgLoop=%d, Avg_dB_data = %d\n",
-				    avg_cnt, psd_scan->psd_avg_value);
-			BTC_TRACE(trace_buf);
-
-			flag = 100;
-			break;
-		case 99:	/* error */
-
-			outloop = TRUE;
-			break;
-		case 100: /* recovery */
-
-			/* set 3-wire on */
-			val = btcoexist->btc_read_4byte(btcoexist, 0x88c);
-			val &= 0xffcfffff;
-			btcoexist->btc_write_4byte(btcoexist, 0x88c, val);
-
-			/* CCK on */
-			val = btcoexist->btc_read_4byte(btcoexist, 0x800);
-			val |= 0x01000000;
-			btcoexist->btc_write_4byte(btcoexist, 0x800, val);
-
-			/* Tx-pause off */
-			btcoexist->btc_write_1byte(btcoexist, 0x522, 0x0);
-
-			/* PSD off */
-			val = btcoexist->btc_read_4byte(btcoexist, 0x808);
-			val &= 0xffbfffff;
-			btcoexist->btc_write_4byte(btcoexist, 0x808, val);
-
-			/* restore RF Rx filter corner */
-			btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0x1d,
-						  0xfffff, u32tmp1);
-
-			/* Exit debug mode */
-			btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0xde,
-						  0x2, 0x0);
-
-			/* restore WiFi original channel */
-			btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0x18,
-						  0x3ff, wifi_original_channel);
-
-			outloop = TRUE;
-			break;
-
-		}
-
-	} while (!outloop);
-
-	BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-		    "xxxxxxxxxxxxxxxx PSD Sweep Stop!!\n");
-	BTC_TRACE(trace_buf);
-	return is_sweep_ok;
-
-}
-
 #ifdef PLATFORM_WINDOWS
 #pragma optimize("", off)
 #endif
-boolean halbtc8723d2ant_psd_antenna_detection(IN struct btc_coexist
-		*btcoexist)
-{
-	u32	i = 0;
-	u32	wlpsd_cent_freq = 2484, wlpsd_span = 2;
-	s32	wlpsd_offset = -4;
-	u32 bt_tx_time, bt_le_channel;
-	u8	bt_le_ch[13] = {3, 6, 8, 11, 13, 16, 18, 21, 23, 26, 28, 31, 33};
-
-	u8	h2c_parameter[3] = {0}, u8tmpa, u8tmpb;
-
-	u8	state = 0;
-	boolean		outloop = FALSE, bt_resp = FALSE, ant_det_finish = FALSE;
-	u32		freq, freq1, freq2, psd_rep1, psd_rep2, delta_freq_per_point,
-			u32tmp, u32tmp0, u32tmp1, u32tmp2 ;
-	struct  btc_board_info	*board_info = &btcoexist->board_info;
-
-	memset(psd_scan->ant_det_peak_val, 0, 16 * sizeof(u8));
-	memset(psd_scan->ant_det_peak_freq, 0, 16 * sizeof(u8));
-
-	psd_scan->ant_det_bt_tx_time =
-		BT_8723D_2ANT_ANTDET_BTTXTIME;	   /* 0.42ms*50 = 20ms (0.42ms = 1 PSD sweep) */
-	psd_scan->ant_det_bt_le_channel = BT_8723D_2ANT_ANTDET_BTTXCHANNEL;
-
-	bt_tx_time = psd_scan->ant_det_bt_tx_time;
-	bt_le_channel = psd_scan->ant_det_bt_le_channel;
-
-	if (board_info->tfbga_package) /* for TFBGA */
-		psd_scan->ant_det_thres_offset = 5;
-	else
-		psd_scan->ant_det_thres_offset = 0;
-
-	do {
-		switch (state) {
-		case 0:
-			if (bt_le_channel == 39)
-				wlpsd_cent_freq = 2484;
-			else {
-				for (i = 1; i <= 13; i++) {
-					if (bt_le_ch[i - 1] ==
-					    bt_le_channel) {
-						wlpsd_cent_freq = 2412
-								  + (i - 1) * 5;
-						break;
-					}
-				}
-
-				if (i == 14) {
-
-					BTC_SPRINTF(trace_buf,
-						    BT_TMP_BUF_SIZE,
-						"xxxxxxxxxxxxxxxx AntennaDetect(), Abort!!, Invalid LE channel = %d\n ",
-						    bt_le_channel);
-					BTC_TRACE(trace_buf);
-					outloop = TRUE;
-					break;
-				}
-			}
-#if 0
-			wlpsd_sweep_count = bt_tx_time * 238 /
-					    100; /* bt_tx_time/0.42								 */
-			wlpsd_sweep_count = wlpsd_sweep_count / 5;
-
-			if (wlpsd_sweep_count % 5 != 0)
-				wlpsd_sweep_count = (wlpsd_sweep_count /
-						     5 + 1) * 5;
-#endif
-			BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-				"xxxxxxxxxxxxxxxx AntennaDetect(), BT_LETxTime=%d,  BT_LECh = %d\n",
-				    bt_tx_time, bt_le_channel);
-			BTC_TRACE(trace_buf);
-			BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-				"xxxxxxxxxxxxxxxx AntennaDetect(), wlpsd_cent_freq=%d,  wlpsd_offset = %d, wlpsd_span = %d, wlpsd_sweep_count = %d\n",
-				    wlpsd_cent_freq,
-				    wlpsd_offset,
-				    wlpsd_span,
-				    BT_8723D_2ANT_ANTDET_PSD_SWWEEPCOUNT);
-			BTC_TRACE(trace_buf);
-
-			state = 1;
-			break;
-		case 1: /* stop coex DM & set antenna path */
-			/* Stop Coex DM */
-			btcoexist->stop_coex_dm = TRUE;
-
-			BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-				"xxxxxxxxxxxxxxxx AntennaDetect(), Stop Coex DM!!\n");
-			BTC_TRACE(trace_buf);
-
-			/* Set TDMA off,				 */
-			/* Set coex table */
-			halbtc8723d2ant_coex_table_with_type(btcoexist,
-							     FORCE_EXEC, 0);
-
-			halbtc8723d2ant_ps_tdma(btcoexist, FORCE_EXEC,
-						FALSE, 0);
-
-			if (board_info->btdm_ant_pos ==
-			    BTC_ANTENNA_AT_MAIN_PORT) {
-				BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-					"xxxxxxxxxxxxxxxx AntennaDetect(), Antenna at Main Port\n");
-				BTC_TRACE(trace_buf);
-			} else {
-				BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-					"xxxxxxxxxxxxxxxx AntennaDetect(), Antenna at Aux Port\n");
-				BTC_TRACE(trace_buf);
-			}
-
-			/* Set Antenna path, switch WiFi to un-certain antenna port */
-			/* Set Antenna Path,  both GNT_WL/GNT_BT = 1, and control by SW */
-			halbtc8723d2ant_set_ant_path(btcoexist, BTC_ANT_PATH_BT,
-						     FORCE_EXEC,
-					     BT_8723D_2ANT_PHASE_ANTENNA_DET);
-
-			BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-				"xxxxxxxxxxxxxxxx AntennaDetect(), Set Antenna to BT!!\n");
-			BTC_TRACE(trace_buf);
-
-			/* Set AFH mask on at WiFi channel 2472MHz +/- 10MHz */
-			h2c_parameter[0] = 0x1;
-			h2c_parameter[1] = 0xd;
-			h2c_parameter[2] = 0x14;
-
-			BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-				"xxxxxxxxxxxxxxxx AntennaDetect(), Set AFH on, Cent-Ch= %d,  Mask=%d\n",
-				    h2c_parameter[1],
-				    h2c_parameter[2]);
-			BTC_TRACE(trace_buf);
-
-			btcoexist->btc_fill_h2c(btcoexist, 0x66, 3,
-						h2c_parameter);
-
-			u32tmp = btcoexist->btc_read_2byte(btcoexist, 0x948);
-			u32tmp0 = btcoexist->btc_read_4byte(btcoexist, 0x70);
-			u32tmp1 = halbtc8723d2ant_ltecoex_indirect_read_reg(
-					  btcoexist, 0x38);
-			u32tmp2 = halbtc8723d2ant_ltecoex_indirect_read_reg(
-					  btcoexist, 0x54);
-
-			BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-				"[BTCoex], ********** 0x948 = 0x%x, 0x70 = 0x%x, 0x38= 0x%x, 0x54= 0x%x (Before Ant Det)\n",
-				    u32tmp, u32tmp0, u32tmp1, u32tmp2);
-			BTC_TRACE(trace_buf);
-
-			state = 2;
-			break;
-		case 2:	/* Pre-sweep background psd */
-			if (!halbtc8723d2ant_psd_sweep_point(btcoexist,
-				     wlpsd_cent_freq, wlpsd_offset, wlpsd_span,
-					     BT_8723D_2ANT_ANTDET_PSD_POINTS,
-				     BT_8723D_2ANT_ANTDET_PSD_AVGNUM, 3)) {
-				ant_det_finish = FALSE;
-				board_info->btdm_ant_num_by_ant_det = 1;
-				psd_scan->ant_det_result = 8;
-				state = 99;
-				break;
-			}
-
-			psd_scan->ant_det_pre_psdscan_peak_val =
-				psd_scan->psd_max_value;
-
-			if (psd_scan->ant_det_pre_psdscan_peak_val >
-			    (BT_8723D_2ANT_ANTDET_PSDTHRES_BACKGROUND
-			     + psd_scan->ant_det_thres_offset) * 100) {
-				BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-					"xxxxxxxxxxxxxxxx AntennaDetect(), Abort Antenna Detection!! becaus background = %d > thres (%d)\n",
-					psd_scan->ant_det_pre_psdscan_peak_val /
-					    100,
-					BT_8723D_2ANT_ANTDET_PSDTHRES_BACKGROUND
-					    + psd_scan->ant_det_thres_offset);
-				BTC_TRACE(trace_buf);
-				ant_det_finish = FALSE;
-				board_info->btdm_ant_num_by_ant_det = 1;
-				psd_scan->ant_det_result = 5;
-				state = 99;
-			} else {
-				BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-					"xxxxxxxxxxxxxxxx AntennaDetect(), Start Antenna Detection!! becaus background = %d <= thres (%d)\n",
-					psd_scan->ant_det_pre_psdscan_peak_val /
-					    100,
-					BT_8723D_2ANT_ANTDET_PSDTHRES_BACKGROUND
-					    + psd_scan->ant_det_thres_offset);
-				BTC_TRACE(trace_buf);
-				state = 3;
-			}
-			break;
-		case 3:
-			bt_resp = btcoexist->btc_set_bt_ant_detection(
-					  btcoexist, (u8)(bt_tx_time & 0xff),
-					  (u8)(bt_le_channel & 0xff));
-
-			/* Sync WL Rx PSD with BT Tx time because H2C->Mailbox delay */
-			delay_ms(20);
-
-			if (!halbtc8723d2ant_psd_sweep_point(btcoexist,
-					     wlpsd_cent_freq, wlpsd_offset,
-							     wlpsd_span,
-					     BT_8723D_2ANT_ANTDET_PSD_POINTS,
-					     BT_8723D_2ANT_ANTDET_PSD_AVGNUM,
-				     BT_8723D_2ANT_ANTDET_PSD_SWWEEPCOUNT)) {
-				ant_det_finish = FALSE;
-				board_info->btdm_ant_num_by_ant_det = 1;
-				psd_scan->ant_det_result = 8;
-				state = 99;
-				break;
-			}
-
-#if 1
-			psd_scan->ant_det_psd_scan_peak_val =
-				psd_scan->psd_max_value;
-#endif
-#if 0
-			psd_scan->ant_det_psd_scan_peak_val =
-				((psd_scan->psd_max_value - psd_scan->psd_avg_value) <
-				 800) ?
-				psd_scan->psd_max_value : ((
-						psd_scan->psd_max_value -
-					psd_scan->psd_max_value2 <= 300) ?
-						   psd_scan->psd_avg_value :
-						   psd_scan->psd_max_value2);
-#endif
-			psd_scan->ant_det_psd_scan_peak_freq =
-				psd_scan->psd_max_value_point;
-			state = 4;
-			break;
-		case 4:
-
-			if (psd_scan->psd_point == 0)
-				delta_freq_per_point = 0;
-			else
-				delta_freq_per_point =
-					psd_scan->psd_band_width /
-					psd_scan->psd_point;
-
-			psd_rep1 = psd_scan->ant_det_psd_scan_peak_val / 100;
-			psd_rep2 = psd_scan->ant_det_psd_scan_peak_val -
-				   psd_rep1 *
-				   100;
-
-			freq = ((psd_scan->real_cent_freq - 20) *
-				1000000 + psd_scan->psd_max_value_point
-				* delta_freq_per_point);
-			freq1 = freq / 1000000;
-			freq2 = freq / 1000 - freq1 * 1000;
-
-			if (freq2 < 100) {
-				BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-					"xxxxxxxxxxxxxxxx AntennaDetect(), Max Value: Freq = %d.0%d MHz",
-					    freq1, freq2);
-				BTC_TRACE(trace_buf);
-				CL_SPRINTF(psd_scan->ant_det_peak_freq,
-					   BT_8723D_2ANT_ANTDET_BUF_LEN,
-					   "%d.0%d", freq1, freq2);
-			} else {
-				BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-					"xxxxxxxxxxxxxxxx AntennaDetect(), Max Value: Freq = %d.%d MHz",
-					    freq1, freq2);
-				BTC_TRACE(trace_buf);
-				CL_SPRINTF(psd_scan->ant_det_peak_freq,
-					   BT_8723D_2ANT_ANTDET_BUF_LEN,
-					   "%d.%d", freq1, freq2);
-			}
-
-			if (psd_rep2 < 10) {
-				BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-					    ", Value = %d.0%d dB\n",
-					    psd_rep1, psd_rep2);
-				BTC_TRACE(trace_buf);
-				CL_SPRINTF(psd_scan->ant_det_peak_val,
-					   BT_8723D_2ANT_ANTDET_BUF_LEN,
-					   "%d.0%d", psd_rep1, psd_rep2);
-			} else {
-				BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-					    ", Value = %d.%d dB\n",
-					    psd_rep1, psd_rep2);
-				BTC_TRACE(trace_buf);
-				CL_SPRINTF(psd_scan->ant_det_peak_val,
-					   BT_8723D_2ANT_ANTDET_BUF_LEN,
-					   "%d.%d", psd_rep1, psd_rep2);
-			}
-
-			psd_scan->ant_det_is_btreply_available = TRUE;
-
-			if (bt_resp == FALSE) {
-				psd_scan->ant_det_is_btreply_available =
-					FALSE;
-				psd_scan->ant_det_result = 0;
-				ant_det_finish = FALSE;
-				board_info->btdm_ant_num_by_ant_det = 1;
-				BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-					"xxxxxxxxxxxxxxxx AntennaDetect(), BT Response = Fail\n ");
-				BTC_TRACE(trace_buf);
-			} else if (psd_scan->ant_det_psd_scan_peak_val >
-				(BT_8723D_2ANT_ANTDET_PSDTHRES_2ANT_BADISOLATION)
-				   * 100) {
-				psd_scan->ant_det_result = 1;
-				ant_det_finish = TRUE;
-				board_info->btdm_ant_num_by_ant_det = 2;
-				coex_sta->isolation_btween_wb = (u8)(85 -
-					psd_scan->ant_det_psd_scan_peak_val /
-							     100) & 0xff;
-				BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-					"xxxxxxxxxxxxxxxx AntennaDetect(), Detect Result = 2-Ant, Bad-Isolation!!\n");
-				BTC_TRACE(trace_buf);
-			} else if (psd_scan->ant_det_psd_scan_peak_val >
-				(BT_8723D_2ANT_ANTDET_PSDTHRES_2ANT_GOODISOLATION
-				    + psd_scan->ant_det_thres_offset) * 100) {
-				psd_scan->ant_det_result = 2;
-				ant_det_finish = TRUE;
-				board_info->btdm_ant_num_by_ant_det = 2;
-				coex_sta->isolation_btween_wb = (u8)(85 -
-					psd_scan->ant_det_psd_scan_peak_val /
-							     100) & 0xff;
-				BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-					"xxxxxxxxxxxxxxxx AntennaDetect(), Detect Result = 2-Ant, Good-Isolation!!\n");
-				BTC_TRACE(trace_buf);
-			} else if (psd_scan->ant_det_psd_scan_peak_val >
-				   (BT_8723D_2ANT_ANTDET_PSDTHRES_1ANT) *
-				   100) {
-				psd_scan->ant_det_result = 3;
-				ant_det_finish = TRUE;
-				board_info->btdm_ant_num_by_ant_det = 1;
-				coex_sta->isolation_btween_wb = (u8)(85 -
-					psd_scan->ant_det_psd_scan_peak_val /
-							     100) & 0xff;
-				BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-					"xxxxxxxxxxxxxxxx AntennaDetect(), Detect Result = 1-Ant!!\n");
-				BTC_TRACE(trace_buf);
-			} else {
-				psd_scan->ant_det_result = 4;
-				ant_det_finish = FALSE;
-				board_info->btdm_ant_num_by_ant_det = 1;
-				BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-					"xxxxxxxxxxxxxxxx AntennaDetect(), Detect Result = 1-Ant, un-certainity!!\n");
-				BTC_TRACE(trace_buf);
-			}
-
-			state = 99;
-			break;
-		case 99:  /* restore setup */
-
-			/* Set AFH mask off at WiFi channel 2472MHz +/- 10MHz */
-			h2c_parameter[0] = 0x0;
-			h2c_parameter[1] = 0x0;
-			h2c_parameter[2] = 0x0;
-
-			BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-				"xxxxxxxxxxxxxxxx AntennaDetect(), Set AFH on, Cent-Ch= %d,  Mask=%d\n",
-				    h2c_parameter[1], h2c_parameter[2]);
-			BTC_TRACE(trace_buf);
-
-			btcoexist->btc_fill_h2c(btcoexist, 0x66, 3,
-						h2c_parameter);
-
-			/* Set Antenna Path, GNT_WL/GNT_BT control by PTA */
-			/* Set Antenna path, switch WiFi to certain antenna port */
-			halbtc8723d2ant_set_ant_path(btcoexist,
-					     BTC_ANT_PATH_AUTO, FORCE_EXEC,
-					     BT_8723D_2ANT_PHASE_2G_RUNTIME);
-
-			BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-				"xxxxxxxxxxxxxxxx AntennaDetect(), Set Antenna to PTA\n!!");
-			BTC_TRACE(trace_buf);
-
-			btcoexist->stop_coex_dm = FALSE;
-
-			BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-				"xxxxxxxxxxxxxxxx AntennaDetect(), Resume Coex DM\n!!");
-			BTC_TRACE(trace_buf);
-
-			outloop = TRUE;
-			break;
-		}
-
-	} while (!outloop);
-
-	return ant_det_finish;
-
-}
-
-#ifdef PLATFORM_WINDOWS
-#pragma optimize("", off)
-#endif
-boolean halbtc8723d2ant_psd_antenna_detection_check(IN struct btc_coexist
-		*btcoexist)
-{
-	static u32 ant_det_count = 0, ant_det_fail_count = 0;
-	struct  btc_board_info	*board_info = &btcoexist->board_info;
-
-	boolean scan, roam, ant_det_finish = FALSE;
-
-	btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_SCAN, &scan);
-	btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_ROAM, &roam);
-
-	ant_det_count++;
-
-	psd_scan->ant_det_try_count = ant_det_count;
-
-	if (scan || roam) {
-		ant_det_finish = FALSE;
-		psd_scan->ant_det_result = 6;
-	} else if (coex_sta->bt_disabled) {
-		ant_det_finish = FALSE;
-		psd_scan->ant_det_result = 11;
-	} else if (coex_sta->num_of_profile >= 1) {
-		ant_det_finish = FALSE;
-		psd_scan->ant_det_result = 7;
-	} else if (
-		!psd_scan->ant_det_is_ant_det_available) { /* Antenna initial setup is not ready */
-		ant_det_finish = FALSE;
-		psd_scan->ant_det_result = 9;
-	} else if (coex_sta->c2h_bt_inquiry_page) {
-		ant_det_finish = FALSE;
-		psd_scan->ant_det_result = 10;
-	} else {
-
-		ant_det_finish = halbtc8723d2ant_psd_antenna_detection(
-					 btcoexist);
-
-		delay_ms(psd_scan->ant_det_bt_tx_time);
-	}
-
-
-	if (!ant_det_finish)
-		ant_det_fail_count++;
-
-	psd_scan->ant_det_fail_count = ant_det_fail_count;
-
-	BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-		"xxxxxxxxxxxxxxxx AntennaDetect(), result = %d, fail_count = %d, finish = %s\n",
-		    psd_scan->ant_det_result,
-		    psd_scan->ant_det_fail_count,
-		    ant_det_finish == TRUE ? "Yes" : "No");
-	BTC_TRACE(trace_buf);
-
-	return ant_det_finish;
-
-}
-
 
 /* ************************************************************
  * work around function start with wa_halbtc8723d2ant_
@@ -5834,6 +4540,8 @@ void ex_halbtc8723d2ant_power_on_setting(IN struct btc_coexist *btcoexist)
 	/* enable GNT_WL/GNT_BT debug signal to GPIO14/15 */
 	halbtc8723d2ant_enable_gnt_to_gpio(btcoexist, TRUE);
 
+#if BT_8723D_2ANT_COEX_DBG
+
 	BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
 		"[BTCoex], **********  LTE coex Reg 0x38 (Power-On) = 0x%x**********\n",
 		    halbtc8723d2ant_ltecoex_indirect_read_reg(btcoexist, 0x38));
@@ -5844,6 +4552,8 @@ void ex_halbtc8723d2ant_power_on_setting(IN struct btc_coexist *btcoexist)
 		    btcoexist->btc_read_4byte(btcoexist, 0x70),
 		    btcoexist->btc_read_2byte(btcoexist, 0x948));
 	BTC_TRACE(trace_buf);
+
+#endif
 }
 
 void ex_halbtc8723d2ant_pre_load_firmware(IN struct btc_coexist *btcoexist)
@@ -5907,7 +4617,7 @@ void ex_halbtc8723d2ant_display_coex_info(IN struct btc_coexist *btcoexist)
 	boolean			lte_coex_on = FALSE;
 
 	CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
-		   "\r\n ============[BT Coexist info]============");
+		   "\r\n ============[BT Coexist info 8723D]============");
 	CL_PRINTF(cli_buf);
 
 	if (btcoexist->manual_control) {
@@ -5956,10 +4666,13 @@ void ex_halbtc8723d2ant_display_coex_info(IN struct btc_coexist *btcoexist)
 	}
 
 	if (psd_scan->ant_det_try_count == 0) {
-		CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d/ %s",
+		CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %s/ %s",
 			   "Ant PG Num/ Mech/ Pos",
-			   board_info->pg_ant_num, board_info->btdm_ant_num,
-			   (board_info->btdm_ant_pos == 1 ? "S1" : "S0"));
+			   board_info->pg_ant_num,
+			   (board_info->btdm_ant_num == 1 ?
+			   "Shared" : "Non-Shared"),
+			   (board_info->btdm_ant_pos == 1 ?
+			   "S1" : "S0"));
 		CL_PRINTF(cli_buf);
 	} else {
 		CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
@@ -6022,7 +4735,7 @@ void ex_halbtc8723d2ant_display_coex_info(IN struct btc_coexist *btcoexist)
 		   "\r\n %-35s = 0x%x/ 0x%x/ v%d/ %c",
 		   "W_FW/ B_FW/ Phy/ Kt",
 		   fw_ver, bt_patch_ver, phyver,
-		   coex_sta->cut_version + 65);
+		   coex_sta->kt_ver + 65);
 	CL_PRINTF(cli_buf);
 
 	CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %02x %02x %02x ",
@@ -6091,21 +4804,13 @@ void ex_halbtc8723d2ant_display_coex_info(IN struct btc_coexist *btcoexist)
 
 
 	if (bt_link_info->a2dp_exist) {
-		CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s/ %d/ %s",
-			   "A2DP Rate/Bitpool/Auto_Slot",
-			   ((coex_sta->is_A2DP_3M) ? "3M" : "No_3M"),
+		CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
+			   "\r\n %-35s = %s/ %d/ 0x%x/ 0x%x",
+			   "CQDDR/Bitpool/V_ID/D_name",
+			   ((coex_sta->is_A2DP_3M) ? "On" : "Off"),
 			   coex_sta->a2dp_bit_pool,
-			   ((coex_sta->is_autoslot) ? "On" : "Off")
-			  );
-		CL_PRINTF(cli_buf);
-
-		CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x/ %d/ %d",
-			   "V_ID/D_name/FBSlot_Legacy/FBSlot_Le",
 			   coex_sta->bt_a2dp_vendor_id,
-			   coex_sta->bt_a2dp_device_name,
-			   coex_sta->legacy_forbidden_slot,
-			   coex_sta->le_forbidden_slot
-			  );
+			   coex_sta->bt_a2dp_device_name);
 		CL_PRINTF(cli_buf);
 	}
 
@@ -6120,7 +4825,7 @@ void ex_halbtc8723d2ant_display_coex_info(IN struct btc_coexist *btcoexist)
 	CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s/ %d/ %s/ 0x%x",
 				"Role/RoleSwCnt/IgnWlact/Feature",
 				((bt_link_info->slave_role) ? "Slave" : "Master"),
-				coex_sta->cnt_RoleSwitch,
+				coex_sta->cnt_roleswitch,
 				((coex_dm->cur_ignore_wlan_act) ? "Yes" : "No"),
 				coex_sta->bt_coex_supported_feature);
 	CL_PRINTF(cli_buf);
@@ -6141,12 +4846,11 @@ void ex_halbtc8723d2ant_display_coex_info(IN struct btc_coexist *btcoexist)
 
 	CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d/ %d/ %d/ %d",
 		   "ReInit/ReLink/IgnWlact/Page/NameReq",
-		   coex_sta->cnt_ReInit,
-		   coex_sta->cnt_setupLink,
-		   coex_sta->cnt_IgnWlanAct,
-		   coex_sta->cnt_Page,
-		   coex_sta->cnt_RemoteNameReq
-		  );
+		   coex_sta->cnt_reinit,
+		   coex_sta->cnt_setuplink,
+		   coex_sta->cnt_ignwlanact,
+		   coex_sta->cnt_page,
+		   coex_sta->cnt_remotenamereq);
 	CL_PRINTF(cli_buf);
 
 	halbtc8723d2ant_read_score_board(btcoexist,	&u16tmp[0]);
@@ -6159,7 +4863,7 @@ void ex_halbtc8723d2ant_display_coex_info(IN struct btc_coexist *btcoexist)
 		CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
 			   "\r\n %-35s = 0x%x/ 0x%x/ 0x%04x",
 			   "0xae[4]/0xac[1:0]/Scoreboard(B->W)",
-			   ((coex_sta->bt_reg_vendor_ae & BIT(4)) >> 4),
+			   (int)((coex_sta->bt_reg_vendor_ae & BIT(4)) >> 4),
 			   coex_sta->bt_reg_vendor_ac & 0x3, u16tmp[0]);
 	CL_PRINTF(cli_buf);
 
@@ -6256,6 +4960,12 @@ void ex_halbtc8723d2ant_display_coex_info(IN struct btc_coexist *btcoexist)
 		   coex_sta->wl_fw_dbg_info[5]);
 	CL_PRINTF(cli_buf);
 
+	CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d/ %s",
+		   "TDMA_Togg_cnt/WL5ms_cnt/WL5ms_off",
+		   coex_sta->wl_fw_dbg_info[6], coex_sta->wl_fw_dbg_info[7],
+		   ((coex_sta->is_no_wl_5ms_extend) ? "Yes" : "No"));
+	CL_PRINTF(cli_buf);
+
 	u32tmp[0] = halbtc8723d2ant_ltecoex_indirect_read_reg(btcoexist, 0x38);
 	lte_coex_on = ((u32tmp[0] & BIT(7)) >> 7) ?  TRUE : FALSE;
 
@@ -6293,16 +5003,7 @@ void ex_halbtc8723d2ant_display_coex_info(IN struct btc_coexist *btcoexist)
 	CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s",
 		   "============[Hw setting]============");
 	CL_PRINTF(cli_buf);
-	/*
-		u32tmp[0] = btcoexist->btc_read_4byte(btcoexist, 0x430);
-		u32tmp[1] = btcoexist->btc_read_4byte(btcoexist, 0x434);
-		u16tmp[0] = btcoexist->btc_read_2byte(btcoexist, 0x42a);
-		u8tmp[0] = btcoexist->btc_read_1byte(btcoexist, 0x456);
-		CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/0x%x/0x%x/0x%x",
-			   "0x430/0x434/0x42a/0x456",
-			   u32tmp[0], u32tmp[1], u16tmp[0], u8tmp[0]);
-		CL_PRINTF(cli_buf);
-	*/
+
 	u32tmp[0] = halbtc8723d2ant_ltecoex_indirect_read_reg(btcoexist, 0x38);
 	u32tmp[1] = halbtc8723d2ant_ltecoex_indirect_read_reg(btcoexist, 0x54);
 	u8tmp[0] = btcoexist->btc_read_1byte(btcoexist, 0x73);
@@ -6333,7 +5034,7 @@ void ex_halbtc8723d2ant_display_coex_info(IN struct btc_coexist *btcoexist)
 			   "\r\n %-35s = %s (BB:%s)/ %s (BB:%s)/ %s (gnt_err = %d)",
 			   "GNT_WL_Ctrl/GNT_BT_Ctrl/Dbg",
 			   ((u32tmp[0] & BIT(12)) ? "SW" : "HW"),
-			   ((u32tmp[0] & BIT(8)) ?	"SW" : "HW"),
+			   ((u32tmp[0] & BIT(8)) ? "SW" : "HW"),
 			   ((u32tmp[0] & BIT(14)) ? "SW" : "HW"),
 			   ((u32tmp[0] & BIT(10)) ?  "SW" : "HW"),
 			   ((u8tmp[0] & BIT(3)) ? "On" : "Off"),
@@ -6369,16 +5070,25 @@ void ex_halbtc8723d2ant_display_coex_info(IN struct btc_coexist *btcoexist)
 		   (int)((u8tmp[3] & BIT(7)) >> 7));
 	CL_PRINTF(cli_buf);
 
+	u32tmp[0] = btcoexist->btc_read_4byte(btcoexist, 0x430);
+	u32tmp[1] = btcoexist->btc_read_4byte(btcoexist, 0x434);
+	u16tmp[0] = btcoexist->btc_read_2byte(btcoexist, 0x42a);
+	u8tmp[0] = btcoexist->btc_read_1byte(btcoexist, 0x426);
+	u8tmp[1] = btcoexist->btc_read_1byte(btcoexist, 0x45e);
+	CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
+		   "\r\n %-35s = 0x%x/ 0x%x/ 0x%x/ 0x%x/ 0x%x",
+		   "0x430/0x434/0x42a/0x426/0x45e[3]",
+		   u32tmp[0], u32tmp[1], u16tmp[0], u8tmp[0],
+		   (int)((u8tmp[1] & BIT(3)) >> 3));
+	CL_PRINTF(cli_buf);
 
 	u8tmp[0] = btcoexist->btc_read_1byte(btcoexist, 0x4c6);
-	u8tmp[1] = btcoexist->btc_read_1byte(btcoexist, 0x40);
-	u8tmp[2] = btcoexist->btc_read_1byte(btcoexist, 0x45e);
+	u16tmp[0] = btcoexist->btc_read_2byte(btcoexist, 0x40);
 
-	CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x/ 0x%x",
-		   "0x4c6[4]/0x40[5]/0x45e[3](TxRetry)",
+	CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
+		   "\r\n %-35s = 0x%x/ 0x%x", "0x4c6[4]/0x40[5]",
 		   (int)((u8tmp[0] & BIT(4)) >> 4),
-		   (int)((u8tmp[1] & BIT(5)) >> 5),
-		   (int)((u8tmp[2] & BIT(3)) >> 3));
+		   (int)((u16tmp[0] & BIT(5)) >> 5));
 	CL_PRINTF(cli_buf);
 
 	u32tmp[0] = btcoexist->btc_read_4byte(btcoexist, 0x550);
@@ -6424,7 +5134,7 @@ void ex_halbtc8723d2ant_display_coex_info(IN struct btc_coexist *btcoexist)
 	CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d %s",
 		   "0x770(Hi-pri rx/tx)",
 		   coex_sta->high_priority_rx, coex_sta->high_priority_tx,
-		   (coex_sta->is_hiPri_rx_overhead ? "(scan overhead!!)" : ""));
+		   (coex_sta->is_hipri_rx_overhead ? "(scan overhead!!)" : ""));
 	CL_PRINTF(cli_buf);
 
 	CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d %s",
@@ -6617,6 +5327,7 @@ void ex_halbtc8723d2ant_connect_notify(IN struct btc_coexist *btcoexist,
 		coex_sta->freeze_coexrun_by_btinfo = TRUE;
 
 		coex_dm->arp_cnt = 0;
+		coex_sta->connect_ap_period_cnt = 2;
 
 	} else if (BTC_ASSOCIATE_FINISH == type) {
 
@@ -6744,13 +5455,14 @@ void ex_halbtc8723d2ant_specific_packet_notify(IN struct btc_coexist *btcoexist,
 void ex_halbtc8723d2ant_bt_info_notify(IN struct btc_coexist *btcoexist,
 				       IN u8 *tmp_buf, IN u8 length)
 {
-	u8			i, rsp_source = 0;
-	boolean		wifi_connected = FALSE;
+	struct btc_bt_link_info *bt_link_info = &btcoexist->bt_link_info;
+	u8 i, rsp_source = 0;
+	boolean	wifi_connected = FALSE;
 	boolean	wifi_scan = FALSE, wifi_link = FALSE, wifi_roam = FALSE,
-		    wifi_busy = FALSE;
+		wifi_busy = FALSE;
 	static boolean is_scoreboard_scan = FALSE;
 
-	if (psd_scan->is_AntDet_running == TRUE) {
+	if (psd_scan->is_antdet_running) {
 		BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
 			"[BTCoex], bt_info_notify return for AntDet is running\n");
 		BTC_TRACE(trace_buf);
@@ -6817,7 +5529,7 @@ void ex_halbtc8723d2ant_bt_info_notify(IN struct btc_coexist *btcoexist,
 
 		coex_sta->a2dp_bit_pool = (((
 			coex_sta->bt_info_c2h[rsp_source][1] & 0x49) == 0x49) ?
-				   (coex_sta->bt_info_c2h[rsp_source][6] & 0x7f) : 0);
+			(coex_sta->bt_info_c2h[rsp_source][6] & 0x7f) : 0);
 
 		coex_sta->is_bt_a2dp_sink = (coex_sta->bt_info_c2h[rsp_source][6] & 0x80) ?
 									TRUE : FALSE;
@@ -6825,7 +5537,7 @@ void ex_halbtc8723d2ant_bt_info_notify(IN struct btc_coexist *btcoexist,
 		coex_sta->bt_retry_cnt = coex_sta->bt_info_c2h[rsp_source][2] &
 					 0xf;
 
-		coex_sta->is_autoslot = coex_sta->bt_info_ext2 & 0x8;
+		bt_link_info->slave_role  = coex_sta->bt_info_ext2 & 0x8;
 
 		coex_sta->forbidden_slot = coex_sta->bt_info_ext2 & 0x7;
 
@@ -6839,31 +5551,27 @@ void ex_halbtc8723d2ant_bt_info_notify(IN struct btc_coexist *btcoexist,
 			coex_sta->pop_event_cnt++;
 
 		if (coex_sta->c2h_bt_remote_name_req)
-			coex_sta->cnt_RemoteNameReq++;
+			coex_sta->cnt_remotenamereq++;
 
 		if (coex_sta->bt_info_ext & BIT(1))
-			coex_sta->cnt_ReInit++;
+			coex_sta->cnt_reinit++;
 
-		if (coex_sta->bt_info_ext & BIT(2)) {
-			coex_sta->cnt_setupLink++;
-			coex_sta->is_setupLink = TRUE;
+		if (coex_sta->bt_info_ext & BIT(2) ||
+		    (coex_sta->bt_create_connection &&
+		    coex_sta->pnp_awake_period_cnt > 0)) {
+			coex_sta->cnt_setuplink++;
+			coex_sta->is_setup_link = TRUE;
 			coex_sta->bt_relink_downcount = 2;
 			BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
 				    "[BTCoex], Re-Link start in BT info!!\n");
 			BTC_TRACE(trace_buf);
-		} else {
-			coex_sta->is_setupLink = FALSE;
-			coex_sta->bt_relink_downcount = 0;
-			BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-				    "[BTCoex], Re-Link stop in BT info!!\n");
-			BTC_TRACE(trace_buf);
 		}
 
 		if (coex_sta->bt_info_ext & BIT(3))
-			coex_sta->cnt_IgnWlanAct++;
+			coex_sta->cnt_ignwlanact++;
 
 		if (coex_sta->bt_info_ext & BIT(6))
-			coex_sta->cnt_RoleSwitch++;
+			coex_sta->cnt_roleswitch++;
 
 		if (coex_sta->bt_info_ext & BIT(7))
 			coex_sta->is_bt_multi_link = TRUE;
@@ -6876,12 +5584,12 @@ void ex_halbtc8723d2ant_bt_info_notify(IN struct btc_coexist *btcoexist,
 			coex_sta->is_hid_rcu = FALSE;
 
 		if (coex_sta->bt_info_ext & BIT(5))
-			coex_sta->is_ble_scan_toggle = TRUE;
+			coex_sta->is_ble_scan_en = TRUE;
 		else
-			coex_sta->is_ble_scan_toggle = FALSE;
+			coex_sta->is_ble_scan_en = FALSE;
 
 		if (coex_sta->bt_create_connection) {
-			coex_sta->cnt_Page++;
+			coex_sta->cnt_page++;
 
 			btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_BUSY,
 					   &wifi_busy);
@@ -6967,27 +5675,62 @@ void ex_halbtc8723d2ant_wl_fwdbginfo_notify(IN struct btc_coexist *btcoexist,
 				       IN u8 *tmp_buf, IN u8 length)
 {
 	u8 i = 0;
-	static u8 tmp_buf_pre[10] = {0, 0, 0, 0, 0, 0, 0, 0, 0, 0};
+	static u8 tmp_buf_pre[10], cnt;
+	u8 h2c_parameter[2] = {0};
 
 	BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-				"[BTCoex], WiFi Fw Dbg info = %d %d %d %d %d %d (len = %d)\n",
-				tmp_buf[0], tmp_buf[1],
-				tmp_buf[2], tmp_buf[3],
-				tmp_buf[4], tmp_buf[5], length);
+		    "[BTCoex], WiFi Fw Dbg info = %d %d %d %d %d %d %d %d (len = %d)\n",
+		    tmp_buf[0], tmp_buf[1], tmp_buf[2], tmp_buf[3], tmp_buf[4],
+		    tmp_buf[5], tmp_buf[6], tmp_buf[7], length);
 	BTC_TRACE(trace_buf);
 
 	if (tmp_buf[0] == 0x8) {
-		for (i = 1; i <= 5; i++) {
+		for (i = 1; i <= 7; i++) {
 			coex_sta->wl_fw_dbg_info[i] =
 				(tmp_buf[i] >= tmp_buf_pre[i]) ?
-				(tmp_buf[i] - tmp_buf_pre[i]) :
-				(255 - tmp_buf_pre[i] + tmp_buf[i]);
+					(tmp_buf[i] - tmp_buf_pre[i]) :
+					(255 - tmp_buf_pre[i] + tmp_buf[i]);
 
 			tmp_buf_pre[i] = tmp_buf[i];
 		}
 	}
-}
 
+	if (!coex_sta->is_no_wl_5ms_extend && coex_sta->force_lps_ctrl &&
+	    !coex_sta->cck_lock_ever) {
+		if (coex_sta->wl_fw_dbg_info[7] <= 5)
+			cnt++;
+		else
+			cnt = 0;
+
+		BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
+			    "[BTCoex], 5ms WL slot extend cnt = %d!!\n", cnt);
+		BTC_TRACE(trace_buf);
+
+		if (cnt == 7) {
+			BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
+				    "[BTCoex], set h2c 0x69 opcode 12 to turn off 5ms WL slot extend!!\n");
+			BTC_TRACE(trace_buf);
+
+			h2c_parameter[0] = 0xc;
+			h2c_parameter[1] = 0x1;
+			btcoexist->btc_fill_h2c(btcoexist, 0x69, 2,
+						h2c_parameter);
+			coex_sta->is_no_wl_5ms_extend = TRUE;
+			cnt = 0;
+		}
+	}
+
+	if (coex_sta->is_no_wl_5ms_extend && coex_sta->cck_lock) {
+		BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
+			    "[BTCoex], set h2c 0x69 opcode 12 to turn on 5ms WL slot extend!!\n");
+		BTC_TRACE(trace_buf);
+
+		h2c_parameter[0] = 0xc;
+		h2c_parameter[1] = 0x0;
+		btcoexist->btc_fill_h2c(btcoexist, 0x69, 2, h2c_parameter);
+		coex_sta->is_no_wl_5ms_extend = FALSE;
+	}
+}
 
 void ex_halbtc8723d2ant_rx_rate_change_notify(IN struct btc_coexist *btcoexist,
 		IN BOOLEAN is_data_frame, IN u8 btc_rate_id)
@@ -7013,24 +5756,24 @@ void ex_halbtc8723d2ant_rx_rate_change_notify(IN struct btc_coexist *btcoexist,
 		BTC_TRACE(trace_buf);
 	}
 
-	if ((wifi_connected) &&
-		((coex_dm->bt_status ==  BT_8723D_2ANT_BT_STATUS_ACL_BUSY) ||
-		(coex_dm->bt_status ==  BT_8723D_2ANT_BT_STATUS_ACL_SCO_BUSY) ||
-		(coex_dm->bt_status == BT_8723D_2ANT_BT_STATUS_SCO_BUSY))) {
+	if (wifi_connected &&
+	    (coex_dm->bt_status ==  BT_8723D_2ANT_BT_STATUS_ACL_BUSY ||
+	     coex_dm->bt_status ==  BT_8723D_2ANT_BT_STATUS_ACL_SCO_BUSY ||
+	     coex_dm->bt_status == BT_8723D_2ANT_BT_STATUS_SCO_BUSY)) {
 
-		if ((coex_sta->wl_rx_rate == BTC_CCK_5_5) ||
-			(coex_sta->wl_rx_rate == BTC_OFDM_6) ||
-			(coex_sta->wl_rx_rate == BTC_MCS_0)) {
+		if (coex_sta->wl_rx_rate == BTC_CCK_5_5 ||
+		    coex_sta->wl_rx_rate == BTC_OFDM_6 ||
+		    coex_sta->wl_rx_rate == BTC_MCS_0) {
 
 			coex_sta->cck_lock_warn = TRUE;
 
 			BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
 				"[BTCoex], cck lock warning...\n");
 			BTC_TRACE(trace_buf);
-		} else if ((coex_sta->wl_rx_rate == BTC_CCK_1) ||
-			(coex_sta->wl_rx_rate == BTC_CCK_2) ||
-			(coex_sta->wl_rts_rx_rate == BTC_CCK_1) ||
-			(coex_sta->wl_rts_rx_rate == BTC_CCK_2)) {
+		} else if (coex_sta->wl_rx_rate == BTC_CCK_1 ||
+			   coex_sta->wl_rx_rate == BTC_CCK_2 ||
+			   coex_sta->wl_rts_rx_rate == BTC_CCK_1 ||
+			   coex_sta->wl_rts_rx_rate == BTC_CCK_2) {
 
 			coex_sta->cck_lock = TRUE;
 			coex_sta->cck_lock_ever = TRUE;
@@ -7047,10 +5790,10 @@ void ex_halbtc8723d2ant_rx_rate_change_notify(IN struct btc_coexist *btcoexist,
 			BTC_TRACE(trace_buf);
 		}
 	} else {
-		if ((coex_dm->bt_status ==
-			BT_8723D_2ANT_BT_STATUS_CONNECTED_IDLE) ||
-			(coex_dm->bt_status ==
-			BT_8723D_2ANT_BT_STATUS_NON_CONNECTED_IDLE)) {
+		if (coex_dm->bt_status ==
+		    BT_8723D_2ANT_BT_STATUS_CONNECTED_IDLE ||
+		    coex_dm->bt_status ==
+		    BT_8723D_2ANT_BT_STATUS_NON_CONNECTED_IDLE) {
 			coex_sta->cck_lock_warn = FALSE;
 			coex_sta->cck_lock = FALSE;
 		}
@@ -7128,6 +5871,8 @@ void ex_halbtc8723d2ant_halt_notify(IN struct btc_coexist *btcoexist)
 void ex_halbtc8723d2ant_pnp_notify(IN struct btc_coexist *btcoexist,
 				   IN u8 pnp_state)
 {
+	static u8 pre_pnp_state;
+
 	BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, "[BTCoex], Pnp notify\n");
 	BTC_TRACE(trace_buf);
 
@@ -7164,18 +5909,30 @@ void ex_halbtc8723d2ant_pnp_notify(IN struct btc_coexist *btcoexist,
 
 		btcoexist->stop_coex_dm = TRUE;
 
-	} else if (BTC_WIFI_PNP_WAKE_UP == pnp_state) {
+	} else {
 		BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
 			    "[BTCoex], Pnp notify to WAKE UP\n");
 		BTC_TRACE(trace_buf);
+
+		coex_sta->pnp_awake_period_cnt = 3;
+
+		/*WoWLAN*/
+		if (pre_pnp_state == BTC_WIFI_PNP_SLEEP_KEEP_ANT ||
+		    pnp_state == BTC_WIFI_PNP_WOWLAN) {
+			coex_sta->run_time_state = TRUE;
+			btcoexist->stop_coex_dm = FALSE;
+			halbtc8723d2ant_run_coexist_mechanism(btcoexist);
+		}
+
 #if 0
 		halbtc8723d2ant_post_state_to_bt(btcoexist,
 					BT_8723D_2ANT_SCOREBOARD_ACTIVE, TRUE);
 		halbtc8723d2ant_post_state_to_bt(btcoexist,
 					BT_8723D_2ANT_SCOREBOARD_ONOFF, TRUE);
 #endif
-		btcoexist->stop_coex_dm = FALSE;
 	}
+
+	pre_pnp_state = pnp_state;
 }
 
 void ex_halbtc8723d2ant_periodical(IN struct btc_coexist *btcoexist)
@@ -7226,11 +5983,23 @@ void ex_halbtc8723d2ant_periodical(IN struct btc_coexist *btcoexist)
 		coex_sta->bt_relink_downcount--;
 
 		if (coex_sta->bt_relink_downcount == 0) {
-			coex_sta->is_setupLink = FALSE;
+			coex_sta->is_setup_link = FALSE;
 			bt_relink_finish = TRUE;
 		}
 	}
 
+	if (coex_sta->pnp_awake_period_cnt > 0)
+		coex_sta->pnp_awake_period_cnt--;
+
+	BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
+		    "[BTCoex], pnp_awake_period_cnt = %d\n",
+				coex_sta->pnp_awake_period_cnt);
+	BTC_TRACE(trace_buf);
+
+	/*for A2DP glitch during connecting AP*/
+	if (coex_sta->connect_ap_period_cnt > 0)
+		coex_sta->connect_ap_period_cnt--;
+
 	/* for 4-way, DHCP, EAPOL packet */
 	if (coex_sta->specific_pkt_period_cnt > 0) {
 
@@ -7241,31 +6010,27 @@ void ex_halbtc8723d2ant_periodical(IN struct btc_coexist *btcoexist)
 			coex_sta->wifi_is_high_pri_task = FALSE;
 
 		BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-			"[BTCoex], ***************** Hi-Pri Task = %s*****************\n",
-			    (coex_sta->wifi_is_high_pri_task ? "Yes" :
-			     "No"));
+			   "[BTCoex], ***************** Hi-Pri Task = %s\n",
+			    (coex_sta->wifi_is_high_pri_task ? "Yes" : "No"));
 		BTC_TRACE(trace_buf);
 
 	}
 
 	if (!coex_sta->bt_disabled) {
-
-#if BT_8723D_2ANT_ANTDET_ENABLE
-
+#if 0
 		if (board_info->btdm_ant_det_finish) {
-			if ((psd_scan->ant_det_result == 12) &&
-			    (psd_scan->ant_det_psd_scan_peak_val == 0)
-			    && (!psd_scan->is_AntDet_running))
+			if (psd_scan->ant_det_result == 12 &&
+			    psd_scan->ant_det_psd_scan_peak_val == 0 &&
+			    !psd_scan->is_antdet_running)
 				psd_scan->ant_det_psd_scan_peak_val =
 					btcoexist->btc_get_ant_det_val_from_bt(
 						btcoexist) * 100;
 		}
-
 #endif
 	}
 
-
-	if (halbtc8723d2ant_is_wifibt_status_changed(btcoexist) || (bt_relink_finish))
+	if (halbtc8723d2ant_is_wifibt_status_changed(btcoexist) ||
+	    bt_relink_finish)
 		halbtc8723d2ant_run_coexist_mechanism(btcoexist);
 }
 
@@ -7285,11 +6050,9 @@ void ex_halbtc8723d2ant_set_antenna_notify(IN struct btc_coexist *btcoexist,
 					     BT_8723D_2ANT_PHASE_2G_RUNTIME);
 
 	} else { /* one antenna */
-
 		halbtc8723d2ant_set_ant_path(btcoexist, BTC_ANT_PATH_AUTO,
 					     FORCE_EXEC,
 					     BT_8723D_2ANT_PHASE_2G_RUNTIME);
-
 	}
 }
 
@@ -7308,142 +6071,12 @@ void ex_halbtc8723d2ant_antenna_detection(IN struct btc_coexist *btcoexist,
 	BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
 		    "xxxxxxxxxxxxxxxx Ext Call AntennaDetect()!!\n");
 	BTC_TRACE(trace_buf);
-
-#if BT_8723D_2ANT_ANTDET_ENABLE
-
-	BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-		    "xxxxxxxxxxxxxxxx Call AntennaDetect()!!\n");
-	BTC_TRACE(trace_buf);
-
-	if (seconds == 0) {
-		psd_scan->ant_det_try_count	= 0;
-		psd_scan->ant_det_fail_count	= 0;
-		ant_det_count = 0;
-		ant_det_fail_count = 0;
-		board_info->btdm_ant_det_finish = FALSE;
-		board_info->btdm_ant_num_by_ant_det = 1;
-		return;
-	}
-
-	if (!board_info->btdm_ant_det_finish) {
-		psd_scan->ant_det_inteval_count =
-			psd_scan->ant_det_inteval_count + 2;
-
-		if (psd_scan->ant_det_inteval_count >=
-		    BT_8723D_2ANT_ANTDET_RETRY_INTERVAL) {
-			BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-				"xxxxxxxxxxxxxxxx AntennaDetect(), Antenna Det Timer is up, Try Detect!!\n");
-			BTC_TRACE(trace_buf);
-
-			psd_scan->is_AntDet_running = TRUE;
-
-			halbtc8723d2ant_read_score_board(btcoexist,	&u16tmp);
-
-			if (u16tmp & BIT(
-				2)) { /* Antenna detection is already done before last WL power on   */
-				board_info->btdm_ant_det_finish = TRUE;
-				psd_scan->ant_det_try_count = 1;
-				psd_scan->ant_det_fail_count = 0;
-				board_info->btdm_ant_num_by_ant_det = (u16tmp &
-							       BIT(3)) ? 1 : 2;
-				psd_scan->ant_det_result = 12;
-
-				psd_scan->ant_det_psd_scan_peak_val =
-					btcoexist->btc_get_ant_det_val_from_bt(
-						btcoexist) * 100;
-
-				BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-					"xxxxxxxxxxxxxxxx AntennaDetect(), Antenna Det Result from BT (%d-Ant)\n",
-					board_info->btdm_ant_num_by_ant_det);
-				BTC_TRACE(trace_buf);
-			} else
-				board_info->btdm_ant_det_finish =
-					halbtc8723d2ant_psd_antenna_detection_check(
-						btcoexist);
-
-			btcoexist->bdontenterLPS = FALSE;
-
-			if (board_info->btdm_ant_det_finish) {
-				BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-					"xxxxxxxxxxxxxxxx AntennaDetect(), Antenna Det Success!!\n");
-				BTC_TRACE(trace_buf);
-
-				/*for 8723d, btc_set_bt_trx_mask is just used to
-					notify BT stop le tx and Ant Det Result , not set BT RF TRx Mask  */
-				if (psd_scan->ant_det_result != 12) {
-
-					AntDetval = (u8)(
-						psd_scan->ant_det_psd_scan_peak_val
-							    / 100) & 0x7f;
-
-					AntDetval =
-						(board_info->btdm_ant_num_by_ant_det
-						 == 1) ? (AntDetval | 0x80) :
-						AntDetval;
-
-					BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-						"xxxxxx AntennaDetect(), Ant Count = %d, PSD Val = %d\n",
-						    ((AntDetval &
-						      0x80) ? 1
-						     : 2), AntDetval
-						    & 0x7f);
-					BTC_TRACE(trace_buf);
-
-					if (btcoexist->btc_set_bt_trx_mask(
-						    btcoexist, AntDetval))
-						BTC_SPRINTF(trace_buf,
-							    BT_TMP_BUF_SIZE,
-							"xxxxxx AntennaDetect(), Notify BT stop le tx by set_bt_trx_mask ok!\n");
-					else
-						BTC_SPRINTF(trace_buf,
-							    BT_TMP_BUF_SIZE,
-							"xxxxxx AntennaDetect(), Notify BT stop le tx by set_bt_trx_mask fail!\n");
-
-					BTC_TRACE(trace_buf);
-				} else
-					board_info->antdetval =
-						psd_scan->ant_det_psd_scan_peak_val/100;
-				
-				board_info->btdm_ant_det_complete_fail = FALSE;
-
-			} else {
-				BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-					"xxxxxxxxxxxxxxxx AntennaDetect(), Antenna Det Fail!!\n");
-				BTC_TRACE(trace_buf);
-			}
-
-			psd_scan->ant_det_inteval_count = 0;
-			psd_scan->is_AntDet_running = FALSE;
-
-			/* stimulate coex running */
-			halbtc8723d2ant_run_coexist_mechanism(
-				btcoexist);
-			BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-				"xxxxxxxxxxxxxxxx AntennaDetect(), Stimulate Coex running\n!!");
-			BTC_TRACE(trace_buf);
-		} else {
-			BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-				"xxxxxxxxxxxxxxxx AntennaDetect(), Antenna Det Timer is not up! (%d)\n",
-				    psd_scan->ant_det_inteval_count);
-			BTC_TRACE(trace_buf);
-
-			if (psd_scan->ant_det_inteval_count == 8)
-				btcoexist->bdontenterLPS = TRUE;
-			else
-				btcoexist->bdontenterLPS = FALSE;
-		}
-
-	}
-#endif
-
-
 }
 
 
 void ex_halbtc8723d2ant_display_ant_detection(IN struct btc_coexist *btcoexist)
 {
-
-#if BT_8723D_2ANT_ANTDET_ENABLE
+#if 0
 	struct  btc_board_info	*board_info = &btcoexist->board_info;
 
 	if (psd_scan->ant_det_try_count != 0)	{
@@ -7453,7 +6086,6 @@ void ex_halbtc8723d2ant_display_ant_detection(IN struct btc_coexist *btcoexist)
 			halbtc8723d2ant_psd_showdata(btcoexist);
 	}
 #endif
-
 }
 
 
diff --git a/rtl8723DS/hal/btc/halbtc8723d2ant.h b/rtl8723DS/hal/btc/halbtc8723d2ant.h
index 9075bb8..eb7bc06 100755..100644
--- a/rtl8723DS/hal/btc/halbtc8723d2ant.h
+++ b/rtl8723DS/hal/btc/halbtc8723d2ant.h
@@ -25,9 +25,9 @@
 #define	BT_AUTO_REPORT_ONLY_8723D_2ANT				1
 
 
-#define	BT_INFO_8723D_2ANT_B_FTP						BIT(7)
-#define	BT_INFO_8723D_2ANT_B_A2DP					BIT(6)
-#define	BT_INFO_8723D_2ANT_B_HID						BIT(5)
+#define	BT_INFO_8723D_2ANT_B_FTP				BIT(7)
+#define	BT_INFO_8723D_2ANT_B_A2DP				BIT(6)
+#define	BT_INFO_8723D_2ANT_B_HID				BIT(5)
 #define	BT_INFO_8723D_2ANT_B_SCO_BUSY				BIT(4)
 #define	BT_INFO_8723D_2ANT_B_ACL_BUSY				BIT(3)
 #define	BT_INFO_8723D_2ANT_B_INQ_PAGE				BIT(2)
@@ -37,128 +37,129 @@
 #define		BTC_RSSI_COEX_THRESH_TOL_8723D_2ANT		2
 
 
-#define	BT_8723D_2ANT_WIFI_RSSI_COEXSWITCH_THRES1				80  /* unit: % WiFi RSSI Threshold for   2-Ant free-run/2-Ant TDMA translation, default = 42 */
-#define	BT_8723D_2ANT_BT_RSSI_COEXSWITCH_THRES1				80 /*  unit: % BT RSSI Threshold for      2-Ant free-run/2-Ant TDMA translation, default = 46 */
-#define	BT_8723D_2ANT_WIFI_RSSI_COEXSWITCH_THRES2				80  /* unit: % WiFi RSSI Threshold for   1-Ant TDMA/1-Ant PS-TDMA translation, default = 42 */
-#define	BT_8723D_2ANT_BT_RSSI_COEXSWITCH_THRES2				80 /*  unit: % BT RSSI Threshold for      1-Ant TDMA/1-Ant PS-TDMA translation, default = 46 */
-#define	BT_8723D_2ANT_DEFAULT_ISOLATION						15	 /*  unit: dB */
-#define   BT_8723D_2ANT_WIFI_MAX_TX_POWER						15	 /*  unit: dBm */
-#define   BT_8723D_2ANT_BT_MAX_TX_POWER							3	 /*  unit: dBm */
-#define   BT_8723D_2ANT_WIFI_SIR_THRES1							-15  /*  unit: dB */
-#define   BT_8723D_2ANT_WIFI_SIR_THRES2							-30  /*  unit: dB */
-#define   BT_8723D_2ANT_BT_SIR_THRES1							-15		 /*  unit: dB */
-#define   BT_8723D_2ANT_BT_SIR_THRES2							-30		 /*  unit: dB */
+#define	BT_8723D_2ANT_WIFI_RSSI_COEXSWITCH_THRES1		80
+#define	BT_8723D_2ANT_BT_RSSI_COEXSWITCH_THRES1			80
+#define	BT_8723D_2ANT_WIFI_RSSI_COEXSWITCH_THRES2		80
+#define	BT_8723D_2ANT_BT_RSSI_COEXSWITCH_THRES2			80
+#define	BT_8723D_2ANT_DEFAULT_ISOLATION				15
+#define   BT_8723D_2ANT_WIFI_MAX_TX_POWER				15
+#define   BT_8723D_2ANT_BT_MAX_TX_POWER				3
+#define   BT_8723D_2ANT_WIFI_SIR_THRES1				-15
+#define   BT_8723D_2ANT_WIFI_SIR_THRES2				-30
+#define   BT_8723D_2ANT_BT_SIR_THRES1				-15
+#define   BT_8723D_2ANT_BT_SIR_THRES2				-30
 
 
 /* for Antenna detection */
-#define	BT_8723D_2ANT_ANTDET_PSDTHRES_BACKGROUND						50
-#define	BT_8723D_2ANT_ANTDET_PSDTHRES_2ANT_BADISOLATION				70
-#define	BT_8723D_2ANT_ANTDET_PSDTHRES_2ANT_GOODISOLATION			52
-#define	BT_8723D_2ANT_ANTDET_PSDTHRES_1ANT							40
-#define	BT_8723D_2ANT_ANTDET_RETRY_INTERVAL							10	/* retry timer if ant det is fail, unit: second */
-#define	BT_8723D_2ANT_ANTDET_SWEEPPOINT_DELAY							60000
-#define	BT_8723D_2ANT_ANTDET_ENABLE										1
-#define	BT_8723D_2ANT_ANTDET_BTTXTIME									100
-#define	BT_8723D_2ANT_ANTDET_BTTXCHANNEL								39
-#define	BT_8723D_2ANT_ANTDET_PSD_SWWEEPCOUNT						50
+#define	BT_8723D_2ANT_ANTDET_PSDTHRES_BACKGROUND		50
+#define	BT_8723D_2ANT_ANTDET_PSDTHRES_2ANT_BADISOLATION		70
+#define	BT_8723D_2ANT_ANTDET_PSDTHRES_2ANT_GOODISOLATION	52
+#define	BT_8723D_2ANT_ANTDET_PSDTHRES_1ANT			40
+#define	BT_8723D_2ANT_ANTDET_RETRY_INTERVAL			10
+#define	BT_8723D_2ANT_ANTDET_SWEEPPOINT_DELAY			60000
+#define	BT_8723D_2ANT_ANTDET_ENABLE				0
+#define	BT_8723D_2ANT_ANTDET_BTTXTIME				100
+#define	BT_8723D_2ANT_ANTDET_BTTXCHANNEL			39
+#define	BT_8723D_2ANT_ANTDET_PSD_SWWEEPCOUNT			50
 
 
-#define	BT_8723D_2ANT_LTECOEX_INDIRECTREG_ACCESS_TIMEOUT		30000
+#define	BT_8723D_2ANT_LTECOEX_INDIRECTREG_ACCESS_TIMEOUT	30000
 
 enum bt_8723d_2ant_signal_state {
-	BT_8723D_2ANT_SIG_STA_SET_TO_LOW		= 0x0,
+	BT_8723D_2ANT_SIG_STA_SET_TO_LOW	= 0x0,
 	BT_8723D_2ANT_SIG_STA_SET_BY_HW		= 0x0,
-	BT_8723D_2ANT_SIG_STA_SET_TO_HIGH		= 0x1,
+	BT_8723D_2ANT_SIG_STA_SET_TO_HIGH	= 0x1,
 	BT_8723D_2ANT_SIG_STA_MAX
 };
 
 enum bt_8723d_2ant_path_ctrl_owner {
 	BT_8723D_2ANT_PCO_BTSIDE		= 0x0,
-	BT_8723D_2ANT_PCO_WLSIDE	= 0x1,
+	BT_8723D_2ANT_PCO_WLSIDE		= 0x1,
 	BT_8723D_2ANT_PCO_MAX
 };
 
 enum bt_8723d_2ant_gnt_ctrl_type {
-	BT_8723D_2ANT_GNT_TYPE_CTRL_BY_PTA		= 0x0,
-	BT_8723D_2ANT_GNT_TYPE_CTRL_BY_SW		= 0x1,
+	BT_8723D_2ANT_GNT_TYPE_CTRL_BY_PTA	= 0x0,
+	BT_8723D_2ANT_GNT_TYPE_CTRL_BY_SW	= 0x1,
 	BT_8723D_2ANT_GNT_TYPE_MAX
 };
 
 enum bt_8723d_2ant_gnt_ctrl_block {
 	BT_8723D_2ANT_GNT_BLOCK_RFC_BB		= 0x0,
-	BT_8723D_2ANT_GNT_BLOCK_RFC			= 0x1,
-	BT_8723D_2ANT_GNT_BLOCK_BB			= 0x2,
+	BT_8723D_2ANT_GNT_BLOCK_RFC		= 0x1,
+	BT_8723D_2ANT_GNT_BLOCK_BB		= 0x2,
 	BT_8723D_2ANT_GNT_BLOCK_MAX
 };
 
 enum bt_8723d_2ant_lte_coex_table_type {
-	BT_8723D_2ANT_CTT_WL_VS_LTE			= 0x0,
-	BT_8723D_2ANT_CTT_BT_VS_LTE			= 0x1,
+	BT_8723D_2ANT_CTT_WL_VS_LTE		= 0x0,
+	BT_8723D_2ANT_CTT_BT_VS_LTE		= 0x1,
 	BT_8723D_2ANT_CTT_MAX
 };
 
 enum bt_8723d_2ant_lte_break_table_type {
-	BT_8723D_2ANT_LBTT_WL_BREAK_LTE			= 0x0,
-	BT_8723D_2ANT_LBTT_BT_BREAK_LTE				= 0x1,
-	BT_8723D_2ANT_LBTT_LTE_BREAK_WL			= 0x2,
-	BT_8723D_2ANT_LBTT_LTE_BREAK_BT				= 0x3,
+	BT_8723D_2ANT_LBTT_WL_BREAK_LTE		= 0x0,
+	BT_8723D_2ANT_LBTT_BT_BREAK_LTE		= 0x1,
+	BT_8723D_2ANT_LBTT_LTE_BREAK_WL		= 0x2,
+	BT_8723D_2ANT_LBTT_LTE_BREAK_BT		= 0x3,
 	BT_8723D_2ANT_LBTT_MAX
 };
 
 enum bt_info_src_8723d_2ant {
-	BT_INFO_SRC_8723D_2ANT_WIFI_FW			= 0x0,
-	BT_INFO_SRC_8723D_2ANT_BT_RSP				= 0x1,
-	BT_INFO_SRC_8723D_2ANT_BT_ACTIVE_SEND		= 0x2,
+	BT_INFO_SRC_8723D_2ANT_WIFI_FW		= 0x0,
+	BT_INFO_SRC_8723D_2ANT_BT_RSP		= 0x1,
+	BT_INFO_SRC_8723D_2ANT_BT_ACTIVE_SEND	= 0x2,
 	BT_INFO_SRC_8723D_2ANT_MAX
 };
 
 enum bt_8723d_2ant_bt_status {
 	BT_8723D_2ANT_BT_STATUS_NON_CONNECTED_IDLE	= 0x0,
 	BT_8723D_2ANT_BT_STATUS_CONNECTED_IDLE		= 0x1,
-	BT_8723D_2ANT_BT_STATUS_INQ_PAGE				= 0x2,
-	BT_8723D_2ANT_BT_STATUS_ACL_BUSY				= 0x3,
-	BT_8723D_2ANT_BT_STATUS_SCO_BUSY				= 0x4,
-	BT_8723D_2ANT_BT_STATUS_ACL_SCO_BUSY			= 0x5,
+	BT_8723D_2ANT_BT_STATUS_INQ_PAGE		= 0x2,
+	BT_8723D_2ANT_BT_STATUS_ACL_BUSY		= 0x3,
+	BT_8723D_2ANT_BT_STATUS_SCO_BUSY		= 0x4,
+	BT_8723D_2ANT_BT_STATUS_ACL_SCO_BUSY		= 0x5,
 	BT_8723D_2ANT_BT_STATUS_MAX
 };
 
 enum bt_8723d_2ant_coex_algo {
-	BT_8723D_2ANT_COEX_ALGO_UNDEFINED			= 0x0,
-	BT_8723D_2ANT_COEX_ALGO_SCO				= 0x1,
-	BT_8723D_2ANT_COEX_ALGO_HID				= 0x2,
-	BT_8723D_2ANT_COEX_ALGO_A2DP				= 0x3,
+	BT_8723D_2ANT_COEX_ALGO_UNDEFINED		= 0x0,
+	BT_8723D_2ANT_COEX_ALGO_SCO			= 0x1,
+	BT_8723D_2ANT_COEX_ALGO_HID			= 0x2,
+	BT_8723D_2ANT_COEX_ALGO_A2DP			= 0x3,
 	BT_8723D_2ANT_COEX_ALGO_A2DP_PANHS		= 0x4,
 	BT_8723D_2ANT_COEX_ALGO_PANEDR			= 0x5,
 	BT_8723D_2ANT_COEX_ALGO_PANHS			= 0x6,
 	BT_8723D_2ANT_COEX_ALGO_PANEDR_A2DP		= 0x7,
 	BT_8723D_2ANT_COEX_ALGO_PANEDR_HID		= 0x8,
-	BT_8723D_2ANT_COEX_ALGO_HID_A2DP_PANEDR	= 0x9,
-	BT_8723D_2ANT_COEX_ALGO_HID_A2DP			= 0xa,
+	BT_8723D_2ANT_COEX_ALGO_HID_A2DP_PANEDR		= 0x9,
+	BT_8723D_2ANT_COEX_ALGO_HID_A2DP		= 0xa,
 	BT_8723D_2ANT_COEX_ALGO_NOPROFILEBUSY		= 0xb,
 	BT_8723D_2ANT_COEX_ALGO_A2DPSINK		= 0xc,
 	BT_8723D_2ANT_COEX_ALGO_MAX
 };
 
 enum bt_8723d_2ant_phase {
-	BT_8723D_2ANT_PHASE_COEX_INIT								= 0x0,
-	BT_8723D_2ANT_PHASE_WLANONLY_INIT							= 0x1,
-	BT_8723D_2ANT_PHASE_WLAN_OFF								= 0x2,
-	BT_8723D_2ANT_PHASE_2G_RUNTIME								= 0x3,
-	BT_8723D_2ANT_PHASE_5G_RUNTIME								= 0x4,
-	BT_8723D_2ANT_PHASE_BTMPMODE								= 0x5,
-	BT_8723D_2ANT_PHASE_ANTENNA_DET								= 0x6,
-	BT_8723D_2ANT_PHASE_COEX_POWERON							= 0x7,
-	BT_8723D_2ANT_PHASE_2G_FREERUN								= 0x8,
+	BT_8723D_2ANT_PHASE_COEX_INIT			= 0x0,
+	BT_8723D_2ANT_PHASE_WLANONLY_INIT		= 0x1,
+	BT_8723D_2ANT_PHASE_WLAN_OFF			= 0x2,
+	BT_8723D_2ANT_PHASE_2G_RUNTIME			= 0x3,
+	BT_8723D_2ANT_PHASE_5G_RUNTIME			= 0x4,
+	BT_8723D_2ANT_PHASE_BTMPMODE			= 0x5,
+	BT_8723D_2ANT_PHASE_ANTENNA_DET			= 0x6,
+	BT_8723D_2ANT_PHASE_COEX_POWERON		= 0x7,
+	BT_8723D_2ANT_PHASE_2G_FREERUN			= 0x8,
 	BT_8723D_2ANT_PHASE_MAX
 };
 
 enum bt_8723d_2ant_Scoreboard {
-	BT_8723D_2ANT_SCOREBOARD_ACTIVE								= BIT(0),
-	BT_8723D_2ANT_SCOREBOARD_ONOFF								= BIT(1),
-	BT_8723D_2ANT_SCOREBOARD_SCAN								= BIT(2),
-	BT_8723D_2ANT_SCOREBOARD_UNDERTEST							= BIT(3),
-	BT_8723D_2ANT_SCOREBOARD_RXGAIN								= BIT(4),
-	BT_8723D_2ANT_SCOREBOARD_WLBUSY								= BIT(6)
+	BT_8723D_2ANT_SCOREBOARD_ACTIVE			= BIT(0),
+	BT_8723D_2ANT_SCOREBOARD_ONOFF			= BIT(1),
+	BT_8723D_2ANT_SCOREBOARD_SCAN			= BIT(2),
+	BT_8723D_2ANT_SCOREBOARD_UNDERTEST		= BIT(3),
+	BT_8723D_2ANT_SCOREBOARD_RXGAIN			= BIT(4),
+	BT_8723D_2ANT_SCOREBOARD_WLBUSY			= BIT(6),
+	BT_8723D_2ANT_SCOREBOARD_TDMA			= BIT(9),
 };
 
 
@@ -171,12 +172,10 @@ struct coex_dm_8723d_2ant {
 	u8		cur_fw_dac_swing_lvl;
 	boolean		cur_ignore_wlan_act;
 	boolean		pre_ignore_wlan_act;
-	u8		pre_ps_tdma;
 	u8		cur_ps_tdma;
 	u8		ps_tdma_para[5];
 	u8		ps_tdma_du_adj_type;
 	boolean		reset_tdma_adjust;
-	boolean		pre_ps_tdma_on;
 	boolean		cur_ps_tdma_on;
 	boolean		pre_bt_auto_report;
 	boolean		cur_bt_auto_report;
@@ -185,7 +184,7 @@ struct coex_dm_8723d_2ant {
 	boolean		pre_rf_rx_lpf_shrink;
 	boolean		cur_rf_rx_lpf_shrink;
 	u32		bt_rf_0x1e_backup;
-	boolean	pre_low_penalty_ra;
+	boolean		pre_low_penalty_ra;
 	boolean		cur_low_penalty_ra;
 	boolean		pre_dac_swing_on;
 	u32		pre_dac_swing_lvl;
@@ -193,15 +192,11 @@ struct coex_dm_8723d_2ant {
 	u32		cur_dac_swing_lvl;
 	boolean		pre_adc_back_off;
 	boolean		cur_adc_back_off;
-	boolean	pre_agc_table_en;
+	boolean		pre_agc_table_en;
 	boolean		cur_agc_table_en;
-	u32		pre_val0x6c0;
 	u32		cur_val0x6c0;
-	u32		pre_val0x6c4;
 	u32		cur_val0x6c4;
-	u32		pre_val0x6c8;
 	u32		cur_val0x6c8;
-	u8		pre_val0x6cc;
 	u8		cur_val0x6cc;
 	boolean		limited_dig;
 
@@ -221,185 +216,198 @@ struct coex_dm_8723d_2ant {
 
 	boolean		is_switch_to_1dot5_ant;
 	u8		switch_thres_offset;
-	u32					arp_cnt;
+	u32		arp_cnt;
 
 	u8		pre_ant_pos_type;
 	u8		cur_ant_pos_type;
+	u32		setting_tdma;
 };
 
 struct coex_sta_8723d_2ant {
-	boolean				bt_disabled;
-	boolean				bt_link_exist;
-	boolean				sco_exist;
-	boolean				a2dp_exist;
-	boolean				hid_exist;
-	boolean				pan_exist;
-
-	boolean				under_lps;
-	boolean				under_ips;
-	u32					high_priority_tx;
-	u32					high_priority_rx;
-	u32					low_priority_tx;
-	u32					low_priority_rx;
-	boolean             is_hiPri_rx_overhead;
-	u8					bt_rssi;
-	boolean				bt_tx_rx_mask;
-	u8					pre_bt_rssi_state;
-	u8					pre_wifi_rssi_state[4];
-	u8					bt_info_c2h[BT_INFO_SRC_8723D_2ANT_MAX][10];
-	u32					bt_info_c2h_cnt[BT_INFO_SRC_8723D_2ANT_MAX];
-	boolean				bt_whck_test;
-	boolean				c2h_bt_inquiry_page;
-	boolean				c2h_bt_remote_name_req;
-	u8					bt_retry_cnt;
-	u8					bt_info_ext;
-	u8					bt_info_ext2;
-	u32					pop_event_cnt;
-	u8					scan_ap_num;
-
-	u32					crc_ok_cck;
-	u32					crc_ok_11g;
-	u32					crc_ok_11n;
-	u32					crc_ok_11n_vht;
-
-	u32					crc_err_cck;
-	u32					crc_err_11g;
-	u32					crc_err_11n;
-	u32					crc_err_11n_vht;
-
-	u32					acc_crc_ratio;
-	u32					now_crc_ratio;
-	u32					cnt_crcok_max_in_10s;
-
-	boolean				cck_lock;
-	boolean				cck_lock_ever;
-	boolean				cck_lock_warn;
-
-	u8					coex_table_type;
-	boolean				force_lps_ctrl;
-
-	u8					dis_ver_info_cnt;
-
-	u8					a2dp_bit_pool;
-	u8					cut_version;
-
-	boolean				concurrent_rx_mode_on;
-
-	u16					score_board;
-	u8					isolation_btween_wb;   /* 0~ 50 */
-	u8					wifi_coex_thres;
-	u8					bt_coex_thres;
-	u8					wifi_coex_thres2;
-	u8					bt_coex_thres2;
-
-	u8					num_of_profile;
-	boolean				acl_busy;
-	boolean				bt_create_connection;
-	boolean				wifi_is_high_pri_task;
-	u32					specific_pkt_period_cnt;
-	u32					bt_coex_supported_feature;
-	u32					bt_coex_supported_version;
-
-	u8					bt_ble_scan_type;
-	u32					bt_ble_scan_para[3];
-
-	boolean				run_time_state;
-	boolean				freeze_coexrun_by_btinfo;
-
-	boolean				is_A2DP_3M;
-	boolean				voice_over_HOGP;
-	u8                  bt_info;
-	boolean				is_autoslot;
-	u8					forbidden_slot;
-	u8					hid_busy_num;
-	u8					hid_pair_cnt;
-
-	u32					cnt_RemoteNameReq;
-	u32					cnt_setupLink;
-	u32					cnt_ReInit;
-	u32					cnt_IgnWlanAct;
-	u32					cnt_Page;
-	u32					cnt_RoleSwitch;
-
-	u16					bt_reg_vendor_ac;
-	u16					bt_reg_vendor_ae;
-
-	boolean				is_setupLink;
-	boolean				wl_noisy_level;
-	u32                 gnt_error_cnt;
-
-	u8					bt_afh_map[10];
-	u8					bt_relink_downcount;
-	boolean				is_tdma_btautoslot;
-	boolean				is_tdma_btautoslot_hang;
-
-	boolean             is_eSCO_mode;
-
-	boolean				is_rf_state_off;
-
-	boolean				is_hid_low_pri_tx_overhead;
-	boolean				is_bt_multi_link;
-	boolean				is_bt_a2dp_sink;
-
-	u8					wl_fw_dbg_info[10];
-	u8					wl_rx_rate;
-	u8					wl_rts_rx_rate;
-
-	u16					score_board_WB;
-	boolean				is_2g_freerun;
-
-	boolean				is_hid_rcu;
-	boolean				is_ble_scan_toggle;
-
-	u16					legacy_forbidden_slot;
-	u16					le_forbidden_slot;
-	u8					bt_a2dp_vendor_id;
-	u32					bt_a2dp_device_name;
-	boolean				is_bt_opp_exist;
+	boolean		bt_disabled;
+	boolean		bt_link_exist;
+	boolean		sco_exist;
+	boolean		a2dp_exist;
+	boolean		hid_exist;
+	boolean		pan_exist;
+
+	boolean		under_lps;
+	boolean		under_ips;
+	u8		connect_ap_period_cnt;
+	u8		pnp_awake_period_cnt;
+	u32		high_priority_tx;
+	u32		high_priority_rx;
+	u32		low_priority_tx;
+	u32		low_priority_rx;
+	boolean         is_hipri_rx_overhead;
+	u8		bt_rssi;
+	boolean		bt_tx_rx_mask;
+	u8		pre_bt_rssi_state;
+	u8		pre_wifi_rssi_state[4];
+	u8		bt_info_c2h[BT_INFO_SRC_8723D_2ANT_MAX][10];
+	u32		bt_info_c2h_cnt[BT_INFO_SRC_8723D_2ANT_MAX];
+	boolean		bt_whck_test;
+	boolean		c2h_bt_inquiry_page;
+	boolean		c2h_bt_remote_name_req;
+	u8		bt_retry_cnt;
+	u8		bt_info_ext;
+	u8		bt_info_ext2;
+	u32		pop_event_cnt;
+	u8		scan_ap_num;
+
+	u32		crc_ok_cck;
+	u32		crc_ok_11g;
+	u32		crc_ok_11n;
+	u32		crc_ok_11n_vht;
+
+	u32		crc_err_cck;
+	u32		crc_err_11g;
+	u32		crc_err_11n;
+	u32		crc_err_11n_vht;
+
+	u32		acc_crc_ratio;
+	u32		now_crc_ratio;
+	u32		cnt_crcok_max_in_10s;
+
+	boolean		cck_lock;
+	boolean		cck_lock_ever;
+	boolean		cck_lock_warn;
+
+	u8		coex_table_type;
+	boolean		force_lps_ctrl;
+
+	u8		dis_ver_info_cnt;
+
+	u8		a2dp_bit_pool;
+	u8		kt_ver;
+
+	boolean		concurrent_rx_mode_on;
+
+	u16		score_board;
+	u8		isolation_btween_wb;   /* 0~ 50 */
+	u8		wifi_coex_thres;
+	u8		bt_coex_thres;
+	u8		wifi_coex_thres2;
+	u8		bt_coex_thres2;
+
+	u8		num_of_profile;
+	boolean		acl_busy;
+	boolean		bt_create_connection;
+	boolean		wifi_is_high_pri_task;
+	u32		specific_pkt_period_cnt;
+	u32		bt_coex_supported_feature;
+	u32		bt_coex_supported_version;
+
+	u8		bt_ble_scan_type;
+	u32		bt_ble_scan_para[3];
+
+	boolean		run_time_state;
+	boolean		freeze_coexrun_by_btinfo;
+
+	boolean		is_A2DP_3M;
+	boolean		voice_over_HOGP;
+	u8		bt_info;
+	u8		forbidden_slot;
+	u8		hid_busy_num;
+	u8		hid_pair_cnt;
+
+	u32		cnt_remotenamereq;
+	u32		cnt_setuplink;
+	u32		cnt_reinit;
+	u32		cnt_ignwlanact;
+	u32		cnt_page;
+	u32		cnt_roleswitch;
+
+	u16		bt_reg_vendor_ac;
+	u16		bt_reg_vendor_ae;
+
+	boolean		is_setup_link;
+	boolean		wl_noisy_level;
+	u32		gnt_error_cnt;
+
+	u8		bt_afh_map[10];
+	u8		bt_relink_downcount;
+	boolean		is_tdma_btautoslot;
+	boolean		is_tdma_btautoslot_hang;
+
+	boolean		is_esco_mode;
+
+	boolean		is_rf_state_off;
+
+	boolean		is_hid_low_pri_tx_overhead;
+	boolean		is_bt_multi_link;
+	boolean		is_bt_a2dp_sink;
+
+	u8		wl_fw_dbg_info[10];
+	u8		wl_rx_rate;
+	u8		wl_rts_rx_rate;
+
+	u16		score_board_WB;
+	boolean		is_2g_freerun;
+
+	boolean		is_hid_rcu;
+	boolean		is_ble_scan_en;
+
+	u16		legacy_forbidden_slot;
+	u16		le_forbidden_slot;
+	u8		bt_a2dp_vendor_id;
+	u32		bt_a2dp_device_name;
+	boolean		is_bt_opp_exist;
+	boolean		is_no_wl_5ms_extend;
+
+	u16		wl_0x42a_backup;
+	u32		wl_0x430_backup;
+	u32		wl_0x434_backup;
+	u8		wl_0x456_backup;
+
+	boolean		wl_tx_limit_en;
+	boolean		wl_ampdu_limit_en;
+	boolean		wl_rxagg_limit_en;
+	u8		wl_rxagg_size;
 };
 
-#define BT_8723D_2ANT_ANTDET_PSD_POINTS			256	/* MAX:1024 */
+#define BT_8723D_2ANT_ANTDET_PSD_POINTS		256	/* MAX:1024 */
 #define BT_8723D_2ANT_ANTDET_PSD_AVGNUM		1	/* MAX:3 */
-#define BT_8723D_2ANT_ANTDET_BUF_LEN			16
+#define BT_8723D_2ANT_ANTDET_BUF_LEN		16
 
 struct psdscan_sta_8723d_2ant {
 
-	u32			ant_det_bt_le_channel;  /* BT LE Channel ex:2412 */
-	u32			ant_det_bt_tx_time;
-	u32			ant_det_pre_psdscan_peak_val;
-	boolean			ant_det_is_ant_det_available;
-	u32			ant_det_psd_scan_peak_val;
-	boolean			ant_det_is_btreply_available;
-	u32			ant_det_psd_scan_peak_freq;
-
-	u8			ant_det_result;
-	u8			ant_det_peak_val[BT_8723D_2ANT_ANTDET_BUF_LEN];
-	u8			ant_det_peak_freq[BT_8723D_2ANT_ANTDET_BUF_LEN];
-	u32			ant_det_try_count;
-	u32			ant_det_fail_count;
-	u32			ant_det_inteval_count;
-	u32			ant_det_thres_offset;
-
-	u32			real_cent_freq;
-	s32			real_offset;
-	u32			real_span;
-
-	u32			psd_band_width;  /* unit: Hz */
-	u32			psd_point;		/* 128/256/512/1024 */
-	u32			psd_report[1024];  /* unit:dB (20logx), 0~255 */
-	u32			psd_report_max_hold[1024];  /* unit:dB (20logx), 0~255 */
-	u32			psd_start_point;
-	u32			psd_stop_point;
-	u32			psd_max_value_point;
-	u32			psd_max_value;
-	u32			psd_max_value2;
-	u32			psd_avg_value;   /* filter loop_max_value that below BT_8723D_1ANT_ANTDET_PSDTHRES_1ANT, and average the rest*/
-	u32			psd_loop_max_value[BT_8723D_2ANT_ANTDET_PSD_SWWEEPCOUNT];  /*max value in each loop */
-	u32			psd_start_base;
-	u32			psd_avg_num;	/* 1/8/16/32 */
-	u32			psd_gen_count;
-	boolean			is_AntDet_running;
-	boolean			is_psd_show_max_only;
+	u32	ant_det_bt_le_channel;  /* BT LE Channel ex:2412 */
+	u32	ant_det_bt_tx_time;
+	u32	ant_det_pre_psdscan_peak_val;
+	boolean	ant_det_is_ant_det_available;
+	u32	ant_det_psd_scan_peak_val;
+	boolean	ant_det_is_btreply_available;
+	u32	ant_det_psd_scan_peak_freq;
+
+	u8	ant_det_result;
+	u8	ant_det_peak_val[BT_8723D_2ANT_ANTDET_BUF_LEN];
+	u8	ant_det_peak_freq[BT_8723D_2ANT_ANTDET_BUF_LEN];
+	u32	ant_det_try_count;
+	u32	ant_det_fail_count;
+	u32	ant_det_inteval_count;
+	u32	ant_det_thres_offset;
+
+	u32	real_cent_freq;
+	s32	real_offset;
+	u32	real_span;
+
+	u32	psd_band_width;
+	u32	psd_point;
+	u32	psd_report[1024];
+	u32	psd_report_max_hold[1024];
+	u32	psd_start_point;
+	u32	psd_stop_point;
+	u32	psd_max_value_point;
+	u32	psd_max_value;
+	u32	psd_max_value2;
+	u32	psd_avg_value;
+	u32	psd_loop_max_value[BT_8723D_2ANT_ANTDET_PSD_SWWEEPCOUNT];
+	u32	psd_start_base;
+	u32	psd_avg_num;	/* 1/8/16/32 */
+	u32	psd_gen_count;
+	boolean	is_antdet_running;
+	boolean	is_psd_show_max_only;
 };
 
 
diff --git a/rtl8723DS/hal/btc/halbtcoutsrc.h b/rtl8723DS/hal/btc/halbtcoutsrc.h
index 0f20967..77ab0eb 100755..100644
--- a/rtl8723DS/hal/btc/halbtcoutsrc.h
+++ b/rtl8723DS/hal/btc/halbtcoutsrc.h
@@ -133,6 +133,9 @@ do {\
 #define		NORMAL_EXEC					FALSE
 #define		FORCE_EXEC						TRUE
 
+#define		NM_EXCU						FALSE
+#define		FC_EXCU						TRUE
+
 #define		BTC_RF_OFF					0x0
 #define		BTC_RF_ON					0x1
 
@@ -214,6 +217,7 @@ typedef enum _BTC_CHIP_TYPE {
 /* following is for command line utility */
 #define	CL_SPRINTF	rsprintf
 #define	CL_PRINTF	DCMD_Printf
+#define CL_STRNCAT(dst, dst_size, src, src_size) rstrncat(dst, src, src_size)
 
 struct btc_board_info {
 	/* The following is some board information */
@@ -234,6 +238,7 @@ struct btc_board_info {
 	boolean			ant_det_result_five_complete;
 	u32				antdetval;
 	u8				customerID;
+	u8				customer_id;
 };
 
 typedef enum _BTC_DBG_OPCODE {
@@ -271,6 +276,7 @@ typedef enum _BTC_WIFI_ROLE {
 typedef enum _BTC_WIRELESS_FREQ {
 	BTC_FREQ_2_4G					= 0x0,
 	BTC_FREQ_5G						= 0x1,
+	BTC_FREQ_25G					= 0x2,
 	BTC_FREQ_MAX
 } BTC_WIRELESS_FREQ, *PBTC_WIRELESS_FREQ;
 
@@ -293,6 +299,7 @@ typedef enum _BTC_WIFI_PNP {
 	BTC_WIFI_PNP_WAKE_UP					= 0x0,
 	BTC_WIFI_PNP_SLEEP						= 0x1,
 	BTC_WIFI_PNP_SLEEP_KEEP_ANT				= 0x2,
+	BTC_WIFI_PNP_WOWLAN					= 0x3,
 	BTC_WIFI_PNP_MAX
 } BTC_WIFI_PNP, *PBTC_WIFI_PNP;
 
@@ -353,6 +360,7 @@ typedef enum _BTC_GET_TYPE {
 	BTC_GET_BL_WIFI_FW_READY,
 	BTC_GET_BL_WIFI_CONNECTED,
 	BTC_GET_BL_WIFI_DUAL_BAND_CONNECTED,
+	BTC_GET_BL_WIFI_LINK_INFO,
 	BTC_GET_BL_WIFI_BUSY,
 	BTC_GET_BL_WIFI_SCAN,
 	BTC_GET_BL_WIFI_LINK,
@@ -366,6 +374,7 @@ typedef enum _BTC_GET_TYPE {
 	BTC_GET_BL_WIFI_IS_IN_MP_MODE,
 	BTC_GET_BL_IS_ASUS_8723B,
 	BTC_GET_BL_RF4CE_CONNECTED,
+	BTC_GET_BL_WIFI_LW_PWR_STATE,
 
 	/* type s4Byte */
 	BTC_GET_S4_WIFI_RSSI,
@@ -418,6 +427,7 @@ typedef enum _BTC_SET_TYPE {
 	BTC_SET_BL_INC_SCAN_DEV_NUM,
 	BTC_SET_BL_BT_TX_RX_MASK,
 	BTC_SET_BL_MIRACAST_PLUS_BT,
+	BTC_SET_BL_BT_LNA_CONSTRAIN_LEVEL,
 
 	/* type u1Byte */
 	BTC_SET_U1_RSSI_ADJ_VAL_FOR_AGC_TABLE_ON,
@@ -427,6 +437,9 @@ typedef enum _BTC_SET_TYPE {
 	BTC_SET_ACT_GET_BT_RSSI,
 	BTC_SET_ACT_AGGREGATE_CTRL,
 	BTC_SET_ACT_ANTPOSREGRISTRY_CTRL,
+
+	// for mimo ps mode setting
+	BTC_SET_MIMO_PS_MODE,
 	/*===== for 1Ant ======*/
 	/* type BOOLEAN */
 
@@ -472,6 +485,7 @@ typedef enum _BTC_NOTIFY_TYPE_SCAN {
 	BTC_SCAN_FINISH							= 0x0,
 	BTC_SCAN_START							= 0x1,
 	BTC_SCAN_START_2G						= 0x2,
+	BTC_SCAN_START_5G						= 0x3,
 	BTC_SCAN_MAX
 } BTC_NOTIFY_TYPE_SCAN, *PBTC_NOTIFY_TYPE_SCAN;
 typedef enum _BTC_NOTIFY_TYPE_SWITCHBAND {
@@ -491,6 +505,7 @@ typedef enum _BTC_NOTIFY_TYPE_ASSOCIATE {
 typedef enum _BTC_NOTIFY_TYPE_MEDIA_STATUS {
 	BTC_MEDIA_DISCONNECT					= 0x0,
 	BTC_MEDIA_CONNECT						= 0x1,
+	BTC_MEDIA_CONNECT_5G					= 0x02,
 	BTC_MEDIA_MAX
 } BTC_NOTIFY_TYPE_MEDIA_STATUS, *PBTC_NOTIFY_TYPE_MEDIA_STATUS;
 typedef enum _BTC_NOTIFY_TYPE_SPECIFIC_PACKET {
@@ -519,6 +534,8 @@ typedef enum _BTC_BT_OFFON {
 	BTC_BT_ON				= 0x1,
 } BTC_BTOFFON, *PBTC_BT_OFFON;
 
+#define BTC_5G_BAND 0x80
+
 /*==================================================
 For following block is for coex offload
 ==================================================*/
@@ -628,6 +645,49 @@ typedef struct _BTC_OFFLOAD {
 extern BTC_OFFLOAD				gl_coex_offload;
 /*==================================================*/
 
+/* BTC_LINK_MODE same as WIFI_LINK_MODE */
+typedef enum _BTC_LINK_MODE{
+	BTC_LINK_NONE=0,
+	BTC_LINK_ONLY_GO,
+	BTC_LINK_ONLY_GC,
+	BTC_LINK_ONLY_STA,
+	BTC_LINK_ONLY_AP,
+	BTC_LINK_2G_MCC_GO_STA,
+	BTC_LINK_5G_MCC_GO_STA,
+	BTC_LINK_25G_MCC_GO_STA,
+	BTC_LINK_2G_MCC_GC_STA,
+	BTC_LINK_5G_MCC_GC_STA,
+	BTC_LINK_25G_MCC_GC_STA,
+	BTC_LINK_2G_SCC_GO_STA,
+	BTC_LINK_5G_SCC_GO_STA,
+	BTC_LINK_2G_SCC_GC_STA,
+	BTC_LINK_5G_SCC_GC_STA,
+	BTC_LINK_MAX=30
+}BTC_LINK_MODE, *PBTC_LINK_MODE;
+
+
+struct btc_wifi_link_info {
+	BTC_LINK_MODE link_mode; /* LinkMode */
+	u1Byte sta_center_channel; /* StaCenterChannel */
+	u1Byte p2p_center_channel; /* P2PCenterChannel	*/
+	BOOLEAN bany_client_join_go;
+	BOOLEAN benable_noa;
+	BOOLEAN bhotspot;
+};
+
+typedef enum _BTC_MULTI_PORT_TDMA_MODE {
+	BTC_MULTI_PORT_TDMA_MODE_NONE=0,
+	BTC_MULTI_PORT_TDMA_MODE_2G_SCC_GO,
+	BTC_MULTI_PORT_TDMA_MODE_2G_P2P_GO,
+	BTC_MULTI_PORT_TDMA_MODE_2G_HOTSPOT_GO
+} BTC_MULTI_PORT_TDMA_MODE, *PBTC_MULTI_PORT_TDMA_MODE;
+
+typedef struct btc_multi_port_tdma_info {
+	BTC_MULTI_PORT_TDMA_MODE btc_multi_port_tdma_mode;
+	u1Byte start_time_from_bcn;
+	u1Byte bt_time;
+} BTC_MULTI_PORT_TDMA_INFO, *PBTC_MULTI_PORT_TDMA_INFO;
+
 typedef u1Byte
 (*BFP_BTC_R1)(
 	IN	PVOID			pBtcContext,
@@ -779,6 +839,14 @@ typedef u4Byte
 	IN	PVOID			pBtcContext
 	);
 
+typedef u4Byte
+(*BFP_BTC_SET_ATOMIC) 	(
+	IN	PVOID			pBtcContext,
+	IN	pu4Byte 		target,
+	IN	u4Byte			val
+	);
+
+
 typedef VOID
 (*BTC_PHYDM_MODIFY_RA_PCR_THRESHLOD)(
 	IN	PVOID		pDM_Odm,
@@ -909,6 +977,8 @@ struct btc_statistics {
 	u32					cnt_stack_operation_notify;
 	u32					cnt_dbg_ctrl;
 	u32					cnt_rate_id_notify;
+	u32					cnt_halt_notify;
+	u32					cnt_pnp_notify;
 };
 
 struct btc_coexist {
@@ -918,6 +988,7 @@ struct btc_coexist {
 	struct  btc_bt_info			bt_info;		/*some bt info referenced by non-bt module*/
 	struct  btc_stack_info		stack_info;
 	struct  btc_bt_link_info		bt_link_info;
+	struct btc_wifi_link_info	wifi_link_info;
 
 #ifdef CONFIG_RF4CE_COEXIST
 	struct  btc_rf4ce_info		rf4ce_info;
@@ -932,6 +1003,8 @@ struct btc_coexist {
 	pu1Byte					cli_buf;
 	struct btc_statistics		statistics;
 	u1Byte				pwrModeVal[10];
+	BOOLEAN dbg_mode;
+	BOOLEAN auto_report;
 
 	/* function pointers */
 	/* io related */
@@ -969,13 +1042,67 @@ struct btc_coexist {
 	BFP_BTC_GET_BT_COEX_SUPPORTED_FEATURE btc_get_bt_coex_supported_feature;
 	BFP_BTC_GET_BT_COEX_SUPPORTED_VERSION btc_get_bt_coex_supported_version;
 	BFP_BTC_GET_PHYDM_VERSION		btc_get_bt_phydm_version;
+	BFP_BTC_SET_ATOMIC			btc_set_atomic;
 	BTC_PHYDM_MODIFY_RA_PCR_THRESHLOD	btc_phydm_modify_RA_PCR_threshold;
 	BTC_PHYDM_CMNINFOQUERY				btc_phydm_query_PHY_counter;
-	BTC_PHYDM_MODIFY_ANTDIV_HWSW		btc_phydm_modify_ANTDIV_HwSw;
+	BTC_PHYDM_MODIFY_ANTDIV_HWSW		btc_phydm_modify_antdiv_hwsw;
 	BFP_BTC_GET_ANT_DET_VAL_FROM_BT		btc_get_ant_det_val_from_bt;
 	BFP_BTC_GET_BLE_SCAN_TYPE_FROM_BT	btc_get_ble_scan_type_from_bt;
 	BFP_BTC_GET_BLE_SCAN_PARA_FROM_BT	btc_get_ble_scan_para_from_bt;
 	BFP_BTC_GET_BT_AFH_MAP_FROM_BT		btc_get_bt_afh_map_from_bt;
+
+	union {
+		#ifdef CONFIG_RTL8822B
+		struct coex_dm_8822b_1ant	coex_dm_8822b_1ant;
+		struct coex_dm_8822b_2ant	coex_dm_8822b_2ant;
+		#endif /* 8822B */
+		#ifdef CONFIG_RTL8821C
+		struct coex_dm_8821c_1ant	coex_dm_8821c_1ant;
+		struct coex_dm_8821c_2ant	coex_dm_8821c_2ant;
+		#endif /* 8821C */
+        #ifdef CONFIG_RTL8723D
+        struct coex_dm_8723d_1ant   coex_dm_8723d_1ant;
+        struct coex_dm_8723d_2ant   coex_dm_8723d_2ant;
+        #endif /* 8723D */
+	};
+
+	union {
+		#ifdef CONFIG_RTL8822B
+		struct coex_sta_8822b_1ant	coex_sta_8822b_1ant;
+		struct coex_sta_8822b_2ant	coex_sta_8822b_2ant;
+		#endif /* 8822B */
+		#ifdef CONFIG_RTL8821C
+		struct coex_sta_8821c_1ant	coex_sta_8821c_1ant;
+		struct coex_sta_8821c_2ant	coex_sta_8821c_2ant;
+		#endif /* 8821C */
+        #ifdef CONFIG_RTL8723D
+        struct coex_sta_8723d_1ant  coex_sta_8723d_1ant;
+        struct coex_sta_8723d_2ant  coex_sta_8723d_2ant;
+        #endif /* 8723D */
+	};
+
+	union {
+		#ifdef CONFIG_RTL8822B
+		struct rfe_type_8822b_1ant	rfe_type_8822b_1ant;
+		struct rfe_type_8822b_2ant	rfe_type_8822b_2ant;
+		#endif /* 8822B */
+		#ifdef CONFIG_RTL8821C
+		struct rfe_type_8821c_1ant	rfe_type_8821c_1ant;
+		struct rfe_type_8821c_2ant	rfe_type_8821c_2ant;
+		#endif /* 8821C */
+	};
+
+	union {
+		#ifdef CONFIG_RTL8822B
+		struct wifi_link_info_8822b_1ant	wifi_link_info_8822b_1ant;
+		struct wifi_link_info_8822b_2ant	wifi_link_info_8822b_2ant;
+		#endif /* 8822B */
+		#ifdef CONFIG_RTL8821C
+		struct wifi_link_info_8821c_1ant	wifi_link_info_8821c_1ant;
+		struct wifi_link_info_8821c_2ant	wifi_link_info_8821c_2ant;
+		#endif /* 8821C */
+	};
+
 };
 typedef struct btc_coexist *PBTC_COEXIST;
 
diff --git a/rtl8723DS/hal/btc/mp_precomp.h b/rtl8723DS/hal/btc/mp_precomp.h
index 2c333c2..35f5a9c 100755..100644
--- a/rtl8723DS/hal/btc/mp_precomp.h
+++ b/rtl8723DS/hal/btc/mp_precomp.h
@@ -22,6 +22,7 @@
 
 #ifdef PLATFORM_LINUX
 #define rsprintf snprintf
+#define rstrncat(dst, src, src_size) strncat(dst, src, src_size)
 #elif defined(PLATFORM_WINDOWS)
 #define rsprintf sprintf_s
 #endif
@@ -59,12 +60,14 @@ extern u4Byte GLBtcDbgType[];
 #define HS_SUPPORT		0
 #endif
 
-#include "halbtcoutsrc.h"
-
 /* for wifi only mode */
 #include "hal_btcoex_wifionly.h"
 
 #ifdef CONFIG_BT_COEXIST
+#define BTC_BTINFO_LENGTH_MAX 10
+
+struct wifi_only_cfg;
+struct btc_coexist;
 
 #ifdef CONFIG_RTL8192E
 #include "halbtc8192e1ant.h"
@@ -108,6 +111,8 @@ extern u4Byte GLBtcDbgType[];
 #include "halbtc8821c2ant.h"
 #endif
 
+#include "halbtcoutsrc.h"
+
 #else /* CONFIG_BT_COEXIST */
 
 #ifdef CONFIG_RTL8723B
diff --git a/rtl8723DS/hal/efuse/efuse_mask.h b/rtl8723DS/hal/efuse/efuse_mask.h
index 8270569..f6059e4 100755..100644
--- a/rtl8723DS/hal/efuse/efuse_mask.h
+++ b/rtl8723DS/hal/efuse/efuse_mask.h
@@ -13,7 +13,7 @@
  *
  *****************************************************************************/
 
-#if DEV_BUS_TYPE == RT_USB_INTERFACE
+#ifdef CONFIG_USB_HCI
 
 	#if defined(CONFIG_RTL8188E)
 		#include "rtl8188e/HalEfuseMask8188E_USB.h"
@@ -51,6 +51,10 @@
 		#include "rtl8188f/HalEfuseMask8188F_USB.h"
 	#endif
 
+	#if defined(CONFIG_RTL8188GTV)
+		#include "rtl8188gtv/HalEfuseMask8188GTV_USB.h"
+	#endif
+
 	#if defined(CONFIG_RTL8822B)
 		#include "rtl8822b/HalEfuseMask8822B_USB.h"
 	#endif
@@ -58,8 +62,17 @@
 	#if defined(CONFIG_RTL8821C)
 		#include "rtl8821c/HalEfuseMask8821C_USB.h"
 	#endif
+	
+	#if defined(CONFIG_RTL8710B)
+		#include "rtl8710b/HalEfuseMask8710B_USB.h"
+	#endif
+	
+	#if defined(CONFIG_RTL8192F)
+		#include "rtl8192f/HalEfuseMask8192F_USB.h"
+	#endif
+#endif /*CONFIG_USB_HCI*/
 
-#elif DEV_BUS_TYPE == RT_PCI_INTERFACE
+#ifdef CONFIG_PCI_HCI
 
 	#if defined(CONFIG_RTL8188E)
 		#include "rtl8188e/HalEfuseMask8188E_PCIE.h"
@@ -99,7 +112,11 @@
 		#include "rtl8821c/HalEfuseMask8821C_PCIE.h"
 	#endif
 
-#elif DEV_BUS_TYPE == RT_SDIO_INTERFACE
+	#if defined(CONFIG_RTL8192F)
+		#include "rtl8192f/HalEfuseMask8192F_PCIE.h"
+	#endif
+#endif /*CONFIG_PCI_HCI*/
+#ifdef CONFIG_SDIO_HCI
 	#if defined(CONFIG_RTL8723B)
 		#include "rtl8723b/HalEfuseMask8723B_SDIO.h"
 	#endif
@@ -116,6 +133,10 @@
 		#include "rtl8188f/HalEfuseMask8188F_SDIO.h"
 	#endif
 
+	#if defined(CONFIG_RTL8188GTV)
+		#include "rtl8188gtv/HalEfuseMask8188GTV_SDIO.h"
+	#endif
+
 	#if defined(CONFIG_RTL8723D)
 		#include "rtl8723d/HalEfuseMask8723D_SDIO.h"
 	#endif
@@ -135,4 +156,9 @@
 	#if defined(CONFIG_RTL8822B)
 		#include "rtl8822b/HalEfuseMask8822B_SDIO.h"
 	#endif
-#endif
+
+	#if defined(CONFIG_RTL8192F)
+		#include "rtl8192f/HalEfuseMask8192F_SDIO.h"
+	#endif
+
+#endif /*CONFIG_SDIO_HCI*/
diff --git a/rtl8723DS/hal/efuse/rtl8723d/HalEfuseMask8723D_PCIE.c b/rtl8723DS/hal/efuse/rtl8723d/HalEfuseMask8723D_PCIE.c
index 0ad1d6c..0ad1d6c 100755..100644
--- a/rtl8723DS/hal/efuse/rtl8723d/HalEfuseMask8723D_PCIE.c
+++ b/rtl8723DS/hal/efuse/rtl8723d/HalEfuseMask8723D_PCIE.c
diff --git a/rtl8723DS/hal/efuse/rtl8723d/HalEfuseMask8723D_PCIE.h b/rtl8723DS/hal/efuse/rtl8723d/HalEfuseMask8723D_PCIE.h
index 8f97872..8f97872 100755..100644
--- a/rtl8723DS/hal/efuse/rtl8723d/HalEfuseMask8723D_PCIE.h
+++ b/rtl8723DS/hal/efuse/rtl8723d/HalEfuseMask8723D_PCIE.h
diff --git a/rtl8723DS/hal/efuse/rtl8723d/HalEfuseMask8723D_SDIO.c b/rtl8723DS/hal/efuse/rtl8723d/HalEfuseMask8723D_SDIO.c
index bc40b1c..bc40b1c 100755..100644
--- a/rtl8723DS/hal/efuse/rtl8723d/HalEfuseMask8723D_SDIO.c
+++ b/rtl8723DS/hal/efuse/rtl8723d/HalEfuseMask8723D_SDIO.c
diff --git a/rtl8723DS/hal/efuse/rtl8723d/HalEfuseMask8723D_SDIO.h b/rtl8723DS/hal/efuse/rtl8723d/HalEfuseMask8723D_SDIO.h
index d4b8187..d4b8187 100755..100644
--- a/rtl8723DS/hal/efuse/rtl8723d/HalEfuseMask8723D_SDIO.h
+++ b/rtl8723DS/hal/efuse/rtl8723d/HalEfuseMask8723D_SDIO.h
diff --git a/rtl8723DS/hal/efuse/rtl8723d/HalEfuseMask8723D_USB.c b/rtl8723DS/hal/efuse/rtl8723d/HalEfuseMask8723D_USB.c
index a461d63..a461d63 100755..100644
--- a/rtl8723DS/hal/efuse/rtl8723d/HalEfuseMask8723D_USB.c
+++ b/rtl8723DS/hal/efuse/rtl8723d/HalEfuseMask8723D_USB.c
diff --git a/rtl8723DS/hal/efuse/rtl8723d/HalEfuseMask8723D_USB.h b/rtl8723DS/hal/efuse/rtl8723d/HalEfuseMask8723D_USB.h
index 61cf1f3..61cf1f3 100755..100644
--- a/rtl8723DS/hal/efuse/rtl8723d/HalEfuseMask8723D_USB.h
+++ b/rtl8723DS/hal/efuse/rtl8723d/HalEfuseMask8723D_USB.h
diff --git a/rtl8723DS/hal/hal_btcoex.c b/rtl8723DS/hal/hal_btcoex.c
index 4656f7d..39bb165 100755..100644
--- a/rtl8723DS/hal/hal_btcoex.c
+++ b/rtl8723DS/hal/hal_btcoex.c
@@ -71,13 +71,14 @@ const char *const GLBtcWifiBwString[] = {
 	"11bg",
 	"HT20",
 	"HT40",
-	"HT80",
-	"HT160"
+	"VHT80",
+	"VHT160"
 };
 
 const char *const GLBtcWifiFreqString[] = {
 	"2.4G",
-	"5G"
+	"5G",
+	"2.4G+5G"
 };
 
 const char *const GLBtcIotPeerString[] = {
@@ -174,10 +175,11 @@ typedef enum _bt_op_code {
 	BT_OP_GET_BT_COEX_SUPPORTED_FEATURE		= 0x2a,
 	BT_OP_GET_BT_COEX_SUPPORTED_VERSION		= 0x2b,
 	BT_OP_GET_BT_ANT_DET_VAL				= 0x2c,
-	BT_OP_GET_BT_BLE_SCAN_PARA				= 0x2d,
-	BT_OP_GET_BT_BLE_SCAN_TYPE				= 0x2e,
+	BT_OP_GET_BT_BLE_SCAN_TYPE				= 0x2d,
+	BT_OP_GET_BT_BLE_SCAN_PARA				= 0x2e,
 	BT_OP_GET_BT_DEVICE_INFO				= 0x30,
 	BT_OP_GET_BT_FORBIDDEN_SLOT_VAL			= 0x31,
+	BT_OP_SET_BT_LANCONSTRAIN_LEVEL			= 0x32,
 	BT_OP_MAX
 } BT_OP_CODE;
 
@@ -614,6 +616,112 @@ u32 halbtcoutsrc_GetWifiLinkStatus(PBTC_COEXIST pBtCoexist)
 	return retVal;
 }
 
+struct btc_wifi_link_info halbtcoutsrc_getwifilinkinfo(PBTC_COEXIST pBtCoexist)
+{
+	u8 n_assoc_iface = 0, i =0, mcc_en = _FALSE;
+	PADAPTER adapter = NULL;
+	PADAPTER iface = NULL;
+	PADAPTER sta_iface = NULL, p2p_iface = NULL, ap_iface = NULL;
+	BTC_LINK_MODE btc_link_moe = BTC_LINK_MAX;
+	struct dvobj_priv *dvobj = NULL;
+	struct mlme_ext_priv *mlmeext = NULL;
+	struct btc_wifi_link_info wifi_link_info;
+
+	adapter = (PADAPTER)pBtCoexist->Adapter;
+	dvobj = adapter_to_dvobj(adapter);
+	n_assoc_iface = rtw_mi_get_assoc_if_num(adapter);
+
+	/* init value */
+	wifi_link_info.link_mode = BTC_LINK_NONE;
+	wifi_link_info.sta_center_channel = 0;
+	wifi_link_info.p2p_center_channel = 0;
+	wifi_link_info.bany_client_join_go = _FALSE;
+	wifi_link_info.benable_noa = _FALSE;
+	wifi_link_info.bhotspot = _FALSE;
+
+	for (i = 0; i < dvobj->iface_nums; i++) {
+		iface = dvobj->padapters[i];
+		if (!iface)
+			continue;
+		
+		mlmeext = &iface->mlmeextpriv;
+		if (MLME_IS_GO(iface)) {
+			wifi_link_info.link_mode = BTC_LINK_ONLY_GO;
+			wifi_link_info.p2p_center_channel =
+				rtw_get_center_ch(mlmeext->cur_channel, mlmeext->cur_bwmode, mlmeext->cur_ch_offset);
+			p2p_iface	 = iface;
+			if (rtw_linked_check(iface))
+				wifi_link_info.bany_client_join_go = _TRUE;
+		} else if (MLME_IS_GC(iface)) {
+			wifi_link_info.link_mode = BTC_LINK_ONLY_GC;
+			wifi_link_info.p2p_center_channel =
+				rtw_get_center_ch(mlmeext->cur_channel, mlmeext->cur_bwmode, mlmeext->cur_ch_offset);
+			p2p_iface = iface;
+		} else if (MLME_IS_AP(iface)) {
+			wifi_link_info.link_mode = BTC_LINK_ONLY_AP;
+			ap_iface = iface;
+			wifi_link_info.p2p_center_channel =
+				rtw_get_center_ch(mlmeext->cur_channel, mlmeext->cur_bwmode, mlmeext->cur_ch_offset);
+		} else if (MLME_IS_STA(iface) && rtw_linked_check(iface)) {
+			wifi_link_info.link_mode = BTC_LINK_ONLY_STA;
+			wifi_link_info.sta_center_channel =
+				rtw_get_center_ch(mlmeext->cur_channel, mlmeext->cur_bwmode, mlmeext->cur_ch_offset);
+			sta_iface = iface;
+		}
+	}
+
+#ifdef CONFIG_MCC_MODE
+	if (MCC_EN(adapter)) {
+		if (rtw_hal_check_mcc_status(adapter, MCC_STATUS_DOING_MCC))
+			mcc_en = _TRUE;
+	}
+#endif/* CONFIG_MCC_MODE */
+
+	if (n_assoc_iface == 0) {
+		wifi_link_info.link_mode = BTC_LINK_NONE;
+	} else if (n_assoc_iface == 1) {
+		/* by pass */
+	} else if (n_assoc_iface == 2) {	
+		if (sta_iface && p2p_iface) {
+			u8 band_sta = sta_iface->mlmeextpriv.cur_channel > 14 ? BAND_ON_5G : BAND_ON_2_4G;
+			u8 band_p2p = p2p_iface->mlmeextpriv.cur_channel > 14 ? BAND_ON_5G : BAND_ON_2_4G;
+			if (band_sta == band_p2p) {
+				switch (band_sta) {
+				case BAND_ON_2_4G:
+					if (MLME_IS_GO(p2p_iface))
+						wifi_link_info.link_mode =
+							mcc_en == _TRUE ?  BTC_LINK_2G_MCC_GO_STA : BTC_LINK_2G_SCC_GO_STA;
+					else if (MLME_IS_GC(p2p_iface))
+						wifi_link_info.link_mode =
+							mcc_en == _TRUE ?  BTC_LINK_2G_MCC_GC_STA : BTC_LINK_2G_SCC_GC_STA;
+					break;
+				case BAND_ON_5G:
+					if (MLME_IS_GO(p2p_iface))
+						wifi_link_info.link_mode =
+							mcc_en == _TRUE ?  BTC_LINK_5G_MCC_GO_STA : BTC_LINK_5G_SCC_GO_STA;
+					else if (MLME_IS_GC(p2p_iface))
+						wifi_link_info.link_mode =
+							mcc_en == _TRUE ?  BTC_LINK_5G_MCC_GC_STA : BTC_LINK_5G_SCC_GC_STA;
+					break;
+				default:
+					break;
+				}
+			} else {
+				if (MLME_IS_GO(p2p_iface))
+					wifi_link_info.link_mode = BTC_LINK_25G_MCC_GO_STA;
+				else if (MLME_IS_GC(p2p_iface))
+					wifi_link_info.link_mode = BTC_LINK_25G_MCC_GC_STA;
+			}
+		}
+	} else {
+		if (pBtCoexist->board_info.btdm_ant_num == 1)
+			RTW_ERR("%s do not support n_assoc_iface > 2 (ant_num == 1)", __func__);
+	}
+
+	return wifi_link_info;
+}
+
+
 static void _btmpoper_timer_hdl(void *p)
 {
 	if (GLBtcBtMpRptWait == _TRUE) {
@@ -899,6 +1007,7 @@ u8 halbtcoutsrc_Get(void *pBtcContext, u8 getType, void *pOutBuf)
 	PADAPTER padapter;
 	PHAL_DATA_TYPE pHalData;
 	struct mlme_ext_priv *mlmeext;
+	struct btc_wifi_link_info *wifi_link_info;
 	u8 bSoftApExist, bVwifiExist;
 	u8 *pu8;
 	s32 *pS4Tmp;
@@ -922,6 +1031,7 @@ u8 halbtcoutsrc_Get(void *pBtcContext, u8 getType, void *pOutBuf)
 	pU4Tmp = (u32 *)pOutBuf;
 	pU1Tmp = (u8 *)pOutBuf;
 	pU2Tmp = (u16*)pOutBuf;
+	wifi_link_info = (struct btc_wifi_link_info *)pOutBuf;
 	ret = _TRUE;
 
 	switch (getType) {
@@ -1018,6 +1128,11 @@ u8 halbtcoutsrc_Get(void *pBtcContext, u8 getType, void *pOutBuf)
 #endif
 		break;
 
+	case BTC_GET_BL_WIFI_LW_PWR_STATE:
+		/* return false due to coex do not run during 32K */
+		*pu8 = FALSE;
+		break;
+
 	case BTC_GET_S4_WIFI_RSSI:
 		*pS4Tmp = halbtcoutsrc_GetWifiRssi(padapter);
 		break;
@@ -1072,7 +1187,9 @@ u8 halbtcoutsrc_Get(void *pBtcContext, u8 getType, void *pOutBuf)
 	case BTC_GET_U4_WIFI_LINK_STATUS:
 		*pU4Tmp = halbtcoutsrc_GetWifiLinkStatus(pBtCoexist);
 		break;
-
+	case BTC_GET_BL_WIFI_LINK_INFO:
+		*wifi_link_info = halbtcoutsrc_getwifilinkinfo(pBtCoexist);
+		break;
 	case BTC_GET_U4_BT_PATCH_VER:
 		*pU4Tmp = halbtcoutsrc_GetBtPatchVer(pBtCoexist);
 		break;
@@ -1188,6 +1305,30 @@ u8 halbtcoutsrc_Get(void *pBtcContext, u8 getType, void *pOutBuf)
 	return ret;
 }
 
+u16 halbtcoutsrc_LnaConstrainLvl(void *pBtcContext, u8 *lna_constrain_level)
+{
+	PBTC_COEXIST pBtCoexist;
+	u16 ret = BT_STATUS_BT_OP_SUCCESS;
+
+	pBtCoexist = (PBTC_COEXIST)pBtcContext;
+
+	if (halbtcoutsrc_IsHwMailboxExist(pBtCoexist) == _TRUE) {
+		_irqL irqL;
+		u8 op_code;
+
+		_enter_critical_mutex(&GLBtcBtMpOperLock, &irqL);
+
+		ret = _btmpoper_cmd(pBtCoexist, BT_OP_SET_BT_LANCONSTRAIN_LEVEL, 0, lna_constrain_level, 1);
+
+		_exit_critical_mutex(&GLBtcBtMpOperLock, &irqL);
+	} else { 
+		ret = BT_STATUS_NOT_IMPLEMENT;
+		RTW_INFO("%s halbtcoutsrc_IsHwMailboxExist(pBtCoexist) == FALSE\n", __func__);
+	}
+
+	return ret;
+}
+
 u8 halbtcoutsrc_Set(void *pBtcContext, u8 setType, void *pInBuf)
 {
 	PBTC_COEXIST pBtCoexist;
@@ -1388,6 +1529,9 @@ u8 halbtcoutsrc_Set(void *pBtcContext, u8 setType, void *pInBuf)
 		ret = _FALSE;
 #endif
 		break;
+	case BTC_SET_BL_BT_LNA_CONSTRAIN_LEVEL:
+		halbtcoutsrc_LnaConstrainLvl(pBtCoexist, pu8);
+		break;
 	/* ===================== */
 	default:
 		ret = _FALSE;
@@ -1640,13 +1784,101 @@ void halbtcoutsrc_DisplayWifiStatus(PBTC_COEXIST pBtCoexist)
 	u8			wifiChnl = 0, wifiP2PChnl = 0, nScanAPNum = 0, FwPSState;
 	u32			iqk_cnt_total = 0, iqk_cnt_ok = 0, iqk_cnt_fail = 0;
 	u16			wifiBcnInterval = 0;
+	PHAL_DATA_TYPE hal = GET_HAL_DATA(padapter);
+	struct btc_wifi_link_info wifi_link_info;
+
+	wifi_link_info = halbtcoutsrc_getwifilinkinfo(pBtCoexist);
+
+	switch (wifi_link_info.link_mode) {
+		case BTC_LINK_NONE:
+			CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s/ %d/ %d/ %d", "WifiLinkMode/HotSpa/Noa/ClientJoin",
+					"None", wifi_link_info.bhotspot, wifi_link_info.benable_noa, wifi_link_info.bany_client_join_go);
+			wifiFreq = hal->current_channel > 14 ?  BTC_FREQ_5G : BTC_FREQ_2_4G;
+			break;
+		case BTC_LINK_ONLY_GO:
+			CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s/ %d/ %d/ %d", "WifiLinkMode/HotSpa/Noa/ClientJoin",
+					"ONLY_GO", wifi_link_info.bhotspot, wifi_link_info.benable_noa, wifi_link_info.bany_client_join_go);
+			wifiFreq = hal->current_channel > 14 ?  BTC_FREQ_5G : BTC_FREQ_2_4G;
+			break;
+		case BTC_LINK_ONLY_GC:
+			CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s/ %d/ %d/ %d", "WifiLinkMode/HotSpa/Noa/ClientJoin",
+					"ONLY_GC", wifi_link_info.bhotspot, wifi_link_info.benable_noa, wifi_link_info.bany_client_join_go);
+			wifiFreq = hal->current_channel > 14 ?  BTC_FREQ_5G : BTC_FREQ_2_4G;
+			break;
+		case BTC_LINK_ONLY_STA:
+			CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s/ %d/ %d/ %d", "WifiLinkMode/HotSpa/Noa/ClientJoin",
+					"ONLY_STA", wifi_link_info.bhotspot, wifi_link_info.benable_noa, wifi_link_info.bany_client_join_go);
+			wifiFreq = hal->current_channel > 14 ?  BTC_FREQ_5G : BTC_FREQ_2_4G;
+			break;
+		case BTC_LINK_ONLY_AP:
+			CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s/ %d/ %d/ %d", "WifiLinkMode/HotSpa/Noa/ClientJoin",
+					"ONLY_AP", wifi_link_info.bhotspot, wifi_link_info.benable_noa, wifi_link_info.bany_client_join_go);
+			wifiFreq = hal->current_channel > 14 ?  BTC_FREQ_5G : BTC_FREQ_2_4G;
+			break;
+		case BTC_LINK_2G_MCC_GO_STA:
+			CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s/ %d/ %d/ %d", "WifiLinkMode/HotSpa/Noa/ClientJoin",
+					"24G_MCC_GO_STA", wifi_link_info.bhotspot, wifi_link_info.benable_noa, wifi_link_info.bany_client_join_go);
+			wifiFreq = BTC_FREQ_2_4G;
+			break;
+		case BTC_LINK_5G_MCC_GO_STA:
+			CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s/ %d/ %d/ %d", "WifiLinkMode/HotSpa/Noa/ClientJoin",
+					"5G_MCC_GO_STA", wifi_link_info.bhotspot, wifi_link_info.benable_noa, wifi_link_info.bany_client_join_go);
+			wifiFreq = BTC_FREQ_5G;
+			break;
+		case BTC_LINK_25G_MCC_GO_STA:
+			CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s/ %d/ %d/ %d", "WifiLinkMode/HotSpa/Noa/ClientJoin",
+					"2BANDS_MCC_GO_STA", wifi_link_info.bhotspot, wifi_link_info.benable_noa, wifi_link_info.bany_client_join_go);
+			wifiFreq = BTC_FREQ_25G;
+			break;
+		case BTC_LINK_2G_MCC_GC_STA:
+			CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s/ %d/ %d/ %d", "WifiLinkMode/HotSpa/Noa/ClientJoin",
+					"24G_MCC_GC_STA", wifi_link_info.bhotspot, wifi_link_info.benable_noa, wifi_link_info.bany_client_join_go);
+			wifiFreq = BTC_FREQ_2_4G;
+			break;
+		case BTC_LINK_5G_MCC_GC_STA:
+			CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s/ %d/ %d/ %d", "WifiLinkMode/HotSpa/Noa/ClientJoin",
+					"5G_MCC_GC_STA", wifi_link_info.bhotspot, wifi_link_info.benable_noa, wifi_link_info.bany_client_join_go);
+			wifiFreq = BTC_FREQ_5G;
+			break;
+		case BTC_LINK_25G_MCC_GC_STA:
+			CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s/ %d/ %d/ %d", "WifiLinkMode/HotSpa/Noa/ClientJoin",
+					"2BANDS_MCC_GC_STA", wifi_link_info.bhotspot, wifi_link_info.benable_noa, wifi_link_info.bany_client_join_go);
+			wifiFreq = BTC_FREQ_25G;
+			break;
+		case BTC_LINK_2G_SCC_GO_STA:
+			CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s/ %d/ %d/ %d", "WifiLinkMode/HotSpa/Noa/ClientJoin",
+					"24G_SCC_GO_STA", wifi_link_info.bhotspot, wifi_link_info.benable_noa, wifi_link_info.bany_client_join_go);
+			wifiFreq = BTC_FREQ_2_4G;
+			break;
+		case BTC_LINK_5G_SCC_GO_STA:
+			CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s/ %d/ %d/ %d", "WifiLinkMode/HotSpa/Noa/ClientJoin",
+					"5G_SCC_GO_STA", wifi_link_info.bhotspot, wifi_link_info.benable_noa, wifi_link_info.bany_client_join_go);
+			wifiFreq = BTC_FREQ_5G;
+			break;
+		case BTC_LINK_2G_SCC_GC_STA:
+			CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s/ %d/ %d/ %d", "WifiLinkMode/HotSpa/Noa/ClientJoin",
+					"24G_SCC_GC_STA", wifi_link_info.bhotspot, wifi_link_info.benable_noa, wifi_link_info.bany_client_join_go);
+			wifiFreq = BTC_FREQ_2_4G;
+			break;
+		case BTC_LINK_5G_SCC_GC_STA:
+			CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s/ %d/ %d/ %d", "WifiLinkMode/HotSpa/Noa/ClientJoin",
+					"5G_SCC_GC_STA", wifi_link_info.bhotspot, wifi_link_info.benable_noa, wifi_link_info.bany_client_join_go);
+			wifiFreq = BTC_FREQ_5G;
+			break;
+		default:
+			CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s/ %d/ %d/ %d", "WifiLinkMode/HotSpa/Noa/ClientJoin",
+					"UNKNOWN", wifi_link_info.bhotspot, wifi_link_info.benable_noa, wifi_link_info.bany_client_join_go);
+			wifiFreq = hal->current_channel > 14 ?  BTC_FREQ_5G : BTC_FREQ_2_4G;
+			break;
+	}
+
+	CL_PRINTF(cliBuf);
 
 	wifiLinkStatus = halbtcoutsrc_GetWifiLinkStatus(pBtCoexist);
-	CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d/ %d/ %d/ %d (mcc+2band = %d)", "STA/vWifi/HS/p2pGo/p2pGc",
+	CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d/ %d/ %d/ %d", "STA/vWifi/HS/p2pGo/p2pGc",
 		((wifiLinkStatus & WIFI_STA_CONNECTED) ? 1 : 0), ((wifiLinkStatus & WIFI_AP_CONNECTED) ? 1 : 0),
 		((wifiLinkStatus & WIFI_HS_CONNECTED) ? 1 : 0), ((wifiLinkStatus & WIFI_P2P_GO_CONNECTED) ? 1 : 0),
-		((wifiLinkStatus & WIFI_P2P_GC_CONNECTED) ? 1 : 0),
-		halbtcoutsrc_IsDualBandConnected(padapter) ? 1 : 0);
+		((wifiLinkStatus & WIFI_P2P_GC_CONNECTED) ? 1 : 0));
 	CL_PRINTF(cliBuf);
 
 	pBtCoexist->btc_get(pBtCoexist, BTC_GET_BL_WIFI_SCAN, &bScan);
@@ -1670,16 +1902,14 @@ void halbtcoutsrc_DisplayWifiStatus(PBTC_COEXIST pBtCoexist)
 	}
 
 	pBtCoexist->btc_get(pBtCoexist, BTC_GET_S4_WIFI_RSSI, &wifiRssi);
-	pBtCoexist->btc_get(pBtCoexist, BTC_GET_U1_WIFI_DOT11_CHNL, &wifiChnl);
 	pBtCoexist->btc_get(pBtCoexist, BTC_GET_U2_BEACON_PERIOD, &wifiBcnInterval);
-	if ((wifiLinkStatus & WIFI_P2P_GO_CONNECTED) || (wifiLinkStatus & WIFI_P2P_GC_CONNECTED)) 
-		pBtCoexist->btc_get(pBtCoexist, BTC_GET_U1_WIFI_P2P_CHNL, &wifiP2PChnl);	
+	wifiChnl = wifi_link_info.sta_center_channel;
+	wifiP2PChnl = wifi_link_info.p2p_center_channel;
 
 	CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d dBm/ %d/ %d/ %d", "RSSI/ STA_Chnl/ P2P_Chnl/ BI",
 		wifiRssi-100, wifiChnl, wifiP2PChnl, wifiBcnInterval);
 	CL_PRINTF(cliBuf);
 
-	pBtCoexist->btc_get(pBtCoexist, BTC_GET_BL_WIFI_UNDER_5G, &wifiFreq);
 	pBtCoexist->btc_get(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw);
 	pBtCoexist->btc_get(pBtCoexist, BTC_GET_BL_WIFI_BUSY, &bWifiBusy);
 	pBtCoexist->btc_get(pBtCoexist, BTC_GET_U4_WIFI_TRAFFIC_DIRECTION, &wifiTrafficDir);
@@ -2212,11 +2442,12 @@ u32 halbtcoutsrc_GetBleScanParaFromBt(void *pBtcContext, u8 scanType)
 		u8 op_code;
 		u8 status;
 		
+		buf[0] = scanType;
 
 		_enter_critical_mutex(&GLBtcBtMpOperLock, &irqL);
 
 		op_code = BT_OP_GET_BT_BLE_SCAN_PARA;
-		status = _btmpoper_cmd(pBtCoexist, op_code, 0, buf, 0);
+		status = _btmpoper_cmd(pBtCoexist, op_code, 0, buf, 1);
 		if (status == BT_STATUS_BT_OP_SUCCESS)
 			data = le32_to_cpu(*(u32 *)GLBtcBtMpRptRsp);
 		else
@@ -2320,6 +2551,16 @@ u32 halbtcoutsrc_GetPhydmVersion(void *pBtcContext)
 #ifdef CONFIG_RTL8821C
 	return RELEASE_VERSION_8821C;
 #endif
+
+#ifdef CONFIG_RTL8192F
+	return RELEASE_VERSION_8192F;
+#endif
+}
+
+u32 halbtcoutsrc_SetAtomic (void *btc_ctx, u32 *target, u32 val)
+{
+	*target = val;
+	return _SUCCESS;
 }
 
 void halbtcoutsrc_phydm_modify_AntDiv_HwSw(void *pBtcContext, u8 is_hw)
@@ -2343,7 +2584,7 @@ u32 halbtcoutsrc_phydm_query_PHY_counter(void *pBtcContext, u8 info_type)
 
 /* switch to #if 0 in case the phydm version does not provide the function */
 #if 1
-	return phydm_cmn_info_query((struct PHY_DM_STRUCT *)pBtCoexist->odm_priv, (enum phydm_info_query_e)info_type);
+	return phydm_cmn_info_query((struct dm_struct *)pBtCoexist->odm_priv, (enum phydm_info_query)info_type);
 #else
 	return 0;
 #endif
@@ -2507,6 +2748,7 @@ void EXhalbtcoutsrc_AntInfoSetting(void *padapter)
 	}
 
 	pBtCoexist->board_info.customerID = RT_CID_DEFAULT;
+	pBtCoexist->board_info.customer_id = RT_CID_DEFAULT;
 
 	/* set default antenna position to main  port */
 	pBtCoexist->board_info.btdm_ant_pos = BTC_ANTENNA_AT_MAIN_PORT;
@@ -2576,9 +2818,10 @@ u8 EXhalbtcoutsrc_InitlizeVariables(void *padapter)
 	pBtCoexist->btc_get_ble_scan_para_from_bt = halbtcoutsrc_GetBleScanParaFromBt;
 	pBtCoexist->btc_get_bt_afh_map_from_bt = halbtcoutsrc_GetBtAFHMapFromBt;
 	pBtCoexist->btc_get_bt_phydm_version = halbtcoutsrc_GetPhydmVersion;
+	pBtCoexist->btc_set_atomic= halbtcoutsrc_SetAtomic;
 	pBtCoexist->btc_phydm_modify_RA_PCR_threshold = halbtcoutsrc_phydm_modify_RA_PCR_threshold;
 	pBtCoexist->btc_phydm_query_PHY_counter = halbtcoutsrc_phydm_query_PHY_counter;
-	pBtCoexist->btc_phydm_modify_ANTDIV_HwSw = halbtcoutsrc_phydm_modify_AntDiv_HwSw;
+	pBtCoexist->btc_phydm_modify_antdiv_hwsw = halbtcoutsrc_phydm_modify_AntDiv_HwSw;
 
 	pBtCoexist->cli_buf = &GLBtcDbgBuf[0];
 
@@ -2770,10 +3013,6 @@ void EXhalbtcoutsrc_init_hw_config(PBTC_COEXIST pBtCoexist, u8 bWifiOnly)
 			ex_halbtc8822b1ant_init_hw_config(pBtCoexist, bWifiOnly);
 		else if (pBtCoexist->board_info.btdm_ant_num == 2)
 			ex_halbtc8822b2ant_init_hw_config(pBtCoexist, bWifiOnly);
-		#ifdef CONFIG_FW_MULTI_PORT_SUPPORT
-		rtw_hal_set_default_port_id_cmd(pBtCoexist->Adapter, 0);
-		rtw_hal_set_wifi_port_id_cmd(pBtCoexist->Adapter);
-		#endif
 	}
 #endif
 
@@ -2783,10 +3022,6 @@ void EXhalbtcoutsrc_init_hw_config(PBTC_COEXIST pBtCoexist, u8 bWifiOnly)
 			ex_halbtc8821c2ant_init_hw_config(pBtCoexist, bWifiOnly);
 		else if (pBtCoexist->board_info.btdm_ant_num == 1)
 			ex_halbtc8821c1ant_init_hw_config(pBtCoexist, bWifiOnly);
-		#ifdef CONFIG_FW_MULTI_PORT_SUPPORT
-		rtw_hal_set_default_port_id_cmd(pBtCoexist->Adapter, 0);
-		rtw_hal_set_wifi_port_id_cmd(pBtCoexist->Adapter);
-		#endif
 	}
 #endif
 }
@@ -3265,7 +3500,9 @@ void EXhalbtcoutsrc_connect_notify(PBTC_COEXIST pBtCoexist, u8 assoType)
 
 void EXhalbtcoutsrc_media_status_notify(PBTC_COEXIST pBtCoexist, RT_MEDIA_STATUS mediaStatus)
 {
-	u8 mStatus;
+	u8 mStatus = BTC_MEDIA_MAX;
+	PADAPTER adapter = (PADAPTER)pBtCoexist->Adapter;
+	HAL_DATA_TYPE *hal = GET_HAL_DATA(adapter);
 
 	if (!halbtcoutsrc_IsBtCoexistAvailable(pBtCoexist))
 		return;
@@ -3274,15 +3511,25 @@ void EXhalbtcoutsrc_media_status_notify(PBTC_COEXIST pBtCoexist, RT_MEDIA_STATUS
 	if (pBtCoexist->manual_control)
 		return;
 
-	if (RT_MEDIA_CONNECT == mediaStatus)
-		mStatus = BTC_MEDIA_CONNECT;
-	else
+	if (RT_MEDIA_CONNECT == mediaStatus) {
+		if (hal->current_band_type == BAND_ON_2_4G)
+			mStatus = BTC_MEDIA_CONNECT;
+		else if (hal->current_band_type == BAND_ON_5G)
+			mStatus = BTC_MEDIA_CONNECT_5G;
+		else {
+			mStatus = BTC_MEDIA_CONNECT;
+			RTW_ERR("%s unknow band type\n", __func__);
+		}
+	} else
 		mStatus = BTC_MEDIA_DISCONNECT;
 
 	/* All notify is called in cmd thread, don't need to leave low power again
 	*	halbtcoutsrc_LeaveLowPower(pBtCoexist); */
 	if (IS_HARDWARE_TYPE_8821(pBtCoexist->Adapter)) {
 #ifdef CONFIG_RTL8821A
+		/* compatible for 8821A */
+		if (mStatus == BTC_MEDIA_CONNECT_5G)
+			mStatus = BTC_MEDIA_CONNECT;
 		if (pBtCoexist->board_info.btdm_ant_num == 2)
 			ex_halbtc8821a2ant_media_status_notify(pBtCoexist, mStatus);
 		else if (pBtCoexist->board_info.btdm_ant_num == 1)
@@ -3326,6 +3573,9 @@ void EXhalbtcoutsrc_media_status_notify(PBTC_COEXIST pBtCoexist, RT_MEDIA_STATUS
 
 #ifdef CONFIG_RTL8812A
 	else if (IS_HARDWARE_TYPE_8812(pBtCoexist->Adapter)) {
+		/* compatible for 8812A */
+		if (mStatus == BTC_MEDIA_CONNECT_5G)
+			mStatus = BTC_MEDIA_CONNECT;
 		if (pBtCoexist->board_info.btdm_ant_num == 2)
 			ex_halbtc8812a2ant_media_status_notify(pBtCoexist, mStatus);
 		else if (pBtCoexist->board_info.btdm_ant_num == 1)
@@ -3356,7 +3606,9 @@ void EXhalbtcoutsrc_media_status_notify(PBTC_COEXIST pBtCoexist, RT_MEDIA_STATUS
 
 void EXhalbtcoutsrc_specific_packet_notify(PBTC_COEXIST pBtCoexist, u8 pktType)
 {
-	u8	packetType;
+	u8 packetType;
+	PADAPTER adapter = (PADAPTER)pBtCoexist->Adapter;
+	HAL_DATA_TYPE *hal = GET_HAL_DATA(adapter);
 
 	if (!halbtcoutsrc_IsBtCoexistAvailable(pBtCoexist))
 		return;
@@ -3375,10 +3627,17 @@ void EXhalbtcoutsrc_specific_packet_notify(PBTC_COEXIST pBtCoexist, u8 pktType)
 		return;
 	}
 
+	if (hal->current_band_type == BAND_ON_5G)
+		packetType |=  BTC_5G_BAND;
+
 	/* All notify is called in cmd thread, don't need to leave low power again
 	*	halbtcoutsrc_LeaveLowPower(pBtCoexist); */
 	if (IS_HARDWARE_TYPE_8821(pBtCoexist->Adapter)) {
 #ifdef CONFIG_RTL8821A
+		/* compatible for 8821A */
+		if (hal->current_band_type == BAND_ON_5G)
+			packetType &= ~BTC_5G_BAND;
+
 		if (pBtCoexist->board_info.btdm_ant_num == 2)
 			ex_halbtc8821a2ant_specific_packet_notify(pBtCoexist, packetType);
 		else if (pBtCoexist->board_info.btdm_ant_num == 1)
@@ -3422,6 +3681,10 @@ void EXhalbtcoutsrc_specific_packet_notify(PBTC_COEXIST pBtCoexist, u8 pktType)
 
 #ifdef CONFIG_RTL8812A
 	else if (IS_HARDWARE_TYPE_8812(pBtCoexist->Adapter)) {
+		/* compatible for 8812A */
+		if (hal->current_band_type == BAND_ON_5G)
+			packetType &= ~BTC_5G_BAND;
+		
 		if (pBtCoexist->board_info.btdm_ant_num == 2)
 			ex_halbtc8812a2ant_specific_packet_notify(pBtCoexist, packetType);
 		else if (pBtCoexist->board_info.btdm_ant_num == 1)
@@ -3677,6 +3940,8 @@ void EXhalbtcoutsrc_halt_notify(PBTC_COEXIST pBtCoexist)
 	if (!halbtcoutsrc_IsBtCoexistAvailable(pBtCoexist))
 		return;
 
+	pBtCoexist->statistics.cnt_halt_notify++;
+
 	if (IS_HARDWARE_TYPE_8821(pBtCoexist->Adapter)) {
 #ifdef CONFIG_RTL8821A
 		if (pBtCoexist->board_info.btdm_ant_num == 2)
@@ -3764,6 +4029,8 @@ void EXhalbtcoutsrc_pnp_notify(PBTC_COEXIST pBtCoexist, u8 pnpState)
 	if (!halbtcoutsrc_IsBtCoexistAvailable(pBtCoexist))
 		return;
 
+	pBtCoexist->statistics.cnt_pnp_notify++;
+
 	/*  */
 	/* currently only 1ant we have to do the notification, */
 	/* once pnp is notified to sleep state, we have to leave LPS that we can sleep normally. */
@@ -4264,15 +4531,6 @@ void EXhalbtcoutsrc_DisplayAntDetection(PBTC_COEXIST pBtCoexist)
 #endif
 	}
 
-#ifdef CONFIG_RTL8821C
-	else if (IS_HARDWARE_TYPE_8821C(pBtCoexist->Adapter)) {
-		if (pBtCoexist->board_info.btdm_ant_num == 2)
-			ex_halbtc8821c2ant_display_ant_detection(pBtCoexist);
-		else if (pBtCoexist->board_info.btdm_ant_num == 1)
-			ex_halbtc8821c1ant_display_ant_detection(pBtCoexist);
-	}
-#endif
-
 	halbtcoutsrc_NormalLowPower(pBtCoexist);
 }
 
@@ -4882,7 +5140,7 @@ void hal_btcoex_SuspendNotify(PADAPTER padapter, u8 state)
 	case BTCOEX_SUSPEND_STATE_RESUME:
 #ifdef CONFIG_FW_MULTI_PORT_SUPPORT
 		/* re-download FW after resume, inform WL FW port number */
-		rtw_hal_set_wifi_port_id_cmd(GLBtCoexist.Adapter);
+		rtw_hal_set_wifi_btc_port_id_cmd(GLBtCoexist.Adapter);
 #endif
 		EXhalbtcoutsrc_pnp_notify(&GLBtCoexist, BTC_WIFI_PNP_WAKE_UP);
 		break;
diff --git a/rtl8723DS/hal/hal_btcoex_wifionly.c b/rtl8723DS/hal/hal_btcoex_wifionly.c
index 8201513..0f82bbb 100755..100644
--- a/rtl8723DS/hal/hal_btcoex_wifionly.c
+++ b/rtl8723DS/hal/hal_btcoex_wifionly.c
@@ -144,6 +144,26 @@ void hal_btcoex_wifionly_scan_notify(PADAPTER padapter)
 #endif
 }
 
+void hal_btcoex_wifionly_connect_notify(PADAPTER padapter)
+{
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(padapter);
+	u8 is_5g = _FALSE;
+
+	if (pHalData->current_band_type == BAND_ON_5G)
+		is_5g = _TRUE;
+
+	if (IS_HARDWARE_TYPE_8822B(padapter)) {
+#ifdef CONFIG_RTL8822B
+		ex_hal8822b_wifi_only_connectnotify(&GLBtCoexistWifiOnly, is_5g);
+#endif
+	}
+
+#ifdef CONFIG_RTL8821C
+	else if (IS_HARDWARE_TYPE_8821C(padapter))
+		ex_hal8821c_wifi_only_connectnotify(&GLBtCoexistWifiOnly, is_5g);
+#endif
+}
+
 void hal_btcoex_wifionly_hw_config(PADAPTER padapter)
 {
 	struct wifi_only_cfg *pwifionlycfg = &GLBtCoexistWifiOnly;
diff --git a/rtl8723DS/hal/hal_com.c b/rtl8723DS/hal/hal_com.c
index c24f66a..b7651f5 100755..100644
--- a/rtl8723DS/hal/hal_com.c
+++ b/rtl8723DS/hal/hal_com.c
@@ -114,6 +114,8 @@ void dump_chip_info(HAL_VERSION	ChipVersion)
 		cnt += sprintf((buf + cnt), "Chip Version Info: CHIP_8188E_");
 	else if (IS_8188F(ChipVersion))
 		cnt += sprintf((buf + cnt), "Chip Version Info: CHIP_8188F_");
+	else if (IS_8188GTV(ChipVersion))
+		cnt += sprintf((buf + cnt), "Chip Version Info: CHIP_8188GTV_");
 	else if (IS_8812_SERIES(ChipVersion))
 		cnt += sprintf((buf + cnt), "Chip Version Info: CHIP_8812_");
 	else if (IS_8192E(ChipVersion))
@@ -132,6 +134,11 @@ void dump_chip_info(HAL_VERSION	ChipVersion)
 		cnt += sprintf((buf + cnt), "Chip Version Info: CHIP_8822B_");
 	else if (IS_8821C_SERIES(ChipVersion))
 		cnt += sprintf((buf + cnt), "Chip Version Info: CHIP_8821C_");
+	else if (IS_8710B_SERIES(ChipVersion))
+		cnt += sprintf((buf + cnt), "Chip Version Info: CHIP_8710B_");
+	else if (IS_8192F_SERIES(ChipVersion))
+		cnt += sprintf((buf + cnt), "Chip Version Info: CHIP_8192F_");
+
 	else
 		cnt += sprintf((buf + cnt), "Chip Version Info: CHIP_UNKNOWN_");
 
@@ -183,6 +190,38 @@ void dump_chip_info(HAL_VERSION	ChipVersion)
 
 	RTW_INFO("%s", buf);
 }
+
+u8 rtw_hal_get_port(_adapter *adapter)
+{
+	u8 hw_port = get_hw_port(adapter);
+#ifdef CONFIG_CLIENT_PORT_CFG
+	u8 clt_port = get_clt_port(adapter);
+
+	if (clt_port)
+		hw_port = clt_port;
+
+#ifdef DBG_HW_PORT
+	if (MLME_IS_STA(adapter) && (adapter->client_id != MAX_CLIENT_PORT_NUM)) {
+		if(hw_port == CLT_PORT_INVALID) {
+			RTW_ERR(ADPT_FMT" @@@@@ Client port == 0 @@@@@\n", ADPT_ARG(adapter));
+			rtw_warn_on(1);
+		}
+	}
+	else if (MLME_IS_AP(adapter) || MLME_IS_MESH(adapter)) {
+		if (hw_port != HW_PORT0) {
+			RTW_ERR(ADPT_FMT" @@@@@ AP / MESH port != 0 @@@@@\n", ADPT_ARG(adapter));
+			rtw_warn_on(1);
+		}
+	}
+	if (0)
+		RTW_INFO(ADPT_FMT" - HP:%d,CP:%d\n", ADPT_ARG(adapter), get_hw_port(adapter), get_clt_port(adapter));
+#endif /*DBG_HW_PORT*/
+
+#endif/*CONFIG_CLIENT_PORT_CFG*/
+
+	return hw_port;
+}
+
 void rtw_hal_config_rftype(PADAPTER  padapter)
 {
 	HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter);
@@ -1078,28 +1117,6 @@ static VOID _FourOutPipeMapping(
 	}
 
 }
-#ifdef CONFIG_WOWLAN
-static bool rtw_is_support_gtk_offload(_adapter *adapter)
-{
-	struct security_priv *psecpriv = &adapter->securitypriv;
-	bool ret = _FALSE;
-#ifdef CONFIG_GTK_OL
-	if (psecpriv->binstallKCK_KEK == _TRUE)
-		ret = _TRUE;
-	if (psecpriv->ndisauthtype == Ndis802_11AuthModeWPAPSK &&
-	    psecpriv->dot11PrivacyAlgrthm == _AES_) {
-		RTW_WARN("%s: AES under WPA-PSK\n", __func__);
-		ret = _FALSE;
-	}
-	if (psecpriv->dot118021XGrpPrivacy == _TKIP_ &&
-	    (IS_HARDWARE_TYPE_8188E(adapter) ||
-	     IS_HARDWARE_TYPE_8812(adapter)))
-		ret = _FALSE;
-#endif
-	return ret;
-}
-#endif
-
 BOOLEAN
 Hal_MappingOutPipe(
 	IN	PADAPTER	pAdapter,
@@ -1118,6 +1135,8 @@ Hal_MappingOutPipe(
 		break;
 	case 3:
 	case 4:
+	case 5:
+	case 6:
 		_ThreeOutPipeMapping(pAdapter, bWIFICfg);
 		break;
 	case 1:
@@ -1172,6 +1191,8 @@ void rtw_hal_hw_port_enable(_adapter *adapter)
 
 	_rtw_memset(&bcn_ctrl, 0, sizeof(struct rtw_halmac_bcn_ctrl));
 	bcn_ctrl.enable_bcn = 1;
+	bcn_ctrl.rx_bssid_fit = 1;
+	bcn_ctrl.rxbcn_rpt = 1;
 
 	/*rtw_halmac_get_bcn_ctrl(struct dvobj_priv *d, enum _hw_port hwport,
 				struct rtw_halmac_bcn_ctrl *bcn_ctrl)*/
@@ -1206,10 +1227,10 @@ void rtw_restore_hw_port_cfg(_adapter *adapter)
 }
 #endif
 
-void rtw_restore_mac_addr(_adapter *adapter)
+void rtw_mi_set_mac_addr(_adapter *adapter)
 {
 #ifdef CONFIG_MI_WITH_MBSSID_CAM
-	rtw_mbid_cam_restore(adapter);
+	rtw_mi_set_mbid_cam(adapter);
 #else
 	int i;
 	_adapter *iface;
@@ -1234,6 +1255,10 @@ void rtw_init_hal_com_default_value(PADAPTER Adapter)
 	pHalData->antenna_test = _FALSE;
 	pHalData->RegIQKFWOffload = regsty->iqk_fw_offload;
 	pHalData->ch_switch_offload = regsty->ch_switch_offload;
+#ifdef RTW_REDUCE_SCAN_SWITCH_CH_TIME
+	if (pHalData->ch_switch_offload == 0)
+		pHalData->ch_switch_offload = 1;
+#endif
 }
 
 #ifdef CONFIG_FW_C2H_REG
@@ -1482,12 +1507,6 @@ int c2h_mac_hidden_rpt_hdl(_adapter *adapter, u8 *data, u8 len)
 		RTW_PRINT("nic:0x%x\n", nic);
 	}
 
-	/*
-	* NOTICE:
-	* for now, the following is common info/format
-	* if there is any hal difference need to export
-	* some IC dependent code will need to be implement
-	*/
 	hal_data->PackageType = package_type;
 	hal_spec->wl_func &= mac_hidden_wl_func_to_hal_wl_func(wl_func);
 	hal_spec->bw_cap &= mac_hidden_max_bw_to_hal_bw_cap(bw);
@@ -1496,7 +1515,18 @@ int c2h_mac_hidden_rpt_hdl(_adapter *adapter, u8 *data, u8 len)
 	hal_spec->proto_cap &= mac_hidden_proto_to_hal_proto_cap(protocol);
 	hal_spec->hci_type = hci_type;
 
-	/* TODO: tr_switch */
+#if defined(CONFIG_RTL8822C)
+	if (IS_8822C_SERIES(hal_data->version_id)) {
+		#define GET_C2H_MAC_HIDDEN_RPT_SS_NUM(_data)	LE_BITS_TO_1BYTE(((u8 *)(_data)) + 6, 3, 2)
+		u8 ss_num = GET_C2H_MAC_HIDDEN_RPT_SS_NUM(data);
+
+		if (DBG_C2H_MAC_HIDDEN_RPT_HANDLE)
+			RTW_PRINT("ss_num:0x%x\n", ss_num);
+
+		hal_spec->tx_nss_num = rtw_min(hal_spec->tx_nss_num, ss_num);
+		hal_spec->rx_nss_num = rtw_min(hal_spec->rx_nss_num, ss_num);
+	}
+#endif
 
 	ret = _SUCCESS;
 
@@ -1522,8 +1552,8 @@ int c2h_mac_hidden_rpt_2_hdl(_adapter *adapter, u8 *data, u8 len)
 			RTW_PRINT("%s: 0x%02X\n", __func__, *(data + i));
 	}
 
-	#ifdef CONFIG_RTL8188F
-	if (IS_8188F(hal_data->version_id)) {
+	#if defined(CONFIG_RTL8188F) || defined(CONFIG_RTL8188GTV)
+	if (IS_8188F(hal_data->version_id) || IS_8188GTV(hal_data->version_id)) {
 		#define GET_C2H_MAC_HIDDEN_RPT_IRV(_data)	LE_BITS_TO_1BYTE(((u8 *)(_data)) + 0, 0, 4)
 		u8 irv = GET_C2H_MAC_HIDDEN_RPT_IRV(data);
 
@@ -1541,25 +1571,6 @@ exit:
 	return ret;
 }
 
-#ifdef CONFIG_BT_COEXIST
-static int c2h_mac_hidden_rpt_bt_info_hdl(_adapter *adapter, u8 val)
-{
-	HAL_DATA_TYPE	*hal_data = GET_HAL_DATA(adapter);
-	struct hal_spec_t *hal_spec = GET_HAL_SPEC(adapter);
-	int ret = _FAIL;
-
-	if(IS_8723D_SERIES(hal_data->version_id))
-		hal_spec->bt_ft_ver = (val == 0xff) ? 0 : 1;
-
-	RTW_INFO("%s bt_ft_ver: %d\n", __func__, hal_spec->bt_ft_ver);
-
-	ret = _SUCCESS;
-
-exit:
-	return ret;
-}
-#endif /* CONFIG_BT_COEXIST */
-
 int hal_read_mac_hidden_rpt(_adapter *adapter)
 {
 	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(adapter);
@@ -1613,9 +1624,6 @@ int hal_read_mac_hidden_rpt(_adapter *adapter)
 mac_hidden_rpt_hdl:
 	c2h_mac_hidden_rpt_hdl(adapter, mac_hidden_rpt, MAC_HIDDEN_RPT_LEN);
 	c2h_mac_hidden_rpt_2_hdl(adapter, mac_hidden_rpt + MAC_HIDDEN_RPT_LEN, MAC_HIDDEN_RPT_2_LEN);
-#ifdef CONFIG_BT_COEXIST
-	c2h_mac_hidden_rpt_bt_info_hdl(adapter, rtw_read8(adapter, REG_C2HEVT_MSG_NORMAL + 1));
-#endif /* CONFIG_BT_COEXIST */
 
 	if (ret_fwdl == _SUCCESS && id == C2H_MAC_HIDDEN_RPT)
 		ret = _SUCCESS;
@@ -1880,6 +1888,120 @@ exit:
 }
 #endif /* CONFIG_RTW_CUSTOMER_STR */
 
+#ifdef RTW_PER_CMD_SUPPORT_FW
+#define H2C_REQ_PER_RPT_LEN 5
+#define SET_H2CCMD_REQ_PER_RPT_GROUP_MACID(__pH2CCmd, __Value)	SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 4, __Value)
+#define SET_H2CCMD_REQ_PER_RPT_RPT_TYPE(__pH2CCmd, __Value)	SET_BITS_TO_LE_1BYTE(__pH2CCmd, 4, 4, __Value)
+#define SET_H2CCMD_REQ_PER_RPT_MACID_BMAP(__pH2CCmd, __Value)	SET_BITS_TO_LE_4BYTE(__pH2CCmd + 1, 0, 32, __Value)
+
+u8 rtw_hal_set_req_per_rpt_cmd(_adapter *adapter, u8 group_macid,
+				      u8 rpt_type, u32 macid_bitmap)
+{
+	u8 ret = _FAIL;
+	u8 cmd_buf[H2C_REQ_PER_RPT_LEN] = {0};
+
+	SET_H2CCMD_REQ_PER_RPT_GROUP_MACID(cmd_buf, group_macid);
+	SET_H2CCMD_REQ_PER_RPT_RPT_TYPE(cmd_buf, rpt_type);
+	SET_H2CCMD_REQ_PER_RPT_MACID_BMAP(cmd_buf, macid_bitmap);
+
+	ret = rtw_hal_fill_h2c_cmd(adapter, 
+				   H2C_REQ_PER_RPT, 
+				   H2C_REQ_PER_RPT_LEN, 
+				   cmd_buf);
+	return ret;
+}
+
+#define	GET_C2H_PER_RATE_RPT_TYPE0_MACID0(_data)	LE_BITS_TO_1BYTE(((u8 *)(_data)), 0, 8)
+#define	GET_C2H_PER_RATE_RPT_TYPE0_PER0(_data)		LE_BITS_TO_1BYTE(((u8 *)(_data)) + 1, 0, 8)
+#define	GET_C2H_PER_RATE_RPT_TYPE0_RATE0(_data)		LE_BITS_TO_1BYTE(((u8 *)(_data)) + 2, 0, 8)
+#define	GET_C2H_PER_RATE_RPT_TYPE0_BW0(_data)		LE_BITS_TO_1BYTE(((u8 *)(_data)) + 3, 0, 2)
+#define	GET_C2H_PER_RATE_RPT_TYPE0_TOTAL_PKT0(_data)	LE_BITS_TO_2BYTE(((u8 *)(_data)) + 4, 0, 16)
+#define	GET_C2H_PER_RATE_RPT_TYPE0_MACID1(_data)	LE_BITS_TO_1BYTE(((u8 *)(_data)) + 6, 0, 8)
+#define	GET_C2H_PER_RATE_RPT_TYPE0_PER1(_data)		LE_BITS_TO_1BYTE(((u8 *)(_data)) + 7, 0, 8)
+#define	GET_C2H_PER_RATE_RPT_TYPE0_RATE1(_data)		LE_BITS_TO_1BYTE(((u8 *)(_data)) + 8, 0, 8)
+#define	GET_C2H_PER_RATE_RPT_TYPE0_BW1(_data)		LE_BITS_TO_1BYTE(((u8 *)(_data)) + 9, 0, 2)
+#define	GET_C2H_PER_RATE_RPT_TYPE0_TOTAL_PKT1(_data)	LE_BITS_TO_2BYTE(((u8 *)(_data)) + 10, 0, 16)
+
+#define	GET_C2H_PER_RATE_RPT_TYPE1_MACID0(_data)	LE_BITS_TO_1BYTE(((u8 *)(_data)), 0, 8)
+#define	GET_C2H_PER_RATE_RPT_TYPE1_PER0(_data)		LE_BITS_TO_1BYTE(((u8 *)(_data)) + 1, 0, 8)
+#define	GET_C2H_PER_RATE_RPT_TYPE1_RATE0(_data)		LE_BITS_TO_1BYTE(((u8 *)(_data)) + 2, 0, 8)
+#define	GET_C2H_PER_RATE_RPT_TYPE1_BW0(_data)		LE_BITS_TO_1BYTE(((u8 *)(_data)) + 3, 0, 2)
+#define	GET_C2H_PER_RATE_RPT_TYPE1_MACID1(_data)	LE_BITS_TO_1BYTE(((u8 *)(_data)) + 4, 0, 8)
+#define	GET_C2H_PER_RATE_RPT_TYPE1_PER1(_data)		LE_BITS_TO_1BYTE(((u8 *)(_data)) + 5, 0, 8)
+#define	GET_C2H_PER_RATE_RPT_TYPE1_RATE1(_data)		LE_BITS_TO_1BYTE(((u8 *)(_data)) + 6, 0, 8)
+#define	GET_C2H_PER_RATE_RPT_TYPE1_BW1(_data)		LE_BITS_TO_1BYTE(((u8 *)(_data)) + 7, 0, 2)
+#define	GET_C2H_PER_RATE_RPT_TYPE1_MACID2(_data)	LE_BITS_TO_1BYTE(((u8 *)(_data)) + 8, 0, 8)
+#define	GET_C2H_PER_RATE_RPT_TYPE1_PER2(_data)		LE_BITS_TO_1BYTE(((u8 *)(_data)) + 9, 0, 8)
+#define	GET_C2H_PER_RATE_RPT_TYPE1_RATE2(_data)		LE_BITS_TO_1BYTE(((u8 *)(_data)) + 10, 0, 8)
+#define	GET_C2H_PER_RATE_RPT_TYPE1_BW2(_data)		LE_BITS_TO_1BYTE(((u8 *)(_data)) + 11, 0, 2)
+
+static void per_rate_rpt_update(_adapter *adapter, u8 mac_id,
+				u8 per, u8 rate,
+				u8 bw, u8 total_pkt)
+{
+#ifdef CONFIG_RTW_MESH
+	rtw_ieee80211s_update_metric(adapter, mac_id,
+				     per, rate,
+				     bw, total_pkt);
+#endif
+}
+
+int c2h_per_rate_rpt_hdl(_adapter *adapter, u8 *data, u8 len)
+{
+	/* Now only consider type0, since it covers all params in type1
+	 * type0: mac_id, per, rate, bw, total_pkt
+	 * type1: mac_id, per, rate, bw
+	 */
+	u8 mac_id[2] = {0}, per[2] = {0}, rate[2] = {0}, bw[2] = {0};
+	u16 total_pkt[2] = {0};
+	int ret = _FAIL, i, macid_cnt = 0;
+
+	/* type0:
+	 * 1 macid includes   6 bytes info + 1 byte 0xff
+	 * 2 macid includes 2*6 bytes info
+	 */
+	if (!(len == 7 || len == 12)) {
+		RTW_WARN("%s len(%u) != 7 or 12\n", __FUNCTION__, len);
+		goto exit;
+	}
+
+	macid_cnt++;
+	mac_id[0] = GET_C2H_PER_RATE_RPT_TYPE0_MACID0(data);
+	per[0] = GET_C2H_PER_RATE_RPT_TYPE0_PER0(data);
+	rate[0] = GET_C2H_PER_RATE_RPT_TYPE0_RATE0(data);
+	bw[0] = GET_C2H_PER_RATE_RPT_TYPE0_BW0(data);
+	total_pkt[0] = GET_C2H_PER_RATE_RPT_TYPE0_TOTAL_PKT0(data);
+
+	mac_id[1] = GET_C2H_PER_RATE_RPT_TYPE0_MACID1(data);
+	/* 0xff means no report anymore */
+	if (mac_id[1] == 0xff)
+		goto update_per;
+	if (len != 12) {
+		RTW_WARN("%s incorrect format\n", __FUNCTION__);
+		goto exit;
+	}
+	macid_cnt++;
+	per[1] = GET_C2H_PER_RATE_RPT_TYPE0_PER1(data);
+	rate[1] = GET_C2H_PER_RATE_RPT_TYPE0_RATE1(data);
+	bw[1] = GET_C2H_PER_RATE_RPT_TYPE0_BW1(data);
+	total_pkt[1] = GET_C2H_PER_RATE_RPT_TYPE0_TOTAL_PKT1(data);
+
+update_per:
+	for (i = 0; i < macid_cnt; i++) {
+		RTW_DBG("[%s] type0 rpt[%d]: macid = %u, per = %u, "
+			"rate = %u, bw = %u, total_pkt = %u\n",
+			__FUNCTION__, i, mac_id[i], per[i],
+			rate[i], bw[i], total_pkt[i]);
+		per_rate_rpt_update(adapter, mac_id[i],
+				    per[i], rate[i],
+				    bw[i], total_pkt[i]);
+	}
+	ret = _SUCCESS;
+exit:
+	return ret;
+}
+#endif /* RTW_PER_CMD_SUPPORT_FW */
+
 void rtw_hal_update_sta_wset(_adapter *adapter, struct sta_info *psta)
 {
 	u8 w_set = 0;
@@ -1924,6 +2046,10 @@ void rtw_hal_update_sta_mimo_type(_adapter *adapter, struct sta_info *psta)
 	else
 		rtw_warn_on(1);
 
+#ifdef CONFIG_CTRL_TXSS_BY_TP
+	rtw_ctrl_txss_update_mimo_type(adapter, psta);
+#endif
+
 	RTW_INFO("STA - MAC_ID:%d, Tx - %d SS, Rx - %d SS\n",
 			psta->cmn.mac_id, tx_nss, rx_nss);
 }
@@ -1970,7 +2096,7 @@ void rtw_hal_update_sta_rate_mask(PADAPTER padapter, struct sta_info *psta)
 {
 	struct hal_spec_t *hal_spec = GET_HAL_SPEC(padapter);
 	u8 i, rf_type, tx_nss;
-	u64 tx_ra_bitmap = 0;
+	u64 tx_ra_bitmap = 0, tmp64=0;
 
 	if (psta == NULL)
 		return;
@@ -1982,6 +2108,7 @@ void rtw_hal_update_sta_rate_mask(PADAPTER padapter, struct sta_info *psta)
 	}
 
 #ifdef CONFIG_80211N_HT
+if (padapter->registrypriv.ht_enable && is_supported_ht(padapter->registrypriv.wireless_mode)) {
 	rtw_hal_get_hwreg(padapter, HW_VAR_RF_TYPE, (u8 *)(&rf_type));
 	tx_nss = rtw_min(rf_type_to_rf_tx_cnt(rf_type), hal_spec->tx_nss_num);
 #ifdef CONFIG_80211AC_VHT
@@ -2002,8 +2129,10 @@ void rtw_hal_update_sta_rate_mask(PADAPTER padapter, struct sta_info *psta)
 			}
 		}
 
-		tx_ra_bitmap |= (rtw_ht_mcs_set_to_bitmap(psta->htpriv.ht_cap.supp_mcs_set, tx_nss) << 12);
+		tmp64 = rtw_ht_mcs_set_to_bitmap(psta->htpriv.ht_cap.supp_mcs_set, tx_nss);
+		tx_ra_bitmap |= (tmp64 << 12);
 	}
+}
 #endif /* CONFIG_80211N_HT */
 	psta->cmn.ra_info.ramask = tx_ra_bitmap;
 	psta->init_rate = get_highest_rate_idx(tx_ra_bitmap) & 0x3f;
@@ -2016,6 +2145,130 @@ void rtw_hal_update_sta_ra_info(PADAPTER padapter, struct sta_info *psta)
 	rtw_hal_update_sta_rate_mask(padapter, psta);
 }
 
+static u32 hw_bcn_ctrl_addr(_adapter *adapter, u8 hw_port)
+{
+	struct hal_spec_t *hal_spec = GET_HAL_SPEC(adapter);
+
+	if (hw_port >= hal_spec->port_num) {
+		RTW_ERR(FUNC_ADPT_FMT" HW Port(%d) invalid\n", FUNC_ADPT_ARG(adapter), hw_port);
+		rtw_warn_on(1);
+		return 0;
+	}
+
+	switch (hw_port) {
+	case HW_PORT0:
+		return REG_BCN_CTRL;
+	case HW_PORT1:
+		return REG_BCN_CTRL_1;
+	}
+
+	return 0;
+}
+
+static void rtw_hal_get_msr(_adapter *adapter, u8 *net_type)
+{
+#ifdef RTW_HALMAC
+	rtw_halmac_get_network_type(adapter_to_dvobj(adapter),
+				adapter->hw_port, net_type);
+#else /* !RTW_HALMAC */
+	switch (adapter->hw_port) {
+	case HW_PORT0:
+		/*REG_CR - BIT[17:16]-Network Type for port 1*/
+		*net_type = rtw_read8(adapter, MSR) & 0x03;
+		break;
+	case HW_PORT1:
+		/*REG_CR - BIT[19:18]-Network Type for port 1*/
+		*net_type = (rtw_read8(adapter, MSR) & 0x0C) >> 2;
+		break;
+#if defined(CONFIG_RTL8814A)
+	case HW_PORT2:
+		/*REG_CR_EXT- BIT[1:0]-Network Type for port 2*/
+		*net_type = rtw_read8(adapter, MSR1) & 0x03;
+		break;
+	case HW_PORT3:
+		/*REG_CR_EXT- BIT[3:2]-Network Type for port 3*/
+		*net_type = (rtw_read8(adapter, MSR1) & 0x0C) >> 2;
+		break;
+	case HW_PORT4:
+		/*REG_CR_EXT- BIT[5:4]-Network Type for port 4*/
+		*net_type = (rtw_read8(adapter, MSR1) & 0x30) >> 4;
+		break;
+#endif /*#if defined(CONFIG_RTL8814A)*/
+	default:
+		RTW_INFO("[WARN] "ADPT_FMT"- invalid hw port -%d\n",
+			 ADPT_ARG(adapter), adapter->hw_port);
+		rtw_warn_on(1);
+		break;
+	}
+#endif /* !RTW_HALMAC */
+}
+
+#if defined(CONFIG_MI_WITH_MBSSID_CAM) && defined(CONFIG_MBSSID_CAM) /*For 2 hw ports - 88E/92E/8812/8821/8723B*/
+static u8 rtw_hal_net_type_decision(_adapter *adapter, u8 net_type)
+{
+	if ((adapter->hw_port == HW_PORT0) && (rtw_get_mbid_cam_entry_num(adapter))) {
+		if (net_type != _HW_STATE_NOLINK_)
+			return _HW_STATE_AP_;
+	}
+	return net_type;
+}
+#endif
+static void rtw_hal_set_msr(_adapter *adapter, u8 net_type)
+{
+#ifdef RTW_HALMAC
+	#if defined(CONFIG_MI_WITH_MBSSID_CAM) && defined(CONFIG_MBSSID_CAM)
+	net_type = rtw_hal_net_type_decision(adapter, net_type);
+	#endif
+	rtw_halmac_set_network_type(adapter_to_dvobj(adapter),
+				adapter->hw_port, net_type);
+#else /* !RTW_HALMAC */
+	u8 val8 = 0;
+
+	switch (adapter->hw_port) {
+	case HW_PORT0:
+		#if defined(CONFIG_MI_WITH_MBSSID_CAM) && defined(CONFIG_MBSSID_CAM)
+		net_type = rtw_hal_net_type_decision(adapter, net_type);
+		#endif
+		/*REG_CR - BIT[17:16]-Network Type for port 0*/
+		val8 = rtw_read8(adapter, MSR) & 0x0C;
+		val8 |= net_type;
+		rtw_write8(adapter, MSR, val8);
+		break;
+	case HW_PORT1:
+		/*REG_CR - BIT[19:18]-Network Type for port 1*/
+		val8 = rtw_read8(adapter, MSR) & 0x03;
+		val8 |= net_type << 2;
+		rtw_write8(adapter, MSR, val8);
+		break;
+#if defined(CONFIG_RTL8814A)
+	case HW_PORT2:
+		/*REG_CR_EXT- BIT[1:0]-Network Type for port 2*/
+		val8 = rtw_read8(adapter, MSR1) & 0xFC;
+		val8 |= net_type;
+		rtw_write8(adapter, MSR1, val8);
+		break;
+	case HW_PORT3:
+		/*REG_CR_EXT- BIT[3:2]-Network Type for port 3*/
+		val8 = rtw_read8(adapter, MSR1) & 0xF3;
+		val8 |= net_type << 2;
+		rtw_write8(adapter, MSR1, val8);
+		break;
+	case HW_PORT4:
+		/*REG_CR_EXT- BIT[5:4]-Network Type for port 4*/
+		val8 = rtw_read8(adapter, MSR1) & 0xCF;
+		val8 |= net_type << 4;
+		rtw_write8(adapter, MSR1, val8);
+		break;
+#endif /* CONFIG_RTL8814A */
+	default:
+		RTW_INFO("[WARN] "ADPT_FMT"- invalid hw port -%d\n",
+			 ADPT_ARG(adapter), adapter->hw_port);
+		rtw_warn_on(1);
+		break;
+	}
+#endif /* !RTW_HALMAC */
+}
+
 #ifndef SEC_CAM_ACCESS_TIMEOUT_MS
 	#define SEC_CAM_ACCESS_TIMEOUT_MS 200
 #endif
@@ -2159,8 +2412,8 @@ void rtw_sec_write_cam_ent(_adapter *adapter, u8 id, u16 ctrl, u8 *mac, u8 *key)
 {
 	unsigned int i;
 	int j;
-	u8 addr;
-	u32 wdata;
+	u8 addr, addr1 = 0;
+	u32 wdata, wdata1 = 0;
 
 	/* TODO: consider other key length accordingly */
 #if 0
@@ -2195,8 +2448,20 @@ void rtw_sec_write_cam_ent(_adapter *adapter, u8 id, u16 ctrl, u8 *mac, u8 *key)
 
 		addr = (id << 3) + j;
 
+#if defined(CONFIG_RTL8192F)
+		if(j == 1) {
+			wdata1 = wdata;
+			addr1 = addr;
+			continue;
+		}
+#endif
+
 		rtw_sec_write_cam(adapter, addr, wdata);
 	}
+
+#if defined(CONFIG_RTL8192F)
+	rtw_sec_write_cam(adapter, addr1, wdata1);
+#endif
 }
 
 void rtw_sec_clr_cam_ent(_adapter *adapter, u8 id)
@@ -2362,14 +2627,14 @@ u8 rtw_mbid_camid_alloc(_adapter *adapter, u8 *mac_addr)
 	struct mbid_cam_ctl_t *mbid_cam_ctl = &dvobj->mbid_cam_ctl;
 	u8 entry_num = ATOMIC_READ(&mbid_cam_ctl->mbid_entry_num);
 
+	if (INVALID_CAM_ID != rtw_mbid_cam_search_by_macaddr(adapter, mac_addr))
+		goto exit;
+
 	if (entry_num >= TOTAL_MBID_CAM_NUM) {
 		RTW_INFO(FUNC_ADPT_FMT" failed !! MBSSID number :%d over TOTAL_CAM_ENTRY(8)\n", FUNC_ADPT_ARG(adapter), entry_num);
 		rtw_warn_on(1);
 	}
 
-	if (INVALID_CAM_ID != rtw_mbid_cam_search_by_macaddr(adapter, mac_addr))
-		goto exit;
-
 	_enter_critical_bh(&mbid_cam_ctl->lock, &irqL);
 	for (i = 0; i < TOTAL_MBID_CAM_NUM; i++) {
 		if (!(mbid_cam_ctl->bitmap & BIT(i))) {
@@ -2485,23 +2750,23 @@ int rtw_mbid_cam_cache_dump(void *sel, const char *fun_name, _adapter *adapter)
 
 		if (mbid_cam_ctl->bitmap & BIT(i)) {
 			iface_id = dvobj->mbid_cam_cache[i].iface_id;
-			RTW_PRINT_SEL(sel, "IF_ID:%d\t", iface_id);
-			RTW_PRINT_SEL(sel, "MAC Addr:"MAC_FMT"\t", MAC_ARG(dvobj->mbid_cam_cache[i].mac_addr));
+			_RTW_PRINT_SEL(sel, "IF_ID:%d\t", iface_id);
+			_RTW_PRINT_SEL(sel, "MAC Addr:"MAC_FMT"\t", MAC_ARG(dvobj->mbid_cam_cache[i].mac_addr));
 
 			iface = dvobj->padapters[iface_id];
 			if (iface) {
 				if (MLME_IS_STA(iface))
-					RTW_PRINT_SEL(sel, "ROLE:%s\n", "STA");
+					_RTW_PRINT_SEL(sel, "ROLE:%s\n", "STA");
 				else if (MLME_IS_AP(iface))
-					RTW_PRINT_SEL(sel, "ROLE:%s\n", "AP");
+					_RTW_PRINT_SEL(sel, "ROLE:%s\n", "AP");
 				else if (MLME_IS_MESH(iface))
-					RTW_PRINT_SEL(sel, "ROLE:%s\n", "MESH");
+					_RTW_PRINT_SEL(sel, "ROLE:%s\n", "MESH");
 				else
-					RTW_PRINT_SEL(sel, "ROLE:%s\n", "NONE");
+					_RTW_PRINT_SEL(sel, "ROLE:%s\n", "NONE");
 			}
 
 		} else
-			RTW_PRINT_SEL(sel, "N/A\n");
+			_RTW_PRINT_SEL(sel, "N/A\n");
 	}
 	_exit_critical_bh(&mbid_cam_ctl->lock, &irqL);
 	return 0;
@@ -2556,7 +2821,7 @@ int rtw_mbid_cam_dump(void *sel, const char *fun_name, _adapter *adapter)
 		RTW_PRINT_SEL(sel, "CAM_ID = %d\t", i);
 		_rtw_memset(mac_addr, 0, ETH_ALEN);
 		read_mbssid_cam(adapter, i, mac_addr);
-		RTW_PRINT_SEL(sel, "MAC Addr:"MAC_FMT"\n", MAC_ARG(mac_addr));
+		_RTW_PRINT_SEL(sel, "MAC Addr:"MAC_FMT"\n", MAC_ARG(mac_addr));
 	}
 	/*_exit_critical_bh(&mbid_cam_ctl->lock, &irqL);*/
 	return 0;
@@ -2576,17 +2841,19 @@ static void clear_mbssid_cam(_adapter *padapter, u8 cam_addr)
 {
 	rtw_hal_set_hwreg(padapter, HW_VAR_MBSSID_CAM_CLEAR, &cam_addr);
 }
-static void enable_mbssid_cam(_adapter *adapter)
+
+void rtw_ap_set_mbid_num(_adapter *adapter, u8 ap_num)
+{
+	rtw_write8(adapter, REG_MBID_NUM,
+		((rtw_read8(adapter, REG_MBID_NUM) & 0xF8) | ((ap_num -1) & 0x07)));
+
+}
+void rtw_mbid_cam_enable(_adapter *adapter)
 {
-	u8 max_cam_id = rtw_get_max_mbid_cam_id(adapter);
 	/*enable MBSSID*/
 	rtw_hal_rcr_add(adapter, RCR_ENMBID);
-	if (max_cam_id != INVALID_CAM_ID) {
-		rtw_write8(adapter, REG_MBID_NUM,
-			((rtw_read8(adapter, REG_MBID_NUM) & 0xF8) | ((max_cam_id -1) & 0x07)));
-	}
 }
-void rtw_mbid_cam_restore(_adapter *adapter)
+void rtw_mi_set_mbid_cam(_adapter *adapter)
 {
 	u8 i;
 	struct dvobj_priv *dvobj = adapter_to_dvobj(adapter);
@@ -2602,10 +2869,255 @@ void rtw_mbid_cam_restore(_adapter *adapter)
 			RTW_INFO("%s - cam_id:%d => mac:"MAC_FMT"\n", __func__, i, MAC_ARG(dvobj->mbid_cam_cache[i].mac_addr));
 		}
 	}
-	enable_mbssid_cam(adapter);
+	rtw_mbid_cam_enable(adapter);
 }
 #endif /*CONFIG_MBSSID_CAM*/
 
+#ifdef CONFIG_FW_HANDLE_TXBCN
+#define H2C_BCN_OFFLOAD_LEN	1
+
+#define SET_H2CCMD_BCN_OFFLOAD_EN(__pH2CCmd, __Value)	SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 1, __Value)
+#define SET_H2CCMD_BCN_ROOT_TBTT_RPT(__pH2CCmd, __Value)	SET_BITS_TO_LE_1BYTE(__pH2CCmd, 1, 1, __Value)
+#define SET_H2CCMD_BCN_VAP1_TBTT_RPT(__pH2CCmd, __Value)	SET_BITS_TO_LE_1BYTE(__pH2CCmd, 2, 1, __Value)
+#define SET_H2CCMD_BCN_VAP2_TBTT_RPT(__pH2CCmd, __Value)	SET_BITS_TO_LE_1BYTE(__pH2CCmd, 3, 1, __Value)
+#define SET_H2CCMD_BCN_VAP3_TBTT_RPT(__pH2CCmd, __Value)	SET_BITS_TO_LE_1BYTE(__pH2CCmd, 4, 1, __Value)
+#define SET_H2CCMD_BCN_VAP4_TBTT_RPT(__pH2CCmd, __Value)	SET_BITS_TO_LE_1BYTE(__pH2CCmd, 5, 1, __Value)
+
+void rtw_hal_set_fw_ap_bcn_offload_cmd(_adapter *adapter, bool fw_bcn_en, u8 tbtt_rpt_map)
+{
+	u8 fw_bcn_offload[1] = {0};
+	struct dvobj_priv *dvobj = adapter_to_dvobj(adapter);
+
+	if (fw_bcn_en)
+		SET_H2CCMD_BCN_OFFLOAD_EN(fw_bcn_offload, 1);
+
+	if (tbtt_rpt_map & BIT(0))
+		SET_H2CCMD_BCN_ROOT_TBTT_RPT(fw_bcn_offload, 1);
+	if (tbtt_rpt_map & BIT(1))
+		SET_H2CCMD_BCN_VAP1_TBTT_RPT(fw_bcn_offload, 1);
+	if (tbtt_rpt_map & BIT(2))
+		SET_H2CCMD_BCN_VAP2_TBTT_RPT(fw_bcn_offload, 1);
+	if (tbtt_rpt_map & BIT(3))
+			SET_H2CCMD_BCN_VAP3_TBTT_RPT(fw_bcn_offload, 1);
+
+	dvobj->vap_tbtt_rpt_map = tbtt_rpt_map;
+	dvobj->fw_bcn_offload = fw_bcn_en;
+	RTW_INFO("[FW BCN] Offload : %s\n", (dvobj->fw_bcn_offload) ? "EN" : "DIS");
+	RTW_INFO("[FW BCN] TBTT RPT map : 0x%02x\n", dvobj->vap_tbtt_rpt_map);
+
+	rtw_hal_fill_h2c_cmd(adapter, H2C_FW_BCN_OFFLOAD,
+					H2C_BCN_OFFLOAD_LEN, fw_bcn_offload);
+}
+
+void rtw_hal_set_bcn_rsvdpage_loc_cmd(_adapter *adapter)
+{
+	struct dvobj_priv *dvobj = adapter_to_dvobj(adapter);
+	u8 ret, vap_id;
+	u32 page_size = 0;
+	u8 bcn_rsvdpage[H2C_BCN_RSVDPAGE_LEN] = {0};
+
+	rtw_hal_get_def_var(adapter, HAL_DEF_TX_PAGE_SIZE, (u8 *)&page_size);
+	#if 1
+	for (vap_id = 0; vap_id < CONFIG_LIMITED_AP_NUM; vap_id++) {
+		if (dvobj->vap_map & BIT(vap_id))
+			bcn_rsvdpage[vap_id] = vap_id * (MAX_BEACON_LEN / page_size);
+	}
+	#else
+#define SET_H2CCMD_BCN_RSVDPAGE_LOC_ROOT(__pH2CCmd, __Value)	SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 8, __Value)
+#define SET_H2CCMD_BCN_RSVDPAGE_LOC_VAP1(__pH2CCmd, __Value)	SET_BITS_TO_LE_1BYTE(__pH2CCmd, 1, 8, __Value)
+#define SET_H2CCMD_BCN_RSVDPAGE_LOC_VAP2(__pH2CCmd, __Value)	SET_BITS_TO_LE_1BYTE(__pH2CCmd, 2, 8, __Value)
+#define SET_H2CCMD_BCN_RSVDPAGE_LOC_VAP3(__pH2CCmd, __Value)	SET_BITS_TO_LE_1BYTE(__pH2CCmd, 3, 8, __Value)
+#define SET_H2CCMD_BCN_RSVDPAGE_LOC_VAP4(__pH2CCmd, __Value)	SET_BITS_TO_LE_1BYTE(__pH2CCmd, 4, 8, __Value)
+
+	if (dvobj->vap_map & BIT(0))
+ 		SET_H2CCMD_BCN_RSVDPAGE_LOC_ROOT(bcn_rsvdpage, 0);
+	if (dvobj->vap_map & BIT(1))
+		SET_H2CCMD_BCN_RSVDPAGE_LOC_VAP1(bcn_rsvdpage,
+					1 * (MAX_BEACON_LEN / page_size));
+	if (dvobj->vap_map & BIT(2))
+		SET_H2CCMD_BCN_RSVDPAGE_LOC_VAP2(bcn_rsvdpage,
+					2 * (MAX_BEACON_LEN / page_size));
+	if (dvobj->vap_map & BIT(3))
+		SET_H2CCMD_BCN_RSVDPAGE_LOC_VAP3(bcn_rsvdpage,
+					3 * (MAX_BEACON_LEN / page_size));
+	if (dvobj->vap_map & BIT(4))
+		SET_H2CCMD_BCN_RSVDPAGE_LOC_VAP4(bcn_rsvdpage,
+					4 * (MAX_BEACON_LEN / page_size));
+	#endif
+	if (1) {
+		RTW_INFO("[BCN_LOC] vap_map : 0x%02x\n", dvobj->vap_map);
+		RTW_INFO("[BCN_LOC] page_size :%d, @bcn_page_num :%d\n"
+			, page_size, (MAX_BEACON_LEN / page_size));
+		RTW_INFO("[BCN_LOC] root ap : 0x%02x\n", *bcn_rsvdpage);
+		RTW_INFO("[BCN_LOC] vap_1 : 0x%02x\n", *(bcn_rsvdpage + 1));
+		RTW_INFO("[BCN_LOC] vap_2 : 0x%02x\n", *(bcn_rsvdpage + 2));
+		RTW_INFO("[BCN_LOC] vap_3 : 0x%02x\n", *(bcn_rsvdpage + 3));
+		RTW_INFO("[BCN_LOC] vap_4 : 0x%02x\n", *(bcn_rsvdpage + 4));
+	}
+	ret = rtw_hal_fill_h2c_cmd(adapter, H2C_BCN_RSVDPAGE,
+					H2C_BCN_RSVDPAGE_LEN, bcn_rsvdpage);
+}
+
+void rtw_ap_multi_bcn_cfg(_adapter *adapter)
+{
+	u8 dft_bcn_space = DEFAULT_BCN_INTERVAL;
+	u8 sub_bcn_space = (DEFAULT_BCN_INTERVAL / CONFIG_LIMITED_AP_NUM);
+
+	/*enable to rx data frame*/
+	rtw_write16(adapter, REG_RXFLTMAP2, 0xFFFF);
+
+	/*Disable Port0's beacon function*/
+	rtw_write8(adapter, REG_BCN_CTRL, rtw_read8(adapter, REG_BCN_CTRL) & ~BIT_EN_BCN_FUNCTION);
+	/*Reset Port0's TSF*/
+	rtw_write8(adapter, REG_DUAL_TSF_RST, BIT_TSFTR_RST);
+
+	rtw_ap_set_mbid_num(adapter, CONFIG_LIMITED_AP_NUM);
+
+	/*BCN space & BCN sub-space 0x554[15:0] = 0x64,0x5BC[23:16] = 0x21*/
+	rtw_halmac_set_bcn_interval(adapter_to_dvobj(adapter), HW_PORT0, dft_bcn_space);
+	rtw_write8(adapter, REG_MBSSID_BCN_SPACE3 + 2, sub_bcn_space);
+
+	#if 0 /*setting in hw_var_set_opmode_mbid - ResumeTxBeacon*/
+	/*BCN hold time  0x540[19:8] = 0x80*/
+	rtw_write8(adapter, REG_TBTT_PROHIBIT + 1, TBTT_PROHIBIT_HOLD_TIME & 0xFF);
+	rtw_write8(adapter, REG_TBTT_PROHIBIT + 2,
+		(rtw_read8(adapter, REG_TBTT_PROHIBIT + 2) & 0xF0) | (TBTT_PROHIBIT_HOLD_TIME >> 8));
+	#endif
+
+	/*ATIM window -0x55A = 0x32, reg 0x570 = 0x32, reg 0x5A0 = 0x32 */
+	rtw_write8(adapter, REG_ATIMWND, 0x32);
+	rtw_write8(adapter, REG_ATIMWND1_V1, 0x32);
+	rtw_write8(adapter, REG_ATIMWND2, 0x32);
+	rtw_write8(adapter, REG_ATIMWND3, 0x32);
+	/*
+	rtw_write8(adapter, REG_ATIMWND4, 0x32);
+	rtw_write8(adapter, REG_ATIMWND5, 0x32);
+	rtw_write8(adapter, REG_ATIMWND6, 0x32);
+	rtw_write8(adapter, REG_ATIMWND7, 0x32);*/
+
+	/*no limit setting - 0x5A7 = 0xFF - Packet in Hi Queue Tx immediately*/
+	rtw_write8(adapter, REG_HIQ_NO_LMT_EN, 0xFF);
+
+	/*Mask all beacon*/
+	rtw_write8(adapter, REG_MBSSID_CTRL, 0);
+
+	/*BCN invalid bit setting 0x454[6] = 1*/
+	/*rtw_write8(adapter, REG_CCK_CHECK, rtw_read8(adapter, REG_CCK_CHECK) | BIT_EN_BCN_PKT_REL);*/
+
+	/*Enable Port0's beacon function*/
+	rtw_write8(adapter, REG_BCN_CTRL,
+	rtw_read8(adapter, REG_BCN_CTRL) | BIT_DIS_RX_BSSID_FIT | BIT_P0_EN_TXBCN_RPT | BIT_DIS_TSF_UDT  | BIT_EN_BCN_FUNCTION);
+
+	/* Enable HW seq for BCN
+	* 0x4FC[0]: EN_HWSEQ / 0x4FC[1]: EN_HWSEQEXT  */
+	 #ifdef CONFIG_RTL8822B
+	if (IS_HARDWARE_TYPE_8822B(adapter))
+		rtw_write8(adapter, REG_DUMMY_PAGE4_V1_8822B, 0x01);
+	#endif
+
+}
+static void _rtw_mbid_bcn_cfg(_adapter *adapter, bool mbcnq_en, u8 mbcnq_id)
+{
+	if (mbcnq_id >= CONFIG_LIMITED_AP_NUM) {
+		RTW_ERR(FUNC_ADPT_FMT"- mbid bcnq_id(%d) invalid\n", FUNC_ADPT_ARG(adapter), mbcnq_id);
+		rtw_warn_on(1);
+	}
+
+	if (mbcnq_en) {
+		rtw_write8(adapter, REG_MBSSID_CTRL,
+			rtw_read8(adapter, REG_MBSSID_CTRL) | BIT(mbcnq_id));
+		RTW_INFO(FUNC_ADPT_FMT"- mbid bcnq_id(%d) enabled\n", FUNC_ADPT_ARG(adapter), mbcnq_id);
+	} else {
+		rtw_write8(adapter, REG_MBSSID_CTRL,
+			rtw_read8(adapter, REG_MBSSID_CTRL) & (~BIT(mbcnq_id)));
+		RTW_INFO(FUNC_ADPT_FMT"- mbid bcnq_id(%d) disabled\n", FUNC_ADPT_ARG(adapter), mbcnq_id);
+	}
+}
+/*#define CONFIG_FW_TBTT_RPT*/
+void rtw_ap_mbid_bcn_en(_adapter *adapter, u8 ap_id)
+{
+	RTW_INFO(FUNC_ADPT_FMT"- ap_id(%d)\n", FUNC_ADPT_ARG(adapter), ap_id);
+
+	#ifdef CONFIG_FW_TBTT_RPT
+	if (rtw_ap_get_nums(adapter) >= 1) {
+		u8 tbtt_rpt_map = adapter_to_dvobj(adapter)->vap_tbtt_rpt_map;
+
+		rtw_hal_set_fw_ap_bcn_offload_cmd(adapter, _TRUE,
+			tbtt_rpt_map | BIT(ap_id));/*H2C-0xBA*/
+	}
+	#else
+	if (rtw_ap_get_nums(adapter) == 1)
+		rtw_hal_set_fw_ap_bcn_offload_cmd(adapter, _TRUE, 0);/*H2C-0xBA*/
+	#endif
+
+	rtw_hal_set_bcn_rsvdpage_loc_cmd(adapter);/*H2C-0x09*/
+
+	_rtw_mbid_bcn_cfg(adapter, _TRUE, ap_id);
+}
+void rtw_ap_mbid_bcn_dis(_adapter *adapter, u8 ap_id)
+{
+	RTW_INFO(FUNC_ADPT_FMT"- ap_id(%d)\n", FUNC_ADPT_ARG(adapter), ap_id);
+	_rtw_mbid_bcn_cfg(adapter, _FALSE, ap_id);
+
+	if (rtw_ap_get_nums(adapter) == 0)
+		rtw_hal_set_fw_ap_bcn_offload_cmd(adapter, _FALSE, 0);
+	#ifdef CONFIG_FW_TBTT_RPT
+	else if (rtw_ap_get_nums(adapter) >= 1) {
+		u8 tbtt_rpt_map = adapter_to_dvobj(adapter)->vap_tbtt_rpt_map;
+
+		rtw_hal_set_fw_ap_bcn_offload_cmd(adapter, _TRUE,
+			tbtt_rpt_map & ~BIT(ap_id));/*H2C-0xBA*/
+	}
+	#endif
+}
+#endif
+#ifdef CONFIG_SWTIMER_BASED_TXBCN
+void rtw_ap_multi_bcn_cfg(_adapter *adapter)
+{
+	#if defined(CONFIG_RTL8822B) || defined(CONFIG_RTL8821C) || defined(CONFIG_RTL8822C)
+	rtw_write8(adapter, REG_BCN_CTRL, DIS_TSF_UDT);
+	#else
+	rtw_write8(adapter, REG_BCN_CTRL, DIS_TSF_UDT | DIS_BCNQ_SUB);
+	#endif
+	/*enable to rx data frame*/
+	rtw_write16(adapter, REG_RXFLTMAP2, 0xFFFF);
+
+	/*Beacon Control related register for first time*/
+	rtw_write8(adapter, REG_BCNDMATIM, 0x02); /* 2ms */
+
+	/*rtw_write8(Adapter, REG_BCN_MAX_ERR, 0xFF);*/
+	rtw_write8(adapter, REG_ATIMWND, 0x0c); /* 12ms */
+
+	#ifndef CONFIG_HW_P0_TSF_SYNC
+	rtw_write16(adapter, REG_TSFTR_SYN_OFFSET, 0x7fff);/* +32767 (~32ms) */
+	#endif
+
+	/*reset TSF*/
+	rtw_write8(adapter, REG_DUAL_TSF_RST, BIT(0));
+
+	/*enable BCN0 Function for if1*/
+	/*don't enable update TSF0 for if1 (due to TSF update when beacon,probe rsp are received)*/
+	#if defined(CONFIG_RTL8822B) || defined(CONFIG_RTL8821C) || defined(CONFIG_RTL8822C)
+	rtw_write8(adapter, REG_BCN_CTRL, BIT_DIS_RX_BSSID_FIT | BIT_P0_EN_TXBCN_RPT | BIT_DIS_TSF_UDT |BIT_EN_BCN_FUNCTION);
+	#else
+	rtw_write8(adapter, REG_BCN_CTRL, (DIS_TSF_UDT | EN_BCN_FUNCTION | EN_TXBCN_RPT | DIS_BCNQ_SUB));
+	#endif
+	#ifdef CONFIG_BCN_XMIT_PROTECT
+	rtw_write8(adapter, REG_CCK_CHECK, rtw_read8(adapter, REG_CCK_CHECK) | BIT_EN_BCN_PKT_REL);
+	#endif
+
+	if (IS_HARDWARE_TYPE_8821(adapter) || IS_HARDWARE_TYPE_8192E(adapter))/* select BCN on port 0 for DualBeacon*/
+		rtw_write8(adapter, REG_CCK_CHECK, rtw_read8(adapter, REG_CCK_CHECK) & (~BIT_BCN_PORT_SEL));
+
+	/* Enable HW seq for BCN 
+	 * 0x4FC[0]: EN_HWSEQ / 0x4FC[1]: EN_HWSEQEXT  */
+	#ifdef CONFIG_RTL8822B
+	if (IS_HARDWARE_TYPE_8822B(adapter))
+		rtw_write8(adapter, REG_DUMMY_PAGE4_V1_8822B, 0x01);
+	#endif
+}
+#endif
+
 #ifdef CONFIG_MI_WITH_MBSSID_CAM
 void rtw_hal_set_macaddr_mbid(_adapter *adapter, u8 *mac_addr)
 {
@@ -2644,7 +3156,8 @@ void rtw_hal_set_macaddr_mbid(_adapter *adapter, u8 *mac_addr)
 
 		if (entry_id != INVALID_CAM_ID) {
 			write_mbssid_cam(adapter, entry_id, mac_addr);
-			enable_mbssid_cam(adapter);
+			RTW_INFO("%s "ADPT_FMT"- mbid(%d) mac_addr ="MAC_FMT"\n", __func__,
+				ADPT_ARG(adapter), entry_id, MAC_ARG(mac_addr));
 		}
 	}
 #endif
@@ -2684,17 +3197,19 @@ static void rtw_hal_set_macaddr_port(_adapter *adapter, u8 *val)
 {
 	u8 idx = 0;
 	u32 reg_macid = 0;
+	enum _hw_port hwport;
 
 	if (val == NULL)
 		return;
+	hwport = get_hw_port(adapter);
 
 	RTW_INFO("%s "ADPT_FMT"- hw port(%d) mac_addr ="MAC_FMT"\n",  __func__,
-		 ADPT_ARG(adapter), adapter->hw_port, MAC_ARG(val));
+		 ADPT_ARG(adapter), hwport, MAC_ARG(val));
 
 #ifdef RTW_HALMAC
-	rtw_halmac_set_mac_address(adapter_to_dvobj(adapter), adapter->hw_port, val);
+	rtw_halmac_set_mac_address(adapter_to_dvobj(adapter), hwport, val);
 #else /* !RTW_HALMAC */
-	switch (adapter->hw_port) {
+	switch (hwport) {
 	case HW_PORT0:
 	default:
 		reg_macid = REG_MACID;
@@ -2715,7 +3230,7 @@ static void rtw_hal_set_macaddr_port(_adapter *adapter, u8 *val)
 #endif/*defined(CONFIG_RTL8814A)*/
 	}
 
-	for (idx = 0; idx < 6; idx++)
+	for (idx = 0; idx < ETH_ALEN; idx++)
 		rtw_write8(GET_PRIMARY_ADAPTER(adapter), (reg_macid + idx), val[idx]);
 #endif /* !RTW_HALMAC */
 }
@@ -2753,7 +3268,7 @@ static void rtw_hal_get_macaddr_port(_adapter *adapter, u8 *mac_addr)
 #endif /*defined(CONFIG_RTL8814A)*/
 	}
 
-	for (idx = 0; idx < 6; idx++)
+	for (idx = 0; idx < ETH_ALEN; idx++)
 		mac_addr[idx] = rtw_read8(GET_PRIMARY_ADAPTER(adapter), (reg_macid + idx));
 #endif /* !RTW_HALMAC */
 
@@ -2763,13 +3278,15 @@ static void rtw_hal_get_macaddr_port(_adapter *adapter, u8 *mac_addr)
 
 static void rtw_hal_set_bssid(_adapter *adapter, u8 *val)
 {
+	u8 hw_port = rtw_hal_get_port(adapter);
+
 #ifdef RTW_HALMAC
-	rtw_halmac_set_bssid(adapter_to_dvobj(adapter), adapter->hw_port, val);
+	rtw_halmac_set_bssid(adapter_to_dvobj(adapter), hw_port, val);
 #else /* !RTW_HALMAC */
 	u8	idx = 0;
 	u32 reg_bssid = 0;
 
-	switch (adapter->hw_port) {
+	switch (hw_port) {
 	case HW_PORT0:
 	default:
 		reg_bssid = REG_BSSID;
@@ -2777,7 +3294,7 @@ static void rtw_hal_set_bssid(_adapter *adapter, u8 *val)
 	case HW_PORT1:
 		reg_bssid = REG_BSSID1;
 		break;
-#if defined(CONFIG_RTL8814A) || defined(CONFIG_RTL8822B)
+#if defined(CONFIG_RTL8814A)
 	case HW_PORT2:
 		reg_bssid = REG_BSSID2;
 		break;
@@ -2787,14 +3304,211 @@ static void rtw_hal_set_bssid(_adapter *adapter, u8 *val)
 	case HW_PORT4:
 		reg_bssid = REG_BSSID4;
 		break;
-#endif/*defined(CONFIG_RTL8814A) || defined(CONFIG_RTL8822B)*/
+#endif/*defined(CONFIG_RTL8814A)*/
 	}
 
-	for (idx = 0 ; idx < 6; idx++)
+	for (idx = 0 ; idx < ETH_ALEN; idx++)
 		rtw_write8(adapter, (reg_bssid + idx), val[idx]);
 #endif /* !RTW_HALMAC */
 
-	RTW_INFO("%s "ADPT_FMT"- hw port -%d BSSID: "MAC_FMT"\n", __func__, ADPT_ARG(adapter), adapter->hw_port, MAC_ARG(val));
+	RTW_INFO("%s "ADPT_FMT"- hw port -%d BSSID: "MAC_FMT"\n",
+		__func__, ADPT_ARG(adapter), hw_port, MAC_ARG(val));
+}
+
+static void rtw_hal_set_tsf_update(_adapter *adapter, u8 en)
+{
+	u32 addr = 0;
+	u8 val8;
+
+	rtw_hal_get_hwreg(adapter, HW_VAR_BCN_CTRL_ADDR, (u8 *)&addr);
+	if (addr) {
+		val8 = rtw_read8(adapter, addr);
+		if (en && (val8 & DIS_TSF_UDT)) {
+			rtw_write8(adapter, addr, val8 & ~DIS_TSF_UDT);
+			#ifdef DBG_TSF_UPDATE
+			RTW_INFO("port%u("ADPT_FMT") enable TSF update\n", adapter->hw_port, ADPT_ARG(adapter));
+			#endif
+		}
+		if (!en && !(val8 & DIS_TSF_UDT)) {
+			rtw_write8(adapter, addr, val8 | DIS_TSF_UDT);
+			#ifdef DBG_TSF_UPDATE
+			RTW_INFO("port%u("ADPT_FMT") disable TSF update\n", adapter->hw_port, ADPT_ARG(adapter));
+			#endif
+		}
+	} else {
+		RTW_WARN("unknown port%d("ADPT_FMT") %s TSF update\n"
+			, adapter->hw_port, ADPT_ARG(adapter), en ? "enable" : "disable");
+		rtw_warn_on(1);
+	}
+}
+
+static void rtw_hal_set_hw_update_tsf(PADAPTER padapter)
+{
+	struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv;
+	struct mlme_priv *pmlmepriv = &padapter->mlmepriv;
+
+#if defined(CONFIG_RTL8822B) || defined(CONFIG_MI_WITH_MBSSID_CAM)
+	RTW_INFO("[Warn] %s "ADPT_FMT" enter func\n", __func__, ADPT_ARG(padapter));
+	rtw_warn_on(1);
+	return;
+#endif
+
+	if (!pmlmeext->en_hw_update_tsf)
+		return;
+
+	/* check RCR */
+	if (!rtw_hal_rcr_check(padapter, RCR_CBSSID_BCN))
+		return;
+
+	if (pmlmeext->tsf_update_required) {
+		pmlmeext->tsf_update_pause_stime = 0;
+		rtw_hal_set_tsf_update(padapter, 1);
+	}
+
+	pmlmeext->en_hw_update_tsf = 0;
+}
+
+void rtw_iface_enable_tsf_update(_adapter *adapter)
+{
+	adapter->mlmeextpriv.tsf_update_pause_stime = 0;
+	adapter->mlmeextpriv.tsf_update_required = 1;
+#ifdef CONFIG_MI_WITH_MBSSID_CAM
+
+#else
+	rtw_hal_set_tsf_update(adapter, 1);
+#endif
+}
+
+void rtw_iface_disable_tsf_update(_adapter *adapter)
+{
+	adapter->mlmeextpriv.tsf_update_required = 0;
+	adapter->mlmeextpriv.tsf_update_pause_stime = 0;
+	adapter->mlmeextpriv.en_hw_update_tsf = 0;
+#ifdef CONFIG_MI_WITH_MBSSID_CAM
+
+#else
+	rtw_hal_set_tsf_update(adapter, 0);
+#endif
+}
+
+static void rtw_hal_tsf_update_pause(_adapter *adapter)
+{
+#ifdef CONFIG_MI_WITH_MBSSID_CAM
+
+#else
+	struct dvobj_priv *dvobj = adapter_to_dvobj(adapter);
+	_adapter *iface;
+	int i;
+	u8 val8;
+
+	for (i = 0; i < dvobj->iface_nums; i++) {
+		iface = dvobj->padapters[i];
+		if (!iface)
+			continue;
+
+		rtw_hal_set_tsf_update(iface, 0);
+		if (iface->mlmeextpriv.tsf_update_required) {
+			iface->mlmeextpriv.tsf_update_pause_stime = rtw_get_current_time();
+			if (!iface->mlmeextpriv.tsf_update_pause_stime)
+				iface->mlmeextpriv.tsf_update_pause_stime++;
+		}
+		iface->mlmeextpriv.en_hw_update_tsf = 0;
+	}
+#endif
+}
+
+static void rtw_hal_tsf_update_restore(_adapter *adapter)
+{
+#ifdef CONFIG_MI_WITH_MBSSID_CAM
+
+#else
+	struct dvobj_priv *dvobj = adapter_to_dvobj(adapter);
+	_adapter *iface;
+	int i;
+
+	for (i = 0; i < dvobj->iface_nums; i++) {
+		iface = dvobj->padapters[i];
+		if (!iface)
+			continue;
+
+		if (iface->mlmeextpriv.tsf_update_required) {
+			/* enable HW TSF update when recive beacon*/
+			iface->mlmeextpriv.en_hw_update_tsf = 1;
+			#ifdef DBG_TSF_UPDATE
+			RTW_INFO("port%d("ADPT_FMT") enabling TSF update...\n"
+				, iface->hw_port, ADPT_ARG(iface));
+			#endif
+		}
+	}
+#endif
+}
+
+void rtw_hal_periodic_tsf_update_chk(_adapter *adapter)
+{
+#ifdef CONFIG_MI_WITH_MBSSID_CAM
+
+#else
+	struct dvobj_priv *dvobj = adapter_to_dvobj(adapter);
+	_adapter *iface;
+	struct mlme_ext_priv *mlmeext;
+	int i;
+	u32 restore_ms = 0;
+
+	if (dvobj->periodic_tsf_update_etime) {
+		if (rtw_time_after(rtw_get_current_time(), dvobj->periodic_tsf_update_etime)) {
+			/* end for restore status */
+			dvobj->periodic_tsf_update_etime = 0;
+			rtw_hal_rcr_set_chk_bssid(adapter, MLME_ACTION_NONE);
+		}
+		return;
+	}
+
+	if (dvobj->rf_ctl.offch_state != OFFCHS_NONE)
+		return;
+
+	/*
+	* all required ifaces can switch to restore status together
+	* loop all pause iface to get largest restore time required
+	*/
+	for (i = 0; i < dvobj->iface_nums; i++) {
+		iface = dvobj->padapters[i];
+		if (!iface)
+			continue;
+
+		mlmeext = &iface->mlmeextpriv;
+
+		if (mlmeext->tsf_update_required
+			&& mlmeext->tsf_update_pause_stime
+			&& rtw_get_passing_time_ms(mlmeext->tsf_update_pause_stime)
+				> mlmeext->mlmext_info.bcn_interval * mlmeext->tsf_update_pause_factor
+		) {
+			if (restore_ms < mlmeext->mlmext_info.bcn_interval * mlmeext->tsf_update_restore_factor)
+				restore_ms = mlmeext->mlmext_info.bcn_interval * mlmeext->tsf_update_restore_factor;
+		}
+	}
+
+	if (!restore_ms)
+		return;
+
+	dvobj->periodic_tsf_update_etime = rtw_get_current_time() + rtw_ms_to_systime(restore_ms);
+	if (!dvobj->periodic_tsf_update_etime)
+		dvobj->periodic_tsf_update_etime++;
+
+	rtw_hal_rcr_set_chk_bssid(adapter, MLME_ACTION_NONE);
+
+	/* set timer to end restore status */
+	_set_timer(&dvobj->periodic_tsf_update_end_timer, restore_ms);
+#endif
+}
+
+void rtw_hal_periodic_tsf_update_end_timer_hdl(void *ctx)
+{
+	struct dvobj_priv *dvobj = (struct dvobj_priv *)ctx;
+
+	if (dev_is_surprise_removed(dvobj) || dev_is_drv_stopped(dvobj))
+		return;
+
+	rtw_periodic_tsf_update_end_cmd(dvobj_get_primary_adapter(dvobj));
 }
 
 static inline u8 hw_var_rcr_config(_adapter *adapter, u32 rcr)
@@ -2868,13 +3582,14 @@ inline u8 rtw_hal_rcr_clear(_adapter *adapter, u32 clear)
 void rtw_hal_rcr_set_chk_bssid(_adapter *adapter, u8 self_action)
 {
 	HAL_DATA_TYPE *hal_data = GET_HAL_DATA(adapter);
+	struct hal_spec_t *hal_spec = GET_HAL_SPEC(adapter);
 	u32 rcr, rcr_new;
 	struct mi_state mstate, mstate_s;
 
 	rtw_hal_get_hwreg(adapter, HW_VAR_RCR, (u8 *)&rcr);
 	rcr_new = rcr;
 
-#ifdef CONFIG_MI_WITH_MBSSID_CAM
+#if defined(CONFIG_MI_WITH_MBSSID_CAM) && !defined(CONFIG_CLIENT_PORT_CFG)
 	rcr_new &= ~(RCR_CBSSID_BCN | RCR_CBSSID_DATA);
 #else
 	rtw_mi_status_no_self(adapter, &mstate);
@@ -2889,6 +3604,18 @@ void rtw_hal_rcr_set_chk_bssid(_adapter *adapter, u8 self_action)
 	case MLME_SCAN_DONE:
 		mstate_s.scan_enter_num = 0;
 		break;
+	case MLME_STA_CONNECTING:
+		mstate_s.lg_sta_num = 1;
+		mstate_s.ld_sta_num = 0;
+		break;
+	case MLME_STA_CONNECTED:
+		mstate_s.lg_sta_num = 0;
+		mstate_s.ld_sta_num = 1;
+		break;
+	case MLME_STA_DISCONNECTED:
+		mstate_s.lg_sta_num = 0;
+		mstate_s.ld_sta_num = 0;
+		break;
 #ifdef CONFIG_TDLS
 	case MLME_TDLS_LINKED:
 		mstate_s.ld_tdls_num = 1;
@@ -2916,7 +3643,6 @@ void rtw_hal_rcr_set_chk_bssid(_adapter *adapter, u8 self_action)
 		break;
 #endif
 	case MLME_ACTION_NONE:
-	case MLME_STA_CONNECTING:
 	case MLME_ADHOC_STARTED:
 		/* caller without effect of decision */
 		break;
@@ -2936,18 +3662,38 @@ void rtw_hal_rcr_set_chk_bssid(_adapter *adapter, u8 self_action)
 	else
 		rcr_new |= RCR_CBSSID_DATA;
 
-	if ((MSTATE_AP_NUM(&mstate) && adapter->registrypriv.wifi_spec) /* for 11n Logo 4.2.31/4.2.32 */
+	if (MSTATE_SCAN_ENTER_NUM(&mstate) || hal_data->in_cta_test)
+		rcr_new &= ~RCR_CBSSID_BCN;
+	else if (MSTATE_STA_LG_NUM(&mstate)
+		|| adapter_to_dvobj(adapter)->periodic_tsf_update_etime
+	)
+		rcr_new |= RCR_CBSSID_BCN;
+	else if ((MSTATE_AP_NUM(&mstate) && adapter->registrypriv.wifi_spec) /* for 11n Logo 4.2.31/4.2.32 */
 		|| MSTATE_MESH_NUM(&mstate)
-		|| MSTATE_SCAN_ENTER_NUM(&mstate)
-		|| hal_data->in_cta_test
 	)
 		rcr_new &= ~RCR_CBSSID_BCN;	
 	else
 		rcr_new |= RCR_CBSSID_BCN;
+
+	#ifdef CONFIG_CLIENT_PORT_CFG
+	if (get_clt_num(adapter) > MAX_CLIENT_PORT_NUM)
+		rcr_new &= ~RCR_CBSSID_BCN;
+	#endif
 #endif /* CONFIG_MI_WITH_MBSSID_CAM */
 
-	if (rcr != rcr_new)
-		rtw_hal_set_hwreg(adapter, HW_VAR_RCR, (u8 *)&rcr_new);
+	if (rcr == rcr_new)
+		return;
+
+	if (!hal_spec->rx_tsf_filter
+		&& (rcr & RCR_CBSSID_BCN) && !(rcr_new & RCR_CBSSID_BCN))
+		rtw_hal_tsf_update_pause(adapter);
+
+	rtw_hal_set_hwreg(adapter, HW_VAR_RCR, (u8 *)&rcr_new);
+
+	if (!hal_spec->rx_tsf_filter
+		&& !(rcr & RCR_CBSSID_BCN) && (rcr_new & RCR_CBSSID_BCN)
+		&& self_action != MLME_STA_CONNECTING)
+		rtw_hal_tsf_update_restore(adapter);
 }
 
 static void hw_var_set_rcr_am(_adapter *adapter, u8 enable)
@@ -2960,118 +3706,29 @@ static void hw_var_set_rcr_am(_adapter *adapter, u8 enable)
 		rtw_hal_rcr_clear(adapter, rcr);
 }
 
-static void rtw_hal_get_msr(_adapter *adapter, u8 *net_type)
+static void hw_var_set_bcn_interval(_adapter *adapter, u16 interval)
 {
-#ifdef RTW_HALMAC
-	rtw_halmac_get_network_type(adapter_to_dvobj(adapter),
-				adapter->hw_port, net_type);
-#else /* !RTW_HALMAC */
-	switch (adapter->hw_port) {
-	case HW_PORT0:
-		/*REG_CR - BIT[17:16]-Network Type for port 1*/
-		*net_type = rtw_read8(adapter, MSR) & 0x03;
-		break;
-	case HW_PORT1:
-		/*REG_CR - BIT[19:18]-Network Type for port 1*/
-		*net_type = (rtw_read8(adapter, MSR) & 0x0C) >> 2;
-		break;
-#if defined(CONFIG_RTL8814A) || defined(CONFIG_RTL8822B)
-	case HW_PORT2:
-		/*REG_CR_EXT- BIT[1:0]-Network Type for port 2*/
-		*net_type = rtw_read8(adapter, MSR1) & 0x03;
-		break;
-	case HW_PORT3:
-		/*REG_CR_EXT- BIT[3:2]-Network Type for port 3*/
-		*net_type = (rtw_read8(adapter, MSR1) & 0x0C) >> 2;
-		break;
-	case HW_PORT4:
-		/*REG_CR_EXT- BIT[5:4]-Network Type for port 4*/
-		*net_type = (rtw_read8(adapter, MSR1) & 0x30) >> 4;
-		break;
-#endif /*#if defined(CONFIG_RTL8814A) || defined(CONFIG_RTL8822B)*/
-	default:
-		RTW_INFO("[WARN] "ADPT_FMT"- invalid hw port -%d\n",
-			 ADPT_ARG(adapter), adapter->hw_port);
-		rtw_warn_on(1);
-		break;
-	}
-#endif /* !RTW_HALMAC */
-}
-
-#if defined(CONFIG_MI_WITH_MBSSID_CAM) && defined(CONFIG_MBSSID_CAM) /*For 2 hw ports - 88E/92E/8812/8821/8723B*/
-static u8 rtw_hal_net_type_decision(_adapter *adapter, u8 net_type)
-{
-	if ((adapter->hw_port == HW_PORT0) && (rtw_get_mbid_cam_entry_num(adapter))) {
-		if (net_type != _HW_STATE_NOLINK_)
-			return _HW_STATE_AP_;
-	}
-	return net_type;
-}
+#ifdef CONFIG_SWTIMER_BASED_TXBCN
+	interval = rtw_hal_bcn_interval_adjust(adapter, interval);
 #endif
-static void rtw_hal_set_msr(_adapter *adapter, u8 net_type)
-{
+
 #ifdef RTW_HALMAC
-	#if defined(CONFIG_MI_WITH_MBSSID_CAM) && defined(CONFIG_MBSSID_CAM)
-	net_type = rtw_hal_net_type_decision(adapter, net_type);
-	#endif
-	rtw_halmac_set_network_type(adapter_to_dvobj(adapter),
-				adapter->hw_port, net_type);
-#else /* !RTW_HALMAC */
-	u8 val8 = 0;
+	rtw_halmac_set_bcn_interval(adapter_to_dvobj(adapter), adapter->hw_port, interval);
+#else
+	rtw_write16(adapter, REG_MBSSID_BCN_SPACE, interval);
+#endif
 
-	switch (adapter->hw_port) {
-	case HW_PORT0:
-		#if defined(CONFIG_MI_WITH_MBSSID_CAM) && defined(CONFIG_MBSSID_CAM)
-		net_type = rtw_hal_net_type_decision(adapter, net_type);
-		#endif
-		/*REG_CR - BIT[17:16]-Network Type for port 0*/
-		val8 = rtw_read8(adapter, MSR) & 0x0C;
-		val8 |= net_type;
-		rtw_write8(adapter, MSR, val8);
-		break;
-	case HW_PORT1:
-		/*REG_CR - BIT[19:18]-Network Type for port 1*/
-		val8 = rtw_read8(adapter, MSR) & 0x03;
-		val8 |= net_type << 2;
-		rtw_write8(adapter, MSR, val8);
-		break;
-#if defined(CONFIG_RTL8814A) || defined(CONFIG_RTL8822B) || defined(CONFIG_RTL8821C)
-	case HW_PORT2:
-		/*REG_CR_EXT- BIT[1:0]-Network Type for port 2*/
-		val8 = rtw_read8(adapter, MSR1) & 0xFC;
-		val8 |= net_type;
-		rtw_write8(adapter, MSR1, val8);
-		break;
-	case HW_PORT3:
-		/*REG_CR_EXT- BIT[3:2]-Network Type for port 3*/
-		val8 = rtw_read8(adapter, MSR1) & 0xF3;
-		val8 |= net_type << 2;
-		rtw_write8(adapter, MSR1, val8);
-		break;
-	case HW_PORT4:
-		/*REG_CR_EXT- BIT[5:4]-Network Type for port 4*/
-		val8 = rtw_read8(adapter, MSR1) & 0xCF;
-		val8 |= net_type << 4;
-		rtw_write8(adapter, MSR1, val8);
-		break;
-#endif /* CONFIG_RTL8814A | CONFIG_RTL8822B */
-	default:
-		RTW_INFO("[WARN] "ADPT_FMT"- invalid hw port -%d\n",
-			 ADPT_ARG(adapter), adapter->hw_port);
-		rtw_warn_on(1);
-		break;
-	}
-#endif /* !RTW_HALMAC */
-}
+#ifdef CONFIG_INTERRUPT_BASED_TXBCN_EARLY_INT
+	{
+		struct mlme_ext_priv	*pmlmeext = &adapter->mlmeextpriv;
+		struct mlme_ext_info	*pmlmeinfo = &(pmlmeext->mlmext_info);
 
-static void hw_var_set_bcn_interval(struct _ADAPTER *a, u16 interval)
-{
-#ifdef RTW_HALMAC
-	rtw_halmac_set_bcn_interval(adapter_to_dvobj(a), a->hw_port, interval);
-#else /* !RTW_HALMAC */
-	RTW_ERR(FUNC_ADPT_FMT ": Not implemented yet!!\n", FUNC_ADPT_ARG(a));
-	rtw_warn_on(1);
-#endif /* !RTW_HALMAC */
+		if ((pmlmeinfo->state & 0x03) == WIFI_FW_AP_STATE) {
+			RTW_INFO("%s==> bcn_interval:%d, eraly_int:%d\n", __func__, interval, interval >> 1);
+			rtw_write8(adapter, REG_DRVERLYINT, interval >> 1);
+		}
+	}
+#endif
 }
 
 void hw_var_port_switch(_adapter *adapter)
@@ -3104,6 +3761,10 @@ void hw_var_port_switch(_adapter *adapter)
 	u8 bssid[6];
 	u8 macid_1[6];
 	u8 bssid_1[6];
+#if defined(CONFIG_RTL8192F)
+	u16 wlan_act_mask_ctrl = 0;
+	u16 en_port_mask = EN_PORT_0_FUNCTION | EN_PORT_1_FUNCTION;
+#endif
 
 	u8 hw_port;
 	struct dvobj_priv *dvobj = adapter_to_dvobj(adapter);
@@ -3112,6 +3773,9 @@ void hw_var_port_switch(_adapter *adapter)
 	msr = rtw_read8(adapter, MSR);
 	bcn_ctrl = rtw_read8(adapter, REG_BCN_CTRL);
 	bcn_ctrl_1 = rtw_read8(adapter, REG_BCN_CTRL_1);
+#if defined(CONFIG_RTL8192F)
+	wlan_act_mask_ctrl = rtw_read16(adapter, REG_WLAN_ACT_MASK_CTRL_1);
+#endif
 
 	for (i = 0; i < 2; i++)
 		atimwnd[i] = rtw_read8(adapter, REG_ATIMWND + i);
@@ -3140,6 +3804,9 @@ void hw_var_port_switch(_adapter *adapter)
 		 "msr:0x%02x\n"
 		 "bcn_ctrl:0x%02x\n"
 		 "bcn_ctrl_1:0x%02x\n"
+#if defined(CONFIG_RTL8192F)
+		 "wlan_act_mask_ctrl:0x%02x\n"
+#endif
 		 "atimwnd:0x%04x\n"
 		 "atimwnd_1:0x%04x\n"
 		 "tsftr:%llu\n"
@@ -3152,6 +3819,9 @@ void hw_var_port_switch(_adapter *adapter)
 		 , msr
 		 , bcn_ctrl
 		 , bcn_ctrl_1
+#if defined(CONFIG_RTL8192F)
+		 , wlan_act_mask_ctrl
+#endif
 		 , *((u16 *)atimwnd)
 		 , *((u16 *)atimwnd_1)
 		 , *((u64 *)tsftr)
@@ -3167,6 +3837,10 @@ void hw_var_port_switch(_adapter *adapter)
 	rtw_write8(adapter, REG_BCN_CTRL, (bcn_ctrl & (~EN_BCN_FUNCTION)) | DIS_TSF_UDT);
 	rtw_write8(adapter, REG_BCN_CTRL_1, (bcn_ctrl_1 & (~EN_BCN_FUNCTION)) | DIS_TSF_UDT);
 
+#if defined(CONFIG_RTL8192F)
+	rtw_write16(adapter, REG_WLAN_ACT_MASK_CTRL_1, wlan_act_mask_ctrl & ~en_port_mask);
+#endif
+
 	/* switch msr */
 	msr = (msr & 0xf0) | ((msr & 0x03) << 2) | ((msr & 0x0c) >> 2);
 	rtw_write8(adapter, MSR, msr);
@@ -3206,6 +3880,14 @@ void hw_var_port_switch(_adapter *adapter)
 	rtw_write8(adapter, REG_BCN_CTRL, bcn_ctrl_1);
 	rtw_write8(adapter, REG_BCN_CTRL_1, bcn_ctrl);
 
+#if defined(CONFIG_RTL8192F)
+	/* if the setting of port0 and port1 are the same, it does not need to switch port setting*/
+	if(((wlan_act_mask_ctrl & en_port_mask) != 0) && ((wlan_act_mask_ctrl & en_port_mask)
+		!= (EN_PORT_0_FUNCTION | EN_PORT_1_FUNCTION)))
+		wlan_act_mask_ctrl ^= en_port_mask;
+	rtw_write16(adapter, REG_WLAN_ACT_MASK_CTRL_1, wlan_act_mask_ctrl);
+#endif
+
 	if (adapter->iface_id == IFACE_ID0)
 		iface = dvobj->padapters[IFACE_ID1];
 	else if (adapter->iface_id == IFACE_ID1)
@@ -3228,6 +3910,9 @@ void hw_var_port_switch(_adapter *adapter)
 	msr = rtw_read8(adapter, MSR);
 	bcn_ctrl = rtw_read8(adapter, REG_BCN_CTRL);
 	bcn_ctrl_1 = rtw_read8(adapter, REG_BCN_CTRL_1);
+#if defined(CONFIG_RTL8192F)
+	wlan_act_mask_ctrl = rtw_read16(adapter, REG_WLAN_ACT_MASK_CTRL_1);
+#endif
 
 	for (i = 0; i < 2; i++)
 		atimwnd[i] = rtw_read8(adapter, REG_ATIMWND + i);
@@ -3255,6 +3940,9 @@ void hw_var_port_switch(_adapter *adapter)
 		 "msr:0x%02x\n"
 		 "bcn_ctrl:0x%02x\n"
 		 "bcn_ctrl_1:0x%02x\n"
+#if defined(CONFIG_RTL8192F)
+		 "wlan_act_mask_ctrl:0x%02x\n"
+#endif
 		 "atimwnd:%u\n"
 		 "atimwnd_1:%u\n"
 		 "tsftr:%llu\n"
@@ -3267,6 +3955,9 @@ void hw_var_port_switch(_adapter *adapter)
 		 , msr
 		 , bcn_ctrl
 		 , bcn_ctrl_1
+#if defined(CONFIG_RTL8192F)
+		 , wlan_act_mask_ctrl
+#endif
 		 , *((u16 *)atimwnd)
 		 , *((u16 *)atimwnd_1)
 		 , *((u64 *)tsftr)
@@ -3300,15 +3991,21 @@ s32 rtw_hal_set_default_port_id_cmd(_adapter *adapter, u8 mac_id)
 	s32 ret = _SUCCESS;
 	u8 parm[H2C_DEFAULT_PORT_ID_LEN] = {0};
 	struct dvobj_priv *dvobj = adapter_to_dvobj(adapter);
+	u8 port_id = rtw_hal_get_port(adapter);
+
+	if ((dvobj->dft.port_id == port_id) && (dvobj->dft.mac_id == mac_id))
+		return ret;
 
-	SET_H2CCMD_DFTPID_PORT_ID(parm, adapter->hw_port);
+	SET_H2CCMD_DFTPID_PORT_ID(parm, port_id);
 	SET_H2CCMD_DFTPID_MAC_ID(parm, mac_id);
 
 	RTW_DBG_DUMP("DFT port id parm:", parm, H2C_DEFAULT_PORT_ID_LEN);
-	RTW_INFO("%s port_id :%d, mad_id:%d\n", __func__, adapter->hw_port, mac_id);
+	RTW_INFO("%s ("ADPT_FMT") port_id :%d, mad_id:%d\n",
+		__func__, ADPT_ARG(adapter), port_id, mac_id);
 
 	ret = rtw_hal_fill_h2c_cmd(adapter, H2C_DEFAULT_PORT_ID, H2C_DEFAULT_PORT_ID_LEN, parm);
-	dvobj->default_port_id = adapter->hw_port;
+	dvobj->dft.port_id = port_id;
+	dvobj->dft.mac_id = mac_id;
 
 	return ret;
 }
@@ -3317,12 +4014,8 @@ s32 rtw_set_default_port_id(_adapter *adapter)
 	s32 ret = _SUCCESS;
 	struct sta_info		*psta;
 	struct mlme_priv *pmlmepriv = &adapter->mlmepriv;
-	struct dvobj_priv *dvobj = adapter_to_dvobj(adapter);
-
-	if (adapter->hw_port == dvobj->default_port_id)
-		return ret;
 
-	if (check_fwstate(pmlmepriv, WIFI_STATION_STATE) == _TRUE) {
+	if (is_client_associated_to_ap(adapter)) {
 		psta = rtw_get_stainfo(&adapter->stapriv, get_bssid(pmlmepriv));
 		if (psta)
 			ret = rtw_hal_set_default_port_id_cmd(adapter, psta->cmn.mac_id);
@@ -3337,9 +4030,9 @@ s32 rtw_set_ps_rsvd_page(_adapter *adapter)
 {
 	s32 ret = _SUCCESS;
 	u16 media_status_rpt = RT_MEDIA_CONNECT;
-	struct dvobj_priv *dvobj = adapter_to_dvobj(adapter);
+	struct pwrctrl_priv *pwrctl = adapter_to_pwrctl(adapter);
 
-	if (adapter->hw_port == dvobj->default_port_id)
+	if (adapter->iface_id == pwrctl->fw_psmode_iface_id)
 		return ret;
 
 	rtw_hal_set_hwreg(adapter, HW_VAR_H2C_FW_JOINBSSRPT,
@@ -3348,7 +4041,123 @@ s32 rtw_set_ps_rsvd_page(_adapter *adapter)
 	return ret;
 }
 
+#if 0
+_adapter * _rtw_search_dp_iface(_adapter *adapter)
+{
+	struct dvobj_priv *dvobj = adapter_to_dvobj(adapter);
+	_adapter *iface;
+	_adapter *target_iface = NULL;
+	int i;
+	u8 sta_num = 0, tdls_num = 0, ap_num = 0, mesh_num = 0, adhoc_num = 0;
+	u8 p2p_go_num = 0, p2p_gc_num = 0;
+	_adapter *sta_ifs[8];
+	_adapter *ap_ifs[8];
+	_adapter *mesh_ifs[8];
+	_adapter *gc_ifs[8];
+	_adapter *go_ifs[8];
+
+	for (i = 0; i < dvobj->iface_nums; i++) {
+		iface = dvobj->padapters[i];
+
+		if (check_fwstate(&iface->mlmepriv, WIFI_STATION_STATE) == _TRUE) {
+			if (check_fwstate(&iface->mlmepriv, _FW_LINKED) == _TRUE) {
+				sta_ifs[sta_num++] = iface;
+
+				#ifdef CONFIG_TDLS
+				if (iface->tdlsinfo.link_established == _TRUE)
+					tdls_num++;
+				#endif
+				#ifdef CONFIG_P2P
+				if (MLME_IS_GC(iface))
+					gc_ifs[p2p_gc_num++] = iface;
+				#endif
+			}
+#ifdef CONFIG_AP_MODE
+		} else if (check_fwstate(&iface->mlmepriv, WIFI_AP_STATE) == _TRUE ) {
+			if (check_fwstate(&iface->mlmepriv, _FW_LINKED) == _TRUE) {
+				ap_ifs[ap_num++] = iface;
+				#ifdef CONFIG_P2P
+				if (MLME_IS_GO(iface))
+					go_ifs[p2p_go_num++] = iface;
+				#endif
+			}
+#endif
+		} else if (check_fwstate(&iface->mlmepriv, WIFI_ADHOC_STATE | WIFI_ADHOC_MASTER_STATE) == _TRUE
+			&& check_fwstate(&iface->mlmepriv, _FW_LINKED) == _TRUE
+		) {
+			adhoc_num++;
+
+#ifdef CONFIG_RTW_MESH
+		} else if (check_fwstate(&iface->mlmepriv, WIFI_MESH_STATE) == _TRUE
+			&& check_fwstate(&iface->mlmepriv, _FW_LINKED) == _TRUE
+		) {
+			mesh_ifs[mesh_num++] = iface;
+#endif
+		}
+	}
+
+	if (p2p_gc_num) {
+		target_iface = gc_ifs[0];
+	}
+	else if (sta_num) {
+		if(sta_num == 1) {
+			target_iface = sta_ifs[0];
+		} else if (sta_num >= 2) {
+			/*TODO get target_iface by timestamp*/
+			target_iface = sta_ifs[0];
+		}
+	} else if (ap_num) {
+		target_iface = ap_ifs[0];
+	}
+
+	RTW_INFO("[IFS_ASSOC_STATUS] - STA :%d", sta_num);
+	RTW_INFO("[IFS_ASSOC_STATUS] - TDLS :%d", tdls_num);
+	RTW_INFO("[IFS_ASSOC_STATUS] - AP:%d", ap_num);
+	RTW_INFO("[IFS_ASSOC_STATUS] - MESH :%d", mesh_num);
+	RTW_INFO("[IFS_ASSOC_STATUS] - ADHOC :%d", adhoc_num);
+	RTW_INFO("[IFS_ASSOC_STATUS] - P2P-GC :%d", p2p_gc_num);
+	RTW_INFO("[IFS_ASSOC_STATUS] - P2P-GO :%d", p2p_go_num);
+
+	if (target_iface)
+		RTW_INFO("%s => target_iface ("ADPT_FMT")\n",
+			__func__, ADPT_ARG(target_iface));
+	else
+		RTW_INFO("%s => target_iface NULL\n", __func__);
+
+	return target_iface;
+}
+
+void rtw_search_default_port(_adapter *adapter)
+{
+	struct dvobj_priv *dvobj = adapter_to_dvobj(adapter);
+	_adapter *adp_iface = NULL;
+#ifdef CONFIG_WOWLAN
+	struct pwrctrl_priv *pwrpriv = dvobj_to_pwrctl(dvobj);
+
+	if (pwrpriv->wowlan_mode == _TRUE) {
+		adp_iface = adapter;
+		goto exit;
+	}
+#endif
+	adp_iface = _rtw_search_dp_iface(adapter);
+
+exit :
+	if ((adp_iface != NULL) && (MLME_IS_STA(adp_iface)))
+		rtw_set_default_port_id(adp_iface);
+	else
+		rtw_hal_set_default_port_id_cmd(adapter, 0);
+
+	if (1) {
+		_adapter *tmp_adp;
+
+		tmp_adp = (adp_iface) ? adp_iface : adapter;
+
+		RTW_INFO("%s ("ADPT_FMT")=> hw_port :%d, default_port(%d)\n",
+			__func__, ADPT_ARG(adapter), get_hw_port(tmp_adp), get_dft_portid(tmp_adp));
+	}
+}
 #endif
+#endif /*CONFIG_FW_MULTI_PORT_SUPPORT*/
 
 #ifdef CONFIG_P2P_PS
 #ifdef RTW_HALMAC
@@ -3364,11 +4173,12 @@ void rtw_set_p2p_ps_offload_cmd(_adapter *adapter, u8 p2p_ps_state)
 	HAL_P2P_PS_PARA p2p_ps_para;
 	int status = -1;
 	u8 i;
+	u8 hw_port = rtw_hal_get_port(adapter);
 
 	_rtw_memset(&p2p_ps_para, 0, sizeof(HAL_P2P_PS_PARA));
 	_rtw_memcpy((&p2p_ps_para) , &hal->p2p_ps_offload , sizeof(hal->p2p_ps_offload));
 
-	(&p2p_ps_para)->p2p_port_id = adapter->hw_port;
+	(&p2p_ps_para)->p2p_port_id = hw_port;
 	(&p2p_ps_para)->p2p_group = 0;
 	psta = rtw_get_stainfo(pstapriv, cur_network->MacAddress);
 	if (psta) {
@@ -3412,6 +4222,13 @@ void rtw_set_p2p_ps_offload_cmd(_adapter *adapter, u8 p2p_ps_state)
 			/* To control the register setting for which NOA */
 			(&p2p_ps_para)->noa_sel = i;
 			(&p2p_ps_para)->noa_en = 1;
+			(&p2p_ps_para)->disable_close_rf = 0;
+#ifdef CONFIG_P2P_PS_NOA_USE_MACID_SLEEP
+#ifdef CONFIG_CONCURRENT_MODE
+			if (rtw_mi_buddy_check_fwstate(adapter, WIFI_ASOC_STATE))
+#endif /* CONFIG_CONCURRENT_MODE */
+				(&p2p_ps_para)->disable_close_rf = 1;
+#endif /* CONFIG_P2P_PS_NOA_USE_MACID_SLEEP */
 			/* config P2P NoA Descriptor Register */
 			/* config NOA duration */
 			(&p2p_ps_para)->noa_duration_para = pwdinfo->noa_duration[i];
@@ -3493,6 +4310,9 @@ s32 rtw_hal_set_FwMediaStatusRpt_cmd(_adapter *adapter, bool opmode, bool miraca
 	u8 parm[H2C_MEDIA_STATUS_RPT_LEN] = {0};
 	int i;
 	s32 ret;
+#ifdef CONFIG_FW_MULTI_PORT_SUPPORT
+	u8 hw_port = rtw_hal_get_port(adapter);
+#endif
 
 	SET_H2CCMD_MSRRPT_PARM_OPMODE(parm, opmode);
 	SET_H2CCMD_MSRRPT_PARM_MACID_IND(parm, macid_ind);
@@ -3502,7 +4322,7 @@ s32 rtw_hal_set_FwMediaStatusRpt_cmd(_adapter *adapter, bool opmode, bool miraca
 	SET_H2CCMD_MSRRPT_PARM_MACID(parm, macid);
 	SET_H2CCMD_MSRRPT_PARM_MACID_END(parm, macid_end);
 #ifdef CONFIG_FW_MULTI_PORT_SUPPORT
-	SET_H2CCMD_MSRRPT_PARM_PORT_NUM(parm, adapter->hw_port);
+	SET_H2CCMD_MSRRPT_PARM_PORT_NUM(parm, hw_port);
 #endif
 	RTW_DBG_DUMP("MediaStatusRpt parm:", parm, H2C_MEDIA_STATUS_RPT_LEN);
 
@@ -3601,8 +4421,10 @@ void rtw_hal_switch_gpio_wl_ctrl(_adapter *padapter, u8 index, u8 enable)
 {
 	PHAL_DATA_TYPE pHalData = GET_HAL_DATA(padapter);
 
-	if (IS_8723D_SERIES(pHalData->version_id) || IS_8822B_SERIES(pHalData->version_id))
-		rtw_hal_set_hwreg(padapter, HW_SET_GPIO_WL_CTRL, (u8 *)(&enable));
+	if (IS_8723D_SERIES(pHalData->version_id) || IS_8192F_SERIES(pHalData->version_id)
+		|| IS_8822B_SERIES(pHalData->version_id) || IS_8821C_SERIES(pHalData->version_id)
+		|| IS_8822C_SERIES(pHalData->version_id))
+			rtw_hal_set_hwreg(padapter, HW_SET_GPIO_WL_CTRL, (u8 *)(&enable));
 	/*
 	* Switch GPIO_13, GPIO_14 to wlan control, or pull GPIO_13,14 MUST fail.
 	* It happended at 8723B/8192E/8821A. New IC will check multi function GPIO,
@@ -3621,6 +4443,9 @@ void rtw_hal_switch_gpio_wl_ctrl(_adapter *padapter, u8 index, u8 enable)
 
 void rtw_hal_set_output_gpio(_adapter *padapter, u8 index, u8 outputval)
 {
+#if defined(CONFIG_RTL8192F)
+	rtw_hal_set_hwreg(padapter, HW_VAR_WOW_OUTPUT_GPIO, (u8 *)(&index));
+#else
 	if (index <= 7) {
 		/* config GPIO mode */
 		rtw_write8(padapter, REG_GPIO_PIN_CTRL + 3,
@@ -3670,9 +4495,13 @@ void rtw_hal_set_output_gpio(_adapter *padapter, u8 index, u8 outputval)
 		RTW_INFO("%s: invalid GPIO%d=%d\n",
 			 __FUNCTION__, index, outputval);
 	}
+#endif
 }
 void rtw_hal_set_input_gpio(_adapter *padapter, u8 index)
 {
+#if defined(CONFIG_RTL8192F)
+	rtw_hal_set_hwreg(padapter, HW_VAR_WOW_INPUT_GPIO, (u8 *)(&index));
+#else
 	if (index <= 7) {
 		/* config GPIO mode */
 		rtw_write8(padapter, REG_GPIO_PIN_CTRL + 3,
@@ -3703,7 +4532,7 @@ void rtw_hal_set_input_gpio(_adapter *padapter, u8 index)
 			rtw_read8(padapter, REG_GPIO_PIN_CTRL_2 + 2) & ~BIT(index));
 	} else
 		RTW_INFO("%s: invalid GPIO%d\n", __func__, index);
-
+#endif
 }
 
 #endif
@@ -3732,19 +4561,11 @@ void rtw_hal_set_FwAoacRsvdPage_cmd(PADAPTER padapter, PRSVDPAGE_LOC rsvdpageloc
 							rsvdpageloc->LocNbrAdv);
 		SET_H2CCMD_AOAC_RSVDPAGE_LOC_NDP_INFO(u1H2CAoacRsvdPageParm,
 						      rsvdpageloc->LocNDPInfo);
-
-		if (rtw_is_support_gtk_offload(padapter)) {
-			SET_H2CCMD_AOAC_RSVDPAGE_LOC_GTK_RSP(
-					u1H2CAoacRsvdPageParm,
-					rsvdpageloc->LocGTKRsp);
-			SET_H2CCMD_AOAC_RSVDPAGE_LOC_GTK_INFO(
-					u1H2CAoacRsvdPageParm,
-					rsvdpageloc->LocGTKInfo);
-			SET_H2CCMD_AOAC_RSVDPAGE_LOC_GTK_EXT_MEM(
-					u1H2CAoacRsvdPageParm,
-					rsvdpageloc->LocGTKEXTMEM);
-		}
-
+#ifdef CONFIG_GTK_OL
+		SET_H2CCMD_AOAC_RSVDPAGE_LOC_GTK_RSP(u1H2CAoacRsvdPageParm, rsvdpageloc->LocGTKRsp);
+		SET_H2CCMD_AOAC_RSVDPAGE_LOC_GTK_INFO(u1H2CAoacRsvdPageParm, rsvdpageloc->LocGTKInfo);
+		SET_H2CCMD_AOAC_RSVDPAGE_LOC_GTK_EXT_MEM(u1H2CAoacRsvdPageParm, rsvdpageloc->LocGTKEXTMEM);
+#endif /* CONFIG_GTK_OL */
 		ret = rtw_hal_fill_h2c_cmd(padapter,
 					   H2C_AOAC_RSVD_PAGE,
 					   H2C_AOAC_RSVDPAGE_LOC_LEN,
@@ -3779,6 +4600,26 @@ void rtw_hal_set_FwAoacRsvdPage_cmd(PADAPTER padapter, PRSVDPAGE_LOC rsvdpageloc
 #endif /* CONFIG_WOWLAN */
 }
 
+#ifdef DBG_FW_DEBUG_MSG_PKT
+void rtw_hal_set_fw_dbg_msg_pkt_rsvd_page_cmd(PADAPTER padapter, PRSVDPAGE_LOC rsvdpageloc)
+{
+	struct	hal_ops *pHalFunc = &padapter->hal_func;
+	u8	u1H2C_fw_dbg_msg_pkt_parm[H2C_FW_DBG_MSG_PKT_LEN] = {0};
+	u8	ret = 0;
+
+
+	RTW_INFO("RsvdPageLoc: loc_fw_dbg_msg_pkt =%d\n", rsvdpageloc->loc_fw_dbg_msg_pkt);
+
+	SET_H2CCMD_FW_DBG_MSG_PKT_EN(u1H2C_fw_dbg_msg_pkt_parm, 1);
+	SET_H2CCMD_RSVDPAGE_LOC_FW_DBG_MSG_PKT(u1H2C_fw_dbg_msg_pkt_parm, rsvdpageloc->loc_fw_dbg_msg_pkt);
+	ret = rtw_hal_fill_h2c_cmd(padapter,
+				   H2C_FW_DBG_MSG_PKT,
+				   H2C_FW_DBG_MSG_PKT_LEN,
+				   u1H2C_fw_dbg_msg_pkt_parm);
+
+}
+#endif /*DBG_FW_DEBUG_MSG_PKT*/
+
 /*#define DBG_GET_RSVD_PAGE*/
 int rtw_hal_get_rsvd_page(_adapter *adapter, u32 page_offset,
 	u32 page_num, u8 *buffer, u32 buffer_size)
@@ -3789,6 +4630,14 @@ int rtw_hal_get_rsvd_page(_adapter *adapter, u32 page_offset,
 	u8 i = 0;
 	bool rst = _FALSE;
 
+#ifdef DBG_LA_MODE
+	struct registry_priv *registry_par = &adapter->registrypriv;
+
+	if(registry_par->la_mode_en == 1) {
+		RTW_INFO("%s LA debug mode can't dump rsvd pg \n", __func__);
+		return rst;
+	}
+#endif
 	rtw_hal_get_def_var(adapter, HAL_DEF_TX_PAGE_SIZE, &page_size);
 
 	addr = page_offset * page_size;
@@ -3867,7 +4716,7 @@ void rtw_dump_rsvd_page(void *sel, _adapter *adapter, u8 page_offset, u8 page_nu
 void rtw_dump_fifo(void *sel, _adapter *adapter, u8 fifo_sel, u32 fifo_addr, u32 fifo_size)
 {
 	u8 *buffer = NULL;
-	u8 buff_size = 0;
+	u32 buff_size = 0;
 	static const char * const fifo_sel_str[] = {
 		"TX", "RX", "RSVD_PAGE", "REPORT", "LLT", "RXBUF_FW"
 	};
@@ -3899,7 +4748,6 @@ void rtw_dump_fifo(void *sel, _adapter *adapter, u8 fifo_sel, u32 fifo_addr, u32
 #endif
 
 #if defined(CONFIG_WOWLAN) || defined(CONFIG_AP_WOWLAN)
-
 static void rtw_hal_force_enable_rxdma(_adapter *adapter)
 {
 	RTW_INFO("%s: Set 0x690=0x00\n", __func__);
@@ -3933,7 +4781,7 @@ static void rtw_hal_release_rx_dma(_adapter *adapter)
 	rtw_write32(adapter, REG_RXPKT_NUM, (val32 & (~RW_RELEASE_EN)));
 
 	RTW_INFO("%s, [0x%04x]: 0x%08x\n",
-		 __func__, REG_RXPKT_NUM, (val32 & (~RW_RELEASE_EN)));
+		 __func__, REG_RXPKT_NUM, (u32)(val32 & (~RW_RELEASE_EN)));
 }
 
 static u8 rtw_hal_pause_rx_dma(_adapter *adapter)
@@ -4053,11 +4901,11 @@ static u8 rtw_hal_check_wow_ctrl(_adapter *adapter, u8 chk_type)
 	if (IS_HARDWARE_TYPE_JAGUAR2(adapter)) {
 		if (chk_type) {
 			reason = rtw_read8(adapter, REG_WOWLAN_WAKE_REASON);
-			RTW_DBG("%s reason:0x%02x\n", __func__, reason);
+			RTW_INFO("%s reason:0x%02x\n", __func__, reason);
 
 			while (reason && trycnt > 1) {
 				reason = rtw_read8(adapter, REG_WOWLAN_WAKE_REASON);
-				RTW_DBG("Loop index: %d :0x%02x\n",
+				RTW_PRINT("Loop index: %d :0x%02x\n",
 					  trycnt, reason);
 				trycnt--;
 				rtw_msleep_os(20);
@@ -4070,7 +4918,7 @@ static u8 rtw_hal_check_wow_ctrl(_adapter *adapter, u8 chk_type)
 			/* Wait FW to cleare 0x120 bit16, 0x284 bit18 to 0 */
 			fe1_imr = rtw_read32(adapter, REG_FE1IMR); /* RxDone IMR for 3081 */
 			rxpkt_num = rtw_read32(adapter, REG_RXPKT_NUM); /* Release RXDMA */
-			RTW_DBG("%s REG_FE1IMR (reg120): 0x%x, REG_RXPKT_NUM(reg284): 0x%x\n", __func__, fe1_imr, rxpkt_num);
+			RTW_PRINT("%s REG_FE1IMR (reg120): 0x%x, REG_RXPKT_NUM(reg284): 0x%x\n", __func__, fe1_imr, rxpkt_num);
 
 			while (((fe1_imr & BIT_FS_RXDONE_INT_EN) || (rxpkt_num & BIT_RW_RELEASE_EN)) && trycnt > 1) {
 				rtw_msleep_os(20);
@@ -4088,13 +4936,13 @@ static u8 rtw_hal_check_wow_ctrl(_adapter *adapter, u8 chk_type)
 		}
 	} else {
 		mstatus = rtw_read8(adapter, REG_WOW_CTRL);
-		RTW_DBG("%s mstatus:0x%02x\n", __func__, mstatus);
+		RTW_INFO("%s mstatus:0x%02x\n", __func__, mstatus);
 
 
 		if (chk_type) {
 			while (!(mstatus & BIT1) && trycnt > 1) {
 				mstatus = rtw_read8(adapter, REG_WOW_CTRL);
-				RTW_DBG("Loop index: %d :0x%02x\n",
+				RTW_PRINT("Loop index: %d :0x%02x\n",
 					  trycnt, mstatus);
 				trycnt--;
 				rtw_msleep_os(20);
@@ -4106,7 +4954,7 @@ static u8 rtw_hal_check_wow_ctrl(_adapter *adapter, u8 chk_type)
 		} else {
 			while (mstatus & BIT1 && trycnt > 1) {
 				mstatus = rtw_read8(adapter, REG_WOW_CTRL);
-				RTW_DBG("Loop index: %d :0x%02x\n",
+				RTW_PRINT("Loop index: %d :0x%02x\n",
 					  trycnt, mstatus);
 				trycnt--;
 				rtw_msleep_os(20);
@@ -4119,7 +4967,7 @@ static u8 rtw_hal_check_wow_ctrl(_adapter *adapter, u8 chk_type)
 		}
 	}
 
-	RTW_INFO("%s check_type: %d res: %d trycnt: %d\n",
+	RTW_PRINT("%s check_type: %d res: %d trycnt: %d\n",
 		  __func__, chk_type, res, (25 - trycnt));
 	return res;
 }
@@ -4134,7 +4982,7 @@ static u8 rtw_hal_check_pno_enabled(_adapter *adapter)
 	if (ppwrpriv->wowlan_pno_enable && ppwrpriv->wowlan_in_resume == _FALSE) {
 		res = rtw_read8(adapter, REG_PNO_STATUS);
 		while (!(res & BIT(7)) && count < 25) {
-			RTW_DBG("[%d] cmd: 0x81 REG_PNO_STATUS: 0x%02x\n",
+			RTW_INFO("[%d] cmd: 0x81 REG_PNO_STATUS: 0x%02x\n",
 				 count, res);
 			res = rtw_read8(adapter, REG_PNO_STATUS);
 			count++;
@@ -4160,6 +5008,7 @@ static void rtw_hal_backup_rate(_adapter *adapter)
 	rtw_write8(adapter, 0x8b, rtw_read8(adapter, 0x2f0));
 }
 
+#ifdef CONFIG_GTK_OL
 static void rtw_hal_fw_sync_cam_id(_adapter *adapter)
 {
 	struct mlme_priv *pmlmepriv = &adapter->mlmepriv;
@@ -4172,7 +5021,7 @@ static void rtw_hal_fw_sync_cam_id(_adapter *adapter)
 	addr = get_bssid(pmlmepriv);
 
 	if (addr == NULL) {
-		RTW_ERR("%s: get bssid MAC addr fail!!\n", __func__);
+		RTW_INFO("%s: get bssid MAC addr fail!!\n", __func__);
 		return;
 	}
 
@@ -4202,7 +5051,7 @@ static void rtw_hal_update_gtk_offload_info(_adapter *adapter)
 	struct cam_ctl_t *cam_ctl = &dvobj->cam_ctl;
 	_irqL irqL;
 	u8 get_key[16];
-	u8 gtk_id = 0, offset = 0, i = 0, sz = 0;
+	u8 gtk_id = 0, offset = 0, i = 0, sz = 0, aoac_rpt_ver = 0, has_rekey = _FALSE;
 	u64 replay_count = 0, tmp_iv_hdr = 0, pkt_pn = 0;
 
 	if (!MLME_IS_STA(adapter))
@@ -4214,10 +5063,30 @@ static void rtw_hal_update_gtk_offload_info(_adapter *adapter)
 
 	/*read gtk key index*/
 	gtk_id = paoac_rpt->key_index;
+	aoac_rpt_ver = paoac_rpt->version_info;
 
-	if (gtk_id == 5 || gtk_id == 0) {
+	if (aoac_rpt_ver == 0) {
+		/* initial verison */
+		if (gtk_id == 5)
+			has_rekey = _FALSE;
+		else
+			has_rekey = _TRUE;
+	} else if (aoac_rpt_ver >= 1) {
+		/* Add krack patch */
+		if (gtk_id == 5)
+			RTW_WARN("%s FW check iv fail\n", __func__);
+
+		if (aoac_rpt_ver == 1)
+			RTW_WARN("%s aoac report version should be update to v2\n", __func__);
+
+		/* Fix key id mismatch */
+		if (aoac_rpt_ver == 2)
+			has_rekey = paoac_rpt->rekey_ok == 1 ? _TRUE : _FALSE;
+	}
+
+	if (has_rekey == _FALSE) {
 		RTW_INFO("%s no rekey event happened.\n", __func__);
-	} else if (gtk_id > 0 && gtk_id < 4) {
+	} else if (has_rekey == _TRUE) {
 		RTW_INFO("%s update security key.\n", __func__);
 		/*read key from sec-cam,for DK ,keyindex is equal to cam-id*/
 		rtw_sec_read_cam_ent(adapter, gtk_id,
@@ -4256,7 +5125,7 @@ static void rtw_hal_update_gtk_offload_info(_adapter *adapter)
 				&(paoac_rpt->group_key[offset]),
 				RTW_TKIP_MIC_LEN);
 		}
-		RTW_INFO("GTK (%d) "KEY_FMT"\n", gtk_id,
+		RTW_PRINT("GTK (%d) "KEY_FMT"\n", gtk_id,
 			KEY_ARG(psecuritypriv->dot118021XGrpKey[gtk_id].skey));
 	}
 
@@ -4281,6 +5150,7 @@ static void rtw_hal_update_gtk_offload_info(_adapter *adapter)
 	dump_sec_cam_cache(RTW_DBGDUMP, adapter);
 	#endif
 }
+#endif /*CONFIG_GTK_OL*/
 
 static void rtw_dump_aoac_rpt(_adapter *adapter)
 {
@@ -4297,6 +5167,7 @@ static void rtw_dump_aoac_rpt(_adapter *adapter)
 	RTW_INFO("[AOAC-RPT] wow_pattern_idx - %d\n",
 		 paoac_rpt->wow_pattern_idx);
 	RTW_INFO("[AOAC-RPT] version_info - %d\n", paoac_rpt->version_info);
+	RTW_INFO("[AOAC-RPT] rekey_ok - %d\n", paoac_rpt->rekey_ok);
 	RTW_INFO_DUMP("[AOAC-RPT] RX PTK IV-", paoac_rpt->rxptk_iv, 8);
 	RTW_INFO_DUMP("[AOAC-RPT] RX GTK[0] IV-", paoac_rpt->rxgtk_iv[0], 8);
 	RTW_INFO_DUMP("[AOAC-RPT] RX GTK[1] IV-", paoac_rpt->rxgtk_iv[1], 8);
@@ -4406,11 +5277,13 @@ static void rtw_hal_update_sw_security_info(_adapter *adapter)
 	u8 sz = sizeof (psecpriv->iv_seq);
 
 	rtw_hal_update_tx_iv(adapter);
-
-	if (rtw_is_support_gtk_offload(adapter) == _TRUE)
+#ifdef CONFIG_GTK_OL
+	if (psecpriv->binstallKCK_KEK == _TRUE &&
+	    psecpriv->ndisauthtype == Ndis802_11AuthModeWPA2PSK)
 		rtw_hal_update_gtk_offload_info(adapter);
-	else
-		_rtw_memset(psecpriv->iv_seq, 0, sz);
+#else
+	_rtw_memset(psecpriv->iv_seq, 0, sz);
+#endif
 }
 
 static u8 rtw_hal_set_keep_alive_cmd(_adapter *adapter, u8 enable, u8 pkt_type)
@@ -4420,14 +5293,15 @@ static u8 rtw_hal_set_keep_alive_cmd(_adapter *adapter, u8 enable, u8 pkt_type)
 	u8 u1H2CKeepAliveParm[H2C_KEEP_ALIVE_CTRL_LEN] = {0};
 	u8 adopt = 1, check_period = 5;
 	u8 ret = _FAIL;
+	u8 hw_port = rtw_hal_get_port(adapter);
 
 	SET_H2CCMD_KEEPALIVE_PARM_ENABLE(u1H2CKeepAliveParm, enable);
 	SET_H2CCMD_KEEPALIVE_PARM_ADOPT(u1H2CKeepAliveParm, adopt);
 	SET_H2CCMD_KEEPALIVE_PARM_PKT_TYPE(u1H2CKeepAliveParm, pkt_type);
 	SET_H2CCMD_KEEPALIVE_PARM_CHECK_PERIOD(u1H2CKeepAliveParm, check_period);
 #ifdef CONFIG_FW_MULTI_PORT_SUPPORT
-	SET_H2CCMD_KEEPALIVE_PARM_PORT_NUM(u1H2CKeepAliveParm, adapter->hw_port);
-	RTW_INFO("%s(): enable = %d, port = %d\n", __func__, enable, adapter->hw_port);
+	SET_H2CCMD_KEEPALIVE_PARM_PORT_NUM(u1H2CKeepAliveParm, hw_port);
+	RTW_INFO("%s(): enable = %d, port = %d\n", __func__, enable, hw_port);
 #else
 	RTW_INFO("%s(): enable = %d\n", __func__, enable);
 #endif
@@ -4445,14 +5319,16 @@ static u8 rtw_hal_set_disconnect_decision_cmd(_adapter *adapter, u8 enable)
 	u8 u1H2CDisconDecisionParm[H2C_DISCON_DECISION_LEN] = {0};
 	u8 adopt = 1, check_period = 30, trypkt_num = 5;
 	u8 ret = _FAIL;
+	u8 hw_port = rtw_hal_get_port(adapter);
 
 	SET_H2CCMD_DISCONDECISION_PARM_ENABLE(u1H2CDisconDecisionParm, enable);
 	SET_H2CCMD_DISCONDECISION_PARM_ADOPT(u1H2CDisconDecisionParm, adopt);
+	/* SET_H2CCMD_DISCONDECISION_PARM_DISCONNECT_EN(u1H2CDisconDecisionParm, adopt); */
 	SET_H2CCMD_DISCONDECISION_PARM_CHECK_PERIOD(u1H2CDisconDecisionParm, check_period);
 	SET_H2CCMD_DISCONDECISION_PARM_TRY_PKT_NUM(u1H2CDisconDecisionParm, trypkt_num);
 #ifdef CONFIG_FW_MULTI_PORT_SUPPORT
-	SET_H2CCMD_DISCONDECISION_PORT_NUM(u1H2CDisconDecisionParm, adapter->hw_port);
-	RTW_INFO("%s(): enable = %d, port = %d\n", __func__, enable, adapter->hw_port);
+	SET_H2CCMD_DISCONDECISION_PORT_NUM(u1H2CDisconDecisionParm, hw_port);
+	RTW_INFO("%s(): enable = %d, port = %d\n", __func__, enable, hw_port);
 #else
 	RTW_INFO("%s(): enable = %d\n", __func__, enable);
 #endif
@@ -4470,9 +5346,10 @@ static u8 rtw_hal_set_wowlan_ctrl_cmd(_adapter *adapter, u8 enable, u8 change_un
 	struct security_priv *psecpriv = &adapter->securitypriv;
 	struct pwrctrl_priv *ppwrpriv = adapter_to_pwrctl(adapter);
 	struct hal_ops *pHalFunc = &adapter->hal_func;
+	struct mlme_priv	*pmlmepriv = &(adapter->mlmepriv);
 
 	u8 u1H2CWoWlanCtrlParm[H2C_WOWLAN_LEN] = {0};
-	u8 discont_wake = 0, gpionum = 0, gpio_dur = 0;
+	u8 discont_wake = 0, gpionum = 0, gpio_dur = 0, no_wake = 0;
 	u8 hw_unicast = 0, gpio_pulse_cnt = 0, gpio_pulse_en = 0;
 	u8 sdio_wakeup_enable = 1;
 	u8 gpio_high_active = 0;
@@ -4488,17 +5365,21 @@ static u8 rtw_hal_set_wowlan_ctrl_cmd(_adapter *adapter, u8 enable, u8 change_un
 	gpionum = WAKEUP_GPIO_IDX;
 	sdio_wakeup_enable = 0;
 #endif /* CONFIG_GPIO_WAKEUP */
-
+	
+	if(registry_par->suspend_type == FW_IPS_DISABLE_BBRF &&
+	!check_fwstate(pmlmepriv, _FW_LINKED))
+		no_wake = 1;
+		
 	if (!ppwrpriv->wowlan_pno_enable &&
-	    registry_par->wakeup_event & BIT(0))
+		registry_par->wakeup_event & BIT(0) && !no_wake)
 		magic_pkt = enable;
 
 	if ((registry_par->wakeup_event & BIT(1)) &&
-	    (psecpriv->dot11PrivacyAlgrthm == _WEP40_ ||
-	     psecpriv->dot11PrivacyAlgrthm == _WEP104_))
+		(psecpriv->dot11PrivacyAlgrthm == _WEP40_ ||
+		psecpriv->dot11PrivacyAlgrthm == _WEP104_) && !no_wake)
 			hw_unicast = 1;
 
-	if (registry_par->wakeup_event & BIT(2))
+	if (registry_par->wakeup_event & BIT(2) && !no_wake)
 		discont_wake = enable;
 
 	RTW_INFO("%s(): enable=%d change_unit=%d\n", __func__,
@@ -4519,17 +5400,22 @@ static u8 rtw_hal_set_wowlan_ctrl_cmd(_adapter *adapter, u8 enable, u8 change_un
 #endif
 
 	SET_H2CCMD_WOWLAN_FUNC_ENABLE(u1H2CWoWlanCtrlParm, enable);
-	SET_H2CCMD_WOWLAN_PATTERN_MATCH_ENABLE(u1H2CWoWlanCtrlParm, enable);
+	if(!no_wake)
+		SET_H2CCMD_WOWLAN_PATTERN_MATCH_ENABLE(u1H2CWoWlanCtrlParm, enable);
 	SET_H2CCMD_WOWLAN_MAGIC_PKT_ENABLE(u1H2CWoWlanCtrlParm, magic_pkt);
 	SET_H2CCMD_WOWLAN_UNICAST_PKT_ENABLE(u1H2CWoWlanCtrlParm, hw_unicast);
 	SET_H2CCMD_WOWLAN_ALL_PKT_DROP(u1H2CWoWlanCtrlParm, 0);
 	SET_H2CCMD_WOWLAN_GPIO_ACTIVE(u1H2CWoWlanCtrlParm, gpio_high_active);
 
-	if (rtw_is_support_gtk_offload(adapter) == _TRUE)
+#ifdef CONFIG_GTK_OL
+	if (psecpriv->binstallKCK_KEK == _TRUE &&
+	    psecpriv->ndisauthtype == Ndis802_11AuthModeWPA2PSK)
 		SET_H2CCMD_WOWLAN_REKEY_WAKE_UP(u1H2CWoWlanCtrlParm, 0);
 	else
 		SET_H2CCMD_WOWLAN_REKEY_WAKE_UP(u1H2CWoWlanCtrlParm, 1);
-
+#else
+	SET_H2CCMD_WOWLAN_REKEY_WAKE_UP(u1H2CWoWlanCtrlParm, enable);
+#endif
 	SET_H2CCMD_WOWLAN_DISCONNECT_WAKE_UP(u1H2CWoWlanCtrlParm, discont_wake);
 	SET_H2CCMD_WOWLAN_GPIONUM(u1H2CWoWlanCtrlParm, gpionum);
 	SET_H2CCMD_WOWLAN_DATAPIN_WAKE_UP(u1H2CWoWlanCtrlParm, sdio_wakeup_enable);
@@ -4553,10 +5439,18 @@ static u8 rtw_hal_set_wowlan_ctrl_cmd(_adapter *adapter, u8 enable, u8 change_un
 		dis_uphy_time = 0x4;
 	}
 
-	SET_H2CCMD_WOWLAN_DIS_UPHY(u1H2CWoWlanCtrlParm, dis_uphy);
-	SET_H2CCMD_WOWLAN_HOST_2_DEV(u1H2CWoWlanCtrlParm, 1);
-	SET_H2CCMD_WOWLAN_DIS_UPHY_UNIT(u1H2CWoWlanCtrlParm, dis_uphy_unit);
-	SET_H2CCMD_WOWLAN_DIS_UPHY_TIME(u1H2CWoWlanCtrlParm, dis_uphy_time);
+	SET_H2CCMD_WOWLAN_DISABLE_UPHY(u1H2CWoWlanCtrlParm, dis_uphy);
+	SET_H2CCMD_WOWLAN_UNIT_FOR_UPHY_DISABLE(u1H2CWoWlanCtrlParm, dis_uphy_unit);
+	SET_H2CCMD_WOWLAN_TIME_FOR_UPHY_DISABLE(u1H2CWoWlanCtrlParm, dis_uphy_time);
+	if (ppwrpriv->hst2dev_high_active == 1)
+		SET_H2CCMD_WOWLAN_RISE_HST2DEV(u1H2CWoWlanCtrlParm, 1);
+#ifdef CONFIG_RTW_ONE_PIN_GPIO
+	SET_H2CCMD_WOWLAN_GPIO_INPUT_EN(u1H2CWoWlanCtrlParm, 1);
+	SET_H2CCMD_WOWLAN_DEV2HST_EN(u1H2CWoWlanCtrlParm, 1);
+	SET_H2CCMD_WOWLAN_HST2DEV_EN(u1H2CWoWlanCtrlParm, 0);
+#else
+	SET_H2CCMD_WOWLAN_HST2DEV_EN(u1H2CWoWlanCtrlParm, 1);
+#endif /* CONFIG_RTW_ONE_PIN_GPIO */
 #endif /* CONFIG_DIS_UPHY */
 
 
@@ -4574,77 +5468,106 @@ static u8 rtw_hal_set_remote_wake_ctrl_cmd(_adapter *adapter, u8 enable)
 	struct pwrctrl_priv *ppwrpriv = adapter_to_pwrctl(adapter);
 	struct registry_priv *pregistrypriv = &adapter->registrypriv;
 	u8 u1H2CRemoteWakeCtrlParm[H2C_REMOTE_WAKE_CTRL_LEN] = {0};
-	u8 ret = _FAIL, count = 0;
+	u8 ret = _FAIL, count = 0, no_wake = 0;
+	struct mlme_priv	*pmlmepriv = &(adapter->mlmepriv);
 
 	RTW_INFO("%s(): enable=%d\n", __func__, enable);
 
-	if (!ppwrpriv->wowlan_pno_enable) {
+	if(pregistrypriv->suspend_type == FW_IPS_DISABLE_BBRF &&
+	!check_fwstate(pmlmepriv, _FW_LINKED))
+		no_wake = 1;
+	if(no_wake) {
 		SET_H2CCMD_REMOTE_WAKECTRL_ENABLE(
 			u1H2CRemoteWakeCtrlParm, enable);
-		SET_H2CCMD_REMOTE_WAKE_CTRL_ARP_OFFLOAD_EN(
-			u1H2CRemoteWakeCtrlParm, 1);
-
-		if (rtw_is_support_gtk_offload(adapter) == _TRUE) {
-			SET_H2CCMD_REMOTE_WAKE_CTRL_GTK_OFFLOAD_EN(
+	} else {
+		if (!ppwrpriv->wowlan_pno_enable) {
+			SET_H2CCMD_REMOTE_WAKECTRL_ENABLE(
 				u1H2CRemoteWakeCtrlParm, enable);
-			SET_H2CCMD_REMOTE_WAKE_CTRL_TKIP_OFFLOAD_EN(
+			SET_H2CCMD_REMOTE_WAKE_CTRL_ARP_OFFLOAD_EN(
+				u1H2CRemoteWakeCtrlParm, 1);
+	#ifdef CONFIG_GTK_OL
+			if (psecuritypriv->binstallKCK_KEK == _TRUE &&
+			    psecuritypriv->ndisauthtype == Ndis802_11AuthModeWPA2PSK) {
+				SET_H2CCMD_REMOTE_WAKE_CTRL_GTK_OFFLOAD_EN(
+					u1H2CRemoteWakeCtrlParm, 1);
+			} else {
+				RTW_INFO("no kck kek\n");
+				SET_H2CCMD_REMOTE_WAKE_CTRL_GTK_OFFLOAD_EN(
+					u1H2CRemoteWakeCtrlParm, 0);
+			}
+	#endif /* CONFIG_GTK_OL */
+	
+	#ifdef CONFIG_IPV6
+			if (ppwrpriv->wowlan_ns_offload_en == _TRUE) {
+				RTW_INFO("enable NS offload\n");
+				SET_H2CCMD_REMOTE_WAKE_CTRL_NDP_OFFLOAD_EN(
 					u1H2CRemoteWakeCtrlParm, enable);
-		} else {
-			RTW_INFO("no kck kek\n");
-			SET_H2CCMD_REMOTE_WAKE_CTRL_GTK_OFFLOAD_EN(
-				u1H2CRemoteWakeCtrlParm, 0);
-			SET_H2CCMD_REMOTE_WAKE_CTRL_TKIP_OFFLOAD_EN(
+			}
+	
+			/*
+			 * filter NetBios name service pkt to avoid being waked-up
+			 * by this kind of unicast pkt this exceptional modification
+			 * is used for match competitor's behavior
+			 */
+	
+			SET_H2CCMD_REMOTE_WAKE_CTRL_NBNS_FILTER_EN(
+				u1H2CRemoteWakeCtrlParm, enable);
+	#endif /*CONFIG_IPV6*/
+	
+	#ifdef CONFIG_RTL8192F
+			if (IS_HARDWARE_TYPE_8192F(adapter)){
+				SET_H2CCMD_REMOTE_WAKE_CTRL_FW_UNICAST_EN(
+					u1H2CRemoteWakeCtrlParm, enable);
+			}
+	#endif /* CONFIG_RTL8192F */
+	
+			if ((psecuritypriv->dot11PrivacyAlgrthm == _AES_) ||
+				(psecuritypriv->dot11PrivacyAlgrthm == _TKIP_) ||
+				(psecuritypriv->dot11PrivacyAlgrthm == _NO_PRIVACY_)) {
+				SET_H2CCMD_REMOTE_WAKE_CTRL_ARP_ACTION(
 					u1H2CRemoteWakeCtrlParm, 0);
+			} else {
+				SET_H2CCMD_REMOTE_WAKE_CTRL_ARP_ACTION(
+					u1H2CRemoteWakeCtrlParm, 1);
+			}
+	
+			if (psecuritypriv->dot11PrivacyAlgrthm == _TKIP_ &&
+			    psecuritypriv->ndisauthtype == Ndis802_11AuthModeWPA2PSK) {
+				SET_H2CCMD_REMOTE_WAKE_CTRL_TKIP_OFFLOAD_EN(
+						u1H2CRemoteWakeCtrlParm, enable);
+	
+				if (IS_HARDWARE_TYPE_8188E(adapter) ||
+				    IS_HARDWARE_TYPE_8812(adapter)) {
+					SET_H2CCMD_REMOTE_WAKE_CTRL_TKIP_OFFLOAD_EN(
+						u1H2CRemoteWakeCtrlParm, 0);
+					SET_H2CCMD_REMOTE_WAKE_CTRL_ARP_ACTION(
+						u1H2CRemoteWakeCtrlParm, 1);
+				}
+			}
+	
+			SET_H2CCMD_REMOTE_WAKE_CTRL_FW_PARSING_UNTIL_WAKEUP(
+				u1H2CRemoteWakeCtrlParm, 1);
 		}
-
-#ifdef CONFIG_IPV6
-		if (ppwrpriv->wowlan_ns_offload_en == _TRUE) {
-			RTW_INFO("enable NS offload\n");
-			SET_H2CCMD_REMOTE_WAKE_CTRL_NDP_OFFLOAD_EN(
+	#ifdef CONFIG_PNO_SUPPORT
+		else {
+			SET_H2CCMD_REMOTE_WAKECTRL_ENABLE(
+				u1H2CRemoteWakeCtrlParm, enable);
+			SET_H2CCMD_REMOTE_WAKE_CTRL_NLO_OFFLOAD_EN(
 				u1H2CRemoteWakeCtrlParm, enable);
 		}
-
-		/*
-		 * filter NetBios name service pkt to avoid being waked-up
-		 * by this kind of unicast pkt this exceptional modification
-		 * is used for match competitor's behavior
-		 */
-
-		SET_H2CCMD_REMOTE_WAKE_CTRL_NBNS_FILTER_EN(
-			u1H2CRemoteWakeCtrlParm, enable);
-#endif /*CONFIG_IPV6*/
-
-		if ((psecuritypriv->dot118021XGrpPrivacy == _AES_) ||
-			(psecuritypriv->dot118021XGrpPrivacy == _TKIP_) ||
-			(psecuritypriv->dot11PrivacyAlgrthm == _NO_PRIVACY_)) {
-			SET_H2CCMD_REMOTE_WAKE_CTRL_ARP_ACTION(
-				u1H2CRemoteWakeCtrlParm, 0);
+	#endif
+	
+	#ifdef CONFIG_P2P_WOWLAN
+		if (_TRUE == ppwrpriv->wowlan_p2p_mode) {
+			RTW_INFO("P2P OFFLOAD ENABLE\n");
+			SET_H2CCMD_REMOTE_WAKE_CTRL_P2P_OFFLAD_EN(u1H2CRemoteWakeCtrlParm, 1);
 		} else {
-			SET_H2CCMD_REMOTE_WAKE_CTRL_ARP_ACTION(
-				u1H2CRemoteWakeCtrlParm, 1);
+			RTW_INFO("P2P OFFLOAD DISABLE\n");
+			SET_H2CCMD_REMOTE_WAKE_CTRL_P2P_OFFLAD_EN(u1H2CRemoteWakeCtrlParm, 0);
 		}
-
-		SET_H2CCMD_REMOTE_WAKE_CTRL_FW_PARSING_UNTIL_WAKEUP(
-			u1H2CRemoteWakeCtrlParm, 1);
-	}
-#ifdef CONFIG_PNO_SUPPORT
-	else {
-		SET_H2CCMD_REMOTE_WAKECTRL_ENABLE(
-			u1H2CRemoteWakeCtrlParm, enable);
-		SET_H2CCMD_REMOTE_WAKE_CTRL_NLO_OFFLOAD_EN(
-			u1H2CRemoteWakeCtrlParm, enable);
+	#endif /* CONFIG_P2P_WOWLAN */
 	}
-#endif
 
-#ifdef CONFIG_P2P_WOWLAN
-	if (_TRUE == ppwrpriv->wowlan_p2p_mode) {
-		RTW_INFO("P2P OFFLOAD ENABLE\n");
-		SET_H2CCMD_REMOTE_WAKE_CTRL_P2P_OFFLAD_EN(u1H2CRemoteWakeCtrlParm, 1);
-	} else {
-		RTW_INFO("P2P OFFLOAD DISABLE\n");
-		SET_H2CCMD_REMOTE_WAKE_CTRL_P2P_OFFLAD_EN(u1H2CRemoteWakeCtrlParm, 0);
-	}
-#endif /* CONFIG_P2P_WOWLAN */
 
 	ret = rtw_hal_fill_h2c_cmd(adapter,
 				   H2C_REMOTE_WAKE_CTRL,
@@ -4659,7 +5582,7 @@ static u8 rtw_hal_set_global_info_cmd(_adapter *adapter, u8 group_alg, u8 pairwi
 	u8 ret = _FAIL;
 	u8 u1H2CAOACGlobalInfoParm[H2C_AOAC_GLOBAL_INFO_LEN] = {0};
 
-	RTW_DBG("%s(): group_alg=%d pairwise_alg=%d\n",
+	RTW_INFO("%s(): group_alg=%d pairwise_alg=%d\n",
 		 __func__, group_alg, pairwise_alg);
 	SET_H2CCMD_AOAC_GLOBAL_INFO_PAIRWISE_ENC_ALG(u1H2CAOACGlobalInfoParm,
 			pairwise_alg);
@@ -4684,7 +5607,7 @@ static u8 rtw_hal_set_scan_offload_info_cmd(_adapter *adapter,
 	u8 u1H2CScanOffloadInfoParm[H2C_SCAN_OFFLOAD_CTRL_LEN] = {0};
 	u8 res = 0, count = 0, ret = _FAIL;
 
-	RTW_DBG("%s: loc_probe_packet:%d, loc_scan_info: %d loc_ssid_info:%d\n",
+	RTW_INFO("%s: loc_probe_packet:%d, loc_scan_info: %d loc_ssid_info:%d\n",
 		 __func__, rsvdpageloc->LocProbePacket,
 		 rsvdpageloc->LocScanInfo, rsvdpageloc->LocSSIDInfo);
 
@@ -4714,18 +5637,25 @@ void rtw_hal_set_fw_wow_related_cmd(_adapter *padapter, u8 enable)
 	struct registry_priv *pregistry = &padapter->registrypriv;
 	struct sta_info *psta = NULL;
 	u16 media_status_rpt;
-	u8	pkt_type = 0;
+	u8	pkt_type = 0, no_wake = 0;
 	u8 ret = _SUCCESS;
+	
+	if(pregistry->suspend_type == FW_IPS_DISABLE_BBRF &&
+	!check_fwstate(pmlmepriv, _FW_LINKED))
+		no_wake = 1;
+
+	RTW_PRINT("+%s()+: enable=%d\n", __func__, enable);
 
 	rtw_hal_set_wowlan_ctrl_cmd(padapter, enable, _FALSE);
 
 	if (enable) {
-		rtw_hal_set_global_info_cmd(padapter,
+		if(!no_wake)
+			rtw_hal_set_global_info_cmd(padapter,
 					    psecpriv->dot118021XGrpPrivacy,
 					    psecpriv->dot11PrivacyAlgrthm);
 
 		if (!(ppwrpriv->wowlan_pno_enable)) {
-			if (pregistry->wakeup_event & BIT(2))
+			if (pregistry->wakeup_event & BIT(2) && !no_wake)
 				rtw_hal_set_disconnect_decision_cmd(padapter,
 								    enable);
 #ifdef CONFIG_ARP_KEEP_ALIVE
@@ -4737,7 +5667,8 @@ void rtw_hal_set_fw_wow_related_cmd(_adapter *padapter, u8 enable)
 #else
 			pkt_type = 0;
 #endif /* CONFIG_ARP_KEEP_ALIVE */
-			rtw_hal_set_keep_alive_cmd(padapter, enable, pkt_type);
+			if(!no_wake)
+				rtw_hal_set_keep_alive_cmd(padapter, enable, pkt_type);
 		}
 		rtw_hal_set_remote_wake_ctrl_cmd(padapter, enable);
 #ifdef CONFIG_PNO_SUPPORT
@@ -4754,6 +5685,7 @@ void rtw_hal_set_fw_wow_related_cmd(_adapter *padapter, u8 enable)
 
 		rtw_hal_set_remote_wake_ctrl_cmd(padapter, enable);
 	}
+	RTW_PRINT("-%s()-\n", __func__);
 }
 #endif /* CONFIG_WOWLAN */
 
@@ -4777,7 +5709,7 @@ static u8 rtw_hal_set_ap_wowlan_ctrl_cmd(_adapter *adapter, u8 enable)
 	sdio_wakeup_enable = 0;
 #endif /*CONFIG_GPIO_WAKEUP*/
 
-	RTW_DBG("%s(): enable=%d\n", __func__, enable);
+	RTW_INFO("%s(): enable=%d\n", __func__, enable);
 
 	SET_H2CCMD_AP_WOW_GPIO_CTRL_INDEX(u1H2CAPWoWlanCtrlParm,
 					  gpionum);
@@ -4804,7 +5736,7 @@ static u8 rtw_hal_set_ap_offload_ctrl_cmd(_adapter *adapter, u8 enable)
 	u8 u1H2CAPOffloadCtrlParm[H2C_WOWLAN_LEN] = {0};
 	u8 ret = _FAIL;
 
-	RTW_DBG("%s(): bFuncEn=%d\n", __func__, enable);
+	RTW_INFO("%s(): bFuncEn=%d\n", __func__, enable);
 
 	SET_H2CCMD_AP_WOWLAN_EN(u1H2CAPOffloadCtrlParm, enable);
 
@@ -4822,7 +5754,7 @@ static u8 rtw_hal_set_ap_ps_cmd(_adapter *adapter, u8 enable)
 	u8 ap_ps_parm[H2C_AP_PS_LEN] = {0};
 	u8 ret = _FAIL;
 
-	RTW_DBG("%s(): enable=%d\n" , __func__ , enable);
+	RTW_INFO("%s(): enable=%d\n" , __func__ , enable);
 
 	SET_H2CCMD_AP_WOW_PS_EN(ap_ps_parm, enable);
 #ifndef CONFIG_USB_HCI
@@ -4849,7 +5781,7 @@ static void rtw_hal_set_ap_rsvdpage_loc_cmd(PADAPTER padapter,
 	u8 ret = _FAIL, header = 0;
 
 	if (pHalFunc->fill_h2c_cmd == NULL) {
-		RTW_ERR("%s: Please hook fill_h2c_cmd first!\n", __func__);
+		RTW_INFO("%s: Please hook fill_h2c_cmd first!\n", __func__);
 		return;
 	}
 
@@ -4867,7 +5799,7 @@ static void rtw_hal_set_ap_rsvdpage_loc_cmd(PADAPTER padapter,
 				   H2C_BCN_RSVDPAGE_LEN, rsvdparm);
 
 	if (ret == _FAIL)
-		RTW_WARN("%s: H2C_BCN_RSVDPAGE cmd fail\n", __func__);
+		RTW_INFO("%s: H2C_BCN_RSVDPAGE cmd fail\n", __func__);
 
 	rtw_msleep_os(10);
 
@@ -4880,7 +5812,7 @@ static void rtw_hal_set_ap_rsvdpage_loc_cmd(PADAPTER padapter,
 				   H2C_PROBERSP_RSVDPAGE_LEN, rsvdparm);
 
 	if (ret == _FAIL)
-		RTW_WARN("%s: H2C_PROBERSP_RSVDPAGE cmd fail\n", __func__);
+		RTW_INFO("%s: H2C_PROBERSP_RSVDPAGE cmd fail\n", __func__);
 
 	rtw_msleep_os(10);
 }
@@ -4911,7 +5843,7 @@ static void rtw_hal_ap_wow_enable(_adapter *padapter)
 #ifdef DBG_CHECK_FW_PS_STATE
 	if (rtw_fw_ps_state(padapter) == _FAIL) {
 		pdbgpriv->dbg_enwow_dload_fw_fail_cnt++;
-		RTW_WARN("wowlan enable no leave 32k\n");
+		RTW_PRINT("wowlan enable no leave 32k\n");
 	}
 #endif /*DBG_CHECK_FW_PS_STATE*/
 
@@ -4932,20 +5864,20 @@ static void rtw_hal_ap_wow_enable(_adapter *padapter)
 	/* RX DMA stop */
 	res = rtw_hal_pause_rx_dma(padapter);
 	if (res == _FAIL)
-		RTW_WARN("[WARNING] pause RX DMA fail\n");
+		RTW_PRINT("[WARNING] pause RX DMA fail\n");
 
 #if defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI)
 	/* Enable CPWM2 only. */
 	res = rtw_hal_enable_cpwm2(padapter);
 	if (res == _FAIL)
-		RTW_WARN("[WARNING] enable cpwm2 fail\n");
+		RTW_PRINT("[WARNING] enable cpwm2 fail\n");
 #endif
 
 #ifdef CONFIG_GPIO_WAKEUP
 	rtw_hal_switch_gpio_wl_ctrl(padapter, WAKEUP_GPIO_IDX, _TRUE);
 #endif
 	/* 5. Set Enable WOWLAN H2C command. */
-	RTW_DBG("Set Enable AP WOWLan cmd\n");
+	RTW_PRINT("Set Enable AP WOWLan cmd\n");
 	rtw_hal_set_fw_ap_wow_related_cmd(padapter, 1);
 
 	rtw_write8(padapter, REG_MCUTST_WOWLAN, 0);
@@ -4955,7 +5887,8 @@ static void rtw_hal_ap_wow_enable(_adapter *padapter)
 #if defined(CONFIG_USB_HCI) || defined(CONFIG_PCI_HCI)
 	/* Invoid SE0 reset signal during suspending*/
 	rtw_write8(padapter, REG_RSV_CTRL, 0x20);
-	if (IS_8188F(pHalData->version_id) == FALSE)
+	if (IS_8188F(pHalData->version_id) == FALSE
+		&& IS_8188GTV(pHalData->version_id) == FALSE)
 		rtw_write8(padapter, REG_RSV_CTRL, 0x60);
 #endif
 }
@@ -4975,7 +5908,7 @@ static void rtw_hal_ap_wow_disable(_adapter *padapter)
 	/* 1. Read wakeup reason*/
 	pwrctl->wowlan_wake_reason = rtw_read8(padapter, REG_MCUTST_WOWLAN);
 
-	RTW_INFO("%s: wakeup_reason: 0x%02x\n", __func__,
+	RTW_PRINT("wakeup_reason: 0x%02x\n",
 		  pwrctl->wowlan_wake_reason);
 
 	rtw_hal_set_fw_ap_wow_related_cmd(padapter, 0);
@@ -4984,7 +5917,7 @@ static void rtw_hal_ap_wow_disable(_adapter *padapter)
 #ifdef DBG_CHECK_FW_PS_STATE
 	if (rtw_fw_ps_state(padapter) == _FAIL) {
 		pdbgpriv->dbg_diswow_dload_fw_fail_cnt++;
-		RTW_WARN("wowlan enable no leave 32k\n");
+		RTW_PRINT("wowlan enable no leave 32k\n");
 	}
 #endif /*DBG_CHECK_FW_PS_STATE*/
 
@@ -4998,6 +5931,9 @@ static void rtw_hal_ap_wow_disable(_adapter *padapter)
 	rtw_hal_fw_dl(padapter, _FALSE);
 
 #ifdef CONFIG_GPIO_WAKEUP
+#ifdef CONFIG_RTW_ONE_PIN_GPIO
+	rtw_hal_set_input_gpio(padapter, WAKEUP_GPIO_IDX);
+#else
 	#ifdef CONFIG_WAKEUP_GPIO_INPUT_MODE
 	if (pwrctl->is_high_active == 0)
 		rtw_hal_set_input_gpio(padapter, WAKEUP_GPIO_IDX);
@@ -5005,11 +5941,12 @@ static void rtw_hal_ap_wow_disable(_adapter *padapter)
 		rtw_hal_set_output_gpio(padapter, WAKEUP_GPIO_IDX, 0);
 	#else
 	val8 = (pwrctl->is_high_active == 0) ? 1 : 0;
-	RTW_INFO("%s: Set Wake GPIO to default(%d).\n", __func__, val8);
+	RTW_PRINT("Set Wake GPIO to default(%d).\n", val8);
 	rtw_hal_set_output_gpio(padapter, WAKEUP_GPIO_IDX, val8);
 
 	rtw_hal_switch_gpio_wl_ctrl(padapter, WAKEUP_GPIO_IDX, _FALSE);
 	#endif/*CONFIG_WAKEUP_GPIO_INPUT_MODE*/
+#endif /* CONFIG_RTW_ONE_PIN_GPIO */
 #endif
 	media_status_rpt = RT_MEDIA_CONNECT;
 
@@ -6526,6 +7463,7 @@ void rtw_hal_construct_beacon(_adapter *padapter,
 	pframe += 2;
 	pktlen += 2;
 
+#if 0
 	/* capability info: 2 bytes */
 	_rtw_memcpy(pframe, (unsigned char *)(rtw_get_capability_from_ie(cur_network->IEs)), 2);
 
@@ -6568,13 +7506,15 @@ void rtw_hal_construct_beacon(_adapter *padapter,
 	if (rate_len > 8)
 		pframe = rtw_set_ie(pframe, _EXT_SUPPORTEDRATES_IE_, (rate_len - 8), (cur_network->SupportedRates + 8), &pktlen);
 
-
 	/* todo:HT for adhoc */
+#endif
 
 _ConstructBeacon:
 
-	if ((pktlen + TXDESC_SIZE) > 512) {
-		RTW_INFO("beacon frame too large\n");
+	if ((pktlen + TXDESC_SIZE) > MAX_BEACON_LEN) {
+		RTW_ERR("beacon frame too large ,len(%d,%d)\n",
+			(pktlen + TXDESC_SIZE), MAX_BEACON_LEN);
+		rtw_warn_on(1);
 		return;
 	}
 
@@ -6615,11 +7555,48 @@ static void rtw_hal_construct_PSPoll(_adapter *padapter,
 	*pLength = 16;
 }
 
+
+#ifdef DBG_FW_DEBUG_MSG_PKT
+void rtw_hal_construct_fw_dbg_msg_pkt(
+	PADAPTER padapter,
+	u8		*pframe,
+	u32		*plength)
+{
+	struct rtw_ieee80211_hdr	*pwlanhdr;
+	u16						*fctrl;
+	u32						pktlen;
+	struct mlme_priv		*pmlmepriv = &padapter->mlmepriv;
+	struct wlan_network		*cur_network = &pmlmepriv->cur_network;
+	struct mlme_ext_priv	*pmlmeext = &(padapter->mlmeextpriv);
+	struct mlme_ext_info	*pmlmeinfo = &(pmlmeext->mlmext_info);
+	u8	bc_addr[] = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff};
+
+
+	/* RTW_INFO("%s:%d\n", __FUNCTION__, bForcePowerSave); */
+
+	pwlanhdr = (struct rtw_ieee80211_hdr *)pframe;
+
+	fctrl = &pwlanhdr->frame_ctl;
+	*(fctrl) = 0;
+
+	_rtw_memcpy(pwlanhdr->addr1, bc_addr, ETH_ALEN);
+	_rtw_memcpy(pwlanhdr->addr2, adapter_mac_addr(padapter), ETH_ALEN);
+	_rtw_memcpy(pwlanhdr->addr3, get_my_bssid(&(pmlmeinfo->network)), ETH_ALEN);
+
+	SetSeqNum(pwlanhdr, 0);
+
+	set_frame_sub_type(pframe, WIFI_DATA);
+
+	pktlen = sizeof(struct rtw_ieee80211_hdr_3addr);
+
+	*plength = pktlen;
+}
+#endif /*DBG_FW_DEBUG_MSG_PKT*/
+
 void rtw_hal_construct_NullFunctionData(
 	PADAPTER padapter,
 	u8		*pframe,
 	u32		*pLength,
-	u8		*StaAddr,
 	u8		bQoS,
 	u8		AC,
 	u8		bEosp,
@@ -6632,7 +7609,8 @@ void rtw_hal_construct_NullFunctionData(
 	struct wlan_network		*cur_network = &pmlmepriv->cur_network;
 	struct mlme_ext_priv	*pmlmeext = &(padapter->mlmeextpriv);
 	struct mlme_ext_info	*pmlmeinfo = &(pmlmeext->mlmext_info);
-	u8 bssid[ETH_ALEN];
+	u8 *sta_addr = NULL;
+	u8 bssid[ETH_ALEN] = {0};
 
 	/* RTW_INFO("%s:%d\n", __FUNCTION__, bForcePowerSave); */
 
@@ -6643,9 +7621,10 @@ void rtw_hal_construct_NullFunctionData(
 	if (bForcePowerSave)
 		SetPwrMgt(fctrl);
 
-	if (NULL == StaAddr) {
+	sta_addr = get_my_bssid(&pmlmeinfo->network);
+	if (NULL == sta_addr) {
 		_rtw_memcpy(bssid, adapter_mac_addr(padapter), ETH_ALEN);
-		StaAddr = bssid;
+		sta_addr = bssid;
 	}
 
 	switch (cur_network->network.InfrastructureMode) {
@@ -6653,17 +7632,17 @@ void rtw_hal_construct_NullFunctionData(
 		SetToDs(fctrl);
 		_rtw_memcpy(pwlanhdr->addr1, get_my_bssid(&(pmlmeinfo->network)), ETH_ALEN);
 		_rtw_memcpy(pwlanhdr->addr2, adapter_mac_addr(padapter), ETH_ALEN);
-		_rtw_memcpy(pwlanhdr->addr3, StaAddr, ETH_ALEN);
+		_rtw_memcpy(pwlanhdr->addr3, sta_addr, ETH_ALEN);
 		break;
 	case Ndis802_11APMode:
 		SetFrDs(fctrl);
-		_rtw_memcpy(pwlanhdr->addr1, StaAddr, ETH_ALEN);
+		_rtw_memcpy(pwlanhdr->addr1, sta_addr, ETH_ALEN);
 		_rtw_memcpy(pwlanhdr->addr2, get_my_bssid(&(pmlmeinfo->network)), ETH_ALEN);
 		_rtw_memcpy(pwlanhdr->addr3, adapter_mac_addr(padapter), ETH_ALEN);
 		break;
 	case Ndis802_11IBSS:
 	default:
-		_rtw_memcpy(pwlanhdr->addr1, StaAddr, ETH_ALEN);
+		_rtw_memcpy(pwlanhdr->addr1, sta_addr, ETH_ALEN);
 		_rtw_memcpy(pwlanhdr->addr2, adapter_mac_addr(padapter), ETH_ALEN);
 		_rtw_memcpy(pwlanhdr->addr3, get_my_bssid(&(pmlmeinfo->network)), ETH_ALEN);
 		break;
@@ -6692,11 +7671,11 @@ void rtw_hal_construct_NullFunctionData(
 }
 
 void rtw_hal_construct_ProbeRsp(_adapter *padapter, u8 *pframe, u32 *pLength,
-				u8 *StaAddr, BOOLEAN bHideSSID)
+				BOOLEAN bHideSSID)
 {
 	struct rtw_ieee80211_hdr	*pwlanhdr;
 	u16					*fctrl;
-	u8					*mac, *bssid;
+	u8					*mac, *bssid, *sta_addr;
 	u32					pktlen;
 	struct mlme_ext_priv	*pmlmeext = &(padapter->mlmeextpriv);
 	struct mlme_ext_info	*pmlmeinfo = &(pmlmeext->mlmext_info);
@@ -6708,10 +7687,11 @@ void rtw_hal_construct_ProbeRsp(_adapter *padapter, u8 *pframe, u32 *pLength,
 
 	mac = adapter_mac_addr(padapter);
 	bssid = cur_network->MacAddress;
+	sta_addr = get_my_bssid(&pmlmeinfo->network);
 
 	fctrl = &(pwlanhdr->frame_ctl);
 	*(fctrl) = 0;
-	_rtw_memcpy(pwlanhdr->addr1, StaAddr, ETH_ALEN);
+	_rtw_memcpy(pwlanhdr->addr1, sta_addr, ETH_ALEN);
 	_rtw_memcpy(pwlanhdr->addr2, mac, ETH_ALEN);
 	_rtw_memcpy(pwlanhdr->addr3, bssid, ETH_ALEN);
 
@@ -6748,7 +7728,7 @@ static void rtw_hal_append_tkip_mic(PADAPTER padapter,
 	u8	priority[4] = {0x0};
 	u8	null_key[16] = {0x0};
 
-	RTW_DBG("%s(): Add MIC, offset: %d\n", __func__, offset);
+	RTW_INFO("%s(): Add MIC, offset: %d\n", __func__, offset);
 
 	pwlanhdr = (struct rtw_ieee80211_hdr *)pframe;
 
@@ -6874,27 +7854,27 @@ static void rtw_hal_construct_ARPRsp(
 
 	/* ARP element */
 	pARPRspPkt += 8;
-	SET_ARP_PKT_HW(pARPRspPkt, 0x0100);
-	SET_ARP_PKT_PROTOCOL(pARPRspPkt, 0x0008);	/* IP protocol */
-	SET_ARP_PKT_HW_ADDR_LEN(pARPRspPkt, 6);
-	SET_ARP_PKT_PROTOCOL_ADDR_LEN(pARPRspPkt, 4);
-	SET_ARP_PKT_OPERATION(pARPRspPkt, 0x0200);	/* ARP response */
-	SET_ARP_PKT_SENDER_MAC_ADDR(pARPRspPkt, adapter_mac_addr(padapter));
-	SET_ARP_PKT_SENDER_IP_ADDR(pARPRspPkt, pIPAddress);
+	SET_ARP_HTYPE(pARPRspPkt, 1);
+	SET_ARP_PTYPE(pARPRspPkt, ETH_P_IP);	/* IP protocol */
+	SET_ARP_HLEN(pARPRspPkt, ETH_ALEN);
+	SET_ARP_PLEN(pARPRspPkt, RTW_IP_ADDR_LEN);
+	SET_ARP_OPER(pARPRspPkt, 2);	/* ARP response */
+	SET_ARP_SENDER_MAC_ADDR(pARPRspPkt, adapter_mac_addr(padapter));
+	SET_ARP_SENDER_IP_ADDR(pARPRspPkt, pIPAddress);
 #ifdef CONFIG_ARP_KEEP_ALIVE
 	if (!is_zero_mac_addr(pmlmepriv->gw_mac_addr)) {
-		SET_ARP_PKT_TARGET_MAC_ADDR(pARPRspPkt, pmlmepriv->gw_mac_addr);
-		SET_ARP_PKT_TARGET_IP_ADDR(pARPRspPkt, pmlmepriv->gw_ip);
+		SET_ARP_TARGET_MAC_ADDR(pARPRspPkt, pmlmepriv->gw_mac_addr);
+		SET_ARP_TARGET_IP_ADDR(pARPRspPkt, pmlmepriv->gw_ip);
 	} else
 #endif
 	{
-		SET_ARP_PKT_TARGET_MAC_ADDR(pARPRspPkt,
+		SET_ARP_TARGET_MAC_ADDR(pARPRspPkt,
 				    get_my_bssid(&(pmlmeinfo->network)));
-		SET_ARP_PKT_TARGET_IP_ADDR(pARPRspPkt,
+		SET_ARP_TARGET_IP_ADDR(pARPRspPkt,
 					   pIPAddress);
-		RTW_DBG("%s Target Mac Addr:" MAC_FMT "\n", __FUNCTION__,
+		RTW_INFO("%s Target Mac Addr:" MAC_FMT "\n", __FUNCTION__,
 			 MAC_ARG(get_my_bssid(&(pmlmeinfo->network))));
-		RTW_DBG("%s Target IP Addr" IP_FMT "\n", __FUNCTION__,
+		RTW_INFO("%s Target IP Addr" IP_FMT "\n", __FUNCTION__,
 			 IP_ARG(pIPAddress));
 	}
 
@@ -7068,7 +8048,7 @@ static void rtw_hal_construct_ndp_info(_adapter *padapter,
 	u8	*pndp_info = pframe;
 	u8	len = sizeof(struct rtw_ndp_info);
 
-	/*RTW_INFO("%s: len: %d\n", __func__, len);*/
+	RTW_INFO("%s: len: %d\n", __func__, len);
 
 	pmlmeext =  &padapter->mlmeextpriv;
 	pmlmeinfo = &pmlmeext->mlmext_info;
@@ -7455,7 +8435,6 @@ static void rtw_hal_construct_remote_control_info(_adapter *adapter,
 	RTW_INFO("=== [RSVD][%s]-NeedPage:%d, TotalPageNum:%d TotalPacketLen:%d ===\n",	\
 		ops, v1, v2, v3)
 #endif
-
 void rtw_hal_set_wow_fw_rsvd_page(_adapter *adapter, u8 *pframe, u16 index,
 		  u8 tx_desc, u32 page_size, u8 *page_num, u32 *total_pkt_len,
 				  RSVDPAGE_LOC *rsvd_page_loc)
@@ -7489,7 +8468,7 @@ void rtw_hal_set_wow_fw_rsvd_page(_adapter *adapter, u8 *pframe, u16 index,
 
 		rsvd_page_loc->LocArpRsp = *page_num;
 
-		RTW_DBG("LocArpRsp: %d\n", rsvd_page_loc->LocArpRsp);
+		RTW_INFO("LocArpRsp: %d\n", rsvd_page_loc->LocArpRsp);
 
 		rtw_hal_construct_ARPRsp(adapter, &pframe[index],
 					 &ARPLength, pmlmeinfo->ip_addr);
@@ -7503,11 +8482,15 @@ void rtw_hal_set_wow_fw_rsvd_page(_adapter *adapter, u8 *pframe, u16 index,
 		*page_num += CurtPktPageNum;
 
 		index += (CurtPktPageNum * page_size);
+		#ifdef DBG_RSVD_PAGE_CFG
+		RSVD_PAGE_CFG("WOW-ARPRsp", CurtPktPageNum, *page_num, 0);
+		#endif
+
 #ifdef CONFIG_IPV6
 		/* 2 NS offload and NDP Info*/
 		if (pwrctl->wowlan_ns_offload_en == _TRUE) {
 			rsvd_page_loc->LocNbrAdv = *page_num;
-			RTW_DBG("LocNbrAdv: %d\n", rsvd_page_loc->LocNbrAdv);
+			RTW_INFO("LocNbrAdv: %d\n", rsvd_page_loc->LocNbrAdv);
 			rtw_hal_construct_na_message(adapter,
 						     &pframe[index], &ns_len);
 			rtw_hal_fill_fake_txdesc(adapter,
@@ -7518,9 +8501,12 @@ void rtw_hal_set_wow_fw_rsvd_page(_adapter *adapter, u8 *pframe, u16 index,
 						      page_size);
 			*page_num += CurtPktPageNum;
 			index += (CurtPktPageNum * page_size);
+			#ifdef DBG_RSVD_PAGE_CFG
+			RSVD_PAGE_CFG("WOW-NbrAdv", CurtPktPageNum, *page_num, 0);
+			#endif
 
 			rsvd_page_loc->LocNDPInfo = *page_num;
-			RTW_DBG("LocNDPInfo: %d\n",
+			RTW_INFO("LocNDPInfo: %d\n",
 				 rsvd_page_loc->LocNDPInfo);
 
 			rtw_hal_construct_ndp_info(adapter,
@@ -7530,17 +8516,24 @@ void rtw_hal_set_wow_fw_rsvd_page(_adapter *adapter, u8 *pframe, u16 index,
 				(u8)PageNum(tx_desc + ns_len, page_size);
 			*page_num += CurtPktPageNum;
 			index += (CurtPktPageNum * page_size);
+			#ifdef DBG_RSVD_PAGE_CFG
+			RSVD_PAGE_CFG("WOW-NDPInfo", CurtPktPageNum, *page_num, 0);
+			#endif
+
 		}
 #endif /*CONFIG_IPV6*/
 		/* 3 Remote Control Info. * 1 page */
 		rsvd_page_loc->LocRemoteCtrlInfo = *page_num;
-		RTW_DBG("LocRemoteCtrlInfo: %d\n", rsvd_page_loc->LocRemoteCtrlInfo);
+		RTW_INFO("LocRemoteCtrlInfo: %d\n", rsvd_page_loc->LocRemoteCtrlInfo);
 		rtw_hal_construct_remote_control_info(adapter,
 						      &pframe[index - tx_desc],
 						      &rc_len);
 		CurtPktPageNum = (u8)PageNum(rc_len, page_size);
 		*page_num += CurtPktPageNum;
 		*total_pkt_len = index + rc_len;
+		#ifdef DBG_RSVD_PAGE_CFG
+		RSVD_PAGE_CFG("WOW-RCI", CurtPktPageNum, *page_num, *total_pkt_len);
+		#endif
 #ifdef CONFIG_GTK_OL
 		index += (CurtPktPageNum * page_size);
 
@@ -7558,7 +8551,7 @@ void rtw_hal_set_wow_fw_rsvd_page(_adapter *adapter, u8 *pframe, u16 index,
 
 		/* 3 KEK, KCK */
 		rsvd_page_loc->LocGTKInfo = *page_num;
-		RTW_DBG("LocGTKInfo: %d\n", rsvd_page_loc->LocGTKInfo);
+		RTW_INFO("LocGTKInfo: %d\n", rsvd_page_loc->LocGTKInfo);
 
 		if (IS_HARDWARE_TYPE_8188E(adapter) || IS_HARDWARE_TYPE_8812(adapter)) {
 			struct security_priv *psecpriv = NULL;
@@ -7600,7 +8593,7 @@ void rtw_hal_set_wow_fw_rsvd_page(_adapter *adapter, u8 *pframe, u16 index,
 			printk("\n");
 		}
 
-		RTW_DBG("%s(): HW_VAR_SET_TX_CMD: KEK KCK %p %d\n",
+		RTW_INFO("%s(): HW_VAR_SET_TX_CMD: KEK KCK %p %d\n",
 			 __FUNCTION__, &pframe[index - tx_desc],
 			 (tx_desc + RTW_KCK_LEN + RTW_KEK_LEN));
 #endif
@@ -7608,10 +8601,13 @@ void rtw_hal_set_wow_fw_rsvd_page(_adapter *adapter, u8 *pframe, u16 index,
 		*page_num += CurtPktPageNum;
 
 		index += (CurtPktPageNum * page_size);
+		#ifdef DBG_RSVD_PAGE_CFG
+		RSVD_PAGE_CFG("WOW-GTKInfo", CurtPktPageNum, *page_num, 0);
+		#endif
 
 		/* 3 GTK Response */
 		rsvd_page_loc->LocGTKRsp = *page_num;
-		RTW_DBG("LocGTKRsp: %d\n", rsvd_page_loc->LocGTKRsp);
+		RTW_INFO("LocGTKRsp: %d\n", rsvd_page_loc->LocGTKRsp);
 		rtw_hal_construct_GTKRsp(adapter, &pframe[index], &GTKLength);
 
 		rtw_hal_fill_fake_txdesc(adapter, &pframe[index - tx_desc],
@@ -7628,7 +8624,7 @@ void rtw_hal_set_wow_fw_rsvd_page(_adapter *adapter, u8 *pframe, u16 index,
 			printk(" <=end\n");
 		}
 
-		RTW_DBG("%s(): HW_VAR_SET_TX_CMD: GTK RSP %p %d\n",
+		RTW_INFO("%s(): HW_VAR_SET_TX_CMD: GTK RSP %p %d\n",
 			 __FUNCTION__, &pframe[index - tx_desc],
 			 (tx_desc + GTKLength));
 #endif
@@ -7638,11 +8634,14 @@ void rtw_hal_set_wow_fw_rsvd_page(_adapter *adapter, u8 *pframe, u16 index,
 		*page_num += CurtPktPageNum;
 
 		index += (CurtPktPageNum * page_size);
+		#ifdef DBG_RSVD_PAGE_CFG
+		RSVD_PAGE_CFG("WOW-GTKRsp", CurtPktPageNum, *page_num, 0);
+		#endif
 
 		/* below page is empty for GTK extension memory */
 		/* 3(11) GTK EXT MEM */
 		rsvd_page_loc->LocGTKEXTMEM = *page_num;
-		RTW_DBG("LocGTKEXTMEM: %d\n", rsvd_page_loc->LocGTKEXTMEM);
+		RTW_INFO("LocGTKEXTMEM: %d\n", rsvd_page_loc->LocGTKEXTMEM);
 		CurtPktPageNum = 2;
 
 		if (page_size >= 256)
@@ -7651,15 +8650,21 @@ void rtw_hal_set_wow_fw_rsvd_page(_adapter *adapter, u8 *pframe, u16 index,
 		*page_num += CurtPktPageNum;
 		/* extension memory for FW */
 		*total_pkt_len = index + (page_size * CurtPktPageNum);
+		#ifdef DBG_RSVD_PAGE_CFG
+		RSVD_PAGE_CFG("WOW-GTKEXTMEM", CurtPktPageNum, *page_num, *total_pkt_len);
+		#endif
 #endif /* CONFIG_GTK_OL */
 
 		index += (CurtPktPageNum * page_size);
 
 		/*Reserve 1 page for AOAC report*/
 		rsvd_page_loc->LocAOACReport = *page_num;
-		RTW_DBG("LocAOACReport: %d\n", rsvd_page_loc->LocAOACReport);
+		RTW_INFO("LocAOACReport: %d\n", rsvd_page_loc->LocAOACReport);
 		*page_num += 1;
 		*total_pkt_len = index + (page_size * 1);
+		#ifdef DBG_RSVD_PAGE_CFG
+		RSVD_PAGE_CFG("WOW-AOAC", 1, *page_num, *total_pkt_len);
+		#endif
 	} else {
 #ifdef CONFIG_PNO_SUPPORT
 		if (pwrctl->wowlan_in_resume == _FALSE &&
@@ -7668,7 +8673,7 @@ void rtw_hal_set_wow_fw_rsvd_page(_adapter *adapter, u8 *pframe, u16 index,
 			/* Broadcast Probe Request */
 			rsvd_page_loc->LocProbePacket = *page_num;
 
-			RTW_DBG("loc_probe_req: %d\n",
+			RTW_INFO("loc_probe_req: %d\n",
 				 rsvd_page_loc->LocProbePacket);
 
 			rtw_hal_construct_ProbeReq(
@@ -7687,6 +8692,9 @@ void rtw_hal_set_wow_fw_rsvd_page(_adapter *adapter, u8 *pframe, u16 index,
 			*page_num += CurtPktPageNum;
 
 			index += (CurtPktPageNum * page_size);
+			#ifdef DBG_RSVD_PAGE_CFG
+			RSVD_PAGE_CFG("WOW-ProbeReq", CurtPktPageNum, *page_num, 0);
+			#endif
 
 			/* Hidden SSID Probe Request */
 			ssid_num = pwrctl->pnlo_info->hidden_ssid_num;
@@ -7711,11 +8719,14 @@ void rtw_hal_set_wow_fw_rsvd_page(_adapter *adapter, u8 *pframe, u16 index,
 				*page_num += CurtPktPageNum;
 
 				index += (CurtPktPageNum * page_size);
+				#ifdef DBG_RSVD_PAGE_CFG
+				RSVD_PAGE_CFG("WOW-ProbeReq", CurtPktPageNum, *page_num, 0);
+				#endif
 			}
 
 			/* PNO INFO Page */
 			rsvd_page_loc->LocPNOInfo = *page_num;
-			RTW_DBG("LocPNOInfo: %d\n", rsvd_page_loc->LocPNOInfo);
+			RTW_INFO("LocPNOInfo: %d\n", rsvd_page_loc->LocPNOInfo);
 			rtw_hal_construct_PNO_info(adapter,
 						   &pframe[index - tx_desc],
 						   &PNOLength);
@@ -7723,10 +8734,13 @@ void rtw_hal_set_wow_fw_rsvd_page(_adapter *adapter, u8 *pframe, u16 index,
 			CurtPktPageNum = (u8)PageNum(PNOLength, page_size);
 			*page_num += CurtPktPageNum;
 			index += (CurtPktPageNum * page_size);
+			#ifdef DBG_RSVD_PAGE_CFG
+			RSVD_PAGE_CFG("WOW-PNOInfo", CurtPktPageNum, *page_num, 0);
+			#endif
 
 			/* Scan Info Page */
 			rsvd_page_loc->LocScanInfo = *page_num;
-			RTW_DBG("LocScanInfo: %d\n", rsvd_page_loc->LocScanInfo);
+			RTW_INFO("LocScanInfo: %d\n", rsvd_page_loc->LocScanInfo);
 			rtw_hal_construct_scan_info(adapter,
 						    &pframe[index - tx_desc],
 						    &ScanInfoLength);
@@ -7735,6 +8749,9 @@ void rtw_hal_set_wow_fw_rsvd_page(_adapter *adapter, u8 *pframe, u16 index,
 			*page_num += CurtPktPageNum;
 			*total_pkt_len = index + ScanInfoLength;
 			index += (CurtPktPageNum * page_size);
+			#ifdef DBG_RSVD_PAGE_CFG
+			RSVD_PAGE_CFG("WOW-ScanInfo", CurtPktPageNum, *page_num, *total_pkt_len);
+			#endif
 		}
 #endif /* CONFIG_PNO_SUPPORT */
 	}
@@ -7768,7 +8785,7 @@ static void rtw_hal_gate_bb(_adapter *adapter, bool stop)
 		val8 = rtw_read8(adapter, REG_SYS_FUNC_EN);
 		val8 &= ~BIT(0);
 		rtw_write8(adapter, REG_SYS_FUNC_EN, val8);
-		RTW_DBG("%s: BB gated: 0x%02x, store TXPAUSE: %02x\n",
+		RTW_INFO("%s: BB gated: 0x%02x, store TXPAUSE: %02x\n",
 			 __func__,
 			 rtw_read8(adapter, REG_SYS_FUNC_EN),
 			 pwrpriv->wowlan_txpause_status);
@@ -7776,7 +8793,7 @@ static void rtw_hal_gate_bb(_adapter *adapter, bool stop)
 		val8 = rtw_read8(adapter, REG_SYS_FUNC_EN);
 		val8 |= BIT(0);
 		rtw_write8(adapter, REG_SYS_FUNC_EN, val8);
-		RTW_DBG("%s: BB release: 0x%02x, recover TXPAUSE:%02x\n",
+		RTW_INFO("%s: BB release: 0x%02x, recover TXPAUSE:%02x\n",
 			 __func__, rtw_read8(adapter, REG_SYS_FUNC_EN),
 			 pwrpriv->wowlan_txpause_status);
 		/* release TX*/
@@ -7816,7 +8833,7 @@ static u8 rtw_hal_wow_pattern_generate(_adapter *adapter, u8 idx, struct rtl_wow
 	int i, j;
 
 	if (pwrctl->wowlan_pattern_idx > MAX_WKFM_CAM_NUM) {
-		RTW_ERR("%s pattern_idx is more than MAX_FMC_NUM: %d\n",
+		RTW_INFO("%s pattern_idx is more than MAX_FMC_NUM: %d\n",
 			 __func__, MAX_WKFM_CAM_NUM);
 		return _FAIL;
 	}
@@ -7911,7 +8928,7 @@ static void rtw_hal_set_wow_rxff_boundary(_adapter *adapter, bool wow_mode)
 
 	val8 = rtw_read8(adapter, REG_FIFOPAGE + 3);
 	if (val8 != 0)
-		RTW_WARN("%s:[%04x]some PKTs in TXPKTBUF\n",
+		RTW_INFO("%s:[%04x]some PKTs in TXPKTBUF\n",
 			 __func__, (REG_FIFOPAGE + 3));
 
 	rtw_hal_reset_mac_rx(adapter);
@@ -7922,7 +8939,7 @@ static void rtw_hal_set_wow_rxff_boundary(_adapter *adapter, bool wow_mode)
 		rxff_bndy = rx_dma_buff_sz - 1;
 
 		rtw_write16(adapter, (REG_TRXFF_BNDY + 2), rxff_bndy);
-		RTW_DBG("%s: wow mode, 0x%04x: 0x%04x\n", __func__,
+		RTW_INFO("%s: wow mode, 0x%04x: 0x%04x\n", __func__,
 			 REG_TRXFF_BNDY + 2,
 			 rtw_read16(adapter, (REG_TRXFF_BNDY + 2)));
 	} else {
@@ -7930,7 +8947,7 @@ static void rtw_hal_set_wow_rxff_boundary(_adapter *adapter, bool wow_mode)
 				    (u8 *)&rx_dma_buff_sz);
 		rxff_bndy = rx_dma_buff_sz - 1;
 		rtw_write16(adapter, (REG_TRXFF_BNDY + 2), rxff_bndy);
-		RTW_DBG("%s: normal mode, 0x%04x: 0x%04x\n", __func__,
+		RTW_INFO("%s: normal mode, 0x%04x: 0x%04x\n", __func__,
 			 REG_TRXFF_BNDY + 2,
 			 rtw_read16(adapter, (REG_TRXFF_BNDY + 2)));
 	}
@@ -7947,7 +8964,7 @@ bool rtw_read_from_frame_mask(_adapter *adapter, u8 idx)
 	bool res = _TRUE;
 
 	if (idx > MAX_WKFM_CAM_NUM) {
-		RTW_ERR("[Error]: %s, pattern index is out of range\n",
+		RTW_INFO("[Error]: %s, pattern index is out of range\n",
 			 __func__);
 		return _FALSE;
 	}
@@ -7956,14 +8973,14 @@ bool rtw_read_from_frame_mask(_adapter *adapter, u8 idx)
 			    (u8 *)&rx_dma_buff_sz);
 
 	if (rx_dma_buff_sz == 0) {
-		RTW_ERR("[Error]: %s, rx_dma_buff_sz is 0!!\n", __func__);
+		RTW_INFO("[Error]: %s, rx_dma_buff_sz is 0!!\n", __func__);
 		return _FALSE;
 	}
 
 	rtw_hal_get_def_var(adapter, HAL_DEF_RX_PAGE_SIZE, (u8 *)&page_sz);
 
 	if (page_sz == 0) {
-		RTW_ERR("[Error]: %s, page_sz is 0!!\n", __func__);
+		RTW_INFO("[Error]: %s, page_sz is 0!!\n", __func__);
 		return _FALSE;
 	}
 
@@ -7995,7 +9012,7 @@ bool rtw_read_from_frame_mask(_adapter *adapter, u8 idx)
 		data_l = rtw_read32(adapter, REG_PKTBUF_DBG_DATA_L);
 		data_h = rtw_read32(adapter, REG_PKTBUF_DBG_DATA_H);
 
-		RTW_DBG("[%d]: %08x %08x\n", i, data_h, data_l);
+		RTW_INFO("[%d]: %08x %08x\n", i, data_h, data_l);
 
 		count = 0;
 
@@ -8006,7 +9023,7 @@ bool rtw_read_from_frame_mask(_adapter *adapter, u8 idx)
 		} while (!tmp && count < 100);
 
 		if (count >= 100) {
-			RTW_ERR("%s count:%d\n", __func__, count);
+			RTW_INFO("%s count:%d\n", __func__, count);
 			res = _FALSE;
 		}
 	}
@@ -8028,7 +9045,7 @@ bool rtw_write_to_frame_mask(_adapter *adapter, u8 idx,
 	int res = 0, i = 0;
 
 	if (idx > MAX_WKFM_CAM_NUM) {
-		RTW_ERR("[Error]: %s, pattern index is out of range\n",
+		RTW_INFO("[Error]: %s, pattern index is out of range\n",
 			 __func__);
 		return _FALSE;
 	}
@@ -8037,14 +9054,14 @@ bool rtw_write_to_frame_mask(_adapter *adapter, u8 idx,
 			    (u8 *)&rx_dma_buff_sz);
 
 	if (rx_dma_buff_sz == 0) {
-		RTW_ERR("[Error]: %s, rx_dma_buff_sz is 0!!\n", __func__);
+		RTW_INFO("[Error]: %s, rx_dma_buff_sz is 0!!\n", __func__);
 		return _FALSE;
 	}
 
 	rtw_hal_get_def_var(adapter, HAL_DEF_RX_PAGE_SIZE, (u8 *)&page_sz);
 
 	if (page_sz == 0) {
-		RTW_ERR("[Error]: %s, page_sz is 0!!\n", __func__);
+		RTW_INFO("[Error]: %s, page_sz is 0!!\n", __func__);
 		return _FALSE;
 	}
 
@@ -8161,7 +9178,7 @@ static int rtw_hal_set_pattern(_adapter *adapter, u8 *pattern,
 	int i, j;
 
 	if (pwrctl->wowlan_pattern_idx > MAX_WKFM_CAM_NUM) {
-		RTW_ERR("%s pattern_idx is more than MAX_FMC_NUM: %d\n",
+		RTW_INFO("%s pattern_idx is more than MAX_FMC_NUM: %d\n",
 			 __func__, MAX_WKFM_CAM_NUM);
 		return _FALSE;
 	}
@@ -8275,7 +9292,7 @@ void rtw_fill_pattern(_adapter *adapter)
 				index += 2;
 
 			if (rtw_write_to_frame_mask(adapter, index, &wow_pattern) == _FALSE)
-				RTW_ERR("%s: ERROR!! idx: %d write_to_frame_mask_cam fail\n", __func__, i);
+				RTW_INFO("%s: ERROR!! idx: %d write_to_frame_mask_cam fail\n", __func__, i);
 		}
 
 	}
@@ -8554,6 +9571,7 @@ static void rtw_hal_dl_pattern(_adapter *adapter, u8 mode)
 
 static void rtw_hal_wow_enable(_adapter *adapter)
 {
+	struct registry_priv  *registry_par = &adapter->registrypriv;
 	struct pwrctrl_priv *pwrctl = adapter_to_pwrctl(adapter);
 	struct security_priv *psecuritypriv = &adapter->securitypriv;
 	struct mlme_priv *pmlmepriv = &adapter->mlmepriv;
@@ -8562,19 +9580,27 @@ static void rtw_hal_wow_enable(_adapter *adapter)
 	PHAL_DATA_TYPE pHalData = GET_HAL_DATA(adapter);
 	int res;
 	u16 media_status_rpt;
+	u8 no_wake = 0;
 
 
-	RTW_INFO("%s, WOWLAN_ENABLE\n", __func__);
-	rtw_hal_gate_bb(adapter, _TRUE);
+	if(registry_par->suspend_type == FW_IPS_DISABLE_BBRF &&
+	!check_fwstate(pmlmepriv, _FW_LINKED))
+		no_wake = 1;
 
-	if (rtw_is_support_gtk_offload(adapter))
+	RTW_PRINT(FUNC_ADPT_FMT " WOWLAN_ENABLE\n", FUNC_ADPT_ARG(adapter));
+	rtw_hal_gate_bb(adapter, _TRUE);
+#ifdef CONFIG_GTK_OL
+	if (psecuritypriv->binstallKCK_KEK == _TRUE)
 		rtw_hal_fw_sync_cam_id(adapter);
-
+#endif
 	if (IS_HARDWARE_TYPE_8723B(adapter))
 		rtw_hal_backup_rate(adapter);
 
 	rtw_hal_fw_dl(adapter, _TRUE);
-	media_status_rpt = RT_MEDIA_CONNECT;
+	if(no_wake)
+		media_status_rpt = RT_MEDIA_DISCONNECT;
+	else
+		media_status_rpt = RT_MEDIA_CONNECT;
 	rtw_hal_set_hwreg(adapter, HW_VAR_H2C_FW_JOINBSSRPT,
 			  (u8 *)&media_status_rpt);
 
@@ -8586,7 +9612,7 @@ static void rtw_hal_wow_enable(_adapter *adapter)
 
 	res = rtw_hal_pause_rx_dma(adapter);
 	if (res == _FAIL)
-		RTW_WARN("[WARNING] pause RX DMA fail\n");
+		RTW_PRINT("[WARNING] pause RX DMA fail\n");
 
 	#ifndef CONFIG_WOW_PATTERN_HW_CAM
 	/* Reconfig RX_FF Boundary */
@@ -8594,17 +9620,20 @@ static void rtw_hal_wow_enable(_adapter *adapter)
 	#endif
 
 	/* redownload wow pattern */
-	rtw_hal_dl_pattern(adapter, 1);
+	if(!no_wake)
+		rtw_hal_dl_pattern(adapter, 1);
 
 	if (!pwrctl->wowlan_pno_enable) {
 		psta = rtw_get_stainfo(&adapter->stapriv, get_bssid(pmlmepriv));
 
 		if (psta != NULL) {
 			#ifdef CONFIG_FW_MULTI_PORT_SUPPORT
+			adapter_to_dvobj(adapter)->dft.port_id = 0xFF;
+			adapter_to_dvobj(adapter)->dft.mac_id = 0xFF;
 			rtw_hal_set_default_port_id_cmd(adapter, psta->cmn.mac_id);
 			#endif
-
-			rtw_sta_media_status_rpt(adapter, psta, 1);
+			if(!no_wake)
+				rtw_sta_media_status_rpt(adapter, psta, 1);
 		}
 	}
 
@@ -8612,23 +9641,24 @@ static void rtw_hal_wow_enable(_adapter *adapter)
 	/* Enable CPWM2 only. */
 	res = rtw_hal_enable_cpwm2(adapter);
 	if (res == _FAIL)
-		RTW_WARN("[WARNING] enable cpwm2 fail\n");
+		RTW_PRINT("[WARNING] enable cpwm2 fail\n");
 #endif
 #ifdef CONFIG_GPIO_WAKEUP
 	rtw_hal_switch_gpio_wl_ctrl(adapter, WAKEUP_GPIO_IDX, _TRUE);
 #endif
 	/* Set WOWLAN H2C command. */
+	RTW_PRINT("Set WOWLan cmd\n");
 	rtw_hal_set_fw_wow_related_cmd(adapter, 1);
 
 	res = rtw_hal_check_wow_ctrl(adapter, _TRUE);
 
 	if (res == _FALSE)
-		RTW_ERR("[Error]%s: set wowlan CMD fail!!\n", __func__);
+		RTW_INFO("[Error]%s: set wowlan CMD fail!!\n", __func__);
 
 	pwrctl->wowlan_wake_reason =
 		rtw_read8(adapter, REG_WOWLAN_WAKE_REASON);
 
-	RTW_INFO("%s: wowlan_wake_reason: 0x%02x\n", __func__,
+	RTW_PRINT("wowlan_wake_reason: 0x%02x\n",
 		  pwrctl->wowlan_wake_reason);
 #ifdef CONFIG_GTK_OL_DBG
 	dump_sec_cam(RTW_DBGDUMP, adapter);
@@ -8642,7 +9672,8 @@ static void rtw_hal_wow_enable(_adapter *adapter)
 #if defined(CONFIG_USB_HCI) || defined(CONFIG_PCI_HCI)
 	/* Invoid SE0 reset signal during suspending*/
 	rtw_write8(adapter, REG_RSV_CTRL, 0x20);
-	if (IS_8188F(pHalData->version_id) == FALSE)
+	if (IS_8188F(pHalData->version_id) == FALSE
+		&& IS_8188GTV(pHalData->version_id) == FALSE)
 		rtw_write8(adapter, REG_RSV_CTRL, 0x60);
 #endif
 
@@ -8707,30 +9738,36 @@ static void rtw_hal_wow_disable(_adapter *adapter)
 	struct mlme_priv *pmlmepriv = &adapter->mlmepriv;
 	struct hal_ops *pHalFunc = &adapter->hal_func;
 	struct sta_info *psta = NULL;
+	struct registry_priv  *registry_par = &adapter->registrypriv;
 	int res;
 	u16 media_status_rpt;
 	u8 val8;
 
-	RTW_INFO("%s, WOWLAN_DISABLE\n", __func__);
-
+	RTW_PRINT("%s, WOWLAN_DISABLE\n", __func__);
+	
+	if(registry_par->suspend_type == FW_IPS_DISABLE_BBRF && !check_fwstate(pmlmepriv, _FW_LINKED)) {
+		RTW_INFO("FW_IPS_DISABLE_BBRF resume\n");
+		return;
+	}
+	
 	if (!pwrctl->wowlan_pno_enable) {
 		psta = rtw_get_stainfo(&adapter->stapriv, get_bssid(pmlmepriv));
 		if (psta != NULL)
 			rtw_sta_media_status_rpt(adapter, psta, 0);
 		else
-			RTW_WARN("%s: psta is null\n", __func__);
+			RTW_INFO("%s: psta is null\n", __func__);
 	}
 
 	if (0) {
-		RTW_DBG("0x630:0x%02x\n", rtw_read8(adapter, 0x630));
-		RTW_DBG("0x631:0x%02x\n", rtw_read8(adapter, 0x631));
-		RTW_DBG("0x634:0x%02x\n", rtw_read8(adapter, 0x634));
-		RTW_DBG("0x1c7:0x%02x\n", rtw_read8(adapter, 0x1c7));
+		RTW_INFO("0x630:0x%02x\n", rtw_read8(adapter, 0x630));
+		RTW_INFO("0x631:0x%02x\n", rtw_read8(adapter, 0x631));
+		RTW_INFO("0x634:0x%02x\n", rtw_read8(adapter, 0x634));
+		RTW_INFO("0x1c7:0x%02x\n", rtw_read8(adapter, 0x1c7));
 	}
 
 	pwrctl->wowlan_wake_reason = rtw_read8(adapter, REG_WOWLAN_WAKE_REASON);
 
-	RTW_INFO("%s: wakeup_reason: 0x%02x\n", __func__,
+	RTW_PRINT("wakeup_reason: 0x%02x\n",
 		  pwrctl->wowlan_wake_reason);
 	#ifdef DBG_WAKEUP_REASON
 	_dbg_rtw_wake_up_reason(adapter, pwrctl->wowlan_wake_reason);
@@ -8741,7 +9778,7 @@ static void rtw_hal_wow_disable(_adapter *adapter)
 	res = rtw_hal_check_wow_ctrl(adapter, _FALSE);
 
 	if (res == _FALSE) {
-		RTW_ERR("[Error]%s: disable WOW cmd fail\n!!", __func__);
+		RTW_INFO("[Error]%s: disable WOW cmd fail\n!!", __func__);
 		rtw_hal_force_enable_rxdma(adapter);
 	}
 
@@ -8749,7 +9786,7 @@ static void rtw_hal_wow_disable(_adapter *adapter)
 
 	res = rtw_hal_pause_rx_dma(adapter);
 	if (res == _FAIL)
-		RTW_WARN("[WARNING] pause RX DMA fail\n");
+		RTW_PRINT("[WARNING] pause RX DMA fail\n");
 
 	/* clean HW pattern match */
 	rtw_hal_dl_pattern(adapter, 0);
@@ -8765,8 +9802,8 @@ static void rtw_hal_wow_disable(_adapter *adapter)
 		rtw_hal_enable_tx_report(adapter);
 	#endif
 
-	if ((pwrctl->wowlan_wake_reason != RX_DISASSOC) ||
-		(pwrctl->wowlan_wake_reason != RX_DEAUTH) ||
+	if ((pwrctl->wowlan_wake_reason != RX_DISASSOC) &&
+		(pwrctl->wowlan_wake_reason != RX_DEAUTH) &&
 		(pwrctl->wowlan_wake_reason != FW_DECISION_DISCONNECT)) {
 		rtw_hal_get_aoac_rpt(adapter);
 		rtw_hal_update_sw_security_info(adapter);
@@ -8776,6 +9813,9 @@ static void rtw_hal_wow_disable(_adapter *adapter)
 
 #ifdef CONFIG_GPIO_WAKEUP
 
+#ifdef CONFIG_RTW_ONE_PIN_GPIO
+	rtw_hal_set_input_gpio(adapter, WAKEUP_GPIO_IDX);
+#else
 #ifdef CONFIG_WAKEUP_GPIO_INPUT_MODE
 	if (pwrctl->is_high_active == 0)
 		rtw_hal_set_input_gpio(adapter, WAKEUP_GPIO_IDX);
@@ -8783,12 +9823,12 @@ static void rtw_hal_wow_disable(_adapter *adapter)
 		rtw_hal_set_output_gpio(adapter, WAKEUP_GPIO_IDX, 0);
 #else
 	val8 = (pwrctl->is_high_active == 0) ? 1 : 0;
-	RTW_INFO("%s: Set Wake GPIO to default(%d).\n", __func__, val8);
+	RTW_PRINT("Set Wake GPIO to default(%d).\n", val8);
 
 	rtw_hal_set_output_gpio(adapter, WAKEUP_GPIO_IDX, val8);
 	rtw_hal_switch_gpio_wl_ctrl(adapter, WAKEUP_GPIO_IDX, _FALSE);
 #endif
-
+#endif /* CONFIG_RTW_ONE_PIN_GPIO */
 #endif
 	if ((pwrctl->wowlan_wake_reason != FW_DECISION_DISCONNECT) &&
 	    (pwrctl->wowlan_wake_reason != RX_PAIRWISEKEY) &&
@@ -8801,6 +9841,8 @@ static void rtw_hal_wow_disable(_adapter *adapter)
 
 		if (psta != NULL) {
 			#ifdef CONFIG_FW_MULTI_PORT_SUPPORT
+			adapter_to_dvobj(adapter)->dft.port_id = 0xFF;
+			adapter_to_dvobj(adapter)->dft.mac_id = 0xFF;
 			rtw_hal_set_default_port_id_cmd(adapter, psta->cmn.mac_id);
 			#endif
 			rtw_sta_media_status_rpt(adapter, psta, 1);
@@ -8835,6 +9877,9 @@ void rtw_hal_set_p2p_wow_fw_rsvd_page(_adapter *adapter, u8 *pframe, u16 index,
 	*page_num += CurtPktPageNum;
 
 	index += (CurtPktPageNum * page_size);
+	#ifdef DBG_RSVD_PAGE_CFG
+	RSVD_PAGE_CFG("WOW-P2P-Beacon", CurtPktPageNum, *page_num, 0);
+	#endif
 
 	/* P2P Probe rsp */
 	rsvd_page_loc->LocP2PProbeRsp = *page_num;
@@ -8851,6 +9896,9 @@ void rtw_hal_set_p2p_wow_fw_rsvd_page(_adapter *adapter, u8 *pframe, u16 index,
 	*page_num += CurtPktPageNum;
 
 	index += (CurtPktPageNum * page_size);
+	#ifdef DBG_RSVD_PAGE_CFG
+	RSVD_PAGE_CFG("WOW-P2P-ProbeRsp", CurtPktPageNum, *page_num, 0);
+	#endif
 
 	/* P2P nego rsp */
 	rsvd_page_loc->LocNegoRsp = *page_num;
@@ -8867,6 +9915,9 @@ void rtw_hal_set_p2p_wow_fw_rsvd_page(_adapter *adapter, u8 *pframe, u16 index,
 	*page_num += CurtPktPageNum;
 
 	index += (CurtPktPageNum * page_size);
+	#ifdef DBG_RSVD_PAGE_CFG
+	RSVD_PAGE_CFG("WOW-P2P-NegoRsp", CurtPktPageNum, *page_num, 0);
+	#endif
 
 	/* P2P invite rsp */
 	rsvd_page_loc->LocInviteRsp = *page_num;
@@ -8883,6 +9934,9 @@ void rtw_hal_set_p2p_wow_fw_rsvd_page(_adapter *adapter, u8 *pframe, u16 index,
 	*page_num += CurtPktPageNum;
 
 	index += (CurtPktPageNum * page_size);
+	#ifdef DBG_RSVD_PAGE_CFG
+	RSVD_PAGE_CFG("WOW-P2P-InviteRsp", CurtPktPageNum, *page_num, 0);
+	#endif
 
 	/* P2P provision discovery rsp */
 	rsvd_page_loc->LocPDRsp = *page_num;
@@ -8900,6 +9954,9 @@ void rtw_hal_set_p2p_wow_fw_rsvd_page(_adapter *adapter, u8 *pframe, u16 index,
 	*page_num += CurtPktPageNum;
 
 	*total_pkt_len = index + P2PPDRspLength;
+	#ifdef DBG_RSVD_PAGE_CFG
+	RSVD_PAGE_CFG("WOW-P2P-PDR", CurtPktPageNum, *page_num, *total_pkt_len);
+	#endif
 
 	index += (CurtPktPageNum * page_size);
 
@@ -8957,8 +10014,8 @@ static void rtw_hal_set_lps_pg_info_rsvd_page(_adapter *adapter)
 #endif
 #ifdef CONFIG_BEAMFORMING  /*&& MU BF*/
 	/*Btye 3 - Max MU rate table Group ID*/
-	LPSPG_RSVD_PAGE_SET_MU_RAID_GID(lps_pg_info, _value);
-	RTW_INFO("[LPSPG-INFO] Max MU rate table Group ID :%d\n", _value);
+	LPSPG_RSVD_PAGE_SET_MU_RAID_GID(lps_pg_info, 0);
+	RTW_INFO("[LPSPG-INFO] Max MU rate table Group ID :%d\n", 0);
 #endif
 
 	/*Btye 8 ~15 - used Security CAM entry */
@@ -9094,6 +10151,13 @@ void rtw_hal_lps_pg_rssi_lv_decide(_adapter *adapter, struct sta_info *sta)
 
 void rtw_hal_lps_pg_handler(_adapter *adapter, enum lps_pg_hdl_id hdl_id)
 {
+	struct mlme_ext_priv *pmlmeext = &adapter->mlmeextpriv;
+	struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info);
+	struct sta_priv *pstapriv = &adapter->stapriv;
+	struct sta_info *sta;
+
+	sta = rtw_get_stainfo(pstapriv, pmlmeinfo->network.MacAddress);
+
 	switch (hdl_id) {
 	case LPS_PG_INFO_CFG:
 		rtw_hal_set_lps_pg_info(adapter);
@@ -9108,20 +10172,16 @@ void rtw_hal_lps_pg_handler(_adapter *adapter, enum lps_pg_hdl_id hdl_id)
 			rtw_clr_xmit_block(adapter, XMIT_BLOCK_REDLMEM);
 		}
 		break;
-
-	case LPS_PG_RESEND_H2C:
+	case LPS_PG_PHYDM_DIS:/*Disable RA and PT by H2C*/
+		if (sta)
+			rtw_phydm_lps_pg_hdl(adapter, sta, _TRUE);
+		break;
+	case LPS_PG_PHYDM_EN:/*Enable RA and PT by H2C*/
 		{
-			struct macid_ctl_t *macid_ctl = &adapter->dvobj->macid_ctl;
-			struct sta_info *sta;
-			int i;
-
-			for (i = 0; i < MACID_NUM_SW_LIMIT; i++) {
-				sta = macid_ctl->sta[i];
-				if (sta && !is_broadcast_mac_addr(sta->cmn.mac_addr)) {
-					rtw_hal_lps_pg_rssi_lv_decide(adapter, sta);
-					set_sta_rate(adapter, sta);
-					sta->lps_pg_rssi_lv = 0;
-				}
+			if (sta) {
+				rtw_hal_lps_pg_rssi_lv_decide(adapter, sta);
+				rtw_phydm_lps_pg_hdl(adapter, sta, _FALSE);
+				sta->lps_pg_rssi_lv = 0;
 			}
 		}
 		break;
@@ -9133,6 +10193,73 @@ void rtw_hal_lps_pg_handler(_adapter *adapter, enum lps_pg_hdl_id hdl_id)
 
 #endif /*CONFIG_LPS_PG*/
 
+static u8 _rtw_mi_assoc_if_num(_adapter *adapter)
+{
+	u8 mi_iface_num = 0;
+
+	if (0) {
+		RTW_INFO("[IFS_ASSOC_STATUS] - STA :%d", DEV_STA_LD_NUM(adapter_to_dvobj(adapter)));
+		RTW_INFO("[IFS_ASSOC_STATUS] - AP:%d", DEV_AP_NUM(adapter_to_dvobj(adapter)));
+		RTW_INFO("[IFS_ASSOC_STATUS] - AP starting :%d", DEV_AP_STARTING_NUM(adapter_to_dvobj(adapter)));
+		RTW_INFO("[IFS_ASSOC_STATUS] - MESH :%d", DEV_MESH_NUM(adapter_to_dvobj(adapter)));
+		RTW_INFO("[IFS_ASSOC_STATUS] - ADHOC :%d", DEV_ADHOC_NUM(adapter_to_dvobj(adapter)));
+		/*RTW_INFO("[IFS_ASSOC_STATUS] - P2P-GC :%d", DEV_P2P_GC_NUM(adapter_to_dvobj(adapter)));*/
+		/*RTW_INFO("[IFS_ASSOC_STATUS] - P2P-GO :%d", DEV_P2P_GO_NUM(adapter_to_dvobj(adapter)));*/
+	}
+
+	mi_iface_num = (DEV_STA_LD_NUM(adapter_to_dvobj(adapter)) +
+		DEV_AP_NUM(adapter_to_dvobj(adapter)) +
+		DEV_AP_STARTING_NUM(adapter_to_dvobj(adapter)));
+	return mi_iface_num;
+}
+
+static _adapter *_rtw_search_sta_iface(_adapter *adapter)
+{
+	struct dvobj_priv *dvobj = adapter_to_dvobj(adapter);
+	_adapter *iface = NULL;
+	_adapter *sta_iface = NULL;
+	int i;
+
+	for (i = 0; i < dvobj->iface_nums; i++) {
+		iface = dvobj->padapters[i];
+		if (check_fwstate(&iface->mlmepriv, WIFI_STATION_STATE) == _TRUE) {
+			if (check_fwstate(&iface->mlmepriv, _FW_LINKED) == _TRUE) {
+				sta_iface = iface;
+				break;
+			}
+		}
+	}
+	return sta_iface;
+}
+#ifdef CONFIG_AP_MODE
+static _adapter *_rtw_search_ap_iface(_adapter *adapter)
+{
+	struct dvobj_priv *dvobj = adapter_to_dvobj(adapter);
+	_adapter *iface = NULL;
+	_adapter *ap_iface = NULL;
+	int i;
+
+	for (i = 0; i < dvobj->iface_nums; i++) {
+		iface = dvobj->padapters[i];
+		if (check_fwstate(&iface->mlmepriv, WIFI_AP_STATE) == _TRUE ) {
+			ap_iface = iface;
+			break;
+		}
+	}
+	return ap_iface;
+}
+#endif
+
+#ifdef CONFIG_CUSTOMER01_SMART_ANTENNA
+void rtw_hal_set_pathb_phase(_adapter *adapter, u8 phase_idx)
+{
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(adapter);
+	struct PHY_DM_STRUCT		*pDM_Odm = &pHalData->odmpriv;
+
+	return phydm_pathb_q_matrix_rotate(pDM_Odm, phase_idx);
+}
+#endif
+
 /*
  * Description: Fill the reserved packets that FW will use to RSVD page.
  *			Now we just send 4 types packet to rsvd page.
@@ -9161,8 +10288,6 @@ static void _rtw_hal_set_fw_rsvd_page(_adapter *adapter, bool finished, u8 *page
 	struct xmit_frame	*pcmdframe = NULL;
 	struct pkt_attrib	*pattrib;
 	struct xmit_priv	*pxmitpriv;
-	struct mlme_ext_priv	*pmlmeext;
-	struct mlme_ext_info	*pmlmeinfo;
 	struct pwrctrl_priv *pwrctl;
 	struct mlme_priv *pmlmepriv = &adapter->mlmepriv;
 	struct hal_ops *pHalFunc = &adapter->hal_func;
@@ -9175,6 +10300,11 @@ static void _rtw_hal_set_fw_rsvd_page(_adapter *adapter, bool finished, u8 *page
 	u16	BufIndex = 0;
 	u32	TotalPacketLen = 0, MaxRsvdPageBufSize = 0, PageSize = 0;
 	RSVDPAGE_LOC	RsvdPageLoc;
+	struct registry_priv  *registry_par = &adapter->registrypriv;
+
+#ifdef DBG_FW_DEBUG_MSG_PKT
+	u32	fw_dbg_msg_pkt_len = 0;
+#endif /*DBG_FW_DEBUG_MSG_PKT*/
 
 #ifdef DBG_CONFIG_ERROR_DETECT
 	struct sreset_priv *psrtpriv;
@@ -9183,23 +10313,34 @@ static void _rtw_hal_set_fw_rsvd_page(_adapter *adapter, bool finished, u8 *page
 #ifdef CONFIG_MCC_MODE
 	u8 dl_mcc_page = _FAIL;
 #endif /* CONFIG_MCC_MODE */
+	u8 nr_assoc_if;
+
+	_adapter *sta_iface = NULL;
+	_adapter *ap_iface = NULL;
+
+	bool is_wow_mode = _FALSE;
 
 	pHalData = GET_HAL_DATA(adapter);
 #ifdef DBG_CONFIG_ERROR_DETECT
 	psrtpriv = &pHalData->srestpriv;
 #endif
 	pxmitpriv = &adapter->xmitpriv;
-	pmlmeext = &adapter->mlmeextpriv;
-	pmlmeinfo = &pmlmeext->mlmext_info;
 	pwrctl = adapter_to_pwrctl(adapter);
 
 	rtw_hal_get_def_var(adapter, HAL_DEF_TX_PAGE_SIZE, (u8 *)&PageSize);
 
 	if (PageSize == 0) {
-		RTW_INFO("[Error]: %s, PageSize is zero!!\n", __func__);
+		RTW_ERR("[Error]: %s, PageSize is zero!!\n", __func__);
 		return;
 	}
+	nr_assoc_if = _rtw_mi_assoc_if_num(adapter);
+
+	if ((pwrctl->wowlan_mode == _TRUE && pwrctl->wowlan_in_resume == _FALSE) ||
+		pwrctl->wowlan_ap_mode == _TRUE ||
+		pwrctl->wowlan_p2p_mode == _TRUE)
+		is_wow_mode = _TRUE;
 
+	/*page_num for init time to get rsvd page number*/
 	/* Prepare ReservedPagePacket */
 	if (page_num) {
 		ReservedPagePacket = rtw_zmalloc(MAX_CMDBUF_SZ);
@@ -9208,13 +10349,17 @@ static void _rtw_hal_set_fw_rsvd_page(_adapter *adapter, bool finished, u8 *page
 			*page_num = 0xFF;
 			return;
 		}
+		RTW_INFO(FUNC_ADPT_FMT" Get [ %s ] RsvdPageNUm  ==>\n",
+			FUNC_ADPT_ARG(adapter), (is_wow_mode) ? "WOW" : "NOR");
+
 	} else {
-		if (pwrctl->wowlan_mode == _TRUE || pwrctl->wowlan_ap_mode == _TRUE)
+		if (is_wow_mode)
 			RsvdPageNum = rtw_hal_get_txbuff_rsvd_page_num(adapter, _TRUE);
 		else
 			RsvdPageNum = rtw_hal_get_txbuff_rsvd_page_num(adapter, _FALSE);
 
-		RTW_INFO("%s PageSize: %d, RsvdPageNUm: %d\n", __func__, PageSize, RsvdPageNum);
+		RTW_INFO(FUNC_ADPT_FMT" PageSize: %d, [ %s ]-RsvdPageNUm: %d\n",
+			FUNC_ADPT_ARG(adapter), PageSize, (is_wow_mode) ? "WOW" : "NOR", RsvdPageNum);
 
 		MaxRsvdPageBufSize = RsvdPageNum * PageSize;
 		if (MaxRsvdPageBufSize > MAX_CMDBUF_SZ) {
@@ -9235,8 +10380,9 @@ static void _rtw_hal_set_fw_rsvd_page(_adapter *adapter, bool finished, u8 *page
 
 	_rtw_memset(&RsvdPageLoc, 0, sizeof(RSVDPAGE_LOC));
 
-	/* beacon * 1 pages */
 	BufIndex = TxDescOffset;
+
+	/*======== beacon content =======*/
 	rtw_hal_construct_beacon(adapter,
 				 &ReservedPagePacket[BufIndex], &BeaconLength);
 
@@ -9244,19 +10390,32 @@ static void _rtw_hal_set_fw_rsvd_page(_adapter *adapter, bool finished, u8 *page
 	* When we count the first page size, we need to reserve description size for the RSVD
 	* packet, it will be filled in front of the packet in TXPKTBUF.
 	*/
+	BeaconLength = MAX_BEACON_LEN - TxDescLen;
 	CurtPktPageNum = (u8)PageNum((TxDescLen + BeaconLength), PageSize);
 
+#ifdef CONFIG_FW_HANDLE_TXBCN
+	CurtPktPageNum = CurtPktPageNum * CONFIG_LIMITED_AP_NUM;
+#endif
 	TotalPageNum += CurtPktPageNum;
 
 	BufIndex += (CurtPktPageNum * PageSize);
 
-	if (pwrctl->wowlan_ap_mode == _TRUE) {
+	#ifdef DBG_RSVD_PAGE_CFG
+	RSVD_PAGE_CFG("Beacon", CurtPktPageNum, TotalPageNum, TotalPacketLen);
+	#endif
+
+	/*======== probe response content ========*/
+	if (pwrctl->wowlan_ap_mode == _TRUE) {/*WOW mode*/
+		#ifdef CONFIG_CONCURRENT_MODE
+		if (nr_assoc_if >= 2)
+			RTW_ERR("Not support > 2 net-interface in WOW\n");
+		#endif
 		/* (4) probe response*/
 		RsvdPageLoc.LocProbeRsp = TotalPageNum;
 		rtw_hal_construct_ProbeRsp(
 			adapter, &ReservedPagePacket[BufIndex],
 			&ProbeRspLength,
-			get_my_bssid(&pmlmeinfo->network), _FALSE);
+			_FALSE);
 		rtw_hal_fill_fake_txdesc(adapter,
 				 &ReservedPagePacket[BufIndex - TxDescLen],
 				 ProbeRspLength, _FALSE, _FALSE, _FALSE);
@@ -9265,52 +10424,43 @@ static void _rtw_hal_set_fw_rsvd_page(_adapter *adapter, bool finished, u8 *page
 		TotalPageNum += CurtPktPageNum;
 		TotalPacketLen = BufIndex + ProbeRspLength;
 		BufIndex += (CurtPktPageNum * PageSize);
+		#ifdef DBG_RSVD_PAGE_CFG
+		RSVD_PAGE_CFG("ProbeRsp", CurtPktPageNum, TotalPageNum, TotalPacketLen);
+		#endif
 		goto download_page;
 	}
 
-	/* ps-poll * 1 page */
-	RsvdPageLoc.LocPsPoll = TotalPageNum;
-	RTW_INFO("LocPsPoll: %d\n", RsvdPageLoc.LocPsPoll);
-	rtw_hal_construct_PSPoll(adapter,
-				 &ReservedPagePacket[BufIndex], &PSPollLength);
-	rtw_hal_fill_fake_txdesc(adapter,
-				 &ReservedPagePacket[BufIndex - TxDescLen],
-				 PSPollLength, _TRUE, _FALSE, _FALSE);
-
-	CurtPktPageNum = (u8)PageNum((TxDescLen + PSPollLength), PageSize);
-
-	TotalPageNum += CurtPktPageNum;
-
-	BufIndex += (CurtPktPageNum * PageSize);
-
-#ifdef CONFIG_BT_COEXIST
-	if (pwrctl->wowlan_mode == _FALSE ||
-		pwrctl->wowlan_in_resume == _TRUE) {
-		/* BT Qos null data * 1 page */
-		RsvdPageLoc.LocBTQosNull = TotalPageNum;
-
-		RTW_INFO("LocBTQosNull: %d\n", RsvdPageLoc.LocBTQosNull);
-
-		rtw_hal_construct_NullFunctionData(adapter,
-					&ReservedPagePacket[BufIndex],
-					&BTQosNullLength,
-					get_my_bssid(&pmlmeinfo->network),
-					_TRUE, 0, 0, _FALSE);
+	/*======== ps-poll content * 1 page ========*/
+	sta_iface = adapter;
+	#ifdef CONFIG_CONCURRENT_MODE
+	if (!MLME_IS_STA(sta_iface) && DEV_STA_LD_NUM(adapter_to_dvobj(sta_iface))) {
+		sta_iface = _rtw_search_sta_iface(adapter);
+		RTW_INFO("get ("ADPT_FMT") to create PS-Poll/Null/QosNull\n", ADPT_ARG(sta_iface));
+	}
+	#endif
 
-		rtw_hal_fill_fake_txdesc(adapter,
-				&ReservedPagePacket[BufIndex - TxDescLen],
-				BTQosNullLength, _FALSE, _TRUE, _FALSE);
+	if (MLME_IS_STA(sta_iface) || (nr_assoc_if == 0)) {
+		RsvdPageLoc.LocPsPoll = TotalPageNum;
+		RTW_INFO("LocPsPoll: %d\n", RsvdPageLoc.LocPsPoll);
+		rtw_hal_construct_PSPoll(sta_iface,
+					 &ReservedPagePacket[BufIndex], &PSPollLength);
+		rtw_hal_fill_fake_txdesc(sta_iface,
+					 &ReservedPagePacket[BufIndex - TxDescLen],
+					 PSPollLength, _TRUE, _FALSE, _FALSE);
 
-		CurtPktPageNum = (u8)PageNum(TxDescLen + BTQosNullLength,
-					     PageSize);
+		CurtPktPageNum = (u8)PageNum((TxDescLen + PSPollLength), PageSize);
 
 		TotalPageNum += CurtPktPageNum;
+
 		BufIndex += (CurtPktPageNum * PageSize);
+		#ifdef DBG_RSVD_PAGE_CFG
+		RSVD_PAGE_CFG("PSPoll", CurtPktPageNum, TotalPageNum, TotalPacketLen);
+		#endif
 	}
-#endif /* CONFIG_BT_COEXIT */
 
 #ifdef CONFIG_MCC_MODE
-	if (MCC_EN(adapter)) {
+	/*======== MCC * n page ======== */
+	if (MCC_EN(adapter)) {/*Normal mode*/
 		dl_mcc_page = rtw_hal_dl_mcc_fw_rsvd_page(adapter, ReservedPagePacket,
 				&BufIndex, TxDescLen, PageSize, &TotalPageNum, &RsvdPageLoc, page_num);
 	} else {
@@ -9319,54 +10469,124 @@ static void _rtw_hal_set_fw_rsvd_page(_adapter *adapter, bool finished, u8 *page
 
 	if (dl_mcc_page == _FAIL)
 #endif /* CONFIG_MCC_MODE */
-	{
-		/* null data * 1 page */
-		RsvdPageLoc.LocNullData = TotalPageNum;
-		RTW_INFO("LocNullData: %d\n", RsvdPageLoc.LocNullData);
-		rtw_hal_construct_NullFunctionData(
-			adapter,
-			&ReservedPagePacket[BufIndex],
-			&NullDataLength,
-			get_my_bssid(&pmlmeinfo->network),
-			_FALSE, 0, 0, _FALSE);
-		rtw_hal_fill_fake_txdesc(adapter,
+	{	/*======== null data * 1 page ======== */
+		if (MLME_IS_STA(sta_iface) || (nr_assoc_if == 0)) {
+			RsvdPageLoc.LocNullData = TotalPageNum;
+			RTW_INFO("LocNullData: %d\n", RsvdPageLoc.LocNullData);
+			rtw_hal_construct_NullFunctionData(
+				sta_iface,
+				&ReservedPagePacket[BufIndex],
+				&NullDataLength,
+				_FALSE, 0, 0, _FALSE);
+			rtw_hal_fill_fake_txdesc(sta_iface,
 				 &ReservedPagePacket[BufIndex - TxDescLen],
 				 NullDataLength, _FALSE, _FALSE, _FALSE);
 
-		CurtPktPageNum = (u8)PageNum(TxDescLen + NullDataLength, PageSize);
+			CurtPktPageNum = (u8)PageNum(TxDescLen + NullDataLength, PageSize);
 
-		TotalPageNum += CurtPktPageNum;
+			TotalPageNum += CurtPktPageNum;
 
-		BufIndex += (CurtPktPageNum * PageSize);
+			BufIndex += (CurtPktPageNum * PageSize);
+			#ifdef DBG_RSVD_PAGE_CFG
+			RSVD_PAGE_CFG("NullData", CurtPktPageNum, TotalPageNum, TotalPacketLen);
+			#endif
+		}
 	}
 
+	/*======== Qos null data * 1 page ======== */
+	if (pwrctl->wowlan_mode == _FALSE ||
+		pwrctl->wowlan_in_resume == _TRUE) {/*Normal mode*/	
+		if (MLME_IS_STA(sta_iface) || (nr_assoc_if == 0)) {
+			RsvdPageLoc.LocQosNull = TotalPageNum;
+			RTW_INFO("LocQosNull: %d\n", RsvdPageLoc.LocQosNull);
+			rtw_hal_construct_NullFunctionData(sta_iface,
+						&ReservedPagePacket[BufIndex],
+						&QosNullLength,
+						_TRUE, 0, 0, _FALSE);
+			rtw_hal_fill_fake_txdesc(sta_iface,
+					 &ReservedPagePacket[BufIndex - TxDescLen],
+					 QosNullLength, _FALSE, _FALSE, _FALSE);
+
+			CurtPktPageNum = (u8)PageNum(TxDescLen + QosNullLength,
+						     PageSize);
+
+			TotalPageNum += CurtPktPageNum;
+
+			BufIndex += (CurtPktPageNum * PageSize);
+			#ifdef DBG_RSVD_PAGE_CFG
+			RSVD_PAGE_CFG("QosNull", CurtPktPageNum, TotalPageNum, TotalPacketLen);
+			#endif
+		}
+	}
+
+#ifdef CONFIG_BT_COEXIST
+	/*======== BT Qos null data * 1 page ======== */
 	if (pwrctl->wowlan_mode == _FALSE ||
-		pwrctl->wowlan_in_resume == _TRUE) {
-		/* Qos null data * 1 page */
-		RsvdPageLoc.LocQosNull = TotalPageNum;
-		RTW_INFO("LocQosNull: %d\n", RsvdPageLoc.LocQosNull);
-		rtw_hal_construct_NullFunctionData(adapter,
-					&ReservedPagePacket[BufIndex],
-					&QosNullLength,
-					get_my_bssid(&pmlmeinfo->network),
-					_TRUE, 0, 0, _FALSE);
+		pwrctl->wowlan_in_resume == _TRUE) {/*Normal mode*/
+
+		ap_iface = adapter;
+		#ifdef CONFIG_CONCURRENT_MODE
+		if (!MLME_IS_AP(ap_iface) && DEV_AP_NUM(adapter_to_dvobj(ap_iface))) {	/*DEV_AP_STARTING_NUM*/
+			ap_iface = _rtw_search_ap_iface(adapter);
+			RTW_INFO("get ("ADPT_FMT") to create BTQoSNull\n", ADPT_ARG(ap_iface));
+		}
+		#endif
+
+		if (MLME_IS_AP(ap_iface) || (nr_assoc_if == 0)) {
+			RsvdPageLoc.LocBTQosNull = TotalPageNum;
+
+			RTW_INFO("LocBTQosNull: %d\n", RsvdPageLoc.LocBTQosNull);
+
+			rtw_hal_construct_NullFunctionData(ap_iface,
+						&ReservedPagePacket[BufIndex],
+						&BTQosNullLength,
+						_TRUE, 0, 0, _FALSE);
+
+			rtw_hal_fill_fake_txdesc(ap_iface,
+					&ReservedPagePacket[BufIndex - TxDescLen],
+					BTQosNullLength, _FALSE, _TRUE, _FALSE);
+
+			CurtPktPageNum = (u8)PageNum(TxDescLen + BTQosNullLength,
+							 PageSize);
+
+			TotalPageNum += CurtPktPageNum;
+			BufIndex += (CurtPktPageNum * PageSize);
+
+			#ifdef DBG_RSVD_PAGE_CFG
+			RSVD_PAGE_CFG("BTQosNull", CurtPktPageNum, TotalPageNum, TotalPacketLen);
+			#endif
+		}
+	}
+#endif /* CONFIG_BT_COEXIT */
+
+	TotalPacketLen = BufIndex;
+
+#ifdef DBG_FW_DEBUG_MSG_PKT
+		/*======== FW DEBUG MSG * n page ======== */
+		RsvdPageLoc.loc_fw_dbg_msg_pkt = TotalPageNum;
+		RTW_INFO("loc_fw_dbg_msg_pkt: %d\n", RsvdPageLoc.loc_fw_dbg_msg_pkt);
+		rtw_hal_construct_fw_dbg_msg_pkt(
+			adapter,
+			&ReservedPagePacket[BufIndex],
+			&fw_dbg_msg_pkt_len);
+
 		rtw_hal_fill_fake_txdesc(adapter,
 				 &ReservedPagePacket[BufIndex - TxDescLen],
-				 QosNullLength, _FALSE, _FALSE, _FALSE);
+				 fw_dbg_msg_pkt_len, _FALSE, _FALSE, _FALSE);
 
-		CurtPktPageNum = (u8)PageNum(TxDescLen + QosNullLength,
-					     PageSize);
+		CurtPktPageNum = (u8)PageNum(TxDescLen + fw_dbg_msg_pkt_len, PageSize);
 
 		TotalPageNum += CurtPktPageNum;
 
+		TotalPacketLen = BufIndex + fw_dbg_msg_pkt_len;
 		BufIndex += (CurtPktPageNum * PageSize);
-	}
-
-	TotalPacketLen = BufIndex + QosNullLength;
+#endif /*DBG_FW_DEBUG_MSG_PKT*/
 
 #ifdef CONFIG_WOWLAN
+	/*======== WOW * n page ======== */
 	if (pwrctl->wowlan_mode == _TRUE &&
-		pwrctl->wowlan_in_resume == _FALSE) {
+		pwrctl->wowlan_in_resume == _FALSE &&
+		!(registry_par->suspend_type == FW_IPS_DISABLE_BBRF && !check_fwstate(pmlmepriv, _FW_LINKED))) {/*WOW mode*/
 		rtw_hal_set_wow_fw_rsvd_page(adapter, ReservedPagePacket,
 					     BufIndex, TxDescLen, PageSize,
 			     &TotalPageNum, &TotalPacketLen, &RsvdPageLoc);
@@ -9374,7 +10594,8 @@ static void _rtw_hal_set_fw_rsvd_page(_adapter *adapter, bool finished, u8 *page
 #endif /* CONFIG_WOWLAN */
 
 #ifdef CONFIG_P2P_WOWLAN
-	if (_TRUE == pwrctl->wowlan_p2p_mode) {
+	/*======== P2P WOW * n page ======== */
+	if (_TRUE == pwrctl->wowlan_p2p_mode) {/*WOW mode*/
 		rtw_hal_set_p2p_wow_fw_rsvd_page(adapter, ReservedPagePacket,
 						 BufIndex, TxDescLen, PageSize,
 				 &TotalPageNum, &TotalPacketLen, &RsvdPageLoc);
@@ -9382,20 +10603,34 @@ static void _rtw_hal_set_fw_rsvd_page(_adapter *adapter, bool finished, u8 *page
 #endif /* CONFIG_P2P_WOWLAN */
 
 #ifdef CONFIG_LPS_PG
+	/*======== LPS PG * 1 page ======== */
 	/* must reserved last 1 x page for LPS PG Info*/
 	pwrctl->lpspg_rsvd_page_locate = TotalPageNum;
 	pwrctl->blpspg_info_up = _TRUE;
 	if (page_num)
 		TotalPageNum += LPS_PG_INFO_RSVD_PAGE_NUM;
+
+	#ifdef DBG_RSVD_PAGE_CFG
+	RSVD_PAGE_CFG("LPS_PG", LPS_PG_INFO_RSVD_PAGE_NUM,
+		(page_num) ? TotalPageNum : (TotalPageNum + LPS_PG_INFO_RSVD_PAGE_NUM),
+		TotalPacketLen);
+	#endif
+
 #endif
 
-	TotalPacketLen -= TxDescOffset;
+	/*Note:  BufIndex already add a TxDescOffset offset in first Beacon page
+	* The "TotalPacketLen" is calculate by BufIndex.
+	* We need to decrease TxDescOffset before doing length check. by yiwei
+	*/
+	TotalPacketLen = TotalPacketLen - TxDescOffset;
 
 download_page:
 	if (page_num) {
 		*page_num = TotalPageNum;
 		rtw_mfree(ReservedPagePacket, MAX_CMDBUF_SZ);
 		ReservedPagePacket = NULL;
+		RTW_INFO(FUNC_ADPT_FMT" Get [ %s ] RsvdPageNUm <==\n",
+			FUNC_ADPT_ARG(adapter), (is_wow_mode) ? "WOW" : "NOR");
 		return;
 	}
 
@@ -9404,18 +10639,18 @@ download_page:
 		 __func__, TotalPageNum, TotalPacketLen);
 
 #ifdef CONFIG_LPS_PG
-	if ((TotalPacketLen + (LPS_PG_INFO_RSVD_PAGE_NUM * PageSize)) > MaxRsvdPageBufSize) {
+	if ((TotalPageNum + LPS_PG_INFO_RSVD_PAGE_NUM) > RsvdPageNum) {
 		pwrctl->lpspg_rsvd_page_locate = 0;
 		pwrctl->blpspg_info_up = _FALSE;
 
-		RTW_ERR("%s rsvd page size is not enough!!TotalPacketLen+LPS_PG_INFO_LEN %d, MaxRsvdPageBufSize %d\n",
-			 __func__, (TotalPacketLen + (LPS_PG_INFO_RSVD_PAGE_NUM * PageSize)), MaxRsvdPageBufSize);
+		RTW_ERR("%s [LPS_PG] rsvd page %d  is not enough! need %d pages\n",
+			__func__, RsvdPageNum, (TotalPageNum + LPS_PG_INFO_RSVD_PAGE_NUM));
 		rtw_warn_on(1);
 	}
 #endif
 
 	if (TotalPacketLen > MaxRsvdPageBufSize) {
-		RTW_ERR("%s(ERROR): rsvd page size is not enough!!TotalPacketLen %d, MaxRsvdPageBufSize %d\n",
+		RTW_ERR("%s : rsvd page size is not enough!!TotalPacketLen %d, MaxRsvdPageBufSize %d\n",
 			 __FUNCTION__, TotalPacketLen, MaxRsvdPageBufSize);
 		rtw_warn_on(1);
 		goto error;
@@ -9440,8 +10675,14 @@ download_page:
 	RTW_INFO_DUMP("\n", ReservedPagePacket, TotalPacketLen);
 	RTW_INFO(" ==================================================\n");
 #endif
-	if (check_fwstate(pmlmepriv, _FW_LINKED) == _TRUE) {
+
+
+	if (check_fwstate(pmlmepriv, _FW_LINKED)
+		|| MLME_IS_AP(adapter) || MLME_IS_MESH(adapter)){
 		rtw_hal_set_FwRsvdPage_cmd(adapter, &RsvdPageLoc);
+#ifdef DBG_FW_DEBUG_MSG_PKT
+		rtw_hal_set_fw_dbg_msg_pkt_rsvd_page_cmd(adapter, &RsvdPageLoc);
+#endif /*DBG_FW_DEBUG_MSG_PKT*/
 #ifdef CONFIG_WOWLAN
 		if (pwrctl->wowlan_mode == _TRUE &&
 			pwrctl->wowlan_in_resume == _FALSE)
@@ -9475,7 +10716,10 @@ error:
 
 void rtw_hal_set_fw_rsvd_page(struct _ADAPTER *adapter, bool finished)
 {
-	_rtw_hal_set_fw_rsvd_page(adapter, finished, NULL);
+	if (finished)
+		rtw_mi_tx_beacon_hdl(adapter);
+	else
+		_rtw_hal_set_fw_rsvd_page(adapter, finished, NULL);
 }
 
 /**
@@ -9498,7 +10742,107 @@ u8 rtw_hal_get_rsvd_page_num(struct _ADAPTER *adapter)
 	return num;
 }
 
-static void hw_var_set_mlme_sitesurvey(_adapter *adapter, u8 variable, u8 *val)
+static void hw_var_set_bcn_func(_adapter *adapter, u8 enable)
+{
+	u32 bcn_ctrl_reg;
+
+#ifdef CONFIG_CONCURRENT_MODE
+	if (adapter->hw_port == HW_PORT1)
+		bcn_ctrl_reg = REG_BCN_CTRL_1;
+	else
+#endif
+		bcn_ctrl_reg = REG_BCN_CTRL;
+
+	if (enable)
+		rtw_write8(adapter, bcn_ctrl_reg, (EN_BCN_FUNCTION | EN_TXBCN_RPT));
+	else {
+		u8 val8;
+
+		val8 = rtw_read8(adapter, bcn_ctrl_reg);
+		val8 &= ~(EN_BCN_FUNCTION | EN_TXBCN_RPT);
+
+#ifdef CONFIG_BT_COEXIST
+		if (GET_HAL_DATA(adapter)->EEPROMBluetoothCoexist == 1) {
+			/* Always enable port0 beacon function for PSTDMA */
+			if (REG_BCN_CTRL == bcn_ctrl_reg)
+				val8 |= EN_BCN_FUNCTION;
+		}
+#endif
+
+		rtw_write8(adapter, bcn_ctrl_reg, val8);
+	}
+
+#ifdef CONFIG_RTL8192F
+	if (IS_HARDWARE_TYPE_8192F(adapter)) {
+		u16 val16, val16_ori;
+
+		val16_ori = val16 = rtw_read16(adapter, REG_WLAN_ACT_MASK_CTRL_1);
+
+		#ifdef CONFIG_CONCURRENT_MODE
+		if (adapter->hw_port == HW_PORT1) {
+			if (enable)
+				val16 |= EN_PORT_1_FUNCTION;
+			else
+				val16 &= ~EN_PORT_1_FUNCTION;
+		} else
+		#endif
+		{
+			if (enable)
+				val16 |= EN_PORT_0_FUNCTION;
+			else
+				val16 &= ~EN_PORT_0_FUNCTION;
+
+			#ifdef CONFIG_BT_COEXIST
+			if (GET_HAL_DATA(adapter)->EEPROMBluetoothCoexist == 1)
+				val16 |= EN_PORT_0_FUNCTION;
+			#endif
+		}
+
+		if (val16 != val16_ori)
+			rtw_write16(adapter, REG_WLAN_ACT_MASK_CTRL_1,  val16);
+	}
+#endif
+}
+
+static void hw_var_set_mlme_disconnect(_adapter *adapter)
+{
+	u8 val8;
+
+	/* reject all data frames */
+#ifdef CONFIG_CONCURRENT_MODE
+	if (rtw_mi_check_status(adapter, MI_LINKED) == _FALSE)
+#endif
+		rtw_write16(adapter, REG_RXFLTMAP2, 0x0000);
+
+#ifdef CONFIG_CONCURRENT_MODE
+	if (adapter->hw_port == HW_PORT1) {
+		/* reset TSF1 */
+		rtw_write8(adapter, REG_DUAL_TSF_RST, BIT(1));
+
+		/* disable update TSF1 */
+		rtw_iface_disable_tsf_update(adapter);
+
+		if (!IS_HARDWARE_TYPE_8723D(adapter)
+			&& !IS_HARDWARE_TYPE_8192F(adapter)
+			&& !IS_HARDWARE_TYPE_8710B(adapter)
+		) {
+			/* disable Port1's beacon function */
+			val8 = rtw_read8(adapter, REG_BCN_CTRL_1);
+			val8 &= ~EN_BCN_FUNCTION;
+			rtw_write8(adapter, REG_BCN_CTRL_1, val8);
+		}
+	} else
+#endif
+	{
+		/* reset TSF */
+		rtw_write8(adapter, REG_DUAL_TSF_RST, BIT(0));
+
+		/* disable update TSF */
+		rtw_iface_disable_tsf_update(adapter);
+	}
+}
+
+static void hw_var_set_mlme_sitesurvey(_adapter *adapter, u8 enable)
 {
 	struct dvobj_priv *dvobj = adapter_to_dvobj(adapter);
 	HAL_DATA_TYPE *hal_data = GET_HAL_DATA(adapter);
@@ -9518,7 +10862,7 @@ static void hw_var_set_mlme_sitesurvey(_adapter *adapter, u8 variable, u8 *val)
 	value_rxfltmap2 = 0;
 #endif
 
-	if (*((u8 *)val)) { /* under sitesurvey */
+	if (enable) { /* under sitesurvey */
 		/*
 		* 1. configure REG_RXFLTMAP2
 		* 2. disable TSF update &  buddy TSF update to avoid updating wrong TSF due to clear RCR_CBSSID_BCN
@@ -9526,29 +10870,6 @@ static void hw_var_set_mlme_sitesurvey(_adapter *adapter, u8 variable, u8 *val)
 		*/
 		rtw_write16(adapter, REG_RXFLTMAP2, value_rxfltmap2);
 
-#ifdef CONFIG_MI_WITH_MBSSID_CAM
-		/*do nothing~~*/
-#else
-
-		/* disable update TSF */
-		for (i = 0; i < dvobj->iface_nums; i++) {
-			iface = dvobj->padapters[i];
-			if (!iface)
-				continue;
-
-			if (rtw_linked_check(iface)
-				&& !MLME_IS_AP(iface) && !MLME_IS_MESH(iface)
-			) {
-				if (iface->hw_port == HW_PORT1)
-					rtw_write8(iface, REG_BCN_CTRL_1, rtw_read8(iface, REG_BCN_CTRL_1) | DIS_TSF_UDT);
-				else
-					rtw_write8(iface, REG_BCN_CTRL, rtw_read8(iface, REG_BCN_CTRL) | DIS_TSF_UDT);
-
-				iface->mlmeextpriv.en_hw_update_tsf = _FALSE;
-			}
-		}
-#endif /* CONFIG_MI_WITH_MBSSID_CAM */
-
 		rtw_hal_rcr_set_chk_bssid(adapter, MLME_SCAN_ENTER);
 
 		/* Save orignal RRSR setting. needed? */
@@ -9578,29 +10899,6 @@ static void hw_var_set_mlme_sitesurvey(_adapter *adapter, u8 variable, u8 *val)
 
 		rtw_hal_rcr_set_chk_bssid(adapter, MLME_SCAN_DONE);
 
-#ifdef CONFIG_MI_WITH_MBSSID_CAM
-		/*if ((rtw_mi_get_assoced_sta_num(adapter) == 1) && (!rtw_mi_check_status(adapter, MI_AP_MODE)))
-			rtw_write8(adapter, REG_BCN_CTRL, rtw_read8(adapter, REG_BCN_CTRL)&(~DIS_TSF_UDT));*/
-#else
-
-		for (i = 0; i < dvobj->iface_nums; i++) {
-			iface = dvobj->padapters[i];
-			if (!iface)
-				continue;
-			if (rtw_linked_check(iface)
-				&& !MLME_IS_AP(iface) && !MLME_IS_MESH(iface)
-			) {
-				/* enable HW TSF update when recive beacon*/
-				/*if (iface->hw_port == HW_PORT1)
-					rtw_write8(iface, REG_BCN_CTRL_1, rtw_read8(iface, REG_BCN_CTRL_1)&(~(DIS_TSF_UDT)));
-				else
-					rtw_write8(iface, REG_BCN_CTRL, rtw_read8(iface, REG_BCN_CTRL)&(~(DIS_TSF_UDT)));
-				*/
-				iface->mlmeextpriv.en_hw_update_tsf = _TRUE;
-			}
-		}
-#endif /* CONFIG_MI_WITH_MBSSID_CAM */
-
 		/* Restore orignal RRSR setting. needed? */
 		rtw_write16(adapter, REG_RRSR, hal_data->RegRRSR);
 
@@ -9618,6 +10916,90 @@ static void hw_var_set_mlme_sitesurvey(_adapter *adapter, u8 variable, u8 *val)
 	}
 }
 
+static void hw_var_set_mlme_join(_adapter *adapter, u8 type)
+{
+	u8 val8;
+	u16 val16;
+	u32 val32;
+	u8 RetryLimit = RL_VAL_STA;
+	HAL_DATA_TYPE *hal_data = GET_HAL_DATA(adapter);
+	struct mlme_priv *pmlmepriv = &adapter->mlmepriv;
+
+#ifdef CONFIG_CONCURRENT_MODE
+	if (type == 0) {
+		/* prepare to join */
+		if (rtw_mi_get_ap_num(adapter) || rtw_mi_get_mesh_num(adapter))
+			StopTxBeacon(adapter);
+
+		/* enable to rx data frame.Accept all data frame */
+		rtw_write16(adapter, REG_RXFLTMAP2, 0xFFFF);
+
+		if (check_fwstate(pmlmepriv, WIFI_STATION_STATE) == _TRUE)
+			RetryLimit = (hal_data->CustomerID == RT_CID_CCX) ? RL_VAL_AP : RL_VAL_STA;
+		else /* Ad-hoc Mode */
+			RetryLimit = RL_VAL_AP;
+
+		rtw_iface_enable_tsf_update(adapter);
+
+	} else if (type == 1) {
+		/* joinbss_event call back when join res < 0 */
+		if (rtw_mi_check_status(adapter, MI_LINKED) == _FALSE)
+			rtw_write16(adapter, REG_RXFLTMAP2, 0x00);
+
+		rtw_iface_disable_tsf_update(adapter);
+
+		if (rtw_mi_get_ap_num(adapter) || rtw_mi_get_mesh_num(adapter)) {
+			ResumeTxBeacon(adapter);
+
+			/* reset TSF 1/2 after ResumeTxBeacon */
+			rtw_write8(adapter, REG_DUAL_TSF_RST, BIT(1) | BIT(0));
+		}
+
+	} else if (type == 2) {
+		/* sta add event call back */
+		if (check_fwstate(pmlmepriv, WIFI_ADHOC_STATE | WIFI_ADHOC_MASTER_STATE)) {
+			/* fixed beacon issue for 8191su........... */
+			rtw_write8(adapter, 0x542 , 0x02);
+			RetryLimit = RL_VAL_AP;
+		}
+
+		if (rtw_mi_get_ap_num(adapter) || rtw_mi_get_mesh_num(adapter)) {
+			ResumeTxBeacon(adapter);
+
+			/* reset TSF 1/2 after ResumeTxBeacon */
+			rtw_write8(adapter, REG_DUAL_TSF_RST, BIT(1) | BIT(0));
+		}
+	}
+
+	val16 = BIT_SRL(RetryLimit) | BIT_LRL(RetryLimit);
+	rtw_write16(adapter, REG_RETRY_LIMIT, val16);
+#else /* !CONFIG_CONCURRENT_MODE */
+	if (type == 0) { /* prepare to join */
+		/* enable to rx data frame.Accept all data frame */
+		rtw_write16(adapter, REG_RXFLTMAP2, 0xFFFF);
+
+		if (check_fwstate(pmlmepriv, WIFI_STATION_STATE) == _TRUE)
+			RetryLimit = (hal_data->CustomerID == RT_CID_CCX) ? RL_VAL_AP : RL_VAL_STA;
+		else /* Ad-hoc Mode */
+			RetryLimit = RL_VAL_AP;
+
+		rtw_iface_enable_tsf_update(adapter);
+
+	} else if (type == 1) { /* joinbss_event call back when join res < 0 */
+		rtw_write16(adapter, REG_RXFLTMAP2, 0x00);
+
+		rtw_iface_disable_tsf_update(adapter);
+
+	} else if (type == 2) { /* sta add event call back */
+		if (check_fwstate(pmlmepriv, WIFI_ADHOC_STATE | WIFI_ADHOC_MASTER_STATE))
+			RetryLimit = RL_VAL_AP;
+	}
+
+	val16 = BIT_SRL(RetryLimit) | BIT_LRL(RetryLimit);
+	rtw_write16(adapter, REG_RETRY_LIMIT, val16);
+#endif /* !CONFIG_CONCURRENT_MODE */
+}
+
 #ifdef CONFIG_TSF_RESET_OFFLOAD
 static int rtw_hal_h2c_reset_tsf(_adapter *adapter, u8 reset_port)
 {
@@ -9661,39 +11043,284 @@ int rtw_hal_reset_tsf(_adapter *adapter, u8 reset_port)
 }
 #endif /* CONFIG_TSF_RESET_OFFLOAD */
 
-static void rtw_hal_set_hw_update_tsf(PADAPTER padapter)
+#ifdef CONFIG_HW_P0_TSF_SYNC
+#ifdef CONFIG_CONCURRENT_MODE
+static void hw_port0_tsf_sync_sel(_adapter *adapter, u8 benable, u8 hw_port, u16 tr_offset)
 {
-	struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv;
-	struct mlme_priv *pmlmepriv = &padapter->mlmepriv;
+	u8 val8;
+	u8 client_id = 0;
+	struct dvobj_priv *dvobj = adapter_to_dvobj(adapter);
 
-#if defined(CONFIG_RTL8822B) || defined(CONFIG_MI_WITH_MBSSID_CAM)
-	RTW_INFO("[Warn] %s "ADPT_FMT" enter func\n", __func__, ADPT_ARG(padapter));
-	rtw_warn_on(1);
-	return;
+#ifdef CONFIG_MCC_MODE
+	if (MCC_EN(adapter) && (rtw_hal_check_mcc_status(adapter, MCC_STATUS_DOING_MCC))) {
+		RTW_INFO("[MCC] do not set HW TSF sync\n");
+		return;
+	}
 #endif
+	/* check if port0 is already synced */
+	if (benable && dvobj->p0_tsf.sync_port != MAX_HW_PORT && dvobj->p0_tsf.sync_port == hw_port) {
+		RTW_WARN(FUNC_ADPT_FMT ": port0 already enable TSF sync(%d)\n",
+			FUNC_ADPT_ARG(adapter), dvobj->p0_tsf.sync_port);
+		return;
+	}
 
-	if (!pmlmeext->en_hw_update_tsf)
+	/* check if port0 already disable sync */
+	if (!benable && dvobj->p0_tsf.sync_port == MAX_HW_PORT) {
+		RTW_WARN(FUNC_ADPT_FMT ": port0 already disable TSF sync\n", FUNC_ADPT_ARG(adapter));
 		return;
+	}
 
-	/* check RCR */
-	if (!rtw_hal_rcr_check(padapter, RCR_CBSSID_BCN))
+	/* check if port0 sync to port0 */
+	if (benable && hw_port == HW_PORT0) {
+		RTW_ERR(FUNC_ADPT_FMT ": hw_port is port0 under enable\n", FUNC_ADPT_ARG(adapter));
+		rtw_warn_on(1);
 		return;
+	}
 
-	/* enable hw update tsf function for non-AP and non-Mesh */
-	if (rtw_linked_check(padapter)
-		&& !MLME_IS_AP(padapter) && !MLME_IS_MESH(padapter)
-	) {
+	/*0x5B4 [6:4] :SYNC_CLI_SEL - The selector for the CLINT port of sync tsft source for port 0*/
+	/*	Bit[5:4] : 0 for clint0, 1 for clint1, 2 for clint2, 3 for clint3.
+		Bit6 : 1= enable sync to port 0. 0=disable sync to port 0.*/
+
+	val8 = rtw_read8(adapter, REG_TIMER0_SRC_SEL);
+
+	if (benable) {
+		/*Disable Port0's beacon function*/
+		rtw_write8(adapter, REG_BCN_CTRL, rtw_read8(adapter, REG_BCN_CTRL) & ~BIT_EN_BCN_FUNCTION);
+
+		/*Reg 0x518[15:0]: TSFTR_SYN_OFFSET*/
+		if (tr_offset)
+			rtw_write16(adapter, REG_TSFTR_SYN_OFFSET, tr_offset);
+
+		/*reg 0x577[6]=1*/	/*auto sync by tbtt*/
+		rtw_write8(adapter, REG_MISC_CTRL, rtw_read8(adapter, REG_MISC_CTRL) | BIT_AUTO_SYNC_BY_TBTT);
+
+		if (HW_PORT1 == hw_port)
+			client_id = 0;
+		else if (HW_PORT2 == hw_port)
+			client_id = 1;
+		else if (HW_PORT3 == hw_port)
+			client_id = 2;
+		else if (HW_PORT4 == hw_port)
+			client_id = 3;
+
+		val8 &= 0x8F;
+		val8 |= (BIT(6) | (client_id << 4));
+
+		dvobj->p0_tsf.sync_port = hw_port;
+		dvobj->p0_tsf.offset = tr_offset;
+		rtw_write8(adapter, REG_TIMER0_SRC_SEL, val8);
+
+		/*Enable Port0's beacon function*/
+		rtw_write8(adapter, REG_BCN_CTRL, rtw_read8(adapter, REG_BCN_CTRL)  | BIT_EN_BCN_FUNCTION);
+		RTW_INFO("%s Port_%d TSF sync to P0, timer offset :%d\n", __func__, hw_port, tr_offset);
+	} else {
+		val8 &= ~BIT(6);
+
+		dvobj->p0_tsf.sync_port = MAX_HW_PORT;
+		dvobj->p0_tsf.offset = 0;
+		rtw_write8(adapter, REG_TIMER0_SRC_SEL, val8);
+		RTW_INFO("%s P0 TSF sync disable\n", __func__);
+	}
+}
+static _adapter * _search_ld_sta(_adapter *adapter, u8 include_self)
+{
+	struct dvobj_priv *dvobj = adapter_to_dvobj(adapter);
+	u8 i;
+	_adapter *iface = NULL;
+
+	if (rtw_mi_get_assoced_sta_num(adapter) == 0) {
+		RTW_ERR("STA_LD_NUM == 0\n");
+		rtw_warn_on(1);
+	}
+
+	for (i = 0; i < dvobj->iface_nums; i++) {
+		iface = dvobj->padapters[i];
+		if (!iface)
+			continue;
+		if (include_self == _FALSE && adapter == iface)
+			continue;
+		if (is_client_associated_to_ap(iface))
+			break;
+	}
+	if (iface)
+		RTW_INFO("search STA iface -"ADPT_FMT"\n", ADPT_ARG(iface));
+	return iface;
+}
+#endif /*CONFIG_CONCURRENT_MODE*/
+/*Correct port0's TSF*/
+/*#define DBG_P0_TSF_SYNC*/
+void hw_var_set_correct_tsf(PADAPTER adapter, u8 mlme_state)
+{
 #ifdef CONFIG_CONCURRENT_MODE
-		if (padapter->hw_port == HW_PORT1)
-			rtw_write8(padapter, REG_BCN_CTRL_1, rtw_read8(padapter, REG_BCN_CTRL_1) & (~DIS_TSF_UDT));
-		else
-#endif
-			rtw_write8(padapter, REG_BCN_CTRL, rtw_read8(padapter, REG_BCN_CTRL) & (~DIS_TSF_UDT));
+	struct dvobj_priv *dvobj = adapter_to_dvobj(adapter);
+	u8 p0_tsfsync = _FALSE;
+	struct mlme_ext_priv *pmlmeext = &adapter->mlmeextpriv;
+	struct mlme_ext_info *pmlmeinfo = &pmlmeext->mlmext_info;
+	_adapter *sta_if = NULL;
+	u8 hw_port;
+
+	RTW_INFO(FUNC_ADPT_FMT "\n", FUNC_ADPT_ARG(adapter));
+	#ifdef DBG_P0_TSF_SYNC
+	RTW_INFO("[TSF_SYNC] AP_NUM = %d\n", rtw_mi_get_ap_num(adapter));
+	RTW_INFO("[TSF_SYNC] MESH_NUM = %d\n", rtw_mi_get_mesh_num(adapter));
+	RTW_INFO("[TSF_SYNC] LD_STA_NUM = %d\n", rtw_mi_get_assoced_sta_num(adapter));
+	if (dvobj->p0_tsf.sync_port == MAX_HW_PORT)
+		RTW_INFO("[TSF_SYNC] org p0 sync port = N/A\n");
+	else
+		RTW_INFO("[TSF_SYNC] org p0 sync port = %d\n", dvobj->p0_tsf.sync_port);
+	RTW_INFO("[TSF_SYNC] timer offset = %d\n", dvobj->p0_tsf.offset);
+	#endif
+	switch (mlme_state) {
+		case MLME_STA_CONNECTED :
+			{
+				hw_port = rtw_hal_get_port(adapter);
+
+				if (!MLME_IS_STA(adapter)) {
+					RTW_ERR("STA CON state,but iface("ADPT_FMT") is not STA\n", ADPT_ARG(adapter));
+					rtw_warn_on(1);
+				}
+
+				if ((dvobj->p0_tsf.sync_port != MAX_HW_PORT) && (hw_port == HW_PORT0)) {
+					RTW_ERR(ADPT_FMT" is STA with P0 connected => DIS P0_TSF_SYNC\n", ADPT_ARG(adapter));
+					rtw_warn_on(1);
+					hw_port0_tsf_sync_sel(adapter, _FALSE, 0, 0);
+				}
+
+				if ((dvobj->p0_tsf.sync_port == MAX_HW_PORT) &&
+					(rtw_mi_get_ap_num(adapter) || rtw_mi_get_mesh_num(adapter))) {
+					hw_port0_tsf_sync_sel(adapter, _TRUE, hw_port, 50);/*timer offset 50ms*/
+					#ifdef DBG_P0_TSF_SYNC
+					RTW_INFO("[TSF_SYNC] STA_LINKED => EN P0_TSF_SYNC\n");
+					#endif
+				}
+			}
+			break;
+		case MLME_STA_DISCONNECTED :
+			{
+				hw_port = rtw_hal_get_port(adapter);
+
+				if (!MLME_IS_STA(adapter)) {
+					RTW_ERR("STA DIS_CON state,but iface("ADPT_FMT") is not STA\n", ADPT_ARG(adapter));
+					rtw_warn_on(1);
+				}
+
+				if (dvobj->p0_tsf.sync_port == hw_port) {
+					if (rtw_mi_get_assoced_sta_num(adapter) >= 2) {
+						/* search next appropriate sta*/
+						sta_if = _search_ld_sta(adapter, _FALSE);
+						if (sta_if) {
+							hw_port = rtw_hal_get_port(sta_if);
+							hw_port0_tsf_sync_sel(adapter, _TRUE, hw_port, 50);/*timer offset 50ms*/
+							#ifdef DBG_P0_TSF_SYNC
+							RTW_INFO("[TSF_SYNC] STA_DIS_CON => CHANGE P0_TSF_SYNC\n");
+							#endif
+						}
+					} else if (rtw_mi_get_assoced_sta_num(adapter) == 1) {
+						hw_port0_tsf_sync_sel(adapter, _FALSE, 0, 0);
+						#ifdef DBG_P0_TSF_SYNC
+						RTW_INFO("[TSF_SYNC] STA_DIS_CON => DIS P0_TSF_SYNC\n");
+						#endif
+					}
+				}
+			}
+			break;
+		case MLME_AP_STARTED :
+		case MLME_MESH_STARTED :
+			{
+				if (!(MLME_IS_AP(adapter) || MLME_IS_MESH(adapter))) {
+					RTW_ERR("AP START state,but iface("ADPT_FMT") is not AP\n", ADPT_ARG(adapter));
+					rtw_warn_on(1);
+				}
+
+				if ((dvobj->p0_tsf.sync_port == MAX_HW_PORT) &&
+					rtw_mi_get_assoced_sta_num(adapter)) {
+					/* get port of sta */
+					sta_if = _search_ld_sta(adapter, _FALSE);
+					if (sta_if) {
+						hw_port = rtw_hal_get_port(sta_if);
+						hw_port0_tsf_sync_sel(adapter, _TRUE, hw_port, 50);/*timer offset 50ms*/
+						#ifdef DBG_P0_TSF_SYNC
+						RTW_INFO("[TSF_SYNC] AP_START => EN P0_TSF_SYNC\n");
+						#endif
+					}
+				}
+			}
+			break;
+		case MLME_AP_STOPPED :
+		case MLME_MESH_STOPPED :
+			{
+				if (!(MLME_IS_AP(adapter) || MLME_IS_MESH(adapter))) {
+					RTW_ERR("AP START state,but iface("ADPT_FMT") is not AP\n", ADPT_ARG(adapter));
+					rtw_warn_on(1);
+				}
+				/*stop ap mode*/
+				if ((rtw_mi_get_ap_num(adapter) + rtw_mi_get_mesh_num(adapter) == 1) &&
+					(dvobj->p0_tsf.sync_port != MAX_HW_PORT)) {
+					hw_port0_tsf_sync_sel(adapter, _FALSE, 0, 0);
+					#ifdef DBG_P0_TSF_SYNC
+					RTW_INFO("[TSF_SYNC] AP_STOP => DIS P0_TSF_SYNC\n");
+					#endif
+				}
+			}
+			break;
+		default :
+			RTW_ERR(FUNC_ADPT_FMT" unknow state(0x%02x)\n", FUNC_ADPT_ARG(adapter), mlme_state);
+			break;
 	}
-	pmlmeext->en_hw_update_tsf = _FALSE;
+
+	/*#ifdef DBG_P0_TSF_SYNC*/
+	#if 1
+	if (dvobj->p0_tsf.sync_port == MAX_HW_PORT)
+		RTW_INFO("[TSF_SYNC] p0 sync port = N/A\n");
+	else
+		RTW_INFO("[TSF_SYNC] p0 sync port = %d\n", dvobj->p0_tsf.sync_port);
+	RTW_INFO("[TSF_SYNC] timer offset = %d\n", dvobj->p0_tsf.offset);
+	#endif
+#endif /*CONFIG_CONCURRENT_MODE*/
+}
+
+#else
+static void rtw_hal_correct_tsf(_adapter *padapter, u8 hw_port, u64 tsf)
+{
+	if (hw_port == HW_PORT0) {
+		/*disable related TSF function*/
+		rtw_write8(padapter, REG_BCN_CTRL, rtw_read8(padapter, REG_BCN_CTRL) & (~EN_BCN_FUNCTION));
+#if defined(CONFIG_RTL8192F)
+		rtw_write16(padapter, REG_WLAN_ACT_MASK_CTRL_1, rtw_read16(padapter,
+					REG_WLAN_ACT_MASK_CTRL_1) & ~EN_PORT_0_FUNCTION);
+#endif
+
+		rtw_write32(padapter, REG_TSFTR, tsf);
+		rtw_write32(padapter, REG_TSFTR + 4, tsf >> 32);
+
+		/*enable related TSF function*/
+		rtw_write8(padapter, REG_BCN_CTRL, rtw_read8(padapter, REG_BCN_CTRL) | EN_BCN_FUNCTION);
+#if defined(CONFIG_RTL8192F)
+		rtw_write16(padapter, REG_WLAN_ACT_MASK_CTRL_1, rtw_read16(padapter,
+					REG_WLAN_ACT_MASK_CTRL_1) | EN_PORT_0_FUNCTION);
+#endif
+	} else if (hw_port == HW_PORT1) {
+		/*disable related TSF function*/
+		rtw_write8(padapter, REG_BCN_CTRL_1, rtw_read8(padapter, REG_BCN_CTRL_1) & (~EN_BCN_FUNCTION));
+#if defined(CONFIG_RTL8192F)
+		rtw_write16(padapter, REG_WLAN_ACT_MASK_CTRL_1, rtw_read16(padapter,
+					REG_WLAN_ACT_MASK_CTRL_1) & ~EN_PORT_1_FUNCTION);
+#endif
+
+		rtw_write32(padapter, REG_TSFTR1, tsf);
+		rtw_write32(padapter, REG_TSFTR1 + 4, tsf >> 32);
+
+		/*enable related TSF function*/
+		rtw_write8(padapter, REG_BCN_CTRL_1, rtw_read8(padapter, REG_BCN_CTRL_1) | EN_BCN_FUNCTION);
+#if defined(CONFIG_RTL8192F)
+		rtw_write16(padapter, REG_WLAN_ACT_MASK_CTRL_1, rtw_read16(padapter,
+					REG_WLAN_ACT_MASK_CTRL_1) | EN_PORT_1_FUNCTION);
+#endif
+	} else
+		RTW_INFO("%s-[WARN] "ADPT_FMT" invalid hw_port:%d\n", __func__, ADPT_ARG(padapter), hw_port);
 }
 
-static void hw_var_set_correct_tsf(_adapter *adapter)
+static void hw_var_set_correct_tsf(_adapter *adapter, u8 mlme_state)
 {
 #ifdef CONFIG_MI_WITH_MBSSID_CAM
 	/*do nothing*/
@@ -9746,6 +11373,81 @@ static void hw_var_set_correct_tsf(_adapter *adapter)
 
 #endif /*CONFIG_MI_WITH_MBSSID_CAM*/
 }
+#endif
+
+u64 rtw_hal_get_tsftr_by_port(_adapter *adapter, u8 port)
+{
+	struct hal_spec_t *hal_spec = GET_HAL_SPEC(adapter);
+	u64 tsftr = 0;
+
+	if (port >= hal_spec->port_num) {
+		RTW_ERR("%s invalid port(%d) \n", __func__, port);
+		goto exit;
+	}
+
+	switch (rtw_get_chip_type(adapter)) {
+#if defined(CONFIG_RTL8814A) || defined(CONFIG_RTL8822B) || defined(CONFIG_RTL8821C)
+	case RTL8814A:
+	case RTL8822B:
+	case RTL8821C:
+	{
+		u8 val8;
+
+		/* 0x554[30:28] - BIT_BCN_TIMER_SEL_FWRD */
+		val8 = rtw_read8(adapter, REG_MBSSID_BCN_SPACE + 3);
+		val8 &= 0x8F;
+		val8 |= port << 4;
+		rtw_write8(adapter, REG_MBSSID_BCN_SPACE + 3, val8);
+
+		tsftr = rtw_read32(adapter, REG_TSFTR + 4);
+		tsftr = tsftr << 32;
+		tsftr |= rtw_read32(adapter, REG_TSFTR);
+
+		break;
+	}
+#endif
+#if defined(CONFIG_RTL8188E) || defined(CONFIG_RTL8188F) || defined(CONFIG_RTL8188GTV) \
+		|| defined(CONFIG_RTL8192E) || defined(CONFIG_RTL8192F) \
+		|| defined(CONFIG_RTL8723B) || defined(CONFIG_RTL8703B) || defined(CONFIG_RTL8723D) \
+		|| defined(CONFIG_RTL8812A) || defined(CONFIG_RTL8821A) \
+		|| defined(CONFIG_RTL8710B)
+	case RTL8188E:
+	case RTL8188F:
+	case RTL8188GTV:
+	case RTL8192E:
+	case RTL8192F:
+	case RTL8723B:
+	case RTL8703B:
+	case RTL8723D:
+	case RTL8812:
+	case RTL8821:
+	case RTL8710B:
+	{
+		u32 addr;
+
+		if (port == HW_PORT0)
+			addr = REG_TSFTR;
+		else if (port == HW_PORT1)
+			addr = REG_TSFTR1;
+		else {
+			RTW_ERR("%s unknown port(%d) \n", __func__, port);
+			goto exit;
+		}
+
+		tsftr = rtw_read32(adapter, addr + 4);
+		tsftr = tsftr << 32;
+		tsftr |= rtw_read32(adapter, addr);
+
+		break;
+	}
+#endif
+	default:
+		RTW_ERR("%s unknow chip type\n", __func__);
+	}
+
+exit:
+	return tsftr;
+}
 
 #ifdef CONFIG_TDLS
 #ifdef CONFIG_TDLS_CH_SW
@@ -9789,16 +11491,39 @@ void rtw_hal_update_uapsd_tid(_adapter *adapter)
 
 #if defined(CONFIG_BT_COEXIST) && defined(CONFIG_FW_MULTI_PORT_SUPPORT)
 /* For multi-port support, driver needs to inform the port ID to FW for btc operations */
-s32 rtw_hal_set_wifi_port_id_cmd(_adapter *adapter)
+s32 rtw_hal_set_wifi_btc_port_id_cmd(_adapter *adapter)
 {
-	u8 port_id = 0;
 	u8 h2c_buf[H2C_BTC_WL_PORT_ID_LEN] = {0};
+	u8 hw_port = rtw_hal_get_port(adapter);
 
-	SET_H2CCMD_BTC_WL_PORT_ID(h2c_buf, adapter->hw_port);
+	SET_H2CCMD_BTC_WL_PORT_ID(h2c_buf, hw_port);
+	RTW_INFO("%s ("ADPT_FMT") - hw_port :%d\n", __func__, ADPT_ARG(adapter), hw_port);
 	return rtw_hal_fill_h2c_cmd(adapter, H2C_BTC_WL_PORT_ID, H2C_BTC_WL_PORT_ID_LEN, h2c_buf);
 }
 #endif
 
+#define LPS_ACTIVE_TIMEOUT	10 /*number of times*/
+void rtw_lps_state_chk(_adapter *adapter, u8 ps_mode)
+{
+	if (ps_mode == PS_MODE_ACTIVE) {
+		u8 ps_ready = _FALSE;
+		s8 leave_wait_count = LPS_ACTIVE_TIMEOUT;
+
+		do {
+			if ((rtw_read8(adapter, REG_TCR) & BIT_PWRBIT_OW_EN) == 0) {
+				ps_ready = _TRUE;
+				break;
+			}
+			rtw_msleep_os(1);
+		} while (leave_wait_count--);
+
+		if (ps_ready == _FALSE) {
+			RTW_ERR(FUNC_ADPT_FMT" PS_MODE_ACTIVE check failed\n", FUNC_ADPT_ARG(adapter));
+			rtw_warn_on(1);
+		}
+	}
+}
+
 u8 SetHwReg(_adapter *adapter, u8 variable, u8 *val)
 {
 	HAL_DATA_TYPE *hal_data = GET_HAL_DATA(adapter);
@@ -9811,6 +11536,12 @@ u8 SetHwReg(_adapter *adapter, u8 variable, u8 *val)
 		rtw_hal_set_msr(adapter, net_type);
 	}
 	break;
+	case HW_VAR_DO_IQK:
+		if (*val)
+			hal_data->bNeedIQK = _TRUE;
+		else
+			hal_data->bNeedIQK = _FALSE;
+		break;
 	case HW_VAR_MAC_ADDR:
 #ifdef CONFIG_MI_WITH_MBSSID_CAM
 		rtw_hal_set_macaddr_mbid(adapter, val);
@@ -9958,22 +11689,56 @@ u8 SetHwReg(_adapter *adapter, u8 variable, u8 *val)
 		break;
 #endif /*defined(CONFIG_WOWLAN) || defined(CONFIG_AP_WOWLAN)*/
 
+	case HW_VAR_BCN_FUNC:
+		hw_var_set_bcn_func(adapter, *val);
+		break;
+
+	case HW_VAR_MLME_DISCONNECT:
+		hw_var_set_mlme_disconnect(adapter);
+		break;
+
 	case HW_VAR_MLME_SITESURVEY:
-		hw_var_set_mlme_sitesurvey(adapter, variable, val);
+		hw_var_set_mlme_sitesurvey(adapter, *val);
 		#ifdef CONFIG_BT_COEXIST
 		if (hal_data->EEPROMBluetoothCoexist == 1)
 			rtw_btcoex_ScanNotify(adapter, *val ? _TRUE : _FALSE);
 		#endif
 		break;
 
+	case HW_VAR_MLME_JOIN:
+		hw_var_set_mlme_join(adapter, *val);
+		#ifdef CONFIG_BT_COEXIST
+		if (hal_data->EEPROMBluetoothCoexist == 1) {
+			switch (*val) {
+			case 0:
+				/* Notify coex. mechanism before join */
+				rtw_btcoex_ConnectNotify(adapter, _TRUE);
+				break;
+			case 1:
+			case 2:
+				/* Notify coex. mechanism after join, whether successful or failed */
+				rtw_btcoex_ConnectNotify(adapter, _FALSE);
+				break;
+			}
+		}
+		#endif /* CONFIG_BT_COEXIST */
+		break;
+
 	case HW_VAR_EN_HW_UPDATE_TSF:
 		rtw_hal_set_hw_update_tsf(adapter);
 		break;
-
 	case HW_VAR_CORRECT_TSF:
-		hw_var_set_correct_tsf(adapter);
+		hw_var_set_correct_tsf(adapter, *val);
 		break;
 
+#if defined(CONFIG_HW_P0_TSF_SYNC) && defined(CONFIG_CONCURRENT_MODE)
+	case HW_VAR_TSF_AUTO_SYNC:
+		if (*val == _TRUE)
+			hw_port0_tsf_sync_sel(adapter, _TRUE, adapter->hw_port, 50);
+		else
+			hw_port0_tsf_sync_sel(adapter, _FALSE, adapter->hw_port, 50);
+		break;
+#endif
 	case HW_VAR_APFM_ON_MAC:
 		hal_data->bMacPwrCtrlOn = *val;
 		RTW_INFO("%s: bMacPwrCtrlOn=%d\n", __func__, hal_data->bMacPwrCtrlOn);
@@ -10010,6 +11775,70 @@ u8 SetHwReg(_adapter *adapter, u8 variable, u8 *val)
 		RTW_INFO("[HW_VAR_ENABLE_RX_BAR] 0x%02X=0x%02X\n",
 			REG_RXFLTMAP1, rtw_read16(adapter, REG_RXFLTMAP1));
 		break;
+	case HW_VAR_HCI_SUS_STATE:
+		hal_data->hci_sus_state = *(u8 *)val;
+		RTW_INFO("%s: hci_sus_state=%u\n", __func__, hal_data->hci_sus_state);
+		break;
+#if defined(CONFIG_AP_MODE) && defined(CONFIG_FW_HANDLE_TXBCN) && defined(CONFIG_SUPPORT_MULTI_BCN)
+		case HW_VAR_BCN_HEAD_SEL:
+		{
+			u8 vap_id = *(u8 *)val;
+
+			if ((vap_id >= CONFIG_LIMITED_AP_NUM) && (vap_id != 0xFF)) {
+				RTW_ERR(ADPT_FMT " vap_id(%d:%d) is invalid\n", ADPT_ARG(adapter),vap_id, adapter->vap_id);
+				rtw_warn_on(1);
+			}
+			if (MLME_IS_AP(adapter) || MLME_IS_MESH(adapter)) {
+				u16 drv_pg_bndy = 0, bcn_addr = 0;
+				u32 page_size = 0;
+
+				/*rtw_hal_get_def_var(adapter, HAL_DEF_TX_PAGE_BOUNDARY, &drv_pg_bndy);*/
+				rtw_halmac_get_rsvd_drv_pg_bndy(adapter_to_dvobj(adapter), &drv_pg_bndy);
+				rtw_hal_get_def_var(adapter, HAL_DEF_TX_PAGE_SIZE, (u8 *)&page_size);
+
+				if (vap_id != 0xFF)
+					bcn_addr = drv_pg_bndy + (vap_id * (MAX_BEACON_LEN / page_size));
+				else
+					bcn_addr = drv_pg_bndy;
+				RTW_INFO(ADPT_FMT" vap_id(%d) change BCN HEAD to 0x%04x\n",
+					ADPT_ARG(adapter), vap_id, bcn_addr);
+				rtw_write16(adapter, REG_FIFOPAGE_CTRL_2,
+					(bcn_addr & BIT_MASK_BCN_HEAD_1_V1) | BIT_BCN_VALID_V1);
+			}
+		}
+		break;
+#endif
+	case HW_VAR_LPS_STATE_CHK :
+		rtw_lps_state_chk(adapter, *(u8 *)val);
+		break;
+
+#ifdef CONFIG_RTS_FULL_BW
+	case HW_VAR_SET_RTS_BW:
+	{
+		#ifdef RTW_HALMAC
+			rtw_halmac_set_rts_full_bw(adapter_to_dvobj(adapter), (*val));
+		#else
+			u8 temp;
+			if(*val)
+				temp = (( rtw_read8(adapter, REG_INIRTS_RATE_SEL)) | BIT5 );
+			else
+				temp = (( rtw_read8(adapter, REG_INIRTS_RATE_SEL)) & (~BIT5));
+			rtw_write8(adapter, REG_INIRTS_RATE_SEL, temp);
+			/*RTW_INFO("HW_VAR_SET_RTS_BW	val=%u REG480=0x%x\n", *val, rtw_read8(adapter, REG_INIRTS_RATE_SEL));*/
+		#endif
+	}
+	break;
+#endif/*CONFIG_RTS_FULL_BW*/
+#if defined(CONFIG_PCI_HCI)
+	case HW_VAR_ENSWBCN: 
+	if (*val == _TRUE) {
+		rtw_write8(adapter, REG_CR + 1,
+			   rtw_read8(adapter, REG_CR + 1) | BIT(0));
+	} else
+		rtw_write8(adapter, REG_CR + 1,
+			   rtw_read8(adapter, REG_CR + 1) & ~BIT(0));
+	break;
+#endif
 	default:
 		if (0)
 			RTW_PRINT(FUNC_ADPT_FMT" variable(%d) not defined!\n",
@@ -10036,6 +11865,9 @@ void GetHwReg(_adapter *adapter, u8 variable, u8 *val)
 		break;
 	case HW_VAR_RF_TYPE:
 		*((u8 *)val) = hal_data->rf_type;
+#ifdef CONFIG_CUSTOMER01_SMART_ANTENNA		
+		*((u8 *)val) = RF_1T1R;
+#endif
 		break;
 	case HW_VAR_MEDIA_STATUS:
 		rtw_hal_get_msr(adapter, val);
@@ -10077,14 +11909,12 @@ void GetHwReg(_adapter *adapter, u8 variable, u8 *val)
 		}
 		break;
 
-	case HW_VAR_TSF:
-		/* read and save HIGH 32bits TSF value */
-		val64 = rtw_read32(adapter, REG_TSFTR+4);
-		val64 = val64 << 32;
+	case HW_VAR_HCI_SUS_STATE:
+		*((u8 *)val) = hal_data->hci_sus_state;
+		break;
 
-		/* read and save LOW 32bits TSF value */
-		val64 |= rtw_read32(adapter, REG_TSFTR);
-		*((u64*)val) = val64;
+	case HW_VAR_BCN_CTRL_ADDR:
+		*((u32 *)val) = hw_bcn_ctrl_addr(adapter, adapter->hw_port);
 		break;
 
 	default:
@@ -10134,9 +11964,6 @@ SetHalDefVar(_adapter *adapter, HAL_DEF_VARIABLE variable, void *value)
 	case HAL_DEF_ANT_DETECT:
 		hal_data->AntDetection = *((u8 *)value);
 		break;
-	case HAL_DEF_DBG_DIS_PWT:
-		hal_data->bDisableTXPowerTraining = *((u8 *)value);
-		break;
 	default:
 		RTW_PRINT("%s: [WARNING] HAL_DEF_VARIABLE(%d) not defined!\n", __FUNCTION__, variable);
 		bResult = _FAIL;
@@ -10191,6 +12018,35 @@ u8 rtw_hal_query_txbfee_rf_num(_adapter *adapter)
 		return 1;
 
 }
+#ifdef RTW_BEAMFORMING_VERSION_2
+void rtw_hal_beamforming_config_csirate(PADAPTER adapter)
+{
+	struct dm_struct *p_dm_odm;
+	struct beamforming_info *bf_info;
+	u8 fix_rate_enable = 0;
+	u8 new_csi_rate_idx;
+
+	/* Acting as BFee */
+	if (IS_BEAMFORMEE(adapter)) {
+	#if 0
+		/* Do not enable now because it will affect MU performance and CTS/BA rate. 2016.07.19. by tynli. [PCIE-1660] */
+		if (IS_HARDWARE_TYPE_8821C(Adapter))
+			FixRateEnable = 1;	/* Support after 8821C */
+	#endif
+
+		p_dm_odm = adapter_to_phydm(adapter);
+		bf_info = GET_BEAMFORM_INFO(adapter);
+
+		rtw_halmac_bf_cfg_csi_rate(adapter_to_dvobj(adapter),
+				p_dm_odm->rssi_min,
+				bf_info->cur_csi_rpt_rate,
+				fix_rate_enable, &new_csi_rate_idx);
+
+		if (new_csi_rate_idx != bf_info->cur_csi_rpt_rate)
+			bf_info->cur_csi_rpt_rate = new_csi_rate_idx;
+	}
+}
+#endif
 #endif
 
 u8
@@ -10224,9 +12080,6 @@ GetHalDefVar(_adapter *adapter, HAL_DEF_VARIABLE variable, void *value)
 	case HAL_DEF_TX_PAGE_SIZE:
 		*((u32 *)value) = _get_page_size(adapter);
 		break;
-	case HAL_DEF_DBG_DIS_PWT:
-		*(u8 *)value = hal_data->bDisableTXPowerTraining;
-		break;
 	case HAL_DEF_EXPLICIT_BEAMFORMER:
 	case HAL_DEF_EXPLICIT_BEAMFORMEE:
 	case HAL_DEF_VHT_MU_BEAMFORMER:
@@ -10363,6 +12216,9 @@ GetFractionValueFromString(
 		++(*pu4bMove);
 	}
 
+	if (*szScan < '0' || *szScan > '9')
+		return _FALSE;
+
 	/* Parse each digit. */
 	do {
 		(*pInteger) *= 10;
@@ -10377,12 +12233,17 @@ GetFractionValueFromString(
 
 			if (*szScan < '0' || *szScan > '9')
 				return _FALSE;
-			else {
-				*pFraction = *szScan - '0';
+
+			*pFraction += (*szScan - '0') * 10;
+			++szScan;
+			++(*pu4bMove);
+
+			if (*szScan >= '0' && *szScan <= '9') {
+				*pFraction += *szScan - '0';
 				++szScan;
 				++(*pu4bMove);
-				return _TRUE;
 			}
+			return _TRUE;
 		}
 	} while (*szScan >= '0' && *szScan <= '9');
 
@@ -10488,12 +12349,14 @@ void rtw_hal_check_rxfifo_full(_adapter *adapter)
 		/* switch counter to RX fifo */
 		if (IS_8188E(pHalData->version_id) ||
 		    IS_8188F(pHalData->version_id) ||
+		    IS_8188GTV(pHalData->version_id) ||
 		    IS_8812_SERIES(pHalData->version_id) ||
 		    IS_8821_SERIES(pHalData->version_id) ||
 		    IS_8723B_SERIES(pHalData->version_id) ||
 		    IS_8192E(pHalData->version_id) ||
 		    IS_8703B_SERIES(pHalData->version_id) ||
-		    IS_8723D_SERIES(pHalData->version_id)) {
+		    IS_8723D_SERIES(pHalData->version_id) ||
+		    IS_8192F_SERIES(pHalData->version_id)) {
 			rtw_write8(adapter, REG_RXERR_RPT + 3, rtw_read8(adapter, REG_RXERR_RPT + 3) | 0xa0);
 			save_cnt = _TRUE;
 		} else {
@@ -10611,8 +12474,8 @@ void rtw_dump_rx_dframe_info(_adapter *padapter, void *sel)
 	struct sta_recv_dframe_info *psta_dframe_info;
 	int i, j;
 	_list	*plist, *phead;
-	u8 bc_addr[6] = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff};
-	u8 null_addr[6] = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00};
+	u8 bc_addr[ETH_ALEN] = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff};
+	u8 null_addr[ETH_ALEN] = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00};
 
 	if (precvpriv->store_law_data_flag) {
 
@@ -10628,9 +12491,9 @@ void rtw_dump_rx_dframe_info(_adapter *padapter, void *sel)
 				plist = get_next(plist);
 
 				if (psta) {
-					if ((_rtw_memcmp(psta->cmn.mac_addr, bc_addr, 6)  !=   _TRUE)
-					    && (_rtw_memcmp(psta->cmn.mac_addr, null_addr, 6)  !=  _TRUE)
-					    && (_rtw_memcmp(psta->cmn.mac_addr, adapter_mac_addr(padapter), 6)  !=  _TRUE)) {
+					if ((_rtw_memcmp(psta->cmn.mac_addr, bc_addr, ETH_ALEN)  !=   _TRUE)
+					    && (_rtw_memcmp(psta->cmn.mac_addr, null_addr, ETH_ALEN)  !=  _TRUE)
+					    && (_rtw_memcmp(psta->cmn.mac_addr, adapter_mac_addr(padapter), ETH_ALEN)  !=  _TRUE)) {
 
 						RTW_PRINT_SEL(sel, "==============================\n");
 						RTW_PRINT_SEL(sel, "macaddr =" MAC_FMT "\n", MAC_ARG(psta->cmn.mac_addr));
@@ -10734,61 +12597,6 @@ void rtw_store_phy_info(_adapter *padapter, union recv_frame *prframe)
 
 }
 
-
-int check_phy_efuse_tx_power_info_valid(PADAPTER padapter)
-{
-	PHAL_DATA_TYPE pHalData = GET_HAL_DATA(padapter);
-	u8 *pContent = pHalData->efuse_eeprom_data;
-	int index = 0;
-	u16 tx_index_offset = 0x0000;
-
-	switch (rtw_get_chip_type(padapter)) {
-	case RTL8723B:
-		tx_index_offset = EEPROM_TX_PWR_INX_8723B;
-		break;
-	case RTL8703B:
-		tx_index_offset = EEPROM_TX_PWR_INX_8703B;
-		break;
-	case RTL8723D:
-		tx_index_offset = EEPROM_TX_PWR_INX_8723D;
-		break;
-	case RTL8188E:
-		tx_index_offset = EEPROM_TX_PWR_INX_88E;
-		break;
-	case RTL8188F:
-		tx_index_offset = EEPROM_TX_PWR_INX_8188F;
-		break;
-	case RTL8192E:
-		tx_index_offset = EEPROM_TX_PWR_INX_8192E;
-		break;
-	case RTL8821:
-		tx_index_offset = EEPROM_TX_PWR_INX_8821;
-		break;
-	case RTL8812:
-		tx_index_offset = EEPROM_TX_PWR_INX_8812;
-		break;
-	case RTL8814A:
-		tx_index_offset = EEPROM_TX_PWR_INX_8814;
-		break;
-	case RTL8822B:
-		tx_index_offset = EEPROM_TX_PWR_INX_8822B;
-		break;
-	case RTL8821C:
-		tx_index_offset = EEPROM_TX_PWR_INX_8821C;
-		break;
-	default:
-		tx_index_offset = 0x0010;
-		break;
-	}
-
-	/* TODO: chacking length by ICs */
-	for (index = 0 ; index < 11 ; index++) {
-		if (pContent[tx_index_offset + index] == 0xFF)
-			return _FALSE;
-	}
-	return _TRUE;
-}
-
 int hal_efuse_macaddr_offset(_adapter *adapter)
 {
 	u8 interface_type = 0;
@@ -10844,6 +12652,14 @@ int hal_efuse_macaddr_offset(_adapter *adapter)
 			addr_offset = EEPROM_MAC_ADDR_8188FS;
 		break;
 #endif
+#ifdef CONFIG_RTL8188GTV
+	case RTL8188GTV:
+		if (interface_type == RTW_USB)
+			addr_offset = EEPROM_MAC_ADDR_8188GTVU;
+		else if (interface_type == RTW_SDIO)
+			addr_offset = EEPROM_MAC_ADDR_8188GTVS;
+		break;
+#endif
 #ifdef CONFIG_RTL8812A
 	case RTL8812:
 		if (interface_type == RTW_USB)
@@ -10902,6 +12718,25 @@ int hal_efuse_macaddr_offset(_adapter *adapter)
 			addr_offset = EEPROM_MAC_ADDR_8821CE;
 		break;
 #endif /* CONFIG_RTL8821C */
+
+#ifdef CONFIG_RTL8710B
+	case RTL8710B:
+		if (interface_type == RTW_USB)
+			addr_offset = EEPROM_MAC_ADDR_8710B;
+		break;
+#endif
+
+#ifdef CONFIG_RTL8192F
+	case RTL8192F:
+		if (interface_type == RTW_USB)
+			addr_offset = EEPROM_MAC_ADDR_8192FU;
+		else if (interface_type == RTW_SDIO)
+			addr_offset = EEPROM_MAC_ADDR_8192FS;
+		else if (interface_type == RTW_PCIE)
+			addr_offset = EEPROM_MAC_ADDR_8192FE;
+		break;
+#endif /* CONFIG_RTL8192F */
+
 	}
 
 	if (addr_offset == -1) {
@@ -10997,6 +12832,9 @@ int hal_config_macaddr(_adapter *adapter, bool autoload_fail)
 	int addr_offset = hal_efuse_macaddr_offset(adapter);
 	u8 *hw_addr = NULL;
 	int ret = _SUCCESS;
+#if defined(CONFIG_RTL8822B) && defined(CONFIG_USB_HCI)
+	u8 ft_mac_addr[ETH_ALEN] = {0x00, 0xff, 0xff, 0xff, 0xff, 0xff}; /* FT USB2 for 8822B */
+#endif
 
 	if (autoload_fail)
 		goto bypass_hw_pg;
@@ -11016,6 +12854,11 @@ int hal_config_macaddr(_adapter *adapter, bool autoload_fail)
 			hw_addr = addr;
 	}
 
+#if defined(CONFIG_RTL8822B) && defined(CONFIG_USB_HCI)
+	if (_rtw_memcmp(hw_addr, ft_mac_addr, ETH_ALEN))
+		hw_addr[0] = 0xff;
+#endif
+
 	/* check hw pg data */
 	if (hw_addr && rtw_check_invalid_mac_address(hw_addr, _TRUE) == _FALSE) {
 		_rtw_memcpy(hal_data->EEPROMMACAddr, hw_addr, ETH_ALEN);
@@ -11071,7 +12914,7 @@ void rtw_bb_rf_gain_offset(_adapter *padapter)
 	}
 
 #if defined(CONFIG_RTL8723B)
-	if (value & BIT4 || (registry_par->RegPwrTrimEnable == 1)) {
+	if (value & BIT4 && (registry_par->RegPwrTrimEnable == 1)) {
 		RTW_INFO("Offset RF Gain.\n");
 		RTW_INFO("Offset RF Gain.  pHalData->EEPROMRFGainVal=0x%x\n", pHalData->EEPROMRFGainVal);
 
@@ -11110,7 +12953,7 @@ void rtw_bb_rf_gain_offset(_adapter *padapter)
 		RTW_INFO("Using the default RF gain.\n");
 
 #elif defined(CONFIG_RTL8188E)
-	if (value & BIT4 || (registry_par->RegPwrTrimEnable == 1)) {
+	if (value & BIT4 && (registry_par->RegPwrTrimEnable == 1)) {
 		RTW_INFO("8188ES Offset RF Gain.\n");
 		RTW_INFO("8188ES Offset RF Gain. EEPROMRFGainVal=0x%x\n",
 			 pHalData->EEPROMRFGainVal);
@@ -11699,8 +13542,10 @@ void rtw_reset_mac_rx_counters(_adapter *padapter)
 
 	/* If no packet rx, MaxRx clock be gating ,BIT_DISGCLK bit19 set 1 for fix*/
 	if (IS_HARDWARE_TYPE_8703B(padapter) ||
-	    IS_HARDWARE_TYPE_8723D(padapter) ||
-	    IS_HARDWARE_TYPE_8188F(padapter))
+		IS_HARDWARE_TYPE_8723D(padapter) ||
+		IS_HARDWARE_TYPE_8188F(padapter) ||
+		IS_HARDWARE_TYPE_8188GTV(padapter) ||
+		IS_HARDWARE_TYPE_8192F(padapter))
 		phy_set_mac_reg(padapter, REG_RCR, BIT19, 0x1);
 
 	/* reset mac counter */
@@ -11856,27 +13701,50 @@ void rtw_dump_rx_counters(_adapter *padapter)
 #endif
 u8 rtw_get_current_tx_sgi(_adapter *padapter, struct sta_info *psta)
 {
+	HAL_DATA_TYPE *hal_data = GET_HAL_DATA(padapter);
 	u8 curr_tx_sgi = 0;
 	struct ra_sta_info *ra_info;
 
 	if (!psta)
 		return curr_tx_sgi;
 
-	ra_info = &psta->cmn.ra_info;
-	curr_tx_sgi = ((ra_info->curr_tx_rate) & 0x80) >> 7;
+	if (padapter->fix_rate == 0xff) {
+#if defined(CONFIG_RTL8188E)
+#if (RATE_ADAPTIVE_SUPPORT == 1)
+		curr_tx_sgi = hal_data->odmpriv.ra_info[psta->cmn.mac_id].rate_sgi;
+#endif /* (RATE_ADAPTIVE_SUPPORT == 1)*/
+#else
+		ra_info = &psta->cmn.ra_info;
+		curr_tx_sgi = ((ra_info->curr_tx_rate) & 0x80) >> 7;
+#endif
+	} else {
+		curr_tx_sgi = ((padapter->fix_rate) & 0x80) >> 7;
+	}
 
 	return curr_tx_sgi;
 }
+
 u8 rtw_get_current_tx_rate(_adapter *padapter, struct sta_info *psta)
 {
+	HAL_DATA_TYPE *hal_data = GET_HAL_DATA(padapter);
 	u8 rate_id = 0;
 	struct ra_sta_info *ra_info;
 
 	if (!psta)
 		return rate_id;
 
-	ra_info = &psta->cmn.ra_info;
-	rate_id = ra_info->curr_tx_rate & 0x7f;
+	if (padapter->fix_rate == 0xff) {
+#if defined(CONFIG_RTL8188E)
+#if (RATE_ADAPTIVE_SUPPORT == 1)
+		rate_id = hal_data->odmpriv.ra_info[psta->cmn.mac_id].decision_rate;
+#endif /* (RATE_ADAPTIVE_SUPPORT == 1)*/
+#else
+		ra_info = &psta->cmn.ra_info;
+		rate_id = ra_info->curr_tx_rate & 0x7f;
+#endif
+	} else {
+		rate_id = padapter->fix_rate & 0x7f;
+	}
 
 	return rate_id;
 }
@@ -11907,6 +13775,49 @@ void update_IOT_info(_adapter *padapter)
 	}
 
 }
+#ifdef CONFIG_RTS_FULL_BW 
+/*
+8188E: not support full RTS BW feature(mac REG no define 480[5])
+*/
+void rtw_set_rts_bw(_adapter *padapter) {
+	int i;
+	u8 enable = 1;
+	bool connect_to_8812 = _FALSE;
+	u8 bc_addr[ETH_ALEN] = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff};
+	struct dvobj_priv *dvobj = adapter_to_dvobj(padapter);
+	struct macid_ctl_t *macid_ctl = dvobj_to_macidctl(dvobj);
+	struct sta_info *station = NULL;
+
+	for (i = 0; i < macid_ctl->num; i++) {
+		if (rtw_macid_is_used(macid_ctl, i)) {
+
+			station = NULL;
+			station = macid_ctl->sta[i];
+			if(station) {
+				
+				 _adapter *sta_adapter =station->padapter;
+				struct mlme_ext_priv	*pmlmeext = &(sta_adapter->mlmeextpriv);
+				struct mlme_ext_info	*pmlmeinfo = &(pmlmeext->mlmext_info);
+				
+				if ( pmlmeinfo->state != WIFI_FW_NULL_STATE) {
+					if(_rtw_memcmp(macid_ctl->sta[i]->cmn.mac_addr, bc_addr, ETH_ALEN) !=  _TRUE) {
+						if (  macid_ctl->sta[i]->vendor_8812) {
+							connect_to_8812 = _TRUE;
+							enable = 0;
+						}	
+					}	
+				}
+			}
+		}
+
+		if(connect_to_8812)
+			break;
+	}
+	
+		RTW_INFO("%s connect_to_8812=%d,enable=%u\n", __FUNCTION__,connect_to_8812,enable);
+		rtw_hal_set_hwreg(padapter, HW_VAR_SET_RTS_BW, &enable);
+}
+#endif/*CONFIG_RTS_FULL_BW*/
 
 /* TODO: merge with phydm, see odm_SetCrystalCap() */
 void hal_set_crystal_cap(_adapter *adapter, u8 crystal_cap)
@@ -11914,9 +13825,10 @@ void hal_set_crystal_cap(_adapter *adapter, u8 crystal_cap)
 	crystal_cap = crystal_cap & 0x3F;
 
 	switch (rtw_get_chip_type(adapter)) {
-#if defined(CONFIG_RTL8188E) || defined(CONFIG_RTL8188F)
+#if defined(CONFIG_RTL8188E) || defined(CONFIG_RTL8188F) || defined(CONFIG_RTL8188GTV)
 	case RTL8188E:
 	case RTL8188F:
+	case RTL8188GTV:
 		/* write 0x24[16:11] = 0x24[22:17] = CrystalCap */
 		phy_set_bb_reg(adapter, REG_AFE_XTAL_CTRL, 0x007FF800, (crystal_cap | (crystal_cap << 6)));
 		break;
@@ -11929,7 +13841,7 @@ void hal_set_crystal_cap(_adapter *adapter, u8 crystal_cap)
 #endif
 #if defined(CONFIG_RTL8723B) || defined(CONFIG_RTL8703B) || \
 		defined(CONFIG_RTL8723D) || defined(CONFIG_RTL8821A) || \
-		defined(CONFIG_RTL8192E)
+		defined(CONFIG_RTL8192E) 
 	case RTL8723B:
 	case RTL8703B:
 	case RTL8723D:
@@ -11945,16 +13857,25 @@ void hal_set_crystal_cap(_adapter *adapter, u8 crystal_cap)
 		phy_set_bb_reg(adapter, REG_MAC_PHY_CTRL, 0x07FF8000, (crystal_cap | (crystal_cap << 6)));
 		break;
 #endif
-#if defined(CONFIG_RTL8822B) || defined(CONFIG_RTL8821C)
+#if defined(CONFIG_RTL8822B) || defined(CONFIG_RTL8821C) || defined(CONFIG_RTL8192F)
 
 	case RTL8822B:
 	case RTL8821C:
+	case RTL8192F:	
 		/* write 0x28[6:1] = 0x24[30:25] = CrystalCap */
 		crystal_cap = crystal_cap & 0x3F;
 		phy_set_bb_reg(adapter, REG_AFE_XTAL_CTRL, 0x7E000000, crystal_cap);
 		phy_set_bb_reg(adapter, REG_AFE_PLL_CTRL, 0x7E, crystal_cap);
 		break;
 #endif
+#if defined(CONFIG_RTL8710B)
+	case RTL8710B:
+		/*Change by ylb 20160728, Becase 0x2C[23:12] is removed to syson 0x60[29:18] */
+		/* 0x2C[23:18] = 0x2C[29:24] = CrystalCap //Xo:[29:24], Xi:[23:18]*/
+		crystal_cap = crystal_cap & 0x3F;
+		hal_set_syson_reg(adapter, REG_SYS_XTAL_CTRL0, 0x3FFC0000, (crystal_cap | (crystal_cap << 6)));
+		break;
+#endif
 	default:
 		rtw_warn_on(1);
 	}
@@ -11993,6 +13914,11 @@ int hal_spec_init(_adapter *adapter)
 		init_hal_spec_8188f(adapter);
 		break;
 #endif
+#ifdef CONFIG_RTL8188GTV
+	case RTL8188GTV:
+		init_hal_spec_8188gtv(adapter);
+		break;
+#endif
 #ifdef CONFIG_RTL8812A
 	case RTL8812:
 		init_hal_spec_8812a(adapter);
@@ -12023,6 +13949,17 @@ int hal_spec_init(_adapter *adapter)
 		init_hal_spec_rtl8821c(adapter);
 		break;
 #endif
+#ifdef CONFIG_RTL8710B
+	case RTL8710B:
+		init_hal_spec_8710b(adapter);
+		break;
+#endif
+#ifdef CONFIG_RTL8192F
+	case RTL8192F:
+		init_hal_spec_8192f(adapter);
+		break;
+#endif
+
 	default:
 		RTW_ERR("%s: unknown chip_type:%u\n"
 			, __func__, rtw_get_chip_type(adapter));
@@ -12072,6 +14009,8 @@ void dump_hal_spec(void *sel, _adapter *adapter)
 	RTW_PRINT_SEL(sel, "sec_cam_ent_num:%u\n", hal_spec->sec_cam_ent_num);
 	RTW_PRINT_SEL(sel, "rfpath_num_2g:%u\n", hal_spec->rfpath_num_2g);
 	RTW_PRINT_SEL(sel, "rfpath_num_5g:%u\n", hal_spec->rfpath_num_5g);
+	RTW_PRINT_SEL(sel, "txgi_max:%u\n", hal_spec->txgi_max);
+	RTW_PRINT_SEL(sel, "txgi_pdbm:%u\n", hal_spec->txgi_pdbm);
 	RTW_PRINT_SEL(sel, "max_tx_cnt:%u\n", hal_spec->max_tx_cnt);
 	RTW_PRINT_SEL(sel, "tx_nss_num:%u\n", hal_spec->tx_nss_num);
 	RTW_PRINT_SEL(sel, "rx_nss_num:%u\n", hal_spec->rx_nss_num);
@@ -12103,6 +14042,11 @@ void dump_hal_spec(void *sel, _adapter *adapter)
 			_RTW_PRINT_SEL(sel, "%s ", _wl_func_str[i]);
 	}
 	_RTW_PRINT_SEL(sel, "\n");
+
+	RTW_PRINT_SEL(sel, "rx_tsf_filter:%u\n", hal_spec->rx_tsf_filter);
+
+	RTW_PRINT_SEL(sel, "pg_txpwr_saddr:0x%X\n", hal_spec->pg_txpwr_saddr);
+	RTW_PRINT_SEL(sel, "pg_txgi_diff_factor:%u\n", hal_spec->pg_txgi_diff_factor);
 }
 
 inline bool hal_chk_band_cap(_adapter *adapter, u8 cap)
@@ -12165,6 +14109,13 @@ inline bool hal_is_wireless_mode_support(_adapter *adapter, u8 mode)
 
 	return 0;
 }
+inline bool hal_is_mimo_support(_adapter *adapter)
+{
+	if ((GET_HAL_SPEC(adapter)->tx_nss_num == 1) &&
+		(GET_HAL_SPEC(adapter)->rx_nss_num == 1))
+		return 0;
+	return 1;
+}
 
 /*
 * hal_largest_bw - starting from in_bw, get largest bw supported by HAL
@@ -12186,34 +14137,8 @@ u8 hal_largest_bw(_adapter *adapter, u8 in_bw)
 	return in_bw;
 }
 
-void rtw_hal_correct_tsf(_adapter *padapter, u8 hw_port, u64 tsf)
-{
-	if (hw_port == HW_PORT0) {
-		/*disable related TSF function*/
-		rtw_write8(padapter, REG_BCN_CTRL, rtw_read8(padapter, REG_BCN_CTRL) & (~EN_BCN_FUNCTION));
-
-		rtw_write32(padapter, REG_TSFTR, tsf);
-		rtw_write32(padapter, REG_TSFTR + 4, tsf >> 32);
-
-		/*enable related TSF function*/
-		rtw_write8(padapter, REG_BCN_CTRL, rtw_read8(padapter, REG_BCN_CTRL) | EN_BCN_FUNCTION);
-	} else if (hw_port == HW_PORT1) {
-		/*disable related TSF function*/
-		rtw_write8(padapter, REG_BCN_CTRL_1, rtw_read8(padapter, REG_BCN_CTRL_1) & (~EN_BCN_FUNCTION));
-
-		rtw_write32(padapter, REG_TSFTR1, tsf);
-		rtw_write32(padapter, REG_TSFTR1 + 4, tsf >> 32);
-
-		/*enable related TSF function*/
-		rtw_write8(padapter, REG_BCN_CTRL_1, rtw_read8(padapter, REG_BCN_CTRL_1) | EN_BCN_FUNCTION);
-	} else
-		RTW_INFO("%s-[WARN] "ADPT_FMT" invalid hw_port:%d\n", __func__, ADPT_ARG(padapter), hw_port);
-}
-
 void ResumeTxBeacon(_adapter *padapter)
 {
-#ifdef CONFIG_MI_WITH_MBSSID_CAM
-#else
 	rtw_write8(padapter, REG_FWHW_TXQ_CTRL + 2,
 		rtw_read8(padapter, REG_FWHW_TXQ_CTRL + 2) | BIT(6));
 
@@ -12227,13 +14152,10 @@ void ResumeTxBeacon(_adapter *padapter)
 	rtw_write8(padapter, REG_TBTT_PROHIBIT + 1, TBTT_PROHIBIT_HOLD_TIME & 0xFF);
 	rtw_write8(padapter, REG_TBTT_PROHIBIT + 2,
 		(rtw_read8(padapter, REG_TBTT_PROHIBIT + 2) & 0xF0) | (TBTT_PROHIBIT_HOLD_TIME >> 8));
-#endif
 }
 
 void StopTxBeacon(_adapter *padapter)
 {
-#ifdef CONFIG_MI_WITH_MBSSID_CAM
-#else
 	rtw_write8(padapter, REG_FWHW_TXQ_CTRL + 2,
 		rtw_read8(padapter, REG_FWHW_TXQ_CTRL + 2) & (~BIT6));
 
@@ -12241,63 +14163,142 @@ void StopTxBeacon(_adapter *padapter)
 	rtw_write8(padapter, REG_TBTT_PROHIBIT + 1, TBTT_PROHIBIT_HOLD_TIME_STOP_BCN & 0xFF);
 	rtw_write8(padapter, REG_TBTT_PROHIBIT + 2,
 		(rtw_read8(padapter, REG_TBTT_PROHIBIT + 2) & 0xF0) | (TBTT_PROHIBIT_HOLD_TIME_STOP_BCN >> 8));
-#endif
 }
 
 #ifdef CONFIG_MI_WITH_MBSSID_CAM /*HW port0 - MBSS*/
-void hw_var_set_opmode_mbid(_adapter *Adapter, u8 mode)
+
+#ifdef CONFIG_CLIENT_PORT_CFG
+const u8 _clt_port_id[MAX_CLIENT_PORT_NUM] = {
+	CLT_PORT0,
+	CLT_PORT1,
+	CLT_PORT2,
+	CLT_PORT3
+};
+
+void rtw_clt_port_init(struct clt_port_t  *cltp)
 {
-	RTW_INFO("%s()-"ADPT_FMT" mode = %d\n", __func__, ADPT_ARG(Adapter), mode);
+	cltp->bmp = 0;
+	cltp->num = 0;
+	_rtw_spinlock_init(&cltp->lock);
+}
+void rtw_clt_port_deinit(struct clt_port_t *cltp)
+{
+	_rtw_spinlock_free(&cltp->lock);
+}
+static void _hw_client_port_alloc(_adapter *adapter)
+{
+	struct dvobj_priv *dvobj = adapter_to_dvobj(adapter);
+	struct clt_port_t  *cltp = &dvobj->clt_port;
+	_irqL irql;
+	int i;
 
-	rtw_hal_rcr_set_chk_bssid(Adapter, MLME_ACTION_NONE);
+	#if 0
+	if (cltp->num > MAX_CLIENT_PORT_NUM) {
+		RTW_ERR(ADPT_FMT" cann't  alloc client (%d)\n", ADPT_ARG(adapter), cltp->num);
+		rtw_warn_on(1);
+		return;
+	}
+	#endif
 
-	/* disable Port0 TSF update*/
-	rtw_write8(Adapter, REG_BCN_CTRL, rtw_read8(Adapter, REG_BCN_CTRL) | DIS_TSF_UDT);
+	if (adapter->client_id !=  MAX_CLIENT_PORT_NUM) {
+		RTW_INFO(ADPT_FMT" client_id %d has allocated port:%d\n",
+			ADPT_ARG(adapter), adapter->client_id, adapter->client_port);
+		return;
+	}
+	_enter_critical_bh(&cltp->lock, &irql);
+	for (i = 0; i < MAX_CLIENT_PORT_NUM; i++) {
+		if (!(cltp->bmp & BIT(i)))
+			break;
+	}
 
-	/* set net_type */
-	Set_MSR(Adapter, mode);
+	if (i < MAX_CLIENT_PORT_NUM) {
+		adapter->client_id = i;
+		cltp->bmp |= BIT(i);
+		adapter->client_port = _clt_port_id[i];
+	}
+	cltp->num++;
+	_exit_critical_bh(&cltp->lock, &irql);
+	RTW_INFO("%s("ADPT_FMT")id:%d, port:%d clt_num:%d\n",
+		__func__, ADPT_ARG(adapter), adapter->client_id, adapter->client_port, cltp->num);
+}
+static void _hw_client_port_free(_adapter *adapter)
+{
+	struct dvobj_priv *dvobj = adapter_to_dvobj(adapter);
+	struct clt_port_t  *cltp = &dvobj->clt_port;
+	_irqL irql;
 
-	if ((mode == _HW_STATE_STATION_) || (mode == _HW_STATE_NOLINK_)) {
-		if (!rtw_mi_get_ap_num(Adapter) && !rtw_mi_get_mesh_num(Adapter))
-			StopTxBeacon(Adapter);
+	#if 0
+	if (adapter->client_id >=  MAX_CLIENT_PORT_NUM) {
+		RTW_ERR(ADPT_FMT" client_id %d is invalid\n", ADPT_ARG(adapter), adapter->client_id);
+		/*rtw_warn_on(1);*/
+	}
+	#endif
 
-		rtw_write8(Adapter, REG_BCN_CTRL, DIS_TSF_UDT | EN_BCN_FUNCTION | DIS_ATIM);/*disable atim wnd*/
-	} else if (mode == _HW_STATE_ADHOC_) {
-		ResumeTxBeacon(Adapter);
-		rtw_write8(Adapter, REG_BCN_CTRL, DIS_TSF_UDT | EN_BCN_FUNCTION | DIS_BCNQ_SUB);
+	RTW_INFO("%s ("ADPT_FMT") id:%d, port:%d clt_num:%d\n",
+		__func__, ADPT_ARG(adapter), adapter->client_id, adapter->client_port, cltp->num);
 
-	} else if (mode == _HW_STATE_AP_) {
-		ResumeTxBeacon(Adapter);
+	_enter_critical_bh(&cltp->lock, &irql);
+	if (adapter->client_id !=  MAX_CLIENT_PORT_NUM) {
+		cltp->bmp &= ~ BIT(adapter->client_id);
+		adapter->client_id = MAX_CLIENT_PORT_NUM;
+		adapter->client_port = CLT_PORT_INVALID;
+	}
+	cltp->num--;
+	if (cltp->num < 0)
+		cltp->num = 0;
+	_exit_critical_bh(&cltp->lock, &irql);
+}
+void rtw_hw_client_port_allocate(_adapter *adapter)
+{
+	struct hal_spec_t *hal_spec = GET_HAL_SPEC(adapter);
 
-		rtw_write8(Adapter, REG_BCN_CTRL, DIS_TSF_UDT | DIS_BCNQ_SUB);
+	if (hal_spec->port_num != 5)
+		return;
 
-		/*enable to rx data frame*/
-		rtw_write16(Adapter, REG_RXFLTMAP2, 0xFFFF);
+	_hw_client_port_alloc(adapter);
+}
+void rtw_hw_client_port_release(_adapter *adapter)
+{
+	struct hal_spec_t *hal_spec = GET_HAL_SPEC(adapter);
 
-		/*Beacon Control related register for first time*/
-		rtw_write8(Adapter, REG_BCNDMATIM, 0x02); /* 2ms */
+	if (hal_spec->port_num != 5)
+		return;
 
-		/*rtw_write8(Adapter, REG_BCN_MAX_ERR, 0xFF);*/
-		rtw_write8(Adapter, REG_ATIMWND, 0x0c); /* 12ms */
-		rtw_write16(Adapter, REG_BCNTCFG, 0x00);
+	_hw_client_port_free(adapter);
+}
+#endif /*CONFIG_CLIENT_PORT_CFG*/
 
-		rtw_write16(Adapter, REG_TSFTR_SYN_OFFSET, 0x7fff);/* +32767 (~32ms) */
+void hw_var_set_opmode_mbid(_adapter *Adapter, u8 mode)
+{
+	RTW_INFO("%s()-"ADPT_FMT" mode = %d\n", __func__, ADPT_ARG(Adapter), mode);
 
-		/*reset TSF*/
-		rtw_write8(Adapter, REG_DUAL_TSF_RST, BIT(0));
+	rtw_hal_rcr_set_chk_bssid(Adapter, MLME_ACTION_NONE);
 
-		/*enable BCN0 Function for if1*/
-		/*don't enable update TSF0 for if1 (due to TSF update when beacon,probe rsp are received)*/
-		rtw_write8(Adapter, REG_BCN_CTRL, (DIS_TSF_UDT | EN_BCN_FUNCTION | EN_TXBCN_RPT | DIS_BCNQ_SUB));
-		#ifdef CONFIG_BCN_XMIT_PROTECT
-		rtw_write8(Adapter, REG_CCK_CHECK, rtw_read8(Adapter, REG_CCK_CHECK) | BIT_EN_BCN_PKT_REL);
-		#endif
+	/* set net_type */
+	Set_MSR(Adapter, mode);
 
-		if (IS_HARDWARE_TYPE_8821(Adapter) || IS_HARDWARE_TYPE_8192E(Adapter))/* select BCN on port 0 for DualBeacon*/
-			rtw_write8(Adapter, REG_CCK_CHECK, rtw_read8(Adapter, REG_CCK_CHECK) & (~BIT_BCN_PORT_SEL));
+	if ((mode == _HW_STATE_STATION_) || (mode == _HW_STATE_NOLINK_)) {
+		if (!rtw_mi_get_ap_num(Adapter) && !rtw_mi_get_mesh_num(Adapter))
+			StopTxBeacon(Adapter);
+	} else if (mode == _HW_STATE_ADHOC_)
+		ResumeTxBeacon(Adapter);
+	else if (mode == _HW_STATE_AP_)
+		/* enable rx ps-poll */
+		rtw_write16(Adapter, REG_RXFLTMAP1, rtw_read16(Adapter, REG_RXFLTMAP1) | BIT_CTRLFLT10EN);
 
-	}
+	/* enable rx data frame */
+	rtw_write16(Adapter, REG_RXFLTMAP2, 0xFFFF);
 
+#ifdef CONFIG_CLIENT_PORT_CFG
+	if (mode == _HW_STATE_STATION_)
+		rtw_hw_client_port_allocate(Adapter);
+	else
+		rtw_hw_client_port_release(Adapter);
+#endif
+#if defined(CONFIG_RTL8192F)
+		rtw_write16(Adapter, REG_WLAN_ACT_MASK_CTRL_1, rtw_read16(Adapter, 
+					REG_WLAN_ACT_MASK_CTRL_1) | EN_PORT_0_FUNCTION);	
+#endif
 }
 #endif
 
@@ -12487,6 +14488,85 @@ u8 rtw_ap_bcn_queue_empty_check(_adapter *padapter, u32 txbcn_timer_ms)
 #endif /*CONFIG_BCN_XMIT_PROTECT*/
 #endif /*CONFIG_SWTIMER_BASED_TXBCN*/
 
+static void _rf_type_to_ant_path(enum rf_type rf, enum bb_path *tx,
+				 enum bb_path *rx)
+{
+	if (tx) {
+		switch (rf) {
+		case RF_1T1R:
+		case RF_1T2R:
+			*tx = BB_PATH_A;
+			break;
+		case RF_2T2R:
+		case RF_2T3R:
+		case RF_2T4R:
+			*tx = BB_PATH_AB;
+			break;
+		case RF_3T3R:
+		case RF_3T4R:
+			*tx = BB_PATH_ABC;
+			break;
+		case RF_4T4R:
+		default:
+			*tx = BB_PATH_ABCD;
+			break;
+		}
+	}
+
+	if (rx) {
+		switch (rf) {
+		case RF_1T1R:
+			*rx = BB_PATH_A;
+			break;
+		case RF_1T2R:
+		case RF_2T2R:
+			*rx = BB_PATH_AB;
+			break;
+		case RF_2T3R:
+		case RF_3T3R:
+			*rx = BB_PATH_ABC;
+			break;
+		case RF_2T4R:
+		case RF_3T4R:
+		case RF_4T4R:
+		default:
+			*rx = BB_PATH_ABCD;
+			break;
+		}
+	}
+}
+
+/**
+ * rtw_hal_get_rf_path() - Get RF path related information
+ * @d:		struct dvobj_priv*
+ * @type:	RF type, nTnR
+ * @tx:		Tx path
+ * @rx:		Rx path
+ *
+ * Get RF type, TX path and RX path information.
+ */
+void rtw_hal_get_rf_path(struct dvobj_priv *d, enum rf_type *type,
+			 enum bb_path *tx, enum bb_path *rx)
+{
+	struct _ADAPTER *a;
+	u8 val8 = RF_1T1R;
+	enum rf_type rf;
+
+
+	a = dvobj_get_primary_adapter(d);
+#ifndef CONFIG_CUSTOMER01_SMART_ANTENNA
+	rtw_hal_get_hwreg(a, HW_VAR_RF_TYPE, &val8);
+#else
+	val8 = RF_2T2R;
+#endif
+	rf = (enum rf_type)val8;
+	if (type)
+		*type = rf;
+
+	if (tx || rx)
+		_rf_type_to_ant_path(rf, tx, rx);
+}
+
 #ifdef RTW_CHANNEL_SWITCH_OFFLOAD
 void rtw_hal_switch_chnl_and_set_bw_offload(_adapter *adapter, u8 central_ch, u8 pri_ch_idx, u8 bw)
 {
@@ -12501,8 +14581,59 @@ void rtw_hal_switch_chnl_and_set_bw_offload(_adapter *adapter, u8 central_ch, u8
 	SET_H2CCMD_SINGLE_CH_SWITCH_V2_PRIMARY_CH_IDX(h2c, pri_ch_idx);
 	SET_H2CCMD_SINGLE_CH_SWITCH_V2_BW(h2c, bw);
 
-	rtw_sctx_init(chsw_sctx, 100);
+	rtw_sctx_init(chsw_sctx, 10);
 	rtw_hal_fill_h2c_cmd(adapter, H2C_SINGLE_CHANNELSWITCH_V2, H2C_SINGLE_CHANNELSWITCH_V2_LEN, h2c);
 	rtw_sctx_wait(chsw_sctx, __func__);
 }
 #endif /* RTW_CHANNEL_SWITCH_OFFLOAD */
+
+#if defined(CONFIG_RTL8814A) || defined(CONFIG_RTL8812A) ||\
+	defined(CONFIG_RTL8192F) || defined(CONFIG_RTL8192E) ||\
+	defined(CONFIG_RTL8822B) ||defined(CONFIG_RTL8821A)
+u8 phy_get_current_tx_num(
+	IN	PADAPTER		pAdapter,
+	IN	u8				Rate
+)
+{
+	u8	tx_num = RF_1TX;
+
+	if (IS_1T_RATE(Rate)) {
+	#if defined(CONFIG_RTW_TX_2PATH_EN)
+		tx_num = RF_2TX;
+	else
+		tx_num = RF_1TX;
+	#endif
+	}
+	else if (IS_2T_RATE(Rate))
+		tx_num = RF_2TX;
+	else if (IS_3T_RATE(Rate))
+		tx_num = RF_3TX;
+	else
+		rtw_warn_on(1);
+
+	return tx_num;
+}
+#endif
+#ifdef CONFIG_RTL8812A
+u8 * rtw_hal_set_8812a_vendor_ie(_adapter *padapter , u8 *pframe ,uint *frlen ) {
+	int vender_len = 7;
+	unsigned char	vendor_info[vender_len];
+	unsigned char REALTEK_OUI[] = {0x00, 0xe0, 0x4c};
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(padapter);
+
+	if( !IS_HARDWARE_TYPE_8812(padapter) )
+		return pframe;
+
+	_rtw_memset(vendor_info,0,vender_len);
+	_rtw_memcpy(vendor_info, REALTEK_OUI, 3);
+	vendor_info[4] =2;
+	if(pHalData->version_id.CUTVersion > B_CUT_VERSION )
+		vendor_info[6] = RT_HT_CAP_USE_JAGUAR_CCUT;
+	else
+		vendor_info[6] = RT_HT_CAP_USE_JAGUAR_BCUT;
+	pframe = rtw_set_ie(pframe, _VENDOR_SPECIFIC_IE_,vender_len,vendor_info , frlen);
+	
+	return pframe;
+}
+#endif /*CONFIG_RTL8812A*/
+
diff --git a/rtl8723DS/hal/hal_com_c2h.h b/rtl8723DS/hal/hal_com_c2h.h
index 4991fcc..1efabc9 100755..100644
--- a/rtl8723DS/hal/hal_com_c2h.h
+++ b/rtl8723DS/hal/hal_com_c2h.h
@@ -71,6 +71,9 @@ typedef enum _C2H_EVT {
 	C2H_CUSTOMER_STR_RPT = 0x24,
 	C2H_CUSTOMER_STR_RPT_2 = 0x25,
 	C2H_WLAN_INFO = 0x27,
+#ifdef RTW_PER_CMD_SUPPORT_FW
+	C2H_PER_RATE_RPT = 0x2c,
+#endif
 	C2H_DEFEATURE_RSVD = 0xFD,
 	C2H_EXTEND = 0xff,
 } C2H_EVT;
@@ -112,4 +115,9 @@ int c2h_customer_str_rpt_hdl(_adapter *adapter, u8 *data, u8 len);
 int c2h_customer_str_rpt_2_hdl(_adapter *adapter, u8 *data, u8 len);
 #endif /* CONFIG_RTW_CUSTOMER_STR */
 
+#ifdef RTW_PER_CMD_SUPPORT_FW
+/* C2H_PER_RATE_RPT, 0x2c */
+int c2h_per_rate_rpt_hdl(_adapter *adapter, u8 *data, u8 len);
+#endif
+
 #endif /* __COMMON_C2H_H__ */
diff --git a/rtl8723DS/hal/hal_com_phycfg.c b/rtl8723DS/hal/hal_com_phycfg.c
index b18b1d7..e1f5bb6 100755..100644
--- a/rtl8723DS/hal/hal_com_phycfg.c
+++ b/rtl8723DS/hal/hal_com_phycfg.c
@@ -17,19 +17,21 @@
 #include <drv_types.h>
 #include <hal_data.h>
 
+#define PG_TXPWR_1PATH_BYTE_NUM_2G 18
+#define PG_TXPWR_BASE_BYTE_NUM_2G 11
+
+#define PG_TXPWR_1PATH_BYTE_NUM_5G 24
+#define PG_TXPWR_BASE_BYTE_NUM_5G 14
+
 #define PG_TXPWR_MSB_DIFF_S4BIT(_pg_v) (((_pg_v) & 0xf0) >> 4)
 #define PG_TXPWR_LSB_DIFF_S4BIT(_pg_v) ((_pg_v) & 0x0f)
 #define PG_TXPWR_MSB_DIFF_TO_S8BIT(_pg_v) ((PG_TXPWR_MSB_DIFF_S4BIT(_pg_v) & BIT3) ? (PG_TXPWR_MSB_DIFF_S4BIT(_pg_v) | 0xF0) : PG_TXPWR_MSB_DIFF_S4BIT(_pg_v))
 #define PG_TXPWR_LSB_DIFF_TO_S8BIT(_pg_v) ((PG_TXPWR_LSB_DIFF_S4BIT(_pg_v) & BIT3) ? (PG_TXPWR_LSB_DIFF_S4BIT(_pg_v) | 0xF0) : PG_TXPWR_LSB_DIFF_S4BIT(_pg_v))
-#define IS_PG_TXPWR_BASE_INVALID(_base) ((_base) > 63)
+#define IS_PG_TXPWR_BASE_INVALID(hal_spec, _base) ((_base) > hal_spec->txgi_max)
 #define IS_PG_TXPWR_DIFF_INVALID(_diff) ((_diff) > 7 || (_diff) < -8)
 #define PG_TXPWR_INVALID_BASE 255
 #define PG_TXPWR_INVALID_DIFF 8
 
-#if !IS_PG_TXPWR_BASE_INVALID(PG_TXPWR_INVALID_BASE)
-#error "PG_TXPWR_BASE definition has problem"
-#endif
-
 #if !IS_PG_TXPWR_DIFF_INVALID(PG_TXPWR_INVALID_DIFF)
 #error "PG_TXPWR_DIFF definition has problem"
 #endif
@@ -254,6 +256,14 @@ static const struct map_t rtl8188f_pg_txpwr_def_info =
 	);
 #endif
 
+#ifdef CONFIG_RTL8188GTV
+static const struct map_t rtl8188gtv_pg_txpwr_def_info =
+	MAP_ENT(0xB8, 1, 0xFF
+		, MAPSEG_ARRAY_ENT(0x10, 12,
+			0x22, 0x22, 0x22, 0x22, 0x22, 0x22, 0x27, 0x27, 0x27, 0x27, 0x27, 0x24)
+	);
+#endif
+
 #ifdef CONFIG_RTL8723B
 static const struct map_t rtl8723b_pg_txpwr_def_info =
 	MAP_ENT(0xB8, 2, 0xFF
@@ -306,13 +316,21 @@ static const struct map_t rtl8821a_pg_txpwr_def_info =
 static const struct map_t rtl8821c_pg_txpwr_def_info =
 	MAP_ENT(0xB8, 1, 0xFF
 		, MAPSEG_ARRAY_ENT(0x10, 54,
-			0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x02, 0xFF, 0xFF, 0xFF, 0xFF, 
-			0xFF, 0xFF, 0x28, 0x28, 0x28, 0x28, 0x28, 0x28, 0x28, 0x28, 0x28, 0x28, 0x28, 0x28, 0x28, 0x28, 
+			0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x02, 0xFF, 0xFF, 0xFF, 0xFF,
+			0xFF, 0xFF, 0x28, 0x28, 0x28, 0x28, 0x28, 0x28, 0x28, 0x28, 0x28, 0x28, 0x28, 0x28, 0x28, 0x28,
 			0x02, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xEC, 0xFF, 0xFF, 0xFF, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D,
 			0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x02)
 	);
 #endif
 
+#ifdef CONFIG_RTL8710B
+static const struct map_t rtl8710b_pg_txpwr_def_info =
+	MAP_ENT(0xC8, 1, 0xFF
+		, MAPSEG_ARRAY_ENT(0x20, 12,
+			0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x20)
+	);
+#endif
+
 #ifdef CONFIG_RTL8812A
 static const struct map_t rtl8812a_pg_txpwr_def_info =
 	MAP_ENT(0xB8, 1, 0xFF
@@ -357,6 +375,16 @@ static const struct map_t rtl8814a_pg_txpwr_def_info =
 	);
 #endif
 
+#ifdef CONFIG_RTL8192F/*use 8192F default,no document*/
+static const struct map_t rtl8192f_pg_txpwr_def_info =
+	MAP_ENT(0xB8, 2, 0xFF
+		, MAPSEG_ARRAY_ENT(0x10, 14,
+			0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x24, 0xEE, 0xEE)
+		, MAPSEG_ARRAY_ENT(0x3A, 14,
+			0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x24, 0xEE, 0xEE)
+	);
+#endif
+
 const struct map_t *hal_pg_txpwr_def_info(_adapter *adapter)
 {
 	u8 interface_type = 0;
@@ -390,6 +418,11 @@ const struct map_t *hal_pg_txpwr_def_info(_adapter *adapter)
 		map = &rtl8188f_pg_txpwr_def_info;
 		break;
 #endif
+#ifdef CONFIG_RTL8188GTV
+	case RTL8188GTV:
+		map = &rtl8188gtv_pg_txpwr_def_info;
+		break;
+#endif
 #ifdef CONFIG_RTL8812A
 	case RTL8812:
 		map = &rtl8812a_pg_txpwr_def_info;
@@ -420,6 +453,16 @@ const struct map_t *hal_pg_txpwr_def_info(_adapter *adapter)
 		map = &rtl8821c_pg_txpwr_def_info;
 		break;
 #endif
+#ifdef CONFIG_RTL8710B
+	case RTL8710B:
+		map = &rtl8710b_pg_txpwr_def_info;
+		break;
+#endif
+#ifdef CONFIG_RTL8192F
+	case RTL8192F:
+		map = &rtl8192f_pg_txpwr_def_info;
+		break;
+#endif
 	}
 
 	if (map == NULL) {
@@ -443,8 +486,8 @@ static u8 hal_chk_pg_txpwr_info_2g(_adapter *adapter, TxPowerInfo24G *pwr_info)
 		if (!HAL_SPEC_CHK_RF_PATH_2G(hal_spec, path))
 			continue;
 		for (group = 0; group < MAX_CHNL_GROUP_24G; group++) {
-			if (IS_PG_TXPWR_BASE_INVALID(pwr_info->IndexCCK_Base[path][group])
-				|| IS_PG_TXPWR_BASE_INVALID(pwr_info->IndexBW40_Base[path][group]))
+			if (IS_PG_TXPWR_BASE_INVALID(hal_spec, pwr_info->IndexCCK_Base[path][group])
+				|| IS_PG_TXPWR_BASE_INVALID(hal_spec, pwr_info->IndexBW40_Base[path][group]))
 				return _FAIL;
 		}
 		for (tx_idx = 0; tx_idx < MAX_TX_COUNT; tx_idx++) {
@@ -474,7 +517,7 @@ static u8 hal_chk_pg_txpwr_info_5g(_adapter *adapter, TxPowerInfo5G *pwr_info)
 		if (!HAL_SPEC_CHK_RF_PATH_5G(hal_spec, path))
 			continue;
 		for (group = 0; group < MAX_CHNL_GROUP_5G; group++)
-			if (IS_PG_TXPWR_BASE_INVALID(pwr_info->IndexBW40_Base[path][group]))
+			if (IS_PG_TXPWR_BASE_INVALID(hal_spec, pwr_info->IndexBW40_Base[path][group]))
 				return _FAIL;
 		for (tx_idx = 0; tx_idx < MAX_TX_COUNT; tx_idx++) {
 			if (!HAL_SPEC_CHK_TX_CNT(hal_spec, tx_idx))
@@ -575,8 +618,6 @@ u16 hal_load_pg_txpwr_info_path_2g(
 	const struct map_t *txpwr_map,
 	u16 pg_offset)
 {
-#define PG_TXPWR_1PATH_BYTE_NUM_2G 18
-
 	struct hal_spec_t *hal_spec = GET_HAL_SPEC(adapter);
 	u16 offset = pg_offset;
 	u8 group, tx_idx;
@@ -595,8 +636,8 @@ u16 hal_load_pg_txpwr_info_path_2g(
 	for (group = 0; group < MAX_CHNL_GROUP_24G; group++) {
 		if (HAL_SPEC_CHK_RF_PATH_2G(hal_spec, path)) {
 			tmp_base = map_read8(txpwr_map, offset);
-			if (!IS_PG_TXPWR_BASE_INVALID(tmp_base)
-				&& IS_PG_TXPWR_BASE_INVALID(pwr_info->IndexCCK_Base[path][group])
+			if (!IS_PG_TXPWR_BASE_INVALID(hal_spec, tmp_base)
+				&& IS_PG_TXPWR_BASE_INVALID(hal_spec, pwr_info->IndexCCK_Base[path][group])
 			) {
 				pwr_info->IndexCCK_Base[path][group] = tmp_base;
 				if (LOAD_PG_TXPWR_WARN_COND(txpwr_src))
@@ -609,8 +650,8 @@ u16 hal_load_pg_txpwr_info_path_2g(
 	for (group = 0; group < MAX_CHNL_GROUP_24G - 1; group++) {
 		if (HAL_SPEC_CHK_RF_PATH_2G(hal_spec, path)) {
 			tmp_base = map_read8(txpwr_map, offset);
-			if (!IS_PG_TXPWR_BASE_INVALID(tmp_base)
-				&& IS_PG_TXPWR_BASE_INVALID(pwr_info->IndexBW40_Base[path][group])
+			if (!IS_PG_TXPWR_BASE_INVALID(hal_spec, tmp_base)
+				&& IS_PG_TXPWR_BASE_INVALID(hal_spec, pwr_info->IndexBW40_Base[path][group])
 			) {
 				pwr_info->IndexBW40_Base[path][group] =	tmp_base;
 				if (LOAD_PG_TXPWR_WARN_COND(txpwr_src))
@@ -693,7 +734,7 @@ u16 hal_load_pg_txpwr_info_path_2g(
 		rtw_warn_on(1);
 	}
 
-exit:	
+exit:
 	return offset;
 }
 
@@ -705,8 +746,6 @@ u16 hal_load_pg_txpwr_info_path_5g(
 	const struct map_t *txpwr_map,
 	u16 pg_offset)
 {
-#define PG_TXPWR_1PATH_BYTE_NUM_5G 24
-
 	struct hal_spec_t *hal_spec = GET_HAL_SPEC(adapter);
 	u16 offset = pg_offset;
 	u8 group, tx_idx;
@@ -721,7 +760,7 @@ u16 hal_load_pg_txpwr_info_path_5g(
 		offset += PG_TXPWR_1PATH_BYTE_NUM_5G;
 		goto exit;
 	}
-	
+
 #ifdef CONFIG_IEEE80211_BAND_5GHZ
 	if (DBG_PG_TXPWR_READ)
 		RTW_INFO("%s[%c] eaddr:0x%03x\n", __func__, rf_path_char(path), offset);
@@ -729,8 +768,8 @@ u16 hal_load_pg_txpwr_info_path_5g(
 	for (group = 0; group < MAX_CHNL_GROUP_5G; group++) {
 		if (HAL_SPEC_CHK_RF_PATH_5G(hal_spec, path)) {
 			tmp_base = map_read8(txpwr_map, offset);
-			if (!IS_PG_TXPWR_BASE_INVALID(tmp_base)
-				&& IS_PG_TXPWR_BASE_INVALID(pwr_info->IndexBW40_Base[path][group])
+			if (!IS_PG_TXPWR_BASE_INVALID(hal_spec, tmp_base)
+				&& IS_PG_TXPWR_BASE_INVALID(hal_spec, pwr_info->IndexBW40_Base[path][group])
 			) {
 				pwr_info->IndexBW40_Base[path][group] = tmp_base;
 				if (LOAD_PG_TXPWR_WARN_COND(txpwr_src))
@@ -784,7 +823,7 @@ u16 hal_load_pg_txpwr_info_path_5g(
 			}
 			offset++;
 		}
-	}	
+	}
 
 	/* OFDM diff 2T ~ 3T */
 	if (HAL_SPEC_CHK_RF_PATH_5G(hal_spec, path) && HAL_SPEC_CHK_TX_CNT(hal_spec, 1)) {
@@ -878,7 +917,7 @@ void hal_load_pg_txpwr_info(
 	hal_init_pg_txpwr_info_5g(adapter, pwr_info_5g);
 
 select_src:
-	pg_offset = 0x10;
+	pg_offset = hal_spec->pg_txpwr_saddr;
 
 	switch (txpwr_src) {
 	case PG_TXPWR_SRC_PG_DATA:
@@ -927,6 +966,79 @@ exit:
 	return;
 }
 
+#ifdef CONFIG_EFUSE_CONFIG_FILE
+
+#define EFUSE_POWER_INDEX_INVALID 0xFF
+
+static u8 _check_phy_efuse_tx_power_info_valid(u8 *pg_data, int base_len, u16 pg_offset)
+{
+	int ff_cnt = 0;
+	int i;
+
+	for (i = 0; i < base_len; i++) {
+		if (*(pg_data + pg_offset + i) == 0xFF)
+			ff_cnt++;
+	}
+
+	if (ff_cnt == 0)
+		return _TRUE;
+	else if (ff_cnt == base_len)
+		return _FALSE;
+	else
+		return EFUSE_POWER_INDEX_INVALID;
+}
+
+int check_phy_efuse_tx_power_info_valid(_adapter *adapter)
+{
+	struct hal_spec_t *hal_spec = GET_HAL_SPEC(adapter);
+	HAL_DATA_TYPE *hal_data = GET_HAL_DATA(adapter);
+	u8 *pg_data = hal_data->efuse_eeprom_data;
+	u16 pg_offset = hal_spec->pg_txpwr_saddr;
+	u8 path;
+	u8 valid_2g_path_bmp = 0;
+#ifdef CONFIG_IEEE80211_BAND_5GHZ
+	u8 valid_5g_path_bmp = 0;
+#endif
+	int result = _FALSE;
+
+	for (path = 0; path < MAX_RF_PATH; path++) {
+		u8 ret = _FALSE;
+
+		if (!HAL_SPEC_CHK_RF_PATH_2G(hal_spec, path) && !HAL_SPEC_CHK_RF_PATH_5G(hal_spec, path))
+			break;
+
+		if (HAL_SPEC_CHK_RF_PATH_2G(hal_spec, path)) {
+			ret = _check_phy_efuse_tx_power_info_valid(pg_data, PG_TXPWR_BASE_BYTE_NUM_2G, pg_offset);
+			if (ret == _TRUE)
+				valid_2g_path_bmp |= BIT(path);
+			else if (ret == EFUSE_POWER_INDEX_INVALID)
+				return _FALSE;
+		}
+		pg_offset += PG_TXPWR_1PATH_BYTE_NUM_2G;
+
+		#ifdef CONFIG_IEEE80211_BAND_5GHZ
+		if (HAL_SPEC_CHK_RF_PATH_5G(hal_spec, path)) {
+			ret = _check_phy_efuse_tx_power_info_valid(pg_data, PG_TXPWR_BASE_BYTE_NUM_5G, pg_offset);
+			if (ret == _TRUE)
+				valid_5g_path_bmp |= BIT(path);
+			else if (ret == EFUSE_POWER_INDEX_INVALID)
+				return _FALSE;
+		}
+		#endif
+		pg_offset += PG_TXPWR_1PATH_BYTE_NUM_5G;
+	}
+
+	if ((hal_chk_band_cap(adapter, BAND_CAP_2G) && valid_2g_path_bmp)
+		#ifdef CONFIG_IEEE80211_BAND_5GHZ
+		|| (hal_chk_band_cap(adapter, BAND_CAP_5G) && valid_5g_path_bmp)
+		#endif
+	)
+		return _TRUE;
+
+	return _FALSE;
+}
+#endif /* CONFIG_EFUSE_CONFIG_FILE */
+
 void hal_load_txpwr_info(
 	_adapter *adapter,
 	TxPowerInfo24G *pwr_info_2g,
@@ -964,10 +1076,10 @@ void hal_load_txpwr_info(
 			if (tx_idx >= max_tx_cnt)
 				break;
 
-			hal_data->CCK_24G_Diff[rfpath][tx_idx] = pwr_info_2g->CCK_Diff[rfpath][tx_idx];
-			hal_data->OFDM_24G_Diff[rfpath][tx_idx] = pwr_info_2g->OFDM_Diff[rfpath][tx_idx];
-			hal_data->BW20_24G_Diff[rfpath][tx_idx] = pwr_info_2g->BW20_Diff[rfpath][tx_idx];
-			hal_data->BW40_24G_Diff[rfpath][tx_idx] = pwr_info_2g->BW40_Diff[rfpath][tx_idx];
+			hal_data->CCK_24G_Diff[rfpath][tx_idx] = pwr_info_2g->CCK_Diff[rfpath][tx_idx] * hal_spec->pg_txgi_diff_factor;
+			hal_data->OFDM_24G_Diff[rfpath][tx_idx] = pwr_info_2g->OFDM_Diff[rfpath][tx_idx] * hal_spec->pg_txgi_diff_factor;
+			hal_data->BW20_24G_Diff[rfpath][tx_idx] = pwr_info_2g->BW20_Diff[rfpath][tx_idx] * hal_spec->pg_txgi_diff_factor;
+			hal_data->BW40_24G_Diff[rfpath][tx_idx] = pwr_info_2g->BW40_Diff[rfpath][tx_idx] * hal_spec->pg_txgi_diff_factor;
 		}
 bypass_2g:
 		;
@@ -999,10 +1111,10 @@ bypass_2g:
 			if (tx_idx >= max_tx_cnt)
 				break;
 
-			hal_data->OFDM_5G_Diff[rfpath][tx_idx] = pwr_info_5g->OFDM_Diff[rfpath][tx_idx];
-			hal_data->BW20_5G_Diff[rfpath][tx_idx] = pwr_info_5g->BW20_Diff[rfpath][tx_idx];
-			hal_data->BW40_5G_Diff[rfpath][tx_idx] = pwr_info_5g->BW40_Diff[rfpath][tx_idx];
-			hal_data->BW80_5G_Diff[rfpath][tx_idx] = pwr_info_5g->BW80_Diff[rfpath][tx_idx];
+			hal_data->OFDM_5G_Diff[rfpath][tx_idx] = pwr_info_5g->OFDM_Diff[rfpath][tx_idx] * hal_spec->pg_txgi_diff_factor;
+			hal_data->BW20_5G_Diff[rfpath][tx_idx] = pwr_info_5g->BW20_Diff[rfpath][tx_idx] * hal_spec->pg_txgi_diff_factor;
+			hal_data->BW40_5G_Diff[rfpath][tx_idx] = pwr_info_5g->BW40_Diff[rfpath][tx_idx] * hal_spec->pg_txgi_diff_factor;
+			hal_data->BW80_5G_Diff[rfpath][tx_idx] = pwr_info_5g->BW80_Diff[rfpath][tx_idx] * hal_spec->pg_txgi_diff_factor;
 		}
 bypass_5g:
 		;
@@ -1290,7 +1402,7 @@ bool rtw_regsty_chk_target_tx_power_valid(_adapter *adapter)
 /*
 * PHY_GetTxPowerByRateBase -
 *
-* Return 2 times of dBm
+* Return value in unit of TX Gain Index
 */
 u8
 PHY_GetTxPowerByRateBase(
@@ -1489,7 +1601,7 @@ phy_StoreTxPowerByRateBase(
 					continue;
 
 				if (regsty->target_tx_pwr_valid == _TRUE)
-					base = 2 * rtw_regsty_get_target_tx_power(pAdapter, band, path, rs);
+					base = hal_spec->txgi_pdbm * rtw_regsty_get_target_tx_power(pAdapter, band, path, rs);
 				else
 					base = _PHY_GetTxPowerByRate(pAdapter, band, path, rate_sec_base[rs]);
 				phy_SetTxPowerByRateBase(pAdapter, band, path, rs, base);
@@ -1498,6 +1610,16 @@ phy_StoreTxPowerByRateBase(
 	}
 }
 
+static u8 get_val_from_dhex(u32 dhex, u8 i)
+{
+	return (((dhex >> (i * 8 + 4)) & 0xF)) * 10 + ((dhex >> (i * 8)) & 0xF);
+}
+
+static u8 get_val_from_hex(u32 hex, u8 i)
+{
+	return (hex >> (i * 8)) & 0xFF;
+}
+
 VOID
 PHY_GetRateValuesOfTxPowerByRate(
 	IN	PADAPTER pAdapter,
@@ -1510,8 +1632,15 @@ PHY_GetRateValuesOfTxPowerByRate(
 )
 {
 	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(pAdapter);
-	struct PHY_DM_STRUCT		*pDM_Odm = &pHalData->odmpriv;
+	struct hal_spec_t *hal_spec = GET_HAL_SPEC(pAdapter);
+	struct dm_struct		*pDM_Odm = &pHalData->odmpriv;
 	u8				index = 0, i = 0;
+	u8 (*get_val)(u32, u8);
+
+	if (pDM_Odm->phy_reg_pg_version == 1)
+		get_val = get_val_from_dhex;
+	else
+		get_val = get_val_from_hex;
 
 	switch (RegAddr) {
 	case rTxAGC_A_Rate18_06:
@@ -1520,10 +1649,8 @@ PHY_GetRateValuesOfTxPowerByRate(
 		Rate[1] = MGN_9M;
 		Rate[2] = MGN_12M;
 		Rate[3] = MGN_18M;
-		for (i = 0; i < 4; ++i) {
-			PwrByRateVal[i] = (s8)((((Value >> (i * 8 + 4)) & 0xF)) * 10 +
-					       ((Value >> (i * 8)) & 0xF));
-		}
+		for (i = 0; i < 4; ++i)
+			PwrByRateVal[i] = (s8)get_val(Value, i);
 		*RateNum = 4;
 		break;
 
@@ -1533,17 +1660,14 @@ PHY_GetRateValuesOfTxPowerByRate(
 		Rate[1] = MGN_36M;
 		Rate[2] = MGN_48M;
 		Rate[3] = MGN_54M;
-		for (i = 0; i < 4; ++i) {
-			PwrByRateVal[i] = (s8)((((Value >> (i * 8 + 4)) & 0xF)) * 10 +
-					       ((Value >> (i * 8)) & 0xF));
-		}
+		for (i = 0; i < 4; ++i)
+			PwrByRateVal[i] = (s8)get_val(Value, i);
 		*RateNum = 4;
 		break;
 
 	case rTxAGC_A_CCK1_Mcs32:
 		Rate[0] = MGN_1M;
-		PwrByRateVal[0] = (s8)((((Value >> (8 + 4)) & 0xF)) * 10 +
-				       ((Value >> 8) & 0xF));
+		PwrByRateVal[0] = (s8)get_val(Value, 1);
 		*RateNum = 1;
 		break;
 
@@ -1552,15 +1676,12 @@ PHY_GetRateValuesOfTxPowerByRate(
 			Rate[0] = MGN_2M;
 			Rate[1] = MGN_5_5M;
 			Rate[2] = MGN_11M;
-			for (i = 1; i < 4; ++i) {
-				PwrByRateVal[i - 1] = (s8)((((Value >> (i * 8 + 4)) & 0xF)) * 10 +
-						   ((Value >> (i * 8)) & 0xF));
-			}
+			for (i = 1; i < 4; ++i)
+				PwrByRateVal[i - 1] = (s8)get_val(Value, i);
 			*RateNum = 3;
 		} else if (BitMask == 0x000000ff) {
 			Rate[0] = MGN_11M;
-			PwrByRateVal[0] = (s8)((((Value >> 4) & 0xF)) * 10 +
-					       (Value & 0xF));
+			PwrByRateVal[0] = (s8)get_val(Value, 0);
 			*RateNum = 1;
 		}
 		break;
@@ -1571,10 +1692,8 @@ PHY_GetRateValuesOfTxPowerByRate(
 		Rate[1] = MGN_MCS1;
 		Rate[2] = MGN_MCS2;
 		Rate[3] = MGN_MCS3;
-		for (i = 0; i < 4; ++i) {
-			PwrByRateVal[i] = (s8)((((Value >> (i * 8 + 4)) & 0xF)) * 10 +
-					       ((Value >> (i * 8)) & 0xF));
-		}
+		for (i = 0; i < 4; ++i)
+			PwrByRateVal[i] = (s8)get_val(Value, i);
 		*RateNum = 4;
 		break;
 
@@ -1584,10 +1703,8 @@ PHY_GetRateValuesOfTxPowerByRate(
 		Rate[1] = MGN_MCS5;
 		Rate[2] = MGN_MCS6;
 		Rate[3] = MGN_MCS7;
-		for (i = 0; i < 4; ++i) {
-			PwrByRateVal[i] = (s8)((((Value >> (i * 8 + 4)) & 0xF)) * 10 +
-					       ((Value >> (i * 8)) & 0xF));
-		}
+		for (i = 0; i < 4; ++i)
+			PwrByRateVal[i] = (s8)get_val(Value, i);
 		*RateNum = 4;
 		break;
 
@@ -1597,10 +1714,8 @@ PHY_GetRateValuesOfTxPowerByRate(
 		Rate[1] = MGN_MCS9;
 		Rate[2] = MGN_MCS10;
 		Rate[3] = MGN_MCS11;
-		for (i = 0; i < 4; ++i) {
-			PwrByRateVal[i] = (s8)((((Value >> (i * 8 + 4)) & 0xF)) * 10 +
-					       ((Value >> (i * 8)) & 0xF));
-		}
+		for (i = 0; i < 4; ++i)
+			PwrByRateVal[i] = (s8)get_val(Value, i);
 		*RateNum = 4;
 		break;
 
@@ -1610,22 +1725,17 @@ PHY_GetRateValuesOfTxPowerByRate(
 		Rate[1] = MGN_MCS13;
 		Rate[2] = MGN_MCS14;
 		Rate[3] = MGN_MCS15;
-		for (i = 0; i < 4; ++i) {
-			PwrByRateVal[i] = (s8)((((Value >> (i * 8 + 4)) & 0xF)) * 10 +
-					       ((Value >> (i * 8)) & 0xF));
-		}
+		for (i = 0; i < 4; ++i)
+			PwrByRateVal[i] = (s8)get_val(Value, i);
 		*RateNum = 4;
-
 		break;
 
 	case rTxAGC_B_CCK1_55_Mcs32:
 		Rate[0] = MGN_1M;
 		Rate[1] = MGN_2M;
 		Rate[2] = MGN_5_5M;
-		for (i = 1; i < 4; ++i) {
-			PwrByRateVal[i - 1] = (s8)((((Value >> (i * 8 + 4)) & 0xF)) * 10 +
-						   ((Value >> (i * 8)) & 0xF));
-		}
+		for (i = 1; i < 4; ++i)
+			PwrByRateVal[i - 1] = (s8)get_val(Value, i);
 		*RateNum = 3;
 		break;
 
@@ -1637,10 +1747,8 @@ PHY_GetRateValuesOfTxPowerByRate(
 		Rate[1] = MGN_2M;
 		Rate[2] = MGN_5_5M;
 		Rate[3] = MGN_11M;
-		for (i = 0; i < 4; ++i) {
-			PwrByRateVal[i] = (s8)((((Value >> (i * 8 + 4)) & 0xF)) * 10 +
-					       ((Value >> (i * 8)) & 0xF));
-		}
+		for (i = 0; i < 4; ++i)
+			PwrByRateVal[i] = (s8)get_val(Value, i);
 		*RateNum = 4;
 		break;
 
@@ -1652,10 +1760,8 @@ PHY_GetRateValuesOfTxPowerByRate(
 		Rate[1] = MGN_9M;
 		Rate[2] = MGN_12M;
 		Rate[3] = MGN_18M;
-		for (i = 0; i < 4; ++i) {
-			PwrByRateVal[i] = (s8)((((Value >> (i * 8 + 4)) & 0xF)) * 10 +
-					       ((Value >> (i * 8)) & 0xF));
-		}
+		for (i = 0; i < 4; ++i)
+			PwrByRateVal[i] = (s8)get_val(Value, i);
 		*RateNum = 4;
 		break;
 
@@ -1667,10 +1773,8 @@ PHY_GetRateValuesOfTxPowerByRate(
 		Rate[1] = MGN_36M;
 		Rate[2] = MGN_48M;
 		Rate[3] = MGN_54M;
-		for (i = 0; i < 4; ++i) {
-			PwrByRateVal[i] = (s8)((((Value >> (i * 8 + 4)) & 0xF)) * 10 +
-					       ((Value >> (i * 8)) & 0xF));
-		}
+		for (i = 0; i < 4; ++i)
+			PwrByRateVal[i] = (s8)get_val(Value, i);
 		*RateNum = 4;
 		break;
 
@@ -1682,10 +1786,8 @@ PHY_GetRateValuesOfTxPowerByRate(
 		Rate[1] = MGN_MCS1;
 		Rate[2] = MGN_MCS2;
 		Rate[3] = MGN_MCS3;
-		for (i = 0; i < 4; ++i) {
-			PwrByRateVal[i] = (s8)((((Value >> (i * 8 + 4)) & 0xF)) * 10 +
-					       ((Value >> (i * 8)) & 0xF));
-		}
+		for (i = 0; i < 4; ++i)
+			PwrByRateVal[i] = (s8)get_val(Value, i);
 		*RateNum = 4;
 		break;
 
@@ -1697,10 +1799,8 @@ PHY_GetRateValuesOfTxPowerByRate(
 		Rate[1] = MGN_MCS5;
 		Rate[2] = MGN_MCS6;
 		Rate[3] = MGN_MCS7;
-		for (i = 0; i < 4; ++i) {
-			PwrByRateVal[i] = (s8)((((Value >> (i * 8 + 4)) & 0xF)) * 10 +
-					       ((Value >> (i * 8)) & 0xF));
-		}
+		for (i = 0; i < 4; ++i)
+			PwrByRateVal[i] = (s8)get_val(Value, i);
 		*RateNum = 4;
 		break;
 
@@ -1712,10 +1812,8 @@ PHY_GetRateValuesOfTxPowerByRate(
 		Rate[1] = MGN_MCS9;
 		Rate[2] = MGN_MCS10;
 		Rate[3] = MGN_MCS11;
-		for (i = 0; i < 4; ++i) {
-			PwrByRateVal[i] = (s8)((((Value >> (i * 8 + 4)) & 0xF)) * 10 +
-					       ((Value >> (i * 8)) & 0xF));
-		}
+		for (i = 0; i < 4; ++i)
+			PwrByRateVal[i] = (s8)get_val(Value, i);
 		*RateNum = 4;
 		break;
 
@@ -1727,10 +1825,8 @@ PHY_GetRateValuesOfTxPowerByRate(
 		Rate[1] = MGN_MCS13;
 		Rate[2] = MGN_MCS14;
 		Rate[3] = MGN_MCS15;
-		for (i = 0; i < 4; ++i) {
-			PwrByRateVal[i] = (s8)((((Value >> (i * 8 + 4)) & 0xF)) * 10 +
-					       ((Value >> (i * 8)) & 0xF));
-		}
+		for (i = 0; i < 4; ++i)
+			PwrByRateVal[i] = (s8)get_val(Value, i);
 		*RateNum = 4;
 		break;
 
@@ -1742,10 +1838,8 @@ PHY_GetRateValuesOfTxPowerByRate(
 		Rate[1] = MGN_VHT1SS_MCS1;
 		Rate[2] = MGN_VHT1SS_MCS2;
 		Rate[3] = MGN_VHT1SS_MCS3;
-		for (i = 0; i < 4; ++i) {
-			PwrByRateVal[i] = (s8)((((Value >> (i * 8 + 4)) & 0xF)) * 10 +
-					       ((Value >> (i * 8)) & 0xF));
-		}
+		for (i = 0; i < 4; ++i)
+			PwrByRateVal[i] = (s8)get_val(Value, i);
 		*RateNum = 4;
 		break;
 
@@ -1757,10 +1851,8 @@ PHY_GetRateValuesOfTxPowerByRate(
 		Rate[1] = MGN_VHT1SS_MCS5;
 		Rate[2] = MGN_VHT1SS_MCS6;
 		Rate[3] = MGN_VHT1SS_MCS7;
-		for (i = 0; i < 4; ++i) {
-			PwrByRateVal[i] = (s8)((((Value >> (i * 8 + 4)) & 0xF)) * 10 +
-					       ((Value >> (i * 8)) & 0xF));
-		}
+		for (i = 0; i < 4; ++i)
+			PwrByRateVal[i] = (s8)get_val(Value, i);
 		*RateNum = 4;
 		break;
 
@@ -1772,10 +1864,8 @@ PHY_GetRateValuesOfTxPowerByRate(
 		Rate[1] = MGN_VHT1SS_MCS9;
 		Rate[2] = MGN_VHT2SS_MCS0;
 		Rate[3] = MGN_VHT2SS_MCS1;
-		for (i = 0; i < 4; ++i) {
-			PwrByRateVal[i] = (s8)((((Value >> (i * 8 + 4)) & 0xF)) * 10 +
-					       ((Value >> (i * 8)) & 0xF));
-		}
+		for (i = 0; i < 4; ++i)
+			PwrByRateVal[i] = (s8)get_val(Value, i);
 		*RateNum = 4;
 		break;
 
@@ -1787,10 +1877,8 @@ PHY_GetRateValuesOfTxPowerByRate(
 		Rate[1] = MGN_VHT2SS_MCS3;
 		Rate[2] = MGN_VHT2SS_MCS4;
 		Rate[3] = MGN_VHT2SS_MCS5;
-		for (i = 0; i < 4; ++i) {
-			PwrByRateVal[i] = (s8)((((Value >> (i * 8 + 4)) & 0xF)) * 10 +
-					       ((Value >> (i * 8)) & 0xF));
-		}
+		for (i = 0; i < 4; ++i)
+			PwrByRateVal[i] = (s8)get_val(Value, i);
 		*RateNum = 4;
 		break;
 
@@ -1802,10 +1890,8 @@ PHY_GetRateValuesOfTxPowerByRate(
 		Rate[1] = MGN_VHT2SS_MCS7;
 		Rate[2] = MGN_VHT2SS_MCS8;
 		Rate[3] = MGN_VHT2SS_MCS9;
-		for (i = 0; i < 4; ++i) {
-			PwrByRateVal[i] = (s8)((((Value >> (i * 8 + 4)) & 0xF)) * 10 +
-					       ((Value >> (i * 8)) & 0xF));
-		}
+		for (i = 0; i < 4; ++i)
+			PwrByRateVal[i] = (s8)get_val(Value, i);
 		*RateNum = 4;
 		break;
 
@@ -1817,10 +1903,8 @@ PHY_GetRateValuesOfTxPowerByRate(
 		Rate[1] = MGN_MCS17;
 		Rate[2] = MGN_MCS18;
 		Rate[3] = MGN_MCS19;
-		for (i = 0; i < 4; ++i) {
-			PwrByRateVal[i] = (s8)((((Value >> (i * 8 + 4)) & 0xF)) * 10 +
-					       ((Value >> (i * 8)) & 0xF));
-		}
+		for (i = 0; i < 4; ++i)
+			PwrByRateVal[i] = (s8)get_val(Value, i);
 		*RateNum = 4;
 		break;
 
@@ -1832,10 +1916,8 @@ PHY_GetRateValuesOfTxPowerByRate(
 		Rate[1] = MGN_MCS21;
 		Rate[2] = MGN_MCS22;
 		Rate[3] = MGN_MCS23;
-		for (i = 0; i < 4; ++i) {
-			PwrByRateVal[i] = (s8)((((Value >> (i * 8 + 4)) & 0xF)) * 10 +
-					       ((Value >> (i * 8)) & 0xF));
-		}
+		for (i = 0; i < 4; ++i)
+			PwrByRateVal[i] = (s8)get_val(Value, i);
 		*RateNum = 4;
 		break;
 
@@ -1847,10 +1929,8 @@ PHY_GetRateValuesOfTxPowerByRate(
 		Rate[1] = MGN_VHT3SS_MCS1;
 		Rate[2] = MGN_VHT3SS_MCS2;
 		Rate[3] = MGN_VHT3SS_MCS3;
-		for (i = 0; i < 4; ++i) {
-			PwrByRateVal[i] = (s8)((((Value >> (i * 8 + 4)) & 0xF)) * 10 +
-					       ((Value >> (i * 8)) & 0xF));
-		}
+		for (i = 0; i < 4; ++i)
+			PwrByRateVal[i] = (s8)get_val(Value, i);
 		*RateNum = 4;
 		break;
 
@@ -1862,10 +1942,8 @@ PHY_GetRateValuesOfTxPowerByRate(
 		Rate[1] = MGN_VHT3SS_MCS5;
 		Rate[2] = MGN_VHT3SS_MCS6;
 		Rate[3] = MGN_VHT3SS_MCS7;
-		for (i = 0; i < 4; ++i) {
-			PwrByRateVal[i] = (s8)((((Value >> (i * 8 + 4)) & 0xF)) * 10 +
-					       ((Value >> (i * 8)) & 0xF));
-		}
+		for (i = 0; i < 4; ++i)
+			PwrByRateVal[i] = (s8)get_val(Value, i);
 		*RateNum = 4;
 		break;
 
@@ -1875,10 +1953,8 @@ PHY_GetRateValuesOfTxPowerByRate(
 	case 0x1aE8:
 		Rate[0] = MGN_VHT3SS_MCS8;
 		Rate[1] = MGN_VHT3SS_MCS9;
-		for (i = 0; i < 2; ++i) {
-			PwrByRateVal[i] = (s8)((((Value >> (i * 8 + 4)) & 0xF)) * 10 +
-					       ((Value >> (i * 8)) & 0xF));
-		}
+		for (i = 0; i < 2; ++i)
+			PwrByRateVal[i] = (s8)get_val(Value, i);
 		*RateNum = 2;
 		break;
 
@@ -1947,7 +2023,7 @@ phy_store_tx_power_by_rate(
 )
 {
 	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(pAdapter);
-	struct PHY_DM_STRUCT		*pDM_Odm = &pHalData->odmpriv;
+	struct dm_struct		*pDM_Odm = &pHalData->odmpriv;
 
 	if (pDM_Odm->phy_reg_pg_version > 0)
 		PHY_StoreTxPowerByRateNew(pAdapter, Band, RfPath, RegAddr, BitMask, Data);
@@ -2124,7 +2200,7 @@ PHY_GetTxPowerIndexBase(
 )
 {
 	PHAL_DATA_TYPE		pHalData = GET_HAL_DATA(pAdapter);
-	struct PHY_DM_STRUCT			*pDM_Odm = &pHalData->odmpriv;
+	struct dm_struct			*pDM_Odm = &pHalData->odmpriv;
 	u8					i = 0;	/* default set to 1S */
 	u8					txPower = 0;
 	u8					chnlIdx = (Channel - 1);
@@ -2263,7 +2339,10 @@ PHY_GetTxPowerIndexBase(
 				}
 			}
 			if (i >= CENTER_CH_5G_80M_NUM) {
-				rtw_warn_on(1);
+			#ifdef CONFIG_MP_INCLUDED
+				if (rtw_mp_mode_check(pAdapter) == _FALSE)
+			#endif
+					rtw_warn_on(1);
 				txPower = 0;
 				goto exit;
 			}
@@ -2298,7 +2377,7 @@ PHY_GetTxPowerTrackingOffset(
 )
 {
 	PHAL_DATA_TYPE		pHalData = GET_HAL_DATA(pAdapter);
-	struct PHY_DM_STRUCT			*pDM_Odm = &pHalData->odmpriv;
+	struct dm_struct			*pDM_Odm = &pHalData->odmpriv;
 	s8	offset = 0;
 
 	if (pDM_Odm->rf_calibrate_info.txpowertrack_control  == _FALSE)
@@ -2658,6 +2737,34 @@ PHY_SetTxPowerByRate(
 	pHalData->TxPwrByRateOffset[Band][RFPath][rateIndex] = Value;
 }
 
+u8 phy_check_under_survey_ch(_adapter *adapter)
+{
+	struct dvobj_priv *dvobj = adapter_to_dvobj(adapter);
+	_adapter *iface;
+	struct mlme_ext_priv *mlmeext;
+	u8 ret = _FALSE;
+	int i;
+
+	for (i = 0; i < dvobj->iface_nums; i++) {
+		iface = dvobj->padapters[i];
+		if (!iface)
+			continue;
+		mlmeext = &iface->mlmeextpriv;
+
+		/* check scan state */
+		if (mlmeext_scan_state(mlmeext) != SCAN_DISABLE
+			&& mlmeext_scan_state(mlmeext) != SCAN_COMPLETE
+				&& mlmeext_scan_state(mlmeext) != SCAN_BACKING_OP) {
+			ret = _TRUE;
+		} else if (mlmeext_scan_state(mlmeext) == SCAN_BACKING_OP
+			&& !mlmeext_chk_scan_backop_flags(mlmeext, SS_BACKOP_TX_RESUME)) {
+			ret = _TRUE;
+		}
+	}
+
+	return ret;
+}
+
 VOID
 phy_set_tx_power_level_by_path(
 	IN	PADAPTER	Adapter,
@@ -2667,6 +2774,8 @@ phy_set_tx_power_level_by_path(
 {
 	PHAL_DATA_TYPE	pHalData = GET_HAL_DATA(Adapter);
 	BOOLEAN bIsIn24G = (pHalData->current_band_type == BAND_ON_2_4G);
+	u8 under_survey_ch = phy_check_under_survey_ch(Adapter);
+
 
 	/* if ( pMgntInfo->RegNByteAccess == 0 ) */
 	{
@@ -2674,20 +2783,23 @@ phy_set_tx_power_level_by_path(
 			phy_set_tx_power_index_by_rate_section(Adapter, path, channel, CCK);
 
 		phy_set_tx_power_index_by_rate_section(Adapter, path, channel, OFDM);
-		phy_set_tx_power_index_by_rate_section(Adapter, path, channel, HT_MCS0_MCS7);
-
-		if (IS_HARDWARE_TYPE_JAGUAR(Adapter) || IS_HARDWARE_TYPE_8814A(Adapter))
-			phy_set_tx_power_index_by_rate_section(Adapter, path, channel, VHT_1SSMCS0_1SSMCS9);
 
-		if (pHalData->NumTotalRFPath >= 2) {
-			phy_set_tx_power_index_by_rate_section(Adapter, path, channel, HT_MCS8_MCS15);
+		if (!under_survey_ch) {
+			phy_set_tx_power_index_by_rate_section(Adapter, path, channel, HT_MCS0_MCS7);
 
 			if (IS_HARDWARE_TYPE_JAGUAR(Adapter) || IS_HARDWARE_TYPE_8814A(Adapter))
-				phy_set_tx_power_index_by_rate_section(Adapter, path, channel, VHT_2SSMCS0_2SSMCS9);
+				phy_set_tx_power_index_by_rate_section(Adapter, path, channel, VHT_1SSMCS0_1SSMCS9);
 
-			if (IS_HARDWARE_TYPE_8814A(Adapter)) {
-				phy_set_tx_power_index_by_rate_section(Adapter, path, channel, HT_MCS16_MCS23);
-				phy_set_tx_power_index_by_rate_section(Adapter, path, channel, VHT_3SSMCS0_3SSMCS9);
+			if (pHalData->NumTotalRFPath >= 2) {
+				phy_set_tx_power_index_by_rate_section(Adapter, path, channel, HT_MCS8_MCS15);
+
+				if (IS_HARDWARE_TYPE_JAGUAR(Adapter) || IS_HARDWARE_TYPE_8814A(Adapter))
+					phy_set_tx_power_index_by_rate_section(Adapter, path, channel, VHT_2SSMCS0_2SSMCS9);
+
+				if (IS_HARDWARE_TYPE_8814A(Adapter)) {
+					phy_set_tx_power_index_by_rate_section(Adapter, path, channel, HT_MCS16_MCS23);
+					phy_set_tx_power_index_by_rate_section(Adapter, path, channel, VHT_3SSMCS0_3SSMCS9);
+				}
 			}
 		}
 	}
@@ -2759,9 +2871,22 @@ phy_GetChannelIndexOfTxPowerLimit(
 	return channelIndex;
 }
 
+static s8 phy_txpwr_ww_lmt_value(_adapter *adapter)
+{
+	struct hal_spec_t *hal_spec = GET_HAL_SPEC(adapter);
+
+	if (hal_spec->txgi_max == 63)
+		return -63;
+	else if (hal_spec->txgi_max == 127)
+		return -128;
+
+	rtw_warn_on(1);
+	return -128;
+}
+
 /*
 * return txpwr limit absolute value
-* MAX_POWER_INDEX is returned when NO limit
+* hsl_spec->txgi_max is returned when NO limit
 */
 s8 phy_get_txpwr_lmt_abs(
 	IN	PADAPTER			Adapter,
@@ -2777,12 +2902,14 @@ s8 phy_get_txpwr_lmt_abs(
 	struct dvobj_priv *dvobj = adapter_to_dvobj(Adapter);
 	struct rf_ctl_t *rfctl = adapter_to_rfctl(Adapter);
 	HAL_DATA_TYPE *hal_data = GET_HAL_DATA(Adapter);
+	struct hal_spec_t *hal_spec = GET_HAL_SPEC(Adapter);
 	struct txpwr_lmt_ent *ent = NULL;
 	_irqL irqL;
 	_list *cur, *head;
 	s8 ch_idx;
 	u8 is_ww_regd = 0;
-	s8 lmt = MAX_POWER_INDEX;
+	s8 ww_lmt_val = phy_txpwr_ww_lmt_value(Adapter);
+	s8 lmt = hal_spec->txgi_max;
 
 	if ((Adapter->registrypriv.RegEnableTxPowerLimit == 2 && hal_data->EEPROMRegulatory != 1) ||
 		Adapter->registrypriv.RegEnableTxPowerLimit == 0)
@@ -2825,18 +2952,18 @@ s8 phy_get_txpwr_lmt_abs(
 	if (Band == BAND_ON_2_4G) {
 		if (!is_ww_regd) {
 			lmt = ent->lmt_2g[bw][tlrs][ch_idx][ntx_idx];
-			if (lmt != -MAX_POWER_INDEX)
+			if (lmt != ww_lmt_val)
 				goto release_lock;
 		}
 
 		/* search for min value for WW regd or WW limit */
-		lmt = MAX_POWER_INDEX;
+		lmt = hal_spec->txgi_max;
 		head = &rfctl->txpwr_lmt_list;
 		cur = get_next(head);
 		while ((rtw_end_of_queue_search(head, cur)) == _FALSE) {
 			ent = LIST_CONTAINOR(cur, struct txpwr_lmt_ent, list);
 			cur = get_next(cur);
-			if (ent->lmt_2g[bw][tlrs][ch_idx][ntx_idx] != -MAX_POWER_INDEX)
+			if (ent->lmt_2g[bw][tlrs][ch_idx][ntx_idx] != ww_lmt_val)
 				lmt = rtw_min(lmt, ent->lmt_2g[bw][tlrs][ch_idx][ntx_idx]);
 		}
 	}
@@ -2844,18 +2971,18 @@ s8 phy_get_txpwr_lmt_abs(
 	else if (Band == BAND_ON_5G) {
 		if (!is_ww_regd) {
 			lmt = ent->lmt_5g[bw][tlrs - 1][ch_idx][ntx_idx];
-			if (lmt != -MAX_POWER_INDEX)
+			if (lmt != ww_lmt_val)
 				goto release_lock;
 		}
 
 		/* search for min value for WW regd or WW limit */
-		lmt = MAX_POWER_INDEX;
+		lmt = hal_spec->txgi_max;
 		head = &rfctl->txpwr_lmt_list;
 		cur = get_next(head);
 		while ((rtw_end_of_queue_search(head, cur)) == _FALSE) {
 			ent = LIST_CONTAINOR(cur, struct txpwr_lmt_ent, list);
 			cur = get_next(cur);
-			if (ent->lmt_5g[bw][tlrs - 1][ch_idx][ntx_idx] != -MAX_POWER_INDEX)
+			if (ent->lmt_5g[bw][tlrs - 1][ch_idx][ntx_idx] != ww_lmt_val)
 				lmt = rtw_min(lmt, ent->lmt_5g[bw][tlrs - 1][ch_idx][ntx_idx]);
 		}
 	}
@@ -2871,7 +2998,7 @@ exit:
 
 /*
 * return txpwr limit diff value
-* MAX_POWER_INDEX is returned when NO limit
+* hal_spec->txgi_max is returned when NO limit
 */
 inline s8 phy_get_txpwr_lmt(_adapter *adapter
 	, const char *regd_name
@@ -2879,8 +3006,9 @@ inline s8 phy_get_txpwr_lmt(_adapter *adapter
 	, u8 rfpath, u8 rs, u8 ntx_idx, u8 cch, u8 lock
 )
 {
+	struct hal_spec_t *hal_spec = GET_HAL_SPEC(adapter);
 	u8 tlrs;
-	s8 lmt = MAX_POWER_INDEX;
+	s8 lmt = hal_spec->txgi_max;
 
 	if (IS_CCK_RATE_SECTION(rs))
 		tlrs = TXPWR_LMT_RS_CCK;
@@ -2898,7 +3026,7 @@ inline s8 phy_get_txpwr_lmt(_adapter *adapter
 
 	lmt = phy_get_txpwr_lmt_abs(adapter, regd_name, band, bw, tlrs, ntx_idx, cch, lock);
 
-	if (lmt != MAX_POWER_INDEX) {
+	if (lmt != hal_spec->txgi_max) {
 		/* return diff value */
 		lmt = lmt - PHY_GetTxPowerByRateBase(adapter, band, rfpath, rs);
 	}
@@ -2920,13 +3048,14 @@ PHY_GetTxPowerLimit(_adapter *adapter
 	struct dvobj_priv *dvobj = adapter_to_dvobj(adapter);
 	struct rf_ctl_t *rfctl = adapter_to_rfctl(adapter);
 	HAL_DATA_TYPE *hal_data = GET_HAL_DATA(adapter);
+	struct hal_spec_t *hal_spec = GET_HAL_SPEC(adapter);
 	BOOLEAN no_sc = _FALSE;
 	s8 tlrs = -1, rs = -1;
-	s8 lmt = MAX_POWER_INDEX;
+	s8 lmt = hal_spec->txgi_max;
 	u8 tmp_cch = 0;
 	u8 tmp_bw;
 	u8 bw_bmp = 0;
-	s8 min_lmt = MAX_POWER_INDEX;
+	s8 min_lmt = hal_spec->txgi_max;
 	u8 final_bw = bw, final_cch = cch;
 	_irqL irqL;
 
@@ -3011,7 +3140,7 @@ PHY_GetTxPowerLimit(_adapter *adapter
 
 	_exit_critical_mutex(&rfctl->txpwr_lmt_mutex, &irqL);
 
-	if (min_lmt != MAX_POWER_INDEX) {
+	if (min_lmt != hal_spec->txgi_max) {
 		/* return diff value */
 		min_lmt = min_lmt - PHY_GetTxPowerByRateBase(adapter, band, rfpath, rs);
 	}
@@ -3032,6 +3161,7 @@ exit:
 static void phy_txpwr_lmt_cck_ofdm_mt_chk(_adapter *adapter)
 {
 	struct rf_ctl_t *rfctl = adapter_to_rfctl(adapter);
+	struct hal_spec_t *hal_spec = GET_HAL_SPEC(adapter);
 	struct txpwr_lmt_ent *ent;
 	_list *cur, *head;
 	u8 channel, tlrs, ntx_idx;
@@ -3052,7 +3182,7 @@ static void phy_txpwr_lmt_cck_ofdm_mt_chk(_adapter *adapter)
 		for (tlrs = TXPWR_LMT_RS_CCK; tlrs <= TXPWR_LMT_RS_OFDM; tlrs++) {
 			for (ntx_idx = RF_1TX; ntx_idx < MAX_TX_COUNT; ntx_idx++) {
 				for (channel = 0; channel < CENTER_CH_2G_NUM; ++channel) {
-					if (ent->lmt_2g[CHANNEL_WIDTH_20][tlrs][channel][ntx_idx] != MAX_POWER_INDEX) {
+					if (ent->lmt_2g[CHANNEL_WIDTH_20][tlrs][channel][ntx_idx] != hal_spec->txgi_max) {
 						if (tlrs == TXPWR_LMT_RS_CCK)
 							rfctl->txpwr_lmt_2g_cck_ofdm_state |= TXPWR_LMT_HAS_CCK_1T << ntx_idx;
 						else
@@ -3077,7 +3207,7 @@ static void phy_txpwr_lmt_cck_ofdm_mt_chk(_adapter *adapter)
 		/* check 5G OFDM state*/
 		for (ntx_idx = RF_1TX; ntx_idx < MAX_TX_COUNT; ntx_idx++) {
 			for (channel = 0; channel < CENTER_CH_5G_ALL_NUM; ++channel) {
-				if (ent->lmt_5g[CHANNEL_WIDTH_20][TXPWR_LMT_RS_OFDM - 1][channel][ntx_idx] != MAX_POWER_INDEX) {
+				if (ent->lmt_5g[CHANNEL_WIDTH_20][TXPWR_LMT_RS_OFDM - 1][channel][ntx_idx] != hal_spec->txgi_max) {
 					rfctl->txpwr_lmt_5g_cck_ofdm_state |= TXPWR_LMT_HAS_OFDM_1T << ntx_idx;
 					break;
 				}
@@ -3101,6 +3231,7 @@ static void phy_txpwr_lmt_cck_ofdm_mt_chk(_adapter *adapter)
 static void phy_txpwr_lmt_cross_ref_ht_vht(_adapter *adapter)
 {
 	struct rf_ctl_t *rfctl = adapter_to_rfctl(adapter);
+	struct hal_spec_t *hal_spec = GET_HAL_SPEC(adapter);
 	struct txpwr_lmt_ent *ent;
 	_list *cur, *head;
 	u8 bw, channel, tlrs, ref_tlrs, ntx_idx;
@@ -3135,7 +3266,7 @@ static void phy_txpwr_lmt_cross_ref_ht_vht(_adapter *adapter)
 
 						for (ntx_idx = RF_1TX; ntx_idx < MAX_TX_COUNT; ntx_idx++) {
 
-							if (ent->lmt_5g[bw][ref_tlrs - 1][channel][ntx_idx] == MAX_POWER_INDEX)
+							if (ent->lmt_5g[bw][ref_tlrs - 1][channel][ntx_idx] == hal_spec->txgi_max)
 								continue;
 
 							if (tlrs == TXPWR_LMT_RS_HT)
@@ -3145,7 +3276,7 @@ static void phy_txpwr_lmt_cross_ref_ht_vht(_adapter *adapter)
 							else
 								continue;
 
-							if (ent->lmt_5g[bw][tlrs - 1][channel][ntx_idx] != MAX_POWER_INDEX)
+							if (ent->lmt_5g[bw][tlrs - 1][channel][ntx_idx] != hal_spec->txgi_max)
 								continue;
 
 							if (tlrs == TXPWR_LMT_RS_HT && ref_tlrs == TXPWR_LMT_RS_VHT)
@@ -3171,7 +3302,7 @@ static void phy_txpwr_lmt_cross_ref_ht_vht(_adapter *adapter)
 
 	if (0) {
 		RTW_INFO("ht_ref_vht_5g_20_40:%d, ht_has_ref_5g_20_40:%d\n", ht_ref_vht_5g_20_40, ht_has_ref_5g_20_40);
-		RTW_INFO("vht_ref_hht_5g_20_40:%d, vht_has_ref_5g_20_40:%d\n", vht_ref_ht_5g_20_40, vht_has_ref_5g_20_40);
+		RTW_INFO("vht_ref_ht_5g_20_40:%d, vht_has_ref_5g_20_40:%d\n", vht_ref_ht_5g_20_40, vht_has_ref_5g_20_40);
 	}
 
 	/* 5G 20M&40M HT all come from VHT*/
@@ -3320,10 +3451,14 @@ void phy_txpwr_limit_bandwidth_chk(_adapter *adapter)
 									_RTW_PRINT_SEL(RTW_DBGDUMP, "%03u ", cch_by_bw[bw_pos]);
 								_RTW_PRINT_SEL(RTW_DBGDUMP, "limit:");
 								for (bw_pos = bw; bw_pos < CHANNEL_WIDTH_160; bw_pos--) {
-									if (lmt[bw_pos] == MAX_POWER_INDEX)
+									if (lmt[bw_pos] == hal_spec->txgi_max)
 										_RTW_PRINT_SEL(RTW_DBGDUMP, "N/A ");
+									else if (lmt[bw_pos] > -hal_spec->txgi_pdbm && lmt[bw_pos] < 0) /* -1 < value < 0 */
+										_RTW_PRINT_SEL(RTW_DBGDUMP, "-0.%d", (rtw_abs(lmt[bw_pos]) % hal_spec->txgi_pdbm) * 100 / hal_spec->txgi_pdbm);
+									else if (lmt[bw_pos] % hal_spec->txgi_pdbm)
+										_RTW_PRINT_SEL(RTW_DBGDUMP, "%2d.%d ", lmt[bw_pos] / hal_spec->txgi_pdbm, (rtw_abs(lmt[bw_pos]) % hal_spec->txgi_pdbm) * 100 / hal_spec->txgi_pdbm);
 									else
-										_RTW_PRINT_SEL(RTW_DBGDUMP, "%2u%s ", lmt[bw_pos] / 2, lmt[bw_pos] % 2 ? ".5" : "");
+										_RTW_PRINT_SEL(RTW_DBGDUMP, "%2d ", lmt[bw_pos] / hal_spec->txgi_pdbm);
 								}
 								_RTW_PRINT_SEL(RTW_DBGDUMP, "\n");
 							}
@@ -3345,10 +3480,14 @@ void phy_txpwr_limit_bandwidth_chk(_adapter *adapter)
 									_RTW_PRINT_SEL(RTW_DBGDUMP, "%03u ", cch_by_bw[bw_pos]);
 								_RTW_PRINT_SEL(RTW_DBGDUMP, "limit:");
 								for (bw_pos = bw; bw_pos < CHANNEL_WIDTH_160; bw_pos--) {
-									if (lmt[bw_pos] == MAX_POWER_INDEX)
+									if (lmt[bw_pos] == hal_spec->txgi_max)
 										_RTW_PRINT_SEL(RTW_DBGDUMP, "N/A ");
+									else if (lmt[bw_pos] > -hal_spec->txgi_pdbm && lmt[bw_pos] < 0) /* -1 < value < 0 */
+										_RTW_PRINT_SEL(RTW_DBGDUMP, "-0.%d", (rtw_abs(lmt[bw_pos]) % hal_spec->txgi_pdbm) * 100 / hal_spec->txgi_pdbm);
+									else if (lmt[bw_pos] % hal_spec->txgi_pdbm)
+										_RTW_PRINT_SEL(RTW_DBGDUMP, "%2d.%d ", lmt[bw_pos] / hal_spec->txgi_pdbm, (rtw_abs(lmt[bw_pos]) % hal_spec->txgi_pdbm) * 100 / hal_spec->txgi_pdbm);
 									else
-										_RTW_PRINT_SEL(RTW_DBGDUMP, "%2u%s ", lmt[bw_pos] / 2, lmt[bw_pos] % 2 ? ".5" : "");
+										_RTW_PRINT_SEL(RTW_DBGDUMP, "%2d ", lmt[bw_pos] / hal_spec->txgi_pdbm);
 								}
 								_RTW_PRINT_SEL(RTW_DBGDUMP, "\n");
 							}
@@ -3420,7 +3559,7 @@ GetS1ByteIntegerFromStringInDecimal(
 */
 VOID
 phy_set_tx_power_limit(
-	IN	struct PHY_DM_STRUCT		*pDM_Odm,
+	IN	struct dm_struct		*pDM_Odm,
 	IN	u8				*Regulation,
 	IN	u8				*Band,
 	IN	u8				*Bandwidth,
@@ -3433,9 +3572,11 @@ phy_set_tx_power_limit(
 #ifdef CONFIG_TXPWR_LIMIT
 	PADAPTER Adapter = pDM_Odm->adapter;
 	HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter);
+	struct hal_spec_t *hal_spec = GET_HAL_SPEC(Adapter);
 	u8 band = 0, bandwidth = 0, tlrs = 0, channel;
 	u8 ntx_idx;
 	s8 powerLimit = 0, prevPowerLimit, channelIndex;
+	s8 ww_lmt_val = phy_txpwr_ww_lmt_value(Adapter);
 
 	if (0)
 		RTW_INFO("Index of power limit table [regulation %s][band %s][bw %s][rate section %s][ntx %s][chnl %s][val %s]\n"
@@ -3448,11 +3589,15 @@ phy_set_tx_power_limit(
 		return;
 	}
 
-	if (powerLimit < -MAX_POWER_INDEX || powerLimit > MAX_POWER_INDEX)
-		RTW_PRINT("Illegal power limit value [ch %s][val %s]\n", Channel, PowerLimit);
+	if (powerLimit != ww_lmt_val) {
+		if (powerLimit < -hal_spec->txgi_max || powerLimit > hal_spec->txgi_max)
+			RTW_PRINT("Illegal power limit value [ch %s][val %s]\n", Channel, PowerLimit);
 
-	powerLimit = powerLimit > MAX_POWER_INDEX ? MAX_POWER_INDEX : powerLimit;
-	powerLimit = powerLimit < -MAX_POWER_INDEX ? -MAX_POWER_INDEX + 1 : powerLimit;
+		if (powerLimit > hal_spec->txgi_max)
+			powerLimit = hal_spec->txgi_max;
+		else if (powerLimit < -hal_spec->txgi_max)
+			powerLimit =  ww_lmt_val + 1;
+	}
 
 	if (eqNByte(RateSection, (u8 *)("CCK"), 3))
 		tlrs = TXPWR_LMT_RS_CCK;
@@ -3549,42 +3694,7 @@ PHY_SetTxPowerIndex(
 	IN	u8				Rate
 )
 {
-	if (IS_HARDWARE_TYPE_8814A(pAdapter)) {
-#if (RTL8814A_SUPPORT == 1)
-		PHY_SetTxPowerIndex_8814A(pAdapter, PowerIndex, RFPath, Rate);
-#endif
-	} else if (IS_HARDWARE_TYPE_JAGUAR(pAdapter)) {
-#if ((RTL8812A_SUPPORT == 1) || (RTL8821A_SUPPORT == 1))
-		PHY_SetTxPowerIndex_8812A(pAdapter, PowerIndex, RFPath, Rate);
-#endif
-	} else if (IS_HARDWARE_TYPE_8723B(pAdapter)) {
-#if (RTL8723B_SUPPORT == 1)
-		PHY_SetTxPowerIndex_8723B(pAdapter, PowerIndex, RFPath, Rate);
-#endif
-	} else if (IS_HARDWARE_TYPE_8703B(pAdapter)) {
-#if (RTL8703B_SUPPORT == 1)
-		PHY_SetTxPowerIndex_8703B(pAdapter, PowerIndex, RFPath, Rate);
-#endif
-	} else if (IS_HARDWARE_TYPE_8723D(pAdapter)) {
-#if (RTL8723D_SUPPORT == 1)
-		PHY_SetTxPowerIndex_8723D(pAdapter, PowerIndex, RFPath, Rate);
-#endif
-	} else if (IS_HARDWARE_TYPE_8192E(pAdapter)) {
-#if (RTL8192E_SUPPORT == 1)
-		PHY_SetTxPowerIndex_8192E(pAdapter, PowerIndex, RFPath, Rate);
-#endif
-	} else if (IS_HARDWARE_TYPE_8188E(pAdapter)) {
-#if (RTL8188E_SUPPORT == 1)
-		PHY_SetTxPowerIndex_8188E(pAdapter, PowerIndex, RFPath, Rate);
-#endif
-	} else if (IS_HARDWARE_TYPE_8188F(pAdapter)) {
-#if (RTL8188F_SUPPORT == 1)
-		PHY_SetTxPowerIndex_8188F(pAdapter, PowerIndex, RFPath, Rate);
-#endif
-	} else if (IS_HARDWARE_TYPE_8822B(pAdapter))
-		rtw_hal_set_tx_power_index(pAdapter, PowerIndex, RFPath, Rate);
-	else if (IS_HARDWARE_TYPE_8821C(pAdapter))
-		rtw_hal_set_tx_power_index(pAdapter, PowerIndex, RFPath, Rate);
+	rtw_hal_set_tx_power_index(pAdapter, PowerIndex, RFPath, Rate);
 }
 
 void dump_tx_power_idx_title(void *sel, _adapter *adapter)
@@ -3806,7 +3916,7 @@ void dump_tx_power_ext_info(void *sel, _adapter *adapter)
 	if (regsty->target_tx_pwr_valid == _TRUE)
 		RTW_PRINT_SEL(sel, "target_tx_power: from registry\n");
 	else if (phy_is_tx_power_by_rate_needed(adapter))
-		RTW_PRINT_SEL(sel, "target_tx_power: from power by rate\n"); 
+		RTW_PRINT_SEL(sel, "target_tx_power: from power by rate\n");
 	else
 		RTW_PRINT_SEL(sel, "target_tx_power: unavailable\n");
 
@@ -3855,10 +3965,13 @@ void dump_target_tx_power(void *sel, _adapter *adapter)
 
 				target = PHY_GetTxPowerByRateBase(adapter, band, path, rs);
 
-				if (target % 2)
-					_RTW_PRINT_SEL(sel, "%7s: %2d.5\n", rate_section_str(rs), target / 2);
-				else
-					_RTW_PRINT_SEL(sel, "%7s: %4d\n", rate_section_str(rs), target / 2);
+				if (target % hal_spec->txgi_pdbm) {
+					_RTW_PRINT_SEL(sel, "%7s: %2d.%d\n", rate_section_str(rs)
+						, target / hal_spec->txgi_pdbm, (target % hal_spec->txgi_pdbm) * 100 / hal_spec->txgi_pdbm);
+				} else {
+					_RTW_PRINT_SEL(sel, "%7s: %5d\n", rate_section_str(rs)
+						, target / hal_spec->txgi_pdbm);
+				}
 			}
 		}
 	}
@@ -3910,13 +4023,14 @@ void dump_tx_power_by_rate(void *sel, _adapter *adapter)
 				for (n = rate_num - 1; n >= 0; n--) {
 					by_rate_offset = PHY_GetTxPowerByRate(adapter, band, path, rates_by_sections[rs].rates[n]);
 
-					if ((base + by_rate_offset) % 2)
-						_RTW_PRINT_SEL(sel, "%2d.5 ", (base + by_rate_offset) / 2);
-					else
-						_RTW_PRINT_SEL(sel, "%4d ", (base + by_rate_offset) / 2);
+					if ((base + by_rate_offset) % hal_spec->txgi_pdbm) {
+						_RTW_PRINT_SEL(sel, "%2d.%d ", (base + by_rate_offset) / hal_spec->txgi_pdbm
+							, ((base + by_rate_offset) % hal_spec->txgi_pdbm) * 100 / hal_spec->txgi_pdbm);
+					} else
+						_RTW_PRINT_SEL(sel, "%5d ", (base + by_rate_offset) / hal_spec->txgi_pdbm);
 				}
 				for (n = 0; n < max_rate_num - rate_num; n++)
-					_RTW_PRINT_SEL(sel, "%4s ", "");
+					_RTW_PRINT_SEL(sel, "%5s ", "");
 
 				_RTW_PRINT_SEL(sel, "|");
 
@@ -4167,14 +4281,19 @@ phy_DecryptBBPgParaFile(
 	}
 }
 
+#ifndef DBG_TXPWR_BY_RATE_FILE_PARSE
+#define DBG_TXPWR_BY_RATE_FILE_PARSE 0
+#endif
+
 int
 phy_ParseBBPgParaFile(
 	PADAPTER		Adapter,
 	char			*buffer
 )
 {
-	int	rtStatus = _SUCCESS;
+	int	rtStatus = _FAIL;
 	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(Adapter);
+	struct hal_spec_t *hal_spec = GET_HAL_SPEC(Adapter);
 	char	*szLine, *ptmp;
 	u32	u4bRegOffset, u4bRegMask, u4bRegValue;
 	u32	u4bMove;
@@ -4182,8 +4301,6 @@ phy_ParseBBPgParaFile(
 	u8	tx_num = 0;
 	u8	band = 0, rf_path = 0;
 
-	/* RTW_INFO("=====>phy_ParseBBPgParaFile()\n"); */
-
 	if (Adapter->registrypriv.RegDecryptCustomFile == 1)
 		phy_DecryptBBPgParaFile(Adapter, buffer);
 
@@ -4195,112 +4312,25 @@ phy_ParseBBPgParaFile(
 		if (!IsCommentString(szLine)) {
 			/* Get header info (relative value or exact value) */
 			if (firstLine) {
-				if (eqNByte(szLine, (u8 *)("#[v1]"), 5)) {
-
+				if (eqNByte(szLine, (u8 *)("#[v1]"), 5)
+					|| eqNByte(szLine, (u8 *)("#[v2]"), 5))
 					pHalData->odmpriv.phy_reg_pg_version = szLine[3] - '0';
-					/* RTW_INFO("This is a new format PHY_REG_PG.txt\n"); */
-				} else if (eqNByte(szLine, (u8 *)("#[v0]"), 5)) {
-					pHalData->odmpriv.phy_reg_pg_version = szLine[3] - '0';
-					/* RTW_INFO("This is a old format PHY_REG_PG.txt ok\n"); */
-				} else {
-					RTW_INFO("The format in PHY_REG_PG are invalid %s\n", szLine);
-					return _FAIL;
+				else {
+					RTW_ERR("The format in PHY_REG_PG are invalid %s\n", szLine);
+					goto exit;
 				}
 
 				if (eqNByte(szLine + 5, (u8 *)("[Exact]#"), 8)) {
 					pHalData->odmpriv.phy_reg_pg_value_type = PHY_REG_PG_EXACT_VALUE;
-					/* RTW_INFO("The values in PHY_REG_PG are exact values ok\n"); */
-					firstLine = _FALSE;
-					continue;
-				} else if (eqNByte(szLine + 5, (pu1Byte)("[Relative]#"), 11)) {
-					pHalData->odmpriv.phy_reg_pg_value_type = PHY_REG_PG_RELATIVE_VALUE;
-					/* RTW_INFO("The values in PHY_REG_PG are relative values ok\n"); */
 					firstLine = _FALSE;
 					continue;
 				} else {
-					RTW_INFO("The values in PHY_REG_PG are invalid %s\n", szLine);
-					return _FAIL;
+					RTW_ERR("The values in PHY_REG_PG are invalid %s\n", szLine);
+					goto exit;
 				}
 			}
 
-			if (pHalData->odmpriv.phy_reg_pg_version == 0) {
-				/* Get 1st hex value as register offset. */
-				if (GetHexValueFromString(szLine, &u4bRegOffset, &u4bMove)) {
-					szLine += u4bMove;
-					if (u4bRegOffset == 0xffff) {
-						/* Ending. */
-						break;
-					}
-
-					/* Get 2nd hex value as register mask. */
-					if (GetHexValueFromString(szLine, &u4bRegMask, &u4bMove))
-						szLine += u4bMove;
-					else
-						return _FAIL;
-
-					if (pHalData->odmpriv.phy_reg_pg_value_type == PHY_REG_PG_RELATIVE_VALUE) {
-						/* Get 3rd hex value as register value. */
-						if (GetHexValueFromString(szLine, &u4bRegValue, &u4bMove)) {
-							phy_store_tx_power_by_rate(Adapter, 0, 0, 1, u4bRegOffset, u4bRegMask, u4bRegValue);
-							/* RTW_INFO("[ADDR] %03X=%08X Mask=%08x\n", u4bRegOffset, u4bRegValue, u4bRegMask); */
-						} else
-							return _FAIL;
-					} else if (pHalData->odmpriv.phy_reg_pg_value_type == PHY_REG_PG_EXACT_VALUE) {
-						u32	combineValue = 0;
-						u8	integer = 0, fraction = 0;
-
-						if (GetFractionValueFromString(szLine, &integer, &fraction, &u4bMove))
-							szLine += u4bMove;
-						else
-							return _FAIL;
-
-						integer *= 2;
-						if (fraction == 5)
-							integer += 1;
-						combineValue |= (((integer / 10) << 4) + (integer % 10));
-						/* RTW_INFO(" %d", integer ); */
-
-						if (GetFractionValueFromString(szLine, &integer, &fraction, &u4bMove))
-							szLine += u4bMove;
-						else
-							return _FAIL;
-
-						integer *= 2;
-						if (fraction == 5)
-							integer += 1;
-						combineValue <<= 8;
-						combineValue |= (((integer / 10) << 4) + (integer % 10));
-						/* RTW_INFO(" %d", integer ); */
-
-						if (GetFractionValueFromString(szLine, &integer, &fraction, &u4bMove))
-							szLine += u4bMove;
-						else
-							return _FAIL;
-
-						integer *= 2;
-						if (fraction == 5)
-							integer += 1;
-						combineValue <<= 8;
-						combineValue |= (((integer / 10) << 4) + (integer % 10));
-						/* RTW_INFO(" %d", integer ); */
-
-						if (GetFractionValueFromString(szLine, &integer, &fraction, &u4bMove))
-							szLine += u4bMove;
-						else
-							return _FAIL;
-
-						integer *= 2;
-						if (fraction == 5)
-							integer += 1;
-						combineValue <<= 8;
-						combineValue |= (((integer / 10) << 4) + (integer % 10));
-						/* RTW_INFO(" %d", integer ); */
-						phy_store_tx_power_by_rate(Adapter, 0, 0, 1, u4bRegOffset, u4bRegMask, combineValue);
-
-						/* RTW_INFO("[ADDR] 0x%3x = 0x%4x\n", u4bRegOffset, combineValue ); */
-					}
-				}
-			} else if (pHalData->odmpriv.phy_reg_pg_version > 0) {
+			if (pHalData->odmpriv.phy_reg_pg_version > 0) {
 				u32	index = 0, cnt = 0;
 
 				if (eqNByte(szLine, "0xffff", 6))
@@ -4317,12 +4347,13 @@ phy_ParseBBPgParaFile(
 							band = BAND_ON_5G;
 							index += 6;
 						} else {
-							RTW_INFO("Invalid band %s in PHY_REG_PG.txt\n", szLine);
-							return _FAIL;
+							RTW_ERR("Invalid band %s in PHY_REG_PG.txt\n", szLine);
+							goto exit;
 						}
 
 						rf_path = szLine[index] - 'A';
-						/* RTW_INFO(" Table label Band %d, RfPath %d\n", band, rf_path ); */
+						if (DBG_TXPWR_BY_RATE_FILE_PARSE)
+							RTW_INFO(" Table label Band %d, RfPath %d\n", band, rf_path );
 					} else { /* load rows of tables */
 						if (szLine[1] == '1')
 							tx_num = RF_1TX;
@@ -4333,8 +4364,8 @@ phy_ParseBBPgParaFile(
 						else if (szLine[1] == '4')
 							tx_num = RF_4TX;
 						else {
-							RTW_INFO("Invalid row in PHY_REG_PG.txt '%c'(%d)\n", szLine[1], szLine[1]);
-							return _FAIL;
+							RTW_ERR("Invalid row in PHY_REG_PG.txt '%c'(%d)\n", szLine[1], szLine[1]);
+							goto exit;
 						}
 
 						while (szLine[index] != ']')
@@ -4346,81 +4377,84 @@ phy_ParseBBPgParaFile(
 						if (GetHexValueFromString(szLine, &u4bRegOffset, &u4bMove))
 							szLine += u4bMove;
 						else
-							return _FAIL;
+							goto exit;
 
 						/* Get 2nd hex value as register mask. */
 						if (GetHexValueFromString(szLine, &u4bRegMask, &u4bMove))
 							szLine += u4bMove;
 						else
-							return _FAIL;
-
-						if (pHalData->odmpriv.phy_reg_pg_value_type == PHY_REG_PG_RELATIVE_VALUE) {
-							/* Get 3rd hex value as register value. */
-							if (GetHexValueFromString(szLine, &u4bRegValue, &u4bMove)) {
-								phy_store_tx_power_by_rate(Adapter, band, rf_path, tx_num, u4bRegOffset, u4bRegMask, u4bRegValue);
-								/* RTW_INFO("[ADDR] %03X (tx_num %d) =%08X Mask=%08x\n", u4bRegOffset, tx_num, u4bRegValue, u4bRegMask); */
-							} else
-								return _FAIL;
-						} else if (pHalData->odmpriv.phy_reg_pg_value_type == PHY_REG_PG_EXACT_VALUE) {
+							goto exit;
+
+						if (pHalData->odmpriv.phy_reg_pg_value_type == PHY_REG_PG_EXACT_VALUE) {
 							u32	combineValue = 0;
 							u8	integer = 0, fraction = 0;
 
 							if (GetFractionValueFromString(szLine, &integer, &fraction, &u4bMove))
 								szLine += u4bMove;
 							else
-								return _FAIL;
+								goto exit;
 
-							integer *= 2;
-							if (fraction == 5)
-								integer += 1;
-							combineValue |= (((integer / 10) << 4) + (integer % 10));
-							/* RTW_INFO(" %d", integer ); */
+							integer *= hal_spec->txgi_pdbm;
+							integer += ((u16)fraction * (u16)hal_spec->txgi_pdbm) / 100;
+							if (pHalData->odmpriv.phy_reg_pg_version == 1)
+								combineValue |= (((integer / 10) << 4) + (integer % 10));
+							else
+								combineValue |= integer;
 
 							if (GetFractionValueFromString(szLine, &integer, &fraction, &u4bMove))
 								szLine += u4bMove;
 							else
-								return _FAIL;
+								goto exit;
 
-							integer *= 2;
-							if (fraction == 5)
-								integer += 1;
+							integer *= hal_spec->txgi_pdbm;
+							integer += ((u16)fraction * (u16)hal_spec->txgi_pdbm) / 100;
 							combineValue <<= 8;
-							combineValue |= (((integer / 10) << 4) + (integer % 10));
-							/* RTW_INFO(" %d", integer ); */
+							if (pHalData->odmpriv.phy_reg_pg_version == 1)
+								combineValue |= (((integer / 10) << 4) + (integer % 10));
+							else
+								combineValue |= integer;
 
 							if (GetFractionValueFromString(szLine, &integer, &fraction, &u4bMove))
 								szLine += u4bMove;
 							else
-								return _FAIL;
+								goto exit;
 
-							integer *= 2;
-							if (fraction == 5)
-								integer += 1;
+							integer *= hal_spec->txgi_pdbm;
+							integer += ((u16)fraction * (u16)hal_spec->txgi_pdbm) / 100;
 							combineValue <<= 8;
-							combineValue |= (((integer / 10) << 4) + (integer % 10));
-							/* RTW_INFO(" %d", integer ); */
+							if (pHalData->odmpriv.phy_reg_pg_version == 1)
+								combineValue |= (((integer / 10) << 4) + (integer % 10));
+							else
+								combineValue |= integer;
 
 							if (GetFractionValueFromString(szLine, &integer, &fraction, &u4bMove))
 								szLine += u4bMove;
 							else
-								return _FAIL;
+								goto exit;
 
-							integer *= 2;
-							if (fraction == 5)
-								integer += 1;
+							integer *= hal_spec->txgi_pdbm;
+							integer += ((u16)fraction * (u16)hal_spec->txgi_pdbm) / 100;
 							combineValue <<= 8;
-							combineValue |= (((integer / 10) << 4) + (integer % 10));
-							/* RTW_INFO(" %d", integer ); */
+							if (pHalData->odmpriv.phy_reg_pg_version == 1)
+								combineValue |= (((integer / 10) << 4) + (integer % 10));
+							else
+								combineValue |= integer;
+
 							phy_store_tx_power_by_rate(Adapter, band, rf_path, tx_num, u4bRegOffset, u4bRegMask, combineValue);
 
-							/* RTW_INFO("[ADDR] 0x%3x (tx_num %d) = 0x%4x\n", u4bRegOffset, tx_num, combineValue ); */
+							if (DBG_TXPWR_BY_RATE_FILE_PARSE)
+								RTW_INFO("addr:0x%3x mask:0x%08x %dTx = 0x%08x\n", u4bRegOffset, u4bRegMask, tx_num + 1, combineValue);
 						}
 					}
 				}
 			}
 		}
 	}
-	/* RTW_INFO("<=====phy_ParseBBPgParaFile()\n"); */
+
+	rtStatus = _SUCCESS;
+
+exit:
+	RTW_INFO("%s return %d\n", __func__, rtStatus);
 	return rtStatus;
 }
 
@@ -4461,7 +4495,7 @@ phy_ConfigBBWithPgParaFile(
 
 	if (rtStatus == _SUCCESS) {
 		/* RTW_INFO("phy_ConfigBBWithPgParaFile(): read %s ok\n", pFileName); */
-		phy_ParseBBPgParaFile(Adapter, pHalData->para_file_buf);
+		rtStatus = phy_ParseBBPgParaFile(Adapter, pHalData->para_file_buf);
 	} else
 		RTW_INFO("%s(): No File %s, Load from HWImg Array!\n", __FUNCTION__, pFileName);
 
@@ -4708,8 +4742,8 @@ initDeltaSwingIndexTables(
 	} } while (0)\
 
 	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(Adapter);
-	struct PHY_DM_STRUCT		*pDM_Odm = &pHalData->odmpriv;
-	struct odm_rf_calibration_structure	*pRFCalibrateInfo = &(pDM_Odm->rf_calibrate_info);
+	struct dm_struct		*pDM_Odm = &pHalData->odmpriv;
+	struct dm_rf_calibration_struct	*pRFCalibrateInfo = &(pDM_Odm->rf_calibrate_info);
 	u32	j = 0;
 	char	*token;
 	char	delim[] = ",";
@@ -4777,8 +4811,8 @@ PHY_ConfigRFWithTxPwrTrackParaFile(
 )
 {
 	HAL_DATA_TYPE		*pHalData = GET_HAL_DATA(Adapter);
-	struct PHY_DM_STRUCT			*pDM_Odm = &pHalData->odmpriv;
-	struct odm_rf_calibration_structure		*pRFCalibrateInfo = &(pDM_Odm->rf_calibrate_info);
+	struct dm_struct			*pDM_Odm = &pHalData->odmpriv;
+	struct dm_rf_calibration_struct		*pRFCalibrateInfo = &(pDM_Odm->rf_calibrate_info);
 	int	rlen = 0, rtStatus = _FAIL;
 	char	*szLine, *ptmp;
 	u32	i = 0, j = 0;
@@ -4996,17 +5030,15 @@ phy_ParsePowerLimitTableFile(
 
 	int	rtStatus = _FAIL;
 	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(Adapter);
-	struct PHY_DM_STRUCT	*pDM_Odm = &(pHalData->odmpriv);
+	struct hal_spec_t *hal_spec = GET_HAL_SPEC(Adapter);
+	struct dm_struct	*pDM_Odm = &(pHalData->odmpriv);
 	u8	loadingStage = LD_STAGE_EXC_MAPPING;
 	u32	i = 0, forCnt = 0;
-	u8 limitValue = 0, fraction = 0, negative = 0;
 	char	*szLine, *ptmp;
 	char band[10], bandwidth[10], rateSection[10], ntx[10], colNumBuf[10];
 	char **regulation = NULL;
 	u8	colNum = 0;
 
-	RTW_INFO("%s enter\n", __func__);
-
 	if (Adapter->registrypriv.RegDecryptCustomFile == 1)
 		phy_DecryptBBPgParaFile(Adapter, buffer);
 
@@ -5197,110 +5229,59 @@ phy_ParsePowerLimitTableFile(
 					++i;
 
 				/* load the power limit value */
-				cnt = 0;
-				fraction = 0;
-				negative = 0;
 				_rtw_memset((PVOID) powerLimit, 0, 10);
 
-				while ((szLine[i] >= '0' && szLine[i] <= '9') || szLine[i] == '.'
+				if (szLine[i] == 'W' && szLine[i + 1] == 'W') {
+					/*
+					* case "WW" assign special ww value
+					* means to get minimal limit in other regulations at same channel
+					*/
+					s8 ww_value = phy_txpwr_ww_lmt_value(Adapter);
+
+					sprintf(powerLimit, "%d", ww_value);
+					i += 2;
+
+				} else if (szLine[i] == 'N' && szLine[i + 1] == 'A') {
+					/*
+					* case "NA" assign max txgi value
+					* means no limitation
+					*/
+					sprintf(powerLimit, "%d", hal_spec->txgi_max);
+					i += 2;
+
+				} else if ((szLine[i] >= '0' && szLine[i] <= '9') || szLine[i] == '.'
 					|| szLine[i] == '+' || szLine[i] == '-'
-				) {
-					/* try to get valid decimal number */
+				){
+					/* case of dBm value */
+					u8 integer = 0, fraction = 0, negative = 0;
+					u32 u4bMove;
+					s8 lmt = 0;
+
 					if (szLine[i] == '+' || szLine[i] == '-') {
-						if (cnt != 0) {
-							RTW_ERR("Wrong position for sign '%c'\n", szLine[i]);
-							goto exit;
-						}
-						if (szLine[i] == '-') {
+						if (szLine[i] == '-')
 							negative = 1;
-							++i;
-							continue;
-						}
-
-					} else if (szLine[i] == '.') {
-						if ((szLine[i + 1] >= '0' && szLine[i + 1] <= '9')) {
-							fraction = szLine[i + 1];
-							i += 2;
-						} else {
-							RTW_ERR("Wrong fraction '%c'(%d)\n", szLine[i + 1], szLine[i + 1]);
-							goto exit;
-						}
-
-						break;
+						i++;
 					}
 
-					powerLimit[cnt] = szLine[i];
-					++cnt;
-					++i;
-				}
-
-				if (powerLimit[0] == '\0') {
-					if (szLine[i] == 'W' && szLine[i + 1] == 'W') {
-						/*
-						* case "WW" assign special value -63
-						* means to get minimal limit in other regulations at same channel
-						*/
-						powerLimit[0] = '-';
-						powerLimit[1] = '6';
-						powerLimit[2] = '3';
-						i += 2;
-					} else if (szLine[i] == 'N' && szLine[i + 1] == 'A') {
-						/*
-						* case "NA" assign special value 63
-						* means no limitation
-						*/
-						powerLimit[0] = '6';
-						powerLimit[1] = '3';
-						i += 2;
-					} else {
-						RTW_ERR("Wrong limit expression \"%c%c\"(%d, %d)\n"
-							, szLine[i], szLine[i + 1], szLine[i], szLine[i + 1]);
-						goto exit;
-					}
-				} else {
-					/* transform dicimal value to power index */
-					if (!GetU1ByteIntegerFromStringInDecimal(powerLimit, &limitValue)) {
-						RTW_ERR("Limit \"%s\" is not valid decimal\n", powerLimit);
+					if (GetFractionValueFromString(&szLine[i], &integer, &fraction, &u4bMove))
+						i += u4bMove;
+					else {
+						RTW_ERR("Limit \"%s\" is not valid decimal\n", &szLine[i]);
 						goto exit;
 					}
 
-					limitValue *= 2;
-					cnt = 0;
-
+					/* transform to string of value in unit of txgi */
+					lmt = integer * hal_spec->txgi_pdbm + ((u16)fraction * (u16)hal_spec->txgi_pdbm) / 100;
 					if (negative)
-						powerLimit[cnt++] = '-';
-
-					if (fraction == '5')
-						++limitValue;
-
-					/* the value is greater or equal to 100 */
-					if (limitValue >= 100) {
-						powerLimit[cnt++] = limitValue / 100 + '0';
-						limitValue %= 100;
+						lmt = -lmt;
+					sprintf(powerLimit, "%d", lmt);
 
-						if (limitValue >= 10) {
-							powerLimit[cnt++] = limitValue / 10 + '0';
-							limitValue %= 10;
-						} else
-							powerLimit[cnt++] = '0';
-
-						powerLimit[cnt++] = limitValue + '0';
-					}
-					/* the value is greater or equal to 10 */
-					else if (limitValue >= 10) {
-						powerLimit[cnt++] = limitValue / 10 + '0';
-						limitValue %= 10;
-						powerLimit[cnt++] = limitValue + '0';
-					}
-					/* the value is less than 10 */
-					else
-						powerLimit[cnt++] = limitValue + '0';
-
-					powerLimit[cnt] = '\0';
+				} else {
+					RTW_ERR("Wrong limit expression \"%c%c\"(%d, %d)\n"
+						, szLine[i], szLine[i + 1], szLine[i], szLine[i + 1]);
+					goto exit;
 				}
 
-				/* RTW_INFO("ch%s => %s\n", channel, powerLimit); */
-
 				/* store the power limit value */
 				phy_set_tx_power_limit(pDM_Odm, (u8 *)regulation[forCnt], (u8 *)band,
 					(u8 *)bandwidth, (u8 *)rateSection, (u8 *)ntx, (u8 *)channel, (u8 *)powerLimit);
diff --git a/rtl8723DS/hal/hal_dm.c b/rtl8723DS/hal/hal_dm.c
index aa7aa48..c5fa43e 100755..100644
--- a/rtl8723DS/hal/hal_dm.c
+++ b/rtl8723DS/hal/hal_dm.c
@@ -17,9 +17,9 @@
 #include <hal_data.h>
 
 /* A mapping from HalData to ODM. */
-enum odm_board_type_e boardType(u8 InterfaceSel)
+enum odm_board_type boardType(u8 InterfaceSel)
 {
-	enum odm_board_type_e        board	= ODM_BOARD_DEFAULT;
+	enum odm_board_type        board	= ODM_BOARD_DEFAULT;
 
 #ifdef CONFIG_PCI_HCI
 	INTERFACE_SELECT_PCIE   pcie	= (INTERFACE_SELECT_PCIE)InterfaceSel;
@@ -68,7 +68,7 @@ enum odm_board_type_e boardType(u8 InterfaceSel)
 void rtw_hal_update_iqk_fw_offload_cap(_adapter *adapter)
 {
 	PHAL_DATA_TYPE hal = GET_HAL_DATA(adapter);
-	struct PHY_DM_STRUCT *p_dm_odm = adapter_to_phydm(adapter);
+	struct dm_struct *p_dm_odm = adapter_to_phydm(adapter);
 
 	if (hal->RegIQKFWOffload) {
 		rtw_sctx_init(&hal->iqk_sctx, 0);
@@ -82,8 +82,8 @@ void rtw_hal_update_iqk_fw_offload_cap(_adapter *adapter)
 #if ((RTL8822B_SUPPORT == 1) || (RTL8821C_SUPPORT == 1) || (RTL8814B_SUPPORT == 1))
 void rtw_phydm_iqk_trigger(_adapter *adapter)
 {
-	struct PHY_DM_STRUCT *p_dm_odm = adapter_to_phydm(adapter);
-	u8 clear = _FALSE;
+	struct dm_struct *p_dm_odm = adapter_to_phydm(adapter);
+	u8 clear = _TRUE;
 	u8 segment = _FALSE;
 	u8 rfk_forbidden = _FALSE;
 
@@ -96,7 +96,7 @@ void rtw_phydm_iqk_trigger(_adapter *adapter)
 
 void rtw_phydm_iqk_trigger_dbg(_adapter *adapter, bool recovery, bool clear, bool segment)
 {
-	struct PHY_DM_STRUCT *p_dm_odm = adapter_to_phydm(adapter);
+	struct dm_struct *p_dm_odm = adapter_to_phydm(adapter);
 
 #if ((RTL8822B_SUPPORT == 1) || (RTL8821C_SUPPORT == 1) || (RTL8814B_SUPPORT == 1))
 		halrf_segment_iqk_trigger(p_dm_odm, clear, segment);
@@ -106,14 +106,14 @@ void rtw_phydm_iqk_trigger_dbg(_adapter *adapter, bool recovery, bool clear, boo
 }
 void rtw_phydm_lck_trigger(_adapter *adapter)
 {
-	struct PHY_DM_STRUCT *p_dm_odm = adapter_to_phydm(adapter);
+	struct dm_struct *p_dm_odm = adapter_to_phydm(adapter);
 
 	halrf_lck_trigger(p_dm_odm);
 }
 #ifdef CONFIG_DBG_RF_CAL
 void rtw_hal_iqk_test(_adapter *adapter, bool recovery, bool clear, bool segment)
 {
-	struct PHY_DM_STRUCT *p_dm_odm = adapter_to_phydm(adapter);
+	struct dm_struct *p_dm_odm = adapter_to_phydm(adapter);
 
 	rtw_ps_deny(adapter, PS_DENY_IOCTL);
 	LeaveAllPowerSaveModeDirect(adapter);
@@ -131,7 +131,7 @@ void rtw_hal_iqk_test(_adapter *adapter, bool recovery, bool clear, bool segment
 
 void rtw_hal_lck_test(_adapter *adapter)
 {
-	struct PHY_DM_STRUCT *p_dm_odm = adapter_to_phydm(adapter);
+	struct dm_struct *p_dm_odm = adapter_to_phydm(adapter);
 
 	rtw_ps_deny(adapter, PS_DENY_IOCTL);
 	LeaveAllPowerSaveModeDirect(adapter);
@@ -151,7 +151,7 @@ void rtw_hal_lck_test(_adapter *adapter)
 #ifdef CONFIG_FW_OFFLOAD_PARAM_INIT
 void rtw_hal_update_param_init_fw_offload_cap(_adapter *adapter)
 {
-	struct PHY_DM_STRUCT *p_dm_odm = adapter_to_phydm(adapter);
+	struct dm_struct *p_dm_odm = adapter_to_phydm(adapter);
 
 	if (adapter->registrypriv.fw_param_init)
 		phydm_fwoffload_ability_init(p_dm_odm, PHYDM_PHY_PARAM_OFFLOAD);
@@ -164,43 +164,155 @@ void rtw_hal_update_param_init_fw_offload_cap(_adapter *adapter)
 
 void record_ra_info(void *p_dm_void, u8 macid, struct cmn_sta_info *p_sta, u64 ra_mask)
 {
-	struct PHY_DM_STRUCT *p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
+	struct dm_struct *p_dm = (struct dm_struct *)p_dm_void;
 	_adapter *adapter = p_dm->adapter;
 	struct dvobj_priv *dvobj = adapter_to_dvobj(adapter);
 	struct macid_ctl_t *macid_ctl = dvobj_to_macidctl(dvobj);
 
-	rtw_macid_ctl_set_bw(macid_ctl, macid, p_sta->ra_info.ra_bw_mode);
-	rtw_macid_ctl_set_vht_en(macid_ctl, macid, p_sta->ra_info.is_vht_enable);
-	rtw_macid_ctl_set_rate_bmp0(macid_ctl, macid, ra_mask);
-	rtw_macid_ctl_set_rate_bmp1(macid_ctl, macid, ra_mask >> 32);
+	if (p_sta) {
+		rtw_macid_ctl_set_bw(macid_ctl, macid, p_sta->ra_info.ra_bw_mode);
+		rtw_macid_ctl_set_vht_en(macid_ctl, macid, p_sta->ra_info.is_vht_enable);
+		rtw_macid_ctl_set_rate_bmp0(macid_ctl, macid, ra_mask);
+		rtw_macid_ctl_set_rate_bmp1(macid_ctl, macid, ra_mask >> 32);
 
-	rtw_update_tx_rate_bmp(adapter_to_dvobj(adapter));
+		rtw_update_tx_rate_bmp(adapter_to_dvobj(adapter));
+	}
+}
+
+#ifdef CONFIG_SUPPORT_DYNAMIC_TXPWR
+void rtw_phydm_fill_desc_dpt(void *dm, u8 *desc, u8 dpt_lv)
+{
+	struct dm_struct *p_dm = (struct dm_struct *)dm;
+	_adapter *adapter = p_dm->adapter;
+
+	switch (rtw_get_chip_type(adapter)) {
+/*
+	#ifdef CONFIG_RTL8188F
+	case RTL8188F:
+		break;
+	#endif
+
+	#ifdef CONFIG_RTL8723B
+	case RTL8723B :
+		break;
+	#endif
+
+	#ifdef CONFIG_RTL8703B
+	case RTL8703B :
+		break;
+	#endif
+
+	#ifdef CONFIG_RTL8812A
+	case RTL8812 :
+		break;
+	#endif
+
+	#ifdef CONFIG_RTL8821A
+	case RTL8821:
+		break;
+	#endif
+
+	#ifdef CONFIG_RTL8814A
+	case RTL8814A :
+		break;
+	#endif
+
+	#ifdef CONFIG_RTL8192F
+	case RTL8192F :
+		break;
+	#endif
+*/
+/*
+	#ifdef CONFIG_RTL8192E
+	case RTL8192E :
+		SET_TX_DESC_TX_POWER_0_PSET_92E(desc, dpt_lv);
+		break;
+	#endif
+*/
+
+	#ifdef CONFIG_RTL8821C
+	case RTL8821C :
+		SET_TX_DESC_TXPWR_OFSET_8821C(desc, dpt_lv);
+	break;
+	#endif
+
+	default :
+		RTW_ERR("%s IC not support dynamic tx power\n", __func__);
+		break;
+	}
+}
+void rtw_phydm_set_dyntxpwr(_adapter *adapter, u8 *desc, u8 mac_id)
+{
+	struct dm_struct *dm = adapter_to_phydm(adapter);
+
+	odm_set_dyntxpwr(dm, desc, mac_id);
 }
+#endif
 
-void rtw_phydm_ops_func_init(struct PHY_DM_STRUCT *p_phydm)
+#ifdef CONFIG_RTW_TX_2PATH_EN
+void rtw_phydm_tx_2path_en(_adapter *adapter)
 {
-	struct _rate_adaptive_table_ *p_ra_t = &p_phydm->dm_ra_table;
+	struct dm_struct *dm = adapter_to_phydm(adapter);
+
+	phydm_tx_2path(dm);
+}
+#endif
+#ifdef CONFIG_TDMADIG
+void rtw_phydm_tdmadig(_adapter *adapter, u8 state)
+{
+	struct registry_priv	*pregistrypriv = &adapter->registrypriv;
+	struct mlme_priv		*pmlmepriv = &(adapter->mlmepriv);
+	struct dm_struct *dm = adapter_to_phydm(adapter);
+	u8 tdma_dig_en;
+
+	switch (state) {
+	case TDMADIG_INIT:
+		phydm_tdma_dig_para_upd(dm, ENABLE_TDMA, pregistrypriv->tdmadig_en);
+		phydm_tdma_dig_para_upd(dm, MODE_DECISION, pregistrypriv->tdmadig_mode);
+		break;
+	case TDMADIG_NON_INIT:
+		if(pregistrypriv->tdmadig_dynamic) {
+			if(pmlmepriv->LinkDetectInfo.bBusyTraffic == _TRUE)
+				tdma_dig_en = 0;
+			else
+				tdma_dig_en = pregistrypriv->tdmadig_en;
+			phydm_tdma_dig_para_upd(dm, ENABLE_TDMA, tdma_dig_en);
+		}
+		break;
+	default:
+		break;
+
+	}
+}
+#endif/*CONFIG_TDMADIG*/
+void rtw_phydm_ops_func_init(struct dm_struct *p_phydm)
+{
+	struct ra_table *p_ra_t = &p_phydm->dm_ra_table;
 
 	p_ra_t->record_ra_info = record_ra_info;
+	#ifdef CONFIG_SUPPORT_DYNAMIC_TXPWR
+	p_phydm->fill_desc_dyntxpwr = rtw_phydm_fill_desc_dpt;
+	#endif
+}
+void rtw_phydm_priv_init(_adapter *adapter)
+{
+	PHAL_DATA_TYPE hal = GET_HAL_DATA(adapter);
+	struct dm_struct *phydm = &(hal->odmpriv);
+
+	phydm->adapter = adapter;
+	odm_cmn_info_init(phydm, ODM_CMNINFO_PLATFORM, ODM_CE);
 }
 
 void Init_ODM_ComInfo(_adapter *adapter)
 {
 	struct dvobj_priv *dvobj = adapter_to_dvobj(adapter);
 	PHAL_DATA_TYPE	pHalData = GET_HAL_DATA(adapter);
-	struct PHY_DM_STRUCT		*pDM_Odm = &(pHalData->odmpriv);
+	struct dm_struct	*pDM_Odm = &(pHalData->odmpriv);
 	struct pwrctrl_priv *pwrctl = adapter_to_pwrctl(adapter);
 	int i;
 
-	_rtw_memset(pDM_Odm, 0, sizeof(*pDM_Odm));
-
-	pDM_Odm->adapter = adapter;
-
 	/*phydm_op_mode could be change for different scenarios: ex: SoftAP - PHYDM_BALANCE_MODE*/
 	pHalData->phydm_op_mode = PHYDM_PERFORMANCE_MODE;/*Service one device*/
-
-	odm_cmn_info_init(pDM_Odm, ODM_CMNINFO_PLATFORM, ODM_CE);
-
 	rtw_odm_init_ic_type(adapter);
 
 	if (rtw_get_intf_type(adapter) == RTW_GSPI)
@@ -250,7 +362,7 @@ void Init_ODM_ComInfo(_adapter *adapter)
 
 #ifdef CONFIG_DFS_MASTER
 	odm_cmn_info_init(pDM_Odm, ODM_CMNINFO_DFS_REGION_DOMAIN, adapter->registrypriv.dfs_region_domain);
-	odm_cmn_info_hook(pDM_Odm, ODM_CMNINFO_DFS_MASTER_ENABLE, &(adapter_to_rfctl(adapter)->dfs_master_enabled));
+	odm_cmn_info_hook(pDM_Odm, ODM_CMNINFO_DFS_MASTER_ENABLE, &(adapter_to_rfctl(adapter)->radar_detect_enabled));
 #endif
 
 	odm_cmn_info_init(pDM_Odm, ODM_CMNINFO_GPA, pHalData->TypeGPA);
@@ -259,6 +371,7 @@ void Init_ODM_ComInfo(_adapter *adapter)
 	odm_cmn_info_init(pDM_Odm, ODM_CMNINFO_ALNA, pHalData->TypeALNA);
 
 	odm_cmn_info_init(pDM_Odm, ODM_CMNINFO_RFE_TYPE, pHalData->rfe_type);
+	odm_cmn_info_init(pDM_Odm, ODM_CMNINFO_X_CAP_SETTING, pHalData->crystal_cap);
 
 	odm_cmn_info_init(pDM_Odm, ODM_CMNINFO_EXT_TRSW, 0);
 
@@ -277,15 +390,12 @@ void Init_ODM_ComInfo(_adapter *adapter)
 	/*Add by YuChen for adaptivity init*/
 	odm_cmn_info_hook(pDM_Odm, ODM_CMNINFO_ADAPTIVITY, &(adapter->registrypriv.adaptivity_en));
 	phydm_adaptivity_info_init(pDM_Odm, PHYDM_ADAPINFO_CARRIER_SENSE_ENABLE, (adapter->registrypriv.adaptivity_mode != 0) ? TRUE : FALSE);
-	phydm_adaptivity_info_init(pDM_Odm, PHYDM_ADAPINFO_DCBACKOFF, adapter->registrypriv.adaptivity_dc_backoff);
-	phydm_adaptivity_info_init(pDM_Odm, PHYDM_ADAPINFO_DYNAMICLINKADAPTIVITY, (adapter->registrypriv.adaptivity_dml != 0) ? TRUE : FALSE);
 	phydm_adaptivity_info_init(pDM_Odm, PHYDM_ADAPINFO_TH_L2H_INI, adapter->registrypriv.adaptivity_th_l2h_ini);
 	phydm_adaptivity_info_init(pDM_Odm, PHYDM_ADAPINFO_TH_EDCCA_HL_DIFF, adapter->registrypriv.adaptivity_th_edcca_hl_diff);
 
 	/*halrf info init*/
 	halrf_cmn_info_init(pDM_Odm, HALRF_CMNINFO_EEPROM_THERMAL_VALUE, pHalData->eeprom_thermal_meter);
-	halrf_cmn_info_init(pDM_Odm, HALRF_CMNINFO_FW_VER,
-		((pHalData->firmware_version << 16) | pHalData->firmware_sub_version));
+	halrf_cmn_info_init(pDM_Odm, HALRF_CMNINFO_PWT_TYPE, 0);
 
 	if (rtw_odm_adaptivity_needed(adapter) == _TRUE)
 		rtw_odm_adaptivity_config_msg(RTW_DBGDUMP, adapter);
@@ -330,6 +440,10 @@ void Init_ODM_ComInfo(_adapter *adapter)
 	odm_cmn_info_hook(pDM_Odm, ODM_CMNINFO_HUBUSBMODE, &(dvobj->usb_speed));
 #endif
 
+#ifdef CONFIG_DYNAMIC_SOML
+	odm_cmn_info_hook(pDM_Odm, ODM_CMNINFO_ADAPTIVE_SOML, &(adapter->registrypriv.dyn_soml_en));
+#endif
+
 	/*halrf info hook*/
 #ifdef CONFIG_MP_INCLUDED
 	halrf_cmn_info_hook(pDM_Odm, HALRF_CMNINFO_CON_TX, &(adapter->mppriv.mpt_ctx.is_start_cont_tx));
@@ -363,6 +477,65 @@ static u32 edca_setting_dl_g_mode[HT_IOT_PEER_MAX] =
 /*RALINK, ATHEROS, CISCO, MERU, MARVELL, 92U_AP, SELF_AP */
 { 0x4322, 0xa44f, 0x5e4322, 0xa42b, 0x5e4322, 0x4322,	 0xa42b, 0x5ea42b, 0xa44f, 0x5e4322, 0x5ea42b};
 
+
+struct turbo_edca_setting{
+	u32 edca_ul; /* uplink, tx */
+	u32 edca_dl; /* downlink, rx */
+};
+
+#define TURBO_EDCA_ENT(UL, DL) {UL, DL}
+
+#if 0
+#define TURBO_EDCA_MODE_NUM 18
+static struct turbo_edca_setting rtw_turbo_edca[TURBO_EDCA_MODE_NUM] = {
+	TURBO_EDCA_ENT(0xa42b, 0xa42b), /* mode 0 */
+	TURBO_EDCA_ENT(0x431c, 0x431c), /* mode 1 */
+	TURBO_EDCA_ENT(0x4319, 0x4319), /* mode 2 */	
+	
+	TURBO_EDCA_ENT(0x5ea42b, 0x5ea42b), /* mode 3 */
+	TURBO_EDCA_ENT(0x5e431c, 0x5e431c), /* mode 4 */
+	TURBO_EDCA_ENT(0x5e4319, 0x5e4319), /* mode 5 */	
+	
+	TURBO_EDCA_ENT(0x6ea42b, 0x6ea42b), /* mode 6 */
+	TURBO_EDCA_ENT(0x6e431c, 0x6e431c), /* mode 7 */
+	TURBO_EDCA_ENT(0x6e4319, 0x6e4319), /* mode 8 */
+	
+	TURBO_EDCA_ENT(0x5ea42b, 0xa42b), /* mode 9 */
+	TURBO_EDCA_ENT(0x5e431c, 0x431c), /* mode 10 */
+	TURBO_EDCA_ENT(0x5e4319, 0x4319), /* mode 11 */
+	
+	TURBO_EDCA_ENT(0x6ea42b, 0xa42b), /* mode 12 */
+	TURBO_EDCA_ENT(0x6e431c, 0x431c), /* mode 13 */
+	TURBO_EDCA_ENT(0x6e4319, 0x4319), /* mode 14 */
+
+	TURBO_EDCA_ENT(0x431c, 0x5e431c), /* mode 15 */
+
+	TURBO_EDCA_ENT(0xa42b, 0x5ea42b), /* mode 16 */
+
+	TURBO_EDCA_ENT(0x138642b, 0x431c), /* mode 17 */
+};
+#else
+#define TURBO_EDCA_MODE_NUM 8
+static struct turbo_edca_setting rtw_turbo_edca[TURBO_EDCA_MODE_NUM] = {
+	/* { UL, DL } */
+	TURBO_EDCA_ENT(0x5e431c, 0x431c), /* mode 0 */
+
+	TURBO_EDCA_ENT(0x431c, 0x431c), /* mode 1 */	
+	
+	TURBO_EDCA_ENT(0x5e431c, 0x5e431c), /* mode 2 */
+
+	TURBO_EDCA_ENT(0x5ea42b, 0x5ea42b), /* mode 3 */
+	
+	TURBO_EDCA_ENT(0x5ea42b, 0x431c), /* mode 4 */
+	
+	TURBO_EDCA_ENT(0x6ea42b, 0x6ea42b), /* mode 5 */
+
+	TURBO_EDCA_ENT(0xa42b, 0xa42b), /* mode 6 */
+	
+	TURBO_EDCA_ENT(0x5e431c, 0xa42b), /* mode 7 */
+};
+#endif
+
 void rtw_hal_turbo_edca(_adapter *adapter)
 {
 	HAL_DATA_TYPE		*hal_data = GET_HAL_DATA(adapter);
@@ -392,7 +565,7 @@ void rtw_hal_turbo_edca(_adapter *adapter)
 	u8	is_linked = _FALSE;
 	u8	interface_type;
 
-	if (hal_data->dis_turboedca)
+	if (hal_data->dis_turboedca == 1)
 		return;
 
 	if (rtw_mi_check_status(adapter, MI_ASSOC))
@@ -475,7 +648,7 @@ void rtw_hal_turbo_edca(_adapter *adapter)
 				EDCA_BE_DL = edca_setting_DL[iot_peer];
 			}
 
-			if ((ic_type == RTL8812) || (ic_type == RTL8821) || (ic_type == RTL8192E)) { /* add 8812AU/8812AE */
+			if ((ic_type == RTL8812) || (ic_type == RTL8821) || (ic_type == RTL8192E) || (ic_type == RTL8192F)) { /* add 8812AU/8812AE */
 				EDCA_BE_UL = 0x5ea42b;
 				EDCA_BE_DL = 0x5ea42b;
 
@@ -489,16 +662,101 @@ void rtw_hal_turbo_edca(_adapter *adapter)
 				EDCA_BE_DL = 0x6ea42b;
 			}
 
+			if ((ic_type == RTL8822B)
+			    && (interface_type == RTW_SDIO))
+				EDCA_BE_DL = 0x00431c;
+
+#ifdef CONFIG_RTW_TPT_MODE
+			if ( dvobj->tpt_mode > 0 ) {				
+				EDCA_BE_UL = dvobj->edca_be_ul;
+				EDCA_BE_DL = dvobj->edca_be_dl;
+			}
+#endif /* CONFIG_RTW_TPT_MODE */
+
+			/* keep this condition at last check */
+			if (hal_data->dis_turboedca == 2) {					
+				
+					if (hal_data->edca_param_mode < TURBO_EDCA_MODE_NUM) {
+
+						struct turbo_edca_setting param;
+
+						param = rtw_turbo_edca[hal_data->edca_param_mode];
+
+						EDCA_BE_UL = param.edca_ul;
+						EDCA_BE_DL = param.edca_dl;
+						
+					} else {
+					
+						EDCA_BE_UL = hal_data->edca_param_mode;
+						EDCA_BE_DL = hal_data->edca_param_mode;
+					}				
+			}
+
 			if (traffic_index == DOWN_LINK)
 				edca_param = EDCA_BE_DL;
 			else
 				edca_param = EDCA_BE_UL;
+
+#ifdef CONFIG_EXTEND_LOWRATE_TXOP
+#define TXOP_CCK1M			0x01A6
+#define TXOP_CCK2M			0x00E6
+#define TXOP_CCK5M			0x006B
+#define TXOP_OFD6M			0x0066
+#define TXOP_MCS6M			0x0061
+{
+			struct sta_info *psta;
+			struct macid_ctl_t *macid_ctl = dvobj_to_macidctl(dvobj);
+			u8 mac_id, role, current_rate_id;
+			
+			/*	search all used & connect2AP macid	*/
+			for (mac_id = 0; mac_id < macid_ctl->num; mac_id++) {
+				if (rtw_macid_is_used(macid_ctl, mac_id))  {
+					role = GET_H2CCMD_MSRRPT_PARM_ROLE(&(macid_ctl->h2c_msr[mac_id]));
+					if (role != H2C_MSR_ROLE_AP)
+						continue;
+
+					psta = macid_ctl->sta[mac_id];
+					current_rate_id = rtw_get_current_tx_rate(adapter, psta);
+					/*  Check init tx_rate==1M and set 0x508[31:16]==0x019B(unit 32us) if it is 	*/
+					switch (current_rate_id) {
+						case DESC_RATE1M:
+							edca_param &= 0x0000FFFF;
+							edca_param |= (TXOP_CCK1M<<16);
+							break;
+						case DESC_RATE2M:
+							edca_param &= 0x0000FFFF;
+							edca_param |= (TXOP_CCK2M<<16);
+							break;
+						case DESC_RATE5_5M:
+							edca_param &= 0x0000FFFF;
+							edca_param |= (TXOP_CCK5M<<16);
+							break;
+						case DESC_RATE6M:
+							edca_param &= 0x0000FFFF;
+							edca_param |= (TXOP_OFD6M<<16);
+							break;
+						case DESC_RATEMCS0:
+							edca_param &= 0x0000FFFF;
+							edca_param |= (TXOP_MCS6M<<16);
+							break;
+						default:
+							break;
+					}
+				}
+			}
+}
+#endif /* CONFIG_EXTEND_LOWRATE_TXOP */
+
 #ifdef 	CONFIG_RTW_CUSTOMIZE_BEEDCA
 			edca_param = CONFIG_RTW_CUSTOMIZE_BEEDCA;
 #endif
-			rtw_hal_set_hwreg(adapter, HW_VAR_AC_PARAM_BE, (u8 *)(&edca_param));
 
-			RTW_DBG("Turbo EDCA =0x%x\n", edca_param);
+			if ( edca_param != hal_data->ac_param_be) {
+				
+				rtw_hal_set_hwreg(adapter, HW_VAR_AC_PARAM_BE, (u8 *)(&edca_param));
+
+				RTW_INFO("Turbo EDCA =0x%x\n", edca_param);
+			}
 
 			hal_data->prv_traffic_idx = traffic_index;
 		}
@@ -520,54 +778,54 @@ void rtw_hal_turbo_edca(_adapter *adapter)
 
 s8 rtw_phydm_get_min_rssi(_adapter *adapter)
 {
-	struct PHY_DM_STRUCT *phydm = adapter_to_phydm(adapter);
+	struct dm_struct *phydm = adapter_to_phydm(adapter);
 	s8 rssi_min = 0;
 
-	rssi_min = phydm_cmn_info_query(phydm, (enum phydm_info_query_e) PHYDM_INFO_RSSI_MIN);
+	rssi_min = phydm_cmn_info_query(phydm, (enum phydm_info_query) PHYDM_INFO_RSSI_MIN);
 	return rssi_min;
 }
 
 u8 rtw_phydm_get_cur_igi(_adapter *adapter)
 {
-	struct PHY_DM_STRUCT *phydm = adapter_to_phydm(adapter);
+	struct dm_struct *phydm = adapter_to_phydm(adapter);
 	u8 cur_igi = 0;
 
-	cur_igi = phydm_cmn_info_query(phydm, (enum phydm_info_query_e) PHYDM_INFO_CURR_IGI);
+	cur_igi = phydm_cmn_info_query(phydm, (enum phydm_info_query) PHYDM_INFO_CURR_IGI);
 	return cur_igi;
 }
 
 u32 rtw_phydm_get_phy_cnt(_adapter *adapter, enum phy_cnt cnt)
 {
-	struct PHY_DM_STRUCT *phydm = adapter_to_phydm(adapter);
+	struct dm_struct *phydm = adapter_to_phydm(adapter);
 
 	if (cnt == FA_OFDM)
-		return  phydm_cmn_info_query(phydm, (enum phydm_info_query_e) PHYDM_INFO_FA_OFDM);
+		return  phydm_cmn_info_query(phydm, (enum phydm_info_query) PHYDM_INFO_FA_OFDM);
 	else if (cnt == FA_CCK)
-		return  phydm_cmn_info_query(phydm, (enum phydm_info_query_e) PHYDM_INFO_FA_CCK);
+		return  phydm_cmn_info_query(phydm, (enum phydm_info_query) PHYDM_INFO_FA_CCK);
 	else if (cnt == FA_TOTAL)
-		return  phydm_cmn_info_query(phydm, (enum phydm_info_query_e) PHYDM_INFO_FA_TOTAL);
+		return  phydm_cmn_info_query(phydm, (enum phydm_info_query) PHYDM_INFO_FA_TOTAL);
 	else if (cnt == CCA_OFDM)
-		return	phydm_cmn_info_query(phydm, (enum phydm_info_query_e) PHYDM_INFO_CCA_OFDM);
+		return	phydm_cmn_info_query(phydm, (enum phydm_info_query) PHYDM_INFO_CCA_OFDM);
 	else if (cnt == CCA_CCK)
-		return	phydm_cmn_info_query(phydm, (enum phydm_info_query_e) PHYDM_INFO_CCA_CCK);
+		return	phydm_cmn_info_query(phydm, (enum phydm_info_query) PHYDM_INFO_CCA_CCK);
 	else if (cnt == CCA_ALL)
-		return	phydm_cmn_info_query(phydm, (enum phydm_info_query_e) PHYDM_INFO_CCA_ALL);
+		return	phydm_cmn_info_query(phydm, (enum phydm_info_query) PHYDM_INFO_CCA_ALL);
 	else if (cnt == CRC32_OK_VHT)
-		return	phydm_cmn_info_query(phydm, (enum phydm_info_query_e) PHYDM_INFO_CRC32_OK_VHT);
+		return	phydm_cmn_info_query(phydm, (enum phydm_info_query) PHYDM_INFO_CRC32_OK_VHT);
 	else if (cnt == CRC32_OK_HT)
-		return	phydm_cmn_info_query(phydm, (enum phydm_info_query_e) PHYDM_INFO_CRC32_OK_HT);
+		return	phydm_cmn_info_query(phydm, (enum phydm_info_query) PHYDM_INFO_CRC32_OK_HT);
 	else if (cnt == CRC32_OK_LEGACY)
-		return	phydm_cmn_info_query(phydm, (enum phydm_info_query_e) PHYDM_INFO_CRC32_OK_LEGACY);
+		return	phydm_cmn_info_query(phydm, (enum phydm_info_query) PHYDM_INFO_CRC32_OK_LEGACY);
 	else if (cnt == CRC32_OK_CCK)
-		return	phydm_cmn_info_query(phydm, (enum phydm_info_query_e) PHYDM_INFO_CRC32_OK_CCK);
+		return	phydm_cmn_info_query(phydm, (enum phydm_info_query) PHYDM_INFO_CRC32_OK_CCK);
 	else if (cnt == CRC32_ERROR_VHT)
-		return	phydm_cmn_info_query(phydm, (enum phydm_info_query_e) PHYDM_INFO_CRC32_ERROR_VHT);
+		return	phydm_cmn_info_query(phydm, (enum phydm_info_query) PHYDM_INFO_CRC32_ERROR_VHT);
 	else if (cnt == CRC32_ERROR_HT)
-		return	phydm_cmn_info_query(phydm, (enum phydm_info_query_e) PHYDM_INFO_CRC32_ERROR_HT);
+		return	phydm_cmn_info_query(phydm, (enum phydm_info_query) PHYDM_INFO_CRC32_ERROR_HT);
 	else if (cnt == CRC32_ERROR_LEGACY)
-		return	phydm_cmn_info_query(phydm, (enum phydm_info_query_e) PHYDM_INFO_CRC32_ERROR_LEGACY);
+		return	phydm_cmn_info_query(phydm, (enum phydm_info_query) PHYDM_INFO_CRC32_ERROR_LEGACY);
 	else if (cnt == CRC32_ERROR_CCK)
-		return	phydm_cmn_info_query(phydm, (enum phydm_info_query_e) PHYDM_INFO_CRC32_ERROR_CCK);
+		return	phydm_cmn_info_query(phydm, (enum phydm_info_query) PHYDM_INFO_CRC32_ERROR_CCK);
 	else
 		return 0;
 }
@@ -575,7 +833,7 @@ u32 rtw_phydm_get_phy_cnt(_adapter *adapter, enum phy_cnt cnt)
 u8 rtw_phydm_is_iqk_in_progress(_adapter *adapter)
 {
 	u8 rts = _FALSE;
-	struct PHY_DM_STRUCT *podmpriv = adapter_to_phydm(adapter);
+	struct dm_struct *podmpriv = adapter_to_phydm(adapter);
 
 	odm_acquire_spin_lock(podmpriv, RT_IQK_SPINLOCK);
 	if (podmpriv->rf_calibrate_info.is_iqk_in_progress == _TRUE) {
@@ -593,7 +851,7 @@ void SetHalODMVar(
 	PVOID					pValue1,
 	BOOLEAN					bSet)
 {
-	struct PHY_DM_STRUCT *podmpriv = adapter_to_phydm(Adapter);
+	struct dm_struct *podmpriv = adapter_to_phydm(Adapter);
 	/* _irqL irqL; */
 	switch (eVariable) {
 	case HAL_ODM_STA_INFO: {
@@ -623,8 +881,8 @@ void SetHalODMVar(
 		break;
 	case HAL_ODM_REGULATION:
 		/* used to auto enable/disable adaptivity by SD7 */
-		odm_cmn_info_init(podmpriv, ODM_CMNINFO_DOMAIN_CODE_2G, 0);
-		odm_cmn_info_init(podmpriv, ODM_CMNINFO_DOMAIN_CODE_5G, 0);
+		phydm_adaptivity_info_update(podmpriv, PHYDM_ADAPINFO_DOMAIN_CODE_2G, 0);
+		phydm_adaptivity_info_update(podmpriv, PHYDM_ADAPINFO_DOMAIN_CODE_5G, 0);
 		break;
 	case HAL_ODM_INITIAL_GAIN: {
 		u8 rx_gain = *((u8 *)(pValue1));
@@ -658,10 +916,10 @@ void SetHalODMVar(
 		if (podmpriv->is_linked) {
 			_RTW_PRINT_SEL(sel, "rx_rate = %s", HDATA_RATE(podmpriv->rx_rate));
 			if (IS_HARDWARE_TYPE_8814A(Adapter))
-				_RTW_PRINT_SEL(sel, " RSSI_A = %d(%%), RSSI_B = %d(%%), RSSI_C = %d(%%), RSSI_D = %d(%%)\n",
-					podmpriv->RSSI_A, podmpriv->RSSI_B, podmpriv->RSSI_C, podmpriv->RSSI_D);
+				_RTW_PRINT_SEL(sel, " rssi_a = %d(%%), rssi_b = %d(%%), rssi_c = %d(%%), rssi_d = %d(%%)\n",
+					podmpriv->rssi_a, podmpriv->rssi_b, podmpriv->rssi_c, podmpriv->rssi_d);
 			else
-				_RTW_PRINT_SEL(sel, " RSSI_A = %d(%%), RSSI_B = %d(%%)\n", podmpriv->RSSI_A, podmpriv->RSSI_B);
+				_RTW_PRINT_SEL(sel, " rssi_a = %d(%%), rssi_b = %d(%%)\n", podmpriv->rssi_a, podmpriv->rssi_b);
 #ifdef DBG_RX_SIGNAL_DISPLAY_RAW_DATA
 			rtw_dump_raw_rssi_info(Adapter, sel);
 #endif
@@ -703,7 +961,7 @@ void GetHalODMVar(
 	PVOID					pValue1,
 	PVOID					pValue2)
 {
-	struct PHY_DM_STRUCT *podmpriv = adapter_to_phydm(Adapter);
+	struct dm_struct *podmpriv = adapter_to_phydm(Adapter);
 
 	switch (eVariable) {
 #ifdef CONFIG_ANTENNA_DIVERSITY
@@ -727,7 +985,7 @@ void GetHalODMVar(
 
 enum hal_status
 rtw_phydm_fw_iqk(
-	struct PHY_DM_STRUCT	*p_dm_odm,
+	struct dm_struct	*p_dm_odm,
 	u8 clear,
 	u8 segment
 )
@@ -743,7 +1001,7 @@ rtw_phydm_fw_iqk(
 
 enum hal_status
 rtw_phydm_cfg_phy_para(
-	struct PHY_DM_STRUCT	*p_dm_odm,
+	struct dm_struct	*p_dm_odm,
 	enum phydm_halmac_param config_type,
 	u32 offset,
 	u32 data,
@@ -761,7 +1019,7 @@ rtw_phydm_cfg_phy_para(
 		para.data.mac.offset = offset;
 		para.data.mac.value = data;
 		para.data.mac.msk = mask;
-		para.data.mac.msk_en = 1;
+		para.data.mac.msk_en = (mask) ? 1 : 0;
 		para.data.mac.size = 1;
 	break;
 	case PHYDM_HALMAC_CMD_MAC_W16:
@@ -769,7 +1027,7 @@ rtw_phydm_cfg_phy_para(
 		para.data.mac.offset = offset;
 		para.data.mac.value = data;
 		para.data.mac.msk = mask;
-		para.data.mac.msk_en = 1;
+		para.data.mac.msk_en = (mask) ? 1 : 0;
 		para.data.mac.size = 2;
 	break;
 	case PHYDM_HALMAC_CMD_MAC_W32:
@@ -777,7 +1035,7 @@ rtw_phydm_cfg_phy_para(
 		para.data.mac.offset = offset;
 		para.data.mac.value = data;
 		para.data.mac.msk = mask;
-		para.data.mac.msk_en = 1;
+		para.data.mac.msk_en = (mask) ? 1 : 0;
 		para.data.mac.size = 4;
 	break;
 	case PHYDM_HALMAC_CMD_BB_W8:
@@ -785,7 +1043,7 @@ rtw_phydm_cfg_phy_para(
 		para.data.bb.offset = offset;
 		para.data.bb.value = data;
 		para.data.bb.msk = mask;
-		para.data.bb.msk_en = 1;
+		para.data.bb.msk_en = (mask) ? 1 : 0;
 		para.data.bb.size = 1;
 	break;
 	case PHYDM_HALMAC_CMD_BB_W16:
@@ -793,7 +1051,7 @@ rtw_phydm_cfg_phy_para(
 		para.data.bb.offset = offset;
 		para.data.bb.value = data;
 		para.data.bb.msk = mask;
-		para.data.bb.msk_en = 1;
+		para.data.bb.msk_en = (mask) ? 1 : 0;
 		para.data.bb.size = 2;
 	break;
 	case PHYDM_HALMAC_CMD_BB_W32:
@@ -801,7 +1059,7 @@ rtw_phydm_cfg_phy_para(
 		para.data.bb.offset = offset;
 		para.data.bb.value = data;
 		para.data.bb.msk = mask;
-		para.data.bb.msk_en = 1;
+		para.data.bb.msk_en = (mask) ? 1 : 0;
 		para.data.bb.size = 4;
 	break;
 	case PHYDM_HALMAC_CMD_RF_W:
@@ -809,7 +1067,7 @@ rtw_phydm_cfg_phy_para(
 		para.data.rf.offset = offset;
 		para.data.rf.value = data;
 		para.data.rf.msk = mask;
-		para.data.rf.msk_en = 1;
+		para.data.rf.msk_en = (mask) ? 1 : 0;
 		if (e_rf_path == RF_PATH_A)
 			para.data.rf.path = 0;
 		else if (e_rf_path == RF_PATH_B)
@@ -850,7 +1108,7 @@ void rtw_phydm_wd_lps_lclk_hdl(_adapter *adapter)
 {
 	struct mlme_priv *pmlmepriv = &adapter->mlmepriv;
 	PHAL_DATA_TYPE pHalData = GET_HAL_DATA(adapter);
-	struct PHY_DM_STRUCT	*podmpriv = &(pHalData->odmpriv);
+	struct dm_struct	*podmpriv = &(pHalData->odmpriv);
 	struct sta_priv *pstapriv = &adapter->stapriv;
 	struct sta_info *psta = NULL;
 	u8 rssi_min = 0;
@@ -912,15 +1170,22 @@ void dump_sta_traffic(void *sel, _adapter *adapter, struct sta_info *psta)
 {
 	struct ra_sta_info *ra_info;
 	u8 curr_sgi = _FALSE;
+	u32 tx_tp_mbips, rx_tp_mbips, bi_tp_mbips;
 
 	if (!psta)
 		return;
-	RTW_PRINT_SEL(sel, "====== mac_id : %d ======\n", psta->cmn.mac_id);
+	RTW_PRINT_SEL(sel, "\n");
+	RTW_PRINT_SEL(sel, "====== mac_id : %d [" MAC_FMT "] ======\n",
+		psta->cmn.mac_id, MAC_ARG(psta->cmn.mac_addr));
+
+	if (is_client_associated_to_ap(psta->padapter))
+		RTW_PRINT_SEL(sel, "BCN counts : %d (per-%d second), DTIM Period:%d\n",
+		rtw_get_bcn_cnt(psta->padapter) / 2, 1, rtw_get_bcn_dtim_period(psta->padapter));
 
 	ra_info = &psta->cmn.ra_info;
-	curr_sgi = (ra_info->curr_tx_rate & 0x80) ? _TRUE : _FALSE;
+	curr_sgi = rtw_get_current_tx_sgi(adapter, psta);
 	RTW_PRINT_SEL(sel, "tx_rate : %s(%s)  rx_rate : %s, rx_rate_bmc : %s, rssi : %d %%\n"
-		, HDATA_RATE((ra_info->curr_tx_rate & 0x7F)), (curr_sgi) ? "S" : "L"
+		, HDATA_RATE(rtw_get_current_tx_rate(adapter, psta)), (curr_sgi) ? "S" : "L"
 		, HDATA_RATE((psta->curr_rx_rate & 0x7F)), HDATA_RATE((psta->curr_rx_rate_bmc & 0x7F)), psta->cmn.rssi_stat.rssi
 	);
 
@@ -943,14 +1208,51 @@ void dump_sta_traffic(void *sel, _adapter *adapter, struct sta_info *psta)
 		);
 	}
 
-	RTW_PRINT_SEL(sel, "TP {Tx,Rx,Total} = { %d , %d , %d } Mbps\n",
-		(psta->sta_stats.tx_tp_mbytes << 3), (psta->sta_stats.rx_tp_mbytes << 3),
-		(psta->sta_stats.tx_tp_mbytes + psta->sta_stats.rx_tp_mbytes) << 3);
+	_RTW_PRINT_SEL(sel, "RTW: [TP] ");
+	tx_tp_mbips = psta->sta_stats.tx_tp_kbits >> 10;
+	rx_tp_mbips = psta->sta_stats.rx_tp_kbits >> 10;
+	bi_tp_mbips = tx_tp_mbips + rx_tp_mbips;
 
+	if (tx_tp_mbips)
+		_RTW_PRINT_SEL(sel, "Tx : %d(Mbps) ", tx_tp_mbips);
+	else
+		_RTW_PRINT_SEL(sel, "Tx : %d(Kbps) ", psta->sta_stats.tx_tp_kbits);
+
+	if (rx_tp_mbips) 
+		_RTW_PRINT_SEL(sel, "Rx : %d(Mbps) ", rx_tp_mbips);
+	else
+		_RTW_PRINT_SEL(sel, "Rx : %d(Kbps) ", psta->sta_stats.rx_tp_kbits);
+
+	if (bi_tp_mbips)
+		_RTW_PRINT_SEL(sel, "Total : %d(Mbps)\n", bi_tp_mbips);
+	else
+		_RTW_PRINT_SEL(sel, "Total : %d(Kbps)\n", psta->sta_stats.tx_tp_kbits + psta->sta_stats.rx_tp_kbits);
+
+
+	_RTW_PRINT_SEL(sel, "RTW: [Smooth TP] ");
+	tx_tp_mbips = psta->sta_stats.smooth_tx_tp_kbits >> 10;
+	rx_tp_mbips = psta->sta_stats.smooth_rx_tp_kbits >> 10;
+	bi_tp_mbips = tx_tp_mbips + rx_tp_mbips;
+	if (tx_tp_mbips)
+		_RTW_PRINT_SEL(sel, "Tx : %d(Mbps) ", tx_tp_mbips);
+	else
+		_RTW_PRINT_SEL(sel, "Tx : %d(Kbps) ", psta->sta_stats.smooth_tx_tp_kbits);
+
+	if (rx_tp_mbips) 
+		_RTW_PRINT_SEL(sel, "Rx : %d(Mbps) ", rx_tp_mbips);
+	else
+		_RTW_PRINT_SEL(sel, "Rx : %d(Kbps) ", psta->sta_stats.smooth_rx_tp_kbits);
+
+	if (bi_tp_mbips)
+		_RTW_PRINT_SEL(sel, "Total : %d(Mbps)\n", bi_tp_mbips);
+	else
+		_RTW_PRINT_SEL(sel, "Total : %d(Kbps)\n", psta->sta_stats.smooth_tx_tp_kbits + psta->sta_stats.rx_tp_kbits);
+
+	#if 0
 	RTW_PRINT_SEL(sel, "Moving-AVG TP {Tx,Rx,Total} = { %d , %d , %d } Mbps\n\n",
 		(psta->cmn.tx_moving_average_tp << 3), (psta->cmn.rx_moving_average_tp << 3),
 		(psta->cmn.tx_moving_average_tp + psta->cmn.rx_moving_average_tp) << 3);
-
+	#endif
 }
 
 void dump_sta_info(void *sel, struct sta_info *psta)
@@ -969,6 +1271,7 @@ void dump_sta_info(void *sel, struct sta_info *psta)
 	RTW_PRINT_SEL(sel, "mac_id : %d\n", psta->cmn.mac_id);
 	RTW_PRINT_SEL(sel, "wireless_mode : 0x%02x\n", psta->wireless_mode);
 	RTW_PRINT_SEL(sel, "mimo_type : %d\n", psta->cmn.mimo_type);
+	RTW_PRINT_SEL(sel, "static smps : %s\n", (psta->cmn.sm_ps == SM_PS_STATIC) ? "Y" : "N");
 	RTW_PRINT_SEL(sel, "bw_mode : %s, ra_bw_mode : %s\n",
 			ch_width_str(psta->cmn.bw_mode), ch_width_str(ra_info->ra_bw_mode));
 	RTW_PRINT_SEL(sel, "rate_id : %d\n", ra_info->rate_id);
@@ -980,8 +1283,8 @@ void dump_sta_info(void *sel, struct sta_info *psta)
 	RTW_PRINT_SEL(sel, "is_noisy : %s\n", (ra_info->is_noisy) ? "Y" : "N");
 	RTW_PRINT_SEL(sel, "txrx_state : %d\n", ra_info->txrx_state);/*0: uplink, 1:downlink, 2:bi-direction*/
 
-	curr_tx_sgi = (ra_info->curr_tx_rate & 0x80) ? _TRUE : _FALSE;
-	curr_tx_rate = ra_info->curr_tx_rate & 0x7F;
+	curr_tx_sgi = rtw_get_current_tx_sgi(psta->padapter, psta);
+	curr_tx_rate = rtw_get_current_tx_rate(psta->padapter, psta);
 	RTW_PRINT_SEL(sel, "curr_tx_rate : %s (%s)\n",
 			HDATA_RATE(curr_tx_rate), (curr_tx_sgi) ? "S" : "L");
 	RTW_PRINT_SEL(sel, "curr_tx_bw : %s\n", ch_width_str(ra_info->curr_tx_bw));
@@ -1000,11 +1303,31 @@ void rtw_phydm_ra_registed(_adapter *adapter, struct sta_info *psta)
 	}
 
 	phydm_ra_registed(&hal_data->odmpriv, psta->cmn.mac_id, psta->cmn.rssi_stat.rssi);
-	if (_DRV_DEBUG_ <= rtw_drv_log_level)
-		dump_sta_info(RTW_DBGDUMP, psta);
+	dump_sta_info(RTW_DBGDUMP, psta);
+}
+
+static void init_phydm_info(_adapter *adapter)
+{
+	PHAL_DATA_TYPE	hal_data = GET_HAL_DATA(adapter);
+	struct dm_struct *phydm = &(hal_data->odmpriv);
+
+	odm_cmn_info_init(phydm, ODM_CMNINFO_FW_VER, hal_data->firmware_version);
+	odm_cmn_info_init(phydm, ODM_CMNINFO_FW_SUB_VER, hal_data->firmware_sub_version);
+}
+void rtw_phydm_init(_adapter *adapter)
+{
+	PHAL_DATA_TYPE	hal_data = GET_HAL_DATA(adapter);
+	struct dm_struct	*phydm = &(hal_data->odmpriv);
+
+	init_phydm_info(adapter);
+	odm_dm_init(phydm);
+#ifdef CONFIG_CUSTOMER01_SMART_ANTENNA
+	phydm_pathb_q_matrix_rotate_en(phydm);
+#endif
 }
 
 #ifdef CONFIG_LPS_PG
+/*
 static void _lps_pg_state_update(_adapter *adapter)
 {
 	u8	is_in_lpspg = _FALSE;
@@ -1021,44 +1344,90 @@ static void _lps_pg_state_update(_adapter *adapter)
 	if (psta)
 		psta->cmn.ra_info.disable_ra = (is_in_lpspg) ? _TRUE : _FALSE;
 }
+*/
+void rtw_phydm_lps_pg_hdl(_adapter *adapter, struct sta_info *sta, bool in_lpspg)
+{
+	struct dm_struct *phydm = adapter_to_phydm(adapter);
+	/*u8 rate_id;*/
+
+	if(sta == NULL) {
+		RTW_ERR("%s sta is null\n", __func__);
+		rtw_warn_on(1);
+		return;
+	}
+
+	if (in_lpspg) {
+		sta->cmn.ra_info.disable_ra = _TRUE;
+		sta->cmn.ra_info.disable_pt = _TRUE;
+		/*TODO : DRV fix tx rate*/
+		/*rate_id = phydm_get_rate_from_rssi_lv(phydm, sta->cmn.mac_id);*/
+	} else {
+		sta->cmn.ra_info.disable_ra = _FALSE;
+		sta->cmn.ra_info.disable_pt = _FALSE;
+	}
+
+	rtw_phydm_ra_registed(adapter, sta);
+}
 #endif
 
 /*#define DBG_PHYDM_STATE_CHK*/
 
 
-static u8 _rtw_phydm_rfk_condition_check(_adapter *adapter)
+static u8 _rtw_phydm_rfk_condition_check(_adapter *adapter, u8 is_scaning, u8 ifs_linked)
 {
-	u8 rst = _FALSE;
+	u8 rfk_allowed = _TRUE;
 
-	if (rtw_mi_stayin_union_ch_chk(adapter))
-		rst = _TRUE;
+	#ifdef CONFIG_SKIP_RFK_IN_DM
+	rfk_allowed = _FALSE;
+	if (0)
+		RTW_ERR("[RFK-CHK] RF-K not allowed due to CONFIG_SKIP_RFK_IN_DM\n");
+	return rfk_allowed;
+	#endif
 
 	#ifdef CONFIG_MCC_MODE
 	/*not in MCC State*/
-	if (MCC_EN(adapter))
-		if (!rtw_hal_check_mcc_status(adapter, MCC_STATUS_DOING_MCC))
-			rst = _TRUE;
+	if (MCC_EN(adapter) && 
+		rtw_hal_check_mcc_status(adapter, MCC_STATUS_DOING_MCC)) {
+		rfk_allowed = _FALSE;
+		if (0)
+			RTW_INFO("[RFK-CHK] RF-K not allowed due to doing MCC\n");
+		return rfk_allowed;
+	}
 	#endif
 
 	#if defined(CONFIG_TDLS) && defined(CONFIG_TDLS_CH_SW)
 
 	#endif
 
-	return rst;
+	if (ifs_linked) {
+		if (is_scaning) {
+			rfk_allowed = _FALSE;
+			RTW_DBG("[RFK-CHK] RF-K not allowed due to ifaces under site-survey\n");
+		}
+		else {
+			rfk_allowed = rtw_mi_stayin_union_ch_chk(adapter) ? _TRUE : _FALSE;
+			if (rfk_allowed == _FALSE)
+				RTW_ERR("[RFK-CHK] RF-K not allowed due to ld_iface not stayin union ch\n");
+		}
+	}
+
+	return rfk_allowed;
 }
+
 #if ((RTL8822B_SUPPORT == 1) || (RTL8821C_SUPPORT == 1) || (RTL8814B_SUPPORT == 1))
-static u8 _rtw_phydm_iqk_segment_chk(_adapter *adapter)
+static u8 _rtw_phydm_iqk_segment_chk(_adapter *adapter, u8 ifs_linked)
 {
-	u8 rst = _FALSE;
-	struct dvobj_priv *dvobj = adapter_to_dvobj(adapter);
+	u8 iqk_sgt = _FALSE;
 
 #if 0
-	if (dvobj->traffic_stat.cur_tx_tp > 2 || dvobj->traffic_stat.cur_rx_tp > 2)
+	struct dvobj_priv *dvobj = adapter_to_dvobj(adapter);
+	if (ifs_linked && (dvobj->traffic_stat.cur_tx_tp > 2 || dvobj->traffic_stat.cur_rx_tp > 2))
 		rst = _TRUE;
 #else
-	rst = _TRUE;
+	if (ifs_linked)
+		iqk_sgt = _TRUE;
 #endif
-	return rst;
+	return iqk_sgt;
 }
 #endif
 
@@ -1092,16 +1461,93 @@ static u8 _rtw_phydm_pwr_tracking_rate_check(_adapter *adapter)
 	return tx_rate;
 }
 
-void rtw_phydm_watchdog(_adapter *adapter)
+#ifdef CONFIG_DYNAMIC_SOML
+void rtw_dyn_soml_byte_update(_adapter *adapter, u8 data_rate, u32 size)
+{
+	struct dm_struct *phydm = adapter_to_phydm(adapter);
+
+	phydm_soml_bytes_acq(phydm, data_rate, size);
+}
+
+void rtw_dyn_soml_para_set(_adapter *adapter, u8 train_num, u8 intvl,
+			u8 period, u8 delay)
+{
+	struct dm_struct *phydm = adapter_to_phydm(adapter);
+
+	phydm_adaptive_soml_para_set(phydm, train_num, intvl, period, delay);
+	RTW_INFO("%s.\n", __func__);
+}
+
+void rtw_dyn_soml_config(_adapter *adapter)
+{
+	RTW_INFO("%s.\n", __func__);
+
+	if (adapter->registrypriv.dyn_soml_en == 1) {
+		/* Must after phydm_adaptive_soml_init() */
+		rtw_hal_set_hwreg(adapter , HW_VAR_SET_SOML_PARAM , NULL);
+		RTW_INFO("dyn_soml_en = 1\n");
+	} else {
+		if (adapter->registrypriv.dyn_soml_en == 2) {
+			rtw_dyn_soml_para_set(adapter, 
+				adapter->registrypriv.dyn_soml_train_num, 
+				adapter->registrypriv.dyn_soml_interval, 
+				adapter->registrypriv.dyn_soml_period,
+				adapter->registrypriv.dyn_soml_delay);
+			RTW_INFO("dyn_soml_en = 2\n");
+			RTW_INFO("dyn_soml_en, param = %d, %d, %d, %d\n",
+				adapter->registrypriv.dyn_soml_train_num,
+				adapter->registrypriv.dyn_soml_interval, 
+				adapter->registrypriv.dyn_soml_period,
+				adapter->registrypriv.dyn_soml_delay);
+		} else if (adapter->registrypriv.dyn_soml_en == 0) {
+			RTW_INFO("dyn_soml_en = 0\n");
+		} else
+			RTW_ERR("%s, wrong setting: dyn_soml_en = %d\n", __func__,
+				adapter->registrypriv.dyn_soml_en);
+	}
+}
+#endif
+
+
+void rtw_phydm_read_efuse(_adapter *adapter)
+{
+	PHAL_DATA_TYPE hal_data = GET_HAL_DATA(adapter);
+	struct dm_struct *phydm = &(hal_data->odmpriv);
+
+	/*PHYDM API - thermal trim*/
+	phydm_get_thermal_trim_offset(phydm);
+	/*PHYDM API - power trim*/
+	phydm_get_power_trim_offset(phydm);
+}
+
+#ifdef CONFIG_LPS_PWR_TRACKING
+void rtw_phydm_pwr_tracking_directly(_adapter *adapter)
+{
+	PHAL_DATA_TYPE hal_data = GET_HAL_DATA(adapter);
+	u8 rfk_forbidden = _TRUE;
+	u8 is_linked = _FALSE;
+
+	if (rtw_mi_check_status(adapter, MI_ASSOC))
+		is_linked = _TRUE;
+
+	rfk_forbidden = (_rtw_phydm_rfk_condition_check(adapter, hal_data->bScanInProcess, is_linked) == _TRUE) ? _FALSE : _TRUE;
+	halrf_cmn_info_set(&hal_data->odmpriv, HALRF_CMNINFO_RFK_FORBIDDEN, rfk_forbidden);
+
+	odm_txpowertracking_direct_ce(&hal_data->odmpriv);
+}
+#endif
+
+void rtw_phydm_watchdog(_adapter *adapter, bool in_lps)
 {
 	u8	bLinked = _FALSE;
 	u8	bsta_state = _FALSE;
 	u8	bBtDisabled = _TRUE;
-	u8	rfk_forbidden = _TRUE;
-	u8	segment_iqk = _TRUE;
+	u8	rfk_forbidden = _FALSE;
+	#if ((RTL8822B_SUPPORT == 1) || (RTL8821C_SUPPORT == 1) || (RTL8814B_SUPPORT == 1))
+	u8	segment_iqk = _FALSE;
+	#endif
 	u8	tx_unlinked_low_rate = 0xFF;
 	PHAL_DATA_TYPE	pHalData = GET_HAL_DATA(adapter);
-	struct pwrctrl_priv *pwrctl = adapter_to_pwrctl(adapter);
 
 	if (!rtw_is_hw_init_completed(adapter)) {
 		RTW_DBG("%s skip due to hw_init_completed == FALSE\n", __func__);
@@ -1121,33 +1567,28 @@ void rtw_phydm_watchdog(_adapter *adapter)
 	odm_cmn_info_update(&pHalData->odmpriv, ODM_CMNINFO_LINK, bLinked);
 	odm_cmn_info_update(&pHalData->odmpriv, ODM_CMNINFO_STATION_STATE, bsta_state);
 
-#ifdef CONFIG_BT_COEXIST
+	#ifdef CONFIG_BT_COEXIST
 	bBtDisabled = rtw_btcoex_IsBtDisabled(adapter);
-#endif /* CONFIG_BT_COEXIST */
+	#endif /* CONFIG_BT_COEXIST */
 	odm_cmn_info_update(&pHalData->odmpriv, ODM_CMNINFO_BT_ENABLED,
 							(bBtDisabled == _TRUE) ? _FALSE : _TRUE);
-	odm_cmn_info_update(&pHalData->odmpriv, ODM_CMNINFO_POWER_TRAINING,
-							(pHalData->bDisableTXPowerTraining) ? _TRUE : _FALSE);
-#ifdef CONFIG_LPS_PG
-	_lps_pg_state_update(adapter);
-#endif
 
-	if (bLinked == _TRUE) {
-		rfk_forbidden = (_rtw_phydm_rfk_condition_check(adapter) == _TRUE) ? _FALSE : _TRUE;
-		halrf_cmn_info_set(&pHalData->odmpriv, HALRF_CMNINFO_RFK_FORBIDDEN, rfk_forbidden);
+	rfk_forbidden = (_rtw_phydm_rfk_condition_check(adapter, pHalData->bScanInProcess, bLinked) == _TRUE) ? _FALSE : _TRUE;
+	halrf_cmn_info_set(&pHalData->odmpriv, HALRF_CMNINFO_RFK_FORBIDDEN, rfk_forbidden);
 
-		#if ((RTL8822B_SUPPORT == 1) || (RTL8821C_SUPPORT == 1) || (RTL8814B_SUPPORT == 1))
-		segment_iqk = _rtw_phydm_iqk_segment_chk(adapter);
-		halrf_cmn_info_set(&pHalData->odmpriv, HALRF_CMNINFO_IQK_SEGMENT, segment_iqk);
-		#endif
-	} else {
+	#if ((RTL8822B_SUPPORT == 1) || (RTL8821C_SUPPORT == 1) || (RTL8814B_SUPPORT == 1))
+	segment_iqk = _rtw_phydm_iqk_segment_chk(adapter, bLinked);
+	halrf_cmn_info_set(&pHalData->odmpriv, HALRF_CMNINFO_IQK_SEGMENT, segment_iqk);
+	#endif
+	#ifdef DBG_PHYDM_STATE_CHK
+	RTW_INFO("%s rfk_forbidden = %s, segment_iqk = %s\n",
+			__func__, (rfk_forbidden) ? "Y" : "N", (segment_iqk) ? "Y" : "N");
+	#endif
+
+	if (bLinked == _FALSE) {
 		tx_unlinked_low_rate = _rtw_phydm_pwr_tracking_rate_check(adapter);
 		halrf_cmn_info_set(&pHalData->odmpriv, HALRF_CMNINFO_RATE_INDEX, tx_unlinked_low_rate);
 	}
-#ifdef DBG_PHYDM_STATE_CHK
-	RTW_INFO("%s rfk_forbidden = %s, segment_iqk = %s\n",
-		__func__, (rfk_forbidden) ? "Y" : "N", (segment_iqk) ? "Y" : "N");
-#endif
 
 	/*if (!rtw_mi_stayin_union_band_chk(adapter)) {
 		#ifdef DBG_PHYDM_STATE_CHK
@@ -1155,7 +1596,12 @@ void rtw_phydm_watchdog(_adapter *adapter)
 		#endif
 		goto _exit;
 	}*/
-	if (pwrctl->bpower_saving)
+
+	#ifdef CONFIG_TDMADIG
+	rtw_phydm_tdmadig(adapter, TDMADIG_NON_INIT);
+	#endif/*CONFIG_TDMADIG*/
+
+	if (in_lps)
 		phydm_watchdog_lps(&pHalData->odmpriv);
 	else
 		phydm_watchdog(&pHalData->odmpriv);
diff --git a/rtl8723DS/hal/hal_dm.h b/rtl8723DS/hal/hal_dm.h
index 93ed020..6250212 100755..100644
--- a/rtl8723DS/hal/hal_dm.h
+++ b/rtl8723DS/hal/hal_dm.h
@@ -16,8 +16,14 @@
 #define __HAL_DM_H__
 
 #define adapter_to_phydm(adapter) (&(GET_HAL_DATA(adapter)->odmpriv))
-
+#define dvobj_to_phydm(dvobj) adapter_to_phydm(dvobj_get_primary_adapter(dvobj))
+#ifdef CONFIG_TDMADIG
+void rtw_phydm_tdmadig(_adapter *adapter, u8 state);
+#endif
+void rtw_phydm_priv_init(_adapter *adapter);
 void Init_ODM_ComInfo(_adapter *adapter);
+void rtw_phydm_init(_adapter *adapter);
+
 void rtw_hal_turbo_edca(_adapter *adapter);
 u8 rtw_phydm_is_iqk_in_progress(_adapter *adapter);
 
@@ -34,7 +40,13 @@ void SetHalODMVar(
 
 void rtw_phydm_ra_registed(_adapter *adapter, struct sta_info *psta);
 
-void rtw_phydm_watchdog(_adapter *adapter);
+#ifdef CONFIG_DYNAMIC_SOML
+void rtw_dyn_soml_byte_update(_adapter *adapter, u8 data_rate, u32 size);
+void rtw_dyn_soml_para_set(_adapter *adapter, u8 train_num, u8 intvl,
+			u8 period, u8 delay);
+void rtw_dyn_soml_config(_adapter *adapter);
+#endif
+void rtw_phydm_watchdog(_adapter *adapter, bool in_lps);
 
 void rtw_hal_update_iqk_fw_offload_cap(_adapter *adapter);
 void dump_sta_info(void *sel, struct sta_info *psta);
@@ -55,7 +67,12 @@ extern void phydm_rssi_monitor_check(void *p_dm_void);
 void rtw_phydm_wd_lps_lclk_hdl(_adapter *adapter);
 void rtw_phydm_watchdog_in_lps_lclk(_adapter *adapter);
 #endif
-
+#ifdef CONFIG_TDMADIG
+enum rtw_tdmadig_state{
+	TDMADIG_INIT,
+	TDMADIG_NON_INIT,
+};
+#endif
 enum phy_cnt {
 	FA_OFDM,
 	FA_CCK,
@@ -76,5 +93,19 @@ u32 rtw_phydm_get_phy_cnt(_adapter *adapter, enum phy_cnt cnt);
 #if ((RTL8822B_SUPPORT == 1) || (RTL8821C_SUPPORT == 1) || (RTL8814B_SUPPORT == 1))
 void rtw_phydm_iqk_trigger(_adapter *adapter);
 #endif
+void rtw_phydm_read_efuse(_adapter *adapter);
+
+#ifdef CONFIG_SUPPORT_DYNAMIC_TXPWR
+void rtw_phydm_set_dyntxpwr(_adapter *adapter, u8 *desc, u8 mac_id);
+#endif
+#ifdef CONFIG_RTW_TX_2PATH_EN
+void rtw_phydm_tx_2path_en(_adapter *adapter);
+#endif
+#ifdef CONFIG_LPS_PG
+void rtw_phydm_lps_pg_hdl(_adapter *adapter, struct sta_info *sta, bool in_lpspg);
+#endif
+#ifdef CONFIG_LPS_PWR_TRACKING
+void rtw_phydm_pwr_tracking_directly(_adapter *adapter);
+#endif
 
 #endif /* __HAL_DM_H__ */
diff --git a/rtl8723DS/hal/hal_dm_acs.c b/rtl8723DS/hal/hal_dm_acs.c
index 465bd1a..5c19d99 100755..100644
--- a/rtl8723DS/hal/hal_dm_acs.c
+++ b/rtl8723DS/hal/hal_dm_acs.c
@@ -79,15 +79,15 @@ void rtw_acs_version_dump(void *sel, _adapter *adapter)
 }
 u8 rtw_phydm_clm_ratio(_adapter *adapter)
 {
-	struct PHY_DM_STRUCT *phydm = adapter_to_phydm(adapter);
+	struct dm_struct *phydm = adapter_to_phydm(adapter);
 
-	return phydm_cmn_info_query(phydm, (enum phydm_info_query_e) PHYDM_INFO_CLM_RATIO);
+	return phydm_cmn_info_query(phydm, (enum phydm_info_query) PHYDM_INFO_CLM_RATIO);
 }
 u8 rtw_phydm_nhm_ratio(_adapter *adapter)
 {
-	struct PHY_DM_STRUCT *phydm = adapter_to_phydm(adapter);
+	struct dm_struct *phydm = adapter_to_phydm(adapter);
 
-	return phydm_cmn_info_query(phydm, (enum phydm_info_query_e) PHYDM_INFO_NHM_RATIO);
+	return phydm_cmn_info_query(phydm, (enum phydm_info_query) PHYDM_INFO_NHM_RATIO);
 }
 void rtw_acs_reset(_adapter *adapter)
 {
@@ -95,44 +95,136 @@ void rtw_acs_reset(_adapter *adapter)
 	struct auto_chan_sel *pacs = &hal_data->acs;
 
 	_rtw_memset(pacs, 0, sizeof(struct auto_chan_sel));
+	#ifdef CONFIG_RTW_ACS_DBG
+	rtw_acs_adv_reset(adapter);
+	#endif /*CONFIG_RTW_ACS_DBG*/
+}
+
+#ifdef CONFIG_RTW_ACS_DBG
+u8 rtw_is_acs_igi_valid(_adapter *adapter)
+{
+	HAL_DATA_TYPE *hal_data = GET_HAL_DATA(adapter);
+	struct auto_chan_sel *pacs = &hal_data->acs;
+
+	if ((pacs->igi) && ((pacs->igi >= 0x1E) || (pacs->igi < 0x60)))
+		return _TRUE;
+
+	return _FALSE;
+}
+void rtw_acs_adv_setting(_adapter *adapter, RT_SCAN_TYPE scan_type, u16 scan_time, u8 igi, u8 bw)
+{
+	HAL_DATA_TYPE *hal_data = GET_HAL_DATA(adapter);
+	struct auto_chan_sel *pacs = &hal_data->acs;
+	struct mlme_ext_priv *pmlmeext = &adapter->mlmeextpriv;
+	struct mlme_ext_info *pmlmeinfo = &pmlmeext->mlmext_info;
+
+	pacs->scan_type = scan_type;
+	pacs->scan_time = scan_time;
+	pacs->igi = igi;
+	pacs->bw = bw;
+	RTW_INFO("[ACS] ADV setting - scan_type:%c, ch_ms:%d(ms), igi:0x%02x, bw:%d\n",
+		pacs->scan_type ? 'A' : 'P', pacs->scan_time, pacs->igi, pacs->bw);
 }
+void rtw_acs_adv_reset(_adapter *adapter)
+{
+	rtw_acs_adv_setting(adapter, SCAN_ACTIVE, 0, 0, 0);
+}
+#endif /*CONFIG_RTW_ACS_DBG*/
 
-void rtw_acs_trigger(_adapter *adapter, u16 scan_time_ms, u8 scan_chan)
+void rtw_acs_trigger(_adapter *adapter, u16 scan_time_ms, u8 scan_chan, enum NHM_PID pid)
 {
 	HAL_DATA_TYPE *hal_data = GET_HAL_DATA(adapter);
-	struct PHY_DM_STRUCT *phydm = adapter_to_phydm(adapter);
-	u16 sample_times = 0;
+	struct dm_struct *phydm = adapter_to_phydm(adapter);
+#if (RTK_ACS_VERSION == 3)
+	struct clm_para_info clm_para;
+	struct nhm_para_info nhm_para;
+	struct env_trig_rpt trig_rpt;
+
+	scan_time_ms -= 10;
+
+	init_acs_clm(clm_para, scan_time_ms);
+
+	if (pid == NHM_PID_IEEE_11K_HIGH)
+		init_11K_high_nhm(nhm_para, scan_time_ms);
+	else if (pid == NHM_PID_IEEE_11K_LOW)
+		init_11K_low_nhm(nhm_para, scan_time_ms);
+	else
+		init_acs_nhm(nhm_para, scan_time_ms);
+
+	hal_data->acs.trig_rst = phydm_env_mntr_trigger(phydm, &nhm_para, &clm_para, &trig_rpt);
+	if (hal_data->acs.trig_rst == (NHM_SUCCESS | CLM_SUCCESS)) {
+		hal_data->acs.trig_rpt.clm_rpt_stamp = trig_rpt.clm_rpt_stamp;
+		hal_data->acs.trig_rpt.nhm_rpt_stamp = trig_rpt.nhm_rpt_stamp;
+		/*RTW_INFO("[ACS] trigger success (rst = 0x%02x, clm_stamp:%d, nhm_stamp:%d)\n",
+			hal_data->acs.trig_rst, hal_data->acs.trig_rpt.clm_rpt_stamp, hal_data->acs.trig_rpt.nhm_rpt_stamp);*/
+	} else
+		RTW_ERR("[ACS] trigger failed (rst = 0x%02x)\n", hal_data->acs.trig_rst);
+#else
+	phydm_ccx_monitor_trigger(phydm, scan_time_ms);
+#endif
 
 	hal_data->acs.trigger_ch = scan_chan;
-	/*scan_time - ms ,1ms can sample 250 times*/
-	sample_times = scan_time_ms * 250;
-	phydm_ccx_monitor_trigger(phydm, sample_times);
+	hal_data->acs.triggered = _TRUE;
 
 	#ifdef CONFIG_RTW_ACS_DBG
-	RTW_INFO("[ACS] Trigger CH:%d, Times:%d\n", hal_data->acs.trigger_ch, sample_times);
+	RTW_INFO("[ACS] Trigger CH:%d, Times:%d\n", hal_data->acs.trigger_ch, scan_time_ms);
 	#endif
 }
 void rtw_acs_get_rst(_adapter *adapter)
 {
 	HAL_DATA_TYPE *hal_data = GET_HAL_DATA(adapter);
-	struct PHY_DM_STRUCT *phydm = adapter_to_phydm(adapter);
+	struct dm_struct *phydm = adapter_to_phydm(adapter);
 	int chan_idx = -1;
 	u8 cur_chan = hal_data->acs.trigger_ch;
 
 	if (cur_chan == 0)
 		return;
 
+	if (!hal_data->acs.triggered)
+		return;
+
 	chan_idx = rtw_chset_search_ch(adapter_to_chset(adapter), cur_chan);
 	if ((chan_idx == -1) || (chan_idx >= MAX_CHANNEL_NUM)) {
 		RTW_ERR("[ACS] %s can't get chan_idx(CH:%d)\n", __func__, cur_chan);
 		return;
 	}
+#if (RTK_ACS_VERSION == 3)
+	if (!(hal_data->acs.trig_rst == (NHM_SUCCESS | CLM_SUCCESS))) {
+		RTW_ERR("[ACS] get_rst return, due to acs trigger failed\n");
+		return;
+	}
 
+	{
+		struct env_mntr_rpt rpt = {0};
+		u8 rst;
+
+		rst = phydm_env_mntr_result(phydm, &rpt);
+		if ((rst == (NHM_SUCCESS | CLM_SUCCESS)) &&
+			(rpt.clm_rpt_stamp == hal_data->acs.trig_rpt.clm_rpt_stamp) &&
+			(rpt.nhm_rpt_stamp == hal_data->acs.trig_rpt.nhm_rpt_stamp)){
+			hal_data->acs.clm_ratio[chan_idx] = rpt.clm_ratio;
+			hal_data->acs.nhm_ratio[chan_idx] = rpt.nhm_ratio;
+			_rtw_memcpy(&hal_data->acs.nhm[chan_idx][0], rpt.nhm_result, NHM_RPT_NUM);
+
+			/*RTW_INFO("[ACS] get_rst success (rst = 0x%02x, clm_stamp:%d:%d, nhm_stamp:%d:%d)\n",
+			rst,
+			hal_data->acs.trig_rpt.clm_rpt_stamp, rpt.clm_rpt_stamp,
+			hal_data->acs.trig_rpt.nhm_rpt_stamp, rpt.nhm_rpt_stamp);*/
+		} else {
+			RTW_ERR("[ACS] get_rst failed (rst = 0x%02x, clm_stamp:%d:%d, nhm_stamp:%d:%d)\n",
+			rst,
+			hal_data->acs.trig_rpt.clm_rpt_stamp, rpt.clm_rpt_stamp,
+			hal_data->acs.trig_rpt.nhm_rpt_stamp, rpt.nhm_rpt_stamp);
+		}
+	}
+
+#else
 	phydm_ccx_monitor_result(phydm);
 
 	hal_data->acs.clm_ratio[chan_idx] = rtw_phydm_clm_ratio(adapter);
 	hal_data->acs.nhm_ratio[chan_idx] = rtw_phydm_nhm_ratio(adapter);
-
+#endif
+	hal_data->acs.triggered = _FALSE;
 	#ifdef CONFIG_RTW_ACS_DBG
 	RTW_INFO("[ACS] Result CH:%d, CLM:%d NHM:%d\n",
 		cur_chan, hal_data->acs.clm_ratio[chan_idx], hal_data->acs.nhm_ratio[chan_idx]);
@@ -191,6 +283,9 @@ void rtw_acs_info_dump(void *sel, _adapter *adapter)
 	_RTW_PRINT_SEL(sel, "Best 5G Channel:%d\n\n", hal_data->acs.best_chan_5g);
 
 	#ifdef CONFIG_RTW_ACS_DBG
+	_RTW_PRINT_SEL(sel, "Advanced setting - scan_type:%c, ch_ms:%d(ms), igi:0x%02x, bw:%d\n",
+		hal_data->acs.scan_type ? 'A' : 'P', hal_data->acs.scan_time, hal_data->acs.igi, hal_data->acs.bw);
+
 	_RTW_PRINT_SEL(sel, "BW  20MHz\n");
 	_RTW_PRINT_SEL(sel, "%5s  %3s  %3s  %3s(%%)  %3s(%%)  %3s\n",
 						"Index", "CH", "BSS", "CLM", "NHM", "ITF");
@@ -373,7 +468,7 @@ void rtw_noise_info_dump(void *sel, _adapter *adapter)
 void rtw_noise_measure(_adapter *adapter, u8 chan, u8 is_pause_dig, u8 igi_value, u32 max_time)
 {
 	HAL_DATA_TYPE *hal_data = GET_HAL_DATA(adapter);
-	struct PHY_DM_STRUCT *phydm = &hal_data->odmpriv;
+	struct dm_struct *phydm = &hal_data->odmpriv;
 	int chan_idx = -1;
 	s16 noise = 0;
 
diff --git a/rtl8723DS/hal/hal_dm_acs.h b/rtl8723DS/hal/hal_dm_acs.h
index 63370a8..871c144 100755..100644
--- a/rtl8723DS/hal/hal_dm_acs.h
+++ b/rtl8723DS/hal/hal_dm_acs.h
@@ -15,7 +15,47 @@
 #ifndef __HAL_DM_ACS_H__
 #define __HAL_DM_ACS_H__
 #ifdef CONFIG_RTW_ACS
-#define RTK_ACS_VERSION	1
+#define RTK_ACS_VERSION	3
+
+#if (RTK_ACS_VERSION == 3)
+enum NHM_PID {
+	NHM_PID_ACS,
+	NHM_PID_IEEE_11K_HIGH,
+	NHM_PID_IEEE_11K_LOW,
+};
+
+#define init_clm_param(clm, app, lv, time) \
+	do {\
+		clm.clm_app = app;\
+		clm.clm_lv = lv;\
+		clm.mntr_time = time;\
+	} while (0)
+
+#define init_nhm_param(nhm, txon, cca, cnt_opt, app, lv, time) \
+	do {\
+		nhm.incld_txon = txon;\
+		nhm.incld_cca = cca;\
+		nhm.div_opt = cnt_opt;\
+		nhm.nhm_app = app;\
+		nhm.nhm_lv = lv;\
+		nhm.mntr_time = time;\
+	} while (0)
+
+	
+#define init_acs_clm(clm, time) \
+	init_clm_param(clm, CLM_ACS, CLM_LV_2, time)
+
+#define init_acs_nhm(nhm, time) \
+	init_nhm_param(nhm, NHM_EXCLUDE_TXON, NHM_EXCLUDE_CCA, NHM_CNT_ALL, NHM_ACS, NHM_LV_2, time)
+
+#define init_11K_high_nhm(nhm, time) \
+	init_nhm_param(nhm, NHM_EXCLUDE_TXON, NHM_EXCLUDE_CCA, NHM_CNT_ALL, IEEE_11K_HIGH, NHM_LV_2, time)
+	
+#define init_11K_low_nhm(nhm, time) \
+		init_nhm_param(nhm, NHM_EXCLUDE_TXON, NHM_EXCLUDE_CCA, NHM_CNT_ALL, IEEE_11K_LOW, NHM_LV_2, time)
+
+
+#endif /*(RTK_ACS_VERSION == 3)*/
 void rtw_acs_version_dump(void *sel, _adapter *adapter);
 extern void phydm_ccx_monitor_trigger(void *p_dm_void, u16 monitor_time);
 extern void phydm_ccx_monitor_result(void *p_dm_void);
@@ -29,29 +69,65 @@ enum ACS_STATE {
 	ACS_ENABLE,
 };
 
+#define ACS_BW_20M	BIT(0)
+#define ACS_BW_40M	BIT(1)
+#define ACS_BW_80M	BIT(2)
+#define ACS_BW_160M	BIT(3)
+
 struct auto_chan_sel {
 	ATOMIC_T state;
 	u8 trigger_ch;
+	bool triggered;
 	u8 clm_ratio[MAX_CHANNEL_NUM];
 	u8 nhm_ratio[MAX_CHANNEL_NUM];
+	#if (RTK_ACS_VERSION == 3)
+	u8 nhm[MAX_CHANNEL_NUM][NHM_RPT_NUM];
+	#endif
 	u8 bss_nums[MAX_CHANNEL_NUM];
 	u8 interference_time[MAX_CHANNEL_NUM];
 	u8 cur_ch_clm_ratio;
 	u8 cur_ch_nhm_ratio;
 	u8 best_chan_5g;
 	u8 best_chan_24g;
+
+	#if (RTK_ACS_VERSION == 3)
+	u8 trig_rst;
+	struct env_trig_rpt	trig_rpt;
+	#endif
+
+	#ifdef CONFIG_RTW_ACS_DBG
+	RT_SCAN_TYPE scan_type;
+	u16 scan_time;
+	u8 igi;
+	u8 bw;
+	#endif
 };
 
 #define rtw_acs_get_best_chan_24g(adapter)		(GET_HAL_DATA(adapter)->acs.best_chan_24g)
 #define rtw_acs_get_best_chan_5g(adapter)		(GET_HAL_DATA(adapter)->acs.best_chan_5g)
 
+#ifdef CONFIG_RTW_ACS_DBG
+#define rtw_is_acs_passiv_scan(adapter)	(((GET_HAL_DATA(adapter)->acs.scan_type) == SCAN_PASSIVE) ? _TRUE : _FALSE)
+
+#define rtw_acs_get_adv_st(adapter)	(GET_HAL_DATA(adapter)->acs.scan_time)
+#define rtw_is_acs_st_valid(adapter)	((GET_HAL_DATA(adapter)->acs.scan_time) ? _TRUE : _FALSE)
+
+#define rtw_acs_get_adv_igi(adapter)	(GET_HAL_DATA(adapter)->acs.igi)
+u8 rtw_is_acs_igi_valid(_adapter *adapter);
+
+#define rtw_acs_get_adv_bw(adapter)	(GET_HAL_DATA(adapter)->acs.bw)
+
+void rtw_acs_adv_setting(_adapter *adapter, RT_SCAN_TYPE scan_type, u16 scan_time, u8 igi, u8 bw);
+void rtw_acs_adv_reset(_adapter *adapter);
+#endif
+
 u8 rtw_acs_get_clm_ratio_by_ch_num(_adapter *adapter, u8 chan);
 u8 rtw_acs_get_clm_ratio_by_ch_idx(_adapter *adapter, u8 ch_idx);
 u8 rtw_acs_get_nhm_ratio_by_ch_num(_adapter *adapter, u8 chan);
 u8 rtw_acs_get_num_ratio_by_ch_idx(_adapter *adapter, u8 ch_idx);
 
 void rtw_acs_reset(_adapter *adapter);
-void rtw_acs_trigger(_adapter *adapter, u16 scan_time_ms, u8 scan_chan);
+void rtw_acs_trigger(_adapter *adapter, u16 scan_time_ms, u8 scan_chan, enum NHM_PID pid);
 void rtw_acs_get_rst(_adapter *adapter);
 void rtw_acs_select_best_chan(_adapter *adapter);
 void rtw_acs_info_dump(void *sel, _adapter *adapter);
diff --git a/rtl8723DS/hal/hal_halmac.c b/rtl8723DS/hal/hal_halmac.c
index 21e2c86..0b74ecb 100755..100644
--- a/rtl8723DS/hal/hal_halmac.c
+++ b/rtl8723DS/hal/hal_halmac.c
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2015 - 2017 Realtek Corporation.
+ * Copyright(c) 2015 - 2018 Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -18,10 +18,17 @@
 #include <hal_data.h>		/* efuse, PHAL_DATA_TYPE and etc. */
 #include "hal_halmac.h"		/* dvobj_to_halmac() and ect. */
 
+/*
+ * HALMAC take return value 0 for fail and 1 for success to replace
+ * _FALSE/_TRUE after V1_04_09
+ */
+#define RTW_HALMAC_FAIL			0
+#define RTW_HALMAC_SUCCESS		1
+
 #define DEFAULT_INDICATOR_TIMELMT	1000	/* ms */
 #define MSG_PREFIX			"[HALMAC]"
 
-/*#define RTW_HALMAC_DLFW_MEM_NO_STOP_TX*/
+#define RTW_HALMAC_DLFW_MEM_NO_STOP_TX
 
 /*
  * Driver API for HALMAC operations
@@ -181,19 +188,20 @@ exit:
 static u8 _halmac_sdio_reg_read_n(void *p, u32 offset, u32 size, u8 *data)
 {
 	struct dvobj_priv *d = (struct dvobj_priv *)p;
-	PSDIO_DATA psdio = &d->intf_data;
 	u8 *pbuf;
 	u8 ret;
-	u8 rst = _FALSE;
+	u8 rst = RTW_HALMAC_FAIL;
 	u32 sdio_read_size;
 
 
+	if (!data)
+		return rst;
+
 	sdio_read_size = RND4(size);
-	if (sdio_read_size > psdio->block_transfer_len)
-		sdio_read_size = _RND(sdio_read_size, psdio->block_transfer_len);
+	sdio_read_size = rtw_sdio_cmd53_align_size(d, sdio_read_size);
 
 	pbuf = rtw_zmalloc(sdio_read_size);
-	if ((!pbuf) || (!data))
+	if (!pbuf)
 		return rst;
 
 	ret = rtw_sdio_read_cmd53(d, offset, pbuf, sdio_read_size);
@@ -203,7 +211,7 @@ static u8 _halmac_sdio_reg_read_n(void *p, u32 offset, u32 size, u8 *data)
 	}
 
 	_rtw_memcpy(data, pbuf, size);
-	rst = _TRUE;
+	rst = RTW_HALMAC_SUCCESS;
 exit:
 	rtw_mfree(pbuf, sdio_read_size);
 
@@ -275,6 +283,22 @@ static void _halmac_sdio_reg_write_32(void *p, u32 offset, u32 val)
 	rtw_mfree(pbuf, 4);
 }
 
+static u8 _halmac_sdio_read_cia(void *p, u32 offset)
+{
+	struct dvobj_priv *d;
+	u8 data = 0;
+	u8 ret;
+
+
+	d = (struct dvobj_priv *)p;
+
+	ret = rtw_sdio_f0_read(d, offset, &data, 1);
+	if (ret == _FAIL)
+		RTW_ERR("%s: I/O FAIL!\n", __FUNCTION__);
+
+	return data;
+}
+
 #else /* !CONFIG_SDIO_HCI */
 
 static u8 _halmac_reg_read_8(void *p, u32 offset)
@@ -362,7 +386,7 @@ static void _halmac_reg_write_32(void *p, u32 offset, u32 val)
 static u8 _halmac_mfree(void *p, void *buffer, u32 size)
 {
 	rtw_mfree(buffer, size);
-	return _TRUE;
+	return RTW_HALMAC_SUCCESS;
 }
 
 static void *_halmac_malloc(void *p, u32 size)
@@ -373,30 +397,36 @@ static void *_halmac_malloc(void *p, u32 size)
 static u8 _halmac_memcpy(void *p, void *dest, void *src, u32 size)
 {
 	_rtw_memcpy(dest, src, size);
-	return _TRUE;
+	return RTW_HALMAC_SUCCESS;
 }
 
 static u8 _halmac_memset(void *p, void *addr, u8 value, u32 size)
 {
 	_rtw_memset(addr, value, size);
-	return _TRUE;
+	return RTW_HALMAC_SUCCESS;
 }
 
 static void _halmac_udelay(void *p, u32 us)
 {
-	rtw_udelay_os(us);
+	/* Most hardware polling wait time < 50us) */
+	if (us <= 50)
+		rtw_udelay_os(us);
+	else if (us <= 1000)
+		rtw_usleep_os(us);
+	else
+		rtw_msleep_os(RTW_DIV_ROUND_UP(us, 1000));
 }
 
 static u8 _halmac_mutex_init(void *p, HALMAC_MUTEX *pMutex)
 {
 	_rtw_mutex_init(pMutex);
-	return _TRUE;
+	return RTW_HALMAC_SUCCESS;
 }
 
 static u8 _halmac_mutex_deinit(void *p, HALMAC_MUTEX *pMutex)
 {
 	_rtw_mutex_free(pMutex);
-	return _TRUE;
+	return RTW_HALMAC_SUCCESS;
 }
 
 static u8 _halmac_mutex_lock(void *p, HALMAC_MUTEX *pMutex)
@@ -405,26 +435,70 @@ static u8 _halmac_mutex_lock(void *p, HALMAC_MUTEX *pMutex)
 
 	err = _enter_critical_mutex(pMutex, NULL);
 	if (err)
-		return _FALSE;
+		return RTW_HALMAC_FAIL;
 
-	return _TRUE;
+	return RTW_HALMAC_SUCCESS;
 }
 
 static u8 _halmac_mutex_unlock(void *p, HALMAC_MUTEX *pMutex)
 {
 	_exit_critical_mutex(pMutex, NULL);
+	return RTW_HALMAC_SUCCESS;
+}
+
+#ifndef CONFIG_SDIO_HCI
+#define DBG_MSG_FILTER
+#endif
+
+#ifdef DBG_MSG_FILTER
+static u8 is_msg_allowed(uint drv_lv, u8 msg_lv)
+{
+	switch (drv_lv) {
+	case _DRV_NONE_:
+		return _FALSE;
+
+	case _DRV_ALWAYS_:
+		if (msg_lv > HALMAC_DBG_ALWAYS)
+			return _FALSE;
+		break;
+	case _DRV_ERR_:
+		if (msg_lv > HALMAC_DBG_ERR)
+			return _FALSE;
+		break;
+	case _DRV_WARNING_:
+		if (msg_lv > HALMAC_DBG_WARN)
+			return _FALSE;
+		break;
+	case _DRV_INFO_:
+		if (msg_lv >= HALMAC_DBG_TRACE)
+			return _FALSE;
+		break;
+	}
+
 	return _TRUE;
 }
+#endif /* DBG_MSG_FILTER */
 
 static u8 _halmac_msg_print(void *p, u32 msg_type, u8 msg_level, s8 *fmt, ...)
 {
 #define MSG_LEN		100
 	va_list args;
 	u8 str[MSG_LEN] = {0};
+#ifdef DBG_MSG_FILTER
+	uint drv_level = _DRV_NONE_;
+#endif
 	int err;
-	u8 ret = _TRUE;
+	u8 ret = RTW_HALMAC_SUCCESS;
 
 
+#ifdef DBG_MSG_FILTER
+#ifdef CONFIG_RTW_DEBUG
+	drv_level = rtw_drv_log_level;
+#endif
+	if (is_msg_allowed(drv_level, msg_level) == _FALSE)
+		return ret;
+#endif
+
 	str[0] = '\n';
 	va_start(args, fmt);
 	err = vsnprintf(str, MSG_LEN, fmt, args);
@@ -432,10 +506,10 @@ static u8 _halmac_msg_print(void *p, u32 msg_type, u8 msg_level, s8 *fmt, ...)
 
 	/* An output error is encountered */
 	if (err < 0)
-		return _FALSE;
+		return RTW_HALMAC_FAIL;
 	/* Output may be truncated due to size limit */
 	if ((err == (MSG_LEN - 1)) && (str[MSG_LEN - 2] != '\n'))
-		ret = _FALSE;
+		ret = RTW_HALMAC_FAIL;
 
 	if (msg_level == HALMAC_DBG_ALWAYS)
 		RTW_PRINT(MSG_PREFIX "%s", str);
@@ -456,7 +530,7 @@ static u8 _halmac_buff_print(void *p, u32 msg_type, u8 msg_level, s8 *buf, u32 s
 	else
 		RTW_DBG_DUMP(MSG_PREFIX, buf, size);
 
-	return _TRUE;
+	return RTW_HALMAC_SUCCESS;
 }
 
 
@@ -471,10 +545,11 @@ const char *const RTW_HALMAC_FEATURE_NAME[] = {
 	"HALMAC_FEATURE_IQK",
 	"HALMAC_FEATURE_POWER_TRACKING",
 	"HALMAC_FEATURE_PSD",
+	"HALMAC_FEATURE_FW_SNDING",
 	"HALMAC_FEATURE_ALL"
 };
 
-static inline u8 is_valid_id_status(HALMAC_FEATURE_ID id, HALMAC_CMD_PROCESS_STATUS status)
+static inline u8 is_valid_id_status(enum halmac_feature_id id, enum halmac_cmd_process_status status)
 {
 	switch (id) {
 	case HALMAC_FEATURE_CFG_PARA:
@@ -494,6 +569,9 @@ static inline u8 is_valid_id_status(HALMAC_FEATURE_ID id, HALMAC_CMD_PROCESS_STA
 		break;
 	case HALMAC_FEATURE_UPDATE_PACKET:
 		RTW_INFO("%s: %s\n", __FUNCTION__, RTW_HALMAC_FEATURE_NAME[id]);
+		if (status != HALMAC_CMD_PROCESS_DONE)
+			RTW_INFO("%s: id(%d) unspecified status(%d)!\n",
+				 __FUNCTION__, id, status);
 		break;
 	case HALMAC_FEATURE_UPDATE_DATAPACK:
 		RTW_INFO("%s: %s\n", __FUNCTION__, RTW_HALMAC_FEATURE_NAME[id]);
@@ -503,6 +581,11 @@ static inline u8 is_valid_id_status(HALMAC_FEATURE_ID id, HALMAC_CMD_PROCESS_STA
 		break;
 	case HALMAC_FEATURE_CHANNEL_SWITCH:
 		RTW_INFO("%s: %s\n", __FUNCTION__, RTW_HALMAC_FEATURE_NAME[id]);
+		if ((status != HALMAC_CMD_PROCESS_DONE) && (status != HALMAC_CMD_PROCESS_RCVD))
+			RTW_INFO("%s: id(%d) unspecified status(%d)!\n",
+				 __FUNCTION__, id, status);
+		if (status == HALMAC_CMD_PROCESS_DONE)
+			return _FALSE;
 		break;
 	case HALMAC_FEATURE_IQK:
 		RTW_INFO("%s: %s\n", __FUNCTION__, RTW_HALMAC_FEATURE_NAME[id]);
@@ -513,6 +596,9 @@ static inline u8 is_valid_id_status(HALMAC_FEATURE_ID id, HALMAC_CMD_PROCESS_STA
 	case HALMAC_FEATURE_PSD:
 		RTW_INFO("%s: %s\n", __FUNCTION__, RTW_HALMAC_FEATURE_NAME[id]);
 		break;
+	case HALMAC_FEATURE_FW_SNDING:
+		RTW_INFO("%s: %s\n", __FUNCTION__, RTW_HALMAC_FEATURE_NAME[id]);
+		break;
 	case HALMAC_FEATURE_ALL:
 		RTW_INFO("%s: %s\n", __FUNCTION__, RTW_HALMAC_FEATURE_NAME[id]);
 		break;
@@ -524,7 +610,7 @@ static inline u8 is_valid_id_status(HALMAC_FEATURE_ID id, HALMAC_CMD_PROCESS_STA
 	return _TRUE;
 }
 
-static int init_halmac_event_with_waittime(struct dvobj_priv *d, HALMAC_FEATURE_ID id, u8 *buf, u32 size, u32 time)
+static int init_halmac_event_with_waittime(struct dvobj_priv *d, enum halmac_feature_id id, u8 *buf, u32 size, u32 time)
 {
 	struct submit_ctx *sctx;
 
@@ -550,12 +636,12 @@ static int init_halmac_event_with_waittime(struct dvobj_priv *d, HALMAC_FEATURE_
 	return 0;
 }
 
-static inline int init_halmac_event(struct dvobj_priv *d, HALMAC_FEATURE_ID id, u8 *buf, u32 size)
+static inline int init_halmac_event(struct dvobj_priv *d, enum halmac_feature_id id, u8 *buf, u32 size)
 {
 	return init_halmac_event_with_waittime(d, id, buf, size, DEFAULT_INDICATOR_TIMELMT);
 }
 
-static void free_halmac_event(struct dvobj_priv *d, HALMAC_FEATURE_ID id)
+static void free_halmac_event(struct dvobj_priv *d, enum halmac_feature_id id)
 {
 	struct submit_ctx *sctx;
 
@@ -568,10 +654,10 @@ static void free_halmac_event(struct dvobj_priv *d, HALMAC_FEATURE_ID id)
 	rtw_mfree((u8 *)sctx, sizeof(*sctx));
 }
 
-static int wait_halmac_event(struct dvobj_priv *d, HALMAC_FEATURE_ID id)
+static int wait_halmac_event(struct dvobj_priv *d, enum halmac_feature_id id)
 {
-	PHALMAC_ADAPTER mac;
-	PHALMAC_API api;
+	struct halmac_adapter *mac;
+	struct halmac_api *api;
 	struct submit_ctx *sctx;
 	int ret;
 
@@ -597,9 +683,9 @@ static int wait_halmac_event(struct dvobj_priv *d, HALMAC_FEATURE_ID id)
 
 /*
  * Return:
- *	Always return _TRUE, HALMAC don't care the return value.
+ *	Always return RTW_HALMAC_SUCCESS, HALMAC don't care the return value.
  */
-static u8 _halmac_event_indication(void *p, HALMAC_FEATURE_ID feature_id, HALMAC_CMD_PROCESS_STATUS process_status, u8 *buf, u32 size)
+static u8 _halmac_event_indication(void *p, enum halmac_feature_id feature_id, enum halmac_cmd_process_status process_status, u8 *buf, u32 size)
 {
 	struct dvobj_priv *d;
 	PADAPTER adapter;
@@ -648,10 +734,10 @@ static u8 _halmac_event_indication(void *p, HALMAC_FEATURE_ID feature_id, HALMAC
 	rtw_sctx_done(&sctx);
 
 exit:
-	return _TRUE;
+	return RTW_HALMAC_SUCCESS;
 }
 
-HALMAC_PLATFORM_API rtw_halmac_platform_api = {
+struct halmac_platform_api rtw_halmac_platform_api = {
 	/* R/W register */
 #ifdef CONFIG_SDIO_HCI
 	.SDIO_CMD52_READ = _halmac_sdio_cmd52_read,
@@ -663,16 +749,16 @@ HALMAC_PLATFORM_API rtw_halmac_platform_api = {
 	.SDIO_CMD53_WRITE_8 = _halmac_sdio_reg_write_8,
 	.SDIO_CMD53_WRITE_16 = _halmac_sdio_reg_write_16,
 	.SDIO_CMD53_WRITE_32 = _halmac_sdio_reg_write_32,
-
+	.SDIO_CMD52_CIA_READ = _halmac_sdio_read_cia,
 #endif /* CONFIG_SDIO_HCI */
-#if defined(CONFIG_USB_HCI) || defined(CONFIG_PCIE_HCI)
+#if defined(CONFIG_USB_HCI) || defined(CONFIG_PCI_HCI)
 	.REG_READ_8 = _halmac_reg_read_8,
 	.REG_READ_16 = _halmac_reg_read_16,
 	.REG_READ_32 = _halmac_reg_read_32,
 	.REG_WRITE_8 = _halmac_reg_write_8,
 	.REG_WRITE_16 = _halmac_reg_write_16,
 	.REG_WRITE_32 = _halmac_reg_write_32,
-#endif /* CONFIG_USB_HCI || CONFIG_PCIE_HCI */
+#endif /* CONFIG_USB_HCI || CONFIG_PCI_HCI */
 
 	/* Write data */
 #if 0
@@ -702,8 +788,8 @@ HALMAC_PLATFORM_API rtw_halmac_platform_api = {
 
 u8 rtw_halmac_read8(struct intf_hdl *pintfhdl, u32 addr)
 {
-	PHALMAC_ADAPTER mac;
-	PHALMAC_API api;
+	struct halmac_adapter *mac;
+	struct halmac_api *api;
 
 
 	/* WARNING: pintf_dev should not be null! */
@@ -715,8 +801,8 @@ u8 rtw_halmac_read8(struct intf_hdl *pintfhdl, u32 addr)
 
 u16 rtw_halmac_read16(struct intf_hdl *pintfhdl, u32 addr)
 {
-	PHALMAC_ADAPTER mac;
-	PHALMAC_API api;
+	struct halmac_adapter *mac;
+	struct halmac_api *api;
 
 
 	/* WARNING: pintf_dev should not be null! */
@@ -728,8 +814,8 @@ u16 rtw_halmac_read16(struct intf_hdl *pintfhdl, u32 addr)
 
 u32 rtw_halmac_read32(struct intf_hdl *pintfhdl, u32 addr)
 {
-	PHALMAC_ADAPTER mac;
-	PHALMAC_API api;
+	struct halmac_adapter *mac;
+	struct halmac_api *api;
 
 
 	/* WARNING: pintf_dev should not be null! */
@@ -800,9 +886,9 @@ static void _read_register(struct dvobj_priv *d, u32 addr, u32 cnt, u8 *buf)
 #ifdef CONFIG_SDIO_HCI
 static int _sdio_read_local(struct dvobj_priv *d, u32 addr, u32 cnt, u8 *buf)
 {
-	struct _HALMAC_ADAPTER *mac;
-	struct _HALMAC_API *api;
-	enum _HALMAC_RET_STATUS status;
+	struct halmac_adapter *mac;
+	struct halmac_api *api;
+	enum halmac_ret_status status;
 
 
 	if (buf == NULL)
@@ -850,8 +936,8 @@ void rtw_halmac_read_mem(struct intf_hdl *pintfhdl, u32 addr, u32 cnt, u8 *pmem)
 #ifdef CONFIG_SDIO_INDIRECT_ACCESS
 u8 rtw_halmac_iread8(struct intf_hdl *pintfhdl, u32 addr)
 {
-	PHALMAC_ADAPTER mac;
-	PHALMAC_API api;
+	struct halmac_adapter *mac;
+	struct halmac_api *api;
 
 	/* WARNING: pintf_dev should not be null! */
 	mac = dvobj_to_halmac(pintfhdl->pintf_dev);
@@ -863,8 +949,8 @@ u8 rtw_halmac_iread8(struct intf_hdl *pintfhdl, u32 addr)
 
 u16 rtw_halmac_iread16(struct intf_hdl *pintfhdl, u32 addr)
 {
-	PHALMAC_ADAPTER mac;
-	PHALMAC_API api;
+	struct halmac_adapter *mac;
+	struct halmac_api *api;
 	u16 val16 = 0;
 
 	/* WARNING: pintf_dev should not be null! */
@@ -877,8 +963,8 @@ u16 rtw_halmac_iread16(struct intf_hdl *pintfhdl, u32 addr)
 
 u32 rtw_halmac_iread32(struct intf_hdl *pintfhdl, u32 addr)
 {
-	PHALMAC_ADAPTER mac;
-	PHALMAC_API api;
+	struct halmac_adapter *mac;
+	struct halmac_api *api;
 
 
 	/* WARNING: pintf_dev should not be null! */
@@ -891,9 +977,9 @@ u32 rtw_halmac_iread32(struct intf_hdl *pintfhdl, u32 addr)
 
 int rtw_halmac_write8(struct intf_hdl *pintfhdl, u32 addr, u8 value)
 {
-	PHALMAC_ADAPTER mac;
-	PHALMAC_API api;
-	HALMAC_RET_STATUS status;
+	struct halmac_adapter *mac;
+	struct halmac_api *api;
+	enum halmac_ret_status status;
 
 
 	/* WARNING: pintf_dev should not be null! */
@@ -910,9 +996,9 @@ int rtw_halmac_write8(struct intf_hdl *pintfhdl, u32 addr, u8 value)
 
 int rtw_halmac_write16(struct intf_hdl *pintfhdl, u32 addr, u16 value)
 {
-	PHALMAC_ADAPTER mac;
-	PHALMAC_API api;
-	HALMAC_RET_STATUS status;
+	struct halmac_adapter *mac;
+	struct halmac_api *api;
+	enum halmac_ret_status status;
 
 
 	/* WARNING: pintf_dev should not be null! */
@@ -929,9 +1015,9 @@ int rtw_halmac_write16(struct intf_hdl *pintfhdl, u32 addr, u16 value)
 
 int rtw_halmac_write32(struct intf_hdl *pintfhdl, u32 addr, u32 value)
 {
-	PHALMAC_ADAPTER mac;
-	PHALMAC_API api;
-	HALMAC_RET_STATUS status;
+	struct halmac_adapter *mac;
+	struct halmac_api *api;
+	enum halmac_ret_status status;
 
 
 	/* WARNING: pintf_dev should not be null! */
@@ -948,18 +1034,18 @@ int rtw_halmac_write32(struct intf_hdl *pintfhdl, u32 addr, u32 value)
 
 static int init_write_rsvd_page_size(struct dvobj_priv *d)
 {
-	struct _HALMAC_ADAPTER *mac;
-	struct _HALMAC_API *api;
+	struct halmac_adapter *mac;
+	struct halmac_api *api;
 	u32 size = 0;
-	struct _HALMAC_OFLD_FUNC_INFO ofld_info;
-	enum _HALMAC_RET_STATUS status;
+	struct halmac_ofld_func_info ofld_info;
+	enum halmac_ret_status status;
 	int err = 0;
 
 
 #ifdef CONFIG_USB_HCI
 	/* for USB do not exceed MAX_CMDBUF_SZ */
 	size = 0x1000;
-#elif defined(CONFIG_PCIE_HCI)
+#elif defined(CONFIG_PCI_HCI)
 	size = MAX_CMDBUF_SZ - TXDESC_OFFSET;
 #elif defined(CONFIG_SDIO_HCI)
 	size = 0x7000; /* 28KB */
@@ -1042,10 +1128,10 @@ static void deinit_priv(struct halmacpriv *priv)
 }
 
 #ifdef CONFIG_SDIO_HCI
-static enum _HALMAC_SDIO_SPEC_VER _sdio_ver_drv2halmac(struct dvobj_priv *d)
+static enum halmac_sdio_spec_ver _sdio_ver_drv2halmac(struct dvobj_priv *d)
 {
 	bool v3;
-	enum _HALMAC_SDIO_SPEC_VER ver;
+	enum halmac_sdio_spec_ver ver;
 
 
 	v3 = rtw_is_sdio30(dvobj_get_primary_adapter(d));
@@ -1060,8 +1146,8 @@ static enum _HALMAC_SDIO_SPEC_VER _sdio_ver_drv2halmac(struct dvobj_priv *d)
 
 void rtw_halmac_get_version(char *str, u32 len)
 {
-	HALMAC_RET_STATUS status;
-	HALMAC_VER ver;
+	enum halmac_ret_status status;
+	struct halmac_ver ver;
 
 
 	status = halmac_get_version(&ver);
@@ -1072,33 +1158,33 @@ void rtw_halmac_get_version(char *str, u32 len)
 		    ver.major_ver, ver.prototype_ver, ver.minor_ver);
 }
 
-int rtw_halmac_init_adapter(struct dvobj_priv *d, PHALMAC_PLATFORM_API pf_api)
+int rtw_halmac_init_adapter(struct dvobj_priv *d, struct halmac_platform_api *pf_api)
 {
-	PHALMAC_ADAPTER halmac;
-	PHALMAC_API api;
-	HALMAC_INTERFACE intf;
-	HALMAC_RET_STATUS status;
+	struct halmac_adapter *halmac;
+	struct halmac_api *api;
+	enum halmac_interface intf;
+	enum halmac_ret_status status;
 	int err = 0;
 #ifdef CONFIG_SDIO_HCI
-	HALMAC_SDIO_HW_INFO info;
+	struct halmac_sdio_hw_info info;
 #endif /* CONFIG_SDIO_HCI */
 
 
 	halmac = dvobj_to_halmac(d);
 	if (halmac) {
-		err = 0;
-		goto out;
+		RTW_WARN("%s: initialize already completed!\n", __FUNCTION__);
+		goto error;
 	}
 
 	err = init_priv(&d->hmpriv);
 	if (err)
-		goto out;
+		goto error;
 
 #ifdef CONFIG_SDIO_HCI
 	intf = HALMAC_INTERFACE_SDIO;
 #elif defined(CONFIG_USB_HCI)
 	intf = HALMAC_INTERFACE_USB;
-#elif defined(CONFIG_PCIE_HCI)
+#elif defined(CONFIG_PCI_HCI)
 	intf = HALMAC_INTERFACE_PCIE;
 #else
 #warning "INTERFACE(CONFIG_XXX_HCI) not be defined!!"
@@ -1108,7 +1194,9 @@ int rtw_halmac_init_adapter(struct dvobj_priv *d, PHALMAC_PLATFORM_API pf_api)
 	if (HALMAC_RET_SUCCESS != status) {
 		RTW_ERR("%s: halmac_init_adapter fail!(status=%d)\n", __FUNCTION__, status);
 		err = -1;
-		goto out;
+		if (halmac)
+			goto deinit;
+		goto free;
 	}
 
 	dvobj_set_halmac(d, halmac);
@@ -1117,96 +1205,103 @@ int rtw_halmac_init_adapter(struct dvobj_priv *d, PHALMAC_PLATFORM_API pf_api)
 	if (status != HALMAC_RET_SUCCESS) {
 		RTW_ERR("%s: halmac_interface_integration_tuning fail!(status=%d)\n", __FUNCTION__, status);
 		err = -1;
-		goto out;
+		goto deinit;
 	}
 
 	status = api->halmac_phy_cfg(halmac, HALMAC_INTF_PHY_PLATFORM_ALL);
 	if (status != HALMAC_RET_SUCCESS) {
 		RTW_ERR("%s: halmac_phy_cfg fail!(status=%d)\n", __FUNCTION__, status);
 		err = -1;
-		goto out;
+		goto deinit;
 	}
 
 	init_write_rsvd_page_size(d);
 
 #ifdef CONFIG_SDIO_HCI
+	_rtw_memset(&info, 0, sizeof(info));
 	info.spec_ver = _sdio_ver_drv2halmac(d);
-	/* clock unit is MHz */
+	/* Convert clock speed unit to MHz from Hz */
 	info.clock_speed = RTW_DIV_ROUND_UP(rtw_sdio_get_clock(d), 1000000);
-	RTW_DBG("%s: SDIO clock=%uMHz ver=%u\n", __FUNCTION__, info.clock_speed, info.spec_ver+2);
+	info.block_size = rtw_sdio_get_block_size(d);
+	RTW_DBG("%s: SDIO ver=%u clock=%uMHz blk_size=%u bytes\n",
+		__FUNCTION__, info.spec_ver+2, info.clock_speed,
+		info.block_size);
 	status = api->halmac_sdio_hw_info(halmac, &info);
 	if (status != HALMAC_RET_SUCCESS) {
-		RTW_ERR("%s: halmac_sdio_hw_info fail!(status=%d)\n", __FUNCTION__, status);
+		RTW_ERR("%s: halmac_sdio_hw_info fail!(status=%d)\n",
+			__FUNCTION__, status);
 		err = -1;
-		goto out;
+		goto deinit;
 	}
 #endif /* CONFIG_SDIO_HCI */
 
-out:
-	if (err)
-		rtw_halmac_deinit_adapter(d);
+	return 0;
+
+deinit:
+	status = halmac_deinit_adapter(halmac);
+	dvobj_set_halmac(d, NULL);
+	if (status != HALMAC_RET_SUCCESS)
+		RTW_ERR("%s: halmac_deinit_adapter fail!(status=%d)\n",
+			__FUNCTION__, status);
+
+free:
+	deinit_priv(&d->hmpriv);
 
+error:
 	return err;
 }
 
 int rtw_halmac_deinit_adapter(struct dvobj_priv *d)
 {
-	PHALMAC_ADAPTER halmac;
-	HALMAC_RET_STATUS status;
+	struct halmac_adapter *halmac;
+	enum halmac_ret_status status;
 	int err = 0;
 
 
 	halmac = dvobj_to_halmac(d);
-	if (!halmac) {
-		err = 0;
-		goto out;
+	if (halmac) {
+		status = halmac_deinit_adapter(halmac);
+		dvobj_set_halmac(d, NULL);
+		if (status != HALMAC_RET_SUCCESS)
+			err = -1;
 	}
 
 	deinit_priv(&d->hmpriv);
 
-	status = halmac_deinit_adapter(halmac);
-	dvobj_set_halmac(d, NULL);
-	if (status != HALMAC_RET_SUCCESS) {
-		err = -1;
-		goto out;
-	}
-
-out:
 	return err;
 }
 
-static inline u8 _hw_port_drv2halmac(enum _hw_port hwport)
+static inline enum halmac_portid _hw_port_drv2halmac(enum _hw_port hwport)
 {
-	u8 port = 0;
+	enum halmac_portid port = HALMAC_PORTID_NUM;
 
 
 	switch (hwport) {
 	case HW_PORT0:
-		port = 0;
+		port = HALMAC_PORTID0;
 		break;
 	case HW_PORT1:
-		port = 1;
+		port = HALMAC_PORTID1;
 		break;
 	case HW_PORT2:
-		port = 2;
+		port = HALMAC_PORTID2;
 		break;
 	case HW_PORT3:
-		port = 3;
+		port = HALMAC_PORTID3;
 		break;
 	case HW_PORT4:
-		port = 4;
+		port = HALMAC_PORTID4;
 		break;
 	default:
-		port = hwport;
 		break;
 	}
 
 	return port;
 }
 
-static enum _HALMAC_NETWORK_TYPE_SELECT _network_type_drv2halmac(u8 type)
+static enum halmac_network_type_select _network_type_drv2halmac(u8 type)
 {
-	enum _HALMAC_NETWORK_TYPE_SELECT network = HALMAC_NETWORK_UNDEFINE;
+	enum halmac_network_type_select network = HALMAC_NETWORK_UNDEFINE;
 
 
 	switch (type) {
@@ -1231,7 +1326,7 @@ static enum _HALMAC_NETWORK_TYPE_SELECT _network_type_drv2halmac(u8 type)
 	return network;
 }
 
-static u8 _network_type_halmac2drv(enum _HALMAC_NETWORK_TYPE_SELECT network)
+static u8 _network_type_halmac2drv(enum halmac_network_type_select network)
 {
 	u8 type = _HW_STATE_NOLINK_;
 
@@ -1258,35 +1353,35 @@ static u8 _network_type_halmac2drv(enum _HALMAC_NETWORK_TYPE_SELECT network)
 	return type;
 }
 
-static void _beacon_ctrl_halmac2drv(struct HALMAC_BCN_CTRL *ctrl,
+static void _beacon_ctrl_halmac2drv(struct halmac_bcn_ctrl *ctrl,
 				struct rtw_halmac_bcn_ctrl *drv_ctrl)
 {
 	drv_ctrl->rx_bssid_fit = ctrl->dis_rx_bssid_fit ? 0 : 1;
 	drv_ctrl->txbcn_rpt = ctrl->en_txbcn_rpt ? 1 : 0;
 	drv_ctrl->tsf_update = ctrl->dis_tsf_udt ? 0 : 1;
 	drv_ctrl->enable_bcn = ctrl->en_bcn ? 1 : 0;
-	drv_ctrl->rxbcn_rpt = ctrl->ex_rxbcn_rpt ? 1 : 0;
+	drv_ctrl->rxbcn_rpt = ctrl->en_rxbcn_rpt ? 1 : 0;
 	drv_ctrl->p2p_ctwin = ctrl->en_p2p_ctwin ? 1 : 0;
 	drv_ctrl->p2p_bcn_area = ctrl->en_p2p_bcn_area ? 1 : 0;
 }
 
 static void _beacon_ctrl_drv2halmac(struct rtw_halmac_bcn_ctrl *drv_ctrl,
-				struct HALMAC_BCN_CTRL *ctrl)
+				struct halmac_bcn_ctrl *ctrl)
 {
 	ctrl->dis_rx_bssid_fit = drv_ctrl->rx_bssid_fit ? 0 : 1;
 	ctrl->en_txbcn_rpt = drv_ctrl->txbcn_rpt ? 1 : 0;
 	ctrl->dis_tsf_udt = drv_ctrl->tsf_update ? 0 : 1;
 	ctrl->en_bcn = drv_ctrl->enable_bcn ? 1 : 0;
-	ctrl->ex_rxbcn_rpt = drv_ctrl->rxbcn_rpt ? 1 : 0;
+	ctrl->en_rxbcn_rpt = drv_ctrl->rxbcn_rpt ? 1 : 0;
 	ctrl->en_p2p_ctwin = drv_ctrl->p2p_ctwin ? 1 : 0;
 	ctrl->en_p2p_bcn_area = drv_ctrl->p2p_bcn_area ? 1 : 0;
 }
 
-int rtw_halmac_get_hw_value(struct dvobj_priv *d, HALMAC_HW_ID hw_id, VOID *pvalue)
+int rtw_halmac_get_hw_value(struct dvobj_priv *d, enum halmac_hw_id hw_id, void *pvalue)
 {
-	PHALMAC_ADAPTER mac;
-	PHALMAC_API api;
-	HALMAC_RET_STATUS status;
+	struct halmac_adapter *mac;
+	struct halmac_api *api;
+	enum halmac_ret_status status;
 
 
 	mac = dvobj_to_halmac(d);
@@ -1310,9 +1405,9 @@ int rtw_halmac_get_hw_value(struct dvobj_priv *d, HALMAC_HW_ID hw_id, VOID *pval
  */
 int rtw_halmac_get_tx_fifo_size(struct dvobj_priv *d, u32 *size)
 {
-	struct _HALMAC_ADAPTER *halmac;
-	struct _HALMAC_API *api;
-	enum _HALMAC_RET_STATUS status;
+	struct halmac_adapter *halmac;
+	struct halmac_api *api;
+	enum halmac_ret_status status;
 	u32 val = 0;
 
 
@@ -1339,9 +1434,9 @@ int rtw_halmac_get_tx_fifo_size(struct dvobj_priv *d, u32 *size)
  */
 int rtw_halmac_get_rx_fifo_size(struct dvobj_priv *d, u32 *size)
 {
-	struct _HALMAC_ADAPTER *halmac;
-	struct _HALMAC_API *api;
-	enum _HALMAC_RET_STATUS status;
+	struct halmac_adapter *halmac;
+	struct halmac_api *api;
+	enum halmac_ret_status status;
 	u32 val = 0;
 
 
@@ -1368,9 +1463,9 @@ int rtw_halmac_get_rx_fifo_size(struct dvobj_priv *d, u32 *size)
  */
 int rtw_halmac_get_rsvd_drv_pg_bndy(struct dvobj_priv *d, u16 *bndy)
 {
-	struct _HALMAC_ADAPTER *halmac;
-	struct _HALMAC_API *api;
-	enum _HALMAC_RET_STATUS status;
+	struct halmac_adapter *halmac;
+	struct halmac_api *api;
+	enum halmac_ret_status status;
 	u16 val = 0;
 
 
@@ -1397,9 +1492,9 @@ int rtw_halmac_get_rsvd_drv_pg_bndy(struct dvobj_priv *d, u16 *bndy)
  */
 int rtw_halmac_get_page_size(struct dvobj_priv *d, u32 *size)
 {
-	struct _HALMAC_ADAPTER *halmac;
-	struct _HALMAC_API *api;
-	enum _HALMAC_RET_STATUS status;
+	struct halmac_adapter *halmac;
+	struct halmac_api *api;
+	enum halmac_ret_status status;
 	u32 val = 0;
 
 
@@ -1426,9 +1521,9 @@ int rtw_halmac_get_page_size(struct dvobj_priv *d, u32 *size)
  */
 int rtw_halmac_get_tx_agg_align_size(struct dvobj_priv *d, u16 *size)
 {
-	struct _HALMAC_ADAPTER *halmac;
-	struct _HALMAC_API *api;
-	enum _HALMAC_RET_STATUS status;
+	struct halmac_adapter *halmac;
+	struct halmac_api *api;
+	enum halmac_ret_status status;
 	u16 val = 0;
 
 
@@ -1455,9 +1550,9 @@ int rtw_halmac_get_tx_agg_align_size(struct dvobj_priv *d, u16 *size)
  */
 int rtw_halmac_get_rx_agg_align_size(struct dvobj_priv *d, u8 *size)
 {
-	struct _HALMAC_ADAPTER *halmac;
-	struct _HALMAC_API *api;
-	enum _HALMAC_RET_STATUS status;
+	struct halmac_adapter *halmac;
+	struct halmac_api *api;
+	enum halmac_ret_status status;
 	u8 val = 0;
 
 
@@ -1499,9 +1594,9 @@ int rtw_halmac_get_rx_agg_align_size(struct dvobj_priv *d, u8 *size)
  */
 int rtw_halmac_get_rx_drv_info_sz(struct dvobj_priv *d, u8 *sz)
 {
-	HALMAC_RET_STATUS status;
-	PHALMAC_ADAPTER halmac = dvobj_to_halmac(d);
-	PHALMAC_API api = HALMAC_GET_API(halmac);
+	enum halmac_ret_status status;
+	struct halmac_adapter *halmac = dvobj_to_halmac(d);
+	struct halmac_api *api = HALMAC_GET_API(halmac);
 	u8 dw = 0;
 
 	status = api->halmac_get_hw_value(halmac, HALMAC_HW_DRV_INFO_SIZE, &dw);
@@ -1523,9 +1618,9 @@ int rtw_halmac_get_rx_drv_info_sz(struct dvobj_priv *d, u8 *sz)
  */
 int rtw_halmac_get_tx_desc_size(struct dvobj_priv *d, u32 *size)
 {
-	struct _HALMAC_ADAPTER *halmac;
-	struct _HALMAC_API *api;
-	enum _HALMAC_RET_STATUS status;
+	struct halmac_adapter *halmac;
+	struct halmac_api *api;
+	enum halmac_ret_status status;
 	u32 val = 0;
 
 
@@ -1552,9 +1647,9 @@ int rtw_halmac_get_tx_desc_size(struct dvobj_priv *d, u32 *size)
  */
 int rtw_halmac_get_rx_desc_size(struct dvobj_priv *d, u32 *size)
 {
-	struct _HALMAC_ADAPTER *halmac;
-	struct _HALMAC_API *api;
-	enum _HALMAC_RET_STATUS status;
+	struct halmac_adapter *halmac;
+	struct halmac_api *api;
+	enum halmac_ret_status status;
 	u32 val = 0;
 
 
@@ -1582,9 +1677,9 @@ int rtw_halmac_get_rx_desc_size(struct dvobj_priv *d, u32 *size)
  */
 static int rtw_halmac_get_fw_max_size(struct dvobj_priv *d, u32 *size)
 {
-	struct _HALMAC_ADAPTER *halmac;
-	struct _HALMAC_API *api;
-	enum _HALMAC_RET_STATUS status;
+	struct halmac_adapter *halmac;
+	struct halmac_api *api;
+	enum halmac_ret_status status;
 	u32 val = 0;
 
 
@@ -1611,9 +1706,9 @@ static int rtw_halmac_get_fw_max_size(struct dvobj_priv *d, u32 *size)
  */
 int rtw_halmac_get_ori_h2c_size(struct dvobj_priv *d, u32 *size)
 {
-	struct _HALMAC_ADAPTER *halmac;
-	struct _HALMAC_API *api;
-	enum _HALMAC_RET_STATUS status;
+	struct halmac_adapter *halmac;
+	struct halmac_api *api;
+	enum halmac_ret_status status;
 	u32 val = 0;
 
 
@@ -1631,9 +1726,9 @@ int rtw_halmac_get_ori_h2c_size(struct dvobj_priv *d, u32 *size)
 
 int rtw_halmac_get_oqt_size(struct dvobj_priv *d, u8 *size)
 {
-	enum _HALMAC_RET_STATUS status;
-	struct _HALMAC_ADAPTER *halmac;
-	struct _HALMAC_API *api;
+	enum halmac_ret_status status;
+	struct halmac_adapter *halmac;
+	struct halmac_api *api;
 	u8 val;
 
 
@@ -1653,9 +1748,9 @@ int rtw_halmac_get_oqt_size(struct dvobj_priv *d, u8 *size)
 
 int rtw_halmac_get_ac_queue_number(struct dvobj_priv *d, u8 *num)
 {
-	enum _HALMAC_RET_STATUS status;
-	struct _HALMAC_ADAPTER *halmac;
-	struct _HALMAC_API *api;
+	enum halmac_ret_status status;
+	struct halmac_adapter *halmac;
+	struct halmac_api *api;
 	u8 val;
 
 
@@ -1685,65 +1780,27 @@ int rtw_halmac_get_ac_queue_number(struct dvobj_priv *d, u8 *num)
  */
 int rtw_halmac_get_mac_address(struct dvobj_priv *d, enum _hw_port hwport, u8 *addr)
 {
-#if 0
-	struct _HALMAC_ADAPTER *halmac;
-	struct _HALMAC_API *api;
-#endif
-	u8 port;
-	union _HALMAC_WLAN_ADDR hwa;
-#if 0
-	enum _HALMAC_RET_STATUS status;
-#endif
+	struct halmac_adapter *halmac;
+	struct halmac_api *api;
+	enum halmac_portid port;
+	union halmac_wlan_addr hwa;
+	enum halmac_ret_status status;
 	int err = -1;
 
 
 	if (!addr)
 		goto out;
-#if 0
+
 	halmac = dvobj_to_halmac(d);
 	api = HALMAC_GET_API(halmac);
-#endif
 	port = _hw_port_drv2halmac(hwport);
-
 	_rtw_memset(&hwa, 0, sizeof(hwa));
 
-#if 0
 	status = api->halmac_get_mac_addr(halmac, port, &hwa);
 	if (status != HALMAC_RET_SUCCESS)
 		goto out;
-#else
-	{
-	u32 offset;
-
-	switch (port) {
-	case 0:
-		offset = REG_MACID;
-		break;
-
-	case 1:
-		offset = REG_MACID1;
-		break;
-
-	case 2:
-		offset = REG_MACID2;
-		break;
-
-	case 3:
-		offset = REG_MACID3;
-		break;
-
-	case 4:
-		offset = REG_MACID4;
-		break;
-
-	default:
-		goto out;
-	}
 
-	_read_register(d, offset, 6, hwa.Address);
-	}
-#endif
-	_rtw_memcpy(addr, hwa.Address, 6);
+	_rtw_memcpy(addr, hwa.addr, 6);
 
 	err = 0;
 out:
@@ -1763,11 +1820,11 @@ out:
 int rtw_halmac_get_network_type(struct dvobj_priv *d, enum _hw_port hwport, u8 *type)
 {
 #if 0
-	struct _HALMAC_ADAPTER *halmac;
-	struct _HALMAC_API *api;
-	u8 port;
-	enum _HALMAC_NETWORK_TYPE_SELECT network;
-	enum _HALMAC_RET_STATUS status;
+	struct halmac_adapter *halmac;
+	struct halmac_api *api;
+	enum halmac_portid port;
+	enum halmac_network_type_select network;
+	enum halmac_ret_status status;
 	int err = -1;
 
 
@@ -1787,8 +1844,8 @@ out:
 	return err;
 #else
 	struct _ADAPTER *a;
-	u8 port;
-	enum _HALMAC_NETWORK_TYPE_SELECT network;
+	enum halmac_portid port;
+	enum halmac_network_type_select network;
 	u32 val;
 	int err = -1;
 
@@ -1798,27 +1855,27 @@ out:
 	network = HALMAC_NETWORK_UNDEFINE;
 
 	switch (port) {
-	case 0:
+	case HALMAC_PORTID0:
 		val = rtw_read32(a, REG_CR);
 		network = BIT_GET_NETYPE0(val);
 		break;
 
-	case 1:
+	case HALMAC_PORTID1:
 		val = rtw_read32(a, REG_CR);
 		network = BIT_GET_NETYPE1(val);
 		break;
 
-	case 2:
+	case HALMAC_PORTID2:
 		val = rtw_read32(a, REG_CR_EXT);
 		network = BIT_GET_NETYPE2(val);
 		break;
 
-	case 3:
+	case HALMAC_PORTID3:
 		val = rtw_read32(a, REG_CR_EXT);
 		network = BIT_GET_NETYPE3(val);
 		break;
 
-	case 4:
+	case HALMAC_PORTID4:
 		val = rtw_read32(a, REG_CR_EXT);
 		network = BIT_GET_NETYPE4(val);
 		break;
@@ -1848,18 +1905,18 @@ out:
 int rtw_halmac_get_bcn_ctrl(struct dvobj_priv *d, enum _hw_port hwport,
 			struct rtw_halmac_bcn_ctrl *bcn_ctrl)
 {
-	struct _HALMAC_ADAPTER *halmac;
-	struct _HALMAC_API *api;
-	u8 port;
-	struct HALMAC_BCN_CTRL ctrl;
-	enum _HALMAC_RET_STATUS status;
+	struct halmac_adapter *halmac;
+	struct halmac_api *api;
+	enum halmac_portid port;
+	struct halmac_bcn_ctrl ctrl;
+	enum halmac_ret_status status;
 	int err = -1;
 
 
 	halmac = dvobj_to_halmac(d);
 	api = HALMAC_GET_API(halmac);
 	port = _hw_port_drv2halmac(hwport);
-	_rtw_memset(&ctrl, 0, sizeof(struct HALMAC_BCN_CTRL));
+	_rtw_memset(&ctrl, 0, sizeof(ctrl));
 
 	status = api->halmac_rw_bcn_ctrl(halmac, port, 0, &ctrl);
 	if (status != HALMAC_RET_SUCCESS)
@@ -1875,11 +1932,11 @@ out:
  * Note:
  *	When this function return, the register REG_RCR may be changed.
  */
-int rtw_halmac_config_rx_info(struct dvobj_priv *d, HALMAC_DRV_INFO info)
+int rtw_halmac_config_rx_info(struct dvobj_priv *d, enum halmac_drv_info info)
 {
-	PHALMAC_ADAPTER halmac;
-	PHALMAC_API api;
-	HALMAC_RET_STATUS status;
+	struct halmac_adapter *halmac;
+	struct halmac_api *api;
+	enum halmac_ret_status status;
 	int err = -1;
 
 
@@ -1912,9 +1969,9 @@ out:
  */
 int rtw_halmac_set_max_dl_fw_size(struct dvobj_priv *d, u32 size)
 {
-	PHALMAC_ADAPTER mac;
-	PHALMAC_API api;
-	HALMAC_RET_STATUS status;
+	struct halmac_adapter *mac;
+	struct halmac_api *api;
+	enum halmac_ret_status status;
 
 
 	if (!size || (size == 1))
@@ -1950,11 +2007,11 @@ int rtw_halmac_set_max_dl_fw_size(struct dvobj_priv *d, u32 size)
  */
 int rtw_halmac_set_mac_address(struct dvobj_priv *d, enum _hw_port hwport, u8 *addr)
 {
-	PHALMAC_ADAPTER halmac;
-	PHALMAC_API api;
-	u8 port;
-	HALMAC_WLAN_ADDR hwa;
-	HALMAC_RET_STATUS status;
+	struct halmac_adapter *halmac;
+	struct halmac_api *api;
+	enum halmac_portid port;
+	union halmac_wlan_addr hwa;
+	enum halmac_ret_status status;
 	int err = -1;
 
 
@@ -1963,7 +2020,7 @@ int rtw_halmac_set_mac_address(struct dvobj_priv *d, enum _hw_port hwport, u8 *a
 
 	port = _hw_port_drv2halmac(hwport);
 	_rtw_memset(&hwa, 0, sizeof(hwa));
-	_rtw_memcpy(hwa.Address, addr, 6);
+	_rtw_memcpy(hwa.addr, addr, 6);
 
 	status = api->halmac_cfg_mac_addr(halmac, port, &hwa);
 	if (status != HALMAC_RET_SUCCESS)
@@ -1986,19 +2043,20 @@ out:
  */
 int rtw_halmac_set_bssid(struct dvobj_priv *d, enum _hw_port hwport, u8 *addr)
 {
-	PHALMAC_ADAPTER halmac;
-	PHALMAC_API api;
-	u8 port;
-	HALMAC_WLAN_ADDR hwa;
-	HALMAC_RET_STATUS status;
+	struct halmac_adapter *halmac;
+	struct halmac_api *api;
+	enum halmac_portid port;
+	union halmac_wlan_addr hwa;
+	enum halmac_ret_status status;
 	int err = -1;
 
+
 	halmac = dvobj_to_halmac(d);
 	api = HALMAC_GET_API(halmac);
 	port = _hw_port_drv2halmac(hwport);
 
-	_rtw_memset(&hwa, 0, sizeof(HALMAC_WLAN_ADDR));
-	_rtw_memcpy(hwa.Address, addr, 6);
+	_rtw_memset(&hwa, 0, sizeof(hwa));
+	_rtw_memcpy(hwa.addr, addr, 6);
 	status = api->halmac_cfg_bssid(halmac, port, &hwa);
 	if (status != HALMAC_RET_SUCCESS)
 		goto out;
@@ -2020,19 +2078,19 @@ out:
  */
 int rtw_halmac_set_tx_address(struct dvobj_priv *d, enum _hw_port hwport, u8 *addr)
 {
-	struct _HALMAC_ADAPTER *halmac;
-	struct _HALMAC_API *api;
-	u8 port;
-	union _HALMAC_WLAN_ADDR hwa;
-	enum _HALMAC_RET_STATUS status;
+	struct halmac_adapter *halmac;
+	struct halmac_api *api;
+	enum halmac_portid port;
+	union halmac_wlan_addr hwa;
+	enum halmac_ret_status status;
 	int err = -1;
 
 
 	halmac = dvobj_to_halmac(d);
 	api = HALMAC_GET_API(halmac);
 	port = _hw_port_drv2halmac(hwport);
-	_rtw_memset(&hwa, 0, sizeof(union _HALMAC_WLAN_ADDR));
-	_rtw_memcpy(hwa.Address, addr, 6);
+	_rtw_memset(&hwa, 0, sizeof(hwa));
+	_rtw_memcpy(hwa.addr, addr, 6);
 
 	status = api->halmac_cfg_transmitter_addr(halmac, port, &hwa);
 	if (status != HALMAC_RET_SUCCESS)
@@ -2055,12 +2113,11 @@ out:
  */
 int rtw_halmac_set_network_type(struct dvobj_priv *d, enum _hw_port hwport, u8 type)
 {
-#if 0 /* Fail to set AP mode for port0 */
-	struct _HALMAC_ADAPTER *halmac;
-	struct _HALMAC_API *api;
-	u8 port;
-	enum _HALMAC_NETWORK_TYPE_SELECT network;
-	enum _HALMAC_RET_STATUS status;
+	struct halmac_adapter *halmac;
+	struct halmac_api *api;
+	enum halmac_portid port;
+	enum halmac_network_type_select network;
+	enum halmac_ret_status status;
 	int err = -1;
 
 
@@ -2076,61 +2133,6 @@ int rtw_halmac_set_network_type(struct dvobj_priv *d, enum _hw_port hwport, u8 t
 	err = 0;
 out:
 	return err;
-#else
-	struct _ADAPTER *a;
-	u8 port;
-	enum _HALMAC_NETWORK_TYPE_SELECT network;
-	u32 val;
-	int err = -1;
-
-
-	a = dvobj_get_primary_adapter(d);
-	port = _hw_port_drv2halmac(hwport);
-	network = _network_type_drv2halmac(type);
-
-	if ((port > 0) && (network == HALMAC_NETWORK_AP))
-		goto out;
-
-	switch (port) {
-	case 0:
-		val = rtw_read32(a, REG_CR);
-		val = BIT_SET_NETYPE0(val, network);
-		rtw_write32(a, REG_CR, val);
-		break;
-
-	case 1:
-		val = rtw_read32(a, REG_CR);
-		val = BIT_SET_NETYPE1(val, network);
-		rtw_write32(a, REG_CR, val);
-		break;
-
-	case 2:
-		val = rtw_read32(a, REG_CR_EXT);
-		val = BIT_SET_NETYPE2(val, network);
-		rtw_write32(a, REG_CR_EXT, val);
-		break;
-
-	case 3:
-		val = rtw_read32(a, REG_CR_EXT);
-		val = BIT_SET_NETYPE3(val, network);
-		rtw_write32(a, REG_CR_EXT, val);
-		break;
-
-	case 4:
-		val = rtw_read32(a, REG_CR_EXT);
-		val = BIT_SET_NETYPE4(val, network);
-		rtw_write32(a, REG_CR_EXT, val);
-		break;
-
-	default:
-		goto out;
-	}
-
-
-	err = 0;
-out:
-	return err;
-#endif
 }
 
 /**
@@ -2145,10 +2147,10 @@ out:
  */
 int rtw_halmac_reset_tsf(struct dvobj_priv *d, enum _hw_port hwport)
 {
-	struct _HALMAC_ADAPTER *halmac;
-	struct _HALMAC_API *api;
-	u8 port;
-	enum _HALMAC_RET_STATUS status;
+	struct halmac_adapter *halmac;
+	struct halmac_api *api;
+	enum halmac_portid port;
+	enum halmac_ret_status status;
 	int err = -1;
 
 
@@ -2178,10 +2180,10 @@ out:
 int rtw_halmac_set_bcn_interval(struct dvobj_priv *d, enum _hw_port hwport,
 				u32 interval)
 {
-	struct _HALMAC_ADAPTER *halmac;
-	struct _HALMAC_API *api;
-	u8 port;
-	enum _HALMAC_RET_STATUS status;
+	struct halmac_adapter *halmac;
+	struct halmac_api *api;
+	enum halmac_portid port;
+	enum halmac_ret_status status;
 	int err = -1;
 
 
@@ -2211,18 +2213,18 @@ out:
 int rtw_halmac_set_bcn_ctrl(struct dvobj_priv *d, enum _hw_port hwport,
 			struct rtw_halmac_bcn_ctrl *bcn_ctrl)
 {
-	struct _HALMAC_ADAPTER *halmac;
-	struct _HALMAC_API *api;
-	u8 port;
-	struct HALMAC_BCN_CTRL ctrl;
-	enum _HALMAC_RET_STATUS status;
+	struct halmac_adapter *halmac;
+	struct halmac_api *api;
+	enum halmac_portid port;
+	struct halmac_bcn_ctrl ctrl;
+	enum halmac_ret_status status;
 	int err = -1;
 
 
 	halmac = dvobj_to_halmac(d);
 	api = HALMAC_GET_API(halmac);
 	port = _hw_port_drv2halmac(hwport);
-	_rtw_memset(&ctrl, 0, sizeof(struct HALMAC_BCN_CTRL));
+	_rtw_memset(&ctrl, 0, sizeof(ctrl));
 	_beacon_ctrl_drv2halmac(bcn_ctrl, &ctrl);
 
 	status = api->halmac_rw_bcn_ctrl(halmac, port, 1, &ctrl);
@@ -2246,10 +2248,10 @@ out:
  */
 int rtw_halmac_set_aid(struct dvobj_priv *d, enum _hw_port hwport, u16 aid)
 {
-	struct _HALMAC_ADAPTER *halmac;
-	struct _HALMAC_API *api;
-	u8 port;
-	enum _HALMAC_RET_STATUS status;
+	struct halmac_adapter *halmac;
+	struct halmac_api *api;
+	enum halmac_portid port;
+	enum halmac_ret_status status;
 	int err = -1;
 
 
@@ -2318,9 +2320,9 @@ out:
 
 int rtw_halmac_set_bandwidth(struct dvobj_priv *d, u8 channel, u8 pri_ch_idx, u8 bw)
 {
-	PHALMAC_ADAPTER mac;
-	PHALMAC_API api;
-	HALMAC_RET_STATUS status;
+	struct halmac_adapter *mac;
+	struct halmac_api *api;
+	enum halmac_ret_status status;
 
 
 	mac = dvobj_to_halmac(d);
@@ -2345,11 +2347,11 @@ int rtw_halmac_set_bandwidth(struct dvobj_priv *d, u8 channel, u8 pri_ch_idx, u8
  */
 int rtw_halmac_set_edca(struct dvobj_priv *d, u8 queue, u8 aifs, u8 cw, u16 txop)
 {
-	PHALMAC_ADAPTER mac;
-	PHALMAC_API api;
-	HALMAC_ACQ_ID ac;
-	HALMAC_EDCA_PARA edca;
-	HALMAC_RET_STATUS status;
+	struct halmac_adapter *mac;
+	struct halmac_api *api;
+	enum halmac_acq_id ac;
+	struct halmac_edca_para edca;
+	enum halmac_ret_status status;
 
 
 	mac = dvobj_to_halmac(d);
@@ -2383,6 +2385,164 @@ int rtw_halmac_set_edca(struct dvobj_priv *d, u8 queue, u8 aifs, u8 cw, u16 txop
 	return 0;
 }
 
+/**
+ * rtw_halmac_set_rts_full_bw() - Send RTS to all covered channels
+ * @d:		struct dvobj_priv*
+ * @enable:	_TRUE(enable), _FALSE(disable)
+ *
+ * Hradware will duplicate RTS packet to all channels which are covered in used
+ * bandwidth.
+ *
+ * Return 0 if process OK, otherwise -1.
+ */
+int rtw_halmac_set_rts_full_bw(struct dvobj_priv *d, u8 enable)
+{
+	struct halmac_adapter *mac;
+	struct halmac_api *api;
+	enum halmac_ret_status status;
+	u8 full;
+
+
+	mac = dvobj_to_halmac(d);
+	api = HALMAC_GET_API(mac);
+	full = (enable == _TRUE) ? 1 : 0;
+
+	status = api->halmac_set_hw_value(mac, HALMAC_HW_RTS_FULL_BW, &full);
+	if (HALMAC_RET_SUCCESS != status)
+		return -1;
+
+	return 0;
+}
+
+#ifdef RTW_HALMAC_DBG_POWER_SWITCH
+static void _dump_mac_reg(struct dvobj_priv *d, u32 start, u32 end)
+{
+	struct _ADAPTER *adapter;
+	int i, j = 1;
+
+
+	adapter = dvobj_get_primary_adapter(d);
+	for (i = start; i < end; i += 4) {
+		if (j % 4 == 1)
+			RTW_PRINT("0x%04x", i);
+		_RTW_PRINT(" 0x%08x ", rtw_read32(adapter, i));
+		if ((j++) % 4 == 0)
+			_RTW_PRINT("\n");
+	}
+}
+
+void dump_dbg_val(struct _ADAPTER *a, u32 reg)
+{
+	u32 v32;
+
+
+	rtw_write8(a, 0x3A, reg);
+	v32 = rtw_read32(a, 0xC0);
+	RTW_PRINT("0x3A = %02x, 0xC0 = 0x%08x\n",reg, v32);
+}
+
+#ifdef CONFIG_PCI_HCI
+static void _dump_pcie_cfg_space(struct dvobj_priv *d)
+{
+	struct _ADAPTER *padapter = dvobj_get_primary_adapter(d);
+	struct dvobj_priv       *pdvobjpriv = adapter_to_dvobj(padapter);
+	struct pci_dev  *pdev = pdvobjpriv->ppcidev;
+	struct pci_dev  *bridge_pdev = pdev->bus->self;
+
+        u32 tmp[4] = { 0 };
+        u32 i, j;
+
+	RTW_PRINT("\n*****  PCI Device Configuration Space *****\n\n");
+
+        for(i = 0; i < 0x100; i += 0x10)
+        {
+                for (j = 0 ; j < 4 ; j++)
+                        pci_read_config_dword(pdev, i + j * 4, tmp+j);
+
+        	RTW_PRINT("%03x: %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x\n",
+                        i, tmp[0] & 0xFF, (tmp[0] >> 8) & 0xFF, (tmp[0] >> 16) & 0xFF, (tmp[0] >> 24) & 0xFF,
+                        tmp[1] & 0xFF, (tmp[1] >> 8) & 0xFF, (tmp[1] >> 16) & 0xFF, (tmp[1] >> 24) & 0xFF,
+                        tmp[2] & 0xFF, (tmp[2] >> 8) & 0xFF, (tmp[2] >> 16) & 0xFF, (tmp[2] >> 24) & 0xFF,
+                        tmp[3] & 0xFF, (tmp[3] >> 8) & 0xFF, (tmp[3] >> 16) & 0xFF, (tmp[3] >> 24) & 0xFF);
+        }
+
+	RTW_PRINT("\n*****  PCI Host Device Configuration Space*****\n\n");
+
+        for(i = 0; i < 0x100; i += 0x10)
+        {
+                for (j = 0 ; j < 4 ; j++)
+                        pci_read_config_dword(bridge_pdev, i + j * 4, tmp+j);
+
+        	RTW_PRINT("%03x: %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x\n",
+                        i, tmp[0] & 0xFF, (tmp[0] >> 8) & 0xFF, (tmp[0] >> 16) & 0xFF, (tmp[0] >> 24) & 0xFF,
+                        tmp[1] & 0xFF, (tmp[1] >> 8) & 0xFF, (tmp[1] >> 16) & 0xFF, (tmp[1] >> 24) & 0xFF,
+                        tmp[2] & 0xFF, (tmp[2] >> 8) & 0xFF, (tmp[2] >> 16) & 0xFF, (tmp[2] >> 24) & 0xFF,
+                        tmp[3] & 0xFF, (tmp[3] >> 8) & 0xFF, (tmp[3] >> 16) & 0xFF, (tmp[3] >> 24) & 0xFF);
+        }
+}
+#endif
+
+static void _dump_mac_reg_for_power_switch(struct dvobj_priv *d,
+					   const char* caller, char* desc)
+{
+	struct _ADAPTER *a;
+	u8 v8;
+
+
+	RTW_PRINT("%s: %s\n", caller, desc);
+	RTW_PRINT("======= MAC REG =======\n");
+	/* page 0/1 */
+	_dump_mac_reg(d, 0x0, 0x200);
+	_dump_mac_reg(d, 0x300, 0x400); /* also dump page 3 */
+
+	/* dump debug register */
+	a = dvobj_get_primary_adapter(d);
+
+#ifdef CONFIG_PCI_HCI
+	_dump_pcie_cfg_space(d);
+
+	v8 = rtw_read8(a, 0xF6) | 0x01;
+	rtw_write8(a, 0xF6, v8);
+	RTW_PRINT("0xF6 = %02x\n", v8);
+
+	dump_dbg_val(a, 0x63);
+	dump_dbg_val(a, 0x64);
+	dump_dbg_val(a, 0x68);
+	dump_dbg_val(a, 0x69);
+	dump_dbg_val(a, 0x6a);
+	dump_dbg_val(a, 0x6b);
+	dump_dbg_val(a, 0x71);
+	dump_dbg_val(a, 0x72);
+#endif
+}
+
+static enum halmac_ret_status _power_switch(struct halmac_adapter *halmac,
+					    struct halmac_api *api,
+					    enum halmac_mac_power pwr)
+{
+	enum halmac_ret_status status;
+	char desc[80] = {0};
+
+
+	rtw_sprintf(desc, 80, "before calling power %s",
+				(pwr==HALMAC_MAC_POWER_ON)?"on":"off");
+	_dump_mac_reg_for_power_switch((struct dvobj_priv *)halmac->drv_adapter,
+			__FUNCTION__, desc);
+
+	status = api->halmac_mac_power_switch(halmac, pwr);
+	RTW_PRINT("%s: status=%d\n", __FUNCTION__, status);
+
+	rtw_sprintf(desc, 80, "after calling power %s",
+				(pwr==HALMAC_MAC_POWER_ON)?"on":"off");
+	_dump_mac_reg_for_power_switch((struct dvobj_priv *)halmac->drv_adapter,
+			__FUNCTION__, desc);
+
+	return status;
+}
+#else /* !RTW_HALMAC_DBG_POWER_SWITCH */
+#define _power_switch(mac, api, pwr)	(api)->halmac_mac_power_switch(mac, pwr)
+#endif /* !RTW_HALMAC_DBG_POWER_SWITCH */
+
 /*
  * Description:
  *	Power on device hardware.
@@ -2396,11 +2556,17 @@ int rtw_halmac_set_edca(struct dvobj_priv *d, u8 queue, u8 aifs, u8 cw, u16 txop
  */
 int rtw_halmac_poweron(struct dvobj_priv *d)
 {
-	PHALMAC_ADAPTER halmac;
-	PHALMAC_API api;
-	HALMAC_RET_STATUS status;
+	struct halmac_adapter *halmac;
+	struct halmac_api *api;
+	enum halmac_ret_status status;
 	int err = -1;
+#if defined(CONFIG_PCI_HCI) && defined(CONFIG_RTL8822B)
+	struct _ADAPTER *a;
+	u8 v8;
+	u32 addr;
 
+	a = dvobj_get_primary_adapter(d);
+#endif
 
 	halmac = dvobj_to_halmac(d);
 	if (!halmac)
@@ -2418,14 +2584,48 @@ int rtw_halmac_poweron(struct dvobj_priv *d)
 		goto out;
 #endif /* CONFIG_SDIO_HCI */
 
-	status = api->halmac_mac_power_switch(halmac, HALMAC_MAC_POWER_ON);
+#if defined(CONFIG_PCI_HCI) && defined(CONFIG_RTL8822B)
+	addr = 0x3F3;
+	v8 = rtw_read8(a, addr);
+	RTW_PRINT("%s: 0x%X = 0x%02x\n", __FUNCTION__, addr, v8);
+	/* are we in pcie debug mode? */
+	if (!(v8 & BIT(2))) {
+		RTW_PRINT("%s: Enable pcie debug mode\n", __FUNCTION__);
+		v8 |= BIT(2);
+		v8 = rtw_write8(a, addr, v8);
+	}
+#endif
+
+	status = _power_switch(halmac, api, HALMAC_MAC_POWER_ON);
 	if (HALMAC_RET_PWR_UNCHANGE == status) {
+
+#if defined(CONFIG_PCI_HCI) && defined(CONFIG_RTL8822B)
+		addr = 0x3F3;
+		v8 = rtw_read8(a, addr);
+		RTW_PRINT("%s: 0x%X = 0x%02x\n", __FUNCTION__, addr, v8);
+		
+		/* are we in pcie debug mode? */
+		if (!(v8 & BIT(2))) {
+			RTW_PRINT("%s: Enable pcie debug mode\n", __FUNCTION__);
+			v8 |= BIT(2);
+			v8 = rtw_write8(a, addr, v8);
+		} else if (v8 & BIT(0)) {
+			/* DMA stuck */
+			addr = 0x1350;
+			v8 = rtw_read8(a, addr);
+			RTW_PRINT("%s: 0x%X = 0x%02x\n", __FUNCTION__, addr, v8);
+			RTW_PRINT("%s: recover DMA stuck\n", __FUNCTION__);
+			v8 |= BIT(6);
+			v8 = rtw_write8(a, addr, v8);
+			RTW_PRINT("%s: 0x%X = 0x%02x\n", __FUNCTION__, addr, v8);
+		}
+#endif
 		/*
 		 * Work around for warm reboot but device not power off,
 		 * but it would also fall into this case when auto power on is enabled.
 		 */
-		api->halmac_mac_power_switch(halmac, HALMAC_MAC_POWER_OFF);
-		status = api->halmac_mac_power_switch(halmac, HALMAC_MAC_POWER_ON);
+		_power_switch(halmac, api, HALMAC_MAC_POWER_OFF);
+		status = _power_switch(halmac, api, HALMAC_MAC_POWER_ON);
 		RTW_WARN("%s: Power state abnormal, try to recover...%s\n",
 			 __FUNCTION__, (HALMAC_RET_SUCCESS == status)?"OK":"FAIL!");
 	}
@@ -2454,9 +2654,9 @@ out:
  */
 int rtw_halmac_poweroff(struct dvobj_priv *d)
 {
-	PHALMAC_ADAPTER halmac;
-	PHALMAC_API api;
-	HALMAC_RET_STATUS status;
+	struct halmac_adapter *halmac;
+	struct halmac_api *api;
+	enum halmac_ret_status status;
 	int err = -1;
 
 
@@ -2466,7 +2666,7 @@ int rtw_halmac_poweroff(struct dvobj_priv *d)
 
 	api = HALMAC_GET_API(halmac);
 
-	status = api->halmac_mac_power_switch(halmac, HALMAC_MAC_POWER_OFF);
+	status = _power_switch(halmac, api, HALMAC_MAC_POWER_OFF);
 	if ((HALMAC_RET_SUCCESS != status)
 	    && (HALMAC_RET_PWR_UNCHANGE != status))
 		goto out;
@@ -2477,7 +2677,7 @@ out:
 }
 
 #ifdef CONFIG_SUPPORT_TRX_SHARED
-static inline HALMAC_RX_FIFO_EXPANDING_MODE _trx_share_mode_drv2halmac(u8 trx_share_mode)
+static inline enum halmac_rx_fifo_expanding_mode _trx_share_mode_drv2halmac(u8 trx_share_mode)
 {
 	if (0 == trx_share_mode)
 		return HALMAC_RX_FIFO_EXPANDING_MODE_DISABLE;
@@ -2490,16 +2690,18 @@ static inline HALMAC_RX_FIFO_EXPANDING_MODE _trx_share_mode_drv2halmac(u8 trx_sh
 	else
 		return HALMAC_RX_FIFO_EXPANDING_MODE_DISABLE;
 }
-static HALMAC_RX_FIFO_EXPANDING_MODE _rtw_get_trx_share_mode(_adapter *adapter)
+
+static enum halmac_rx_fifo_expanding_mode _rtw_get_trx_share_mode(struct _ADAPTER *adapter)
 {
-	struct registry_priv  *registry_par = &adapter->registrypriv;
+	struct registry_priv *registry_par = &adapter->registrypriv;
 
 	return _trx_share_mode_drv2halmac(registry_par->trx_share_mode);
 }
-void dump_trx_share_mode(void *sel, _adapter *adapter)
+
+void dump_trx_share_mode(void *sel, struct _ADAPTER *adapter)
 {
 	struct registry_priv  *registry_par = &adapter->registrypriv;
-	u8 mode =  _trx_share_mode_drv2halmac(registry_par->trx_share_mode);
+	u8 mode = _trx_share_mode_drv2halmac(registry_par->trx_share_mode);
 
 	if (HALMAC_RX_FIFO_EXPANDING_MODE_1_BLOCK == mode)
 		RTW_PRINT_SEL(sel, "TRx share mode : %s\n", "RX_FIFO_EXPANDING_MODE_1");
@@ -2512,7 +2714,7 @@ void dump_trx_share_mode(void *sel, _adapter *adapter)
 }
 #endif
 
-static enum _HALMAC_DRV_RSVD_PG_NUM _rsvd_page_num_drv2halmac(u8 num)
+static enum halmac_drv_rsvd_pg_num _rsvd_page_num_drv2halmac(u16 num)
 {
 	if (num <= 8)
 		return HALMAC_RSVD_PG_NUM8;
@@ -2520,18 +2722,24 @@ static enum _HALMAC_DRV_RSVD_PG_NUM _rsvd_page_num_drv2halmac(u8 num)
 		return HALMAC_RSVD_PG_NUM16;
 	if (num <= 24)
 		return HALMAC_RSVD_PG_NUM24;
-
-	if (num > 32)
+	if (num <= 32)
+		return HALMAC_RSVD_PG_NUM32;
+	if (num <= 64)
+		return HALMAC_RSVD_PG_NUM64;
+	if (num <= 128)
+		return HALMAC_RSVD_PG_NUM128;
+
+	if (num > 256)
 		RTW_WARN("%s: Fail to allocate RSVD page(%d)!!"
-			 " The MAX RSVD page number is 32...\n",
+			 " The MAX RSVD page number is 256...\n",
 			 __FUNCTION__, num);
 
-	return HALMAC_RSVD_PG_NUM32;
+	return HALMAC_RSVD_PG_NUM256;
 }
 
-static u8 _rsvd_page_num_halmac2drv(HALMAC_DRV_RSVD_PG_NUM rsvd_page_number)
+static u16 _rsvd_page_num_halmac2drv(enum halmac_drv_rsvd_pg_num rsvd_page_number)
 {
-	u8 num = 0;
+	u16 num = 0;
 
 
 	switch (rsvd_page_number) {
@@ -2550,12 +2758,24 @@ static u8 _rsvd_page_num_halmac2drv(HALMAC_DRV_RSVD_PG_NUM rsvd_page_number)
 	case HALMAC_RSVD_PG_NUM32:
 		num = 32;
 		break;
+
+	case HALMAC_RSVD_PG_NUM64:
+		num = 64;
+		break;
+
+	case HALMAC_RSVD_PG_NUM128:
+		num = 128;
+		break;
+
+	case HALMAC_RSVD_PG_NUM256:
+		num = 256;
+		break;
 	}
 
 	return num;
 }
 
-static HALMAC_TRX_MODE _choose_trx_mode(struct dvobj_priv *d)
+static enum halmac_trx_mode _choose_trx_mode(struct dvobj_priv *d)
 {
 	PADAPTER p;
 
@@ -2573,9 +2793,9 @@ static HALMAC_TRX_MODE _choose_trx_mode(struct dvobj_priv *d)
 	return HALMAC_TRX_MODE_NORMAL;
 }
 
-static inline enum _HALMAC_RF_TYPE _rf_type_drv2halmac(enum rf_type rf_drv)
+static inline enum halmac_rf_type _rf_type_drv2halmac(enum rf_type rf_drv)
 {
-	enum _HALMAC_RF_TYPE rf_mac;
+	enum halmac_rf_type rf_mac;
 
 
 	switch (rf_drv) {
@@ -2612,59 +2832,112 @@ static inline enum _HALMAC_RF_TYPE _rf_type_drv2halmac(enum rf_type rf_drv)
 	return rf_mac;
 }
 
-static void _ant_status_by_rf_type(enum rf_type rf, u8 *tx, u8 *rx)
+static inline enum rf_type _rf_type_halmac2drv(enum halmac_rf_type rf_mac)
 {
-	switch (rf) {
-	case RF_1T1R:
-	case RF_1T2R:
-		*tx = BB_PATH_A;
+	enum rf_type rf_drv;
+
+
+	switch (rf_mac) {
+	case HALMAC_RF_1T2R:
+		rf_drv = RF_1T2R;
 		break;
-	case RF_2T2R:
-	case RF_2T3R:
-	case RF_2T4R:
-		*tx = BB_PATH_AB;
+	case HALMAC_RF_2T4R:
+		rf_drv = RF_2T4R;
 		break;
-	case RF_3T3R:
-	case RF_3T4R:
-		*tx = BB_PATH_ABC;
+	case HALMAC_RF_2T2R:
+	case HALMAC_RF_2T2R_GREEN:
+		rf_drv = RF_2T2R;
 		break;
-	case RF_4T4R:
-	default:
-		*tx = BB_PATH_ABCD;
+	case HALMAC_RF_2T3R:
+		rf_drv = RF_2T3R;
 		break;
-	}
-
-	switch (rf) {
-	case RF_1T1R:
-		*rx = BB_PATH_A;
+	case HALMAC_RF_1T1R:
+		rf_drv = RF_1T1R;
 		break;
-	case RF_1T2R:
-	case RF_2T2R:
-		*rx = BB_PATH_AB;
+	case HALMAC_RF_3T3R:
+		rf_drv = RF_3T3R;
 		break;
-	case RF_2T3R:
-	case RF_3T3R:
-		*rx = BB_PATH_ABC;
+	case HALMAC_RF_3T4R:
+		rf_drv = RF_3T4R;
+		break;
+	case HALMAC_RF_4T4R:
+		rf_drv = RF_4T4R;
 		break;
-	case RF_2T4R:
-	case RF_3T4R:
-	case RF_4T4R:
 	default:
-		*rx = BB_PATH_ABCD;
+		rf_drv = RF_TYPE_MAX;
+		RTW_ERR("%s: Invalid RF type(0x%x)!\n", __FUNCTION__, rf_mac);
 		break;
 	}
+
+	return rf_drv;
+}
+
+static enum odm_cut_version _cut_version_drv2phydm(
+				enum tag_HAL_Cut_Version_Definition cut_drv)
+{
+	enum odm_cut_version cut_phydm = ODM_CUT_A;
+	u32 diff;
+
+
+	if (cut_drv > K_CUT_VERSION)
+		RTW_WARN("%s: unknown cut_ver=%d !!\n", __FUNCTION__, cut_drv);
+
+	diff = cut_drv - A_CUT_VERSION;
+	cut_phydm += diff;
+
+	return cut_phydm;
+}
+
+static int _send_general_info_by_reg(struct dvobj_priv *d,
+				     struct halmac_general_info *info)
+{
+	struct _ADAPTER *a;
+	struct hal_com_data *hal;
+	enum tag_HAL_Cut_Version_Definition cut_drv;
+	enum rf_type rftype;
+	enum odm_cut_version cut_phydm;
+	u8 h2c[RTW_HALMAC_H2C_MAX_SIZE] = {0};
+
+
+	a = dvobj_get_primary_adapter(d);
+	hal = GET_HAL_DATA(a);
+	rftype = _rf_type_halmac2drv(info->rf_type);
+	cut_drv = GET_CVID_CUT_VERSION(hal->version_id);
+	cut_phydm = _cut_version_drv2phydm(cut_drv);
+
+#define CLASS_GENERAL_INFO_REG				0x02
+#define CMD_ID_GENERAL_INFO_REG				0x0C
+#define GENERAL_INFO_REG_SET_CMD_ID(buf, v)		SET_BITS_TO_LE_4BYTE(buf, 0, 5, v)
+#define GENERAL_INFO_REG_SET_CLASS(buf, v)		SET_BITS_TO_LE_4BYTE(buf, 5, 3, v)
+#define GENERAL_INFO_REG_SET_RFE_TYPE(buf, v)		SET_BITS_TO_LE_4BYTE(buf, 8, 8, v)
+#define GENERAL_INFO_REG_SET_RF_TYPE(buf, v)		SET_BITS_TO_LE_4BYTE(buf, 16, 8, v)
+#define GENERAL_INFO_REG_SET_CUT_VERSION(buf, v)	SET_BITS_TO_LE_4BYTE(buf, 24, 8, v)
+#define GENERAL_INFO_REG_SET_RX_ANT_STATUS(buf, v)	SET_BITS_TO_LE_1BYTE(buf+4, 0, 4, v)
+#define GENERAL_INFO_REG_SET_TX_ANT_STATUS(buf, v)	SET_BITS_TO_LE_1BYTE(buf+4, 4, 4, v)
+
+	GENERAL_INFO_REG_SET_CMD_ID(h2c, CMD_ID_GENERAL_INFO_REG);
+	GENERAL_INFO_REG_SET_CLASS(h2c, CLASS_GENERAL_INFO_REG);
+	GENERAL_INFO_REG_SET_RFE_TYPE(h2c, info->rfe_type);
+	GENERAL_INFO_REG_SET_RF_TYPE(h2c, rftype);
+	GENERAL_INFO_REG_SET_CUT_VERSION(h2c, cut_phydm);
+	GENERAL_INFO_REG_SET_RX_ANT_STATUS(h2c, info->rx_ant_status);
+	GENERAL_INFO_REG_SET_TX_ANT_STATUS(h2c, info->tx_ant_status);
+
+	return rtw_halmac_send_h2c(d, h2c);
 }
 
 static int _send_general_info(struct dvobj_priv *d)
 {
 	struct _ADAPTER *adapter;
 	struct hal_com_data *hal;
-	struct _HALMAC_ADAPTER *halmac;
-	struct _HALMAC_API *api;
-	struct _HALMAC_GENERAL_INFO info;
-	enum _HALMAC_RET_STATUS status;
-	enum rf_type rf;
-	u8 val8;
+	struct halmac_adapter *halmac;
+	struct halmac_api *api;
+	struct halmac_general_info info;
+	enum halmac_ret_status status;
+	enum rf_type rf = RF_1T1R;
+	enum bb_path txpath = BB_PATH_A;
+	enum bb_path rxpath = BB_PATH_A;
+	int err;
 
 
 	adapter = dvobj_get_primary_adapter(d);
@@ -2676,10 +2949,10 @@ static int _send_general_info(struct dvobj_priv *d)
 
 	_rtw_memset(&info, 0, sizeof(info));
 	info.rfe_type = (u8)hal->rfe_type;
-	rtw_hal_get_hwreg(adapter, HW_VAR_RF_TYPE, (u8 *)&val8);
-	rf = (enum rf_type)val8;
+	rtw_hal_get_rf_path(d, &rf, &txpath, &rxpath);
 	info.rf_type = _rf_type_drv2halmac(rf);
-	_ant_status_by_rf_type(rf, &info.tx_ant_status, &info.rx_ant_status);
+	info.tx_ant_status = (u8)txpath;
+	info.rx_ant_status = (u8)rxpath;
 
 	status = api->halmac_send_general_info(halmac, &info);
 	switch (status) {
@@ -2693,6 +2966,13 @@ static int _send_general_info(struct dvobj_priv *d)
 		return -1;
 	}
 
+	err = _send_general_info_by_reg(d, &info);
+	if (err) {
+		RTW_ERR("%s: Fail to send general info by register!\n",
+			 __FUNCTION__);
+		return -1;
+	}
+
 	return 0;
 }
 
@@ -2700,11 +2980,11 @@ static int _cfg_drv_rsvd_pg_num(struct dvobj_priv *d)
 {
 	struct _ADAPTER *a;
 	struct hal_com_data *hal;
-	PHALMAC_ADAPTER halmac;
-	PHALMAC_API api;
-	enum _HALMAC_DRV_RSVD_PG_NUM rsvd_page_number;
-	HALMAC_RET_STATUS status;
-	u8 drv_rsvd_num;
+	struct halmac_adapter *halmac;
+	struct halmac_api *api;
+	enum halmac_drv_rsvd_pg_num rsvd_page_number;
+	enum halmac_ret_status status;
+	u16 drv_rsvd_num;
 
 
 	a = dvobj_get_primary_adapter(d);
@@ -2726,6 +3006,199 @@ static int _cfg_drv_rsvd_pg_num(struct dvobj_priv *d)
 	return 0;
 }
 
+static void _debug_dlfw_fail(struct dvobj_priv *d)
+{
+	struct _ADAPTER *a;
+	u32 addr;
+	u32 v32, i, n;
+	u8 data[0x100] = {0};
+
+
+	a = dvobj_get_primary_adapter(d);
+
+	/* read 0x80[15:0], 0x10F8[31:0] once */
+	addr = 0x80;
+	v32 = rtw_read16(a, addr);
+	RTW_PRINT("%s: 0x%X = 0x%04x\n", __FUNCTION__, addr, v32);
+
+	addr = 0x10F8;
+	v32 = rtw_read32(a, addr);
+	RTW_PRINT("%s: 0x%X = 0x%08x\n", __FUNCTION__, addr, v32);
+
+	/* read 0x10FC[31:0], 5 times */
+	addr = 0x10FC;
+	n = 5;
+	for (i = 0; i < n; i++) {
+		v32 = rtw_read32(a, addr);
+		RTW_PRINT("%s: 0x%X = 0x%08x (%u/%u)\n",
+			  __FUNCTION__, addr, v32, i, n);
+	}
+
+	/*
+	 * write 0x3A[7:0]=0x28 and 0xF6[7:0]=0x01
+	 * and then read 0xC0[31:0] 5 times
+	 */
+	addr = 0x3A;
+	v32 = 0x28;
+	rtw_write8(a, addr, (u8)v32);
+	v32 = rtw_read8(a, addr);
+	RTW_PRINT("%s: 0x%X = 0x%02x\n", __FUNCTION__, addr, v32);
+
+	addr = 0xF6;
+	v32 = 0x1;
+	rtw_write8(a, addr, (u8)v32);
+	v32 = rtw_read8(a, addr);
+	RTW_PRINT("%s: 0x%X = 0x%02x\n", __FUNCTION__, addr, v32);
+
+	addr = 0xC0;
+	n = 5;
+	for (i = 0; i < n; i++) {
+		v32 = rtw_read32(a, addr);
+		RTW_PRINT("%s: 0x%X = 0x%08x (%u/%u)\n",
+			  __FUNCTION__, addr, v32, i, n);
+	}
+
+	/* 0x00~0xFF, 0x1000~0x10FF */
+	addr = 0;
+	n = 0x100;
+	for (i = 0; i < n; i+=4)
+		*(u32*)&data[i] = cpu_to_le32(rtw_read32(a, addr+i));
+	for (i = 0; i < n; i++) {
+		if (i % 16 == 0)
+			RTW_PRINT("0x%04x\t", addr+i);
+		_RTW_PRINT("0x%02x", data[i]);
+		if (i % 16 == 15)
+			_RTW_PRINT("\n");
+		else
+			_RTW_PRINT(" ");
+	}
+
+	addr = 0x1000;
+	n = 0x100;
+	for (i = 0; i < n; i+=4)
+		*(u32*)&data[i] = cpu_to_le32(rtw_read32(a, addr+i));
+	for (i = 0; i < n; i++) {
+		if (i % 16 == 0)
+			RTW_PRINT("0x%04x\t", addr+i);
+		_RTW_PRINT("0x%02x", data[i]);
+		if (i % 16 == 15)
+			_RTW_PRINT("\n");
+		else
+			_RTW_PRINT(" ");
+	}
+
+	/* read 0x80 after 10 secs */
+	rtw_msleep_os(10000);
+	addr = 0x80;
+	v32 = rtw_read16(a, addr);
+	RTW_PRINT("%s: 0x%X = 0x%04x (after 10 secs)\n",
+		  __FUNCTION__, addr, v32);
+}
+
+static enum halmac_ret_status _enter_cpu_sleep_mode(struct dvobj_priv *d)
+{
+	struct hal_com_data *hal;
+	struct halmac_adapter *mac;
+	struct halmac_api *api;
+
+
+	hal = GET_HAL_DATA(dvobj_get_primary_adapter(d));
+	mac = dvobj_to_halmac(d);
+	api = HALMAC_GET_API(mac);
+
+#ifdef CONFIG_RTL8822B
+	/* Support after firmware version 21 */
+	if (hal->firmware_version < 21)
+		return HALMAC_RET_NOT_SUPPORT;
+#elif defined(CONFIG_RTL8821C)
+	/* Support after firmware version 13.6 or 16 */
+	if (hal->firmware_version == 13) {
+		if (hal->firmware_sub_version < 6)
+			return HALMAC_RET_NOT_SUPPORT;
+	} else if (hal->firmware_version < 16) {
+		return HALMAC_RET_NOT_SUPPORT;
+	}
+#endif
+
+	return api->halmac_enter_cpu_sleep_mode(mac);
+}
+
+/*
+ * _cpu_sleep() - Let IC CPU enter sleep mode
+ * @d:		struct dvobj_priv*
+ * @timeout:	time limit of wait, unit is ms
+ *		0 for no limit
+ *
+ * Rteurn 0 for CPU in sleep mode, otherwise fail to enter sleep mode.
+ * Error codes definition are as follow:
+ * 	-1	HALMAC enter sleep return fail
+ *	-2	HALMAC get CPU mode return fail
+ *	-110	timeout
+ */
+static int _cpu_sleep(struct dvobj_priv *d, u32 timeout)
+{
+	struct halmac_adapter *mac;
+	struct halmac_api *api;
+	enum halmac_ret_status status;
+	enum halmac_wlcpu_mode mode = HALMAC_WLCPU_UNDEFINE;
+	systime start_t;
+	s32 period = 0;
+	u32 cnt = 0;
+	int err = 0;
+
+
+	mac = dvobj_to_halmac(d);
+	api = HALMAC_GET_API(mac);
+
+	start_t = rtw_get_current_time();
+
+	status = _enter_cpu_sleep_mode(d);
+	if (status != HALMAC_RET_SUCCESS) {
+		if (status != HALMAC_RET_NOT_SUPPORT)
+			err = -1;
+		goto exit;
+	}
+
+	do {
+		cnt++;
+
+		mode = HALMAC_WLCPU_UNDEFINE;
+		status = api->halmac_get_cpu_mode(mac, &mode);
+
+		period = rtw_get_passing_time_ms(start_t);
+
+		if (status != HALMAC_RET_SUCCESS) {
+			err = -2;
+			break;
+		}
+		if (mode == HALMAC_WLCPU_SLEEP)
+			break;
+		if (period > timeout) {
+			err = -110;
+			break;
+		}
+
+		rtw_msleep_os(1);
+	} while (1);
+
+exit:
+	if (err)
+		RTW_ERR("%s: Fail to enter sleep mode! (%d, %d)\n",
+			__FUNCTION__, status, mode);
+
+	RTW_INFO("%s: Cost %dms to polling %u times. (err=%d)\n",
+		__FUNCTION__, period, cnt, err);
+
+	return err;
+}
+
+static void _init_trx_cfg_drv(struct dvobj_priv *d)
+{
+#ifdef CONFIG_PCI_HCI
+	rtw_hal_irp_reset(dvobj_get_primary_adapter(d));
+#endif
+}
+
 /*
  * Description:
  *	Downlaod Firmware Flow
@@ -2744,17 +3217,17 @@ static int _cfg_drv_rsvd_pg_num(struct dvobj_priv *d)
  */
 static int download_fw(struct dvobj_priv *d, u8 *fw, u32 fwsize, u8 re_dl)
 {
-	PHALMAC_ADAPTER mac;
-	PHALMAC_API api;
-	HALMAC_RET_STATUS status;
-	int err = 0;
 	PHAL_DATA_TYPE hal;
-	HALMAC_FW_VERSION fw_vesion;
+	struct halmac_adapter *mac;
+	struct halmac_api *api;
+	struct halmac_fw_version fw_vesion;
+	enum halmac_ret_status status;
+	int err = 0;
 
 
+	hal = GET_HAL_DATA(dvobj_get_primary_adapter(d));
 	mac = dvobj_to_halmac(d);
 	api = HALMAC_GET_API(mac);
-	hal = GET_HAL_DATA(dvobj_get_primary_adapter(d));
 
 	if ((!fw) || (!fwsize))
 		return -1;
@@ -2775,58 +3248,71 @@ static int download_fw(struct dvobj_priv *d, u8 *fw, u32 fwsize, u8 re_dl)
 	 * somewhere calling rtw_halmac_set_max_dl_fw_size().
 	 */
 
-	/* 4. Download Firmware */
+	if (re_dl) {
+		/* 4. Enter IC CPU sleep mode */
+		err = _cpu_sleep(d, 2000);
+		if (err) {
+			RTW_ERR("%s: IC CPU fail to enter sleep mode!(%d)\n",
+				__FUNCTION__, err);
+			/* skip this error */
+			err = 0;
+		}
+	}
+
+	/* 5. Download Firmware */
 	status = api->halmac_download_firmware(mac, fw, fwsize);
 	if (status != HALMAC_RET_SUCCESS) {
 		RTW_ERR("%s: download firmware FAIL! status=0x%02x\n",
 			__FUNCTION__, status);
+		_debug_dlfw_fail(d);
 		err = -1;
 		goto resume_tx;
 	}
 
+	/* 5.1. (Driver) Reset driver variables if needed */
+	hal->LastHMEBoxNum = 0;
+
+	/* 5.2. (Driver) Get FW version */
+	status = api->halmac_get_fw_version(mac, &fw_vesion);
+	if (status == HALMAC_RET_SUCCESS) {
+		hal->firmware_version = fw_vesion.version;
+		hal->firmware_sub_version = fw_vesion.sub_version;
+		hal->firmware_size = fwsize;
+	}
+
 resume_tx:
-	/* 5. Driver resume TX if needed */
+	/* 6. Driver resume TX if needed */
 	/* ToDo */
 
 	if (err)
 		goto exit;
 
 	if (re_dl) {
-		HALMAC_TRX_MODE mode;
+		enum halmac_trx_mode mode;
 
-		/* 6. Change reserved page size */
+		/* 7. Change reserved page size */
 		err = _cfg_drv_rsvd_pg_num(d);
 		if (err)
 			return -1;
 
-		/* 7. Init TRX Configuration */
+		/* 8. Init TRX Configuration */
 		mode = _choose_trx_mode(d);
 		status = api->halmac_init_trx_cfg(mac, mode);
 		if (HALMAC_RET_SUCCESS != status)
 			return -1;
+		_init_trx_cfg_drv(d);
 
-		/* 8. Config RX Aggregation */
+		/* 9. Config RX Aggregation */
 		err = rtw_halmac_rx_agg_switch(d, _TRUE);
 		if (err)
 			return -1;
 
-		/* 9. Send General Info */
+		/* 10. Send General Info */
 		err = _send_general_info(d);
 		if (err)
 			return -1;
 	}
 
-	/* 10. (Driver) Reset driver variables if needed */
-	hal->LastHMEBoxNum = 0;
-
-	/* 11. (Driver) Get FW version */
-	status = api->halmac_get_fw_version(mac, &fw_vesion);
-	if (status == HALMAC_RET_SUCCESS) {
-		hal->firmware_version = fw_vesion.version;
-		hal->firmware_sub_version = fw_vesion.sub_version;
-		hal->firmware_size = fwsize;
-	}
-
 exit:
 	return err;
 }
@@ -2835,12 +3321,12 @@ static int init_mac_flow(struct dvobj_priv *d)
 {
 	PADAPTER p;
 	struct hal_com_data *hal;
-	PHALMAC_ADAPTER halmac;
-	PHALMAC_API api;
-	enum _HALMAC_DRV_RSVD_PG_NUM rsvd_page_number;
-	HALMAC_WLAN_ADDR hwa;
-	HALMAC_TRX_MODE trx_mode;
-	HALMAC_RET_STATUS status;
+	struct halmac_adapter *halmac;
+	struct halmac_api *api;
+	enum halmac_drv_rsvd_pg_num rsvd_page_number;
+	union halmac_wlan_addr hwa;
+	enum halmac_trx_mode trx_mode;
+	enum halmac_ret_status status;
 	u8 drv_rsvd_num;
 	u8 nettype;
 	int err, err_ret = -1;
@@ -2852,7 +3338,8 @@ static int init_mac_flow(struct dvobj_priv *d)
 	api = HALMAC_GET_API(halmac);
 
 #ifdef CONFIG_SUPPORT_TRX_SHARED
-	status = api->halmac_cfg_rx_fifo_expanding_mode(halmac, _rtw_get_trx_share_mode(p));
+	status = api->halmac_cfg_rxff_expand_mode(halmac,
+						  _rtw_get_trx_share_mode(p));
 	if (status != HALMAC_RET_SUCCESS)
 		goto out;
 #endif
@@ -2877,6 +3364,7 @@ static int init_mac_flow(struct dvobj_priv *d)
 	status = api->halmac_init_mac_cfg(halmac, trx_mode);
 	if (status != HALMAC_RET_SUCCESS)
 		goto out;
+	_init_trx_cfg_drv(d);
 
 	err = rtw_halmac_rx_agg_switch(d, _TRUE);
 	if (err)
@@ -2907,7 +3395,11 @@ static int _drv_enable_trx(struct dvobj_priv *d)
 
 	adapter = dvobj_get_primary_adapter(d);
 	if (adapter->bup == _FALSE) {
+#ifdef CONFIG_NEW_NETDEV_HDL
+		status = rtw_mi_start_drv_threads(adapter);
+#else
 		status = rtw_start_drv_threads(adapter);
+#endif
 		if (status == _FAIL) {
 			RTW_ERR("%s: Start threads Failed!\n", __FUNCTION__);
 			return -1;
@@ -2929,10 +3421,10 @@ static int _drv_enable_trx(struct dvobj_priv *d)
 static int _halmac_init_hal(struct dvobj_priv *d, u8 *fw, u32 fwsize)
 {
 	PADAPTER adapter;
-	PHALMAC_ADAPTER halmac;
-	PHALMAC_API api;
-	HALMAC_RET_STATUS status;
-	u32 ok = _TRUE;
+	struct halmac_adapter *halmac;
+	struct halmac_api *api;
+	enum halmac_ret_status status;
+	u32 ok;
 	u8 fw_ok = _FALSE;
 	int err, err_ret = -1;
 
@@ -3064,7 +3556,7 @@ int rtw_halmac_init_hal_fw_file(struct dvobj_priv *d, u8 *fwpath)
 
 exit:
 	rtw_mfree(fw, fwmaxsize);
-	fw = NULL;
+	/*fw = NULL;*/
 
 	return err;
 }
@@ -3072,9 +3564,9 @@ exit:
 int rtw_halmac_deinit_hal(struct dvobj_priv *d)
 {
 	PADAPTER adapter;
-	PHALMAC_ADAPTER halmac;
-	PHALMAC_API api;
-	HALMAC_RET_STATUS status;
+	struct halmac_adapter *halmac;
+	struct halmac_api *api;
+	enum halmac_ret_status status;
 	int err = -1;
 
 
@@ -3097,9 +3589,9 @@ out:
 
 int rtw_halmac_self_verify(struct dvobj_priv *d)
 {
-	PHALMAC_ADAPTER mac;
-	PHALMAC_API api;
-	HALMAC_RET_STATUS status;
+	struct halmac_adapter *mac;
+	struct halmac_api *api;
+	enum halmac_ret_status status;
 	int err = -1;
 
 
@@ -3121,9 +3613,9 @@ out:
 
 static u8 rtw_halmac_txfifo_is_empty(struct dvobj_priv *d)
 {
-	struct _HALMAC_ADAPTER *mac;
-	struct _HALMAC_API *api;
-	enum _HALMAC_RET_STATUS status;
+	struct halmac_adapter *mac;
+	struct halmac_api *api;
+	enum halmac_ret_status status;
 	u32 chk_num = 10;
 	u8 rst = _FALSE;
 
@@ -3182,7 +3674,7 @@ int rtw_halmac_txfifo_wait_empty(struct dvobj_priv *d, u32 timeout)
 	if (empty == _FALSE) {
 #ifdef CONFIG_RTW_DEBUG
 		u16 dbg_reg[] = {0x210, 0x230, 0x234, 0x238, 0x23C, 0x240,
-				 0x41A, 0x10FC, 0x10F8, 0x11F4, 0x11F8};
+				 0x418, 0x10FC, 0x10F8, 0x11F4, 0x11F8};
 		u8 i;
 		u32 val;
 
@@ -3202,9 +3694,9 @@ int rtw_halmac_txfifo_wait_empty(struct dvobj_priv *d, u32 timeout)
 	return 0;
 }
 
-static enum _HALMAC_DLFW_MEM _fw_mem_drv2halmac(enum fw_mem mem, u8 tx_stop)
+static enum halmac_dlfw_mem _fw_mem_drv2halmac(enum fw_mem mem, u8 tx_stop)
 {
-	enum _HALMAC_DLFW_MEM mem_halmac = HALMAC_DLFW_MEM_UNDEFINE;
+	enum halmac_dlfw_mem mem_halmac = HALMAC_DLFW_MEM_UNDEFINE;
 
 
 	switch (mem) {
@@ -3226,10 +3718,10 @@ static enum _HALMAC_DLFW_MEM _fw_mem_drv2halmac(enum fw_mem mem, u8 tx_stop)
 
 int rtw_halmac_dlfw_mem(struct dvobj_priv *d, u8 *fw, u32 fwsize, enum fw_mem mem)
 {
-	struct _HALMAC_ADAPTER *mac;
-	struct _HALMAC_API *api;
-	enum _HALMAC_RET_STATUS status;
-	enum _HALMAC_DLFW_MEM dlfw_mem;
+	struct halmac_adapter *mac;
+	struct halmac_api *api;
+	enum halmac_ret_status status;
+	enum halmac_dlfw_mem dlfw_mem;
 	u8 tx_stop = _FALSE;
 	u32 chk_timeout = 2000; /* unit: ms */
 	int err = 0;
@@ -3300,7 +3792,7 @@ int rtw_halmac_dlfw_mem_from_file(struct dvobj_priv *d, u8 *fwpath, enum fw_mem
 		err = -1;
 
 	rtw_mfree(fw, fwmaxsize);
-	fw = NULL;
+	/*fw = NULL;*/
 
 	return err;
 }
@@ -3313,8 +3805,8 @@ int rtw_halmac_dlfw_mem_from_file(struct dvobj_priv *d, u8 *fwpath, enum fw_mem
 int rtw_halmac_dlfw(struct dvobj_priv *d, u8 *fw, u32 fwsize)
 {
 	PADAPTER adapter;
-	HALMAC_RET_STATUS status;
-	u32 ok = _TRUE;
+	enum halmac_ret_status status;
+	u32 ok;
 	int err, err_ret = -1;
 
 
@@ -3377,7 +3869,7 @@ int rtw_halmac_dlfw_from_file(struct dvobj_priv *d, u8 *fwpath)
 		err = -1;
 
 	rtw_mfree(fw, fwmaxsize);
-	fw = NULL;
+	/*fw = NULL;*/
 
 	return err;
 }
@@ -3396,9 +3888,10 @@ int rtw_halmac_dlfw_from_file(struct dvobj_priv *d, u8 *fwpath)
 int rtw_halmac_phy_power_switch(struct dvobj_priv *d, u8 enable)
 {
 	PADAPTER adapter;
-	PHALMAC_ADAPTER halmac;
-	PHALMAC_API api;
-	HALMAC_RET_STATUS status;
+	struct halmac_adapter *halmac;
+	struct halmac_api *api;
+	enum halmac_ret_status status;
+	u8 on;
 
 
 	adapter = dvobj_get_primary_adapter(d);
@@ -3406,8 +3899,9 @@ int rtw_halmac_phy_power_switch(struct dvobj_priv *d, u8 enable)
 	if (!halmac)
 		return -1;
 	api = HALMAC_GET_API(halmac);
+	on = (enable == _TRUE) ? 1 : 0;
 
-	status = api->halmac_set_hw_value(halmac, HALMAC_HW_EN_BB_RF, &enable);
+	status = api->halmac_set_hw_value(halmac, HALMAC_HW_EN_BB_RF, &on);
 	if (status != HALMAC_RET_SUCCESS)
 		return -1;
 
@@ -3441,6 +3935,10 @@ static u8 _is_fw_read_cmd_down(PADAPTER adapter, u8 msgbox_num)
  *
  * Send H2C to firmware by message box register(0x1D0~0x1D3 & 0x1F0~0x1F3).
  *
+ * Assume firmware be ready to accept H2C here, please check
+ * (hal->bFWReady == _TRUE) before call this function or make sure firmware is
+ * ready.
+ *
  * Return: 0 if process OK, otherwise fail to send this H2C.
  */
 int rtw_halmac_send_h2c(struct dvobj_priv *d, u8 *h2c)
@@ -3454,10 +3952,6 @@ int rtw_halmac_send_h2c(struct dvobj_priv *d, u8 *h2c)
 	u32 h2c_cmd_ex = 0;
 	int err = -1;
 
-	if (hal->bFWReady == _FALSE) {
-		RTW_WARN("%s: return H2C cmd because fw is not ready\n", __FUNCTION__);
-		return err;
-	}
 
 	if (!h2c) {
 		RTW_WARN("%s: pbuf is NULL\n", __FUNCTION__);
@@ -3524,9 +4018,9 @@ exit:
  */
 int rtw_halmac_c2h_handle(struct dvobj_priv *d, u8 *c2h, u32 size)
 {
-	PHALMAC_ADAPTER mac;
-	PHALMAC_API api;
-	HALMAC_RET_STATUS status;
+	struct halmac_adapter *mac;
+	struct halmac_api *api;
+	enum halmac_ret_status status;
 
 
 	mac = dvobj_to_halmac(d);
@@ -3541,9 +4035,9 @@ int rtw_halmac_c2h_handle(struct dvobj_priv *d, u8 *c2h, u32 size)
 
 int rtw_halmac_get_available_efuse_size(struct dvobj_priv *d, u32 *size)
 {
-	PHALMAC_ADAPTER mac;
-	PHALMAC_API api;
-	HALMAC_RET_STATUS status;
+	struct halmac_adapter *mac;
+	struct halmac_api *api;
+	enum halmac_ret_status status;
 	u32 val;
 
 
@@ -3560,9 +4054,9 @@ int rtw_halmac_get_available_efuse_size(struct dvobj_priv *d, u32 *size)
 
 int rtw_halmac_get_physical_efuse_size(struct dvobj_priv *d, u32 *size)
 {
-	PHALMAC_ADAPTER mac;
-	PHALMAC_API api;
-	HALMAC_RET_STATUS status;
+	struct halmac_adapter *mac;
+	struct halmac_api *api;
+	enum halmac_ret_status status;
 	u32 val;
 
 
@@ -3579,10 +4073,10 @@ int rtw_halmac_get_physical_efuse_size(struct dvobj_priv *d, u32 *size)
 
 int rtw_halmac_read_physical_efuse_map(struct dvobj_priv *d, u8 *map, u32 size)
 {
-	PHALMAC_ADAPTER mac;
-	PHALMAC_API api;
-	HALMAC_RET_STATUS status;
-	HALMAC_FEATURE_ID id;
+	struct halmac_adapter *mac;
+	struct halmac_api *api;
+	enum halmac_ret_status status;
+	enum halmac_feature_id id;
 	int ret;
 
 
@@ -3609,9 +4103,9 @@ int rtw_halmac_read_physical_efuse_map(struct dvobj_priv *d, u8 *map, u32 size)
 
 int rtw_halmac_read_physical_efuse(struct dvobj_priv *d, u32 offset, u32 cnt, u8 *data)
 {
-	PHALMAC_ADAPTER mac;
-	PHALMAC_API api;
-	HALMAC_RET_STATUS status;
+	struct halmac_adapter *mac;
+	struct halmac_api *api;
+	enum halmac_ret_status status;
 	u8 v;
 	u32 i;
 	u8 *efuse = NULL;
@@ -3652,9 +4146,9 @@ int rtw_halmac_read_physical_efuse(struct dvobj_priv *d, u32 offset, u32 cnt, u8
 
 int rtw_halmac_write_physical_efuse(struct dvobj_priv *d, u32 offset, u32 cnt, u8 *data)
 {
-	PHALMAC_ADAPTER mac;
-	PHALMAC_API api;
-	HALMAC_RET_STATUS status;
+	struct halmac_adapter *mac;
+	struct halmac_api *api;
+	enum halmac_ret_status status;
 	u32 i;
 
 
@@ -3675,9 +4169,9 @@ int rtw_halmac_write_physical_efuse(struct dvobj_priv *d, u32 offset, u32 cnt, u
 
 int rtw_halmac_get_logical_efuse_size(struct dvobj_priv *d, u32 *size)
 {
-	PHALMAC_ADAPTER mac;
-	PHALMAC_API api;
-	HALMAC_RET_STATUS status;
+	struct halmac_adapter *mac;
+	struct halmac_api *api;
+	enum halmac_ret_status status;
 	u32 val;
 
 
@@ -3694,10 +4188,10 @@ int rtw_halmac_get_logical_efuse_size(struct dvobj_priv *d, u32 *size)
 
 int rtw_halmac_read_logical_efuse_map(struct dvobj_priv *d, u8 *map, u32 size, u8 *maskmap, u32 masksize)
 {
-	PHALMAC_ADAPTER mac;
-	PHALMAC_API api;
-	HALMAC_RET_STATUS status;
-	HALMAC_FEATURE_ID id;
+	struct halmac_adapter *mac;
+	struct halmac_api *api;
+	enum halmac_ret_status status;
+	enum halmac_feature_id id;
 	int ret;
 
 
@@ -3720,11 +4214,11 @@ int rtw_halmac_read_logical_efuse_map(struct dvobj_priv *d, u8 *map, u32 size, u
 		return -1;
 
 	if (maskmap && masksize) {
-		struct _HALMAC_PG_EFUSE_INFO pginfo;
+		struct halmac_pg_efuse_info pginfo;
 
-		pginfo.pEfuse_map = map;
+		pginfo.efuse_map = map;
 		pginfo.efuse_map_size = size;
-		pginfo.pEfuse_mask = maskmap;
+		pginfo.efuse_mask = maskmap;
 		pginfo.efuse_mask_size = masksize;
 
 		status = api->halmac_mask_logical_efuse(mac, &pginfo);
@@ -3737,18 +4231,18 @@ int rtw_halmac_read_logical_efuse_map(struct dvobj_priv *d, u8 *map, u32 size, u
 
 int rtw_halmac_write_logical_efuse_map(struct dvobj_priv *d, u8 *map, u32 size, u8 *maskmap, u32 masksize)
 {
-	PHALMAC_ADAPTER mac;
-	PHALMAC_API api;
-	HALMAC_PG_EFUSE_INFO pginfo;
-	HALMAC_RET_STATUS status;
+	struct halmac_adapter *mac;
+	struct halmac_api *api;
+	struct halmac_pg_efuse_info pginfo;
+	enum halmac_ret_status status;
 
 
 	mac = dvobj_to_halmac(d);
 	api = HALMAC_GET_API(mac);
 
-	pginfo.pEfuse_map = map;
+	pginfo.efuse_map = map;
 	pginfo.efuse_map_size = size;
-	pginfo.pEfuse_mask = maskmap;
+	pginfo.efuse_mask = maskmap;
 	pginfo.efuse_mask_size = masksize;
 
 	status = api->halmac_pg_efuse_by_map(mac, &pginfo, HALMAC_EFUSE_R_AUTO);
@@ -3760,9 +4254,9 @@ int rtw_halmac_write_logical_efuse_map(struct dvobj_priv *d, u8 *map, u32 size,
 
 int rtw_halmac_read_logical_efuse(struct dvobj_priv *d, u32 offset, u32 cnt, u8 *data)
 {
-	PHALMAC_ADAPTER mac;
-	PHALMAC_API api;
-	HALMAC_RET_STATUS status;
+	struct halmac_adapter *mac;
+	struct halmac_api *api;
+	enum halmac_ret_status status;
 	u8 v;
 	u32 i;
 
@@ -3782,9 +4276,9 @@ int rtw_halmac_read_logical_efuse(struct dvobj_priv *d, u32 offset, u32 cnt, u8
 
 int rtw_halmac_write_logical_efuse(struct dvobj_priv *d, u32 offset, u32 cnt, u8 *data)
 {
-	PHALMAC_ADAPTER mac;
-	PHALMAC_API api;
-	HALMAC_RET_STATUS status;
+	struct halmac_adapter *mac;
+	struct halmac_api *api;
+	enum halmac_ret_status status;
 	u32 i;
 
 
@@ -3802,12 +4296,13 @@ int rtw_halmac_write_logical_efuse(struct dvobj_priv *d, u32 offset, u32 cnt, u8
 
 int rtw_halmac_write_bt_physical_efuse(struct dvobj_priv *d, u32 offset, u32 cnt, u8 *data)
 {
-	PHALMAC_ADAPTER mac;
-	PHALMAC_API api;
-	HALMAC_RET_STATUS status;
+	struct halmac_adapter *mac;
+	struct halmac_api *api;
+	enum halmac_ret_status status;
 	u32 i;
 	u8 bank = 1;
 
+
 	mac = dvobj_to_halmac(d);
 	api = HALMAC_GET_API(mac);
 
@@ -3825,13 +4320,12 @@ int rtw_halmac_write_bt_physical_efuse(struct dvobj_priv *d, u32 offset, u32 cnt
 
 int rtw_halmac_read_bt_physical_efuse_map(struct dvobj_priv *d, u8 *map, u32 size)
 {
-	PHALMAC_ADAPTER mac;
-	PHALMAC_API api;
-	HALMAC_RET_STATUS status;
-	HALMAC_FEATURE_ID id;
-	int ret;
+	struct halmac_adapter *mac;
+	struct halmac_api *api;
+	enum halmac_ret_status status;
 	int bank = 1;
 
+
 	mac = dvobj_to_halmac(d);
 	api = HALMAC_GET_API(mac);
 
@@ -3846,7 +4340,7 @@ int rtw_halmac_read_bt_physical_efuse_map(struct dvobj_priv *d, u8 *map, u32 siz
 	return 0;
 }
 
-static enum _HAL_FIFO_SEL _fifo_sel_drv2halmac(u8 fifo_sel)
+static enum hal_fifo_sel _fifo_sel_drv2halmac(u8 fifo_sel)
 {
 	switch (fifo_sel) {
 	case 0:
@@ -3869,15 +4363,15 @@ static enum _HAL_FIFO_SEL _fifo_sel_drv2halmac(u8 fifo_sel)
 /*#define CONFIG_HALMAC_FIFO_DUMP*/
 int rtw_halmac_dump_fifo(struct dvobj_priv *d, u8 fifo_sel, u32 addr, u32 size, u8 *buffer)
 {
-	PHALMAC_ADAPTER mac;
-	PHALMAC_API api;
-	HALMAC_RET_STATUS status;
+	struct halmac_adapter *mac;
+	struct halmac_api *api;
+	enum hal_fifo_sel halmac_fifo_sel;
+	enum halmac_ret_status status;
 	u8 *pfifo_map = NULL;
 	u32 fifo_size = 0;
 	s8 ret = 0;/* 0:success, -1:error */
 	u8 mem_created = _FALSE;
 
-	HAL_FIFO_SEL halmac_fifo_sel;
 
 	mac = dvobj_to_halmac(d);
 	api = HALMAC_GET_API(mac);
@@ -3925,15 +4419,36 @@ _exit:
 	return ret;
 }
 
+/*
+ * rtw_halmac_rx_agg_switch() - Switch RX aggregation function and setting
+ * @d		struct dvobj_priv *
+ * @enable	_FALSE/_TRUE for disable/enable RX aggregation function
+ *
+ * This function could help to on/off bus RX aggregation function, and is only
+ * useful for SDIO and USB interface. Although only "enable" flag is brough in,
+ * some setting would be taken from other places, and they are from:
+ * [DMA aggregation]
+ *	struct hal_com_data.rxagg_dma_size
+ *	struct hal_com_data.rxagg_dma_timeout
+ * [USB aggregation] (only use for USB interface)
+ *	struct hal_com_data.rxagg_usb_size
+ *	struct hal_com_data.rxagg_usb_timeout
+ * If above values of size and timeout are both 0 means driver would not
+ * control the threshold setting and leave it to HALMAC handle.
+ *
+ * From HALMAC V1_04_04, driver force the size threshold be hard limit, and the
+ * rx size can not exceed the setting.
+ *
+ * Return 0 for success, otherwise fail.
+ */
 int rtw_halmac_rx_agg_switch(struct dvobj_priv *d, u8 enable)
 {
-	PADAPTER adapter;
-	PHAL_DATA_TYPE hal;
-	PHALMAC_ADAPTER halmac;
-	PHALMAC_API api;
-	HALMAC_RXAGG_CFG rxaggcfg;
-	HALMAC_RET_STATUS status;
-	int err = -1;
+	struct _ADAPTER *adapter;
+	struct hal_com_data *hal;
+	struct halmac_adapter *halmac;
+	struct halmac_api *api;
+	struct halmac_rxagg_cfg rxaggcfg;
+	enum halmac_ret_status status;
 
 
 	adapter = dvobj_get_primary_adapter(d);
@@ -3941,12 +4456,29 @@ int rtw_halmac_rx_agg_switch(struct dvobj_priv *d, u8 enable)
 	halmac = dvobj_to_halmac(d);
 	api = HALMAC_GET_API(halmac);
 	_rtw_memset((void *)&rxaggcfg, 0, sizeof(rxaggcfg));
+	rxaggcfg.mode = HALMAC_RX_AGG_MODE_NONE;
+	/*
+	 * Always enable size limit to avoid rx size exceed
+	 * driver defined size.
+	 */
+	rxaggcfg.threshold.size_limit_en = 1;
 
+#ifdef RTW_RX_AGGREGATION
 	if (_TRUE == enable) {
 #ifdef CONFIG_SDIO_HCI
 		rxaggcfg.mode = HALMAC_RX_AGG_MODE_DMA;
 		rxaggcfg.threshold.drv_define = 0;
-#elif defined(CONFIG_USB_HCI) && defined(CONFIG_USB_RX_AGGREGATION)
+		if (hal->rxagg_dma_size || hal->rxagg_dma_timeout) {
+			rxaggcfg.threshold.drv_define = 1;
+			rxaggcfg.threshold.timeout = hal->rxagg_dma_timeout;
+			rxaggcfg.threshold.size = hal->rxagg_dma_size;
+			RTW_INFO("%s: RX aggregation threshold: "
+				 "timeout=%u size=%u\n",
+				 __FUNCTION__,
+				 hal->rxagg_dma_timeout,
+				 hal->rxagg_dma_size);
+		}
+#elif defined(CONFIG_USB_HCI)
 		switch (hal->rxagg_mode) {
 		case RX_AGG_DISABLE:
 			rxaggcfg.mode = HALMAC_RX_AGG_MODE_NONE;
@@ -3972,23 +4504,21 @@ int rtw_halmac_rx_agg_switch(struct dvobj_priv *d, u8 enable)
 			break;
 		}
 #endif /* CONFIG_USB_HCI */
-	} else
-		rxaggcfg.mode = HALMAC_RX_AGG_MODE_NONE;
+	}
+#endif /* RTW_RX_AGGREGATION */
 
 	status = api->halmac_cfg_rx_aggregation(halmac, &rxaggcfg);
 	if (status != HALMAC_RET_SUCCESS)
-		goto out;
+		return -1;
 
-	err = 0;
-out:
-	return err;
+	return 0;
 }
 
 int rtw_halmac_download_rsvd_page(struct dvobj_priv *dvobj, u8 pg_offset, u8 *pbuf, u32 size)
 {
-	HALMAC_RET_STATUS status = HALMAC_RET_SUCCESS;
-	PHALMAC_ADAPTER halmac = dvobj_to_halmac(dvobj);
-	PHALMAC_API api = HALMAC_GET_API(halmac);
+	enum halmac_ret_status status = HALMAC_RET_SUCCESS;
+	struct halmac_adapter *halmac = dvobj_to_halmac(dvobj);
+	struct halmac_api *api = HALMAC_GET_API(halmac);
 
 	status = api->halmac_dl_drv_rsvd_page(halmac, pg_offset, pbuf, size);
 	if (status != HALMAC_RET_SUCCESS)
@@ -4008,9 +4538,9 @@ int rtw_halmac_download_rsvd_page(struct dvobj_priv *dvobj, u8 pg_offset, u8 *pb
  */
 int rtw_halmac_fill_hal_spec(struct dvobj_priv *dvobj, struct hal_spec_t *spec)
 {
-	HALMAC_RET_STATUS status;
-	PHALMAC_ADAPTER halmac;
-	PHALMAC_API api;
+	enum halmac_ret_status status;
+	struct halmac_adapter *halmac;
+	struct halmac_api *api;
 	u8 cam = 0;	/* Security Cam Entry Number */
 
 
@@ -4028,12 +4558,12 @@ int rtw_halmac_fill_hal_spec(struct dvobj_priv *dvobj, struct hal_spec_t *spec)
 	return 0;
 }
 
-int rtw_halmac_p2pps(struct dvobj_priv *dvobj, PHAL_P2P_PS_PARA pp2p_ps_para)
+int rtw_halmac_p2pps(struct dvobj_priv *dvobj, struct hal_p2p_ps_para *pp2p_ps_para)
 {
-	HALMAC_RET_STATUS status = HALMAC_RET_SUCCESS;
-	PHALMAC_ADAPTER halmac = dvobj_to_halmac(dvobj);
-	PHALMAC_API api = HALMAC_GET_API(halmac);
-	HALMAC_P2PPS halmac_p2p_ps;
+	enum halmac_ret_status status = HALMAC_RET_SUCCESS;
+	struct halmac_adapter *halmac = dvobj_to_halmac(dvobj);
+	struct halmac_api *api = HALMAC_GET_API(halmac);
+	struct halmac_p2pps halmac_p2p_ps;
 
 	(&halmac_p2p_ps)->offload_en = pp2p_ps_para->offload_en;
 	(&halmac_p2p_ps)->role = pp2p_ps_para->role;
@@ -4042,6 +4572,7 @@ int rtw_halmac_p2pps(struct dvobj_priv *dvobj, PHAL_P2P_PS_PARA pp2p_ps_para)
 	(&halmac_p2p_ps)->noa_sel = pp2p_ps_para->noa_sel;
 	(&halmac_p2p_ps)->all_sta_sleep = pp2p_ps_para->all_sta_sleep;
 	(&halmac_p2p_ps)->discovery = pp2p_ps_para->discovery;
+	(&halmac_p2p_ps)->disable_close_rf = pp2p_ps_para->disable_close_rf;
 	(&halmac_p2p_ps)->p2p_port_id = _hw_port_drv2halmac(pp2p_ps_para->p2p_port_id);
 	(&halmac_p2p_ps)->p2p_group = pp2p_ps_para->p2p_group;
 	(&halmac_p2p_ps)->p2p_macid = pp2p_ps_para->p2p_macid;
@@ -4071,11 +4602,11 @@ int rtw_halmac_p2pps(struct dvobj_priv *dvobj, PHAL_P2P_PS_PARA pp2p_ps_para)
  */
 int rtw_halmac_iqk(struct dvobj_priv *d, u8 clear, u8 segment)
 {
-	PHALMAC_ADAPTER mac;
-	PHALMAC_API api;
-	HALMAC_RET_STATUS status;
-	HALMAC_FEATURE_ID id;
-	HALMAC_IQK_PARA para;
+	struct halmac_adapter *mac;
+	struct halmac_api *api;
+	enum halmac_ret_status status;
+	enum halmac_feature_id id;
+	struct halmac_iqk_para para;
 	int ret;
 	u8 retry = 3;
 	u8 delay = 1; /* ms */
@@ -4114,7 +4645,15 @@ int rtw_halmac_iqk(struct dvobj_priv *d, u8 clear, u8 segment)
 	return 0;
 }
 
-static int _phy_parameter_drv2halmac(struct rtw_phy_parameter *para, struct _HALMAC_PHY_PARAMETER_INFO *info)
+static inline u32 _phy_parameter_val_drv2halmac(u32 val, u8 msk_en, u32 msk)
+{
+	if (!msk_en)
+		return val;
+
+	return (val << bitshift(msk));
+}
+
+static int _phy_parameter_drv2halmac(struct rtw_phy_parameter *para, struct halmac_phy_parameter_info *info)
 {
 	if (!para || !info)
 		return -1;
@@ -4135,7 +4674,10 @@ static int _phy_parameter_drv2halmac(struct rtw_phy_parameter *para, struct _HAL
 			info->cmd_id = HALMAC_PARAMETER_CMD_MAC_W32;
 			break;
 		}
-		info->content.MAC_REG_W.value = para->data.mac.value;
+		info->content.MAC_REG_W.value = _phy_parameter_val_drv2halmac(
+							para->data.mac.value,
+							para->data.mac.msk_en,
+							para->data.mac.msk);
 		info->content.MAC_REG_W.msk = para->data.mac.msk;
 		info->content.MAC_REG_W.offset = para->data.mac.offset;
 		info->content.MAC_REG_W.msk_en = para->data.mac.msk_en;
@@ -4154,16 +4696,22 @@ static int _phy_parameter_drv2halmac(struct rtw_phy_parameter *para, struct _HAL
 			info->cmd_id = HALMAC_PARAMETER_CMD_BB_W32;
 			break;
 		}
-		info->content.BB_REG_W.value = para->data.mac.value;
-		info->content.BB_REG_W.msk = para->data.mac.msk;
-		info->content.BB_REG_W.offset = para->data.mac.offset;
-		info->content.BB_REG_W.msk_en = para->data.mac.msk_en;
+		info->content.BB_REG_W.value = _phy_parameter_val_drv2halmac(
+							para->data.bb.value,
+							para->data.bb.msk_en,
+							para->data.bb.msk);
+		info->content.BB_REG_W.msk = para->data.bb.msk;
+		info->content.BB_REG_W.offset = para->data.bb.offset;
+		info->content.BB_REG_W.msk_en = para->data.bb.msk_en;
 		break;
 
 	case 2:
 		/* RF register */
 		info->cmd_id = HALMAC_PARAMETER_CMD_RF_W;
-		info->content.RF_REG_W.value = para->data.rf.value;
+		info->content.RF_REG_W.value = _phy_parameter_val_drv2halmac(
+							para->data.rf.value,
+							para->data.rf.msk_en,
+							para->data.rf.msk);
 		info->content.RF_REG_W.msk = para->data.rf.msk;
 		info->content.RF_REG_W.offset = para->data.rf.offset;
 		info->content.RF_REG_W.msk_en = para->data.rf.msk_en;
@@ -4204,11 +4752,11 @@ static int _phy_parameter_drv2halmac(struct rtw_phy_parameter *para, struct _HAL
  */
 int rtw_halmac_cfg_phy_para(struct dvobj_priv *d, struct rtw_phy_parameter *para)
 {
-	struct _HALMAC_ADAPTER *mac;
-	struct _HALMAC_API *api;
-	enum _HALMAC_RET_STATUS status;
-	enum _HALMAC_FEATURE_ID id;
-	struct _HALMAC_PHY_PARAMETER_INFO info;
+	struct halmac_adapter *mac;
+	struct halmac_api *api;
+	enum halmac_ret_status status;
+	enum halmac_feature_id id;
+	struct halmac_phy_parameter_info info;
 	u8 full_fifo;
 	int err, ret;
 
@@ -4255,6 +4803,362 @@ int rtw_halmac_cfg_phy_para(struct dvobj_priv *d, struct rtw_phy_parameter *para
 	return ret;
 }
 
+static enum halmac_wlled_mode _led_mode_drv2halmac(u8 drv_mode)
+{
+	enum halmac_wlled_mode halmac_mode;
+
+
+	switch (drv_mode) {
+	case 1:
+		halmac_mode = HALMAC_WLLED_MODE_TX;
+		break;
+	case 2:
+		halmac_mode = HALMAC_WLLED_MODE_RX;
+		break;
+	case 3:
+		halmac_mode = HALMAC_WLLED_MODE_SW_CTRL;
+		break;
+	case 0:
+	default:
+		halmac_mode = HALMAC_WLLED_MODE_TRX;
+		break;
+	}
+
+	return halmac_mode;
+}
+
+/**
+ * rtw_halmac_led_cfg() - Configure Hardware LED Mode
+ * @d:		struct dvobj_priv*
+ * @enable:	enable or disable LED function
+ *		0: disable
+ *		1: enable
+ * @mode:	WLan LED mode (valid when enable==1)
+ *		0: Blink when TX(transmit packet) and RX(receive packet)
+ *		1: Blink when TX only
+ *		2: Blink when RX only
+ *		3: Software control
+ *
+ * Configure hardware WLan LED mode.
+ * If want to change LED mode after enabled, need to disable LED first and
+ * enable again to set new mode.
+ *
+ * Rteurn 0 for OK, otherwise fail.
+ */
+int rtw_halmac_led_cfg(struct dvobj_priv *d, u8 enable, u8 mode)
+{
+	struct halmac_adapter *halmac;
+	struct halmac_api *api;
+	enum halmac_wlled_mode led_mode;
+	enum halmac_ret_status status;
+
+
+	halmac = dvobj_to_halmac(d);
+	api = HALMAC_GET_API(halmac);
+
+	if (enable) {
+		status = api->halmac_pinmux_set_func(halmac,
+						     HALMAC_GPIO_FUNC_WL_LED);
+		if (status != HALMAC_RET_SUCCESS) {
+			RTW_ERR("%s: pinmux set fail!(0x%x)\n",
+				__FUNCTION__, status);
+			return -1;
+		}
+
+		led_mode = _led_mode_drv2halmac(mode);
+		status = api->halmac_pinmux_wl_led_mode(halmac, led_mode);
+		if (status != HALMAC_RET_SUCCESS) {
+			RTW_ERR("%s: mode set fail!(0x%x)\n",
+				__FUNCTION__, status);
+			return -1;
+		}
+	} else {
+		/* Change LED to software control and turn off */
+		api->halmac_pinmux_wl_led_mode(halmac,
+					       HALMAC_WLLED_MODE_SW_CTRL);
+		api->halmac_pinmux_wl_led_sw_ctrl(halmac, 0);
+
+		status = api->halmac_pinmux_free_func(halmac,
+						      HALMAC_GPIO_FUNC_WL_LED);
+		if (status != HALMAC_RET_SUCCESS) {
+			RTW_ERR("%s: pinmux free fail!(0x%x)\n",
+				__FUNCTION__, status);
+			return -1;
+		}
+	}
+
+	return 0;
+}
+
+/**
+ * rtw_halmac_led_switch() - Turn Hardware LED on/off
+ * @d:		struct dvobj_priv*
+ * @on:		LED light or not
+ *		0: Off
+ *		1: On(Light)
+ *
+ * Turn Hardware WLan LED On/Off.
+ * Before use this function, user should call rtw_halmac_led_ctrl() to switch
+ * mode to "software control(3)" first, otherwise control would fail.
+ * The interval between on and off must be longer than 1 ms, or the LED would
+ * keep light or dark only.
+ * Ex. Turn off LED at first, turn on after 0.5ms and turn off again after
+ * 0.5ms. The LED during this flow will only keep dark, and miss the turn on
+ * operation between two turn off operations.
+ */
+void rtw_halmac_led_switch(struct dvobj_priv *d, u8 on)
+{
+	struct halmac_adapter *halmac;
+	struct halmac_api *api;
+
+
+	halmac = dvobj_to_halmac(d);
+	api = HALMAC_GET_API(halmac);
+
+	api->halmac_pinmux_wl_led_sw_ctrl(halmac, on);
+}
+
+/**
+ * rtw_halmac_bt_wake_cfg() - Configure BT wake host function
+ * @d:		struct dvobj_priv*
+ * @enable:	enable or disable BT wake host function
+ *		0: disable
+ *		1: enable
+ *
+ * Configure pinmux to allow BT to control BT wake host pin.
+ *
+ * Rteurn 0 for OK, otherwise fail.
+ */
+int rtw_halmac_bt_wake_cfg(struct dvobj_priv *d, u8 enable)
+{
+	struct halmac_adapter *halmac;
+	struct halmac_api *api;
+	enum halmac_ret_status status;
+
+
+	halmac = dvobj_to_halmac(d);
+	api = HALMAC_GET_API(halmac);
+
+	if (enable) {
+		status = api->halmac_pinmux_set_func(halmac,
+						HALMAC_GPIO_FUNC_BT_HOST_WAKE1);
+		if (status != HALMAC_RET_SUCCESS) {
+			RTW_ERR("%s: pinmux set BT_HOST_WAKE1 fail!(0x%x)\n",
+				__FUNCTION__, status);
+			return -1;
+		}
+	} else {
+		status = api->halmac_pinmux_free_func(halmac,
+						HALMAC_GPIO_FUNC_BT_HOST_WAKE1);
+		if (status != HALMAC_RET_SUCCESS) {
+			RTW_ERR("%s: pinmux free BT_HOST_WAKE1 fail!(0x%x)\n",
+				__FUNCTION__, status);
+			return -1;
+		}
+	}
+
+	return 0;
+}
+
+#ifdef CONFIG_PNO_SUPPORT
+/**
+ * _halmac_scanoffload() - Switch channel by firmware during scanning
+ * @d:		struct dvobj_priv*
+ * @enable:	1: enable, 0: disable
+ * @nlo:	1: nlo mode (no c2h event), 0: normal mode
+ * @ssid:	ssid of probe request
+ * @ssid_len:	ssid length
+ *
+ * Switch Channel and Send Porbe Request Offloaded by FW
+ *
+ * Rteurn 0 for OK, otherwise fail.
+ */
+static int _halmac_scanoffload(struct dvobj_priv *d, u32 enable, u8 nlo,
+			       u8 *ssid, u8 ssid_len)
+{
+	struct _ADAPTER *adapter;
+	struct halmac_adapter *mac;
+	struct halmac_api *api;
+	enum halmac_ret_status status;
+	struct halmac_ch_info ch_info;
+	struct halmac_ch_switch_option cs_option;
+	struct mlme_ext_priv *pmlmeext;
+	enum halmac_feature_id id_update, id_ch_sw;
+	struct halmac_indicator *indicator, *tbl;
+
+	int err = 0;
+	u8 probereq[64];
+	u32 len = 0;
+	int i = 0;
+	struct pno_ssid pnossid;
+	struct rf_ctl_t *rfctl = NULL;
+	struct _RT_CHANNEL_INFO *ch_set;
+
+
+	tbl = d->hmpriv.indicator;
+	adapter = dvobj_get_primary_adapter(d);
+	mac = dvobj_to_halmac(d);
+	if (!mac)
+		return -1;
+	api = HALMAC_GET_API(mac);
+	id_update = HALMAC_FEATURE_UPDATE_PACKET;
+	id_ch_sw = HALMAC_FEATURE_CHANNEL_SWITCH;
+	pmlmeext = &(adapter->mlmeextpriv);
+	rfctl = adapter_to_rfctl(adapter);
+	ch_set = rfctl->channel_set;
+
+	RTW_INFO("%s: %s scanoffload, mode: %s\n",
+		 __FUNCTION__, enable?"Enable":"Disable",
+		 nlo?"PNO/NLO":"Normal");
+
+	if (enable) {
+		_rtw_memset(probereq, 0, sizeof(probereq));
+
+		_rtw_memset(&pnossid, 0, sizeof(pnossid));
+		if (ssid) {
+			if (ssid_len > sizeof(pnossid.SSID)) {
+				RTW_ERR("%s: SSID length(%d) is too long(>%d)!!\n",
+					__FUNCTION__, ssid_len, sizeof(pnossid.SSID));
+				return -1;
+			}
+
+			pnossid.SSID_len = ssid_len;
+			_rtw_memcpy(pnossid.SSID, ssid, ssid_len);
+		}
+
+		rtw_hal_construct_ProbeReq(adapter, probereq, &len, &pnossid);
+
+		if (!nlo) {
+			err = init_halmac_event(d, id_update, NULL, 0);
+			if (err)
+				return -1;
+		}
+
+		status = api->halmac_update_packet(mac, HALMAC_PACKET_PROBE_REQ,
+						   probereq, len);
+		if (status != HALMAC_RET_SUCCESS) {
+			if (!nlo)
+				free_halmac_event(d, id_update);
+			RTW_ERR("%s: halmac_update_packet FAIL(%d)!!\n",
+				__FUNCTION__, status);
+			return -1;
+		}
+
+		if (!nlo) {
+			err = wait_halmac_event(d, id_update);
+			if (err)
+				RTW_ERR("%s: wait update packet FAIL(%d)!!\n",
+					__FUNCTION__, err);
+		}
+
+		api->halmac_clear_ch_info(mac);
+
+		for (i = 0; i < rfctl->max_chan_nums && ch_set[i].ChannelNum != 0; i++) {
+			_rtw_memset(&ch_info, 0, sizeof(ch_info));
+			ch_info.extra_info = 0;
+			ch_info.channel = ch_set[i].ChannelNum;
+			ch_info.bw = HALMAC_BW_20;
+			ch_info.pri_ch_idx = HALMAC_CH_IDX_1;
+			ch_info.action_id = HALMAC_CS_ACTIVE_SCAN;
+			ch_info.timeout = 1;
+			status = api->halmac_add_ch_info(mac, &ch_info);
+			if (status != HALMAC_RET_SUCCESS) {
+				RTW_ERR("%s: add_ch_info FAIL(%d)!!\n",
+					__FUNCTION__, status);
+				return -1;
+			}
+		}
+
+		/* set channel switch option */
+		_rtw_memset(&cs_option, 0, sizeof(cs_option));
+		cs_option.dest_bw = HALMAC_BW_20;
+		cs_option.periodic_option = HALMAC_CS_PERIODIC_2_PHASE;
+		cs_option.dest_pri_ch_idx = HALMAC_CH_IDX_UNDEFINE;
+		cs_option.tsf_low = 0;
+		cs_option.switch_en = 1;
+		cs_option.dest_ch_en = 1;
+		cs_option.absolute_time_en = 0;
+		cs_option.dest_ch = 1;
+
+		cs_option.normal_period = 5;
+		cs_option.normal_period_sel = 0;
+		cs_option.normal_cycle = 10;
+
+		cs_option.phase_2_period = 1;
+		cs_option.phase_2_period_sel = 1;
+
+		/* nlo is for wow fw,  1: no c2h response */
+		cs_option.nlo_en = nlo;
+
+		if (!nlo) {
+			err = init_halmac_event(d, id_ch_sw, NULL, 0);
+			if (err)
+				return -1;
+		}
+
+		status = api->halmac_ctrl_ch_switch(mac, &cs_option);
+		if (status != HALMAC_RET_SUCCESS) {
+			if (!nlo)
+				free_halmac_event(d, id_ch_sw);
+			RTW_ERR("%s: halmac_ctrl_ch_switch FAIL(%d)!!\n",
+				__FUNCTION__, status);
+			return -1;
+		}
+
+		if (!nlo) {
+			err = wait_halmac_event(d, id_ch_sw);
+			if (err)
+				RTW_ERR("%s: wait ctrl_ch_switch FAIL(%d)!!\n",
+					__FUNCTION__, err);
+		}
+	} else {
+		api->halmac_clear_ch_info(mac);
+
+		_rtw_memset(&cs_option, 0, sizeof(cs_option));
+		cs_option.switch_en = 0;
+
+		if (!nlo) {
+			err = init_halmac_event(d, id_ch_sw, NULL, 0);
+			if (err)
+				return -1;
+		}
+
+		status = api->halmac_ctrl_ch_switch(mac, &cs_option);
+		if (status != HALMAC_RET_SUCCESS) {
+			if (!nlo)
+				free_halmac_event(d, id_ch_sw);
+			RTW_ERR("%s: halmac_ctrl_ch_switch FAIL(%d)!!\n",
+				__FUNCTION__, status);
+			return -1;
+		}
+
+		if (!nlo) {
+			err = wait_halmac_event(d, id_ch_sw);
+			if (err)
+				RTW_ERR("%s: wait ctrl_ch_switch FAIL(%d)!!\n",
+					__FUNCTION__, err);
+		}
+	}
+
+	return 0;
+}
+
+/**
+ * rtw_halmac_pno_scanoffload() - Control firmware scan AP function for PNO
+ * @d:		struct dvobj_priv*
+ * @enable:	1: enable, 0: disable
+ *
+ * Switch firmware scan AP function for PNO(prefer network offload) or
+ * NLO(network list offload).
+ *
+ * Rteurn 0 for OK, otherwise fail.
+ */
+int rtw_halmac_pno_scanoffload(struct dvobj_priv *d, u32 enable)
+{
+	return _halmac_scanoffload(d, enable, 1, NULL, 0);
+}
+#endif /* CONFIG_PNO_SUPPORT */
+
 #ifdef CONFIG_SDIO_HCI
 
 /*
@@ -4272,12 +5176,12 @@ int rtw_halmac_query_tx_page_num(struct dvobj_priv *d)
 {
 	PADAPTER adapter;
 	struct halmacpriv *hmpriv;
-	PHALMAC_ADAPTER halmac;
-	PHALMAC_API api;
-	HALMAC_RQPN_MAP rqpn;
-	HALMAC_DMA_MAPPING dmaqueue;
-	HALMAC_TXFF_ALLOCATION fifosize;
-	HALMAC_RET_STATUS status;
+	struct halmac_adapter *halmac;
+	struct halmac_api *api;
+	struct halmac_rqpn_map rqpn;
+	enum halmac_dma_mapping dmaqueue;
+	struct halmac_txff_allocation fifosize;
+	enum halmac_ret_status status;
 	u8 i;
 
 
@@ -4376,9 +5280,9 @@ int rtw_halmac_get_tx_queue_page_num(struct dvobj_priv *d, u8 queue, u32 *page)
  */
 u32 rtw_halmac_sdio_get_tx_addr(struct dvobj_priv *d, u8 *desc, u32 size)
 {
-	PHALMAC_ADAPTER mac;
-	PHALMAC_API api;
-	HALMAC_RET_STATUS status;
+	struct halmac_adapter *mac;
+	struct halmac_api *api;
+	enum halmac_ret_status status;
 	u32 addr;
 
 
@@ -4394,9 +5298,9 @@ u32 rtw_halmac_sdio_get_tx_addr(struct dvobj_priv *d, u8 *desc, u32 size)
 
 int rtw_halmac_sdio_tx_allowed(struct dvobj_priv *d, u8 *buf, u32 size)
 {
-	PHALMAC_ADAPTER mac;
-	PHALMAC_API api;
-	HALMAC_RET_STATUS status;
+	struct halmac_adapter *mac;
+	struct halmac_api *api;
+	enum halmac_ret_status status;
 
 
 	mac = dvobj_to_halmac(d);
@@ -4425,9 +5329,9 @@ u32 rtw_halmac_sdio_get_rx_addr(struct dvobj_priv *d, u8 *seq)
 #ifdef CONFIG_USB_HCI
 u8 rtw_halmac_usb_get_bulkout_id(struct dvobj_priv *d, u8 *buf, u32 size)
 {
-	PHALMAC_ADAPTER mac;
-	PHALMAC_API api;
-	HALMAC_RET_STATUS status;
+	struct halmac_adapter *mac;
+	struct halmac_api *api;
+	enum halmac_ret_status status;
 	u8 bulkout_id;
 
 
@@ -4452,9 +5356,9 @@ u8 rtw_halmac_usb_get_bulkout_id(struct dvobj_priv *d, u8 *buf, u32 size)
  */
 int rtw_halmac_usb_get_txagg_desc_num(struct dvobj_priv *d, u8 *num)
 {
-	struct _HALMAC_ADAPTER *halmac;
-	struct _HALMAC_API *api;
-	enum _HALMAC_RET_STATUS status;
+	struct halmac_adapter *halmac;
+	struct halmac_api *api;
+	enum halmac_ret_status status;
 	u8 val = 0;
 
 
@@ -4470,9 +5374,9 @@ int rtw_halmac_usb_get_txagg_desc_num(struct dvobj_priv *d, u8 *num)
 	return 0;
 }
 
-static inline HALMAC_USB_MODE _usb_mode_drv2halmac(enum RTW_USB_SPEED usb_mode)
+static inline enum halmac_usb_mode _usb_mode_drv2halmac(enum RTW_USB_SPEED usb_mode)
 {
-	HALMAC_USB_MODE halmac_usb_mode = HALMAC_USB_MODE_U2;
+	enum halmac_usb_mode halmac_usb_mode = HALMAC_USB_MODE_U2;
 
 	switch (usb_mode) {
 	case RTW_USB_SPEED_2:
@@ -4491,11 +5395,11 @@ static inline HALMAC_USB_MODE _usb_mode_drv2halmac(enum RTW_USB_SPEED usb_mode)
 
 u8 rtw_halmac_switch_usb_mode(struct dvobj_priv *d, enum RTW_USB_SPEED usb_mode)
 {
-	PHALMAC_ADAPTER mac;
-	PHALMAC_API api;
-	HALMAC_RET_STATUS status;
 	PADAPTER adapter;
-	HALMAC_USB_MODE halmac_usb_mode;
+	struct halmac_adapter *mac;
+	struct halmac_api *api;
+	enum halmac_ret_status status;
+	enum halmac_usb_mode halmac_usb_mode;
 
 	adapter = dvobj_get_primary_adapter(d);
 	mac = dvobj_to_halmac(d);
@@ -4509,3 +5413,143 @@ u8 rtw_halmac_switch_usb_mode(struct dvobj_priv *d, enum RTW_USB_SPEED usb_mode)
 	return _SUCCESS;
 }
 #endif /* CONFIG_USB_HCI */
+
+#ifdef CONFIG_BEAMFORMING
+#ifdef RTW_BEAMFORMING_VERSION_2
+int rtw_halmac_bf_add_mu_bfer(struct dvobj_priv *d, u16 paid, u16 csi_para,
+		u16 my_aid, enum halmac_csi_seg_len sel, u8 *addr)
+{
+	struct halmac_adapter *mac;
+	struct halmac_api *api;
+	enum halmac_ret_status status;
+	struct halmac_mu_bfer_init_para param;
+
+
+	mac = dvobj_to_halmac(d);
+	api = HALMAC_GET_API(mac);
+
+	_rtw_memset(&param, 0, sizeof(param));
+	param.paid = paid;
+	param.csi_para = csi_para;
+	param.my_aid = my_aid;
+	param.csi_length_sel = sel;
+	_rtw_memcpy(param.bfer_address.addr, addr, 6);
+
+	status = api->halmac_mu_bfer_entry_init(mac, &param);
+	if (status != HALMAC_RET_SUCCESS)
+		return -1;
+
+	return 0;
+}
+
+int rtw_halmac_bf_del_mu_bfer(struct dvobj_priv *d)
+{
+	struct halmac_adapter *mac;
+	struct halmac_api *api;
+	enum halmac_ret_status status;
+
+
+	mac = dvobj_to_halmac(d);
+	api = HALMAC_GET_API(mac);
+
+	status = api->halmac_mu_bfer_entry_del(mac);
+	if (status != HALMAC_RET_SUCCESS)
+		return -1;
+
+	return 0;
+}
+
+
+int rtw_halmac_bf_cfg_sounding(struct dvobj_priv *d,
+		enum halmac_snd_role role, enum halmac_data_rate rate)
+{
+	struct halmac_adapter *mac;
+	struct halmac_api *api;
+	enum halmac_ret_status status;
+
+
+	mac = dvobj_to_halmac(d);
+	api = HALMAC_GET_API(mac);
+
+	status = api->halmac_cfg_sounding(mac, role, rate);
+	if (status != HALMAC_RET_SUCCESS)
+		return -1;
+
+	return 0;
+}
+
+int rtw_halmac_bf_del_sounding(struct dvobj_priv *d,
+		enum halmac_snd_role role)
+{
+	struct halmac_adapter *mac;
+	struct halmac_api *api;
+	enum halmac_ret_status status;
+
+
+	mac = dvobj_to_halmac(d);
+	api = HALMAC_GET_API(mac);
+
+	status = api->halmac_del_sounding(mac, role);
+	if (status != HALMAC_RET_SUCCESS)
+		return -1;
+
+	return 0;
+}
+
+int rtw_halmac_bf_cfg_csi_rate(struct dvobj_priv *d,
+		u8 rssi, u8 current_rate, u8 fixrate_en,
+		u8 *new_rate)
+{
+	struct halmac_adapter *mac;
+	struct halmac_api *api;
+	enum halmac_ret_status status;
+
+
+	mac = dvobj_to_halmac(d);
+	api = HALMAC_GET_API(mac);
+
+	status = api->halmac_cfg_csi_rate(mac,
+			rssi, current_rate, fixrate_en, new_rate);
+	if (status != HALMAC_RET_SUCCESS)
+		return -1;
+
+	return 0;
+}
+
+int rtw_halmac_bf_cfg_mu_mimo(struct dvobj_priv *d, enum halmac_snd_role role,
+		u8 *sounding_sts, u16 grouping_bitmap, u8 mu_tx_en,
+		u32 *given_gid_tab, u32 *given_user_pos)
+{
+	struct halmac_adapter *mac;
+	struct halmac_api *api;
+	enum halmac_ret_status status;
+	struct halmac_cfg_mumimo_para param;
+
+
+	mac = dvobj_to_halmac(d);
+	api = HALMAC_GET_API(mac);
+
+	_rtw_memset(&param, 0, sizeof(param));
+
+	param.role = role;
+	param.grouping_bitmap = grouping_bitmap;
+	param.mu_tx_en = mu_tx_en;
+
+	if (sounding_sts)
+		_rtw_memcpy(param.sounding_sts, sounding_sts, 6);
+
+	if (given_gid_tab)
+		_rtw_memcpy(param.given_gid_tab, given_gid_tab, 8);
+
+	if (given_user_pos)
+		_rtw_memcpy(param.given_user_pos, given_user_pos, 16);
+
+	status = api->halmac_cfg_mumimo(mac, &param);
+	if (status != HALMAC_RET_SUCCESS)
+		return -1;
+
+	return 0;
+}
+
+#endif /* RTW_BEAMFORMING_VERSION_2 */
+#endif /* CONFIG_BEAMFORMING */
diff --git a/rtl8723DS/hal/hal_halmac.h b/rtl8723DS/hal/hal_halmac.h
index c08d7b6..152a0e8 100755..100644
--- a/rtl8723DS/hal/hal_halmac.h
+++ b/rtl8723DS/hal/hal_halmac.h
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2015 - 2017 Realtek Corporation.
+ * Copyright(c) 2015 - 2018 Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -17,14 +17,14 @@
 
 #include <drv_types.h>		/* adapter_to_dvobj(), struct intf_hdl and etc. */
 #include <hal_data.h>		/* struct hal_spec_t */
-#include "halmac/halmac_api.h"	/* PHALMAC_ADAPTER and etc. */
+#include "halmac/halmac_api.h"	/* struct halmac_adapter* and etc. */
 
 /* HALMAC Definition for Driver */
 #define RTW_HALMAC_H2C_MAX_SIZE		8
 #define RTW_HALMAC_BA_SSN_RPT_SIZE	4
 
 #define dvobj_set_halmac(d, mac)	((d)->halmac = (mac))
-#define dvobj_to_halmac(d)		((PHALMAC_ADAPTER)((d)->halmac))
+#define dvobj_to_halmac(d)		((struct halmac_adapter *)((d)->halmac))
 #define adapter_to_halmac(p)		dvobj_to_halmac(adapter_to_dvobj(p))
 
 /* for H2C cmd */
@@ -39,10 +39,10 @@ typedef enum _RTW_HALMAC_MODE {
 
 union rtw_phy_para_data {
 	struct _mac {
-		u32	value;
-		u32	msk;
-		u16	offset;
-		u8	msk_en;	/* Enable bit mask(msk) or not */
+		u32	value;	/* value to be set in bit mask(msk) */
+		u32	msk;	/* bit mask */
+		u16	offset; /* address */
+		u8	msk_en;	/* 0/1 for msk invalid/valid */
 		u8	size;	/* Unit is bytes, and value should be 1/2/4 */
 	} mac;
 	struct _bb {
@@ -97,7 +97,7 @@ struct rtw_halmac_bcn_ctrl {
 	u8 p2p_bcn_area:1;	/* Enable P2P BCN area on function */
 };
 
-extern HALMAC_PLATFORM_API rtw_halmac_platform_api;
+extern struct halmac_platform_api rtw_halmac_platform_api;
 
 /* HALMAC API for Driver(HAL) */
 u8 rtw_halmac_read8(struct intf_hdl *, u32 addr);
@@ -117,11 +117,11 @@ int rtw_halmac_write32(struct intf_hdl *, u32 addr, u32 value);
 void rtw_halmac_get_version(char *str, u32 len);
 
 /* Software Initialization */
-int rtw_halmac_init_adapter(struct dvobj_priv *, PHALMAC_PLATFORM_API);
+int rtw_halmac_init_adapter(struct dvobj_priv *d, struct halmac_platform_api *pf_api);
 int rtw_halmac_deinit_adapter(struct dvobj_priv *);
 
 /* Get operations */
-int rtw_halmac_get_hw_value(struct dvobj_priv *, HALMAC_HW_ID hw_id, VOID *pvalue);
+int rtw_halmac_get_hw_value(struct dvobj_priv *d, enum halmac_hw_id hw_id, void *pvalue);
 int rtw_halmac_get_tx_fifo_size(struct dvobj_priv *d, u32 *size);
 int rtw_halmac_get_rx_fifo_size(struct dvobj_priv *d, u32 *size);
 int rtw_halmac_get_rsvd_drv_pg_bndy(struct dvobj_priv *d, u16 *bndy);
@@ -140,7 +140,7 @@ int rtw_halmac_get_bcn_ctrl(struct dvobj_priv *d, enum _hw_port hwport, struct r
 /*int rtw_halmac_get_wow_reason(struct dvobj_priv *, u8 *reason);*/
 
 /* Set operations */
-int rtw_halmac_config_rx_info(struct dvobj_priv *, HALMAC_DRV_INFO);
+int rtw_halmac_config_rx_info(struct dvobj_priv *d, enum halmac_drv_info info);
 int rtw_halmac_set_max_dl_fw_size(struct dvobj_priv *d, u32 size);
 int rtw_halmac_set_mac_address(struct dvobj_priv *d, enum _hw_port hwport, u8 *addr);
 int rtw_halmac_set_bssid(struct dvobj_priv *d, enum _hw_port hwport, u8 *addr);
@@ -152,6 +152,7 @@ int rtw_halmac_set_bcn_ctrl(struct dvobj_priv *d, enum _hw_port hwport, struct r
 int rtw_halmac_set_aid(struct dvobj_priv *d, enum _hw_port hwport, u16 aid);
 int rtw_halmac_set_bandwidth(struct dvobj_priv *d, u8 channel, u8 pri_ch_idx, u8 bw);
 int rtw_halmac_set_edca(struct dvobj_priv *d, u8 queue, u8 aifs, u8 cw, u16 txop);
+int rtw_halmac_set_rts_full_bw(struct dvobj_priv *d, u8 enable);
 
 /* Functions */
 int rtw_halmac_poweron(struct dvobj_priv *);
@@ -194,6 +195,12 @@ int rtw_halmac_fill_hal_spec(struct dvobj_priv *, struct hal_spec_t *);
 int rtw_halmac_p2pps(struct dvobj_priv *dvobj, PHAL_P2P_PS_PARA pp2p_ps_para);
 int rtw_halmac_iqk(struct dvobj_priv *d, u8 clear, u8 segment);
 int rtw_halmac_cfg_phy_para(struct dvobj_priv *d, struct rtw_phy_parameter *para);
+int rtw_halmac_led_cfg(struct dvobj_priv *d, u8 enable, u8 mode);
+void rtw_halmac_led_switch(struct dvobj_priv *d, u8 on);
+int rtw_halmac_bt_wake_cfg(struct dvobj_priv *d, u8 enable);
+#ifdef CONFIG_PNO_SUPPORT
+int rtw_halmac_pno_scanoffload(struct dvobj_priv *d, u32 enable);
+#endif
 
 #ifdef CONFIG_SDIO_HCI
 int rtw_halmac_query_tx_page_num(struct dvobj_priv *);
@@ -212,4 +219,27 @@ u8 rtw_halmac_switch_usb_mode(struct dvobj_priv *d, enum RTW_USB_SPEED usb_mode)
 #ifdef CONFIG_SUPPORT_TRX_SHARED
 void dump_trx_share_mode(void *sel, _adapter *adapter);
 #endif
+
+#ifdef CONFIG_BEAMFORMING
+#ifdef RTW_BEAMFORMING_VERSION_2
+int rtw_halmac_bf_add_mu_bfer(struct dvobj_priv *d, u16 paid, u16 csi_para,
+		u16 my_aid, enum halmac_csi_seg_len sel, u8 *addr);
+int rtw_halmac_bf_del_mu_bfer(struct dvobj_priv *d);
+
+int rtw_halmac_bf_cfg_sounding(struct dvobj_priv *d, enum halmac_snd_role role,
+		enum halmac_data_rate rate);
+int rtw_halmac_bf_del_sounding(struct dvobj_priv *d, enum halmac_snd_role role);
+
+int rtw_halmac_bf_cfg_csi_rate(struct dvobj_priv *d, u8 rssi, u8 current_rate,
+		u8 fixrate_en, u8 *new_rate);
+
+int rtw_halmac_bf_cfg_mu_mimo(struct dvobj_priv *d, enum halmac_snd_role role,
+		u8 *sounding_sts, u16 grouping_bitmap, u8 mu_tx_en,
+		u32 *given_gid_tab, u32 *given_user_pos);
+#define rtw_halmac_bf_cfg_mu_bfee(d, gid_tab, user_pos) \
+	rtw_halmac_bf_cfg_mu_mimo(d, HAL_BFEE, NULL, 0, 0, gid_tab, user_pos)
+
+#endif /* RTW_BEAMFORMING_VERSION_2 */
+#endif /* CONFIG_BEAMFORMING */
+
 #endif /* _HAL_HALMAC_H_ */
diff --git a/rtl8723DS/hal/hal_hci/hal_sdio.c b/rtl8723DS/hal/hal_hci/hal_sdio.c
index 9bcd8ce..008210a 100755..100644
--- a/rtl8723DS/hal/hal_hci/hal_sdio.c
+++ b/rtl8723DS/hal/hal_hci/hal_sdio.c
@@ -158,7 +158,7 @@ void rtw_hal_sdio_update_tx_freepage(_adapter *padapter, u8 PageIdx, u8 Required
 	/* _exit_critical_bh(&pHalData->SdioTxFIFOFreePageLock, &irql); */
 }
 
-void rtw_hal_set_sdio_tx_max_length(PADAPTER padapter, u8 numHQ, u8 numNQ, u8 numLQ, u8 numPubQ)
+void rtw_hal_set_sdio_tx_max_length(PADAPTER padapter, u8 numHQ, u8 numNQ, u8 numLQ, u8 numPubQ, u8 div_num)
 {
 	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(padapter);
 	u32	page_size;
@@ -166,9 +166,9 @@ void rtw_hal_set_sdio_tx_max_length(PADAPTER padapter, u8 numHQ, u8 numNQ, u8 nu
 
 	rtw_hal_get_def_var(padapter, HAL_DEF_TX_PAGE_SIZE, &page_size);
 
-	lenHQ = ((numHQ + numPubQ) >> 1) * page_size;
-	lenNQ = ((numNQ + numPubQ) >> 1) * page_size;
-	lenLQ = ((numLQ + numPubQ) >> 1) * page_size;
+	lenHQ = ((numHQ + numPubQ) / div_num) * page_size;
+	lenNQ = ((numNQ + numPubQ) / div_num) * page_size;
+	lenLQ = ((numLQ + numPubQ) / div_num) * page_size;
 
 	pHalData->sdio_tx_max_len[HI_QUEUE_IDX] = (lenHQ > MAX_XMITBUF_SZ) ? MAX_XMITBUF_SZ : lenHQ;
 	pHalData->sdio_tx_max_len[MID_QUEUE_IDX] = (lenNQ > MAX_XMITBUF_SZ) ? MAX_XMITBUF_SZ : lenNQ;
@@ -231,4 +231,473 @@ exit:
 }
 #endif
 
+#ifdef CONFIG_SDIO_CHK_HCI_RESUME
+
+#ifndef SDIO_HCI_RESUME_PWR_RDY_TIMEOUT_MS
+	#define SDIO_HCI_RESUME_PWR_RDY_TIMEOUT_MS 200
+#endif
+#ifndef DBG_SDIO_CHK_HCI_RESUME
+	#define DBG_SDIO_CHK_HCI_RESUME 0
+#endif
+
+bool sdio_chk_hci_resume(struct intf_hdl *pintfhdl)
+{
+	_adapter *adapter = pintfhdl->padapter;
+	u8 hci_sus_state;
+	u8 sus_ctl, sus_ctl_ori = 0xEA;
+	u8 do_leave = 0;
+	systime start = 0, end = 0;
+	u32 poll_cnt = 0;
+	u8 timeout = 0;
+	u8 sr = 0;
+	s32 err = 0;
+
+	rtw_hal_get_hwreg(adapter, HW_VAR_HCI_SUS_STATE, &hci_sus_state);
+	if (hci_sus_state == HCI_SUS_LEAVE || hci_sus_state == HCI_SUS_ERR)
+		goto no_hdl;
+
+	err = sd_cmd52_read(pintfhdl, SDIO_LOCAL_CMD_ADDR(SDIO_REG_HSUS_CTRL), 1, &sus_ctl);
+	if (err)
+		goto exit;
+	sus_ctl_ori = sus_ctl;
+
+	if ((sus_ctl & HCI_RESUME_PWR_RDY) && !(sus_ctl & HCI_SUS_CTRL))
+		goto exit;
+
+	if (sus_ctl & HCI_SUS_CTRL) {
+		sus_ctl &= ~(HCI_SUS_CTRL);
+		err = sd_cmd52_write(pintfhdl, SDIO_LOCAL_CMD_ADDR(SDIO_REG_HSUS_CTRL), 1, &sus_ctl);
+		if (err)
+			goto exit;
+	}
+
+	do_leave = 1;
+
+	/* polling for HCI_RESUME_PWR_RDY && !HCI_SUS_CTRL */
+	start = rtw_get_current_time();
+	while (1) {
+		if (rtw_is_surprise_removed(adapter)) {
+			sr = 1;
+			break;
+		}
+
+		err = sd_cmd52_read(pintfhdl, SDIO_LOCAL_CMD_ADDR(SDIO_REG_HSUS_CTRL), 1, &sus_ctl);
+		poll_cnt++;
+
+		if (!err && (sus_ctl & HCI_RESUME_PWR_RDY) && !(sus_ctl & HCI_SUS_CTRL))
+			break;
+
+		if (rtw_get_passing_time_ms(start) > SDIO_HCI_RESUME_PWR_RDY_TIMEOUT_MS) {
+			timeout = 1;
+			break;
+		}
+	}
+	end = rtw_get_current_time();
+
+exit:
+
+	if (DBG_SDIO_CHK_HCI_RESUME) {
+		RTW_INFO(FUNC_ADPT_FMT" hci_sus_state:%u, sus_ctl:0x%02x(0x%02x), do_leave:%u, to:%u, err:%u\n"
+			, FUNC_ADPT_ARG(adapter), hci_sus_state, sus_ctl, sus_ctl_ori, do_leave, timeout, err);
+		if (start != 0 || end != 0) {
+			RTW_INFO(FUNC_ADPT_FMT" polling %d ms, cnt:%u\n"
+				, FUNC_ADPT_ARG(adapter), rtw_get_time_interval_ms(start, end), poll_cnt);
+		}
+	}
+
+	if (timeout) {
+		RTW_ERR(FUNC_ADPT_FMT" timeout(err:%d) sus_ctl:0x%02x\n"
+			, FUNC_ADPT_ARG(adapter), err, sus_ctl);
+	} else if (err) {
+		RTW_ERR(FUNC_ADPT_FMT" err:%d\n"
+			, FUNC_ADPT_ARG(adapter), err);
+	}
+
+no_hdl:
+	return do_leave ? _TRUE : _FALSE;
+}
+
+void sdio_chk_hci_suspend(struct intf_hdl *pintfhdl)
+{
+#define SDIO_CHK_HCI_SUSPEND_POLLING 0
+
+	_adapter *adapter = pintfhdl->padapter;
+	u8 hci_sus_state;
+	u8 sus_ctl, sus_ctl_ori = 0xEA;
+	systime start = 0, end = 0;
+	u32 poll_cnt = 0;
+	u8 timeout = 0;
+	u8 sr = 0;
+	s32 err = 0;
+	u8 device_id;
+	u16 offset;
+
+	rtw_hal_get_hwreg(adapter, HW_VAR_HCI_SUS_STATE, &hci_sus_state);
+	if (hci_sus_state == HCI_SUS_LEAVE || hci_sus_state == HCI_SUS_LEAVING || hci_sus_state == HCI_SUS_ERR)
+		goto no_hdl;
+
+	err = sd_cmd52_read(pintfhdl, SDIO_LOCAL_CMD_ADDR(SDIO_REG_HSUS_CTRL), 1, &sus_ctl);
+	if (err)
+		goto exit;
+	sus_ctl_ori = sus_ctl;
+
+	if (!(sus_ctl & HCI_RESUME_PWR_RDY))
+		goto exit;
+
+	sus_ctl |= HCI_SUS_CTRL;
+	err = sd_cmd52_write(pintfhdl, SDIO_LOCAL_CMD_ADDR(SDIO_REG_HSUS_CTRL), 1, &sus_ctl);
+	if (err)
+		goto exit;
+
+#if SDIO_CHK_HCI_SUSPEND_POLLING
+	/* polling for HCI_RESUME_PWR_RDY cleared */
+	start = rtw_get_current_time();
+	while (1) {
+		if (rtw_is_surprise_removed(adapter)) {
+			sr = 1;
+			break;
+		}
+
+		err = sd_cmd52_read(pintfhdl, SDIO_LOCAL_CMD_ADDR(SDIO_REG_HSUS_CTRL), 1, &sus_ctl);
+		poll_cnt++;
+
+		if (!err && !(sus_ctl & HCI_RESUME_PWR_RDY))
+			break;
+
+		if (rtw_get_passing_time_ms(start) > SDIO_HCI_RESUME_PWR_RDY_TIMEOUT_MS) {
+			timeout = 1;
+			break;
+		}
+	}
+	end = rtw_get_current_time();
+#endif /* SDIO_CHK_HCI_SUSPEND_POLLING */
+
+exit:
+
+	if (DBG_SDIO_CHK_HCI_RESUME) {
+		RTW_INFO(FUNC_ADPT_FMT" hci_sus_state:%u, sus_ctl:0x%02x(0x%02x), to:%u, err:%u\n"
+			, FUNC_ADPT_ARG(adapter), hci_sus_state, sus_ctl, sus_ctl_ori, timeout, err);
+		if (start != 0 || end != 0) {
+			RTW_INFO(FUNC_ADPT_FMT" polling %d ms, cnt:%u\n"
+				, FUNC_ADPT_ARG(adapter), rtw_get_time_interval_ms(start, end), poll_cnt);
+		}
+	}
+
+#if SDIO_CHK_HCI_SUSPEND_POLLING
+	if (timeout) {
+		RTW_ERR(FUNC_ADPT_FMT" timeout(err:%d) sus_ctl:0x%02x\n"
+			, FUNC_ADPT_ARG(adapter), err, sus_ctl);
+	} else
+#endif
+		if (err) {
+			RTW_ERR(FUNC_ADPT_FMT" err:%d\n"
+				, FUNC_ADPT_ARG(adapter), err);
+		}
+
+no_hdl:
+	return;
+}
+#endif /* CONFIG_SDIO_CHK_HCI_RESUME */
+
+
+#ifdef CONFIG_SDIO_INDIRECT_ACCESS
+
+/* program indirect access register in sdio local to read/write page0 registers */
+#ifndef INDIRECT_ACCESS_TIMEOUT_MS
+	#define INDIRECT_ACCESS_TIMEOUT_MS 200
+#endif
+#ifndef DBG_SDIO_INDIRECT_ACCESS
+	#define DBG_SDIO_INDIRECT_ACCESS 0
+#endif
+
+s32 sdio_iread(PADAPTER padapter, u32 addr, u8 size, u8 *v)
+{
+	struct intf_hdl *pintfhdl = &padapter->iopriv.intf;
+	_mutex *mutex = &adapter_to_dvobj(padapter)->sd_indirect_access_mutex;
+
+	u8 val[4] = {0};
+	u8 cmd[4] = {0}; /* mapping to indirect access register, little endien */
+	systime start = 0, end = 0;
+	u8 timeout = 0;
+	u8 sr = 0;
+	s32 err = 0;
+
+	if (size == 1)
+		SET_INDIRECT_REG_SIZE_1BYTE(cmd);
+	else if (size == 2)
+		SET_INDIRECT_REG_SIZE_2BYTE(cmd);
+	else if (size == 4)
+		SET_INDIRECT_REG_SIZE_4BYTE(cmd);
+
+	SET_INDIRECT_REG_ADDR(cmd, addr);
+
+	/* acquire indirect access lock */
+	_enter_critical_mutex(mutex, NULL);
+
+	if (DBG_SDIO_INDIRECT_ACCESS)
+		RTW_INFO(FUNC_ADPT_FMT" cmd:%02x %02x %02x %02x\n", FUNC_ADPT_ARG(padapter), cmd[0], cmd[1], cmd[2], cmd[3]);
+
+	err = sd_cmd52_write(pintfhdl, SDIO_LOCAL_CMD_ADDR(SDIO_REG_INDIRECT_REG_CFG), 3, cmd);
+	if (err)
+		goto exit;
+
+	/* trigger */
+	SET_INDIRECT_REG_READ(cmd);
+
+	if (DBG_SDIO_INDIRECT_ACCESS)
+		RTW_INFO(FUNC_ADPT_FMT" cmd:%02x %02x %02x %02x\n", FUNC_ADPT_ARG(padapter), cmd[0], cmd[1], cmd[2], cmd[3]);
+
+	err = sd_cmd52_write(pintfhdl, SDIO_LOCAL_CMD_ADDR(SDIO_REG_INDIRECT_REG_CFG + 2), 1, cmd + 2);
+	if (err)
+		goto exit;
+
+	/* polling for indirect access done */
+	start = rtw_get_current_time();
+	while (1) {
+		if (rtw_is_surprise_removed(padapter)) {
+			sr = 1;
+			break;
+		}
+
+		err = sd_cmd52_read(pintfhdl, SDIO_LOCAL_CMD_ADDR(SDIO_REG_INDIRECT_REG_CFG + 2), 1, cmd + 2);
+
+		if (!err && GET_INDIRECT_REG_RDY(cmd))
+			break;
+
+		if (rtw_get_passing_time_ms(start) > INDIRECT_ACCESS_TIMEOUT_MS) {
+			timeout = 1;
+			break;
+		}
+	}
+	end = rtw_get_current_time();
+
+	if (timeout || sr)
+		goto exit;
+
+	/* read result */
+	err = sd_cmd52_read(pintfhdl, SDIO_LOCAL_CMD_ADDR(SDIO_REG_INDIRECT_REG_DATA), size, val);
+	if (size == 2)
+		*((u16 *)(val)) = le16_to_cpu(*((u16 *)(val)));
+	else if (size == 4)
+		*((u32 *)(val)) = le32_to_cpu(*((u32 *)(val)));
+
+	if (DBG_SDIO_INDIRECT_ACCESS) {
+		if (size == 1)
+			RTW_INFO(FUNC_ADPT_FMT" val:0x%02x\n", FUNC_ADPT_ARG(padapter), *((u8 *)(val)));
+		else if (size == 2)
+			RTW_INFO(FUNC_ADPT_FMT" val:0x%04x\n", FUNC_ADPT_ARG(padapter), *((u16 *)(val)));
+		else if (size == 4)
+			RTW_INFO(FUNC_ADPT_FMT" val:0x%08x\n", FUNC_ADPT_ARG(padapter), *((u32 *)(val)));
+	}
+
+exit:
+	/* release indirect access lock */
+	_exit_critical_mutex(mutex, NULL);
+
+	if (DBG_SDIO_INDIRECT_ACCESS) {
+		RTW_INFO(FUNC_ADPT_FMT" addr:0x%0x size:%u, cmd:%02x %02x %02x %02x, to:%u, err:%u\n"
+			, FUNC_ADPT_ARG(padapter), addr, size, cmd[0], cmd[1], cmd[2], cmd[3], timeout, err);
+		if (start != 0 || end != 0) {
+			RTW_INFO(FUNC_ADPT_FMT" polling %d ms\n"
+				, FUNC_ADPT_ARG(padapter), rtw_get_time_interval_ms(start, end));
+		}
+	}
+
+	if (timeout) {
+		RTW_ERR(FUNC_ADPT_FMT" addr:0x%0x timeout(err:%d), cmd\n"
+			, FUNC_ADPT_ARG(padapter), addr, err);
+		if (!err)
+			err = -1; /* just for return value */
+	} else if (err) {
+		RTW_ERR(FUNC_ADPT_FMT" addr:0x%0x err:%d\n"
+			, FUNC_ADPT_ARG(padapter), addr, err);
+	} else if (sr) {
+		/* just for return value */
+		err = -1;
+	}
+
+	if (!err && !timeout && !sr)
+		_rtw_memcpy(v, val, size);
+
+	return err;
+}
+
+s32 sdio_iwrite(PADAPTER padapter, u32 addr, u8 size, u8 *v)
+{
+	struct intf_hdl *pintfhdl = &padapter->iopriv.intf;
+	_mutex *mutex = &adapter_to_dvobj(padapter)->sd_indirect_access_mutex;
+
+	u8 val[4] = {0};
+	u8 cmd[4] = {0}; /* mapping to indirect access register, little endien */
+	systime start = 0, end = 0;
+	u8 timeout = 0;
+	u8 sr = 0;
+	s32 err = 0;
+
+	if (size == 1)
+		SET_INDIRECT_REG_SIZE_1BYTE(cmd);
+	else if (size == 2)
+		SET_INDIRECT_REG_SIZE_2BYTE(cmd);
+	else if (size == 4)
+		SET_INDIRECT_REG_SIZE_4BYTE(cmd);
+
+	SET_INDIRECT_REG_ADDR(cmd, addr);
+
+	/* acquire indirect access lock */
+	_enter_critical_mutex(mutex, NULL);
+
+	if (DBG_SDIO_INDIRECT_ACCESS)
+		RTW_INFO(FUNC_ADPT_FMT" cmd:%02x %02x %02x %02x\n", FUNC_ADPT_ARG(padapter), cmd[0], cmd[1], cmd[2], cmd[3]);
+
+	err = sd_cmd52_write(pintfhdl, SDIO_LOCAL_CMD_ADDR(SDIO_REG_INDIRECT_REG_CFG), 3, cmd);
+	if (err)
+		goto exit;
+
+	/* data to write */
+	_rtw_memcpy(val, v, size);
+
+	if (DBG_SDIO_INDIRECT_ACCESS) {
+		if (size == 1)
+			RTW_INFO(FUNC_ADPT_FMT" val:0x%02x\n", FUNC_ADPT_ARG(padapter), *((u8 *)(val)));
+		else if (size == 2)
+			RTW_INFO(FUNC_ADPT_FMT" val:0x%04x\n", FUNC_ADPT_ARG(padapter), *((u16 *)(val)));
+		else if (size == 4)
+			RTW_INFO(FUNC_ADPT_FMT" val:0x%08x\n", FUNC_ADPT_ARG(padapter), *((u32 *)(val)));
+	}
+
+	if (size == 2)
+		*((u16 *)(val)) = cpu_to_le16(*((u16 *)(val)));
+	else if (size == 4)
+		*((u32 *)(val)) = cpu_to_le32(*((u32 *)(val)));
+
+	err = sd_cmd52_write(pintfhdl, SDIO_LOCAL_CMD_ADDR(SDIO_REG_INDIRECT_REG_DATA), size, val);
+	if (err)
+		goto exit;
+
+	/* trigger */
+	SET_INDIRECT_REG_WRITE(cmd);
+
+	if (DBG_SDIO_INDIRECT_ACCESS)
+		RTW_INFO(FUNC_ADPT_FMT" cmd:%02x %02x %02x %02x\n", FUNC_ADPT_ARG(padapter), cmd[0], cmd[1], cmd[2], cmd[3]);
+
+	err = sd_cmd52_write(pintfhdl, SDIO_LOCAL_CMD_ADDR(SDIO_REG_INDIRECT_REG_CFG + 2), 1, cmd + 2);
+	if (err)
+		goto exit;
+
+	/* polling for indirect access done */
+	start = rtw_get_current_time();
+	while (1) {
+		if (rtw_is_surprise_removed(padapter)) {
+			sr = 1;
+			break;
+		}
+
+		err = sd_cmd52_read(pintfhdl, SDIO_LOCAL_CMD_ADDR(SDIO_REG_INDIRECT_REG_CFG + 2), 1, cmd + 2);
+
+		if (!err && GET_INDIRECT_REG_RDY(cmd))
+			break;
+
+		if (rtw_get_passing_time_ms(start) > INDIRECT_ACCESS_TIMEOUT_MS) {
+			timeout = 1;
+			break;
+		}
+	}
+	end = rtw_get_current_time();
+
+	if (timeout || sr)
+		goto exit;
+
+exit:
+	/* release indirect access lock */
+	_exit_critical_mutex(mutex, NULL);
+
+	if (DBG_SDIO_INDIRECT_ACCESS) {
+		RTW_INFO(FUNC_ADPT_FMT" addr:0x%0x size:%u, cmd:%02x %02x %02x %02x, to:%u, err:%u\n"
+			, FUNC_ADPT_ARG(padapter), addr, size, cmd[0], cmd[1], cmd[2], cmd[3], timeout, err);
+		if (start != 0 || end != 0) {
+			RTW_INFO(FUNC_ADPT_FMT" polling %d ms\n"
+				, FUNC_ADPT_ARG(padapter), rtw_get_time_interval_ms(start, end));
+		}
+	}
+
+	if (timeout) {
+		RTW_ERR(FUNC_ADPT_FMT" addr:0x%0x timeout(err:%d), cmd\n"
+			, FUNC_ADPT_ARG(padapter), addr, err);
+		if (!err)
+			err = -1; /* just for return value */
+	} else if (err) {
+		RTW_ERR(FUNC_ADPT_FMT" addr:0x%0x err:%d\n"
+			, FUNC_ADPT_ARG(padapter), addr, err);
+	} else if (sr) {
+		/* just for return value */
+		err = -1;
+	}
+
+	return err;
+}
+
+u8 sdio_iread8(struct intf_hdl *pintfhdl, u32 addr)
+{
+	u8 val;
+
+	if (sdio_iread(pintfhdl->padapter, addr, 1, (u8 *)&val) != 0)
+		val = SDIO_ERR_VAL8;
+
+	return val;
+}
+
+u16 sdio_iread16(struct intf_hdl *pintfhdl, u32 addr)
+{
+	u16 val;
+
+	if (sdio_iread(pintfhdl->padapter, addr, 2, (u8 *)&val) != 0)
+		val = SDIO_ERR_VAL16;
+
+	return val;
+}
+
+u32 sdio_iread32(struct intf_hdl *pintfhdl, u32 addr)
+{
+	u32 val;
+
+	if (sdio_iread(pintfhdl->padapter, addr, 4, (u8 *)&val) != 0)
+		val = SDIO_ERR_VAL32;
+
+	return val;
+}
+
+s32 sdio_iwrite8(struct intf_hdl *pintfhdl, u32 addr, u8 val)
+{
+	return sdio_iwrite(pintfhdl->padapter, addr, 1, (u8 *)&val);
+}
+
+s32 sdio_iwrite16(struct intf_hdl *pintfhdl, u32 addr, u16 val)
+{
+	return sdio_iwrite(pintfhdl->padapter, addr, 2, (u8 *)&val);
+}
+
+s32 sdio_iwrite32(struct intf_hdl *pintfhdl, u32 addr, u32 val)
+{
+	return sdio_iwrite(pintfhdl->padapter, addr, 4, (u8 *)&val);
+}
+#endif /* CONFIG_SDIO_INDIRECT_ACCESS */
+u32 cmd53_4byte_alignment(struct intf_hdl *pintfhdl, u32 addr)
+{
+	u32 addr_rdr;
+	u32 value;
+
+	value = 0;
+	addr_rdr = addr % 4;
+
+	if (addr_rdr) {
+		u8 shift_bit;
+
+		shift_bit = addr_rdr * 8;
+		value = (sd_read32(pintfhdl, (addr - addr_rdr), NULL)) >> shift_bit;
+	} else
+		value = sd_read32(pintfhdl, addr, NULL);
+	
+	return value;
+}
+
 #endif /* !RTW_HALMAC */
diff --git a/rtl8723DS/hal/hal_intf.c b/rtl8723DS/hal/hal_intf.c
index 8368cab..2d020fb 100755..100644
--- a/rtl8723DS/hal/hal_intf.c
+++ b/rtl8723DS/hal/hal_intf.c
@@ -28,9 +28,12 @@ const u32 _chip_type_to_odm_ic_type[] = {
 	ODM_RTL8814A,
 	ODM_RTL8703B,
 	ODM_RTL8188F,
+	ODM_RTL8188F,
 	ODM_RTL8822B,
 	ODM_RTL8723D,
 	ODM_RTL8821C,
+	ODM_RTL8710B,
+	ODM_RTL8192F,
 	0,
 };
 
@@ -75,12 +78,56 @@ void rtw_hal_read_chip_version(_adapter *padapter)
 	rtw_odm_init_ic_type(padapter);
 }
 
+static void rtw_init_wireless_mode(_adapter *padapter)
+{
+	u8 proto_wireless_mode = 0;
+	struct hal_spec_t *hal_spec = GET_HAL_SPEC(padapter);
+	if(hal_spec->proto_cap & PROTO_CAP_11B)
+		proto_wireless_mode |= WIRELESS_11B;
+	
+	if(hal_spec->proto_cap & PROTO_CAP_11G)
+		proto_wireless_mode |= WIRELESS_11G;
+#ifdef CONFIG_80211AC_VHT
+	if(hal_spec->band_cap & BAND_CAP_5G)
+		proto_wireless_mode |= WIRELESS_11A;
+#endif
+
+#ifdef CONFIG_80211N_HT
+	if(hal_spec->proto_cap & PROTO_CAP_11N) {
+
+		if(hal_spec->band_cap & BAND_CAP_2G)
+			proto_wireless_mode |= WIRELESS_11_24N;
+		if(hal_spec->band_cap & BAND_CAP_5G)
+			proto_wireless_mode |= WIRELESS_11_5N;
+	}
+#endif
+
+#ifdef CONFIG_80211AC_VHT
+	if(hal_spec->proto_cap & PROTO_CAP_11AC) 
+		proto_wireless_mode |= WIRELESS_11AC;
+#endif
+	padapter->registrypriv.wireless_mode &= proto_wireless_mode;
+}
+
 void rtw_hal_def_value_init(_adapter *padapter)
 {
 	if (is_primary_adapter(padapter)) {
+		/*init fw_psmode_iface_id*/
+		adapter_to_pwrctl(padapter)->fw_psmode_iface_id = 0xff;
+		/*wireless_mode*/
+		rtw_init_wireless_mode(padapter);
 		padapter->hal_func.init_default_value(padapter);
 
 		rtw_init_hal_com_default_value(padapter);
+		
+		#ifdef CONFIG_FW_MULTI_PORT_SUPPORT
+		adapter_to_dvobj(padapter)->dft.port_id = 0xFF;
+		adapter_to_dvobj(padapter)->dft.mac_id = 0xFF;
+		#endif
+		#ifdef CONFIG_HW_P0_TSF_SYNC
+		adapter_to_dvobj(padapter)->p0_tsf.sync_port = MAX_HW_PORT;
+		adapter_to_dvobj(padapter)->p0_tsf.offset = 0;
+		#endif
 
 		{
 			struct dvobj_priv *dvobj = adapter_to_dvobj(padapter);
@@ -92,6 +139,7 @@ void rtw_hal_def_value_init(_adapter *padapter)
 			dvobj->cam_ctl.sec_cap = hal_spec->sec_cap;
 			dvobj->cam_ctl.num = rtw_min(hal_spec->sec_cam_ent_num, SEC_CAM_ENT_NUM_SW_LIMIT);
 		}
+		GET_HAL_DATA(padapter)->rx_tsf_addr_filter_config = 0;
 	}
 }
 
@@ -104,6 +152,7 @@ u8 rtw_hal_data_init(_adapter *padapter)
 			RTW_INFO("cant not alloc memory for HAL DATA\n");
 			return _FAIL;
 		}
+		rtw_phydm_priv_init(padapter);
 	}
 	return _SUCCESS;
 }
@@ -149,15 +198,35 @@ void rtw_hal_dm_deinit(_adapter *padapter)
 		_rtw_spinlock_free(&pHalData->IQKSpinLock);
 	}
 }
+
 #ifdef CONFIG_RTW_SW_LED
-void	rtw_hal_sw_led_init(_adapter *padapter)
+void rtw_hal_sw_led_init(_adapter *padapter)
 {
-	if (padapter->hal_func.InitSwLeds)
+	struct led_priv *ledpriv = adapter_to_led(padapter);
+
+	if (ledpriv->bRegUseLed == _FALSE)
+		return;
+
+	if (!is_primary_adapter(padapter))
+		return;
+
+	if (padapter->hal_func.InitSwLeds) {
 		padapter->hal_func.InitSwLeds(padapter);
+		rtw_led_set_ctl_en_mask_primary(padapter);
+		rtw_led_set_iface_en(padapter, 1);
+	}
 }
 
 void rtw_hal_sw_led_deinit(_adapter *padapter)
 {
+	struct led_priv *ledpriv = adapter_to_led(padapter);
+
+	if (ledpriv->bRegUseLed == _FALSE)
+		return;
+
+	if (!is_primary_adapter(padapter))
+		return;
+
 	if (padapter->hal_func.DeInitSwLeds)
 		padapter->hal_func.DeInitSwLeds(padapter);
 }
@@ -207,24 +276,81 @@ void rtw_hal_init_opmode(_adapter *padapter)
 	else if (fw_state & WIFI_AP_STATE)
 		networkType = Ndis802_11APMode;
 #endif
+#ifdef CONFIG_RTW_MESH
+	else if (fw_state & WIFI_MESH_STATE)
+		networkType = Ndis802_11_mesh;
+#endif
 	else
 		return;
 
 	rtw_setopmode_cmd(padapter, networkType, RTW_CMDF_DIRECTLY);
 }
 
+#ifdef CONFIG_NEW_NETDEV_HDL
+uint rtw_hal_iface_init(_adapter *adapter)
+{
+	uint status = _SUCCESS;
+
+	rtw_hal_set_hwreg(adapter, HW_VAR_MAC_ADDR, adapter_mac_addr(adapter));
+	#ifdef RTW_HALMAC
+	rtw_hal_hw_port_enable(adapter);
+	#endif
+	rtw_sec_restore_wep_key(adapter);
+	rtw_hal_init_opmode(adapter);
+	rtw_hal_start_thread(adapter);
+	return status;
+}
+uint rtw_hal_init(_adapter *padapter)
+{
+	uint status = _SUCCESS;
+
+	status = padapter->hal_func.hal_init(padapter);
+
+	if (status == _SUCCESS) {
+		rtw_set_hw_init_completed(padapter, _TRUE);
+		if (padapter->registrypriv.notch_filter == 1)
+			rtw_hal_notch_filter(padapter, 1);
+		rtw_led_control(padapter, LED_CTL_POWER_ON);
+		init_hw_mlme_ext(padapter);
+		#ifdef CONFIG_RF_POWER_TRIM
+		rtw_bb_rf_gain_offset(padapter);
+		#endif /*CONFIG_RF_POWER_TRIM*/
+		GET_PRIMARY_ADAPTER(padapter)->bup = _TRUE; /*temporary*/
+		#ifdef CONFIG_MI_WITH_MBSSID_CAM
+		rtw_mi_set_mbid_cam(padapter);
+		#endif
+		#ifdef CONFIG_SUPPORT_MULTI_BCN
+		rtw_ap_multi_bcn_cfg(padapter);
+		#endif
+		#if (RTL8822B_SUPPORT == 1) || (RTL8192F_SUPPORT == 1)
+		#ifdef CONFIG_DYNAMIC_SOML
+		rtw_dyn_soml_config(padapter);
+		#endif
+		#endif
+		#ifdef CONFIG_TDMADIG
+		rtw_phydm_tdmadig(padapter, TDMADIG_INIT);
+		#endif/*CONFIG_TDMADIG*/
+#ifdef CONFIG_RTW_TX_2PATH_EN
+		rtw_phydm_tx_2path_en(padapter);
+#endif
+	} else {
+		rtw_set_hw_init_completed(padapter, _FALSE);
+		RTW_ERR("%s: hal_init fail\n", __func__);
+	}
+	return status;
+}
+#else
 uint	 rtw_hal_init(_adapter *padapter)
 {
 	uint	status = _SUCCESS;
 	struct dvobj_priv *dvobj = adapter_to_dvobj(padapter);
-	PHAL_DATA_TYPE	pHalData = GET_HAL_DATA(padapter);
 	int i;
 
 	status = padapter->hal_func.hal_init(padapter);
 
 	if (status == _SUCCESS) {
-		pHalData->hw_init_completed = _TRUE;
-		rtw_restore_mac_addr(padapter);
+		rtw_set_hw_init_completed(padapter, _TRUE);
+		rtw_mi_set_mac_addr(padapter);/*set mac addr of all ifaces*/
 		#ifdef RTW_HALMAC
 		rtw_restore_hw_port_cfg(padapter);
 		#endif
@@ -240,32 +366,48 @@ uint	 rtw_hal_init(_adapter *padapter)
 
 		rtw_hal_init_opmode(padapter);
 
-#ifdef CONFIG_RF_POWER_TRIM
+		#ifdef CONFIG_RF_POWER_TRIM
 		rtw_bb_rf_gain_offset(padapter);
-#endif /*CONFIG_RF_POWER_TRIM*/
+		#endif /*CONFIG_RF_POWER_TRIM*/
+
+		#ifdef CONFIG_SUPPORT_MULTI_BCN
+		rtw_ap_multi_bcn_cfg(padapter);
+		#endif
+
+#if (RTL8822B_SUPPORT == 1) || (RTL8192F_SUPPORT == 1)
+#ifdef CONFIG_DYNAMIC_SOML
+		rtw_dyn_soml_config(padapter);
+#endif
+#endif
+		#ifdef CONFIG_TDMADIG
+		rtw_phydm_tdmadig(padapter, TDMADIG_INIT);
+		#endif/*CONFIG_TDMADIG*/
 
+#ifdef CONFIG_RTW_TX_2PATH_EN
+		rtw_phydm_tx_2path_en(padapter);
+#endif
 	} else {
-		pHalData->hw_init_completed = _FALSE;
-		RTW_INFO("rtw_hal_init: hal_init fail\n");
+		rtw_set_hw_init_completed(padapter, _FALSE);
+		RTW_ERR("%s: fail\n", __func__);
 	}
 
 
 	return status;
 
 }
+#endif
 
 uint rtw_hal_deinit(_adapter *padapter)
 {
 	uint	status = _SUCCESS;
 	struct dvobj_priv *dvobj = adapter_to_dvobj(padapter);
-	PHAL_DATA_TYPE	pHalData = GET_HAL_DATA(padapter);
 	int i;
 
 	status = padapter->hal_func.hal_deinit(padapter);
 
 	if (status == _SUCCESS) {
 		rtw_led_control(padapter, LED_CTL_POWER_OFF);
-		pHalData->hw_init_completed = _FALSE;
+		rtw_set_hw_init_completed(padapter, _FALSE);
 	} else
 		RTW_INFO("\n rtw_hal_deinit: hal_init fail\n");
 
@@ -578,10 +720,12 @@ u32 rtw_hal_read_rfreg(_adapter *padapter, enum rf_path eRFPath, u32 RegAddr, u3
 	if (padapter->hal_func.read_rfreg) {
 		data = padapter->hal_func.read_rfreg(padapter, eRFPath, RegAddr, BitMask);
 
-		if (match_rf_read_sniff_ranges(eRFPath, RegAddr, BitMask)) {
+		#ifdef DBG_IO
+		if (match_rf_read_sniff_ranges(padapter, eRFPath, RegAddr, BitMask)) {
 			RTW_INFO("DBG_IO rtw_hal_read_rfreg(%u, 0x%04x, 0x%08x) read:0x%08x(0x%08x)\n"
 				, eRFPath, RegAddr, BitMask, (data << PHY_CalculateBitShift(BitMask)), data);
 		}
+		#endif
 	}
 
 	return data;
@@ -591,10 +735,12 @@ void rtw_hal_write_rfreg(_adapter *padapter, enum rf_path eRFPath, u32 RegAddr,
 {
 	if (padapter->hal_func.write_rfreg) {
 
-		if (match_rf_write_sniff_ranges(eRFPath, RegAddr, BitMask)) {
+		#ifdef DBG_IO
+		if (match_rf_write_sniff_ranges(padapter, eRFPath, RegAddr, BitMask)) {
 			RTW_INFO("DBG_IO rtw_hal_write_rfreg(%u, 0x%04x, 0x%08x) write:0x%08x(0x%08x)\n"
 				, eRFPath, RegAddr, BitMask, (Data << PHY_CalculateBitShift(BitMask)), Data);
 		}
+		#endif
 
 		padapter->hal_func.write_rfreg(padapter, eRFPath, RegAddr, BitMask, Data);
 
@@ -605,6 +751,23 @@ void rtw_hal_write_rfreg(_adapter *padapter, enum rf_path eRFPath, u32 RegAddr,
 	}
 }
 
+#ifdef CONFIG_SYSON_INDIRECT_ACCESS
+u32 rtw_hal_read_syson_reg(PADAPTER padapter, u32 RegAddr, u32 BitMask)
+{
+	u32 data = 0;
+	if (padapter->hal_func.read_syson_reg)
+		data = padapter->hal_func.read_syson_reg(padapter, RegAddr, BitMask);
+
+	return data;
+}
+
+void rtw_hal_write_syson_reg(_adapter *padapter, u32 RegAddr, u32 BitMask, u32 Data)
+{
+	if (padapter->hal_func.write_syson_reg)
+		padapter->hal_func.write_syson_reg(padapter, RegAddr, BitMask, Data);
+}
+#endif
+
 #if defined(CONFIG_PCI_HCI)
 s32	rtw_hal_interrupt_handler(_adapter *padapter)
 {
@@ -612,6 +775,11 @@ s32	rtw_hal_interrupt_handler(_adapter *padapter)
 	ret = padapter->hal_func.interrupt_handler(padapter);
 	return ret;
 }
+
+void	rtw_hal_unmap_beacon_icf(_adapter *padapter)
+{
+	padapter->hal_func.unmap_beacon_icf(padapter);
+}
 #endif
 #if defined(CONFIG_USB_HCI) && defined(CONFIG_SUPPORT_USB_INT)
 void	rtw_hal_interrupt_handler(_adapter *padapter, u16 pkt_len, u8 *pbuf)
@@ -906,7 +1074,11 @@ s32 c2h_handler(_adapter *adapter, u8 id, u8 seq, u8 plen, u8 *payload)
 		c2h_customer_str_rpt_2_hdl(adapter, payload, plen);
 		break;
 #endif
-
+#ifdef RTW_PER_CMD_SUPPORT_FW
+	case C2H_PER_RATE_RPT:
+		c2h_per_rate_rpt_hdl(adapter, payload, plen);
+		break;
+#endif
 	case C2H_EXTEND:
 		sub_id = payload[0];
 		/* no handle, goto default */
@@ -1042,33 +1214,37 @@ static s32 _rtw_hal_macid_bmp_sleep(_adapter *adapter, struct macid_bmp *bmp, u8
 {
 	struct macid_ctl_t *macid_ctl = adapter_to_macidctl(adapter);
 	u16 reg_sleep;
-	u32 *m = &bmp->m0;
+	u32 m;
 	u8 mid = 0;
 	u32 val32;
 
 	do {
-		if (*m == 0)
-			goto move_next;
-
-		if (mid == 0)
+		if (mid == 0) {
+			m = bmp->m0;
 			reg_sleep = macid_ctl->reg_sleep_m0;
 		#if (MACID_NUM_SW_LIMIT > 32)
-		else if (mid == 1)
+		} else if (mid == 1) {
+			m = bmp->m1;
 			reg_sleep = macid_ctl->reg_sleep_m1;
 		#endif
 		#if (MACID_NUM_SW_LIMIT > 64)
-		else if (mid == 2)
+		} else if (mid == 2) {
+			m = bmp->m2;
 			reg_sleep = macid_ctl->reg_sleep_m2;
 		#endif
 		#if (MACID_NUM_SW_LIMIT > 96)
-		else if (mid == 3)
+		} else if (mid == 3) {
+			m = bmp->m3;
 			reg_sleep = macid_ctl->reg_sleep_m3;
 		#endif
-		else {
+		} else {
 			rtw_warn_on(1);
 			break;
 		}
 
+		if (m == 0)
+			goto move_next;
+
 		if (!reg_sleep) {
 			rtw_warn_on(1);
 			break;
@@ -1077,22 +1253,21 @@ static s32 _rtw_hal_macid_bmp_sleep(_adapter *adapter, struct macid_bmp *bmp, u8
 		val32 = rtw_read32(adapter, reg_sleep);
 		RTW_INFO(ADPT_FMT" %s m%u=0x%08x, ori reg_0x%03x=0x%08x\n"
 			, ADPT_ARG(adapter), sleep ? "sleep" : "wakeup"
-			, mid, *m, reg_sleep, val32);
+			, mid, m, reg_sleep, val32);
 
 		if (sleep) {
-			if ((val32 & *m) == *m)
+			if ((val32 & m) == m)
 				goto move_next;
-			val32 |= *m;
+			val32 |= m;
 		} else {
-			if ((val32 & *m) == 0)
+			if ((val32 & m) == 0)
 				goto move_next;
-			val32 &= ~(*m);
+			val32 &= ~m;
 		}
 
 		rtw_write32(adapter, reg_sleep, val32);
 
 move_next:
-		m++;
 		mid++;
 	} while (mid * 32 < MACID_NUM_SW_LIMIT);
 
@@ -1172,11 +1347,13 @@ void rtw_hal_gpio_multi_func_reset(_adapter *padapter, u8 gpio_num)
 }
 #endif
 
+#ifdef CONFIG_FW_CORRECT_BCN
 void rtw_hal_fw_correct_bcn(_adapter *padapter)
 {
 	if (padapter->hal_func.fw_correct_bcn)
 		padapter->hal_func.fw_correct_bcn(padapter);
 }
+#endif
 
 void rtw_hal_set_tx_power_index(PADAPTER padapter, u32 powerindex, enum rf_path rfpath, u8 rate)
 {
@@ -1469,20 +1646,18 @@ u8 rtw_hal_ops_check(_adapter *padapter)
 	}
 #endif
 
-	if ((IS_HARDWARE_TYPE_8814A(padapter)
-	     || IS_HARDWARE_TYPE_8822BU(padapter) || IS_HARDWARE_TYPE_8822BS(padapter))
+	#ifdef CONFIG_FW_CORRECT_BCN
+	if (IS_HARDWARE_TYPE_8814A(padapter)
 	    && NULL == padapter->hal_func.fw_correct_bcn) {
 		rtw_hal_error_msg("fw_correct_bcn");
 		ret = _FAIL;
 	}
+	#endif
 
-	if (IS_HARDWARE_TYPE_8822B(padapter) || IS_HARDWARE_TYPE_8821C(padapter)) {
-		if (!padapter->hal_func.set_tx_power_index_handler) {
-			rtw_hal_error_msg("set_tx_power_index_handler");
-			ret = _FAIL;
-		}
+	if (!padapter->hal_func.set_tx_power_index_handler) {
+		rtw_hal_error_msg("set_tx_power_index_handler");
+		ret = _FAIL;
 	}
-
 	if (!padapter->hal_func.get_tx_power_index_handler) {
 		rtw_hal_error_msg("get_tx_power_index_handler");
 		ret = _FAIL;
diff --git a/rtl8723DS/hal/hal_mcc.c b/rtl8723DS/hal/hal_mcc.c
index 6651758..179d4d5 100755..100644
--- a/rtl8723DS/hal/hal_mcc.c
+++ b/rtl8723DS/hal/hal_mcc.c
@@ -38,7 +38,6 @@ u8 mcc_switch_channel_policy_table[][7]={
 };
 
 const int mcc_max_policy_num = sizeof(mcc_switch_channel_policy_table) /sizeof(u8) /7;
-struct mi_state mcc_mstate;
 
 static void dump_iqk_val_table(PADAPTER padapter)
 {
@@ -50,50 +49,6 @@ static void dump_iqk_val_table(PADAPTER padapter)
 	u8 backup_reg_idx = 0;
 
 #ifdef CONFIG_MCC_MODE_V2
-	struct PHY_DM_STRUCT *p_dm_odm = &pHalData->odmpriv;
-	struct _IQK_INFORMATION	*p_iqk_info = &p_dm_odm->IQK_info;
-	u8 i = 0, j = 0, k = 0, l =0;
-
-	RTW_INFO("=============dump IQK backup table================\n");
-	for (i = 0; i < 2; i++)
-		RTW_INFO("iqk_channel[%d]=0x%02x\n", i, p_iqk_info->iqk_channel[i]);
-
-	for (i = 0; i < 2; i++) {
-		for (j = 0; j < 2; j++)
-			RTW_INFO("LOK_IDAC[%d][%d]=0x%02x\n", i, j, p_iqk_info->LOK_IDAC[i][j]);
-	}
-
-	for (i = 0; i < 2; i++) {
-		for (j = 0; j < 2; j++) {
-			for (k = 0; k < 2; k++)
-				RTW_INFO("IQK_fail_report[%d][%d][%d]=0x%02x\n", i, j, k, p_iqk_info->IQK_fail_report[i][j][k]);
-		}
-	}
-
-	for (i = 0; i < 2; i++) {
-		for (j = 0; j < 2; j++) {
-			for (k = 0; k < 2; k++) {
-				for (l = 0; l < 8; l++) {
-					RTW_INFO("IQK_CFIR_real[%d][%d][%d][%d]=0x%02x\n",
-						i, j, k, l, p_iqk_info->IQK_CFIR_real[i][j][k][l]);
-				}
-			}
-		}
-	}
-
-	for (i = 0; i < 2; i++) {
-		for (j = 0; j < 2; j++) {
-			for (k = 0; k < 2; k++) {
-				for (l = 0; l < 8; l++) {
-					RTW_INFO("IQK_CFIR_imag[%d][%d][%d][%d]=0x%02x\n",
-						i, j, k, l, p_iqk_info->IQK_CFIR_imag[i][j][k][l]);
-				}
-			}
-		}
-	}
-
-	RTW_INFO("=============================================\n");
-
 #else
 
 	RTW_INFO("=============dump IQK backup table================\n");
@@ -254,6 +209,7 @@ void rtw_hal_mcc_restore_iqk_val(PADAPTER padapter)
 	u8 take_care_iqk = _FALSE;
 	struct dvobj_priv *dvobj = adapter_to_dvobj(padapter);
 	_adapter *iface = NULL;
+	struct mcc_adapter_priv *mccadapriv = NULL;
 	u8 i = 0;
 
 	rtw_hal_get_hwreg(padapter, HW_VAR_CH_SW_NEED_TO_TAKE_CARE_IQK_INFO, &take_care_iqk);
@@ -263,6 +219,10 @@ void rtw_hal_mcc_restore_iqk_val(PADAPTER padapter)
 			if (iface == NULL)
 				continue;
 
+			mccadapriv = &iface->mcc_adapterpriv;
+			if (mccadapriv->role == MCC_ROLE_MAX)
+				continue;
+
 			rtw_hal_ch_sw_iqk_info_restore(iface, CH_SW_USE_CASE_MCC);
 		}
 	}
@@ -406,6 +366,10 @@ static void rtw_hal_mcc_assign_tx_threshold(PADAPTER padapter)
 			break;
 		}
 		break;
+	default:
+		RTW_INFO(FUNC_ADPT_FMT": unknown role = %d\n"
+			, FUNC_ADPT_ARG(padapter), pmccadapriv->role);
+		break;
 	}
 }
 
@@ -425,6 +389,8 @@ static void rtw_hal_config_mcc_role_setting(PADAPTER padapter, u8 order)
 	u8 policy_index = 0;
 	u8 mcc_duration = 0;
 	u8 mcc_interval = 0;
+	u8 starting_ap_num = DEV_AP_STARTING_NUM(pdvobjpriv);
+	u8 ap_num = DEV_AP_NUM(pdvobjpriv);
 
 	policy_index = pmccobjpriv->policy_index;
 	mcc_duration = mcc_switch_channel_policy_table[pmccobjpriv->policy_index][MCC_DURATION_IDX]
@@ -432,8 +398,7 @@ static void rtw_hal_config_mcc_role_setting(PADAPTER padapter, u8 order)
 			- mcc_switch_channel_policy_table[pmccobjpriv->policy_index][MCC_GUARD_OFFSET1_IDX];
 	mcc_interval = mcc_switch_channel_policy_table[pmccobjpriv->policy_index][MCC_INTERVAL_IDX];
 
-	if (MSTATE_AP_STARTING_NUM(&mcc_mstate) == 0
-		&& MSTATE_AP_NUM(&mcc_mstate) == 0) {
+	if (starting_ap_num == 0 && ap_num == 0) {
 		pmccadapriv->order = order;
 
 		if (pmccadapriv->order == 0) {
@@ -570,22 +535,43 @@ static void rtw_hal_clear_mcc_macid(PADAPTER padapter)
 	}
 }
 
-static void rtw_hal_mcc_rqt_tsf(PADAPTER padapter)
+static void rtw_hal_mcc_rqt_tsf(PADAPTER padapter, u64 *out_tsf)
 {
 	struct dvobj_priv *dvobj = adapter_to_dvobj(padapter);
-	struct mcc_obj_priv *pmccobjpriv = &(dvobj->mcc_objpriv);
+	struct mcc_obj_priv *mccobjpriv = &(dvobj->mcc_objpriv);
+	PADAPTER order0_iface = NULL;
+	PADAPTER order1_iface = NULL;
+	struct submit_ctx *tsf_req_sctx = NULL;
+	enum _hw_port tsfx = MAX_HW_PORT;
+	enum _hw_port tsfy = MAX_HW_PORT;
 	u8 cmd[H2C_MCC_RQT_TSF_LEN] = {0};
 
-	rtw_sctx_init(&pmccobjpriv->mcc_tsf_req_sctx, MCC_EXPIRE_TIME);
+	_enter_critical_mutex(&mccobjpriv->mcc_tsf_req_mutex, NULL);
+
+	order0_iface = mccobjpriv->iface[0];
+	order1_iface = mccobjpriv->iface[1];
 
-	SET_H2CCMD_MCC_RQT_TSFX(cmd, pmccobjpriv->iface[0]->hw_port);
-	SET_H2CCMD_MCC_RQT_TSFY(cmd, pmccobjpriv->iface[1]->hw_port);
+	tsf_req_sctx = &mccobjpriv->mcc_tsf_req_sctx;
+	rtw_sctx_init(tsf_req_sctx, MCC_EXPIRE_TIME);
+	mccobjpriv->mcc_tsf_req_sctx_order = 0;
+	tsfx = rtw_hal_get_port(order0_iface);
+	tsfy = rtw_hal_get_port(order1_iface);
+
+	SET_H2CCMD_MCC_RQT_TSFX(cmd, tsfx);
+	SET_H2CCMD_MCC_RQT_TSFY(cmd, tsfy);
 
 	rtw_hal_fill_h2c_cmd(padapter, H2C_MCC_RQT_TSF, H2C_MCC_RQT_TSF_LEN, cmd);
 
-	if (!rtw_sctx_wait(&pmccobjpriv->mcc_tsf_req_sctx, __func__))
+	if (!rtw_sctx_wait(tsf_req_sctx, __func__))
 		RTW_INFO(FUNC_ADPT_FMT": wait for mcc tsf req C2H time out\n", FUNC_ADPT_ARG(padapter));
 
+	if (tsf_req_sctx->status  == RTW_SCTX_DONE_SUCCESS && out_tsf != NULL) {
+		out_tsf[0] = order0_iface->mcc_adapterpriv.tsf;
+		out_tsf[1] = order1_iface->mcc_adapterpriv.tsf;
+	}
+
+
+	_exit_critical_mutex(&mccobjpriv->mcc_tsf_req_mutex, NULL);
 }
 
 static u8 rtw_hal_mcc_check_start_time_is_valid(PADAPTER padapter, u8 case_num,
@@ -725,6 +711,8 @@ static void rtw_hal_mcc_decide_duration(PADAPTER padapter)
 			continue;
 
 		mccadapriv = &iface->mcc_adapterpriv;
+		if (mccadapriv->role == MCC_ROLE_MAX)
+			continue;
 
 		if (is_primary_adapter(iface))
 			mccadapriv->mcc_duration = duration_time;
@@ -738,15 +726,19 @@ static void rtw_hal_mcc_decide_duration(PADAPTER padapter)
 
 static u8 rtw_hal_mcc_update_timing_parameters(PADAPTER padapter, u8 force_update)
 {
+	struct dvobj_priv *dvobj = adapter_to_dvobj(padapter);
 	u8 need_update = _FALSE;
+	u8 starting_ap_num = DEV_AP_STARTING_NUM(dvobj);
+	u8 ap_num = DEV_AP_NUM(dvobj);
+
 
 	/* for STA+STA, modify policy table */
-	if (MSTATE_AP_STARTING_NUM(&mcc_mstate) == 0
-		&& MSTATE_AP_NUM(&mcc_mstate) == 0) {
+	if (starting_ap_num == 0 && ap_num == 0) {
 		struct dvobj_priv *dvobj = adapter_to_dvobj(padapter);
 		struct mcc_obj_priv *pmccobjpriv = &(dvobj->mcc_objpriv);
 		struct mcc_adapter_priv *pmccadapriv = NULL;
 		_adapter *iface = NULL;
+		u64 tsf[MAX_MCC_NUM] = {0};
 		u64 tsf0 = 0, tsf1 = 0;
 		u32 beaconperiod_0 = 0, beaconperiod_1 = 0, tsfdiff = 0;
 		s8 upper_bound_0 = 0, lower_bound_0 = 0;
@@ -756,14 +748,14 @@ static u8 rtw_hal_mcc_update_timing_parameters(PADAPTER padapter, u8 force_updat
 		u8 i = 0;
 		
 		/* query TSF */
-		rtw_hal_mcc_rqt_tsf(padapter);
+		rtw_hal_mcc_rqt_tsf(padapter, tsf);
 
 		/* selecet policy table according TSF diff */
-		tsf0 = pmccobjpriv->iface[0]->mcc_adapterpriv.tsf;
+		tsf0 = tsf[0];
 		beaconperiod_0 = pmccobjpriv->iface[0]->mlmepriv.cur_network.network.Configuration.BeaconPeriod;
 		tsf0 = rtw_modular64(tsf0, (beaconperiod_0 * TU));
 
-		tsf1 = pmccobjpriv->iface[1]->mcc_adapterpriv.tsf;
+		tsf1 = tsf[1];
 		beaconperiod_1 = pmccobjpriv->iface[1]->mlmepriv.cur_network.network.Configuration.BeaconPeriod;
 		tsf1 = rtw_modular64(tsf1, (beaconperiod_1 * TU));
 
@@ -908,6 +900,9 @@ static u8 rtw_hal_mcc_update_timing_parameters(PADAPTER padapter, u8 force_updat
 				continue;
 
 			pmccadapriv = &iface->mcc_adapterpriv;
+			pmccadapriv = &iface->mcc_adapterpriv;
+			if (pmccadapriv->role == MCC_ROLE_MAX)
+				continue;
 #if 0
 			if (pmccadapriv->order == 0) {
 				pmccadapriv->mcc_duration = mcc_duration;
@@ -949,6 +944,7 @@ static u8 rtw_hal_decide_mcc_role(PADAPTER padapter)
 			continue;
 
 		pmccadapriv = &iface->mcc_adapterpriv;
+		pwdinfo = &iface->wdinfo;
 
 		if (MLME_IS_GO(iface))
 			pmccadapriv->role = MCC_ROLE_GO;
@@ -956,28 +952,28 @@ static u8 rtw_hal_decide_mcc_role(PADAPTER padapter)
 			pmccadapriv->role = MCC_ROLE_AP;
 		else if (MLME_IS_GC(iface))
 			pmccadapriv->role = MCC_ROLE_GC;
-		else if (MLME_IS_STA(iface))
-			pmccadapriv->role = MCC_ROLE_STA;
-		else {
-			pwdinfo = &iface->wdinfo;
-			pmlmepriv = &iface->mlmepriv;
-
-			RTW_INFO(FUNC_ADPT_FMT"\n", FUNC_ADPT_ARG(iface));
-			RTW_INFO("Unknown:P2P state:%d, mlme state:0x%2x, mlmext info state:0x%02x\n",
-				pwdinfo->role, pmlmepriv->fw_state, iface->mlmeextpriv.mlmext_info.state);
-			rtw_warn_on(1);
-			ret =  _FAIL;
-			goto exit;
+		else if (MLME_IS_STA(iface)) {
+			if (MLME_IS_LINKING(iface) || MLME_IS_ASOC(iface))
+				pmccadapriv->role = MCC_ROLE_STA;
+			else {
+				/* bypass non-linked/non-linking interface */
+				RTW_INFO(FUNC_ADPT_FMT" mlme state:0x%2x\n",
+					FUNC_ADPT_ARG(iface), MLME_STATE(iface));
+				continue;
+			}
+		} else {
+			/* bypass non-linked/non-linking interface */
+			RTW_INFO(FUNC_ADPT_FMT" P2P Role:%d, mlme state:0x%2x\n",
+				FUNC_ADPT_ARG(iface), pwdinfo->role, MLME_STATE(iface));
+			continue;
 		}
 
-		if (ret == _SUCCESS) {
-			if (padapter == iface) {
-				/* current adapter is order 0 */
-				rtw_hal_config_mcc_role_setting(iface, 0);
-			} else {
-				rtw_hal_config_mcc_role_setting(iface, order);
-				order ++;
-			}
+		if (padapter == iface) {
+			/* current adapter is order 0 */
+			rtw_hal_config_mcc_role_setting(iface, 0);
+		} else {
+			rtw_hal_config_mcc_role_setting(iface, order);
+			order ++;
 		}
 	}
 
@@ -1078,8 +1074,8 @@ u8 rtw_hal_dl_mcc_fw_rsvd_page(_adapter *adapter, u8 *pframe, u16 *index,
 	struct mlme_ext_info *pmlmeinfo = NULL;
 	struct mlme_ext_priv *pmlmeext = NULL;
 	struct hal_com_data *hal = GET_HAL_DATA(adapter);
+	struct mcc_adapter_priv *mccadapriv = NULL;
 	u8 ret = _SUCCESS, i = 0, j  =0, order = 0, CurtPktPageNum = 0;
-	u8 bssid[ETH_ALEN] = {0};
 	u8 *start = NULL;
 	u8 path = RF_PATH_A;
 
@@ -1104,23 +1100,23 @@ u8 rtw_hal_dl_mcc_fw_rsvd_page(_adapter *adapter, u8 *pframe, u16 *index,
 		if (iface == NULL)
 			continue;
 
-		order = iface->mcc_adapterpriv.order;
-		dvobj->mcc_objpriv.mcc_loc_rsvd_paga[order] = *total_page_num;
+		mccadapriv = &iface->mcc_adapterpriv;
+		if (mccadapriv->role == MCC_ROLE_MAX)
+			continue;
 
-		switch (iface->mcc_adapterpriv.role) {
+		order = mccadapriv->order;
+		pmccobjpriv->mcc_loc_rsvd_paga[order] = *total_page_num;
+
+		switch (mccadapriv->role) {
 		case MCC_ROLE_STA:
 		case MCC_ROLE_GC:
 			/* Build NULL DATA */
 			RTW_INFO("LocNull(order:%d): %d\n"
-				, order, dvobj->mcc_objpriv.mcc_loc_rsvd_paga[order]);
+				, order, pmccobjpriv->mcc_loc_rsvd_paga[order]);
 			len = 0;
-			pmlmeext = &iface->mlmeextpriv;
-			pmlmeinfo = &pmlmeext->mlmext_info;
-
-			_rtw_memcpy(bssid, get_my_bssid(&pmlmeinfo->network), ETH_ALEN);
 
 			rtw_hal_construct_NullFunctionData(iface
-				, &pframe[*index], &len, bssid, _FALSE, 0, 0, _FALSE);
+				, &pframe[*index], &len, _FALSE, 0, 0, _FALSE);
 			rtw_hal_fill_fake_txdesc(iface, &pframe[*index-tx_desc],
 				len, _FALSE, _FALSE, _FALSE);
 
@@ -1134,7 +1130,7 @@ u8 rtw_hal_dl_mcc_fw_rsvd_page(_adapter *adapter, u8 *pframe, u16 *index,
 		case MCC_ROLE_AP:
 			/* Bulid CTS */
 			RTW_INFO("LocCTS(order:%d): %d\n"
-				, order, dvobj->mcc_objpriv.mcc_loc_rsvd_paga[order]);
+				, order, pmccobjpriv->mcc_loc_rsvd_paga[order]);
 
 			len = 0;
 			rtw_hal_construct_CTS(iface, &pframe[*index], &len);
@@ -1151,6 +1147,10 @@ u8 rtw_hal_dl_mcc_fw_rsvd_page(_adapter *adapter, u8 *pframe, u16 *index,
 		case MCC_ROLE_GO:
 		/* To DO */
 			break;
+		default:
+			RTW_INFO(FUNC_ADPT_FMT": unknown role = %d\n"
+				, FUNC_ADPT_ARG(iface), mccadapriv->role);
+			break;
 		}
 	}
 
@@ -1177,7 +1177,7 @@ u8 rtw_hal_dl_mcc_fw_rsvd_page(_adapter *adapter, u8 *pframe, u16 *index,
 		_rtw_memset(start, 0, page_size);
 		pmccobjpriv->mcc_pwr_idx_rsvd_page[i] = *total_page_num;
 		RTW_INFO(ADPT_FMT" order:%d, pwr_idx_rsvd_page location[%d]: %d\n",
-			ADPT_ARG(iface), iface->mcc_adapterpriv.order,
+			ADPT_ARG(iface), mccadapriv->order,
 			i, pmccobjpriv->mcc_pwr_idx_rsvd_page[i]);
 
 		total_rate_offset = start;
@@ -1470,12 +1470,17 @@ static void rtw_hal_set_fw_mcc_rsvd_page(PADAPTER padapter)
 	rtw_hal_set_hwreg(port0_iface, HW_VAR_H2C_FW_JOINBSSRPT, (u8 *)(&mstatus));
 
 	/* Re-Download beacon */
-	for (i = 0; i < dvobj->iface_nums; i++) {
+	for (i = 0; i < MAX_MCC_NUM; i++) {
 		iface = pmccobjpriv->iface[i];
+		if (iface == NULL)
+			continue;
+
 		pmccadapriv = &iface->mcc_adapterpriv;
+
 		if (pmccadapriv->role == MCC_ROLE_AP
-			|| pmccadapriv->role == MCC_ROLE_GO)
+			|| pmccadapriv->role == MCC_ROLE_GO) {
 			tx_beacon_hdl(iface, NULL);
+		}
 	}
 }
 
@@ -1513,14 +1518,14 @@ static void rtw_hal_set_mcc_time_setting_cmd(PADAPTER padapter)
 	struct mcc_adapter_priv *pmccadapriv = &padapter->mcc_adapterpriv;
 	struct mlme_priv *pmlmepriv = &(padapter->mlmepriv);
 	struct dvobj_priv *dvobj = adapter_to_dvobj(padapter);
-	struct mcc_obj_priv *pmccobjpriv = &(dvobj->mcc_objpriv);
+	struct mcc_obj_priv *mccobjpriv = &(dvobj->mcc_objpriv);
 	u8 cmd[H2C_MCC_TIME_SETTING_LEN] = {0};
 	u8 fw_eable = 1;
 	u8 swchannel_early_time = MCC_SWCH_FW_EARLY_TIME;
-	
+	u8 starting_ap_num = DEV_AP_STARTING_NUM(dvobj);
+	u8 ap_num = DEV_AP_NUM(dvobj);	
 
-	if (MSTATE_AP_STARTING_NUM(&mcc_mstate) == 0
-		&& MSTATE_AP_NUM(&mcc_mstate) == 0)
+	if (starting_ap_num == 0 && ap_num == 0)
 		/* For STA+GC/STA+STA, TSF of GC/STA does not need to sync from TSF of other STA/GC */
 		fw_eable = 0;
 	else
@@ -1528,12 +1533,22 @@ static void rtw_hal_set_mcc_time_setting_cmd(PADAPTER padapter)
 		fw_eable = 1;
 
 	if (fw_eable == 1) {
-		u8 policy_idx = pmccobjpriv->policy_index;
+		PADAPTER order0_iface = NULL;
+		PADAPTER order1_iface = NULL;
+		u8 policy_idx = mccobjpriv->policy_index;
 		u8 tsf_sync_offset = mcc_switch_channel_policy_table[policy_idx][MCC_TSF_SYNC_OFFSET_IDX];
 		u8 start_time_offset = mcc_switch_channel_policy_table[policy_idx][MCC_START_TIME_OFFSET_IDX];
 		u8 interval = mcc_switch_channel_policy_table[policy_idx][MCC_INTERVAL_IDX];
 		u8 guard_offset0 = mcc_switch_channel_policy_table[policy_idx][MCC_GUARD_OFFSET0_IDX];
 		u8 guard_offset1 = mcc_switch_channel_policy_table[policy_idx][MCC_GUARD_OFFSET1_IDX];
+		enum _hw_port tsf_bsae_port = MAX_HW_PORT;
+		enum _hw_port tsf_sync_port = MAX_HW_PORT;
+		order0_iface = mccobjpriv->iface[0];
+		order1_iface = mccobjpriv->iface[1];
+
+		tsf_bsae_port = rtw_hal_get_port(order1_iface);
+		tsf_sync_port = rtw_hal_get_port(order0_iface);
+		
 		/* FW set enable */
 		SET_H2CCMD_MCC_TIME_SETTING_FW_EN(cmd, fw_eable);
 		/* TSF Sync offset */
@@ -1545,13 +1560,13 @@ static void rtw_hal_set_mcc_time_setting_cmd(PADAPTER padapter)
 		/* Early time to inform driver by C2H before switch channel */
 		SET_H2CCMD_MCC_TIME_SETTING_EARLY_SWITCH_RPT(cmd, swchannel_early_time);
 		/* Port0 sync from Port1, not support multi-port */
-		SET_H2CCMD_MCC_TIME_SETTING_ORDER_BASE(cmd, HW_PORT1);
-		SET_H2CCMD_MCC_TIME_SETTING_ORDER_SYNC(cmd, HW_PORT0);
+		SET_H2CCMD_MCC_TIME_SETTING_ORDER_BASE(cmd, tsf_bsae_port);
+		SET_H2CCMD_MCC_TIME_SETTING_ORDER_SYNC(cmd, tsf_sync_port);
 	} else {
 		/* start time offset */
-		SET_H2CCMD_MCC_TIME_SETTING_START_TIME(cmd, pmccobjpriv->start_time);
+		SET_H2CCMD_MCC_TIME_SETTING_START_TIME(cmd, mccobjpriv->start_time);
 		/* interval */
-		SET_H2CCMD_MCC_TIME_SETTING_INTERVAL(cmd, pmccobjpriv->interval);
+		SET_H2CCMD_MCC_TIME_SETTING_INTERVAL(cmd, mccobjpriv->interval);
 		/* Early time to inform driver by C2H before switch channel */
 		SET_H2CCMD_MCC_TIME_SETTING_EARLY_SWITCH_RPT(cmd, swchannel_early_time);
 	}
@@ -1584,7 +1599,7 @@ static void rtw_hal_set_mcc_IQK_offload_cmd(PADAPTER padapter)
 	u8 rf_path_idx = 0, last_order = MAX_MCC_NUM - 1, last_rf_path_index = total_rf_path - 1;
 
 	/* by order, last order & last_rf_path_index must set ready bit = 1 */
-	for (i = 0; i < dvobj->iface_nums; i++) {
+	for (i = 0; i < MAX_MCC_NUM; i++) {
 		iface = pmccobjpriv->iface[i];
 		if (iface == NULL)
 			continue;
@@ -1666,6 +1681,9 @@ static void rtw_hal_set_mcc_macid_cmd(PADAPTER padapter)
 			continue;
 
 		pmccadapriv = &iface->mcc_adapterpriv;
+		if (pmccadapriv->role == MCC_ROLE_MAX)
+			continue;
+		
 		order = pmccadapriv->order;
 		bitmap = pmccadapriv->mcc_macid_bitmap;
 
@@ -1747,13 +1765,14 @@ static void rtw_hal_set_mcc_ctrl_cmd_v2(PADAPTER padapter, u8 stop)
 	u8 dis_sw_retry = 0, null_early_time=2, tsfx = 0, update_parm = 0;
 	struct dvobj_priv *dvobj = adapter_to_dvobj(padapter);
 	struct mcc_obj_priv *pmccobjpriv = &(dvobj->mcc_objpriv);
+	struct mcc_adapter_priv *mccadapriv = NULL;
 	struct mlme_ext_priv *pmlmeext = NULL;
 	struct mlme_ext_info *pmlmeinfo = NULL;
 	_adapter *iface = NULL;
 
 	RTW_INFO(FUNC_ADPT_FMT": stop=%d\n", FUNC_ADPT_ARG(padapter), stop);
 
-	for (i = 0; i < dvobj->iface_nums; i++) {
+	for (i = 0; i < MAX_MCC_NUM; i++) {
 		iface = pmccobjpriv->iface[i];
 		if (iface == NULL)
 			continue;
@@ -1763,10 +1782,11 @@ static void rtw_hal_set_mcc_ctrl_cmd_v2(PADAPTER padapter, u8 stop)
 				continue;
 		}
 
+		mccadapriv = &iface->mcc_adapterpriv;
+		order = mccadapriv->order;
 
-		order = iface->mcc_adapterpriv.order;
 		if (!stop)
-			totalnum = dvobj->iface_nums;
+			totalnum = MAX_MCC_NUM;
 		else
 			totalnum = 0xff; /* 0xff means stop */
 
@@ -1774,8 +1794,8 @@ static void rtw_hal_set_mcc_ctrl_cmd_v2(PADAPTER padapter, u8 stop)
 		center_ch = rtw_get_center_ch(pmlmeext->cur_channel, pmlmeext->cur_bwmode, pmlmeext->cur_ch_offset);
 		pri_ch_idx = get_pri_ch_idx_by_adapter(center_ch, pmlmeext->cur_channel, pmlmeext->cur_bwmode, pmlmeext->cur_ch_offset);
 		bw = pmlmeext->cur_bwmode;
-		duration = iface->mcc_adapterpriv.mcc_duration;
-		role = iface->mcc_adapterpriv.role;
+		duration = mccadapriv->mcc_duration;
+		role = mccadapriv->role;
 
 		incurch = _FALSE;
 		dis_sw_retry = _TRUE;
@@ -1795,10 +1815,10 @@ static void rtw_hal_set_mcc_ctrl_cmd_v2(PADAPTER padapter, u8 stop)
 			break;
 		}
 
-		null_early_time = iface->mcc_adapterpriv.null_early;
+		null_early_time = mccadapriv->null_early;
 
 		c2hrpt = MCC_C2H_REPORT_ALL_STATUS;
-		tsfx = iface->hw_port;
+		tsfx = rtw_hal_get_port(iface);
 		update_parm = 0;
 
 		SET_H2CCMD_MCC_CTRL_V2_ORDER(cmd, order);
@@ -1841,6 +1861,7 @@ static void rtw_hal_set_mcc_ctrl_cmd_v1(PADAPTER padapter, u8 stop)
 	u8 duration = 0, role = 0, incurch = 0, rfetype = 0, distxnull = 0, c2hrpt = 0, chscan = 0;
 	struct dvobj_priv *dvobj = adapter_to_dvobj(padapter);
 	struct mcc_obj_priv *pmccobjpriv = &(dvobj->mcc_objpriv);
+	struct mcc_adapter_priv *mccadapriv = NULL;
 	struct mlme_ext_priv *pmlmeext = NULL;
 	struct mlme_ext_info *pmlmeinfo = NULL;
 	HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter);
@@ -1848,7 +1869,7 @@ static void rtw_hal_set_mcc_ctrl_cmd_v1(PADAPTER padapter, u8 stop)
 
 	RTW_INFO(FUNC_ADPT_FMT": stop=%d\n", FUNC_ADPT_ARG(padapter), stop);
 
-	for (i = 0; i < dvobj->iface_nums; i++) {
+	for (i = 0; i < MAX_MCC_NUM; i++) {
 		iface = pmccobjpriv->iface[i];
 		if (iface == NULL)
 			continue;
@@ -1858,10 +1879,11 @@ static void rtw_hal_set_mcc_ctrl_cmd_v1(PADAPTER padapter, u8 stop)
 				continue;
 		}
 
+		mccadapriv = &iface->mcc_adapterpriv;
+		order = mccadapriv->order;
 
-		order = iface->mcc_adapterpriv.order;
 		if (!stop)
-			totalnum = dvobj->iface_nums;
+			totalnum = MAX_MCC_NUM;
 		else
 			totalnum = 0xff; /* 0xff means stop */
 
@@ -1883,8 +1905,8 @@ static void rtw_hal_set_mcc_ctrl_cmd_v1(PADAPTER padapter, u8 stop)
 		} else
 			bw80sc = HAL_PRIME_CHNL_OFFSET_DONT_CARE;
 
-		duration = iface->mcc_adapterpriv.mcc_duration;
-		role = iface->mcc_adapterpriv.role;
+		duration = mccadapriv->mcc_duration;
+		role = mccadapriv->role;
 
 		incurch = _FALSE;
 
@@ -1951,6 +1973,60 @@ static void rtw_hal_set_mcc_ctrl_cmd(PADAPTER padapter, u8 stop)
 	#endif
 }
 
+static u8 check_mcc_support(PADAPTER adapter)
+{
+	struct dvobj_priv *dvobj = adapter_to_dvobj(adapter);
+	u8 sta_linking_num = DEV_STA_LG_NUM(dvobj);
+	u8 sta_linked_num = DEV_STA_LD_NUM(dvobj);
+	u8 starting_ap_num = DEV_AP_STARTING_NUM(dvobj);
+	u8 ap_num = DEV_AP_NUM(dvobj);
+	u8 ret = _SUCCESS;
+
+	/* case for linking sta + linked sta  */
+	if ((sta_linking_num + sta_linked_num) != MAX_MCC_NUM) {
+		ret = _FAIL;
+		goto exit;
+	}
+
+	/* case for starting AP + linked sta */
+	if ((starting_ap_num + sta_linked_num) != MAX_MCC_NUM) {
+		ret = _FAIL;
+		goto exit;
+	}
+
+	/* case for linking sta  + started AP */
+	if ((sta_linking_num + ap_num) != MAX_MCC_NUM) {
+		ret = _FAIL;
+		goto exit;
+	}
+
+	/* case for starting AP +  started AP */
+	if ((starting_ap_num + ap_num) != MAX_MCC_NUM) {
+		ret = _FAIL;
+		goto exit;
+	}
+
+exit:
+		return ret;
+}
+
+static void rtw_hal_mcc_start_prehdl(PADAPTER padapter)
+{
+	struct dvobj_priv *dvobj = adapter_to_dvobj(padapter);
+	_adapter *iface = NULL;
+	struct mcc_adapter_priv *mccadapriv = NULL;
+	u8 i = 1;
+
+	for (i = 0; i < dvobj->iface_nums; i++) {
+		iface = dvobj->padapters[i];
+		if (iface == NULL)
+			continue;
+
+		mccadapriv = &iface->mcc_adapterpriv;
+		mccadapriv->role = MCC_ROLE_MAX;
+	}
+}
+
 static u8 rtw_hal_set_mcc_start_setting(PADAPTER padapter, u8 status)
 {
 	u8 ret = _SUCCESS, enable_tsf_auto_sync = _FALSE;
@@ -1963,14 +2039,14 @@ static u8 rtw_hal_set_mcc_start_setting(PADAPTER padapter, u8 status)
 		LeaveAllPowerSaveModeDirect(padapter);
 	}
 
-	if (dvobj->iface_nums > MAX_MCC_NUM) {
-		RTW_INFO("%s: current iface num(%d) > MAX_MCC_NUM(%d)\n", __func__, dvobj->iface_nums, MAX_MCC_NUM);
+	if (check_mcc_support(padapter)) {
+		RTW_INFO("%s: check_mcc_support fail\n", __func__);
+		dump_dvobj_mi_status(RTW_DBGDUMP, __func__, padapter);
 		ret = _FAIL;
 		goto exit;
 	}
 
-	/* update mi_state to decide STA+STA or AP+STA */
-	rtw_mi_status(padapter, &mcc_mstate);
+	rtw_hal_mcc_start_prehdl(padapter);
 
 	/* configure mcc switch channel setting */
 	rtw_hal_config_mcc_switch_channel_setting(padapter);
@@ -2001,8 +2077,13 @@ static u8 rtw_hal_set_mcc_start_setting(PADAPTER padapter, u8 status)
 	/* set mac id to fw */
 	rtw_hal_set_mcc_macid_cmd(padapter);
 
-	/* disable tsf auto sync */
-	rtw_hal_set_hwreg(padapter, HW_VAR_TSF_AUTO_SYNC, &enable_tsf_auto_sync);
+	if (dvobj->p0_tsf.sync_port != MAX_HW_PORT ) {
+		/* disable tsf auto sync */
+		RTW_INFO("[MCC] disable HW TSF sync\n");
+		rtw_hal_set_hwreg(padapter, HW_VAR_TSF_AUTO_SYNC, &enable_tsf_auto_sync);
+	} else {
+		RTW_INFO("[MCC] already disable HW TSF sync\n");
+	}
 
 	/* set mcc parameter  */
 	rtw_hal_set_mcc_ctrl_cmd(padapter, _FALSE);
@@ -2014,7 +2095,9 @@ exit:
 static void rtw_hal_set_mcc_stop_setting(PADAPTER padapter, u8 status)
 {
 	struct dvobj_priv *dvobj = adapter_to_dvobj(padapter);
+	struct mcc_obj_priv *mccobjpriv = &dvobj->mcc_objpriv;
 	_adapter *iface = NULL;
+	struct mcc_adapter_priv *mccadapriv = NULL;
 	u8 i = 0;
 	/*
 	 * when adapter disconnect, stop mcc mod
@@ -2024,10 +2107,13 @@ static void rtw_hal_set_mcc_stop_setting(PADAPTER padapter, u8 status)
 	switch (status) {
 	default:
 		/* let fw switch to other interface channel */
-		for (i = 0; i < dvobj->iface_nums; i++) {
-			iface = dvobj->padapters[i];
+		for (i = 0; i < MAX_MCC_NUM; i++) {
+			iface = mccobjpriv->iface[i];
 			if (iface == NULL)
 				continue;
+
+			mccadapriv = &iface->mcc_adapterpriv;
+
 			/* use other interface to set cmd */
 			if (iface != padapter) {
 				rtw_hal_set_mcc_ctrl_cmd(iface, _TRUE);
@@ -2063,34 +2149,40 @@ static void rtw_hal_mcc_stop_posthdl(PADAPTER padapter)
 {
 	struct dvobj_priv *dvobj = adapter_to_dvobj(padapter);
 	struct mcc_obj_priv *mccobjpriv = &(adapter_to_dvobj(padapter)->mcc_objpriv);
+	struct mcc_adapter_priv *mccadapriv = NULL;
 	_adapter *iface = NULL;
 	PHAL_DATA_TYPE hal;
-	struct PHY_DM_STRUCT *p_dm_odm;
+	struct dm_struct *p_dm_odm;
 	u8 i = 0;
 	u8 enable_rx_bar = _FALSE;
 
-	for (i = 0; i < dvobj->iface_nums; i++) {
-		iface = dvobj->padapters[i];
+	for (i = 0; i < MAX_MCC_NUM; i++) {
+		iface = mccobjpriv->iface[i];
 		if (iface == NULL)
 			continue;
+
 		/* release network queue */
 		rtw_netif_wake_queue(iface->pnetdev);
-		iface->mcc_adapterpriv.mcc_tx_bytes_from_kernel = 0;
-		iface->mcc_adapterpriv.mcc_last_tx_bytes_from_kernel = 0;
-		iface->mcc_adapterpriv.mcc_tx_bytes_to_port = 0;
+		mccadapriv = &iface->mcc_adapterpriv;
+		mccadapriv->mcc_tx_bytes_from_kernel = 0;
+		mccadapriv->mcc_last_tx_bytes_from_kernel = 0;
+		mccadapriv->mcc_tx_bytes_to_port = 0;
 
-		if (iface->mcc_adapterpriv.role == MCC_ROLE_GO)
+		if (mccadapriv->role == MCC_ROLE_GO)
 			rtw_hal_mcc_remove_go_p2p_ie(iface);
 
 #ifdef CONFIG_TDLS
 		if (MLME_IS_STA(iface)) {
-			if (iface->mcc_adapterpriv.backup_tdls_en) {
+			if (mccadapriv->backup_tdls_en) {
 				rtw_enable_tdls_func(iface);
 				RTW_INFO("%s: Disable MCC, Enable TDLS\n", __func__);
-				iface->mcc_adapterpriv.backup_tdls_en = _FALSE;
+				mccadapriv->backup_tdls_en = _FALSE;
 			}
 		}
 #endif /* CONFIG_TDLS */
+
+		mccadapriv->role = MCC_ROLE_MAX;
+		mccobjpriv->iface[i] = NULL;
 	}
 
 	hal = GET_HAL_DATA(padapter);
@@ -2106,9 +2198,10 @@ static void rtw_hal_mcc_start_posthdl(PADAPTER padapter)
 {
 	struct dvobj_priv *dvobj = adapter_to_dvobj(padapter);
 	struct mcc_obj_priv *mccobjpriv = &(adapter_to_dvobj(padapter)->mcc_objpriv);
+	struct mcc_adapter_priv *mccadapriv = NULL;
 	_adapter *iface = NULL;
 	PHAL_DATA_TYPE hal;
-	struct PHY_DM_STRUCT *p_dm_odm;
+	struct dm_struct *p_dm_odm;
 	struct _hal_rf_ *p_rf;
 	u32 support_ability = 0;
 	u8 i = 0;
@@ -2118,14 +2211,19 @@ static void rtw_hal_mcc_start_posthdl(PADAPTER padapter)
 		iface = dvobj->padapters[i];
 		if (iface == NULL)
 			continue;
-		iface->mcc_adapterpriv.mcc_tx_bytes_from_kernel = 0;
-		iface->mcc_adapterpriv.mcc_last_tx_bytes_from_kernel = 0;
-		iface->mcc_adapterpriv.mcc_tx_bytes_to_port = 0;
+
+		mccadapriv = &iface->mcc_adapterpriv;
+		if (mccadapriv->role == MCC_ROLE_MAX)
+			continue;
+		
+		mccadapriv->mcc_tx_bytes_from_kernel = 0;
+		mccadapriv->mcc_last_tx_bytes_from_kernel = 0;
+		mccadapriv->mcc_tx_bytes_to_port = 0;
 
 #ifdef CONFIG_TDLS
 		if (MLME_IS_STA(iface)) {
 			if (rtw_is_tdls_enabled(iface)) {
-				iface->mcc_adapterpriv.backup_tdls_en = _TRUE;
+				mccadapriv->backup_tdls_en = _TRUE;
 				rtw_disable_tdls_func(iface, _TRUE);
 				RTW_INFO("%s: Enable MCC, Disable TDLS\n", __func__);
 			}
@@ -2237,6 +2335,9 @@ static void rtw_hal_mcc_sw_ch_fw_notify_hdl(PADAPTER padapter)
 
 	for (i = 0; i < iface_num; i++) {
 		iface = pdvobjpriv->padapters[i];
+		if (iface == NULL)
+			continue;
+
 		if (cur_op_ch == iface->mlmeextpriv.cur_channel) {
 			cur_iface = iface;
 			cur_mccadapriv = &cur_iface->mcc_adapterpriv;
@@ -2332,6 +2433,9 @@ static void rtw_hal_mcc_update_noa_start_time_hdl(PADAPTER padapter, u8 buflen,
 			continue;
 		
 		pmccadapriv = &iface->mcc_adapterpriv;
+		if (pmccadapriv->role == MCC_ROLE_MAX)
+			continue;
+
 		/* GO & channel match */
 		if (pmccadapriv->role == MCC_ROLE_GO) {
 			/* convert GO TBTT from FW to noa_start_time(TU convert to mircosecond) */
@@ -2359,27 +2463,27 @@ static void rtw_hal_mcc_update_noa_start_time_hdl(PADAPTER padapter, u8 buflen,
 
 static void rtw_hal_mcc_rpt_tsf_hdl(PADAPTER padapter, u8 buflen, u8 *tmpBuf)
 {
-	struct dvobj_priv *pdvobjpriv = adapter_to_dvobj(padapter);
-	struct mcc_obj_priv *pmccobjpriv = &(adapter_to_dvobj(padapter)->mcc_objpriv);
-	struct submit_ctx *mcc_tsf_req_sctx = &pmccobjpriv->mcc_tsf_req_sctx;
-	struct mcc_adapter_priv *pmccadapriv = NULL;
-	u8 iface_num = pdvobjpriv->iface_nums;
-	static u8 order = 0;
+	struct dvobj_priv *dvobjpriv = adapter_to_dvobj(padapter);
+	struct mcc_obj_priv *mccobjpriv = &(adapter_to_dvobj(padapter)->mcc_objpriv);
+	struct submit_ctx *mcc_tsf_req_sctx = &mccobjpriv->mcc_tsf_req_sctx;
+	struct mcc_adapter_priv *mccadapriv = NULL;
+	_adapter *iface = NULL;
+	u8 order = 0;
 
-	pmccadapriv = &pmccobjpriv->iface[order]->mcc_adapterpriv;
-	pmccadapriv->tsf = RTW_GET_LE64(tmpBuf + 2);
+	order = mccobjpriv->mcc_tsf_req_sctx_order;
+	iface = mccobjpriv->iface[order];
+	mccadapriv = &iface->mcc_adapterpriv;
+	mccadapriv->tsf = RTW_GET_LE64(tmpBuf + 2);
 
 
-	if (0) {
-		RTW_INFO("TSF(order:%d):%llu\n", pmccadapriv->order, pmccadapriv->tsf);
-	}
+	if (0)
+		RTW_INFO(FUNC_ADPT_FMT" TSF(order:%d):0x%02llx\n", FUNC_ADPT_ARG(iface), mccadapriv->order, mccadapriv->tsf);
 
-	if (pmccadapriv->order == (iface_num - 1)) {
+	if (mccadapriv->order == (MAX_MCC_NUM - 1))
 		rtw_sctx_done(&mcc_tsf_req_sctx);
-		order = 0;
-	} else
-		order ++;
-		
+	else
+		mccobjpriv->mcc_tsf_req_sctx_order ++;
+
 }
 
 /**
@@ -2441,7 +2545,7 @@ void rtw_hal_mcc_c2h_handler(PADAPTER padapter, u8 buflen, u8 *tmpBuf)
 		pmccobjpriv->mcc_tolerance_time = MCC_TOLERANCE_TIME;
 		_exit_critical_bh(&pmccobjpriv->mcc_lock, &irqL);
 
-		RTW_INFO("[MCC] MCC ready (time:%d)\n", pmccobjpriv->mcc_launch_time);
+		RTW_INFO("[MCC] MCC ready\n");
 		rtw_sctx_done(&mcc_sctx);
 		break;
 	case MCC_RPT_SWICH_CHANNEL_NOTIFY:
@@ -2464,13 +2568,12 @@ void rtw_hal_mcc_c2h_handler(PADAPTER padapter, u8 buflen, u8 *tmpBuf)
 void rtw_hal_mcc_update_parameter(PADAPTER padapter, u8 force_update)
 {	
 	struct dvobj_priv *dvobj = adapter_to_dvobj(padapter);
-	struct mcc_obj_priv *pmccobjpriv = &(dvobj->mcc_objpriv);
+	struct mcc_obj_priv *mccobjpriv = &(dvobj->mcc_objpriv);
 	u8 cmd[H2C_MCC_TIME_SETTING_LEN] = {0};
 	u8 swchannel_early_time = MCC_SWCH_FW_EARLY_TIME;
+	u8 ap_num = DEV_AP_NUM(dvobj);	
 
-	rtw_mi_status(padapter, &mcc_mstate);
-
-	if (MSTATE_AP_NUM(&mcc_mstate) == 0) {
+	if (ap_num == 0) {
 		u8 need_update = _FALSE;
 		u8 start_time_offset = 0, interval = 0, duration = 0;
 
@@ -2479,9 +2582,9 @@ void rtw_hal_mcc_update_parameter(PADAPTER padapter, u8 force_update)
 		if (need_update == _FALSE)
 			return;
 		
-		start_time_offset = pmccobjpriv->start_time;
-		interval = pmccobjpriv->interval;
-		duration = pmccobjpriv->iface[0]->mcc_adapterpriv.mcc_duration;
+		start_time_offset = mccobjpriv->start_time;
+		interval = mccobjpriv->interval;
+		duration = mccobjpriv->iface[0]->mcc_adapterpriv.mcc_duration;
 
 		SET_H2CCMD_MCC_TIME_SETTING_START_TIME(cmd, start_time_offset);
 		SET_H2CCMD_MCC_TIME_SETTING_INTERVAL(cmd, interval);
@@ -2489,7 +2592,9 @@ void rtw_hal_mcc_update_parameter(PADAPTER padapter, u8 force_update)
 		SET_H2CCMD_MCC_TIME_SETTING_UPDATE(cmd, _TRUE);
 		SET_H2CCMD_MCC_TIME_SETTING_ORDER0_DURATION(cmd, duration);
 	} else {
-		u8 policy_idx = pmccobjpriv->policy_index;
+		PADAPTER order0_iface = NULL;
+		PADAPTER order1_iface = NULL;
+		u8 policy_idx = mccobjpriv->policy_index;
 		u8 duration = mcc_switch_channel_policy_table[policy_idx][MCC_DURATION_IDX];
 		u8 tsf_sync_offset = mcc_switch_channel_policy_table[policy_idx][MCC_TSF_SYNC_OFFSET_IDX];
 		u8 start_time_offset = mcc_switch_channel_policy_table[policy_idx][MCC_START_TIME_OFFSET_IDX];
@@ -2498,12 +2603,20 @@ void rtw_hal_mcc_update_parameter(PADAPTER padapter, u8 force_update)
 		u8 guard_offset1 = mcc_switch_channel_policy_table[policy_idx][MCC_GUARD_OFFSET1_IDX];
 		u8 order0_duration = 0;
 		u8 i = 0;
+		enum _hw_port tsf_bsae_port = MAX_HW_PORT;
+		enum _hw_port tsf_sync_port = MAX_HW_PORT;
 
 		RTW_INFO("%s: policy_idx=%d\n", __func__, policy_idx);
 
+		order0_iface = mccobjpriv->iface[0];
+		order1_iface = mccobjpriv->iface[1];
+
 		/* GO/AP is order 0, GC/STA is order 1 */
-		order0_duration = pmccobjpriv->iface[0]->mcc_adapterpriv.mcc_duration = interval - duration;
-		pmccobjpriv->iface[1]->mcc_adapterpriv.mcc_duration = duration;
+		order0_duration = order0_iface->mcc_adapterpriv.mcc_duration = interval - duration;
+		order0_iface->mcc_adapterpriv.mcc_duration = duration;
+
+		tsf_bsae_port = rtw_hal_get_port(order1_iface);
+		tsf_sync_port = rtw_hal_get_port(order0_iface);
 
 		/* update IE */
 		for (i = 0; i < dvobj->iface_nums; i++) {
@@ -2515,7 +2628,7 @@ void rtw_hal_mcc_update_parameter(PADAPTER padapter, u8 force_update)
 				continue;
 		
 			mccadapriv = &iface->mcc_adapterpriv;
-			if (mccadapriv == NULL)
+			if (mccadapriv->role == MCC_ROLE_MAX)
 				continue;
 			
 			if (mccadapriv->role == MCC_ROLE_GO)
@@ -2534,8 +2647,8 @@ void rtw_hal_mcc_update_parameter(PADAPTER padapter, u8 force_update)
 		/* Early time to inform driver by C2H before switch channel */
 		SET_H2CCMD_MCC_TIME_SETTING_EARLY_SWITCH_RPT(cmd, swchannel_early_time);
 		/* Port0 sync from Port1, not support multi-port */
-		SET_H2CCMD_MCC_TIME_SETTING_ORDER_BASE(cmd, HW_PORT1);
-		SET_H2CCMD_MCC_TIME_SETTING_ORDER_SYNC(cmd, HW_PORT0);
+		SET_H2CCMD_MCC_TIME_SETTING_ORDER_BASE(cmd, tsf_bsae_port);
+		SET_H2CCMD_MCC_TIME_SETTING_ORDER_SYNC(cmd, tsf_sync_port);
 		SET_H2CCMD_MCC_TIME_SETTING_UPDATE(cmd, _TRUE);
 		SET_H2CCMD_MCC_TIME_SETTING_ORDER0_DURATION(cmd, order0_duration);
 	}
@@ -2552,20 +2665,20 @@ void rtw_hal_mcc_sw_status_check(PADAPTER padapter)
 	struct dvobj_priv *dvobj = adapter_to_dvobj(padapter);
 	struct mcc_obj_priv *pmccobjpriv = &(dvobj->mcc_objpriv);
 	struct pwrctrl_priv	*pwrpriv = dvobj_to_pwrctl(dvobj);
+	struct mcc_adapter_priv *mccadapriv = NULL;
 	_adapter *iface = NULL;
 	u8 cur_cnt = 0, prev_cnt = 0, diff_cnt = 0, check_ret = _FAIL, threshold = 0;
 	u8 policy_idx = pmccobjpriv->policy_index;
 	u8 noa_enable = _FALSE;
 	u8 i = 0;
 	_irqL irqL;
+	u8 ap_num = DEV_AP_NUM(dvobj);	
 
 /* #define MCC_RESTART 1 */
 
 	if (!MCC_EN(padapter))
 		return;
 
-	rtw_mi_status(padapter, &mcc_mstate);
-
 	_enter_critical_mutex(&pmccobjpriv->mcc_mutex, NULL);
 
 	if (rtw_hal_check_mcc_status(padapter, MCC_STATUS_DOING_MCC)) {
@@ -2573,13 +2686,20 @@ void rtw_hal_mcc_sw_status_check(PADAPTER padapter)
 		/* check noa enable or not */
 		for (i = 0; i < dvobj->iface_nums; i++) {
 			iface = dvobj->padapters[i];
+			if (iface == NULL)
+				continue;
+
+			mccadapriv = &iface->mcc_adapterpriv;
+			if (mccadapriv->role == MCC_ROLE_MAX)
+				continue;
+			
 			if (iface->wdinfo.p2p_ps_mode == P2P_PS_NOA) {
 				noa_enable = _TRUE;
 				break;
 			}
 		}		
 
-		if (!noa_enable && MSTATE_AP_NUM(&mcc_mstate) == 0)
+		if (!noa_enable && ap_num == 0)
 			rtw_hal_mcc_update_parameter(padapter, _FALSE);
 
 		threshold = pmccobjpriv->mcc_stop_threshold;
@@ -2645,10 +2765,11 @@ void rtw_hal_mcc_sw_status_check(PADAPTER padapter)
  */
 u8 rtw_hal_mcc_change_scan_flag(PADAPTER padapter, u8 *ch, u8 *bw, u8 *offset)
 {
-	u8 need_ch_setting_union = _TRUE, i = 0, flags = 0, role = 0;
+	u8 need_ch_setting_union = _TRUE, i = 0, flags = 0, back_op = _FALSE;
 	struct dvobj_priv *dvobj = adapter_to_dvobj(padapter);
-	struct mcc_adapter_priv *pmccadapriv = NULL;
-	struct mlme_ext_priv *pmlmeext = NULL;
+	struct mcc_adapter_priv *mccadapriv = NULL;
+	struct mlme_ext_priv *mlmeext = NULL;
+	_adapter *iface = NULL;
 
 	if (!MCC_EN(padapter))
 		goto exit;
@@ -2656,47 +2777,45 @@ u8 rtw_hal_mcc_change_scan_flag(PADAPTER padapter, u8 *ch, u8 *bw, u8 *offset)
 	if (!rtw_hal_check_mcc_status(padapter, MCC_STATUS_NEED_MCC))
 		goto exit;
 
-	for (i = 0; i < dvobj->iface_nums; i++) {
-		if (!dvobj->padapters[i])
-				continue;
-
-		pmlmeext = &dvobj->padapters[i]->mlmeextpriv;
-		pmccadapriv = &dvobj->padapters[i]->mcc_adapterpriv;
-		role = pmccadapriv->role;
+	/* disable PS_ANNC & TX_RESUME for all interface */
+	/* ToDo: TX_RESUME by interface in SCAN_BACKING_OP */
+	mlmeext = &padapter->mlmeextpriv;
+	
+	flags = mlmeext_scan_backop_flags(mlmeext);
+	if (mlmeext_chk_scan_backop_flags(mlmeext, SS_BACKOP_PS_ANNC))
+		flags &= ~SS_BACKOP_PS_ANNC;
 
-		switch (role) {
-		case MCC_ROLE_AP:
-		case MCC_ROLE_GO:
-			*ch = pmlmeext->cur_channel;
-			*bw = pmlmeext->cur_bwmode;
-			*offset = pmlmeext->cur_ch_offset;
-			need_ch_setting_union = _FALSE;
-			break;
-		case MCC_ROLE_STA:
-		case MCC_ROLE_GC:
-			if (dvobj->padapters[i] != padapter) {
-				*ch = pmlmeext->cur_channel;
-				*bw = pmlmeext->cur_bwmode;
-				*offset = pmlmeext->cur_ch_offset;
-				need_ch_setting_union = _FALSE;
-			}
-			break;
-		default:
-			RTW_INFO("unknown role\n");
-			rtw_warn_on(1);
-			break;
-		}
+	if (mlmeext_chk_scan_backop_flags(mlmeext, SS_BACKOP_TX_RESUME))
+		flags &= ~SS_BACKOP_TX_RESUME;
 
-		/* check other scan flag */
-		flags = mlmeext_scan_backop_flags(pmlmeext);
-		if (mlmeext_chk_scan_backop_flags(pmlmeext, SS_BACKOP_PS_ANNC))
-			flags &= ~SS_BACKOP_PS_ANNC;
+	mlmeext_assign_scan_backop_flags(mlmeext, flags);
 
-		if (mlmeext_chk_scan_backop_flags(pmlmeext, SS_BACKOP_TX_RESUME))
-			flags &= ~SS_BACKOP_TX_RESUME;
+	for (i = 0; i < dvobj->iface_nums; i++) {
+		iface = dvobj->padapters[i];
+		if (!iface)
+			continue;
 
-		mlmeext_assign_scan_backop_flags(pmlmeext, flags);
+		mlmeext = &iface->mlmeextpriv;
 
+		if (MLME_IS_GO(iface) || MLME_IS_AP(iface))
+			back_op = _TRUE;
+		else if (MLME_IS_GC(iface) && (iface != padapter))
+			/* switch to another linked interface(GO) to receive beacon to avoid no beacon disconnect */
+			back_op = _TRUE;
+		else if (MLME_IS_STA(iface) && MLME_IS_ASOC(iface) && (iface != padapter))
+			/* switch to another linked interface(STA) to receive beacon to avoid no beacon disconnect  */
+			back_op = _TRUE;
+		else {
+			/* bypass non-linked/non-linking interface/scan interface */
+			continue;
+		}
+		
+		if (back_op) {
+			*ch = mlmeext->cur_channel;
+			*bw = mlmeext->cur_bwmode;
+			*offset = mlmeext->cur_ch_offset;
+			need_ch_setting_union = _FALSE;
+		}
 	}
 exit:
 	return need_ch_setting_union;
@@ -2769,6 +2888,7 @@ inline u8 rtw_hal_mcc_stop_tx_bytes_to_port(PADAPTER padapter)
 static void rtw_hal_mcc_assign_scan_flag(PADAPTER padapter, u8 scan_done)
 {
 	struct dvobj_priv *dvobj = adapter_to_dvobj(padapter);
+	struct mcc_adapter_priv *mccadapriv = NULL;
 	_adapter *iface = NULL;
 	struct mlme_ext_priv *pmlmeext = NULL;
 	u8 i = 0, flags;
@@ -2778,6 +2898,13 @@ static void rtw_hal_mcc_assign_scan_flag(PADAPTER padapter, u8 scan_done)
 
 	for (i = 0; i < dvobj->iface_nums; i++) {
 		iface = dvobj->padapters[i];
+		if (iface == NULL)
+			continue;
+
+		mccadapriv = &iface->mcc_adapterpriv;
+		if (mccadapriv->role == MCC_ROLE_MAX)
+			continue;
+
 		pmlmeext = &iface->mlmeextpriv;
 		if (is_client_associated_to_ap(iface)) {
 			flags = mlmeext_scan_backop_flags_sta(pmlmeext);
@@ -2997,38 +3124,45 @@ static void rtw_hal_mcc_dump_noa_content(void *sel, PADAPTER padapter)
 
 void rtw_hal_dump_mcc_info(void *sel, struct dvobj_priv *dvobj)
 {
-	struct mcc_obj_priv *pmccobjpriv = &(dvobj->mcc_objpriv);
-	struct mcc_adapter_priv *pmccadapriv = NULL;
+	struct mcc_obj_priv *mccobjpriv = &(dvobj->mcc_objpriv);
+	struct mcc_adapter_priv *mccadapriv = NULL;
 	_adapter *iface = NULL, *adapter = NULL;
 	struct registry_priv *regpriv = NULL;
+	u64 tsf[MAX_MCC_NUM] = {0};
 	u8 i = 0;
 
 	/* regpriv is common for all adapter */
-	adapter = dvobj->padapters[IFACE_ID0];
+	adapter = dvobj_get_primary_adapter(dvobj);
 
 	RTW_PRINT_SEL(sel, "**********************************************\n");
 	RTW_PRINT_SEL(sel, "en_mcc:%d\n", MCC_EN(adapter));
 	RTW_PRINT_SEL(sel, "primary adapter("ADPT_FMT") duration:%d%c\n",
-		ADPT_ARG(dvobj_get_primary_adapter(dvobj)), pmccobjpriv->duration, 37);
-	RTW_PRINT_SEL(sel, "runtime duration:%s\n", pmccobjpriv->enable_runtime_duration ? "enable":"disable");
+		ADPT_ARG(dvobj_get_primary_adapter(dvobj)), mccobjpriv->duration, 37);
+	RTW_PRINT_SEL(sel, "runtime duration:%s\n", mccobjpriv->enable_runtime_duration ? "enable":"disable");
+
+	rtw_hal_mcc_rqt_tsf(dvobj_get_primary_adapter(dvobj), tsf);
+
 	for (i = 0; i < dvobj->iface_nums; i++) {
 		iface = dvobj->padapters[i];
 		if (!iface)
 			continue;
 
 		regpriv = &iface->registrypriv;
-		pmccadapriv = &iface->mcc_adapterpriv;
-		if (pmccadapriv) {
+		mccadapriv = &iface->mcc_adapterpriv;
+		if (mccadapriv->role == MCC_ROLE_MAX)
+			continue;
+
+		if (mccadapriv) {
 			u8 p2p_ps_mode = iface->wdinfo.p2p_ps_mode;
 
 			RTW_PRINT_SEL(sel, "adapter mcc info:\n");
 			RTW_PRINT_SEL(sel, "ifname:%s\n", ADPT_ARG(iface));
-			RTW_PRINT_SEL(sel, "order:%d\n", pmccadapriv->order);
-			RTW_PRINT_SEL(sel, "duration:%d\n", pmccadapriv->mcc_duration);
-			RTW_PRINT_SEL(sel, "target tx bytes:%d\n", pmccadapriv->mcc_target_tx_bytes_to_port);
-			RTW_PRINT_SEL(sel, "current TP:%d\n", pmccadapriv->mcc_tp);
-			RTW_PRINT_SEL(sel, "mgmt queue macid:%d\n", pmccadapriv->mgmt_queue_macid);
-			RTW_PRINT_SEL(sel, "macid bitmap:0x%02x\n", pmccadapriv->mcc_macid_bitmap);
+			RTW_PRINT_SEL(sel, "order:%d\n", mccadapriv->order);
+			RTW_PRINT_SEL(sel, "duration:%d\n", mccadapriv->mcc_duration);
+			RTW_PRINT_SEL(sel, "target tx bytes:%d\n", mccadapriv->mcc_target_tx_bytes_to_port);
+			RTW_PRINT_SEL(sel, "current TP:%d\n", mccadapriv->mcc_tp);
+			RTW_PRINT_SEL(sel, "mgmt queue macid:%d\n", mccadapriv->mgmt_queue_macid);
+			RTW_PRINT_SEL(sel, "macid bitmap:0x%02x\n", mccadapriv->mcc_macid_bitmap);
 			RTW_PRINT_SEL(sel, "P2P NoA:%s\n\n", p2p_ps_mode == P2P_PS_NOA ? "enable":"disable");
 			RTW_PRINT_SEL(sel, "registry data:\n");
 			RTW_PRINT_SEL(sel, "ap target tx TP(BW:20M):%d Mbps\n", regpriv->rtw_mcc_ap_bw20_target_tx_tp);
@@ -3038,13 +3172,14 @@ void rtw_hal_dump_mcc_info(void *sel, struct dvobj_priv *dvobj)
 			RTW_PRINT_SEL(sel, "sta target tx TP(BW:40M ):%d Mbps\n", regpriv->rtw_mcc_sta_bw40_target_tx_tp);
 			RTW_PRINT_SEL(sel, "sta target tx TP(BW:80M):%d Mbps\n", regpriv->rtw_mcc_sta_bw80_target_tx_tp);
 			RTW_PRINT_SEL(sel, "single tx criteria:%d Mbps\n", regpriv->rtw_mcc_single_tx_cri);
+			RTW_PRINT_SEL(sel, "HW TSF=0x%llx\n", tsf[mccadapriv->order]);
 			if (MLME_IS_GO(iface))
 				rtw_hal_mcc_dump_noa_content(sel, iface);
 			RTW_PRINT_SEL(sel, "**********************************************\n");
 		}
 	}
 	RTW_PRINT_SEL(sel, "------------------------------------------\n");
-	RTW_PRINT_SEL(sel, "policy index:%d\n", pmccobjpriv->policy_index);
+	RTW_PRINT_SEL(sel, "policy index:%d\n", mccobjpriv->policy_index);	
 	RTW_PRINT_SEL(sel, "------------------------------------------\n");
 	RTW_PRINT_SEL(sel, "define data:\n");
 	RTW_PRINT_SEL(sel, "ap target tx TP(BW:20M):%d Mbps\n", MCC_AP_BW20_TARGET_TX_TP);
diff --git a/rtl8723DS/hal/hal_mp.c b/rtl8723DS/hal/hal_mp.c
index e352b69..1af9de3 100755..100644
--- a/rtl8723DS/hal/hal_mp.c
+++ b/rtl8723DS/hal/hal_mp.c
@@ -42,9 +42,18 @@
 	#ifdef CONFIG_RTL8723D
 		#include <rtl8723d_hal.h>
 	#endif
+	#ifdef CONFIG_RTL8710B
+		#include <rtl8710b_hal.h>
+	#endif
 	#ifdef CONFIG_RTL8188F
 		#include <rtl8188f_hal.h>
 	#endif
+	#ifdef CONFIG_RTL8188GTV
+		#include <rtl8188gtv_hal.h>
+	#endif
+	#ifdef CONFIG_RTL8192F
+		#include <rtl8192f_hal.h>
+	#endif
 #endif /* !RTW_HALMAC */
 
 
@@ -105,7 +114,7 @@ void hal_mpt_SwitchRfSetting(PADAPTER	pAdapter)
 s32 hal_mpt_SetPowerTracking(PADAPTER padapter, u8 enable)
 {
 	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(padapter);
-	struct PHY_DM_STRUCT		*pDM_Odm = &(pHalData->odmpriv);
+	struct dm_struct		*pDM_Odm = &(pHalData->odmpriv);
 
 
 	if (!netif_running(padapter->pnetdev)) {
@@ -126,7 +135,7 @@ s32 hal_mpt_SetPowerTracking(PADAPTER padapter, u8 enable)
 void hal_mpt_GetPowerTracking(PADAPTER padapter, u8 *enable)
 {
 	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(padapter);
-	struct PHY_DM_STRUCT		*pDM_Odm = &(pHalData->odmpriv);
+	struct dm_struct		*pDM_Odm = &(pHalData->odmpriv);
 
 
 	*enable = pDM_Odm->rf_calibrate_info.txpowertrack_control;
@@ -145,7 +154,8 @@ void hal_mpt_CCKTxPowerAdjust(PADAPTER Adapter, BOOLEAN bInCH14)
 	u1Byte				DataRate = 0xFF;
 
 	/* Do not modify CCK TX filter parameters for 8822B*/
-	if(IS_HARDWARE_TYPE_8822B(Adapter) || IS_HARDWARE_TYPE_8821C(Adapter) || IS_HARDWARE_TYPE_8723D(Adapter))
+	if(IS_HARDWARE_TYPE_8822B(Adapter) || IS_HARDWARE_TYPE_8821C(Adapter) ||
+		IS_HARDWARE_TYPE_8723D(Adapter) || IS_HARDWARE_TYPE_8192F(Adapter))
 		return;
 
 	DataRate = mpt_to_mgnt_rate(ulRateIdx);
@@ -183,7 +193,7 @@ void hal_mpt_CCKTxPowerAdjust(PADAPTER Adapter, BOOLEAN bInCH14)
 					     pHalData->RegForRecover[i].value);
 			}
 		}
-	} else if (IS_HARDWARE_TYPE_8188F(Adapter)) {
+	} else if (IS_HARDWARE_TYPE_8188F(Adapter) || IS_HARDWARE_TYPE_8188GTV(Adapter)) {
 		/* get current cck swing value and check 0xa22 & 0xa23 later to match the table.*/
 		CurrCCKSwingVal = read_bbreg(Adapter, rCCK0_TxFilter1, bMaskHWord);
 		CCKSwingIndex = 20; /* default index */
@@ -310,7 +320,7 @@ void hal_mpt_SetChannel(PADAPTER pAdapter)
 {
 	enum rf_path eRFPath;
 	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(pAdapter);
-	struct PHY_DM_STRUCT		*pDM_Odm = &(pHalData->odmpriv);
+	struct dm_struct		*pDM_Odm = &(pHalData->odmpriv);
 	struct mp_priv	*pmp = &pAdapter->mppriv;
 	u8		channel = pmp->channel;
 	u8		bandwidth = pmp->bandwidth;
@@ -319,9 +329,18 @@ void hal_mpt_SetChannel(PADAPTER pAdapter)
 
 	pHalData->bSwChnl = _TRUE;
 	pHalData->bSetChnlBW = _TRUE;
-	rtw_hal_set_chnl_bw(pAdapter, channel, bandwidth, 0, 0);
+
+#ifdef CONFIG_RTL8822B
+	if (bandwidth == 2) {
+		rtw_hal_set_chnl_bw(pAdapter, channel, bandwidth, HAL_PRIME_CHNL_OFFSET_LOWER, HAL_PRIME_CHNL_OFFSET_UPPER);
+	} else if (bandwidth == 1) {
+		rtw_hal_set_chnl_bw(pAdapter, channel, bandwidth, HAL_PRIME_CHNL_OFFSET_UPPER, 0);
+	} else
+#endif
+		rtw_hal_set_chnl_bw(pAdapter, channel, bandwidth, pmp->prime_channel_offset, 0);
 
 	hal_mpt_CCKTxPowerAdjust(pAdapter, pHalData->bCCKinCH14);
+	rtw_btcoex_wifionly_scan_notify(pAdapter);
 
 }
 
@@ -339,9 +358,19 @@ void hal_mpt_SetBandwidth(PADAPTER pAdapter)
 
 	pHalData->bSwChnl = _TRUE;
 	pHalData->bSetChnlBW = _TRUE;
-	rtw_hal_set_chnl_bw(pAdapter, channel, bandwidth, 0, 0);
+
+#ifdef CONFIG_RTL8822B
+	if (bandwidth == 2) {
+		rtw_hal_set_chnl_bw(pAdapter, channel, bandwidth, HAL_PRIME_CHNL_OFFSET_LOWER, HAL_PRIME_CHNL_OFFSET_UPPER);
+	} else if (bandwidth == 1) {
+		rtw_hal_set_chnl_bw(pAdapter, channel, bandwidth, HAL_PRIME_CHNL_OFFSET_UPPER, 0);
+	} else
+#endif
+		rtw_hal_set_chnl_bw(pAdapter, channel, bandwidth, pmp->prime_channel_offset, 0);
 
 	hal_mpt_SwitchRfSetting(pAdapter);
+	rtw_btcoex_wifionly_scan_notify(pAdapter);
+
 }
 
 void mpt_SetTxPower_Old(PADAPTER pAdapter, MPT_TXPWR_DEF Rate, u8 *pTxPower)
@@ -416,7 +445,8 @@ mpt_SetTxPower(
 
 	if (IS_HARDWARE_TYPE_8814A(pAdapter))
 		EndPath = RF_PATH_D;
-	else if (IS_HARDWARE_TYPE_8188F(pAdapter) || IS_HARDWARE_TYPE_8723D(pAdapter) || IS_HARDWARE_TYPE_8821C(pAdapter))
+	else if (IS_HARDWARE_TYPE_8188F(pAdapter) || IS_HARDWARE_TYPE_8188GTV(pAdapter)
+		|| IS_HARDWARE_TYPE_8723D(pAdapter) || IS_HARDWARE_TYPE_8821C(pAdapter))
 		EndPath = RF_PATH_A;
 
 	switch (Rate) {
@@ -501,14 +531,16 @@ void hal_mpt_SetTxPower(PADAPTER pAdapter)
 {
 	HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter);
 	PMPT_CONTEXT		pMptCtx = &(pAdapter->mppriv.mpt_ctx);
-	struct PHY_DM_STRUCT		*pDM_Odm = &pHalData->odmpriv;
+	struct dm_struct		*pDM_Odm = &pHalData->odmpriv;
 
 	if (pHalData->rf_chip < RF_CHIP_MAX) {
 		if (IS_HARDWARE_TYPE_8188E(pAdapter) ||
 		    IS_HARDWARE_TYPE_8723B(pAdapter) ||
 		    IS_HARDWARE_TYPE_8192E(pAdapter) ||
 		    IS_HARDWARE_TYPE_8703B(pAdapter) ||
-		    IS_HARDWARE_TYPE_8188F(pAdapter)) {
+		    IS_HARDWARE_TYPE_8188F(pAdapter) ||
+		    IS_HARDWARE_TYPE_8188GTV(pAdapter)
+		) {
 			u8 path = (pHalData->antenna_tx_path == ANTENNA_A) ? (RF_PATH_A) : (RF_PATH_B);
 
 			RTW_INFO("===> MPT_ProSetTxPower: Old\n");
@@ -517,12 +549,14 @@ void hal_mpt_SetTxPower(PADAPTER pAdapter)
 			mpt_SetTxPower_Old(pAdapter, MPT_OFDM_AND_HT, pMptCtx->TxPwrLevel);
 
 		} else {
-			RTW_INFO("===> MPT_ProSetTxPower: Jaguar/Jaguar2\n");
+
 			mpt_SetTxPower(pAdapter, MPT_CCK, pMptCtx->TxPwrLevel);
 			mpt_SetTxPower(pAdapter, MPT_OFDM, pMptCtx->TxPwrLevel);
 			mpt_SetTxPower(pAdapter, MPT_HT, pMptCtx->TxPwrLevel);
-			mpt_SetTxPower(pAdapter, MPT_VHT, pMptCtx->TxPwrLevel);
-
+			if(IS_HARDWARE_TYPE_JAGUAR(pAdapter)||IS_HARDWARE_TYPE_JAGUAR2(pAdapter)) {
+				RTW_INFO("===> MPT_ProSetTxPower: Jaguar/Jaguar2\n");
+				mpt_SetTxPower(pAdapter, MPT_VHT, pMptCtx->TxPwrLevel);
+			}
 		}
 	} else
 		RTW_INFO("RFChipID < RF_CHIP_MAX, the RF chip is not supported - %d\n", pHalData->rf_chip);
@@ -542,7 +576,7 @@ void hal_mpt_SetDataRate(PADAPTER pAdapter)
 
 	hal_mpt_CCKTxPowerAdjust(pAdapter, pHalData->bCCKinCH14);
 #ifdef CONFIG_RTL8723B
-	if (IS_HARDWARE_TYPE_8723B(pAdapter) || IS_HARDWARE_TYPE_8188F(pAdapter)) {
+	if (IS_HARDWARE_TYPE_8723B(pAdapter)) {
 		if (IS_CCK_RATE(DataRate)) {
 			if (pMptCtx->mpt_rf_path == RF_PATH_A)
 				phy_set_rf_reg(pAdapter, RF_PATH_A, 0x51, 0xF, 0x6);
@@ -604,7 +638,6 @@ VOID mpt_SetRFPath_8814A(PADAPTER	pAdapter)
 	R_ANTENNA_SELECT_OFDM	*p_ofdm_tx;	/* OFDM Tx register */
 	R_ANTENNA_SELECT_CCK	*p_cck_txrx;
 	u8	ForcedDataRate = mpt_to_mgnt_rate(pMptCtx->mpt_rate_index);
-	u8	HtStbcCap = pAdapter->registrypriv.stbc_cap;
 	/*/PRT_HIGH_THROUGHPUT		pHTInfo = GET_HT_INFO(pMgntInfo);*/
 	/*/PRT_VERY_HIGH_THROUGHPUT	pVHTInfo = GET_VHT_INFO(pMgntInfo);*/
 
@@ -1061,8 +1094,8 @@ void mpt_SetRFPath_8723B(PADAPTER pAdapter)
 	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(pAdapter);
 	u32		ulAntennaTx, ulAntennaRx;
 	PMPT_CONTEXT	pMptCtx = &(pAdapter->mppriv.mpt_ctx);
-	struct PHY_DM_STRUCT	*pDM_Odm = &pHalData->odmpriv;
-	struct odm_rf_calibration_structure	*pRFCalibrateInfo = &(pDM_Odm->rf_calibrate_info);
+	struct dm_struct	*pDM_Odm = &pHalData->odmpriv;
+	struct dm_rf_calibration_struct	*pRFCalibrateInfo = &(pDM_Odm->rf_calibrate_info);
 
 	ulAntennaTx = pHalData->antenna_tx_path;
 	ulAntennaRx = pHalData->AntennaRxPath;
@@ -1079,12 +1112,6 @@ void mpt_SetRFPath_8723B(PADAPTER pAdapter)
 		phy_set_bb_reg(pAdapter, rS0S1_PathSwitch, BIT9 | BIT8 | BIT7, 0x0);
 		phy_set_bb_reg(pAdapter, 0xB2C, BIT31, 0x0); /* AGC Table Sel*/
 
-		/*/<20130522, Kordan> 0x51 and 0x71 should be set immediately after path switched, or they might be overwritten.*/
-		if ((pHalData->PackageType == PACKAGE_TFBGA79) || (pHalData->PackageType == PACKAGE_TFBGA90))
-			phy_set_rf_reg(pAdapter, RF_PATH_A, 0x51, bRFRegOffsetMask, 0x6B10E);
-		else
-			phy_set_rf_reg(pAdapter, RF_PATH_A, 0x51, bRFRegOffsetMask, 0x6B04E);
-
 		for (i = 0; i < 3; ++i) {
 			u4Byte offset = pRFCalibrateInfo->tx_iqc_8723b[RF_PATH_A][i][0];
 			u4Byte data = pRFCalibrateInfo->tx_iqc_8723b[RF_PATH_A][i][1];
@@ -1112,11 +1139,6 @@ void mpt_SetRFPath_8723B(PADAPTER pAdapter)
 		pMptCtx->mpt_rf_path = RF_PATH_B;
 		phy_set_bb_reg(pAdapter, rS0S1_PathSwitch, BIT9 | BIT8 | BIT7, 0x5);
 		phy_set_bb_reg(pAdapter, 0xB2C, BIT31, 0x1); /*/ AGC Table Sel.*/
-		/* <20130522, Kordan> 0x51 and 0x71 should be set immediately after path switched, or they might be overwritten.*/
-		if ((pHalData->PackageType == PACKAGE_TFBGA79) || (pHalData->PackageType == PACKAGE_TFBGA90))
-			phy_set_rf_reg(pAdapter, RF_PATH_A, 0x51, bRFRegOffsetMask, 0x6B10E);
-		else
-			phy_set_rf_reg(pAdapter, RF_PATH_A, 0x51, bRFRegOffsetMask, 0x6B04E);
 
 		for (i = 0; i < 3; ++i) {
 			/*/ <20130603, Kordan> Because BB suppors only 1T1R, we restore IQC  to S1 instead of S0.*/
@@ -1151,8 +1173,8 @@ void mpt_SetRFPath_8703B(PADAPTER pAdapter)
 	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(pAdapter);
 	u4Byte					ulAntennaTx, ulAntennaRx;
 	PMPT_CONTEXT		pMptCtx = &(pAdapter->mppriv.mpt_ctx);
-	struct PHY_DM_STRUCT		*pDM_Odm = &pHalData->odmpriv;
-	struct odm_rf_calibration_structure			*pRFCalibrateInfo = &(pDM_Odm->rf_calibrate_info);
+	struct dm_struct		*pDM_Odm = &pHalData->odmpriv;
+	struct dm_rf_calibration_struct			*pRFCalibrateInfo = &(pDM_Odm->rf_calibrate_info);
 
 	ulAntennaTx = pHalData->antenna_tx_path;
 	ulAntennaRx = pHalData->AntennaRxPath;
@@ -1231,8 +1253,8 @@ void mpt_SetRFPath_8723D(PADAPTER pAdapter)
 	u1Byte	p = 0, i = 0;
 	u4Byte	ulAntennaTx, ulAntennaRx, offset = 0, data = 0, val32 = 0;
 	PMPT_CONTEXT	pMptCtx = &(pAdapter->mppriv.mpt_ctx);
-	struct PHY_DM_STRUCT	*pDM_Odm = &pHalData->odmpriv;
-	struct odm_rf_calibration_structure	*pRFCalibrateInfo = &(pDM_Odm->rf_calibrate_info);
+	struct dm_struct	*pDM_Odm = &pHalData->odmpriv;
+	struct dm_rf_calibration_struct	*pRFCalibrateInfo = &(pDM_Odm->rf_calibrate_info);
 
 	ulAntennaTx = pHalData->antenna_tx_path;
 	ulAntennaRx = pHalData->AntennaRxPath;
@@ -1422,6 +1444,65 @@ VOID mpt_SetRFPath_819X(PADAPTER	pAdapter)
 	}
 }	/* MPT_ProSetRFPath */
 
+#ifdef CONFIG_RTL8192F
+
+void mpt_set_rfpath_8192f(PADAPTER	pAdapter)
+{
+	HAL_DATA_TYPE			*pHalData	= GET_HAL_DATA(pAdapter);
+	PMPT_CONTEXT		pMptCtx = &(pAdapter->mppriv.mpt_ctx);
+
+	u16		ForcedDataRate = mpt_to_mgnt_rate(pMptCtx->mpt_rate_index);
+	u8				NssforRate, odmNssforRate;
+	u32				ulAntennaTx, ulAntennaRx;
+	u8				RxAntToPhyDm;
+	u8				TxAntToPhyDm;
+
+	ulAntennaTx = pHalData->antenna_tx_path;
+	ulAntennaRx = pHalData->AntennaRxPath;
+	NssforRate = MgntQuery_NssTxRate(ForcedDataRate);
+
+	if (pHalData->rf_chip >= RF_TYPE_MAX)
+		RTW_INFO("This RF chip ID is not supported\n");
+
+	switch (ulAntennaTx) {
+	case ANTENNA_A:
+			pMptCtx->mpt_rf_path = RF_PATH_A;
+			TxAntToPhyDm = BB_PATH_A;
+			break;
+	case ANTENNA_B:
+			pMptCtx->mpt_rf_path = RF_PATH_B;
+			TxAntToPhyDm = BB_PATH_B;
+			break;
+	case ANTENNA_AB:
+			pMptCtx->mpt_rf_path = RF_PATH_AB;
+			TxAntToPhyDm = (BB_PATH_A|BB_PATH_B);
+			break;
+	default:
+			pMptCtx->mpt_rf_path = RF_PATH_AB;
+			TxAntToPhyDm = (BB_PATH_A|BB_PATH_B);
+			break;
+	}
+
+	switch (ulAntennaRx) {
+	case ANTENNA_A:
+			RxAntToPhyDm = BB_PATH_A;
+			break;
+	case ANTENNA_B:
+			RxAntToPhyDm = BB_PATH_B;
+			break;
+	case ANTENNA_AB:
+			RxAntToPhyDm = (BB_PATH_A|BB_PATH_B);
+			break;
+	default:
+			RxAntToPhyDm = (BB_PATH_A|BB_PATH_B);
+			break;
+	}
+
+	config_phydm_trx_mode_8192f(GET_PDM_ODM(pAdapter), TxAntToPhyDm, RxAntToPhyDm, FALSE);
+
+}
+
+#endif
 
 void hal_mpt_SetAntenna(PADAPTER	pAdapter)
 
@@ -1471,6 +1552,14 @@ void hal_mpt_SetAntenna(PADAPTER	pAdapter)
 		return;
 	}
 #endif
+
+#ifdef CONFIG_RTL8192F
+		if (IS_HARDWARE_TYPE_8192F(pAdapter)) {
+			mpt_set_rfpath_8192f(pAdapter);
+			return;
+		}
+#endif
+
 	/*	else if (IS_HARDWARE_TYPE_8821B(pAdapter))
 			mpt_SetRFPath_8821B(pAdapter);
 		Prepare for 8822B
@@ -1517,7 +1606,7 @@ void hal_mpt_TriggerRFThermalMeter(PADAPTER pAdapter)
 u8 hal_mpt_ReadRFThermalMeter(PADAPTER pAdapter)
 
 {
-	struct PHY_DM_STRUCT *p_dm_odm = adapter_to_phydm(pAdapter);
+	struct dm_struct *p_dm_odm = adapter_to_phydm(pAdapter);
 	u32 ThermalValue = 0;
 	s32 thermal_value_temp = 0;
 	s8 thermal_offset = 0;
@@ -1603,6 +1692,7 @@ void hal_mpt_SetSingleToneTx(PADAPTER pAdapter, u8 bStart)
 {
 	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(pAdapter);
 	PMPT_CONTEXT		pMptCtx = &(pAdapter->mppriv.mpt_ctx);
+	struct dm_struct		*pDM_Odm = &pHalData->odmpriv;
 	u4Byte			ulAntennaTx = pHalData->antenna_tx_path;
 	static u4Byte		regRF = 0, regBB0 = 0, regBB1 = 0, regBB2 = 0, regBB3 = 0;
 	u8 rfPath;
@@ -1637,6 +1727,18 @@ void hal_mpt_SetSingleToneTx(PADAPTER pAdapter, u8 bStart)
 			phy_set_mac_reg(pAdapter, 0x88C, 0xF00000, 0xF);
 			phy_set_rf_reg(pAdapter, pMptCtx->mpt_rf_path, lna_low_gain_3, BIT1, 0x1); /*/ RF LO disabled*/
 			phy_set_rf_reg(pAdapter, pMptCtx->mpt_rf_path, RF_AC, 0xF0000, 0x2); /*/ Tx mode*/
+		}	else if (IS_HARDWARE_TYPE_8192F(pAdapter)) { /* USB need to do RF LO disable first, PCIE isn't required to follow this order.*/
+ #ifdef CONFIG_RTL8192F
+			phy_set_mac_reg(pAdapter, REG_LEDCFG0_8192F, BIT23, 0x1);
+			phy_set_mac_reg(pAdapter, REG_LEDCFG0_8192F, BIT26, 0x1);
+			phy_set_mac_reg(pAdapter, REG_PAD_CTRL1_8192F, BIT7, 0x1);
+			phy_set_mac_reg(pAdapter, REG_PAD_CTRL1_8192F, BIT1, 0x1);
+			phy_set_mac_reg(pAdapter, REG_PAD_CTRL1_8192F, BIT0, 0x1);
+			phy_set_mac_reg(pAdapter, REG_AFE_CTRL_4_8192F, BIT16, 0x1);
+			phy_set_bb_reg(pAdapter, 0x88C, 0xF00000, 0xF);
+			phy_set_rf_reg(pAdapter, pMptCtx->mpt_rf_path, 0x57, BIT1, 0x1); /* RF LO disabled*/
+			phy_set_rf_reg(pAdapter, pMptCtx->mpt_rf_path, RF_AC, 0xF0000, 0x2); /* Tx mode*/
+#endif
 		} else if (IS_HARDWARE_TYPE_8723B(pAdapter)) {
 			if (pMptCtx->mpt_rf_path == RF_PATH_A) {
 				phy_set_rf_reg(pAdapter, RF_PATH_A, RF_AC, 0xF0000, 0x2); /*/ Tx mode*/
@@ -1651,7 +1753,7 @@ void hal_mpt_SetSingleToneTx(PADAPTER pAdapter, u8 bStart)
 				phy_set_rf_reg(pAdapter, RF_PATH_A, RF_AC, 0xF0000, 0x2); /* Tx mode */
 				phy_set_rf_reg(pAdapter, RF_PATH_A, 0x53, 0xF000, 0x1); /* RF LO enabled */
 			}
-		} else if (IS_HARDWARE_TYPE_8188F(pAdapter)) {
+		} else if (IS_HARDWARE_TYPE_8188F(pAdapter) || IS_HARDWARE_TYPE_8188GTV(pAdapter)) {
 			/*Set BB REG 88C: Prevent SingleTone Fail*/
 			phy_set_bb_reg(pAdapter, rFPGA0_AnalogParameter4, 0xF00000, 0xF);
 			phy_set_rf_reg(pAdapter, pMptCtx->mpt_rf_path, lna_low_gain_3, BIT1, 0x1);
@@ -1667,8 +1769,8 @@ void hal_mpt_SetSingleToneTx(PADAPTER pAdapter, u8 bStart)
 				phy_set_rf_reg(pAdapter, RF_PATH_A, RF_AC, BIT16, 0x0);
 				phy_set_rf_reg(pAdapter, RF_PATH_A, 0x63, BIT0, 0x1);
 			}
-		} else if (IS_HARDWARE_TYPE_JAGUAR(pAdapter) || IS_HARDWARE_TYPE_8822B(pAdapter)) {
-#if defined(CONFIG_RTL8812A) || defined(CONFIG_RTL8821A) || defined(CONFIG_RTL8822B)
+		} else if (IS_HARDWARE_TYPE_JAGUAR(pAdapter) || IS_HARDWARE_TYPE_8822B(pAdapter) || IS_HARDWARE_TYPE_8821C(pAdapter)) {
+#if defined(CONFIG_RTL8812A) || defined(CONFIG_RTL8821A) || defined(CONFIG_RTL8822B) || defined(CONFIG_RTL8821C)
 			u1Byte p = RF_PATH_A;
 
 			regRF = phy_query_rf_reg(pAdapter, RF_PATH_A, RF_AC_Jaguar, bRFRegOffsetMask);
@@ -1688,26 +1790,49 @@ void hal_mpt_SetSingleToneTx(PADAPTER pAdapter, u8 bStart)
 			} else {
 				phy_set_rf_reg(pAdapter, pMptCtx->mpt_rf_path, RF_AC_Jaguar, 0xF0000, 0x2); /*/ Tx mode: RF0x00[19:16]=4'b0010 */
 				phy_set_rf_reg(pAdapter, pMptCtx->mpt_rf_path, RF_AC_Jaguar, 0x1F, 0x0); /*/ Lowest RF gain index: RF_0x0[4:0] = 0*/
-				phy_set_rf_reg(pAdapter, pMptCtx->mpt_rf_path, lna_low_gain_3, BIT1, 0x1); /*/ RF LO enabled*/
+#ifdef CONFIG_RTL8821C
+				if (IS_HARDWARE_TYPE_8821C(pAdapter) && pDM_Odm->current_rf_set_8821c == SWITCH_TO_BTG)
+					phy_set_rf_reg(pAdapter, pMptCtx->mpt_rf_path, 0x75, BIT16, 0x1); /* RF LO (for BTG) enabled */
+				else
+#endif
+					phy_set_rf_reg(pAdapter, pMptCtx->mpt_rf_path, lna_low_gain_3, BIT1, 0x1); /*/ RF LO enabled*/
 			}
-
-			phy_set_bb_reg(pAdapter, rA_RFE_Pinmux_Jaguar, 0xFF00F0, 0x77007);  /*/ 0xCB0[[23:16, 7:4] = 0x77007*/
-			phy_set_bb_reg(pAdapter, rB_RFE_Pinmux_Jaguar, 0xFF00F0, 0x77007);  /*/ 0xCB0[[23:16, 7:4] = 0x77007*/
-
-			if (pHalData->external_pa_5g) {
-				phy_set_bb_reg(pAdapter, rA_RFE_Pinmux_Jaguar + 4, 0xFF00000, 0x12); /*/ 0xCB4[23:16] = 0x12*/
-				phy_set_bb_reg(pAdapter, rB_RFE_Pinmux_Jaguar + 4, 0xFF00000, 0x12); /*/ 0xEB4[23:16] = 0x12*/
-			} else if (pHalData->ExternalPA_2G) {
-				phy_set_bb_reg(pAdapter, rA_RFE_Pinmux_Jaguar + 4, 0xFF00000, 0x11); /*/ 0xCB4[23:16] = 0x11*/
-				phy_set_bb_reg(pAdapter, rB_RFE_Pinmux_Jaguar + 4, 0xFF00000, 0x11); /*/ 0xEB4[23:16] = 0x11*/
+			if (IS_HARDWARE_TYPE_8822B(pAdapter)) {
+					phy_set_bb_reg(pAdapter, rA_RFE_Pinmux_Jaguar, bMaskDWord, 0x77777777);  /* 0xCB0=0x77777777*/
+					phy_set_bb_reg(pAdapter, rB_RFE_Pinmux_Jaguar, bMaskDWord, 0x77777777);  /* 0xEB0=0x77777777*/
+					phy_set_bb_reg(pAdapter, rA_RFE_Pinmux_Jaguar + 4, bMaskLWord, 0x7777);  /* 0xCB4[15:0] = 0x7777*/
+					phy_set_bb_reg(pAdapter, rB_RFE_Pinmux_Jaguar + 4, bMaskLWord, 0x7777);  /* 0xEB4[15:0] = 0x7777*/
+					phy_set_bb_reg(pAdapter, rA_RFE_Inverse_Jaguar, 0xFFF, 0xb); /* 0xCBC[23:16] = 0x12*/
+					phy_set_bb_reg(pAdapter, rB_RFE_Inverse_Jaguar, 0xFFF, 0x830); /* 0xEBC[23:16] = 0x12*/
+			} else if (IS_HARDWARE_TYPE_8821C(pAdapter)) {
+				phy_set_bb_reg(pAdapter, rA_RFE_Pinmux_Jaguar, 0xF0F0, 0x707);  /* 0xCB0[[15:12, 7:4] = 0x707*/
+
+				if (pHalData->external_pa_5g)
+				{
+					phy_set_bb_reg(pAdapter, rA_RFE_Pinmux_Jaguar + 4, 0xA00000, 0x1); /* 0xCB4[23, 21] = 0x1*/
+				}
+				else if (pHalData->ExternalPA_2G)
+				{
+					phy_set_bb_reg(pAdapter, rA_RFE_Pinmux_Jaguar + 4, 0xA00000, 0x1); /* 0xCB4[23, 21] = 0x1*/
+				}
+			} else {
+				phy_set_bb_reg(pAdapter, rA_RFE_Pinmux_Jaguar, 0xFF00F0, 0x77007);  /*/ 0xCB0[[23:16, 7:4] = 0x77007*/
+				phy_set_bb_reg(pAdapter, rB_RFE_Pinmux_Jaguar, 0xFF00F0, 0x77007);  /*/ 0xCB0[[23:16, 7:4] = 0x77007*/
+
+				if (pHalData->external_pa_5g) {
+					phy_set_bb_reg(pAdapter, rA_RFE_Pinmux_Jaguar + 4, 0xFF00000, 0x12); /*/ 0xCB4[23:16] = 0x12*/
+					phy_set_bb_reg(pAdapter, rB_RFE_Pinmux_Jaguar + 4, 0xFF00000, 0x12); /*/ 0xEB4[23:16] = 0x12*/
+				} else if (pHalData->ExternalPA_2G) {
+					phy_set_bb_reg(pAdapter, rA_RFE_Pinmux_Jaguar + 4, 0xFF00000, 0x11); /*/ 0xCB4[23:16] = 0x11*/
+					phy_set_bb_reg(pAdapter, rB_RFE_Pinmux_Jaguar + 4, 0xFF00000, 0x11); /*/ 0xEB4[23:16] = 0x11*/
+				}
 			}
 #endif
 		}
-#if defined(CONFIG_RTL8814A) || defined(CONFIG_RTL8821C)
-				else if (IS_HARDWARE_TYPE_8814A(pAdapter) || IS_HARDWARE_TYPE_8821C(pAdapter))
+#if defined(CONFIG_RTL8814A)
+				else if (IS_HARDWARE_TYPE_8814A(pAdapter))
 						mpt_SetSingleTone_8814A(pAdapter, TRUE, FALSE);
 #endif
-
 		else	/*/ Turn On SingleTone and turn off the other test modes.*/
 			phy_set_bb_reg(pAdapter, rOFDM1_LSTF, BIT30 | BIT29 | BIT28, OFDM_SingleTone);
 
@@ -1725,6 +1850,18 @@ void hal_mpt_SetSingleToneTx(PADAPTER pAdapter, u8 bStart)
 			phy_set_rf_reg(pAdapter, pMptCtx->mpt_rf_path, lna_low_gain_3, BIT1, 0x0);/*/ RF LO disabled */
 			/*/ RESTORE MAC REG 88C: Enable RF Functions*/
 			phy_set_mac_reg(pAdapter, 0x88C, 0xF00000, 0x0);
+		} else if (IS_HARDWARE_TYPE_8192F(pAdapter)){
+#ifdef CONFIG_RTL8192F
+			phy_set_mac_reg(pAdapter, REG_LEDCFG0_8192F, BIT23, 0x0);
+			phy_set_mac_reg(pAdapter, REG_LEDCFG0_8192F, BIT26, 0x0);
+			phy_set_mac_reg(pAdapter, REG_PAD_CTRL1_8192F, BIT7, 0x0);
+			phy_set_mac_reg(pAdapter, REG_PAD_CTRL1_8192F, BIT1, 0x0);
+			phy_set_mac_reg(pAdapter, REG_PAD_CTRL1_8192F, BIT0, 0x0);
+			phy_set_mac_reg(pAdapter, REG_AFE_CTRL_4_8192F, BIT16, 0x0);
+			phy_set_bb_reg(pAdapter, 0x88C, 0xF00000, 0x0);
+			phy_set_rf_reg(pAdapter, pMptCtx->mpt_rf_path, 0x57, BIT1, 0x0); /* RF LO disabled*/
+			phy_set_rf_reg(pAdapter, pMptCtx->mpt_rf_path, RF_AC, 0xF0000, 0x3); /* Rx mode*/
+#endif
 		} else if (IS_HARDWARE_TYPE_8723B(pAdapter)) {
 			if (pMptCtx->mpt_rf_path == RF_PATH_A) {
 				phy_set_rf_reg(pAdapter, RF_PATH_A, RF_AC, 0xF0000, 0x3); /*/ Rx mode*/
@@ -1739,7 +1876,7 @@ void hal_mpt_SetSingleToneTx(PADAPTER pAdapter, u8 bStart)
 				phy_set_rf_reg(pAdapter, RF_PATH_A, RF_AC, 0xF0000, 0x3); /* Rx mode */
 				phy_set_rf_reg(pAdapter, RF_PATH_A, 0x53, 0xF000, 0x0); /* RF LO disabled */
 			}
-		} else if (IS_HARDWARE_TYPE_8188F(pAdapter)) {
+		} else if (IS_HARDWARE_TYPE_8188F(pAdapter) || IS_HARDWARE_TYPE_8188GTV(pAdapter)) {
 			phy_set_rf_reg(pAdapter, pMptCtx->mpt_rf_path, RF_AC, 0xF0000, 0x3); /*Tx mode*/
 			phy_set_rf_reg(pAdapter, pMptCtx->mpt_rf_path, lna_low_gain_3, BIT1, 0x0); /*RF LO disabled*/
 			/*Set BB REG 88C: Prevent SingleTone Fail*/
@@ -1754,8 +1891,8 @@ void hal_mpt_SetSingleToneTx(PADAPTER pAdapter, u8 bStart)
 				phy_set_rf_reg(pAdapter, RF_PATH_A, RF_AC, BIT16, 0x1);
 				phy_set_rf_reg(pAdapter, RF_PATH_A, 0x63, BIT0, 0x0);
 			}
-		} else if (IS_HARDWARE_TYPE_JAGUAR(pAdapter) || IS_HARDWARE_TYPE_8822B(pAdapter)) {
-#if defined(CONFIG_RTL8812A) || defined(CONFIG_RTL8821A) || defined(CONFIG_RTL8822B)
+		} else if (IS_HARDWARE_TYPE_JAGUAR(pAdapter) || IS_HARDWARE_TYPE_8822B(pAdapter) || IS_HARDWARE_TYPE_8821C(pAdapter)) {
+#if defined(CONFIG_RTL8812A) || defined(CONFIG_RTL8821A) || defined(CONFIG_RTL8822B) || defined(CONFIG_RTL8821C)
 			u1Byte p = RF_PATH_A;
 
 			phy_set_bb_reg(pAdapter, rOFDMCCKEN_Jaguar, BIT29 | BIT28, 0x3); /*/ Disable CCK and OFDM*/
@@ -1766,7 +1903,12 @@ void hal_mpt_SetSingleToneTx(PADAPTER pAdapter, u8 bStart)
 					phy_set_rf_reg(pAdapter, p, lna_low_gain_3, BIT1, 0x0); /*/ RF LO disabled*/
 				}
 			} else {
+				p = pMptCtx->mpt_rf_path;
 				phy_set_rf_reg(pAdapter, p, RF_AC_Jaguar, bRFRegOffsetMask, regRF);
+
+				if (IS_HARDWARE_TYPE_8821C(pAdapter))
+					phy_set_rf_reg(pAdapter, p, 0x75, BIT16, 0x0); /* RF LO (for BTG) disabled */
+
 				phy_set_rf_reg(pAdapter, p, lna_low_gain_3, BIT1, 0x0); /*/ RF LO disabled*/
 			}
 
@@ -1774,10 +1916,16 @@ void hal_mpt_SetSingleToneTx(PADAPTER pAdapter, u8 bStart)
 			phy_set_bb_reg(pAdapter, rB_RFE_Pinmux_Jaguar, bMaskDWord, regBB1);
 			phy_set_bb_reg(pAdapter, rA_RFE_Pinmux_Jaguar + 4, bMaskDWord, regBB2);
 			phy_set_bb_reg(pAdapter, rB_RFE_Pinmux_Jaguar + 4, bMaskDWord, regBB3);
+
+			if (IS_HARDWARE_TYPE_8822B(pAdapter)) {
+				RTW_INFO("Restore RFE control Pin cbc\n");
+				phy_set_bb_reg(pAdapter, rA_RFE_Inverse_Jaguar, 0xfff, 0x0);
+				phy_set_bb_reg(pAdapter, rB_RFE_Inverse_Jaguar, 0xfff, 0x0);
+			}
 #endif
 		}
-#if defined(CONFIG_RTL8814A) || defined(CONFIG_RTL8822B) || defined(CONFIG_RTL8821C)
-		else if (IS_HARDWARE_TYPE_8814A(pAdapter) || IS_HARDWARE_TYPE_8821C(pAdapter))
+#if defined(CONFIG_RTL8814A)
+		else if (IS_HARDWARE_TYPE_8814A(pAdapter))
 			mpt_SetSingleTone_8814A(pAdapter, FALSE, FALSE);
 
 		else/*/ Turn off all test modes.*/
@@ -2006,12 +2154,10 @@ static	VOID mpt_StartOfdmContTx(
 void mpt_ProSetPMacTx(PADAPTER	Adapter)
 {
 	PMPT_CONTEXT	pMptCtx		=	&(Adapter->mppriv.mpt_ctx);
+	struct mp_priv *pmppriv = &Adapter->mppriv;
 	RT_PMAC_TX_INFO	PMacTxInfo	=	pMptCtx->PMacTxInfo;
 	u32			u4bTmp;
 
-	dbg_print("SGI %d bSPreamble %d bSTBC %d bLDPC %d NDP_sound %d\n", PMacTxInfo.bSGI, PMacTxInfo.bSPreamble, PMacTxInfo.bSTBC, PMacTxInfo.bLDPC, PMacTxInfo.NDP_sound);
-	dbg_print("TXSC %d BandWidth %d PacketPeriod %d PacketCount %d PacketLength %d PacketPattern %d\n", PMacTxInfo.TX_SC, PMacTxInfo.BandWidth, PMacTxInfo.PacketPeriod, PMacTxInfo.PacketCount,
-		 PMacTxInfo.PacketLength, PMacTxInfo.PacketPattern);
 #if 0
 	PRINT_DATA("LSIG ", PMacTxInfo.LSIG, 3);
 	PRINT_DATA("HT_SIG", PMacTxInfo.HT_SIG, 6);
@@ -2020,46 +2166,61 @@ void mpt_ProSetPMacTx(PADAPTER	Adapter)
 	dbg_print("VHT_SIG_B_CRC %x\n", PMacTxInfo.VHT_SIG_B_CRC);
 	PRINT_DATA("VHT_Delimiter", PMacTxInfo.VHT_Delimiter, 4);
 
-	PRINT_DATA("Src Address", Adapter->mac_addr, 6);
-	PRINT_DATA("Dest Address", PMacTxInfo.MacAddress, 6);
+	PRINT_DATA("Src Address", Adapter->mac_addr, ETH_ALEN);
+	PRINT_DATA("Dest Address", PMacTxInfo.MacAddress, ETH_ALEN);
 #endif
+	if (pmppriv->pktInterval != 0)
+		PMacTxInfo.PacketPeriod = pmppriv->pktInterval;
+
+    	if (pmppriv->tx.count != 0)
+        	PMacTxInfo.PacketCount = pmppriv->tx.count;
+
+	RTW_INFO("SGI %d bSPreamble %d bSTBC %d bLDPC %d NDP_sound %d\n", PMacTxInfo.bSGI, PMacTxInfo.bSPreamble, PMacTxInfo.bSTBC, PMacTxInfo.bLDPC, PMacTxInfo.NDP_sound);
+	RTW_INFO("TXSC %d BandWidth %d PacketPeriod %d PacketCount %d PacketLength %d PacketPattern %d\n", PMacTxInfo.TX_SC, PMacTxInfo.BandWidth, PMacTxInfo.PacketPeriod, PMacTxInfo.PacketCount,
+		 PMacTxInfo.PacketLength, PMacTxInfo.PacketPattern);
 
 	if (PMacTxInfo.bEnPMacTx == FALSE) {
-		if (PMacTxInfo.Mode == CONTINUOUS_TX) {
+		if (pMptCtx->HWTxmode == CONTINUOUS_TX) {
 			phy_set_bb_reg(Adapter, 0xb04, 0xf, 2);			/*	TX Stop*/
-			if (IS_MPT_CCK_RATE(PMacTxInfo.TX_RATE))
+			if (IS_MPT_CCK_RATE(pMptCtx->mpt_rate_index))
 				mpt_StopCckContTx(Adapter);
 			else
 				mpt_StopOfdmContTx(Adapter);
-		} else if (IS_MPT_CCK_RATE(PMacTxInfo.TX_RATE)) {
+		} else if (IS_MPT_CCK_RATE(pMptCtx->mpt_rate_index)) {
 			u4bTmp = phy_query_bb_reg(Adapter, 0xf50, bMaskLWord);
 			phy_set_bb_reg(Adapter, 0xb1c, bMaskLWord, u4bTmp + 50);
 			phy_set_bb_reg(Adapter, 0xb04, 0xf, 2);		/*TX Stop*/
 		} else
 			phy_set_bb_reg(Adapter, 0xb04, 0xf, 2);		/*	TX Stop*/
 
-		if (PMacTxInfo.Mode == OFDM_Single_Tone_TX) {
+		if (pMptCtx->HWTxmode == OFDM_Single_Tone_TX) {
 			/* Stop HW TX -> Stop Continuous TX -> Stop RF Setting*/
-			if (IS_MPT_CCK_RATE(PMacTxInfo.TX_RATE))
+			if (IS_MPT_CCK_RATE(pMptCtx->mpt_rate_index))
 				mpt_StopCckContTx(Adapter);
 			else
 				mpt_StopOfdmContTx(Adapter);
 
 			mpt_SetSingleTone_8814A(Adapter, FALSE, TRUE);
 		}
-
+		pMptCtx->HWTxmode = TEST_NONE;
 		return;
 	}
 
+    	pMptCtx->mpt_rate_index = PMacTxInfo.TX_RATE;
+
 	if (PMacTxInfo.Mode == CONTINUOUS_TX) {
+		pMptCtx->HWTxmode = CONTINUOUS_TX;
 		PMacTxInfo.PacketCount = 1;
 
+        	hal_mpt_SetTxPower(Adapter);
+
 		if (IS_MPT_CCK_RATE(PMacTxInfo.TX_RATE))
 			mpt_StartCckContTx(Adapter);
 		else
 			mpt_StartOfdmContTx(Adapter);
 	} else if (PMacTxInfo.Mode == OFDM_Single_Tone_TX) {
 		/* Continuous TX -> HW TX -> RF Setting */
+		pMptCtx->HWTxmode = OFDM_Single_Tone_TX;
 		PMacTxInfo.PacketCount = 1;
 
 		if (IS_MPT_CCK_RATE(PMacTxInfo.TX_RATE))
@@ -2067,6 +2228,7 @@ void mpt_ProSetPMacTx(PADAPTER	Adapter)
 		else
 			mpt_StartOfdmContTx(Adapter);
 	} else if (PMacTxInfo.Mode == PACKETS_TX) {
+		pMptCtx->HWTxmode = PACKETS_TX;
 		if (IS_MPT_CCK_RATE(PMacTxInfo.TX_RATE) && PMacTxInfo.PacketCount == 0)
 			PMacTxInfo.PacketCount = 0xffff;
 	}
@@ -2173,7 +2335,7 @@ void mpt_ProSetPMacTx(PADAPTER	Adapter)
 	u4bTmp = (PMacTxInfo.TX_SC) | ((PMacTxInfo.BandWidth) << 4) | ((PMacTxInfo.m_STBC - 1) << 6) | ((PMacTxInfo.NDP_sound) << 8);
 	phy_set_bb_reg(Adapter, 0xb4c, 0x1ff, u4bTmp);
 
-	if (IS_HARDWARE_TYPE_8814A(Adapter) || IS_HARDWARE_TYPE_8822B(Adapter)) {
+	if (IS_HARDWARE_TYPE_JAGUAR2(Adapter)) {
 		u4Byte offset = 0xb44;
 
 		if (IS_MPT_OFDM_RATE(PMacTxInfo.TX_RATE))
@@ -2182,6 +2344,16 @@ void mpt_ProSetPMacTx(PADAPTER	Adapter)
 			phy_set_bb_reg(Adapter, offset, 0xc0000000, 1);
 		else if (IS_MPT_VHT_RATE(PMacTxInfo.TX_RATE))
 			phy_set_bb_reg(Adapter, offset, 0xc0000000, 2);
+
+	} else if(IS_HARDWARE_TYPE_JAGUAR(Adapter)) {
+		u4Byte offset = 0xb4c;
+
+		if(IS_MPT_OFDM_RATE(PMacTxInfo.TX_RATE))
+			phy_set_bb_reg(Adapter, offset, 0xc0000000, 0);
+		else if(IS_MPT_HT_RATE(PMacTxInfo.TX_RATE))
+			phy_set_bb_reg(Adapter, offset, 0xc0000000, 1);
+		else if(IS_MPT_VHT_RATE(PMacTxInfo.TX_RATE))
+			phy_set_bb_reg(Adapter, offset, 0xc0000000, 2);
 	}
 
 	phy_set_bb_reg(Adapter, 0xb00, BIT8, 1);		/*	Turn on PMAC*/
@@ -2203,8 +2375,7 @@ void hal_mpt_SetContinuousTx(PADAPTER pAdapter, u8 bStart)
 {
 	u8 Rate;
 
-	RT_TRACE(_module_mp_, _drv_info_,
-		 ("SetContinuousTx: rate:%d\n", pAdapter->mppriv.rateidx));
+	RTW_INFO("SetContinuousTx: rate:%d\n", pAdapter->mppriv.rateidx);
 	Rate = HwRateToMPTRate(pAdapter->mppriv.rateidx);
 	pAdapter->mppriv.mpt_ctx.is_start_cont_tx = bStart;
 
diff --git a/rtl8723DS/hal/hal_phy.c b/rtl8723DS/hal/hal_phy.c
index 84c5712..1504a73 100755..100644
--- a/rtl8723DS/hal/hal_phy.c
+++ b/rtl8723DS/hal/hal_phy.c
@@ -16,12 +16,6 @@
 
 #include <drv_types.h>
 
-/* ********************************************************************************
- *	Constant.
- * ********************************************************************************
- * 2008/11/20 MH For Debug only, RF */
-static RF_SHADOW_T RF_Shadow[RF6052_MAX_PATH][RF6052_MAX_REG];
-
 /**
 * Function:	PHY_CalculateBitShift
 *
@@ -49,6 +43,13 @@ PHY_CalculateBitShift(
 }
 
 
+#ifdef CONFIG_RF_SHADOW_RW
+/* ********************************************************************************
+ *	Constant.
+ * ********************************************************************************
+ * 2008/11/20 MH For Debug only, RF */
+static RF_SHADOW_T RF_Shadow[RF6052_MAX_PATH][RF6052_MAX_REG];
+
 /*
  * ==> RF shadow Operation API Code Section!!!
  *
@@ -253,3 +254,4 @@ PHY_RFShadowRefresh(
 	}
 
 }	/* PHY_RFShadowRead */
+#endif /*CONFIG_RF_SHADOW_RW*/
diff --git a/rtl8723DS/hal/led/hal_led.c b/rtl8723DS/hal/led/hal_led.c
new file mode 100644
index 0000000..95d3daa
--- a/dev/null
+++ b/rtl8723DS/hal/led/hal_led.c
@@ -0,0 +1,254 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2007 - 2017 Realtek Corporation.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ *****************************************************************************/
+
+#include <drv_types.h>
+#include <hal_data.h>
+
+#ifdef CONFIG_RTW_LED
+void dump_led_config(void *sel, _adapter *adapter)
+{
+	struct dvobj_priv *dvobj = adapter_to_dvobj(adapter);
+	struct led_priv	*ledpriv = adapter_to_led(adapter);
+	int i;
+
+	RTW_PRINT_SEL(sel, "strategy:%u\n", ledpriv->LedStrategy);
+#ifdef CONFIG_RTW_SW_LED
+	RTW_PRINT_SEL(sel, "bRegUseLed:%u\n", ledpriv->bRegUseLed);
+	RTW_PRINT_SEL(sel, "iface_en_mask:0x%02X\n", ledpriv->iface_en_mask);
+	for (i = 0; i < dvobj->iface_nums; i++)
+		RTW_PRINT_SEL(sel, "ctl_en_mask[%d]:0x%08X\n", i, ledpriv->ctl_en_mask[i]);
+#endif
+}
+
+void rtw_led_set_strategy(_adapter *adapter, u8 strategy)
+{
+	struct led_priv *ledpriv = adapter_to_led(adapter);
+	_adapter *pri_adapter = GET_PRIMARY_ADAPTER(adapter);
+
+#ifndef CONFIG_RTW_SW_LED
+	if (IS_SW_LED_STRATEGY(strategy)) {
+		RTW_WARN("CONFIG_RTW_SW_LED is not defined\n");
+		return;
+	}
+#endif
+
+#ifdef CONFIG_RTW_SW_LED
+	if (!ledpriv->bRegUseLed)
+		return;
+#endif
+
+	if (ledpriv->LedStrategy == strategy)
+		return;
+
+	if (IS_HW_LED_STRATEGY(strategy) || IS_HW_LED_STRATEGY(ledpriv->LedStrategy)) {
+		RTW_WARN("switching on/off HW_LED strategy is not supported\n");
+		return;
+	}
+
+	ledpriv->LedStrategy = strategy;
+
+#ifdef CONFIG_RTW_SW_LED
+	rtw_hal_sw_led_deinit(pri_adapter);
+#endif
+
+	rtw_led_control(pri_adapter, RTW_LED_OFF);
+}
+
+#ifdef CONFIG_RTW_SW_LED
+#if CONFIG_RTW_SW_LED_TRX_DA_CLASSIFY
+void rtw_sw_led_blink_uc_trx_only(LED_DATA *led)
+{
+	_adapter *adapter = led->padapter;
+	BOOLEAN bStopBlinking = _FALSE;
+
+	if (led->BlinkingLedState == RTW_LED_ON)
+		SwLedOn(adapter, led);
+	else
+		SwLedOff(adapter, led);
+
+	switch (led->CurrLedState) {
+	case RTW_LED_ON:
+		SwLedOn(adapter, led);
+		break;
+
+	case RTW_LED_OFF:
+		SwLedOff(adapter, led);
+		break;
+
+	case LED_BLINK_TXRX:
+		led->BlinkTimes--;
+		if (led->BlinkTimes == 0)
+			bStopBlinking = _TRUE;
+
+		if (adapter_to_pwrctl(adapter)->rf_pwrstate != rf_on
+			&& adapter_to_pwrctl(adapter)->rfoff_reason > RF_CHANGE_BY_PS
+		) {
+			SwLedOff(adapter, led);
+			led->bLedBlinkInProgress = _FALSE;
+		} else {
+			if (led->bLedOn)
+				led->BlinkingLedState = RTW_LED_OFF;
+			else
+				led->BlinkingLedState = RTW_LED_ON;
+			
+			if (bStopBlinking) {
+				led->CurrLedState = RTW_LED_OFF;
+				led->bLedBlinkInProgress = _FALSE;
+			}
+			_set_timer(&(led->BlinkTimer), LED_BLINK_FASTER_INTERVAL_ALPHA);
+		}
+		break;
+
+	default:
+		break;
+	}
+}
+
+void rtw_sw_led_ctl_mode_uc_trx_only(_adapter *adapter, LED_CTL_MODE ctl)
+{
+	struct led_priv	*ledpriv = adapter_to_led(adapter);
+	LED_DATA *led = &(ledpriv->SwLed0);
+	LED_DATA *led1 = &(ledpriv->SwLed1);
+	LED_DATA *led2 = &(ledpriv->SwLed2);
+
+	switch (ctl) {
+	case LED_CTL_UC_TX:
+	case LED_CTL_UC_RX:
+		if (led->bLedBlinkInProgress == _FALSE) {
+			led->bLedBlinkInProgress = _TRUE;
+			led->CurrLedState = LED_BLINK_TXRX;
+			led->BlinkTimes = 2;
+			if (led->bLedOn)
+				led->BlinkingLedState = RTW_LED_OFF;
+			else
+				led->BlinkingLedState = RTW_LED_ON;
+			_set_timer(&(led->BlinkTimer), LED_BLINK_FASTER_INTERVAL_ALPHA);
+		}
+		break;
+
+	case LED_CTL_POWER_OFF:
+		led->CurrLedState = RTW_LED_OFF;
+		led->BlinkingLedState = RTW_LED_OFF;
+
+		if (led->bLedBlinkInProgress) {
+			_cancel_timer_ex(&(led->BlinkTimer));
+			led->bLedBlinkInProgress = _FALSE;
+		}
+
+		SwLedOff(adapter, led);
+		SwLedOff(adapter, led1);
+		SwLedOff(adapter, led2);
+		break;
+
+	default:
+		break;
+	}
+}
+#endif /* CONFIG_RTW_SW_LED_TRX_DA_CLASSIFY */
+
+void rtw_led_control(_adapter *adapter, LED_CTL_MODE ctl)
+{
+	struct led_priv	*ledpriv = adapter_to_led(adapter);
+
+	if (ledpriv->LedControlHandler) {
+		#if CONFIG_RTW_SW_LED_TRX_DA_CLASSIFY
+		if (ledpriv->LedStrategy != SW_LED_MODE_UC_TRX_ONLY) {
+			if (ctl == LED_CTL_UC_TX || ctl == LED_CTL_BMC_TX) {
+				if (ledpriv->ctl_en_mask[adapter->iface_id] & BIT(LED_CTL_TX))
+					ctl = LED_CTL_TX; /* transform specific TX ctl to general TX ctl */
+			} else if (ctl == LED_CTL_UC_RX || ctl == LED_CTL_BMC_RX) {
+				if (ledpriv->ctl_en_mask[adapter->iface_id] & BIT(LED_CTL_RX))
+					ctl = LED_CTL_RX; /* transform specific RX ctl to general RX ctl */
+			}
+		}
+		#endif
+
+		if ((ledpriv->iface_en_mask & BIT(adapter->iface_id))
+			&& (ledpriv->ctl_en_mask[adapter->iface_id] & BIT(ctl)))
+			ledpriv->LedControlHandler(adapter, ctl);
+	}
+}
+
+void rtw_led_tx_control(_adapter *adapter, const u8 *da)
+{
+#if CONFIG_RTW_SW_LED_TRX_DA_CLASSIFY
+	if (IS_MCAST(da))
+		rtw_led_control(adapter, LED_CTL_BMC_TX);
+	else
+		rtw_led_control(adapter, LED_CTL_UC_TX);
+#else
+	rtw_led_control(adapter, LED_CTL_TX);
+#endif
+}
+
+void rtw_led_rx_control(_adapter *adapter, const u8 *da)
+{
+#if CONFIG_RTW_SW_LED_TRX_DA_CLASSIFY
+	if (IS_MCAST(da))
+		rtw_led_control(adapter, LED_CTL_BMC_RX);
+	else
+		rtw_led_control(adapter, LED_CTL_UC_RX);
+#else
+	rtw_led_control(adapter, LED_CTL_RX);
+#endif
+}
+
+void rtw_led_set_iface_en(_adapter *adapter, u8 en)
+{
+	struct led_priv *ledpriv = adapter_to_led(adapter);
+
+	if (en)
+		ledpriv->iface_en_mask |= BIT(adapter->iface_id);
+	else
+		ledpriv->iface_en_mask &= ~BIT(adapter->iface_id);
+}
+
+void rtw_led_set_iface_en_mask(_adapter *adapter, u8 mask)
+{
+	struct led_priv *ledpriv = adapter_to_led(adapter);
+
+	ledpriv->iface_en_mask = mask;
+}
+
+void rtw_led_set_ctl_en_mask(_adapter *adapter, u32 ctl_mask)
+{
+	struct led_priv *ledpriv = adapter_to_led(adapter);
+	
+#if CONFIG_RTW_SW_LED_TRX_DA_CLASSIFY
+	if (ctl_mask & BIT(LED_CTL_TX))
+		ctl_mask |= BIT(LED_CTL_UC_TX) | BIT(LED_CTL_BMC_TX);
+	if (ctl_mask & BIT(LED_CTL_RX))
+		ctl_mask |= BIT(LED_CTL_UC_RX) | BIT(LED_CTL_BMC_RX);
+#endif
+
+	ledpriv->ctl_en_mask[adapter->iface_id] = ctl_mask;
+}
+
+void rtw_led_set_ctl_en_mask_primary(_adapter *adapter)
+{
+	rtw_led_set_ctl_en_mask(adapter, 0xFFFFFFFF);
+}
+
+void rtw_led_set_ctl_en_mask_virtual(_adapter *adapter)
+{
+	rtw_led_set_ctl_en_mask(adapter
+		, BIT(LED_CTL_POWER_ON) | BIT(LED_CTL_POWER_OFF)
+		| BIT(LED_CTL_TX) | BIT(LED_CTL_RX)
+	);
+}
+#endif /* CONFIG_RTW_SW_LED */
+
+#endif /* CONFIG_RTW_LED */
+
diff --git a/rtl8723DS/hal/led/hal_sdio_led.c b/rtl8723DS/hal/led/hal_sdio_led.c
index ffe004d..aeedfdd 100755..100644
--- a/rtl8723DS/hal/led/hal_sdio_led.c
+++ b/rtl8723DS/hal/led/hal_sdio_led.c
@@ -119,7 +119,7 @@ SwLedBlink1(
 {
 	_adapter				*padapter = pLed->padapter;
 	PHAL_DATA_TYPE		pHalData = GET_HAL_DATA(padapter);
-	struct led_priv		*ledpriv = &(padapter->ledpriv);
+	struct led_priv		*ledpriv = adapter_to_led(padapter);
 	struct mlme_priv		*pmlmepriv = &(padapter->mlmepriv);
 	PLED_SDIO			pLed1 = &(ledpriv->SwLed1);
 	u8					bStopBlinking = _FALSE;
@@ -503,7 +503,7 @@ SwLedBlink4(
 )
 {
 	_adapter			*padapter = pLed->padapter;
-	struct led_priv	*ledpriv = &(padapter->ledpriv);
+	struct led_priv	*ledpriv = adapter_to_led(padapter);
 	struct mlme_priv	*pmlmepriv = &(padapter->mlmepriv);
 	PLED_SDIO		pLed1 = &(ledpriv->SwLed1);
 	u8				bStopBlinking = _FALSE;
@@ -767,7 +767,7 @@ SwLedBlink6(
 void BlinkHandler(PLED_SDIO	pLed)
 {
 	_adapter		*padapter = pLed->padapter;
-	struct led_priv	*ledpriv = &(padapter->ledpriv);
+	struct led_priv	*ledpriv = adapter_to_led(padapter);
 
 	/* RTW_INFO("%s (%s:%d)\n",__FUNCTION__, current->comm, current->pid); */
 	if (RTW_CANNOT_RUN(padapter) || (!rtw_is_hw_init_completed(padapter))) {
@@ -780,6 +780,12 @@ void BlinkHandler(PLED_SDIO	pLed)
 	}
 
 	switch (ledpriv->LedStrategy) {
+	#if CONFIG_RTW_SW_LED_TRX_DA_CLASSIFY
+	case SW_LED_MODE_UC_TRX_ONLY:
+		rtw_sw_led_blink_uc_trx_only(pLed);
+		break;
+	#endif
+
 	case SW_LED_MODE0:
 		SwLedBlink(pLed);
 		break;
@@ -858,7 +864,7 @@ SwLedControlMode0(
 	LED_CTL_MODE		LedAction
 )
 {
-	struct led_priv	*ledpriv = &(padapter->ledpriv);
+	struct led_priv	*ledpriv = adapter_to_led(padapter);
 	PLED_SDIO	pLed = &(ledpriv->SwLed1);
 
 	/* Decide led state */
@@ -960,7 +966,7 @@ SwLedControlMode1(
 	LED_CTL_MODE		LedAction
 )
 {
-	struct led_priv		*ledpriv = &(padapter->ledpriv);
+	struct led_priv		*ledpriv = adapter_to_led(padapter);
 	PLED_SDIO			pLed = &(ledpriv->SwLed0);
 	struct mlme_priv		*pmlmepriv = &(padapter->mlmepriv);
 	PHAL_DATA_TYPE		pHalData = GET_HAL_DATA(padapter);
@@ -1189,7 +1195,7 @@ SwLedControlMode2(
 	LED_CTL_MODE		LedAction
 )
 {
-	struct led_priv	*ledpriv = &(padapter->ledpriv);
+	struct led_priv	*ledpriv = adapter_to_led(padapter);
 	struct mlme_priv	*pmlmepriv = &padapter->mlmepriv;
 	PLED_SDIO		pLed = &(ledpriv->SwLed0);
 
@@ -1328,7 +1334,7 @@ SwLedControlMode3(
 	LED_CTL_MODE		LedAction
 )
 {
-	struct led_priv	*ledpriv = &(padapter->ledpriv);
+	struct led_priv	*ledpriv = adapter_to_led(padapter);
 	struct mlme_priv	*pmlmepriv = &padapter->mlmepriv;
 	PLED_SDIO		pLed = &(ledpriv->SwLed0);
 
@@ -1483,7 +1489,7 @@ SwLedControlMode4(
 	LED_CTL_MODE		LedAction
 )
 {
-	struct led_priv	*ledpriv = &(padapter->ledpriv);
+	struct led_priv	*ledpriv = adapter_to_led(padapter);
 	struct mlme_priv	*pmlmepriv = &padapter->mlmepriv;
 	PLED_SDIO		pLed = &(ledpriv->SwLed0);
 	PLED_SDIO		pLed1 = &(ledpriv->SwLed1);
@@ -1773,7 +1779,7 @@ SwLedControlMode5(
 	LED_CTL_MODE		LedAction
 )
 {
-	struct led_priv	*ledpriv = &(padapter->ledpriv);
+	struct led_priv	*ledpriv = adapter_to_led(padapter);
 	struct mlme_priv	*pmlmepriv = &padapter->mlmepriv;
 	PHAL_DATA_TYPE	pHalData = GET_HAL_DATA(padapter);
 	PLED_SDIO		pLed = &(ledpriv->SwLed0);
@@ -1852,7 +1858,7 @@ SwLedControlMode6(
 	LED_CTL_MODE		LedAction
 )
 {
-	struct led_priv	*ledpriv = &(padapter->ledpriv);
+	struct led_priv	*ledpriv = adapter_to_led(padapter);
 	struct mlme_priv	*pmlmepriv = &padapter->mlmepriv;
 	PLED_SDIO pLed0 = &(ledpriv->SwLed0);
 
@@ -1882,7 +1888,7 @@ LedControlSDIO(
 	LED_CTL_MODE		LedAction
 )
 {
-	struct led_priv	*ledpriv = &(padapter->ledpriv);
+	struct led_priv	*ledpriv = adapter_to_led(padapter);
 
 #if (MP_DRIVER == 1)
 	if (padapter->registrypriv.mp_mode == 1)
@@ -1903,12 +1909,6 @@ LedControlSDIO(
 	/* if(priv->bInHctTest) */
 	/*	return; */
 
-#ifdef CONFIG_CONCURRENT_MODE
-	/* Only do led action for PRIMARY_ADAPTER */
-	if (padapter->adapter_type != PRIMARY_ADAPTER)
-		return;
-#endif
-
 	if ((adapter_to_pwrctl(padapter)->rf_pwrstate != rf_on &&
 	     adapter_to_pwrctl(padapter)->rfoff_reason > RF_CHANGE_BY_PS) &&
 	    (LedAction == LED_CTL_TX || LedAction == LED_CTL_RX ||
@@ -1919,6 +1919,12 @@ LedControlSDIO(
 		return;
 
 	switch (ledpriv->LedStrategy) {
+	#if CONFIG_RTW_SW_LED_TRX_DA_CLASSIFY
+	case SW_LED_MODE_UC_TRX_ONLY:
+		rtw_sw_led_ctl_mode_uc_trx_only(padapter, LedAction);
+		break;
+	#endif
+
 	case SW_LED_MODE0:
 		SwLedControlMode0(padapter, LedAction);
 		break;
diff --git a/rtl8723DS/hal/phydm/ap_makefile.mk b/rtl8723DS/hal/phydm/ap_makefile.mk
index 566c74c..def4490 100755..100644
--- a/rtl8723DS/hal/phydm/ap_makefile.mk
+++ b/rtl8723DS/hal/phydm/ap_makefile.mk
@@ -1,119 +1,188 @@
-

-_PHYDM_FILES :=\

-	phydm/phydm.o \

-	phydm/phydm_dig.o\

-	phydm/phydm_antdiv.o\

-	phydm/phydm_soml.o\

-	phydm/phydm_smt_ant.o\

-	phydm/phydm_pathdiv.o\

-	phydm/phydm_rainfo.o\

-	phydm/phydm_dynamictxpower.o\

-	phydm/phydm_adaptivity.o\

-	phydm/phydm_debug.o\

-	phydm/phydm_interface.o\

-	phydm/phydm_phystatus.o\

-	phydm/phydm_hwconfig.o\

-	phydm/phydm_dfs.o\

-	phydm/phydm_cfotracking.o\

-	phydm/phydm_acs.o\

-	phydm/phydm_adc_sampling.o\

-	phydm/phydm_ccx.o\

-	phydm/phydm_primary_cca.o\

-	phydm/phydm_cck_pd.o\

-	phydm/phydm_rssi_monitor.o\

-	phydm/phydm_auto_dbg.o\

-	phydm/phydm_math_lib.o\

-	phydm/phydm_noisemonitor.o\

-	phydm/phydm_api.o\

-	phydm/phydm_pow_train.o\

-	phydm/txbf/phydm_hal_txbf_api.o\

-	EdcaTurboCheck.o\

-	phydm/halrf/halrf.o\

-	phydm/halrf/halphyrf_ap.o\

-	phydm/halrf/halrf_powertracking_ap.o\

-	phydm/halrf/halrf_powertracking.o\

-	phydm/halrf/halrf_kfree.o

-

-ifeq ($(CONFIG_RTL_88E_SUPPORT),y)

-	ifeq ($(CONFIG_RTL_ODM_WLAN_DRIVER),y)

-		_PHYDM_FILES += \

-		phydm/rtl8188e/halhwimg8188e_bb.o\

-		phydm/rtl8188e/halhwimg8188e_mac.o\

-		phydm/rtl8188e/halhwimg8188e_rf.o\

-		phydm/rtl8188e/phydm_regconfig8188e.o\

-		phydm/rtl8188e/hal8188erateadaptive.o\

-		phydm/rtl8188e/phydm_rtl8188e.o\

-		phydm/halrf/rtl8188e/halrf_8188e_ap.o

-	endif

-endif

-	

-ifeq ($(CONFIG_RTL_8812_SUPPORT),y)

-	ifeq ($(CONFIG_RTL_ODM_WLAN_DRIVER),y)

-		_PHYDM_FILES += ./phydm/halrf/rtl8812a/halrf_8812a_ap.o

-	endif

-endif

-	

-ifeq ($(CONFIG_WLAN_HAL_8881A),y)

-	_PHYDM_FILES += phydm/halrf/rtl8821a/halrf_iqk_8821a_ap.o

-endif

-

-ifeq ($(CONFIG_WLAN_HAL_8192EE),y)

-	_PHYDM_FILES += \

-	phydm/halrf/rtl8192e/halrf_8192e_ap.o\

-	phydm/rtl8192e/phydm_rtl8192e.o

-endif

-

-ifeq ($(CONFIG_WLAN_HAL_8814AE),y)

-	rtl8192cd-objs += phydm/halrf/rtl8814a/halrf_8814a_ap.o

-	rtl8192cd-objs += phydm/halrf/rtl8814a/halrf_iqk_8814a.o

-	ifeq ($(CONFIG_RTL_ODM_WLAN_DRIVER),y)

-		rtl8192cd-objs += \

-		phydm/rtl8814a/halhwimg8814a_bb.o\

-		phydm/rtl8814a/halhwimg8814a_mac.o\

-		phydm/rtl8814a/halhwimg8814a_rf.o\

-		phydm/rtl8814a/phydm_regconfig8814a.o\

-		phydm/rtl8814a/phydm_rtl8814a.o			

-	endif

-endif

-	

-ifeq ($(CONFIG_WLAN_HAL_8822BE),y)

-	_PHYDM_FILES += phydm/halrf/rtl8822b/halrf_8822b.o

-	_PHYDM_FILES += phydm/halrf/rtl8822b/halrf_iqk_8822b.o

-	ifeq ($(CONFIG_RTL_ODM_WLAN_DRIVER),y)

-		_PHYDM_FILES += \

-		phydm/rtl8822b/halhwimg8822b_bb.o\

-		phydm/rtl8822b/halhwimg8822b_mac.o\

-		phydm/rtl8822b/halhwimg8822b_rf.o\

-		phydm/rtl8822b/phydm_regconfig8822b.o\

-		phydm/rtl8822b/phydm_hal_api8822b.o\

-		phydm/rtl8822b/phydm_rtl8822b.o

-	endif

-endif

-

-ifeq ($(CONFIG_WLAN_HAL_8821CE),y)

-	_PHYDM_FILES += phydm/halrf/rtl8821c/halrf_8821c.o

-	_PHYDM_FILES += phydm/halrf/rtl8821c/halrf_iqk_8821c.o

-	ifeq ($(CONFIG_RTL_ODM_WLAN_DRIVER),y)

-		_PHYDM_FILES += \

-		phydm/rtl8821c/halhwimg8821c_bb.o\

-		phydm/rtl8821c/halhwimg8821c_mac.o\

-		phydm/rtl8821c/halhwimg8821c_rf.o\

-		phydm/rtl8821c/phydm_regconfig8821c.o\

-		phydm/rtl8821c/phydm_hal_api8821c.o

-	endif

-endif

-	

-ifeq ($(CONFIG_WLAN_HAL_8197F),y)

-		_PHYDM_FILES += phydm/halrf/rtl8197f/halrf_8197f.o

-		_PHYDM_FILES += phydm/halrf/rtl8197f/halrf_iqk_8197f.o

-		_PHYDM_FILES += efuse_97f/efuse.o

-	ifeq ($(CONFIG_RTL_ODM_WLAN_DRIVER),y)

-		_PHYDM_FILES += \

-		phydm/rtl8197f/halhwimg8197f_bb.o\

-		phydm/rtl8197f/halhwimg8197f_mac.o\

-		phydm/rtl8197f/halhwimg8197f_rf.o\

-		phydm/rtl8197f/phydm_hal_api8197f.o\

-		phydm/rtl8197f/phydm_regconfig8197f.o\

-		phydm/rtl8197f/phydm_rtl8197f.o

-	endif

-endif

+
+_PHYDM_FILES :=\
+	phydm/phydm.o \
+	phydm/phydm_dig.o\
+	phydm/phydm_antdiv.o\
+	phydm/phydm_soml.o\
+	phydm/phydm_smt_ant.o\
+	phydm/phydm_pathdiv.o\
+	phydm/phydm_rainfo.o\
+	phydm/phydm_dynamictxpower.o\
+	phydm/phydm_adaptivity.o\
+	phydm/phydm_debug.o\
+	phydm/phydm_interface.o\
+	phydm/phydm_phystatus.o\
+	phydm/phydm_hwconfig.o\
+	phydm/phydm_dfs.o\
+	phydm/phydm_cfotracking.o\
+	phydm/phydm_adc_sampling.o\
+	phydm/phydm_ccx.o\
+	phydm/phydm_primary_cca.o\
+	phydm/phydm_cck_pd.o\
+	phydm/phydm_rssi_monitor.o\
+	phydm/phydm_auto_dbg.o\
+	phydm/phydm_math_lib.o\
+	phydm/phydm_noisemonitor.o\
+	phydm/phydm_api.o\
+	phydm/phydm_pow_train.o\
+	phydm/phydm_lna_sat.o\
+	phydm/phydm_pmac_tx_setting.o\
+	phydm/phydm_mp.o\
+	phydm/txbf/phydm_hal_txbf_api.o\
+	EdcaTurboCheck.o\
+	phydm/halrf/halrf.o\
+	phydm/halrf/halrf_debug.o\
+	phydm/halrf/halphyrf_ap.o\
+	phydm/halrf/halrf_powertracking_ap.o\
+	phydm/halrf/halrf_powertracking.o\
+	phydm/halrf/halrf_kfree.o
+
+ifeq ($(CONFIG_RTL_88E_SUPPORT),y)
+	ifeq ($(CONFIG_RTL_ODM_WLAN_DRIVER),y)
+		_PHYDM_FILES += \
+		phydm/rtl8188e/halhwimg8188e_bb.o\
+		phydm/rtl8188e/halhwimg8188e_mac.o\
+		phydm/rtl8188e/halhwimg8188e_rf.o\
+		phydm/rtl8188e/phydm_regconfig8188e.o\
+		phydm/rtl8188e/hal8188erateadaptive.o\
+		phydm/rtl8188e/phydm_rtl8188e.o\
+		phydm/halrf/rtl8188e/halrf_8188e_ap.o
+	endif
+endif
+
+ifeq ($(CONFIG_RTL_8812_SUPPORT),y)
+	ifeq ($(CONFIG_RTL_ODM_WLAN_DRIVER),y)
+		_PHYDM_FILES += ./phydm/halrf/rtl8812a/halrf_8812a_ap.o
+	endif
+	_PHYDM_FILES += phydm/rtl8812a/phydm_rtl8812a.o
+endif
+
+ifeq ($(CONFIG_WLAN_HAL_8881A),y)
+	_PHYDM_FILES += phydm/halrf/rtl8821a/halrf_iqk_8821a_ap.o
+endif
+
+ifeq ($(CONFIG_WLAN_HAL_8192EE),y)
+	_PHYDM_FILES += \
+	phydm/halrf/rtl8192e/halrf_8192e_ap.o\
+	phydm/rtl8192e/phydm_rtl8192e.o
+endif
+
+ifeq ($(CONFIG_WLAN_HAL_8814AE),y)
+	rtl8192cd-objs += phydm/halrf/rtl8814a/halrf_8814a_ap.o
+	rtl8192cd-objs += phydm/halrf/rtl8814a/halrf_iqk_8814a.o
+	ifeq ($(CONFIG_RTL_ODM_WLAN_DRIVER),y)
+		rtl8192cd-objs += \
+		phydm/rtl8814a/halhwimg8814a_bb.o\
+		phydm/rtl8814a/halhwimg8814a_mac.o\
+		phydm/rtl8814a/halhwimg8814a_rf.o\
+		phydm/rtl8814a/phydm_regconfig8814a.o\
+		phydm/rtl8814a/phydm_rtl8814a.o
+	endif
+endif
+
+ifeq ($(CONFIG_WLAN_HAL_8822BE),y)
+	_PHYDM_FILES += phydm/halrf/rtl8822b/halrf_8822b.o
+	_PHYDM_FILES += phydm/halrf/rtl8822b/halrf_iqk_8822b.o
+	ifeq ($(CONFIG_RTL_ODM_WLAN_DRIVER),y)
+		_PHYDM_FILES += \
+		phydm/rtl8822b/halhwimg8822b_bb.o\
+		phydm/rtl8822b/halhwimg8822b_mac.o\
+		phydm/rtl8822b/halhwimg8822b_rf.o\
+		phydm/rtl8822b/phydm_regconfig8822b.o\
+		phydm/rtl8822b/phydm_hal_api8822b.o\
+		phydm/rtl8822b/phydm_rtl8822b.o
+	endif
+endif
+
+ifeq ($(CONFIG_WLAN_HAL_8822CE),y)
+	_PHYDM_FILES += phydm/halrf/rtl8822c/halrf_8822c.o
+	_PHYDM_FILES += phydm/halrf/rtl8822c/halrf_iqk_8822c.o
+	_PHYDM_FILES += phydm/halrf/rtl8822c/halrf_dpk_8822c.o
+	_PHYDM_FILES += phydm/halrf/rtl8822c/halrf_rfk_init_8822c.o	
+	ifeq ($(CONFIG_RTL_ODM_WLAN_DRIVER),y)
+		_PHYDM_FILES += \
+		phydm/rtl8822c/halhwimg8822c_bb.o\
+		phydm/rtl8822c/halhwimg8822c_mac.o\
+		phydm/rtl8822c/halhwimg8822c_rf.o\
+		phydm/rtl8822c/phydm_regconfig8822c.o\
+		phydm/rtl8822c/phydm_hal_api8822c.o
+	endif
+endif
+
+ifeq ($(CONFIG_WLAN_HAL_8821CE),y)
+	_PHYDM_FILES += phydm/halrf/rtl8821c/halrf_8821c.o
+	_PHYDM_FILES += phydm/halrf/rtl8821c/halrf_iqk_8821c.o
+	ifeq ($(CONFIG_RTL_ODM_WLAN_DRIVER),y)
+		_PHYDM_FILES += \
+		phydm/rtl8821c/halhwimg8821c_bb.o\
+		phydm/rtl8821c/halhwimg8821c_mac.o\
+		phydm/rtl8821c/halhwimg8821c_rf.o\
+		phydm/rtl8821c/phydm_regconfig8821c.o\
+		phydm/rtl8821c/phydm_hal_api8821c.o
+	endif
+endif
+
+ifeq ($(CONFIG_WLAN_HAL_8197F),y)
+		_PHYDM_FILES += phydm/halrf/rtl8197f/halrf_8197f.o
+		_PHYDM_FILES += phydm/halrf/rtl8197f/halrf_iqk_8197f.o
+		_PHYDM_FILES += phydm/halrf/rtl8197f/halrf_dpk_8197f.o
+		_PHYDM_FILES += efuse_97f/efuse.o
+	ifeq ($(CONFIG_RTL_ODM_WLAN_DRIVER),y)
+		_PHYDM_FILES += \
+		phydm/rtl8197f/halhwimg8197f_bb.o\
+		phydm/rtl8197f/halhwimg8197f_mac.o\
+		phydm/rtl8197f/halhwimg8197f_rf.o\
+		phydm/rtl8197f/phydm_hal_api8197f.o\
+		phydm/rtl8197f/phydm_regconfig8197f.o\
+		phydm/rtl8197f/phydm_rtl8197f.o
+	endif
+endif
+
+
+ifeq ($(CONFIG_WLAN_HAL_8192FE),y)
+		_PHYDM_FILES += phydm/halrf/rtl8192f/halrf_8192f.o
+		_PHYDM_FILES += phydm/halrf/rtl8192f/halrf_dpk_8192f.o
+	ifeq ($(CONFIG_RTL_ODM_WLAN_DRIVER),y)
+		_PHYDM_FILES += \
+		phydm/rtl8192f/halhwimg8192f_bb.o\
+		phydm/rtl8192f/halhwimg8192f_mac.o\
+		phydm/rtl8192f/halhwimg8192f_rf.o\
+		phydm/rtl8192f/phydm_hal_api8192f.o\
+		phydm/rtl8192f/phydm_regconfig8192f.o\
+		phydm/rtl8192f/phydm_rtl8192f.o
+	endif
+endif
+
+ifeq ($(CONFIG_WLAN_HAL_8198F),y)
+		_PHYDM_FILES += phydm/halrf/rtl8198f/halrf_8198f.o
+		_PHYDM_FILES += phydm/halrf/rtl8198f/halrf_iqk_8198f.o
+		_PHYDM_FILES += phydm/halrf/rtl8198f/halrf_dpk_8198f.o
+		_PHYDM_FILES += phydm/halrf/rtl8198f/halrf_rfk_init_8198f.o
+	ifeq ($(CONFIG_RTL_ODM_WLAN_DRIVER),y)
+		_PHYDM_FILES += \
+		phydm/rtl8198f/phydm_hal_api8198f.o\
+		phydm/rtl8198f/halhwimg8198f_bb.o\
+		phydm/rtl8198f/halhwimg8198f_mac.o\
+		phydm/rtl8198f/halhwimg8198f_rf.o\
+		phydm/rtl8198f/phydm_regconfig8198f.o \
+		phydm/halrf/rtl8198f/halrf_8198f.o
+	endif
+endif
+
+ifeq ($(CONFIG_WLAN_HAL_8814BE),y)
+		_PHYDM_FILES += phydm/halrf/rtl8814b/halrf_8814b.o
+		_PHYDM_FILES += phydm/halrf/rtl8814b/halrf_iqk_8814b.o
+		_PHYDM_FILES += phydm/halrf/rtl8814b/halrf_rfk_init_8814b.o
+	ifeq ($(CONFIG_RTL_ODM_WLAN_DRIVER),y)
+		_PHYDM_FILES += \
+		phydm/rtl8814b/phydm_hal_api8814b.o\
+		phydm/rtl8814b/halhwimg8814b_bb.o\
+		phydm/rtl8814b/halhwimg8814b_mac.o\
+		phydm/rtl8814b/halhwimg8814b_rf.o\
+		phydm/rtl8814b/phydm_regconfig8814b.o \
+		phydm/halrf/rtl8814b/halrf_8814b.o
+	endif
+endif
+
+
+
diff --git a/rtl8723DS/hal/phydm/halhwimg.h b/rtl8723DS/hal/phydm/halhwimg.h
index e8f5802..6d658b3 100755..100644
--- a/rtl8723DS/hal/phydm/halhwimg.h
+++ b/rtl8723DS/hal/phydm/halhwimg.h
@@ -16,76 +16,76 @@
 #ifndef __INC_HW_IMG_H
 #define __INC_HW_IMG_H
 
-/*
+/*@
  * 2011/03/15 MH Add for different IC HW image file selection. code size consideration.
  *   */
 #if RT_PLATFORM == PLATFORM_LINUX
 
 	#if (DEV_BUS_TYPE == RT_PCI_INTERFACE)
-		/* For 92C */
+		/* @For 92C */
 		#define		RTL8192CE_HWIMG_SUPPORT					1
 		#define		RTL8192CE_TEST_HWIMG_SUPPORT			0
 		#define		RTL8192CU_HWIMG_SUPPORT					0
 		#define		RTL8192CU_TEST_HWIMG_SUPPORT			0
 
-		/* For 92D */
+		/* @For 92D */
 		#define		RTL8192DE_HWIMG_SUPPORT					1
 		#define		RTL8192DE_TEST_HWIMG_SUPPORT			0
 		#define		RTL8192DU_HWIMG_SUPPORT					0
 		#define		RTL8192DU_TEST_HWIMG_SUPPORT			0
 
-		/* For 8723 */
+		/* @For 8723 */
 		#define		RTL8723E_HWIMG_SUPPORT					1
 		#define		RTL8723U_HWIMG_SUPPORT					0
 		#define		RTL8723S_HWIMG_SUPPORT					0
 
-		/* For 88E */
+		/* @For 88E */
 		#define		RTL8188EE_HWIMG_SUPPORT					0
 		#define		RTL8188EU_HWIMG_SUPPORT					0
 		#define		RTL8188ES_HWIMG_SUPPORT					0
 
 	#elif (DEV_BUS_TYPE == RT_USB_INTERFACE)
-		/* For 92C */
+		/* @For 92C */
 		#define	RTL8192CE_HWIMG_SUPPORT				0
 		#define	RTL8192CE_TEST_HWIMG_SUPPORT			0
 		#define	RTL8192CU_HWIMG_SUPPORT				1
 		#define	RTL8192CU_TEST_HWIMG_SUPPORT			0
 
-		/* For 92D */
+		/* @For 92D */
 		#define	RTL8192DE_HWIMG_SUPPORT				0
 		#define	RTL8192DE_TEST_HWIMG_SUPPORT			0
 		#define	RTL8192DU_HWIMG_SUPPORT				1
 		#define	RTL8192DU_TEST_HWIMG_SUPPORT			0
 
-		/* For 8723 */
+		/* @For 8723 */
 		#define	RTL8723E_HWIMG_SUPPORT					0
 		#define	RTL8723U_HWIMG_SUPPORT					1
 		#define	RTL8723S_HWIMG_SUPPORT					0
 
-		/* For 88E */
+		/* @For 88E */
 		#define		RTL8188EE_HWIMG_SUPPORT					0
 		#define		RTL8188EU_HWIMG_SUPPORT					0
 		#define		RTL8188ES_HWIMG_SUPPORT					0
 
 	#elif (DEV_BUS_TYPE == RT_SDIO_INTERFACE)
-		/* For 92C */
+		/* @For 92C */
 		#define	RTL8192CE_HWIMG_SUPPORT				0
 		#define	RTL8192CE_TEST_HWIMG_SUPPORT			0
 		#define	RTL8192CU_HWIMG_SUPPORT				1
 		#define	RTL8192CU_TEST_HWIMG_SUPPORT			0
 
-		/* For 92D */
+		/* @For 92D */
 		#define	RTL8192DE_HWIMG_SUPPORT				0
 		#define	RTL8192DE_TEST_HWIMG_SUPPORT			0
 		#define	RTL8192DU_HWIMG_SUPPORT				1
 		#define	RTL8192DU_TEST_HWIMG_SUPPORT			0
 
-		/* For 8723 */
+		/* @For 8723 */
 		#define	RTL8723E_HWIMG_SUPPORT					0
 		#define	RTL8723U_HWIMG_SUPPORT					0
 		#define	RTL8723S_HWIMG_SUPPORT					1
 
-		/* For 88E */
+		/* @For 88E */
 		#define		RTL8188EE_HWIMG_SUPPORT					0
 		#define		RTL8188EU_HWIMG_SUPPORT					0
 		#define		RTL8188ES_HWIMG_SUPPORT					0
@@ -93,40 +93,40 @@
 
 #else	/* PLATFORM_WINDOWS & MacOSX */
 
-	/* For 92C */
+	/* @For 92C */
 	#define		RTL8192CE_HWIMG_SUPPORT						1
 	#define		RTL8192CE_TEST_HWIMG_SUPPORT				1
 	#define		RTL8192CU_HWIMG_SUPPORT						1
 	#define		RTL8192CU_TEST_HWIMG_SUPPORT				1
 
-	/* For 92D */
+	/* @For 92D */
 	#define		RTL8192DE_HWIMG_SUPPORT					1
 	#define		RTL8192DE_TEST_HWIMG_SUPPORT				1
 	#define		RTL8192DU_HWIMG_SUPPORT					1
 	#define		RTL8192DU_TEST_HWIMG_SUPPORT				1
 
 	#if defined(UNDER_CE)
-		/* For 8723 */
+		/* @For 8723 */
 		#define		RTL8723E_HWIMG_SUPPORT					0
 		#define		RTL8723U_HWIMG_SUPPORT					0
 		#define		RTL8723S_HWIMG_SUPPORT					1
 
-		/* For 88E */
+		/* @For 88E */
 		#define		RTL8188EE_HWIMG_SUPPORT					0
 		#define		RTL8188EU_HWIMG_SUPPORT					0
 		#define		RTL8188ES_HWIMG_SUPPORT					0
 
 	#else
 
-		/* For 8723 */
+		/* @For 8723 */
 		#define		RTL8723E_HWIMG_SUPPORT					1
-		/* #define		RTL_8723E_TEST_HWIMG_SUPPORT			1 */
+		/* @#define		RTL_8723E_TEST_HWIMG_SUPPORT			1 */
 		#define		RTL8723U_HWIMG_SUPPORT					1
-		/* #define		RTL_8723U_TEST_HWIMG_SUPPORT			1 */
+		/* @#define		RTL_8723U_TEST_HWIMG_SUPPORT			1 */
 		#define		RTL8723S_HWIMG_SUPPORT					1
-		/* #define		RTL_8723S_TEST_HWIMG_SUPPORT			1 */
+		/* @#define		RTL_8723S_TEST_HWIMG_SUPPORT			1 */
 
-		/* For 88E */
+		/* @For 88E */
 		#define		RTL8188EE_HWIMG_SUPPORT					1
 		#define		RTL8188EU_HWIMG_SUPPORT					1
 		#define		RTL8188ES_HWIMG_SUPPORT					1
@@ -134,4 +134,4 @@
 
 #endif
 
-#endif /* __INC_HW_IMG_H */
+#endif /* @__INC_HW_IMG_H */
diff --git a/rtl8723DS/hal/phydm/halrf/halphyrf_ap.c b/rtl8723DS/hal/phydm/halrf/halphyrf_ap.c
index 44fc908..c4967e2 100755..100644
--- a/rtl8723DS/hal/phydm/halrf/halphyrf_ap.c
+++ b/rtl8723DS/hal/phydm/halrf/halphyrf_ap.c
@@ -39,52 +39,61 @@
 
 
 void configure_txpower_track(
-	void		*p_dm_void,
-	struct _TXPWRTRACK_CFG	*p_config
+	void		*dm_void,
+	struct txpwrtrack_cfg	*config
 )
 {
-	struct PHY_DM_STRUCT		*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
+	struct dm_struct		*dm = (struct dm_struct *)dm_void;
 #if RTL8812A_SUPPORT
 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
-	/* if (IS_HARDWARE_TYPE_8812(p_dm->adapter)) */
-	if (p_dm->support_ic_type == ODM_RTL8812)
-		configure_txpower_track_8812a(p_config);
+	/* if (IS_HARDWARE_TYPE_8812(dm->adapter)) */
+	if (dm->support_ic_type == ODM_RTL8812)
+		configure_txpower_track_8812a(config);
 	/* else */
 #endif
 #endif
 
 #if RTL8814A_SUPPORT
-	if (p_dm->support_ic_type == ODM_RTL8814A)
-		configure_txpower_track_8814a(p_config);
+	if (dm->support_ic_type == ODM_RTL8814A)
+		configure_txpower_track_8814a(config);
 #endif
 
 
 #if RTL8188E_SUPPORT
-	if (p_dm->support_ic_type == ODM_RTL8188E)
-		configure_txpower_track_8188e(p_config);
+	if (dm->support_ic_type == ODM_RTL8188E)
+		configure_txpower_track_8188e(config);
 #endif
 
 #if RTL8197F_SUPPORT
-	if (p_dm->support_ic_type == ODM_RTL8197F)
-		configure_txpower_track_8197f(p_config);
+	if (dm->support_ic_type == ODM_RTL8197F)
+		configure_txpower_track_8197f(config);
 #endif
 
 #if RTL8822B_SUPPORT
-	if (p_dm->support_ic_type == ODM_RTL8822B)
-		configure_txpower_track_8822b(p_config);
+	if (dm->support_ic_type == ODM_RTL8822B)
+		configure_txpower_track_8822b(config);
 #endif
 
+#if RTL8192F_SUPPORT
+	if (dm->support_ic_type == ODM_RTL8192F)
+		configure_txpower_track_8192f(config);
+#endif
+
+#if RTL8198F_SUPPORT
+	if (dm->support_ic_type == ODM_RTL8198F)
+		configure_txpower_track_8198f(config);
+#endif
 
 }
 
 #if (RTL8192E_SUPPORT == 1)
 void
 odm_txpowertracking_callback_thermal_meter_92e(
-	void		*p_dm_void
+	void		*dm_void
 )
 {
-	struct PHY_DM_STRUCT		*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	struct _IQK_INFORMATION	*p_iqk_info = &p_dm->IQK_info;
+	struct dm_struct		*dm = (struct dm_struct *)dm_void;
+	struct dm_iqk_info	*iqk_info = &dm->IQK_info;
 	u8	thermal_value = 0, delta, delta_IQK, delta_LCK, channel, is_decrease, rf_mimo_mode;
 	u8	thermal_value_avg_count = 0;
 	u8     OFDM_min_index = 10; /* OFDM BB Swing should be less than +2.5dB, which is required by Arthur */
@@ -92,13 +101,13 @@ odm_txpowertracking_callback_thermal_meter_92e(
 	u32	thermal_value_avg = 0, reg0x18;
 	u32	i = 0, j = 0, rf;
 	s32	value32, CCK_index = 0, ele_A, ele_D, ele_C, X, Y;
-	struct rtl8192cd_priv	*priv = p_dm->priv;
+	struct rtl8192cd_priv	*priv = dm->priv;
 
-	rf_mimo_mode = p_dm->rf_type;
-	/* ODM_RT_TRACE(p_dm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,("%s:%d rf_mimo_mode:%d\n", __FUNCTION__, __LINE__, rf_mimo_mode)); */
+	rf_mimo_mode = dm->rf_type;
+	/* RF_DBG(dm,DBG_RF_TX_PWR_TRACK,"%s:%d rf_mimo_mode:%d\n", __FUNCTION__, __LINE__, rf_mimo_mode); */
 
 #ifdef MP_TEST
-	if ((OPMODE & WIFI_MP_STATE) || *(p_dm->p_mp_mode)) {
+	if ((OPMODE & WIFI_MP_STATE) || *(dm->mp_mode)) {
 		channel = priv->pshare->working_channel;
 		if (priv->pshare->mp_txpwr_tracking == false)
 			return;
@@ -108,8 +117,8 @@ odm_txpowertracking_callback_thermal_meter_92e(
 		channel = (priv->pmib->dot11RFEntry.dot11channel);
 	}
 
-	thermal_value = (unsigned char)odm_get_rf_reg(p_dm, RF_PATH_A, ODM_RF_T_METER_92E, 0xfc00);	/* 0x42: RF Reg[15:10] 88E */
-	ODM_RT_TRACE(p_dm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("\nReadback Thermal Meter = 0x%x pre thermal meter 0x%x EEPROMthermalmeter 0x%x\n", thermal_value, priv->pshare->thermal_value, priv->pmib->dot11RFEntry.ther));
+	thermal_value = (unsigned char)odm_get_rf_reg(dm, RF_PATH_A, ODM_RF_T_METER_92E, 0xfc00);	/* 0x42: RF Reg[15:10] 88E */
+	RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "\nReadback Thermal Meter = 0x%x pre thermal meter 0x%x EEPROMthermalmeter 0x%x\n", thermal_value, priv->pshare->thermal_value, priv->pmib->dot11RFEntry.ther);
 
 
 	switch (rf_mimo_mode) {
@@ -129,7 +138,7 @@ odm_txpowertracking_callback_thermal_meter_92e(
 	for (i = 0; i < OFDM_TABLE_SIZE_92E; i++) {
 		if (ele_D == (ofdm_swing_table_92e[i] >> 22)) {
 			OFDM_index[0] = (unsigned char)i;
-			ODM_RT_TRACE(p_dm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("PathA 0xC80[31:22] = 0x%x, OFDM_index=%d\n", ele_D, OFDM_index[0]));
+			RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "PathA 0xC80[31:22] = 0x%x, OFDM_index=%d\n", ele_D, OFDM_index[0]);
 			break;
 		}
 	}
@@ -140,7 +149,7 @@ odm_txpowertracking_callback_thermal_meter_92e(
 		for (i = 0; i < OFDM_TABLE_SIZE_92E; i++) {
 			if (ele_D == (ofdm_swing_table_92e[i] >> 22)) {
 				OFDM_index[1] = (unsigned char)i;
-				ODM_RT_TRACE(p_dm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("PathB 0xC88[31:22] = 0x%x, OFDM_index=%d\n", ele_D, OFDM_index[1]));
+				RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "PathB 0xC88[31:22] = 0x%x, OFDM_index=%d\n", ele_D, OFDM_index[1]);
 				break;
 			}
 		}
@@ -162,7 +171,7 @@ odm_txpowertracking_callback_thermal_meter_92e(
 
 		if (thermal_value_avg_count) {
 			thermal_value = (unsigned char)(thermal_value_avg / thermal_value_avg_count);
-			ODM_RT_TRACE(p_dm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("AVG Thermal Meter = 0x%x\n", thermal_value));
+			RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "AVG Thermal Meter = 0x%x\n", thermal_value);
 		}
 	}
 
@@ -174,8 +183,8 @@ odm_txpowertracking_callback_thermal_meter_92e(
 	}
 
 	if (thermal_value != priv->pshare->thermal_value) {
-		ODM_RT_TRACE(p_dm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("\n******** START POWER TRACKING ********\n"));
-		ODM_RT_TRACE(p_dm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("\nReadback Thermal Meter = 0x%x pre thermal meter 0x%x EEPROMthermalmeter 0x%x\n", thermal_value, priv->pshare->thermal_value, priv->pmib->dot11RFEntry.ther));
+		RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "\n******** START POWER TRACKING ********\n");
+		RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "\nReadback Thermal Meter = 0x%x pre thermal meter 0x%x EEPROMthermalmeter 0x%x\n", thermal_value, priv->pshare->thermal_value, priv->pmib->dot11RFEntry.ther);
 
 		delta = RTL_ABS(thermal_value, priv->pmib->dot11RFEntry.ther);
 		delta_IQK = RTL_ABS(thermal_value, priv->pshare->thermal_value_iqk);
@@ -184,32 +193,32 @@ odm_txpowertracking_callback_thermal_meter_92e(
 
 #ifdef _TRACKING_TABLE_FILE
 		if (priv->pshare->rf_ft_var.pwr_track_file) {
-			ODM_RT_TRACE(p_dm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("diff: (%s)%d ==> get index from table : %d)\n", (is_decrease ? "-" : "+"), delta, get_tx_tracking_index(priv, channel, i, delta, is_decrease, 0)));
+			RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "diff: (%s)%d ==> get index from table : %d)\n", (is_decrease ? "-" : "+"), delta, get_tx_tracking_index(priv, channel, i, delta, is_decrease, 0));
 
 			if (is_decrease) {
 				for (i = 0; i < rf; i++) {
 					OFDM_index[i] = priv->pshare->OFDM_index0[i] + get_tx_tracking_index(priv, channel, i, delta, is_decrease, 0);
 					OFDM_index[i] = ((OFDM_index[i] > (OFDM_TABLE_SIZE_92E- 1)) ? (OFDM_TABLE_SIZE_92E - 1) : OFDM_index[i]);
-					ODM_RT_TRACE(p_dm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, (">>> decrese power ---> new OFDM_INDEX:%d (%d + %d)\n", OFDM_index[i], priv->pshare->OFDM_index0[i], get_tx_tracking_index(priv, channel, i, delta, is_decrease, 0)));
+					RF_DBG(dm, DBG_RF_TX_PWR_TRACK, ">>> decrese power ---> new OFDM_INDEX:%d (%d + %d)\n", OFDM_index[i], priv->pshare->OFDM_index0[i], get_tx_tracking_index(priv, channel, i, delta, is_decrease, 0));
 					CCK_index = priv->pshare->CCK_index0 + get_tx_tracking_index(priv, channel, i, delta, is_decrease, 1);
 					CCK_index = ((CCK_index > (CCK_TABLE_SIZE_92E - 1)) ? (CCK_TABLE_SIZE_92E - 1) : CCK_index);
-					ODM_RT_TRACE(p_dm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, (">>> Decrese power ---> new CCK_INDEX:%d (%d + %d)\n",  CCK_index, priv->pshare->CCK_index0, get_tx_tracking_index(priv, channel, i, delta, is_decrease, 1)));
+					RF_DBG(dm, DBG_RF_TX_PWR_TRACK, ">>> Decrese power ---> new CCK_INDEX:%d (%d + %d)\n",  CCK_index, priv->pshare->CCK_index0, get_tx_tracking_index(priv, channel, i, delta, is_decrease, 1));
 				}
 			} else {
 				for (i = 0; i < rf; i++) {
 					OFDM_index[i] = priv->pshare->OFDM_index0[i] - get_tx_tracking_index(priv, channel, i, delta, is_decrease, 0);
 					OFDM_index[i] = ((OFDM_index[i] < OFDM_min_index) ?  OFDM_min_index : OFDM_index[i]);
-					ODM_RT_TRACE(p_dm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, (">>> Increse power ---> new OFDM_INDEX:%d (%d - %d)\n", OFDM_index[i], priv->pshare->OFDM_index0[i], get_tx_tracking_index(priv, channel, i, delta, is_decrease, 0)));
+					RF_DBG(dm, DBG_RF_TX_PWR_TRACK, ">>> Increse power ---> new OFDM_INDEX:%d (%d - %d)\n", OFDM_index[i], priv->pshare->OFDM_index0[i], get_tx_tracking_index(priv, channel, i, delta, is_decrease, 0));
 					CCK_index = priv->pshare->CCK_index0 - get_tx_tracking_index(priv, channel, i, delta, is_decrease, 1);
 					CCK_index = ((CCK_index < 0) ? 0 : CCK_index);
-					ODM_RT_TRACE(p_dm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, (">>> Increse power ---> new CCK_INDEX:%d (%d - %d)\n", CCK_index, priv->pshare->CCK_index0, get_tx_tracking_index(priv, channel, i, delta, is_decrease, 1)));
+					RF_DBG(dm, DBG_RF_TX_PWR_TRACK, ">>> Increse power ---> new CCK_INDEX:%d (%d - %d)\n", CCK_index, priv->pshare->CCK_index0, get_tx_tracking_index(priv, channel, i, delta, is_decrease, 1));
 				}
 			}
 		}
 #endif /* CFG_TRACKING_TABLE_FILE */
 
-		ODM_RT_TRACE(p_dm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("ofdm_swing_table_92e[(unsigned int)OFDM_index[0]] = %x\n", ofdm_swing_table_92e[(unsigned int)OFDM_index[0]]));
-		ODM_RT_TRACE(p_dm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("ofdm_swing_table_92e[(unsigned int)OFDM_index[1]] = %x\n", ofdm_swing_table_92e[(unsigned int)OFDM_index[1]]));
+		RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "ofdm_swing_table_92e[(unsigned int)OFDM_index[0]] = %x\n", ofdm_swing_table_92e[(unsigned int)OFDM_index[0]]);
+		RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "ofdm_swing_table_92e[(unsigned int)OFDM_index[1]] = %x\n", ofdm_swing_table_92e[(unsigned int)OFDM_index[1]]);
 
 		/* Adujst OFDM Ant_A according to IQK result */
 		ele_D = (ofdm_swing_table_92e[(unsigned int)OFDM_index[0]] & 0xFFC00000) >> 22;
@@ -275,18 +284,18 @@ odm_txpowertracking_callback_thermal_meter_92e(
 
 		}
 
-		ODM_RT_TRACE(p_dm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("0xc80 = 0x%x\n", phy_query_bb_reg(priv, REG_OFDM_0_XA_TX_IQ_IMBALANCE, MASKDWORD)));
-		ODM_RT_TRACE(p_dm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("0xc88 = 0x%x\n", phy_query_bb_reg(priv, REG_OFDM_0_XB_TX_IQ_IMBALANCE, MASKDWORD)));
+		RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "0xc80 = 0x%x\n", phy_query_bb_reg(priv, REG_OFDM_0_XA_TX_IQ_IMBALANCE, MASKDWORD));
+		RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "0xc88 = 0x%x\n", phy_query_bb_reg(priv, REG_OFDM_0_XB_TX_IQ_IMBALANCE, MASKDWORD));
 
-		if ((delta_IQK > 3) && (!p_iqk_info->rfk_forbidden)) {
+		if ((delta_IQK > 3) && (!iqk_info->rfk_forbidden)) {
 			priv->pshare->thermal_value_iqk = thermal_value;
 #ifdef MP_TEST
-#endif			if (!(*(p_dm->p_mp_mode) && (OPMODE & (WIFI_MP_CTX_BACKGROUND | WIFI_MP_CTX_PACKET))))
+#endif			if (!(*(dm->mp_mode) && (OPMODE & (WIFI_MP_CTX_BACKGROUND | WIFI_MP_CTX_PACKET))))
 
-				halrf_iqk_trigger(p_dm, false);
+				halrf_iqk_trigger(dm, false);
 		}
 
-		if ((delta_LCK > 8)  && (!p_iqk_info->rfk_forbidden)) {
+		if ((delta_LCK > 8)  && (!iqk_info->rfk_forbidden)) {
 			RTL_W8(0x522, 0xff);
 			reg0x18 = phy_query_rf_reg(priv, RF_PATH_A, 0x18, MASK20BITS, 1);
 			phy_set_rf_reg(priv, RF_PATH_A, 0xB4, BIT(14), 1);
@@ -305,40 +314,43 @@ odm_txpowertracking_callback_thermal_meter_92e(
 		priv->pshare->OFDM_index[i] = OFDM_index[i];
 	priv->pshare->CCK_index = CCK_index;
 
-	ODM_RT_TRACE(p_dm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("\n******** END:%s() ********\n", __FUNCTION__));
+	RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "\n******** END:%s() ********\n", __FUNCTION__);
 }
 #endif
 
 
 
-#if (RTL8197F_SUPPORT == 1 || RTL8822B_SUPPORT == 1 || RTL8821C_SUPPORT == 1)
+#if (RTL8197F_SUPPORT == 1 || RTL8192F_SUPPORT == 1 || RTL8822B_SUPPORT == 1 ||\
+	RTL8821C_SUPPORT == 1 || RTL8198F_SUPPORT == 1)
 void
 odm_txpowertracking_callback_thermal_meter_jaguar_series3(
-	void		*p_dm_void
+	void		*dm_void
 )
 {
 #if 1
-	struct PHY_DM_STRUCT		*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	u8			thermal_value = 0, delta, delta_LCK, delta_IQK, channel, is_increase;
-	u8			thermal_value_avg_count = 0, p = 0, i = 0;
-	u32			thermal_value_avg = 0;
-	struct rtl8192cd_priv		*priv = p_dm->priv;
-	struct _TXPWRTRACK_CFG	c;
-	struct odm_rf_calibration_structure	*p_rf_calibrate_info = &(p_dm->rf_calibrate_info);
-	struct _IQK_INFORMATION	*p_iqk_info = &p_dm->IQK_info;
-	/*4 1. The following TWO tables decide the final index of OFDM/CCK swing table.*/
-	u8			*delta_swing_table_idx_tup_a = NULL, *delta_swing_table_idx_tdown_a = NULL;
-	u8			*delta_swing_table_idx_tup_b = NULL, *delta_swing_table_idx_tdown_b = NULL;
-	u8			*delta_swing_table_idx_tup_cck_a = NULL, *delta_swing_table_idx_tdown_cck_a = NULL;
-	u8			*delta_swing_table_idx_tup_cck_b = NULL, *delta_swing_table_idx_tdown_cck_b = NULL;
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	u8 thermal_value = 0, delta, delta_LCK, delta_IQK, channel, is_increase;
+	u8 thermal_value_avg_count = 0, p = 0, i = 0;
+	u32 thermal_value_avg = 0;
+	struct rtl8192cd_priv *priv = dm->priv;
+	struct txpwrtrack_cfg c;
+	struct dm_rf_calibration_struct *cali_info = &(dm->rf_calibrate_info);
+	struct dm_iqk_info *iqk_info = &dm->IQK_info;
+	struct _hal_rf_ *rf = &dm->rf_table;
+	/*The following tables decide the final index of OFDM/CCK swing table.*/
+	u8 *pwrtrk_tab_up_a = NULL, *pwrtrk_tab_down_a = NULL;
+	u8 *pwrtrk_tab_up_b = NULL, *pwrtrk_tab_down_b = NULL;
+	u8 *pwrtrk_tab_up_cck_a = NULL, *pwrtrk_tab_down_cck_a = NULL;
+	u8 *pwrtrk_tab_up_cck_b = NULL, *pwrtrk_tab_down_cck_b = NULL;
 	/*for 8814 add by Yu Chen*/
-	u8			*delta_swing_table_idx_tup_c = NULL, *delta_swing_table_idx_tdown_c = NULL;
-	u8			*delta_swing_table_idx_tup_d = NULL, *delta_swing_table_idx_tdown_d = NULL;
-	u8			*delta_swing_table_idx_tup_cck_c = NULL, *delta_swing_table_idx_tdown_cck_c = NULL;
-	u8			*delta_swing_table_idx_tup_cck_d = NULL, *delta_swing_table_idx_tdown_cck_d = NULL;
+	u8 *pwrtrk_tab_up_c = NULL, *pwrtrk_tab_down_c = NULL;
+	u8 *pwrtrk_tab_up_d = NULL, *pwrtrk_tab_down_d = NULL;
+	u8 *pwrtrk_tab_up_cck_c = NULL, *pwrtrk_tab_down_cck_c = NULL;
+	u8 *pwrtrk_tab_up_cck_d = NULL, *pwrtrk_tab_down_cck_d = NULL;
+	s8 thermal_value_temp = 0;
 
 #ifdef MP_TEST
-	if ((OPMODE & WIFI_MP_STATE) || *(p_dm->p_mp_mode)) {
+	if ((OPMODE & WIFI_MP_STATE) || *(dm->mp_mode)) {
 		channel = priv->pshare->working_channel;
 		if (priv->pshare->mp_txpwr_tracking == false)
 			return;
@@ -348,221 +360,240 @@ odm_txpowertracking_callback_thermal_meter_jaguar_series3(
 		channel = (priv->pmib->dot11RFEntry.dot11channel);
 	}
 
-	configure_txpower_track(p_dm, &c);
+	configure_txpower_track(dm, &c);
 
-	(*c.get_delta_all_swing_table)(p_dm, (u8 **)&delta_swing_table_idx_tup_a, (u8 **)&delta_swing_table_idx_tdown_a,
-		(u8 **)&delta_swing_table_idx_tup_b, (u8 **)&delta_swing_table_idx_tdown_b,
-		(u8 **)&delta_swing_table_idx_tup_cck_a, (u8 **)&delta_swing_table_idx_tdown_cck_a,
-		(u8 **)&delta_swing_table_idx_tup_cck_b, (u8 **)&delta_swing_table_idx_tdown_cck_b);
+	(*c.get_delta_all_swing_table)(dm,
+		(u8 **)&pwrtrk_tab_up_a, (u8 **)&pwrtrk_tab_down_a,
+		(u8 **)&pwrtrk_tab_up_b, (u8 **)&pwrtrk_tab_down_b,
+		(u8 **)&pwrtrk_tab_up_cck_a, (u8 **)&pwrtrk_tab_down_cck_a,
+		(u8 **)&pwrtrk_tab_up_cck_b, (u8 **)&pwrtrk_tab_down_cck_b);
 
-	thermal_value = (u8)odm_get_rf_reg(p_dm, RF_PATH_A, c.thermal_reg_addr, 0xfc00); /*0x42: RF Reg[15:10] 88E*/
+	if (GET_CHIP_VER(priv) == VERSION_8198F) {
+		(*c.get_delta_all_swing_table_ex)(dm,
+			(u8 **)&pwrtrk_tab_up_c, (u8 **)&pwrtrk_tab_down_c,
+			(u8 **)&pwrtrk_tab_up_d, (u8 **)&pwrtrk_tab_down_d,
+			(u8 **)&pwrtrk_tab_up_cck_c, (u8 **)&pwrtrk_tab_down_cck_c,
+			(u8 **)&pwrtrk_tab_up_cck_d, (u8 **)&pwrtrk_tab_down_cck_d);
+	}
+	/*0x42: RF Reg[15:10] 88E*/
+	thermal_value = (u8)odm_get_rf_reg(dm, RF_PATH_A, c.thermal_reg_addr, 0xfc00);
 #ifdef THER_TRIM
 	if (GET_CHIP_VER(priv) == VERSION_8197F) {
-		ODM_RT_TRACE(p_dm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,
-			("orig thermal_value=%d, ther_trim_val=%d\n", thermal_value, priv->pshare->rf_ft_var.ther_trim_val));
+		RF_DBG(dm, DBG_RF_TX_PWR_TRACK,"orig thermal_value=%d, ther_trim_val=%d\n", thermal_value, priv->pshare->rf_ft_var.ther_trim_val);
 
 		thermal_value += priv->pshare->rf_ft_var.ther_trim_val;
 
-		ODM_RT_TRACE(p_dm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,
-			("after thermal trim, thermal_value=%d\n", thermal_value));
+		RF_DBG(dm, DBG_RF_TX_PWR_TRACK,"after thermal trim, thermal_value=%d\n", thermal_value);
+	}
+
+	if (GET_CHIP_VER(priv) == VERSION_8198F) {
+		thermal_value_temp = thermal_value + phydm_get_thermal_offset(dm);
+
+		RF_DBG(dm, DBG_RF_TX_PWR_TRACK,
+		       "thermal_value_temp(%d) = ther_value(%d) + ther_trim_ther(%d)\n",
+		       thermal_value_temp, thermal_value, phydm_get_thermal_offset(dm));
+
+		if (thermal_value_temp > 63)
+			thermal_value = 63;
+		else if (thermal_value_temp < 0)
+			thermal_value = 0;
+		else
+			thermal_value = thermal_value_temp;
 	}
 #endif
-	ODM_RT_TRACE(p_dm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,
-		("Readback Thermal Meter = 0x%x(%d) EEPROMthermalmeter 0x%x(%d)\n"
-		, thermal_value, thermal_value, priv->pmib->dot11RFEntry.ther, priv->pmib->dot11RFEntry.ther));
+
+	RF_DBG(dm, DBG_RF_TX_PWR_TRACK,"\n\n\nCurrent Thermal = 0x%x(%d) EEPROMthermalmeter 0x%x(%d)\n"
+		, thermal_value, thermal_value, priv->pmib->dot11RFEntry.ther, priv->pmib->dot11RFEntry.ther);
 
 	/* Initialize */
-	if (!p_dm->rf_calibrate_info.thermal_value)
-		p_dm->rf_calibrate_info.thermal_value = priv->pmib->dot11RFEntry.ther;
+	if (!dm->rf_calibrate_info.thermal_value)
+		dm->rf_calibrate_info.thermal_value = priv->pmib->dot11RFEntry.ther;
 
-	if (!p_dm->rf_calibrate_info.thermal_value_lck)
-		p_dm->rf_calibrate_info.thermal_value_lck = priv->pmib->dot11RFEntry.ther;
+	if (!dm->rf_calibrate_info.thermal_value_lck)
+		dm->rf_calibrate_info.thermal_value_lck = priv->pmib->dot11RFEntry.ther;
 
-	if (!p_dm->rf_calibrate_info.thermal_value_iqk)
-		p_dm->rf_calibrate_info.thermal_value_iqk = priv->pmib->dot11RFEntry.ther;
+	if (!dm->rf_calibrate_info.thermal_value_iqk)
+		dm->rf_calibrate_info.thermal_value_iqk = priv->pmib->dot11RFEntry.ther;
 
 	/* calculate average thermal meter */
-	p_dm->rf_calibrate_info.thermal_value_avg[p_dm->rf_calibrate_info.thermal_value_avg_index] = thermal_value;
-	p_dm->rf_calibrate_info.thermal_value_avg_index++;
+	dm->rf_calibrate_info.thermal_value_avg[dm->rf_calibrate_info.thermal_value_avg_index] = thermal_value;
+	dm->rf_calibrate_info.thermal_value_avg_index++;
 
-	if (p_dm->rf_calibrate_info.thermal_value_avg_index == c.average_thermal_num)   /*Average times =  c.average_thermal_num*/
-		p_dm->rf_calibrate_info.thermal_value_avg_index = 0;
+	if (dm->rf_calibrate_info.thermal_value_avg_index == c.average_thermal_num)   /*Average times =  c.average_thermal_num*/
+		dm->rf_calibrate_info.thermal_value_avg_index = 0;
 
 	for (i = 0; i < c.average_thermal_num; i++) {
-		if (p_dm->rf_calibrate_info.thermal_value_avg[i]) {
-			thermal_value_avg += p_dm->rf_calibrate_info.thermal_value_avg[i];
+		if (dm->rf_calibrate_info.thermal_value_avg[i]) {
+			thermal_value_avg += dm->rf_calibrate_info.thermal_value_avg[i];
 			thermal_value_avg_count++;
 		}
 	}
 
 	if (thermal_value_avg_count) {/*Calculate Average thermal_value after average enough times*/
-		ODM_RT_TRACE(p_dm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,
-			("thermal_value_avg=0x%x(%d)  thermal_value_avg_count = %d\n"
-			, thermal_value_avg, thermal_value_avg, thermal_value_avg_count));
+		RF_DBG(dm, DBG_RF_TX_PWR_TRACK,"thermal_value_avg=0x%x(%d)  thermal_value_avg_count = %d\n"
+			, thermal_value_avg, thermal_value_avg, thermal_value_avg_count);
 
 		thermal_value = (u8)(thermal_value_avg / thermal_value_avg_count);
 
-		ODM_RT_TRACE(p_dm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,
-			("AVG Thermal Meter = 0x%X(%d), EEPROMthermalmeter = 0x%X(%d)\n", thermal_value, thermal_value, priv->pmib->dot11RFEntry.ther, priv->pmib->dot11RFEntry.ther));
+		RF_DBG(dm, DBG_RF_TX_PWR_TRACK,"AVG Thermal Meter = 0x%X(%d), EEPROMthermalmeter = 0x%X(%d)\n", thermal_value, thermal_value, priv->pmib->dot11RFEntry.ther, priv->pmib->dot11RFEntry.ther);
 	}
 
 	/*4 Calculate delta, delta_LCK, delta_IQK.*/
 	delta = RTL_ABS(thermal_value, priv->pmib->dot11RFEntry.ther);
-	delta_LCK = RTL_ABS(thermal_value, p_dm->rf_calibrate_info.thermal_value_lck);
-	delta_IQK = RTL_ABS(thermal_value, p_dm->rf_calibrate_info.thermal_value_iqk);
+	delta_LCK = RTL_ABS(thermal_value, dm->rf_calibrate_info.thermal_value_lck);
+	delta_IQK = RTL_ABS(thermal_value, dm->rf_calibrate_info.thermal_value_iqk);
 	is_increase = ((thermal_value < priv->pmib->dot11RFEntry.ther) ? 0 : 1);
 
 	if (delta > 29) { /* power track table index(thermal diff.) upper bound*/
-		ODM_RT_TRACE(p_dm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("delta(%d) > 29, set delta to 29\n", delta));
+		RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "delta(%d) > 29, set delta to 29\n", delta);
 		delta = 29;
 	}
 
+	RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "(delta, delta_LCK, delta_IQK) = (%d, %d, %d)\n", delta, delta_LCK, delta_IQK);
 
 	/*4 if necessary, do LCK.*/
-	if ((delta_LCK > c.threshold_iqk) && (!p_iqk_info->rfk_forbidden)) {
-		ODM_RT_TRACE(p_dm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("delta_LCK(%d) >= threshold_iqk(%d)\n", delta_LCK, c.threshold_iqk));
-		p_dm->rf_calibrate_info.thermal_value_lck = thermal_value;
+	if ((delta_LCK >= c.threshold_iqk) && (!iqk_info->rfk_forbidden)) {
+		RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "delta_LCK(%d) >= threshold_iqk(%d)\n", delta_LCK, c.threshold_iqk);
+		dm->rf_calibrate_info.thermal_value_lck = thermal_value;
 #if (RTL8822B_SUPPORT != 1)
-		if (!(p_dm->support_ic_type & ODM_RTL8822B)) {
-		if (c.phy_lc_calibrate)
-			(*c.phy_lc_calibrate)(p_dm);
-	}
+		if (!(dm->support_ic_type & ODM_RTL8822B)) {
+			if (c.phy_lc_calibrate)
+				(*c.phy_lc_calibrate)(dm);
+		}
 #endif
 	}
 
-	if ((delta_IQK > c.threshold_iqk) && (!p_iqk_info->rfk_forbidden)) {
-		ODM_RT_TRACE(p_dm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("delta_IQK(%d) >= threshold_iqk(%d)\n", delta_IQK, c.threshold_iqk));
-		p_dm->rf_calibrate_info.thermal_value_iqk = thermal_value;
-		if (c.do_iqk)
-			(*c.do_iqk)(p_dm, true, 0, 0);
-	}
-
-	if (!priv->pmib->dot11RFEntry.ther)	/*Don't do power tracking since no calibrated thermal value*/
+	if (!priv->pmib->dot11RFEntry.ther) /*Don't do power tracking since no calibrated thermal value*/
 		return;
 
 	/*4 Do Power Tracking*/
 
-	if (thermal_value != p_dm->rf_calibrate_info.thermal_value) {
-		ODM_RT_TRACE(p_dm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,
-			     ("\n\n******** START POWER TRACKING ********\n"));
-		ODM_RT_TRACE(p_dm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,
-			("Readback Thermal Meter = 0x%x pre thermal meter 0x%x EEPROMthermalmeter 0x%x\n",
-			thermal_value, p_dm->rf_calibrate_info.thermal_value, priv->pmib->dot11RFEntry.ther));
+	if (thermal_value != dm->rf_calibrate_info.thermal_value) {
+		RF_DBG(dm, DBG_RF_TX_PWR_TRACK,"******** START POWER TRACKING ********\n");
+		RF_DBG(dm, DBG_RF_TX_PWR_TRACK,"Readback Thermal Meter = 0x%x pre thermal meter 0x%x EEPROMthermalmeter 0x%x\n",
+		       thermal_value, dm->rf_calibrate_info.thermal_value, priv->pmib->dot11RFEntry.ther);
 
 #ifdef _TRACKING_TABLE_FILE
 		if (priv->pshare->rf_ft_var.pwr_track_file) {
-			if (is_increase) {			/*thermal is higher than base*/
+			if (is_increase) { /*thermal is higher than base*/
 				for (p = RF_PATH_A; p < c.rf_path_count; p++) {
 					switch (p) {
 					case RF_PATH_B:
-						ODM_RT_TRACE(p_dm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,
-							("delta_swing_table_idx_tup_b[%d] = %d delta_swing_table_idx_tup_cck_b[%d] = %d\n", delta, delta_swing_table_idx_tup_b[delta], delta, delta_swing_table_idx_tup_cck_b[delta]));
-						p_rf_calibrate_info->absolute_ofdm_swing_idx[p] = delta_swing_table_idx_tup_b[delta];
-						p_rf_calibrate_info->absolute_cck_swing_idx[p] = delta_swing_table_idx_tup_cck_b[delta];
-						ODM_RT_TRACE(p_dm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,
-							("******Temp is higher and pRF->absolute_ofdm_swing_idx[RF_PATH_B] = %d pRF->absolute_cck_swing_idx[RF_PATH_B] = %d\n", p_rf_calibrate_info->absolute_ofdm_swing_idx[p], p_rf_calibrate_info->absolute_cck_swing_idx[p]));
+						RF_DBG(dm, DBG_RF_TX_PWR_TRACK,"pwrtrk_tab_up_b[%d] = %d pwrtrk_tab_up_cck_b[%d] = %d\n", delta, pwrtrk_tab_up_b[delta], delta, pwrtrk_tab_up_cck_b[delta]);
+						cali_info->absolute_ofdm_swing_idx[p] = pwrtrk_tab_up_b[delta];
+						cali_info->absolute_cck_swing_idx[p] = pwrtrk_tab_up_cck_b[delta];
+						RF_DBG(dm, DBG_RF_TX_PWR_TRACK,"******Temp is higher and pRF->absolute_ofdm_swing_idx[RF_PATH_B] = %d pRF->absolute_cck_swing_idx[RF_PATH_B] = %d\n", cali_info->absolute_ofdm_swing_idx[p], cali_info->absolute_cck_swing_idx[p]);
 						break;
 
 					case RF_PATH_C:
-						ODM_RT_TRACE(p_dm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,
-							("delta_swing_table_idx_tup_c[%d] = %d delta_swing_table_idx_tup_cck_c[%d] = %d\n", delta, delta_swing_table_idx_tup_c[delta], delta, delta_swing_table_idx_tup_cck_c[delta]));
-						p_rf_calibrate_info->absolute_ofdm_swing_idx[p] = delta_swing_table_idx_tup_c[delta];
-						p_rf_calibrate_info->absolute_cck_swing_idx[p] = delta_swing_table_idx_tup_cck_c[delta];
-						ODM_RT_TRACE(p_dm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,
-							("******Temp is higher and pRF->absolute_ofdm_swing_idx[RF_PATH_C] = %d pRF->absolute_cck_swing_idx[RF_PATH_C] = %d\n", p_rf_calibrate_info->absolute_ofdm_swing_idx[p], p_rf_calibrate_info->absolute_cck_swing_idx[p]));
+						RF_DBG(dm, DBG_RF_TX_PWR_TRACK,"pwrtrk_tab_up_c[%d] = %d pwrtrk_tab_up_cck_c[%d] = %d\n", delta, pwrtrk_tab_up_c[delta], delta, pwrtrk_tab_up_cck_c[delta]);
+						cali_info->absolute_ofdm_swing_idx[p] = pwrtrk_tab_up_c[delta];
+						cali_info->absolute_cck_swing_idx[p] = pwrtrk_tab_up_cck_c[delta];
+						RF_DBG(dm, DBG_RF_TX_PWR_TRACK,"******Temp is higher and pRF->absolute_ofdm_swing_idx[RF_PATH_C] = %d pRF->absolute_cck_swing_idx[RF_PATH_C] = %d\n", cali_info->absolute_ofdm_swing_idx[p], cali_info->absolute_cck_swing_idx[p]);
 						break;
 
 					case RF_PATH_D:
-						ODM_RT_TRACE(p_dm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,
-							("delta_swing_table_idx_tup_d[%d] = %d delta_swing_table_idx_tup_cck_d[%d] = %d\n", delta, delta_swing_table_idx_tup_d[delta], delta, delta_swing_table_idx_tup_cck_d[delta]));
-						p_rf_calibrate_info->absolute_ofdm_swing_idx[p] = delta_swing_table_idx_tup_d[delta];
-						p_rf_calibrate_info->absolute_cck_swing_idx[p] = delta_swing_table_idx_tup_cck_d[delta];
-						ODM_RT_TRACE(p_dm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,
-							("******Temp is higher and pRF->absolute_ofdm_swing_idx[RF_PATH_D] = %d pRF->absolute_cck_swing_idx[RF_PATH_D] = %d\n", p_rf_calibrate_info->absolute_ofdm_swing_idx[p], p_rf_calibrate_info->absolute_cck_swing_idx[p]));
+						RF_DBG(dm, DBG_RF_TX_PWR_TRACK,"pwrtrk_tab_up_d[%d] = %d pwrtrk_tab_up_cck_d[%d] = %d\n", delta, pwrtrk_tab_up_d[delta], delta, pwrtrk_tab_up_cck_d[delta]);
+						cali_info->absolute_ofdm_swing_idx[p] = pwrtrk_tab_up_d[delta];
+						cali_info->absolute_cck_swing_idx[p] = pwrtrk_tab_up_cck_d[delta];
+						RF_DBG(dm, DBG_RF_TX_PWR_TRACK,"******Temp is higher and pRF->absolute_ofdm_swing_idx[RF_PATH_D] = %d pRF->absolute_cck_swing_idx[RF_PATH_D] = %d\n", cali_info->absolute_ofdm_swing_idx[p], cali_info->absolute_cck_swing_idx[p]);
 						break;
 					default:
-						ODM_RT_TRACE(p_dm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,
-							("delta_swing_table_idx_tup_a[%d] = %d delta_swing_table_idx_tup_cck_a[%d] = %d\n", delta, delta_swing_table_idx_tup_a[delta], delta, delta_swing_table_idx_tup_cck_a[delta]));
-						p_rf_calibrate_info->absolute_ofdm_swing_idx[p] = delta_swing_table_idx_tup_a[delta];
-						p_rf_calibrate_info->absolute_cck_swing_idx[p] = delta_swing_table_idx_tup_cck_a[delta];
-						ODM_RT_TRACE(p_dm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,
-							("******Temp is higher and pRF->absolute_ofdm_swing_idx[RF_PATH_A] = %d pRF->absolute_cck_swing_idx[RF_PATH_A] = %d\n", p_rf_calibrate_info->absolute_ofdm_swing_idx[p], p_rf_calibrate_info->absolute_cck_swing_idx[p]));
+						RF_DBG(dm, DBG_RF_TX_PWR_TRACK,"pwrtrk_tab_up_a[%d] = %d pwrtrk_tab_up_cck_a[%d] = %d\n", delta, pwrtrk_tab_up_a[delta], delta, pwrtrk_tab_up_cck_a[delta]);
+						cali_info->absolute_ofdm_swing_idx[p] = pwrtrk_tab_up_a[delta];
+						cali_info->absolute_cck_swing_idx[p] = pwrtrk_tab_up_cck_a[delta];
+						RF_DBG(dm, DBG_RF_TX_PWR_TRACK,"******Temp is higher and pRF->absolute_ofdm_swing_idx[RF_PATH_A] = %d pRF->absolute_cck_swing_idx[RF_PATH_A] = %d\n", cali_info->absolute_ofdm_swing_idx[p], cali_info->absolute_cck_swing_idx[p]);
 						break;
 					}
 				}
-			} else {			/* thermal is lower than base*/
+			} else { /* thermal is lower than base*/
 				for (p = RF_PATH_A; p < c.rf_path_count; p++) {
 					switch (p) {
 					case RF_PATH_B:
-						ODM_RT_TRACE(p_dm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,
-							("delta_swing_table_idx_tdown_b[%d] = %d   delta_swing_table_idx_tdown_cck_b[%d] = %d\n", delta, delta_swing_table_idx_tdown_b[delta], delta, delta_swing_table_idx_tdown_cck_b[delta]));
-						p_rf_calibrate_info->absolute_ofdm_swing_idx[p] = -1 * delta_swing_table_idx_tdown_b[delta];
-						p_rf_calibrate_info->absolute_cck_swing_idx[p] = -1 * delta_swing_table_idx_tdown_cck_b[delta];
-						ODM_RT_TRACE(p_dm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,
-							("******Temp is lower and pRF->absolute_ofdm_swing_idx[RF_PATH_B] = %d   pRF->absolute_cck_swing_idx[RF_PATH_B] = %d\n", p_rf_calibrate_info->absolute_ofdm_swing_idx[p], p_rf_calibrate_info->absolute_cck_swing_idx[p]));
+						RF_DBG(dm, DBG_RF_TX_PWR_TRACK,"pwrtrk_tab_down_b[%d] = %d   pwrtrk_tab_down_cck_b[%d] = %d\n", delta, pwrtrk_tab_down_b[delta], delta, pwrtrk_tab_down_cck_b[delta]);
+						cali_info->absolute_ofdm_swing_idx[p] = -1 * pwrtrk_tab_down_b[delta];
+						cali_info->absolute_cck_swing_idx[p] = -1 * pwrtrk_tab_down_cck_b[delta];
+						RF_DBG(dm, DBG_RF_TX_PWR_TRACK,"******Temp is lower and pRF->absolute_ofdm_swing_idx[RF_PATH_B] = %d   pRF->absolute_cck_swing_idx[RF_PATH_B] = %d\n", cali_info->absolute_ofdm_swing_idx[p], cali_info->absolute_cck_swing_idx[p]);
 						break;
 
 					case RF_PATH_C:
-						ODM_RT_TRACE(p_dm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,
-							("delta_swing_table_idx_tdown_c[%d] = %d   delta_swing_table_idx_tdown_cck_c[%d] = %d\n", delta, delta_swing_table_idx_tdown_c[delta], delta, delta_swing_table_idx_tdown_cck_c[delta]));
-						p_rf_calibrate_info->absolute_ofdm_swing_idx[p] = -1 * delta_swing_table_idx_tdown_c[delta];
-						p_rf_calibrate_info->absolute_cck_swing_idx[p] = -1 * delta_swing_table_idx_tdown_cck_c[delta];
-						ODM_RT_TRACE(p_dm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,
-							("******Temp is lower and pRF->absolute_ofdm_swing_idx[RF_PATH_C] = %d   pRF->absolute_cck_swing_idx[RF_PATH_C] = %d\n", p_rf_calibrate_info->absolute_ofdm_swing_idx[p], p_rf_calibrate_info->absolute_cck_swing_idx[p]));
+						RF_DBG(dm, DBG_RF_TX_PWR_TRACK,"pwrtrk_tab_down_c[%d] = %d   pwrtrk_tab_down_cck_c[%d] = %d\n", delta, pwrtrk_tab_down_c[delta], delta, pwrtrk_tab_down_cck_c[delta]);
+						cali_info->absolute_ofdm_swing_idx[p] = -1 * pwrtrk_tab_down_c[delta];
+						cali_info->absolute_cck_swing_idx[p] = -1 * pwrtrk_tab_down_cck_c[delta];
+						RF_DBG(dm, DBG_RF_TX_PWR_TRACK,"******Temp is lower and pRF->absolute_ofdm_swing_idx[RF_PATH_C] = %d   pRF->absolute_cck_swing_idx[RF_PATH_C] = %d\n", cali_info->absolute_ofdm_swing_idx[p], cali_info->absolute_cck_swing_idx[p]);
 						break;
 
 					case RF_PATH_D:
-						ODM_RT_TRACE(p_dm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,
-							("delta_swing_table_idx_tdown_d[%d] = %d   delta_swing_table_idx_tdown_cck_d[%d] = %d\n", delta, delta_swing_table_idx_tdown_d[delta], delta, delta_swing_table_idx_tdown_cck_d[delta]));
-						p_rf_calibrate_info->absolute_ofdm_swing_idx[p] = -1 * delta_swing_table_idx_tdown_d[delta];
-						p_rf_calibrate_info->absolute_cck_swing_idx[p] = -1 * delta_swing_table_idx_tdown_cck_d[delta];
-						ODM_RT_TRACE(p_dm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,
-							("******Temp is lower and pRF->absolute_ofdm_swing_idx[RF_PATH_D] = %d   pRF->absolute_cck_swing_idx[RF_PATH_D] = %d\n", p_rf_calibrate_info->absolute_ofdm_swing_idx[p], p_rf_calibrate_info->absolute_cck_swing_idx[p]));
+						RF_DBG(dm, DBG_RF_TX_PWR_TRACK,"pwrtrk_tab_down_d[%d] = %d   pwrtrk_tab_down_cck_d[%d] = %d\n", delta, pwrtrk_tab_down_d[delta], delta, pwrtrk_tab_down_cck_d[delta]);
+						cali_info->absolute_ofdm_swing_idx[p] = -1 * pwrtrk_tab_down_d[delta];
+						cali_info->absolute_cck_swing_idx[p] = -1 * pwrtrk_tab_down_cck_d[delta];
+						RF_DBG(dm, DBG_RF_TX_PWR_TRACK,"******Temp is lower and pRF->absolute_ofdm_swing_idx[RF_PATH_D] = %d   pRF->absolute_cck_swing_idx[RF_PATH_D] = %d\n", cali_info->absolute_ofdm_swing_idx[p], cali_info->absolute_cck_swing_idx[p]);
 						break;
 
 					default:
-						ODM_RT_TRACE(p_dm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,
-							("delta_swing_table_idx_tdown_a[%d] = %d   delta_swing_table_idx_tdown_cck_a[%d] = %d\n", delta, delta_swing_table_idx_tdown_a[delta], delta, delta_swing_table_idx_tdown_cck_a[delta]));
-						p_rf_calibrate_info->absolute_ofdm_swing_idx[p] = -1 * delta_swing_table_idx_tdown_a[delta];
-						p_rf_calibrate_info->absolute_cck_swing_idx[p] = -1 * delta_swing_table_idx_tdown_cck_a[delta];
-						ODM_RT_TRACE(p_dm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,
-							("******Temp is lower and pRF->absolute_ofdm_swing_idx[RF_PATH_A] = %d   pRF->absolute_cck_swing_idx[RF_PATH_A] = %d\n", p_rf_calibrate_info->absolute_ofdm_swing_idx[p], p_rf_calibrate_info->absolute_cck_swing_idx[p]));
+						RF_DBG(dm, DBG_RF_TX_PWR_TRACK,"pwrtrk_tab_down_a[%d] = %d   pwrtrk_tab_down_cck_a[%d] = %d\n", delta, pwrtrk_tab_down_a[delta], delta, pwrtrk_tab_down_cck_a[delta]);
+						cali_info->absolute_ofdm_swing_idx[p] = -1 * pwrtrk_tab_down_a[delta];
+						cali_info->absolute_cck_swing_idx[p] = -1 * pwrtrk_tab_down_cck_a[delta];
+						RF_DBG(dm, DBG_RF_TX_PWR_TRACK,"******Temp is lower and pRF->absolute_ofdm_swing_idx[RF_PATH_A] = %d   pRF->absolute_cck_swing_idx[RF_PATH_A] = %d\n", cali_info->absolute_ofdm_swing_idx[p], cali_info->absolute_cck_swing_idx[p]);
 						break;
 					}
 				}
 			}
 
 			if (is_increase) {
-				ODM_RT_TRACE(p_dm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, (">>> increse power --->\n"));
+				RF_DBG(dm, DBG_RF_TX_PWR_TRACK, ">>> increse power --->\n");
 				if (GET_CHIP_VER(priv) == VERSION_8197F) {
 					for (p = RF_PATH_A; p < c.rf_path_count; p++)
-						(*c.odm_tx_pwr_track_set_pwr)(p_dm, BBSWING, p, 0);
+						(*c.odm_tx_pwr_track_set_pwr)(dm, BBSWING, p, 0);
+				//}  else if (GET_CHIP_VER(priv) == VERSION_8192F) {
+				//	for (p = RF_PATH_A; p < c.rf_path_count; p++)
+				//		(*c.odm_tx_pwr_track_set_pwr)(dm, MIX_MODE, p, 0);
 				} else if (GET_CHIP_VER(priv) == VERSION_8822B) {
 					for (p = RF_PATH_A; p < c.rf_path_count; p++)
-						(*c.odm_tx_pwr_track_set_pwr)(p_dm, MIX_MODE, p, 0);
+						(*c.odm_tx_pwr_track_set_pwr)(dm, MIX_MODE, p, 0);
 				} else if (GET_CHIP_VER(priv) == VERSION_8821C) {
 					for (p = RF_PATH_A; p < c.rf_path_count; p++)
-						(*c.odm_tx_pwr_track_set_pwr)(p_dm, MIX_MODE, p, 0);
+						(*c.odm_tx_pwr_track_set_pwr)(dm, MIX_MODE, p, 0);
+				}  else if (GET_CHIP_VER(priv) == VERSION_8198F) {
+					for (p = RF_PATH_A; p < c.rf_path_count; p++)
+						(*c.odm_tx_pwr_track_set_pwr)(dm, MIX_MODE, p, 0);
 				}
 			} else {
-				ODM_RT_TRACE(p_dm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, (">>> decrese power --->\n"));
+				RF_DBG(dm, DBG_RF_TX_PWR_TRACK, ">>> decrese power --->\n");
 				if (GET_CHIP_VER(priv) == VERSION_8197F) {
 					for (p = RF_PATH_A; p < c.rf_path_count; p++)
-						(*c.odm_tx_pwr_track_set_pwr)(p_dm, BBSWING, p, 0);
+						(*c.odm_tx_pwr_track_set_pwr)(dm, BBSWING, p, 0);
+				//} else if (GET_CHIP_VER(priv) == VERSION_8192F) {
+				//	for (p = RF_PATH_A; p < c.rf_path_count; p++)
+				//		(*c.odm_tx_pwr_track_set_pwr)(dm, MIX_MODE, p, 0);
 				} else if (GET_CHIP_VER(priv) == VERSION_8822B) {
 					for (p = RF_PATH_A; p < c.rf_path_count; p++)
-						(*c.odm_tx_pwr_track_set_pwr)(p_dm, MIX_MODE, p, 0);
+						(*c.odm_tx_pwr_track_set_pwr)(dm, MIX_MODE, p, 0);
 				} else if (GET_CHIP_VER(priv) == VERSION_8821C) {
 					for (p = RF_PATH_A; p < c.rf_path_count; p++)
-						(*c.odm_tx_pwr_track_set_pwr)(p_dm, MIX_MODE, p, 0);
+						(*c.odm_tx_pwr_track_set_pwr)(dm, MIX_MODE, p, 0);
+				} else if (GET_CHIP_VER(priv) == VERSION_8198F) {
+					for (p = RF_PATH_A; p < c.rf_path_count; p++)
+						(*c.odm_tx_pwr_track_set_pwr)(dm, MIX_MODE, p, 0);
 				}
 			}
 		}
 #endif
 
-		ODM_RT_TRACE(p_dm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("\n******** END:%s() ********\n\n", __func__));
+		if (GET_CHIP_VER(priv) != VERSION_8198F) {
+			if ((delta_IQK >= c.threshold_iqk) && (!iqk_info->rfk_forbidden)) {
+				RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "delta_IQK(%d) >= threshold_iqk(%d)\n", delta_IQK, c.threshold_iqk);
+				dm->rf_calibrate_info.thermal_value_iqk = thermal_value;
+				if (!(dm->support_ic_type & ODM_RTL8197F)) {
+					if (c.do_iqk)
+						(*c.do_iqk)(dm, false, thermal_value, 0);
+				}
+			}
+		}
+
+		RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "\n******** END:%s() ********\n\n", __func__);
 		/*update thermal meter value*/
-		p_dm->rf_calibrate_info.thermal_value =  thermal_value;
+		dm->rf_calibrate_info.thermal_value =  thermal_value;
 
 	}
 
@@ -575,21 +606,21 @@ odm_txpowertracking_callback_thermal_meter_jaguar_series3(
 
 void
 odm_txpowertracking_callback_thermal_meter_jaguar_series2(
-	void		*p_dm_void
+	void		*dm_void
 )
 {
-	struct PHY_DM_STRUCT		*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
+	struct dm_struct		*dm = (struct dm_struct *)dm_void;
 	u8			thermal_value = 0, delta, delta_LCK, delta_IQK, channel, is_increase;
 	u8			thermal_value_avg_count = 0, p = 0, i = 0;
 	u32			thermal_value_avg = 0, reg0x18;
 	u32			bb_swing_reg[4] = {REG_A_TX_SCALE_JAGUAR, REG_B_TX_SCALE_JAGUAR, REG_C_TX_SCALE_JAGUAR2, REG_D_TX_SCALE_JAGUAR2};
 	s32			ele_D;
 	u32			bb_swing_idx;
-	struct rtl8192cd_priv	*priv = p_dm->priv;
-	struct _TXPWRTRACK_CFG	c;
+	struct rtl8192cd_priv	*priv = dm->priv;
+	struct txpwrtrack_cfg	c;
 	boolean			is_tssi_enable = false;
-	struct odm_rf_calibration_structure	*p_rf_calibrate_info = &(p_dm->rf_calibrate_info);
-	struct _IQK_INFORMATION	*p_iqk_info = &p_dm->IQK_info;
+	struct dm_rf_calibration_struct	*cali_info = &(dm->rf_calibrate_info);
+	struct dm_iqk_info	*iqk_info = &dm->IQK_info;
 
 	/* 4 1. The following TWO tables decide the final index of OFDM/CCK swing table. */
 	u8			*delta_swing_table_idx_tup_a = NULL, *delta_swing_table_idx_tdown_a = NULL;
@@ -599,7 +630,7 @@ odm_txpowertracking_callback_thermal_meter_jaguar_series2(
 	u8			*delta_swing_table_idx_tup_d = NULL, *delta_swing_table_idx_tdown_d = NULL;
 
 #ifdef MP_TEST
-	if ((OPMODE & WIFI_MP_STATE) || *(p_dm->p_mp_mode)) {
+	if ((OPMODE & WIFI_MP_STATE) || *(dm->mp_mode)) {
 		channel = priv->pshare->working_channel;
 		if (priv->pshare->mp_txpwr_tracking == false)
 			return;
@@ -609,97 +640,93 @@ odm_txpowertracking_callback_thermal_meter_jaguar_series2(
 		channel = (priv->pmib->dot11RFEntry.dot11channel);
 	}
 
-	configure_txpower_track(p_dm, &c);
-	p_rf_calibrate_info->default_ofdm_index = priv->pshare->OFDM_index0[RF_PATH_A];
+	configure_txpower_track(dm, &c);
+	cali_info->default_ofdm_index = priv->pshare->OFDM_index0[RF_PATH_A];
 
-	(*c.get_delta_swing_table)(p_dm, (u8 **)&delta_swing_table_idx_tup_a, (u8 **)&delta_swing_table_idx_tdown_a,
+	(*c.get_delta_swing_table)(dm, (u8 **)&delta_swing_table_idx_tup_a, (u8 **)&delta_swing_table_idx_tdown_a,
 		(u8 **)&delta_swing_table_idx_tup_b, (u8 **)&delta_swing_table_idx_tdown_b);
 
-	if (p_dm->support_ic_type & ODM_RTL8814A)	/* for 8814 path C & D */
-		(*c.get_delta_swing_table8814only)(p_dm, (u8 **)&delta_swing_table_idx_tup_c, (u8 **)&delta_swing_table_idx_tdown_c,
+	if (dm->support_ic_type & ODM_RTL8814A)	/* for 8814 path C & D */
+		(*c.get_delta_swing_table8814only)(dm, (u8 **)&delta_swing_table_idx_tup_c, (u8 **)&delta_swing_table_idx_tdown_c,
 			(u8 **)&delta_swing_table_idx_tup_d, (u8 **)&delta_swing_table_idx_tdown_d);
 
-	thermal_value = (u8)odm_get_rf_reg(p_dm, RF_PATH_A, c.thermal_reg_addr, 0xfc00); /* 0x42: RF Reg[15:10] 88E */
-	ODM_RT_TRACE(p_dm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,
-		("\nReadback Thermal Meter = 0x%x, pre thermal meter 0x%x, EEPROMthermalmeter 0x%x\n", thermal_value, p_dm->rf_calibrate_info.thermal_value, priv->pmib->dot11RFEntry.ther));
+	thermal_value = (u8)odm_get_rf_reg(dm, RF_PATH_A, c.thermal_reg_addr, 0xfc00); /* 0x42: RF Reg[15:10] 88E */
+	RF_DBG(dm, DBG_RF_TX_PWR_TRACK,"\nReadback Thermal Meter = 0x%x, pre thermal meter 0x%x, EEPROMthermalmeter 0x%x\n", thermal_value, dm->rf_calibrate_info.thermal_value, priv->pmib->dot11RFEntry.ther);
 
 	/* Initialize */
-	if (!p_dm->rf_calibrate_info.thermal_value)
-		p_dm->rf_calibrate_info.thermal_value = priv->pmib->dot11RFEntry.ther;
+	if (!dm->rf_calibrate_info.thermal_value)
+		dm->rf_calibrate_info.thermal_value = priv->pmib->dot11RFEntry.ther;
 
-	if (!p_dm->rf_calibrate_info.thermal_value_lck)
-		p_dm->rf_calibrate_info.thermal_value_lck = priv->pmib->dot11RFEntry.ther;
+	if (!dm->rf_calibrate_info.thermal_value_lck)
+		dm->rf_calibrate_info.thermal_value_lck = priv->pmib->dot11RFEntry.ther;
 
-	if (!p_dm->rf_calibrate_info.thermal_value_iqk)
-		p_dm->rf_calibrate_info.thermal_value_iqk = priv->pmib->dot11RFEntry.ther;
+	if (!dm->rf_calibrate_info.thermal_value_iqk)
+		dm->rf_calibrate_info.thermal_value_iqk = priv->pmib->dot11RFEntry.ther;
 
-	is_tssi_enable = (boolean)odm_get_rf_reg(p_dm, RF_PATH_A, REG_RF_TX_GAIN_OFFSET, BIT(7));	/* check TSSI enable */
+	is_tssi_enable = (boolean)odm_get_rf_reg(dm, RF_PATH_A, REG_RF_TX_GAIN_OFFSET, BIT(7));	/* check TSSI enable */
 
 	/* 4 Query OFDM BB swing default setting 	Bit[31:21] */
 	for (p = RF_PATH_A ; p < c.rf_path_count ; p++) {
-		ele_D = odm_get_bb_reg(p_dm, bb_swing_reg[p], 0xffe00000);
-		ODM_RT_TRACE(p_dm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,
-			("0x%x:0x%x ([31:21] = 0x%x)\n", bb_swing_reg[p], odm_get_bb_reg(p_dm, bb_swing_reg[p], MASKDWORD), ele_D));
+		ele_D = odm_get_bb_reg(dm, bb_swing_reg[p], 0xffe00000);
+		RF_DBG(dm, DBG_RF_TX_PWR_TRACK,"0x%x:0x%x ([31:21] = 0x%x)\n", bb_swing_reg[p], odm_get_bb_reg(dm, bb_swing_reg[p], MASKDWORD), ele_D);
 
 		for (bb_swing_idx = 0; bb_swing_idx < TXSCALE_TABLE_SIZE; bb_swing_idx++) {/* 4 */
 			if (ele_D == tx_scaling_table_jaguar[bb_swing_idx]) {
-				p_dm->rf_calibrate_info.OFDM_index[p] = (u8)bb_swing_idx;
-				ODM_RT_TRACE(p_dm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,
-					("OFDM_index[%d]=%d\n", p, p_dm->rf_calibrate_info.OFDM_index[p]));
+				dm->rf_calibrate_info.OFDM_index[p] = (u8)bb_swing_idx;
+				RF_DBG(dm, DBG_RF_TX_PWR_TRACK,"OFDM_index[%d]=%d\n", p, dm->rf_calibrate_info.OFDM_index[p]);
 				break;
 			}
 		}
-		ODM_RT_TRACE(p_dm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("kfree_offset[%d]=%d\n", p, p_rf_calibrate_info->kfree_offset[p]));
+		RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "kfree_offset[%d]=%d\n", p, cali_info->kfree_offset[p]);
 
 	}
 
 	/* calculate average thermal meter */
-	p_dm->rf_calibrate_info.thermal_value_avg[p_dm->rf_calibrate_info.thermal_value_avg_index] = thermal_value;
-	p_dm->rf_calibrate_info.thermal_value_avg_index++;
-	if (p_dm->rf_calibrate_info.thermal_value_avg_index == c.average_thermal_num)  /* Average times =  c.average_thermal_num */
-		p_dm->rf_calibrate_info.thermal_value_avg_index = 0;
+	dm->rf_calibrate_info.thermal_value_avg[dm->rf_calibrate_info.thermal_value_avg_index] = thermal_value;
+	dm->rf_calibrate_info.thermal_value_avg_index++;
+	if (dm->rf_calibrate_info.thermal_value_avg_index == c.average_thermal_num)  /* Average times =  c.average_thermal_num */
+		dm->rf_calibrate_info.thermal_value_avg_index = 0;
 
 	for (i = 0; i < c.average_thermal_num; i++) {
-		if (p_dm->rf_calibrate_info.thermal_value_avg[i]) {
-			thermal_value_avg += p_dm->rf_calibrate_info.thermal_value_avg[i];
+		if (dm->rf_calibrate_info.thermal_value_avg[i]) {
+			thermal_value_avg += dm->rf_calibrate_info.thermal_value_avg[i];
 			thermal_value_avg_count++;
 		}
 	}
 
 	if (thermal_value_avg_count) {            /* Calculate Average thermal_value after average enough times */
 		thermal_value = (u8)(thermal_value_avg / thermal_value_avg_count);
-		ODM_RT_TRACE(p_dm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,
-			("AVG Thermal Meter = 0x%X, EEPROMthermalmeter = 0x%X\n", thermal_value, priv->pmib->dot11RFEntry.ther));
+		RF_DBG(dm, DBG_RF_TX_PWR_TRACK,"AVG Thermal Meter = 0x%X, EEPROMthermalmeter = 0x%X\n", thermal_value, priv->pmib->dot11RFEntry.ther);
 	}
 
 	/* 4 Calculate delta, delta_LCK, delta_IQK. */
 	delta = RTL_ABS(thermal_value, priv->pmib->dot11RFEntry.ther);
-	delta_LCK = RTL_ABS(thermal_value, p_dm->rf_calibrate_info.thermal_value_lck);
-	delta_IQK = RTL_ABS(thermal_value, p_dm->rf_calibrate_info.thermal_value_iqk);
+	delta_LCK = RTL_ABS(thermal_value, dm->rf_calibrate_info.thermal_value_lck);
+	delta_IQK = RTL_ABS(thermal_value, dm->rf_calibrate_info.thermal_value_iqk);
 	is_increase = ((thermal_value < priv->pmib->dot11RFEntry.ther) ? 0 : 1);
 
 	/* 4 if necessary, do LCK. */
-	if (!(p_dm->support_ic_type & ODM_RTL8821)) {
-		if ((delta_LCK > c.threshold_iqk) && (!p_iqk_info->rfk_forbidden)) {
-			ODM_RT_TRACE(p_dm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("delta_LCK(%d) >= threshold_iqk(%d)\n", delta_LCK, c.threshold_iqk));
-			p_dm->rf_calibrate_info.thermal_value_lck = thermal_value;
+	if (!(dm->support_ic_type & ODM_RTL8821)) {
+		if ((delta_LCK > c.threshold_iqk) && (!iqk_info->rfk_forbidden)) {
+			RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "delta_LCK(%d) >= threshold_iqk(%d)\n", delta_LCK, c.threshold_iqk);
+			dm->rf_calibrate_info.thermal_value_lck = thermal_value;
 
 			/*Use RTLCK, so close power tracking driver LCK*/
 #if (RTL8814A_SUPPORT != 1)
-			if (!(p_dm->support_ic_type & ODM_RTL8814A)) {
+			if (!(dm->support_ic_type & ODM_RTL8814A)) {
 				if (c.phy_lc_calibrate)
-					(*c.phy_lc_calibrate)(p_dm);
+					(*c.phy_lc_calibrate)(dm);
 			}
 #endif
 		}
 	}
 
-	if ((delta_IQK > c.threshold_iqk) && (!p_iqk_info->rfk_forbidden)) {
+	if ((delta_IQK > c.threshold_iqk) && (!iqk_info->rfk_forbidden)) {
 		panic_printk("%s(%d)\n", __FUNCTION__, __LINE__);
-		ODM_RT_TRACE(p_dm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("delta_IQK(%d) >= threshold_iqk(%d)\n", delta_IQK, c.threshold_iqk));
-		p_dm->rf_calibrate_info.thermal_value_iqk = thermal_value;
+		RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "delta_IQK(%d) >= threshold_iqk(%d)\n", delta_IQK, c.threshold_iqk);
+		dm->rf_calibrate_info.thermal_value_iqk = thermal_value;
 		if (c.do_iqk)
-			(*c.do_iqk)(p_dm, true, 0, 0);
+			(*c.do_iqk)(dm, true, 0, 0);
 	}
 
 	if (!priv->pmib->dot11RFEntry.ther)	/*Don't do power tracking since no calibrated thermal value*/
@@ -708,14 +735,12 @@ odm_txpowertracking_callback_thermal_meter_jaguar_series2(
 	/* 4 Do Power Tracking */
 
 	if (is_tssi_enable == true) {
-		ODM_RT_TRACE(p_dm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("**********Enter PURE TSSI MODE**********\n"));
+		RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "**********Enter PURE TSSI MODE**********\n");
 		for (p = RF_PATH_A; p < c.rf_path_count; p++)
-			(*c.odm_tx_pwr_track_set_pwr)(p_dm, TSSI_MODE, p, 0);
-	} else if (thermal_value != p_dm->rf_calibrate_info.thermal_value) {
-		ODM_RT_TRACE(p_dm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,
-			     ("\n******** START POWER TRACKING ********\n"));
-		ODM_RT_TRACE(p_dm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,
-			("\nReadback Thermal Meter = 0x%x pre thermal meter 0x%x EEPROMthermalmeter 0x%x\n", thermal_value, p_dm->rf_calibrate_info.thermal_value, priv->pmib->dot11RFEntry.ther));
+			(*c.odm_tx_pwr_track_set_pwr)(dm, TSSI_MODE, p, 0);
+	} else if (thermal_value != dm->rf_calibrate_info.thermal_value) {
+		RF_DBG(dm, DBG_RF_TX_PWR_TRACK,"\n******** START POWER TRACKING ********\n");
+		RF_DBG(dm, DBG_RF_TX_PWR_TRACK,"\nReadback Thermal Meter = 0x%x pre thermal meter 0x%x EEPROMthermalmeter 0x%x\n", thermal_value, dm->rf_calibrate_info.thermal_value, priv->pmib->dot11RFEntry.ther);
 
 #ifdef _TRACKING_TABLE_FILE
 		if (priv->pshare->rf_ft_var.pwr_track_file) {
@@ -723,35 +748,27 @@ odm_txpowertracking_callback_thermal_meter_jaguar_series2(
 				for (p = RF_PATH_A; p < c.rf_path_count; p++) {
 					switch (p) {
 					case RF_PATH_B:
-						ODM_RT_TRACE(p_dm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,
-							("delta_swing_table_idx_tup_b[%d] = %d\n", delta, delta_swing_table_idx_tup_b[delta]));
-						p_rf_calibrate_info->absolute_ofdm_swing_idx[p] = delta_swing_table_idx_tup_b[delta];       /* Record delta swing for mix mode power tracking */
-						ODM_RT_TRACE(p_dm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,
-							("******Temp is higher and p_dm->absolute_ofdm_swing_idx[RF_PATH_B] = %d\n", p_rf_calibrate_info->absolute_ofdm_swing_idx[p]));
+						RF_DBG(dm, DBG_RF_TX_PWR_TRACK,"delta_swing_table_idx_tup_b[%d] = %d\n", delta, delta_swing_table_idx_tup_b[delta]);
+						cali_info->absolute_ofdm_swing_idx[p] = delta_swing_table_idx_tup_b[delta];       /* Record delta swing for mix mode power tracking */
+						RF_DBG(dm, DBG_RF_TX_PWR_TRACK,"******Temp is higher and dm->absolute_ofdm_swing_idx[RF_PATH_B] = %d\n", cali_info->absolute_ofdm_swing_idx[p]);
 						break;
 
 					case RF_PATH_C:
-						ODM_RT_TRACE(p_dm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,
-							("delta_swing_table_idx_tup_c[%d] = %d\n", delta, delta_swing_table_idx_tup_c[delta]));
-						p_rf_calibrate_info->absolute_ofdm_swing_idx[p] = delta_swing_table_idx_tup_c[delta];       /* Record delta swing for mix mode power tracking */
-						ODM_RT_TRACE(p_dm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,
-							("******Temp is higher and p_dm->absolute_ofdm_swing_idx[RF_PATH_C] = %d\n", p_rf_calibrate_info->absolute_ofdm_swing_idx[p]));
+						RF_DBG(dm, DBG_RF_TX_PWR_TRACK,"delta_swing_table_idx_tup_c[%d] = %d\n", delta, delta_swing_table_idx_tup_c[delta]);
+						cali_info->absolute_ofdm_swing_idx[p] = delta_swing_table_idx_tup_c[delta];       /* Record delta swing for mix mode power tracking */
+						RF_DBG(dm, DBG_RF_TX_PWR_TRACK,"******Temp is higher and dm->absolute_ofdm_swing_idx[RF_PATH_C] = %d\n", cali_info->absolute_ofdm_swing_idx[p]);
 						break;
 
 					case RF_PATH_D:
-						ODM_RT_TRACE(p_dm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,
-							("delta_swing_table_idx_tup_d[%d] = %d\n", delta, delta_swing_table_idx_tup_d[delta]));
-						p_rf_calibrate_info->absolute_ofdm_swing_idx[p] = delta_swing_table_idx_tup_d[delta];       /* Record delta swing for mix mode power tracking */
-						ODM_RT_TRACE(p_dm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,
-							("******Temp is higher and p_dm->absolute_ofdm_swing_idx[RF_PATH_D] = %d\n", p_rf_calibrate_info->absolute_ofdm_swing_idx[p]));
+						RF_DBG(dm, DBG_RF_TX_PWR_TRACK,"delta_swing_table_idx_tup_d[%d] = %d\n", delta, delta_swing_table_idx_tup_d[delta]);
+						cali_info->absolute_ofdm_swing_idx[p] = delta_swing_table_idx_tup_d[delta];       /* Record delta swing for mix mode power tracking */
+						RF_DBG(dm, DBG_RF_TX_PWR_TRACK,"******Temp is higher and dm->absolute_ofdm_swing_idx[RF_PATH_D] = %d\n", cali_info->absolute_ofdm_swing_idx[p]);
 						break;
 
 					default:
-						ODM_RT_TRACE(p_dm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,
-							("delta_swing_table_idx_tup_a[%d] = %d\n", delta, delta_swing_table_idx_tup_a[delta]));
-						p_rf_calibrate_info->absolute_ofdm_swing_idx[p] = delta_swing_table_idx_tup_a[delta];        /* Record delta swing for mix mode power tracking */
-						ODM_RT_TRACE(p_dm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,
-							("******Temp is higher and p_dm->absolute_ofdm_swing_idx[RF_PATH_A] = %d\n", p_rf_calibrate_info->absolute_ofdm_swing_idx[p]));
+						RF_DBG(dm, DBG_RF_TX_PWR_TRACK,"delta_swing_table_idx_tup_a[%d] = %d\n", delta, delta_swing_table_idx_tup_a[delta]);
+						cali_info->absolute_ofdm_swing_idx[p] = delta_swing_table_idx_tup_a[delta];        /* Record delta swing for mix mode power tracking */
+						RF_DBG(dm, DBG_RF_TX_PWR_TRACK,"******Temp is higher and dm->absolute_ofdm_swing_idx[RF_PATH_A] = %d\n", cali_info->absolute_ofdm_swing_idx[p]);
 						break;
 					}
 				}
@@ -759,55 +776,47 @@ odm_txpowertracking_callback_thermal_meter_jaguar_series2(
 				for (p = RF_PATH_A; p < c.rf_path_count; p++) {
 					switch (p) {
 					case RF_PATH_B:
-						ODM_RT_TRACE(p_dm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,
-							("delta_swing_table_idx_tdown_b[%d] = %d\n", delta, delta_swing_table_idx_tdown_b[delta]));
-						p_rf_calibrate_info->absolute_ofdm_swing_idx[p] = -1 * delta_swing_table_idx_tdown_b[delta];        /* Record delta swing for mix mode power tracking */
-						ODM_RT_TRACE(p_dm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,
-							("******Temp is lower and p_dm->absolute_ofdm_swing_idx[RF_PATH_B] = %d\n", p_rf_calibrate_info->absolute_ofdm_swing_idx[p]));
+						RF_DBG(dm, DBG_RF_TX_PWR_TRACK,"delta_swing_table_idx_tdown_b[%d] = %d\n", delta, delta_swing_table_idx_tdown_b[delta]);
+						cali_info->absolute_ofdm_swing_idx[p] = -1 * delta_swing_table_idx_tdown_b[delta];        /* Record delta swing for mix mode power tracking */
+						RF_DBG(dm, DBG_RF_TX_PWR_TRACK,"******Temp is lower and dm->absolute_ofdm_swing_idx[RF_PATH_B] = %d\n", cali_info->absolute_ofdm_swing_idx[p]);
 						break;
 
 					case RF_PATH_C:
-						ODM_RT_TRACE(p_dm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,
-							("delta_swing_table_idx_tdown_c[%d] = %d\n", delta, delta_swing_table_idx_tdown_c[delta]));
-						p_rf_calibrate_info->absolute_ofdm_swing_idx[p] = -1 * delta_swing_table_idx_tdown_c[delta];        /* Record delta swing for mix mode power tracking */
-						ODM_RT_TRACE(p_dm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,
-							("******Temp is lower and p_dm->absolute_ofdm_swing_idx[RF_PATH_C] = %d\n", p_rf_calibrate_info->absolute_ofdm_swing_idx[p]));
+						RF_DBG(dm, DBG_RF_TX_PWR_TRACK,"delta_swing_table_idx_tdown_c[%d] = %d\n", delta, delta_swing_table_idx_tdown_c[delta]);
+						cali_info->absolute_ofdm_swing_idx[p] = -1 * delta_swing_table_idx_tdown_c[delta];        /* Record delta swing for mix mode power tracking */
+						RF_DBG(dm, DBG_RF_TX_PWR_TRACK,"******Temp is lower and dm->absolute_ofdm_swing_idx[RF_PATH_C] = %d\n", cali_info->absolute_ofdm_swing_idx[p]);
 						break;
 
 					case RF_PATH_D:
-						ODM_RT_TRACE(p_dm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,
-							("delta_swing_table_idx_tdown_d[%d] = %d\n", delta, delta_swing_table_idx_tdown_d[delta]));
-						p_rf_calibrate_info->absolute_ofdm_swing_idx[p] = -1 * delta_swing_table_idx_tdown_d[delta];        /* Record delta swing for mix mode power tracking */
-						ODM_RT_TRACE(p_dm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,
-							("******Temp is lower and p_dm->absolute_ofdm_swing_idx[RF_PATH_D] = %d\n", p_rf_calibrate_info->absolute_ofdm_swing_idx[p]));
+						RF_DBG(dm, DBG_RF_TX_PWR_TRACK,"delta_swing_table_idx_tdown_d[%d] = %d\n", delta, delta_swing_table_idx_tdown_d[delta]);
+						cali_info->absolute_ofdm_swing_idx[p] = -1 * delta_swing_table_idx_tdown_d[delta];        /* Record delta swing for mix mode power tracking */
+						RF_DBG(dm, DBG_RF_TX_PWR_TRACK,"******Temp is lower and dm->absolute_ofdm_swing_idx[RF_PATH_D] = %d\n", cali_info->absolute_ofdm_swing_idx[p]);
 						break;
 
 					default:
-						ODM_RT_TRACE(p_dm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,
-							("delta_swing_table_idx_tdown_a[%d] = %d\n", delta, delta_swing_table_idx_tdown_a[delta]));
-						p_rf_calibrate_info->absolute_ofdm_swing_idx[p] = -1 * delta_swing_table_idx_tdown_a[delta];        /* Record delta swing for mix mode power tracking */
-						ODM_RT_TRACE(p_dm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,
-							("******Temp is lower and p_dm->absolute_ofdm_swing_idx[RF_PATH_A] = %d\n", p_rf_calibrate_info->absolute_ofdm_swing_idx[p]));
+						RF_DBG(dm, DBG_RF_TX_PWR_TRACK,"delta_swing_table_idx_tdown_a[%d] = %d\n", delta, delta_swing_table_idx_tdown_a[delta]);
+						cali_info->absolute_ofdm_swing_idx[p] = -1 * delta_swing_table_idx_tdown_a[delta];        /* Record delta swing for mix mode power tracking */
+						RF_DBG(dm, DBG_RF_TX_PWR_TRACK,"******Temp is lower and dm->absolute_ofdm_swing_idx[RF_PATH_A] = %d\n", cali_info->absolute_ofdm_swing_idx[p]);
 						break;
 					}
 				}
 			}
 
 			if (is_increase) {
-				ODM_RT_TRACE(p_dm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, (">>> increse power --->\n"));
+				RF_DBG(dm, DBG_RF_TX_PWR_TRACK, ">>> increse power --->\n");
 				for (p = RF_PATH_A; p < c.rf_path_count; p++)
-					(*c.odm_tx_pwr_track_set_pwr)(p_dm, MIX_MODE, p, 0);
+					(*c.odm_tx_pwr_track_set_pwr)(dm, MIX_MODE, p, 0);
 			} else {
-				ODM_RT_TRACE(p_dm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, (">>> decrese power --->\n"));
+				RF_DBG(dm, DBG_RF_TX_PWR_TRACK, ">>> decrese power --->\n");
 				for (p = RF_PATH_A; p < c.rf_path_count; p++)
-					(*c.odm_tx_pwr_track_set_pwr)(p_dm, MIX_MODE, p, 0);
+					(*c.odm_tx_pwr_track_set_pwr)(dm, MIX_MODE, p, 0);
 			}
 		}
 #endif
 
-		ODM_RT_TRACE(p_dm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("\n******** END:%s() ********\n", __FUNCTION__));
+		RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "\n******** END:%s() ********\n", __FUNCTION__);
 		/* update thermal meter value */
-		p_dm->rf_calibrate_info.thermal_value =  thermal_value;
+		dm->rf_calibrate_info.thermal_value =  thermal_value;
 
 	}
 }
@@ -816,10 +825,10 @@ odm_txpowertracking_callback_thermal_meter_jaguar_series2(
 #if (RTL8812A_SUPPORT == 1 || RTL8881A_SUPPORT == 1)
 void
 odm_txpowertracking_callback_thermal_meter_jaguar_series(
-	void		*p_dm_void
+	void		*dm_void
 )
 {
-	struct PHY_DM_STRUCT		*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
+	struct dm_struct		*dm = (struct dm_struct *)dm_void;
 	unsigned char			thermal_value = 0, delta, delta_LCK, channel, is_decrease;
 	unsigned char			thermal_value_avg_count = 0;
 	unsigned int			thermal_value_avg = 0, reg0x18;
@@ -827,13 +836,13 @@ odm_txpowertracking_callback_thermal_meter_jaguar_series(
 	int					ele_D, value32;
 	char					OFDM_index[2], index;
 	unsigned int			i = 0, j = 0, rf_path, max_rf_path = 2, rf;
-	struct rtl8192cd_priv		*priv = p_dm->priv;
+	struct rtl8192cd_priv		*priv = dm->priv;
 	unsigned char			OFDM_min_index = 7; /* OFDM BB Swing should be less than +2.5dB, which is required by Arthur and Mimic */
-	struct _IQK_INFORMATION	*p_iqk_info = &p_dm->IQK_info;
+	struct dm_iqk_info	*iqk_info = &dm->IQK_info;
 
 
 #ifdef MP_TEST
-	if ((OPMODE & WIFI_MP_STATE) || *(p_dm->p_mp_mode)) {
+	if ((OPMODE & WIFI_MP_STATE) || *(dm->mp_mode)) {
 		channel = priv->pshare->working_channel;
 		if (priv->pshare->mp_txpwr_tracking == false)
 			return;
@@ -844,10 +853,10 @@ odm_txpowertracking_callback_thermal_meter_jaguar_series(
 	}
 
 #if RTL8881A_SUPPORT
-	if (p_dm->support_ic_type == ODM_RTL8881A) {
+	if (dm->support_ic_type == ODM_RTL8881A) {
 		max_rf_path = 1;
 		if ((get_bonding_type_8881A() == BOND_8881AM || get_bonding_type_8881A() == BOND_8881AN)
-		    && priv->pshare->rf_ft_var.use_intpa8881A && (*p_dm->p_band_type == ODM_BAND_2_4G))
+		    && priv->pshare->rf_ft_var.use_intpa8881A && (*dm->band_type == ODM_BAND_2_4G))
 			OFDM_min_index = 6;		/* intPA - upper bond set to +3 dB (base: -2 dB)ot11RFEntry.phy_band_select == PHY_BAND_2G)) */
 		else
 			OFDM_min_index = 10;		/* OFDM BB Swing should be less than +1dB, which is required by Arthur and Mimic */
@@ -856,17 +865,17 @@ odm_txpowertracking_callback_thermal_meter_jaguar_series(
 
 
 	thermal_value = (unsigned char)phy_query_rf_reg(priv, RF_PATH_A, 0x42, 0xfc00, 1); /* 0x42: RF Reg[15:10] 88E */
-	ODM_RT_TRACE(p_dm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("\nReadback Thermal Meter = 0x%x pre thermal meter 0x%x EEPROMthermalmeter 0x%x\n", thermal_value, priv->pshare->thermal_value, priv->pmib->dot11RFEntry.ther));
+	RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "\nReadback Thermal Meter = 0x%x pre thermal meter 0x%x EEPROMthermalmeter 0x%x\n", thermal_value, priv->pshare->thermal_value, priv->pmib->dot11RFEntry.ther);
 
 
 	/* 4 Query OFDM BB swing default setting 	Bit[31:21] */
 	for (rf_path = 0 ; rf_path < max_rf_path ; rf_path++) {
 		ele_D = phy_query_bb_reg(priv, bb_swing_reg[rf_path], 0xffe00000);
-		ODM_RT_TRACE(p_dm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("0x%x:0x%x ([31:21] = 0x%x)\n", bb_swing_reg[rf_path], phy_query_bb_reg(priv, bb_swing_reg[rf_path], MASKDWORD), ele_D));
+		RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "0x%x:0x%x ([31:21] = 0x%x)\n", bb_swing_reg[rf_path], phy_query_bb_reg(priv, bb_swing_reg[rf_path], MASKDWORD), ele_D);
 		for (i = 0; i < OFDM_TABLE_SIZE_8812; i++) {/* 4 */
 			if (ele_D == ofdm_swing_table_8812[i]) {
 				OFDM_index[rf_path] = (unsigned char)i;
-				ODM_RT_TRACE(p_dm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("OFDM_index[%d]=%d\n", rf_path, OFDM_index[rf_path]));
+				RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "OFDM_index[%d]=%d\n", rf_path, OFDM_index[rf_path]);
 				break;
 			}
 		}
@@ -874,22 +883,22 @@ odm_txpowertracking_callback_thermal_meter_jaguar_series(
 #if 0
 	/* Query OFDM path A default setting 	Bit[31:21] */
 	ele_D = phy_query_bb_reg(priv, 0xc1c, 0xffe00000);
-	ODM_RT_TRACE(p_dm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("0xc1c:0x%x ([31:21] = 0x%x)\n", phy_query_bb_reg(priv, 0xc1c, MASKDWORD), ele_D));
+	RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "0xc1c:0x%x ([31:21] = 0x%x)\n", phy_query_bb_reg(priv, 0xc1c, MASKDWORD), ele_D);
 	for (i = 0; i < OFDM_TABLE_SIZE_8812; i++) {/* 4 */
 		if (ele_D == ofdm_swing_table_8812[i]) {
 			OFDM_index[0] = (unsigned char)i;
-			ODM_RT_TRACE(p_dm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("OFDM_index[0]=%d\n", OFDM_index[0]));
+			RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "OFDM_index[0]=%d\n", OFDM_index[0]);
 			break;
 		}
 	}
 	/* Query OFDM path B default setting */
 	if (rf == 2) {
 		ele_D = phy_query_bb_reg(priv, 0xe1c, 0xffe00000);
-		ODM_RT_TRACE(p_dm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("0xe1c:0x%x ([32:21] = 0x%x)\n", phy_query_bb_reg(priv, 0xe1c, MASKDWORD), ele_D));
+		RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "0xe1c:0x%x ([32:21] = 0x%x)\n", phy_query_bb_reg(priv, 0xe1c, MASKDWORD), ele_D);
 		for (i = 0; i < OFDM_TABLE_SIZE_8812; i++) {
 			if (ele_D == ofdm_swing_table_8812[i]) {
 				OFDM_index[1] = (unsigned char)i;
-				ODM_RT_TRACE(p_dm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("OFDM_index[1]=%d\n", OFDM_index[1]));
+				RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "OFDM_index[1]=%d\n", OFDM_index[1]);
 				break;
 			}
 		}
@@ -928,23 +937,23 @@ odm_txpowertracking_callback_thermal_meter_jaguar_series(
 		return;
 
 	if (thermal_value != priv->pshare->thermal_value) {
-		ODM_RT_TRACE(p_dm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("\n******** START POWER TRACKING ********\n"));
-		ODM_RT_TRACE(p_dm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("\nReadback Thermal Meter = 0x%x pre thermal meter 0x%x EEPROMthermalmeter 0x%x\n", thermal_value, priv->pshare->thermal_value, priv->pmib->dot11RFEntry.ther));
+		RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "\n******** START POWER TRACKING ********\n");
+		RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "\nReadback Thermal Meter = 0x%x pre thermal meter 0x%x EEPROMthermalmeter 0x%x\n", thermal_value, priv->pshare->thermal_value, priv->pmib->dot11RFEntry.ther);
 		delta = RTL_ABS(thermal_value, priv->pmib->dot11RFEntry.ther);
 		delta_LCK = RTL_ABS(thermal_value, priv->pshare->thermal_value_lck);
 		is_decrease = ((thermal_value < priv->pmib->dot11RFEntry.ther) ? 1 : 0);
-		/* if (*p_dm->p_band_type == ODM_BAND_5G) */
+		/* if (*dm->band_type == ODM_BAND_5G) */
 		{
 #ifdef _TRACKING_TABLE_FILE
 			if (priv->pshare->rf_ft_var.pwr_track_file) {
 				for (rf_path = 0; rf_path < max_rf_path; rf_path++) {
-					ODM_RT_TRACE(p_dm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("diff: (%s)%d ==> get index from table : %d)\n", (is_decrease ? "-" : "+"), delta, get_tx_tracking_index(priv, channel, rf_path, delta, is_decrease, 0)));
+					RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "diff: (%s)%d ==> get index from table : %d)\n", (is_decrease ? "-" : "+"), delta, get_tx_tracking_index(priv, channel, rf_path, delta, is_decrease, 0));
 					if (is_decrease) {
 						OFDM_index[rf_path] = priv->pshare->OFDM_index0[rf_path] + get_tx_tracking_index(priv, channel, rf_path, delta, is_decrease, 0);
 						OFDM_index[rf_path] = ((OFDM_index[rf_path] > (OFDM_TABLE_SIZE_8812 - 1)) ? (OFDM_TABLE_SIZE_8812 - 1) : OFDM_index[rf_path]);
-						ODM_RT_TRACE(p_dm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, (">>> decrese power ---> new OFDM_INDEX:%d (%d + %d)\n", OFDM_index[rf_path], priv->pshare->OFDM_index0[rf_path], get_tx_tracking_index(priv, channel, rf_path, delta, is_decrease, 0)));
+						RF_DBG(dm, DBG_RF_TX_PWR_TRACK, ">>> decrese power ---> new OFDM_INDEX:%d (%d + %d)\n", OFDM_index[rf_path], priv->pshare->OFDM_index0[rf_path], get_tx_tracking_index(priv, channel, rf_path, delta, is_decrease, 0));
 #if 0/* RTL8881A_SUPPORT */
-						if (p_dm->support_ic_type == ODM_RTL8881A) {
+						if (dm->support_ic_type == ODM_RTL8881A) {
 							if (priv->pshare->rf_ft_var.pwrtrk_tx_agc_enable) {
 								if (priv->pshare->add_tx_agc) { /* tx_agc has been added */
 									add_tx_power88xx_ac(priv, 0);
@@ -958,7 +967,7 @@ odm_txpowertracking_callback_thermal_meter_jaguar_series(
 
 						OFDM_index[rf_path] = priv->pshare->OFDM_index0[rf_path] - get_tx_tracking_index(priv, channel, rf_path, delta, is_decrease, 0);
 #if 0/* RTL8881A_SUPPORT */
-						if (p_dm->support_ic_type == ODM_RTL8881A) {
+						if (dm->support_ic_type == ODM_RTL8881A) {
 							if (priv->pshare->rf_ft_var.pwrtrk_tx_agc_enable) {
 								if (OFDM_index[i] < OFDM_min_index) {
 									priv->pshare->add_tx_agc_index = (OFDM_min_index - OFDM_index[i]) / 2; /* Calculate Remnant tx_agc value,  2 index for 1 tx_agc */
@@ -977,7 +986,7 @@ odm_txpowertracking_callback_thermal_meter_jaguar_series(
 #else
 						OFDM_index[rf_path] = ((OFDM_index[rf_path] < OFDM_min_index) ?  OFDM_min_index : OFDM_index[rf_path]);
 #endif
-						ODM_RT_TRACE(p_dm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, (">>> increse power ---> new OFDM_INDEX:%d (%d - %d)\n", OFDM_index[rf_path], priv->pshare->OFDM_index0[rf_path], get_tx_tracking_index(priv, channel, rf_path, delta, is_decrease, 0)));
+						RF_DBG(dm, DBG_RF_TX_PWR_TRACK, ">>> increse power ---> new OFDM_INDEX:%d (%d - %d)\n", OFDM_index[rf_path], priv->pshare->OFDM_index0[rf_path], get_tx_tracking_index(priv, channel, rf_path, delta, is_decrease, 0));
 					}
 				}
 			}
@@ -985,11 +994,11 @@ odm_txpowertracking_callback_thermal_meter_jaguar_series(
 			/* 4 Set new BB swing index */
 			for (rf_path = 0; rf_path < max_rf_path; rf_path++) {
 				phy_set_bb_reg(priv, bb_swing_reg[rf_path], 0xffe00000, ofdm_swing_table_8812[(unsigned int)OFDM_index[rf_path]]);
-				ODM_RT_TRACE(p_dm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("Readback 0x%x[31:21] = 0x%x, OFDM_index:%d\n", bb_swing_reg[rf_path], phy_query_bb_reg(priv, bb_swing_reg[rf_path], 0xffe00000), OFDM_index[rf_path]));
+				RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "Readback 0x%x[31:21] = 0x%x, OFDM_index:%d\n", bb_swing_reg[rf_path], phy_query_bb_reg(priv, bb_swing_reg[rf_path], 0xffe00000), OFDM_index[rf_path]);
 			}
 
 		}
-		if ((delta_LCK > 8) && (!p_iqk_info->rfk_forbidden)) {
+		if ((delta_LCK > 8) && (!iqk_info->rfk_forbidden)) {
 			RTL_W8(0x522, 0xff);
 			reg0x18 = phy_query_rf_reg(priv, RF_PATH_A, 0x18, MASK20BITS, 1);
 			phy_set_rf_reg(priv, RF_PATH_A, 0xB4, BIT(14), 1);
@@ -1004,7 +1013,7 @@ odm_txpowertracking_callback_thermal_meter_jaguar_series(
 			RTL_W8(0x522, 0x0);
 			priv->pshare->thermal_value_lck = thermal_value;
 		}
-		ODM_RT_TRACE(p_dm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("\n******** END:%s() ********\n", __FUNCTION__));
+		RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "\n******** END:%s() ********\n", __FUNCTION__);
 
 		/* update thermal meter value */
 		priv->pshare->thermal_value = thermal_value;
@@ -1018,43 +1027,43 @@ odm_txpowertracking_callback_thermal_meter_jaguar_series(
 
 void
 odm_txpowertracking_callback_thermal_meter(
-	void		*p_dm_void
+	void		*dm_void
 )
 {
-	struct PHY_DM_STRUCT		*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	struct odm_rf_calibration_structure	*p_rf_calibrate_info = &(p_dm->rf_calibrate_info);
-	struct _IQK_INFORMATION	*p_iqk_info = &p_dm->IQK_info;
-
-#if (RTL8197F_SUPPORT == 1 || RTL8822B_SUPPORT == 1 || RTL8821C_SUPPORT == 1)
-	if (p_dm->support_ic_type == ODM_RTL8197F || p_dm->support_ic_type == ODM_RTL8822B
-		|| p_dm->support_ic_type == ODM_RTL8821C) {
-		odm_txpowertracking_callback_thermal_meter_jaguar_series3(p_dm);
+	struct dm_struct		*dm = (struct dm_struct *)dm_void;
+	struct dm_rf_calibration_struct	*cali_info = &(dm->rf_calibrate_info);
+	struct dm_iqk_info	*iqk_info = &dm->IQK_info;
+
+#if (RTL8197F_SUPPORT == 1 ||RTL8192F_SUPPORT == 1 || RTL8822B_SUPPORT == 1 || RTL8821C_SUPPORT == 1 || RTL8198F_SUPPORT == 1)
+	if (dm->support_ic_type == ODM_RTL8197F || dm->support_ic_type == ODM_RTL8192F || dm->support_ic_type == ODM_RTL8822B
+		|| dm->support_ic_type == ODM_RTL8821C || dm->support_ic_type == ODM_RTL8198F) {
+		odm_txpowertracking_callback_thermal_meter_jaguar_series3(dm);
 		return;
 	}
 #endif
 #if (RTL8814A_SUPPORT == 1)		/*use this function to do power tracking after 8814 by YuChen*/
-	if (p_dm->support_ic_type & ODM_RTL8814A) {
-		odm_txpowertracking_callback_thermal_meter_jaguar_series2(p_dm);
+	if (dm->support_ic_type & ODM_RTL8814A) {
+		odm_txpowertracking_callback_thermal_meter_jaguar_series2(dm);
 		return;
 	}
 #endif
 #if (RTL8881A_SUPPORT || RTL8812A_SUPPORT == 1)
-	if (p_dm->support_ic_type & ODM_RTL8812 || p_dm->support_ic_type & ODM_RTL8881A) {
-		odm_txpowertracking_callback_thermal_meter_jaguar_series(p_dm);
+	if (dm->support_ic_type & ODM_RTL8812 || dm->support_ic_type & ODM_RTL8881A) {
+		odm_txpowertracking_callback_thermal_meter_jaguar_series(dm);
 		return;
 	}
 #endif
 
 #if (RTL8192E_SUPPORT == 1)
-	if (p_dm->support_ic_type == ODM_RTL8192E) {
-		odm_txpowertracking_callback_thermal_meter_92e(p_dm);
+	if (dm->support_ic_type == ODM_RTL8192E) {
+		odm_txpowertracking_callback_thermal_meter_92e(dm);
 		return;
 	}
 #endif
 
 #if !(DM_ODM_SUPPORT_TYPE & ODM_AP)
-	HAL_DATA_TYPE	*p_hal_data = GET_HAL_DATA(adapter);
-	/* PMGNT_INFO      		p_mgnt_info = &adapter->mgnt_info; */
+	HAL_DATA_TYPE	*hal_data = GET_HAL_DATA(((PADAPTER)adapter));
+	/* PMGNT_INFO      		mgnt_info = &adapter->mgnt_info; */
 #endif
 
 
@@ -1070,10 +1079,10 @@ odm_txpowertracking_callback_thermal_meter(
 	/*	bool 		bInteralPA = false; */
 
 	u8			OFDM_max_index = 34, rf = (is2T) ? 2 : 1; /* OFDM BB Swing should be less than +3.0dB, which is required by Arthur */
-	u8			indexforchannel = 0;/*get_right_chnl_place_for_iqk(p_hal_data->current_channel)*/
+	u8			indexforchannel = 0;/*get_right_chnl_place_for_iqk(hal_data->current_channel)*/
 	enum            _POWER_DEC_INC { POWER_DEC, POWER_INC };
 
-	struct _TXPWRTRACK_CFG	c;
+	struct txpwrtrack_cfg	c;
 
 
 	/* 4 1. The following TWO tables decide the final index of OFDM/CCK swing table. */
@@ -1087,64 +1096,64 @@ odm_txpowertracking_callback_thermal_meter(
 	};
 
 #if (DM_ODM_SUPPORT_TYPE & ODM_AP)
-	struct rtl8192cd_priv	*priv = p_dm->priv;
+	struct rtl8192cd_priv	*priv = dm->priv;
 #endif
 
 	/* 4 2. Initilization ( 7 steps in total ) */
 
-	configure_txpower_track(p_dm, &c);
+	configure_txpower_track(dm, &c);
 
-	p_dm->rf_calibrate_info.txpowertracking_callback_cnt++; /* cosa add for debug */
-	p_dm->rf_calibrate_info.is_txpowertracking_init = true;
+	dm->rf_calibrate_info.txpowertracking_callback_cnt++; /* cosa add for debug */
+	dm->rf_calibrate_info.is_txpowertracking_init = true;
 
 #if (MP_DRIVER == 1)
-	p_dm->rf_calibrate_info.txpowertrack_control = p_hal_data->txpowertrack_control; /* <Kordan> We should keep updating the control variable according to HalData.
+	dm->rf_calibrate_info.txpowertrack_control = hal_data->txpowertrack_control; /* <Kordan> We should keep updating the control variable according to HalData.
      * <Kordan> rf_calibrate_info.rega24 will be initialized when ODM HW configuring, but MP configures with para files. */
-	p_dm->rf_calibrate_info.rega24 = 0x090e1317;
+	dm->rf_calibrate_info.rega24 = 0x090e1317;
 #endif
 
 #if (DM_ODM_SUPPORT_TYPE == ODM_AP) && defined(MP_TEST)
-	if ((OPMODE & WIFI_MP_STATE) || *(p_dm->p_mp_mode)) {
-		if (p_dm->priv->pshare->mp_txpwr_tracking == false)
+	if ((OPMODE & WIFI_MP_STATE) || *(dm->mp_mode)) {
+		if (dm->priv->pshare->mp_txpwr_tracking == false)
 			return;
 	}
 #endif
-	ODM_RT_TRACE(p_dm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("===>odm_txpowertracking_callback_thermal_meter_8188e, p_dm->bb_swing_idx_cck_base: %d, p_dm->bb_swing_idx_ofdm_base: %d\n", p_rf_calibrate_info->bb_swing_idx_cck_base, p_rf_calibrate_info->bb_swing_idx_ofdm_base));
+	RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "===>odm_txpowertracking_callback_thermal_meter_8188e, dm->bb_swing_idx_cck_base: %d, dm->bb_swing_idx_ofdm_base: %d\n", cali_info->bb_swing_idx_cck_base, cali_info->bb_swing_idx_ofdm_base);
 	/*
-		if (!p_dm->rf_calibrate_info.tm_trigger) {
-			odm_set_rf_reg(p_dm, RF_PATH_A, c.thermal_reg_addr, BIT(17) | BIT(16), 0x3);
-			p_dm->rf_calibrate_info.tm_trigger = 1;
+		if (!dm->rf_calibrate_info.tm_trigger) {
+			odm_set_rf_reg(dm, RF_PATH_A, c.thermal_reg_addr, BIT(17) | BIT(16), 0x3);
+			dm->rf_calibrate_info.tm_trigger = 1;
 			return;
 		}
 	*/
-	thermal_value = (u8)odm_get_rf_reg(p_dm, RF_PATH_A, c.thermal_reg_addr, 0xfc00);	/* 0x42: RF Reg[15:10] 88E */
+	thermal_value = (u8)odm_get_rf_reg(dm, RF_PATH_A, c.thermal_reg_addr, 0xfc00);	/* 0x42: RF Reg[15:10] 88E */
 #if !(DM_ODM_SUPPORT_TYPE & ODM_AP)
-	if (!thermal_value || !p_dm->rf_calibrate_info.txpowertrack_control)
+	if (!thermal_value || !dm->rf_calibrate_info.txpowertrack_control)
 #else
-	if (!p_dm->rf_calibrate_info.txpowertrack_control)
+	if (!dm->rf_calibrate_info.txpowertrack_control)
 #endif
 		return;
 
 	/* 4 3. Initialize ThermalValues of rf_calibrate_info */
 
-	if (!p_dm->rf_calibrate_info.thermal_value) {
-		p_dm->rf_calibrate_info.thermal_value_lck = thermal_value;
-		p_dm->rf_calibrate_info.thermal_value_iqk = thermal_value;
+	if (!dm->rf_calibrate_info.thermal_value) {
+		dm->rf_calibrate_info.thermal_value_lck = thermal_value;
+		dm->rf_calibrate_info.thermal_value_iqk = thermal_value;
 	}
 
-	if (p_dm->rf_calibrate_info.is_reloadtxpowerindex)
-		ODM_RT_TRACE(p_dm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("reload ofdm index for band switch\n"));
+	if (dm->rf_calibrate_info.is_reloadtxpowerindex)
+		RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "reload ofdm index for band switch\n");
 
 	/* 4 4. Calculate average thermal meter */
 
-	p_dm->rf_calibrate_info.thermal_value_avg[p_dm->rf_calibrate_info.thermal_value_avg_index] = thermal_value;
-	p_dm->rf_calibrate_info.thermal_value_avg_index++;
-	if (p_dm->rf_calibrate_info.thermal_value_avg_index == c.average_thermal_num)
-		p_dm->rf_calibrate_info.thermal_value_avg_index = 0;
+	dm->rf_calibrate_info.thermal_value_avg[dm->rf_calibrate_info.thermal_value_avg_index] = thermal_value;
+	dm->rf_calibrate_info.thermal_value_avg_index++;
+	if (dm->rf_calibrate_info.thermal_value_avg_index == c.average_thermal_num)
+		dm->rf_calibrate_info.thermal_value_avg_index = 0;
 
 	for (i = 0; i < c.average_thermal_num; i++) {
-		if (p_dm->rf_calibrate_info.thermal_value_avg[i]) {
-			thermal_value_avg += p_dm->rf_calibrate_info.thermal_value_avg[i];
+		if (dm->rf_calibrate_info.thermal_value_avg[i]) {
+			thermal_value_avg += dm->rf_calibrate_info.thermal_value_avg[i];
 			thermal_value_avg_count++;
 		}
 	}
@@ -1154,124 +1163,121 @@ odm_txpowertracking_callback_thermal_meter(
 		thermal_value_avg += (thermal_value * 4);
 
 		thermal_value = (u8)(thermal_value_avg / (thermal_value_avg_count + 4));
-		p_rf_calibrate_info->thermal_value_delta = thermal_value - priv->pmib->dot11RFEntry.ther;
-		ODM_RT_TRACE(p_dm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("AVG Thermal Meter = 0x%x\n", thermal_value));
+		cali_info->thermal_value_delta = thermal_value - priv->pmib->dot11RFEntry.ther;
+		RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "AVG Thermal Meter = 0x%x\n", thermal_value);
 	}
 
 	/* 4 5. Calculate delta, delta_LCK, delta_IQK. */
 
-	delta	  = (thermal_value > p_dm->rf_calibrate_info.thermal_value) ? (thermal_value - p_dm->rf_calibrate_info.thermal_value) : (p_dm->rf_calibrate_info.thermal_value - thermal_value);
-	delta_LCK = (thermal_value > p_dm->rf_calibrate_info.thermal_value_lck) ? (thermal_value - p_dm->rf_calibrate_info.thermal_value_lck) : (p_dm->rf_calibrate_info.thermal_value_lck - thermal_value);
-	delta_IQK = (thermal_value > p_dm->rf_calibrate_info.thermal_value_iqk) ? (thermal_value - p_dm->rf_calibrate_info.thermal_value_iqk) : (p_dm->rf_calibrate_info.thermal_value_iqk - thermal_value);
+	delta	  = (thermal_value > dm->rf_calibrate_info.thermal_value) ? (thermal_value - dm->rf_calibrate_info.thermal_value) : (dm->rf_calibrate_info.thermal_value - thermal_value);
+	delta_LCK = (thermal_value > dm->rf_calibrate_info.thermal_value_lck) ? (thermal_value - dm->rf_calibrate_info.thermal_value_lck) : (dm->rf_calibrate_info.thermal_value_lck - thermal_value);
+	delta_IQK = (thermal_value > dm->rf_calibrate_info.thermal_value_iqk) ? (thermal_value - dm->rf_calibrate_info.thermal_value_iqk) : (dm->rf_calibrate_info.thermal_value_iqk - thermal_value);
 
 	/* 4 6. If necessary, do LCK. */
-	if (!(p_dm->support_ic_type & ODM_RTL8821)) {
-		/*if((delta_LCK > p_hal_data->delta_lck) && (p_hal_data->delta_lck != 0))*/
-		if ((delta_LCK >= c.threshold_iqk) && (!p_iqk_info->rfk_forbidden)) {
+	if (!(dm->support_ic_type & ODM_RTL8821)) {
+		/*if((delta_LCK > hal_data->delta_lck) && (hal_data->delta_lck != 0))*/
+		if ((delta_LCK >= c.threshold_iqk) && (!iqk_info->rfk_forbidden)) {
 			/*Delta temperature is equal to or larger than 20 centigrade.*/
-			p_dm->rf_calibrate_info.thermal_value_lck = thermal_value;
-			(*c.phy_lc_calibrate)(p_dm);
+			dm->rf_calibrate_info.thermal_value_lck = thermal_value;
+			(*c.phy_lc_calibrate)(dm);
 		}
 	}
 
 	/* 3 7. If necessary, move the index of swing table to adjust Tx power. */
 
-	if (delta > 0 && p_dm->rf_calibrate_info.txpowertrack_control) {
+	if (delta > 0 && dm->rf_calibrate_info.txpowertrack_control) {
 
-		delta = (thermal_value > p_dm->priv->pmib->dot11RFEntry.ther) ? (thermal_value - p_dm->priv->pmib->dot11RFEntry.ther) : (p_dm->priv->pmib->dot11RFEntry.ther - thermal_value);
+		delta = (thermal_value > dm->priv->pmib->dot11RFEntry.ther) ? (thermal_value - dm->priv->pmib->dot11RFEntry.ther) : (dm->priv->pmib->dot11RFEntry.ther - thermal_value);
 
 		/* 4 7.1 The Final Power index = BaseIndex + power_index_offset */
 
-		if (thermal_value > p_dm->priv->pmib->dot11RFEntry.ther) {
+		if (thermal_value > dm->priv->pmib->dot11RFEntry.ther) {
 			CALCULATE_SWINGTALBE_OFFSET(offset, POWER_INC, index_mapping_NUM_88E, delta);
-			p_dm->rf_calibrate_info.delta_power_index_last = p_dm->rf_calibrate_info.delta_power_index;
-			p_dm->rf_calibrate_info.delta_power_index =  delta_swing_table_idx[POWER_INC][offset];
+			dm->rf_calibrate_info.delta_power_index_last = dm->rf_calibrate_info.delta_power_index;
+			dm->rf_calibrate_info.delta_power_index =  delta_swing_table_idx[POWER_INC][offset];
 
 		} else {
 
 			CALCULATE_SWINGTALBE_OFFSET(offset, POWER_DEC, index_mapping_NUM_88E, delta);
-			p_dm->rf_calibrate_info.delta_power_index_last = p_dm->rf_calibrate_info.delta_power_index;
-			p_dm->rf_calibrate_info.delta_power_index = (-1) * delta_swing_table_idx[POWER_DEC][offset];
+			dm->rf_calibrate_info.delta_power_index_last = dm->rf_calibrate_info.delta_power_index;
+			dm->rf_calibrate_info.delta_power_index = (-1) * delta_swing_table_idx[POWER_DEC][offset];
 		}
 
-		if (p_dm->rf_calibrate_info.delta_power_index == p_dm->rf_calibrate_info.delta_power_index_last)
-			p_dm->rf_calibrate_info.power_index_offset = 0;
+		if (dm->rf_calibrate_info.delta_power_index == dm->rf_calibrate_info.delta_power_index_last)
+			dm->rf_calibrate_info.power_index_offset = 0;
 		else
-			p_dm->rf_calibrate_info.power_index_offset = p_dm->rf_calibrate_info.delta_power_index - p_dm->rf_calibrate_info.delta_power_index_last;
+			dm->rf_calibrate_info.power_index_offset = dm->rf_calibrate_info.delta_power_index - dm->rf_calibrate_info.delta_power_index_last;
 
 		for (i = 0; i < rf; i++)
-			p_dm->rf_calibrate_info.OFDM_index[i] = p_rf_calibrate_info->bb_swing_idx_ofdm_base + p_dm->rf_calibrate_info.power_index_offset;
-		p_dm->rf_calibrate_info.CCK_index = p_rf_calibrate_info->bb_swing_idx_cck_base + p_dm->rf_calibrate_info.power_index_offset;
+			dm->rf_calibrate_info.OFDM_index[i] = cali_info->bb_swing_idx_ofdm_base + dm->rf_calibrate_info.power_index_offset;
+		dm->rf_calibrate_info.CCK_index = cali_info->bb_swing_idx_cck_base + dm->rf_calibrate_info.power_index_offset;
 
-		p_rf_calibrate_info->bb_swing_idx_cck = p_dm->rf_calibrate_info.CCK_index;
-		p_rf_calibrate_info->bb_swing_idx_ofdm[RF_PATH_A] = p_dm->rf_calibrate_info.OFDM_index[RF_PATH_A];
+		cali_info->bb_swing_idx_cck = dm->rf_calibrate_info.CCK_index;
+		cali_info->bb_swing_idx_ofdm[RF_PATH_A] = dm->rf_calibrate_info.OFDM_index[RF_PATH_A];
 
-		ODM_RT_TRACE(p_dm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("The 'CCK' final index(%d) = BaseIndex(%d) + power_index_offset(%d)\n", p_rf_calibrate_info->bb_swing_idx_cck, p_rf_calibrate_info->bb_swing_idx_cck_base, p_dm->rf_calibrate_info.power_index_offset));
-		ODM_RT_TRACE(p_dm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("The 'OFDM' final index(%d) = BaseIndex(%d) + power_index_offset(%d)\n", p_rf_calibrate_info->bb_swing_idx_ofdm[RF_PATH_A], p_rf_calibrate_info->bb_swing_idx_ofdm_base, p_dm->rf_calibrate_info.power_index_offset));
+		RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "The 'CCK' final index(%d) = BaseIndex(%d) + power_index_offset(%d)\n", cali_info->bb_swing_idx_cck, cali_info->bb_swing_idx_cck_base, dm->rf_calibrate_info.power_index_offset);
+		RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "The 'OFDM' final index(%d) = BaseIndex(%d) + power_index_offset(%d)\n", cali_info->bb_swing_idx_ofdm[RF_PATH_A], cali_info->bb_swing_idx_ofdm_base, dm->rf_calibrate_info.power_index_offset);
 
 		/* 4 7.1 Handle boundary conditions of index. */
 
 
 		for (i = 0; i < rf; i++) {
-			if (p_dm->rf_calibrate_info.OFDM_index[i] > OFDM_max_index)
-				p_dm->rf_calibrate_info.OFDM_index[i] = OFDM_max_index;
-			else if (p_dm->rf_calibrate_info.OFDM_index[i] < 0)
-				p_dm->rf_calibrate_info.OFDM_index[i] = 0;
+			if (dm->rf_calibrate_info.OFDM_index[i] > OFDM_max_index)
+				dm->rf_calibrate_info.OFDM_index[i] = OFDM_max_index;
+			else if (dm->rf_calibrate_info.OFDM_index[i] < 0)
+				dm->rf_calibrate_info.OFDM_index[i] = 0;
 		}
 
-		if (p_dm->rf_calibrate_info.CCK_index > c.swing_table_size_cck - 1)
-			p_dm->rf_calibrate_info.CCK_index = c.swing_table_size_cck - 1;
-		else if (p_dm->rf_calibrate_info.CCK_index < 0)
-			p_dm->rf_calibrate_info.CCK_index = 0;
+		if (dm->rf_calibrate_info.CCK_index > c.swing_table_size_cck - 1)
+			dm->rf_calibrate_info.CCK_index = c.swing_table_size_cck - 1;
+		else if (dm->rf_calibrate_info.CCK_index < 0)
+			dm->rf_calibrate_info.CCK_index = 0;
 	} else {
-		ODM_RT_TRACE(p_dm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,
-			("The thermal meter is unchanged or TxPowerTracking OFF: thermal_value: %d, p_dm->rf_calibrate_info.thermal_value: %d)\n", thermal_value, p_dm->rf_calibrate_info.thermal_value));
-		p_dm->rf_calibrate_info.power_index_offset = 0;
+		RF_DBG(dm, DBG_RF_TX_PWR_TRACK,"The thermal meter is unchanged or TxPowerTracking OFF: thermal_value: %d, dm->rf_calibrate_info.thermal_value: %d)\n", thermal_value, dm->rf_calibrate_info.thermal_value);
+		dm->rf_calibrate_info.power_index_offset = 0;
 	}
-	ODM_RT_TRACE(p_dm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,
-		("TxPowerTracking: [CCK] Swing Current index: %d, Swing base index: %d\n", p_dm->rf_calibrate_info.CCK_index, p_rf_calibrate_info->bb_swing_idx_cck_base));
+	RF_DBG(dm, DBG_RF_TX_PWR_TRACK,"TxPowerTracking: [CCK] Swing Current index: %d, Swing base index: %d\n", dm->rf_calibrate_info.CCK_index, cali_info->bb_swing_idx_cck_base);
 
-	ODM_RT_TRACE(p_dm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,
-		("TxPowerTracking: [OFDM] Swing Current index: %d, Swing base index: %d\n", p_dm->rf_calibrate_info.OFDM_index[RF_PATH_A], p_rf_calibrate_info->bb_swing_idx_ofdm_base));
+	RF_DBG(dm, DBG_RF_TX_PWR_TRACK,"TxPowerTracking: [OFDM] Swing Current index: %d, Swing base index: %d\n", dm->rf_calibrate_info.OFDM_index[RF_PATH_A], cali_info->bb_swing_idx_ofdm_base);
 
-	if (p_dm->rf_calibrate_info.power_index_offset != 0 && p_dm->rf_calibrate_info.txpowertrack_control) {
+	if (dm->rf_calibrate_info.power_index_offset != 0 && dm->rf_calibrate_info.txpowertrack_control) {
 		/* 4 7.2 Configure the Swing Table to adjust Tx Power. */
 
-		p_dm->rf_calibrate_info.is_tx_power_changed = true; /* Always true after Tx Power is adjusted by power tracking. */
+		dm->rf_calibrate_info.is_tx_power_changed = true; /* Always true after Tx Power is adjusted by power tracking. */
 		/*  */
 		/* 2012/04/23 MH According to Luke's suggestion, we can not write BB digital */
 		/* to increase TX power. Otherwise, EVM will be bad. */
 		/*  */
 		/* 2012/04/25 MH Add for tx power tracking to set tx power in tx agc for 88E. */
-		if (thermal_value > p_dm->rf_calibrate_info.thermal_value) {
-			/* ODM_RT_TRACE(p_dm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, */
-			/*	("Temperature Increasing: delta_pi: %d, delta_t: %d, Now_t: %d, EFUSE_t: %d, Last_t: %d\n", */
-			/*	p_dm->rf_calibrate_info.power_index_offset, delta, thermal_value, p_hal_data->eeprom_thermal_meter, p_dm->rf_calibrate_info.thermal_value)); */
-		} else if (thermal_value < p_dm->rf_calibrate_info.thermal_value) { /* Low temperature */
-			/* ODM_RT_TRACE(p_dm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, */
-			/*	("Temperature Decreasing: delta_pi: %d, delta_t: %d, Now_t: %d, EFUSE_t: %d, Last_t: %d\n", */
-			/*		p_dm->rf_calibrate_info.power_index_offset, delta, thermal_value, p_hal_data->eeprom_thermal_meter, p_dm->rf_calibrate_info.thermal_value)); */
+		if (thermal_value > dm->rf_calibrate_info.thermal_value) {
+			/* RF_DBG(dm,DBG_RF_TX_PWR_TRACK, */
+			/*	"Temperature Increasing: delta_pi: %d, delta_t: %d, Now_t: %d, EFUSE_t: %d, Last_t: %d\n", */
+			/*	dm->rf_calibrate_info.power_index_offset, delta, thermal_value, hal_data->eeprom_thermal_meter, dm->rf_calibrate_info.thermal_value); */
+		} else if (thermal_value < dm->rf_calibrate_info.thermal_value) { /* Low temperature */
+			/* RF_DBG(dm,DBG_RF_TX_PWR_TRACK, */
+			/*	"Temperature Decreasing: delta_pi: %d, delta_t: %d, Now_t: %d, EFUSE_t: %d, Last_t: %d\n", */
+			/*		dm->rf_calibrate_info.power_index_offset, delta, thermal_value, hal_data->eeprom_thermal_meter, dm->rf_calibrate_info.thermal_value); */
 		}
-		if (thermal_value > p_dm->priv->pmib->dot11RFEntry.ther)
+		if (thermal_value > dm->priv->pmib->dot11RFEntry.ther)
 		{
-			/*				ODM_RT_TRACE(p_dm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,("Temperature(%d) hugher than PG value(%d), increases the power by tx_agc\n", thermal_value, p_hal_data->eeprom_thermal_meter)); */
-			(*c.odm_tx_pwr_track_set_pwr)(p_dm, TXAGC, 0, 0);
+			/*				RF_DBG(dm,DBG_RF_TX_PWR_TRACK,"Temperature(%d) hugher than PG value(%d), increases the power by tx_agc\n", thermal_value, hal_data->eeprom_thermal_meter); */
+			(*c.odm_tx_pwr_track_set_pwr)(dm, TXAGC, 0, 0);
 		} else {
-			/*			ODM_RT_TRACE(p_dm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,("Temperature(%d) lower than PG value(%d), increases the power by tx_agc\n", thermal_value, p_hal_data->eeprom_thermal_meter)); */
-			(*c.odm_tx_pwr_track_set_pwr)(p_dm, BBSWING, RF_PATH_A, indexforchannel);
+			/*			RF_DBG(dm,DBG_RF_TX_PWR_TRACK,"Temperature(%d) lower than PG value(%d), increases the power by tx_agc\n", thermal_value, hal_data->eeprom_thermal_meter); */
+			(*c.odm_tx_pwr_track_set_pwr)(dm, BBSWING, RF_PATH_A, indexforchannel);
 			if (is2T)
-				(*c.odm_tx_pwr_track_set_pwr)(p_dm, BBSWING, RF_PATH_B, indexforchannel);
+				(*c.odm_tx_pwr_track_set_pwr)(dm, BBSWING, RF_PATH_B, indexforchannel);
 		}
 
-		p_rf_calibrate_info->bb_swing_idx_cck_base = p_rf_calibrate_info->bb_swing_idx_cck;
-		p_rf_calibrate_info->bb_swing_idx_ofdm_base = p_rf_calibrate_info->bb_swing_idx_ofdm[RF_PATH_A];
-		p_dm->rf_calibrate_info.thermal_value = thermal_value;
+		cali_info->bb_swing_idx_cck_base = cali_info->bb_swing_idx_cck;
+		cali_info->bb_swing_idx_ofdm_base = cali_info->bb_swing_idx_ofdm[RF_PATH_A];
+		dm->rf_calibrate_info.thermal_value = thermal_value;
 
 	}
 
-	ODM_RT_TRACE(p_dm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("<===dm_TXPowerTrackingCallback_ThermalMeter_8188E\n"));
+	RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "<===dm_TXPowerTrackingCallback_ThermalMeter_8188E\n");
 
-	p_dm->rf_calibrate_info.tx_powercount = 0;
+	dm->rf_calibrate_info.tx_powercount = 0;
 }
 
 /* 3============================================================
@@ -1280,7 +1286,7 @@ odm_txpowertracking_callback_thermal_meter(
 
 void
 odm_reset_iqk_result(
-	void		*p_dm_void
+	void		*dm_void
 )
 {
 	return;
@@ -1307,47 +1313,47 @@ u8 odm_get_right_chnl_place_for_iqk(u8 chnl)
 
 void
 odm_iq_calibrate(
-	struct PHY_DM_STRUCT	*p_dm
+	struct dm_struct	*dm
 )
 {
-	struct _IQK_INFORMATION	*p_iqk_info = &p_dm->IQK_info;
+	struct dm_iqk_info	*iqk_info = &dm->IQK_info;
 
-	if ((p_dm->is_linked) && (!p_iqk_info->rfk_forbidden)) {
-		if ((*p_dm->p_channel != p_dm->pre_channel) && (!*p_dm->p_is_scan_in_process)) {
-			p_dm->pre_channel = *p_dm->p_channel;
-			p_dm->linked_interval = 0;
+	if ((dm->is_linked) && (!iqk_info->rfk_forbidden)) {
+		if ((*dm->channel != dm->pre_channel) && (!*dm->is_scan_in_process)) {
+			dm->pre_channel = *dm->channel;
+			dm->linked_interval = 0;
 		}
 
-		if (p_dm->linked_interval < 3)
-			p_dm->linked_interval++;
+		if (dm->linked_interval < 3)
+			dm->linked_interval++;
 
-		if (p_dm->linked_interval == 2)
-			halrf_iqk_trigger(p_dm, false);
+		if (dm->linked_interval == 2)
+			halrf_iqk_trigger(dm, false);
 	} else
-		p_dm->linked_interval = 0;
+		dm->linked_interval = 0;
 
 }
 
-void phydm_rf_init(void		*p_dm_void)
+void phydm_rf_init(void		*dm_void)
 {
-	struct PHY_DM_STRUCT		*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	odm_txpowertracking_init(p_dm);
+	struct dm_struct		*dm = (struct dm_struct *)dm_void;
+	odm_txpowertracking_init(dm);
 
 #if (DM_ODM_SUPPORT_TYPE & (ODM_AP))
 #if (RTL8814A_SUPPORT == 1)
-	if (p_dm->support_ic_type & ODM_RTL8814A)
-		phy_iq_calibrate_8814a_init(p_dm);
+	if (dm->support_ic_type & ODM_RTL8814A)
+		phy_iq_calibrate_8814a_init(dm);
 #endif
 #endif
 
 }
 
-void phydm_rf_watchdog(void		*p_dm_void)
+void phydm_rf_watchdog(void		*dm_void)
 {
-	struct PHY_DM_STRUCT		*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
+	struct dm_struct		*dm = (struct dm_struct *)dm_void;
 #if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_CE))
-	odm_txpowertracking_check(p_dm);
-	if (p_dm->support_ic_type & ODM_IC_11AC_SERIES)
-		odm_iq_calibrate(p_dm);
+	odm_txpowertracking_check(dm);
+	if (dm->support_ic_type & ODM_IC_11AC_SERIES)
+		odm_iq_calibrate(dm);
 #endif
 }
diff --git a/rtl8723DS/hal/phydm/halrf/halphyrf_ap.h b/rtl8723DS/hal/phydm/halrf/halphyrf_ap.h
index ee34c21..0c1cbb8 100755..100644
--- a/rtl8723DS/hal/phydm/halrf/halphyrf_ap.h
+++ b/rtl8723DS/hal/phydm/halrf/halphyrf_ap.h
@@ -13,8 +13,8 @@
  *
  *****************************************************************************/
 
-#ifndef __HAL_PHY_RF_H__
-#define __HAL_PHY_RF_H__
+#ifndef __HALPHYRF_H__
+#define __HALPHYRF_H__
 
 #include "halrf/halrf_powertracking_ap.h"
 #include "halrf/halrf_kfree.h"
@@ -31,6 +31,22 @@
 	#include "halrf/rtl8821c/halrf_iqk_8821c.h"
 #endif
 
+#if (RTL8195B_SUPPORT == 1)
+//	#include "halrf/rtl8195b/halrf.h"
+	#include "halrf/rtl8195b/halrf_iqk_8195b.h"
+	#include "halrf/rtl8195b/halrf_txgapk_8195b.h"
+	#include "halrf/rtl8195b/halrf_dpk_8195b.h"
+#endif
+
+#if (RTL8198F_SUPPORT == 1)
+	#include "halrf/rtl8198f/halrf_iqk_8198f.h"
+	#include "halrf/rtl8198f/halrf_dpk_8198f.h"
+#endif
+
+#if (RTL8814B_SUPPORT == 1)
+	#include "halrf/rtl8814b/halrf_iqk_8814b.h"
+#endif
+
 enum pwrtrack_method {
 	BBSWING,
 	TXAGC,
@@ -45,9 +61,9 @@ typedef void	(*func_lck)(void *);
 typedef void	(*func_swing)(void *, u8 **, u8 **, u8 **, u8 **);
 typedef void	(*func_swing8814only)(void *, u8 **, u8 **, u8 **, u8 **);
 typedef void	(*func_all_swing)(void *, u8 **, u8 **, u8 **, u8 **, u8 **, u8 **, u8 **, u8 **);
+typedef void	(*func_all_swing_ex)(void *, u8 **, u8 **, u8 **, u8 **, u8 **, u8 **, u8 **, u8 **);
 
-
-struct _TXPWRTRACK_CFG {
+struct txpwrtrack_cfg {
 	u8		swing_table_size_cck;
 	u8		swing_table_size_ofdm;
 	u8		threshold_iqk;
@@ -60,44 +76,45 @@ struct _TXPWRTRACK_CFG {
 	func_lck		phy_lc_calibrate;
 	func_swing	get_delta_swing_table;
 	func_swing8814only	get_delta_swing_table8814only;
-	func_all_swing	get_delta_all_swing_table;
+	func_all_swing		get_delta_all_swing_table;
+	func_all_swing_ex	get_delta_all_swing_table_ex;
 };
 
 void
 configure_txpower_track(
-	void		*p_dm_void,
-	struct _TXPWRTRACK_CFG	*p_config
+	void		*dm_void,
+	struct txpwrtrack_cfg	*config
 );
 
 
 void
 odm_txpowertracking_callback_thermal_meter(
-	void		*p_dm_void
+	void		*dm_void
 );
 
 #if (RTL8192E_SUPPORT == 1)
 void
 odm_txpowertracking_callback_thermal_meter_92e(
-	void		*p_dm_void
+	void		*dm_void
 );
 #endif
 
 #if (RTL8814A_SUPPORT == 1)
 void
 odm_txpowertracking_callback_thermal_meter_jaguar_series2(
-	void		*p_dm_void
+	void		*dm_void
 );
 
 #elif ODM_IC_11AC_SERIES_SUPPORT
 void
 odm_txpowertracking_callback_thermal_meter_jaguar_series(
-	void		*p_dm_void
+	void		*dm_void
 );
 
 #elif (RTL8197F_SUPPORT == 1 || RTL8822B_SUPPORT == 1)
 void
 odm_txpowertracking_callback_thermal_meter_jaguar_series3(
-	void		*p_dm_void
+	void		*dm_void
 );
 
 #endif
@@ -109,14 +126,14 @@ odm_txpowertracking_callback_thermal_meter_jaguar_series3(
 
 void
 odm_reset_iqk_result(
-	void		*p_dm_void
+	void		*dm_void
 );
 u8
 odm_get_right_chnl_place_for_iqk(
 	u8 chnl
 );
 
-void phydm_rf_init(void		*p_dm_void);
-void phydm_rf_watchdog(void		*p_dm_void);
+void phydm_rf_init(void		*dm_void);
+void phydm_rf_watchdog(void		*dm_void);
 
-#endif	/*  #ifndef __HAL_PHY_RF_H__ */
+#endif	/*#ifndef __HALPHYRF_H__*/
diff --git a/rtl8723DS/hal/phydm/halrf/halphyrf_ce.c b/rtl8723DS/hal/phydm/halrf/halphyrf_ce.c
index f9c031f..c8753e5 100755..100644
--- a/rtl8723DS/hal/phydm/halrf/halphyrf_ce.c
+++ b/rtl8723DS/hal/phydm/halrf/halphyrf_ce.c
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2007 - 2017 Realtek Corporation.
+ * Copyright(c) 2007 - 2017  Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -8,257 +8,442 @@
  *
  * This program is distributed in the hope that it will be useful, but WITHOUT
  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  * more details.
  *
+ * The full GNU General Public License is included in this distribution in the
+ * file called LICENSE.
+ *
+ * Contact Information:
+ * wlanfae <wlanfae@realtek.com>
+ * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
+ * Hsinchu 300, Taiwan.
+ *
+ * Larry Finger <Larry.Finger@lwfinger.net>
+ *
  *****************************************************************************/
 
 #include "mp_precomp.h"
 #include "phydm_precomp.h"
 
-#define	CALCULATE_SWINGTALBE_OFFSET(_offset, _direction, _size, _delta_thermal) \
-	do {\
-		for (_offset = 0; _offset < _size; _offset++) { \
-			\
-			if (_delta_thermal < thermal_threshold[_direction][_offset]) { \
-				\
-				if (_offset != 0)\
-					_offset--;\
-				break;\
-			} \
-		}			\
-		if (_offset >= _size)\
-			_offset = _size-1;\
+#define CALCULATE_SWINGTALBE_OFFSET(_offset, _direction, _size, _delta_thermal)\
+	do {                                                                   \
+		u32 __offset = (u32)_offset;                                   \
+		u32 __size = (u32)_size;                                       \
+		for (__offset = 0; __offset < __size; __offset++) {            \
+			if (_delta_thermal <                                   \
+				thermal_threshold[_direction][__offset]) {     \
+				if (__offset != 0)                             \
+					__offset--;                            \
+				break;                                         \
+			}                                                      \
+		}                                                              \
+		if (__offset >= __size)                                        \
+			__offset = __size - 1;                                 \
 	} while (0)
 
-void configure_txpower_track(
-	void					*p_dm_void,
-	struct _TXPWRTRACK_CFG	*p_config
-)
+void configure_txpower_track(void *dm_void, struct txpwrtrack_cfg *config)
 {
-	struct PHY_DM_STRUCT		*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
 
 #if RTL8192E_SUPPORT
-	if (p_dm->support_ic_type == ODM_RTL8192E)
-		configure_txpower_track_8192e(p_config);
+	if (dm->support_ic_type == ODM_RTL8192E)
+		configure_txpower_track_8192e(config);
 #endif
 #if RTL8821A_SUPPORT
-	if (p_dm->support_ic_type == ODM_RTL8821)
-		configure_txpower_track_8821a(p_config);
+	if (dm->support_ic_type == ODM_RTL8821)
+		configure_txpower_track_8821a(config);
 #endif
 #if RTL8812A_SUPPORT
-	if (p_dm->support_ic_type == ODM_RTL8812)
-		configure_txpower_track_8812a(p_config);
+	if (dm->support_ic_type == ODM_RTL8812)
+		configure_txpower_track_8812a(config);
 #endif
 #if RTL8188E_SUPPORT
-	if (p_dm->support_ic_type == ODM_RTL8188E)
-		configure_txpower_track_8188e(p_config);
+	if (dm->support_ic_type == ODM_RTL8188E)
+		configure_txpower_track_8188e(config);
 #endif
 
 #if RTL8723B_SUPPORT
-	if (p_dm->support_ic_type == ODM_RTL8723B)
-		configure_txpower_track_8723b(p_config);
+	if (dm->support_ic_type == ODM_RTL8723B)
+		configure_txpower_track_8723b(config);
 #endif
 
 #if RTL8814A_SUPPORT
-	if (p_dm->support_ic_type == ODM_RTL8814A)
-		configure_txpower_track_8814a(p_config);
+	if (dm->support_ic_type == ODM_RTL8814A)
+		configure_txpower_track_8814a(config);
 #endif
 
 #if RTL8703B_SUPPORT
-	if (p_dm->support_ic_type == ODM_RTL8703B)
-		configure_txpower_track_8703b(p_config);
+	if (dm->support_ic_type == ODM_RTL8703B)
+		configure_txpower_track_8703b(config);
 #endif
 
 #if RTL8188F_SUPPORT
-	if (p_dm->support_ic_type == ODM_RTL8188F)
-		configure_txpower_track_8188f(p_config);
+	if (dm->support_ic_type == ODM_RTL8188F)
+		configure_txpower_track_8188f(config);
 #endif
 #if RTL8723D_SUPPORT
-	if (p_dm->support_ic_type == ODM_RTL8723D)
-		configure_txpower_track_8723d(p_config);
+	if (dm->support_ic_type == ODM_RTL8723D)
+		configure_txpower_track_8723d(config);
 #endif
-/* JJ ADD 20161014 */
+/*@ JJ ADD 20161014 */
 #if RTL8710B_SUPPORT
-	if (p_dm->support_ic_type == ODM_RTL8710B)
-		configure_txpower_track_8710b(p_config);
+	if (dm->support_ic_type == ODM_RTL8710B)
+		configure_txpower_track_8710b(config);
 #endif
-
 #if RTL8822B_SUPPORT
-	if (p_dm->support_ic_type == ODM_RTL8822B)
-		configure_txpower_track_8822b(p_config);
+	if (dm->support_ic_type == ODM_RTL8822B)
+		configure_txpower_track_8822b(config);
 #endif
 #if RTL8821C_SUPPORT
-	if (p_dm->support_ic_type == ODM_RTL8821C)
-		configure_txpower_track_8821c(p_config);
+	if (dm->support_ic_type == ODM_RTL8821C)
+		configure_txpower_track_8821c(config);
 #endif
 
+#if RTL8192F_SUPPORT
+	if (dm->support_ic_type == ODM_RTL8192F)
+		configure_txpower_track_8192f(config);
+#endif
 }
 
-/* **********************************************************************
+/*@ **********************************************************************
  * <20121113, Kordan> This function should be called when tx_agc changed.
  * Otherwise the previous compensation is gone, because we record the
  * delta of temperature between two TxPowerTracking watch dogs.
  *
  * NOTE: If Tx BB swing or Tx scaling is varified during run-time, still
  * need to call this function.
- * ********************************************************************** */
-void
-odm_clear_txpowertracking_state(
-	void					*p_dm_void
-)
+ * **********************************************************************
+ */
+void odm_clear_txpowertracking_state(void *dm_void)
 {
-	struct PHY_DM_STRUCT		*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-#if (DM_ODM_SUPPORT_TYPE == ODM_CE) && defined(DM_ODM_CE_MAC80211)
-	struct rtl_priv *rtlpriv = (struct rtl_priv *)p_dm->adapter;
-	struct rtl_efuse *rtlefu = rtl_efuse(rtlpriv);
-#else
-	PHAL_DATA_TYPE	p_hal_data = GET_HAL_DATA(p_dm->adapter);
-#endif
-	u8			p = 0;
-	struct odm_rf_calibration_structure	*p_rf_calibrate_info = &(p_dm->rf_calibrate_info);
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct _hal_rf_ *rf = &dm->rf_table;
+	u8 p = 0;
+	struct dm_rf_calibration_struct *cali_info = &dm->rf_calibrate_info;
 
-	p_rf_calibrate_info->bb_swing_idx_cck_base = p_rf_calibrate_info->default_cck_index;
-	p_rf_calibrate_info->bb_swing_idx_cck = p_rf_calibrate_info->default_cck_index;
-	p_dm->rf_calibrate_info.CCK_index = 0;
+	cali_info->bb_swing_idx_cck_base = cali_info->default_cck_index;
+	cali_info->bb_swing_idx_cck = cali_info->default_cck_index;
+	dm->rf_calibrate_info.CCK_index = 0;
 
 	for (p = RF_PATH_A; p < MAX_RF_PATH; ++p) {
-		p_rf_calibrate_info->bb_swing_idx_ofdm_base[p] = p_rf_calibrate_info->default_ofdm_index;
-		p_rf_calibrate_info->bb_swing_idx_ofdm[p] = p_rf_calibrate_info->default_ofdm_index;
-		p_rf_calibrate_info->OFDM_index[p] = p_rf_calibrate_info->default_ofdm_index;
-
-		p_rf_calibrate_info->power_index_offset[p] = 0;
-		p_rf_calibrate_info->delta_power_index[p] = 0;
-		p_rf_calibrate_info->delta_power_index_last[p] = 0;
+		cali_info->bb_swing_idx_ofdm_base[p]
+						= cali_info->default_ofdm_index;
+		cali_info->bb_swing_idx_ofdm[p] = cali_info->default_ofdm_index;
+		cali_info->OFDM_index[p] = cali_info->default_ofdm_index;
+
+		cali_info->power_index_offset[p] = 0;
+		cali_info->delta_power_index[p] = 0;
+		cali_info->delta_power_index_last[p] = 0;
+
+		/* Initial Mix mode power tracking*/
+		cali_info->absolute_ofdm_swing_idx[p] = 0;
+		cali_info->remnant_ofdm_swing_idx[p] = 0;
+		cali_info->kfree_offset[p] = 0;
+	}
+	/* Initial Mix mode power tracking*/
+	cali_info->modify_tx_agc_flag_path_a = false;
+	cali_info->modify_tx_agc_flag_path_b = false;
+	cali_info->modify_tx_agc_flag_path_c = false;
+	cali_info->modify_tx_agc_flag_path_d = false;
+	cali_info->remnant_cck_swing_idx = 0;
+	cali_info->thermal_value = rf->eeprom_thermal;
+	cali_info->modify_tx_agc_value_cck = 0;
+	cali_info->modify_tx_agc_value_ofdm = 0;
+}
 
-		p_rf_calibrate_info->absolute_ofdm_swing_idx[p] = 0;    /* Initial Mix mode power tracking*/
-		p_rf_calibrate_info->remnant_ofdm_swing_idx[p] = 0;
-		p_rf_calibrate_info->kfree_offset[p] = 0;
+void odm_get_tracking_table(void *dm_void, u8 thermal_value, u8 delta)
+{
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct dm_rf_calibration_struct *cali_info = &dm->rf_calibrate_info;
+	struct _hal_rf_ *rf = &dm->rf_table;
+	struct txpwrtrack_cfg c = {0};
+
+	u8 p;
+	/* 4 1. TWO tables decide the final index of OFDM/CCK swing table. */
+	u8 *pwrtrk_tab_up_a = NULL;
+	u8 *pwrtrk_tab_down_a = NULL;
+	u8 *pwrtrk_tab_up_b = NULL;
+	u8 *pwrtrk_tab_down_b = NULL;
+	/*for 8814 add by Yu Chen*/
+	u8 *pwrtrk_tab_up_c = NULL;
+	u8 *pwrtrk_tab_down_c = NULL;
+	u8 *pwrtrk_tab_up_d = NULL;
+	u8 *pwrtrk_tab_down_d = NULL;
+	/*for Xtal Offset by James.Tung*/
+	s8 *xtal_tab_up = NULL;
+	s8 *xtal_tab_down = NULL;
+
+	configure_txpower_track(dm, &c);
+
+	(*c.get_delta_swing_table)(dm,
+				   (u8 **)&pwrtrk_tab_up_a,
+				   (u8 **)&pwrtrk_tab_down_a,
+				   (u8 **)&pwrtrk_tab_up_b,
+				   (u8 **)&pwrtrk_tab_down_b);
+
+	if (dm->support_ic_type & ODM_RTL8814A) /*for 8814 path C & D*/
+		(*c.get_delta_swing_table8814only)(dm,
+						   (u8 **)&pwrtrk_tab_up_c,
+						   (u8 **)&pwrtrk_tab_down_c,
+						   (u8 **)&pwrtrk_tab_up_d,
+						   (u8 **)&pwrtrk_tab_down_d);
+	/*for Xtal Offset*/
+	if (dm->support_ic_type &
+	    (ODM_RTL8703B | ODM_RTL8723D | ODM_RTL8710B | ODM_RTL8192F))
+		(*c.get_delta_swing_xtal_table)(dm,
+						(s8 **)&xtal_tab_up,
+						(s8 **)&xtal_tab_down);
+
+	if (thermal_value > rf->eeprom_thermal) {
+		for (p = RF_PATH_A; p < c.rf_path_count; p++) {
+			/*recording power index offset*/
+			cali_info->delta_power_index_last[p] =
+					cali_info->delta_power_index[p];
+			RF_DBG(dm, DBG_RF_TX_PWR_TRACK,
+			       "******Temp is higher******\n");
+			switch (p) {
+			case RF_PATH_B:
+				RF_DBG(dm, DBG_RF_TX_PWR_TRACK,
+				       "pwrtrk_tab_up_b[%d] = %d\n", delta,
+				       pwrtrk_tab_up_b[delta]);
+
+				cali_info->delta_power_index[p] =
+							pwrtrk_tab_up_b[delta];
+				cali_info->absolute_ofdm_swing_idx[p] =
+							pwrtrk_tab_up_b[delta];
+				RF_DBG(dm, DBG_RF_TX_PWR_TRACK,
+				       "absolute_ofdm_swing_idx[PATH_B] = %d\n",
+				       cali_info->absolute_ofdm_swing_idx[p]);
+				break;
+
+			case RF_PATH_C:
+				RF_DBG(dm, DBG_RF_TX_PWR_TRACK,
+				       "pwrtrk_tab_up_c[%d] = %d\n", delta,
+				       pwrtrk_tab_up_c[delta]);
+
+				cali_info->delta_power_index[p] =
+							pwrtrk_tab_up_c[delta];
+				cali_info->absolute_ofdm_swing_idx[p] =
+							pwrtrk_tab_up_c[delta];
+				RF_DBG(dm, DBG_RF_TX_PWR_TRACK,
+				       "absolute_ofdm_swing_idx[PATH_C] = %d\n",
+				       cali_info->absolute_ofdm_swing_idx[p]);
+				break;
+
+			case RF_PATH_D:
+				RF_DBG(dm, DBG_RF_TX_PWR_TRACK,
+				       "pwrtrk_tab_up_d[%d] = %d\n", delta,
+				       pwrtrk_tab_up_d[delta]);
+
+				cali_info->delta_power_index[p] =
+							pwrtrk_tab_up_d[delta];
+				cali_info->absolute_ofdm_swing_idx[p] =
+							pwrtrk_tab_up_d[delta];
+				RF_DBG(dm, DBG_RF_TX_PWR_TRACK,
+				       "absolute_ofdm_swing_idx[PATH_D] = %d\n",
+				       cali_info->absolute_ofdm_swing_idx[p]);
+				break;
+
+			default:
+				RF_DBG(dm, DBG_RF_TX_PWR_TRACK,
+				       "pwrtrk_tab_up_a[%d] = %d\n", delta,
+				       pwrtrk_tab_up_a[delta]);
+
+				cali_info->delta_power_index[p] =
+							pwrtrk_tab_up_a[delta];
+				cali_info->absolute_ofdm_swing_idx[p] =
+							pwrtrk_tab_up_a[delta];
+				RF_DBG(dm, DBG_RF_TX_PWR_TRACK,
+				       "absolute_ofdm_swing_idx[PATH_A] = %d\n",
+				       cali_info->absolute_ofdm_swing_idx[p]);
+				break;
+			}
+		}
+		/* @JJ ADD 20161014 */
+		/*Save xtal_offset from Xtal table*/
+		if (dm->support_ic_type &
+		    (ODM_RTL8703B | ODM_RTL8723D | ODM_RTL8710B |
+		    ODM_RTL8192F)) {
+			/*recording last Xtal offset*/
+			cali_info->xtal_offset_last = cali_info->xtal_offset;
+			RF_DBG(dm, DBG_RF_TX_PWR_TRACK,
+			       "[Xtal] xtal_tab_up[%d] = %d\n",
+			       delta, xtal_tab_up[delta]);
+			cali_info->xtal_offset = xtal_tab_up[delta];
+			if (cali_info->xtal_offset_last != xtal_tab_up[delta])
+				cali_info->xtal_offset_eanble = 1;
+		}
+	} else {
+		for (p = RF_PATH_A; p < c.rf_path_count; p++) {
+			/*recording power index offset*/
+			cali_info->delta_power_index_last[p] =
+						cali_info->delta_power_index[p];
+			RF_DBG(dm, DBG_RF_TX_PWR_TRACK,
+			       "******Temp is lower******\n");
+			switch (p) {
+			case RF_PATH_B:
+				RF_DBG(dm, DBG_RF_TX_PWR_TRACK,
+				       "pwrtrk_tab_down_b[%d] = %d\n", delta,
+				       pwrtrk_tab_down_b[delta]);
+				cali_info->delta_power_index[p] =
+						-1 * pwrtrk_tab_down_b[delta];
+				cali_info->absolute_ofdm_swing_idx[p] =
+						-1 * pwrtrk_tab_down_b[delta];
+				RF_DBG(dm, DBG_RF_TX_PWR_TRACK,
+				       "absolute_ofdm_swing_idx[PATH_B] = %d\n",
+				       cali_info->absolute_ofdm_swing_idx[p]);
+				break;
+
+			case RF_PATH_C:
+				RF_DBG(dm, DBG_RF_TX_PWR_TRACK,
+				       "pwrtrk_tab_down_c[%d] = %d\n", delta,
+				       pwrtrk_tab_down_c[delta]);
+				cali_info->delta_power_index[p] =
+						-1 * pwrtrk_tab_down_c[delta];
+				cali_info->absolute_ofdm_swing_idx[p] =
+						-1 * pwrtrk_tab_down_c[delta];
+				RF_DBG(dm, DBG_RF_TX_PWR_TRACK,
+				       "absolute_ofdm_swing_idx[PATH_C] = %d\n",
+				       cali_info->absolute_ofdm_swing_idx[p]);
+				break;
+
+			case RF_PATH_D:
+				RF_DBG(dm, DBG_RF_TX_PWR_TRACK,
+				       "pwrtrk_tab_down_d[%d] = %d\n", delta,
+				       pwrtrk_tab_down_d[delta]);
+				cali_info->delta_power_index[p] =
+						-1 * pwrtrk_tab_down_d[delta];
+				cali_info->absolute_ofdm_swing_idx[p] =
+						-1 * pwrtrk_tab_down_d[delta];
+				RF_DBG(dm, DBG_RF_TX_PWR_TRACK,
+				       "absolute_ofdm_swing_idx[PATH_D] = %d\n",
+				       cali_info->absolute_ofdm_swing_idx[p]);
+				break;
+
+			default:
+				RF_DBG(dm, DBG_RF_TX_PWR_TRACK,
+				       "pwrtrk_tab_down_a[%d] = %d\n", delta,
+				       pwrtrk_tab_down_a[delta]);
+				cali_info->delta_power_index[p] =
+						-1 * pwrtrk_tab_down_a[delta];
+				cali_info->absolute_ofdm_swing_idx[p] =
+						-1 * pwrtrk_tab_down_a[delta];
+				RF_DBG(dm, DBG_RF_TX_PWR_TRACK,
+				       "absolute_ofdm_swing_idx[PATH_A] = %d\n",
+				       cali_info->absolute_ofdm_swing_idx[p]);
+				break;
+			}
+		}
+		/* @JJ ADD 20161014 */
+		if (dm->support_ic_type &
+		    (ODM_RTL8703B | ODM_RTL8723D | ODM_RTL8710B |
+		    ODM_RTL8192F)) {
+			/*recording last Xtal offset*/
+			cali_info->xtal_offset_last = cali_info->xtal_offset;
+			RF_DBG(dm, DBG_RF_TX_PWR_TRACK,
+			       "[Xtal] xtal_tab_down[%d] = %d\n", delta,
+			       xtal_tab_down[delta]);
+			/*Save xtal_offset from Xtal table*/
+			cali_info->xtal_offset = xtal_tab_down[delta];
+			if (cali_info->xtal_offset_last != xtal_tab_down[delta])
+				cali_info->xtal_offset_eanble = 1;
+		}
 	}
+}
 
-	p_rf_calibrate_info->modify_tx_agc_flag_path_a = false;       /*Initial at Modify Tx Scaling mode*/
-	p_rf_calibrate_info->modify_tx_agc_flag_path_b = false;       /*Initial at Modify Tx Scaling mode*/
-	p_rf_calibrate_info->modify_tx_agc_flag_path_c = false;       /*Initial at Modify Tx Scaling mode*/
-	p_rf_calibrate_info->modify_tx_agc_flag_path_d = false;       /*Initial at Modify Tx Scaling mode*/
-	p_rf_calibrate_info->remnant_cck_swing_idx = 0;
-#if (DM_ODM_SUPPORT_TYPE == ODM_CE) && defined(DM_ODM_CE_MAC80211)
-	p_rf_calibrate_info->thermal_value = rtlefu->eeprom_thermalmeter;
-#else
-	p_rf_calibrate_info->thermal_value = p_hal_data->eeprom_thermal_meter;
-#endif
+void odm_pwrtrk_method(void *dm_void)
+{
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	u8 p, idxforchnl = 0;
+
+	struct txpwrtrack_cfg c = {0};
 
-	p_rf_calibrate_info->modify_tx_agc_value_cck = 0;			/* modify by Mingzhi.Guo */
-	p_rf_calibrate_info->modify_tx_agc_value_ofdm = 0;		/* modify by Mingzhi.Guo */
+	configure_txpower_track(dm, &c);
 
+	if (dm->support_ic_type &
+		(ODM_RTL8188E | ODM_RTL8192E | ODM_RTL8821 | ODM_RTL8812 |
+		ODM_RTL8723B | ODM_RTL8814A | ODM_RTL8703B | ODM_RTL8188F |
+		ODM_RTL8822B | ODM_RTL8723D | ODM_RTL8821C | ODM_RTL8710B |
+		ODM_RTL8192F)) {
+		RF_DBG(dm, DBG_RF_TX_PWR_TRACK,
+		       "***Enter PwrTrk MIX_MODE***\n");
+		for (p = RF_PATH_A; p < c.rf_path_count; p++)
+			(*c.odm_tx_pwr_track_set_pwr)(dm, MIX_MODE, p, 0);
+	} else {
+		RF_DBG(dm, DBG_RF_TX_PWR_TRACK,
+		       "***Enter PwrTrk BBSWING_MODE***\n");
+		for (p = RF_PATH_A; p < c.rf_path_count; p++)
+			(*c.odm_tx_pwr_track_set_pwr)
+				(dm, BBSWING, p, idxforchnl);
+	}
 }
 
-void
-odm_txpowertracking_callback_thermal_meter(
 #if (DM_ODM_SUPPORT_TYPE & ODM_AP)
-	struct PHY_DM_STRUCT		*p_dm
-#elif (DM_ODM_SUPPORT_TYPE == ODM_CE) && defined(DM_ODM_CE_MAC80211)
-	void	*p_dm_void
+void odm_txpowertracking_callback_thermal_meter(struct dm_struct *dm)
+#elif (DM_ODM_SUPPORT_TYPE == ODM_CE)
+void odm_txpowertracking_callback_thermal_meter(void *dm_void)
 #else
-	struct _ADAPTER	*adapter
+void odm_txpowertracking_callback_thermal_meter(void *adapter)
 #endif
-)
 {
-
-#if (DM_ODM_SUPPORT_TYPE == ODM_CE) && defined(DM_ODM_CE_MAC80211)
-	struct PHY_DM_STRUCT *p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	struct rtl_priv *rtlpriv = (struct rtl_priv *)p_dm->adapter;
-	struct rtl_efuse *rtlefu = rtl_efuse(rtlpriv);
-	void *adapter = p_dm->adapter;
-#elif !(DM_ODM_SUPPORT_TYPE & ODM_AP)
-	HAL_DATA_TYPE	*p_hal_data = GET_HAL_DATA(adapter);
 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
-	struct PHY_DM_STRUCT		*p_dm = &p_hal_data->DM_OutSrc;
+	HAL_DATA_TYPE *hal_data = GET_HAL_DATA(((PADAPTER)adapter));
+	struct dm_struct *dm = &hal_data->DM_OutSrc;
 #elif (DM_ODM_SUPPORT_TYPE == ODM_CE)
-	struct PHY_DM_STRUCT		*p_dm = &p_hal_data->odmpriv;
-#endif
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
 #endif
 
-	struct odm_rf_calibration_structure	*p_rf_calibrate_info = &(p_dm->rf_calibrate_info);
-	struct	_IQK_INFORMATION	*p_iqk_info = &p_dm->IQK_info;
+	struct _hal_rf_ *rf = &dm->rf_table;
+	struct dm_rf_calibration_struct *cali_info = &dm->rf_calibrate_info;
+	struct dm_iqk_info *iqk_info = &dm->IQK_info;
 
-	u8			thermal_value = 0, delta, delta_LCK, delta_IQK, p = 0, i = 0;
-	s8			diff_DPK[4] = {0};
-	u8			thermal_value_avg_count = 0;
-	u32			thermal_value_avg = 0, regc80, regcd0, regcd4, regab4;
+	u8 thermal_value = 0, delta, delta_lck, delta_iqk, p = 0, i = 0;
+	u8 thermal_value_avg_count = 0;
+	u32 thermal_value_avg = 0, regc80, regcd0, regcd4, regab4;
 
-	u8			OFDM_min_index = 0;  /* OFDM BB Swing should be less than +3.0dB, which is required by Arthur */
-	u8			indexforchannel = 0; /* get_right_chnl_place_for_iqk(p_hal_data->current_channel) */
-#if (DM_ODM_SUPPORT_TYPE == ODM_CE) && defined(DM_ODM_CE_MAC80211)
-	u8			power_tracking_type = 0;	/* no specify type */
-#else
-	u8			power_tracking_type = p_hal_data->rf_power_tracking_type;
+	/* OFDM BB Swing should be less than +3.0dB, required by Arthur */
+#if 0
+	u8 OFDM_min_index = 0;
 #endif
-	u8			xtal_offset_eanble = 0;
-	s8			thermal_value_temp = 0;
-
-	struct _TXPWRTRACK_CFG	c = {0};
+#if 0
+	/* get_right_chnl_place_for_iqk(hal_data->current_channel) */
+#endif
+	u8 power_tracking_type = rf->pwt_type;
+	s8 thermal_value_temp = 0;
 
-	/* 4 1. The following TWO tables decide the final index of OFDM/CCK swing table. */
-	u8			*delta_swing_table_idx_tup_a = NULL;
-	u8			*delta_swing_table_idx_tdown_a = NULL;
-	u8			*delta_swing_table_idx_tup_b = NULL;
-	u8			*delta_swing_table_idx_tdown_b = NULL;
-	/*for 8814 add by Yu Chen*/
-	u8			*delta_swing_table_idx_tup_c = NULL;
-	u8			*delta_swing_table_idx_tdown_c = NULL;
-	u8			*delta_swing_table_idx_tup_d = NULL;
-	u8			*delta_swing_table_idx_tdown_d = NULL;
-	/*for Xtal Offset by James.Tung*/
-	s8			*delta_swing_table_xtal_up = NULL;
-	s8			*delta_swing_table_xtal_down = NULL;
+	struct txpwrtrack_cfg c = {0};
 
-	/* 4 2. Initilization ( 7 steps in total ) */
+	/* @4 2. Initialization ( 7 steps in total ) */
 
-	configure_txpower_track(p_dm, &c);
+	configure_txpower_track(dm, &c);
 
-	(*c.get_delta_swing_table)(p_dm, (u8 **)&delta_swing_table_idx_tup_a, (u8 **)&delta_swing_table_idx_tdown_a,
-		(u8 **)&delta_swing_table_idx_tup_b, (u8 **)&delta_swing_table_idx_tdown_b);
+	cali_info->txpowertracking_callback_cnt++;
+	cali_info->is_txpowertracking_init = true;
 
-	if (p_dm->support_ic_type & ODM_RTL8814A)	/*for 8814 path C & D*/
-		(*c.get_delta_swing_table8814only)(p_dm, (u8 **)&delta_swing_table_idx_tup_c, (u8 **)&delta_swing_table_idx_tdown_c,
-			(u8 **)&delta_swing_table_idx_tup_d, (u8 **)&delta_swing_table_idx_tdown_d);
-	/* JJ ADD 20161014 */
-	if (p_dm->support_ic_type & (ODM_RTL8703B | ODM_RTL8723D | ODM_RTL8710B))	/*for Xtal Offset*/
-		(*c.get_delta_swing_xtal_table)(p_dm, (s8 **)&delta_swing_table_xtal_up, (s8 **)&delta_swing_table_xtal_down);
+	RF_DBG(dm, DBG_RF_TX_PWR_TRACK,
+	       "\n\n\n===>%s bbsw_idx_cck_base=%d\n",
+	       __func__, cali_info->bb_swing_idx_cck_base);
 
-	p_rf_calibrate_info->txpowertracking_callback_cnt++;	/*cosa add for debug*/
-	p_rf_calibrate_info->is_txpowertracking_init = true;
+	RF_DBG(dm, DBG_RF_TX_PWR_TRACK,
+	       "bbsw_idx_ofdm_base[A]=%d default_ofdm_idx=%d\n",
+	       cali_info->bb_swing_idx_ofdm_base[RF_PATH_A],
+	       cali_info->default_ofdm_index);
 
-	/*p_rf_calibrate_info->txpowertrack_control = p_hal_data->txpowertrack_control;
-	<Kordan> We should keep updating the control variable according to HalData.
-	<Kordan> rf_calibrate_info.rega24 will be initialized when ODM HW configuring, but MP configures with para files. */
-#if (DM_ODM_SUPPORT_TYPE & ODM_WIN)
-#if (MP_DRIVER == 1)
-	p_rf_calibrate_info->rega24 = 0x090e1317;
-#endif
-#elif (DM_ODM_SUPPORT_TYPE & ODM_CE)
-	if (*(p_dm->p_mp_mode) == true)
-		p_rf_calibrate_info->rega24 = 0x090e1317;
-#endif
-
-	ODM_RT_TRACE(p_dm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,
-		("===>odm_txpowertracking_callback_thermal_meter\n p_rf_calibrate_info->bb_swing_idx_cck_base: %d, p_rf_calibrate_info->bb_swing_idx_ofdm_base[A]: %d, p_rf_calibrate_info->default_ofdm_index: %d\n",
-		p_rf_calibrate_info->bb_swing_idx_cck_base, p_rf_calibrate_info->bb_swing_idx_ofdm_base[RF_PATH_A], p_rf_calibrate_info->default_ofdm_index));
-
-#if (DM_ODM_SUPPORT_TYPE == ODM_CE) && defined(DM_ODM_CE_MAC80211)
-	ODM_RT_TRACE(p_dm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,
-		("p_rf_calibrate_info->txpowertrack_control=%d,  rtlefu->eeprom_thermalmeter %d\n", p_rf_calibrate_info->txpowertrack_control,  rtlefu->eeprom_thermalmeter));
-#else
-	ODM_RT_TRACE(p_dm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,
-		("p_rf_calibrate_info->txpowertrack_control=%d,  p_hal_data->eeprom_thermal_meter %d\n", p_rf_calibrate_info->txpowertrack_control,  p_hal_data->eeprom_thermal_meter));
-#endif
+	RF_DBG(dm, DBG_RF_TX_PWR_TRACK,
+	       "cali_info->txpowertrack_control=%d, rf->eeprom_thermal %d\n",
+	       cali_info->txpowertrack_control, rf->eeprom_thermal);
 
-	thermal_value = (u8)odm_get_rf_reg(p_dm, RF_PATH_A, c.thermal_reg_addr, 0xfc00);	/* 0x42: RF Reg[15:10] 88E */
+	 /* 0x42: RF Reg[15:10] 88E */
+	thermal_value =
+		(u8)odm_get_rf_reg(dm, RF_PATH_A, c.thermal_reg_addr, 0xfc00);
 
-	thermal_value_temp = thermal_value + phydm_get_thermal_offset(p_dm);
+	thermal_value_temp = thermal_value + phydm_get_thermal_offset(dm);
 
-	ODM_RT_TRACE(p_dm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,
-		("thermal_value_temp(%d) = thermal_value(%d) + power_trim_thermal(%d)\n", thermal_value_temp, thermal_value, phydm_get_thermal_offset(p_dm)));
+	RF_DBG(dm, DBG_RF_TX_PWR_TRACK,
+	       "thermal_value_temp(%d) = ther_value(%d) + pwr_trim_ther(%d)\n",
+	       thermal_value_temp, thermal_value,
+	       phydm_get_thermal_offset(dm));
 
 	if (thermal_value_temp > 63)
 		thermal_value = 63;
@@ -267,563 +452,401 @@ odm_txpowertracking_callback_thermal_meter(
 	else
 		thermal_value = thermal_value_temp;
 
-	/*add log by zhao he, check c80/c94/c14/ca0 value*/
-	if (p_dm->support_ic_type == ODM_RTL8723D) {
-		regc80 = odm_get_bb_reg(p_dm, 0xc80, MASKDWORD);
-		regcd0 = odm_get_bb_reg(p_dm, 0xcd0, MASKDWORD);
-		regcd4 = odm_get_bb_reg(p_dm, 0xcd4, MASKDWORD);
-		regab4 = odm_get_bb_reg(p_dm, 0xab4, 0x000007FF);
-		ODM_RT_TRACE(p_dm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("0xc80 = 0x%x 0xcd0 = 0x%x 0xcd4 = 0x%x 0xab4 = 0x%x\n", regc80, regcd0, regcd4, regab4));
-	}
-	/* JJ ADD 20161014 */
-	if (p_dm->support_ic_type == ODM_RTL8710B) {
-		regc80 = odm_get_bb_reg(p_dm, 0xc80, MASKDWORD);
-		regcd0 = odm_get_bb_reg(p_dm, 0xcd0, MASKDWORD);
-		regcd4 = odm_get_bb_reg(p_dm, 0xcd4, MASKDWORD);
-		regab4 = odm_get_bb_reg(p_dm, 0xab4, 0x000007FF);
-		ODM_RT_TRACE(p_dm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("0xc80 = 0x%x 0xcd0 = 0x%x 0xcd4 = 0x%x 0xab4 = 0x%x\n", regc80, regcd0, regcd4, regab4));
+	/*@add log by zhao he, check c80/c94/c14/ca0 value*/
+	if (dm->support_ic_type &
+	    (ODM_RTL8723D | ODM_RTL8710B)) {
+		regc80 = odm_get_bb_reg(dm, R_0xc80, MASKDWORD);
+		regcd0 = odm_get_bb_reg(dm, R_0xcd0, MASKDWORD);
+		regcd4 = odm_get_bb_reg(dm, R_0xcd4, MASKDWORD);
+		regab4 = odm_get_bb_reg(dm, R_0xab4, 0x000007FF);
+		RF_DBG(dm, DBG_RF_IQK,
+		       "0xc80 = 0x%x 0xcd0 = 0x%x 0xcd4 = 0x%x 0xab4 = 0x%x\n",
+		       regc80, regcd0, regcd4, regab4);
 	}
 
-	if (!p_rf_calibrate_info->txpowertrack_control)
+	if (!cali_info->txpowertrack_control)
 		return;
 
-#if (DM_ODM_SUPPORT_TYPE == ODM_CE) && defined(DM_ODM_CE_MAC80211)
-	if (rtlefu->eeprom_thermalmeter == 0xff) {
-		ODM_RT_TRACE(p_dm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("no pg, p_hal_data->eeprom_thermal_meter = 0x%x\n", rtlefu->eeprom_thermalmeter));
+	if (rf->eeprom_thermal == 0xff) {
+		RF_DBG(dm, DBG_RF_TX_PWR_TRACK,
+		       "no pg, hal_data->eeprom_thermal_meter = 0x%x\n",
+		       rf->eeprom_thermal);
 		return;
 	}
-#else
-	if (p_hal_data->eeprom_thermal_meter == 0xff) {
-		ODM_RT_TRACE(p_dm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("no pg, p_hal_data->eeprom_thermal_meter = 0x%x\n", p_hal_data->eeprom_thermal_meter));
-		return;
-	}
-#endif
 
-	/*4 3. Initialize ThermalValues of rf_calibrate_info*/
+	/*@4 3. Initialize ThermalValues of rf_calibrate_info*/
 
-	if (p_rf_calibrate_info->is_reloadtxpowerindex)
-		ODM_RT_TRACE(p_dm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("reload ofdm index for band switch\n"));
+	if (cali_info->is_reloadtxpowerindex)
+		RF_DBG(dm, DBG_RF_TX_PWR_TRACK,
+		       "reload ofdm index for band switch\n");
 
-	/*4 4. Calculate average thermal meter*/
+	/*@4 4. Calculate average thermal meter*/
 
-	p_rf_calibrate_info->thermal_value_avg[p_rf_calibrate_info->thermal_value_avg_index] = thermal_value;
-	p_rf_calibrate_info->thermal_value_avg_index++;
-	if (p_rf_calibrate_info->thermal_value_avg_index == c.average_thermal_num)   /*Average times =  c.average_thermal_num*/
-		p_rf_calibrate_info->thermal_value_avg_index = 0;
+	cali_info->thermal_value_avg[cali_info->thermal_value_avg_index]
+		= thermal_value;
+
+	cali_info->thermal_value_avg_index++;
+	/*Average times =  c.average_thermal_num*/
+	if (cali_info->thermal_value_avg_index == c.average_thermal_num)
+		cali_info->thermal_value_avg_index = 0;
 
 	for (i = 0; i < c.average_thermal_num; i++) {
-		if (p_rf_calibrate_info->thermal_value_avg[i]) {
-			thermal_value_avg += p_rf_calibrate_info->thermal_value_avg[i];
+		if (cali_info->thermal_value_avg[i]) {
+			thermal_value_avg += cali_info->thermal_value_avg[i];
 			thermal_value_avg_count++;
 		}
 	}
 
-	if (thermal_value_avg_count) {            /* Calculate Average thermal_value after average enough times */
-		thermal_value = (u8)(thermal_value_avg / thermal_value_avg_count);
-#if (DM_ODM_SUPPORT_TYPE == ODM_CE) && defined(DM_ODM_CE_MAC80211)
-		p_rf_calibrate_info->thermal_value_delta = thermal_value - rtlefu->eeprom_thermalmeter;
-		ODM_RT_TRACE(p_dm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,
-			("AVG Thermal Meter = 0x%X, EFUSE Thermal base = 0x%X\n", thermal_value, rtlefu->eeprom_thermalmeter));
-#else
-		p_rf_calibrate_info->thermal_value_delta = thermal_value - p_hal_data->eeprom_thermal_meter;
-		ODM_RT_TRACE(p_dm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,
-			("AVG Thermal Meter = 0x%X, EFUSE Thermal base = 0x%X\n", thermal_value, p_hal_data->eeprom_thermal_meter));
-#endif
-	}
-
-	/* 4 5. Calculate delta, delta_LCK, delta_IQK. */
-
-	/* "delta" here is used to determine whether thermal value changes or not. */
-	delta	= (thermal_value > p_rf_calibrate_info->thermal_value) ? (thermal_value - p_rf_calibrate_info->thermal_value) : (p_rf_calibrate_info->thermal_value - thermal_value);
-	delta_LCK = (thermal_value > p_rf_calibrate_info->thermal_value_lck) ? (thermal_value - p_rf_calibrate_info->thermal_value_lck) : (p_rf_calibrate_info->thermal_value_lck - thermal_value);
-	delta_IQK = (thermal_value > p_rf_calibrate_info->thermal_value_iqk) ? (thermal_value - p_rf_calibrate_info->thermal_value_iqk) : (p_rf_calibrate_info->thermal_value_iqk - thermal_value);
-
-	if (p_rf_calibrate_info->thermal_value_iqk == 0xff) {	/*no PG, use thermal value for IQK*/
-		p_rf_calibrate_info->thermal_value_iqk = thermal_value;
-		delta_IQK = (thermal_value > p_rf_calibrate_info->thermal_value_iqk) ? (thermal_value - p_rf_calibrate_info->thermal_value_iqk) : (p_rf_calibrate_info->thermal_value_iqk - thermal_value);
-		ODM_RT_TRACE(p_dm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("no PG, use thermal_value for IQK\n"));
+	/* Calculate Average thermal_value after average enough times */
+	if (thermal_value_avg_count) {
+		thermal_value =
+			(u8)(thermal_value_avg / thermal_value_avg_count);
+		cali_info->thermal_value_delta
+			= thermal_value - rf->eeprom_thermal;
+		RF_DBG(dm, DBG_RF_TX_PWR_TRACK,
+		       "AVG Thermal Meter = 0x%X, EFUSE Thermal base = 0x%X\n",
+		       thermal_value, rf->eeprom_thermal);
 	}
 
-	for (p = RF_PATH_A; p < c.rf_path_count; p++)
-		diff_DPK[p] = (s8)thermal_value - (s8)p_rf_calibrate_info->dpk_thermal[p];
-
-	/*4 6. If necessary, do LCK.*/
-
-	if (!(p_dm->support_ic_type & ODM_RTL8821)) {	/*no PG, do LCK at initial status*/
-		if (p_rf_calibrate_info->thermal_value_lck == 0xff) {
-			ODM_RT_TRACE(p_dm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("no PG, do LCK\n"));
-			p_rf_calibrate_info->thermal_value_lck = thermal_value;
-
-			/*Use RTLCK, so close power tracking driver LCK*/
-			if (!(p_dm->support_ic_type & ODM_RTL8814A) && !(p_dm->support_ic_type & ODM_RTL8822B) && c.phy_lc_calibrate)
-				(*c.phy_lc_calibrate)(p_dm);
-
-			delta_LCK = (thermal_value > p_rf_calibrate_info->thermal_value_lck) ? (thermal_value - p_rf_calibrate_info->thermal_value_lck) : (p_rf_calibrate_info->thermal_value_lck - thermal_value);
-		}
-
-		ODM_RT_TRACE(p_dm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("(delta, delta_LCK, delta_IQK) = (%d, %d, %d)\n", delta, delta_LCK, delta_IQK));
+	/* @4 5. Calculate delta, delta_lck, delta_iqk. */
+	/* "delta" here is used to determine thermal value changes or not. */
+	if (thermal_value > cali_info->thermal_value)
+		delta = thermal_value - cali_info->thermal_value;
+	else
+		delta = cali_info->thermal_value - thermal_value;
 
-		/* Wait sacn to do LCK by RF Jenyu*/
-		if ((*p_dm->p_is_scan_in_process == false) && (!p_iqk_info->rfk_forbidden)) {
-			/* Delta temperature is equal to or larger than 20 centigrade.*/
-			if (delta_LCK >= c.threshold_iqk) {
-				ODM_RT_TRACE(p_dm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("delta_LCK(%d) >= threshold_iqk(%d)\n", delta_LCK, c.threshold_iqk));
-				p_rf_calibrate_info->thermal_value_lck = thermal_value;
+	if (thermal_value > cali_info->thermal_value_lck)
+		delta_lck = thermal_value - cali_info->thermal_value_lck;
+	else
+		delta_lck = cali_info->thermal_value_lck - thermal_value;
 
-				/*Use RTLCK, so close power tracking driver LCK*/
-				if (!(p_dm->support_ic_type & ODM_RTL8814A) && !(p_dm->support_ic_type & ODM_RTL8822B) && c.phy_lc_calibrate)
-					(*c.phy_lc_calibrate)(p_dm);
+	if (thermal_value > cali_info->thermal_value_iqk)
+		delta_iqk = thermal_value - cali_info->thermal_value_iqk;
+	else
+		delta_iqk = cali_info->thermal_value_iqk - thermal_value;
+
+	RF_DBG(dm, DBG_RF_TX_PWR_TRACK,
+	       "(delta, delta_lck, delta_iqk) = (%d, %d, %d)\n", delta,
+	       delta_lck, delta_iqk);
+
+	/*@4 6. If necessary, do LCK.*/
+	/* Wait sacn to do LCK by RF Jenyu*/
+	if (!(*dm->is_scan_in_process) && !iqk_info->rfk_forbidden) {
+		/* Delta temperature is equal to or larger than 20 centigrade.*/
+		if (delta_lck >= c.threshold_iqk) {
+			RF_DBG(dm, DBG_RF_TX_PWR_TRACK,
+			       "delta_lck(%d) >= threshold_iqk(%d)\n",
+			       delta_lck, c.threshold_iqk);
+			cali_info->thermal_value_lck = thermal_value;
+
+			/*Use RTLCK, close power tracking driver LCK*/
+			/*8821 don't do LCK*/
+			if (!(dm->support_ic_type &
+				(ODM_RTL8821 | ODM_RTL8814A | ODM_RTL8822B)) &&
+				c.phy_lc_calibrate) {
+				(*c.phy_lc_calibrate)(dm);
+				RF_DBG(dm, DBG_RF_TX_PWR_TRACK,
+				       "do pwrtrk lck\n");
 			}
 		}
 	}
 
-	/*3 7. If necessary, move the index of swing table to adjust Tx power.*/
+	/*@3 7. If necessary, move the index of swing table to adjust Tx power.*/
+	/* "delta" here is used to record the absolute value of difference. */
+	if (delta > 0 && cali_info->txpowertrack_control) {
+		if (thermal_value > rf->eeprom_thermal)
+			delta = thermal_value - rf->eeprom_thermal;
+		else
+			delta = rf->eeprom_thermal - thermal_value;
 
-	if (delta > 0 && p_rf_calibrate_info->txpowertrack_control) {
-		/* "delta" here is used to record the absolute value of differrence. */
-#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_CE))
-#if (DM_ODM_SUPPORT_TYPE == ODM_CE) && defined(DM_ODM_CE_MAC80211)
-		delta = thermal_value > rtlefu->eeprom_thermalmeter ? (thermal_value - rtlefu->eeprom_thermalmeter) : (rtlefu->eeprom_thermalmeter - thermal_value);
-#else
-		delta = thermal_value > p_hal_data->eeprom_thermal_meter ? (thermal_value - p_hal_data->eeprom_thermal_meter) : (p_hal_data->eeprom_thermal_meter - thermal_value);
-#endif
-#else
-		delta = (thermal_value > p_dm->priv->pmib->dot11RFEntry.ther) ? (thermal_value - p_dm->priv->pmib->dot11RFEntry.ther) : (p_dm->priv->pmib->dot11RFEntry.ther - thermal_value);
-#endif
 		if (delta >= TXPWR_TRACK_TABLE_SIZE)
 			delta = TXPWR_TRACK_TABLE_SIZE - 1;
 
-		/*4 7.1 The Final Power index = BaseIndex + power_index_offset*/
-
-#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_CE))
-#if (DM_ODM_SUPPORT_TYPE == ODM_CE) && defined(DM_ODM_CE_MAC80211)
-		if (thermal_value > rtlefu->eeprom_thermalmeter) {
-#else
-		if (thermal_value > p_hal_data->eeprom_thermal_meter) {
-#endif
-#else
-		if (thermal_value > p_dm->priv->pmib->dot11RFEntry.ther) {
-#endif
-
-			for (p = RF_PATH_A; p < c.rf_path_count; p++) {
-				p_rf_calibrate_info->delta_power_index_last[p] = p_rf_calibrate_info->delta_power_index[p];	/*recording poer index offset*/
-				switch (p) {
-				case RF_PATH_B:
-					ODM_RT_TRACE(p_dm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,
-						("delta_swing_table_idx_tup_b[%d] = %d\n", delta, delta_swing_table_idx_tup_b[delta]));
-
-					p_rf_calibrate_info->delta_power_index[p] = delta_swing_table_idx_tup_b[delta];
-					p_rf_calibrate_info->absolute_ofdm_swing_idx[p] =  delta_swing_table_idx_tup_b[delta];       /*Record delta swing for mix mode power tracking*/
-					ODM_RT_TRACE(p_dm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,
-						("******Temp is higher and p_rf_calibrate_info->absolute_ofdm_swing_idx[RF_PATH_B] = %d\n", p_rf_calibrate_info->absolute_ofdm_swing_idx[p]));
-					break;
-
-				case RF_PATH_C:
-					ODM_RT_TRACE(p_dm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,
-						("delta_swing_table_idx_tup_c[%d] = %d\n", delta, delta_swing_table_idx_tup_c[delta]));
-
-					p_rf_calibrate_info->delta_power_index[p] = delta_swing_table_idx_tup_c[delta];
-					p_rf_calibrate_info->absolute_ofdm_swing_idx[p] =  delta_swing_table_idx_tup_c[delta];       /*Record delta swing for mix mode power tracking*/
-					ODM_RT_TRACE(p_dm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,
-						("******Temp is higher and p_rf_calibrate_info->absolute_ofdm_swing_idx[RF_PATH_C] = %d\n", p_rf_calibrate_info->absolute_ofdm_swing_idx[p]));
-					break;
-
-				case RF_PATH_D:
-					ODM_RT_TRACE(p_dm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,
-						("delta_swing_table_idx_tup_d[%d] = %d\n", delta, delta_swing_table_idx_tup_d[delta]));
-
-					p_rf_calibrate_info->delta_power_index[p] = delta_swing_table_idx_tup_d[delta];
-					p_rf_calibrate_info->absolute_ofdm_swing_idx[p] =  delta_swing_table_idx_tup_d[delta];       /*Record delta swing for mix mode power tracking*/
-					ODM_RT_TRACE(p_dm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,
-						("******Temp is higher and p_rf_calibrate_info->absolute_ofdm_swing_idx[RF_PATH_D] = %d\n", p_rf_calibrate_info->absolute_ofdm_swing_idx[p]));
-					break;
-
-				default:
-					ODM_RT_TRACE(p_dm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,
-						("delta_swing_table_idx_tup_a[%d] = %d\n", delta, delta_swing_table_idx_tup_a[delta]));
-
-					p_rf_calibrate_info->delta_power_index[p] = delta_swing_table_idx_tup_a[delta];
-					p_rf_calibrate_info->absolute_ofdm_swing_idx[p] =  delta_swing_table_idx_tup_a[delta];        /*Record delta swing for mix mode power tracking*/
-					ODM_RT_TRACE(p_dm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,
-						("******Temp is higher and p_rf_calibrate_info->absolute_ofdm_swing_idx[RF_PATH_A] = %d\n", p_rf_calibrate_info->absolute_ofdm_swing_idx[p]));
-					break;
-				}
-			}
-			/* JJ ADD 20161014 */
-			if (p_dm->support_ic_type & (ODM_RTL8703B | ODM_RTL8723D | ODM_RTL8710B)) {
-				/*Save xtal_offset from Xtal table*/
-				p_rf_calibrate_info->xtal_offset_last = p_rf_calibrate_info->xtal_offset;	/*recording last Xtal offset*/
-				ODM_RT_TRACE(p_dm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,
-					("[Xtal] delta_swing_table_xtal_up[%d] = %d\n", delta, delta_swing_table_xtal_up[delta]));
-				p_rf_calibrate_info->xtal_offset = delta_swing_table_xtal_up[delta];
-				xtal_offset_eanble = (p_rf_calibrate_info->xtal_offset_last != p_rf_calibrate_info->xtal_offset);
-			}
-
-		} else {
-			for (p = RF_PATH_A; p < c.rf_path_count; p++) {
-				p_rf_calibrate_info->delta_power_index_last[p] = p_rf_calibrate_info->delta_power_index[p];	/*recording poer index offset*/
-
-				switch (p) {
-				case RF_PATH_B:
-					ODM_RT_TRACE(p_dm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,
-						("delta_swing_table_idx_tdown_b[%d] = %d\n", delta, delta_swing_table_idx_tdown_b[delta]));
-					p_rf_calibrate_info->delta_power_index[p] = -1 * delta_swing_table_idx_tdown_b[delta];
-					p_rf_calibrate_info->absolute_ofdm_swing_idx[p] =  -1 * delta_swing_table_idx_tdown_b[delta];        /*Record delta swing for mix mode power tracking*/
-					ODM_RT_TRACE(p_dm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,
-						("******Temp is lower and p_rf_calibrate_info->absolute_ofdm_swing_idx[RF_PATH_B] = %d\n", p_rf_calibrate_info->absolute_ofdm_swing_idx[p]));
-					break;
-
-				case RF_PATH_C:
-					ODM_RT_TRACE(p_dm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,
-						("delta_swing_table_idx_tdown_c[%d] = %d\n", delta, delta_swing_table_idx_tdown_c[delta]));
-					p_rf_calibrate_info->delta_power_index[p] = -1 * delta_swing_table_idx_tdown_c[delta];
-					p_rf_calibrate_info->absolute_ofdm_swing_idx[p] =  -1 * delta_swing_table_idx_tdown_c[delta];        /*Record delta swing for mix mode power tracking*/
-					ODM_RT_TRACE(p_dm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,
-						("******Temp is lower and p_rf_calibrate_info->absolute_ofdm_swing_idx[RF_PATH_C] = %d\n", p_rf_calibrate_info->absolute_ofdm_swing_idx[p]));
-					break;
-
-				case RF_PATH_D:
-					ODM_RT_TRACE(p_dm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,
-						("delta_swing_table_idx_tdown_d[%d] = %d\n", delta, delta_swing_table_idx_tdown_d[delta]));
-					p_rf_calibrate_info->delta_power_index[p] = -1 * delta_swing_table_idx_tdown_d[delta];
-					p_rf_calibrate_info->absolute_ofdm_swing_idx[p] =  -1 * delta_swing_table_idx_tdown_d[delta];        /*Record delta swing for mix mode power tracking*/
-					ODM_RT_TRACE(p_dm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,
-						("******Temp is lower and p_rf_calibrate_info->absolute_ofdm_swing_idx[RF_PATH_D] = %d\n", p_rf_calibrate_info->absolute_ofdm_swing_idx[p]));
-					break;
-
-				default:
-					ODM_RT_TRACE(p_dm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,
-						("delta_swing_table_idx_tdown_a[%d] = %d\n", delta, delta_swing_table_idx_tdown_a[delta]));
-					p_rf_calibrate_info->delta_power_index[p] = -1 * delta_swing_table_idx_tdown_a[delta];
-					p_rf_calibrate_info->absolute_ofdm_swing_idx[p] =  -1 * delta_swing_table_idx_tdown_a[delta];        /*Record delta swing for mix mode power tracking*/
-					ODM_RT_TRACE(p_dm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,
-						("******Temp is lower and p_rf_calibrate_info->absolute_ofdm_swing_idx[RF_PATH_A] = %d\n", p_rf_calibrate_info->absolute_ofdm_swing_idx[p]));
-					break;
-				}
-			}
-			/* JJ ADD 20161014 */
-			if (p_dm->support_ic_type & (ODM_RTL8703B | ODM_RTL8723D | ODM_RTL8710B)) {
-				/*Save xtal_offset from Xtal table*/
-				p_rf_calibrate_info->xtal_offset_last = p_rf_calibrate_info->xtal_offset;	/*recording last Xtal offset*/
-				ODM_RT_TRACE(p_dm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,
-					("[Xtal] delta_swing_table_xtal_down[%d] = %d\n", delta, delta_swing_table_xtal_down[delta]));
-				p_rf_calibrate_info->xtal_offset = delta_swing_table_xtal_down[delta];
-				xtal_offset_eanble = (p_rf_calibrate_info->xtal_offset_last != p_rf_calibrate_info->xtal_offset);
-			}
-
-		}
+		odm_get_tracking_table(dm, thermal_value, delta);
 
 		for (p = RF_PATH_A; p < c.rf_path_count; p++) {
-			ODM_RT_TRACE(p_dm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,
-				("\n\n=========================== [path-%d] Calculating power_index_offset===========================\n", p));
+			RF_DBG(dm, DBG_RF_TX_PWR_TRACK,
+			       "\n[path-%d] Calculate pwr_idx_offset\n", p);
 
-			if (p_rf_calibrate_info->delta_power_index[p] == p_rf_calibrate_info->delta_power_index_last[p])         /*If Thermal value changes but lookup table value still the same*/
-				p_rf_calibrate_info->power_index_offset[p] = 0;
+			/*If Thermal value changes but table value is the same*/
+			if (cali_info->delta_power_index[p] ==
+				cali_info->delta_power_index_last[p])
+				cali_info->power_index_offset[p] = 0;
 			else
-				p_rf_calibrate_info->power_index_offset[p] = p_rf_calibrate_info->delta_power_index[p] - p_rf_calibrate_info->delta_power_index_last[p];      /*Power index diff between 2 times Power Tracking*/
+				cali_info->power_index_offset[p] =
+				cali_info->delta_power_index[p] -
+				cali_info->delta_power_index_last[p];
 
-			ODM_RT_TRACE(p_dm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,
-				("[path-%d] power_index_offset(%d) = delta_power_index(%d) - delta_power_index_last(%d)\n", p, p_rf_calibrate_info->power_index_offset[p], p_rf_calibrate_info->delta_power_index[p], p_rf_calibrate_info->delta_power_index_last[p]));
+			RF_DBG(dm, DBG_RF_TX_PWR_TRACK,
+			       "path-%d pwridx_diff%d=pwr_idx%d - last_idx%d\n",
+			       p, cali_info->power_index_offset[p],
+			       cali_info->delta_power_index[p],
+			       cali_info->delta_power_index_last[p]);
+#if 0
 
-			p_rf_calibrate_info->OFDM_index[p] = p_rf_calibrate_info->bb_swing_idx_ofdm_base[p] + p_rf_calibrate_info->power_index_offset[p];
-			p_rf_calibrate_info->CCK_index = p_rf_calibrate_info->bb_swing_idx_cck_base + p_rf_calibrate_info->power_index_offset[p];
+			cali_info->OFDM_index[p] = cali_info->bb_swing_idx_ofdm_base[p] + cali_info->power_index_offset[p];
+			cali_info->CCK_index = cali_info->bb_swing_idx_cck_base + cali_info->power_index_offset[p];
 
-			p_rf_calibrate_info->bb_swing_idx_cck = p_rf_calibrate_info->CCK_index;
-			p_rf_calibrate_info->bb_swing_idx_ofdm[p] = p_rf_calibrate_info->OFDM_index[p];
+			cali_info->bb_swing_idx_cck = cali_info->CCK_index;
+			cali_info->bb_swing_idx_ofdm[p] = cali_info->OFDM_index[p];
 
 			/*************Print BB Swing base and index Offset*************/
 
-			ODM_RT_TRACE(p_dm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,
-				("The 'CCK' final index(%d) = BaseIndex(%d) + power_index_offset(%d)\n", p_rf_calibrate_info->bb_swing_idx_cck, p_rf_calibrate_info->bb_swing_idx_cck_base, p_rf_calibrate_info->power_index_offset[p]));
-			ODM_RT_TRACE(p_dm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,
-				("The 'OFDM' final index(%d) = BaseIndex[%d](%d) + power_index_offset(%d)\n", p_rf_calibrate_info->bb_swing_idx_ofdm[p], p, p_rf_calibrate_info->bb_swing_idx_ofdm_base[p], p_rf_calibrate_info->power_index_offset[p]));
+			RF_DBG(dm, DBG_RF_TX_PWR_TRACK,
+			       "The 'CCK' final index(%d) = BaseIndex(%d) + power_index_offset(%d)\n",
+			       cali_info->bb_swing_idx_cck,
+			       cali_info->bb_swing_idx_cck_base,
+			       cali_info->power_index_offset[p]);
+			RF_DBG(dm, DBG_RF_TX_PWR_TRACK,
+			       "The 'OFDM' final index(%d) = BaseIndex[%d](%d) + power_index_offset(%d)\n",
+			       cali_info->bb_swing_idx_ofdm[p], p,
+			       cali_info->bb_swing_idx_ofdm_base[p],
+			       cali_info->power_index_offset[p]);
 
 			/*4 7.1 Handle boundary conditions of index.*/
 
-			if (p_rf_calibrate_info->OFDM_index[p] > c.swing_table_size_ofdm - 1)
-				p_rf_calibrate_info->OFDM_index[p] = c.swing_table_size_ofdm - 1;
-			else if (p_rf_calibrate_info->OFDM_index[p] <= OFDM_min_index)
-				p_rf_calibrate_info->OFDM_index[p] = OFDM_min_index;
+			if (cali_info->OFDM_index[p] > c.swing_table_size_ofdm - 1)
+				cali_info->OFDM_index[p] = c.swing_table_size_ofdm - 1;
+			else if (cali_info->OFDM_index[p] <= OFDM_min_index)
+				cali_info->OFDM_index[p] = OFDM_min_index;
+#endif
 		}
+#if 0
+		RF_DBG(dm, DBG_RF_TX_PWR_TRACK,
+		       "\n\n========================================================================================================\n");
 
-		ODM_RT_TRACE(p_dm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,
-			("\n\n========================================================================================================\n"));
-
-		if (p_rf_calibrate_info->CCK_index > c.swing_table_size_cck - 1)
-			p_rf_calibrate_info->CCK_index = c.swing_table_size_cck - 1;
-		else if (p_rf_calibrate_info->CCK_index <= 0)
-			p_rf_calibrate_info->CCK_index = 0;
+		if (cali_info->CCK_index > c.swing_table_size_cck - 1)
+			cali_info->CCK_index = c.swing_table_size_cck - 1;
+		else if (cali_info->CCK_index <= 0)
+			cali_info->CCK_index = 0;
+#endif
 	} else {
-		ODM_RT_TRACE(p_dm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,
-			("The thermal meter is unchanged or TxPowerTracking OFF(%d): thermal_value: %d, p_rf_calibrate_info->thermal_value: %d\n",
-			p_rf_calibrate_info->txpowertrack_control, thermal_value, p_rf_calibrate_info->thermal_value));
-
+		RF_DBG(dm, DBG_RF_TX_PWR_TRACK,
+		       "Thermal is unchanged thermal=%d last_thermal=%d\n",
+		       thermal_value,
+		       cali_info->thermal_value);
 		for (p = RF_PATH_A; p < c.rf_path_count; p++)
-			p_rf_calibrate_info->power_index_offset[p] = 0;
+			cali_info->power_index_offset[p] = 0;
 	}
 
-	ODM_RT_TRACE(p_dm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,
-		("TxPowerTracking: [CCK] Swing Current index: %d, Swing base index: %d\n",
-		p_rf_calibrate_info->CCK_index, p_rf_calibrate_info->bb_swing_idx_cck_base));       /*Print Swing base & current*/
+#if 0
+	RF_DBG(dm, DBG_RF_TX_PWR_TRACK,
+	       "TxPowerTracking: [CCK] Swing Current index: %d, Swing base index: %d\n",
+	       cali_info->CCK_index,
+	       cali_info->bb_swing_idx_cck_base); /*Print Swing base & current*/
 
 	for (p = RF_PATH_A; p < c.rf_path_count; p++) {
-		ODM_RT_TRACE(p_dm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,
-			("TxPowerTracking: [OFDM] Swing Current index: %d, Swing base index[%d]: %d\n",
-			p_rf_calibrate_info->OFDM_index[p], p, p_rf_calibrate_info->bb_swing_idx_ofdm_base[p]));
+		RF_DBG(dm, DBG_RF_TX_PWR_TRACK,
+		       "TxPowerTracking: [OFDM] Swing Current index: %d, Swing base index[%d]: %d\n",
+		       cali_info->OFDM_index[p], p,
+		       cali_info->bb_swing_idx_ofdm_base[p]);
 	}
+#endif
 
-	if ((p_dm->support_ic_type & ODM_RTL8814A)) {
-		ODM_RT_TRACE(p_dm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("power_tracking_type=%d\n", power_tracking_type));
+	if ((dm->support_ic_type & ODM_RTL8814A)) {
+		RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "power_tracking_type=%d\n",
+		       power_tracking_type);
 
 		if (power_tracking_type == 0) {
-			ODM_RT_TRACE(p_dm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("**********Enter POWER Tracking MIX_MODE**********\n"));
+			RF_DBG(dm, DBG_RF_TX_PWR_TRACK,
+			       "***Enter PwrTrk MIX_MODE***\n");
 			for (p = RF_PATH_A; p < c.rf_path_count; p++)
-				(*c.odm_tx_pwr_track_set_pwr)(p_dm, MIX_MODE, p, 0);
+				(*c.odm_tx_pwr_track_set_pwr)
+					(dm, MIX_MODE, p, 0);
 		} else if (power_tracking_type == 1) {
-			ODM_RT_TRACE(p_dm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("**********Enter POWER Tracking MIX(2G) TSSI(5G) MODE**********\n"));
+			RF_DBG(dm, DBG_RF_TX_PWR_TRACK,
+			       "***Enter PwrTrk MIX(2G) TSSI(5G) MODE***\n");
 			for (p = RF_PATH_A; p < c.rf_path_count; p++)
-				(*c.odm_tx_pwr_track_set_pwr)(p_dm, MIX_2G_TSSI_5G_MODE, p, 0);
+				(*c.odm_tx_pwr_track_set_pwr)
+					(dm, MIX_2G_TSSI_5G_MODE, p, 0);
 		} else if (power_tracking_type == 2) {
-			ODM_RT_TRACE(p_dm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("**********Enter POWER Tracking MIX(5G) TSSI(2G)MODE**********\n"));
+			RF_DBG(dm, DBG_RF_TX_PWR_TRACK,
+			       "***Enter PwrTrk MIX(5G) TSSI(2G)MODE***\n");
 			for (p = RF_PATH_A; p < c.rf_path_count; p++)
-				(*c.odm_tx_pwr_track_set_pwr)(p_dm, MIX_5G_TSSI_2G_MODE, p, 0);
+				(*c.odm_tx_pwr_track_set_pwr)
+					(dm, MIX_5G_TSSI_2G_MODE, p, 0);
 		} else if (power_tracking_type == 3) {
-			ODM_RT_TRACE(p_dm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("**********Enter POWER Tracking TSSI MODE**********\n"));
+			RF_DBG(dm, DBG_RF_TX_PWR_TRACK,
+			       "***Enter PwrTrk TSSI MODE***\n");
 			for (p = RF_PATH_A; p < c.rf_path_count; p++)
-				(*c.odm_tx_pwr_track_set_pwr)(p_dm, TSSI_MODE, p, 0);
+				(*c.odm_tx_pwr_track_set_pwr)
+					(dm, TSSI_MODE, p, 0);
 		}
-		p_rf_calibrate_info->thermal_value = thermal_value;         /*Record last Power Tracking Thermal value*/
-
-	} else if ((p_rf_calibrate_info->power_index_offset[RF_PATH_A] != 0 ||
-		p_rf_calibrate_info->power_index_offset[RF_PATH_B] != 0 ||
-		p_rf_calibrate_info->power_index_offset[RF_PATH_C] != 0 ||
-		p_rf_calibrate_info->power_index_offset[RF_PATH_D] != 0) &&
-#if (DM_ODM_SUPPORT_TYPE == ODM_CE) && defined(DM_ODM_CE_MAC80211)
-		p_rf_calibrate_info->txpowertrack_control && (rtlefu->eeprom_thermalmeter != 0xff)) {
-#else
-		p_rf_calibrate_info->txpowertrack_control && (p_hal_data->eeprom_thermal_meter != 0xff)) {
-#endif
+	} else if ((cali_info->power_index_offset[RF_PATH_A] != 0 ||
+		    cali_info->power_index_offset[RF_PATH_B] != 0 ||
+		    cali_info->power_index_offset[RF_PATH_C] != 0 ||
+		    cali_info->power_index_offset[RF_PATH_D] != 0)) {
+#if 0
 		/* 4 7.2 Configure the Swing Table to adjust Tx Power. */
-
-		p_rf_calibrate_info->is_tx_power_changed = true;	/*Always true after Tx Power is adjusted by power tracking.*/
-		/*  */
-		/* 2012/04/23 MH According to Luke's suggestion, we can not write BB digital */
-		/* to increase TX power. Otherwise, EVM will be bad. */
-		/*  */
-		/* 2012/04/25 MH Add for tx power tracking to set tx power in tx agc for 88E. */
-		if (thermal_value > p_rf_calibrate_info->thermal_value) {
+		/*Always true after Tx Power is adjusted by power tracking.*/
+
+		cali_info->is_tx_power_changed = true;
+		/* 2012/04/23 MH According to Luke's suggestion, we can not write BB digital
+		 * to increase TX power. Otherwise, EVM will be bad.
+		 *
+		 * 2012/04/25 MH Add for tx power tracking to set tx power in tx agc for 88E.
+		 */
+		if (thermal_value > cali_info->thermal_value) {
 			for (p = RF_PATH_A; p < c.rf_path_count; p++) {
-#if (DM_ODM_SUPPORT_TYPE == ODM_CE) && defined(DM_ODM_CE_MAC80211)
-				ODM_RT_TRACE(p_dm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,
-					("Temperature Increasing(%d): delta_pi: %d, delta_t: %d, Now_t: %d, EFUSE_t: %d, Last_t: %d\n",
-					p, p_rf_calibrate_info->power_index_offset[p], delta, thermal_value, rtlefu->eeprom_thermalmeter, p_rf_calibrate_info->thermal_value));
-#else
-				ODM_RT_TRACE(p_dm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,
-					("Temperature Increasing(%d): delta_pi: %d, delta_t: %d, Now_t: %d, EFUSE_t: %d, Last_t: %d\n",
-					p, p_rf_calibrate_info->power_index_offset[p], delta, thermal_value, p_hal_data->eeprom_thermal_meter, p_rf_calibrate_info->thermal_value));
-#endif
+				RF_DBG(dm, DBG_RF_TX_PWR_TRACK,
+				       "Temperature Increasing(%d): delta_pi: %d, delta_t: %d, Now_t: %d, EFUSE_t: %d, Last_t: %d\n",
+				       p, cali_info->power_index_offset[p],
+				       delta, thermal_value, rf->eeprom_thermal,
+				       cali_info->thermal_value);
 			}
-		} else if (thermal_value < p_rf_calibrate_info->thermal_value) {	/*Low temperature*/
+		} else if (thermal_value < cali_info->thermal_value) { /*Low temperature*/
 			for (p = RF_PATH_A; p < c.rf_path_count; p++) {
-#if (DM_ODM_SUPPORT_TYPE == ODM_CE) && defined(DM_ODM_CE_MAC80211)
-				ODM_RT_TRACE(p_dm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,
-					("Temperature Decreasing(%d): delta_pi: %d, delta_t: %d, Now_t: %d, EFUSE_t: %d, Last_t: %d\n",
-					p, p_rf_calibrate_info->power_index_offset[p], delta, thermal_value, rtlefu->eeprom_thermalmeter, p_rf_calibrate_info->thermal_value));
-#else
-				ODM_RT_TRACE(p_dm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,
-					("Temperature Decreasing(%d): delta_pi: %d, delta_t: %d, Now_t: %d, EFUSE_t: %d, Last_t: %d\n",
-					p, p_rf_calibrate_info->power_index_offset[p], delta, thermal_value, p_hal_data->eeprom_thermal_meter, p_rf_calibrate_info->thermal_value));
-#endif
+				RF_DBG(dm, DBG_RF_TX_PWR_TRACK,
+				       "Temperature Decreasing(%d): delta_pi: %d, delta_t: %d, Now_t: %d, EFUSE_t: %d, Last_t: %d\n",
+				       p, cali_info->power_index_offset[p],
+				       delta, thermal_value, rf->eeprom_thermal,
+				       cali_info->thermal_value);
 			}
 		}
+#endif
 
 #if !(DM_ODM_SUPPORT_TYPE & ODM_AP)
-#if (DM_ODM_SUPPORT_TYPE == ODM_CE) && defined(DM_ODM_CE_MAC80211)
-		if (thermal_value > rtlefu->eeprom_thermalmeter)
+		if (thermal_value > rf->eeprom_thermal) {
 #else
-		if (thermal_value > p_hal_data->eeprom_thermal_meter)
+		if (thermal_value > dm->priv->pmib->dot11RFEntry.ther) {
 #endif
-#else
-		if (thermal_value > p_dm->priv->pmib->dot11RFEntry.ther)
-#endif
-		{
-#if (DM_ODM_SUPPORT_TYPE == ODM_CE) && defined(DM_ODM_CE_MAC80211)
-			ODM_RT_TRACE(p_dm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,
-				("Temperature(%d) higher than PG value(%d)\n", thermal_value, rtlefu->eeprom_thermalmeter));
-#else
-			ODM_RT_TRACE(p_dm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,
-				("Temperature(%d) higher than PG value(%d)\n", thermal_value, p_hal_data->eeprom_thermal_meter));
-#endif
-
-			if (p_dm->support_ic_type == ODM_RTL8188E || p_dm->support_ic_type == ODM_RTL8192E || p_dm->support_ic_type == ODM_RTL8821 ||
-			    p_dm->support_ic_type == ODM_RTL8812 || p_dm->support_ic_type == ODM_RTL8723B || p_dm->support_ic_type == ODM_RTL8814A ||
-			    p_dm->support_ic_type == ODM_RTL8703B || p_dm->support_ic_type == ODM_RTL8188F || p_dm->support_ic_type == ODM_RTL8822B ||
-			    p_dm->support_ic_type == ODM_RTL8723D || p_dm->support_ic_type == ODM_RTL8821C || p_dm->support_ic_type == ODM_RTL8710B) {/* JJ ADD 20161014 */
+			RF_DBG(dm, DBG_RF_TX_PWR_TRACK,
+			       "Temperature(%d) higher than PG value(%d)\n",
+			       thermal_value, rf->eeprom_thermal);
 
-				ODM_RT_TRACE(p_dm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("**********Enter POWER Tracking MIX_MODE**********\n"));
-				for (p = RF_PATH_A; p < c.rf_path_count; p++)
-					(*c.odm_tx_pwr_track_set_pwr)(p_dm, MIX_MODE, p, 0);
-			} else {
-				ODM_RT_TRACE(p_dm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("**********Enter POWER Tracking BBSWING_MODE**********\n"));
-				for (p = RF_PATH_A; p < c.rf_path_count; p++)
-					(*c.odm_tx_pwr_track_set_pwr)(p_dm, BBSWING, p, indexforchannel);
-			}
+			odm_pwrtrk_method(dm);
 		} else {
-#if (DM_ODM_SUPPORT_TYPE == ODM_CE) && defined(DM_ODM_CE_MAC80211)
-			ODM_RT_TRACE(p_dm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,
-				("Temperature(%d) lower than PG value(%d)\n", thermal_value, rtlefu->eeprom_thermalmeter));
-#else
-			ODM_RT_TRACE(p_dm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,
-				("Temperature(%d) lower than PG value(%d)\n", thermal_value, p_hal_data->eeprom_thermal_meter));
-#endif
-
-			if (p_dm->support_ic_type == ODM_RTL8188E || p_dm->support_ic_type == ODM_RTL8192E || p_dm->support_ic_type == ODM_RTL8821 ||
-			    p_dm->support_ic_type == ODM_RTL8812 || p_dm->support_ic_type == ODM_RTL8723B || p_dm->support_ic_type == ODM_RTL8814A ||
-			    p_dm->support_ic_type == ODM_RTL8703B || p_dm->support_ic_type == ODM_RTL8188F || p_dm->support_ic_type == ODM_RTL8822B ||
-			    p_dm->support_ic_type == ODM_RTL8723D || p_dm->support_ic_type == ODM_RTL8821C || p_dm->support_ic_type == ODM_RTL8710B) {/* JJ ADD 20161014 */
-
-				ODM_RT_TRACE(p_dm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("**********Enter POWER Tracking MIX_MODE**********\n"));
-				for (p = RF_PATH_A; p < c.rf_path_count; p++)
-					(*c.odm_tx_pwr_track_set_pwr)(p_dm, MIX_MODE, p, indexforchannel);
-			} else {
-				ODM_RT_TRACE(p_dm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("**********Enter POWER Tracking BBSWING_MODE**********\n"));
-				for (p = RF_PATH_A; p < c.rf_path_count; p++)
-					(*c.odm_tx_pwr_track_set_pwr)(p_dm, BBSWING, p, indexforchannel);
-			}
+			RF_DBG(dm, DBG_RF_TX_PWR_TRACK,
+			       "Temperature(%d) lower than PG value(%d)\n",
+			       thermal_value, rf->eeprom_thermal);
 
+			odm_pwrtrk_method(dm);
 		}
 
-		p_rf_calibrate_info->bb_swing_idx_cck_base = p_rf_calibrate_info->bb_swing_idx_cck;    /*Record last time Power Tracking result as base.*/
+#if 0
+		/*Record last time Power Tracking result as base.*/
+		cali_info->bb_swing_idx_cck_base = cali_info->bb_swing_idx_cck;
 		for (p = RF_PATH_A; p < c.rf_path_count; p++)
-			p_rf_calibrate_info->bb_swing_idx_ofdm_base[p] = p_rf_calibrate_info->bb_swing_idx_ofdm[p];
-
-		ODM_RT_TRACE(p_dm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,
-			("p_rf_calibrate_info->thermal_value = %d thermal_value= %d\n", p_rf_calibrate_info->thermal_value, thermal_value));
-
-		p_rf_calibrate_info->thermal_value = thermal_value;         /*Record last Power Tracking Thermal value*/
-
-	}
-
-
-	if (p_dm->support_ic_type == ODM_RTL8703B || p_dm->support_ic_type == ODM_RTL8723D || p_dm->support_ic_type == ODM_RTL8710B) {/* JJ ADD 20161014 */
-
-#if (DM_ODM_SUPPORT_TYPE == ODM_CE) && defined(DM_ODM_CE_MAC80211)
-		if (xtal_offset_eanble != 0 && p_rf_calibrate_info->txpowertrack_control && (rtlefu->eeprom_thermalmeter != 0xff)) {
-#else
-		if (xtal_offset_eanble != 0 && p_rf_calibrate_info->txpowertrack_control && (p_hal_data->eeprom_thermal_meter != 0xff)) {
+			cali_info->bb_swing_idx_ofdm_base[p] = cali_info->bb_swing_idx_ofdm[p];
 #endif
+		RF_DBG(dm, DBG_RF_TX_PWR_TRACK,
+		       "cali_info->thermal_value = %d thermal_value= %d\n",
+		       cali_info->thermal_value, thermal_value);
+	}
+	/*Record last Power Tracking Thermal value*/
+	cali_info->thermal_value = thermal_value;
 
-			ODM_RT_TRACE(p_dm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("**********Enter Xtal Tracking**********\n"));
+	if (dm->support_ic_type &
+		(ODM_RTL8703B | ODM_RTL8723D | ODM_RTL8192F | ODM_RTL8710B)) {
+		if (cali_info->xtal_offset_eanble != 0 &&
+		    cali_info->txpowertrack_control &&
+		    rf->eeprom_thermal != 0xff) {
+			RF_DBG(dm, DBG_RF_TX_PWR_TRACK,
+			       "**********Enter Xtal Tracking**********\n");
 
 #if !(DM_ODM_SUPPORT_TYPE & ODM_AP)
-#if (DM_ODM_SUPPORT_TYPE == ODM_CE) && defined(DM_ODM_CE_MAC80211)
-			if (thermal_value > rtlefu->eeprom_thermalmeter) {
-#else
-			if (thermal_value > p_hal_data->eeprom_thermal_meter) {
-#endif
+			if (thermal_value > rf->eeprom_thermal) {
 #else
-			if (thermal_value > p_dm->priv->pmib->dot11RFEntry.ther) {
+			if (thermal_value > dm->priv->pmib->dot11RFEntry.ther) {
 #endif
-
-#if (DM_ODM_SUPPORT_TYPE == ODM_CE) && defined(DM_ODM_CE_MAC80211)
-				ODM_RT_TRACE(p_dm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,
-					("Temperature(%d) higher than PG value(%d)\n", thermal_value, rtlefu->eeprom_thermalmeter));
-#else
-				ODM_RT_TRACE(p_dm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,
-					("Temperature(%d) higher than PG value(%d)\n", thermal_value, p_hal_data->eeprom_thermal_meter));
-#endif
-				(*c.odm_txxtaltrack_set_xtal)(p_dm);
+				RF_DBG(dm, DBG_RF_TX_PWR_TRACK,
+				       "Temperature(%d) higher than PG (%d)\n",
+				       thermal_value, rf->eeprom_thermal);
+				(*c.odm_txxtaltrack_set_xtal)(dm);
 			} else {
-#if (DM_ODM_SUPPORT_TYPE == ODM_CE) && defined(DM_ODM_CE_MAC80211)
-				ODM_RT_TRACE(p_dm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,
-					("Temperature(%d) lower than PG value(%d)\n", thermal_value, rtlefu->eeprom_thermalmeter));
-#else
-				ODM_RT_TRACE(p_dm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,
-					("Temperature(%d) lower than PG value(%d)\n", thermal_value, p_hal_data->eeprom_thermal_meter));
-#endif
-				(*c.odm_txxtaltrack_set_xtal)(p_dm);
+				RF_DBG(dm, DBG_RF_TX_PWR_TRACK,
+				       "Temperature(%d) lower than PG (%d)\n",
+				       thermal_value, rf->eeprom_thermal);
+				(*c.odm_txxtaltrack_set_xtal)(dm);
 			}
 		}
-		ODM_RT_TRACE(p_dm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("**********End Xtal Tracking**********\n"));
+		RF_DBG(dm, DBG_RF_TX_PWR_TRACK,
+		       "**********End Xtal Tracking**********\n");
 	}
 
 #if !(DM_ODM_SUPPORT_TYPE & ODM_AP)
 
 	/* Wait sacn to do IQK by RF Jenyu*/
-	if ((*p_dm->p_is_scan_in_process == false)  && (!p_iqk_info->rfk_forbidden)) {
-		if (!IS_HARDWARE_TYPE_8723B(adapter)) {
-			/*Delta temperature is equal to or larger than 20 centigrade (When threshold is 8).*/
-			if (delta_IQK >= c.threshold_iqk) {
-				p_rf_calibrate_info->thermal_value_iqk = thermal_value;
-				ODM_RT_TRACE(p_dm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("delta_IQK(%d) >= threshold_iqk(%d)\n", delta_IQK, c.threshold_iqk));
-				if (!p_rf_calibrate_info->is_iqk_in_progress)
-					(*c.do_iqk)(p_dm, delta_IQK, thermal_value, 8);
+	if (!(*dm->is_scan_in_process) && !iqk_info->rfk_forbidden &&
+	    !cali_info->is_iqk_in_progress) {
+		if (!(dm->support_ic_type & ODM_RTL8723B)) {
+			/*Delta temperature is equal or larger than 20 Celsius*/
+			/*When threshold is 8*/
+			if (delta_iqk >= c.threshold_iqk) {
+				cali_info->thermal_value_iqk = thermal_value;
+				RF_DBG(dm, DBG_RF_TX_PWR_TRACK,
+				       "delta_iqk(%d) >= threshold_iqk(%d)\n",
+				       delta_iqk, c.threshold_iqk);
+				(*c.do_iqk)(dm, delta_iqk, thermal_value, 8);
+				RF_DBG(dm, DBG_RF_TX_PWR_TRACK,
+				       "do pwrtrk iqk\n");
 			}
 		}
 	}
-	if (p_rf_calibrate_info->dpk_thermal[RF_PATH_A] != 0) {
+
+#if 0
+	if (cali_info->dpk_thermal[RF_PATH_A] != 0) {
 		if (diff_DPK[RF_PATH_A] >= c.threshold_dpk) {
-			odm_set_bb_reg(p_dm, 0x82c, BIT(31), 0x1);
-			odm_set_bb_reg(p_dm, 0xcc4, BIT(14) | BIT(13) | BIT(12) | BIT(11) | BIT(10), (diff_DPK[RF_PATH_A] / c.threshold_dpk));
-			odm_set_bb_reg(p_dm, 0x82c, BIT(31), 0x0);
+			odm_set_bb_reg(dm, R_0x82c, BIT(31), 0x1);
+			odm_set_bb_reg(dm, R_0xcc4, BIT(14) | BIT(13) | BIT(12) | BIT(11) | BIT(10), (diff_DPK[RF_PATH_A] / c.threshold_dpk));
+			odm_set_bb_reg(dm, R_0x82c, BIT(31), 0x0);
 		} else if ((diff_DPK[RF_PATH_A] <= -1 * c.threshold_dpk)) {
 			s32 value = 0x20 + (diff_DPK[RF_PATH_A] / c.threshold_dpk);
 
-			odm_set_bb_reg(p_dm, 0x82c, BIT(31), 0x1);
-			odm_set_bb_reg(p_dm, 0xcc4, BIT(14) | BIT(13) | BIT(12) | BIT(11) | BIT(10), value);
-			odm_set_bb_reg(p_dm, 0x82c, BIT(31), 0x0);
+			odm_set_bb_reg(dm, R_0x82c, BIT(31), 0x1);
+			odm_set_bb_reg(dm, R_0xcc4, BIT(14) | BIT(13) | BIT(12) | BIT(11) | BIT(10), value);
+			odm_set_bb_reg(dm, R_0x82c, BIT(31), 0x0);
 		} else {
-			odm_set_bb_reg(p_dm, 0x82c, BIT(31), 0x1);
-			odm_set_bb_reg(p_dm, 0xcc4, BIT(14) | BIT(13) | BIT(12) | BIT(11) | BIT(10), 0);
-			odm_set_bb_reg(p_dm, 0x82c, BIT(31), 0x0);
+			odm_set_bb_reg(dm, R_0x82c, BIT(31), 0x1);
+			odm_set_bb_reg(dm, R_0xcc4, BIT(14) | BIT(13) | BIT(12) | BIT(11) | BIT(10), 0);
+			odm_set_bb_reg(dm, R_0x82c, BIT(31), 0x0);
 		}
 	}
-	if (p_rf_calibrate_info->dpk_thermal[RF_PATH_B] != 0) {
+	if (cali_info->dpk_thermal[RF_PATH_B] != 0) {
 		if (diff_DPK[RF_PATH_B] >= c.threshold_dpk) {
-			odm_set_bb_reg(p_dm, 0x82c, BIT(31), 0x1);
-			odm_set_bb_reg(p_dm, 0xec4, BIT(14) | BIT(13) | BIT(12) | BIT(11) | BIT(10), (diff_DPK[RF_PATH_B] / c.threshold_dpk));
-			odm_set_bb_reg(p_dm, 0x82c, BIT(31), 0x0);
+			odm_set_bb_reg(dm, R_0x82c, BIT(31), 0x1);
+			odm_set_bb_reg(dm, R_0xec4, BIT(14) | BIT(13) | BIT(12) | BIT(11) | BIT(10), (diff_DPK[RF_PATH_B] / c.threshold_dpk));
+			odm_set_bb_reg(dm, R_0x82c, BIT(31), 0x0);
 		} else if ((diff_DPK[RF_PATH_B] <= -1 * c.threshold_dpk)) {
 			s32 value = 0x20 + (diff_DPK[RF_PATH_B] / c.threshold_dpk);
 
-			odm_set_bb_reg(p_dm, 0x82c, BIT(31), 0x1);
-			odm_set_bb_reg(p_dm, 0xec4, BIT(14) | BIT(13) | BIT(12) | BIT(11) | BIT(10), value);
-			odm_set_bb_reg(p_dm, 0x82c, BIT(31), 0x0);
+			odm_set_bb_reg(dm, R_0x82c, BIT(31), 0x1);
+			odm_set_bb_reg(dm, R_0xec4, BIT(14) | BIT(13) | BIT(12) | BIT(11) | BIT(10), value);
+			odm_set_bb_reg(dm, R_0x82c, BIT(31), 0x0);
 		} else {
-			odm_set_bb_reg(p_dm, 0x82c, BIT(31), 0x1);
-			odm_set_bb_reg(p_dm, 0xec4, BIT(14) | BIT(13) | BIT(12) | BIT(11) | BIT(10), 0);
-			odm_set_bb_reg(p_dm, 0x82c, BIT(31), 0x0);
+			odm_set_bb_reg(dm, R_0x82c, BIT(31), 0x1);
+			odm_set_bb_reg(dm, R_0xec4, BIT(14) | BIT(13) | BIT(12) | BIT(11) | BIT(10), 0);
+			odm_set_bb_reg(dm, R_0x82c, BIT(31), 0x0);
 		}
 	}
+#endif
 
 #endif
 
-	ODM_RT_TRACE(p_dm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("<===odm_txpowertracking_callback_thermal_meter\n"));
+	RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "<===%s\n", __func__);
 
-	p_rf_calibrate_info->tx_powercount = 0;
+	cali_info->tx_powercount = 0;
 }
 
-
-
-/* 3============================================================
+/*@3============================================================
  * 3 IQ Calibration
- * 3============================================================ */
+ * 3============================================================
+ */
 
-void
-odm_reset_iqk_result(
-	void					*p_dm_void
-)
+void odm_reset_iqk_result(void *dm_void)
 {
-	return;
 }
+
 #if !(DM_ODM_SUPPORT_TYPE & ODM_AP)
 u8 odm_get_right_chnl_place_for_iqk(u8 chnl)
 {
-	u8	channel_all[ODM_TARGET_CHNL_NUM_2G_5G] = {
-		1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 36, 38, 40, 42, 44, 46, 48, 50, 52, 54, 56, 58, 60, 62, 64, 100, 102, 104, 106, 108, 110, 112, 114, 116, 118, 120, 122, 124, 126, 128, 130, 132, 134, 136, 138, 140, 149, 151, 153, 155, 157, 159, 161, 163, 165
-	};
-	u8	place = chnl;
-
+	u8 channel_all[ODM_TARGET_CHNL_NUM_2G_5G] = {
+		1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14,
+		36, 38, 40, 42, 44, 46, 48, 50, 52, 54, 56, 58, 60, 62, 64,
+		100, 102, 104, 106, 108, 110, 112, 114, 116, 118, 120, 122,
+		124, 126, 128, 130, 132, 134, 136, 138, 140,
+		149, 151, 153, 155, 157, 159, 161, 163, 165};
+	u8 place = chnl;
 
 	if (chnl > 14) {
 		for (place = 14; place < sizeof(channel_all); place++) {
@@ -832,20 +855,16 @@ u8 odm_get_right_chnl_place_for_iqk(u8 chnl)
 		}
 	}
 	return 0;
-
 }
 #endif
 
-void
-odm_iq_calibrate(
-	struct PHY_DM_STRUCT	*p_dm
-)
+void odm_iq_calibrate(struct dm_struct *dm)
 {
-	struct _ADAPTER	*adapter = p_dm->adapter;
-	struct _IQK_INFORMATION	*p_iqk_info = &p_dm->IQK_info;
+	void *adapter = dm->adapter;
+	struct dm_iqk_info *iqk_info = &dm->IQK_info;
 
 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
-	if (*p_dm->p_is_fcs_mode_enable)
+	if (*dm->is_fcs_mode_enable)
 		return;
 #endif
 
@@ -854,45 +873,48 @@ odm_iq_calibrate(
 		return;
 #endif
 
-	if ((p_dm->is_linked) && (!p_iqk_info->rfk_forbidden)) {
-		if ((*p_dm->p_channel != p_dm->pre_channel) && (!*p_dm->p_is_scan_in_process)) {
-			p_dm->pre_channel = *p_dm->p_channel;
-			p_dm->linked_interval = 0;
+	if (dm->is_linked && !iqk_info->rfk_forbidden) {
+		if ((*dm->channel != dm->pre_channel) &&
+		    (!*dm->is_scan_in_process)) {
+			dm->pre_channel = *dm->channel;
+			dm->linked_interval = 0;
 		}
 
-		if (p_dm->linked_interval < 3)
-			p_dm->linked_interval++;
+		if (dm->linked_interval < 3)
+			dm->linked_interval++;
 
-		if (p_dm->linked_interval == 2)
-			halrf_iqk_trigger(p_dm, false);
-	} else
-		p_dm->linked_interval = 0;
+		if (dm->linked_interval == 2)
+			halrf_iqk_trigger(dm, false);
+	} else {
+		dm->linked_interval = 0;
+	}
 }
 
-void phydm_rf_init(void		*p_dm_void)
+void phydm_rf_init(void *dm_void)
 {
-	struct PHY_DM_STRUCT		*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	odm_txpowertracking_init(p_dm);
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+
+	odm_txpowertracking_init(dm);
 
 #if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_CE))
-	odm_clear_txpowertracking_state(p_dm);
+	odm_clear_txpowertracking_state(dm);
 #endif
-
 #if (DM_ODM_SUPPORT_TYPE & (ODM_AP))
 #if (RTL8814A_SUPPORT == 1)
-	if (p_dm->support_ic_type & ODM_RTL8814A)
-		phy_iq_calibrate_8814a_init(p_dm);
+	if (dm->support_ic_type & ODM_RTL8814A)
+		phy_iq_calibrate_8814a_init(dm);
 #endif
 #endif
-
 }
 
-void phydm_rf_watchdog(void		*p_dm_void)
+void phydm_rf_watchdog(void *dm_void)
 {
-	struct PHY_DM_STRUCT		*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
 #if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_CE))
-	odm_txpowertracking_check(p_dm);
-	/*if (p_dm->support_ic_type & ODM_IC_11AC_SERIES)*/
-		/*odm_iq_calibrate(p_dm);*/
+	odm_txpowertracking_check(dm);
+#if 0
+/*if (dm->support_ic_type & ODM_IC_11AC_SERIES)*/
+/*odm_iq_calibrate(dm);*/
+#endif
 #endif
 }
diff --git a/rtl8723DS/hal/phydm/halrf/halphyrf_ce.h b/rtl8723DS/hal/phydm/halrf/halphyrf_ce.h
index f2afd28..f0c4446 100755..100644
--- a/rtl8723DS/hal/phydm/halrf/halphyrf_ce.h
+++ b/rtl8723DS/hal/phydm/halrf/halphyrf_ce.h
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ * Copyright(c) 2007 - 2017  Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -8,29 +8,49 @@
  *
  * This program is distributed in the hope that it will be useful, but WITHOUT
  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  * more details.
  *
+ * The full GNU General Public License is included in this distribution in the
+ * file called LICENSE.
+ *
+ * Contact Information:
+ * wlanfae <wlanfae@realtek.com>
+ * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
+ * Hsinchu 300, Taiwan.
+ *
+ * Larry Finger <Larry.Finger@lwfinger.net>
+ *
  *****************************************************************************/
 
-#ifndef __HAL_PHY_RF_H__
-#define __HAL_PHY_RF_H__
+#ifndef __HALPHYRF_H__
+#define __HALPHYRF_H__
 
 #include "halrf/halrf_kfree.h"
 #if (RTL8814A_SUPPORT == 1)
-	#include "halrf/rtl8814a/halrf_iqk_8814a.h"
+#include "halrf/rtl8814a/halrf_iqk_8814a.h"
 #endif
 
 #if (RTL8822B_SUPPORT == 1)
-	#include "halrf/rtl8822b/halrf_iqk_8822b.h"
+#include "halrf/rtl8822b/halrf_iqk_8822b.h"
 #endif
 
 #if (RTL8821C_SUPPORT == 1)
-	#include "halrf/rtl8821c/halrf_iqk_8821c.h"
+#include "halrf/rtl8821c/halrf_iqk_8821c.h"
 #endif
 
-#include "halrf/halrf_powertracking_ce.h"
+#if (RTL8195B_SUPPORT == 1)
+/* #include "halrf/rtl8195b/halrf.h" */
+#include "halrf/rtl8195b/halrf_iqk_8195b.h"
+#include "halrf/rtl8195b/halrf_txgapk_8195b.h"
+#include "halrf/rtl8195b/halrf_dpk_8195b.h"
+#endif
+
+#if (RTL8814B_SUPPORT == 1)
+	#include "halrf/rtl8814b/halrf_iqk_8814b.h"
+#endif
 
+#include "halrf/halrf_powertracking_ce.h"
 
 enum spur_cal_method {
 	PLL_RESET,
@@ -46,69 +66,49 @@ enum pwrtrack_method {
 	MIX_5G_TSSI_2G_MODE
 };
 
-typedef void	(*func_set_pwr)(void *, enum pwrtrack_method, u8, u8);
-typedef void(*func_iqk)(void *, u8, u8, u8);
-typedef void	(*func_lck)(void *);
-typedef void	(*func_swing)(void *, u8 **, u8 **, u8 **, u8 **);
-typedef void	(*func_swing8814only)(void *, u8 **, u8 **, u8 **, u8 **);
-typedef void(*func_swing_xtal)(void *, s8 **, s8 **);
-typedef void(*func_set_xtal)(void *);
-
-struct _TXPWRTRACK_CFG {
-	u8		swing_table_size_cck;
-	u8		swing_table_size_ofdm;
-	u8		threshold_iqk;
-	u8		threshold_dpk;
-	u8		average_thermal_num;
-	u8		rf_path_count;
-	u32		thermal_reg_addr;
-	func_set_pwr	odm_tx_pwr_track_set_pwr;
-	func_iqk	do_iqk;
-	func_lck		phy_lc_calibrate;
-	func_swing	get_delta_swing_table;
-	func_swing8814only	get_delta_swing_table8814only;
-	func_swing_xtal			get_delta_swing_xtal_table;
-	func_set_xtal			odm_txxtaltrack_set_xtal;
+typedef void (*func_set_pwr)(void *, enum pwrtrack_method, u8, u8);
+typedef void (*func_iqk)(void *, u8, u8, u8);
+typedef void (*func_lck)(void *);
+typedef void (*func_swing)(void *, u8 **, u8 **, u8 **, u8 **);
+typedef void (*func_swing8814only)(void *, u8 **, u8 **, u8 **, u8 **);
+typedef void (*func_swing_xtal)(void *, s8 **, s8 **);
+typedef void (*func_set_xtal)(void *);
+
+struct txpwrtrack_cfg {
+	u8 swing_table_size_cck;
+	u8 swing_table_size_ofdm;
+	u8 threshold_iqk;
+	u8 threshold_dpk;
+	u8 average_thermal_num;
+	u8 rf_path_count;
+	u32 thermal_reg_addr;
+	func_set_pwr odm_tx_pwr_track_set_pwr;
+	func_iqk do_iqk;
+	func_lck phy_lc_calibrate;
+	func_swing get_delta_swing_table;
+	func_swing8814only get_delta_swing_table8814only;
+	func_swing_xtal get_delta_swing_xtal_table;
+	func_set_xtal odm_txxtaltrack_set_xtal;
 };
 
-void
-configure_txpower_track(
-	void					*p_dm_void,
-	struct _TXPWRTRACK_CFG	*p_config
-);
-
+void configure_txpower_track(void *dm_void, struct txpwrtrack_cfg *config);
 
-void
-odm_clear_txpowertracking_state(
-	void					*p_dm_void
-);
+void odm_clear_txpowertracking_state(void *dm_void);
 
-void
-odm_txpowertracking_callback_thermal_meter(
 #if (DM_ODM_SUPPORT_TYPE & ODM_AP)
-	void					*p_dm_void
-#elif (DM_ODM_SUPPORT_TYPE & ODM_CE) && defined(DM_ODM_CE_MAC80211)
-	void	*p_dm
+void odm_txpowertracking_callback_thermal_meter(void *dm_void);
+#elif (DM_ODM_SUPPORT_TYPE & ODM_CE)
+void odm_txpowertracking_callback_thermal_meter(void *dm);
 #else
-	struct _ADAPTER	*adapter
+void odm_txpowertracking_callback_thermal_meter(void *adapter);
 #endif
-);
-
-
-
-#define ODM_TARGET_CHNL_NUM_2G_5G	59
 
+#define ODM_TARGET_CHNL_NUM_2G_5G 59
 
-void
-odm_reset_iqk_result(
-	void					*p_dm_void
-);
-u8
-odm_get_right_chnl_place_for_iqk(
-	u8 chnl
-);
+void odm_reset_iqk_result(void *dm_void);
+u8 odm_get_right_chnl_place_for_iqk(u8 chnl);
 
-void phydm_rf_init(void					*p_dm_void);
-void phydm_rf_watchdog(void					*p_dm_void);
+void phydm_rf_init(void *dm_void);
+void phydm_rf_watchdog(void *dm_void);
 
-#endif	/*  #ifndef __HAL_PHY_RF_H__ */
+#endif /*__HALPHYRF_H__*/
diff --git a/rtl8723DS/hal/phydm/halrf/halphyrf_iot.c b/rtl8723DS/hal/phydm/halrf/halphyrf_iot.c
new file mode 100644
index 0000000..8145fc9
--- a/dev/null
+++ b/rtl8723DS/hal/phydm/halrf/halphyrf_iot.c
@@ -0,0 +1,528 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2007 - 2017  Realtek Corporation.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ *
+ * The full GNU General Public License is included in this distribution in the
+ * file called LICENSE.
+ *
+ * Contact Information:
+ * wlanfae <wlanfae@realtek.com>
+ * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
+ * Hsinchu 300, Taiwan.
+ *
+ * Larry Finger <Larry.Finger@lwfinger.net>
+ *
+ *****************************************************************************/
+
+#include "mp_precomp.h"
+#include "phydm_precomp.h"
+
+#define	CALCULATE_SWINGTALBE_OFFSET(_offset, _direction, _size, _delta_thermal) \
+	do {\
+		for (_offset = 0; _offset < _size; _offset++) { \
+			if (_delta_thermal < thermal_threshold[_direction][_offset]) { \
+				if (_offset != 0)\
+					_offset--;\
+				break;\
+			} \
+		}			\
+		if (_offset >= _size)\
+			_offset = _size-1;\
+	} while (0)
+
+void configure_txpower_track(
+	void					*dm_void,
+	struct txpwrtrack_cfg	*config
+)
+{
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+#if RTL8195B_SUPPORT
+	if (dm->support_ic_type == ODM_RTL8195B)
+		configure_txpower_track_8195b(config);
+#endif
+
+#if RTL8721D_SUPPORT
+	if (dm->support_ic_type == ODM_RTL8721D)
+		configure_txpower_track_8721d(config);
+#endif
+
+}
+
+/* **********************************************************************
+ * <20121113, Kordan> This function should be called when tx_agc changed.
+ * Otherwise the previous compensation is gone, because we record the
+ * delta of temperature between two TxPowerTracking watch dogs.
+ *
+ * NOTE: If Tx BB swing or Tx scaling is varified during run-time, still
+ * need to call this function.
+ * ********************************************************************** */
+void
+odm_clear_txpowertracking_state(
+	void					*dm_void
+)
+{
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct _hal_rf_ *rf = &dm->rf_table;
+	u8			p = 0;
+	struct dm_rf_calibration_struct	*cali_info = &dm->rf_calibrate_info;
+
+	cali_info->bb_swing_idx_cck_base = cali_info->default_cck_index;
+	cali_info->bb_swing_idx_cck = cali_info->default_cck_index;
+	dm->rf_calibrate_info.CCK_index = 0;
+
+	for (p = RF_PATH_A; p < MAX_RF_PATH; ++p) {
+		cali_info->bb_swing_idx_ofdm_base[p] = cali_info->default_ofdm_index;
+		cali_info->bb_swing_idx_ofdm[p] = cali_info->default_ofdm_index;
+		cali_info->OFDM_index[p] = cali_info->default_ofdm_index;
+
+		cali_info->power_index_offset[p] = 0;
+		cali_info->delta_power_index[p] = 0;
+		cali_info->delta_power_index_last[p] = 0;
+
+		cali_info->absolute_ofdm_swing_idx[p] = 0;
+		cali_info->remnant_ofdm_swing_idx[p] = 0;
+		cali_info->kfree_offset[p] = 0;
+	}
+
+	cali_info->modify_tx_agc_flag_path_a = false;
+	cali_info->modify_tx_agc_flag_path_b = false;
+	cali_info->modify_tx_agc_flag_path_c = false;
+	cali_info->modify_tx_agc_flag_path_d = false;
+	cali_info->remnant_cck_swing_idx = 0;
+	cali_info->thermal_value = rf->eeprom_thermal;
+	cali_info->modify_tx_agc_value_cck = 0;
+	cali_info->modify_tx_agc_value_ofdm = 0;
+}
+
+void
+odm_txpowertracking_callback_thermal_meter(
+	void	*dm_void
+)
+{
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct _hal_rf_ *rf = &dm->rf_table;
+	struct dm_rf_calibration_struct *cali_info = &dm->rf_calibrate_info;
+	struct	dm_iqk_info *iqk_info = &dm->IQK_info;
+
+	u8 thermal_value = 0, delta, delta_LCK, delta_IQK, p = 0, i = 0;
+	u8 thermal_value_avg_count = 0;
+	u32 thermal_value_avg = 0, regc80, regcd0, regcd4, regab4;
+
+	u8 OFDM_min_index = 0;  /* OFDM BB Swing should be less than +3.0dB, which is required by Arthur */
+	u8 indexforchannel = 0; /* get_right_chnl_place_for_iqk(hal_data->current_channel) */
+	u8 power_tracking_type = rf->pwt_type;
+	u8 xtal_offset_eanble = 0;
+	s8 thermal_value_temp = 0;
+
+	struct txpwrtrack_cfg	c = {0};
+
+	/* 4 1. The following TWO tables decide the final index of OFDM/CCK swing table. */
+	u8 *delta_swing_table_idx_tup_a = NULL;
+	u8 *delta_swing_table_idx_tdown_a = NULL;
+	u8 *delta_swing_table_idx_tup_b = NULL;
+	u8 *delta_swing_table_idx_tdown_b = NULL;
+	/*for Xtal Offset by James.Tung*/
+	s8 *delta_swing_table_xtal_up = NULL;
+	s8 *delta_swing_table_xtal_down = NULL;
+
+	/* 4 2. Initialization ( 7 steps in total ) */
+
+	configure_txpower_track(dm, &c);
+
+	(*c.get_delta_swing_table)(dm, (u8 **)&delta_swing_table_idx_tup_a, (u8 **)&delta_swing_table_idx_tdown_a,
+		(u8 **)&delta_swing_table_idx_tup_b, (u8 **)&delta_swing_table_idx_tdown_b);
+
+	/*for Xtal Offset*/
+	if (dm->support_ic_type & (ODM_RTL8195B | ODM_RTL8721D))
+		(*c.get_delta_swing_xtal_table)(dm,
+		 (s8 **)&delta_swing_table_xtal_up,
+		 (s8 **)&delta_swing_table_xtal_down);
+
+	cali_info->txpowertracking_callback_cnt++;	/*cosa add for debug*/
+	cali_info->is_txpowertracking_init = true;
+
+	RF_DBG(dm, DBG_RF_TX_PWR_TRACK,
+	       "===>odm_txpowertracking_callback_thermal_meter\n cali_info->bb_swing_idx_cck_base: %d, cali_info->bb_swing_idx_ofdm_base[A]: %d, cali_info->default_ofdm_index: %d\n",
+	       cali_info->bb_swing_idx_cck_base,
+	       cali_info->bb_swing_idx_ofdm_base[RF_PATH_A],
+	       cali_info->default_ofdm_index);
+
+	RF_DBG(dm, DBG_RF_TX_PWR_TRACK,
+	       "cali_info->txpowertrack_control = %d, hal_data->eeprom_thermal_meter %d\n",
+	       cali_info->txpowertrack_control, rf->eeprom_thermal);
+
+	if (dm->support_ic_type == ODM_RTL8721D)
+		thermal_value = (u8)odm_get_rf_reg(dm, RF_PATH_A,
+						   c.thermal_reg_addr, 0x7e0);
+		/* 0x42: RF Reg[10:5] 8721D */
+	else
+		thermal_value = (u8)odm_get_rf_reg(dm, RF_PATH_A,
+						   c.thermal_reg_addr, 0xfc00);
+		/* 0x42: RF Reg[15:10] 88E */
+
+	thermal_value_temp = thermal_value + phydm_get_thermal_offset(dm);
+
+	RF_DBG(dm, DBG_RF_TX_PWR_TRACK,
+	       "thermal_value_temp(%d) = thermal_value(%d) + power_trim_thermal(%d)\n", thermal_value_temp, thermal_value, phydm_get_thermal_offset(dm));
+
+	if (thermal_value_temp > 63)
+		thermal_value = 63;
+	else if (thermal_value_temp < 0)
+		thermal_value = 0;
+	else
+		thermal_value = thermal_value_temp;
+
+	if (!cali_info->txpowertrack_control)
+		return;
+
+	if (rf->eeprom_thermal == 0xff) {
+		RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "no pg, hal_data->eeprom_thermal_meter = 0x%x\n", rf->eeprom_thermal);
+		return;
+	}
+#if 0
+	/*4 3. Initialize ThermalValues of rf_calibrate_info*/
+	//if (cali_info->is_reloadtxpowerindex)
+	//	RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "reload ofdm index for band switch\n");
+#endif
+	/*4 4. Calculate average thermal meter*/
+
+	cali_info->thermal_value_avg[cali_info->thermal_value_avg_index] = thermal_value;
+	cali_info->thermal_value_avg_index++;
+	if (cali_info->thermal_value_avg_index == c.average_thermal_num)   /*Average times =  c.average_thermal_num*/
+		cali_info->thermal_value_avg_index = 0;
+
+	for (i = 0; i < c.average_thermal_num; i++) {
+		if (cali_info->thermal_value_avg[i]) {
+			thermal_value_avg += cali_info->thermal_value_avg[i];
+			thermal_value_avg_count++;
+		}
+	}
+
+	if (thermal_value_avg_count) {			  /* Calculate Average thermal_value after average enough times */
+		thermal_value = (u8)(thermal_value_avg / thermal_value_avg_count);
+		cali_info->thermal_value_delta = thermal_value - rf->eeprom_thermal;
+		RF_DBG(dm, DBG_RF_TX_PWR_TRACK,
+		       "AVG Thermal Meter = 0x%X, EFUSE Thermal base = 0x%X\n", thermal_value, rf->eeprom_thermal);
+	}
+
+	/* 4 5. Calculate delta, delta_LCK, delta_IQK. */
+	/* "delta" here is used to determine whether thermal value changes or not. */
+	delta	= (thermal_value > cali_info->thermal_value) ? (thermal_value - cali_info->thermal_value) : (cali_info->thermal_value - thermal_value);
+	delta_LCK = (thermal_value > cali_info->thermal_value_lck) ? (thermal_value - cali_info->thermal_value_lck) : (cali_info->thermal_value_lck - thermal_value);
+	delta_IQK = (thermal_value > cali_info->thermal_value_iqk) ? (thermal_value - cali_info->thermal_value_iqk) : (cali_info->thermal_value_iqk - thermal_value);
+
+	/*4 6. If necessary, do LCK.*/
+	RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "(delta, delta_LCK, delta_IQK) = (%d, %d, %d)\n", delta, delta_LCK, delta_IQK);
+
+	/* Wait sacn to do LCK by RF Jenyu*/
+	if ((!*dm->is_scan_in_process) && !iqk_info->rfk_forbidden &&
+	    (!*dm->is_tdma)) {
+		/* Delta temperature is equal to or larger than 20 centigrade.*/
+		if (delta_LCK >= c.threshold_iqk) {
+			RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "delta_LCK(%d) >= threshold_iqk(%d)\n", delta_LCK, c.threshold_iqk);
+			cali_info->thermal_value_lck = thermal_value;
+
+			/*Use RTLCK, so close power tracking driver LCK*/
+			(*c.phy_lc_calibrate)(dm);
+		}
+	}
+
+	/*3 7. If necessary, move the index of swing table to adjust Tx power.*/
+	if (delta > 0 && cali_info->txpowertrack_control) {
+		/* "delta" here is used to record the absolute value of difference. */
+		delta = thermal_value > rf->eeprom_thermal ? (thermal_value - rf->eeprom_thermal) : (rf->eeprom_thermal - thermal_value);
+
+		if (delta >= TXPWR_TRACK_TABLE_SIZE)
+			delta = TXPWR_TRACK_TABLE_SIZE - 1;
+
+		/*4 7.1 The Final Power index = BaseIndex + power_index_offset*/
+		if (thermal_value > rf->eeprom_thermal) {
+			for (p = RF_PATH_A; p < c.rf_path_count; p++) {
+				cali_info->delta_power_index_last[p] = cali_info->delta_power_index[p]; /*recording poer index offset*/
+				switch (p) {
+				case RF_PATH_B:
+					RF_DBG(dm, DBG_RF_TX_PWR_TRACK,
+					       "delta_swing_table_idx_tup_b[%d] = %d\n", delta, delta_swing_table_idx_tup_b[delta]);
+
+					cali_info->delta_power_index[p] =
+						delta_swing_table_idx_tup_b
+						[delta];
+					cali_info->absolute_ofdm_swing_idx[p] =
+						delta_swing_table_idx_tup_b
+						[delta];
+					/*Record delta swing for mix mode*/
+					RF_DBG(dm, DBG_RF_TX_PWR_TRACK,
+					       "******Temp is higher and cali_info->absolute_ofdm_swing_idx[RF_PATH_B] = %d\n", cali_info->absolute_ofdm_swing_idx[p]);
+					break;
+
+				default:
+					RF_DBG(dm, DBG_RF_TX_PWR_TRACK,
+					       "delta_swing_table_idx_tup_a[%d] = %d\n", delta, delta_swing_table_idx_tup_a[delta]);
+
+					cali_info->delta_power_index[p] = delta_swing_table_idx_tup_a[delta];
+					cali_info->absolute_ofdm_swing_idx[p] =
+					delta_swing_table_idx_tup_a[delta];
+					/*Record delta swing*/
+					/*for mix mode power tracking*/
+					RF_DBG(dm, DBG_RF_TX_PWR_TRACK,
+					       "******Temp is higher and cali_info->absolute_ofdm_swing_idx[RF_PATH_A] = %d\n", cali_info->absolute_ofdm_swing_idx[p]);
+					break;
+				}
+			}
+			/* JJ ADD 20161014 */
+			if (dm->support_ic_type &
+			    (ODM_RTL8195B | ODM_RTL8721D)) {
+				/*Save xtal_offset from Xtal table*/
+				cali_info->xtal_offset_last = cali_info->xtal_offset;	/*recording last Xtal offset*/
+				RF_DBG(dm, DBG_RF_TX_PWR_TRACK,
+				       "[Xtal] delta_swing_table_xtal_up[%d] = %d\n", delta, delta_swing_table_xtal_up[delta]);
+				cali_info->xtal_offset = delta_swing_table_xtal_up[delta];
+				xtal_offset_eanble = (cali_info->xtal_offset_last != cali_info->xtal_offset);
+			}
+
+		} else {
+			for (p = RF_PATH_A; p < c.rf_path_count; p++) {
+				cali_info->delta_power_index_last[p] = cali_info->delta_power_index[p]; /*recording poer index offset*/
+
+				switch (p) {
+				case RF_PATH_B:
+					RF_DBG(dm, DBG_RF_TX_PWR_TRACK,
+					       "delta_swing_table_idx_tdown_b[%d] = %d\n", delta, delta_swing_table_idx_tdown_b[delta]);
+					cali_info->delta_power_index[p] = -1 * delta_swing_table_idx_tdown_b[delta];
+					cali_info->absolute_ofdm_swing_idx[p] = -1 * delta_swing_table_idx_tdown_b[delta]; /*Record delta swing for mix mode power tracking*/
+					RF_DBG(dm, DBG_RF_TX_PWR_TRACK,
+					       "******Temp is lower and cali_info->absolute_ofdm_swing_idx[RF_PATH_B] = %d\n", cali_info->absolute_ofdm_swing_idx[p]);
+					break;
+
+				default:
+					RF_DBG(dm, DBG_RF_TX_PWR_TRACK,
+					       "delta_swing_table_idx_tdown_a[%d] = %d\n", delta, delta_swing_table_idx_tdown_a[delta]);
+					cali_info->delta_power_index[p] = -1 * delta_swing_table_idx_tdown_a[delta];
+					cali_info->absolute_ofdm_swing_idx[p] = -1 * delta_swing_table_idx_tdown_a[delta]; /*Record delta swing for mix mode power tracking*/
+					RF_DBG(dm, DBG_RF_TX_PWR_TRACK,
+					       "******Temp is lower and cali_info->absolute_ofdm_swing_idx[RF_PATH_A] = %d\n", cali_info->absolute_ofdm_swing_idx[p]);
+					break;
+				}
+			}
+			/* JJ ADD 20161014 */
+
+			if (dm->support_ic_type &
+			    (ODM_RTL8195B | ODM_RTL8721D)) {
+				/*Save xtal_offset from Xtal table*/
+				cali_info->xtal_offset_last = cali_info->xtal_offset;	/*recording last Xtal offset*/
+				RF_DBG(dm, DBG_RF_TX_PWR_TRACK,
+				       "[Xtal] delta_swing_table_xtal_down[%d] = %d\n", delta, delta_swing_table_xtal_down[delta]);
+				cali_info->xtal_offset = delta_swing_table_xtal_down[delta];
+				xtal_offset_eanble = (cali_info->xtal_offset_last != cali_info->xtal_offset);
+			}
+		}
+#if 0
+		for (p = RF_PATH_A; p < c.rf_path_count; p++) {
+			RF_DBG(dm, DBG_RF_TX_PWR_TRACK,
+			       "\n\n=========================== [path-%d] Calculating power_index_offset===========================\n", p);
+
+			if (cali_info->delta_power_index[p] == cali_info->delta_power_index_last[p])		 /*If Thermal value changes but lookup table value still the same*/
+				cali_info->power_index_offset[p] = 0;
+			else
+				cali_info->power_index_offset[p] = cali_info->delta_power_index[p] - cali_info->delta_power_index_last[p];		/*Power index diff between 2 times Power Tracking*/
+
+			RF_DBG(dm, DBG_RF_TX_PWR_TRACK,
+			       "[path-%d] power_index_offset(%d) = delta_power_index(%d) - delta_power_index_last(%d)\n", p, cali_info->power_index_offset[p], cali_info->delta_power_index[p], cali_info->delta_power_index_last[p]);
+
+			cali_info->OFDM_index[p] = cali_info->bb_swing_idx_ofdm_base[p] + cali_info->power_index_offset[p];
+			cali_info->CCK_index = cali_info->bb_swing_idx_cck_base + cali_info->power_index_offset[p];
+
+			cali_info->bb_swing_idx_cck = cali_info->CCK_index;
+			cali_info->bb_swing_idx_ofdm[p] = cali_info->OFDM_index[p];
+
+			/*************Print BB Swing base and index Offset*************/
+
+			RF_DBG(dm, DBG_RF_TX_PWR_TRACK,
+			       "The 'CCK' final index(%d) = BaseIndex(%d) + power_index_offset(%d)\n", cali_info->bb_swing_idx_cck, cali_info->bb_swing_idx_cck_base, cali_info->power_index_offset[p]);
+			RF_DBG(dm, DBG_RF_TX_PWR_TRACK,
+			       "The 'OFDM' final index(%d) = BaseIndex[%d](%d) + power_index_offset(%d)\n", cali_info->bb_swing_idx_ofdm[p], p, cali_info->bb_swing_idx_ofdm_base[p], cali_info->power_index_offset[p]);
+
+			/*4 7.1 Handle boundary conditions of index.*/
+
+			if (cali_info->OFDM_index[p] > c.swing_table_size_ofdm - 1)
+				cali_info->OFDM_index[p] = c.swing_table_size_ofdm - 1;
+			else if (cali_info->OFDM_index[p] <= OFDM_min_index)
+				cali_info->OFDM_index[p] = OFDM_min_index;
+		}
+
+		RF_DBG(dm, DBG_RF_TX_PWR_TRACK,
+		       "\n\n========================================================================================================\n");
+
+		if (cali_info->CCK_index > c.swing_table_size_cck - 1)
+			cali_info->CCK_index = c.swing_table_size_cck - 1;
+		else if (cali_info->CCK_index <= 0)
+			cali_info->CCK_index = 0;
+#endif
+	} else {
+		RF_DBG(dm, DBG_RF_TX_PWR_TRACK,
+		       "The thermal meter is unchanged or TxPowerTracking OFF(%d): thermal_value: %d, cali_info->thermal_value: %d\n",
+		       cali_info->txpowertrack_control, thermal_value, cali_info->thermal_value);
+
+		for (p = RF_PATH_A; p < c.rf_path_count; p++)
+			cali_info->power_index_offset[p] = 0;
+	}
+#if 0
+	RF_DBG(dm, DBG_RF_TX_PWR_TRACK,
+	       "TxPowerTracking: [CCK] Swing Current index: %d, Swing base index: %d\n",
+	       cali_info->CCK_index, cali_info->bb_swing_idx_cck_base);	   /*Print Swing base & current*/
+
+	for (p = RF_PATH_A; p < c.rf_path_count; p++) {
+		RF_DBG(dm, DBG_RF_TX_PWR_TRACK,
+		       "TxPowerTracking: [OFDM] Swing Current index: %d, Swing base index[%d]: %d\n",
+		       cali_info->OFDM_index[p], p, cali_info->bb_swing_idx_ofdm_base[p]);
+	}
+#endif
+	if (thermal_value > rf->eeprom_thermal) {
+		RF_DBG(dm, DBG_RF_TX_PWR_TRACK,
+		       "Temperature(%d) higher than PG value(%d)\n", thermal_value, rf->eeprom_thermal);
+
+		if (dm->support_ic_type == ODM_RTL8188E ||
+		    dm->support_ic_type == ODM_RTL8192E ||
+		    dm->support_ic_type == ODM_RTL8821 ||
+		    dm->support_ic_type == ODM_RTL8812 ||
+		    dm->support_ic_type == ODM_RTL8723B ||
+		    dm->support_ic_type == ODM_RTL8814A ||
+		    dm->support_ic_type == ODM_RTL8703B ||
+		    dm->support_ic_type == ODM_RTL8188F ||
+		    dm->support_ic_type == ODM_RTL8822B ||
+		    dm->support_ic_type == ODM_RTL8723D ||
+		    dm->support_ic_type == ODM_RTL8821C ||
+		    dm->support_ic_type == ODM_RTL8710B ||
+		    dm->support_ic_type == ODM_RTL8192F ||
+		    dm->support_ic_type == ODM_RTL8195B ||
+		    dm->support_ic_type == ODM_RTL8721D){
+			RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "**********Enter POWER Tracking MIX_MODE**********\n");
+			for (p = RF_PATH_A; p < c.rf_path_count; p++)
+				(*c.odm_tx_pwr_track_set_pwr)(dm, MIX_MODE, p, 0);
+		} else {
+			RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "**********Enter POWER Tracking BBSWING_MODE**********\n");
+			for (p = RF_PATH_A; p < c.rf_path_count; p++)
+				(*c.odm_tx_pwr_track_set_pwr)(dm, BBSWING, p, indexforchannel);
+		}
+	} else {
+		RF_DBG(dm, DBG_RF_TX_PWR_TRACK,
+		       "Temperature(%d) lower than PG value(%d)\n", thermal_value, rf->eeprom_thermal);
+
+		if (dm->support_ic_type == ODM_RTL8188E ||
+		    dm->support_ic_type == ODM_RTL8192E ||
+		    dm->support_ic_type == ODM_RTL8821 ||
+		    dm->support_ic_type == ODM_RTL8812 ||
+		    dm->support_ic_type == ODM_RTL8723B ||
+		    dm->support_ic_type == ODM_RTL8814A ||
+		    dm->support_ic_type == ODM_RTL8703B ||
+		    dm->support_ic_type == ODM_RTL8188F ||
+		    dm->support_ic_type == ODM_RTL8822B ||
+		    dm->support_ic_type == ODM_RTL8723D ||
+		    dm->support_ic_type == ODM_RTL8821C ||
+		    dm->support_ic_type == ODM_RTL8710B ||
+		    dm->support_ic_type == ODM_RTL8192F ||
+		    dm->support_ic_type == ODM_RTL8195B ||
+		    dm->support_ic_type == ODM_RTL8721D) {
+			RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "**********Enter POWER Tracking MIX_MODE**********\n");
+			for (p = RF_PATH_A; p < c.rf_path_count; p++)
+				(*c.odm_tx_pwr_track_set_pwr)(dm, MIX_MODE, p, indexforchannel);
+		} else {
+			RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "**********Enter POWER Tracking BBSWING_MODE**********\n");
+			for (p = RF_PATH_A; p < c.rf_path_count; p++)
+				(*c.odm_tx_pwr_track_set_pwr)(dm, BBSWING, p, indexforchannel);
+		}
+
+		cali_info->bb_swing_idx_cck_base = cali_info->bb_swing_idx_cck;    /*Record last time Power Tracking result as base.*/
+		for (p = RF_PATH_A; p < c.rf_path_count; p++)
+			cali_info->bb_swing_idx_ofdm_base[p] = cali_info->bb_swing_idx_ofdm[p];
+
+		RF_DBG(dm, DBG_RF_TX_PWR_TRACK,
+		       "cali_info->thermal_value = %d thermal_value= %d\n", cali_info->thermal_value, thermal_value);
+
+		cali_info->thermal_value = thermal_value; /*Record last Power Tracking Thermal value*/
+	}
+
+	/* JJ ADD 20161014 */
+	if (dm->support_ic_type == (ODM_RTL8195B | ODM_RTL8721D)) {
+		if (xtal_offset_eanble != 0 && cali_info->txpowertrack_control && (rf->eeprom_thermal != 0xff)) {
+			RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "**********Enter Xtal Tracking**********\n");
+
+			if (thermal_value > rf->eeprom_thermal) {
+				RF_DBG(dm, DBG_RF_TX_PWR_TRACK,
+				       "Temperature(%d) higher than PG value(%d)\n", thermal_value, rf->eeprom_thermal);
+				(*c.odm_txxtaltrack_set_xtal)(dm);
+			} else {
+				RF_DBG(dm, DBG_RF_TX_PWR_TRACK,
+				       "Temperature(%d) lower than PG value(%d)\n", thermal_value, rf->eeprom_thermal);
+				(*c.odm_txxtaltrack_set_xtal)(dm);
+			}
+			RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "**********End Xtal Tracking**********\n");
+		}
+	}
+
+	/* Wait sacn to do IQK by RF Jenyu*/
+	if ((!*dm->is_scan_in_process) && (!iqk_info->rfk_forbidden)) {
+		/*Delta temperature is equal to or larger than 20 centigrade (When threshold is 8).*/
+		if (delta_IQK >= c.threshold_iqk) {
+			cali_info->thermal_value_iqk = thermal_value;
+			RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "delta_IQK(%d) >= threshold_iqk(%d)\n", delta_IQK, c.threshold_iqk);
+			if (!cali_info->is_iqk_in_progress)
+				(*c.do_iqk)(dm, delta_IQK, thermal_value, 8);
+		}
+	}
+
+	RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "<===odm_txpowertracking_callback_thermal_meter\n");
+
+	cali_info->tx_powercount = 0;
+}
+
+/* 3============================================================
+ * 3 IQ Calibration
+ * 3============================================================
+ */
+
+void
+odm_reset_iqk_result(
+	void					*dm_void
+)
+{
+	return;
+}
+
+u8 odm_get_right_chnl_place_for_iqk(u8 chnl)
+{
+	
+}
+
+void
+odm_iq_calibrate(
+	struct dm_struct	*dm
+)
+{
+	
+}
+
+void phydm_rf_init(void		*dm_void)
+{
+	struct dm_struct	*dm = (struct dm_struct *)dm_void;
+
+	odm_txpowertracking_init(dm);
+	
+	odm_clear_txpowertracking_state(dm);
+}
+
+void phydm_rf_watchdog(void		*dm_void)
+{
+	struct dm_struct		*dm = (struct dm_struct *)dm_void;
+
+	odm_txpowertracking_check(dm);
+}
diff --git a/rtl8723DS/hal/phydm/halrf/halphyrf_iot.h b/rtl8723DS/hal/phydm/halrf/halphyrf_iot.h
new file mode 100644
index 0000000..7eba821
--- a/dev/null
+++ b/rtl8723DS/hal/phydm/halrf/halphyrf_iot.h
@@ -0,0 +1,124 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2007 - 2017  Realtek Corporation.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ *
+ * The full GNU General Public License is included in this distribution in the
+ * file called LICENSE.
+ *
+ * Contact Information:
+ * wlanfae <wlanfae@realtek.com>
+ * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
+ * Hsinchu 300, Taiwan.
+ *
+ * Larry Finger <Larry.Finger@lwfinger.net>
+ *
+ *****************************************************************************/
+
+#ifndef __HALPHYRF_H__
+#define __HALPHYRF_H__
+
+#include "halrf/halrf_kfree.h"
+
+#if (RTL8821C_SUPPORT == 1)
+	#include "halrf/rtl8821c/halrf_iqk_8821c.h"
+#endif
+
+#if (RTL8195B_SUPPORT == 1)
+//	#include "halrf/rtl8195b/halrf.h"
+	#include "halrf/rtl8195b/halrf_iqk_8195b.h"
+	#include "halrf/rtl8195b/halrf_txgapk_8195b.h"
+	#include "halrf/rtl8195b/halrf_dpk_8195b.h"
+#endif
+
+#include "halrf/halrf_powertracking_iot.h"
+
+
+enum spur_cal_method {
+	PLL_RESET,
+	AFE_PHASE_SEL
+};
+
+enum pwrtrack_method {
+	BBSWING,
+	TXAGC,
+	MIX_MODE,
+	TSSI_MODE,
+	MIX_2G_TSSI_5G_MODE,
+	MIX_5G_TSSI_2G_MODE
+};
+
+typedef void	(*func_set_pwr)(void *, enum pwrtrack_method, u8, u8);
+typedef void(*func_iqk)(void *, u8, u8, u8);
+typedef void	(*func_lck)(void *);
+typedef void	(*func_swing)(void *, u8 **, u8 **, u8 **, u8 **);
+typedef void	(*func_swing8814only)(void *, u8 **, u8 **, u8 **, u8 **);
+typedef void(*func_swing_xtal)(void *, s8 **, s8 **);
+typedef void(*func_set_xtal)(void *);
+
+struct txpwrtrack_cfg {
+	u8		swing_table_size_cck;
+	u8		swing_table_size_ofdm;
+	u8		threshold_iqk;
+	u8		threshold_dpk;
+	u8		average_thermal_num;
+	u8		rf_path_count;
+	u32		thermal_reg_addr;
+	func_set_pwr	odm_tx_pwr_track_set_pwr;
+	func_iqk	do_iqk;
+	func_lck		phy_lc_calibrate;
+	func_swing	get_delta_swing_table;
+	func_swing8814only	get_delta_swing_table8814only;
+	func_swing_xtal			get_delta_swing_xtal_table;
+	func_set_xtal			odm_txxtaltrack_set_xtal;
+};
+
+void
+configure_txpower_track(
+	void					*dm_void,
+	struct txpwrtrack_cfg	*config
+);
+
+
+void
+odm_clear_txpowertracking_state(
+	void					*dm_void
+);
+
+void
+odm_txpowertracking_callback_thermal_meter(
+#if (DM_ODM_SUPPORT_TYPE & ODM_AP)
+	void					*dm_void
+#elif (DM_ODM_SUPPORT_TYPE & ODM_CE)
+	void	*dm
+#else
+	void	*adapter
+#endif
+);
+
+
+
+#define ODM_TARGET_CHNL_NUM_2G_5G	59
+
+
+void
+odm_reset_iqk_result(
+	void					*dm_void
+);
+u8
+odm_get_right_chnl_place_for_iqk(
+	u8 chnl
+);
+
+void phydm_rf_init(void					*dm_void);
+void phydm_rf_watchdog(void					*dm_void);
+
+#endif	/*#ifndef __HALPHYRF_H__*/
diff --git a/rtl8723DS/hal/phydm/halrf/halphyrf_win.c b/rtl8723DS/hal/phydm/halrf/halphyrf_win.c
index d5d0b40..7970278 100755..100644
--- a/rtl8723DS/hal/phydm/halrf/halphyrf_win.c
+++ b/rtl8723DS/hal/phydm/halrf/halphyrf_win.c
@@ -32,66 +32,76 @@
 	} while (0)
 
 void configure_txpower_track(
-	struct PHY_DM_STRUCT		*p_dm,
-	struct _TXPWRTRACK_CFG	*p_config
+	struct dm_struct		*dm,
+	struct txpwrtrack_cfg	*config
 )
 {
 #if RTL8192E_SUPPORT
-	if (p_dm->support_ic_type == ODM_RTL8192E)
-		configure_txpower_track_8192e(p_config);
+	if (dm->support_ic_type == ODM_RTL8192E)
+		configure_txpower_track_8192e(config);
 #endif
 #if RTL8821A_SUPPORT
-	if (p_dm->support_ic_type == ODM_RTL8821)
-		configure_txpower_track_8821a(p_config);
+	if (dm->support_ic_type == ODM_RTL8821)
+		configure_txpower_track_8821a(config);
 #endif
 #if RTL8812A_SUPPORT
-	if (p_dm->support_ic_type == ODM_RTL8812)
-		configure_txpower_track_8812a(p_config);
+	if (dm->support_ic_type == ODM_RTL8812)
+		configure_txpower_track_8812a(config);
 #endif
 #if RTL8188E_SUPPORT
-	if (p_dm->support_ic_type == ODM_RTL8188E)
-		configure_txpower_track_8188e(p_config);
+	if (dm->support_ic_type == ODM_RTL8188E)
+		configure_txpower_track_8188e(config);
 #endif
 
 #if RTL8188F_SUPPORT
-	if (p_dm->support_ic_type == ODM_RTL8188F)
-		configure_txpower_track_8188f(p_config);
+	if (dm->support_ic_type == ODM_RTL8188F)
+		configure_txpower_track_8188f(config);
 #endif
 
 #if RTL8723B_SUPPORT
-	if (p_dm->support_ic_type == ODM_RTL8723B)
-		configure_txpower_track_8723b(p_config);
+	if (dm->support_ic_type == ODM_RTL8723B)
+		configure_txpower_track_8723b(config);
 #endif
 
 #if RTL8814A_SUPPORT
-	if (p_dm->support_ic_type == ODM_RTL8814A)
-		configure_txpower_track_8814a(p_config);
+	if (dm->support_ic_type == ODM_RTL8814A)
+		configure_txpower_track_8814a(config);
 #endif
 
 #if RTL8703B_SUPPORT
-	if (p_dm->support_ic_type == ODM_RTL8703B)
-		configure_txpower_track_8703b(p_config);
+	if (dm->support_ic_type == ODM_RTL8703B)
+		configure_txpower_track_8703b(config);
 #endif
 
 #if RTL8822B_SUPPORT
-	if (p_dm->support_ic_type == ODM_RTL8822B)
-		configure_txpower_track_8822b(p_config);
+	if (dm->support_ic_type == ODM_RTL8822B)
+		configure_txpower_track_8822b(config);
 #endif
 
 #if RTL8723D_SUPPORT
-	if (p_dm->support_ic_type == ODM_RTL8723D)
-		configure_txpower_track_8723d(p_config);
+	if (dm->support_ic_type == ODM_RTL8723D)
+		configure_txpower_track_8723d(config);
 #endif
 
 /* JJ ADD 20161014 */
 #if RTL8710B_SUPPORT
-	if (p_dm->support_ic_type == ODM_RTL8710B)
-		configure_txpower_track_8710b(p_config);
+	if (dm->support_ic_type == ODM_RTL8710B)
+		configure_txpower_track_8710b(config);
 #endif
 
 #if RTL8821C_SUPPORT
-	if (p_dm->support_ic_type == ODM_RTL8821C)
-		configure_txpower_track_8821c(p_config);
+	if (dm->support_ic_type == ODM_RTL8821C)
+		configure_txpower_track_8821c(config);
+#endif
+
+#if RTL8192F_SUPPORT
+	if (dm->support_ic_type == ODM_RTL8192F)
+		configure_txpower_track_8192f(config);
+#endif
+
+#if RTL8822C_SUPPORT
+	if (dm->support_ic_type == ODM_RTL8822C)
+		configure_txpower_track_8822c(config);
 #endif
 
 }
@@ -106,75 +116,75 @@ void configure_txpower_track(
  * ********************************************************************** */
 void
 odm_clear_txpowertracking_state(
-	struct PHY_DM_STRUCT		*p_dm
+	struct dm_struct		*dm
 )
 {
-	PHAL_DATA_TYPE	p_hal_data = GET_HAL_DATA(p_dm->adapter);
+	PHAL_DATA_TYPE	hal_data = GET_HAL_DATA((PADAPTER)(dm->adapter));
 	u8			p = 0;
-	struct odm_rf_calibration_structure	*p_rf_calibrate_info = &(p_dm->rf_calibrate_info);
+	struct dm_rf_calibration_struct	*cali_info = &(dm->rf_calibrate_info);
 
-	p_rf_calibrate_info->bb_swing_idx_cck_base = p_rf_calibrate_info->default_cck_index;
-	p_rf_calibrate_info->bb_swing_idx_cck = p_rf_calibrate_info->default_cck_index;
-	p_rf_calibrate_info->CCK_index = 0;
+	cali_info->bb_swing_idx_cck_base = cali_info->default_cck_index;
+	cali_info->bb_swing_idx_cck = cali_info->default_cck_index;
+	cali_info->CCK_index = 0;
 
 	for (p = RF_PATH_A; p < MAX_RF_PATH; ++p) {
-		p_rf_calibrate_info->bb_swing_idx_ofdm_base[p] = p_rf_calibrate_info->default_ofdm_index;
-		p_rf_calibrate_info->bb_swing_idx_ofdm[p] = p_rf_calibrate_info->default_ofdm_index;
-		p_rf_calibrate_info->OFDM_index[p] = p_rf_calibrate_info->default_ofdm_index;
+		cali_info->bb_swing_idx_ofdm_base[p] = cali_info->default_ofdm_index;
+		cali_info->bb_swing_idx_ofdm[p] = cali_info->default_ofdm_index;
+		cali_info->OFDM_index[p] = cali_info->default_ofdm_index;
 
-		p_rf_calibrate_info->power_index_offset[p] = 0;
-		p_rf_calibrate_info->delta_power_index[p] = 0;
-		p_rf_calibrate_info->delta_power_index_last[p] = 0;
+		cali_info->power_index_offset[p] = 0;
+		cali_info->delta_power_index[p] = 0;
+		cali_info->delta_power_index_last[p] = 0;
 
-		p_rf_calibrate_info->absolute_ofdm_swing_idx[p] = 0;    /* Initial Mix mode power tracking*/
-		p_rf_calibrate_info->remnant_ofdm_swing_idx[p] = 0;
-		p_rf_calibrate_info->kfree_offset[p] = 0;
+		cali_info->absolute_ofdm_swing_idx[p] = 0;    /* Initial Mix mode power tracking*/
+		cali_info->remnant_ofdm_swing_idx[p] = 0;
+		cali_info->kfree_offset[p] = 0;
 	}
 
-	p_rf_calibrate_info->modify_tx_agc_flag_path_a = false;       /*Initial at Modify Tx Scaling mode*/
-	p_rf_calibrate_info->modify_tx_agc_flag_path_b = false;       /*Initial at Modify Tx Scaling mode*/
-	p_rf_calibrate_info->modify_tx_agc_flag_path_c = false;       /*Initial at Modify Tx Scaling mode*/
-	p_rf_calibrate_info->modify_tx_agc_flag_path_d = false;       /*Initial at Modify Tx Scaling mode*/
-	p_rf_calibrate_info->remnant_cck_swing_idx = 0;
-	p_rf_calibrate_info->thermal_value = p_hal_data->eeprom_thermal_meter;
+	cali_info->modify_tx_agc_flag_path_a = false;       /*Initial at Modify Tx Scaling mode*/
+	cali_info->modify_tx_agc_flag_path_b = false;       /*Initial at Modify Tx Scaling mode*/
+	cali_info->modify_tx_agc_flag_path_c = false;       /*Initial at Modify Tx Scaling mode*/
+	cali_info->modify_tx_agc_flag_path_d = false;       /*Initial at Modify Tx Scaling mode*/
+	cali_info->remnant_cck_swing_idx = 0;
+	cali_info->thermal_value = hal_data->eeprom_thermal_meter;
 
-	p_rf_calibrate_info->modify_tx_agc_value_cck = 0;			/* modify by Mingzhi.Guo */
-	p_rf_calibrate_info->modify_tx_agc_value_ofdm = 0;		/* modify by Mingzhi.Guo */
+	cali_info->modify_tx_agc_value_cck = 0;			/* modify by Mingzhi.Guo */
+	cali_info->modify_tx_agc_value_ofdm = 0;		/* modify by Mingzhi.Guo */
 
 }
 
 void
 odm_txpowertracking_callback_thermal_meter(
 #if (DM_ODM_SUPPORT_TYPE & ODM_AP)
-	struct PHY_DM_STRUCT		*p_dm
+	struct dm_struct		*dm
 #else
-	struct _ADAPTER	*adapter
+	void	*adapter
 #endif
 )
 {
 #if !(DM_ODM_SUPPORT_TYPE & ODM_AP)
-	HAL_DATA_TYPE	*p_hal_data = GET_HAL_DATA(adapter);
+	HAL_DATA_TYPE	*hal_data = GET_HAL_DATA(((PADAPTER)adapter));
 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
-	struct PHY_DM_STRUCT		*p_dm = &p_hal_data->DM_OutSrc;
+	struct dm_struct		*dm = &hal_data->DM_OutSrc;
 #elif (DM_ODM_SUPPORT_TYPE == ODM_CE)
-	struct PHY_DM_STRUCT		*p_dm = &p_hal_data->odmpriv;
+	struct dm_struct		*dm = &hal_data->odmpriv;
 #endif
 #endif
 
-	struct odm_rf_calibration_structure	*p_rf_calibrate_info = &(p_dm->rf_calibrate_info);
- 	struct _IQK_INFORMATION	*p_iqk_info = &p_dm->IQK_info;
+	struct dm_rf_calibration_struct	*cali_info = &(dm->rf_calibrate_info);
+ 	struct dm_iqk_info	*iqk_info = &dm->IQK_info;
 	u8			thermal_value = 0, delta, delta_LCK, delta_IQK, p = 0, i = 0;
 	s8			diff_DPK[4] = {0};
 	u8			thermal_value_avg_count = 0;
-	u32			thermal_value_avg = 0, regc80, regcd0, regcd4, regab4;
+	u32			thermal_value_avg = 0, regc80, regcd0, regcd4, regab4, regc88, rege14, reg848,reg838, reg86c;
 
 	u8			OFDM_min_index = 0;  /* OFDM BB Swing should be less than +3.0dB, which is required by Arthur */
-	u8			indexforchannel = 0; /* get_right_chnl_place_for_iqk(p_hal_data->current_channel) */
-	u8			power_tracking_type = p_hal_data->RfPowerTrackingType;
+	u8			indexforchannel = 0; /* get_right_chnl_place_for_iqk(hal_data->current_channel) */
+	u8			power_tracking_type = hal_data->RfPowerTrackingType;
 	u8			xtal_offset_eanble = 0;
 	s8			thermal_value_temp = 0;
 
-	struct _TXPWRTRACK_CFG	c;
+	struct txpwrtrack_cfg	c;
 
 	/* 4 1. The following TWO tables decide the final index of OFDM/CCK swing table. */
 	u8			*delta_swing_table_idx_tup_a = NULL;
@@ -192,46 +202,46 @@ odm_txpowertracking_callback_thermal_meter(
 
 	/* 4 2. Initilization ( 7 steps in total ) */
 
-	configure_txpower_track(p_dm, &c);
+	configure_txpower_track(dm, &c);
 
-	(*c.get_delta_swing_table)(p_dm, (u8 **)&delta_swing_table_idx_tup_a, (u8 **)&delta_swing_table_idx_tdown_a,
+	(*c.get_delta_swing_table)(dm, (u8 **)&delta_swing_table_idx_tup_a, (u8 **)&delta_swing_table_idx_tdown_a,
 		(u8 **)&delta_swing_table_idx_tup_b, (u8 **)&delta_swing_table_idx_tdown_b);
 
-	if (p_dm->support_ic_type & ODM_RTL8814A)	/*for 8814 path C & D*/
-		(*c.get_delta_swing_table8814only)(p_dm, (u8 **)&delta_swing_table_idx_tup_c, (u8 **)&delta_swing_table_idx_tdown_c,
+	if (dm->support_ic_type & ODM_RTL8814A)	/*for 8814 path C & D*/
+		(*c.get_delta_swing_table8814only)(dm, (u8 **)&delta_swing_table_idx_tup_c, (u8 **)&delta_swing_table_idx_tdown_c,
 			(u8 **)&delta_swing_table_idx_tup_d, (u8 **)&delta_swing_table_idx_tdown_d);
 	/* JJ ADD 20161014 */
-	if (p_dm->support_ic_type & (ODM_RTL8703B | ODM_RTL8723D | ODM_RTL8710B))	/*for Xtal Offset*/
-		(*c.get_delta_swing_xtal_table)(p_dm, (s8 **)&delta_swing_table_xtal_up, (s8 **)&delta_swing_table_xtal_down);
+	if (dm->support_ic_type & (ODM_RTL8703B | ODM_RTL8723D | ODM_RTL8710B | ODM_RTL8192F))	/*for Xtal Offset*/
+		(*c.get_delta_swing_xtal_table)(dm, (s8 **)&delta_swing_table_xtal_up, (s8 **)&delta_swing_table_xtal_down);
 
 
-	p_rf_calibrate_info->txpowertracking_callback_cnt++;	/*cosa add for debug*/
-	p_rf_calibrate_info->is_txpowertracking_init = true;
+	cali_info->txpowertracking_callback_cnt++;	/*cosa add for debug*/
+	cali_info->is_txpowertracking_init = true;
 
-	/*p_rf_calibrate_info->txpowertrack_control = p_hal_data->txpowertrack_control;
+	/*cali_info->txpowertrack_control = hal_data->txpowertrack_control;
 	<Kordan> We should keep updating the control variable according to HalData.
 	<Kordan> rf_calibrate_info.rega24 will be initialized when ODM HW configuring, but MP configures with para files. */
 #if (DM_ODM_SUPPORT_TYPE & ODM_WIN)
 #if (MP_DRIVER == 1)
-	p_rf_calibrate_info->rega24 = 0x090e1317;
+	cali_info->rega24 = 0x090e1317;
 #endif
 #elif (DM_ODM_SUPPORT_TYPE & ODM_CE)
-	if (*(p_dm->p_mp_mode) == true)
-		p_rf_calibrate_info->rega24 = 0x090e1317;
+	if (*(dm->mp_mode) == true)
+		cali_info->rega24 = 0x090e1317;
 #endif
 
-	ODM_RT_TRACE(p_dm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,
-		("===>odm_txpowertracking_callback_thermal_meter\n p_rf_calibrate_info->bb_swing_idx_cck_base: %d, p_rf_calibrate_info->bb_swing_idx_ofdm_base[A]: %d, p_rf_calibrate_info->default_ofdm_index: %d\n",
-		p_rf_calibrate_info->bb_swing_idx_cck_base, p_rf_calibrate_info->bb_swing_idx_ofdm_base[RF_PATH_A], p_rf_calibrate_info->default_ofdm_index));
+	RF_DBG(dm, DBG_RF_TX_PWR_TRACK,
+		"===>odm_txpowertracking_callback_thermal_meter\n cali_info->bb_swing_idx_cck_base: %d, cali_info->bb_swing_idx_ofdm_base[A]: %d, cali_info->default_ofdm_index: %d\n",
+		cali_info->bb_swing_idx_cck_base, cali_info->bb_swing_idx_ofdm_base[RF_PATH_A], cali_info->default_ofdm_index);
 
-	ODM_RT_TRACE(p_dm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,
-		("p_rf_calibrate_info->txpowertrack_control=%d,  p_hal_data->eeprom_thermal_meter %d\n", p_rf_calibrate_info->txpowertrack_control,  p_hal_data->eeprom_thermal_meter));
-	thermal_value = (u8)odm_get_rf_reg(p_dm, RF_PATH_A, c.thermal_reg_addr, 0xfc00);	/* 0x42: RF Reg[15:10] 88E */
+	RF_DBG(dm, DBG_RF_TX_PWR_TRACK,
+		"cali_info->txpowertrack_control=%d,  hal_data->eeprom_thermal_meter %d\n", cali_info->txpowertrack_control,  hal_data->eeprom_thermal_meter);
+	thermal_value = (u8)odm_get_rf_reg(dm, RF_PATH_A, c.thermal_reg_addr, 0xfc00);	/* 0x42: RF Reg[15:10] 88E */
 
-	thermal_value_temp = thermal_value + phydm_get_thermal_offset(p_dm);
+	thermal_value_temp = thermal_value + phydm_get_thermal_offset(dm);
 
-	ODM_RT_TRACE(p_dm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,
-		("thermal_value_temp(%d) = thermal_value(%d) + power_time_thermal(%d)\n", thermal_value_temp, thermal_value, phydm_get_thermal_offset(p_dm)));
+	RF_DBG(dm, DBG_RF_TX_PWR_TRACK,
+		"thermal_value_temp(%d) = thermal_value(%d) + power_time_thermal(%d)\n", thermal_value_temp, thermal_value, phydm_get_thermal_offset(dm));
 
 	if (thermal_value_temp > 63)
 		thermal_value = 63;
@@ -241,102 +251,114 @@ odm_txpowertracking_callback_thermal_meter(
 		thermal_value = thermal_value_temp;
 
 	/*add log by zhao he, check c80/c94/c14/ca0 value*/
-	if (p_dm->support_ic_type == ODM_RTL8723D) {
-		regc80 = odm_get_bb_reg(p_dm, 0xc80, MASKDWORD);
-		regcd0 = odm_get_bb_reg(p_dm, 0xcd0, MASKDWORD);
-		regcd4 = odm_get_bb_reg(p_dm, 0xcd4, MASKDWORD);
-		regab4 = odm_get_bb_reg(p_dm, 0xab4, 0x000007FF);
-		ODM_RT_TRACE(p_dm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("0xc80 = 0x%x 0xcd0 = 0x%x 0xcd4 = 0x%x 0xab4 = 0x%x\n", regc80, regcd0, regcd4, regab4));
+	if (dm->support_ic_type == ODM_RTL8723D) {
+		regc80 = odm_get_bb_reg(dm, R_0xc80, MASKDWORD);
+		regcd0 = odm_get_bb_reg(dm, R_0xcd0, MASKDWORD);
+		regcd4 = odm_get_bb_reg(dm, R_0xcd4, MASKDWORD);
+		regab4 = odm_get_bb_reg(dm, R_0xab4, 0x000007FF);
+		RF_DBG(dm, DBG_RF_IQK, "0xc80 = 0x%x 0xcd0 = 0x%x 0xcd4 = 0x%x 0xab4 = 0x%x\n", regc80, regcd0, regcd4, regab4);
 	}
 
 	/* JJ ADD 20161014 */
-	if (p_dm->support_ic_type == ODM_RTL8710B) {
-		regc80 = odm_get_bb_reg(p_dm, 0xc80, MASKDWORD);
-		regcd0 = odm_get_bb_reg(p_dm, 0xcd0, MASKDWORD);
-		regcd4 = odm_get_bb_reg(p_dm, 0xcd4, MASKDWORD);
-		regab4 = odm_get_bb_reg(p_dm, 0xab4, 0x000007FF);
-		ODM_RT_TRACE(p_dm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("0xc80 = 0x%x 0xcd0 = 0x%x 0xcd4 = 0x%x 0xab4 = 0x%x\n", regc80, regcd0, regcd4, regab4));
+	if (dm->support_ic_type == ODM_RTL8710B) {
+		regc80 = odm_get_bb_reg(dm, R_0xc80, MASKDWORD);
+		regcd0 = odm_get_bb_reg(dm, R_0xcd0, MASKDWORD);
+		regcd4 = odm_get_bb_reg(dm, R_0xcd4, MASKDWORD);
+		regab4 = odm_get_bb_reg(dm, R_0xab4, 0x000007FF);
+		RF_DBG(dm, DBG_RF_IQK, "0xc80 = 0x%x 0xcd0 = 0x%x 0xcd4 = 0x%x 0xab4 = 0x%x\n", regc80, regcd0, regcd4, regab4);
+	}
+	/* Winnita add 20171205 */
+	if (dm->support_ic_type == ODM_RTL8192F) {
+		regc80 = odm_get_bb_reg(dm, R_0xc80, MASKDWORD);
+		regc88 = odm_get_bb_reg(dm, R_0xc88, MASKDWORD);
+		regab4 = odm_get_bb_reg(dm, R_0xab4, MASKDWORD);
+		rege14 = odm_get_bb_reg(dm, R_0xe14, MASKDWORD);
+		reg848 = odm_get_bb_reg(dm, R_0x848, MASKDWORD);
+		reg838 = odm_get_bb_reg(dm, R_0x838, MASKDWORD);
+		reg86c = odm_get_bb_reg(dm, R_0x86c, MASKDWORD);
+		RF_DBG(dm, DBG_RF_IQK, "0xc80 = 0x%x 0xc88 = 0x%x 0xab4 = 0x%x 0xe14 = 0x%x\n", regc80, regc88, regab4, rege14);
+		RF_DBG(dm, DBG_RF_IQK, "0x848 = 0x%x 0x838 = 0x%x 0x86c = 0x%x\n", reg848, reg838, reg86c);
 	}
 
-	if (!p_rf_calibrate_info->txpowertrack_control)
+	if (!cali_info->txpowertrack_control)
 		return;
 
-	if (p_hal_data->eeprom_thermal_meter == 0xff) {
-		ODM_RT_TRACE(p_dm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("no pg, p_hal_data->eeprom_thermal_meter = 0x%x\n", p_hal_data->eeprom_thermal_meter));
+	if (hal_data->eeprom_thermal_meter == 0xff) {
+		RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "no pg, hal_data->eeprom_thermal_meter = 0x%x\n", hal_data->eeprom_thermal_meter);
 		return;
 	}
 
 	/*4 3. Initialize ThermalValues of rf_calibrate_info*/
 
-	if (p_rf_calibrate_info->is_reloadtxpowerindex)
-		ODM_RT_TRACE(p_dm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("reload ofdm index for band switch\n"));
+	if (cali_info->is_reloadtxpowerindex)
+		RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "reload ofdm index for band switch\n");
 
 	/*4 4. Calculate average thermal meter*/
 
-	p_rf_calibrate_info->thermal_value_avg[p_rf_calibrate_info->thermal_value_avg_index] = thermal_value;
-	p_rf_calibrate_info->thermal_value_avg_index++;
-	if (p_rf_calibrate_info->thermal_value_avg_index == c.average_thermal_num)   /*Average times =  c.average_thermal_num*/
-		p_rf_calibrate_info->thermal_value_avg_index = 0;
+	cali_info->thermal_value_avg[cali_info->thermal_value_avg_index] = thermal_value;
+	cali_info->thermal_value_avg_index++;
+	if (cali_info->thermal_value_avg_index == c.average_thermal_num)   /*Average times =  c.average_thermal_num*/
+		cali_info->thermal_value_avg_index = 0;
 
 	for (i = 0; i < c.average_thermal_num; i++) {
-		if (p_rf_calibrate_info->thermal_value_avg[i]) {
-			thermal_value_avg += p_rf_calibrate_info->thermal_value_avg[i];
+		if (cali_info->thermal_value_avg[i]) {
+			thermal_value_avg += cali_info->thermal_value_avg[i];
 			thermal_value_avg_count++;
 		}
 	}
 
 	if (thermal_value_avg_count) {            /* Calculate Average thermal_value after average enough times */
 		thermal_value = (u8)(thermal_value_avg / thermal_value_avg_count);
-		p_rf_calibrate_info->thermal_value_delta = thermal_value - p_hal_data->eeprom_thermal_meter;
-		ODM_RT_TRACE(p_dm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,
-			("AVG Thermal Meter = 0x%X, EFUSE Thermal base = 0x%X\n", thermal_value, p_hal_data->eeprom_thermal_meter));
+		cali_info->thermal_value_delta = thermal_value - hal_data->eeprom_thermal_meter;
+		RF_DBG(dm, DBG_RF_TX_PWR_TRACK,
+			"AVG Thermal Meter = 0x%X, EFUSE Thermal base = 0x%X\n", thermal_value, hal_data->eeprom_thermal_meter);
 	}
 
 	/* 4 5. Calculate delta, delta_LCK, delta_IQK. */
 
 	/* "delta" here is used to determine whether thermal value changes or not. */
-	delta	= (thermal_value > p_rf_calibrate_info->thermal_value) ? (thermal_value - p_rf_calibrate_info->thermal_value) : (p_rf_calibrate_info->thermal_value - thermal_value);
-	delta_LCK = (thermal_value > p_rf_calibrate_info->thermal_value_lck) ? (thermal_value - p_rf_calibrate_info->thermal_value_lck) : (p_rf_calibrate_info->thermal_value_lck - thermal_value);
-	delta_IQK = (thermal_value > p_rf_calibrate_info->thermal_value_iqk) ? (thermal_value - p_rf_calibrate_info->thermal_value_iqk) : (p_rf_calibrate_info->thermal_value_iqk - thermal_value);
-
-	if (p_rf_calibrate_info->thermal_value_iqk == 0xff) {	/*no PG, use thermal value for IQK*/
-		p_rf_calibrate_info->thermal_value_iqk = thermal_value;
-		delta_IQK = (thermal_value > p_rf_calibrate_info->thermal_value_iqk) ? (thermal_value - p_rf_calibrate_info->thermal_value_iqk) : (p_rf_calibrate_info->thermal_value_iqk - thermal_value);
-		ODM_RT_TRACE(p_dm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("no PG, use thermal_value for IQK\n"));
+	delta	= (thermal_value > cali_info->thermal_value) ? (thermal_value - cali_info->thermal_value) : (cali_info->thermal_value - thermal_value);
+	delta_LCK = (thermal_value > cali_info->thermal_value_lck) ? (thermal_value - cali_info->thermal_value_lck) : (cali_info->thermal_value_lck - thermal_value);
+	delta_IQK = (thermal_value > cali_info->thermal_value_iqk) ? (thermal_value - cali_info->thermal_value_iqk) : (cali_info->thermal_value_iqk - thermal_value);
+
+	if (cali_info->thermal_value_iqk == 0xff) {	/*no PG, use thermal value for IQK*/
+		cali_info->thermal_value_iqk = thermal_value;
+		delta_IQK = (thermal_value > cali_info->thermal_value_iqk) ? (thermal_value - cali_info->thermal_value_iqk) : (cali_info->thermal_value_iqk - thermal_value);
+		RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "no PG, use thermal_value for IQK\n");
 	}
 
 	for (p = RF_PATH_A; p < c.rf_path_count; p++)
-		diff_DPK[p] = (s8)thermal_value - (s8)p_rf_calibrate_info->dpk_thermal[p];
+		diff_DPK[p] = (s8)thermal_value - (s8)cali_info->dpk_thermal[p];
 
 	/*4 6. If necessary, do LCK.*/
 
-	if (!(p_dm->support_ic_type & ODM_RTL8821)) {	/*no PG, do LCK at initial status*/
-		if (p_rf_calibrate_info->thermal_value_lck == 0xff) {
-			ODM_RT_TRACE(p_dm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("no PG, do LCK\n"));
-			p_rf_calibrate_info->thermal_value_lck = thermal_value;
+	if (!(dm->support_ic_type & ODM_RTL8821)) {	/*no PG, do LCK at initial status*/
+		if (cali_info->thermal_value_lck == 0xff) {
+			RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "no PG, do LCK\n");
+			cali_info->thermal_value_lck = thermal_value;
 
 			/*Use RTLCK, so close power tracking driver LCK*/
-			if ((!(p_dm->support_ic_type & ODM_RTL8814A)) && (!(p_dm->support_ic_type & ODM_RTL8822B))) {
+			if ((!(dm->support_ic_type & ODM_RTL8814A)) && (!(dm->support_ic_type & ODM_RTL8822B))) {
 				if (c.phy_lc_calibrate)
-					(*c.phy_lc_calibrate)(p_dm);
+					(*c.phy_lc_calibrate)(dm);
 			}
 
-			delta_LCK = (thermal_value > p_rf_calibrate_info->thermal_value_lck) ? (thermal_value - p_rf_calibrate_info->thermal_value_lck) : (p_rf_calibrate_info->thermal_value_lck - thermal_value);
+			delta_LCK = (thermal_value > cali_info->thermal_value_lck) ? (thermal_value - cali_info->thermal_value_lck) : (cali_info->thermal_value_lck - thermal_value);
 		}
 
-		ODM_RT_TRACE(p_dm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("(delta, delta_LCK, delta_IQK) = (%d, %d, %d)\n", delta, delta_LCK, delta_IQK));
+		RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "(delta, delta_LCK, delta_IQK) = (%d, %d, %d)\n", delta, delta_LCK, delta_IQK);
 
 		/* Wait sacn to do LCK by RF Jenyu*/
-		if( (*p_dm->p_is_scan_in_process == false) && (!p_iqk_info->rfk_forbidden)) {
+		if( (*dm->is_scan_in_process == false) && (!iqk_info->rfk_forbidden)) {
 			/* Delta temperature is equal to or larger than 20 centigrade.*/
 			if (delta_LCK >= c.threshold_iqk) {
-				ODM_RT_TRACE(p_dm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("delta_LCK(%d) >= threshold_iqk(%d)\n", delta_LCK, c.threshold_iqk));
-				p_rf_calibrate_info->thermal_value_lck = thermal_value;
+				RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "delta_LCK(%d) >= threshold_iqk(%d)\n", delta_LCK, c.threshold_iqk);
+				cali_info->thermal_value_lck = thermal_value;
 
 				/*Use RTLCK, so close power tracking driver LCK*/
-				if ((!(p_dm->support_ic_type & ODM_RTL8814A)) && (!(p_dm->support_ic_type & ODM_RTL8822B))) {
+				if ((!(dm->support_ic_type & ODM_RTL8814A)) && (!(dm->support_ic_type & ODM_RTL8822B))) {
 					if (c.phy_lc_calibrate)
-						(*c.phy_lc_calibrate)(p_dm);
+						(*c.phy_lc_calibrate)(dm);
 				}
 			}
 		}
@@ -344,12 +366,12 @@ odm_txpowertracking_callback_thermal_meter(
 
 	/*3 7. If necessary, move the index of swing table to adjust Tx power.*/
 
-	if (delta > 0 && p_rf_calibrate_info->txpowertrack_control) {
+	if (delta > 0 && cali_info->txpowertrack_control) {
 		/* "delta" here is used to record the absolute value of differrence. */
 #if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_CE))
-		delta = thermal_value > p_hal_data->eeprom_thermal_meter ? (thermal_value - p_hal_data->eeprom_thermal_meter) : (p_hal_data->eeprom_thermal_meter - thermal_value);
+		delta = thermal_value > hal_data->eeprom_thermal_meter ? (thermal_value - hal_data->eeprom_thermal_meter) : (hal_data->eeprom_thermal_meter - thermal_value);
 #else
-		delta = (thermal_value > p_dm->priv->pmib->dot11RFEntry.ther) ? (thermal_value - p_dm->priv->pmib->dot11RFEntry.ther) : (p_dm->priv->pmib->dot11RFEntry.ther - thermal_value);
+		delta = (thermal_value > dm->priv->pmib->dot11RFEntry.ther) ? (thermal_value - dm->priv->pmib->dot11RFEntry.ther) : (dm->priv->pmib->dot11RFEntry.ther - thermal_value);
 #endif
 		if (delta >= TXPWR_TRACK_TABLE_SIZE)
 			delta = TXPWR_TRACK_TABLE_SIZE - 1;
@@ -357,64 +379,64 @@ odm_txpowertracking_callback_thermal_meter(
 		/*4 7.1 The Final Power index = BaseIndex + power_index_offset*/
 
 #if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_CE))
-		if (thermal_value > p_hal_data->eeprom_thermal_meter) {
+		if (thermal_value > hal_data->eeprom_thermal_meter) {
 #else
-		if (thermal_value > p_dm->priv->pmib->dot11RFEntry.ther) {
+		if (thermal_value > dm->priv->pmib->dot11RFEntry.ther) {
 #endif
 
 			for (p = RF_PATH_A; p < c.rf_path_count; p++) {
-				p_rf_calibrate_info->delta_power_index_last[p] = p_rf_calibrate_info->delta_power_index[p];	/*recording poer index offset*/
+				cali_info->delta_power_index_last[p] = cali_info->delta_power_index[p];	/*recording poer index offset*/
 				switch (p) {
 				case RF_PATH_B:
-					ODM_RT_TRACE(p_dm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,
-						("delta_swing_table_idx_tup_b[%d] = %d\n", delta, delta_swing_table_idx_tup_b[delta]));
+					RF_DBG(dm, DBG_RF_TX_PWR_TRACK,
+						"delta_swing_table_idx_tup_b[%d] = %d\n", delta, delta_swing_table_idx_tup_b[delta]);
 
-					p_rf_calibrate_info->delta_power_index[p] = delta_swing_table_idx_tup_b[delta];
-					p_rf_calibrate_info->absolute_ofdm_swing_idx[p] =  delta_swing_table_idx_tup_b[delta];       /*Record delta swing for mix mode power tracking*/
-					ODM_RT_TRACE(p_dm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,
-						("******Temp is higher and p_rf_calibrate_info->absolute_ofdm_swing_idx[RF_PATH_B] = %d\n", p_rf_calibrate_info->absolute_ofdm_swing_idx[p]));
+					cali_info->delta_power_index[p] = delta_swing_table_idx_tup_b[delta];
+					cali_info->absolute_ofdm_swing_idx[p] =  delta_swing_table_idx_tup_b[delta];       /*Record delta swing for mix mode power tracking*/
+					RF_DBG(dm, DBG_RF_TX_PWR_TRACK,
+						"******Temp is higher and cali_info->absolute_ofdm_swing_idx[RF_PATH_B] = %d\n", cali_info->absolute_ofdm_swing_idx[p]);
 					break;
 
 				case RF_PATH_C:
-					ODM_RT_TRACE(p_dm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,
-						("delta_swing_table_idx_tup_c[%d] = %d\n", delta, delta_swing_table_idx_tup_c[delta]));
+					RF_DBG(dm, DBG_RF_TX_PWR_TRACK,
+						"delta_swing_table_idx_tup_c[%d] = %d\n", delta, delta_swing_table_idx_tup_c[delta]);
 
-					p_rf_calibrate_info->delta_power_index[p] = delta_swing_table_idx_tup_c[delta];
-					p_rf_calibrate_info->absolute_ofdm_swing_idx[p] =  delta_swing_table_idx_tup_c[delta];       /*Record delta swing for mix mode power tracking*/
-					ODM_RT_TRACE(p_dm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,
-						("******Temp is higher and p_rf_calibrate_info->absolute_ofdm_swing_idx[RF_PATH_C] = %d\n", p_rf_calibrate_info->absolute_ofdm_swing_idx[p]));
+					cali_info->delta_power_index[p] = delta_swing_table_idx_tup_c[delta];
+					cali_info->absolute_ofdm_swing_idx[p] =  delta_swing_table_idx_tup_c[delta];       /*Record delta swing for mix mode power tracking*/
+					RF_DBG(dm, DBG_RF_TX_PWR_TRACK,
+						"******Temp is higher and cali_info->absolute_ofdm_swing_idx[RF_PATH_C] = %d\n", cali_info->absolute_ofdm_swing_idx[p]);
 					break;
 
 				case RF_PATH_D:
-					ODM_RT_TRACE(p_dm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,
-						("delta_swing_table_idx_tup_d[%d] = %d\n", delta, delta_swing_table_idx_tup_d[delta]));
+					RF_DBG(dm, DBG_RF_TX_PWR_TRACK,
+						"delta_swing_table_idx_tup_d[%d] = %d\n", delta, delta_swing_table_idx_tup_d[delta]);
 
-					p_rf_calibrate_info->delta_power_index[p] = delta_swing_table_idx_tup_d[delta];
-					p_rf_calibrate_info->absolute_ofdm_swing_idx[p] =  delta_swing_table_idx_tup_d[delta];       /*Record delta swing for mix mode power tracking*/
-					ODM_RT_TRACE(p_dm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,
-						("******Temp is higher and p_rf_calibrate_info->absolute_ofdm_swing_idx[RF_PATH_D] = %d\n", p_rf_calibrate_info->absolute_ofdm_swing_idx[p]));
+					cali_info->delta_power_index[p] = delta_swing_table_idx_tup_d[delta];
+					cali_info->absolute_ofdm_swing_idx[p] =  delta_swing_table_idx_tup_d[delta];       /*Record delta swing for mix mode power tracking*/
+					RF_DBG(dm, DBG_RF_TX_PWR_TRACK,
+						"******Temp is higher and cali_info->absolute_ofdm_swing_idx[RF_PATH_D] = %d\n", cali_info->absolute_ofdm_swing_idx[p]);
 					break;
 
 				default:
-					ODM_RT_TRACE(p_dm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,
-						("delta_swing_table_idx_tup_a[%d] = %d\n", delta, delta_swing_table_idx_tup_a[delta]));
+					RF_DBG(dm, DBG_RF_TX_PWR_TRACK,
+						"delta_swing_table_idx_tup_a[%d] = %d\n", delta, delta_swing_table_idx_tup_a[delta]);
 
-					p_rf_calibrate_info->delta_power_index[p] = delta_swing_table_idx_tup_a[delta];
-					p_rf_calibrate_info->absolute_ofdm_swing_idx[p] =  delta_swing_table_idx_tup_a[delta];        /*Record delta swing for mix mode power tracking*/
-					ODM_RT_TRACE(p_dm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,
-						("******Temp is higher and p_rf_calibrate_info->absolute_ofdm_swing_idx[RF_PATH_A] = %d\n", p_rf_calibrate_info->absolute_ofdm_swing_idx[p]));
+					cali_info->delta_power_index[p] = delta_swing_table_idx_tup_a[delta];
+					cali_info->absolute_ofdm_swing_idx[p] =  delta_swing_table_idx_tup_a[delta];        /*Record delta swing for mix mode power tracking*/
+					RF_DBG(dm, DBG_RF_TX_PWR_TRACK,
+						"******Temp is higher and cali_info->absolute_ofdm_swing_idx[RF_PATH_A] = %d\n", cali_info->absolute_ofdm_swing_idx[p]);
 					break;
 				}
 			}
 			/* JJ ADD 20161014 */
-			if (p_dm->support_ic_type & (ODM_RTL8703B | ODM_RTL8723D | ODM_RTL8710B)) {
+			if (dm->support_ic_type & (ODM_RTL8703B | ODM_RTL8723D | ODM_RTL8710B | ODM_RTL8192F)) {
 				/*Save xtal_offset from Xtal table*/
-				p_rf_calibrate_info->xtal_offset_last = p_rf_calibrate_info->xtal_offset;	/*recording last Xtal offset*/
-				ODM_RT_TRACE(p_dm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,
-					("[Xtal] delta_swing_table_xtal_up[%d] = %d\n", delta, delta_swing_table_xtal_up[delta]));
-				p_rf_calibrate_info->xtal_offset = delta_swing_table_xtal_up[delta];
+				cali_info->xtal_offset_last = cali_info->xtal_offset;	/*recording last Xtal offset*/
+				RF_DBG(dm, DBG_RF_TX_PWR_TRACK,
+					"[Xtal] delta_swing_table_xtal_up[%d] = %d\n", delta, delta_swing_table_xtal_up[delta]);
+				cali_info->xtal_offset = delta_swing_table_xtal_up[delta];
 
-				if (p_rf_calibrate_info->xtal_offset_last == p_rf_calibrate_info->xtal_offset)
+				if (cali_info->xtal_offset_last == cali_info->xtal_offset)
 					xtal_offset_eanble = 0;
 				else
 					xtal_offset_eanble = 1;
@@ -422,55 +444,55 @@ odm_txpowertracking_callback_thermal_meter(
 
 		} else {
 			for (p = RF_PATH_A; p < c.rf_path_count; p++) {
-				p_rf_calibrate_info->delta_power_index_last[p] = p_rf_calibrate_info->delta_power_index[p];	/*recording poer index offset*/
+				cali_info->delta_power_index_last[p] = cali_info->delta_power_index[p];	/*recording poer index offset*/
 
 				switch (p) {
 				case RF_PATH_B:
-					ODM_RT_TRACE(p_dm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,
-						("delta_swing_table_idx_tdown_b[%d] = %d\n", delta, delta_swing_table_idx_tdown_b[delta]));
-					p_rf_calibrate_info->delta_power_index[p] = -1 * delta_swing_table_idx_tdown_b[delta];
-					p_rf_calibrate_info->absolute_ofdm_swing_idx[p] =  -1 * delta_swing_table_idx_tdown_b[delta];        /*Record delta swing for mix mode power tracking*/
-					ODM_RT_TRACE(p_dm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,
-						("******Temp is lower and p_rf_calibrate_info->absolute_ofdm_swing_idx[RF_PATH_B] = %d\n", p_rf_calibrate_info->absolute_ofdm_swing_idx[p]));
+					RF_DBG(dm, DBG_RF_TX_PWR_TRACK,
+						"delta_swing_table_idx_tdown_b[%d] = %d\n", delta, delta_swing_table_idx_tdown_b[delta]);
+					cali_info->delta_power_index[p] = -1 * delta_swing_table_idx_tdown_b[delta];
+					cali_info->absolute_ofdm_swing_idx[p] =  -1 * delta_swing_table_idx_tdown_b[delta];        /*Record delta swing for mix mode power tracking*/
+					RF_DBG(dm, DBG_RF_TX_PWR_TRACK,
+						"******Temp is lower and cali_info->absolute_ofdm_swing_idx[RF_PATH_B] = %d\n", cali_info->absolute_ofdm_swing_idx[p]);
 					break;
 
 				case RF_PATH_C:
-					ODM_RT_TRACE(p_dm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,
-						("delta_swing_table_idx_tdown_c[%d] = %d\n", delta, delta_swing_table_idx_tdown_c[delta]));
-					p_rf_calibrate_info->delta_power_index[p] = -1 * delta_swing_table_idx_tdown_c[delta];
-					p_rf_calibrate_info->absolute_ofdm_swing_idx[p] =  -1 * delta_swing_table_idx_tdown_c[delta];        /*Record delta swing for mix mode power tracking*/
-					ODM_RT_TRACE(p_dm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,
-						("******Temp is lower and p_rf_calibrate_info->absolute_ofdm_swing_idx[RF_PATH_C] = %d\n", p_rf_calibrate_info->absolute_ofdm_swing_idx[p]));
+					RF_DBG(dm, DBG_RF_TX_PWR_TRACK,
+						"delta_swing_table_idx_tdown_c[%d] = %d\n", delta, delta_swing_table_idx_tdown_c[delta]);
+					cali_info->delta_power_index[p] = -1 * delta_swing_table_idx_tdown_c[delta];
+					cali_info->absolute_ofdm_swing_idx[p] =  -1 * delta_swing_table_idx_tdown_c[delta];        /*Record delta swing for mix mode power tracking*/
+					RF_DBG(dm, DBG_RF_TX_PWR_TRACK,
+						"******Temp is lower and cali_info->absolute_ofdm_swing_idx[RF_PATH_C] = %d\n", cali_info->absolute_ofdm_swing_idx[p]);
 					break;
 
 				case RF_PATH_D:
-					ODM_RT_TRACE(p_dm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,
-						("delta_swing_table_idx_tdown_d[%d] = %d\n", delta, delta_swing_table_idx_tdown_d[delta]));
-					p_rf_calibrate_info->delta_power_index[p] = -1 * delta_swing_table_idx_tdown_d[delta];
-					p_rf_calibrate_info->absolute_ofdm_swing_idx[p] =  -1 * delta_swing_table_idx_tdown_d[delta];        /*Record delta swing for mix mode power tracking*/
-					ODM_RT_TRACE(p_dm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,
-						("******Temp is lower and p_rf_calibrate_info->absolute_ofdm_swing_idx[RF_PATH_D] = %d\n", p_rf_calibrate_info->absolute_ofdm_swing_idx[p]));
+					RF_DBG(dm, DBG_RF_TX_PWR_TRACK,
+						"delta_swing_table_idx_tdown_d[%d] = %d\n", delta, delta_swing_table_idx_tdown_d[delta]);
+					cali_info->delta_power_index[p] = -1 * delta_swing_table_idx_tdown_d[delta];
+					cali_info->absolute_ofdm_swing_idx[p] =  -1 * delta_swing_table_idx_tdown_d[delta];        /*Record delta swing for mix mode power tracking*/
+					RF_DBG(dm, DBG_RF_TX_PWR_TRACK,
+						"******Temp is lower and cali_info->absolute_ofdm_swing_idx[RF_PATH_D] = %d\n", cali_info->absolute_ofdm_swing_idx[p]);
 					break;
 
 				default:
-					ODM_RT_TRACE(p_dm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,
-						("delta_swing_table_idx_tdown_a[%d] = %d\n", delta, delta_swing_table_idx_tdown_a[delta]));
-					p_rf_calibrate_info->delta_power_index[p] = -1 * delta_swing_table_idx_tdown_a[delta];
-					p_rf_calibrate_info->absolute_ofdm_swing_idx[p] =  -1 * delta_swing_table_idx_tdown_a[delta];        /*Record delta swing for mix mode power tracking*/
-					ODM_RT_TRACE(p_dm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,
-						("******Temp is lower and p_rf_calibrate_info->absolute_ofdm_swing_idx[RF_PATH_A] = %d\n", p_rf_calibrate_info->absolute_ofdm_swing_idx[p]));
+					RF_DBG(dm, DBG_RF_TX_PWR_TRACK,
+						"delta_swing_table_idx_tdown_a[%d] = %d\n", delta, delta_swing_table_idx_tdown_a[delta]);
+					cali_info->delta_power_index[p] = -1 * delta_swing_table_idx_tdown_a[delta];
+					cali_info->absolute_ofdm_swing_idx[p] =  -1 * delta_swing_table_idx_tdown_a[delta];        /*Record delta swing for mix mode power tracking*/
+					RF_DBG(dm, DBG_RF_TX_PWR_TRACK,
+						"******Temp is lower and cali_info->absolute_ofdm_swing_idx[RF_PATH_A] = %d\n", cali_info->absolute_ofdm_swing_idx[p]);
 					break;
 				}
 			}
 			/* JJ ADD 20161014 */
-			if (p_dm->support_ic_type & (ODM_RTL8703B | ODM_RTL8723D | ODM_RTL8710B)) {
+			if (dm->support_ic_type & (ODM_RTL8703B | ODM_RTL8723D | ODM_RTL8710B | ODM_RTL8192F)) {
 				/*Save xtal_offset from Xtal table*/
-				p_rf_calibrate_info->xtal_offset_last = p_rf_calibrate_info->xtal_offset;	/*recording last Xtal offset*/
-				ODM_RT_TRACE(p_dm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,
-					("[Xtal] delta_swing_table_xtal_down[%d] = %d\n", delta, delta_swing_table_xtal_down[delta]));
-				p_rf_calibrate_info->xtal_offset = delta_swing_table_xtal_down[delta];
+				cali_info->xtal_offset_last = cali_info->xtal_offset;	/*recording last Xtal offset*/
+				RF_DBG(dm, DBG_RF_TX_PWR_TRACK,
+					"[Xtal] delta_swing_table_xtal_down[%d] = %d\n", delta, delta_swing_table_xtal_down[delta]);
+				cali_info->xtal_offset = delta_swing_table_xtal_down[delta];
 
-				if (p_rf_calibrate_info->xtal_offset_last == p_rf_calibrate_info->xtal_offset)
+				if (cali_info->xtal_offset_last == cali_info->xtal_offset)
 					xtal_offset_eanble = 0;
 				else
 					xtal_offset_eanble = 1;
@@ -479,244 +501,246 @@ odm_txpowertracking_callback_thermal_meter(
 		}
 
 		for (p = RF_PATH_A; p < c.rf_path_count; p++) {
-			ODM_RT_TRACE(p_dm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,
-				("\n\n=========================== [path-%d] Calculating power_index_offset===========================\n", p));
+			RF_DBG(dm, DBG_RF_TX_PWR_TRACK,
+				"\n\n=========================== [path-%d] Calculating power_index_offset===========================\n", p);
 
-			if (p_rf_calibrate_info->delta_power_index[p] == p_rf_calibrate_info->delta_power_index_last[p])         /*If Thermal value changes but lookup table value still the same*/
-				p_rf_calibrate_info->power_index_offset[p] = 0;
+			if (cali_info->delta_power_index[p] == cali_info->delta_power_index_last[p])         /*If Thermal value changes but lookup table value still the same*/
+				cali_info->power_index_offset[p] = 0;
 			else
-				p_rf_calibrate_info->power_index_offset[p] = p_rf_calibrate_info->delta_power_index[p] - p_rf_calibrate_info->delta_power_index_last[p];      /*Power index diff between 2 times Power Tracking*/
+				cali_info->power_index_offset[p] = cali_info->delta_power_index[p] - cali_info->delta_power_index_last[p];      /*Power index diff between 2 times Power Tracking*/
 
-			ODM_RT_TRACE(p_dm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,
-				("[path-%d] power_index_offset(%d) = delta_power_index(%d) - delta_power_index_last(%d)\n", p, p_rf_calibrate_info->power_index_offset[p], p_rf_calibrate_info->delta_power_index[p], p_rf_calibrate_info->delta_power_index_last[p]));
+			RF_DBG(dm, DBG_RF_TX_PWR_TRACK,
+				"[path-%d] power_index_offset(%d) = delta_power_index(%d) - delta_power_index_last(%d)\n", p, cali_info->power_index_offset[p], cali_info->delta_power_index[p], cali_info->delta_power_index_last[p]);
 
-			p_rf_calibrate_info->OFDM_index[p] = p_rf_calibrate_info->bb_swing_idx_ofdm_base[p] + p_rf_calibrate_info->power_index_offset[p];
-			p_rf_calibrate_info->CCK_index = p_rf_calibrate_info->bb_swing_idx_cck_base + p_rf_calibrate_info->power_index_offset[p];
+			cali_info->OFDM_index[p] = cali_info->bb_swing_idx_ofdm_base[p] + cali_info->power_index_offset[p];
+			cali_info->CCK_index = cali_info->bb_swing_idx_cck_base + cali_info->power_index_offset[p];
 
-			p_rf_calibrate_info->bb_swing_idx_cck = p_rf_calibrate_info->CCK_index;
-			p_rf_calibrate_info->bb_swing_idx_ofdm[p] = p_rf_calibrate_info->OFDM_index[p];
+			cali_info->bb_swing_idx_cck = cali_info->CCK_index;
+			cali_info->bb_swing_idx_ofdm[p] = cali_info->OFDM_index[p];
 
 			/*************Print BB Swing base and index Offset*************/
 
-			ODM_RT_TRACE(p_dm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,
-				("The 'CCK' final index(%d) = BaseIndex(%d) + power_index_offset(%d)\n", p_rf_calibrate_info->bb_swing_idx_cck, p_rf_calibrate_info->bb_swing_idx_cck_base, p_rf_calibrate_info->power_index_offset[p]));
-			ODM_RT_TRACE(p_dm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,
-				("The 'OFDM' final index(%d) = BaseIndex[%d](%d) + power_index_offset(%d)\n", p_rf_calibrate_info->bb_swing_idx_ofdm[p], p, p_rf_calibrate_info->bb_swing_idx_ofdm_base[p], p_rf_calibrate_info->power_index_offset[p]));
+			RF_DBG(dm, DBG_RF_TX_PWR_TRACK,
+				"The 'CCK' final index(%d) = BaseIndex(%d) + power_index_offset(%d)\n", cali_info->bb_swing_idx_cck, cali_info->bb_swing_idx_cck_base, cali_info->power_index_offset[p]);
+			RF_DBG(dm, DBG_RF_TX_PWR_TRACK,
+				"The 'OFDM' final index(%d) = BaseIndex[%d](%d) + power_index_offset(%d)\n", cali_info->bb_swing_idx_ofdm[p], p, cali_info->bb_swing_idx_ofdm_base[p], cali_info->power_index_offset[p]);
 
 			/*4 7.1 Handle boundary conditions of index.*/
 
-			if (p_rf_calibrate_info->OFDM_index[p] > c.swing_table_size_ofdm - 1)
-				p_rf_calibrate_info->OFDM_index[p] = c.swing_table_size_ofdm - 1;
-			else if (p_rf_calibrate_info->OFDM_index[p] <= OFDM_min_index)
-				p_rf_calibrate_info->OFDM_index[p] = OFDM_min_index;
+			if (cali_info->OFDM_index[p] > c.swing_table_size_ofdm - 1)
+				cali_info->OFDM_index[p] = c.swing_table_size_ofdm - 1;
+			else if (cali_info->OFDM_index[p] <= OFDM_min_index)
+				cali_info->OFDM_index[p] = OFDM_min_index;
 		}
 
-		ODM_RT_TRACE(p_dm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,
-			("\n\n========================================================================================================\n"));
+		RF_DBG(dm, DBG_RF_TX_PWR_TRACK,
+			"\n\n========================================================================================================\n");
 
-		if (p_rf_calibrate_info->CCK_index > c.swing_table_size_cck - 1)
-			p_rf_calibrate_info->CCK_index = c.swing_table_size_cck - 1;
-		else if (p_rf_calibrate_info->CCK_index <= 0)
-			p_rf_calibrate_info->CCK_index = 0;
+		if (cali_info->CCK_index > c.swing_table_size_cck - 1)
+			cali_info->CCK_index = c.swing_table_size_cck - 1;
+		else if (cali_info->CCK_index <= 0)
+			cali_info->CCK_index = 0;
 	} else {
-		ODM_RT_TRACE(p_dm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,
-			("The thermal meter is unchanged or TxPowerTracking OFF(%d): thermal_value: %d, p_rf_calibrate_info->thermal_value: %d\n",
-			p_rf_calibrate_info->txpowertrack_control, thermal_value, p_rf_calibrate_info->thermal_value));
+		RF_DBG(dm, DBG_RF_TX_PWR_TRACK,
+			"The thermal meter is unchanged or TxPowerTracking OFF(%d): thermal_value: %d, cali_info->thermal_value: %d\n",
+			cali_info->txpowertrack_control, thermal_value, cali_info->thermal_value);
 
 		for (p = RF_PATH_A; p < c.rf_path_count; p++)
-			p_rf_calibrate_info->power_index_offset[p] = 0;
+			cali_info->power_index_offset[p] = 0;
 	}
 
-	ODM_RT_TRACE(p_dm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,
-		("TxPowerTracking: [CCK] Swing Current index: %d, Swing base index: %d\n",
-		p_rf_calibrate_info->CCK_index, p_rf_calibrate_info->bb_swing_idx_cck_base));       /*Print Swing base & current*/
+	RF_DBG(dm, DBG_RF_TX_PWR_TRACK,
+		"TxPowerTracking: [CCK] Swing Current index: %d, Swing base index: %d\n",
+		cali_info->CCK_index, cali_info->bb_swing_idx_cck_base);       /*Print Swing base & current*/
 
 	for (p = RF_PATH_A; p < c.rf_path_count; p++) {
-		ODM_RT_TRACE(p_dm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,
-			("TxPowerTracking: [OFDM] Swing Current index: %d, Swing base index[%d]: %d\n",
-			p_rf_calibrate_info->OFDM_index[p], p, p_rf_calibrate_info->bb_swing_idx_ofdm_base[p]));
+		RF_DBG(dm, DBG_RF_TX_PWR_TRACK,
+			"TxPowerTracking: [OFDM] Swing Current index: %d, Swing base index[%d]: %d\n",
+			cali_info->OFDM_index[p], p, cali_info->bb_swing_idx_ofdm_base[p]);
 	}
 
-	if ((p_dm->support_ic_type & ODM_RTL8814A)) {
-		ODM_RT_TRACE(p_dm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("power_tracking_type=%d\n", power_tracking_type));
+	if ((dm->support_ic_type & ODM_RTL8814A)) {
+		RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "power_tracking_type=%d\n", power_tracking_type);
 
 		if (power_tracking_type == 0) {
-			ODM_RT_TRACE(p_dm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("**********Enter POWER Tracking MIX_MODE**********\n"));
+			RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "**********Enter POWER Tracking MIX_MODE**********\n");
 			for (p = RF_PATH_A; p < c.rf_path_count; p++)
-				(*c.odm_tx_pwr_track_set_pwr)(p_dm, MIX_MODE, p, 0);
+				(*c.odm_tx_pwr_track_set_pwr)(dm, MIX_MODE, p, 0);
 		} else if (power_tracking_type == 1) {
-			ODM_RT_TRACE(p_dm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("**********Enter POWER Tracking MIX(2G) TSSI(5G) MODE**********\n"));
+			RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "**********Enter POWER Tracking MIX(2G) TSSI(5G) MODE**********\n");
 			for (p = RF_PATH_A; p < c.rf_path_count; p++)
-				(*c.odm_tx_pwr_track_set_pwr)(p_dm, MIX_2G_TSSI_5G_MODE, p, 0);
+				(*c.odm_tx_pwr_track_set_pwr)(dm, MIX_2G_TSSI_5G_MODE, p, 0);
 		} else if (power_tracking_type == 2) {
-			ODM_RT_TRACE(p_dm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("**********Enter POWER Tracking MIX(5G) TSSI(2G)MODE**********\n"));
+			RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "**********Enter POWER Tracking MIX(5G) TSSI(2G)MODE**********\n");
 			for (p = RF_PATH_A; p < c.rf_path_count; p++)
-				(*c.odm_tx_pwr_track_set_pwr)(p_dm, MIX_5G_TSSI_2G_MODE, p, 0);
+				(*c.odm_tx_pwr_track_set_pwr)(dm, MIX_5G_TSSI_2G_MODE, p, 0);
 		} else if (power_tracking_type == 3) {
-			ODM_RT_TRACE(p_dm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("**********Enter POWER Tracking TSSI MODE**********\n"));
+			RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "**********Enter POWER Tracking TSSI MODE**********\n");
 			for (p = RF_PATH_A; p < c.rf_path_count; p++)
-				(*c.odm_tx_pwr_track_set_pwr)(p_dm, TSSI_MODE, p, 0);
+				(*c.odm_tx_pwr_track_set_pwr)(dm, TSSI_MODE, p, 0);
 		}
-		p_rf_calibrate_info->thermal_value = thermal_value;         /*Record last Power Tracking Thermal value*/
+		cali_info->thermal_value = thermal_value;         /*Record last Power Tracking Thermal value*/
 
-	} else if ((p_rf_calibrate_info->power_index_offset[RF_PATH_A] != 0 ||
-		p_rf_calibrate_info->power_index_offset[RF_PATH_B] != 0 ||
-		p_rf_calibrate_info->power_index_offset[RF_PATH_C] != 0 ||
-		p_rf_calibrate_info->power_index_offset[RF_PATH_D] != 0) &&
-		p_rf_calibrate_info->txpowertrack_control && (p_hal_data->eeprom_thermal_meter != 0xff)) {
+	} else if ((cali_info->power_index_offset[RF_PATH_A] != 0 ||
+		cali_info->power_index_offset[RF_PATH_B] != 0 ||
+		cali_info->power_index_offset[RF_PATH_C] != 0 ||
+		cali_info->power_index_offset[RF_PATH_D] != 0) &&
+		cali_info->txpowertrack_control && (hal_data->eeprom_thermal_meter != 0xff)) {
 		/* 4 7.2 Configure the Swing Table to adjust Tx Power. */
 
-		p_rf_calibrate_info->is_tx_power_changed = true;	/*Always true after Tx Power is adjusted by power tracking.*/
+		cali_info->is_tx_power_changed = true;	/*Always true after Tx Power is adjusted by power tracking.*/
 		/*  */
 		/* 2012/04/23 MH According to Luke's suggestion, we can not write BB digital */
 		/* to increase TX power. Otherwise, EVM will be bad. */
 		/*  */
 		/* 2012/04/25 MH Add for tx power tracking to set tx power in tx agc for 88E. */
-		if (thermal_value > p_rf_calibrate_info->thermal_value) {
+		if (thermal_value > cali_info->thermal_value) {
 			for (p = RF_PATH_A; p < c.rf_path_count; p++) {
-				ODM_RT_TRACE(p_dm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,
-					("Temperature Increasing(%d): delta_pi: %d, delta_t: %d, Now_t: %d, EFUSE_t: %d, Last_t: %d\n",
-					p, p_rf_calibrate_info->power_index_offset[p], delta, thermal_value, p_hal_data->eeprom_thermal_meter, p_rf_calibrate_info->thermal_value));
+				RF_DBG(dm, DBG_RF_TX_PWR_TRACK,
+					"Temperature Increasing(%d): delta_pi: %d, delta_t: %d, Now_t: %d, EFUSE_t: %d, Last_t: %d\n",
+					p, cali_info->power_index_offset[p], delta, thermal_value, hal_data->eeprom_thermal_meter, cali_info->thermal_value);
 			}
-		} else if (thermal_value < p_rf_calibrate_info->thermal_value) {	/*Low temperature*/
+		} else if (thermal_value < cali_info->thermal_value) {	/*Low temperature*/
 			for (p = RF_PATH_A; p < c.rf_path_count; p++) {
-				ODM_RT_TRACE(p_dm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,
-					("Temperature Decreasing(%d): delta_pi: %d, delta_t: %d, Now_t: %d, EFUSE_t: %d, Last_t: %d\n",
-					p, p_rf_calibrate_info->power_index_offset[p], delta, thermal_value, p_hal_data->eeprom_thermal_meter, p_rf_calibrate_info->thermal_value));
+				RF_DBG(dm, DBG_RF_TX_PWR_TRACK,
+					"Temperature Decreasing(%d): delta_pi: %d, delta_t: %d, Now_t: %d, EFUSE_t: %d, Last_t: %d\n",
+					p, cali_info->power_index_offset[p], delta, thermal_value, hal_data->eeprom_thermal_meter, cali_info->thermal_value);
 			}
 		}
 
 #if !(DM_ODM_SUPPORT_TYPE & ODM_AP)
-		if (thermal_value > p_hal_data->eeprom_thermal_meter)
+		if (thermal_value > hal_data->eeprom_thermal_meter)
 #else
-		if (thermal_value > p_dm->priv->pmib->dot11RFEntry.ther)
+		if (thermal_value > dm->priv->pmib->dot11RFEntry.ther)
 #endif
 		{
-			ODM_RT_TRACE(p_dm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,
-				("Temperature(%d) higher than PG value(%d)\n", thermal_value, p_hal_data->eeprom_thermal_meter));
+			RF_DBG(dm, DBG_RF_TX_PWR_TRACK,
+				"Temperature(%d) higher than PG value(%d)\n", thermal_value, hal_data->eeprom_thermal_meter);
 
-			if (p_dm->support_ic_type == ODM_RTL8188E || p_dm->support_ic_type == ODM_RTL8192E || p_dm->support_ic_type == ODM_RTL8821 ||
-			    p_dm->support_ic_type == ODM_RTL8812 || p_dm->support_ic_type == ODM_RTL8723B || p_dm->support_ic_type == ODM_RTL8814A ||
-			    p_dm->support_ic_type == ODM_RTL8703B || p_dm->support_ic_type == ODM_RTL8188F || p_dm->support_ic_type == ODM_RTL8822B ||
-			    p_dm->support_ic_type == ODM_RTL8723D || p_dm->support_ic_type == ODM_RTL8821C || p_dm->support_ic_type == ODM_RTL8710B) {/* JJ ADD 20161014 */
+			if (dm->support_ic_type == ODM_RTL8188E || dm->support_ic_type == ODM_RTL8192E || dm->support_ic_type == ODM_RTL8821 ||
+			    dm->support_ic_type == ODM_RTL8812 || dm->support_ic_type == ODM_RTL8723B || dm->support_ic_type == ODM_RTL8814A ||
+			    dm->support_ic_type == ODM_RTL8703B || dm->support_ic_type == ODM_RTL8188F || dm->support_ic_type == ODM_RTL8822B ||
+			    dm->support_ic_type == ODM_RTL8723D || dm->support_ic_type == ODM_RTL8821C || dm->support_ic_type == ODM_RTL8710B ||
+			    dm->support_ic_type == ODM_RTL8192F) {
 
-				ODM_RT_TRACE(p_dm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("**********Enter POWER Tracking MIX_MODE**********\n"));
+				RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "**********Enter POWER Tracking MIX_MODE**********\n");
 				for (p = RF_PATH_A; p < c.rf_path_count; p++)
-					(*c.odm_tx_pwr_track_set_pwr)(p_dm, MIX_MODE, p, 0);
+					(*c.odm_tx_pwr_track_set_pwr)(dm, MIX_MODE, p, 0);
 			} else {
-				ODM_RT_TRACE(p_dm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("**********Enter POWER Tracking BBSWING_MODE**********\n"));
+				RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "**********Enter POWER Tracking BBSWING_MODE**********\n");
 				for (p = RF_PATH_A; p < c.rf_path_count; p++)
-					(*c.odm_tx_pwr_track_set_pwr)(p_dm, BBSWING, p, indexforchannel);
+					(*c.odm_tx_pwr_track_set_pwr)(dm, BBSWING, p, indexforchannel);
 			}
 		} else {
-			ODM_RT_TRACE(p_dm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,
-				("Temperature(%d) lower than PG value(%d)\n", thermal_value, p_hal_data->eeprom_thermal_meter));
-
-			if (p_dm->support_ic_type == ODM_RTL8188E || p_dm->support_ic_type == ODM_RTL8192E || p_dm->support_ic_type == ODM_RTL8821 ||
-			    p_dm->support_ic_type == ODM_RTL8812 || p_dm->support_ic_type == ODM_RTL8723B || p_dm->support_ic_type == ODM_RTL8814A ||
-			    p_dm->support_ic_type == ODM_RTL8703B || p_dm->support_ic_type == ODM_RTL8188F || p_dm->support_ic_type == ODM_RTL8822B ||
-			    p_dm->support_ic_type == ODM_RTL8723D || p_dm->support_ic_type == ODM_RTL8821C || p_dm->support_ic_type == ODM_RTL8710B) {/* JJ ADD 20161014 */
-
-				ODM_RT_TRACE(p_dm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("**********Enter POWER Tracking MIX_MODE**********\n"));
+			RF_DBG(dm, DBG_RF_TX_PWR_TRACK,
+				"Temperature(%d) lower than PG value(%d)\n", thermal_value, hal_data->eeprom_thermal_meter);
+
+			if (dm->support_ic_type == ODM_RTL8188E || dm->support_ic_type == ODM_RTL8192E || dm->support_ic_type == ODM_RTL8821 ||
+			    dm->support_ic_type == ODM_RTL8812 || dm->support_ic_type == ODM_RTL8723B || dm->support_ic_type == ODM_RTL8814A ||
+			    dm->support_ic_type == ODM_RTL8703B || dm->support_ic_type == ODM_RTL8188F || dm->support_ic_type == ODM_RTL8822B ||
+			    dm->support_ic_type == ODM_RTL8723D || dm->support_ic_type == ODM_RTL8821C || dm->support_ic_type == ODM_RTL8710B ||
+				dm->support_ic_type == ODM_RTL8192F) {
+				RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "**********Enter POWER Tracking MIX_MODE**********\n");
 				for (p = RF_PATH_A; p < c.rf_path_count; p++)
-					(*c.odm_tx_pwr_track_set_pwr)(p_dm, MIX_MODE, p, indexforchannel);
+					(*c.odm_tx_pwr_track_set_pwr)(dm, MIX_MODE, p, indexforchannel);
 			} else {
-				ODM_RT_TRACE(p_dm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("**********Enter POWER Tracking BBSWING_MODE**********\n"));
+				RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "**********Enter POWER Tracking BBSWING_MODE**********\n");
 				for (p = RF_PATH_A; p < c.rf_path_count; p++)
-					(*c.odm_tx_pwr_track_set_pwr)(p_dm, BBSWING, p, indexforchannel);
+					(*c.odm_tx_pwr_track_set_pwr)(dm, BBSWING, p, indexforchannel);
 			}
 
 		}
 
-		p_rf_calibrate_info->bb_swing_idx_cck_base = p_rf_calibrate_info->bb_swing_idx_cck;    /*Record last time Power Tracking result as base.*/
+		cali_info->bb_swing_idx_cck_base = cali_info->bb_swing_idx_cck;    /*Record last time Power Tracking result as base.*/
 		for (p = RF_PATH_A; p < c.rf_path_count; p++)
-			p_rf_calibrate_info->bb_swing_idx_ofdm_base[p] = p_rf_calibrate_info->bb_swing_idx_ofdm[p];
+			cali_info->bb_swing_idx_ofdm_base[p] = cali_info->bb_swing_idx_ofdm[p];
 
-		ODM_RT_TRACE(p_dm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,
-			("p_rf_calibrate_info->thermal_value = %d thermal_value= %d\n", p_rf_calibrate_info->thermal_value, thermal_value));
+		RF_DBG(dm, DBG_RF_TX_PWR_TRACK,
+			"cali_info->thermal_value = %d thermal_value= %d\n", cali_info->thermal_value, thermal_value);
 
-		p_rf_calibrate_info->thermal_value = thermal_value;         /*Record last Power Tracking Thermal value*/
+		cali_info->thermal_value = thermal_value;         /*Record last Power Tracking Thermal value*/
 
 	}
 
 
-	if (p_dm->support_ic_type == ODM_RTL8703B || p_dm->support_ic_type == ODM_RTL8723D || p_dm->support_ic_type == ODM_RTL8710B) {/* JJ ADD 20161014 */
+	if (dm->support_ic_type == ODM_RTL8703B || dm->support_ic_type == ODM_RTL8723D ||
+		dm->support_ic_type == ODM_RTL8192F || dm->support_ic_type == ODM_RTL8710B) {/* JJ ADD 20161014 */
 
-		if (xtal_offset_eanble != 0 && p_rf_calibrate_info->txpowertrack_control && (p_hal_data->eeprom_thermal_meter != 0xff)) {
+		if (xtal_offset_eanble != 0 && cali_info->txpowertrack_control && (hal_data->eeprom_thermal_meter != 0xff)) {
 
-			ODM_RT_TRACE(p_dm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("**********Enter Xtal Tracking**********\n"));
+			RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "**********Enter Xtal Tracking**********\n");
 
 #if !(DM_ODM_SUPPORT_TYPE & ODM_AP)
-			if (thermal_value > p_hal_data->eeprom_thermal_meter) {
+			if (thermal_value > hal_data->eeprom_thermal_meter) {
 #else
-			if (thermal_value > p_dm->priv->pmib->dot11RFEntry.ther) {
+			if (thermal_value > dm->priv->pmib->dot11RFEntry.ther) {
 #endif
-				ODM_RT_TRACE(p_dm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,
-					("Temperature(%d) higher than PG value(%d)\n", thermal_value, p_hal_data->eeprom_thermal_meter));
-				(*c.odm_txxtaltrack_set_xtal)(p_dm);
+				RF_DBG(dm, DBG_RF_TX_PWR_TRACK,
+					"Temperature(%d) higher than PG value(%d)\n", thermal_value, hal_data->eeprom_thermal_meter);
+				(*c.odm_txxtaltrack_set_xtal)(dm);
 			} else {
-				ODM_RT_TRACE(p_dm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,
-					("Temperature(%d) lower than PG value(%d)\n", thermal_value, p_hal_data->eeprom_thermal_meter));
-				(*c.odm_txxtaltrack_set_xtal)(p_dm);
+				RF_DBG(dm, DBG_RF_TX_PWR_TRACK,
+					"Temperature(%d) lower than PG value(%d)\n", thermal_value, hal_data->eeprom_thermal_meter);
+				(*c.odm_txxtaltrack_set_xtal)(dm);
 			}
 		}
-		ODM_RT_TRACE(p_dm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("**********End Xtal Tracking**********\n"));
+		RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "**********End Xtal Tracking**********\n");
 	}
 
 #if !(DM_ODM_SUPPORT_TYPE & ODM_AP)
 
 	/* Wait sacn to do IQK by RF Jenyu*/
-	if ((*p_dm->p_is_scan_in_process == false) && (!p_iqk_info->rfk_forbidden)) {
+	if ((*dm->is_scan_in_process == false) && (!iqk_info->rfk_forbidden)) {
 		if (!IS_HARDWARE_TYPE_8723B(adapter)) {
 			/*Delta temperature is equal to or larger than 20 centigrade (When threshold is 8).*/
 			if (delta_IQK >= c.threshold_iqk) {
-				p_rf_calibrate_info->thermal_value_iqk = thermal_value;
-				ODM_RT_TRACE(p_dm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("delta_IQK(%d) >= threshold_iqk(%d)\n", delta_IQK, c.threshold_iqk));
-				if (!p_rf_calibrate_info->is_iqk_in_progress)
-					(*c.do_iqk)(p_dm, delta_IQK, thermal_value, 8);
+				cali_info->thermal_value_iqk = thermal_value;
+				RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "delta_IQK(%d) >= threshold_iqk(%d)\n", delta_IQK, c.threshold_iqk);
+				if (!cali_info->is_iqk_in_progress)
+					(*c.do_iqk)(dm, delta_IQK, thermal_value, 8);
 			}
 		}
 	}
-	if (p_rf_calibrate_info->dpk_thermal[RF_PATH_A] != 0) {
+	if (cali_info->dpk_thermal[RF_PATH_A] != 0) {
 		if (diff_DPK[RF_PATH_A] >= c.threshold_dpk) {
-			odm_set_bb_reg(p_dm, 0x82c, BIT(31), 0x1);
-			odm_set_bb_reg(p_dm, 0xcc4, BIT(14) | BIT(13) | BIT(12) | BIT(11) | BIT(10), (diff_DPK[RF_PATH_A] / c.threshold_dpk));
-			odm_set_bb_reg(p_dm, 0x82c, BIT(31), 0x0);
+			odm_set_bb_reg(dm, R_0x82c, BIT(31), 0x1);
+			odm_set_bb_reg(dm, R_0xcc4, BIT(14) | BIT(13) | BIT(12) | BIT(11) | BIT(10), (diff_DPK[RF_PATH_A] / c.threshold_dpk));
+			odm_set_bb_reg(dm, R_0x82c, BIT(31), 0x0);
 		} else if ((diff_DPK[RF_PATH_A] <= -1 * c.threshold_dpk)) {
 			s32 value = 0x20 + (diff_DPK[RF_PATH_A] / c.threshold_dpk);
 
-			odm_set_bb_reg(p_dm, 0x82c, BIT(31), 0x1);
-			odm_set_bb_reg(p_dm, 0xcc4, BIT(14) | BIT(13) | BIT(12) | BIT(11) | BIT(10), value);
-			odm_set_bb_reg(p_dm, 0x82c, BIT(31), 0x0);
+			odm_set_bb_reg(dm, R_0x82c, BIT(31), 0x1);
+			odm_set_bb_reg(dm, R_0xcc4, BIT(14) | BIT(13) | BIT(12) | BIT(11) | BIT(10), value);
+			odm_set_bb_reg(dm, R_0x82c, BIT(31), 0x0);
 		} else {
-			odm_set_bb_reg(p_dm, 0x82c, BIT(31), 0x1);
-			odm_set_bb_reg(p_dm, 0xcc4, BIT(14) | BIT(13) | BIT(12) | BIT(11) | BIT(10), 0);
-			odm_set_bb_reg(p_dm, 0x82c, BIT(31), 0x0);
+			odm_set_bb_reg(dm, R_0x82c, BIT(31), 0x1);
+			odm_set_bb_reg(dm, R_0xcc4, BIT(14) | BIT(13) | BIT(12) | BIT(11) | BIT(10), 0);
+			odm_set_bb_reg(dm, R_0x82c, BIT(31), 0x0);
 		}
 	}
-	if (p_rf_calibrate_info->dpk_thermal[RF_PATH_B] != 0) {
+	if (cali_info->dpk_thermal[RF_PATH_B] != 0) {
 		if (diff_DPK[RF_PATH_B] >= c.threshold_dpk) {
-			odm_set_bb_reg(p_dm, 0x82c, BIT(31), 0x1);
-			odm_set_bb_reg(p_dm, 0xec4, BIT(14) | BIT(13) | BIT(12) | BIT(11) | BIT(10), (diff_DPK[RF_PATH_B] / c.threshold_dpk));
-			odm_set_bb_reg(p_dm, 0x82c, BIT(31), 0x0);
+			odm_set_bb_reg(dm, R_0x82c, BIT(31), 0x1);
+			odm_set_bb_reg(dm, R_0xec4, BIT(14) | BIT(13) | BIT(12) | BIT(11) | BIT(10), (diff_DPK[RF_PATH_B] / c.threshold_dpk));
+			odm_set_bb_reg(dm, R_0x82c, BIT(31), 0x0);
 		} else if ((diff_DPK[RF_PATH_B] <= -1 * c.threshold_dpk)) {
 			s32 value = 0x20 + (diff_DPK[RF_PATH_B] / c.threshold_dpk);
 
-			odm_set_bb_reg(p_dm, 0x82c, BIT(31), 0x1);
-			odm_set_bb_reg(p_dm, 0xec4, BIT(14) | BIT(13) | BIT(12) | BIT(11) | BIT(10), value);
-			odm_set_bb_reg(p_dm, 0x82c, BIT(31), 0x0);
+			odm_set_bb_reg(dm, R_0x82c, BIT(31), 0x1);
+			odm_set_bb_reg(dm, R_0xec4, BIT(14) | BIT(13) | BIT(12) | BIT(11) | BIT(10), value);
+			odm_set_bb_reg(dm, R_0x82c, BIT(31), 0x0);
 		} else {
-			odm_set_bb_reg(p_dm, 0x82c, BIT(31), 0x1);
-			odm_set_bb_reg(p_dm, 0xec4, BIT(14) | BIT(13) | BIT(12) | BIT(11) | BIT(10), 0);
-			odm_set_bb_reg(p_dm, 0x82c, BIT(31), 0x0);
+			odm_set_bb_reg(dm, R_0x82c, BIT(31), 0x1);
+			odm_set_bb_reg(dm, R_0xec4, BIT(14) | BIT(13) | BIT(12) | BIT(11) | BIT(10), 0);
+			odm_set_bb_reg(dm, R_0x82c, BIT(31), 0x0);
 		}
 	}
 
 #endif
 
-	ODM_RT_TRACE(p_dm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("<===odm_txpowertracking_callback_thermal_meter\n"));
+	RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "<===odm_txpowertracking_callback_thermal_meter\n");
 
-	p_rf_calibrate_info->tx_powercount = 0;
+	cali_info->tx_powercount = 0;
 }
 
 
@@ -727,7 +751,7 @@ odm_txpowertracking_callback_thermal_meter(
 
 void
 odm_reset_iqk_result(
-	struct PHY_DM_STRUCT	*p_dm
+	struct dm_struct	*dm
 )
 {
 	return;
@@ -754,64 +778,64 @@ u8 odm_get_right_chnl_place_for_iqk(u8 chnl)
 
 void
 odm_iq_calibrate(
-	struct PHY_DM_STRUCT	*p_dm
+	struct dm_struct	*dm
 )
 {
-	struct _ADAPTER	*adapter = p_dm->adapter;
-	struct _IQK_INFORMATION	*p_iqk_info = &p_dm->IQK_info;
+	void	*adapter = dm->adapter;
+	struct dm_iqk_info	*iqk_info = &dm->IQK_info;
 	
-	RT_TRACE(COMP_SCAN, ODM_DBG_LOUD, ("=>%s\n" , __FUNCTION__));
+	RF_DBG(dm, DBG_RF_IQK, "=>%s\n",__FUNCTION__);
 
 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
-	if (*p_dm->p_is_fcs_mode_enable)
+	if (*dm->is_fcs_mode_enable)
 		return;
 #endif
 
-	if ((p_dm->is_linked) && (!p_iqk_info->rfk_forbidden)) {
-		RT_TRACE(COMP_SCAN, ODM_DBG_LOUD, ("interval=%d ch=%d prech=%d scan=%s\n", p_dm->linked_interval,
-			*p_dm->p_channel,  p_dm->pre_channel, *p_dm->p_is_scan_in_process == TRUE ? "TRUE":"FALSE"));
+	if ((dm->is_linked) && (!iqk_info->rfk_forbidden)) {
+		RF_DBG(dm, DBG_RF_IQK, "interval=%d ch=%d prech=%d scan=%s\n", dm->linked_interval,
+		       *dm->channel,  dm->pre_channel, *dm->is_scan_in_process == TRUE ? "TRUE":"FALSE");
 
-		if (*p_dm->p_channel != p_dm->pre_channel) {
-			p_dm->pre_channel = *p_dm->p_channel;
-			p_dm->linked_interval = 0;
+		if (*dm->channel != dm->pre_channel) {
+			dm->pre_channel = *dm->channel;
+			dm->linked_interval = 0;
 		}
 
-		if ((p_dm->linked_interval < 3) && (!*p_dm->p_is_scan_in_process))
-			p_dm->linked_interval++;
+		if ((dm->linked_interval < 3) && (!*dm->is_scan_in_process))
+			dm->linked_interval++;
 
-		if (p_dm->linked_interval == 2)
+		if (dm->linked_interval == 2)
 			PHY_IQCalibrate(adapter, false);
 	} else
-		p_dm->linked_interval = 0;
+		dm->linked_interval = 0;
 
-		RT_TRACE(COMP_SCAN, ODM_DBG_LOUD, ("<=%s interval=%d ch=%d prech=%d scan=%s\n", __FUNCTION__, p_dm->linked_interval,
-			*p_dm->p_channel,  p_dm->pre_channel, *p_dm->p_is_scan_in_process == TRUE?"TRUE":"FALSE"));
+		RF_DBG(dm, DBG_RF_IQK, "<=%s interval=%d ch=%d prech=%d scan=%s\n", __FUNCTION__, dm->linked_interval,
+			*dm->channel,  dm->pre_channel, *dm->is_scan_in_process == TRUE?"TRUE":"FALSE");
 }
 
-void phydm_rf_init(struct PHY_DM_STRUCT		*p_dm)
+void phydm_rf_init(struct dm_struct		*dm)
 {
 
-	odm_txpowertracking_init(p_dm);
+	odm_txpowertracking_init(dm);
 
 #if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_CE))
-	odm_clear_txpowertracking_state(p_dm);
+	odm_clear_txpowertracking_state(dm);
 #endif
 
 #if (DM_ODM_SUPPORT_TYPE & (ODM_AP))
 #if (RTL8814A_SUPPORT == 1)
-	if (p_dm->support_ic_type & ODM_RTL8814A)
-		phy_iq_calibrate_8814a_init(p_dm);
+	if (dm->support_ic_type & ODM_RTL8814A)
+		phy_iq_calibrate_8814a_init(dm);
 #endif
 #endif
 
 }
 
-void phydm_rf_watchdog(struct PHY_DM_STRUCT		*p_dm)
+void phydm_rf_watchdog(struct dm_struct		*dm)
 {
 
 #if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_CE))
-	odm_txpowertracking_check(p_dm);
-	if (p_dm->support_ic_type & ODM_IC_11AC_SERIES)
-		odm_iq_calibrate(p_dm);
+	odm_txpowertracking_check(dm);
+	if (dm->support_ic_type & ODM_IC_11AC_SERIES)
+		odm_iq_calibrate(dm);
 #endif
 }
diff --git a/rtl8723DS/hal/phydm/halrf/halphyrf_win.h b/rtl8723DS/hal/phydm/halrf/halphyrf_win.h
index bb6f255..873948d 100755..100644
--- a/rtl8723DS/hal/phydm/halrf/halphyrf_win.h
+++ b/rtl8723DS/hal/phydm/halrf/halphyrf_win.h
@@ -13,8 +13,8 @@
  *
  *****************************************************************************/
 
-#ifndef __HAL_PHY_RF_H__
-#define __HAL_PHY_RF_H__
+#ifndef __HALPHYRF_H__
+#define __HALPHYRF_H__
 
 #if (RTL8814A_SUPPORT == 1)
 	#include "halrf/rtl8814a/halrf_iqk_8814a.h"
@@ -31,6 +31,17 @@
 	#include "halrf/rtl8821c/halrf_iqk_8821c.h"
 #endif
 
+#if (RTL8195B_SUPPORT == 1)
+//	#include "halrf/rtl8195b/halrf.h"
+	#include "halrf/rtl8195b/halrf_iqk_8195b.h"
+	#include "halrf/rtl8195b/halrf_txgapk_8195b.h"
+	#include "halrf/rtl8195b/halrf_dpk_8195b.h"
+#endif
+
+#if (RTL8814B_SUPPORT == 1)
+	#include "halrf/rtl8814b/halrf_iqk_8814b.h"
+#endif
+
 enum spur_cal_method {
 	PLL_RESET,
 	AFE_PHASE_SEL
@@ -54,7 +65,7 @@ typedef void (*func_swing_xtal)(void *, s8 **, s8 **);
 typedef void (*func_set_xtal)(void *);
 typedef void(*func_all_swing)(void *, u8 **, u8 **, u8 **, u8 **, u8 **, u8 **, u8 **, u8 **);
 
-struct _TXPWRTRACK_CFG {
+struct txpwrtrack_cfg {
 	u8		swing_table_size_cck;
 	u8		swing_table_size_ofdm;
 	u8		threshold_iqk;
@@ -74,22 +85,22 @@ struct _TXPWRTRACK_CFG {
 
 void
 configure_txpower_track(
-	struct PHY_DM_STRUCT		*p_dm,
-	struct _TXPWRTRACK_CFG	*p_config
+	struct dm_struct		*dm,
+	struct txpwrtrack_cfg	*config
 );
 
 
 void
 odm_clear_txpowertracking_state(
-	struct PHY_DM_STRUCT		*p_dm
+	struct dm_struct		*dm
 );
 
 void
 odm_txpowertracking_callback_thermal_meter(
 #if (DM_ODM_SUPPORT_TYPE & ODM_AP)
-	struct PHY_DM_STRUCT		*p_dm
+	struct dm_struct		*dm
 #else
-	struct _ADAPTER	*adapter
+	void	*adapter
 #endif
 );
 
@@ -100,15 +111,15 @@ odm_txpowertracking_callback_thermal_meter(
 
 void
 odm_reset_iqk_result(
-	struct PHY_DM_STRUCT	*p_dm
+	struct dm_struct	*dm
 );
 u8
 odm_get_right_chnl_place_for_iqk(
 	u8 chnl
 );
 
-void odm_iq_calibrate(struct PHY_DM_STRUCT	*p_dm);
-void phydm_rf_init(struct PHY_DM_STRUCT		*p_dm);
-void phydm_rf_watchdog(struct PHY_DM_STRUCT		*p_dm);
+void odm_iq_calibrate(struct dm_struct	*dm);
+void phydm_rf_init(struct dm_struct		*dm);
+void phydm_rf_watchdog(struct dm_struct		*dm);
 
-#endif	/*  #ifndef __HAL_PHY_RF_H__ */
+#endif	/*#ifndef __HALPHYRF_H__*/
diff --git a/rtl8723DS/hal/phydm/halrf/halrf.c b/rtl8723DS/hal/phydm/halrf/halrf.c
index 068d483..32fd1f3 100755..100644
--- a/rtl8723DS/hal/phydm/halrf/halrf.c
+++ b/rtl8723DS/hal/phydm/halrf/halrf.c
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2007 - 2017 Realtek Corporation.
+ * Copyright(c) 2007 - 2017  Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -8,62 +8,50 @@
  *
  * This program is distributed in the hope that it will be useful, but WITHOUT
  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  * more details.
  *
+ * The full GNU General Public License is included in this distribution in the
+ * file called LICENSE.
+ *
+ * Contact Information:
+ * wlanfae <wlanfae@realtek.com>
+ * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
+ * Hsinchu 300, Taiwan.
+ *
+ * Larry Finger <Larry.Finger@lwfinger.net>
+ *
  *****************************************************************************/
 
-/* ************************************************************
+/*@************************************************************
  * include files
- * ************************************************************ */
+ * ************************************************************
+ */
 
 #include "mp_precomp.h"
 #include "phydm_precomp.h"
 
-void halrf_basic_profile(
-	void			*p_dm_void,
-	u32			*_used,
-	char			*output,
-	u32			*_out_len
-)
+#if (RTL8822B_SUPPORT == 1 || RTL8821C_SUPPORT == 1 ||\
+	RTL8195B_SUPPORT == 1 || RTL8198F_SUPPORT == 1 ||\
+	RTL8814B_SUPPORT == 1 || RTL8822C_SUPPORT == 1)
+void _iqk_page_switch(void *dm_void)
 {
-#ifdef CONFIG_PHYDM_DEBUG_FUNCTION
-	struct PHY_DM_STRUCT		*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	u32 used = *_used;
-	u32 out_len = *_out_len;
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
 
-	/* HAL RF version List */
-	PHYDM_SNPRINTF((output + used, out_len - used, "%-35s\n", "% HAL RF version %"));
-	PHYDM_SNPRINTF((output + used, out_len - used, "  %-35s: %s\n", "Power Tracking", HALRF_POWRTRACKING_VER));
-	PHYDM_SNPRINTF((output + used, out_len - used, "  %-35s: %s\n", "IQK", HALRF_IQK_VER));
-	PHYDM_SNPRINTF((output + used, out_len - used, "  %-35s: %s\n", "LCK", HALRF_LCK_VER));
-	PHYDM_SNPRINTF((output + used, out_len - used, "  %-35s: %s\n", "DPK", HALRF_DPK_VER));
-
-	*_used = used;
-	*_out_len = out_len;
-#endif
-}
-
-#if (RTL8822B_SUPPORT == 1 || RTL8821C_SUPPORT == 1)
-void
-_iqk_page_switch(
-		void			*p_dm_void)
-{
-	struct PHY_DM_STRUCT		*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	if (p_dm->support_ic_type == ODM_RTL8821C)	
-		odm_write_4byte(p_dm, 0x1b00, 0xf8000008);
-	else	
-		odm_write_4byte(p_dm, 0x1b00, 0xf800000a);
+	if (dm->support_ic_type == ODM_RTL8821C)
+		odm_write_4byte(dm, 0x1b00, 0xf8000008);
+	else
+		odm_write_4byte(dm, 0x1b00, 0xf800000a);
 }
 
-u32 halrf_psd_log2base(IN u32 val)
+u32 halrf_psd_log2base(u32 val)
 {
-	u8	j;
-	u32	tmp, tmp2, val_integerd_b = 0, tindex, shiftcount = 0;
-	u32	result, val_fractiond_b = 0, table_fraction[21] = {0, 432, 332, 274, 232, 200,
-				   174, 151, 132, 115, 100, 86, 74, 62, 51, 42,
-							   32, 23, 15, 7, 0
-							      };
+	u8 j;
+	u32 tmp, tmp2, val_integerd_b = 0, tindex, shiftcount = 0;
+	u32 result, val_fractiond_b = 0;
+	u32 table_fraction[21] = {
+		0, 432, 332, 274, 232, 200, 174, 151, 132, 115,
+		100, 86, 74, 62, 51, 42, 32, 23, 15, 7, 0};
 
 	if (val == 0)
 		return 0;
@@ -78,7 +66,6 @@ u32 halrf_psd_log2base(IN u32 val)
 		shiftcount++;
 	}
 
-
 	val_integerd_b = shiftcount + 1;
 
 	tmp2 = 1;
@@ -94,604 +81,603 @@ u32 halrf_psd_log2base(IN u32 val)
 	val_fractiond_b = table_fraction[tindex];
 
 	result = val_integerd_b * 100 - val_fractiond_b;
-	
-	return result;
-
 
+	return result;
 }
 
-void phydm_get_iqk_cfir(
-	void *p_dm_void,
-	u8 idx,
-	u8 path,
-	boolean debug
-)
+void phydm_get_iqk_cfir(void *dm_void, u8 idx, u8 path, boolean debug)
 {
-	struct PHY_DM_STRUCT	*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	struct _IQK_INFORMATION	*p_iqk_info = &p_dm->IQK_info;
-	
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct dm_iqk_info *iqk_info = &dm->IQK_info;
+
 	u8 i, ch;
 	u32 tmp;
+	u32 bit_mask_20_16 = BIT(20) | BIT(19) | BIT(18) | BIT(17) | BIT(16);
 
 	if (debug)
 		ch = 2;
 	else
 		ch = 0;
 
-		odm_set_bb_reg(p_dm, 0x1b00, MASKDWORD, 0xf8000008 | path << 1);
-		if (idx == 0)
-			odm_set_bb_reg(p_dm, 0x1b0c, BIT(13) | BIT(12), 0x3);
-		else
-			odm_set_bb_reg(p_dm, 0x1b0c, BIT(13) | BIT(12), 0x1);
-		odm_set_bb_reg(p_dm, 0x1bd4, BIT(20) | BIT(19) | BIT(18) | BIT(17) | BIT(16), 0x10);
-		for (i = 0; i < 8; i++) {
-			odm_set_bb_reg(p_dm, 0x1bd8, MASKDWORD, 0xe0000001 + (i * 4));
-			tmp = odm_get_bb_reg(p_dm, 0x1bfc, MASKDWORD);
-			p_iqk_info->IQK_CFIR_real[ch][path][idx][i] = (tmp & 0x0fff0000) >> 16;
-			p_iqk_info->IQK_CFIR_imag[ch][path][idx][i] = tmp & 0xfff;
-		}
-	odm_set_bb_reg(p_dm, 0x1bd8, MASKDWORD, 0x0);
-	odm_set_bb_reg(p_dm, 0x1b0c, BIT(13) | BIT(12), 0x0);
+	odm_set_bb_reg(dm, R_0x1b00, MASKDWORD, 0xf8000008 | path << 1);
+	if (idx == 0)
+		odm_set_bb_reg(dm, R_0x1b0c, BIT(13) | BIT(12), 0x3);
+	else
+		odm_set_bb_reg(dm, R_0x1b0c, BIT(13) | BIT(12), 0x1);
+	odm_set_bb_reg(dm, R_0x1bd4, bit_mask_20_16, 0x10);
+	for (i = 0; i < 8; i++) {
+		odm_set_bb_reg(dm, R_0x1bd8, MASKDWORD, 0xe0000001 + (i * 4));
+		tmp = odm_get_bb_reg(dm, R_0x1bfc, MASKDWORD);
+		iqk_info->iqk_cfir_real[ch][path][idx][i] =
+						(tmp & 0x0fff0000) >> 16;
+		iqk_info->iqk_cfir_imag[ch][path][idx][i] = tmp & 0xfff;
+	}
+	odm_set_bb_reg(dm, R_0x1bd8, MASKDWORD, 0x0);
+	odm_set_bb_reg(dm, R_0x1b0c, BIT(13) | BIT(12), 0x0);
 }
 
-void
-halrf_iqk_xym_enable(
-	struct PHY_DM_STRUCT *p_dm,
-	u8 xym_enable
-	)
+void halrf_iqk_xym_enable(struct dm_struct *dm, u8 xym_enable)
 {
-	struct _IQK_INFORMATION *p_iqk_info = &p_dm->IQK_info;
+	struct dm_iqk_info *iqk_info = &dm->IQK_info;
 
 	if (xym_enable == 0)
-		p_iqk_info->xym_read = false;
+		iqk_info->xym_read = false;
 	else
-		p_iqk_info->xym_read = true;
+		iqk_info->xym_read = true;
 
-	PHYDM_DBG(p_dm, ODM_COMP_CALIBRATION, ("[IQK]%-20s %s\n", "xym_read = ", (p_iqk_info->xym_read ? "true": "false")));	
+	RF_DBG(dm, DBG_RF_IQK, "[IQK]%-20s %s\n", "xym_read = ",
+	       (iqk_info->xym_read ? "true" : "false"));
 }
 
-void
-halrf_iqk_xym_read(
-	void *p_dm_void,
-	u8 path,
-	u8 xym_type /*0: rx_sym; 1: tx_xym; 2:gs1_xym; 3:gs2_sym; 4: rxk1_xym*/
- )
+/*xym_type => 0: rx_sym; 1: tx_xym; 2:gs1_xym; 3:gs2_sym; 4: rxk1_xym*/
+void halrf_iqk_xym_read(void *dm_void, u8 path, u8 xym_type)
 {
-	struct PHY_DM_STRUCT	*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	struct _IQK_INFORMATION *p_iqk_info = &p_dm->IQK_info;	
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct dm_iqk_info *iqk_info = &dm->IQK_info;
 	u8 i, start, num;
 	u32 tmp1, tmp2;
 
-	if (!p_iqk_info->xym_read)
+	if (!iqk_info->xym_read)
 		return;
 
-	if (*p_dm->p_band_width == 0) {
+	if (*dm->band_width == 0) {
 		start = 3;
 		num = 4;
-	}else if (*p_dm->p_band_width == 1) { 
+	} else if (*dm->band_width == 1) {
 		start = 2;
 		num = 6;
-	}else {
+	} else {
 		start = 0;
-  		num = 10;
- 	}
-	
-	odm_write_4byte(p_dm, 0x1b00, 0xf8000008);
- 	tmp1 =  odm_read_4byte(p_dm, 0x1b1c);
-	odm_write_4byte(p_dm, 0x1b1c, 0xa2193c32);
-
- 	odm_write_4byte(p_dm, 0x1b00, 0xf800000a);
- 	tmp2 =  odm_read_4byte(p_dm, 0x1b1c);
-	odm_write_4byte(p_dm, 0x1b1c, 0xa2193c32);
-
-	for (path = 0; path < 2; path ++) {
-		odm_write_4byte(p_dm, 0x1b00, 0xf8000008 | path << 1);
-		switch(xym_type){
- 			case 0:
-				for (i = 0; i < num ;i++) {
-	   				odm_write_4byte(p_dm, 0x1b14, 0xe6+start+i);
-	   				odm_write_4byte(p_dm, 0x1b14, 0x0);
-	   				p_iqk_info->rx_xym[path][i] = odm_read_4byte(p_dm, 0x1b38);
-				}
+		num = 10;
+	}
+
+	odm_write_4byte(dm, 0x1b00, 0xf8000008);
+	tmp1 = odm_read_4byte(dm, 0x1b1c);
+	odm_write_4byte(dm, 0x1b1c, 0xa2193c32);
+
+	odm_write_4byte(dm, 0x1b00, 0xf800000a);
+	tmp2 = odm_read_4byte(dm, 0x1b1c);
+	odm_write_4byte(dm, 0x1b1c, 0xa2193c32);
+
+	for (path = 0; path < 2; path++) {
+		odm_write_4byte(dm, 0x1b00, 0xf8000008 | path << 1);
+		switch (xym_type) {
+		case 0:
+			for (i = 0; i < num; i++) {
+				odm_write_4byte(dm, 0x1b14, 0xe6 + start + i);
+				odm_write_4byte(dm, 0x1b14, 0x0);
+				iqk_info->rx_xym[path][i] =
+						odm_read_4byte(dm, 0x1b38);
+			}
+			break;
+		case 1:
+			for (i = 0; i < num; i++) {
+				odm_write_4byte(dm, 0x1b14, 0xe6 + start + i);
+				odm_write_4byte(dm, 0x1b14, 0x0);
+				iqk_info->tx_xym[path][i] =
+						odm_read_4byte(dm, 0x1b38);
+			}
 			break;
-			case 1:		
-				for (i = 0; i < num ;i++) {
-	   				odm_write_4byte(p_dm, 0x1b14, 0xe6+start+i);
-	   				odm_write_4byte(p_dm, 0x1b14, 0x0);
-	   				p_iqk_info->tx_xym[path][i] = odm_read_4byte(p_dm, 0x1b38);
-				}
+		case 2:
+			for (i = 0; i < 6; i++) {
+				odm_write_4byte(dm, 0x1b14, 0xe0 + i);
+				odm_write_4byte(dm, 0x1b14, 0x0);
+				iqk_info->gs1_xym[path][i] =
+						odm_read_4byte(dm, 0x1b38);
+			}
 			break;
-			case 2:		
-				for (i = 0; i < 6 ;i++) {
-	   				odm_write_4byte(p_dm, 0x1b14, 0xe0+i);
-	   				odm_write_4byte(p_dm, 0x1b14, 0x0);
-	   				p_iqk_info->gs1_xym[path][i] = odm_read_4byte(p_dm, 0x1b38);
-				}
+		case 3:
+			for (i = 0; i < 6; i++) {
+				odm_write_4byte(dm, 0x1b14, 0xe0 + i);
+				odm_write_4byte(dm, 0x1b14, 0x0);
+				iqk_info->gs2_xym[path][i] =
+						odm_read_4byte(dm, 0x1b38);
+			}
 			break;
-			case 3:		
-				for (i = 0; i < 6 ;i++) {
-	   				odm_write_4byte(p_dm, 0x1b14, 0xe0+i);
-	   				odm_write_4byte(p_dm, 0x1b14, 0x0);
-	   				p_iqk_info->gs2_xym[path][i] = odm_read_4byte(p_dm, 0x1b38);
-	  		}
-			break;			
-			case 4:		
-				for (i = 0; i < 6 ;i++) {
-	   				odm_write_4byte(p_dm, 0x1b14, 0xe0+i);
-	   				odm_write_4byte(p_dm, 0x1b14, 0x0);
-	   				p_iqk_info->rxk1_xym[path][i] = odm_read_4byte(p_dm, 0x1b38);
-	  		}
+		case 4:
+			for (i = 0; i < 6; i++) {
+				odm_write_4byte(dm, 0x1b14, 0xe0 + i);
+				odm_write_4byte(dm, 0x1b14, 0x0);
+				iqk_info->rxk1_xym[path][i] =
+						odm_read_4byte(dm, 0x1b38);
+			}
 			break;
-
 		}
-		odm_write_4byte(p_dm, 0x1b38, 0x20000000);
-		odm_write_4byte(p_dm, 0x1b00, 0xf8000008);
-		odm_write_4byte(p_dm, 0x1b1c, tmp1);
-		odm_write_4byte(p_dm, 0x1b00, 0xf800000a);
-		odm_write_4byte(p_dm, 0x1b1c, tmp2);
-		_iqk_page_switch(p_dm);
+		odm_write_4byte(dm, 0x1b38, 0x20000000);
+		odm_write_4byte(dm, 0x1b00, 0xf8000008);
+		odm_write_4byte(dm, 0x1b1c, tmp1);
+		odm_write_4byte(dm, 0x1b00, 0xf800000a);
+		odm_write_4byte(dm, 0x1b1c, tmp2);
+		_iqk_page_switch(dm);
 	}
 }
 
-void halrf_iqk_xym_show(
-	struct PHY_DM_STRUCT *p_dm,
-	u8 xym_type /*0: rx_sym; 1: tx_xym; 2:gs1_xym; 3:gs2_sym; 4: rxk1_xym*/
- )
+/*xym_type => 0: rx_sym; 1: tx_xym; 2:gs1_xym; 3:gs2_sym; 4: rxk1_xym*/
+void halrf_iqk_xym_show(struct dm_struct *dm, u8 xym_type)
 {
-	u8 num, path, path_num, i;		
-	struct _IQK_INFORMATION *p_iqk_info = &p_dm->IQK_info;	
+	u8 num, path, path_num, i;
+	struct dm_iqk_info *iqk_info = &dm->IQK_info;
 
-	if (p_dm->rf_type ==RF_1T1R)
+	if (dm->rf_type == RF_1T1R)
 		path_num = 0x1;
-	else if (p_dm->rf_type ==RF_2T2R)
+	else if (dm->rf_type == RF_2T2R)
 		path_num = 0x2;
 	else
 		path_num = 0x4;
 
-	if (*p_dm->p_band_width == CHANNEL_WIDTH_20)
+	if (*dm->band_width == CHANNEL_WIDTH_20)
 		num = 4;
-	else if (*p_dm->p_band_width == CHANNEL_WIDTH_40)
+	else if (*dm->band_width == CHANNEL_WIDTH_40)
 		num = 6;
 	else
 		num = 10;
-		
-	for (path = 0; path < path_num; path ++) {
-		switch (xym_type){
+
+	for (path = 0; path < path_num; path++) {
+		switch (xym_type) {
 		case 0:
-			for (i = 0 ; i < num; i ++)
-				PHYDM_DBG(p_dm, ODM_COMP_CALIBRATION, ("[IQK]%-20s %-2d: 0x%x\n",
-					(path == 0) ? "PATH A RX-XYM ": "PATH B RX-XYM", i, p_iqk_info->rx_xym[path][i]));
+			for (i = 0; i < num; i++)
+				RF_DBG(dm, DBG_RF_IQK,
+				       "[IQK]%-20s %-2d: 0x%x\n",
+				       (path == 0) ? "PATH A RX-XYM " :
+				       "PATH B RX-XYM", i,
+				       iqk_info->rx_xym[path][i]);
 			break;
 		case 1:
-			for (i = 0 ; i < num; i ++)
-				PHYDM_DBG(p_dm, ODM_COMP_CALIBRATION, ("[IQK]%-20s %-2d: 0x%x\n",
-					(path == 0) ? "PATH A TX-XYM ": "PATH B TX-XYM", i, p_iqk_info->tx_xym[path][i]));
+			for (i = 0; i < num; i++)
+				RF_DBG(dm, DBG_RF_IQK,
+				       "[IQK]%-20s %-2d: 0x%x\n",
+				       (path == 0) ? "PATH A TX-XYM " :
+				       "PATH B TX-XYM", i,
+				       iqk_info->tx_xym[path][i]);
 			break;
 		case 2:
-			for (i = 0 ; i < 6; i ++)
-				PHYDM_DBG(p_dm, ODM_COMP_CALIBRATION, ("[IQK]%-20s %-2d: 0x%x\n",
-					(path == 0) ? "PATH A GS1-XYM ": "PATH B GS1-XYM", i, p_iqk_info->gs1_xym[path][i]));
+			for (i = 0; i < 6; i++)
+				RF_DBG(dm, DBG_RF_IQK,
+				       "[IQK]%-20s %-2d: 0x%x\n",
+				       (path == 0) ? "PATH A GS1-XYM " :
+				       "PATH B GS1-XYM", i,
+				       iqk_info->gs1_xym[path][i]);
 			break;
 		case 3:
-			for (i = 0 ; i < 6; i ++)
-				PHYDM_DBG(p_dm, ODM_COMP_CALIBRATION, ("[IQK]%-20s %-2d: 0x%x\n",
-					(path == 0) ? "PATH A GS2-XYM ": "PATH B GS2-XYM", i, p_iqk_info->gs2_xym[path][i]));
-			break;
-		case 4:			
-			for (i = 0 ; i < 6; i ++)
-				PHYDM_DBG(p_dm, ODM_COMP_CALIBRATION, ("[IQK]%-20s %-2d: 0x%x\n",
-					(path == 0) ? "PATH A RXK1-XYM ": "PATH B RXK1-XYM", i, p_iqk_info->rxk1_xym[path][i]));
+			for (i = 0; i < 6; i++)
+				RF_DBG(dm, DBG_RF_IQK,
+				       "[IQK]%-20s %-2d: 0x%x\n",
+				       (path == 0) ? "PATH A GS2-XYM " :
+				       "PATH B GS2-XYM", i,
+				       iqk_info->gs2_xym[path][i]);
+			break;
+		case 4:
+			for (i = 0; i < 6; i++)
+				RF_DBG(dm, DBG_RF_IQK,
+				       "[IQK]%-20s %-2d: 0x%x\n",
+				       (path == 0) ? "PATH A RXK1-XYM " :
+				       "PATH B RXK1-XYM", i,
+				       iqk_info->rxk1_xym[path][i]);
 			break;
 		}
 	}
 }
 
-
-void
-halrf_iqk_xym_dump(
-	void *p_dm_void
- )
+void halrf_iqk_xym_dump(void *dm_void)
 {
 	u32 tmp1, tmp2;
- 	struct PHY_DM_STRUCT	 *p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-
-	odm_write_4byte(p_dm, 0x1b00, 0xf8000008);
- 	tmp1 =  odm_read_4byte(p_dm, 0x1b1c);
- 	odm_write_4byte(p_dm, 0x1b00, 0xf800000a);
- 	tmp2 =  odm_read_4byte(p_dm, 0x1b1c);
- 	/*halrf_iqk_xym_read(p_dm, xym_type);*/
- 	odm_write_4byte(p_dm, 0x1b00, 0xf8000008);
- 	odm_write_4byte(p_dm, 0x1b1c, tmp1);
- 	odm_write_4byte(p_dm, 0x1b00, 0xf800000a);
- 	odm_write_4byte(p_dm, 0x1b1c, tmp2);
- 	_iqk_page_switch(p_dm);
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+
+	odm_write_4byte(dm, 0x1b00, 0xf8000008);
+	tmp1 = odm_read_4byte(dm, 0x1b1c);
+	odm_write_4byte(dm, 0x1b00, 0xf800000a);
+	tmp2 = odm_read_4byte(dm, 0x1b1c);
+#if 0
+	/*halrf_iqk_xym_read(dm, xym_type);*/
+#endif
+	odm_write_4byte(dm, 0x1b00, 0xf8000008);
+	odm_write_4byte(dm, 0x1b1c, tmp1);
+	odm_write_4byte(dm, 0x1b00, 0xf800000a);
+	odm_write_4byte(dm, 0x1b1c, tmp2);
+	_iqk_page_switch(dm);
 }
 
-void halrf_iqk_info_dump(
-	void *p_dm_void,
-	u32 *_used,
-	char *output,
-	u32 *_out_len)
+void halrf_iqk_info_dump(void *dm_void, u32 *_used, char *output, u32 *_out_len)
 {
-	struct PHY_DM_STRUCT		*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
 	u32 used = *_used;
-	u32 out_len = *_out_len;	
-	u8 path, num, i;
-
+	u32 out_len = *_out_len;
 	u8 rf_path, j, reload_iqk = 0;
 	u32 tmp;
-	boolean iqk_result[2][NUM][2];	/*two channel, PATH, TX/RX, 0:pass 1 :fail*/
-	struct _IQK_INFORMATION	*p_iqk_info = &p_dm->IQK_info;
+	/*two channel, PATH, TX/RX, 0:pass 1 :fail*/
+	boolean iqk_result[2][NUM][2];
+	struct dm_iqk_info *iqk_info = &dm->IQK_info;
+
+	if (!(dm->support_ic_type & (ODM_RTL8822B | ODM_RTL8821C)))
+		return;
 
 	/* IQK INFO */
-	PHYDM_SNPRINTF((output + used, out_len - used, "%-20s\n", "% IQK Info %"));
-	PHYDM_SNPRINTF((output + used, out_len - used, "%-20s\n",
-		(p_dm->fw_offload_ability & PHYDM_RF_IQK_OFFLOAD) ? "FW-IQK" : "Driver-IQK"));	
-
-	reload_iqk = (u8)odm_get_bb_reg(p_dm, 0x1bf0, BIT(16));
-	PHYDM_SNPRINTF((output + used, out_len - used, "%-20s: %s\n",
-		"reload", (reload_iqk) ? "True" : "False"));
-
-	PHYDM_SNPRINTF((output + used, out_len - used, "%-20s: %s\n",
-			"rfk_forbidden", (p_iqk_info->rfk_forbidden) ? "True" : "False"));
-#if (RTL8814A_SUPPORT == 1 || RTL8822B_SUPPORT == 1 || RTL8821C_SUPPORT == 1)
-	PHYDM_SNPRINTF((output + used, out_len - used, "%-20s: %s\n",
-			"segment_iqk", (p_iqk_info->segment_iqk) ? "True" : "False"));
-#endif
-
-	PHYDM_SNPRINTF((output + used, out_len - used, "%-20s:%d %d\n",
-			"iqk count / fail count", p_dm->n_iqk_cnt, p_dm->n_iqk_fail_cnt));
-
-	PHYDM_SNPRINTF((output + used, out_len - used, "%-20s: %d\n",
-			"channel", *p_dm->p_channel));
-
-	if (*p_dm->p_band_width == CHANNEL_WIDTH_20)
-		PHYDM_SNPRINTF((output + used, out_len - used, "%-20s: %s\n",
-				"bandwidth", "BW_20"));
-	else if (*p_dm->p_band_width == CHANNEL_WIDTH_40)
-		PHYDM_SNPRINTF((output + used, out_len - used, "%-20s: %s\n",
-				"bandwidth", "BW_40"));
-	else if (*p_dm->p_band_width == CHANNEL_WIDTH_80)
-		PHYDM_SNPRINTF((output + used, out_len - used, "%-20s: %s\n",
-				"bandwidth", "BW_80"));
-	else if (*p_dm->p_band_width == CHANNEL_WIDTH_160)
-		PHYDM_SNPRINTF((output + used, out_len - used, "%-20s: %s\n",
-				"bandwidth", "BW_160"));
+	PDM_SNPF(out_len, used, output + used, out_len - used, "%-20s\n",
+		 "% IQK Info %");
+	PDM_SNPF(out_len, used, output + used, out_len - used, "%-20s\n",
+		 (dm->fw_offload_ability & PHYDM_RF_IQK_OFFLOAD) ? "FW-IQK" :
+		 "Driver-IQK");
+
+	reload_iqk = (u8)odm_get_bb_reg(dm, R_0x1bf0, BIT(16));
+	PDM_SNPF(out_len, used, output + used, out_len - used, "%-20s: %s\n",
+		 "reload", (reload_iqk) ? "True" : "False");
+
+	PDM_SNPF(out_len, used, output + used, out_len - used, "%-20s: %s\n",
+		 "rfk_forbidden", (iqk_info->rfk_forbidden) ? "True" : "False");
+#if (RTL8814A_SUPPORT == 1 || RTL8822B_SUPPORT == 1 || \
+	RTL8821C_SUPPORT == 1 || RTL8195B_SUPPORT == 1 ||\
+	RTL8814B_SUPPORT == 1 || RTL8822C_SUPPORT == 1)
+	PDM_SNPF(out_len, used, output + used, out_len - used, "%-20s: %s\n",
+		 "segment_iqk", (iqk_info->segment_iqk) ? "True" : "False");
+#endif
+
+	PDM_SNPF(out_len, used, output + used, out_len - used, "%-20s:%d %d\n",
+		 "iqk count / fail count", dm->n_iqk_cnt, dm->n_iqk_fail_cnt);
+
+	PDM_SNPF(out_len, used, output + used, out_len - used, "%-20s: %d\n",
+		 "channel", *dm->channel);
+
+	if (*dm->band_width == CHANNEL_WIDTH_20)
+		PDM_SNPF(out_len, used, output + used, out_len - used,
+			 "%-20s: %s\n", "bandwidth", "BW_20");
+	else if (*dm->band_width == CHANNEL_WIDTH_40)
+		PDM_SNPF(out_len, used, output + used, out_len - used,
+			 "%-20s: %s\n", "bandwidth", "BW_40");
+	else if (*dm->band_width == CHANNEL_WIDTH_80)
+		PDM_SNPF(out_len, used, output + used, out_len - used,
+			 "%-20s: %s\n", "bandwidth", "BW_80");
+	else if (*dm->band_width == CHANNEL_WIDTH_160)
+		PDM_SNPF(out_len, used, output + used, out_len - used,
+			 "%-20s: %s\n", "bandwidth", "BW_160");
 	else
-		PHYDM_SNPRINTF((output + used, out_len - used, "%-20s: %s\n",
-				"bandwidth", "BW_UNKNOW"));
-
-	PHYDM_SNPRINTF((output + used, out_len - used, "%-20s: %llu %s\n",
-				"progressing_time", p_dm->rf_calibrate_info.iqk_total_progressing_time, "(ms)"));
-		
-	tmp = odm_read_4byte(p_dm, 0x1bf0);
-	for(rf_path = RF_PATH_A; rf_path <= RF_PATH_B; rf_path++)
-		for(j = 0; j < 2; j++)
-			iqk_result[0][rf_path][j] = (boolean)(tmp & BIT(rf_path + (j * 4)) >> (rf_path + (j * 4)));
-
-	PHYDM_SNPRINTF((output + used, out_len - used, "%-20s: 0x%08x\n","Reg0x1bf0", tmp));
-	PHYDM_SNPRINTF((output + used, out_len - used, "%-20s: %s\n",
-				"PATH_A-Tx result", (iqk_result[0][RF_PATH_A][0]) ?  "Fail" : "Pass"));
-	PHYDM_SNPRINTF((output + used, out_len - used, "%-20s: %s\n",
-				"PATH_A-Rx result", (iqk_result[0][RF_PATH_A][1]) ?  "Fail" : "Pass"));
-#if (RTL8822B_SUPPORT == 1) 
-	PHYDM_SNPRINTF((output + used, out_len - used, "%-20s: %s\n",
-				"PATH_B-Tx result", (iqk_result[0][RF_PATH_B][0]) ?  "Fail" : "Pass"));
-	PHYDM_SNPRINTF((output + used, out_len - used, "%-20s: %s\n",
-				"PATH_B-Rx result", (iqk_result[0][RF_PATH_B][1]) ?  "Fail" : "Pass"));
+		PDM_SNPF(out_len, used, output + used, out_len - used,
+			 "%-20s: %s\n", "bandwidth", "BW_UNKNOWN");
+
+	PDM_SNPF(out_len, used, output + used, out_len - used,
+		 "%-20s: %llu %s\n", "progressing_time",
+		 dm->rf_calibrate_info.iqk_total_progressing_time, "(ms)");
+
+	tmp = odm_read_4byte(dm, 0x1bf0);
+	for (rf_path = RF_PATH_A; rf_path <= RF_PATH_B; rf_path++)
+		for (j = 0; j < 2; j++)
+			iqk_result[0][rf_path][j] = (boolean)
+			(tmp & (BIT(rf_path + (j * 4)) >> (rf_path + (j * 4))));
+
+	PDM_SNPF(out_len, used, output + used, out_len - used,
+		 "%-20s: 0x%08x\n", "Reg0x1bf0", tmp);
+	PDM_SNPF(out_len, used, output + used, out_len - used, "%-20s: %s\n",
+		 "PATH_A-Tx result",
+		 (iqk_result[0][RF_PATH_A][0]) ? "Fail" : "Pass");
+	PDM_SNPF(out_len, used, output + used, out_len - used, "%-20s: %s\n",
+		 "PATH_A-Rx result",
+		 (iqk_result[0][RF_PATH_A][1]) ? "Fail" : "Pass");
+#if (RTL8822B_SUPPORT == 1)
+	PDM_SNPF(out_len, used, output + used, out_len - used, "%-20s: %s\n",
+		 "PATH_B-Tx result",
+		 (iqk_result[0][RF_PATH_B][0]) ? "Fail" : "Pass");
+	PDM_SNPF(out_len, used, output + used, out_len - used, "%-20s: %s\n",
+		 "PATH_B-Rx result",
+		 (iqk_result[0][RF_PATH_B][1]) ? "Fail" : "Pass");
 #endif
 	*_used = used;
 	*_out_len = out_len;
-
 }
 
-void halrf_get_fw_version(void	*p_dm_void)
+void halrf_get_fw_version(void *dm_void)
 {
-	struct PHY_DM_STRUCT *p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	struct _hal_rf_				*p_rf = &(p_dm->rf_table);
-
-#if (DM_ODM_SUPPORT_TYPE & ODM_WIN)
-	{
-		struct _ADAPTER		*adapter = p_dm->adapter;
-
-		p_rf->fw_ver = (adapter->MgntInfo.FirmwareVersion << 16) | adapter->MgntInfo.FirmwareSubVersion;
-	}
-#elif (DM_ODM_SUPPORT_TYPE & ODM_AP)
-	{
-		struct rtl8192cd_priv *priv = p_dm->priv;
-
-		p_rf->fw_ver = (priv->pshare->fw_version << 16) | priv->pshare->fw_sub_version;
-	}
-#elif (DM_ODM_SUPPORT_TYPE == ODM_CE) && defined(DM_ODM_CE_MAC80211)
-	{
-		struct rtl_priv *rtlpriv = (struct rtl_priv *)p_dm->adapter;
-		struct rtl_hal *rtlhal = rtl_hal(rtlpriv);
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct _hal_rf_ *rf = &dm->rf_table;
 
-		p_rf->fw_ver = (rtlhal->fw_version << 16) | rtlhal->fw_subversion;
-	}
-#else
-	{
-		struct _ADAPTER		*adapter = p_dm->adapter;
-		HAL_DATA_TYPE		*p_hal_data = GET_HAL_DATA(adapter);
-
-		p_rf->fw_ver = (p_hal_data->firmware_version << 16) | p_hal_data->firmware_sub_version;
-	}
-#endif
+	rf->fw_ver = (dm->fw_version << 16) | dm->fw_sub_version;
 }
 
-
-void halrf_iqk_dbg(void	*p_dm_void)
+void halrf_iqk_dbg(void *dm_void)
 {
-	struct PHY_DM_STRUCT *p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	u8 rf_path, j, reload_iqk = 0;
-	u8 path, num, i;
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	u8 rf_path, j;
 	u32 tmp;
-	boolean iqk_result[2][NUM][2];	/*two channel, PATH, TX/RX, 0:pass 1 :fail*/
-	struct _IQK_INFORMATION	*p_iqk_info = &p_dm->IQK_info;
-	struct _hal_rf_				*p_rf = &(p_dm->rf_table);
+	/*two channel, PATH, TX/RX, 0:pass 1 :fail*/
+	boolean iqk_result[2][NUM][2];
+	struct dm_iqk_info *iqk_info = &dm->IQK_info;
+	struct _hal_rf_ *rf = &dm->rf_table;
 
 	/* IQK INFO */
-	PHYDM_DBG(p_dm, ODM_COMP_CALIBRATION, ("%-20s\n", "====== IQK Info ======"));
-
-	PHYDM_DBG(p_dm, ODM_COMP_CALIBRATION, ("%-20s\n",
-		(p_dm->fw_offload_ability & PHYDM_RF_IQK_OFFLOAD) ? "FW-IQK" : "Driver-IQK"));
-
-	if (p_dm->fw_offload_ability & PHYDM_RF_IQK_OFFLOAD) {
-		halrf_get_fw_version(p_dm);
-		PHYDM_DBG(p_dm, ODM_COMP_CALIBRATION, ("%-20s: 0x%x\n",
-			"FW_VER", p_rf->fw_ver));
-	} else
-		PHYDM_DBG(p_dm, ODM_COMP_CALIBRATION, ("%-20s: %s\n",
-			"IQK_VER", HALRF_IQK_VER));
-
-	PHYDM_DBG(p_dm, ODM_COMP_CALIBRATION,( "%-20s: %s\n",
-		"reload", (p_iqk_info->is_reload) ? "True" : "False"));
-
-	PHYDM_DBG(p_dm, ODM_COMP_CALIBRATION, ("%-20s: %d %d\n",
-			"iqk count / fail count", p_dm->n_iqk_cnt, p_dm->n_iqk_fail_cnt));
-
-	PHYDM_DBG(p_dm, ODM_COMP_CALIBRATION, ("%-20s: %d\n",
-			"channel", *p_dm->p_channel));
-
-	if (*p_dm->p_band_width == CHANNEL_WIDTH_20)
-		PHYDM_DBG(p_dm, ODM_COMP_CALIBRATION, ("%-20s: %s\n",
-				"bandwidth", "BW_20"));
-	else if (*p_dm->p_band_width == CHANNEL_WIDTH_40)
-		PHYDM_DBG(p_dm, ODM_COMP_CALIBRATION, ("%-20s: %s\n",
-				"bandwidth", "BW_40"));
-	else if (*p_dm->p_band_width == CHANNEL_WIDTH_80)
-		PHYDM_DBG(p_dm, ODM_COMP_CALIBRATION, ("%-20s: %s\n",
-				"bandwidth", "BW_80"));
-	else if (*p_dm->p_band_width == CHANNEL_WIDTH_160)
-		PHYDM_DBG(p_dm, ODM_COMP_CALIBRATION, ("%-20s: %s\n",
-				"bandwidth", "BW_160"));
-	else
-		PHYDM_DBG(p_dm, ODM_COMP_CALIBRATION, ("%-20s: %s\n",
-				"bandwidth", "BW_UNKNOW"));
-/*
-	PHYDM_DBG(p_dm, ODM_COMP_CALIBRATION, ("%-20s: %llu %s\n",
-				"progressing_time", p_dm->rf_calibrate_info.iqk_total_progressing_time, "(ms)"));
-*/
-		PHYDM_DBG(p_dm, ODM_COMP_CALIBRATION, ("%-20s: %s\n",
-				"rfk_forbidden", (p_iqk_info->rfk_forbidden) ? "True" : "False"));
-#if (RTL8814A_SUPPORT == 1 || RTL8822B_SUPPORT == 1 || RTL8821C_SUPPORT == 1)
-		PHYDM_DBG(p_dm, ODM_COMP_CALIBRATION, ("%-20s: %s\n",
-				"segment_iqk", (p_iqk_info->segment_iqk) ? "True" : "False"));
-#endif
+	RF_DBG(dm, DBG_RF_IQK, "%-20s\n", "====== IQK Info ======");
 
-	PHYDM_DBG(p_dm, ODM_COMP_CALIBRATION, ("%-20s: %llu %s\n",
-				"progressing_time", p_dm->rf_calibrate_info.iqk_progressing_time, "(ms)"));
+	RF_DBG(dm, DBG_RF_IQK, "%-20s\n",
+	       (dm->fw_offload_ability & PHYDM_RF_IQK_OFFLOAD) ? "FW-IQK" :
+	       "Driver-IQK");
 
-	
+	if (dm->fw_offload_ability & PHYDM_RF_IQK_OFFLOAD) {
+		halrf_get_fw_version(dm);
+		RF_DBG(dm, DBG_RF_IQK, "%-20s: 0x%x\n", "FW_VER", rf->fw_ver);
+	} else {
+		RF_DBG(dm, DBG_RF_IQK, "%-20s: %s\n", "IQK_VER", HALRF_IQK_VER);
+	}
 
+	RF_DBG(dm, DBG_RF_IQK, "%-20s: %s\n", "reload",
+	       (iqk_info->is_reload) ? "True" : "False");
 
-	tmp = odm_read_4byte(p_dm, 0x1bf0);
-	for(rf_path = RF_PATH_A; rf_path <= RF_PATH_B; rf_path++)
-		for(j = 0; j < 2; j++)
-			iqk_result[0][rf_path][j] = (boolean)(tmp & BIT(rf_path + (j * 4)) >> (rf_path + (j * 4)));
+	RF_DBG(dm, DBG_RF_IQK, "%-20s: %d %d\n", "iqk count / fail count",
+	       dm->n_iqk_cnt, dm->n_iqk_fail_cnt);
 
-	PHYDM_DBG(p_dm, ODM_COMP_CALIBRATION, ("%-20s: 0x%08x\n", "Reg0x1bf0", tmp));
-	PHYDM_DBG(p_dm, ODM_COMP_CALIBRATION, ("%-20s: 0x%08x\n", "Reg0x1be8", odm_read_4byte(p_dm, 0x1be8)));
-	PHYDM_DBG(p_dm, ODM_COMP_CALIBRATION, ("%-20s: %s\n",
-				"PATH_A-Tx result", (iqk_result[0][RF_PATH_A][0]) ?  "Fail" : "Pass"));
-	PHYDM_DBG(p_dm, ODM_COMP_CALIBRATION, ("%-20s: %s\n",
-				"PATH_A-Rx result", (iqk_result[0][RF_PATH_A][1]) ?  "Fail" : "Pass"));
-#if (RTL8822B_SUPPORT == 1) 
-	PHYDM_DBG(p_dm, ODM_COMP_CALIBRATION, ("%-20s: %s\n",		
-				"PATH_B-Tx result", (iqk_result[0][RF_PATH_B][0]) ?  "Fail" : "Pass"));
-	PHYDM_DBG(p_dm, ODM_COMP_CALIBRATION, ("%-20s: %s\n",
-				"PATH_B-Rx result", (iqk_result[0][RF_PATH_B][1]) ?  "Fail" : "Pass"));
-#endif
+	RF_DBG(dm, DBG_RF_IQK, "%-20s: %d\n", "channel", *dm->channel);
 
+	if (*dm->band_width == CHANNEL_WIDTH_20)
+		RF_DBG(dm, DBG_RF_IQK, "%-20s: %s\n", "bandwidth", "BW_20");
+	else if (*dm->band_width == CHANNEL_WIDTH_40)
+		RF_DBG(dm, DBG_RF_IQK, "%-20s: %s\n", "bandwidth", "BW_40");
+	else if (*dm->band_width == CHANNEL_WIDTH_80)
+		RF_DBG(dm, DBG_RF_IQK, "%-20s: %s\n", "bandwidth", "BW_80");
+	else if (*dm->band_width == CHANNEL_WIDTH_160)
+		RF_DBG(dm, DBG_RF_IQK, "%-20s: %s\n", "bandwidth", "BW_160");
+	else
+		RF_DBG(dm, DBG_RF_IQK, "%-20s: %s\n", "bandwidth",
+		       "BW_UNKNOWN");
+#if 0
+/*
+ *	RF_DBG(dm, DBG_RF_IQK, "%-20s: %llu %s\n",
+ *	       "progressing_time",
+ *	       dm->rf_calibrate_info.iqk_total_progressing_time, "(ms)");
+ */
+#endif
+	RF_DBG(dm, DBG_RF_IQK, "%-20s: %s\n", "rfk_forbidden",
+	       (iqk_info->rfk_forbidden) ? "True" : "False");
+#if (RTL8814A_SUPPORT == 1 || RTL8822B_SUPPORT == 1 || \
+	RTL8821C_SUPPORT == 1 || RTL8195B_SUPPORT == 1 ||\
+	RTL8814B_SUPPORT == 1 || RTL8822C_SUPPORT == 1)
+	RF_DBG(dm, DBG_RF_IQK, "%-20s: %s\n", "segment_iqk",
+	       (iqk_info->segment_iqk) ? "True" : "False");
+#endif
 
+	RF_DBG(dm, DBG_RF_IQK, "%-20s: %llu %s\n", "progressing_time",
+	       dm->rf_calibrate_info.iqk_progressing_time, "(ms)");
+
+	tmp = odm_read_4byte(dm, 0x1bf0);
+	for (rf_path = RF_PATH_A; rf_path <= RF_PATH_B; rf_path++)
+		for (j = 0; j < 2; j++)
+			iqk_result[0][rf_path][j] = (boolean)
+			(tmp & (BIT(rf_path + (j * 4)) >> (rf_path + (j * 4))));
+
+	RF_DBG(dm, DBG_RF_IQK, "%-20s: 0x%08x\n", "Reg0x1bf0", tmp);
+	RF_DBG(dm, DBG_RF_IQK, "%-20s: 0x%08x\n", "Reg0x1be8",
+	       odm_read_4byte(dm, 0x1be8));
+	RF_DBG(dm, DBG_RF_IQK, "%-20s: %s\n", "PATH_A-Tx result",
+	       (iqk_result[0][RF_PATH_A][0]) ? "Fail" : "Pass");
+	RF_DBG(dm, DBG_RF_IQK, "%-20s: %s\n", "PATH_A-Rx result",
+	       (iqk_result[0][RF_PATH_A][1]) ? "Fail" : "Pass");
+#if (RTL8822B_SUPPORT == 1)
+	RF_DBG(dm, DBG_RF_IQK, "%-20s: %s\n", "PATH_B-Tx result",
+	       (iqk_result[0][RF_PATH_B][0]) ? "Fail" : "Pass");
+	RF_DBG(dm, DBG_RF_IQK, "%-20s: %s\n", "PATH_B-Rx result",
+	       (iqk_result[0][RF_PATH_B][1]) ? "Fail" : "Pass");
+#endif
 }
-void halrf_lck_dbg(struct PHY_DM_STRUCT *p_dm)
+
+void halrf_lck_dbg(struct dm_struct *dm)
 {
-	PHYDM_DBG(p_dm, ODM_COMP_CALIBRATION, ("%-20s\n", "====== LCK Info ======"));
-	/*PHYDM_DBG(p_dm, ODM_COMP_CALIBRATION, "%-20s\n",
-		(p_dm->fw_offload_ability & PHYDM_RF_IQK_OFFLOAD) ? "LCK" : "RTK"));*/
-	PHYDM_DBG(p_dm, ODM_COMP_CALIBRATION, ("%-20s: %llu %s\n",
-				"progressing_time", p_dm->rf_calibrate_info.lck_progressing_time, "(ms)"));
+	RF_DBG(dm, DBG_RF_IQK, "%-20s\n", "====== LCK Info ======");
+#if 0
+	/*RF_DBG(dm, DBG_RF_IQK, "%-20s\n",
+	 *	 (dm->fw_offload_ability & PHYDM_RF_IQK_OFFLOAD) ? "LCK" : "RTK"));
+	 */
+#endif
+	RF_DBG(dm, DBG_RF_IQK, "%-20s: %llu %s\n", "progressing_time",
+	       dm->rf_calibrate_info.lck_progressing_time, "(ms)");
 }
 
-void
-halrf_iqk_dbg_cfir_backup(struct PHY_DM_STRUCT *p_dm)
+void halrf_iqk_dbg_cfir_backup(struct dm_struct *dm)
 {
-	struct _IQK_INFORMATION *p_iqk_info = &p_dm->IQK_info;
-	u8	path, idx, i;
+	struct dm_iqk_info *iqk_info = &dm->IQK_info;
+	u8 path, idx, i;
 
-	PHYDM_DBG(p_dm, ODM_COMP_CALIBRATION, ("[IQK]%-20s\n", "backup TX/RX CFIR"));	
+	RF_DBG(dm, DBG_RF_IQK, "[IQK]%-20s\n", "backup TX/RX CFIR");
 
-	for (path = 0; path < 2; path ++) {
-		for (idx = 0; idx < 2; idx++) {
-			phydm_get_iqk_cfir(p_dm, idx, path, true);
-		}
-	}
+	for (path = 0; path < 2; path++)
+		for (idx = 0; idx < 2; idx++)
+			phydm_get_iqk_cfir(dm, idx, path, true);
 
-	for (path = 0; path < 2; path ++) {
+	for (path = 0; path < 2; path++) {
 		for (idx = 0; idx < 2; idx++) {
-			for(i = 0; i < 8; i++) {
-				PHYDM_DBG(p_dm, ODM_COMP_CALIBRATION, ("[IQK]%-7s %-3s CFIR_real: %-2d: 0x%x\n",
-					(path == 0) ? "PATH A": "PATH B", (idx == 0) ? "TX": "RX", i, p_iqk_info->IQK_CFIR_real[2][path][idx][i]));
+			for (i = 0; i < 8; i++) {
+				RF_DBG(dm, DBG_RF_IQK,
+				       "[IQK]%-7s %-3s CFIR_real: %-2d: 0x%x\n",
+				       (path == 0) ? "PATH A" : "PATH B",
+				       (idx == 0) ? "TX" : "RX", i,
+				       iqk_info->iqk_cfir_real[2][path][idx][i])
+				       ;
 			}
-			for(i = 0; i < 8; i++) {
-				PHYDM_DBG(p_dm, ODM_COMP_CALIBRATION, ("[IQK]%-7s %-3s CFIR_img:%-2d: 0x%x\n",
-					(path == 0) ? "PATH A": "PATH B", (idx == 0) ? "TX": "RX", i, p_iqk_info->IQK_CFIR_imag[2][path][idx][i]));
+			for (i = 0; i < 8; i++) {
+				RF_DBG(dm, DBG_RF_IQK,
+				       "[IQK]%-7s %-3s CFIR_img:%-2d: 0x%x\n",
+				       (path == 0) ? "PATH A" : "PATH B",
+				       (idx == 0) ? "TX" : "RX", i,
+				       iqk_info->iqk_cfir_imag[2][path][idx][i])
+				       ;
 			}
 		}
 	}
 }
 
-
-void
-halrf_iqk_dbg_cfir_backup_update(
-	struct PHY_DM_STRUCT			*p_dm
-)
+void halrf_iqk_dbg_cfir_backup_update(struct dm_struct *dm)
 {
-	struct _IQK_INFORMATION	*p_iqk_info = &p_dm->IQK_info;
+	struct dm_iqk_info *iqk = &dm->IQK_info;
 	u8 i, path, idx;
+	u32 bmask13_12 = BIT(13) | BIT(12);
+	u32 bmask20_16 = BIT(20) | BIT(19) | BIT(18) | BIT(17) | BIT(16);
+	u32 data;
 
-	if(p_iqk_info->IQK_CFIR_real[2][0][0][0] == 0) {
-		PHYDM_DBG(p_dm, ODM_COMP_CALIBRATION, ("[IQK]%-20s\n", "CFIR is invalid"));
+	if (iqk->iqk_cfir_real[2][0][0][0] == 0) {
+		RF_DBG(dm, DBG_RF_IQK, "[IQK]%-20s\n", "CFIR is invalid");
 		return;
 	}
 	for (path = 0; path < 2; path++) {
 		for (idx = 0; idx < 2; idx++) {
-			odm_set_bb_reg(p_dm, 0x1b00, MASKDWORD, 0xf8000008 | path << 1);
-			odm_set_bb_reg(p_dm, 0x1b2c, MASKDWORD, 0x7);
-			odm_set_bb_reg(p_dm, 0x1b38, MASKDWORD, 0x20000000);
-			odm_set_bb_reg(p_dm, 0x1b3c, MASKDWORD, 0x20000000);
-			odm_set_bb_reg(p_dm, 0x1bcc, MASKDWORD, 0x00000000);
+			odm_set_bb_reg(dm, R_0x1b00, MASKDWORD,
+				       0xf8000008 | path << 1);
+			odm_set_bb_reg(dm, R_0x1b2c, MASKDWORD, 0x7);
+			odm_set_bb_reg(dm, R_0x1b38, MASKDWORD, 0x20000000);
+			odm_set_bb_reg(dm, R_0x1b3c, MASKDWORD, 0x20000000);
+			odm_set_bb_reg(dm, R_0x1bcc, MASKDWORD, 0x00000000);
 			if (idx == 0)
-				odm_set_bb_reg(p_dm, 0x1b0c, BIT(13) | BIT(12), 0x3);
+				odm_set_bb_reg(dm, R_0x1b0c, bmask13_12, 0x3);
 			else
-				odm_set_bb_reg(p_dm, 0x1b0c, BIT(13) | BIT(12), 0x1);
-			odm_set_bb_reg(p_dm, 0x1bd4, BIT(20) | BIT(19) | BIT(18) | BIT(17) | BIT(16), 0x10);
+				odm_set_bb_reg(dm, R_0x1b0c, bmask13_12, 0x1);
+			odm_set_bb_reg(dm, R_0x1bd4, bmask20_16, 0x10);
 			for (i = 0; i < 8; i++) {
-				odm_write_4byte(p_dm, 0x1bd8,	((0xc0000000 >> idx) + 0x3) + (i * 4) + (p_iqk_info->IQK_CFIR_real[2][path][idx][i] << 9));
-				odm_write_4byte(p_dm, 0x1bd8, ((0xc0000000 >> idx) + 0x1) + (i * 4) + (p_iqk_info->IQK_CFIR_imag[2][path][idx][i] << 9));
-				/*odm_write_4byte(p_dm, 0x1bd8, p_iqk_info->IQK_CFIR_real[2][path][idx][i]);*/
-				/*odm_write_4byte(p_dm, 0x1bd8, p_iqk_info->IQK_CFIR_imag[2][path][idx][i]);*/
+				data = ((0xc0000000 >> idx) + 0x3) + (i * 4) +
+					(iqk->iqk_cfir_real[2][path][idx][i]
+					<< 9);
+				odm_write_4byte(dm, 0x1bd8, data);
+				data = ((0xc0000000 >> idx) + 0x1) + (i * 4) +
+					(iqk->iqk_cfir_imag[2][path][idx][i]
+					<< 9);
+				odm_write_4byte(dm, 0x1bd8, data);
+#if 0
+				/*odm_write_4byte(dm, 0x1bd8, iqk->iqk_cfir_real[2][path][idx][i]);*/
+				/*odm_write_4byte(dm, 0x1bd8, iqk->iqk_cfir_imag[2][path][idx][i]);*/
+#endif
 			}
 		}
-		odm_set_bb_reg(p_dm, 0x1bd8, MASKDWORD, 0x0);
-		odm_set_bb_reg(p_dm, 0x1b0c, BIT(13) | BIT(12), 0x0);
+		odm_set_bb_reg(dm, R_0x1bd8, MASKDWORD, 0x0);
+		odm_set_bb_reg(dm, R_0x1b0c, bmask13_12, 0x0);
 	}
-	PHYDM_DBG(p_dm, ODM_COMP_CALIBRATION, ("[IQK]%-20s\n", "update new CFIR"));
+	RF_DBG(dm, DBG_RF_IQK, "[IQK]%-20s\n", "update new CFIR");
 }
 
-
-void
-halrf_iqk_dbg_cfir_reload(
-	struct PHY_DM_STRUCT			*p_dm
-)
+void halrf_iqk_dbg_cfir_reload(struct dm_struct *dm)
 {
-	struct _IQK_INFORMATION	*p_iqk_info = &p_dm->IQK_info;
+	struct dm_iqk_info *iqk = &dm->IQK_info;
 	u8 i, path, idx;
+	u32 bmask13_12 = BIT(13) | BIT(12);
+	u32 bmask20_16 = BIT(20) | BIT(19) | BIT(18) | BIT(17) | BIT(16);
+	u32 data;
 
-	if(p_iqk_info->IQK_CFIR_real[0][0][0][0] == 0) {
-		PHYDM_DBG(p_dm, ODM_COMP_CALIBRATION, ("[IQK]%-20s\n", "CFIR is invalid"));
+	if (iqk->iqk_cfir_real[0][0][0][0] == 0) {
+		RF_DBG(dm, DBG_RF_IQK, "[IQK]%-20s\n", "CFIR is invalid");
 		return;
 	}
 	for (path = 0; path < 2; path++) {
 		for (idx = 0; idx < 2; idx++) {
-			odm_set_bb_reg(p_dm, 0x1b00, MASKDWORD, 0xf8000008 | path << 1);
-			odm_set_bb_reg(p_dm, 0x1b2c, MASKDWORD, 0x7);
-			odm_set_bb_reg(p_dm, 0x1b38, MASKDWORD, 0x20000000);
-			odm_set_bb_reg(p_dm, 0x1b3c, MASKDWORD, 0x20000000);
-			odm_set_bb_reg(p_dm, 0x1bcc, MASKDWORD, 0x00000000);
+			odm_set_bb_reg(dm, R_0x1b00, MASKDWORD,
+				       0xf8000008 | path << 1);
+			odm_set_bb_reg(dm, R_0x1b2c, MASKDWORD, 0x7);
+			odm_set_bb_reg(dm, R_0x1b38, MASKDWORD, 0x20000000);
+			odm_set_bb_reg(dm, R_0x1b3c, MASKDWORD, 0x20000000);
+			odm_set_bb_reg(dm, R_0x1bcc, MASKDWORD, 0x00000000);
 			if (idx == 0)
-				odm_set_bb_reg(p_dm, 0x1b0c, BIT(13) | BIT(12), 0x3);
+				odm_set_bb_reg(dm, R_0x1b0c, bmask13_12, 0x3);
 			else
-				odm_set_bb_reg(p_dm, 0x1b0c, BIT(13) | BIT(12), 0x1);
-			odm_set_bb_reg(p_dm, 0x1bd4, BIT(20) | BIT(19) | BIT(18) | BIT(17) | BIT(16), 0x10);
+				odm_set_bb_reg(dm, R_0x1b0c, bmask13_12, 0x1);
+			odm_set_bb_reg(dm, R_0x1bd4, bmask20_16, 0x10);
 			for (i = 0; i < 8; i++) {
-				/*odm_write_4byte(p_dm, 0x1bd8, p_iqk_info->IQK_CFIR_real[0][path][idx][i]);*/
-				/*odm_write_4byte(p_dm, 0x1bd8, p_iqk_info->IQK_CFIR_imag[0][path][idx][i]);*/
-				odm_write_4byte(p_dm, 0x1bd8,	((0xc0000000 >> idx) + 0x3) + (i * 4) + (p_iqk_info->IQK_CFIR_real[0][path][idx][i] << 9));
-				odm_write_4byte(p_dm, 0x1bd8, ((0xc0000000 >> idx) + 0x1) + (i * 4) + (p_iqk_info->IQK_CFIR_imag[0][path][idx][i] << 9));
+#if 0
+				/*odm_write_4byte(dm, 0x1bd8, iqk->iqk_cfir_real[0][path][idx][i]);*/
+				/*odm_write_4byte(dm, 0x1bd8, iqk->iqk_cfir_imag[0][path][idx][i]);*/
+#endif
+				data = ((0xc0000000 >> idx) + 0x3) + (i * 4) +
+					(iqk->iqk_cfir_real[0][path][idx][i]
+					<< 9);
+				odm_write_4byte(dm, 0x1bd8, data);
+				data = ((0xc0000000 >> idx) + 0x1) + (i * 4) +
+					(iqk->iqk_cfir_imag[0][path][idx][i]
+					<< 9);
+				odm_write_4byte(dm, 0x1bd8, data);
 			}
 		}
-		odm_set_bb_reg(p_dm, 0x1bd8, MASKDWORD, 0x0);
-		odm_set_bb_reg(p_dm, 0x1b0c, BIT(13) | BIT(12), 0x0);
+		odm_set_bb_reg(dm, R_0x1bd8, MASKDWORD, 0x0);
+		odm_set_bb_reg(dm, R_0x1b0c, bmask13_12, 0x0);
 	}
-	PHYDM_DBG(p_dm, ODM_COMP_CALIBRATION, ("[IQK]%-20s\n", "write CFIR with default value"));
+	RF_DBG(dm, DBG_RF_IQK, "[IQK]%-20s\n", "write CFIR with default value");
 }
 
-void
-halrf_iqk_dbg_cfir_write(
-	struct PHY_DM_STRUCT			*p_dm,
-	u8	type,
-	u32 path,
-	u32 idx,
-	u32 i,
-	u32 data
-)
+void halrf_iqk_dbg_cfir_write(struct dm_struct *dm, u8 type, u32 path, u32 idx,
+			      u32 i, u32 data)
 {
-	struct _IQK_INFORMATION	*p_iqk_info = &p_dm->IQK_info;
+	struct dm_iqk_info *iqk_info = &dm->IQK_info;
+
 	if (type == 0)
-		p_iqk_info->IQK_CFIR_real[2][path][idx][i] = data;
+		iqk_info->iqk_cfir_real[2][path][idx][i] = data;
 	else
-		p_iqk_info->IQK_CFIR_imag[2][path][idx][i] = data;
+		iqk_info->iqk_cfir_imag[2][path][idx][i] = data;
 }
 
-void
-halrf_iqk_dbg_cfir_backup_show(struct PHY_DM_STRUCT *p_dm)
+void halrf_iqk_dbg_cfir_backup_show(struct dm_struct *dm)
 {
-	struct _IQK_INFORMATION *p_iqk_info = &p_dm->IQK_info;
-	u8	path, idx, i;
+	struct dm_iqk_info *iqk_info = &dm->IQK_info;
+	u8 path, idx, i;
 
-	PHYDM_DBG(p_dm, ODM_COMP_CALIBRATION, ("[IQK]%-20s\n", "backup TX/RX CFIR"));	
+	RF_DBG(dm, DBG_RF_IQK, "[IQK]%-20s\n", "backup TX/RX CFIR");
 
-	for (path = 0; path < 2; path ++) {
+	for (path = 0; path < 2; path++) {
 		for (idx = 0; idx < 2; idx++) {
-			for(i = 0; i < 8; i++) {
-				PHYDM_DBG(p_dm, ODM_COMP_CALIBRATION, ("[IQK]%-10s %-3s CFIR_real: %-2d: 0x%x\n",
-					(path == 0) ? "PATH A": "PATH B", (idx == 0) ? "TX": "RX", i, p_iqk_info->IQK_CFIR_real[2][path][idx][i]));
+			for (i = 0; i < 8; i++) {
+				RF_DBG(dm, DBG_RF_IQK,
+				       "[IQK]%-10s %-3s CFIR_real:%-2d: 0x%x\n",
+				       (path == 0) ? "PATH A" : "PATH B",
+				       (idx == 0) ? "TX" : "RX", i,
+				       iqk_info->iqk_cfir_real[2][path][idx][i])
+				       ;
 			}
-			for(i = 0; i < 8; i++) {
-				PHYDM_DBG(p_dm, ODM_COMP_CALIBRATION, ("[IQK]%-10s %-3s CFIR_img:%-2d: 0x%x\n",
-					(path == 0) ? "PATH A": "PATH B", (idx == 0) ? "TX": "RX", i, p_iqk_info->IQK_CFIR_imag[2][path][idx][i]));
+			for (i = 0; i < 8; i++) {
+				RF_DBG(dm, DBG_RF_IQK,
+				       "[IQK]%-10s %-3s CFIR_img:%-2d: 0x%x\n",
+				       (path == 0) ? "PATH A" : "PATH B",
+				       (idx == 0) ? "TX" : "RX", i,
+				       iqk_info->iqk_cfir_imag[2][path][idx][i])
+				       ;
 			}
 		}
 	}
 }
 
-void
-halrf_do_imr_test(
-	void	*p_dm_void,
-	u8  flag_imr_test
-)
+void halrf_do_imr_test(void *dm_void, u8 flag_imr_test)
 {
-	struct PHY_DM_STRUCT		*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
 
 	if (flag_imr_test != 0x0)
-		switch (p_dm->support_ic_type) {
+		switch (dm->support_ic_type) {
 #if (RTL8822B_SUPPORT == 1)
 		case ODM_RTL8822B:
+			do_imr_test_8822b(dm);
 			break;
 #endif
 #if (RTL8821C_SUPPORT == 1)
 		case ODM_RTL8821C:
-			do_imr_test_8821c(p_dm);
+			do_imr_test_8821c(dm);
 			break;
 #endif
 		default:
-		break;
+			break;
 		}
 }
 
-void halrf_iqk_debug(
-	void		*p_dm_void,
-	u32		*const dm_value,
-	u32		*_used,
-	char		*output,
-	u32		*_out_len
-)
+void halrf_iqk_debug(void *dm_void, u32 *const dm_value, u32 *_used,
+		     char *output, u32 *_out_len)
 {
-	struct PHY_DM_STRUCT		*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	struct _IQK_INFORMATION	*p_iqk_info = &p_dm->IQK_info;
-	
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+
+#if 0
 	/*dm_value[0]=0x0: backup from SRAM & show*/
 	/*dm_value[0]=0x1: write backup CFIR to SRAM*/
 	/*dm_value[0]=0x2: reload default CFIR to SRAM*/
@@ -699,273 +685,373 @@ void halrf_iqk_debug(
 	/*dm_value[0]=0x10: write backup CFIR real part*/
 	/*--> dm_value[1]:path, dm_value[2]:tx/rx, dm_value[3]:index, dm_value[4]:data*/
 	/*dm_value[0]=0x11: write backup CFIR imag*/
-	/*--> dm_value[1]:path, dm_value[2]:tx/rx, dm_value[3]:index, dm_value[4]:data*/	
+	/*--> dm_value[1]:path, dm_value[2]:tx/rx, dm_value[3]:index, dm_value[4]:data*/
 	/*dm_value[0]=0x20 :xym_read enable*/
-	/*--> dm_value[1]:0:disable, 1:enable*/ 
+	/*--> dm_value[1]:0:disable, 1:enable*/
 	/*if dm_value[0]=0x20 = enable, */
 	/*0x1:show rx_sym; 0x2: tx_xym; 0x3:gs1_xym; 0x4:gs2_sym; 0x5:rxk1_xym*/
-
+#endif
 	if (dm_value[0] == 0x0)
-		halrf_iqk_dbg_cfir_backup(p_dm);
+		halrf_iqk_dbg_cfir_backup(dm);
 	else if (dm_value[0] == 0x1)
-		halrf_iqk_dbg_cfir_backup_update(p_dm);
+		halrf_iqk_dbg_cfir_backup_update(dm);
 	else if (dm_value[0] == 0x2)
-		halrf_iqk_dbg_cfir_reload(p_dm);
+		halrf_iqk_dbg_cfir_reload(dm);
 	else if (dm_value[0] == 0x3)
-		halrf_iqk_dbg_cfir_backup_show(p_dm);
+		halrf_iqk_dbg_cfir_backup_show(dm);
 	else if (dm_value[0] == 0x10)
-		halrf_iqk_dbg_cfir_write(p_dm, 0, dm_value[1], dm_value[2], dm_value[3], dm_value[4]);
+		halrf_iqk_dbg_cfir_write(dm, 0, dm_value[1], dm_value[2],
+					 dm_value[3], dm_value[4]);
 	else if (dm_value[0] == 0x11)
-		halrf_iqk_dbg_cfir_write(p_dm, 1, dm_value[1], dm_value[2], dm_value[3], dm_value[4]);
+		halrf_iqk_dbg_cfir_write(dm, 1, dm_value[1], dm_value[2],
+					 dm_value[3], dm_value[4]);
 	else if (dm_value[0] == 0x20)
-		halrf_iqk_xym_enable(p_dm, (u8)dm_value[1]);
+		halrf_iqk_xym_enable(dm, (u8)dm_value[1]);
 	else if (dm_value[0] == 0x21)
-		halrf_iqk_xym_show(p_dm,(u8)dm_value[1]);
+		halrf_iqk_xym_show(dm, (u8)dm_value[1]);
 	else if (dm_value[0] == 0x30)
-		halrf_do_imr_test(p_dm, (u8)dm_value[1]);
+		halrf_do_imr_test(dm, (u8)dm_value[1]);
 }
 
-void
-halrf_iqk_hwtx_check(
-	void *p_dm_void,
-	boolean		is_check
-)
+void halrf_iqk_hwtx_check(void *dm_void, boolean is_check)
 {
-	struct PHY_DM_STRUCT		*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	struct _IQK_INFORMATION	*p_iqk_info = &p_dm->IQK_info;
+#if 0
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct dm_iqk_info *iqk_info = &dm->IQK_info;
 	u32 tmp_b04;
 
-	if (is_check)
-		p_iqk_info->is_hwtx = (boolean)odm_get_bb_reg(p_dm, 0xb00, BIT(8));
-	else {
-		if (p_iqk_info->is_hwtx) {
-			tmp_b04 = odm_read_4byte(p_dm, 0xb04);
-			odm_set_bb_reg(p_dm, 0xb04, BIT(3) | BIT (2), 0x0);
-			odm_write_4byte(p_dm, 0xb04, tmp_b04);
+	if (is_check) {
+		iqk_info->is_hwtx = (boolean)odm_get_bb_reg(dm, R_0xb00, BIT(8));
+	} else {
+		if (iqk_info->is_hwtx) {
+			tmp_b04 = odm_read_4byte(dm, 0xb04);
+			odm_set_bb_reg(dm, R_0xb04, BIT(3) | BIT(2), 0x0);
+			odm_write_4byte(dm, 0xb04, tmp_b04);
 		}
 	}
+#endif
 }
 
-void
-halrf_segment_iqk_trigger(
-	void			*p_dm_void,
-	boolean		clear,
-	boolean		segment_iqk
-)
+void halrf_segment_iqk_trigger(void *dm_void, boolean clear,
+			       boolean segment_iqk)
 {
-	struct PHY_DM_STRUCT		*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	struct _IQK_INFORMATION		*p_iqk_info = &p_dm->IQK_info;
-	struct _hal_rf_				*p_rf = &(p_dm->rf_table);
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct dm_iqk_info *iqk_info = &dm->IQK_info;
+	struct _hal_rf_ *rf = &dm->rf_table;
 	u64 start_time;
-	
+
 #if (DM_ODM_SUPPORT_TYPE & (ODM_WIN))
-	if (odm_check_power_status(p_dm) == false)
+	if (odm_check_power_status(dm) == false)
 		return;
 #endif
 
-	if ((p_dm->p_mp_mode != NULL) && (p_rf->p_is_con_tx != NULL) && (p_rf->p_is_single_tone != NULL) && (p_rf->p_is_carrier_suppresion != NULL))
-		if (*(p_dm->p_mp_mode) && ((*(p_rf->p_is_con_tx) || *(p_rf->p_is_single_tone) || *(p_rf->p_is_carrier_suppresion))))
+	if (dm->mp_mode &&
+	    rf->is_con_tx &&
+	    rf->is_single_tone &&
+	    rf->is_carrier_suppresion)
+		if (*dm->mp_mode &&
+		    ((*rf->is_con_tx ||
+		     *rf->is_single_tone ||
+		     *rf->is_carrier_suppresion)))
 			return;
 
 #if (DM_ODM_SUPPORT_TYPE == ODM_CE)
-	if (!(p_rf->rf_supportability & HAL_RF_IQK))
+	if (!(rf->rf_supportability & HAL_RF_IQK))
 		return;
 #endif
 
 #if DISABLE_BB_RF
 	return;
 #endif
-	if (p_iqk_info->rfk_forbidden)
+	if (iqk_info->rfk_forbidden)
 		return;
 
-	if (!p_dm->rf_calibrate_info.is_iqk_in_progress) {
-		odm_acquire_spin_lock(p_dm, RT_IQK_SPINLOCK);
-		p_dm->rf_calibrate_info.is_iqk_in_progress = true;
-		odm_release_spin_lock(p_dm, RT_IQK_SPINLOCK);
-		start_time = odm_get_current_time(p_dm);
-		p_dm->IQK_info.segment_iqk = segment_iqk;
+	if (!dm->rf_calibrate_info.is_iqk_in_progress) {
+		odm_acquire_spin_lock(dm, RT_IQK_SPINLOCK);
+		dm->rf_calibrate_info.is_iqk_in_progress = true;
+		odm_release_spin_lock(dm, RT_IQK_SPINLOCK);
+		start_time = odm_get_current_time(dm);
+		dm->IQK_info.segment_iqk = segment_iqk;
 
-		switch (p_dm->support_ic_type) {
+		switch (dm->support_ic_type) {
 #if (RTL8822B_SUPPORT == 1)
 		case ODM_RTL8822B:
-			phy_iq_calibrate_8822b(p_dm, clear, segment_iqk);
+			phy_iq_calibrate_8822b(dm, clear, segment_iqk);
+			break;
+#endif
+#if (RTL8822C_SUPPORT == 1)
+		case ODM_RTL8822C:
+			phy_iq_calibrate_8822c(dm, clear, segment_iqk);
 			break;
 #endif
 #if (RTL8821C_SUPPORT == 1)
 		case ODM_RTL8821C:
-			phy_iq_calibrate_8821c(p_dm, clear, segment_iqk);
+			phy_iq_calibrate_8821c(dm, clear, segment_iqk);
 			break;
 #endif
 #if (RTL8814B_SUPPORT == 1)
 		case ODM_RTL8814B:
 			break;
 #endif
+#if (RTL8195B_SUPPORT == 1)
+		case ODM_RTL8195B:
+			phy_iq_calibrate_8195b(dm, clear, segment_iqk);
+			break;
+#endif
+#if (RTL8198F_SUPPORT == 1)
+		case ODM_RTL8198F:
+			phy_iq_calibrate_8198f(dm, clear, segment_iqk);
+			break;
+#endif
+
+
 		default:
 			break;
 		}
-		p_dm->rf_calibrate_info.iqk_progressing_time = odm_get_progressing_time(p_dm, start_time);
-		ODM_RT_TRACE(p_dm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("[IQK]IQK progressing_time = %lld ms\n", p_dm->rf_calibrate_info.iqk_progressing_time));
-
-		odm_acquire_spin_lock(p_dm, RT_IQK_SPINLOCK);
-		p_dm->rf_calibrate_info.is_iqk_in_progress = false;
-		odm_release_spin_lock(p_dm, RT_IQK_SPINLOCK);
-	} else
-		ODM_RT_TRACE(p_dm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("== Return the IQK CMD, because RFKs in Progress ==\n"));
+		dm->rf_calibrate_info.iqk_progressing_time =
+				odm_get_progressing_time(dm, start_time);
+		RF_DBG(dm, DBG_RF_IQK, "[IQK]IQK progressing_time = %lld ms\n",
+		       dm->rf_calibrate_info.iqk_progressing_time);
+
+		odm_acquire_spin_lock(dm, RT_IQK_SPINLOCK);
+		dm->rf_calibrate_info.is_iqk_in_progress = false;
+		odm_release_spin_lock(dm, RT_IQK_SPINLOCK);
+	} else {
+		RF_DBG(dm, DBG_RF_IQK,
+		       "== Return the IQK CMD, because RFKs in Progress ==\n");
+	}
 }
 
+#endif
 
+u8 halrf_match_iqk_version(void *dm_void)
+{
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
 
-#endif
+	u32 iqk_version = 0;
+	char temp[10] = {0};
 
+	odm_move_memory(dm, temp, HALRF_IQK_VER, sizeof(temp));
+	PHYDM_SSCANF(temp + 2, DCMD_HEX, &iqk_version);
 
-void
-halrf_rf_lna_setting(
-	void	*p_dm_void,
-	enum phydm_lna_set type
-)
+	if (dm->support_ic_type == ODM_RTL8822B) {
+		if (iqk_version >= 0x24 && (odm_get_hw_img_version(dm) >= 72))
+			return 1;
+		else if ((iqk_version <= 0x23) &&
+			 (odm_get_hw_img_version(dm) <= 71))
+			return 1;
+		else
+			return 0;
+	}
+
+	if (dm->support_ic_type == ODM_RTL8821C) {
+		if (iqk_version >= 0x18 && (odm_get_hw_img_version(dm) >= 37))
+			return 1;
+		else
+			return 0;
+	}
+
+	return 1;
+}
+
+void halrf_rf_lna_setting(void *dm_void, enum halrf_lna_set type)
 {
-	struct PHY_DM_STRUCT *p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	struct _hal_rf_	 *p_rf = &(p_dm->rf_table);
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
 
-		switch (p_dm->support_ic_type) {
+	switch (dm->support_ic_type) {
 #if (RTL8188E_SUPPORT == 1)
-		case ODM_RTL8188E:
-			halrf_rf_lna_setting_8188e(p_dm, type);
-			break;
+	case ODM_RTL8188E:
+		halrf_rf_lna_setting_8188e(dm, type);
+		break;
 #endif
 #if (RTL8192E_SUPPORT == 1)
-		case ODM_RTL8192E:
-			halrf_rf_lna_setting_8192e(p_dm, type);
-			break;
+	case ODM_RTL8192E:
+		halrf_rf_lna_setting_8192e(dm, type);
+		break;
+#endif
+#if (RTL8192F_SUPPORT == 1)
+	case ODM_RTL8192F:
+		halrf_rf_lna_setting_8192f(dm, type);
+		break;
 #endif
+
 #if (RTL8723B_SUPPORT == 1)
-		case ODM_RTL8723B:
-			halrf_rf_lna_setting_8723b(p_dm, type);
-			break;
+	case ODM_RTL8723B:
+		halrf_rf_lna_setting_8723b(dm, type);
+		break;
 #endif
 #if (RTL8812A_SUPPORT == 1)
-		case ODM_RTL8812:
-			halrf_rf_lna_setting_8812a(p_dm, type);
-			break;
+	case ODM_RTL8812:
+		halrf_rf_lna_setting_8812a(dm, type);
+		break;
 #endif
 #if ((RTL8821A_SUPPORT == 1) || (RTL8881A_SUPPORT == 1))
-		case ODM_RTL8881A:
-		case ODM_RTL8821:
-			halrf_rf_lna_setting_8821a(p_dm, type);
-			break;
+	case ODM_RTL8881A:
+	case ODM_RTL8821:
+		halrf_rf_lna_setting_8821a(dm, type);
+		break;
 #endif
 #if (RTL8822B_SUPPORT == 1)
-		case ODM_RTL8822B:
-			halrf_rf_lna_setting_8822b(p_dm_void, type);
-			break;
+	case ODM_RTL8822B:
+		halrf_rf_lna_setting_8822b(dm_void, type);
+		break;
+#endif
+#if (RTL8822C_SUPPORT == 1)
+	case ODM_RTL8822C:
+		halrf_rf_lna_setting_8822c(dm_void, type);
+		break;
 #endif
 #if (RTL8821C_SUPPORT == 1)
-		case ODM_RTL8821C:
-			halrf_rf_lna_setting_8821c(p_dm_void, type);
-			break;
+	case ODM_RTL8821C:
+		halrf_rf_lna_setting_8821c(dm_void, type);
+		break;
 #endif
-		default:
+#if (RTL8814B_SUPPORT == 1)
+		case ODM_RTL8814B:
 			break;
-		}
-
+#endif
+	default:
+		break;
 	}
+}
 
-
-void
-halrf_support_ability_debug(
-	void		*p_dm_void,
-	char		input[][16],
-	u32		*_used,
-	char		*output,
-	u32		*_out_len
-)
+void halrf_support_ability_debug(void *dm_void, char input[][16], u32 *_used,
+				 char *output, u32 *_out_len)
 {
-	struct PHY_DM_STRUCT		*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	struct _hal_rf_				*p_rf = &(p_dm->rf_table);
-	u32	dm_value[10] = {0};
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct _hal_rf_ *rf = &dm->rf_table;
+	u32 dm_value[10] = {0};
 	u32 used = *_used;
 	u32 out_len = *_out_len;
-	u8	i;
+	u8 i;
+
+	for (i = 0; i < 5; i++)
+		if (input[i + 1])
+			PHYDM_SSCANF(input[i + 2], DCMD_DECIMAL, &dm_value[i]);
 
-	for (i = 0; i < 5; i++) {
-		if (input[i + 1]) {
-			PHYDM_SSCANF(input[i + 1], DCMD_DECIMAL, &dm_value[i]);
-		}
-	}
-	
-	PHYDM_SNPRINTF((output + used, out_len - used, "\n%s\n", "================================"));
 	if (dm_value[0] == 100) {
-		PHYDM_SNPRINTF((output + used, out_len - used, "[RF Supportability]\n"));
-		PHYDM_SNPRINTF((output + used, out_len - used, "%s\n", "================================"));
-		PHYDM_SNPRINTF((output + used, out_len - used, "00. (( %s ))Power Tracking\n", ((p_rf->rf_supportability & HAL_RF_TX_PWR_TRACK) ? ("V") : ("."))));
-		PHYDM_SNPRINTF((output + used, out_len - used, "01. (( %s ))IQK\n", ((p_rf->rf_supportability & HAL_RF_IQK) ? ("V") : ("."))));
-		PHYDM_SNPRINTF((output + used, out_len - used, "02. (( %s ))LCK\n", ((p_rf->rf_supportability & HAL_RF_LCK) ? ("V") : ("."))));
-		PHYDM_SNPRINTF((output + used, out_len - used, "03. (( %s ))DPK\n", ((p_rf->rf_supportability & HAL_RF_DPK) ? ("V") : ("."))));
-		PHYDM_SNPRINTF((output + used, out_len - used, "04. (( %s ))HAL_RF_TXGAPK\n", ((p_rf->rf_supportability & HAL_RF_TXGAPK) ? ("V") : ("."))));
-		PHYDM_SNPRINTF((output + used, out_len - used, "%s\n", "================================"));		
+		PDM_SNPF(out_len, used, output + used, out_len - used,
+			 "\n[RF Supportability]\n");
+		PDM_SNPF(out_len, used, output + used, out_len - used,
+			 "00. (( %s ))Power Tracking\n",
+			 ((rf->rf_supportability & HAL_RF_TX_PWR_TRACK) ?
+			 ("V") : (".")));
+		PDM_SNPF(out_len, used, output + used, out_len - used,
+			 "01. (( %s ))IQK\n",
+			 ((rf->rf_supportability & HAL_RF_IQK) ? ("V") :
+			 (".")));
+		PDM_SNPF(out_len, used, output + used, out_len - used,
+			 "02. (( %s ))LCK\n",
+			 ((rf->rf_supportability & HAL_RF_LCK) ? ("V") :
+			 (".")));
+		PDM_SNPF(out_len, used, output + used, out_len - used,
+			 "03. (( %s ))DPK\n",
+			 ((rf->rf_supportability & HAL_RF_DPK) ? ("V") :
+			 (".")));
+		PDM_SNPF(out_len, used, output + used, out_len - used,
+			 "04. (( %s ))HAL_RF_TXGAPK\n",
+			 ((rf->rf_supportability & HAL_RF_TXGAPK) ? ("V") :
+			 (".")));
+#if (RTL8192F_SUPPORT == 1)
+		PDM_SNPF(out_len, used, output + used, out_len - used,
+			 "07. (( %s ))HAL_2GBAND_SHIFT\n",
+			 ((rf->rf_supportability & HAL_2GBAND_SHIFT) ? ("V") :
+			 (".")));
+#endif
+	} else {
+		if (dm_value[1] == 1) /* enable */
+			rf->rf_supportability |= BIT(dm_value[0]);
+		else if (dm_value[1] == 2) /* disable */
+			rf->rf_supportability &= ~(BIT(dm_value[0]));
+		else
+			PDM_SNPF(out_len, used, output + used, out_len - used,
+				 "[Warning!!!]  1:enable,  2:disable\n");
 	}
-	else {
-
-		if (dm_value[1] == 1) { /* enable */
-			p_rf->rf_supportability |= BIT(dm_value[0]) ;
-		} else if (dm_value[1] == 2) /* disable */
-			p_rf->rf_supportability &= ~(BIT(dm_value[0])) ;
-		else {
-			PHYDM_SNPRINTF((output + used, out_len - used, "%s\n", "[Warning!!!]  1:enable,  2:disable"));
+	PDM_SNPF(out_len, used, output + used, out_len - used,
+		 "\nCurr-RF_supportability =  0x%x\n\n", rf->rf_supportability);
+
+	*_used = used;
+	*_out_len = out_len;
+}
+
+void halrf_support_band_shift_debug(void *dm_void, char input[][16], u32 *_used,
+				    char *output, u32 *_out_len)
+{
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct _hal_rf_ *rf = &dm->rf_table;
+	//u32 band_value[2] = {00};
+	u32 dm_value[10] = {0};
+	u32 used = *_used;
+	u32 out_len = *_out_len;
+	u8 i;
+
+#if (RTL8192F_SUPPORT == 1)
+	for (i = 0; i < 7; i++)
+		if (input[i + 1])
+			PHYDM_SSCANF(input[i + 2], DCMD_DECIMAL, &dm_value[i]);
+
+	if (!(rf->rf_supportability & HAL_2GBAND_SHIFT)) {
+		PDM_SNPF(out_len, used, output + used, out_len - used,
+			 "\nCurr-RF_supportability[07. (( . ))HAL_2GBAND_SHIFT]\nNo RF Band Shift,default: 2.4G!\n");
+	} else {
+		if (dm_value[0] == 01) {
+			rf->rf_shift_band = HAL_RF_2P3;
+			PDM_SNPF(out_len, used, output + used, out_len - used,
+				 "\n[rf_shift_band] = %d\nRF Band Shift to 2.3G!\n",
+				 rf->rf_shift_band);
+		} else if (dm_value[0] == 02) {
+			rf->rf_shift_band = HAL_RF_2P5;
+			PDM_SNPF(out_len, used, output + used, out_len - used,
+				 "\n[rf_shift_band] = %d\nRF Band Shift to 2.5G!\n",
+				 rf->rf_shift_band);
+		} else {
+			rf->rf_shift_band = HAL_RF_2P4;
+			PDM_SNPF(out_len, used, output + used, out_len - used,
+				 "\n[rf_shift_band] = %d\nNo RF Band Shift,default: 2.4G!\n",
+				 rf->rf_shift_band);
 		}
 	}
-	PHYDM_SNPRINTF((output + used, out_len - used, "Curr-RF_supportability =  0x%x\n", p_rf->rf_supportability));
-	PHYDM_SNPRINTF((output + used, out_len - used, "%s\n", "================================"));
-
 	*_used = used;
 	*_out_len = out_len;
+#endif
 }
 
-void
-halrf_cmn_info_init(
-	void		*p_dm_void,
-enum halrf_cmninfo_init_e	cmn_info,
-	u32			value
-)
+void halrf_cmn_info_init(void *dm_void, enum halrf_cmninfo_init cmn_info,
+			 u32 value)
 {
-	struct PHY_DM_STRUCT		*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	struct _hal_rf_				*p_rf = &(p_dm->rf_table);
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct _hal_rf_ *rf = &dm->rf_table;
 
-	switch	(cmn_info) {
-	case	HALRF_CMNINFO_EEPROM_THERMAL_VALUE:
-		p_rf->eeprom_thermal = (u8)value;
+	switch (cmn_info) {
+	case HALRF_CMNINFO_EEPROM_THERMAL_VALUE:
+		rf->eeprom_thermal = (u8)value;
 		break;
-	case	HALRF_CMNINFO_FW_VER:
-		p_rf->fw_ver = (u32)value;
+	case HALRF_CMNINFO_PWT_TYPE:
+		rf->pwt_type = (u8)value;
 		break;
 	default:
 		break;
 	}
 }
 
-
-void
-halrf_cmn_info_hook(
-	void		*p_dm_void,
-enum halrf_cmninfo_hook_e cmn_info,
-	void		*p_value
-)
+void halrf_cmn_info_hook(void *dm_void, enum halrf_cmninfo_hook cmn_info,
+			 void *value)
 {
-	struct PHY_DM_STRUCT		*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	struct _hal_rf_				*p_rf = &(p_dm->rf_table);
-	
-	switch	(cmn_info) {
-	case	HALRF_CMNINFO_CON_TX:
-		p_rf->p_is_con_tx = (boolean *)p_value;
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct _hal_rf_ *rf = &dm->rf_table;
+
+	switch (cmn_info) {
+	case HALRF_CMNINFO_CON_TX:
+		rf->is_con_tx = (boolean *)value;
 		break;
-	case	HALRF_CMNINFO_SINGLE_TONE:
-		p_rf->p_is_single_tone = (boolean *)p_value;		
+	case HALRF_CMNINFO_SINGLE_TONE:
+		rf->is_single_tone = (boolean *)value;
 		break;
-	case	HALRF_CMNINFO_CARRIER_SUPPRESSION:
-		p_rf->p_is_carrier_suppresion = (boolean *)p_value;		
+	case HALRF_CMNINFO_CARRIER_SUPPRESSION:
+		rf->is_carrier_suppresion = (boolean *)value;
 		break;
-	case	HALRF_CMNINFO_MP_RATE_INDEX:
-		p_rf->p_mp_rate_index = (u8 *)p_value;
+	case HALRF_CMNINFO_MP_RATE_INDEX:
+		rf->mp_rate_index = (u8 *)value;
 		break;
 	default:
 		/*do nothing*/
@@ -973,240 +1059,293 @@ enum halrf_cmninfo_hook_e cmn_info,
 	}
 }
 
-void
-halrf_cmn_info_set(
-	void		*p_dm_void,
-	u32			cmn_info,
-	u64			value
-)
+void halrf_cmn_info_set(void *dm_void, u32 cmn_info, u64 value)
 {
-	/*  */
 	/* This init variable may be changed in run time. */
-	/*  */
-	struct PHY_DM_STRUCT		*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	struct _hal_rf_				*p_rf = &(p_dm->rf_table);
-	
-	switch	(cmn_info) {
-
-		case	HALRF_CMNINFO_ABILITY:
-			p_rf->rf_supportability = (u32)value;
-			break;
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct _hal_rf_ *rf = &dm->rf_table;
 
-		case	HALRF_CMNINFO_DPK_EN:
-			p_rf->dpk_en = (u8)value;
-			break;
-		case HALRF_CMNINFO_RFK_FORBIDDEN :
-			p_dm->IQK_info.rfk_forbidden = (boolean)value;
-			break;
-		#if (RTL8814A_SUPPORT == 1 || RTL8822B_SUPPORT == 1 || RTL8821C_SUPPORT == 1)
-		case HALRF_CMNINFO_IQK_SEGMENT:
-			p_dm->IQK_info.segment_iqk = (boolean)value;
-			break;
-		#endif
-		case HALRF_CMNINFO_RATE_INDEX:
-			p_rf->p_rate_index = (u32)value;
-			break;
+	switch (cmn_info) {
+	case HALRF_CMNINFO_ABILITY:
+		rf->rf_supportability = (u32)value;
+		break;
+
+	case HALRF_CMNINFO_DPK_EN:
+		rf->dpk_en = (u8)value;
+		break;
+	case HALRF_CMNINFO_RFK_FORBIDDEN:
+		dm->IQK_info.rfk_forbidden = (boolean)value;
+		break;
+#if (RTL8814A_SUPPORT == 1 || RTL8822B_SUPPORT == 1 || \
+	RTL8821C_SUPPORT == 1 || RTL8195B_SUPPORT == 1 ||\
+	RTL8814B_SUPPORT == 1 || RTL8822C_SUPPORT == 1)
+	case HALRF_CMNINFO_IQK_SEGMENT:
+		dm->IQK_info.segment_iqk = (boolean)value;
+		break;
+#endif
+	case HALRF_CMNINFO_RATE_INDEX:
+		rf->p_rate_index = (u32)value;
+		break;
 #if (DM_ODM_SUPPORT_TYPE & ODM_WIN)
-		case	HALRF_CMNINFO_MP_PSD_POINT:
-			p_rf->halrf_psd_data.point = (u32)value;
-			break;
-		case	HALRF_CMNINFO_MP_PSD_START_POINT:
-			p_rf->halrf_psd_data.start_point = (u32)value;
-			break;
-		case	HALRF_CMNINFO_MP_PSD_STOP_POINT:
-			p_rf->halrf_psd_data.stop_point = (u32)value;
-			break;
-		case	HALRF_CMNINFO_MP_PSD_AVERAGE:
-			p_rf->halrf_psd_data.average = (u32)value;
-			break;
+	case HALRF_CMNINFO_MP_PSD_POINT:
+		rf->halrf_psd_data.point = (u32)value;
+		break;
+	case HALRF_CMNINFO_MP_PSD_START_POINT:
+		rf->halrf_psd_data.start_point = (u32)value;
+		break;
+	case HALRF_CMNINFO_MP_PSD_STOP_POINT:
+		rf->halrf_psd_data.stop_point = (u32)value;
+		break;
+	case HALRF_CMNINFO_MP_PSD_AVERAGE:
+		rf->halrf_psd_data.average = (u32)value;
+		break;
 #endif
-		default:
-			/* do nothing */
-			break;
+	default:
+		/* do nothing */
+		break;
 	}
 }
 
-u64
-halrf_cmn_info_get(
-	void		*p_dm_void,
-	u32			cmn_info
-)
+u64 halrf_cmn_info_get(void *dm_void, u32 cmn_info)
 {
-	/*  */
 	/* This init variable may be changed in run time. */
-	/*  */
-	struct PHY_DM_STRUCT		*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	struct _hal_rf_				*p_rf = &(p_dm->rf_table);
-	u64	return_value = 0;
-	
-	switch	(cmn_info) {
-
-		case	HALRF_CMNINFO_ABILITY:
-			return_value = (u32)p_rf->rf_supportability;
-			break;
-		case HALRF_CMNINFO_RFK_FORBIDDEN :
-			return_value = p_dm->IQK_info.rfk_forbidden;
-			break;
-		#if (RTL8814A_SUPPORT == 1 || RTL8822B_SUPPORT == 1 || RTL8821C_SUPPORT == 1)
-		case HALRF_CMNINFO_IQK_SEGMENT:
-			return_value = p_dm->IQK_info.segment_iqk;
-			break;
-		#endif
-		default:
-			/* do nothing */
-			break;
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct _hal_rf_ *rf = &dm->rf_table;
+	u64 return_value = 0;
+
+	switch (cmn_info) {
+	case HALRF_CMNINFO_ABILITY:
+		return_value = (u32)rf->rf_supportability;
+		break;
+	case HALRF_CMNINFO_RFK_FORBIDDEN:
+		return_value = dm->IQK_info.rfk_forbidden;
+		break;
+#if (RTL8814A_SUPPORT == 1 || RTL8822B_SUPPORT == 1 || \
+	RTL8821C_SUPPORT == 1 || RTL8195B_SUPPORT == 1 ||\
+	RTL8814B_SUPPORT == 1  || RTL8822C_SUPPORT == 1)
+	case HALRF_CMNINFO_IQK_SEGMENT:
+		return_value = dm->IQK_info.segment_iqk;
+		break;
+#endif
+	default:
+		/* do nothing */
+		break;
 	}
 
-	return	return_value;
+	return return_value;
 }
 
-void
-halrf_supportability_init_mp(
-	void		*p_dm_void
-)
+void halrf_supportability_init_mp(void *dm_void)
 {
-	struct PHY_DM_STRUCT		*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	struct _hal_rf_				*p_rf = &(p_dm->rf_table);
-
-	switch (p_dm->support_ic_type) {
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct _hal_rf_ *rf = &dm->rf_table;
 
+	switch (dm->support_ic_type) {
 	case ODM_RTL8814B:
-		#if (RTL8814B_SUPPORT == 1) 
-		p_rf->rf_supportability = 
-			HAL_RF_TX_PWR_TRACK	|
-			HAL_RF_IQK				|
-			HAL_RF_LCK				|
-			/*HAL_RF_DPK				|*/
+#if (RTL8814B_SUPPORT == 1)
+		rf->rf_supportability =
+			HAL_RF_TX_PWR_TRACK |
+			HAL_RF_IQK |
+			HAL_RF_LCK |
+			/*@HAL_RF_DPK |*/
 			0;
-		#endif
+#endif
 		break;
-	#if (RTL8822B_SUPPORT == 1) 
+#if (RTL8822B_SUPPORT == 1)
 	case ODM_RTL8822B:
-		p_rf->rf_supportability = 
-			HAL_RF_TX_PWR_TRACK	|
-			HAL_RF_IQK				|
-			HAL_RF_LCK				|
-			/*HAL_RF_DPK				|*/
+		rf->rf_supportability =
+			HAL_RF_TX_PWR_TRACK |
+			HAL_RF_IQK |
+			HAL_RF_LCK |
+			/*@HAL_RF_DPK |*/
 			0;
 		break;
-	#endif
-
-	#if (RTL8821C_SUPPORT == 1) 
+#endif
+#if (RTL8822C_SUPPORT == 1)
+	case ODM_RTL8822C:
+		rf->rf_supportability =
+			HAL_RF_TX_PWR_TRACK |
+			HAL_RF_IQK |
+			HAL_RF_LCK |
+			/*@HAL_RF_DPK |*/
+			0;
+		break;
+#endif
+#if (RTL8821C_SUPPORT == 1)
 	case ODM_RTL8821C:
-		p_rf->rf_supportability = 
-			HAL_RF_TX_PWR_TRACK	|
-			HAL_RF_IQK				|
-			HAL_RF_LCK				|
-			/*HAL_RF_DPK				|*/
-			/*HAL_RF_TXGAPK			|*/
+		rf->rf_supportability =
+			HAL_RF_TX_PWR_TRACK |
+			HAL_RF_IQK |
+			HAL_RF_LCK |
+			/*@HAL_RF_DPK |*/
+			/*@HAL_RF_TXGAPK |*/
+			0;
+		break;
+#endif
+#if (RTL8192F_SUPPORT == 1)
+	case ODM_RTL8192F:
+		rf->rf_supportability =
+			HAL_RF_TX_PWR_TRACK |
+			HAL_RF_IQK |
+			HAL_RF_LCK |
+			/*@HAL_2GBAND_SHIFT |*/
+			/*@HAL_RF_DPK |*/
+			/*@HAL_RF_TXGAPK |*/
+			0;
+		break;
+#endif
+#if (RTL8195B_SUPPORT == 1)
+	case ODM_RTL8195B:
+		rf->rf_supportability =
+			HAL_RF_TX_PWR_TRACK |
+			HAL_RF_IQK |
+			HAL_RF_LCK |
+			HAL_RF_DPK |
+			HAL_RF_TXGAPK |
 			0;
 		break;
-	#endif
+#endif
 
 	default:
-		p_rf->rf_supportability = 
-			HAL_RF_TX_PWR_TRACK	|
-			HAL_RF_IQK				|
-			HAL_RF_LCK				|
-			/*HAL_RF_DPK				|*/
-			/*HAL_RF_TXGAPK			|*/
+		rf->rf_supportability =
+			HAL_RF_TX_PWR_TRACK |
+			HAL_RF_IQK |
+			HAL_RF_LCK |
+			/*@HAL_RF_DPK |*/
+			/*@HAL_RF_TXGAPK |*/
 			0;
 		break;
-
 	}
 
-	ODM_RT_TRACE(p_dm, ODM_COMP_INIT, ODM_DBG_LOUD, ("IC = ((0x%x)), RF_Supportability Init MP = ((0x%x))\n", p_dm->support_ic_type, p_rf->rf_supportability));
+	RF_DBG(dm, DBG_RF_INIT,
+	       "IC = ((0x%x)), RF_Supportability Init MP = ((0x%x))\n",
+	       dm->support_ic_type, rf->rf_supportability);
 }
 
-void
-halrf_supportability_init(
-	void		*p_dm_void
-)
+void halrf_supportability_init(void *dm_void)
 {
-	struct PHY_DM_STRUCT		*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	struct _hal_rf_				*p_rf = &(p_dm->rf_table);
-
-	switch (p_dm->support_ic_type) {
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct _hal_rf_ *rf = &dm->rf_table;
 
+	switch (dm->support_ic_type) {
 	case ODM_RTL8814B:
-		#if (RTL8814B_SUPPORT == 1) 
-		p_rf->rf_supportability = 
-			HAL_RF_TX_PWR_TRACK	|
-			HAL_RF_IQK				|
-			HAL_RF_LCK				|
-			/*HAL_RF_DPK				|*/
+#if (RTL8814B_SUPPORT == 1)
+		rf->rf_supportability =
+			HAL_RF_TX_PWR_TRACK |
+			HAL_RF_IQK |
+			HAL_RF_LCK |
+			/*@HAL_RF_DPK |*/
 			0;
-		#endif
+#endif
 		break;
-	#if (RTL8822B_SUPPORT == 1) 
+#if (RTL8822B_SUPPORT == 1)
 	case ODM_RTL8822B:
-		p_rf->rf_supportability = 
-			HAL_RF_TX_PWR_TRACK	|
-			HAL_RF_IQK				|
-			HAL_RF_LCK				|
-			/*HAL_RF_DPK				|*/
+		rf->rf_supportability =
+			HAL_RF_TX_PWR_TRACK |
+			HAL_RF_IQK |
+			HAL_RF_LCK |
+			/*@HAL_RF_DPK |*/
 			0;
 		break;
-	#endif
-
-	#if (RTL8821C_SUPPORT == 1) 
+#endif
+#if (RTL8822C_SUPPORT == 1)
+	case ODM_RTL8822C:
+		rf->rf_supportability =
+			HAL_RF_TX_PWR_TRACK |
+			HAL_RF_IQK |
+			HAL_RF_LCK |
+			HAL_RF_DPK |
+			0;
+		break;
+#endif
+#if (RTL8821C_SUPPORT == 1)
 	case ODM_RTL8821C:
-		p_rf->rf_supportability = 
-			HAL_RF_TX_PWR_TRACK	|
-			HAL_RF_IQK				|
-			HAL_RF_LCK				|
-			/*HAL_RF_DPK				|*/		
-			/*HAL_RF_TXGAPK				|*/
+		rf->rf_supportability =
+			HAL_RF_TX_PWR_TRACK |
+			HAL_RF_IQK |
+			HAL_RF_LCK |
+			/*@HAL_RF_DPK |*/
+			/*@HAL_RF_TXGAPK |*/
 			0;
 		break;
-	#endif
+#endif
+#if (RTL8192F_SUPPORT == 1)
+	case ODM_RTL8192F:
+		rf->rf_supportability =
+			HAL_RF_TX_PWR_TRACK |
+			HAL_RF_IQK |
+			HAL_RF_LCK |
+			/*HAL_2GBAND_SHIFT |*/
+			/*@HAL_RF_DPK |*/
+			/*@HAL_RF_TXGAPK |*/
+			0;
+		break;
+#endif
+#if (RTL8195B_SUPPORT == 1)
+	case ODM_RTL8195B:
+		rf->rf_supportability =
+			HAL_RF_TX_PWR_TRACK |
+			HAL_RF_IQK |
+			HAL_RF_LCK |
+			HAL_RF_DPK |
+			HAL_RF_TXGAPK |
+			0;
+		break;
+#endif
 
 	default:
-		p_rf->rf_supportability = 
-			HAL_RF_TX_PWR_TRACK	|
-			HAL_RF_IQK				|
-			HAL_RF_LCK				|
-			/*HAL_RF_DPK				|*/
+		rf->rf_supportability =
+			HAL_RF_TX_PWR_TRACK |
+			HAL_RF_IQK |
+			HAL_RF_LCK |
+			/*@HAL_RF_DPK |*/
 			0;
 		break;
-
 	}
 
-	ODM_RT_TRACE(p_dm, ODM_COMP_INIT, ODM_DBG_LOUD, ("IC = ((0x%x)), RF_Supportability Init = ((0x%x))\n", p_dm->support_ic_type, p_rf->rf_supportability));
+	RF_DBG(dm, DBG_RF_INIT,
+	       "IC = ((0x%x)), RF_Supportability Init = ((0x%x))\n",
+	       dm->support_ic_type, rf->rf_supportability);
 }
 
-void
-halrf_watchdog(
-	void			*p_dm_void
-)
+void halrf_watchdog(void *dm_void)
 {
-	struct PHY_DM_STRUCT		*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	phydm_rf_watchdog(p_dm);
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+#if 0
+	/*RF_DBG(dm, DBG_RF_TMP, "%s\n", __func__);*/
+#endif
+
+	phydm_rf_watchdog(dm);
 }
+
 #if 0
 void
 halrf_iqk_init(
-	void			*p_dm_void
+	void			*dm_void
 )
 {
-	struct PHY_DM_STRUCT		*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	struct _hal_rf_				*p_rf = &(p_dm->rf_table);
-
-	switch (p_dm->support_ic_type) {
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct _hal_rf_ *rf = &dm->rf_table;
 
-	#if (RTL8814B_SUPPORT == 1) 
+	switch (dm->support_ic_type) {
+#if (RTL8814B_SUPPORT == 1)
 	case ODM_RTL8814B:
 		break;
-	#endif
-	#if (RTL8822B_SUPPORT == 1) 
+#endif
+#if (RTL8822B_SUPPORT == 1)
 	case ODM_RTL8822B:
-		_iq_calibrate_8822b_init(p_dm);
+		_iq_calibrate_8822b_init(dm);
 		break;
-	#endif
-	#if (RTL8821C_SUPPORT == 1) 
+#endif
+#if (RTL8822C_SUPPORT == 1)
+	case ODM_RTL8822C:
+		_iq_calibrate_8822c_init(dm);
+		break;
+#endif
+#if (RTL8821C_SUPPORT == 1)
 	case ODM_RTL8821C:
 		break;
-	#endif
+#endif
 
 	default:
 		break;
@@ -1214,272 +1353,1043 @@ halrf_iqk_init(
 }
 #endif
 
+void halrf_dack_trigger(void *dm_void)
+{
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct _hal_rf_ *rf = &dm->rf_table;
 
-void
-halrf_iqk_trigger(
-	void			*p_dm_void,
-	boolean		is_recovery
-)
+	u64 start_time;
+
+	start_time = odm_get_current_time(dm);
+
+	switch (dm->support_ic_type) {
+#if (RTL8822C_SUPPORT == 1)
+	case ODM_RTL8822C:
+		halrf_dac_cal_8822c(dm);
+		break;
+#endif
+	default:
+		break;
+	}
+	rf->dpk_progressing_time = odm_get_progressing_time(dm, start_time);
+	RF_DBG(dm, DBG_RF_DACK, "[DACK]DACK progressing_time = %lld ms\n",
+	       rf->dpk_progressing_time);
+}
+
+void halrf_iqk_trigger(void *dm_void, boolean is_recovery)
 {
-	struct PHY_DM_STRUCT		*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	struct _IQK_INFORMATION		*p_iqk_info = &p_dm->IQK_info;
-	struct _hal_rf_				*p_rf = &(p_dm->rf_table);
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct dm_iqk_info *iqk_info = &dm->IQK_info;
+	struct dm_dpk_info *dpk_info = &dm->dpk_info;
+	struct _hal_rf_ *rf = &dm->rf_table;
 	u64 start_time;
 
 #if (DM_ODM_SUPPORT_TYPE & (ODM_WIN))
-	if (odm_check_power_status(p_dm) == false)
+	if (odm_check_power_status(dm) == false)
 		return;
 #endif
 
-	if ((p_dm->p_mp_mode != NULL) && (p_rf->p_is_con_tx != NULL) && (p_rf->p_is_single_tone != NULL) && (p_rf->p_is_carrier_suppresion != NULL))
-		if (*(p_dm->p_mp_mode) && ((*(p_rf->p_is_con_tx) || *(p_rf->p_is_single_tone) || *(p_rf->p_is_carrier_suppresion))))
+	if (dm->mp_mode &&
+	    rf->is_con_tx &&
+	    rf->is_single_tone &&
+	    rf->is_carrier_suppresion)
+		if (*dm->mp_mode &&
+		    ((*rf->is_con_tx ||
+		     *rf->is_single_tone ||
+		     *rf->is_carrier_suppresion)))
 			return;
 
-#if (DM_ODM_SUPPORT_TYPE == ODM_CE)
-	if (!(p_rf->rf_supportability & HAL_RF_IQK))
+	if (!(rf->rf_supportability & HAL_RF_IQK))
 		return;
-#endif
 
 #if DISABLE_BB_RF
 	return;
 #endif
 
-	if (p_iqk_info->rfk_forbidden)
+	if (iqk_info->rfk_forbidden)
 		return;
 
-	if (!p_dm->rf_calibrate_info.is_iqk_in_progress) {
-		odm_acquire_spin_lock(p_dm, RT_IQK_SPINLOCK);
-		p_dm->rf_calibrate_info.is_iqk_in_progress = true;
-		odm_release_spin_lock(p_dm, RT_IQK_SPINLOCK);
-		start_time = odm_get_current_time(p_dm);
-		switch (p_dm->support_ic_type) {
-#if (RTL8188E_SUPPORT == 1) 
+	if (!dm->rf_calibrate_info.is_iqk_in_progress) {
+		odm_acquire_spin_lock(dm, RT_IQK_SPINLOCK);
+		dm->rf_calibrate_info.is_iqk_in_progress = true;
+		odm_release_spin_lock(dm, RT_IQK_SPINLOCK);
+		start_time = odm_get_current_time(dm);
+		switch (dm->support_ic_type) {
+#if (RTL8188E_SUPPORT == 1)
 		case ODM_RTL8188E:
-			phy_iq_calibrate_8188e(p_dm, is_recovery);
+			phy_iq_calibrate_8188e(dm, is_recovery);
 			break;
 #endif
-#if (RTL8188F_SUPPORT == 1) 
+#if (RTL8188F_SUPPORT == 1)
 		case ODM_RTL8188F:
-			phy_iq_calibrate_8188f(p_dm, is_recovery);
+			phy_iq_calibrate_8188f(dm, is_recovery);
 			break;
 #endif
-#if (RTL8192E_SUPPORT == 1) 
+#if (RTL8192E_SUPPORT == 1)
 		case ODM_RTL8192E:
-			phy_iq_calibrate_8192e(p_dm, is_recovery);
+			phy_iq_calibrate_8192e(dm, is_recovery);
 			break;
 #endif
-#if (RTL8197F_SUPPORT == 1) 
+#if (RTL8197F_SUPPORT == 1)
 		case ODM_RTL8197F:
-			phy_iq_calibrate_8197f(p_dm, is_recovery);
+			phy_iq_calibrate_8197f(dm, is_recovery);
+			break;
+#endif
+#if (RTL8192F_SUPPORT == 1)
+		case ODM_RTL8192F:
+			phy_iq_calibrate_8192f(dm, is_recovery);
 			break;
 #endif
-#if (RTL8703B_SUPPORT == 1) 
+#if (RTL8703B_SUPPORT == 1)
 		case ODM_RTL8703B:
-			phy_iq_calibrate_8703b(p_dm, is_recovery);
+			phy_iq_calibrate_8703b(dm, is_recovery);
 			break;
 #endif
-#if (RTL8710B_SUPPORT == 1) 
+#if (RTL8710B_SUPPORT == 1)
 		case ODM_RTL8710B:
-			phy_iq_calibrate_8710b(p_dm, is_recovery);
+			phy_iq_calibrate_8710b(dm, is_recovery);
 			break;
 #endif
-#if (RTL8723B_SUPPORT == 1) 
+#if (RTL8723B_SUPPORT == 1)
 		case ODM_RTL8723B:
-			phy_iq_calibrate_8723b(p_dm, is_recovery);
+			phy_iq_calibrate_8723b(dm, is_recovery);
 			break;
 #endif
-#if (RTL8723D_SUPPORT == 1) 
+#if (RTL8723D_SUPPORT == 1)
 		case ODM_RTL8723D:
-			phy_iq_calibrate_8723d(p_dm, is_recovery);
+			phy_iq_calibrate_8723d(dm, is_recovery);
 			break;
 #endif
-#if (RTL8812A_SUPPORT == 1) 
+#if (RTL8721D_SUPPORT == 1)
+		case ODM_RTL8721D:
+			phy_iq_calibrate_8721d(dm, is_recovery);
+			break;
+#endif
+#if (RTL8812A_SUPPORT == 1)
 		case ODM_RTL8812:
-			phy_iq_calibrate_8812a(p_dm, is_recovery);
+			phy_iq_calibrate_8812a(dm, is_recovery);
 			break;
 #endif
-#if (RTL8821A_SUPPORT == 1) 
+#if (RTL8821A_SUPPORT == 1)
 		case ODM_RTL8821:
-			phy_iq_calibrate_8821a(p_dm, is_recovery);
+			phy_iq_calibrate_8821a(dm, is_recovery);
 			break;
 #endif
-#if (RTL8814A_SUPPORT == 1) 
+#if (RTL8814A_SUPPORT == 1)
 		case ODM_RTL8814A:
-			phy_iq_calibrate_8814a(p_dm, is_recovery);
+			phy_iq_calibrate_8814a(dm, is_recovery);
 			break;
 #endif
-#if (RTL8822B_SUPPORT == 1) 
+#if (RTL8822B_SUPPORT == 1)
 		case ODM_RTL8822B:
-			phy_iq_calibrate_8822b(p_dm, false, false);
+			phy_iq_calibrate_8822b(dm, false, false);
+			break;
+#endif
+#if (RTL8822C_SUPPORT == 1)
+		case ODM_RTL8822C:
+			phy_iq_calibrate_8822c(dm, false, false);
+			/*halrf_do_tssi_8822c(dm);*/
+			do_dpk_8822c(dm);
 			break;
 #endif
-#if (RTL8821C_SUPPORT == 1) 
+#if (RTL8821C_SUPPORT == 1)
 		case ODM_RTL8821C:
-			phy_iq_calibrate_8821c(p_dm, false, false);
+			phy_iq_calibrate_8821c(dm, false, false);
 			break;
 #endif
-#if (RTL8814B_SUPPORT == 1) 
+#if (RTL8814B_SUPPORT == 1)
 		case ODM_RTL8814B:
+			phy_iq_calibrate_8814b(dm, false, false);
 			break;
 #endif
+#if (RTL8195B_SUPPORT == 1)
+		case ODM_RTL8195B:
+			phy_iq_calibrate_8195b(dm, false, false);
+			break;
+#endif
+#if (RTL8198F_SUPPORT == 1)
+		case ODM_RTL8198F:
+			phy_iq_calibrate_8198f(dm, false, false);
+			break;
+#endif
+
 		default:
 			break;
 		}
-		p_dm->rf_calibrate_info.iqk_progressing_time = odm_get_progressing_time(p_dm, start_time);
-		ODM_RT_TRACE(p_dm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("[IQK]IQK progressing_time = %lld ms\n", p_dm->rf_calibrate_info.iqk_progressing_time));
-
-		odm_acquire_spin_lock(p_dm, RT_IQK_SPINLOCK);
-		p_dm->rf_calibrate_info.is_iqk_in_progress = false;
-		odm_release_spin_lock(p_dm, RT_IQK_SPINLOCK);
-	} else
-		ODM_RT_TRACE(p_dm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("== Return the IQK CMD, because RFKs in Progress ==\n"));
+		dm->rf_calibrate_info.iqk_progressing_time =
+				odm_get_progressing_time(dm, start_time);
+		RF_DBG(dm, DBG_RF_IQK, "[IQK]IQK progressing_time = %lld ms\n",
+		       dm->rf_calibrate_info.iqk_progressing_time);
+
+		odm_acquire_spin_lock(dm, RT_IQK_SPINLOCK);
+		dm->rf_calibrate_info.is_iqk_in_progress = false;
+		odm_release_spin_lock(dm, RT_IQK_SPINLOCK);
+	} else {
+		RF_DBG(dm, DBG_RF_IQK,
+		       "== Return the IQK CMD, because RFKs in Progress ==\n");
+	}
 }
 
-
-
-void
-halrf_lck_trigger(
-	void			*p_dm_void
-)
+void halrf_lck_trigger(void *dm_void)
 {
-	struct PHY_DM_STRUCT		*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	struct _IQK_INFORMATION		*p_iqk_info = &p_dm->IQK_info;
-	struct _hal_rf_				*p_rf = &(p_dm->rf_table);
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct dm_iqk_info *iqk_info = &dm->IQK_info;
+	struct _hal_rf_ *rf = &dm->rf_table;
 	u64 start_time;
-	
+
 #if (DM_ODM_SUPPORT_TYPE & (ODM_WIN))
-	if (odm_check_power_status(p_dm) == false)
+	if (odm_check_power_status(dm) == false)
 		return;
 #endif
 
-	if ((p_dm->p_mp_mode != NULL) && (p_rf->p_is_con_tx != NULL) && (p_rf->p_is_single_tone != NULL) && (p_rf->p_is_carrier_suppresion != NULL))
-		if (*(p_dm->p_mp_mode) && ((*(p_rf->p_is_con_tx) || *(p_rf->p_is_single_tone) || *(p_rf->p_is_carrier_suppresion))))
+	if (dm->mp_mode &&
+	    rf->is_con_tx &&
+	    rf->is_single_tone &&
+	    rf->is_carrier_suppresion)
+		if (*dm->mp_mode &&
+		    ((*rf->is_con_tx ||
+		     *rf->is_single_tone ||
+		     *rf->is_carrier_suppresion)))
 			return;
 
-#if (DM_ODM_SUPPORT_TYPE == ODM_CE)
-	if (!(p_rf->rf_supportability & HAL_RF_LCK))
+	if (!(rf->rf_supportability & HAL_RF_LCK))
 		return;
-#endif
 
 #if DISABLE_BB_RF
-		return;
+	return;
 #endif
-	if (p_iqk_info->rfk_forbidden)
+	if (iqk_info->rfk_forbidden)
 		return;
-	while (*(p_dm->p_is_scan_in_process)) {
-		ODM_RT_TRACE(p_dm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("[LCK]scan is in process, bypass LCK\n"));
+	while (*dm->is_scan_in_process) {
+		RF_DBG(dm, DBG_RF_IQK, "[LCK]scan is in process, bypass LCK\n");
 		return;
 	}
 
-	if (!p_dm->rf_calibrate_info.is_lck_in_progress) {
-		odm_acquire_spin_lock(p_dm, RT_IQK_SPINLOCK);
-		p_dm->rf_calibrate_info.is_lck_in_progress = true;
-		odm_release_spin_lock(p_dm, RT_IQK_SPINLOCK);
-		start_time = odm_get_current_time(p_dm);
-		switch (p_dm->support_ic_type) {
+	if (!dm->rf_calibrate_info.is_lck_in_progress) {
+		odm_acquire_spin_lock(dm, RT_IQK_SPINLOCK);
+		dm->rf_calibrate_info.is_lck_in_progress = true;
+		odm_release_spin_lock(dm, RT_IQK_SPINLOCK);
+		start_time = odm_get_current_time(dm);
+		switch (dm->support_ic_type) {
 #if (RTL8188E_SUPPORT == 1)
 		case ODM_RTL8188E:
-			phy_lc_calibrate_8188e(p_dm);
+			phy_lc_calibrate_8188e(dm);
 			break;
 #endif
 #if (RTL8188F_SUPPORT == 1)
 		case ODM_RTL8188F:
-			phy_lc_calibrate_8188f(p_dm);
+			phy_lc_calibrate_8188f(dm);
 			break;
 #endif
 #if (RTL8192E_SUPPORT == 1)
 		case ODM_RTL8192E:
-			phy_lc_calibrate_8192e(p_dm);
+			phy_lc_calibrate_8192e(dm);
 			break;
 #endif
 #if (RTL8197F_SUPPORT == 1)
 		case ODM_RTL8197F:
-			phy_lc_calibrate_8197f(p_dm);
+			phy_lc_calibrate_8197f(dm);
+			break;
+#endif
+#if (RTL8192F_SUPPORT == 1)
+		case ODM_RTL8192F:
+			phy_lc_calibrate_8192f(dm);
 			break;
 #endif
 #if (RTL8703B_SUPPORT == 1)
 		case ODM_RTL8703B:
-			phy_lc_calibrate_8703b(p_dm);
+			phy_lc_calibrate_8703b(dm);
 			break;
 #endif
 #if (RTL8710B_SUPPORT == 1)
 		case ODM_RTL8710B:
-			phy_lc_calibrate_8710b(p_dm);
+			phy_lc_calibrate_8710b(dm);
+			break;
+#endif
+#if (RTL8721D_SUPPORT == 1)
+		case ODM_RTL8721D:
+			phy_lc_calibrate_8721d(dm);
 			break;
 #endif
-#if (RTL8723B_SUPPORT == 1) 
+#if (RTL8723B_SUPPORT == 1)
 		case ODM_RTL8723B:
-			phy_lc_calibrate_8723b(p_dm);
+			phy_lc_calibrate_8723b(dm);
 			break;
 #endif
 #if (RTL8723D_SUPPORT == 1)
 		case ODM_RTL8723D:
-			phy_lc_calibrate_8723d(p_dm);
+			phy_lc_calibrate_8723d(dm);
 			break;
 #endif
 #if (RTL8812A_SUPPORT == 1)
 		case ODM_RTL8812:
-			phy_lc_calibrate_8812a(p_dm);
+			phy_lc_calibrate_8812a(dm);
 			break;
 #endif
-#if (RTL8821A_SUPPORT == 1) 
+#if (RTL8821A_SUPPORT == 1)
 		case ODM_RTL8821:
-			phy_lc_calibrate_8821a(p_dm);
+			phy_lc_calibrate_8821a(dm);
 			break;
 #endif
-#if (RTL8814A_SUPPORT == 1) 
+#if (RTL8814A_SUPPORT == 1)
 		case ODM_RTL8814A:
-			phy_lc_calibrate_8814a(p_dm);
+			phy_lc_calibrate_8814a(dm);
 			break;
 #endif
-#if (RTL8822B_SUPPORT == 1) 
+#if (RTL8822B_SUPPORT == 1)
 		case ODM_RTL8822B:
-			phy_lc_calibrate_8822b(p_dm);
+			phy_lc_calibrate_8822b(dm);
 			break;
 #endif
-#if (RTL8821C_SUPPORT == 1) 
+#if (RTL8822C_SUPPORT == 1)
+		case ODM_RTL8822C:
+			phy_lc_calibrate_8822c(dm);
+			break;
+#endif
+#if (RTL8821C_SUPPORT == 1)
 		case ODM_RTL8821C:
-			phy_lc_calibrate_8821c(p_dm);
+			phy_lc_calibrate_8821c(dm);
 			break;
 #endif
-#if (RTL8814B_SUPPORT == 1) 
+#if (RTL8814B_SUPPORT == 1)
 		case ODM_RTL8814B:
 			break;
 #endif
 		default:
 			break;
 		}
-		p_dm->rf_calibrate_info.lck_progressing_time = odm_get_progressing_time(p_dm, start_time);
-		ODM_RT_TRACE(p_dm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("[IQK]LCK progressing_time = %lld ms\n", p_dm->rf_calibrate_info.lck_progressing_time));
+		dm->rf_calibrate_info.lck_progressing_time =
+				odm_get_progressing_time(dm, start_time);
+		RF_DBG(dm, DBG_RF_IQK, "[IQK]LCK progressing_time = %lld ms\n",
+		       dm->rf_calibrate_info.lck_progressing_time);
 #if (RTL8822B_SUPPORT == 1 || RTL8821C_SUPPORT == 1)
-		halrf_lck_dbg(p_dm);
+		halrf_lck_dbg(dm);
 #endif
-		odm_acquire_spin_lock(p_dm, RT_IQK_SPINLOCK);
-		p_dm->rf_calibrate_info.is_lck_in_progress = false;
-		odm_release_spin_lock(p_dm, RT_IQK_SPINLOCK);		
-	}else
-		ODM_RT_TRACE(p_dm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("== Return the LCK CMD, because RFK is in Progress ==\n"));
+		odm_acquire_spin_lock(dm, RT_IQK_SPINLOCK);
+		dm->rf_calibrate_info.is_lck_in_progress = false;
+		odm_release_spin_lock(dm, RT_IQK_SPINLOCK);
+	} else {
+		RF_DBG(dm, DBG_RF_IQK,
+		       "= Return the LCK CMD, because RFK is in Progress =\n");
+	}
 }
 
-void
-halrf_init(
-	void			*p_dm_void
-)
+void halrf_aac_check(struct dm_struct *dm)
+{
+	switch (dm->support_ic_type) {
+#if (RTL8821C_SUPPORT == 1)
+	case ODM_RTL8821C:
+#if 0
+		aac_check_8821c(dm);
+#endif
+		break;
+#endif
+#if (RTL8822B_SUPPORT == 1)
+	case ODM_RTL8822B:
+#if 1
+		aac_check_8822b(dm);
+#endif
+		break;
+#endif
+	default:
+		break;
+	}
+}
+
+void halrf_init(void *dm_void)
 {
-	struct PHY_DM_STRUCT		*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	
-	ODM_RT_TRACE(p_dm, ODM_COMP_INIT, ODM_DBG_LOUD, ("HALRF_Init\n"));
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
 
-	if (*(p_dm->p_mp_mode) == true)
-		halrf_supportability_init_mp(p_dm);
-	else
-		halrf_supportability_init(p_dm);
+	RF_DBG(dm, DBG_RF_INIT, "HALRF_Init\n");
 
+	halrf_init_debug_setting(dm);
+
+	if (*dm->mp_mode)
+		halrf_supportability_init_mp(dm);
+	else
+		halrf_supportability_init(dm);
+#if 1
 	/*Init all RF funciton*/
-	/*iqk_init();*/
-	/*dpk_init();*/
+	halrf_aac_check(dm);
+	halrf_dack_trigger(dm);
+#endif
+	halrf_tssi_init(dm);
 }
 
+void halrf_dpk_trigger(void *dm_void)
+{
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct _hal_rf_ *rf = &dm->rf_table;
+	struct dm_dpk_info *dpk_info = &dm->dpk_info;
+
+	u64 start_time;
+
+	start_time = odm_get_current_time(dm);
+
+	switch (dm->support_ic_type) {
+#if (RTL8822C_SUPPORT == 1)
+	case ODM_RTL8822C:
+		do_dpk_8822c(dm);
+		break;
+#endif
+
+#if (DM_ODM_SUPPORT_TYPE & (ODM_AP))
+#if (RTL8197F_SUPPORT == 1)
+	case ODM_RTL8197F:
+		do_dpk_8197f(dm);
+		break;
+#endif
+#if (RTL8192F_SUPPORT == 1)
+	case ODM_RTL8192F:
+		do_dpk_8192f(dm);
+		break;
+#endif
+
+#if (RTL8198F_SUPPORT == 1)
+	case ODM_RTL8198F:
+		do_dpk_8198f(dm);
+		break;
+#endif
+#if (RTL8814B_SUPPORT == 1)
+	case ODM_RTL8814B:
+		break;
+#endif
+
+#endif
+
+#if (DM_ODM_SUPPORT_TYPE & (ODM_IOT))
+#if (RTL8195B_SUPPORT == 1)
+	case ODM_RTL8195B:
+		if (!dpk_info->is_dpk_by_channel) {
+			dpk_by_channel(dm); /*do dpk 9 ch*/
+			dpk_result_summary_8195b(dm);
+		} else {
+			/*do dpk 1 ch*/
+			do_dpk_8195b(dm, false);
+		}
+	break;
+#endif
+#endif
+	default:
+		break;
+	}
+	rf->dpk_progressing_time = odm_get_progressing_time(dm, start_time);
+	RF_DBG(dm, DBG_RF_DPK, "[DPK]DPK progressing_time = %lld ms\n",
+	       rf->dpk_progressing_time);
+}
 
+u8 halrf_dpk_result_check(void *dm_void)
+{
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct dm_dpk_info *dpk_info = &dm->dpk_info;
+
+	u8 result = 0;
+
+	switch (dm->support_ic_type) {
+#if (RTL8822C_SUPPORT == 1)
+	case ODM_RTL8822C:
+		if (dpk_info->dpk_path_ok == 0x3)
+			result = 1;
+		else
+			result = 0;
+		break;
+#endif
+
+#if (RTL8195B_SUPPORT == 1)
+	case ODM_RTL8195B:
+		if (dpk_info->dpk_path_ok == 0x1)
+			result = 1;
+		else
+			result = 0;
+		break;
+#endif
+
+#if (DM_ODM_SUPPORT_TYPE & (ODM_AP))
+
+#if (RTL8197F_SUPPORT == 1)
+	case ODM_RTL8197F:
+		if (dpk_info->dpk_path_ok == 0x3)
+			result = 1;
+		else
+			result = 0;
+		break;
+#endif
+
+#if (RTL8192F_SUPPORT == 1)
+	case ODM_RTL8192F:
+		if (dpk_info->dpk_path_ok == 0x3)
+			result = 1;
+		else
+			result = 0;
+		break;
+#endif
+
+#if (RTL8198F_SUPPORT == 1)
+	case ODM_RTL8198F:
+		if (dpk_info->dpk_path_ok == 0xf)
+			result = 1;
+		else
+			result = 0;
+		break;
+#endif
+
+#endif
+	default:
+		break;
+	}
+	return result;
+}
+
+void halrf_dpk_sram_read(void *dm_void)
+{
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+
+	u8 path, group;
+
+	switch (dm->support_ic_type) {
+#if (RTL8822C_SUPPORT == 1)
+	case ODM_RTL8822C:
+		dpk_coef_read_8822c(dm);
+		break;
+#endif
+
+#if (RTL8195B_SUPPORT == 1)
+	case ODM_RTL8195B:
+		dpk_sram_read_8195b(dm);
+		break;
+#endif
+
+#if (DM_ODM_SUPPORT_TYPE & (ODM_AP))
+
+#if (RTL8197F_SUPPORT == 1)
+	case ODM_RTL8197F:
+		dpk_sram_read_8197f(dm);
+		break;
+#endif
+
+#if (RTL8192F_SUPPORT == 1)
+	case ODM_RTL8192F:
+		dpk_sram_read_8192f(dm);
+		break;
+#endif
+
+#if (RTL8198F_SUPPORT == 1)
+	case ODM_RTL8198F:
+		dpk_sram_read_8198f(dm);
+		break;
+#endif
+
+#endif
+	default:
+		break;
+	}
+}
+
+void halrf_dpk_enable_disable(void *dm_void)
+{
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+
+	switch (dm->support_ic_type) {
+#if (RTL8822C_SUPPORT == 1)
+	case ODM_RTL8822C:
+		dpk_enable_disable_8822c(dm);
+		break;
+#endif
+#if (RTL8195B_SUPPORT == 1)
+	case ODM_RTL8195B:
+		dpk_enable_disable_8195b(dm);
+		break;
+#endif
+
+#if (DM_ODM_SUPPORT_TYPE & (ODM_AP))
+
+#if (RTL8197F_SUPPORT == 1)
+	case ODM_RTL8197F:
+		phy_dpk_enable_disable_8197f(dm);
+		break;
+#endif
+#if (RTL8192F_SUPPORT == 1)
+	case ODM_RTL8192F:
+		phy_dpk_enable_disable_8192f(dm);
+		break;
+#endif
+
+#if (RTL8198F_SUPPORT == 1)
+	case ODM_RTL8198F:
+		dpk_enable_disable_8198f(dm);
+		break;
+#endif
+
+#endif
+	default:
+		break;
+	}
+}
+
+void halrf_dpk_track(void *dm_void)
+{
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct dm_dpk_info *dpk_info = &dm->dpk_info;
+
+	switch (dm->support_ic_type) {
+#if (RTL8822C_SUPPORT == 1)
+	case ODM_RTL8822C:
+		dpk_track_8822c(dm);
+		break;		
+#endif
 
+#if (RTL8195B_SUPPORT == 1)
+	case ODM_RTL8195B:
+		dpk_track_8195b(dm);
+		break;
+#endif
+
+#if (DM_ODM_SUPPORT_TYPE & (ODM_AP))
+
+#if (RTL8197F_SUPPORT == 1)
+	case ODM_RTL8197F:
+		phy_dpk_track_8197f(dm);
+		break;
+#endif
+
+#if (RTL8192F_SUPPORT == 1)
+	case ODM_RTL8192F:
+		phy_dpk_track_8192f(dm);
+		break;
+#endif
+
+#if (RTL8198F_SUPPORT == 1)
+	case ODM_RTL8198F:
+		dpk_track_8198f(dm);
+		break;		
+#endif
+
+#endif
+	default:
+		break;
+	}
+}
+
+void halrf_dpk_reload(void *dm_void)
+{
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct dm_dpk_info *dpk_info = &dm->dpk_info;
+
+	switch (dm->support_ic_type) {
+#if (RTL8195B_SUPPORT == 1)
+	case ODM_RTL8195B:
+		dpk_reload_8195b(dm);
+		break;
+#endif
+
+#if (DM_ODM_SUPPORT_TYPE & (ODM_AP))
+
+#if (RTL8197F_SUPPORT == 1)
+	case ODM_RTL8197F:
+		if (dpk_info->dpk_path_ok > 0)
+			dpk_reload_8197f(dm);
+		break;
+#endif
+
+#if (RTL8192F_SUPPORT == 1)
+	case ODM_RTL8192F:
+		if (dpk_info->dpk_path_ok > 0)
+			dpk_reload_8192f(dm);
+
+		break;
+#endif
+
+#if (RTL8198F_SUPPORT == 1)
+	case ODM_RTL8198F:
+		if (dpk_info->dpk_path_ok > 0)
+			dpk_reload_8198f(dm);
+		break;		
+#endif
+
+#endif
+	default:
+		break;
+	}
+}
+
+enum hal_status
+halrf_config_rfk_with_header_file(void *dm_void, u32 config_type)
+{
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	enum hal_status result = HAL_STATUS_SUCCESS;
+#if 0
+#if (RTL8822B_SUPPORT == 1)
+	if (dm->support_ic_type == ODM_RTL8822B) {
+		if (config_type == CONFIG_BB_RF_CAL_INIT)
+			odm_read_and_config_mp_8822b_cal_init(dm);
+	}
+#endif
+#endif
+#if (RTL8198F_SUPPORT == 1)
+	if (dm->support_ic_type == ODM_RTL8198F) {
+		if (config_type == CONFIG_BB_RF_CAL_INIT)
+			odm_read_and_config_mp_8198f_cal_init(dm);
+	}
+#endif
+#if (RTL8822C_SUPPORT == 1)
+	if (dm->support_ic_type == ODM_RTL8822C) {
+		if (config_type == CONFIG_BB_RF_CAL_INIT)
+			odm_read_and_config_mp_8822c_cal_init(dm);
+	}
+#endif
+#if (RTL8814B_SUPPORT == 1)
+	if (dm->support_ic_type == ODM_RTL8814B) {
+		if (config_type == CONFIG_BB_RF_CAL_INIT)
+			odm_read_and_config_mp_8814b_cal_init(dm);
+	}
+#endif
+#if (RTL8195B_SUPPORT == 1)
+	if (dm->support_ic_type == ODM_RTL8195B) {
+		if (config_type == CONFIG_BB_RF_CAL_INIT)
+			odm_read_and_config_mp_8195b_cal_init(dm);
+	}
+#endif
+	return result;
+}
+
+void halrf_txgapk_trigger(void *dm_void)
+{
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct _hal_rf_ *rf = &dm->rf_table;
+
+	u64 start_time;
+
+	start_time = odm_get_current_time(dm);
+
+	switch (dm->support_ic_type) {
+#if (DM_ODM_SUPPORT_TYPE & (ODM_IOT))
+#if (RTL8195B_SUPPORT == 1)
+	case ODM_RTL8195B:
+		phy_txgap_calibrate_8195b(dm, false);
+	break;
+#endif
+#endif
+
+	default:
+		break;
+	}
+	rf->dpk_progressing_time =
+		odm_get_progressing_time(dm_void, start_time);
+	RF_DBG(dm, DBG_RF_TXGAPK, "[TGGC]TXGAPK progressing_time = %lld ms\n",
+	       rf->dpk_progressing_time);
+}
+
+void halrf_tssi_init(void *dm_void)
+{
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+
+#if (RTL8822C_SUPPORT == 1)
+	halrf_tssi_init_8822c(dm);
+#endif
+}
+
+void halrf_do_tssi(void *dm_void)
+{
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+
+#if (RTL8822C_SUPPORT == 1)
+	halrf_do_tssi_8822c(dm);
+#endif
+}
+
+void halrf_set_tssi_value(void *dm_void, u32 tssi_value)
+{
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+
+#if (RTL8822C_SUPPORT == 1)
+	halrf_set_tssi_value_8822c(dm, tssi_value);
+#endif
+}
+
+u32 halrf_query_tssi_value(void *dm_void)
+{
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+
+#if (RTL8822C_SUPPORT == 1)
+	return halrf_query_tssi_value_8822c(dm);
+#endif
+	return 0;
+}
+
+/*Golbal function*/
+void halrf_reload_bp(void *dm_void, u32 *bp_reg, u32 *bp, u32 num)
+{
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	u32 i;
+
+	for (i = 0; i < num; i++)
+		odm_write_4byte(dm, bp_reg[i], bp[i]);
+}
+
+void halrf_reload_bprf(void *dm_void, u32 *bp_reg, u32 bp[][4], u32 num,
+		       u8 ss)
+{
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	u32 i, path;
+
+	for (i = 0; i < num; i++) {
+		for (path = 0; path < ss; path++)
+			odm_set_rf_reg(dm, (enum rf_path)path, bp_reg[i],
+				       MASK20BITS, bp[i][path]);
+	}
+}
+
+void halrf_bp(void *dm_void, u32 *bp_reg, u32 *bp, u32 num)
+{
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	u32 i;
+
+	for (i = 0; i < num; i++)
+		bp[i] = odm_read_4byte(dm, bp_reg[i]);
+}
+
+void halrf_bprf(void *dm_void, u32 *bp_reg, u32 bp[][4], u32 num, u8 ss)
+{
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	u32 i, path;
+
+	for (i = 0; i < num; i++) {
+		for (path = 0; path < ss; path++) {
+			bp[i][path] =
+				odm_get_rf_reg(dm, (enum rf_path)path,
+					       bp_reg[i], MASK20BITS);
+		}
+	}
+}
+
+void halrf_swap(void *dm_void, u32 *v1, u32 *v2)
+{
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	u32 temp;
+
+	temp = *v1;
+	*v1 = *v2;
+	*v2 = temp;
+}
+
+void halrf_bubble(void *dm_void, u32 *v1, u32 *v2)
+{
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	u32 temp;
+
+	if (*v1 >= 0x200 && *v2 >= 0x200) {
+		if (*v1 > *v2)
+			halrf_swap(dm, v1, v2);
+	} else if (*v1 < 0x200 && *v2 < 0x200) {
+		if (*v1 > *v2)
+			halrf_swap(dm, v1, v2);
+	} else if (*v1 < 0x200 && *v2 >= 0x200) {
+		halrf_swap(dm, v1, v2);
+	}
+}
+
+void halrf_b_sort(void *dm_void, u32 *iv, u32 *qv)
+{
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	u32 temp;
+	u32 i, j;
+
+	RF_DBG(dm, DBG_RF_DACK, "[DACK]bubble!!!!!!!!!!!!");
+	for (i = 0; i < SN - 1; i++) {
+		for (j = 0; j < (SN - 1 - i) ; j++) {
+			halrf_bubble(dm, &iv[j], &iv[j + 1]);
+			halrf_bubble(dm, &qv[j], &qv[j + 1]);
+		}
+	}
+}
+
+void halrf_minmax_compare(void *dm_void, u32 value, u32 *min,
+			  u32 *max)
+{
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+
+	if (value >= 0x200) {
+		if (*min >= 0x200) {
+			if (*min > value)
+				*min = value;
+		} else {
+			*min = value;
+		}
+		if (*max >= 0x200) {
+			if (*max < value)
+				*max = value;
+		}
+	} else {
+		if (*min < 0x200) {
+			if (*min > value)
+				*min = value;
+		}
+
+		if (*max  >= 0x200) {
+			*max = value;
+		} else {
+			if (*max < value)
+				*max = value;
+		}
+	}
+}
+
+u32 halrf_delta(void *dm_void, u32 v1, u32 v2)
+{
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+
+	if (v1 >= 0x200 && v2 >= 0x200) {
+		if (v1 > v2)
+			return v1 - v2;
+		else
+			return v2 - v1;
+	} else if (v1 >= 0x200 && v2 < 0x200) {
+		return v2 + (0x400 - v1);
+	} else if (v1 < 0x200 && v2 >= 0x200) {
+		return v1 + (0x400 - v2);
+	}
+
+	if (v1 > v2)
+		return v1 - v2;
+	else
+		return v2 - v1;
+}
+
+boolean halrf_compare(void *dm_void, u32 value)
+{
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+
+	boolean fail = false;
+
+	if (value >= 0x200 && (0x400 - value) > 0x64)
+		fail = true;
+	else if (value < 0x200 && value > 0x64)
+		fail = true;
+
+	if (fail)
+		RF_DBG(dm, DBG_RF_DACK, "[DACK]overflow!!!!!!!!!!!!!!!");
+	return fail;
+}
+
+void halrf_mode(void *dm_void, u32 *i_value, u32 *q_value)
+{
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	u32 iv[SN], qv[SN], im[SN], qm[SN], temp, temp1, temp2;
+	u32 p, m, t;
+	u32 i_max = 0, q_max = 0, i_min = 0x0, q_min = 0x0, c = 0x0;
+	u32 i_delta, q_delta;
+	u8 i, j, ii = 0, qi = 0;
+	boolean fail = false;
+
+	ODM_delay_ms(10);
+	for (i = 0; i < SN; i++) {
+		im[i] = 0;
+		qm[i] = 0;
+	}
+	i = 0;
+	c = 0;
+	while (i < SN && c < 1000) {
+		c++;
+		temp = odm_get_bb_reg(dm, 0x2dbc, 0x3fffff);
+		iv[i] = (temp & 0x3ff000) >> 12;
+		qv[i] = temp & 0x3ff;
+
+		fail = false;
+		if (halrf_compare(dm, iv[i]))
+			fail = true;
+		if (halrf_compare(dm, qv[i]))
+			fail = true;
+		if (!fail)
+			i++;
+	}
+	c = 0;
+	do {
+		c++;
+		i_min = iv[0];
+		i_max = iv[0];
+		q_min = qv[0];
+		q_max = qv[0];
+		for (i = 0; i < SN; i++) {
+			halrf_minmax_compare(dm, iv[i], &i_min, &i_max);
+			halrf_minmax_compare(dm, qv[i], &q_min, &q_max);
+		}
+		RF_DBG(dm, DBG_RF_DACK, "[DACK]i_min=0x%x, i_max=0x%x",
+		       i_min, i_max);
+		RF_DBG(dm, DBG_RF_DACK, "[DACK]q_min=0x%x, q_max=0x%x",
+		       q_min, q_max);
+		if (i_max < 0x200 && i_min < 0x200)
+			i_delta = i_max - i_min;
+		else if (i_max >= 0x200 && i_min >= 0x200)
+			i_delta = i_max - i_min;
+		else
+			i_delta = i_max + (0x400 - i_min);
+
+		if (q_max < 0x200 && q_min < 0x200)
+			q_delta = q_max - q_min;
+		else if (q_max >= 0x200 && q_min >= 0x200)
+			q_delta = q_max - q_min;
+		else
+			q_delta = q_max + (0x400 - q_min);
+		RF_DBG(dm, DBG_RF_DACK, "[DACK]i_delta=0x%x, q_delta=0x%x",
+		       i_delta, q_delta);
+		halrf_b_sort(dm, iv, qv);
+		if (i_delta > 5 || q_delta > 5) {
+			temp = odm_get_bb_reg(dm, 0x2dbc, 0x3fffff);
+			iv[0] = (temp & 0x3ff000) >> 12;
+			qv[0] = temp & 0x3ff;
+			temp = odm_get_bb_reg(dm, 0x2dbc, 0x3fffff);
+			iv[SN - 1] = (temp & 0x3ff000) >> 12;
+			qv[SN - 1] = temp & 0x3ff;
+		} else {
+			break;
+		}
+	} while (c < 100);
+#if 1
+#if 0
+	for (i = 0; i < SN; i++)
+		RF_DBG(dm, DBG_RF_DACK, "[DACK]iv[%d] = 0x%x\n", i, iv[i]);
+	for (i = 0; i < SN; i++)
+		RF_DBG(dm, DBG_RF_DACK, "[DACK]qv[%d] = 0x%x\n", i, qv[i]);
+#endif
+	/*i*/
+	m = 0;
+	p = 0;
+	for (i = 10; i < SN - 10; i++) {
+		if (iv[i] > 0x200)
+			m = (0x400 - iv[i]) + m;
+		else
+			p = iv[i] + p;
+	}
+
+	if (p > m) {
+		t = p - m;
+		t = t / (SN - 20);
+	} else {
+		t = m - p;
+		t = t / (SN - 20);
+		if (t != 0x0)
+			t = 0x400 - t;
+	}
+	*i_value = t;
+	/*q*/
+	m = 0;
+	p = 0;
+	for (i = 10; i < SN - 10; i++) {
+		if (qv[i] > 0x200)
+			m = (0x400 - qv[i]) + m;
+		else
+			p = qv[i] + p;
+	}
+	if (p > m) {
+		t = p - m;
+		t = t / (SN - 20);
+	} else {
+		t = m - p;
+		t = t / (SN - 20);
+		if (t != 0x0)
+			t = 0x400 - t;
+	}
+	*q_value = t;
+#endif
+}
 
diff --git a/rtl8723DS/hal/phydm/halrf/halrf.h b/rtl8723DS/hal/phydm/halrf/halrf.h
index c869527..8a45aae 100755..100644
--- a/rtl8723DS/hal/phydm/halrf/halrf.h
+++ b/rtl8723DS/hal/phydm/halrf/halrf.h
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2007 - 2017 Realtek Corporation.
+ * Copyright(c) 2007 - 2017  Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -8,308 +8,566 @@
  *
  * This program is distributed in the hope that it will be useful, but WITHOUT
  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  * more details.
  *
+ * The full GNU General Public License is included in this distribution in the
+ * file called LICENSE.
+ *
+ * Contact Information:
+ * wlanfae <wlanfae@realtek.com>
+ * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
+ * Hsinchu 300, Taiwan.
+ *
+ * Larry Finger <Larry.Finger@lwfinger.net>
+ *
  *****************************************************************************/
 
+#ifndef __HALRF_H__
+#define __HALRF_H__
 
-#ifndef	_HALRF_H__
-#define _HALRF_H__
-
-/*============================================================*/
-/*include files*/
-/*============================================================*/
+/*@============================================================*/
+/*@include files*/
+/*@============================================================*/
 #include "halrf/halrf_psd.h"
+#if (RTL8822B_SUPPORT == 1)
+#include "halrf/rtl8822b/halrf_rfk_init_8822b.h"
+#endif
+#if (RTL8822C_SUPPORT == 1)
+#include "halrf/rtl8822c/halrf_rfk_init_8822c.h"
+#include "halrf/rtl8822c/halrf_iqk_8822c.h"
+#include "halrf/rtl8822c/halrf_tssi_8822c.h"
+#include "halrf/rtl8822c/halrf_dpk_8822c.h"
+#endif
+
+#if (DM_ODM_SUPPORT_TYPE & ODM_AP)
+#if (RTL8198F_SUPPORT == 1)
+#include "halrf/rtl8198f/halrf_rfk_init_8198f.h"
+#endif
+#endif
 
+#if (RTL8814B_SUPPORT == 1)
+#include "halrf/rtl8814b/halrf_rfk_init_8814b.h"
+#include "halrf/rtl8814b/halrf_iqk_8814b.h"
+#endif
 
-/*============================================================*/
-/*Definition */
-/*============================================================*/
+/*@============================================================*/
+/*@Definition */
+/*@============================================================*/
 /*IQK version*/
 #if (DM_ODM_SUPPORT_TYPE & (ODM_WIN))
-#define IQK_VERSION_8188E	"0x14"
-#define IQK_VERSION_8192E	"0x01"
-#define IQK_VERSION_8723B	"0x1e"
-#define IQK_VERSION_8812A	"0x01"
-#define IQK_VERSION_8821A	"0x01"
+#define IQK_VER_8188E "0x14"
+#define IQK_VER_8192E "0x01"
+#define IQK_VER_8192F "0x01"
+#define IQK_VER_8723B "0x1e"
+#define IQK_VER_8812A "0x02"
+#define IQK_VER_8821A "0x01"
 #elif (DM_ODM_SUPPORT_TYPE & (ODM_CE))
-#define IQK_VERSION_8188E	"0x01"
-#define IQK_VERSION_8192E	"0x01"
-#define IQK_VERSION_8723B	"0x1e"
-#define IQK_VERSION_8812A	"0x01"
-#define IQK_VERSION_8821A	"0x01"
+#define IQK_VER_8188E "0x01"
+#define IQK_VER_8192E "0x01"
+#define IQK_VER_8192F "0x01"
+#define IQK_VER_8723B "0x1e"
+#define IQK_VER_8812A "0x01"
+#define IQK_VER_8821A "0x01"
 #elif (DM_ODM_SUPPORT_TYPE & (ODM_AP))
-#define IQK_VERSION_8188E	"0x01"
-#define IQK_VERSION_8192E	"0x01"
-#define IQK_VERSION_8723B	"0x1e"
-#define IQK_VERSION_8812A	"0x01"
-#define IQK_VERSION_8821A	"0x01"
+#define IQK_VER_8188E "0x01"
+#define IQK_VER_8192E "0x01"
+#define IQK_VER_8192F "0x01"
+#define IQK_VER_8723B "0x1e"
+#define IQK_VER_8812A "0x01"
+#define IQK_VER_8821A "0x01"
+#elif (DM_ODM_SUPPORT_TYPE & (ODM_IOT))
+#define IQK_VER_8188E "0x01"
+#define IQK_VER_8192E "0x01"
+#define IQK_VER_8192F "0x01"
+#define IQK_VER_8723B "0x1e"
+#define IQK_VER_8812A "0x01"
+#define IQK_VER_8821A "0x01"
 #endif
-#define IQK_VERSION_8814A	"0x0f"
-#define IQK_VERSION_8188F	"0x01"
-#define IQK_VERSION_8197F	"0x01"
-#define IQK_VERSION_8703B	"0x05"
-#define IQK_VERSION_8710B	"0x01"
-#define IQK_VERSION_8723D	"0x02"
-#define IQK_VERSION_8822B	"0x2e"
-#define IQK_VERSION_8821C	"0x23"
+#define IQK_VER_8814A "0x0f"
+#define IQK_VER_8188F "0x01"
+#define IQK_VER_8197F "0x1d"
+#define IQK_VER_8703B "0x05"
+#define IQK_VER_8710B "0x01"
+#define IQK_VER_8723D "0x02"
+#define IQK_VER_8822B "0x2f"
+#define IQK_VER_8822C "0x03"
+#define IQK_VER_8821C "0x23"
+#define IQK_VER_8198F "0x09"
+#define IQK_VER_8814B "0x06"
 
 /*LCK version*/
-#define LCK_VERSION_8188E	"0x01"
-#define LCK_VERSION_8192E	"0x01"
-#define LCK_VERSION_8723B	"0x01"
-#define LCK_VERSION_8812A	"0x01"
-#define LCK_VERSION_8821A	"0x01"
-#define LCK_VERSION_8814A	"0x01"
-#define LCK_VERSION_8188F	"0x01"
-#define LCK_VERSION_8197F	"0x01"
-#define LCK_VERSION_8703B	"0x01"
-#define LCK_VERSION_8710B	"0x01"
-#define LCK_VERSION_8723D	"0x01"
-#define LCK_VERSION_8822B	"0x01"
-#define LCK_VERSION_8821C	"0x01"
-
-
-#define HALRF_IQK_VER	(p_dm->support_ic_type == ODM_RTL8188E)? IQK_VERSION_8188E :\
-						(p_dm->support_ic_type == ODM_RTL8192E)? IQK_VERSION_8192E :\
-						(p_dm->support_ic_type == ODM_RTL8723B)? IQK_VERSION_8723B :\
-						(p_dm->support_ic_type == ODM_RTL8812)? IQK_VERSION_8812A :\
-						(p_dm->support_ic_type == ODM_RTL8821)? IQK_VERSION_8821A :\
-						(p_dm->support_ic_type == ODM_RTL8814A)? IQK_VERSION_8814A :\
-						(p_dm->support_ic_type == ODM_RTL8188F)? IQK_VERSION_8188F :\
-						(p_dm->support_ic_type == ODM_RTL8197F)? IQK_VERSION_8197F :\
-						(p_dm->support_ic_type == ODM_RTL8703B)? IQK_VERSION_8703B :\
-						(p_dm->support_ic_type == ODM_RTL8710B)? IQK_VERSION_8710B :\
-						(p_dm->support_ic_type == ODM_RTL8723D)? IQK_VERSION_8723D :\
-						(p_dm->support_ic_type == ODM_RTL8822B)? IQK_VERSION_8822B :\
-						(p_dm->support_ic_type == ODM_RTL8821C)? IQK_VERSION_8821C :"unknown"
-
-
-#define HALRF_LCK_VER	(p_dm->support_ic_type == ODM_RTL8188E)? LCK_VERSION_8188E :\
-						(p_dm->support_ic_type == ODM_RTL8192E)? LCK_VERSION_8192E :\
-						(p_dm->support_ic_type == ODM_RTL8723B)? LCK_VERSION_8723B :\
-						(p_dm->support_ic_type == ODM_RTL8812)? LCK_VERSION_8812A :\
-						(p_dm->support_ic_type == ODM_RTL8821)? LCK_VERSION_8821A :\
-						(p_dm->support_ic_type == ODM_RTL8814A)? LCK_VERSION_8814A :\
-						(p_dm->support_ic_type == ODM_RTL8188F)? LCK_VERSION_8188F :\
-						(p_dm->support_ic_type == ODM_RTL8197F)? LCK_VERSION_8197F :\
-						(p_dm->support_ic_type == ODM_RTL8703B)? LCK_VERSION_8703B :\
-						(p_dm->support_ic_type == ODM_RTL8710B)? LCK_VERSION_8710B :\
-						(p_dm->support_ic_type == ODM_RTL8723D)? LCK_VERSION_8723D :\
-						(p_dm->support_ic_type == ODM_RTL8822B)? LCK_VERSION_8822B :\
-						(p_dm->support_ic_type == ODM_RTL8821C)? LCK_VERSION_8821C :"unknown"
-#define HALRF_DPK_VER	"0x02"
-
-#define IQK_THRESHOLD			8
-#define DPK_THRESHOLD			4
-
-/*============================================================*/
-/* enumeration */
-/*============================================================*/
-enum halrf_ability_e {
-
-	HAL_RF_TX_PWR_TRACK	= BIT(0),
-	HAL_RF_IQK				= BIT(1),
-	HAL_RF_LCK				= BIT(2),
-	HAL_RF_DPK				= BIT(3),
-	HAL_RF_TXGAPK			= BIT(4)
+#define LCK_VER_8188E "0x01"
+#define LCK_VER_8192E "0x01"
+#define LCK_VER_8192F "0x01"
+#define LCK_VER_8723B "0x01"
+#define LCK_VER_8812A "0x01"
+#define LCK_VER_8821A "0x01"
+#define LCK_VER_8814A "0x01"
+#define LCK_VER_8188F "0x01"
+#define LCK_VER_8197F "0x01"
+#define LCK_VER_8703B "0x01"
+#define LCK_VER_8710B "0x01"
+#define LCK_VER_8723D "0x01"
+#define LCK_VER_8822B "0x02"
+#define LCK_VER_8822C "0x00"
+#define LCK_VER_8821C "0x02"
+#define LCK_VER_8814B "0x00"
+#define LCK_VER_8195B "0x02"
+
+/*power tracking version*/
+#define PWRTRK_VER_8188E "0x01"
+#define PWRTRK_VER_8192E "0x01"
+#define PWRTRK_VER_8192F "0x01"
+#define PWRTRK_VER_8723B "0x01"
+#define PWRTRK_VER_8812A "0x01"
+#define PWRTRK_VER_8821A "0x01"
+#define PWRTRK_VER_8814A "0x01"
+#define PWRTRK_VER_8188F "0x01"
+#define PWRTRK_VER_8197F "0x01"
+#define PWRTRK_VER_8703B "0x01"
+#define PWRTRK_VER_8710B "0x01"
+#define PWRTRK_VER_8723D "0x01"
+#define PWRTRK_VER_8822B "0x01"
+#define PWRTRK_VER_8822C "0x00"
+#define PWRTRK_VER_8821C "0x01"
+#define PWRTRK_VER_8814B "0x00"
+
+/*DPK version*/
+#define DPK_VER_8188E "NONE"
+#define DPK_VER_8192E "NONE"
+#define DPK_VER_8723B "NONE"
+#define DPK_VER_8812A "NONE"
+#define DPK_VER_8821A "NONE"
+#define DPK_VER_8814A "NONE"
+#define DPK_VER_8188F "NONE"
+#define DPK_VER_8197F "0x08"
+#define DPK_VER_8703B "NONE"
+#define DPK_VER_8710B "NONE"
+#define DPK_VER_8723D "NONE"
+#define DPK_VER_8822B "NONE"
+#define DPK_VER_8822C "0x04"
+#define DPK_VER_8821C "NONE"
+#define DPK_VER_8192F "0x0c"
+#define DPK_VER_8198F "0x0a"
+#define DPK_VER_8814B "0x00"
+#define DPK_VER_8195B "0x06"
+
+/*RFK_INIT version*/
+#define RFK_INIT_VER_8822B "0x8"
+#define RFK_INIT_VER_8822C "0x3"
+#define RFK_INIT_VER_8195B "0x1"
+#define RFK_INIT_VER_8198F "0x5"
+#define RFK_INIT_VER_8814B "0x5"
+
+/*DACK version*/
+#define DACK_VER_8822C "0x3"
+
+/*Kfree tracking version*/
+#define KFREE_VER_8188E \
+		(dm->power_trim_data.flag & KFREE_FLAG_ON) ? "0x01" : "NONE"
+#define KFREE_VER_8192E \
+		(dm->power_trim_data.flag & KFREE_FLAG_ON) ? "0x01" : "NONE"
+#define KFREE_VER_8192F \
+		(dm->power_trim_data.flag & KFREE_FLAG_ON) ? "0x01" : "NONE"
+#define KFREE_VER_8723B \
+		(dm->power_trim_data.flag & KFREE_FLAG_ON) ? "0x01" : "NONE"
+#define KFREE_VER_8812A \
+		(dm->power_trim_data.flag & KFREE_FLAG_ON) ? "0x01" : "NONE"
+#define KFREE_VER_8821A \
+		(dm->power_trim_data.flag & KFREE_FLAG_ON) ? "0x01" : "NONE"
+#define KFREE_VER_8814A \
+		(dm->power_trim_data.flag & KFREE_FLAG_ON) ? "0x01" : "NONE"
+#define KFREE_VER_8188F \
+		(dm->power_trim_data.flag & KFREE_FLAG_ON) ? "0x01" : "NONE"
+#define KFREE_VER_8197F \
+		(dm->power_trim_data.flag & KFREE_FLAG_ON) ? "0x01" : "NONE"
+#define KFREE_VER_8703B \
+		(dm->power_trim_data.flag & KFREE_FLAG_ON) ? "0x01" : "NONE"
+#define KFREE_VER_8710B \
+		(dm->power_trim_data.flag & KFREE_FLAG_ON) ? "0x01" : "NONE"
+#define KFREE_VER_8723D \
+		(dm->power_trim_data.flag & KFREE_FLAG_ON) ? "0x01" : "NONE"
+#define KFREE_VER_8822B \
+		(dm->power_trim_data.flag & KFREE_FLAG_ON) ? "0x01" : "NONE"
+#define KFREE_VER_8822C \
+		(dm->power_trim_data.flag & KFREE_FLAG_ON) ? "0x01" : "NONE"
+#define KFREE_VER_8821C \
+		(dm->power_trim_data.flag & KFREE_FLAG_ON) ? "0x01" : "NONE"
+#define KFREE_VER_8814B \
+		(dm->power_trim_data.flag & KFREE_FLAG_ON) ? "0x01" : "NONE"
+
+/*PA Bias Calibration version*/
+#define PABIASK_VER_8188E \
+	(dm->power_trim_data.pa_bias_flag & PA_BIAS_FLAG_ON) ? "0x01" : "NONE"
+#define PABIASK_VER_8192E \
+	(dm->power_trim_data.pa_bias_flag & PA_BIAS_FLAG_ON) ? "0x01" : "NONE"
+#define PABIASK_VER_8192F \
+	(dm->power_trim_data.pa_bias_flag & PA_BIAS_FLAG_ON) ? "0x01" : "NONE"
+#define PABIASK_VER_8723B \
+	(dm->power_trim_data.pa_bias_flag & PA_BIAS_FLAG_ON) ? "0x01" : "NONE"
+#define PABIASK_VER_8812A \
+	(dm->power_trim_data.pa_bias_flag & PA_BIAS_FLAG_ON) ? "0x01" : "NONE"
+#define PABIASK_VER_8821A \
+	(dm->power_trim_data.pa_bias_flag & PA_BIAS_FLAG_ON) ? "0x01" : "NONE"
+#define PABIASK_VER_8814A \
+	(dm->power_trim_data.pa_bias_flag & PA_BIAS_FLAG_ON) ? "0x01" : "NONE"
+#define PABIASK_VER_8188F \
+	(dm->power_trim_data.pa_bias_flag & PA_BIAS_FLAG_ON) ? "0x01" : "NONE"
+#define PABIASK_VER_8197F \
+	(dm->power_trim_data.pa_bias_flag & PA_BIAS_FLAG_ON) ? "0x01" : "NONE"
+#define PABIASK_VER_8703B \
+	(dm->power_trim_data.pa_bias_flag & PA_BIAS_FLAG_ON) ? "0x01" : "NONE"
+#define PABIASK_VER_8710B \
+	(dm->power_trim_data.pa_bias_flag & PA_BIAS_FLAG_ON) ? "0x01" : "NONE"
+#define PABIASK_VER_8723D \
+	(dm->power_trim_data.pa_bias_flag & PA_BIAS_FLAG_ON) ? "0x01" : "NONE"
+#define PABIASK_VER_8822B \
+	(dm->power_trim_data.pa_bias_flag & PA_BIAS_FLAG_ON) ? "0x01" : "NONE"
+#define PABIASK_VER_8822C \
+	(dm->power_trim_data.pa_bias_flag & PA_BIAS_FLAG_ON) ? "0x01" : "NONE"
+#define PABIASK_VER_8821C \
+	(dm->power_trim_data.pa_bias_flag & PA_BIAS_FLAG_ON) ? "0x01" : "NONE"
+#define PABIASK_VER_8814B \
+	(dm->power_trim_data.pa_bias_flag & PA_BIAS_FLAG_ON) ? "0x01" : "NONE"
+
+#define HALRF_IQK_VER \
+	(dm->support_ic_type == ODM_RTL8188E) ? IQK_VER_8188E : \
+	(dm->support_ic_type == ODM_RTL8192E) ? IQK_VER_8192E : \
+	(dm->support_ic_type == ODM_RTL8192F) ? IQK_VER_8192F : \
+	(dm->support_ic_type == ODM_RTL8723B) ? IQK_VER_8723B : \
+	(dm->support_ic_type == ODM_RTL8812) ? IQK_VER_8812A : \
+	(dm->support_ic_type == ODM_RTL8821) ? IQK_VER_8821A : \
+	(dm->support_ic_type == ODM_RTL8814A) ? IQK_VER_8814A : \
+	(dm->support_ic_type == ODM_RTL8188F) ? IQK_VER_8188F : \
+	(dm->support_ic_type == ODM_RTL8197F) ? IQK_VER_8197F : \
+	(dm->support_ic_type == ODM_RTL8703B) ? IQK_VER_8703B : \
+	(dm->support_ic_type == ODM_RTL8710B) ? IQK_VER_8710B : \
+	(dm->support_ic_type == ODM_RTL8723D) ? IQK_VER_8723D : \
+	(dm->support_ic_type == ODM_RTL8822B) ? IQK_VER_8822B : \
+	(dm->support_ic_type == ODM_RTL8822C) ? IQK_VER_8822C : \
+	(dm->support_ic_type == ODM_RTL8821C) ? IQK_VER_8821C : \
+	(dm->support_ic_type == ODM_RTL8814B) ? IQK_VER_8814B : "unknown"
+
+#define HALRF_LCK_VER \
+	(dm->support_ic_type == ODM_RTL8188E) ? LCK_VER_8188E : \
+	(dm->support_ic_type == ODM_RTL8192E) ? LCK_VER_8192E : \
+	(dm->support_ic_type == ODM_RTL8192F) ? LCK_VER_8192F : \
+	(dm->support_ic_type == ODM_RTL8723B) ? LCK_VER_8723B : \
+	(dm->support_ic_type == ODM_RTL8812) ? LCK_VER_8812A : \
+	(dm->support_ic_type == ODM_RTL8821) ? LCK_VER_8821A : \
+	(dm->support_ic_type == ODM_RTL8814A) ? LCK_VER_8814A : \
+	(dm->support_ic_type == ODM_RTL8188F) ? LCK_VER_8188F : \
+	(dm->support_ic_type == ODM_RTL8197F) ? LCK_VER_8197F : \
+	(dm->support_ic_type == ODM_RTL8703B) ? LCK_VER_8703B : \
+	(dm->support_ic_type == ODM_RTL8710B) ? LCK_VER_8710B : \
+	(dm->support_ic_type == ODM_RTL8723D) ? LCK_VER_8723D : \
+	(dm->support_ic_type == ODM_RTL8822B) ? LCK_VER_8822B : \
+	(dm->support_ic_type == ODM_RTL8822C) ? LCK_VER_8822C : \
+	(dm->support_ic_type == ODM_RTL8821C) ? LCK_VER_8821C : \
+	(dm->support_ic_type == ODM_RTL8814B) ? LCK_VER_8814B : "unknown"
+
+#define HALRF_POWRTRACKING_VER \
+	(dm->support_ic_type == ODM_RTL8188E) ? PWRTRK_VER_8188E : \
+	(dm->support_ic_type == ODM_RTL8192E) ? PWRTRK_VER_8192E : \
+	(dm->support_ic_type == ODM_RTL8192F) ? PWRTRK_VER_8192F : \
+	(dm->support_ic_type == ODM_RTL8723B) ? PWRTRK_VER_8723B : \
+	(dm->support_ic_type == ODM_RTL8812) ? PWRTRK_VER_8812A : \
+	(dm->support_ic_type == ODM_RTL8821) ? PWRTRK_VER_8821A : \
+	(dm->support_ic_type == ODM_RTL8814A) ? PWRTRK_VER_8814A : \
+	(dm->support_ic_type == ODM_RTL8188F) ? PWRTRK_VER_8188F : \
+	(dm->support_ic_type == ODM_RTL8197F) ? PWRTRK_VER_8197F : \
+	(dm->support_ic_type == ODM_RTL8703B) ? PWRTRK_VER_8703B : \
+	(dm->support_ic_type == ODM_RTL8710B) ? PWRTRK_VER_8710B : \
+	(dm->support_ic_type == ODM_RTL8723D) ? PWRTRK_VER_8723D : \
+	(dm->support_ic_type == ODM_RTL8822B) ? PWRTRK_VER_8822B : \
+	(dm->support_ic_type == ODM_RTL8822C) ? PWRTRK_VER_8822C : \
+	(dm->support_ic_type == ODM_RTL8821C) ? PWRTRK_VER_8821C : \
+	(dm->support_ic_type == ODM_RTL8814B) ? PWRTRK_VER_8814B : "unknown"
+
+#define HALRF_DPK_VER \
+	(dm->support_ic_type == ODM_RTL8188E) ? DPK_VER_8188E : \
+	(dm->support_ic_type == ODM_RTL8192E) ? DPK_VER_8192E : \
+	(dm->support_ic_type == ODM_RTL8192F) ? DPK_VER_8192F : \
+	(dm->support_ic_type == ODM_RTL8723B) ? DPK_VER_8723B : \
+	(dm->support_ic_type == ODM_RTL8812) ? DPK_VER_8812A : \
+	(dm->support_ic_type == ODM_RTL8821) ? DPK_VER_8821A : \
+	(dm->support_ic_type == ODM_RTL8814A) ? DPK_VER_8814A : \
+	(dm->support_ic_type == ODM_RTL8188F) ? DPK_VER_8188F : \
+	(dm->support_ic_type == ODM_RTL8197F) ? DPK_VER_8197F : \
+	(dm->support_ic_type == ODM_RTL8198F) ? DPK_VER_8198F : \
+	(dm->support_ic_type == ODM_RTL8703B) ? DPK_VER_8703B : \
+	(dm->support_ic_type == ODM_RTL8710B) ? DPK_VER_8710B : \
+	(dm->support_ic_type == ODM_RTL8723D) ? DPK_VER_8723D : \
+	(dm->support_ic_type == ODM_RTL8822B) ? DPK_VER_8822B : \
+	(dm->support_ic_type == ODM_RTL8822C) ? DPK_VER_8822C : \
+	(dm->support_ic_type == ODM_RTL8821C) ? DPK_VER_8821C : \
+	(dm->support_ic_type == ODM_RTL8814B) ? DPK_VER_8814B : "unknown"
+
+#define HALRF_KFREE_VER \
+	(dm->support_ic_type == ODM_RTL8188E) ? KFREE_VER_8188E : \
+	(dm->support_ic_type == ODM_RTL8192E) ? KFREE_VER_8192E : \
+	(dm->support_ic_type == ODM_RTL8192F) ? KFREE_VER_8192F : \
+	(dm->support_ic_type == ODM_RTL8723B) ? KFREE_VER_8723B : \
+	(dm->support_ic_type == ODM_RTL8812) ? KFREE_VER_8812A : \
+	(dm->support_ic_type == ODM_RTL8821) ? KFREE_VER_8821A : \
+	(dm->support_ic_type == ODM_RTL8814A) ? KFREE_VER_8814A : \
+	(dm->support_ic_type == ODM_RTL8188F) ? KFREE_VER_8188F : \
+	(dm->support_ic_type == ODM_RTL8197F) ? KFREE_VER_8197F : \
+	(dm->support_ic_type == ODM_RTL8703B) ? KFREE_VER_8703B : \
+	(dm->support_ic_type == ODM_RTL8710B) ? KFREE_VER_8710B : \
+	(dm->support_ic_type == ODM_RTL8723D) ? KFREE_VER_8723D : \
+	(dm->support_ic_type == ODM_RTL8822B) ? KFREE_VER_8822B : \
+	(dm->support_ic_type == ODM_RTL8822C) ? KFREE_VER_8822C : \
+	(dm->support_ic_type == ODM_RTL8821C) ? KFREE_VER_8821C : \
+	(dm->support_ic_type == ODM_RTL8814B) ? KFREE_VER_8814B : "unknown"
+
+#define HALRF_PABIASK_VER \
+	(dm->support_ic_type == ODM_RTL8188E) ? PABIASK_VER_8188E : \
+	(dm->support_ic_type == ODM_RTL8192E) ? PABIASK_VER_8192E : \
+	(dm->support_ic_type == ODM_RTL8192F) ? PABIASK_VER_8192F : \
+	(dm->support_ic_type == ODM_RTL8723B) ? PABIASK_VER_8723B : \
+	(dm->support_ic_type == ODM_RTL8812) ? PABIASK_VER_8812A : \
+	(dm->support_ic_type == ODM_RTL8821) ? PABIASK_VER_8821A : \
+	(dm->support_ic_type == ODM_RTL8814A) ? PABIASK_VER_8814A : \
+	(dm->support_ic_type == ODM_RTL8188F) ? PABIASK_VER_8188F : \
+	(dm->support_ic_type == ODM_RTL8197F) ? PABIASK_VER_8197F : \
+	(dm->support_ic_type == ODM_RTL8703B) ? PABIASK_VER_8703B : \
+	(dm->support_ic_type == ODM_RTL8710B) ? PABIASK_VER_8710B : \
+	(dm->support_ic_type == ODM_RTL8723D) ? PABIASK_VER_8723D : \
+	(dm->support_ic_type == ODM_RTL8822B) ? PABIASK_VER_8822B : \
+	(dm->support_ic_type == ODM_RTL8822C) ? PABIASK_VER_8822C : \
+	(dm->support_ic_type == ODM_RTL8821C) ? PABIASK_VER_8821C : \
+	(dm->support_ic_type == ODM_RTL8814B) ? PABIASK_VER_8814B : "unknown"
+
+#define HALRF_RFK_INIT_VER \
+	(dm->support_ic_type == ODM_RTL8822B) ? RFK_INIT_VER_8822B : \
+	(dm->support_ic_type == ODM_RTL8822C) ? RFK_INIT_VER_8822C : \
+	(dm->support_ic_type == ODM_RTL8198F) ? RFK_INIT_VER_8198F : \
+	(dm->support_ic_type == ODM_RTL8814B) ? RFK_INIT_VER_8814B : "unknown"
+
+#define HALRF_DACK_VER \
+	(dm->support_ic_type == ODM_RTL8822C) ? DACK_VER_8822C : "unknown"
+
+#define IQK_THRESHOLD 8
+#define DPK_THRESHOLD 4
+#define HALRF_ABS(a,b) ((a>b) ? (a-b) : (b-a))
+#define SN 100
+/*@===========================================================*/
+/*AGC RX High Power mode*/
+/*@===========================================================*/
+#define lna_low_gain_1 0x64
+#define lna_low_gain_2 0x5A
+#define lna_low_gain_3 0x58
+
+/*@============================================================*/
+/*@ enumeration */
+/*@============================================================*/
+
+enum halrf_func_idx { /*F_XXX = PHYDM XXX function*/
+	RF00_PWR_TRK = 0,
+	RF01_IQK = 1,
+	RF02_LCK = 2,
+	RF03_DPK = 3,
+	RF04_TXGAPK = 4,
+	RF05_DACK = 5,
+	RF07_2GBAND_SHIFT = 7
+};
+
+enum halrf_ability {
+	HAL_RF_TX_PWR_TRACK = BIT(RF00_PWR_TRK),
+	HAL_RF_IQK = BIT(RF01_IQK),
+	HAL_RF_LCK = BIT(RF02_LCK),
+	HAL_RF_DPK = BIT(RF03_DPK),
+	HAL_RF_TXGAPK = BIT(RF04_TXGAPK),
+	HAL_RF_DACK = BIT(RF05_DACK),
+	HAL_2GBAND_SHIFT = BIT(RF07_2GBAND_SHIFT)
+};
+
+enum halrf_shift_band {
+	HAL_RF_2P4 = 0,
+	HAL_RF_2P3 = 1,
+	HAL_RF_2P5 = 2
+};
+
+enum halrf_dbg_comp {
+	DBG_RF_TX_PWR_TRACK = BIT(RF00_PWR_TRK),
+	DBG_RF_IQK = BIT(RF01_IQK),
+	DBG_RF_LCK = BIT(RF02_LCK),
+	DBG_RF_DPK = BIT(RF03_DPK),
+	DBG_RF_TXGAPK = BIT(RF04_TXGAPK),
+	DBG_RF_DACK = BIT(RF05_DACK),
+	DBG_RF_MP = BIT(29),
+	DBG_RF_TMP = BIT(30),
+	DBG_RF_INIT = BIT(31)
 };
 
-enum halrf_cmninfo_init_e {
+enum halrf_cmninfo_init {
 	HALRF_CMNINFO_ABILITY = 0,
 	HALRF_CMNINFO_DPK_EN = 1,
 	HALRF_CMNINFO_EEPROM_THERMAL_VALUE,
-	HALRF_CMNINFO_FW_VER,
 	HALRF_CMNINFO_RFK_FORBIDDEN,
 	HALRF_CMNINFO_IQK_SEGMENT,
 	HALRF_CMNINFO_RATE_INDEX,
+	HALRF_CMNINFO_PWT_TYPE,
 	HALRF_CMNINFO_MP_PSD_POINT,
 	HALRF_CMNINFO_MP_PSD_START_POINT,
 	HALRF_CMNINFO_MP_PSD_STOP_POINT,
 	HALRF_CMNINFO_MP_PSD_AVERAGE
 };
 
-enum halrf_cmninfo_hook_e {
+enum halrf_cmninfo_hook {
 	HALRF_CMNINFO_CON_TX,
 	HALRF_CMNINFO_SINGLE_TONE,
-	HALRF_CMNINFO_CARRIER_SUPPRESSION,	
+	HALRF_CMNINFO_CARRIER_SUPPRESSION,
 	HALRF_CMNINFO_MP_RATE_INDEX
 };
 
-enum phydm_lna_set {
-	phydm_lna_disable		= 0,
-	phydm_lna_enable		= 1,
+enum halrf_lna_set {
+	HALRF_LNA_DISABLE = 0,
+	HALRF_LNA_ENABLE = 1,
 };
 
-
-/*============================================================*/
-/* structure */
-/*============================================================*/
+/*@============================================================*/
+/*@ structure */
+/*@============================================================*/
 
 struct _hal_rf_ {
 	/*hook*/
-	u8		*test1;
+	u8 *test1;
 
 	/*update*/
-	u32		rf_supportability;
-
-	u8		eeprom_thermal;
-	u8		dpk_en;			/*Enable Function DPK OFF/ON = 0/1*/
-	boolean	dpk_done;
-	u32		fw_ver;
-
-	boolean	*p_is_con_tx;
-	boolean	*p_is_single_tone;
-	boolean	*p_is_carrier_suppresion;
-
-	u8		*p_mp_rate_index;
-	u32		p_rate_index;
+	u32 rf_supportability;
+	u8 rf_shift_band;
+
+	u8 eeprom_thermal;
+	u8 dpk_en; /*Enable Function DPK OFF/ON = 0/1*/
+	boolean dpk_done;
+	u64 dpk_progressing_time;
+	u32 fw_ver;
+
+	boolean *is_con_tx;
+	boolean *is_single_tone;
+	boolean *is_carrier_suppresion;
+	boolean is_dpk_in_progress;
+
+	u8 *mp_rate_index;
+	u32 p_rate_index;
+	u8 pwt_type;
+	u32 rf_dbg_comp;
 #if (DM_ODM_SUPPORT_TYPE & ODM_WIN)
-	struct	_halrf_psd_data	halrf_psd_data;
+	struct _halrf_psd_data halrf_psd_data;
 #endif
 };
 
-/*============================================================*/
-/* function prototype */
-/*============================================================*/
-
-void halrf_basic_profile(
-	void			*p_dm_void,
-	u32			*_used,
-	char			*output,
-	u32			*_out_len
-);
-#if (RTL8822B_SUPPORT == 1 || RTL8821C_SUPPORT == 1)
-void halrf_iqk_info_dump(
-	void *p_dm_void,
-	u32 *_used,
-	char *output,
-	u32 *_out_len
-);
-
-void
-halrf_iqk_hwtx_check(
-	void *p_dm_void,
-	boolean		is_check
-);
-#endif
+/*@============================================================*/
+/*@ function prototype */
+/*@============================================================*/
+
+#if (RTL8822B_SUPPORT == 1 || RTL8821C_SUPPORT == 1 ||\
+	RTL8195B_SUPPORT == 1 || RTL8198F_SUPPORT == 1 ||\
+	RTL8814B_SUPPORT == 1 || RTL8822C_SUPPORT == 1)
+void halrf_iqk_info_dump(void *dm_void, u32 *_used, char *output,
+			 u32 *_out_len);
 
-void
-halrf_support_ability_debug(
-	void		*p_dm_void,
-	char		input[][16],
-	u32		*_used,
-	char		*output,
-	u32		*_out_len
-);
-
-void
-halrf_cmn_info_init(
-	void		*p_dm_void,
-	enum halrf_cmninfo_init_e	cmn_info,
-	u32		value
-);
-
-void
-halrf_cmn_info_hook(
-	void		*p_dm_void,
-	u32		cmn_info,
-	void		*p_value
-);
-
-void
-halrf_cmn_info_set(
-	void		*p_dm_void,
-	u32			cmn_info,
-	u64			value
-);
-
-u64
-halrf_cmn_info_get(
-	void		*p_dm_void,
-	u32			cmn_info
-);
-
-void
-halrf_watchdog(
-	void			*p_dm_void
-);
-
-void
-halrf_supportability_init(
-	void		*p_dm_void
-);
-
-void
-halrf_init(
-	void			*p_dm_void
-);
-
-void
-halrf_iqk_trigger(
-	void			*p_dm_void,
-	boolean		is_recovery
-);
-
-void
-halrf_segment_iqk_trigger(
-	void			*p_dm_void,
-	boolean		clear,
-	boolean		segment_iqk
-);
-
-void
-halrf_lck_trigger(
-	void			*p_dm_void
-);
-
-void
-halrf_iqk_debug(
-	void		*p_dm_void,
-	u32		*const dm_value,
-	u32		*_used,
-	char		*output,
-	u32		*_out_len
-);
-
-void
-phydm_get_iqk_cfir(
-	void		*p_dm_void,
-	u8 idx,
-	u8 path,
-	boolean debug
-);
-
-void 
-halrf_iqk_xym_read(
-	void *p_dm_void,
-	u8 path,
-	u8 xym_type
- );
-
-void
-halrf_rf_lna_setting(
-	void	*p_dm_void,
-	enum phydm_lna_set type
-);
-
-
-void
-halrf_do_imr_test(
-	void	*p_dm_void,
-	u8 data
-);
-
-u32
-halrf_psd_log2base(
-	IN u32 val
-);
-
-
-#if (RTL8822B_SUPPORT == 1 || RTL8821C_SUPPORT == 1)
-void halrf_iqk_dbg(void	*p_dm_void);
+void halrf_iqk_hwtx_check(void *dm_void, boolean is_check);
 #endif
+
+u8 halrf_match_iqk_version(void *dm_void);
+
+void halrf_support_ability_debug(void *dm_void, char input[][16], u32 *_used,
+				 char *output, u32 *_out_len);
+void halrf_support_band_shift_debug(void *dm_void, char input[][16], u32 *_used,
+				    char *output, u32 *_out_len);
+
+void halrf_cmn_info_init(void *dm_void, enum halrf_cmninfo_init cmn_info,
+			 u32 value);
+
+void halrf_cmn_info_hook(void *dm_void, enum halrf_cmninfo_hook cmn_info,
+			 void *value);
+
+void halrf_cmn_info_set(void *dm_void, u32 cmn_info, u64 value);
+
+u64 halrf_cmn_info_get(void *dm_void, u32 cmn_info);
+
+void halrf_watchdog(void *dm_void);
+
+void halrf_supportability_init(void *dm_void);
+
+void halrf_init(void *dm_void);
+
+void halrf_iqk_trigger(void *dm_void, boolean is_recovery);
+
+void halrf_segment_iqk_trigger(void *dm_void, boolean clear,
+			       boolean segment_iqk);
+
+void halrf_lck_trigger(void *dm_void);
+
+void halrf_iqk_debug(void *dm_void, u32 *const dm_value, u32 *_used,
+		     char *output, u32 *_out_len);
+
+void phydm_get_iqk_cfir(void *dm_void, u8 idx, u8 path, boolean debug);
+
+void halrf_iqk_xym_read(void *dm_void, u8 path, u8 xym_type);
+
+void halrf_rf_lna_setting(void *dm_void, enum halrf_lna_set type);
+
+void halrf_do_imr_test(void *dm_void, u8 data);
+
+u32 halrf_psd_log2base(u32 val);
+
+void halrf_dpk_trigger(void *dm_void);
+
+u8 halrf_dpk_result_check(void *dm_void);
+
+void halrf_dpk_sram_read(void *dm_void);
+
+void halrf_dpk_enable_disable(void *dm_void);
+
+void halrf_dpk_track(void *dm_void);
+
+void halrf_dpk_reload(void *dm_void);
+
+/*Global function*/
+
+void halrf_reload_bp(void *dm_void, u32 *bp_reg, u32 *bp, u32 num);
+
+void halrf_reload_bprf(void *dm_void, u32 *bp_reg, u32 bp[][4], u32 num,
+		       u8 ss);
+
+void halrf_bp(void *dm_void, u32 *bp_reg, u32 *bp, u32 num);
+
+void halrf_bprf(void *dm_void, u32 *bp_reg, u32 bp[][4], u32 num, u8 ss);
+
+void halrf_mode(void *dm_void, u32 *i_value, u32 *q_value);
+
+boolean halrf_compare(void *dm_void, u32 value);
+
+u32 halrf_delta(void *dm_void, u32 v1, u32 v2);
+
+void halrf_minmax_compare(void *dm_void, u32 value, u32 *min, u32 *max);
+
+void halrf_b_sort(void *dm_void, u32 *iv, u32 *qv);
+
+void halrf_bubble(void *dm_void, u32 *v1, u32 *v2);
+
+void halrf_swap(void *dm_void, u32 *v1, u32 *v2);
+
+enum hal_status
+halrf_config_rfk_with_header_file(void *dm_void, u32 config_type);
+
+#if (RTL8822B_SUPPORT == 1 || RTL8821C_SUPPORT == 1 ||\
+	RTL8195B_SUPPORT == 1 || RTL8198F_SUPPORT == 1 ||\
+	RTL8814B_SUPPORT == 1  || RTL8822C_SUPPORT == 1)
+void halrf_iqk_dbg(void *dm_void);
 #endif
 
+void halrf_tssi_init(void *dm_void);
+
+void halrf_do_tssi(void *dm_void);
+
+void halrf_set_tssi_value(void *dm_void, u32 tssi_value);
+
+u32 halrf_query_tssi_value(void *dm_void);
 
+#endif /*__HALRF_H__*/
diff --git a/rtl8723DS/hal/phydm/halrf/halrf_debug.c b/rtl8723DS/hal/phydm/halrf/halrf_debug.c
new file mode 100644
index 0000000..85a7cb2
--- a/dev/null
+++ b/rtl8723DS/hal/phydm/halrf/halrf_debug.c
@@ -0,0 +1,267 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2007 - 2017  Realtek Corporation.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ *
+ * The full GNU General Public License is included in this distribution in the
+ * file called LICENSE.
+ *
+ * Contact Information:
+ * wlanfae <wlanfae@realtek.com>
+ * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
+ * Hsinchu 300, Taiwan.
+ *
+ * Larry Finger <Larry.Finger@lwfinger.net>
+ *
+ *****************************************************************************/
+
+/*@************************************************************
+ * include files
+ * ************************************************************
+ */
+
+#include "mp_precomp.h"
+#include "phydm_precomp.h"
+
+void halrf_basic_profile(void *dm_void, u32 *_used, char *output, u32 *_out_len)
+{
+#ifdef CONFIG_PHYDM_DEBUG_FUNCTION
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	u32 used = *_used;
+	u32 out_len = *_out_len;
+
+	/* HAL RF version List */
+	PDM_SNPF(out_len, used, output + used, out_len - used, "%-35s\n",
+		 "% HAL RF version %");
+	PDM_SNPF(out_len, used, output + used, out_len - used, "  %-35s: %s\n",
+		 "Power Tracking", HALRF_POWRTRACKING_VER);
+	PDM_SNPF(out_len, used, output + used, out_len - used,
+		 "  %-35s: %s %s\n", "IQK",
+		 (dm->fw_offload_ability & PHYDM_RF_IQK_OFFLOAD) ? "FW" :
+		 HALRF_IQK_VER,
+		 (halrf_match_iqk_version(dm_void)) ? "(match)" : "(mismatch)");
+
+	PDM_SNPF(out_len, used, output + used, out_len - used, "  %-35s: %s\n",
+		 "LCK", HALRF_LCK_VER);
+	PDM_SNPF(out_len, used, output + used, out_len - used, "  %-35s: %s\n",
+		 "DPK", HALRF_DPK_VER);
+	PDM_SNPF(out_len, used, output + used, out_len - used, "  %-35s: %s\n",
+		 "KFREE", HALRF_KFREE_VER);
+	PDM_SNPF(out_len, used, output + used, out_len - used, "  %-35s: %s\n",
+		 "TX 2G Current Calibration", HALRF_PABIASK_VER);
+	PDM_SNPF(out_len, used, output + used, out_len - used, "  %-35s: %s\n",
+		 "RFK Init. Parameter", HALRF_RFK_INIT_VER);
+
+	*_used = used;
+	*_out_len = out_len;
+#endif
+}
+
+void halrf_debug_trace(void *dm_void, char input[][16], u32 *_used,
+		       char *output, u32 *_out_len)
+{
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct _hal_rf_ *rf = &dm->rf_table;
+	u32 one = 1;
+	u32 used = *_used;
+	u32 out_len = *_out_len;
+	u32 rf_var[10] = {0};
+	u8 i;
+
+	for (i = 0; i < 5; i++)
+		if (input[i + 1])
+			PHYDM_SSCANF(input[i + 2], DCMD_DECIMAL, &rf_var[i]);
+
+	if (rf_var[0] == 100) {
+		PDM_SNPF(out_len, used, output + used, out_len - used,
+			 "\n[DBG MSG] RF Selection\n");
+		PDM_SNPF(out_len, used, output + used, out_len - used,
+			 "00. (( %s ))TX_PWR_TRACK\n",
+			 ((rf->rf_dbg_comp & DBG_RF_TX_PWR_TRACK) ? ("V") :
+			 (".")));
+		PDM_SNPF(out_len, used, output + used, out_len - used,
+			 "01. (( %s ))IQK\n",
+			 ((rf->rf_dbg_comp & DBG_RF_IQK) ? ("V") : (".")));
+		PDM_SNPF(out_len, used, output + used, out_len - used,
+			 "02. (( %s ))LCK\n",
+			 ((rf->rf_dbg_comp & DBG_RF_LCK) ? ("V") : (".")));
+		PDM_SNPF(out_len, used, output + used, out_len - used,
+			 "03. (( %s ))DPK\n",
+			 ((rf->rf_dbg_comp & DBG_RF_DPK) ? ("V") : (".")));
+		PDM_SNPF(out_len, used, output + used, out_len - used,
+			 "04. (( %s ))TXGAPK\n",
+			 ((rf->rf_dbg_comp & DBG_RF_TXGAPK) ? ("V") : (".")));
+		PDM_SNPF(out_len, used, output + used, out_len - used,
+			 "29. (( %s ))MP\n",
+			 ((rf->rf_dbg_comp & DBG_RF_MP) ? ("V") : (".")));
+		PDM_SNPF(out_len, used, output + used, out_len - used,
+			 "30. (( %s ))TMP\n",
+			 ((rf->rf_dbg_comp & DBG_RF_TMP) ? ("V") : (".")));
+		PDM_SNPF(out_len, used, output + used, out_len - used,
+			 "31. (( %s ))INIT\n",
+			 ((rf->rf_dbg_comp & DBG_RF_INIT) ? ("V") : (".")));
+
+	} else if (rf_var[0] == 101) {
+		rf->rf_dbg_comp = 0;
+		PDM_SNPF(out_len, used, output + used, out_len - used,
+			 "Disable all DBG COMP\n");
+	} else {
+		if (rf_var[1] == 1) /*enable*/
+			rf->rf_dbg_comp |= (one << rf_var[0]);
+		else if (rf_var[1] == 2) /*disable*/
+			rf->rf_dbg_comp &= ~(one << rf_var[0]);
+	}
+	PDM_SNPF(out_len, used, output + used, out_len - used,
+		 "\nCurr-RF_Dbg_Comp = 0x%x\n", rf->rf_dbg_comp);
+
+	*_used = used;
+	*_out_len = out_len;
+}
+
+struct halrf_command {
+	char name[16];
+	u8 id;
+};
+
+enum halrf_CMD_ID {
+	HALRF_HELP,
+	HALRF_SUPPORTABILITY,
+	HALRF_DBG_COMP,
+	HALRF_PROFILE,
+	HALRF_IQK_INFO,
+	HALRF_IQK,
+	HALRF_IQK_DEBUG,
+	HAL_BAND_SHIFT,
+};
+
+struct halrf_command halrf_cmd_ary[] = {
+	{"-h", HALRF_HELP},
+	{"ability", HALRF_SUPPORTABILITY},
+	{"dbg", HALRF_DBG_COMP},
+	{"profile", HALRF_PROFILE},
+	{"iqk_info", HALRF_IQK_INFO},
+	{"iqk", HALRF_IQK},
+	{"iqk_dbg", HALRF_IQK_DEBUG},
+	{"band_shift", HAL_BAND_SHIFT},
+};
+
+void halrf_cmd_parser(void *dm_void, char input[][16], u32 *_used, char *output,
+		      u32 *_out_len, u32 input_num)
+{
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+#ifdef CONFIG_PHYDM_DEBUG_FUNCTION
+	u8 id = 0;
+	u32 rf_var[10] = {0};
+	u32 i, input_idx = 0;
+	u32 halrf_ary_size =
+			sizeof(halrf_cmd_ary) / sizeof(struct halrf_command);
+	u32 used = *_used;
+	u32 out_len = *_out_len;
+
+	/* Parsing Cmd ID */
+	for (i = 0; i < halrf_ary_size; i++) {
+		if (strcmp(halrf_cmd_ary[i].name, input[1]) == 0) {
+			id = halrf_cmd_ary[i].id;
+			break;
+		}
+	}
+
+	if (i == halrf_ary_size) {
+		PDM_SNPF(out_len, used, output + used, out_len - used,
+			 "RF Cmd not found\n");
+		return;
+	}
+
+	switch (id) {
+	case HALRF_HELP:
+		PDM_SNPF(out_len, used, output + used, out_len - used,
+			 "RF cmd ==>\n");
+
+		for (i = 0; i < halrf_ary_size - 1; i++) {
+			PDM_SNPF(out_len, used, output + used, out_len - used,
+				 "  %-5d: %s\n", i, halrf_cmd_ary[i + 1].name);
+		}
+		break;
+	case HALRF_SUPPORTABILITY:
+		halrf_support_ability_debug(dm, &input[0], &used, output,
+					    &out_len);
+		break;
+	case HAL_BAND_SHIFT:
+		halrf_support_band_shift_debug(dm, &input[0], &used, output,
+					       &out_len);
+		break;
+	case HALRF_DBG_COMP:
+		halrf_debug_trace(dm, &input[0], &used, output, &out_len);
+		break;
+	case HALRF_PROFILE:
+		halrf_basic_profile(dm, &used, output, &out_len);
+		break;
+	case HALRF_IQK_INFO:
+#if (RTL8822B_SUPPORT == 1 || RTL8821C_SUPPORT == 1)
+		halrf_iqk_info_dump(dm, &used, output, &out_len);
+#endif
+		break;
+	case HALRF_IQK:
+		PDM_SNPF(out_len, used, output + used, out_len - used,
+			 "TRX IQK Trigger\n");
+		halrf_iqk_trigger(dm, false);
+#if (RTL8822B_SUPPORT == 1 || RTL8821C_SUPPORT == 1)
+		halrf_iqk_info_dump(dm, &used, output, &out_len);
+#endif
+		break;
+	case HALRF_IQK_DEBUG:
+
+		for (i = 0; i < 5; i++) {
+			if (input[i + 1]) {
+				PHYDM_SSCANF(input[i + 2], DCMD_HEX,
+					     &rf_var[i]);
+				input_idx++;
+			}
+		}
+
+		if (input_idx >= 1) {
+#if (RTL8822B_SUPPORT == 1 || RTL8821C_SUPPORT == 1)
+			if (dm->support_ic_type & (ODM_RTL8822B | ODM_RTL8821C))
+				halrf_iqk_debug(dm, (u32 *)rf_var, &used,
+						output, &out_len);
+#endif
+		}
+		break;
+	default:
+		break;
+	}
+
+	*_used = used;
+	*_out_len = out_len;
+#endif
+}
+
+void halrf_init_debug_setting(void *dm_void)
+{
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct _hal_rf_ *rf = &dm->rf_table;
+
+	rf->rf_dbg_comp =
+#if DBG
+#if 0
+	/*DBG_RF_TX_PWR_TRACK	|*/
+	/*DBG_RF_IQK		| */
+	/*DBG_RF_LCK		| */
+	/*DBG_RF_DPK		| */
+	/*DBG_RF_DACK		| */
+	/*DBG_RF_TXGAPK		| */
+	/*DBG_RF_MP			| */
+	/*DBG_RF_TMP		| */
+	/*DBG_RF_INIT		| */
+#endif
+#endif
+	0;
+}
diff --git a/rtl8723DS/hal/phydm/halrf/halrf_debug.h b/rtl8723DS/hal/phydm/halrf/halrf_debug.h
new file mode 100644
index 0000000..ff1ff96
--- a/dev/null
+++ b/rtl8723DS/hal/phydm/halrf/halrf_debug.h
@@ -0,0 +1,123 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2007 - 2017  Realtek Corporation.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ *
+ * The full GNU General Public License is included in this distribution in the
+ * file called LICENSE.
+ *
+ * Contact Information:
+ * wlanfae <wlanfae@realtek.com>
+ * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
+ * Hsinchu 300, Taiwan.
+ *
+ * Larry Finger <Larry.Finger@lwfinger.net>
+ *
+ *****************************************************************************/
+
+#ifndef __HALRF_DEBUG_H__
+#define __HALRF_DEBUG_H__
+
+/*@============================================================*/
+/*@include files*/
+/*@============================================================*/
+
+/*@============================================================*/
+/*@Definition */
+/*@============================================================*/
+
+#if DBG
+
+#if (DM_ODM_SUPPORT_TYPE == ODM_AP)
+#define RF_DBG(dm, comp, fmt, args...)                     \
+	do {                                               \
+		if ((comp) & dm->rf_table.rf_dbg_comp) { \
+			pr_debug("[RF] ");                 \
+			RT_PRINTK(fmt, ##args);            \
+		}                                          \
+	} while (0)
+
+#elif (DM_ODM_SUPPORT_TYPE == ODM_WIN)
+
+static __inline void RF_DBG(PDM_ODM_T dm, int comp, char *fmt, ...)
+{
+	RT_STATUS rt_status;
+	va_list args;
+	char buf[PRINT_MAX_SIZE] = {0};
+
+	if ((comp & dm->rf_table.rf_dbg_comp) == 0)
+		return;
+
+	if (fmt == NULL)
+		return;
+
+	va_start(args, fmt);
+	rt_status = (RT_STATUS)RtlStringCbVPrintfA(buf, PRINT_MAX_SIZE, fmt, args);
+	va_end(args);
+
+	if (rt_status != RT_STATUS_SUCCESS) {
+		DbgPrint("Failed (%d) to print message to buffer\n", rt_status);
+		return;
+	}
+
+	DbgPrint("[RF] %s", buf);
+}
+
+#elif (DM_ODM_SUPPORT_TYPE == ODM_IOT)
+
+#define RF_DBG(dm, comp, fmt, args...)                     \
+	do {                                               \
+		if ((comp) & dm->rf_table.rf_dbg_comp) { \
+			RT_DEBUG(COMP_PHYDM, DBG_DMESG, "[RF] " fmt, ##args);  \
+		}                                          \
+	} while (0)
+
+#else
+#define RF_DBG(dm, comp, fmt, args...)                                         \
+	do {                                                                   \
+		struct dm_struct *__dm = dm;                                   \
+		if ((comp) & __dm->rf_table.rf_dbg_comp) {                     \
+			RT_TRACE(((struct rtl_priv *)__dm->adapter),           \
+				 COMP_PHYDM, DBG_DMESG, "[RF] " fmt, ##args);  \
+		}                                                              \
+	} while (0)
+#endif
+
+#else /*#if DBG*/
+
+#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
+static __inline void RF_DBG(struct dm_struct *dm, int comp, char *fmt, ...)
+{
+}
+#else
+#define RF_DBG(dm, comp, fmt, args...)
+#endif
+
+#endif /*#if DBG*/
+
+/*@============================================================*/
+/*@ enumeration */
+/*@============================================================*/
+
+/*@============================================================*/
+/*@ structure */
+/*@============================================================*/
+
+/*@============================================================*/
+/*@ function prototype */
+/*@============================================================*/
+
+void halrf_cmd_parser(void *dm_void, char input[][16], u32 *_used, char *output,
+		      u32 *_out_len, u32 input_num);
+
+void halrf_init_debug_setting(void *dm_void);
+
+#endif /*__HALRF_H__*/
diff --git a/rtl8723DS/hal/phydm/halrf/halrf_dpk.h b/rtl8723DS/hal/phydm/halrf/halrf_dpk.h
new file mode 100644
index 0000000..c9efc7e
--- a/dev/null
+++ b/rtl8723DS/hal/phydm/halrf/halrf_dpk.h
@@ -0,0 +1,86 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2007 - 2017  Realtek Corporation.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ *
+ * The full GNU General Public License is included in this distribution in the
+ * file called LICENSE.
+ *
+ * Contact Information:
+ * wlanfae <wlanfae@realtek.com>
+ * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
+ * Hsinchu 300, Taiwan.
+ *
+ * Larry Finger <Larry.Finger@lwfinger.net>
+ *
+ *****************************************************************************/
+
+#ifndef __HALRF_DPK_H__
+#define __HALRF_DPK_H__
+
+/*@--------------------------Define Parameters-------------------------------*/
+#define GAIN_LOSS 1
+#define DO_DPK 2
+#define DPK_ON 3
+#define DPK_LOK 4
+#define DPK_TXK 5
+
+#define DAGC 4
+#define LOSS_CHK 0
+#define GAIN_CHK 1
+#define PAS_READ 2
+#define AVG_THERMAL_NUM 8
+#define AVG_THERMAL_NUM_DPK 8
+#define THERMAL_DPK_AVG_NUM 4
+
+/*@---------------------------End Define Parameters---------------------------*/
+
+struct dm_dpk_info {
+
+	boolean	is_dpk_enable;
+	boolean	is_dpk_pwr_on;
+	boolean	is_dpk_by_channel;
+	u16 dpk_path_ok;
+	/*@BIT(15)~BIT(12) : 5G reserved, BIT(11)~BIT(8) 5G_S3~5G_S0*/
+	/*@BIT(7)~BIT(4) : 2G reserved, BIT(3)~BIT(0) 2G_S3~2G_S0*/
+	u8	thermal_dpk;
+	u8	thermal_dpk_avg[AVG_THERMAL_NUM_DPK];
+	u8	thermal_dpk_avg_index;
+
+#if (RTL8822C_SUPPORT == 1)
+	u8 	result[2][1];			/*path/group*/
+	u8 	tx_agc[2][1];			/*path/group*/
+	u32	coef[2][1][20];			/*path/group/MDPD coefficient*/
+#endif
+
+#if (RTL8198F_SUPPORT == 1 || RTL8192F_SUPPORT == 1 || RTL8197F_SUPPORT == 1)
+	/*2G DPK data*/
+	u8 	dpk_result[4][3];		/*path/group*/
+	u8 	pwsf_2g[4][3];			/*path/group*/
+	u32	lut_2g_even[4][3][64];		/*path/group/LUT data*/
+	u32	lut_2g_odd[4][3][64];		/*path/group/LUT data*/
+#endif
+
+#if (RTL8195B_SUPPORT == 1)
+		/*2G DPK data*/
+		u8	dpk_2g_result[1][3];		/*path/group*/
+		u8	pwsf_2g[1][3];			/*path/group*/
+		u32	lut_2g_even[1][3][16];		/*path/group/LUT data*/
+		u32	lut_2g_odd[1][3][16];		/*path/group/LUT data*/
+		/*5G DPK data*/
+		u8	dpk_5g_result[1][6];		/*path/group*/
+		u8	pwsf_5g[1][6];			/*path/group*/
+		u32	lut_5g_even[1][6][16];		/*path/group/LUT data*/
+		u32	lut_5g_odd[1][6][16];		/*path/group/LUT data*/
+#endif
+};
+
+#endif /*__HALRF_DPK_H__*/
diff --git a/rtl8723DS/hal/phydm/halrf/halrf_features.h b/rtl8723DS/hal/phydm/halrf/halrf_features.h
index e119adc..da97614 100755..100644
--- a/rtl8723DS/hal/phydm/halrf/halrf_features.h
+++ b/rtl8723DS/hal/phydm/halrf/halrf_features.h
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2007 - 2017 Realtek Corporation.
+ * Copyright(c) 2007 - 2017  Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -8,26 +8,36 @@
  *
  * This program is distributed in the hope that it will be useful, but WITHOUT
  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  * more details.
  *
+ * The full GNU General Public License is included in this distribution in the
+ * file called LICENSE.
+ *
+ * Contact Information:
+ * wlanfae <wlanfae@realtek.com>
+ * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
+ * Hsinchu 300, Taiwan.
+ *
+ * Larry Finger <Larry.Finger@lwfinger.net>
+ *
  *****************************************************************************/
 
-#ifndef	__HALRF_FEATURES_H__
-#define __HALRF_FEATURES
+#ifndef __HALRF_FEATURES_H__
+#define __HALRF_FEATURES_H__
 
 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
 
-	#define	CONFIG_HALRF_POWERTRACKING	1
+#define CONFIG_HALRF_POWERTRACKING 1
 
 #elif (DM_ODM_SUPPORT_TYPE == ODM_AP)
 
-	#define	CONFIG_HALRF_POWERTRACKING	1
+#define CONFIG_HALRF_POWERTRACKING 1
 
 #elif (DM_ODM_SUPPORT_TYPE == ODM_CE)
 
-	#define	CONFIG_HALRF_POWERTRACKING	1
+#define CONFIG_HALRF_POWERTRACKING 1
 
 #endif
 
-#endif
+#endif /*#ifndef __HALRF_FEATURES_H__*/
diff --git a/rtl8723DS/hal/phydm/halrf/halrf_iqk.h b/rtl8723DS/hal/phydm/halrf/halrf_iqk.h
index 93ec3c4..0fa676b 100755..100644
--- a/rtl8723DS/hal/phydm/halrf/halrf_iqk.h
+++ b/rtl8723DS/hal/phydm/halrf/halrf_iqk.h
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2007 - 2017 Realtek Corporation.
+ * Copyright(c) 2007 - 2017  Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -8,68 +8,96 @@
  *
  * This program is distributed in the hope that it will be useful, but WITHOUT
  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  * more details.
  *
+ * The full GNU General Public License is included in this distribution in the
+ * file called LICENSE.
+ *
+ * Contact Information:
+ * wlanfae <wlanfae@realtek.com>
+ * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
+ * Hsinchu 300, Taiwan.
+ *
+ * Larry Finger <Larry.Finger@lwfinger.net>
+ *
  *****************************************************************************/
 
-#ifndef	__PHYDMIQK_H__
-#define __PHYDMIQK_H__
+#ifndef __HALRF_IQK_H__
+#define __HALRF_IQK_H__
 
-/*--------------------------Define Parameters-------------------------------*/
-#define	LOK_delay 1
-#define	WBIQK_delay 10
-#define	TX_IQK 0
-#define	RX_IQK 1
-#define	TXIQK 0
-#define	RXIQK1 1
-#define	RXIQK2 2
+/*@--------------------------Define Parameters-------------------------------*/
+#define LOK_delay 1
+#define WBIQK_delay 10
+#define TX_IQK 0
+#define RX_IQK 1
+#define TXIQK 0
+#define RXIQK1 1
+#define RXIQK2 2
 #define kcount_limit_80m 2
 #define kcount_limit_others 4
-#define rxiqk_gs_limit 4
+#define rxiqk_gs_limit 10
+#define TXWBIQK_EN 1
+#define RXWBIQK_EN 1
+#define NUM 4
+/*@-----------------------End Define Parameters-----------------------*/
 
-#define	NUM 4
-/*---------------------------End Define Parameters-------------------------------*/
+struct dm_dack_info {
+	u32 ic_a;
+	u32 qc_a;
+	u32 ic_b;
+	u32 qc_b;
+};
 
-struct _IQK_INFORMATION {
-	boolean		LOK_fail[NUM];
-	boolean		IQK_fail[2][NUM];
-	u32		iqc_matrix[2][NUM];
-	u8      iqk_times;
-	u32		rf_reg18;
-	u32		lna_idx;
-	u8		rxiqk_step;
-	u8		tmp1bcc;
-	u8		kcount;
-	u8		rfk_ing; /*bit0:IQKing, bit1:LCKing, bit2:DPKing*/
-	boolean rfk_forbidden;	
-#if (RTL8814A_SUPPORT == 1 || RTL8822B_SUPPORT == 1 || RTL8821C_SUPPORT == 1)
-	u32		iqk_channel[2];
-	boolean		IQK_fail_report[2][4][2]; /*channel/path/TRX(TX:0, RX:1) */
-	u32		IQK_CFIR_real[3][4][2][8]; /*channel / path / TRX(TX:0, RX:1) / CFIR_real*/ /*channel index = 2 is just for debug*/
-	u32		IQK_CFIR_imag[3][4][2][8]; /*channel / path / TRX(TX:0, RX:1) / CFIR_imag*/ /*channel index = 2 is just for debug*/
-	u8		retry_count[2][4][3]; /* channel / path / (TXK:0, RXK1:1, RXK2:2) */
-	u8		gs_retry_count[2][4][2]; /* channel / path / (GSRXK1:0, GSRXK2:1) */
-	u8		RXIQK_fail_code[2][4]; /* channel / path 0:SRXK1 fail, 1:RXK1 fail 2:RXK2 fail */
-	u32		LOK_IDAC[2][4];		/*channel / path*/
-	u16		RXIQK_AGC[2][4];	 /*channel / path*/
-	u32		bypass_iqk[2][4];	/*channel / 0xc94/0xe94*/
-	u32		txgap_result[8]; /*txagpK result  */
-	u32		tmp_GNTWL;
-	boolean		is_BTG;
-	boolean		isbnd;
+struct dm_iqk_info {
+	boolean lok_fail[NUM];
+	boolean iqk_fail[2][NUM];
+	u32 iqc_matrix[2][NUM];
+	u8 iqk_times;
+	u32 rf_reg18;
+	u32 rf_reg08;
+	u32 lna_idx;
+	u8 iqk_step;
+	u8 rxiqk_step;
+	u8 tmp1bcc;
+	u8 txgain;
+	u8 kcount;
+	u8 rfk_ing; /*bit0:IQKing, bit1:LCKing, bit2:DPKing*/
+	boolean rfk_forbidden;
+	u8 rxbb;
+#if (RTL8814A_SUPPORT == 1 || RTL8822B_SUPPORT == 1 || RTL8821C_SUPPORT == 1 ||\
+	RTL8195B_SUPPORT == 1 || RTL8198F_SUPPORT == 1 ||\
+	RTL8814B_SUPPORT == 1 || RTL8822C_SUPPORT == 1)
+	u32 iqk_channel[2];
+	boolean iqk_fail_report[2][4][2]; /*channel/path/TRX(TX:0, RX:1) */
+	/*channel / path / TRX(TX:0, RX:1) / CFIR_real*/
+	/*channel index = 2 is just for debug*/
+	u32 iqk_cfir_real[3][4][2][8];
+	/*channel / path / TRX(TX:0, RX:1) / CFIR_imag*/
+	/*channel index = 2 is just for debug*/
+	u32 iqk_cfir_imag[3][4][2][8];
+	u8 retry_count[2][4][3]; /* channel / path / (TXK:0, RXK1:1, RXK2:2) */
+	u8 gs_retry_count[2][4][2]; /* channel / path / (GSRXK1:0, GSRXK2:1) */
+	/* channel / path 0:SRXK1 fail, 1:RXK1 fail 2:RXK2 fail */
+	u8 rxiqk_fail_code[2][4];
+	u32 lok_idac[2][4]; /*channel / path*/
+	u16 rxiqk_agc[2][4]; /*channel / path*/
+	u32 bypass_iqk[2][4]; /*channel / 0xc94/0xe94*/
+	u32 txgap_result[8]; /*txagpK result  */
+	u32 tmp_gntwl;
+	boolean is_btg;
+	boolean isbnd;
 	boolean is_reload;
 	boolean segment_iqk;
 	boolean is_hwtx;
-	
-	boolean	xym_read;
+	boolean xym_read;
 	boolean trximr_enable;
-	u32		rx_xym[2][10];
-	u32		tx_xym[2][10];
-	u32		gs1_xym[2][6];
-	u32		gs2_xym[2][6];
-	u32		rxk1_xym[2][6];
+	u32 rx_xym[2][10];
+	u32 tx_xym[2][10];
+	u32 gs1_xym[2][6];
+	u32 gs2_xym[2][6];
+	u32 rxk1_xym[2][6];
 #endif
 };
 
-#endif
+#endif /*__HALRF_IQK_H__*/
diff --git a/rtl8723DS/hal/phydm/halrf/halrf_kfree.c b/rtl8723DS/hal/phydm/halrf/halrf_kfree.c
index 0b8671e..cee13be 100755..100644
--- a/rtl8723DS/hal/phydm/halrf/halrf_kfree.c
+++ b/rtl8723DS/hal/phydm/halrf/halrf_kfree.c
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2007 - 2017 Realtek Corporation.
+ * Copyright(c) 2007 - 2017  Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -8,425 +8,372 @@
  *
  * This program is distributed in the hope that it will be useful, but WITHOUT
  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  * more details.
  *
+ * The full GNU General Public License is included in this distribution in the
+ * file called LICENSE.
+ *
+ * Contact Information:
+ * wlanfae <wlanfae@realtek.com>
+ * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
+ * Hsinchu 300, Taiwan.
+ *
+ * Larry Finger <Larry.Finger@lwfinger.net>
+ *
  *****************************************************************************/
 
-/*============================================================*/
-/*include files*/
-/*============================================================*/
+/*@============================================================*/
+/*@include files*/
+/*@============================================================*/
 #include "mp_precomp.h"
 #include "phydm_precomp.h"
 
+/*@<YuChen, 150720> Add for KFree Feature Requested by RF David.*/
+/*@This is a phydm API*/
 
-/*<YuChen, 150720> Add for KFree Feature Requested by RF David.*/
-/*This is a phydm API*/
-
-void
-phydm_set_kfree_to_rf_8814a(
-	void		*p_dm_void,
-	u8		e_rf_path,
-	u8		data
-)
+void phydm_set_kfree_to_rf_8814a(void *dm_void, u8 e_rf_path, u8 data)
 {
-	struct PHY_DM_STRUCT		*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	struct odm_rf_calibration_structure	*p_rf_calibrate_info = &(p_dm->rf_calibrate_info);
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct dm_rf_calibration_struct *cali_info = &dm->rf_calibrate_info;
 	boolean is_odd;
+	u32 tx_gain_bitmask = (BIT(17) | BIT(16) | BIT(15));
 
-	if ((data % 2) != 0) {	/*odd->positive*/
+	if ((data % 2) != 0) { /*odd->positive*/
 		data = data - 1;
-		odm_set_rf_reg(p_dm, e_rf_path, REG_RF_TX_GAIN_OFFSET, BIT(19), 1);
+		odm_set_rf_reg(dm, e_rf_path, RF_0x55, BIT(19), 1);
 		is_odd = true;
-	} else {		/*even->negative*/
-		odm_set_rf_reg(p_dm, e_rf_path, REG_RF_TX_GAIN_OFFSET, BIT(19), 0);
+	} else { /*even->negative*/
+		odm_set_rf_reg(dm, e_rf_path, RF_0x55, BIT(19), 0);
 		is_odd = false;
 	}
-	ODM_RT_TRACE(p_dm, ODM_COMP_MP, ODM_DBG_LOUD, ("phy_ConfigKFree8814A(): RF_0x55[19]= %d\n", is_odd));
+	RF_DBG(dm, DBG_RF_MP, "phy_ConfigKFree8814A(): RF_0x55[19]= %d\n",
+	       is_odd);
 	switch (data) {
 	case 0:
-		odm_set_rf_reg(p_dm, e_rf_path, REG_RF_TX_GAIN_OFFSET, BIT(14), 0);
-		odm_set_rf_reg(p_dm, e_rf_path, REG_RF_TX_GAIN_OFFSET, BIT(17) | BIT(16) | BIT(15), 0);
-		p_rf_calibrate_info->kfree_offset[e_rf_path] = 0;
+		odm_set_rf_reg(dm, e_rf_path, RF_0x55, BIT(14), 0);
+		odm_set_rf_reg(dm, e_rf_path, RF_0x55, tx_gain_bitmask, 0);
+		cali_info->kfree_offset[e_rf_path] = 0;
 		break;
 	case 2:
-		odm_set_rf_reg(p_dm, e_rf_path, REG_RF_TX_GAIN_OFFSET, BIT(14), 1);
-		odm_set_rf_reg(p_dm, e_rf_path, REG_RF_TX_GAIN_OFFSET, BIT(17) | BIT(16) | BIT(15), 0);
-		p_rf_calibrate_info->kfree_offset[e_rf_path] = 0;
+		odm_set_rf_reg(dm, e_rf_path, RF_0x55, BIT(14), 1);
+		odm_set_rf_reg(dm, e_rf_path, RF_0x55, tx_gain_bitmask, 0);
+		cali_info->kfree_offset[e_rf_path] = 0;
 		break;
 	case 4:
-		odm_set_rf_reg(p_dm, e_rf_path, REG_RF_TX_GAIN_OFFSET, BIT(14), 0);
-		odm_set_rf_reg(p_dm, e_rf_path, REG_RF_TX_GAIN_OFFSET, BIT(17) | BIT(16) | BIT(15), 1);
-		p_rf_calibrate_info->kfree_offset[e_rf_path] = 1;
+		odm_set_rf_reg(dm, e_rf_path, RF_0x55, BIT(14), 0);
+		odm_set_rf_reg(dm, e_rf_path, RF_0x55, tx_gain_bitmask, 1);
+		cali_info->kfree_offset[e_rf_path] = 1;
 		break;
 	case 6:
-		odm_set_rf_reg(p_dm, e_rf_path, REG_RF_TX_GAIN_OFFSET, BIT(14), 1);
-		odm_set_rf_reg(p_dm, e_rf_path, REG_RF_TX_GAIN_OFFSET, BIT(17) | BIT(16) | BIT(15), 1);
-		p_rf_calibrate_info->kfree_offset[e_rf_path] = 1;
+		odm_set_rf_reg(dm, e_rf_path, RF_0x55, BIT(14), 1);
+		odm_set_rf_reg(dm, e_rf_path, RF_0x55, tx_gain_bitmask, 1);
+		cali_info->kfree_offset[e_rf_path] = 1;
 		break;
 	case 8:
-		odm_set_rf_reg(p_dm, e_rf_path, REG_RF_TX_GAIN_OFFSET, BIT(14), 0);
-		odm_set_rf_reg(p_dm, e_rf_path, REG_RF_TX_GAIN_OFFSET, BIT(17) | BIT(16) | BIT(15), 2);
-		p_rf_calibrate_info->kfree_offset[e_rf_path] = 2;
+		odm_set_rf_reg(dm, e_rf_path, RF_0x55, BIT(14), 0);
+		odm_set_rf_reg(dm, e_rf_path, RF_0x55, tx_gain_bitmask, 2);
+		cali_info->kfree_offset[e_rf_path] = 2;
 		break;
 	case 10:
-		odm_set_rf_reg(p_dm, e_rf_path, REG_RF_TX_GAIN_OFFSET, BIT(14), 1);
-		odm_set_rf_reg(p_dm, e_rf_path, REG_RF_TX_GAIN_OFFSET, BIT(17) | BIT(16) | BIT(15), 2);
-		p_rf_calibrate_info->kfree_offset[e_rf_path] = 2;
+		odm_set_rf_reg(dm, e_rf_path, RF_0x55, BIT(14), 1);
+		odm_set_rf_reg(dm, e_rf_path, RF_0x55, tx_gain_bitmask, 2);
+		cali_info->kfree_offset[e_rf_path] = 2;
 		break;
 	case 12:
-		odm_set_rf_reg(p_dm, e_rf_path, REG_RF_TX_GAIN_OFFSET, BIT(14), 0);
-		odm_set_rf_reg(p_dm, e_rf_path, REG_RF_TX_GAIN_OFFSET, BIT(17) | BIT(16) | BIT(15), 3);
-		p_rf_calibrate_info->kfree_offset[e_rf_path] = 3;
+		odm_set_rf_reg(dm, e_rf_path, RF_0x55, BIT(14), 0);
+		odm_set_rf_reg(dm, e_rf_path, RF_0x55, tx_gain_bitmask, 3);
+		cali_info->kfree_offset[e_rf_path] = 3;
 		break;
 	case 14:
-		odm_set_rf_reg(p_dm, e_rf_path, REG_RF_TX_GAIN_OFFSET, BIT(14), 1);
-		odm_set_rf_reg(p_dm, e_rf_path, REG_RF_TX_GAIN_OFFSET, BIT(17) | BIT(16) | BIT(15), 3);
-		p_rf_calibrate_info->kfree_offset[e_rf_path] = 3;
+		odm_set_rf_reg(dm, e_rf_path, RF_0x55, BIT(14), 1);
+		odm_set_rf_reg(dm, e_rf_path, RF_0x55, tx_gain_bitmask, 3);
+		cali_info->kfree_offset[e_rf_path] = 3;
 		break;
 	case 16:
-		odm_set_rf_reg(p_dm, e_rf_path, REG_RF_TX_GAIN_OFFSET, BIT(14), 0);
-		odm_set_rf_reg(p_dm, e_rf_path, REG_RF_TX_GAIN_OFFSET, BIT(17) | BIT(16) | BIT(15), 4);
-		p_rf_calibrate_info->kfree_offset[e_rf_path] = 4;
+		odm_set_rf_reg(dm, e_rf_path, RF_0x55, BIT(14), 0);
+		odm_set_rf_reg(dm, e_rf_path, RF_0x55, tx_gain_bitmask, 4);
+		cali_info->kfree_offset[e_rf_path] = 4;
 		break;
 	case 18:
-		odm_set_rf_reg(p_dm, e_rf_path, REG_RF_TX_GAIN_OFFSET, BIT(14), 1);
-		odm_set_rf_reg(p_dm, e_rf_path, REG_RF_TX_GAIN_OFFSET, BIT(17) | BIT(16) | BIT(15), 4);
-		p_rf_calibrate_info->kfree_offset[e_rf_path] = 4;
+		odm_set_rf_reg(dm, e_rf_path, RF_0x55, BIT(14), 1);
+		odm_set_rf_reg(dm, e_rf_path, RF_0x55, tx_gain_bitmask, 4);
+		cali_info->kfree_offset[e_rf_path] = 4;
 		break;
 	case 20:
-		odm_set_rf_reg(p_dm, e_rf_path, REG_RF_TX_GAIN_OFFSET, BIT(14), 0);
-		odm_set_rf_reg(p_dm, e_rf_path, REG_RF_TX_GAIN_OFFSET, BIT(17) | BIT(16) | BIT(15), 5);
-		p_rf_calibrate_info->kfree_offset[e_rf_path] = 5;
+		odm_set_rf_reg(dm, e_rf_path, RF_0x55, BIT(14), 0);
+		odm_set_rf_reg(dm, e_rf_path, RF_0x55, tx_gain_bitmask, 5);
+		cali_info->kfree_offset[e_rf_path] = 5;
 		break;
 
 	default:
 		break;
 	}
 
-	if (is_odd == false) {
+	if (!is_odd) {
 		/*that means Kfree offset is negative, we need to record it.*/
-		p_rf_calibrate_info->kfree_offset[e_rf_path] = (-1) * p_rf_calibrate_info->kfree_offset[e_rf_path];
-		ODM_RT_TRACE(p_dm, ODM_COMP_MP, ODM_DBG_LOUD, ("phy_ConfigKFree8814A(): kfree_offset = %d\n", p_rf_calibrate_info->kfree_offset[e_rf_path]));
-	} else
-		ODM_RT_TRACE(p_dm, ODM_COMP_MP, ODM_DBG_LOUD, ("phy_ConfigKFree8814A(): kfree_offset = %d\n", p_rf_calibrate_info->kfree_offset[e_rf_path]));
-
+		cali_info->kfree_offset[e_rf_path] =
+				(-1) * cali_info->kfree_offset[e_rf_path];
+		RF_DBG(dm, DBG_RF_MP,
+		       "phy_ConfigKFree8814A(): kfree_offset = %d\n",
+		       cali_info->kfree_offset[e_rf_path]);
+	} else {
+		RF_DBG(dm, DBG_RF_MP,
+		       "phy_ConfigKFree8814A(): kfree_offset = %d\n",
+		       cali_info->kfree_offset[e_rf_path]);
+	}
 }
 
-
-
-//
-//
-//
-void
-phydm_get_thermal_trim_offset_8821c(
-	void	*p_dm_void
-)
+void phydm_get_thermal_trim_offset_8821c(void *dm_void)
 {
-	struct PHY_DM_STRUCT		*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	struct odm_power_trim_data	*p_power_trim_info = &(p_dm->power_trim_data);
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct odm_power_trim_data *power_trim_info = &dm->power_trim_data;
 
 	u8 pg_therm = 0xff;
 
-	odm_efuse_one_byte_read(p_dm, PPG_THERMAL_OFFSET_8821C, &pg_therm, false);
+	odm_efuse_one_byte_read(dm, PPG_THERMAL_OFFSET_21C, &pg_therm, false);
 
 	if (pg_therm != 0xff) {
 		pg_therm = pg_therm & 0x1f;
 		if ((pg_therm & BIT(0)) == 0)
-			p_power_trim_info->thermal = (-1 * (pg_therm >> 1));
+			power_trim_info->thermal = (-1 * (pg_therm >> 1));
 		else
-			p_power_trim_info->thermal = (pg_therm >> 1);
+			power_trim_info->thermal = (pg_therm >> 1);
 
-		p_power_trim_info->flag |= KFREE_FLAG_THERMAL_K_ON;
+		power_trim_info->flag |= KFREE_FLAG_THERMAL_K_ON;
 	}
 
-	ODM_RT_TRACE(p_dm, ODM_COMP_MP, ODM_DBG_LOUD, ("[kfree] 8821c thermal trim flag:0x%02x\n", p_power_trim_info->flag));
+	RF_DBG(dm, DBG_RF_MP, "[kfree] 8821c thermal trim flag:0x%02x\n",
+	       power_trim_info->flag);
 
-	if (p_power_trim_info->flag & KFREE_FLAG_THERMAL_K_ON)
-		ODM_RT_TRACE(p_dm, ODM_COMP_MP, ODM_DBG_LOUD, ("[kfree] 8821c thermal:%d\n", p_power_trim_info->thermal));
+	if (power_trim_info->flag & KFREE_FLAG_THERMAL_K_ON)
+		RF_DBG(dm, DBG_RF_MP, "[kfree] 8821c thermal:%d\n",
+		       power_trim_info->thermal);
 }
 
-
-
-void
-phydm_get_power_trim_offset_8821c(
-	void	*p_dm_void
-)
+void phydm_get_power_trim_offset_8821c(void *dm_void)
 {
-	struct PHY_DM_STRUCT		*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	struct odm_power_trim_data	*p_power_trim_info = &(p_dm->power_trim_data);
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct odm_power_trim_data *power_trim_info = &dm->power_trim_data;
 
 	u8 pg_power = 0xff, i;
 
-	odm_efuse_one_byte_read(p_dm, PPG_BB_GAIN_2G_TXAB_OFFSET_8821C, &pg_power, false);
+	odm_efuse_one_byte_read(dm, PPG_2G_TXAB_21C, &pg_power, false);
 
 	if (pg_power != 0xff) {
-		p_power_trim_info->bb_gain[0][0] = pg_power;
-		odm_efuse_one_byte_read(p_dm, PPG_BB_GAIN_5GL1_TXA_OFFSET_8821C, &pg_power, false);
-		p_power_trim_info->bb_gain[1][0] = pg_power;
-		odm_efuse_one_byte_read(p_dm, PPG_BB_GAIN_5GL2_TXA_OFFSET_8821C, &pg_power, false);
-		p_power_trim_info->bb_gain[2][0] = pg_power;
-		odm_efuse_one_byte_read(p_dm, PPG_BB_GAIN_5GM1_TXA_OFFSET_8821C, &pg_power, false);
-		p_power_trim_info->bb_gain[3][0] = pg_power;
-		odm_efuse_one_byte_read(p_dm, PPG_BB_GAIN_5GM2_TXA_OFFSET_8821C, &pg_power, false);
-		p_power_trim_info->bb_gain[4][0] = pg_power;
-		odm_efuse_one_byte_read(p_dm, PPG_BB_GAIN_5GH1_TXA_OFFSET_8821C, &pg_power, false);
-		p_power_trim_info->bb_gain[5][0] = pg_power;
-		p_power_trim_info->flag = p_power_trim_info->flag | KFREE_FLAG_ON | KFREE_FLAG_ON_2G | KFREE_FLAG_ON_5G;
+		power_trim_info->bb_gain[0][0] = pg_power;
+		odm_efuse_one_byte_read(dm, PPG_5GL1_TXA_21C, &pg_power, false);
+		power_trim_info->bb_gain[1][0] = pg_power;
+		odm_efuse_one_byte_read(dm, PPG_5GL2_TXA_21C, &pg_power, false);
+		power_trim_info->bb_gain[2][0] = pg_power;
+		odm_efuse_one_byte_read(dm, PPG_5GM1_TXA_21C, &pg_power, false);
+		power_trim_info->bb_gain[3][0] = pg_power;
+		odm_efuse_one_byte_read(dm, PPG_5GM2_TXA_21C, &pg_power, false);
+		power_trim_info->bb_gain[4][0] = pg_power;
+		odm_efuse_one_byte_read(dm, PPG_5GH1_TXA_21C, &pg_power, false);
+		power_trim_info->bb_gain[5][0] = pg_power;
+		power_trim_info->flag =
+			power_trim_info->flag | KFREE_FLAG_ON |
+			KFREE_FLAG_ON_2G | KFREE_FLAG_ON_5G;
 	}
 
-	ODM_RT_TRACE(p_dm, ODM_COMP_MP, ODM_DBG_LOUD, ("[kfree] 8821c power trim flag:0x%02x\n", p_power_trim_info->flag));
+	RF_DBG(dm, DBG_RF_MP, "[kfree] 8821c power trim flag:0x%02x\n",
+	       power_trim_info->flag);
 
-	if (p_power_trim_info->flag & KFREE_FLAG_ON) {
+	if (power_trim_info->flag & KFREE_FLAG_ON) {
 		for (i = 0; i < KFREE_BAND_NUM; i++)
-			ODM_RT_TRACE(p_dm, ODM_COMP_MP, ODM_DBG_LOUD, ("[kfree] 8821c power_trim_data->bb_gain[%d][0]=0x%X\n", i, p_power_trim_info->bb_gain[i][0]));
+			RF_DBG(dm, DBG_RF_MP,
+			       "[kfree] 8821c pwr_trim->bb_gain[%d][0]=0x%X\n",
+			       i, power_trim_info->bb_gain[i][0]);
 	}
 }
 
-
-
-void
-phydm_set_kfree_to_rf_8821c(
-	void		*p_dm_void,
-	u8		e_rf_path,
-	boolean		wlg_btg,
-	u8		data
-)
+void phydm_set_kfree_to_rf_8821c(void *dm_void, u8 e_rf_path, boolean wlg_btg,
+				 u8 data)
 {
-	struct PHY_DM_STRUCT		*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	struct odm_rf_calibration_structure	*p_rf_calibrate_info = &(p_dm->rf_calibrate_info);
-	u8	wlg, btg;
-
-	odm_set_rf_reg(p_dm, e_rf_path, 0xde, BIT(0), 1);
-	odm_set_rf_reg(p_dm, e_rf_path, 0xde, BIT(5), 1);
-	odm_set_rf_reg(p_dm, e_rf_path, 0x55, BIT(6), 1);
-	odm_set_rf_reg(p_dm, e_rf_path, 0x65, BIT(6), 1);
-
-	if (wlg_btg == true) {
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	u8 wlg, btg;
+	u32 gain_bmask = (BIT(18) | BIT(17) | BIT(16) | BIT(15) | BIT(14));
+	u32 s_gain_bmask = (BIT(19) | BIT(18) | BIT(17) |
+			    BIT(16) | BIT(15) | BIT(14));
+
+	odm_set_rf_reg(dm, e_rf_path, RF_0xde, BIT(0), 1);
+	odm_set_rf_reg(dm, e_rf_path, RF_0xde, BIT(5), 1);
+	odm_set_rf_reg(dm, e_rf_path, RF_0x55, BIT(6), 1);
+	odm_set_rf_reg(dm, e_rf_path, RF_0x65, BIT(6), 1);
+
+	if (wlg_btg) {
 		wlg = data & 0xf;
 		btg = (data & 0xf0) >> 4;
 
-		odm_set_rf_reg(p_dm, e_rf_path, 0x55, BIT(19), (wlg & BIT(0)));
-		odm_set_rf_reg(p_dm, e_rf_path, 0x55, (BIT(18) | BIT(17) | BIT(16) | BIT(15) | BIT(14)), (wlg >> 1));
+		odm_set_rf_reg(dm, e_rf_path, RF_0x55, BIT(19), (wlg & BIT(0)));
+		odm_set_rf_reg(dm, e_rf_path, RF_0x55, gain_bmask, (wlg >> 1));
 
-		odm_set_rf_reg(p_dm, e_rf_path, 0x65, BIT(19), (btg & BIT(0)));
-		odm_set_rf_reg(p_dm, e_rf_path, 0x65, (BIT(18) | BIT(17) | BIT(16) | BIT(15) | BIT(14)), (btg >> 1));
+		odm_set_rf_reg(dm, e_rf_path, RF_0x65, BIT(19), (btg & BIT(0)));
+		odm_set_rf_reg(dm, e_rf_path, RF_0x65, gain_bmask, (btg >> 1));
 	} else {
-		odm_set_rf_reg(p_dm, e_rf_path, 0x55, BIT(19), (data & BIT(0)));
-		odm_set_rf_reg(p_dm, e_rf_path, 0x55, (BIT(18) | BIT(17) | BIT(16) | BIT(15) | BIT(14)), ((data & 0x1f) >> 1));
+		odm_set_rf_reg(dm, e_rf_path, RF_0x55, BIT(19), data & BIT(0));
+		odm_set_rf_reg(dm, e_rf_path, RF_0x55, gain_bmask,
+			       ((data & 0x1f) >> 1));
 	}
 
-	ODM_RT_TRACE(p_dm, ODM_COMP_CALIBRATION, ODM_DBG_TRACE,
-		("[kfree] 8821c 0x55[19:14]=0x%X 0x65[19:14]=0x%X\n",
-		odm_get_rf_reg(p_dm, e_rf_path, 0x55, (BIT(19) | BIT(18) | BIT(17) | BIT(16) | BIT(15) | BIT(14))),
-		odm_get_rf_reg(p_dm, e_rf_path, 0x65, (BIT(19) | BIT(18) | BIT(17) | BIT(16) | BIT(15) | BIT(14)))
-		));
+	RF_DBG(dm, DBG_RF_MP,
+	       "[kfree] 8821c 0x55[19:14]=0x%X 0x65[19:14]=0x%X\n",
+	       odm_get_rf_reg(dm, e_rf_path, RF_0x55, s_gain_bmask),
+	       odm_get_rf_reg(dm, e_rf_path, RF_0x65, s_gain_bmask));
 }
 
-
-
-void
-phydm_clear_kfree_to_rf_8821c(
-	void		*p_dm_void,
-	u8		e_rf_path,
-	u8		data
-)
+void phydm_clear_kfree_to_rf_8821c(void *dm_void, u8 e_rf_path, u8 data)
 {
-	struct PHY_DM_STRUCT		*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	struct odm_rf_calibration_structure	*p_rf_calibrate_info = &(p_dm->rf_calibrate_info);
-
-	odm_set_rf_reg(p_dm, e_rf_path, 0xde, BIT(0), 1);
-	odm_set_rf_reg(p_dm, e_rf_path, 0xde, BIT(5), 1);
-	odm_set_rf_reg(p_dm, e_rf_path, 0x55, BIT(6), 1);
-	odm_set_rf_reg(p_dm, e_rf_path, 0x65, BIT(6), 1);
-
-	odm_set_rf_reg(p_dm, e_rf_path, 0x55, BIT(19), (data & BIT(0)));
-	odm_set_rf_reg(p_dm, e_rf_path, 0x55, (BIT(18) | BIT(17) | BIT(16) | BIT(15) | BIT(14)), (data >> 1));
-
-	odm_set_rf_reg(p_dm, e_rf_path, 0x65, BIT(19), (data & BIT(0)));
-	odm_set_rf_reg(p_dm, e_rf_path, 0x65, (BIT(18) | BIT(17) | BIT(16) | BIT(15) | BIT(14)), (data >> 1));
-
-	odm_set_rf_reg(p_dm, e_rf_path, 0xde, BIT(0), 0);
-	odm_set_rf_reg(p_dm, e_rf_path, 0xde, BIT(5), 0);
-	odm_set_rf_reg(p_dm, e_rf_path, 0x55, BIT(6), 0);
-	odm_set_rf_reg(p_dm, e_rf_path, 0x65, BIT(6), 0);
-
-
-	ODM_RT_TRACE(p_dm, ODM_COMP_CALIBRATION, ODM_DBG_TRACE,
-		("[kfree] 8821c 0x55[19:14]=0x%X 0x65[19:14]=0x%X\n",
-		odm_get_rf_reg(p_dm, e_rf_path, 0x55, (BIT(19) | BIT(18) | BIT(17) | BIT(16) | BIT(15) | BIT(14))),
-		odm_get_rf_reg(p_dm, e_rf_path, 0x65, (BIT(19) | BIT(18) | BIT(17) | BIT(16) | BIT(15) | BIT(14)))
-		));
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	u32 gain_bmask = (BIT(18) | BIT(17) | BIT(16) | BIT(15) | BIT(14));
+	u32 s_gain_bmask = (BIT(19) | BIT(18) | BIT(17) |
+			    BIT(16) | BIT(15) | BIT(14));
+
+	odm_set_rf_reg(dm, e_rf_path, RF_0xde, BIT(0), 1);
+	odm_set_rf_reg(dm, e_rf_path, RF_0xde, BIT(5), 1);
+	odm_set_rf_reg(dm, e_rf_path, RF_0x55, BIT(6), 1);
+	odm_set_rf_reg(dm, e_rf_path, RF_0x65, BIT(6), 1);
+
+	odm_set_rf_reg(dm, e_rf_path, RF_0x55, BIT(19), (data & BIT(0)));
+	odm_set_rf_reg(dm, e_rf_path, RF_0x55, gain_bmask, (data >> 1));
+
+	odm_set_rf_reg(dm, e_rf_path, RF_0x65, BIT(19), (data & BIT(0)));
+	odm_set_rf_reg(dm, e_rf_path, RF_0x65, gain_bmask, (data >> 1));
+
+	odm_set_rf_reg(dm, e_rf_path, RF_0xde, BIT(0), 0);
+	odm_set_rf_reg(dm, e_rf_path, RF_0xde, BIT(5), 0);
+	odm_set_rf_reg(dm, e_rf_path, RF_0x55, BIT(6), 0);
+	odm_set_rf_reg(dm, e_rf_path, RF_0x65, BIT(6), 0);
+
+	RF_DBG(dm, DBG_RF_MP,
+	       "[kfree] 8821c 0x55[19:14]=0x%X 0x65[19:14]=0x%X\n",
+	       odm_get_rf_reg(dm, e_rf_path, RF_0x55, s_gain_bmask),
+	       odm_get_rf_reg(dm, e_rf_path, RF_0x65, s_gain_bmask));
 }
 
-void
-phydm_get_thermal_trim_offset_8822b(
-	void	*p_dm_void
-)
+void phydm_get_thermal_trim_offset_8822b(void *dm_void)
 {
-	struct PHY_DM_STRUCT		*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	struct odm_power_trim_data	*p_power_trim_info = &(p_dm->power_trim_data);
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct odm_power_trim_data *power_trim_info = &dm->power_trim_data;
 
 	u8 pg_therm = 0xff;
 
-#if 0
-	u32	thermal_trim_enable = 0xff;
-
-	odm_efuse_logical_map_read(p_dm, 1, 0xc8, &thermal_trim_enable);
+	odm_efuse_one_byte_read(dm, PPG_THERMAL_OFFSET_22B, &pg_therm, false);
 
-	ODM_RT_TRACE(p_dm, ODM_COMP_MP, ODM_DBG_LOUD, ("[kfree] 8822b 0xc8:0x%2x\n", thermal_trim_enable));
-
-	thermal_trim_enable = (thermal_trim_enable & BIT(5)) >> 5;
-
-	ODM_RT_TRACE(p_dm, ODM_COMP_MP, ODM_DBG_LOUD, ("[kfree] 8822b thermal trim Enable:%d\n", thermal_trim_enable));
-
-	if ((p_rf_calibrate_info->reg_rf_kfree_enable == 0 && thermal_trim_enable == 1) ||
-		p_rf_calibrate_info->reg_rf_kfree_enable == 1) {
-#endif
-
-		odm_efuse_one_byte_read(p_dm, PPG_THERMAL_OFFSET, &pg_therm, false);
-
-		if (pg_therm != 0xff) {
-			pg_therm = pg_therm & 0x1f;
-			if ((pg_therm & BIT(0)) == 0)
-				p_power_trim_info->thermal = (-1 * (pg_therm >> 1));
-			else
-				p_power_trim_info->thermal = (pg_therm >> 1);
+	if (pg_therm != 0xff) {
+		pg_therm = pg_therm & 0x1f;
+		if ((pg_therm & BIT(0)) == 0)
+			power_trim_info->thermal = (-1 * (pg_therm >> 1));
+		else
+			power_trim_info->thermal = (pg_therm >> 1);
 
-			p_power_trim_info->flag |= KFREE_FLAG_THERMAL_K_ON;
-		}
+		power_trim_info->flag |= KFREE_FLAG_THERMAL_K_ON;
+	}
 
-		ODM_RT_TRACE(p_dm, ODM_COMP_MP, ODM_DBG_LOUD, ("[kfree] 8822b thermal trim flag:0x%02x\n", p_power_trim_info->flag));
-
-		if (p_power_trim_info->flag & KFREE_FLAG_THERMAL_K_ON)
-			ODM_RT_TRACE(p_dm, ODM_COMP_MP, ODM_DBG_LOUD, ("[kfree] 8822b thermal:%d\n", p_power_trim_info->thermal));
-#if 0
-	} else
-		return;
-#endif
+	RF_DBG(dm, DBG_RF_MP, "[kfree] 8822b thermal trim flag:0x%02x\n",
+	       power_trim_info->flag);
 
+	if (power_trim_info->flag & KFREE_FLAG_THERMAL_K_ON)
+		RF_DBG(dm, DBG_RF_MP, "[kfree] 8822b thermal:%d\n",
+		       power_trim_info->thermal);
 }
 
-
-
-void
-phydm_get_power_trim_offset_8822b(
-	void	*p_dm_void
-)
+void phydm_get_power_trim_offset_8822b(void *dm_void)
 {
-	struct PHY_DM_STRUCT		*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	struct odm_power_trim_data	*p_power_trim_info = &(p_dm->power_trim_data);
-	struct odm_rf_calibration_structure	*p_rf_calibrate_info = &(p_dm->rf_calibrate_info);
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct odm_power_trim_data *power_trim_info = &dm->power_trim_data;
 
 	u8 pg_power = 0xff, i, j;
 
-#if 0
-	u32	power_trim_enable = 0xff;
-
-	odm_efuse_logical_map_read(p_dm, 1, 0xc8, &power_trim_enable);
-
-	ODM_RT_TRACE(p_dm, ODM_COMP_MP, ODM_DBG_LOUD, ("[kfree] 8822b 0xc8:0x%2x\n", power_trim_enable));
-
-	power_trim_enable = (power_trim_enable & BIT(4)) >> 4;
-
-	ODM_RT_TRACE(p_dm, ODM_COMP_MP, ODM_DBG_LOUD, ("[kfree] 8822b power trim Enable:%d\n", power_trim_enable));
-
-	if ((p_rf_calibrate_info->reg_rf_kfree_enable == 0 && power_trim_enable == 1) ||
-		p_rf_calibrate_info->reg_rf_kfree_enable == 1) {
-#endif
+	odm_efuse_one_byte_read(dm, PPG_2G_TXAB_22B, &pg_power, false);
 
-		odm_efuse_one_byte_read(p_dm, PPG_BB_GAIN_2G_TXAB_OFFSET, &pg_power, false);
+	if (pg_power != 0xff) {
+		/*Path A*/
+		odm_efuse_one_byte_read(dm, PPG_2G_TXAB_22B, &pg_power, false);
+		power_trim_info->bb_gain[0][0] = (pg_power & 0xf);
 
-		if (pg_power != 0xff) {
-			/*Path A*/
-			odm_efuse_one_byte_read(p_dm, PPG_BB_GAIN_2G_TXAB_OFFSET, &pg_power, false);
-			p_power_trim_info->bb_gain[0][0] = (pg_power & 0xf);
+		/*Path B*/
+		odm_efuse_one_byte_read(dm, PPG_2G_TXAB_22B, &pg_power, false);
+		power_trim_info->bb_gain[0][1] = ((pg_power & 0xf0) >> 4);
 
-			/*Path B*/
-			odm_efuse_one_byte_read(p_dm, PPG_BB_GAIN_2G_TXAB_OFFSET, &pg_power, false);
-			p_power_trim_info->bb_gain[0][1] = ((pg_power & 0xf0) >> 4);
+		power_trim_info->flag |= KFREE_FLAG_ON_2G;
+		power_trim_info->flag |= KFREE_FLAG_ON;
+	}
 
-			p_power_trim_info->flag |= KFREE_FLAG_ON_2G;
-			p_power_trim_info->flag |= KFREE_FLAG_ON;
-		}
+	odm_efuse_one_byte_read(dm, PPG_5GL1_TXA_22B, &pg_power, false);
 
-		odm_efuse_one_byte_read(p_dm, PPG_BB_GAIN_5GL1_TXA_OFFSET, &pg_power, false);
-		
-		if (pg_power != 0xff) {
-			/*Path A*/
-			odm_efuse_one_byte_read(p_dm, PPG_BB_GAIN_5GL1_TXA_OFFSET, &pg_power, false);
-			p_power_trim_info->bb_gain[1][0] = pg_power;
-			odm_efuse_one_byte_read(p_dm, PPG_BB_GAIN_5GL2_TXA_OFFSET, &pg_power, false);
-			p_power_trim_info->bb_gain[2][0] = pg_power;
-			odm_efuse_one_byte_read(p_dm, PPG_BB_GAIN_5GM1_TXA_OFFSET, &pg_power, false);
-			p_power_trim_info->bb_gain[3][0] = pg_power;
-			odm_efuse_one_byte_read(p_dm, PPG_BB_GAIN_5GM2_TXA_OFFSET, &pg_power, false);
-			p_power_trim_info->bb_gain[4][0] = pg_power;
-			odm_efuse_one_byte_read(p_dm, PPG_BB_GAIN_5GH1_TXA_OFFSET, &pg_power, false);
-			p_power_trim_info->bb_gain[5][0] = pg_power;
-
-			/*Path B*/
-			odm_efuse_one_byte_read(p_dm, PPG_BB_GAIN_5GL1_TXB_OFFSET, &pg_power, false);
-			p_power_trim_info->bb_gain[1][1] = pg_power;
-			odm_efuse_one_byte_read(p_dm, PPG_BB_GAIN_5GL2_TXB_OFFSET, &pg_power, false);
-			p_power_trim_info->bb_gain[2][1] = pg_power;
-			odm_efuse_one_byte_read(p_dm, PPG_BB_GAIN_5GM1_TXB_OFFSET, &pg_power, false);
-			p_power_trim_info->bb_gain[3][1] = pg_power;
-			odm_efuse_one_byte_read(p_dm, PPG_BB_GAIN_5GM2_TXB_OFFSET, &pg_power, false);
-			p_power_trim_info->bb_gain[4][1] = pg_power;
-			odm_efuse_one_byte_read(p_dm, PPG_BB_GAIN_5GH1_TXB_OFFSET, &pg_power, false);
-			p_power_trim_info->bb_gain[5][1] = pg_power;
-			
-			p_power_trim_info->flag |= KFREE_FLAG_ON_5G;
-			p_power_trim_info->flag |= KFREE_FLAG_ON;
-		}
+	if (pg_power != 0xff) {
+		/*Path A*/
+		odm_efuse_one_byte_read(dm, PPG_5GL1_TXA_22B, &pg_power, false);
+		power_trim_info->bb_gain[1][0] = pg_power;
+		odm_efuse_one_byte_read(dm, PPG_5GL2_TXA_22B, &pg_power, false);
+		power_trim_info->bb_gain[2][0] = pg_power;
+		odm_efuse_one_byte_read(dm, PPG_5GM1_TXA_22B, &pg_power, false);
+		power_trim_info->bb_gain[3][0] = pg_power;
+		odm_efuse_one_byte_read(dm, PPG_5GM2_TXA_22B, &pg_power, false);
+		power_trim_info->bb_gain[4][0] = pg_power;
+		odm_efuse_one_byte_read(dm, PPG_5GH1_TXA_22B, &pg_power, false);
+		power_trim_info->bb_gain[5][0] = pg_power;
+
+		/*Path B*/
+		odm_efuse_one_byte_read(dm, PPG_5GL1_TXB_22B, &pg_power, false);
+		power_trim_info->bb_gain[1][1] = pg_power;
+		odm_efuse_one_byte_read(dm, PPG_5GL2_TXB_22B, &pg_power, false);
+		power_trim_info->bb_gain[2][1] = pg_power;
+		odm_efuse_one_byte_read(dm, PPG_5GM1_TXB_22B, &pg_power, false);
+		power_trim_info->bb_gain[3][1] = pg_power;
+		odm_efuse_one_byte_read(dm, PPG_5GM2_TXB_22B, &pg_power, false);
+		power_trim_info->bb_gain[4][1] = pg_power;
+		odm_efuse_one_byte_read(dm, PPG_5GH1_TXB_22B, &pg_power, false);
+		power_trim_info->bb_gain[5][1] = pg_power;
+
+		power_trim_info->flag |= KFREE_FLAG_ON_5G;
+		power_trim_info->flag |= KFREE_FLAG_ON;
+	}
 
-		ODM_RT_TRACE(p_dm, ODM_COMP_MP, ODM_DBG_LOUD, ("[kfree] 8822b power trim flag:0x%02x\n", p_power_trim_info->flag));
+	RF_DBG(dm, DBG_RF_MP, "[kfree] 8822b power trim flag:0x%02x\n",
+	       power_trim_info->flag);
 
-		if (p_power_trim_info->flag & KFREE_FLAG_ON) {
-			for (i = 0; i < KFREE_BAND_NUM; i++) {
-				for (j = 0; j < 2; j++)
-					ODM_RT_TRACE(p_dm, ODM_COMP_MP, ODM_DBG_LOUD, ("[kfree] 8822b power_trim_data->bb_gain[%d][%d]=0x%X\n", i, j, p_power_trim_info->bb_gain[i][j]));
-			}
-		}
-#if 0
-	} else
+	if (!(power_trim_info->flag & KFREE_FLAG_ON))
 		return;
-#endif
-}
-
 
+	for (i = 0; i < KFREE_BAND_NUM; i++) {
+		for (j = 0; j < 2; j++)
+			RF_DBG(dm, DBG_RF_MP,
+			       "[kfree] 8822b PwrTrim->bb_gain[%d][%d]=0x%X\n",
+			       i, j, power_trim_info->bb_gain[i][j]);
+	}
+}
 
-void
-phydm_set_pa_bias_to_rf_8822b(
-	void		*p_dm_void,
-	u8		e_rf_path,
-	s8		tx_pa_bias
-)
+void phydm_set_pa_bias_to_rf_8822b(void *dm_void, u8 e_rf_path, s8 tx_pa_bias)
 {
-	struct PHY_DM_STRUCT		*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	struct odm_rf_calibration_structure	*p_rf_calibrate_info = &(p_dm->rf_calibrate_info);
-	u32	rf_reg_51 = 0, rf_reg_52 = 0, rf_reg_3f = 0;
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	u32 rf_reg_51 = 0, rf_reg_52 = 0, rf_reg_3f = 0;
+	u32 tx_pa_bias_bmask = (BIT(12) | BIT(11) | BIT(10) | BIT(9));
 
-	rf_reg_51 = odm_get_rf_reg(p_dm, e_rf_path, 0x51, RFREGOFFSETMASK);
-	rf_reg_52 = odm_get_rf_reg(p_dm, e_rf_path, 0x52, RFREGOFFSETMASK);
+	rf_reg_51 = odm_get_rf_reg(dm, e_rf_path, RF_0x51, RFREGOFFSETMASK);
+	rf_reg_52 = odm_get_rf_reg(dm, e_rf_path, RF_0x52, RFREGOFFSETMASK);
 
-	ODM_RT_TRACE(p_dm, ODM_COMP_MP, ODM_DBG_LOUD, ("[kfree] 8822b 2g rf(0x51)=0x%X rf(0x52)=0x%X path=%d\n",
- 		rf_reg_51, rf_reg_52, e_rf_path));
+	RF_DBG(dm, DBG_RF_MP,
+	       "[kfree] 8822b 2g rf(0x51)=0x%X rf(0x52)=0x%X path=%d\n",
+	       rf_reg_51, rf_reg_52, e_rf_path);
 
+#if 0
 	/*rf3f => rf52[19:17] = rf3f[2:0] rf52[16:15] = rf3f[4:3] rf52[3:0] = rf3f[8:5]*/
 	/*rf3f => rf51[6:3] = rf3f[12:9] rf52[13] = rf3f[13]*/
+#endif
 	rf_reg_3f = ((rf_reg_52 & 0xe0000) >> 17) |
-					(((rf_reg_52 & 0x18000) >> 15) << 3) |
-					((rf_reg_52 & 0xf) << 5) |
-					(((rf_reg_51 & 0x78) >> 3) << 9) |
-					(((rf_reg_52 & 0x2000) >> 13) << 13);
+		    (((rf_reg_52 & 0x18000) >> 15) << 3) |
+		    ((rf_reg_52 & 0xf) << 5) |
+		    (((rf_reg_51 & 0x78) >> 3) << 9) |
+		    (((rf_reg_52 & 0x2000) >> 13) << 13);
 
-	ODM_RT_TRACE(p_dm, ODM_COMP_MP, ODM_DBG_LOUD,
-			("[kfree] 8822b 2g original tx_pa_bias=%d rf_reg_3f=0x%X path=%d\n",
-			tx_pa_bias, rf_reg_3f, e_rf_path));
+	RF_DBG(dm, DBG_RF_MP,
+	       "[kfree] 8822b 2g original pa_bias=%d rf_reg_3f=0x%X path=%d\n",
+	       tx_pa_bias, rf_reg_3f, e_rf_path);
 
-	tx_pa_bias = (s8)((rf_reg_3f & (BIT(12) | BIT(11) | BIT(10) | BIT(9))) >> 9) + tx_pa_bias;
+	tx_pa_bias = (s8)((rf_reg_3f & tx_pa_bias_bmask) >> 9) + tx_pa_bias;
 
 	if (tx_pa_bias < 0)
 		tx_pa_bias = 0;
@@ -435,444 +382,810 @@ phydm_set_pa_bias_to_rf_8822b(
 
 	rf_reg_3f = ((rf_reg_3f & 0xfe1ff) | (tx_pa_bias << 9));
 
-	ODM_RT_TRACE(p_dm, ODM_COMP_MP, ODM_DBG_LOUD,
-			("[kfree] 8822b 2g offset efuse 0x3d5 0x3d6 tx_pa_bias=%d rf_reg_3f=0x%X path=%d\n",
-			tx_pa_bias, rf_reg_3f, e_rf_path));
-
-	odm_set_rf_reg(p_dm, e_rf_path, 0xef, BIT(10), 0x1);
-	odm_set_rf_reg(p_dm, e_rf_path, 0x33, RFREGOFFSETMASK, 0x0);
-	odm_set_rf_reg(p_dm, e_rf_path, 0x3f, RFREGOFFSETMASK, rf_reg_3f);
-	odm_set_rf_reg(p_dm, e_rf_path, 0x33, BIT(0), 0x1);
-	odm_set_rf_reg(p_dm, e_rf_path, 0x3f, RFREGOFFSETMASK, rf_reg_3f);
-	odm_set_rf_reg(p_dm, e_rf_path, 0x33, BIT(1), 0x1);
-	odm_set_rf_reg(p_dm, e_rf_path, 0x3f, RFREGOFFSETMASK, rf_reg_3f);
-	odm_set_rf_reg(p_dm, e_rf_path, 0x33, (BIT(1) | BIT(0)), 0x3);
-	odm_set_rf_reg(p_dm, e_rf_path, 0x3f, RFREGOFFSETMASK, rf_reg_3f);
-	odm_set_rf_reg(p_dm, e_rf_path, 0xef, BIT(10), 0x0);
-
-	ODM_RT_TRACE(p_dm, ODM_COMP_MP, ODM_DBG_LOUD,
-		("[kfree] 8822b 2g tx pa bias rf_0x3f(0x%X) path=%d\n",
-		odm_get_rf_reg(p_dm, e_rf_path, 0x3f, (BIT(12) | BIT(11) | BIT(10) | BIT(9))), e_rf_path));
+	RF_DBG(dm, DBG_RF_MP,
+	       "[kfree] 8822b 2g 0x%X 0x%X pa_bias=%d rfreg_3f=0x%X path=%d\n",
+	       PPG_PABIAS_2GA_22B, PPG_PABIAS_2GB_22B,
+	       tx_pa_bias, rf_reg_3f, e_rf_path);
+
+	odm_set_rf_reg(dm, e_rf_path, RF_0xef, BIT(10), 0x1);
+	odm_set_rf_reg(dm, e_rf_path, RF_0x33, RFREGOFFSETMASK, 0x0);
+	odm_set_rf_reg(dm, e_rf_path, RF_0x3f, RFREGOFFSETMASK, rf_reg_3f);
+	odm_set_rf_reg(dm, e_rf_path, RF_0x33, BIT(0), 0x1);
+	odm_set_rf_reg(dm, e_rf_path, RF_0x3f, RFREGOFFSETMASK, rf_reg_3f);
+	odm_set_rf_reg(dm, e_rf_path, RF_0x33, BIT(1), 0x1);
+	odm_set_rf_reg(dm, e_rf_path, RF_0x3f, RFREGOFFSETMASK, rf_reg_3f);
+	odm_set_rf_reg(dm, e_rf_path, RF_0x33, (BIT(1) | BIT(0)), 0x3);
+	odm_set_rf_reg(dm, e_rf_path, RF_0x3f, RFREGOFFSETMASK, rf_reg_3f);
+	odm_set_rf_reg(dm, e_rf_path, RF_0xef, BIT(10), 0x0);
+
+	RF_DBG(dm, DBG_RF_MP,
+	       "[kfree] 8822b 2g tx pa bias rf_0x3f(0x%X) path=%d\n",
+	       odm_get_rf_reg(dm, e_rf_path, RF_0x3f,
+			      (BIT(12) | BIT(11) | BIT(10) | BIT(9))),
+			      e_rf_path);
 }
 
-
-
-void
-phydm_get_pa_bias_offset_8822b(
-	void	*p_dm_void
-)
+void phydm_get_pa_bias_offset_8822b(void *dm_void)
 {
-	struct PHY_DM_STRUCT		*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	struct odm_power_trim_data	*p_power_trim_info = &(p_dm->power_trim_data);
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct odm_power_trim_data *power_trim_info = &dm->power_trim_data;
 
 	u8 pg_pa_bias = 0xff, e_rf_path = 0;
 	s8 tx_pa_bias[2] = {0};
 
-	odm_efuse_one_byte_read(p_dm, PPG_PA_BIAS_2G_TXA_OFFSET, &pg_pa_bias, false);
+	odm_efuse_one_byte_read(dm, PPG_PABIAS_2GA_22B, &pg_pa_bias, false);
 
 	if (pg_pa_bias != 0xff) {
 		/*paht a*/
-		odm_efuse_one_byte_read(p_dm, PPG_PA_BIAS_2G_TXA_OFFSET, &pg_pa_bias, false);
+		odm_efuse_one_byte_read(dm, PPG_PABIAS_2GA_22B,
+					&pg_pa_bias, false);
 		pg_pa_bias = pg_pa_bias & 0xf;
-		
+
 		if ((pg_pa_bias & BIT(0)) == 0)
 			tx_pa_bias[0] = (-1 * (pg_pa_bias >> 1));
 		else
 			tx_pa_bias[0] = (pg_pa_bias >> 1);
 
 		/*paht b*/
-		odm_efuse_one_byte_read(p_dm, PPG_PA_BIAS_2G_TXB_OFFSET, &pg_pa_bias, false);
+		odm_efuse_one_byte_read(dm, PPG_PABIAS_2GB_22B,
+					&pg_pa_bias, false);
 		pg_pa_bias = pg_pa_bias & 0xf;
-		
+
 		if ((pg_pa_bias & BIT(0)) == 0)
 			tx_pa_bias[1] = (-1 * (pg_pa_bias >> 1));
 		else
 			tx_pa_bias[1] = (pg_pa_bias >> 1);
 
-		ODM_RT_TRACE(p_dm, ODM_COMP_MP, ODM_DBG_LOUD, ("[kfree] 8822b 2g tx_patha_pa_bias:%d   tx_pathb_pa_bias:%d\n", tx_pa_bias[0], tx_pa_bias[1]));
+		RF_DBG(dm, DBG_RF_MP,
+		       "[kfree] 8822b 2g PathA_pa_bias:%d PathB_pa_bias:%d\n",
+		       tx_pa_bias[0], tx_pa_bias[1]);
+
+		for (e_rf_path = RF_PATH_A; e_rf_path < 2; e_rf_path++)
+			phydm_set_pa_bias_to_rf_8822b(dm, e_rf_path,
+						      tx_pa_bias[e_rf_path]);
 
-		for (e_rf_path = RF_PATH_A;  e_rf_path < 2; e_rf_path++)
-			phydm_set_pa_bias_to_rf_8822b(p_dm, e_rf_path, tx_pa_bias[e_rf_path]);
+		power_trim_info->pa_bias_flag |= PA_BIAS_FLAG_ON;
+	} else {
+		RF_DBG(dm, DBG_RF_MP, "[kfree] 8822b 2g tx pa bias no pg\n");
 	}
-	else
-		ODM_RT_TRACE(p_dm, ODM_COMP_MP, ODM_DBG_LOUD, ("[kfree] 8822b 2g tx pa bias no pg\n"));
 }
 
+void phydm_set_kfree_to_rf_8822b(void *dm_void, u8 e_rf_path, u8 data)
+{
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	u32 gain_bmask = (BIT(18) | BIT(17) | BIT(16) | BIT(15) | BIT(14));
+
+	odm_set_rf_reg(dm, e_rf_path, RF_0xde, BIT(0), 1);
+	odm_set_rf_reg(dm, e_rf_path, RF_0xde, BIT(4), 1);
+	odm_set_rf_reg(dm, e_rf_path, RF_0x65, MASKLWORD, 0x9000);
+	odm_set_rf_reg(dm, e_rf_path, RF_0x55, BIT(5), 1);
+
+	odm_set_rf_reg(dm, e_rf_path, RF_0x55, BIT(19), (data & BIT(0)));
+	odm_set_rf_reg(dm, e_rf_path, RF_0x55, gain_bmask,
+		       ((data & 0x1f) >> 1));
+
+	RF_DBG(dm, DBG_RF_MP, "[kfree] 8822b 0x55[19:14]=0x%X path=%d\n",
+	       odm_get_rf_reg(dm, e_rf_path, RF_0x55,
+			      (BIT(19) | BIT(18) | BIT(17) | BIT(16) |
+			      BIT(15) | BIT(14))), e_rf_path);
+}
 
+void phydm_clear_kfree_to_rf_8822b(void *dm_void, u8 e_rf_path, u8 data)
+{
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	u32 gain_bmask = (BIT(18) | BIT(17) | BIT(16) | BIT(15) | BIT(14));
+
+	odm_set_rf_reg(dm, e_rf_path, RF_0xde, BIT(0), 1);
+	odm_set_rf_reg(dm, e_rf_path, RF_0xde, BIT(4), 1);
+	odm_set_rf_reg(dm, e_rf_path, RF_0x65, MASKLWORD, 0x9000);
+	odm_set_rf_reg(dm, e_rf_path, RF_0x55, BIT(5), 1);
+
+	odm_set_rf_reg(dm, e_rf_path, RF_0x55, BIT(19), (data & BIT(0)));
+	odm_set_rf_reg(dm, e_rf_path, RF_0x55, gain_bmask,
+		       ((data & 0x1f) >> 1));
+
+	odm_set_rf_reg(dm, e_rf_path, RF_0xde, BIT(0), 0);
+	odm_set_rf_reg(dm, e_rf_path, RF_0xde, BIT(4), 1);
+	odm_set_rf_reg(dm, e_rf_path, RF_0x65, MASKLWORD, 0x9000);
+	odm_set_rf_reg(dm, e_rf_path, RF_0x55, BIT(5), 0);
+	odm_set_rf_reg(dm, e_rf_path, RF_0x55, BIT(7), 0);
+
+	RF_DBG(dm, DBG_RF_MP,
+	       "[kfree] 8822b clear power trim 0x55[19:14]=0x%X path=%d\n",
+	       odm_get_rf_reg(dm, e_rf_path, RF_0x55,
+			      (BIT(19) | BIT(18) | BIT(17) | BIT(16) |
+			      BIT(15) | BIT(14))), e_rf_path);
+}
 
-void
-phydm_set_kfree_to_rf_8822b(
-	void		*p_dm_void,
-	u8		e_rf_path,
-	u8		data
-)
+void phydm_get_thermal_trim_offset_8710b(void *dm_void)
 {
-	struct PHY_DM_STRUCT		*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	struct odm_rf_calibration_structure	*p_rf_calibrate_info = &(p_dm->rf_calibrate_info);
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct odm_power_trim_data *power_trim_info = &dm->power_trim_data;
 
-	odm_set_rf_reg(p_dm, e_rf_path, 0xde, BIT(0), 1);
-	odm_set_rf_reg(p_dm, e_rf_path, 0xde, BIT(4), 1);
-	odm_set_rf_reg(p_dm, e_rf_path, 0x65, MASKLWORD, 0x9000);
-	odm_set_rf_reg(p_dm, e_rf_path, 0x55, BIT(5), 1);
+	u8 pg_therm = 0xff;
 
-	odm_set_rf_reg(p_dm, e_rf_path, 0x55, BIT(19), (data & BIT(0)));
-	odm_set_rf_reg(p_dm, e_rf_path, 0x55, (BIT(18) | BIT(17) | BIT(16) | BIT(15) | BIT(14)), ((data & 0x1f) >> 1));
+	odm_efuse_one_byte_read(dm, 0x0EF, &pg_therm, false);
 
-	ODM_RT_TRACE(p_dm, ODM_COMP_MP, ODM_DBG_LOUD,
-		("[kfree] 8822b 0x55[19:14]=0x%X path=%d\n",
-		odm_get_rf_reg(p_dm, e_rf_path, 0x55, (BIT(19) | BIT(18) | BIT(17) | BIT(16) | BIT(15) | BIT(14))),
-		e_rf_path
-		));
+	if (pg_therm != 0xff) {
+		pg_therm = pg_therm & 0x1f;
+		if ((pg_therm & BIT(0)) == 0)
+			power_trim_info->thermal = (-1 * (pg_therm >> 1));
+		else
+			power_trim_info->thermal = (pg_therm >> 1);
+
+		power_trim_info->flag |= KFREE_FLAG_THERMAL_K_ON;
+	}
+
+	RF_DBG(dm, DBG_RF_MP, "[kfree] 8710b thermal trim flag:0x%02x\n",
+	       power_trim_info->flag);
+
+	if (power_trim_info->flag & KFREE_FLAG_THERMAL_K_ON)
+		RF_DBG(dm, DBG_RF_MP, "[kfree] 8710b thermal:%d\n",
+		       power_trim_info->thermal);
 }
 
+void phydm_get_power_trim_offset_8710b(void *dm_void)
+{
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct odm_power_trim_data *power_trim_info = &dm->power_trim_data;
+
+	u8 pg_power = 0xff;
+
+	odm_efuse_one_byte_read(dm, 0xEE, &pg_power, false);
+
+	if (pg_power != 0xff) {
+		/*Path A*/
+		odm_efuse_one_byte_read(dm, 0xEE, &pg_power, false);
+		power_trim_info->bb_gain[0][0] = (pg_power & 0xf);
 
+		power_trim_info->flag |= KFREE_FLAG_ON_2G;
+		power_trim_info->flag |= KFREE_FLAG_ON;
+	}
+
+	RF_DBG(dm, DBG_RF_MP, "[kfree] 8710b power trim flag:0x%02x\n",
+	       power_trim_info->flag);
+
+	if (power_trim_info->flag & KFREE_FLAG_ON)
+		RF_DBG(dm, DBG_RF_MP,
+		       "[kfree] 8710b power_trim_data->bb_gain[0][0]=0x%X\n",
+		       power_trim_info->bb_gain[0][0]);
+}
 
-void
-phydm_clear_kfree_to_rf_8822b(
-	void		*p_dm_void,
-	u8		e_rf_path,
-	u8		data
-)
+void phydm_set_kfree_to_rf_8710b(void *dm_void, u8 e_rf_path, u8 data)
 {
-	struct PHY_DM_STRUCT		*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	struct odm_rf_calibration_structure	*p_rf_calibrate_info = &(p_dm->rf_calibrate_info);
-
-	odm_set_rf_reg(p_dm, e_rf_path, 0xde, BIT(0), 1);
-	odm_set_rf_reg(p_dm, e_rf_path, 0xde, BIT(4), 1);
-	odm_set_rf_reg(p_dm, e_rf_path, 0x65, MASKLWORD, 0x9000);
-	odm_set_rf_reg(p_dm, e_rf_path, 0x55, BIT(5), 1);
-
-	odm_set_rf_reg(p_dm, e_rf_path, 0x55, BIT(19), (data & BIT(0)));
-	odm_set_rf_reg(p_dm, e_rf_path, 0x55, (BIT(18) | BIT(17) | BIT(16) | BIT(15) | BIT(14)), ((data & 0x1f) >> 1));
-
-	odm_set_rf_reg(p_dm, e_rf_path, 0xde, BIT(0), 0);
-	odm_set_rf_reg(p_dm, e_rf_path, 0xde, BIT(4), 1);
-	odm_set_rf_reg(p_dm, e_rf_path, 0x65, MASKLWORD, 0x9000);
-	odm_set_rf_reg(p_dm, e_rf_path, 0x55, BIT(5), 0);
-	odm_set_rf_reg(p_dm, e_rf_path, 0x55, BIT(7), 0);
-
-	ODM_RT_TRACE(p_dm, ODM_COMP_MP, ODM_DBG_LOUD,
-		("[kfree] 8822b clear power trim 0x55[19:14]=0x%X path=%d\n",
-		odm_get_rf_reg(p_dm, e_rf_path, 0x55, (BIT(19) | BIT(18) | BIT(17) | BIT(16) | BIT(15) | BIT(14))),
-		e_rf_path
-		));
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	u32 gain_bmask = (BIT(18) | BIT(17) | BIT(16) | BIT(15));
+
+	odm_set_rf_reg(dm, e_rf_path, RF_0x55, BIT(19), (data & BIT(0)));
+	odm_set_rf_reg(dm, e_rf_path, RF_0x55, gain_bmask, ((data & 0xf) >> 1));
+
+	RF_DBG(dm, DBG_RF_MP, "[kfree] 8710b 0x55[19:14]=0x%X path=%d\n",
+	       odm_get_rf_reg(dm, e_rf_path, RF_0x55,
+			      (BIT(19) | BIT(18) | BIT(17) | BIT(16) |
+			      BIT(15) | BIT(14))), e_rf_path);
+}
+
+void phydm_clear_kfree_to_rf_8710b(void *dm_void, u8 e_rf_path, u8 data)
+{
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	u32 gain_bmask = (BIT(18) | BIT(17) | BIT(16) | BIT(15) | BIT(14));
+
+	odm_set_rf_reg(dm, e_rf_path, RF_0x55, BIT(19), (data & BIT(0)));
+	odm_set_rf_reg(dm, e_rf_path, RF_0x55, gain_bmask,
+		       ((data & 0x1f) >> 1));
+
+	RF_DBG(dm, DBG_RF_MP,
+	       "[kfree] 8710b clear power trim 0x55[19:14]=0x%X path=%d\n",
+	       odm_get_rf_reg(dm, e_rf_path, RF_0x55,
+			      (BIT(19) | BIT(18) | BIT(17) | BIT(16) |
+			      BIT(15) | BIT(14))), e_rf_path);
 }
 
-void
-phydm_get_thermal_trim_offset_8710b(
-void	*p_dm_void)
+void phydm_get_thermal_trim_offset_8192f(void *dm_void)
 {
-	struct PHY_DM_STRUCT		*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	struct odm_power_trim_data	*p_power_trim_info = &(p_dm->power_trim_data);
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct odm_power_trim_data *power_trim_info = &dm->power_trim_data;
 
 	u8 pg_therm = 0xff;
-	
-	odm_efuse_one_byte_read(p_dm, 0x0EF, &pg_therm, false);
-	
+
+	odm_efuse_one_byte_read(dm, 0x1EF, &pg_therm, false);
+
 	if (pg_therm != 0xff) {
 		pg_therm = pg_therm & 0x1f;
 		if ((pg_therm & BIT(0)) == 0)
-			p_power_trim_info->thermal = (-1 * (pg_therm >> 1));
+			power_trim_info->thermal = (-1 * (pg_therm >> 1));
 		else
-			p_power_trim_info->thermal = (pg_therm >> 1);
+			power_trim_info->thermal = (pg_therm >> 1);
 
-		p_power_trim_info->flag |= KFREE_FLAG_THERMAL_K_ON;
+		power_trim_info->flag |= KFREE_FLAG_THERMAL_K_ON;
 	}
-	
-	ODM_RT_TRACE(p_dm, ODM_COMP_MP, ODM_DBG_LOUD, ("[kfree] 8710b thermal trim flag:0x%02x\n", p_power_trim_info->flag));
-	
-	if (p_power_trim_info->flag & KFREE_FLAG_THERMAL_K_ON)
-		ODM_RT_TRACE(p_dm, ODM_COMP_MP, ODM_DBG_LOUD, ("[kfree] 8710b thermal:%d\n", p_power_trim_info->thermal));
 
+	RF_DBG(dm, DBG_RF_MP, "[kfree] 8192f thermal trim flag:0x%02x\n",
+	       power_trim_info->flag);
+
+	if (power_trim_info->flag & KFREE_FLAG_THERMAL_K_ON)
+		RF_DBG(dm, DBG_RF_MP, "[kfree] 8192f thermal:%d\n",
+		       power_trim_info->thermal);
 }
 
-void
-phydm_get_power_trim_offset_8710b(
-	void	*p_dm_void
-)
+void phydm_get_power_trim_offset_8192f(void *dm_void)
 {
-	struct PHY_DM_STRUCT		*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	struct odm_power_trim_data	*p_power_trim_info = &(p_dm->power_trim_data);
-	struct odm_rf_calibration_structure	*p_rf_calibrate_info = &(p_dm->rf_calibrate_info);
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct odm_power_trim_data *power_trim_info = &dm->power_trim_data;
 
-	u8 pg_power = 0xff;
+	u8 pg_power1 = 0xff, pg_power2 = 0xff, pg_power3 = 0xff, i, j;
 
-	odm_efuse_one_byte_read(p_dm, 0xEE, &pg_power, false);
+	odm_efuse_one_byte_read(dm, 0x1EE, &pg_power1, false); /*CH4-9*/
 
-		if (pg_power != 0xff) {
-			/*Path A*/
-			odm_efuse_one_byte_read(p_dm, 0xEE, &pg_power, false);
-			p_power_trim_info->bb_gain[0][0] = (pg_power & 0xf);
+	if (pg_power1 != 0xff) {
+		/*Path A*/
+		odm_efuse_one_byte_read(dm, 0x1EE, &pg_power1, false);
+		power_trim_info->bb_gain[1][0] = (pg_power1 & 0xf);
+		/*Path B*/
+		odm_efuse_one_byte_read(dm, 0x1EE, &pg_power1, false);
+		power_trim_info->bb_gain[1][1] = ((pg_power1 & 0xf0) >> 4);
 
-			p_power_trim_info->flag |= KFREE_FLAG_ON_2G;
-			p_power_trim_info->flag |= KFREE_FLAG_ON;
-		}
+		power_trim_info->flag |= KFREE_FLAG_ON_2G;
+		power_trim_info->flag |= KFREE_FLAG_ON;
+	}
 
+	odm_efuse_one_byte_read(dm, 0x1EC, &pg_power2, false); /*CH1-3*/
 
-		ODM_RT_TRACE(p_dm, ODM_COMP_MP, ODM_DBG_LOUD, ("[kfree] 8710b power trim flag:0x%02x\n", p_power_trim_info->flag));
+	if (pg_power2 != 0xff) {
+		/*Path A*/
+		odm_efuse_one_byte_read(dm, 0x1EC, &pg_power2, false);
+		power_trim_info->bb_gain[0][0] = (pg_power2 & 0xf);
+		/*Path B*/
+		odm_efuse_one_byte_read(dm, 0x1EC, &pg_power2, false);
+		power_trim_info->bb_gain[0][1] = ((pg_power2 & 0xf0) >> 4);
+
+		power_trim_info->flag |= KFREE_FLAG_ON_2G;
+		power_trim_info->flag |= KFREE_FLAG_ON;
+	} else {
+		power_trim_info->bb_gain[0][0] = (pg_power1 & 0xf);
+		power_trim_info->bb_gain[0][1] = ((pg_power1 & 0xf0) >> 4);
+	}
 
-		if (p_power_trim_info->flag & KFREE_FLAG_ON) 
+	odm_efuse_one_byte_read(dm, 0x1EA, &pg_power3, false); /*CH10-14*/
 
-		ODM_RT_TRACE(p_dm, ODM_COMP_MP, ODM_DBG_LOUD, ("[kfree] 8710b power_trim_data->bb_gain[0][0]=0x%X\n",  p_power_trim_info->bb_gain[0][0]));
+	if (pg_power3 != 0xff) {
+		/*Path A*/
+		odm_efuse_one_byte_read(dm, 0x1EA, &pg_power3, false);
+		power_trim_info->bb_gain[2][0] = (pg_power3 & 0xf);
+		/*Path B*/
+		odm_efuse_one_byte_read(dm, 0x1EA, &pg_power3, false);
+		power_trim_info->bb_gain[2][1] = ((pg_power3 & 0xf0) >> 4);
 
+		power_trim_info->flag |= KFREE_FLAG_ON_2G;
+		power_trim_info->flag |= KFREE_FLAG_ON;
+	} else {
+		power_trim_info->bb_gain[2][0] = (pg_power1 & 0xf);
+		power_trim_info->bb_gain[2][1] = ((pg_power1 & 0xf0) >> 4);
+	}
+
+	RF_DBG(dm, DBG_RF_MP, "[kfree] 8192F power trim flag:0x%02x\n",
+	       power_trim_info->flag);
+
+	if (!(power_trim_info->flag & KFREE_FLAG_ON))
+		return;
+
+	for (i = 0; i < KFREE_CH_NUM; i++) {
+		for (j = 0; j < 2; j++)
+			RF_DBG(dm, DBG_RF_MP,
+			       "[kfree] 8192F PwrTrim->bb_gain[%d][%d]=0x%X\n",
+			       i, j, power_trim_info->bb_gain[i][j]);
+	}
 }
-void
-phydm_set_kfree_to_rf_8710b(
-	void		*p_dm_void,
-	u8		e_rf_path,
-	u8		data
-)
+
+void phydm_set_kfree_to_rf_8192f(void *dm_void, u8 e_rf_path, u8 channel_idx,
+				 u8 data)
 {
-	struct PHY_DM_STRUCT		*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	struct odm_rf_calibration_structure	*p_rf_calibrate_info = &(p_dm->rf_calibrate_info);
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+
+	/*power_trim based on 55[19:14]*/
+	odm_set_rf_reg(dm, e_rf_path, RF_0x55, BIT(5), 1);
+	/*enable 55[14] for 0.5db step*/
+	odm_set_rf_reg(dm, e_rf_path, RF_0xf5, BIT(18), 1);
+	/*enter power_trim debug mode*/
+	odm_set_rf_reg(dm, e_rf_path, RF_0xdf, BIT(7), 1);
+	/*write enable*/
+	odm_set_rf_reg(dm, e_rf_path, RF_0xef, BIT(7), 1);
+
+	if (e_rf_path == 0) {
+		if (channel_idx == 0) {
+			odm_set_rf_reg(dm, e_rf_path, RF_0x33, 0x70000, 0);
+			odm_set_rf_reg(dm, e_rf_path, 0x33, 0x3F, data);
+
+			odm_set_rf_reg(dm, e_rf_path, RF_0x33, 0x70000, 1);
+			odm_set_rf_reg(dm, e_rf_path, 0x33, 0x3F, data);
+
+		} else if (channel_idx == 1) {
+			odm_set_rf_reg(dm, e_rf_path, RF_0x33, 0x70000, 2);
+			odm_set_rf_reg(dm, e_rf_path, 0x33, 0x3F, data);
+
+			odm_set_rf_reg(dm, e_rf_path, RF_0x33, 0x70000, 3);
+			odm_set_rf_reg(dm, e_rf_path, 0x33, 0x3F, data);
+		} else if (channel_idx == 2) {
+			odm_set_rf_reg(dm, e_rf_path, RF_0x33, 0x70000, 4);
+			odm_set_rf_reg(dm, e_rf_path, 0x33, 0x3F, data);
+
+			odm_set_rf_reg(dm, e_rf_path, RF_0x33, 0x70000, 5);
+			odm_set_rf_reg(dm, e_rf_path, 0x33, 0x3F, data);
+		}
+	} else if (e_rf_path == 1) {
+		if (channel_idx == 0) {
+			odm_set_rf_reg(dm, e_rf_path, RF_0x33, 0x70000, 0);
+			odm_set_rf_reg(dm, e_rf_path, 0x33, 0x3F, data);
+
+			odm_set_rf_reg(dm, e_rf_path, RF_0x33, 0x70000, 1);
+			odm_set_rf_reg(dm, e_rf_path, 0x33, 0x3F, data);
+		} else if (channel_idx == 1) {
+			odm_set_rf_reg(dm, e_rf_path, RF_0x33, 0x70000, 2);
+			odm_set_rf_reg(dm, e_rf_path, 0x33, 0x3F, data);
+
+			odm_set_rf_reg(dm, e_rf_path, RF_0x33, 0x70000, 3);
+			odm_set_rf_reg(dm, e_rf_path, 0x33, 0x3F, data);
+		} else if (channel_idx == 2) {
+			odm_set_rf_reg(dm, e_rf_path, RF_0x33, 0x70000, 4);
+			odm_set_rf_reg(dm, e_rf_path, 0x33, 0x3F, data);
+
+			odm_set_rf_reg(dm, e_rf_path, RF_0x33, 0x70000, 5);
+			odm_set_rf_reg(dm, e_rf_path, 0x33, 0x3F, data);
+		}
+	}
 
-	odm_set_rf_reg(p_dm, e_rf_path, 0x55, BIT(19), (data & BIT(0)));
-	odm_set_rf_reg(p_dm, e_rf_path, 0x55, (BIT(18) | BIT(17) | BIT(16) | BIT(15)), ((data & 0xf) >> 1));
+	/*leave power_trim debug mode*/
+	odm_set_rf_reg(dm, e_rf_path, RF_0xdf, BIT(7), 0);
+	/*write disable*/
+	odm_set_rf_reg(dm, e_rf_path, RF_0xef, BIT(7), 0);
 
-	ODM_RT_TRACE(p_dm, ODM_COMP_MP, ODM_DBG_LOUD,
-		("[kfree] 8710b 0x55[19:14]=0x%X path=%d\n",
-		odm_get_rf_reg(p_dm, e_rf_path, 0x55, (BIT(19) | BIT(18) | BIT(17) | BIT(16) | BIT(15) | BIT(14))),
-		e_rf_path
-		));
+	RF_DBG(dm, DBG_RF_MP,
+	       "[kfree] 8192F 0x55[19:14]=0x%X path=%d channel=%d\n",
+	       odm_get_rf_reg(dm, e_rf_path, RF_0x55,
+			      (BIT(19) | BIT(18) | BIT(17) | BIT(16) |
+			      BIT(15) | BIT(14))), e_rf_path, channel_idx);
 }
 
-void
-phydm_clear_kfree_to_rf_8710b(
-	void		*p_dm_void,
-	u8		e_rf_path,
-	u8		data
-)
+#if 0
+/*
+void phydm_clear_kfree_to_rf_8192f(void *dm_void, u8 e_rf_path, u8 data)
 {
-	struct PHY_DM_STRUCT		*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	struct odm_rf_calibration_structure	*p_rf_calibrate_info = &(p_dm->rf_calibrate_info);
+	struct dm_struct		*dm = (struct dm_struct *)dm_void;
+	struct dm_rf_calibration_struct	*cali_info = &dm->rf_calibrate_info;
 
-	odm_set_rf_reg(p_dm, e_rf_path, 0x55, BIT(19), (data & BIT(0)));
-	odm_set_rf_reg(p_dm, e_rf_path, 0x55, (BIT(18) | BIT(17) | BIT(16) | BIT(15) | BIT(14)), ((data & 0x1f) >> 1));
+	odm_set_rf_reg(dm, e_rf_path, RF_0x55, BIT(19), (data & BIT(0)));
+	odm_set_rf_reg(dm, e_rf_path, RF_0x55, (BIT(18) | BIT(17) | BIT(16) | BIT(15) | BIT(14)), ((data & 0x1f) >> 1));
 
-	ODM_RT_TRACE(p_dm, ODM_COMP_MP, ODM_DBG_LOUD,
-		("[kfree] 8710b clear power trim 0x55[19:14]=0x%X path=%d\n",
-		odm_get_rf_reg(p_dm, e_rf_path, 0x55, (BIT(19) | BIT(18) | BIT(17) | BIT(16) | BIT(15) | BIT(14))),
+	RF_DBG(dm, DBG_RF_MP,
+		"[kfree] 8192F clear power trim 0x55[19:14]=0x%X path=%d\n",
+		odm_get_rf_reg(dm, e_rf_path, RF_0x55, (BIT(19) | BIT(18) | BIT(17) | BIT(16) | BIT(15) | BIT(14))),
 		e_rf_path
-		));
+		);
 }
+*/
+#endif
+
+void phydm_get_thermal_trim_offset_8198f(void *dm_void)
+{
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct odm_power_trim_data *power_trim_info = &dm->power_trim_data;
+
+	u8 pg_therm = 0xff;
+
+	odm_efuse_one_byte_read(dm, PPG_THERMAL_OFFSET_98F, &pg_therm, false);
 
+	if (pg_therm != 0xff) {
+		pg_therm = pg_therm & 0x1f;
+		if ((pg_therm & BIT(0)) == 0)
+			power_trim_info->thermal = (-1 * (pg_therm >> 1));
+		else
+			power_trim_info->thermal = (pg_therm >> 1);
+
+		power_trim_info->flag |= KFREE_FLAG_THERMAL_K_ON;
+	}
 
+	RF_DBG(dm, DBG_RF_MP, "[kfree] 8198f thermal trim flag:0x%02x\n",
+	       power_trim_info->flag);
 
-void
-phydm_set_kfree_to_rf(
-	void		*p_dm_void,
-	u8		e_rf_path,
-	u8		data
-)
+	if (power_trim_info->flag & KFREE_FLAG_THERMAL_K_ON)
+		RF_DBG(dm, DBG_RF_MP, "[kfree] 8198f thermal:%d\n",
+		       power_trim_info->thermal);
+}
+
+void phydm_get_power_trim_offset_8198f(void *dm_void)
 {
-	struct PHY_DM_STRUCT	*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct odm_power_trim_data *power_trim_info = &dm->power_trim_data;
+
+	u8 pg_power = 0xff, i, j;
+
+	odm_efuse_one_byte_read(dm, PPG_2GL_TXAB_98F, &pg_power, false);
+
+	if (pg_power != 0xff) {
+		power_trim_info->bb_gain[0][0] = pg_power & 0xf;
+		power_trim_info->bb_gain[0][1] = (pg_power & 0xf0) >> 4;
+
+		odm_efuse_one_byte_read(dm, PPG_2GL_TXCD_98F, &pg_power, false);
+		power_trim_info->bb_gain[0][2] = pg_power & 0xf;
+		power_trim_info->bb_gain[0][3] = (pg_power & 0xf0) >> 4;
+
+		odm_efuse_one_byte_read(dm, PPG_2GM_TXAB_98F, &pg_power, false);
+		power_trim_info->bb_gain[1][0] = pg_power & 0xf;
+		power_trim_info->bb_gain[1][1] = (pg_power & 0xf0) >> 4;
 
-	if (p_dm->support_ic_type & ODM_RTL8814A)
-		phydm_set_kfree_to_rf_8814a(p_dm, e_rf_path, data);
+		odm_efuse_one_byte_read(dm, PPG_2GM_TXCD_98F, &pg_power, false);
+		power_trim_info->bb_gain[1][2] = pg_power & 0xf;
+		power_trim_info->bb_gain[1][3] = (pg_power & 0xf0) >> 4;
 
-	if ((p_dm->support_ic_type & ODM_RTL8821C) && (*p_dm->p_band_type == ODM_BAND_2_4G))
-		phydm_set_kfree_to_rf_8821c(p_dm, e_rf_path, true, data);
-	else if (p_dm->support_ic_type & ODM_RTL8821C)
-		phydm_set_kfree_to_rf_8821c(p_dm, e_rf_path, false, data);
+		odm_efuse_one_byte_read(dm, PPG_5GH_TXAB_98F, &pg_power, false);
+		power_trim_info->bb_gain[2][0] = pg_power & 0xf;
+		power_trim_info->bb_gain[2][1] = (pg_power & 0xf0) >> 4;
+
+		odm_efuse_one_byte_read(dm, PPG_5GH_TXCD_98F, &pg_power, false);
+		power_trim_info->bb_gain[2][2] = pg_power & 0xf;
+		power_trim_info->bb_gain[2][3] = (pg_power & 0xf0) >> 4;
+
+		power_trim_info->flag =
+			power_trim_info->flag | KFREE_FLAG_ON | KFREE_FLAG_ON_2G;
+	}
 
-	if (p_dm->support_ic_type & ODM_RTL8822B)
-		phydm_set_kfree_to_rf_8822b(p_dm, e_rf_path, data);
+	RF_DBG(dm, DBG_RF_MP, "[kfree] 8198f power trim flag:0x%02x\n",
+	       power_trim_info->flag);
 
-	if (p_dm->support_ic_type & ODM_RTL8710B)
-		phydm_set_kfree_to_rf_8710b(p_dm, e_rf_path, data);
+	if (power_trim_info->flag & KFREE_FLAG_ON) {
+		for (i = 0; i < KFREE_BAND_NUM; i++) {
+			for (j = 0; j < MAX_RF_PATH; j++) {
+				RF_DBG(dm, DBG_RF_MP,
+				       "[kfree] 8198f pwr_trim->bb_gain[%d][%d]=0x%X\n",
+				       i, j, power_trim_info->bb_gain[i][j]);
+			}
+		}
+	}
 }
 
+void phydm_set_kfree_to_rf_8198f(void *dm_void, u8 e_rf_path, u8 data)
+{
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct odm_power_trim_data *power_trim_info = &dm->power_trim_data;
+	u32 band, i;
+	s8 pwr_offset[3];
+
+	RF_DBG(dm, DBG_RF_MP,
+		   "[kfree] %s:Set kfree to rf 0x33\n", __func__);
+
+	/*power_trim based on 55[19:14]*/
+	odm_set_rf_reg(dm, e_rf_path, RF_0x55, BIT(5), 1);
+	/*enable 55[14] for 0.5db step*/
+	odm_set_rf_reg(dm, e_rf_path, RF_0xf5, BIT(18), 1);
+	/*enter power_trim debug mode*/
+	odm_set_rf_reg(dm, e_rf_path, RF_0xdf, BIT(7), 0);
+	/*write enable*/
+	odm_set_rf_reg(dm, e_rf_path, RF_0xef, BIT(7), 1);
+
+	for (i =0; i < 3; i++)
+		pwr_offset[i] = power_trim_info->bb_gain[i][e_rf_path];
+
+	odm_set_rf_reg(dm, e_rf_path, RF_0x33, 0x70000, 0);
+	odm_set_rf_reg(dm, e_rf_path, RF_0x33, 0x3F, pwr_offset[0]);
+	odm_set_rf_reg(dm, e_rf_path, RF_0x33, 0x70000, 1);
+	odm_set_rf_reg(dm, e_rf_path, RF_0x33, 0x3F, pwr_offset[0]);
+	odm_set_rf_reg(dm, e_rf_path, RF_0x33, 0x70000, 2);
+	odm_set_rf_reg(dm, e_rf_path, RF_0x33, 0x3F, pwr_offset[1]);
+	odm_set_rf_reg(dm, e_rf_path, RF_0x33, 0x70000, 3);
+	odm_set_rf_reg(dm, e_rf_path, RF_0x33, 0x3F, pwr_offset[1]);
+	odm_set_rf_reg(dm, e_rf_path, RF_0x33, 0x70000, 4);
+	odm_set_rf_reg(dm, e_rf_path, RF_0x33, 0x3F, pwr_offset[2]);
+	odm_set_rf_reg(dm, e_rf_path, RF_0x33, 0x70000, 5);
+	odm_set_rf_reg(dm, e_rf_path, RF_0x33, 0x3F, pwr_offset[2]);
+
+	/*leave power_trim debug mode*/
+	/*odm_set_rf_reg(dm, e_rf_path, RF_0xdf, BIT(7), 0);*/
+	/*write disable*/
+	odm_set_rf_reg(dm, e_rf_path, RF_0xef, BIT(7), 0);
 
+}
 
-void
-phydm_clear_kfree_to_rf(
-	void		*p_dm_void,
-	u8		e_rf_path,
-	u8		data
-)
+void phydm_clear_kfree_to_rf_8198f(void *dm_void, u8 e_rf_path, u8 data)
 {
-	struct PHY_DM_STRUCT	*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
 
-	if (p_dm->support_ic_type & ODM_RTL8822B)
-		phydm_clear_kfree_to_rf_8822b(p_dm, e_rf_path, 1);
+	RF_DBG(dm, DBG_RF_MP,
+		   "[kfree] %s:Clear kfree to rf 0x55\n", __func__);
+#if 0
+	/*power_trim based on 55[19:14]*/
+	odm_set_rf_reg(dm, e_rf_path, RF_0x55, BIT(5), 1);
+	/*enable 55[14] for 0.5db step*/
+	odm_set_rf_reg(dm, e_rf_path, RF_0xf5, BIT(18), 1);
+	/*enter power_trim debug mode*/
+	odm_set_rf_reg(dm, e_rf_path, RF_0xdf, BIT(7), 0);
+	/*write enable*/
+	odm_set_rf_reg(dm, e_rf_path, RF_0xef, BIT(7), 1);
+
+	odm_set_rf_reg(dm, e_rf_path, RF_0x33, 0x70000, 0);
+	odm_set_rf_reg(dm, e_rf_path, RF_0x33, 0x3F, data);
+	odm_set_rf_reg(dm, e_rf_path, RF_0x33, 0x70000, 1);
+	odm_set_rf_reg(dm, e_rf_path, RF_0x33, 0x3F, data);
+	odm_set_rf_reg(dm, e_rf_path, RF_0x33, 0x70000, 2);
+	odm_set_rf_reg(dm, e_rf_path, RF_0x33, 0x3F, data);
+	odm_set_rf_reg(dm, e_rf_path, RF_0x33, 0x70000, 3);
+	odm_set_rf_reg(dm, e_rf_path, RF_0x33, 0x3F, data);
+	odm_set_rf_reg(dm, e_rf_path, RF_0x33, 0x70000, 4);
+	odm_set_rf_reg(dm, e_rf_path, RF_0x33, 0x3F, data);
+	odm_set_rf_reg(dm, e_rf_path, RF_0x33, 0x70000, 5);
+	odm_set_rf_reg(dm, e_rf_path, RF_0x33, 0x3F, data);
+
+	/*leave power_trim debug mode*/
+	odm_set_rf_reg(dm, e_rf_path, RF_0xdf, BIT(7), 0);
+	/*enable 55[14] for 0.5db step*/
+	odm_set_rf_reg(dm, e_rf_path, RF_0xf5, BIT(18), 0);
+	/*write disable*/
+	odm_set_rf_reg(dm, e_rf_path, RF_0xef, BIT(7), 0);
+#else
+
+	odm_set_rf_reg(dm, e_rf_path, RF_0xdf, BIT(7), 1);
+	/*odm_set_rf_reg(dm, e_rf_path, RF_0xf5, BIT(18), 0);*/
 
-	if (p_dm->support_ic_type & ODM_RTL8821C)
-		phydm_clear_kfree_to_rf_8821c(p_dm, e_rf_path, 1);
+#endif
 
-	if (p_dm->support_ic_type & ODM_RTL8710B)
-		phydm_clear_kfree_to_rf_8710b(p_dm, e_rf_path, 1);
 }
 
 
+void phydm_set_kfree_to_rf(void *dm_void, u8 e_rf_path, u8 data)
+{
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
 
+	if (dm->support_ic_type & ODM_RTL8814A)
+		phydm_set_kfree_to_rf_8814a(dm, e_rf_path, data);
 
-void
-phydm_get_thermal_trim_offset(
-	void	*p_dm_void
-)
-{
-	struct PHY_DM_STRUCT	*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
+	if ((dm->support_ic_type & ODM_RTL8821C) &&
+	    (*dm->band_type == ODM_BAND_2_4G))
+		phydm_set_kfree_to_rf_8821c(dm, e_rf_path, true, data);
+	else if (dm->support_ic_type & ODM_RTL8821C)
+		phydm_set_kfree_to_rf_8821c(dm, e_rf_path, false, data);
 
-#if (DM_ODM_SUPPORT_TYPE & ODM_WIN)
-	struct _ADAPTER		*adapter = p_dm->adapter;
-	HAL_DATA_TYPE	*p_hal_data = GET_HAL_DATA(adapter);
-	PEFUSE_HAL		pEfuseHal = &(p_hal_data->EfuseHal);
-	u1Byte			eFuseContent[DCMD_EFUSE_MAX_SECTION_NUM * EFUSE_MAX_WORD_UNIT * 2];
+	if (dm->support_ic_type & ODM_RTL8822B)
+		phydm_set_kfree_to_rf_8822b(dm, e_rf_path, data);
 
-	if (HAL_MAC_Dump_EFUSE(&GET_HAL_MAC_INFO(adapter), EFUSE_WIFI, eFuseContent, pEfuseHal->PhysicalLen_WiFi, HAL_MAC_EFUSE_PHYSICAL, HAL_MAC_EFUSE_PARSE_DRV) != RT_STATUS_SUCCESS)
-		ODM_RT_TRACE(p_dm, ODM_COMP_MP, ODM_DBG_LOUD, ("[kfree] dump efuse fail !!!\n"));
-#endif
+	if (dm->support_ic_type & ODM_RTL8710B)
+		phydm_set_kfree_to_rf_8710b(dm, e_rf_path, data);
 
-	if (p_dm->support_ic_type & ODM_RTL8821C)
-		phydm_get_thermal_trim_offset_8821c(p_dm_void);
-	else if (p_dm->support_ic_type & ODM_RTL8822B)
-		phydm_get_thermal_trim_offset_8822b(p_dm_void);
-	else if (p_dm->support_ic_type & ODM_RTL8710B)
-		phydm_get_thermal_trim_offset_8710b(p_dm_void);
+	if (dm->support_ic_type & ODM_RTL8198F)
+		phydm_set_kfree_to_rf_8198f(dm, e_rf_path, data);
 }
 
+void phydm_clear_kfree_to_rf(void *dm_void, u8 e_rf_path, u8 data)
+{
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+
+	if (dm->support_ic_type & ODM_RTL8822B)
+		phydm_clear_kfree_to_rf_8822b(dm, e_rf_path, 1);
+
+	if (dm->support_ic_type & ODM_RTL8821C)
+		phydm_clear_kfree_to_rf_8821c(dm, e_rf_path, 1);
 
+	if (dm->support_ic_type & ODM_RTL8198F)
+		phydm_clear_kfree_to_rf_8198f(dm, e_rf_path, 0);
+}
 
-void
-phydm_get_power_trim_offset(
-	void	*p_dm_void
-)
+void phydm_get_thermal_trim_offset(void *dm_void)
 {
-	struct PHY_DM_STRUCT	*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
 
 #if (DM_ODM_SUPPORT_TYPE & ODM_WIN)
-	struct _ADAPTER		*adapter = p_dm->adapter;
-	HAL_DATA_TYPE	*p_hal_data = GET_HAL_DATA(adapter);
-	PEFUSE_HAL		pEfuseHal = &(p_hal_data->EfuseHal);
-	u1Byte			eFuseContent[DCMD_EFUSE_MAX_SECTION_NUM * EFUSE_MAX_WORD_UNIT * 2];
+	void *adapter = dm->adapter;
+	HAL_DATA_TYPE *hal_data = GET_HAL_DATA(((PADAPTER)adapter));
+	PEFUSE_HAL pEfuseHal = &hal_data->EfuseHal;
+	u1Byte eFuseContent[DCMD_EFUSE_MAX_SECTION_NUM * EFUSE_MAX_WORD_UNIT * 2];
 
-	if (HAL_MAC_Dump_EFUSE(&GET_HAL_MAC_INFO(adapter), EFUSE_WIFI, eFuseContent, pEfuseHal->PhysicalLen_WiFi, HAL_MAC_EFUSE_PHYSICAL, HAL_MAC_EFUSE_PARSE_DRV) != RT_STATUS_SUCCESS)
-		ODM_RT_TRACE(p_dm, ODM_COMP_MP, ODM_DBG_LOUD, ("[kfree] dump efuse fail !!!\n"));
+	if (HAL_MAC_Dump_EFUSE(&GET_HAL_MAC_INFO((PADAPTER)adapter), EFUSE_WIFI, eFuseContent, pEfuseHal->PhysicalLen_WiFi, HAL_MAC_EFUSE_PHYSICAL, HAL_MAC_EFUSE_PARSE_DRV) != RT_STATUS_SUCCESS)
+		RF_DBG(dm, DBG_RF_MP, "[kfree] dump efuse fail !!!\n");
 #endif
 
-	if (p_dm->support_ic_type & ODM_RTL8821C)
-		phydm_get_power_trim_offset_8821c(p_dm_void);
-	else if (p_dm->support_ic_type & ODM_RTL8822B)
-		phydm_get_power_trim_offset_8822b(p_dm_void);
-	else if (p_dm->support_ic_type & ODM_RTL8710B)
-		phydm_get_power_trim_offset_8710b(p_dm_void);
+	if (dm->support_ic_type & ODM_RTL8821C)
+		phydm_get_thermal_trim_offset_8821c(dm_void);
+	else if (dm->support_ic_type & ODM_RTL8822B)
+		phydm_get_thermal_trim_offset_8822b(dm_void);
+	else if (dm->support_ic_type & ODM_RTL8710B)
+		phydm_get_thermal_trim_offset_8710b(dm_void);
+	else if (dm->support_ic_type & ODM_RTL8192F)
+		phydm_get_thermal_trim_offset_8192f(dm_void);
+	else if (dm->support_ic_type & ODM_RTL8198F)
+		phydm_get_thermal_trim_offset_8198f(dm_void);
 }
 
-
-
-void
-phydm_get_pa_bias_offset(
-	void	*p_dm_void
-)
+void phydm_get_power_trim_offset(void *dm_void)
 {
-	struct PHY_DM_STRUCT	*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
 
-#if (DM_ODM_SUPPORT_TYPE & ODM_WIN)
-	struct _ADAPTER		*adapter = p_dm->adapter;
-	HAL_DATA_TYPE	*p_hal_data = GET_HAL_DATA(adapter);
-	PEFUSE_HAL		pEfuseHal = &(p_hal_data->EfuseHal);
+#if 0 //(DM_ODM_SUPPORT_TYPE & ODM_WIN)	// 2017 MH DM Should use the same code.s
+	void		*adapter = dm->adapter;
+	HAL_DATA_TYPE	*hal_data = GET_HAL_DATA(((PADAPTER)adapter));
+	PEFUSE_HAL		pEfuseHal = &hal_data->EfuseHal;
 	u1Byte			eFuseContent[DCMD_EFUSE_MAX_SECTION_NUM * EFUSE_MAX_WORD_UNIT * 2];
 
 	if (HAL_MAC_Dump_EFUSE(&GET_HAL_MAC_INFO(adapter), EFUSE_WIFI, eFuseContent, pEfuseHal->PhysicalLen_WiFi, HAL_MAC_EFUSE_PHYSICAL, HAL_MAC_EFUSE_PARSE_DRV) != RT_STATUS_SUCCESS)
-		ODM_RT_TRACE(p_dm, ODM_COMP_MP, ODM_DBG_LOUD, ("[kfree] dump efuse fail !!!\n"));
+		RF_DBG(dm, DBG_RF_MP, "[kfree] dump efuse fail !!!\n");
 #endif
 
-	if (p_dm->support_ic_type & ODM_RTL8822B)
-		phydm_get_pa_bias_offset_8822b(p_dm_void);
+	if (dm->support_ic_type & ODM_RTL8821C)
+		phydm_get_power_trim_offset_8821c(dm_void);
+	else if (dm->support_ic_type & ODM_RTL8822B)
+		phydm_get_power_trim_offset_8822b(dm_void);
+	else if (dm->support_ic_type & ODM_RTL8710B)
+		phydm_get_power_trim_offset_8710b(dm_void);
+	else if (dm->support_ic_type & ODM_RTL8192F)
+		phydm_get_power_trim_offset_8192f(dm_void);
+	else if (dm->support_ic_type & ODM_RTL8198F)
+		phydm_get_power_trim_offset_8198f(dm_void);
 }
 
+void phydm_get_pa_bias_offset(void *dm_void)
+{
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
 
+#if (DM_ODM_SUPPORT_TYPE & ODM_WIN)
+	void *adapter = dm->adapter;
+	HAL_DATA_TYPE *hal_data = GET_HAL_DATA(((PADAPTER)adapter));
+	PEFUSE_HAL pEfuseHal = &hal_data->EfuseHal;
+	u1Byte eFuseContent[DCMD_EFUSE_MAX_SECTION_NUM * EFUSE_MAX_WORD_UNIT * 2];
 
-s8
-phydm_get_thermal_offset(
-	void	*p_dm_void
-)
+	if (HAL_MAC_Dump_EFUSE(&GET_HAL_MAC_INFO((PADAPTER)adapter), EFUSE_WIFI, eFuseContent, pEfuseHal->PhysicalLen_WiFi, HAL_MAC_EFUSE_PHYSICAL, HAL_MAC_EFUSE_PARSE_DRV) != RT_STATUS_SUCCESS)
+		RF_DBG(dm, DBG_RF_MP, "[kfree] dump efuse fail !!!\n");
+#endif
+
+	if (dm->support_ic_type & ODM_RTL8822B)
+		phydm_get_pa_bias_offset_8822b(dm_void);
+}
+
+s8 phydm_get_thermal_offset(void *dm_void)
 {
-	struct PHY_DM_STRUCT		*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	struct odm_power_trim_data	*p_power_trim_info = &(p_dm->power_trim_data);
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct odm_power_trim_data *power_trim_info = &dm->power_trim_data;
 
-	if (p_power_trim_info->flag & KFREE_FLAG_THERMAL_K_ON)
-		return p_power_trim_info->thermal;
+	if (power_trim_info->flag & KFREE_FLAG_THERMAL_K_ON)
+		return power_trim_info->thermal;
 	else
 		return 0;
 }
 
-
-
-void
-phydm_config_kfree(
-	void	*p_dm_void,
-	u8	channel_to_sw
-)
+void phydm_do_kfree(void *dm_void, u8 channel_to_sw)
 {
-	struct PHY_DM_STRUCT		*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	struct odm_rf_calibration_structure	*p_rf_calibrate_info = &(p_dm->rf_calibrate_info);
-	struct odm_power_trim_data	*p_power_trim_info = &(p_dm->power_trim_data);
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct odm_power_trim_data *pwrtrim = &dm->power_trim_data;
+	u8 channel_idx = 0, rfpath = 0, max_path = 0, kfree_band_num = 0;
+	u8 i, j;
+	s8 bb_gain;
+
+	if (dm->support_ic_type & ODM_RTL8814A)
+		max_path = 4; /*0~3*/
+	else if (dm->support_ic_type &
+		 (ODM_RTL8812 | ODM_RTL8822B | ODM_RTL8192F)) {
+		max_path = 2; /*0~1*/
+		kfree_band_num = KFREE_BAND_NUM;
+	} else if (dm->support_ic_type & ODM_RTL8821C) {
+		max_path = 1;
+		kfree_band_num = KFREE_BAND_NUM;
+	} else if (dm->support_ic_type & ODM_RTL8710B) {
+		max_path = 1;
+		kfree_band_num = 1;
+	} else if (dm->support_ic_type & ODM_RTL8198F) {
+		max_path = 4;
+		kfree_band_num = 3;
+	}
 
-	u8			rfpath = 0, max_rf_path = 0;
-	u8			channel_idx = 0, i, j;
+	if (dm->support_ic_type &
+	    (ODM_RTL8192F | ODM_RTL8822B | ODM_RTL8821C |
+	    ODM_RTL8814A | ODM_RTL8710B)) {
+		for (i = 0; i < kfree_band_num; i++) {
+			for (j = 0; j < max_path; j++)
+				RF_DBG(dm, DBG_RF_MP,
+				       "[kfree] PwrTrim->gain[%d][%d]=0x%X\n",
+				       i, j, pwrtrim->bb_gain[i][j]);
+		}
+	}
+	if (*dm->band_type == ODM_BAND_2_4G &&
+	    pwrtrim->flag & KFREE_FLAG_ON_2G) {
+		if (!(dm->support_ic_type & ODM_RTL8192F)) {
+			if (channel_to_sw >= 1 && channel_to_sw <= 14)
+				channel_idx = PHYDM_2G;
+			for (rfpath = RF_PATH_A; rfpath < max_path; rfpath++) {
+				RF_DBG(dm, DBG_RF_MP,
+				       "[kfree] %s:chnl=%d PATH=%d gain:0x%X\n",
+				       __func__, channel_to_sw, rfpath,
+				       pwrtrim->bb_gain[channel_idx][rfpath]);
+				bb_gain = pwrtrim->bb_gain[channel_idx][rfpath];
+				phydm_set_kfree_to_rf(dm, rfpath, bb_gain);
+			}
+		} else if (dm->support_ic_type & ODM_RTL8192F) {
+			if (channel_to_sw >= 1 && channel_to_sw <= 3)
+				channel_idx = 0;
+			if (channel_to_sw >= 4 && channel_to_sw <= 9)
+				channel_idx = 1;
+			if (channel_to_sw >= 10 && channel_to_sw <= 14)
+				channel_idx = 2;
+			for (rfpath = RF_PATH_A; rfpath < max_path; rfpath++) {
+				RF_DBG(dm, DBG_RF_MP,
+				       "[kfree] %s:chnl=%d PATH=%d gain:0x%X\n",
+				       __func__, channel_to_sw, rfpath,
+				       pwrtrim->bb_gain[channel_idx][rfpath]);
+				bb_gain = pwrtrim->bb_gain[channel_idx][rfpath];
+				phydm_set_kfree_to_rf_8192f(dm, rfpath,
+							    channel_idx,
+							    bb_gain);
+			}
+		}
+	} else if (*dm->band_type == ODM_BAND_5G &&
+		   pwrtrim->flag & KFREE_FLAG_ON_5G) {
+		if (channel_to_sw >= 36 && channel_to_sw <= 48)
+			channel_idx = PHYDM_5GLB1;
+		if (channel_to_sw >= 52 && channel_to_sw <= 64)
+			channel_idx = PHYDM_5GLB2;
+		if (channel_to_sw >= 100 && channel_to_sw <= 120)
+			channel_idx = PHYDM_5GMB1;
+		if (channel_to_sw >= 122 && channel_to_sw <= 144)
+			channel_idx = PHYDM_5GMB2;
+		if (channel_to_sw >= 149 && channel_to_sw <= 177)
+			channel_idx = PHYDM_5GHB;
+
+		for (rfpath = RF_PATH_A; rfpath < max_path; rfpath++) {
+			RF_DBG(dm, DBG_RF_MP,
+			       "[kfree] %s: channel=%d PATH=%d bb_gain:0x%X\n",
+			       __func__, channel_to_sw, rfpath,
+			       pwrtrim->bb_gain[channel_idx][rfpath]);
+			bb_gain = pwrtrim->bb_gain[channel_idx][rfpath];
+			phydm_set_kfree_to_rf(dm, rfpath, bb_gain);
+		}
+	} else {
+		RF_DBG(dm, DBG_RF_MP, "[kfree] Set default Register\n");
+		if (!(dm->support_ic_type & ODM_RTL8192F)) {
+			for (rfpath = RF_PATH_A; rfpath < max_path; rfpath++) {
+				bb_gain = pwrtrim->bb_gain[channel_idx][rfpath];
+				phydm_clear_kfree_to_rf(dm, rfpath, bb_gain);
+			}
+		}
+#if 0
+		/*else if(dm->support_ic_type & ODM_RTL8192F){
+			if (channel_to_sw >= 1 && channel_to_sw <= 3)
+				channel_idx = 0;
+			if (channel_to_sw >= 4 && channel_to_sw <= 9)
+				channel_idx = 1;
+			if (channel_to_sw >= 9 && channel_to_sw <= 14)
+				channel_idx = 2;
+			for (rfpath = RF_PATH_A;  rfpath < max_path; rfpath++)
+				phydm_clear_kfree_to_rf_8192f(dm, rfpath, pwrtrim->bb_gain[channel_idx][rfpath]);
+		}*/
+#endif
+	}
+}
 
-	if (p_dm->support_ic_type & ODM_RTL8814A)
-		max_rf_path = 4;	/*0~3*/
-	else if (p_dm->support_ic_type & (ODM_RTL8812 | ODM_RTL8192E | ODM_RTL8822B))
-		max_rf_path = 2;	/*0~1*/
-	else if (p_dm->support_ic_type & (ODM_RTL8821C |ODM_RTL8710B))
-		max_rf_path = 1;
+void phydm_config_kfree(void *dm_void, u8 channel_to_sw)
+{
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct dm_rf_calibration_struct *cali_info = &dm->rf_calibrate_info;
+	struct odm_power_trim_data *pwrtrim = &dm->power_trim_data;
 
-	ODM_RT_TRACE(p_dm, ODM_COMP_MP, ODM_DBG_LOUD, ("===>[kfree] phy_ConfigKFree()\n"));
+	RF_DBG(dm, DBG_RF_MP, "===>[kfree] phy_ConfigKFree()\n");
 
-	if (p_rf_calibrate_info->reg_rf_kfree_enable == 2) {
-		ODM_RT_TRACE(p_dm, ODM_COMP_MP, ODM_DBG_LOUD, ("[kfree] phy_ConfigKFree(): reg_rf_kfree_enable == 2, Disable\n"));
+	if (cali_info->reg_rf_kfree_enable == 2) {
+		RF_DBG(dm, DBG_RF_MP,
+		       "[kfree] %s: reg_rf_kfree_enable == 2, Disable\n",
+		       __func__);
 		return;
-	} else if (p_rf_calibrate_info->reg_rf_kfree_enable == 1 || p_rf_calibrate_info->reg_rf_kfree_enable == 0) {
-		ODM_RT_TRACE(p_dm, ODM_COMP_MP, ODM_DBG_LOUD, ("[kfree] phy_ConfigKFree(): reg_rf_kfree_enable == true\n"));
+	} else if (cali_info->reg_rf_kfree_enable == 1 ||
+			cali_info->reg_rf_kfree_enable == 0) {
+		RF_DBG(dm, DBG_RF_MP,
+		       "[kfree] %s: reg_rf_kfree_enable == true\n", __func__);
 		/*Make sure the targetval is defined*/
-		if (p_power_trim_info->flag & KFREE_FLAG_ON) {
-			/*if kfree_table[0] == 0xff, means no Kfree*/
-           if (p_dm->support_ic_type &ODM_RTL8710B)
-		   	 ODM_RT_TRACE(p_dm, ODM_COMP_MP, ODM_DBG_LOUD, ("[kfree] power_trim_data->bb_gain[0][0]=0x%X\n", p_power_trim_info->bb_gain[0][0]));
-			else if (p_dm->support_ic_type & (ODM_RTL8812 | ODM_RTL8192E | ODM_RTL8822B |ODM_RTL8821C | ODM_RTL8814A)){
-			for (i = 0; i < KFREE_BAND_NUM; i++) {
-				for (j = 0; j < max_rf_path; j++)
-					ODM_RT_TRACE(p_dm, ODM_COMP_MP, ODM_DBG_LOUD, ("[kfree] power_trim_data->bb_gain[%d][%d]=0x%X\n", i, j, p_power_trim_info->bb_gain[i][j]));
-				}
-			}
-			if (*p_dm->p_band_type == ODM_BAND_2_4G && p_power_trim_info->flag & KFREE_FLAG_ON_2G) {
-				
-				if (channel_to_sw >= 1 && channel_to_sw <= 14)
-					channel_idx = PHYDM_2G;
-
-				for (rfpath = RF_PATH_A;  rfpath < max_rf_path; rfpath++) {
-					ODM_RT_TRACE(p_dm, ODM_COMP_MP, ODM_DBG_LOUD, ("[kfree] phydm_kfree(): channel_to_sw=%d PATH_%d bb_gain:0x%X\n", channel_to_sw, rfpath, p_power_trim_info->bb_gain[channel_idx][rfpath]));
-					phydm_set_kfree_to_rf(p_dm, rfpath, p_power_trim_info->bb_gain[channel_idx][rfpath]);
-				}
-
-			} else if (*p_dm->p_band_type == ODM_BAND_5G && p_power_trim_info->flag & KFREE_FLAG_ON_5G) {
-
-				if (channel_to_sw >= 36 && channel_to_sw <= 48)
-					channel_idx = PHYDM_5GLB1;
-				if (channel_to_sw >= 52 && channel_to_sw <= 64)
-					channel_idx = PHYDM_5GLB2;
-				if (channel_to_sw >= 100 && channel_to_sw <= 120)
-					channel_idx = PHYDM_5GMB1;
-				if (channel_to_sw >= 122 && channel_to_sw <= 144)
-					channel_idx = PHYDM_5GMB2;
-				if (channel_to_sw >= 149 && channel_to_sw <= 177)
-					channel_idx = PHYDM_5GHB;
-
-				for (rfpath = RF_PATH_A;  rfpath < max_rf_path; rfpath++) {
-					ODM_RT_TRACE(p_dm, ODM_COMP_MP, ODM_DBG_LOUD, ("[kfree] phydm_kfree(): channel_to_sw=%d PATH_%d bb_gain:0x%X\n", channel_to_sw, rfpath, p_power_trim_info->bb_gain[channel_idx][rfpath]));
-					phydm_set_kfree_to_rf(p_dm, rfpath, p_power_trim_info->bb_gain[channel_idx][rfpath]);
-				}
-			} else {
-				ODM_RT_TRACE(p_dm, ODM_COMP_MP, ODM_DBG_LOUD, ("[kfree] Set default Register\n"));
-				for (rfpath = RF_PATH_A;  rfpath < max_rf_path; rfpath++)
-					phydm_clear_kfree_to_rf(p_dm, rfpath, p_power_trim_info->bb_gain[channel_idx][rfpath]);
-			}
-		} else {
-			ODM_RT_TRACE(p_dm, ODM_COMP_MP, ODM_DBG_LOUD, ("[kfree] phy_ConfigKFree(): targetval not defined, Don't execute KFree Process.\n"));
+		if (!(pwrtrim->flag & KFREE_FLAG_ON)) {
+			RF_DBG(dm, DBG_RF_MP,
+			       "[kfree] %s: efuse is 0xff, KFree not work\n",
+			       __func__);
 			return;
 		}
+#if 0
+		/*if kfree_table[0] == 0xff, means no Kfree*/
+#endif
+		phydm_do_kfree(dm, channel_to_sw);
 	}
-	ODM_RT_TRACE(p_dm, ODM_COMP_MP, ODM_DBG_LOUD, ("<===[kfree] phy_ConfigKFree()\n"));
+	RF_DBG(dm, DBG_RF_MP, "<===[kfree] phy_ConfigKFree()\n");
 }
diff --git a/rtl8723DS/hal/phydm/halrf/halrf_kfree.h b/rtl8723DS/hal/phydm/halrf/halrf_kfree.h
index f6772e0..d57488a 100755..100644
--- a/rtl8723DS/hal/phydm/halrf/halrf_kfree.h
+++ b/rtl8723DS/hal/phydm/halrf/halrf_kfree.h
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2007 - 2017 Realtek Corporation.
+ * Copyright(c) 2007 - 2017  Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -8,82 +8,93 @@
  *
  * This program is distributed in the hope that it will be useful, but WITHOUT
  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  * more details.
  *
+ * The full GNU General Public License is included in this distribution in the
+ * file called LICENSE.
+ *
+ * Contact Information:
+ * wlanfae <wlanfae@realtek.com>
+ * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
+ * Hsinchu 300, Taiwan.
+ *
+ * Larry Finger <Larry.Finger@lwfinger.net>
+ *
  *****************************************************************************/
 
+#ifndef __HALRF_KFREE_H__
+#define __HALRF_KFREE_H__
 
-#ifndef	__PHYDMKFREE_H__
-#define    __PHYDKFREE_H__
-
-#define KFREE_VERSION	"1.0"
+#define KFREE_VERSION "1.0"
 
-#define	KFREE_BAND_NUM		6
+#define KFREE_BAND_NUM 6
+#define KFREE_CH_NUM 3
 
 #if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_AP))
 
-#define	BB_GAIN_NUM		6
-#define KFREE_FLAG_ON				BIT(0)
-#define KFREE_FLAG_THERMAL_K_ON		BIT(1)
+#define BB_GAIN_NUM 6
 
 #endif
 
-#if (DM_ODM_SUPPORT_TYPE == ODM_CE) && defined(DM_ODM_CE_MAC80211)
-#define KFREE_FLAG_ON				BIT(0)
-#define KFREE_FLAG_THERMAL_K_ON		BIT(1)
-#endif
-
-#define KFREE_FLAG_ON_2G				BIT(2)
-#define KFREE_FLAG_ON_5G				BIT(3)
-
-#define PPG_THERMAL_OFFSET_8821C				0x1EF
-#define PPG_BB_GAIN_2G_TXAB_OFFSET_8821C		0x1EE
-#define PPG_BB_GAIN_5GL1_TXA_OFFSET_8821C		0x1EC
-#define PPG_BB_GAIN_5GL2_TXA_OFFSET_8821C		0x1E8
-#define PPG_BB_GAIN_5GM1_TXA_OFFSET_8821C		0x1E4
-#define PPG_BB_GAIN_5GM2_TXA_OFFSET_8821C		0x1E0
-#define PPG_BB_GAIN_5GH1_TXA_OFFSET_8821C		0x1DC
-
-
-
-#define PPG_THERMAL_OFFSET				0x3EF
-#define PPG_BB_GAIN_2G_TXAB_OFFSET		0x3EE
-#define PPG_BB_GAIN_2G_TXCD_OFFSET		0x3ED
-#define PPG_BB_GAIN_5GL1_TXA_OFFSET		0x3EC
-#define PPG_BB_GAIN_5GL1_TXB_OFFSET		0x3EB
-#define PPG_BB_GAIN_5GL1_TXC_OFFSET		0x3EA
-#define PPG_BB_GAIN_5GL1_TXD_OFFSET		0x3E9
-#define PPG_BB_GAIN_5GL2_TXA_OFFSET		0x3E8
-#define PPG_BB_GAIN_5GL2_TXB_OFFSET		0x3E7
-#define PPG_BB_GAIN_5GL2_TXC_OFFSET		0x3E6
-#define PPG_BB_GAIN_5GL2_TXD_OFFSET		0x3E5
-#define PPG_BB_GAIN_5GM1_TXA_OFFSET		0x3E4
-#define PPG_BB_GAIN_5GM1_TXB_OFFSET		0x3E3
-#define PPG_BB_GAIN_5GM1_TXC_OFFSET		0x3E2
-#define PPG_BB_GAIN_5GM1_TXD_OFFSET		0x3E1
-#define PPG_BB_GAIN_5GM2_TXA_OFFSET		0x3E0
-#define PPG_BB_GAIN_5GM2_TXB_OFFSET		0x3DF
-#define PPG_BB_GAIN_5GM2_TXC_OFFSET		0x3DE
-#define PPG_BB_GAIN_5GM2_TXD_OFFSET		0x3DD
-#define PPG_BB_GAIN_5GH1_TXA_OFFSET		0x3DC
-#define PPG_BB_GAIN_5GH1_TXB_OFFSET		0x3DB
-#define PPG_BB_GAIN_5GH1_TXC_OFFSET		0x3DA
-#define PPG_BB_GAIN_5GH1_TXD_OFFSET		0x3D9
-
-#define PPG_PA_BIAS_2G_TXA_OFFSET		0x3D5
-#define PPG_PA_BIAS_2G_TXB_OFFSET		0x3D6
-
-
+#define KFREE_FLAG_ON BIT(0)
+#define KFREE_FLAG_THERMAL_K_ON BIT(1)
+
+#define KFREE_FLAG_ON_2G BIT(2)
+#define KFREE_FLAG_ON_5G BIT(3)
+
+#define PA_BIAS_FLAG_ON BIT(4)
+
+#define PPG_THERMAL_OFFSET_98F 0x50
+#define PPG_2GM_TXAB_98F 0x51
+#define PPG_2GM_TXCD_98F 0x52
+#define PPG_2GL_TXAB_98F 0x53
+#define PPG_2GL_TXCD_98F 0x54
+#define PPG_5GH_TXAB_98F 0x55
+#define PPG_5GH_TXCD_98F 0x56
+
+#define PPG_THERMAL_OFFSET_21C 0x1EF
+#define PPG_2G_TXAB_21C 0x1EE
+#define PPG_5GL1_TXA_21C 0x1EC
+#define PPG_5GL2_TXA_21C 0x1E8
+#define PPG_5GM1_TXA_21C 0x1E4
+#define PPG_5GM2_TXA_21C 0x1E0
+#define PPG_5GH1_TXA_21C 0x1DC
+
+#define PPG_THERMAL_OFFSET_22B 0x3EF
+#define PPG_2G_TXAB_22B 0x3EE
+#define PPG_2G_TXCD_22B 0x3ED
+#define PPG_5GL1_TXA_22B 0x3EC
+#define PPG_5GL1_TXB_22B 0x3EB
+#define PPG_5GL1_TXC_22B 0x3EA
+#define PPG_5GL1_TXD_22B 0x3E9
+#define PPG_5GL2_TXA_22B 0x3E8
+#define PPG_5GL2_TXB_22B 0x3E7
+#define PPG_5GL2_TXC_22B 0x3E6
+#define PPG_5GL2_TXD_22B 0x3E5
+#define PPG_5GM1_TXA_22B 0x3E4
+#define PPG_5GM1_TXB_22B 0x3E3
+#define PPG_5GM1_TXC_22B 0x3E2
+#define PPG_5GM1_TXD_22B 0x3E1
+#define PPG_5GM2_TXA_22B 0x3E0
+#define PPG_5GM2_TXB_22B 0x3DF
+#define PPG_5GM2_TXC_22B 0x3DE
+#define PPG_5GM2_TXD_22B 0x3DD
+#define PPG_5GH1_TXA_22B 0x3DC
+#define PPG_5GH1_TXB_22B 0x3DB
+#define PPG_5GH1_TXC_22B 0x3DA
+#define PPG_5GH1_TXD_22B 0x3D9
+
+#define PPG_PABIAS_2GA_22B 0x3D5
+#define PPG_PABIAS_2GB_22B 0x3D6
 
 struct odm_power_trim_data {
 	u8 flag;
+	u8 pa_bias_flag;
 	s8 bb_gain[KFREE_BAND_NUM][MAX_RF_PATH];
 	s8 thermal;
 };
 
-
-
 enum phydm_kfree_channeltosw {
 	PHYDM_2G = 0,
 	PHYDM_5GLB1 = 1,
@@ -93,41 +104,16 @@ enum phydm_kfree_channeltosw {
 	PHYDM_5GHB = 5,
 };
 
+void phydm_get_thermal_trim_offset(void *dm_void);
 
+void phydm_get_power_trim_offset(void *dm_void);
 
-void
-phydm_get_thermal_trim_offset(
-	void	*p_dm_void
-);
-
-void
-phydm_get_power_trim_offset(
-	void	*p_dm_void
-);
-
-void
-phydm_get_pa_bias_offset(
-	void	*p_dm_void
-);
+void phydm_get_pa_bias_offset(void *dm_void);
 
-s8
-phydm_get_thermal_offset(
-	void	*p_dm_void
-);
+s8 phydm_get_thermal_offset(void *dm_void);
 
-void
-phydm_clear_kfree_to_rf(
-	void		*p_dm_void,
-	u8		e_rf_path,
-	u8		data
-);
+void phydm_clear_kfree_to_rf(void *dm_void, u8 e_rf_path, u8 data);
 
+void phydm_config_kfree(void *dm_void, u8 channel_to_sw);
 
-void
-phydm_config_kfree(
-	void	*p_dm_void,
-	u8	channel_to_sw
-);
-
-
-#endif
+#endif /*__HALRF_KFREE_H__*/
diff --git a/rtl8723DS/hal/phydm/halrf/halrf_powertracking.c b/rtl8723DS/hal/phydm/halrf/halrf_powertracking.c
index dc43998..eaf53b8 100755..100644
--- a/rtl8723DS/hal/phydm/halrf/halrf_powertracking.c
+++ b/rtl8723DS/hal/phydm/halrf/halrf_powertracking.c
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2007 - 2017 Realtek Corporation.
+ * Copyright(c) 2007 - 2017  Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -8,142 +8,145 @@
  *
  * This program is distributed in the hope that it will be useful, but WITHOUT
  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  * more details.
  *
+ * The full GNU General Public License is included in this distribution in the
+ * file called LICENSE.
+ *
+ * Contact Information:
+ * wlanfae <wlanfae@realtek.com>
+ * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
+ * Hsinchu 300, Taiwan.
+ *
+ * Larry Finger <Larry.Finger@lwfinger.net>
+ *
  *****************************************************************************/
 
-/* ************************************************************
+/*@************************************************************
  * include files
- * ************************************************************ */
+ * ************************************************************
+ */
 #include "mp_precomp.h"
 #include "phydm_precomp.h"
 
-
 boolean
-odm_check_power_status(
-	void		*p_dm_void
-)
+odm_check_power_status(void *dm_void)
 {
 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
-	struct PHY_DM_STRUCT	*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	struct _ADAPTER		*p_adapter = p_dm->adapter;
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	PADAPTER *adapter = dm->adapter;
 
-	RT_RF_POWER_STATE	rt_state;
-	PMGNT_INFO			p_mgnt_info	= &(p_adapter->MgntInfo);
+	RT_RF_POWER_STATE rt_state;
+	MGNT_INFO *mgnt_info = &((PADAPTER)adapter)->MgntInfo;
 
 	/* 2011/07/27 MH We are not testing ready~~!! We may fail to get correct value when init sequence. */
-	if (p_mgnt_info->init_adpt_in_progress == true) {
-		PHYDM_DBG(p_dm, ODM_COMP_INIT, ("check_pow_status Return true, due to initadapter\n"));
-		return	true;
+	if (mgnt_info->init_adpt_in_progress == true) {
+		RF_DBG(dm, DBG_RF_INIT,
+		       "check_pow_status Return true, due to initadapter\n");
+		return true;
 	}
 
-	/*  */
-	/*	2011/07/19 MH We can not execute tx pwoer tracking/ LLC calibrate or IQK. */
-	/*  */
-	p_adapter->HalFunc.GetHwRegHandler(p_adapter, HW_VAR_RF_STATE, (u8 *)(&rt_state));
-	if (p_adapter->bDriverStopped || p_adapter->bDriverIsGoingToPnpSetPowerSleep || rt_state == eRfOff) {
-		PHYDM_DBG(p_dm, ODM_COMP_INIT, ("check_pow_status Return false, due to %d/%d/%d\n",
-			p_adapter->bDriverStopped, p_adapter->bDriverIsGoingToPnpSetPowerSleep, rt_state));
-		return	false;
+	/*
+	 *	2011/07/19 MH We can not execute tx pwoer tracking/ LLC calibrate or IQK.
+	 */
+	((PADAPTER)adapter)->HalFunc.GetHwRegHandler((PADAPTER)adapter, HW_VAR_RF_STATE, (u8 *)(&rt_state));
+	if (((PADAPTER)adapter)->bDriverStopped || ((PADAPTER)adapter)->bDriverIsGoingToPnpSetPowerSleep || rt_state == eRfOff) {
+		RF_DBG(dm, DBG_RF_INIT,
+		       "check_pow_status Return false, due to %d/%d/%d\n",
+		       ((PADAPTER)adapter)->bDriverStopped,
+		       ((PADAPTER)adapter)->bDriverIsGoingToPnpSetPowerSleep,
+		       rt_state);
+		return false;
 	}
 #endif
-	return	true;
-	
+	return true;
 }
 
 #if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_CE))
-void
-halrf_update_pwr_track(
-	void		*p_dm_void,
-	u8		rate
-)
+void halrf_update_pwr_track(void *dm_void, u8 rate)
 {
-	struct PHY_DM_STRUCT		*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
-	u8			path_idx = 0;
+	u8 path_idx = 0;
 #endif
 
-	ODM_RT_TRACE(p_dm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("Pwr Track Get rate=0x%x\n", rate));
+	RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "Pwr Track Get rate=0x%x\n", rate);
 
-	p_dm->tx_rate = rate;
+	dm->tx_rate = rate;
 
 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
 #if DEV_BUS_TYPE == RT_PCI_INTERFACE
 #if USE_WORKITEM
-	odm_schedule_work_item(&p_dm->ra_rpt_workitem);
+	odm_schedule_work_item(&dm->ra_rpt_workitem);
 #else
-	if (p_dm->support_ic_type == ODM_RTL8821) {
+	if (dm->support_ic_type == ODM_RTL8821) {
 #if (RTL8821A_SUPPORT == 1)
-		odm_tx_pwr_track_set_pwr8821a(p_dm, MIX_MODE, RF_PATH_A, 0);
+		odm_tx_pwr_track_set_pwr8821a(dm, MIX_MODE, RF_PATH_A, 0);
 #endif
-	} else if (p_dm->support_ic_type == ODM_RTL8812) {
+	} else if (dm->support_ic_type == ODM_RTL8812) {
 		for (path_idx = RF_PATH_A; path_idx < MAX_PATH_NUM_8812A; path_idx++) {
 #if (RTL8812A_SUPPORT == 1)
-			odm_tx_pwr_track_set_pwr8812a(p_dm, MIX_MODE, path_idx, 0);
+			odm_tx_pwr_track_set_pwr8812a(dm, MIX_MODE, path_idx, 0);
 #endif
 		}
-	} else if (p_dm->support_ic_type == ODM_RTL8723B) {
+	} else if (dm->support_ic_type == ODM_RTL8723B) {
 #if (RTL8723B_SUPPORT == 1)
-		odm_tx_pwr_track_set_pwr_8723b(p_dm, MIX_MODE, RF_PATH_A, 0);
+		odm_tx_pwr_track_set_pwr_8723b(dm, MIX_MODE, RF_PATH_A, 0);
 #endif
-	} else if (p_dm->support_ic_type == ODM_RTL8192E) {
+	} else if (dm->support_ic_type == ODM_RTL8192E) {
 		for (path_idx = RF_PATH_A; path_idx < MAX_PATH_NUM_8192E; path_idx++) {
 #if (RTL8192E_SUPPORT == 1)
-			odm_tx_pwr_track_set_pwr92_e(p_dm, MIX_MODE, path_idx, 0);
+			odm_tx_pwr_track_set_pwr92_e(dm, MIX_MODE, path_idx, 0);
 #endif
 		}
-	} else if (p_dm->support_ic_type == ODM_RTL8188E) {
+	} else if (dm->support_ic_type == ODM_RTL8188E) {
 #if (RTL8188E_SUPPORT == 1)
-		odm_tx_pwr_track_set_pwr88_e(p_dm, MIX_MODE, RF_PATH_A, 0);
+		odm_tx_pwr_track_set_pwr88_e(dm, MIX_MODE, RF_PATH_A, 0);
 #endif
 	}
 #endif
 #else
-	odm_schedule_work_item(&p_dm->ra_rpt_workitem);
+	odm_schedule_work_item(&dm->ra_rpt_workitem);
 #endif
 #endif
-
 }
 
 #endif
 
-
-
 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
-void
-halrf_update_init_rate_work_item_callback(
-	void	*p_context
-)
+void halrf_update_init_rate_work_item_callback(
+	void *context)
 {
-	struct _ADAPTER	*adapter = (struct _ADAPTER *)p_context;
-	HAL_DATA_TYPE	*p_hal_data = GET_HAL_DATA(adapter);
-	struct PHY_DM_STRUCT		*p_dm = &p_hal_data->DM_OutSrc;
-	u8		p = 0;
-
-	if (p_dm->support_ic_type == ODM_RTL8821) {
-		odm_tx_pwr_track_set_pwr8821a(p_dm, MIX_MODE, RF_PATH_A, 0);
-		/**/
-	} else if (p_dm->support_ic_type == ODM_RTL8812) {
-		for (p = RF_PATH_A; p < MAX_PATH_NUM_8812A; p++) {    /*DOn't know how to include &c*/
+	void *adapter = (void *)context;
+	HAL_DATA_TYPE *hal_data = GET_HAL_DATA(((PADAPTER)adapter));
+	struct dm_struct *dm = &hal_data->DM_OutSrc;
+	u8 p = 0;
 
-			odm_tx_pwr_track_set_pwr8812a(p_dm, MIX_MODE, p, 0);
-			/**/
-		}
-	} else if (p_dm->support_ic_type == ODM_RTL8723B) {
-		odm_tx_pwr_track_set_pwr_8723b(p_dm, MIX_MODE, RF_PATH_A, 0);
-		/**/
-	} else if (p_dm->support_ic_type == ODM_RTL8192E) {
-		for (p = RF_PATH_A; p < MAX_PATH_NUM_8192E; p++) {   /*DOn't know how to include &c*/
-			odm_tx_pwr_track_set_pwr92_e(p_dm, MIX_MODE, p, 0);
-			/**/
-		}
-	} else if (p_dm->support_ic_type == ODM_RTL8188E) {
-		odm_tx_pwr_track_set_pwr88_e(p_dm, MIX_MODE, RF_PATH_A, 0);
-		/**/
+	if (dm->support_ic_type == ODM_RTL8821) {
+#if (RTL8821A_SUPPORT == 1)
+		odm_tx_pwr_track_set_pwr8821a(dm, MIX_MODE, RF_PATH_A, 0);
+#endif
+	} else if (dm->support_ic_type == ODM_RTL8812) {
+#if (RTL8812A_SUPPORT == 1)
+		/*Don't know how to include &c*/
+		for (p = RF_PATH_A; p < MAX_PATH_NUM_8812A; p++)
+			odm_tx_pwr_track_set_pwr8812a(dm, MIX_MODE, p, 0);
+#endif
+	} else if (dm->support_ic_type == ODM_RTL8723B) {
+#if (RTL8723B_SUPPORT == 1)
+		odm_tx_pwr_track_set_pwr_8723b(dm, MIX_MODE, RF_PATH_A, 0);
+#endif
+	} else if (dm->support_ic_type == ODM_RTL8192E) {
+#if (RTL8192E_SUPPORT == 1)
+		/*Don't know how to include &c*/
+		for (p = RF_PATH_A; p < MAX_PATH_NUM_8192E; p++)
+			odm_tx_pwr_track_set_pwr92_e(dm, MIX_MODE, p, 0);
+#endif
+	} else if (dm->support_ic_type == ODM_RTL8188E) {
+#if (RTL8188E_SUPPORT == 1)
+		odm_tx_pwr_track_set_pwr88_e(dm, MIX_MODE, RF_PATH_A, 0);
+#endif
 	}
 }
 #endif
-
-
-
diff --git a/rtl8723DS/hal/phydm/halrf/halrf_powertracking.h b/rtl8723DS/hal/phydm/halrf/halrf_powertracking.h
index 05abae3..c456288 100755..100644
--- a/rtl8723DS/hal/phydm/halrf/halrf_powertracking.h
+++ b/rtl8723DS/hal/phydm/halrf/halrf_powertracking.h
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2007 - 2017 Realtek Corporation.
+ * Copyright(c) 2007 - 2017  Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -8,34 +8,34 @@
  *
  * This program is distributed in the hope that it will be useful, but WITHOUT
  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  * more details.
  *
+ * The full GNU General Public License is included in this distribution in the
+ * file called LICENSE.
+ *
+ * Contact Information:
+ * wlanfae <wlanfae@realtek.com>
+ * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
+ * Hsinchu 300, Taiwan.
+ *
+ * Larry Finger <Larry.Finger@lwfinger.net>
+ *
  *****************************************************************************/
 
-#ifndef	__HALRF_POWER_TRACKING_H__
-#define    __HALRF_POWER_TRACKING_H__
-
-#define HALRF_POWRTRACKING_ALL_VER	"1.0"
+#ifndef __HALRF_POWER_TRACKING_H__
+#define __HALRF_POWER_TRACKING_H__
 
 boolean
-odm_check_power_status(
-	void		*p_dm_void
-);
+odm_check_power_status(void *dm_void);
 
 #if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_CE))
-void
-halrf_update_pwr_track(
-	void		*p_dm_void,
-	u8		rate
-);
+void halrf_update_pwr_track(void *dm_void, u8 rate);
 #endif
 
 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
-void
-halrf_update_init_rate_work_item_callback(
-	void	*p_context
-);
+void halrf_update_init_rate_work_item_callback(
+	void *context);
 #endif
 
-#endif
+#endif /*#ifndef __HALRF_POWERTRACKING_H__*/
diff --git a/rtl8723DS/hal/phydm/halrf/halrf_powertracking_ap.c b/rtl8723DS/hal/phydm/halrf/halrf_powertracking_ap.c
index 7319c40..cafd92f 100755..100644
--- a/rtl8723DS/hal/phydm/halrf/halrf_powertracking_ap.c
+++ b/rtl8723DS/hal/phydm/halrf/halrf_powertracking_ap.c
@@ -338,6 +338,50 @@ u8 cck_swing_table_ch14_88f[CCK_TABLE_SIZE_88F][16] = {
 	{0xD8, 0xD1, 0xBD, 0x7D, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}     /*-6dB*/
 };
 
+/* Winnita ADD 20171113 PathA 0xAB4[10:0],PathB 0xAB4[21:11]*/
+u32 cck_swing_table_ch1_ch14_8192f[CCK_TABLE_SIZE_8192F] = {
+	0x0CD,			 /*0 ,    -20dB*/
+	0x0D9,
+	0x0E6,
+	0x0F3,
+	0x102,
+	0x111,
+	0x121,
+	0x132,
+	0x144,
+	0x158,
+	0x16C,
+	0x182,
+	0x198,
+	0x1B1,
+	0x1CA,
+	0x1E5,
+	0x202,
+	0x221,
+	0x241,
+	0x263,		/*19*/
+	0x287,		/*20*/
+	0x2AE,		/*21*/
+	0x2D6,		/*22*/
+	0x301,		/*23*/
+	0x32F,		/*24*/
+	0x35F,		/*25*/
+	0x392,		/*26*/
+	0x3C9,		/*27*/
+	0x402,		/*28*/
+	0x43F,		/*29*/
+	0x47F,		/*30*/
+	0x4C3,		/*31*/
+	0x50C,		/*32*/
+	0x558,		/*33*/
+	0x5A9,		/*34*/
+	0x5FF,		/*35*/
+	0x65A,		/*36*/
+	0x6BA,
+	0x720,
+	0x78C,
+	0x7FF,
+};
 
 
 #if 0
@@ -692,7 +736,9 @@ u8 cck_swing_table_ch14_92e[CCK_TABLE_SIZE_92E][8] = {
 };
 #endif
 
-#if (RTL8814A_SUPPORT == 1 || RTL8822B_SUPPORT == 1 || RTL8821C_SUPPORT == 1)
+#if (RTL8814A_SUPPORT == 1 || RTL8822B_SUPPORT == 1 ||\
+	RTL8821C_SUPPORT == 1 || RTL8198F_SUPPORT == 1 ||\
+	RTL8814B_SUPPORT == 1)
 u32 tx_scaling_table_jaguar[TXSCALE_TABLE_SIZE] = {
 	0x081, /* 0,  -12.0dB */
 	0x088, /* 1,  -11.5dB */
@@ -876,35 +922,44 @@ u32 cck_swing_table_ch1_ch14_8710b[CCK_TABLE_SIZE_8710B] = {
 
 void
 odm_txpowertracking_init(
-	void		*p_dm_void
+	void		*dm_void
 )
 {
-	struct PHY_DM_STRUCT		*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
+	struct dm_struct		*dm = (struct dm_struct *)dm_void;
 #if (DM_ODM_SUPPORT_TYPE & (ODM_AP))
-	if (!(p_dm->support_ic_type & (ODM_RTL8814A | ODM_RTL8822B | ODM_IC_11N_SERIES)))
+	if (!(dm->support_ic_type & (ODM_RTL8814A | ODM_RTL8822B | ODM_IC_11N_SERIES)))
 		return;
 #endif
 
-	odm_txpowertracking_thermal_meter_init(p_dm);
+	odm_txpowertracking_thermal_meter_init(dm);
 }
 
 
 u8
 get_swing_index(
-	void		*p_dm_void
+	void		*dm_void
 )
 {
-	struct PHY_DM_STRUCT		*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
+	struct dm_struct		*dm = (struct dm_struct *)dm_void;
 	u8			i = 0, bb_swing_mask = 0;
 	u32			bb_swing = 0;
 	u32			swing_table_size = 0;
-	u32			*p_swing_table = 0;
-	struct rtl8192cd_priv	*priv = p_dm->priv;
+	u32			*swing_table = 0;
+	struct rtl8192cd_priv	*priv = dm->priv;
 
 #if (RTL8197F_SUPPORT == 1)
 	if (GET_CHIP_VER(priv) == VERSION_8197F) {
 		bb_swing = phy_query_bb_reg(priv, REG_OFDM_0_XA_TX_IQ_IMBALANCE, MASKOFDM_D);
-		p_swing_table = ofdm_swing_table_new;
+		swing_table = ofdm_swing_table_new;
+		swing_table_size = OFDM_TABLE_SIZE_92D;
+		bb_swing_mask = 22;
+	}
+#endif
+
+#if (RTL8192F_SUPPORT == 1)
+	if (GET_CHIP_VER(priv) == VERSION_8192F) {
+		bb_swing = phy_query_bb_reg(priv, REG_OFDM_0_XA_TX_IQ_IMBALANCE, MASKOFDM_D);
+		swing_table = ofdm_swing_table_new;
 		swing_table_size = OFDM_TABLE_SIZE_92D;
 		bb_swing_mask = 22;
 	}
@@ -913,20 +968,20 @@ get_swing_index(
 #if (RTL8822B_SUPPORT == 1)
 	if (GET_CHIP_VER(priv) == VERSION_8822B) {
 		bb_swing = phy_query_bb_reg(priv, REG_A_TX_SCALE_JAGUAR, 0xFFE00000);
-		p_swing_table = tx_scaling_table_jaguar;
+		swing_table = tx_scaling_table_jaguar;
 		swing_table_size = TXSCALE_TABLE_SIZE;
 		bb_swing_mask = 0;
 	}
 #endif
 
 	for (i = 0; i < swing_table_size - 1; i++) {
-		u32 table_value = p_swing_table[i] >> bb_swing_mask;
+		u32 table_value = swing_table[i] >> bb_swing_mask;
 
 		if (bb_swing == table_value)
 			break;
 	}
 
-	ODM_RT_TRACE(p_dm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("bb_swing=0x%x bbswing_index=%d\n", bb_swing, i));
+	RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "bb_swing=0x%x bbswing_index=%d\n", bb_swing, i);
 
 
 	return i;
@@ -935,59 +990,56 @@ get_swing_index(
 
 void
 odm_txpowertracking_thermal_meter_init(
-	void		*p_dm_void
+	void		*dm_void
 )
 {
-	struct PHY_DM_STRUCT		*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	struct odm_rf_calibration_structure	*p_rf_calibrate_info = &(p_dm->rf_calibrate_info);
-	struct rtl8192cd_priv		*priv = p_dm->priv;
+	struct dm_struct		*dm = (struct dm_struct *)dm_void;
+	struct dm_rf_calibration_struct	*cali_info = &(dm->rf_calibrate_info);
+	struct rtl8192cd_priv		*priv = dm->priv;
 	u8 p;
 	u8 default_swing_index;
-#if (RTL8197F_SUPPORT == 1 || RTL8822B_SUPPORT == 1)
-	if ((GET_CHIP_VER(priv) == VERSION_8197F) || (GET_CHIP_VER(priv) == VERSION_8822B))
-		default_swing_index = get_swing_index(p_dm);
+#if (RTL8197F_SUPPORT == 1 || RTL8822B_SUPPORT == 1 || RTL8192F_SUPPORT == 1)
+	if ((GET_CHIP_VER(priv) == VERSION_8197F) || (GET_CHIP_VER(priv) == VERSION_8822B) ||(GET_CHIP_VER(priv) == VERSION_8192F))
+		default_swing_index = get_swing_index(dm);
 #endif
 
 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
-	struct _ADAPTER		*adapter = p_dm->adapter;
-	PMGNT_INFO	p_mgnt_info = &adapter->MgntInfo;
-	HAL_DATA_TYPE		*p_hal_data = GET_HAL_DATA(adapter);
+	void		*adapter = dm->adapter;
+	PMGNT_INFO	mgnt_info = &adapter->MgntInfo;
+	HAL_DATA_TYPE		*hal_data = GET_HAL_DATA(((PADAPTER)adapter));
 
-	p_mgnt_info->is_txpowertracking = true;
-	p_hal_data->tx_powercount       = 0;
-	p_hal_data->is_txpowertracking_init = false;
+	mgnt_info->is_txpowertracking = true;
+	hal_data->tx_powercount       = 0;
+	hal_data->is_txpowertracking_init = false;
 
-	if (*(p_dm->p_mp_mode) == false)
-		p_hal_data->txpowertrack_control = true;
-	ODM_RT_TRACE(p_dm, COMP_POWER_TRACKING, DBG_LOUD, ("p_mgnt_info->is_txpowertracking = %d\n", p_mgnt_info->is_txpowertracking));
+	if (*(dm->mp_mode) == false)
+		hal_data->txpowertrack_control = true;
+	RF_DBG(dm, COMP_POWER_TRACKING, "mgnt_info->is_txpowertracking = %d\n", mgnt_info->is_txpowertracking);
 #elif (DM_ODM_SUPPORT_TYPE == ODM_CE)
 #ifdef CONFIG_RTL8188E
 	{
-		p_dm->rf_calibrate_info.is_txpowertracking = true;
-		p_dm->rf_calibrate_info.tx_powercount = 0;
-		p_dm->rf_calibrate_info.is_txpowertracking_init = false;
+		dm->rf_calibrate_info.is_txpowertracking = true;
+		dm->rf_calibrate_info.tx_powercount = 0;
+		dm->rf_calibrate_info.is_txpowertracking_init = false;
 
-		if (*(p_dm->p_mp_mode) == false)
-			p_dm->rf_calibrate_info.txpowertrack_control = true;
+		if (*(dm->mp_mode) == false)
+			dm->rf_calibrate_info.txpowertrack_control = true;
 
-		MSG_8192C("p_dm txpowertrack_control = %d\n", p_dm->rf_calibrate_info.txpowertrack_control);
+		MSG_8192C("dm txpowertrack_control = %d\n", dm->rf_calibrate_info.txpowertrack_control);
 	}
 #else
 	{
-		struct _ADAPTER		*adapter = p_dm->adapter;
-		HAL_DATA_TYPE	*p_hal_data = GET_HAL_DATA(adapter);
-		struct dm_priv	*pdmpriv = &p_hal_data->dmpriv;
-
-		/* if(IS_HARDWARE_TYPE_8192C(p_hal_data)) */
-		{
-			pdmpriv->is_txpowertracking = true;
-			pdmpriv->tx_powercount = 0;
-			pdmpriv->is_txpowertracking_init = false;
+		void		*adapter = dm->adapter;
+		HAL_DATA_TYPE	*hal_data = GET_HAL_DATA(((PADAPTER)adapter));
+		struct dm_priv	*pdmpriv = &hal_data->dmpriv;
+		
+		pdmpriv->is_txpowertracking = true;
+		pdmpriv->tx_powercount = 0;
+		pdmpriv->is_txpowertracking_init = false;
 
-			if (*(p_dm->p_mp_mode) == false)		/* for mp driver, turn off txpwrtracking as default */
-				pdmpriv->txpowertrack_control = true;
+		if (*(dm->mp_mode) == false)		/* for mp driver, turn off txpwrtracking as default */
+			pdmpriv->txpowertrack_control = true;
 
-		}
 		MSG_8192C("pdmpriv->txpowertrack_control = %d\n", pdmpriv->txpowertrack_control);
 
 	}
@@ -996,73 +1048,80 @@ odm_txpowertracking_thermal_meter_init(
 
 #ifdef RTL8188E_SUPPORT
 	{
-		p_dm->rf_calibrate_info.is_txpowertracking = true;
-		p_dm->rf_calibrate_info.tx_powercount = 0;
-		p_dm->rf_calibrate_info.is_txpowertracking_init = false;
-		p_dm->rf_calibrate_info.txpowertrack_control = true;
-		p_dm->rf_calibrate_info.tm_trigger = 0;
+		dm->rf_calibrate_info.is_txpowertracking = true;
+		dm->rf_calibrate_info.tx_powercount = 0;
+		dm->rf_calibrate_info.is_txpowertracking_init = false;
+		dm->rf_calibrate_info.txpowertrack_control = true;
+		dm->rf_calibrate_info.tm_trigger = 0;
 	}
 #endif
 #endif
 
-	p_dm->rf_calibrate_info.txpowertrack_control = true;
-	p_dm->rf_calibrate_info.delta_power_index = 0;
-	p_dm->rf_calibrate_info.delta_power_index_last = 0;
-	p_dm->rf_calibrate_info.power_index_offset = 0;
-	p_dm->rf_calibrate_info.thermal_value = 0;
-	p_rf_calibrate_info->default_ofdm_index = 28;
+	dm->rf_calibrate_info.txpowertrack_control = true;
+	dm->rf_calibrate_info.delta_power_index = 0;
+	dm->rf_calibrate_info.delta_power_index_last = 0;
+	dm->rf_calibrate_info.power_index_offset = 0;
+	dm->rf_calibrate_info.thermal_value = 0;
+	cali_info->default_ofdm_index = 28;
 
 #if (RTL8197F_SUPPORT == 1)
 	if (GET_CHIP_VER(priv) == VERSION_8197F) {
-		p_rf_calibrate_info->default_ofdm_index = (default_swing_index >= (OFDM_TABLE_SIZE_92D - 1)) ? 30 : default_swing_index;
-		p_rf_calibrate_info->default_cck_index = 28;
+		cali_info->default_ofdm_index = (default_swing_index >= (OFDM_TABLE_SIZE_92D - 1)) ? 30 : default_swing_index;
+		cali_info->default_cck_index = 28;
+	}
+#endif
+
+#if (RTL8192F_SUPPORT == 1)
+	if (GET_CHIP_VER(priv) == VERSION_8192F) {
+		cali_info->default_ofdm_index = 30;
+		cali_info->default_cck_index = 28;
 	}
 #endif
 
 #if (RTL8822B_SUPPORT == 1)
 	if (GET_CHIP_VER(priv) == VERSION_8822B) {
-		p_rf_calibrate_info->default_ofdm_index = (default_swing_index >= (TXSCALE_TABLE_SIZE - 1)) ? 24 : default_swing_index;
-		p_rf_calibrate_info->default_cck_index = 20;
+		cali_info->default_ofdm_index = (default_swing_index >= (TXSCALE_TABLE_SIZE - 1)) ? 24 : default_swing_index;
+		cali_info->default_cck_index = 20;
 	}
 #endif
 
 
 #if RTL8188E_SUPPORT
-	p_rf_calibrate_info->default_cck_index = 20;	/* -6 dB */
+	cali_info->default_cck_index = 20;	/* -6 dB */
 #elif RTL8192E_SUPPORT
-	p_rf_calibrate_info->default_cck_index = 8;	/* -12 dB */
+	cali_info->default_cck_index = 8;	/* -12 dB */
 #endif
-	p_rf_calibrate_info->bb_swing_idx_ofdm_base = p_rf_calibrate_info->default_ofdm_index;
-	p_rf_calibrate_info->bb_swing_idx_cck_base = p_rf_calibrate_info->default_cck_index;
-	p_dm->rf_calibrate_info.CCK_index = p_rf_calibrate_info->default_cck_index;
+	cali_info->bb_swing_idx_ofdm_base = cali_info->default_ofdm_index;
+	cali_info->bb_swing_idx_cck_base = cali_info->default_cck_index;
+	dm->rf_calibrate_info.CCK_index = cali_info->default_cck_index;
 
 	for (p = 0; p < MAX_RF_PATH; p++) {
-		p_dm->rf_calibrate_info.OFDM_index[p] = p_rf_calibrate_info->default_ofdm_index;
-		p_rf_calibrate_info->bb_swing_idx_ofdm[p] = p_rf_calibrate_info->default_ofdm_index;
-		p_rf_calibrate_info->kfree_offset[p] = 0;	/* for 8814 kfree*/
+		dm->rf_calibrate_info.OFDM_index[p] = cali_info->default_ofdm_index;
+		cali_info->bb_swing_idx_ofdm[p] = cali_info->default_ofdm_index;
+		cali_info->kfree_offset[p] = 0;	/* for 8814 kfree*/
 	}
-	p_rf_calibrate_info->bb_swing_idx_cck = p_rf_calibrate_info->default_cck_index;
-
-	ODM_RT_TRACE(p_dm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("p_rf_calibrate_info->default_ofdm_index=%d p_rf_calibrate_info->default_cck_index=%d\n", p_rf_calibrate_info->default_ofdm_index, p_rf_calibrate_info->default_cck_index));
+	cali_info->bb_swing_idx_cck = cali_info->default_cck_index;
 
+	RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "cali_info->default_ofdm_index=%d cali_info->default_cck_index=%d\n", cali_info->default_ofdm_index, cali_info->default_cck_index);
 
+	cali_info->tm_trigger = 0;
 }
 
 
 void
 odm_txpowertracking_check(
-	void		*p_dm_void
+	void		*dm_void
 )
 {
 	/*  */
 	/* For AP/ADSL use struct rtl8192cd_priv* */
-	/* For CE/NIC use struct _ADAPTER* */
+	/* For CE/NIC use struct void* */
 	/*  */
-	struct PHY_DM_STRUCT		*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	struct _hal_rf_				*p_rf = &(p_dm->rf_table);
+	struct dm_struct		*dm = (struct dm_struct *)dm_void;
+	struct _hal_rf_				*rf = &(dm->rf_table);
 
 
-	if (!(p_rf->rf_supportability & HAL_RF_TX_PWR_TRACK))
+	if (!(rf->rf_supportability & HAL_RF_TX_PWR_TRACK))
 		return;
 
 	/*  */
@@ -1070,17 +1129,17 @@ odm_txpowertracking_check(
 	/* at the same time. In the stage2/3, we need to prive universal interface and merge all */
 	/* HW dynamic mechanism. */
 	/*  */
-	switch	(p_dm->support_platform) {
+	switch	(dm->support_platform) {
 	case	ODM_WIN:
-		odm_txpowertracking_check_mp(p_dm);
+		odm_txpowertracking_check_mp(dm);
 		break;
 
 	case	ODM_CE:
-		odm_txpowertracking_check_ce(p_dm);
+		odm_txpowertracking_check_ce(dm);
 		break;
 
 	case	ODM_AP:
-		odm_txpowertracking_check_ap(p_dm);
+		odm_txpowertracking_check_ap(dm);
 		break;
 	}
 
@@ -1088,33 +1147,33 @@ odm_txpowertracking_check(
 
 void
 odm_txpowertracking_check_ce(
-	void		*p_dm_void
+	void		*dm_void
 )
 {
 #if (DM_ODM_SUPPORT_TYPE == ODM_CE)
-	struct PHY_DM_STRUCT		*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	struct _ADAPTER	*adapter = p_dm->adapter;
-	struct _hal_rf_				*p_rf = &(p_dm->rf_table);
+	struct dm_struct		*dm = (struct dm_struct *)dm_void;
+	void	*adapter = dm->adapter;
+	struct _hal_rf_				*rf = &(dm->rf_table);
 
 #if (RTL8188E_SUPPORT == 1)
 
-	/* if(!p_mgnt_info->is_txpowertracking || (!pdmpriv->txpowertrack_control && pdmpriv->is_ap_kdone)) */
+	/* if(!mgnt_info->is_txpowertracking || (!pdmpriv->txpowertrack_control && pdmpriv->is_ap_kdone)) */
 
-	if (!(p_rf->rf_supportability & HAL_RF_TX_PWR_TRACK))
+	if (!(rf->rf_supportability & HAL_RF_TX_PWR_TRACK))
 		return;
 
-	if (!p_dm->rf_calibrate_info.tm_trigger) {	/* at least delay 1 sec */
-		/* p_hal_data->TxPowerCheckCnt++;	 */ /* cosa add for debug */
-		odm_set_rf_reg(p_dm, RF_PATH_A, RF_T_METER, RFREGOFFSETMASK, 0x60);
+	if (!dm->rf_calibrate_info.tm_trigger) {	/* at least delay 1 sec */
+		/* hal_data->TxPowerCheckCnt++;	 */ /* cosa add for debug */
+		odm_set_rf_reg(dm, RF_PATH_A, RF_T_METER, RFREGOFFSETMASK, 0x60);
 		/* DBG_8192C("Trigger 92C Thermal Meter!!\n"); */
 
-		p_dm->rf_calibrate_info.tm_trigger = 1;
+		dm->rf_calibrate_info.tm_trigger = 1;
 		return;
 
 	} else {
 		/* DBG_8192C("Schedule TxPowerTracking direct call!!\n"); */
 		odm_txpowertracking_callback_thermal_meter_8188e(adapter);
-		p_dm->rf_calibrate_info.tm_trigger = 0;
+		dm->rf_calibrate_info.tm_trigger = 0;
 	}
 #endif
 
@@ -1123,12 +1182,12 @@ odm_txpowertracking_check_ce(
 
 void
 odm_txpowertracking_check_mp(
-	void		*p_dm_void
+	void		*dm_void
 )
 {
 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
-	struct PHY_DM_STRUCT		*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	struct _ADAPTER	*adapter = p_dm->adapter;
+	struct dm_struct		*dm = (struct dm_struct *)dm_void;
+	void	*adapter = dm->adapter;
 
 	if (odm_check_power_status(adapter) == false)
 		return;
@@ -1142,16 +1201,16 @@ odm_txpowertracking_check_mp(
 
 void
 odm_txpowertracking_check_ap(
-	void		*p_dm_void
+	void		*dm_void
 )
 {
-	struct PHY_DM_STRUCT		*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
+	struct dm_struct		*dm = (struct dm_struct *)dm_void;
 #if (DM_ODM_SUPPORT_TYPE == ODM_AP)
-	struct rtl8192cd_priv	*priv		= p_dm->priv;
+	struct rtl8192cd_priv	*priv		= dm->priv;
 
-#if ((RTL8188E_SUPPORT == 1) || (RTL8192E_SUPPORT == 1) || (RTL8812A_SUPPORT == 1) || (RTL8881A_SUPPORT == 1) || (RTL8814A_SUPPORT == 1) || (RTL8197F_SUPPORT == 1))
-	if (p_dm->support_ic_type & (ODM_RTL8188E | ODM_RTL8192E | ODM_RTL8812 | ODM_RTL8881A | ODM_RTL8814A | ODM_RTL8197F | ODM_RTL8822B | ODM_RTL8821C))
-		odm_txpowertracking_callback_thermal_meter(p_dm);
+#if ((RTL8188E_SUPPORT == 1) || (RTL8192E_SUPPORT == 1) || (RTL8812A_SUPPORT == 1) || (RTL8881A_SUPPORT == 1) || (RTL8814A_SUPPORT == 1) || (RTL8197F_SUPPORT == 1) || (RTL8192F_SUPPORT == 1) || (RTL8198F_SUPPORT == 1))
+	if (dm->support_ic_type & (ODM_RTL8188E | ODM_RTL8192E | ODM_RTL8812 | ODM_RTL8881A | ODM_RTL8814A | ODM_RTL8197F | ODM_RTL8822B | ODM_RTL8821C | ODM_RTL8192F | ODM_RTL8198F))
+		odm_txpowertracking_callback_thermal_meter(dm);
 	else
 #endif
 	{
diff --git a/rtl8723DS/hal/phydm/halrf/halrf_powertracking_ap.h b/rtl8723DS/hal/phydm/halrf/halrf_powertracking_ap.h
index 20d504b..1f960cf 100755..100644
--- a/rtl8723DS/hal/phydm/halrf/halrf_powertracking_ap.h
+++ b/rtl8723DS/hal/phydm/halrf/halrf_powertracking_ap.h
@@ -13,10 +13,8 @@
  *
  *****************************************************************************/
 
-#ifndef	__PHYDMPOWERTRACKING_H__
-#define    __PHYDMPOWERTRACKING_H__
-
-#define HALRF_POWRTRACKING_VER	"1.1"
+#ifndef __HALRF_POWERTRACKING_H__
+#define __HALRF_POWERTRACKING_H__
 
 #if (DM_ODM_SUPPORT_TYPE == ODM_AP)
 	#ifdef RTK_AC_SUPPORT
@@ -45,9 +43,10 @@
 
 #define IQK_BB_REG_NUM		9
 
-#define HP_THERMAL_NUM		8
-
 #define AVG_THERMAL_NUM		8
+#define AVG_THERMAL_NUM_DPK		8
+#define THERMAL_DPK_AVG_NUM		4
+
 #define iqk_matrix_reg_num	8
 /* #define IQK_MATRIX_SETTINGS_NUM	1+24+21 */
 #define IQK_MATRIX_SETTINGS_NUM	(14+24+21) /* Channels_2_4G_NUM + Channels_5G_20M_NUM + Channels_5G */
@@ -57,6 +56,7 @@
 	#define	OFDM_TABLE_SIZE	37
 	#define	CCK_TABLE_SIZE		33
 	#define	CCK_TABLE_SIZE_88F	21
+	#define	CCK_TABLE_SIZE_8192F	41
 
 
 
@@ -73,6 +73,7 @@
 	extern	u8 cck_swing_table_ch1_ch14_88f[CCK_TABLE_SIZE_88F][16];
 	extern	u8 cck_swing_table_ch1_ch13_88f[CCK_TABLE_SIZE_88F][16];
 	extern	u8 cck_swing_table_ch14_88f[CCK_TABLE_SIZE_88F][16];
+	extern	u32 cck_swing_table_ch1_ch14_8192f[CCK_TABLE_SIZE_8192F];
 
 #endif
 
@@ -100,7 +101,9 @@ static u8 delta_swing_table_idx_2ga_n_8188e[] = {0, 0, 0, 2, 2, 3, 3, 4, 4, 4, 4
 #define	OFDM_TABLE_SIZE_8812	43
 #define	AVG_THERMAL_NUM_8812	4
 
-#if (RTL8814A_SUPPORT == 1 || RTL8822B_SUPPORT == 1 || RTL8821C_SUPPORT == 1)
+#if (RTL8814A_SUPPORT == 1 || RTL8822B_SUPPORT == 1 ||\
+	RTL8821C_SUPPORT == 1 || RTL8198F_SUPPORT == 1 ||\
+	RTL8814B_SUPPORT == 1)
 	extern u32 tx_scaling_table_jaguar[TXSCALE_TABLE_SIZE];
 	#elif(ODM_IC_11AC_SERIES_SUPPORT)
 	extern unsigned int ofdm_swing_table_8812[OFDM_TABLE_SIZE_8812];
@@ -112,12 +115,12 @@ extern u32 cck_swing_table_ch1_ch14_8710b[CCK_TABLE_SIZE_8710B];
 
 #define dm_check_txpowertracking	odm_txpowertracking_check
 
-struct _IQK_MATRIX_REGS_SETTING {
+struct iqk_matrix_regs_setting {
 	boolean	is_iqk_done;
 	s32		value[1][iqk_matrix_reg_num];
 };
 
-struct odm_rf_calibration_structure {
+struct dm_rf_calibration_struct {
 	/* for tx power tracking */
 
 	u32	rega24; /* for TempCCK */
@@ -139,7 +142,7 @@ struct odm_rf_calibration_structure {
 	u8	thermal_value_lck;
 	u8	thermal_value_iqk;
 	s8  	thermal_value_delta; /* delta of thermal_value and efuse thermal */
-	u8	thermal_value_dpk;
+
 	u8	thermal_value_avg[AVG_THERMAL_NUM];
 	u8	thermal_value_avg_index;
 	u8	thermal_value_rx_gain;
@@ -147,7 +150,7 @@ struct odm_rf_calibration_structure {
 	u8	thermal_value_dpk_store;
 	u8	thermal_value_dpk_track;
 	boolean	txpowertracking_in_progress;
-	boolean	is_dpk_enable;
+
 
 	boolean	is_reloadtxpowerindex;
 	u8	is_rf_pi_enable;
@@ -161,9 +164,7 @@ struct odm_rf_calibration_structure {
 	s8	delta_power_index_last;
 	boolean is_tx_power_changed;
 
-	u8	thermal_value_hp[HP_THERMAL_NUM];
-	u8	thermal_value_hp_index;
-	struct _IQK_MATRIX_REGS_SETTING iqk_matrix_reg_setting[IQK_MATRIX_SETTINGS_NUM];
+	struct iqk_matrix_regs_setting iqk_matrix_reg_setting[IQK_MATRIX_SETTINGS_NUM];
 	u8	delta_lck;
 	u8  delta_swing_table_idx_2g_cck_a_p[DELTA_SWINGIDX_SIZE];
 	u8  delta_swing_table_idx_2g_cck_a_n[DELTA_SWINGIDX_SIZE];
@@ -201,6 +202,8 @@ struct odm_rf_calibration_structure {
 	u8  delta_swing_tssi_table_5gb[BAND_NUM][DELTA_SWINTSSI_SIZE];
 	u8  delta_swing_tssi_table_5gc[BAND_NUM][DELTA_SWINTSSI_SIZE];
 	u8  delta_swing_tssi_table_5gd[BAND_NUM][DELTA_SWINTSSI_SIZE];
+	s8  delta_swing_table_xtal_p[DELTA_SWINGIDX_SIZE];
+	s8  delta_swing_table_xtal_n[DELTA_SWINGIDX_SIZE];
 	u8  delta_swing_table_idx_2ga_p_8188e[DELTA_SWINGIDX_SIZE];
 	u8  delta_swing_table_idx_2ga_n_8188e[DELTA_SWINGIDX_SIZE];
 
@@ -229,6 +232,7 @@ struct odm_rf_calibration_structure {
 	boolean			modify_tx_agc_flag_path_c;
 	boolean			modify_tx_agc_flag_path_d;
 	boolean			modify_tx_agc_flag_path_a_cck;
+	boolean			modify_tx_agc_flag_path_b_cck;
 
 	s8			kfree_offset[MAX_RF_PATH];
 
@@ -275,8 +279,51 @@ struct odm_rf_calibration_structure {
 	u8	is_ap_kdone;
 	u8	is_apk_thermal_meter_ignore;
 	u8	is_dp_done;
+#if 0 /*move below members to halrf_dpk.h*/
 	u8	is_dp_path_aok;
 	u8	is_dp_path_bok;
+	u8	is_dp_path_cok;
+	u8	is_dp_path_dok;
+	u8 	dp_path_a_result[3];
+	u8 	dp_path_b_result[3];
+	u8 	dp_path_c_result[3];
+	u8 	dp_path_d_result[3];
+	boolean	is_dpk_enable;
+	u32	txrate[11];
+	u8 	pwsf_2g_a[3];
+	u8 	pwsf_2g_b[3];
+	u8 	pwsf_2g_c[3];
+	u8 	pwsf_2g_d[3];
+	u32	lut_2g_even_a[3][64];
+	u32	lut_2g_odd_a[3][64];
+	u32	lut_2g_even_b[3][64];
+	u32	lut_2g_odd_b[3][64];
+	u32	lut_2g_even_c[3][64];
+	u32	lut_2g_odd_c[3][64];
+	u32	lut_2g_even_d[3][64];
+	u32	lut_2g_odd_d[3][64];
+	u1Byte 	is_5g_pdk_a_ok;
+	u1Byte 	is_5g_pdk_b_ok;
+	u1Byte 	is_5g_pdk_c_ok;
+	u1Byte 	is_5g_pdk_d_ok;
+	u1Byte 	pwsf_5g_a[9];
+	u1Byte 	pwsf_5g_b[9];
+	u1Byte 	pwsf_5g_c[9];
+	u1Byte 	pwsf_5g_d[9];
+	u4Byte	lut_5g_even_a[9][16];
+	u4Byte	lut_5g_odd_a[9][16];
+	u4Byte	lut_5g_even_b[9][16];
+	u4Byte	lut_5g_odd_b[9][16];
+	u4Byte	lut_5g_even_c[9][16];
+	u4Byte	lut_5g_odd_c[9][16];
+	u4Byte	lut_5g_even_d[9][16];
+	u4Byte	lut_5g_odd_d[9][16];
+	u8	thermal_value_dpk;
+	u8	thermal_value_dpk_avg[AVG_THERMAL_NUM_DPK];
+	u8	thermal_value_dpk_avg_index;
+#endif
+	s8  modify_tx_agc_value_ofdm;
+	s8  modify_tx_agc_value_cck;
 
 	/*Add by Yuchen for Kfree Phydm*/
 	u8			reg_rf_kfree_enable;	/*for registry*/
@@ -286,34 +333,34 @@ struct odm_rf_calibration_structure {
 
 void
 odm_txpowertracking_check_ap(
-	void		*p_dm_void
+	void		*dm_void
 );
 
 void
 odm_txpowertracking_check(
-	void		*p_dm_void
+	void		*dm_void
 );
 
 
 void
 odm_txpowertracking_thermal_meter_init(
-	void		*p_dm_void
+	void		*dm_void
 );
 
 void
 odm_txpowertracking_init(
-	void		*p_dm_void
+	void		*dm_void
 );
 
 void
 odm_txpowertracking_check_mp(
-	void		*p_dm_void
+	void		*dm_void
 );
 
 
 void
 odm_txpowertracking_check_ce(
-	void		*p_dm_void
+	void		*dm_void
 );
 
 
@@ -321,31 +368,31 @@ odm_txpowertracking_check_ce(
 
 void
 odm_txpowertracking_callback_thermal_meter92c(
-	struct _ADAPTER	*adapter
+	void	*adapter
 );
 
 void
 odm_txpowertracking_callback_rx_gain_thermal_meter92d(
-	struct _ADAPTER	*adapter
+	void	*adapter
 );
 
 void
 odm_txpowertracking_callback_thermal_meter92d(
-	struct _ADAPTER	*adapter
+	void	*adapter
 );
 
 void
 odm_txpowertracking_direct_call92c(
-	struct _ADAPTER		*adapter
+	void		*adapter
 );
 
 void
 odm_txpowertracking_thermal_meter_check(
-	struct _ADAPTER		*adapter
+	void		*adapter
 );
 
 #endif
 
 
 
-#endif
+#endif	/*#ifndef __HALRF_POWER_TRACKING_H__*/
diff --git a/rtl8723DS/hal/phydm/halrf/halrf_powertracking_ce.c b/rtl8723DS/hal/phydm/halrf/halrf_powertracking_ce.c
index cb40caf..55ec7bf 100755..100644
--- a/rtl8723DS/hal/phydm/halrf/halrf_powertracking_ce.c
+++ b/rtl8723DS/hal/phydm/halrf/halrf_powertracking_ce.c
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2007 - 2017 Realtek Corporation.
+ * Copyright(c) 2007 - 2017  Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -8,331 +8,401 @@
  *
  * This program is distributed in the hope that it will be useful, but WITHOUT
  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  * more details.
  *
+ * The full GNU General Public License is included in this distribution in the
+ * file called LICENSE.
+ *
+ * Contact Information:
+ * wlanfae <wlanfae@realtek.com>
+ * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
+ * Hsinchu 300, Taiwan.
+ *
+ * Larry Finger <Larry.Finger@lwfinger.net>
+ *
  *****************************************************************************/
 
-/*============================================================	*/
-/* include files												*/
-/*============================================================	*/
+/*@===========================================================
+ * include files
+ *============================================================
+ */
+
 #include "mp_precomp.h"
 #include "phydm_precomp.h"
 
-/* ************************************************************
+/*@************************************************************
  * Global var
- * ************************************************************ */
-
-u32	ofdm_swing_table[OFDM_TABLE_SIZE] = {
-	0x7f8001fe,	/* 0, +6.0dB */
-	0x788001e2,	/* 1, +5.5dB */
-	0x71c001c7,	/* 2, +5.0dB*/
-	0x6b8001ae,	/* 3, +4.5dB*/
-	0x65400195,	/* 4, +4.0dB*/
-	0x5fc0017f,	/* 5, +3.5dB*/
-	0x5a400169,	/* 6, +3.0dB*/
-	0x55400155,	/* 7, +2.5dB*/
-	0x50800142,	/* 8, +2.0dB*/
-	0x4c000130,	/* 9, +1.5dB*/
-	0x47c0011f,	/* 10, +1.0dB*/
-	0x43c0010f,	/* 11, +0.5dB*/
-	0x40000100,	/* 12, +0dB*/
-	0x3c8000f2,	/* 13, -0.5dB*/
-	0x390000e4,	/* 14, -1.0dB*/
-	0x35c000d7,	/* 15, -1.5dB*/
-	0x32c000cb,	/* 16, -2.0dB*/
-	0x300000c0,	/* 17, -2.5dB*/
-	0x2d4000b5,	/* 18, -3.0dB*/
-	0x2ac000ab,	/* 19, -3.5dB*/
-	0x288000a2,	/* 20, -4.0dB*/
-	0x26000098,	/* 21, -4.5dB*/
-	0x24000090,	/* 22, -5.0dB*/
-	0x22000088,	/* 23, -5.5dB*/
-	0x20000080,	/* 24, -6.0dB*/
-	0x1e400079,	/* 25, -6.5dB*/
-	0x1c800072,	/* 26, -7.0dB*/
-	0x1b00006c,	/* 27. -7.5dB*/
-	0x19800066,	/* 28, -8.0dB*/
-	0x18000060,	/* 29, -8.5dB*/
-	0x16c0005b,	/* 30, -9.0dB*/
-	0x15800056,	/* 31, -9.5dB*/
-	0x14400051,	/* 32, -10.0dB*/
-	0x1300004c,	/* 33, -10.5dB*/
-	0x12000048,	/* 34, -11.0dB*/
-	0x11000044,	/* 35, -11.5dB*/
-	0x10000040,	/* 36, -12.0dB*/
+ * ************************************************************
+ */
+
+u32 ofdm_swing_table[OFDM_TABLE_SIZE] = {
+	0x7f8001fe, /* 0, +6.0dB */
+	0x788001e2, /* 1, +5.5dB */
+	0x71c001c7, /* 2, +5.0dB*/
+	0x6b8001ae, /* 3, +4.5dB*/
+	0x65400195, /* 4, +4.0dB*/
+	0x5fc0017f, /* 5, +3.5dB*/
+	0x5a400169, /* 6, +3.0dB*/
+	0x55400155, /* 7, +2.5dB*/
+	0x50800142, /* 8, +2.0dB*/
+	0x4c000130, /* 9, +1.5dB*/
+	0x47c0011f, /* 10, +1.0dB*/
+	0x43c0010f, /* 11, +0.5dB*/
+	0x40000100, /* 12, +0dB*/
+	0x3c8000f2, /* 13, -0.5dB*/
+	0x390000e4, /* 14, -1.0dB*/
+	0x35c000d7, /* 15, -1.5dB*/
+	0x32c000cb, /* 16, -2.0dB*/
+	0x300000c0, /* 17, -2.5dB*/
+	0x2d4000b5, /* 18, -3.0dB*/
+	0x2ac000ab, /* 19, -3.5dB*/
+	0x288000a2, /* 20, -4.0dB*/
+	0x26000098, /* 21, -4.5dB*/
+	0x24000090, /* 22, -5.0dB*/
+	0x22000088, /* 23, -5.5dB*/
+	0x20000080, /* 24, -6.0dB*/
+	0x1e400079, /* 25, -6.5dB*/
+	0x1c800072, /* 26, -7.0dB*/
+	0x1b00006c, /* 27. -7.5dB*/
+	0x19800066, /* 28, -8.0dB*/
+	0x18000060, /* 29, -8.5dB*/
+	0x16c0005b, /* 30, -9.0dB*/
+	0x15800056, /* 31, -9.5dB*/
+	0x14400051, /* 32, -10.0dB*/
+	0x1300004c, /* 33, -10.5dB*/
+	0x12000048, /* 34, -11.0dB*/
+	0x11000044, /* 35, -11.5dB*/
+	0x10000040, /* 36, -12.0dB*/
 };
 
-u8	cck_swing_table_ch1_ch13[CCK_TABLE_SIZE][8] = {
-	{0x36, 0x35, 0x2e, 0x25, 0x1c, 0x12, 0x09, 0x04},	/* 0, +0dB */
-	{0x33, 0x32, 0x2b, 0x23, 0x1a, 0x11, 0x08, 0x04},	/* 1, -0.5dB */
-	{0x30, 0x2f, 0x29, 0x21, 0x19, 0x10, 0x08, 0x03},	/* 2, -1.0dB*/
-	{0x2d, 0x2d, 0x27, 0x1f, 0x18, 0x0f, 0x08, 0x03},	/* 3, -1.5dB*/
-	{0x2b, 0x2a, 0x25, 0x1e, 0x16, 0x0e, 0x07, 0x03},	/* 4, -2.0dB */
-	{0x28, 0x28, 0x22, 0x1c, 0x15, 0x0d, 0x07, 0x03},	/* 5, -2.5dB*/
-	{0x26, 0x25, 0x21, 0x1b, 0x14, 0x0d, 0x06, 0x03},	/* 6, -3.0dB*/
-	{0x24, 0x23, 0x1f, 0x19, 0x13, 0x0c, 0x06, 0x03},	/* 7, -3.5dB*/
-	{0x22, 0x21, 0x1d, 0x18, 0x11, 0x0b, 0x06, 0x02},	/* 8, -4.0dB */
-	{0x20, 0x20, 0x1b, 0x16, 0x11, 0x08, 0x05, 0x02},	/* 9, -4.5dB*/
-	{0x1f, 0x1e, 0x1a, 0x15, 0x10, 0x0a, 0x05, 0x02},	/* 10, -5.0dB */
-	{0x1d, 0x1c, 0x18, 0x14, 0x0f, 0x0a, 0x05, 0x02},	/* 11, -5.5dB*/
-	{0x1b, 0x1a, 0x17, 0x13, 0x0e, 0x09, 0x04, 0x02},	/* 12, -6.0dB <== default */
-	{0x1a, 0x19, 0x16, 0x12, 0x0d, 0x09, 0x04, 0x02},	/* 13, -6.5dB*/
-	{0x18, 0x17, 0x15, 0x11, 0x0c, 0x08, 0x04, 0x02},	/* 14, -7.0dB */
-	{0x17, 0x16, 0x13, 0x10, 0x0c, 0x08, 0x04, 0x02},	/* 15, -7.5dB*/
-	{0x16, 0x15, 0x12, 0x0f, 0x0b, 0x07, 0x04, 0x01},	/* 16, -8.0dB */
-	{0x14, 0x14, 0x11, 0x0e, 0x0b, 0x07, 0x03, 0x02},	/* 17, -8.5dB*/
-	{0x13, 0x13, 0x10, 0x0d, 0x0a, 0x06, 0x03, 0x01},	/* 18, -9.0dB */
-	{0x12, 0x12, 0x0f, 0x0c, 0x09, 0x06, 0x03, 0x01},	/* 19, -9.5dB*/
-	{0x11, 0x11, 0x0f, 0x0c, 0x09, 0x06, 0x03, 0x01},	/* 20, -10.0dB*/
-	{0x10, 0x10, 0x0e, 0x0b, 0x08, 0x05, 0x03, 0x01},	/* 21, -10.5dB*/
-	{0x0f, 0x0f, 0x0d, 0x0b, 0x08, 0x05, 0x03, 0x01},	/* 22, -11.0dB*/
-	{0x0e, 0x0e, 0x0c, 0x0a, 0x08, 0x05, 0x02, 0x01},	/* 23, -11.5dB*/
-	{0x0d, 0x0d, 0x0c, 0x0a, 0x07, 0x05, 0x02, 0x01},	/* 24, -12.0dB*/
-	{0x0d, 0x0c, 0x0b, 0x09, 0x07, 0x04, 0x02, 0x01},	/* 25, -12.5dB*/
-	{0x0c, 0x0c, 0x0a, 0x09, 0x06, 0x04, 0x02, 0x01},	/* 26, -13.0dB*/
-	{0x0b, 0x0b, 0x0a, 0x08, 0x06, 0x04, 0x02, 0x01},	/* 27, -13.5dB*/
-	{0x0b, 0x0a, 0x09, 0x08, 0x06, 0x04, 0x02, 0x01},	/* 28, -14.0dB*/
-	{0x0a, 0x0a, 0x09, 0x07, 0x05, 0x03, 0x02, 0x01},	/* 29, -14.5dB*/
-	{0x0a, 0x09, 0x08, 0x07, 0x05, 0x03, 0x02, 0x01},	/* 30, -15.0dB*/
-	{0x09, 0x09, 0x08, 0x06, 0x05, 0x03, 0x01, 0x01},	/* 31, -15.5dB*/
-	{0x09, 0x08, 0x07, 0x06, 0x04, 0x03, 0x01, 0x01}	/* 32, -16.0dB*/
+u8 cck_swing_table_ch1_ch13[CCK_TABLE_SIZE][8] = {
+	{0x36, 0x35, 0x2e, 0x25, 0x1c, 0x12, 0x09, 0x04}, /* 0, +0dB */
+	{0x33, 0x32, 0x2b, 0x23, 0x1a, 0x11, 0x08, 0x04}, /* 1, -0.5dB */
+	{0x30, 0x2f, 0x29, 0x21, 0x19, 0x10, 0x08, 0x03}, /* 2, -1.0dB */
+	{0x2d, 0x2d, 0x27, 0x1f, 0x18, 0x0f, 0x08, 0x03}, /* 3, -1.5dB */
+	{0x2b, 0x2a, 0x25, 0x1e, 0x16, 0x0e, 0x07, 0x03}, /* 4, -2.0dB */
+	{0x28, 0x28, 0x22, 0x1c, 0x15, 0x0d, 0x07, 0x03}, /* 5, -2.5dB */
+	{0x26, 0x25, 0x21, 0x1b, 0x14, 0x0d, 0x06, 0x03}, /* 6, -3.0dB */
+	{0x24, 0x23, 0x1f, 0x19, 0x13, 0x0c, 0x06, 0x03}, /* 7, -3.5dB */
+	{0x22, 0x21, 0x1d, 0x18, 0x11, 0x0b, 0x06, 0x02}, /* 8, -4.0dB */
+	{0x20, 0x20, 0x1b, 0x16, 0x11, 0x08, 0x05, 0x02}, /* 9, -4.5dB */
+	{0x1f, 0x1e, 0x1a, 0x15, 0x10, 0x0a, 0x05, 0x02}, /* 10, -5.0dB */
+	{0x1d, 0x1c, 0x18, 0x14, 0x0f, 0x0a, 0x05, 0x02}, /* 11, -5.5dB */
+	{0x1b, 0x1a, 0x17, 0x13, 0x0e, 0x09, 0x04, 0x02}, /* 12, -6.0 default*/
+	{0x1a, 0x19, 0x16, 0x12, 0x0d, 0x09, 0x04, 0x02}, /* 13, -6.5dB */
+	{0x18, 0x17, 0x15, 0x11, 0x0c, 0x08, 0x04, 0x02}, /* 14, -7.0dB */
+	{0x17, 0x16, 0x13, 0x10, 0x0c, 0x08, 0x04, 0x02}, /* 15, -7.5dB */
+	{0x16, 0x15, 0x12, 0x0f, 0x0b, 0x07, 0x04, 0x01}, /* 16, -8.0dB */
+	{0x14, 0x14, 0x11, 0x0e, 0x0b, 0x07, 0x03, 0x02}, /* 17, -8.5dB */
+	{0x13, 0x13, 0x10, 0x0d, 0x0a, 0x06, 0x03, 0x01}, /* 18, -9.0dB */
+	{0x12, 0x12, 0x0f, 0x0c, 0x09, 0x06, 0x03, 0x01}, /* 19, -9.5dB */
+	{0x11, 0x11, 0x0f, 0x0c, 0x09, 0x06, 0x03, 0x01}, /* 20, -10.0dB */
+	{0x10, 0x10, 0x0e, 0x0b, 0x08, 0x05, 0x03, 0x01}, /* 21, -10.5dB */
+	{0x0f, 0x0f, 0x0d, 0x0b, 0x08, 0x05, 0x03, 0x01}, /* 22, -11.0dB */
+	{0x0e, 0x0e, 0x0c, 0x0a, 0x08, 0x05, 0x02, 0x01}, /* 23, -11.5dB */
+	{0x0d, 0x0d, 0x0c, 0x0a, 0x07, 0x05, 0x02, 0x01}, /* 24, -12.0dB */
+	{0x0d, 0x0c, 0x0b, 0x09, 0x07, 0x04, 0x02, 0x01}, /* 25, -12.5dB */
+	{0x0c, 0x0c, 0x0a, 0x09, 0x06, 0x04, 0x02, 0x01}, /* 26, -13.0dB */
+	{0x0b, 0x0b, 0x0a, 0x08, 0x06, 0x04, 0x02, 0x01}, /* 27, -13.5dB */
+	{0x0b, 0x0a, 0x09, 0x08, 0x06, 0x04, 0x02, 0x01}, /* 28, -14.0dB */
+	{0x0a, 0x0a, 0x09, 0x07, 0x05, 0x03, 0x02, 0x01}, /* 29, -14.5dB */
+	{0x0a, 0x09, 0x08, 0x07, 0x05, 0x03, 0x02, 0x01}, /* 30, -15.0dB */
+	{0x09, 0x09, 0x08, 0x06, 0x05, 0x03, 0x01, 0x01}, /* 31, -15.5dB */
+	{0x09, 0x08, 0x07, 0x06, 0x04, 0x03, 0x01, 0x01} /* 32, -16.0dB */
 };
 
-
-u8	cck_swing_table_ch14[CCK_TABLE_SIZE][8] = {
-	{0x36, 0x35, 0x2e, 0x1b, 0x00, 0x00, 0x00, 0x00},	/* 0, +0dB */
-	{0x33, 0x32, 0x2b, 0x19, 0x00, 0x00, 0x00, 0x00},	/* 1, -0.5dB */
-	{0x30, 0x2f, 0x29, 0x18, 0x00, 0x00, 0x00, 0x00},	/* 2, -1.0dB */
-	{0x2d, 0x2d, 0x17, 0x17, 0x00, 0x00, 0x00, 0x00},	/* 3, -1.5dB*/
-	{0x2b, 0x2a, 0x25, 0x15, 0x00, 0x00, 0x00, 0x00},	/* 4, -2.0dB */
-	{0x28, 0x28, 0x24, 0x14, 0x00, 0x00, 0x00, 0x00},	/* 5, -2.5dB*/
-	{0x26, 0x25, 0x21, 0x13, 0x00, 0x00, 0x00, 0x00},	/* 6, -3.0dB */
-	{0x24, 0x23, 0x1f, 0x12, 0x00, 0x00, 0x00, 0x00},	/* 7, -3.5dB */
-	{0x22, 0x21, 0x1d, 0x11, 0x00, 0x00, 0x00, 0x00},	/* 8, -4.0dB */
-	{0x20, 0x20, 0x1b, 0x10, 0x00, 0x00, 0x00, 0x00},	/* 9, -4.5dB*/
-	{0x1f, 0x1e, 0x1a, 0x0f, 0x00, 0x00, 0x00, 0x00},	/* 10, -5.0dB */
-	{0x1d, 0x1c, 0x18, 0x0e, 0x00, 0x00, 0x00, 0x00},	/* 11, -5.5dB*/
-	{0x1b, 0x1a, 0x17, 0x0e, 0x00, 0x00, 0x00, 0x00},	/* 12, -6.0dB  <== default*/
-	{0x1a, 0x19, 0x16, 0x0d, 0x00, 0x00, 0x00, 0x00},	/* 13, -6.5dB */
-	{0x18, 0x17, 0x15, 0x0c, 0x00, 0x00, 0x00, 0x00},	/* 14, -7.0dB */
-	{0x17, 0x16, 0x13, 0x0b, 0x00, 0x00, 0x00, 0x00},	/* 15, -7.5dB*/
-	{0x16, 0x15, 0x12, 0x0b, 0x00, 0x00, 0x00, 0x00},	/* 16, -8.0dB */
-	{0x14, 0x14, 0x11, 0x0a, 0x00, 0x00, 0x00, 0x00},	/* 17, -8.5dB*/
-	{0x13, 0x13, 0x10, 0x0a, 0x00, 0x00, 0x00, 0x00},	/* 18, -9.0dB */
-	{0x12, 0x12, 0x0f, 0x09, 0x00, 0x00, 0x00, 0x00},	/* 19, -9.5dB*/
-	{0x11, 0x11, 0x0f, 0x09, 0x00, 0x00, 0x00, 0x00},	/* 20, -10.0dB*/
-	{0x10, 0x10, 0x0e, 0x08, 0x00, 0x00, 0x00, 0x00},	/* 21, -10.5dB*/
-	{0x0f, 0x0f, 0x0d, 0x08, 0x00, 0x00, 0x00, 0x00},	/* 22, -11.0dB*/
-	{0x0e, 0x0e, 0x0c, 0x07, 0x00, 0x00, 0x00, 0x00},	/* 23, -11.5dB*/
-	{0x0d, 0x0d, 0x0c, 0x07, 0x00, 0x00, 0x00, 0x00},	/* 24, -12.0dB*/
-	{0x0d, 0x0c, 0x0b, 0x06, 0x00, 0x00, 0x00, 0x00},	/* 25, -12.5dB*/
-	{0x0c, 0x0c, 0x0a, 0x06, 0x00, 0x00, 0x00, 0x00},	/* 26, -13.0dB*/
-	{0x0b, 0x0b, 0x0a, 0x06, 0x00, 0x00, 0x00, 0x00},	/* 27, -13.5dB*/
-	{0x0b, 0x0a, 0x09, 0x05, 0x00, 0x00, 0x00, 0x00},	/* 28, -14.0dB*/
-	{0x0a, 0x0a, 0x09, 0x05, 0x00, 0x00, 0x00, 0x00},	/* 29, -14.5dB*/
-	{0x0a, 0x09, 0x08, 0x05, 0x00, 0x00, 0x00, 0x00},	/* 30, -15.0dB*/
-	{0x09, 0x09, 0x08, 0x05, 0x00, 0x00, 0x00, 0x00},	/* 31, -15.5dB*/
-	{0x09, 0x08, 0x07, 0x04, 0x00, 0x00, 0x00, 0x00}	/* 32, -16.0dB*/
+u8 cck_swing_table_ch14[CCK_TABLE_SIZE][8] = {
+	{0x36, 0x35, 0x2e, 0x1b, 0x00, 0x00, 0x00, 0x00}, /* 0, +0dB */
+	{0x33, 0x32, 0x2b, 0x19, 0x00, 0x00, 0x00, 0x00}, /* 1, -0.5dB */
+	{0x30, 0x2f, 0x29, 0x18, 0x00, 0x00, 0x00, 0x00}, /* 2, -1.0dB */
+	{0x2d, 0x2d, 0x17, 0x17, 0x00, 0x00, 0x00, 0x00}, /* 3, -1.5dB */
+	{0x2b, 0x2a, 0x25, 0x15, 0x00, 0x00, 0x00, 0x00}, /* 4, -2.0dB */
+	{0x28, 0x28, 0x24, 0x14, 0x00, 0x00, 0x00, 0x00}, /* 5, -2.5dB */
+	{0x26, 0x25, 0x21, 0x13, 0x00, 0x00, 0x00, 0x00}, /* 6, -3.0dB */
+	{0x24, 0x23, 0x1f, 0x12, 0x00, 0x00, 0x00, 0x00}, /* 7, -3.5dB */
+	{0x22, 0x21, 0x1d, 0x11, 0x00, 0x00, 0x00, 0x00}, /* 8, -4.0dB */
+	{0x20, 0x20, 0x1b, 0x10, 0x00, 0x00, 0x00, 0x00}, /* 9, -4.5dB */
+	{0x1f, 0x1e, 0x1a, 0x0f, 0x00, 0x00, 0x00, 0x00}, /* 10, -5.0dB */
+	{0x1d, 0x1c, 0x18, 0x0e, 0x00, 0x00, 0x00, 0x00}, /* 11, -5.5dB */
+	{0x1b, 0x1a, 0x17, 0x0e, 0x00, 0x00, 0x00, 0x00}, /* 12, -6.0 default*/
+	{0x1a, 0x19, 0x16, 0x0d, 0x00, 0x00, 0x00, 0x00}, /* 13, -6.5dB */
+	{0x18, 0x17, 0x15, 0x0c, 0x00, 0x00, 0x00, 0x00}, /* 14, -7.0dB */
+	{0x17, 0x16, 0x13, 0x0b, 0x00, 0x00, 0x00, 0x00}, /* 15, -7.5dB */
+	{0x16, 0x15, 0x12, 0x0b, 0x00, 0x00, 0x00, 0x00}, /* 16, -8.0dB */
+	{0x14, 0x14, 0x11, 0x0a, 0x00, 0x00, 0x00, 0x00}, /* 17, -8.5dB */
+	{0x13, 0x13, 0x10, 0x0a, 0x00, 0x00, 0x00, 0x00}, /* 18, -9.0dB */
+	{0x12, 0x12, 0x0f, 0x09, 0x00, 0x00, 0x00, 0x00}, /* 19, -9.5dB */
+	{0x11, 0x11, 0x0f, 0x09, 0x00, 0x00, 0x00, 0x00}, /* 20, -10.0dB */
+	{0x10, 0x10, 0x0e, 0x08, 0x00, 0x00, 0x00, 0x00}, /* 21, -10.5dB */
+	{0x0f, 0x0f, 0x0d, 0x08, 0x00, 0x00, 0x00, 0x00}, /* 22, -11.0dB */
+	{0x0e, 0x0e, 0x0c, 0x07, 0x00, 0x00, 0x00, 0x00}, /* 23, -11.5dB */
+	{0x0d, 0x0d, 0x0c, 0x07, 0x00, 0x00, 0x00, 0x00}, /* 24, -12.0dB */
+	{0x0d, 0x0c, 0x0b, 0x06, 0x00, 0x00, 0x00, 0x00}, /* 25, -12.5dB */
+	{0x0c, 0x0c, 0x0a, 0x06, 0x00, 0x00, 0x00, 0x00}, /* 26, -13.0dB */
+	{0x0b, 0x0b, 0x0a, 0x06, 0x00, 0x00, 0x00, 0x00}, /* 27, -13.5dB */
+	{0x0b, 0x0a, 0x09, 0x05, 0x00, 0x00, 0x00, 0x00}, /* 28, -14.0dB */
+	{0x0a, 0x0a, 0x09, 0x05, 0x00, 0x00, 0x00, 0x00}, /* 29, -14.5dB */
+	{0x0a, 0x09, 0x08, 0x05, 0x00, 0x00, 0x00, 0x00}, /* 30, -15.0dB */
+	{0x09, 0x09, 0x08, 0x05, 0x00, 0x00, 0x00, 0x00}, /* 31, -15.5dB */
+	{0x09, 0x08, 0x07, 0x04, 0x00, 0x00, 0x00, 0x00} /* 32, -16.0dB */
 };
 
-
 u32 ofdm_swing_table_new[OFDM_TABLE_SIZE] = {
-	0x0b40002d, /* 0,  -15.0dB	*/
-	0x0c000030, /* 1,  -14.5dB*/
-	0x0cc00033, /* 2,  -14.0dB*/
-	0x0d800036, /* 3,  -13.5dB*/
+	0x0b40002d, /* 0,  -15.0dB */
+	0x0c000030, /* 1,  -14.5dB */
+	0x0cc00033, /* 2,  -14.0dB */
+	0x0d800036, /* 3,  -13.5dB */
 	0x0e400039, /* 4,  -13.0dB */
-	0x0f00003c, /* 5,  -12.5dB*/
-	0x10000040, /* 6,  -12.0dB*/
-	0x11000044, /* 7,  -11.5dB*/
-	0x12000048, /* 8,  -11.0dB*/
-	0x1300004c, /* 9,  -10.5dB*/
-	0x14400051, /* 10, -10.0dB*/
-	0x15800056, /* 11, -9.5dB*/
-	0x16c0005b, /* 12, -9.0dB*/
-	0x18000060, /* 13, -8.5dB*/
-	0x19800066, /* 14, -8.0dB*/
-	0x1b00006c, /* 15, -7.5dB*/
-	0x1c800072, /* 16, -7.0dB*/
-	0x1e400079, /* 17, -6.5dB*/
-	0x20000080, /* 18, -6.0dB*/
-	0x22000088, /* 19, -5.5dB*/
-	0x24000090, /* 20, -5.0dB*/
-	0x26000098, /* 21, -4.5dB*/
-	0x288000a2, /* 22, -4.0dB*/
-	0x2ac000ab, /* 23, -3.5dB*/
-	0x2d4000b5, /* 24, -3.0dB*/
-	0x300000c0, /* 25, -2.5dB*/
-	0x32c000cb, /* 26, -2.0dB*/
-	0x35c000d7, /* 27, -1.5dB*/
-	0x390000e4, /* 28, -1.0dB*/
-	0x3c8000f2, /* 29, -0.5dB*/
-	0x40000100, /* 30, +0dB*/
-	0x43c0010f, /* 31, +0.5dB*/
-	0x47c0011f, /* 32, +1.0dB*/
-	0x4c000130, /* 33, +1.5dB*/
-	0x50800142, /* 34, +2.0dB*/
-	0x55400155, /* 35, +2.5dB*/
-	0x5a400169, /* 36, +3.0dB*/
-	0x5fc0017f, /* 37, +3.5dB*/
-	0x65400195, /* 38, +4.0dB*/
-	0x6b8001ae, /* 39, +4.5dB*/
-	0x71c001c7, /* 40, +5.0dB*/
-	0x788001e2, /* 41, +5.5dB*/
-	0x7f8001fe  /* 42, +6.0dB*/
+	0x0f00003c, /* 5,  -12.5dB */
+	0x10000040, /* 6,  -12.0dB */
+	0x11000044, /* 7,  -11.5dB */
+	0x12000048, /* 8,  -11.0dB */
+	0x1300004c, /* 9,  -10.5dB */
+	0x14400051, /* 10, -10.0dB */
+	0x15800056, /* 11, -9.5dB */
+	0x16c0005b, /* 12, -9.0dB */
+	0x18000060, /* 13, -8.5dB */
+	0x19800066, /* 14, -8.0dB */
+	0x1b00006c, /* 15, -7.5dB */
+	0x1c800072, /* 16, -7.0dB */
+	0x1e400079, /* 17, -6.5dB */
+	0x20000080, /* 18, -6.0dB */
+	0x22000088, /* 19, -5.5dB */
+	0x24000090, /* 20, -5.0dB */
+	0x26000098, /* 21, -4.5dB */
+	0x288000a2, /* 22, -4.0dB */
+	0x2ac000ab, /* 23, -3.5dB */
+	0x2d4000b5, /* 24, -3.0dB */
+	0x300000c0, /* 25, -2.5dB */
+	0x32c000cb, /* 26, -2.0dB */
+	0x35c000d7, /* 27, -1.5dB */
+	0x390000e4, /* 28, -1.0dB */
+	0x3c8000f2, /* 29, -0.5dB */
+	0x40000100, /* 30, +0dB */
+	0x43c0010f, /* 31, +0.5dB */
+	0x47c0011f, /* 32, +1.0dB */
+	0x4c000130, /* 33, +1.5dB */
+	0x50800142, /* 34, +2.0dB */
+	0x55400155, /* 35, +2.5dB */
+	0x5a400169, /* 36, +3.0dB */
+	0x5fc0017f, /* 37, +3.5dB */
+	0x65400195, /* 38, +4.0dB */
+	0x6b8001ae, /* 39, +4.5dB */
+	0x71c001c7, /* 40, +5.0dB */
+	0x788001e2, /* 41, +5.5dB */
+	0x7f8001fe /* 42, +6.0dB */
 };
 
-
 u8 cck_swing_table_ch1_ch14_88f[CCK_TABLE_SIZE_88F][16] = {
-	{0x44, 0x42, 0x3C, 0x33, 0x28, 0x1C, 0x13, 0x0B, 0x05, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},    /*-16dB*/
-	{0x48, 0x46, 0x3F, 0x36, 0x2A, 0x1E, 0x14, 0x0B, 0x05, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},    /*-15.5dB*/
-	{0x4D, 0x4A, 0x43, 0x39, 0x2C, 0x20, 0x15, 0x0C, 0x06, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},    /*-15dB*/
-	{0x51, 0x4F, 0x47, 0x3C, 0x2F, 0x22, 0x16, 0x0D, 0x06, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},    /*-14.5dB*/
-	{0x56, 0x53, 0x4B, 0x40, 0x32, 0x24, 0x17, 0x0E, 0x06, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},    /*-14dB*/
-	{0x5B, 0x58, 0x50, 0x43, 0x35, 0x26, 0x19, 0x0E, 0x07, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},    /*-13.5dB*/
-	{0x60, 0x5D, 0x54, 0x47, 0x38, 0x28, 0x1A, 0x0F, 0x07, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},    /*-13dB*/
-	{0x66, 0x63, 0x59, 0x4C, 0x3B, 0x2B, 0x1C, 0x10, 0x08, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},    /*-12.5dB*/
-	{0x6C, 0x69, 0x5F, 0x50, 0x3F, 0x2D, 0x1E, 0x11, 0x08, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},    /*-12dB*/
-	{0x73, 0x6F, 0x64, 0x55, 0x42, 0x30, 0x1F, 0x12, 0x08, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},    /*-11.5dB*/
-	{0x79, 0x76, 0x6A, 0x5A, 0x46, 0x33, 0x21, 0x13, 0x09, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},    /*-11dB*/
-	{0x81, 0x7C, 0x71, 0x5F, 0x4A, 0x36, 0x23, 0x14, 0x0A, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},    /*-10.5dB*/
-	{0x88, 0x84, 0x77, 0x65, 0x4F, 0x39, 0x25, 0x15, 0x0A, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},    /*-10dB*/
-	{0x90, 0x8C, 0x7E, 0x6B, 0x54, 0x3C, 0x27, 0x17, 0x0B, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},    /*-9.5dB*/
-	{0x99, 0x94, 0x86, 0x71, 0x58, 0x40, 0x2A, 0x18, 0x0B, 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},    /*-9dB*/
-	{0xA2, 0x9D, 0x8E, 0x78, 0x5E, 0x43, 0x2C, 0x19, 0x0C, 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},    /*-8.5dB*/
-	{0xAC, 0xA6, 0x96, 0x7F, 0x63, 0x47, 0x2F, 0x1B, 0x0D, 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},    /*-8dB*/
-	{0xB6, 0xB0, 0x9F, 0x87, 0x69, 0x4C, 0x32, 0x1D, 0x0D, 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},    /*-7.5dB*/
-	{0xC1, 0xBA, 0xA8, 0x8F, 0x6F, 0x50, 0x35, 0x1E, 0x0E, 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},    /*-7dB*/
-	{0xCC, 0xC5, 0xB2, 0x97, 0x76, 0x55, 0x38, 0x20, 0x0F, 0x05, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},    /*-6.5dB*/
-	{0xD8, 0xD1, 0xBD, 0xA0, 0x7D, 0x5A, 0x3B, 0x22, 0x10, 0x05, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}     /*-6dB*/
+	{0x44, 0x42, 0x3C, 0x33, 0x28, 0x1C, 0x13, 0x0B, 0x05, 0x02,
+		0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-16dB*/
+	{0x48, 0x46, 0x3F, 0x36, 0x2A, 0x1E, 0x14, 0x0B, 0x05, 0x02,
+		0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-15.5dB*/
+	{0x4D, 0x4A, 0x43, 0x39, 0x2C, 0x20, 0x15, 0x0C, 0x06, 0x02,
+		0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-15dB*/
+	{0x51, 0x4F, 0x47, 0x3C, 0x2F, 0x22, 0x16, 0x0D, 0x06, 0x02,
+		0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-14.5dB*/
+	{0x56, 0x53, 0x4B, 0x40, 0x32, 0x24, 0x17, 0x0E, 0x06, 0x02,
+		0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-14dB*/
+	{0x5B, 0x58, 0x50, 0x43, 0x35, 0x26, 0x19, 0x0E, 0x07, 0x02,
+		0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-13.5dB*/
+	{0x60, 0x5D, 0x54, 0x47, 0x38, 0x28, 0x1A, 0x0F, 0x07, 0x02,
+		0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-13dB*/
+	{0x66, 0x63, 0x59, 0x4C, 0x3B, 0x2B, 0x1C, 0x10, 0x08, 0x02,
+		0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-12.5dB*/
+	{0x6C, 0x69, 0x5F, 0x50, 0x3F, 0x2D, 0x1E, 0x11, 0x08, 0x03,
+		0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-12dB*/
+	{0x73, 0x6F, 0x64, 0x55, 0x42, 0x30, 0x1F, 0x12, 0x08, 0x03,
+		0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-11.5dB*/
+	{0x79, 0x76, 0x6A, 0x5A, 0x46, 0x33, 0x21, 0x13, 0x09, 0x03,
+		0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-11dB*/
+	{0x81, 0x7C, 0x71, 0x5F, 0x4A, 0x36, 0x23, 0x14, 0x0A, 0x03,
+		0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-10.5dB*/
+	{0x88, 0x84, 0x77, 0x65, 0x4F, 0x39, 0x25, 0x15, 0x0A, 0x03,
+		0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-10dB*/
+	{0x90, 0x8C, 0x7E, 0x6B, 0x54, 0x3C, 0x27, 0x17, 0x0B, 0x03,
+		0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-9.5dB*/
+	{0x99, 0x94, 0x86, 0x71, 0x58, 0x40, 0x2A, 0x18, 0x0B, 0x04,
+		0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-9dB*/
+	{0xA2, 0x9D, 0x8E, 0x78, 0x5E, 0x43, 0x2C, 0x19, 0x0C, 0x04,
+		0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-8.5dB*/
+	{0xAC, 0xA6, 0x96, 0x7F, 0x63, 0x47, 0x2F, 0x1B, 0x0D, 0x04,
+		0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-8dB*/
+	{0xB6, 0xB0, 0x9F, 0x87, 0x69, 0x4C, 0x32, 0x1D, 0x0D, 0x04,
+		0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-7.5dB*/
+	{0xC1, 0xBA, 0xA8, 0x8F, 0x6F, 0x50, 0x35, 0x1E, 0x0E, 0x04,
+		0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-7dB*/
+	{0xCC, 0xC5, 0xB2, 0x97, 0x76, 0x55, 0x38, 0x20, 0x0F, 0x05,
+		0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-6.5dB*/
+	{0xD8, 0xD1, 0xBD, 0xA0, 0x7D, 0x5A, 0x3B, 0x22, 0x10, 0x05,
+		0x00, 0x00, 0x00, 0x00, 0x00, 0x00} /*-6dB*/
 };
 
-
 u8 cck_swing_table_ch1_ch13_88f[CCK_TABLE_SIZE_88F][16] = {
-	{0x44, 0x42, 0x3C, 0x33, 0x28, 0x1C, 0x13, 0x0B, 0x05, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},    /*-16dB*/
-	{0x48, 0x46, 0x3F, 0x36, 0x2A, 0x1E, 0x14, 0x0B, 0x05, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},    /*-15.5dB*/
-	{0x4D, 0x4A, 0x43, 0x39, 0x2C, 0x20, 0x15, 0x0C, 0x06, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},    /*-15dB*/
-	{0x51, 0x4F, 0x47, 0x3C, 0x2F, 0x22, 0x16, 0x0D, 0x06, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},    /*-14.5dB*/
-	{0x56, 0x53, 0x4B, 0x40, 0x32, 0x24, 0x17, 0x0E, 0x06, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},    /*-14dB*/
-	{0x5B, 0x58, 0x50, 0x43, 0x35, 0x26, 0x19, 0x0E, 0x07, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},    /*-13.5dB*/
-	{0x60, 0x5D, 0x54, 0x47, 0x38, 0x28, 0x1A, 0x0F, 0x07, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},    /*-13dB*/
-	{0x66, 0x63, 0x59, 0x4C, 0x3B, 0x2B, 0x1C, 0x10, 0x08, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},    /*-12.5dB*/
-	{0x6C, 0x69, 0x5F, 0x50, 0x3F, 0x2D, 0x1E, 0x11, 0x08, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},    /*-12dB*/
-	{0x73, 0x6F, 0x64, 0x55, 0x42, 0x30, 0x1F, 0x12, 0x08, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},    /*-11.5dB*/
-	{0x79, 0x76, 0x6A, 0x5A, 0x46, 0x33, 0x21, 0x13, 0x09, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},    /*-11dB*/
-	{0x81, 0x7C, 0x71, 0x5F, 0x4A, 0x36, 0x23, 0x14, 0x0A, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},    /*-10.5dB*/
-	{0x88, 0x84, 0x77, 0x65, 0x4F, 0x39, 0x25, 0x15, 0x0A, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},    /*-10dB*/
-	{0x90, 0x8C, 0x7E, 0x6B, 0x54, 0x3C, 0x27, 0x17, 0x0B, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},    /*-9.5dB*/
-	{0x99, 0x94, 0x86, 0x71, 0x58, 0x40, 0x2A, 0x18, 0x0B, 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},    /*-9dB*/
-	{0xA2, 0x9D, 0x8E, 0x78, 0x5E, 0x43, 0x2C, 0x19, 0x0C, 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},    /*-8.5dB*/
-	{0xAC, 0xA6, 0x96, 0x7F, 0x63, 0x47, 0x2F, 0x1B, 0x0D, 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},    /*-8dB*/
-	{0xB6, 0xB0, 0x9F, 0x87, 0x69, 0x4C, 0x32, 0x1D, 0x0D, 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},    /*-7.5dB*/
-	{0xC1, 0xBA, 0xA8, 0x8F, 0x6F, 0x50, 0x35, 0x1E, 0x0E, 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},    /*-7dB*/
-	{0xCC, 0xC5, 0xB2, 0x97, 0x76, 0x55, 0x38, 0x20, 0x0F, 0x05, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},    /*-6.5dB*/
-	{0xD8, 0xD1, 0xBD, 0xA0, 0x7D, 0x5A, 0x3B, 0x22, 0x10, 0x05, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}     /*-6dB*/
+	{0x44, 0x42, 0x3C, 0x33, 0x28, 0x1C, 0x13, 0x0B, 0x05, 0x02,
+		0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-16dB*/
+	{0x48, 0x46, 0x3F, 0x36, 0x2A, 0x1E, 0x14, 0x0B, 0x05, 0x02,
+		0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-15.5dB*/
+	{0x4D, 0x4A, 0x43, 0x39, 0x2C, 0x20, 0x15, 0x0C, 0x06, 0x02,
+		0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-15dB*/
+	{0x51, 0x4F, 0x47, 0x3C, 0x2F, 0x22, 0x16, 0x0D, 0x06, 0x02,
+		0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-14.5dB*/
+	{0x56, 0x53, 0x4B, 0x40, 0x32, 0x24, 0x17, 0x0E, 0x06, 0x02,
+		0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-14dB*/
+	{0x5B, 0x58, 0x50, 0x43, 0x35, 0x26, 0x19, 0x0E, 0x07, 0x02,
+		0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-13.5dB*/
+	{0x60, 0x5D, 0x54, 0x47, 0x38, 0x28, 0x1A, 0x0F, 0x07, 0x02,
+		0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-13dB*/
+	{0x66, 0x63, 0x59, 0x4C, 0x3B, 0x2B, 0x1C, 0x10, 0x08, 0x02,
+		0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-12.5dB*/
+	{0x6C, 0x69, 0x5F, 0x50, 0x3F, 0x2D, 0x1E, 0x11, 0x08, 0x03,
+		0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-12dB*/
+	{0x73, 0x6F, 0x64, 0x55, 0x42, 0x30, 0x1F, 0x12, 0x08, 0x03,
+		0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-11.5dB*/
+	{0x79, 0x76, 0x6A, 0x5A, 0x46, 0x33, 0x21, 0x13, 0x09, 0x03,
+		0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-11dB*/
+	{0x81, 0x7C, 0x71, 0x5F, 0x4A, 0x36, 0x23, 0x14, 0x0A, 0x03,
+		0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-10.5dB*/
+	{0x88, 0x84, 0x77, 0x65, 0x4F, 0x39, 0x25, 0x15, 0x0A, 0x03,
+		0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-10dB*/
+	{0x90, 0x8C, 0x7E, 0x6B, 0x54, 0x3C, 0x27, 0x17, 0x0B, 0x03,
+		0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-9.5dB*/
+	{0x99, 0x94, 0x86, 0x71, 0x58, 0x40, 0x2A, 0x18, 0x0B, 0x04,
+		0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-9dB*/
+	{0xA2, 0x9D, 0x8E, 0x78, 0x5E, 0x43, 0x2C, 0x19, 0x0C, 0x04,
+		0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-8.5dB*/
+	{0xAC, 0xA6, 0x96, 0x7F, 0x63, 0x47, 0x2F, 0x1B, 0x0D, 0x04,
+		0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-8dB*/
+	{0xB6, 0xB0, 0x9F, 0x87, 0x69, 0x4C, 0x32, 0x1D, 0x0D, 0x04,
+		0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-7.5dB*/
+	{0xC1, 0xBA, 0xA8, 0x8F, 0x6F, 0x50, 0x35, 0x1E, 0x0E, 0x04,
+		0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-7dB*/
+	{0xCC, 0xC5, 0xB2, 0x97, 0x76, 0x55, 0x38, 0x20, 0x0F, 0x05,
+		0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-6.5dB*/
+	{0xD8, 0xD1, 0xBD, 0xA0, 0x7D, 0x5A, 0x3B, 0x22, 0x10, 0x05,
+		0x00, 0x00, 0x00, 0x00, 0x00, 0x00} /*-6dB*/
 };
 
-
 u8 cck_swing_table_ch14_88f[CCK_TABLE_SIZE_88F][16] = {
-	{0x44,	 0x42, 0x3C, 0x28, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},    /*-16dB*/
-	{0x48, 0x46, 0x3F, 0x2A, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},    /*-15.5dB*/
-	{0x4D, 0x4A, 0x43, 0x2C, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},    /*-15dB*/
-	{0x51, 0x4F, 0x47, 0x2F, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},	    /*-14.5dB*/
-	{0x56, 0x53, 0x4B, 0x32, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},    /*-14dB*/
-	{0x5B, 0x58, 0x50, 0x35, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},    /*-13.5dB*/
-	{0x60, 0x5D, 0x54, 0x38, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},    /*-13dB*/
-	{0x66, 0x63, 0x59, 0x3B, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},    /*-12.5dB*/
-	{0x6C, 0x69, 0x5F, 0x3F, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},    /*-12dB*/
-	{0x73, 0x6F, 0x64, 0x42, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},    /*-11.5dB*/
-	{0x79, 0x76, 0x6A, 0x46, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},    /*-11dB*/
-	{0x81, 0x7C, 0x71, 0x4A, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},    /*-10.5dB*/
-	{0x88, 0x84, 0x77, 0x4F, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},    /*-10dB*/
-	{0x90, 0x8C, 0x7E, 0x54, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},    /*-9.5dB*/
-	{0x99, 0x94, 0x86, 0x58, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},    /*-9dB*/
-	{0xA2, 0x9D, 0x8E, 0x5E, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},    /*-8.5dB*/
-	{0xAC, 0xA6, 0x96, 0x63, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},    /*-8dB*/
-	{0xB6, 0xB0, 0x9F, 0x69, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},    /*-7.5dB*/
-	{0xC1, 0xBA, 0xA8, 0x6F, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},    /*-7dB*/
-	{0xCC, 0xC5, 0xB2, 0x76, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},    /*-6.5dB*/
-	{0xD8, 0xD1, 0xBD, 0x7D, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}     /*-6dB*/
+	{0x44, 0x42, 0x3C, 0x28, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+		0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-16dB*/
+	{0x48, 0x46, 0x3F, 0x2A, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+		0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-15.5dB*/
+	{0x4D, 0x4A, 0x43, 0x2C, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+		0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-15dB*/
+	{0x51, 0x4F, 0x47, 0x2F, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+		0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-14.5dB*/
+	{0x56, 0x53, 0x4B, 0x32, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+		0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-14dB*/
+	{0x5B, 0x58, 0x50, 0x35, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+		0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-13.5dB*/
+	{0x60, 0x5D, 0x54, 0x38, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+		0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-13dB*/
+	{0x66, 0x63, 0x59, 0x3B, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+		0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-12.5dB*/
+	{0x6C, 0x69, 0x5F, 0x3F, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+		0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-12dB*/
+	{0x73, 0x6F, 0x64, 0x42, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+		0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-11.5dB*/
+	{0x79, 0x76, 0x6A, 0x46, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+		0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-11dB*/
+	{0x81, 0x7C, 0x71, 0x4A, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+		0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-10.5dB*/
+	{0x88, 0x84, 0x77, 0x4F, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+		0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-10dB*/
+	{0x90, 0x8C, 0x7E, 0x54, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+		0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-9.5dB*/
+	{0x99, 0x94, 0x86, 0x58, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+		0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-9dB*/
+	{0xA2, 0x9D, 0x8E, 0x5E, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+		0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-8.5dB*/
+	{0xAC, 0xA6, 0x96, 0x63, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+		0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-8dB*/
+	{0xB6, 0xB0, 0x9F, 0x69, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+		0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-7.5dB*/
+	{0xC1, 0xBA, 0xA8, 0x6F, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+		0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-7dB*/
+	{0xCC, 0xC5, 0xB2, 0x76, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+		0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-6.5dB*/
+	{0xD8, 0xD1, 0xBD, 0x7D, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+		0x00, 0x00, 0x00, 0x00, 0x00, 0x00} /*-6dB*/
 };
 
-
 u8 cck_swing_table_ch1_ch13_new[CCK_TABLE_SIZE][8] = {
-	{0x09, 0x08, 0x07, 0x06, 0x04, 0x03, 0x01, 0x01},	/*  0, -16.0dB*/
-	{0x09, 0x09, 0x08, 0x06, 0x05, 0x03, 0x01, 0x01},	/*   1, -15.5dB*/
-	{0x0a, 0x09, 0x08, 0x07, 0x05, 0x03, 0x02, 0x01},	/*  2, -15.0dB*/
-	{0x0a, 0x0a, 0x09, 0x07, 0x05, 0x03, 0x02, 0x01},	/*   3, -14.5dB*/
-	{0x0b, 0x0a, 0x09, 0x08, 0x06, 0x04, 0x02, 0x01},	/*   4, -14.0dB*/
-	{0x0b, 0x0b, 0x0a, 0x08, 0x06, 0x04, 0x02, 0x01},	/*   5, -13.5dB*/
-	{0x0c, 0x0c, 0x0a, 0x09, 0x06, 0x04, 0x02, 0x01},	/*   6, -13.0dB*/
-	{0x0d, 0x0c, 0x0b, 0x09, 0x07, 0x04, 0x02, 0x01},	/*   7, -12.5dB*/
-	{0x0d, 0x0d, 0x0c, 0x0a, 0x07, 0x05, 0x02, 0x01},	/*  8, -12.0dB*/
-	{0x0e, 0x0e, 0x0c, 0x0a, 0x08, 0x05, 0x02, 0x01},	/*   9, -11.5dB*/
-	{0x0f, 0x0f, 0x0d, 0x0b, 0x08, 0x05, 0x03, 0x01},	/*  10, -11.0dB*/
-	{0x10, 0x10, 0x0e, 0x0b, 0x08, 0x05, 0x03, 0x01},	/*  11, -10.5dB*/
-	{0x11, 0x11, 0x0f, 0x0c, 0x09, 0x06, 0x03, 0x01},	/*  12, -10.0dB*/
-	{0x12, 0x12, 0x0f, 0x0c, 0x09, 0x06, 0x03, 0x01},	/*  13, -9.5dB*/
-	{0x13, 0x13, 0x10, 0x0d, 0x0a, 0x06, 0x03, 0x01},	/*  14, -9.0dB */
-	{0x14, 0x14, 0x11, 0x0e, 0x0b, 0x07, 0x03, 0x02},	/*  15, -8.5dB*/
-	{0x16, 0x15, 0x12, 0x0f, 0x0b, 0x07, 0x04, 0x01},	/*  16, -8.0dB */
-	{0x17, 0x16, 0x13, 0x10, 0x0c, 0x08, 0x04, 0x02},	/*  17, -7.5dB*/
-	{0x18, 0x17, 0x15, 0x11, 0x0c, 0x08, 0x04, 0x02},	/*  18, -7.0dB */
-	{0x1a, 0x19, 0x16, 0x12, 0x0d, 0x09, 0x04, 0x02},	/*  19, -6.5dB*/
-	{0x1b, 0x1a, 0x17, 0x13, 0x0e, 0x09, 0x04, 0x02},	/*20, -6.0dB */
-	{0x1d, 0x1c, 0x18, 0x14, 0x0f, 0x0a, 0x05, 0x02},	/*  21, -5.5dB*/
-	{0x1f, 0x1e, 0x1a, 0x15, 0x10, 0x0a, 0x05, 0x02},	/* 22, -5.0dB */
-	{0x20, 0x20, 0x1b, 0x16, 0x11, 0x08, 0x05, 0x02},	/*  23, -4.5dB*/
-	{0x22, 0x21, 0x1d, 0x18, 0x11, 0x0b, 0x06, 0x02},	/*  24, -4.0dB */
-	{0x24, 0x23, 0x1f, 0x19, 0x13, 0x0c, 0x06, 0x03},	/*  25, -3.5dB*/
-	{0x26, 0x25, 0x21, 0x1b, 0x14, 0x0d, 0x06, 0x03},	/*  26, -3.0dB*/
-	{0x28, 0x28, 0x22, 0x1c, 0x15, 0x0d, 0x07, 0x03},	/*  27, -2.5dB*/
-	{0x2b, 0x2a, 0x25, 0x1e, 0x16, 0x0e, 0x07, 0x03},	/*  28, -2.0dB */
-	{0x2d, 0x2d, 0x27, 0x1f, 0x18, 0x0f, 0x08, 0x03},	/*  29, -1.5dB*/
-	{0x30, 0x2f, 0x29, 0x21, 0x19, 0x10, 0x08, 0x03},	/*  30, -1.0dB*/
-	{0x33, 0x32, 0x2b, 0x23, 0x1a, 0x11, 0x08, 0x04},	/*  31, -0.5dB*/
-	{0x36, 0x35, 0x2e, 0x25, 0x1c, 0x12, 0x09, 0x04}	/*  32, +0dB*/
+	{0x09, 0x08, 0x07, 0x06, 0x04, 0x03, 0x01, 0x01}, /*   0, -16.0dB*/
+	{0x09, 0x09, 0x08, 0x06, 0x05, 0x03, 0x01, 0x01}, /*   1, -15.5dB*/
+	{0x0a, 0x09, 0x08, 0x07, 0x05, 0x03, 0x02, 0x01}, /*   2, -15.0dB*/
+	{0x0a, 0x0a, 0x09, 0x07, 0x05, 0x03, 0x02, 0x01}, /*   3, -14.5dB*/
+	{0x0b, 0x0a, 0x09, 0x08, 0x06, 0x04, 0x02, 0x01}, /*   4, -14.0dB*/
+	{0x0b, 0x0b, 0x0a, 0x08, 0x06, 0x04, 0x02, 0x01}, /*   5, -13.5dB*/
+	{0x0c, 0x0c, 0x0a, 0x09, 0x06, 0x04, 0x02, 0x01}, /*   6, -13.0dB*/
+	{0x0d, 0x0c, 0x0b, 0x09, 0x07, 0x04, 0x02, 0x01}, /*   7, -12.5dB*/
+	{0x0d, 0x0d, 0x0c, 0x0a, 0x07, 0x05, 0x02, 0x01}, /*   8, -12.0dB*/
+	{0x0e, 0x0e, 0x0c, 0x0a, 0x08, 0x05, 0x02, 0x01}, /*   9, -11.5dB*/
+	{0x0f, 0x0f, 0x0d, 0x0b, 0x08, 0x05, 0x03, 0x01}, /*  10, -11.0dB*/
+	{0x10, 0x10, 0x0e, 0x0b, 0x08, 0x05, 0x03, 0x01}, /*  11, -10.5dB*/
+	{0x11, 0x11, 0x0f, 0x0c, 0x09, 0x06, 0x03, 0x01}, /*  12, -10.0dB*/
+	{0x12, 0x12, 0x0f, 0x0c, 0x09, 0x06, 0x03, 0x01}, /*  13, -9.5dB*/
+	{0x13, 0x13, 0x10, 0x0d, 0x0a, 0x06, 0x03, 0x01}, /*  14, -9.0dB */
+	{0x14, 0x14, 0x11, 0x0e, 0x0b, 0x07, 0x03, 0x02}, /*  15, -8.5dB*/
+	{0x16, 0x15, 0x12, 0x0f, 0x0b, 0x07, 0x04, 0x01}, /*  16, -8.0dB */
+	{0x17, 0x16, 0x13, 0x10, 0x0c, 0x08, 0x04, 0x02}, /*  17, -7.5dB*/
+	{0x18, 0x17, 0x15, 0x11, 0x0c, 0x08, 0x04, 0x02}, /*  18, -7.0dB */
+	{0x1a, 0x19, 0x16, 0x12, 0x0d, 0x09, 0x04, 0x02}, /*  19, -6.5dB*/
+	{0x1b, 0x1a, 0x17, 0x13, 0x0e, 0x09, 0x04, 0x02}, /*  20, -6.0dB */
+	{0x1d, 0x1c, 0x18, 0x14, 0x0f, 0x0a, 0x05, 0x02}, /*  21, -5.5dB*/
+	{0x1f, 0x1e, 0x1a, 0x15, 0x10, 0x0a, 0x05, 0x02}, /*  22, -5.0dB */
+	{0x20, 0x20, 0x1b, 0x16, 0x11, 0x08, 0x05, 0x02}, /*  23, -4.5dB*/
+	{0x22, 0x21, 0x1d, 0x18, 0x11, 0x0b, 0x06, 0x02}, /*  24, -4.0dB */
+	{0x24, 0x23, 0x1f, 0x19, 0x13, 0x0c, 0x06, 0x03}, /*  25, -3.5dB*/
+	{0x26, 0x25, 0x21, 0x1b, 0x14, 0x0d, 0x06, 0x03}, /*  26, -3.0dB*/
+	{0x28, 0x28, 0x22, 0x1c, 0x15, 0x0d, 0x07, 0x03}, /*  27, -2.5dB*/
+	{0x2b, 0x2a, 0x25, 0x1e, 0x16, 0x0e, 0x07, 0x03}, /*  28, -2.0dB */
+	{0x2d, 0x2d, 0x27, 0x1f, 0x18, 0x0f, 0x08, 0x03}, /*  29, -1.5dB*/
+	{0x30, 0x2f, 0x29, 0x21, 0x19, 0x10, 0x08, 0x03}, /*  30, -1.0dB*/
+	{0x33, 0x32, 0x2b, 0x23, 0x1a, 0x11, 0x08, 0x04}, /*  31, -0.5dB*/
+	{0x36, 0x35, 0x2e, 0x25, 0x1c, 0x12, 0x09, 0x04} /*   32, +0dB*/
 };
 
-
 u8 cck_swing_table_ch14_new[CCK_TABLE_SIZE][8] = {
-	{0x09, 0x08, 0x07, 0x04, 0x00, 0x00, 0x00, 0x00},	/*  0, -16.0dB*/
-	{0x09, 0x09, 0x08, 0x05, 0x00, 0x00, 0x00, 0x00},	/* 1, -15.5dB*/
-	{0x0a, 0x09, 0x08, 0x05, 0x00, 0x00, 0x00, 0x00},	/*  2, -15.0dB*/
-	{0x0a, 0x0a, 0x09, 0x05, 0x00, 0x00, 0x00, 0x00},	/* 3, -14.5dB*/
-	{0x0b, 0x0a, 0x09, 0x05, 0x00, 0x00, 0x00, 0x00},	/*  4, -14.0dB*/
-	{0x0b, 0x0b, 0x0a, 0x06, 0x00, 0x00, 0x00, 0x00},	/*5, -13.5dB*/
-	{0x0c, 0x0c, 0x0a, 0x06, 0x00, 0x00, 0x00, 0x00},	/* 6, -13.0dB*/
-	{0x0d, 0x0c, 0x0b, 0x06, 0x00, 0x00, 0x00, 0x00},	/*  7, -12.5dB*/
-	{0x0d, 0x0d, 0x0c, 0x07, 0x00, 0x00, 0x00, 0x00},	/* 8, -12.0dB*/
-	{0x0e, 0x0e, 0x0c, 0x07, 0x00, 0x00, 0x00, 0x00},	/* 9, -11.5dB*/
-	{0x0f, 0x0f, 0x0d, 0x08, 0x00, 0x00, 0x00, 0x00},	/* 10, -11.0dB*/
-	{0x10, 0x10, 0x0e, 0x08, 0x00, 0x00, 0x00, 0x00},	/*11, -10.5dB*/
-	{0x11, 0x11, 0x0f, 0x09, 0x00, 0x00, 0x00, 0x00},	/* 12, -10.0dB*/
-	{0x12, 0x12, 0x0f, 0x09, 0x00, 0x00, 0x00, 0x00},	/* 13, -9.5dB*/
-	{0x13, 0x13, 0x10, 0x0a, 0x00, 0x00, 0x00, 0x00},	/*14, -9.0dB */
-	{0x14, 0x14, 0x11, 0x0a, 0x00, 0x00, 0x00, 0x00},	/* 15, -8.5dB*/
-	{0x16, 0x15, 0x12, 0x0b, 0x00, 0x00, 0x00, 0x00},	/* 16, -8.0dB */
-	{0x17, 0x16, 0x13, 0x0b, 0x00, 0x00, 0x00, 0x00},	/* 17, -7.5dB*/
-	{0x18, 0x17, 0x15, 0x0c, 0x00, 0x00, 0x00, 0x00},	/* 18, -7.0dB */
-	{0x1a, 0x19, 0x16, 0x0d, 0x00, 0x00, 0x00, 0x00},	/* 19, -6.5dB */
-	{0x1b, 0x1a, 0x17, 0x0e, 0x00, 0x00, 0x00, 0x00},	/* 20, -6.0dB */
-	{0x1d, 0x1c, 0x18, 0x0e, 0x00, 0x00, 0x00, 0x00},	/* 21, -5.5dB*/
-	{0x1f, 0x1e, 0x1a, 0x0f, 0x00, 0x00, 0x00, 0x00},	/* 22, -5.0dB */
-	{0x20, 0x20, 0x1b, 0x10, 0x00, 0x00, 0x00, 0x00},	/*23, -4.5dB*/
-	{0x22, 0x21, 0x1d, 0x11, 0x00, 0x00, 0x00, 0x00},	/* 24, -4.0dB */
-	{0x24, 0x23, 0x1f, 0x12, 0x00, 0x00, 0x00, 0x00},	/* 25, -3.5dB */
-	{0x26, 0x25, 0x21, 0x13, 0x00, 0x00, 0x00, 0x00},	/* 26, -3.0dB */
-	{0x28, 0x28, 0x24, 0x14, 0x00, 0x00, 0x00, 0x00},	/*27, -2.5dB*/
-	{0x2b, 0x2a, 0x25, 0x15, 0x00, 0x00, 0x00, 0x00},	/* 28, -2.0dB */
-	{0x2d, 0x2d, 0x17, 0x17, 0x00, 0x00, 0x00, 0x00},	/*29, -1.5dB*/
-	{0x30, 0x2f, 0x29, 0x18, 0x00, 0x00, 0x00, 0x00},	/* 30, -1.0dB */
-	{0x33, 0x32, 0x2b, 0x19, 0x00, 0x00, 0x00, 0x00},	/* 31, -0.5dB */
-	{0x36, 0x35, 0x2e, 0x1b, 0x00, 0x00, 0x00, 0x00}	/* 32, +0dB	*/
+	{0x09, 0x08, 0x07, 0x04, 0x00, 0x00, 0x00, 0x00}, /*  0, -16.0dB*/
+	{0x09, 0x09, 0x08, 0x05, 0x00, 0x00, 0x00, 0x00}, /* 1, -15.5dB*/
+	{0x0a, 0x09, 0x08, 0x05, 0x00, 0x00, 0x00, 0x00}, /*  2, -15.0dB*/
+	{0x0a, 0x0a, 0x09, 0x05, 0x00, 0x00, 0x00, 0x00}, /* 3, -14.5dB*/
+	{0x0b, 0x0a, 0x09, 0x05, 0x00, 0x00, 0x00, 0x00}, /*  4, -14.0dB*/
+	{0x0b, 0x0b, 0x0a, 0x06, 0x00, 0x00, 0x00, 0x00}, /*5, -13.5dB*/
+	{0x0c, 0x0c, 0x0a, 0x06, 0x00, 0x00, 0x00, 0x00}, /* 6, -13.0dB*/
+	{0x0d, 0x0c, 0x0b, 0x06, 0x00, 0x00, 0x00, 0x00}, /*  7, -12.5dB*/
+	{0x0d, 0x0d, 0x0c, 0x07, 0x00, 0x00, 0x00, 0x00}, /* 8, -12.0dB*/
+	{0x0e, 0x0e, 0x0c, 0x07, 0x00, 0x00, 0x00, 0x00}, /* 9, -11.5dB*/
+	{0x0f, 0x0f, 0x0d, 0x08, 0x00, 0x00, 0x00, 0x00}, /* 10, -11.0dB*/
+	{0x10, 0x10, 0x0e, 0x08, 0x00, 0x00, 0x00, 0x00}, /*11, -10.5dB*/
+	{0x11, 0x11, 0x0f, 0x09, 0x00, 0x00, 0x00, 0x00}, /* 12, -10.0dB*/
+	{0x12, 0x12, 0x0f, 0x09, 0x00, 0x00, 0x00, 0x00}, /* 13, -9.5dB*/
+	{0x13, 0x13, 0x10, 0x0a, 0x00, 0x00, 0x00, 0x00}, /*14, -9.0dB */
+	{0x14, 0x14, 0x11, 0x0a, 0x00, 0x00, 0x00, 0x00}, /* 15, -8.5dB*/
+	{0x16, 0x15, 0x12, 0x0b, 0x00, 0x00, 0x00, 0x00}, /* 16, -8.0dB */
+	{0x17, 0x16, 0x13, 0x0b, 0x00, 0x00, 0x00, 0x00}, /* 17, -7.5dB*/
+	{0x18, 0x17, 0x15, 0x0c, 0x00, 0x00, 0x00, 0x00}, /* 18, -7.0dB */
+	{0x1a, 0x19, 0x16, 0x0d, 0x00, 0x00, 0x00, 0x00}, /* 19, -6.5dB */
+	{0x1b, 0x1a, 0x17, 0x0e, 0x00, 0x00, 0x00, 0x00}, /* 20, -6.0dB */
+	{0x1d, 0x1c, 0x18, 0x0e, 0x00, 0x00, 0x00, 0x00}, /* 21, -5.5dB*/
+	{0x1f, 0x1e, 0x1a, 0x0f, 0x00, 0x00, 0x00, 0x00}, /* 22, -5.0dB */
+	{0x20, 0x20, 0x1b, 0x10, 0x00, 0x00, 0x00, 0x00}, /*23, -4.5dB*/
+	{0x22, 0x21, 0x1d, 0x11, 0x00, 0x00, 0x00, 0x00}, /* 24, -4.0dB */
+	{0x24, 0x23, 0x1f, 0x12, 0x00, 0x00, 0x00, 0x00}, /* 25, -3.5dB */
+	{0x26, 0x25, 0x21, 0x13, 0x00, 0x00, 0x00, 0x00}, /* 26, -3.0dB */
+	{0x28, 0x28, 0x24, 0x14, 0x00, 0x00, 0x00, 0x00}, /*27, -2.5dB*/
+	{0x2b, 0x2a, 0x25, 0x15, 0x00, 0x00, 0x00, 0x00}, /* 28, -2.0dB */
+	{0x2d, 0x2d, 0x17, 0x17, 0x00, 0x00, 0x00, 0x00}, /*29, -1.5dB*/
+	{0x30, 0x2f, 0x29, 0x18, 0x00, 0x00, 0x00, 0x00}, /* 30, -1.0dB */
+	{0x33, 0x32, 0x2b, 0x19, 0x00, 0x00, 0x00, 0x00}, /* 31, -0.5dB */
+	{0x36, 0x35, 0x2e, 0x1b, 0x00, 0x00, 0x00, 0x00} /* 32, +0dB	*/
 };
+
 u32 cck_swing_table_ch1_ch14_8723d[CCK_TABLE_SIZE_8723D] = {
-	0x0CD,          /*0 ,    -20dB*/
+	0x0CD, /*0 ,    -20dB*/
 	0x0D9,
 	0x0E6,
 	0x0F3,
@@ -374,9 +444,10 @@ u32 cck_swing_table_ch1_ch14_8723d[CCK_TABLE_SIZE_8723D] = {
 	0x78C,
 	0x7FF,
 };
-/* JJ ADD 20161014 */
+
+/*@JJ ADD 20161014 */
 u32 cck_swing_table_ch1_ch14_8710b[CCK_TABLE_SIZE_8710B] = {
-	0x0CD,          /*0 ,    -20dB*/
+	0x0CD, /*0 ,    -20dB*/
 	0x0D9,
 	0x0E6,
 	0x0F3,
@@ -419,6 +490,50 @@ u32 cck_swing_table_ch1_ch14_8710b[CCK_TABLE_SIZE_8710B] = {
 	0x7FF,
 };
 
+/*@Winnita ADD 20171116 PathA 0xAB4[10:0],PathB 0xAB4[21:11]*/
+u32 cck_swing_table_ch1_ch14_8192f[CCK_TABLE_SIZE_8192F] = {
+	0x0CD, /*0 ,    -20dB*/
+	0x0D9,
+	0x0E6,
+	0x0F3,
+	0x102,
+	0x111,
+	0x121,
+	0x132,
+	0x144,
+	0x158,
+	0x16C,
+	0x182,
+	0x198,
+	0x1B1,
+	0x1CA,
+	0x1E5,
+	0x202,
+	0x221,
+	0x241,
+	0x263, /*19*/
+	0x287, /*20*/
+	0x2AE, /*21*/
+	0x2D6, /*22*/
+	0x301, /*23*/
+	0x32F, /*24*/
+	0x35F, /*25*/
+	0x392, /*26*/
+	0x3C9, /*27*/
+	0x402, /*28*/
+	0x43F, /*29*/
+	0x47F, /*30*/
+	0x4C3, /*31*/
+	0x50C, /*32*/
+	0x558, /*33*/
+	0x5A9, /*34*/
+	0x5FF, /*35*/
+	0x65A, /*36*/
+	0x6BA,
+	0x720,
+	0x78C,
+	0x7FF,
+};
 
 u32 tx_scaling_table_jaguar[TXSCALE_TABLE_SIZE] = {
 	0x081, /* 0,  -12.0dB*/
@@ -449,7 +564,7 @@ u32 tx_scaling_table_jaguar[TXSCALE_TABLE_SIZE] = {
 	0x21E, /* 25, +0.5dB*/
 	0x23E, /* 26, +1.0dB*/
 	0x261, /* 27, +1.5dB*/
-	0x285,/* 28, +2.0dB*/
+	0x285, /* 28, +2.0dB*/
 	0x2AB, /* 29, +2.5dB*/
 	0x2D3, /*30, +3.0dB*/
 	0x2FE, /* 31, +3.5dB*/
@@ -457,91 +572,93 @@ u32 tx_scaling_table_jaguar[TXSCALE_TABLE_SIZE] = {
 	0x35C, /* 33, +4.5dB*/
 	0x38E, /* 34, +5.0dB*/
 	0x3C4, /* 35, +5.5dB*/
-	0x3FE  /* 36, +6.0dB	*/
+	0x3FE /* 36, +6.0dB	*/
 };
 
-void
-odm_txpowertracking_init(
-	void	*p_dm_void
-)
-{
-	struct PHY_DM_STRUCT		*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-#if (DM_ODM_SUPPORT_TYPE & (ODM_AP))
-	if (!(p_dm->support_ic_type & (ODM_RTL8814A | ODM_IC_11N_SERIES | ODM_RTL8822B)))
-		return;
+#if (DM_ODM_SUPPORT_TYPE == ODM_CE) && defined(DM_ODM_CE_MAC80211)
+#else
+u8 delta_swing_table_idx_2ga_p_8188e[] = {0, 0, 0, 0, 1, 1, 2, 2, 3, 3,
+					  4, 4, 4, 4, 4, 4, 4, 4, 5, 5,
+					  7, 7, 8, 8, 8, 9, 9, 9, 9, 9};
+u8 delta_swing_table_idx_2ga_n_8188e[] = {0, 0, 0, 2, 2, 3, 3, 4, 4, 4,
+					  4, 5, 5, 6, 6, 7, 7, 7, 7, 8,
+					  8, 9, 9, 10, 10, 10, 11, 11, 11, 11};
 #endif
 
-	odm_txpowertracking_thermal_meter_init(p_dm);
+void odm_txpowertracking_init(void *dm_void)
+{
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+
+	odm_txpowertracking_thermal_meter_init(dm);
 }
 
-u8
-get_swing_index(
-	void	*p_dm_void
-)
+u8 get_swing_index(void *dm_void)
 {
-	struct PHY_DM_STRUCT		*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
 #if ((RTL8812A_SUPPORT == 1) || (RTL8821A_SUPPORT == 1))
-	struct _ADAPTER		*adapter = p_dm->adapter;
-	HAL_DATA_TYPE	*p_hal_data = GET_HAL_DATA(adapter);
+	void *adapter = dm->adapter;
+	HAL_DATA_TYPE *hal_data = GET_HAL_DATA(adapter);
 #endif
-	u8			i = 0;
-	u32			bb_swing;
-	u32			swing_table_size;
-	u32			*p_swing_table;
-
-	if (p_dm->support_ic_type == ODM_RTL8188E || p_dm->support_ic_type == ODM_RTL8723B
-	    || p_dm->support_ic_type == ODM_RTL8192E || p_dm->support_ic_type == ODM_RTL8188F || p_dm->support_ic_type == ODM_RTL8703B || p_dm->support_ic_type == ODM_RTL8723D || p_dm->support_ic_type == ODM_RTL8710B
-	   ) {
-		bb_swing = odm_get_bb_reg(p_dm, REG_OFDM_0_XA_TX_IQ_IMBALANCE, 0xFFC00000);
-
-		p_swing_table = ofdm_swing_table_new;
-		swing_table_size = OFDM_TABLE_SIZE;
+	u8 i = 0;
+	u32 bb_swing, table_value;
+
+	if (dm->support_ic_type &
+		(ODM_RTL8188E | ODM_RTL8723B | ODM_RTL8192E |
+		ODM_RTL8188F | ODM_RTL8703B | ODM_RTL8723D |
+		ODM_RTL8710B | ODM_RTL8821)) {
+#if (RTL8821A_SUPPORT == 1)
+		bb_swing =
+		phy_get_tx_bb_swing_8812a(adapter,
+					  hal_data->current_band_type,
+					  RF_PATH_A);
+#else
+		bb_swing = odm_get_bb_reg(dm, R_0xc80, 0xFFC00000);
+#endif
+		for (i = 0; i < OFDM_TABLE_SIZE; i++) {
+			table_value = ofdm_swing_table_new[i];
+
+			if (table_value >= 0x100000)
+				table_value >>= 22;
+			if (bb_swing == table_value)
+				break;
+		}
 	} else {
-#if ((RTL8812A_SUPPORT == 1) || (RTL8821A_SUPPORT == 1))
-		if (p_dm->support_ic_type == ODM_RTL8812 || p_dm->support_ic_type == ODM_RTL8821) {
-			bb_swing = phy_get_tx_bb_swing_8812a(adapter, p_hal_data->current_band_type, RF_PATH_A);
-			p_swing_table = tx_scaling_table_jaguar;
-			swing_table_size = TXSCALE_TABLE_SIZE;
-		} else
+#if (RTL8812A_SUPPORT == 1)
+		bb_swing =
+		phy_get_tx_bb_swing_8812a(adapter,
+					  hal_data->current_band_type,
+					  RF_PATH_A);
+#else
+		bb_swing = odm_get_bb_reg(dm, R_0xc1c, 0xFFE00000);
 #endif
-		{
-			bb_swing = 0;
-			p_swing_table = ofdm_swing_table;
-			swing_table_size = OFDM_TABLE_SIZE;
+		for (i = 0; i < TXSCALE_TABLE_SIZE; i++) {
+			table_value = tx_scaling_table_jaguar[i];
+
+			if (bb_swing == table_value)
+				break;
 		}
 	}
 
-	for (i = 0; i < swing_table_size; ++i) {
-		u32 table_value = p_swing_table[i];
-
-		if (table_value >= 0x100000)
-			table_value >>= 22;
-		if (bb_swing == table_value)
-			break;
-	}
 	return i;
 }
 
-u8
-get_cck_swing_index(
-	void		*p_dm_void
-)
+u8 get_cck_swing_index(void *dm_void)
 {
-	struct PHY_DM_STRUCT		*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
 
-	u8			i = 0;
-	u32			bb_cck_swing;
+	u8 i = 0;
+	u32 bb_cck_swing;
 
-	if (p_dm->support_ic_type == ODM_RTL8188E || p_dm->support_ic_type == ODM_RTL8723B ||
-	    p_dm->support_ic_type == ODM_RTL8192E) {
-		bb_cck_swing = odm_read_1byte(p_dm, 0xa22);
+	if (dm->support_ic_type &
+		(ODM_RTL8188E | ODM_RTL8723B | ODM_RTL8192E)) {
+		bb_cck_swing = odm_read_1byte(dm, 0xa22);
 
 		for (i = 0; i < CCK_TABLE_SIZE; i++) {
 			if (bb_cck_swing == cck_swing_table_ch1_ch13_new[i][0])
 				break;
 		}
-	} else if (p_dm->support_ic_type == ODM_RTL8703B) {
-		bb_cck_swing = odm_read_1byte(p_dm, 0xa22);
+	} else if (dm->support_ic_type & ODM_RTL8703B) {
+		bb_cck_swing = odm_read_1byte(dm, 0xa22);
 
 		for (i = 0; i < CCK_TABLE_SIZE_88F; i++) {
 			if (bb_cck_swing == cck_swing_table_ch1_ch14_88f[i][0])
@@ -552,204 +669,199 @@ get_cck_swing_index(
 	return i;
 }
 
-
-void
-odm_txpowertracking_thermal_meter_init(
-	void	*p_dm_void
-)
+void odm_txpowertracking_thermal_meter_init(void *dm_void)
 {
-	struct PHY_DM_STRUCT		*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	u8 default_swing_index = get_swing_index(p_dm);
-	u8 default_cck_swing_index = get_cck_swing_index(p_dm);
-	u8			p = 0;
-	struct odm_rf_calibration_structure	*p_rf_calibrate_info = &(p_dm->rf_calibrate_info);
-#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
-	struct _ADAPTER		*adapter = p_dm->adapter;
-	HAL_DATA_TYPE	*p_hal_data = GET_HAL_DATA(adapter);
-
-	if (*(p_dm->p_mp_mode) == false)
-		p_hal_data->txpowertrack_control = true;
-#elif (DM_ODM_SUPPORT_TYPE == ODM_CE)
-#ifdef DM_ODM_CE_MAC80211
-	struct rtl_priv *rtlpriv = (struct rtl_priv *)p_dm->adapter;
-	struct rtl_efuse *rtlefu = rtl_efuse(rtlpriv);
-#else
-	struct _ADAPTER		*adapter = p_dm->adapter;
-	HAL_DATA_TYPE	*p_hal_data = GET_HAL_DATA(adapter);
-#endif
-
-	p_rf_calibrate_info->is_txpowertracking = true;
-	p_rf_calibrate_info->tx_powercount = 0;
-	p_rf_calibrate_info->is_txpowertracking_init = false;
-
-	if (*(p_dm->p_mp_mode) == false)
-		p_rf_calibrate_info->txpowertrack_control = true;
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	u8 swing_idx = get_swing_index(dm);
+	u8 cckswing_idx = get_cck_swing_index(dm);
+	u8 p = 0;
+	struct dm_rf_calibration_struct *cali_info = &dm->rf_calibrate_info;
+	struct _hal_rf_ *rf = &dm->rf_table;
+
+	cali_info->is_txpowertracking = true;
+	cali_info->tx_powercount = 0;
+	cali_info->is_txpowertracking_init = false;
+
+	if (!(*dm->mp_mode))
+		cali_info->txpowertrack_control = true;
 	else
-		p_rf_calibrate_info->txpowertrack_control = false;
-
-	if (*(p_dm->p_mp_mode) == false)
-		p_rf_calibrate_info->txpowertrack_control = true;
+		cali_info->txpowertrack_control = false;
 
-	ODM_RT_TRACE(p_dm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("p_dm txpowertrack_control = %d\n", p_rf_calibrate_info->txpowertrack_control));
+	if (!(*dm->mp_mode))
+		cali_info->txpowertrack_control = true;
 
-#elif (DM_ODM_SUPPORT_TYPE & (ODM_AP))
-#ifdef RTL8188E_SUPPORT
-	{
-		p_rf_calibrate_info->is_txpowertracking = true;
-		p_rf_calibrate_info->tx_powercount = 0;
-		p_rf_calibrate_info->is_txpowertracking_init = false;
-		p_rf_calibrate_info->txpowertrack_control = true;
-	}
-#endif
+	RF_DBG(dm, DBG_RF_IQK, "dm txpowertrack_control = %d\n",
+	       cali_info->txpowertrack_control);
+#if 0
+	/* dm->rf_calibrate_info.txpowertrack_control = true; */
 #endif
-
-	/* p_dm->rf_calibrate_info.txpowertrack_control = true; */
-#if (DM_ODM_SUPPORT_TYPE == ODM_CE) && defined(DM_ODM_CE_MAC80211)
-	p_rf_calibrate_info->thermal_value = rtlefu->eeprom_thermalmeter;
-	p_rf_calibrate_info->thermal_value_iqk = rtlefu->eeprom_thermalmeter;
-	p_rf_calibrate_info->thermal_value_lck = rtlefu->eeprom_thermalmeter;
-#else
-	p_rf_calibrate_info->thermal_value = p_hal_data->eeprom_thermal_meter;
-	p_rf_calibrate_info->thermal_value_iqk = p_hal_data->eeprom_thermal_meter;
-	p_rf_calibrate_info->thermal_value_lck = p_hal_data->eeprom_thermal_meter;
-#endif
-
-	if (p_rf_calibrate_info->default_bb_swing_index_flag != true) {
-		/*The index of "0 dB" in SwingTable.*/
-		if (p_dm->support_ic_type == ODM_RTL8188E || p_dm->support_ic_type == ODM_RTL8723B ||
-		    p_dm->support_ic_type == ODM_RTL8192E || p_dm->support_ic_type == ODM_RTL8703B) {
-			p_rf_calibrate_info->default_ofdm_index = (default_swing_index >= OFDM_TABLE_SIZE) ? 30 : default_swing_index;
-			p_rf_calibrate_info->default_cck_index = (default_cck_swing_index >= CCK_TABLE_SIZE) ? 20 : default_cck_swing_index;
-		} else if (p_dm->support_ic_type == ODM_RTL8188F) {          /*add by Mingzhi.Guo  2015-03-23*/
-			p_rf_calibrate_info->default_ofdm_index = 28;							/*OFDM: -1dB*/
-			p_rf_calibrate_info->default_cck_index = 20;							/*CCK:-6dB*/
-		} else if (p_dm->support_ic_type == ODM_RTL8723D) {			 /*add by zhaohe  2015-10-27*/
-			p_rf_calibrate_info->default_ofdm_index = 28;						 	   /*OFDM: -1dB*/
-			p_rf_calibrate_info->default_cck_index = 28;							/*CCK:   -6dB*/
-		} else if (p_dm->support_ic_type == ODM_RTL8710B) {		/* JJ ADD 20161014 */
-			p_rf_calibrate_info->default_ofdm_index = 28;						 	   /*OFDM: -1dB*/
-			p_rf_calibrate_info->default_cck_index = 28;							   /*CCK:   -6dB*/
+	cali_info->thermal_value = rf->eeprom_thermal;
+	cali_info->thermal_value_iqk = rf->eeprom_thermal;
+	cali_info->thermal_value_lck = rf->eeprom_thermal;
+
+	if (!cali_info->default_bb_swing_index_flag) {
+		if (dm->support_ic_type &
+			(ODM_RTL8188E | ODM_RTL8723B | ODM_RTL8192E |
+			ODM_RTL8703B | ODM_RTL8821)) {
+			if (swing_idx >= OFDM_TABLE_SIZE)
+				cali_info->default_ofdm_index = 30;
+			else
+				cali_info->default_ofdm_index = swing_idx;
+
+			if (cckswing_idx >= CCK_TABLE_SIZE)
+				cali_info->default_cck_index = 20;
+			else
+				cali_info->default_cck_index = cckswing_idx;
+		/*@add by Mingzhi.Guo  2015-03-23*/
+		} else if (dm->support_ic_type == ODM_RTL8188F) {
+			cali_info->default_ofdm_index = 28; /*OFDM: -1dB*/
+			cali_info->default_cck_index = 20; /*CCK:-6dB*/
+		/*@add by zhaohe  2015-10-27*/
+		} else if (dm->support_ic_type == ODM_RTL8723D) {
+			cali_info->default_ofdm_index = 28; /*OFDM: -1dB*/
+			cali_info->default_cck_index = 28; /*CCK:   -6dB*/
+		/*@JJ ADD 20161014 */
+		} else if (dm->support_ic_type == ODM_RTL8710B) {
+			cali_info->default_ofdm_index = 28; /*OFDM: -1dB*/
+			cali_info->default_cck_index = 28; /*CCK:   -6dB*/
+		} else if (dm->support_ic_type == ODM_RTL8192F) {
+			cali_info->default_ofdm_index = 30;/*OFDM: 0dB*/
+			cali_info->default_cck_index = 28; /*CCK:   -6dB*/
 		} else {
-			p_rf_calibrate_info->default_ofdm_index = (default_swing_index >= TXSCALE_TABLE_SIZE) ? 24 : default_swing_index;
-			p_rf_calibrate_info->default_cck_index = 24;
+			if (swing_idx >= TXSCALE_TABLE_SIZE)
+				cali_info->default_ofdm_index = 24;
+			else
+				cali_info->default_ofdm_index = swing_idx;
+
+			cali_info->default_cck_index = 24;
 		}
-		p_rf_calibrate_info->default_bb_swing_index_flag = true;
+		cali_info->default_bb_swing_index_flag = true;
 	}
 
-	p_rf_calibrate_info->bb_swing_idx_cck_base = p_rf_calibrate_info->default_cck_index;
-	p_rf_calibrate_info->CCK_index = p_rf_calibrate_info->default_cck_index;
+	cali_info->bb_swing_idx_cck_base = cali_info->default_cck_index;
+	cali_info->CCK_index = cali_info->default_cck_index;
 
 	for (p = RF_PATH_A; p < MAX_RF_PATH; ++p) {
-		p_rf_calibrate_info->bb_swing_idx_ofdm_base[p] = p_rf_calibrate_info->default_ofdm_index;
-		p_rf_calibrate_info->OFDM_index[p] = p_rf_calibrate_info->default_ofdm_index;
-		p_rf_calibrate_info->delta_power_index[p] = 0;
-		p_rf_calibrate_info->delta_power_index_last[p] = 0;
-		p_rf_calibrate_info->power_index_offset[p] = 0;
+		cali_info->bb_swing_idx_ofdm_base[p] =
+						cali_info->default_ofdm_index;
+		cali_info->OFDM_index[p] = cali_info->default_ofdm_index;
+		cali_info->delta_power_index[p] = 0;
+		cali_info->delta_power_index_last[p] = 0;
+		cali_info->power_index_offset[p] = 0;
 	}
-	p_rf_calibrate_info->modify_tx_agc_value_ofdm = 0;
-	p_rf_calibrate_info->modify_tx_agc_value_cck = 0;
-
+	cali_info->modify_tx_agc_value_ofdm = 0;
+	cali_info->modify_tx_agc_value_cck = 0;
+	cali_info->tm_trigger = 0;
 }
 
-
-void
-odm_txpowertracking_check(
-	void	*p_dm_void
-)
+void odm_txpowertracking_check(void *dm_void)
 {
-	/* 2011/09/29 MH In HW integration first stage, we provide 4 different handle to operate
-	at the same time. In the stage2/3, we need to prive universal interface and merge all
-	HW dynamic mechanism. */
-	struct PHY_DM_STRUCT		*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	switch	(p_dm->support_platform) {
-	case	ODM_WIN:
-		odm_txpowertracking_check_mp(p_dm);
+	/*@2011/09/29 MH In HW integration first stage
+	 * we provide 4 different handle to operate at the same time.
+	 * In the stage2/3, we need to prive universal interface and merge all
+	 * HW dynamic mechanism.
+	 */
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+
+	switch (dm->support_platform) {
+	case ODM_WIN:
+		odm_txpowertracking_check_mp(dm);
 		break;
 
-	case	ODM_CE:
-		odm_txpowertracking_check_ce(p_dm);
+	case ODM_CE:
+		odm_txpowertracking_check_ce(dm);
 		break;
 
-	case	ODM_AP:
-		odm_txpowertracking_check_ap(p_dm);
+	case ODM_AP:
+		odm_txpowertracking_check_ap(dm);
 		break;
 
 	default:
 		break;
 	}
-
 }
 
-void
-odm_txpowertracking_check_ce(
-	void	*p_dm_void
-)
+void odm_txpowertracking_check_ce(void *dm_void)
 {
-	struct PHY_DM_STRUCT		*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	struct _hal_rf_				*p_rf = &(p_dm->rf_table);
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct _hal_rf_ *rf = &dm->rf_table;
+
 #if (DM_ODM_SUPPORT_TYPE == ODM_CE)
-	struct _ADAPTER	*adapter = p_dm->adapter;
+	if (!(rf->rf_supportability & HAL_RF_TX_PWR_TRACK))
+		return;
 
+	if (!dm->rf_calibrate_info.tm_trigger) {
+		if (dm->support_ic_type &
+			(ODM_RTL8188E | ODM_RTL8188F | ODM_RTL8192E |
+			ODM_RTL8723B | ODM_RTL8812 | ODM_RTL8821 |
+			ODM_RTL8814A | ODM_RTL8703B | ODM_RTL8723D |
+			ODM_RTL8822B | ODM_RTL8821C | ODM_RTL8710B |
+			ODM_RTL8192F))
+			odm_set_rf_reg(dm, RF_PATH_A, RF_T_METER_NEW,
+				       (BIT(17) | BIT(16)), 0x03);
+		else
+			odm_set_rf_reg(dm, RF_PATH_A, RF_T_METER_OLD,
+				       RFREGOFFSETMASK, 0x60);
 
-	if (!(p_rf->rf_supportability & HAL_RF_TX_PWR_TRACK))
+		dm->rf_calibrate_info.tm_trigger = 1;
+		return;
+	}
+	
+	if (dm->support_ic_type &
+			(ODM_RTL8822C | ODM_RTL8814B))
 		return;
 
-	if (!p_dm->rf_calibrate_info.tm_trigger) {
+	odm_txpowertracking_callback_thermal_meter(dm);
+	dm->rf_calibrate_info.tm_trigger = 0;
+#endif
+}
 
-		if (IS_HARDWARE_TYPE_8188E(adapter) || IS_HARDWARE_TYPE_8188F(adapter) || IS_HARDWARE_TYPE_8192E(adapter)
-		    || IS_HARDWARE_TYPE_8723B(adapter) || IS_HARDWARE_TYPE_JAGUAR(adapter) || IS_HARDWARE_TYPE_8814A(adapter)
-		    || IS_HARDWARE_TYPE_8703B(adapter) || IS_HARDWARE_TYPE_8723D(adapter) || IS_HARDWARE_TYPE_8822B(adapter)
-		    || IS_HARDWARE_TYPE_8821C(adapter)  || (p_dm->support_ic_type == ODM_RTL8710B)
-		   )/* JJ ADD 20161014 */
-			odm_set_rf_reg(p_dm, RF_PATH_A, RF_T_METER_NEW, (BIT(17) | BIT(16)), 0x03);
-		else
-			odm_set_rf_reg(p_dm, RF_PATH_A, RF_T_METER_OLD, RFREGOFFSETMASK, 0x60);
+void odm_txpowertracking_direct_ce(void *dm_void)
+{
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct _hal_rf_ *rf = &dm->rf_table;
+#if (DM_ODM_SUPPORT_TYPE == ODM_CE)
 
+	if (!(rf->rf_supportability & HAL_RF_TX_PWR_TRACK))
+		return;
 
+	if (dm->support_ic_type &
+		(ODM_RTL8188E | ODM_RTL8188F | ODM_RTL8192E |
+		ODM_RTL8723B | ODM_RTL8812 | ODM_RTL8821 |
+		ODM_RTL8814A | ODM_RTL8703B | ODM_RTL8723D |
+		ODM_RTL8822B | ODM_RTL8821C | ODM_RTL8710B |
+		ODM_RTL8192F))
+		odm_set_rf_reg(dm, RF_PATH_A, RF_T_METER_NEW, (BIT(17) | BIT(16)), 0x03);
+	else
+		odm_set_rf_reg(dm, RF_PATH_A, RF_T_METER_OLD, RFREGOFFSETMASK, 0x60);
 
-		p_dm->rf_calibrate_info.tm_trigger = 1;
-		return;
-	} else {
 
-#if (DM_ODM_SUPPORT_TYPE == ODM_CE) && defined(DM_ODM_CE_MAC80211)
-		odm_txpowertracking_callback_thermal_meter(p_dm);
-#else
-		odm_txpowertracking_callback_thermal_meter(adapter);
-#endif
-		p_dm->rf_calibrate_info.tm_trigger = 0;
-	}
+	odm_txpowertracking_callback_thermal_meter(dm);
 
 #endif
 }
 
-void
-odm_txpowertracking_check_mp(
-	void	*p_dm_void
-)
+void odm_txpowertracking_check_mp(void *dm_void)
 {
 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
-	struct PHY_DM_STRUCT		*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	struct _ADAPTER	*adapter = p_dm->adapter;
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	void *adapter = dm->adapter;
 
 	if (odm_check_power_status(adapter) == false) {
-		RT_TRACE(COMP_POWER_TRACKING, DBG_LOUD, ("check_pow_status, return false\n"));
+		RT_TRACE(COMP_POWER_TRACKING, DBG_LOUD,
+			 ("check_pow_status, return false\n"));
 		return;
 	}
 
 	odm_txpowertracking_thermal_meter_check(adapter);
 #endif
-
 }
 
-
-void
-odm_txpowertracking_check_ap(
-	void	*p_dm_void
-)
+void odm_txpowertracking_check_ap(void *dm_void)
 {
 #if (DM_ODM_SUPPORT_TYPE == ODM_AP)
-	struct PHY_DM_STRUCT		*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	struct rtl8192cd_priv	*priv		= p_dm->priv;
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct rtl8192cd_priv *priv = dm->priv;
 
 	return;
 
diff --git a/rtl8723DS/hal/phydm/halrf/halrf_powertracking_ce.h b/rtl8723DS/hal/phydm/halrf/halrf_powertracking_ce.h
index 18e7eb6..4b96ccc 100755..100644
--- a/rtl8723DS/hal/phydm/halrf/halrf_powertracking_ce.h
+++ b/rtl8723DS/hal/phydm/halrf/halrf_powertracking_ce.h
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2007 - 2017 Realtek Corporation.
+ * Copyright(c) 2007 - 2017  Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -8,336 +8,320 @@
  *
  * This program is distributed in the hope that it will be useful, but WITHOUT
  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  * more details.
  *
+ * The full GNU General Public License is included in this distribution in the
+ * file called LICENSE.
+ *
+ * Contact Information:
+ * wlanfae <wlanfae@realtek.com>
+ * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
+ * Hsinchu 300, Taiwan.
+ *
+ * Larry Finger <Larry.Finger@lwfinger.net>
+ *
  *****************************************************************************/
 
-#ifndef	__PHYDMPOWERTRACKING_H__
-#define    __PHYDMPOWERTRACKING_H__
-
-#define HALRF_POWRTRACKING_VER	"1.1"
-
-#define		DPK_DELTA_MAPPING_NUM	13
-#define		index_mapping_HP_NUM	15
-#define	OFDM_TABLE_SIZE	43
-#define	CCK_TABLE_SIZE			33
-#define	CCK_TABLE_SIZE_88F	21
-#define TXSCALE_TABLE_SIZE		37
-#define CCK_TABLE_SIZE_8723D	41
-/* JJ ADD 20161014 */
-#define CCK_TABLE_SIZE_8710B	41
-
-#define TXPWR_TRACK_TABLE_SIZE	30
-#define DELTA_SWINGIDX_SIZE     30
-#define DELTA_SWINTSSI_SIZE     61
-#define BAND_NUM				4
-
-#define AVG_THERMAL_NUM		8
-#define HP_THERMAL_NUM		8
-#define IQK_MAC_REG_NUM		4
-#define IQK_ADDA_REG_NUM		16
-#define IQK_BB_REG_NUM_MAX	10
-
-#define IQK_BB_REG_NUM		9
-
-
-
-#define iqk_matrix_reg_num	8
+#ifndef __HALRF_POWERTRACKING_H__
+#define __HALRF_POWERTRACKING_H__
+
+#define DPK_DELTA_MAPPING_NUM 13
+#define index_mapping_HP_NUM 15
+#define OFDM_TABLE_SIZE 43
+#define CCK_TABLE_SIZE 33
+#define CCK_TABLE_SIZE_88F 21
+#define TXSCALE_TABLE_SIZE 37
+#define CCK_TABLE_SIZE_8723D 41
+/*@JJ ADD 20161014 */
+#define CCK_TABLE_SIZE_8710B 41
+#define CCK_TABLE_SIZE_8192F 41
+
+#define TXPWR_TRACK_TABLE_SIZE 30
+#define DELTA_SWINGIDX_SIZE 30
+#define DELTA_SWINTSSI_SIZE 61
+#define BAND_NUM 4
+
+#define AVG_THERMAL_NUM 8
+#define IQK_MAC_REG_NUM 4
+#define IQK_ADDA_REG_NUM 16
+#define IQK_BB_REG_NUM_MAX 10
+
+#define IQK_BB_REG_NUM 9
+
+#define iqk_matrix_reg_num 8
 #if (DM_ODM_SUPPORT_TYPE == ODM_CE) && defined(DM_ODM_CE_MAC80211)
 #else
-#define IQK_MATRIX_SETTINGS_NUM	(14+24+21) /* Channels_2_4G_NUM + Channels_5G_20M_NUM + Channels_5G */
+/* Channels_2_4G_NUM + Channels_5G_20M_NUM + Channels_5G */
+#define IQK_MATRIX_SETTINGS_NUM (14 + 24 + 21)
 #endif
 
-extern	u32 ofdm_swing_table[OFDM_TABLE_SIZE];
-extern	u8 cck_swing_table_ch1_ch13[CCK_TABLE_SIZE][8];
-extern	u8 cck_swing_table_ch14[CCK_TABLE_SIZE][8];
-
-extern	u32 ofdm_swing_table_new[OFDM_TABLE_SIZE];
-extern	u8 cck_swing_table_ch1_ch13_new[CCK_TABLE_SIZE][8];
-extern	u8 cck_swing_table_ch14_new[CCK_TABLE_SIZE][8];
-extern	u8 cck_swing_table_ch1_ch14_88f[CCK_TABLE_SIZE_88F][16];
-extern	u8 cck_swing_table_ch1_ch13_88f[CCK_TABLE_SIZE_88F][16];
-extern	u8 cck_swing_table_ch14_88f[CCK_TABLE_SIZE_88F][16];
-extern	u32 cck_swing_table_ch1_ch14_8723d[CCK_TABLE_SIZE_8723D];
-/* JJ ADD 20161014 */
-extern	u32 cck_swing_table_ch1_ch14_8710b[CCK_TABLE_SIZE_8710B];
-
-extern  u32 tx_scaling_table_jaguar[TXSCALE_TABLE_SIZE];
-
-/* <20121018, Kordan> In case fail to read TxPowerTrack.txt, we use the table of 88E as the default table. */
+extern u32 ofdm_swing_table[OFDM_TABLE_SIZE];
+extern u8 cck_swing_table_ch1_ch13[CCK_TABLE_SIZE][8];
+extern u8 cck_swing_table_ch14[CCK_TABLE_SIZE][8];
+
+extern u32 ofdm_swing_table_new[OFDM_TABLE_SIZE];
+extern u8 cck_swing_table_ch1_ch13_new[CCK_TABLE_SIZE][8];
+extern u8 cck_swing_table_ch14_new[CCK_TABLE_SIZE][8];
+extern u8 cck_swing_table_ch1_ch14_88f[CCK_TABLE_SIZE_88F][16];
+extern u8 cck_swing_table_ch1_ch13_88f[CCK_TABLE_SIZE_88F][16];
+extern u8 cck_swing_table_ch14_88f[CCK_TABLE_SIZE_88F][16];
+extern u32 cck_swing_table_ch1_ch14_8723d[CCK_TABLE_SIZE_8723D];
+/*@JJ ADD 20161014 */
+extern u32 cck_swing_table_ch1_ch14_8710b[CCK_TABLE_SIZE_8710B];
+extern u32 cck_swing_table_ch1_ch14_8192f[CCK_TABLE_SIZE_8192F];
+
+extern u32 tx_scaling_table_jaguar[TXSCALE_TABLE_SIZE];
+
+/*@<20121018, Kordan> In case fail to read TxPowerTrack.txt */
+/* we use the table of 88E as the default table. */
 #if (DM_ODM_SUPPORT_TYPE == ODM_CE) && defined(DM_ODM_CE_MAC80211)
 #else
-static u8 delta_swing_table_idx_2ga_p_8188e[] = {0, 0, 0, 0, 1, 1, 2, 2, 3, 3, 4, 4, 4,  4,  4,  4,  4,  4,  5,  5,  7,  7,  8,  8,  8,  9,  9,  9,  9,  9};
-static u8 delta_swing_table_idx_2ga_n_8188e[] = {0, 0, 0, 2, 2, 3, 3, 4, 4, 4, 4, 5, 5,  6,  6,  7,  7,  7,  7,  8,  8,  9,  9, 10, 10, 10, 11, 11, 11, 11};
+extern u8 delta_swing_table_idx_2ga_p_8188e[];
+extern u8 delta_swing_table_idx_2ga_n_8188e[];
 #endif
 
-#define dm_check_txpowertracking	odm_txpowertracking_check
+#define dm_check_txpowertracking odm_txpowertracking_check
 
-struct _IQK_MATRIX_REGS_SETTING {
-	boolean	is_iqk_done;
-	s32		value[3][iqk_matrix_reg_num];
-	boolean	is_bw_iqk_result_saved[3];
+struct iqk_matrix_regs_setting {
+	boolean is_iqk_done;
+	s32 value[3][iqk_matrix_reg_num];
+	boolean is_bw_iqk_result_saved[3];
 };
 
-struct odm_rf_calibration_structure {
+struct dm_rf_calibration_struct {
 	/* for tx power tracking */
 
-	u32	rega24; /* for TempCCK */
-	s32	rege94;
-	s32	rege9c;
-	s32	regeb4;
-	s32	regebc;
+	u32 rega24; /* for TempCCK */
+	s32 rege94;
+	s32 rege9c;
+	s32 regeb4;
+	s32 regebc;
 
-	u8	tx_powercount;
+	u8 tx_powercount;
 	boolean is_txpowertracking_init;
 	boolean is_txpowertracking;
-	u8  	txpowertrack_control; /* for mp mode, turn off txpwrtracking as default */
-	u8	tm_trigger;
-	u8  	internal_pa_5g[2];	/* pathA / pathB */
-
-	u8  	thermal_meter[2];    /* thermal_meter, index 0 for RFIC0, and 1 for RFIC1 */
-	u8	thermal_value;
-	u8	thermal_value_lck;
-	u8	thermal_value_iqk;
-	s8  	thermal_value_delta; /* delta of thermal_value and efuse thermal */
-	u8	thermal_value_dpk;
-	u8	thermal_value_avg[AVG_THERMAL_NUM];
-	u8	thermal_value_avg_index;
-	u8	thermal_value_rx_gain;
-	u8	thermal_value_crystal;
-	u8	thermal_value_dpk_store;
-	u8	thermal_value_dpk_track;
-	boolean	txpowertracking_in_progress;
-
-	boolean	is_reloadtxpowerindex;
-	u8	is_rf_pi_enable;
-	u32 	txpowertracking_callback_cnt; /* cosa add for debug */
-
-
-	/* ------------------------- Tx power Tracking ------------------------- */
-	u8	is_cck_in_ch14;
-	u8	CCK_index;
-	u8	OFDM_index[MAX_RF_PATH];
-	s8	power_index_offset[MAX_RF_PATH];
-	s8	delta_power_index[MAX_RF_PATH];
-	s8	delta_power_index_last[MAX_RF_PATH];
+	/* for mp mode, turn off txpwrtracking as default */
+	u8 txpowertrack_control;
+	u8 tm_trigger;
+	u8 internal_pa_5g[2]; /* pathA / pathB */
+
+	/* thermal_meter, index 0 for RFIC0, and 1 for RFIC1 */
+	u8 thermal_meter[2];
+	u8 thermal_value;
+	u8 thermal_value_lck;
+	u8 thermal_value_iqk;
+	s8 thermal_value_delta; /* delta of thermal_value and efuse thermal */
+	u8 thermal_value_dpk;
+	u8 thermal_value_avg[AVG_THERMAL_NUM];
+	u8 thermal_value_avg_index;
+	u8 thermal_value_rx_gain;
+	u8 thermal_value_crystal;
+	u8 thermal_value_dpk_store;
+	u8 thermal_value_dpk_track;
+	boolean txpowertracking_in_progress;
+
+	boolean is_reloadtxpowerindex;
+	u8 is_rf_pi_enable;
+	u32 txpowertracking_callback_cnt; /* cosa add for debug */
+
+	/*@---------------------- Tx power Tracking ---------------------- */
+	u8 is_cck_in_ch14;
+	u8 CCK_index;
+	u8 OFDM_index[MAX_RF_PATH];
+	s8 power_index_offset[MAX_RF_PATH];
+	s8 delta_power_index[MAX_RF_PATH];
+	s8 delta_power_index_last[MAX_RF_PATH];
 	boolean is_tx_power_changed;
-	s8	xtal_offset;
-	s8	xtal_offset_last;
-
-	u8	thermal_value_hp[HP_THERMAL_NUM];
-	u8	thermal_value_hp_index;
-	struct _IQK_MATRIX_REGS_SETTING iqk_matrix_reg_setting[IQK_MATRIX_SETTINGS_NUM];
-	u8	delta_lck;
-	s8  bb_swing_diff_2g, bb_swing_diff_5g; /* Unit: dB */
-	u8  delta_swing_table_idx_2g_cck_a_p[DELTA_SWINGIDX_SIZE];
-	u8  delta_swing_table_idx_2g_cck_a_n[DELTA_SWINGIDX_SIZE];
-	u8  delta_swing_table_idx_2g_cck_b_p[DELTA_SWINGIDX_SIZE];
-	u8  delta_swing_table_idx_2g_cck_b_n[DELTA_SWINGIDX_SIZE];
-	u8  delta_swing_table_idx_2g_cck_c_p[DELTA_SWINGIDX_SIZE];
-	u8  delta_swing_table_idx_2g_cck_c_n[DELTA_SWINGIDX_SIZE];
-	u8  delta_swing_table_idx_2g_cck_d_p[DELTA_SWINGIDX_SIZE];
-	u8  delta_swing_table_idx_2g_cck_d_n[DELTA_SWINGIDX_SIZE];
-	u8  delta_swing_table_idx_2ga_p[DELTA_SWINGIDX_SIZE];
-	u8  delta_swing_table_idx_2ga_n[DELTA_SWINGIDX_SIZE];
-	u8  delta_swing_table_idx_2gb_p[DELTA_SWINGIDX_SIZE];
-	u8  delta_swing_table_idx_2gb_n[DELTA_SWINGIDX_SIZE];
-	u8  delta_swing_table_idx_2gc_p[DELTA_SWINGIDX_SIZE];
-	u8  delta_swing_table_idx_2gc_n[DELTA_SWINGIDX_SIZE];
-	u8  delta_swing_table_idx_2gd_p[DELTA_SWINGIDX_SIZE];
-	u8  delta_swing_table_idx_2gd_n[DELTA_SWINGIDX_SIZE];
-	u8  delta_swing_table_idx_5ga_p[BAND_NUM][DELTA_SWINGIDX_SIZE];
-	u8  delta_swing_table_idx_5ga_n[BAND_NUM][DELTA_SWINGIDX_SIZE];
-	u8  delta_swing_table_idx_5gb_p[BAND_NUM][DELTA_SWINGIDX_SIZE];
-	u8  delta_swing_table_idx_5gb_n[BAND_NUM][DELTA_SWINGIDX_SIZE];
-	u8  delta_swing_table_idx_5gc_p[BAND_NUM][DELTA_SWINGIDX_SIZE];
-	u8  delta_swing_table_idx_5gc_n[BAND_NUM][DELTA_SWINGIDX_SIZE];
-	u8  delta_swing_table_idx_5gd_p[BAND_NUM][DELTA_SWINGIDX_SIZE];
-	u8  delta_swing_table_idx_5gd_n[BAND_NUM][DELTA_SWINGIDX_SIZE];
-	u8  delta_swing_tssi_table_2g_cck_a[DELTA_SWINTSSI_SIZE];
-	u8  delta_swing_tssi_table_2g_cck_b[DELTA_SWINTSSI_SIZE];
-	u8  delta_swing_tssi_table_2g_cck_c[DELTA_SWINTSSI_SIZE];
-	u8  delta_swing_tssi_table_2g_cck_d[DELTA_SWINTSSI_SIZE];
-	u8  delta_swing_tssi_table_2ga[DELTA_SWINTSSI_SIZE];
-	u8  delta_swing_tssi_table_2gb[DELTA_SWINTSSI_SIZE];
-	u8  delta_swing_tssi_table_2gc[DELTA_SWINTSSI_SIZE];
-	u8  delta_swing_tssi_table_2gd[DELTA_SWINTSSI_SIZE];
-	u8  delta_swing_tssi_table_5ga[BAND_NUM][DELTA_SWINTSSI_SIZE];
-	u8  delta_swing_tssi_table_5gb[BAND_NUM][DELTA_SWINTSSI_SIZE];
-	u8  delta_swing_tssi_table_5gc[BAND_NUM][DELTA_SWINTSSI_SIZE];
-	u8  delta_swing_tssi_table_5gd[BAND_NUM][DELTA_SWINTSSI_SIZE];
-	s8  delta_swing_table_xtal_p[DELTA_SWINGIDX_SIZE];
-	s8  delta_swing_table_xtal_n[DELTA_SWINGIDX_SIZE];
-	u8  delta_swing_table_idx_2ga_p_8188e[DELTA_SWINGIDX_SIZE];
-	u8  delta_swing_table_idx_2ga_n_8188e[DELTA_SWINGIDX_SIZE];
-
-	u8			bb_swing_idx_ofdm[MAX_RF_PATH];
-	u8			bb_swing_idx_ofdm_current;
+	s8 xtal_offset;
+	s8 xtal_offset_last;
+	u8 xtal_offset_eanble;
+
+	struct iqk_matrix_regs_setting
+				iqk_matrix_reg_setting[IQK_MATRIX_SETTINGS_NUM];
+	u8 delta_lck;
+	s8 bb_swing_diff_2g, bb_swing_diff_5g; /* Unit: dB */
+	u8 delta_swing_table_idx_2g_cck_a_p[DELTA_SWINGIDX_SIZE];
+	u8 delta_swing_table_idx_2g_cck_a_n[DELTA_SWINGIDX_SIZE];
+	u8 delta_swing_table_idx_2g_cck_b_p[DELTA_SWINGIDX_SIZE];
+	u8 delta_swing_table_idx_2g_cck_b_n[DELTA_SWINGIDX_SIZE];
+	u8 delta_swing_table_idx_2g_cck_c_p[DELTA_SWINGIDX_SIZE];
+	u8 delta_swing_table_idx_2g_cck_c_n[DELTA_SWINGIDX_SIZE];
+	u8 delta_swing_table_idx_2g_cck_d_p[DELTA_SWINGIDX_SIZE];
+	u8 delta_swing_table_idx_2g_cck_d_n[DELTA_SWINGIDX_SIZE];
+	u8 delta_swing_table_idx_2ga_p[DELTA_SWINGIDX_SIZE];
+	u8 delta_swing_table_idx_2ga_n[DELTA_SWINGIDX_SIZE];
+	u8 delta_swing_table_idx_2gb_p[DELTA_SWINGIDX_SIZE];
+	u8 delta_swing_table_idx_2gb_n[DELTA_SWINGIDX_SIZE];
+	u8 delta_swing_table_idx_2gc_p[DELTA_SWINGIDX_SIZE];
+	u8 delta_swing_table_idx_2gc_n[DELTA_SWINGIDX_SIZE];
+	u8 delta_swing_table_idx_2gd_p[DELTA_SWINGIDX_SIZE];
+	u8 delta_swing_table_idx_2gd_n[DELTA_SWINGIDX_SIZE];
+	u8 delta_swing_table_idx_5ga_p[BAND_NUM][DELTA_SWINGIDX_SIZE];
+	u8 delta_swing_table_idx_5ga_n[BAND_NUM][DELTA_SWINGIDX_SIZE];
+	u8 delta_swing_table_idx_5gb_p[BAND_NUM][DELTA_SWINGIDX_SIZE];
+	u8 delta_swing_table_idx_5gb_n[BAND_NUM][DELTA_SWINGIDX_SIZE];
+	u8 delta_swing_table_idx_5gc_p[BAND_NUM][DELTA_SWINGIDX_SIZE];
+	u8 delta_swing_table_idx_5gc_n[BAND_NUM][DELTA_SWINGIDX_SIZE];
+	u8 delta_swing_table_idx_5gd_p[BAND_NUM][DELTA_SWINGIDX_SIZE];
+	u8 delta_swing_table_idx_5gd_n[BAND_NUM][DELTA_SWINGIDX_SIZE];
+	u8 delta_swing_tssi_table_2g_cck_a[DELTA_SWINTSSI_SIZE];
+	u8 delta_swing_tssi_table_2g_cck_b[DELTA_SWINTSSI_SIZE];
+	u8 delta_swing_tssi_table_2g_cck_c[DELTA_SWINTSSI_SIZE];
+	u8 delta_swing_tssi_table_2g_cck_d[DELTA_SWINTSSI_SIZE];
+	u8 delta_swing_tssi_table_2ga[DELTA_SWINTSSI_SIZE];
+	u8 delta_swing_tssi_table_2gb[DELTA_SWINTSSI_SIZE];
+	u8 delta_swing_tssi_table_2gc[DELTA_SWINTSSI_SIZE];
+	u8 delta_swing_tssi_table_2gd[DELTA_SWINTSSI_SIZE];
+	u8 delta_swing_tssi_table_5ga[BAND_NUM][DELTA_SWINTSSI_SIZE];
+	u8 delta_swing_tssi_table_5gb[BAND_NUM][DELTA_SWINTSSI_SIZE];
+	u8 delta_swing_tssi_table_5gc[BAND_NUM][DELTA_SWINTSSI_SIZE];
+	u8 delta_swing_tssi_table_5gd[BAND_NUM][DELTA_SWINTSSI_SIZE];
+	s8 delta_swing_table_xtal_p[DELTA_SWINGIDX_SIZE];
+	s8 delta_swing_table_xtal_n[DELTA_SWINGIDX_SIZE];
+	u8 delta_swing_table_idx_2ga_p_8188e[DELTA_SWINGIDX_SIZE];
+	u8 delta_swing_table_idx_2ga_n_8188e[DELTA_SWINGIDX_SIZE];
+
+	u8 bb_swing_idx_ofdm[MAX_RF_PATH];
+	u8 bb_swing_idx_ofdm_current;
 #if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_CE))
-	u8			bb_swing_idx_ofdm_base[MAX_RF_PATH];
+	u8 bb_swing_idx_ofdm_base[MAX_RF_PATH];
 #else
-	u8			bb_swing_idx_ofdm_base;
+	u8 bb_swing_idx_ofdm_base;
 #endif
-	boolean		default_bb_swing_index_flag;
-	boolean			bb_swing_flag_ofdm;
-	u8			bb_swing_idx_cck;
-	u8			bb_swing_idx_cck_current;
-	u8			bb_swing_idx_cck_base;
-	u8			default_ofdm_index;
-	u8			default_cck_index;
-	boolean			bb_swing_flag_cck;
-
-	s8			absolute_ofdm_swing_idx[MAX_RF_PATH];
-	s8			remnant_ofdm_swing_idx[MAX_RF_PATH];
-	s8			absolute_cck_swing_idx[MAX_RF_PATH];
-	s8			remnant_cck_swing_idx;
-	s8			modify_tx_agc_value;       /*Remnat compensate value at tx_agc */
-	boolean			modify_tx_agc_flag_path_a;
-	boolean			modify_tx_agc_flag_path_b;
-	boolean			modify_tx_agc_flag_path_c;
-	boolean			modify_tx_agc_flag_path_d;
-	boolean			modify_tx_agc_flag_path_a_cck;
-
-	s8			kfree_offset[MAX_RF_PATH];
-
-	/* -------------------------------------------------------------------- */
+	boolean default_bb_swing_index_flag;
+	boolean bb_swing_flag_ofdm;
+	u8 bb_swing_idx_cck;
+	u8 bb_swing_idx_cck_current;
+	u8 bb_swing_idx_cck_base;
+	u8 default_ofdm_index;
+	u8 default_cck_index;
+	boolean bb_swing_flag_cck;
+
+	s8 absolute_ofdm_swing_idx[MAX_RF_PATH];
+	s8 remnant_ofdm_swing_idx[MAX_RF_PATH];
+	s8 absolute_cck_swing_idx[MAX_RF_PATH];
+	s8 remnant_cck_swing_idx;
+	s8 modify_tx_agc_value; /*Remnat compensate value at tx_agc */
+	boolean modify_tx_agc_flag_path_a;
+	boolean modify_tx_agc_flag_path_b;
+	boolean modify_tx_agc_flag_path_c;
+	boolean modify_tx_agc_flag_path_d;
+	boolean modify_tx_agc_flag_path_a_cck;
+	boolean modify_tx_agc_flag_path_b_cck;
+
+	s8 kfree_offset[MAX_RF_PATH];
+
+	/*@----------------------------------------------------------------- */
 
 	/* for IQK */
-	u32	regc04;
-	u32	reg874;
-	u32	regc08;
-	u32	regb68;
-	u32	regb6c;
-	u32	reg870;
-	u32	reg860;
-	u32	reg864;
-
-	boolean	is_iqk_initialized;
+	u32 regc04;
+	u32 reg874;
+	u32 regc08;
+	u32 regb68;
+	u32 regb6c;
+	u32 reg870;
+	u32 reg860;
+	u32 reg864;
+
+	boolean is_iqk_initialized;
 	boolean is_lck_in_progress;
-	boolean	is_antenna_detected;
-	boolean	is_need_iqk;
-	boolean	is_iqk_in_progress;
+	boolean is_antenna_detected;
+	boolean is_need_iqk;
+	boolean is_iqk_in_progress;
 	boolean is_iqk_pa_off;
-	u8	delta_iqk;
-	u32	ADDA_backup[IQK_ADDA_REG_NUM];
-	u32	IQK_MAC_backup[IQK_MAC_REG_NUM];
-	u32	IQK_BB_backup_recover[9];
-	u32	IQK_BB_backup[IQK_BB_REG_NUM];
-	u32 	tx_iqc_8723b[2][3][2]; /* { {S1: 0xc94, 0xc80, 0xc4c} , {S0: 0xc9c, 0xc88, 0xc4c}} */
-	u32 	rx_iqc_8723b[2][2][2]; /* { {S1: 0xc14, 0xca0} ,           {S0: 0xc14, 0xca0}} */
-	u32	tx_iqc_8703b[3][2];	/* { {S1: 0xc94, 0xc80, 0xc4c} , {S0: 0xc9c, 0xc88, 0xc4c}}*/
-	u32	rx_iqc_8703b[2][2];	/* { {S1: 0xc14, 0xca0} ,           {S0: 0xc14, 0xca0}}*/
-	u32	tx_iqc_8723d[2][3][2];	/* { {S1: 0xc94, 0xc80, 0xc4c} , {S0: 0xc9c, 0xc88, 0xc4c}}*/
-	u32	rx_iqc_8723d[2][2][2];	/* { {S1: 0xc14, 0xca0} ,           {S0: 0xc14, 0xca0}}*/
+	u8 delta_iqk;
+	u32 ADDA_backup[IQK_ADDA_REG_NUM];
+	u32 IQK_MAC_backup[IQK_MAC_REG_NUM];
+	u32 IQK_BB_backup_recover[9];
+	u32 IQK_BB_backup[IQK_BB_REG_NUM];
+	/* { {S1: 0xc94, 0xc80, 0xc4c} , {S0: 0xc9c, 0xc88, 0xc4c}} */
+	u32 tx_iqc_8723b[2][3][2];
+	/* { {S1: 0xc14, 0xca0} , {S0: 0xc14, 0xca0}} */
+	u32 rx_iqc_8723b[2][2][2];
+	/* { {S1: 0xc94, 0xc80, 0xc4c} , {S0: 0xc9c, 0xc88, 0xc4c}} */
+	u32 tx_iqc_8703b[3][2];
+	/* { {S1: 0xc14, 0xca0} , {S0: 0xc14, 0xca0}} */
+	u32 rx_iqc_8703b[2][2];
+	/* { {S1: 0xc94, 0xc80, 0xc4c} , {S0: 0xc9c, 0xc88, 0xc4c}} */
+	u32 tx_iqc_8723d[2][3][2];
+	/* { {S1: 0xc14, 0xca0} , {S0: 0xc14, 0xca0}} */
+	u32 rx_iqc_8723d[2][2][2];
 	/* JJ ADD 20161014 */
-	u32	tx_iqc_8710b[2][3][2];	/* { {S1: 0xc94, 0xc80, 0xc4c} , {S0: 0xc9c, 0xc88, 0xc4c}}*/
-	u32	rx_iqc_8710b[2][2][2];	/* { {S1: 0xc14, 0xca0} ,           {S0: 0xc14, 0xca0}}*/
-
-	u8	iqk_step;
-	u8	kcount;
-	u8	retry_count[4][2]; /* [4]: path ABCD, [2] TXK, RXK */
-	boolean	is_mp_mode;
-
-
-
-	/* <James> IQK time measurement */
-	u64	iqk_start_time;
-	u64	iqk_progressing_time;
-	u64	iqk_total_progressing_time;
+	/* { {S1: 0xc94, 0xc80, 0xc4c} , {S0: 0xc9c, 0xc88, 0xc4c}} */
+	u32 tx_iqc_8710b[2][3][2];
+	/* { {S1: 0xc14, 0xca0} , {S0: 0xc14, 0xca0}} */
+	u32 rx_iqc_8710b[2][2][2];
+
+	u8 iqk_step;
+	u8 kcount;
+	u8 retry_count[4][2]; /* [4]: path ABCD, [2] TXK, RXK */
+	boolean is_mp_mode;
+
+	/*@<James> IQK time measurement */
+	u64 iqk_start_time;
+	u64 iqk_progressing_time;
+	u64 iqk_total_progressing_time;
 	u64 lck_progressing_time;
 
-	u32  lok_result;
+	u32 lok_result;
 
 	/* for APK */
-	u32 	ap_koutput[2][2]; /* path A/B; output1_1a/output1_2a */
-	u8	is_ap_kdone;
-	u8	is_apk_thermal_meter_ignore;
+	u32 ap_koutput[2][2]; /* path A/B; output1_1a/output1_2a */
+	u8 is_ap_kdone;
+	u8 is_apk_thermal_meter_ignore;
 
 	/* DPK */
 	boolean is_dpk_fail;
-	u8	is_dp_done;
-	u8	is_dp_path_aok;
-	u8	is_dp_path_bok;
-
-	u32	tx_lok[2];
-	u32  dpk_tx_agc;
-	s32  dpk_gain;
-	u32  dpk_thermal[4];
+	u8 is_dp_done;
+	u8 is_dp_path_aok;
+	u8 is_dp_path_bok;
+
+	u32 tx_lok[2];
+	u32 dpk_tx_agc;
+	s32 dpk_gain;
+	u32 dpk_thermal[4];
 	s8 modify_tx_agc_value_ofdm;
 	s8 modify_tx_agc_value_cck;
 
-	/*Add by Yuchen for Kfree Phydm*/
-	u8			reg_rf_kfree_enable;	/*for registry*/
-	u8			rf_kfree_enable;		/*for efuse enable check*/
-
+	/*@Add by Yuchen for Kfree Phydm*/
+	u8 reg_rf_kfree_enable; /*for registry*/
+	u8 rf_kfree_enable; /*for efuse enable check*/
 };
 
+void odm_txpowertracking_check(void *dm_void);
 
-void
-odm_txpowertracking_check(
-	void		*p_dm_void
-);
-
+void odm_txpowertracking_init(void *dm_void);
 
-void
-odm_txpowertracking_init(
-	void		*p_dm_void
-);
+void odm_txpowertracking_check_ap(void *dm_void);
 
-void
-odm_txpowertracking_check_ap(
-	void		*p_dm_void
-);
+void odm_txpowertracking_thermal_meter_init(void *dm_void);
 
-void
-odm_txpowertracking_thermal_meter_init(
-	void		*p_dm_void
-);
+void odm_txpowertracking_init(void *dm_void);
 
-void
-odm_txpowertracking_init(
-	void		*p_dm_void
-);
+void odm_txpowertracking_check_mp(void *dm_void);
 
-void
-odm_txpowertracking_check_mp(
-	void		*p_dm_void
-);
+void odm_txpowertracking_check_ce(void *dm_void);
 
-
-void
-odm_txpowertracking_check_ce(
-	void		*p_dm_void
-);
+void odm_txpowertracking_direct_ce(void *dm_void);
 
 #if (DM_ODM_SUPPORT_TYPE & (ODM_WIN))
 
-void
-odm_txpowertracking_callback_thermal_meter92c(
-	struct _ADAPTER	*adapter
-);
+void odm_txpowertracking_callback_thermal_meter92c(
+	void *adapter);
 
-void
-odm_txpowertracking_callback_rx_gain_thermal_meter92d(
-	struct _ADAPTER	*adapter
-);
+void odm_txpowertracking_callback_rx_gain_thermal_meter92d(
+	void *adapter);
 
-void
-odm_txpowertracking_callback_thermal_meter92d(
-	struct _ADAPTER	*adapter
-);
+void odm_txpowertracking_callback_thermal_meter92d(
+	void *adapter);
 
-void
-odm_txpowertracking_direct_call92c(
-	struct _ADAPTER		*adapter
-);
+void odm_txpowertracking_direct_call92c(
+	void *adapter);
 
-void
-odm_txpowertracking_thermal_meter_check(
-	struct _ADAPTER		*adapter
-);
+void odm_txpowertracking_thermal_meter_check(
+	void *adapter);
 
 #endif
 
-#endif
+#endif /*__HALRF_POWER_TRACKING_H__*/
diff --git a/rtl8723DS/hal/phydm/halrf/halrf_powertracking_iot.c b/rtl8723DS/hal/phydm/halrf/halrf_powertracking_iot.c
new file mode 100644
index 0000000..a0c40dc
--- a/dev/null
+++ b/rtl8723DS/hal/phydm/halrf/halrf_powertracking_iot.c
@@ -0,0 +1,741 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2007 - 2017  Realtek Corporation.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ *
+ * The full GNU General Public License is included in this distribution in the
+ * file called LICENSE.
+ *
+ * Contact Information:
+ * wlanfae <wlanfae@realtek.com>
+ * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
+ * Hsinchu 300, Taiwan.
+ *
+ * Larry Finger <Larry.Finger@lwfinger.net>
+ *
+ *****************************************************************************/
+
+/*============================================================	*/
+/* include files												*/
+/*============================================================	*/
+#include "mp_precomp.h"
+#include "phydm_precomp.h"
+
+/* ************************************************************
+ * Global var
+ * ************************************************************
+ */
+
+u32	ofdm_swing_table[OFDM_TABLE_SIZE] = {
+	0x7f8001fe,	/* 0, +6.0dB */
+	0x788001e2,	/* 1, +5.5dB */
+	0x71c001c7,	/* 2, +5.0dB*/
+	0x6b8001ae,	/* 3, +4.5dB*/
+	0x65400195,	/* 4, +4.0dB*/
+	0x5fc0017f,	/* 5, +3.5dB*/
+	0x5a400169,	/* 6, +3.0dB*/
+	0x55400155,	/* 7, +2.5dB*/
+	0x50800142,	/* 8, +2.0dB*/
+	0x4c000130,	/* 9, +1.5dB*/
+	0x47c0011f,	/* 10, +1.0dB*/
+	0x43c0010f,	/* 11, +0.5dB*/
+	0x40000100,	/* 12, +0dB*/
+	0x3c8000f2,	/* 13, -0.5dB*/
+	0x390000e4,	/* 14, -1.0dB*/
+	0x35c000d7,	/* 15, -1.5dB*/
+	0x32c000cb,	/* 16, -2.0dB*/
+	0x300000c0,	/* 17, -2.5dB*/
+	0x2d4000b5,	/* 18, -3.0dB*/
+	0x2ac000ab,	/* 19, -3.5dB*/
+	0x288000a2,	/* 20, -4.0dB*/
+	0x26000098,	/* 21, -4.5dB*/
+	0x24000090,	/* 22, -5.0dB*/
+	0x22000088,	/* 23, -5.5dB*/
+	0x20000080,	/* 24, -6.0dB*/
+	0x1e400079,	/* 25, -6.5dB*/
+	0x1c800072,	/* 26, -7.0dB*/
+	0x1b00006c,	/* 27. -7.5dB*/
+	0x19800066,	/* 28, -8.0dB*/
+	0x18000060,	/* 29, -8.5dB*/
+	0x16c0005b,	/* 30, -9.0dB*/
+	0x15800056,	/* 31, -9.5dB*/
+	0x14400051,	/* 32, -10.0dB*/
+	0x1300004c,	/* 33, -10.5dB*/
+	0x12000048,	/* 34, -11.0dB*/
+	0x11000044,	/* 35, -11.5dB*/
+	0x10000040,	/* 36, -12.0dB*/
+};
+
+u8	cck_swing_table_ch1_ch13[CCK_TABLE_SIZE][8] = {
+	{0x36, 0x35, 0x2e, 0x25, 0x1c, 0x12, 0x09, 0x04},	/* 0, +0dB */
+	{0x33, 0x32, 0x2b, 0x23, 0x1a, 0x11, 0x08, 0x04},	/* 1, -0.5dB */
+	{0x30, 0x2f, 0x29, 0x21, 0x19, 0x10, 0x08, 0x03},	/* 2, -1.0dB*/
+	{0x2d, 0x2d, 0x27, 0x1f, 0x18, 0x0f, 0x08, 0x03},	/* 3, -1.5dB*/
+	{0x2b, 0x2a, 0x25, 0x1e, 0x16, 0x0e, 0x07, 0x03},	/* 4, -2.0dB */
+	{0x28, 0x28, 0x22, 0x1c, 0x15, 0x0d, 0x07, 0x03},	/* 5, -2.5dB*/
+	{0x26, 0x25, 0x21, 0x1b, 0x14, 0x0d, 0x06, 0x03},	/* 6, -3.0dB*/
+	{0x24, 0x23, 0x1f, 0x19, 0x13, 0x0c, 0x06, 0x03},	/* 7, -3.5dB*/
+	{0x22, 0x21, 0x1d, 0x18, 0x11, 0x0b, 0x06, 0x02},	/* 8, -4.0dB */
+	{0x20, 0x20, 0x1b, 0x16, 0x11, 0x08, 0x05, 0x02},	/* 9, -4.5dB*/
+	{0x1f, 0x1e, 0x1a, 0x15, 0x10, 0x0a, 0x05, 0x02},	/* 10, -5.0dB */
+	{0x1d, 0x1c, 0x18, 0x14, 0x0f, 0x0a, 0x05, 0x02},	/* 11, -5.5dB*/
+	{0x1b, 0x1a, 0x17, 0x13, 0x0e, 0x09, 0x04, 0x02},	/* 12, -6.0dB <== default */
+	{0x1a, 0x19, 0x16, 0x12, 0x0d, 0x09, 0x04, 0x02},	/* 13, -6.5dB*/
+	{0x18, 0x17, 0x15, 0x11, 0x0c, 0x08, 0x04, 0x02},	/* 14, -7.0dB */
+	{0x17, 0x16, 0x13, 0x10, 0x0c, 0x08, 0x04, 0x02},	/* 15, -7.5dB*/
+	{0x16, 0x15, 0x12, 0x0f, 0x0b, 0x07, 0x04, 0x01},	/* 16, -8.0dB */
+	{0x14, 0x14, 0x11, 0x0e, 0x0b, 0x07, 0x03, 0x02},	/* 17, -8.5dB*/
+	{0x13, 0x13, 0x10, 0x0d, 0x0a, 0x06, 0x03, 0x01},	/* 18, -9.0dB */
+	{0x12, 0x12, 0x0f, 0x0c, 0x09, 0x06, 0x03, 0x01},	/* 19, -9.5dB*/
+	{0x11, 0x11, 0x0f, 0x0c, 0x09, 0x06, 0x03, 0x01},	/* 20, -10.0dB*/
+	{0x10, 0x10, 0x0e, 0x0b, 0x08, 0x05, 0x03, 0x01},	/* 21, -10.5dB*/
+	{0x0f, 0x0f, 0x0d, 0x0b, 0x08, 0x05, 0x03, 0x01},	/* 22, -11.0dB*/
+	{0x0e, 0x0e, 0x0c, 0x0a, 0x08, 0x05, 0x02, 0x01},	/* 23, -11.5dB*/
+	{0x0d, 0x0d, 0x0c, 0x0a, 0x07, 0x05, 0x02, 0x01},	/* 24, -12.0dB*/
+	{0x0d, 0x0c, 0x0b, 0x09, 0x07, 0x04, 0x02, 0x01},	/* 25, -12.5dB*/
+	{0x0c, 0x0c, 0x0a, 0x09, 0x06, 0x04, 0x02, 0x01},	/* 26, -13.0dB*/
+	{0x0b, 0x0b, 0x0a, 0x08, 0x06, 0x04, 0x02, 0x01},	/* 27, -13.5dB*/
+	{0x0b, 0x0a, 0x09, 0x08, 0x06, 0x04, 0x02, 0x01},	/* 28, -14.0dB*/
+	{0x0a, 0x0a, 0x09, 0x07, 0x05, 0x03, 0x02, 0x01},	/* 29, -14.5dB*/
+	{0x0a, 0x09, 0x08, 0x07, 0x05, 0x03, 0x02, 0x01},	/* 30, -15.0dB*/
+	{0x09, 0x09, 0x08, 0x06, 0x05, 0x03, 0x01, 0x01},	/* 31, -15.5dB*/
+	{0x09, 0x08, 0x07, 0x06, 0x04, 0x03, 0x01, 0x01}	/* 32, -16.0dB*/
+};
+
+u8	cck_swing_table_ch14[CCK_TABLE_SIZE][8] = {
+	{0x36, 0x35, 0x2e, 0x1b, 0x00, 0x00, 0x00, 0x00},	/* 0, +0dB */
+	{0x33, 0x32, 0x2b, 0x19, 0x00, 0x00, 0x00, 0x00},	/* 1, -0.5dB */
+	{0x30, 0x2f, 0x29, 0x18, 0x00, 0x00, 0x00, 0x00},	/* 2, -1.0dB */
+	{0x2d, 0x2d, 0x17, 0x17, 0x00, 0x00, 0x00, 0x00},	/* 3, -1.5dB*/
+	{0x2b, 0x2a, 0x25, 0x15, 0x00, 0x00, 0x00, 0x00},	/* 4, -2.0dB */
+	{0x28, 0x28, 0x24, 0x14, 0x00, 0x00, 0x00, 0x00},	/* 5, -2.5dB*/
+	{0x26, 0x25, 0x21, 0x13, 0x00, 0x00, 0x00, 0x00},	/* 6, -3.0dB */
+	{0x24, 0x23, 0x1f, 0x12, 0x00, 0x00, 0x00, 0x00},	/* 7, -3.5dB */
+	{0x22, 0x21, 0x1d, 0x11, 0x00, 0x00, 0x00, 0x00},	/* 8, -4.0dB */
+	{0x20, 0x20, 0x1b, 0x10, 0x00, 0x00, 0x00, 0x00},	/* 9, -4.5dB*/
+	{0x1f, 0x1e, 0x1a, 0x0f, 0x00, 0x00, 0x00, 0x00},	/* 10, -5.0dB */
+	{0x1d, 0x1c, 0x18, 0x0e, 0x00, 0x00, 0x00, 0x00},	/* 11, -5.5dB*/
+	{0x1b, 0x1a, 0x17, 0x0e, 0x00, 0x00, 0x00, 0x00},	/* 12, -6.0dB  <== default*/
+	{0x1a, 0x19, 0x16, 0x0d, 0x00, 0x00, 0x00, 0x00},	/* 13, -6.5dB */
+	{0x18, 0x17, 0x15, 0x0c, 0x00, 0x00, 0x00, 0x00},	/* 14, -7.0dB */
+	{0x17, 0x16, 0x13, 0x0b, 0x00, 0x00, 0x00, 0x00},	/* 15, -7.5dB*/
+	{0x16, 0x15, 0x12, 0x0b, 0x00, 0x00, 0x00, 0x00},	/* 16, -8.0dB */
+	{0x14, 0x14, 0x11, 0x0a, 0x00, 0x00, 0x00, 0x00},	/* 17, -8.5dB*/
+	{0x13, 0x13, 0x10, 0x0a, 0x00, 0x00, 0x00, 0x00},	/* 18, -9.0dB */
+	{0x12, 0x12, 0x0f, 0x09, 0x00, 0x00, 0x00, 0x00},	/* 19, -9.5dB*/
+	{0x11, 0x11, 0x0f, 0x09, 0x00, 0x00, 0x00, 0x00},	/* 20, -10.0dB*/
+	{0x10, 0x10, 0x0e, 0x08, 0x00, 0x00, 0x00, 0x00},	/* 21, -10.5dB*/
+	{0x0f, 0x0f, 0x0d, 0x08, 0x00, 0x00, 0x00, 0x00},	/* 22, -11.0dB*/
+	{0x0e, 0x0e, 0x0c, 0x07, 0x00, 0x00, 0x00, 0x00},	/* 23, -11.5dB*/
+	{0x0d, 0x0d, 0x0c, 0x07, 0x00, 0x00, 0x00, 0x00},	/* 24, -12.0dB*/
+	{0x0d, 0x0c, 0x0b, 0x06, 0x00, 0x00, 0x00, 0x00},	/* 25, -12.5dB*/
+	{0x0c, 0x0c, 0x0a, 0x06, 0x00, 0x00, 0x00, 0x00},	/* 26, -13.0dB*/
+	{0x0b, 0x0b, 0x0a, 0x06, 0x00, 0x00, 0x00, 0x00},	/* 27, -13.5dB*/
+	{0x0b, 0x0a, 0x09, 0x05, 0x00, 0x00, 0x00, 0x00},	/* 28, -14.0dB*/
+	{0x0a, 0x0a, 0x09, 0x05, 0x00, 0x00, 0x00, 0x00},	/* 29, -14.5dB*/
+	{0x0a, 0x09, 0x08, 0x05, 0x00, 0x00, 0x00, 0x00},	/* 30, -15.0dB*/
+	{0x09, 0x09, 0x08, 0x05, 0x00, 0x00, 0x00, 0x00},	/* 31, -15.5dB*/
+	{0x09, 0x08, 0x07, 0x04, 0x00, 0x00, 0x00, 0x00}	/* 32, -16.0dB*/
+};
+
+u32 ofdm_swing_table_new[OFDM_TABLE_SIZE] = {
+	0x0b40002d, /* 0,  -15.0dB	*/
+	0x0c000030, /* 1,  -14.5dB*/
+	0x0cc00033, /* 2,  -14.0dB*/
+	0x0d800036, /* 3,  -13.5dB*/
+	0x0e400039, /* 4,  -13.0dB */
+	0x0f00003c, /* 5,  -12.5dB*/
+	0x10000040, /* 6,  -12.0dB*/
+	0x11000044, /* 7,  -11.5dB*/
+	0x12000048, /* 8,  -11.0dB*/
+	0x1300004c, /* 9,  -10.5dB*/
+	0x14400051, /* 10, -10.0dB*/
+	0x15800056, /* 11, -9.5dB*/
+	0x16c0005b, /* 12, -9.0dB*/
+	0x18000060, /* 13, -8.5dB*/
+	0x19800066, /* 14, -8.0dB*/
+	0x1b00006c, /* 15, -7.5dB*/
+	0x1c800072, /* 16, -7.0dB*/
+	0x1e400079, /* 17, -6.5dB*/
+	0x20000080, /* 18, -6.0dB*/
+	0x22000088, /* 19, -5.5dB*/
+	0x24000090, /* 20, -5.0dB*/
+	0x26000098, /* 21, -4.5dB*/
+	0x288000a2, /* 22, -4.0dB*/
+	0x2ac000ab, /* 23, -3.5dB*/
+	0x2d4000b5, /* 24, -3.0dB*/
+	0x300000c0, /* 25, -2.5dB*/
+	0x32c000cb, /* 26, -2.0dB*/
+	0x35c000d7, /* 27, -1.5dB*/
+	0x390000e4, /* 28, -1.0dB*/
+	0x3c8000f2, /* 29, -0.5dB*/
+	0x40000100, /* 30, +0dB*/
+	0x43c0010f, /* 31, +0.5dB*/
+	0x47c0011f, /* 32, +1.0dB*/
+	0x4c000130, /* 33, +1.5dB*/
+	0x50800142, /* 34, +2.0dB*/
+	0x55400155, /* 35, +2.5dB*/
+	0x5a400169, /* 36, +3.0dB*/
+	0x5fc0017f, /* 37, +3.5dB*/
+	0x65400195, /* 38, +4.0dB*/
+	0x6b8001ae, /* 39, +4.5dB*/
+	0x71c001c7, /* 40, +5.0dB*/
+	0x788001e2, /* 41, +5.5dB*/
+	0x7f8001fe  /* 42, +6.0dB*/
+};
+
+u8 cck_swing_table_ch1_ch14_88f[CCK_TABLE_SIZE_88F][16] = {
+	{0x44, 0x42, 0x3C, 0x33, 0x28, 0x1C, 0x13, 0x0B, 0x05, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},    /*-16dB*/
+	{0x48, 0x46, 0x3F, 0x36, 0x2A, 0x1E, 0x14, 0x0B, 0x05, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},    /*-15.5dB*/
+	{0x4D, 0x4A, 0x43, 0x39, 0x2C, 0x20, 0x15, 0x0C, 0x06, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},    /*-15dB*/
+	{0x51, 0x4F, 0x47, 0x3C, 0x2F, 0x22, 0x16, 0x0D, 0x06, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},    /*-14.5dB*/
+	{0x56, 0x53, 0x4B, 0x40, 0x32, 0x24, 0x17, 0x0E, 0x06, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},    /*-14dB*/
+	{0x5B, 0x58, 0x50, 0x43, 0x35, 0x26, 0x19, 0x0E, 0x07, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},    /*-13.5dB*/
+	{0x60, 0x5D, 0x54, 0x47, 0x38, 0x28, 0x1A, 0x0F, 0x07, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},    /*-13dB*/
+	{0x66, 0x63, 0x59, 0x4C, 0x3B, 0x2B, 0x1C, 0x10, 0x08, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},    /*-12.5dB*/
+	{0x6C, 0x69, 0x5F, 0x50, 0x3F, 0x2D, 0x1E, 0x11, 0x08, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},    /*-12dB*/
+	{0x73, 0x6F, 0x64, 0x55, 0x42, 0x30, 0x1F, 0x12, 0x08, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},    /*-11.5dB*/
+	{0x79, 0x76, 0x6A, 0x5A, 0x46, 0x33, 0x21, 0x13, 0x09, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},    /*-11dB*/
+	{0x81, 0x7C, 0x71, 0x5F, 0x4A, 0x36, 0x23, 0x14, 0x0A, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},    /*-10.5dB*/
+	{0x88, 0x84, 0x77, 0x65, 0x4F, 0x39, 0x25, 0x15, 0x0A, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},    /*-10dB*/
+	{0x90, 0x8C, 0x7E, 0x6B, 0x54, 0x3C, 0x27, 0x17, 0x0B, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},    /*-9.5dB*/
+	{0x99, 0x94, 0x86, 0x71, 0x58, 0x40, 0x2A, 0x18, 0x0B, 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},    /*-9dB*/
+	{0xA2, 0x9D, 0x8E, 0x78, 0x5E, 0x43, 0x2C, 0x19, 0x0C, 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},    /*-8.5dB*/
+	{0xAC, 0xA6, 0x96, 0x7F, 0x63, 0x47, 0x2F, 0x1B, 0x0D, 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},    /*-8dB*/
+	{0xB6, 0xB0, 0x9F, 0x87, 0x69, 0x4C, 0x32, 0x1D, 0x0D, 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},    /*-7.5dB*/
+	{0xC1, 0xBA, 0xA8, 0x8F, 0x6F, 0x50, 0x35, 0x1E, 0x0E, 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},    /*-7dB*/
+	{0xCC, 0xC5, 0xB2, 0x97, 0x76, 0x55, 0x38, 0x20, 0x0F, 0x05, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},    /*-6.5dB*/
+	{0xD8, 0xD1, 0xBD, 0xA0, 0x7D, 0x5A, 0x3B, 0x22, 0x10, 0x05, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}     /*-6dB*/
+};
+
+u8 cck_swing_table_ch1_ch13_88f[CCK_TABLE_SIZE_88F][16] = {
+	{0x44, 0x42, 0x3C, 0x33, 0x28, 0x1C, 0x13, 0x0B, 0x05, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},    /*-16dB*/
+	{0x48, 0x46, 0x3F, 0x36, 0x2A, 0x1E, 0x14, 0x0B, 0x05, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},    /*-15.5dB*/
+	{0x4D, 0x4A, 0x43, 0x39, 0x2C, 0x20, 0x15, 0x0C, 0x06, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},    /*-15dB*/
+	{0x51, 0x4F, 0x47, 0x3C, 0x2F, 0x22, 0x16, 0x0D, 0x06, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},    /*-14.5dB*/
+	{0x56, 0x53, 0x4B, 0x40, 0x32, 0x24, 0x17, 0x0E, 0x06, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},    /*-14dB*/
+	{0x5B, 0x58, 0x50, 0x43, 0x35, 0x26, 0x19, 0x0E, 0x07, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},    /*-13.5dB*/
+	{0x60, 0x5D, 0x54, 0x47, 0x38, 0x28, 0x1A, 0x0F, 0x07, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},    /*-13dB*/
+	{0x66, 0x63, 0x59, 0x4C, 0x3B, 0x2B, 0x1C, 0x10, 0x08, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},    /*-12.5dB*/
+	{0x6C, 0x69, 0x5F, 0x50, 0x3F, 0x2D, 0x1E, 0x11, 0x08, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},    /*-12dB*/
+	{0x73, 0x6F, 0x64, 0x55, 0x42, 0x30, 0x1F, 0x12, 0x08, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},    /*-11.5dB*/
+	{0x79, 0x76, 0x6A, 0x5A, 0x46, 0x33, 0x21, 0x13, 0x09, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},    /*-11dB*/
+	{0x81, 0x7C, 0x71, 0x5F, 0x4A, 0x36, 0x23, 0x14, 0x0A, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},    /*-10.5dB*/
+	{0x88, 0x84, 0x77, 0x65, 0x4F, 0x39, 0x25, 0x15, 0x0A, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},    /*-10dB*/
+	{0x90, 0x8C, 0x7E, 0x6B, 0x54, 0x3C, 0x27, 0x17, 0x0B, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},    /*-9.5dB*/
+	{0x99, 0x94, 0x86, 0x71, 0x58, 0x40, 0x2A, 0x18, 0x0B, 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},    /*-9dB*/
+	{0xA2, 0x9D, 0x8E, 0x78, 0x5E, 0x43, 0x2C, 0x19, 0x0C, 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},    /*-8.5dB*/
+	{0xAC, 0xA6, 0x96, 0x7F, 0x63, 0x47, 0x2F, 0x1B, 0x0D, 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},    /*-8dB*/
+	{0xB6, 0xB0, 0x9F, 0x87, 0x69, 0x4C, 0x32, 0x1D, 0x0D, 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},    /*-7.5dB*/
+	{0xC1, 0xBA, 0xA8, 0x8F, 0x6F, 0x50, 0x35, 0x1E, 0x0E, 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},    /*-7dB*/
+	{0xCC, 0xC5, 0xB2, 0x97, 0x76, 0x55, 0x38, 0x20, 0x0F, 0x05, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},    /*-6.5dB*/
+	{0xD8, 0xD1, 0xBD, 0xA0, 0x7D, 0x5A, 0x3B, 0x22, 0x10, 0x05, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}     /*-6dB*/
+};
+
+u8 cck_swing_table_ch14_88f[CCK_TABLE_SIZE_88F][16] = {
+	{0x44,	 0x42, 0x3C, 0x28, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},    /*-16dB*/
+	{0x48, 0x46, 0x3F, 0x2A, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},    /*-15.5dB*/
+	{0x4D, 0x4A, 0x43, 0x2C, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},    /*-15dB*/
+	{0x51, 0x4F, 0x47, 0x2F, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},	    /*-14.5dB*/
+	{0x56, 0x53, 0x4B, 0x32, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},    /*-14dB*/
+	{0x5B, 0x58, 0x50, 0x35, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},    /*-13.5dB*/
+	{0x60, 0x5D, 0x54, 0x38, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},    /*-13dB*/
+	{0x66, 0x63, 0x59, 0x3B, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},    /*-12.5dB*/
+	{0x6C, 0x69, 0x5F, 0x3F, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},    /*-12dB*/
+	{0x73, 0x6F, 0x64, 0x42, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},    /*-11.5dB*/
+	{0x79, 0x76, 0x6A, 0x46, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},    /*-11dB*/
+	{0x81, 0x7C, 0x71, 0x4A, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},    /*-10.5dB*/
+	{0x88, 0x84, 0x77, 0x4F, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},    /*-10dB*/
+	{0x90, 0x8C, 0x7E, 0x54, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},    /*-9.5dB*/
+	{0x99, 0x94, 0x86, 0x58, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},    /*-9dB*/
+	{0xA2, 0x9D, 0x8E, 0x5E, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},    /*-8.5dB*/
+	{0xAC, 0xA6, 0x96, 0x63, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},    /*-8dB*/
+	{0xB6, 0xB0, 0x9F, 0x69, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},    /*-7.5dB*/
+	{0xC1, 0xBA, 0xA8, 0x6F, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},    /*-7dB*/
+	{0xCC, 0xC5, 0xB2, 0x76, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},    /*-6.5dB*/
+	{0xD8, 0xD1, 0xBD, 0x7D, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}     /*-6dB*/
+};
+
+u8 cck_swing_table_ch1_ch13_new[CCK_TABLE_SIZE][8] = {
+	{0x09, 0x08, 0x07, 0x06, 0x04, 0x03, 0x01, 0x01},	/*  0, -16.0dB*/
+	{0x09, 0x09, 0x08, 0x06, 0x05, 0x03, 0x01, 0x01},	/*   1, -15.5dB*/
+	{0x0a, 0x09, 0x08, 0x07, 0x05, 0x03, 0x02, 0x01},	/*  2, -15.0dB*/
+	{0x0a, 0x0a, 0x09, 0x07, 0x05, 0x03, 0x02, 0x01},	/*   3, -14.5dB*/
+	{0x0b, 0x0a, 0x09, 0x08, 0x06, 0x04, 0x02, 0x01},	/*   4, -14.0dB*/
+	{0x0b, 0x0b, 0x0a, 0x08, 0x06, 0x04, 0x02, 0x01},	/*   5, -13.5dB*/
+	{0x0c, 0x0c, 0x0a, 0x09, 0x06, 0x04, 0x02, 0x01},	/*   6, -13.0dB*/
+	{0x0d, 0x0c, 0x0b, 0x09, 0x07, 0x04, 0x02, 0x01},	/*   7, -12.5dB*/
+	{0x0d, 0x0d, 0x0c, 0x0a, 0x07, 0x05, 0x02, 0x01},	/*  8, -12.0dB*/
+	{0x0e, 0x0e, 0x0c, 0x0a, 0x08, 0x05, 0x02, 0x01},	/*   9, -11.5dB*/
+	{0x0f, 0x0f, 0x0d, 0x0b, 0x08, 0x05, 0x03, 0x01},	/*  10, -11.0dB*/
+	{0x10, 0x10, 0x0e, 0x0b, 0x08, 0x05, 0x03, 0x01},	/*  11, -10.5dB*/
+	{0x11, 0x11, 0x0f, 0x0c, 0x09, 0x06, 0x03, 0x01},	/*  12, -10.0dB*/
+	{0x12, 0x12, 0x0f, 0x0c, 0x09, 0x06, 0x03, 0x01},	/*  13, -9.5dB*/
+	{0x13, 0x13, 0x10, 0x0d, 0x0a, 0x06, 0x03, 0x01},	/*  14, -9.0dB */
+	{0x14, 0x14, 0x11, 0x0e, 0x0b, 0x07, 0x03, 0x02},	/*  15, -8.5dB*/
+	{0x16, 0x15, 0x12, 0x0f, 0x0b, 0x07, 0x04, 0x01},	/*  16, -8.0dB */
+	{0x17, 0x16, 0x13, 0x10, 0x0c, 0x08, 0x04, 0x02},	/*  17, -7.5dB*/
+	{0x18, 0x17, 0x15, 0x11, 0x0c, 0x08, 0x04, 0x02},	/*  18, -7.0dB */
+	{0x1a, 0x19, 0x16, 0x12, 0x0d, 0x09, 0x04, 0x02},	/*  19, -6.5dB*/
+	{0x1b, 0x1a, 0x17, 0x13, 0x0e, 0x09, 0x04, 0x02},	/*20, -6.0dB */
+	{0x1d, 0x1c, 0x18, 0x14, 0x0f, 0x0a, 0x05, 0x02},	/*  21, -5.5dB*/
+	{0x1f, 0x1e, 0x1a, 0x15, 0x10, 0x0a, 0x05, 0x02},	/* 22, -5.0dB */
+	{0x20, 0x20, 0x1b, 0x16, 0x11, 0x08, 0x05, 0x02},	/*  23, -4.5dB*/
+	{0x22, 0x21, 0x1d, 0x18, 0x11, 0x0b, 0x06, 0x02},	/*  24, -4.0dB */
+	{0x24, 0x23, 0x1f, 0x19, 0x13, 0x0c, 0x06, 0x03},	/*  25, -3.5dB*/
+	{0x26, 0x25, 0x21, 0x1b, 0x14, 0x0d, 0x06, 0x03},	/*  26, -3.0dB*/
+	{0x28, 0x28, 0x22, 0x1c, 0x15, 0x0d, 0x07, 0x03},	/*  27, -2.5dB*/
+	{0x2b, 0x2a, 0x25, 0x1e, 0x16, 0x0e, 0x07, 0x03},	/*  28, -2.0dB */
+	{0x2d, 0x2d, 0x27, 0x1f, 0x18, 0x0f, 0x08, 0x03},	/*  29, -1.5dB*/
+	{0x30, 0x2f, 0x29, 0x21, 0x19, 0x10, 0x08, 0x03},	/*  30, -1.0dB*/
+	{0x33, 0x32, 0x2b, 0x23, 0x1a, 0x11, 0x08, 0x04},	/*  31, -0.5dB*/
+	{0x36, 0x35, 0x2e, 0x25, 0x1c, 0x12, 0x09, 0x04}	/*  32, +0dB*/
+};
+
+u8 cck_swing_table_ch14_new[CCK_TABLE_SIZE][8] = {
+	{0x09, 0x08, 0x07, 0x04, 0x00, 0x00, 0x00, 0x00},	/*  0, -16.0dB*/
+	{0x09, 0x09, 0x08, 0x05, 0x00, 0x00, 0x00, 0x00},	/* 1, -15.5dB*/
+	{0x0a, 0x09, 0x08, 0x05, 0x00, 0x00, 0x00, 0x00},	/*  2, -15.0dB*/
+	{0x0a, 0x0a, 0x09, 0x05, 0x00, 0x00, 0x00, 0x00},	/* 3, -14.5dB*/
+	{0x0b, 0x0a, 0x09, 0x05, 0x00, 0x00, 0x00, 0x00},	/*  4, -14.0dB*/
+	{0x0b, 0x0b, 0x0a, 0x06, 0x00, 0x00, 0x00, 0x00},	/*5, -13.5dB*/
+	{0x0c, 0x0c, 0x0a, 0x06, 0x00, 0x00, 0x00, 0x00},	/* 6, -13.0dB*/
+	{0x0d, 0x0c, 0x0b, 0x06, 0x00, 0x00, 0x00, 0x00},	/*  7, -12.5dB*/
+	{0x0d, 0x0d, 0x0c, 0x07, 0x00, 0x00, 0x00, 0x00},	/* 8, -12.0dB*/
+	{0x0e, 0x0e, 0x0c, 0x07, 0x00, 0x00, 0x00, 0x00},	/* 9, -11.5dB*/
+	{0x0f, 0x0f, 0x0d, 0x08, 0x00, 0x00, 0x00, 0x00},	/* 10, -11.0dB*/
+	{0x10, 0x10, 0x0e, 0x08, 0x00, 0x00, 0x00, 0x00},	/*11, -10.5dB*/
+	{0x11, 0x11, 0x0f, 0x09, 0x00, 0x00, 0x00, 0x00},	/* 12, -10.0dB*/
+	{0x12, 0x12, 0x0f, 0x09, 0x00, 0x00, 0x00, 0x00},	/* 13, -9.5dB*/
+	{0x13, 0x13, 0x10, 0x0a, 0x00, 0x00, 0x00, 0x00},	/*14, -9.0dB */
+	{0x14, 0x14, 0x11, 0x0a, 0x00, 0x00, 0x00, 0x00},	/* 15, -8.5dB*/
+	{0x16, 0x15, 0x12, 0x0b, 0x00, 0x00, 0x00, 0x00},	/* 16, -8.0dB */
+	{0x17, 0x16, 0x13, 0x0b, 0x00, 0x00, 0x00, 0x00},	/* 17, -7.5dB*/
+	{0x18, 0x17, 0x15, 0x0c, 0x00, 0x00, 0x00, 0x00},	/* 18, -7.0dB */
+	{0x1a, 0x19, 0x16, 0x0d, 0x00, 0x00, 0x00, 0x00},	/* 19, -6.5dB */
+	{0x1b, 0x1a, 0x17, 0x0e, 0x00, 0x00, 0x00, 0x00},	/* 20, -6.0dB */
+	{0x1d, 0x1c, 0x18, 0x0e, 0x00, 0x00, 0x00, 0x00},	/* 21, -5.5dB*/
+	{0x1f, 0x1e, 0x1a, 0x0f, 0x00, 0x00, 0x00, 0x00},	/* 22, -5.0dB */
+	{0x20, 0x20, 0x1b, 0x10, 0x00, 0x00, 0x00, 0x00},	/*23, -4.5dB*/
+	{0x22, 0x21, 0x1d, 0x11, 0x00, 0x00, 0x00, 0x00},	/* 24, -4.0dB */
+	{0x24, 0x23, 0x1f, 0x12, 0x00, 0x00, 0x00, 0x00},	/* 25, -3.5dB */
+	{0x26, 0x25, 0x21, 0x13, 0x00, 0x00, 0x00, 0x00},	/* 26, -3.0dB */
+	{0x28, 0x28, 0x24, 0x14, 0x00, 0x00, 0x00, 0x00},	/*27, -2.5dB*/
+	{0x2b, 0x2a, 0x25, 0x15, 0x00, 0x00, 0x00, 0x00},	/* 28, -2.0dB */
+	{0x2d, 0x2d, 0x17, 0x17, 0x00, 0x00, 0x00, 0x00},	/*29, -1.5dB*/
+	{0x30, 0x2f, 0x29, 0x18, 0x00, 0x00, 0x00, 0x00},	/* 30, -1.0dB */
+	{0x33, 0x32, 0x2b, 0x19, 0x00, 0x00, 0x00, 0x00},	/* 31, -0.5dB */
+	{0x36, 0x35, 0x2e, 0x1b, 0x00, 0x00, 0x00, 0x00}	/* 32, +0dB	*/
+};
+
+u32 cck_swing_table_ch1_ch14_8723d[CCK_TABLE_SIZE_8723D] = {
+	0x0CD,          /*0 ,    -20dB*/
+	0x0D9,
+	0x0E6,
+	0x0F3,
+	0x102,
+	0x111,
+	0x121,
+	0x132,
+	0x144,
+	0x158,
+	0x16C,
+	0x182,
+	0x198,
+	0x1B1,
+	0x1CA,
+	0x1E5,
+	0x202,
+	0x221,
+	0x241,
+	0x263,
+	0x287,
+	0x2AE,
+	0x2D6,
+	0x301,
+	0x32F,
+	0x35F,
+	0x392,
+	0x3C9,
+	0x402,
+	0x43F,
+	0x47F,
+	0x4C3,
+	0x50C,
+	0x558,
+	0x5A9,
+	0x5FF,
+	0x65A,
+	0x6BA,
+	0x720,
+	0x78C,
+	0x7FF,
+};
+
+/* JJ ADD 20161014 */
+u32 cck_swing_table_ch1_ch14_8710b[CCK_TABLE_SIZE_8710B] = {
+	0x0CD,          /*0 ,    -20dB*/
+	0x0D9,
+	0x0E6,
+	0x0F3,
+	0x102,
+	0x111,
+	0x121,
+	0x132,
+	0x144,
+	0x158,
+	0x16C,
+	0x182,
+	0x198,
+	0x1B1,
+	0x1CA,
+	0x1E5,
+	0x202,
+	0x221,
+	0x241,
+	0x263,
+	0x287,
+	0x2AE,
+	0x2D6,
+	0x301,
+	0x32F,
+	0x35F,
+	0x392,
+	0x3C9,
+	0x402,
+	0x43F,
+	0x47F,
+	0x4C3,
+	0x50C,
+	0x558,
+	0x5A9,
+	0x5FF,
+	0x65A,
+	0x6BA,
+	0x720,
+	0x78C,
+	0x7FF,
+};
+
+/* Winnita ADD 20171116 PathA 0xAB4[10:0],PathB 0xAB4[21:11]*/
+u32 cck_swing_table_ch1_ch14_8192f[CCK_TABLE_SIZE_8192F] = {
+	0x0CD,			 /*0 ,    -20dB*/
+	0x0D9,
+	0x0E6,
+	0x0F3,
+	0x102,
+	0x111,
+	0x121,
+	0x132,
+	0x144,
+	0x158,
+	0x16C,
+	0x182,
+	0x198,
+	0x1B1,
+	0x1CA,
+	0x1E5,
+	0x202,
+	0x221,
+	0x241,
+	0x263,		/*19*/
+	0x287,		/*20*/
+	0x2AE,		/*21*/
+	0x2D6,		/*22*/
+	0x301,		/*23*/
+	0x32F,		/*24*/
+	0x35F,		/*25*/
+	0x392,		/*26*/
+	0x3C9,		/*27*/
+	0x402,		/*28*/
+	0x43F,		/*29*/
+	0x47F,		/*30*/
+	0x4C3,		/*31*/
+	0x50C,		/*32*/
+	0x558,		/*33*/
+	0x5A9,		/*34*/
+	0x5FF,		/*35*/
+	0x65A,		/*36*/
+	0x6BA,
+	0x720,
+	0x78C,
+	0x7FF,
+};
+
+/* Winnita ADD 201805 PathA 0xAB4[10:0]*/
+u32 cck_swing_table_ch1_ch14_8721d[CCK_TABLE_SIZE_8721D] = {
+	0x0CD,			 /*0 ,    -20dB*/
+	0x0D9,
+	0x0E6,
+	0x0F3,
+	0x102,
+	0x111,
+	0x121,
+	0x132,
+	0x144,
+	0x158,
+	0x16C,
+	0x182,
+	0x198,
+	0x1B1,
+	0x1CA,
+	0x1E5,
+	0x202,
+	0x221,
+	0x241,
+	0x263,		/*19*/
+	0x287,		/*20*/
+	0x2AE,		/*21*/
+	0x2D6,		/*22*/
+	0x301,		/*23*/
+	0x32F,		/*24*/
+	0x35F,		/*25*/
+	0x392,		/*26*/
+	0x3C9,		/*27*/
+	0x402,		/*28*/
+	0x43F,		/*29*/
+	0x47F,		/*30*/
+	0x4C3,		/*31*/
+	0x50C,		/*32*/
+	0x558,		/*33*/
+	0x5A9,		/*34*/
+	0x5FF,		/*35*/
+	0x65A,		/*36*/
+	0x6BA,
+	0x720,
+	0x78C,
+	0x7FF,
+};
+
+u32 tx_scaling_table_jaguar[TXSCALE_TABLE_SIZE] = {
+	0x081, /* 0,  -12.0dB*/
+	0x088, /* 1,  -11.5dB*/
+	0x090, /* 2,  -11.0dB*/
+	0x099, /* 3,  -10.5dB*/
+	0x0A2, /* 4,  -10.0dB*/
+	0x0AC, /* 5,  -9.5dB*/
+	0x0B6, /* 6,  -9.0dB*/
+	0x0C0, /*7,  -8.5dB*/
+	0x0CC, /* 8,  -8.0dB*/
+	0x0D8, /* 9,  -7.5dB*/
+	0x0E5, /* 10, -7.0dB*/
+	0x0F2, /* 11, -6.5dB*/
+	0x101, /* 12, -6.0dB*/
+	0x110, /* 13, -5.5dB*/
+	0x120, /* 14, -5.0dB*/
+	0x131, /* 15, -4.5dB*/
+	0x143, /* 16, -4.0dB*/
+	0x156, /* 17, -3.5dB*/
+	0x16A, /* 18, -3.0dB*/
+	0x180, /* 19, -2.5dB*/
+	0x197, /* 20, -2.0dB*/
+	0x1AF, /* 21, -1.5dB*/
+	0x1C8, /* 22, -1.0dB*/
+	0x1E3, /* 23, -0.5dB*/
+	0x200, /* 24, +0  dB*/
+	0x21E, /* 25, +0.5dB*/
+	0x23E, /* 26, +1.0dB*/
+	0x261, /* 27, +1.5dB*/
+	0x285,/* 28, +2.0dB*/
+	0x2AB, /* 29, +2.5dB*/
+	0x2D3, /*30, +3.0dB*/
+	0x2FE, /* 31, +3.5dB*/
+	0x32B, /* 32, +4.0dB*/
+	0x35C, /* 33, +4.5dB*/
+	0x38E, /* 34, +5.0dB*/
+	0x3C4, /* 35, +5.5dB*/
+	0x3FE  /* 36, +6.0dB	*/
+};
+
+void
+odm_txpowertracking_init(
+	void	*dm_void
+)
+{
+	struct dm_struct	*dm = (struct dm_struct *)dm_void;
+
+	odm_txpowertracking_thermal_meter_init(dm);
+}
+
+u8
+get_swing_index(
+	void	*dm_void
+)
+{
+	struct dm_struct	*dm = (struct dm_struct *)dm_void;
+
+	u8	i = 0;
+	u32	bb_swing;
+	u32	swing_table_size;
+	u32	*swing_table;
+
+	if (dm->support_ic_type == ODM_RTL8195B) {
+		bb_swing = odm_get_bb_reg(dm, R_0xc1c, 0xFFE00000);
+		swing_table = tx_scaling_table_jaguar;
+		swing_table_size = TXSCALE_TABLE_SIZE;
+	}
+
+	for (i = 0; i < swing_table_size; i++) {
+		u32 table_value = swing_table[i];
+
+		table_value = table_value;
+		if (bb_swing == table_value)
+			break;
+	}
+
+	return i;
+}
+
+u8
+get_cck_swing_index(
+	void		*dm_void
+)
+{
+	struct dm_struct		*dm = (struct dm_struct *)dm_void;
+
+	u8			i = 0;
+	u32			bb_cck_swing;
+
+	if (dm->support_ic_type == ODM_RTL8188E || dm->support_ic_type == ODM_RTL8723B ||
+	    dm->support_ic_type == ODM_RTL8192E) {
+		bb_cck_swing = odm_read_1byte(dm, 0xa22);
+
+		for (i = 0; i < CCK_TABLE_SIZE; i++) {
+			if (bb_cck_swing == cck_swing_table_ch1_ch13_new[i][0])
+				break;
+		}
+	} else if (dm->support_ic_type == ODM_RTL8703B) {
+		bb_cck_swing = odm_read_1byte(dm, 0xa22);
+
+		for (i = 0; i < CCK_TABLE_SIZE_88F; i++) {
+			if (bb_cck_swing == cck_swing_table_ch1_ch14_88f[i][0])
+				break;
+		}
+	}
+
+	return i;
+}
+
+void
+odm_txpowertracking_thermal_meter_init(
+	void	*dm_void
+)
+{
+	struct dm_struct	*dm = (struct dm_struct *)dm_void;
+	u8 default_swing_index = get_swing_index(dm);
+	u8 p = 0;
+	struct dm_rf_calibration_struct	*cali_info = &dm->rf_calibrate_info;
+	struct _hal_rf_ *rf = &dm->rf_table;
+
+	if (!(*dm->mp_mode))
+		cali_info->txpowertrack_control = true;
+	else
+		cali_info->txpowertrack_control = false;
+
+	RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "dm txpowertrack_control = %d\n", cali_info->txpowertrack_control);
+
+	/* dm->rf_calibrate_info.txpowertrack_control = true; */
+	cali_info->thermal_value = rf->eeprom_thermal;
+	cali_info->thermal_value_iqk = rf->eeprom_thermal;
+	cali_info->thermal_value_lck = rf->eeprom_thermal;
+
+	if (!cali_info->default_bb_swing_index_flag) {
+		if (dm->support_ic_type == ODM_RTL8195B) {
+			cali_info->default_ofdm_index = (default_swing_index >= TXSCALE_TABLE_SIZE) ? 24 : default_swing_index;
+			cali_info->default_cck_index = 24;
+		} else if (dm->support_ic_type == ODM_RTL8721D) {
+			cali_info->default_ofdm_index = 30;	/*OFDM: 0dB*/
+			cali_info->default_cck_index = 28;	/*CCK: -6dB*/
+		}
+		cali_info->default_bb_swing_index_flag = true;
+	}
+
+	cali_info->bb_swing_idx_cck_base = cali_info->default_cck_index;
+	cali_info->CCK_index = cali_info->default_cck_index;
+
+	for (p = RF_PATH_A; p < MAX_RF_PATH; ++p) {
+		cali_info->bb_swing_idx_ofdm_base[p] = cali_info->default_ofdm_index;
+		cali_info->OFDM_index[p] = cali_info->default_ofdm_index;
+		cali_info->delta_power_index[p] = 0;
+		cali_info->delta_power_index_last[p] = 0;
+		cali_info->power_index_offset[p] = 0;
+	}
+	cali_info->modify_tx_agc_value_ofdm = 0;
+	cali_info->modify_tx_agc_value_cck = 0;
+	cali_info->tm_trigger = 0;
+}
+
+void
+odm_txpowertracking_check(
+	void	*dm_void
+)
+{
+	struct dm_struct	*dm = (struct dm_struct *)dm_void;
+
+	odm_txpowertracking_check_iot(dm);
+}
+
+void
+odm_txpowertracking_check_iot(
+	void	*dm_void
+)
+{
+	struct dm_struct	*dm = (struct dm_struct *)dm_void;
+	struct _hal_rf_		*rf = &dm->rf_table;
+
+	if (!(rf->rf_supportability & HAL_RF_TX_PWR_TRACK))
+		return;
+
+	if (!dm->rf_calibrate_info.tm_trigger) {
+		if (dm->support_ic_type == ODM_RTL8195B)
+			odm_set_rf_reg(dm, RF_PATH_A, RF_T_METER_NEW, (BIT(17) | BIT(16)), 0x03);
+		else if (dm->support_ic_type == ODM_RTL8721D)
+			odm_set_rf_reg(dm, RF_PATH_A, RF_T_METER_NEW,
+				       (BIT(12) | BIT(11)), 0x03);
+
+		dm->rf_calibrate_info.tm_trigger = 1;
+		return;
+	}
+	odm_txpowertracking_callback_thermal_meter(dm);
+	dm->rf_calibrate_info.tm_trigger = 0;
+}
+
+void
+odm_txpowertracking_check_mp(
+	void	*dm_void
+)
+{
+#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
+	struct dm_struct		*dm = (struct dm_struct *)dm_void;
+	void	*adapter = dm->adapter;
+
+	if (odm_check_power_status(adapter) == false) {
+		RT_TRACE(COMP_POWER_TRACKING, DBG_LOUD, ("check_pow_status, return false\n"));
+		return;
+	}
+
+	odm_txpowertracking_thermal_meter_check(adapter);
+#endif
+}
+
+void
+odm_txpowertracking_check_ap(
+	void	*dm_void
+)
+{
+#if (DM_ODM_SUPPORT_TYPE == ODM_AP)
+	struct dm_struct		*dm = (struct dm_struct *)dm_void;
+	struct rtl8192cd_priv	*priv		= dm->priv;
+
+	return;
+
+#endif
+}
diff --git a/rtl8723DS/hal/phydm/halrf/halrf_powertracking_iot.h b/rtl8723DS/hal/phydm/halrf/halrf_powertracking_iot.h
new file mode 100644
index 0000000..55460a6
--- a/dev/null
+++ b/rtl8723DS/hal/phydm/halrf/halrf_powertracking_iot.h
@@ -0,0 +1,349 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2007 - 2017  Realtek Corporation.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ *
+ * The full GNU General Public License is included in this distribution in the
+ * file called LICENSE.
+ *
+ * Contact Information:
+ * wlanfae <wlanfae@realtek.com>
+ * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
+ * Hsinchu 300, Taiwan.
+ *
+ * Larry Finger <Larry.Finger@lwfinger.net>
+ *
+ *****************************************************************************/
+
+#ifndef __HALRF_POWERTRACKING_H__
+#define __HALRF_POWERTRACKING_H__
+
+#define		DPK_DELTA_MAPPING_NUM	13
+#define		index_mapping_HP_NUM	15
+#define	OFDM_TABLE_SIZE	43
+#define	CCK_TABLE_SIZE			33
+#define	CCK_TABLE_SIZE_88F	21
+#define TXSCALE_TABLE_SIZE		37
+#define CCK_TABLE_SIZE_8723D	41
+/* JJ ADD 20161014 */
+#define CCK_TABLE_SIZE_8710B	41
+#define	CCK_TABLE_SIZE_8192F   41
+#define	CCK_TABLE_SIZE_8721D   41
+
+
+#define TXPWR_TRACK_TABLE_SIZE	30
+#define DELTA_SWINGIDX_SIZE     30
+#define DELTA_SWINTSSI_SIZE     61
+#define BAND_NUM				4
+
+#define AVG_THERMAL_NUM		8
+#define IQK_MAC_REG_NUM		4
+#define IQK_ADDA_REG_NUM		16
+#define IQK_BB_REG_NUM_MAX	10
+
+#define IQK_BB_REG_NUM		9
+
+
+
+#define iqk_matrix_reg_num	8
+#if (DM_ODM_SUPPORT_TYPE == ODM_CE) && defined(DM_ODM_CE_MAC80211)
+#else
+#define IQK_MATRIX_SETTINGS_NUM	(14+24+21) /* Channels_2_4G_NUM + Channels_5G_20M_NUM + Channels_5G */
+#endif
+
+extern	u32 ofdm_swing_table[OFDM_TABLE_SIZE];
+extern	u8 cck_swing_table_ch1_ch13[CCK_TABLE_SIZE][8];
+extern	u8 cck_swing_table_ch14[CCK_TABLE_SIZE][8];
+
+extern	u32 ofdm_swing_table_new[OFDM_TABLE_SIZE];
+extern	u8 cck_swing_table_ch1_ch13_new[CCK_TABLE_SIZE][8];
+extern	u8 cck_swing_table_ch14_new[CCK_TABLE_SIZE][8];
+extern	u8 cck_swing_table_ch1_ch14_88f[CCK_TABLE_SIZE_88F][16];
+extern	u8 cck_swing_table_ch1_ch13_88f[CCK_TABLE_SIZE_88F][16];
+extern	u8 cck_swing_table_ch14_88f[CCK_TABLE_SIZE_88F][16];
+extern	u32 cck_swing_table_ch1_ch14_8723d[CCK_TABLE_SIZE_8723D];
+/* JJ ADD 20161014 */
+extern	u32 cck_swing_table_ch1_ch14_8710b[CCK_TABLE_SIZE_8710B];
+extern	u32 cck_swing_table_ch1_ch14_8192f[CCK_TABLE_SIZE_8192F];
+extern	u32 cck_swing_table_ch1_ch14_8721d[CCK_TABLE_SIZE_8721D];
+
+extern  u32 tx_scaling_table_jaguar[TXSCALE_TABLE_SIZE];
+
+/* <20121018, Kordan> In case fail to read TxPowerTrack.txt, we use the table of 88E as the default table. */
+#if (DM_ODM_SUPPORT_TYPE == ODM_CE) && defined(DM_ODM_CE_MAC80211)
+#else
+static u8 delta_swing_table_idx_2ga_p_8188e[] = {0, 0, 0, 0, 1, 1, 2, 2, 3, 3, 4, 4, 4,  4,  4,  4,  4,  4,  5,  5,  7,  7,  8,  8,  8,  9,  9,  9,  9,  9};
+static u8 delta_swing_table_idx_2ga_n_8188e[] = {0, 0, 0, 2, 2, 3, 3, 4, 4, 4, 4, 5, 5,  6,  6,  7,  7,  7,  7,  8,  8,  9,  9, 10, 10, 10, 11, 11, 11, 11};
+#endif
+
+void
+odm_txpowertracking_init(
+	void		*dm_void
+);
+
+#define dm_check_txpowertracking	odm_txpowertracking_check
+
+struct iqk_matrix_regs_setting {
+	boolean	is_iqk_done;
+	s32		value[3][iqk_matrix_reg_num];
+	boolean	is_bw_iqk_result_saved[3];
+};
+
+struct dm_rf_calibration_struct {
+	/* for tx power tracking */
+
+	u32	rega24; /* for TempCCK */
+	s32	rege94;
+	s32	rege9c;
+	s32	regeb4;
+	s32	regebc;
+
+	u8	tx_powercount;
+	boolean is_txpowertracking_init;
+	boolean is_txpowertracking;
+	u8  	txpowertrack_control; /* for mp mode, turn off txpwrtracking as default */
+	u8	tm_trigger;
+	u8  	internal_pa_5g[2];	/* pathA / pathB */
+
+	u8  	thermal_meter[2];    /* thermal_meter, index 0 for RFIC0, and 1 for RFIC1 */
+	u8	thermal_value;
+	u8	thermal_value_lck;
+	u8	thermal_value_iqk;
+	s8  	thermal_value_delta; /* delta of thermal_value and efuse thermal */
+	u8	thermal_value_dpk;
+	u8	thermal_value_avg[AVG_THERMAL_NUM];
+	u8	thermal_value_avg_index;
+	u8	thermal_value_rx_gain;
+	u8	thermal_value_crystal;
+	u8	thermal_value_dpk_store;
+	u8	thermal_value_dpk_track;
+	boolean	txpowertracking_in_progress;
+
+	boolean	is_reloadtxpowerindex;
+	u8	is_rf_pi_enable;
+	u32 	txpowertracking_callback_cnt; /* cosa add for debug */
+
+
+	/* ------------------------- Tx power Tracking ------------------------- */
+	u8	is_cck_in_ch14;
+	u8	CCK_index;
+	u8	OFDM_index[MAX_RF_PATH];
+	s8	power_index_offset[MAX_RF_PATH];
+	s8	delta_power_index[MAX_RF_PATH];
+	s8	delta_power_index_last[MAX_RF_PATH];
+	boolean is_tx_power_changed;
+	s8	xtal_offset;
+	s8	xtal_offset_last;
+
+	struct iqk_matrix_regs_setting iqk_matrix_reg_setting[IQK_MATRIX_SETTINGS_NUM];
+	u8	delta_lck;
+	s8  bb_swing_diff_2g, bb_swing_diff_5g; /* Unit: dB */
+	u8  delta_swing_table_idx_2g_cck_a_p[DELTA_SWINGIDX_SIZE];
+	u8  delta_swing_table_idx_2g_cck_a_n[DELTA_SWINGIDX_SIZE];
+	u8  delta_swing_table_idx_2g_cck_b_p[DELTA_SWINGIDX_SIZE];
+	u8  delta_swing_table_idx_2g_cck_b_n[DELTA_SWINGIDX_SIZE];
+	u8  delta_swing_table_idx_2g_cck_c_p[DELTA_SWINGIDX_SIZE];
+	u8  delta_swing_table_idx_2g_cck_c_n[DELTA_SWINGIDX_SIZE];
+	u8  delta_swing_table_idx_2g_cck_d_p[DELTA_SWINGIDX_SIZE];
+	u8  delta_swing_table_idx_2g_cck_d_n[DELTA_SWINGIDX_SIZE];
+	u8  delta_swing_table_idx_2ga_p[DELTA_SWINGIDX_SIZE];
+	u8  delta_swing_table_idx_2ga_n[DELTA_SWINGIDX_SIZE];
+	u8  delta_swing_table_idx_2gb_p[DELTA_SWINGIDX_SIZE];
+	u8  delta_swing_table_idx_2gb_n[DELTA_SWINGIDX_SIZE];
+	u8  delta_swing_table_idx_2gc_p[DELTA_SWINGIDX_SIZE];
+	u8  delta_swing_table_idx_2gc_n[DELTA_SWINGIDX_SIZE];
+	u8  delta_swing_table_idx_2gd_p[DELTA_SWINGIDX_SIZE];
+	u8  delta_swing_table_idx_2gd_n[DELTA_SWINGIDX_SIZE];
+	u8  delta_swing_table_idx_5ga_p[BAND_NUM][DELTA_SWINGIDX_SIZE];
+	u8  delta_swing_table_idx_5ga_n[BAND_NUM][DELTA_SWINGIDX_SIZE];
+	u8  delta_swing_table_idx_5gb_p[BAND_NUM][DELTA_SWINGIDX_SIZE];
+	u8  delta_swing_table_idx_5gb_n[BAND_NUM][DELTA_SWINGIDX_SIZE];
+	u8  delta_swing_table_idx_5gc_p[BAND_NUM][DELTA_SWINGIDX_SIZE];
+	u8  delta_swing_table_idx_5gc_n[BAND_NUM][DELTA_SWINGIDX_SIZE];
+	u8  delta_swing_table_idx_5gd_p[BAND_NUM][DELTA_SWINGIDX_SIZE];
+	u8  delta_swing_table_idx_5gd_n[BAND_NUM][DELTA_SWINGIDX_SIZE];
+	u8  delta_swing_tssi_table_2g_cck_a[DELTA_SWINTSSI_SIZE];
+	u8  delta_swing_tssi_table_2g_cck_b[DELTA_SWINTSSI_SIZE];
+	u8  delta_swing_tssi_table_2g_cck_c[DELTA_SWINTSSI_SIZE];
+	u8  delta_swing_tssi_table_2g_cck_d[DELTA_SWINTSSI_SIZE];
+	u8  delta_swing_tssi_table_2ga[DELTA_SWINTSSI_SIZE];
+	u8  delta_swing_tssi_table_2gb[DELTA_SWINTSSI_SIZE];
+	u8  delta_swing_tssi_table_2gc[DELTA_SWINTSSI_SIZE];
+	u8  delta_swing_tssi_table_2gd[DELTA_SWINTSSI_SIZE];
+	u8  delta_swing_tssi_table_5ga[BAND_NUM][DELTA_SWINTSSI_SIZE];
+	u8  delta_swing_tssi_table_5gb[BAND_NUM][DELTA_SWINTSSI_SIZE];
+	u8  delta_swing_tssi_table_5gc[BAND_NUM][DELTA_SWINTSSI_SIZE];
+	u8  delta_swing_tssi_table_5gd[BAND_NUM][DELTA_SWINTSSI_SIZE];
+	s8  delta_swing_table_xtal_p[DELTA_SWINGIDX_SIZE];
+	s8  delta_swing_table_xtal_n[DELTA_SWINGIDX_SIZE];
+	u8  delta_swing_table_idx_2ga_p_8188e[DELTA_SWINGIDX_SIZE];
+	u8  delta_swing_table_idx_2ga_n_8188e[DELTA_SWINGIDX_SIZE];
+
+	u8			bb_swing_idx_ofdm[MAX_RF_PATH];
+	u8			bb_swing_idx_ofdm_current;
+#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_CE | ODM_IOT))
+	u8			bb_swing_idx_ofdm_base[MAX_RF_PATH];
+#else
+	u8			bb_swing_idx_ofdm_base;
+#endif
+	boolean		default_bb_swing_index_flag;
+	boolean			bb_swing_flag_ofdm;
+	u8			bb_swing_idx_cck;
+	u8			bb_swing_idx_cck_current;
+	u8			bb_swing_idx_cck_base;
+	u8			default_ofdm_index;
+	u8			default_cck_index;
+	boolean			bb_swing_flag_cck;
+
+	s8			absolute_ofdm_swing_idx[MAX_RF_PATH];
+	s8			remnant_ofdm_swing_idx[MAX_RF_PATH];
+	s8			absolute_cck_swing_idx[MAX_RF_PATH];
+	s8			remnant_cck_swing_idx;
+	s8			modify_tx_agc_value;       /*Remnat compensate value at tx_agc */
+	boolean			modify_tx_agc_flag_path_a;
+	boolean			modify_tx_agc_flag_path_b;
+	boolean			modify_tx_agc_flag_path_c;
+	boolean			modify_tx_agc_flag_path_d;
+	boolean			modify_tx_agc_flag_path_a_cck;
+	boolean			modify_tx_agc_flag_path_b_cck;
+
+	s8			kfree_offset[MAX_RF_PATH];
+
+	/* -------------------------------------------------------------------- */
+
+	/* for IQK */
+	u32	regc04;
+	u32	reg874;
+	u32	regc08;
+	u32	regb68;
+	u32	regb6c;
+	u32	reg870;
+	u32	reg860;
+	u32	reg864;
+
+	boolean	is_iqk_initialized;
+	boolean is_lck_in_progress;
+	boolean	is_antenna_detected;
+	boolean	is_need_iqk;
+	boolean	is_iqk_in_progress;
+	boolean is_iqk_pa_off;
+	u8	delta_iqk;
+	u32	ADDA_backup[IQK_ADDA_REG_NUM];
+	u32	IQK_MAC_backup[IQK_MAC_REG_NUM];
+	u32	IQK_BB_backup_recover[9];
+	u32	IQK_BB_backup[IQK_BB_REG_NUM];
+	u32 	tx_iqc_8723b[2][3][2]; /* { {S1: 0xc94, 0xc80, 0xc4c} , {S0: 0xc9c, 0xc88, 0xc4c}} */
+	u32 	rx_iqc_8723b[2][2][2]; /* { {S1: 0xc14, 0xca0} ,           {S0: 0xc14, 0xca0}} */
+	u32	tx_iqc_8703b[3][2];	/* { {S1: 0xc94, 0xc80, 0xc4c} , {S0: 0xc9c, 0xc88, 0xc4c}}*/
+	u32	rx_iqc_8703b[2][2];	/* { {S1: 0xc14, 0xca0} ,           {S0: 0xc14, 0xca0}}*/
+	u32	tx_iqc_8723d[2][3][2];	/* { {S1: 0xc94, 0xc80, 0xc4c} , {S0: 0xc9c, 0xc88, 0xc4c}}*/
+	u32	rx_iqc_8723d[2][2][2];	/* { {S1: 0xc14, 0xca0} ,           {S0: 0xc14, 0xca0}}*/
+	/* JJ ADD 20161014 */
+	u32	tx_iqc_8710b[2][3][2];	/* { {S1: 0xc94, 0xc80, 0xc4c} , {S0: 0xc9c, 0xc88, 0xc4c}}*/
+	u32	rx_iqc_8710b[2][2][2];	/* { {S1: 0xc14, 0xca0} ,           {S0: 0xc14, 0xca0}}*/
+
+	u8	iqk_step;
+	u8	kcount;
+	u8	retry_count[4][2]; /* [4]: path ABCD, [2] TXK, RXK */
+	boolean	is_mp_mode;
+
+
+
+	/* <James> IQK time measurement */
+	u32	iqk_start_time;
+	u32	iqk_progressing_time;
+	u32	iqk_total_progressing_time;
+	u32	lck_progressing_time;
+
+	u32  lok_result;
+
+	/* for APK */
+	u32 	ap_koutput[2][2]; /* path A/B; output1_1a/output1_2a */
+	u8	is_ap_kdone;
+	u8	is_apk_thermal_meter_ignore;
+
+	/* DPK */
+	boolean is_dpk_fail;
+	u8	is_dp_done;
+	u8	is_dp_path_aok;
+	u8	is_dp_path_bok;
+
+	u32	tx_lok[2];
+	u32  dpk_tx_agc;
+	s32  dpk_gain;
+	u32  dpk_thermal[4];
+	s8 modify_tx_agc_value_ofdm;
+	s8 modify_tx_agc_value_cck;
+
+	/*Add by Yuchen for Kfree Phydm*/
+	u8			reg_rf_kfree_enable;	/*for registry*/
+	u8			rf_kfree_enable;		/*for efuse enable check*/
+
+};
+
+
+void
+odm_txpowertracking_check(
+	void		*dm_void
+);
+
+void
+odm_txpowertracking_check_ap(
+	void		*dm_void
+);
+
+void
+odm_txpowertracking_thermal_meter_init(
+	void		*dm_void
+);
+
+
+void
+odm_txpowertracking_check_mp(
+	void		*dm_void
+);
+
+
+void
+odm_txpowertracking_check_iot(
+	void		*dm_void
+);
+
+#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN))
+
+void
+odm_txpowertracking_callback_thermal_meter92c(
+	void	*adapter
+);
+
+void
+odm_txpowertracking_callback_rx_gain_thermal_meter92d(
+	void	*adapter
+);
+
+void
+odm_txpowertracking_callback_thermal_meter92d(
+	void	*adapter
+);
+
+void
+odm_txpowertracking_direct_call92c(
+	void		*adapter
+);
+
+void
+odm_txpowertracking_thermal_meter_check(
+	void		*adapter
+);
+
+#endif
+
+#endif	/*#ifndef __HALRF_POWER_TRACKING_H__*/
diff --git a/rtl8723DS/hal/phydm/halrf/halrf_powertracking_win.c b/rtl8723DS/hal/phydm/halrf/halrf_powertracking_win.c
index c89d446..bad28f5 100755..100644
--- a/rtl8723DS/hal/phydm/halrf/halrf_powertracking_win.c
+++ b/rtl8723DS/hal/phydm/halrf/halrf_powertracking_win.c
@@ -419,6 +419,50 @@ u32 cck_swing_table_ch1_ch14_8710b[CCK_TABLE_SIZE_8710B] = {
 	0x7FF,
 };
 
+/* Winnita ADD 20170828 PathA 0xAB4[10:0],PathB 0xAB4[21:11]*/
+u32 cck_swing_table_ch1_ch14_8192f[CCK_TABLE_SIZE_8192F] = {
+	0x0CD,			 /*0 ,    -20dB*/
+	0x0D9,
+	0x0E6,
+	0x0F3,
+	0x102,
+	0x111,
+	0x121,
+	0x132,
+	0x144,
+	0x158,
+	0x16C,
+	0x182,
+	0x198,
+	0x1B1,
+	0x1CA,
+	0x1E5,
+	0x202,
+	0x221,
+	0x241,
+	0x263,		/*19*/
+	0x287,		/*20*/
+	0x2AE,		/*21*/
+	0x2D6,		/*22*/
+	0x301,		/*23*/
+	0x32F,		/*24*/
+	0x35F,		/*25*/
+	0x392,		/*26*/
+	0x3C9,		/*27*/
+	0x402,		/*28*/
+	0x43F,		/*29*/
+	0x47F,		/*30*/
+	0x4C3,		/*31*/
+	0x50C,		/*32*/
+	0x558,		/*33*/
+	0x5A9,		/*34*/
+	0x5FF,		/*35*/
+	0x65A,		/*36*/
+	0x6BA,
+	0x720,
+	0x78C,
+	0x7FF,
+};
 
 u32 tx_scaling_table_jaguar[TXSCALE_TABLE_SIZE] = {
 	0x081, /* 0,  -12.0dB */
@@ -462,74 +506,78 @@ u32 tx_scaling_table_jaguar[TXSCALE_TABLE_SIZE] = {
 
 void
 odm_txpowertracking_init(
-	void		*p_dm_void
+	void		*dm_void
 )
 {
-	struct PHY_DM_STRUCT		*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
+	struct dm_struct		*dm = (struct dm_struct *)dm_void;
 #if (DM_ODM_SUPPORT_TYPE & (ODM_AP))
-	if (!(p_dm->support_ic_type & (ODM_RTL8814A | ODM_IC_11N_SERIES | ODM_RTL8822B)))
+	if (!(dm->support_ic_type & (ODM_RTL8814A | ODM_IC_11N_SERIES | ODM_RTL8822B)))
 		return;
 #endif
 
-	odm_txpowertracking_thermal_meter_init(p_dm);
+	odm_txpowertracking_thermal_meter_init(dm);
 }
 
 u8
 get_swing_index(
-	void		*p_dm_void
+	void		*dm_void
 )
 {
-	struct PHY_DM_STRUCT		*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	struct _ADAPTER		*adapter = p_dm->adapter;
-	HAL_DATA_TYPE	*p_hal_data = GET_HAL_DATA(adapter);
+	struct dm_struct		*dm = (struct dm_struct *)dm_void;
+	void		*adapter = dm->adapter;
+	HAL_DATA_TYPE	*hal_data = GET_HAL_DATA(((PADAPTER)adapter));
 	u8			i = 0;
-	u32			bb_swing;
-	u32			swing_table_size;
-	u32			*p_swing_table;
+	u32			bb_swing, table_value;
+
+	if (dm->support_ic_type == ODM_RTL8188E || dm->support_ic_type == ODM_RTL8723B ||
+	    dm->support_ic_type == ODM_RTL8192E || dm->support_ic_type == ODM_RTL8188F || 
+	    dm->support_ic_type == ODM_RTL8703B || dm->support_ic_type == ODM_RTL8723D || 
+	    dm->support_ic_type == ODM_RTL8192F || dm->support_ic_type == ODM_RTL8710B ||
+	    dm->support_ic_type == ODM_RTL8821) {
+		bb_swing = odm_get_bb_reg(dm, REG_OFDM_0_XA_TX_IQ_IMBALANCE, 0xFFC00000);
 
-	if (p_dm->support_ic_type == ODM_RTL8188E || p_dm->support_ic_type == ODM_RTL8723B ||
-	    p_dm->support_ic_type == ODM_RTL8192E || p_dm->support_ic_type == ODM_RTL8188F || p_dm->support_ic_type == ODM_RTL8703B || p_dm->support_ic_type == ODM_RTL8723D || p_dm->support_ic_type == ODM_RTL8710B) {
-		bb_swing = odm_get_bb_reg(p_dm, REG_OFDM_0_XA_TX_IQ_IMBALANCE, 0xFFC00000);
+		for (i = 0; i < OFDM_TABLE_SIZE; i++) {
+			table_value = ofdm_swing_table_new[i];
 
-		p_swing_table = ofdm_swing_table_new;
-		swing_table_size = OFDM_TABLE_SIZE;
+			if (table_value >= 0x100000)
+				table_value >>= 22;
+			if (bb_swing == table_value)
+				break;
+		}
 	} else {
-		bb_swing = PHY_GetTxBBSwing_8812A(adapter, p_hal_data->CurrentBandType, RF_PATH_A);
-		p_swing_table = tx_scaling_table_jaguar;
-		swing_table_size = TXSCALE_TABLE_SIZE;
-	}
+		bb_swing = PHY_GetTxBBSwing_8812A(adapter, hal_data->CurrentBandType, RF_PATH_A);
 
-	for (i = 0; i < swing_table_size; ++i) {
-		u32 table_value = p_swing_table[i];
+		for (i = 0; i < TXSCALE_TABLE_SIZE; i++) {
+			table_value = tx_scaling_table_jaguar[i];
 
-		if (table_value >= 0x100000)
-			table_value >>= 22;
-		if (bb_swing == table_value)
-			break;
+			if (bb_swing == table_value)
+				break;
+		}
 	}
+
 	return i;
 }
 
 u8
 get_cck_swing_index(
-	void		*p_dm_void
+	void		*dm_void
 )
 {
-	struct PHY_DM_STRUCT		*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
+	struct dm_struct		*dm = (struct dm_struct *)dm_void;
 
 	u8			i = 0;
 	u32			bb_cck_swing;
 
-	if (p_dm->support_ic_type == ODM_RTL8188E || p_dm->support_ic_type == ODM_RTL8723B ||
-	    p_dm->support_ic_type == ODM_RTL8192E) {
-		bb_cck_swing = odm_read_1byte(p_dm, 0xa22);
+	if (dm->support_ic_type == ODM_RTL8188E || dm->support_ic_type == ODM_RTL8723B ||
+	    dm->support_ic_type == ODM_RTL8192E) {
+		bb_cck_swing = odm_read_1byte(dm, 0xa22);
 
 		for (i = 0; i < CCK_TABLE_SIZE; i++) {
 			if (bb_cck_swing == cck_swing_table_ch1_ch13_new[i][0])
 				break;
 		}
-	} else if (p_dm->support_ic_type == ODM_RTL8703B) {
-		bb_cck_swing = odm_read_1byte(p_dm, 0xa22);
+	} else if (dm->support_ic_type == ODM_RTL8703B) {
+		bb_cck_swing = odm_read_1byte(dm, 0xa22);
 
 		for (i = 0; i < CCK_TABLE_SIZE_88F; i++) {
 			if (bb_cck_swing == cck_swing_table_ch1_ch14_88f[i][0])
@@ -543,44 +591,44 @@ get_cck_swing_index(
 
 void
 odm_txpowertracking_thermal_meter_init(
-	void		*p_dm_void
+	void		*dm_void
 )
 {
-	struct PHY_DM_STRUCT		*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	u8 default_swing_index = get_swing_index(p_dm);
-	u8 default_cck_swing_index = get_cck_swing_index(p_dm);
-	struct odm_rf_calibration_structure	*p_rf_calibrate_info = &(p_dm->rf_calibrate_info);
+	struct dm_struct		*dm = (struct dm_struct *)dm_void;
+	u8 default_swing_index = get_swing_index(dm);
+	u8 default_cck_swing_index = get_cck_swing_index(dm);
+	struct dm_rf_calibration_struct	*cali_info = &(dm->rf_calibrate_info);
 
 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
-	struct _ADAPTER		*adapter = p_dm->adapter;
-	HAL_DATA_TYPE	*p_hal_data = GET_HAL_DATA(adapter);
+	void		*adapter = dm->adapter;
+	HAL_DATA_TYPE	*hal_data = GET_HAL_DATA(((PADAPTER)adapter));
 	u8			p = 0;
 
-	if (*(p_dm->p_mp_mode) == false)
-		p_rf_calibrate_info->txpowertrack_control = true;
+	if (*(dm->mp_mode) == false)
+		cali_info->txpowertrack_control = true;
 #elif (DM_ODM_SUPPORT_TYPE == ODM_CE)
 #ifdef CONFIG_RTL8188E
 	{
-		p_rf_calibrate_info->is_txpowertracking = true;
-		p_rf_calibrate_info->tx_powercount = 0;
-		p_rf_calibrate_info->is_txpowertracking_init = false;
+		cali_info->is_txpowertracking = true;
+		cali_info->tx_powercount = 0;
+		cali_info->is_txpowertracking_init = false;
 
-		if (*(p_dm->p_mp_mode) == false)
-			p_rf_calibrate_info->txpowertrack_control = true;
+		if (*(dm->mp_mode) == false)
+			cali_info->txpowertrack_control = true;
 
-		MSG_8192C("p_dm txpowertrack_control = %d\n", p_rf_calibrate_info->txpowertrack_control);
+		MSG_8192C("dm txpowertrack_control = %d\n", cali_info->txpowertrack_control);
 	}
 #else
 	{
-		struct _ADAPTER		*adapter = p_dm->adapter;
-		HAL_DATA_TYPE	*p_hal_data = GET_HAL_DATA(adapter);
-		struct dm_priv	*pdmpriv = &p_hal_data->dmpriv;
+		void		*adapter = dm->adapter;
+		HAL_DATA_TYPE	*hal_data = GET_HAL_DATA(((PADAPTER)adapter));
+		struct dm_priv	*pdmpriv = &hal_data->dmpriv;
 
 		pdmpriv->is_txpowertracking = true;
 		pdmpriv->tx_powercount = 0;
 		pdmpriv->is_txpowertracking_init = false;
 
-		if (*(p_dm->p_mp_mode) == false)
+		if (*(dm->mp_mode) == false)
 			pdmpriv->txpowertrack_control = true;
 
 		MSG_8192C("pdmpriv->txpowertrack_control = %d\n", pdmpriv->txpowertrack_control);
@@ -590,71 +638,76 @@ odm_txpowertracking_thermal_meter_init(
 #elif (DM_ODM_SUPPORT_TYPE & (ODM_AP))
 #ifdef RTL8188E_SUPPORT
 	{
-		p_rf_calibrate_info->is_txpowertracking = true;
-		p_rf_calibrate_info->tx_powercount = 0;
-		p_rf_calibrate_info->is_txpowertracking_init = false;
-		p_rf_calibrate_info->txpowertrack_control = true;
+		cali_info->is_txpowertracking = true;
+		cali_info->tx_powercount = 0;
+		cali_info->is_txpowertracking_init = false;
+		cali_info->txpowertrack_control = true;
 	}
 #endif
 #endif
 
 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
 #if (MP_DRIVER == 1)
-	p_rf_calibrate_info->txpowertrack_control = false;
+	cali_info->txpowertrack_control = false;
 #else
-	p_rf_calibrate_info->txpowertrack_control = true;
+	cali_info->txpowertrack_control = true;
 #endif
 #else
-	p_rf_calibrate_info->txpowertrack_control = true;
+	cali_info->txpowertrack_control = true;
 #endif
 
-	p_rf_calibrate_info->thermal_value		= p_hal_data->eeprom_thermal_meter;
-	p_rf_calibrate_info->thermal_value_iqk	= p_hal_data->eeprom_thermal_meter;
-	p_rf_calibrate_info->thermal_value_lck	= p_hal_data->eeprom_thermal_meter;
+	cali_info->thermal_value		= hal_data->eeprom_thermal_meter;
+	cali_info->thermal_value_iqk	= hal_data->eeprom_thermal_meter;
+	cali_info->thermal_value_lck	= hal_data->eeprom_thermal_meter;
 
-	if (p_rf_calibrate_info->default_bb_swing_index_flag != true) {
+	if (cali_info->default_bb_swing_index_flag != true) {
 		/*The index of "0 dB" in SwingTable.*/
-		if (p_dm->support_ic_type == ODM_RTL8188E || p_dm->support_ic_type == ODM_RTL8723B ||
-		    p_dm->support_ic_type == ODM_RTL8192E || p_dm->support_ic_type == ODM_RTL8703B) {
-			p_rf_calibrate_info->default_ofdm_index = (default_swing_index >= OFDM_TABLE_SIZE) ? 30 : default_swing_index;
-			p_rf_calibrate_info->default_cck_index = (default_cck_swing_index >= CCK_TABLE_SIZE) ? 20 : default_cck_swing_index;
-		} else if (p_dm->support_ic_type == ODM_RTL8188F) {          /*add by Mingzhi.Guo  2015-03-23*/
-			p_rf_calibrate_info->default_ofdm_index = 28;							/*OFDM: -1dB*/
-			p_rf_calibrate_info->default_cck_index = 20;							/*CCK:-6dB*/
-		} else if (p_dm->support_ic_type == ODM_RTL8723D) {			 /*add by zhaohe  2015-10-27*/
-			p_rf_calibrate_info->default_ofdm_index = 28;						 	   /*OFDM: -1dB*/
-			p_rf_calibrate_info->default_cck_index = 28;							/*CCK:   -6dB*/
+		if (dm->support_ic_type == ODM_RTL8188E || dm->support_ic_type == ODM_RTL8723B ||
+		    dm->support_ic_type == ODM_RTL8192E || dm->support_ic_type == ODM_RTL8703B ||
+		    dm->support_ic_type == ODM_RTL8821) {
+			cali_info->default_ofdm_index = (default_swing_index >= OFDM_TABLE_SIZE) ? 30 : default_swing_index;
+			cali_info->default_cck_index = (default_cck_swing_index >= CCK_TABLE_SIZE) ? 20 : default_cck_swing_index;
+		} else if (dm->support_ic_type == ODM_RTL8188F) {          /*add by Mingzhi.Guo  2015-03-23*/
+			cali_info->default_ofdm_index = 28;							/*OFDM: -1dB*/
+			cali_info->default_cck_index = 20;							/*CCK:-6dB*/
+		} else if (dm->support_ic_type == ODM_RTL8723D) {			 /*add by zhaohe  2015-10-27*/
+			cali_info->default_ofdm_index = 28;						 	   /*OFDM: -1dB*/
+			cali_info->default_cck_index = 28;							/*CCK:   -6dB*/
 			/* JJ ADD 20161014 */
-		} else if (p_dm->support_ic_type == ODM_RTL8710B) {			
-			p_rf_calibrate_info->default_ofdm_index = 28;					/*OFDM: -1dB*/
-			p_rf_calibrate_info->default_cck_index = 28;					/*CCK:   -6dB*/
+		} else if (dm->support_ic_type == ODM_RTL8710B) {			
+			cali_info->default_ofdm_index = 28;					/*OFDM: -1dB*/
+			cali_info->default_cck_index = 28;					/*CCK:   -6dB*/
+		/*Winnita add 20170828*/
+		} else if (dm->support_ic_type == ODM_RTL8192F) {			
+			cali_info->default_ofdm_index = 30;					/*OFDM: 0dB*/
+			cali_info->default_cck_index = 28;					/*CCK:   -6dB*/
 		} else {
-			p_rf_calibrate_info->default_ofdm_index = (default_swing_index >= TXSCALE_TABLE_SIZE) ? 24 : default_swing_index;
-			p_rf_calibrate_info->default_cck_index = 24;
+			cali_info->default_ofdm_index = (default_swing_index >= TXSCALE_TABLE_SIZE) ? 24 : default_swing_index;
+			cali_info->default_cck_index = 24;
 		}
-		p_rf_calibrate_info->default_bb_swing_index_flag = true;
+		cali_info->default_bb_swing_index_flag = true;
 	}
 
-	p_rf_calibrate_info->bb_swing_idx_cck_base = p_rf_calibrate_info->default_cck_index;
-	p_rf_calibrate_info->CCK_index = p_rf_calibrate_info->default_cck_index;
+	cali_info->bb_swing_idx_cck_base = cali_info->default_cck_index;
+	cali_info->CCK_index = cali_info->default_cck_index;
 
 	for (p = RF_PATH_A; p < MAX_RF_PATH; ++p) {
-		p_rf_calibrate_info->bb_swing_idx_ofdm_base[p] = p_rf_calibrate_info->default_ofdm_index;
-		p_rf_calibrate_info->OFDM_index[p] = p_rf_calibrate_info->default_ofdm_index;
-		p_rf_calibrate_info->delta_power_index[p] = 0;
-		p_rf_calibrate_info->delta_power_index_last[p] = 0;
-		p_rf_calibrate_info->power_index_offset[p] = 0;
-		p_rf_calibrate_info->kfree_offset[p] = 0;
+		cali_info->bb_swing_idx_ofdm_base[p] = cali_info->default_ofdm_index;
+		cali_info->OFDM_index[p] = cali_info->default_ofdm_index;
+		cali_info->delta_power_index[p] = 0;
+		cali_info->delta_power_index_last[p] = 0;
+		cali_info->power_index_offset[p] = 0;
+		cali_info->kfree_offset[p] = 0;
 	}
-	p_rf_calibrate_info->modify_tx_agc_value_ofdm = 0;
-	p_rf_calibrate_info->modify_tx_agc_value_cck = 0;
-
+	cali_info->modify_tx_agc_value_ofdm = 0;
+	cali_info->modify_tx_agc_value_cck = 0;
+	cali_info->tm_trigger = 0;
 }
 
 
 void
 odm_txpowertracking_check(
-	void		*p_dm_void
+	void		*dm_void
 )
 {
 
@@ -664,18 +717,18 @@ odm_txpowertracking_check(
 	/* HW dynamic mechanism. */
 #endif
 
-	struct PHY_DM_STRUCT		*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	switch	(p_dm->support_platform) {
+	struct dm_struct		*dm = (struct dm_struct *)dm_void;
+	switch	(dm->support_platform) {
 	case	ODM_WIN:
-		odm_txpowertracking_check_mp(p_dm);
+		odm_txpowertracking_check_mp(dm);
 		break;
 
 	case	ODM_CE:
-		odm_txpowertracking_check_ce(p_dm);
+		odm_txpowertracking_check_ce(dm);
 		break;
 
 	case	ODM_AP:
-		odm_txpowertracking_check_ap(p_dm);
+		odm_txpowertracking_check_ap(dm);
 		break;
 
 	default:
@@ -686,33 +739,33 @@ odm_txpowertracking_check(
 
 void
 odm_txpowertracking_check_ce(
-	void		*p_dm_void
+	void		*dm_void
 )
 {
-	struct PHY_DM_STRUCT		*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	struct _hal_rf_				*p_rf = &(p_dm->rf_table);
+	struct dm_struct		*dm = (struct dm_struct *)dm_void;
+	struct _hal_rf_				*rf = &(dm->rf_table);
 #if (DM_ODM_SUPPORT_TYPE == ODM_CE)
-	struct _ADAPTER	*adapter = p_dm->adapter;
+	void	*adapter = dm->adapter;
 #if ((RTL8188F_SUPPORT == 1))
 	rtl8192c_odm_check_txpowertracking(adapter);
 #endif
 
 #if (RTL8188E_SUPPORT == 1)
 
-	if (!(p_rf->rf_supportability & HAL_RF_TX_PWR_TRACK))
+	if (!(rf->rf_supportability & HAL_RF_TX_PWR_TRACK))
 		return;
 
-	if (!p_rf_calibrate_info->tm_trigger) {
-		odm_set_rf_reg(p_dm, RF_PATH_A, RF_T_METER, RFREGOFFSETMASK, 0x60);
+	if (!cali_info->tm_trigger) {
+		odm_set_rf_reg(dm, RF_PATH_A, RF_T_METER, RFREGOFFSETMASK, 0x60);
 		/*DBG_8192C("Trigger 92C Thermal Meter!!\n");*/
 
-		p_rf_calibrate_info->tm_trigger = 1;
+		cali_info->tm_trigger = 1;
 		return;
 
 	} else {
 		/*DBG_8192C("Schedule TxPowerTracking direct call!!\n");*/
 		odm_txpowertracking_callback_thermal_meter_8188e(adapter);
-		p_rf_calibrate_info->tm_trigger = 0;
+		cali_info->tm_trigger = 0;
 	}
 #endif
 #endif
@@ -720,17 +773,17 @@ odm_txpowertracking_check_ce(
 
 void
 odm_txpowertracking_check_mp(
-	void		*p_dm_void
+	void		*dm_void
 )
 {
-	struct PHY_DM_STRUCT		*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
+	struct dm_struct		*dm = (struct dm_struct *)dm_void;
 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
-	struct _ADAPTER	*adapter = p_dm->adapter;
+	void	*adapter = dm->adapter;
 
-	if (*p_dm->p_is_fcs_mode_enable)
+	if (*dm->is_fcs_mode_enable)
 		return;
 
-	if (odm_check_power_status(p_dm) == false) {
+	if (odm_check_power_status(dm) == false) {
 		RT_TRACE(COMP_POWER_TRACKING, DBG_LOUD, ("check_pow_status return false\n"));
 		return;
 	}
@@ -748,7 +801,7 @@ odm_txpowertracking_check_mp(
 
 void
 odm_txpowertracking_check_ap(
-	void		*p_dm_void
+	void		*dm_void
 )
 {
 	return;
@@ -759,34 +812,34 @@ odm_txpowertracking_check_ap(
 
 void
 odm_txpowertracking_direct_call(
-	struct _ADAPTER		*adapter
+	void		*adapter
 )
 {
-	HAL_DATA_TYPE		*p_hal_data	= GET_HAL_DATA(adapter);
-	struct PHY_DM_STRUCT			*p_dm = &p_hal_data->DM_OutSrc;
+	HAL_DATA_TYPE		*hal_data	= GET_HAL_DATA(((PADAPTER)adapter));
+	struct dm_struct			*dm = &hal_data->DM_OutSrc;
 
 	odm_txpowertracking_callback_thermal_meter(adapter);
 }
 
 void
 odm_txpowertracking_thermal_meter_check(
-	struct _ADAPTER		*adapter
+	void		*adapter
 )
 {
 	static u8			tm_trigger = 0;
-	HAL_DATA_TYPE			*pHalData = GET_HAL_DATA(adapter);
-	struct PHY_DM_STRUCT	*p_dm = &(pHalData->DM_OutSrc);
-	struct _hal_rf_			*p_rf = &(p_dm->rf_table);
+	HAL_DATA_TYPE			*pHalData = GET_HAL_DATA(((PADAPTER)adapter));
+	struct dm_struct	*dm = &(pHalData->DM_OutSrc);
+	struct _hal_rf_			*rf = &(dm->rf_table);
 
-	if (!(p_rf->rf_supportability & HAL_RF_TX_PWR_TRACK)) {
+	if (!(rf->rf_supportability & HAL_RF_TX_PWR_TRACK)) {
 		RT_TRACE(COMP_POWER_TRACKING, DBG_LOUD,
-			("===>odm_txpowertracking_thermal_meter_check(),p_mgnt_info->is_txpowertracking is false, return!!\n"));
+			("===>odm_txpowertracking_thermal_meter_check(),mgnt_info->is_txpowertracking is false, return!!\n"));
 		return;
 	}
 
 	if (!tm_trigger) {
-		if (IS_HARDWARE_TYPE_8188E(adapter) || IS_HARDWARE_TYPE_JAGUAR(adapter) || IS_HARDWARE_TYPE_8192E(adapter) ||
-		    IS_HARDWARE_TYPE_8723B(adapter) || IS_HARDWARE_TYPE_8814A(adapter) || IS_HARDWARE_TYPE_8188F(adapter) || IS_HARDWARE_TYPE_8703B(adapter)
+		if (IS_HARDWARE_TYPE_8188E(adapter) || IS_HARDWARE_TYPE_JAGUAR(adapter) || IS_HARDWARE_TYPE_8192E(adapter) || IS_HARDWARE_TYPE_8192F(adapter)
+		    ||IS_HARDWARE_TYPE_8723B(adapter) || IS_HARDWARE_TYPE_8814A(adapter) || IS_HARDWARE_TYPE_8188F(adapter) || IS_HARDWARE_TYPE_8703B(adapter)
 		    || IS_HARDWARE_TYPE_8822B(adapter) || IS_HARDWARE_TYPE_8723D(adapter) || IS_HARDWARE_TYPE_8821C(adapter) || IS_HARDWARE_TYPE_8710B(adapter))/* JJ ADD 20161014 */
 			PHY_SetRFReg(adapter, RF_PATH_A, RF_T_METER_88E, BIT(17) | BIT(16), 0x03);
 		else
@@ -796,7 +849,9 @@ odm_txpowertracking_thermal_meter_check(
 
 		tm_trigger = 1;
 		return;
-	} else {
+	} else if (IS_HARDWARE_TYPE_8822C(adapter) || IS_HARDWARE_TYPE_8814B(adapter))
+		return;
+	else {
 		RT_TRACE(COMP_POWER_TRACKING, DBG_LOUD, ("Schedule TxPowerTracking direct call!!\n"));
 		odm_txpowertracking_direct_call(adapter);
 		tm_trigger = 0;
diff --git a/rtl8723DS/hal/phydm/halrf/halrf_powertracking_win.h b/rtl8723DS/hal/phydm/halrf/halrf_powertracking_win.h
index 3d129b5..3ecdc1d 100755..100644
--- a/rtl8723DS/hal/phydm/halrf/halrf_powertracking_win.h
+++ b/rtl8723DS/hal/phydm/halrf/halrf_powertracking_win.h
@@ -13,10 +13,8 @@
  *
  *****************************************************************************/
 
-#ifndef	__PHYDMPOWERTRACKING_H__
-#define    __PHYDMPOWERTRACKING_H__
-
-#define HALRF_POWRTRACKING_VER	"1.1"
+#ifndef __HALRF_POWERTRACKING_H__
+#define __HALRF_POWERTRACKING_H__
 
 #define	DPK_DELTA_MAPPING_NUM	13
 #define	index_mapping_HP_NUM	15
@@ -32,13 +30,13 @@
 #define	CCK_TABLE_SIZE_88F	21
 /* JJ ADD 20161014 */
 #define	CCK_TABLE_SIZE_8710B   41
+#define	CCK_TABLE_SIZE_8192F   41
 
 
 #define	dm_check_txpowertracking	odm_txpowertracking_check
 
 #define IQK_MATRIX_SETTINGS_NUM	(14+24+21) /* Channels_2_4G_NUM + Channels_5G_20M_NUM + Channels_5G */
 #define	AVG_THERMAL_NUM		8
-#define	HP_THERMAL_NUM		8
 #define	iqk_matrix_reg_num	8
 #define	IQK_MAC_REG_NUM		4
 #define	IQK_ADDA_REG_NUM		16
@@ -59,6 +57,7 @@ extern	u8 cck_swing_table_ch14_88f[CCK_TABLE_SIZE_88F][16];
 extern	u32 cck_swing_table_ch1_ch14_8723d[CCK_TABLE_SIZE_8723D];
 /* JJ ADD 20161014 */
 extern	u32 cck_swing_table_ch1_ch14_8710b[CCK_TABLE_SIZE_8710B];
+extern	u32 cck_swing_table_ch1_ch14_8192f[CCK_TABLE_SIZE_8192F];
 
 extern  u32 tx_scaling_table_jaguar[TXSCALE_TABLE_SIZE];
 
@@ -68,33 +67,33 @@ static u8 delta_swing_table_idx_2ga_n_8188e[] = {0, 0, 0, 2, 2, 3, 3, 4, 4, 4, 4
 
 void
 odm_txpowertracking_check(
-	void		*p_dm_void
+	void		*dm_void
 );
 
 void
 odm_txpowertracking_check_ap(
-	void		*p_dm_void
+	void		*dm_void
 );
 
 void
 odm_txpowertracking_thermal_meter_init(
-	void		*p_dm_void
+	void		*dm_void
 );
 
 void
 odm_txpowertracking_init(
-	void		*p_dm_void
+	void		*dm_void
 );
 
 void
 odm_txpowertracking_check_mp(
-	void		*p_dm_void
+	void		*dm_void
 );
 
 
 void
 odm_txpowertracking_check_ce(
-	void		*p_dm_void
+	void		*dm_void
 );
 
 #if (DM_ODM_SUPPORT_TYPE & (ODM_WIN))
@@ -102,18 +101,18 @@ odm_txpowertracking_check_ce(
 
 void
 odm_txpowertracking_thermal_meter_check(
-	struct _ADAPTER		*adapter
+	void		*adapter
 );
 
 #endif
 
-struct _IQK_MATRIX_REGS_SETTING {
+struct iqk_matrix_regs_setting {
 	boolean	is_iqk_done;
 	s32		value[3][iqk_matrix_reg_num];
 	boolean	is_bw_iqk_result_saved[3];
 };
 
-struct odm_rf_calibration_structure {
+struct dm_rf_calibration_struct {
 	/* for tx power tracking */
 
 	u32	rega24; /* for TempCCK */
@@ -156,9 +155,7 @@ struct odm_rf_calibration_structure {
 	s8	xtal_offset;
 	s8	xtal_offset_last;
 
-	u8	thermal_value_hp[HP_THERMAL_NUM];
-	u8	thermal_value_hp_index;
-	struct _IQK_MATRIX_REGS_SETTING iqk_matrix_reg_setting[IQK_MATRIX_SETTINGS_NUM];
+	struct iqk_matrix_regs_setting iqk_matrix_reg_setting[IQK_MATRIX_SETTINGS_NUM];
 	u8	delta_lck;
 	s8  bb_swing_diff_2g, bb_swing_diff_5g; /* Unit: dB */
 	u8  delta_swing_table_idx_2g_cck_a_p[DELTA_SWINGIDX_SIZE];
@@ -228,6 +225,7 @@ struct odm_rf_calibration_structure {
 	boolean			modify_tx_agc_flag_path_c;
 	boolean			modify_tx_agc_flag_path_d;
 	boolean			modify_tx_agc_flag_path_a_cck;
+	boolean			modify_tx_agc_flag_path_b_cck;
 
 	s8			kfree_offset[MAX_RF_PATH];
 
@@ -301,4 +299,4 @@ struct odm_rf_calibration_structure {
 
 
 
-#endif
+#endif	/*#ifndef __HALRF_POWER_TRACKING_H__*/
diff --git a/rtl8723DS/hal/phydm/halrf/halrf_psd.c b/rtl8723DS/hal/phydm/halrf/halrf_psd.c
index 4baf4d0..8c2f874 100755..100644
--- a/rtl8723DS/hal/phydm/halrf/halrf_psd.c
+++ b/rtl8723DS/hal/phydm/halrf/halrf_psd.c
@@ -1,328 +1,428 @@
-/******************************************************************************

- *

- * Copyright(c) 2007 - 2017 Realtek Corporation.

- *

- * This program is free software; you can redistribute it and/or modify it

- * under the terms of version 2 of the GNU General Public License as

- * published by the Free Software Foundation.

- *

- * This program is distributed in the hope that it will be useful, but WITHOUT

- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or

- * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for

- * more details.

- *

- *****************************************************************************/

-

-//============================================================

-// include files

-//============================================================

-#include "mp_precomp.h"

-#include "phydm_precomp.h"

-

-

-#if (DM_ODM_SUPPORT_TYPE & ODM_WIN)

-

-#if 0

-u32 _sqrt(u64 n)

-{

-	u64	ans = 0, q = 0; 

-	s64	i;

-

-	/*for (i = sizeof(n) * 8 - 2; i > -1; i = i - 2) {*/

-	for (i = 8 * 8 - 2; i > -1; i = i - 2) {

-		q = (q << 2) | ((n & (3 << i)) >> i); 

-		if (q >= ((ans << 2) | 1)) 

-		{ 

-			q = q - ((ans << 2) | 1); 

-			ans = (ans << 1) | 1; 

-		} 

-		else 

-			ans = ans << 1; 

-	}

-	DbgPrint("ans=0x%x\n", ans);

-

-	return (u32)ans; 

-}

-#endif

-

-

-

-u64 _sqrt(u64 x)

-{

-	u64 i = 0;

-	u64 j = x / 2 + 1;

-

-	while (i <= j) {

-		u64 mid = (i + j) / 2;

-

-		u64 sq = mid * mid;

-

-		if (sq == x)

-			return mid;

-		else if (sq < x)

-			i = mid + 1;

-		else

-			j = mid - 1;

-	}

-

-	return j;

-}

-

-

-

-u32

-halrf_get_psd_data(

-	void	*p_dm_void,

-	u32	point

-	)

-{

-	struct	PHY_DM_STRUCT	*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;

-	struct _hal_rf_			*p_rf = &(p_dm->rf_table);

-	struct _halrf_psd_data	*p_psd = &(p_rf->halrf_psd_data);

-	u32 psd_val = 0, psd_reg, psd_report, psd_point, psd_start, i, delay_time;

-

-#if (DEV_BUS_TYPE == RT_USB_INTERFACE) || (DEV_BUS_TYPE == RT_SDIO_INTERFACE)

-	if (p_psd->average == 0)

-		delay_time = 100;

-	else

-		delay_time = 0;

-#else

-	if (p_psd->average == 0)

-		delay_time = 1000;

-	else

-		delay_time = 100;

-#endif

-

-	if (p_dm->support_ic_type & (ODM_RTL8812 | ODM_RTL8821 | ODM_RTL8814A | ODM_RTL8822B | ODM_RTL8821C)) {

-		psd_reg = 0x910;

-		psd_report = 0xf44;

-	} else {

-		psd_reg = 0x808;

-		psd_report = 0x8b4;

-	}

-

-	if (p_dm->support_ic_type & ODM_RTL8710B) {

-		psd_point = 0xeffffc00;

-		psd_start = 0x10000000;

-	} else {

-		psd_point = 0xffbffc00;

-		psd_start = 0x00400000;

-	}

-

-	psd_val = odm_get_bb_reg(p_dm, psd_reg, MASKDWORD);

-		

-	psd_val &= psd_point;

-	psd_val |= point;

-

-	odm_set_bb_reg(p_dm, psd_reg, MASKDWORD, psd_val);

-	

-	psd_val |= psd_start;

-

-	odm_set_bb_reg(p_dm, psd_reg, MASKDWORD, psd_val);

-

-	for (i = 0; i < delay_time; i++)

-		ODM_delay_us(1);

-

-	psd_val = odm_get_bb_reg(p_dm, psd_report, MASKDWORD);

-

-	if (p_dm->support_ic_type & (ODM_RTL8821C | ODM_RTL8710B)) {

-		psd_val &= MASKL3BYTES;

-		psd_val = psd_val / 32;

-	} else

-		psd_val &= MASKLWORD;

-

-	return psd_val;

-}

-

-

-

-void

-halrf_psd(

-	void	*p_dm_void,

-	u32	point,

-	u32	start_point,

-	u32	stop_point,

-	u32	average

-	)

-{

-	struct	PHY_DM_STRUCT	*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;

-	struct _hal_rf_			*p_rf = &(p_dm->rf_table);

-	struct _halrf_psd_data	*p_psd = &(p_rf->halrf_psd_data);

-	

-	u32 i = 0, j = 0, k = 0;

-	u32 psd_reg, avg_org, point_temp, average_tmp;

-	u64 data_tatal = 0, data_temp[64] = {0};

-

-	p_psd->buf_size = 256;

-

-	if (average == 0)

-		average_tmp = 1;

-	else

-		average_tmp = average;

-

-	if (p_dm->support_ic_type & (ODM_RTL8812 | ODM_RTL8821 | ODM_RTL8814A | ODM_RTL8822B | ODM_RTL8821C))

-		psd_reg = 0x910;

-	else

-		psd_reg = 0x808;

-

-#if 0

-	dbg_print("[PSD]point=%d, start_point=%d, stop_point=%d, average=%d, average_tmp=%d, buf_size=%d\n",

-		point, start_point, stop_point, average, average_tmp, p_psd->buf_size);

-#endif

-

-	for (i = 0; i < p_psd->buf_size; i++)

-		p_psd->psd_data[i] = 0;

-	

-	if (p_dm->support_ic_type & ODM_RTL8710B)

-		avg_org = odm_get_bb_reg(p_dm, psd_reg, 0x30000);

-	else

-		avg_org = odm_get_bb_reg(p_dm, psd_reg, 0x3000);

-

-	if (average != 0)

-	{

-		if (p_dm->support_ic_type & ODM_RTL8710B)

-			odm_set_bb_reg(p_dm, psd_reg, 0x30000, 0x1);

-		else

-			odm_set_bb_reg(p_dm, psd_reg, 0x3000, 0x1);

-	}

-

-#if 0

-	if (avg_temp == 0)

-		avg = 1;

-	else if (avg_temp == 1)

-		avg = 8;

-	else if (avg_temp == 2)

-		avg = 16;

-	else if (avg_temp == 3)

-		avg = 32;

-#endif

-

-	i = start_point;

-	while (i < stop_point) {

-		data_tatal = 0;

-	

-		if (i >= point)

-			point_temp = i - point;

-		else

-			point_temp = i;

-		

-		for (k = 0; k < average_tmp; k++) {

-			data_temp[k] = halrf_get_psd_data(p_dm, point_temp);

-			data_tatal = data_tatal + (data_temp[k] * data_temp[k]);

-

-#if 0

-			if ((k % 20) == 0)

-				dbg_print("\n ");

-			

-			dbg_print("0x%x ", data_temp[k]);

-#endif

-		}

-		/*dbg_print("\n");*/

-

-		data_tatal = ((data_tatal * 100) / average_tmp);

-		p_psd->psd_data[j] = (u32)_sqrt(data_tatal);

-

-		i++;

-		j++;

-	}

-

-#if 0

-	for (i = 0; i < p_psd->buf_size; i++) {

-		if ((i % 20) == 0)

-			dbg_print("\n ");

-			

-		dbg_print("0x%x ", p_psd->psd_data[i]);

-	}

-	dbg_print("\n\n");

-#endif

-

-	if (p_dm->support_ic_type & ODM_RTL8710B)

-		odm_set_bb_reg(p_dm, psd_reg, 0x30000, avg_org);

-	else

-		odm_set_bb_reg(p_dm, psd_reg, 0x3000, avg_org);

-}

-

-

-

-enum rt_status

-halrf_psd_init(

-	void	*p_dm_void

-	)

-{

-	enum rt_status	ret_status = RT_STATUS_SUCCESS;

-	struct	PHY_DM_STRUCT	*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;

-	struct _hal_rf_			*p_rf = &(p_dm->rf_table);

-	struct _halrf_psd_data	*p_psd = &(p_rf->halrf_psd_data);

-

-	if (p_psd->psd_progress)

-		ret_status = RT_STATUS_PENDING;

-	else {

-		p_psd->psd_progress = 1;

-		halrf_psd(p_dm, p_psd->point, p_psd->start_point, p_psd->stop_point, p_psd->average);

-		p_psd->psd_progress = 0;

-	}

-

-	return ret_status;

-}

-

-

-

-enum rt_status

-halrf_psd_query(

-	void	*p_dm_void,

-	u32		*outbuf,

-	u32		buf_size

-	)

-{

-	enum rt_status	ret_status = RT_STATUS_SUCCESS;

-	struct	PHY_DM_STRUCT	*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;

-	struct _hal_rf_			*p_rf = &(p_dm->rf_table);

-	struct _halrf_psd_data	*p_psd = &(p_rf->halrf_psd_data);

-

-	if (p_psd->psd_progress)

-		ret_status = RT_STATUS_PENDING;

-	else

-		PlatformMoveMemory(outbuf, p_psd->psd_data, 0x400);

-

-	return ret_status;

-}

-

-

-

-enum rt_status

-halrf_psd_init_query(

-	void	*p_dm_void,

-	u32		*outbuf,

-	u32		point,

-	u32		start_point,

-	u32		stop_point,

-	u32		average,

-	u32		buf_size

-	)

-{

-	enum rt_status	ret_status = RT_STATUS_SUCCESS;

-	struct	PHY_DM_STRUCT	*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;

-	struct _hal_rf_			*p_rf = &(p_dm->rf_table);

-	struct _halrf_psd_data	*p_psd = &(p_rf->halrf_psd_data);

-

-	p_psd->point = point;

-	p_psd->start_point = start_point;

-	p_psd->stop_point = stop_point;

-	p_psd->average = average;

-

-	if (p_psd->psd_progress)

-		ret_status = RT_STATUS_PENDING;

-	else {

-		p_psd->psd_progress = 1;

-		halrf_psd(p_dm, p_psd->point, p_psd->start_point, p_psd->stop_point, p_psd->average);

-		PlatformMoveMemory(outbuf, p_psd->psd_data, 0x400);

-		p_psd->psd_progress = 0;

-	}

-

-	return ret_status;

-}

-

-

-

-#endif	/*#if (DM_ODM_SUPPORT_TYPE & ODM_WIN)*/

-

+/******************************************************************************
+ *
+ * Copyright(c) 2007 - 2017 Realtek Corporation.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ *****************************************************************************/
+
+/*@===========================================================
+ * include files
+ *============================================================
+ */
+#include "mp_precomp.h"
+#include "phydm_precomp.h"
+
+#if (DM_ODM_SUPPORT_TYPE & ODM_WIN)
+
+u64 _sqrt(u64 x)
+{
+	u64 i = 0;
+	u64 j = x / 2 + 1;
+
+	while (i <= j) {
+		u64 mid = (i + j) / 2;
+
+		u64 sq = mid * mid;
+
+		if (sq == x)
+			return mid;
+		else if (sq < x)
+			i = mid + 1;
+		else
+			j = mid - 1;
+	}
+
+	return j;
+}
+
+u32 halrf_get_psd_data(
+	struct dm_struct *dm,
+	u32 point)
+{
+	struct _hal_rf_ *rf = &(dm->rf_table);
+	struct _halrf_psd_data *psd = &(rf->halrf_psd_data);
+	u32 psd_val = 0, psd_reg, psd_report, psd_point, psd_start, i, delay_time;
+
+#if (DEV_BUS_TYPE == RT_USB_INTERFACE) || (DEV_BUS_TYPE == RT_SDIO_INTERFACE)
+	if (dm->support_interface == ODM_ITRF_USB || dm->support_interface == ODM_ITRF_SDIO) {
+		if (psd->average == 0)
+			delay_time = 100;
+		else
+			delay_time = 0;
+	}
+#endif
+#if (DEV_BUS_TYPE == RT_PCI_INTERFACE)
+	if (dm->support_interface == ODM_ITRF_PCIE) {
+		if (psd->average == 0)
+			delay_time = 1000;
+		else
+			delay_time = 100;
+	}
+#endif
+
+	if (dm->support_ic_type & (ODM_RTL8812 | ODM_RTL8821 | ODM_RTL8814A | ODM_RTL8822B | ODM_RTL8821C)) {
+		psd_reg = R_0x910;
+		psd_report = R_0xf44;
+	} else {
+		psd_reg = R_0x808;
+		psd_report = R_0x8b4;
+	}
+
+	if (dm->support_ic_type & ODM_RTL8710B) {
+		psd_point = 0xeffffc00;
+		psd_start = 0x10000000;
+	} else {
+		psd_point = 0xffbffc00;
+		psd_start = 0x00400000;
+	}
+
+	psd_val = odm_get_bb_reg(dm, psd_reg, MASKDWORD);
+
+	psd_val &= psd_point;
+	psd_val |= point;
+
+	odm_set_bb_reg(dm, psd_reg, MASKDWORD, psd_val);
+
+	psd_val |= psd_start;
+
+	odm_set_bb_reg(dm, psd_reg, MASKDWORD, psd_val);
+
+	for (i = 0; i < delay_time; i++)
+		ODM_delay_us(1);
+
+	psd_val = odm_get_bb_reg(dm, psd_report, MASKDWORD);
+
+	if (dm->support_ic_type & (ODM_RTL8821C | ODM_RTL8710B)) {
+		psd_val &= MASKL3BYTES;
+		psd_val = psd_val / 32;
+	} else {
+		psd_val &= MASKLWORD;
+	}
+
+	return psd_val;
+}
+
+void halrf_psd(
+	struct dm_struct *dm,
+	u32 point,
+	u32 start_point,
+	u32 stop_point,
+	u32 average)
+{
+	struct _hal_rf_ *rf = &(dm->rf_table);
+	struct _halrf_psd_data *psd = &(rf->halrf_psd_data);
+
+	u32 i = 0, j = 0, k = 0;
+	u32 psd_reg, avg_org, point_temp, average_tmp, mode;
+	u64 data_tatal = 0, data_temp[64] = {0};
+
+	psd->buf_size = 256;
+
+	mode = average >> 16;
+	
+	if (mode == 1)
+		average_tmp = average & 0xffff;
+	else if (mode == 2)
+		average_tmp = 1;
+
+	if (dm->support_ic_type & (ODM_RTL8812 | ODM_RTL8821 | ODM_RTL8814A | ODM_RTL8822B | ODM_RTL8821C))
+		psd_reg = R_0x910;
+	else
+		psd_reg = R_0x808;
+
+#if 0
+	dbg_print("[PSD]point=%d, start_point=%d, stop_point=%d, average=%d, average_tmp=%d, buf_size=%d\n",
+		point, start_point, stop_point, average, average_tmp, psd->buf_size);
+#endif
+
+	for (i = 0; i < psd->buf_size; i++)
+		psd->psd_data[i] = 0;
+
+	if (dm->support_ic_type & ODM_RTL8710B)
+		avg_org = odm_get_bb_reg(dm, psd_reg, 0x30000);
+	else
+		avg_org = odm_get_bb_reg(dm, psd_reg, 0x3000);
+
+	if (mode == 1) {
+		if (dm->support_ic_type & ODM_RTL8710B)
+			odm_set_bb_reg(dm, psd_reg, 0x30000, 0x1);
+		else
+			odm_set_bb_reg(dm, psd_reg, 0x3000, 0x1);
+	}
+
+#if 0
+	if (avg_temp == 0)
+		avg = 1;
+	else if (avg_temp == 1)
+		avg = 8;
+	else if (avg_temp == 2)
+		avg = 16;
+	else if (avg_temp == 3)
+		avg = 32;
+#endif
+
+	i = start_point;
+	while (i < stop_point) {
+		data_tatal = 0;
+
+		if (i >= point)
+			point_temp = i - point;
+		else
+			point_temp = i;
+
+		for (k = 0; k < average_tmp; k++) {
+			data_temp[k] = halrf_get_psd_data(dm, point_temp);
+			data_tatal = data_tatal + (data_temp[k] * data_temp[k]);
+
+#if 0
+			if ((k % 20) == 0)
+				dbg_print("\n ");
+
+			dbg_print("0x%x ", data_temp[k]);
+#endif
+		}
+#if 0
+		/*dbg_print("\n");*/
+#endif
+
+		data_tatal = ((data_tatal * 100) / average_tmp);
+		psd->psd_data[j] = (u32)_sqrt(data_tatal);
+
+		i++;
+		j++;
+	}
+
+#if 0
+	for (i = 0; i < psd->buf_size; i++) {
+		if ((i % 20) == 0)
+			dbg_print("\n ");
+
+		dbg_print("0x%x ", psd->psd_data[i]);
+	}
+	dbg_print("\n\n");
+#endif
+
+	if (dm->support_ic_type & ODM_RTL8710B)
+		odm_set_bb_reg(dm, psd_reg, 0x30000, avg_org);
+	else
+		odm_set_bb_reg(dm, psd_reg, 0x3000, avg_org);
+}
+
+u32 halrf_get_iqk_psd_data(
+	struct dm_struct *dm,
+	u32 point)
+{
+	struct _hal_rf_ *rf = &(dm->rf_table);
+	struct _halrf_psd_data *psd = &(rf->halrf_psd_data);
+	u32 psd_val, psd_val1, psd_val2, psd_point, i, delay_time;
+
+#if (DEV_BUS_TYPE == RT_USB_INTERFACE) || (DEV_BUS_TYPE == RT_SDIO_INTERFACE)
+	if (dm->support_interface == ODM_ITRF_USB || dm->support_interface == ODM_ITRF_SDIO) {
+		delay_time = 0;
+	}
+#endif
+#if (DEV_BUS_TYPE == RT_PCI_INTERFACE)
+	if (dm->support_interface == ODM_ITRF_PCIE) {
+		delay_time = 150;
+	}
+#endif
+	psd_point = odm_get_bb_reg(dm, R_0x1b2c, MASKDWORD);
+
+	psd_point &= 0xF000FFFF;
+
+	point &= 0xFFF;
+
+	psd_point = psd_point | (point << 16);
+
+	odm_set_bb_reg(dm, R_0x1b2c, MASKDWORD, psd_point);
+
+	odm_set_bb_reg(dm, R_0x1b34, MASKDWORD, 0x1);
+
+	odm_set_bb_reg(dm, R_0x1b34, MASKDWORD, 0x0);
+
+	for (i = 0; i < delay_time; i++)
+		ODM_delay_us(1);
+
+	odm_set_bb_reg(dm, R_0x1bd4, MASKDWORD, 0x00250001);
+
+	psd_val1 = odm_get_bb_reg(dm, R_0x1bfc, MASKDWORD);
+
+	psd_val1 = (psd_val1 & 0x07FF0000) >> 16;
+
+	odm_set_bb_reg(dm, R_0x1bd4, MASKDWORD, 0x002e0001);
+
+	psd_val2 = odm_get_bb_reg(dm, R_0x1bfc, MASKDWORD);
+
+	psd_val = (psd_val1 << 21) + (psd_val2 >> 11);
+
+	return psd_val;
+}
+
+void halrf_iqk_psd(
+	struct dm_struct *dm,
+	u32 point,
+	u32 start_point,
+	u32 stop_point,
+	u32 average)
+{
+	struct _hal_rf_ *rf = &(dm->rf_table);
+	struct _halrf_psd_data *psd = &(rf->halrf_psd_data);
+
+	u32 i = 0, j = 0, k = 0;
+	u32 psd_reg, avg_org, point_temp, average_tmp, mode;
+	u64 data_tatal = 0, data_temp[64] = {0};
+	s32 point_8814B;
+
+	psd->buf_size = 256;
+
+	mode = average >> 16;
+	
+	if (mode == 1)
+		average_tmp = average & 0xffff;
+	else if (mode == 2) {
+		if (dm->support_ic_type & ODM_RTL8814B)
+			average_tmp = average & 0xffff;
+		else
+			average_tmp = 1;
+	}
+#if 0
+	DbgPrint("[PSD]point=%d, start_point=%d, stop_point=%d, average=0x%x, average_tmp=%d, buf_size=%d, mode=%d\n",
+		point, start_point, stop_point, average, average_tmp, psd->buf_size, mode);
+#endif
+
+	for (i = 0; i < psd->buf_size; i++)
+		psd->psd_data[i] = 0;
+
+	i = start_point;
+	while (i < stop_point) {
+		data_tatal = 0;
+
+		if (i >= point)
+			point_temp = i - point;
+		else
+		{
+			if (dm->support_ic_type & ODM_RTL8814B)
+			{
+				point_8814B = i -point -1;
+				point_temp = point_8814B & 0xfff;
+			}
+			else
+				point_temp = i;
+		}
+
+		for (k = 0; k < average_tmp; k++) {
+			data_temp[k] = halrf_get_iqk_psd_data(dm, point_temp);
+			/*data_tatal = data_tatal + (data_temp[k] * data_temp[k]);*/
+			data_tatal = data_tatal + data_temp[k];
+
+#if 0
+			if ((k % 20) == 0)
+				DbgPrint("\n ");
+
+			DbgPrint("0x%x ", data_temp[k]);
+#endif
+		}
+
+		/*data_tatal = ((data_tatal * 100) / average_tmp);*/
+		/*psd->psd_data[j] = (u32)_sqrt(data_tatal);*/
+
+		psd->psd_data[j] = (u32)((data_tatal * 10) / average_tmp);
+
+		i++;
+		j++;
+	}
+
+#if 0
+	DbgPrint("\n [iqk psd]psd result:\n");
+
+	for (i = 0; i < psd->buf_size; i++) {
+		if ((i % 20) == 0)
+			DbgPrint("\n ");
+
+		DbgPrint("0x%x ", psd->psd_data[i]);
+	}
+	DbgPrint("\n\n");
+#endif
+}
+
+
+enum rt_status
+halrf_psd_init(
+	struct dm_struct *dm)
+{
+	enum rt_status ret_status = RT_STATUS_SUCCESS;
+	struct _hal_rf_ *rf = &(dm->rf_table);
+	struct _halrf_psd_data *psd = &(rf->halrf_psd_data);
+
+	if (psd->psd_progress) {
+		ret_status = RT_STATUS_PENDING;
+	} else {
+		psd->psd_progress = 1;
+		if (dm->support_ic_type & (ODM_RTL8822C | ODM_RTL8814B))
+			halrf_iqk_psd(dm, psd->point, psd->start_point, psd->stop_point, psd->average);
+		else
+			halrf_psd(dm, psd->point, psd->start_point, psd->stop_point, psd->average);
+		psd->psd_progress = 0;
+	}
+
+	return ret_status;
+}
+
+enum rt_status
+halrf_psd_query(
+	struct dm_struct *dm,
+	u32 *outbuf,
+	u32 buf_size)
+{
+	enum rt_status ret_status = RT_STATUS_SUCCESS;
+	struct _hal_rf_ *rf = &(dm->rf_table);
+	struct _halrf_psd_data *psd = &(rf->halrf_psd_data);
+
+	if (psd->psd_progress)
+		ret_status = RT_STATUS_PENDING;
+	else
+		PlatformMoveMemory(outbuf, psd->psd_data, 0x400);
+
+	return ret_status;
+}
+
+enum rt_status
+halrf_psd_init_query(
+	struct dm_struct *dm,
+	u32 *outbuf,
+	u32 point,
+	u32 start_point,
+	u32 stop_point,
+	u32 average,
+	u32 buf_size)
+{
+	enum rt_status ret_status = RT_STATUS_SUCCESS;
+	struct _hal_rf_ *rf = &(dm->rf_table);
+	struct _halrf_psd_data *psd = &(rf->halrf_psd_data);
+
+	psd->point = point;
+	psd->start_point = start_point;
+	psd->stop_point = stop_point;
+	psd->average = average;
+
+	if (psd->psd_progress) {
+		ret_status = RT_STATUS_PENDING;
+	} else {
+		psd->psd_progress = 1;
+		halrf_psd(dm, psd->point, psd->start_point, psd->stop_point, psd->average);
+		PlatformMoveMemory(outbuf, psd->psd_data, 0x400);
+		psd->psd_progress = 0;
+	}
+
+	return ret_status;
+}
+
+#endif /*#if (DM_ODM_SUPPORT_TYPE & ODM_WIN)*/
diff --git a/rtl8723DS/hal/phydm/halrf/halrf_psd.h b/rtl8723DS/hal/phydm/halrf/halrf_psd.h
index 3c5f9ed..986ff88 100755..100644
--- a/rtl8723DS/hal/phydm/halrf/halrf_psd.h
+++ b/rtl8723DS/hal/phydm/halrf/halrf_psd.h
@@ -1,60 +1,52 @@
-/******************************************************************************

- *

- * Copyright(c) 2007 - 2017 Realtek Corporation.

- *

- * This program is free software; you can redistribute it and/or modify it

- * under the terms of version 2 of the GNU General Public License as

- * published by the Free Software Foundation.

- *

- * This program is distributed in the hope that it will be useful, but WITHOUT

- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or

- * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for

- * more details.

- *

- *****************************************************************************/

-

-#ifndef __HALRF_PSD_H__

-#define __HALRF_PSD_H__

-

-#if (DM_ODM_SUPPORT_TYPE & ODM_WIN)

-

-struct _halrf_psd_data {

-	u32		point;

-	u32		start_point;

-	u32		stop_point;

-	u32		average;

-	u32		buf_size;

-	u32		psd_data[256];

-	u32		psd_progress;

-};

-

-

-

-enum rt_status

-halrf_psd_init (

-		void	*p_dm_void

-	);

-

-

-

-enum rt_status

-halrf_psd_query (

-	void	*p_dm_void,

-	u32		*outbuf,

-	u32		buf_size

-);

-

-enum rt_status

-halrf_psd_init_query(

-	void	*p_dm_void,

-	u32		*outbuf,

-	u32		point,

-	u32		start_point,

-	u32		stop_point,

-	u32		average,

-	u32		buf_size

-);

-

-#endif	/*#if (DM_ODM_SUPPORT_TYPE & ODM_WIN)*/

-#endif	/*#ifndef __HALRF_PSD_H__*/

-

+/******************************************************************************
+ *
+ * Copyright(c) 2007 - 2017 Realtek Corporation.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ *****************************************************************************/
+
+#ifndef __HALRF_PSD_H__
+#define __HALRF_PSD_H__
+
+#if (DM_ODM_SUPPORT_TYPE & ODM_WIN)
+
+struct _halrf_psd_data {
+	u32 point;
+	u32 start_point;
+	u32 stop_point;
+	u32 average;
+	u32 buf_size;
+	u32 psd_data[256];
+	u32 psd_progress;
+};
+
+enum rt_status
+halrf_psd_init(
+	struct dm_struct *dm);
+
+enum rt_status
+halrf_psd_query(
+	struct dm_struct *dm,
+	u32 *outbuf,
+	u32 buf_size);
+
+enum rt_status
+halrf_psd_init_query(
+	struct dm_struct *dm,
+	u32 *outbuf,
+	u32 point,
+	u32 start_point,
+	u32 stop_point,
+	u32 average,
+	u32 buf_size);
+
+#endif /*#if (DM_ODM_SUPPORT_TYPE & ODM_WIN)*/
+#endif /*#__HALRF_PSD_H__*/
diff --git a/rtl8723DS/hal/phydm/halrf/halrf_txgapcal.c b/rtl8723DS/hal/phydm/halrf/halrf_txgapcal.c
index 3ab8189..0cc4497 100755..100644
--- a/rtl8723DS/hal/phydm/halrf/halrf_txgapcal.c
+++ b/rtl8723DS/hal/phydm/halrf/halrf_txgapcal.c
@@ -1,291 +1,300 @@
-#include "mp_precomp.h"

-#include "phydm_precomp.h"

-

-

-

-void odm_bub_sort(pu4Byte data, u4Byte n)

-{

-	int i, j, temp, sp;

-	

-	for (i = n - 1;i >= 0;i--) {

-		sp = 1;

-		for (j = 0;j < i;j++) {

-			if (data[j] < data[j + 1]) {

-				temp = data[j];

-				data[j] = data[j + 1];

-				data[j + 1] = temp;

-				sp = 0;

-			}

-		}

-		if (sp == 1)

-			break;          

-	}

-}

-

-

-#if (RTL8197F_SUPPORT == 1)

-

-u4Byte

-odm_tx_gain_gap_psd_8197f(

-	void	*p_dm_void,

-	u1Byte	rf_path,

-	u4Byte	rf56

-)

-{

-	PDM_ODM_T	p_dm_odm = (PDM_ODM_T)p_dm_void;

-	

-	u1Byte i, j;

-	u4Byte psd_vaule[5], psd_avg_time = 5, psd_vaule_temp;

-	

-	u4Byte iqk_ctl_addr[2][6] = {{0xe30, 0xe34, 0xe50, 0xe54, 0xe38, 0xe3c},

-								{0xe50, 0xe54, 0xe30, 0xe34, 0xe58, 0xe5c}};

-	

-	u4Byte psd_finish_bit[2] = {0x04000000, 0x20000000};

-	u4Byte psd_fail_bit[2] = {0x08000000, 0x40000000};

-	

-	u4Byte psd_cntl_value[2][2] = {{0x38008c1c, 0x10008c1c},

-								   {0x38008c2c, 0x10008c2c}};

-	

-	u4Byte psd_report_addr[2] = {0xea0, 0xec0};

-	

-	odm_set_rf_reg(p_dm_odm, rf_path, 0xdf, bRFRegOffsetMask, 0x00e02);

-

-	ODM_delay_us(100);

-

-	odm_set_bb_reg(p_dm_odm, 0xe28, 0xffffffff, 0x0);

-	

-	odm_set_rf_reg(p_dm_odm, rf_path, 0x56, 0xfff, rf56);

-	while(rf56 != (odm_get_rf_reg(p_dm_odm, rf_path, 0x56, 0xfff)))

-		odm_set_rf_reg(p_dm_odm, rf_path, 0x56, 0xfff, rf56);

-

-	odm_set_bb_reg(p_dm_odm, 0xd94, 0xffffffff, 0x44FFBB44);

-	odm_set_bb_reg(p_dm_odm, 0xe70, 0xffffffff, 0x00400040);

-	odm_set_bb_reg(p_dm_odm, 0xc04, 0xffffffff, 0x6f005403);

-	odm_set_bb_reg(p_dm_odm, 0xc08, 0xffffffff, 0x000804e4);

-	odm_set_bb_reg(p_dm_odm, 0x874, 0xffffffff, 0x04203400);

-	odm_set_bb_reg(p_dm_odm, 0xe28, 0xffffffff, 0x80800000);

-

-	odm_set_bb_reg(p_dm_odm, iqk_ctl_addr[rf_path][0], 0xffffffff, psd_cntl_value[rf_path][0]);

-	odm_set_bb_reg(p_dm_odm, iqk_ctl_addr[rf_path][1], 0xffffffff, psd_cntl_value[rf_path][1]);

-	odm_set_bb_reg(p_dm_odm, iqk_ctl_addr[rf_path][2], 0xffffffff, psd_cntl_value[rf_path][0]);

-	odm_set_bb_reg(p_dm_odm, iqk_ctl_addr[rf_path][3], 0xffffffff, psd_cntl_value[rf_path][0]);

-	odm_set_bb_reg(p_dm_odm, iqk_ctl_addr[rf_path][4], 0xffffffff, 0x8215001F);

-	odm_set_bb_reg(p_dm_odm, iqk_ctl_addr[rf_path][5], 0xffffffff, 0x2805001F);

-	

-	odm_set_bb_reg(p_dm_odm, 0xe40, 0xffffffff, 0x81007C00);

-	odm_set_bb_reg(p_dm_odm, 0xe44, 0xffffffff, 0x81004800);

-	odm_set_bb_reg(p_dm_odm, 0xe4c, 0xffffffff, 0x0046a8d0);

-	

-

-	for (i = 0; i < psd_avg_time; i++) {

-			

-		for(j = 0; j < 1000 ; j++) {

-			odm_set_bb_reg(p_dm_odm, 0xe48, 0xffffffff, 0xfa005800);

-			odm_set_bb_reg(p_dm_odm, 0xe48, 0xffffffff, 0xf8005800);

-

-			while(!odm_get_bb_reg(p_dm_odm, 0xeac, psd_finish_bit[rf_path]));	/*wait finish bit*/

-

-			if (!odm_get_bb_reg(p_dm_odm, 0xeac, psd_fail_bit[rf_path])) {	/*check fail bit*/

-				

-				psd_vaule[i] = odm_get_bb_reg(p_dm_odm, psd_report_addr[rf_path], 0xffffffff);

-				

-				if (psd_vaule[i] > 0xffff)

-					break;

-			}

-		}

-			

-		

-

-		ODM_RT_TRACE(p_dm_odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, 

-			("[TGGC] rf0=0x%x rf56=0x%x rf56_reg=0x%x time=%d psd_vaule=0x%x\n",

-			odm_get_rf_reg(p_dm_odm, rf_path, 0x0, 0xff),

-			rf56, odm_get_rf_reg(p_dm_odm, rf_path, 0x56, 0xfff), j, psd_vaule[i]));

-	}

-

-	odm_bub_sort(psd_vaule, psd_avg_time);

-

-	psd_vaule_temp = psd_vaule[(UINT)(psd_avg_time / 2)];

-

-	odm_set_bb_reg(p_dm_odm, 0xd94, 0xffffffff, 0x44BBBB44);

-	odm_set_bb_reg(p_dm_odm, 0xe70, 0xffffffff, 0x80408040);

-	odm_set_bb_reg(p_dm_odm, 0xc04, 0xffffffff, 0x6f005433);

-	odm_set_bb_reg(p_dm_odm, 0xc08, 0xffffffff, 0x000004e4);

-	odm_set_bb_reg(p_dm_odm, 0x874, 0xffffffff, 0x04003400);

-	odm_set_bb_reg(p_dm_odm, 0xe28, 0xffffffff, 0x00000000);

-

-	ODM_RT_TRACE(p_dm_odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, 

-		("[TGGC] rf0=0x%x rf56=0x%x rf56_reg=0x%x psd_vaule_temp=0x%x\n",

-		odm_get_rf_reg(p_dm_odm, rf_path, 0x0, 0xff),

-		rf56, odm_get_rf_reg(p_dm_odm, rf_path, 0x56, 0xfff), psd_vaule_temp));

-	

-	odm_set_rf_reg(p_dm_odm, rf_path, 0xdf, bRFRegOffsetMask, 0x00602);

-

-	return psd_vaule_temp;

-

-}

-

-

-

-void

-odm_tx_gain_gap_calibration_8197f(

-	void	*p_dm_void

-)

-{

-	PDM_ODM_T	p_dm_odm = (PDM_ODM_T)p_dm_void;

-

-	u1Byte rf_path, rf0_idx, rf0_idx_current, rf0_idx_next, i, delta_gain_retry = 3;

-	

-	s1Byte delta_gain_gap_pre, delta_gain_gap[2][11];

-	u4Byte rf56_current, rf56_next, psd_value_current, psd_value_next;

-	u4Byte psd_gap, rf56_current_temp[2][11];

-	s4Byte rf33[2][11];

-

-	memset(rf33, 0x0, sizeof(rf33));

-

-	for (rf_path = RF_PATH_A; rf_path <= RF_PATH_B; rf_path++) {

-

-		if (rf_path == RF_PATH_A)

-			odm_set_bb_reg(p_dm_odm, 0x88c, (BIT(21) | BIT(20)), 0x3);	/*disable 3-wire*/

-		else if (rf_path == RF_PATH_B)

-			odm_set_bb_reg(p_dm_odm, 0x88c, (BIT(23) | BIT(22)), 0x3);	/*disable 3-wire*/

-		

-		ODM_delay_us(100);

-

-		for (rf0_idx = 1; rf0_idx <= 10; rf0_idx++) {

-			

-			rf0_idx_current = 3 * (rf0_idx - 1) + 1;

-			odm_set_rf_reg(p_dm_odm, rf_path, 0x0, 0xff, rf0_idx_current);

-			ODM_delay_us(100);

-			rf56_current_temp[rf_path][rf0_idx] = odm_get_rf_reg(p_dm_odm, rf_path, 0x56, 0xfff);

-			rf56_current = rf56_current_temp[rf_path][rf0_idx];

-			

-			rf0_idx_next = 3 * rf0_idx + 1;

-			odm_set_rf_reg(p_dm_odm, rf_path, 0x0, 0xff, rf0_idx_next);

-			ODM_delay_us(100);

-			rf56_next= odm_get_rf_reg(p_dm_odm, rf_path, 0x56, 0xfff);

-

-			ODM_RT_TRACE(p_dm_odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, 

-				("[TGGC] rf56_current[%d][%d]=0x%x rf56_next[%d][%d]=0x%x\n",

-				rf_path, rf0_idx, rf56_current,  rf_path, rf0_idx, rf56_next));

-

-			if ((rf56_current >> 5) == (rf56_next >> 5)) {

-				delta_gain_gap[rf_path][rf0_idx] = 0;

-				

-				ODM_RT_TRACE(p_dm_odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, 

-					("[TGGC] rf56_current[11:5] == rf56_next[%d][%d][11:5]=0x%x delta_gain_gap[%d][%d]=%d\n",

-					rf_path, rf0_idx, (rf56_next >> 5), rf_path, rf0_idx, delta_gain_gap[rf_path][rf0_idx]));

-			} else {

-				ODM_RT_TRACE(p_dm_odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, 

-					("[TGGC] rf56_current[%d][%d][11:5]=0x%x != rf56_next[%d][%d][11:5]=0x%x\n",

-					rf_path, rf0_idx, (rf56_current >> 5), rf_path, rf0_idx, (rf56_next >> 5)));

-

-				

-				for (i = 0; i < delta_gain_retry; i++) {

-					psd_value_current = odm_tx_gain_gap_psd_8197f(p_dm_odm, rf_path, rf56_current);

-

-					psd_value_next = odm_tx_gain_gap_psd_8197f(p_dm_odm, rf_path, rf56_next - 2);

-

-					psd_gap = psd_value_next / (psd_value_current / 1000);

-

-#if 0

-					if (psd_gap > 1413)

-						delta_gain_gap[rf_path][rf0_idx] = 1;

-					else if (psd_gap > 1122)

-						delta_gain_gap[rf_path][rf0_idx] = 0;

-					else

-						delta_gain_gap[rf_path][rf0_idx] = -1;

-#endif

-

-					if (psd_gap > 1445)

-						delta_gain_gap[rf_path][rf0_idx] = 1;

-					else if (psd_gap > 1096)

-						delta_gain_gap[rf_path][rf0_idx] = 0;

-					else

-						delta_gain_gap[rf_path][rf0_idx] = -1;

-

-					if (i == 0)

-						delta_gain_gap_pre = delta_gain_gap[rf_path][rf0_idx];

-

-					ODM_RT_TRACE(p_dm_odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, 

-						("[TGGC] psd_value_current=0x%x psd_value_next=0x%x psd_value_next/psd_value_current=%d delta_gain_gap[%d][%d]=%d\n",

-						psd_value_current, psd_value_next, psd_gap, rf_path, rf0_idx, delta_gain_gap[rf_path][rf0_idx]));

-

-					if ((i == 0) && (delta_gain_gap[rf_path][rf0_idx] == 0)) {

-						break;

-					}

-					else {

-						if (delta_gain_gap_pre != delta_gain_gap[rf_path][rf0_idx]) {

-							delta_gain_gap[rf_path][rf0_idx] = 0;

-

-							ODM_RT_TRACE(p_dm_odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, 

-								("[TGGC] delta_gain_gap_pre(%d) != delta_gain_gap[%d][%d](%d) time=%d\n",

-								delta_gain_gap_pre, rf_path, rf0_idx, delta_gain_gap[rf_path][rf0_idx], i));

-

-							break;

-						} else {

-							ODM_RT_TRACE(p_dm_odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, 

-								("[TGGC] delta_gain_gap_pre(%d) == delta_gain_gap[%d][%d](%d) time=%d\n",

-								delta_gain_gap_pre, rf_path, rf0_idx, delta_gain_gap[rf_path][rf0_idx], i));

-						}

-					}

-				}

-				

-			}

-

-		}

-

-		if (rf_path == RF_PATH_A)

-			odm_set_bb_reg(p_dm_odm, 0x88c, (BIT(21) | BIT(20)), 0x0);	/*enable 3-wire*/

-		else if (rf_path == RF_PATH_B)

-			odm_set_bb_reg(p_dm_odm, 0x88c, (BIT(23) | BIT(22)), 0x0);	/*enable 3-wire*/

-		

-		ODM_delay_us(100);

-

-	}

-	

-	/*odm_set_bb_reg(p_dm_odm, 0x88c, (BIT(23) | BIT(22) | BIT(21) | BIT(20)), 0x0);*/	/*enable 3-wire*/

-

-	for (rf_path = RF_PATH_A; rf_path <= RF_PATH_B; rf_path++) {

-

-		odm_set_rf_reg(p_dm_odm, rf_path, 0xef, bRFRegOffsetMask, 0x00100);

-		

-		for (rf0_idx = 1; rf0_idx <= 10; rf0_idx++) {

-			

-			rf33[rf_path][rf0_idx] = rf33[rf_path][rf0_idx] + (rf56_current_temp[rf_path][rf0_idx] & 0x1f); 

-			

-			for (i = rf0_idx; i <= 10; i++)

-				rf33[rf_path][rf0_idx] = rf33[rf_path][rf0_idx] + delta_gain_gap[rf_path][i];

-

-			if (rf33[rf_path][rf0_idx] >= 0x1d)

-				rf33[rf_path][rf0_idx] = 0x1d;

-			else if (rf33[rf_path][rf0_idx] <= 0x2)

-				rf33[rf_path][rf0_idx] = 0x2;

-

-			rf33[rf_path][rf0_idx] = rf33[rf_path][rf0_idx] + ((rf0_idx - 1) * 0x4000) + (rf56_current_temp[rf_path][rf0_idx] & 0xfffe0);

-

-			ODM_RT_TRACE(p_dm_odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, 

-				("[TGGC] rf56[%d][%d]=0x%05x rf33[%d][%d]=0x%05x\n", rf_path, rf0_idx, rf56_current_temp[rf_path][rf0_idx], rf_path, rf0_idx, rf33[rf_path][rf0_idx]));

-

-			odm_set_rf_reg(p_dm_odm, rf_path, 0x33, bRFRegOffsetMask, rf33[rf_path][rf0_idx]);

-		}

-		

-		odm_set_rf_reg(p_dm_odm, rf_path, 0xef, bRFRegOffsetMask, 0x00000);

-	}

-

-}

-#endif

-

-

-void

-odm_tx_gain_gap_calibration(

-	void	*p_dm_void

-)

-{

-	PDM_ODM_T	p_dm_odm = (PDM_ODM_T)p_dm_void;

-

-	#if (RTL8197F_SUPPORT == 1)

-		if (p_dm_odm->SupportICType & ODM_RTL8197F)

-			odm_tx_gain_gap_calibration_8197f(p_dm_void);

-	#endif

-

-}

+/******************************************************************************
+ *
+ * Copyright(c) 2007 - 2017  Realtek Corporation.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ *
+ * The full GNU General Public License is included in this distribution in the
+ * file called LICENSE.
+ *
+ * Contact Information:
+ * wlanfae <wlanfae@realtek.com>
+ * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
+ * Hsinchu 300, Taiwan.
+ *
+ * Larry Finger <Larry.Finger@lwfinger.net>
+ *
+ *****************************************************************************/
+#include "mp_precomp.h"
+#include "phydm_precomp.h"
+
+void odm_bub_sort(u32 *data, u32 n)
+{
+	int i, j, temp, sp;
+
+	for (i = n - 1; i >= 0; i--) {
+		sp = 1;
+		for (j = 0; j < i; j++) {
+			if (data[j] < data[j + 1]) {
+				temp = data[j];
+				data[j] = data[j + 1];
+				data[j + 1] = temp;
+				sp = 0;
+			}
+		}
+		if (sp == 1)
+			break;
+	}
+}
+
+#if (RTL8197F_SUPPORT == 1)
+
+u4Byte
+odm_tx_gain_gap_psd_8197f(
+	void *dm_void,
+	u1Byte rf_path,
+	u4Byte rf56)
+{
+	PDM_ODM_T dm = (PDM_ODM_T)dm_void;
+
+	u1Byte i, j;
+	u4Byte psd_vaule[5], psd_avg_time = 5, psd_vaule_temp;
+
+	u4Byte iqk_ctl_addr[2][6] = {{0xe30, 0xe34, 0xe50, 0xe54, 0xe38, 0xe3c},
+				     {0xe50, 0xe54, 0xe30, 0xe34, 0xe58, 0xe5c}};
+
+	u4Byte psd_finish_bit[2] = {0x04000000, 0x20000000};
+	u4Byte psd_fail_bit[2] = {0x08000000, 0x40000000};
+
+	u4Byte psd_cntl_value[2][2] = {{0x38008c1c, 0x10008c1c},
+				       {0x38008c2c, 0x10008c2c}};
+
+	u4Byte psd_report_addr[2] = {0xea0, 0xec0};
+
+	odm_set_rf_reg(dm, rf_path, RF_0xdf, bRFRegOffsetMask, 0x00e02);
+
+	ODM_delay_us(100);
+
+	odm_set_bb_reg(dm, R_0xe28, 0xffffffff, 0x0);
+
+	odm_set_rf_reg(dm, rf_path, RF_0x56, 0xfff, rf56);
+	while (rf56 != (odm_get_rf_reg(dm, rf_path, RF_0x56, 0xfff)))
+		odm_set_rf_reg(dm, rf_path, RF_0x56, 0xfff, rf56);
+
+	odm_set_bb_reg(dm, R_0xd94, 0xffffffff, 0x44FFBB44);
+	odm_set_bb_reg(dm, R_0xe70, 0xffffffff, 0x00400040);
+	odm_set_bb_reg(dm, R_0xc04, 0xffffffff, 0x6f005403);
+	odm_set_bb_reg(dm, R_0xc08, 0xffffffff, 0x000804e4);
+	odm_set_bb_reg(dm, R_0x874, 0xffffffff, 0x04203400);
+	odm_set_bb_reg(dm, R_0xe28, 0xffffffff, 0x80800000);
+
+	odm_set_bb_reg(dm, iqk_ctl_addr[rf_path][0], 0xffffffff, psd_cntl_value[rf_path][0]);
+	odm_set_bb_reg(dm, iqk_ctl_addr[rf_path][1], 0xffffffff, psd_cntl_value[rf_path][1]);
+	odm_set_bb_reg(dm, iqk_ctl_addr[rf_path][2], 0xffffffff, psd_cntl_value[rf_path][0]);
+	odm_set_bb_reg(dm, iqk_ctl_addr[rf_path][3], 0xffffffff, psd_cntl_value[rf_path][0]);
+	odm_set_bb_reg(dm, iqk_ctl_addr[rf_path][4], 0xffffffff, 0x8215001F);
+	odm_set_bb_reg(dm, iqk_ctl_addr[rf_path][5], 0xffffffff, 0x2805001F);
+
+	odm_set_bb_reg(dm, R_0xe40, 0xffffffff, 0x81007C00);
+	odm_set_bb_reg(dm, R_0xe44, 0xffffffff, 0x81004800);
+	odm_set_bb_reg(dm, R_0xe4c, 0xffffffff, 0x0046a8d0);
+
+	for (i = 0; i < psd_avg_time; i++) {
+		for (j = 0; j < 1000; j++) {
+			odm_set_bb_reg(dm, R_0xe48, 0xffffffff, 0xfa005800);
+			odm_set_bb_reg(dm, R_0xe48, 0xffffffff, 0xf8005800);
+
+			while (!odm_get_bb_reg(dm, R_0xeac, psd_finish_bit[rf_path]))
+				; /*wait finish bit*/
+
+			if (!odm_get_bb_reg(dm, R_0xeac, psd_fail_bit[rf_path])) { /*check fail bit*/
+
+				psd_vaule[i] = odm_get_bb_reg(dm, psd_report_addr[rf_path], 0xffffffff);
+
+				if (psd_vaule[i] > 0xffff)
+					break;
+			}
+		}
+
+		RF_DBG(dm, DBG_RF_IQK,
+		       "[TGGC] rf0=0x%x rf56=0x%x rf56_reg=0x%x time=%d psd_vaule=0x%x\n",
+		       odm_get_rf_reg(dm, rf_path, RF_0x0, 0xff), rf56,
+		       odm_get_rf_reg(dm, rf_path, RF_0x56, 0xfff), j,
+		       psd_vaule[i]);
+	}
+
+	odm_bub_sort(psd_vaule, psd_avg_time);
+
+	psd_vaule_temp = psd_vaule[(UINT)(psd_avg_time / 2)];
+
+	odm_set_bb_reg(dm, R_0xd94, 0xffffffff, 0x44BBBB44);
+	odm_set_bb_reg(dm, R_0xe70, 0xffffffff, 0x80408040);
+	odm_set_bb_reg(dm, R_0xc04, 0xffffffff, 0x6f005433);
+	odm_set_bb_reg(dm, R_0xc08, 0xffffffff, 0x000004e4);
+	odm_set_bb_reg(dm, R_0x874, 0xffffffff, 0x04003400);
+	odm_set_bb_reg(dm, R_0xe28, 0xffffffff, 0x00000000);
+
+	RF_DBG(dm, DBG_RF_IQK,
+	       "[TGGC] rf0=0x%x rf56=0x%x rf56_reg=0x%x psd_vaule_temp=0x%x\n",
+	       odm_get_rf_reg(dm, rf_path, RF_0x0, 0xff), rf56,
+	       odm_get_rf_reg(dm, rf_path, RF_0x56, 0xfff), psd_vaule_temp);
+
+	odm_set_rf_reg(dm, rf_path, RF_0xdf, bRFRegOffsetMask, 0x00602);
+
+	return psd_vaule_temp;
+}
+
+void odm_tx_gain_gap_calibration_8197f(
+	void *dm_void)
+{
+	PDM_ODM_T dm = (PDM_ODM_T)dm_void;
+
+	u1Byte rf_path, rf0_idx, rf0_idx_current, rf0_idx_next, i, delta_gain_retry = 3;
+
+	s1Byte delta_gain_gap_pre, delta_gain_gap[2][11];
+	u4Byte rf56_current, rf56_next, psd_value_current, psd_value_next;
+	u4Byte psd_gap, rf56_current_temp[2][11];
+	s4Byte rf33[2][11];
+
+	memset(rf33, 0x0, sizeof(rf33));
+
+	for (rf_path = RF_PATH_A; rf_path <= RF_PATH_B; rf_path++) {
+		if (rf_path == RF_PATH_A)
+			odm_set_bb_reg(dm, R_0x88c, (BIT(21) | BIT(20)), 0x3); /*disable 3-wire*/
+		else if (rf_path == RF_PATH_B)
+			odm_set_bb_reg(dm, R_0x88c, (BIT(23) | BIT(22)), 0x3); /*disable 3-wire*/
+
+		ODM_delay_us(100);
+
+		for (rf0_idx = 1; rf0_idx <= 10; rf0_idx++) {
+			rf0_idx_current = 3 * (rf0_idx - 1) + 1;
+			odm_set_rf_reg(dm, rf_path, RF_0x0, 0xff, rf0_idx_current);
+			ODM_delay_us(100);
+			rf56_current_temp[rf_path][rf0_idx] = odm_get_rf_reg(dm, rf_path, RF_0x56, 0xfff);
+			rf56_current = rf56_current_temp[rf_path][rf0_idx];
+
+			rf0_idx_next = 3 * rf0_idx + 1;
+			odm_set_rf_reg(dm, rf_path, RF_0x0, 0xff, rf0_idx_next);
+			ODM_delay_us(100);
+			rf56_next = odm_get_rf_reg(dm, rf_path, RF_0x56, 0xfff);
+
+			RF_DBG(dm, DBG_RF_IQK,
+			       "[TGGC] rf56_current[%d][%d]=0x%x rf56_next[%d][%d]=0x%x\n",
+			       rf_path, rf0_idx, rf56_current, rf_path, rf0_idx,
+			       rf56_next);
+
+			if ((rf56_current >> 5) == (rf56_next >> 5)) {
+				delta_gain_gap[rf_path][rf0_idx] = 0;
+
+				RF_DBG(dm, DBG_RF_IQK,
+				       "[TGGC] rf56_current[11:5] == rf56_next[%d][%d][11:5]=0x%x delta_gain_gap[%d][%d]=%d\n",
+				       rf_path, rf0_idx, (rf56_next >> 5),
+				       rf_path, rf0_idx,
+				       delta_gain_gap[rf_path][rf0_idx]);
+
+				continue;
+			}
+
+			RF_DBG(dm, DBG_RF_IQK,
+			       "[TGGC] rf56_current[%d][%d][11:5]=0x%x != rf56_next[%d][%d][11:5]=0x%x\n",
+			       rf_path, rf0_idx, (rf56_current >> 5), rf_path,
+			       rf0_idx, (rf56_next >> 5));
+
+			for (i = 0; i < delta_gain_retry; i++) {
+				psd_value_current = odm_tx_gain_gap_psd_8197f(dm, rf_path, rf56_current);
+
+				psd_value_next = odm_tx_gain_gap_psd_8197f(dm, rf_path, rf56_next - 2);
+
+				psd_gap = psd_value_next / (psd_value_current / 1000);
+
+#if 0
+				if (psd_gap > 1413)
+					delta_gain_gap[rf_path][rf0_idx] = 1;
+				else if (psd_gap > 1122)
+					delta_gain_gap[rf_path][rf0_idx] = 0;
+				else
+					delta_gain_gap[rf_path][rf0_idx] = -1;
+#endif
+
+				if (psd_gap > 1445)
+					delta_gain_gap[rf_path][rf0_idx] = 1;
+				else if (psd_gap > 1096)
+					delta_gain_gap[rf_path][rf0_idx] = 0;
+				else
+					delta_gain_gap[rf_path][rf0_idx] = -1;
+
+				if (i == 0)
+					delta_gain_gap_pre = delta_gain_gap[rf_path][rf0_idx];
+
+				RF_DBG(dm, DBG_RF_IQK,
+				       "[TGGC] psd_value_current=0x%x psd_value_next=0x%x psd_value_next/psd_value_current=%d delta_gain_gap[%d][%d]=%d\n",
+				       psd_value_current, psd_value_next,
+				       psd_gap, rf_path, rf0_idx,
+				       delta_gain_gap[rf_path][rf0_idx]);
+
+				if (i == 0 && delta_gain_gap[rf_path][rf0_idx] == 0)
+					break;
+
+				if (delta_gain_gap_pre != delta_gain_gap[rf_path][rf0_idx]) {
+					delta_gain_gap[rf_path][rf0_idx] = 0;
+
+					RF_DBG(dm, DBG_RF_IQK, "[TGGC] delta_gain_gap_pre(%d) != delta_gain_gap[%d][%d](%d) time=%d\n",
+					       delta_gain_gap_pre, rf_path, rf0_idx, delta_gain_gap[rf_path][rf0_idx], i);
+
+					break;
+				}
+
+				RF_DBG(dm, DBG_RF_IQK,
+				       "[TGGC] delta_gain_gap_pre(%d) == delta_gain_gap[%d][%d](%d) time=%d\n",
+				       delta_gain_gap_pre, rf_path, rf0_idx,
+				       delta_gain_gap[rf_path][rf0_idx], i);
+			}
+		}
+
+		if (rf_path == RF_PATH_A)
+			odm_set_bb_reg(dm, R_0x88c, (BIT(21) | BIT(20)), 0x0); /*enable 3-wire*/
+		else if (rf_path == RF_PATH_B)
+			odm_set_bb_reg(dm, R_0x88c, (BIT(23) | BIT(22)), 0x0); /*enable 3-wire*/
+
+		ODM_delay_us(100);
+	}
+
+#if 0
+	/*odm_set_bb_reg(dm, R_0x88c, (BIT(23) | BIT(22) | BIT(21) | BIT(20)), 0x0);*/ /*enable 3-wire*/
+#endif
+
+	for (rf_path = RF_PATH_A; rf_path <= RF_PATH_B; rf_path++) {
+		odm_set_rf_reg(dm, rf_path, RF_0xef, bRFRegOffsetMask, 0x00100);
+
+		for (rf0_idx = 1; rf0_idx <= 10; rf0_idx++) {
+			rf33[rf_path][rf0_idx] = rf33[rf_path][rf0_idx] + (rf56_current_temp[rf_path][rf0_idx] & 0x1f);
+
+			for (i = rf0_idx; i <= 10; i++)
+				rf33[rf_path][rf0_idx] = rf33[rf_path][rf0_idx] + delta_gain_gap[rf_path][i];
+
+			if (rf33[rf_path][rf0_idx] >= 0x1d)
+				rf33[rf_path][rf0_idx] = 0x1d;
+			else if (rf33[rf_path][rf0_idx] <= 0x2)
+				rf33[rf_path][rf0_idx] = 0x2;
+
+			rf33[rf_path][rf0_idx] = rf33[rf_path][rf0_idx] + ((rf0_idx - 1) * 0x4000) + (rf56_current_temp[rf_path][rf0_idx] & 0xfffe0);
+
+			RF_DBG(dm, DBG_RF_IQK,
+			       "[TGGC] rf56[%d][%d]=0x%05x rf33[%d][%d]=0x%05x\n",
+			       rf_path, rf0_idx,
+			       rf56_current_temp[rf_path][rf0_idx], rf_path,
+			       rf0_idx, rf33[rf_path][rf0_idx]);
+
+			odm_set_rf_reg(dm, rf_path, RF_0x33, bRFRegOffsetMask, rf33[rf_path][rf0_idx]);
+		}
+
+		odm_set_rf_reg(dm, rf_path, RF_0xef, bRFRegOffsetMask, 0x00000);
+	}
+}
+#endif
+
+void odm_tx_gain_gap_calibration(void *dm_void)
+{
+	PDM_ODM_T dm = (PDM_ODM_T)dm_void;
+#if (RTL8197F_SUPPORT == 1)
+	if (dm->SupportICType & ODM_RTL8197F)
+		odm_tx_gain_gap_calibration_8197f(dm_void);
+#endif
+}
diff --git a/rtl8723DS/hal/phydm/halrf/halrf_txgapcal.h b/rtl8723DS/hal/phydm/halrf/halrf_txgapcal.h
index d7016df..09651cb 100755..100644
--- a/rtl8723DS/hal/phydm/halrf/halrf_txgapcal.h
+++ b/rtl8723DS/hal/phydm/halrf/halrf_txgapcal.h
@@ -1,5 +1,31 @@
-void

-odm_tx_gain_gap_calibration(

-	void	*p_dm_void

-);

-

+/******************************************************************************
+ *
+ * Copyright(c) 2007 - 2017  Realtek Corporation.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ *
+ * The full GNU General Public License is included in this distribution in the
+ * file called LICENSE.
+ *
+ * Contact Information:
+ * wlanfae <wlanfae@realtek.com>
+ * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
+ * Hsinchu 300, Taiwan.
+ *
+ * Larry Finger <Larry.Finger@lwfinger.net>
+ *
+ *****************************************************************************/
+
+#ifndef __HALRF_TXGAPCAL_H__
+#define __HALRF_TXGAPCAL_H__
+
+void odm_tx_gain_gap_calibration(void *dm_void);
+
+#endif /*__HALRF_TXGAPCAL_H__*/
diff --git a/rtl8723DS/hal/phydm/halrf/rtl8723d/halrf_8723d.c b/rtl8723DS/hal/phydm/halrf/rtl8723d/halrf_8723d.c
index 0500994..1a3e2ff 100755..100644
--- a/rtl8723DS/hal/phydm/halrf/rtl8723d/halrf_8723d.c
+++ b/rtl8723DS/hal/phydm/halrf/rtl8723d/halrf_8723d.c
@@ -15,75 +15,63 @@
 
 #include "mp_precomp.h"
 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
-	#if RT_PLATFORM==PLATFORM_MACOSX
-	#include "phydm_precomp.h"
-	#else
-	#include "../phydm_precomp.h"
-	#endif
+#if RT_PLATFORM == PLATFORM_MACOSX
+#include "phydm_precomp.h"
+#else
+#include "../phydm_precomp.h"
+#endif
 #else
 #include "../../phydm_precomp.h"
 #endif
 
-
 #if (RTL8723D_SUPPORT == 1)
 
 /*---------------------------Define Local Constant---------------------------*/
 /*IQK*/
-#define IQK_DELAY_TIME_8723D	10
+#define IQK_DELAY_TIME_8723D 10
 
 /* 2010/04/25 MH Define the max tx power tracking tx agc power.*/
-#define		ODM_TXPWRTRACK_MAX_IDX_8723D		6
-
-#define     PATH_S1                         0
-#define     idx_0xc94                       0
-#define     idx_0xc80                       1
-#define     idx_0xc4c                       2
-
-#define     idx_0xc14                       0
-#define     idx_0xca0                       1
-
+#define ODM_TXPWRTRACK_MAX_IDX_8723D 6
 
-#define     PATH_S0                         1
-#define     idx_0xcd0                       0
-#define     idx_0xcd4                       1
+#define PATH_S1 0
+#define idx_0xc94 0
+#define idx_0xc80 1
+#define idx_0xc4c 2
 
-#define     idx_0xcd8                       0
-#define     idx_0xcdc                       1
+#define idx_0xc14 0
+#define idx_0xca0 1
 
-#define     KEY                             0
-#define     VAL                             1
+#define PATH_S0 1
+#define idx_0xcd0 0
+#define idx_0xcd4 1
 
+#define idx_0xcd8 0
+#define idx_0xcdc 1
 
+#define KEY 0
+#define VAL 1
 
 /*---------------------------Define Local Constant---------------------------*/
 
-
 /* Tx Power Tracking*/
 
-
-void set_iqk_matrix_8723d(
-	struct PHY_DM_STRUCT	*p_dm,
-	u8		OFDM_index,
-	u8		rf_path,
-	s32		iqk_result_x,
-	s32		iqk_result_y
-)
+void set_iqk_matrix_8723d(struct dm_struct *dm, u8 OFDM_index, u8 rf_path,
+			  s32 iqk_result_x, s32 iqk_result_y)
 {
-	s32			ele_A = 0, ele_D = 0, ele_C = 0, value32;
-	s32			ele_A_ext = 0, ele_C_ext = 0, ele_D_ext = 0;
+	s32 ele_A = 0, ele_D = 0, ele_C = 0, value32;
+	s32 ele_A_ext = 0, ele_C_ext = 0, ele_D_ext = 0;
 
 	if (OFDM_index >= OFDM_TABLE_SIZE)
 		OFDM_index = OFDM_TABLE_SIZE - 1;
 	else if (OFDM_index < 0)
 		OFDM_index = 0;
 
-	if ((iqk_result_x != 0) && (*(p_dm->p_band_type) == ODM_BAND_2_4G)) {
-
+	if (iqk_result_x != 0 && (*dm->band_type == ODM_BAND_2_4G)) {
 		/* new element D */
 		ele_D = (ofdm_swing_table_new[OFDM_index] & 0xFFC00000) >> 22;
 		ele_D_ext = (((iqk_result_x * ele_D) >> 7) & 0x01);
 		/* new element A */
-		if ((iqk_result_x & 0x00000200) != 0)		/* consider minus */
+		if ((iqk_result_x & 0x00000200) != 0) /* consider minus */
 			iqk_result_x = iqk_result_x | 0xFFFFFC00;
 		ele_A = ((iqk_result_x * ele_D) >> 8) & 0x000003FF;
 		ele_A_ext = ((iqk_result_x * ele_D) >> 7) & 0x1;
@@ -98,30 +86,30 @@ void set_iqk_matrix_8723d(
 			/* write new elements A, C, D to regC80, regC94, reg0xc4c, and element B is always 0 */
 			/* write 0xc80 */
 			value32 = (ele_D << 22) | ((ele_C & 0x3F) << 16) | ele_A;
-			odm_set_bb_reg(p_dm, REG_OFDM_0_XA_TX_IQ_IMBALANCE, MASKDWORD, value32);
+			odm_set_bb_reg(dm, REG_OFDM_0_XA_TX_IQ_IMBALANCE, MASKDWORD, value32);
 			/* write 0xc94 */
 			value32 = (ele_C & 0x000003C0) >> 6;
-			odm_set_bb_reg(p_dm, REG_OFDM_0_XC_TX_AFE, MASKH4BITS, value32);
+			odm_set_bb_reg(dm, R_0xc94, MASKH4BITS, value32);
 			/* write 0xc4c */
 			value32 = (ele_D_ext << 28) | (ele_A_ext << 31) | (ele_C_ext << 29);
-			value32 = (odm_get_bb_reg(p_dm, REG_OFDM_0_ECCA_THRESHOLD, MASKDWORD) & (~(BIT(31) | BIT(29) | BIT(28)))) | value32;
-			odm_set_bb_reg(p_dm, REG_OFDM_0_ECCA_THRESHOLD, MASKDWORD, value32);
+			value32 = (odm_get_bb_reg(dm, REG_OFDM_0_ECCA_THRESHOLD, MASKDWORD) & (~(BIT(31) | BIT(29) | BIT(28)))) | value32;
+			odm_set_bb_reg(dm, REG_OFDM_0_ECCA_THRESHOLD, MASKDWORD, value32);
 			break;
 
 		case RF_PATH_B:
-			/*wirte new elements A, C, D to regCd0 and regCd4, element B is always 0*/
+			/*write new elements A, C, D to regCd0 and regCd4, element B is always 0*/
 			value32 = ele_D;
-			odm_set_bb_reg(p_dm, 0xCd4, 0x007FE000, value32);
+			odm_set_bb_reg(dm, R_0xcd4, 0x007FE000, value32);
 
 			value32 = ele_C;
-			odm_set_bb_reg(p_dm, 0xCd4, 0x000007FE, value32);
+			odm_set_bb_reg(dm, R_0xcd4, 0x000007FE, value32);
 
 			value32 = ele_A;
-			odm_set_bb_reg(p_dm, 0xCd0, 0x000007FE, value32);
+			odm_set_bb_reg(dm, R_0xcd0, 0x000007FE, value32);
 
-			odm_set_bb_reg(p_dm, 0xCd4, BIT(12), ele_D_ext);
-			odm_set_bb_reg(p_dm, 0xCd0, BIT(0), ele_A_ext);
-			odm_set_bb_reg(p_dm, 0xCd4, BIT(0), ele_C_ext);
+			odm_set_bb_reg(dm, R_0xcd4, BIT(12), ele_D_ext);
+			odm_set_bb_reg(dm, R_0xcd0, BIT(0), ele_A_ext);
+			odm_set_bb_reg(dm, R_0xcd4, BIT(0), ele_C_ext);
 			break;
 		default:
 			break;
@@ -129,73 +117,69 @@ void set_iqk_matrix_8723d(
 	} else {
 		switch (rf_path) {
 		case RF_PATH_A:
-			odm_set_bb_reg(p_dm, REG_OFDM_0_XA_TX_IQ_IMBALANCE, MASKDWORD, ofdm_swing_table_new[OFDM_index]);
-			odm_set_bb_reg(p_dm, REG_OFDM_0_XC_TX_AFE, MASKH4BITS, 0x00);
-			value32 = odm_get_bb_reg(p_dm, REG_OFDM_0_ECCA_THRESHOLD, MASKDWORD) & (~(BIT(31) | BIT(29) | BIT(28)));
-			odm_set_bb_reg(p_dm, REG_OFDM_0_ECCA_THRESHOLD, MASKDWORD, value32);
+			odm_set_bb_reg(dm, REG_OFDM_0_XA_TX_IQ_IMBALANCE, MASKDWORD, ofdm_swing_table_new[OFDM_index]);
+			odm_set_bb_reg(dm, R_0xc94, MASKH4BITS, 0x00);
+			value32 = odm_get_bb_reg(dm, REG_OFDM_0_ECCA_THRESHOLD, MASKDWORD) & (~(BIT(31) | BIT(29) | BIT(28)));
+			odm_set_bb_reg(dm, REG_OFDM_0_ECCA_THRESHOLD, MASKDWORD, value32);
 			break;
 
 		case RF_PATH_B:
 			/*image S1:c80 to S0:Cd0 and Cd4*/
-			odm_set_bb_reg(p_dm, 0xcd0, 0x000007FE, ofdm_swing_table_new[OFDM_index] & 0x000003FF);
-			odm_set_bb_reg(p_dm, 0xcd0, 0x0007E000, (ofdm_swing_table_new[OFDM_index] & 0x0000FC00) >> 10);
-			odm_set_bb_reg(p_dm, 0xcd4, 0x0000007E, (ofdm_swing_table_new[OFDM_index] & 0x003F0000) >> 16);
-			odm_set_bb_reg(p_dm, 0xcd4, 0x007FE000, (ofdm_swing_table_new[OFDM_index] & 0xFFC00000) >> 22);
+			odm_set_bb_reg(dm, R_0xcd0, 0x000007FE, ofdm_swing_table_new[OFDM_index] & 0x000003FF);
+			odm_set_bb_reg(dm, R_0xcd0, 0x0007E000, (ofdm_swing_table_new[OFDM_index] & 0x0000FC00) >> 10);
+			odm_set_bb_reg(dm, R_0xcd4, 0x0000007E, (ofdm_swing_table_new[OFDM_index] & 0x003F0000) >> 16);
+			odm_set_bb_reg(dm, R_0xcd4, 0x007FE000, (ofdm_swing_table_new[OFDM_index] & 0xFFC00000) >> 22);
 
-			odm_set_bb_reg(p_dm, 0xcd4, 0x00000780, 0x00);
+			odm_set_bb_reg(dm, R_0xcd4, 0x00000780, 0x00);
 
-			odm_set_bb_reg(p_dm, 0xcd4, BIT(12), 0x0);
-			odm_set_bb_reg(p_dm, 0xcd4, BIT(0), 0x0);
-			odm_set_bb_reg(p_dm, 0xcd0, BIT(0), 0x0);
+			odm_set_bb_reg(dm, R_0xcd4, BIT(12), 0x0);
+			odm_set_bb_reg(dm, R_0xcd4, BIT(0), 0x0);
+			odm_set_bb_reg(dm, R_0xcd0, BIT(0), 0x0);
 			break;
 		default:
 			break;
 		}
 	}
-	ODM_RT_TRACE(p_dm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("TxPwrTracking path %c: X = 0x%x, Y = 0x%x ele_A = 0x%x ele_C = 0x%x ele_D = 0x%x ele_A_ext = 0x%x ele_C_ext = 0x%x ele_D_ext = 0x%x\n",
-		(rf_path == RF_PATH_A ? 'A' : 'B'), (u32)iqk_result_x, (u32)iqk_result_y, (u32)ele_A, (u32)ele_C, (u32)ele_D, (u32)ele_A_ext, (u32)ele_C_ext, (u32)ele_D_ext));
+	RF_DBG(dm, DBG_RF_TX_PWR_TRACK,
+	       "TxPwrTracking path %c: X = 0x%x, Y = 0x%x ele_A = 0x%x ele_C = 0x%x ele_D = 0x%x ele_A_ext = 0x%x ele_C_ext = 0x%x ele_D_ext = 0x%x\n",
+	       (rf_path == RF_PATH_A ? 'A' : 'B'), (u32)iqk_result_x,
+	       (u32)iqk_result_y, (u32)ele_A, (u32)ele_C, (u32)ele_D,
+	       (u32)ele_A_ext, (u32)ele_C_ext, (u32)ele_D_ext);
 }
 
-void
-set_cck_filter_coefficient_8723d(
-	struct PHY_DM_STRUCT	*p_dm,
-	u8		cck_swing_index
-)
+void set_cck_filter_coefficient_8723d(struct dm_struct *dm, u8 cck_swing_index)
 {
-	odm_set_bb_reg(p_dm, 0xab4, 0x000007FF, cck_swing_table_ch1_ch14_8723d[cck_swing_index]);
+	odm_set_bb_reg(dm, R_0xab4, 0x000007FF, cck_swing_table_ch1_ch14_8723d[cck_swing_index]);
 }
 
-void do_iqk_8723d(
-	void		*p_dm_void,
-	u8		delta_thermal_index,
-	u8		thermal_value,
-	u8		threshold
-)
+void do_iqk_8723d(void *dm_void, u8 delta_thermal_index, u8 thermal_value,
+		  u8 threshold)
 {
-	u32  is_bt_enable = 0;
+	u32 is_bt_enable = 0;
 
-	struct PHY_DM_STRUCT	*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
 
-	if (*(p_dm->p_mp_mode) == false)
-		is_bt_enable = odm_get_mac_reg(p_dm, 0xa8, MASKDWORD) & BIT(17);
+	if (!(*dm->mp_mode))
+		is_bt_enable = odm_get_mac_reg(dm, R_0xa8, MASKDWORD) & BIT(17);
 
 	if (is_bt_enable) {
-		ODM_RT_TRACE(p_dm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("[IQK]Skip IQK because BT is enable\n"));
+		RF_DBG(dm, DBG_RF_IQK, "[IQK]Skip IQK because BT is enable\n");
 		return;
-	} else
-		ODM_RT_TRACE(p_dm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("[IQK]Do IQK because BT is disable\n"));
+	}
+
+	RF_DBG(dm, DBG_RF_IQK, "[IQK]Do IQK because BT is disable\n");
 
-	odm_reset_iqk_result(p_dm);
+	odm_reset_iqk_result(dm);
 
-	p_dm->rf_calibrate_info.thermal_value_iqk = thermal_value;
+	dm->rf_calibrate_info.thermal_value_iqk = thermal_value;
 
-	halrf_iqk_trigger(p_dm, false);
+	halrf_iqk_trigger(dm, false);
 }
 
 /*-----------------------------------------------------------------------------
  * Function:	odm_tx_pwr_track_set_pwr_8723d()
  *
- * Overview:	8723D change all channel tx power accordign to flag.
+ * Overview:	8723D change all channel tx power according to flag.
  *				OFDM & CCK are all different.
  *
  * Input:		NONE
@@ -208,65 +192,66 @@ void do_iqk_8723d(
  *	When		Who		Remark
  *	04/23/2012	MHC		Create version 0.
  *
- *---------------------------------------------------------------------------*/
-void
-odm_tx_pwr_track_set_pwr_8723d(
-	void		*p_dm_void,
-	enum pwrtrack_method	method,
-	u8				rf_path,
-	u8				channel_mapped_index
-)
+ *---------------------------------------------------------------------------
+ */
+void odm_tx_pwr_track_set_pwr_8723d(void *dm_void, enum pwrtrack_method method,
+				    u8 rf_path, u8 channel_mapped_index)
 {
-	struct PHY_DM_STRUCT	*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	struct _ADAPTER			*adapter = p_dm->adapter;
-	//PHAL_DATA_TYPE			p_hal_data = GET_HAL_DATA(adapter);
-	struct odm_rf_calibration_structure			*p_rf_calibrate_info = &(p_dm->rf_calibrate_info);
-	struct _hal_rf_ *p_rf = &(p_dm->rf_table);
-	u8					pwr_tracking_limit_ofdm = 30;
-	u8					pwr_tracking_limit_cck = 40;
-	u8					tx_rate = 0xFF;
-	u8					final_ofdm_swing_index = 0;
-	u8					final_cck_swing_index = 0;
-	u8					i = 0;
-
-if (*(p_dm->p_mp_mode) == true) {
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+#if !((DM_ODM_SUPPORT_TYPE & ODM_CE) && defined(DM_ODM_CE_MAC80211))
+	struct _ADAPTER *adapter = dm->adapter;
+#endif
+#if 0
+	//PHAL_DATA_TYPE			hal_data = GET_HAL_DATA(((PADAPTER)adapter));
+#endif
+	struct dm_rf_calibration_struct *cali_info = &dm->rf_calibrate_info;
+	struct _hal_rf_ *rf = &dm->rf_table;
+	u8 pwr_tracking_limit_ofdm = 30;
+	u8 pwr_tracking_limit_cck = 40;
+	u8 tx_rate = 0xFF;
+	u8 final_ofdm_swing_index = 0;
+	u8 final_cck_swing_index = 0;
+
+	if (*dm->mp_mode) {
 #if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_CE))
 #if (DM_ODM_SUPPORT_TYPE & ODM_WIN)
 #if (MP_DRIVER == 1)
-		PMPT_CONTEXT p_mpt_ctx = &(adapter->MptCtx);
+		PMPT_CONTEXT p_mpt_ctx = &adapter->MptCtx;
 
 		tx_rate = MptToMgntRate(p_mpt_ctx->MptRateIndex);
 #endif
 #elif (DM_ODM_SUPPORT_TYPE & ODM_CE)
 #ifdef CONFIG_MP_INCLUDED
-		PMPT_CONTEXT p_mpt_ctx = &(adapter->mppriv.mpt_ctx);
+		PMPT_CONTEXT p_mpt_ctx = &adapter->mppriv.mpt_ctx;
 
 		tx_rate = mpt_to_mgnt_rate(p_mpt_ctx->mpt_rate_index);
 #endif
 #endif
 #endif
 	} else {
-		u16	rate	 = *(p_dm->p_forced_data_rate);
+		u16 rate = *dm->forced_data_rate;
 
 		if (!rate) { /*auto rate*/
 #if (DM_ODM_SUPPORT_TYPE & ODM_WIN)
-			tx_rate = adapter->HalFunc.GetHwRateFromMRateHandler(p_dm->tx_rate);
+			tx_rate = ((PADAPTER)adapter)->HalFunc.GetHwRateFromMRateHandler(dm->tx_rate);
+#elif (DM_ODM_SUPPORT_TYPE & ODM_CE) && defined(DM_ODM_CE_MAC80211)
+			tx_rate = dm->tx_rate;
 #elif (DM_ODM_SUPPORT_TYPE & ODM_CE)
-			if (p_dm->number_linked_client != 0)
-				tx_rate = hw_rate_to_m_rate(p_dm->tx_rate);
+			if (dm->number_linked_client != 0)
+				tx_rate = hw_rate_to_m_rate(dm->tx_rate);
 			else
-				tx_rate = p_rf->p_rate_index;
+				tx_rate = rf->p_rate_index;
 #endif
-		} else   /*force rate*/
+		} else { /*force rate*/
 			tx_rate = (u8)rate;
+		}
 	}
 
-
-	ODM_RT_TRACE(p_dm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("===>ODM_TxPwrTrackSetPwr8723DA\n"));
+	RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "===>ODM_TxPwrTrackSetPwr8723DA\n");
 
 	if (tx_rate != 0xFF) {
 		/*CCK*/
-		if (((tx_rate >= MGN_1M) && (tx_rate <= MGN_5_5M)) || tx_rate == MGN_11M)
+		if ((tx_rate >= MGN_1M && tx_rate <= MGN_5_5M) || tx_rate == MGN_11M)
 			pwr_tracking_limit_cck = 40;
 		/*OFDM*/
 		else if ((tx_rate >= MGN_6M) && (tx_rate <= MGN_48M))
@@ -290,96 +275,97 @@ if (*(p_dm->p_mp_mode) == true) {
 			pwr_tracking_limit_ofdm = 34;
 
 		else
-			pwr_tracking_limit_ofdm =  p_rf_calibrate_info->default_ofdm_index;   /*Default OFDM index = 30 */
+			pwr_tracking_limit_ofdm = cali_info->default_ofdm_index; /*Default OFDM index = 30 */
 	}
 
 	if (method == TXAGC) {
-		u8	rf = 0;
-		u32	pwr = 0, tx_agc = 0;
-		//struct _ADAPTER *adapter = p_dm->adapter;
+		u32 pwr = 0, tx_agc = 0;
+		/*void *adapter = dm->adapter;*/
 
-		ODM_RT_TRACE(p_dm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("odm_TxPwrTrackSetPwr_8723D CH=%d\n", *(p_dm->p_channel)));
+		RF_DBG(dm, DBG_RF_TX_PWR_TRACK,
+		       "odm_TxPwrTrackSetPwr_8723D CH=%d\n", *dm->channel);
 
-		p_rf_calibrate_info->remnant_ofdm_swing_idx[rf_path] = p_rf_calibrate_info->absolute_ofdm_swing_idx[rf_path];   /* Remnant index equal to aboslute compensate value. */
+		cali_info->remnant_ofdm_swing_idx[rf_path] = cali_info->absolute_ofdm_swing_idx[rf_path]; /* Remnant index equal to aboslute compensate value. */
 
 #if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_CE))
 
 #if (MP_DRIVER != 1)
 #if 0
-		PHY_SetTxPowerLevelByPath8723D(adapter, *p_dm->p_channel, rf_path);   /* Using new set power function */
-		/* PHY_SetTxPowerLevel8723D(p_dm->adapter, *p_dm->p_channel); */
+		PHY_SetTxPowerLevelByPath8723D(adapter, *dm->channel, rf_path);   /* Using new set power function */
+		/* PHY_SetTxPowerLevel8723D(dm->adapter, *dm->channel); */
 #endif
-		p_rf_calibrate_info->modify_tx_agc_flag_path_a = true;
-		p_rf_calibrate_info->modify_tx_agc_flag_path_b = true;
-		p_rf_calibrate_info->modify_tx_agc_flag_path_a_cck = true;
+		cali_info->modify_tx_agc_flag_path_a = true;
+		cali_info->modify_tx_agc_flag_path_b = true;
+		cali_info->modify_tx_agc_flag_path_a_cck = true;
 		if (rf_path == RF_PATH_A) {
-			odm_set_tx_power_index_by_rate_section(p_dm, RF_PATH_A, *p_dm->p_channel, CCK);
-			odm_set_tx_power_index_by_rate_section(p_dm, RF_PATH_A, *p_dm->p_channel, OFDM);
-			odm_set_tx_power_index_by_rate_section(p_dm, RF_PATH_A, *p_dm->p_channel, HT_MCS0_MCS7);
-			odm_set_tx_power_index_by_rate_section(p_dm, RF_PATH_A, *p_dm->p_channel, HT_MCS8_MCS15);
+			odm_set_tx_power_index_by_rate_section(dm, RF_PATH_A, *dm->channel, CCK);
+			odm_set_tx_power_index_by_rate_section(dm, RF_PATH_A, *dm->channel, OFDM);
+			odm_set_tx_power_index_by_rate_section(dm, RF_PATH_A, *dm->channel, HT_MCS0_MCS7);
+			odm_set_tx_power_index_by_rate_section(dm, RF_PATH_A, *dm->channel, HT_MCS8_MCS15);
 		} else {
-			odm_set_tx_power_index_by_rate_section(p_dm, RF_PATH_B, *p_dm->p_channel, CCK);
-			odm_set_tx_power_index_by_rate_section(p_dm, RF_PATH_B, *p_dm->p_channel, OFDM);
-			odm_set_tx_power_index_by_rate_section(p_dm, RF_PATH_B, *p_dm->p_channel, HT_MCS0_MCS7);
-			odm_set_tx_power_index_by_rate_section(p_dm, RF_PATH_B, *p_dm->p_channel, HT_MCS8_MCS15);
+			odm_set_tx_power_index_by_rate_section(dm, RF_PATH_B, *dm->channel, CCK);
+			odm_set_tx_power_index_by_rate_section(dm, RF_PATH_B, *dm->channel, OFDM);
+			odm_set_tx_power_index_by_rate_section(dm, RF_PATH_B, *dm->channel, HT_MCS0_MCS7);
+			odm_set_tx_power_index_by_rate_section(dm, RF_PATH_B, *dm->channel, HT_MCS8_MCS15);
 		}
 #else
 
 		if (rf_path == RF_PATH_A) {
 			/*CCK path S1*/
-			pwr = odm_get_bb_reg(p_dm, REG_TX_AGC_A_RATE18_06, 0xFF);
-			pwr += p_rf_calibrate_info->power_index_offset[RF_PATH_A];
-			odm_set_bb_reg(p_dm, REG_TX_AGC_A_CCK_1_MCS32, MASKBYTE1, pwr);
+			pwr = odm_get_bb_reg(dm, REG_TX_AGC_A_RATE18_06, 0xFF);
+			pwr += cali_info->power_index_offset[RF_PATH_A];
+			odm_set_bb_reg(dm, REG_TX_AGC_A_CCK_1_MCS32, MASKBYTE1, pwr);
 			tx_agc = (pwr << 16) | (pwr << 8) | (pwr);
-			odm_set_bb_reg(p_dm, REG_TX_AGC_B_CCK_11_A_CCK_2_11, 0x00ffffff, tx_agc);
-			RT_DISP(FPHY, PHY_TXPWR, ("odm_tx_pwr_track_set_pwr_8723d: CCK Tx-rf(A) Power = 0x%x\n", tx_agc));
+			odm_set_bb_reg(dm, REG_TX_AGC_B_CCK_11_A_CCK_2_11, 0x00ffffff, tx_agc);
+			RT_DISP(FPHY, PHY_TXPWR, ("%s: CCK Tx-rf(A) Power = 0x%x\n", __func__, tx_agc));
 
 			/*OFDM path S1*/
-			pwr = odm_get_bb_reg(p_dm, REG_TX_AGC_A_RATE18_06, 0xFF);
-			pwr += (p_rf_calibrate_info->bb_swing_idx_ofdm[RF_PATH_A] - p_rf_calibrate_info->bb_swing_idx_ofdm_base[RF_PATH_A]);
+			pwr = odm_get_bb_reg(dm, REG_TX_AGC_A_RATE18_06, 0xFF);
+			pwr += (cali_info->bb_swing_idx_ofdm[RF_PATH_A] - cali_info->bb_swing_idx_ofdm_base[RF_PATH_A]);
 			tx_agc = ((pwr << 24) | (pwr << 16) | (pwr << 8) | pwr);
-			odm_set_bb_reg(p_dm, REG_TX_AGC_A_RATE18_06, MASKDWORD, tx_agc);
-			odm_set_bb_reg(p_dm, REG_TX_AGC_A_RATE54_24, MASKDWORD, tx_agc);
-			odm_set_bb_reg(p_dm, REG_TX_AGC_A_MCS03_MCS00, MASKDWORD, tx_agc);
-			odm_set_bb_reg(p_dm, REG_TX_AGC_A_MCS07_MCS04, MASKDWORD, tx_agc);
-			odm_set_bb_reg(p_dm, REG_TX_AGC_A_MCS11_MCS08, MASKDWORD, tx_agc);
-			odm_set_bb_reg(p_dm, REG_TX_AGC_A_MCS15_MCS12, MASKDWORD, tx_agc);
-			RT_DISP(FPHY, PHY_TXPWR, ("odm_tx_pwr_track_set_pwr_8723d: OFDM Tx-rf(A) Power = 0x%x\n", tx_agc));
+			odm_set_bb_reg(dm, REG_TX_AGC_A_RATE18_06, MASKDWORD, tx_agc);
+			odm_set_bb_reg(dm, REG_TX_AGC_A_RATE54_24, MASKDWORD, tx_agc);
+			odm_set_bb_reg(dm, REG_TX_AGC_A_MCS03_MCS00, MASKDWORD, tx_agc);
+			odm_set_bb_reg(dm, REG_TX_AGC_A_MCS07_MCS04, MASKDWORD, tx_agc);
+			odm_set_bb_reg(dm, REG_TX_AGC_A_MCS11_MCS08, MASKDWORD, tx_agc);
+			odm_set_bb_reg(dm, REG_TX_AGC_A_MCS15_MCS12, MASKDWORD, tx_agc);
+			RT_DISP(FPHY, PHY_TXPWR, ("%s: OFDM Tx-rf(A) Power = 0x%x\n", __func__, tx_agc));
 		} else if (rf_path == RF_PATH_B) {
-
-			pwr = odm_get_bb_reg(p_dm, REG_TX_AGC_B_RATE18_06, 0xFF);
-			pwr += p_rf_calibrate_info->power_index_offset[RF_PATH_B];
-			odm_set_bb_reg(p_dm, REG_TX_AGC_B_CCK_1_55_MCS32, MASKBYTE3, pwr);
-			odm_set_bb_reg(p_dm, REG_TX_AGC_B_CCK_11_A_CCK_2_11, 0xff000000, pwr);
-			RT_DISP(FPHY, PHY_TXPWR, ("odm_tx_pwr_track_set_pwr_8723d: CCK Tx-rf(B) Power = 0x%x\n", pwr));
-
-
-			pwr = odm_get_bb_reg(p_dm, REG_TX_AGC_B_RATE18_06, 0xFF);
-			pwr += (p_rf_calibrate_info->bb_swing_idx_ofdm[RF_PATH_B] - p_rf_calibrate_info->bb_swing_idx_ofdm_base[RF_PATH_B]);
+			pwr = odm_get_bb_reg(dm, REG_TX_AGC_B_RATE18_06, 0xFF);
+			pwr += cali_info->power_index_offset[RF_PATH_B];
+			odm_set_bb_reg(dm, REG_TX_AGC_B_CCK_1_55_MCS32, MASKBYTE3, pwr);
+			odm_set_bb_reg(dm, REG_TX_AGC_B_CCK_11_A_CCK_2_11, 0xff000000, pwr);
+			RT_DISP(FPHY, PHY_TXPWR, ("%s: CCK Tx-rf(B) Power = 0x%x\n", __func__, pwr));
+
+			pwr = odm_get_bb_reg(dm, REG_TX_AGC_B_RATE18_06, 0xFF);
+			pwr += (cali_info->bb_swing_idx_ofdm[RF_PATH_B] - cali_info->bb_swing_idx_ofdm_base[RF_PATH_B]);
 			tx_agc = ((pwr << 24) | (pwr << 16) | (pwr << 8) | pwr);
-			odm_set_bb_reg(p_dm, REG_TX_AGC_B_RATE18_06, MASKDWORD, tx_agc);
-			odm_set_bb_reg(p_dm, REG_TX_AGC_B_RATE54_24, MASKDWORD, tx_agc);
-			odm_set_bb_reg(p_dm, REG_TX_AGC_B_MCS03_MCS00, MASKDWORD, tx_agc);
-			odm_set_bb_reg(p_dm, REG_TX_AGC_B_MCS07_MCS04, MASKDWORD, tx_agc);
-			odm_set_bb_reg(p_dm, REG_TX_AGC_B_MCS11_MCS08, MASKDWORD, tx_agc);
-			odm_set_bb_reg(p_dm, REG_TX_AGC_B_MCS15_MCS12, MASKDWORD, tx_agc);
-			RT_DISP(FPHY, PHY_TXPWR, ("odm_tx_pwr_track_set_pwr_8723d: OFDM Tx-rf(B) Power = 0x%x\n", tx_agc));
+			odm_set_bb_reg(dm, REG_TX_AGC_B_RATE18_06, MASKDWORD, tx_agc);
+			odm_set_bb_reg(dm, REG_TX_AGC_B_RATE54_24, MASKDWORD, tx_agc);
+			odm_set_bb_reg(dm, REG_TX_AGC_B_MCS03_MCS00, MASKDWORD, tx_agc);
+			odm_set_bb_reg(dm, REG_TX_AGC_B_MCS07_MCS04, MASKDWORD, tx_agc);
+			odm_set_bb_reg(dm, REG_TX_AGC_B_MCS11_MCS08, MASKDWORD, tx_agc);
+			odm_set_bb_reg(dm, REG_TX_AGC_B_MCS15_MCS12, MASKDWORD, tx_agc);
+			RT_DISP(FPHY, PHY_TXPWR, ("%s: OFDM Tx-rf(B) Power = 0x%x\n", __func__, tx_agc));
 		}
 #endif
 
 #endif
 #if (DM_ODM_SUPPORT_TYPE & ODM_AP)
-		/*phy_rf6052_set_cck_tx_power(p_dm->priv, *(p_dm->p_channel));
-		  phy_rf6052_set_ofdm_tx_power(p_dm->priv, *(p_dm->p_channel));*/
+/*phy_rf6052_set_cck_tx_power(dm->priv, *(dm->channel));
+		  phy_rf6052_set_ofdm_tx_power(dm->priv, *(dm->channel));*/
 #endif
 
 	} else if (method == BBSWING) {
-		final_ofdm_swing_index = p_rf_calibrate_info->default_ofdm_index + p_rf_calibrate_info->absolute_ofdm_swing_idx[rf_path];
-		final_cck_swing_index = p_rf_calibrate_info->default_cck_index + p_rf_calibrate_info->absolute_ofdm_swing_idx[rf_path];
+		final_ofdm_swing_index = cali_info->default_ofdm_index + cali_info->absolute_ofdm_swing_idx[rf_path];
+		final_cck_swing_index = cali_info->default_cck_index + cali_info->absolute_ofdm_swing_idx[rf_path];
 
-		ODM_RT_TRACE(p_dm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,
-			(" p_rf_calibrate_info->default_ofdm_index=%d,  p_rf_calibrate_info->DefaultCCKIndex=%d, p_rf_calibrate_info->absolute_ofdm_swing_idx[rf_path]=%d, p_rf_calibrate_info->remnant_cck_swing_idx=%d   rf_path = %d\n",
-			p_rf_calibrate_info->default_ofdm_index, p_rf_calibrate_info->default_cck_index, p_rf_calibrate_info->absolute_ofdm_swing_idx[rf_path], p_rf_calibrate_info->remnant_cck_swing_idx, rf_path));
+		RF_DBG(dm, DBG_RF_TX_PWR_TRACK,
+		       " cali_info->default_ofdm_index=%d,  cali_info->DefaultCCKIndex=%d, cali_info->absolute_ofdm_swing_idx[rf_path]=%d, cali_info->remnant_cck_swing_idx=%d   rf_path = %d\n",
+		       cali_info->default_ofdm_index,
+		       cali_info->default_cck_index,
+		       cali_info->absolute_ofdm_swing_idx[rf_path],
+		       cali_info->remnant_cck_swing_idx, rf_path);
 
 		/* Adjust BB swing by OFDM IQ matrix */
 		if (final_ofdm_swing_index >= pwr_tracking_limit_ofdm)
@@ -389,101 +375,117 @@ if (*(p_dm->p_mp_mode) == true) {
 
 		if (final_cck_swing_index >= CCK_TABLE_SIZE_8723D)
 			final_cck_swing_index = CCK_TABLE_SIZE_8723D - 1;
-		else if (p_rf_calibrate_info->bb_swing_idx_cck < 0)
+		else if (cali_info->bb_swing_idx_cck < 0)
 			final_cck_swing_index = 0;
 
-		set_iqk_matrix_8723d(p_dm, final_ofdm_swing_index, RF_PATH_A,
-			p_rf_calibrate_info->iqk_matrix_reg_setting[channel_mapped_index].value[0][0],
-			p_rf_calibrate_info->iqk_matrix_reg_setting[channel_mapped_index].value[0][1]);
+		set_iqk_matrix_8723d(dm, final_ofdm_swing_index, RF_PATH_A,
+				     cali_info->iqk_matrix_reg_setting[channel_mapped_index].value[0][0],
+				     cali_info->iqk_matrix_reg_setting[channel_mapped_index].value[0][1]);
 
-		set_iqk_matrix_8723d(p_dm, final_ofdm_swing_index, RF_PATH_B,
-			p_rf_calibrate_info->iqk_matrix_reg_setting[channel_mapped_index].value[0][4],
-			p_rf_calibrate_info->iqk_matrix_reg_setting[channel_mapped_index].value[0][5]);
+		set_iqk_matrix_8723d(dm, final_ofdm_swing_index, RF_PATH_B,
+				     cali_info->iqk_matrix_reg_setting[channel_mapped_index].value[0][4],
+				     cali_info->iqk_matrix_reg_setting[channel_mapped_index].value[0][5]);
 
-		set_cck_filter_coefficient_8723d(p_dm, final_cck_swing_index);
+		set_cck_filter_coefficient_8723d(dm, final_cck_swing_index);
 
-		p_rf_calibrate_info->modify_tx_agc_flag_path_a = true;
+		cali_info->modify_tx_agc_flag_path_a = true;
 
-		odm_set_tx_power_index_by_rate_section(p_dm, RF_PATH_A, *p_dm->p_channel, CCK);
-		odm_set_tx_power_index_by_rate_section(p_dm, RF_PATH_A, *p_dm->p_channel, OFDM);
-		odm_set_tx_power_index_by_rate_section(p_dm, RF_PATH_A, *p_dm->p_channel, HT_MCS0_MCS7);
+		odm_set_tx_power_index_by_rate_section(dm, RF_PATH_A, *dm->channel, CCK);
+		odm_set_tx_power_index_by_rate_section(dm, RF_PATH_A, *dm->channel, OFDM);
+		odm_set_tx_power_index_by_rate_section(dm, RF_PATH_A, *dm->channel, HT_MCS0_MCS7);
 
-		ODM_RT_TRACE(p_dm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("final_cck_swing_index=%d\n", final_cck_swing_index));
+		RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "final_cck_swing_index=%d\n",
+		       final_cck_swing_index);
 
 	} else if (method == MIX_MODE) {
-#if (MP_DRIVER == 1)
-		u32	tx_agc = 0;			  /*add by Mingzhi.Guo 2015-04-10*/
-		s32	pwr = 0;
+#if (0)  /*MP_DRIVER == 1*/
+		u32 tx_agc = 0; /*add by Mingzhi.Guo 2015-04-10*/
+		s32 pwr = 0;
 #endif
-		ODM_RT_TRACE(p_dm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("p_dm->default_ofdm_index=%d,  p_dm->DefaultCCKIndex=%d, p_dm->absolute_ofdm_swing_idx[rf_path]=%d, rf_path = %d\n",
-			p_rf_calibrate_info->default_ofdm_index, p_rf_calibrate_info->default_cck_index, p_rf_calibrate_info->absolute_ofdm_swing_idx[rf_path], rf_path));
+		RF_DBG(dm, DBG_RF_TX_PWR_TRACK,
+		       "dm->default_ofdm_index=%d,  dm->DefaultCCKIndex=%d, dm->absolute_ofdm_swing_idx[rf_path]=%d, rf_path = %d\n",
+		       cali_info->default_ofdm_index,
+		       cali_info->default_cck_index,
+		       cali_info->absolute_ofdm_swing_idx[rf_path], rf_path);
 
-		final_ofdm_swing_index = p_rf_calibrate_info->default_ofdm_index + p_rf_calibrate_info->absolute_ofdm_swing_idx[rf_path];
+		final_ofdm_swing_index = cali_info->default_ofdm_index + cali_info->absolute_ofdm_swing_idx[rf_path];
 
 		if (rf_path == RF_PATH_A) {
-			final_cck_swing_index = p_rf_calibrate_info->default_cck_index + p_rf_calibrate_info->absolute_ofdm_swing_idx[rf_path];    /*CCK Follow path-A and lower CCK index means higher power.*/
+			final_cck_swing_index = cali_info->default_cck_index + cali_info->absolute_ofdm_swing_idx[rf_path]; /*CCK Follow path-A and lower CCK index means higher power.*/
 
 			if (final_ofdm_swing_index > pwr_tracking_limit_ofdm) {
-				p_rf_calibrate_info->remnant_ofdm_swing_idx[rf_path] = final_ofdm_swing_index - pwr_tracking_limit_ofdm;
+				cali_info->remnant_ofdm_swing_idx[rf_path] = final_ofdm_swing_index - pwr_tracking_limit_ofdm;
 
-				set_iqk_matrix_8723d(p_dm, pwr_tracking_limit_ofdm, RF_PATH_A,
-					p_rf_calibrate_info->iqk_matrix_reg_setting[channel_mapped_index].value[0][0],
-					p_rf_calibrate_info->iqk_matrix_reg_setting[channel_mapped_index].value[0][1]);
-				set_iqk_matrix_8723d(p_dm, pwr_tracking_limit_ofdm, RF_PATH_B,
-					p_rf_calibrate_info->iqk_matrix_reg_setting[channel_mapped_index].value[0][4],
-					p_rf_calibrate_info->iqk_matrix_reg_setting[channel_mapped_index].value[0][5]);
-
-				p_rf_calibrate_info->modify_tx_agc_flag_path_a = true;
+				set_iqk_matrix_8723d(dm, pwr_tracking_limit_ofdm, RF_PATH_A,
+						     cali_info->iqk_matrix_reg_setting[channel_mapped_index].value[0][0],
+						     cali_info->iqk_matrix_reg_setting[channel_mapped_index].value[0][1]);
+				set_iqk_matrix_8723d(dm, pwr_tracking_limit_ofdm, RF_PATH_B,
+						     cali_info->iqk_matrix_reg_setting[channel_mapped_index].value[0][4],
+						     cali_info->iqk_matrix_reg_setting[channel_mapped_index].value[0][5]);
 
+				cali_info->modify_tx_agc_flag_path_a = true;
 				/*Set tx_agc Page C{};*/
-				/*odm_set_tx_power_index_by_rate_section(p_dm, RF_PATH_A, p_hal_data->current_channel, OFDM);*/
-				/*	odm_set_tx_power_index_by_rate_section(p_dm, RF_PATH_A, p_hal_data->current_channel, HT_MCS0_MCS7);*/
+#if 0
+				/*odm_set_tx_power_index_by_rate_section(dm, RF_PATH_A, hal_data->current_channel, OFDM);*/
+				/*	odm_set_tx_power_index_by_rate_section(dm, RF_PATH_A, hal_data->current_channel, HT_MCS0_MCS7);*/
+#endif
 
-				ODM_RT_TRACE(p_dm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("******Path_A Over BBSwing Limit, pwr_tracking_limit = %d, Remnant tx_agc value = %d\n", pwr_tracking_limit_ofdm, p_rf_calibrate_info->remnant_ofdm_swing_idx[rf_path]));
+				RF_DBG(dm, DBG_RF_TX_PWR_TRACK,
+				       "******Path_A Over BBSwing Limit, pwr_tracking_limit = %d, Remnant tx_agc value = %d\n",
+				       pwr_tracking_limit_ofdm,
+				       cali_info->remnant_ofdm_swing_idx[rf_path]);
 			} else if (final_ofdm_swing_index < 0) {
-				p_rf_calibrate_info->remnant_ofdm_swing_idx[rf_path] = final_ofdm_swing_index ;
+				cali_info->remnant_ofdm_swing_idx[rf_path] = final_ofdm_swing_index;
 
-				set_iqk_matrix_8723d(p_dm, 0, RF_PATH_A,
-					p_rf_calibrate_info->iqk_matrix_reg_setting[channel_mapped_index].value[0][0],
-					p_rf_calibrate_info->iqk_matrix_reg_setting[channel_mapped_index].value[0][1]);
-				set_iqk_matrix_8723d(p_dm, 0, RF_PATH_B,
-					p_rf_calibrate_info->iqk_matrix_reg_setting[channel_mapped_index].value[0][4],
-					p_rf_calibrate_info->iqk_matrix_reg_setting[channel_mapped_index].value[0][5]);
+				set_iqk_matrix_8723d(dm, 0, RF_PATH_A,
+						     cali_info->iqk_matrix_reg_setting[channel_mapped_index].value[0][0],
+						     cali_info->iqk_matrix_reg_setting[channel_mapped_index].value[0][1]);
+				set_iqk_matrix_8723d(dm, 0, RF_PATH_B,
+						     cali_info->iqk_matrix_reg_setting[channel_mapped_index].value[0][4],
+						     cali_info->iqk_matrix_reg_setting[channel_mapped_index].value[0][5]);
 
-				p_rf_calibrate_info->modify_tx_agc_flag_path_a = true;
+				cali_info->modify_tx_agc_flag_path_a = true;
 
 				/*Set tx_agc Page C{};*/
-				/*odm_set_tx_power_index_by_rate_section(p_dm, RF_PATH_A, p_hal_data->current_channel, OFDM);*/
-				/*	odm_set_tx_power_index_by_rate_section(p_dm, RF_PATH_A, p_hal_data->current_channel, HT_MCS0_MCS7);*/
+#if 0
+				/*odm_set_tx_power_index_by_rate_section(dm, RF_PATH_A, hal_data->current_channel, OFDM);*/
+				/*	odm_set_tx_power_index_by_rate_section(dm, RF_PATH_A, hal_data->current_channel, HT_MCS0_MCS7);*/
+#endif
 
-				ODM_RT_TRACE(p_dm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("******Path_A Lower then BBSwing lower bound  0, Remnant tx_agc value = %d\n", p_rf_calibrate_info->remnant_ofdm_swing_idx[rf_path]));
+				RF_DBG(dm, DBG_RF_TX_PWR_TRACK,
+				       "******Path_A Lower then BBSwing lower bound  0, Remnant tx_agc value = %d\n",
+				       cali_info->remnant_ofdm_swing_idx[rf_path]);
 			} else {
-				set_iqk_matrix_8723d(p_dm, final_ofdm_swing_index, RF_PATH_A,
-					p_rf_calibrate_info->iqk_matrix_reg_setting[channel_mapped_index].value[0][0],
-					p_rf_calibrate_info->iqk_matrix_reg_setting[channel_mapped_index].value[0][1]);
-				set_iqk_matrix_8723d(p_dm, final_ofdm_swing_index, RF_PATH_B,
-					p_rf_calibrate_info->iqk_matrix_reg_setting[channel_mapped_index].value[0][4],
-					p_rf_calibrate_info->iqk_matrix_reg_setting[channel_mapped_index].value[0][5]);
+				set_iqk_matrix_8723d(dm, final_ofdm_swing_index, RF_PATH_A,
+						     cali_info->iqk_matrix_reg_setting[channel_mapped_index].value[0][0],
+						     cali_info->iqk_matrix_reg_setting[channel_mapped_index].value[0][1]);
+				set_iqk_matrix_8723d(dm, final_ofdm_swing_index, RF_PATH_B,
+						     cali_info->iqk_matrix_reg_setting[channel_mapped_index].value[0][4],
+						     cali_info->iqk_matrix_reg_setting[channel_mapped_index].value[0][5]);
 
-				ODM_RT_TRACE(p_dm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("******Path_A Compensate with BBSwing, final_ofdm_swing_index = %d\n", final_ofdm_swing_index));
+				RF_DBG(dm, DBG_RF_TX_PWR_TRACK,
+				       "******Path_A Compensate with BBSwing, final_ofdm_swing_index = %d\n",
+				       final_ofdm_swing_index);
 
-				if (p_rf_calibrate_info->modify_tx_agc_flag_path_a) {
-					p_rf_calibrate_info->remnant_ofdm_swing_idx[rf_path] = 0;
+				if (cali_info->modify_tx_agc_flag_path_a) {
+					cali_info->remnant_ofdm_swing_idx[rf_path] = 0;
 
 					/*Set tx_agc Page C{};*/
-					/*	odm_set_tx_power_index_by_rate_section(p_dm, RF_PATH_A, p_hal_data->current_channel, OFDM );
-						odm_set_tx_power_index_by_rate_section(p_dm, RF_PATH_A, p_hal_data->current_channel, HT_MCS0_MCS7 );
-						odm_set_tx_power_index_by_rate_section(p_dm, RF_PATH_A, p_hal_data->current_channel, HT_MCS8_MCS15 );*/
+#if 0
+					/*	odm_set_tx_power_index_by_rate_section(dm, RF_PATH_A, hal_data->current_channel, OFDM );
+						odm_set_tx_power_index_by_rate_section(dm, RF_PATH_A, hal_data->current_channel, HT_MCS0_MCS7 );
+						odm_set_tx_power_index_by_rate_section(dm, RF_PATH_A, hal_data->current_channel, HT_MCS8_MCS15 );*/
+#endif
 
-					p_rf_calibrate_info->modify_tx_agc_flag_path_a = false;
+					cali_info->modify_tx_agc_flag_path_a = false;
 
-					ODM_RT_TRACE(p_dm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("******Path_A p_dm->Modify_TxAGC_Flag = false\n"));
+					RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "******Path_A dm->Modify_TxAGC_Flag = false\n");
 				}
 			}
-#if (MP_DRIVER == 1)
-			if ((*(p_dm->p_mp_mode)) == 1) {
-				pwr = odm_get_bb_reg(p_dm, REG_TX_AGC_A_RATE18_06, 0xFF);
-				pwr += (p_rf_calibrate_info->remnant_ofdm_swing_idx[RF_PATH_A] - p_rf_calibrate_info->modify_tx_agc_value_ofdm);
+#if (0) /*MP_DRIVER == 1*/
+			if ((*dm->mp_mode) == 1) {
+				pwr = odm_get_bb_reg(dm, REG_TX_AGC_A_RATE18_06, 0xFF);
+				pwr += (cali_info->remnant_ofdm_swing_idx[RF_PATH_A] - cali_info->modify_tx_agc_value_ofdm);
 
 				if (pwr > 0x3F)
 					pwr = 0x3F;
@@ -491,138 +493,162 @@ if (*(p_dm->p_mp_mode) == true) {
 					pwr = 0;
 
 				tx_agc |= ((pwr << 24) | (pwr << 16) | (pwr << 8) | pwr);
-				odm_set_bb_reg(p_dm, REG_TX_AGC_A_RATE18_06, MASKDWORD, tx_agc);
-				odm_set_bb_reg(p_dm, REG_TX_AGC_A_RATE54_24, MASKDWORD, tx_agc);
-				odm_set_bb_reg(p_dm, REG_TX_AGC_A_MCS03_MCS00, MASKDWORD, tx_agc);
-				odm_set_bb_reg(p_dm, REG_TX_AGC_A_MCS07_MCS04, MASKDWORD, tx_agc);
-
-				ODM_RT_TRACE(p_dm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("ODM_TxPwrTrackSetPwr8188F: OFDM Tx-rf(A) Power = 0x%x\n", tx_agc));
-
-			} else
+				odm_set_bb_reg(dm, REG_TX_AGC_A_RATE18_06, MASKDWORD, tx_agc);
+				odm_set_bb_reg(dm, REG_TX_AGC_A_RATE54_24, MASKDWORD, tx_agc);
+				odm_set_bb_reg(dm, REG_TX_AGC_A_MCS03_MCS00, MASKDWORD, tx_agc);
+				odm_set_bb_reg(dm, REG_TX_AGC_A_MCS07_MCS04, MASKDWORD, tx_agc);
+
+				RF_DBG(dm, DBG_RF_TX_PWR_TRACK,
+				       "ODM_TxPwrTrackSetPwr8188F: OFDM Tx-rf(A) Power = 0x%x\n",
+				       tx_agc);
+			}
 #endif
-			{
 
-				odm_set_tx_power_index_by_rate_section(p_dm, RF_PATH_A, *p_dm->p_channel, OFDM);
-				odm_set_tx_power_index_by_rate_section(p_dm, RF_PATH_A, *p_dm->p_channel, HT_MCS0_MCS7);
-			}
-			p_rf_calibrate_info->modify_tx_agc_value_ofdm = p_rf_calibrate_info->remnant_ofdm_swing_idx[RF_PATH_A] ;
+			odm_set_tx_power_index_by_rate_section(dm, RF_PATH_A, *dm->channel, OFDM);
+			odm_set_tx_power_index_by_rate_section(dm, RF_PATH_A, *dm->channel, HT_MCS0_MCS7);
+			cali_info->modify_tx_agc_value_ofdm = cali_info->remnant_ofdm_swing_idx[RF_PATH_A];
 
 			if (final_cck_swing_index > pwr_tracking_limit_cck) {
-				p_rf_calibrate_info->remnant_cck_swing_idx = final_cck_swing_index - pwr_tracking_limit_cck;
+				cali_info->remnant_cck_swing_idx = final_cck_swing_index - pwr_tracking_limit_cck;
 
-				ODM_RT_TRACE(p_dm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("******Path_A CCK Over Limit, pwr_tracking_limit_cck = %d, p_dm->remnant_cck_swing_idx  = %d\n", pwr_tracking_limit_cck, p_rf_calibrate_info->remnant_cck_swing_idx));
+				RF_DBG(dm, DBG_RF_TX_PWR_TRACK,
+				       "******Path_A CCK Over Limit, pwr_tracking_limit_cck = %d, dm->remnant_cck_swing_idx  = %d\n",
+				       pwr_tracking_limit_cck,
+				       cali_info->remnant_cck_swing_idx);
 
 				/* Adjust BB swing by CCK filter coefficient*/
-				odm_set_bb_reg(p_dm, 0xab4, 0x000007FF, cck_swing_table_ch1_ch14_8723d[pwr_tracking_limit_cck]);
+				odm_set_bb_reg(dm, R_0xab4, 0x000007FF, cck_swing_table_ch1_ch14_8723d[pwr_tracking_limit_cck]);
 
-				p_rf_calibrate_info->modify_tx_agc_flag_path_a_cck = true;
+				cali_info->modify_tx_agc_flag_path_a_cck = true;
 
 				/*Set tx_agc Page C{};*/
-				/*	odm_set_tx_power_index_by_rate_section(p_dm, RF_PATH_A, p_hal_data->current_channel, CCK);
-					odm_set_tx_power_index_by_rate_section(p_dm, RF_PATH_B, p_hal_data->current_channel, CCK);*/
+#if 0
+				/*	odm_set_tx_power_index_by_rate_section(dm, RF_PATH_A, hal_data->current_channel, CCK);
+					odm_set_tx_power_index_by_rate_section(dm, RF_PATH_B, hal_data->current_channel, CCK);*/
+#endif
 
 			} else if (final_cck_swing_index < 0) {
-				p_rf_calibrate_info->remnant_cck_swing_idx = final_cck_swing_index;
-
-				ODM_RT_TRACE(p_dm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("******Path_A CCK Under Limit, pwr_tracking_limit_cck = %d, p_dm->remnant_cck_swing_idx  = %d\n", 0, p_rf_calibrate_info->remnant_cck_swing_idx));
+				cali_info->remnant_cck_swing_idx = final_cck_swing_index;
 
-				odm_set_bb_reg(p_dm, 0xab4, 0x000007FF, cck_swing_table_ch1_ch14_8723d[0]);
+				RF_DBG(dm, DBG_RF_TX_PWR_TRACK,
+				       "******Path_A CCK Under Limit, pwr_tracking_limit_cck = %d, dm->remnant_cck_swing_idx  = %d\n",
+				       0, cali_info->remnant_cck_swing_idx);
 
-				p_rf_calibrate_info->modify_tx_agc_flag_path_a_cck = true;
+				odm_set_bb_reg(dm, R_0xab4, 0x000007FF, cck_swing_table_ch1_ch14_8723d[0]);
 
+				cali_info->modify_tx_agc_flag_path_a_cck = true;
 
-				/*odm_set_tx_power_index_by_rate_section(p_dm, RF_PATH_A, p_hal_data->current_channel, CCK);
-				odm_set_tx_power_index_by_rate_section(p_dm, RF_PATH_B, p_hal_data->current_channel, CCK);*/
+#if 0
+				/*odm_set_tx_power_index_by_rate_section(dm, RF_PATH_A, hal_data->current_channel, CCK);
+				odm_set_tx_power_index_by_rate_section(dm, RF_PATH_B, hal_data->current_channel, CCK);*/
+#endif
 
 			} else {
-				ODM_RT_TRACE(p_dm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("******Path_A CCK Compensate with BBSwing, final_cck_swing_index = %d\n", final_cck_swing_index));
-
-				odm_set_bb_reg(p_dm, 0xab4, 0x000007FF, cck_swing_table_ch1_ch14_8723d[final_cck_swing_index]);
+				RF_DBG(dm, DBG_RF_TX_PWR_TRACK,
+				       "******Path_A CCK Compensate with BBSwing, final_cck_swing_index = %d\n",
+				       final_cck_swing_index);
 
-				/*	if (p_rf_calibrate_info->modify_tx_agc_flag_path_a_cck) {*/
-				p_rf_calibrate_info->remnant_cck_swing_idx = 0;
+				odm_set_bb_reg(dm, R_0xab4, 0x000007FF, cck_swing_table_ch1_ch14_8723d[final_cck_swing_index]);
 
+#if 0
+				/*	if (cali_info->modify_tx_agc_flag_path_a_cck) {*/
+#endif
+				cali_info->remnant_cck_swing_idx = 0;
 
-				/*odm_set_tx_power_index_by_rate_section(p_dm, RF_PATH_A, p_hal_data->current_channel, CCK );
-				odm_set_tx_power_index_by_rate_section(p_dm, RF_PATH_B, p_hal_data->current_channel, CCK );*/
+#if 0
+				/*odm_set_tx_power_index_by_rate_section(dm, RF_PATH_A, hal_data->current_channel, CCK );
+				odm_set_tx_power_index_by_rate_section(dm, RF_PATH_B, hal_data->current_channel, CCK );*/
+#endif
 
-				p_rf_calibrate_info->modify_tx_agc_flag_path_a_cck = false;
+				cali_info->modify_tx_agc_flag_path_a_cck = false;
 
-				ODM_RT_TRACE(p_dm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("******Path_A p_dm->Modify_TxAGC_Flag_CCK = false\n"));
+				RF_DBG(dm, DBG_RF_TX_PWR_TRACK,
+				       "******Path_A dm->Modify_TxAGC_Flag_CCK = false\n");
 			}
-#if (MP_DRIVER == 1)
-			if ((*(p_dm->p_mp_mode)) == 1) {
-				pwr = odm_get_bb_reg(p_dm, REG_TX_AGC_B_CCK_11_A_CCK_2_11, MASKBYTE1);
-				pwr += p_rf_calibrate_info->remnant_cck_swing_idx - p_rf_calibrate_info->modify_tx_agc_value_cck;
+#if (0) /*MP_DRIVER == 1*/
+			if ((*dm->mp_mode)) {
+				pwr = odm_get_bb_reg(dm, REG_TX_AGC_B_CCK_11_A_CCK_2_11, MASKBYTE1);
+				pwr += cali_info->remnant_cck_swing_idx - cali_info->modify_tx_agc_value_cck;
 
 				if (pwr > 0x3F)
 					pwr = 0x3F;
 				else if (pwr < 0)
 					pwr = 0;
 
-				odm_set_bb_reg(p_dm, REG_TX_AGC_A_CCK_1_MCS32, MASKBYTE1, pwr);
+				odm_set_bb_reg(dm, REG_TX_AGC_A_CCK_1_MCS32, MASKBYTE1, pwr);
 				tx_agc = (pwr << 16) | (pwr << 8) | (pwr);
-				odm_set_bb_reg(p_dm, REG_TX_AGC_B_CCK_11_A_CCK_2_11, 0xffffff00, tx_agc);
-				ODM_RT_TRACE(p_dm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("ODM_TxPwrTrackSetPwr8723D: CCK Tx-rf(A) Power = 0x%x\n", tx_agc));
+				odm_set_bb_reg(dm, REG_TX_AGC_B_CCK_11_A_CCK_2_11, 0xffffff00, tx_agc);
+				RF_DBG(dm, DBG_RF_TX_PWR_TRACK,
+				       "ODM_TxPwrTrackSetPwr8723D: CCK Tx-rf(A) Power = 0x%x\n",
+				       tx_agc);
 			} else
 #endif
 
-				odm_set_tx_power_index_by_rate_section(p_dm, RF_PATH_A, *p_dm->p_channel, CCK);
+				odm_set_tx_power_index_by_rate_section(dm, RF_PATH_A, *dm->channel, CCK);
 
-			p_rf_calibrate_info->modify_tx_agc_value_cck = p_rf_calibrate_info->remnant_cck_swing_idx;
+			cali_info->modify_tx_agc_value_cck = cali_info->remnant_cck_swing_idx;
 		}
 #if 0
 		if (rf_path == RF_PATH_B) {
 			if (final_ofdm_swing_index > pwr_tracking_limit_ofdm) {
-				p_rf_calibrate_info->remnant_ofdm_swing_idx[rf_path] = final_ofdm_swing_index - pwr_tracking_limit_ofdm;
+				cali_info->remnant_ofdm_swing_idx[rf_path] = final_ofdm_swing_index - pwr_tracking_limit_ofdm;
 
-				set_iqk_matrix_8723d(p_dm, pwr_tracking_limit_ofdm, RF_PATH_B,
-					p_rf_calibrate_info->iqk_matrix_reg_setting[channel_mapped_index].value[0][4],
-					p_rf_calibrate_info->iqk_matrix_reg_setting[channel_mapped_index].value[0][5]);
+				set_iqk_matrix_8723d(dm, pwr_tracking_limit_ofdm, RF_PATH_B,
+					cali_info->iqk_matrix_reg_setting[channel_mapped_index].value[0][4],
+					cali_info->iqk_matrix_reg_setting[channel_mapped_index].value[0][5]);
 
-				p_rf_calibrate_info->modify_tx_agc_flag_path_a = true;
+				cali_info->modify_tx_agc_flag_path_a = true;
 
 
-				/*odm_set_tx_power_index_by_rate_section(p_dm, RF_PATH_B, p_hal_data->current_channel, OFDM);
-				odm_set_tx_power_index_by_rate_section(p_dm, RF_PATH_B, p_hal_data->current_channel, HT_MCS0_MCS7);*/
+				/*odm_set_tx_power_index_by_rate_section(dm, RF_PATH_B, hal_data->current_channel, OFDM);
+				odm_set_tx_power_index_by_rate_section(dm, RF_PATH_B, hal_data->current_channel, HT_MCS0_MCS7);*/
 
-				ODM_RT_TRACE(p_dm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("******Path_B Over BBSwing Limit, pwr_tracking_limit = %d, Remnant tx_agc value = %d\n", pwr_tracking_limit_ofdm, p_rf_calibrate_info->remnant_ofdm_swing_idx[rf_path]));
+				RF_DBG(dm, DBG_RF_TX_PWR_TRACK,
+				       "******Path_B Over BBSwing Limit, pwr_tracking_limit = %d, Remnant tx_agc value = %d\n",
+				       pwr_tracking_limit_ofdm,
+				       cali_info->remnant_ofdm_swing_idx[rf_path
+				       ]);
 			} else if (final_ofdm_swing_index < 0) {
-				p_rf_calibrate_info->remnant_ofdm_swing_idx[rf_path] = final_ofdm_swing_index ;
+				cali_info->remnant_ofdm_swing_idx[rf_path] = final_ofdm_swing_index ;
 
-				set_iqk_matrix_8723d(p_dm, 0, RF_PATH_B,
-					p_rf_calibrate_info->iqk_matrix_reg_setting[channel_mapped_index].value[0][4],
-					p_rf_calibrate_info->iqk_matrix_reg_setting[channel_mapped_index].value[0][5]);
+				set_iqk_matrix_8723d(dm, 0, RF_PATH_B,
+					cali_info->iqk_matrix_reg_setting[channel_mapped_index].value[0][4],
+					cali_info->iqk_matrix_reg_setting[channel_mapped_index].value[0][5]);
 
-				p_rf_calibrate_info->modify_tx_agc_flag_path_a = true;
+				cali_info->modify_tx_agc_flag_path_a = true;
 
 
-				/*odm_set_tx_power_index_by_rate_section(p_dm, RF_PATH_B, p_hal_data->current_channel, OFDM);
-				odm_set_tx_power_index_by_rate_section(p_dm, RF_PATH_B, p_hal_data->current_channel, HT_MCS0_MCS7);*/
+				/*odm_set_tx_power_index_by_rate_section(dm, RF_PATH_B, hal_data->current_channel, OFDM);
+				odm_set_tx_power_index_by_rate_section(dm, RF_PATH_B, hal_data->current_channel, HT_MCS0_MCS7);*/
 
-				ODM_RT_TRACE(p_dm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("******Path_B Lower then BBSwing lower bound  0, Remnant tx_agc value = %d\n", p_rf_calibrate_info->remnant_ofdm_swing_idx[rf_path]));
+				RF_DBG(dm, DBG_RF_TX_PWR_TRACK,
+				       "******Path_B Lower then BBSwing lower bound  0, Remnant tx_agc value = %d\n",
+				       cali_info->remnant_ofdm_swing_idx[rf_path
+				       ]);
 			} else {
-				set_iqk_matrix_8723d(p_dm, final_ofdm_swing_index, RF_PATH_B,
-					p_rf_calibrate_info->iqk_matrix_reg_setting[channel_mapped_index].value[0][4],
-					p_rf_calibrate_info->iqk_matrix_reg_setting[channel_mapped_index].value[0][5]);
+				set_iqk_matrix_8723d(dm, final_ofdm_swing_index, RF_PATH_B,
+					cali_info->iqk_matrix_reg_setting[channel_mapped_index].value[0][4],
+					cali_info->iqk_matrix_reg_setting[channel_mapped_index].value[0][5]);
 
-				ODM_RT_TRACE(p_dm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("******Path_B Compensate with BBSwing, final_ofdm_swing_index = %d\n", final_ofdm_swing_index));
+				RF_DBG(dm, DBG_RF_TX_PWR_TRACK,
+				       "******Path_B Compensate with BBSwing, final_ofdm_swing_index = %d\n",
+				       final_ofdm_swing_index);
 
-				if (p_rf_calibrate_info->modify_tx_agc_flag_path_b) {
-					p_rf_calibrate_info->remnant_ofdm_swing_idx[rf_path] = 0;
+				if (cali_info->modify_tx_agc_flag_path_b) {
+					cali_info->remnant_ofdm_swing_idx[rf_path] = 0;
 
-					/*odm_set_tx_power_index_by_rate_section(p_dm, RF_PATH_B, p_hal_data->current_channel, OFDM);
-					odm_set_tx_power_index_by_rate_section(p_dm, RF_PATH_B, p_hal_data->current_channel, HT_MCS0_MCS7);*/
+					/*odm_set_tx_power_index_by_rate_section(dm, RF_PATH_B, hal_data->current_channel, OFDM);
+					odm_set_tx_power_index_by_rate_section(dm, RF_PATH_B, hal_data->current_channel, HT_MCS0_MCS7);*/
 
-					p_rf_calibrate_info->modify_tx_agc_flag_path_a = false;
+					cali_info->modify_tx_agc_flag_path_a = false;
 
-					ODM_RT_TRACE(p_dm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("******Path_B p_dm->Modify_TxAGC_Flag = false\n"));
+					RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "******Path_B dm->Modify_TxAGC_Flag = false\n");
 				}
 			}
 #if (MP_DRIVER == 1)
-			if ((*(p_dm->p_mp_mode)) == 1) {
-				pwr = odm_get_bb_reg(p_dm, REG_TX_AGC_A_RATE18_06, 0xFF);
-				pwr += (p_rf_calibrate_info->remnant_ofdm_swing_idx[RF_PATH_B] - p_rf_calibrate_info->modify_tx_agc_value_ofdm);
+			if ((*dm->mp_mode) == 1) {
+				pwr = odm_get_bb_reg(dm, REG_TX_AGC_A_RATE18_06, 0xFF);
+				pwr += (cali_info->remnant_ofdm_swing_idx[RF_PATH_B] - cali_info->modify_tx_agc_value_ofdm);
 
 				if (pwr > 0x3F)
 					pwr = 0x3F;
@@ -630,285 +656,287 @@ if (*(p_dm->p_mp_mode) == true) {
 					pwr = 0;
 
 				tx_agc |= ((pwr << 24) | (pwr << 16) | (pwr << 8) | pwr);
-				odm_set_bb_reg(p_dm, REG_TX_AGC_A_RATE18_06, MASKDWORD, tx_agc);
-				odm_set_bb_reg(p_dm, REG_TX_AGC_A_RATE54_24, MASKDWORD, tx_agc);
-				odm_set_bb_reg(p_dm, REG_TX_AGC_A_MCS03_MCS00, MASKDWORD, tx_agc);
-				odm_set_bb_reg(p_dm, REG_TX_AGC_A_MCS07_MCS04, MASKDWORD, tx_agc);
+				odm_set_bb_reg(dm, REG_TX_AGC_A_RATE18_06, MASKDWORD, tx_agc);
+				odm_set_bb_reg(dm, REG_TX_AGC_A_RATE54_24, MASKDWORD, tx_agc);
+				odm_set_bb_reg(dm, REG_TX_AGC_A_MCS03_MCS00, MASKDWORD, tx_agc);
+				odm_set_bb_reg(dm, REG_TX_AGC_A_MCS07_MCS04, MASKDWORD, tx_agc);
 
-				ODM_RT_TRACE(p_dm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("ODM_TxPwrTrackSetPwr8723D: OFDM Tx-rf(A) Power = 0x%x\n", tx_agc));
+				RF_DBG(dm, DBG_RF_TX_PWR_TRACK,
+				       "ODM_TxPwrTrackSetPwr8723D: OFDM Tx-rf(A) Power = 0x%x\n",
+				       tx_agc);
 
 			} else
 #endif
 			{
-
-				odm_set_tx_power_index_by_rate_section(p_dm, RF_PATH_B, *p_dm->p_channel, OFDM);
-				odm_set_tx_power_index_by_rate_section(p_dm, RF_PATH_B, *p_dm->p_channel, HT_MCS0_MCS7);
+				odm_set_tx_power_index_by_rate_section(dm, RF_PATH_B, *dm->channel, OFDM);
+				odm_set_tx_power_index_by_rate_section(dm, RF_PATH_B, *dm->channel, HT_MCS0_MCS7);
 			}
-			p_rf_calibrate_info->modify_tx_agc_value_ofdm = p_rf_calibrate_info->remnant_ofdm_swing_idx[RF_PATH_B] ;
+			cali_info->modify_tx_agc_value_ofdm = cali_info->remnant_ofdm_swing_idx[RF_PATH_B] ;
 		}
 #endif
-	} else
+	} else {
 		return;
+	}
 }
 
-void
-get_delta_swing_table_8723d(
-	void		*p_dm_void,
-	u8 **temperature_up_a,
-	u8 **temperature_down_a,
-	u8 **temperature_up_b,
-	u8 **temperature_down_b
-)
+void get_delta_swing_table_8723d(void *dm_void, u8 **temperature_up_a,
+				 u8 **temperature_down_a, u8 **temperature_up_b,
+				 u8 **temperature_down_b)
 {
-	struct PHY_DM_STRUCT	*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	struct _ADAPTER		*adapter		 = p_dm->adapter;
-	struct _hal_rf_ *p_rf = &(p_dm->rf_table);
-	struct odm_rf_calibration_structure	*p_rf_calibrate_info = &(p_dm->rf_calibrate_info);
-	u8			tx_rate			= 0xFF;
-	u8			channel		 = *p_dm->p_channel;
-
-	if (*(p_dm->p_mp_mode) == true) {
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+#if !((DM_ODM_SUPPORT_TYPE & ODM_CE) && defined(DM_ODM_CE_MAC80211))
+	struct _ADAPTER *adapter = dm->adapter;
+#endif
+	struct dm_rf_calibration_struct *cali_info = &dm->rf_calibrate_info;
+	struct _hal_rf_ *rf = &dm->rf_table;
+	u8 tx_rate = 0xFF;
+	u8 channel = *dm->channel;
+
+#if (DM_ODM_SUPPORT_TYPE == ODM_CE) && defined(DM_ODM_CE_MAC80211)
+	static u8 delta_swing_table_idx_2ga_p_8188e[] = {0, 0, 0, 0, 1, 1, 2, 2, 3, 3, 4, 4, 4,  4,  4,  4,  4,  4,  5,  5,  7,  7,  8,  8,  8,  9,  9,  9,  9,  9};
+	static u8 delta_swing_table_idx_2ga_n_8188e[] = {0, 0, 0, 2, 2, 3, 3, 4, 4, 4, 4, 5, 5,  6,  6,  7,  7,  7,  7,  8,  8,  9,  9, 10, 10, 10, 11, 11, 11, 11};
+#endif
+
+	if (*dm->mp_mode) {
 #if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_CE))
 #if (DM_ODM_SUPPORT_TYPE & ODM_WIN)
 #if (MP_DRIVER == 1)
-		PMPT_CONTEXT p_mpt_ctx = &(adapter->MptCtx);
+		PMPT_CONTEXT p_mpt_ctx = &adapter->MptCtx;
 
 		tx_rate = MptToMgntRate(p_mpt_ctx->MptRateIndex);
 #endif
 #elif (DM_ODM_SUPPORT_TYPE & ODM_CE)
 #ifdef CONFIG_MP_INCLUDED
-		PMPT_CONTEXT p_mpt_ctx = &(adapter->mppriv.mpt_ctx);
+		PMPT_CONTEXT p_mpt_ctx = &adapter->mppriv.mpt_ctx;
 
 		tx_rate = mpt_to_mgnt_rate(p_mpt_ctx->mpt_rate_index);
 #endif
 #endif
 #endif
 	} else {
-		u16	rate	 = *(p_dm->p_forced_data_rate);
+		u16 rate = *dm->forced_data_rate;
 
 		if (!rate) { /*auto rate*/
 #if (DM_ODM_SUPPORT_TYPE & ODM_WIN)
-			tx_rate = adapter->HalFunc.GetHwRateFromMRateHandler(p_dm->tx_rate);
+			tx_rate = ((PADAPTER)adapter)->HalFunc.GetHwRateFromMRateHandler(dm->tx_rate);
+#elif (DM_ODM_SUPPORT_TYPE & ODM_CE) && defined(DM_ODM_CE_MAC80211)
+			tx_rate = dm->tx_rate;
 #elif (DM_ODM_SUPPORT_TYPE & ODM_CE)
-			if (p_dm->number_linked_client != 0)
-				tx_rate = hw_rate_to_m_rate(p_dm->tx_rate);
+			if (dm->number_linked_client != 0)
+				tx_rate = hw_rate_to_m_rate(dm->tx_rate);
 			else
-				tx_rate = p_rf->p_rate_index;
+				tx_rate = rf->p_rate_index;
 #endif
-		} else   /*force rate*/
+		} else { /*force rate*/
 			tx_rate = (u8)rate;
+		}
 	}
 
-	ODM_RT_TRACE(p_dm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("Power Tracking tx_rate=0x%X\n", tx_rate));
+	RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "Power Tracking tx_rate=0x%X\n",
+	       tx_rate);
 
-	if (1 <= channel && channel <= 14) {
+	if (channel >= 1 && channel <= 14) {
+#if (DM_ODM_SUPPORT_TYPE & ODM_CE) && defined(DM_ODM_CE_MAC80211)
+		if (RX_HAL_IS_CCK_RATE(tx_rate)) {
+#else
 		if (IS_CCK_RATE(tx_rate)) {
-			*temperature_up_a   = p_rf_calibrate_info->delta_swing_table_idx_2g_cck_a_p;
-			*temperature_down_a = p_rf_calibrate_info->delta_swing_table_idx_2g_cck_a_n;
-			*temperature_up_b   = p_rf_calibrate_info->delta_swing_table_idx_2g_cck_b_p;
-			*temperature_down_b = p_rf_calibrate_info->delta_swing_table_idx_2g_cck_b_n;
+#endif
+			*temperature_up_a = cali_info->delta_swing_table_idx_2g_cck_a_p;
+			*temperature_down_a = cali_info->delta_swing_table_idx_2g_cck_a_n;
+			*temperature_up_b = cali_info->delta_swing_table_idx_2g_cck_b_p;
+			*temperature_down_b = cali_info->delta_swing_table_idx_2g_cck_b_n;
 		} else {
-			*temperature_up_a   = p_rf_calibrate_info->delta_swing_table_idx_2ga_p;
-			*temperature_down_a = p_rf_calibrate_info->delta_swing_table_idx_2ga_n;
-			*temperature_up_b   = p_rf_calibrate_info->delta_swing_table_idx_2gb_p;
-			*temperature_down_b = p_rf_calibrate_info->delta_swing_table_idx_2gb_n;
+			*temperature_up_a = cali_info->delta_swing_table_idx_2ga_p;
+			*temperature_down_a = cali_info->delta_swing_table_idx_2ga_n;
+			*temperature_up_b = cali_info->delta_swing_table_idx_2gb_p;
+			*temperature_down_b = cali_info->delta_swing_table_idx_2gb_n;
 		}
 	} else {
-		*temperature_up_a   = (u8 *)delta_swing_table_idx_2ga_p_8188e;
+		*temperature_up_a = (u8 *)delta_swing_table_idx_2ga_p_8188e;
 		*temperature_down_a = (u8 *)delta_swing_table_idx_2ga_n_8188e;
-		*temperature_up_b   = (u8 *)delta_swing_table_idx_2ga_p_8188e;
+		*temperature_up_b = (u8 *)delta_swing_table_idx_2ga_p_8188e;
 		*temperature_down_b = (u8 *)delta_swing_table_idx_2ga_n_8188e;
 	}
-
-	return;
 }
 
-void
-get_delta_swing_xtal_table_8723d(
-	void		*p_dm_void,
-	s8 **temperature_up_xtal,
-	s8 **temperature_down_xtal
-)
+void get_delta_swing_xtal_table_8723d(void *dm_void, s8 **temperature_up_xtal,
+				      s8 **temperature_down_xtal)
 {
-	struct PHY_DM_STRUCT	*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	struct odm_rf_calibration_structure	*p_rf_calibrate_info = &(p_dm->rf_calibrate_info);
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct dm_rf_calibration_struct *cali_info = &dm->rf_calibrate_info;
 
-	*temperature_up_xtal   = p_rf_calibrate_info->delta_swing_table_xtal_p;
-	*temperature_down_xtal = p_rf_calibrate_info->delta_swing_table_xtal_n;
+	*temperature_up_xtal = cali_info->delta_swing_table_xtal_p;
+	*temperature_down_xtal = cali_info->delta_swing_table_xtal_n;
 }
 
-
-
-void
-odm_txxtaltrack_set_xtal_8723d(
-	void		*p_dm_void
-)
+void odm_txxtaltrack_set_xtal_8723d(void *dm_void)
 {
-	struct PHY_DM_STRUCT		*p_dm		= (struct PHY_DM_STRUCT *)p_dm_void;
-	struct odm_rf_calibration_structure	*p_rf_calibrate_info	= &(p_dm->rf_calibrate_info);
-	struct _ADAPTER		*adapter			= p_dm->adapter;
-	HAL_DATA_TYPE	*p_hal_data		 = GET_HAL_DATA(adapter);
-
-	s8	crystal_cap;
-
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct dm_rf_calibration_struct *cali_info = &dm->rf_calibrate_info;
+	s8 crystal_cap;
 
-	crystal_cap = p_hal_data->crystal_cap & 0x3F;
-	crystal_cap = crystal_cap + p_rf_calibrate_info->xtal_offset;
+	crystal_cap = dm->dm_cfo_track.crystal_cap_default & 0x3F;
+	crystal_cap = crystal_cap + cali_info->xtal_offset;
 
 	if (crystal_cap < 0)
 		crystal_cap = 0;
 	else if (crystal_cap > 63)
 		crystal_cap = 63;
 
+	RF_DBG(dm, DBG_RF_TX_PWR_TRACK,
+	       "crystal_cap(%d)= dm->dm_cfo_track.crystal_cap_default(%d) + cali_info->xtal_offset(%d)\n",
+	       crystal_cap, dm->dm_cfo_track.crystal_cap_default, cali_info->xtal_offset);
 
-	ODM_RT_TRACE(p_dm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,
-		("crystal_cap(%d)= p_hal_data->crystal_cap(%d) + p_rf_calibrate_info->xtal_offset(%d)\n", crystal_cap, p_hal_data->crystal_cap, p_rf_calibrate_info->xtal_offset));
-
-	odm_set_bb_reg(p_dm, REG_MAC_PHY_CTRL, 0xFFF000, (crystal_cap | (crystal_cap << 6)));
-
-	ODM_RT_TRACE(p_dm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,
-		("crystal_cap(0x2c)  0x%X\n", odm_get_bb_reg(p_dm, REG_MAC_PHY_CTRL, 0xFFF000)));
+	odm_set_bb_reg(dm, REG_MAC_PHY_CTRL, 0xFFF000, (crystal_cap | (crystal_cap << 6)));
 
+	RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "crystal_cap(0x2c)  0x%X\n",
+	       odm_get_bb_reg(dm, REG_MAC_PHY_CTRL, 0xFFF000));
 }
 
-void configure_txpower_track_8723d(
-	struct _TXPWRTRACK_CFG	*p_config
-)
+void configure_txpower_track_8723d(struct txpwrtrack_cfg *config)
 {
-	p_config->swing_table_size_cck = CCK_TABLE_SIZE_8723D;
-	p_config->swing_table_size_ofdm = OFDM_TABLE_SIZE;
-	p_config->threshold_iqk = IQK_THRESHOLD;
-	p_config->average_thermal_num = AVG_THERMAL_NUM_8723D;
-	p_config->rf_path_count = MAX_PATH_NUM_8723D;
-	p_config->thermal_reg_addr = RF_T_METER_88E;
-
-	p_config->odm_tx_pwr_track_set_pwr = odm_tx_pwr_track_set_pwr_8723d;
-	p_config->do_iqk = do_iqk_8723d;
-	p_config->phy_lc_calibrate = halrf_lck_trigger;
-	p_config->get_delta_swing_table = get_delta_swing_table_8723d;
-	p_config->get_delta_swing_xtal_table = get_delta_swing_xtal_table_8723d;
-	p_config->odm_txxtaltrack_set_xtal = odm_txxtaltrack_set_xtal_8723d;
+	config->swing_table_size_cck = CCK_TABLE_SIZE_8723D;
+	config->swing_table_size_ofdm = OFDM_TABLE_SIZE;
+	config->threshold_iqk = IQK_THRESHOLD;
+	config->average_thermal_num = AVG_THERMAL_NUM_8723D;
+	config->rf_path_count = MAX_PATH_NUM_8723D;
+	config->thermal_reg_addr = RF_0x42;
+
+	config->odm_tx_pwr_track_set_pwr = odm_tx_pwr_track_set_pwr_8723d;
+	config->do_iqk = do_iqk_8723d;
+	config->phy_lc_calibrate = halrf_lck_trigger;
+	config->get_delta_swing_table = get_delta_swing_table_8723d;
+	config->get_delta_swing_xtal_table = get_delta_swing_xtal_table_8723d;
+	config->odm_txxtaltrack_set_xtal = odm_txxtaltrack_set_xtal_8723d;
 }
 
+#define MAX_TOLERANCE 5
+#define IQK_DELAY_TIME 1
 
-#define MAX_TOLERANCE		5
-#define IQK_DELAY_TIME		1
-
-u8
-phy_path_s1_iqk_8723d(
-	struct PHY_DM_STRUCT		*p_dm,
-	boolean	config_path_s0
-)
+u8 phy_path_s1_iqk_8723d(struct dm_struct *dm, boolean config_path_s0)
 {
 	u32 reg_eac, reg_e94, reg_e9c, path_sel_bb;
 	u8 result = 0x00, ktime;
 	u32 original_path, original_gnt;
-	ODM_RT_TRACE(p_dm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("[IQK]path S1 TXIQK!!\n"));
-	ODM_RT_TRACE(p_dm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("[IQK]0x67 @S1 TXIQK = 0x%x\n", odm_get_mac_reg(p_dm, 0x64, MASKBYTE3)));
+	RF_DBG(dm, DBG_RF_IQK, "[IQK]path S1 TXIQK!!\n");
+	RF_DBG(dm, DBG_RF_IQK, "[IQK]0x67 @S1 TXIQK = 0x%x\n",
+	       odm_get_mac_reg(dm, R_0x64, MASKBYTE3));
 	/*save RF path*/
-	path_sel_bb = odm_get_bb_reg(p_dm, 0x948, MASKDWORD);
-	/*ODM_RT_TRACE(p_dm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("[IQK]0x1e6@S1 TXIQK = 0x%x\n", platform_efio_read_1byte(p_adapter, 0x1e6)));*/
-	odm_set_bb_reg(p_dm, 0x948, MASKDWORD, 0x99000000);
+	path_sel_bb = odm_get_bb_reg(dm, R_0x948, MASKDWORD);
+#if 0
+	/*RF_DBG(dm,DBG_RF_IQK, "[IQK]0x1e6@S1 TXIQK = 0x%x\n", platform_efio_read_1byte(adapter, 0x1e6));*/
+#endif
+	odm_set_bb_reg(dm, R_0x948, MASKDWORD, 0x99000000);
 
 	/*IQK setting*/
 	/*leave IQK mode*/
-	odm_set_bb_reg(p_dm, REG_FPGA0_IQK, 0xffffff00, 0x000000);
-	/* --- \A7\EF\BCgTXIQK mode table ---//*/
-	odm_set_rf_reg(p_dm, RF_PATH_A, 0xef, RFREGOFFSETMASK, 0x80000);
-	odm_set_rf_reg(p_dm, RF_PATH_A, 0x33, RFREGOFFSETMASK, 0x00004);
-	odm_set_rf_reg(p_dm, RF_PATH_A, 0x3e, RFREGOFFSETMASK, 0x0005d);
-	odm_set_rf_reg(p_dm, RF_PATH_A, 0x3f, RFREGOFFSETMASK, 0xBFFE0);
+	odm_set_bb_reg(dm, R_0xe28, 0xffffff00, 0x000000);
+	/* --- \A7\EF\BCgTXIQK mode table ---*/
+	odm_set_rf_reg(dm, RF_PATH_A, RF_0xef, RFREGOFFSETMASK, 0x80000);
+	odm_set_rf_reg(dm, RF_PATH_A, RF_0x33, RFREGOFFSETMASK, 0x00004);
+	odm_set_rf_reg(dm, RF_PATH_A, RF_0x3e, RFREGOFFSETMASK, 0x0005d);
+	odm_set_rf_reg(dm, RF_PATH_A, RF_0x3f, RFREGOFFSETMASK, 0xBFFE0);
+	odm_set_rf_reg(dm, RF_PATH_A, RF_0xef, RFREGOFFSETMASK, 0x00000);
 
 	/*path-A IQK setting*/
-	odm_set_bb_reg(p_dm, REG_TX_IQK_TONE_A, MASKDWORD, 0x08008c0c);
-	odm_set_bb_reg(p_dm, REG_RX_IQK_TONE_A, MASKDWORD, 0x38008c1c);
-	odm_set_bb_reg(p_dm, REG_TX_IQK_PI_A, MASKDWORD, 0x8214019f);
-	odm_set_bb_reg(p_dm, REG_RX_IQK_PI_A, MASKDWORD, 0x28160200);
-	odm_set_bb_reg(p_dm, REG_TX_IQK, MASKDWORD, 0x01007c00);
-	odm_set_bb_reg(p_dm, REG_RX_IQK, MASKDWORD, 0x01004800);
+	odm_set_bb_reg(dm, R_0xe30, MASKDWORD, 0x08008c0c);
+	odm_set_bb_reg(dm, R_0xe34, MASKDWORD, 0x38008c1c);
+	odm_set_bb_reg(dm, R_0xe38, MASKDWORD, 0x8214019f);
+	odm_set_bb_reg(dm, R_0xe3c, MASKDWORD, 0x28160200);
+	odm_set_bb_reg(dm, R_0xe40, MASKDWORD, 0x01007c00);
+	odm_set_bb_reg(dm, R_0xe44, MASKDWORD, 0x01004800);
 
 	/*LO calibration setting*/
-	odm_set_bb_reg(p_dm, REG_IQK_AGC_RSP, MASKDWORD, 0x00462911);
+	odm_set_bb_reg(dm, R_0xe4c, MASKDWORD, 0x00462911);
 
 	/*PA, PAD setting*/
-	odm_set_rf_reg(p_dm, RF_PATH_A, 0xdf, 0x800, 0x1);
-	odm_set_rf_reg(p_dm, RF_PATH_A, 0x56, 0x600, 0x0);
-	odm_set_rf_reg(p_dm, RF_PATH_A, 0x56, 0x1E0, 0x3);
-	odm_set_rf_reg(p_dm, RF_PATH_A, 0x8d, 0x1F, 0xf);
+	odm_set_rf_reg(dm, RF_PATH_A, RF_0xdf, 0x800, 0x1);
+	odm_set_rf_reg(dm, RF_PATH_A, RF_0x56, 0x600, 0x0);
+	odm_set_rf_reg(dm, RF_PATH_A, RF_0x56, 0x1E0, 0x3);
+	odm_set_rf_reg(dm, RF_PATH_A, RF_0x8d, 0x1F, 0xf);
 
 	/*LOK setting  added for 8723D*/
-	odm_set_rf_reg(p_dm, RF_PATH_A, 0xef, 0x10, 0x1);
-	odm_set_rf_reg(p_dm, RF_PATH_A, 0x54, 0x1, 0x1);
+	odm_set_rf_reg(dm, RF_PATH_A, RF_0xef, 0x10, 0x1);
+	odm_set_rf_reg(dm, RF_PATH_A, RF_0x54, 0x1, 0x1);
 #if 1
 
-	odm_set_rf_reg(p_dm, RF_PATH_A, 0x1, RFREGOFFSETMASK, 0xe0d);
-	odm_set_rf_reg(p_dm, RF_PATH_A, 0x2, RFREGOFFSETMASK, 0x60d);
+	odm_set_rf_reg(dm, RF_PATH_A, RF_0x1, RFREGOFFSETMASK, 0xe0d);
+	odm_set_rf_reg(dm, RF_PATH_A, RF_0x2, RFREGOFFSETMASK, 0x60d);
 #endif
 
-	ODM_RT_TRACE(p_dm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("RF0x1 @S1 TXIQK = 0x%x\n", odm_get_rf_reg(p_dm, RF_PATH_A, 0x1, RFREGOFFSETMASK)));
-	ODM_RT_TRACE(p_dm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("RF0x2 @S1 TXIQK = 0x%x\n", odm_get_rf_reg(p_dm, RF_PATH_A, 0x2, RFREGOFFSETMASK)));
+	RF_DBG(dm, DBG_RF_IQK, "RF0x1 @S1 TXIQK = 0x%x\n",
+	       odm_get_rf_reg(dm, RF_PATH_A, RF_0x1, RFREGOFFSETMASK));
+	RF_DBG(dm, DBG_RF_IQK, "RF0x2 @S1 TXIQK = 0x%x\n",
+	       odm_get_rf_reg(dm, RF_PATH_A, RF_0x2, RFREGOFFSETMASK));
 
 	/*enter IQK mode*/
-	odm_set_bb_reg(p_dm, REG_FPGA0_IQK, 0xffffff00, 0x808000);
+	odm_set_bb_reg(dm, R_0xe28, 0xffffff00, 0x808000);
 
 #if 1
 	/*backup path & GNT value */
-	original_path = odm_get_mac_reg(p_dm, REG_LTECOEX_PATH_CONTROL, MASKDWORD);  /*save 0x70*/
-	odm_set_bb_reg(p_dm, REG_LTECOEX_CTRL, MASKDWORD, 0x800f0038);
+	original_path = odm_get_mac_reg(dm, REG_LTECOEX_PATH_CONTROL, MASKDWORD); /*save 0x70*/
+	odm_set_bb_reg(dm, REG_LTECOEX_CTRL, MASKDWORD, 0x800f0038);
 	ODM_delay_ms(1);
-	original_gnt = odm_get_bb_reg(p_dm, REG_LTECOEX_READ_DATA, MASKDWORD);  /*save 0x38*/
-	ODM_RT_TRACE(p_dm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("[IQK]OriginalGNT = 0x%x\n", original_gnt));
+	original_gnt = odm_get_bb_reg(dm, REG_LTECOEX_READ_DATA, MASKDWORD); /*save 0x38*/
+	RF_DBG(dm, DBG_RF_IQK, "[IQK]OriginalGNT = 0x%x\n", original_gnt);
 
 	/*set GNT_WL=1/GNT_BT=1  and path owner to WiFi for pause BT traffic*/
-	odm_set_bb_reg(p_dm, REG_LTECOEX_WRITE_DATA, MASKDWORD, 0x0000ff00);
-	odm_set_bb_reg(p_dm, REG_LTECOEX_CTRL, MASKDWORD, 0xc0020038);	/*0x38[15:8] = 0x77*/
-	odm_set_mac_reg(p_dm, REG_LTECOEX_PATH_CONTROL, BIT(26), 0x1);
+	odm_set_bb_reg(dm, REG_LTECOEX_WRITE_DATA, MASKDWORD, 0x0000ff00);
+	odm_set_bb_reg(dm, REG_LTECOEX_CTRL, MASKDWORD, 0xc0020038); /*0x38[15:8] = 0x77*/
+	odm_set_mac_reg(dm, REG_LTECOEX_PATH_CONTROL, BIT(26), 0x1);
 #endif
 
-	odm_set_bb_reg(p_dm, REG_LTECOEX_CTRL, MASKDWORD, 0x800f0054);
+	odm_set_bb_reg(dm, REG_LTECOEX_CTRL, MASKDWORD, 0x800f0054);
 	ODM_delay_ms(1);
-	ODM_RT_TRACE(p_dm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("[IQK]GNT_BT @S1 TXIQK = 0x%x\n", odm_get_bb_reg(p_dm, REG_LTECOEX_READ_DATA, MASKDWORD)));
-	ODM_RT_TRACE(p_dm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("[IQK]0x948 @S1 TXIQK = 0x%x\n", odm_get_bb_reg(p_dm, 0x948, MASKDWORD)));
+	RF_DBG(dm, DBG_RF_IQK, "[IQK]GNT_BT @S1 TXIQK = 0x%x\n",
+	       odm_get_bb_reg(dm, REG_LTECOEX_READ_DATA, MASKDWORD));
+	RF_DBG(dm, DBG_RF_IQK, "[IQK]0x948 @S1 TXIQK = 0x%x\n",
+	       odm_get_bb_reg(dm, R_0x948, MASKDWORD));
 
 	/*One shot, path S1 LOK & IQK*/
-	odm_set_bb_reg(p_dm, REG_IQK_AGC_PTS, MASKDWORD, 0xfa000000);
-	odm_set_bb_reg(p_dm, REG_IQK_AGC_PTS, MASKDWORD, 0xf8000000);
+	odm_set_bb_reg(dm, R_0xe48, MASKDWORD, 0xfa000000);
+	odm_set_bb_reg(dm, R_0xe48, MASKDWORD, 0xf8000000);
 
 	/* delay x ms */
+#if 0
 	/*ODM_delay_ms(IQK_DELAY_TIME_8723D);*/
+#endif
 
 	ktime = 0;
-	while ((!odm_get_bb_reg(p_dm, 0xeac, BIT(26))) && ktime < 10) {
+	while ((!odm_get_bb_reg(dm, R_0xeac, BIT(26))) && ktime < 10) {
 		ODM_delay_ms(1);
 		ktime++;
 	}
 
 #if 1
 	/*Restore GNT_WL/GNT_BT  and path owner*/
-	odm_set_bb_reg(p_dm, REG_LTECOEX_WRITE_DATA, MASKDWORD, original_gnt);
-	odm_set_bb_reg(p_dm, REG_LTECOEX_CTRL, MASKDWORD, 0xc00f0038);
-	odm_set_mac_reg(p_dm, REG_LTECOEX_PATH_CONTROL, 0xffffffff, original_path);
+	odm_set_bb_reg(dm, REG_LTECOEX_WRITE_DATA, MASKDWORD, original_gnt);
+	odm_set_bb_reg(dm, REG_LTECOEX_CTRL, MASKDWORD, 0xc00f0038);
+	odm_set_mac_reg(dm, REG_LTECOEX_PATH_CONTROL, 0xffffffff, original_path);
 #endif
 
 	/*reload RF path*/
-	odm_set_bb_reg(p_dm, 0x948, MASKDWORD, path_sel_bb);
+	odm_set_bb_reg(dm, R_0x948, MASKDWORD, path_sel_bb);
 
 	/*leave IQK mode*/
-	odm_set_bb_reg(p_dm, REG_FPGA0_IQK, 0xffffff00, 0x000000);
+	odm_set_bb_reg(dm, R_0xe28, 0xffffff00, 0x000000);
 	/*PA/PAD controlled by 0x0*/
-	odm_set_rf_reg(p_dm, RF_PATH_A, 0xdf, 0x800, 0x0);
-	odm_set_rf_reg(p_dm, RF_PATH_A, 0x1, BIT(0), 0x0);
-	odm_set_rf_reg(p_dm, RF_PATH_A, 0x2, BIT(0), 0x0);
+	odm_set_rf_reg(dm, RF_PATH_A, RF_0xdf, 0x800, 0x0);
+	odm_set_rf_reg(dm, RF_PATH_A, RF_0x1, BIT(0), 0x0);
+	odm_set_rf_reg(dm, RF_PATH_A, RF_0x2, BIT(0), 0x0);
 
 	/* Check failed*/
-	reg_eac = odm_get_bb_reg(p_dm, REG_RX_POWER_AFTER_IQK_A_2, MASKDWORD);
-	reg_e94 = odm_get_bb_reg(p_dm, REG_TX_POWER_BEFORE_IQK_A, MASKDWORD);
-	reg_e9c = odm_get_bb_reg(p_dm, REG_TX_POWER_AFTER_IQK_A, MASKDWORD);
-	ODM_RT_TRACE(p_dm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("[IQK]0xeac = 0x%x\n", reg_eac));
-	ODM_RT_TRACE(p_dm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("[IQK]0xe94 = 0x%x, 0xe9c = 0x%x\n", reg_e94, reg_e9c));
+	reg_eac = odm_get_bb_reg(dm, R_0xeac, MASKDWORD);
+	reg_e94 = odm_get_bb_reg(dm, R_0xe94, MASKDWORD);
+	reg_e9c = odm_get_bb_reg(dm, R_0xe9c, MASKDWORD);
+	RF_DBG(dm, DBG_RF_IQK, "[IQK]0xeac = 0x%x\n", reg_eac);
+	RF_DBG(dm, DBG_RF_IQK, "[IQK]0xe94 = 0x%x, 0xe9c = 0x%x\n", reg_e94,
+	       reg_e9c);
 	/*monitor image power before & after IQK*/
-	ODM_RT_TRACE(p_dm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("[IQK]0xe90(before IQK)= 0x%x, 0xe98(afer IQK) = 0x%x\n",
-		odm_get_bb_reg(p_dm, 0xe90, MASKDWORD), odm_get_bb_reg(p_dm, 0xe98, MASKDWORD)));
+	RF_DBG(dm, DBG_RF_IQK,
+	       "[IQK]0xe90(before IQK)= 0x%x, 0xe98(afer IQK) = 0x%x\n",
+	       odm_get_bb_reg(dm, R_0xe90, MASKDWORD),
+	       odm_get_bb_reg(dm, R_0xe98, MASKDWORD));
 
 	if (!(reg_eac & BIT(28)) &&
 	    (((reg_e94 & 0x03FF0000) >> 16) != 0x142) &&
@@ -916,433 +944,469 @@ phy_path_s1_iqk_8723d(
 
 		result |= 0x01;
 	else
-		ODM_RT_TRACE(p_dm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("S1 TXIQK FAIL\n"));
+		RF_DBG(dm, DBG_RF_IQK, "S1 TXIQK FAIL\n");
 	return result;
 }
 
-u8
-phy_path_s1_rx_iqk_8723d(
-	struct PHY_DM_STRUCT		*p_dm,
-	boolean	config_path_s0
-)
+u8 phy_path_s1_rx_iqk_8723d(struct dm_struct *dm, boolean config_path_s0)
 {
 	u32 reg_eac, reg_e94, reg_e9c, reg_ea4, u4tmp, tmp, path_sel_bb;
 	u8 result = 0x00, ktime;
 	u32 original_path, original_gnt;
 
-	path_sel_bb = odm_get_bb_reg(p_dm, 0x948, MASKDWORD);
+	path_sel_bb = odm_get_bb_reg(dm, R_0x948, MASKDWORD);
 
-	ODM_RT_TRACE(p_dm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("[IQK]path S1 RXIQK Step1!!\n"));
-	ODM_RT_TRACE(p_dm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("[IQK]0x67 @S1 RXIQK1 = 0x%x\n", odm_get_mac_reg(p_dm, 0x64, MASKBYTE3)));
-	odm_set_bb_reg(p_dm, 0x948, MASKDWORD, 0x99000000);
-	/*ODM_RT_TRACE(p_dm,ODM_COMP_INIT, ODM_DBG_LOUD, ("[IQK]0x1e6@S1 RXIQK1 = 0x%x\n", platform_efio_read_1byte(p_adapter, 0x1e6)));	*/
-	odm_set_bb_reg(p_dm, REG_FPGA0_IQK, 0xffffff00, 0x000000);
+	RF_DBG(dm, DBG_RF_IQK, "[IQK]path S1 RXIQK Step1!!\n");
+	RF_DBG(dm, DBG_RF_IQK, "[IQK]0x67 @S1 RXIQK1 = 0x%x\n",
+	       odm_get_mac_reg(dm, R_0x64, MASKBYTE3));
+	odm_set_bb_reg(dm, R_0x948, MASKDWORD, 0x99000000);
+#if 0
+	/*RF_DBG(dm,DBG_RF_INIT, "[IQK]0x1e6@S1 RXIQK1 = 0x%x\n", platform_efio_read_1byte(adapter, 0x1e6));	*/
+#endif
+	odm_set_bb_reg(dm, R_0xe28, 0xffffff00, 0x000000);
 
 	/*IQK setting*/
-	odm_set_bb_reg(p_dm, REG_TX_IQK, MASKDWORD, 0x01007c00);
-	odm_set_bb_reg(p_dm, REG_RX_IQK, MASKDWORD, 0x01004800);
+	odm_set_bb_reg(dm, R_0xe40, MASKDWORD, 0x01007c00);
+	odm_set_bb_reg(dm, R_0xe44, MASKDWORD, 0x01004800);
 
 	/*path-A IQK setting*/
-	odm_set_bb_reg(p_dm, REG_TX_IQK_TONE_A, MASKDWORD, 0x18008c1c);
-	odm_set_bb_reg(p_dm, REG_RX_IQK_TONE_A, MASKDWORD, 0x38008c1c);
-	odm_set_bb_reg(p_dm, REG_TX_IQK_TONE_B, MASKDWORD, 0x38008c1c);
-	odm_set_bb_reg(p_dm, REG_RX_IQK_TONE_B, MASKDWORD, 0x38008c1c);
+	odm_set_bb_reg(dm, R_0xe30, MASKDWORD, 0x18008c1c);
+	odm_set_bb_reg(dm, R_0xe34, MASKDWORD, 0x38008c1c);
+	odm_set_bb_reg(dm, R_0xe50, MASKDWORD, 0x38008c1c);
+	odm_set_bb_reg(dm, R_0xe54, MASKDWORD, 0x38008c1c);
 
-	odm_set_bb_reg(p_dm, REG_TX_IQK_PI_A, MASKDWORD, 0x82160000);
-	odm_set_bb_reg(p_dm, REG_RX_IQK_PI_A, MASKDWORD, 0x28160000);
+	odm_set_bb_reg(dm, R_0xe38, MASKDWORD, 0x82160000);
+	odm_set_bb_reg(dm, R_0xe3c, MASKDWORD, 0x28160000);
 
 	/*LO calibration setting*/
-	odm_set_bb_reg(p_dm, REG_IQK_AGC_RSP, MASKDWORD, 0x0046a911);
+	odm_set_bb_reg(dm, R_0xe4c, MASKDWORD, 0x0046a911);
 
 	/*modify RXIQK mode table*/
-	odm_set_rf_reg(p_dm, RF_PATH_A, 0xef, RFREGOFFSETMASK, 0x80000);
-	odm_set_rf_reg(p_dm, RF_PATH_A, 0x33, RFREGOFFSETMASK, 0x00006);
-	odm_set_rf_reg(p_dm, RF_PATH_A, 0x3e, RFREGOFFSETMASK, 0x0005f);
-	odm_set_rf_reg(p_dm, RF_PATH_A, 0x3f, RFREGOFFSETMASK, 0xa7ffb);
+	odm_set_rf_reg(dm, RF_PATH_A, RF_0xef, RFREGOFFSETMASK, 0x80000);
+	odm_set_rf_reg(dm, RF_PATH_A, RF_0x33, RFREGOFFSETMASK, 0x00006);
+	odm_set_rf_reg(dm, RF_PATH_A, RF_0x3e, RFREGOFFSETMASK, 0x0005f);
+	odm_set_rf_reg(dm, RF_PATH_A, RF_0x3f, RFREGOFFSETMASK, 0xa7ffb);
+	odm_set_rf_reg(dm, RF_PATH_A, RF_0xef, RFREGOFFSETMASK, 0x00000);
 
 	/*---------PA/PAD=0----------*/
-	odm_set_rf_reg(p_dm, RF_PATH_A, 0xdf, 0x800, 0x1);
-	odm_set_rf_reg(p_dm, RF_PATH_A, 0x56, 0x600, 0x0);
+	odm_set_rf_reg(dm, RF_PATH_A, RF_0xdf, 0x800, 0x1);
+	odm_set_rf_reg(dm, RF_PATH_A, RF_0x56, 0x600, 0x0);
 #if 1
-	odm_set_rf_reg(p_dm, RF_PATH_A, 0x1, RFREGOFFSETMASK, 0xe0d);
-	odm_set_rf_reg(p_dm, RF_PATH_A, 0x2, RFREGOFFSETMASK, 0x60d);
+	odm_set_rf_reg(dm, RF_PATH_A, RF_0x1, RFREGOFFSETMASK, 0xe0d);
+	odm_set_rf_reg(dm, RF_PATH_A, RF_0x2, RFREGOFFSETMASK, 0x60d);
 #endif
-	ODM_RT_TRACE(p_dm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("RF0x1@ path S1 RXIQK1 = 0x%x\n", odm_get_rf_reg(p_dm, RF_PATH_A, 0x1, RFREGOFFSETMASK)));
-	ODM_RT_TRACE(p_dm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("RF0x2@ path S1 RXIQK1 = 0x%x\n", odm_get_rf_reg(p_dm, RF_PATH_A, 0x2, RFREGOFFSETMASK)));
+	RF_DBG(dm, DBG_RF_IQK, "RF0x1@ path S1 RXIQK1 = 0x%x\n",
+	       odm_get_rf_reg(dm, RF_PATH_A, RF_0x1, RFREGOFFSETMASK));
+	RF_DBG(dm, DBG_RF_IQK, "RF0x2@ path S1 RXIQK1 = 0x%x\n",
+	       odm_get_rf_reg(dm, RF_PATH_A, RF_0x2, RFREGOFFSETMASK));
 
 	/*enter IQK mode*/
-	odm_set_bb_reg(p_dm, REG_FPGA0_IQK, 0xffffff00, 0x808000);
+	odm_set_bb_reg(dm, R_0xe28, 0xffffff00, 0x808000);
 #if 1
 	/*backup path & GNT value */
-	original_path = odm_get_mac_reg(p_dm, REG_LTECOEX_PATH_CONTROL, MASKDWORD);  /*save 0x70*/
-	odm_set_bb_reg(p_dm, REG_LTECOEX_CTRL, MASKDWORD, 0x800f0038);
+	original_path = odm_get_mac_reg(dm, REG_LTECOEX_PATH_CONTROL, MASKDWORD); /*save 0x70*/
+	odm_set_bb_reg(dm, REG_LTECOEX_CTRL, MASKDWORD, 0x800f0038);
 	ODM_delay_ms(1);
-	original_gnt = odm_get_bb_reg(p_dm, REG_LTECOEX_READ_DATA, MASKDWORD);  /*save 0x38*/
-	ODM_RT_TRACE(p_dm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("[IQK]OriginalGNT = 0x%x\n", original_gnt));
+	original_gnt = odm_get_bb_reg(dm, REG_LTECOEX_READ_DATA, MASKDWORD); /*save 0x38*/
+	RF_DBG(dm, DBG_RF_IQK, "[IQK]OriginalGNT = 0x%x\n", original_gnt);
 
 	/*set GNT_WL=1/GNT_BT=1  and path owner to WiFi for pause BT traffic*/
-	odm_set_bb_reg(p_dm, REG_LTECOEX_WRITE_DATA, MASKDWORD, 0x0000ff00);
-	odm_set_bb_reg(p_dm, REG_LTECOEX_CTRL, MASKDWORD, 0xc0020038);	/*0x38[15:8] = 0x77*/
-	odm_set_mac_reg(p_dm, REG_LTECOEX_PATH_CONTROL, BIT(26), 0x1);
+	odm_set_bb_reg(dm, REG_LTECOEX_WRITE_DATA, MASKDWORD, 0x0000ff00);
+	odm_set_bb_reg(dm, REG_LTECOEX_CTRL, MASKDWORD, 0xc0020038); /*0x38[15:8] = 0x77*/
+	odm_set_mac_reg(dm, REG_LTECOEX_PATH_CONTROL, BIT(26), 0x1);
 #endif
-	odm_set_bb_reg(p_dm, REG_LTECOEX_CTRL, MASKDWORD, 0x800f0054);
+	odm_set_bb_reg(dm, REG_LTECOEX_CTRL, MASKDWORD, 0x800f0054);
 	ODM_delay_ms(1);
-	ODM_RT_TRACE(p_dm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("[IQK]GNT_BT @S1 RXIQK1 = 0x%x\n", odm_get_bb_reg(p_dm, REG_LTECOEX_READ_DATA, MASKDWORD)));
-	ODM_RT_TRACE(p_dm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("[IQK]0x948 @S1 RXIQK1 = 0x%x\n", odm_get_bb_reg(p_dm, 0x948, MASKDWORD)));
+	RF_DBG(dm, DBG_RF_IQK, "[IQK]GNT_BT @S1 RXIQK1 = 0x%x\n",
+	       odm_get_bb_reg(dm, REG_LTECOEX_READ_DATA, MASKDWORD));
+	RF_DBG(dm, DBG_RF_IQK, "[IQK]0x948 @S1 RXIQK1 = 0x%x\n",
+	       odm_get_bb_reg(dm, R_0x948, MASKDWORD));
 
 	/*One shot, path S1 LOK & IQK*/
-	odm_set_bb_reg(p_dm, REG_IQK_AGC_PTS, MASKDWORD, 0xf9000000);
-	odm_set_bb_reg(p_dm, REG_IQK_AGC_PTS, MASKDWORD, 0xf8000000);
+	odm_set_bb_reg(dm, R_0xe48, MASKDWORD, 0xf9000000);
+	odm_set_bb_reg(dm, R_0xe48, MASKDWORD, 0xf8000000);
 
 	/*delay x ms*/
+#if 0
 	/*ODM_delay_ms(IQK_DELAY_TIME_8723D);*/
+#endif
 
 	ktime = 0;
-	while ((!odm_get_bb_reg(p_dm, 0xeac, BIT(26))) && ktime < 10) {
+	while ((!odm_get_bb_reg(dm, R_0xeac, BIT(26))) && ktime < 10) {
 		ODM_delay_ms(1);
 		ktime++;
 	}
-	reg_eac = odm_get_bb_reg(p_dm, REG_RX_POWER_AFTER_IQK_A_2, MASKDWORD);
-	reg_e94 = odm_get_bb_reg(p_dm, REG_TX_POWER_BEFORE_IQK_A, MASKDWORD);
-	reg_e9c = odm_get_bb_reg(p_dm, REG_TX_POWER_AFTER_IQK_A, MASKDWORD);
-	ODM_RT_TRACE(p_dm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("[IQK]0xeac = 0x%x\n", reg_eac));
-	ODM_RT_TRACE(p_dm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("[IQK]0xe94 = 0x%x, 0xe9c = 0x%x\n", reg_e94, reg_e9c));
+	reg_eac = odm_get_bb_reg(dm, R_0xeac, MASKDWORD);
+	reg_e94 = odm_get_bb_reg(dm, R_0xe94, MASKDWORD);
+	reg_e9c = odm_get_bb_reg(dm, R_0xe9c, MASKDWORD);
+	RF_DBG(dm, DBG_RF_IQK, "[IQK]0xeac = 0x%x\n", reg_eac);
+	RF_DBG(dm, DBG_RF_IQK, "[IQK]0xe94 = 0x%x, 0xe9c = 0x%x\n", reg_e94,
+	       reg_e9c);
 	/*monitor image power before & after IQK*/
-	ODM_RT_TRACE(p_dm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("[IQK]0xe90(before IQK)= 0x%x, 0xe98(afer IQK) = 0x%x\n",
-		odm_get_bb_reg(p_dm, 0xe90, MASKDWORD), odm_get_bb_reg(p_dm, 0xe98, MASKDWORD)));
+	RF_DBG(dm, DBG_RF_IQK,
+	       "[IQK]0xe90(before IQK)= 0x%x, 0xe98(afer IQK) = 0x%x\n",
+	       odm_get_bb_reg(dm, R_0xe90, MASKDWORD),
+	       odm_get_bb_reg(dm, R_0xe98, MASKDWORD));
 	tmp = (reg_e9c & 0x03FF0000) >> 16;
 	if ((tmp & 0x200) > 0)
 		tmp = 0x400 - tmp;
 
 	if (!(reg_eac & BIT(28)) &&
 	    (((reg_e94 & 0x03FF0000) >> 16) != 0x142) &&
-	    (((reg_e9c & 0x03FF0000) >> 16) != 0x42))
-
+	    (((reg_e9c & 0x03FF0000) >> 16) != 0x42)) {
 		result |= 0x01;
-	else {
-		ODM_RT_TRACE(p_dm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("S1 RXIQK STEP1 FAIL\n"));
+	} else {
+		RF_DBG(dm, DBG_RF_IQK, "S1 RXIQK STEP1 FAIL\n");
 #if 1
 		/*Restore GNT_WL/GNT_BT  and path owner*/
-		odm_set_bb_reg(p_dm, REG_LTECOEX_WRITE_DATA, MASKDWORD, original_gnt);
-		odm_set_bb_reg(p_dm, REG_LTECOEX_CTRL, MASKDWORD, 0xc00f0038);
-		odm_set_mac_reg(p_dm, REG_LTECOEX_PATH_CONTROL, 0xffffffff, original_path);
+		odm_set_bb_reg(dm, REG_LTECOEX_WRITE_DATA, MASKDWORD, original_gnt);
+		odm_set_bb_reg(dm, REG_LTECOEX_CTRL, MASKDWORD, 0xc00f0038);
+		odm_set_mac_reg(dm, REG_LTECOEX_PATH_CONTROL, 0xffffffff, original_path);
 #endif
 		/*reload RF path*/
-		odm_set_bb_reg(p_dm, 0x948, MASKDWORD, path_sel_bb);
-		odm_set_bb_reg(p_dm, REG_FPGA0_IQK, 0xffffff00, 0x000000);
-		odm_set_rf_reg(p_dm, RF_PATH_A, 0xdf, 0x800, 0x0);
-		odm_set_rf_reg(p_dm, RF_PATH_A, 0x1, BIT(0), 0x0);
-		odm_set_rf_reg(p_dm, RF_PATH_A, 0x2, BIT(0), 0x0);
+		odm_set_bb_reg(dm, R_0x948, MASKDWORD, path_sel_bb);
+		odm_set_bb_reg(dm, R_0xe28, 0xffffff00, 0x000000);
+		odm_set_rf_reg(dm, RF_PATH_A, RF_0xdf, 0x800, 0x0);
+		odm_set_rf_reg(dm, RF_PATH_A, RF_0x1, BIT(0), 0x0);
+		odm_set_rf_reg(dm, RF_PATH_A, RF_0x2, BIT(0), 0x0);
 		return result;
 	}
 
-	u4tmp = 0x80007C00 | (reg_e94 & 0x3FF0000)  | ((reg_e9c & 0x3FF0000) >> 16);
-	odm_set_bb_reg(p_dm, REG_TX_IQK, MASKDWORD, u4tmp);
-	ODM_RT_TRACE(p_dm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("[IQK]0xe40 = 0x%x u4tmp = 0x%x\n", odm_get_bb_reg(p_dm, REG_TX_IQK, MASKDWORD), u4tmp));
+	u4tmp = 0x80007C00 | (reg_e94 & 0x3FF0000) | ((reg_e9c & 0x3FF0000) >> 16);
+	odm_set_bb_reg(dm, R_0xe40, MASKDWORD, u4tmp);
+	RF_DBG(dm, DBG_RF_IQK, "[IQK]0xe40 = 0x%x u4tmp = 0x%x\n",
+	       odm_get_bb_reg(dm, R_0xe40, MASKDWORD), u4tmp);
 
-	ODM_RT_TRACE(p_dm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("[IQK]path S1 RXIQK STEP2!!\n"));
-	ODM_RT_TRACE(p_dm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("[IQK]0x67 @S1 RXIQK2 = 0x%x\n", odm_get_mac_reg(p_dm, 0x64, MASKBYTE3)));
-	/*ODM_RT_TRACE(p_dm,ODM_COMP_INIT, ODM_DBG_LOUD, ("[IQK]0x1e6@S1 RXIQK2 = 0x%x\n", platform_efio_read_1byte(p_adapter, 0x1e6)));	*/
-	odm_set_bb_reg(p_dm, REG_RX_IQK, MASKDWORD, 0x01004800);
+	RF_DBG(dm, DBG_RF_IQK, "[IQK]path S1 RXIQK STEP2!!\n");
+	RF_DBG(dm, DBG_RF_IQK, "[IQK]0x67 @S1 RXIQK2 = 0x%x\n",
+	       odm_get_mac_reg(dm, R_0x64, MASKBYTE3));
+#if 0
+	/*RF_DBG(dm,DBG_RF_INIT, "[IQK]0x1e6@S1 RXIQK2 = 0x%x\n", platform_efio_read_1byte(adapter, 0x1e6));	*/
+#endif
+	odm_set_bb_reg(dm, R_0xe44, MASKDWORD, 0x01004800);
 
-	odm_set_bb_reg(p_dm, REG_TX_IQK_TONE_A, MASKDWORD, 0x38008c1c);
-	odm_set_bb_reg(p_dm, REG_RX_IQK_TONE_A, MASKDWORD, 0x18008c1c);
-	odm_set_bb_reg(p_dm, REG_TX_IQK_TONE_B, MASKDWORD, 0x38008c1c);
-	odm_set_bb_reg(p_dm, REG_RX_IQK_TONE_B, MASKDWORD, 0x38008c1c);
+	odm_set_bb_reg(dm, R_0xe30, MASKDWORD, 0x38008c1c);
+	odm_set_bb_reg(dm, R_0xe34, MASKDWORD, 0x18008c1c);
+	odm_set_bb_reg(dm, R_0xe50, MASKDWORD, 0x38008c1c);
+	odm_set_bb_reg(dm, R_0xe54, MASKDWORD, 0x38008c1c);
 
-	odm_set_bb_reg(p_dm, REG_TX_IQK_PI_A, MASKDWORD, 0x82170000);
-	odm_set_bb_reg(p_dm, REG_RX_IQK_PI_A, MASKDWORD, 0x28171400);
+	odm_set_bb_reg(dm, R_0xe38, MASKDWORD, 0x82170000);
+	odm_set_bb_reg(dm, R_0xe3c, MASKDWORD, 0x28171400);
 
 	/*LO calibration setting*/
-	odm_set_bb_reg(p_dm, REG_IQK_AGC_RSP, MASKDWORD, 0x0046a8d1);
-
+	odm_set_bb_reg(dm, R_0xe4c, MASKDWORD, 0x0046a8d1);
 
 	/*modify RXIQK mode table*/
-	odm_set_bb_reg(p_dm, REG_FPGA0_IQK, 0xffffff00, 0x000000);
-	odm_set_rf_reg(p_dm, RF_PATH_A, RF_WE_LUT, 0x80000, 0x1);
-	odm_set_rf_reg(p_dm, RF_PATH_A, 0x33, RFREGOFFSETMASK, 0x00007);
-	odm_set_rf_reg(p_dm, RF_PATH_A, 0x3e, RFREGOFFSETMASK, 0x0005f);
-	odm_set_rf_reg(p_dm, RF_PATH_A, 0x3f, RFREGOFFSETMASK, 0xb3fdb);
-
-	ODM_RT_TRACE(p_dm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("RF0x1 @S1 RXIQK2 = 0x%x\n", odm_get_rf_reg(p_dm, RF_PATH_A, 0x1, RFREGOFFSETMASK)));
-	ODM_RT_TRACE(p_dm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("RF0x2 @S1 RXIQK2 = 0x%x\n", odm_get_rf_reg(p_dm, RF_PATH_A, 0x2, RFREGOFFSETMASK)));
+	odm_set_bb_reg(dm, R_0xe28, 0xffffff00, 0x000000);
+	odm_set_rf_reg(dm, RF_PATH_A, RF_0xef, 0x80000, 0x1);
+	odm_set_rf_reg(dm, RF_PATH_A, RF_0x33, RFREGOFFSETMASK, 0x00007);
+	odm_set_rf_reg(dm, RF_PATH_A, RF_0x3e, RFREGOFFSETMASK, 0x0005f);
+	odm_set_rf_reg(dm, RF_PATH_A, RF_0x3f, RFREGOFFSETMASK, 0xb3fdb);
+	odm_set_rf_reg(dm, RF_PATH_A, RF_0xef, RFREGOFFSETMASK, 0x00000);
+
+	RF_DBG(dm, DBG_RF_IQK, "RF0x1 @S1 RXIQK2 = 0x%x\n",
+	       odm_get_rf_reg(dm, RF_PATH_A, RF_0x1, RFREGOFFSETMASK));
+	RF_DBG(dm, DBG_RF_IQK, "RF0x2 @S1 RXIQK2 = 0x%x\n",
+	       odm_get_rf_reg(dm, RF_PATH_A, RF_0x2, RFREGOFFSETMASK));
 
 	/*enter IQK mode*/
-	odm_set_bb_reg(p_dm, REG_FPGA0_IQK, 0xffffff00, 0x808000);
+	odm_set_bb_reg(dm, R_0xe28, 0xffffff00, 0x808000);
 
 #if 1
 	/*backup path & GNT value */
-	original_path = odm_get_mac_reg(p_dm, REG_LTECOEX_PATH_CONTROL, MASKDWORD);  /*save 0x70*/
-	odm_set_bb_reg(p_dm, REG_LTECOEX_CTRL, MASKDWORD, 0x800f0038);
+	original_path = odm_get_mac_reg(dm, REG_LTECOEX_PATH_CONTROL, MASKDWORD); /*save 0x70*/
+	odm_set_bb_reg(dm, REG_LTECOEX_CTRL, MASKDWORD, 0x800f0038);
 	ODM_delay_ms(1);
-	original_gnt = odm_get_bb_reg(p_dm, REG_LTECOEX_READ_DATA, MASKDWORD);  /*save 0x38*/
-	ODM_RT_TRACE(p_dm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("[IQK]OriginalGNT = 0x%x\n", original_gnt));
+	original_gnt = odm_get_bb_reg(dm, REG_LTECOEX_READ_DATA, MASKDWORD); /*save 0x38*/
+	RF_DBG(dm, DBG_RF_IQK, "[IQK]OriginalGNT = 0x%x\n", original_gnt);
 
 	/*set GNT_WL=1/GNT_BT=1  and path owner to WiFi for pause BT traffic*/
-	odm_set_bb_reg(p_dm, REG_LTECOEX_WRITE_DATA, MASKDWORD, 0x0000ff00);
-	odm_set_bb_reg(p_dm, REG_LTECOEX_CTRL, MASKDWORD, 0xc0020038);	/*0x38[15:8] = 0x77*/
-	odm_set_mac_reg(p_dm, REG_LTECOEX_PATH_CONTROL, BIT(26), 0x1);
+	odm_set_bb_reg(dm, REG_LTECOEX_WRITE_DATA, MASKDWORD, 0x0000ff00);
+	odm_set_bb_reg(dm, REG_LTECOEX_CTRL, MASKDWORD, 0xc0020038); /*0x38[15:8] = 0x77*/
+	odm_set_mac_reg(dm, REG_LTECOEX_PATH_CONTROL, BIT(26), 0x1);
 #endif
-	odm_set_bb_reg(p_dm, REG_LTECOEX_CTRL, MASKDWORD, 0x800f0054);
+	odm_set_bb_reg(dm, REG_LTECOEX_CTRL, MASKDWORD, 0x800f0054);
 	ODM_delay_ms(1);
-	ODM_RT_TRACE(p_dm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("[IQK]GNT_BT @S1 RXIQK2 = 0x%x\n", odm_get_bb_reg(p_dm, REG_LTECOEX_READ_DATA, MASKDWORD)));
-	ODM_RT_TRACE(p_dm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("[IQK]0x948 @S1 RXIQK2 = 0x%x\n", odm_get_bb_reg(p_dm, 0x948, MASKDWORD)));
-
-	odm_set_bb_reg(p_dm, REG_IQK_AGC_PTS, MASKDWORD, 0xf9000000);
-	odm_set_bb_reg(p_dm, REG_IQK_AGC_PTS, MASKDWORD, 0xf8000000);
+	RF_DBG(dm, DBG_RF_IQK, "[IQK]GNT_BT @S1 RXIQK2 = 0x%x\n",
+	       odm_get_bb_reg(dm, REG_LTECOEX_READ_DATA, MASKDWORD));
+	RF_DBG(dm, DBG_RF_IQK, "[IQK]0x948 @S1 RXIQK2 = 0x%x\n",
+	       odm_get_bb_reg(dm, R_0x948, MASKDWORD));
 
+	odm_set_bb_reg(dm, R_0xe48, MASKDWORD, 0xf9000000);
+	odm_set_bb_reg(dm, R_0xe48, MASKDWORD, 0xf8000000);
 
 	/*ODM_delay_ms(IQK_DELAY_TIME_8723D);*/
 
 	ktime = 0;
-	while ((!odm_get_bb_reg(p_dm, 0xeac, BIT(26))) && ktime < 10) {
+	while ((!odm_get_bb_reg(dm, R_0xeac, BIT(26))) && ktime < 10) {
 		ODM_delay_ms(1);
 		ktime++;
 	}
 
 #if 1
 	/*Restore GNT_WL/GNT_BT  and path owner*/
-	odm_set_bb_reg(p_dm, REG_LTECOEX_WRITE_DATA, MASKDWORD, original_gnt);
-	odm_set_bb_reg(p_dm, REG_LTECOEX_CTRL, MASKDWORD, 0xc00f0038);
-	odm_set_mac_reg(p_dm, REG_LTECOEX_PATH_CONTROL, 0xffffffff, original_path);
+	odm_set_bb_reg(dm, REG_LTECOEX_WRITE_DATA, MASKDWORD, original_gnt);
+	odm_set_bb_reg(dm, REG_LTECOEX_CTRL, MASKDWORD, 0xc00f0038);
+	odm_set_mac_reg(dm, REG_LTECOEX_PATH_CONTROL, 0xffffffff, original_path);
 #endif
 	/*reload RF path*/
-	odm_set_bb_reg(p_dm, 0x948, MASKDWORD, path_sel_bb);
+	odm_set_bb_reg(dm, R_0x948, MASKDWORD, path_sel_bb);
 
 	/*leave IQK mode*/
-	odm_set_bb_reg(p_dm, REG_FPGA0_IQK, 0xffffff00, 0x000000);
+	odm_set_bb_reg(dm, R_0xe28, 0xffffff00, 0x000000);
 	/*	PA/PAD controlled by 0x0*/
-	odm_set_rf_reg(p_dm, RF_PATH_A, 0xdf, 0x800, 0x0);
-	odm_set_rf_reg(p_dm, RF_PATH_A, 0x1, BIT(0), 0x0);
-	odm_set_rf_reg(p_dm, RF_PATH_A, 0x2, BIT(0), 0x0);
+	odm_set_rf_reg(dm, RF_PATH_A, RF_0xdf, 0x800, 0x0);
+	odm_set_rf_reg(dm, RF_PATH_A, RF_0x1, BIT(0), 0x0);
+	odm_set_rf_reg(dm, RF_PATH_A, RF_0x2, BIT(0), 0x0);
 
-	reg_eac = odm_get_bb_reg(p_dm, REG_RX_POWER_AFTER_IQK_A_2, MASKDWORD);
-	reg_ea4 = odm_get_bb_reg(p_dm, REG_RX_POWER_BEFORE_IQK_A_2, MASKDWORD);
-	ODM_RT_TRACE(p_dm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("[IQK]0xeac = 0x%x\n", reg_eac));
-	ODM_RT_TRACE(p_dm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("[IQK]0xea4 = 0x%x, 0xeac = 0x%x\n", reg_ea4, reg_eac));
+	reg_eac = odm_get_bb_reg(dm, R_0xeac, MASKDWORD);
+	reg_ea4 = odm_get_bb_reg(dm, R_0xea4, MASKDWORD);
+	RF_DBG(dm, DBG_RF_IQK, "[IQK]0xeac = 0x%x\n", reg_eac);
+	RF_DBG(dm, DBG_RF_IQK, "[IQK]0xea4 = 0x%x, 0xeac = 0x%x\n", reg_ea4,
+	       reg_eac);
 
-	ODM_RT_TRACE(p_dm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("[IQK]0xea0(before IQK)= 0x%x, 0xea8(afer IQK) = 0x%x\n",
-		odm_get_bb_reg(p_dm, 0xea0, MASKDWORD), odm_get_bb_reg(p_dm, 0xea8, MASKDWORD)));
+	RF_DBG(dm, DBG_RF_IQK,
+	       "[IQK]0xea0(before IQK)= 0x%x, 0xea8(afer IQK) = 0x%x\n",
+	       odm_get_bb_reg(dm, R_0xea0, MASKDWORD),
+	       odm_get_bb_reg(dm, R_0xea8, MASKDWORD));
 
 	tmp = (reg_eac & 0x03FF0000) >> 16;
 	if ((tmp & 0x200) > 0)
 		tmp = 0x400 - tmp;
 
-	if (!(reg_eac & BIT(27)) &&		/*if Tx is OK, check whether Rx is OK*/
+	if (!(reg_eac & BIT(27)) && /*if Tx is OK, check whether Rx is OK*/
 	    (((reg_ea4 & 0x03FF0000) >> 16) != 0x132) &&
 	    (((reg_eac & 0x03FF0000) >> 16) != 0x36) &&
 	    (((reg_ea4 & 0x03FF0000) >> 16) < 0x11a) &&
 	    (((reg_ea4 & 0x03FF0000) >> 16) > 0xe6) &&
-	    (tmp < 0x1a))
+	    tmp < 0x1a)
 		result |= 0x02;
 	else
-		ODM_RT_TRACE(p_dm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("S1 RXIQK STEP2 FAIL\n"));
+		RF_DBG(dm, DBG_RF_IQK, "S1 RXIQK STEP2 FAIL\n");
 	return result;
 }
 
-
-u8
-phy_path_s0_iqk_8723d(
-	struct PHY_DM_STRUCT		*p_dm
-)
+u8 phy_path_s0_iqk_8723d(struct dm_struct *dm)
 {
-	u32 reg_eac, reg_e94, reg_e9c, reg_e94_s0, reg_e9c_s0, reg_ea4_s0, reg_eac_s0, tmp, path_sel_bb;
-	u8	result = 0x00, ktime;
+	u32 reg_e94_s0, reg_e9c_s0, reg_eac_s0, path_sel_bb;
+	u8 result = 0x00, ktime;
 	u32 original_path, original_gnt;
 
-	ODM_RT_TRACE(p_dm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("path S0 TXIQK!\n"));
-	ODM_RT_TRACE(p_dm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("[IQK]0x67 @S0 TXIQK = 0x%x\n", odm_get_mac_reg(p_dm, 0x64, MASKBYTE3)));
-	path_sel_bb = odm_get_bb_reg(p_dm, 0x948, MASKDWORD);
+	RF_DBG(dm, DBG_RF_IQK, "path S0 TXIQK!\n");
+	RF_DBG(dm, DBG_RF_IQK, "[IQK]0x67 @S0 TXIQK = 0x%x\n",
+	       odm_get_mac_reg(dm, R_0x64, MASKBYTE3));
+	path_sel_bb = odm_get_bb_reg(dm, R_0x948, MASKDWORD);
 
-	odm_set_bb_reg(p_dm, 0x948, MASKDWORD, 0x99000280); /*10 od 0x948 0x1 [7] ; WL:S1 to S0;BT:S0 to S1;*/
-	/*ODM_RT_TRACE(p_dm,ODM_COMP_INIT, ODM_DBG_LOUD, ("[IQK]0x1e6@S0 TXIQK = 0x%x\n", platform_efio_read_1byte(p_adapter, 0x1e6)));*/
+	odm_set_bb_reg(dm, R_0x948, MASKDWORD, 0x99000280); /*10 od 0x948 0x1 [7] ; WL:S1 to S0;BT:S0 to S1;*/
+#if 0
+	/*RF_DBG(dm,DBG_RF_INIT, "[IQK]0x1e6@S0 TXIQK = 0x%x\n", platform_efio_read_1byte(adapter, 0x1e6));*/
+#endif
 
-	odm_set_bb_reg(p_dm, REG_FPGA0_IQK, 0xffffff00, 0x000000);
+	odm_set_bb_reg(dm, R_0xe28, 0xffffff00, 0x000000);
 	/*modify TXIQK mode table*/
-	odm_set_rf_reg(p_dm, RF_PATH_A, 0xee, RFREGOFFSETMASK, 0x80000);
-	odm_set_rf_reg(p_dm, RF_PATH_A, 0x33, RFREGOFFSETMASK, 0x00004);
-	odm_set_rf_reg(p_dm, RF_PATH_A, 0x3e, RFREGOFFSETMASK, 0x0005d);
-	odm_set_rf_reg(p_dm, RF_PATH_A, 0x3f, RFREGOFFSETMASK, 0xBFFE0);
+	odm_set_rf_reg(dm, RF_PATH_A, RF_0xee, RFREGOFFSETMASK, 0x80000);
+	odm_set_rf_reg(dm, RF_PATH_A, RF_0x33, RFREGOFFSETMASK, 0x00004);
+	odm_set_rf_reg(dm, RF_PATH_A, RF_0x3e, RFREGOFFSETMASK, 0x0005d);
+	odm_set_rf_reg(dm, RF_PATH_A, RF_0x3f, RFREGOFFSETMASK, 0xBFFE0);
+	odm_set_rf_reg(dm, RF_PATH_A, RF_0xee, RFREGOFFSETMASK, 0x00000);
 
 	/*path-A IQK setting*/
-	odm_set_bb_reg(p_dm, 0xe30, MASKDWORD, 0x08008c0c);
-	odm_set_bb_reg(p_dm, 0xe34, MASKDWORD, 0x38008c1c);
-	odm_set_bb_reg(p_dm, 0xe38, MASKDWORD, 0x8214018a);
-	odm_set_bb_reg(p_dm, 0xe3c, MASKDWORD, 0x28160200);
-	odm_set_bb_reg(p_dm, REG_TX_IQK, MASKDWORD, 0x01007c00);
-	odm_set_bb_reg(p_dm, REG_RX_IQK, MASKDWORD, 0x01004800);
+	odm_set_bb_reg(dm, R_0xe30, MASKDWORD, 0x08008c0c);
+	odm_set_bb_reg(dm, R_0xe34, MASKDWORD, 0x38008c1c);
+	odm_set_bb_reg(dm, R_0xe38, MASKDWORD, 0x8214018a);
+	odm_set_bb_reg(dm, R_0xe3c, MASKDWORD, 0x28160200);
+	odm_set_bb_reg(dm, R_0xe40, MASKDWORD, 0x01007c00);
+	odm_set_bb_reg(dm, R_0xe44, MASKDWORD, 0x01004800);
 
 	/*LO calibration setting*/
-	odm_set_bb_reg(p_dm, REG_IQK_AGC_RSP, MASKDWORD, 0x00462911);
+	odm_set_bb_reg(dm, R_0xe4c, MASKDWORD, 0x00462911);
 
 	/*PA, PAD setting*/
-	odm_set_rf_reg(p_dm, RF_PATH_A, 0xde, 0x800, 0x1);
-	odm_set_rf_reg(p_dm, RF_PATH_A, 0x66, 0x600, 0x0);
-	odm_set_rf_reg(p_dm, RF_PATH_A, 0x66, 0x1E0, 0x3);
-	odm_set_rf_reg(p_dm, RF_PATH_A, 0x8d, 0x1F, 0xf);
+	odm_set_rf_reg(dm, RF_PATH_A, RF_0xde, 0x800, 0x1);
+	odm_set_rf_reg(dm, RF_PATH_A, RF_0x66, 0x600, 0x0);
+	odm_set_rf_reg(dm, RF_PATH_A, RF_0x66, 0x1E0, 0x3);
+	odm_set_rf_reg(dm, RF_PATH_A, RF_0x8d, 0x1F, 0xf);
 
 	/*LOK setting	added for 8723D*/
-	odm_set_rf_reg(p_dm, RF_PATH_A, 0xee, 0x10, 0x1);
-	odm_set_rf_reg(p_dm, RF_PATH_A, 0x64, 0x1, 0x1);
+	odm_set_rf_reg(dm, RF_PATH_A, RF_0xee, 0x10, 0x1);
+	odm_set_rf_reg(dm, RF_PATH_A, RF_0x64, 0x1, 0x1);
 
 #if 1
-	odm_set_rf_reg(p_dm, RF_PATH_A, 0x1, RFREGOFFSETMASK, 0xe6d);
-	odm_set_rf_reg(p_dm, RF_PATH_A, 0x2, RFREGOFFSETMASK, 0x66d);
+	odm_set_rf_reg(dm, RF_PATH_A, RF_0x1, RFREGOFFSETMASK, 0xe6d);
+	odm_set_rf_reg(dm, RF_PATH_A, RF_0x2, RFREGOFFSETMASK, 0x66d);
 #endif
 
-	ODM_RT_TRACE(p_dm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("RF0x1 @S0 TXIQK = 0x%x\n", odm_get_rf_reg(p_dm, RF_PATH_A, 0x1, RFREGOFFSETMASK)));
-	ODM_RT_TRACE(p_dm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("RF0x2 @S0 TXIQK = 0x%x\n", odm_get_rf_reg(p_dm, RF_PATH_A, 0x2, RFREGOFFSETMASK)));
+	RF_DBG(dm, DBG_RF_IQK, "RF0x1 @S0 TXIQK = 0x%x\n",
+	       odm_get_rf_reg(dm, RF_PATH_A, RF_0x1, RFREGOFFSETMASK));
+	RF_DBG(dm, DBG_RF_IQK, "RF0x2 @S0 TXIQK = 0x%x\n",
+	       odm_get_rf_reg(dm, RF_PATH_A, RF_0x2, RFREGOFFSETMASK));
 	/*enter IQK mode*/
-	odm_set_bb_reg(p_dm, REG_FPGA0_IQK, 0xffffff00, 0x808000);
+	odm_set_bb_reg(dm, R_0xe28, 0xffffff00, 0x808000);
 #if 1
 	/*backup path & GNT value */
-	original_path = odm_get_mac_reg(p_dm, REG_LTECOEX_PATH_CONTROL, MASKDWORD);  /*save 0x70*/
-	odm_set_bb_reg(p_dm, REG_LTECOEX_CTRL, MASKDWORD, 0x800f0038);
+	original_path = odm_get_mac_reg(dm, REG_LTECOEX_PATH_CONTROL, MASKDWORD); /*save 0x70*/
+	odm_set_bb_reg(dm, REG_LTECOEX_CTRL, MASKDWORD, 0x800f0038);
 	ODM_delay_ms(1);
-	original_gnt = odm_get_bb_reg(p_dm, REG_LTECOEX_READ_DATA, MASKDWORD);  /*save 0x38*/
-	ODM_RT_TRACE(p_dm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("[IQK]OriginalGNT = 0x%x\n", original_gnt));
+	original_gnt = odm_get_bb_reg(dm, REG_LTECOEX_READ_DATA, MASKDWORD); /*save 0x38*/
+	RF_DBG(dm, DBG_RF_IQK, "[IQK]OriginalGNT = 0x%x\n", original_gnt);
 
 	/*set GNT_WL=1/GNT_BT=1  and path owner to WiFi for pause BT traffic*/
-	odm_set_bb_reg(p_dm, REG_LTECOEX_WRITE_DATA, MASKDWORD, 0x0000ff00);
-	odm_set_bb_reg(p_dm, REG_LTECOEX_CTRL, MASKDWORD, 0xc0020038);	/*0x38[15:8] = 0x77*/
-	odm_set_mac_reg(p_dm, REG_LTECOEX_PATH_CONTROL, BIT(26), 0x1);
+	odm_set_bb_reg(dm, REG_LTECOEX_WRITE_DATA, MASKDWORD, 0x0000ff00);
+	odm_set_bb_reg(dm, REG_LTECOEX_CTRL, MASKDWORD, 0xc0020038); /*0x38[15:8] = 0x77*/
+	odm_set_mac_reg(dm, REG_LTECOEX_PATH_CONTROL, BIT(26), 0x1);
 #endif
-	odm_set_bb_reg(p_dm, REG_LTECOEX_CTRL, MASKDWORD, 0x800f0054);
+	odm_set_bb_reg(dm, REG_LTECOEX_CTRL, MASKDWORD, 0x800f0054);
 	ODM_delay_ms(1);
-	ODM_RT_TRACE(p_dm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("[IQK]GNT_BT @S0 TXIQK = 0x%x\n", odm_get_bb_reg(p_dm, REG_LTECOEX_READ_DATA, MASKDWORD)));
-	ODM_RT_TRACE(p_dm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("[IQK]0x948 @S0 TXIQK = 0x%x\n", odm_get_bb_reg(p_dm, 0x948, MASKDWORD)));
+	RF_DBG(dm, DBG_RF_IQK, "[IQK]GNT_BT @S0 TXIQK = 0x%x\n",
+	       odm_get_bb_reg(dm, REG_LTECOEX_READ_DATA, MASKDWORD));
+	RF_DBG(dm, DBG_RF_IQK, "[IQK]0x948 @S0 TXIQK = 0x%x\n",
+	       odm_get_bb_reg(dm, R_0x948, MASKDWORD));
 
 	/*One shot, path S1 LOK & IQK*/
-	odm_set_bb_reg(p_dm, REG_IQK_AGC_PTS, MASKDWORD, 0xf9000000);
-	odm_set_bb_reg(p_dm, REG_IQK_AGC_PTS, MASKDWORD, 0xf8000000);
+	odm_set_bb_reg(dm, R_0xe48, MASKDWORD, 0xf9000000);
+	odm_set_bb_reg(dm, R_0xe48, MASKDWORD, 0xf8000000);
 
 	/*delay x ms*/
+#if 0
 	/*ODM_delay_ms(IQK_DELAY_TIME_8723D);*/
+#endif
 
 	ktime = 0;
-	while ((!odm_get_bb_reg(p_dm, 0xeac, BIT(26))) && ktime < 10) {
+	while ((!odm_get_bb_reg(dm, R_0xeac, BIT(26))) && ktime < 10) {
 		ODM_delay_ms(1);
 		ktime++;
 	}
 #if 1
 	/*Restore GNT_WL/GNT_BT  and path owner*/
-	odm_set_bb_reg(p_dm, REG_LTECOEX_WRITE_DATA, MASKDWORD, original_gnt);
-	odm_set_bb_reg(p_dm, REG_LTECOEX_CTRL, MASKDWORD, 0xc00f0038);
-	odm_set_mac_reg(p_dm, REG_LTECOEX_PATH_CONTROL, 0xffffffff, original_path);
+	odm_set_bb_reg(dm, REG_LTECOEX_WRITE_DATA, MASKDWORD, original_gnt);
+	odm_set_bb_reg(dm, REG_LTECOEX_CTRL, MASKDWORD, 0xc00f0038);
+	odm_set_mac_reg(dm, REG_LTECOEX_PATH_CONTROL, 0xffffffff, original_path);
 #endif
 	/*reload RF path*/
-	odm_set_bb_reg(p_dm, 0x948, MASKDWORD, path_sel_bb);
+	odm_set_bb_reg(dm, R_0x948, MASKDWORD, path_sel_bb);
 	/*leave IQK mode*/
-	odm_set_bb_reg(p_dm, REG_FPGA0_IQK, 0xffffff00, 0x000000);
+	odm_set_bb_reg(dm, R_0xe28, 0xffffff00, 0x000000);
 	/*PA/PAD controlled by 0x0*/
-	odm_set_rf_reg(p_dm, RF_PATH_A, 0xde, 0x800, 0x0);
-	odm_set_rf_reg(p_dm, RF_PATH_A, 0x2, BIT(0), 0x0);
-	odm_set_rf_reg(p_dm, RF_PATH_A, 0x1, BIT(0), 0x0);
+	odm_set_rf_reg(dm, RF_PATH_A, RF_0xde, 0x800, 0x0);
+	odm_set_rf_reg(dm, RF_PATH_A, RF_0x2, BIT(0), 0x0);
+	odm_set_rf_reg(dm, RF_PATH_A, RF_0x1, BIT(0), 0x0);
 	/* Check failed*/
-	reg_eac_s0 = odm_get_bb_reg(p_dm, REG_RX_POWER_AFTER_IQK_A_2, MASKDWORD);
-	reg_e94_s0 = odm_get_bb_reg(p_dm, REG_TX_POWER_BEFORE_IQK_A, MASKDWORD);
-	reg_e9c_s0 = odm_get_bb_reg(p_dm, REG_TX_POWER_AFTER_IQK_A, MASKDWORD);
-	ODM_RT_TRACE(p_dm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("[IQK]0xeac_s0 = 0x%x\n", reg_eac_s0));
-	ODM_RT_TRACE(p_dm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("[IQK]0xe94_s0 = 0x%x, 0xe9c_s0 = 0x%x\n", reg_e94_s0, reg_e9c_s0));
+	reg_eac_s0 = odm_get_bb_reg(dm, R_0xeac, MASKDWORD);
+	reg_e94_s0 = odm_get_bb_reg(dm, R_0xe94, MASKDWORD);
+	reg_e9c_s0 = odm_get_bb_reg(dm, R_0xe9c, MASKDWORD);
+	RF_DBG(dm, DBG_RF_IQK, "[IQK]0xeac_s0 = 0x%x\n", reg_eac_s0);
+	RF_DBG(dm, DBG_RF_IQK, "[IQK]0xe94_s0 = 0x%x, 0xe9c_s0 = 0x%x\n",
+	       reg_e94_s0, reg_e9c_s0);
 	/*monitor image power before & after IQK*/
-	ODM_RT_TRACE(p_dm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("[IQK]0xe90_s0(before IQK)= 0x%x, 0xe98_s0(afer IQK) = 0x%x\n",
-		odm_get_bb_reg(p_dm, 0xe90, MASKDWORD), odm_get_bb_reg(p_dm, 0xe98, MASKDWORD)));
+	RF_DBG(dm, DBG_RF_IQK,
+	       "[IQK]0xe90_s0(before IQK)= 0x%x, 0xe98_s0(afer IQK) = 0x%x\n",
+	       odm_get_bb_reg(dm, R_0xe90, MASKDWORD),
+	       odm_get_bb_reg(dm, R_0xe98, MASKDWORD));
 	if (!(reg_eac_s0 & BIT(28)) &&
 	    (((reg_e94_s0 & 0x03FF0000) >> 16) != 0x142) &&
 	    (((reg_e9c_s0 & 0x03FF0000) >> 16) != 0x42))
 
 		result |= 0x01;
 	else
-		ODM_RT_TRACE(p_dm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("S0 TXIQK FAIL\n"));
+		RF_DBG(dm, DBG_RF_IQK, "S0 TXIQK FAIL\n");
 
 	return result;
 }
 
-
-u8
-phy_path_s0_rx_iqk_8723d(
-	struct PHY_DM_STRUCT		*p_dm,
-	boolean	config_path_s0
-)
+u8 phy_path_s0_rx_iqk_8723d(struct dm_struct *dm, boolean config_path_s0)
 {
-	u32 reg_e94, reg_e9c, reg_ea4, reg_eac, reg_e94_s0, reg_e9c_s0, reg_ea4_s0, reg_eac_s0, tmp, u4tmp, path_sel_bb;
+	u32 reg_e94_s0, reg_e9c_s0, reg_ea4_s0, reg_eac_s0, tmp, u4tmp;
+	u32 path_sel_bb;
 	u8 result = 0x00, ktime;
 	u32 original_path, original_gnt;
 
-	path_sel_bb = odm_get_bb_reg(p_dm, 0x948, MASKDWORD);
-	ODM_RT_TRACE(p_dm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("path S0 RxIQK Step1!!\n"));
-	ODM_RT_TRACE(p_dm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("[IQK]0x67 @S0 RXIQK1 = 0x%x\n", odm_get_mac_reg(p_dm, 0x64, MASKBYTE3)));
-	odm_set_bb_reg(p_dm, 0x948, MASKDWORD, 0x99000280);
-	/*ODM_RT_TRACE(p_dm,ODM_COMP_INIT, ODM_DBG_LOUD, ("[IQK]0x1e6@S0 RXIQK1 = 0x%x\n", platform_efio_read_1byte(p_adapter, 0x1e6)));*/
+	path_sel_bb = odm_get_bb_reg(dm, R_0x948, MASKDWORD);
+	RF_DBG(dm, DBG_RF_IQK, "path S0 RxIQK Step1!!\n");
+	RF_DBG(dm, DBG_RF_IQK, "[IQK]0x67 @S0 RXIQK1 = 0x%x\n",
+	       odm_get_mac_reg(dm, R_0x64, MASKBYTE3));
+	odm_set_bb_reg(dm, R_0x948, MASKDWORD, 0x99000280);
+#if 0
+	/*RF_DBG(dm,DBG_RF_INIT, "[IQK]0x1e6@S0 RXIQK1 = 0x%x\n", platform_efio_read_1byte(adapter, 0x1e6));*/
+#endif
 
-	odm_set_bb_reg(p_dm, REG_FPGA0_IQK, 0xffffff00, 0x000000);
+	odm_set_bb_reg(dm, R_0xe28, 0xffffff00, 0x000000);
 
-	odm_set_bb_reg(p_dm, REG_TX_IQK, MASKDWORD, 0x01007c00);
-	odm_set_bb_reg(p_dm, REG_RX_IQK, MASKDWORD, 0x01004800);
+	odm_set_bb_reg(dm, R_0xe40, MASKDWORD, 0x01007c00);
+	odm_set_bb_reg(dm, R_0xe44, MASKDWORD, 0x01004800);
 
-	odm_set_bb_reg(p_dm, REG_TX_IQK_TONE_A, MASKDWORD, 0x18008c1c);
-	odm_set_bb_reg(p_dm, REG_RX_IQK_TONE_A, MASKDWORD, 0x38008c1c);
-	odm_set_bb_reg(p_dm, REG_TX_IQK_TONE_B, MASKDWORD, 0x38008c1c);
-	odm_set_bb_reg(p_dm, REG_RX_IQK_TONE_B, MASKDWORD, 0x38008c1c);
+	odm_set_bb_reg(dm, R_0xe30, MASKDWORD, 0x18008c1c);
+	odm_set_bb_reg(dm, R_0xe34, MASKDWORD, 0x38008c1c);
+	odm_set_bb_reg(dm, R_0xe50, MASKDWORD, 0x38008c1c);
+	odm_set_bb_reg(dm, R_0xe54, MASKDWORD, 0x38008c1c);
 
-	odm_set_bb_reg(p_dm, REG_TX_IQK_PI_A, MASKDWORD, 0x82160000);
-	odm_set_bb_reg(p_dm, REG_RX_IQK_PI_A, MASKDWORD, 0x28160000);
+	odm_set_bb_reg(dm, R_0xe38, MASKDWORD, 0x82160000);
+	odm_set_bb_reg(dm, R_0xe3c, MASKDWORD, 0x28160000);
 
-	odm_set_bb_reg(p_dm, REG_IQK_AGC_RSP, MASKDWORD, 0x0046a911);
+	odm_set_bb_reg(dm, R_0xe4c, MASKDWORD, 0x0046a911);
 
-	odm_set_rf_reg(p_dm, RF_PATH_A, 0xee, RFREGOFFSETMASK, 0x80000);
-	odm_set_rf_reg(p_dm, RF_PATH_A, 0x33, RFREGOFFSETMASK, 0x00006);
-	odm_set_rf_reg(p_dm, RF_PATH_A, 0x3e, RFREGOFFSETMASK, 0x0005f);
-	odm_set_rf_reg(p_dm, RF_PATH_A, 0x3f, RFREGOFFSETMASK, 0xa7ffb);
+	odm_set_rf_reg(dm, RF_PATH_A, RF_0xee, RFREGOFFSETMASK, 0x80000);
+	odm_set_rf_reg(dm, RF_PATH_A, RF_0x33, RFREGOFFSETMASK, 0x00006);
+	odm_set_rf_reg(dm, RF_PATH_A, RF_0x3e, RFREGOFFSETMASK, 0x0005f);
+	odm_set_rf_reg(dm, RF_PATH_A, RF_0x3f, RFREGOFFSETMASK, 0xa7ffb);
+	odm_set_rf_reg(dm, RF_PATH_A, RF_0xee, RFREGOFFSETMASK, 0x00000);
 
-	odm_set_rf_reg(p_dm, RF_PATH_A, 0xde, 0x800, 0x1);
-	odm_set_rf_reg(p_dm, RF_PATH_A, 0x66, 0x600, 0x0);
+	odm_set_rf_reg(dm, RF_PATH_A, RF_0xde, 0x800, 0x1);
+	odm_set_rf_reg(dm, RF_PATH_A, RF_0x66, 0x600, 0x0);
 
 #if 1
-	odm_set_rf_reg(p_dm, RF_PATH_A, 0x1, RFREGOFFSETMASK, 0xe6d);
-	odm_set_rf_reg(p_dm, RF_PATH_A, 0x2, RFREGOFFSETMASK, 0x66d);
+	odm_set_rf_reg(dm, RF_PATH_A, RF_0x1, RFREGOFFSETMASK, 0xe6d);
+	odm_set_rf_reg(dm, RF_PATH_A, RF_0x2, RFREGOFFSETMASK, 0x66d);
 #endif
 
-	ODM_RT_TRACE(p_dm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("RF0x1 @S0 RXIQK1 = 0x%x\n", odm_get_rf_reg(p_dm, RF_PATH_A, 0x1, RFREGOFFSETMASK)));
-	ODM_RT_TRACE(p_dm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("RF0x2 @S0 RXIQK1 = 0x%x\n", odm_get_rf_reg(p_dm, RF_PATH_A, 0x2, RFREGOFFSETMASK)));
+	RF_DBG(dm, DBG_RF_IQK, "RF0x1 @S0 RXIQK1 = 0x%x\n",
+	       odm_get_rf_reg(dm, RF_PATH_A, RF_0x1, RFREGOFFSETMASK));
+	RF_DBG(dm, DBG_RF_IQK, "RF0x2 @S0 RXIQK1 = 0x%x\n",
+	       odm_get_rf_reg(dm, RF_PATH_A, RF_0x2, RFREGOFFSETMASK));
 
-	odm_set_bb_reg(p_dm, REG_FPGA0_IQK, 0xffffff00, 0x808000);
+	odm_set_bb_reg(dm, R_0xe28, 0xffffff00, 0x808000);
 
 #if 1
 	/*backup path & GNT value */
-	original_path = odm_get_mac_reg(p_dm, REG_LTECOEX_PATH_CONTROL, MASKDWORD);  /*save 0x70*/
-	odm_set_bb_reg(p_dm, REG_LTECOEX_CTRL, MASKDWORD, 0x800f0038);
+	original_path = odm_get_mac_reg(dm, REG_LTECOEX_PATH_CONTROL, MASKDWORD); /*save 0x70*/
+	odm_set_bb_reg(dm, REG_LTECOEX_CTRL, MASKDWORD, 0x800f0038);
 	ODM_delay_ms(1);
-	original_gnt = odm_get_bb_reg(p_dm, REG_LTECOEX_READ_DATA, MASKDWORD);  /*save 0x38*/
-	ODM_RT_TRACE(p_dm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("[IQK]OriginalGNT = 0x%x\n", original_gnt));
+	original_gnt = odm_get_bb_reg(dm, REG_LTECOEX_READ_DATA, MASKDWORD); /*save 0x38*/
+	RF_DBG(dm, DBG_RF_IQK, "[IQK]OriginalGNT = 0x%x\n", original_gnt);
 
 	/*set GNT_WL=1/GNT_BT=1  and path owner to WiFi for pause BT traffic*/
-	odm_set_bb_reg(p_dm, REG_LTECOEX_WRITE_DATA, MASKDWORD, 0x0000ff00);
-	odm_set_bb_reg(p_dm, REG_LTECOEX_CTRL, MASKDWORD, 0xc0020038);	/*0x38[15:8] = 0x77*/
-	odm_set_mac_reg(p_dm, REG_LTECOEX_PATH_CONTROL, BIT(26), 0x1);
+	odm_set_bb_reg(dm, REG_LTECOEX_WRITE_DATA, MASKDWORD, 0x0000ff00);
+	odm_set_bb_reg(dm, REG_LTECOEX_CTRL, MASKDWORD, 0xc0020038); /*0x38[15:8] = 0x77*/
+	odm_set_mac_reg(dm, REG_LTECOEX_PATH_CONTROL, BIT(26), 0x1);
 #endif
-	odm_set_bb_reg(p_dm, REG_LTECOEX_CTRL, MASKDWORD, 0x800f0054);
+	odm_set_bb_reg(dm, REG_LTECOEX_CTRL, MASKDWORD, 0x800f0054);
 	ODM_delay_ms(1);
-	ODM_RT_TRACE(p_dm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("[IQK]GNT_BT @S0 RXIQK1 = 0x%x\n", odm_get_bb_reg(p_dm, REG_LTECOEX_READ_DATA, MASKDWORD)));
-	ODM_RT_TRACE(p_dm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("[IQK]0x948 @S0 RXIQK1 = 0x%x\n", odm_get_bb_reg(p_dm, 0x948, MASKDWORD)));
+	RF_DBG(dm, DBG_RF_IQK, "[IQK]GNT_BT @S0 RXIQK1 = 0x%x\n",
+	       odm_get_bb_reg(dm, REG_LTECOEX_READ_DATA, MASKDWORD));
+	RF_DBG(dm, DBG_RF_IQK, "[IQK]0x948 @S0 RXIQK1 = 0x%x\n",
+	       odm_get_bb_reg(dm, R_0x948, MASKDWORD));
 
-	odm_set_bb_reg(p_dm, REG_IQK_AGC_PTS, MASKDWORD, 0xf9000000);
-	odm_set_bb_reg(p_dm, REG_IQK_AGC_PTS, MASKDWORD, 0xf8000000);
+	odm_set_bb_reg(dm, R_0xe48, MASKDWORD, 0xf9000000);
+	odm_set_bb_reg(dm, R_0xe48, MASKDWORD, 0xf8000000);
 
+#if 0
 	/*ODM_delay_ms(IQK_DELAY_TIME_8723D);*/
+#endif
 	ktime = 0;
-	while ((!odm_get_bb_reg(p_dm, 0xeac, BIT(26))) && ktime < 10) {
+	while ((!odm_get_bb_reg(dm, R_0xeac, BIT(26))) && ktime < 10) {
 		ODM_delay_ms(1);
 		ktime++;
 	}
-	reg_eac_s0 = odm_get_bb_reg(p_dm, REG_RX_POWER_AFTER_IQK_A_2, MASKDWORD);
-	reg_e94_s0 = odm_get_bb_reg(p_dm, REG_TX_POWER_BEFORE_IQK_A, MASKDWORD);
-	reg_e9c_s0 = odm_get_bb_reg(p_dm, REG_TX_POWER_AFTER_IQK_A, MASKDWORD);
-	ODM_RT_TRACE(p_dm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("[IQK]0xeac_s0 = 0x%x\n", reg_eac_s0));
-	ODM_RT_TRACE(p_dm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("[IQK]0xe94_s0 = 0x%x, 0xe9c_s0 = 0x%x\n", reg_e94_s0, reg_e9c_s0));
+	reg_eac_s0 = odm_get_bb_reg(dm, R_0xeac, MASKDWORD);
+	reg_e94_s0 = odm_get_bb_reg(dm, R_0xe94, MASKDWORD);
+	reg_e9c_s0 = odm_get_bb_reg(dm, R_0xe9c, MASKDWORD);
+	RF_DBG(dm, DBG_RF_IQK, "[IQK]0xeac_s0 = 0x%x\n", reg_eac_s0);
+	RF_DBG(dm, DBG_RF_IQK, "[IQK]0xe94_s0 = 0x%x, 0xe9c_s0 = 0x%x\n",
+	       reg_e94_s0, reg_e9c_s0);
 	/*monitor image power before & after IQK*/
-	ODM_RT_TRACE(p_dm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("[IQK]0xe90_s0(before IQK)= 0x%x, 0xe98_s0(afer IQK) = 0x%x\n",
-		odm_get_bb_reg(p_dm, 0xe90, MASKDWORD), odm_get_bb_reg(p_dm, 0xe98, MASKDWORD)));
+	RF_DBG(dm, DBG_RF_IQK,
+	       "[IQK]0xe90_s0(before IQK)= 0x%x, 0xe98_s0(afer IQK) = 0x%x\n",
+	       odm_get_bb_reg(dm, R_0xe90, MASKDWORD),
+	       odm_get_bb_reg(dm, R_0xe98, MASKDWORD));
 
 	tmp = (reg_e9c_s0 & 0x03FF0000) >> 16;
 	if ((tmp & 0x200) > 0)
@@ -1350,165 +1414,175 @@ phy_path_s0_rx_iqk_8723d(
 
 	if (!(reg_eac_s0 & BIT(28)) &&
 	    (((reg_e94_s0 & 0x03FF0000) >> 16) != 0x142) &&
-	    (((reg_e9c_s0 & 0x03FF0000) >> 16) != 0x42))
-
+	    (((reg_e9c_s0 & 0x03FF0000) >> 16) != 0x42)) {
 		result |= 0x01;
-	else {
-		ODM_RT_TRACE(p_dm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("S0 RXIQK STEP1 FAIL\n"));
+	} else {
+		RF_DBG(dm, DBG_RF_IQK, "S0 RXIQK STEP1 FAIL\n");
 #if 1
 		/*Restore GNT_WL/GNT_BT  and path owner*/
-		odm_set_bb_reg(p_dm, REG_LTECOEX_WRITE_DATA, MASKDWORD, original_gnt);
-		odm_set_bb_reg(p_dm, REG_LTECOEX_CTRL, MASKDWORD, 0xc00f0038);
-		odm_set_mac_reg(p_dm, REG_LTECOEX_PATH_CONTROL, 0xffffffff, original_path);
+		odm_set_bb_reg(dm, REG_LTECOEX_WRITE_DATA, MASKDWORD, original_gnt);
+		odm_set_bb_reg(dm, REG_LTECOEX_CTRL, MASKDWORD, 0xc00f0038);
+		odm_set_mac_reg(dm, REG_LTECOEX_PATH_CONTROL, 0xffffffff, original_path);
 #endif
 		/*reload RF path*/
-		odm_set_bb_reg(p_dm, 0x948, MASKDWORD, path_sel_bb);
-		odm_set_bb_reg(p_dm, REG_FPGA0_IQK, 0xffffff00, 0x000000);
-		odm_set_rf_reg(p_dm, RF_PATH_A, 0xde, 0x800, 0x0);
-		odm_set_rf_reg(p_dm, RF_PATH_A, 0x2, BIT(0), 0x0);
-		odm_set_rf_reg(p_dm, RF_PATH_A, 0x1, BIT(0), 0x0);
+		odm_set_bb_reg(dm, R_0x948, MASKDWORD, path_sel_bb);
+		odm_set_bb_reg(dm, R_0xe28, 0xffffff00, 0x000000);
+		odm_set_rf_reg(dm, RF_PATH_A, RF_0xde, 0x800, 0x0);
+		odm_set_rf_reg(dm, RF_PATH_A, RF_0x2, BIT(0), 0x0);
+		odm_set_rf_reg(dm, RF_PATH_A, RF_0x1, BIT(0), 0x0);
 		return result;
 	}
 
-	u4tmp = 0x80007C00 | (reg_e94_s0 & 0x3FF0000)  | ((reg_e9c_s0 & 0x3FF0000) >> 16);
-	odm_set_bb_reg(p_dm, REG_TX_IQK, MASKDWORD, u4tmp);
-	ODM_RT_TRACE(p_dm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("[IQK]0xe40_s0 = 0x%x u4tmp = 0x%x\n", odm_get_bb_reg(p_dm, REG_TX_IQK, MASKDWORD), u4tmp));
+	u4tmp = 0x80007C00 | (reg_e94_s0 & 0x3FF0000) | ((reg_e9c_s0 & 0x3FF0000) >> 16);
+	odm_set_bb_reg(dm, R_0xe40, MASKDWORD, u4tmp);
+	RF_DBG(dm, DBG_RF_IQK, "[IQK]0xe40_s0 = 0x%x u4tmp = 0x%x\n",
+	       odm_get_bb_reg(dm, R_0xe40, MASKDWORD), u4tmp);
 
-	ODM_RT_TRACE(p_dm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("[IQK]path S0 RXIQK STEP2!!\n\n"));
-	ODM_RT_TRACE(p_dm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("[IQK]0x67 @S0 RXIQK2 = 0x%x\n", odm_get_mac_reg(p_dm, 0x64, MASKBYTE3)));
-	/*ODM_RT_TRACE(p_dm,ODM_COMP_INIT, ODM_DBG_LOUD, ("[IQK]0x1e6@S0 RXIQK2 = 0x%x\n", platform_efio_read_1byte(p_adapter, 0x1e6)));*/
-	odm_set_bb_reg(p_dm, REG_RX_IQK, MASKDWORD, 0x01004800);
+	RF_DBG(dm, DBG_RF_IQK, "[IQK]path S0 RXIQK STEP2!!\n\n");
+	RF_DBG(dm, DBG_RF_IQK, "[IQK]0x67 @S0 RXIQK2 = 0x%x\n",
+	       odm_get_mac_reg(dm, R_0x64, MASKBYTE3));
+#if 0
+	/*RF_DBG(dm,DBG_RF_INIT, "[IQK]0x1e6@S0 RXIQK2 = 0x%x\n", platform_efio_read_1byte(adapter, 0x1e6));*/
+#endif
+	odm_set_bb_reg(dm, R_0xe44, MASKDWORD, 0x01004800);
 
-	odm_set_bb_reg(p_dm, REG_TX_IQK_TONE_A, MASKDWORD, 0x38008c1c);
-	odm_set_bb_reg(p_dm, REG_RX_IQK_TONE_A, MASKDWORD, 0x18008c1c);
-	odm_set_bb_reg(p_dm, REG_TX_IQK_TONE_B, MASKDWORD, 0x38008c1c);
-	odm_set_bb_reg(p_dm, REG_RX_IQK_TONE_B, MASKDWORD, 0x38008c1c);
+	odm_set_bb_reg(dm, R_0xe30, MASKDWORD, 0x38008c1c);
+	odm_set_bb_reg(dm, R_0xe34, MASKDWORD, 0x18008c1c);
+	odm_set_bb_reg(dm, R_0xe50, MASKDWORD, 0x38008c1c);
+	odm_set_bb_reg(dm, R_0xe54, MASKDWORD, 0x38008c1c);
 
-	odm_set_bb_reg(p_dm, REG_TX_IQK_PI_A, MASKDWORD, 0x82170000);
-	odm_set_bb_reg(p_dm, REG_RX_IQK_PI_A, MASKDWORD, 0x28171400);
+	odm_set_bb_reg(dm, R_0xe38, MASKDWORD, 0x82170000);
+	odm_set_bb_reg(dm, R_0xe3c, MASKDWORD, 0x28171400);
 
-	odm_set_bb_reg(p_dm, REG_IQK_AGC_RSP, MASKDWORD, 0x0046a8d1);
+	odm_set_bb_reg(dm, R_0xe4c, MASKDWORD, 0x0046a8d1);
 
-	odm_set_bb_reg(p_dm, REG_FPGA0_IQK, 0xffffff00, 0x000000);
-	odm_set_rf_reg(p_dm, RF_PATH_A, 0xee, 0x80000, 0x1);
-	odm_set_rf_reg(p_dm, RF_PATH_A, 0x33, RFREGOFFSETMASK, 0x00007);
-	odm_set_rf_reg(p_dm, RF_PATH_A, 0x3e, RFREGOFFSETMASK, 0x0005f);
-	odm_set_rf_reg(p_dm, RF_PATH_A, 0x3f, RFREGOFFSETMASK, 0xb3fdb);
+	odm_set_bb_reg(dm, R_0xe28, 0xffffff00, 0x000000);
+	odm_set_rf_reg(dm, RF_PATH_A, RF_0xee, 0x80000, 0x1);
+	odm_set_rf_reg(dm, RF_PATH_A, RF_0x33, RFREGOFFSETMASK, 0x00007);
+	odm_set_rf_reg(dm, RF_PATH_A, RF_0x3e, RFREGOFFSETMASK, 0x0005f);
+	odm_set_rf_reg(dm, RF_PATH_A, RF_0x3f, RFREGOFFSETMASK, 0xb3fdb);
+	odm_set_rf_reg(dm, RF_PATH_A, RF_0xee, RFREGOFFSETMASK, 0x00000);
 
-	ODM_RT_TRACE(p_dm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("RF0x1 @S0 RXIQK2 = 0x%x\n", odm_get_rf_reg(p_dm, RF_PATH_A, 0x1, RFREGOFFSETMASK)));
-	ODM_RT_TRACE(p_dm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("RF0x2 @S0 RXIQK2 = 0x%x\n", odm_get_rf_reg(p_dm, RF_PATH_A, 0x2, RFREGOFFSETMASK)));
+	RF_DBG(dm, DBG_RF_IQK, "RF0x1 @S0 RXIQK2 = 0x%x\n",
+	       odm_get_rf_reg(dm, RF_PATH_A, RF_0x1, RFREGOFFSETMASK));
+	RF_DBG(dm, DBG_RF_IQK, "RF0x2 @S0 RXIQK2 = 0x%x\n",
+	       odm_get_rf_reg(dm, RF_PATH_A, RF_0x2, RFREGOFFSETMASK));
 	/*enter IQK mode*/
-	odm_set_bb_reg(p_dm, REG_FPGA0_IQK, 0xffffff00, 0x808000);
+	odm_set_bb_reg(dm, R_0xe28, 0xffffff00, 0x808000);
 #if 1
 	/*backup path & GNT value */
-	original_path = odm_get_mac_reg(p_dm, REG_LTECOEX_PATH_CONTROL, MASKDWORD);  /*save 0x70*/
-	odm_set_bb_reg(p_dm, REG_LTECOEX_CTRL, MASKDWORD, 0x800f0038);
+	original_path = odm_get_mac_reg(dm, REG_LTECOEX_PATH_CONTROL, MASKDWORD); /*save 0x70*/
+	odm_set_bb_reg(dm, REG_LTECOEX_CTRL, MASKDWORD, 0x800f0038);
 	ODM_delay_ms(1);
-	original_gnt = odm_get_bb_reg(p_dm, REG_LTECOEX_READ_DATA, MASKDWORD);  /*save 0x38*/
-	ODM_RT_TRACE(p_dm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("[IQK]OriginalGNT = 0x%x\n", original_gnt));
+	original_gnt = odm_get_bb_reg(dm, REG_LTECOEX_READ_DATA, MASKDWORD); /*save 0x38*/
+	RF_DBG(dm, DBG_RF_IQK, "[IQK]OriginalGNT = 0x%x\n", original_gnt);
 
 	/*set GNT_WL=1/GNT_BT=1  and path owner to WiFi for pause BT traffic*/
-	odm_set_bb_reg(p_dm, REG_LTECOEX_WRITE_DATA, MASKDWORD, 0x0000ff00);
-	odm_set_bb_reg(p_dm, REG_LTECOEX_CTRL, MASKDWORD, 0xc0020038);	/*0x38[15:8] = 0x77*/
-	odm_set_mac_reg(p_dm, REG_LTECOEX_PATH_CONTROL, BIT(26), 0x1);
+	odm_set_bb_reg(dm, REG_LTECOEX_WRITE_DATA, MASKDWORD, 0x0000ff00);
+	odm_set_bb_reg(dm, REG_LTECOEX_CTRL, MASKDWORD, 0xc0020038); /*0x38[15:8] = 0x77*/
+	odm_set_mac_reg(dm, REG_LTECOEX_PATH_CONTROL, BIT(26), 0x1);
 #endif
-	odm_set_bb_reg(p_dm, REG_LTECOEX_CTRL, MASKDWORD, 0x800f0054);
+	odm_set_bb_reg(dm, REG_LTECOEX_CTRL, MASKDWORD, 0x800f0054);
 	ODM_delay_ms(1);
-	ODM_RT_TRACE(p_dm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("[IQK]GNT_BT @S0 RXIQK2 = 0x%x\n", odm_get_bb_reg(p_dm, REG_LTECOEX_READ_DATA, MASKDWORD)));
-	ODM_RT_TRACE(p_dm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("[IQK]0x948 @S0 RXIQK2 = 0x%x\n", odm_get_bb_reg(p_dm, 0x948, MASKDWORD)));
+	RF_DBG(dm, DBG_RF_IQK, "[IQK]GNT_BT @S0 RXIQK2 = 0x%x\n",
+	       odm_get_bb_reg(dm, REG_LTECOEX_READ_DATA, MASKDWORD));
+	RF_DBG(dm, DBG_RF_IQK, "[IQK]0x948 @S0 RXIQK2 = 0x%x\n",
+	       odm_get_bb_reg(dm, R_0x948, MASKDWORD));
 
-	odm_set_bb_reg(p_dm, REG_IQK_AGC_PTS, MASKDWORD, 0xf9000000);
-	odm_set_bb_reg(p_dm, REG_IQK_AGC_PTS, MASKDWORD, 0xf8000000);
+	odm_set_bb_reg(dm, R_0xe48, MASKDWORD, 0xf9000000);
+	odm_set_bb_reg(dm, R_0xe48, MASKDWORD, 0xf8000000);
 
+#if 0
 	/*ODM_delay_ms(IQK_DELAY_TIME_8723D);*/
+#endif
 	ktime = 0;
-	while ((!odm_get_bb_reg(p_dm, 0xeac, BIT(26))) && ktime < 10) {
+	while ((!odm_get_bb_reg(dm, R_0xeac, BIT(26))) && ktime < 10) {
 		ODM_delay_ms(1);
 		ktime++;
 	}
 #if 1
 	/*Restore GNT_WL/GNT_BT  and path owner*/
-	odm_set_bb_reg(p_dm, REG_LTECOEX_WRITE_DATA, MASKDWORD, original_gnt);
-	odm_set_bb_reg(p_dm, REG_LTECOEX_CTRL, MASKDWORD, 0xc00f0038);
-	odm_set_mac_reg(p_dm, REG_LTECOEX_PATH_CONTROL, 0xffffffff, original_path);
+	odm_set_bb_reg(dm, REG_LTECOEX_WRITE_DATA, MASKDWORD, original_gnt);
+	odm_set_bb_reg(dm, REG_LTECOEX_CTRL, MASKDWORD, 0xc00f0038);
+	odm_set_mac_reg(dm, REG_LTECOEX_PATH_CONTROL, 0xffffffff, original_path);
 #endif
 	/*reload RF path*/
-	odm_set_bb_reg(p_dm, 0x948, MASKDWORD, path_sel_bb);
+	odm_set_bb_reg(dm, R_0x948, MASKDWORD, path_sel_bb);
 
 	/*leave IQK mode*/
-	odm_set_bb_reg(p_dm, REG_FPGA0_IQK, 0xffffff00, 0x000000);
+	odm_set_bb_reg(dm, R_0xe28, 0xffffff00, 0x000000);
 
-	odm_set_rf_reg(p_dm, RF_PATH_A, 0xde, 0x800, 0x0);
-	odm_set_rf_reg(p_dm, RF_PATH_A, 0x2, BIT(0), 0x0);
-	odm_set_rf_reg(p_dm, RF_PATH_A, 0x1, BIT(0), 0x0);
+	odm_set_rf_reg(dm, RF_PATH_A, RF_0xde, 0x800, 0x0);
+	odm_set_rf_reg(dm, RF_PATH_A, RF_0x2, BIT(0), 0x0);
+	odm_set_rf_reg(dm, RF_PATH_A, RF_0x1, BIT(0), 0x0);
 
-	reg_eac_s0 = odm_get_bb_reg(p_dm, REG_RX_POWER_AFTER_IQK_A_2, MASKDWORD);
-	reg_ea4_s0 = odm_get_bb_reg(p_dm, REG_RX_POWER_BEFORE_IQK_A_2, MASKDWORD);
-	ODM_RT_TRACE(p_dm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("[IQK]0xeac_s0 = 0x%x\n", reg_eac_s0));
-	ODM_RT_TRACE(p_dm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("[IQK]0xea4_s0 = 0x%x, 0xeac_s0 = 0x%x\n", reg_ea4_s0, reg_eac_s0));
+	reg_eac_s0 = odm_get_bb_reg(dm, R_0xeac, MASKDWORD);
+	reg_ea4_s0 = odm_get_bb_reg(dm, R_0xea4, MASKDWORD);
+	RF_DBG(dm, DBG_RF_IQK, "[IQK]0xeac_s0 = 0x%x\n", reg_eac_s0);
+	RF_DBG(dm, DBG_RF_IQK, "[IQK]0xea4_s0 = 0x%x, 0xeac_s0 = 0x%x\n",
+	       reg_ea4_s0, reg_eac_s0);
 
-	ODM_RT_TRACE(p_dm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("[IQK]0xea0_s0(before IQK)= 0x%x, 0xea8_s0(afer IQK) = 0x%x\n",
-		odm_get_bb_reg(p_dm, 0xea0, MASKDWORD), odm_get_bb_reg(p_dm, 0xea8, MASKDWORD)));
+	RF_DBG(dm, DBG_RF_IQK,
+	       "[IQK]0xea0_s0(before IQK)= 0x%x, 0xea8_s0(afer IQK) = 0x%x\n",
+	       odm_get_bb_reg(dm, R_0xea0, MASKDWORD),
+	       odm_get_bb_reg(dm, R_0xea8, MASKDWORD));
 
 	tmp = (reg_eac_s0 & 0x03FF0000) >> 16;
 	if ((tmp & 0x200) > 0)
 		tmp = 0x400 - tmp;
 
-	if (!(reg_eac_s0 & BIT(27)) &&		/*if Tx is OK, check whether Rx is OK*/
+	if (!(reg_eac_s0 & BIT(27)) && /*if Tx is OK, check whether Rx is OK*/
 	    (((reg_ea4_s0 & 0x03FF0000) >> 16) != 0x132) &&
 	    (((reg_eac_s0 & 0x03FF0000) >> 16) != 0x36) &&
 	    (((reg_ea4_s0 & 0x03FF0000) >> 16) < 0x11a) &&
 	    (((reg_ea4_s0 & 0x03FF0000) >> 16) > 0xe6) &&
-	    (tmp < 0x1a))
+	    tmp < 0x1a)
 		result |= 0x02;
 	else
-		ODM_RT_TRACE(p_dm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("S0 RXIQK STEP2 FAIL\n"));
+		RF_DBG(dm, DBG_RF_IQK, "S0 RXIQK STEP2 FAIL\n");
 	return result;
 }
 
-
-void
-_phy_path_s1_fill_iqk_matrix_8723d(
-	struct PHY_DM_STRUCT		*p_dm,
-	boolean	is_iqk_ok,
-	s32		result[][8],
-	u8		final_candidate,
-	boolean	is_tx_only
-)
+void _phy_path_s1_fill_iqk_matrix_8723d(struct dm_struct *dm, boolean is_iqk_ok,
+					s32 result[][8], u8 final_candidate,
+					boolean is_tx_only)
 {
-	u32	oldval_1, X, TX1_A, reg;
-	s32	Y, TX1_C;
-	ODM_RT_TRACE(p_dm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("path S1 IQ Calibration %s !\n", (is_iqk_ok) ? "Success" : "Failed"));
+	u32 oldval_1, X, TX1_A, reg;
+	s32 Y, TX1_C;
+	RF_DBG(dm, DBG_RF_IQK, "path S1 IQ Calibration %s !\n",
+	       (is_iqk_ok) ? "Success" : "Failed");
 
 	if (final_candidate == 0xFF)
 		return;
 
-	else if (is_iqk_ok) {
-		oldval_1 = (odm_get_bb_reg(p_dm, REG_OFDM_0_XA_TX_IQ_IMBALANCE, MASKDWORD) >> 22) & 0x3FF;
+	if (is_iqk_ok) {
+		oldval_1 = (odm_get_bb_reg(dm, REG_OFDM_0_XA_TX_IQ_IMBALANCE, MASKDWORD) >> 22) & 0x3FF;
 
 		X = result[final_candidate][0];
 
 		if ((X & 0x00000200) != 0)
 			X = X | 0xFFFFFC00;
 		TX1_A = (X * oldval_1) >> 8;
-		ODM_RT_TRACE(p_dm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("X = 0x%x, TX1_A = 0x%x, oldval_1 0x%x\n", X, TX1_A, oldval_1));
-		odm_set_bb_reg(p_dm, REG_OFDM_0_XA_TX_IQ_IMBALANCE, 0x3FF, TX1_A);
+		RF_DBG(dm, DBG_RF_IQK,
+		       "X = 0x%x, TX1_A = 0x%x, oldval_1 0x%x\n", X, TX1_A,
+		       oldval_1);
+		odm_set_bb_reg(dm, REG_OFDM_0_XA_TX_IQ_IMBALANCE, 0x3FF, TX1_A);
 
-		odm_set_bb_reg(p_dm, REG_OFDM_0_ECCA_THRESHOLD, BIT(31), ((X * oldval_1 >> 7) & 0x1));
+		odm_set_bb_reg(dm, REG_OFDM_0_ECCA_THRESHOLD, BIT(31), ((X * oldval_1 >> 7) & 0x1));
 
 		Y = result[final_candidate][1];
 		if ((Y & 0x00000200) != 0)
 			Y = Y | 0xFFFFFC00;
 
 		TX1_C = (Y * oldval_1) >> 8;
-		ODM_RT_TRACE(p_dm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("Y = 0x%x, TX1_C = 0x%x\n", Y, TX1_C));
-		odm_set_bb_reg(p_dm, REG_OFDM_0_XC_TX_AFE, 0xF0000000, ((TX1_C & 0x3C0) >> 6));
-		odm_set_bb_reg(p_dm, REG_OFDM_0_XA_TX_IQ_IMBALANCE, 0x003F0000, (TX1_C & 0x3F));
+		RF_DBG(dm, DBG_RF_IQK, "Y = 0x%x, TX1_C = 0x%x\n", Y, TX1_C);
+		odm_set_bb_reg(dm, R_0xc94, 0xF0000000, ((TX1_C & 0x3C0) >> 6));
+		odm_set_bb_reg(dm, REG_OFDM_0_XA_TX_IQ_IMBALANCE, 0x003F0000, (TX1_C & 0x3F));
 
-		odm_set_bb_reg(p_dm, REG_OFDM_0_ECCA_THRESHOLD, BIT(29), ((Y * oldval_1 >> 7) & 0x1));
+		odm_set_bb_reg(dm, REG_OFDM_0_ECCA_THRESHOLD, BIT(29), ((Y * oldval_1 >> 7) & 0x1));
 
 		if (is_tx_only) {
-			ODM_RT_TRACE(p_dm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("_phy_path_s1_fill_iqk_matrix_8723d only Tx OK\n"));
+			RF_DBG(dm, DBG_RF_IQK, "%s only Tx OK\n", __func__);
 			return;
 		}
 		reg = result[final_candidate][2];
@@ -1516,260 +1590,221 @@ _phy_path_s1_fill_iqk_matrix_8723d(
 		if (RTL_ABS(reg, 0x100) >= 16)
 			reg = 0x100;
 #endif
-		odm_set_bb_reg(p_dm, REG_OFDM_0_XA_RX_IQ_IMBALANCE, 0x3FF, reg);
+		odm_set_bb_reg(dm, R_0xc14, 0x3FF, reg);
 
 		reg = result[final_candidate][3] & 0x3F;
-		odm_set_bb_reg(p_dm, REG_OFDM_0_XA_RX_IQ_IMBALANCE, 0xFC00, reg);
+		odm_set_bb_reg(dm, R_0xc14, 0xFC00, reg);
 
 		reg = (result[final_candidate][3] >> 6) & 0xF;
-		odm_set_bb_reg(p_dm, REG_OFDM_0_RX_IQ_EXT_ANTA, 0xF0000000, reg);
-		/*
-		10 os 7201 10
-		10 id ea4 [25:16] p
-		10 os 7202 10
-		10 od c14 VarFromTmp [9:0] p
-
-		10 os 7201 11
-		10 id eac [25:22] p
-		10 os 7202 11
-		10 od ca0 VarFromTmp [31:28] p
-
-		10 os 7201 12
-		10 id eac [21:16] p
-		10 os 7202 12
-		10 od c14 VarFromTmp [15:10] p
-		*/
+		odm_set_bb_reg(dm, R_0xca0, 0xF0000000, reg);
+
+		/* 10 os 7201 10
+		 * 10 id ea4 [25:16] p
+		 * 10 os 7202 10
+		 * 10 od c14 VarFromTmp [9:0] p
+		 *
+		 * 10 os 7201 11
+		 * 10 id eac [25:22] p
+		 * 10 os 7202 11
+		 * 10 od ca0 VarFromTmp [31:28] p
+		 *
+		 * 10 os 7201 12
+		 * 10 id eac [21:16] p
+		 * 10 os 7202 12
+		 * 10 od c14 VarFromTmp [15:10] p
+		 */
 	}
 }
 
-void
-_phy_path_s0_fill_iqk_matrix_8723d(
-	struct PHY_DM_STRUCT		*p_dm,
-	boolean	is_iqk_ok,
-	s32		result[][8],
-	u8		final_candidate,
-	boolean		is_tx_only
-)
+void _phy_path_s0_fill_iqk_matrix_8723d(struct dm_struct *dm, boolean is_iqk_ok,
+					s32 result[][8], u8 final_candidate,
+					boolean is_tx_only)
 {
-	u32	oldval_0, X, TX0_A, reg;
-	s32	Y, TX0_C;
-	ODM_RT_TRACE(p_dm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("path S0 IQ Calibration %s !\n", (is_iqk_ok) ? "Success" : "Failed"));
+	u32 oldval_0, X, TX0_A, reg;
+	s32 Y, TX0_C;
+	RF_DBG(dm, DBG_RF_IQK, "path S0 IQ Calibration %s !\n",
+	       (is_iqk_ok) ? "Success" : "Failed");
 
 	if (final_candidate == 0xFF)
 		return;
 
-	else if (is_iqk_ok) {
-		oldval_0 = (odm_get_bb_reg(p_dm, 0xcd4, MASKDWORD) >> 13) & 0x3FF;
+	if (is_iqk_ok) {
+		oldval_0 = (odm_get_bb_reg(dm, R_0xcd4, MASKDWORD) >> 13) & 0x3FF;
 
 		X = result[final_candidate][4];
 		if ((X & 0x00000200) != 0)
 			X = X | 0xFFFFFC00;
 		TX0_A = (X * oldval_0) >> 8;
-		ODM_RT_TRACE(p_dm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("X = 0x%x, TX0_A = 0x%x, oldval_0 0x%x\n", X, TX0_A, oldval_0));
-		odm_set_bb_reg(p_dm, 0xcd0, 0x7FE, TX0_A);
+		RF_DBG(dm, DBG_RF_IQK,
+		       "X = 0x%x, TX0_A = 0x%x, oldval_0 0x%x\n", X, TX0_A,
+		       oldval_0);
+		odm_set_bb_reg(dm, R_0xcd0, 0x7FE, TX0_A);
 
-		odm_set_bb_reg(p_dm, 0xcd0, BIT(0), ((X * oldval_0 >> 7) & 0x1));
+		odm_set_bb_reg(dm, R_0xcd0, BIT(0), ((X * oldval_0 >> 7) & 0x1));
 
 		Y = result[final_candidate][5];
 		if ((Y & 0x00000200) != 0)
 			Y = Y | 0xFFFFFC00;
 
 		TX0_C = (Y * oldval_0) >> 8;
-		ODM_RT_TRACE(p_dm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("Y = 0x%x, TX0_C = 0x%x\n", Y, TX0_C));
-		odm_set_bb_reg(p_dm, 0xcd4, 0x7FE, (TX0_C & 0x3FF));
+		RF_DBG(dm, DBG_RF_IQK, "Y = 0x%x, TX0_C = 0x%x\n", Y, TX0_C);
+		odm_set_bb_reg(dm, R_0xcd4, 0x7FE, (TX0_C & 0x3FF));
 
-		odm_set_bb_reg(p_dm, 0xcd4, BIT(0), ((Y * oldval_0 >> 7) & 0x1));
+		odm_set_bb_reg(dm, R_0xcd4, BIT(0), ((Y * oldval_0 >> 7) & 0x1));
 
 		if (is_tx_only)
 			return;
 
 		reg = result[final_candidate][6];
-		odm_set_bb_reg(p_dm, 0xcd8, 0x3FF, reg);
+		odm_set_bb_reg(dm, R_0xcd8, 0x3FF, reg);
 
 		reg = result[final_candidate][7];
-		odm_set_bb_reg(p_dm, 0xcd8, 0x003FF000, reg);
-		/*
-		10 os 7201 10
-		10 id ea4 [25:16] p
-		10 os 7202 10
-		10 od cd8 VarFromTmp [9:0] p
-
-		10 os 7201 11
-		10 id eac [25:16] p
-		10 os 7202 11
-		10 od cd8 VarFromTmp [21:12] p
-				rege94_s1 = result[i][0];
-				rege9c_s1 = result[i][1];
-				regea4_s1 = result[i][2];
-				regeac_s1 = result[i][3];
-				rege94_s0 = result[i][4];
-				rege9c_s0 = result[i][5];
-				regea4_s0 = result[i][6];
-				regeac_s0 = result[i][7];
-		*/
+		odm_set_bb_reg(dm, R_0xcd8, 0x003FF000, reg);
+
+		/*10 os 7201 10
+		 *10 id ea4 [25:16] p
+		 *10 os 7202 10
+		 *10 od cd8 VarFromTmp [9:0] p
+		 *
+		 *10 os 7201 11
+		 *10 id eac [25:16] p
+		 *10 os 7202 11
+		 *10 od cd8 VarFromTmp [21:12] p
+		 *		rege94_s1 = result[i][0];
+		 *		rege9c_s1 = result[i][1];
+		 *		regea4_s1 = result[i][2];
+		 *		regeac_s1 = result[i][3];
+		 *		rege94_s0 = result[i][4];
+		 *		rege9c_s0 = result[i][5];
+		 *		regea4_s0 = result[i][6];
+		 *		regeac_s0 = result[i][7];
+		 */
 	}
 }
 
-void
-_phy_save_adda_registers_8723d(
-	struct PHY_DM_STRUCT		*p_dm,
-	u32		*adda_reg,
-	u32		*adda_backup,
-	u32		register_num
-)
+void _phy_save_adda_registers_8723d(struct dm_struct *dm, u32 *adda_reg,
+				    u32 *adda_backup, u32 register_num)
 {
-	u32	i;
+	u32 i;
 
-	for (i = 0 ; i < register_num ; i++)
-		adda_backup[i] = odm_get_bb_reg(p_dm, adda_reg[i], MASKDWORD);
+	for (i = 0; i < register_num; i++)
+		adda_backup[i] = odm_get_bb_reg(dm, adda_reg[i], MASKDWORD);
 }
 
-
-void
-_phy_save_mac_registers_8723d(
-	struct PHY_DM_STRUCT		*p_dm,
-	u32		*mac_reg,
-	u32		*mac_backup
-)
+void _phy_save_mac_registers_8723d(struct dm_struct *dm, u32 *mac_reg,
+				   u32 *mac_backup)
 {
-	u32	i;
+	u32 i;
 
-	for (i = 0 ; i < (IQK_MAC_REG_NUM - 1); i++)
-		mac_backup[i] = odm_read_1byte(p_dm, mac_reg[i]);
-	mac_backup[i] = odm_read_4byte(p_dm, mac_reg[i]);
+	for (i = 0; i < (IQK_MAC_REG_NUM - 1); i++)
+		mac_backup[i] = odm_read_1byte(dm, mac_reg[i]);
+	mac_backup[i] = odm_read_4byte(dm, mac_reg[i]);
 }
 
-
-void
-_phy_reload_adda_registers_8723d(
-	struct PHY_DM_STRUCT		*p_dm,
-	u32		*adda_reg,
-	u32		*adda_backup,
-	u32		regiester_num
-)
+void _phy_reload_adda_registers_8723d(struct dm_struct *dm, u32 *adda_reg,
+				      u32 *adda_backup, u32 regiester_num)
 {
-	u32	i;
+	u32 i;
 
-	ODM_RT_TRACE(p_dm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("Reload ADDA power saving parameters !\n"));
-	for (i = 0 ; i < regiester_num; i++)
-		odm_set_bb_reg(p_dm, adda_reg[i], MASKDWORD, adda_backup[i]);
+	RF_DBG(dm, DBG_RF_IQK, "Reload ADDA power saving parameters !\n");
+	for (i = 0; i < regiester_num; i++)
+		odm_set_bb_reg(dm, adda_reg[i], MASKDWORD, adda_backup[i]);
 }
 
-void
-_phy_reload_mac_registers_8723d(
-	struct PHY_DM_STRUCT		*p_dm,
-	u32		*mac_reg,
-	u32		*mac_backup
-)
+void _phy_reload_mac_registers_8723d(struct dm_struct *dm, u32 *mac_reg,
+				     u32 *mac_backup)
 {
-	u32	i;
+	u32 i;
 
-	ODM_RT_TRACE(p_dm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("Reload MAC parameters !\n"));
-	for (i = 0 ; i < (IQK_MAC_REG_NUM - 1); i++)
-		odm_write_1byte(p_dm, mac_reg[i], (u8)mac_backup[i]);
-	odm_write_4byte(p_dm, mac_reg[i], mac_backup[i]);
+	RF_DBG(dm, DBG_RF_IQK, "Reload MAC parameters !\n");
+	for (i = 0; i < (IQK_MAC_REG_NUM - 1); i++)
+		odm_write_1byte(dm, mac_reg[i], (u8)mac_backup[i]);
+	odm_write_4byte(dm, mac_reg[i], mac_backup[i]);
 }
 
-
-void
-_phy_path_adda_on_8723d(
-	struct PHY_DM_STRUCT		*p_dm,
-	u32		*adda_reg,
-	boolean		is_path_a_on,
-	boolean		is2T
-)
+void _phy_path_adda_on_8723d(struct dm_struct *dm, u32 *adda_reg,
+			     boolean is_path_a_on, boolean is2T)
 {
-	u32	path_on;
-	u32	i;
+	u32 path_on;
+	u32 i;
 
 	path_on = is_path_a_on ? 0x03c00016 : 0x03c00016;
 
-	if (false == is2T) {
+	if (!is2T) {
 		path_on = 0x03c00016;
-		odm_set_bb_reg(p_dm, adda_reg[0], MASKDWORD, 0x03c00016);
-	} else
-		odm_set_bb_reg(p_dm, adda_reg[0], MASKDWORD, path_on);
-
-	for (i = 1 ; i < IQK_ADDA_REG_NUM ; i++)
-		odm_set_bb_reg(p_dm, adda_reg[i], MASKDWORD, path_on);
+		odm_set_bb_reg(dm, adda_reg[0], MASKDWORD, 0x03c00016);
+	} else {
+		odm_set_bb_reg(dm, adda_reg[0], MASKDWORD, path_on);
+	}
 
+	for (i = 1; i < IQK_ADDA_REG_NUM; i++)
+		odm_set_bb_reg(dm, adda_reg[i], MASKDWORD, path_on);
 }
 
-void
-_phy_mac_setting_calibration_8723d(
-	struct PHY_DM_STRUCT		*p_dm,
-	u32		*mac_reg,
-	u32		*mac_backup
-)
+void _phy_mac_setting_calibration_8723d(struct dm_struct *dm, u32 *mac_reg,
+					u32 *mac_backup)
 {
+#if 0
 	/*
-		odm_write_1byte(p_dm, mac_reg[i], 0x3F);
+		odm_write_1byte(dm, mac_reg[i], 0x3F);
 
 		for(i = 1 ; i < (IQK_MAC_REG_NUM - 1); i++){
-			odm_write_1byte(p_dm, mac_reg[i], (u8)(mac_backup[i]&(~BIT(3))));
+			odm_write_1byte(dm, mac_reg[i], (u8)(mac_backup[i]&(~BIT(3))));
 		}
-		odm_write_1byte(p_dm, mac_reg[i], (u8)(mac_backup[i]&(~BIT(5))));
+		odm_write_1byte(dm, mac_reg[i], (u8)(mac_backup[i]&(~BIT(5))));
 	*/
 
-	/*odm_set_bb_reg(p_dm, 0x522, MASKBYTE0, 0x7f);*/
-	/*odm_set_bb_reg(p_dm, 0x550, MASKBYTE0, 0x15);*/
-	/*odm_set_bb_reg(p_dm, 0x551, MASKBYTE0, 0x00);*/
-	odm_set_bb_reg(p_dm, 0x520, 0x00ff0000, 0xff);
+	/*odm_set_bb_reg(dm, R_0x522, MASKBYTE0, 0x7f);*/
+	/*odm_set_bb_reg(dm, R_0x550, MASKBYTE0, 0x15);*/
+	/*odm_set_bb_reg(dm, R_0x551, MASKBYTE0, 0x00);*/
+#endif
+	odm_set_bb_reg(dm, R_0x520, 0x00ff0000, 0xff);
 }
 
-void
-_phy_path_a_stand_by_8723d(
-	struct PHY_DM_STRUCT		*p_dm
-)
+void _phy_path_a_stand_by_8723d(struct dm_struct *dm)
 {
-	ODM_RT_TRACE(p_dm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("path-S1 standby mode!\n"));
-	odm_set_bb_reg(p_dm, REG_FPGA0_IQK, 0xffffff00, 0x000000);
-	/*	odm_set_bb_reg(p_dm, 0x840, MASKDWORD, 0x00010000);*/
-	odm_set_rf_reg(p_dm, (enum rf_path)0x0, 0x0, RFREGOFFSETMASK, 0x10000);
-	odm_set_bb_reg(p_dm, REG_FPGA0_IQK, 0xffffff00, 0x808000);
+	RF_DBG(dm, DBG_RF_IQK, "path-S1 standby mode!\n");
+	odm_set_bb_reg(dm, R_0xe28, 0xffffff00, 0x000000);
+#if 0
+	/*	odm_set_bb_reg(dm, R_0x840, MASKDWORD, 0x00010000);*/
+#endif
+	odm_set_rf_reg(dm, (enum rf_path)0x0, RF_0x0, RFREGOFFSETMASK, 0x10000);
+	odm_set_bb_reg(dm, R_0xe28, 0xffffff00, 0x808000);
 }
 
-void
-_phy_path_b_stand_by_8723d(
-	struct PHY_DM_STRUCT		*p_dm
-)
+void _phy_path_b_stand_by_8723d(struct dm_struct *dm)
 {
-	ODM_RT_TRACE(p_dm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("path-S0 standby mode!\n"));
-	odm_set_bb_reg(p_dm, REG_FPGA0_IQK, 0xffffff00, 0x000000);
-	odm_set_rf_reg(p_dm, (enum rf_path)0x1, 0x0, RFREGOFFSETMASK, 0x10000);
-	odm_set_bb_reg(p_dm, REG_FPGA0_IQK, 0xffffff00, 0x808000);
+	RF_DBG(dm, DBG_RF_IQK, "path-S0 standby mode!\n");
+	odm_set_bb_reg(dm, R_0xe28, 0xffffff00, 0x000000);
+	odm_set_rf_reg(dm, (enum rf_path)0x1, RF_0x0, RFREGOFFSETMASK, 0x10000);
+	odm_set_bb_reg(dm, R_0xe28, 0xffffff00, 0x808000);
 }
 
-
-void
-_phy_pi_mode_switch_8723d(
-	struct PHY_DM_STRUCT		*p_dm,
-	boolean		pi_mode
-)
+void _phy_pi_mode_switch_8723d(struct dm_struct *dm, boolean pi_mode)
 {
-	u32	mode;
+	u32 mode;
 
 	mode = pi_mode ? 0x01000100 : 0x01000000;
-	odm_set_bb_reg(p_dm, REG_FPGA0_XA_HSSI_PARAMETER1, MASKDWORD, mode);
-	odm_set_bb_reg(p_dm, REG_FPGA0_XB_HSSI_PARAMETER1, MASKDWORD, mode);
+	odm_set_bb_reg(dm, R_0x820, MASKDWORD, mode);
+	odm_set_bb_reg(dm, R_0x828, MASKDWORD, mode);
 }
 
 boolean
-phy_simularity_compare_8723d(
-	struct PHY_DM_STRUCT		*p_dm,
-	s32		result[][8],
-	u8		 c1,
-	u8		 c2
-)
+phy_simularity_compare_8723d(struct dm_struct *dm, s32 result[][8], u8 c1,
+			     u8 c2)
 {
-	u32		i, j, diff, simularity_bit_map, bound = 0;
-	u8		final_candidate[2] = {0xFF, 0xFF};
-	boolean		is_result = true;
+	u32 i, j, diff, simularity_bit_map, bound = 0;
+	u8 final_candidate[2] = {0xFF, 0xFF};
+	boolean is_result = true;
+#if 0
 	/*#if !(DM_ODM_SUPPORT_TYPE & ODM_AP)*/
-	/*	bool		is2T = IS_92C_SERIAL( p_hal_data->version_id);*/
+	/*	bool		is2T = IS_92C_SERIAL( hal_data->version_id);*/
 	/*#else*/
-	boolean		is2T = true;
+#endif
+	boolean is2T = true;
+#if 0
 	/*#endif*/
+#endif
 
 	s32 tmp1 = 0, tmp2 = 0;
 
@@ -1778,14 +1813,13 @@ phy_simularity_compare_8723d(
 	else
 		bound = 4;
 
-	ODM_RT_TRACE(p_dm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("===> IQK:phy_simularity_compare_8723d c1 %d c2 %d!!!\n", c1, c2));
-
+	RF_DBG(dm, DBG_RF_IQK, "===> IQK:%s c1 %d c2 %d!!!\n", __func__, c1,
+	       c2);
 
 	simularity_bit_map = 0;
 
 	for (i = 0; i < bound; i++) {
-
-		if ((i == 1) || (i == 3) || (i == 5) || (i == 7)) {
+		if (i == 1 || i == 3 || i == 5 || i == 7) {
 			if ((result[c1][i] & 0x00000200) != 0)
 				tmp1 = result[c1][i] | 0xFFFFFC00;
 			else
@@ -1803,7 +1837,9 @@ phy_simularity_compare_8723d(
 		diff = (tmp1 > tmp2) ? (tmp1 - tmp2) : (tmp2 - tmp1);
 
 		if (diff > MAX_TOLERANCE) {
-			ODM_RT_TRACE(p_dm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("IQK:differnece overflow %d index %d compare1 0x%x compare2 0x%x!!!\n",  diff, i, result[c1][i], result[c2][i]));
+			RF_DBG(dm, DBG_RF_IQK,
+			       "IQK:differnece overflow %d index %d compare1 0x%x compare2 0x%x!!!\n",
+			       diff, i, result[c1][i], result[c2][i]);
 
 			if ((i == 2 || i == 6) && !simularity_bit_map) {
 				if (result[c1][i] + result[c1][i + 1] == 0)
@@ -1812,12 +1848,14 @@ phy_simularity_compare_8723d(
 					final_candidate[(i / 4)] = c1;
 				else
 					simularity_bit_map = simularity_bit_map | (1 << i);
-			} else
+			} else {
 				simularity_bit_map = simularity_bit_map | (1 << i);
+			}
 		}
 	}
 
-	ODM_RT_TRACE(p_dm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("IQK:phy_simularity_compare_8723d simularity_bit_map   %x !!!\n", simularity_bit_map));
+	RF_DBG(dm, DBG_RF_IQK, "IQK:%s simularity_bit_map   %x !!!\n", __func__,
+	       simularity_bit_map);
 
 	if (simularity_bit_map == 0) {
 		for (i = 0; i < (bound / 4); i++) {
@@ -1828,134 +1866,119 @@ phy_simularity_compare_8723d(
 			}
 		}
 		return is_result;
-	} else {
-
-		if (!(simularity_bit_map & 0x03)) {
-			for (i = 0; i < 2; i++)
-				result[3][i] = result[c1][i];
-		}
-
-		if (!(simularity_bit_map & 0x0c)) {
-			for (i = 2; i < 4; i++)
-				result[3][i] = result[c1][i];
-		}
-
-		if (!(simularity_bit_map & 0x30)) {
-			for (i = 4; i < 6; i++)
-				result[3][i] = result[c1][i];
-
-		}
+	}
 
-		if (!(simularity_bit_map & 0xc0)) {
-			for (i = 6; i < 8; i++)
-				result[3][i] = result[c1][i];
-		}
+	if (!(simularity_bit_map & 0x03)) {
+		for (i = 0; i < 2; i++)
+			result[3][i] = result[c1][i];
+	}
 
-		return false;
+	if (!(simularity_bit_map & 0x0c)) {
+		for (i = 2; i < 4; i++)
+			result[3][i] = result[c1][i];
 	}
 
+	if (!(simularity_bit_map & 0x30)) {
+		for (i = 4; i < 6; i++)
+			result[3][i] = result[c1][i];
+	}
 
+	if (!(simularity_bit_map & 0xc0)) {
+		for (i = 6; i < 8; i++)
+			result[3][i] = result[c1][i];
+	}
 
+	return false;
 }
 
-
-void
-_phy_check_coex_status_8723d(
-	struct PHY_DM_STRUCT	*p_dm,
-	boolean		beforek
-)
+void _phy_check_coex_status_8723d(struct dm_struct *dm, boolean beforek)
 {
-	u8		u1b_tmp;
-	u16		count = 0;
-	u8		h2c_parameter;
-
 #if MP_DRIVER != 1
+	u8 u1b_tmp;
+	u16 count = 0;
+	u8 h2c_parameter;
+
 	if (beforek) {
 		/* Set H2C cmd to inform FW (enable). */
 		h2c_parameter = 1;
-		odm_fill_h2c_cmd(p_dm, ODM_H2C_WIFI_CALIBRATION, 1, &h2c_parameter);
+		odm_fill_h2c_cmd(dm, ODM_H2C_WIFI_CALIBRATION, 1, &h2c_parameter);
 		/* Check 0x1e6 or 100ms timeout*/
 		count = 0;
-		u1b_tmp = odm_read_1byte(p_dm, 0x1e6);
+		u1b_tmp = odm_read_1byte(dm, 0x1e6);
 		while (u1b_tmp != 0x1 && count < 5000) {
 			ODM_delay_us(20);
-			u1b_tmp = odm_read_1byte(p_dm, 0x1e6);
+			u1b_tmp = odm_read_1byte(dm, 0x1e6);
 			count++;
 		}
 
 		if (count >= 5000)
-			RT_TRACE(COMP_INIT, DBG_LOUD, ("[IQK]Polling 0x1e6 to 1 for WiFi calibration H2C cmd FAIL! count(%d)", count));
+			RF_DBG(dm, DBG_RF_INIT,
+			       "[IQK]Polling 0x1e6 to 1 for WiFi calibration H2C cmd FAIL! count(%d)",
+			       count);
 
 		/* Wait BT IQK finished. */
-		/* polling 0x1e7[0]=1 or 1500ms timeout */
+		/* polling 0x1e7[0]=1 or 600ms timeout */
 		count = 0;
-		u1b_tmp = odm_read_1byte(p_dm, 0x1e7);
+		u1b_tmp = odm_read_1byte(dm, 0x1e7);
 		while ((!(u1b_tmp & BIT(0))) && count < 30000) {
 			ODM_delay_us(20);
-			u1b_tmp = odm_read_1byte(p_dm, 0x1e7);
+			u1b_tmp = odm_read_1byte(dm, 0x1e7);
 			count++;
 		}
 
 		if (count >= 30000)
-			RT_TRACE(COMP_INIT, DBG_LOUD, ("[IQK]Waiting BT IQK finish time out! count(%d)", count));		
+			RF_DBG(dm, DBG_RF_INIT,
+			       "[IQK]Waiting BT IQK finish time out! count(%d)",
+			       count);
 	} else {
 		/* Set H2C cmd to inform FW (disable). */
 		h2c_parameter = 0;
-		odm_fill_h2c_cmd(p_dm, ODM_H2C_WIFI_CALIBRATION, 1, &h2c_parameter);
+		odm_fill_h2c_cmd(dm, ODM_H2C_WIFI_CALIBRATION, 1, &h2c_parameter);
 		/* Check 0x1e6 or 100ms timeout*/
 		count = 0;
-		u1b_tmp = odm_read_1byte(p_dm, 0x1e6);
+		u1b_tmp = odm_read_1byte(dm, 0x1e6);
 		while (u1b_tmp != 0 && count < 5000) {
 			ODM_delay_us(20);
-			u1b_tmp = odm_read_1byte(p_dm, 0x1e6);
+			u1b_tmp = odm_read_1byte(dm, 0x1e6);
 			count++;
 		}
 
 		if (count >= 1000)
-			RT_TRACE(COMP_INIT, DBG_LOUD, ("[IQK]Polling 0x1e6 to 0 for WiFi calibration H2C cmd FAIL! count(%d)", count));
-		}
+			RF_DBG(dm, DBG_RF_INIT,
+			       "[IQK]Polling 0x1e6 to 0 for WiFi calibration H2C cmd FAIL! count(%d)",
+			       count);
+	}
 #endif
 }
 
-
-
-void
-_phy_iq_calibrate_8723d(
-	struct PHY_DM_STRUCT		*p_dm,
-	s32		result[][8],
-	u8		t,
-	boolean		is2T
-)
+void _phy_iq_calibrate_8723d(struct dm_struct *dm, s32 result[][8], u8 t,
+			     boolean is2T)
 {
-	u32			i;
-	u8			path_s1_ok = 0x0, path_s0_ok = 0x0;
-	u8			tmp0xc50 = (u8)odm_get_bb_reg(p_dm, 0xC50, MASKBYTE0);
-	u8			tmp0xc58 = (u8)odm_get_bb_reg(p_dm, 0xC58, MASKBYTE0);
-	u32			ADDA_REG[IQK_ADDA_REG_NUM] = {
-		REG_FPGA0_XCD_SWITCH_CONTROL,	REG_BLUE_TOOTH,
-		REG_RX_WAIT_CCA,		REG_TX_CCK_RFON,
-		REG_TX_CCK_BBON,	REG_TX_OFDM_RFON,
-		REG_TX_OFDM_BBON,	REG_TX_TO_RX,
-		REG_TX_TO_TX,		REG_RX_CCK,
-		REG_RX_OFDM,		REG_RX_WAIT_RIFS,
-		REG_RX_TO_RX,		REG_STANDBY,
-		REG_SLEEP,			REG_PMPD_ANAEN
-	};
-	u32			IQK_MAC_REG[IQK_MAC_REG_NUM] = {
-		REG_TXPAUSE,		REG_BCN_CTRL,
-		REG_BCN_CTRL_1,	REG_GPIO_MUXCFG
-	};
-
-
-	u32	IQK_BB_REG_92C[IQK_BB_REG_NUM] = {
-		REG_OFDM_0_TRX_PATH_ENABLE,		REG_OFDM_0_TR_MUX_PAR,
-		REG_FPGA0_XCD_RF_INTERFACE_SW,	REG_CONFIG_ANT_A,	REG_CONFIG_ANT_B,
-		REG_FPGA0_XAB_RF_INTERFACE_SW,	REG_FPGA0_XA_RF_INTERFACE_OE,
-		REG_FPGA0_XB_RF_INTERFACE_OE, REG_CCK_0_AFE_SETTING
-	};
-	u32	cnt_iqk_fail = 0;
+	u32 i;
+	u8 path_s1_ok = 0x0, path_s0_ok = 0x0;
+	u8 tmp0xc50 = (u8)odm_get_bb_reg(dm, R_0xc50, MASKBYTE0);
+	u8 tmp0xc58 = (u8)odm_get_bb_reg(dm, R_0xc58, MASKBYTE0);
+	u32 ADDA_REG[IQK_ADDA_REG_NUM] = {
+		R_0x85c, R_0xe6c,
+		R_0xe70, R_0xe74,
+		R_0xe78, R_0xe7c,
+		R_0xe80, R_0xe84,
+		R_0xe88, R_0xe8c,
+		R_0xed0, R_0xed4,
+		R_0xed8, R_0xedc,
+		R_0xee0, R_0xeec};
+	u32 IQK_MAC_REG[IQK_MAC_REG_NUM] = {
+		R_0x522, R_0x550,
+		R_0x551, R_0x40};
+
+	u32 IQK_BB_REG_92C[IQK_BB_REG_NUM] = {
+		R_0xc04, R_0xc08,
+		R_0x874, R_0xb68, R_0xb6c,
+		R_0x870, R_0x860,
+		R_0x864, R_0xa04};
+	u32 cnt_iqk_fail = 0;
 	u32 retry_count;
-	
+
 #if (DM_ODM_SUPPORT_TYPE & (ODM_AP))
 	retry_count = 2;
 #elif (DM_ODM_SUPPORT_TYPE & (ODM_WIN))
@@ -1965,7 +1988,7 @@ _phy_iq_calibrate_8723d(
 	retry_count = 2;
 #endif
 #elif (DM_ODM_SUPPORT_TYPE & (ODM_CE))
-	if (*(p_dm->p_mp_mode))
+	if (*dm->mp_mode)
 		retry_count = 9;
 	else
 		retry_count = 2;
@@ -1973,262 +1996,261 @@ _phy_iq_calibrate_8723d(
 
 #if (DM_ODM_SUPPORT_TYPE & (ODM_AP))
 #ifdef MP_TEST
-	if (*(p_dm->p_mp_mode))
+	if (*dm->mp_mode)
 		retry_count = 9;
 #endif
 #endif
 
 	if (t == 0) {
-		_phy_save_adda_registers_8723d(p_dm, ADDA_REG, p_dm->rf_calibrate_info.ADDA_backup, IQK_ADDA_REG_NUM);
-		_phy_save_mac_registers_8723d(p_dm, IQK_MAC_REG, p_dm->rf_calibrate_info.IQK_MAC_backup);
-		_phy_save_adda_registers_8723d(p_dm, IQK_BB_REG_92C, p_dm->rf_calibrate_info.IQK_BB_backup, IQK_BB_REG_NUM);
+		_phy_save_adda_registers_8723d(dm, ADDA_REG, dm->rf_calibrate_info.ADDA_backup, IQK_ADDA_REG_NUM);
+		_phy_save_mac_registers_8723d(dm, IQK_MAC_REG, dm->rf_calibrate_info.IQK_MAC_backup);
+		_phy_save_adda_registers_8723d(dm, IQK_BB_REG_92C, dm->rf_calibrate_info.IQK_BB_backup, IQK_BB_REG_NUM);
 	}
-	ODM_RT_TRACE(p_dm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("IQ Calibration for 1T1R_S0/S1 for %d times\n", t));
+	RF_DBG(dm, DBG_RF_IQK, "IQ Calibration for 1T1R_S0/S1 for %d times\n",
+	       t);
 
-	_phy_path_adda_on_8723d(p_dm, ADDA_REG, true, is2T);
+	_phy_path_adda_on_8723d(dm, ADDA_REG, true, is2T);
 #if 0
 	if (t == 0)
-		p_dm->rf_calibrate_info.is_rf_pi_enable = (u8)odm_get_bb_reg(p_dm, REG_FPGA0_XA_HSSI_PARAMETER1, BIT(8));
+		dm->rf_calibrate_info.is_rf_pi_enable = (u8)odm_get_bb_reg(dm, R_0x820, BIT(8));
 
-	if (!p_dm->rf_calibrate_info.is_rf_pi_enable) {
+	if (!dm->rf_calibrate_info.is_rf_pi_enable) {
 		/*  Switch BB to PI mode to do IQ Calibration. */
 #if !(DM_ODM_SUPPORT_TYPE & ODM_AP)
-		_phy_pi_mode_switch_8723d(p_adapter, true);
+		_phy_pi_mode_switch_8723d(adapter, true);
 #else
-		_phy_pi_mode_switch_8723d(p_dm, true);
+		_phy_pi_mode_switch_8723d(dm, true);
 #endif
 	}
 #endif
-	_phy_mac_setting_calibration_8723d(p_dm, IQK_MAC_REG, p_dm->rf_calibrate_info.IQK_MAC_backup);
+	_phy_mac_setting_calibration_8723d(dm, IQK_MAC_REG, dm->rf_calibrate_info.IQK_MAC_backup);
 	/*BB setting*/
-	/*odm_set_bb_reg(p_dm, REG_FPGA0_RFMOD, BIT24, 0x00);*/
-	odm_set_bb_reg(p_dm, REG_CCK_0_AFE_SETTING, 0x0f000000, 0xf);
-	odm_set_bb_reg(p_dm, REG_OFDM_0_TRX_PATH_ENABLE, MASKDWORD, 0x03a05611);
-	odm_set_bb_reg(p_dm, REG_OFDM_0_TR_MUX_PAR, MASKDWORD, 0x000800e4);
-	odm_set_bb_reg(p_dm, REG_FPGA0_XCD_RF_INTERFACE_SW, MASKDWORD, 0x25204200);
+#if 0
+	/*odm_set_bb_reg(dm, REG_FPGA0_RFMOD, BIT24, 0x00);*/
+#endif
+	odm_set_bb_reg(dm, R_0xa04, 0x0f000000, 0xf);
+	odm_set_bb_reg(dm, R_0xc04, MASKDWORD, 0x03a05611);
+	odm_set_bb_reg(dm, R_0xc08, MASKDWORD, 0x000800e4);
+	odm_set_bb_reg(dm, R_0x874, MASKDWORD, 0x25204200);
 
 	/*IQ calibration setting*/
-	/*ODM_RT_TRACE(p_dm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("IQK setting!\n"));	*/
-	odm_set_bb_reg(p_dm, REG_FPGA0_IQK, 0xffffff00, 0x808000);
-	odm_set_bb_reg(p_dm, REG_TX_IQK, MASKDWORD, 0x01007c00);
-	odm_set_bb_reg(p_dm, REG_RX_IQK, MASKDWORD, 0x01004800);
+#if 0
+	/*RF_DBG(dm,DBG_RF_IQK, "IQK setting!\n");	*/
+#endif
+	odm_set_bb_reg(dm, R_0xe28, 0xffffff00, 0x808000);
+	odm_set_bb_reg(dm, R_0xe40, MASKDWORD, 0x01007c00);
+	odm_set_bb_reg(dm, R_0xe44, MASKDWORD, 0x01004800);
 
 	if (is2T) {
-		_phy_path_b_stand_by_8723d(p_dm);
-		_phy_path_adda_on_8723d(p_dm, ADDA_REG, false, is2T);
+		_phy_path_b_stand_by_8723d(dm);
+		_phy_path_adda_on_8723d(dm, ADDA_REG, false, is2T);
 	}
 
 #if 1
-	for (i = 0 ; i < retry_count ; i++) {
-		path_s1_ok = phy_path_s1_iqk_8723d(p_dm, is2T);
+	for (i = 0; i < retry_count; i++) {
+		path_s1_ok = phy_path_s1_iqk_8723d(dm, is2T);
 		if (path_s1_ok == 0x01) {
-			ODM_RT_TRACE(p_dm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("path S1 Tx IQK Success!!\n"));
-			result[t][0] = (odm_get_bb_reg(p_dm, REG_TX_POWER_BEFORE_IQK_A, MASKDWORD) & 0x3FF0000) >> 16;
-			result[t][1] = (odm_get_bb_reg(p_dm, REG_TX_POWER_AFTER_IQK_A, MASKDWORD) & 0x3FF0000) >> 16;
+			RF_DBG(dm, DBG_RF_IQK, "path S1 Tx IQK Success!!\n");
+			result[t][0] = (odm_get_bb_reg(dm, R_0xe94, MASKDWORD) & 0x3FF0000) >> 16;
+			result[t][1] = (odm_get_bb_reg(dm, R_0xe9c, MASKDWORD) & 0x3FF0000) >> 16;
 			break;
-		} else {
-			ODM_RT_TRACE(p_dm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("path S1 Tx IQK Fail!!\n"));
-			result[t][0] = 0x100;
-			result[t][1] = 0x0;
-			cnt_iqk_fail++;
 		}
+
+		RF_DBG(dm, DBG_RF_IQK, "path S1 Tx IQK Fail!!\n");
+		result[t][0] = 0x100;
+		result[t][1] = 0x0;
+		cnt_iqk_fail++;
 #if 0
 		else if (i == (retry_count - 1) && path_s1_ok == 0x01) {
 			RT_DISP(FINIT, INIT_IQK, ("path S1 IQK Only  Tx Success!!\n"));
 
-			result[t][0] = (odm_get_bb_reg(p_dm, REG_TX_POWER_BEFORE_IQK_A, MASKDWORD) & 0x3FF0000) >> 16;
-			result[t][1] = (odm_get_bb_reg(p_dm, REG_TX_POWER_AFTER_IQK_A, MASKDWORD) & 0x3FF0000) >> 16;
+			result[t][0] = (odm_get_bb_reg(dm, R_0xe94, MASKDWORD) & 0x3FF0000) >> 16;
+			result[t][1] = (odm_get_bb_reg(dm, R_0xe9c, MASKDWORD) & 0x3FF0000) >> 16;
 		}
 #endif
 	}
 #endif
 #if 1
-	for (i = 0 ; i < retry_count ; i++) {
-		path_s1_ok = phy_path_s1_rx_iqk_8723d(p_dm, is2T);
+	for (i = 0; i < retry_count; i++) {
+		path_s1_ok = phy_path_s1_rx_iqk_8723d(dm, is2T);
 		if (path_s1_ok == 0x03) {
-			ODM_RT_TRACE(p_dm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("path S1 Rx IQK Success!!\n"));
-			result[t][2] = (odm_get_bb_reg(p_dm, REG_RX_POWER_BEFORE_IQK_A_2, MASKDWORD) & 0x3FF0000) >> 16;
-			result[t][3] = (odm_get_bb_reg(p_dm, REG_RX_POWER_AFTER_IQK_A_2, MASKDWORD) & 0x3FF0000) >> 16;
+			RF_DBG(dm, DBG_RF_IQK, "path S1 Rx IQK Success!!\n");
+			result[t][2] = (odm_get_bb_reg(dm, R_0xea4, MASKDWORD) & 0x3FF0000) >> 16;
+			result[t][3] = (odm_get_bb_reg(dm, R_0xeac, MASKDWORD) & 0x3FF0000) >> 16;
 			break;
-		} else {
-			ODM_RT_TRACE(p_dm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("path S1 Rx IQK Fail!!\n"));
-			result[t][2] = 0x100;
-			result[t][3] = 0x0;
-			cnt_iqk_fail++;
 		}
+
+		RF_DBG(dm, DBG_RF_IQK, "path S1 Rx IQK Fail!!\n");
+		result[t][2] = 0x100;
+		result[t][3] = 0x0;
+		cnt_iqk_fail++;
 	}
-	if (0x00 == path_s1_ok)
-		ODM_RT_TRACE(p_dm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("path S1 IQK failed!!\n"));
+
+	if (path_s1_ok == 0x00)
+		RF_DBG(dm, DBG_RF_IQK, "path S1 IQK failed!!\n");
 #endif
 	if (is2T) {
-		_phy_path_a_stand_by_8723d(p_dm);
-		_phy_path_adda_on_8723d(p_dm, ADDA_REG, false, is2T);
-
-		odm_set_bb_reg(p_dm, REG_FPGA0_IQK, 0xffffff00, 0x808000);
-		odm_set_bb_reg(p_dm, REG_TX_IQK, MASKDWORD, 0x01007c00);
-		odm_set_bb_reg(p_dm, REG_RX_IQK, MASKDWORD, 0x01004800);
+		_phy_path_a_stand_by_8723d(dm);
+		_phy_path_adda_on_8723d(dm, ADDA_REG, false, is2T);
 
+		odm_set_bb_reg(dm, R_0xe28, 0xffffff00, 0x808000);
+		odm_set_bb_reg(dm, R_0xe40, MASKDWORD, 0x01007c00);
+		odm_set_bb_reg(dm, R_0xe44, MASKDWORD, 0x01004800);
 
 #if 1
-		for (i = 0 ; i < retry_count ; i++) {
-			path_s0_ok = phy_path_s0_iqk_8723d(p_dm);
+		for (i = 0; i < retry_count; i++) {
+			path_s0_ok = phy_path_s0_iqk_8723d(dm);
 			if (path_s0_ok == 0x01) {
-				ODM_RT_TRACE(p_dm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("path S0 Tx IQK Success!!\n"));
-				result[t][4] = (odm_get_bb_reg(p_dm, 0xe94, MASKDWORD) & 0x3FF0000) >> 16;
-				result[t][5] = (odm_get_bb_reg(p_dm, 0xe9c, MASKDWORD) & 0x3FF0000) >> 16;
+				RF_DBG(dm, DBG_RF_IQK,
+				       "path S0 Tx IQK Success!!\n");
+				result[t][4] = (odm_get_bb_reg(dm, R_0xe94, MASKDWORD) & 0x3FF0000) >> 16;
+				result[t][5] = (odm_get_bb_reg(dm, R_0xe9c, MASKDWORD) & 0x3FF0000) >> 16;
 				break;
-			} else {
-				ODM_RT_TRACE(p_dm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("path S0 Tx IQK Fail!!\n"));
-				result[t][4] = 0x100;
-				result[t][5] = 0x0;
-				cnt_iqk_fail++;
 			}
+
+			RF_DBG(dm, DBG_RF_IQK, "path S0 Tx IQK Fail!!\n");
+			result[t][4] = 0x100;
+			result[t][5] = 0x0;
+			cnt_iqk_fail++;
 #if 0
 			else if (i == (retry_count - 1) && path_s1_ok == 0x01) {
 				RT_DISP(FINIT, INIT_IQK, ("path S0 IQK Only  Tx Success!!\n"));
 
-				result[t][0] = (odm_get_bb_reg(p_dm, REG_TX_POWER_BEFORE_IQK_B, MASKDWORD) & 0x3FF0000) >> 16;
-				result[t][1] = (odm_get_bb_reg(p_dm, REG_TX_POWER_AFTER_IQK_B, MASKDWORD) & 0x3FF0000) >> 16;
+				result[t][0] = (odm_get_bb_reg(dm, REG_TX_POWER_BEFORE_IQK_B, MASKDWORD) & 0x3FF0000) >> 16;
+				result[t][1] = (odm_get_bb_reg(dm, REG_TX_POWER_AFTER_IQK_B, MASKDWORD) & 0x3FF0000) >> 16;
 			}
 #endif
 		}
 #endif
 
 #if 1
-		for (i = 0 ; i < retry_count ; i++) {
-			path_s0_ok = phy_path_s0_rx_iqk_8723d(p_dm, is2T);
+		for (i = 0; i < retry_count; i++) {
+			path_s0_ok = phy_path_s0_rx_iqk_8723d(dm, is2T);
 			if (path_s0_ok == 0x03) {
-				ODM_RT_TRACE(p_dm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("path S0 Rx IQK Success!!\n"));
-				/*				result[t][0] = (odm_get_bb_reg(p_dm, REG_TX_POWER_BEFORE_IQK_A, MASKDWORD)&0x3FF0000)>>16;*/
-				/*				result[t][1] = (odm_get_bb_reg(p_dm, REG_TX_POWER_AFTER_IQK_A, MASKDWORD)&0x3FF0000)>>16;*/
-				result[t][6] = (odm_get_bb_reg(p_dm, 0xea4, MASKDWORD) & 0x3FF0000) >> 16;
-				result[t][7] = (odm_get_bb_reg(p_dm, 0xeac, MASKDWORD) & 0x3FF0000) >> 16;
+				RF_DBG(dm, DBG_RF_IQK,
+				       "path S0 Rx IQK Success!!\n");
+#if 0
+				/*				result[t][0] = (odm_get_bb_reg(dm, R_0xe94, MASKDWORD)&0x3FF0000)>>16;*/
+				/*				result[t][1] = (odm_get_bb_reg(dm, R_0xe9c, MASKDWORD)&0x3FF0000)>>16;*/
+#endif
+				result[t][6] = (odm_get_bb_reg(dm, R_0xea4, MASKDWORD) & 0x3FF0000) >> 16;
+				result[t][7] = (odm_get_bb_reg(dm, R_0xeac, MASKDWORD) & 0x3FF0000) >> 16;
 				break;
-			} else {
-				ODM_RT_TRACE(p_dm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("path S0 Rx IQK Fail!!\n"));
-				result[t][6] = 0x100;
-				result[t][7] = 0x0;
-				cnt_iqk_fail++;
 			}
+
+			RF_DBG(dm, DBG_RF_IQK, "path S0 Rx IQK Fail!!\n");
+			result[t][6] = 0x100;
+			result[t][7] = 0x0;
+			cnt_iqk_fail++;
 		}
 
-		if (0x00 == path_s0_ok)
-			ODM_RT_TRACE(p_dm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("path S0 IQK failed!!\n"));
+		if (path_s0_ok == 0x00)
+			RF_DBG(dm, DBG_RF_IQK, "path S0 IQK failed!!\n");
 #endif
 	}
-	ODM_RT_TRACE(p_dm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("IQK:Back to BB mode, load original value!\n"));
-	odm_set_bb_reg(p_dm, REG_FPGA0_IQK, 0xffffff00, 0x000000);
+	RF_DBG(dm, DBG_RF_IQK, "IQK:Back to BB mode, load original value!\n");
+	odm_set_bb_reg(dm, R_0xe28, 0xffffff00, 0x000000);
 
 	if (t != 0) {
-		_phy_reload_adda_registers_8723d(p_dm, ADDA_REG, p_dm->rf_calibrate_info.ADDA_backup, IQK_ADDA_REG_NUM);
+		_phy_reload_adda_registers_8723d(dm, ADDA_REG, dm->rf_calibrate_info.ADDA_backup, IQK_ADDA_REG_NUM);
 		/* Reload MAC parameters*/
-		_phy_reload_mac_registers_8723d(p_dm, IQK_MAC_REG, p_dm->rf_calibrate_info.IQK_MAC_backup);
-		_phy_reload_adda_registers_8723d(p_dm, IQK_BB_REG_92C, p_dm->rf_calibrate_info.IQK_BB_backup, IQK_BB_REG_NUM);
+		_phy_reload_mac_registers_8723d(dm, IQK_MAC_REG, dm->rf_calibrate_info.IQK_MAC_backup);
+		_phy_reload_adda_registers_8723d(dm, IQK_BB_REG_92C, dm->rf_calibrate_info.IQK_BB_backup, IQK_BB_REG_NUM);
 
-		odm_set_bb_reg(p_dm, 0xc50, MASKBYTE0, 0x50);
-		odm_set_bb_reg(p_dm, 0xc50, MASKBYTE0, tmp0xc50);
+		odm_set_bb_reg(dm, R_0xc50, MASKBYTE0, 0x50);
+		odm_set_bb_reg(dm, R_0xc50, MASKBYTE0, tmp0xc50);
 		if (is2T) {
-			odm_set_bb_reg(p_dm, 0xc58, MASKBYTE0, 0x50);
-			odm_set_bb_reg(p_dm, 0xc58, MASKBYTE0, tmp0xc58);
+			odm_set_bb_reg(dm, R_0xc58, MASKBYTE0, 0x50);
+			odm_set_bb_reg(dm, R_0xc58, MASKBYTE0, tmp0xc58);
 		}
-		odm_set_bb_reg(p_dm, REG_TX_IQK_TONE_A, MASKDWORD, 0x01008c00);
-		odm_set_bb_reg(p_dm, REG_RX_IQK_TONE_A, MASKDWORD, 0x01008c00);
+		odm_set_bb_reg(dm, R_0xe30, MASKDWORD, 0x01008c00);
+		odm_set_bb_reg(dm, R_0xe34, MASKDWORD, 0x01008c00);
 	}
-	p_dm->n_iqk_cnt++;
+	dm->n_iqk_cnt++;
 	if (cnt_iqk_fail == 0)
-		p_dm->n_iqk_ok_cnt++;
+		dm->n_iqk_ok_cnt++;
 	else
-		p_dm->n_iqk_fail_cnt = p_dm->n_iqk_fail_cnt + cnt_iqk_fail;
-	ODM_RT_TRACE(p_dm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("_phy_iq_calibrate_8723d() <==\n"));
+		dm->n_iqk_fail_cnt = dm->n_iqk_fail_cnt + cnt_iqk_fail;
+	RF_DBG(dm, DBG_RF_IQK, "%s <==\n", __func__);
 }
 
-
-void
-_phy_lc_calibrate_8723d(
-	struct PHY_DM_STRUCT		*p_dm,
-	boolean	is2T
-)
+void _phy_lc_calibrate_8723d(struct dm_struct *dm, boolean is2T)
 {
-	u8	tmp_reg;
-	u32	rf_bmode = 0, lc_cal, cnt;
+	u8 tmp_reg;
+	u32 lc_cal, cnt;
 
-	tmp_reg = odm_read_1byte(p_dm, 0xd03);
+	tmp_reg = odm_read_1byte(dm, 0xd03);
 	if ((tmp_reg & 0x70) != 0)
-		odm_write_1byte(p_dm, 0xd03, tmp_reg & 0x8F);
+		odm_write_1byte(dm, 0xd03, tmp_reg & 0x8F);
 	else
-		odm_write_1byte(p_dm, REG_TXPAUSE, 0xFF);
+		odm_write_1byte(dm, REG_TXPAUSE, 0xFF);
 	/*backup RF0x18*/
-	lc_cal = odm_get_rf_reg(p_dm, RF_PATH_A, RF_CHNLBW, RFREGOFFSETMASK);
+	lc_cal = odm_get_rf_reg(dm, RF_PATH_A, RF_CHNLBW, RFREGOFFSETMASK);
 	/*Start LCK*/
-	odm_set_rf_reg(p_dm, RF_PATH_A, RF_CHNLBW, RFREGOFFSETMASK, lc_cal | 0x08000);
+	odm_set_rf_reg(dm, RF_PATH_A, RF_CHNLBW, RFREGOFFSETMASK, lc_cal | 0x08000);
 	for (cnt = 0; cnt < 100; cnt++) {
-		if (odm_get_rf_reg(p_dm, RF_PATH_A, RF_CHNLBW, 0x8000) != 0x1)
+		if (odm_get_rf_reg(dm, RF_PATH_A, RF_CHNLBW, 0x8000) != 0x1)
 			break;
 		ODM_delay_ms(10);
 	}
 	/* Recover channel number*/
-	odm_set_rf_reg(p_dm, RF_PATH_A, RF_CHNLBW, RFREGOFFSETMASK, lc_cal);
+	odm_set_rf_reg(dm, RF_PATH_A, RF_CHNLBW, RFREGOFFSETMASK, lc_cal);
 	/*Restore original situation*/
 	if ((tmp_reg & 0x70) != 0)
-		odm_write_1byte(p_dm, 0xd03, tmp_reg);
+		odm_write_1byte(dm, 0xd03, tmp_reg);
 	else
-		odm_write_1byte(p_dm, REG_TXPAUSE, 0x00);
+		odm_write_1byte(dm, REG_TXPAUSE, 0x00);
 }
 
 /* IQK version:0x2    20171109*/
 
-void
-phy_iq_calibrate_8723d(
-	void		*p_dm_void,
-	boolean	is_recovery
-)
+void phy_iq_calibrate_8723d(void *dm_void, boolean is_recovery)
 {
-	struct PHY_DM_STRUCT	*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	u16			count = 0;
-	s32			result[4][8];
-	u8			i, final_candidate, indexforchannel;
-	boolean			is_path_s1_ok, is_path_s0_ok;
-	s32			rege94_s1, rege9c_s1, regea4_s1, regeac_s1, rege94_s0, rege9c_s0, regea4_s0, regeac_s0, reg_tmp = 0;
-	s32			regc80, regc94, regc14, regca0, regcd0, regcd4, regcd8;
-	boolean			is12simular, is13simular, is23simular;
-	u32			IQK_BB_REG_92C[IQK_BB_REG_NUM] = {
-		REG_OFDM_0_XA_RX_IQ_IMBALANCE,	REG_OFDM_0_XB_RX_IQ_IMBALANCE,
-		REG_OFDM_0_ECCA_THRESHOLD,	REG_OFDM_0_AGC_RSSI_TABLE,
-		REG_OFDM_0_XA_TX_IQ_IMBALANCE,	REG_OFDM_0_XB_TX_IQ_IMBALANCE,
-		REG_OFDM_0_XC_TX_AFE,			REG_OFDM_0_XD_TX_AFE,
-		REG_OFDM_0_RX_IQ_EXT_ANTA
-	};
-	u32			path_sel_bb_phy_iqk;
-	u32			original_path, original_gnt, ori_path_ctrl;
-	u32			iqk_fail_b, iqk_fail_a;
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	s32 result[4][8];
+	u8 i, final_candidate, indexforchannel;
+	boolean is_path_s1_ok, is_path_s0_ok;
+	s32 rege94_s1, rege9c_s1, regea4_s1, regeac_s1, rege94_s0, rege9c_s0, regea4_s0, regeac_s0, reg_tmp = 0;
+	s32 regc80, regc94, regc14, regca0, regcd0, regcd4, regcd8;
+	boolean is12simular, is13simular, is23simular;
+	u32 IQK_BB_REG_92C[IQK_BB_REG_NUM] = {
+		R_0xc14, R_0xc1c,
+		R_0xc4c, R_0xc78,
+		R_0xc80, R_0xc88,
+		R_0xc94, R_0xc9c,
+		R_0xca0};
+	u32 path_sel_bb_phy_iqk;
+	u32 original_path, original_gnt, ori_path_ctrl;
+	u32 iqk_fail_b, iqk_fail_a;
 
 #if 1
-	ODM_RT_TRACE(p_dm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("================ IQK Start ===================\n"));
+	RF_DBG(dm, DBG_RF_IQK,
+	       "================ IQK Start ===================\n");
 
-	iqk_fail_b = p_dm->n_iqk_fail_cnt;
+	iqk_fail_b = dm->n_iqk_fail_cnt;
 
-	ODM_RT_TRACE(p_dm, ODM_COMP_INIT, ODM_DBG_LOUD, ("=====>phy_iq_calibrate_8723d\n"));
+	RF_DBG(dm, DBG_RF_INIT, "=====>%s\n", __func__);
 
-	path_sel_bb_phy_iqk = odm_get_bb_reg(p_dm, 0x948, MASKDWORD);
+	path_sel_bb_phy_iqk = odm_get_bb_reg(dm, R_0x948, MASKDWORD);
 
 #if (DM_ODM_SUPPORT_TYPE & (ODM_CE | ODM_AP))
-	if (is_recovery)
+	if (is_recovery) {
 #else
-	if (is_recovery && (!p_dm->is_in_hct_test))
+	if (is_recovery && !dm->is_in_hct_test) {
 #endif
-	{
-		ODM_RT_TRACE(p_dm, ODM_COMP_INIT, ODM_DBG_LOUD, ("phy_iq_calibrate_8723d: Return due to is_recovery!\n"));
-		_phy_reload_adda_registers_8723d(p_dm, IQK_BB_REG_92C, p_dm->rf_calibrate_info.IQK_BB_backup_recover, 9);
+		RF_DBG(dm, DBG_RF_INIT, "%s: Return due to is_recovery!\n",
+		       __func__);
+		_phy_reload_adda_registers_8723d(dm, IQK_BB_REG_92C, dm->rf_calibrate_info.IQK_BB_backup_recover, 9);
 		return;
 	}
 	/*Check & wait if BT is doing IQK*/
-	if (*(p_dm->p_mp_mode) == false)
-		_phy_check_coex_status_8723d(p_dm, true);
+	if (!(*dm->mp_mode))
+		_phy_check_coex_status_8723d(dm, true);
 
-	ODM_RT_TRACE(p_dm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("IQK:Start!!!\n"));
-	odm_acquire_spin_lock(p_dm, RT_IQK_SPINLOCK);
-	p_dm->rf_calibrate_info.is_iqk_in_progress = true;
-	odm_release_spin_lock(p_dm, RT_IQK_SPINLOCK);
+	RF_DBG(dm, DBG_RF_IQK, "IQK:Start!!!\n");
+	odm_acquire_spin_lock(dm, RT_IQK_SPINLOCK);
+	dm->rf_calibrate_info.is_iqk_in_progress = true;
+	odm_release_spin_lock(dm, RT_IQK_SPINLOCK);
 
 	for (i = 0; i < 8; i++) {
 		result[0][i] = 0;
@@ -2247,52 +2269,62 @@ phy_iq_calibrate_8723d(
 	for (i = 0; i < 3; i++) {
 #if 1
 		/*set path control to WL*/
-		ori_path_ctrl = odm_get_mac_reg(p_dm, 0x64, MASKBYTE3);  /*save 0x67*/
-		ODM_RT_TRACE(p_dm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("[IQK]original 0x67 = 0x%x\n", ori_path_ctrl));
-		odm_set_mac_reg(p_dm, 0x64, BIT(31), 0x1);
-		ODM_RT_TRACE(p_dm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("[IQK]set 0x67 = 0x%x\n", odm_get_mac_reg(p_dm, 0x64, MASKBYTE3)));
+		ori_path_ctrl = odm_get_mac_reg(dm, R_0x64, MASKBYTE3); /*save 0x67*/
+		RF_DBG(dm, DBG_RF_IQK, "[IQK]original 0x67 = 0x%x\n",
+		       ori_path_ctrl);
+		odm_set_mac_reg(dm, R_0x64, BIT(31), 0x1);
+		RF_DBG(dm, DBG_RF_IQK, "[IQK]set 0x67 = 0x%x\n",
+		       odm_get_mac_reg(dm, R_0x64, MASKBYTE3));
 		/*backup path & GNT value */
-		original_path = odm_get_mac_reg(p_dm, REG_LTECOEX_PATH_CONTROL, MASKDWORD);  /*save 0x70*/
-		odm_set_bb_reg(p_dm, REG_LTECOEX_CTRL, MASKDWORD, 0x800f0038);
+		original_path = odm_get_mac_reg(dm, REG_LTECOEX_PATH_CONTROL, MASKDWORD); /*save 0x70*/
+		odm_set_bb_reg(dm, REG_LTECOEX_CTRL, MASKDWORD, 0x800f0038);
 		ODM_delay_ms(1);
-		original_gnt = odm_get_bb_reg(p_dm, REG_LTECOEX_READ_DATA, MASKDWORD);  /*save 0x38*/
-		ODM_RT_TRACE(p_dm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("[IQK]OriginalGNT = 0x%x\n", original_gnt));
+		original_gnt = odm_get_bb_reg(dm, REG_LTECOEX_READ_DATA, MASKDWORD); /*save 0x38*/
+		RF_DBG(dm, DBG_RF_IQK, "[IQK]OriginalGNT = 0x%x\n",
+		       original_gnt);
 		/*set GNT_WL=1/GNT_BT=1  and path owner to WiFi for pause BT traffic*/
-		odm_set_bb_reg(p_dm, REG_LTECOEX_WRITE_DATA, MASKDWORD, 0x0000ff00);
-		odm_set_bb_reg(p_dm, REG_LTECOEX_CTRL, MASKDWORD, 0xc0020038);	/*0x38[15:8] = 0x77*/
-		odm_set_mac_reg(p_dm, REG_LTECOEX_PATH_CONTROL, BIT(26), 0x1);
+		odm_set_bb_reg(dm, REG_LTECOEX_WRITE_DATA, MASKDWORD, 0x0000ff00);
+		odm_set_bb_reg(dm, REG_LTECOEX_CTRL, MASKDWORD, 0xc0020038); /*0x38[15:8] = 0x77*/
+		odm_set_mac_reg(dm, REG_LTECOEX_PATH_CONTROL, BIT(26), 0x1);
 #endif
-		_phy_iq_calibrate_8723d(p_dm, result, i, true);
+		_phy_iq_calibrate_8723d(dm, result, i, true);
 #if 1
 		/*Restore GNT_WL/GNT_BT  and path owner*/
-		odm_set_bb_reg(p_dm, REG_LTECOEX_WRITE_DATA, MASKDWORD, original_gnt);
-		odm_set_bb_reg(p_dm, REG_LTECOEX_CTRL, MASKDWORD, 0xc00f0038);
-		odm_set_mac_reg(p_dm, REG_LTECOEX_PATH_CONTROL, 0xffffffff, original_path);
+		odm_set_bb_reg(dm, REG_LTECOEX_WRITE_DATA, MASKDWORD, original_gnt);
+		odm_set_bb_reg(dm, REG_LTECOEX_CTRL, MASKDWORD, 0xc00f0038);
+		odm_set_mac_reg(dm, REG_LTECOEX_PATH_CONTROL, 0xffffffff, original_path);
 		/*Restore path control owner*/
-		odm_set_mac_reg(p_dm, 0x64, MASKBYTE3, ori_path_ctrl);
-		ODM_RT_TRACE(p_dm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("[IQK]restore 0x67 = 0x%x\n", odm_get_mac_reg(p_dm, 0x64, MASKBYTE3)));
+		odm_set_mac_reg(dm, R_0x64, MASKBYTE3, ori_path_ctrl);
+		RF_DBG(dm, DBG_RF_IQK, "[IQK]restore 0x67 = 0x%x\n",
+		       odm_get_mac_reg(dm, R_0x64, MASKBYTE3));
 #endif
 		if (i == 1) {
-			is12simular = phy_simularity_compare_8723d(p_dm, result, 0, 1);
+			is12simular = phy_simularity_compare_8723d(dm, result, 0, 1);
 			if (is12simular) {
 				final_candidate = 0;
-				ODM_RT_TRACE(p_dm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("IQK: is12simular final_candidate is %x\n", final_candidate));
+				RF_DBG(dm, DBG_RF_IQK,
+				       "IQK: is12simular final_candidate is %x\n",
+				       final_candidate);
 				break;
 			}
 		}
 
 		if (i == 2) {
-			is13simular = phy_simularity_compare_8723d(p_dm, result, 0, 2);
+			is13simular = phy_simularity_compare_8723d(dm, result, 0, 2);
 			if (is13simular) {
 				final_candidate = 0;
-				ODM_RT_TRACE(p_dm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("IQK: is13simular final_candidate is %x\n", final_candidate));
+				RF_DBG(dm, DBG_RF_IQK,
+				       "IQK: is13simular final_candidate is %x\n",
+				       final_candidate);
 
 				break;
 			}
-			is23simular = phy_simularity_compare_8723d(p_dm, result, 1, 2);
+			is23simular = phy_simularity_compare_8723d(dm, result, 1, 2);
 			if (is23simular) {
 				final_candidate = 1;
-				ODM_RT_TRACE(p_dm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("IQK: is23simular final_candidate is %x\n", final_candidate));
+				RF_DBG(dm, DBG_RF_IQK,
+				       "IQK: is23simular final_candidate is %x\n",
+				       final_candidate);
 			} else {
 				for (i = 0; i < 8; i++)
 					reg_tmp += result[3][i];
@@ -2314,203 +2346,188 @@ phy_iq_calibrate_8723d(
 		rege9c_s0 = result[i][5];
 		regea4_s0 = result[i][6];
 		regeac_s0 = result[i][7];
-		ODM_RT_TRACE(p_dm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("[IQK] rege94_s1=%x rege9c_s1=%x regea4_s1=%x regeac_s1=%x rege94_s0=%x rege9c_s0=%x regea4_s0=%x regeac_s0=%x\n ", rege94_s1, rege9c_s1, regea4_s1, regeac_s1, rege94_s0, rege9c_s0, regea4_s0, regeac_s0));
+		RF_DBG(dm, DBG_RF_IQK,
+		       "[IQK] rege94_s1=%x rege9c_s1=%x regea4_s1=%x regeac_s1=%x rege94_s0=%x rege9c_s0=%x regea4_s0=%x regeac_s0=%x\n ",
+		       rege94_s1, rege9c_s1, regea4_s1, regeac_s1, rege94_s0,
+		       rege9c_s0, regea4_s0, regeac_s0);
 	}
 
 	if (final_candidate != 0xff) {
-		p_dm->rf_calibrate_info.rege94 = rege94_s1 = result[final_candidate][0];
-		p_dm->rf_calibrate_info.rege9c = rege9c_s1 = result[final_candidate][1];
+		dm->rf_calibrate_info.rege94 = result[final_candidate][0];
+		rege94_s1 = result[final_candidate][0];
+		dm->rf_calibrate_info.rege9c = result[final_candidate][1];
+		rege9c_s1 = result[final_candidate][1];
 		regea4_s1 = result[final_candidate][2];
 		regeac_s1 = result[final_candidate][3];
-		p_dm->rf_calibrate_info.regeb4 = rege94_s0 = result[final_candidate][4];
-		p_dm->rf_calibrate_info.regebc = rege9c_s0 = result[final_candidate][5];
+		dm->rf_calibrate_info.regeb4 = result[final_candidate][4];
+		rege94_s0 = result[final_candidate][4];
+		dm->rf_calibrate_info.regebc = result[final_candidate][5];
+		rege9c_s0 = result[final_candidate][5];
 		regea4_s0 = result[final_candidate][6];
 		regeac_s0 = result[final_candidate][7];
-		ODM_RT_TRACE(p_dm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("[IQK] final_candidate is %x\n", final_candidate));
-		ODM_RT_TRACE(p_dm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("[IQK] TX1_X=%x TX1_Y=%x RX1_X=%x RX1_Y=%x TX0_X=%x TX0_Y=%x RX0_X=%x RX0_Y=%x\n ", rege94_s1, rege9c_s1, regea4_s1, regeac_s1, rege94_s0, rege9c_s0, regea4_s0, regeac_s0));
-		is_path_s1_ok = is_path_s0_ok = true;
+		RF_DBG(dm, DBG_RF_IQK, "[IQK] final_candidate is %x\n",
+		       final_candidate);
+		RF_DBG(dm, DBG_RF_IQK,
+		       "[IQK] TX1_X=%x TX1_Y=%x RX1_X=%x RX1_Y=%x TX0_X=%x TX0_Y=%x RX0_X=%x RX0_Y=%x\n ",
+		       rege94_s1, rege9c_s1, regea4_s1, regeac_s1, rege94_s0,
+		       rege9c_s0, regea4_s0, regeac_s0);
+		is_path_s1_ok = true;
+		is_path_s0_ok = true;
 	} else {
-		ODM_RT_TRACE(p_dm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("[IQK] FAIL use default value\n"));
-		p_dm->rf_calibrate_info.rege94 = p_dm->rf_calibrate_info.regeb4 = 0x100;
-		p_dm->rf_calibrate_info.rege9c = p_dm->rf_calibrate_info.regebc = 0x0;
+		RF_DBG(dm, DBG_RF_IQK, "[IQK] FAIL use default value\n");
+		dm->rf_calibrate_info.rege94 = 0x100;
+		dm->rf_calibrate_info.regeb4 = 0x100;
+		dm->rf_calibrate_info.rege9c = 0x0;
+		dm->rf_calibrate_info.regebc = 0x0;
 	}
 
 	if (rege94_s1 != 0)
-		_phy_path_s1_fill_iqk_matrix_8723d(p_dm, is_path_s1_ok, result, final_candidate, (regea4_s1 == 0));
+		_phy_path_s1_fill_iqk_matrix_8723d(dm, is_path_s1_ok, result, final_candidate, (regea4_s1 == 0));
 	if (rege94_s0 != 0)
-		_phy_path_s0_fill_iqk_matrix_8723d(p_dm, is_path_s0_ok, result, final_candidate, (regea4_s0 == 0));
-
-	iqk_fail_a= p_dm->n_iqk_fail_cnt;
-	if( iqk_fail_a - iqk_fail_b > 0 )
-		RT_TRACE(COMP_INIT, DBG_LOUD, ("[8723dIQK]n_iqk_fail_cnt+,IQK restore to default value !\n"));
-	
-	regc80 = odm_get_bb_reg(p_dm, 0xc80, MASKDWORD);
-	regc94 = odm_get_bb_reg(p_dm, 0xc94, MASKDWORD);
-	regc14 = odm_get_bb_reg(p_dm, 0xc14, MASKDWORD);
-	regca0 = odm_get_bb_reg(p_dm, 0xca0, MASKDWORD);
-	ODM_RT_TRACE(p_dm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("[IQK]0xc80 = 0x%x 0xc94 = 0x%x 0xc14 = 0x%x 0xca0 = 0x%x\n", regc80, regc94, regc14, regca0));
-
-	regcd0 = odm_get_bb_reg(p_dm, 0xcd0, MASKDWORD);
-	regcd4 = odm_get_bb_reg(p_dm, 0xcd4, MASKDWORD);
-	regcd8 = odm_get_bb_reg(p_dm, 0xcd8, MASKDWORD);
-	ODM_RT_TRACE(p_dm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("[IQK]0xcd0 = 0x%x 0xcd4 = 0x%x 0xcd8 = 0x%x\n", regcd0, regcd4, regcd8));
+		_phy_path_s0_fill_iqk_matrix_8723d(dm, is_path_s0_ok, result, final_candidate, (regea4_s0 == 0));
+
+	iqk_fail_a = dm->n_iqk_fail_cnt;
+	if (iqk_fail_a - iqk_fail_b > 0)
+		RF_DBG(dm, DBG_RF_IQK,
+		       "[8723dIQK]n_iqk_fail_cnt+,IQK restore to default value !\n");
+
+	regc80 = odm_get_bb_reg(dm, R_0xc80, MASKDWORD);
+	regc94 = odm_get_bb_reg(dm, R_0xc94, MASKDWORD);
+	regc14 = odm_get_bb_reg(dm, R_0xc14, MASKDWORD);
+	regca0 = odm_get_bb_reg(dm, R_0xca0, MASKDWORD);
+	RF_DBG(dm, DBG_RF_IQK,
+	       "[IQK]0xc80 = 0x%x 0xc94 = 0x%x 0xc14 = 0x%x 0xca0 = 0x%x\n",
+	       regc80, regc94, regc14, regca0);
+
+	regcd0 = odm_get_bb_reg(dm, R_0xcd0, MASKDWORD);
+	regcd4 = odm_get_bb_reg(dm, R_0xcd4, MASKDWORD);
+	regcd8 = odm_get_bb_reg(dm, R_0xcd8, MASKDWORD);
+	RF_DBG(dm, DBG_RF_IQK, "[IQK]0xcd0 = 0x%x 0xcd4 = 0x%x 0xcd8 = 0x%x\n",
+	       regcd0, regcd4, regcd8);
 #if !(DM_ODM_SUPPORT_TYPE & ODM_AP)
-	indexforchannel = odm_get_right_chnl_place_for_iqk(*p_dm->p_channel);
+	indexforchannel = odm_get_right_chnl_place_for_iqk(*dm->channel);
 #else
 	indexforchannel = 0;
 #endif
 
 	if (final_candidate < 4) {
 		for (i = 0; i < iqk_matrix_reg_num; i++)
-			p_dm->rf_calibrate_info.iqk_matrix_reg_setting[indexforchannel].value[0][i] = result[final_candidate][i];
-		p_dm->rf_calibrate_info.iqk_matrix_reg_setting[indexforchannel].is_iqk_done = true;
+			dm->rf_calibrate_info.iqk_matrix_reg_setting[indexforchannel].value[0][i] = result[final_candidate][i];
+		dm->rf_calibrate_info.iqk_matrix_reg_setting[indexforchannel].is_iqk_done = true;
 	}
-	ODM_RT_TRACE(p_dm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("\nIQK OK indexforchannel %d.\n", indexforchannel));
-	_phy_save_adda_registers_8723d(p_dm, IQK_BB_REG_92C, p_dm->rf_calibrate_info.IQK_BB_backup_recover, IQK_BB_REG_NUM);
+	RF_DBG(dm, DBG_RF_IQK, "\nIQK OK indexforchannel %d.\n",
+	       indexforchannel);
+	_phy_save_adda_registers_8723d(dm, IQK_BB_REG_92C, dm->rf_calibrate_info.IQK_BB_backup_recover, IQK_BB_REG_NUM);
 
-	if (*(p_dm->p_mp_mode) == false)
-		_phy_check_coex_status_8723d(p_dm, false);
+	if (!(*dm->mp_mode))
+		_phy_check_coex_status_8723d(dm, false);
 
-	odm_set_bb_reg(p_dm, 0x948, MASKDWORD, path_sel_bb_phy_iqk);
-	ODM_RT_TRACE(p_dm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("IQK finished\n"));
+	odm_set_bb_reg(dm, R_0x948, MASKDWORD, path_sel_bb_phy_iqk);
+	RF_DBG(dm, DBG_RF_IQK, "IQK finished\n");
 #endif
 }
 
-
-void
-phy_lc_calibrate_8723d(
-	void		*p_dm_void
-)
+void phy_lc_calibrate_8723d(void *dm_void)
 {
-	struct PHY_DM_STRUCT	*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
 
-	_phy_lc_calibrate_8723d(p_dm, false);
+	_phy_lc_calibrate_8723d(dm, false);
 }
 
-void _phy_set_rf_path_switch_8723d(
-#if (DM_ODM_SUPPORT_TYPE & ODM_AP)
-	struct PHY_DM_STRUCT		*p_dm,
+#if ((DM_ODM_SUPPORT_TYPE & ODM_AP) || (DM_ODM_SUPPORT_TYPE == ODM_CE))
+void _phy_set_rf_path_switch_8723d(struct dm_struct *dm,
 #else
-	struct _ADAPTER	*p_adapter,
+void _phy_set_rf_path_switch_8723d(void *adapter,
 #endif
-	boolean		is_main,
-	boolean		is2T
-)
+				   boolean is_main, boolean is2T)
 {
-	HAL_DATA_TYPE	*p_hal_data = GET_HAL_DATA(p_adapter);
-#if (DM_ODM_SUPPORT_TYPE == ODM_CE)
-	struct PHY_DM_STRUCT		*p_dm = &p_hal_data->odmpriv;
-#endif
 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
-	struct PHY_DM_STRUCT		*p_dm = &p_hal_data->DM_OutSrc;
+	HAL_DATA_TYPE *hal_data = GET_HAL_DATA(((PADAPTER)adapter));
+	struct dm_struct *dm = &hal_data->DM_OutSrc;
 #endif
 
 	if (is_main)
-		odm_set_mac_reg(p_dm, 0x7C4, MASKLWORD, 0x7700);
+		odm_set_mac_reg(dm, R_0x7c4, MASKLWORD, 0x7700);
 	else
-		odm_set_mac_reg(p_dm, 0x7C4, MASKLWORD, 0xDD00);
+		odm_set_mac_reg(dm, R_0x7c4, MASKLWORD, 0xDD00);
 
-	odm_set_mac_reg(p_dm, 0x7C0, MASKDWORD, 0xC00F0038);
-	odm_set_mac_reg(p_dm, 0x70, BIT(26), 1);
-	odm_set_mac_reg(p_dm, 0x64, BIT(31), 1);
+	odm_set_mac_reg(dm, R_0x7c0, MASKDWORD, 0xC00F0038);
+	odm_set_mac_reg(dm, R_0x70, BIT(26), 1);
+	odm_set_mac_reg(dm, R_0x64, BIT(31), 1);
 }
 
-void phy_set_rf_path_switch_8723d(
-#if (DM_ODM_SUPPORT_TYPE & ODM_AP)
-	struct PHY_DM_STRUCT		*p_dm,
+
+#if ((DM_ODM_SUPPORT_TYPE & ODM_AP) || (DM_ODM_SUPPORT_TYPE == ODM_CE))
+void phy_set_rf_path_switch_8723d(struct dm_struct *dm,
 #else
-	struct _ADAPTER	*p_adapter,
+void phy_set_rf_path_switch_8723d(void *adapter,
 #endif
-	boolean		is_main
-)
+				  boolean is_main)
 {
-	HAL_DATA_TYPE	*p_hal_data = GET_HAL_DATA(p_adapter);
-#if (DM_ODM_SUPPORT_TYPE == ODM_CE)
-	struct PHY_DM_STRUCT		*p_dm = &p_hal_data->odmpriv;
-#endif
-
 #if DISABLE_BB_RF
 	return;
 #endif
 
 #if !(DM_ODM_SUPPORT_TYPE & ODM_AP)
-	_phy_set_rf_path_switch_8723d(p_adapter, is_main, true);
+#if (DM_ODM_SUPPORT_TYPE == ODM_CE)
+	_phy_set_rf_path_switch_8723d(dm, is_main, true);
+#else
+	_phy_set_rf_path_switch_8723d(adapter, is_main, true);
+#endif
 #endif
-
 }
 
 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
 boolean _phy_query_rf_path_switch_8723d(
 #if (DM_ODM_SUPPORT_TYPE & ODM_AP)
-	struct PHY_DM_STRUCT		*p_dm,
+	struct dm_struct *dm,
 #else
-	struct _ADAPTER	*p_adapter,
+	ADAPTER *adapter,
 #endif
-	boolean		is2T
-)
+	boolean is2T)
 {
 #if !(DM_ODM_SUPPORT_TYPE & ODM_AP)
-	HAL_DATA_TYPE	*p_hal_data = GET_HAL_DATA(p_adapter);
+	HAL_DATA_TYPE *hal_data = GET_HAL_DATA(((PADAPTER)adapter));
 #if (DM_ODM_SUPPORT_TYPE == ODM_CE)
-	struct PHY_DM_STRUCT		*p_dm = &p_hal_data->odmpriv;
+	struct dm_struct *dm = &hal_data->odmpriv;
 #endif
 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
-	struct PHY_DM_STRUCT		*p_dm = &p_hal_data->DM_OutSrc;
+	struct dm_struct *dm = &hal_data->DM_OutSrc;
 #endif
 #endif
 
-
-	if (odm_get_bb_reg(p_dm, 0x7C4, MASKLWORD) == 0x7700)
+	if (odm_get_bb_reg(dm, R_0x7c4, MASKLWORD) == 0x7700)
 		return true;
 	else
 		return false;
-
 }
 
-
-
-
 boolean phy_query_rf_path_switch_8723d(
 #if (DM_ODM_SUPPORT_TYPE & ODM_AP)
-	struct PHY_DM_STRUCT		*p_dm
+	struct dm_struct *dm
 #else
-	struct _ADAPTER	*p_adapter
+	void *adapter
 #endif
-)
+	)
 {
-
 #if DISABLE_BB_RF
 	return true;
 #endif
 
 #if !(DM_ODM_SUPPORT_TYPE & ODM_AP)
-	return _phy_query_rf_path_switch_8723d(p_adapter, false);
+	return _phy_query_rf_path_switch_8723d(adapter, false);
 #else
-	return _phy_query_rf_path_switch_8723d(p_dm, false);
+	return _phy_query_rf_path_switch_8723d(dm, false);
 #endif
-
 }
 #endif
 
-
-
 #else
 
-void
-phy_iq_calibrate_8723d(
-	void		*p_dm_void,
-	boolean	is_recovery
-) {}
-void
-phy_lc_calibrate_8723d(
-	void		*p_dm_void
-) {}
-
-void
-odm_tx_pwr_track_set_pwr_8723d(
-	struct PHY_DM_STRUCT			*p_dm,
-	enum pwrtrack_method	method,
-	u8				rf_path,
-	u8				channel_mapped_index
-) {}
+void phy_iq_calibrate_8723d(void *dm_void, boolean is_recovery) {}
+void phy_lc_calibrate_8723d(void *dm_void) {}
+
+void odm_tx_pwr_track_set_pwr_8723d(struct dm_struct *dm,
+				    enum pwrtrack_method method, u8 rf_path,
+				    u8 channel_mapped_index) {}
 #endif
diff --git a/rtl8723DS/hal/phydm/halrf/rtl8723d/halrf_8723d.h b/rtl8723DS/hal/phydm/halrf/rtl8723d/halrf_8723d.h
index 614004d..1221094 100755..100644
--- a/rtl8723DS/hal/phydm/halrf/rtl8723d/halrf_8723d.h
+++ b/rtl8723DS/hal/phydm/halrf/rtl8723d/halrf_8723d.h
@@ -13,118 +13,71 @@
  *
  *****************************************************************************/
 
-#ifndef __HAL_PHY_RF_8723D_H__
-#define __HAL_PHY_RF_8723D_H__
+#ifndef __HALRF_8723D_H__
+#define __HALRF_8723D_H__
 
 /*--------------------------Define Parameters-------------------------------*/
-#define	IQK_DELAY_TIME_8723D		10		/* ms */
-#define	index_mapping_NUM_8723D	15
-#define AVG_THERMAL_NUM_8723D	4
+#define IQK_DELAY_TIME_8723D 10 /* ms */
+#define index_mapping_NUM_8723D 15
+#define AVG_THERMAL_NUM_8723D 4
 #define RF_T_METER_8723D 0x42
 
-void configure_txpower_track_8723d(
-	struct _TXPWRTRACK_CFG	*p_config
-);
+void configure_txpower_track_8723d(struct txpwrtrack_cfg *config);
 
-void
-get_delta_swing_table_8723d(
-	void		*p_dm_void,
-	u8 **temperature_up_a,
-	u8 **temperature_down_a,
-	u8 **temperature_up_b,
-	u8 **temperature_down_b
-);
+void get_delta_swing_table_8723d(void *dm_void, u8 **temperature_up_a,
+				 u8 **temperature_down_a, u8 **temperature_up_b,
+				 u8 **temperature_down_b);
 
-void
-set_cck_filter_coefficient_8723d(
-	struct PHY_DM_STRUCT	*p_dm,
-	u8		cck_swing_index
-);
-
-void do_iqk_8723d(
-	void		*p_dm_void,
-	u8		delta_thermal_index,
-	u8		thermal_value,
-	u8		threshold
-);
+void set_cck_filter_coefficient_8723d(struct dm_struct *dm, u8 cck_swing_index);
 
-void
-odm_tx_pwr_track_set_pwr_8723d(
-	void		*p_dm_void,
-	enum pwrtrack_method	method,
-	u8				rf_path,
-	u8				channel_mapped_index
-);
+void do_iqk_8723d(void *dm_void, u8 delta_thermal_index, u8 thermal_value,
+		  u8 threshold);
 
-void
-odm_txxtaltrack_set_xtal_8723d(
-	void		*p_dm_void
-);
+void odm_tx_pwr_track_set_pwr_8723d(void *dm_void, enum pwrtrack_method method,
+				    u8 rf_path, u8 channel_mapped_index);
 
-/* 1 7.	IQK */
+void odm_txxtaltrack_set_xtal_8723d(void *dm_void);
 
-void
-phy_iq_calibrate_8723d(
-	void		*p_dm_void,
-	boolean	is_recovery);
+/* 1 7.	IQK */
 
+void phy_iq_calibrate_8723d(void *dm_void, boolean is_recovery);
 
 /*
  * LC calibrate
- *   */
-void
-phy_lc_calibrate_8723d(
-	void		*p_dm_void
-);
+ */
+void phy_lc_calibrate_8723d(void *dm_void);
 
 
-void phy_set_rf_path_switch_8723d(
-#if (DM_ODM_SUPPORT_TYPE & ODM_AP)
-	struct PHY_DM_STRUCT		*p_dm,
+#if ((DM_ODM_SUPPORT_TYPE & ODM_AP) || (DM_ODM_SUPPORT_TYPE == ODM_CE))
+void phy_set_rf_path_switch_8723d(struct dm_struct *dm,
 #else
-	struct _ADAPTER	*p_adapter,
+void phy_set_rf_path_switch_8723d(void *adapter,
 #endif
-	boolean		is_main
-);
+				  boolean is_main);
 
 #if 0
 /*
  * AP calibrate
- *   */
+ */
 void
 phy_ap_calibrate_8723d(
 #if (DM_ODM_SUPPORT_TYPE & ODM_AP)
-	struct PHY_DM_STRUCT		*p_dm,
+	struct dm_struct		*dm,
 #else
-	struct _ADAPTER	*p_adapter,
+	void	*adapter,
 #endif
 	s8		delta);
 void
-phy_digital_predistortion_8723d(struct _ADAPTER	*p_adapter);
+phy_digital_predistortion_8723d(void	*adapter);
 #endif
 
-void
-_phy_save_adda_registers_8723d(
-	struct PHY_DM_STRUCT		*p_dm,
-	u32		*adda_reg,
-	u32		*adda_backup,
-	u32		register_num
-);
-
-void
-_phy_path_adda_on_8723d(
-	struct PHY_DM_STRUCT		*p_dm,
-	u32		*adda_reg,
-	boolean		is_path_a_on,
-	boolean		is2T
-);
+void _phy_save_adda_registers_8723d(struct dm_struct *dm, u32 *adda_reg,
+				    u32 *adda_backup, u32 register_num);
 
-void
-_phy_mac_setting_calibration_8723d(
-	struct PHY_DM_STRUCT		*p_dm,
-	u32		*mac_reg,
-	u32		*mac_backup
-);
+void _phy_path_adda_on_8723d(struct dm_struct *dm, u32 *adda_reg,
+			     boolean is_path_a_on, boolean is2T);
 
+void _phy_mac_setting_calibration_8723d(struct dm_struct *dm, u32 *mac_reg,
+					u32 *mac_backup);
 
-#endif	/*  #ifndef __HAL_PHY_RF_8723D_H__ */
+#endif /*#ifndef __HALRF_8723D_H__*/
diff --git a/rtl8723DS/hal/phydm/mp_precomp.h b/rtl8723DS/hal/phydm/mp_precomp.h
index 99ca5f4..897adc1 100755..100644
--- a/rtl8723DS/hal/phydm/mp_precomp.h
+++ b/rtl8723DS/hal/phydm/mp_precomp.h
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2007 - 2017 Realtek Corporation.
+ * Copyright(c) 2007 - 2017  Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -8,7 +8,17 @@
  *
  * This program is distributed in the hope that it will be useful, but WITHOUT
  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  * more details.
  *
+ * The full GNU General Public License is included in this distribution in the
+ * file called LICENSE.
+ *
+ * Contact Information:
+ * wlanfae <wlanfae@realtek.com>
+ * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
+ * Hsinchu 300, Taiwan.
+ *
+ * Larry Finger <Larry.Finger@lwfinger.net>
+ *
  *****************************************************************************/
diff --git a/rtl8723DS/hal/phydm/phydm.c b/rtl8723DS/hal/phydm/phydm.c
index 6f57323..d50e3cb 100755..100644
--- a/rtl8723DS/hal/phydm/phydm.c
+++ b/rtl8723DS/hal/phydm/phydm.c
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2007 - 2017 Realtek Corporation.
+ * Copyright(c) 2007 - 2017  Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -8,2807 +8,2898 @@
  *
  * This program is distributed in the hope that it will be useful, but WITHOUT
  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  * more details.
  *
+ * The full GNU General Public License is included in this distribution in the
+ * file called LICENSE.
+ *
+ * Contact Information:
+ * wlanfae <wlanfae@realtek.com>
+ * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
+ * Hsinchu 300, Taiwan.
+ *
+ * Larry Finger <Larry.Finger@lwfinger.net>
+ *
  *****************************************************************************/
 
-/* ************************************************************
+/*@************************************************************
  * include files
- * ************************************************************ */
+ ************************************************************/
 
 #include "mp_precomp.h"
 #include "phydm_precomp.h"
 
-
-const u16 phy_rate_table[] = {	/*20M*/
+const u16 phy_rate_table[] = {
+	/*@20M*/
 	1, 2, 5, 11,
 	6, 9, 12, 18, 24, 36, 48, 54,
-	6, 13, 19, 26, 39, 52, 58, 65,		/*MCS0~7*/
-	13, 26, 39, 52, 78, 104, 117, 130		/*MCS8~15*/
+	6, 13, 19, 26, 39, 52, 58, 65, /*@MCS0~7*/
+	13, 26, 39, 52, 78, 104, 117, 130 /*@MCS8~15*/
 };
 
-void
-phydm_traffic_load_decision(
-	void	*p_dm_void
-)
+void phydm_traffic_load_decision(void *dm_void)
 {
-	struct PHY_DM_STRUCT	*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	u8		bit_shift_num = 0;
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	u8 shift = 0;
 
-	/*---TP & Trafic-load calculation---*/
+	/*@---TP & Trafic-load calculation---*/
 
-	if (p_dm->last_tx_ok_cnt > (*(p_dm->p_num_tx_bytes_unicast)))
-		p_dm->last_tx_ok_cnt = (*(p_dm->p_num_tx_bytes_unicast));
+	if (dm->last_tx_ok_cnt > *dm->num_tx_bytes_unicast)
+		dm->last_tx_ok_cnt = *dm->num_tx_bytes_unicast;
 
-	if (p_dm->last_rx_ok_cnt > (*(p_dm->p_num_rx_bytes_unicast)))
-		p_dm->last_rx_ok_cnt = (*(p_dm->p_num_rx_bytes_unicast));
+	if (dm->last_rx_ok_cnt > *dm->num_rx_bytes_unicast)
+		dm->last_rx_ok_cnt = *dm->num_rx_bytes_unicast;
 
-	p_dm->cur_tx_ok_cnt =  *(p_dm->p_num_tx_bytes_unicast) - p_dm->last_tx_ok_cnt;
-	p_dm->cur_rx_ok_cnt =  *(p_dm->p_num_rx_bytes_unicast) - p_dm->last_rx_ok_cnt;
-	p_dm->last_tx_ok_cnt =  *(p_dm->p_num_tx_bytes_unicast);
-	p_dm->last_rx_ok_cnt =  *(p_dm->p_num_rx_bytes_unicast);
+	dm->cur_tx_ok_cnt = *dm->num_tx_bytes_unicast - dm->last_tx_ok_cnt;
+	dm->cur_rx_ok_cnt = *dm->num_rx_bytes_unicast - dm->last_rx_ok_cnt;
+	dm->last_tx_ok_cnt = *dm->num_tx_bytes_unicast;
+	dm->last_rx_ok_cnt = *dm->num_rx_bytes_unicast;
 
-	bit_shift_num = 17 + (PHYDM_WATCH_DOG_PERIOD - 1); /*AP:  <<3(8bit), >>20(10^6,M), >>0(1sec)*/
-													/*WIN&CE:  <<3(8bit), >>20(10^6,M), >>1(2sec)*/
+	/*@AP:  <<3(8bit), >>20(10^6,M), >>0(1sec)*/
+	shift = 17 + (PHYDM_WATCH_DOG_PERIOD - 1);
+	/*@WIN&CE:  <<3(8bit), >>20(10^6,M), >>1(2sec)*/
 
-	p_dm->tx_tp = ((p_dm->tx_tp) >> 1) + (u32)(((p_dm->cur_tx_ok_cnt) >> bit_shift_num) >> 1);
-	p_dm->rx_tp = ((p_dm->rx_tp) >> 1) + (u32)(((p_dm->cur_rx_ok_cnt) >> bit_shift_num) >> 1);
+	dm->tx_tp = (dm->tx_tp >> 1) + (u32)((dm->cur_tx_ok_cnt >> shift) >> 1);
+	dm->rx_tp = (dm->rx_tp >> 1) + (u32)((dm->cur_rx_ok_cnt >> shift) >> 1);
 
-	p_dm->total_tp = p_dm->tx_tp + p_dm->rx_tp;
+	dm->total_tp = dm->tx_tp + dm->rx_tp;
 
-	/*[Calculate TX/RX state]*/
-	if (p_dm->tx_tp > (p_dm->rx_tp << 1))
-		p_dm->txrx_state_all = TX_STATE;
-	else if (p_dm->rx_tp > (p_dm->tx_tp << 1))
-		p_dm->txrx_state_all = RX_STATE;
+	/*@[Calculate TX/RX state]*/
+	if (dm->tx_tp > (dm->rx_tp << 1))
+		dm->txrx_state_all = TX_STATE;
+	else if (dm->rx_tp > (dm->tx_tp << 1))
+		dm->txrx_state_all = RX_STATE;
 	else
-		p_dm->txrx_state_all = BI_DIRECTION_STATE;
+		dm->txrx_state_all = BI_DIRECTION_STATE;
+
+	/*@[Traffic load decision]*/
+	dm->pre_traffic_load = dm->traffic_load;
+
+	if (dm->cur_tx_ok_cnt > 1875000 || dm->cur_rx_ok_cnt > 1875000) {
+		/* @( 1.875M * 8bit ) / 2sec= 7.5M bits /sec )*/
+		dm->traffic_load = TRAFFIC_HIGH;
+	} else if (dm->cur_tx_ok_cnt > 500000 || dm->cur_rx_ok_cnt > 500000) {
+		/*@( 0.5M * 8bit ) / 2sec =  2M bits /sec )*/
+		dm->traffic_load = TRAFFIC_MID;
+	} else if (dm->cur_tx_ok_cnt > 100000 || dm->cur_rx_ok_cnt > 100000) {
+		/*@( 0.1M * 8bit ) / 2sec =  0.4M bits /sec )*/
+		dm->traffic_load = TRAFFIC_LOW;
+	} else if (dm->cur_tx_ok_cnt > 25000 || dm->cur_rx_ok_cnt > 25000) {
+		/*@( 0.025M * 8bit ) / 2sec =  0.1M bits /sec )*/
+		dm->traffic_load = TRAFFIC_ULTRA_LOW;
+	} else {
+		dm->traffic_load = TRAFFIC_NO_TP;
+	}
 
-	/*[Calculate consecutive idlel time]*/
-	if (p_dm->total_tp == 0)
-		p_dm->consecutive_idlel_time += PHYDM_WATCH_DOG_PERIOD;
+	/*@[Calculate consecutive idlel time]*/
+	if (dm->traffic_load == 0)
+		dm->consecutive_idlel_time += PHYDM_WATCH_DOG_PERIOD;
 	else
-		p_dm->consecutive_idlel_time = 0;
-
-	/*[Traffic load decision]*/
-	p_dm->pre_traffic_load = p_dm->traffic_load;
-
-	if (p_dm->cur_tx_ok_cnt > 1875000 || p_dm->cur_rx_ok_cnt > 1875000) {		/* ( 1.875M * 8bit ) / 2sec= 7.5M bits /sec )*/
+		dm->consecutive_idlel_time = 0;
 
-		p_dm->traffic_load = TRAFFIC_HIGH;
-		/**/
-	} else if (p_dm->cur_tx_ok_cnt > 500000 || p_dm->cur_rx_ok_cnt > 500000) { /*( 0.5M * 8bit ) / 2sec =  2M bits /sec )*/
-
-		p_dm->traffic_load = TRAFFIC_MID;
-		/**/
-	} else if (p_dm->cur_tx_ok_cnt > 100000 || p_dm->cur_rx_ok_cnt > 100000)  { /*( 0.1M * 8bit ) / 2sec =  0.4M bits /sec )*/
+	#if 0
+	PHYDM_DBG(dm, DBG_COMMON_FLOW,
+		  "cur_tx_ok_cnt = %d, cur_rx_ok_cnt = %d, last_tx_ok_cnt = %d, last_rx_ok_cnt = %d\n",
+		  dm->cur_tx_ok_cnt, dm->cur_rx_ok_cnt, dm->last_tx_ok_cnt,
+		  dm->last_rx_ok_cnt);
 
-		p_dm->traffic_load = TRAFFIC_LOW;
-		/**/
-	} else {
+	PHYDM_DBG(dm, DBG_COMMON_FLOW, "tx_tp = %d, rx_tp = %d\n", dm->tx_tp,
+		  dm->rx_tp);
+	#endif
+}
 
-		p_dm->traffic_load = TRAFFIC_ULTRA_LOW;
-		/**/
+void phydm_cck_new_agc_chk(struct dm_struct *dm)
+{
+	dm->cck_new_agc = 0;
+
+#if ((RTL8723D_SUPPORT == 1) || (RTL8822B_SUPPORT == 1) || \
+	(RTL8821C_SUPPORT == 1) || (RTL8197F_SUPPORT == 1) || \
+	(RTL8710B_SUPPORT == 1) || (RTL8192F_SUPPORT == 1) || \
+	(RTL8195B_SUPPORT == 1) || (RTL8198F_SUPPORT == 1) || \
+	(RTL8822C_SUPPORT == 1) || (RTL8721D_SUPPORT == 1))
+	if (dm->support_ic_type &
+	    (ODM_RTL8723D | ODM_RTL8822B | ODM_RTL8821C | ODM_RTL8197F |
+	    ODM_RTL8710B | ODM_RTL8192F | ODM_RTL8195B | ODM_RTL8721D)) {
+		/*@1: new agc  0: old agc*/
+		dm->cck_new_agc = (boolean)odm_get_bb_reg(dm, R_0xa9c, BIT(17));
+	} else if (dm->support_ic_type & (ODM_RTL8198F | ODM_RTL8822C)) {
+		/*@1: new agc  0: old agc*/
+		dm->cck_new_agc = (boolean)odm_get_bb_reg(dm, R_0x1a9c,
+							  BIT(17));
 	}
-
-	/*
-	PHYDM_DBG(p_dm, DBG_COMMON_FLOW, ("cur_tx_ok_cnt = %d, cur_rx_ok_cnt = %d, last_tx_ok_cnt = %d, last_rx_ok_cnt = %d\n",
-		p_dm->cur_tx_ok_cnt, p_dm->cur_rx_ok_cnt, p_dm->last_tx_ok_cnt, p_dm->last_rx_ok_cnt));
-
-	PHYDM_DBG(p_dm, DBG_COMMON_FLOW, ("tx_tp = %d, rx_tp = %d\n",
-		p_dm->tx_tp, p_dm->rx_tp));
-	*/
-		
+#endif
 }
 
-void
-phydm_init_cck_setting(
-	struct PHY_DM_STRUCT		*p_dm
-)
+/*select 3 or 4 bit LNA */
+void phydm_cck_lna_bit_num_chk(struct dm_struct *dm)
 {
-#if (RTL8192E_SUPPORT == 1)
+	boolean report_type = 0;
+	#if (RTL8192E_SUPPORT == 1)
 	u32 value_824, value_82c;
-#endif
-
-	p_dm->is_cck_high_power = (boolean) odm_get_bb_reg(p_dm, ODM_REG(CCK_RPT_FORMAT, p_dm), ODM_BIT(CCK_RPT_FORMAT, p_dm));
+	#endif
 
-	phydm_config_cck_rx_antenna_init(p_dm);
-	phydm_config_cck_rx_path(p_dm, BB_PATH_A);
+	#if (RTL8192E_SUPPORT == 1)
+	if (dm->support_ic_type & (ODM_RTL8192E)) {
+	/* @0x824[9] = 0x82C[9] = 0xA80[7] those registers setting
+	 * should be equal or CCK RSSI report may be incorrect
+	 */
+		value_824 = odm_get_bb_reg(dm, R_0x824, BIT(9));
+		value_82c = odm_get_bb_reg(dm, R_0x82c, BIT(9));
 
-#if (RTL8192E_SUPPORT == 1)
-	if (p_dm->support_ic_type & (ODM_RTL8192E)) {
+		if (value_824 != value_82c)
+			odm_set_bb_reg(dm, R_0x82c, BIT(9), value_824);
+		odm_set_bb_reg(dm, R_0xa80, BIT(7), value_824);
+		report_type = (boolean)value_824;
+	}
+	#endif
 
-		/* 0x824[9] = 0x82C[9] = 0xA80[7]  those registers setting should be equal or CCK RSSI report may be incorrect */
-		value_824 = odm_get_bb_reg(p_dm, 0x824, BIT(9));
-		value_82c = odm_get_bb_reg(p_dm, 0x82c, BIT(9));
+	#if (RTL8703B_SUPPORT || RTL8723D_SUPPORT || RTL8710B_SUPPORT)
+	if (dm->support_ic_type &
+	    (ODM_RTL8703B | ODM_RTL8723D | ODM_RTL8710B)) {
+		report_type = (boolean)odm_get_bb_reg(dm, R_0x950, BIT(11));
 
-		if (value_824 != value_82c)
-			odm_set_bb_reg(p_dm, 0x82c, BIT(9), value_824);
-		odm_set_bb_reg(p_dm, 0xa80, BIT(7), value_824);
-		p_dm->cck_agc_report_type = (boolean)value_824;
+		if (report_type != 1)
+			pr_debug("[Warning] CCK should be 4bit LNA\n");
+	}
+	#endif
 
-		PHYDM_DBG(p_dm, ODM_COMP_INIT, ("cck_agc_report_type = (( %d )), ext_lna_gain = (( %d ))\n", p_dm->cck_agc_report_type, p_dm->ext_lna_gain));
+	#if (RTL8821C_SUPPORT == 1)
+	if (dm->support_ic_type & ODM_RTL8821C) {
+		if (dm->default_rf_set_8821c == SWITCH_TO_BTG)
+			report_type = 1;
 	}
-#endif
+	#endif
 
-#if ((RTL8703B_SUPPORT == 1) || (RTL8723D_SUPPORT == 1) || (RTL8710B_SUPPORT == 1))
-	if (p_dm->support_ic_type & (ODM_RTL8703B | ODM_RTL8723D | ODM_RTL8710B)) {
+	dm->cck_agc_report_type = report_type;
 
-		p_dm->cck_agc_report_type = odm_get_bb_reg(p_dm, 0x950, BIT(11)) ? 1 : 0; /*1: 4bit LNA, 0: 3bit LNA */
+	PHYDM_DBG(dm, ODM_COMP_INIT, "cck_agc_report_type=((%d))\n",
+		  dm->cck_agc_report_type);
+}
 
-		if (p_dm->cck_agc_report_type != 1) {
-			dbg_print("[Warning] 8703B/8723D/8710B CCK should be 4bit LNA, ie. 0x950[11] = 1\n");
-			/**/
-		}
-	}
-#endif
+void phydm_init_cck_setting(struct dm_struct *dm)
+{
+	u32 reg_tmp = 0;
+	u32 mask_tmp = 0;
 
-#if (RTL8821C_SUPPORT == 1)
-	if (p_dm->support_ic_type & ODM_RTL8821C) {
-		p_dm->cck_new_agc = odm_get_bb_reg(p_dm, 0xa9c, BIT(17)) ? true : false;          /*1: new agc  0: old agc*/
-		if (p_dm->cck_new_agc == 0 && p_dm->default_rf_set_8821c == SWITCH_TO_BTG)
-			p_dm->cck_agc_report_type = 1;
-	}
-#endif
+	reg_tmp = ODM_REG(CCK_RPT_FORMAT, dm);
+	mask_tmp = ODM_BIT(CCK_RPT_FORMAT, dm);
+	dm->is_cck_high_power = (boolean)odm_get_bb_reg(dm, reg_tmp, mask_tmp);
 
-#if ((RTL8723D_SUPPORT == 1) || (RTL8822B_SUPPORT == 1) || (RTL8197F_SUPPORT == 1) || (RTL8710B_SUPPORT == 1))
-	if (p_dm->support_ic_type & (ODM_RTL8723D | ODM_RTL8822B | ODM_RTL8197F | ODM_RTL8710B))
-		p_dm->cck_new_agc = odm_get_bb_reg(p_dm, 0xa9c, BIT(17)) ? true : false;          /*1: new agc  0: old agc*/
-	else
-#endif
-	{
-		p_dm->cck_new_agc = false;
-		/**/
-	}
+	PHYDM_DBG(dm, ODM_COMP_INIT, "ext_lna_gain=((%d))\n", dm->ext_lna_gain);
+
+	phydm_config_cck_rx_antenna_init(dm);
 
-	phydm_get_cck_rssi_table_from_reg(p_dm);
+	if (dm->support_ic_type & (ODM_RTL8192F))
+		phydm_config_cck_rx_path(dm, BB_PATH_AB);
+	else
+		phydm_config_cck_rx_path(dm, BB_PATH_A);
 
+	phydm_cck_new_agc_chk(dm);
+	phydm_cck_lna_bit_num_chk(dm);
+	phydm_get_cck_rssi_table_from_reg(dm);
 }
 
-void
-phydm_init_hw_info_by_rfe(
-	struct PHY_DM_STRUCT		*p_dm
-)
+void phydm_init_hw_info_by_rfe(struct dm_struct *dm)
 {
 #if (RTL8822B_SUPPORT == 1)
-	if (p_dm->support_ic_type & ODM_RTL8822B)
-		phydm_init_hw_info_by_rfe_type_8822b(p_dm);
+	/*@if (dm->support_ic_type & ODM_RTL8822B)*/
+		/*@phydm_init_hw_info_by_rfe_type_8822b(dm);*/
 #endif
 #if (RTL8821C_SUPPORT == 1)
-	if (p_dm->support_ic_type & ODM_RTL8821C)
-		phydm_init_hw_info_by_rfe_type_8821c(p_dm);
+	if (dm->support_ic_type & ODM_RTL8821C)
+		phydm_init_hw_info_by_rfe_type_8821c(dm);
 #endif
 #if (RTL8197F_SUPPORT == 1)
-	if (p_dm->support_ic_type & ODM_RTL8197F)
-		phydm_init_hw_info_by_rfe_type_8197f(p_dm);
+	if (dm->support_ic_type & ODM_RTL8197F)
+		phydm_init_hw_info_by_rfe_type_8197f(dm);
 #endif
 }
 
-void
-phydm_common_info_self_init(
-	struct PHY_DM_STRUCT		*p_dm
-)
+void phydm_common_info_self_init(struct dm_struct *dm)
 {
-	phydm_init_cck_setting(p_dm);
-	p_dm->rf_path_rx_enable = (u8) odm_get_bb_reg(p_dm, ODM_REG(BB_RX_PATH, p_dm), ODM_BIT(BB_RX_PATH, p_dm));
+	u32 reg_tmp = 0;
+	u32 mask_tmp = 0;
+
+	/*@BB IP Generation*/
+	if (dm->support_ic_type & ODM_IC_JGR3_SERIES)
+		dm->ic_ip_series = PHYDM_IC_JGR3;
+	else if (dm->support_ic_type & ODM_IC_11AC_SERIES)
+		dm->ic_ip_series = PHYDM_IC_AC;
+	else if (dm->support_ic_type & ODM_IC_11N_SERIES)
+		dm->ic_ip_series = PHYDM_IC_N;
+
+	/*@BB phy-status Generation*/
+	if (dm->support_ic_type & PHYSTS_3RD_TYPE_IC)
+		dm->ic_phy_sts_type = PHYDM_PHYSTS_TYPE_3;
+	else if (dm->support_ic_type & PHYSTS_2ND_TYPE_IC)
+		dm->ic_phy_sts_type = PHYDM_PHYSTS_TYPE_2;
+	else
+		dm->ic_phy_sts_type = PHYDM_PHYSTS_TYPE_1;
+
+	phydm_init_cck_setting(dm);
+
+	reg_tmp = ODM_REG(BB_RX_PATH, dm);
+	mask_tmp = ODM_BIT(BB_RX_PATH, dm);
+	dm->rf_path_rx_enable = (u8)odm_get_bb_reg(dm, reg_tmp, mask_tmp);
 #if (DM_ODM_SUPPORT_TYPE != ODM_CE)
-	p_dm->p_is_net_closed = &p_dm->BOOLEAN_temp;
-
-	phydm_init_debug_setting(p_dm);
-#endif
-	phydm_init_trx_antenna_setting(p_dm);
-	phydm_init_soft_ml_setting(p_dm);
-
-	p_dm->phydm_period = PHYDM_WATCH_DOG_PERIOD;
-	p_dm->phydm_sys_up_time = 0;
-
-	if (p_dm->support_ic_type & ODM_IC_1SS)
-		p_dm->num_rf_path = 1;
-	else if (p_dm->support_ic_type & ODM_IC_2SS)
-		p_dm->num_rf_path = 2;
-	else if (p_dm->support_ic_type & ODM_IC_3SS)
-		p_dm->num_rf_path = 3;
-	else if (p_dm->support_ic_type & ODM_IC_4SS)
-		p_dm->num_rf_path = 4;
-
-	p_dm->tx_rate = 0xFF;
-	p_dm->rssi_min_by_path = 0xFF;
-
-	p_dm->number_linked_client = 0;
-	p_dm->pre_number_linked_client = 0;
-	p_dm->number_active_client = 0;
-	p_dm->pre_number_active_client = 0;
-
-	p_dm->last_tx_ok_cnt = 0;
-	p_dm->last_rx_ok_cnt = 0;
-	p_dm->tx_tp = 0;
-	p_dm->rx_tp = 0;
-	p_dm->total_tp = 0;
-	p_dm->traffic_load = TRAFFIC_LOW;
-
-	p_dm->nbi_set_result = 0;
-	p_dm->is_init_hw_info_by_rfe = false;
-	p_dm->pre_dbg_priority = BB_DBGPORT_RELEASE;
-	p_dm->tp_active_th = 5;
-	p_dm->disable_phydm_watchdog = 0;
-
-	p_dm->u8_dummy = 0xf;
-	p_dm->u16_dummy = 0xffff;
-	p_dm->u32_dummy = 0xffffffff;
-	
-	/*odm_memory_set(p_dm, &(p_dm->pause_lv_table.lv_dig), 0, sizeof(struct phydm_pause_lv));*/
-	p_dm->pause_lv_table.lv_cckpd = PHYDM_PAUSE_RELEASE;
-	p_dm->pause_lv_table.lv_dig = PHYDM_PAUSE_RELEASE;
+	dm->is_net_closed = &dm->BOOLEAN_temp;
+
+	phydm_init_debug_setting(dm);
+#endif
+	phydm_init_soft_ml_setting(dm);
+
+	dm->phydm_sys_up_time = 0;
+
+	if (dm->support_ic_type & ODM_IC_1SS)
+		dm->num_rf_path = 1;
+	else if (dm->support_ic_type & ODM_IC_2SS)
+		dm->num_rf_path = 2;
+	#if 0
+	/* @RTK do not has IC which is equipped with 3 RF paths,
+	 * so ODM_IC_3SS is an enpty macro and result in coverity check errors
+	 */
+	else if (dm->support_ic_type & ODM_IC_3SS)
+		dm->num_rf_path = 3;
+	#endif
+	else if (dm->support_ic_type & ODM_IC_4SS)
+		dm->num_rf_path = 4;
+	else
+		dm->num_rf_path = 1;
+
+	phydm_trx_antenna_setting_init(dm, dm->num_rf_path);
+
+	dm->tx_rate = 0xFF;
+	dm->rssi_min_by_path = 0xFF;
+
+	dm->number_linked_client = 0;
+	dm->pre_number_linked_client = 0;
+	dm->number_active_client = 0;
+	dm->pre_number_active_client = 0;
 
+	dm->last_tx_ok_cnt = 0;
+	dm->last_rx_ok_cnt = 0;
+	dm->tx_tp = 0;
+	dm->rx_tp = 0;
+	dm->total_tp = 0;
+	dm->traffic_load = TRAFFIC_LOW;
+
+	dm->nbi_set_result = 0;
+	dm->is_init_hw_info_by_rfe = false;
+	dm->pre_dbg_priority = DBGPORT_RELEASE;
+	dm->tp_active_th = 5;
+	dm->disable_phydm_watchdog = 0;
+
+	dm->u8_dummy = 0xf;
+	dm->u16_dummy = 0xffff;
+	dm->u32_dummy = 0xffffffff;
+
+	dm->pause_lv_table.lv_cckpd = PHYDM_PAUSE_RELEASE;
+	dm->pause_lv_table.lv_dig = PHYDM_PAUSE_RELEASE;
 }
 
-void
-phydm_cmn_sta_info_update(
-	void	*p_dm_void,
-	u8	macid
-)
+void phydm_cmn_sta_info_update(void *dm_void, u8 macid)
 {
-	struct PHY_DM_STRUCT		*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	struct cmn_sta_info			*p_sta = p_dm->p_phydm_sta_info[macid];
-	struct ra_sta_info				*p_ra = NULL;
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct cmn_sta_info *sta = dm->phydm_sta_info[macid];
+	struct ra_sta_info *ra = NULL;
 
-	if (is_sta_active(p_sta)) {
-		p_ra = &(p_sta->ra_info);
+	if (is_sta_active(sta)) {
+		ra = &sta->ra_info;
 	} else {
-		PHYDM_DBG(p_dm, DBG_RA_MASK, ("[Warning] %s invalid sta_info\n", __func__));
+		PHYDM_DBG(dm, DBG_RA_MASK, "[Warning] %s invalid sta_info\n",
+			  __func__);
 		return;
 	}
 
-	PHYDM_DBG(p_dm, DBG_RA_MASK, ("%s ======>\n", __func__));
-	PHYDM_DBG(p_dm, DBG_RA_MASK, ("MACID=%d\n", p_sta->mac_id));
+	PHYDM_DBG(dm, DBG_RA_MASK, "%s ======>\n", __func__);
+	PHYDM_DBG(dm, DBG_RA_MASK, "MACID=%d\n", sta->mac_id);
 
-	/*[Calculate TX/RX state]*/
-	if (p_sta->tx_moving_average_tp > (p_sta->rx_moving_average_tp << 1))
-		p_ra->txrx_state= TX_STATE;
-	else if (p_sta->rx_moving_average_tp > (p_sta->tx_moving_average_tp << 1))
-		p_ra->txrx_state = RX_STATE;
+	/*@[Calculate TX/RX state]*/
+	if (sta->tx_moving_average_tp > (sta->rx_moving_average_tp << 1))
+		ra->txrx_state = TX_STATE;
+	else if (sta->rx_moving_average_tp > (sta->tx_moving_average_tp << 1))
+		ra->txrx_state = RX_STATE;
 	else
-		p_ra->txrx_state = BI_DIRECTION_STATE;
+		ra->txrx_state = BI_DIRECTION_STATE;
 
+	ra->is_noisy = dm->noisy_decision;
 }
 
-void
-phydm_common_info_self_update(
-	struct PHY_DM_STRUCT		*p_dm
-)
+void phydm_common_info_self_update(struct dm_struct *dm)
 {
-	u8	sta_cnt = 0, num_active_client = 0;
-	u32	i, one_entry_macid = 0;
-	u32	ma_rx_tp = 0;
-	struct cmn_sta_info	*p_sta;
+	u8 sta_cnt = 0, num_active_client = 0;
+	u32 i, one_entry_macid = 0;
+	u32 ma_rx_tp = 0;
+	u32 tp_diff = 0;
+	struct cmn_sta_info *sta;
 
 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
 
-	struct _ADAPTER	*adapter =  p_dm->adapter;
-	PMGNT_INFO	p_mgnt_info = &adapter->MgntInfo;
+	PADAPTER adapter = (PADAPTER)dm->adapter;
 
-	p_sta = p_dm->p_phydm_sta_info[0];
-	if (p_mgnt_info->mAssoc) {
-		p_sta->dm_ctrl |= STA_DM_CTRL_ACTIVE;
+	PMGNT_INFO mgnt_info = &((PADAPTER)adapter)->MgntInfo;
+
+	sta = dm->phydm_sta_info[0];
+	if (mgnt_info->mAssoc) {
+		sta->dm_ctrl |= STA_DM_CTRL_ACTIVE;
 		for (i = 0; i < 6; i++)
-			p_sta->mac_addr[i] = p_mgnt_info->Bssid[i];
+			sta->mac_addr[i] = mgnt_info->Bssid[i];
 	} else if (GetFirstClientPort(adapter)) {
-		struct _ADAPTER	*p_client_adapter = GetFirstClientPort(adapter);
+		//void	*client_adapter = GetFirstClientPort(adapter);
+		struct _ADAPTER *client_adapter = GetFirstClientPort(adapter);
 
-		p_sta->dm_ctrl |= STA_DM_CTRL_ACTIVE;
+		sta->dm_ctrl |= STA_DM_CTRL_ACTIVE;
 		for (i = 0; i < 6; i++)
-			p_sta->mac_addr[i] = p_client_adapter->MgntInfo.Bssid[i];
+			sta->mac_addr[i] = client_adapter->MgntInfo.Bssid[i];
 	} else {
-		p_sta->dm_ctrl = p_sta->dm_ctrl & (~STA_DM_CTRL_ACTIVE);
+		sta->dm_ctrl = sta->dm_ctrl & (~STA_DM_CTRL_ACTIVE);
 		for (i = 0; i < 6; i++)
-			p_sta->mac_addr[i] = 0;
+			sta->mac_addr[i] = 0;
 	}
 
 	/* STA mode is linked to AP */
-	if (is_sta_active(p_sta) && !ACTING_AS_AP(adapter))
-		p_dm->bsta_state = true;
+	if (is_sta_active(sta) && !ACTING_AS_AP(adapter))
+		dm->bsta_state = true;
 	else
-		p_dm->bsta_state = false;
+		dm->bsta_state = false;
 #endif
 
 	for (i = 0; i < ODM_ASSOCIATE_ENTRY_NUM; i++) {
-		p_sta = p_dm->p_phydm_sta_info[i];
-		if (is_sta_active(p_sta)) {
+		sta = dm->phydm_sta_info[i];
+		if (is_sta_active(sta)) {
 			sta_cnt++;
-			
+
 			if (sta_cnt == 1)
 				one_entry_macid = i;
 
-			phydm_cmn_sta_info_update(p_dm, (u8)i);
+			phydm_cmn_sta_info_update(dm, (u8)i);
+			#ifdef PHYDM_BEAMFORMING_SUPPORT
+			/*@phydm_get_txbf_device_num(dm, (u8)i);*/
+			#endif
 
-			ma_rx_tp = p_sta->rx_moving_average_tp + p_sta->tx_moving_average_tp;
-			PHYDM_DBG(p_dm, DBG_COMMON_FLOW, ("TP[%d]: ((%d )) bit/sec\n", i, ma_rx_tp));
+			ma_rx_tp = sta->rx_moving_average_tp +
+				   sta->tx_moving_average_tp;
+
+			PHYDM_DBG(dm, DBG_COMMON_FLOW,
+				  "TP[%d]: ((%d )) bit/sec\n", i, ma_rx_tp);
 
 			if (ma_rx_tp > ACTIVE_TP_THRESHOLD)
 				num_active_client++;
 		}
 	}
 
+#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
+	dm->is_linked = (sta_cnt != 0) ? true : false;
+#endif
+
 	if (sta_cnt == 1) {
-		p_dm->is_one_entry_only = true;
-		p_dm->one_entry_macid = one_entry_macid;
-		p_dm->one_entry_tp = ma_rx_tp;
+		dm->is_one_entry_only = true;
+		dm->one_entry_macid = one_entry_macid;
+		dm->one_entry_tp = ma_rx_tp;
 
-		p_dm->tp_active_occur = 0;
+		dm->tp_active_occur = 0;
 
-		PHYDM_DBG(p_dm, DBG_COMMON_FLOW, ("one_entry_tp=((%d)), pre_one_entry_tp=((%d))\n",
-			p_dm->one_entry_tp, p_dm->pre_one_entry_tp));
+		PHYDM_DBG(dm, DBG_COMMON_FLOW,
+			  "one_entry_tp=((%d)), pre_one_entry_tp=((%d))\n",
+			  dm->one_entry_tp, dm->pre_one_entry_tp);
 
-		if ((p_dm->one_entry_tp > p_dm->pre_one_entry_tp) && (p_dm->pre_one_entry_tp <= 2)) {
-			if ((p_dm->one_entry_tp - p_dm->pre_one_entry_tp) > p_dm->tp_active_th)
-				p_dm->tp_active_occur = 1;
+		if (dm->one_entry_tp > dm->pre_one_entry_tp &&
+		    dm->pre_one_entry_tp <= 2) {
+			tp_diff = dm->one_entry_tp - dm->pre_one_entry_tp;
+
+			if (tp_diff > dm->tp_active_th)
+				dm->tp_active_occur = 1;
 		}
-		p_dm->pre_one_entry_tp = p_dm->one_entry_tp;
-	} else
-		p_dm->is_one_entry_only = false;
+		dm->pre_one_entry_tp = dm->one_entry_tp;
+	} else {
+		dm->is_one_entry_only = false;
+	}
 
-	p_dm->pre_number_linked_client = p_dm->number_linked_client;
-	p_dm->pre_number_active_client = p_dm->number_active_client;
+	dm->pre_number_linked_client = dm->number_linked_client;
+	dm->pre_number_active_client = dm->number_active_client;
 
-	p_dm->number_linked_client = sta_cnt;
-	p_dm->number_active_client = num_active_client;
+	dm->number_linked_client = sta_cnt;
+	dm->number_active_client = num_active_client;
 
 	/*Traffic load information update*/
-	phydm_traffic_load_decision(p_dm);
+	phydm_traffic_load_decision(dm);
 
-	p_dm->phydm_sys_up_time += p_dm->phydm_period;
-
-	p_dm->is_dfs_band = phydm_is_dfs_band(p_dm);
+	dm->phydm_sys_up_time += PHYDM_WATCH_DOG_PERIOD;
 
+	dm->is_dfs_band = phydm_is_dfs_band(dm);
+	dm->phy_dbg_info.show_phy_sts_cnt = 0;
 }
 
-void
-phydm_common_info_self_reset(
-	struct PHY_DM_STRUCT		*p_dm
-)
+void phydm_common_info_self_reset(struct dm_struct *dm)
 {
-#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_CE))
-	p_dm->phy_dbg_info.num_qry_beacon_pkt = 0;
-#endif
+	struct odm_phy_dbg_info		*dbg_t = &dm->phy_dbg_info;
+
+	dbg_t->beacon_cnt_in_period = dbg_t->num_qry_beacon_pkt;
+	dbg_t->num_qry_beacon_pkt = 0;
+
+	dm->rxsc_l = 0xff;
+	dm->rxsc_20 = 0xff;
+	dm->rxsc_40 = 0xff;
+	dm->rxsc_80 = 0xff;
 }
 
 void *
-phydm_get_structure(
-	struct PHY_DM_STRUCT		*p_dm,
-	u8			structure_type
-)
+phydm_get_structure(struct dm_struct *dm, u8 structure_type)
 
 {
-	void	*p_struct = NULL;
-#if RTL8195A_SUPPORT
-	switch (structure_type) {
-	case	PHYDM_FALSEALMCNT:
-		p_struct = &false_alm_cnt;
-		break;
-
-	case	PHYDM_CFOTRACK:
-		p_struct = &dm_cfo_track;
-		break;
-
-	case	PHYDM_ADAPTIVITY:
-		p_struct = &(p_dm->adaptivity);
-		break;
+	void *structure = NULL;
 
-	default:
-		break;
-	}
-
-#else
 	switch (structure_type) {
-	case	PHYDM_FALSEALMCNT:
-		p_struct = &(p_dm->false_alm_cnt);
+	case PHYDM_FALSEALMCNT:
+		structure = &dm->false_alm_cnt;
 		break;
 
-	case	PHYDM_CFOTRACK:
-		p_struct = &(p_dm->dm_cfo_track);
+	case PHYDM_CFOTRACK:
+		structure = &dm->dm_cfo_track;
 		break;
 
-	case	PHYDM_ADAPTIVITY:
-		p_struct = &(p_dm->adaptivity);
+	case PHYDM_ADAPTIVITY:
+		structure = &dm->adaptivity;
 		break;
 
-	case	PHYDM_DFS:
-		p_struct = &(p_dm->dfs);
+	case PHYDM_DFS:
+		structure = &dm->dfs;
 		break;
 
 	default:
 		break;
 	}
 
+	return structure;
+}
+
+void phydm_phy_info_update(struct dm_struct *dm)
+{
+#if (RTL8822B_SUPPORT == 1)
+	if (dm->support_ic_type == ODM_RTL8822B)
+		dm->phy_dbg_info.condi_num = phydm_get_condi_num_8822b(dm);
 #endif
-	return	p_struct;
 }
 
-void
-phydm_hw_setting(
-	struct PHY_DM_STRUCT		*p_dm
-)
+void phydm_hw_setting(struct dm_struct *dm)
 {
 #if (RTL8821A_SUPPORT == 1)
-	if (p_dm->support_ic_type & ODM_RTL8821)
-		odm_hw_setting_8821a(p_dm);
+	if (dm->support_ic_type & ODM_RTL8821)
+		odm_hw_setting_8821a(dm);
 #endif
 
 #if (RTL8814A_SUPPORT == 1)
-	if (p_dm->support_ic_type & ODM_RTL8814A)
-		phydm_hwsetting_8814a(p_dm);
+	if (dm->support_ic_type & ODM_RTL8814A)
+		phydm_hwsetting_8814a(dm);
 #endif
 
 #if (RTL8822B_SUPPORT == 1)
-	if (p_dm->support_ic_type & ODM_RTL8822B)
-		phydm_hwsetting_8822b(p_dm);
+	if (dm->support_ic_type & ODM_RTL8822B)
+		phydm_hwsetting_8822b(dm);
+#endif
+
+#if (RTL8812A_SUPPORT == 1)
+	if (dm->support_ic_type & ODM_RTL8812)
+		phydm_hwsetting_8812a(dm);
 #endif
 
 #if (RTL8197F_SUPPORT == 1)
-	if (p_dm->support_ic_type & ODM_RTL8197F)
-		phydm_hwsetting_8197f(p_dm);
+	if (dm->support_ic_type & ODM_RTL8197F)
+		phydm_hwsetting_8197f(dm);
 #endif
-}
 
+#if (RTL8192F_SUPPORT == 1)
+	if (dm->support_ic_type & ODM_RTL8192F)
+		phydm_hwsetting_8192f(dm);
+#endif
+}
 
 #if (DM_ODM_SUPPORT_TYPE & (ODM_WIN))
-u64
-phydm_supportability_init_win(
-	void		*p_dm_void
-)
+u64 phydm_supportability_init_win(
+	void *dm_void)
 {
-	struct PHY_DM_STRUCT		*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	u64			support_ability = 0;
-
-	switch (p_dm->support_ic_type) {
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	u64 support_ability = 0;
 
-	/*---------------N Series--------------------*/
-	#if (RTL8188E_SUPPORT == 1)	
-	case	ODM_RTL8188E:
+	switch (dm->support_ic_type) {
+/*@---------------N Series--------------------*/
+#if (RTL8188E_SUPPORT)
+	case ODM_RTL8188E:
 		support_ability |=
-			ODM_BB_DIG				|
-			ODM_BB_RA_MASK			|
+			ODM_BB_DIG |
+			ODM_BB_RA_MASK |
 			/*ODM_BB_DYNAMIC_TXPWR	|*/
-			ODM_BB_FA_CNT			|
-			ODM_BB_RSSI_MONITOR		|
-			ODM_BB_CCK_PD			|
+			ODM_BB_FA_CNT |
+			ODM_BB_RSSI_MONITOR |
+			ODM_BB_CCK_PD |
 			/*ODM_BB_PWR_TRAIN		|*/
-			ODM_BB_RATE_ADAPTIVE	|
-			ODM_BB_CFO_TRACKING		|
-			/*ODM_BB_ENV_MONITOR			|*/
+			ODM_BB_RATE_ADAPTIVE |
+			ODM_BB_CFO_TRACKING |
+			ODM_BB_ENV_MONITOR |
 			ODM_BB_PRIMARY_CCA;
 		break;
-	#endif
+#endif
 
-	#if (RTL8192E_SUPPORT == 1)
-	case	ODM_RTL8192E:
+#if (RTL8192E_SUPPORT)
+	case ODM_RTL8192E:
 		support_ability |=
-			ODM_BB_DIG				|
-			ODM_BB_RA_MASK			|
+			ODM_BB_DIG |
+			ODM_BB_RA_MASK |
 			/*ODM_BB_DYNAMIC_TXPWR	|*/
-			ODM_BB_FA_CNT			|
-			ODM_BB_RSSI_MONITOR		|
-			ODM_BB_CCK_PD			|
+			ODM_BB_FA_CNT |
+			ODM_BB_RSSI_MONITOR |
+			ODM_BB_CCK_PD |
 			/*ODM_BB_PWR_TRAIN		|*/
-			ODM_BB_RATE_ADAPTIVE	|
-			ODM_BB_CFO_TRACKING		|
-			/*ODM_BB_ENV_MONITOR		|*/
+			ODM_BB_RATE_ADAPTIVE |
+			ODM_BB_CFO_TRACKING |
+			ODM_BB_ENV_MONITOR |
 			ODM_BB_PRIMARY_CCA;
 		break;
-	#endif
+#endif
 
-	#if (RTL8723B_SUPPORT == 1)
-	case	ODM_RTL8723B:
+#if (RTL8723B_SUPPORT)
+	case ODM_RTL8723B:
 		support_ability |=
-			ODM_BB_DIG				|
-			ODM_BB_RA_MASK			|
+			ODM_BB_DIG |
+			ODM_BB_RA_MASK |
 			/*ODM_BB_DYNAMIC_TXPWR	|*/
-			ODM_BB_FA_CNT			|
-			ODM_BB_RSSI_MONITOR		|
-			ODM_BB_CCK_PD			|
+			ODM_BB_FA_CNT |
+			ODM_BB_RSSI_MONITOR |
+			ODM_BB_CCK_PD |
 			/*ODM_BB_PWR_TRAIN		|*/
-			ODM_BB_RATE_ADAPTIVE	|
-			ODM_BB_CFO_TRACKING		|
-			/*ODM_BB_ENV_MONITOR		|*/
+			ODM_BB_RATE_ADAPTIVE |
+			ODM_BB_CFO_TRACKING |
+			ODM_BB_ENV_MONITOR |
 			ODM_BB_PRIMARY_CCA;
 		break;
-	#endif
+#endif
 
-	#if (RTL8703B_SUPPORT == 1)
-	case	ODM_RTL8703B:
+#if (RTL8703B_SUPPORT)
+	case ODM_RTL8703B:
 		support_ability |=
-			ODM_BB_DIG				|
-			ODM_BB_RA_MASK			|
+			ODM_BB_DIG |
+			ODM_BB_RA_MASK |
 			/*ODM_BB_DYNAMIC_TXPWR	|*/
-			ODM_BB_FA_CNT			|
-			ODM_BB_RSSI_MONITOR		|
-			ODM_BB_CCK_PD			|
+			ODM_BB_FA_CNT |
+			ODM_BB_RSSI_MONITOR |
+			ODM_BB_CCK_PD |
 			/*ODM_BB_PWR_TRAIN		|*/
-			ODM_BB_RATE_ADAPTIVE	|
-			ODM_BB_CFO_TRACKING;
-			/*ODM_BB_ENV_MONITOR;*/
+			ODM_BB_RATE_ADAPTIVE |
+			ODM_BB_CFO_TRACKING |
+			ODM_BB_ENV_MONITOR;
 		break;
-	#endif
+#endif
 
-	#if (RTL8723D_SUPPORT == 1)
-	case	ODM_RTL8723D:
+#if (RTL8723D_SUPPORT)
+	case ODM_RTL8723D:
 		support_ability |=
-			ODM_BB_DIG				|
-			ODM_BB_RA_MASK			|
+			ODM_BB_DIG |
+			ODM_BB_RA_MASK |
 			/*ODM_BB_DYNAMIC_TXPWR	|*/
-			ODM_BB_FA_CNT			|
-			ODM_BB_RSSI_MONITOR		|
-			ODM_BB_CCK_PD			|
-			/* ODM_BB_PWR_TRAIN	| */
-			ODM_BB_RATE_ADAPTIVE	|
-			ODM_BB_CFO_TRACKING;
-			/*ODM_BB_ENV_MONITOR;*/
+			ODM_BB_FA_CNT |
+			ODM_BB_RSSI_MONITOR |
+			ODM_BB_CCK_PD |
+			ODM_BB_PWR_TRAIN	|
+			ODM_BB_RATE_ADAPTIVE |
+			ODM_BB_CFO_TRACKING |
+			ODM_BB_ENV_MONITOR;
 		break;
-	#endif
+#endif
 
-	#if (RTL8710B_SUPPORT == 1)
-	case	ODM_RTL8710B:
+#if (RTL8710B_SUPPORT)
+	case ODM_RTL8710B:
 		support_ability |=
-			ODM_BB_DIG				|
-			ODM_BB_RA_MASK			|
+			ODM_BB_DIG |
+			ODM_BB_RA_MASK |
 			/*ODM_BB_DYNAMIC_TXPWR	|*/
-			ODM_BB_FA_CNT			|
-			ODM_BB_RSSI_MONITOR		|
-			ODM_BB_CCK_PD			|
-			/*ODM_BB_PWR_TRAIN		|*/
-			ODM_BB_RATE_ADAPTIVE	|
-			ODM_BB_CFO_TRACKING;
-			/*ODM_BB_ENV_MONITOR;*/
+			ODM_BB_FA_CNT |
+			ODM_BB_RSSI_MONITOR |
+			ODM_BB_CCK_PD |
+			ODM_BB_PWR_TRAIN	|
+			ODM_BB_RATE_ADAPTIVE |
+			ODM_BB_CFO_TRACKING |
+			ODM_BB_ENV_MONITOR;
 		break;
-	#endif
+#endif
 
-	#if (RTL8188F_SUPPORT == 1)
-	case	ODM_RTL8188F:
+#if (RTL8188F_SUPPORT)
+	case ODM_RTL8188F:
 		support_ability |=
-			ODM_BB_DIG				|
-			ODM_BB_RA_MASK			|
+			ODM_BB_DIG |
+			ODM_BB_RA_MASK |
 			/*ODM_BB_DYNAMIC_TXPWR	|*/
-			ODM_BB_FA_CNT			|
-			ODM_BB_RSSI_MONITOR		|
-			ODM_BB_CCK_PD			|
-			/*ODM_BB_PWR_TRAIN		|*/
-			ODM_BB_RATE_ADAPTIVE	|
-			ODM_BB_CFO_TRACKING;
-			/*ODM_BB_ENV_MONITOR;*/
+			ODM_BB_FA_CNT |
+			ODM_BB_RSSI_MONITOR |
+			ODM_BB_CCK_PD |
+			/*ODM_BB_PWR_TRAIN	|*/
+			ODM_BB_RATE_ADAPTIVE |
+			ODM_BB_CFO_TRACKING |
+			ODM_BB_ENV_MONITOR;
 		break;
-	#endif
-	
-	/*---------------AC Series-------------------*/
+#endif
+
+#if (RTL8192F_SUPPORT)
+	case ODM_RTL8192F:
+		support_ability |=
+			ODM_BB_DIG |
+			ODM_BB_RA_MASK |
+			ODM_BB_FA_CNT |
+			ODM_BB_RSSI_MONITOR |
+			ODM_BB_CCK_PD |
+			ODM_BB_PWR_TRAIN	|
+			ODM_BB_RATE_ADAPTIVE |
+			ODM_BB_CFO_TRACKING |
+			ODM_BB_ADAPTIVE_SOML |
+			ODM_BB_ENV_MONITOR;
+		/*ODM_BB_LNA_SAT_CHK		|*/
+		/*ODM_BB_PRIMARY_CCA*/
+
+		break;
+#endif
+
+/*@---------------AC Series-------------------*/
 
-	#if ((RTL8812A_SUPPORT == 1) || (RTL8821A_SUPPORT == 1))
-	case	ODM_RTL8812:
-	case	ODM_RTL8821:
+#if (RTL8812A_SUPPORT || RTL8821A_SUPPORT)
+	case ODM_RTL8812:
+	case ODM_RTL8821:
 		support_ability |=
-			ODM_BB_DIG				|
-			ODM_BB_RA_MASK			|
-			ODM_BB_DYNAMIC_TXPWR	|
-			ODM_BB_FA_CNT			|
-			ODM_BB_RSSI_MONITOR		|
-			ODM_BB_CCK_PD			|
+			ODM_BB_DIG |
+			ODM_BB_RA_MASK |
+			ODM_BB_DYNAMIC_TXPWR |
+			ODM_BB_FA_CNT |
+			ODM_BB_RSSI_MONITOR |
+			ODM_BB_CCK_PD |
 			/*ODM_BB_PWR_TRAIN		|*/
-			ODM_BB_RATE_ADAPTIVE	|
-			ODM_BB_CFO_TRACKING;
-			/*ODM_BB_ENV_MONITOR;*/
+			ODM_BB_RATE_ADAPTIVE |
+			ODM_BB_CFO_TRACKING |
+			ODM_BB_ENV_MONITOR;
 		break;
-	#endif
+#endif
 
-	#if (RTL8814A_SUPPORT == 1) 
+#if (RTL8814A_SUPPORT)
 	case ODM_RTL8814A:
 		support_ability |=
-			ODM_BB_DIG				|
-			ODM_BB_RA_MASK			|
-			ODM_BB_DYNAMIC_TXPWR	|
-			ODM_BB_FA_CNT			|
-			ODM_BB_RSSI_MONITOR		|
-			ODM_BB_CCK_PD			|
+			ODM_BB_DIG |
+			ODM_BB_RA_MASK |
+			ODM_BB_DYNAMIC_TXPWR |
+			ODM_BB_FA_CNT |
+			ODM_BB_RSSI_MONITOR |
+			ODM_BB_CCK_PD |
 			/*ODM_BB_PWR_TRAIN		|*/
-			ODM_BB_RATE_ADAPTIVE	|
-			ODM_BB_CFO_TRACKING;
-			/*ODM_BB_ENV_MONITOR;*/
+			ODM_BB_RATE_ADAPTIVE |
+			ODM_BB_CFO_TRACKING |
+			ODM_BB_ENV_MONITOR;
 		break;
-	#endif
-	
-	#if (RTL8814B_SUPPORT == 1) 
-	case ODM_RTL8814B:
+#endif
+
+#if (RTL8822B_SUPPORT)
+	case ODM_RTL8822B:
 		support_ability |=
-			ODM_BB_DIG				|
-			ODM_BB_RA_MASK			|
+			ODM_BB_DIG |
+			ODM_BB_RA_MASK |
 			/*ODM_BB_DYNAMIC_TXPWR	|*/
-			ODM_BB_FA_CNT			|
-			ODM_BB_RSSI_MONITOR		|
-			ODM_BB_CCK_PD			|
+			ODM_BB_FA_CNT |
+			ODM_BB_RSSI_MONITOR |
+			ODM_BB_CCK_PD |
 			/*ODM_BB_PWR_TRAIN		|*/
-			ODM_BB_RATE_ADAPTIVE	|
-			ODM_BB_CFO_TRACKING;
-			/*ODM_BB_ENV_MONITOR;*/
+			/*ODM_BB_ADAPTIVE_SOML |*/
+			ODM_BB_RATE_ADAPTIVE |
+			ODM_BB_CFO_TRACKING |
+			ODM_BB_ENV_MONITOR;
 		break;
-	#endif
+#endif
 
-	#if (RTL8822B_SUPPORT == 1) 
-	case ODM_RTL8822B:
+#if (RTL8821C_SUPPORT)
+	case ODM_RTL8821C:
 		support_ability |=
-			ODM_BB_DIG				|
-			ODM_BB_RA_MASK			|
+			ODM_BB_DIG |
+			ODM_BB_RA_MASK |
 			/*ODM_BB_DYNAMIC_TXPWR	|*/
-			ODM_BB_FA_CNT			|
-			ODM_BB_RSSI_MONITOR		|
-			ODM_BB_CCK_PD			|
+			ODM_BB_FA_CNT |
+			ODM_BB_RSSI_MONITOR |
+			ODM_BB_CCK_PD |
 			/*ODM_BB_PWR_TRAIN		|*/
-			ODM_BB_RATE_ADAPTIVE	|
-			ODM_BB_CFO_TRACKING		|
-			/*ODM_BB_ENV_MONITOR		|*/
-			ODM_BB_ADAPTIVE_SOML;
+			ODM_BB_RATE_ADAPTIVE |
+			ODM_BB_CFO_TRACKING |
+			ODM_BB_ENV_MONITOR;
 		break;
-	#endif
+#endif
 
-	#if (RTL8821C_SUPPORT == 1) 
-	case ODM_RTL8821C:
+/*@---------------JGR3 Series-------------------*/
+
+#if (RTL8822C_SUPPORT)
+	case ODM_RTL8822C:
 		support_ability |=
-			ODM_BB_DIG				|
-			ODM_BB_RA_MASK			|
+			ODM_BB_DIG |
+			ODM_BB_RA_MASK |
+			/* ODM_BB_DYNAMIC_TXPWR	|*/
+			ODM_BB_FA_CNT |
+			ODM_BB_RSSI_MONITOR |
+			ODM_BB_CCK_PD |
+			ODM_BB_RATE_ADAPTIVE |
+			ODM_BB_CFO_TRACKING |
+			ODM_BB_ENV_MONITOR;
+		break;
+#endif
+
+#if (RTL8814B_SUPPORT)
+	case ODM_RTL8814B:
+		support_ability |=
+			ODM_BB_DIG |
+			ODM_BB_RA_MASK |
 			/*ODM_BB_DYNAMIC_TXPWR	|*/
-			ODM_BB_FA_CNT			|
-			ODM_BB_RSSI_MONITOR		|
-			ODM_BB_CCK_PD			|
+			ODM_BB_FA_CNT |
+			ODM_BB_RSSI_MONITOR |
+			/*ODM_BB_CCK_PD |*/
 			/*ODM_BB_PWR_TRAIN		|*/
-			ODM_BB_RATE_ADAPTIVE	|
+			ODM_BB_RATE_ADAPTIVE |
 			ODM_BB_CFO_TRACKING;
 			/*ODM_BB_ENV_MONITOR;*/
 		break;
-	#endif
+#endif
 
 	default:
 		support_ability |=
-			ODM_BB_DIG				|
-			ODM_BB_RA_MASK			|
+			ODM_BB_DIG |
+			ODM_BB_RA_MASK |
 			/*ODM_BB_DYNAMIC_TXPWR	|*/
-			ODM_BB_FA_CNT			|
-			ODM_BB_RSSI_MONITOR		|
-			ODM_BB_CCK_PD			|
+			ODM_BB_FA_CNT |
+			ODM_BB_RSSI_MONITOR |
+			ODM_BB_CCK_PD |
 			/*ODM_BB_PWR_TRAIN		|*/
-			ODM_BB_RATE_ADAPTIVE	|
-			ODM_BB_CFO_TRACKING;
-			/*ODM_BB_ENV_MONITOR;*/
+			ODM_BB_RATE_ADAPTIVE |
+			ODM_BB_CFO_TRACKING |
+			ODM_BB_ENV_MONITOR;
 
-			dbg_print("[Warning] Supportability Init Warning !!!\n");
+		pr_debug("[Warning] Supportability Init Warning !!!\n");
 		break;
-
 	}
 
-	/*[Config Antenna Diveristy]*/
-	if (*(p_dm->p_enable_antdiv))
-		support_ability |= ODM_BB_ANT_DIV;
-	
-	/*[Config Adaptivity]*/
-	if (*(p_dm->p_enable_adaptivity))
-		support_ability |= ODM_BB_ADAPTIVITY;
-
 	return support_ability;
 }
 #endif
 
 #if (DM_ODM_SUPPORT_TYPE & (ODM_CE))
-u64
-phydm_supportability_init_ce(
-	void		*p_dm_void
-)
+u64 phydm_supportability_init_ce(void *dm_void)
 {
-	struct PHY_DM_STRUCT		*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	u64			support_ability = 0;
-
-	switch (p_dm->support_ic_type) {
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	u64 support_ability = 0;
 
-	/*---------------N Series--------------------*/
-	#if (RTL8188E_SUPPORT == 1)	
-	case	ODM_RTL8188E:
+	switch (dm->support_ic_type) {
+/*@---------------N Series--------------------*/
+#if (RTL8188E_SUPPORT)
+	case ODM_RTL8188E:
 		support_ability |=
-			ODM_BB_DIG				|
-			ODM_BB_RA_MASK			|
-			/*ODM_BB_DYNAMIC_TXPWR	|*/
-			ODM_BB_FA_CNT			|
-			ODM_BB_RSSI_MONITOR		|
-			ODM_BB_CCK_PD			|
-			/*ODM_BB_PWR_TRAIN		|*/
-			ODM_BB_RATE_ADAPTIVE	|
-			ODM_BB_CFO_TRACKING		|
-			ODM_BB_ENV_MONITOR			|
+			ODM_BB_DIG |
+			ODM_BB_RA_MASK |
+			/*@ODM_BB_DYNAMIC_TXPWR	|*/
+			ODM_BB_FA_CNT |
+			ODM_BB_RSSI_MONITOR |
+			ODM_BB_CCK_PD |
+			/*@ODM_BB_PWR_TRAIN		|*/
+			ODM_BB_RATE_ADAPTIVE |
+			ODM_BB_CFO_TRACKING |
+			ODM_BB_ENV_MONITOR |
 			ODM_BB_PRIMARY_CCA;
 		break;
-	#endif
+#endif
 
-	#if (RTL8192E_SUPPORT == 1)
-	case	ODM_RTL8192E:
+#if (RTL8192E_SUPPORT)
+	case ODM_RTL8192E:
 		support_ability |=
-			ODM_BB_DIG				|
-			ODM_BB_RA_MASK			|
-			/*ODM_BB_DYNAMIC_TXPWR	|*/
-			ODM_BB_FA_CNT			|
-			ODM_BB_RSSI_MONITOR		|
-			ODM_BB_CCK_PD			|
-			/*ODM_BB_PWR_TRAIN		|*/
-			ODM_BB_RATE_ADAPTIVE	|
-			ODM_BB_CFO_TRACKING		|
-			ODM_BB_ENV_MONITOR			|
+			ODM_BB_DIG |
+			ODM_BB_RA_MASK |
+			/*@ODM_BB_DYNAMIC_TXPWR	|*/
+			ODM_BB_FA_CNT |
+			ODM_BB_RSSI_MONITOR |
+			ODM_BB_CCK_PD |
+			/*@ODM_BB_PWR_TRAIN		|*/
+			ODM_BB_RATE_ADAPTIVE |
+			ODM_BB_CFO_TRACKING |
+			ODM_BB_ENV_MONITOR |
 			ODM_BB_PRIMARY_CCA;
 		break;
-	#endif
+#endif
 
-	#if (RTL8723B_SUPPORT == 1)
-	case	ODM_RTL8723B:
+#if (RTL8723B_SUPPORT)
+	case ODM_RTL8723B:
 		support_ability |=
-			ODM_BB_DIG				|
-			ODM_BB_RA_MASK			|
-			/*ODM_BB_DYNAMIC_TXPWR	|*/
-			ODM_BB_FA_CNT			|
-			ODM_BB_RSSI_MONITOR		|
-			ODM_BB_CCK_PD			|
-			/*ODM_BB_PWR_TRAIN		|*/
-			ODM_BB_RATE_ADAPTIVE	|
-			ODM_BB_CFO_TRACKING		|
-			ODM_BB_ENV_MONITOR			|
+			ODM_BB_DIG |
+			ODM_BB_RA_MASK |
+			/*@ODM_BB_DYNAMIC_TXPWR	|*/
+			ODM_BB_FA_CNT |
+			ODM_BB_RSSI_MONITOR |
+			ODM_BB_CCK_PD |
+			/*@ODM_BB_PWR_TRAIN		|*/
+			ODM_BB_RATE_ADAPTIVE |
+			ODM_BB_CFO_TRACKING |
+			ODM_BB_ENV_MONITOR |
 			ODM_BB_PRIMARY_CCA;
 		break;
-	#endif
+#endif
 
-	#if (RTL8703B_SUPPORT == 1)
-	case	ODM_RTL8703B:
+#if (RTL8703B_SUPPORT)
+	case ODM_RTL8703B:
 		support_ability |=
-			ODM_BB_DIG				|
-			ODM_BB_RA_MASK			|
-			/*ODM_BB_DYNAMIC_TXPWR	|*/
-			ODM_BB_FA_CNT			|
-			ODM_BB_RSSI_MONITOR		|
-			ODM_BB_CCK_PD			|
-			/*ODM_BB_PWR_TRAIN		|*/
-			ODM_BB_RATE_ADAPTIVE	|
-			ODM_BB_CFO_TRACKING		|
+			ODM_BB_DIG |
+			ODM_BB_RA_MASK |
+			/*@ODM_BB_DYNAMIC_TXPWR	|*/
+			ODM_BB_FA_CNT |
+			ODM_BB_RSSI_MONITOR |
+			ODM_BB_CCK_PD |
+			/*@ODM_BB_PWR_TRAIN		|*/
+			ODM_BB_RATE_ADAPTIVE |
+			ODM_BB_CFO_TRACKING |
 			ODM_BB_ENV_MONITOR;
 		break;
-	#endif
+#endif
 
-	#if (RTL8723D_SUPPORT == 1)
-	case	ODM_RTL8723D:
+#if (RTL8723D_SUPPORT)
+	case ODM_RTL8723D:
 		support_ability |=
-			ODM_BB_DIG				|
-			ODM_BB_RA_MASK			|
-			/*ODM_BB_DYNAMIC_TXPWR	|*/
-			ODM_BB_FA_CNT			|
-			ODM_BB_RSSI_MONITOR		|
-			ODM_BB_CCK_PD			|
-			/* ODM_BB_PWR_TRAIN	| */	
-			ODM_BB_RATE_ADAPTIVE	|
-			ODM_BB_CFO_TRACKING		|
+			ODM_BB_DIG |
+			ODM_BB_RA_MASK |
+			/*@ODM_BB_DYNAMIC_TXPWR	|*/
+			ODM_BB_FA_CNT |
+			ODM_BB_RSSI_MONITOR |
+			ODM_BB_CCK_PD |
+			ODM_BB_PWR_TRAIN	|
+			ODM_BB_RATE_ADAPTIVE |
+			ODM_BB_CFO_TRACKING |
 			ODM_BB_ENV_MONITOR;
 		break;
-	#endif
+#endif
 
-	#if (RTL8710B_SUPPORT == 1)
-	case	ODM_RTL8710B:
+#if (RTL8710B_SUPPORT)
+	case ODM_RTL8710B:
 		support_ability |=
-			ODM_BB_DIG				|
-			ODM_BB_RA_MASK			|
-			/*ODM_BB_DYNAMIC_TXPWR	|*/
-			ODM_BB_FA_CNT			|
-			ODM_BB_RSSI_MONITOR		|
-			ODM_BB_CCK_PD			|
-			/*ODM_BB_PWR_TRAIN		|*/
-			ODM_BB_RATE_ADAPTIVE	|
-			ODM_BB_CFO_TRACKING		|
+			ODM_BB_DIG |
+			ODM_BB_RA_MASK |
+			/*@ODM_BB_DYNAMIC_TXPWR	|*/
+			ODM_BB_FA_CNT |
+			ODM_BB_RSSI_MONITOR |
+			ODM_BB_CCK_PD |
+			/*@ODM_BB_PWR_TRAIN		|*/
+			ODM_BB_RATE_ADAPTIVE |
+			ODM_BB_CFO_TRACKING |
 			ODM_BB_ENV_MONITOR;
 		break;
-	#endif
+#endif
 
-	#if (RTL8188F_SUPPORT == 1)
-	case	ODM_RTL8188F:
+#if (RTL8188F_SUPPORT)
+	case ODM_RTL8188F:
 		support_ability |=
-			ODM_BB_DIG				|
-			ODM_BB_RA_MASK			|
-			/*ODM_BB_DYNAMIC_TXPWR	|*/
-			ODM_BB_FA_CNT			|
-			ODM_BB_RSSI_MONITOR		|
-			ODM_BB_CCK_PD			|
-			/*ODM_BB_PWR_TRAIN		|*/
-			ODM_BB_RATE_ADAPTIVE	|
-			ODM_BB_CFO_TRACKING		|
+			ODM_BB_DIG |
+			ODM_BB_RA_MASK |
+			/*@ODM_BB_DYNAMIC_TXPWR	|*/
+			ODM_BB_FA_CNT |
+			ODM_BB_RSSI_MONITOR |
+			ODM_BB_CCK_PD |
+			/*@ODM_BB_PWR_TRAIN		|*/
+			ODM_BB_RATE_ADAPTIVE |
+			ODM_BB_CFO_TRACKING |
 			ODM_BB_ENV_MONITOR;
 		break;
-	#endif
-		
-	/*---------------AC Series-------------------*/
+#endif
 
-	#if ((RTL8812A_SUPPORT == 1) || (RTL8821A_SUPPORT == 1))
-	case	ODM_RTL8812:
-	case	ODM_RTL8821:
+#if (RTL8192F_SUPPORT)
+	case ODM_RTL8192F:
 		support_ability |=
-			ODM_BB_DIG				|
-			ODM_BB_RA_MASK			|
-			/*ODM_BB_DYNAMIC_TXPWR	|*/
-			ODM_BB_FA_CNT			|
-			ODM_BB_RSSI_MONITOR		|
-			ODM_BB_CCK_PD			|
-			/*ODM_BB_PWR_TRAIN		|*/
-			ODM_BB_RATE_ADAPTIVE	|
-			ODM_BB_CFO_TRACKING		|
+			ODM_BB_DIG |
+			ODM_BB_RA_MASK |
+			ODM_BB_FA_CNT |
+			ODM_BB_RSSI_MONITOR |
+			ODM_BB_CCK_PD |
+			ODM_BB_PWR_TRAIN		|
+			ODM_BB_RATE_ADAPTIVE |
+			ODM_BB_CFO_TRACKING |
+			/*@ODM_BB_ADAPTIVE_SOML |*/
 			ODM_BB_ENV_MONITOR;
+		/*@ODM_BB_LNA_SAT_CHK		|*/
+		/*@ODM_BB_PRIMARY_CCA*/
 		break;
-	#endif
+#endif
+/*@---------------AC Series-------------------*/
 
-	#if (RTL8814A_SUPPORT == 1) 
-	case ODM_RTL8814A:
+#if (RTL8812A_SUPPORT || RTL8821A_SUPPORT)
+	case ODM_RTL8812:
+	case ODM_RTL8821:
 		support_ability |=
-			ODM_BB_DIG				|
-			ODM_BB_RA_MASK			|
-			/*ODM_BB_DYNAMIC_TXPWR	|*/
-			ODM_BB_FA_CNT			|
-			ODM_BB_RSSI_MONITOR		|
-			ODM_BB_CCK_PD			|
-			/*ODM_BB_PWR_TRAIN		|*/
-			ODM_BB_RATE_ADAPTIVE	|
-			ODM_BB_CFO_TRACKING		|
+			ODM_BB_DIG |
+			ODM_BB_RA_MASK |
+			/*@ODM_BB_DYNAMIC_TXPWR	|*/
+			ODM_BB_FA_CNT |
+			ODM_BB_RSSI_MONITOR |
+			ODM_BB_CCK_PD |
+			/*@ODM_BB_PWR_TRAIN		|*/
+			ODM_BB_RATE_ADAPTIVE |
+			ODM_BB_CFO_TRACKING |
 			ODM_BB_ENV_MONITOR;
 		break;
-	#endif
-	
-	#if (RTL8814B_SUPPORT == 1) 
-	case ODM_RTL8814B:
+#endif
+
+#if (RTL8814A_SUPPORT)
+	case ODM_RTL8814A:
 		support_ability |=
-			ODM_BB_DIG				|
-			ODM_BB_RA_MASK			|
-			/*ODM_BB_DYNAMIC_TXPWR	|*/
-			ODM_BB_FA_CNT			|
-			ODM_BB_RSSI_MONITOR		|
-			ODM_BB_CCK_PD			|
-			/*ODM_BB_PWR_TRAIN		|*/
-			ODM_BB_RATE_ADAPTIVE	|
-			ODM_BB_CFO_TRACKING		|
+			ODM_BB_DIG |
+			ODM_BB_RA_MASK |
+			/*@ODM_BB_DYNAMIC_TXPWR	|*/
+			ODM_BB_FA_CNT |
+			ODM_BB_RSSI_MONITOR |
+			ODM_BB_CCK_PD |
+			/*@ODM_BB_PWR_TRAIN		|*/
+			ODM_BB_RATE_ADAPTIVE |
+			ODM_BB_CFO_TRACKING |
 			ODM_BB_ENV_MONITOR;
 		break;
-	#endif
+#endif
 
-	#if (RTL8822B_SUPPORT == 1) 
+#if (RTL8822B_SUPPORT)
 	case ODM_RTL8822B:
 		support_ability |=
-			ODM_BB_DIG				|
-			ODM_BB_RA_MASK			|
-			/*ODM_BB_DYNAMIC_TXPWR	|*/
-			ODM_BB_FA_CNT			|
-			ODM_BB_RSSI_MONITOR		|
-			ODM_BB_CCK_PD			|
-			/*ODM_BB_PWR_TRAIN		|*/
-			ODM_BB_RATE_ADAPTIVE	|
-			ODM_BB_CFO_TRACKING		|
+			ODM_BB_DIG |
+			ODM_BB_RA_MASK |
+			/*@ODM_BB_DYNAMIC_TXPWR	|*/
+			ODM_BB_FA_CNT |
+			ODM_BB_RSSI_MONITOR |
+			ODM_BB_CCK_PD |
+			/*@ODM_BB_PWR_TRAIN		|*/
+			ODM_BB_RATE_ADAPTIVE |
+			ODM_BB_CFO_TRACKING |
 			ODM_BB_ENV_MONITOR;
 		break;
-	#endif
+#endif
 
-	#if (RTL8821C_SUPPORT == 1) 
+#if (RTL8821C_SUPPORT)
 	case ODM_RTL8821C:
 		support_ability |=
-			ODM_BB_DIG				|
-			ODM_BB_RA_MASK			|
-			/*ODM_BB_DYNAMIC_TXPWR	|*/
-			ODM_BB_FA_CNT			|
-			ODM_BB_RSSI_MONITOR		|
-			ODM_BB_CCK_PD			|
-			/*ODM_BB_PWR_TRAIN		|*/
-			ODM_BB_RATE_ADAPTIVE	|
-			ODM_BB_CFO_TRACKING		|
+			ODM_BB_DIG |
+			ODM_BB_RA_MASK |
+			/*@ODM_BB_DYNAMIC_TXPWR	|*/
+			ODM_BB_FA_CNT |
+			ODM_BB_RSSI_MONITOR |
+			ODM_BB_CCK_PD |
+			/*@ODM_BB_PWR_TRAIN		|*/
+			ODM_BB_RATE_ADAPTIVE |
+			ODM_BB_CFO_TRACKING |
 			ODM_BB_ENV_MONITOR;
 		break;
-	#endif
+#endif
 
-	default:
+/*@---------------JGR3 Series-------------------*/
+
+#if (RTL8822C_SUPPORT)
+	case ODM_RTL8822C:
 		support_ability |=
-			ODM_BB_DIG				|
-			ODM_BB_RA_MASK			|
-			/*ODM_BB_DYNAMIC_TXPWR	|*/
-			ODM_BB_FA_CNT			|
-			ODM_BB_RSSI_MONITOR		|
-			ODM_BB_CCK_PD			|
-			/*ODM_BB_PWR_TRAIN		|*/
-			ODM_BB_RATE_ADAPTIVE	|
-			ODM_BB_CFO_TRACKING		|
+			ODM_BB_DIG |
+			ODM_BB_RA_MASK |
+			/* ODM_BB_DYNAMIC_TXPWR	|*/
+			ODM_BB_FA_CNT |
+			ODM_BB_RSSI_MONITOR |
+			ODM_BB_CCK_PD |
+			ODM_BB_RATE_ADAPTIVE |
+			ODM_BB_CFO_TRACKING |
 			ODM_BB_ENV_MONITOR;
+		break;
+#endif
 
-			dbg_print("[Warning] Supportability Init Warning !!!\n");
+#if (RTL8814B_SUPPORT)
+	case ODM_RTL8814B:
+		support_ability |=
+			ODM_BB_DIG |
+			ODM_BB_RA_MASK |
+			/*@ODM_BB_DYNAMIC_TXPWR	|*/
+			ODM_BB_FA_CNT |
+			ODM_BB_RSSI_MONITOR;
+			/*ODM_BB_CCK_PD |*/
+			/*@ODM_BB_PWR_TRAIN		|*/
+			/*ODM_BB_RATE_ADAPTIVE |*/
+			/*ODM_BB_CFO_TRACKING |*/
+			/*ODM_BB_ENV_MONITOR;*/
 		break;
+#endif
+
+	default:
+		support_ability |=
+			ODM_BB_DIG |
+			ODM_BB_RA_MASK |
+			/*@ODM_BB_DYNAMIC_TXPWR	|*/
+			ODM_BB_FA_CNT |
+			ODM_BB_RSSI_MONITOR |
+			ODM_BB_CCK_PD |
+			/*@ODM_BB_PWR_TRAIN		|*/
+			ODM_BB_RATE_ADAPTIVE |
+			ODM_BB_CFO_TRACKING |
+			ODM_BB_ENV_MONITOR;
 
+		pr_debug("[Warning] Supportability Init Warning !!!\n");
+		break;
 	}
-	
-	/*[Config Antenna Diveristy]*/
-	if (*(p_dm->p_enable_antdiv))
-		support_ability |= ODM_BB_ANT_DIV;
-	
-	/*[Config Adaptivity]*/
-	if (*(p_dm->p_enable_adaptivity))
-		support_ability |= ODM_BB_ADAPTIVITY;
-	
+
 	return support_ability;
 }
 #endif
 
 #if (DM_ODM_SUPPORT_TYPE & (ODM_AP))
-u64
-phydm_supportability_init_ap(
-	void		*p_dm_void
-)
+u64 phydm_supportability_init_ap(
+	void *dm_void)
 {
-	struct PHY_DM_STRUCT		*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	u64			support_ability = 0;
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	u64 support_ability = 0;
 
-	switch (p_dm->support_ic_type) {
-
-	/*---------------N Series--------------------*/
-	#if (RTL8188E_SUPPORT == 1)	
-	case	ODM_RTL8188E:
+	switch (dm->support_ic_type) {
+/*@---------------N Series--------------------*/
+#if (RTL8188E_SUPPORT)
+	case ODM_RTL8188E:
 		support_ability |=
-			ODM_BB_DIG				|
-			ODM_BB_RA_MASK			|
-			ODM_BB_FA_CNT			|
-			ODM_BB_RSSI_MONITOR		|
-			ODM_BB_CCK_PD			|
+			ODM_BB_DIG |
+			ODM_BB_RA_MASK |
+			ODM_BB_FA_CNT |
+			ODM_BB_RSSI_MONITOR |
+			ODM_BB_CCK_PD |
 			/*ODM_BB_PWR_TRAIN		|*/
-			ODM_BB_RATE_ADAPTIVE	|
-			ODM_BB_CFO_TRACKING		|
-			ODM_BB_ENV_MONITOR			|
+			ODM_BB_RATE_ADAPTIVE |
+			ODM_BB_CFO_TRACKING |
+			ODM_BB_ENV_MONITOR |
 			ODM_BB_PRIMARY_CCA;
 		break;
-	#endif
+#endif
 
-	#if (RTL8192E_SUPPORT == 1)
-	case	ODM_RTL8192E:
+#if (RTL8192E_SUPPORT)
+	case ODM_RTL8192E:
 		support_ability |=
-			ODM_BB_DIG				|
-			ODM_BB_RA_MASK			|
-			ODM_BB_FA_CNT			|
-			ODM_BB_RSSI_MONITOR		|
-			ODM_BB_CCK_PD			|
+			ODM_BB_DIG |
+			ODM_BB_RA_MASK |
+			ODM_BB_FA_CNT |
+			ODM_BB_RSSI_MONITOR |
+			ODM_BB_CCK_PD |
 			/*ODM_BB_PWR_TRAIN		|*/
-			ODM_BB_RATE_ADAPTIVE	|
-			ODM_BB_CFO_TRACKING		|
-			ODM_BB_ENV_MONITOR			|
+			ODM_BB_RATE_ADAPTIVE |
+			ODM_BB_CFO_TRACKING |
+			ODM_BB_ENV_MONITOR |
 			ODM_BB_PRIMARY_CCA;
 		break;
-	#endif
+#endif
 
-	#if (RTL8723B_SUPPORT == 1)
-	case	ODM_RTL8723B:
+#if (RTL8723B_SUPPORT)
+	case ODM_RTL8723B:
 		support_ability |=
-			ODM_BB_DIG				|
-			ODM_BB_RA_MASK			|
-			ODM_BB_FA_CNT			|
-			ODM_BB_RSSI_MONITOR		|
-			ODM_BB_CCK_PD			|
+			ODM_BB_DIG |
+			ODM_BB_RA_MASK |
+			ODM_BB_FA_CNT |
+			ODM_BB_RSSI_MONITOR |
+			ODM_BB_CCK_PD |
 			/*ODM_BB_PWR_TRAIN		|*/
-			ODM_BB_RATE_ADAPTIVE	|
-			ODM_BB_CFO_TRACKING		|
+			ODM_BB_RATE_ADAPTIVE |
+			ODM_BB_CFO_TRACKING |
 			ODM_BB_ENV_MONITOR;
 		break;
-	#endif
-		
-	#if ((RTL8198F_SUPPORT == 1) || (RTL8197F_SUPPORT == 1))
-	case	ODM_RTL8198F:
-	case	ODM_RTL8197F:
+#endif
+
+#if (RTL8198F_SUPPORT || RTL8197F_SUPPORT)
+	case ODM_RTL8198F:
+		support_ability |=
+			/*ODM_BB_DIG				|*/
+			ODM_BB_RA_MASK |
+			ODM_BB_FA_CNT |
+			ODM_BB_RSSI_MONITOR;
+		/*ODM_BB_CCK_PD			|*/
+		/*ODM_BB_PWR_TRAIN		|*/
+		/*ODM_BB_RATE_ADAPTIVE	|*/
+		/*ODM_BB_CFO_TRACKING		|*/
+		/*ODM_BB_ADAPTIVE_SOML	|*/
+		/*ODM_BB_ENV_MONITOR		|*/
+		/*ODM_BB_LNA_SAT_CHK		|*/
+		/*ODM_BB_PRIMARY_CCA;*/
+		break;
+	case ODM_RTL8197F:
 		support_ability |=
-			ODM_BB_DIG				|
-			ODM_BB_RA_MASK			|
-			ODM_BB_FA_CNT			|
-			ODM_BB_RSSI_MONITOR		|
-			ODM_BB_CCK_PD			|
+			ODM_BB_DIG |
+			ODM_BB_RA_MASK |
+			ODM_BB_FA_CNT |
+			ODM_BB_RSSI_MONITOR |
+			ODM_BB_CCK_PD |
 			/*ODM_BB_PWR_TRAIN		|*/
-			ODM_BB_RATE_ADAPTIVE	|
-			ODM_BB_CFO_TRACKING		|
-			ODM_BB_ADAPTIVE_SOML	|
-			ODM_BB_ENV_MONITOR		|
-			ODM_BB_LNA_SAT_CHK		|
+			ODM_BB_RATE_ADAPTIVE |
+			ODM_BB_CFO_TRACKING |
+			ODM_BB_ADAPTIVE_SOML |
+			ODM_BB_ENV_MONITOR |
+			ODM_BB_LNA_SAT_CHK |
 			ODM_BB_PRIMARY_CCA;
 		break;
-	#endif
-	
-	/*---------------AC Series-------------------*/
+#endif
 
-	#if (RTL8881A_SUPPORT == 1)
-	case	ODM_RTL8881A:
+#if (RTL8192F_SUPPORT)
+	case ODM_RTL8192F:
 		support_ability |=
-			ODM_BB_DIG				|
-			ODM_BB_RA_MASK			|
-			ODM_BB_FA_CNT			|
-			ODM_BB_RSSI_MONITOR		|
-			ODM_BB_CCK_PD			|
+			ODM_BB_DIG |
+			ODM_BB_RA_MASK |
+			ODM_BB_FA_CNT |
+			ODM_BB_RSSI_MONITOR |
+			ODM_BB_CCK_PD |
 			/*ODM_BB_PWR_TRAIN		|*/
-			ODM_BB_RATE_ADAPTIVE	|
-			ODM_BB_CFO_TRACKING		|
-			ODM_BB_ENV_MONITOR;
+			ODM_BB_RATE_ADAPTIVE |
+			/*ODM_BB_CFO_TRACKING		|*/
+			ODM_BB_ADAPTIVE_SOML |
+			/*ODM_BB_ENV_MONITOR		|*/
+			/*ODM_BB_LNA_SAT_CHK		|*/
+			/*ODM_BB_PRIMARY_CCA		|*/
+			0;
 		break;
-	#endif
+#endif
 
-	#if (RTL8814A_SUPPORT == 1) 
-	case ODM_RTL8814A:
+/*@---------------AC Series-------------------*/
+
+#if (RTL8881A_SUPPORT)
+	case ODM_RTL8881A:
 		support_ability |=
-			ODM_BB_DIG				|
-			ODM_BB_RA_MASK			|
-			ODM_BB_FA_CNT			|
-			ODM_BB_RSSI_MONITOR		|
-			ODM_BB_CCK_PD			|
+			ODM_BB_DIG |
+			ODM_BB_RA_MASK |
+			ODM_BB_FA_CNT |
+			ODM_BB_RSSI_MONITOR |
+			ODM_BB_CCK_PD |
 			/*ODM_BB_PWR_TRAIN		|*/
-			ODM_BB_RATE_ADAPTIVE	|
-			ODM_BB_CFO_TRACKING		|
+			ODM_BB_RATE_ADAPTIVE |
+			ODM_BB_CFO_TRACKING |
 			ODM_BB_ENV_MONITOR;
 		break;
-	#endif
-	
-	#if (RTL8814B_SUPPORT == 1) 
-	case ODM_RTL8814B:
+#endif
+
+#if (RTL8814A_SUPPORT)
+	case ODM_RTL8814A:
 		support_ability |=
-			ODM_BB_DIG				|
-			ODM_BB_RA_MASK			|
-			ODM_BB_FA_CNT			|
-			ODM_BB_RSSI_MONITOR		|
-			ODM_BB_CCK_PD			|
+			ODM_BB_DIG |
+			ODM_BB_RA_MASK |
+			ODM_BB_FA_CNT |
+			ODM_BB_RSSI_MONITOR |
+			ODM_BB_CCK_PD |
 			/*ODM_BB_PWR_TRAIN		|*/
-			ODM_BB_RATE_ADAPTIVE	|
-			ODM_BB_CFO_TRACKING		|
+			ODM_BB_RATE_ADAPTIVE |
+			ODM_BB_CFO_TRACKING |
 			ODM_BB_ENV_MONITOR;
 		break;
-	#endif
+#endif
 
-	#if (RTL8822B_SUPPORT == 1) 
+#if (RTL8822B_SUPPORT)
 	case ODM_RTL8822B:
 		support_ability |=
-			ODM_BB_DIG				|
-			ODM_BB_RA_MASK			|
-			ODM_BB_FA_CNT			|
-			ODM_BB_RSSI_MONITOR		|
-			ODM_BB_CCK_PD			|
+			ODM_BB_DIG |
+			ODM_BB_RA_MASK |
+			ODM_BB_FA_CNT |
+			ODM_BB_RSSI_MONITOR |
+			ODM_BB_CCK_PD |
 			/*ODM_BB_PWR_TRAIN		|*/
-			ODM_BB_RATE_ADAPTIVE	|
-			ODM_BB_CFO_TRACKING		|
-			ODM_BB_ENV_MONITOR			|
-			ODM_BB_ADAPTIVE_SOML;
+			/*ODM_BB_ADAPTIVE_SOML	|*/
+			ODM_BB_RATE_ADAPTIVE |
+			ODM_BB_CFO_TRACKING |
+			ODM_BB_ENV_MONITOR;
 		break;
-	#endif
+#endif
 
-	#if (RTL8821C_SUPPORT == 1) 
+#if (RTL8821C_SUPPORT)
 	case ODM_RTL8821C:
 		support_ability |=
-			ODM_BB_DIG				|
-			ODM_BB_RA_MASK			|
-			ODM_BB_FA_CNT			|
-			ODM_BB_RSSI_MONITOR		|
-			ODM_BB_CCK_PD			|
+			ODM_BB_DIG |
+			ODM_BB_RA_MASK |
+			ODM_BB_FA_CNT |
+			ODM_BB_RSSI_MONITOR |
+			ODM_BB_CCK_PD |
 			/*ODM_BB_PWR_TRAIN		|*/
-			ODM_BB_RATE_ADAPTIVE	|
-			ODM_BB_CFO_TRACKING		|
+			ODM_BB_RATE_ADAPTIVE |
+			ODM_BB_CFO_TRACKING |
 			ODM_BB_ENV_MONITOR;
 
 		break;
-	#endif
+#endif
+
+/*@---------------JGR3 Series-------------------*/
+
+#if (RTL8814B_SUPPORT)
+	case ODM_RTL8814B:
+		support_ability |=
+			ODM_BB_DIG |
+			ODM_BB_RA_MASK |
+			ODM_BB_FA_CNT |
+			ODM_BB_RSSI_MONITOR;
+			/*ODM_BB_CCK_PD |*/
+			/*ODM_BB_PWR_TRAIN		|*/
+			/*ODM_BB_RATE_ADAPTIVE |*/
+			/*ODM_BB_CFO_TRACKING |*/
+			/*ODM_BB_ENV_MONITOR;*/
+		break;
+#endif
 
 	default:
 		support_ability |=
-			ODM_BB_DIG				|
-			ODM_BB_RA_MASK			|
-			ODM_BB_FA_CNT			|
-			ODM_BB_RSSI_MONITOR		|
-			ODM_BB_CCK_PD			|
+			ODM_BB_DIG |
+			ODM_BB_RA_MASK |
+			ODM_BB_FA_CNT |
+			ODM_BB_RSSI_MONITOR |
+			ODM_BB_CCK_PD |
 			/*ODM_BB_PWR_TRAIN		|*/
-			ODM_BB_RATE_ADAPTIVE	|
-			ODM_BB_CFO_TRACKING		|
+			ODM_BB_RATE_ADAPTIVE |
+			ODM_BB_CFO_TRACKING |
 			ODM_BB_ENV_MONITOR;
 
-			dbg_print("[Warning] Supportability Init Warning !!!\n");
+		pr_debug("[Warning] Supportability Init Warning !!!\n");
 		break;
-
 	}
 
-	#if 0
-	/*[Config Antenna Diveristy]*/
-	if (*(p_dm->p_enable_antdiv))
+#if 0
+	/*@[Config Antenna Diveristy]*/
+	if (*dm->enable_antdiv)
 		support_ability |= ODM_BB_ANT_DIV;
-	
-	/*[Config Adaptivity]*/
-	if (*(p_dm->p_enable_adaptivity))
+
+	/*@[Config Adaptivity]*/
+	if (*dm->enable_adaptivity)
 		support_ability |= ODM_BB_ADAPTIVITY;
-	#endif
+#endif
 
 	return support_ability;
 }
 #endif
 
 #if (DM_ODM_SUPPORT_TYPE & (ODM_IOT))
-u64
-phydm_supportability_init_iot(
-	void		*p_dm_void
-)
+u64 phydm_supportability_init_iot(
+	void *dm_void)
 {
-	struct PHY_DM_STRUCT		*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	u64			support_ability = 0;
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	u64 support_ability = 0;
 
-	switch (p_dm->support_ic_type) {
+	switch (dm->support_ic_type) {
+#if (RTL8710B_SUPPORT)
+	case ODM_RTL8710B:
+		support_ability |=
+			ODM_BB_DIG |
+			ODM_BB_RA_MASK |
+			/*ODM_BB_DYNAMIC_TXPWR	|*/
+			ODM_BB_FA_CNT |
+			ODM_BB_RSSI_MONITOR |
+			ODM_BB_CCK_PD |
+			/*ODM_BB_PWR_TRAIN		|*/
+			ODM_BB_RATE_ADAPTIVE |
+			ODM_BB_CFO_TRACKING |
+			ODM_BB_ENV_MONITOR;
+		break;
+#endif
 
-	#if (RTL8710B_SUPPORT == 1)
-	case	ODM_RTL8710B:
+#if (RTL8195A_SUPPORT)
+	case ODM_RTL8195A:
 		support_ability |=
-			ODM_BB_DIG				|
-			ODM_BB_RA_MASK			|
+			ODM_BB_DIG |
+			ODM_BB_RA_MASK |
 			/*ODM_BB_DYNAMIC_TXPWR	|*/
-			ODM_BB_FA_CNT			|
-			ODM_BB_RSSI_MONITOR		|
-			ODM_BB_CCK_PD			|
+			ODM_BB_FA_CNT |
+			ODM_BB_RSSI_MONITOR |
+			ODM_BB_CCK_PD |
 			/*ODM_BB_PWR_TRAIN		|*/
-			ODM_BB_RATE_ADAPTIVE	|
-			ODM_BB_CFO_TRACKING		|
+			ODM_BB_RATE_ADAPTIVE |
+			ODM_BB_CFO_TRACKING |
 			ODM_BB_ENV_MONITOR;
 		break;
-	#endif
+#endif
+
+#if (RTL8195B_SUPPORT)
+	case ODM_RTL8195B:
+		support_ability |=
+			ODM_BB_DIG |
+			ODM_BB_RA_MASK |
+			/*ODM_BB_DYNAMIC_TXPWR	|*/
+			ODM_BB_FA_CNT |
+			ODM_BB_RSSI_MONITOR |
+			ODM_BB_CCK_PD |
+			/*ODM_BB_PWR_TRAIN		|*/
+			ODM_BB_RATE_ADAPTIVE |
+			ODM_BB_CFO_TRACKING;
+			/*ODM_BB_ENV_MONITOR*/
+		break;
+#endif
 
-	#if (RTL8195A_SUPPORT == 1)
-	case	ODM_RTL8195A:
+#if (RTL8721D_SUPPORT)
+	case ODM_RTL8721D:
 		support_ability |=
-			ODM_BB_DIG				|
-			ODM_BB_RA_MASK			|
+			ODM_BB_DIG |
+			ODM_BB_RA_MASK |
 			/*ODM_BB_DYNAMIC_TXPWR	|*/
-			ODM_BB_FA_CNT			|
-			ODM_BB_RSSI_MONITOR		|
-			ODM_BB_CCK_PD			|
+			ODM_BB_FA_CNT |
+			ODM_BB_RSSI_MONITOR |
+			ODM_BB_CCK_PD |
 			/*ODM_BB_PWR_TRAIN		|*/
-			ODM_BB_RATE_ADAPTIVE	|
-			ODM_BB_CFO_TRACKING		|
+			ODM_BB_RATE_ADAPTIVE |
+			ODM_BB_CFO_TRACKING |
 			ODM_BB_ENV_MONITOR;
 		break;
-	#endif
-	
+#endif
+
 	default:
 		support_ability |=
-			ODM_BB_DIG				|
-			ODM_BB_RA_MASK			|
+			ODM_BB_DIG |
+			ODM_BB_RA_MASK |
 			/*ODM_BB_DYNAMIC_TXPWR	|*/
-			ODM_BB_FA_CNT			|
-			ODM_BB_RSSI_MONITOR		|
-			ODM_BB_CCK_PD			|
+			ODM_BB_FA_CNT |
+			ODM_BB_RSSI_MONITOR |
+			ODM_BB_CCK_PD |
 			/*ODM_BB_PWR_TRAIN		|*/
-			ODM_BB_RATE_ADAPTIVE	|
-			ODM_BB_CFO_TRACKING		|
+			ODM_BB_RATE_ADAPTIVE |
+			ODM_BB_CFO_TRACKING |
 			ODM_BB_ENV_MONITOR;
 
-			dbg_print("[Warning] Supportability Init Warning !!!\n");
+		pr_debug("[Warning] Supportability Init Warning !!!\n");
 		break;
-
 	}
-	
-	/*[Config Antenna Diveristy]*/
-	if (*(p_dm->p_enable_antdiv))
-		support_ability |= ODM_BB_ANT_DIV;
-	
-	/*[Config Adaptivity]*/
-	if (*(p_dm->p_enable_adaptivity))
-		support_ability |= ODM_BB_ADAPTIVITY;
-	
+
 	return support_ability;
 }
 #endif
 
-void
-phydm_fwoffload_ability_init(
-	struct PHY_DM_STRUCT		*p_dm,
-	enum phydm_offload_ability	offload_ability
-)
+void phydm_fwoffload_ability_init(struct dm_struct *dm,
+				  enum phydm_offload_ability offload_ability)
 {
-
 	switch (offload_ability) {
-
-	case	PHYDM_PHY_PARAM_OFFLOAD:
-		if (p_dm->support_ic_type & (ODM_RTL8814A | ODM_RTL8822B | ODM_RTL8821C))
-			p_dm->fw_offload_ability |= PHYDM_PHY_PARAM_OFFLOAD;
+	case PHYDM_PHY_PARAM_OFFLOAD:
+		if (dm->support_ic_type &
+		    (ODM_RTL8814A | ODM_RTL8822B | ODM_RTL8821C))
+			dm->fw_offload_ability |= PHYDM_PHY_PARAM_OFFLOAD;
 		break;
 
-	case	PHYDM_RF_IQK_OFFLOAD:
-		p_dm->fw_offload_ability |= PHYDM_RF_IQK_OFFLOAD;
+	case PHYDM_RF_IQK_OFFLOAD:
+		dm->fw_offload_ability |= PHYDM_RF_IQK_OFFLOAD;
 		break;
 
 	default:
-		PHYDM_DBG(p_dm, ODM_COMP_INIT, ("fwofflad, wrong init type!!\n"));
+		PHYDM_DBG(dm, ODM_COMP_INIT, "fwofflad, wrong init type!!\n");
 		break;
-
 	}
 
-	PHYDM_DBG(p_dm, ODM_COMP_INIT,
-		("fw_offload_ability = %x\n", p_dm->fw_offload_ability));
-
+	PHYDM_DBG(dm, ODM_COMP_INIT, "fw_offload_ability = %x\n",
+		  dm->fw_offload_ability);
 }
-void
-phydm_fwoffload_ability_clear(
-	struct PHY_DM_STRUCT		*p_dm,
-	enum phydm_offload_ability	offload_ability
-)
-{
 
+void phydm_fwoffload_ability_clear(struct dm_struct *dm,
+				   enum phydm_offload_ability offload_ability)
+{
 	switch (offload_ability) {
-
-	case	PHYDM_PHY_PARAM_OFFLOAD:
-		if (p_dm->support_ic_type & (ODM_RTL8814A | ODM_RTL8822B | ODM_RTL8821C))
-			p_dm->fw_offload_ability &= (~PHYDM_PHY_PARAM_OFFLOAD);
+	case PHYDM_PHY_PARAM_OFFLOAD:
+		if (dm->support_ic_type &
+		    (ODM_RTL8814A | ODM_RTL8822B | ODM_RTL8821C))
+			dm->fw_offload_ability &= (~PHYDM_PHY_PARAM_OFFLOAD);
 		break;
 
-	case	PHYDM_RF_IQK_OFFLOAD:
-		p_dm->fw_offload_ability &= (~PHYDM_RF_IQK_OFFLOAD);
+	case PHYDM_RF_IQK_OFFLOAD:
+		dm->fw_offload_ability &= (~PHYDM_RF_IQK_OFFLOAD);
 		break;
 
 	default:
-		PHYDM_DBG(p_dm, ODM_COMP_INIT, ("fwofflad, wrong init type!!\n"));
+		PHYDM_DBG(dm, ODM_COMP_INIT, "fwofflad, wrong init type!!\n");
 		break;
-
 	}
 
-	PHYDM_DBG(p_dm, ODM_COMP_INIT,
-		("fw_offload_ability = %x\n", p_dm->fw_offload_ability));
-
+	PHYDM_DBG(dm, ODM_COMP_INIT, "fw_offload_ability = %x\n",
+		  dm->fw_offload_ability);
 }
 
-void
-phydm_supportability_init(
-	void		*p_dm_void
-)
+void phydm_supportability_init(void *dm_void)
 {
-	struct PHY_DM_STRUCT		*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	u64	support_ability;
-	
-	if (*(p_dm->p_mp_mode) == true) {
-		support_ability = 0;
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	u64 support_ability;
 
-		/**/
+	if (*dm->mp_mode) {
+		support_ability = 0;
 	} else {
-
 		#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN))
-		support_ability = phydm_supportability_init_win(p_dm);
+		support_ability = phydm_supportability_init_win(dm);
 		#elif (DM_ODM_SUPPORT_TYPE & (ODM_AP))
-		support_ability = phydm_supportability_init_ap(p_dm);
+		support_ability = phydm_supportability_init_ap(dm);
 		#elif(DM_ODM_SUPPORT_TYPE & (ODM_CE))
-		support_ability = phydm_supportability_init_ce(p_dm);
+		support_ability = phydm_supportability_init_ce(dm);
 		#elif(DM_ODM_SUPPORT_TYPE & (ODM_IOT))
-		support_ability = phydm_supportability_init_iot(p_dm);
+		support_ability = phydm_supportability_init_iot(dm);
 		#endif
+
+		/*@[Config Antenna Diversity]*/
+		if (IS_FUNC_EN(dm->enable_antdiv))
+			support_ability |= ODM_BB_ANT_DIV;
+
+		/*@[Config TXpath Diversity]*/
+		if (IS_FUNC_EN(dm->enable_pathdiv))
+			support_ability |= ODM_BB_PATH_DIV;
+
+		/*@[Config Adaptive SOML]*/
+		if (IS_FUNC_EN(dm->en_adap_soml))
+			support_ability |= ODM_BB_ADAPTIVE_SOML;
+
+		/* @[Config Adaptivity]*/
+		if (IS_FUNC_EN(dm->enable_adaptivity))
+			support_ability |= ODM_BB_ADAPTIVITY;
 	}
-	odm_cmn_info_init(p_dm, ODM_CMNINFO_ABILITY, support_ability);
-	PHYDM_DBG(p_dm, ODM_COMP_INIT, ("IC = ((0x%x)), Supportability Init = ((0x%llx))\n", p_dm->support_ic_type, p_dm->support_ability));
+	odm_cmn_info_init(dm, ODM_CMNINFO_ABILITY, support_ability);
+	PHYDM_DBG(dm, ODM_COMP_INIT, "IC=0x%x, mp=%d, Supportability=0x%llx\n",
+		  dm->support_ic_type, *dm->mp_mode, dm->support_ability);
 }
 
-void
-phydm_rfe_init(
-	void			*p_dm_void
-)
+void phydm_rfe_init(void *dm_void)
 {
-	struct PHY_DM_STRUCT		*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	
-	PHYDM_DBG(p_dm, ODM_COMP_INIT, ("RFE_Init\n"));
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+
+	PHYDM_DBG(dm, ODM_COMP_INIT, "RFE_Init\n");
 #if (RTL8822B_SUPPORT == 1)
-	if (p_dm->support_ic_type == ODM_RTL8822B) {
-		phydm_rfe_8822b_init(p_dm);
-		/**/
-	}
+	if (dm->support_ic_type == ODM_RTL8822B)
+		phydm_rfe_8822b_init(dm);
 #endif
 }
 
-void
-phydm_dm_early_init(
-	struct PHY_DM_STRUCT	*p_dm
-)
+void phydm_dm_early_init(struct dm_struct *dm)
 {
-	#if (DM_ODM_SUPPORT_TYPE & ODM_WIN)
-	halrf_init(p_dm);
-	#endif
+
 }
 
-void
-odm_dm_init(
-	struct PHY_DM_STRUCT		*p_dm
-)
+void odm_dm_init(struct dm_struct *dm)
 {
-	halrf_init(p_dm);
-	phydm_supportability_init(p_dm);
-	phydm_rfe_init(p_dm);
-	phydm_common_info_self_init(p_dm);
-	phydm_rx_phy_status_init(p_dm);
-	phydm_auto_dbg_engine_init(p_dm);
-	phydm_dig_init(p_dm);
-	phydm_cck_pd_init(p_dm);
-	phydm_env_monitor_init(p_dm);
-	phydm_adaptivity_init(p_dm);
-	phydm_ra_info_init(p_dm);
-	phydm_rssi_monitor_init(p_dm);
-	phydm_cfo_tracking_init(p_dm);
-	phydm_rf_init(p_dm);
-	odm_txpowertracking_init(p_dm);
-	phydm_dc_cancellation(p_dm);
+	halrf_init(dm);
+	phydm_supportability_init(dm);
+	phydm_rfe_init(dm);
+	phydm_common_info_self_init(dm);
+	phydm_rx_phy_status_init(dm);
+#ifdef PHYDM_AUTO_DEGBUG
+	phydm_auto_dbg_engine_init(dm);
+#endif
+	phydm_dig_init(dm);
+#ifdef PHYDM_SUPPORT_CCKPD
+	phydm_cck_pd_init(dm);
+#endif
+	phydm_env_monitor_init(dm);
+	phydm_adaptivity_init(dm);
+	phydm_ra_info_init(dm);
+	phydm_rssi_monitor_init(dm);
+	phydm_cfo_tracking_init(dm);
+	phydm_rf_init(dm);
+	phydm_dc_cancellation(dm);
 #ifdef PHYDM_TXA_CALIBRATION
-	phydm_txcurrentcalibration(p_dm);
-	phydm_get_pa_bias_offset(p_dm);
+	phydm_txcurrentcalibration(dm);
+	phydm_get_pa_bias_offset(dm);
 #endif
-	odm_antenna_diversity_init(p_dm);
-	phydm_adaptive_soml_init(p_dm);
-#ifdef CONFIG_DYNAMIC_RX_PATH
-	phydm_dynamic_rx_path_init(p_dm);
+#ifdef CONFIG_PHYDM_ANTENNA_DIVERSITY
+	odm_antenna_diversity_init(dm);
+#endif
+#ifdef CONFIG_ADAPTIVE_SOML
+	phydm_adaptive_soml_init(dm);
+#endif
+#ifdef CONFIG_PATH_DIVERSITY
+	phydm_tx_path_diversity_init(dm);
+#endif
+#ifdef CONFIG_DYNAMIC_TX_TWR
+	phydm_dynamic_tx_power_init(dm);
 #endif
-	odm_auto_channel_select_init(p_dm);
-	phydm_path_diversity_init(p_dm);
-	phydm_dynamic_tx_power_init(p_dm);
 #if (PHYDM_LA_MODE_SUPPORT == 1)
-	adc_smp_init(p_dm);
+	adc_smp_init(dm);
 #endif
 
-#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_CE))
-	phydm_beamforming_init(p_dm);
+#ifdef PHYDM_BEAMFORMING_VERSION1
+	phydm_beamforming_init(dm);
 #endif
+
 #if (RTL8188E_SUPPORT == 1)
-	odm_ra_info_init_all(p_dm);
+	odm_ra_info_init_all(dm);
+#endif
+#ifdef PHYDM_PRIMARY_CCA
+	phydm_primary_cca_init(dm);
+#endif
+#ifdef CONFIG_PSD_TOOL
+	phydm_psd_init(dm);
 #endif
 
-	phydm_primary_cca_init(p_dm);
-
-	#ifdef CONFIG_PSD_TOOL
-	phydm_psd_init(p_dm);
-	#endif
-	
-	#ifdef CONFIG_SMART_ANTENNA
-	phydm_smt_ant_init(p_dm);
+#ifdef CONFIG_SMART_ANTENNA
+	phydm_smt_ant_init(dm);
+#endif
+#ifdef PHYDM_LNA_SAT_CHK_SUPPORT
+	phydm_lna_sat_check_init(dm);
+#endif
+#ifdef CONFIG_MCC_DM
+	#if (RTL8822B_SUPPORT == 1)
+	phydm_mcc_init(dm);
 	#endif
-
+#endif
 }
 
-void
-odm_dm_reset(
-	struct PHY_DM_STRUCT		*p_dm
-)
+void odm_dm_reset(struct dm_struct *dm)
 {
-	struct phydm_dig_struct *p_dig_t = &p_dm->dm_dig_table;
+	struct phydm_dig_struct *dig_t = &dm->dm_dig_table;
 
-	odm_ant_div_reset(p_dm);
-	phydm_set_edcca_threshold_api(p_dm, p_dig_t->cur_ig_value);
+	#ifdef CONFIG_PHYDM_ANTENNA_DIVERSITY
+	odm_ant_div_reset(dm);
+	#endif
+	phydm_set_edcca_threshold_api(dm, dig_t->cur_ig_value);
 }
 
-void
-phydm_support_ability_debug(
-	void		*p_dm_void,
-	u32		*const dm_value,
-	u32			*_used,
-	char			*output,
-	u32			*_out_len
-)
+void phydm_supportability_en(void *dm_void, char input[][16], u32 *_used,
+			     char *output, u32 *_out_len)
 {
-	struct PHY_DM_STRUCT		*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	u64			pre_support_ability, one = 1;
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	u32 dm_value[10] = {0};
+	u64 pre_support_ability, one = 1;
+	u64 comp = 0;
 	u32 used = *_used;
 	u32 out_len = *_out_len;
+	u8 i;
 
-	pre_support_ability = p_dm->support_ability;
+	for (i = 0; i < 5; i++) {
+		if (input[i + 1])
+			PHYDM_SSCANF(input[i + 1], DCMD_DECIMAL, &dm_value[i]);
+	}
 
-	PHYDM_SNPRINTF((output + used, out_len - used, "\n%s\n", "================================"));
-	if (dm_value[0] == 100) {
-		PHYDM_SNPRINTF((output + used, out_len - used, "[Supportability] PhyDM Selection\n"));
-		PHYDM_SNPRINTF((output + used, out_len - used, "%s\n", "================================"));
-		PHYDM_SNPRINTF((output + used, out_len - used, "00. (( %s ))DIG\n", ((p_dm->support_ability & ODM_BB_DIG) ? ("V") : ("."))));
-		PHYDM_SNPRINTF((output + used, out_len - used, "01. (( %s ))RA_MASK\n", ((p_dm->support_ability & ODM_BB_RA_MASK) ? ("V") : ("."))));
-		PHYDM_SNPRINTF((output + used, out_len - used, "02. (( %s ))DYN_TXPWR\n", ((p_dm->support_ability & ODM_BB_DYNAMIC_TXPWR) ? ("V") : ("."))));
-		PHYDM_SNPRINTF((output + used, out_len - used, "03. (( %s ))FA_CNT\n", ((p_dm->support_ability & ODM_BB_FA_CNT) ? ("V") : ("."))));
-		PHYDM_SNPRINTF((output + used, out_len - used, "04. (( %s ))RSSI_MNTR\n", ((p_dm->support_ability & ODM_BB_RSSI_MONITOR) ? ("V") : ("."))));
-		PHYDM_SNPRINTF((output + used, out_len - used, "05. (( %s ))CCK_PD\n", ((p_dm->support_ability & ODM_BB_CCK_PD) ? ("V") : ("."))));
-		PHYDM_SNPRINTF((output + used, out_len - used, "06. (( %s ))ANT_DIV\n", ((p_dm->support_ability & ODM_BB_ANT_DIV) ? ("V") : ("."))));
-		PHYDM_SNPRINTF((output + used, out_len - used, "07. (( %s ))SMT_ANT\n", ((p_dm->support_ability & ODM_BB_SMT_ANT) ? ("V") : ("."))));
-		PHYDM_SNPRINTF((output + used, out_len - used, "08. (( %s ))PWR_TRAIN\n", ((p_dm->support_ability & ODM_BB_PWR_TRAIN) ? ("V") : ("."))));
-		PHYDM_SNPRINTF((output + used, out_len - used, "09. (( %s ))RA\n", ((p_dm->support_ability & ODM_BB_RATE_ADAPTIVE) ? ("V") : ("."))));
-		PHYDM_SNPRINTF((output + used, out_len - used, "10. (( %s ))PATH_DIV\n", ((p_dm->support_ability & ODM_BB_PATH_DIV) ? ("V") : ("."))));
-		PHYDM_SNPRINTF((output + used, out_len - used, "11. (( %s ))DFS\n", ((p_dm->support_ability & ODM_BB_DFS) ? ("V") : ("."))));
-		PHYDM_SNPRINTF((output + used, out_len - used, "12. (( %s ))DYN_ARFR\n", ((p_dm->support_ability & ODM_BB_DYNAMIC_ARFR) ? ("V") : ("."))));
-		PHYDM_SNPRINTF((output + used, out_len - used, "13. (( %s ))ADAPTIVITY\n", ((p_dm->support_ability & ODM_BB_ADAPTIVITY) ? ("V") : ("."))));
-		PHYDM_SNPRINTF((output + used, out_len - used, "14. (( %s ))CFO_TRACK\n", ((p_dm->support_ability & ODM_BB_CFO_TRACKING) ? ("V") : ("."))));
-		PHYDM_SNPRINTF((output + used, out_len - used, "15. (( %s ))ENV_MONITOR\n", ((p_dm->support_ability & ODM_BB_ENV_MONITOR) ? ("V") : ("."))));
-		PHYDM_SNPRINTF((output + used, out_len - used, "16. (( %s ))PRI_CCA\n", ((p_dm->support_ability & ODM_BB_PRIMARY_CCA) ? ("V") : ("."))));
-		PHYDM_SNPRINTF((output + used, out_len - used, "17. (( %s ))ADPTV_SOML\n", ((p_dm->support_ability & ODM_BB_ADAPTIVE_SOML) ? ("V") : ("."))));
-		/*PHYDM_SNPRINTF((output + used, out_len - used, "18. (( %s ))TBD\n", ((p_dm->support_ability & ODM_BB_TBD) ? ("V") : ("."))));*/
-		/*PHYDM_SNPRINTF((output + used, out_len - used, "19. (( %s ))TBD\n", ((p_dm->support_ability & ODM_BB_TBD) ? ("V") : ("."))));*/
-		PHYDM_SNPRINTF((output + used, out_len - used, "20. (( %s ))DYN_RX_PATH\n", ((p_dm->support_ability & ODM_BB_DYNAMIC_RX_PATH) ? ("V") : ("."))));
-		PHYDM_SNPRINTF((output + used, out_len - used, "%s\n", "================================"));
-		PHYDM_SNPRINTF((output + used, out_len - used, "[Supportability] PhyDM offload ability\n"));
-		PHYDM_SNPRINTF((output + used, out_len - used, "%s\n", "================================"));
-		PHYDM_SNPRINTF((output + used, out_len - used, "00. (( %s ))PHY PARAM OFFLOAD\n", ((p_dm->fw_offload_ability & PHYDM_PHY_PARAM_OFFLOAD) ? ("V") : ("."))));
-		PHYDM_SNPRINTF((output + used, out_len - used, "01. (( %s ))RF IQK OFFLOAD\n", ((p_dm->fw_offload_ability & PHYDM_RF_IQK_OFFLOAD) ? ("V") : ("."))));
-		PHYDM_SNPRINTF((output + used, out_len - used, "%s\n", "================================"));
+	pre_support_ability = dm->support_ability;
+	comp = dm->support_ability;
 
-	}
-	/*
-	else if(dm_value[0] == 101)
-	{
-		p_dm->support_ability = 0 ;
-		dbg_print("Disable all support_ability components\n");
-		PHYDM_SNPRINTF((output+used, out_len-used,"%s\n", "Disable all support_ability components"));
-	}
-	*/
-	else {
+	PDM_SNPF(out_len, used, output + used, out_len - used,
+		 "\n================================\n");
 
-		if (dm_value[1] == 1) { /* enable */
-			p_dm->support_ability |= (one << dm_value[0]);
-			if (BIT(dm_value[0]) & ODM_BB_PATH_DIV)
-				phydm_path_diversity_init(p_dm);
-		} else if (dm_value[1] == 2)	/* disable */
-			p_dm->support_ability &= ~(one << dm_value[0]);
-		else
-			PHYDM_SNPRINTF((output + used, out_len - used, "%s\n", "[Warning!!!]  1:enable,  2:disable"));
+	if (dm_value[0] == 100) {
+		PDM_SNPF(out_len, used, output + used, out_len - used,
+			 "[Supportability] PhyDM Selection\n");
+		PDM_SNPF(out_len, used, output + used, out_len - used,
+			 "================================\n");
+		PDM_SNPF(out_len, used, output + used, out_len - used,
+			 "00. (( %s ))DIG\n",
+			 ((comp & ODM_BB_DIG) ? ("V") : (".")));
+		PDM_SNPF(out_len, used, output + used, out_len - used,
+			 "01. (( %s ))RA_MASK\n",
+			 ((comp & ODM_BB_RA_MASK) ? ("V") : (".")));
+		PDM_SNPF(out_len, used, output + used, out_len - used,
+			 "02. (( %s ))DYN_TXPWR\n",
+			 ((comp & ODM_BB_DYNAMIC_TXPWR) ? ("V") : (".")));
+		PDM_SNPF(out_len, used, output + used, out_len - used,
+			 "03. (( %s ))FA_CNT\n",
+			 ((comp & ODM_BB_FA_CNT) ? ("V") : (".")));
+		PDM_SNPF(out_len, used, output + used, out_len - used,
+			 "04. (( %s ))RSSI_MNTR\n",
+			 ((comp & ODM_BB_RSSI_MONITOR) ? ("V") : (".")));
+		PDM_SNPF(out_len, used, output + used, out_len - used,
+			 "05. (( %s ))CCK_PD\n",
+			 ((comp & ODM_BB_CCK_PD) ? ("V") : (".")));
+		PDM_SNPF(out_len, used, output + used, out_len - used,
+			 "06. (( %s ))ANT_DIV\n",
+			 ((comp & ODM_BB_ANT_DIV) ? ("V") : (".")));
+		PDM_SNPF(out_len, used, output + used, out_len - used,
+			 "07. (( %s ))SMT_ANT\n",
+			 ((comp & ODM_BB_SMT_ANT) ? ("V") : (".")));
+		PDM_SNPF(out_len, used, output + used, out_len - used,
+			 "08. (( %s ))PWR_TRAIN\n",
+			 ((comp & ODM_BB_PWR_TRAIN) ? ("V") : (".")));
+		PDM_SNPF(out_len, used, output + used, out_len - used,
+			 "09. (( %s ))RA\n",
+			 ((comp & ODM_BB_RATE_ADAPTIVE) ? ("V") : (".")));
+		PDM_SNPF(out_len, used, output + used, out_len - used,
+			 "10. (( %s ))PATH_DIV\n",
+			 ((comp & ODM_BB_PATH_DIV) ? ("V") : (".")));
+		PDM_SNPF(out_len, used, output + used, out_len - used,
+			 "11. (( %s ))DFS\n",
+			 ((comp & ODM_BB_DFS) ? ("V") : (".")));
+		PDM_SNPF(out_len, used, output + used, out_len - used,
+			 "12. (( %s ))DYN_ARFR\n",
+			 ((comp & ODM_BB_DYNAMIC_ARFR) ? ("V") : (".")));
+		PDM_SNPF(out_len, used, output + used, out_len - used,
+			 "13. (( %s ))ADAPTIVITY\n",
+			 ((comp & ODM_BB_ADAPTIVITY) ? ("V") : (".")));
+		PDM_SNPF(out_len, used, output + used, out_len - used,
+			 "14. (( %s ))CFO_TRACK\n",
+			 ((comp & ODM_BB_CFO_TRACKING) ? ("V") : (".")));
+		PDM_SNPF(out_len, used, output + used, out_len - used,
+			 "15. (( %s ))ENV_MONITOR\n",
+			 ((comp & ODM_BB_ENV_MONITOR) ? ("V") : (".")));
+		PDM_SNPF(out_len, used, output + used, out_len - used,
+			 "16. (( %s ))PRI_CCA\n",
+			 ((comp & ODM_BB_PRIMARY_CCA) ? ("V") : (".")));
+		PDM_SNPF(out_len, used, output + used, out_len - used,
+			 "17. (( %s ))ADPTV_SOML\n",
+			 ((comp & ODM_BB_ADAPTIVE_SOML) ? ("V") : (".")));
+		PDM_SNPF(out_len, used, output + used, out_len - used,
+			 "18. (( %s ))LNA_SAT_CHK\n",
+			 ((comp & ODM_BB_LNA_SAT_CHK) ? ("V") : (".")));
+
+		PDM_SNPF(out_len, used, output + used, out_len - used,
+			 "================================\n");
+		PDM_SNPF(out_len, used, output + used, out_len - used,
+			 "[Supportability] PhyDM offload ability\n");
+		PDM_SNPF(out_len, used, output + used, out_len - used,
+			 "================================\n");
+
+		PDM_SNPF(out_len, used, output + used, out_len - used,
+			 "00. (( %s ))PHY PARAM OFFLOAD\n",
+			 ((dm->fw_offload_ability & PHYDM_PHY_PARAM_OFFLOAD) ?
+			 ("V") : (".")));
+		PDM_SNPF(out_len, used, output + used, out_len - used,
+			 "01. (( %s ))RF IQK OFFLOAD\n",
+			 ((dm->fw_offload_ability & PHYDM_RF_IQK_OFFLOAD) ?
+			 ("V") : (".")));
+		PDM_SNPF(out_len, used, output + used, out_len - used,
+			 "================================\n");
+
+	} else if (dm_value[0] == 101) {
+		dm->support_ability = 0;
+		PDM_SNPF(out_len, used, output + used, out_len - used,
+			 "Disable all support_ability components\n");
+	} else {
+		if (dm_value[1] == 1) { /* @enable */
+			dm->support_ability |= (one << dm_value[0]);
+		} else if (dm_value[1] == 2) {/* @disable */
+			dm->support_ability &= ~(one << dm_value[0]);
+		} else {
+			PDM_SNPF(out_len, used, output + used, out_len - used,
+				 "[Warning!!!]  1:enable,  2:disable\n");
+		}
 	}
-	PHYDM_SNPRINTF((output + used, out_len - used, "pre-support_ability  =  0x%llx\n",  pre_support_ability));
-	PHYDM_SNPRINTF((output + used, out_len - used, "Curr-support_ability =  0x%llx\n", p_dm->support_ability));
-	PHYDM_SNPRINTF((output + used, out_len - used, "%s\n", "================================"));
+	PDM_SNPF(out_len, used, output + used, out_len - used,
+		 "pre-supportability = 0x%llx\n", pre_support_ability);
+	PDM_SNPF(out_len, used, output + used, out_len - used,
+		 "Cur-supportability = 0x%llx\n", dm->support_ability);
+	PDM_SNPF(out_len, used, output + used, out_len - used,
+		 "================================\n");
 
 	*_used = used;
 	*_out_len = out_len;
 }
 
-void
-phydm_watchdog_lps_32k(
-	struct PHY_DM_STRUCT		*p_dm
-)
+void phydm_watchdog_lps_32k(struct dm_struct *dm)
 {
-	PHYDM_DBG(p_dm, DBG_COMMON_FLOW, ("%s ======>\n", __func__));
+	PHYDM_DBG(dm, DBG_COMMON_FLOW, "%s ======>\n", __func__);
 
-	phydm_common_info_self_update(p_dm);
-	phydm_rssi_monitor_check(p_dm);
-	phydm_dig_lps_32k(p_dm);
-	phydm_common_info_self_reset(p_dm);
+	phydm_common_info_self_update(dm);
+	phydm_rssi_monitor_check(dm);
+	phydm_dig_lps_32k(dm);
+	phydm_common_info_self_reset(dm);
 }
 
-void
-phydm_watchdog_lps(
-	struct PHY_DM_STRUCT		*p_dm
-)
+void phydm_watchdog_lps(struct dm_struct *dm)
 {
-#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_CE))
-	PHYDM_DBG(p_dm, DBG_COMMON_FLOW, ("%s ======>\n", __func__));
-
-	phydm_common_info_self_update(p_dm);
-	phydm_rssi_monitor_check(p_dm);
-	phydm_basic_dbg_message(p_dm);
-	phydm_receiver_blocking(p_dm);
-	odm_false_alarm_counter_statistics(p_dm);
-	phydm_dig_by_rssi_lps(p_dm);
-	phydm_cck_pd_th(p_dm);
-	phydm_adaptivity(p_dm);
+#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_CE | ODM_IOT))
+	PHYDM_DBG(dm, DBG_COMMON_FLOW, "%s ======>\n", __func__);
+
+	phydm_common_info_self_update(dm);
+	phydm_rssi_monitor_check(dm);
+	phydm_basic_dbg_message(dm);
+	phydm_receiver_blocking(dm);
+	phydm_false_alarm_counter_statistics(dm);
+	phydm_dig_by_rssi_lps(dm);
+	#ifdef PHYDM_SUPPORT_CCKPD
+	phydm_cck_pd_th(dm);
+	#endif
+	phydm_adaptivity(dm);
 	#if (DM_ODM_SUPPORT_TYPE & (ODM_CE))
-	odm_antenna_diversity(p_dm); /*enable AntDiv in PS mode, request from SD4 Jeff*/
+	#ifdef CONFIG_PHYDM_ANTENNA_DIVERSITY
+	/*@enable AntDiv in PS mode, request from SD4 Jeff*/
+	odm_antenna_diversity(dm);
 	#endif
-	phydm_common_info_self_reset(p_dm);
+	#endif
+	phydm_common_info_self_reset(dm);
 #endif
 }
 
-void
-phydm_watchdog_mp(
-	struct PHY_DM_STRUCT		*p_dm
-)
+void phydm_watchdog_mp(struct dm_struct *dm)
 {
-#ifdef CONFIG_DYNAMIC_RX_PATH
-	phydm_dynamic_rx_path_caller(p_dm);
-#endif
 }
 
-void
-phydm_pause_dm_watchdog(
-	void					*p_dm_void,
-	enum phydm_pause_type		pause_type
-)
+void phydm_pause_dm_watchdog(void *dm_void, enum phydm_pause_type pause_type)
 {
-	struct PHY_DM_STRUCT			*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
 
 	if (pause_type == PHYDM_PAUSE) {
-		p_dm->disable_phydm_watchdog = 1;
-		PHYDM_DBG(p_dm, ODM_COMP_API, ("PHYDM Stop\n"));
+		dm->disable_phydm_watchdog = 1;
+		PHYDM_DBG(dm, ODM_COMP_API, "PHYDM Stop\n");
 	} else {
-		p_dm->disable_phydm_watchdog = 0;
-		PHYDM_DBG(p_dm, ODM_COMP_API, ("PHYDM Start\n"));
+		dm->disable_phydm_watchdog = 0;
+		PHYDM_DBG(dm, ODM_COMP_API, "PHYDM Start\n");
 	}
 }
 
-u8
-phydm_pause_func(
-	void						*p_dm_void,
-	enum phydm_func_idx_e	pause_func,
-	enum phydm_pause_type	pause_type,
-	enum phydm_pause_level	pause_lv,
-	u8						val_lehgth,
-	u32						*val_buf
-)
+u8 phydm_pause_func(void *dm_void, enum phydm_func_idx pause_func,
+		    enum phydm_pause_type pause_type,
+		    enum phydm_pause_level pause_lv, u8 val_lehgth,
+		    u32 *val_buf)
 {
-	struct PHY_DM_STRUCT	*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	s8	*pause_lv_pre = &(p_dm->s8_dummy);
-	u32	*bkp_val = &(p_dm->u32_dummy);
-	u32	ori_val[5] = {0};
-	u64	pause_func_bitmap = (u64)BIT(pause_func);
-	u8	i;
-
-
-
-	PHYDM_DBG(p_dm, ODM_COMP_API, ("[%s][%s] LV=%d, Len=%d\n", __func__, 
-		((pause_type == PHYDM_PAUSE) ? "Pause" : "Resume"),  pause_lv, val_lehgth));
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct phydm_func_poiner *func_t = &dm->phydm_func_handler;
+	s8 *pause_lv_pre = &dm->s8_dummy;
+	u32 *bkp_val = &dm->u32_dummy;
+	u32 ori_val[5] = {0};
+	u64 pause_func_bitmap = (u64)BIT(pause_func);
+	u8 i = 0;
+	u8 en_2rcca = 0;
+	u8 en_bw40m = 0;
+	u8 pause_result = PAUSE_FAIL;
+
+	PHYDM_DBG(dm, ODM_COMP_API, "\n");
+	PHYDM_DBG(dm, ODM_COMP_API, "[%s][%s] LV=%d, Len=%d\n", __func__,
+		  ((pause_type == PHYDM_PAUSE) ? "Pause" :
+		  ((pause_type == PHYDM_RESUME) ? "Resume" : "Pause no_set")),
+		  pause_lv, val_lehgth);
 
 	if (pause_lv >= PHYDM_PAUSE_MAX_NUM) {
-		PHYDM_DBG(p_dm, ODM_COMP_API, ("[WARNING] Wrong LV=%d\n", pause_lv));
+		PHYDM_DBG(dm, ODM_COMP_API, "[WARNING]Wrong LV=%d\n", pause_lv);
 		return PAUSE_FAIL;
 	}
 
 	if (pause_func == F00_DIG) {
-
-		PHYDM_DBG(p_dm, ODM_COMP_API, ("[DIG]\n"));
+		PHYDM_DBG(dm, ODM_COMP_API, "[DIG]\n");
 
 		if (val_lehgth != 1) {
-			PHYDM_DBG(p_dm, ODM_COMP_API, ("[WARNING] val_length != 1\n"));
+			PHYDM_DBG(dm, ODM_COMP_API, "[WARNING] length != 1\n");
 			return PAUSE_FAIL;
 		}
-		
-		ori_val[0] = (u32)(p_dm->dm_dig_table.cur_ig_value); /*0xc50*/
-		pause_lv_pre = &(p_dm->pause_lv_table.lv_dig);
-		bkp_val = (u32*)(&(p_dm->dm_dig_table.rvrt_val));
-		p_dm->phydm_func_handler.pause_phydm_handler = phydm_set_dig_val; /*function pointer hook*/
-	
-	} else
-	
+
+		ori_val[0] = (u32)(dm->dm_dig_table.cur_ig_value);
+		pause_lv_pre = &dm->pause_lv_table.lv_dig;
+		bkp_val = (u32 *)(&dm->dm_dig_table.rvrt_val);
+		/*@function pointer hook*/
+		func_t->pause_phydm_handler = phydm_set_dig_val;
+
 #ifdef PHYDM_SUPPORT_CCKPD
-	if (pause_func == F05_CCK_PD) {
-		
-		PHYDM_DBG(p_dm, ODM_COMP_API, ("[CCK_PD]\n"));
+	} else if (pause_func == F05_CCK_PD) {
+		PHYDM_DBG(dm, ODM_COMP_API, "[CCK_PD]\n");
 
-		if (val_lehgth != 2) {
-			PHYDM_DBG(p_dm, ODM_COMP_API, ("[WARNING] val_length != 2\n"));
+		if (val_lehgth != 1) {
+			PHYDM_DBG(dm, ODM_COMP_API, "[WARNING] length != 1\n");
 			return PAUSE_FAIL;
 		}
-		
-		ori_val[0] = p_dm->dm_cckpd_table.cur_cck_cca_thres; /*0xa0a*/
-		ori_val[1] = p_dm->dm_cckpd_table.cck_cca_th_aaa;	/*0xaaa*/
-		pause_lv_pre = &(p_dm->pause_lv_table.lv_cckpd);
-		bkp_val = &(p_dm->dm_cckpd_table.rvrt_val[0]);
-		p_dm->phydm_func_handler.pause_phydm_handler = phydm_set_cckpd_val; /*function pointer hook*/
-		
-	} else 
+
+		ori_val[0] = (u32)dm->dm_cckpd_table.cck_pd_lv;
+		pause_lv_pre = &dm->pause_lv_table.lv_cckpd;
+		bkp_val = (u32 *)(&dm->dm_cckpd_table.rvrt_val);
+		/*@function pointer hook*/
+		func_t->pause_phydm_handler = phydm_set_cckpd_val;
 #endif
 
 #ifdef CONFIG_PHYDM_ANTENNA_DIVERSITY
-	if (pause_func == F06_ANT_DIV) {
-
-		PHYDM_DBG(p_dm, ODM_COMP_API, ("[AntDiv]\n"));
+	} else if (pause_func == F06_ANT_DIV) {
+		PHYDM_DBG(dm, ODM_COMP_API, "[AntDiv]\n");
 
 		if (val_lehgth != 1) {
-			PHYDM_DBG(p_dm, ODM_COMP_API, ("[WARNING] val_length != 1\n"));
+			PHYDM_DBG(dm, ODM_COMP_API, "[WARNING] length != 1\n");
 			return PAUSE_FAIL;
 		}
-		
-		ori_val[0] = (u32)(p_dm->dm_fat_table.rx_idle_ant); /*default antenna*/
-		pause_lv_pre = &(p_dm->pause_lv_table.lv_antdiv);
-		bkp_val = (u32*)(&(p_dm->dm_fat_table.rvrt_val));
-		p_dm->phydm_func_handler.pause_phydm_handler = phydm_set_antdiv_val; /*function pointer hook*/
-	
-	} else
-#endif
+		/*@default antenna*/
+		ori_val[0] = (u32)(dm->dm_fat_table.rx_idle_ant);
+		pause_lv_pre = &dm->pause_lv_table.lv_antdiv;
+		bkp_val = (u32 *)(&dm->dm_fat_table.rvrt_val);
+		/*@function pointer hook*/
+		func_t->pause_phydm_handler = phydm_set_antdiv_val;
 
-	if (pause_func == F13_ADPTVTY) {
-
-		PHYDM_DBG(p_dm, ODM_COMP_API, ("[Adaptivity]\n"));
+#endif
+#ifdef PHYDM_SUPPORT_ADAPTIVITY
+	} else if (pause_func == F13_ADPTVTY) {
+		PHYDM_DBG(dm, ODM_COMP_API, "[Adaptivity]\n");
 
 		if (val_lehgth != 2) {
-			PHYDM_DBG(p_dm, ODM_COMP_API, ("[WARNING] val_length != 2\n"));
+			PHYDM_DBG(dm, ODM_COMP_API, "[WARNING] length != 2\n");
 			return PAUSE_FAIL;
 		}
 
-		ori_val[0] = (u32)(p_dm->adaptivity.th_l2h);	/*th_l2h*/
-		ori_val[1] = (u32)(p_dm->adaptivity.th_h2l);	/*th_h2l*/
-		pause_lv_pre = &(p_dm->pause_lv_table.lv_adapt);
-		bkp_val = (u32 *)(&(p_dm->adaptivity.rvrt_val));
-		p_dm->phydm_func_handler.pause_phydm_handler = phydm_set_edcca_val; /*function pointer hook*/
+		ori_val[0] = (u32)(dm->adaptivity.th_l2h); /*th_l2h*/
+		ori_val[1] = (u32)(dm->adaptivity.th_h2l); /*th_h2l*/
+		pause_lv_pre = &dm->pause_lv_table.lv_adapt;
+		bkp_val = (u32 *)(&dm->adaptivity.rvrt_val);
+		/*@function pointer hook*/
+		func_t->pause_phydm_handler = phydm_set_edcca_val;
 
-	} else
+#endif
+#ifdef CONFIG_ADAPTIVE_SOML
+	} else if (pause_func == F17_ADPTV_SOML) {
+		PHYDM_DBG(dm, ODM_COMP_API, "[AD-SOML]\n");
 
-	{
-		PHYDM_DBG(p_dm, ODM_COMP_API, ("[WARNING] error func idx\n"));
+		if (val_lehgth != 1) {
+			PHYDM_DBG(dm, ODM_COMP_API, "[WARNING] length != 1\n");
+			return PAUSE_FAIL;
+		}
+		/*SOML_ON/OFF*/
+		ori_val[0] = (u32)(dm->dm_soml_table.soml_on_off);
+
+		pause_lv_pre = &dm->pause_lv_table.lv_adsl;
+		bkp_val = (u32 *)(&dm->dm_soml_table.rvrt_val);
+		 /*@function pointer hook*/
+		func_t->pause_phydm_handler = phydm_set_adsl_val;
+
+#endif
+	} else {
+		PHYDM_DBG(dm, ODM_COMP_API, "[WARNING] error func idx\n");
 		return PAUSE_FAIL;
 	}
 
-	PHYDM_DBG(p_dm, ODM_COMP_API, ("Pause_LV{new , pre} = {%d ,%d}\n", pause_lv, *pause_lv_pre));
-
-	if ((pause_type == PHYDM_PAUSE) || (pause_type == PHYDM_PAUSE_NO_SET)) {
-		
-		if (pause_lv > *pause_lv_pre) {
+	PHYDM_DBG(dm, ODM_COMP_API, "Pause_LV{new , pre} = {%d ,%d}\n",
+		  pause_lv, *pause_lv_pre);
 
-			if (!(p_dm->pause_ability & pause_func_bitmap)) {
+	if (pause_type == PHYDM_PAUSE || pause_type == PHYDM_PAUSE_NO_SET) {
+		if (pause_lv <= *pause_lv_pre) {
+			PHYDM_DBG(dm, ODM_COMP_API,
+				  "[PAUSE FAIL] Pre_LV >= Curr_LV\n");
+			return PAUSE_FAIL;
+		}
 
-				for (i = 0; i < val_lehgth; i ++)
-					bkp_val[i] = ori_val[i];
-			}
+		if (!(dm->pause_ability & pause_func_bitmap)) {
+			for (i = 0; i < val_lehgth; i++)
+				bkp_val[i] = ori_val[i];
+		}
 
-			p_dm->pause_ability |= pause_func_bitmap;
-			PHYDM_DBG(p_dm, ODM_COMP_API, ("pause_ability=0x%llx\n", p_dm->pause_ability));
-			
-			if (pause_type == PHYDM_PAUSE) {
-
-				for (i = 0; i < val_lehgth; i ++) {
-					PHYDM_DBG(p_dm, ODM_COMP_API, ("[PAUSE SUCCESS] val_idx[%d]{New, Ori}={0x%x, 0x%x}\n",i, val_buf[i], bkp_val[i]));
-				/**/
-				}
-				p_dm->phydm_func_handler.pause_phydm_handler(p_dm, val_buf, val_lehgth);
-			} else {
-			
-				for (i = 0; i < val_lehgth; i ++) {
-					PHYDM_DBG(p_dm, ODM_COMP_API, ("[PAUSE NO Set: SUCCESS] val_idx[%d]{Ori}={0x%x}\n",i, bkp_val[i]));
-				/**/
-				}
-			}
+		dm->pause_ability |= pause_func_bitmap;
+		PHYDM_DBG(dm, ODM_COMP_API, "pause_ability=0x%llx\n",
+			  dm->pause_ability);
 
-			*pause_lv_pre = pause_lv;
-			return PAUSE_SUCCESS;
-			
+		if (pause_type == PHYDM_PAUSE) {
+			for (i = 0; i < val_lehgth; i++)
+				PHYDM_DBG(dm, ODM_COMP_API,
+					  "[PAUSE SUCCESS] val_idx[%d]{New, Ori}={0x%x, 0x%x}\n",
+					  i, val_buf[i], bkp_val[i]);
+			func_t->pause_phydm_handler(dm, val_buf, val_lehgth);
 		} else {
-			PHYDM_DBG(p_dm, ODM_COMP_API, ("[PAUSE FAIL] Pre_LV >= Curr_LV\n"));
-			return PAUSE_FAIL;
+			for (i = 0; i < val_lehgth; i++)
+				PHYDM_DBG(dm, ODM_COMP_API,
+					  "[PAUSE NO Set: SUCCESS] val_idx[%d]{Ori}={0x%x}\n",
+					  i, bkp_val[i]);
 		}
 
+		*pause_lv_pre = pause_lv;
+		pause_result = PAUSE_SUCCESS;
+
 	} else if (pause_type == PHYDM_RESUME) {
-		p_dm->pause_ability &= ~pause_func_bitmap;
-		PHYDM_DBG(p_dm, ODM_COMP_API, ("pause_ability=0x%llx\n", p_dm->pause_ability));
-		
+		if ((dm->pause_ability & pause_func_bitmap) == 0) {
+			PHYDM_DBG(dm, ODM_COMP_API,
+				  "[RESUME] No Need to Revert\n");
+			return PAUSE_SUCCESS;
+		}
+
+		dm->pause_ability &= ~pause_func_bitmap;
+		PHYDM_DBG(dm, ODM_COMP_API, "pause_ability=0x%llx\n",
+			  dm->pause_ability);
+
 		*pause_lv_pre = PHYDM_PAUSE_RELEASE;
-		
-		for (i = 0; i < val_lehgth; i ++) {
-			PHYDM_DBG(p_dm, ODM_COMP_API, ("[RESUME] val_idx[%d]={0x%x}\n", i, bkp_val[i]));
+
+		for (i = 0; i < val_lehgth; i++) {
+			PHYDM_DBG(dm, ODM_COMP_API,
+				  "[RESUME] val_idx[%d]={0x%x}\n", i,
+				  bkp_val[i]);
 		}
-		
-		p_dm->phydm_func_handler.pause_phydm_handler(p_dm, bkp_val, val_lehgth);
-		
-		return PAUSE_SUCCESS;
+
+		func_t->pause_phydm_handler(dm, bkp_val, val_lehgth);
+
+		pause_result = PAUSE_SUCCESS;
 	} else {
-		PHYDM_DBG(p_dm, ODM_COMP_API, ("[WARNING] error pause_type\n"));
-		return PAUSE_FAIL;
+		PHYDM_DBG(dm, ODM_COMP_API, "[WARNING] error pause_type\n");
+		pause_result = PAUSE_FAIL;
 	}
-	
+	return pause_result;
 }
 
-void
-phydm_pause_func_console(
-	void		*p_dm_void,
-	char		input[][16],
-	u32		*_used,
-	char		*output,
-	u32		*_out_len,
-	u32		input_num
-)
+void phydm_pause_func_console(void *dm_void, char input[][16], u32 *_used,
+			      char *output, u32 *_out_len)
 {
-	struct PHY_DM_STRUCT	*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	char		help[] = "-h";
-	u32		var1[10] = {0};
-	u32		used = *_used;
-	u32		out_len = *_out_len;
-	u32		i;
-	u8		val_length = 0;
-	u32		val_buf[5] = {0};
-	u8		set_result = 0;
-	enum phydm_func_idx_e	func = 0;
-	enum phydm_pause_type	pause_type = 0;
-	enum phydm_pause_level	pause_lv = 0;
-	
-	if ((strcmp(input[1], help) == 0)) {
-		PHYDM_SNPRINTF((output + used, out_len - used, "{Func} {1:pause, 2:Resume} {lv} Val[5:0]\n"));
-		
-	} else {
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	char help[] = "-h";
+	u32 var1[10] = {0};
+	u32 used = *_used;
+	u32 out_len = *_out_len;
+	u32 i;
+	u8 length = 0;
+	u32 buf[5] = {0};
+	u8 set_result = 0;
+	enum phydm_func_idx func = 0;
+	enum phydm_pause_type type = 0;
+	enum phydm_pause_level lv = 0;
 
-		for (i = 0; i < 10; i++) {
-			if (input[i + 1]) {
-				PHYDM_SSCANF(input[i + 1], DCMD_HEX, &var1[i]);
-			}
-		}
+	if ((strcmp(input[1], help) == 0)) {
+		PDM_SNPF(out_len, used, output + used, out_len - used,
+			 "{Func} {1:pause,2:pause no set 3:Resume} {lv:0~3} Val[5:0]\n");
 
-		func = (enum phydm_func_idx_e)var1[0];
-		pause_type = (enum phydm_pause_type)var1[1];
-		pause_lv = (enum phydm_pause_level)var1[2];
-	
+		goto out;
+	}
 
-		for (i = 0; i < 5; i++) {
-			val_buf[i] = var1[3 + i];
-		}
+	for (i = 0; i < 10; i++) {
+		if (input[i + 1])
+			PHYDM_SSCANF(input[i + 1], DCMD_HEX, &var1[i]);
+	}
 
-		if (func == F00_DIG) {
-			PHYDM_SNPRINTF((output + used, out_len - used, "[DIG]\n"));
-			val_length = 1;
-			
-		} else if (func == F05_CCK_PD) {
-			PHYDM_SNPRINTF((output + used, out_len - used, "[CCK_PD]\n"));
-			val_length = 2;
-		} else if (func == F06_ANT_DIV) {
-			PHYDM_SNPRINTF((output + used, out_len - used, "[Ant_Div]\n"));
-			val_length = 1;
-		} else if (func == F13_ADPTVTY) {
-			PHYDM_SNPRINTF((output + used, out_len - used, "[Adaptivity]\n"));
-			val_length = 2;
-		} else {
-			PHYDM_SNPRINTF((output + used, out_len - used, "[Set Function Error]\n"));
-			val_length = 0;
-		}
+	func = (enum phydm_func_idx)var1[0];
+	type = (enum phydm_pause_type)var1[1];
+	lv = (enum phydm_pause_level)var1[2];
+
+	for (i = 0; i < 5; i++)
+		buf[i] = var1[3 + i];
+
+	if (func == F00_DIG) {
+		PDM_SNPF(out_len, used, output + used, out_len - used,
+			 "[DIG]\n");
+		length = 1;
+
+	} else if (func == F05_CCK_PD) {
+		PDM_SNPF(out_len, used, output + used, out_len - used,
+			 "[CCK_PD]\n");
+		length = 1;
+	} else if (func == F06_ANT_DIV) {
+		PDM_SNPF(out_len, used, output + used, out_len - used,
+			 "[Ant_Div]\n");
+		length = 1;
+	} else if (func == F13_ADPTVTY) {
+		PDM_SNPF(out_len, used, output + used, out_len - used,
+			 "[Adaptivity]\n");
+		length = 2;
+	} else if (func == F17_ADPTV_SOML) {
+		PDM_SNPF(out_len, used, output + used, out_len - used,
+			 "[ADSL]\n");
+		length = 1;
+	} else {
+		PDM_SNPF(out_len, used, output + used, out_len - used,
+			 "[Set Function Error]\n");
+		length = 0;
+	}
 
-		if (val_length != 0) {
-			
-			PHYDM_SNPRINTF((output + used, out_len - used, "{%s, lv=%d} val = %d, %d}\n", 
-				((pause_type == PHYDM_PAUSE) ? "Pause" : "Resume"), pause_lv, var1[3], var1[4]));
-			
-			set_result= phydm_pause_func(p_dm, func, pause_type, pause_lv, val_length, val_buf);
-		}
+	if (length != 0) {
+		PDM_SNPF(out_len, used, output + used, out_len - used,
+			 "{%s, lv=%d} val = %d, %d}\n",
+			 ((type == PHYDM_PAUSE) ? "Pause" :
+			 ((type == PHYDM_RESUME) ? "Resume" : "Pause no_set")),
+			 lv, var1[3], var1[4]);
 
-		PHYDM_SNPRINTF((output + used, out_len - used, "set_result = %d\n", set_result));
+		set_result = phydm_pause_func(dm, func, type, lv, length, buf);
 	}
 
+	PDM_SNPF(out_len, used, output + used, out_len - used,
+		 "set_result = %d\n", set_result);
 
+out:
 	*_used = used;
 	*_out_len = out_len;
 }
 
-u8
-phydm_stop_dm_watchdog_check(
-	void					*p_dm_void
-)
+u8 phydm_stop_dm_watchdog_check(void *dm_void)
 {
-	struct PHY_DM_STRUCT			*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-
-	if (p_dm->disable_phydm_watchdog == 1) {
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
 
-		PHYDM_DBG(p_dm, DBG_COMMON_FLOW, ("Disable phydm\n"));
-		return true;
-		
-	} else if (phydm_acs_check(p_dm) == true) {
-	
-		PHYDM_DBG(p_dm, DBG_COMMON_FLOW, ("Disable phydm by ACS\n"));
+	if (dm->disable_phydm_watchdog == 1) {
+		PHYDM_DBG(dm, DBG_COMMON_FLOW, "Disable phydm\n");
 		return true;
-		
-	} else
+	} else {
 		return false;
-	
+	}
 }
 
-/*
- * 2011/09/20 MH This is the entry pointer for all team to execute HW out source DM.
- * You can not add any dummy function here, be care, you can only use DM structure
- * to perform any new ODM_DM.
- *   */
-void
-phydm_watchdog(
-	struct PHY_DM_STRUCT		*p_dm
-)
+void phydm_watchdog(struct dm_struct *dm)
 {
-	PHYDM_DBG(p_dm, DBG_COMMON_FLOW, ("%s ======>\n", __func__));
-
-	phydm_common_info_self_update(p_dm);
-	phydm_rssi_monitor_check(p_dm);
-	phydm_basic_dbg_message(p_dm);
-	phydm_auto_dbg_engine(p_dm);
-	phydm_receiver_blocking(p_dm);
-	
-	if (phydm_stop_dm_watchdog_check(p_dm) == true)
-		return;
-
-	phydm_hw_setting(p_dm);
-
-	#if 0 /*(DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_CE))*/
-	if (*(p_dm->p_is_power_saving) == true) {
+	PHYDM_DBG(dm, DBG_COMMON_FLOW, "%s ======>\n", __func__);
 
-		PHYDM_DBG(p_dm, DBG_COMMON_FLOW, ("PHYDM power saving mode\n"));
-		phydm_dig_by_rssi_lps(p_dm);
-		phydm_adaptivity(p_dm);
+	phydm_common_info_self_update(dm);
+	phydm_phy_info_update(dm);
+	phydm_rssi_monitor_check(dm);
+	phydm_basic_dbg_message(dm);
+	phydm_dm_summary(dm, FIRST_MACID);
+#ifdef PHYDM_AUTO_DEGBUG
+	phydm_auto_dbg_engine(dm);
+#endif
+	phydm_receiver_blocking(dm);
 
-		#if (DM_ODM_SUPPORT_TYPE & (ODM_CE))
-		odm_antenna_diversity(p_dm); /*enable AntDiv in PS mode, request from SD4 Jeff*/
-		#endif
+	if (phydm_stop_dm_watchdog_check(dm) == true)
 		return;
-	}
-	#endif
+
+	phydm_hw_setting(dm);
 
 	#ifdef PHYDM_TDMA_DIG_SUPPORT
-	if (p_dm->original_dig_restore == 0)
-		phydm_tdma_dig_timer_check(p_dm);
-	else 
+	if (dm->original_dig_restore == 0)
+		phydm_tdma_dig_timer_check(dm);
+	else
 	#endif
 	{
-		odm_false_alarm_counter_statistics(p_dm);
-		phydm_noisy_detection(p_dm);
-		phydm_dig(p_dm);
-		phydm_cck_pd_th(p_dm);
+		phydm_false_alarm_counter_statistics(dm);
+		phydm_noisy_detection(dm);
+		phydm_dig(dm);
+		#ifdef PHYDM_SUPPORT_CCKPD
+		phydm_cck_pd_th(dm);
+		#endif
 	}
+
 #ifdef PHYDM_POWER_TRAINING_SUPPORT
-	phydm_update_power_training_state(p_dm);
+	phydm_update_power_training_state(dm);
 #endif
-	phydm_adaptivity(p_dm);
-	phydm_ra_info_watchdog(p_dm);
-	odm_path_diversity(p_dm);
-	odm_cfo_tracking(p_dm);
-	odm_dynamic_tx_power(p_dm);
-	odm_antenna_diversity(p_dm);
-	phydm_adaptive_soml(p_dm);
-#ifdef CONFIG_DYNAMIC_RX_PATH
-	phydm_dynamic_rx_path(p_dm);
+	phydm_adaptivity(dm);
+	phydm_ra_info_watchdog(dm);
+#ifdef CONFIG_PATH_DIVERSITY
+	phydm_tx_path_diversity(dm);
 #endif
-
-#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_CE))
-	phydm_beamforming_watchdog(p_dm);
+	phydm_cfo_tracking(dm);
+#ifdef CONFIG_DYNAMIC_TX_TWR
+	phydm_dynamic_tx_power(dm);
+#endif
+#ifdef CONFIG_PHYDM_ANTENNA_DIVERSITY
+	odm_antenna_diversity(dm);
+#endif
+#ifdef CONFIG_ADAPTIVE_SOML
+	phydm_adaptive_soml(dm);
 #endif
 
-	halrf_watchdog(p_dm);
-	phydm_primary_cca(p_dm);
+#ifdef PHYDM_BEAMFORMING_VERSION1
+	phydm_beamforming_watchdog(dm);
+#endif
 
+	halrf_watchdog(dm);
+#ifdef PHYDM_PRIMARY_CCA
+	phydm_primary_cca(dm);
+#endif
 #if (DM_ODM_SUPPORT_TYPE == ODM_CE)
-	odm_dtc(p_dm);
+	odm_dtc(dm);
 #endif
 
-	phydm_ccx_monitor(p_dm);
+	phydm_env_mntr_watchdog(dm);
 
 #ifdef PHYDM_LNA_SAT_CHK_SUPPORT
-	phydm_lna_sat_chk_watchdog(p_dm);
+	phydm_lna_sat_chk_watchdog(dm);
 #endif
-
-	phydm_common_info_self_reset(p_dm);
-
+#ifdef CONFIG_MCC_DM
+	#if (RTL8822B_SUPPORT == 1)
+	phydm_mcc_switch(dm);
+	#endif
+#endif
+	phydm_common_info_self_reset(dm);
 }
 
-
-/*
+/*@
  * Init /.. Fixed HW value. Only init time.
- *   */
-void
-odm_cmn_info_init(
-	struct PHY_DM_STRUCT		*p_dm,
-	enum odm_cmninfo_e	cmn_info,
-	u64			value
-)
+ */
+void odm_cmn_info_init(struct dm_struct *dm, enum odm_cmninfo cmn_info,
+		       u64 value)
 {
-	/*  */
 	/* This section is used for init value */
-	/*  */
-	switch	(cmn_info) {
-	/*  */
-	/* Fixed ODM value. */
-	/*  */
-	case	ODM_CMNINFO_ABILITY:
-		p_dm->support_ability = (u64)value;
+	switch (cmn_info) {
+	/* @Fixed ODM value. */
+	case ODM_CMNINFO_ABILITY:
+		dm->support_ability = (u64)value;
 		break;
 
-	case	ODM_CMNINFO_RF_TYPE:
-		p_dm->rf_type = (u8)value;
+	case ODM_CMNINFO_RF_TYPE:
+		dm->rf_type = (u8)value;
 		break;
 
-	case	ODM_CMNINFO_PLATFORM:
-		p_dm->support_platform = (u8)value;
+	case ODM_CMNINFO_PLATFORM:
+		dm->support_platform = (u8)value;
 		break;
 
-	case	ODM_CMNINFO_INTERFACE:
-		p_dm->support_interface = (u8)value;
+	case ODM_CMNINFO_INTERFACE:
+		dm->support_interface = (u8)value;
 		break;
 
-	case	ODM_CMNINFO_MP_TEST_CHIP:
-		p_dm->is_mp_chip = (u8)value;
+	case ODM_CMNINFO_MP_TEST_CHIP:
+		dm->is_mp_chip = (u8)value;
 		break;
 
-	case	ODM_CMNINFO_IC_TYPE:
-		p_dm->support_ic_type = (u32)value;
+	case ODM_CMNINFO_IC_TYPE:
+		dm->support_ic_type = (u32)value;
 		break;
 
-	case	ODM_CMNINFO_CUT_VER:
-		p_dm->cut_version = (u8)value;
+	case ODM_CMNINFO_CUT_VER:
+		dm->cut_version = (u8)value;
 		break;
 
-	case	ODM_CMNINFO_FAB_VER:
-		p_dm->fab_version = (u8)value;
+	case ODM_CMNINFO_FAB_VER:
+		dm->fab_version = (u8)value;
 		break;
-
-	case	ODM_CMNINFO_RFE_TYPE:
-		p_dm->rfe_type = (u8)value;
-		phydm_init_hw_info_by_rfe(p_dm);
+	case ODM_CMNINFO_FW_VER:
+		dm->fw_version = (u8)value;
 		break;
-
-	case    ODM_CMNINFO_RF_ANTENNA_TYPE:
-		p_dm->ant_div_type = (u8)value;
+	case ODM_CMNINFO_FW_SUB_VER:
+		dm->fw_sub_version = (u8)value;
 		break;
-
-	case	ODM_CMNINFO_WITH_EXT_ANTENNA_SWITCH:
-		p_dm->with_extenal_ant_switch = (u8)value;
+	case ODM_CMNINFO_RFE_TYPE:
+#if (RTL8821C_SUPPORT == 1)
+		if (dm->support_ic_type & ODM_RTL8821C)
+			dm->rfe_type_expand = (u8)value;
+		else
+#endif
+			dm->rfe_type = (u8)value;
+		phydm_init_hw_info_by_rfe(dm);
 		break;
 
-	case    ODM_CMNINFO_BE_FIX_TX_ANT:
-		p_dm->dm_fat_table.b_fix_tx_ant = (u8)value;
+	case ODM_CMNINFO_RF_ANTENNA_TYPE:
+		dm->ant_div_type = (u8)value;
 		break;
 
-	case	ODM_CMNINFO_BOARD_TYPE:
-		if (!p_dm->is_init_hw_info_by_rfe)
-			p_dm->board_type = (u8)value;
+	case ODM_CMNINFO_WITH_EXT_ANTENNA_SWITCH:
+		dm->with_extenal_ant_switch = (u8)value;
 		break;
 
-	case	ODM_CMNINFO_PACKAGE_TYPE:
-		if (!p_dm->is_init_hw_info_by_rfe)
-			p_dm->package_type = (u8)value;
+#ifdef CONFIG_PHYDM_ANTENNA_DIVERSITY
+	case ODM_CMNINFO_BE_FIX_TX_ANT:
+		dm->dm_fat_table.b_fix_tx_ant = (u8)value;
 		break;
+#endif
 
-	case	ODM_CMNINFO_EXT_LNA:
-		if (!p_dm->is_init_hw_info_by_rfe)
-			p_dm->ext_lna = (u8)value;
+	case ODM_CMNINFO_BOARD_TYPE:
+		if (!dm->is_init_hw_info_by_rfe)
+			dm->board_type = (u8)value;
 		break;
 
-	case	ODM_CMNINFO_5G_EXT_LNA:
-		if (!p_dm->is_init_hw_info_by_rfe)
-			p_dm->ext_lna_5g = (u8)value;
+	case ODM_CMNINFO_PACKAGE_TYPE:
+		if (!dm->is_init_hw_info_by_rfe)
+			dm->package_type = (u8)value;
 		break;
 
-	case	ODM_CMNINFO_EXT_PA:
-		if (!p_dm->is_init_hw_info_by_rfe)
-			p_dm->ext_pa = (u8)value;
+	case ODM_CMNINFO_EXT_LNA:
+		if (!dm->is_init_hw_info_by_rfe)
+			dm->ext_lna = (u8)value;
 		break;
 
-	case	ODM_CMNINFO_5G_EXT_PA:
-		if (!p_dm->is_init_hw_info_by_rfe)
-			p_dm->ext_pa_5g = (u8)value;
+	case ODM_CMNINFO_5G_EXT_LNA:
+		if (!dm->is_init_hw_info_by_rfe)
+			dm->ext_lna_5g = (u8)value;
 		break;
 
-	case	ODM_CMNINFO_GPA:
-		if (!p_dm->is_init_hw_info_by_rfe)
-			p_dm->type_gpa = (u16)value;
+	case ODM_CMNINFO_EXT_PA:
+		if (!dm->is_init_hw_info_by_rfe)
+			dm->ext_pa = (u8)value;
 		break;
 
-	case	ODM_CMNINFO_APA:
-		if (!p_dm->is_init_hw_info_by_rfe)
-			p_dm->type_apa = (u16)value;
+	case ODM_CMNINFO_5G_EXT_PA:
+		if (!dm->is_init_hw_info_by_rfe)
+			dm->ext_pa_5g = (u8)value;
 		break;
 
-	case	ODM_CMNINFO_GLNA:
-		if (!p_dm->is_init_hw_info_by_rfe)
-			p_dm->type_glna = (u16)value;
+	case ODM_CMNINFO_GPA:
+		if (!dm->is_init_hw_info_by_rfe)
+			dm->type_gpa = (u16)value;
 		break;
 
-	case	ODM_CMNINFO_ALNA:
-		if (!p_dm->is_init_hw_info_by_rfe)
-			p_dm->type_alna = (u16)value;
+	case ODM_CMNINFO_APA:
+		if (!dm->is_init_hw_info_by_rfe)
+			dm->type_apa = (u16)value;
 		break;
 
-	case	ODM_CMNINFO_EXT_TRSW:
-		if (!p_dm->is_init_hw_info_by_rfe)
-			p_dm->ext_trsw = (u8)value;
+	case ODM_CMNINFO_GLNA:
+		if (!dm->is_init_hw_info_by_rfe)
+			dm->type_glna = (u16)value;
 		break;
-	case	ODM_CMNINFO_EXT_LNA_GAIN:
-		p_dm->ext_lna_gain = (u8)value;
+
+	case ODM_CMNINFO_ALNA:
+		if (!dm->is_init_hw_info_by_rfe)
+			dm->type_alna = (u16)value;
 		break;
-	case	ODM_CMNINFO_PATCH_ID:
-		p_dm->iot_table.win_patch_id = (u8)value;
+
+	case ODM_CMNINFO_EXT_TRSW:
+		if (!dm->is_init_hw_info_by_rfe)
+			dm->ext_trsw = (u8)value;
 		break;
-	case	ODM_CMNINFO_BINHCT_TEST:
-		p_dm->is_in_hct_test = (boolean)value;
+	case ODM_CMNINFO_EXT_LNA_GAIN:
+		dm->ext_lna_gain = (u8)value;
 		break;
-	case	ODM_CMNINFO_BWIFI_TEST:
-		p_dm->wifi_test = (u8)value;
+	case ODM_CMNINFO_PATCH_ID:
+		dm->iot_table.win_patch_id = (u8)value;
 		break;
-	case	ODM_CMNINFO_SMART_CONCURRENT:
-		p_dm->is_dual_mac_smart_concurrent = (boolean)value;
+	case ODM_CMNINFO_BINHCT_TEST:
+		dm->is_in_hct_test = (boolean)value;
 		break;
-	case	ODM_CMNINFO_DOMAIN_CODE_2G:
-		p_dm->odm_regulation_2_4g = (u8)value;
+	case ODM_CMNINFO_BWIFI_TEST:
+		dm->wifi_test = (u8)value;
 		break;
-	case	ODM_CMNINFO_DOMAIN_CODE_5G:
-		p_dm->odm_regulation_5g = (u8)value;
+	case ODM_CMNINFO_SMART_CONCURRENT:
+		dm->is_dual_mac_smart_concurrent = (boolean)value;
 		break;
-#if (DM_ODM_SUPPORT_TYPE &  (ODM_AP))
-	case	ODM_CMNINFO_CONFIG_BB_RF:
-		p_dm->config_bbrf = (boolean)value;
+#if (DM_ODM_SUPPORT_TYPE & (ODM_AP))
+	case ODM_CMNINFO_CONFIG_BB_RF:
+		dm->config_bbrf = (boolean)value;
 		break;
 #endif
-	case	ODM_CMNINFO_IQKPAOFF:
-		p_dm->rf_calibrate_info.is_iqk_pa_off = (boolean)value;
+	case ODM_CMNINFO_IQKPAOFF:
+		dm->rf_calibrate_info.is_iqk_pa_off = (boolean)value;
 		break;
-	case	ODM_CMNINFO_REGRFKFREEENABLE:
-		p_dm->rf_calibrate_info.reg_rf_kfree_enable = (u8)value;
+	case ODM_CMNINFO_REGRFKFREEENABLE:
+		dm->rf_calibrate_info.reg_rf_kfree_enable = (u8)value;
 		break;
-	case	ODM_CMNINFO_RFKFREEENABLE:
-		p_dm->rf_calibrate_info.rf_kfree_enable = (u8)value;
+	case ODM_CMNINFO_RFKFREEENABLE:
+		dm->rf_calibrate_info.rf_kfree_enable = (u8)value;
 		break;
-	case	ODM_CMNINFO_NORMAL_RX_PATH_CHANGE:
-		p_dm->normal_rx_path = (u8)value;
+	case ODM_CMNINFO_NORMAL_RX_PATH_CHANGE:
+		dm->normal_rx_path = (u8)value;
 		break;
-	case	ODM_CMNINFO_EFUSE0X3D8:
-		p_dm->efuse0x3d8 = (u8)value;
+	case ODM_CMNINFO_EFUSE0X3D8:
+		dm->efuse0x3d8 = (u8)value;
 		break;
-	case	ODM_CMNINFO_EFUSE0X3D7:
-		p_dm->efuse0x3d7 = (u8)value;
+	case ODM_CMNINFO_EFUSE0X3D7:
+		dm->efuse0x3d7 = (u8)value;
 		break;
-	case	ODM_CMNINFO_ADVANCE_OTA:
-		p_dm->p_advance_ota = (u8)value;
+	case ODM_CMNINFO_ADVANCE_OTA:
+		dm->p_advance_ota = (u8)value;
 		break;
-		
+
 #ifdef CONFIG_PHYDM_DFS_MASTER
-	case	ODM_CMNINFO_DFS_REGION_DOMAIN:
-		p_dm->dfs_region_domain = (u8)value;
+	case ODM_CMNINFO_DFS_REGION_DOMAIN:
+		dm->dfs_region_domain = (u8)value;
 		break;
 #endif
-	case	ODM_CMNINFO_SOFT_AP_SPECIAL_SETTING:
-		p_dm->soft_ap_special_setting = (u32)value;
+	case ODM_CMNINFO_SOFT_AP_SPECIAL_SETTING:
+		dm->soft_ap_special_setting = (u32)value;
 		break;
 
-	case	ODM_CMNINFO_DPK_EN:
-		/*p_dm->dpk_en = (u1Byte)value;*/
-		halrf_cmn_info_set(p_dm, HALRF_CMNINFO_DPK_EN, (u64)value);
+	case ODM_CMNINFO_X_CAP_SETTING:
+		dm->dm_cfo_track.crystal_cap_default = (u8)value;
 		break;
 
-	case	ODM_CMNINFO_HP_HWID:
-		p_dm->hp_hw_id = (boolean)value;
+	case ODM_CMNINFO_DPK_EN:
+		/*@dm->dpk_en = (u1Byte)value;*/
+		halrf_cmn_info_set(dm, HALRF_CMNINFO_DPK_EN, (u64)value);
+		break;
+
+	case ODM_CMNINFO_HP_HWID:
+		dm->hp_hw_id = (boolean)value;
 		break;
-	/* To remove the compiler warning, must add an empty default statement to handle the other values. */
 	default:
-		/* do nothing */
 		break;
-
 	}
-
 }
 
-
-void
-odm_cmn_info_hook(
-	struct PHY_DM_STRUCT		*p_dm,
-	enum odm_cmninfo_e	cmn_info,
-	void			*p_value
-)
+void odm_cmn_info_hook(struct dm_struct *dm, enum odm_cmninfo cmn_info,
+		       void *value)
 {
-	/*  */
-	/* Hook call by reference pointer. */
-	/*  */
-	switch	(cmn_info) {
-	/*  */
-	/* Dynamic call by reference pointer. */
-	/*  */
-	case	ODM_CMNINFO_TX_UNI:
-		p_dm->p_num_tx_bytes_unicast = (u64 *)p_value;
+	/* @Hook call by reference pointer. */
+	switch (cmn_info) {
+	/* @Dynamic call by reference pointer. */
+	case ODM_CMNINFO_TX_UNI:
+		dm->num_tx_bytes_unicast = (u64 *)value;
 		break;
 
-	case	ODM_CMNINFO_RX_UNI:
-		p_dm->p_num_rx_bytes_unicast = (u64 *)p_value;
+	case ODM_CMNINFO_RX_UNI:
+		dm->num_rx_bytes_unicast = (u64 *)value;
 		break;
 
-	case	ODM_CMNINFO_BAND:
-		p_dm->p_band_type = (u8 *)p_value;
+	case ODM_CMNINFO_BAND:
+		dm->band_type = (u8 *)value;
 		break;
 
-	case	ODM_CMNINFO_SEC_CHNL_OFFSET:
-		p_dm->p_sec_ch_offset = (u8 *)p_value;
+	case ODM_CMNINFO_SEC_CHNL_OFFSET:
+		dm->sec_ch_offset = (u8 *)value;
 		break;
 
-	case	ODM_CMNINFO_SEC_MODE:
-		p_dm->p_security = (u8 *)p_value;
+	case ODM_CMNINFO_SEC_MODE:
+		dm->security = (u8 *)value;
 		break;
 
-	case	ODM_CMNINFO_BW:
-		p_dm->p_band_width = (u8 *)p_value;
+	case ODM_CMNINFO_BW:
+		dm->band_width = (u8 *)value;
 		break;
 
-	case	ODM_CMNINFO_CHNL:
-		p_dm->p_channel = (u8 *)p_value;
+	case ODM_CMNINFO_CHNL:
+		dm->channel = (u8 *)value;
 		break;
 
-	case	ODM_CMNINFO_SCAN:
-		p_dm->p_is_scan_in_process = (boolean *)p_value;
+	case ODM_CMNINFO_SCAN:
+		dm->is_scan_in_process = (boolean *)value;
 		break;
 
-	case	ODM_CMNINFO_POWER_SAVING:
-		p_dm->p_is_power_saving = (boolean *)p_value;
+	case ODM_CMNINFO_POWER_SAVING:
+		dm->is_power_saving = (boolean *)value;
 		break;
 
-	case	ODM_CMNINFO_ONE_PATH_CCA:
-		p_dm->p_one_path_cca = (u8 *)p_value;
+	case ODM_CMNINFO_TDMA:
+		dm->is_tdma = (boolean *)value;
 		break;
 
-	case	ODM_CMNINFO_DRV_STOP:
-		p_dm->p_is_driver_stopped = (boolean *)p_value;
+	case ODM_CMNINFO_ONE_PATH_CCA:
+		dm->one_path_cca = (u8 *)value;
 		break;
 
-	case	ODM_CMNINFO_PNP_IN:
-		p_dm->p_is_driver_is_going_to_pnp_set_power_sleep = (boolean *)p_value;
+	case ODM_CMNINFO_DRV_STOP:
+		dm->is_driver_stopped = (boolean *)value;
 		break;
-
-	case	ODM_CMNINFO_INIT_ON:
-		p_dm->pinit_adpt_in_progress = (boolean *)p_value;
+	case ODM_CMNINFO_INIT_ON:
+		dm->pinit_adpt_in_progress = (boolean *)value;
 		break;
 
-	case	ODM_CMNINFO_ANT_TEST:
-		p_dm->p_antenna_test = (u8 *)p_value;
+	case ODM_CMNINFO_ANT_TEST:
+		dm->antenna_test = (u8 *)value;
 		break;
 
-	case	ODM_CMNINFO_NET_CLOSED:
-		p_dm->p_is_net_closed = (boolean *)p_value;
+	case ODM_CMNINFO_NET_CLOSED:
+		dm->is_net_closed = (boolean *)value;
 		break;
 
-	case	ODM_CMNINFO_FORCED_RATE:
-		p_dm->p_forced_data_rate = (u16 *)p_value;
+	case ODM_CMNINFO_FORCED_RATE:
+		dm->forced_data_rate = (u16 *)value;
 		break;
-	case	ODM_CMNINFO_ANT_DIV:
-		p_dm->p_enable_antdiv = (u8 *)p_value;
+	case ODM_CMNINFO_ANT_DIV:
+		dm->enable_antdiv = (u8 *)value;
 		break;
-	case	ODM_CMNINFO_ADAPTIVITY:
-		p_dm->p_enable_adaptivity = (u8 *)p_value;
+	case ODM_CMNINFO_PATH_DIV:
+		dm->enable_pathdiv = (u8 *)value;
+		break;
+	case ODM_CMNINFO_ADAPTIVE_SOML:
+		dm->en_adap_soml = (u8 *)value;
+		break;
+	case ODM_CMNINFO_ADAPTIVITY:
+		dm->enable_adaptivity = (u8 *)value;
 		break;
 
-	case	ODM_CMNINFO_P2P_LINK:
-		p_dm->dm_dig_table.is_p2p_in_process = (u8 *)p_value;
+	case ODM_CMNINFO_P2P_LINK:
+		dm->dm_dig_table.is_p2p_in_process = (u8 *)value;
 		break;
 
-	case	ODM_CMNINFO_IS1ANTENNA:
-		p_dm->p_is_1_antenna = (boolean *)p_value;
+	case ODM_CMNINFO_IS1ANTENNA:
+		dm->is_1_antenna = (boolean *)value;
 		break;
 
-	case	ODM_CMNINFO_RFDEFAULTPATH:
-		p_dm->p_rf_default_path = (u8 *)p_value;
+	case ODM_CMNINFO_RFDEFAULTPATH:
+		dm->rf_default_path = (u8 *)value;
 		break;
 
-	case	ODM_CMNINFO_FCS_MODE:
-		p_dm->p_is_fcs_mode_enable = (boolean *)p_value;
+	case ODM_CMNINFO_FCS_MODE:
+		dm->is_fcs_mode_enable = (boolean *)value;
 		break;
-	/*add by YuChen for beamforming PhyDM*/
-	case	ODM_CMNINFO_HUBUSBMODE:
-		p_dm->hub_usb_mode = (u8 *)p_value;
+
+	case ODM_CMNINFO_HUBUSBMODE:
+		dm->hub_usb_mode = (u8 *)value;
 		break;
-	case	ODM_CMNINFO_FWDWRSVDPAGEINPROGRESS:
-		p_dm->p_is_fw_dw_rsvd_page_in_progress = (boolean *)p_value;
+	case ODM_CMNINFO_FWDWRSVDPAGEINPROGRESS:
+		dm->is_fw_dw_rsvd_page_in_progress = (boolean *)value;
 		break;
-	case	ODM_CMNINFO_TX_TP:
-		p_dm->p_current_tx_tp = (u32 *)p_value;
+	case ODM_CMNINFO_TX_TP:
+		dm->current_tx_tp = (u32 *)value;
 		break;
-	case	ODM_CMNINFO_RX_TP:
-		p_dm->p_current_rx_tp = (u32 *)p_value;
+	case ODM_CMNINFO_RX_TP:
+		dm->current_rx_tp = (u32 *)value;
 		break;
-	case	ODM_CMNINFO_SOUNDING_SEQ:
-		p_dm->p_sounding_seq = (u8 *)p_value;
+	case ODM_CMNINFO_SOUNDING_SEQ:
+		dm->sounding_seq = (u8 *)value;
 		break;
 #ifdef CONFIG_PHYDM_DFS_MASTER
-	case	ODM_CMNINFO_DFS_MASTER_ENABLE:
-		p_dm->dfs_master_enabled = (u8 *)p_value;
+	case ODM_CMNINFO_DFS_MASTER_ENABLE:
+		dm->dfs_master_enabled = (u8 *)value;
 		break;
 #endif
-	case	ODM_CMNINFO_FORCE_TX_ANT_BY_TXDESC:
-		p_dm->dm_fat_table.p_force_tx_ant_by_desc = (u8 *)p_value;
+
+#ifdef CONFIG_PHYDM_ANTENNA_DIVERSITY
+	case ODM_CMNINFO_FORCE_TX_ANT_BY_TXDESC:
+		dm->dm_fat_table.p_force_tx_by_desc = (u8 *)value;
+		break;
+	case ODM_CMNINFO_SET_S0S1_DEFAULT_ANTENNA:
+		dm->dm_fat_table.p_default_s0_s1 = (u8 *)value;
 		break;
-	case	ODM_CMNINFO_SET_S0S1_DEFAULT_ANTENNA:
-		p_dm->dm_fat_table.p_default_s0_s1 = (u8 *)p_value;
+	case ODM_CMNINFO_BF_ANTDIV_DECISION:
+		dm->dm_fat_table.is_no_csi_feedback = (boolean *)value;
 		break;
-	case	ODM_CMNINFO_SOFT_AP_MODE:
-		p_dm->p_soft_ap_mode = (u32 *)p_value;
+#endif
+
+	case ODM_CMNINFO_SOFT_AP_MODE:
+		dm->soft_ap_mode = (u32 *)value;
 		break;
 	case ODM_CMNINFO_MP_MODE:
-		p_dm->p_mp_mode = (u8 *)p_value;
+		dm->mp_mode = (u8 *)value;
 		break;
-	case	ODM_CMNINFO_INTERRUPT_MASK:
-		p_dm->p_interrupt_mask = (u32 *)p_value;
+	case ODM_CMNINFO_INTERRUPT_MASK:
+		dm->interrupt_mask = (u32 *)value;
 		break;
 	case ODM_CMNINFO_BB_OPERATION_MODE:
-		p_dm->p_bb_op_mode = (u8 *)p_value;
+		dm->bb_op_mode = (u8 *)value;
 		break;
-	case ODM_CMNINFO_BF_ANTDIV_DECISION:
-		p_dm->dm_fat_table.is_no_csi_feedback = (boolean *)p_value;
-		break;
-
 	default:
 		/*do nothing*/
 		break;
-
 	}
-
 }
-/*
+
+/*@
  * Update band/CHannel/.. The values are dynamic but non-per-packet.
- *   */
-void
-odm_cmn_info_update(
-	struct PHY_DM_STRUCT		*p_dm,
-	u32			cmn_info,
-	u64			value
-)
+ */
+void odm_cmn_info_update(struct dm_struct *dm, u32 cmn_info, u64 value)
 {
-	/*  */
 	/* This init variable may be changed in run time. */
-	/*  */
-	switch	(cmn_info) {
+	switch (cmn_info) {
 	case ODM_CMNINFO_LINK_IN_PROGRESS:
-		p_dm->is_link_in_process = (boolean)value;
-		break;
-
-	case	ODM_CMNINFO_ABILITY:
-		p_dm->support_ability = (u64)value;
+		dm->is_link_in_process = (boolean)value;
 		break;
 
-	case	ODM_CMNINFO_RF_TYPE:
-		p_dm->rf_type = (u8)value;
+	case ODM_CMNINFO_ABILITY:
+		dm->support_ability = (u64)value;
 		break;
 
-	case	ODM_CMNINFO_WIFI_DIRECT:
-		p_dm->is_wifi_direct = (boolean)value;
+	case ODM_CMNINFO_RF_TYPE:
+		dm->rf_type = (u8)value;
 		break;
 
-	case	ODM_CMNINFO_WIFI_DISPLAY:
-		p_dm->is_wifi_display = (boolean)value;
+	case ODM_CMNINFO_WIFI_DIRECT:
+		dm->is_wifi_direct = (boolean)value;
 		break;
 
-	case	ODM_CMNINFO_LINK:
-		p_dm->is_linked = (boolean)value;
+	case ODM_CMNINFO_WIFI_DISPLAY:
+		dm->is_wifi_display = (boolean)value;
 		break;
 
-	case	ODM_CMNINFO_CMW500LINK:
-		p_dm->iot_table.is_linked_cmw500 = (boolean)value;
+	case ODM_CMNINFO_LINK:
+		dm->is_linked = (boolean)value;
 		break;
 
-	case	ODM_CMNINFO_STATION_STATE:
-		p_dm->bsta_state = (boolean)value;
+	case ODM_CMNINFO_CMW500LINK:
+		dm->iot_table.is_linked_cmw500 = (boolean)value;
 		break;
 
-	case	ODM_CMNINFO_RSSI_MIN:
-		p_dm->rssi_min = (u8)value;
+	case ODM_CMNINFO_STATION_STATE:
+		dm->bsta_state = (boolean)value;
 		break;
 
-	case	ODM_CMNINFO_RSSI_MIN_BY_PATH:
-		p_dm->rssi_min_by_path = (u8)value;
+	case ODM_CMNINFO_RSSI_MIN:
+		dm->rssi_min = (u8)value;
 		break;
 
-	case	ODM_CMNINFO_DBG_COMP:
-		p_dm->debug_components = (u64)value;
+	case ODM_CMNINFO_RSSI_MIN_BY_PATH:
+		dm->rssi_min_by_path = (u8)value;
 		break;
 
-	case	ODM_CMNINFO_DBG_LEVEL:
-		p_dm->debug_level = (u32)value;
+	case ODM_CMNINFO_DBG_COMP:
+		dm->debug_components = (u64)value;
 		break;
 
 #ifdef ODM_CONFIG_BT_COEXIST
 	/* The following is for BT HS mode and BT coexist mechanism. */
 	case ODM_CMNINFO_BT_ENABLED:
-		p_dm->bt_info_table.is_bt_enabled = (boolean)value;
+		dm->bt_info_table.is_bt_enabled = (boolean)value;
 		break;
 
 	case ODM_CMNINFO_BT_HS_CONNECT_PROCESS:
-		p_dm->bt_info_table.is_bt_connect_process = (boolean)value;
+		dm->bt_info_table.is_bt_connect_process = (boolean)value;
 		break;
 
 	case ODM_CMNINFO_BT_HS_RSSI:
-		p_dm->bt_info_table.bt_hs_rssi = (u8)value;
+		dm->bt_info_table.bt_hs_rssi = (u8)value;
 		break;
 
-	case	ODM_CMNINFO_BT_OPERATION:
-		p_dm->bt_info_table.is_bt_hs_operation = (boolean)value;
+	case ODM_CMNINFO_BT_OPERATION:
+		dm->bt_info_table.is_bt_hs_operation = (boolean)value;
 		break;
 
-	case	ODM_CMNINFO_BT_LIMITED_DIG:
-		p_dm->bt_info_table.is_bt_limited_dig = (boolean)value;
+	case ODM_CMNINFO_BT_LIMITED_DIG:
+		dm->bt_info_table.is_bt_limited_dig = (boolean)value;
 		break;
 #endif
 
-	case	ODM_CMNINFO_AP_TOTAL_NUM:
-		p_dm->ap_total_num = (u8)value;
-		break;
-
-	case ODM_CMNINFO_POWER_TRAINING:
-		p_dm->is_disable_power_training = (boolean)value;
+	case ODM_CMNINFO_AP_TOTAL_NUM:
+		dm->ap_total_num = (u8)value;
 		break;
 
 #ifdef CONFIG_PHYDM_DFS_MASTER
-	case	ODM_CMNINFO_DFS_REGION_DOMAIN:
-		p_dm->dfs_region_domain = (u8)value;
+	case ODM_CMNINFO_DFS_REGION_DOMAIN:
+		dm->dfs_region_domain = (u8)value;
 		break;
 #endif
 
-	case	ODM_CMNINFO_BT_CONTINUOUS_TURN:
-		p_dm->is_bt_continuous_turn = (boolean)value;
+	case ODM_CMNINFO_BT_CONTINUOUS_TURN:
+		dm->is_bt_continuous_turn = (boolean)value;
 		break;
-
-#if 0
-	case	ODM_CMNINFO_OP_MODE:
-		p_dm->op_mode = (u8)value;
-		break;
-
-	case	ODM_CMNINFO_BAND:
-		p_dm->band_type = (u8)value;
-		break;
-
-	case	ODM_CMNINFO_SEC_CHNL_OFFSET:
-		p_dm->sec_ch_offset = (u8)value;
-		break;
-
-	case	ODM_CMNINFO_SEC_MODE:
-		p_dm->security = (u8)value;
-		break;
-
-	case	ODM_CMNINFO_BW:
-		p_dm->band_width = (u8)value;
-		break;
-
-	case	ODM_CMNINFO_CHNL:
-		p_dm->channel = (u8)value;
-		break;
-#endif
 	default:
-		/* do nothing */
 		break;
 	}
-
-
 }
 
-u32
-phydm_cmn_info_query(
-	struct PHY_DM_STRUCT		*p_dm,
-	enum phydm_info_query_e		info_type
-)
+u32 phydm_cmn_info_query(struct dm_struct *dm, enum phydm_info_query info_type)
 {
-	struct phydm_fa_struct		*p_fa_t = &(p_dm->false_alm_cnt);
-	struct phydm_dig_struct	*p_dig_t = &p_dm->dm_dig_table;
-	struct _CCX_INFO			*ccx_info = &p_dm->dm_ccx_info;
+	struct phydm_fa_struct *fa_t = &dm->false_alm_cnt;
+	struct phydm_dig_struct *dig_t = &dm->dm_dig_table;
+	struct ccx_info *ccx_info = &dm->dm_ccx_info;
 
 	switch (info_type) {
-
-	/*=== [FA Relative] ===========================================*/
+	/*@=== [FA Relative] ===========================================*/
 	case PHYDM_INFO_FA_OFDM:
-		return p_fa_t->cnt_ofdm_fail;
+		return fa_t->cnt_ofdm_fail;
 
 	case PHYDM_INFO_FA_CCK:
-		return p_fa_t->cnt_cck_fail;
+		return fa_t->cnt_cck_fail;
 
 	case PHYDM_INFO_FA_TOTAL:
-		return p_fa_t->cnt_all;
+		return fa_t->cnt_all;
 
 	case PHYDM_INFO_CCA_OFDM:
-		return p_fa_t->cnt_ofdm_cca;
+		return fa_t->cnt_ofdm_cca;
 
 	case PHYDM_INFO_CCA_CCK:
-		return p_fa_t->cnt_cck_cca;
+		return fa_t->cnt_cck_cca;
 
 	case PHYDM_INFO_CCA_ALL:
-		return p_fa_t->cnt_cca_all;
+		return fa_t->cnt_cca_all;
 
 	case PHYDM_INFO_CRC32_OK_VHT:
-		return p_fa_t->cnt_vht_crc32_ok;
+		return fa_t->cnt_vht_crc32_ok;
 
 	case PHYDM_INFO_CRC32_OK_HT:
-		return p_fa_t->cnt_ht_crc32_ok;
+		return fa_t->cnt_ht_crc32_ok;
 
 	case PHYDM_INFO_CRC32_OK_LEGACY:
-		return p_fa_t->cnt_ofdm_crc32_ok;
+		return fa_t->cnt_ofdm_crc32_ok;
 
 	case PHYDM_INFO_CRC32_OK_CCK:
-		return p_fa_t->cnt_cck_crc32_ok;
+		return fa_t->cnt_cck_crc32_ok;
 
 	case PHYDM_INFO_CRC32_ERROR_VHT:
-		return p_fa_t->cnt_vht_crc32_error;
+		return fa_t->cnt_vht_crc32_error;
 
 	case PHYDM_INFO_CRC32_ERROR_HT:
-		return p_fa_t->cnt_ht_crc32_error;
+		return fa_t->cnt_ht_crc32_error;
 
 	case PHYDM_INFO_CRC32_ERROR_LEGACY:
-		return p_fa_t->cnt_ofdm_crc32_error;
+		return fa_t->cnt_ofdm_crc32_error;
 
 	case PHYDM_INFO_CRC32_ERROR_CCK:
-		return p_fa_t->cnt_cck_crc32_error;
+		return fa_t->cnt_cck_crc32_error;
 
 	case PHYDM_INFO_EDCCA_FLAG:
-		return p_fa_t->edcca_flag;
+		return fa_t->edcca_flag;
 
 	case PHYDM_INFO_OFDM_ENABLE:
-		return p_fa_t->ofdm_block_enable;
+		return fa_t->ofdm_block_enable;
 
 	case PHYDM_INFO_CCK_ENABLE:
-		return p_fa_t->cck_block_enable;
+		return fa_t->cck_block_enable;
 
 	case PHYDM_INFO_DBG_PORT_0:
-		return p_fa_t->dbg_port0;
-				
+		return fa_t->dbg_port0;
+
 	case PHYDM_INFO_CRC32_OK_HT_AGG:
-		return p_fa_t->cnt_ht_crc32_ok_agg;
-		
+		return fa_t->cnt_ht_crc32_ok_agg;
+
 	case PHYDM_INFO_CRC32_ERROR_HT_AGG:
-		return p_fa_t->cnt_ht_crc32_error_agg;
-		
-	/*=== [DIG] ================================================*/	
-	
+		return fa_t->cnt_ht_crc32_error_agg;
+
+	/*@=== [DIG] ================================================*/
+
 	case PHYDM_INFO_CURR_IGI:
-		return p_dig_t->cur_ig_value;
+		return dig_t->cur_ig_value;
 
-	/*=== [RSSI] ===============================================*/
+	/*@=== [RSSI] ===============================================*/
 	case PHYDM_INFO_RSSI_MIN:
-		return (u32)p_dm->rssi_min;
-		
+		return (u32)dm->rssi_min;
+
 	case PHYDM_INFO_RSSI_MAX:
-		return (u32)p_dm->rssi_max;
+		return (u32)dm->rssi_max;
 
-	case PHYDM_INFO_CLM_RATIO :
+	case PHYDM_INFO_CLM_RATIO:
 		return (u32)ccx_info->clm_ratio;
-	case PHYDM_INFO_NHM_RATIO :
+	case PHYDM_INFO_NHM_RATIO:
 		return (u32)ccx_info->nhm_ratio;
 	default:
 		return 0xffffffff;
-
 	}
 }
 
-
 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
-void
-odm_init_all_work_items(struct PHY_DM_STRUCT	*p_dm)
+void odm_init_all_work_items(struct dm_struct *dm)
 {
-
-	struct _ADAPTER		*p_adapter = p_dm->adapter;
+	void *adapter = dm->adapter;
 #if USE_WORKITEM
 
-#ifdef CONFIG_DYNAMIC_RX_PATH
-	odm_initialize_work_item(p_dm,
-			 &p_dm->dm_drp_table.phydm_dynamic_rx_path_workitem,
-		 (RT_WORKITEM_CALL_BACK)phydm_dynamic_rx_path_workitem_callback,
-				 (void *)p_adapter,
-				 "DynamicRxPathWorkitem");
-
-#endif
-
 #ifdef CONFIG_ADAPTIVE_SOML
-	odm_initialize_work_item(p_dm,
-			 &p_dm->dm_soml_table.phydm_adaptive_soml_workitem,
-		 (RT_WORKITEM_CALL_BACK)phydm_adaptive_soml_workitem_callback,
-				 (void *)p_adapter,
+	odm_initialize_work_item(dm,
+				 &dm->dm_soml_table.phydm_adaptive_soml_workitem,
+				 (RT_WORKITEM_CALL_BACK)phydm_adaptive_soml_workitem_callback,
+				 (void *)adapter,
 				 "AdaptiveSOMLWorkitem");
 #endif
 
+#ifdef ODM_EVM_ENHANCE_ANTDIV
+	odm_initialize_work_item(dm,
+				 &dm->phydm_evm_antdiv_workitem,
+				 (RT_WORKITEM_CALL_BACK)phydm_evm_antdiv_workitem_callback,
+				 (void *)adapter,
+				 "EvmAntdivWorkitem");
+#endif
+
 #ifdef CONFIG_S0S1_SW_ANTENNA_DIVERSITY
-	odm_initialize_work_item(p_dm,
-		 &p_dm->dm_swat_table.phydm_sw_antenna_switch_workitem,
-			 (RT_WORKITEM_CALL_BACK)odm_sw_antdiv_workitem_callback,
-				 (void *)p_adapter,
+	odm_initialize_work_item(dm,
+				 &dm->dm_swat_table.phydm_sw_antenna_switch_workitem,
+				 (RT_WORKITEM_CALL_BACK)odm_sw_antdiv_workitem_callback,
+				 (void *)adapter,
 				 "AntennaSwitchWorkitem");
 #endif
 #if (defined(CONFIG_HL_SMART_ANTENNA))
-	odm_initialize_work_item(p_dm,
-			 &p_dm->dm_sat_table.hl_smart_antenna_workitem,
-		 (RT_WORKITEM_CALL_BACK)phydm_beam_switch_workitem_callback,
-				 (void *)p_adapter,
+	odm_initialize_work_item(dm,
+				 &dm->dm_sat_table.hl_smart_antenna_workitem,
+				 (RT_WORKITEM_CALL_BACK)phydm_beam_switch_workitem_callback,
+				 (void *)adapter,
 				 "hl_smart_ant_workitem");
 
-	odm_initialize_work_item(p_dm,
-		 &p_dm->dm_sat_table.hl_smart_antenna_decision_workitem,
-		 (RT_WORKITEM_CALL_BACK)phydm_beam_decision_workitem_callback,
-				 (void *)p_adapter,
+	odm_initialize_work_item(dm,
+				 &dm->dm_sat_table.hl_smart_antenna_decision_workitem,
+				 (RT_WORKITEM_CALL_BACK)phydm_beam_decision_workitem_callback,
+				 (void *)adapter,
 				 "hl_smart_ant_decision_workitem");
 #endif
 
 	odm_initialize_work_item(
-		p_dm,
-		&(p_dm->path_div_switch_workitem),
-		(RT_WORKITEM_CALL_BACK)odm_path_div_chk_ant_switch_workitem_callback,
-		(void *)p_adapter,
-		"SWAS_WorkItem");
-
-	odm_initialize_work_item(
-		p_dm,
-		&(p_dm->cck_path_diversity_workitem),
-		(RT_WORKITEM_CALL_BACK)odm_cck_tx_path_diversity_work_item_callback,
-		(void *)p_adapter,
-		"CCKTXPathDiversityWorkItem");
-
-	odm_initialize_work_item(
-		p_dm,
-		&(p_dm->ra_rpt_workitem),
+		dm,
+		&dm->ra_rpt_workitem,
 		(RT_WORKITEM_CALL_BACK)halrf_update_init_rate_work_item_callback,
-		(void *)p_adapter,
+		(void *)adapter,
 		"ra_rpt_workitem");
 
 #if (defined(CONFIG_5G_CG_SMART_ANT_DIVERSITY)) || (defined(CONFIG_2G_CG_SMART_ANT_DIVERSITY))
 	odm_initialize_work_item(
-		p_dm,
-		&(p_dm->fast_ant_training_workitem),
+		dm,
+		&dm->fast_ant_training_workitem,
 		(RT_WORKITEM_CALL_BACK)odm_fast_ant_training_work_item_callback,
-		(void *)p_adapter,
+		(void *)adapter,
 		"fast_ant_training_workitem");
 #endif
 
 #endif /*#if USE_WORKITEM*/
 
-#if (BEAMFORMING_SUPPORT == 1)
+#ifdef PHYDM_BEAMFORMING_SUPPORT
 	odm_initialize_work_item(
-		p_dm,
-		&(p_dm->beamforming_info.txbf_info.txbf_enter_work_item),
+		dm,
+		&dm->beamforming_info.txbf_info.txbf_enter_work_item,
 		(RT_WORKITEM_CALL_BACK)hal_com_txbf_enter_work_item_callback,
-		(void *)p_adapter,
+		(void *)adapter,
 		"txbf_enter_work_item");
 
 	odm_initialize_work_item(
-		p_dm,
-		&(p_dm->beamforming_info.txbf_info.txbf_leave_work_item),
+		dm,
+		&dm->beamforming_info.txbf_info.txbf_leave_work_item,
 		(RT_WORKITEM_CALL_BACK)hal_com_txbf_leave_work_item_callback,
-		(void *)p_adapter,
+		(void *)adapter,
 		"txbf_leave_work_item");
 
 	odm_initialize_work_item(
-		p_dm,
-		&(p_dm->beamforming_info.txbf_info.txbf_fw_ndpa_work_item),
+		dm,
+		&dm->beamforming_info.txbf_info.txbf_fw_ndpa_work_item,
 		(RT_WORKITEM_CALL_BACK)hal_com_txbf_fw_ndpa_work_item_callback,
-		(void *)p_adapter,
+		(void *)adapter,
 		"txbf_fw_ndpa_work_item");
 
 	odm_initialize_work_item(
-		p_dm,
-		&(p_dm->beamforming_info.txbf_info.txbf_clk_work_item),
+		dm,
+		&dm->beamforming_info.txbf_info.txbf_clk_work_item,
 		(RT_WORKITEM_CALL_BACK)hal_com_txbf_clk_work_item_callback,
-		(void *)p_adapter,
+		(void *)adapter,
 		"txbf_clk_work_item");
 
 	odm_initialize_work_item(
-		p_dm,
-		&(p_dm->beamforming_info.txbf_info.txbf_rate_work_item),
+		dm,
+		&dm->beamforming_info.txbf_info.txbf_rate_work_item,
 		(RT_WORKITEM_CALL_BACK)hal_com_txbf_rate_work_item_callback,
-		(void *)p_adapter,
+		(void *)adapter,
 		"txbf_rate_work_item");
 
 	odm_initialize_work_item(
-		p_dm,
-		&(p_dm->beamforming_info.txbf_info.txbf_status_work_item),
+		dm,
+		&dm->beamforming_info.txbf_info.txbf_status_work_item,
 		(RT_WORKITEM_CALL_BACK)hal_com_txbf_status_work_item_callback,
-		(void *)p_adapter,
+		(void *)adapter,
 		"txbf_status_work_item");
 
 	odm_initialize_work_item(
-		p_dm,
-		&(p_dm->beamforming_info.txbf_info.txbf_reset_tx_path_work_item),
+		dm,
+		&dm->beamforming_info.txbf_info.txbf_reset_tx_path_work_item,
 		(RT_WORKITEM_CALL_BACK)hal_com_txbf_reset_tx_path_work_item_callback,
-		(void *)p_adapter,
+		(void *)adapter,
 		"txbf_reset_tx_path_work_item");
 
 	odm_initialize_work_item(
-		p_dm,
-		&(p_dm->beamforming_info.txbf_info.txbf_get_tx_rate_work_item),
+		dm,
+		&dm->beamforming_info.txbf_info.txbf_get_tx_rate_work_item,
 		(RT_WORKITEM_CALL_BACK)hal_com_txbf_get_tx_rate_work_item_callback,
-		(void *)p_adapter,
+		(void *)adapter,
 		"txbf_get_tx_rate_work_item");
 #endif
 
-	odm_initialize_work_item(
-		p_dm,
-		&(p_dm->adaptivity.phydm_pause_edcca_work_item),
-		(RT_WORKITEM_CALL_BACK)phydm_pause_edcca_work_item_callback,
-		(void *)p_adapter,
-		"phydm_pause_edcca_work_item");
-
-	odm_initialize_work_item(
-		p_dm,
-		&(p_dm->adaptivity.phydm_resume_edcca_work_item),
-		(RT_WORKITEM_CALL_BACK)phydm_resume_edcca_work_item_callback,
-		(void *)p_adapter,
-		"phydm_resume_edcca_work_item");
-
 #if (PHYDM_LA_MODE_SUPPORT == 1)
 	odm_initialize_work_item(
-		p_dm,
-		&(p_dm->adcsmp.adc_smp_work_item),
+		dm,
+		&dm->adcsmp.adc_smp_work_item,
 		(RT_WORKITEM_CALL_BACK)adc_smp_work_item_callback,
-		(void *)p_adapter,
+		(void *)adapter,
 		"adc_smp_work_item");
 
 	odm_initialize_work_item(
-		p_dm,
-		&(p_dm->adcsmp.adc_smp_work_item_1),
+		dm,
+		&dm->adcsmp.adc_smp_work_item_1,
 		(RT_WORKITEM_CALL_BACK)adc_smp_work_item_callback,
-		(void *)p_adapter,
+		(void *)adapter,
 		"adc_smp_work_item_1");
 #endif
-
 }
 
-void
-odm_free_all_work_items(struct PHY_DM_STRUCT	*p_dm)
+void odm_free_all_work_items(struct dm_struct *dm)
 {
 #if USE_WORKITEM
 
 #ifdef CONFIG_S0S1_SW_ANTENNA_DIVERSITY
-	odm_free_work_item(&(p_dm->dm_swat_table.phydm_sw_antenna_switch_workitem));
-#endif
-
-#ifdef CONFIG_DYNAMIC_RX_PATH
-	odm_free_work_item(&(p_dm->dm_drp_table.phydm_dynamic_rx_path_workitem));
+	odm_free_work_item(&dm->dm_swat_table.phydm_sw_antenna_switch_workitem);
 #endif
 
 #ifdef CONFIG_ADAPTIVE_SOML
-	odm_free_work_item(&(p_dm->dm_soml_table.phydm_adaptive_soml_workitem));
+	odm_free_work_item(&dm->dm_soml_table.phydm_adaptive_soml_workitem);
 #endif
 
+#ifdef ODM_EVM_ENHANCE_ANTDIV
+	odm_free_work_item(&dm->phydm_evm_antdiv_workitem);
+#endif
 
 #if (defined(CONFIG_HL_SMART_ANTENNA))
-	odm_free_work_item(&(p_dm->dm_sat_table.hl_smart_antenna_workitem));
-	odm_free_work_item(&(p_dm->dm_sat_table.hl_smart_antenna_decision_workitem));
+	odm_free_work_item(&dm->dm_sat_table.hl_smart_antenna_workitem);
+	odm_free_work_item(&dm->dm_sat_table.hl_smart_antenna_decision_workitem);
 #endif
 
-	odm_free_work_item(&(p_dm->path_div_switch_workitem));
-	odm_free_work_item(&(p_dm->cck_path_diversity_workitem));
 #if (defined(CONFIG_5G_CG_SMART_ANT_DIVERSITY)) || (defined(CONFIG_2G_CG_SMART_ANT_DIVERSITY))
-	odm_free_work_item(&(p_dm->fast_ant_training_workitem));
+	odm_free_work_item(&dm->fast_ant_training_workitem);
 #endif
-	odm_free_work_item(&(p_dm->ra_rpt_workitem));
-	/*odm_free_work_item((&p_dm->sbdcnt_workitem));*/
+	odm_free_work_item(&dm->ra_rpt_workitem);
+/*odm_free_work_item((&dm->sbdcnt_workitem));*/
 #endif
 
-#if (BEAMFORMING_SUPPORT == 1)
-	odm_free_work_item((&p_dm->beamforming_info.txbf_info.txbf_enter_work_item));
-	odm_free_work_item((&p_dm->beamforming_info.txbf_info.txbf_leave_work_item));
-	odm_free_work_item((&p_dm->beamforming_info.txbf_info.txbf_fw_ndpa_work_item));
-	odm_free_work_item((&p_dm->beamforming_info.txbf_info.txbf_clk_work_item));
-	odm_free_work_item((&p_dm->beamforming_info.txbf_info.txbf_rate_work_item));
-	odm_free_work_item((&p_dm->beamforming_info.txbf_info.txbf_status_work_item));
-	odm_free_work_item((&p_dm->beamforming_info.txbf_info.txbf_reset_tx_path_work_item));
-	odm_free_work_item((&p_dm->beamforming_info.txbf_info.txbf_get_tx_rate_work_item));
+#ifdef PHYDM_BEAMFORMING_SUPPORT
+	odm_free_work_item((&dm->beamforming_info.txbf_info.txbf_enter_work_item));
+	odm_free_work_item((&dm->beamforming_info.txbf_info.txbf_leave_work_item));
+	odm_free_work_item((&dm->beamforming_info.txbf_info.txbf_fw_ndpa_work_item));
+	odm_free_work_item((&dm->beamforming_info.txbf_info.txbf_clk_work_item));
+	odm_free_work_item((&dm->beamforming_info.txbf_info.txbf_rate_work_item));
+	odm_free_work_item((&dm->beamforming_info.txbf_info.txbf_status_work_item));
+	odm_free_work_item((&dm->beamforming_info.txbf_info.txbf_reset_tx_path_work_item));
+	odm_free_work_item((&dm->beamforming_info.txbf_info.txbf_get_tx_rate_work_item));
 #endif
 
-	odm_free_work_item((&p_dm->adaptivity.phydm_pause_edcca_work_item));
-	odm_free_work_item((&p_dm->adaptivity.phydm_resume_edcca_work_item));
-
 #if (PHYDM_LA_MODE_SUPPORT == 1)
-	odm_free_work_item((&p_dm->adcsmp.adc_smp_work_item));
-	odm_free_work_item((&p_dm->adcsmp.adc_smp_work_item_1));
+	odm_free_work_item((&dm->adcsmp.adc_smp_work_item));
+	odm_free_work_item((&dm->adcsmp.adc_smp_work_item_1));
 #endif
-
 }
 #endif /*#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)*/
 
-void
-odm_init_all_timers(
-	struct PHY_DM_STRUCT	*p_dm
-)
+void odm_init_all_timers(struct dm_struct *dm)
 {
 #if (defined(CONFIG_PHYDM_ANTENNA_DIVERSITY))
-	odm_ant_div_timers(p_dm, INIT_ANTDIV_TIMMER);
+	odm_ant_div_timers(dm, INIT_ANTDIV_TIMMER);
+#endif
+#if (defined(PHYDM_TDMA_DIG_SUPPORT))
+#ifdef IS_USE_NEW_TDMA
+	phydm_tdma_dig_timers(dm, INIT_TDMA_DIG_TIMMER);
+#endif
+#endif
+#ifdef CONFIG_ADAPTIVE_SOML
+	phydm_adaptive_soml_timers(dm, INIT_SOML_TIMMER);
 #endif
-
-	phydm_adaptive_soml_timers(p_dm, INIT_SOML_TIMMER);
-
 #ifdef PHYDM_LNA_SAT_CHK_SUPPORT
-	phydm_lna_sat_chk_timers(p_dm, INIT_LNA_SAT_CHK_TIMMER);
+#ifdef PHYDM_LNA_SAT_CHK_TYPE1
+	phydm_lna_sat_chk_timers(dm, INIT_LNA_SAT_CHK_TIMMER);
 #endif
-
-#ifdef CONFIG_DYNAMIC_RX_PATH
-	phydm_dynamic_rx_path_timers(p_dm, INIT_DRP_TIMMER);
 #endif
 
 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
-	odm_initialize_timer(p_dm, &p_dm->path_div_switch_timer,
-		(void *)odm_path_div_chk_ant_switch_callback, NULL, "PathDivTimer");
-	odm_initialize_timer(p_dm, &p_dm->cck_path_diversity_timer,
-		(void *)odm_cck_tx_path_diversity_callback, NULL, "cck_path_diversity_timer");
-	odm_initialize_timer(p_dm, &p_dm->sbdcnt_timer,
+	odm_initialize_timer(dm, &dm->sbdcnt_timer,
 			     (void *)phydm_sbd_callback, NULL, "SbdTimer");
-#if (BEAMFORMING_SUPPORT == 1)
-	odm_initialize_timer(p_dm, &p_dm->beamforming_info.txbf_info.txbf_fw_ndpa_timer,
-		(void *)hal_com_txbf_fw_ndpa_timer_callback, NULL, "txbf_fw_ndpa_timer");
+#ifdef PHYDM_BEAMFORMING_SUPPORT
+	odm_initialize_timer(dm, &dm->beamforming_info.txbf_info.txbf_fw_ndpa_timer,
+			     (void *)hal_com_txbf_fw_ndpa_timer_callback, NULL,
+			     "txbf_fw_ndpa_timer");
 #endif
 #endif
 
 #if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_CE))
-#if (BEAMFORMING_SUPPORT == 1)
-	odm_initialize_timer(p_dm, &p_dm->beamforming_info.beamforming_timer,
-		(void *)beamforming_sw_timer_callback, NULL, "beamforming_timer");
+#ifdef PHYDM_BEAMFORMING_SUPPORT
+	odm_initialize_timer(dm, &dm->beamforming_info.beamforming_timer,
+			     (void *)beamforming_sw_timer_callback, NULL,
+			     "beamforming_timer");
 #endif
 #endif
 }
 
-void
-odm_cancel_all_timers(
-	struct PHY_DM_STRUCT	*p_dm
-)
+void odm_cancel_all_timers(struct dm_struct *dm)
 {
 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
-	/*  */
-	/* 2012/01/12 MH Temp BSOD fix. We need to find NIC allocate mem fail reason in */
-	/* win7 platform. */
-	/*  */
-	HAL_ADAPTER_STS_CHK(p_dm);
+	/* @2012/01/12 MH Temp BSOD fix. We need to find NIC allocate mem fail reason in win7*/
+	if (dm->adapter == NULL)
+		return;
 #endif
 
 #if (defined(CONFIG_PHYDM_ANTENNA_DIVERSITY))
-	odm_ant_div_timers(p_dm, CANCEL_ANTDIV_TIMMER);
+	odm_ant_div_timers(dm, CANCEL_ANTDIV_TIMMER);
+#endif
+#ifdef PHYDM_TDMA_DIG_SUPPORT
+#ifdef IS_USE_NEW_TDMA
+	phydm_tdma_dig_timers(dm, CANCEL_TDMA_DIG_TIMMER);
+#endif
+#endif
+#ifdef CONFIG_ADAPTIVE_SOML
+	phydm_adaptive_soml_timers(dm, CANCEL_SOML_TIMMER);
 #endif
-
-	phydm_adaptive_soml_timers(p_dm, CANCEL_SOML_TIMMER);
-
 #ifdef PHYDM_LNA_SAT_CHK_SUPPORT
-	phydm_lna_sat_chk_timers(p_dm, CANCEL_LNA_SAT_CHK_TIMMER);
+#ifdef PHYDM_LNA_SAT_CHK_TYPE1
+	phydm_lna_sat_chk_timers(dm, CANCEL_LNA_SAT_CHK_TIMMER);
 #endif
-
-
-#ifdef CONFIG_DYNAMIC_RX_PATH
-	phydm_dynamic_rx_path_timers(p_dm, CANCEL_DRP_TIMMER);
 #endif
 
 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
-	odm_cancel_timer(p_dm, &p_dm->path_div_switch_timer);
-	odm_cancel_timer(p_dm, &p_dm->cck_path_diversity_timer);
-	odm_cancel_timer(p_dm, &p_dm->sbdcnt_timer);
-#if (BEAMFORMING_SUPPORT == 1)
-	odm_cancel_timer(p_dm, &p_dm->beamforming_info.txbf_info.txbf_fw_ndpa_timer);
+	odm_cancel_timer(dm, &dm->sbdcnt_timer);
+#ifdef PHYDM_BEAMFORMING_SUPPORT
+	odm_cancel_timer(dm, &dm->beamforming_info.txbf_info.txbf_fw_ndpa_timer);
 #endif
 #endif
 
 #if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_CE))
-#if (BEAMFORMING_SUPPORT == 1)
-	odm_cancel_timer(p_dm, &p_dm->beamforming_info.beamforming_timer);
+#ifdef PHYDM_BEAMFORMING_SUPPORT
+	odm_cancel_timer(dm, &dm->beamforming_info.beamforming_timer);
 #endif
 #endif
-
 }
 
-
-void
-odm_release_all_timers(
-	struct PHY_DM_STRUCT	*p_dm
-)
+void odm_release_all_timers(struct dm_struct *dm)
 {
 #if (defined(CONFIG_PHYDM_ANTENNA_DIVERSITY))
-	odm_ant_div_timers(p_dm, RELEASE_ANTDIV_TIMMER);
+	odm_ant_div_timers(dm, RELEASE_ANTDIV_TIMMER);
+#endif
+#ifdef PHYDM_TDMA_DIG_SUPPORT
+#ifdef IS_USE_NEW_TDMA
+	phydm_tdma_dig_timers(dm, RELEASE_TDMA_DIG_TIMMER);
+#endif
+#endif
+#ifdef CONFIG_ADAPTIVE_SOML
+	phydm_adaptive_soml_timers(dm, RELEASE_SOML_TIMMER);
 #endif
-	phydm_adaptive_soml_timers(p_dm, RELEASE_SOML_TIMMER);
-
 #ifdef PHYDM_LNA_SAT_CHK_SUPPORT
-	phydm_lna_sat_chk_timers(p_dm, RELEASE_LNA_SAT_CHK_TIMMER);
+#ifdef PHYDM_LNA_SAT_CHK_TYPE1
+	phydm_lna_sat_chk_timers(dm, RELEASE_LNA_SAT_CHK_TIMMER);
 #endif
-
-#ifdef CONFIG_DYNAMIC_RX_PATH
-	phydm_dynamic_rx_path_timers(p_dm, RELEASE_DRP_TIMMER);
 #endif
 
 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
-	odm_release_timer(p_dm, &p_dm->path_div_switch_timer);
-	odm_release_timer(p_dm, &p_dm->cck_path_diversity_timer);
-	odm_release_timer(p_dm, &p_dm->sbdcnt_timer);
-#if (BEAMFORMING_SUPPORT == 1)
-	odm_release_timer(p_dm, &p_dm->beamforming_info.txbf_info.txbf_fw_ndpa_timer);
+	odm_release_timer(dm, &dm->sbdcnt_timer);
+#ifdef PHYDM_BEAMFORMING_SUPPORT
+	odm_release_timer(dm, &dm->beamforming_info.txbf_info.txbf_fw_ndpa_timer);
 #endif
 #endif
 
 #if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_CE))
-#if (BEAMFORMING_SUPPORT == 1)
-	odm_release_timer(p_dm, &p_dm->beamforming_info.beamforming_timer);
+#ifdef PHYDM_BEAMFORMING_SUPPORT
+	odm_release_timer(dm, &dm->beamforming_info.beamforming_timer);
 #endif
 #endif
 }
 
-
-/* 3============================================================
- * 3 Tx Power Tracking
- * 3============================================================ */
-
-
-
-
 #if (DM_ODM_SUPPORT_TYPE == ODM_AP)
-void
-odm_init_all_threads(
-	struct PHY_DM_STRUCT	*p_dm
-)
+void odm_init_all_threads(
+	struct dm_struct *dm)
 {
 #ifdef TPT_THREAD
-	k_tpt_task_init(p_dm->priv);
+	k_tpt_task_init(dm->priv);
 #endif
 }
 
-void
-odm_stop_all_threads(
-	struct PHY_DM_STRUCT	*p_dm
-)
+void odm_stop_all_threads(
+	struct dm_struct *dm)
 {
 #ifdef TPT_THREAD
-	k_tpt_task_stop(p_dm->priv);
+	k_tpt_task_stop(dm->priv);
 #endif
 }
 #endif
 
 #if (DM_ODM_SUPPORT_TYPE == ODM_CE)
-/* Justin: According to the current RRSI to adjust Response Frame TX power, 2012/11/05 */
-void odm_dtc(struct PHY_DM_STRUCT *p_dm)
+/* @Justin: According to the current RRSI to adjust Response Frame TX power,
+ * 2012/11/05
+ */
+void odm_dtc(struct dm_struct *dm)
 {
 #ifdef CONFIG_DM_RESP_TXAGC
-#define DTC_BASE            35	/* RSSI higher than this value, start to decade TX power */
-#define DTC_DWN_BASE       (DTC_BASE-5)	/* RSSI lower than this value, start to increase TX power */
+/* RSSI higher than this value, start to decade TX power */
+#define DTC_BASE 35
+
+/* RSSI lower than this value, start to increase TX power */
+#define DTC_DWN_BASE (DTC_BASE - 5)
 
 	/* RSSI vs TX power step mapping: decade TX power */
 	static const u8 dtc_table_down[] = {
@@ -2817,8 +2908,7 @@ void odm_dtc(struct PHY_DM_STRUCT *p_dm)
 		(DTC_BASE + 10),
 		(DTC_BASE + 15),
 		(DTC_BASE + 20),
-		(DTC_BASE + 25)
-	};
+		(DTC_BASE + 25)};
 
 	/* RSSI vs TX power step mapping: increase TX power */
 	static const u8 dtc_table_up[] = {
@@ -2832,8 +2922,7 @@ void odm_dtc(struct PHY_DM_STRUCT *p_dm)
 		(DTC_DWN_BASE - 25),
 		(DTC_DWN_BASE - 25),
 		(DTC_DWN_BASE - 30),
-		(DTC_DWN_BASE - 35)
-	};
+		(DTC_DWN_BASE - 35)};
 
 	u8 i;
 	u8 dtc_steps = 0;
@@ -2841,28 +2930,28 @@ void odm_dtc(struct PHY_DM_STRUCT *p_dm)
 	u8 resp_txagc = 0;
 
 #if 0
-	/* As DIG is disabled, DTC is also disable */
-	if (!(p_dm->support_ability & ODM_XXXXXX))
+	/* @As DIG is disabled, DTC is also disable */
+	if (!(dm->support_ability & ODM_XXXXXX))
 		return;
 #endif
 
-	if (p_dm->rssi_min > DTC_BASE) {
+	if (dm->rssi_min > DTC_BASE) {
 		/* need to decade the CTS TX power */
 		sign = 1;
 		for (i = 0; i < ARRAY_SIZE(dtc_table_down); i++) {
-			if ((dtc_table_down[i] >= p_dm->rssi_min) || (dtc_steps >= 6))
+			if (dtc_table_down[i] >= dm->rssi_min || dtc_steps >= 6)
 				break;
 			else
 				dtc_steps++;
 		}
 	}
 #if 0
-	else if (p_dm->rssi_min > DTC_DWN_BASE) {
+	else if (dm->rssi_min > DTC_DWN_BASE) {
 		/* needs to increase the CTS TX power */
 		sign = 0;
 		dtc_steps = 1;
 		for (i = 0; i < ARRAY_SIZE(dtc_table_up); i++) {
-			if ((dtc_table_up[i] <= p_dm->rssi_min) || (dtc_steps >= 10))
+			if (dtc_table_up[i] <= dm->rssi_min || dtc_steps >= 10)
 				break;
 			else
 				dtc_steps++;
@@ -2876,191 +2965,303 @@ void odm_dtc(struct PHY_DM_STRUCT *p_dm)
 
 	resp_txagc = dtc_steps | (sign << 4);
 	resp_txagc = resp_txagc | (resp_txagc << 5);
-	odm_write_1byte(p_dm, 0x06d9, resp_txagc);
+	odm_write_1byte(dm, 0x06d9, resp_txagc);
 
-	PHYDM_DBG(p_dm, ODM_COMP_PWR_TRAIN, ("%s rssi_min:%u, set RESP_TXAGC to %s %u\n",
-		__func__, p_dm->rssi_min, sign ? "minus" : "plus", dtc_steps));
-#endif /* CONFIG_RESP_TXAGC_ADJUST */
+	PHYDM_DBG(dm, ODM_COMP_PWR_TRAIN,
+		  "%s rssi_min:%u, set RESP_TXAGC to %s %u\n", __func__,
+		  dm->rssi_min, sign ? "minus" : "plus", dtc_steps);
+#endif /* @CONFIG_RESP_TXAGC_ADJUST */
 }
 
-#endif /* #if (DM_ODM_SUPPORT_TYPE == ODM_CE) */
-
+#endif /* @#if (DM_ODM_SUPPORT_TYPE == ODM_CE) */
 
-/*<20170126, BB-Kevin>8188F D-CUT DC cancellation and 8821C*/
-void
-phydm_dc_cancellation(
-	struct PHY_DM_STRUCT	*p_dm
-
-)
-{	
+/*@<20170126, BB-Kevin>8188F D-CUT DC cancellation and 8821C*/
+void phydm_dc_cancellation(struct dm_struct *dm)
+{
 #ifdef PHYDM_DC_CANCELLATION
-	u32		offset_i_hex[ODM_RF_PATH_MAX] = {0};
-	u32		offset_q_hex[ODM_RF_PATH_MAX] = {0};
-	u32		reg_value32[ODM_RF_PATH_MAX] = {0};
-	u8		path = RF_PATH_A;
+	u32 offset_i_hex[PHYDM_MAX_RF_PATH] = {0};
+	u32 offset_q_hex[PHYDM_MAX_RF_PATH] = {0};
+	u32 reg_value32[PHYDM_MAX_RF_PATH] = {0};
+	u8 path = RF_PATH_A;
+	u8 set_result;
 
-	if (!(p_dm->support_ic_type & ODM_DC_CANCELLATION_SUPPORT))
+	if (!(dm->support_ic_type & ODM_DC_CANCELLATION_SUPPORT))
 		return;
-
-	if ((p_dm->support_ic_type & ODM_RTL8188F) && (p_dm->cut_version < ODM_CUT_D))
+	if ((dm->support_ic_type & ODM_RTL8188F) &&
+	    dm->cut_version < ODM_CUT_D)
+		return;
+	if ((dm->support_ic_type & ODM_RTL8192F) &&
+	    dm->cut_version == ODM_CUT_A)
 		return;
 
-	/*DC_Estimation (only for 2x2 ic now) */
+	PHYDM_DBG(dm, ODM_COMP_API, "%s ======>\n", __func__);
 
-	for (path = RF_PATH_A; path < ODM_RF_PATH_MAX; path++) {
-		if (p_dm->support_ic_type & (ODM_RTL8188F | ODM_RTL8710B)) {
-			if (!phydm_set_bb_dbg_port(p_dm,
-				BB_DBGPORT_PRIORITY_2, 0x235)) {/*set debug port to 0x235*/
-				PHYDM_DBG(p_dm, ODM_COMP_API,
-					("[DC Cancellation] Set Debug port Fail"));
+	/*@DC_Estimation (only for 2x2 ic now) */
+
+	for (path = RF_PATH_A; path < PHYDM_MAX_RF_PATH; path++) {
+		if (path > RF_PATH_A &&
+		    dm->support_ic_type & (ODM_RTL8821C | ODM_RTL8188F |
+					  ODM_RTL8710B | ODM_RTL8721D))
+			break;
+		else if (path > RF_PATH_B &&
+			 dm->support_ic_type & (ODM_RTL8822B | ODM_RTL8192F))
+			break;
+		if (phydm_stop_ic_trx(dm, PHYDM_SET) == PHYDM_SET_FAIL) {
+			PHYDM_DBG(dm, ODM_COMP_API, "STOP_TRX_FAIL\n");
+			return;
+		}
+		odm_write_dig(dm, 0x7e);
+		/*@Disable LNA*/
+		if (dm->support_ic_type & ODM_RTL8821C)
+			halrf_rf_lna_setting(dm, HALRF_LNA_DISABLE);
+		/*Turn off 3-wire*/
+		phydm_stop_3_wire(dm, PHYDM_SET);
+		if (dm->support_ic_type & (ODM_RTL8188F | ODM_RTL8710B)) {
+			/*set debug port to 0x235*/
+			if (!phydm_set_bb_dbg_port(dm, DBGPORT_PRI_1, 0x235)) {
+				PHYDM_DBG(dm, ODM_COMP_API,
+					  "Set Debug port Fail\n");
+				return;
+			}
+		} else if (dm->support_ic_type & ODM_RTL8721D) {
+			/*set debug port to 0x200*/
+			if (!phydm_set_bb_dbg_port(dm, DBGPORT_PRI_2, 0x200)) {
+				PHYDM_DBG(dm, ODM_COMP_API,
+					  "Set Debug port Fail\n");
 				return;
 			}
-		} else if (p_dm->support_ic_type & (ODM_RTL8821C | ODM_RTL8822B)) {
-			if (!phydm_set_bb_dbg_port(p_dm, BB_DBGPORT_PRIORITY_2, 0x200)) {
+		} else if (dm->support_ic_type & ODM_RTL8821C) {
+			if (!phydm_set_bb_dbg_port(dm, DBGPORT_PRI_1, 0x200)) {
 				/*set debug port to 0x200*/
-				PHYDM_DBG(p_dm, ODM_COMP_API,
-					("[DC Cancellation] Set Debug port Fail"));
+				PHYDM_DBG(dm, ODM_COMP_API,
+					  "Set Debug port Fail\n");
 				return;
 			}
-			phydm_bb_dbg_port_header_sel(p_dm, 0x0);
-			if (p_dm->rf_type > RF_1T1R) {
-				if (!phydm_set_bb_dbg_port(p_dm, BB_DBGPORT_PRIORITY_2, 0x202)) {
-					/*set debug port to 0x200*/
-					PHYDM_DBG(p_dm, ODM_COMP_API,
-						("[DC Cancellation] Set Debug port Fail"));
-					return;
-				}
-				phydm_bb_dbg_port_header_sel(p_dm, 0x0);
+			phydm_bb_dbg_port_header_sel(dm, 0x0);
+		} else if (dm->support_ic_type & ODM_RTL8822B) {
+			if (path == RF_PATH_A &&
+			    !phydm_set_bb_dbg_port(dm, DBGPORT_PRI_1, 0x200)) {
+				/*set debug port to 0x200*/
+				PHYDM_DBG(dm, ODM_COMP_API,
+					  "Set Debug port Fail\n");
+				return;
+			}
+			if (path == RF_PATH_B &&
+			    !phydm_set_bb_dbg_port(dm, DBGPORT_PRI_1, 0x202)) {
+				/*set debug port to 0x200*/
+				PHYDM_DBG(dm, ODM_COMP_API,
+					  "Set Debug port Fail\n");
+				return;
+			}
+			phydm_bb_dbg_port_header_sel(dm, 0x0);
+		} else if (dm->support_ic_type & ODM_RTL8192F) {
+			if (path == RF_PATH_A &&
+			    !phydm_set_bb_dbg_port(dm, DBGPORT_PRI_1, 0x235)) {
+				/*set debug port to 0x235*/
+				PHYDM_DBG(dm, ODM_COMP_API,
+					  "Set Debug port Fail\n");
+				return;
+			}
+			if (path == RF_PATH_B &&
+			    !phydm_set_bb_dbg_port(dm, DBGPORT_PRI_1, 0x23d)) {
+				/*set debug port to 0x23d*/
+				PHYDM_DBG(dm, ODM_COMP_API,
+					  "Set Debug port Fail\n");
+				return;
 			}
 		}
-	
-		odm_write_dig(p_dm, 0x7E);
-	
-		if (p_dm->support_ic_type & ODM_IC_11N_SERIES)
-			odm_set_bb_reg(p_dm, 0x88c, BIT(21)|BIT(20), 0x3);
-		else {
-			odm_set_bb_reg(p_dm, 0xc00, BIT(1)|BIT(0), 0x0);
-			if (p_dm->rf_type > RF_1T1R)
-				odm_set_bb_reg(p_dm, 0xe00, BIT(1)|BIT(0), 0x0);
-		}
-		odm_set_bb_reg(p_dm, 0xa78, MASKBYTE1, 0x0); /*disable CCK DCNF*/
-	
-		PHYDM_DBG(p_dm, ODM_COMP_API, ("DC cancellation Begin!!!"));
-	
-		phydm_stop_ck320(p_dm, true);	/*stop ck320*/
+
+		/*@disable CCK DCNF*/
+		odm_set_bb_reg(dm, R_0xa78, MASKBYTE1, 0x0);
+
+		PHYDM_DBG(dm, ODM_COMP_API, "DC cancellation Begin!!!\n");
+
+		phydm_stop_ck320(dm, true); /*stop ck320*/
 
 		/* the same debug port both for path-a and path-b*/
-		reg_value32[path] = phydm_get_bb_dbg_port_value(p_dm);
+		reg_value32[path] = phydm_get_bb_dbg_port_val(dm);
 
-		phydm_stop_ck320(p_dm, false);	/*start ck320*/
+		phydm_stop_ck320(dm, false); /*start ck320*/
 
-		if (p_dm->support_ic_type & ODM_IC_11N_SERIES) {
-			odm_set_bb_reg(p_dm, 0x88c, BIT(21)|BIT(20), 0x0);
-		} else {
-			odm_set_bb_reg(p_dm, 0xc00, BIT(1)|BIT(0), 0x3);
-			odm_set_bb_reg(p_dm, 0xe00, BIT(1)|BIT(0), 0x3);
-		}
-		odm_write_dig(p_dm, 0x20);
-		phydm_release_bb_dbg_port(p_dm);
+		phydm_release_bb_dbg_port(dm);
+		/* @Turn on 3-wire*/
+		phydm_stop_3_wire(dm, PHYDM_REVERT);
+		/* @Enable LNA*/
+		if (dm->support_ic_type & ODM_RTL8821C)
+			halrf_rf_lna_setting(dm, HALRF_LNA_ENABLE);
+
+		odm_write_dig(dm, 0x20);
+
+		set_result = phydm_stop_ic_trx(dm, PHYDM_REVERT);
 
-		PHYDM_DBG(p_dm, ODM_COMP_API, ("DC cancellation OK!!!"));
+		PHYDM_DBG(dm, ODM_COMP_API, "DC cancellation OK!!!\n");
 	}
-		
-	/*DC_Cancellation*/
-	odm_set_bb_reg(p_dm, 0xa9c, BIT(20), 0x1); /*DC compensation to CCK data path*/
-	if (p_dm->support_ic_type & (ODM_RTL8188F | ODM_RTL8710B)) {
+
+	/*@DC_Cancellation*/
+	/*@DC compensation to CCK data path*/
+	odm_set_bb_reg(dm, R_0xa9c, BIT(20), 0x1);
+	if (dm->support_ic_type & (ODM_RTL8188F | ODM_RTL8710B)) {
 		offset_i_hex[0] = (reg_value32[0] & 0xffc0000) >> 18;
 		offset_q_hex[0] = (reg_value32[0] & 0x3ff00) >> 8;
 
-		/*Before filling into registers, offset should be multiplexed (-1)*/
-		offset_i_hex[0] = (offset_i_hex[0] >= 0x200) ? (0x400 - offset_i_hex[1]) : (0x1ff - offset_i_hex[1]);
-		offset_q_hex[0] = (offset_q_hex[0] >= 0x200) ? (0x400 - offset_q_hex[1]) : (0x1ff - offset_q_hex[1]);
-
-		odm_set_bb_reg(p_dm, 0x950, 0x1ff, offset_i_hex[1]);
-		odm_set_bb_reg(p_dm, 0x950, 0x1ff0000, offset_q_hex[1]);
-	} else if (p_dm->support_ic_type & (ODM_RTL8821C | ODM_RTL8822B)) {
-	
+		/*@Before filling into registers,
+		 *offset should be multiplexed (-1)
+		 */
+		offset_i_hex[0] = (offset_i_hex[0] >= 0x200) ?
+				  (0x400 - offset_i_hex[0]) :
+				  (0x1ff - offset_i_hex[0]);
+		offset_q_hex[0] = (offset_q_hex[0] >= 0x200) ?
+				  (0x400 - offset_q_hex[0]) :
+				  (0x1ff - offset_q_hex[0]);
+
+		odm_set_bb_reg(dm, R_0x950, 0x1ff, offset_i_hex[0]);
+		odm_set_bb_reg(dm, R_0x950, 0x1ff0000, offset_q_hex[0]);
+	} else if (dm->support_ic_type & (ODM_RTL8821C | ODM_RTL8822B)) {
 		/* Path-a */
 		offset_i_hex[0] = (reg_value32[0] & 0xffc00) >> 10;
 		offset_q_hex[0] = reg_value32[0] & 0x3ff;
 
-		/*Before filling into registers, offset should be multiplexed (-1)*/
+		/*@Before filling into registers,
+		 *offset should be multiplexed (-1)
+		 */
 		offset_i_hex[0] = 0x400 - offset_i_hex[0];
 		offset_q_hex[0] = 0x400 - offset_q_hex[0];
 
-		odm_set_bb_reg(p_dm, 0xc10, 0x3c000000, ((0x3c0 & offset_i_hex[0]) >> 6));
-		odm_set_bb_reg(p_dm, 0xc10, 0xfc00, (0x3f & offset_i_hex[0]));
-		odm_set_bb_reg(p_dm, 0xc14, 0x3c000000, ((0x3c0 & offset_q_hex[0]) >> 6));
-		odm_set_bb_reg(p_dm, 0xc14, 0xfc00, (0x3f & offset_q_hex[0]));
+		odm_set_bb_reg(dm, R_0xc10, 0x3c000000,
+			       (0x3c0 & offset_i_hex[0]) >> 6);
+		odm_set_bb_reg(dm, R_0xc10, 0xfc00, 0x3f & offset_i_hex[0]);
+		odm_set_bb_reg(dm, R_0xc14, 0x3c000000,
+			       (0x3c0 & offset_q_hex[0]) >> 6);
+		odm_set_bb_reg(dm, R_0xc14, 0xfc00, 0x3f & offset_q_hex[0]);
 
 		/* Path-b */
-		if (p_dm->rf_type > RF_1T1R) {
-			
+		if (dm->rf_type > RF_1T1R) {
 			offset_i_hex[1] = (reg_value32[1] & 0xffc00) >> 10;
 			offset_q_hex[1] = reg_value32[1] & 0x3ff;
 
-		/*Before filling into registers, offset should be multiplexed (-1)*/
+			/*@Before filling into registers,
+			 *offset should be multiplexed (-1)
+			 */
 			offset_i_hex[1] = 0x400 - offset_i_hex[1];
 			offset_q_hex[1] = 0x400 - offset_q_hex[1];
 
-			odm_set_bb_reg(p_dm, 0xe10, 0x3c000000, ((0x3c0 & offset_i_hex[1]) >> 6));
-			odm_set_bb_reg(p_dm, 0xe10, 0xfc00, (0x3f & offset_i_hex[1]));
-			odm_set_bb_reg(p_dm, 0xe14, 0x3c000000, ((0x3c0 & offset_q_hex[1]) >> 6));
-			odm_set_bb_reg(p_dm, 0xe14, 0xfc00, (0x3f & offset_q_hex[1]));
+			odm_set_bb_reg(dm, R_0xe10, 0x3c000000,
+				       (0x3c0 & offset_i_hex[1]) >> 6);
+			odm_set_bb_reg(dm, R_0xe10, 0xfc00,
+				       0x3f & offset_i_hex[1]);
+			odm_set_bb_reg(dm, R_0xe14, 0x3c000000,
+				       (0x3c0 & offset_q_hex[1]) >> 6);
+			odm_set_bb_reg(dm, R_0xe14, 0xfc00,
+				       0x3f & offset_q_hex[1]);
+		}
+	} else if (dm->support_ic_type & (ODM_RTL8192F)) {
+		/* Path-a I:df4[27:18],Q:df4[17:8]*/
+		offset_i_hex[0] = (reg_value32[0] & 0xffc0000) >> 18;
+		offset_q_hex[0] = (reg_value32[0] & 0x3ff00) >> 8;
+
+		/*@Before filling into registers,
+		 *offset should be multiplexed (-1)
+		 */
+		offset_i_hex[0] = (offset_i_hex[0] >= 0x200) ?
+				  (0x400 - offset_i_hex[0]) :
+				  (0xff - offset_i_hex[0]);
+		offset_q_hex[0] = (offset_q_hex[0] >= 0x200) ?
+				  (0x400 - offset_q_hex[0]) :
+				  (0xff - offset_q_hex[0]);
+		/*Path-a I:c10[7:0],Q:c10[15:8]*/
+		odm_set_bb_reg(dm, R_0xc10, 0xff, offset_i_hex[0]);
+		odm_set_bb_reg(dm, R_0xc10, 0xff00, offset_q_hex[0]);
+
+		/* Path-b */
+		if (dm->rf_type > RF_1T1R) {
+			/* @I:df4[27:18],Q:df4[17:8]*/
+			offset_i_hex[1] = (reg_value32[1] & 0xffc0000) >> 18;
+			offset_q_hex[1] = (reg_value32[1] & 0x3ff00) >> 8;
+
+			/*@Before filling into registers,
+			 *offset should be multiplexed (-1)
+			 */
+			offset_i_hex[1] = (offset_i_hex[1] >= 0x200) ?
+					  (0x400 - offset_i_hex[1]) :
+					  (0xff - offset_i_hex[1]);
+			offset_q_hex[1] = (offset_q_hex[1] >= 0x200) ?
+					  (0x400 - offset_q_hex[1]) :
+					  (0xff - offset_q_hex[1]);
+			/*Path-b I:c18[7:0],Q:c18[15:8]*/
+			odm_set_bb_reg(dm, R_0xc18, 0xff, offset_i_hex[1]);
+			odm_set_bb_reg(dm, R_0xc18, 0xff00, offset_q_hex[1]);
 		}
+	} else if (dm->support_ic_type & (ODM_RTL8721D)) {
+	 /*judy modified 20180517*/
+		offset_i_hex[0] = (reg_value32[0] & 0xff800) >> 11;
+		offset_q_hex[0] = (reg_value32[0] & 0x3fe) >> 1;
+
+		/*@Before filling into registers,
+		 *offset should be multiplexed (-1)
+		 */
+		offset_i_hex[0] = 0x200 - offset_i_hex[0];
+		offset_q_hex[0] = 0x200 - offset_q_hex[0];
+
+		odm_set_bb_reg(dm, R_0x950, 0x1ff, offset_i_hex[0]);
+		odm_set_bb_reg(dm, R_0x950, 0x1ff0000, offset_q_hex[0]);
 	}
 #endif
 }
 
-void
-phydm_receiver_blocking(
-	void *p_dm_void
-)
+void phydm_receiver_blocking(void *dm_void)
 {
 #ifdef CONFIG_RECEIVER_BLOCKING
-	struct PHY_DM_STRUCT		*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	u32	channel = *p_dm->p_channel;
-	u8	bw = *p_dm->p_band_width;
-	u32	bb_regf0 = odm_get_bb_reg(p_dm, 0xf0, MASKDWORD);
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	u32 chnl = *dm->channel;
+	u8 bw = *dm->band_width;
+	u32 bb_regf0 = odm_get_bb_reg(dm, R_0xf0, 0xf000);
 
-	if (!(p_dm->support_ic_type & ODM_RECEIVER_BLOCKING_SUPPORT))
+	if (!(dm->support_ic_type & ODM_RECEIVER_BLOCKING_SUPPORT) ||
+	    !(dm->support_ability & ODM_BB_ADAPTIVITY))
 		return;
 
-	if ((p_dm->support_ic_type & ODM_RTL8188E && ((bb_regf0 & 0xf000) >> 12) < 8) ||
-		p_dm->support_ic_type & ODM_RTL8192E) { /*8188E_T version*/
-		if (p_dm->consecutive_idlel_time > 10 && *p_dm->p_mp_mode == false && p_dm->adaptivity_enable == true) {
-			if ((bw == CHANNEL_WIDTH_20) && (channel == 1)) {
-				phydm_nbi_setting(p_dm, FUNC_ENABLE, channel, 20, 2410, PHYDM_DONT_CARE);
-				p_dm->is_receiver_blocking_en = true;
-			} else if ((bw == CHANNEL_WIDTH_20) && (channel == 13)) {
-				phydm_nbi_setting(p_dm, FUNC_ENABLE, channel, 20, 2473, PHYDM_DONT_CARE);
-				p_dm->is_receiver_blocking_en = true;
-			} else if (p_dm->is_receiver_blocking_en && channel != 1 && channel != 13) {
-				phydm_nbi_enable(p_dm, FUNC_DISABLE);
-				odm_set_bb_reg(p_dm, 0xc40, 0x1f000000, 0x1f);
-				p_dm->is_receiver_blocking_en = false;
-			}
-			return;
+	if ((dm->support_ic_type & ODM_RTL8188E && bb_regf0 < 8) ||
+	    dm->support_ic_type & ODM_RTL8192E) {
+	    /*@8188E_T version*/
+		if (dm->consecutive_idlel_time <= 10 || *dm->mp_mode)
+			goto end;
+
+		if (bw == CHANNEL_WIDTH_20 && chnl == 1) {
+			phydm_nbi_setting(dm, FUNC_ENABLE, chnl, 20, 2410,
+					  PHYDM_DONT_CARE);
+			dm->is_rx_blocking_en = true;
+		} else if ((bw == CHANNEL_WIDTH_20) && (chnl == 13)) {
+			phydm_nbi_setting(dm, FUNC_ENABLE, chnl, 20, 2473,
+					  PHYDM_DONT_CARE);
+			dm->is_rx_blocking_en = true;
+		} else if (dm->is_rx_blocking_en && chnl != 1 && chnl != 13) {
+			phydm_nbi_enable(dm, FUNC_DISABLE);
+			odm_set_bb_reg(dm, R_0xc40, 0x1f000000, 0x1f);
+			dm->is_rx_blocking_en = false;
 		}
-	} else if ((p_dm->support_ic_type & ODM_RTL8188E && ((bb_regf0 & 0xf000) >> 12) >= 8)) { /*8188E_S version*/
-		if (p_dm->consecutive_idlel_time > 10 && *p_dm->p_mp_mode == false && p_dm->adaptivity_enable == true) {
-			if ((bw == CHANNEL_WIDTH_20) && (channel == 13)) {
-				phydm_nbi_setting(p_dm, FUNC_ENABLE, channel, 20, 2473, PHYDM_DONT_CARE);
-				p_dm->is_receiver_blocking_en = true;
-			} else if (p_dm->is_receiver_blocking_en && channel != 13) {
-				phydm_nbi_enable(p_dm, FUNC_DISABLE);
-				odm_set_bb_reg(p_dm, 0xc40, 0x1f000000, 0x1f);
-				p_dm->is_receiver_blocking_en = false;
-			}
-			return;
+		return;
+	} else if ((dm->support_ic_type & ODM_RTL8188E && bb_regf0 >= 8)) {
+	/*@8188E_S version*/
+		if (dm->consecutive_idlel_time <= 10 || *dm->mp_mode)
+			goto end;
+
+		if (bw == CHANNEL_WIDTH_20 && chnl == 13) {
+			phydm_nbi_setting(dm, FUNC_ENABLE, chnl, 20, 2473,
+					  PHYDM_DONT_CARE);
+			dm->is_rx_blocking_en = true;
+		} else if (dm->is_rx_blocking_en && chnl != 13) {
+			phydm_nbi_enable(dm, FUNC_DISABLE);
+			odm_set_bb_reg(dm, R_0xc40, 0x1f000000, 0x1f);
+			dm->is_rx_blocking_en = false;
 		}
+		return;
 	}
 
-	if (p_dm->is_receiver_blocking_en) {
-		phydm_nbi_enable(p_dm, FUNC_DISABLE);
-		odm_set_bb_reg(p_dm, 0xc40, 0x1f000000, 0x1f);
-		p_dm->is_receiver_blocking_en = false;
+end:
+	if (dm->is_rx_blocking_en) {
+		phydm_nbi_enable(dm, FUNC_DISABLE);
+		odm_set_bb_reg(dm, R_0xc40, 0x1f000000, 0x1f);
+		dm->is_rx_blocking_en = false;
 	}
-
 #endif
 }
diff --git a/rtl8723DS/hal/phydm/phydm.h b/rtl8723DS/hal/phydm/phydm.h
index e7abfb3..d1dabb4 100755..100644
--- a/rtl8723DS/hal/phydm/phydm.h
+++ b/rtl8723DS/hal/phydm/phydm.h
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2007 - 2017 Realtek Corporation.
+ * Copyright(c) 2007 - 2017  Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -8,51 +8,93 @@
  *
  * This program is distributed in the hope that it will be useful, but WITHOUT
  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  * more details.
  *
+ * The full GNU General Public License is included in this distribution in the
+ * file called LICENSE.
+ *
+ * Contact Information:
+ * wlanfae <wlanfae@realtek.com>
+ * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
+ * Hsinchu 300, Taiwan.
+ *
+ * Larry Finger <Larry.Finger@lwfinger.net>
+ *
  *****************************************************************************/
 
-
-#ifndef	__HALDMOUTSRC_H__
+#ifndef __HALDMOUTSRC_H__
 #define __HALDMOUTSRC_H__
 
-/*============================================================*/
-/*include files*/
-/*============================================================*/
+/*@============================================================*/
+/*@include files*/
+/*@============================================================*/
 /*PHYDM header*/
 #include "phydm_pre_define.h"
+#include "phydm_features.h"
 #include "phydm_dig.h"
+#ifdef CONFIG_PATH_DIVERSITY
 #include "phydm_pathdiv.h"
+#endif
+#ifdef CONFIG_PHYDM_ANTENNA_DIVERSITY
 #include "phydm_antdiv.h"
+#endif
+
 #include "phydm_soml.h"
+
+#ifdef CONFIG_SMART_ANTENNA
 #include "phydm_smt_ant.h"
+#endif
+#ifdef CONFIG_ANT_DETECTION
 #include "phydm_antdect.h"
+#endif
 #include "phydm_rainfo.h"
+#ifdef CONFIG_DYNAMIC_TX_TWR
 #include "phydm_dynamictxpower.h"
+#endif
 #include "phydm_cfotracking.h"
-#include "phydm_acs.h"
 #include "phydm_adaptivity.h"
 #include "phydm_dfs.h"
 #include "phydm_ccx.h"
 #include "txbf/phydm_hal_txbf_api.h"
+#if (PHYDM_LA_MODE_SUPPORT == 1)
 #include "phydm_adc_sampling.h"
-#include "phydm_dynamic_rx_path.h"
+#endif
+#ifdef CONFIG_PSD_TOOL
 #include "phydm_psd.h"
+#endif
+#ifdef PHYDM_PRIMARY_CCA
 #include "phydm_primary_cca.h"
+#endif
 #include "phydm_cck_pd.h"
 #include "phydm_rssi_monitor.h"
+#ifdef PHYDM_AUTO_DEGBUG
 #include "phydm_auto_dbg.h"
+#endif
 #include "phydm_math_lib.h"
 #include "phydm_noisemonitor.h"
 #include "phydm_api.h"
+#ifdef PHYDM_POWER_TRAINING_SUPPORT
 #include "phydm_pow_train.h"
-#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE))
+#endif
+#ifdef PHYDM_LNA_SAT_CHK_SUPPORT
+#include "phydm_lna_sat.h"
+#endif
+#ifdef PHYDM_PMAC_TX_SETTING_SUPPORT
+#include "phydm_pmac_tx_setting.h"
+#endif
+#ifdef PHYDM_MP_SUPPORT
+#include "phydm_mp.h"
+#endif
+#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_CE))
 	#include "phydm_beamforming.h"
 #endif
 
-/*HALRF header*/
+#include "phydm_regtable.h"
+
+/*@HALRF header*/
 #include "halrf/halrf_iqk.h"
+#include "halrf/halrf_dpk.h"
 #include "halrf/halrf.h"
 #include "halrf/halrf_powertracking.h"
 #if (DM_ODM_SUPPORT_TYPE & (ODM_AP))
@@ -61,24 +103,88 @@
 	#include "halrf/halphyrf_ce.h"
 #elif (DM_ODM_SUPPORT_TYPE & (ODM_WIN))
 	#include "halrf/halphyrf_win.h"
+#elif(DM_ODM_SUPPORT_TYPE & (ODM_IOT))
+	#include "halrf/halphyrf_iot.h"
 #endif
 
-extern const u16 phy_rate_table[28];
+extern const u16	phy_rate_table[28];
 
-/*============================================================*/
-/*Definition */
-/*============================================================*/
+/*@============================================================*/
+/*@Definition */
+/*@============================================================*/
 
 /* Traffic load decision */
-#define	TRAFFIC_ULTRA_LOW	1
+#define TRAFFIC_NO_TP			0
+#define	TRAFFIC_ULTRA_LOW		1
 #define	TRAFFIC_LOW			2
 #define	TRAFFIC_MID			3
 #define	TRAFFIC_HIGH			4
 
-#define	NONE			0
+#define	NONE				0
+
+#if defined(DM_ODM_CE_MAC80211)
+#define MAX_2(x, y)					\
+	__max2(typeof(x), typeof(y),			\
+	      x, y)
+#define __max2(t1, t2, x, y) ({		\
+	t1 m80211_max1 = (x);					\
+	t2 m80211_max2 = (y);					\
+	m80211_max1 > m80211_max2 ? m80211_max1 : m80211_max2; })
+
+#define MIN_2(x, y)					\
+	__min2(typeof(x), typeof(y),			\
+	      x, y)
+#define __min2(t1, t2, x, y) ({		\
+	t1 m80211_min1 = (x);					\
+	t2 m80211_min2 = (y);					\
+	m80211_min1 < m80211_min2 ? m80211_min1 : m80211_min2; })
+
+#define DIFF_2(x, y)					\
+	__diff2(typeof(x), typeof(y),			\
+	      x, y)
+#define __diff2(t1, t2, x, y) ({		\
+	t1 __d1 = (x);					\
+	t2 __d2 = (y);					\
+	(__d1 >= __d2) ? (__d1 - __d2) : (__d2 - __d1); })
+#else
+#define MAX_2(_x_, _y_)	(((_x_) > (_y_)) ? (_x_) : (_y_))
+#define MIN_2(_x_, _y_)	(((_x_) < (_y_)) ? (_x_) : (_y_))
+#define DIFF_2(_x_, _y_)	((_x_ >= _y_) ? (_x_ - _y_) : (_y_ - _x_))
+#endif
+
+#define IS_GREATER(_x_, _y_)	(((_x_) >= (_y_)) ? true : false)
+#define IS_LESS(_x_, _y_)	(((_x_) < (_y_)) ? true : false)
 
-#define MAX_2(_x_, _y_)	(((_x_)>(_y_))? (_x_) : (_y_))
-#define MIN_2(_x_, _y_)	(((_x_)<(_y_))? (_x_) : (_y_))
+#if defined(DM_ODM_CE_MAC80211)
+#define BYTE_DUPLICATE_2_DWORD(B0) ({	\
+	u32 __b_dup = (B0);\
+	(((__b_dup) << 24) | ((__b_dup) << 16) | ((__b_dup) << 8) | (__b_dup));\
+	})
+#else
+#define BYTE_DUPLICATE_2_DWORD(B0)	\
+	(((B0) << 24) | ((B0) << 16) | ((B0) << 8) | (B0))
+#endif
+#define BYTE_2_DWORD(B3, B2, B1, B0)	\
+	(((B3) << 24) | ((B2) << 16) | ((B1) << 8) | (B0))
+#define BIT_2_BYTE(B3, B2, B1, B0)	\
+	(((B3) << 3) | ((B2) << 2) | ((B1) << 1) | (B0))
+
+/*@For cmn sta info*/
+#if defined(DM_ODM_CE_MAC80211)
+#define is_sta_active(sta) ({	\
+	struct cmn_sta_info *__sta = (sta);	\
+	((__sta) && (__sta->dm_ctrl & STA_DM_CTRL_ACTIVE));	\
+	})
+
+#define IS_FUNC_EN(name) ({	\
+	u8 *__is_func_name = (name);	\
+	(__is_func_name) && (*__is_func_name);	\
+	})
+#else
+#define is_sta_active(sta)	((sta) && (sta->dm_ctrl & STA_DM_CTRL_ACTIVE))
+
+#define IS_FUNC_EN(name)	((name) && (*name))
+#endif
 
 #if (DM_ODM_SUPPORT_TYPE == ODM_AP)
 	#define PHYDM_WATCH_DOG_PERIOD	1 /*second*/
@@ -86,116 +192,168 @@ extern const u16 phy_rate_table[28];
 	#define PHYDM_WATCH_DOG_PERIOD	2 /*second*/
 #endif
 
-/*============================================================*/
+#define PHY_HIST_SIZE		12
+
+/*@============================================================*/
 /*structure and define*/
-/*============================================================*/
+/*@============================================================*/
+
+#define		dm_type_by_fw		0
+#define		dm_type_by_driver	1
+
+#ifdef BB_RAM_SUPPORT
+
+struct phydm_bb_ram_per_sta {
+	/* @Reg0x1E84 for RAM I/O*/
+	boolean			hw_igi_en;
+	boolean			tx_pwr_offset0_en;
+	boolean			tx_pwr_offset1_en;
+	/* @ macid from 0 to 63, above 63 => mapping to 63*/
+	u8			macid_addr;
+	/* @hw_igi value for paths after packet Tx in a period of time*/
+	u8			hw_igi;
+	/* @tx_pwr_offset0 offset for Tx power index*/
+	s8			tx_pwr_offset0;
+	s8			tx_pwr_offset1;
+
+};
 
-#define		dm_type_by_fw			0
-#define		dm_type_by_driver		1
+struct phydm_bb_ram_ctrl {
+	/*@ For 98F/14B/22C/12F, each TxAGC step will be 0.25dB*/
+	struct phydm_bb_ram_per_sta pram_sta_ctrl[ODM_ASSOCIATE_ENTRY_NUM];
+	/*------------ For table2 do not set power offset by macid --------*/
+	/* For type == 2'b10, 0x1e70[22:16] = tx_pwr_offset_reg0, 0x1e70[23] = enable */
+	boolean			tx_pwr_offset_reg0_en;
+	u8			tx_pwr_offset_reg0;
+	/* For type == 2'b11, 0x1e70[30:24] = tx_pwr_offset_reg1, 0x1e70[31] = enable */
+	boolean			tx_pwr_offset_reg1_en;
+	u8			tx_pwr_offset_reg1;
+};
+
+#endif
 
 struct phydm_phystatus_statistic {
-	
-	/*[CCK]*/
-	u32		rssi_cck_sum;
-	u32		rssi_cck_cnt;
-	/*[OFDM]*/	
-	u32		rssi_ofdm_sum;
-	u32		rssi_ofdm_cnt;
-	u32		evm_ofdm_sum;
-	u32		snr_ofdm_sum;
-	/*[1SS]*/
-	u32		rssi_1ss_cnt;
-	u32		rssi_1ss_sum;
-	u32		evm_1ss_sum;
-	u32		snr_1ss_sum;
-	/*[2SS]*/
+	/*@[CCK]*/
+	u32			rssi_cck_sum;
+	u32			rssi_cck_cnt;
+	/*@[OFDM]*/
+	u32			rssi_ofdm_sum;
+	u32			rssi_ofdm_cnt;
+	u32			evm_ofdm_sum;
+	u32			snr_ofdm_sum;
+	u16			evm_ofdm_hist[PHY_HIST_SIZE];
+	u16			snr_ofdm_hist[PHY_HIST_SIZE];
+	/*@[1SS]*/
+	u32			rssi_1ss_cnt;
+	u32			rssi_1ss_sum;
+	u32			evm_1ss_sum;
+	u32			snr_1ss_sum;
+	u16			evm_1ss_hist[PHY_HIST_SIZE];
+	u16			snr_1ss_hist[PHY_HIST_SIZE];
+	/*@[2SS]*/
 	#if (defined(PHYDM_COMPILE_ABOVE_2SS))
-	u32		rssi_2ss_cnt;
-	u32		rssi_2ss_sum[2];
-	u32		evm_2ss_sum[2];
-	u32		snr_2ss_sum[2];
+	u32			rssi_2ss_cnt;
+	u32			rssi_2ss_sum[2];
+	u32			evm_2ss_sum[2];
+	u32			snr_2ss_sum[2];
+	u16			evm_2ss_hist[2][PHY_HIST_SIZE];
+	u16			snr_2ss_hist[2][PHY_HIST_SIZE];
 	#endif
-	/*[3SS]*/
+	/*@[3SS]*/
 	#if (defined(PHYDM_COMPILE_ABOVE_3SS))
-	u32		rssi_3ss_cnt;
-	u32		rssi_3ss_sum[3];
-	u32		evm_3ss_sum[3];
-	u32		snr_3ss_sum[3];
+	u32			rssi_3ss_cnt;
+	u32			rssi_3ss_sum[3];
+	u32			evm_3ss_sum[3];
+	u32			snr_3ss_sum[3];
+	u16			evm_3ss_hist[3][PHY_HIST_SIZE];
+	u16			snr_3ss_hist[3][PHY_HIST_SIZE];
 	#endif
-	/*[4SS]*/
+	/*@[4SS]*/
 	#if (defined(PHYDM_COMPILE_ABOVE_4SS))
-	u32		rssi_4ss_cnt;
-	u32		rssi_4ss_sum[4];
-	u32		evm_4ss_sum[4];	
-	u32		snr_4ss_sum[4];
+	u32			rssi_4ss_cnt;
+	u32			rssi_4ss_sum[4];
+	u32			evm_4ss_sum[4];
+	u32			snr_4ss_sum[4];
+	u16			evm_4ss_hist[4][PHY_HIST_SIZE];
+	u16			snr_4ss_hist[4][PHY_HIST_SIZE];
 	#endif
 };
 
 struct phydm_phystatus_avg {
-	
-	/*[CCK]*/
-	u8		rssi_cck_avg;
-	/*[OFDM]*/
-	u8		rssi_ofdm_avg;
-	u8		evm_ofdm_avg;
-	u8		snr_ofdm_avg;
-	/*[1SS]*/
-	u8		rssi_1ss_avg;
-	u8		evm_1ss_avg;
-	u8		snr_1ss_avg;
-	/*[2SS]*/
+	/*@[CCK]*/
+	u8			rssi_cck_avg;
+	/*@[OFDM]*/
+	u8			rssi_ofdm_avg;
+	u8			evm_ofdm_avg;
+	u8			snr_ofdm_avg;
+	/*@[1SS]*/
+	u8			rssi_1ss_avg;
+	u8			evm_1ss_avg;
+	u8			snr_1ss_avg;
+	/*@[2SS]*/
 	#if (defined(PHYDM_COMPILE_ABOVE_2SS))
-	u8		rssi_2ss_avg[2];
-	u8		evm_2ss_avg[2];
-	u8		snr_2ss_avg[2];
+	u8			rssi_2ss_avg[2];
+	u8			evm_2ss_avg[2];
+	u8			snr_2ss_avg[2];
 	#endif
-	/*[3SS]*/
+	/*@[3SS]*/
 	#if (defined(PHYDM_COMPILE_ABOVE_3SS))
-	u8		rssi_3ss_avg[3];
-	u8		evm_3ss_avg[3];
-	u8		snr_3ss_avg[3];
+	u8			rssi_3ss_avg[3];
+	u8			evm_3ss_avg[3];
+	u8			snr_3ss_avg[3];
 	#endif
-	/*[4SS]*/
+	/*@[4SS]*/
 	#if (defined(PHYDM_COMPILE_ABOVE_4SS))
-	u8		rssi_4ss_avg[4];
-	u8		evm_4ss_avg[4];	
-	u8		snr_4ss_avg[4];
+	u8			rssi_4ss_avg[4];
+	u8			evm_4ss_avg[4];
+	u8			snr_4ss_avg[4];
 	#endif
 };
 
-struct _odm_phy_dbg_info_ {
-	/*ODM Write,debug info*/
-	s8		rx_snr_db[4];
-	u32		num_qry_phy_status;
-	u32		num_qry_phy_status_cck;
-	u32		num_qry_phy_status_ofdm;
-#if (ODM_PHY_STATUS_NEW_TYPE_SUPPORT == 1)
-	u32		num_qry_mu_pkt;
-	u32		num_qry_bf_pkt;
-	u32		num_qry_mu_vht_pkt[40];
-	boolean	is_ldpc_pkt;
-	boolean	is_stbc_pkt;
-	u8		num_of_ppdu[4];
-	u8		gid_num[4];
+struct odm_phy_dbg_info {
+	/*@ODM Write,debug info*/
+	u32			num_qry_phy_status_cck;
+	u32			num_qry_phy_status_ofdm;
+#if (ODM_PHY_STATUS_NEW_TYPE_SUPPORT == 1) || (defined(PHYSTS_3RD_TYPE_SUPPORT))
+	u32			num_qry_mu_pkt;
+	u32			num_qry_bf_pkt;
+	u16			num_mu_vht_pkt[VHT_RATE_NUM];
+	boolean			is_ldpc_pkt;
+	boolean			is_stbc_pkt;
+	u8			num_of_ppdu[4];
+	u8			gid_num[4];
 #endif
-	u8		num_qry_beacon_pkt;
-	/* Others */
-	s32		rx_evm[4];
-
-	u16		num_qry_legacy_pkt[LEGACY_RATE_NUM];
-	u16		num_qry_ht_pkt[HT_RATE_NUM];
-	u8		ht_pkt_not_zero;
-	#if	ODM_IC_11AC_SERIES_SUPPORT
-	u16		num_qry_vht_pkt[VHT_RATE_NUM];
-	u8		vht_pkt_not_zero;
+	u32			condi_num; /*@condition number U(18,4)*/
+	u8			condi_num_cdf[CN_CNT_MAX];
+	u8			num_qry_beacon_pkt;
+	u8			beacon_cnt_in_period; /*@beacon cnt within watchdog period*/
+	u8			beacon_phy_rate;
+	u8			show_phy_sts_all_pkt;	/*@Show phy status witch not match BSSID*/
+	u16			show_phy_sts_max_cnt;	/*@show number of phy-status row data per PHYDM watchdog*/
+	u16			show_phy_sts_cnt;
+	u16			num_qry_legacy_pkt[LEGACY_RATE_NUM];
+	u16			num_qry_ht_pkt[HT_RATE_NUM];
+	u16			num_qry_pkt_sc_20m[LOW_BW_RATE_NUM]; /*@20M SC*/
+	boolean			ht_pkt_not_zero;
+	boolean			low_bw_20_occur;
+	#if ODM_IC_11AC_SERIES_SUPPORT || defined(PHYDM_IC_JGR3_SERIES_SUPPORT)
+	u16			num_qry_vht_pkt[VHT_RATE_NUM];
+	u16			num_qry_pkt_sc_40m[LOW_BW_RATE_NUM]; /*@40M SC*/
+	boolean			vht_pkt_not_zero;
+	boolean			low_bw_40_occur;
+	#endif
+	u16			snr_hist_th[PHY_HIST_SIZE - 1];
+	u16			evm_hist_th[PHY_HIST_SIZE - 1];
+	#ifdef PHYDM_IC_JGR3_SERIES_SUPPORT
+	s16 cfo_tail[4]; /* per-path's cfo_tail */
 	#endif
-	struct phydm_phystatus_statistic	phystatus_statistic_info;
+	struct phydm_phystatus_statistic	physts_statistic_info;
 	struct phydm_phystatus_avg	phystatus_statistic_avg;
 };
 
-enum odm_cmninfo_e {
-	/*Fixed value*/
-	/*-----------HOOK BEFORE REG INIT-----------*/
+enum odm_cmninfo {
+	/*@Fixed value*/
+	/*@-----------HOOK BEFORE REG INIT-----------*/
 	ODM_CMNINFO_PLATFORM = 0,
 	ODM_CMNINFO_ABILITY,
 	ODM_CMNINFO_INTERFACE,
@@ -203,6 +361,8 @@ enum odm_cmninfo_e {
 	ODM_CMNINFO_IC_TYPE,
 	ODM_CMNINFO_CUT_VER,
 	ODM_CMNINFO_FAB_VER,
+	ODM_CMNINFO_FW_VER,
+	ODM_CMNINFO_FW_SUB_VER,
 	ODM_CMNINFO_RF_TYPE,
 	ODM_CMNINFO_RFE_TYPE,
 	ODM_CMNINFO_DPK_EN,
@@ -216,6 +376,7 @@ enum odm_cmninfo_e {
 	ODM_CMNINFO_APA,
 	ODM_CMNINFO_GLNA,
 	ODM_CMNINFO_ALNA,
+	ODM_CMNINFO_TDMA,
 	ODM_CMNINFO_EXT_TRSW,
 	ODM_CMNINFO_EXT_LNA_GAIN,
 	ODM_CMNINFO_PATCH_ID,
@@ -223,8 +384,6 @@ enum odm_cmninfo_e {
 	ODM_CMNINFO_BWIFI_TEST,
 	ODM_CMNINFO_SMART_CONCURRENT,
 	ODM_CMNINFO_CONFIG_BB_RF,
-	ODM_CMNINFO_DOMAIN_CODE_2G,
-	ODM_CMNINFO_DOMAIN_CODE_5G,
 	ODM_CMNINFO_IQKPAOFF,
 	ODM_CMNINFO_HUBUSBMODE,
 	ODM_CMNINFO_FWDWRSVDPAGEINPROGRESS,
@@ -237,13 +396,14 @@ enum odm_cmninfo_e {
 	ODM_CMNINFO_EFUSE0X3D8,
 	ODM_CMNINFO_EFUSE0X3D7,
 	ODM_CMNINFO_SOFT_AP_SPECIAL_SETTING,
+	ODM_CMNINFO_X_CAP_SETTING,
 	ODM_CMNINFO_ADVANCE_OTA,
 	ODM_CMNINFO_HP_HWID,
-	/*-----------HOOK BEFORE REG INIT-----------*/
+	/*@-----------HOOK BEFORE REG INIT-----------*/
 
-	/*Dynamic value:*/
+	/*@Dynamic value:*/
 
-	/*--------- POINTER REFERENCE-----------*/
+	/*@--------- POINTER REFERENCE-----------*/
 	ODM_CMNINFO_TX_UNI,
 	ODM_CMNINFO_RX_UNI,
 	ODM_CMNINFO_BAND,
@@ -253,6 +413,8 @@ enum odm_cmninfo_e {
 	ODM_CMNINFO_CHNL,
 	ODM_CMNINFO_FORCED_RATE,
 	ODM_CMNINFO_ANT_DIV,
+	ODM_CMNINFO_PATH_DIV,
+	ODM_CMNINFO_ADAPTIVE_SOML,
 	ODM_CMNINFO_ADAPTIVITY,
 	ODM_CMNINFO_SCAN,
 	ODM_CMNINFO_POWER_SAVING,
@@ -274,9 +436,9 @@ enum odm_cmninfo_e {
 	ODM_CMNINFO_INTERRUPT_MASK,
 	ODM_CMNINFO_BB_OPERATION_MODE,
 	ODM_CMNINFO_BF_ANTDIV_DECISION,
-	/*--------- POINTER REFERENCE-----------*/
+	/*@--------- POINTER REFERENCE-----------*/
 
-	/*------------CALL BY VALUE-------------*/
+	/*@------------CALL BY VALUE-------------*/
 	ODM_CMNINFO_WIFI_DIRECT,
 	ODM_CMNINFO_WIFI_DISPLAY,
 	ODM_CMNINFO_LINK_IN_PROGRESS,
@@ -286,7 +448,6 @@ enum odm_cmninfo_e {
 	ODM_CMNINFO_RSSI_MIN,
 	ODM_CMNINFO_RSSI_MIN_BY_PATH,
 	ODM_CMNINFO_DBG_COMP,
-	ODM_CMNINFO_DBG_LEVEL,
 	ODM_CMNINFO_RA_THRESHOLD_HIGH,	/*to be removed*/
 	ODM_CMNINFO_RA_THRESHOLD_LOW,	/*to be removed*/
 	ODM_CMNINFO_RF_ANTENNA_TYPE,
@@ -301,34 +462,34 @@ enum odm_cmninfo_e {
 	ODM_CMNINFO_POWER_TRAINING,
 	ODM_CMNINFO_DFS_REGION_DOMAIN,
 	ODM_CMNINFO_BT_CONTINUOUS_TURN,
-	/*------------CALL BY VALUE-------------*/
+	/*@------------CALL BY VALUE-------------*/
 
-	/*Dynamic ptr array hook itms.*/
+	/*@Dynamic ptr array hook itms.*/
 	ODM_CMNINFO_STA_STATUS,
 	ODM_CMNINFO_MAX,
 
 };
 
 enum phydm_rfe_bb_source_sel {
-	PAPE_2G	= 0,
-	PAPE_5G	= 1,
-	LNA0N_2G	= 2,
-	LNAON_5G	= 3,
-	TRSW		= 4,
-	TRSW_B		= 5,
-	GNT_BT		= 6,
-	ZERO		= 7,
-	ANTSEL_0	= 8,
-	ANTSEL_1	= 9,
-	ANTSEL_2	= 0xa,
-	ANTSEL_3	= 0xb,
-	ANTSEL_4	= 0xc,
-	ANTSEL_5	= 0xd,
-	ANTSEL_6	= 0xe,
-	ANTSEL_7	= 0xf
+	PAPE_2G			= 0,
+	PAPE_5G			= 1,
+	LNA0N_2G		= 2,
+	LNAON_5G		= 3,
+	TRSW			= 4,
+	TRSW_B			= 5,
+	GNT_BT			= 6,
+	ZERO			= 7,
+	ANTSEL_0		= 8,
+	ANTSEL_1		= 9,
+	ANTSEL_2		= 0xa,
+	ANTSEL_3		= 0xb,
+	ANTSEL_4		= 0xc,
+	ANTSEL_5		= 0xd,
+	ANTSEL_6		= 0xe,
+	ANTSEL_7		= 0xf
 };
 
-enum phydm_info_query_e {
+enum phydm_info_query {
 	PHYDM_INFO_FA_OFDM,
 	PHYDM_INFO_FA_CCK,
 	PHYDM_INFO_FA_TOTAL,
@@ -356,25 +517,23 @@ enum phydm_info_query_e {
 	PHYDM_INFO_NHM_RATIO,
 };
 
-enum phydm_api_e {
-
-	PHYDM_API_NBI			= 1,
-	PHYDM_API_CSI_MASK,
-
+enum phydm_api {
+	PHYDM_API_NBI		= 1,
+	PHYDM_API_CSI_MASK	= 2,
 };
 
-enum phydm_func_idx_e { /*F_XXX = PHYDM XXX function*/
+enum phydm_func_idx { /*@F_XXX = PHYDM XXX function*/
 
 	F00_DIG			= 0,
 	F01_RA_MASK		= 1,
 	F02_DYN_TXPWR		= 2,
-	F03_FA_CNT			= 3,
+	F03_FA_CNT		= 3,
 	F04_RSSI_MNTR		= 4,
-	F05_CCK_PD			= 5,
+	F05_CCK_PD		= 5,
 	F06_ANT_DIV		= 6,
 	F07_SMT_ANT		= 7,
 	F08_PWR_TRAIN		= 8,
-	F09_RA				= 9,
+	F09_RA			= 9,
 	F10_PATH_DIV		= 10,
 	F11_DFS			= 11,
 	F12_DYN_ARFR		= 12,
@@ -382,176 +541,202 @@ enum phydm_func_idx_e { /*F_XXX = PHYDM XXX function*/
 	F14_CFO_TRK		= 14,
 	F15_ENV_MNTR		= 15,
 	F16_PRI_CCA		= 16,
-	F17_ADPTV_SOML	= 17,
-	F18_LNA_SAT_CHK = 18,
-	/*BIT18*/
-	/*BIT19*/
-	F20_DYN_RX_PATH	= 20
+	F17_ADPTV_SOML		= 17,
+	F18_LNA_SAT_CHK		= 18,
 };
 
-/*=[PHYDM supportability]==========================================*/
-enum odm_ability_e {
-
-	ODM_BB_DIG				= BIT(F00_DIG),
-	ODM_BB_RA_MASK			= BIT(F01_RA_MASK),
+/*@=[PHYDM supportability]==========================================*/
+enum odm_ability {
+	ODM_BB_DIG		= BIT(F00_DIG),
+	ODM_BB_RA_MASK		= BIT(F01_RA_MASK),
 	ODM_BB_DYNAMIC_TXPWR	= BIT(F02_DYN_TXPWR),
-	ODM_BB_FA_CNT				= BIT(F03_FA_CNT),
-	ODM_BB_RSSI_MONITOR		= BIT(F04_RSSI_MNTR),
-	ODM_BB_CCK_PD				= BIT(F05_CCK_PD),
-	ODM_BB_ANT_DIV			= BIT(F06_ANT_DIV),
-	ODM_BB_SMT_ANT			= BIT(F07_SMT_ANT),
-	ODM_BB_PWR_TRAIN			= BIT(F08_PWR_TRAIN),
-	ODM_BB_RATE_ADAPTIVE		= BIT(F09_RA),
-	ODM_BB_PATH_DIV			= BIT(F10_PATH_DIV),
-	ODM_BB_DFS				= BIT(F11_DFS),
-	ODM_BB_DYNAMIC_ARFR		= BIT(F12_DYN_ARFR),
-	ODM_BB_ADAPTIVITY			= BIT(F13_ADPTVTY),
-	ODM_BB_CFO_TRACKING		= BIT(F14_CFO_TRK),
-	ODM_BB_ENV_MONITOR		= BIT(F15_ENV_MNTR),
-	ODM_BB_PRIMARY_CCA		= BIT(F16_PRI_CCA),
+	ODM_BB_FA_CNT		= BIT(F03_FA_CNT),
+	ODM_BB_RSSI_MONITOR	= BIT(F04_RSSI_MNTR),
+	ODM_BB_CCK_PD		= BIT(F05_CCK_PD),
+	ODM_BB_ANT_DIV		= BIT(F06_ANT_DIV),
+	ODM_BB_SMT_ANT		= BIT(F07_SMT_ANT),
+	ODM_BB_PWR_TRAIN	= BIT(F08_PWR_TRAIN),
+	ODM_BB_RATE_ADAPTIVE	= BIT(F09_RA),
+	ODM_BB_PATH_DIV		= BIT(F10_PATH_DIV),
+	ODM_BB_DFS		= BIT(F11_DFS),
+	ODM_BB_DYNAMIC_ARFR	= BIT(F12_DYN_ARFR),
+	ODM_BB_ADAPTIVITY	= BIT(F13_ADPTVTY),
+	ODM_BB_CFO_TRACKING	= BIT(F14_CFO_TRK),
+	ODM_BB_ENV_MONITOR	= BIT(F15_ENV_MNTR),
+	ODM_BB_PRIMARY_CCA	= BIT(F16_PRI_CCA),
 	ODM_BB_ADAPTIVE_SOML	= BIT(F17_ADPTV_SOML),
-	ODM_BB_LNA_SAT_CHK		= BIT(F18_LNA_SAT_CHK),
-	/*BIT19*/
-	ODM_BB_DYNAMIC_RX_PATH	= BIT(F20_DYN_RX_PATH)
+	ODM_BB_LNA_SAT_CHK	= BIT(F18_LNA_SAT_CHK),
 };
 
-/*=[PHYDM Debug Component]=====================================*/
+/*@=[PHYDM Debug Component]=====================================*/
 enum phydm_dbg_comp {
-	/*BB Driver Functions*/
+	/*@BB Driver Functions*/
 	DBG_DIG			= BIT(F00_DIG),
 	DBG_RA_MASK		= BIT(F01_RA_MASK),
-	DBG_DYN_TXPWR	= BIT(F02_DYN_TXPWR),
+	DBG_DYN_TXPWR		= BIT(F02_DYN_TXPWR),
 	DBG_FA_CNT		= BIT(F03_FA_CNT),
 	DBG_RSSI_MNTR		= BIT(F04_RSSI_MNTR),
-	DBG_CCKPD			= BIT(F05_CCK_PD),
+	DBG_CCKPD		= BIT(F05_CCK_PD),
 	DBG_ANT_DIV		= BIT(F06_ANT_DIV),
 	DBG_SMT_ANT		= BIT(F07_SMT_ANT),
 	DBG_PWR_TRAIN		= BIT(F08_PWR_TRAIN),
-	DBG_RA				= BIT(F09_RA),
+	DBG_RA			= BIT(F09_RA),
 	DBG_PATH_DIV		= BIT(F10_PATH_DIV),
 	DBG_DFS			= BIT(F11_DFS),
 	DBG_DYN_ARFR		= BIT(F12_DYN_ARFR),
 	DBG_ADPTVTY		= BIT(F13_ADPTVTY),
-	DBG_CFO_TRK		= BIT(F14_CFO_TRK), 
+	DBG_CFO_TRK		= BIT(F14_CFO_TRK),
 	DBG_ENV_MNTR		= BIT(F15_ENV_MNTR),
 	DBG_PRI_CCA		= BIT(F16_PRI_CCA),
-	DBG_ADPTV_SOML	= BIT(F17_ADPTV_SOML),
-	DBG_LNA_SAT_CHK = BIT(F18_LNA_SAT_CHK),
-	/*BIT19*/
-	DBG_DYN_RX_PATH	= BIT(F20_DYN_RX_PATH),
+	DBG_ADPTV_SOML		= BIT(F17_ADPTV_SOML),
+	DBG_LNA_SAT_CHK		= BIT(F18_LNA_SAT_CHK),
+	/*BIT(19)*/
 	/*Neet to re-arrange*/
+	DBG_PHY_STATUS		= BIT(20),
 	DBG_TMP			= BIT(21),
 	DBG_FW_TRACE		= BIT(22),
-	DBG_TXBF			= BIT(23),
-	DBG_COMMON_FLOW	= BIT(24),
-	ODM_COMP_TX_PWR_TRACK	= BIT(25),
-	ODM_COMP_CALIBRATION		= BIT(26),
-	ODM_COMP_MP				= BIT(27),
-	ODM_PHY_CONFIG			= BIT(28),
-	ODM_COMP_INIT				= BIT(29),
-	ODM_COMP_COMMON			= BIT(30),
-	ODM_COMP_API				= BIT(31)
+	DBG_TXBF		= BIT(23),
+	DBG_COMMON_FLOW		= BIT(24),
+	DBG_COMP_MCC		= BIT(25),
+	/*BIT(26)*/
+	DBG_DM_SUMMARY		= BIT(27),
+	ODM_PHY_CONFIG		= BIT(28),
+	ODM_COMP_INIT		= BIT(29),
+	DBG_CMN			= BIT(30),/*@common*/
+	ODM_COMP_API		= BIT(31)
 };
 
-/*=========================================================*/
+/*@=========================================================*/
 
-/*ODM_CMNINFO_ONE_PATH_CCA*/
-enum odm_cca_path_e {
+/*@ODM_CMNINFO_ONE_PATH_CCA*/
+enum odm_cca_path {
 	ODM_CCA_2R		= 0,
 	ODM_CCA_1R_A		= 1,
 	ODM_CCA_1R_B		= 2,
 };
 
 enum phy_reg_pg_type {
-	PHY_REG_PG_RELATIVE_VALUE	= 0,
-	PHY_REG_PG_EXACT_VALUE		= 1
+	PHY_REG_PG_RELATIVE_VALUE = 0,
+	PHY_REG_PG_EXACT_VALUE	= 1
 };
 
 enum phydm_offload_ability {
 	PHYDM_PHY_PARAM_OFFLOAD = BIT(0),
-	PHYDM_RF_IQK_OFFLOAD = BIT(1),
+	PHYDM_RF_IQK_OFFLOAD	= BIT(1),
 };
 
 struct phydm_pause_lv {
-	s8	lv_dig;
-	s8	lv_cckpd;
-	s8	lv_antdiv;
-	s8	lv_adapt;
+	s8			lv_dig;
+	s8			lv_cckpd;
+	s8			lv_antdiv;
+	s8			lv_adapt;
+	s8			lv_adsl;
 };
 
 struct phydm_func_poiner {
-	void	(*pause_phydm_handler)(void	 *p_dm_void, u32 *val_buf, u8 val_len);
+	void (*pause_phydm_handler)(void *dm_void, u32 *val_buf, u8 val_len);
 };
 
 struct pkt_process_info {
-	u8	phystatus_smp_mode_en; /*send phystatus every sampling time*/
-	u8	pre_ppdu_cnt;
-	u8	lna_idx;
-	u8	vga_idx;
+	u8			phystatus_smp_mode_en; /*@send phystatus every sampling time*/
+	u8			pre_ppdu_cnt;
+	u8			lna_idx;
+	u8			vga_idx;
 };
 
 #ifdef ODM_CONFIG_BT_COEXIST
 struct	phydm_bt_info {
-	boolean		is_bt_enabled;			/*BT is enabled*/
-	boolean		is_bt_connect_process;	/*BT HS is under connection progress.*/
-	u8			bt_hs_rssi;				/*BT HS mode wifi rssi value.*/
-	boolean		is_bt_hs_operation;		/*BT HS mode is under progress*/
-	boolean		is_bt_limited_dig;		/*BT is busy.*/
+	boolean			is_bt_enabled;		/*@BT is enabled*/
+	boolean			is_bt_connect_process;	/*@BT HS is under connection progress.*/
+	u8			bt_hs_rssi;		/*@BT HS mode wifi rssi value.*/
+	boolean			is_bt_hs_operation;	/*@BT HS mode is under progress*/
+	boolean			is_bt_limited_dig;	/*@BT is busy.*/
 };
 #endif
 
 struct	phydm_iot_center {
-	boolean		is_linked_cmw500;
-	u8			win_patch_id;		/*Customer ID*/
+	boolean			is_linked_cmw500;
+	u8			win_patch_id;		/*@Customer ID*/
 	u32			phydm_patch_id;
 
 };
 
+#if (RTL8822B_SUPPORT == 1)
+struct drp_rtl8822b_struct {
+	enum bb_path path_judge;
+	u16 path_a_cck_fa;
+	u16 path_b_cck_fa;
+};
+#endif
+
+#ifdef CONFIG_MCC_DM
+#define MCC_DM_REG_NUM	32
+struct _phydm_mcc_dm_ {
+	u8		mcc_pre_status;
+	u8		mcc_reg_id[MCC_DM_REG_NUM];
+	u16		mcc_dm_reg[MCC_DM_REG_NUM];
+	u8		mcc_dm_val[MCC_DM_REG_NUM][2];
+	/*mcc DIG*/
+	u8		mcc_rssi[2];
+	/*u8		mcc_igi[2];*/
+
+	/* need to be config by driver*/
+	u8		mcc_status;
+	u8		sta_macid[2][NUM_STA];
+	u16		mcc_rf_channel[2];
+
+};
+#endif
+
+
 #if (DM_ODM_SUPPORT_TYPE & ODM_WIN)
 	#if (RT_PLATFORM != PLATFORM_LINUX)
 		typedef
 	#endif
 
-	struct PHY_DM_STRUCT
+struct dm_struct {
 #else/*for AP, CE Team*/
-	struct PHY_DM_STRUCT
+struct dm_struct {
 #endif
-{
-	/*Add for different team use temporarily*/
-	struct _ADAPTER		*adapter;		/*For CE/NIC team*/
-	struct rtl8192cd_priv	*priv;			/*For AP team*/
-	/*WHen you use adapter or priv pointer, you must make sure the pointer is ready.*/
-	boolean		odm_ready;
+	/*@Add for different team use temporarily*/
+	void			*adapter;		/*@For CE/NIC team*/
+	struct rtl8192cd_priv	*priv;			/*@For AP team*/
+	boolean			odm_ready;
 	enum phy_reg_pg_type	phy_reg_pg_value_type;
 	u8			phy_reg_pg_version;
-	u64			support_ability;	/*PHYDM function Supportability*/
-	u64			pause_ability;	/*PHYDM function pause Supportability*/
+	u64			support_ability;	/*@PHYDM function Supportability*/
+	u64			pause_ability;		/*@PHYDM function pause Supportability*/
 	u64			debug_components;
+	u8			cmn_dbg_msg_period;
+	u8			cmn_dbg_msg_cnt;
 	u32			fw_debug_components;
-	u32			debug_level;
-	u32			num_qry_phy_status_all;		/*CCK + OFDM*/
+	u32			num_qry_phy_status_all;	/*@CCK + OFDM*/
 	u32			last_num_qry_phy_status_all;
 	u32			rx_pwdb_ave;
-	boolean		is_init_hw_info_by_rfe;
+	boolean			is_init_hw_info_by_rfe;
 
-	/*------ ODM HANDLE, DRIVER NEEDS NOT TO HOOK------*/
-	boolean		is_cck_high_power;
+	/*@------ ODM HANDLE, DRIVER NEEDS NOT TO HOOK------*/
+	boolean			is_cck_high_power;
 	u8			rf_path_rx_enable;
-	/*------ ODM HANDLE, DRIVER NEEDS NOT TO HOOK------*/
-
-	/* COMMON INFORMATION */
-
-	/*Init value*/
-	/*-----------HOOK BEFORE REG INIT-----------*/
-
-	u8			support_platform;/*PHYDM Platform info WIN/AP/CE = 1/2/3 */
-	u8			normal_rx_path;	
-	boolean			brxagcswitch; /* for rx AGC table switch in Microsoft case */
-	u8			support_interface;/*PHYDM PCIE/USB/SDIO = 1/2/3*/
-	u32			support_ic_type;	/*PHYDM supported IC*/
-	u8			cut_version;		/*cut version TestChip/A-cut/B-cut... = 0/1/2/3/...*/
-	u8			fab_version;		/*Fab version TSMC/UMC = 0/1*/
-	u8			rf_type;			/*RF type 4T4R/3T3R/2T2R/1T2R/1T1R/...*/
+	/*@------ ODM HANDLE, DRIVER NEEDS NOT TO HOOK------*/
+
+	/* @COMMON INFORMATION */
+
+	/*@Init value*/
+	/*@-----------HOOK BEFORE REG INIT-----------*/
+
+	u8			support_platform;	/*@PHYDM Platform info WIN/AP/CE = 1/2/3 */
+	u8			normal_rx_path;
+	boolean			brxagcswitch;		/* @for rx AGC table switch in Microsoft case */
+	u8			support_interface;	/*@PHYDM PCIE/USB/SDIO = 1/2/3*/
+	u32			support_ic_type;	/*@PHYDM supported IC*/
+	u8			ic_ip_series;		/*N/AC/JGR3*/
+	enum phydm_phy_sts_type	ic_phy_sts_type;	/*@Type1/type2/type3*/
+	u8			cut_version;		/*@cut version TestChip/A-cut/B-cut... = 0/1/2/3/...*/
+	u8			fab_version;		/*@Fab version TSMC/UMC = 0/1*/
+	u8			fw_version;
+	u8			fw_sub_version;
+	u8			rf_type;		/*@RF type 4T4R/3T3R/2T2R/1T2R/1T1R/...*/
 	u8			rfe_type;
 	u8			board_type;
 	u8			package_type;
@@ -559,26 +744,25 @@ struct	phydm_iot_center {
 	u16			type_gpa;
 	u16			type_alna;
 	u16			type_apa;
-	u8			ext_lna;			/*with 2G external LNA  NO/Yes = 0/1*/
-	u8			ext_lna_5g;		/*with 5G external LNA  NO/Yes = 0/1*/
-	u8			ext_pa;			/*with 2G external PNA  NO/Yes = 0/1*/
-	u8			ext_pa_5g;		/*with 5G external PNA  NO/Yes = 0/1*/
-	u8 			efuse0x3d7;		/*with Efuse number*/
-	u8 			efuse0x3d8;
-	u8			ext_trsw;		/*with external TRSW  NO/Yes = 0/1*/
-	u8			ext_lna_gain;	/*gain of external lna*/
-	boolean		is_in_hct_test;
+	u8			ext_lna;		/*@with 2G external LNA  NO/Yes = 0/1*/
+	u8			ext_lna_5g;		/*@with 5G external LNA  NO/Yes = 0/1*/
+	u8			ext_pa;			/*@with 2G external PNA  NO/Yes = 0/1*/
+	u8			ext_pa_5g;		/*@with 5G external PNA  NO/Yes = 0/1*/
+	u8			efuse0x3d7;		/*@with Efuse number*/
+	u8			efuse0x3d8;
+	u8			ext_trsw;		/*@with external TRSW  NO/Yes = 0/1*/
+	u8			ext_lna_gain;		/*@gain of external lna*/
+	boolean			is_in_hct_test;
 	u8			wifi_test;
-	boolean		is_dual_mac_smart_concurrent;
-	u32			bk_support_ability; /*SD4 only*/
+	boolean			is_dual_mac_smart_concurrent;
+	u32			bk_support_ability;	/*SD4 only*/
 	u8			with_extenal_ant_switch;
-	/*cck agc relative*/
-	boolean		cck_new_agc;
+	/*@cck agc relative*/
+	boolean			cck_new_agc;
 	s8			cck_lna_gain_table[8];
-	/*-------------------------------------*/
-	u8			phydm_period;
+	/*@-------------------------------------*/
 	u32			phydm_sys_up_time;
-	u8			num_rf_path; /*ex: 8821C=1, 8192E=2, 8814B=4*/
+	u8			num_rf_path;		/*@ex: 8821C=1, 8192E=2, 8814B=4*/
 	u32			soft_ap_special_setting;
 	s8			s8_dummy;
 	u8			u8_dummy;
@@ -586,62 +770,67 @@ struct	phydm_iot_center {
 	u32			u32_dummy;
 	u8			rfe_hwsetting_band;
 	u8			p_advance_ota;
-	boolean		hp_hw_id;
-	boolean		BOOLEAN_temp;
-	boolean		is_dfs_band;
-	u8			is_receiver_blocking_en;
+	boolean			hp_hw_id;
+	boolean			BOOLEAN_temp;
+	boolean			is_dfs_band;
+	u8			is_rx_blocking_en;
 	u16			fw_offload_ability;
-/*-----------HOOK BEFORE REG INIT-----------*/
-/*===========================================================*/	
-/*====[ CALL BY Reference ]=========================================*/
-/*===========================================================*/	
-
-	u64			*p_num_tx_bytes_unicast;	/*TX Unicast byte count*/
-	u64			*p_num_rx_bytes_unicast;	/*RX Unicast byte count*/
-	u8			*p_band_type;				/*Frequence band 2.4G/5G = 0/1*/
-	u8			*p_sec_ch_offset;			/*Secondary channel offset don't_care/below/above = 0/1/2*/
-	u8			*p_security;					/*security mode Open/WEP/AES/TKIP = 0/1/2/3*/
-	u8			*p_band_width;				/*BW info 20M/40M/80M = 0/1/2*/
-	u8			*p_channel;					/*central channel number*/
-	boolean		*p_is_scan_in_process;		/*Common info for status*/
-	boolean		*p_is_power_saving;
-	u8			*p_one_path_cca;			/*CCA path 2-path/path-A/path-B = 0/1/2; using enum odm_cca_path_e.*/
-	u8			*p_antenna_test;
-	boolean		*p_is_net_closed;
-	boolean		*p_is_fcs_mode_enable;
-	/*--------- For 8723B IQK-------------------------------------*/
-	boolean		*p_is_1_antenna;
-	u8			*p_rf_default_path;	/* 0:S1, 1:S0 */
-	/*-----------------------------------------------------------*/
-
-	u16			*p_forced_data_rate;
-	u8			*p_enable_antdiv;
-	u8			*p_enable_adaptivity;
-	u8			*hub_usb_mode;		/*1: USB 2.0, 2: USB 3.0*/
-	boolean		*p_is_fw_dw_rsvd_page_in_progress;
-	u32			*p_current_tx_tp;
-	u32			*p_current_rx_tp;
-	u8			*p_sounding_seq;
-	u32			*p_soft_ap_mode;
-	u8			*p_mp_mode;
-	u32			*p_interrupt_mask;
-	u8			*p_bb_op_mode;
-/*===========================================================*/	
-/*====[ CALL BY VALUE ]===========================================*/
-/*===========================================================*/	
+/*@-----------HOOK BEFORE REG INIT-----------*/
+/*@===========================================================*/
+/*@====[ CALL BY Reference ]=========================================*/
+/*@===========================================================*/
+
+	u64			*num_tx_bytes_unicast;	/*@TX Unicast byte cnt*/
+	u64			*num_rx_bytes_unicast;	/*@RX Unicast byte cnt*/
+	u8			*band_type;		/*@2.4G/5G = 0/1*/
+	u8			*sec_ch_offset;		/*@Secondary channel offset don't_care/below/above = 0/1/2*/
+	u8			*security;		/*@security mode Open/WEP/AES/TKIP = 0/1/2/3*/
+	u8			*band_width;		/*@20M/40M/80M = 0/1/2*/
+	u8			*channel;		/*@central CH number*/
+	boolean			*is_scan_in_process;
+	boolean			*is_power_saving;
+	boolean			*is_tdma;
+	u8			*one_path_cca;		/*@CCA path 2-path/path-A/path-B = 0/1/2; using enum odm_cca_path.*/
+	u8			*antenna_test;
+	boolean			*is_net_closed;
+	boolean			*is_fcs_mode_enable;
+	/*@--------- For 8723B IQK-------------------------------------*/
+	boolean			*is_1_antenna;
+	u8			*rf_default_path;	/* @0:S1, 1:S0 */
+	/*@-----------------------------------------------------------*/
+
+	u16			*forced_data_rate;
+	u8			*enable_antdiv;
+	u8			*enable_pathdiv;
+	u8			*en_adap_soml;
+	u8			*enable_adaptivity;
+	u8			*hub_usb_mode;		/*@1:USB2.0, 2:USB3.0*/
+	boolean			*is_fw_dw_rsvd_page_in_progress;
+	u32			*current_tx_tp;
+	u32			*current_rx_tp;
+	u8			*sounding_seq;
+	u32			*soft_ap_mode;
+	u8			*mp_mode;
+	u32			*interrupt_mask;
+	u8			*bb_op_mode;
+/*@===========================================================*/
+/*@====[ CALL BY VALUE ]===========================================*/
+/*@===========================================================*/
 
 	u8			disable_phydm_watchdog;
-	boolean		is_link_in_process;
-	boolean		is_wifi_direct;
-	boolean		is_wifi_display;
-	boolean		is_linked;
-	boolean		bsta_state;
+	boolean			is_link_in_process;
+	boolean			is_wifi_direct;
+	boolean			is_wifi_display;
+	boolean			is_linked;
+	boolean			bsta_state;
 	u8			rssi_min;
+	u8			rssi_min_macid;
 	u8			pre_rssi_min;
 	u8			rssi_max;
+	u8			rssi_max_macid;
 	u8			rssi_min_by_path;
-	boolean		is_mp_chip;
-	boolean		is_one_entry_only;
+	boolean			is_mp_chip;
+	boolean			is_one_entry_only;
 	u32			one_entry_macid;
 	u32			one_entry_tp;
 	u32			pre_one_entry_tp;
@@ -649,15 +838,19 @@ struct	phydm_iot_center {
 	u8			number_linked_client;
 	u8			pre_number_active_client;
 	u8			number_active_client;
-	boolean		is_disable_phy_api;
-	u8			RSSI_A;
-	u8			RSSI_B;
-	u8			RSSI_C;
-	u8			RSSI_D;
-	u64			RSSI_TRSW;
-	u64			RSSI_TRSW_H;
-	u64			RSSI_TRSW_L;
-	u64			RSSI_TRSW_iso;
+	boolean			is_disable_phy_api;
+	u8			rssi_a;
+	u8			rssi_b;
+	u8			rssi_c;
+	u8			rssi_d;
+	s8			rxsc_80;
+	s8			rxsc_40;
+	s8			rxsc_20;
+	s8			rxsc_l;
+	u64			rssi_trsw;
+	u64			rssi_trsw_h;
+	u64			rssi_trsw_l;
+	u64			rssi_trsw_iso;
 	u8			tx_ant_status;
 	u8			rx_ant_status;
 	u8			cck_lna_idx;
@@ -670,49 +863,55 @@ struct	phydm_iot_center {
 	u8			linked_interval;
 	u8			pre_channel;
 	u32			txagc_offset_value_a;
-	boolean		is_txagc_offset_positive_a;
+	boolean			is_txagc_offset_positive_a;
 	u32			txagc_offset_value_b;
-	boolean		is_txagc_offset_positive_b;
-	/*[traffic]*/
+	boolean			is_txagc_offset_positive_b;
+	u8			ap_total_num;
+	/*@[traffic]*/
 	u8			traffic_load;
 	u8			pre_traffic_load;
-	u32			tx_tp;	/*Mbps*/
-	u32			rx_tp;	/*Mbps*/
-	u32			total_tp;/*Mbps*/
-	u8			txrx_state_all;	/*0: tx, 1:rx, 2:bi-direction*/
+	u32			tx_tp;			/*@Mbps*/
+	u32			rx_tp;			/*@Mbps*/
+	u32			total_tp;		/*@Mbps*/
+	u8			txrx_state_all;		/*@0:tx, 1:rx, 2:bi-dir*/
 	u64			cur_tx_ok_cnt;
 	u64			cur_rx_ok_cnt;
 	u64			last_tx_ok_cnt;
 	u64			last_rx_ok_cnt;
-	u16			consecutive_idlel_time;	/*unit: second*/
-	/*---------------------------*/
-	boolean		is_bb_swing_offset_positive_a;
-	boolean		is_bb_swing_offset_positive_b;
+	u16			consecutive_idlel_time;	/*@unit: second*/
+	/*@---------------------------*/
+	boolean			is_bb_swing_offset_positive_a;
+	boolean			is_bb_swing_offset_positive_b;
 
-	/*[DIG]*/
-	boolean		MPDIG_2G;				/*off MPDIG*/
-	u8			times_2g;	/*for MP DIG*/
+	/*@[DIG]*/
+	boolean			MPDIG_2G;		/*off MPDIG*/
+	u8			times_2g;		/*@for MP DIG*/
+	u8			force_igi;		/*@for debug*/
 
-	/*[TDMA-DIG]*/
+	/*@[TDMA-DIG]*/
 	u8			tdma_dig_timer_ms;
 	u8			tdma_dig_state_number;
 	u8			tdma_dig_low_upper_bond;
+	u8			force_tdma_low_igi;
+	u8			force_tdma_high_igi;
 	u8			fix_expire_to_zero;
-	boolean		original_dig_restore;
-	/*---------------------------*/
+	boolean			original_dig_restore;
+	/*@---------------------------*/
 
-	/*[AntDiv]*/
+	/*@[AntDiv]*/
 	u8			ant_div_type;
 	u8			antdiv_rssi;
 	u8			fat_comb_a;
 	u8			fat_comb_b;
 	u8			antdiv_intvl;
 	u8			ant_type;
+	u8			ant_type2;
 	u8			pre_ant_type;
+	u8			pre_ant_type2;
 	u8			antdiv_period;
 	u8			evm_antdiv_period;
 	u8			antdiv_select;
-	u8			antdiv_train_num;/*training time for each antenna in EVM method*/
+	u8			antdiv_train_num; /*@training time for each antenna in EVM method*/
 	u8			stop_antdiv_rssi_th;
 	u16			stop_antdiv_tp_diff_th;
 	u16			stop_antdiv_tp_th;
@@ -722,267 +921,279 @@ struct	phydm_iot_center {
 	u8			path_select;
 	u8			antdiv_evm_en;
 	u8			bdc_holdstate;
-	/*---------------------------*/
-	
+	u8			antdiv_counter;
+	/*@---------------------------*/
+
 	u8			ndpa_period;
-	boolean		h2c_rarpt_connect;
-	boolean		cck_agc_report_type;
+	boolean			h2c_rarpt_connect;
+	boolean			cck_agc_report_type; /*@1:4bit LNA, 0:3bit LNA */
 	u8			print_agc;
 	u8			la_mode;
-	/*---8821C Antenna and RF Set BTG/WLG/WLA Select---------------*/
+	/*@---8821C Antenna and RF Set BTG/WLG/WLA Select---------------*/
 	u8			current_rf_set_8821c;
 	u8			default_rf_set_8821c;
 	u8			current_ant_num_8821c;
 	u8			default_ant_num_8821c;
-	u8			rfe_type_21c;
-	/*-----------------------------------------------------------*/
-	/*---For Adaptivtiy---------------------------------------------*/
+	u8			rfe_type_expand;
+	/*@-----------------------------------------------------------*/
+	/*@---For Adaptivtiy---------------------------------------------*/
 	s8			TH_L2H_default;
 	s8			th_edcca_hl_diff_default;
 	s8			th_l2h_ini;
 	s8			th_edcca_hl_diff;
-	s8			th_l2h_ini_mode2;
-	s8			th_edcca_hl_diff_mode2;
-	boolean		carrier_sense_enable;
-	boolean		adaptivity_flag;	/*Limit IGI upper bound for Adaptivity*/
-	u8			dc_backoff;
-	boolean		adaptivity_enable;
-	u8			ap_total_num;
-	boolean		edcca_enable;
-	u8			odm_regulation_2_4g;
-	u8			odm_regulation_5g;
-	/*-----------------------------------------------------------*/
-	
+	boolean			carrier_sense_enable;
+	/*@-----------------------------------------------------------*/
+
 	u8			pre_dbg_priority;
 	u8			nbi_set_result;
 	u8			c2h_cmd_start;
 	u8			fw_debug_trace[60];
 	u8			pre_c2h_seq;
-	boolean		fw_buff_is_enpty;
+	boolean			fw_buff_is_enpty;
 	u32			data_frame_num;
 
-	/*--- for noise detection ---------------------------------------*/
-	boolean		is_noisy_state;
-	boolean		noisy_decision; /*b_noisy*/
-	boolean		pre_b_noisy;
+	/*@--- for noise detection ---------------------------------------*/
+	boolean			is_noisy_state;
+	boolean			noisy_decision; /*@b_noisy*/
+	boolean			pre_b_noisy;
 	u32			noisy_decision_smooth;
-	u8			lna_sat_chk_cnt;
-	u8			lna_sat_chk_duty_cycle;
-	u32			lna_sat_chk_period_ms;
-	boolean		is_disable_lna_sat_chk;
-	boolean		is_disable_gain_table_switch;
-	/*-----------------------------------------------------------*/
-	
-	boolean		is_disable_dym_ecs;
-	boolean		is_disable_dym_ant_weighting;
-	struct sta_info	*p_odm_sta_info[ODM_ASSOCIATE_ENTRY_NUM];/*_ODM_STA_INFO, 2012/01/12 MH For MP, we need to reduce one array pointer for default port.??*/
-	struct cmn_sta_info	*p_phydm_sta_info[ODM_ASSOCIATE_ENTRY_NUM];
-	u8			phydm_macid_table[ODM_ASSOCIATE_ENTRY_NUM];
-
-#if (ODM_PHY_STATUS_NEW_TYPE_SUPPORT == 1)
-	s32			accumulate_pwdb[ODM_ASSOCIATE_ENTRY_NUM];
-#endif
+	/*@-----------------------------------------------------------*/
+
+	/*@--- for MCC ant weighting ------------------------------------*/
+	boolean			is_stop_dym_ant_weighting;
+	/*@-----------------------------------------------------------*/
+
+	boolean			is_disable_dym_ecs;
+	boolean			is_disable_dym_ant_weighting;
+	struct cmn_sta_info	*phydm_sta_info[ODM_ASSOCIATE_ENTRY_NUM];
+	u8			phydm_macid_table[ODM_ASSOCIATE_ENTRY_NUM];/*@sta_idx = phydm_macid_table[HW_macid]*/
 
 #if (RATE_ADAPTIVE_SUPPORT == 1)
 	u16			currmin_rpt_time;
-	struct _odm_ra_info_   ra_info[ODM_ASSOCIATE_ENTRY_NUM];
-	/*Use mac_id as array index. STA mac_id=0, VWiFi Client mac_id={1, ODM_ASSOCIATE_ENTRY_NUM-1} //YJ,add,120119*/
+	struct _phydm_txstatistic_ hw_stats;
+	struct _odm_ra_info_	ra_info[ODM_ASSOCIATE_ENTRY_NUM];
+/*Use mac_id as array index. STA mac_id=0*/
+/*VWiFi Client mac_id={1, ODM_ASSOCIATE_ENTRY_NUM-1} //YJ,add,120119*/
 #endif
-	boolean		ra_support88e;	/*2012/02/14 MH Add to share 88E ra with other SW team.We need to colelct all support abilit to a proper area.*/
-	boolean		*p_is_driver_stopped;
-	boolean		*p_is_driver_is_going_to_pnp_set_power_sleep;
-	boolean		*pinit_adpt_in_progress;
-	boolean		is_user_assign_level;
-	u8			RSSI_BT;			/*come from BT*/
-
-	/*---PSD Relative ---------------------------------------------*/
-	boolean		is_psd_in_process;
-	boolean		is_psd_active;
-	/*-----------------------------------------------------------*/
-	
-	boolean		bsomlenabled;		/* for dynamic SoML control */
-	boolean		bhtstfdisabled;		/* for dynamic HTSTF gain control	*/
-	boolean		disrxhpsoml;			/* for dynamic RxHP control with SoML on/off */
+	/*@2012/02/14 MH Add to share 88E ra with other SW team*/
+	/*We need to colelct all support abilit to a proper area.*/
+	boolean			ra_support88e;
+	boolean			*is_driver_stopped;
+	boolean			*is_driver_is_going_to_pnp_set_power_sleep;
+	boolean			*pinit_adpt_in_progress;
+	boolean			is_user_assign_level;
+	u8			RSSI_BT;		/*@come from BT*/
+
+	/*@---PSD Relative ---------------------------------------------*/
+	boolean			is_psd_in_process;
+	boolean			is_psd_active;
+	/*@-----------------------------------------------------------*/
+
+	boolean			bsomlenabled;	/* @D-SoML control */
+	boolean			bhtstfdisabled;	/* @dynamic HTSTF gain control*/
 	u32			n_iqk_cnt;
 	u32			n_iqk_ok_cnt;
 	u32			n_iqk_fail_cnt;
 
 #if (DM_ODM_SUPPORT_TYPE & ODM_AP)
-	boolean		config_bbrf;
+	boolean			config_bbrf;
+#endif
+	boolean			is_disable_power_training;
+	boolean			is_bt_continuous_turn;
+	u8			enhance_pwr_th[3];
+	u8			set_pwr_th[3];
+	/*@----------Dyn Tx Pwr ---------------------------------------*/
+#ifdef BB_RAM_SUPPORT
+	struct phydm_bb_ram_ctrl p_bb_ram_ctrl;
 #endif
-	boolean		is_disable_power_training;
-	boolean		is_bt_continuous_turn;
 	u8			dynamic_tx_high_power_lvl;
+	void	(*fill_desc_dyntxpwr)(void *dm, u8 *desc, u8 dyn_tx_power);
 	u8			last_dtp_lvl;
+	u8			min_power_index;
 	u32			tx_agc_ofdm_18_6;
+	/*-------------------------------------------------------------*/
 	u8			rx_pkt_type;
 
 #ifdef CONFIG_PHYDM_DFS_MASTER
 	u8			dfs_region_domain;
 	u8			*dfs_master_enabled;
-	/*---phydm_radar_detect_with_dbg_parm start --------------------*/
+	/*@---phydm_radar_detect_with_dbg_parm start --------------------*/
 	u8			radar_detect_dbg_parm_en;
 	u32			radar_detect_reg_918;
 	u32			radar_detect_reg_91c;
 	u32			radar_detect_reg_920;
 	u32			radar_detect_reg_924;
-	/*-----------------------------------------------------------*/
+	u32			radar_detect_reg_f54;
+	u32			radar_detect_reg_f58;
+	u32			radar_detect_reg_f5c;
+	u32			radar_detect_reg_f70;
+	u32			radar_detect_reg_f74;
+/*@-----------------------------------------------------------*/
 #endif
 
-/*=== PHYDM Timer ========================================== (start)*/
+/*@=== PHYDM Timer ========================================== (start)*/
 
-	struct timer_list	mpt_dig_timer;	/*MPT DIG timer*/
-	struct timer_list	path_div_switch_timer;
-	struct timer_list	cck_path_diversity_timer;	/*2011.09.27 add for path Diversity*/
-	struct timer_list	fast_ant_training_timer;
+	struct phydm_timer_list	mpt_dig_timer;
+	struct phydm_timer_list	fast_ant_training_timer;
 #ifdef ODM_EVM_ENHANCE_ANTDIV
-	struct timer_list	evm_fast_ant_training_timer;
+	struct phydm_timer_list	evm_fast_ant_training_timer;
 #endif
-	struct timer_list	sbdcnt_timer;
-
+#ifdef PHYDM_TDMA_DIG_SUPPORT
+	struct phydm_timer_list tdma_dig_timer;
+#endif
+	struct phydm_timer_list	sbdcnt_timer;
 
-/*=== PHYDM Workitem ======================================= (start)*/
+/*@=== PHYDM Workitem ======================================= (start)*/
 
 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
 #if USE_WORKITEM
-	RT_WORK_ITEM	path_div_switch_workitem;
-	RT_WORK_ITEM	cck_path_diversity_workitem;
-	RT_WORK_ITEM	fast_ant_training_workitem;
-	RT_WORK_ITEM	ra_rpt_workitem;
-	RT_WORK_ITEM	sbdcnt_workitem;
+	RT_WORK_ITEM		fast_ant_training_workitem;
+	RT_WORK_ITEM		ra_rpt_workitem;
+	RT_WORK_ITEM		sbdcnt_workitem;
+	RT_WORK_ITEM		phydm_evm_antdiv_workitem;
 #endif
 #endif
 
-
-/*=== PHYDM Structure ======================================== (start)*/
-	struct	phydm_func_poiner			phydm_func_handler;
-	struct	phydm_iot_center				iot_table;
+/*@=== PHYDM Structure ======================================== (start)*/
+	struct	phydm_func_poiner	phydm_func_handler;
+	struct	phydm_iot_center	iot_table;
 
 #ifdef ODM_CONFIG_BT_COEXIST
-	struct	phydm_bt_info				bt_info_table;
+	struct	phydm_bt_info		bt_info_table;
 #endif
 
-	struct	pkt_process_info				pkt_proc_struct;
-	struct phydm_adaptivity_struct			adaptivity;
+	struct	pkt_process_info	pkt_proc_struct;
+	struct phydm_adaptivity_struct	adaptivity;
 	struct _DFS_STATISTICS		dfs;
-
-	struct _ODM_NOISE_MONITOR_			noise_level;
-
-	struct _odm_phy_dbg_info_				phy_dbg_info;
+	struct odm_noise_monitor	noise_level;
+	struct odm_phy_dbg_info		phy_dbg_info;
 
 #ifdef CONFIG_ADAPTIVE_SOML
-	struct adaptive_soml					dm_soml_table;
+	struct adaptive_soml		dm_soml_table;
 #endif
 
 #if (defined(CONFIG_PHYDM_ANTENNA_DIVERSITY))
 	#if (DM_ODM_SUPPORT_TYPE & (ODM_AP))
-	struct _BF_DIV_COEX_					dm_bdc_table;
+	struct _BF_DIV_COEX_		dm_bdc_table;
 	#endif
 
 	#if (defined(CONFIG_HL_SMART_ANTENNA))
-	struct smt_ant_honbo					dm_sat_table;
+	struct smt_ant_honbo		dm_sat_table;
 	#endif
 #endif
 
 #if (defined(CONFIG_SMART_ANTENNA))
-	struct smt_ant						smtant_table;
+	struct smt_ant			smtant_table;
+#endif
+
+	struct _hal_rf_			rf_table;	/*@for HALRF function*/
+	struct dm_rf_calibration_struct	rf_calibrate_info;
+	struct dm_iqk_info		IQK_info;
+	struct dm_dpk_info		dpk_info;
+
+#ifdef CONFIG_PHYDM_ANTENNA_DIVERSITY
+	struct phydm_fat_struct		dm_fat_table;
+	struct sw_antenna_switch	dm_swat_table;
+#endif
+	struct phydm_dig_struct		dm_dig_table;
+#ifdef PHYDM_LNA_SAT_CHK_SUPPORT
+	struct phydm_lna_sat_t		dm_lna_sat_info;
 #endif
 
-	struct phydm_fat_struct				dm_fat_table;
-	struct phydm_dig_struct				dm_dig_table;
-	struct phydm_lna_sat_info_struct	dm_lna_sat_info;
+#ifdef CONFIG_MCC_DM
+	struct _phydm_mcc_dm_ mcc_dm;
+#endif
 
 #ifdef PHYDM_SUPPORT_CCKPD
-	struct phydm_cckpd_struct				dm_cckpd_table;
+	struct phydm_cckpd_struct	dm_cckpd_table;
 #endif
-	
+
 #ifdef PHYDM_PRIMARY_CCA
-	struct phydm_pricca_struct				dm_pri_cca;
+	struct phydm_pricca_struct	dm_pri_cca;
 #endif
 
-	struct _rate_adaptive_table_			dm_ra_table;
-	struct phydm_fa_struct					false_alm_cnt;
+	struct ra_table			dm_ra_table;
+	struct phydm_fa_struct		false_alm_cnt;
 #ifdef PHYDM_TDMA_DIG_SUPPORT
-	struct phydm_fa_acc_struct				false_alm_cnt_acc;
+	struct phydm_fa_acc_struct	false_alm_cnt_acc;
+#ifdef IS_USE_NEW_TDMA
+	struct phydm_fa_acc_struct	false_alm_cnt_acc_low;
+#endif
 #endif
-	struct _sw_antenna_switch_				dm_swat_table;
-	struct phydm_cfo_track_struct			dm_cfo_track;
-	struct _ACS_							dm_acs;
-	struct _CCX_INFO						dm_ccx_info;
-	struct _hal_rf_						rf_table; 		/*for HALRF function*/
-	struct odm_rf_calibration_structure		rf_calibrate_info;
-	struct odm_power_trim_data			power_trim_data;	
+	struct phydm_cfo_track_struct	dm_cfo_track;
+	struct ccx_info			dm_ccx_info;
+
+	struct odm_power_trim_data	power_trim_data;
 #if (RTL8822B_SUPPORT == 1)
-	struct drp_rtl8822b_struct			phydm_rtl8822b;
+	struct drp_rtl8822b_struct	phydm_rtl8822b;
 #endif
 
 #ifdef CONFIG_PSD_TOOL
-	struct _PHYDM_PSD_					dm_psd_table;
+	struct psd_info			dm_psd_table;
 #endif
 
 #if (PHYDM_LA_MODE_SUPPORT == 1)
-	struct _RT_ADCSMP					adcsmp;
-#endif
-
-#ifdef CONFIG_DYNAMIC_RX_PATH
-	struct _DYNAMIC_RX_PATH_			dm_drp_table;
-#endif
-
-	struct _IQK_INFORMATION				IQK_info;
-
-#if (DM_ODM_SUPPORT_TYPE & ODM_WIN)
-	struct _path_div_parameter_define_		path_iqk;
+	struct rt_adcsmp		adcsmp;
 #endif
 
 #if (defined(CONFIG_PATH_DIVERSITY))
-	struct _ODM_PATH_DIVERSITY_			dm_path_div;
+	struct _ODM_PATH_DIVERSITY_	dm_path_div;
 #endif
 
 #if (defined(CONFIG_ANT_DETECTION))
-	struct _ANT_DETECTED_INFO			ant_detected_info;	/* Antenna detected information for RSSI tool*/
+	struct _ANT_DETECTED_INFO	ant_detected_info;
 #endif
 
 #if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_CE))
-#if (BEAMFORMING_SUPPORT == 1)
-	struct _RT_BEAMFORMING_INFO 		beamforming_info;
+#ifdef PHYDM_BEAMFORMING_SUPPORT
+	struct _RT_BEAMFORMING_INFO 	beamforming_info;
 #endif
 #endif
 #ifdef PHYDM_AUTO_DEGBUG
-	struct	phydm_auto_dbg_struc			auto_dbg_table;
+	struct	phydm_auto_dbg_struct	auto_dbg_table;
 #endif
 
-	struct	phydm_pause_lv				pause_lv_table;	
-	struct	phydm_api_stuc 				api_table;
+	struct	phydm_pause_lv		pause_lv_table;
+	struct	phydm_api_stuc		api_table;
 #ifdef PHYDM_POWER_TRAINING_SUPPORT
-	struct	phydm_pow_train_stuc			pow_train_table;
+	struct	phydm_pow_train_stuc	pow_train_table;
+#endif
+
+#ifdef PHYDM_PMAC_TX_SETTING_SUPPORT
+	struct phydm_pmac_tx dm_pmac_tx_table;
 #endif
-/*==========================================================*/
+
+#ifdef PHYDM_MP_SUPPORT
+	struct phydm_mp dm_mp_table;
+#endif
+/*@==========================================================*/
 
 #if (DM_ODM_SUPPORT_TYPE & ODM_WIN)
 
 #if (RT_PLATFORM != PLATFORM_LINUX)
-}PHY_DM_STRUCT;		/*DM_Dynamic_Mechanism_Structure*/
+} dm_struct;	/*@DM_Dynamic_Mechanism_Structure*/
 #else
 };
 #endif
 
-#else	/*for AP,CE Team*/
+#else	/*@for AP,CE Team*/
 };
 #endif
 
 enum phydm_adv_ota {
-	PHYDM_PATHB_1RCCA = BIT(0),
-	PHYDM_HP_OTA_SETTING_A = BIT(1),
-	PHYDM_HP_OTA_SETTING_B = BIT(2),
-	PHYDM_ASUS_OTA_SETTING = BIT(3),
+	PHYDM_PATHB_1RCCA		= BIT(0),
+	PHYDM_HP_OTA_SETTING_A		= BIT(1),
+	PHYDM_HP_OTA_SETTING_B		= BIT(2),
+	PHYDM_ASUS_OTA_SETTING		= BIT(3),
 	PHYDM_ASUS_OTA_SETTING_CCK_PATH = BIT(4),
-	PHYDM_HP_OTA_SETTING_CCK_PATH = BIT(5),
+	PHYDM_HP_OTA_SETTING_CCK_PATH	= BIT(5),
+	PHYDM_LENOVO_OTA_SETTING_NBI_CSI = BIT(6),
 
 };
 
 enum phydm_bb_op_mode {
-	PHYDM_PERFORMANCE_MODE = 0,	/*Service one device*/
-	PHYDM_BALANCE_MODE = 1,		/*Service more than one device*/
+	PHYDM_PERFORMANCE_MODE	= 0,		/*Service one device*/
+	PHYDM_BALANCE_MODE	= 1,		/*@Service more than one device*/
 };
 
 enum phydm_structure_type {
@@ -1002,11 +1213,13 @@ enum odm_bb_config_type {
 	CONFIG_BB_PHY_REG_PG,
 	CONFIG_BB_PHY_REG_MP,
 	CONFIG_BB_AGC_TAB_DIFF,
+	CONFIG_BB_RF_CAL_INIT,
 };
 
 enum odm_rf_config_type {
 	CONFIG_RF_RADIO,
 	CONFIG_RF_TXPWR_LMT,
+	CONFIG_RF_SYN_RADIO,
 };
 
 enum odm_fw_config_type {
@@ -1033,234 +1246,112 @@ enum rt_status {
 	RT_STATUS_NOT_SUPPORT,
 	RT_STATUS_OS_API_FAILED,
 };
-#endif	/*end of enum rt_status definition*/
-
-
-/*===========================================================*/
-/*AGC RX High Power mode*/
-/*===========================================================*/
-#define	lna_low_gain_1		0x64
-#define	lna_low_gain_2		0x5A
-#define	lna_low_gain_3		0x58
-
-/*Add for cmn sta info*/
-
-#define is_sta_active(p_sta)	((p_sta) && (p_sta->dm_ctrl & STA_DM_CTRL_ACTIVE))
+#endif	/*@end of enum rt_status definition*/
 
 void
-phydm_watchdog_lps(
-	struct PHY_DM_STRUCT		*p_dm
-);
+phydm_watchdog_lps(struct dm_struct *dm);
 
 void
-phydm_watchdog_lps_32k(
-	struct PHY_DM_STRUCT		*p_dm
-);
+phydm_watchdog_lps_32k(struct dm_struct *dm);
 
 void
-phydm_txcurrentcalibration(
-	struct PHY_DM_STRUCT	*p_dm
-);	
+phydm_txcurrentcalibration(struct dm_struct *dm);
 
 void
-phydm_dm_early_init(
-	struct PHY_DM_STRUCT	*p_dm
-);
+phydm_dm_early_init(struct dm_struct *dm);
 
 void
-odm_dm_init(
-	struct PHY_DM_STRUCT	*p_dm
-);
+odm_dm_init(struct dm_struct *dm);
 
 void
-odm_dm_reset(
-	struct PHY_DM_STRUCT	*p_dm
-);
+odm_dm_reset(struct dm_struct *dm);
 
 void
-phydm_fwoffload_ability_init(
-	struct PHY_DM_STRUCT		*p_dm,
-	enum phydm_offload_ability	offload_ability
-);
+phydm_fwoffload_ability_init(struct dm_struct *dm,
+			     enum phydm_offload_ability offload_ability);
 
 void
-phydm_fwoffload_ability_clear(
-	struct PHY_DM_STRUCT		*p_dm,
-	enum phydm_offload_ability	offload_ability
-);
-
+phydm_fwoffload_ability_clear(struct dm_struct *dm,
+			      enum phydm_offload_ability offload_ability);
 
 void
-phydm_support_ability_debug(
-	void		*p_dm_void,
-	u32		*const dm_value,
-	u32		*_used,
-	char		*output,
-	u32		*_out_len
-);
+phydm_supportability_en(void *dm_void, char input[][16], u32 *_used,
+			char *output, u32 *_out_len);
 
 void
-phydm_pause_dm_watchdog(
-	void					*p_dm_void,
-	enum phydm_pause_type		pause_type
-);
+phydm_pause_dm_watchdog(void *dm_void, enum phydm_pause_type pause_type);
 
 void
-phydm_watchdog(
-	struct PHY_DM_STRUCT	*p_dm
-);
+phydm_watchdog(struct dm_struct *dm);
 
 void
-phydm_watchdog_mp(
-	struct PHY_DM_STRUCT	*p_dm
-);
+phydm_watchdog_mp(struct dm_struct *dm);
 
 u8
-phydm_pause_func(
-	void					*p_dm_void,
-	enum phydm_func_idx_e	pause_func,	
-	enum phydm_pause_type	pause_type,
-	enum phydm_pause_level	pause_lv,
-	u8						val_lehgth,
-	u32						*val_buf
-	
-);
+phydm_pause_func(void *dm_void, enum phydm_func_idx pause_func,
+		 enum phydm_pause_type pause_type,
+		 enum phydm_pause_level pause_lv, u8 val_lehgth, u32 *val_buf);
 
 void
-phydm_pause_func_console(
-	void		*p_dm_void,
-	char		input[][16],
-	u32		*_used,
-	char		*output,
-	u32		*_out_len,
-	u32		input_num
-);
+phydm_pause_func_console(void *dm_void, char input[][16], u32 *_used,
+			 char *output, u32 *_out_len);
 
 void
-odm_cmn_info_init(
-	struct PHY_DM_STRUCT	*p_dm,
-	enum odm_cmninfo_e		cmn_info,
-	u64						value
-);
+odm_cmn_info_init(struct dm_struct *dm, enum odm_cmninfo cmn_info, u64 value);
 
 void
-odm_cmn_info_hook(
-	struct PHY_DM_STRUCT	*p_dm,
-	enum odm_cmninfo_e		cmn_info,
-	void						*p_value
-);
+odm_cmn_info_hook(struct dm_struct *dm, enum odm_cmninfo cmn_info, void *value);
 
 void
-odm_cmn_info_update(
-	struct PHY_DM_STRUCT	*p_dm,
-	u32						cmn_info,
-	u64						value
-);
+odm_cmn_info_update(struct dm_struct *dm, u32 cmn_info, u64 value);
 
 u32
-phydm_cmn_info_query(
-	struct PHY_DM_STRUCT	*p_dm,
-	enum phydm_info_query_e	info_type
-);
+phydm_cmn_info_query(struct dm_struct *dm, enum phydm_info_query info_type);
 
-#if (DM_ODM_SUPPORT_TYPE == ODM_AP)
 void
-odm_init_all_threads(
-	struct PHY_DM_STRUCT	*p_dm
-);
+odm_init_all_timers(struct dm_struct *dm);
 
 void
-odm_stop_all_threads(
-	struct PHY_DM_STRUCT	*p_dm
-);
-#endif
+odm_cancel_all_timers(struct dm_struct *dm);
 
 void
-odm_init_all_timers(
-	struct PHY_DM_STRUCT	*p_dm
-);
+odm_release_all_timers(struct dm_struct *dm);
 
-void
-odm_cancel_all_timers(
-	struct PHY_DM_STRUCT	*p_dm
-);
+void *
+phydm_get_structure(struct dm_struct *dm, u8 structure_type);
 
 void
-odm_release_all_timers(
-	struct PHY_DM_STRUCT	*p_dm
-);
+phydm_dc_cancellation(struct dm_struct *dm);
 
+void
+phydm_receiver_blocking(void *dm_void);
 
 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
-void odm_init_all_work_items(struct PHY_DM_STRUCT	*p_dm);
-void odm_free_all_work_items(struct PHY_DM_STRUCT	*p_dm);
-
-/*2012/01/12 MH Check afapter status. Temp fix BSOD.*/
-
-#define	HAL_ADAPTER_STS_CHK(p_dm) do {\
-		if (p_dm->adapter == NULL) { \
-			\
-			return;\
-		} \
-	} while (0)
-
-#endif	/*#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)*/
-
-void *
-phydm_get_structure(
-	struct PHY_DM_STRUCT		*p_dm,
-	u8			structure_type
+void
+odm_init_all_work_items(
+	struct dm_struct	*dm
 );
-
-#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) || (DM_ODM_SUPPORT_TYPE == ODM_CE)
-	/*===========================================================*/
-	/* The following is for compile only*/
-	/*===========================================================*/
-
-	#if (DM_ODM_SUPPORT_TYPE & ODM_CE) && defined(DM_ODM_CE_MAC80211)
-		#define IS_HARDWARE_TYPE_8188E(_adapter)		false
-		#define IS_HARDWARE_TYPE_8188F(_adapter)		false
-		#define IS_HARDWARE_TYPE_8703B(_adapter)		false
-		#define IS_HARDWARE_TYPE_8723D(_adapter)		false
-		#define IS_HARDWARE_TYPE_8821C(_adapter)		false
-		#define IS_HARDWARE_TYPE_8812AU(_adapter)	false
-		#define IS_HARDWARE_TYPE_8814A(_adapter)		false
-		#define IS_HARDWARE_TYPE_8814AU(_adapter)	false
-		#define IS_HARDWARE_TYPE_8814AE(_adapter)	false
-		#define IS_HARDWARE_TYPE_8814AS(_adapter)	false
-		#define IS_HARDWARE_TYPE_8723BU(_adapter)	false
-		#define IS_HARDWARE_TYPE_8822BU(_adapter)	false
-		#define IS_HARDWARE_TYPE_8822BS(_adapter)		false
-		#define IS_HARDWARE_TYPE_JAGUAR(_Adapter)		\
-			(IS_HARDWARE_TYPE_8812(_Adapter) || IS_HARDWARE_TYPE_8821(_Adapter))
-	#else
-		#define	IS_HARDWARE_TYPE_8723A(_adapter)	false
-	#endif
-	#define	IS_HARDWARE_TYPE_8723AE(_adapter)		false
-	#define	IS_HARDWARE_TYPE_8192C(_adapter)			false
-	#define	IS_HARDWARE_TYPE_8192D(_adapter)		false
-	#define	RF_T_METER_92D	0x42
-
-
-	#define	GET_RX_STATUS_DESC_RX_MCS(__prx_status_desc)	LE_BITS_TO_1BYTE(__prx_status_desc+12, 0, 6)
-
-	#define	REG_CONFIG_RAM64X16		0xb2c
-
-
-	/* *********************************************************** */
-#endif
+void
+odm_free_all_work_items(
+	struct dm_struct	*dm
+);
+#endif	/*@#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)*/
 
 #if (DM_ODM_SUPPORT_TYPE == ODM_CE)
-	void odm_dtc(struct PHY_DM_STRUCT *p_dm);
+void
+odm_dtc(struct dm_struct *dm);
 #endif
 
+#if (DM_ODM_SUPPORT_TYPE == ODM_AP)
 void
-phydm_dc_cancellation(
-	struct	PHY_DM_STRUCT	*p_dm
+odm_init_all_threads(
+	struct dm_struct	*dm
 );
 
 void
-phydm_receiver_blocking(
-	void *p_dm_void
+odm_stop_all_threads(
+	struct dm_struct	*dm
 );
 #endif
+
+#endif
diff --git a/rtl8723DS/hal/phydm/phydm.mk b/rtl8723DS/hal/phydm/phydm.mk
index 4f3b22b..a05df64 100755..100644
--- a/rtl8723DS/hal/phydm/phydm.mk
+++ b/rtl8723DS/hal/phydm/phydm.mk
@@ -16,7 +16,6 @@ _PHYDM_FILES := hal/phydm/phydm_debug.o	\
 								hal/phydm/phydm_adaptivity.o\
 								hal/phydm/phydm_cfotracking.o\
 								hal/phydm/phydm_noisemonitor.o\
-								hal/phydm/phydm_acs.o\
 								hal/phydm/phydm_beamforming.o\
 								hal/phydm/phydm_dfs.o\
 								hal/phydm/txbf/halcomtxbf.o\
@@ -32,7 +31,11 @@ _PHYDM_FILES := hal/phydm/phydm_debug.o	\
 								hal/phydm/phydm_math_lib.o\
 								hal/phydm/phydm_api.o\
 								hal/phydm/phydm_pow_train.o\
+								hal/phydm/phydm_lna_sat.o\
+								hal/phydm/phydm_pmac_tx_setting.o\
+								hal/phydm/phydm_mp.o\
 								hal/phydm/halrf/halrf.o\
+								hal/phydm/halrf/halrf_debug.o\
 								hal/phydm/halrf/halphyrf_ce.o\
 								hal/phydm/halrf/halrf_powertracking_ce.o\
 								hal/phydm/halrf/halrf_powertracking.o\
@@ -109,15 +112,6 @@ _PHYDM_FILES += hal/phydm/$(RTL871X)/halhwimg8814a_bb.o\
 								hal/phydm/txbf/haltxbf8814a.o
 endif
 
-ifeq ($(CONFIG_RTL8710B), y)
-RTL871X = rtl8710b
-_PHYDM_FILES += hal/phydm/$(RTL871X)/halhwimg8710b_bb.o\
-								hal/phydm/$(RTL871X)/halhwimg8710b_mac.o\
-								hal/phydm/$(RTL871X)/halhwimg8710b_rf.o\
-								hal/phydm/$(RTL871X)/phydm_regconfig8710b.o\
-								hal/phydm/$(RTL871X)/phydm_rtl8710b.o\
-								hal/phydm/halrf/$(RTL871X)/halrf_8710b.o
-endif
 
 ifeq ($(CONFIG_RTL8723C), y)
 RTL871X = rtl8703b
@@ -125,6 +119,7 @@ _PHYDM_FILES += hal/phydm/$(RTL871X)/halhwimg8703b_bb.o\
 								hal/phydm/$(RTL871X)/halhwimg8703b_mac.o\
 								hal/phydm/$(RTL871X)/halhwimg8703b_rf.o\
 								hal/phydm/$(RTL871X)/phydm_regconfig8703b.o\
+								hal/phydm/$(RTL871X)/phydm_rtl8703b.o\
 								hal/phydm/halrf/$(RTL871X)/halrf_8703b.o
 endif
 
@@ -139,6 +134,17 @@ _PHYDM_FILES += hal/phydm/$(RTL871X)/halhwimg8723d_bb.o\
 endif
 
 
+ifeq ($(CONFIG_RTL8710B), y)
+RTL871X = rtl8710b
+_PHYDM_FILES += hal/phydm/$(RTL871X)/halhwimg8710b_bb.o\
+								hal/phydm/$(RTL871X)/halhwimg8710b_mac.o\
+								hal/phydm/$(RTL871X)/halhwimg8710b_rf.o\
+								hal/phydm/$(RTL871X)/phydm_regconfig8710b.o\
+								hal/phydm/$(RTL871X)/phydm_rtl8710b.o\
+								hal/phydm/halrf/$(RTL871X)/halrf_8710b.o
+endif
+
+
 ifeq ($(CONFIG_RTL8188F), y)
 RTL871X = rtl8188f
 _PHYDM_FILES += hal/phydm/$(RTL871X)/halhwimg8188f_bb.o\
@@ -157,6 +163,7 @@ _PHYDM_FILES +=	hal/phydm/$(RTL871X)/halhwimg8822b_bb.o \
 								hal/phydm/halrf/$(RTL871X)/halrf_8822b.o \
 								hal/phydm/$(RTL871X)/phydm_hal_api8822b.o \
 								hal/phydm/halrf/$(RTL871X)/halrf_iqk_8822b.o \
+								hal/phydm/halrf/$(RTL871X)/halrf_rfk_init_8822b.o \
 								hal/phydm/$(RTL871X)/phydm_regconfig8822b.o \
 								hal/phydm/$(RTL871X)/phydm_rtl8822b.o
 
@@ -173,4 +180,47 @@ _PHYDM_FILES +=	hal/phydm/$(RTL871X)/halhwimg8821c_bb.o \
 								hal/phydm/$(RTL871X)/phydm_regconfig8821c.o\
 								hal/phydm/halrf/$(RTL871X)/halrf_8821c.o\
 								hal/phydm/halrf/$(RTL871X)/halrf_iqk_8821c.o
+endif
+ifeq ($(CONFIG_RTL8192F), y)
+RTL871X = rtl8192f
+_PHYDM_FILES += hal/phydm/$(RTL871X)/halhwimg8192f_bb.o\
+								hal/phydm/$(RTL871X)/halhwimg8192f_mac.o\
+								hal/phydm/$(RTL871X)/halhwimg8192f_rf.o\
+								hal/phydm/$(RTL871X)/phydm_hal_api8192f.o\
+								hal/phydm/$(RTL871X)/phydm_regconfig8192f.o\
+								hal/phydm/$(RTL871X)/phydm_rtl8192f.o\
+								hal/phydm/halrf/$(RTL871X)/halrf_8192f.o	
+endif
+
+ifeq ($(CONFIG_RTL8198F), y)
+RTL871X = rtl8198f
+_PHYDM_FILES += hal/phydm/$(RTL871X)/halhwimg8198f_bb.o\
+								hal/phydm/$(RTL871X)/halhwimg8198f_mac.o\
+								hal/phydm/$(RTL871X)/halhwimg8198f_rf.o\
+								hal/phydm/$(RTL871X)/phydm_hal_api8198f.o\
+								hal/phydm/$(RTL871X)/phydm_regconfig8198f.o
+endif
+
+ifeq ($(CONFIG_RTL8822C), y)
+RTL871X = rtl8822c
+_PHYDM_FILES += hal/phydm/$(RTL871X)/halhwimg8822c_bb.o\
+								hal/phydm/$(RTL871X)/halhwimg8822c_mac.o\
+								hal/phydm/$(RTL871X)/halhwimg8822c_rf.o\
+								hal/phydm/$(RTL871X)/phydm_hal_api8822c.o\
+								hal/phydm/$(RTL871X)/phydm_regconfig8822c.o\
+								hal/phydm/halrf/$(RTL871X)/halrf_8822c.o\
+								hal/phydm/halrf/$(RTL871X)/halrf_iqk_8822c.o\
+								hal/phydm/halrf/$(RTL871X)/halrf_tssi_8822c.o\
+								hal/phydm/halrf/$(RTL871X)/halrf_dpk_8822c.o\
+								hal/phydm/halrf/$(RTL871X)/halrf_rfk_init_8822c.o
+endif
+
+ifeq ($(CONFIG_RTL8814B), y)
+RTL871X = rtl8814b
+_PHYDM_FILES += hal/phydm/$(RTL871X)/halhwimg8814b_bb.o\
+								hal/phydm/$(RTL871X)/phydm_hal_api8814b.o\
+								hal/phydm/$(RTL871X)/phydm_regconfig8814b.o\
+								hal/phydm/halrf/$(RTL871X)/halrf_8814b.o \
+								hal/phydm/halrf/$(RTL871X)/halrf_iqk_8814b.o \
+								hal/phydm/halrf/$(RTL871X)/halrf_rfk_init_8814b.o
 endif
\ No newline at end of file
diff --git a/rtl8723DS/hal/phydm/phydm_acs.c b/rtl8723DS/hal/phydm/phydm_acs.c
deleted file mode 100755
index 053ecfc..0000000
--- a/rtl8723DS/hal/phydm/phydm_acs.c
+++ b/dev/null
@@ -1,1151 +0,0 @@
-/******************************************************************************
- *
- * Copyright(c) 2007 - 2017 Realtek Corporation.
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of version 2 of the GNU General Public License as
- * published by the Free Software Foundation.
- *
- * This program is distributed in the hope that it will be useful, but WITHOUT
- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
- * more details.
- *
- *****************************************************************************/
-
-/* ************************************************************
- * include files
- * ************************************************************ */
-#include "mp_precomp.h"
-#include "phydm_precomp.h"
-
-
-u8
-odm_get_auto_channel_select_result(
-	void			*p_dm_void,
-	u8			band
-)
-{
-	struct PHY_DM_STRUCT		*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	struct _ACS_					*p_acs = &p_dm->dm_acs;
-
-	PHYDM_DBG(p_dm, ODM_COMP_API, ("%s ======>\n", __func__));
-
-#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_CE))
-	if (band == ODM_BAND_2_4G) {
-		PHYDM_DBG(p_dm, ODM_COMP_API, ("clean_CH_2g=%d\n", p_acs->clean_channel_2g));
-		return (u8)p_acs->clean_channel_2g;
-	} else {
-		PHYDM_DBG(p_dm, ODM_COMP_API, ("clean_CH_5g=%d\n", p_acs->clean_channel_5g));
-		return (u8)p_acs->clean_channel_5g;
-	}
-#else
-	return (u8)p_acs->clean_channel_2g;
-#endif
-
-}
-
-void
-odm_auto_channel_select_init(
-	void			*p_dm_void
-)
-{
-#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_CE))
-	struct PHY_DM_STRUCT					*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	struct _ACS_						*p_acs = &p_dm->dm_acs;
-	u8						i;
-
-	if (!(p_dm->support_ability & ODM_BB_ENV_MONITOR))
-		return;
-
-	if (p_acs->is_force_acs_result)
-		return;
-
-	PHYDM_DBG(p_dm, ODM_COMP_API, ("%s ======>\n", __func__));
-
-	p_acs->clean_channel_2g = 1;
-	p_acs->clean_channel_5g = 36;
-
-	for (i = 0; i < ODM_MAX_CHANNEL_2G; ++i) {
-		p_acs->channel_info_2g[0][i] = 0;
-		p_acs->channel_info_2g[1][i] = 0;
-	}
-
-	if (p_dm->support_ic_type & ODM_IC_11AC_SERIES) {
-		for (i = 0; i < ODM_MAX_CHANNEL_5G; ++i) {
-			p_acs->channel_info_5g[0][i] = 0;
-			p_acs->channel_info_5g[1][i] = 0;
-		}
-	}
-#endif
-}
-
-void
-odm_auto_channel_select_reset(
-	void			*p_dm_void
-)
-{
-#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_CE))
-	struct PHY_DM_STRUCT					*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	struct _ACS_						*p_acs = &p_dm->dm_acs;
-	struct _CCX_INFO		*ccx_info = &p_dm->dm_ccx_info;
-
-	if (!(p_dm->support_ability & ODM_BB_ENV_MONITOR))
-		return;
-
-	if (p_acs->is_force_acs_result)
-		return;
-
-	PHYDM_DBG(p_dm, ODM_COMP_API, ("%s ======>\n", __func__));
-
-	ccx_info->nhm_period = 0x1388;	/*20ms*/
-	phydm_nhm_setting(p_dm, SET_NHM_SETTING);
-	phydm_nhm_trigger(p_dm);
-#endif
-}
-
-void
-odm_auto_channel_select(
-	void			*p_dm_void,
-	u8			channel
-)
-{
-#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_CE))
-	struct PHY_DM_STRUCT					*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	struct _ACS_						*p_acs = &p_dm->dm_acs;
-	struct _CCX_INFO		*ccx_info = &p_dm->dm_ccx_info;
-	u8						channel_idx = 0, search_idx = 0;
-	u8						noisy_nhm_th = 0x52;
-	u8						i, noisy_nhm_th_index, low_pwr_cnt = 0;
-	u16						max_score = 0;
-
-	PHYDM_DBG(p_dm, ODM_COMP_API, ("%s ======>\n", __func__));
-
-	if (!(p_dm->support_ability & ODM_BB_ENV_MONITOR)) {
-		PHYDM_DBG(p_dm, DBG_DIG, ("Return: Not support\n"));
-		return;
-	}
-
-	if (p_acs->is_force_acs_result) {
-		PHYDM_DBG(p_dm, DBG_DIG, ("Force clean CH{2G,5G}={%d,%d}\n",
-			p_acs->clean_channel_2g, p_acs->clean_channel_5g));
-		return;
-	}
-
-	PHYDM_DBG(p_dm, ODM_COMP_API, ("CH=%d\n", channel));
-
-	phydm_get_nhm_result(p_dm);
-	noisy_nhm_th_index = (noisy_nhm_th - ccx_info->nhm_th[0]) << 2;
-
-	for (i = 0; i <= 11; i++) {
-		if (i <= noisy_nhm_th_index)
-			low_pwr_cnt += ccx_info->nhm_result[i];
-	}
-
-	ccx_info->nhm_period = 0x2710;
-	phydm_nhm_setting(p_dm, SET_NHM_SETTING);
-
-	if (channel >= 1 && channel <= 14) {
-		channel_idx = channel - 1;
-		p_acs->channel_info_2g[1][channel_idx]++;
-
-		if (p_acs->channel_info_2g[1][channel_idx] >= 2)
-			p_acs->channel_info_2g[0][channel_idx] = (p_acs->channel_info_2g[0][channel_idx] >> 1) +
-				(p_acs->channel_info_2g[0][channel_idx] >> 2) + (low_pwr_cnt >> 2);
-		else
-			p_acs->channel_info_2g[0][channel_idx] = low_pwr_cnt;
-
-		PHYDM_DBG(p_dm, ODM_COMP_API, ("low_pwr_cnt = %d\n", low_pwr_cnt));
-		PHYDM_DBG(p_dm, ODM_COMP_API, ("CH_Info[0][%d]=%d, CH_Info[1][%d]=%d\n", channel_idx, p_acs->channel_info_2g[0][channel_idx], channel_idx, p_acs->channel_info_2g[1][channel_idx]));
-
-		for (search_idx = 0; search_idx < ODM_MAX_CHANNEL_2G; search_idx++) {
-			if (p_acs->channel_info_2g[1][search_idx] != 0 && p_acs->channel_info_2g[0][search_idx] >= max_score) {
-				max_score = p_acs->channel_info_2g[0][search_idx];
-				p_acs->clean_channel_2g = search_idx + 1;
-			}
-		}
-		PHYDM_DBG(p_dm, ODM_COMP_API, ("clean_CH_2g=%d, max_score=%d\n",
-				p_acs->clean_channel_2g, max_score));
-
-	} else if (channel >= 36) {
-		/* Need to do */
-		p_acs->clean_channel_5g = channel;
-	}
-#endif
-}
-
-boolean
-phydm_acs_check(
-	void	*p_dm_void
-)
-{
-#if (DM_ODM_SUPPORT_TYPE == ODM_AP)
-	struct PHY_DM_STRUCT	*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	struct rtl8192cd_priv		*priv = p_dm->priv;
-
-	if ((priv->auto_channel != 0) && (priv->auto_channel != 2)) /* if struct _ACS_ running, do not do FA/CCA counter read */
-		return true;
-	else
-		return false;
-#else
-	return false;
-#endif
-}
-
-#if (DM_ODM_SUPPORT_TYPE & ODM_AP)
-
-void
-phydm_auto_channel_select_setting_ap(
-	void   *p_dm_void,
-	u32  setting,             /* 0: STORE_DEFAULT_NHM_SETTING; 1: RESTORE_DEFAULT_NHM_SETTING, 2: ACS_NHM_SETTING */
-	u32  acs_step
-)
-{
-	struct PHY_DM_STRUCT           *p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	struct rtl8192cd_priv       *priv           = p_dm->priv;
-	struct _ACS_                    *p_acs         = &p_dm->dm_acs;
-
-	PHYDM_DBG(p_dm, ODM_COMP_API, ("%s ======>\n", __func__));
-
-	/* 3 Store Default setting */
-	if (setting == STORE_DEFAULT_NHM_SETTING) {
-		PHYDM_DBG(p_dm, ODM_COMP_API, ("STORE_DEFAULT_NHM_SETTING\n"));
-
-		if (p_dm->support_ic_type & ODM_IC_11AC_SERIES) {  /* store reg0x990, reg0x994, reg0x998, reg0x99c, Reg0x9a0 */
-			p_acs->reg0x990 = odm_read_4byte(p_dm, ODM_REG_CCX_PERIOD_11AC);                /* reg0x990 */
-			p_acs->reg0x994 = odm_read_4byte(p_dm, ODM_REG_NHM_TH9_TH10_11AC);           /* reg0x994 */
-			p_acs->reg0x998 = odm_read_4byte(p_dm, ODM_REG_NHM_TH3_TO_TH0_11AC);       /* reg0x998 */
-			p_acs->reg0x99c = odm_read_4byte(p_dm, ODM_REG_NHM_TH7_TO_TH4_11AC);       /* Reg0x99c */
-			p_acs->reg0x9a0 = odm_read_1byte(p_dm, ODM_REG_NHM_TH8_11AC);                   /* Reg0x9a0, u8 */
-		} else if (p_dm->support_ic_type & ODM_IC_11N_SERIES) {
-			p_acs->reg0x890 = odm_read_4byte(p_dm, ODM_REG_NHM_TH9_TH10_11N);             /* reg0x890 */
-			p_acs->reg0x894 = odm_read_4byte(p_dm, ODM_REG_CCX_PERIOD_11N);                  /* reg0x894 */
-			p_acs->reg0x898 = odm_read_4byte(p_dm, ODM_REG_NHM_TH3_TO_TH0_11N);         /* reg0x898 */
-			p_acs->reg0x89c = odm_read_4byte(p_dm, ODM_REG_NHM_TH7_TO_TH4_11N);         /* Reg0x89c */
-			p_acs->reg0xe28 = odm_read_1byte(p_dm, ODM_REG_NHM_TH8_11N);                     /* Reg0xe28, u8 */
-		}
-	}
-
-	/* 3 Restore Default setting */
-	else if (setting == RESTORE_DEFAULT_NHM_SETTING) {
-		PHYDM_DBG(p_dm, ODM_COMP_API, ("RESTORE_DEFAULT_NHM_SETTING\n"));
-
-		if (p_dm->support_ic_type & ODM_IC_11AC_SERIES) {  /* store reg0x990, reg0x994, reg0x998, reg0x99c, Reg0x9a0 */
-			odm_write_4byte(p_dm, ODM_REG_CCX_PERIOD_11AC,          p_acs->reg0x990);
-			odm_write_4byte(p_dm, ODM_REG_NHM_TH9_TH10_11AC,     p_acs->reg0x994);
-			odm_write_4byte(p_dm, ODM_REG_NHM_TH3_TO_TH0_11AC, p_acs->reg0x998);
-			odm_write_4byte(p_dm, ODM_REG_NHM_TH7_TO_TH4_11AC, p_acs->reg0x99c);
-			odm_write_1byte(p_dm, ODM_REG_NHM_TH8_11AC,             p_acs->reg0x9a0);
-		} else if (p_dm->support_ic_type & ODM_IC_11N_SERIES) {
-			odm_write_4byte(p_dm, ODM_REG_NHM_TH9_TH10_11N,     p_acs->reg0x890);
-			odm_write_4byte(p_dm, ODM_REG_CCX_PERIOD_11AC,          p_acs->reg0x894);
-			odm_write_4byte(p_dm, ODM_REG_NHM_TH3_TO_TH0_11N, p_acs->reg0x898);
-			odm_write_4byte(p_dm, ODM_REG_NHM_TH7_TO_TH4_11N, p_acs->reg0x89c);
-			odm_write_1byte(p_dm, ODM_REG_NHM_TH8_11N,             p_acs->reg0xe28);
-		}
-	}
-
-	/* 3 struct _ACS_ setting */
-	else if (setting == ACS_NHM_SETTING) {
-		PHYDM_DBG(p_dm, ODM_COMP_API, ("ACS_NHM_SETTING\n"));
-		u16  period;
-		period = 0x61a8;
-		p_acs->acs_step = acs_step;
-
-		if (p_dm->support_ic_type & ODM_IC_11AC_SERIES) {
-			/* 4 Set NHM period, 0x990[31:16]=0x61a8, Time duration for NHM unit: 4us, 0x61a8=100ms */
-			odm_write_2byte(p_dm, ODM_REG_CCX_PERIOD_11AC + 2, period);
-			/* 4 Set NHM ignore_cca=1, ignore_txon=1, ccx_en=0 */
-			odm_set_bb_reg(p_dm, ODM_REG_NHM_TH9_TH10_11AC, BIT(8) | BIT(9) | BIT(10), 3);
-
-			if (p_acs->acs_step == 0) {
-				/* 4 Set IGI */
-				odm_set_bb_reg(p_dm, 0xc50, BIT(0) | BIT(1) | BIT(2) | BIT(3) | BIT(4) | BIT(5) | BIT(6), 0x3E);
-				if (get_rf_mimo_mode(priv) != RF_1T1R)
-					odm_set_bb_reg(p_dm, 0xe50, BIT(0) | BIT(1) | BIT(2) | BIT(3) | BIT(4) | BIT(5) | BIT(6), 0x3E);
-
-				/* 4 Set struct _ACS_ NHM threshold */
-				odm_write_4byte(p_dm, ODM_REG_NHM_TH3_TO_TH0_11AC, 0x82786e64);
-				odm_write_4byte(p_dm, ODM_REG_NHM_TH7_TO_TH4_11AC, 0xffffff8c);
-				odm_write_1byte(p_dm, ODM_REG_NHM_TH8_11AC, 0xff);
-				odm_write_2byte(p_dm, ODM_REG_NHM_TH9_TH10_11AC + 2, 0xffff);
-
-			} else if (p_acs->acs_step == 1) {
-				/* 4 Set IGI */
-				odm_set_bb_reg(p_dm, 0xc50, BIT(0) | BIT(1) | BIT(2) | BIT(3) | BIT(4) | BIT(5) | BIT(6), 0x2A);
-				if (get_rf_mimo_mode(priv) != RF_1T1R)
-					odm_set_bb_reg(p_dm, 0xe50, BIT(0) | BIT(1) | BIT(2) | BIT(3) | BIT(4) | BIT(5) | BIT(6), 0x2A);
-
-				/* 4 Set struct _ACS_ NHM threshold */
-				odm_write_4byte(p_dm, ODM_REG_NHM_TH3_TO_TH0_11AC, 0x5a50463c);
-				odm_write_4byte(p_dm, ODM_REG_NHM_TH7_TO_TH4_11AC, 0xffffff64);
-
-			}
-
-		} else if (p_dm->support_ic_type & ODM_IC_11N_SERIES) {
-			/* 4 Set NHM period, 0x894[31:16]=0x61a8, Time duration for NHM unit: 4us, 0x61a8=100ms */
-			odm_write_2byte(p_dm, ODM_REG_CCX_PERIOD_11AC + 2, period);
-			/* 4 Set NHM ignore_cca=1, ignore_txon=1, ccx_en=0 */
-			odm_set_bb_reg(p_dm, ODM_REG_NHM_TH9_TH10_11N, BIT(8) | BIT(9) | BIT(10), 3);
-
-			if (p_acs->acs_step == 0) {
-				/* 4 Set IGI */
-				odm_set_bb_reg(p_dm, 0xc50, BIT(0) | BIT(1) | BIT(2) | BIT(3) | BIT(4) | BIT(5) | BIT(6), 0x3E);
-				if (get_rf_mimo_mode(priv) != RF_1T1R)
-					odm_set_bb_reg(p_dm, 0xc58, BIT(0) | BIT(1) | BIT(2) | BIT(3) | BIT(4) | BIT(5) | BIT(6), 0x3E);
-
-				/* 4 Set struct _ACS_ NHM threshold */
-				odm_write_4byte(p_dm, ODM_REG_NHM_TH3_TO_TH0_11N, 0x82786e64);
-				odm_write_4byte(p_dm, ODM_REG_NHM_TH7_TO_TH4_11N, 0xffffff8c);
-				odm_write_1byte(p_dm, ODM_REG_NHM_TH8_11N, 0xff);
-				odm_write_2byte(p_dm, ODM_REG_NHM_TH9_TH10_11N + 2, 0xffff);
-
-			} else if (p_acs->acs_step == 1) {
-				/* 4 Set IGI */
-				odm_set_bb_reg(p_dm, 0xc50, BIT(0) | BIT(1) | BIT(2) | BIT(3) | BIT(4) | BIT(5) | BIT(6), 0x2A);
-				if (get_rf_mimo_mode(priv) != RF_1T1R)
-					odm_set_bb_reg(p_dm, 0xc58, BIT(0) | BIT(1) | BIT(2) | BIT(3) | BIT(4) | BIT(5) | BIT(6), 0x2A);
-
-				/* 4 Set struct _ACS_ NHM threshold */
-				odm_write_4byte(p_dm, ODM_REG_NHM_TH3_TO_TH0_11N, 0x5a50463c);
-				odm_write_4byte(p_dm, ODM_REG_NHM_TH7_TO_TH4_11N, 0xffffff64);
-
-			}
-		}
-	}
-
-}
-
-void
-phydm_get_nhm_statistics_ap(
-	void       *p_dm_void,
-	u32      idx,                /* @ 2G, Real channel number = idx+1 */
-	u32      acs_step
-)
-{
-	struct PHY_DM_STRUCT	*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	struct rtl8192cd_priv     *priv    = p_dm->priv;
-	struct _ACS_                  *p_acs    = &p_dm->dm_acs;
-	u32                value32 = 0;
-	u8                i;
-
-	p_acs->acs_step = acs_step;
-
-	if (p_dm->support_ic_type & ODM_IC_11N_SERIES) {
-		/* 4 Check if NHM result is ready */
-		for (i = 0; i < 20; i++) {
-
-			ODM_delay_ms(1);
-			if (odm_get_bb_reg(p_dm, REG_FPGA0_PSD_REPORT, BIT(17)))
-				break;
-		}
-
-		/* 4 Get NHM Statistics */
-		if (p_acs->acs_step == 1) {
-
-			value32 = odm_read_4byte(p_dm, ODM_REG_NHM_CNT7_TO_CNT4_11N);
-
-			p_acs->nhm_cnt[idx][9] = (value32 & MASKBYTE1) >> 8;
-			p_acs->nhm_cnt[idx][8] = (value32 & MASKBYTE0);
-
-			value32 = odm_read_4byte(p_dm, ODM_REG_NHM_CNT_11N);   /* ODM_REG_NHM_CNT3_TO_CNT0_11N */
-
-			p_acs->nhm_cnt[idx][7] = (value32 & MASKBYTE3) >> 24;
-			p_acs->nhm_cnt[idx][6] = (value32 & MASKBYTE2) >> 16;
-			p_acs->nhm_cnt[idx][5] = (value32 & MASKBYTE1) >> 8;
-
-		} else if (p_acs->acs_step == 2) {
-
-			value32 = odm_read_4byte(p_dm, ODM_REG_NHM_CNT_11N);  /* ODM_REG_NHM_CNT3_TO_CNT0_11N */
-
-			p_acs->nhm_cnt[idx][4] = odm_read_1byte(p_dm, ODM_REG_NHM_CNT7_TO_CNT4_11N);
-			p_acs->nhm_cnt[idx][3] = (value32 & MASKBYTE3) >> 24;
-			p_acs->nhm_cnt[idx][2] = (value32 & MASKBYTE2) >> 16;
-			p_acs->nhm_cnt[idx][1] = (value32 & MASKBYTE1) >> 8;
-			p_acs->nhm_cnt[idx][0] = (value32 & MASKBYTE0);
-		}
-	} else if (p_dm->support_ic_type & ODM_IC_11AC_SERIES) {
-		/* 4 Check if NHM result is ready */
-		for (i = 0; i < 20; i++) {
-
-			ODM_delay_ms(1);
-			if (odm_get_bb_reg(p_dm, ODM_REG_NHM_DUR_READY_11AC, BIT(16)))
-				break;
-		}
-
-		if (p_acs->acs_step == 1) {
-
-			value32 = odm_read_4byte(p_dm, ODM_REG_NHM_CNT7_TO_CNT4_11AC);
-
-			p_acs->nhm_cnt[idx][9] = (value32 & MASKBYTE1) >> 8;
-			p_acs->nhm_cnt[idx][8] = (value32 & MASKBYTE0);
-
-			value32 = odm_read_4byte(p_dm, ODM_REG_NHM_CNT_11AC);    /* ODM_REG_NHM_CNT3_TO_CNT0_11AC */
-
-			p_acs->nhm_cnt[idx][7] = (value32 & MASKBYTE3) >> 24;
-			p_acs->nhm_cnt[idx][6] = (value32 & MASKBYTE2) >> 16;
-			p_acs->nhm_cnt[idx][5] = (value32 & MASKBYTE1) >> 8;
-
-		} else if (p_acs->acs_step == 2) {
-
-			value32 = odm_read_4byte(p_dm, ODM_REG_NHM_CNT_11AC);     /* ODM_REG_NHM_CNT3_TO_CNT0_11AC */
-
-			p_acs->nhm_cnt[idx][4] = odm_read_1byte(p_dm, ODM_REG_NHM_CNT7_TO_CNT4_11AC);
-			p_acs->nhm_cnt[idx][3] = (value32 & MASKBYTE3) >> 24;
-			p_acs->nhm_cnt[idx][2] = (value32 & MASKBYTE2) >> 16;
-			p_acs->nhm_cnt[idx][1] = (value32 & MASKBYTE1) >> 8;
-			p_acs->nhm_cnt[idx][0] = (value32 & MASKBYTE0);
-		}
-	}
-
-}
-
-
-/* #define ACS_DEBUG_INFO */ /* acs debug default off */
-#if 0
-int phydm_AutoChannelSelectAP(
-	void   *p_dm_void,
-	u32  ACS_Type,                      /*  0: RXCount_Type, 1:NHM_Type */
-	u32  available_chnl_num        /*  amount of all channels */
-)
-{
-	struct PHY_DM_STRUCT               *p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	struct _ACS_                    *p_acs    = &p_dm->dm_acs;
-	struct rtl8192cd_priv			*priv    = p_dm->priv;
-
-	static u32           score2G[MAX_2G_CHANNEL_NUM], score5G[MAX_5G_CHANNEL_NUM];
-	u32                  score[MAX_BSS_NUM], use_nhm = 0;
-	u32                  minScore = 0xffffffff;
-	u32                  tmpScore, tmpIdx = 0;
-	u32                  traffic_check = 0;
-	u32                  fa_count_weighting = 1;
-	int                     i, j, idx = 0, idx_2G_end = -1, idx_5G_begin = -1, minChan = 0;
-	struct bss_desc *pBss = NULL;
-
-#ifdef _DEBUG_RTL8192CD_
-	char tmpbuf[400];
-	int len = 0;
-#endif
-
-	memset(score2G, '\0', sizeof(score2G));
-	memset(score5G, '\0', sizeof(score5G));
-
-	for (i = 0; i < priv->available_chnl_num; i++) {
-		if (priv->available_chnl[i] <= 14)
-			idx_2G_end = i;
-		else
-			break;
-	}
-
-	for (i = 0; i < priv->available_chnl_num; i++) {
-		if (priv->available_chnl[i] > 14) {
-			idx_5G_begin = i;
-			break;
-		}
-	}
-
-	/*  DELETE */
-#ifndef CONFIG_RTL_NEW_AUTOCH
-	for (i = 0; i < priv->site_survey->count; i++) {
-		pBss = &priv->site_survey->bss[i];
-		for (idx = 0; idx < priv->available_chnl_num; idx++) {
-			if (pBss->channel == priv->available_chnl[idx]) {
-				if (pBss->channel <= 14)
-					setChannelScore(idx, score2G, 0, MAX_2G_CHANNEL_NUM - 1);
-				else
-					score5G[idx - idx_5G_begin] += 5;
-				break;
-			}
-		}
-	}
-#endif
-
-	if (idx_2G_end >= 0)
-		for (i = 0; i <= idx_2G_end; i++)
-			score[i] = score2G[i];
-	if (idx_5G_begin >= 0)
-		for (i = idx_5G_begin; i < priv->available_chnl_num; i++)
-			score[i] = score5G[i - idx_5G_begin];
-
-#ifdef CONFIG_RTL_NEW_AUTOCH
-	{
-		u32 y, ch_begin = 0, ch_end = priv->available_chnl_num;
-
-		u32 do_ap_check = 1, ap_ratio = 0;
-
-		if (idx_2G_end >= 0)
-			ch_end = idx_2G_end + 1;
-		if (idx_5G_begin >= 0)
-			ch_begin = idx_5G_begin;
-
-#ifdef ACS_DEBUG_INFO/* for debug */
-		printk("\n");
-		for (y = ch_begin; y < ch_end; y++)
-			printk("1. init: chnl[%d] 20M_rx[%d] 40M_rx[%d] fa_cnt[%d] score[%d]\n",
-			       priv->available_chnl[y],
-			       priv->chnl_ss_mac_rx_count[y],
-			       priv->chnl_ss_mac_rx_count_40M[y],
-			       priv->chnl_ss_fa_count[y],
-			       score[y]);
-		printk("\n");
-#endif
-
-#if defined(CONFIG_RTL_88E_SUPPORT) || defined(CONFIG_WLAN_HAL_8192EE)
-		if (p_dm->support_ic_type & (ODM_RTL8188E | ODM_RTL8192E) && priv->pmib->dot11RFEntry.acs_type) {
-			u32 tmp_score[MAX_BSS_NUM];
-			memcpy(tmp_score, score, sizeof(score));
-			if (find_clean_channel(priv, ch_begin, ch_end, tmp_score)) {
-				/* memcpy(score, tmp_score, sizeof(score)); */
-#ifdef _DEBUG_RTL8192CD_
-				printk("!! Found clean channel, select minimum FA channel\n");
-#endif
-				goto USE_CLN_CH;
-			}
-#ifdef _DEBUG_RTL8192CD_
-			printk("!! Not found clean channel, use NHM algorithm\n");
-#endif
-			use_nhm = 1;
-USE_CLN_CH:
-			for (y = ch_begin; y < ch_end; y++) {
-				for (i = 0; i <= 9; i++) {
-					u32 val32 = priv->nhm_cnt[y][i];
-					for (j = 0; j < i; j++)
-						val32 *= 3;
-					score[y] += val32;
-				}
-
-#ifdef _DEBUG_RTL8192CD_
-				printk("nhm_cnt_%d: H<-[ %3d %3d %3d %3d %3d %3d %3d %3d %3d %3d]->L, score: %d\n",
-				       y + 1, priv->nhm_cnt[y][9], priv->nhm_cnt[y][8], priv->nhm_cnt[y][7],
-				       priv->nhm_cnt[y][6], priv->nhm_cnt[y][5], priv->nhm_cnt[y][4],
-				       priv->nhm_cnt[y][3], priv->nhm_cnt[y][2], priv->nhm_cnt[y][1],
-				       priv->nhm_cnt[y][0], score[y]);
-#endif
-			}
-
-			if (!use_nhm)
-				memcpy(score, tmp_score, sizeof(score));
-
-			goto choose_ch;
-		}
-#endif
-
-		/*  For each channel, weighting behind channels with MAC RX counter */
-		/* For each channel, weighting the channel with FA counter */
-
-		for (y = ch_begin; y < ch_end; y++) {
-			score[y] += 8 * priv->chnl_ss_mac_rx_count[y];
-			if (priv->chnl_ss_mac_rx_count[y] > 30)
-				do_ap_check = 0;
-			if (priv->chnl_ss_mac_rx_count[y] > MAC_RX_COUNT_THRESHOLD)
-				traffic_check = 1;
-
-#ifdef RTK_5G_SUPPORT
-			if (*p_dm->p_band_type == ODM_BAND_2_4G)
-#endif
-			{
-				if ((int)(y - 4) >= (int)ch_begin)
-					score[y - 4] += 2 * priv->chnl_ss_mac_rx_count[y];
-				if ((int)(y - 3) >= (int)ch_begin)
-					score[y - 3] += 8 * priv->chnl_ss_mac_rx_count[y];
-				if ((int)(y - 2) >= (int)ch_begin)
-					score[y - 2] += 8 * priv->chnl_ss_mac_rx_count[y];
-				if ((int)(y - 1) >= (int)ch_begin)
-					score[y - 1] += 10 * priv->chnl_ss_mac_rx_count[y];
-				if ((int)(y + 1) < (int)ch_end)
-					score[y + 1] += 10 * priv->chnl_ss_mac_rx_count[y];
-				if ((int)(y + 2) < (int)ch_end)
-					score[y + 2] += 8 * priv->chnl_ss_mac_rx_count[y];
-				if ((int)(y + 3) < (int)ch_end)
-					score[y + 3] += 8 * priv->chnl_ss_mac_rx_count[y];
-				if ((int)(y + 4) < (int)ch_end)
-					score[y + 4] += 2 * priv->chnl_ss_mac_rx_count[y];
-			}
-
-			/* this is for CH_LOAD caculation */
-			if (priv->chnl_ss_cca_count[y] > priv->chnl_ss_fa_count[y])
-				priv->chnl_ss_cca_count[y] -= priv->chnl_ss_fa_count[y];
-			else
-				priv->chnl_ss_cca_count[y] = 0;
-		}
-
-#ifdef ACS_DEBUG_INFO/* for debug */
-		printk("\n");
-		for (y = ch_begin; y < ch_end; y++)
-			printk("2. after 20M check: chnl[%d] score[%d]\n", priv->available_chnl[y], score[y]);
-		printk("\n");
-#endif
-
-		for (y = ch_begin; y < ch_end; y++) {
-			if (priv->chnl_ss_mac_rx_count_40M[y]) {
-				score[y] += 5 * priv->chnl_ss_mac_rx_count_40M[y];
-				if (priv->chnl_ss_mac_rx_count_40M[y] > 30)
-					do_ap_check = 0;
-				if (priv->chnl_ss_mac_rx_count_40M[y] > MAC_RX_COUNT_THRESHOLD)
-					traffic_check = 1;
-
-#ifdef RTK_5G_SUPPORT
-				if (*p_dm->p_band_type == ODM_BAND_2_4G)
-#endif
-				{
-					if ((int)(y - 6) >= (int)ch_begin)
-						score[y - 6] += 1 * priv->chnl_ss_mac_rx_count_40M[y];
-					if ((int)(y - 5) >= (int)ch_begin)
-						score[y - 5] += 4 * priv->chnl_ss_mac_rx_count_40M[y];
-					if ((int)(y - 4) >= (int)ch_begin)
-						score[y - 4] += 4 * priv->chnl_ss_mac_rx_count_40M[y];
-					if ((int)(y - 3) >= (int)ch_begin)
-						score[y - 3] += 5 * priv->chnl_ss_mac_rx_count_40M[y];
-					if ((int)(y - 2) >= (int)ch_begin)
-						score[y - 2] += (5 * priv->chnl_ss_mac_rx_count_40M[y]) / 2;
-					if ((int)(y - 1) >= (int)ch_begin)
-						score[y - 1] += 5 * priv->chnl_ss_mac_rx_count_40M[y];
-					if ((int)(y + 1) < (int)ch_end)
-						score[y + 1] += 5 * priv->chnl_ss_mac_rx_count_40M[y];
-					if ((int)(y + 2) < (int)ch_end)
-						score[y + 2] += (5 * priv->chnl_ss_mac_rx_count_40M[y]) / 2;
-					if ((int)(y + 3) < (int)ch_end)
-						score[y + 3] += 5 * priv->chnl_ss_mac_rx_count_40M[y];
-					if ((int)(y + 4) < (int)ch_end)
-						score[y + 4] += 4 * priv->chnl_ss_mac_rx_count_40M[y];
-					if ((int)(y + 5) < (int)ch_end)
-						score[y + 5] += 4 * priv->chnl_ss_mac_rx_count_40M[y];
-					if ((int)(y + 6) < (int)ch_end)
-						score[y + 6] += 1 * priv->chnl_ss_mac_rx_count_40M[y];
-				}
-			}
-		}
-
-#ifdef ACS_DEBUG_INFO/* for debug */
-		printk("\n");
-		for (y = ch_begin; y < ch_end; y++)
-			printk("3. after 40M check: chnl[%d] score[%d]\n", priv->available_chnl[y], score[y]);
-		printk("\n");
-		printk("4. do_ap_check=%d traffic_check=%d\n", do_ap_check, traffic_check);
-		printk("\n");
-#endif
-
-		if (traffic_check == 0)
-			fa_count_weighting = 5;
-		else
-			fa_count_weighting = 1;
-
-		for (y = ch_begin; y < ch_end; y++)
-			score[y] += fa_count_weighting * priv->chnl_ss_fa_count[y];
-
-#ifdef ACS_DEBUG_INFO/* for debug */
-		printk("\n");
-		for (y = ch_begin; y < ch_end; y++)
-			printk("5. after fa check: chnl[%d] score[%d]\n", priv->available_chnl[y], score[y]);
-		printk("\n");
-#endif
-
-		if (do_ap_check) {
-			for (i = 0; i < priv->site_survey->count; i++) {
-				pBss = &priv->site_survey->bss[i];
-				for (y = ch_begin; y < ch_end; y++) {
-					if (pBss->channel == priv->available_chnl[y]) {
-						if (pBss->channel <= 14) {
-#ifdef ACS_DEBUG_INFO/* for debug */
-							printk("\n");
-							printk("chnl[%d] has ap rssi=%d bw[0x%02x]\n",
-							       pBss->channel, pBss->rssi, pBss->t_stamp[1]);
-							printk("\n");
-#endif
-							if (pBss->rssi > 60)
-								ap_ratio = 4;
-							else if (pBss->rssi > 35)
-								ap_ratio = 2;
-							else
-								ap_ratio = 1;
-
-							if ((pBss->t_stamp[1] & 0x6) == 0) {
-								score[y] += 50 * ap_ratio;
-								if ((int)(y - 4) >= (int)ch_begin)
-									score[y - 4] += 10 * ap_ratio;
-								if ((int)(y - 3) >= (int)ch_begin)
-									score[y - 3] += 20 * ap_ratio;
-								if ((int)(y - 2) >= (int)ch_begin)
-									score[y - 2] += 30 * ap_ratio;
-								if ((int)(y - 1) >= (int)ch_begin)
-									score[y - 1] += 40 * ap_ratio;
-								if ((int)(y + 1) < (int)ch_end)
-									score[y + 1] += 40 * ap_ratio;
-								if ((int)(y + 2) < (int)ch_end)
-									score[y + 2] += 30 * ap_ratio;
-								if ((int)(y + 3) < (int)ch_end)
-									score[y + 3] += 20 * ap_ratio;
-								if ((int)(y + 4) < (int)ch_end)
-									score[y + 4] += 10 * ap_ratio;
-							} else if ((pBss->t_stamp[1] & 0x4) == 0) {
-								score[y] += 50 * ap_ratio;
-								if ((int)(y - 3) >= (int)ch_begin)
-									score[y - 3] += 20 * ap_ratio;
-								if ((int)(y - 2) >= (int)ch_begin)
-									score[y - 2] += 30 * ap_ratio;
-								if ((int)(y - 1) >= (int)ch_begin)
-									score[y - 1] += 40 * ap_ratio;
-								if ((int)(y + 1) < (int)ch_end)
-									score[y + 1] += 50 * ap_ratio;
-								if ((int)(y + 2) < (int)ch_end)
-									score[y + 2] += 50 * ap_ratio;
-								if ((int)(y + 3) < (int)ch_end)
-									score[y + 3] += 50 * ap_ratio;
-								if ((int)(y + 4) < (int)ch_end)
-									score[y + 4] += 50 * ap_ratio;
-								if ((int)(y + 5) < (int)ch_end)
-									score[y + 5] += 40 * ap_ratio;
-								if ((int)(y + 6) < (int)ch_end)
-									score[y + 6] += 30 * ap_ratio;
-								if ((int)(y + 7) < (int)ch_end)
-									score[y + 7] += 20 * ap_ratio;
-							} else {
-								score[y] += 50 * ap_ratio;
-								if ((int)(y - 7) >= (int)ch_begin)
-									score[y - 7] += 20 * ap_ratio;
-								if ((int)(y - 6) >= (int)ch_begin)
-									score[y - 6] += 30 * ap_ratio;
-								if ((int)(y - 5) >= (int)ch_begin)
-									score[y - 5] += 40 * ap_ratio;
-								if ((int)(y - 4) >= (int)ch_begin)
-									score[y - 4] += 50 * ap_ratio;
-								if ((int)(y - 3) >= (int)ch_begin)
-									score[y - 3] += 50 * ap_ratio;
-								if ((int)(y - 2) >= (int)ch_begin)
-									score[y - 2] += 50 * ap_ratio;
-								if ((int)(y - 1) >= (int)ch_begin)
-									score[y - 1] += 50 * ap_ratio;
-								if ((int)(y + 1) < (int)ch_end)
-									score[y + 1] += 40 * ap_ratio;
-								if ((int)(y + 2) < (int)ch_end)
-									score[y + 2] += 30 * ap_ratio;
-								if ((int)(y + 3) < (int)ch_end)
-									score[y + 3] += 20 * ap_ratio;
-							}
-						} else {
-							if ((pBss->t_stamp[1] & 0x6) == 0)
-								score[y] += 500;
-							else if ((pBss->t_stamp[1] & 0x4) == 0) {
-								score[y] += 500;
-								if ((int)(y + 1) < (int)ch_end)
-									score[y + 1] += 500;
-							} else {
-								score[y] += 500;
-								if ((int)(y - 1) >= (int)ch_begin)
-									score[y - 1] += 500;
-							}
-						}
-						break;
-					}
-				}
-			}
-		}
-
-#ifdef ACS_DEBUG_INFO/* for debug */
-		printk("\n");
-		for (y = ch_begin; y < ch_end; y++)
-			printk("6. after ap check: chnl[%d]:%d\n", priv->available_chnl[y], score[y]);
-		printk("\n");
-#endif
-
-#ifdef SS_CH_LOAD_PROC
-
-		/*  caculate noise level -- suggested by wilson */
-		for (y = ch_begin; y < ch_end; y++)  {
-			int fa_lv = 0, cca_lv = 0;
-			if (priv->chnl_ss_fa_count[y] > 1000)
-				fa_lv = 100;
-			else if (priv->chnl_ss_fa_count[y] > 500)
-				fa_lv = 34 * (priv->chnl_ss_fa_count[y] - 500) / 500 + 66;
-			else if (priv->chnl_ss_fa_count[y] > 200)
-				fa_lv = 33 * (priv->chnl_ss_fa_count[y] - 200) / 300 + 33;
-			else if (priv->chnl_ss_fa_count[y] > 100)
-				fa_lv = 18 * (priv->chnl_ss_fa_count[y] - 100) / 100 + 15;
-			else
-				fa_lv = 15 * priv->chnl_ss_fa_count[y] / 100;
-			if (priv->chnl_ss_cca_count[y] > 400)
-				cca_lv = 100;
-			else if (priv->chnl_ss_cca_count[y] > 200)
-				cca_lv = 34 * (priv->chnl_ss_cca_count[y] - 200) / 200 + 66;
-			else if (priv->chnl_ss_cca_count[y] > 80)
-				cca_lv = 33 * (priv->chnl_ss_cca_count[y] - 80) / 120 + 33;
-			else if (priv->chnl_ss_cca_count[y] > 40)
-				cca_lv = 18 * (priv->chnl_ss_cca_count[y] - 40) / 40 + 15;
-			else
-				cca_lv = 15 * priv->chnl_ss_cca_count[y] / 40;
-
-			priv->chnl_ss_load[y] = (((fa_lv > cca_lv) ? fa_lv : cca_lv) * 75 + ((score[y] > 100) ? 100 : score[y]) * 25) / 100;
-
-			DEBUG_INFO("ch:%d f=%d (%d), c=%d (%d), fl=%d, cl=%d, sc=%d, cu=%d\n",
-				   priv->available_chnl[y],
-				   priv->chnl_ss_fa_count[y], fa_thd,
-				   priv->chnl_ss_cca_count[y], cca_thd,
-				   fa_lv,
-				   cca_lv,
-				   score[y],
-				   priv->chnl_ss_load[y]);
-
-		}
-#endif
-	}
-#endif
-
-choose_ch:
-
-#ifdef DFS
-	/*  heavy weighted DFS channel */
-	if (idx_5G_begin >= 0) {
-		for (i = idx_5G_begin; i < priv->available_chnl_num; i++) {
-			if (!priv->pmib->dot11DFSEntry.disable_DFS && is_DFS_channel(priv->available_chnl[i])
-			    && (score[i] != 0xffffffff))
-				score[i] += 1600;
-		}
-	}
-#endif
-
-
-	/* prevent Auto channel selecting wrong channel in 40M mode----------------- */
-	if ((priv->pmib->dot11BssType.net_work_type & WIRELESS_11N)
-	    && priv->pshare->is_40m_bw) {
-#if 0
-		if (GET_MIB(priv)->dot11nConfigEntry.dot11n2ndChOffset == 1) {
-			/* Upper Primary channel, cannot select the two lowest channels */
-			if (priv->pmib->dot11BssType.net_work_type & WIRELESS_11G) {
-				score[0] = 0xffffffff;
-				score[1] = 0xffffffff;
-				score[2] = 0xffffffff;
-				score[3] = 0xffffffff;
-				score[4] = 0xffffffff;
-
-				score[13] = 0xffffffff;
-				score[12] = 0xffffffff;
-				score[11] = 0xffffffff;
-			}
-
-			/*			if (priv->pmib->dot11BssType.net_work_type & WIRELESS_11A) { */
-			/*				score[idx_5G_begin] = 0xffffffff; */
-			/*				score[idx_5G_begin + 1] = 0xffffffff; */
-			/*			} */
-		} else if (GET_MIB(priv)->dot11nConfigEntry.dot11n2ndChOffset == 2) {
-			/* Lower Primary channel, cannot select the two highest channels */
-			if (priv->pmib->dot11BssType.net_work_type & WIRELESS_11G) {
-				score[0] = 0xffffffff;
-				score[1] = 0xffffffff;
-				score[2] = 0xffffffff;
-
-				score[13] = 0xffffffff;
-				score[12] = 0xffffffff;
-				score[11] = 0xffffffff;
-				score[10] = 0xffffffff;
-				score[9] = 0xffffffff;
-			}
-
-			/*			if (priv->pmib->dot11BssType.net_work_type & WIRELESS_11A) { */
-			/*				score[priv->available_chnl_num - 2] = 0xffffffff; */
-			/*				score[priv->available_chnl_num - 1] = 0xffffffff; */
-			/*			} */
-		}
-#endif
-		for (i = 0; i <= idx_2G_end; ++i)
-			if (priv->available_chnl[i] == 14)
-				score[i] = 0xffffffff;		/*  mask chan14 */
-
-#ifdef RTK_5G_SUPPORT
-		if (idx_5G_begin >= 0) {
-			for (i = idx_5G_begin; i < priv->available_chnl_num; i++) {
-				int ch = priv->available_chnl[i];
-				if (priv->available_chnl[i] > 144)
-					--ch;
-				if ((ch % 4) || ch == 140 || ch == 164)	/* mask ch 140, ch 165, ch 184... */
-					score[i] = 0xffffffff;
-			}
-		}
-#endif
-
-
-	}
-
-	if (priv->pmib->dot11RFEntry.disable_ch1213) {
-		for (i = 0; i <= idx_2G_end; ++i) {
-			int ch = priv->available_chnl[i];
-			if ((ch == 12) || (ch == 13))
-				score[i] = 0xffffffff;
-		}
-	}
-
-	if (((priv->pmib->dot11StationConfigEntry.dot11RegDomain == DOMAIN_GLOBAL) ||
-	     (priv->pmib->dot11StationConfigEntry.dot11RegDomain == DOMAIN_WORLD_WIDE)) &&
-	    (idx_2G_end >= 11) && (idx_2G_end < 14)) {
-		score[13] = 0xffffffff;	/*  mask chan14 */
-		score[12] = 0xffffffff; /*  mask chan13 */
-		score[11] = 0xffffffff; /*  mask chan12 */
-	}
-
-	/* ------------------------------------------------------------------ */
-
-#ifdef _DEBUG_RTL8192CD_
-	for (i = 0; i < priv->available_chnl_num; i++)
-		len += sprintf(tmpbuf + len, "ch%d:%u ", priv->available_chnl[i], score[i]);
-	strcat(tmpbuf, "\n");
-	panic_printk("%s", tmpbuf);
-
-#endif
-
-	if ((*p_dm->p_band_type == ODM_BAND_5G)
-	    && (priv->pmib->dot11nConfigEntry.dot11nUse40M == CHANNEL_WIDTH_80)) {
-		for (i = 0; i < priv->available_chnl_num; i++) {
-			if (is80MChannel(priv->available_chnl, priv->available_chnl_num, priv->available_chnl[i])) {
-				tmpScore = 0;
-				for (j = 0; j < 4; j++) {
-					if ((tmpScore != 0xffffffff) && (score[i + j] != 0xffffffff))
-						tmpScore += score[i + j];
-					else
-						tmpScore = 0xffffffff;
-				}
-				tmpScore = tmpScore / 4;
-				if (minScore > tmpScore) {
-					minScore = tmpScore;
-
-					tmpScore = 0xffffffff;
-					for (j = 0; j < 4; j++) {
-						if (score[i + j] < tmpScore) {
-							tmpScore = score[i + j];
-							tmpIdx = i + j;
-						}
-					}
-
-					idx = tmpIdx;
-				}
-				i += 3;
-			}
-		}
-		if (minScore == 0xffffffff) {
-			/*  there is no 80M channels */
-			priv->pshare->is_40m_bw = CHANNEL_WIDTH_20;
-			for (i = 0; i < priv->available_chnl_num; i++) {
-				if (score[i] < minScore) {
-					minScore = score[i];
-					idx = i;
-				}
-			}
-		}
-	} else if ((*p_dm->p_band_type == ODM_BAND_5G)
-		&& (priv->pmib->dot11nConfigEntry.dot11nUse40M == CHANNEL_WIDTH_40)) {
-		for (i = 0; i < priv->available_chnl_num; i++) {
-			if (is40MChannel(priv->available_chnl, priv->available_chnl_num, priv->available_chnl[i])) {
-				tmpScore = 0;
-				for (j = 0; j < 2; j++) {
-					if ((tmpScore != 0xffffffff) && (score[i + j] != 0xffffffff))
-						tmpScore += score[i + j];
-					else
-						tmpScore = 0xffffffff;
-				}
-				tmpScore = tmpScore / 2;
-				if (minScore > tmpScore) {
-					minScore = tmpScore;
-
-					tmpScore = 0xffffffff;
-					for (j = 0; j < 2; j++) {
-						if (score[i + j] < tmpScore) {
-							tmpScore = score[i + j];
-							tmpIdx = i + j;
-						}
-					}
-
-					idx = tmpIdx;
-				}
-				i += 1;
-			}
-		}
-		if (minScore == 0xffffffff) {
-			/*  there is no 40M channels */
-			priv->pshare->is_40m_bw = CHANNEL_WIDTH_20;
-			for (i = 0; i < priv->available_chnl_num; i++) {
-				if (score[i] < minScore) {
-					minScore = score[i];
-					idx = i;
-				}
-			}
-		}
-	} else if ((*p_dm->p_band_type == ODM_BAND_2_4G)
-		&& (priv->pmib->dot11nConfigEntry.dot11nUse40M == CHANNEL_WIDTH_40)
-		   && (priv->available_chnl_num >= 8)) {
-		u32 groupScore[14];
-
-		memset(groupScore, 0xff, sizeof(groupScore));
-		for (i = 0; i < priv->available_chnl_num - 4; i++) {
-			if (score[i] != 0xffffffff && score[i + 4] != 0xffffffff) {
-				groupScore[i] = score[i] + score[i + 4];
-				DEBUG_INFO("groupScore, ch %d,%d: %d\n", i + 1, i + 5, groupScore[i]);
-				if (groupScore[i] < minScore) {
-#ifdef AUTOCH_SS_SPEEDUP
-					if (priv->pmib->miscEntry.autoch_1611_enable) {
-						if (priv->available_chnl[i] == 1 || priv->available_chnl[i] == 6 || priv->available_chnl[i] == 11) {
-							minScore = groupScore[i];
-							idx = i;
-						}
-					} else
-#endif
-					{
-						minScore = groupScore[i];
-						idx = i;
-					}
-				}
-			}
-		}
-
-		if (score[idx] < score[idx + 4]) {
-			GET_MIB(priv)->dot11nConfigEntry.dot11n2ndChOffset = HT_2NDCH_OFFSET_ABOVE;
-			priv->pshare->offset_2nd_chan	= HT_2NDCH_OFFSET_ABOVE;
-		} else {
-			idx = idx + 4;
-			GET_MIB(priv)->dot11nConfigEntry.dot11n2ndChOffset = HT_2NDCH_OFFSET_BELOW;
-			priv->pshare->offset_2nd_chan	= HT_2NDCH_OFFSET_BELOW;
-		}
-	} else {
-		for (i = 0; i < priv->available_chnl_num; i++) {
-			if (score[i] < minScore) {
-#ifdef AUTOCH_SS_SPEEDUP
-				if (priv->pmib->miscEntry.autoch_1611_enable) {
-					if (priv->available_chnl[i] == 1 || priv->available_chnl[i] == 6 || priv->available_chnl[i] == 11) {
-						minScore = score[i];
-						idx = i;
-					}
-				} else
-#endif
-				{
-					minScore = score[i];
-					idx = i;
-				}
-			}
-		}
-	}
-
-	if (IS_A_CUT_8881A(priv) &&
-	    (priv->pmib->dot11nConfigEntry.dot11nUse40M == CHANNEL_WIDTH_80)) {
-		if ((priv->available_chnl[idx] == 36) ||
-		    (priv->available_chnl[idx] == 52) ||
-		    (priv->available_chnl[idx] == 100) ||
-		    (priv->available_chnl[idx] == 116) ||
-		    (priv->available_chnl[idx] == 132) ||
-		    (priv->available_chnl[idx] == 149) ||
-		    (priv->available_chnl[idx] == 165))
-			idx++;
-		else if ((priv->available_chnl[idx] == 48) ||
-			 (priv->available_chnl[idx] == 64) ||
-			 (priv->available_chnl[idx] == 112) ||
-			 (priv->available_chnl[idx] == 128) ||
-			 (priv->available_chnl[idx] == 144) ||
-			 (priv->available_chnl[idx] == 161) ||
-			 (priv->available_chnl[idx] == 177))
-			idx--;
-	}
-
-	minChan = priv->available_chnl[idx];
-
-	/*  skip channel 14 if don't support ofdm */
-	if ((priv->pmib->dot11RFEntry.disable_ch14_ofdm) &&
-	    (minChan == 14)) {
-		score[idx] = 0xffffffff;
-
-		minScore = 0xffffffff;
-		for (i = 0; i < priv->available_chnl_num; i++) {
-			if (score[i] < minScore) {
-				minScore = score[i];
-				idx = i;
-			}
-		}
-		minChan = priv->available_chnl[idx];
-	}
-
-#if 0
-	/* Check if selected channel available for 80M/40M BW or NOT ? */
-	if (*p_dm->p_band_type == ODM_BAND_5G) {
-		if (priv->pmib->dot11nConfigEntry.dot11nUse40M == CHANNEL_WIDTH_80) {
-			if (!is80MChannel(priv->available_chnl, priv->available_chnl_num, minChan)) {
-
-				/* priv->pmib->dot11n_config_entry.dot11nUse40M = CHANNEL_WIDTH_40; */
-				priv->pshare->is_40m_bw = CHANNEL_WIDTH_40;
-			}
-		}
-
-		if (priv->pmib->dot11nConfigEntry.dot11nUse40M == CHANNEL_WIDTH_40) {
-			if (!is40MChannel(priv->available_chnl, priv->available_chnl_num, minChan)) {
-
-				/* priv->pmib->dot11n_config_entry.dot11nUse40M = CHANNEL_WIDTH_20; */
-				priv->pshare->is_40m_bw = CHANNEL_WIDTH_20;
-			}
-		}
-	}
-#endif
-
-#ifdef CONFIG_RTL_NEW_AUTOCH
-	RTL_W32(RXERR_RPT, RXERR_RPT_RST);
-#endif
-
-	/*  auto adjust contro-sideband */
-	if ((priv->pmib->dot11BssType.net_work_type & WIRELESS_11N)
-	    && (priv->pshare->is_40m_bw == 1 || priv->pshare->is_40m_bw == 2)) {
-
-#ifdef RTK_5G_SUPPORT
-		if (*p_dm->p_band_type == ODM_BAND_5G) {
-			if ((minChan > 144) ? ((minChan - 1) % 8) : (minChan % 8)) {
-				GET_MIB(priv)->dot11nConfigEntry.dot11n2ndChOffset = HT_2NDCH_OFFSET_ABOVE;
-				priv->pshare->offset_2nd_chan	= HT_2NDCH_OFFSET_ABOVE;
-			} else {
-				GET_MIB(priv)->dot11nConfigEntry.dot11n2ndChOffset = HT_2NDCH_OFFSET_BELOW;
-				priv->pshare->offset_2nd_chan	= HT_2NDCH_OFFSET_BELOW;
-			}
-
-		} else
-#endif
-		{
-#if 0
-#ifdef CONFIG_RTL_NEW_AUTOCH
-			unsigned int ch_max;
-
-			if (priv->available_chnl[idx_2G_end] >= 13)
-				ch_max = 13;
-			else
-				ch_max = priv->available_chnl[idx_2G_end];
-
-			if ((minChan >= 5) && (minChan <= (ch_max - 5))) {
-				if (score[minChan + 4] > score[minChan - 4]) { /*  what if some channels were cancelled? */
-					GET_MIB(priv)->dot11nConfigEntry.dot11n2ndChOffset = HT_2NDCH_OFFSET_BELOW;
-					priv->pshare->offset_2nd_chan	= HT_2NDCH_OFFSET_BELOW;
-				} else {
-					GET_MIB(priv)->dot11nConfigEntry.dot11n2ndChOffset = HT_2NDCH_OFFSET_ABOVE;
-					priv->pshare->offset_2nd_chan	= HT_2NDCH_OFFSET_ABOVE;
-				}
-			} else
-#endif
-			{
-				if (minChan < 5) {
-					GET_MIB(priv)->dot11nConfigEntry.dot11n2ndChOffset = HT_2NDCH_OFFSET_ABOVE;
-					priv->pshare->offset_2nd_chan	= HT_2NDCH_OFFSET_ABOVE;
-				} else if (minChan > 7) {
-					GET_MIB(priv)->dot11nConfigEntry.dot11n2ndChOffset = HT_2NDCH_OFFSET_BELOW;
-					priv->pshare->offset_2nd_chan	= HT_2NDCH_OFFSET_BELOW;
-				}
-			}
-#endif
-		}
-	}
-	/* ----------------------- */
-
-#if defined(__ECOS) && defined(CONFIG_SDIO_HCI)
-	panic_printk("Auto channel choose ch:%d\n", minChan);
-#else
-#ifdef _DEBUG_RTL8192CD_
-	panic_printk("Auto channel choose ch:%d\n", minChan);
-#endif
-#endif
-#ifdef ACS_DEBUG_INFO/* for debug */
-	printk("7. minChan:%d 2nd_offset:%d\n", minChan, priv->pshare->offset_2nd_chan);
-#endif
-
-	return minChan;
-}
-#endif
-
-#endif
diff --git a/rtl8723DS/hal/phydm/phydm_acs.h b/rtl8723DS/hal/phydm/phydm_acs.h
deleted file mode 100755
index 192a24f..0000000
--- a/rtl8723DS/hal/phydm/phydm_acs.h
+++ b/dev/null
@@ -1,105 +0,0 @@
-/******************************************************************************
- *
- * Copyright(c) 2007 - 2017 Realtek Corporation.
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of version 2 of the GNU General Public License as
- * published by the Free Software Foundation.
- *
- * This program is distributed in the hope that it will be useful, but WITHOUT
- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
- * more details.
- *
- *****************************************************************************/
-
-#ifndef	__PHYDMACS_H__
-#define    __PHYDMACS_H__
-
-#define ACS_VERSION	"1.1"	/*20150729 by YuChen*/
-#define CLM_VERSION "1.0"
-
-#define ODM_MAX_CHANNEL_2G			14
-#define ODM_MAX_CHANNEL_5G			24
-
-/* For phydm_auto_channel_select_setting_ap() */
-#define STORE_DEFAULT_NHM_SETTING               0
-#define RESTORE_DEFAULT_NHM_SETTING             1
-#define ACS_NHM_SETTING                         2
-
-struct _ACS_ {
-	boolean		is_force_acs_result;
-	u8		clean_channel_2g;
-	u8		clean_channel_5g;
-	u16		channel_info_2g[2][ODM_MAX_CHANNEL_2G];		/* Channel_Info[1]: channel score, Channel_Info[2]:Channel_Scan_Times */
-	u16		channel_info_5g[2][ODM_MAX_CHANNEL_5G];
-
-#if (DM_ODM_SUPPORT_TYPE & ODM_AP)
-	u8              acs_step;
-	/* NHM count 0-11 */
-	u8              nhm_cnt[14][11];
-
-	/* AC-Series, for storing previous setting */
-	u32              reg0x990;
-	u32              reg0x994;
-	u32              reg0x998;
-	u32              reg0x99c;
-	u8              reg0x9a0;   /* u8 */
-
-	/* N-Series, for storing previous setting */
-	u32              reg0x890;
-	u32              reg0x894;
-	u32              reg0x898;
-	u32              reg0x89c;
-	u8              reg0xe28;   /* u8 */
-#endif
-
-};
-
-
-void
-odm_auto_channel_select_init(
-	void			*p_dm_void
-);
-
-void
-odm_auto_channel_select_reset(
-	void			*p_dm_void
-);
-
-void
-odm_auto_channel_select(
-	void			*p_dm_void,
-	u8			channel
-);
-
-u8
-odm_get_auto_channel_select_result(
-	void			*p_dm_void,
-	u8			band
-);
-
-boolean
-phydm_acs_check(
-	void	*p_dm_void
-);
-
-#if (DM_ODM_SUPPORT_TYPE & ODM_AP)
-
-void
-phydm_auto_channel_select_setting_ap(
-	void   *p_dm_void,
-	u32  setting,             /* 0: STORE_DEFAULT_NHM_SETTING; 1: RESTORE_DEFAULT_NHM_SETTING, 2: ACS_NHM_SETTING */
-	u32  acs_step
-);
-
-void
-phydm_get_nhm_statistics_ap(
-	void       *p_dm_void,
-	u32      idx,                /* @ 2G, Real channel number = idx+1 */
-	u32      acs_step
-);
-
-#endif  /* #if ( DM_ODM_SUPPORT_TYPE & ODM_AP ) */
-
-#endif  /* #ifndef	__PHYDMACS_H__ */
diff --git a/rtl8723DS/hal/phydm/phydm_adaptivity.c b/rtl8723DS/hal/phydm/phydm_adaptivity.c
index d67d21f..0869036 100755..100644
--- a/rtl8723DS/hal/phydm/phydm_adaptivity.c
+++ b/rtl8723DS/hal/phydm/phydm_adaptivity.c
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2007 - 2017 Realtek Corporation.
+ * Copyright(c) 2007 - 2017  Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -8,14 +8,24 @@
  *
  * This program is distributed in the hope that it will be useful, but WITHOUT
  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  * more details.
  *
+ * The full GNU General Public License is included in this distribution in the
+ * file called LICENSE.
+ *
+ * Contact Information:
+ * wlanfae <wlanfae@realtek.com>
+ * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
+ * Hsinchu 300, Taiwan.
+ *
+ * Larry Finger <Larry.Finger@lwfinger.net>
+ *
  *****************************************************************************/
 
-/* ************************************************************
+/*@************************************************************
  * include files
- * ************************************************************ */
+ ************************************************************/
 #include "mp_precomp.h"
 #include "phydm_precomp.h"
 
@@ -24,380 +34,227 @@
 		#include "PhyDM_Adaptivity.tmh"
 	#endif
 #endif
-
-void
-phydm_dig_up_bound_lmt_en(
-	void			*p_dm_void
-)
+#ifdef PHYDM_SUPPORT_ADAPTIVITY
+#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
+boolean
+phydm_check_channel_plan(void *dm_void)
 {
-	struct PHY_DM_STRUCT		*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	struct phydm_adaptivity_struct	*p_adaptivity = (struct phydm_adaptivity_struct *)phydm_get_structure(p_dm, PHYDM_ADAPTIVITY);
-
-	if (!(p_dm->support_ability & ODM_BB_ADAPTIVITY) ||
-		(p_dm->adaptivity_flag == false) ||
-		(!p_dm->is_linked) ||
-		(p_dm->adaptivity_enable == false)
-	) {
-		p_adaptivity->igi_up_bound_lmt_cnt = 0;
-		p_adaptivity->igi_lmt_en = false;	
-		return;
-	}
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct phydm_adaptivity_struct *adapt = (struct phydm_adaptivity_struct *)phydm_get_structure(dm, PHYDM_ADAPTIVITY);
+	void *adapter = dm->adapter;
+	PMGNT_INFO mgnt_info = &((PADAPTER)adapter)->MgntInfo;
 
-	if (p_dm->total_tp > 1) {
-		p_adaptivity->igi_lmt_en = true;			
-		p_adaptivity->igi_up_bound_lmt_cnt = p_adaptivity->igi_up_bound_lmt_val;
-		PHYDM_DBG(p_dm, DBG_ADPTVTY,
-			("TP >1, Start limit IGI upper bound\n"));
-	} else {
-		if (p_adaptivity->igi_up_bound_lmt_cnt == 0)
-			p_adaptivity->igi_lmt_en = false;
-		else
-			p_adaptivity->igi_up_bound_lmt_cnt--;
-	}
-
-	PHYDM_DBG(p_dm, DBG_ADPTVTY, ("IGI_lmt_cnt = %d\n", p_adaptivity->igi_up_bound_lmt_cnt));
-}
-
-void
-phydm_check_adaptivity(
-	void			*p_dm_void
-)
-{
-	struct PHY_DM_STRUCT		*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	struct phydm_adaptivity_struct	*adaptivity = (struct phydm_adaptivity_struct *)phydm_get_structure(p_dm, PHYDM_ADAPTIVITY);
+	if (mgnt_info->RegEnableAdaptivity != 2)
+		return false;
 
-	if (!(p_dm->support_ability & ODM_BB_ADAPTIVITY)) {
-		p_dm->adaptivity_enable = false;
-		return;
-	}
-	
-#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
-	if (p_dm->ap_total_num > adaptivity->ap_num_th) {
-		p_dm->adaptivity_enable = false;
-		PHYDM_DBG(p_dm, DBG_ADPTVTY, ("AP total num > %d!!, disable adaptivity\n", adaptivity->ap_num_th));
-		return;
+	if (!dm->carrier_sense_enable) { /*@check domain Code for adaptivity or CarrierSense*/
+		if ((*dm->band_type == ODM_BAND_5G) &&
+		    !(adapt->regulation_5g == REGULATION_ETSI || adapt->regulation_5g == REGULATION_WW)) {
+			PHYDM_DBG(dm, DBG_ADPTVTY,
+				  "adaptivity skip 5G domain code : %d\n",
+				  adapt->regulation_5g);
+			return true;
+		} else if ((*dm->band_type == ODM_BAND_2_4G) &&
+			   !(adapt->regulation_2g == REGULATION_ETSI || adapt->regulation_2g == REGULATION_WW)) {
+			PHYDM_DBG(dm, DBG_ADPTVTY,
+				  "adaptivity skip 2.4G domain code : %d\n",
+				  adapt->regulation_2g);
+			return true;
+		} else if ((*dm->band_type != ODM_BAND_2_4G) && (*dm->band_type != ODM_BAND_5G)) {
+			PHYDM_DBG(dm, DBG_ADPTVTY,
+				  "adaptivity neither 2G nor 5G band, return\n");
+			return true;
+		}
+	} else {
+		if ((*dm->band_type == ODM_BAND_5G) &&
+		    !(adapt->regulation_5g == REGULATION_MKK || adapt->regulation_5g == REGULATION_WW)) {
+			PHYDM_DBG(dm, DBG_ADPTVTY,
+				  "CarrierSense skip 5G domain code : %d\n",
+				  adapt->regulation_5g);
+			return true;
+		} else if ((*dm->band_type == ODM_BAND_2_4G) &&
+			   !(adapt->regulation_2g == REGULATION_MKK || adapt->regulation_2g == REGULATION_WW)) {
+			PHYDM_DBG(dm, DBG_ADPTVTY,
+				  "CarrierSense skip 2.4G domain code : %d\n",
+				  adapt->regulation_2g);
+			return true;
+		} else if ((*dm->band_type != ODM_BAND_2_4G) && (*dm->band_type != ODM_BAND_5G)) {
+			PHYDM_DBG(dm, DBG_ADPTVTY,
+				  "CarrierSense neither 2G nor 5G band, return\n");
+			return true;
+		}
 	}
-#elif (DM_ODM_SUPPORT_TYPE == ODM_AP)
-	if (adaptivity->dynamic_link_adaptivity) {
-		if (p_dm->is_linked && adaptivity->is_check == false) {
-			phydm_check_environment(p_dm);
-		} else if (!p_dm->is_linked)
-			adaptivity->is_check = false;
 
-		return;
-	}
-#endif
-	
-	p_dm->adaptivity_enable = true;
+	return false;
 }
 
-#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
 boolean
-phydm_check_channel_plan(
-	void			*p_dm_void
-)
+phydm_soft_ap_special_set(void *dm_void)
 {
-	struct PHY_DM_STRUCT		*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	struct _ADAPTER		*p_adapter	= p_dm->adapter;
-	PMGNT_INFO		p_mgnt_info = &(p_adapter->MgntInfo);
-
-	if (p_mgnt_info->RegEnableAdaptivity == 2) {
-		if (p_dm->carrier_sense_enable == false) {		/*check domain Code for adaptivity or CarrierSense*/
-			if ((*p_dm->p_band_type == ODM_BAND_5G) &&
-				!(p_dm->odm_regulation_5g == REGULATION_ETSI || p_dm->odm_regulation_5g == REGULATION_WW)) {
-				PHYDM_DBG(p_dm, DBG_ADPTVTY, ("adaptivity skip 5G domain code : %d\n", p_dm->odm_regulation_5g));
-				p_dm->adaptivity_enable = false;
-				return true;
-			} else if ((*p_dm->p_band_type == ODM_BAND_2_4G) &&
-				!(p_dm->odm_regulation_2_4g == REGULATION_ETSI || p_dm->odm_regulation_2_4g == REGULATION_WW)) {
-				PHYDM_DBG(p_dm, DBG_ADPTVTY, ("adaptivity skip 2.4G domain code : %d\n", p_dm->odm_regulation_2_4g));
-				p_dm->adaptivity_enable = false;
-				return true;
-
-			} else if ((*p_dm->p_band_type != ODM_BAND_2_4G) && (*p_dm->p_band_type != ODM_BAND_5G)) {
-				PHYDM_DBG(p_dm, DBG_ADPTVTY, ("adaptivity neither 2G nor 5G band, return\n"));
-				p_dm->adaptivity_enable = false;
-				return true;
-			}
-		} else {
-			if ((*p_dm->p_band_type == ODM_BAND_5G) &&
-				!(p_dm->odm_regulation_5g == REGULATION_MKK || p_dm->odm_regulation_5g == REGULATION_WW)) {
-				PHYDM_DBG(p_dm, DBG_ADPTVTY, ("CarrierSense skip 5G domain code : %d\n", p_dm->odm_regulation_5g));
-				p_dm->adaptivity_enable = false;
-				return true;
-			}
-
-			else if ((*p_dm->p_band_type == ODM_BAND_2_4G) &&
-				!(p_dm->odm_regulation_2_4g == REGULATION_MKK  || p_dm->odm_regulation_2_4g == REGULATION_WW)) {
-				PHYDM_DBG(p_dm, DBG_ADPTVTY, ("CarrierSense skip 2.4G domain code : %d\n", p_dm->odm_regulation_2_4g));
-				p_dm->adaptivity_enable = false;
-				return true;
-
-			} else if ((*p_dm->p_band_type != ODM_BAND_2_4G) && (*p_dm->p_band_type != ODM_BAND_5G)) {
-				PHYDM_DBG(p_dm, DBG_ADPTVTY, ("CarrierSense neither 2G nor 5G band, return\n"));
-				p_dm->adaptivity_enable = false;
-				return true;
-			}
-		}
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct phydm_adaptivity_struct *adaptivity = (struct phydm_adaptivity_struct *)phydm_get_structure(dm, PHYDM_ADAPTIVITY);
+	u8 disable_ap_adapt_setting = false;
+
+	if (dm->soft_ap_mode != NULL) {
+		if (*dm->soft_ap_mode != 0 &&
+		    (dm->soft_ap_special_setting & BIT(0)))
+			disable_ap_adapt_setting = true;
+		else
+			disable_ap_adapt_setting = false;
+		PHYDM_DBG(dm, DBG_ADPTVTY,
+			  "soft_ap_setting = %x, soft_ap = %d, dis_ap_adapt = %d\n",
+			  dm->soft_ap_special_setting, *dm->soft_ap_mode,
+			  disable_ap_adapt_setting);
 	}
 
-	return false;
-
+	return disable_ap_adapt_setting;
 }
 #endif
 
-void
-phydm_set_edcca_threshold(
-	void	*p_dm_void,
-	s8	H2L,
-	s8	L2H
-)
+void phydm_dig_up_bound_lmt_en(void *dm_void)
 {
-	struct PHY_DM_STRUCT		*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct phydm_adaptivity_struct *adapt = &dm->adaptivity;
+
+	if (!(dm->support_ability & ODM_BB_ADAPTIVITY) ||
+	    !dm->is_linked ||
+	    !adapt->is_adapt_en) {
+		adapt->igi_up_bound_lmt_cnt = 0;
+		adapt->igi_lmt_en = false;
+		return;
+	}
 
-	if (p_dm->support_ic_type & ODM_IC_11N_SERIES)
-		odm_set_bb_reg(p_dm, REG_OFDM_0_ECCA_THRESHOLD, MASKBYTE2 | MASKBYTE0, (u32)((u8)L2H | (u8)H2L << 16));
-#if (RTL8195A_SUPPORT == 0)
-	else if (p_dm->support_ic_type & ODM_IC_11AC_SERIES)
-		odm_set_bb_reg(p_dm, REG_FPGA0_XB_LSSI_READ_BACK, MASKLWORD, (u16)((u8)L2H | (u8)H2L << 8));
-#endif
+	if (dm->total_tp > 1) {
+		adapt->igi_lmt_en = true;
+		adapt->igi_up_bound_lmt_cnt = adapt->igi_up_bound_lmt_val;
+		PHYDM_DBG(dm, DBG_ADPTVTY,
+			  "TP >1, Start limit IGI upper bound\n");
+	} else {
+		if (adapt->igi_up_bound_lmt_cnt == 0)
+			adapt->igi_lmt_en = false;
+		else
+			adapt->igi_up_bound_lmt_cnt--;
+	}
 
+	PHYDM_DBG(dm, DBG_ADPTVTY, "IGI_lmt_cnt = %d\n",
+		  adapt->igi_up_bound_lmt_cnt);
 }
 
-void
-phydm_set_lna(
-	void				*p_dm_void,
-	enum phydm_set_lna	type
-)
+void phydm_check_adaptivity(void *dm_void)
 {
-	struct PHY_DM_STRUCT		*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-
-	if (p_dm->support_ic_type & (ODM_RTL8188E | ODM_RTL8192E)) {
-		if (type == phydm_disable_lna) {
-			odm_set_rf_reg(p_dm, RF_PATH_A, 0xef, 0x80000, 0x1);
-			odm_set_rf_reg(p_dm, RF_PATH_A, 0x30, 0xfffff, 0x18000);	/*select Rx mode*/
-			odm_set_rf_reg(p_dm, RF_PATH_A, 0x31, 0xfffff, 0x0000f);
-			odm_set_rf_reg(p_dm, RF_PATH_A, 0x32, 0xfffff, 0x37f82);	/*disable LNA*/
-			odm_set_rf_reg(p_dm, RF_PATH_A, 0xef, 0x80000, 0x0);
-			if (p_dm->rf_type > RF_1T1R) {
-				odm_set_rf_reg(p_dm, RF_PATH_B, 0xef, 0x80000, 0x1);
-				odm_set_rf_reg(p_dm, RF_PATH_B, 0x30, 0xfffff, 0x18000);
-				odm_set_rf_reg(p_dm, RF_PATH_B, 0x31, 0xfffff, 0x0000f);
-				odm_set_rf_reg(p_dm, RF_PATH_B, 0x32, 0xfffff, 0x37f82);
-				odm_set_rf_reg(p_dm, RF_PATH_B, 0xef, 0x80000, 0x0);
-			}
-		} else if (type == phydm_enable_lna) {
-			odm_set_rf_reg(p_dm, RF_PATH_A, 0xef, 0x80000, 0x1);
-			odm_set_rf_reg(p_dm, RF_PATH_A, 0x30, 0xfffff, 0x18000);	/*select Rx mode*/
-			odm_set_rf_reg(p_dm, RF_PATH_A, 0x31, 0xfffff, 0x0000f);
-			odm_set_rf_reg(p_dm, RF_PATH_A, 0x32, 0xfffff, 0x77f82);	/*back to normal*/
-			odm_set_rf_reg(p_dm, RF_PATH_A, 0xef, 0x80000, 0x0);
-			if (p_dm->rf_type > RF_1T1R) {
-				odm_set_rf_reg(p_dm, RF_PATH_B, 0xef, 0x80000, 0x1);
-				odm_set_rf_reg(p_dm, RF_PATH_B, 0x30, 0xfffff, 0x18000);
-				odm_set_rf_reg(p_dm, RF_PATH_B, 0x31, 0xfffff, 0x0000f);
-				odm_set_rf_reg(p_dm, RF_PATH_B, 0x32, 0xfffff, 0x77f82);
-				odm_set_rf_reg(p_dm, RF_PATH_B, 0xef, 0x80000, 0x0);
-			}
-		}
-	} else if (p_dm->support_ic_type & ODM_RTL8723B) {
-		if (type == phydm_disable_lna) {
-			/*S0*/
-			odm_set_rf_reg(p_dm, RF_PATH_A, 0xef, 0x80000, 0x1);
-			odm_set_rf_reg(p_dm, RF_PATH_A, 0x30, 0xfffff, 0x18000);	/*select Rx mode*/
-			odm_set_rf_reg(p_dm, RF_PATH_A, 0x31, 0xfffff, 0x0001f);
-			odm_set_rf_reg(p_dm, RF_PATH_A, 0x32, 0xfffff, 0xe6137);	/*disable LNA*/
-			odm_set_rf_reg(p_dm, RF_PATH_A, 0xef, 0x80000, 0x0);
-			/*S1*/
-			odm_set_rf_reg(p_dm, RF_PATH_A, 0xed, 0x00020, 0x1);
-			odm_set_rf_reg(p_dm, RF_PATH_A, 0x43, 0xfffff, 0x3008d);	/*select Rx mode and disable LNA*/
-			odm_set_rf_reg(p_dm, RF_PATH_A, 0xed, 0x00020, 0x0);
-		} else if (type == phydm_enable_lna) {
-			/*S0*/
-			odm_set_rf_reg(p_dm, RF_PATH_A, 0xef, 0x80000, 0x1);
-			odm_set_rf_reg(p_dm, RF_PATH_A, 0x30, 0xfffff, 0x18000);	/*select Rx mode*/
-			odm_set_rf_reg(p_dm, RF_PATH_A, 0x31, 0xfffff, 0x0001f);
-			odm_set_rf_reg(p_dm, RF_PATH_A, 0x32, 0xfffff, 0xe6177);	/*disable LNA*/
-			odm_set_rf_reg(p_dm, RF_PATH_A, 0xef, 0x80000, 0x0);
-			/*S1*/
-			odm_set_rf_reg(p_dm, RF_PATH_A, 0xed, 0x00020, 0x1);
-			odm_set_rf_reg(p_dm, RF_PATH_A, 0x43, 0xfffff, 0x300bd);	/*select Rx mode and disable LNA*/
-			odm_set_rf_reg(p_dm, RF_PATH_A, 0xed, 0x00020, 0x0);
-		}
-
-	} else if (p_dm->support_ic_type & ODM_RTL8812) {
-		if (type == phydm_disable_lna) {
-			odm_set_rf_reg(p_dm, RF_PATH_A, 0xef, 0x80000, 0x1);
-			odm_set_rf_reg(p_dm, RF_PATH_A, 0x30, 0xfffff, 0x18000);	/*select Rx mode*/
-			odm_set_rf_reg(p_dm, RF_PATH_A, 0x31, 0xfffff, 0x3f7ff);
-			odm_set_rf_reg(p_dm, RF_PATH_A, 0x32, 0xfffff, 0xc22bf);	/*disable LNA*/
-			odm_set_rf_reg(p_dm, RF_PATH_A, 0xef, 0x80000, 0x0);
-			if (p_dm->rf_type > RF_1T1R) {
-				odm_set_rf_reg(p_dm, RF_PATH_B, 0xef, 0x80000, 0x1);
-				odm_set_rf_reg(p_dm, RF_PATH_B, 0x30, 0xfffff, 0x18000);	/*select Rx mode*/
-				odm_set_rf_reg(p_dm, RF_PATH_B, 0x31, 0xfffff, 0x3f7ff);
-				odm_set_rf_reg(p_dm, RF_PATH_B, 0x32, 0xfffff, 0xc22bf);	/*disable LNA*/
-				odm_set_rf_reg(p_dm, RF_PATH_B, 0xef, 0x80000, 0x0);
-			}
-		} else if (type == phydm_enable_lna) {
-			odm_set_rf_reg(p_dm, RF_PATH_A, 0xef, 0x80000, 0x1);
-			odm_set_rf_reg(p_dm, RF_PATH_A, 0x30, 0xfffff, 0x18000);	/*select Rx mode*/
-			odm_set_rf_reg(p_dm, RF_PATH_A, 0x31, 0xfffff, 0x3f7ff);
-			odm_set_rf_reg(p_dm, RF_PATH_A, 0x32, 0xfffff, 0xc26bf);	/*disable LNA*/
-			odm_set_rf_reg(p_dm, RF_PATH_A, 0xef, 0x80000, 0x0);
-			if (p_dm->rf_type > RF_1T1R) {
-				odm_set_rf_reg(p_dm, RF_PATH_B, 0xef, 0x80000, 0x1);
-				odm_set_rf_reg(p_dm, RF_PATH_B, 0x30, 0xfffff, 0x18000);	/*select Rx mode*/
-				odm_set_rf_reg(p_dm, RF_PATH_B, 0x31, 0xfffff, 0x3f7ff);
-				odm_set_rf_reg(p_dm, RF_PATH_B, 0x32, 0xfffff, 0xc26bf);	/*disable LNA*/
-				odm_set_rf_reg(p_dm, RF_PATH_B, 0xef, 0x80000, 0x0);
-			}
-		}
-	} else if (p_dm->support_ic_type & (ODM_RTL8821 | ODM_RTL8881A)) {
-		if (type == phydm_disable_lna) {
-			odm_set_rf_reg(p_dm, RF_PATH_A, 0xef, 0x80000, 0x1);
-			odm_set_rf_reg(p_dm, RF_PATH_A, 0x30, 0xfffff, 0x18000);	/*select Rx mode*/
-			odm_set_rf_reg(p_dm, RF_PATH_A, 0x31, 0xfffff, 0x0002f);
-			odm_set_rf_reg(p_dm, RF_PATH_A, 0x32, 0xfffff, 0xfb09b);	/*disable LNA*/
-			odm_set_rf_reg(p_dm, RF_PATH_A, 0xef, 0x80000, 0x0);
-		} else if (type == phydm_enable_lna) {
-			odm_set_rf_reg(p_dm, RF_PATH_A, 0xef, 0x80000, 0x1);
-			odm_set_rf_reg(p_dm, RF_PATH_A, 0x30, 0xfffff, 0x18000);	/*select Rx mode*/
-			odm_set_rf_reg(p_dm, RF_PATH_A, 0x31, 0xfffff, 0x0002f);
-			odm_set_rf_reg(p_dm, RF_PATH_A, 0x32, 0xfffff, 0xfb0bb);	/*disable LNA*/
-			odm_set_rf_reg(p_dm, RF_PATH_A, 0xef, 0x80000, 0x0);
-		}
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct phydm_adaptivity_struct *adapt = &dm->adaptivity;
+
+	if (!(dm->support_ability & ODM_BB_ADAPTIVITY)) {
+		adapt->is_adapt_en = false;
+		dm->th_l2h_ini = adapt->th_l2h_ini_mode2;
+		dm->th_edcca_hl_diff = adapt->th_edcca_hl_diff_mode2;
+		PHYDM_DBG(dm, DBG_ADPTVTY,
+			  "adaptivity disable, enable EDCCA mode!!!\n");
+		return;
 	}
-}
-
 
-
-void
-phydm_set_trx_mux(
-	void				*p_dm_void,
-	enum phydm_trx_mux_type	tx_mode,
-	enum phydm_trx_mux_type	rx_mode
-)
-{
-	struct PHY_DM_STRUCT		*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-
-	if (p_dm->support_ic_type & ODM_IC_11N_SERIES) {
-		odm_set_bb_reg(p_dm, ODM_REG_CCK_RPT_FORMAT_11N, BIT(3) | BIT(2) | BIT(1), tx_mode);			/*set TXmod to standby mode to remove outside noise affect*/
-		odm_set_bb_reg(p_dm, ODM_REG_CCK_RPT_FORMAT_11N, BIT(22) | BIT(21) | BIT(20), rx_mode);		/*set RXmod to standby mode to remove outside noise affect*/
-		if (p_dm->rf_type > RF_1T1R) {
-			odm_set_bb_reg(p_dm, ODM_REG_CCK_RPT_FORMAT_11N_B, BIT(3) | BIT(2) | BIT(1), tx_mode);		/*set TXmod to standby mode to remove outside noise affect*/
-			odm_set_bb_reg(p_dm, ODM_REG_CCK_RPT_FORMAT_11N_B, BIT(22) | BIT(21) | BIT(20), rx_mode);	/*set RXmod to standby mode to remove outside noise affect*/
-		}
+	adapt->is_adapt_en = true;
+#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
+	if (phydm_check_channel_plan(dm) ||
+	    dm->ap_total_num > adapt->ap_num_th ||
+	    phydm_soft_ap_special_set(dm)) {
+		adapt->is_adapt_en = false;
+		PHYDM_DBG(dm, DBG_ADPTVTY,
+			  "AP total num > %d!!, disable adaptivity\n",
+			  adapt->ap_num_th);
 	}
-#if (RTL8195A_SUPPORT == 0)
-	else if (p_dm->support_ic_type & ODM_IC_11AC_SERIES) {
-		odm_set_bb_reg(p_dm, ODM_REG_TRMUX_11AC, BIT(11) | BIT(10) | BIT(9) | BIT(8), tx_mode);				/*set TXmod to standby mode to remove outside noise affect*/
-		odm_set_bb_reg(p_dm, ODM_REG_TRMUX_11AC, BIT(7) | BIT(6) | BIT(5) | BIT(4), rx_mode);				/*set RXmod to standby mode to remove outside noise affect*/
-		if (p_dm->rf_type > RF_1T1R) {
-			odm_set_bb_reg(p_dm, ODM_REG_TRMUX_11AC_B, BIT(11) | BIT(10) | BIT(9) | BIT(8), tx_mode);		/*set TXmod to standby mode to remove outside noise affect*/
-			odm_set_bb_reg(p_dm, ODM_REG_TRMUX_11AC_B, BIT(7) | BIT(6) | BIT(5) | BIT(4), rx_mode);			/*set RXmod to standby mode to remove outside noise affect*/
-		}
+	if (!adapt->is_adapt_en) {
+		dm->th_l2h_ini = adapt->th_l2h_ini_mode2;
+		dm->th_edcca_hl_diff = adapt->th_edcca_hl_diff_mode2;
+	} else {
+		dm->th_l2h_ini = adapt->th_l2h_ini_backup;
+		dm->th_edcca_hl_diff = adapt->th_edcca_hl_diff_backup;
 	}
 #endif
-
 }
 
-void
-phydm_mac_edcca_state(
-	void					*p_dm_void,
-	enum phydm_mac_edcca_type		state
-)
+void phydm_set_edcca_threshold(void *dm_void, s8 H2L, s8 L2H)
 {
-	struct PHY_DM_STRUCT		*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	if (state == phydm_ignore_edcca) {
-		odm_set_mac_reg(p_dm, REG_TX_PTCL_CTRL, BIT(15), 1);	/*ignore EDCCA	reg520[15]=1*/
-		/*		odm_set_mac_reg(p_dm, REG_RD_CTRL, BIT(11), 0);			*/ /*reg524[11]=0*/
-	} else {	/*don't set MAC ignore EDCCA signal*/
-		odm_set_mac_reg(p_dm, REG_TX_PTCL_CTRL, BIT(15), 0);	/*don't ignore EDCCA	 reg520[15]=0*/
-		/*		odm_set_mac_reg(p_dm, REG_RD_CTRL, BIT(11), 1);			*/ /*reg524[11]=1	*/
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+
+	if (dm->support_ic_type & ODM_IC_JGR3_SERIES) {
+		odm_set_bb_reg(dm, R_0x84c, MASKBYTE2, (u8)L2H + 0x80);
+		odm_set_bb_reg(dm, R_0x84c, MASKBYTE3, (u8)H2L + 0x80);
+	} else if (dm->support_ic_type & ODM_IC_11N_SERIES) {
+		odm_set_bb_reg(dm, R_0xc4c, MASKBYTE0, (u8)L2H);
+		odm_set_bb_reg(dm, R_0xc4c, MASKBYTE2, (u8)H2L);
+	} else if (dm->support_ic_type & ODM_IC_11AC_SERIES) {
+		odm_set_bb_reg(dm, R_0x8a4, MASKBYTE0, (u8)L2H);
+		odm_set_bb_reg(dm, R_0x8a4, MASKBYTE1, (u8)H2L);
 	}
-	PHYDM_DBG(p_dm, DBG_ADPTVTY, ("EDCCA enable state = %d\n", state));
-
 }
 
-void
-phydm_check_environment(
-	void	*p_dm_void
-)
+void phydm_mac_edcca_state(void *dm_void, enum phydm_mac_edcca_type state)
 {
-	struct PHY_DM_STRUCT	*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	struct phydm_adaptivity_struct	*adaptivity = (struct phydm_adaptivity_struct *)phydm_get_structure(p_dm, PHYDM_ADAPTIVITY);
-	boolean	is_clean_environment = false;
-
-	is_clean_environment = phydm_cal_nhm_cnt(p_dm);
-
-	if (is_clean_environment == true) {
-		p_dm->th_l2h_ini = adaptivity->th_l2h_ini_backup;			/*adaptivity mode*/
-		p_dm->th_edcca_hl_diff = adaptivity->th_edcca_hl_diff_backup;
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
 
-		p_dm->adaptivity_enable = true;
-	} else {
-		p_dm->th_l2h_ini = p_dm->th_l2h_ini_mode2;			/*mode2*/
-		p_dm->th_edcca_hl_diff = p_dm->th_edcca_hl_diff_mode2;
-
-		p_dm->adaptivity_enable = false;
+	if (state == PHYDM_IGNORE_EDCCA) {
+		odm_set_mac_reg(dm, R_0x520, BIT(15), 1); /*@ignore EDCCA*/
+#if 0
+		/*odm_set_mac_reg(dm, REG_RD_CTRL, BIT(11), 0);*/
+#endif
+	} else { /*@don't set MAC ignore EDCCA signal*/
+		odm_set_mac_reg(dm, R_0x520, BIT(15), 0); /*@don't ignore EDCCA*/
+#if 0
+		/*odm_set_mac_reg(dm, REG_RD_CTRL, BIT(11), 1);*/
+#endif
 	}
-
-	adaptivity->is_check = true;
-
+	PHYDM_DBG(dm, DBG_ADPTVTY, "EDCCA enable state = %d\n", state);
 }
 
-void
-phydm_search_pwdb_lower_bound(
-	void		*p_dm_void
-)
+void phydm_search_pwdb_lower_bound(void *dm_void)
 {
-	struct PHY_DM_STRUCT		*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	struct phydm_adaptivity_struct	*adaptivity = (struct phydm_adaptivity_struct *)phydm_get_structure(p_dm, PHYDM_ADAPTIVITY);
-	u32			value32 = 0, reg_value32 = 0;
-	u8			cnt, try_count = 0;
-	u8			tx_edcca1 = 0;
-	boolean			is_adjust = true;
-	s8			th_l2h_dmc, th_h2l_dmc, igi_target = 0x32;
-	s8			diff;
-	u8			IGI = adaptivity->igi_base + 30 + (u8)p_dm->th_l2h_ini - (u8)p_dm->th_edcca_hl_diff;
-
-	if (p_dm->support_ic_type & (ODM_RTL8723B | ODM_RTL8188E | ODM_RTL8192E | ODM_RTL8812 | ODM_RTL8821 | ODM_RTL8881A))
-		phydm_set_lna(p_dm, phydm_disable_lna);
-
-	diff = igi_target - (s8)IGI;
-	th_l2h_dmc = p_dm->th_l2h_ini + diff;
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct phydm_adaptivity_struct *adapt = &dm->adaptivity;
+	u32 value32 = 0, reg_value32 = 0;
+	u8 cnt = 0, try_count = 0;
+	u8 tx_edcca1 = 0;
+	boolean is_adjust = true;
+	s8 th_l2h_dmc, th_h2l_dmc, igi_target = 0x32;
+	s8 diff = 0;
+	s8 IGI = adapt->igi_base + 30 + dm->th_l2h_ini - dm->th_edcca_hl_diff;
+
+	halrf_rf_lna_setting(dm, HALRF_LNA_DISABLE);
+	diff = igi_target - IGI;
+	th_l2h_dmc = dm->th_l2h_ini + diff;
 	if (th_l2h_dmc > 10)
 		th_l2h_dmc = 10;
 
-	th_h2l_dmc = th_l2h_dmc - p_dm->th_edcca_hl_diff;
-	phydm_set_edcca_threshold(p_dm, th_h2l_dmc, th_l2h_dmc);
+	th_h2l_dmc = th_l2h_dmc - dm->th_edcca_hl_diff;
+	phydm_set_edcca_threshold(dm, th_h2l_dmc, th_l2h_dmc);
 	ODM_delay_ms(30);
 
 	while (is_adjust) {
-
-		/*check CCA status*/
-		if (phydm_set_bb_dbg_port(p_dm, BB_DBGPORT_PRIORITY_1, 0x0)) {/*set debug port to 0x0*/
-			reg_value32 = phydm_get_bb_dbg_port_value(p_dm);
+		/*@check CCA status*/
+		/*set debug port to 0x0*/
+		if (phydm_set_bb_dbg_port(dm, DBGPORT_PRI_1, 0x0)) {
+			reg_value32 = phydm_get_bb_dbg_port_val(dm);
 
 			while (reg_value32 & BIT(3) && try_count < 3) {
 				ODM_delay_ms(3);
 				try_count = try_count + 1;
-				reg_value32 = phydm_get_bb_dbg_port_value(p_dm);
+				reg_value32 = phydm_get_bb_dbg_port_val(dm);
 			}
-			phydm_release_bb_dbg_port(p_dm);
+			phydm_release_bb_dbg_port(dm);
 			try_count = 0;
 		}
 
-		/*count EDCCA signal = 1 times*/
+		/*@count EDCCA signal = 1 times*/
 		for (cnt = 0; cnt < 20; cnt++) {
-
-			if (phydm_set_bb_dbg_port(p_dm, BB_DBGPORT_PRIORITY_1, adaptivity->adaptivity_dbg_port)) {
-				value32 = phydm_get_bb_dbg_port_value(p_dm);
-				phydm_release_bb_dbg_port(p_dm);
+			if (phydm_set_bb_dbg_port(dm, DBGPORT_PRI_1,
+						  adapt->adaptivity_dbg_port)) {
+				value32 = phydm_get_bb_dbg_port_val(dm);
+				phydm_release_bb_dbg_port(dm);
 			}
 
-			if (value32 & BIT(30) && (p_dm->support_ic_type & (ODM_RTL8723B | ODM_RTL8188E)))
+			if (value32 & BIT(30) && dm->support_ic_type &
+						 (ODM_RTL8723B | ODM_RTL8188E))
 				tx_edcca1 = tx_edcca1 + 1;
 			else if (value32 & BIT(29))
 				tx_edcca1 = tx_edcca1 + 1;
@@ -409,43 +266,31 @@ phydm_search_pwdb_lower_bound(
 			if (th_l2h_dmc > 10)
 				th_l2h_dmc = 10;
 
-			th_h2l_dmc = th_l2h_dmc - p_dm->th_edcca_hl_diff;
-			phydm_set_edcca_threshold(p_dm, th_h2l_dmc, th_l2h_dmc);
+			th_h2l_dmc = th_l2h_dmc - dm->th_edcca_hl_diff;
+			phydm_set_edcca_threshold(dm, th_h2l_dmc, th_l2h_dmc);
 			tx_edcca1 = 0;
 			if (th_l2h_dmc == 10)
 				is_adjust = false;
 
-		} else
+		} else {
 			is_adjust = false;
-
+		}
 	}
 
-	adaptivity->adapt_igi_up = IGI - p_dm->dc_backoff;
-	adaptivity->h2l_lb = th_h2l_dmc + p_dm->dc_backoff;
-	adaptivity->l2h_lb = th_l2h_dmc + p_dm->dc_backoff;
+	adapt->adapt_igi_up = IGI - ADAPT_DC_BACKOFF;
+	adapt->h2l_lb = th_h2l_dmc + ADAPT_DC_BACKOFF;
+	adapt->l2h_lb = th_l2h_dmc + ADAPT_DC_BACKOFF;
 
-	if (p_dm->support_ic_type & (ODM_RTL8723B | ODM_RTL8188E | ODM_RTL8192E | ODM_RTL8812 | ODM_RTL8821 | ODM_RTL8881A))
-		phydm_set_lna(p_dm, phydm_enable_lna);
-
-	phydm_set_edcca_threshold(p_dm, 0x7f, 0x7f);				/*resume to no link state*/
+	halrf_rf_lna_setting(dm, HALRF_LNA_ENABLE);
+	phydm_set_edcca_threshold(dm, 0x7f, 0x7f); /*resume to no link state*/
 }
 
 boolean
-phydm_re_search_condition(
-	void				*p_dm_void
-)
+phydm_re_search_condition(void *dm_void)
 {
-	struct PHY_DM_STRUCT		*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	struct phydm_adaptivity_struct	*adaptivity = (struct phydm_adaptivity_struct *)phydm_get_structure(p_dm, PHYDM_ADAPTIVITY);
-	u8			adaptivity_igi_upper = adaptivity->adapt_igi_up + p_dm->dc_backoff;
-	/*s8		TH_L2H_dmc, IGI_target = 0x32;*/
-	/*s8		diff;*/
-
-	/*TH_L2H_dmc = 10;*/
-
-	/*diff = TH_L2H_dmc - p_dm->TH_L2H_ini;*/
-	/*lowest_IGI_upper = IGI_target - diff;*/
-	/*if ((adaptivity_igi_upper - lowest_IGI_upper) <= 5)*/
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct phydm_adaptivity_struct *adaptivity = &dm->adaptivity;
+	u8 adaptivity_igi_upper = adaptivity->adapt_igi_up + ADAPT_DC_BACKOFF;
 
 	if (adaptivity_igi_upper <= 0x26)
 		return true;
@@ -453,560 +298,467 @@ phydm_re_search_condition(
 		return false;
 }
 
-void
-phydm_adaptivity_info_init(
-	void				*p_dm_void,
-	enum phydm_adapinfo_e	cmn_info,
-	u32				value
-)
+void phydm_set_l2h_th_ini(void *dm_void)
 {
-	struct PHY_DM_STRUCT		*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	struct phydm_adaptivity_struct	*adaptivity = (struct phydm_adaptivity_struct *)phydm_get_structure(p_dm, PHYDM_ADAPTIVITY);
-
-	switch (cmn_info)	{
-	case PHYDM_ADAPINFO_CARRIER_SENSE_ENABLE:
-		p_dm->carrier_sense_enable = (boolean)value;
-		break;
-
-	case PHYDM_ADAPINFO_DCBACKOFF:
-		p_dm->dc_backoff = (u8)value;
-		break;
-
-	case PHYDM_ADAPINFO_DYNAMICLINKADAPTIVITY:
-		adaptivity->dynamic_link_adaptivity = (boolean)value;
-		break;
-
-	case PHYDM_ADAPINFO_TH_L2H_INI:
-		p_dm->th_l2h_ini = (s8)value;
-		break;
-
-	case PHYDM_ADAPINFO_TH_EDCCA_HL_DIFF:
-		p_dm->th_edcca_hl_diff = (s8)value;
-		break;
-
-	case PHYDM_ADAPINFO_AP_NUM_TH:
-		adaptivity->ap_num_th = (u8)value;
-		break;
-
-	default:
-		break;
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
 
+	if (dm->support_ic_type & ODM_IC_11AC_SERIES) {
+		if (dm->support_ic_type &
+		    (ODM_RTL8821C | ODM_RTL8822B | ODM_RTL8814A))
+			dm->th_l2h_ini = 0xf2;
+		else
+			dm->th_l2h_ini = 0xef;
+	} else  if (dm->support_ic_type & ODM_RTL8822C) {
+		dm->th_l2h_ini = 0x2d;
+	} else  if (dm->support_ic_type & ODM_RTL8814B) {
+		dm->th_l2h_ini = 0x31;
+	} else {
+		dm->th_l2h_ini = 0xf5;
 	}
-
 }
 
-void
-phydm_adaptivity_init(
-	void		*p_dm_void
-)
+void phydm_set_forgetting_factor(void *dm_void)
 {
-	struct PHY_DM_STRUCT		*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	struct phydm_adaptivity_struct	*adaptivity = (struct phydm_adaptivity_struct *)phydm_get_structure(p_dm, PHYDM_ADAPTIVITY);
-	s8	igi_target = 0x32;
-	/*struct phydm_dig_struct* p_dig_t = &p_dm->dm_dig_table;*/
-
-#if (DM_ODM_SUPPORT_TYPE & (ODM_CE | ODM_WIN))
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
 
-	if (p_dm->carrier_sense_enable == false) {
-		if (p_dm->th_l2h_ini == 0)
-			phydm_set_l2h_th_ini(p_dm);
-	} else
-		p_dm->th_l2h_ini = 0xa;
-
-	if (p_dm->th_edcca_hl_diff == 0)
-		p_dm->th_edcca_hl_diff = 7;
-#if (DM_ODM_SUPPORT_TYPE & (ODM_CE))
-	if (p_dm->wifi_test == true || *(p_dm->p_mp_mode) == true)
-#else
-	if ((p_dm->wifi_test & RT_WIFI_LOGO) == true)
-#endif
-		p_dm->edcca_enable = false;		/*even no adaptivity, we still enable EDCCA, AP side use mib control*/
-	else
-		p_dm->edcca_enable = true;
-
-#elif (DM_ODM_SUPPORT_TYPE & ODM_AP)
-	struct rtl8192cd_priv	*priv = p_dm->priv;
+	if (dm->support_ic_type & (ODM_RTL8821C | ODM_RTL8822B | ODM_RTL8814A))
+		odm_set_bb_reg(dm, R_0x8a0, BIT(1) | BIT(0), 0);
+	else if (dm->support_ic_type & ODM_IC_JGR3_SERIES)
+		odm_set_bb_reg(dm, R_0x83c, BIT(31) | BIT(30) | BIT(29), 0x7);
+}
 
-	if (p_dm->carrier_sense_enable) {
-		p_dm->th_l2h_ini = 0xa;
-		p_dm->th_edcca_hl_diff = 7;
+void phydm_set_pwdb_mode(void *dm_void)
+{
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+
+	if (dm->support_ability & ODM_BB_ADAPTIVITY) {
+		if (dm->support_ic_type & ODM_RTL8822B)
+			odm_set_bb_reg(dm, R_0x8dc, BIT(5), 0x1);
+		else if (dm->support_ic_type & (ODM_RTL8197F | ODM_RTL8192F))
+			odm_set_bb_reg(dm, R_0xce8, BIT(13), 0x1);
+		else if (dm->support_ic_type & ODM_IC_JGR3_SERIES)
+			odm_set_bb_reg(dm, R_0x844, BIT(30) | BIT(29), 0x0);
 	} else {
-		p_dm->th_l2h_ini = p_dm->TH_L2H_default;	/*set by mib*/
-		p_dm->th_edcca_hl_diff = p_dm->th_edcca_hl_diff_default;
+		if (dm->support_ic_type & ODM_RTL8822B)
+			odm_set_bb_reg(dm, R_0x8dc, BIT(5), 0x0);
+		else if (dm->support_ic_type & (ODM_RTL8197F | ODM_RTL8192F))
+			odm_set_bb_reg(dm, R_0xce8, BIT(13), 0x0);
+		else if (dm->support_ic_type & ODM_IC_JGR3_SERIES)
+			odm_set_bb_reg(dm, R_0x844, BIT(30) | BIT(29), 0x2);
 	}
+}
 
-	if (priv->pshare->rf_ft_var.adaptivity_enable == 2)
-		adaptivity->dynamic_link_adaptivity = true;
-	else
-		adaptivity->dynamic_link_adaptivity = false;
-
-#endif
-
-	adaptivity->adapt_igi_up = 0;
-	p_dm->adaptivity_enable = false;	/*use this flag to decide enable or disable*/
-
-	p_dm->th_l2h_ini_mode2 = 20;
-	p_dm->th_edcca_hl_diff_mode2 = 8;
-	adaptivity->debug_mode = false;
-	adaptivity->th_l2h_ini_backup = p_dm->th_l2h_ini;
-	adaptivity->th_edcca_hl_diff_backup = p_dm->th_edcca_hl_diff;
+void phydm_adaptivity_debug(void *dm_void, char input[][16], u32 *_used,
+			    char *output, u32 *_out_len)
+{
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct phydm_adaptivity_struct *adaptivity = &dm->adaptivity;
+	u32 used = *_used;
+	u32 out_len = *_out_len;
+	char help[] = "-h";
+	u32 dm_value[10] = {0};
+	u8 i = 0, input_idx = 0;
+	u32 reg_value32 = 0;
+	s8 h2l_diff = 0;
 
-	adaptivity->igi_base = 0x32;
-	adaptivity->igi_target = 0x1c;
-	adaptivity->h2l_lb = 0;
-	adaptivity->l2h_lb = 0;
-	adaptivity->is_check = false;
-	adaptivity->adajust_igi_level = 0;
-	adaptivity->is_stop_edcca = false;
-	adaptivity->backup_h2l = 0;
-	adaptivity->backup_l2h = 0;
-	adaptivity->adaptivity_dbg_port = (p_dm->support_ic_type & ODM_IC_11N_SERIES) ? 0x208 : 0x209;
-
-	phydm_mac_edcca_state(p_dm, phydm_dont_ignore_edcca);
-
-	if (p_dm->support_ic_type & ODM_IC_11N_GAIN_IDX_EDCCA) {
-		/*odm_set_bb_reg(p_dm, ODM_REG_EDCCA_DOWN_OPT_11N, BIT(12) | BIT(11) | BIT(10), 0x7);*/		/*interfernce need > 2^x us, and then EDCCA will be 1*/
-		if (p_dm->support_ic_type & ODM_RTL8197F) {
-			odm_set_bb_reg(p_dm, ODM_REG_PAGE_B1_97F, BIT(30), 0x1);								/*set to page B1*/
-			odm_set_bb_reg(p_dm, ODM_REG_EDCCA_DCNF_97F, BIT(27) | BIT(26), 0x1);		/*0:rx_dfir, 1: dcnf_out, 2 :rx_iq, 3: rx_nbi_nf_out*/
-			odm_set_bb_reg(p_dm, ODM_REG_PAGE_B1_97F, BIT(30), 0x0);
-		} else
-			odm_set_bb_reg(p_dm, ODM_REG_EDCCA_DCNF_11N, BIT(21) | BIT(20), 0x1);		/*0:rx_dfir, 1: dcnf_out, 2 :rx_iq, 3: rx_nbi_nf_out*/
+	for (i = 0; i < 5; i++) {
+		if (input[i + 1]) {
+			PHYDM_SSCANF(input[i + 1], DCMD_HEX, &dm_value[i]);
+			input_idx++;
+		}
 	}
-#if (RTL8195A_SUPPORT == 0)
-	if (p_dm->support_ic_type & ODM_IC_11AC_GAIN_IDX_EDCCA) {		/*8814a no need to find pwdB lower bound, maybe*/
-		/*odm_set_bb_reg(p_dm, ODM_REG_EDCCA_DOWN_OPT, BIT(30) | BIT(29) | BIT(28), 0x7);*/		/*interfernce need > 2^x us, and then EDCCA will be 1*/
-		odm_set_bb_reg(p_dm, ODM_REG_ACBB_EDCCA_ENHANCE, BIT(29) | BIT(28), 0x1);		/*0:rx_dfir, 1: dcnf_out, 2 :rx_iq, 3: rx_nbi_nf_out*/
+	if (strcmp(input[1], help) == 0) {
+		PDM_SNPF(out_len, used, output + used, out_len - used,
+			 "Show adaptivity message: {0}\n");
+		PDM_SNPF(out_len, used, output + used, out_len - used,
+			 "Enter debug mode: {1} {th_l2h_ini} {th_edcca_hl_diff}\n");
+		PDM_SNPF(out_len, used, output + used, out_len - used,
+			 "Leave debug mode: {2}\n");
+		PDM_SNPF(out_len, used, output + used, out_len - used,
+			 "Disable EDCCA thr: {3}\n");
+		PDM_SNPF(out_len, used, output + used, out_len - used,
+			 "Enable EDCCA thr: {4}\n");
+		goto out;
 	}
 
-	if (!(p_dm->support_ic_type & (ODM_IC_11AC_GAIN_IDX_EDCCA | ODM_IC_11N_GAIN_IDX_EDCCA))) {
-		phydm_search_pwdb_lower_bound(p_dm);
-		if (phydm_re_search_condition(p_dm))
-			phydm_search_pwdb_lower_bound(p_dm);
-	} else
-		phydm_set_edcca_threshold(p_dm, 0x7f, 0x7f);				/*resume to no link state*/
-#endif
-	/*forgetting factor setting*/
-	phydm_set_forgetting_factor(p_dm);
-
-	/*pwdb mode setting with 0: mean, 1:max*/
-	phydm_set_pwdb_mode(p_dm);
-
-	/*we need to consider PwdB upper bound for 8814 later IC*/
-	adaptivity->adajust_igi_level = (u8)((p_dm->th_l2h_ini + igi_target) - pwdb_upper_bound + dfir_loss);	/*IGI = L2H - PwdB - dfir_loss*/
+	if (input_idx == 0)
+		return;
 
-	/*Check this later on Windows*/
-	/*phydm_set_edcca_threshold_api(p_dm, p_dig_t->cur_ig_value);*/
+	if (dm_value[0] == PHYDM_ADAPT_DEBUG) {
+		adaptivity->debug_mode = true;
+		if (dm_value[1] != 0)
+			dm->th_l2h_ini = (s8)dm_value[1];
+		if (dm_value[2] != 0)
+			dm->th_edcca_hl_diff = (s8)dm_value[2];
+		PDM_SNPF(out_len, used, output + used, out_len - used,
+			 "th_l2h_ini = %d, th_edcca_hl_diff = %d\n",
+			 dm->th_l2h_ini, dm->th_edcca_hl_diff);
+	} else if (dm_value[0] == PHYDM_ADAPT_RESUME) {
+		adaptivity->debug_mode = false;
+		dm->th_l2h_ini = adaptivity->th_l2h_ini_backup;
+		dm->th_edcca_hl_diff = adaptivity->th_edcca_hl_diff_backup;
+	} else if (dm_value[0] == PHYDM_EDCCA_TH_PAUSE) {
+		adaptivity->edcca_en = false;
+	} else if (dm_value[0] == PHYDM_EDCCA_TH_RESUME) {
+		adaptivity->edcca_en = true;
+	} else if (dm_value[0] == PHYDM_ADAPT_MSG) {
+		PDM_SNPF(out_len, used, output + used, out_len - used,
+			 "debug_mode = %s, th_l2h_ini = %d\n",
+			 (adaptivity->debug_mode ? "TRUE" : "FALSE"),
+			 dm->th_l2h_ini);
+		if (dm->support_ic_type & ODM_IC_JGR3_SERIES) {
+			reg_value32 = odm_get_bb_reg(dm, R_0x84c, MASKDWORD);
+			h2l_diff = (s8)((0x00ff0000 & reg_value32) >> 16) -
+				   (s8)((0xff000000 & reg_value32) >> 24);
+		} else if (dm->support_ic_type & ODM_IC_11N_SERIES) {
+			reg_value32 = odm_get_bb_reg(dm, R_0xc4c, MASKDWORD);
+			h2l_diff = (s8)(0x000000ff & reg_value32) -
+				   (s8)((0x00ff0000 & reg_value32) >> 16);
+		} else if (dm->support_ic_type & ODM_IC_11AC_SERIES) {
+			reg_value32 = odm_get_bb_reg(dm, R_0x8a4, MASKDWORD);
+			h2l_diff = (s8)(0x000000ff & reg_value32) -
+				   (s8)((0x0000ff00 & reg_value32) >> 8);
+		}
 
-	p_dm->adaptivity_flag = (p_dm->support_ic_type & ODM_IC_GAIN_IDX_EDCCA) ? false : true;
-	
-#if (DM_ODM_SUPPORT_TYPE == ODM_AP)
-	adaptivity->igi_up_bound_lmt_val = 180;
-#else
-	adaptivity->igi_up_bound_lmt_val = 90;
-#endif
-	adaptivity->igi_up_bound_lmt_cnt = 0;
-	adaptivity->igi_lmt_en = false;
+		if (h2l_diff == 7)
+			PDM_SNPF(out_len, used, output + used, out_len - used,
+				 "adaptivity enable\n");
+		else
+			PDM_SNPF(out_len, used, output + used, out_len - used,
+				 "adaptivity disable\n");
+	}
 
+out:
+	*_used = used;
+	*_out_len = out_len;
 }
 
-
-void
-phydm_adaptivity(
-	void			*p_dm_void
-)
+void phydm_set_edcca_val(void *dm_void, u32 *val_buf, u8 val_len)
 {
-	struct PHY_DM_STRUCT		*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	struct phydm_dig_struct			*p_dig_t = &p_dm->dm_dig_table;
-	u8			igi = p_dig_t->cur_ig_value;
-	s8			th_l2h_dmc, th_h2l_dmc;
-	s8			diff = 0, igi_target = 0x32;
-	struct phydm_adaptivity_struct	*adaptivity = (struct phydm_adaptivity_struct *)phydm_get_structure(p_dm, PHYDM_ADAPTIVITY);
-#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
-	struct _ADAPTER		*p_adapter	= p_dm->adapter;
-	u32			is_fw_current_in_ps_mode = false;
-	u8			disable_ap_adapt_setting;
-
-	p_adapter->HalFunc.GetHwRegHandler(p_adapter, HW_VAR_FW_PSMODE_STATUS, (u8 *)(&is_fw_current_in_ps_mode));
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
 
-	/*Disable EDCCA mode while under LPS mode, added by Roger, 2012.09.14.*/
-	if (is_fw_current_in_ps_mode)
-		return;
-#endif
-
-	if ((p_dm->edcca_enable == false) || (adaptivity->is_stop_edcca == true)) {
-		PHYDM_DBG(p_dm, DBG_ADPTVTY, ("Disable EDCCA!!!\n"));
+	if (val_len != 2) {
+		PHYDM_DBG(dm, ODM_COMP_API,
+			  "[Error][adaptivity]Need val_len = 2\n");
 		return;
 	}
+	phydm_set_edcca_threshold(dm, (s8)val_buf[1], (s8)val_buf[0]);
+}
 
-	phydm_check_adaptivity(p_dm);	/*Check adaptivity enable*/
-	phydm_dig_up_bound_lmt_en(p_dm);
-
-	if ((!(p_dm->support_ability & ODM_BB_ADAPTIVITY)) && adaptivity->debug_mode == false) {
-		PHYDM_DBG(p_dm, DBG_ADPTVTY, ("adaptivity disable, enable EDCCA mode!!!\n"));
-		p_dm->th_l2h_ini = p_dm->th_l2h_ini_mode2;
-		p_dm->th_edcca_hl_diff = p_dm->th_edcca_hl_diff_mode2;
-	}
+boolean phydm_edcca_abort(void *dm_void)
+{
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct phydm_adaptivity_struct *adapt = &dm->adaptivity;
 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
-	else if (adaptivity->debug_mode == false) {
-		disable_ap_adapt_setting = false;
-		if (p_dm->p_soft_ap_mode != NULL) {
-			if (*(p_dm->p_soft_ap_mode) != 0 && (p_dm->soft_ap_special_setting & BIT(0)))
-				disable_ap_adapt_setting = true;
-			PHYDM_DBG(p_dm, DBG_ADPTVTY, ("p_dm->soft_ap_special_setting = %x, *(p_dm->p_soft_ap_mode) = %d, disable_ap_adapt_setting = %d\n", p_dm->soft_ap_special_setting, *(p_dm->p_soft_ap_mode), disable_ap_adapt_setting));
-		}
-		if (phydm_check_channel_plan(p_dm) || (p_dm->ap_total_num > adaptivity->ap_num_th) || disable_ap_adapt_setting) {
-			p_dm->th_l2h_ini = p_dm->th_l2h_ini_mode2;
-			p_dm->th_edcca_hl_diff = p_dm->th_edcca_hl_diff_mode2;
-		} else {
-			p_dm->th_l2h_ini = adaptivity->th_l2h_ini_backup;
-			p_dm->th_edcca_hl_diff = adaptivity->th_edcca_hl_diff_backup;
-		}
-	}
-#endif
-	else if (adaptivity->debug_mode == true) {
-		p_dm->th_l2h_ini = adaptivity->th_l2h_ini_debug;
-		p_dm->th_edcca_hl_diff = 7;
-		adaptivity->adajust_igi_level = (u8)((p_dm->th_l2h_ini + igi_target) - pwdb_upper_bound + dfir_loss);	/*IGI = L2H - PwdB - dfir_loss*/
-	}
-	PHYDM_DBG(p_dm, DBG_ADPTVTY, ("odm_Adaptivity() =====>\n"));
-	PHYDM_DBG(p_dm, DBG_ADPTVTY, ("igi_base=0x%x, th_l2h_ini = %d, th_edcca_hl_diff = %d\n",
-		adaptivity->igi_base, p_dm->th_l2h_ini, p_dm->th_edcca_hl_diff));
-#if (RTL8195A_SUPPORT == 0)
-	if (p_dm->support_ic_type & ODM_IC_11AC_SERIES) {
-		/*fix AC series when enable EDCCA hang issue*/
-		odm_set_bb_reg(p_dm, 0x800, BIT(10), 1);	/*ADC_mask disable*/
-		odm_set_bb_reg(p_dm, 0x800, BIT(10), 0);	/*ADC_mask enable*/
-	}
+	void *adapter = dm->adapter;
+	u32 is_fw_in_psmode = false;
 #endif
 
-	igi_target = adaptivity->igi_base;
-	adaptivity->igi_target = (u8) igi_target;
-
-	PHYDM_DBG(p_dm, DBG_ADPTVTY, ("band_width=%s, igi_target=0x%x, dynamic_link_adaptivity = %d\n",
-		(*p_dm->p_band_width == CHANNEL_WIDTH_80) ? "80M" : ((*p_dm->p_band_width == CHANNEL_WIDTH_40) ? "40M" : "20M"), igi_target, adaptivity->dynamic_link_adaptivity));
-	PHYDM_DBG(p_dm, DBG_ADPTVTY, ("adajust_igi_level= 0x%x, adaptivity_flag = %d, adaptivity_enable = %d\n",
-		adaptivity->adajust_igi_level, p_dm->adaptivity_flag, p_dm->adaptivity_enable));
-
-	if ((adaptivity->dynamic_link_adaptivity == true) && (!p_dm->is_linked) && (p_dm->adaptivity_enable == false)) {
-		phydm_set_edcca_threshold(p_dm, 0x7f, 0x7f);
-		PHYDM_DBG(p_dm, DBG_ADPTVTY, ("In DynamicLink mode(noisy) and No link, Turn off EDCCA!!\n"));
-		return;
+	if (dm->pause_ability & ODM_BB_ADAPTIVITY) {
+		PHYDM_DBG(dm, DBG_ADPTVTY, "Return: Pause ADPTVTY in LV=%d\n",
+			  dm->pause_lv_table.lv_adapt);
+		return true;
 	}
 
-	if (p_dm->support_ic_type & (ODM_IC_11AC_GAIN_IDX_EDCCA | ODM_IC_11N_GAIN_IDX_EDCCA)) {
-		if ((adaptivity->adajust_igi_level > igi) && (p_dm->adaptivity_enable == true))
-			diff = adaptivity->adajust_igi_level - igi;
-		else if (p_dm->adaptivity_enable == false)
-			diff = 0x3e - igi;
-
-		th_l2h_dmc = p_dm->th_l2h_ini - diff + igi_target;
-		th_h2l_dmc = th_l2h_dmc - p_dm->th_edcca_hl_diff;
+	if (!adapt->edcca_en) {
+		PHYDM_DBG(dm, DBG_ADPTVTY, "Disable EDCCA!!!\n");
+		return true;
 	}
-#if (RTL8195A_SUPPORT == 0)
-	else	{
-		diff = igi_target - (s8)igi;
-		th_l2h_dmc = p_dm->th_l2h_ini + diff;
-		if (th_l2h_dmc > 10 && (p_dm->adaptivity_enable == true))
-			th_l2h_dmc = 10;
 
-		th_h2l_dmc = th_l2h_dmc - p_dm->th_edcca_hl_diff;
+#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
+	((PADAPTER)adapter)->HalFunc.GetHwRegHandler(adapter,
+						      HW_VAR_FW_PSMODE_STATUS,
+						      (u8 *)(&is_fw_in_psmode));
 
-		/*replace lower bound to prevent EDCCA always equal 1*/
-		if (th_h2l_dmc < adaptivity->h2l_lb)
-			th_h2l_dmc = adaptivity->h2l_lb;
-		if (th_l2h_dmc < adaptivity->l2h_lb)
-			th_l2h_dmc = adaptivity->l2h_lb;
-	}
+	/*@Disable EDCCA while under LPS mode, added by Roger, 2012.09.14.*/
+	if (is_fw_in_psmode)
+		return true;
 #endif
-	adaptivity->th_l2h = th_l2h_dmc;
-	adaptivity->th_h2l = th_h2l_dmc;
-	PHYDM_DBG(p_dm, DBG_ADPTVTY, ("IGI=0x%x, th_l2h_dmc = %d, th_h2l_dmc = %d\n", igi, th_l2h_dmc, th_h2l_dmc));
-	PHYDM_DBG(p_dm, DBG_ADPTVTY, ("adapt_igi_up=0x%x, h2l_lb = 0x%x, l2h_lb = 0x%x\n", adaptivity->adapt_igi_up, adaptivity->h2l_lb, adaptivity->l2h_lb));
-	PHYDM_DBG(p_dm, DBG_ADPTVTY, ("debug_mode = %d\n", adaptivity->debug_mode));
-	phydm_set_edcca_threshold(p_dm, th_h2l_dmc, th_l2h_dmc);
-
-	if (p_dm->adaptivity_enable == true)
-		odm_set_mac_reg(p_dm, REG_RD_CTRL, BIT(11), 1);
 
-	return;
+	return false;
 }
-
-/*This API is for solving USB can't Tx problem due to USB3.0 interference in 2.4G*/
-void
-phydm_pause_edcca(
-	void	*p_dm_void,
-	boolean	is_pasue_edcca
-)
+#endif
+void phydm_set_edcca_threshold_api(void *dm_void, u8 IGI)
 {
-	struct PHY_DM_STRUCT	*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	struct phydm_adaptivity_struct	*adaptivity = (struct phydm_adaptivity_struct *)phydm_get_structure(p_dm, PHYDM_ADAPTIVITY);
-	struct phydm_dig_struct	*p_dig_t = &p_dm->dm_dig_table;
-	u8	IGI = p_dig_t->cur_ig_value;
-	s8	diff = 0;
-
-	if (is_pasue_edcca) {
-		adaptivity->is_stop_edcca = true;
-
-		if (p_dm->support_ic_type & (ODM_IC_11AC_GAIN_IDX_EDCCA | ODM_IC_11N_GAIN_IDX_EDCCA)) {
+#ifdef PHYDM_SUPPORT_ADAPTIVITY
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct phydm_adaptivity_struct *adaptivity = &dm->adaptivity;
+	s8 th_l2h_dmc = 0, th_h2l_dmc = 0;
+	s8 diff = 0, igi_target = 0x32;
+
+	if (dm->support_ability & ODM_BB_ADAPTIVITY) {
+		if (!(dm->support_ic_type & ODM_IC_PWDB_EDCCA)) {
 			if (adaptivity->adajust_igi_level > IGI)
 				diff = adaptivity->adajust_igi_level - IGI;
 
-			adaptivity->backup_l2h = p_dm->th_l2h_ini - diff + adaptivity->igi_target;
-			adaptivity->backup_h2l = adaptivity->backup_l2h - p_dm->th_edcca_hl_diff;
-		}
-#if (RTL8195A_SUPPORT == 0)
-		else {
-			diff = adaptivity->igi_target - (s8)IGI;
-			adaptivity->backup_l2h = p_dm->th_l2h_ini + diff;
-			if (adaptivity->backup_l2h > 10)
-				adaptivity->backup_l2h = 10;
+			th_l2h_dmc = dm->th_l2h_ini - diff + igi_target;
+			th_h2l_dmc = th_l2h_dmc - dm->th_edcca_hl_diff;
+		} else {
+			diff = igi_target - (s8)IGI;
+			th_l2h_dmc = dm->th_l2h_ini + diff;
+			if (th_l2h_dmc > 10)
+				th_l2h_dmc = 10;
 
-			adaptivity->backup_h2l = adaptivity->backup_l2h - p_dm->th_edcca_hl_diff;
+			th_h2l_dmc = th_l2h_dmc - dm->th_edcca_hl_diff;
 
 			/*replace lower bound to prevent EDCCA always equal 1*/
-			if (adaptivity->backup_h2l < adaptivity->h2l_lb)
-				adaptivity->backup_h2l = adaptivity->h2l_lb;
-			if (adaptivity->backup_l2h < adaptivity->l2h_lb)
-				adaptivity->backup_l2h = adaptivity->l2h_lb;
+			if (th_h2l_dmc < adaptivity->h2l_lb)
+				th_h2l_dmc = adaptivity->h2l_lb;
+			if (th_l2h_dmc < adaptivity->l2h_lb)
+				th_l2h_dmc = adaptivity->l2h_lb;
 		}
-#endif
-		PHYDM_DBG(p_dm, DBG_ADPTVTY, ("pauseEDCCA : L2Hbak = 0x%x, H2Lbak = 0x%x, IGI = 0x%x\n", adaptivity->backup_l2h, adaptivity->backup_h2l, IGI));
-
-		/*Disable EDCCA*/
-#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
-		if (odm_is_work_item_scheduled(&(adaptivity->phydm_pause_edcca_work_item)) == false)
-			odm_schedule_work_item(&(adaptivity->phydm_pause_edcca_work_item));
-#else
-		phydm_pause_edcca_work_item_callback(p_dm);
-#endif
 
-	} else {
-
-		adaptivity->is_stop_edcca = false;
-		PHYDM_DBG(p_dm, DBG_ADPTVTY, ("resumeEDCCA : L2Hbak = 0x%x, H2Lbak = 0x%x, IGI = 0x%x\n", adaptivity->backup_l2h, adaptivity->backup_h2l, IGI));
-		/*Resume EDCCA*/
-#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
-		if (odm_is_work_item_scheduled(&(adaptivity->phydm_resume_edcca_work_item)) == false)
-			odm_schedule_work_item(&(adaptivity->phydm_resume_edcca_work_item));
-#else
-		phydm_resume_edcca_work_item_callback(p_dm);
-#endif
+		PHYDM_DBG(dm, DBG_ADPTVTY,
+			  "API :IGI=0x%x, th_l2h_dmc = %d, th_h2l_dmc = %d\n",
+			  IGI, th_l2h_dmc, th_h2l_dmc);
 
+		phydm_set_edcca_threshold(dm, th_h2l_dmc, th_l2h_dmc);
 	}
-
+#endif
 }
 
-
-void
-phydm_pause_edcca_work_item_callback(
-#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
-	struct _ADAPTER		*adapter
-#else
-	void			*p_dm_void
-#endif
-)
+void phydm_adaptivity_info_init(void *dm_void, enum phydm_adapinfo cmn_info,
+				u32 value)
 {
-#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
-	PHAL_DATA_TYPE	p_hal_data = GET_HAL_DATA(adapter);
-	struct PHY_DM_STRUCT		*p_dm = &p_hal_data->DM_OutSrc;
-#else
-	struct PHY_DM_STRUCT	*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-#endif
-
-	if (p_dm->support_ic_type & ODM_IC_11N_SERIES)
-		odm_set_bb_reg(p_dm, REG_OFDM_0_ECCA_THRESHOLD, MASKBYTE2 | MASKBYTE0, (u32)(0x7f | 0x7f << 16));
-#if (RTL8195A_SUPPORT == 0)
-	else if (p_dm->support_ic_type & ODM_IC_11AC_SERIES)
-		odm_set_bb_reg(p_dm, REG_FPGA0_XB_LSSI_READ_BACK, MASKLWORD, (u16)(0x7f | 0x7f << 8));
-#endif
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct phydm_adaptivity_struct *adaptivity = &dm->adaptivity;
 
+	switch (cmn_info) {
+	case PHYDM_ADAPINFO_CARRIER_SENSE_ENABLE:
+		dm->carrier_sense_enable = (boolean)value;
+		break;
+	case PHYDM_ADAPINFO_TH_L2H_INI:
+		dm->th_l2h_ini = (s8)value;
+		break;
+	case PHYDM_ADAPINFO_TH_EDCCA_HL_DIFF:
+		dm->th_edcca_hl_diff = (s8)value;
+		break;
+	case PHYDM_ADAPINFO_AP_NUM_TH:
+		adaptivity->ap_num_th = (u8)value;
+		break;
+	default:
+		break;
+	}
 }
 
-void
-phydm_resume_edcca_work_item_callback(
-#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
-	struct _ADAPTER		*adapter
-#else
-	void			*p_dm_void
-#endif
-)
+void phydm_adaptivity_info_update(void *dm_void, enum phydm_adapinfo cmn_info,
+				  u32 value)
 {
-#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
-	PHAL_DATA_TYPE	p_hal_data = GET_HAL_DATA(adapter);
-	struct PHY_DM_STRUCT		*p_dm = &p_hal_data->DM_OutSrc;
-#else
-	struct PHY_DM_STRUCT	*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-#endif
-	struct phydm_adaptivity_struct	*adaptivity = (struct phydm_adaptivity_struct *)phydm_get_structure(p_dm, PHYDM_ADAPTIVITY);
-
-	if (p_dm->support_ic_type & ODM_IC_11N_SERIES)
-		odm_set_bb_reg(p_dm, REG_OFDM_0_ECCA_THRESHOLD, MASKBYTE2 | MASKBYTE0, (u32)((u8)adaptivity->backup_l2h | (u8)adaptivity->backup_h2l << 16));
-#if (RTL8195A_SUPPORT == 0)
-	else if (p_dm->support_ic_type & ODM_IC_11AC_SERIES)
-		odm_set_bb_reg(p_dm, REG_FPGA0_XB_LSSI_READ_BACK, MASKLWORD, (u16)((u8)adaptivity->backup_l2h | (u8)adaptivity->backup_h2l << 8));
-#endif
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct phydm_adaptivity_struct *adapt = &dm->adaptivity;
 
+	/*This init variable may be changed in run time.*/
+	switch (cmn_info) {
+	case PHYDM_ADAPINFO_DOMAIN_CODE_2G:
+		adapt->regulation_2g = (u8)value;
+		break;
+	case PHYDM_ADAPINFO_DOMAIN_CODE_5G:
+		adapt->regulation_5g = (u8)value;
+		break;
+	default:
+		break;
+	}
 }
 
-
-void
-phydm_set_edcca_threshold_api(
-	void	*p_dm_void,
-	u8	IGI
-)
+void phydm_adaptivity_init(void *dm_void)
 {
-	struct PHY_DM_STRUCT	*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	struct phydm_adaptivity_struct	*adaptivity = (struct phydm_adaptivity_struct *)phydm_get_structure(p_dm, PHYDM_ADAPTIVITY);
-	s8			th_l2h_dmc, th_h2l_dmc;
-	s8			diff = 0, igi_target = 0x32;
-
-	if (p_dm->support_ability & ODM_BB_ADAPTIVITY) {
-		if (p_dm->support_ic_type & (ODM_IC_11AC_GAIN_IDX_EDCCA | ODM_IC_11N_GAIN_IDX_EDCCA)) {
-			if (adaptivity->adajust_igi_level > IGI)
-				diff = adaptivity->adajust_igi_level - IGI;
+#ifdef PHYDM_SUPPORT_ADAPTIVITY
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct phydm_adaptivity_struct *adaptivity = &dm->adaptivity;
 
-			th_l2h_dmc = p_dm->th_l2h_ini - diff + igi_target;
-			th_h2l_dmc = th_l2h_dmc - p_dm->th_edcca_hl_diff;
-		}
-#if (RTL8195A_SUPPORT == 0)
-		else	{
-			diff = igi_target - (s8)IGI;
-			th_l2h_dmc = p_dm->th_l2h_ini + diff;
-			if (th_l2h_dmc > 10)
-				th_l2h_dmc = 10;
+#if (DM_ODM_SUPPORT_TYPE & (ODM_CE | ODM_WIN))
 
-			th_h2l_dmc = th_l2h_dmc - p_dm->th_edcca_hl_diff;
+	if (!dm->carrier_sense_enable) {
+		if (dm->th_l2h_ini == 0)
+			phydm_set_l2h_th_ini(dm);
+	} else {
+		dm->th_l2h_ini = 0xa;
+	}
 
-			/*replace lower bound to prevent EDCCA always equal 1*/
-			if (th_h2l_dmc < adaptivity->h2l_lb)
-				th_h2l_dmc = adaptivity->h2l_lb;
-			if (th_l2h_dmc < adaptivity->l2h_lb)
-				th_l2h_dmc = adaptivity->l2h_lb;
-		}
+	if (dm->th_edcca_hl_diff == 0)
+		dm->th_edcca_hl_diff = 7;
+#if (DM_ODM_SUPPORT_TYPE & (ODM_CE))
+	if (dm->wifi_test || *dm->mp_mode)
+#else
+	if (dm->wifi_test & RT_WIFI_LOGO) /*@AP side use mib control*/
 #endif
-		PHYDM_DBG(p_dm, DBG_ADPTVTY, ("API :IGI=0x%x, th_l2h_dmc = %d, th_h2l_dmc = %d\n", IGI, th_l2h_dmc, th_h2l_dmc));
-		PHYDM_DBG(p_dm, DBG_ADPTVTY, ("API :adapt_igi_up=0x%x, h2l_lb = 0x%x, l2h_lb = 0x%x\n", adaptivity->adapt_igi_up, adaptivity->h2l_lb, adaptivity->l2h_lb));
+		/*@even no adaptivity, we still enable EDCCA*/
+		adaptivity->edcca_en = false;
+	else
+		adaptivity->edcca_en = true;
 
-		phydm_set_edcca_threshold(p_dm, th_h2l_dmc, th_l2h_dmc);
+#elif (DM_ODM_SUPPORT_TYPE & ODM_AP)
+	if (dm->carrier_sense_enable) {
+		dm->th_l2h_ini = 0xa;
+		dm->th_edcca_hl_diff = 7;
+	} else {
+		dm->th_l2h_ini = dm->TH_L2H_default; /*set by mib*/
+		dm->th_edcca_hl_diff = dm->th_edcca_hl_diff_default;
 	}
-}
 
-void
-phydm_adaptivity_debug(
-	void		*p_dm_void,
-	u32		*const dm_value,
-	u32		*_used,
-	char		*output,
-	u32		*_out_len
-)
-{
-	struct PHY_DM_STRUCT		*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	struct phydm_adaptivity_struct	*adaptivity = (struct phydm_adaptivity_struct *)phydm_get_structure(p_dm, PHYDM_ADAPTIVITY);
-	u32 used = *_used;
-	u32 out_len = *_out_len;
-	u32 reg_value32;
-	s8 h2l_diff = 0;
+	adaptivity->edcca_en = true;
+#endif
 
-	if (dm_value[0] == PHYDM_ADAPT_DEBUG) {
-		PHYDM_SNPRINTF((output + used, out_len - used, "Adaptivity Debug Mode ===>\n"));
-		adaptivity->debug_mode = true;
-		adaptivity->th_l2h_ini_debug = (s8)dm_value[1];
-		PHYDM_SNPRINTF((output + used, out_len - used, "th_l2h_ini_debug = %d\n", adaptivity->th_l2h_ini_debug));
-	} else if (dm_value[0] == PHYDM_ADAPT_RESUME) {
-		PHYDM_SNPRINTF((output + used, out_len - used, "===> Adaptivity Resume\n"));
-		adaptivity->debug_mode = false;
-	} else if (dm_value[0] == PHYDM_EDCCA_TH_PAUSE) {
-		PHYDM_SNPRINTF((output + used, out_len - used, "EDCCA Threshold Pause\n"));
-		p_dm->edcca_enable = false;
-	} else if (dm_value[0] == PHYDM_EDCCA_RESUME) {
-		PHYDM_SNPRINTF((output + used, out_len - used, "EDCCA Resume\n"));
-		p_dm->edcca_enable = true;
-	} else if (dm_value[0] == PHYDM_ADAPT_MSG) {
-		PHYDM_SNPRINTF((output + used, out_len - used, "debug_mode = %s, th_l2h_ini = %d\n", (adaptivity->debug_mode ? "TRUE" : "FALSE"), p_dm->th_l2h_ini));
-		if (p_dm->support_ic_type & ODM_IC_11N_SERIES) {
-			reg_value32 = odm_get_bb_reg(p_dm, 0xc4c, MASKDWORD);
-			h2l_diff = (s8)(0x000000ff & reg_value32) - (s8)((0x00ff0000 & reg_value32)>>16);
-		}
-#if (RTL8195A_SUPPORT == 0)
-		else if (p_dm->support_ic_type & ODM_IC_11AC_SERIES) {
-			reg_value32 = odm_get_bb_reg(p_dm, 0x8a4, MASKDWORD);
-			h2l_diff = (s8)(0x000000ff & reg_value32) - (s8)((0x0000ff00 & reg_value32)>>8);
+	adaptivity->is_adapt_en = false; /*@decide enable or not*/
+	adaptivity->debug_mode = false;
+	adaptivity->th_l2h_ini_mode2 = 20;
+	adaptivity->th_edcca_hl_diff_mode2 = 8;
+	adaptivity->th_l2h_ini_backup = dm->th_l2h_ini;
+	adaptivity->th_edcca_hl_diff_backup = dm->th_edcca_hl_diff;
+	adaptivity->igi_base = 0x32;
+	adaptivity->adapt_igi_up = 0;
+	adaptivity->h2l_lb = 0;
+	adaptivity->l2h_lb = 0;
+	adaptivity->adajust_igi_level = 0;
+	adaptivity->th_l2h = 0x7f;
+	adaptivity->th_h2l = 0x7f;
+	phydm_mac_edcca_state(dm, PHYDM_DONT_IGNORE_EDCCA);
+
+	if (dm->support_ic_type & ODM_IC_JGR3_SERIES) {
+		adaptivity->adaptivity_dbg_port = 0x000;
+		odm_set_bb_reg(dm, R_0x1d6c, BIT(0), 1);
+	} else if (dm->support_ic_type & ODM_IC_11N_SERIES) {
+		adaptivity->adaptivity_dbg_port = 0x208;
+	} else {
+		adaptivity->adaptivity_dbg_port = 0x209;
+	}
+	if (dm->support_ic_type & ODM_IC_11N_SERIES &&
+	    !(dm->support_ic_type & ODM_IC_PWDB_EDCCA)) {
+		/*@interfernce need > 2^x us, and then EDCCA will be 1*/
+#if 0
+		/*odm_set_bb_reg(dm, 0x948, 0x1c00, 0x7);*/
+#endif
+		if (dm->support_ic_type & (ODM_RTL8197F | ODM_RTL8192F)) {
+			/*set to page B1*/
+			odm_set_bb_reg(dm, R_0xe28, BIT(30), 0x1);
+			/*@0:rx_dfir, 1: dcnf_out, 2 :rx_iq, 3: rx_nbi_nf_out*/
+			odm_set_bb_reg(dm, R_0xbc0, BIT(27) | BIT(26), 0x1);
+			odm_set_bb_reg(dm, R_0xe28, BIT(30), 0x0);
+		} else {
+			/*@0:rx_dfir, 1: dcnf_out, 2 :rx_iq, 3: rx_nbi_nf_out*/
+			odm_set_bb_reg(dm, R_0xe24, BIT(21) | BIT(20), 0x1);
 		}
+	} else if (dm->support_ic_type & ODM_IC_11AC_SERIES &&
+		   !(dm->support_ic_type & ODM_IC_PWDB_EDCCA)) {
+		/*@interfernce need > 2^x us, and then EDCCA will be 1*/
+#if 0
+		/*odm_set_bb_reg(dm, 0x900, 0x70000000, 0x7);*/
 #endif
-		if (h2l_diff == 7)
-			PHYDM_SNPRINTF((output + used, out_len - used, "adaptivity is enabled\n"));
-		else
-			PHYDM_SNPRINTF((output + used, out_len - used, "adaptivity is disabled\n"));
+		/*@0:rx_dfir, 1: dcnf_out, 2 :rx_iq, 3: rx_nbi_nf_out*/
+		odm_set_bb_reg(dm, R_0x944, BIT(29) | BIT(28), 0x1);
 	}
-	*_used = used;
-	*_out_len = out_len;
-}
 
-void
-phydm_set_l2h_th_ini(
-	void		*p_dm_void
-)
-{
-	struct PHY_DM_STRUCT		*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
+	if (dm->support_ic_type & ODM_IC_PWDB_EDCCA) {
+		phydm_search_pwdb_lower_bound(dm);
+		if (phydm_re_search_condition(dm))
+			phydm_search_pwdb_lower_bound(dm);
+	} else {
+		/*resume to no link state*/
+		phydm_set_edcca_threshold(dm, 0x7f, 0x7f);
+	}
 
-	if (p_dm->support_ic_type & ODM_IC_11AC_SERIES) {
-		if (p_dm->support_ic_type & (ODM_RTL8821C | ODM_RTL8822B | ODM_RTL8814A))
-			p_dm->th_l2h_ini = 0xf2;
-		else
-			p_dm->th_l2h_ini = 0xef;
-	} else
-		p_dm->th_l2h_ini = 0xf5;
-}
+	/*@forgetting factor setting*/
+	phydm_set_forgetting_factor(dm);
 
-void
-phydm_set_forgetting_factor(
-	void		*p_dm_void
-)
-{
-	struct PHY_DM_STRUCT		*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
+	/*pwdb mode setting with 0: mean, 1:max*/
+	phydm_set_pwdb_mode(dm);
 
-	if (p_dm->support_ic_type & (ODM_RTL8821C | ODM_RTL8822B | ODM_RTL8814A))
-		odm_set_bb_reg(p_dm, 0x8a0, BIT(1) | BIT(0), 0);
+#if (DM_ODM_SUPPORT_TYPE == ODM_AP)
+	adaptivity->igi_up_bound_lmt_val = 180;
+#else
+	adaptivity->igi_up_bound_lmt_val = 90;
+#endif
+	adaptivity->igi_up_bound_lmt_cnt = 0;
+	adaptivity->igi_lmt_en = false;
+#endif
 }
 
-void
-phydm_set_pwdb_mode(
-	void		*p_dm_void
-)
+void phydm_adaptivity(void *dm_void)
 {
-	struct PHY_DM_STRUCT		*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
+#ifdef PHYDM_SUPPORT_ADAPTIVITY
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct phydm_dig_struct *dig_t = &dm->dm_dig_table;
+	struct phydm_adaptivity_struct *adapt = &dm->adaptivity;
+	u8 igi = dig_t->cur_ig_value;
+	s8 th_l2h_dmc = 0, th_h2l_dmc = 0;
+	s8 diff = 0, igi_target = adapt->igi_base;
+
+	if (phydm_edcca_abort(dm))
+		return;
 
-	if (p_dm->support_ability & ODM_BB_ADAPTIVITY) {
-		if (p_dm->support_ic_type & ODM_RTL8822B)
-			odm_set_bb_reg(p_dm, 0x8dc, BIT(5), 0x1);
-		else if (p_dm->support_ic_type & ODM_RTL8197F)
-			odm_set_bb_reg(p_dm, 0xce8, BIT(13), 0x1);
-	} else {
-		if (p_dm->support_ic_type & ODM_RTL8822B)
-			odm_set_bb_reg(p_dm, 0x8dc, BIT(5), 0x0);
-		else if (p_dm->support_ic_type & ODM_RTL8197F)
-			odm_set_bb_reg(p_dm, 0xce8, BIT(13), 0x0);
+	/*@fix AC series when enable EDCCA hang issue*/
+	if (dm->support_ic_type & ODM_RTL8812) {
+		odm_set_bb_reg(dm, R_0x800, BIT(10), 1); /*@ADC_mask disable*/
+		odm_set_bb_reg(dm, R_0x800, BIT(10), 0); /*@ADC_mask enable*/
 	}
-}
 
-void
-phydm_set_edcca_val(
-	void			*p_dm_void,
-	u32			*val_buf,
-	u8			val_len
-)
-{
-	struct PHY_DM_STRUCT	*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
+	if (!adapt->debug_mode)
+		phydm_check_adaptivity(dm); /*@Check adaptivity enable*/
 
-	if (val_len != 2) {
-		PHYDM_DBG(p_dm, ODM_COMP_API, ("[Error][adaptivity]Need val_len = 2\n"));
-		return;
+	PHYDM_DBG(dm, DBG_ADPTVTY, "%s ====>\n", __func__);
+	PHYDM_DBG(dm, DBG_ADPTVTY, "th_l2h_ini = %d, th_edcca_hl_diff = %d\n",
+		  dm->th_l2h_ini, dm->th_edcca_hl_diff);
+	PHYDM_DBG(dm, DBG_ADPTVTY, "is_adapt_en = %d, debug_mode = %d\n",
+		  adapt->is_adapt_en, adapt->debug_mode);
+	if (dm->support_ic_type & ODM_IC_PWDB_EDCCA) {
+		/*@Limit IGI upper bound for adaptivity*/
+		phydm_dig_up_bound_lmt_en(dm);
+
+		diff = igi_target - (s8)igi;
+		th_l2h_dmc = dm->th_l2h_ini + diff;
+		if (th_l2h_dmc > 10 && adapt->is_adapt_en)
+			th_l2h_dmc = 10;
+
+		th_h2l_dmc = th_l2h_dmc - dm->th_edcca_hl_diff;
+
+		/*replace lower bound to prevent EDCCA always equal 1*/
+		if (th_h2l_dmc < adapt->h2l_lb)
+			th_h2l_dmc = adapt->h2l_lb;
+		if (th_l2h_dmc < adapt->l2h_lb)
+			th_l2h_dmc = adapt->l2h_lb;
+		PHYDM_DBG(dm, DBG_ADPTVTY,
+			  "adapt_igi_up=0x%x, h2l_lb = 0x%x, l2h_lb = 0x%x\n",
+			  adapt->adapt_igi_up, adapt->h2l_lb, adapt->l2h_lb);
+	} else if (dm->support_ic_type & ODM_IC_JGR3_SERIES) {
+		adapt->adajust_igi_level = (u8)(dm->th_l2h_ini - ADC_BACKOFF);
+		if (adapt->is_adapt_en) {
+			diff = adapt->adajust_igi_level > igi ?
+			       adapt->adajust_igi_level - igi :
+			       0;
+			th_l2h_dmc = dm->th_l2h_ini - diff;
+			th_h2l_dmc = th_l2h_dmc - dm->th_edcca_hl_diff;
+		} else {
+			th_l2h_dmc = igi + 8 > adapt->th_l2h_ini_backup ?
+				     igi + 8 :
+				     adapt->th_l2h_ini_backup;
+			th_h2l_dmc = th_l2h_dmc - dm->th_edcca_hl_diff;
+		}
+	} else {
+		/*we need to consider PwdB upper bound for 8814 later IC*/
+		adapt->adajust_igi_level = (u8)(dm->th_l2h_ini + igi_target -
+					   PWDB_UPPER_BOUND + DFIR_LOSS);
+		if (adapt->adajust_igi_level > igi && adapt->is_adapt_en)
+			diff = adapt->adajust_igi_level - igi;
+		else if (!adapt->is_adapt_en)
+			diff = 0x3e - igi;
+
+		th_l2h_dmc = dm->th_l2h_ini - diff + igi_target;
+		if (dm->support_ic_type & ODM_RTL8198F) /* @need to check */
+			th_l2h_dmc -= 4;
+		th_h2l_dmc = th_l2h_dmc - dm->th_edcca_hl_diff;
+		PHYDM_DBG(dm, DBG_ADPTVTY, "adajust_igi_level= 0x%x\n",
+			  adapt->adajust_igi_level);
 	}
-	if (p_dm->pause_ability & BIT(F13_ADPTVTY))
-		p_dm->adaptivity.is_stop_edcca = true;
-	else
-		p_dm->adaptivity.is_stop_edcca = false;
 
-	phydm_set_edcca_threshold(p_dm, (s8)val_buf[1], (s8)val_buf[0]);
+	adapt->th_l2h = th_l2h_dmc;
+	adapt->th_h2l = th_h2l_dmc;
+	PHYDM_DBG(dm, DBG_ADPTVTY, "IGI=0x%x, th_l2h_dmc=%d, th_h2l_dmc=%d\n",
+		  igi, th_l2h_dmc, th_h2l_dmc);
+	phydm_set_edcca_threshold(dm, th_h2l_dmc, th_l2h_dmc);
+
+	if (adapt->is_adapt_en)
+		odm_set_mac_reg(dm, REG_RD_CTRL, BIT(11), 1);
+
+	return;
+#endif
 }
diff --git a/rtl8723DS/hal/phydm/phydm_adaptivity.h b/rtl8723DS/hal/phydm/phydm_adaptivity.h
index 3c58943..147a125 100755..100644
--- a/rtl8723DS/hal/phydm/phydm_adaptivity.h
+++ b/rtl8723DS/hal/phydm/phydm_adaptivity.h
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2007 - 2017 Realtek Corporation.
+ * Copyright(c) 2007 - 2017  Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -8,20 +8,41 @@
  *
  * This program is distributed in the hope that it will be useful, but WITHOUT
  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  * more details.
  *
+ * The full GNU General Public License is included in this distribution in the
+ * file called LICENSE.
+ *
+ * Contact Information:
+ * wlanfae <wlanfae@realtek.com>
+ * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
+ * Hsinchu 300, Taiwan.
+ *
+ * Larry Finger <Larry.Finger@lwfinger.net>
+ *
  *****************************************************************************/
 
-
-#ifndef	__PHYDMADAPTIVITY_H__
-#define    __PHYDMADAPTIVITY_H__
-
-#define ADAPTIVITY_VERSION	"9.5.7"	/*20170627 changed by Kevin, move adapt_igi_up from phydm.h to phydm_adaptivity.h*/
-
-#define pwdb_upper_bound	7
-#define dfir_loss	7
-
+#ifndef __PHYDMADAPTIVITY_H__
+#define __PHYDMADAPTIVITY_H__
+
+#define ADAPTIVITY_VERSION "9.6.01" /*@20180814 changed by Kevin,
+				     *add phydm_edcca_abort func.
+				     */
+
+#define PWDB_UPPER_BOUND 7
+#define DFIR_LOSS 7
+#define ADC_BACKOFF 12
+#define ODM_IC_PWDB_EDCCA (ODM_RTL8188E | ODM_RTL8723B | ODM_RTL8192E |\
+			   ODM_RTL8881A | ODM_RTL8821 | ODM_RTL8812)
+
+#if (DM_ODM_SUPPORT_TYPE & (ODM_CE | ODM_AP))
+	#define ADAPT_DC_BACKOFF 2
+#elif (DM_ODM_SUPPORT_TYPE & ODM_WIN)
+	#define ADAPT_DC_BACKOFF 4
+#elif (DM_ODM_SUPPORT_TYPE & ODM_IOT)
+	#define ADAPT_DC_BACKOFF 0
+#endif
 #if (DM_ODM_SUPPORT_TYPE & (ODM_WIN))
 enum phydm_regulation_type {
 	REGULATION_FCC		= 0,
@@ -32,176 +53,70 @@ enum phydm_regulation_type {
 };
 #endif
 
-enum phydm_adapinfo_e {
+enum phydm_adapinfo {
 	PHYDM_ADAPINFO_CARRIER_SENSE_ENABLE = 0,
-	PHYDM_ADAPINFO_DCBACKOFF,
-	PHYDM_ADAPINFO_DYNAMICLINKADAPTIVITY,
 	PHYDM_ADAPINFO_TH_L2H_INI,
 	PHYDM_ADAPINFO_TH_EDCCA_HL_DIFF,
-	PHYDM_ADAPINFO_AP_NUM_TH
-};
-
-enum phydm_set_lna {
-	phydm_disable_lna		= 0,
-	phydm_enable_lna		= 1,
-};
-
-enum phydm_trx_mux_type {
-	phydm_shutdown			= 0,
-	phydm_standby_mode		= 1,
-	phydm_tx_mode			= 2,
-	phydm_rx_mode			= 3
+	PHYDM_ADAPINFO_AP_NUM_TH,
+	PHYDM_ADAPINFO_DOMAIN_CODE_2G,
+	PHYDM_ADAPINFO_DOMAIN_CODE_5G
 };
 
 enum phydm_mac_edcca_type {
-	phydm_ignore_edcca			= 0,
-	phydm_dont_ignore_edcca		= 1
+	PHYDM_IGNORE_EDCCA		= 0,
+	PHYDM_DONT_IGNORE_EDCCA		= 1
 };
 
 enum phydm_adaptivity_mode {
 	PHYDM_ADAPT_MSG			= 0,
 	PHYDM_ADAPT_DEBUG		= 1,
 	PHYDM_ADAPT_RESUME		= 2,
-	PHYDM_EDCCA_TH_PAUSE	= 3,
-	PHYDM_EDCCA_RESUME		= 4
+	PHYDM_EDCCA_TH_PAUSE		= 3,
+	PHYDM_EDCCA_TH_RESUME		= 4
 };
 
 struct phydm_adaptivity_struct {
 	s8			th_l2h_ini_backup;
 	s8			th_edcca_hl_diff_backup;
 	s8			igi_base;
-	u8			igi_target;
 	s8			h2l_lb;
 	s8			l2h_lb;
-	boolean		is_check;
-	boolean		dynamic_link_adaptivity;
 	u8			ap_num_th;
 	u8			adajust_igi_level;
-	s8			backup_l2h;
-	s8			backup_h2l;
-	boolean			is_stop_edcca;
-#if (DM_ODM_SUPPORT_TYPE & ODM_WIN)
-	RT_WORK_ITEM	phydm_pause_edcca_work_item;
-	RT_WORK_ITEM	phydm_resume_edcca_work_item;
-#endif
 	u32			adaptivity_dbg_port; /*N:0x208, AC:0x209*/
 	u8			debug_mode;
-	s8			th_l2h_ini_debug;
-	u16			igi_up_bound_lmt_cnt;	/*When igi_up_bound_lmt_cnt !=0, limit IGI upper bound to "adapt_igi_up"*/
-	u16			igi_up_bound_lmt_val;	/*max value of igi_up_bound_lmt_cnt*/
-	boolean		igi_lmt_en;
+	u16			igi_up_bound_lmt_cnt;	/*@When igi_up_bound_lmt_cnt !=0, limit IGI upper bound to "adapt_igi_up"*/
+	u16			igi_up_bound_lmt_val;	/*@max value of igi_up_bound_lmt_cnt*/
+	boolean			igi_lmt_en;
 	u8			adapt_igi_up;
-	s8			rvrt_val[2];
+	u32			rvrt_val[2];
 	s8			th_l2h;
 	s8			th_h2l;
+	u8			regulation_2g;
+	u8			regulation_5g;
+	boolean			is_adapt_en;
+	boolean			edcca_en;
+	s8			th_l2h_ini_mode2;
+	s8			th_edcca_hl_diff_mode2;
 };
 
-void
-phydm_pause_edcca(
-	void	*p_dm_void,
-	boolean	is_pasue_edcca
-);
-
-void
-phydm_check_environment(
-	void					*p_dm_void
-);
-
-void
-phydm_mac_edcca_state(
-	void					*p_dm_void,
-	enum phydm_mac_edcca_type		state
-);
-
-void
-phydm_set_edcca_threshold(
-	void		*p_dm_void,
-	s8		H2L,
-	s8		L2H
-);
-
-void
-phydm_set_trx_mux(
-	void			*p_dm_void,
-	enum phydm_trx_mux_type			tx_mode,
-	enum phydm_trx_mux_type			rx_mode
-);
-
-void
-phydm_search_pwdb_lower_bound(
-	void					*p_dm_void
-);
-
-void
-phydm_adaptivity_info_init(
-	void			*p_dm_void,
-	enum phydm_adapinfo_e	cmn_info,
-	u32				value
-);
-
-void
-phydm_adaptivity_init(
-	void					*p_dm_void
-);
-
-void
-phydm_adaptivity(
-	void			*p_dm_void
-);
-
-void
-phydm_set_edcca_threshold_api(
-	void	*p_dm_void,
-	u8	IGI
-);
-
-void
-phydm_pause_edcca_work_item_callback(
-#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
-	struct _ADAPTER		*adapter
-#else
-	void			*p_dm_void
-#endif
-);
-
-void
-phydm_resume_edcca_work_item_callback(
-#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
-	struct _ADAPTER		*adapter
-#else
-	void			*p_dm_void
+#ifdef PHYDM_SUPPORT_ADAPTIVITY
+void phydm_adaptivity_debug(void *dm_void, char input[][16], u32 *_used,
+			    char *output, u32 *_out_len);
+
+void phydm_set_edcca_val(void *dm_void, u32 *val_buf, u8 val_len);
 #endif
-);
-
-void
-phydm_adaptivity_debug(
-	void		*p_dm_void,
-	u32		*const dm_value,
-	u32		*_used,
-	char		*output,
-	u32		*_out_len
-);
-
-void
-phydm_set_l2h_th_ini(
-	void		*p_dm_void
-);
-
-void
-phydm_set_forgetting_factor(
-	void		*p_dm_void
-);
-
-void
-phydm_set_pwdb_mode(
-	void		*p_dm_void
-);
-
-void
-phydm_set_edcca_val(
-	void			*p_dm_void,
-	u32			*val_buf,
-	u8			val_len
-);
+
+void phydm_set_edcca_threshold_api(void *dm_void, u8 IGI);
+
+void phydm_adaptivity_info_init(void *dm_void, enum phydm_adapinfo cmn_info,
+				u32 value);
+
+void phydm_adaptivity_info_update(void *dm_void, enum phydm_adapinfo cmn_info,
+				  u32 value);
+
+void phydm_adaptivity_init(void *dm_void);
+
+void phydm_adaptivity(void *dm_void);
 
 #endif
diff --git a/rtl8723DS/hal/phydm/phydm_adc_sampling.c b/rtl8723DS/hal/phydm/phydm_adc_sampling.c
index 9ce6f11..ea9d0c0 100755..100644
--- a/rtl8723DS/hal/phydm/phydm_adc_sampling.c
+++ b/rtl8723DS/hal/phydm/phydm_adc_sampling.c
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2007 - 2017 Realtek Corporation.
+ * Copyright(c) 2007 - 2017  Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -8,274 +8,388 @@
  *
  * This program is distributed in the hope that it will be useful, but WITHOUT
  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  * more details.
  *
+ * The full GNU General Public License is included in this distribution in the
+ * file called LICENSE.
+ *
+ * Contact Information:
+ * wlanfae <wlanfae@realtek.com>
+ * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
+ * Hsinchu 300, Taiwan.
+ *
+ * Larry Finger <Larry.Finger@lwfinger.net>
+ *
  *****************************************************************************/
 
 #include "mp_precomp.h"
 #include "phydm_precomp.h"
 
+#if (PHYDM_LA_MODE_SUPPORT)
+
 #if (DM_ODM_SUPPORT_TYPE & ODM_AP)
-	#if ((RTL8197F_SUPPORT == 1) || (RTL8822B_SUPPORT == 1))
-		#include "rtl8197f/Hal8197FPhyReg.h"
-		#include "WlanHAL/HalMac88XX/halmac_reg2.h"
-	#else
-		#include "WlanHAL/HalHeader/HalComReg.h"
-	#endif
+#if (RTL8197F_SUPPORT || RTL8822B_SUPPORT || RTL8192F_SUPPORT)
+#include "rtl8197f/Hal8197FPhyReg.h"
+#include "WlanHAL/HalMac88XX/halmac_reg2.h"
+#else
+#include "WlanHAL/HalHeader/HalComReg.h"
 #endif
-
-#if (PHYDM_LA_MODE_SUPPORT == 1)
-
-#if (DM_ODM_SUPPORT_TYPE & ODM_WIN)
-
+#elif (DM_ODM_SUPPORT_TYPE & ODM_WIN)
 #if WPP_SOFTWARE_TRACE
-	#include "phydm_adc_sampling.tmh"
+#include "phydm_adc_sampling.tmh"
 #endif
-
 #endif
 
-#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_CE))
+#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_CE | ODM_AP))
 boolean
-phydm_la_buffer_allocate(
-	void			*p_dm_void
-)
+phydm_la_buffer_allocate(void *dm_void)
 {
-	struct PHY_DM_STRUCT		*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	struct _RT_ADCSMP		*adc_smp = &(p_dm->adcsmp);
-#if (DM_ODM_SUPPORT_TYPE & ODM_WIN)
-	struct _ADAPTER		*adapter = p_dm->adapter;
-#endif
-	struct _RT_ADCSMP_STRING	*adc_smp_buf = &(adc_smp->adc_smp_buf);
-	boolean	ret = false;
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct rt_adcsmp *smp = &dm->adcsmp;
+	#if (DM_ODM_SUPPORT_TYPE & ODM_WIN)
+	void *adapter = dm->adapter;
+	#endif
+	struct rt_adcsmp_string *buf = &smp->adc_smp_buf;
+	boolean ret = true;
 
-	dbg_print("[LA mode BufferAllocate]\n");
+	pr_debug("[LA mode BufferAllocate]\n");
 
-	if (adc_smp_buf->length == 0) {
+	if (buf->length == 0) {
+	#if (DM_ODM_SUPPORT_TYPE & ODM_WIN)
+		if (PlatformAllocateMemoryWithZero(adapter, (void **)&
+						   buf->octet,
+						   buf->buffer_size) !=
+						   RT_STATUS_SUCCESS)
+			ret = false;
+	#else
+		odm_allocate_memory(dm, (void **)&buf->octet, buf->buffer_size);
 
-#if (DM_ODM_SUPPORT_TYPE & ODM_WIN)
-		if (PlatformAllocateMemoryWithZero(adapter, (void **)&(adc_smp_buf->octet), adc_smp_buf->buffer_size) != RT_STATUS_SUCCESS) {
-#else
-		odm_allocate_memory(p_dm, (void **)&adc_smp_buf->octet, adc_smp_buf->buffer_size);
-		if (!adc_smp_buf->octet)	{
-#endif
+		if (!buf->octet)
 			ret = false;
-		} else
-			adc_smp_buf->length = adc_smp_buf->buffer_size;
-			ret = true;
+	#endif
+
+		if (ret)
+			buf->length = buf->buffer_size;
 	}
 
 	return ret;
 }
 #endif
 
-void
-phydm_la_get_tx_pkt_buf(
-	void			*p_dm_void
-)
+void phydm_la_get_tx_pkt_buf(void *dm_void)
 {
-	struct PHY_DM_STRUCT			*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	struct _RT_ADCSMP			*adc_smp = &(p_dm->adcsmp);
-	struct _RT_ADCSMP_STRING	*adc_smp_buf = &(adc_smp->adc_smp_buf);
-	u32				i = 0, value32, data_l = 0, data_h = 0;
-	u32				addr, finish_addr;
-	u32				end_addr = (adc_smp_buf->start_pos  + adc_smp_buf->buffer_size) - 1;	/*end_addr = 0x3ffff;*/
-	boolean				is_round_up;
-	static u32			page = 0xFF;
-	u32				smp_cnt = 0, smp_number = 0, addr_8byte = 0;
-	u8				backup_dma = 0;
-
-	odm_memory_set(p_dm, adc_smp_buf->octet, 0, adc_smp_buf->length);
-	odm_write_1byte(p_dm, 0x0106, 0x69);
-
-	dbg_print("GetTxPktBuf\n");
-
-	value32 = odm_read_4byte(p_dm, 0x7c0);
-	is_round_up = (boolean)((value32 & BIT(31)) >> 31);
-	finish_addr = (value32 & 0x7FFF0000) >> 16;	/*Reg7C0[30:16]: finish addr (unit: 8byte)*/
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct rt_adcsmp *smp = &dm->adcsmp;
+	struct rt_adcsmp_string *buf = &smp->adc_smp_buf;
+	u32 i = 0, value32 = 0, data_l = 0, data_h = 0;
+	u32 addr = 0, finish_addr = 0;
+	boolean is_round_up = false;
+	static u32 page = 0xFF;
+	u32 smp_cnt = 0, smp_number = 10, addr_8byte = 0;
+	#if (DM_ODM_SUPPORT_TYPE & ODM_AP)
+	#if (RTL8197F_SUPPORT || RTL8198F_SUPPORT)
+	u8 backup_dma = 0;
+	#endif
+	#endif
+
+	odm_memory_set(dm, buf->octet, 0, buf->length);
+	pr_debug("GetTxPktBuf\n");
+
+	if (dm->support_ic_type & ODM_RTL8192F) {
+		value32 = odm_read_4byte(dm, R_0x7f0);
+		is_round_up = (boolean)((value32 & BIT(31)) >> 31);
+		/*Reg7F0[30:15]: finish addr (unit: 8byte)*/
+		finish_addr = (value32 & 0x7FFF8000) >> 15;
+	} else {
+		odm_write_1byte(dm, R_0x0106, 0x69);
+		value32 = odm_read_4byte(dm, R_0x7c0);
+		is_round_up = (boolean)((value32 & BIT(31)) >> 31);
+		/*Reg7C0[30:16]: finish addr (unit: 8byte)*/
+		if (dm->support_ic_type & (ODM_RTL8822B | ODM_RTL8822C |
+		    ODM_RTL8821C | ODM_RTL8814A | ODM_RTL8814B | ODM_RTL8812F |
+		    ODM_RTL8195B))
+			finish_addr = (value32 & 0x7FFF0000) >> 16;
+		/*Reg7C0[30:15]: finish addr (unit: 8byte)*/
+		else if (dm->support_ic_type & (ODM_RTL8198F | ODM_RTL8197F))
+			finish_addr = (value32 & 0x7FFF8000) >> 15;
+	}
 
 	#if (DM_ODM_SUPPORT_TYPE & ODM_AP)
-	#if (RTL8197F_SUPPORT)
-	if (p_dm->support_ic_type & ODM_RTL8197F) {
-		odm_set_bb_reg(p_dm, 0x7c0, BIT(0), 0x0);
-		
+	#if (RTL8197F_SUPPORT || RTL8198F_SUPPORT)
+	if (dm->support_ic_type & (ODM_RTL8197F | ODM_RTL8198F)) {
+		pr_debug("98F GetTxPktBuf from iMEM\n");
+		odm_set_bb_reg(dm, R_0x7c0, BIT(0), 0x0);
+
 		/*Stop DMA*/
-		backup_dma = odm_get_mac_reg(p_dm, 0x300, MASKLWORD);
-		odm_set_mac_reg(p_dm, 0x300, 0x7fff, 0x7fff);
+		backup_dma = odm_get_mac_reg(dm, R_0x300, MASKLWORD);
+		odm_set_mac_reg(dm, R_0x300, 0x7fff, 0x7fff);
 
-		/*move LA mode content from IMEM to TxPktBuffer
+		/*@move LA mode content from IMEM to TxPktBuffer
 			Source : OCPBASE_IMEM 0x00000000
 			Destination : OCPBASE_TXBUF 0x18780000
 			Length : 64K*/
-		GET_HAL_INTERFACE(p_dm->priv)->init_ddma_handler(p_dm->priv, OCPBASE_IMEM, OCPBASE_TXBUF, 0x10000);
+		GET_HAL_INTERFACE(dm->priv)->init_ddma_handler(dm->priv,
+							       OCPBASE_IMEM,
+							       OCPBASE_TXBUF
+							       + buf->start_pos,
+							       0x10000);
 	}
 	#endif
 	#endif
 
+	pr_debug("start_addr = ((0x%x)), end_addr = ((0x%x)), buffer_size = ((0x%x))\n",
+		 buf->start_pos, buf->end_pos, buf->buffer_size);
 	if (is_round_up) {
+		pr_debug("buf_start(0x%x)|----2---->|finish_addr(0x%x)|----1---->|buf_end(0x%x)\n",
+			 buf->start_pos, finish_addr << 3, buf->end_pos);
 		addr = (finish_addr + 1) << 3;
-		dbg_print("is_round_up = ((%d)), finish_addr=((0x%x)), 0x7c0=((0x%x))\n", is_round_up, finish_addr, value32);
-		smp_number = ((adc_smp_buf->buffer_size) >> 3);	/*Byte to 8Byte (64bit)*/
-	} else	 {
-		addr = adc_smp_buf->start_pos;
+		pr_debug("is_round_up = ((%d)), finish_addr=((0x%x)), 0x7c0/0x7F0=((0x%x))\n",
+			 is_round_up, finish_addr, value32);
+		/*@Byte to 8Byte (64bit)*/
+		smp_number = (buf->buffer_size) >> 3;
+	} else {
+		pr_debug("buf_start(0x%x)|------->|finish_addr(0x%x)             |buf_end(0x%x)\n",
+			 buf->start_pos, finish_addr << 3, buf->end_pos);
+		addr = buf->start_pos;
 		addr_8byte = addr >> 3;
-		
+
 		if (addr_8byte > finish_addr)
 			smp_number = addr_8byte - finish_addr;
 		else
 			smp_number = finish_addr - addr_8byte;
 
-		dbg_print("is_round_up = ((%d)), finish_addr=((0x%x * 8Byte)), Start_Addr = ((0x%x * 8Byte)), smp_number = ((%d))\n", is_round_up, finish_addr, addr_8byte, smp_number);
-
+		pr_debug("is_round_up = ((%d)), finish_addr=((0x%x * 8Byte)), Start_Addr = ((0x%x * 8Byte)), smp_number = ((%d))\n",
+			 is_round_up, finish_addr, addr_8byte, smp_number);
 	}
-	/*
-	dbg_print("is_round_up = %d, finish_addr=0x%x, value32=0x%x\n", is_round_up, finish_addr, value32);
-	dbg_print("end_addr = %x, adc_smp_buf->start_pos = 0x%x, adc_smp_buf->buffer_size = 0x%x\n", end_addr, adc_smp_buf->start_pos, adc_smp_buf->buffer_size);
-	*/
+	#if 0
+	dbg_print("is_round_up = %d, finish_addr=0x%x, value32=0x%x\n",
+		  is_round_up, finish_addr, value32);
+	dbg_print(
+		  "end_addr = %x, buf->start_pos = 0x%x, buf->buffer_size = 0x%x\n",
+		  end_addr, buf->start_pos, buf->buffer_size);
+	#endif
 
-	if (p_dm->support_ic_type & ODM_RTL8197F) {
-		for (addr = 0x0, i = 0; addr < end_addr; addr += 8, i += 2) {	/*64K byte*/
+	#if (RTL8197F_SUPPORT || RTL8198F_SUPPORT || RTL8814B_SUPPORT)
+	if (dm->support_ic_type &
+	    (ODM_RTL8197F | ODM_RTL8198F | ODM_RTL8814B)) {
+		for (addr = buf->start_pos, i = 0; addr < buf->end_pos;
+		     addr += 8, i += 2) {
 			if ((addr & 0xfff) == 0)
-				odm_set_bb_reg(p_dm, 0x0140, MASKLWORD, 0x780 + (addr >> 12));
-			data_l = odm_get_bb_reg(p_dm, 0x8000 + (addr & 0xfff), MASKDWORD);
-			data_h = odm_get_bb_reg(p_dm, 0x8000 + (addr & 0xfff) + 4, MASKDWORD);
-
-			dbg_print("%08x%08x\n", data_h, data_l);
+				odm_set_bb_reg(dm, R_0x0140, MASKLWORD, 0x780 +
+					       (addr >> 12));
+			data_l = odm_get_bb_reg(dm, 0x8000 + (addr & 0xfff),
+						MASKDWORD);
+			data_h = odm_get_bb_reg(dm, 0x8000 + (addr & 0xfff) +
+						4, MASKDWORD);
+			buf->octet[i] = data_h;
+			buf->octet[i + 1] = data_l;
+
+			if (smp->is_la_print)
+				pr_debug("%08x%08x\n", data_h, data_l);
 		}
-	} else {
-	
-		i = 0;
-		while (addr != (finish_addr << 3)) {
-			if (page != (addr >> 12)) {
-				/*Reg140=0x780+(addr>>12), addr=0x30~0x3F, total 16 pages*/
-				page = (addr >> 12);
-			}
-			odm_set_bb_reg(p_dm, 0x0140, MASKLWORD, 0x780 + page);
-
-			/*pDataL = 0x8000+(addr&0xfff);*/
-			data_l = odm_get_bb_reg(p_dm, 0x8000 + (addr & 0xfff), MASKDWORD);
-			data_h = odm_get_bb_reg(p_dm, 0x8000 + (addr & 0xfff) + 4, MASKDWORD);
-
-			#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_CE))
-			adc_smp_buf->octet[i] = data_h;
-			adc_smp_buf->octet[i + 1] = data_l;
-			#endif
-
-		#if DBG /*WIN driver check build*/
-			dbg_print("%08x%08x\n", data_h, data_l);
-		#else	/*WIN driver free build*/
+	} else
+	#endif
+	{
+		for (i = 0; smp_cnt < smp_number; smp_cnt++, i += 2) {
+			if (dm->support_ic_type & ODM_RTL8192F) {
 			#if (DM_ODM_SUPPORT_TYPE & ODM_WIN)
-			RT_TRACE_EX(COMP_LA_MODE, DBG_LOUD, ("%08x%08x\n", adc_smp_buf->octet[i], adc_smp_buf->octet[i + 1]));
+				indirect_access_sdram_8192f(dm->adapter,
+							    TX_PACKET_BUFFER,
+							    TRUE,
+							    (u16)addr >> 3, 0,
+							    &data_h, &data_l);
+			#else
+			odm_write_1byte(dm, R_0x0106, 0x69);
+			odm_set_bb_reg(dm, R_0x0140, MASKDWORD, addr >> 3);
+			data_l = odm_get_bb_reg(dm, R_0x0144, MASKDWORD);
+			data_h = odm_get_bb_reg(dm, R_0x0148, MASKDWORD);
+			odm_write_1byte(dm, R_0x0106, 0x0);
 			#endif
-		#endif
-
-			i = i + 2;
 
-			if ((addr + 8) >= end_addr)
-				addr = adc_smp_buf->start_pos;
+			} else {
+				if (page != (addr >> 12)) {
+				/* Reg140=0x780+(addr>>12),
+				 * addr=0x30~0x3F, total 16 pages
+				 */
+					page = addr >> 12;
+				}
+				odm_set_bb_reg(dm, R_0x0140, MASKLWORD, 0x780 +
+					       page);
+
+				/*pDataL = 0x8000+(addr&0xfff);*/
+				data_l = odm_get_bb_reg(dm, 0x8000 + (addr &
+							0xfff),	MASKDWORD);
+				data_h = odm_get_bb_reg(dm, 0x8000 + (addr &
+							0xfff) + 4, MASKDWORD);
+			}
+			#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_CE))
+			buf->octet[i] = data_h;
+			buf->octet[i + 1] = data_l;
+			#endif
+			if (smp->is_la_print) {
+				#if DBG /*WIN driver check build*/
+				pr_debug("%08x%08x\n", data_h, data_l);
+				#else	/*WIN driver free build*/
+				#if (DM_ODM_SUPPORT_TYPE & ODM_WIN)
+				RT_TRACE_EX(COMP_LA_MODE, DBG_LOUD,
+					    ("%08x%08x\n", buf->octet[i],
+					    buf->octet[i + 1]));
+				#elif (DM_ODM_SUPPORT_TYPE & ODM_IOT)
+				pr_debug("%08x%08x\n", data_h, data_l);
+				#endif
+				#endif
+			}
+			if ((addr + 8) > buf->end_pos)
+				addr = buf->start_pos;
 			else
 				addr = addr + 8;
-
-			smp_cnt++;
-			if (smp_cnt >= (smp_number - 1))
-				break;
 		}
-		dbg_print("smp_cnt = ((%d))\n", smp_cnt);
-		
+		pr_debug("smp_cnt = ((%d))\n", smp_cnt);
+
 		#if (DM_ODM_SUPPORT_TYPE & ODM_WIN)
-		RT_TRACE_EX(COMP_LA_MODE, DBG_LOUD, ("smp_cnt = ((%d))\n", smp_cnt));
+		RT_TRACE_EX(COMP_LA_MODE, DBG_LOUD,
+			    ("smp_cnt = ((%d))\n", smp_cnt));
 		#endif
 	}
-
 	#if (DM_ODM_SUPPORT_TYPE & ODM_AP)
 	#if (RTL8197F_SUPPORT)
-	if (p_dm->support_ic_type & ODM_RTL8197F)
-		odm_set_mac_reg(p_dm, 0x300, 0x7fff, backup_dma);	/*Resume DMA*/
+	if (dm->support_ic_type & ODM_RTL8197F)
+		odm_set_mac_reg(dm, R_0x300, 0x7fff, backup_dma);/*Resume DMA*/
 	#endif
 	#endif
 }
 
-void
-phydm_la_mode_set_mac_iq_dump(
-	void		*p_dm_void
-)
+void phydm_la_mode_set_mac_iq_dump(void *dm_void, boolean en_fake_trig)
 {
-	struct PHY_DM_STRUCT		*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	struct _RT_ADCSMP		*adc_smp = &(p_dm->adcsmp);
-	u32			reg_value;
-
-	odm_write_1byte(p_dm, 0x7c0, 0);		/*clear all 0x7c0*/
-	odm_set_mac_reg(p_dm, 0x7c0, BIT(0), 1);  /*Enable LA mode HW block*/
-
-	if (adc_smp->la_trig_mode == PHYDM_MAC_TRIG) {
-
-		adc_smp->is_bb_trigger = 0;
-		odm_set_mac_reg(p_dm, 0x7c0, BIT(2), 1); /*polling bit for MAC mode*/
-		odm_set_mac_reg(p_dm, 0x7c0, BIT(4) | BIT(3), adc_smp->la_trigger_edge); /*trigger mode for MAC*/
-
-		dbg_print("[MAC_trig] ref_mask = ((0x%x)), ref_value = ((0x%x)), dbg_port = ((0x%x))\n", adc_smp->la_mac_mask_or_hdr_sel, adc_smp->la_trig_sig_sel, adc_smp->la_dbg_port);
-		/*[Set MAC Debug Port]*/
-		odm_set_mac_reg(p_dm, 0xF4, BIT(16), 1);
-		odm_set_mac_reg(p_dm, 0x38, 0xff0000, adc_smp->la_dbg_port);
-		odm_set_mac_reg(p_dm, 0x7c4, MASKDWORD, adc_smp->la_mac_mask_or_hdr_sel);
-		odm_set_mac_reg(p_dm, 0x7c8, MASKDWORD, adc_smp->la_trig_sig_sel);
-
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct rt_adcsmp *smp = &dm->adcsmp;
+	u32 reg_value = 0;
+	u32 reg1 = 0, reg2 = 0, reg3 = 0;
+
+	if (dm->support_ic_type & ODM_RTL8192F) {
+		reg1 = R_0x7f0;
+		reg2 = R_0x7f4;
+		reg3 = R_0x7f8;
 	} else {
+		reg1 = R_0x7c0;
+		reg2 = R_0x7c4;
+		reg3 = R_0x7c8;
+	}
 
-		adc_smp->is_bb_trigger = 1;
-		odm_set_mac_reg(p_dm, 0x7c0, BIT(1), 1); /*polling bit for BB ADC mode*/
-
-		if (adc_smp->la_trig_mode == PHYDM_ADC_MAC_TRIG) {
-
-			odm_set_mac_reg(p_dm, 0x7c0, BIT(3), 1); /*polling bit for MAC trigger event*/
-			odm_set_mac_reg(p_dm, 0x7c0, BIT(7) | BIT(6), adc_smp->la_trig_sig_sel);
+	odm_write_1byte(dm, reg1, 0); /*@clear all reg1*/
+	/*@Enable LA mode HW block*/
+	odm_set_mac_reg(dm, reg1, BIT(0), 1);
+
+	if (smp->la_trig_mode == PHYDM_MAC_TRIG) {
+		smp->is_bb_trigger = 0;
+		/*polling bit for MAC mode*/
+		odm_set_mac_reg(dm, reg1, BIT(2), 1);
+		/*trigger mode for MAC*/
+		odm_set_mac_reg(dm, reg1, BIT(4) | BIT(3),
+				smp->la_trigger_edge);
+		pr_debug("[MAC_trig] ref_mask = ((0x%x)), ref_value = ((0x%x)), dbg_port = ((0x%x))\n",
+			 smp->la_mac_mask_or_hdr_sel, smp->la_trig_sig_sel,
+			 smp->la_dbg_port);
+		/*@[Set MAC Debug Port]*/
+		odm_set_mac_reg(dm, R_0xf4, BIT(16), 1);
+		odm_set_mac_reg(dm, R_0x38, 0xff0000, smp->la_dbg_port);
+		odm_set_mac_reg(dm, reg2, MASKDWORD,
+				smp->la_mac_mask_or_hdr_sel);
+		odm_set_mac_reg(dm, reg3, MASKDWORD, smp->la_trig_sig_sel);
 
-			if (adc_smp->la_trig_sig_sel == ADCSMP_TRIG_REG)
-				odm_set_mac_reg(p_dm, 0x7c0, BIT(5), 1); /* manual trigger 0x7C0[5] = 0->1*/
+	} else {
+		smp->is_bb_trigger = 1;
+
+		if (smp->la_trig_mode == PHYDM_ADC_MAC_TRIG) {
+			/*polling bit for MAC trigger event*/
+			if (!en_fake_trig)
+				odm_set_mac_reg(dm, reg1, BIT(3), 1);
+
+			odm_set_mac_reg(dm, reg1, BIT(7) | BIT(6),
+					smp->la_trig_sig_sel);
+			if (smp->la_trig_sig_sel == ADCSMP_TRIG_REG)
+				/* @manual trigger reg1[5] = 0->1*/
+				odm_set_mac_reg(dm, reg1, BIT(5), 1);
 		}
+		/*polling bit for BB ADC mode*/
+		odm_set_mac_reg(dm, reg1, BIT(1), 1);
 	}
 
-	reg_value = odm_get_bb_reg(p_dm, 0x7c0, 0xff);
-	dbg_print("4. [Set MAC IQ dump] 0x7c0[7:0] = ((0x%x))\n", reg_value);
-#if (DM_ODM_SUPPORT_TYPE & ODM_WIN)
-	RT_TRACE_EX(COMP_LA_MODE, DBG_LOUD, ("4. [Set MAC IQ dump] 0x7c0[7:0] = ((0x%x))\n", reg_value));
-#endif
+	reg_value = odm_get_bb_reg(dm, reg1, 0xff);
+	pr_debug("4. [Set MAC IQ dump] 0x%x[7:0] = ((0x%x))\n", reg1,
+		 reg_value);
 
+	#if (DM_ODM_SUPPORT_TYPE & ODM_WIN)
+	RT_TRACE_EX(COMP_LA_MODE, DBG_LOUD,
+		    ("4. [Set MAC IQ dump] 0x%x[7:0] = ((0x%x))\n", reg1,
+		    reg_value));
+	#endif
 }
 
-void
-phydm_adc_smp_start(
-	void			*p_dm_void
-)
+void phydm_adc_smp_start(void *dm_void)
 {
-	struct PHY_DM_STRUCT				*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	struct _RT_ADCSMP				*adc_smp = &(p_dm->adcsmp);
-	u8					tmp_u1b;
-	u8					while_cnt = 0;
-	u8					polling_ok = false, target_polling_bit;
-
-	phydm_la_mode_bb_setting(p_dm);
-	phydm_la_mode_set_trigger_time(p_dm, adc_smp->la_trigger_time);
-
-	if (p_dm->support_ic_type & ODM_RTL8197F)
-		odm_set_bb_reg(p_dm, 0xd00, BIT(26), 0x1);
-	else {	/*for 8814A and 8822B?*/
-		odm_write_1byte(p_dm, 0x8b4, 0x80);
-		/* odm_set_bb_reg(p_dm, 0x8b4, BIT(7), 1); */
-	}
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct rt_adcsmp *smp = &dm->adcsmp;
+	u8 tmp_u1b = 0;
+	u8 while_cnt = 0;
+	u8 target_polling_bit = 0;
+	boolean polling_ok = false;
+
+	if (smp->en_fake_trig)
+		smp->is_fake_trig = true;
+	else
+		smp->is_fake_trig = false;
+
+	phydm_la_mode_bb_setting(dm, smp->en_fake_trig);
+	phydm_la_mode_set_trigger_time(dm, smp->la_trigger_time);
+
+	if (dm->support_ic_type & (ODM_RTL8197F | ODM_RTL8192F))
+		odm_set_bb_reg(dm, R_0xd00, BIT(26), 0x1);
+	else if (dm->support_ic_type & ODM_IC_JGR3_SERIES)
+		odm_set_bb_reg(dm, R_0x1eb4, BIT(23), 0x1);
+	else
+		odm_write_1byte(dm, R_0x8b4, 0x80);
+#if 0
+		/* odm_set_bb_reg(dm, R_0x8b4, BIT(7), 1); */
+#endif
 
-	phydm_la_mode_set_mac_iq_dump(p_dm);
+	phydm_la_mode_set_mac_iq_dump(dm, smp->en_fake_trig);
 
 	#if (DM_ODM_SUPPORT_TYPE & ODM_AP)
-	watchdog_stop(p_dm->priv);
+	watchdog_stop(dm->priv);
 	#endif
 
-	target_polling_bit = (adc_smp->is_bb_trigger) ? BIT(1) : BIT(2);
-	do { /*Polling time always use 100ms, when it exceed 2s, break while loop*/
-		tmp_u1b = odm_read_1byte(p_dm, 0x7c0);
+	if (smp->en_fake_trig) {
+		ODM_delay_ms(100);
+		smp->is_fake_trig = false;
+		phydm_la_mode_bb_setting(dm, smp->en_fake_trig);
+
+		if (smp->la_trig_mode == PHYDM_ADC_MAC_TRIG) {
+			if (dm->support_ic_type & ODM_RTL8192F)
+				odm_set_mac_reg(dm, R_0x7f0, BIT(3), 1);
+			else
+				odm_set_mac_reg(dm, R_0x7c0, BIT(3), 1);
+		}
+	}
+#if RTL8198F_SUPPORT
+	phydm_la_pre_run(dm);
+#endif
+
+	target_polling_bit = (smp->is_bb_trigger) ? BIT(1) : BIT(2);
+	do { /*Polling time always use 100ms, when it exceed 2s, break loop*/
+		if (dm->support_ic_type & ODM_RTL8192F) {
+			tmp_u1b = odm_read_1byte(dm, R_0x7f0);
+			pr_debug("[%d], 0x7F0[7:0] = ((0x%x))\n", while_cnt,
+				 tmp_u1b);
+		} else {
+			tmp_u1b = odm_read_1byte(dm, R_0x7c0);
+			pr_debug("[%d], 0x7C0[7:0] = ((0x%x))\n", while_cnt,
+				 tmp_u1b);
+		}
 
-		if (adc_smp->adc_smp_state != ADCSMP_STATE_SET) {
-			dbg_print("[state Error] adc_smp_state != ADCSMP_STATE_SET\n");
+		if (smp->adc_smp_state != ADCSMP_STATE_SET) {
+			pr_debug("[state Error] adc_smp_state != ADCSMP_STATE_SET\n");
 			break;
 
 		} else if (tmp_u1b & target_polling_bit) {
@@ -283,485 +397,895 @@ phydm_adc_smp_start(
 			while_cnt = while_cnt + 1;
 			continue;
 		} else {
-			dbg_print("[LA Query OK] polling_bit=((0x%x))\n", target_polling_bit);
+			pr_debug("[LA Query OK] polling_bit=((0x%x))\n",
+				 target_polling_bit);
 			polling_ok = true;
 			break;
 		}
 	} while (while_cnt < 20);
 
-	if (adc_smp->adc_smp_state == ADCSMP_STATE_SET) {
-
+	if (smp->adc_smp_state == ADCSMP_STATE_SET) {
 		if (polling_ok)
-			phydm_la_get_tx_pkt_buf(p_dm);
+			phydm_la_get_tx_pkt_buf(dm);
 		else
-			dbg_print("[Polling timeout]\n");
+			pr_debug("[Polling timeout]\n");
 	}
 
 	#if (DM_ODM_SUPPORT_TYPE & ODM_AP)
-	watchdog_resume(p_dm->priv);
+	watchdog_resume(dm->priv);
 	#endif
 
-#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_CE))
-	if (adc_smp->adc_smp_state == ADCSMP_STATE_SET)
-		adc_smp->adc_smp_state = ADCSMP_STATE_QUERY;
-#endif
+	#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_CE))
+	if (smp->adc_smp_state == ADCSMP_STATE_SET)
+		smp->adc_smp_state = ADCSMP_STATE_QUERY;
+	#endif
 
-	dbg_print("[LA mode] LA_pattern_count = ((%d))\n", adc_smp->la_count);
-#if (DM_ODM_SUPPORT_TYPE & ODM_WIN)
-	RT_TRACE_EX(COMP_LA_MODE, DBG_LOUD, ("[LA mode] la_count = ((%d))\n", adc_smp->la_count));
-#endif
+	pr_debug("[LA mode] LA_pattern_count = ((%d))\n", smp->la_count);
+	#if (DM_ODM_SUPPORT_TYPE & ODM_WIN)
+	RT_TRACE_EX(COMP_LA_MODE, DBG_LOUD,
+		    ("[LA mode] la_count = ((%d))\n", smp->la_count));
+	#endif
 
+	adc_smp_stop(dm);
 
-	adc_smp_stop(p_dm);
+	if (smp->la_count == 0) {
+		pr_debug("LA Dump finished ---------->\n\n\n");
+		phydm_release_bb_dbg_port(dm);
 
-	if (adc_smp->la_count == 0) {
-		dbg_print("LA Dump finished ---------->\n\n\n");
-		phydm_release_bb_dbg_port(p_dm);
-		
-		if ((p_dm->support_ic_type & ODM_RTL8821C) && (p_dm->cut_version >= ODM_CUT_B))
-			odm_set_bb_reg(p_dm, 0x95c, BIT(23), 0);
+		if ((dm->support_ic_type & ODM_RTL8821C) &&
+		    dm->cut_version >= ODM_CUT_B)
+			odm_set_bb_reg(dm, R_0x95c, BIT(23), 0);
+		else if (dm->support_ic_type & ODM_RTL8195B)
+			odm_set_bb_reg(dm, R_0x95c, BIT(23), 0);
 
 	} else {
-		adc_smp->la_count--;
-		dbg_print("LA Dump more ---------->\n\n\n");
-		adc_smp_set(p_dm, adc_smp->la_trig_mode, adc_smp->la_trig_sig_sel, adc_smp->la_dma_type, adc_smp->la_trigger_time, 0);
+		smp->la_count--;
+		pr_debug("LA Dump more ---------->\n\n\n");
+		adc_smp_set(dm, smp->la_trig_mode, smp->la_trig_sig_sel,
+			    smp->la_dma_type, smp->la_trigger_time, 0);
 	}
-
 }
 
 #if (DM_ODM_SUPPORT_TYPE & ODM_WIN)
-void
-adc_smp_work_item_callback(
-	void	*p_context
-)
+void adc_smp_work_item_callback(void *context)
 {
-	struct _ADAPTER			*adapter = (struct _ADAPTER *)p_context;
-	PHAL_DATA_TYPE		p_hal_data = GET_HAL_DATA(adapter);
-	struct PHY_DM_STRUCT		*p_dm = &p_hal_data->DM_OutSrc;
-	struct _RT_ADCSMP		*adc_smp = &(p_dm->adcsmp);
+	void *adapter = (void *)context;
+	PHAL_DATA_TYPE hal_data = GET_HAL_DATA(((PADAPTER)adapter));
+	struct dm_struct *dm = &hal_data->DM_OutSrc;
+	struct rt_adcsmp *smp = &dm->adcsmp;
 
-	dbg_print("[WorkItem Call back] LA_State=((%d))\n", adc_smp->adc_smp_state);
-	phydm_adc_smp_start(p_dm);
+	pr_debug("[WorkItem Call back] LA_State=((%d))\n", smp->adc_smp_state);
+	phydm_adc_smp_start(dm);
 }
 #endif
 
-void
-adc_smp_set(
-	void	*p_dm_void,
-	u8	trig_mode,
-	u32	trig_sig_sel,
-	u8	dma_data_sig_sel,
-	u32	trigger_time,
-	u16	polling_time
-)
+void adc_smp_set(void *dm_void, u8 trig_mode, u32 trig_sig_sel,
+		 u8 dma_data_sig_sel, u32 trig_time, u16 polling_time)
 {
-	struct PHY_DM_STRUCT			*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	boolean				is_set_success = true;
-	struct _RT_ADCSMP			*adc_smp = &(p_dm->adcsmp);
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	boolean is_set_success = true;
+	struct rt_adcsmp *smp = &dm->adcsmp;
 
-	adc_smp->la_trig_mode = trig_mode;
-	adc_smp->la_trig_sig_sel = trig_sig_sel;
-	adc_smp->la_dma_type = dma_data_sig_sel;
-	adc_smp->la_trigger_time = trigger_time;
+	smp->la_trig_mode = trig_mode;
+	smp->la_trig_sig_sel = trig_sig_sel;
+	smp->la_dma_type = dma_data_sig_sel;
+	smp->la_trigger_time = trig_time;
 
-#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_CE))
-	if (adc_smp->adc_smp_state != ADCSMP_STATE_IDLE)
+	#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_CE | ODM_AP))
+	if (smp->adc_smp_state != ADCSMP_STATE_IDLE)
 		is_set_success = false;
-	else if (adc_smp->adc_smp_buf.length == 0)
-		is_set_success = phydm_la_buffer_allocate(p_dm);
-#endif
+	else if (smp->adc_smp_buf.length == 0)
+		is_set_success = phydm_la_buffer_allocate(dm);
+	#endif
 
 	if (is_set_success) {
-		adc_smp->adc_smp_state = ADCSMP_STATE_SET;
+		smp->adc_smp_state = ADCSMP_STATE_SET;
 
-		dbg_print("[LA Set Success] LA_State=((%d))\n", adc_smp->adc_smp_state);
+		pr_debug("[LA Set Success] LA_State=((%d))\n",
+			 smp->adc_smp_state);
 
-#if (DM_ODM_SUPPORT_TYPE & ODM_WIN)
+		#if (DM_ODM_SUPPORT_TYPE & ODM_WIN)
 
-		dbg_print("ADCSmp_work_item_index = ((%d))\n", adc_smp->la_work_item_index);
-		if (adc_smp->la_work_item_index != 0) {
-			odm_schedule_work_item(&(adc_smp->adc_smp_work_item_1));
-			adc_smp->la_work_item_index = 0;
+		pr_debug("ADCSmp_work_item_index = ((%d))\n",
+			 smp->la_work_item_index);
+		if (smp->la_work_item_index != 0) {
+			odm_schedule_work_item(&smp->adc_smp_work_item_1);
+			smp->la_work_item_index = 0;
 		} else {
-			odm_schedule_work_item(&(adc_smp->adc_smp_work_item));
-			adc_smp->la_work_item_index = 1;
+			odm_schedule_work_item(&smp->adc_smp_work_item);
+			smp->la_work_item_index = 1;
 		}
-#else
-		phydm_adc_smp_start(p_dm);
-#endif
-	} else
-		dbg_print("[LA Set Fail] LA_State=((%d))\n", adc_smp->adc_smp_state);
-
-
+		#else
+		phydm_adc_smp_start(dm);
+		#endif
+	} else {
+		pr_debug("[LA Set Fail] LA_State=((%d))\n", smp->adc_smp_state);
+	}
 }
 
 #if (DM_ODM_SUPPORT_TYPE & ODM_WIN)
 enum rt_status
-adc_smp_query(
-	void				*p_dm_void,
-	ULONG				information_buffer_length,
-	void				*information_buffer,
-	PULONG				bytes_written
-)
+adc_smp_query(void *dm_void, ULONG info_buf_length, void *info_buf,
+	      PULONG bytes_written)
 {
-	struct PHY_DM_STRUCT			*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	struct _RT_ADCSMP			*adc_smp = &(p_dm->adcsmp);
-	enum rt_status			ret_status = RT_STATUS_SUCCESS;
-	struct _RT_ADCSMP_STRING	*adc_smp_buf = &(adc_smp->adc_smp_buf);
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct rt_adcsmp *smp = &dm->adcsmp;
+	enum rt_status ret_status = RT_STATUS_SUCCESS;
+	struct rt_adcsmp_string *buf = &smp->adc_smp_buf;
 
-	dbg_print("[%s] LA_State=((%d))", __func__, adc_smp->adc_smp_state);
+	pr_debug("[%s] LA_State=((%d))", __func__, smp->adc_smp_state);
 
-	if (information_buffer_length != adc_smp_buf->buffer_size)	{
+	if (info_buf_length != buf->buffer_size) {
 		*bytes_written = 0;
 		ret_status = RT_STATUS_RESOURCE;
-	} else if (adc_smp_buf->length != adc_smp_buf->buffer_size) {
+	} else if (buf->length != buf->buffer_size) {
 		*bytes_written = 0;
 		ret_status = RT_STATUS_RESOURCE;
-	} else if (adc_smp->adc_smp_state != ADCSMP_STATE_QUERY) {
+	} else if (smp->adc_smp_state != ADCSMP_STATE_QUERY) {
 		*bytes_written = 0;
 		ret_status = RT_STATUS_PENDING;
 	} else {
-		odm_move_memory(p_dm, information_buffer, adc_smp_buf->octet, adc_smp_buf->buffer_size);
-		*bytes_written = adc_smp_buf->buffer_size;
+		odm_move_memory(dm, info_buf, buf->octet, buf->buffer_size);
+		*bytes_written = buf->buffer_size;
 
-		adc_smp->adc_smp_state = ADCSMP_STATE_IDLE;
+		smp->adc_smp_state = ADCSMP_STATE_IDLE;
 	}
 
-	dbg_print("Return status %d\n", ret_status);
+	pr_debug("Return status %d\n", ret_status);
 
 	return ret_status;
 }
 #elif (DM_ODM_SUPPORT_TYPE & ODM_CE)
 
-void
-adc_smp_query(
-	void		*p_dm_void,
-	void		*output,
-	u32		out_len,
-	u32		*pused
-)
+void adc_smp_query(void *dm_void, void *output, u32 out_len, u32 *pused)
 {
-	struct PHY_DM_STRUCT			*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	struct _RT_ADCSMP			*adc_smp = &(p_dm->adcsmp);
-	struct _RT_ADCSMP_STRING	*adc_smp_buf = &(adc_smp->adc_smp_buf);
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct rt_adcsmp *smp = &dm->adcsmp;
+	struct rt_adcsmp_string *buf = &smp->adc_smp_buf;
 	u32 used = *pused;
-	u32 i;
+	u32 i = 0;
+#if 0
 	/* struct timespec t; */
 	/* rtw_get_current_timespec(&t); */
+#endif
 
-	dbg_print("%s adc_smp_state %d", __func__, adc_smp->adc_smp_state);
+	pr_debug("%s adc_smp_state %d", __func__, smp->adc_smp_state);
 
-	for (i = 0; i < (adc_smp_buf->length >> 2) - 2; i += 2) {
-		PHYDM_SNPRINTF((output + used, out_len - used,
-			"%08x%08x\n", adc_smp_buf->octet[i], adc_smp_buf->octet[i + 1]));
+	for (i = 0; i < (buf->length >> 2) - 2; i += 2) {
+		PDM_SNPF(out_len, used, output + used, out_len - used,
+			 "%08x%08x\n", buf->octet[i], buf->octet[i + 1]);
 	}
 
-	PHYDM_SNPRINTF((output + used, out_len - used, "\n"));
-	/* PHYDM_SNPRINTF((output+used, out_len-used, "\n[%lu.%06lu]\n", t.tv_sec, t.tv_nsec)); */
+	PDM_SNPF(out_len, used, output + used, out_len - used, "\n");
+	/* PDM_SNPF(output + used, out_len - used, "\n[%lu.%06lu]\n", */
+	/*	    t.tv_sec, t.tv_nsec); */
 	*pused = used;
 }
 
-s32
-adc_smp_get_sample_counts(
-	void		*p_dm_void
-)
+s32 adc_smp_get_sample_counts(void *dm_void)
 {
-	struct PHY_DM_STRUCT		*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	struct _RT_ADCSMP		*adc_smp = &(p_dm->adcsmp);
-	struct _RT_ADCSMP_STRING	*adc_smp_buf = &(adc_smp->adc_smp_buf);
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct rt_adcsmp *smp = &dm->adcsmp;
+	struct rt_adcsmp_string *buf = &smp->adc_smp_buf;
 
-	return (adc_smp_buf->length >> 2) - 2;
+	return (buf->length >> 2) - 2;
 }
 
-s32
-adc_smp_query_single_data(
-	void		*p_dm_void,
-	void		*output,
-	u32		out_len,
-	u32		index
-)
+s32 adc_smp_query_single_data(void *dm_void, void *output, u32 out_len, u32 idx)
 {
-	struct PHY_DM_STRUCT		*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	struct _RT_ADCSMP		*adc_smp = &(p_dm->adcsmp);
-	struct _RT_ADCSMP_STRING	*adc_smp_buf = &(adc_smp->adc_smp_buf);
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct rt_adcsmp *smp = &dm->adcsmp;
+	struct rt_adcsmp_string *buf = &smp->adc_smp_buf;
 	u32 used = 0;
 
-	/* dbg_print("%s adc_smp_state %d\n", __func__, adc_smp->adc_smp_state); */
-	if (adc_smp->adc_smp_state != ADCSMP_STATE_QUERY) {
-		PHYDM_SNPRINTF((output + used, out_len - used,
-				"Error: la data is not ready yet ...\n"));
+	/* @dbg_print("%s adc_smp_state %d\n", __func__,*/
+	/*	      smp->adc_smp_state);*/
+	if (smp->adc_smp_state != ADCSMP_STATE_QUERY) {
+		PDM_SNPF(out_len, used, output + used, out_len - used,
+			 "Error: la data is not ready yet ...\n");
 		return -1;
 	}
 
-	if (index < ((adc_smp_buf->length >> 2) - 2)) {
-		PHYDM_SNPRINTF((output + used, out_len - used, "%08x%08x\n",
-			adc_smp_buf->octet[index], adc_smp_buf->octet[index + 1]));
+	if (idx < ((buf->length >> 2) - 2)) {
+		PDM_SNPF(out_len, used, output + used, out_len - used,
+			 "%08x%08x\n", buf->octet[idx], buf->octet[idx + 1]);
 	}
 	return 0;
 }
 
 #endif
 
-void
-adc_smp_stop(
-	void			*p_dm_void
-)
+void adc_smp_stop(void *dm_void)
 {
-	struct PHY_DM_STRUCT			*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	struct _RT_ADCSMP			*adc_smp = &(p_dm->adcsmp);
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct rt_adcsmp *smp = &dm->adcsmp;
+
+	smp->adc_smp_state = ADCSMP_STATE_IDLE;
 
-	adc_smp->adc_smp_state = ADCSMP_STATE_IDLE;
-	dbg_print("[LA_Stop] LA_state = ((%d))\n", adc_smp->adc_smp_state);
+	PHYDM_DBG(dm, DBG_TMP, "[LA_Stop] LA_state = %d\n", smp->adc_smp_state);
 }
 
-void
-adc_smp_init(
-	void			*p_dm_void
-)
+void adc_smp_init(void *dm_void)
 {
-	struct PHY_DM_STRUCT			*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	struct _RT_ADCSMP			*adc_smp = &(p_dm->adcsmp);
-	struct _RT_ADCSMP_STRING	*adc_smp_buf = &(adc_smp->adc_smp_buf);
-
-	adc_smp->adc_smp_state = ADCSMP_STATE_IDLE;
-
-	if (p_dm->support_ic_type & ODM_RTL8814A) {
-		adc_smp_buf->start_pos = 0x30000;
-		adc_smp_buf->buffer_size = 0x10000;
-	} else if (p_dm->support_ic_type & ODM_RTL8822B) {
-		adc_smp_buf->start_pos = 0x20000;
-		adc_smp_buf->buffer_size = 0x20000;
-	} else if (p_dm->support_ic_type & ODM_RTL8197F) {
-		adc_smp_buf->start_pos = 0x00000;
-		adc_smp_buf->buffer_size = 0x10000;
-	} else if (p_dm->support_ic_type & ODM_RTL8821C) {
-		adc_smp_buf->start_pos = 0x8000;
-		adc_smp_buf->buffer_size = 0x8000;
-	}
-
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct rt_adcsmp *smp = &dm->adcsmp;
+	struct rt_adcsmp_string *buf = &smp->adc_smp_buf;
+
+	smp->adc_smp_state = ADCSMP_STATE_IDLE;
+	smp->is_la_print = true;
+	smp->is_fake_trig = false;
+	smp->en_fake_trig = false;
+	phydm_la_set_buff_mode(dm, ADCSMP_BUFF_HALF);
+
+	#ifdef PHYDM_IC_JGR3_SERIES_SUPPORT
+	phydm_la_bb_adv_reset_jgr3(dm);
+	#endif
 }
 
 #if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_CE))
-void
-adc_smp_de_init(
-	void			*p_dm_void
-)
+void adc_smp_de_init(void *dm_void)
 {
-	struct PHY_DM_STRUCT			*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	struct _RT_ADCSMP			*adc_smp = &(p_dm->adcsmp);
-	struct _RT_ADCSMP_STRING	*adc_smp_buf = &(adc_smp->adc_smp_buf);
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct rt_adcsmp *smp = &dm->adcsmp;
+	struct rt_adcsmp_string *buf = &smp->adc_smp_buf;
 
-	adc_smp_stop(p_dm);
+	adc_smp_stop(dm);
 
-	if (adc_smp_buf->length != 0x0) {
-		odm_free_memory(p_dm, adc_smp_buf->octet, adc_smp_buf->length);
-		adc_smp_buf->length = 0x0;
+	if (buf->length != 0x0) {
+		odm_free_memory(dm, buf->octet, buf->length);
+		buf->length = 0x0;
 	}
 }
 
 #endif
 
+#ifdef PHYDM_IC_JGR3_SERIES_SUPPORT
 
-void
-phydm_la_mode_bb_setting(
-	void		*p_dm_void
-)
+void phydm_la_bb_adv_reset_jgr3(void *dm_void)
 {
-	struct PHY_DM_STRUCT		*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	struct _RT_ADCSMP		*adc_smp = &(p_dm->adcsmp);
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct rt_adcsmp *smp = &dm->adcsmp;
+
+	smp->la_en_new_bbtrigger = false;
+
+	smp->la_ori_bb_dis = false;
+	smp->la_and1_sel = 0;
+	smp->la_and1_val = 0;
+	smp->la_and2_sel = 0;
+	smp->la_and2_val = 0;
+	smp->la_and3_sel = 0;
+	smp->la_and3_val = 0;
+	smp->la_and4_en = 0;
+	smp->la_and4_val = 0;
+}
 
-	u8	trig_mode = adc_smp->la_trig_mode;
-	u32	trig_sig_sel = adc_smp->la_trig_sig_sel;
-	u32	dbg_port = adc_smp->la_dbg_port;
-	u8	is_trigger_edge = adc_smp->la_trigger_edge;
-	u8	sampling_rate = adc_smp->la_smp_rate;
-	u8	la_dma_type = adc_smp->la_dma_type;
-	u32	dbg_port_header_sel = 0;
+void phydm_la_bb_adv_cmd_jgr3(void *dm_void, char input[][16], u32 *_used,
+			      char *output, u32 *_out_len)
+{
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct rt_adcsmp *smp = &dm->adcsmp;
+	u32 var1[10] = {0};
+	u32 used = *_used;
+	u32 out_len = *_out_len;
+	u32 enable;
+
+	if (!(dm->support_ic_type & ODM_IC_JGR3_SERIES))
+		return;
+
+	PHYDM_SSCANF(input[3], DCMD_DECIMAL, &var1[0]);
+
+	enable = var1[0];
+
+	if (enable == 1) {
+		smp->la_en_new_bbtrigger = true;
+
+		PHYDM_SSCANF(input[4], DCMD_DECIMAL, &var1[1]);
+		PHYDM_SSCANF(input[5], DCMD_DECIMAL, &var1[2]);
+		PHYDM_SSCANF(input[6], DCMD_HEX, &var1[3]);
+		PHYDM_SSCANF(input[7], DCMD_DECIMAL, &var1[4]);
+		PHYDM_SSCANF(input[8], DCMD_HEX, &var1[5]);
+		PHYDM_SSCANF(input[9], DCMD_DECIMAL, &var1[6]);
+		PHYDM_SSCANF(input[10], DCMD_HEX, &var1[7]);
+		PHYDM_SSCANF(input[11], DCMD_HEX, &var1[8]);
+		PHYDM_SSCANF(input[12], DCMD_HEX, &var1[9]);
+
+		smp->la_ori_bb_dis = (boolean)var1[1];
+		smp->la_and1_sel = (u8)var1[2];
+		smp->la_and1_val = (u8)var1[3];
+		smp->la_and2_sel = (u8)var1[4];
+		smp->la_and2_val = (u8)var1[5];
+		smp->la_and3_sel = (u8)var1[6];
+		smp->la_and3_val = (u8)var1[7];
+		smp->la_and4_en = (u32)var1[8];
+		smp->la_and4_val = (u32)var1[9];
+	} else {
+		phydm_la_bb_adv_reset_jgr3(dm);
+	}
 
-	dbg_print("1. [BB Setting] trig_mode = ((%d)), dbg_port = ((0x%x)), Trig_Edge = ((%d)), smp_rate = ((%d)), Trig_Sel = ((0x%x)), Dma_type = ((%d))\n",
-		trig_mode, dbg_port, is_trigger_edge, sampling_rate, trig_sig_sel, la_dma_type);
+	PDM_SNPF(out_len, used, output + used, out_len - used,
+		 "{en %d} {C0_dis %d} {C1_sel %d} {C1_val %d} {C2_sel %d} {C2_val %d}\n{C3_sel %d} {C3_val %d} {C4_en %d}{C4_val %d}\n",
+		 enable, smp->la_ori_bb_dis, smp->la_and1_sel, smp->la_and1_val,
+		 smp->la_and2_sel, smp->la_and2_val,
+		 smp->la_and3_sel, smp->la_and3_val,
+		 smp->la_and4_en, smp->la_and4_val);
+}
 
-#if (DM_ODM_SUPPORT_TYPE & ODM_WIN)
-	RT_TRACE_EX(COMP_LA_MODE, DBG_LOUD, ("1. [LA mode bb_setting]trig_mode = ((%d)), dbg_port = ((0x%x)), Trig_Edge = ((%d)), smp_rate = ((%d)), Trig_Sel = ((0x%x)), Dma_type = ((%d))\n",
-		trig_mode, dbg_port, is_trigger_edge, sampling_rate, trig_sig_sel, la_dma_type));
 #endif
 
+void phydm_la_mode_bb_setting(void *dm_void, boolean en_fake_trig)
+{
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct rt_adcsmp *smp = &dm->adcsmp;
+
+	u8	trig_mode = smp->la_trig_mode;
+	u32	trig_sel = smp->la_trig_sig_sel;
+	u32	dbg_port = smp->la_dbg_port;
+	u8	edge = smp->la_trigger_edge;
+	u8	smp_rate = smp->la_smp_rate;
+	u8	dma_type = smp->la_dma_type;
+	u8	is_fake_trig = smp->is_fake_trig;
+	u32	dbg_port_hdr_sel = 0;
+	#ifdef PHYDM_IC_JGR3_SERIES_SUPPORT
+	boolean en_new_bbtrigger = smp->la_en_new_bbtrigger;
+	boolean ori_bb_dis = smp->la_ori_bb_dis;
+	u8	and1_sel = smp->la_and1_sel;
+	u8	and1_val = smp->la_and1_val;
+	u8	and2_sel = smp->la_and2_sel;
+	u8	and2_val = smp->la_and2_val;
+	u8	and3_sel = smp->la_and3_sel;
+	u8	and3_val = smp->la_and3_val;
+	u32	and4_en = smp->la_and4_en;
+	u32	and4_val = smp->la_and4_val;
+	#endif
+
+	#if (DM_ODM_SUPPORT_TYPE & ODM_WIN)
+	RT_TRACE_EX(COMP_LA_MODE, DBG_LOUD,
+		    ("1. [LA mode bb_setting]trig_mode = ((%d)), dbg_port = ((0x%x)), Trig_Edge = ((%d)), smp_rate = ((%d)), Trig_Sel = ((0x%x)), Dma_type = ((%d))\n",
+		    trig_mode, dbg_port, edge, smp_rate, trig_sel, dma_type));
+	#endif
+
 	if (trig_mode == PHYDM_MAC_TRIG)
-		trig_sig_sel = 0; /*ignore this setting*/
+		trig_sel = 0; /*@ignore this setting*/
 
 	/*set BB debug port*/
-	if (phydm_set_bb_dbg_port(p_dm, BB_DBGPORT_PRIORITY_3, dbg_port)) {
-		dbg_print("Set dbg_port((0x%x)) success\n", dbg_port);
+	if (is_fake_trig) {
+		if (phydm_set_bb_dbg_port(dm, DBGPORT_PRI_3, 0xf))
+			pr_debug("Set fake dbg_port success\n");
+		/*@BB debug port bit*/
+		if (dm->support_ic_type & ODM_IC_11AC_SERIES) {
+			odm_set_bb_reg(dm, R_0x95c, 0x1f, 0x0);
+		#ifdef PHYDM_IC_JGR3_SERIES_SUPPORT
+		} else if (dm->support_ic_type & ODM_IC_JGR3_SERIES) {
+			if (!(en_new_bbtrigger))
+				odm_set_bb_reg(dm, R_0x1ce4, 0x3e000, 0x0);
+			else if (!(ori_bb_dis))
+				odm_set_bb_reg(dm, R_0x1ce4, 0x3e000, 0x0);
+		#endif
+		} else {
+			odm_set_bb_reg(dm, R_0x9a0, 0x1f, 0x0);
+		}
+
+		pr_debug("0. [BB Setting] fake-trigger!\n");
+	} else {
+		if (en_fake_trig)
+			phydm_release_bb_dbg_port(dm);
+		if (phydm_set_bb_dbg_port(dm, DBGPORT_PRI_3, dbg_port))
+			pr_debug("Set dbg_port((0x%x)) success\n", dbg_port);
+		else
+			pr_debug("Set dbg_port fail!\n");
+		/*@debug port bit*/
+		if (dm->support_ic_type & ODM_IC_11AC_SERIES) {
+			odm_set_bb_reg(dm, R_0x95c, 0x1f, trig_sel);
+		#ifdef PHYDM_IC_JGR3_SERIES_SUPPORT
+		} else if (dm->support_ic_type & ODM_IC_JGR3_SERIES) {
+			if (!(en_new_bbtrigger))
+				odm_set_bb_reg(dm, R_0x1ce4, 0x3e000, trig_sel);
+			else if (!(ori_bb_dis))
+				odm_set_bb_reg(dm, R_0x1ce4, 0x3e000, trig_sel);
+		#endif
+		} else {
+			odm_set_bb_reg(dm, R_0x9a0, 0x1f, trig_sel);
+		}
+		pr_debug("1. [BB Setting] trig_mode = ((%d)), dbg_port = ((0x%x)), Trig_Edge = ((%d)), smp_rate = ((%d)), Trig_Sel = ((0x%x)), Dma_type = ((%d))\n",
+			 trig_mode, dbg_port, edge, smp_rate, trig_sel,
+			 dma_type);
+		if (en_fake_trig)
+			return;
 	}
-	
-	if (p_dm->support_ic_type & ODM_IC_11AC_SERIES) {
 
+	if (dm->support_ic_type & ODM_IC_11AC_SERIES) {
 		if (trig_mode == PHYDM_ADC_RF0_TRIG)
-			dbg_port_header_sel = 9;	/*DBGOUT_RFC_a[31:0]*/
+			dbg_port_hdr_sel = 9; /*@DBGOUT_RFC_a[31:0]*/
 		else if (trig_mode == PHYDM_ADC_RF1_TRIG)
-			dbg_port_header_sel = 8;	/*DBGOUT_RFC_b[31:0]*/
-		else if ((trig_mode == PHYDM_ADC_BB_TRIG) || (trig_mode == PHYDM_ADC_MAC_TRIG)) {
-			
-			if (adc_smp->la_mac_mask_or_hdr_sel <= 0xf) {
-				dbg_port_header_sel = adc_smp->la_mac_mask_or_hdr_sel;
+			dbg_port_hdr_sel = 8; /*@DBGOUT_RFC_b[31:0]*/
+		else if ((trig_mode == PHYDM_ADC_BB_TRIG) ||
+			 (trig_mode == PHYDM_ADC_MAC_TRIG)) {
+			if (smp->la_mac_mask_or_hdr_sel <= 0xf)
+				dbg_port_hdr_sel = smp->la_mac_mask_or_hdr_sel;
+			else
+				dbg_port_hdr_sel = 0;
+		}
+
+		phydm_bb_dbg_port_header_sel(dm, dbg_port_hdr_sel);
+
+		/*@0x95C[11:8]*/
+		odm_set_bb_reg(dm, R_0x95c, 0xf00, dma_type);
+		/*@0: posedge, 1: negedge*/
+		odm_set_bb_reg(dm, R_0x95c, BIT(31), edge);
+		odm_set_bb_reg(dm, R_0x95c, 0xe0, smp_rate);
+		/*	@(0:) '80MHz'
+		 *	(1:) '40MHz'
+		 *	(2:) '20MHz'
+		 *	(3:) '10MHz'
+		 *	(4:) '5MHz'
+		 *	(5:) '2.5MHz'
+		 *	(6:) '1.25MHz'
+		 *	(7:) '160MHz (for BW160 ic)'
+		 */
+		if ((dm->support_ic_type & ODM_RTL8821C) &&
+		    (dm->cut_version >= ODM_CUT_B))
+			odm_set_bb_reg(dm, R_0x95c, BIT(23), 1);
+		else if (dm->support_ic_type & ODM_RTL8195B)
+			odm_set_bb_reg(dm, R_0x95c, BIT(23), 1);
+
+	#ifdef PHYDM_IC_JGR3_SERIES_SUPPORT
+	} else if (dm->support_ic_type & ODM_IC_JGR3_SERIES) {
+		/*@MAC-PHY timing*/
+		odm_set_bb_reg(dm, R_0x1ce4, BIT(7) | BIT(6), 0);
+		odm_set_bb_reg(dm, R_0x1cf4, BIT(23), 1); /*@LA mode on*/
+		odm_set_bb_reg(dm, R_0x1ce4, 0x3f, dma_type);
+		/*@0: posedge, 1: negedge ??*/
+		odm_set_bb_reg(dm, R_0x1ce4, BIT(26), edge);
+		odm_set_bb_reg(dm, R_0x1ce4, 0x700, smp_rate);
+
+		if (!en_new_bbtrigger) { /*normal LA mode & back to default*/
+
+			pr_debug("Set bb default setting\n");
+
+			/*path 1 default: enable ori. BB trigger*/
+			odm_set_bb_reg(dm, R_0x1ce4, BIT(27), 0);
+
+			/*@AND1~AND4 default: off*/
+			odm_set_bb_reg(dm, R_0x1ce4, MASKH4BITS, 0); /*@AND 1*/
+			odm_set_bb_reg(dm, R_0x1ce8, 0x1f, 0); /*@AND 1 val*/
+			odm_set_bb_reg(dm, R_0x1ce8, BIT(5), 0); /*@AND 1 inv*/
+
+			odm_set_bb_reg(dm, R_0x1ce8, 0x3c0, 0); /*@AND 2*/
+			odm_set_bb_reg(dm, R_0x1ce8, 0x7c00, 0); /*@AND 2 val*/
+			/*@AND 2 inv*/
+			odm_set_bb_reg(dm, R_0x1ce8, BIT(15), 0);
+
+			odm_set_bb_reg(dm, R_0x1ce8, 0xf0000, 0); /*@AND 3*/
+			/*@AND 3 val*/
+			odm_set_bb_reg(dm, R_0x1ce8, 0x1f00000, 0);
+			/*@AND 3 inv*/
+			odm_set_bb_reg(dm, R_0x1ce8, BIT(25), 0);
+
+			/*@AND 4 en*/
+			odm_set_bb_reg(dm, R_0x1cf0, MASKDWORD, 0);
+			/*@AND 4 val*/
+			odm_set_bb_reg(dm, R_0x1cec, MASKDWORD, 0);
+			/*@AND 4 inv*/
+			odm_set_bb_reg(dm, R_0x1ce8, BIT(26), 0);
+
+			pr_debug("Set bb default setting finished\n");
+
+		} else if (en_new_bbtrigger) {
+			/*path 1 default: enable ori. BB trigger*/
+			if (ori_bb_dis)
+				odm_set_bb_reg(dm, R_0x1ce4, BIT(27), 1);
+			else
+				odm_set_bb_reg(dm, R_0x1ce4, BIT(27), 0);
+
+			/* @AND1 */
+			odm_set_bb_reg(dm, R_0x1ce8, BIT(5), 0); /*@invert*/
+
+			if (and1_sel == 0x4 || and1_sel == 0x5 ||
+			    and1_sel == 0x6) {
+				/* rx_state, rx_state_freq, field */
+				odm_set_bb_reg(dm, R_0x1ce4, MASKH4BITS,
+					       and1_sel);
+				odm_set_bb_reg(dm, R_0x1ce8, 0x1f, and1_val);
+
+			} else if (and1_sel == 0x7) {
+				/* @mux state */
+				odm_set_bb_reg(dm, R_0x1ce4, MASKH4BITS,
+					       and1_sel);
+				odm_set_bb_reg(dm, R_0x1ce8, 0xf, and1_val);
+
 			} else {
-				dbg_port_header_sel = 0;
+				odm_set_bb_reg(dm, R_0x1ce4, MASKH4BITS,
+					       and1_sel);
 			}
-		}
 
-		phydm_bb_dbg_port_header_sel(p_dm, dbg_port_header_sel);
-
-		odm_set_bb_reg(p_dm, 0x95c, 0xf00, la_dma_type);	/*0x95C[11:8]*/
-		odm_set_bb_reg(p_dm, 0x95C, 0x1f, trig_sig_sel);	/*0x95C[4:0], BB debug port bit*/
-		odm_set_bb_reg(p_dm, 0x95C, BIT(31), is_trigger_edge); /*0: posedge, 1: negedge*/
-		odm_set_bb_reg(p_dm, 0x95c, 0xe0, sampling_rate);
-		/*	(0:) '80MHz'
-			(1:) '40MHz'
-			(2:) '20MHz'
-			(3:) '10MHz'
-			(4:) '5MHz'
-			(5:) '2.5MHz'
-			(6:) '1.25MHz'
-			(7:) '160MHz (for BW160 ic)'
-		*/
-		if ((p_dm->support_ic_type & ODM_RTL8821C) && (p_dm->cut_version >= ODM_CUT_B)) {
-			odm_set_bb_reg(p_dm, 0x95c, BIT(23), 1);
-		}
+			/* @AND2 */
+			odm_set_bb_reg(dm, R_0x1ce8, BIT(15), 0); /*@invert*/
+
+			if (and2_sel == 0x4 || and2_sel == 0x5 ||
+			    and2_sel == 0x6) {
+				/* rx_state, rx_state_freq, field */
+				odm_set_bb_reg(dm, R_0x1ce8, 0x3c0, and2_sel);
+				odm_set_bb_reg(dm, R_0x1ce8, 0x7c00, and2_val);
+
+			} else if (and2_sel == 0x7) {
+				/* @mux state */
+				odm_set_bb_reg(dm, R_0x1ce8, 0x3c0, and2_sel);
+				odm_set_bb_reg(dm, R_0x1ce8, 0x3c00, and2_val);
+
+			} else {
+				odm_set_bb_reg(dm, R_0x1ce8, 0x3c0, and2_sel);
+			}
+
+			/* @AND3 */
+			odm_set_bb_reg(dm, R_0x1ce8, BIT(25), 0); /*@invert*/
+
+			if (and3_sel == 0x4 || and3_sel == 0x5 ||
+			    and3_sel == 0x6) {
+				/* rx_state, rx_state_freq, field */
+				odm_set_bb_reg(dm, R_0x1ce8, 0xf0000, and3_sel);
+				odm_set_bb_reg(dm, R_0x1ce8, 0x1f00000,
+					       and3_val);
+
+			} else if (and3_sel == 0x7) {
+				/* @mux state */
+				odm_set_bb_reg(dm, R_0x1ce8, 0xf0000, and3_sel);
+				odm_set_bb_reg(dm, R_0x1ce8, 0xf00000,
+					       and3_val);
+			} else {
+				odm_set_bb_reg(dm, R_0x1ce8, 0xf0000, and3_sel);
+			}
+
+			/* @AND4 */
+			odm_set_bb_reg(dm, R_0x1ce8, BIT(26), 0); /*@invert*/
+			odm_set_bb_reg(dm, R_0x1cf0, MASKDWORD, and4_en);
+			odm_set_bb_reg(dm, R_0x1cec, MASKDWORD, and4_val);
+			}
+	#endif
 	} else {
+		#if (RTL8192F_SUPPORT)
+		if ((dm->support_ic_type & ODM_RTL8192F))
+			/*@LA reset HW block enable for true-mac asic*/
+			odm_set_bb_reg(dm, R_0x9a0, BIT(15), 1);
+		#endif
+		/*@0x9A0[11:8]*/
+		odm_set_bb_reg(dm, R_0x9a0, 0xf00, dma_type);
+		/*@0: posedge, 1: negedge*/
+		odm_set_bb_reg(dm, R_0x9a0, BIT(31), edge);
+		odm_set_bb_reg(dm, R_0x9a0, 0xe0, smp_rate);
+		/*	@(0:) '80MHz'
+		 *	(1:) '40MHz'
+		 *	(2:) '20MHz'
+		 *	(3:) '10MHz'
+		 *	(4:) '5MHz'
+		 *	(5:) '2.5MHz'
+		 *	(6:) '1.25MHz'
+		 *	(7:) '160MHz (for BW160 ic)'
+		 */
+	}
+}
 
-		odm_set_bb_reg(p_dm, 0x9a0, 0xf00, la_dma_type);	/*0x9A0[11:8]*/
-		odm_set_bb_reg(p_dm, 0x9a0, 0x1f, trig_sig_sel);	/*0x9A0[4:0], BB debug port bit*/
-		odm_set_bb_reg(p_dm, 0x9A0, BIT(31), is_trigger_edge); /*0: posedge, 1: negedge*/
-		odm_set_bb_reg(p_dm, 0x9A0, 0xe0, sampling_rate);
-		/*	(0:) '80MHz'
-			(1:) '40MHz'
-			(2:) '20MHz'
-			(3:) '10MHz'
-			(4:) '5MHz'
-			(5:) '2.5MHz'
-			(6:) '1.25MHz'
-			(7:) '160MHz (for BW160 ic)'
-		*/
+void phydm_la_mode_set_trigger_time(void *dm_void, u32 trigger_time_mu_sec)
+{
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	u8 time_unit_num = 0;
+	u32 unit = 0;
+
+	if (trigger_time_mu_sec < 128)
+		unit = 0; /*unit: 1mu sec*/
+	else if (trigger_time_mu_sec < 256)
+		unit = 1; /*unit: 2mu sec*/
+	else if (trigger_time_mu_sec < 512)
+		unit = 2; /*unit: 4mu sec*/
+	else if (trigger_time_mu_sec < 1024)
+		unit = 3; /*unit: 8mu sec*/
+	else if (trigger_time_mu_sec < 2048)
+		unit = 4; /*unit: 16mu sec*/
+	else if (trigger_time_mu_sec < 4096)
+		unit = 5; /*unit: 32mu sec*/
+	else if (trigger_time_mu_sec < 8192)
+		unit = 6; /*unit: 64mu sec*/
+
+	time_unit_num = (u8)(trigger_time_mu_sec >> unit);
+
+	pr_debug("2. [Set Trigger Time] Trig_Time = ((%d)) * unit = ((2^%d us))\n",
+		 time_unit_num, unit);
+	#if (DM_ODM_SUPPORT_TYPE & ODM_WIN)
+	RT_TRACE_EX(COMP_LA_MODE, DBG_LOUD, (
+		    "3. [Set Trigger Time] Trig_Time = ((%d)) * unit = ((2^%d us))\n",
+		    time_unit_num, unit));
+	#endif
+
+	if (dm->support_ic_type & ODM_RTL8192F) {
+		odm_set_mac_reg(dm, R_0x7fc, BIT(2) | BIT(1) | BIT(0), unit);
+		odm_set_mac_reg(dm, R_0x7f0, 0x7f00, (time_unit_num & 0x7f));
+	#ifdef PHYDM_IC_JGR3_SERIES_SUPPORT
+	} else if (dm->support_ic_type & ODM_IC_JGR3_SERIES) {
+		odm_set_mac_reg(dm, R_0x7cc, BIT(18) | BIT(17) | BIT(16), unit);
+		odm_set_mac_reg(dm, R_0x7c0, 0x7f00, (time_unit_num & 0x7f));
+	#endif
+	} else {
+		odm_set_mac_reg(dm, R_0x7cc, BIT(20) | BIT(19) | BIT(18), unit);
+		odm_set_mac_reg(dm, R_0x7c0, 0x7f00, (time_unit_num & 0x7f));
 	}
 }
 
-void
-phydm_la_mode_set_trigger_time(
-	void		*p_dm_void,
-	u32		trigger_time_mu_sec
-)
+void phydm_la_set_buff_mode(void *dm_void, enum la_buff_mode mode)
 {
-	struct PHY_DM_STRUCT		*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	u8			trigger_time_unit_num;
-	u32			time_unit = 0;
-
-	if (trigger_time_mu_sec < 128) {
-		time_unit = 0; /*unit: 1mu sec*/
-	} else if (trigger_time_mu_sec < 256) {
-		time_unit = 1; /*unit: 2mu sec*/
-	} else if (trigger_time_mu_sec < 512) {
-		time_unit = 2; /*unit: 4mu sec*/
-	} else if (trigger_time_mu_sec < 1024) {
-		time_unit = 3; /*unit: 8mu sec*/
-	} else if (trigger_time_mu_sec < 2048) {
-		time_unit = 4; /*unit: 16mu sec*/
-	} else if (trigger_time_mu_sec < 4096) {
-		time_unit = 5; /*unit: 32mu sec*/
-	} else if (trigger_time_mu_sec < 8192) {
-		time_unit = 6; /*unit: 64mu sec*/
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct rt_adcsmp *smp = &dm->adcsmp;
+	struct rt_adcsmp_string *buf = &smp->adc_smp_buf;
+#if (DM_ODM_SUPPORT_TYPE == ODM_AP)
+	struct rtl8192cd_priv		*priv = dm->priv;
+#endif
+	u32 buff_size_base = 0;
+	u32 end_pos_tmp = 0;
+#if (DM_ODM_SUPPORT_TYPE == ODM_AP)
+	u8 normal_LA_on = priv->pmib->miscEntry.normal_LA_on;
+#endif
+	smp->la_buff_mode = mode;
+#if 0
+	if (dm->support_ic_type & ODM_RTL8814A)
+		buf->start_pos = 0x30000;
+	else if (dm->support_ic_type &
+		 (ODM_RTL8822B | ODM_RTL8822C | ODM_RTL8812F))
+		buf->start_pos = 0x20000;
+	else if (dm->support_ic_type & ODM_RTL8814B)
+		buf->start_pos = 0x30000;
+	else if (dm->support_ic_type & (ODM_RTL8197F | ODM_RTL8198F))
+		buf->start_pos = 0x00000;
+	else if (dm->support_ic_type & ODM_RTL8192F)
+		buf->start_pos = 0x2000;
+	else if (dm->support_ic_type & ODM_RTL8821C)
+		buf->start_pos = 0x8000;
+	else if (dm->support_ic_type & ODM_RTL8195B)
+		buf->start_pos = 0x4000;
+#endif
+	switch (dm->support_ic_type) {
+	case ODM_RTL8814A:
+		buff_size_base = 0x10000;
+		end_pos_tmp = 0x40000;
+		break;
+	case ODM_RTL8822B:
+	case ODM_RTL8822C:
+	case ODM_RTL8812F:
+		buff_size_base = 0x20000;
+		end_pos_tmp = 0x40000;
+		break;
+	case ODM_RTL8814B:
+		buff_size_base = 0x30000;
+		end_pos_tmp = 0x60000;
+		break;
+	case ODM_RTL8197F:
+	case ODM_RTL8198F:
+#if (DM_ODM_SUPPORT_TYPE == ODM_AP)
+		buff_size_base = 0x10000;
+		end_pos_tmp = (normal_LA_on == 1) ? 0x20000 : 0x10000;
+		break;
+#endif
+	case ODM_RTL8192F:
+		buff_size_base = 0xE000;
+		end_pos_tmp = 0x10000;
+		break;
+	case ODM_RTL8821C:
+		buff_size_base = 0x8000;
+		end_pos_tmp = 0x10000;
+		break;
+	case ODM_RTL8195B:
+		buff_size_base = 0x4000;
+		end_pos_tmp = 0x8000;
+		break;
+	default:
+		pr_debug("[%s] Warning!", __func__);
+		break;
 	}
 
-	trigger_time_unit_num = (u8)(trigger_time_mu_sec >> time_unit);
+	buf->buffer_size = buff_size_base;
 
-	dbg_print("2. [Set Trigger Time] Trig_Time = ((%d)) * unit = ((2^%d us))\n", trigger_time_unit_num, time_unit);
-#if (DM_ODM_SUPPORT_TYPE & ODM_WIN)
-	RT_TRACE_EX(COMP_LA_MODE, DBG_LOUD, ("3. [Set Trigger Time] Trig_Time = ((%d)) * unit = ((2^%d us))\n", trigger_time_unit_num, time_unit));
-#endif
+	if (dm->support_ic_type & FULL_BUFF_MODE_SUPPORT) {
+		if (mode == ADCSMP_BUFF_HALF) {
+			odm_set_mac_reg(dm, R_0x7cc, BIT(30), 0);
+		} else {
+			buf->buffer_size = buf->buffer_size << 1;
+			odm_set_mac_reg(dm, R_0x7cc, BIT(30), 1);
+		}
+	}
 
-	odm_set_mac_reg(p_dm, 0x7cc, BIT(20) | BIT(19) | BIT(18), time_unit);
-	odm_set_mac_reg(p_dm, 0x7c0, 0x7f00, (trigger_time_unit_num & 0x7f));
+	buf->end_pos = end_pos_tmp;
+	buf->start_pos = end_pos_tmp - buf->buffer_size;
 
+	PHYDM_DBG(dm, DBG_TMP,
+		  "start_addr = ((0x%x)), end_addr = ((0x%x)), buffer_size = ((0x%x))\n",
+		  buf->start_pos, buf->end_pos, buf->buffer_size);
 }
 
-
-void
-phydm_lamode_trigger_setting(
-	void		*p_dm_void,
-	char		input[][16],
-	u32		*_used,
-	char		*output,
-	u32		*_out_len,
-	u32		input_num
-)
+void phydm_lamode_trigger_cmd(void *dm_void, char input[][16], u32 *_used,
+			      char *output, u32 *_out_len)
 {
-	struct PHY_DM_STRUCT	*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	struct _RT_ADCSMP	*adc_smp = &(p_dm->adcsmp);
-	u8		trig_mode, dma_data_sig_sel;
-	u32		trig_sig_sel;
-	boolean		is_enable_la_mode;
-	u32		trigger_time_mu_sec;
-	char 		help[] = "-h";
-	u32			var1[10] = {0};
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct rt_adcsmp *smp = &dm->adcsmp;
+	u8 trig_mode = 0, dma_data_sig_sel = 0;
+	u32 trig_sig_sel = 0;
+	u8 enable_la_mode = 0;
+	u32 trigger_time_mu_sec = 0;
+	char help[] = "-h";
+	u32 var1[10] = {0};
 	u32 used = *_used;
 	u32 out_len = *_out_len;
 
-	if (p_dm->support_ic_type & PHYDM_IC_SUPPORT_LA_MODE) {
+	if (!(dm->support_ic_type & PHYDM_IC_SUPPORT_LA_MODE))
+		return;
 
-		PHYDM_SSCANF(input[1], DCMD_DECIMAL, &var1[0]);
-		is_enable_la_mode = (boolean)var1[0];
-		/*dbg_print("echo cmd input_num = %d\n", input_num);*/
+	PHYDM_SSCANF(input[1], DCMD_DECIMAL, &var1[0]);
+	enable_la_mode = (u8)var1[0];
 
-		if ((strcmp(input[1], help) == 0)) {
-			PHYDM_SNPRINTF((output + used, out_len - used, "{En} {0:BB,1:BB_MAC,2:RF0,3:RF1,4:MAC} \n {BB:dbg_port[bit],BB_MAC:0-ok/1-fail/2-cca,MAC:ref} {DMA type} {TrigTime} \n {DbgPort_head/ref_mask} {dbg_port} {0:P_Edge, 1:N_Edge} {SpRate:0-80M,1-40M,2-20M} {Capture num}\n"));
-			/**/
-		} else if ((is_enable_la_mode == 1)) {
+	/*@dbg_print("echo cmd input_num = %d\n", input_num);*/
 
-			PHYDM_SSCANF(input[2], DCMD_DECIMAL, &var1[1]);
-
-			trig_mode = (u8)var1[1];
-
-			if (trig_mode == PHYDM_MAC_TRIG)
-				PHYDM_SSCANF(input[3], DCMD_HEX, &var1[2]);
-			else
-				PHYDM_SSCANF(input[3], DCMD_DECIMAL, &var1[2]);
-			trig_sig_sel = var1[2];
+	if ((strcmp(input[1], help) == 0)) {
+		PDM_SNPF(out_len, used, output + used, out_len - used,
+			 "{En} {0:BB,1:BB_MAC,2:RF0,3:RF1,4:MAC}\n{BB:dbg_port[bit],BB_MAC:0-ok/1-fail/2-cca,MAC:ref} {DMA type} {TrigTime}\n{DbgPort_head/ref_mask} {dbg_port} {0:P_Edge, 1:N_Edge} {SpRate:0-80M,1-40M,2-20M} {Capture num}\n");
+		PDM_SNPF(out_len, used, output + used, out_len - used,
+			 "set {1:tx_buff_size} {0: half, 1:all}\n");
+		#ifdef PHYDM_IC_JGR3_SERIES_SUPPORT
+		PDM_SNPF(out_len, used, output + used, out_len - used,
+			 "set {2:adv_bb_trig(JGR3)} {en} {C0_dis} {C1_sel} {C1_val} {C2_sel} {C2_val}\n{C3_sel} {C3_val} {C4_en} {C4_val}\n");
+		#endif
+		PDM_SNPF(out_len, used, output + used, out_len - used,
+			 "set {3:fake_trigger} {0: dis, 1:en}\n");
+		PDM_SNPF(out_len, used, output + used, out_len - used,
+			 "set {4:is_la_print} {0: dis, 1:en}\n");
+	} else if ((strcmp(input[1], "set") == 0)) {
+		PHYDM_SSCANF(input[2], DCMD_DECIMAL, &var1[1]);
+
+		if (var1[1] == 1) {
+			PHYDM_SSCANF(input[3], DCMD_DECIMAL, &var1[2]);
+			phydm_la_set_buff_mode(dm, (enum la_buff_mode)var1[2]);
+			PDM_SNPF(out_len, used, output + used, out_len - used,
+				 "buff_mode = (%d/2)\n", smp->la_buff_mode + 1);
+		} else if (var1[1] == 2) {
+			#ifdef PHYDM_IC_JGR3_SERIES_SUPPORT
+			phydm_la_bb_adv_cmd_jgr3(dm, input,
+						 &used, output, &out_len);
+			#else
+			PDM_SNPF(out_len, used, output + used, out_len - used,
+				 "Not Support\n");
+			#endif
+		} else if (var1[1] == 3) {
+			PHYDM_SSCANF(input[3], DCMD_DECIMAL, &var1[2]);
+			if (var1[2] == 1) {
+				smp->en_fake_trig = true;
+				PDM_SNPF(out_len, used, output + used,
+					 out_len - used,
+					 "Enable fake-trigger\n");
+			} else {
+				smp->en_fake_trig = false;
+				PDM_SNPF(out_len, used, output + used,
+					 out_len - used,
+					 "Disable fake-trigger\n");
+			}
+		} else if (var1[1] == 4) {
+			PHYDM_SSCANF(input[3], DCMD_DECIMAL, &var1[2]);
+			smp->is_la_print = (boolean)var1[2];
+			PDM_SNPF(out_len, used, output + used, out_len - used,
+				 "is_la_print = %d\n", smp->is_la_print);
+		}
+	} else if (enable_la_mode == 1) {
+		PHYDM_SSCANF(input[2], DCMD_DECIMAL, &var1[1]);
 
-			PHYDM_SSCANF(input[4], DCMD_DECIMAL, &var1[3]);
-			PHYDM_SSCANF(input[5], DCMD_DECIMAL, &var1[4]);
-			PHYDM_SSCANF(input[6], DCMD_HEX, &var1[5]);
-			PHYDM_SSCANF(input[7], DCMD_HEX, &var1[6]);
-			PHYDM_SSCANF(input[8], DCMD_DECIMAL, &var1[7]);
-			PHYDM_SSCANF(input[9], DCMD_DECIMAL, &var1[8]);
-			PHYDM_SSCANF(input[10], DCMD_DECIMAL, &var1[9]);
+		trig_mode = (u8)var1[1];
 
-			dma_data_sig_sel = (u8)var1[3];
-			trigger_time_mu_sec = var1[4]; /*unit: us*/
+		if (trig_mode == PHYDM_MAC_TRIG)
+			PHYDM_SSCANF(input[3], DCMD_HEX, &var1[2]);
+		else
+			PHYDM_SSCANF(input[3], DCMD_DECIMAL, &var1[2]);
+		trig_sig_sel = var1[2];
+
+		PHYDM_SSCANF(input[4], DCMD_DECIMAL, &var1[3]);
+		PHYDM_SSCANF(input[5], DCMD_DECIMAL, &var1[4]);
+		PHYDM_SSCANF(input[6], DCMD_HEX, &var1[5]);
+		PHYDM_SSCANF(input[7], DCMD_HEX, &var1[6]);
+		PHYDM_SSCANF(input[8], DCMD_DECIMAL, &var1[7]);
+		PHYDM_SSCANF(input[9], DCMD_DECIMAL, &var1[8]);
+		PHYDM_SSCANF(input[10], DCMD_DECIMAL, &var1[9]);
+
+		dma_data_sig_sel = (u8)var1[3];
+		trigger_time_mu_sec = var1[4]; /*unit: us*/
+
+		smp->la_mac_mask_or_hdr_sel = var1[5];
+		smp->la_dbg_port = var1[6];
+		smp->la_trigger_edge = (u8)var1[7];
+		smp->la_smp_rate = (u8)(var1[8] & 0x7);
+		smp->la_count = var1[9];
+
+		pr_debug("echo lamode %d %d %d %d %d %d %x %d %d %d\n",
+			 var1[0], var1[1], var1[2], var1[3], var1[4],
+			 var1[5], var1[6], var1[7], var1[8], var1[9]);
+		#if (DM_ODM_SUPPORT_TYPE & ODM_WIN)
+		RT_TRACE_EX(COMP_LA_MODE, DBG_LOUD,
+			    ("echo lamode %d %d %d %d %d %d %x %d %d %d\n",
+			    var1[0], var1[1], var1[2], var1[3],
+			    var1[4], var1[5], var1[6], var1[7],
+			    var1[8], var1[9]));
+		#endif
 
-			adc_smp->la_mac_mask_or_hdr_sel = var1[5];
-			adc_smp->la_dbg_port = var1[6];
-			adc_smp->la_trigger_edge = (u8) var1[7];
-			adc_smp->la_smp_rate = (u8)(var1[8] & 0x7);
-			adc_smp->la_count = var1[9];
+		PDM_SNPF(out_len, used, output + used, out_len - used,
+			 "a.En= ((1)),  b.mode = ((%d)), c.Trig_Sel = ((0x%x)), d.Dma_type = ((%d))\n",
+			 trig_mode, trig_sig_sel, dma_data_sig_sel);
+		PDM_SNPF(out_len, used, output + used, out_len - used,
+			 "e.Trig_Time = ((%dus)), f.Dbg_head/mac_ref_mask = ((0x%x)), g.dbg_port = ((0x%x))\n",
+			 trigger_time_mu_sec,
+			 smp->la_mac_mask_or_hdr_sel, smp->la_dbg_port);
+		PDM_SNPF(out_len, used, output + used, out_len - used,
+			 "h.Trig_edge = ((%d)), i.smp rate = ((%d MHz)), j.Cap_num = ((%d))\n",
+			 smp->la_trigger_edge, (80 >> smp->la_smp_rate),
+			 smp->la_count);
+
+		#ifdef PHYDM_IC_JGR3_SERIES_SUPPORT
+		PDM_SNPF(out_len, used, output + used, out_len - used,
+			 "k.en_new_bbtrigger = ((%d))\n",
+			 smp->la_en_new_bbtrigger);
+		#endif
 
+		adc_smp_set(dm, trig_mode, trig_sig_sel,
+			    dma_data_sig_sel, trigger_time_mu_sec, 0);
+	} else {
+		adc_smp_stop(dm);
+		PDM_SNPF(out_len, used, output + used, out_len - used,
+			 "Disable LA mode\n");
+	}
 
-			dbg_print("echo lamode %d %d %d %d %d %d %x %d %d %d\n", var1[0], var1[1], var1[2], var1[3], var1[4], var1[5], var1[6], var1[7], var1[8], var1[9]);
-#if (DM_ODM_SUPPORT_TYPE & ODM_WIN)
-			RT_TRACE_EX(COMP_LA_MODE, DBG_LOUD, ("echo lamode %d %d %d %d %d %d %x %d %d %d\n", var1[0], var1[1], var1[2], var1[3], var1[4], var1[5], var1[6], var1[7], var1[8], var1[9]));
-#endif
+	*_used = used;
+	*_out_len = out_len;
+}
 
-			PHYDM_SNPRINTF((output + used, out_len - used, "a.En= ((1)),  b.mode = ((%d)), c.Trig_Sel = ((0x%x)), d.Dma_type = ((%d))\n", trig_mode, trig_sig_sel, dma_data_sig_sel));
-			PHYDM_SNPRINTF((output + used, out_len - used, "e.Trig_Time = ((%dus)), f.Dbg_head/mac_ref_mask = ((0x%x)), g.dbg_port = ((0x%x))\n", trigger_time_mu_sec, adc_smp->la_mac_mask_or_hdr_sel, adc_smp->la_dbg_port));
-			PHYDM_SNPRINTF((output + used, out_len - used, "h.Trig_edge = ((%d)), i.smp rate = ((%d MHz)), j.Cap_num = ((%d))\n", adc_smp->la_trigger_edge, (80 >> adc_smp->la_smp_rate), adc_smp->la_count));
+void phydm_la_pre_run(void *dm_void)
+{
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct rt_adcsmp *smp = &dm->adcsmp;
+	struct rt_adcsmp_string *buf = &smp->adc_smp_buf;
+	u8 while_cnt = 0;
+	u8 tmp = 0;
+	u8 target_polling_bit = BIT(1);
+
+	if (dm->support_ic_type & ODM_RTL8198F) {
+		/*pre run */
+		/*force to bb trigger*/
+		odm_set_mac_reg(dm, R_0x7c0, BIT(3), 0);
+		/*dma_trig_and(AND1) output 1*/
+		odm_set_bb_reg(dm, R_0x1ce4, 0xf0000000, 0x0);
+		/*r_dma_trigger_AND1_inv = 1*/
+		odm_set_bb_reg(dm, R_0x1ce8, BIT5, 1); /*@AND 1 val*/
+
+		target_polling_bit = BIT(1);
+		/* polling bit for BB ADC mode */
+		odm_set_mac_reg(dm, 0x7c0, BIT(1), 1);
+
+		pr_debug("buf_start(0x%x)buf_end(0x%x)\n",
+			 buf->start_pos, buf->end_pos);
+
+		do {
+			tmp = odm_read_1byte(dm, R_0x7c0);
+			if ((tmp & target_polling_bit) == false) {
+				pr_debug("LA pre-run fail.\n");
+				adc_smp_stop(dm);
+				phydm_release_bb_dbg_port(dm);
+			} else {
+				ODM_delay_ms(100);
+				pr_debug("LA pre-run while_cnt = %d.\n",
+					 while_cnt);
+				while_cnt = while_cnt + 1;
+			}
+		} while (while_cnt < 3);
 
-			adc_smp_set(p_dm, trig_mode, trig_sig_sel, dma_data_sig_sel, trigger_time_mu_sec, 0);
+		/*r_dma_trigger_AND1_inv = 0*/
+		odm_set_bb_reg(dm, R_0x1ce8, BIT5, 0); /*@AND 1 val*/
 
-		} else {
-			adc_smp_stop(p_dm);
-			PHYDM_SNPRINTF((output + used, out_len - used, "Disable LA mode\n"));
+		if (smp->la_trig_mode == PHYDM_ADC_MAC_TRIG) {
+			if (dm->support_ic_type & ODM_RTL8192F)
+				odm_set_mac_reg(dm, R_0x7f0, BIT(3), 1);
+			else
+				odm_set_mac_reg(dm, R_0x7c0, BIT(3), 1);
 		}
 	}
-	*_used = used;
-	*_out_len = out_len;
 }
 
-#endif	/*endif PHYDM_LA_MODE_SUPPORT == 1*/
+#endif /*@endif PHYDM_LA_MODE_SUPPORT*/
diff --git a/rtl8723DS/hal/phydm/phydm_adc_sampling.h b/rtl8723DS/hal/phydm/phydm_adc_sampling.h
index 06f66fd..ef55201 100755..100644
--- a/rtl8723DS/hal/phydm/phydm_adc_sampling.h
+++ b/rtl8723DS/hal/phydm/phydm_adc_sampling.h
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2007 - 2017 Realtek Corporation.
+ * Copyright(c) 2007 - 2017  Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -8,26 +8,39 @@
  *
  * This program is distributed in the hope that it will be useful, but WITHOUT
  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  * more details.
  *
+ * The full GNU General Public License is included in this distribution in the
+ * file called LICENSE.
+ *
+ * Contact Information:
+ * wlanfae <wlanfae@realtek.com>
+ * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
+ * Hsinchu 300, Taiwan.
+ *
+ * Larry Finger <Larry.Finger@lwfinger.net>
+ *
  *****************************************************************************/
 
 #ifndef __INC_ADCSMP_H
 #define __INC_ADCSMP_H
 
-#define DYNAMIC_LA_MODE	"2.0"  /*2017.02.06  Dino */
+#if (PHYDM_LA_MODE_SUPPORT)
+
+#define DYNAMIC_LA_MODE "3.0"
 
-#if (PHYDM_LA_MODE_SUPPORT == 1)
+#define FULL_BUFF_MODE_SUPPORT (ODM_RTL8821C | ODM_RTL8195B | ODM_RTL8822C |\
+				ODM_RTL8812F | ODM_RTL8814B)
 
-struct _RT_ADCSMP_STRING {
+struct rt_adcsmp_string {
 	u32		*octet;
 	u32		length;
 	u32		buffer_size;
 	u32		start_pos;
+	u32		end_pos;	/*@buf addr*/
 };
 
-
 enum rt_adcsmp_trig_sel {
 	PHYDM_ADC_BB_TRIG	= 0,
 	PHYDM_ADC_MAC_TRIG	= 1,
@@ -36,7 +49,6 @@ enum rt_adcsmp_trig_sel {
 	PHYDM_MAC_TRIG		= 4
 };
 
-
 enum rt_adcsmp_trig_sig_sel {
 	ADCSMP_TRIG_CRCOK	= 0,
 	ADCSMP_TRIG_CRCFAIL	= 1,
@@ -44,28 +56,49 @@ enum rt_adcsmp_trig_sig_sel {
 	ADCSMP_TRIG_REG		= 3
 };
 
-
 enum rt_adcsmp_state {
-	ADCSMP_STATE_IDLE		= 0,
-	ADCSMP_STATE_SET		= 1,
-	ADCSMP_STATE_QUERY	=	2
+	ADCSMP_STATE_IDLE	= 0,
+	ADCSMP_STATE_SET	= 1,
+	ADCSMP_STATE_QUERY	= 2
 };
 
+enum la_buff_mode {
+	ADCSMP_BUFF_HALF	= 0,
+	ADCSMP_BUFF_ALL		= 1	/*Only use in MP Driver*/
+};
 
-struct _RT_ADCSMP {
-	struct _RT_ADCSMP_STRING		adc_smp_buf;
-	enum rt_adcsmp_state		adc_smp_state;
-	u8					la_trig_mode;
-	u32					la_trig_sig_sel;
-	u8					la_dma_type;
-	u32					la_trigger_time;
-	u32					la_mac_mask_or_hdr_sel; /*1.BB mode: for debug port header sel; 2.MAC mode: for reference mask*/
-	u32					la_dbg_port;
-	u8					la_trigger_edge;
-	u8					la_smp_rate;
-	u32					la_count;
-	u8					is_bb_trigger;
-	u8					la_work_item_index;
+struct rt_adcsmp {
+	struct rt_adcsmp_string	adc_smp_buf;
+	enum rt_adcsmp_state	adc_smp_state;
+	enum la_buff_mode	la_buff_mode;
+	u8			la_trig_mode;
+	u32			la_trig_sig_sel;
+	u8			la_dma_type;
+	u32			la_trigger_time;
+	/*
+	 * @1.BB mode: for debug port header sel;
+	 * 2.MAC mode: for reference mask
+	 */
+	u32			la_mac_mask_or_hdr_sel;
+	u32			la_dbg_port;
+	u8			la_trigger_edge;
+	u8			la_smp_rate;
+	u32			la_count;
+	u8			is_bb_trigger;
+	u8			la_work_item_index;
+	boolean			la_en_new_bbtrigger;
+	boolean			la_ori_bb_dis;
+	u8			la_and1_sel;
+	u8			la_and1_val;
+	u8			la_and2_sel;
+	u8			la_and2_val;
+	u8			la_and3_sel;
+	u8			la_and3_val;
+	u32			la_and4_en;
+	u32			la_and4_val;
+	boolean			is_fake_trig;
+	boolean			is_la_print;
+	boolean			en_fake_trig;
 
 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
 	RT_WORK_ITEM	adc_smp_work_item;
@@ -74,89 +107,45 @@ struct _RT_ADCSMP {
 };
 
 #if (DM_ODM_SUPPORT_TYPE & ODM_WIN)
-void
-adc_smp_work_item_callback(
-	void	*p_context
-);
+void adc_smp_work_item_callback(
+	void *context);
 #endif
 
-void
-adc_smp_set(
-	void	*p_dm_void,
-	u8	trig_mode,
-	u32	trig_sig_sel,
-	u8	dma_data_sig_sel,
-	u32	trigger_time,
-	u16	polling_time
-);
+void adc_smp_set(void *dm_void, u8 trig_mode, u32 trig_sig_sel,
+		 u8 dma_data_sig_sel, u32 trig_time, u16 polling_time);
 
 #if (DM_ODM_SUPPORT_TYPE & ODM_WIN)
 enum rt_status
-adc_smp_query(
-	void	*p_dm_void,
-	ULONG	information_buffer_length,
-	void	*information_buffer,
-	PULONG	bytes_written
-);
+adc_smp_query(void *dm_void, ULONG info_buf_length, void *info_buf,
+	      PULONG bytes_written);
 #elif (DM_ODM_SUPPORT_TYPE & ODM_CE)
-void
-adc_smp_query(
-	void		*p_dm_void,
-	void		*output,
-	u32		out_len,
-	u32		*pused
-);
-
-s32
-adc_smp_get_sample_counts(
-	void		*p_dm_void
-);
-
-s32
-adc_smp_query_single_data(
-	void		*p_dm_void,
-	void		*output,
-	u32		out_len,
-	u32		index
-);
+void adc_smp_query(void *dm_void, void *output, u32 out_len, u32 *pused);
+
+s32 adc_smp_get_sample_counts(void *dm_void);
+
+s32 adc_smp_query_single_data(void *dm_void, void *output, u32 out_len,
+			      u32 idx);
 
 #endif
-void
-adc_smp_stop(
-	void	*p_dm_void
-);
+void adc_smp_stop(void *dm_void);
 
-void
-adc_smp_init(
-	void	*p_dm_void
-);
+void phydm_la_bb_adv_reset_jgr3(void *dm_void);
+
+void adc_smp_init(void *dm_void);
 
 #if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_CE))
-void
-adc_smp_de_init(
-	void			*p_dm_void
-);
+void adc_smp_de_init(void *dm_void);
 #endif
 
-void
-phydm_la_mode_bb_setting(
-	void		*p_dm_void
-);
-
-void
-phydm_la_mode_set_trigger_time(
-	void		*p_dm_void,
-	u32		trigger_time_mu_sec
-);
-
-void
-phydm_lamode_trigger_setting(
-	void		*p_dm_void,
-	char			input[][16],
-	u32		*_used,
-	char			*output,
-	u32		*_out_len,
-	u32		input_num
-);
+void phydm_la_set_buff_mode(void *dm_void, enum la_buff_mode mode);
+
+void phydm_la_mode_bb_setting(void *dm_void, boolean en_fake_trig);
+
+void phydm_la_mode_set_trigger_time(void *dm_void, u32 trigger_time_mu_sec);
+
+void phydm_lamode_trigger_cmd(void *dm_void, char input[][16], u32 *_used,
+			      char *output, u32 *_out_len);
+void phydm_la_pre_run(void *dm_void);
+
 #endif
 #endif
diff --git a/rtl8723DS/hal/phydm/phydm_antdect.c b/rtl8723DS/hal/phydm/phydm_antdect.c
index 1518968..5a44a05 100755..100644
--- a/rtl8723DS/hal/phydm/phydm_antdect.c
+++ b/rtl8723DS/hal/phydm/phydm_antdect.c
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2007 - 2017 Realtek Corporation.
+ * Copyright(c) 2007 - 2017  Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -8,9 +8,19 @@
  *
  * This program is distributed in the hope that it will be useful, but WITHOUT
  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  * more details.
  *
+ * The full GNU General Public License is included in this distribution in the
+ * file called LICENSE.
+ *
+ * Contact Information:
+ * wlanfae <wlanfae@realtek.com>
+ * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
+ * Hsinchu 300, Taiwan.
+ *
+ * Larry Finger <Larry.Finger@lwfinger.net>
+ *
  *****************************************************************************/
 
 /* ************************************************************
@@ -20,47 +30,55 @@
 #include "mp_precomp.h"
 #include "phydm_precomp.h"
 
-/* #if( DM_ODM_SUPPORT_TYPE & (ODM_WIN |ODM_CE)) */
-#if (defined(CONFIG_ANT_DETECTION))
+#ifdef CONFIG_ANT_DETECTION
 
-/* IS_ANT_DETECT_SUPPORT_SINGLE_TONE(adapter)
+/* @IS_ANT_DETECT_SUPPORT_SINGLE_TONE(adapter)
  * IS_ANT_DETECT_SUPPORT_RSSI(adapter)
  * IS_ANT_DETECT_SUPPORT_PSD(adapter) */
 
-/* 1 [1. Single Tone method] =================================================== */
+/* @1 [1. Single Tone method] =================================================== */
 
-/*
+/*@
  * Description:
  *	Set Single/Dual Antenna default setting for products that do not do detection in advance.
  *
  * Added by Joseph, 2012.03.22
  *   */
-void
-odm_single_dual_antenna_default_setting(
-	void		*p_dm_void
-)
+void odm_sw_ant_div_construct_scan_chnl(
+	void *adapter,
+	u8 scan_chnl)
+{
+}
+
+u8 odm_sw_ant_div_select_scan_chnl(
+	void *adapter)
 {
-	struct PHY_DM_STRUCT		*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	struct _sw_antenna_switch_		*p_dm_swat_table = &p_dm->dm_swat_table;
-	struct _ADAPTER	*p_adapter	 =  p_dm->adapter;
+	return 0;
+}
+
+void odm_single_dual_antenna_default_setting(
+	void *dm_void)
+{
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct sw_antenna_switch *dm_swat_table = &dm->dm_swat_table;
+	void *adapter = dm->adapter;
 
-	u8 bt_ant_num = BT_GetPgAntNum(p_adapter);
+	u8 bt_ant_num = BT_GetPgAntNum(adapter);
 	/* Set default antenna A and B status */
 	if (bt_ant_num == 2) {
-		p_dm_swat_table->ANTA_ON = true;
-		p_dm_swat_table->ANTB_ON = true;
+		dm_swat_table->ANTA_ON = true;
+		dm_swat_table->ANTB_ON = true;
 
 	} else if (bt_ant_num == 1) {
 		/* Set antenna A as default */
-		p_dm_swat_table->ANTA_ON = true;
-		p_dm_swat_table->ANTB_ON = false;
+		dm_swat_table->ANTA_ON = true;
+		dm_swat_table->ANTB_ON = false;
 
 	} else
 		RT_ASSERT(false, ("Incorrect antenna number!!\n"));
 }
 
-
-/* 2 8723A ANT DETECT
+/* @2 8723A ANT DETECT
  *
  * Description:
  *	Implement IQK single tone for RF DPK loopback and BB PSD scanning.
@@ -70,113 +88,113 @@ odm_single_dual_antenna_default_setting(
  *   */
 boolean
 odm_single_dual_antenna_detection(
-	void		*p_dm_void,
-	u8			mode
-)
+	void *dm_void,
+	u8 mode)
 {
-	struct PHY_DM_STRUCT		*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	struct _ADAPTER	*p_adapter	 =  p_dm->adapter;
-	struct _sw_antenna_switch_		*p_dm_swat_table = &p_dm->dm_swat_table;
-	u32		current_channel, rf_loop_reg;
-	u8		n;
-	u32		reg88c, regc08, reg874, regc50, reg948, regb2c, reg92c, reg930, reg064, afe_rrx_wait_cca;
-	u8		initial_gain = 0x5a;
-	u32		PSD_report_tmp;
-	u32		ant_a_report = 0x0, ant_b_report = 0x0, ant_0_report = 0x0;
-	boolean		is_result = true;
-
-	PHYDM_DBG(p_dm, DBG_ANT_DIV, ("odm_single_dual_antenna_detection()============>\n"));
-
-
-	if (!(p_dm->support_ic_type & ODM_RTL8723B))
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	void *adapter = dm->adapter;
+	struct sw_antenna_switch *dm_swat_table = &dm->dm_swat_table;
+	u32 current_channel, rf_loop_reg;
+	u8 n;
+	u32 reg88c, regc08, reg874, regc50, reg948, regb2c, reg92c, reg930, reg064, afe_rrx_wait_cca;
+	u8 initial_gain = 0x5a;
+	u32 PSD_report_tmp;
+	u32 ant_a_report = 0x0, ant_b_report = 0x0, ant_0_report = 0x0;
+	boolean is_result = true;
+
+	PHYDM_DBG(dm, DBG_ANT_DIV, "%s============>\n", __func__);
+
+	if (!(dm->support_ic_type & ODM_RTL8723B))
 		return is_result;
 
 	/* Retrieve antenna detection registry info, added by Roger, 2012.11.27. */
-	if (!IS_ANT_DETECT_SUPPORT_SINGLE_TONE(p_adapter))
+	if (!IS_ANT_DETECT_SUPPORT_SINGLE_TONE(((PADAPTER)adapter)))
 		return is_result;
 
-	/* 1 Backup Current RF/BB Settings */
-
-	current_channel = odm_get_rf_reg(p_dm, RF_PATH_A, ODM_CHANNEL, RFREGOFFSETMASK);
-	rf_loop_reg = odm_get_rf_reg(p_dm, RF_PATH_A, 0x00, RFREGOFFSETMASK);
-	if (p_dm->support_ic_type & ODM_RTL8723B) {
-		reg92c = odm_get_bb_reg(p_dm, REG_DPDT_CONTROL, MASKDWORD);
-		reg930 = odm_get_bb_reg(p_dm, rfe_ctrl_anta_src, MASKDWORD);
-		reg948 = odm_get_bb_reg(p_dm, REG_S0_S1_PATH_SWITCH, MASKDWORD);
-		regb2c = odm_get_bb_reg(p_dm, REG_AGC_TABLE_SELECT, MASKDWORD);
-		reg064 = odm_get_mac_reg(p_dm, REG_SYM_WLBT_PAPE_SEL, BIT(29));
-		odm_set_bb_reg(p_dm, REG_DPDT_CONTROL, 0x3, 0x1);
-		odm_set_bb_reg(p_dm, rfe_ctrl_anta_src, 0xff, 0x77);
-		odm_set_mac_reg(p_dm, REG_SYM_WLBT_PAPE_SEL, BIT(29), 0x1);  /* dbg 7 */
-		odm_set_bb_reg(p_dm, REG_S0_S1_PATH_SWITCH, 0x3c0, 0x0);/* dbg 8 */
-		odm_set_bb_reg(p_dm, REG_AGC_TABLE_SELECT, BIT(31), 0x0);
+	/* @1 Backup Current RF/BB Settings */
+
+	current_channel = odm_get_rf_reg(dm, RF_PATH_A, ODM_CHANNEL, RFREGOFFSETMASK);
+	rf_loop_reg = odm_get_rf_reg(dm, RF_PATH_A, RF_0x00, RFREGOFFSETMASK);
+	if (dm->support_ic_type & ODM_RTL8723B) {
+		reg92c = odm_get_bb_reg(dm, REG_DPDT_CONTROL, MASKDWORD);
+		reg930 = odm_get_bb_reg(dm, rfe_ctrl_anta_src, MASKDWORD);
+		reg948 = odm_get_bb_reg(dm, REG_S0_S1_PATH_SWITCH, MASKDWORD);
+		regb2c = odm_get_bb_reg(dm, REG_AGC_TABLE_SELECT, MASKDWORD);
+		reg064 = odm_get_mac_reg(dm, REG_SYM_WLBT_PAPE_SEL, BIT(29));
+		odm_set_bb_reg(dm, REG_DPDT_CONTROL, 0x3, 0x1);
+		odm_set_bb_reg(dm, rfe_ctrl_anta_src, 0xff, 0x77);
+		odm_set_mac_reg(dm, REG_SYM_WLBT_PAPE_SEL, BIT(29), 0x1); /* @dbg 7 */
+		odm_set_bb_reg(dm, REG_S0_S1_PATH_SWITCH, 0x3c0, 0x0); /* @dbg 8 */
+		odm_set_bb_reg(dm, REG_AGC_TABLE_SELECT, BIT(31), 0x0);
 	}
 
 	ODM_delay_us(10);
 
 	/* Store A path Register 88c, c08, 874, c50 */
-	reg88c = odm_get_bb_reg(p_dm, REG_FPGA0_ANALOG_PARAMETER4, MASKDWORD);
-	regc08 = odm_get_bb_reg(p_dm, REG_OFDM_0_TR_MUX_PAR, MASKDWORD);
-	reg874 = odm_get_bb_reg(p_dm, REG_FPGA0_XCD_RF_INTERFACE_SW, MASKDWORD);
-	regc50 = odm_get_bb_reg(p_dm, REG_OFDM_0_XA_AGC_CORE1, MASKDWORD);
+	reg88c = odm_get_bb_reg(dm, REG_FPGA0_ANALOG_PARAMETER4, MASKDWORD);
+	regc08 = odm_get_bb_reg(dm, REG_OFDM_0_TR_MUX_PAR, MASKDWORD);
+	reg874 = odm_get_bb_reg(dm, REG_FPGA0_XCD_RF_INTERFACE_SW, MASKDWORD);
+	regc50 = odm_get_bb_reg(dm, REG_OFDM_0_XA_AGC_CORE1, MASKDWORD);
 
 	/* Store AFE Registers */
-	if (p_dm->support_ic_type & ODM_RTL8723B)
-		afe_rrx_wait_cca = odm_get_bb_reg(p_dm, REG_RX_WAIT_CCA, MASKDWORD);
+	if (dm->support_ic_type & ODM_RTL8723B)
+		afe_rrx_wait_cca = odm_get_bb_reg(dm, REG_RX_WAIT_CCA, MASKDWORD);
 
 	/* Set PSD 128 pts */
-	odm_set_bb_reg(p_dm, REG_FPGA0_PSD_FUNCTION, BIT(14) | BIT15, 0x0); /* 128 pts */
+	odm_set_bb_reg(dm, REG_FPGA0_PSD_FUNCTION, BIT(14) | BIT15, 0x0); /* @128 pts */
 
 	/* To SET CH1 to do */
-	odm_set_rf_reg(p_dm, RF_PATH_A, ODM_CHANNEL, RFREGOFFSETMASK, 0x7401);     /* channel 1 */
+	odm_set_rf_reg(dm, RF_PATH_A, ODM_CHANNEL, RFREGOFFSETMASK, 0x7401); /* @channel 1 */
 
-	/* AFE all on step */
-	if (p_dm->support_ic_type & ODM_RTL8723B)
-		odm_set_bb_reg(p_dm, REG_RX_WAIT_CCA, MASKDWORD, 0x01c00016);
+	/* @AFE all on step */
+	if (dm->support_ic_type & ODM_RTL8723B)
+		odm_set_bb_reg(dm, REG_RX_WAIT_CCA, MASKDWORD, 0x01c00016);
 
-	/* 3 wire Disable */
-	odm_set_bb_reg(p_dm, REG_FPGA0_ANALOG_PARAMETER4, MASKDWORD, 0xCCF000C0);
+	/* @3 wire Disable */
+	odm_set_bb_reg(dm, REG_FPGA0_ANALOG_PARAMETER4, MASKDWORD, 0xCCF000C0);
 
-	/* BB IQK setting */
-	odm_set_bb_reg(p_dm, REG_OFDM_0_TR_MUX_PAR, MASKDWORD, 0x000800E4);
-	odm_set_bb_reg(p_dm, REG_FPGA0_XCD_RF_INTERFACE_SW, MASKDWORD, 0x22208000);
+	/* @BB IQK setting */
+	odm_set_bb_reg(dm, REG_OFDM_0_TR_MUX_PAR, MASKDWORD, 0x000800E4);
+	odm_set_bb_reg(dm, REG_FPGA0_XCD_RF_INTERFACE_SW, MASKDWORD, 0x22208000);
 
-	/* IQK setting tone@ 4.34Mhz */
-	odm_set_bb_reg(p_dm, REG_TX_IQK_TONE_A, MASKDWORD, 0x10008C1C);
-	odm_set_bb_reg(p_dm, REG_TX_IQK, MASKDWORD, 0x01007c00);
+	/* @IQK setting tone@ 4.34Mhz */
+	odm_set_bb_reg(dm, REG_TX_IQK_TONE_A, MASKDWORD, 0x10008C1C);
+	odm_set_bb_reg(dm, REG_TX_IQK, MASKDWORD, 0x01007c00);
 
 	/* Page B init */
-	odm_set_bb_reg(p_dm, REG_CONFIG_ANT_A, MASKDWORD, 0x00080000);
-	odm_set_bb_reg(p_dm, REG_CONFIG_ANT_A, MASKDWORD, 0x0f600000);
-	odm_set_bb_reg(p_dm, REG_RX_IQK, MASKDWORD, 0x01004800);
-	odm_set_bb_reg(p_dm, REG_RX_IQK_TONE_A, MASKDWORD, 0x10008c1f);
-	if (p_dm->support_ic_type & ODM_RTL8723B) {
-		odm_set_bb_reg(p_dm, REG_TX_IQK_PI_A, MASKDWORD, 0x82150016);
-		odm_set_bb_reg(p_dm, REG_RX_IQK_PI_A, MASKDWORD, 0x28150016);
+	odm_set_bb_reg(dm, REG_CONFIG_ANT_A, MASKDWORD, 0x00080000);
+	odm_set_bb_reg(dm, REG_CONFIG_ANT_A, MASKDWORD, 0x0f600000);
+	odm_set_bb_reg(dm, REG_RX_IQK, MASKDWORD, 0x01004800);
+	odm_set_bb_reg(dm, REG_RX_IQK_TONE_A, MASKDWORD, 0x10008c1f);
+	if (dm->support_ic_type & ODM_RTL8723B) {
+		odm_set_bb_reg(dm, REG_TX_IQK_PI_A, MASKDWORD, 0x82150016);
+		odm_set_bb_reg(dm, REG_RX_IQK_PI_A, MASKDWORD, 0x28150016);
 	}
-	odm_set_bb_reg(p_dm, REG_IQK_AGC_RSP, MASKDWORD, 0x001028d0);
-	odm_set_bb_reg(p_dm, REG_OFDM_0_XA_AGC_CORE1, 0x7f, initial_gain);
+	odm_set_bb_reg(dm, REG_IQK_AGC_RSP, MASKDWORD, 0x001028d0);
+	odm_set_bb_reg(dm, REG_OFDM_0_XA_AGC_CORE1, 0x7f, initial_gain);
 
-	/* IQK Single tone start */
-	odm_set_bb_reg(p_dm, REG_FPGA0_IQK, 0xffffff00, 0x808000);
-	odm_set_bb_reg(p_dm, REG_IQK_AGC_PTS, MASKDWORD, 0xf9000000);
-	odm_set_bb_reg(p_dm, REG_IQK_AGC_PTS, MASKDWORD, 0xf8000000);
+	/* @IQK Single tone start */
+	odm_set_bb_reg(dm, REG_FPGA0_IQK, 0xffffff00, 0x808000);
+	odm_set_bb_reg(dm, REG_IQK_AGC_PTS, MASKDWORD, 0xf9000000);
+	odm_set_bb_reg(dm, REG_IQK_AGC_PTS, MASKDWORD, 0xf8000000);
 
 	ODM_delay_us(10000);
 
 	/* PSD report of antenna A */
 	PSD_report_tmp = 0x0;
 	for (n = 0; n < 2; n++) {
-		PSD_report_tmp = phydm_get_psd_data(p_dm, 14, initial_gain);
+		PSD_report_tmp = phydm_get_psd_data(dm, 14, initial_gain);
 		if (PSD_report_tmp > ant_a_report)
 			ant_a_report = PSD_report_tmp;
 	}
 
-	/* change to Antenna B */
-	if (p_dm->support_ic_type & ODM_RTL8723B) {
-		/* odm_set_bb_reg(p_dm, REG_DPDT_CONTROL, 0x3, 0x2); */
-		odm_set_bb_reg(p_dm, REG_S0_S1_PATH_SWITCH, 0xfff, 0x280);
-		odm_set_bb_reg(p_dm, REG_AGC_TABLE_SELECT, BIT(31), 0x1);
+	/* @change to Antenna B */
+	if (dm->support_ic_type & ODM_RTL8723B) {
+#if 0
+		/* odm_set_bb_reg(dm, REG_DPDT_CONTROL, 0x3, 0x2); */
+#endif
+		odm_set_bb_reg(dm, REG_S0_S1_PATH_SWITCH, 0xfff, 0x280);
+		odm_set_bb_reg(dm, REG_AGC_TABLE_SELECT, BIT(31), 0x1);
 	}
 
 	ODM_delay_us(10);
@@ -184,650 +202,690 @@ odm_single_dual_antenna_detection(
 	/* PSD report of antenna B */
 	PSD_report_tmp = 0x0;
 	for (n = 0; n < 2; n++) {
-		PSD_report_tmp = phydm_get_psd_data(p_dm, 14, initial_gain);
+		PSD_report_tmp = phydm_get_psd_data(dm, 14, initial_gain);
 		if (PSD_report_tmp > ant_b_report)
 			ant_b_report = PSD_report_tmp;
 	}
 
-	/* Close IQK Single Tone function */
-	odm_set_bb_reg(p_dm, REG_FPGA0_IQK, 0xffffff00, 0x000000);
+	/* @Close IQK Single Tone function */
+	odm_set_bb_reg(dm, REG_FPGA0_IQK, 0xffffff00, 0x000000);
 
-	/* 1 Return to antanna A */
-	if (p_dm->support_ic_type & ODM_RTL8723B) {
-		/* external DPDT */
-		odm_set_bb_reg(p_dm, REG_DPDT_CONTROL, MASKDWORD, reg92c);
+	/* @1 Return to antanna A */
+	if (dm->support_ic_type & ODM_RTL8723B) {
+		/* @external DPDT */
+		odm_set_bb_reg(dm, REG_DPDT_CONTROL, MASKDWORD, reg92c);
 
-		/* internal S0/S1 */
-		odm_set_bb_reg(p_dm, REG_S0_S1_PATH_SWITCH, MASKDWORD, reg948);
-		odm_set_bb_reg(p_dm, REG_AGC_TABLE_SELECT, MASKDWORD, regb2c);
-		odm_set_bb_reg(p_dm, rfe_ctrl_anta_src, MASKDWORD, reg930);
-		odm_set_mac_reg(p_dm, REG_SYM_WLBT_PAPE_SEL, BIT(29), reg064);
+		/* @internal S0/S1 */
+		odm_set_bb_reg(dm, REG_S0_S1_PATH_SWITCH, MASKDWORD, reg948);
+		odm_set_bb_reg(dm, REG_AGC_TABLE_SELECT, MASKDWORD, regb2c);
+		odm_set_bb_reg(dm, rfe_ctrl_anta_src, MASKDWORD, reg930);
+		odm_set_mac_reg(dm, REG_SYM_WLBT_PAPE_SEL, BIT(29), reg064);
 	}
 
-	odm_set_bb_reg(p_dm, REG_FPGA0_ANALOG_PARAMETER4, MASKDWORD, reg88c);
-	odm_set_bb_reg(p_dm, REG_OFDM_0_TR_MUX_PAR, MASKDWORD, regc08);
-	odm_set_bb_reg(p_dm, REG_FPGA0_XCD_RF_INTERFACE_SW, MASKDWORD, reg874);
-	odm_set_bb_reg(p_dm, REG_OFDM_0_XA_AGC_CORE1, 0x7F, 0x40);
-	odm_set_bb_reg(p_dm, REG_OFDM_0_XA_AGC_CORE1, MASKDWORD, regc50);
-	odm_set_rf_reg(p_dm, RF_PATH_A, RF_CHNLBW, RFREGOFFSETMASK, current_channel);
-	odm_set_rf_reg(p_dm, RF_PATH_A, 0x00, RFREGOFFSETMASK, rf_loop_reg);
+	odm_set_bb_reg(dm, REG_FPGA0_ANALOG_PARAMETER4, MASKDWORD, reg88c);
+	odm_set_bb_reg(dm, REG_OFDM_0_TR_MUX_PAR, MASKDWORD, regc08);
+	odm_set_bb_reg(dm, REG_FPGA0_XCD_RF_INTERFACE_SW, MASKDWORD, reg874);
+	odm_set_bb_reg(dm, REG_OFDM_0_XA_AGC_CORE1, 0x7F, 0x40);
+	odm_set_bb_reg(dm, REG_OFDM_0_XA_AGC_CORE1, MASKDWORD, regc50);
+	odm_set_rf_reg(dm, RF_PATH_A, RF_CHNLBW, RFREGOFFSETMASK, current_channel);
+	odm_set_rf_reg(dm, RF_PATH_A, RF_0x00, RFREGOFFSETMASK, rf_loop_reg);
 
 	/* Reload AFE Registers */
-	if (p_dm->support_ic_type & ODM_RTL8723B)
-		odm_set_bb_reg(p_dm, REG_RX_WAIT_CCA, MASKDWORD, afe_rrx_wait_cca);
+	if (dm->support_ic_type & ODM_RTL8723B)
+		odm_set_bb_reg(dm, REG_RX_WAIT_CCA, MASKDWORD, afe_rrx_wait_cca);
 
-	if (p_dm->support_ic_type & ODM_RTL8723B) {
-		PHYDM_DBG(p_dm, DBG_ANT_DIV, ("psd_report_A[%d]= %d\n", 2416, ant_a_report));
-		PHYDM_DBG(p_dm, DBG_ANT_DIV, ("psd_report_B[%d]= %d\n", 2416, ant_b_report));
+	if (dm->support_ic_type & ODM_RTL8723B) {
+		PHYDM_DBG(dm, DBG_ANT_DIV, "psd_report_A[%d]= %d\n", 2416,
+			  ant_a_report);
+		PHYDM_DBG(dm, DBG_ANT_DIV, "psd_report_B[%d]= %d\n", 2416,
+			  ant_b_report);
 
-		/* 2 Test ant B based on ant A is ON */
-		if ((ant_a_report >= 100) && (ant_b_report >= 100) && (ant_a_report <= 135) && (ant_b_report <= 135)) {
+		/* @2 Test ant B based on ant A is ON */
+		if (ant_a_report >= 100 && ant_b_report >= 100 && ant_a_report <= 135 && ant_b_report <= 135) {
 			u8 TH1 = 2, TH2 = 6;
 
 			if ((ant_a_report - ant_b_report < TH1) || (ant_b_report - ant_a_report < TH1)) {
-				p_dm_swat_table->ANTA_ON = true;
-				p_dm_swat_table->ANTB_ON = true;
-				PHYDM_DBG(p_dm, DBG_ANT_DIV, ("odm_single_dual_antenna_detection(): Dual Antenna\n"));
+				dm_swat_table->ANTA_ON = true;
+				dm_swat_table->ANTB_ON = true;
+				PHYDM_DBG(dm, DBG_ANT_DIV, "%s: Dual Antenna\n",
+					  __func__);
 			} else if (((ant_a_report - ant_b_report >= TH1) && (ant_a_report - ant_b_report <= TH2)) ||
-				((ant_b_report - ant_a_report >= TH1) && (ant_b_report - ant_a_report <= TH2))) {
-				p_dm_swat_table->ANTA_ON = false;
-				p_dm_swat_table->ANTB_ON = false;
+				   ((ant_b_report - ant_a_report >= TH1) && (ant_b_report - ant_a_report <= TH2))) {
+				dm_swat_table->ANTA_ON = false;
+				dm_swat_table->ANTB_ON = false;
 				is_result = false;
-				PHYDM_DBG(p_dm, DBG_ANT_DIV, ("odm_single_dual_antenna_detection(): Need to check again\n"));
+				PHYDM_DBG(dm, DBG_ANT_DIV,
+					  "%s: Need to check again\n",
+					  __func__);
 			} else {
-				p_dm_swat_table->ANTA_ON = true;
-				p_dm_swat_table->ANTB_ON = false;
-				PHYDM_DBG(p_dm, DBG_ANT_DIV, ("odm_single_dual_antenna_detection(): Single Antenna\n"));
+				dm_swat_table->ANTA_ON = true;
+				dm_swat_table->ANTB_ON = false;
+				PHYDM_DBG(dm, DBG_ANT_DIV,
+					  "%s: Single Antenna\n", __func__);
 			}
-			p_dm->ant_detected_info.is_ant_detected = true;
-			p_dm->ant_detected_info.db_for_ant_a = ant_a_report;
-			p_dm->ant_detected_info.db_for_ant_b = ant_b_report;
-			p_dm->ant_detected_info.db_for_ant_o = ant_0_report;
+			dm->ant_detected_info.is_ant_detected = true;
+			dm->ant_detected_info.db_for_ant_a = ant_a_report;
+			dm->ant_detected_info.db_for_ant_b = ant_b_report;
+			dm->ant_detected_info.db_for_ant_o = ant_0_report;
 
 		} else {
-			PHYDM_DBG(p_dm, DBG_ANT_DIV, ("return false!!\n"));
+			PHYDM_DBG(dm, DBG_ANT_DIV, "return false!!\n");
 			is_result = false;
 		}
 	}
 	return is_result;
-
 }
 
-
-
-/* 1 [2. Scan AP RSSI method] ================================================== */
-
-
-
+/* @1 [2. Scan AP RSSI method] ================================================== */
 
 boolean
 odm_sw_ant_div_check_before_link(
-	void		*p_dm_void
-)
+	void *dm_void)
 {
-
 #if (RT_MEM_SIZE_LEVEL != RT_MEM_SIZE_MINIMUM)
 
-	struct PHY_DM_STRUCT		*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	struct _ADAPTER		*adapter = p_dm->adapter;
-	HAL_DATA_TYPE	*p_hal_data = GET_HAL_DATA(adapter);
-	PMGNT_INFO		p_mgnt_info = &adapter->MgntInfo;
-	struct _sw_antenna_switch_			*p_dm_swat_table = &p_dm->dm_swat_table;
-	struct phydm_fat_struct	*p_dm_fat_table = &p_dm->dm_fat_table;
-	s8			score = 0;
-	PRT_WLAN_BSS	p_tmp_bss_desc, p_test_bss_desc;
-	u8			power_target_L = 9, power_target_H = 16;
-	u8			tmp_power_diff = 0, power_diff = 0, avg_power_diff = 0, max_power_diff = 0, min_power_diff = 0xff;
-	u16			index, counter = 0;
-	static u8		scan_channel;
-	u32			tmp_swas_no_link_bk_reg948;
-
-	PHYDM_DBG(p_dm, DBG_ANT_DIV, ("ANTA_ON = (( %d )) , ANTB_ON = (( %d ))\n", p_dm->dm_swat_table.ANTA_ON, p_dm->dm_swat_table.ANTB_ON));
-
-	/* if(HP id) */
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	void *adapter = dm->adapter;
+	HAL_DATA_TYPE *hal_data = GET_HAL_DATA(((PADAPTER)adapter));
+	//PMGNT_INFO		mgnt_info = &adapter->MgntInfo;
+	PMGNT_INFO mgnt_info = &(((PADAPTER)(adapter))->MgntInfo);
+	struct sw_antenna_switch *dm_swat_table = &dm->dm_swat_table;
+	struct phydm_fat_struct *fat_tab = &dm->dm_fat_table;
+	s8 score = 0;
+	PRT_WLAN_BSS p_tmp_bss_desc, p_test_bss_desc;
+	u8 power_target_L = 9, power_target_H = 16;
+	u8 tmp_power_diff = 0, power_diff = 0, avg_power_diff = 0, max_power_diff = 0, min_power_diff = 0xff;
+	u16 index, counter = 0;
+	static u8 scan_channel;
+	u32 tmp_swas_no_link_bk_reg948;
+
+	PHYDM_DBG(dm, DBG_ANT_DIV, "ANTA_ON = (( %d )) , ANTB_ON = (( %d ))\n",
+		  dm->dm_swat_table.ANTA_ON, dm->dm_swat_table.ANTB_ON);
+
+	/* @if(HP id) */
 	{
-		if (p_dm->dm_swat_table.rssi_ant_dect_result == true && p_dm->support_ic_type == ODM_RTL8723B) {
-			PHYDM_DBG(p_dm, DBG_ANT_DIV, ("8723B RSSI-based Antenna Detection is done\n"));
+		if (dm->dm_swat_table.rssi_ant_dect_result == true && dm->support_ic_type == ODM_RTL8723B) {
+			PHYDM_DBG(dm, DBG_ANT_DIV,
+				  "8723B RSSI-based Antenna Detection is done\n");
 			return false;
 		}
 
-		if (p_dm->support_ic_type == ODM_RTL8723B) {
-			if (p_dm_swat_table->swas_no_link_bk_reg948 == 0xff)
-				p_dm_swat_table->swas_no_link_bk_reg948 = odm_read_4byte(p_dm, REG_S0_S1_PATH_SWITCH);
+		if (dm->support_ic_type == ODM_RTL8723B) {
+			if (dm_swat_table->swas_no_link_bk_reg948 == 0xff)
+				dm_swat_table->swas_no_link_bk_reg948 = odm_read_4byte(dm, REG_S0_S1_PATH_SWITCH);
 		}
 	}
 
-	if (p_dm->adapter == NULL) { /* For BSOD when plug/unplug fast.  //By YJ,120413 */
+	if (dm->adapter == NULL) { /* @For BSOD when plug/unplug fast.  //By YJ,120413 */
 		/* The ODM structure is not initialized. */
 		return false;
 	}
 
 	/* Retrieve antenna detection registry info, added by Roger, 2012.11.27. */
-	if (!IS_ANT_DETECT_SUPPORT_RSSI(adapter))
+	if (!IS_ANT_DETECT_SUPPORT_RSSI(((PADAPTER)adapter)))
 		return false;
 	else
-		PHYDM_DBG(p_dm, DBG_ANT_DIV, ("Antenna Detection: RSSI method\n"));
+		PHYDM_DBG(dm, DBG_ANT_DIV, "Antenna Detection: RSSI method\n");
 
 	/* Since driver is going to set BB register, it shall check if there is another thread controlling BB/RF. */
-	odm_acquire_spin_lock(p_dm, RT_RF_STATE_SPINLOCK);
-	if (p_hal_data->eRFPowerState != eRfOn || p_mgnt_info->RFChangeInProgress || p_mgnt_info->bMediaConnect) {
-		odm_release_spin_lock(p_dm, RT_RF_STATE_SPINLOCK);
+	odm_acquire_spin_lock(dm, RT_RF_STATE_SPINLOCK);
+	if (hal_data->eRFPowerState != eRfOn || mgnt_info->RFChangeInProgress || mgnt_info->bMediaConnect) {
+		odm_release_spin_lock(dm, RT_RF_STATE_SPINLOCK);
 
-		PHYDM_DBG(p_dm, DBG_ANT_DIV,
-			("odm_sw_ant_div_check_before_link(): rf_change_in_progress(%x), e_rf_power_state(%x)\n",
-			p_mgnt_info->RFChangeInProgress, p_hal_data->eRFPowerState));
+		PHYDM_DBG(dm, DBG_ANT_DIV,
+			  "%s: rf_change_in_progress(%x), e_rf_power_state(%x)\n",
+			  __func__, mgnt_info->RFChangeInProgress,
+			  hal_data->eRFPowerState);
 
-		p_dm_swat_table->swas_no_link_state = 0;
+		dm_swat_table->swas_no_link_state = 0;
 
 		return false;
 	} else
-		odm_release_spin_lock(p_dm, RT_RF_STATE_SPINLOCK);
-	PHYDM_DBG(p_dm, DBG_ANT_DIV, ("p_dm_swat_table->swas_no_link_state = %d\n", p_dm_swat_table->swas_no_link_state));
-	/* 1 Run AntDiv mechanism "Before Link" part. */
-	if (p_dm_swat_table->swas_no_link_state == 0) {
-		/* 1 Prepare to do Scan again to check current antenna state. */
+		odm_release_spin_lock(dm, RT_RF_STATE_SPINLOCK);
+	PHYDM_DBG(dm, DBG_ANT_DIV, "dm_swat_table->swas_no_link_state = %d\n",
+		  dm_swat_table->swas_no_link_state);
+	/* @1 Run AntDiv mechanism "Before Link" part. */
+	if (dm_swat_table->swas_no_link_state == 0) {
+		/* @1 Prepare to do Scan again to check current antenna state. */
 
 		/* Set check state to next step. */
-		p_dm_swat_table->swas_no_link_state = 1;
+		dm_swat_table->swas_no_link_state = 1;
 
-		/* Copy Current Scan list. */
-		p_mgnt_info->tmpNumBssDesc = p_mgnt_info->NumBssDesc;
-		PlatformMoveMemory((void *)adapter->MgntInfo.tmpbssDesc, (void *)p_mgnt_info->bssDesc, sizeof(RT_WLAN_BSS) * MAX_BSS_DESC);
+		/* @Copy Current Scan list. */
+		mgnt_info->tmpNumBssDesc = mgnt_info->NumBssDesc;
+		PlatformMoveMemory((void *)mgnt_info->tmpbssDesc, (void *)mgnt_info->bssDesc, sizeof(RT_WLAN_BSS) * MAX_BSS_DESC);
 
-		/* Go back to scan function again. */
-		PHYDM_DBG(p_dm, DBG_ANT_DIV, ("odm_sw_ant_div_check_before_link: Scan one more time\n"));
-		p_mgnt_info->ScanStep = 0;
-		p_mgnt_info->bScanAntDetect = true;
+		/* @Go back to scan function again. */
+		PHYDM_DBG(dm, DBG_ANT_DIV, "%s: Scan one more time\n",
+			  __func__);
+		mgnt_info->ScanStep = 0;
+		mgnt_info->bScanAntDetect = true;
 		scan_channel = odm_sw_ant_div_select_scan_chnl(adapter);
 
-
-		if (p_dm->support_ic_type & (ODM_RTL8188E | ODM_RTL8821)) {
-			if (p_dm_fat_table->rx_idle_ant == MAIN_ANT)
-				odm_update_rx_idle_ant(p_dm, AUX_ANT);
+		if (dm->support_ic_type & (ODM_RTL8188E | ODM_RTL8821)) {
+			if (fat_tab->rx_idle_ant == MAIN_ANT)
+				odm_update_rx_idle_ant(dm, AUX_ANT);
 			else
-				odm_update_rx_idle_ant(p_dm, MAIN_ANT);
+				odm_update_rx_idle_ant(dm, MAIN_ANT);
 			if (scan_channel == 0) {
-				PHYDM_DBG(p_dm, DBG_ANT_DIV,
-					("odm_sw_ant_div_check_before_link(): No AP List Avaiable, Using ant(%s)\n", (p_dm_fat_table->rx_idle_ant == MAIN_ANT) ? "AUX_ANT" : "MAIN_ANT"));
-
-				if (IS_5G_WIRELESS_MODE(p_mgnt_info->dot11CurrentWirelessMode)) {
-					p_dm_swat_table->ant_5g = p_dm_fat_table->rx_idle_ant;
-					PHYDM_DBG(p_dm, DBG_ANT_DIV, ("p_dm_swat_table->ant_5g=%s\n", (p_dm_fat_table->rx_idle_ant == MAIN_ANT) ? "MAIN_ANT" : "AUX_ANT"));
+				PHYDM_DBG(dm, DBG_ANT_DIV,
+					  "%s: No AP List Avaiable, Using ant(%s)\n",
+					  __func__,
+					  (fat_tab->rx_idle_ant == MAIN_ANT) ?
+					  "AUX_ANT" : "MAIN_ANT");
+
+				if (IS_5G_WIRELESS_MODE(mgnt_info->dot11CurrentWirelessMode)) {
+					dm_swat_table->ant_5g = fat_tab->rx_idle_ant;
+					PHYDM_DBG(dm, DBG_ANT_DIV, "dm_swat_table->ant_5g=%s\n", (fat_tab->rx_idle_ant == MAIN_ANT) ? "MAIN_ANT" : "AUX_ANT");
 				} else {
-					p_dm_swat_table->ant_2g = p_dm_fat_table->rx_idle_ant;
-					PHYDM_DBG(p_dm, DBG_ANT_DIV, ("p_dm_swat_table->ant_2g=%s\n", (p_dm_fat_table->rx_idle_ant == MAIN_ANT) ? "MAIN_ANT" : "AUX_ANT"));
+					dm_swat_table->ant_2g = fat_tab->rx_idle_ant;
+					PHYDM_DBG(dm, DBG_ANT_DIV, "dm_swat_table->ant_2g=%s\n", (fat_tab->rx_idle_ant == MAIN_ANT) ? "MAIN_ANT" : "AUX_ANT");
 				}
 				return false;
 			}
 
-			PHYDM_DBG(p_dm, DBG_ANT_DIV,
-				("odm_sw_ant_div_check_before_link: Change to %s for testing.\n", ((p_dm_fat_table->rx_idle_ant == MAIN_ANT) ? "MAIN_ANT" : "AUX_ANT")));
-		} else if (p_dm->support_ic_type & (ODM_RTL8723B)) {
+			PHYDM_DBG(dm, DBG_ANT_DIV,
+				  "%s: Change to %s for testing.\n", __func__,
+				  ((fat_tab->rx_idle_ant == MAIN_ANT) ?
+				  "MAIN_ANT" : "AUX_ANT"));
+		} else if (dm->support_ic_type & (ODM_RTL8723B)) {
 			/*Switch Antenna to another one.*/
 
-			tmp_swas_no_link_bk_reg948 = odm_read_4byte(p_dm, REG_S0_S1_PATH_SWITCH);
+			tmp_swas_no_link_bk_reg948 = odm_read_4byte(dm, REG_S0_S1_PATH_SWITCH);
 
-			if ((p_dm_swat_table->cur_antenna == MAIN_ANT) && (tmp_swas_no_link_bk_reg948 == 0x200)) {
-				odm_set_bb_reg(p_dm, REG_S0_S1_PATH_SWITCH, 0xfff, 0x280);
-				odm_set_bb_reg(p_dm, REG_AGC_TABLE_SELECT, BIT(31), 0x1);
-				p_dm_swat_table->cur_antenna = AUX_ANT;
+			if (dm_swat_table->cur_antenna == MAIN_ANT && tmp_swas_no_link_bk_reg948 == 0x200) {
+				odm_set_bb_reg(dm, REG_S0_S1_PATH_SWITCH, 0xfff, 0x280);
+				odm_set_bb_reg(dm, REG_AGC_TABLE_SELECT, BIT(31), 0x1);
+				dm_swat_table->cur_antenna = AUX_ANT;
 			} else {
-				PHYDM_DBG(p_dm, DBG_ANT_DIV, ("Reg[948]= (( %x )) was in wrong state\n", tmp_swas_no_link_bk_reg948));
+				PHYDM_DBG(dm, DBG_ANT_DIV,
+					  "Reg[948]= (( %x )) was in wrong state\n",
+					  tmp_swas_no_link_bk_reg948);
 				return false;
 			}
 			ODM_delay_us(10);
 
-			PHYDM_DBG(p_dm, DBG_ANT_DIV, ("odm_sw_ant_div_check_before_link: Change to (( %s-ant))  for testing.\n", (p_dm_swat_table->cur_antenna == MAIN_ANT) ? "MAIN" : "AUX"));
+			PHYDM_DBG(dm, DBG_ANT_DIV,
+				  "%s: Change to (( %s-ant))  for testing.\n",
+				  __func__,
+				  (dm_swat_table->cur_antenna == MAIN_ANT) ?
+				  "MAIN" : "AUX");
 		}
 
 		odm_sw_ant_div_construct_scan_chnl(adapter, scan_channel);
-		PlatformSetTimer(adapter, &p_mgnt_info->ScanTimer, 5);
+		PlatformSetTimer(adapter, &mgnt_info->ScanTimer, 5);
 
 		return true;
-	} else { /* p_dm_swat_table->swas_no_link_state == 1 */
-		/* 1 ScanComple() is called after antenna swiched. */
-		/* 1 Check scan result and determine which antenna is going */
-		/* 1 to be used. */
+	} else { /* @dm_swat_table->swas_no_link_state == 1 */
+		/* @1 ScanComple() is called after antenna swiched. */
+		/* @1 Check scan result and determine which antenna is going */
+		/* @1 to be used. */
 
-		PHYDM_DBG(p_dm, DBG_ANT_DIV, (" tmp_num_bss_desc= (( %d ))\n", p_mgnt_info->tmpNumBssDesc)); /* debug for Dino */
+		PHYDM_DBG(dm, DBG_ANT_DIV, " tmp_num_bss_desc= (( %d ))\n",
+			  mgnt_info->tmpNumBssDesc); /* @debug for Dino */
 
-		for (index = 0; index < p_mgnt_info->tmpNumBssDesc; index++) {
-			p_tmp_bss_desc = &(p_mgnt_info->tmpbssDesc[index]); /* Antenna 1 */
-			p_test_bss_desc = &(p_mgnt_info->bssDesc[index]); /* Antenna 2 */
+		for (index = 0; index < mgnt_info->tmpNumBssDesc; index++) {
+			p_tmp_bss_desc = &mgnt_info->tmpbssDesc[index]; /* @Antenna 1 */
+			p_test_bss_desc = &mgnt_info->bssDesc[index]; /* @Antenna 2 */
 
 			if (PlatformCompareMemory(p_test_bss_desc->bdBssIdBuf, p_tmp_bss_desc->bdBssIdBuf, 6) != 0) {
-				PHYDM_DBG(p_dm, DBG_ANT_DIV, ("odm_sw_ant_div_check_before_link(): ERROR!! This shall not happen.\n"));
+				PHYDM_DBG(dm, DBG_ANT_DIV,
+					  "%s: ERROR!! This shall not happen.\n",
+					  __func__);
 				continue;
 			}
 
-			if (p_dm->support_ic_type != ODM_RTL8723B) {
+			if (dm->support_ic_type != ODM_RTL8723B) {
 				if (p_tmp_bss_desc->ChannelNumber == scan_channel) {
 					if (p_tmp_bss_desc->RecvSignalPower > p_test_bss_desc->RecvSignalPower) {
-						PHYDM_DBG(p_dm, DBG_ANT_DIV, ("odm_sw_ant_div_check_before_link: Compare scan entry: score++\n"));
+						PHYDM_DBG(dm, DBG_ANT_DIV, "%s: Compare scan entry: score++\n", __func__);
 						RT_PRINT_STR(COMP_SCAN, DBG_WARNING, "GetScanInfo(): new Bss SSID:", p_tmp_bss_desc->bdSsIdBuf, p_tmp_bss_desc->bdSsIdLen);
-						PHYDM_DBG(p_dm, DBG_ANT_DIV, ("at ch %d, Original: %d, Test: %d\n\n", p_tmp_bss_desc->ChannelNumber, p_tmp_bss_desc->RecvSignalPower, p_test_bss_desc->RecvSignalPower));
+						PHYDM_DBG(dm, DBG_ANT_DIV, "at ch %d, Original: %d, Test: %d\n\n", p_tmp_bss_desc->ChannelNumber, p_tmp_bss_desc->RecvSignalPower, p_test_bss_desc->RecvSignalPower);
 
 						score++;
 						PlatformMoveMemory(p_test_bss_desc, p_tmp_bss_desc, sizeof(RT_WLAN_BSS));
 					} else if (p_tmp_bss_desc->RecvSignalPower < p_test_bss_desc->RecvSignalPower) {
-						PHYDM_DBG(p_dm, DBG_ANT_DIV, ("odm_sw_ant_div_check_before_link: Compare scan entry: score--\n"));
+						PHYDM_DBG(dm, DBG_ANT_DIV, "%s: Compare scan entry: score--\n", __func__);
 						RT_PRINT_STR(COMP_SCAN, DBG_WARNING, "GetScanInfo(): new Bss SSID:", p_tmp_bss_desc->bdSsIdBuf, p_tmp_bss_desc->bdSsIdLen);
-						PHYDM_DBG(p_dm, DBG_ANT_DIV, ("at ch %d, Original: %d, Test: %d\n\n", p_tmp_bss_desc->ChannelNumber, p_tmp_bss_desc->RecvSignalPower, p_test_bss_desc->RecvSignalPower));
+						PHYDM_DBG(dm, DBG_ANT_DIV, "at ch %d, Original: %d, Test: %d\n\n", p_tmp_bss_desc->ChannelNumber, p_tmp_bss_desc->RecvSignalPower, p_test_bss_desc->RecvSignalPower);
 						score--;
 					} else {
 						if (p_test_bss_desc->bdTstamp - p_tmp_bss_desc->bdTstamp < 5000) {
 							RT_PRINT_STR(COMP_SCAN, DBG_WARNING, "GetScanInfo(): new Bss SSID:", p_tmp_bss_desc->bdSsIdBuf, p_tmp_bss_desc->bdSsIdLen);
-							PHYDM_DBG(p_dm, DBG_ANT_DIV, ("at ch %d, Original: %d, Test: %d\n", p_tmp_bss_desc->ChannelNumber, p_tmp_bss_desc->RecvSignalPower, p_test_bss_desc->RecvSignalPower));
-							PHYDM_DBG(p_dm, DBG_ANT_DIV, ("The 2nd Antenna didn't get this AP\n\n"));
+							PHYDM_DBG(dm, DBG_ANT_DIV, "at ch %d, Original: %d, Test: %d\n", p_tmp_bss_desc->ChannelNumber, p_tmp_bss_desc->RecvSignalPower, p_test_bss_desc->RecvSignalPower);
+							PHYDM_DBG(dm, DBG_ANT_DIV, "The 2nd Antenna didn't get this AP\n\n");
 						}
 					}
 				}
-			} else { /* 8723B */
+			} else { /* @8723B */
 				if (p_tmp_bss_desc->ChannelNumber == scan_channel) {
-					PHYDM_DBG(p_dm, DBG_ANT_DIV, ("channel_number == scan_channel->(( %d ))\n", p_tmp_bss_desc->ChannelNumber));
+					PHYDM_DBG(dm, DBG_ANT_DIV, "channel_number == scan_channel->(( %d ))\n", p_tmp_bss_desc->ChannelNumber);
 
 					if (p_tmp_bss_desc->RecvSignalPower > p_test_bss_desc->RecvSignalPower) { /* Pow(Ant1) > Pow(Ant2) */
 						counter++;
 						tmp_power_diff = (u8)(p_tmp_bss_desc->RecvSignalPower - p_test_bss_desc->RecvSignalPower);
 						power_diff = power_diff + tmp_power_diff;
 
-						PHYDM_DBG(p_dm, DBG_ANT_DIV, ("Original: %d, Test: %d\n", p_tmp_bss_desc->RecvSignalPower, p_test_bss_desc->RecvSignalPower));
-						PHYDM_PRINT_ADDR(p_dm, DBG_ANT_DIV, ("SSID:"), p_tmp_bss_desc->bdSsIdBuf);
-						PHYDM_PRINT_ADDR(p_dm, DBG_ANT_DIV, ("BSSID:"), p_tmp_bss_desc->bdSsIdBuf);
+						PHYDM_DBG(dm, DBG_ANT_DIV, "Original: %d, Test: %d\n", p_tmp_bss_desc->RecvSignalPower, p_test_bss_desc->RecvSignalPower);
+						PHYDM_PRINT_ADDR(dm, DBG_ANT_DIV, "SSID:", p_tmp_bss_desc->bdSsIdBuf);
+						PHYDM_PRINT_ADDR(dm, DBG_ANT_DIV, "BSSID:", p_tmp_bss_desc->bdSsIdBuf);
 
-						/* PHYDM_DBG(p_dm,DBG_ANT_DIV, ("tmp_power_diff: (( %d)),max_power_diff: (( %d)),min_power_diff: (( %d))\n", tmp_power_diff,max_power_diff,min_power_diff)); */
+#if 0
+						/* PHYDM_DBG(dm,DBG_ANT_DIV, "tmp_power_diff: (( %d)),max_power_diff: (( %d)),min_power_diff: (( %d))\n", tmp_power_diff,max_power_diff,min_power_diff); */
+#endif
 						if (tmp_power_diff > max_power_diff)
 							max_power_diff = tmp_power_diff;
 						if (tmp_power_diff < min_power_diff)
 							min_power_diff = tmp_power_diff;
-						/* PHYDM_DBG(p_dm,DBG_ANT_DIV, ("max_power_diff: (( %d)),min_power_diff: (( %d))\n",max_power_diff,min_power_diff)); */
+#if 0
+						/* PHYDM_DBG(dm,DBG_ANT_DIV, "max_power_diff: (( %d)),min_power_diff: (( %d))\n",max_power_diff,min_power_diff); */
+#endif
 
 						PlatformMoveMemory(p_test_bss_desc, p_tmp_bss_desc, sizeof(RT_WLAN_BSS));
 					} else if (p_test_bss_desc->RecvSignalPower > p_tmp_bss_desc->RecvSignalPower) { /* Pow(Ant1) < Pow(Ant2) */
 						counter++;
 						tmp_power_diff = (u8)(p_test_bss_desc->RecvSignalPower - p_tmp_bss_desc->RecvSignalPower);
 						power_diff = power_diff + tmp_power_diff;
-						PHYDM_DBG(p_dm, DBG_ANT_DIV, ("Original: %d, Test: %d\n", p_tmp_bss_desc->RecvSignalPower, p_test_bss_desc->RecvSignalPower));
-						PHYDM_PRINT_ADDR(p_dm, DBG_ANT_DIV, ("SSID:"), p_tmp_bss_desc->bdSsIdBuf);
-						PHYDM_PRINT_ADDR(p_dm, DBG_ANT_DIV, ("BSSID:"), p_tmp_bss_desc->bdSsIdBuf);
+						PHYDM_DBG(dm, DBG_ANT_DIV, "Original: %d, Test: %d\n", p_tmp_bss_desc->RecvSignalPower, p_test_bss_desc->RecvSignalPower);
+						PHYDM_PRINT_ADDR(dm, DBG_ANT_DIV, "SSID:", p_tmp_bss_desc->bdSsIdBuf);
+						PHYDM_PRINT_ADDR(dm, DBG_ANT_DIV, "BSSID:", p_tmp_bss_desc->bdSsIdBuf);
 						if (tmp_power_diff > max_power_diff)
 							max_power_diff = tmp_power_diff;
 						if (tmp_power_diff < min_power_diff)
 							min_power_diff = tmp_power_diff;
 					} else { /* Pow(Ant1) = Pow(Ant2) */
 						if (p_test_bss_desc->bdTstamp > p_tmp_bss_desc->bdTstamp) { /* Stamp(Ant1) < Stamp(Ant2) */
-							PHYDM_DBG(p_dm, DBG_ANT_DIV, ("time_diff: %lld\n", (p_test_bss_desc->bdTstamp - p_tmp_bss_desc->bdTstamp) / 1000));
+							PHYDM_DBG(dm, DBG_ANT_DIV, "time_diff: %lld\n", (p_test_bss_desc->bdTstamp - p_tmp_bss_desc->bdTstamp) / 1000);
 							if (p_test_bss_desc->bdTstamp - p_tmp_bss_desc->bdTstamp > 5000) {
 								counter++;
-								PHYDM_DBG(p_dm, DBG_ANT_DIV, ("Original: %d, Test: %d\n", p_tmp_bss_desc->RecvSignalPower, p_test_bss_desc->RecvSignalPower));
-								PHYDM_PRINT_ADDR(p_dm, DBG_ANT_DIV, ("SSID:"), p_tmp_bss_desc->bdSsIdBuf);
-								PHYDM_PRINT_ADDR(p_dm, DBG_ANT_DIV, ("BSSID:"), p_tmp_bss_desc->bdSsIdBuf);
+								PHYDM_DBG(dm, DBG_ANT_DIV, "Original: %d, Test: %d\n", p_tmp_bss_desc->RecvSignalPower, p_test_bss_desc->RecvSignalPower);
+								PHYDM_PRINT_ADDR(dm, DBG_ANT_DIV, "SSID:", p_tmp_bss_desc->bdSsIdBuf);
+								PHYDM_PRINT_ADDR(dm, DBG_ANT_DIV, "BSSID:", p_tmp_bss_desc->bdSsIdBuf);
 								min_power_diff = 0;
 							}
 						} else
-							PHYDM_DBG(p_dm, DBG_ANT_DIV, ("[Error !!!]: Time_diff: %lld\n", (p_test_bss_desc->bdTstamp - p_tmp_bss_desc->bdTstamp) / 1000));
+							PHYDM_DBG(dm, DBG_ANT_DIV, "[Error !!!]: Time_diff: %lld\n", (p_test_bss_desc->bdTstamp - p_tmp_bss_desc->bdTstamp) / 1000);
 					}
 				}
 			}
 		}
 
-		if (p_dm->support_ic_type & (ODM_RTL8188E | ODM_RTL8821)) {
-			if (p_mgnt_info->NumBssDesc != 0 && score < 0) {
-				PHYDM_DBG(p_dm, DBG_ANT_DIV,
-					("odm_sw_ant_div_check_before_link(): Using ant(%s)\n", (p_dm_fat_table->rx_idle_ant == MAIN_ANT) ? "MAIN_ANT" : "AUX_ANT"));
+		if (dm->support_ic_type & (ODM_RTL8188E | ODM_RTL8821)) {
+			if (mgnt_info->NumBssDesc != 0 && score < 0) {
+				PHYDM_DBG(dm, DBG_ANT_DIV,
+					  "%s: Using ant(%s)\n", __func__,
+					  (fat_tab->rx_idle_ant == MAIN_ANT) ?
+					  "MAIN_ANT" : "AUX_ANT");
 			} else {
-				PHYDM_DBG(p_dm, DBG_ANT_DIV,
-					("odm_sw_ant_div_check_before_link(): Remain ant(%s)\n", (p_dm_fat_table->rx_idle_ant == MAIN_ANT) ? "AUX_ANT" : "MAIN_ANT"));
+				PHYDM_DBG(dm, DBG_ANT_DIV,
+					  "%s: Remain ant(%s)\n", __func__,
+					  (fat_tab->rx_idle_ant == MAIN_ANT) ?
+					  "AUX_ANT" : "MAIN_ANT");
 
-				if (p_dm_fat_table->rx_idle_ant == MAIN_ANT)
-					odm_update_rx_idle_ant(p_dm, AUX_ANT);
+				if (fat_tab->rx_idle_ant == MAIN_ANT)
+					odm_update_rx_idle_ant(dm, AUX_ANT);
 				else
-					odm_update_rx_idle_ant(p_dm, MAIN_ANT);
+					odm_update_rx_idle_ant(dm, MAIN_ANT);
 			}
 
-			if (IS_5G_WIRELESS_MODE(p_mgnt_info->dot11CurrentWirelessMode)) {
-				p_dm_swat_table->ant_5g = p_dm_fat_table->rx_idle_ant;
-				PHYDM_DBG(p_dm, DBG_ANT_DIV, ("p_dm_swat_table->ant_5g=%s\n", (p_dm_fat_table->rx_idle_ant == MAIN_ANT) ? "MAIN_ANT" : "AUX_ANT"));
+			if (IS_5G_WIRELESS_MODE(mgnt_info->dot11CurrentWirelessMode)) {
+				dm_swat_table->ant_5g = fat_tab->rx_idle_ant;
+				PHYDM_DBG(dm, DBG_ANT_DIV,
+					  "dm_swat_table->ant_5g=%s\n",
+					  (fat_tab->rx_idle_ant == MAIN_ANT) ?
+					  "MAIN_ANT" : "AUX_ANT");
 			} else {
-				p_dm_swat_table->ant_2g = p_dm_fat_table->rx_idle_ant;
-				PHYDM_DBG(p_dm, DBG_ANT_DIV, ("p_dm_swat_table->ant_2g=%s\n", (p_dm_fat_table->rx_idle_ant == MAIN_ANT) ? "MAIN_ANT" : "AUX_ANT"));
+				dm_swat_table->ant_2g = fat_tab->rx_idle_ant;
+				PHYDM_DBG(dm, DBG_ANT_DIV,
+					  "dm_swat_table->ant_2g=%s\n",
+					  (fat_tab->rx_idle_ant == MAIN_ANT) ?
+					  "MAIN_ANT" : "AUX_ANT");
 			}
-		} else if (p_dm->support_ic_type == ODM_RTL8723B) {
+		} else if (dm->support_ic_type == ODM_RTL8723B) {
 			if (counter == 0) {
-				if (p_dm->dm_swat_table.pre_aux_fail_detec == false) {
-					p_dm->dm_swat_table.pre_aux_fail_detec = true;
-					p_dm->dm_swat_table.rssi_ant_dect_result = false;
-					PHYDM_DBG(p_dm, DBG_ANT_DIV, ("counter=(( 0 )) , [[ Cannot find any AP with Aux-ant ]] ->  Scan Target-channel again\n"));
+				if (dm->dm_swat_table.pre_aux_fail_detec == false) {
+					dm->dm_swat_table.pre_aux_fail_detec = true;
+					dm->dm_swat_table.rssi_ant_dect_result = false;
+					PHYDM_DBG(dm, DBG_ANT_DIV, "counter=(( 0 )) , [[ Cannot find any AP with Aux-ant ]] ->  Scan Target-channel again\n");
 
-					/* 3 [ Scan again ] */
+					/* @3 [ Scan again ] */
 					odm_sw_ant_div_construct_scan_chnl(adapter, scan_channel);
-					PlatformSetTimer(adapter, &p_mgnt_info->ScanTimer, 5);
+					PlatformSetTimer(adapter, &mgnt_info->ScanTimer, 5);
 					return true;
 				} else { /* pre_aux_fail_detec == true */
-					/* 2 [ Single Antenna ] */
-					p_dm->dm_swat_table.pre_aux_fail_detec = false;
-					p_dm->dm_swat_table.rssi_ant_dect_result = true;
-					PHYDM_DBG(p_dm, DBG_ANT_DIV, ("counter=(( 0 )) , [[  Still cannot find any AP ]]\n"));
-					PHYDM_DBG(p_dm, DBG_ANT_DIV, ("odm_sw_ant_div_check_before_link(): Single antenna\n"));
+					/* @2 [ Single Antenna ] */
+					dm->dm_swat_table.pre_aux_fail_detec = false;
+					dm->dm_swat_table.rssi_ant_dect_result = true;
+					PHYDM_DBG(dm, DBG_ANT_DIV, "counter=(( 0 )) , [[  Still cannot find any AP ]]\n");
+					PHYDM_DBG(dm, DBG_ANT_DIV, "%s: Single antenna\n", __func__);
 				}
-				p_dm->dm_swat_table.aux_fail_detec_counter++;
+				dm->dm_swat_table.aux_fail_detec_counter++;
 			} else {
-				p_dm->dm_swat_table.pre_aux_fail_detec = false;
+				dm->dm_swat_table.pre_aux_fail_detec = false;
 
 				if (counter == 3) {
 					avg_power_diff = ((power_diff - max_power_diff - min_power_diff) >> 1) + ((max_power_diff + min_power_diff) >> 2);
-					PHYDM_DBG(p_dm, DBG_ANT_DIV, ("counter: (( %d )) ,  power_diff: (( %d ))\n", counter, power_diff));
-					PHYDM_DBG(p_dm, DBG_ANT_DIV, ("[ counter==3 ] Modified avg_power_diff: (( %d )) , max_power_diff: (( %d )) ,  min_power_diff: (( %d ))\n", avg_power_diff, max_power_diff, min_power_diff));
+					PHYDM_DBG(dm, DBG_ANT_DIV, "counter: (( %d )) ,  power_diff: (( %d ))\n", counter, power_diff);
+					PHYDM_DBG(dm, DBG_ANT_DIV, "[ counter==3 ] Modified avg_power_diff: (( %d )) , max_power_diff: (( %d )) ,  min_power_diff: (( %d ))\n", avg_power_diff, max_power_diff, min_power_diff);
 				} else if (counter >= 4) {
 					avg_power_diff = (power_diff - max_power_diff - min_power_diff) / (counter - 2);
-					PHYDM_DBG(p_dm, DBG_ANT_DIV, ("counter: (( %d )) ,  power_diff: (( %d ))\n", counter, power_diff));
-					PHYDM_DBG(p_dm, DBG_ANT_DIV, ("[ counter>=4 ] Modified avg_power_diff: (( %d )) , max_power_diff: (( %d )) ,  min_power_diff: (( %d ))\n", avg_power_diff, max_power_diff, min_power_diff));
+					PHYDM_DBG(dm, DBG_ANT_DIV, "counter: (( %d )) ,  power_diff: (( %d ))\n", counter, power_diff);
+					PHYDM_DBG(dm, DBG_ANT_DIV, "[ counter>=4 ] Modified avg_power_diff: (( %d )) , max_power_diff: (( %d )) ,  min_power_diff: (( %d ))\n", avg_power_diff, max_power_diff, min_power_diff);
 
-				} else { /* counter==1,2 */
+				} else { /* @counter==1,2 */
 					avg_power_diff = power_diff / counter;
-					PHYDM_DBG(p_dm, DBG_ANT_DIV, ("avg_power_diff: (( %d )) , counter: (( %d )) ,  power_diff: (( %d ))\n", avg_power_diff, counter, power_diff));
+					PHYDM_DBG(dm, DBG_ANT_DIV, "avg_power_diff: (( %d )) , counter: (( %d )) ,  power_diff: (( %d ))\n", avg_power_diff, counter, power_diff);
 				}
 
-				/* 2 [ Retry ] */
-				if ((avg_power_diff >= power_target_L) && (avg_power_diff <= power_target_H)) {
-					p_dm->dm_swat_table.retry_counter++;
+				/* @2 [ Retry ] */
+				if (avg_power_diff >= power_target_L && avg_power_diff <= power_target_H) {
+					dm->dm_swat_table.retry_counter++;
 
-					if (p_dm->dm_swat_table.retry_counter <= 3) {
-						p_dm->dm_swat_table.rssi_ant_dect_result = false;
-						PHYDM_DBG(p_dm, DBG_ANT_DIV, ("[[ Low confidence result ]] avg_power_diff= (( %d ))  ->  Scan Target-channel again ]]\n", avg_power_diff));
+					if (dm->dm_swat_table.retry_counter <= 3) {
+						dm->dm_swat_table.rssi_ant_dect_result = false;
+						PHYDM_DBG(dm, DBG_ANT_DIV, "[[ Low confidence result ]] avg_power_diff= (( %d ))  ->  Scan Target-channel again ]]\n", avg_power_diff);
 
-						/* 3 [ Scan again ] */
+						/* @3 [ Scan again ] */
 						odm_sw_ant_div_construct_scan_chnl(adapter, scan_channel);
-						PlatformSetTimer(adapter, &p_mgnt_info->ScanTimer, 5);
+						PlatformSetTimer(adapter, &mgnt_info->ScanTimer, 5);
 						return true;
 					} else {
-						p_dm->dm_swat_table.rssi_ant_dect_result = true;
-						PHYDM_DBG(p_dm, DBG_ANT_DIV, ("[[ Still Low confidence result ]]  (( retry_counter > 3 ))\n"));
-						PHYDM_DBG(p_dm, DBG_ANT_DIV, ("odm_sw_ant_div_check_before_link(): Single antenna\n"));
+						dm->dm_swat_table.rssi_ant_dect_result = true;
+						PHYDM_DBG(dm, DBG_ANT_DIV, "[[ Still Low confidence result ]]  (( retry_counter > 3 ))\n");
+						PHYDM_DBG(dm, DBG_ANT_DIV, "%s: Single antenna\n", __func__);
 					}
-
 				}
-				/* 2 [ Dual Antenna ] */
-				else if ((p_mgnt_info->NumBssDesc != 0) && (avg_power_diff < power_target_L)) {
-					p_dm->dm_swat_table.rssi_ant_dect_result = true;
-					if (p_dm->dm_swat_table.ANTB_ON == false) {
-						p_dm->dm_swat_table.ANTA_ON = true;
-						p_dm->dm_swat_table.ANTB_ON = true;
+				/* @2 [ Dual Antenna ] */
+				else if ((mgnt_info->NumBssDesc != 0) && (avg_power_diff < power_target_L)) {
+					dm->dm_swat_table.rssi_ant_dect_result = true;
+					if (dm->dm_swat_table.ANTB_ON == false) {
+						dm->dm_swat_table.ANTA_ON = true;
+						dm->dm_swat_table.ANTB_ON = true;
 					}
-					PHYDM_DBG(p_dm, DBG_ANT_DIV, ("odm_sw_ant_div_check_before_link(): Dual antenna\n"));
-					p_dm->dm_swat_table.dual_ant_counter++;
+					PHYDM_DBG(dm, DBG_ANT_DIV, "%s: Dual antenna\n", __func__);
+					dm->dm_swat_table.dual_ant_counter++;
 
 					/* set bt coexDM from 1ant coexDM to 2ant coexDM */
 					BT_SetBtCoexAntNum(adapter, BT_COEX_ANT_TYPE_DETECTED, 2);
 
-					/* 3 [ Init antenna diversity ] */
-					p_dm->support_ability |= ODM_BB_ANT_DIV;
-					odm_ant_div_init(p_dm);
+					/* @3 [ Init antenna diversity ] */
+					dm->support_ability |= ODM_BB_ANT_DIV;
+					odm_ant_div_init(dm);
 				}
-				/* 2 [ Single Antenna ] */
+				/* @2 [ Single Antenna ] */
 				else if (avg_power_diff > power_target_H) {
-					p_dm->dm_swat_table.rssi_ant_dect_result = true;
-					if (p_dm->dm_swat_table.ANTB_ON == true) {
-						p_dm->dm_swat_table.ANTA_ON = true;
-						p_dm->dm_swat_table.ANTB_ON = false;
-						/* bt_set_bt_coex_ant_num(adapter, BT_COEX_ANT_TYPE_DETECTED, 1); */
+					dm->dm_swat_table.rssi_ant_dect_result = true;
+					if (dm->dm_swat_table.ANTB_ON == true) {
+						dm->dm_swat_table.ANTA_ON = true;
+						dm->dm_swat_table.ANTB_ON = false;
+#if 0
+						/* @bt_set_bt_coex_ant_num(adapter, BT_COEX_ANT_TYPE_DETECTED, 1); */
+#endif
 					}
-					PHYDM_DBG(p_dm, DBG_ANT_DIV, ("odm_sw_ant_div_check_before_link(): Single antenna\n"));
-					p_dm->dm_swat_table.single_ant_counter++;
+					PHYDM_DBG(dm, DBG_ANT_DIV, "%s: Single antenna\n", __func__);
+					dm->dm_swat_table.single_ant_counter++;
 				}
 			}
-			/* PHYDM_DBG(p_dm,DBG_ANT_DIV, ("is_result=(( %d ))\n",p_dm->dm_swat_table.rssi_ant_dect_result)); */
-			PHYDM_DBG(p_dm, DBG_ANT_DIV, ("dual_ant_counter = (( %d )), single_ant_counter = (( %d )) , retry_counter = (( %d )) , aux_fail_detec_counter = (( %d ))\n\n\n",
-				p_dm->dm_swat_table.dual_ant_counter, p_dm->dm_swat_table.single_ant_counter, p_dm->dm_swat_table.retry_counter, p_dm->dm_swat_table.aux_fail_detec_counter));
-
-			/* 2 recover the antenna setting */
-
-			if (p_dm->dm_swat_table.ANTB_ON == false)
-				odm_set_bb_reg(p_dm, REG_S0_S1_PATH_SWITCH, 0xfff, (p_dm_swat_table->swas_no_link_bk_reg948));
-
-			PHYDM_DBG(p_dm, DBG_ANT_DIV, ("is_result=(( %d )), Recover  Reg[948]= (( %x ))\n\n", p_dm->dm_swat_table.rssi_ant_dect_result, p_dm_swat_table->swas_no_link_bk_reg948));
-
-
+#if 0
+			/* PHYDM_DBG(dm,DBG_ANT_DIV, "is_result=(( %d ))\n",dm->dm_swat_table.rssi_ant_dect_result); */
+#endif
+			PHYDM_DBG(dm, DBG_ANT_DIV,
+				  "dual_ant_counter = (( %d )), single_ant_counter = (( %d )) , retry_counter = (( %d )) , aux_fail_detec_counter = (( %d ))\n\n\n",
+				  dm->dm_swat_table.dual_ant_counter,
+				  dm->dm_swat_table.single_ant_counter,
+				  dm->dm_swat_table.retry_counter,
+				  dm->dm_swat_table.aux_fail_detec_counter);
+
+			/* @2 recover the antenna setting */
+
+			if (dm->dm_swat_table.ANTB_ON == false)
+				odm_set_bb_reg(dm, REG_S0_S1_PATH_SWITCH, 0xfff, (dm_swat_table->swas_no_link_bk_reg948));
+
+			PHYDM_DBG(dm, DBG_ANT_DIV,
+				  "is_result=(( %d )), Recover  Reg[948]= (( %x ))\n\n",
+				  dm->dm_swat_table.rssi_ant_dect_result,
+				  dm_swat_table->swas_no_link_bk_reg948);
 		}
 
-		/* Check state reset to default and wait for next time. */
-		p_dm_swat_table->swas_no_link_state = 0;
-		p_mgnt_info->bScanAntDetect = false;
+		/* @Check state reset to default and wait for next time. */
+		dm_swat_table->swas_no_link_state = 0;
+		mgnt_info->bScanAntDetect = false;
 
 		return false;
 	}
 
 #else
-	return	false;
+	return false;
 #endif
 
 	return false;
 }
 
-
-
-
-
-
-/* 1 [3. PSD method] ========================================================== */
-void
-odm_single_dual_antenna_detection_psd(
-	void	*p_dm_void
-)
+/* @1 [3. PSD method] ========================================================== */
+void odm_single_dual_antenna_detection_psd(
+	void *dm_void)
 {
-	struct PHY_DM_STRUCT		*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	u32	channel_ori;
-	u8	initial_gain = 0x36;
-	u8	tone_idx;
-	u8	tone_lenth_1 = 7, tone_lenth_2 = 4;
-	u16	tone_idx_1[7] = {88, 104, 120, 8, 24, 40, 56};
-	u16	tone_idx_2[4] = {8, 24, 40, 56};
-	u32	psd_report_main[11] = {0}, psd_report_aux[11] = {0};
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	u32 channel_ori;
+	u8 initial_gain = 0x36;
+	u8 tone_idx;
+	u8 tone_lenth_1 = 7, tone_lenth_2 = 4;
+	u16 tone_idx_1[7] = {88, 104, 120, 8, 24, 40, 56};
+	u16 tone_idx_2[4] = {8, 24, 40, 56};
+	u32 psd_report_main[11] = {0}, psd_report_aux[11] = {0};
 	/* u8	tone_lenth_1=4, tone_lenth_2=2; */
 	/* u16	tone_idx_1[4]={88, 120, 24, 56}; */
 	/* u16	tone_idx_2[2]={ 24,  56}; */
 	/* u32	psd_report_main[6]={0}, psd_report_aux[6]={0}; */
 
-	u32	PSD_report_temp, max_psd_report_main = 0, max_psd_report_aux = 0;
-	u32	PSD_power_threshold;
-	u32	main_psd_result = 0, aux_psd_result = 0;
-	u32	regc50, reg948, regb2c, regc14, reg908;
-	u32	i = 0, test_num = 8;
+	u32 PSD_report_temp, max_psd_report_main = 0, max_psd_report_aux = 0;
+	u32 PSD_power_threshold;
+	u32 main_psd_result = 0, aux_psd_result = 0;
+	u32 regc50, reg948, regb2c, regc14, reg908;
+	u32 i = 0, test_num = 8;
 
-
-	if (p_dm->support_ic_type != ODM_RTL8723B)
+	if (dm->support_ic_type != ODM_RTL8723B)
 		return;
 
-	PHYDM_DBG(p_dm, DBG_ANT_DIV, ("odm_single_dual_antenna_detection_psd()============>\n"));
+	PHYDM_DBG(dm, DBG_ANT_DIV, "%s============>\n", __func__);
 
-	/* 2 [ Backup Current RF/BB Settings ] */
+	/* @2 [ Backup Current RF/BB Settings ] */
 
-	channel_ori = odm_get_rf_reg(p_dm, RF_PATH_A, ODM_CHANNEL, RFREGOFFSETMASK);
-	reg948 = odm_get_bb_reg(p_dm, REG_S0_S1_PATH_SWITCH, MASKDWORD);
-	regb2c =  odm_get_bb_reg(p_dm, REG_AGC_TABLE_SELECT, MASKDWORD);
-	regc50 = odm_get_bb_reg(p_dm, REG_OFDM_0_XA_AGC_CORE1, MASKDWORD);
-	regc14 = odm_get_bb_reg(p_dm, 0xc14, MASKDWORD);
-	reg908 = odm_get_bb_reg(p_dm, 0x908, MASKDWORD);
+	channel_ori = odm_get_rf_reg(dm, RF_PATH_A, ODM_CHANNEL, RFREGOFFSETMASK);
+	reg948 = odm_get_bb_reg(dm, REG_S0_S1_PATH_SWITCH, MASKDWORD);
+	regb2c = odm_get_bb_reg(dm, REG_AGC_TABLE_SELECT, MASKDWORD);
+	regc50 = odm_get_bb_reg(dm, REG_OFDM_0_XA_AGC_CORE1, MASKDWORD);
+	regc14 = odm_get_bb_reg(dm, R_0xc14, MASKDWORD);
+	reg908 = odm_get_bb_reg(dm, R_0x908, MASKDWORD);
 
-	/* 2 [ setting for doing PSD function (CH4)] */
-	odm_set_bb_reg(p_dm, REG_FPGA0_RFMOD, BIT(24), 0); /* disable whole CCK block */
-	odm_write_1byte(p_dm, REG_TXPAUSE, 0xFF); /* Turn off TX  ->  Pause TX Queue */
-	odm_set_bb_reg(p_dm, 0xC14, MASKDWORD, 0x0); /* [ Set IQK Matrix = 0 ] equivalent to [ Turn off CCA] */
+	/* @2 [ setting for doing PSD function (CH4)] */
+	odm_set_bb_reg(dm, REG_FPGA0_RFMOD, BIT(24), 0); /* @disable whole CCK block */
+	odm_write_1byte(dm, REG_TXPAUSE, 0xFF); /* Turn off TX  ->  Pause TX Queue */
+	odm_set_bb_reg(dm, R_0xc14, MASKDWORD, 0x0); /* @[ Set IQK Matrix = 0 ] equivalent to [ Turn off CCA] */
 
 	/* PHYTXON while loop */
-	odm_set_bb_reg(p_dm, 0x908, MASKDWORD, 0x803);
-	while (odm_get_bb_reg(p_dm, 0xdf4, BIT(6))) {
+	odm_set_bb_reg(dm, R_0x908, MASKDWORD, 0x803);
+	while (odm_get_bb_reg(dm, R_0xdf4, BIT(6))) {
 		i++;
 		if (i > 1000000) {
-			PHYDM_DBG(p_dm, DBG_ANT_DIV, ("Wait in %s() more than %d times!\n", __FUNCTION__, i));
+			PHYDM_DBG(dm, DBG_ANT_DIV,
+				  "Wait in %s() more than %d times!\n",
+				  __FUNCTION__, i);
 			break;
 		}
 	}
 
-	odm_set_bb_reg(p_dm, 0xc50, 0x7f, initial_gain);
-	odm_set_rf_reg(p_dm, RF_PATH_A, ODM_CHANNEL, 0x7ff, 0x04);     /* Set RF to CH4 & 40M */
-	odm_set_bb_reg(p_dm, REG_FPGA0_ANALOG_PARAMETER4, 0xf00000, 0xf);	/* 3 wire Disable    88c[23:20]=0xf */
-	odm_set_bb_reg(p_dm, REG_FPGA0_PSD_FUNCTION, BIT(14) | BIT15, 0x0);  /* 128 pt	 */ /* Set PSD 128 ptss */
+	odm_set_bb_reg(dm, R_0xc50, 0x7f, initial_gain);
+	odm_set_rf_reg(dm, RF_PATH_A, ODM_CHANNEL, 0x7ff, 0x04); /* Set RF to CH4 & 40M */
+	odm_set_bb_reg(dm, REG_FPGA0_ANALOG_PARAMETER4, 0xf00000, 0xf); /* @3 wire Disable    88c[23:20]=0xf */
+	odm_set_bb_reg(dm, REG_FPGA0_PSD_FUNCTION, BIT(14) | BIT15, 0x0); /* 128 pt	 */ /* Set PSD 128 ptss */
 	ODM_delay_us(3000);
 
+	/* @2 [ Doing PSD Function in (CH4)] */
 
-	/* 2 [ Doing PSD Function in (CH4)] */
-
-	/* Antenna A */
-	PHYDM_DBG(p_dm, DBG_ANT_DIV, ("Switch to Main-ant   (CH4)\n"));
-	odm_set_bb_reg(p_dm, 0x948, 0xfff, 0x200);
+	/* @Antenna A */
+	PHYDM_DBG(dm, DBG_ANT_DIV, "Switch to Main-ant   (CH4)\n");
+	odm_set_bb_reg(dm, R_0x948, 0xfff, 0x200);
 	ODM_delay_us(10);
-	PHYDM_DBG(p_dm, DBG_ANT_DIV, ("dbg\n"));
+	PHYDM_DBG(dm, DBG_ANT_DIV, "dbg\n");
 	for (i = 0; i < test_num; i++) {
 		for (tone_idx = 0; tone_idx < tone_lenth_1; tone_idx++) {
-			PSD_report_temp = phydm_get_psd_data(p_dm, tone_idx_1[tone_idx], initial_gain);
-			/* if(  PSD_report_temp>psd_report_main[tone_idx]  ) */
+			PSD_report_temp = phydm_get_psd_data(dm, tone_idx_1[tone_idx], initial_gain);
+			/* @if(  PSD_report_temp>psd_report_main[tone_idx]  ) */
 			psd_report_main[tone_idx] += PSD_report_temp;
 		}
 	}
-	/* Antenna B */
-	PHYDM_DBG(p_dm, DBG_ANT_DIV, ("Switch to Aux-ant   (CH4)\n"));
-	odm_set_bb_reg(p_dm, 0x948, 0xfff, 0x280);
+	/* @Antenna B */
+	PHYDM_DBG(dm, DBG_ANT_DIV, "Switch to Aux-ant   (CH4)\n");
+	odm_set_bb_reg(dm, R_0x948, 0xfff, 0x280);
 	ODM_delay_us(10);
 	for (i = 0; i < test_num; i++) {
 		for (tone_idx = 0; tone_idx < tone_lenth_1; tone_idx++) {
-			PSD_report_temp = phydm_get_psd_data(p_dm, tone_idx_1[tone_idx], initial_gain);
-			/* if(  PSD_report_temp>psd_report_aux[tone_idx]  ) */
+			PSD_report_temp = phydm_get_psd_data(dm, tone_idx_1[tone_idx], initial_gain);
+			/* @if(  PSD_report_temp>psd_report_aux[tone_idx]  ) */
 			psd_report_aux[tone_idx] += PSD_report_temp;
 		}
 	}
-	/* 2 [ Doing PSD Function in (CH8)] */
+	/* @2 [ Doing PSD Function in (CH8)] */
 
-	odm_set_bb_reg(p_dm, REG_FPGA0_ANALOG_PARAMETER4, 0xf00000, 0x0);	/* 3 wire enable    88c[23:20]=0x0 */
+	odm_set_bb_reg(dm, REG_FPGA0_ANALOG_PARAMETER4, 0xf00000, 0x0); /* @3 wire enable    88c[23:20]=0x0 */
 	ODM_delay_us(3000);
 
-	odm_set_bb_reg(p_dm, 0xc50, 0x7f, initial_gain);
-	odm_set_rf_reg(p_dm, RF_PATH_A, ODM_CHANNEL, 0x7ff, 0x04);     /* Set RF to CH8 & 40M */
+	odm_set_bb_reg(dm, R_0xc50, 0x7f, initial_gain);
+	odm_set_rf_reg(dm, RF_PATH_A, ODM_CHANNEL, 0x7ff, 0x04); /* Set RF to CH8 & 40M */
 
-	odm_set_bb_reg(p_dm, REG_FPGA0_ANALOG_PARAMETER4, 0xf00000, 0xf);	/* 3 wire Disable    88c[23:20]=0xf */
+	odm_set_bb_reg(dm, REG_FPGA0_ANALOG_PARAMETER4, 0xf00000, 0xf); /* @3 wire Disable    88c[23:20]=0xf */
 	ODM_delay_us(3000);
 
-	/* Antenna A */
-	PHYDM_DBG(p_dm, DBG_ANT_DIV, ("Switch to Main-ant   (CH8)\n"));
-	odm_set_bb_reg(p_dm, 0x948, 0xfff, 0x200);
+	/* @Antenna A */
+	PHYDM_DBG(dm, DBG_ANT_DIV, "Switch to Main-ant   (CH8)\n");
+	odm_set_bb_reg(dm, R_0x948, 0xfff, 0x200);
 	ODM_delay_us(10);
 
 	for (i = 0; i < test_num; i++) {
 		for (tone_idx = 0; tone_idx < tone_lenth_2; tone_idx++) {
-			PSD_report_temp = phydm_get_psd_data(p_dm, tone_idx_2[tone_idx], initial_gain);
-			/* if(  PSD_report_temp>psd_report_main[tone_idx]  ) */
+			PSD_report_temp = phydm_get_psd_data(dm, tone_idx_2[tone_idx], initial_gain);
+			/* @if(  PSD_report_temp>psd_report_main[tone_idx]  ) */
 			psd_report_main[tone_lenth_1 + tone_idx] += PSD_report_temp;
 		}
 	}
 
-	/* Antenna B */
-	PHYDM_DBG(p_dm, DBG_ANT_DIV, ("Switch to Aux-ant   (CH8)\n"));
-	odm_set_bb_reg(p_dm, 0x948, 0xfff, 0x280);
+	/* @Antenna B */
+	PHYDM_DBG(dm, DBG_ANT_DIV, "Switch to Aux-ant   (CH8)\n");
+	odm_set_bb_reg(dm, R_0x948, 0xfff, 0x280);
 	ODM_delay_us(10);
 
 	for (i = 0; i < test_num; i++) {
 		for (tone_idx = 0; tone_idx < tone_lenth_2; tone_idx++) {
-			PSD_report_temp = phydm_get_psd_data(p_dm, tone_idx_2[tone_idx], initial_gain);
-			/* if(  PSD_report_temp>psd_report_aux[tone_idx]  ) */
+			PSD_report_temp = phydm_get_psd_data(dm, tone_idx_2[tone_idx], initial_gain);
+			/* @if(  PSD_report_temp>psd_report_aux[tone_idx]  ) */
 			psd_report_aux[tone_lenth_1 + tone_idx] += PSD_report_temp;
 		}
 	}
 
-	/* 2 [ Calculate Result ] */
+	/* @2 [ Calculate Result ] */
 
-	PHYDM_DBG(p_dm, DBG_ANT_DIV, ("\nMain PSD Result: (ALL)\n"));
+	PHYDM_DBG(dm, DBG_ANT_DIV, "\nMain PSD Result: (ALL)\n");
 	for (tone_idx = 0; tone_idx < (tone_lenth_1 + tone_lenth_2); tone_idx++) {
-		PHYDM_DBG(p_dm, DBG_ANT_DIV, ("[Tone-%d]: %d,\n", (tone_idx + 1), psd_report_main[tone_idx]));
+		PHYDM_DBG(dm, DBG_ANT_DIV, "[Tone-%d]: %d,\n", (tone_idx + 1),
+			  psd_report_main[tone_idx]);
 		main_psd_result += psd_report_main[tone_idx];
 		if (psd_report_main[tone_idx] > max_psd_report_main)
 			max_psd_report_main = psd_report_main[tone_idx];
 	}
-	PHYDM_DBG(p_dm, DBG_ANT_DIV, ("--------------------------- \nTotal_Main= (( %d ))\n", main_psd_result));
-	PHYDM_DBG(p_dm, DBG_ANT_DIV, ("MAX_Main = (( %d ))\n", max_psd_report_main));
-
+	PHYDM_DBG(dm, DBG_ANT_DIV,
+		  "--------------------------- \nTotal_Main= (( %d ))\n",
+		  main_psd_result);
+	PHYDM_DBG(dm, DBG_ANT_DIV, "MAX_Main = (( %d ))\n",
+		  max_psd_report_main);
 
-	PHYDM_DBG(p_dm, DBG_ANT_DIV, ("\nAux PSD Result: (ALL)\n"));
+	PHYDM_DBG(dm, DBG_ANT_DIV, "\nAux PSD Result: (ALL)\n");
 	for (tone_idx = 0; tone_idx < (tone_lenth_1 + tone_lenth_2); tone_idx++) {
-		PHYDM_DBG(p_dm, DBG_ANT_DIV, ("[Tone-%d]: %d,\n", (tone_idx + 1), psd_report_aux[tone_idx]));
+		PHYDM_DBG(dm, DBG_ANT_DIV, "[Tone-%d]: %d,\n", (tone_idx + 1),
+			  psd_report_aux[tone_idx]);
 		aux_psd_result += psd_report_aux[tone_idx];
 		if (psd_report_aux[tone_idx] > max_psd_report_aux)
 			max_psd_report_aux = psd_report_aux[tone_idx];
 	}
-	PHYDM_DBG(p_dm, DBG_ANT_DIV, ("--------------------------- \nTotal_Aux= (( %d ))\n", aux_psd_result));
-	PHYDM_DBG(p_dm, DBG_ANT_DIV, ("MAX_Aux = (( %d ))\n\n", max_psd_report_aux));
-
-	/* main_psd_result=main_psd_result-max_psd_report_main; */
-	/* aux_psd_result=aux_psd_result-max_psd_report_aux; */
+	PHYDM_DBG(dm, DBG_ANT_DIV,
+		  "--------------------------- \nTotal_Aux= (( %d ))\n",
+		  aux_psd_result);
+	PHYDM_DBG(dm, DBG_ANT_DIV, "MAX_Aux = (( %d ))\n\n",
+		  max_psd_report_aux);
+
+	/* @main_psd_result=main_psd_result-max_psd_report_main; */
+	/* @aux_psd_result=aux_psd_result-max_psd_report_aux; */
 	PSD_power_threshold = (main_psd_result * 7) >> 3;
 
-	PHYDM_DBG(p_dm, DBG_ANT_DIV, ("[ Main_result, Aux_result ] = [ %d , %d ], PSD_power_threshold=(( %d ))\n", main_psd_result, aux_psd_result, PSD_power_threshold));
+	PHYDM_DBG(dm, DBG_ANT_DIV,
+		  "[ Main_result, Aux_result ] = [ %d , %d ], PSD_power_threshold=(( %d ))\n",
+		  main_psd_result, aux_psd_result, PSD_power_threshold);
 
-	/* 3 [ Dual Antenna ] */
+	/* @3 [ Dual Antenna ] */
 	if (aux_psd_result >= PSD_power_threshold) {
-		if (p_dm->dm_swat_table.ANTB_ON == false) {
-			p_dm->dm_swat_table.ANTA_ON = true;
-			p_dm->dm_swat_table.ANTB_ON = true;
+		if (dm->dm_swat_table.ANTB_ON == false) {
+			dm->dm_swat_table.ANTA_ON = true;
+			dm->dm_swat_table.ANTB_ON = true;
 		}
-		PHYDM_DBG(p_dm, DBG_ANT_DIV, ("odm_sw_ant_div_check_before_link(): Dual antenna\n"));
+		PHYDM_DBG(dm, DBG_ANT_DIV,
+			  "odm_sw_ant_div_check_before_link(): Dual antenna\n");
 
+#if 0
 		/* set bt coexDM from 1ant coexDM to 2ant coexDM */
-		/* bt_set_bt_coex_ant_num(p_adapter, BT_COEX_ANT_TYPE_DETECTED, 2); */
+		/* @bt_set_bt_coex_ant_num(adapter, BT_COEX_ANT_TYPE_DETECTED, 2); */
+#endif
 
-		/* Init antenna diversity */
-		p_dm->support_ability |= ODM_BB_ANT_DIV;
-		odm_ant_div_init(p_dm);
+		/* @Init antenna diversity */
+		dm->support_ability |= ODM_BB_ANT_DIV;
+		odm_ant_div_init(dm);
 	}
-	/* 3 [ Single Antenna ] */
+	/* @3 [ Single Antenna ] */
 	else {
-		if (p_dm->dm_swat_table.ANTB_ON == true) {
-			p_dm->dm_swat_table.ANTA_ON = true;
-			p_dm->dm_swat_table.ANTB_ON = false;
+		if (dm->dm_swat_table.ANTB_ON == true) {
+			dm->dm_swat_table.ANTA_ON = true;
+			dm->dm_swat_table.ANTB_ON = false;
 		}
-		PHYDM_DBG(p_dm, DBG_ANT_DIV, ("odm_sw_ant_div_check_before_link(): Single antenna\n"));
+		PHYDM_DBG(dm, DBG_ANT_DIV,
+			  "odm_sw_ant_div_check_before_link(): Single antenna\n");
 	}
 
-	/* 2 [ Recover all parameters ] */
+	/* @2 [ Recover all parameters ] */
 
-	odm_set_rf_reg(p_dm, RF_PATH_A, RF_CHNLBW, RFREGOFFSETMASK, channel_ori);
-	odm_set_bb_reg(p_dm, REG_FPGA0_ANALOG_PARAMETER4, 0xf00000, 0x0);	/* 3 wire enable    88c[23:20]=0x0 */
-	odm_set_bb_reg(p_dm, 0xc50, 0x7f, regc50);
+	odm_set_rf_reg(dm, RF_PATH_A, RF_CHNLBW, RFREGOFFSETMASK, channel_ori);
+	odm_set_bb_reg(dm, REG_FPGA0_ANALOG_PARAMETER4, 0xf00000, 0x0); /* @3 wire enable    88c[23:20]=0x0 */
+	odm_set_bb_reg(dm, R_0xc50, 0x7f, regc50);
 
-	odm_set_bb_reg(p_dm, REG_S0_S1_PATH_SWITCH, MASKDWORD, reg948);
-	odm_set_bb_reg(p_dm, REG_AGC_TABLE_SELECT, MASKDWORD, regb2c);
+	odm_set_bb_reg(dm, REG_S0_S1_PATH_SWITCH, MASKDWORD, reg948);
+	odm_set_bb_reg(dm, REG_AGC_TABLE_SELECT, MASKDWORD, regb2c);
 
-	odm_set_bb_reg(p_dm, REG_FPGA0_RFMOD, BIT(24), 1); /* enable whole CCK block */
-	odm_write_1byte(p_dm, REG_TXPAUSE, 0x0); /* Turn on TX	 */ /* Resume TX Queue */
-	odm_set_bb_reg(p_dm, 0xC14, MASKDWORD, regc14); /* [ Set IQK Matrix = 0 ] equivalent to [ Turn on CCA] */
-	odm_set_bb_reg(p_dm, 0x908, MASKDWORD, reg908);
+	odm_set_bb_reg(dm, REG_FPGA0_RFMOD, BIT(24), 1); /* @enable whole CCK block */
+	odm_write_1byte(dm, REG_TXPAUSE, 0x0); /* Turn on TX	 */ /* Resume TX Queue */
+	odm_set_bb_reg(dm, R_0xc14, MASKDWORD, regc14); /* @[ Set IQK Matrix = 0 ] equivalent to [ Turn on CCA] */
+	odm_set_bb_reg(dm, R_0x908, MASKDWORD, reg908);
 
 	return;
-
 }
 
-#endif
-void
-odm_sw_ant_detect_init(
-	void		*p_dm_void
-)
+void odm_sw_ant_detect_init(void *dm_void)
 {
-#if (defined(CONFIG_ANT_DETECTION))
 #if (RTL8723B_SUPPORT == 1)
 
-	struct PHY_DM_STRUCT		*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	struct _sw_antenna_switch_		*p_dm_swat_table = &p_dm->dm_swat_table;
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct sw_antenna_switch *dm_swat_table = &dm->dm_swat_table;
 
-	if (p_dm->support_ic_type != ODM_RTL8723B)
+	if (dm->support_ic_type != ODM_RTL8723B)
 		return;
 
-	/* p_dm_swat_table->pre_antenna = MAIN_ANT; */
-	/* p_dm_swat_table->cur_antenna = MAIN_ANT; */
-	p_dm_swat_table->swas_no_link_state = 0;
-	p_dm_swat_table->pre_aux_fail_detec = false;
-	p_dm_swat_table->swas_no_link_bk_reg948 = 0xff;
+	/* @dm_swat_table->pre_antenna = MAIN_ANT; */
+	/* @dm_swat_table->cur_antenna = MAIN_ANT; */
+	dm_swat_table->swas_no_link_state = 0;
+	dm_swat_table->pre_aux_fail_detec = false;
+	dm_swat_table->swas_no_link_bk_reg948 = 0xff;
 
-	#ifdef CONFIG_PSD_TOOL
-	phydm_psd_init(p_dm);
-	#endif
+#ifdef CONFIG_PSD_TOOL
+	phydm_psd_init(dm);
 #endif
 #endif
 }
+#endif
+
diff --git a/rtl8723DS/hal/phydm/phydm_antdect.h b/rtl8723DS/hal/phydm/phydm_antdect.h
index 74627fc..f7fc75f 100755..100644
--- a/rtl8723DS/hal/phydm/phydm_antdect.h
+++ b/rtl8723DS/hal/phydm/phydm_antdect.h
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2007 - 2017 Realtek Corporation.
+ * Copyright(c) 2007 - 2017  Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -8,83 +8,71 @@
  *
  * This program is distributed in the hope that it will be useful, but WITHOUT
  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  * more details.
  *
+ * The full GNU General Public License is included in this distribution in the
+ * file called LICENSE.
+ *
+ * Contact Information:
+ * wlanfae <wlanfae@realtek.com>
+ * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
+ * Hsinchu 300, Taiwan.
+ *
+ * Larry Finger <Larry.Finger@lwfinger.net>
+ *
  *****************************************************************************/
 
-#ifndef	__PHYDMANTDECT_H__
-#define    __PHYDMANTDECT_H__
+#ifndef __PHYDMANTDECT_H__
+#define __PHYDMANTDECT_H__
 
-#define ANTDECT_VERSION	"2.1"	/*2015.07.29 by YuChen*/
+#define ANTDECT_VERSION "2.1"
 
 #if (defined(CONFIG_ANT_DETECTION))
-/* #if( DM_ODM_SUPPORT_TYPE & (ODM_WIN |ODM_CE)) */
-/* ANT Test */
-#define		ANTTESTALL		0x00	/*ant A or B will be Testing*/
-#define		ANTTESTA		0x01	/*ant A will be Testing*/
-#define		ANTTESTB		0x02	/*ant B will be testing*/
-
-#define	MAX_ANTENNA_DETECTION_CNT	10
+/* @#if( DM_ODM_SUPPORT_TYPE & (ODM_WIN |ODM_CE)) */
+/* @ANT Test */
+#define ANTTESTALL 0x00 /*@ant A or B will be Testing*/
+#define ANTTESTA 0x01 /*@ant A will be Testing*/
+#define ANTTESTB 0x02 /*@ant B will be testing*/
 
+#define MAX_ANTENNA_DETECTION_CNT 10
 
 struct _ANT_DETECTED_INFO {
-	boolean			is_ant_detected;
-	u32			db_for_ant_a;
-	u32			db_for_ant_b;
-	u32			db_for_ant_o;
+	boolean is_ant_detected;
+	u32 db_for_ant_a;
+	u32 db_for_ant_b;
+	u32 db_for_ant_o;
 };
 
-
-enum dm_swas_e {
+enum dm_swas {
 	antenna_a = 1,
 	antenna_b = 2,
 	antenna_max = 3,
 };
 
+/* @1 [1. Single Tone method] =================================================== */
 
-
-/* 1 [1. Single Tone method] =================================================== */
-
-
-
-void
-odm_single_dual_antenna_default_setting(
-	void		*p_dm_void
-);
+void odm_single_dual_antenna_default_setting(
+	void *dm_void);
 
 boolean
 odm_single_dual_antenna_detection(
-	void		*p_dm_void,
-	u8			mode
-);
+	void *dm_void,
+	u8 mode);
 
-/* 1 [2. Scan AP RSSI method] ================================================== */
+/* @1 [2. Scan AP RSSI method] ================================================== */
 
-#define sw_ant_div_check_before_link	odm_sw_ant_div_check_before_link
+#define sw_ant_div_check_before_link odm_sw_ant_div_check_before_link
 
 boolean
 odm_sw_ant_div_check_before_link(
-	void		*p_dm_void
-);
-
-
-
+	void *dm_void);
 
-/* 1 [3. PSD method] ========================================================== */
+/* @1 [3. PSD method] ========================================================== */
 
+void odm_single_dual_antenna_detection_psd(
+	void *dm_void);
 
-void
-odm_single_dual_antenna_detection_psd(
-	void		*p_dm_void
-);
-
+void odm_sw_ant_detect_init(void *dm_void);
 #endif
-
-void
-odm_sw_ant_detect_init(
-	void		*p_dm_void
-);
-
-
 #endif
diff --git a/rtl8723DS/hal/phydm/phydm_antdiv.c b/rtl8723DS/hal/phydm/phydm_antdiv.c
index 0d21bdc..702406e 100755..100644
--- a/rtl8723DS/hal/phydm/phydm_antdiv.c
+++ b/rtl8723DS/hal/phydm/phydm_antdiv.c
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2007 - 2017 Realtek Corporation.
+ * Copyright(c) 2007 - 2017  Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -8,386 +8,473 @@
  *
  * This program is distributed in the hope that it will be useful, but WITHOUT
  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  * more details.
  *
+ * The full GNU General Public License is included in this distribution in the
+ * file called LICENSE.
+ *
+ * Contact Information:
+ * wlanfae <wlanfae@realtek.com>
+ * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
+ * Hsinchu 300, Taiwan.
+ *
+ * Larry Finger <Larry.Finger@lwfinger.net>
+ *
  *****************************************************************************/
 
-/* ************************************************************
+/*************************************************************
  * include files
- * ************************************************************ */
+ ************************************************************/
 
 #include "mp_precomp.h"
 #include "phydm_precomp.h"
 
-/* ******************************************************
- * when antenna test utility is on or some testing need to disable antenna diversity
- * call this function to disable all ODM related mechanisms which will switch antenna.
- * ****************************************************** */
-void
-odm_stop_antenna_switch_dm(
-	void			*p_dm_void
-)
+/*******************************************************
+ * when antenna test utility is on or some testing need to disable antenna
+ * diversity call this function to disable all ODM related mechanisms which
+ * will switch antenna.
+ *****************************************************
+ */
+#ifdef CONFIG_PHYDM_ANTENNA_DIVERSITY
+void odm_stop_antenna_switch_dm(void *dm_void)
 {
-	struct PHY_DM_STRUCT		*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	/* disable ODM antenna diversity */
-	p_dm->support_ability &= ~ODM_BB_ANT_DIV;
-	odm_ant_div_on_off(p_dm, ANTDIV_OFF);
-	odm_tx_by_tx_desc_or_reg(p_dm, TX_BY_REG);
-	PHYDM_DBG(p_dm, DBG_ANT_DIV, ("STOP Antenna Diversity\n"));
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct phydm_fat_struct *fat_tab = &dm->dm_fat_table;
+	/* @disable ODM antenna diversity */
+	dm->support_ability &= ~ODM_BB_ANT_DIV;
+	if (fat_tab->div_path_type == ANT_PATH_A)
+		odm_ant_div_on_off(dm, ANTDIV_OFF, ANT_PATH_A);
+	else if (fat_tab->div_path_type == ANT_PATH_B)
+		odm_ant_div_on_off(dm, ANTDIV_OFF, ANT_PATH_B);
+	else if (fat_tab->div_path_type == ANT_PATH_AB)
+		odm_ant_div_on_off(dm, ANTDIV_OFF, ANT_PATH_AB);
+	odm_tx_by_tx_desc_or_reg(dm, TX_BY_REG);
+	PHYDM_DBG(dm, DBG_ANT_DIV, "STOP Antenna Diversity\n");
 }
 
-void
-phydm_enable_antenna_diversity(
-	void			*p_dm_void
-)
+void phydm_enable_antenna_diversity(void *dm_void)
 {
-	struct PHY_DM_STRUCT		*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
 
-	p_dm->support_ability |= ODM_BB_ANT_DIV;
-	p_dm->antdiv_select = 0;
-	PHYDM_DBG(p_dm, DBG_ANT_DIV, ("AntDiv is enabled & Re-Init AntDiv\n"));
-	odm_antenna_diversity_init(p_dm);
+	dm->support_ability |= ODM_BB_ANT_DIV;
+	dm->antdiv_select = 0;
+	PHYDM_DBG(dm, DBG_ANT_DIV, "AntDiv is enabled & Re-Init AntDiv\n");
+	odm_antenna_diversity_init(dm);
 }
 
-void
-odm_set_ant_config(
-	void	*p_dm_void,
-	u8		ant_setting	/* 0=A, 1=B, 2=C, .... */
-)
+void odm_set_ant_config(void *dm_void, u8 ant_setting /* @0=A, 1=B, 2=C,...*/)
 {
-	struct PHY_DM_STRUCT		*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	if (p_dm->support_ic_type == ODM_RTL8723B) {
-		if (ant_setting == 0)		/* ant A*/
-			odm_set_bb_reg(p_dm, 0x948, MASKDWORD, 0x00000000);
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+
+	if (dm->support_ic_type == ODM_RTL8723B) {
+		if (ant_setting == 0) /* @ant A*/
+			odm_set_bb_reg(dm, R_0x948, MASKDWORD, 0x00000000);
 		else if (ant_setting == 1)
-			odm_set_bb_reg(p_dm, 0x948, MASKDWORD, 0x00000280);
-	} else if (p_dm->support_ic_type == ODM_RTL8723D) {
-		if (ant_setting == 0)		/* ant A*/
-			odm_set_bb_reg(p_dm, 0x948, MASKLWORD, 0x0000);
+			odm_set_bb_reg(dm, R_0x948, MASKDWORD, 0x00000280);
+	} else if (dm->support_ic_type == ODM_RTL8723D) {
+		if (ant_setting == 0) /* @ant A*/
+			odm_set_bb_reg(dm, R_0x948, MASKLWORD, 0x0000);
 		else if (ant_setting == 1)
-			odm_set_bb_reg(p_dm, 0x948, MASKLWORD, 0x0280);
+			odm_set_bb_reg(dm, R_0x948, MASKLWORD, 0x0280);
 	}
 }
 
 /* ****************************************************** */
 
-
-void
-odm_sw_ant_div_rest_after_link(
-	void		*p_dm_void
-)
+void odm_sw_ant_div_rest_after_link(void *dm_void)
 {
 #if (defined(CONFIG_PHYDM_ANTENNA_DIVERSITY))
-	struct PHY_DM_STRUCT		*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	struct _sw_antenna_switch_		*p_dm_swat_table = &p_dm->dm_swat_table;
-	struct phydm_fat_struct		*p_dm_fat_table = &p_dm->dm_fat_table;
-	u32	i;
-
-	if (p_dm->ant_div_type == S0S1_SW_ANTDIV) {
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct sw_antenna_switch *swat_tab = &dm->dm_swat_table;
+	struct phydm_fat_struct *fat_tab = &dm->dm_fat_table;
+	u32 i;
 
-		p_dm_swat_table->try_flag = SWAW_STEP_INIT;
-		p_dm_swat_table->rssi_trying = 0;
-		p_dm_swat_table->double_chk_flag = 0;
-		p_dm_fat_table->rx_idle_ant = MAIN_ANT;
+	if (dm->ant_div_type == S0S1_SW_ANTDIV) {
+		swat_tab->try_flag = SWAW_STEP_INIT;
+		swat_tab->rssi_trying = 0;
+		swat_tab->double_chk_flag = 0;
+		fat_tab->rx_idle_ant = MAIN_ANT;
 
 		for (i = 0; i < ODM_ASSOCIATE_ENTRY_NUM; i++)
-			phydm_antdiv_reset_statistic(p_dm, i);
+			phydm_antdiv_reset_statistic(dm, i);
 	}
-	
-#endif	
+
+#endif
 }
 
-void
-odm_ant_div_on_off(
-	void		*p_dm_void,
-	u8		swch
-)
+void phydm_n_on_off(void *dm_void, u8 swch, u8 path)
 {
-	struct PHY_DM_STRUCT		*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	struct phydm_fat_struct	*p_dm_fat_table = &p_dm->dm_fat_table;
-
-	if (p_dm_fat_table->ant_div_on_off != swch) {
-		if (p_dm->ant_div_type == S0S1_SW_ANTDIV)
-			return;
-
-		if (p_dm->support_ic_type & ODM_N_ANTDIV_SUPPORT) {
-			PHYDM_DBG(p_dm, DBG_ANT_DIV, ("(( Turn %s )) N-Series HW-AntDiv block\n", (swch == ANTDIV_ON) ? "ON" : "OFF"));
-			odm_set_bb_reg(p_dm, 0xc50, BIT(7), swch);
-			odm_set_bb_reg(p_dm, 0xa00, BIT(15), swch);
-
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct phydm_fat_struct *fat_tab = &dm->dm_fat_table;
+
+	if (path == ANT_PATH_A) {
+		odm_set_bb_reg(dm, R_0xc50, BIT(7), swch);
+	} else if (path == ANT_PATH_B) {
+		odm_set_bb_reg(dm, R_0xc58, BIT(7), swch);
+	} else if (path == ANT_PATH_AB) {
+		odm_set_bb_reg(dm, R_0xc50, BIT(7), swch);
+		odm_set_bb_reg(dm, R_0xc58, BIT(7), swch);
+	}
+	odm_set_bb_reg(dm, R_0xa00, BIT(15), swch);
 #if (RTL8723D_SUPPORT == 1)
-			/*Mingzhi 2017-05-08*/
-			if (p_dm->support_ic_type == ODM_RTL8723D) {
-				if (swch == ANTDIV_ON) {
-					odm_set_bb_reg(p_dm, 0xce0, BIT(1), 1);
-					odm_set_bb_reg(p_dm, 0x948, BIT(6), 1);          /*1:HW ctrl  0:SW ctrl*/
-					}
-				else{
-					odm_set_bb_reg(p_dm, 0xce0, BIT(1), 0);
-					odm_set_bb_reg(p_dm, 0x948, BIT(6), 0);          /*1:HW ctrl  0:SW ctrl*/
-				}
-			}			
+	/*@Mingzhi 2017-05-08*/
+	if (dm->support_ic_type == ODM_RTL8723D) {
+		if (swch == ANTDIV_ON) {
+			odm_set_bb_reg(dm, R_0xce0, BIT(1), 1);
+			odm_set_bb_reg(dm, R_0x948, BIT(6), 1);
+			/*@1:HW ctrl  0:SW ctrl*/
+		} else {
+			odm_set_bb_reg(dm, R_0xce0, BIT(1), 0);
+			odm_set_bb_reg(dm, R_0x948, BIT(6), 0);
+			/*@1:HW ctrl  0:SW ctrl*/
+		}
+	}
 #endif
+}
 
-		} else if (p_dm->support_ic_type & ODM_AC_ANTDIV_SUPPORT) {
-			PHYDM_DBG(p_dm, DBG_ANT_DIV, ("(( Turn %s )) AC-Series HW-AntDiv block\n", (swch == ANTDIV_ON) ? "ON" : "OFF"));
-			if (p_dm->support_ic_type & ODM_RTL8812) {
-				odm_set_bb_reg(p_dm, 0xc50, BIT(7), swch); /* OFDM AntDiv function block enable */
-				odm_set_bb_reg(p_dm, 0xa00, BIT(15), swch); /* CCK AntDiv function block enable */
-			} else {
-				odm_set_bb_reg(p_dm, 0x8D4, BIT(24), swch); /* OFDM AntDiv function block enable */
-
-				if ((p_dm->cut_version >= ODM_CUT_C) && (p_dm->support_ic_type == ODM_RTL8821) && (p_dm->ant_div_type != S0S1_SW_ANTDIV)) {
-					PHYDM_DBG(p_dm, DBG_ANT_DIV, ("(( Turn %s )) CCK HW-AntDiv block\n", (swch == ANTDIV_ON) ? "ON" : "OFF"));
-					odm_set_bb_reg(p_dm, 0x800, BIT(25), swch);
-					odm_set_bb_reg(p_dm, 0xA00, BIT(15), swch); /* CCK AntDiv function block enable */
-				} else if (p_dm->support_ic_type == ODM_RTL8821C) {
-					PHYDM_DBG(p_dm, DBG_ANT_DIV, ("(( Turn %s )) CCK HW-AntDiv block\n", (swch == ANTDIV_ON) ? "ON" : "OFF"));
-					odm_set_bb_reg(p_dm, 0x800, BIT(25), swch);
-					odm_set_bb_reg(p_dm, 0xA00, BIT(15), swch); /* CCK AntDiv function block enable */
-				}
-			}
+void phydm_ac_on_off(void *dm_void, u8 swch, u8 path)
+{
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct phydm_fat_struct *fat_tab = &dm->dm_fat_table;
+
+	if (dm->support_ic_type & ODM_RTL8812) {
+		odm_set_bb_reg(dm, R_0xc50, BIT(7), swch);
+		/* OFDM AntDiv function block enable */
+		odm_set_bb_reg(dm, R_0xa00, BIT(15), swch);
+		/* @CCK AntDiv function block enable */
+	} else if (dm->support_ic_type & ODM_RTL8822B) {
+		odm_set_bb_reg(dm, R_0x800, BIT(25), swch);
+		odm_set_bb_reg(dm, R_0xa00, BIT(15), swch);
+		if (path == ANT_PATH_A) {
+			odm_set_bb_reg(dm, R_0xc50, BIT(7), swch);
+		} else if (path == ANT_PATH_B) {
+			odm_set_bb_reg(dm, R_0xe50, BIT(7), swch);
+		} else if (path == ANT_PATH_AB) {
+			odm_set_bb_reg(dm, R_0xc50, BIT(7), swch);
+			odm_set_bb_reg(dm, R_0xe50, BIT(7), swch);
+		}
+	} else {
+		odm_set_bb_reg(dm, R_0x8d4, BIT(24), swch);
+		/* OFDM AntDiv function block enable */
+
+		if (dm->cut_version >= ODM_CUT_C &&
+		    dm->support_ic_type == ODM_RTL8821 &&
+		    dm->ant_div_type != S0S1_SW_ANTDIV) {
+			PHYDM_DBG(dm, DBG_ANT_DIV, "(Turn %s) CCK HW-AntDiv\n",
+				  (swch == ANTDIV_ON) ? "ON" : "OFF");
+			odm_set_bb_reg(dm, R_0x800, BIT(25), swch);
+			odm_set_bb_reg(dm, R_0xa00, BIT(15), swch);
+			/* @CCK AntDiv function block enable */
+		} else if (dm->support_ic_type == ODM_RTL8821C) {
+			PHYDM_DBG(dm, DBG_ANT_DIV, "(Turn %s) CCK HW-AntDiv\n",
+				  (swch == ANTDIV_ON) ? "ON" : "OFF");
+			odm_set_bb_reg(dm, R_0x800, BIT(25), swch);
+			odm_set_bb_reg(dm, R_0xa00, BIT(15), swch);
+			/* @CCK AntDiv function block enable */
 		}
 	}
-	p_dm_fat_table->ant_div_on_off = swch;
+}
+
+void odm_ant_div_on_off(void *dm_void, u8 swch, u8 path)
+{
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct phydm_fat_struct *fat_tab = &dm->dm_fat_table;
 
+	if (fat_tab->ant_div_on_off != swch) {
+		if (dm->ant_div_type == S0S1_SW_ANTDIV)
+			return;
+
+		if (dm->support_ic_type & ODM_N_ANTDIV_SUPPORT) {
+			PHYDM_DBG(dm, DBG_ANT_DIV,
+				  "(( Turn %s )) N-Series HW-AntDiv block\n",
+				  (swch == ANTDIV_ON) ? "ON" : "OFF");
+			phydm_n_on_off(dm, swch, path);
+
+		} else if (dm->support_ic_type & ODM_AC_ANTDIV_SUPPORT) {
+			PHYDM_DBG(dm, DBG_ANT_DIV,
+				  "(( Turn %s )) AC-Series HW-AntDiv block\n",
+				  (swch == ANTDIV_ON) ? "ON" : "OFF");
+			phydm_ac_on_off(dm, swch, path);
+		}
+	}
+	fat_tab->ant_div_on_off = swch;
 }
 
-void
-odm_tx_by_tx_desc_or_reg(
-	void		*p_dm_void,
-	u8			swch
-)
+void odm_tx_by_tx_desc_or_reg(void *dm_void, u8 swch)
 {
-	struct PHY_DM_STRUCT		*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	struct phydm_fat_struct	*p_dm_fat_table = &p_dm->dm_fat_table;
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct phydm_fat_struct *fat_tab = &dm->dm_fat_table;
 	u8 enable;
 
-	if (p_dm_fat_table->b_fix_tx_ant == NO_FIX_TX_ANT)
+	if (fat_tab->b_fix_tx_ant == NO_FIX_TX_ANT)
 		enable = (swch == TX_BY_DESC) ? 1 : 0;
 	else
-		enable = 0;/*Force TX by Reg*/
+		enable = 0; /*@Force TX by Reg*/
 
-	if (p_dm->ant_div_type != CGCS_RX_HW_ANTDIV) {
-		if (p_dm->support_ic_type & ODM_N_ANTDIV_SUPPORT)
-			odm_set_bb_reg(p_dm, 0x80c, BIT(21), enable);
-		else if (p_dm->support_ic_type & ODM_AC_ANTDIV_SUPPORT)
-			odm_set_bb_reg(p_dm, 0x900, BIT(18), enable);
+	if (dm->ant_div_type != CGCS_RX_HW_ANTDIV) {
+		if (dm->support_ic_type & ODM_N_ANTDIV_SUPPORT)
+			odm_set_bb_reg(dm, R_0x80c, BIT(21), enable);
+		else if (dm->support_ic_type & ODM_AC_ANTDIV_SUPPORT)
+			odm_set_bb_reg(dm, R_0x900, BIT(18), enable);
 
-		PHYDM_DBG(p_dm, DBG_ANT_DIV, ("[AntDiv] TX_Ant_BY (( %s ))\n", (enable == TX_BY_DESC) ? "DESC" : "REG"));
+		PHYDM_DBG(dm, DBG_ANT_DIV, "[AntDiv] TX_Ant_BY (( %s ))\n",
+			  (enable == TX_BY_DESC) ? "DESC" : "REG");
 	}
 }
 
-#if (defined(CONFIG_PHYDM_ANTENNA_DIVERSITY))
-void
-phydm_antdiv_reset_statistic(
-	void	*p_dm_void,
-	u32	macid
-)
+void phydm_antdiv_reset_statistic(void *dm_void, u32 macid)
 {
-	struct PHY_DM_STRUCT	*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	struct phydm_fat_struct		*p_dm_fat_table = &p_dm->dm_fat_table;
-
-	p_dm_fat_table->main_ant_sum[macid] = 0;
-	p_dm_fat_table->aux_ant_sum[macid] = 0;
-	p_dm_fat_table->main_ant_cnt[macid] = 0;
-	p_dm_fat_table->aux_ant_cnt[macid] = 0;
-	p_dm_fat_table->main_ant_sum_cck[macid] = 0;
-	p_dm_fat_table->aux_ant_sum_cck[macid] = 0;
-	p_dm_fat_table->main_ant_cnt_cck[macid] = 0;
-	p_dm_fat_table->aux_ant_cnt_cck[macid] = 0;
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct phydm_fat_struct *fat_tab = &dm->dm_fat_table;
+
+	fat_tab->main_sum[macid] = 0;
+	fat_tab->aux_sum[macid] = 0;
+	fat_tab->main_cnt[macid] = 0;
+	fat_tab->aux_cnt[macid] = 0;
+	fat_tab->main_sum_cck[macid] = 0;
+	fat_tab->aux_sum_cck[macid] = 0;
+	fat_tab->main_cnt_cck[macid] = 0;
+	fat_tab->aux_cnt_cck[macid] = 0;
 }
 
-void
-phydm_fast_training_enable(
-	void		*p_dm_void,
-	u8			swch
-)
+void phydm_fast_training_enable(void *dm_void, u8 swch)
 {
-	struct PHY_DM_STRUCT		*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	u8			enable;
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	u8 enable;
 
 	if (swch == FAT_ON)
 		enable = 1;
 	else
 		enable = 0;
 
-	PHYDM_DBG(p_dm, DBG_ANT_DIV, ("Fast ant Training_en = ((%d))\n", enable));
-
-	if (p_dm->support_ic_type == ODM_RTL8188E) {
-		odm_set_bb_reg(p_dm, 0xe08, BIT(16), enable);	/*enable fast training*/
-		/**/
-	} else if (p_dm->support_ic_type == ODM_RTL8192E) {
-		odm_set_bb_reg(p_dm, 0xB34, BIT(28), enable);	/*enable fast training (path-A)*/
-		/*odm_set_bb_reg(p_dm, 0xB34, BIT(29), enable);*/	/*enable fast training (path-B)*/
-	} else if (p_dm->support_ic_type & (ODM_RTL8821 | ODM_RTL8822B)) {
-		odm_set_bb_reg(p_dm, 0x900, BIT(19), enable);	/*enable fast training */
-		/**/
+	PHYDM_DBG(dm, DBG_ANT_DIV, "Fast ant Training_en = ((%d))\n", enable);
+
+	if (dm->support_ic_type == ODM_RTL8188E) {
+		odm_set_bb_reg(dm, R_0xe08, BIT(16), enable);
+			/*@enable fast training*/
+	} else if (dm->support_ic_type == ODM_RTL8192E) {
+		odm_set_bb_reg(dm, R_0xb34, BIT(28), enable);
+			/*@enable fast training (path-A)*/
+#if 0
+		odm_set_bb_reg(dm, R_0xb34, BIT(29), enable);
+			/*enable fast training (path-B)*/
+#endif
+	} else if (dm->support_ic_type & (ODM_RTL8821 | ODM_RTL8822B)) {
+		odm_set_bb_reg(dm, R_0x900, BIT(19), enable);
+			/*@enable fast training */
 	}
 }
 
-void
-phydm_keep_rx_ack_ant_by_tx_ant_time(
-	void		*p_dm_void,
-	u32		time
-)
+void phydm_keep_rx_ack_ant_by_tx_ant_time(void *dm_void, u32 time)
 {
-	struct PHY_DM_STRUCT		*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
 
 	/* Timming issue: keep Rx ant after tx for ACK ( time x 3.2 mu sec)*/
-	if (p_dm->support_ic_type & ODM_N_ANTDIV_SUPPORT) {
+	if (dm->support_ic_type & ODM_N_ANTDIV_SUPPORT)
+		odm_set_bb_reg(dm, R_0xe20, 0xf00000, time);
+	else if (dm->support_ic_type & ODM_AC_ANTDIV_SUPPORT)
+		odm_set_bb_reg(dm, R_0x818, 0xf00000, time);
+}
+
+void phydm_update_rx_idle_ac(void *dm_void, u8 ant, u32 default_ant,
+			     u32 optional_ant, u32 default_tx_ant)
+{
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+
+	u16 value16 = odm_read_2byte(dm, ODM_REG_TRMUX_11AC + 2);
+	/* @2014/01/14 MH/Luke.Lee Add direct write for register 0xc0a to  */
+	/* @prevnt incorrect 0xc08 bit0-15.We still not know why it is changed*/
+	value16 &= ~(BIT(11) | BIT(10) | BIT(9) | BIT(8) | BIT(7) | BIT(6) |
+		   BIT(5) | BIT(4) | BIT(3));
+	value16 |= ((u16)default_ant << 3);
+	value16 |= ((u16)optional_ant << 6);
+	value16 |= ((u16)default_tx_ant << 9);
+	odm_write_2byte(dm, ODM_REG_TRMUX_11AC + 2, value16);
+#if 0
+	odm_set_bb_reg(dm, ODM_REG_TRMUX_11AC, 0x380000, default_ant);
+		/* @Default RX */
+	odm_set_bb_reg(dm, ODM_REG_TRMUX_11AC, 0x1c00000, optional_ant);
+		/* Optional RX */
+	odm_set_bb_reg(dm, ODM_REG_TRMUX_11AC, 0xe000000, default_ant);
+		/* @Default TX */
+#endif
+}
+
+void phydm_update_rx_idle_n(void *dm_void, u8 ant, u32 default_ant,
+			    u32 optional_ant, u32 default_tx_ant)
+{
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	u32 value32;
+
+	if (dm->support_ic_type & (ODM_RTL8192E | ODM_RTL8197F)) {
+		odm_set_bb_reg(dm, R_0xb38, 0x38, default_ant);
+			/* @Default RX */
+		odm_set_bb_reg(dm, R_0xb38, 0x1c0, optional_ant);
+			/* Optional RX */
+		odm_set_bb_reg(dm, R_0x860, 0x7000, default_ant);
+			/* @Default TX */
+#if (RTL8723B_SUPPORT == 1)
+	} else if (dm->support_ic_type == ODM_RTL8723B) {
+		value32 = odm_get_bb_reg(dm, R_0x948, 0xFFF);
+
+		if (value32 != 0x280)
+			odm_update_rx_idle_ant_8723b(dm, ant, default_ant,
+						     optional_ant);
+		else
+			PHYDM_DBG(dm, DBG_ANT_DIV,
+				  "[ Update Rx-Idle-ant ] 8723B: Fail to set RX antenna due to 0x948 = 0x280\n");
+#endif
+
+#if (RTL8723D_SUPPORT == 1) /*@Mingzhi 2017-05-08*/
+	} else if (dm->support_ic_type == ODM_RTL8723D) {
+		phydm_set_tx_ant_pwr_8723d(dm, ant);
+		odm_update_rx_idle_ant_8723d(dm, ant, default_ant,
+					     optional_ant);
+#endif
 
-		odm_set_bb_reg(p_dm, 0xE20, BIT(23) | BIT(22) | BIT(21) | BIT(20), time);
-		/**/
-	} else if (p_dm->support_ic_type & ODM_AC_ANTDIV_SUPPORT) {
+/*#if (RTL8721D_SUPPORT == 1)*/
+/*	} else if (dm->support_ic_type == ODM_RTL8721D) {*/
+/*		odm_update_rx_idle_ant_8721d(dm, ant, default_ant, */
+/*						   optional_ant);*/
+/*#endif*/
+	} else {
+/*@8188E & 8188F*/
+/*@		if (dm->support_ic_type == ODM_RTL8723D) {*/
+/*#if (RTL8723D_SUPPORT == 1)*/
+/*			phydm_set_tx_ant_pwr_8723d(dm, ant);*/
+/*#endif*/
+/*		}*/
+#if (RTL8188F_SUPPORT == 1)
+		if (dm->support_ic_type == ODM_RTL8188F)
+			phydm_update_rx_idle_antenna_8188F(dm, default_ant);
+#endif
 
-		odm_set_bb_reg(p_dm, 0x818, BIT(23) | BIT(22) | BIT(21) | BIT(20), time);
-		/**/
+		odm_set_bb_reg(dm, R_0x864, 0x38, default_ant);/*@Default RX*/
+		odm_set_bb_reg(dm, R_0x864, 0x1c0, optional_ant);
+			/*Optional RX*/
+		odm_set_bb_reg(dm, R_0x860, 0x7000, default_tx_ant);
+			/*@Default TX*/
 	}
 }
 
-void
-odm_update_rx_idle_ant(
-	void		*p_dm_void,
-	u8		ant
-)
+void odm_update_rx_idle_ant(void *dm_void, u8 ant)
 {
-	struct PHY_DM_STRUCT		*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	struct phydm_fat_struct			*p_dm_fat_table = &p_dm->dm_fat_table;
-	u32			default_ant, optional_ant, value32, default_tx_ant;
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct phydm_fat_struct *fat_tab = &dm->dm_fat_table;
+	u32 default_ant, optional_ant, value32, default_tx_ant;
 
-	if (p_dm_fat_table->rx_idle_ant != ant) {
-		PHYDM_DBG(p_dm, DBG_ANT_DIV, ("[ Update Rx-Idle-ant ] rx_idle_ant =%s\n", (ant == MAIN_ANT) ? "MAIN_ANT" : "AUX_ANT"));
+	if (fat_tab->rx_idle_ant != ant) {
+		PHYDM_DBG(dm, DBG_ANT_DIV,
+			  "[ Update Rx-Idle-ant ] rx_idle_ant =%s\n",
+			  (ant == MAIN_ANT) ? "MAIN_ANT" : "AUX_ANT");
 
-		if (!(p_dm->support_ic_type & ODM_RTL8723B))
-			p_dm_fat_table->rx_idle_ant = ant;
+		if (!(dm->support_ic_type & ODM_RTL8723B))
+			fat_tab->rx_idle_ant = ant;
 
 		if (ant == MAIN_ANT) {
-			default_ant   =  ANT1_2G;
-			optional_ant =  ANT2_2G;
+			default_ant = ANT1_2G;
+			optional_ant = ANT2_2G;
 		} else {
-			default_ant  =   ANT2_2G;
-			optional_ant =  ANT1_2G;
+			default_ant = ANT2_2G;
+			optional_ant = ANT1_2G;
 		}
 
-		if (p_dm_fat_table->b_fix_tx_ant != NO_FIX_TX_ANT)
-			default_tx_ant = (p_dm_fat_table->b_fix_tx_ant == FIX_TX_AT_MAIN) ? 0 : 1;
+		if (fat_tab->b_fix_tx_ant != NO_FIX_TX_ANT)
+			default_tx_ant = (fat_tab->b_fix_tx_ant ==
+					 FIX_TX_AT_MAIN) ? 0 : 1;
 		else
 			default_tx_ant = default_ant;
 
-		if (p_dm->support_ic_type & ODM_N_ANTDIV_SUPPORT) {
-			if (p_dm->support_ic_type == ODM_RTL8192E) {
-				odm_set_bb_reg(p_dm, 0xB38, BIT(5) | BIT(4) | BIT(3), default_ant); /* Default RX */
-				odm_set_bb_reg(p_dm, 0xB38, BIT(8) | BIT(7) | BIT(6), optional_ant); /* Optional RX */
-				odm_set_bb_reg(p_dm, 0x860, BIT(14) | BIT(13) | BIT(12), default_ant); /* Default TX */
-			}
-#if (RTL8723B_SUPPORT == 1)
-			else if (p_dm->support_ic_type == ODM_RTL8723B) {
-
-				value32 = odm_get_bb_reg(p_dm, 0x948, 0xFFF);
-
-				if (value32 != 0x280)
-					odm_update_rx_idle_ant_8723b(p_dm, ant, default_ant, optional_ant);
-				else
-					PHYDM_DBG(p_dm, DBG_ANT_DIV, ("[ Update Rx-Idle-ant ] 8723B: Fail to set RX antenna due to 0x948 = 0x280\n"));
-			}
-#endif
-
-#if (RTL8723D_SUPPORT == 1)         /*Mingzhi 2017-05-08*/
-			else if (p_dm->support_ic_type == ODM_RTL8723D) {
-					phydm_set_tx_ant_pwr_8723d(p_dm, ant);
-					odm_update_rx_idle_ant_8723d(p_dm, ant, default_ant, optional_ant);
-
-			}
-#endif
-
-			else { /*8188E & 8188F*/
-/*
-				if (p_dm->support_ic_type == ODM_RTL8723D) {
-#if (RTL8723D_SUPPORT == 1)
-					phydm_set_tx_ant_pwr_8723d(p_dm, ant);
-#endif
-				}
-*/
-#if (RTL8188F_SUPPORT == 1)
-				if (p_dm->support_ic_type == ODM_RTL8188F) {
-					phydm_update_rx_idle_antenna_8188F(p_dm, default_ant);
-					/**/
-				}
-#endif
-
-				odm_set_bb_reg(p_dm, 0x864, BIT(5) | BIT(4) | BIT(3), default_ant);		/*Default RX*/
-				odm_set_bb_reg(p_dm, 0x864, BIT(8) | BIT(7) | BIT(6), optional_ant);	/*Optional RX*/
-				odm_set_bb_reg(p_dm, 0x860, BIT(14) | BIT(13) | BIT(12), default_tx_ant);	/*Default TX*/
-			}
-		} else if (p_dm->support_ic_type & ODM_AC_ANTDIV_SUPPORT) {
-			u16	value16 = odm_read_2byte(p_dm, ODM_REG_TRMUX_11AC + 2);
-			/*  */
-			/* 2014/01/14 MH/Luke.Lee Add direct write for register 0xc0a to prevnt */
-			/* incorrect 0xc08 bit0-15 .We still not know why it is changed. */
-			/*  */
-			value16 &= ~(BIT(11) | BIT(10) | BIT(9) | BIT(8) | BIT(7) | BIT(6) | BIT(5) | BIT(4) | BIT(3));
-			value16 |= ((u16)default_ant << 3);
-			value16 |= ((u16)optional_ant << 6);
-			value16 |= ((u16)default_ant << 9);
-			odm_write_2byte(p_dm, ODM_REG_TRMUX_11AC + 2, value16);
-#if 0
-			odm_set_bb_reg(p_dm, ODM_REG_TRMUX_11AC, BIT(21) | BIT20 | BIT19, default_ant);	 /* Default RX */
-			odm_set_bb_reg(p_dm, ODM_REG_TRMUX_11AC, BIT(24) | BIT23 | BIT22, optional_ant); /* Optional RX */
-			odm_set_bb_reg(p_dm, ODM_REG_TRMUX_11AC, BIT(27) | BIT26 | BIT25, default_ant);	 /* Default TX */
-#endif
+		if (dm->support_ic_type & ODM_N_ANTDIV_SUPPORT) {
+			phydm_update_rx_idle_n(dm, ant, default_ant,
+					       optional_ant, default_tx_ant);
+		} else if (dm->support_ic_type & ODM_AC_ANTDIV_SUPPORT) {
+			phydm_update_rx_idle_ac(dm, ant, default_ant,
+						optional_ant, default_tx_ant);
 		}
+		/*PathA Resp Tx*/
+		if (dm->support_ic_type & (ODM_RTL8821C | ODM_RTL8822B |
+		    ODM_RTL8814A))
+			odm_set_mac_reg(dm, R_0x6d8, 0x7, default_tx_ant);
+		else if (dm->support_ic_type == ODM_RTL8188E)
+			odm_set_mac_reg(dm, R_0x6d8, 0xc0, default_tx_ant);
+		else
+			odm_set_mac_reg(dm, R_0x6d8, 0x700, default_tx_ant);
 
-		if (p_dm->support_ic_type & (ODM_RTL8821C | ODM_RTL8822B | ODM_RTL8814A)) {
-			odm_set_mac_reg(p_dm, 0x6D8, 0x7, default_tx_ant);		/*PathA Resp Tx*/
-			/**/
-		} else if (p_dm->support_ic_type == ODM_RTL8188E) {
-			odm_set_mac_reg(p_dm, 0x6D8, BIT(7) | BIT(6), default_tx_ant);		/*PathA Resp Tx*/
-			/**/
+	} else { /* @fat_tab->rx_idle_ant == ant */
+		PHYDM_DBG(dm, DBG_ANT_DIV,
+			  "[ Stay in Ori-ant ]  rx_idle_ant =%s\n",
+			  (ant == MAIN_ANT) ? "MAIN_ANT" : "AUX_ANT");
+		fat_tab->rx_idle_ant = ant;
+	}
+}
+
+void phydm_update_rx_idle_ant_pathb(void *dm_void, u8 ant)
+{
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct phydm_fat_struct *fat_tab = &dm->dm_fat_table;
+	u32 default_ant, optional_ant, value32, default_tx_ant;
+
+	if (fat_tab->rx_idle_ant2 != ant) {
+		PHYDM_DBG(dm, DBG_ANT_DIV,
+			  "[ Update Rx-Idle-ant2 ] rx_idle_ant2 =%s\n",
+			  (ant == MAIN_ANT) ? "MAIN_ANT" : "AUX_ANT");
+		if (ant == MAIN_ANT) {
+			default_ant = ANT1_2G;
+			optional_ant = ANT2_2G;
 		} else {
-			odm_set_mac_reg(p_dm, 0x6D8, BIT(10) | BIT(9) | BIT(8), default_tx_ant);	/*PathA Resp Tx*/
-			/**/
+			default_ant = ANT2_2G;
+			optional_ant = ANT1_2G;
 		}
 
-	} else { /* p_dm_fat_table->rx_idle_ant == ant */
-		PHYDM_DBG(p_dm, DBG_ANT_DIV, ("[ Stay in Ori-ant ]  rx_idle_ant =%s\n", (ant == MAIN_ANT) ? "MAIN_ANT" : "AUX_ANT"));
-		p_dm_fat_table->rx_idle_ant = ant;
+		if (fat_tab->b_fix_tx_ant != NO_FIX_TX_ANT)
+			default_tx_ant = (fat_tab->b_fix_tx_ant ==
+					  FIX_TX_AT_MAIN) ? 0 : 1;
+		else
+			default_tx_ant = default_ant;
+		if (dm->support_ic_type & ODM_RTL8822B) {
+			u16 v16 = odm_read_2byte(dm, ODM_REG_ANT_11AC_B + 2);
+
+			v16 &= ~(0xff8);/*0xE08[11:3]*/
+			v16 |= ((u16)default_ant << 3);
+			v16 |= ((u16)optional_ant << 6);
+			v16 |= ((u16)default_tx_ant << 9);
+			odm_write_2byte(dm, ODM_REG_ANT_11AC_B + 2, v16);
+			odm_set_mac_reg(dm, R_0x6d8, 0x38, default_tx_ant);
+			/*PathB Resp Tx*/
+		}
+	} else {
+		/* fat_tab->rx_idle_ant2 == ant */
+		PHYDM_DBG(dm, DBG_ANT_DIV, "[Stay Ori Ant] rx_idle_ant2 = %s\n",
+			  (ant == MAIN_ANT) ? "MAIN_ANT" : "AUX_ANT");
+		fat_tab->rx_idle_ant2 = ant;
 	}
 }
 
-void
-phydm_set_antdiv_val(
-	void			*p_dm_void,
-	u32			*val_buf,
-	u8			val_len
-)
+void phydm_set_antdiv_val(void *dm_void, u32 *val_buf,	u8 val_len)
 {
-	struct PHY_DM_STRUCT	*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
 
 	if (val_len != 1) {
-		PHYDM_DBG(p_dm, ODM_COMP_API, ("[Error][antdiv]Need val_len=1\n"));
+		PHYDM_DBG(dm, ODM_COMP_API, "[Error][antdiv]Need val_len=1\n");
 		return;
 	}
-	
-	odm_update_rx_idle_ant(p_dm, (u8)(*val_buf));
+
+	odm_update_rx_idle_ant(dm, (u8)(*val_buf));
 }
 
-void
-odm_update_tx_ant(
-	void		*p_dm_void,
-	u8		ant,
-	u32		mac_id
-)
+void odm_update_tx_ant(void *dm_void, u8 ant, u32 mac_id)
 {
-	struct PHY_DM_STRUCT		*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	struct phydm_fat_struct	*p_dm_fat_table = &p_dm->dm_fat_table;
-	u8	tx_ant;
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct phydm_fat_struct *fat_tab = &dm->dm_fat_table;
+	u8 tx_ant;
 
-	if (p_dm_fat_table->b_fix_tx_ant != NO_FIX_TX_ANT)
-		ant = (p_dm_fat_table->b_fix_tx_ant == FIX_TX_AT_MAIN) ? MAIN_ANT : AUX_ANT;
+	if (fat_tab->b_fix_tx_ant != NO_FIX_TX_ANT)
+		ant = (fat_tab->b_fix_tx_ant == FIX_TX_AT_MAIN) ?
+		       MAIN_ANT : AUX_ANT;
 
-	if (p_dm->ant_div_type == CG_TRX_SMART_ANTDIV)
+	if (dm->ant_div_type == CG_TRX_SMART_ANTDIV)
 		tx_ant = ant;
 	else {
 		if (ant == MAIN_ANT)
@@ -396,595 +483,626 @@ odm_update_tx_ant(
 			tx_ant = ANT2_2G;
 	}
 
-	p_dm_fat_table->antsel_a[mac_id] = tx_ant & BIT(0);
-	p_dm_fat_table->antsel_b[mac_id] = (tx_ant & BIT(1)) >> 1;
-	p_dm_fat_table->antsel_c[mac_id] = (tx_ant & BIT(2)) >> 2;
-
-	PHYDM_DBG(p_dm, DBG_ANT_DIV, ("[Set TX-DESC value]: mac_id:(( %d )),  tx_ant = (( %s ))\n", mac_id, (ant == MAIN_ANT) ? "MAIN_ANT" : "AUX_ANT"));
-	/* PHYDM_DBG(p_dm,DBG_ANT_DIV,("antsel_tr_mux=(( 3'b%d%d%d ))\n",p_dm_fat_table->antsel_c[mac_id] , p_dm_fat_table->antsel_b[mac_id] , p_dm_fat_table->antsel_a[mac_id] )); */
+	fat_tab->antsel_a[mac_id] = tx_ant & BIT(0);
+	fat_tab->antsel_b[mac_id] = (tx_ant & BIT(1)) >> 1;
+	fat_tab->antsel_c[mac_id] = (tx_ant & BIT(2)) >> 2;
 
+	PHYDM_DBG(dm, DBG_ANT_DIV,
+		  "[Set TX-DESC value]: mac_id:(( %d )),  tx_ant = (( %s ))\n",
+		  mac_id, (ant == MAIN_ANT) ? "MAIN_ANT" : "AUX_ANT");
+#if 0
+	PHYDM_DBG(dm, DBG_ANT_DIV,
+		  "antsel_tr_mux=(( 3'b%d%d%d ))\n",
+		  fat_tab->antsel_c[mac_id], fat_tab->antsel_b[mac_id],
+		  fat_tab->antsel_a[mac_id]);
+#endif
 }
 
-#ifdef BEAMFORMING_SUPPORT
+#ifdef PHYDM_BEAMFORMING_SUPPORT
 #if (DM_ODM_SUPPORT_TYPE == ODM_AP)
 
-void
-odm_bdc_init(
-	void		*p_dm_void
-)
+void odm_bdc_init(
+	void *dm_void)
 {
-	struct PHY_DM_STRUCT		*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	struct _BF_DIV_COEX_	*p_dm_bdc_table = &p_dm->dm_bdc_table;
-
-	PHYDM_DBG(p_dm, DBG_ANT_DIV, ("\n[ BDC Initialization......]\n"));
-	p_dm_bdc_table->BDC_state = BDC_DIV_TRAIN_STATE;
-	p_dm_bdc_table->bdc_mode = BDC_MODE_NULL;
-	p_dm_bdc_table->bdc_try_flag = 0;
-	p_dm_bdc_table->bd_ccoex_type_wbfer = 0;
-	p_dm->bdc_holdstate = 0xff;
-
-	if (p_dm->support_ic_type == ODM_RTL8192E) {
-		odm_set_bb_reg(p_dm, 0xd7c, 0x0FFFFFFF, 0x1081008);
-		odm_set_bb_reg(p_dm, 0xd80, 0x0FFFFFFF, 0);
-	} else if (p_dm->support_ic_type == ODM_RTL8812) {
-		odm_set_bb_reg(p_dm, 0x9b0, 0x0FFFFFFF, 0x1081008);     /* 0x9b0[30:0] = 01081008 */
-		odm_set_bb_reg(p_dm, 0x9b4, 0x0FFFFFFF, 0);                 /* 0x9b4[31:0] = 00000000 */
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct _BF_DIV_COEX_ *dm_bdc_table = &dm->dm_bdc_table;
+
+	PHYDM_DBG(dm, DBG_ANT_DIV, "\n[ BDC Initialization......]\n");
+	dm_bdc_table->BDC_state = BDC_DIV_TRAIN_STATE;
+	dm_bdc_table->bdc_mode = BDC_MODE_NULL;
+	dm_bdc_table->bdc_try_flag = 0;
+	dm_bdc_table->bd_ccoex_type_wbfer = 0;
+	dm->bdc_holdstate = 0xff;
+
+	if (dm->support_ic_type == ODM_RTL8192E) {
+		odm_set_bb_reg(dm, R_0xd7c, 0x0FFFFFFF, 0x1081008);
+		odm_set_bb_reg(dm, R_0xd80, 0x0FFFFFFF, 0);
+	} else if (dm->support_ic_type == ODM_RTL8812) {
+		odm_set_bb_reg(dm, R_0x9b0, 0x0FFFFFFF, 0x1081008);
+			/* @0x9b0[30:0] = 01081008 */
+		odm_set_bb_reg(dm, R_0x9b4, 0x0FFFFFFF, 0);
+			/* @0x9b4[31:0] = 00000000 */
 	}
-
 }
 
-
-void
-odm_CSI_on_off(
-	void		*p_dm_void,
-	u8			CSI_en
-)
+void odm_CSI_on_off(
+	void *dm_void,
+	u8 CSI_en)
 {
-	struct PHY_DM_STRUCT		*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
 	if (CSI_en == CSI_ON) {
-		if (p_dm->support_ic_type == ODM_RTL8192E)
-			odm_set_mac_reg(p_dm, 0xd84, BIT(11), 1);  /* 0xd84[11]=1 */
-		else if (p_dm->support_ic_type == ODM_RTL8812)
-			odm_set_mac_reg(p_dm, 0x9b0, BIT(31), 1);  /* 0x9b0[31]=1 */
+		if (dm->support_ic_type == ODM_RTL8192E)
+			odm_set_mac_reg(dm, R_0xd84, BIT(11), 1);
+				/* @0xd84[11]=1 */
+		else if (dm->support_ic_type == ODM_RTL8812)
+			odm_set_mac_reg(dm, R_0x9b0, BIT(31), 1);
+				/* @0x9b0[31]=1 */
 
 	} else if (CSI_en == CSI_OFF) {
-		if (p_dm->support_ic_type == ODM_RTL8192E)
-			odm_set_mac_reg(p_dm, 0xd84, BIT(11), 0);  /* 0xd84[11]=0 */
-		else if (p_dm->support_ic_type == ODM_RTL8812)
-			odm_set_mac_reg(p_dm, 0x9b0, BIT(31), 0);  /* 0x9b0[31]=0 */
+		if (dm->support_ic_type == ODM_RTL8192E)
+			odm_set_mac_reg(dm, R_0xd84, BIT(11), 0);
+				/* @0xd84[11]=0 */
+		else if (dm->support_ic_type == ODM_RTL8812)
+			odm_set_mac_reg(dm, R_0x9b0, BIT(31), 0);
+				/* @0x9b0[31]=0 */
 	}
 }
 
-void
-odm_bd_ccoex_type_with_bfer_client(
-	void		*p_dm_void,
-	u8			swch
-)
+void odm_bd_ccoex_type_with_bfer_client(
+	void *dm_void,
+	u8 swch)
 {
-	struct PHY_DM_STRUCT		*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	struct _BF_DIV_COEX_	*p_dm_bdc_table = &p_dm->dm_bdc_table;
-	u8     bd_ccoex_type_wbfer;
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct _BF_DIV_COEX_ *dm_bdc_table = &dm->dm_bdc_table;
+	u8 bd_ccoex_type_wbfer;
 
 	if (swch == DIVON_CSIOFF) {
-		PHYDM_DBG(p_dm, DBG_ANT_DIV, ("[BDCcoexType: 1] {DIV,CSI} ={1,0}\n"));
+		PHYDM_DBG(dm, DBG_ANT_DIV,
+			  "[BDCcoexType: 1] {DIV,CSI} ={1,0}\n");
 		bd_ccoex_type_wbfer = 1;
 
-		if (bd_ccoex_type_wbfer != p_dm_bdc_table->bd_ccoex_type_wbfer) {
-			odm_ant_div_on_off(p_dm, ANTDIV_ON);
-			odm_CSI_on_off(p_dm, CSI_OFF);
-			p_dm_bdc_table->bd_ccoex_type_wbfer = 1;
+		if (bd_ccoex_type_wbfer != dm_bdc_table->bd_ccoex_type_wbfer) {
+			odm_ant_div_on_off(dm, ANTDIV_ON, ANT_PATH_A);
+			odm_CSI_on_off(dm, CSI_OFF);
+			dm_bdc_table->bd_ccoex_type_wbfer = 1;
 		}
 	} else if (swch == DIVOFF_CSION) {
-		PHYDM_DBG(p_dm, DBG_ANT_DIV, ("[BDCcoexType: 2] {DIV,CSI} ={0,1}\n"));
+		PHYDM_DBG(dm, DBG_ANT_DIV,
+			  "[BDCcoexType: 2] {DIV,CSI} ={0,1}\n");
 		bd_ccoex_type_wbfer = 2;
 
-		if (bd_ccoex_type_wbfer != p_dm_bdc_table->bd_ccoex_type_wbfer) {
-			odm_ant_div_on_off(p_dm, ANTDIV_OFF);
-			odm_CSI_on_off(p_dm, CSI_ON);
-			p_dm_bdc_table->bd_ccoex_type_wbfer = 2;
+		if (bd_ccoex_type_wbfer != dm_bdc_table->bd_ccoex_type_wbfer) {
+			odm_ant_div_on_off(dm, ANTDIV_OFF, ANT_PATH_A);
+			odm_CSI_on_off(dm, CSI_ON);
+			dm_bdc_table->bd_ccoex_type_wbfer = 2;
 		}
 	}
 }
 
-void
-odm_bf_ant_div_mode_arbitration(
-	void		*p_dm_void
-)
+void odm_bf_ant_div_mode_arbitration(
+	void *dm_void)
 {
-	struct PHY_DM_STRUCT		*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	struct _BF_DIV_COEX_			*p_dm_bdc_table = &p_dm->dm_bdc_table;
-	u8			current_bdc_mode;
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct _BF_DIV_COEX_ *dm_bdc_table = &dm->dm_bdc_table;
+	u8 current_bdc_mode;
 
 #if (DM_ODM_SUPPORT_TYPE == ODM_AP)
-	PHYDM_DBG(p_dm, DBG_ANT_DIV, ("\n"));
+	PHYDM_DBG(dm, DBG_ANT_DIV, "\n");
 
-	/* 2 mode 1 */
-	if ((p_dm_bdc_table->num_txbfee_client != 0) && (p_dm_bdc_table->num_txbfer_client == 0)) {
+	/* @2 mode 1 */
+	if (dm_bdc_table->num_txbfee_client != 0 &&
+	    dm_bdc_table->num_txbfer_client == 0) {
 		current_bdc_mode = BDC_MODE_1;
 
-		if (current_bdc_mode != p_dm_bdc_table->bdc_mode) {
-			p_dm_bdc_table->bdc_mode = BDC_MODE_1;
-			odm_bd_ccoex_type_with_bfer_client(p_dm, DIVON_CSIOFF);
-			p_dm_bdc_table->bdc_rx_idle_update_counter = 1;
-			PHYDM_DBG(p_dm, DBG_ANT_DIV, ("Change to (( Mode1 ))\n"));
+		if (current_bdc_mode != dm_bdc_table->bdc_mode) {
+			dm_bdc_table->bdc_mode = BDC_MODE_1;
+			odm_bd_ccoex_type_with_bfer_client(dm, DIVON_CSIOFF);
+			dm_bdc_table->bdc_rx_idle_update_counter = 1;
+			PHYDM_DBG(dm, DBG_ANT_DIV, "Change to (( Mode1 ))\n");
 		}
 
-		PHYDM_DBG(p_dm, DBG_ANT_DIV, ("[Antdiv + BF coextance mode] : (( Mode1 ))\n"));
+		PHYDM_DBG(dm, DBG_ANT_DIV,
+			  "[Antdiv + BF coextance mode] : (( Mode1 ))\n");
 	}
-	/* 2 mode 2 */
-	else if ((p_dm_bdc_table->num_txbfee_client == 0) && (p_dm_bdc_table->num_txbfer_client != 0)) {
+	/* @2 mode 2 */
+	else if ((dm_bdc_table->num_txbfee_client == 0) &&
+		 (dm_bdc_table->num_txbfer_client != 0)) {
 		current_bdc_mode = BDC_MODE_2;
 
-		if (current_bdc_mode != p_dm_bdc_table->bdc_mode) {
-			p_dm_bdc_table->bdc_mode = BDC_MODE_2;
-			p_dm_bdc_table->BDC_state = BDC_DIV_TRAIN_STATE;
-			p_dm_bdc_table->bdc_try_flag = 0;
-			PHYDM_DBG(p_dm, DBG_ANT_DIV, ("Change to (( Mode2 ))\n"));
-
+		if (current_bdc_mode != dm_bdc_table->bdc_mode) {
+			dm_bdc_table->bdc_mode = BDC_MODE_2;
+			dm_bdc_table->BDC_state = BDC_DIV_TRAIN_STATE;
+			dm_bdc_table->bdc_try_flag = 0;
+			PHYDM_DBG(dm, DBG_ANT_DIV, "Change to (( Mode2 ))\n");
 		}
-		PHYDM_DBG(p_dm, DBG_ANT_DIV, ("[Antdiv + BF coextance mode] : (( Mode2 ))\n"));
+		PHYDM_DBG(dm, DBG_ANT_DIV,
+			  "[Antdiv + BF coextance mode] : (( Mode2 ))\n");
 	}
-	/* 2 mode 3 */
-	else if ((p_dm_bdc_table->num_txbfee_client != 0) && (p_dm_bdc_table->num_txbfer_client != 0)) {
+	/* @2 mode 3 */
+	else if ((dm_bdc_table->num_txbfee_client != 0) &&
+		 (dm_bdc_table->num_txbfer_client != 0)) {
 		current_bdc_mode = BDC_MODE_3;
 
-		if (current_bdc_mode != p_dm_bdc_table->bdc_mode) {
-			p_dm_bdc_table->bdc_mode = BDC_MODE_3;
-			p_dm_bdc_table->BDC_state = BDC_DIV_TRAIN_STATE;
-			p_dm_bdc_table->bdc_try_flag = 0;
-			p_dm_bdc_table->bdc_rx_idle_update_counter = 1;
-			PHYDM_DBG(p_dm, DBG_ANT_DIV, ("Change to (( Mode3 ))\n"));
+		if (current_bdc_mode != dm_bdc_table->bdc_mode) {
+			dm_bdc_table->bdc_mode = BDC_MODE_3;
+			dm_bdc_table->BDC_state = BDC_DIV_TRAIN_STATE;
+			dm_bdc_table->bdc_try_flag = 0;
+			dm_bdc_table->bdc_rx_idle_update_counter = 1;
+			PHYDM_DBG(dm, DBG_ANT_DIV, "Change to (( Mode3 ))\n");
 		}
 
-		PHYDM_DBG(p_dm, DBG_ANT_DIV, ("[Antdiv + BF coextance mode] : (( Mode3 ))\n"));
+		PHYDM_DBG(dm, DBG_ANT_DIV,
+			  "[Antdiv + BF coextance mode] : (( Mode3 ))\n");
 	}
-	/* 2 mode 4 */
-	else if ((p_dm_bdc_table->num_txbfee_client == 0) && (p_dm_bdc_table->num_txbfer_client == 0)) {
+	/* @2 mode 4 */
+	else if ((dm_bdc_table->num_txbfee_client == 0) &&
+		 (dm_bdc_table->num_txbfer_client == 0)) {
 		current_bdc_mode = BDC_MODE_4;
 
-		if (current_bdc_mode != p_dm_bdc_table->bdc_mode) {
-			p_dm_bdc_table->bdc_mode = BDC_MODE_4;
-			odm_bd_ccoex_type_with_bfer_client(p_dm, DIVON_CSIOFF);
-			PHYDM_DBG(p_dm, DBG_ANT_DIV, ("Change to (( Mode4 ))\n"));
+		if (current_bdc_mode != dm_bdc_table->bdc_mode) {
+			dm_bdc_table->bdc_mode = BDC_MODE_4;
+			odm_bd_ccoex_type_with_bfer_client(dm, DIVON_CSIOFF);
+			PHYDM_DBG(dm, DBG_ANT_DIV, "Change to (( Mode4 ))\n");
 		}
 
-		PHYDM_DBG(p_dm, DBG_ANT_DIV, ("[Antdiv + BF coextance mode] : (( Mode4 ))\n"));
+		PHYDM_DBG(dm, DBG_ANT_DIV,
+			  "[Antdiv + BF coextance mode] : (( Mode4 ))\n");
 	}
 #endif
-
 }
 
-void
-odm_div_train_state_setting(
-	void		*p_dm_void
-)
+void odm_div_train_state_setting(
+	void *dm_void)
 {
-	struct PHY_DM_STRUCT		*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	struct _BF_DIV_COEX_	*p_dm_bdc_table = &p_dm->dm_bdc_table;
-
-	PHYDM_DBG(p_dm, DBG_ANT_DIV, ("\n*****[S T A R T ]*****  [2-0. DIV_TRAIN_STATE]\n"));
-	p_dm_bdc_table->bdc_try_counter = 2;
-	p_dm_bdc_table->bdc_try_flag = 1;
-	p_dm_bdc_table->BDC_state = bdc_bfer_train_state;
-	odm_bd_ccoex_type_with_bfer_client(p_dm, DIVON_CSIOFF);
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct _BF_DIV_COEX_ *dm_bdc_table = &dm->dm_bdc_table;
+
+	PHYDM_DBG(dm, DBG_ANT_DIV,
+		  "\n*****[S T A R T ]*****  [2-0. DIV_TRAIN_STATE]\n");
+	dm_bdc_table->bdc_try_counter = 2;
+	dm_bdc_table->bdc_try_flag = 1;
+	dm_bdc_table->BDC_state = bdc_bfer_train_state;
+	odm_bd_ccoex_type_with_bfer_client(dm, DIVON_CSIOFF);
 }
 
-void
-odm_bd_ccoex_bfee_rx_div_arbitration(
-	void		*p_dm_void
-)
+void odm_bd_ccoex_bfee_rx_div_arbitration(
+	void *dm_void)
 {
-	struct PHY_DM_STRUCT		*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	struct _BF_DIV_COEX_    *p_dm_bdc_table = &p_dm->dm_bdc_table;
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct _BF_DIV_COEX_ *dm_bdc_table = &dm->dm_bdc_table;
 	boolean stop_bf_flag;
-	u8	bdc_active_mode;
-
+	u8 bdc_active_mode;
 
 #if (DM_ODM_SUPPORT_TYPE == ODM_AP)
 
-	PHYDM_DBG(p_dm, DBG_ANT_DIV, ("***{ num_BFee,  num_BFer, num_client}  = (( %d  ,  %d  ,  %d))\n", p_dm_bdc_table->num_txbfee_client, p_dm_bdc_table->num_txbfer_client, p_dm_bdc_table->num_client));
-	PHYDM_DBG(p_dm, DBG_ANT_DIV, ("***{ num_BF_tars,  num_DIV_tars }  = ((  %d  ,  %d ))\n", p_dm_bdc_table->num_bf_tar, p_dm_bdc_table->num_div_tar));
-
-	/* 2 [ MIB control ] */
-	if (p_dm->bdc_holdstate == 2) {
-		odm_bd_ccoex_type_with_bfer_client(p_dm, DIVOFF_CSION);
-		p_dm_bdc_table->BDC_state = BDC_BF_HOLD_STATE;
-		PHYDM_DBG(p_dm, DBG_ANT_DIV, ("Force in [ BF STATE]\n"));
+	PHYDM_DBG(dm, DBG_ANT_DIV,
+		  "***{ num_BFee,  num_BFer, num_client}  = (( %d  ,  %d  ,  %d))\n",
+		  dm_bdc_table->num_txbfee_client,
+		  dm_bdc_table->num_txbfer_client, dm_bdc_table->num_client);
+	PHYDM_DBG(dm, DBG_ANT_DIV,
+		  "***{ num_BF_tars,  num_DIV_tars }  = ((  %d  ,  %d ))\n",
+		  dm_bdc_table->num_bf_tar, dm_bdc_table->num_div_tar);
+
+	/* @2 [ MIB control ] */
+	if (dm->bdc_holdstate == 2) {
+		odm_bd_ccoex_type_with_bfer_client(dm, DIVOFF_CSION);
+		dm_bdc_table->BDC_state = BDC_BF_HOLD_STATE;
+		PHYDM_DBG(dm, DBG_ANT_DIV, "Force in [ BF STATE]\n");
 		return;
-	} else if (p_dm->bdc_holdstate == 1) {
-		p_dm_bdc_table->BDC_state = BDC_DIV_HOLD_STATE;
-		odm_bd_ccoex_type_with_bfer_client(p_dm, DIVON_CSIOFF);
-		PHYDM_DBG(p_dm, DBG_ANT_DIV, ("Force in [ DIV STATE]\n"));
+	} else if (dm->bdc_holdstate == 1) {
+		dm_bdc_table->BDC_state = BDC_DIV_HOLD_STATE;
+		odm_bd_ccoex_type_with_bfer_client(dm, DIVON_CSIOFF);
+		PHYDM_DBG(dm, DBG_ANT_DIV, "Force in [ DIV STATE]\n");
 		return;
 	}
 
-	/* ------------------------------------------------------------ */
-
-
-
-	/* 2 mode 2 & 3 */
-	if (p_dm_bdc_table->bdc_mode == BDC_MODE_2 || p_dm_bdc_table->bdc_mode == BDC_MODE_3) {
-
-		PHYDM_DBG(p_dm, DBG_ANT_DIV, ("\n{ Try_flag,  Try_counter } = {  %d , %d  }\n", p_dm_bdc_table->bdc_try_flag, p_dm_bdc_table->bdc_try_counter));
-		PHYDM_DBG(p_dm, DBG_ANT_DIV, ("BDCcoexType = (( %d ))\n\n", p_dm_bdc_table->bd_ccoex_type_wbfer));
-
-		/* All Client have Bfer-Cap------------------------------- */
-		if (p_dm_bdc_table->num_txbfer_client == p_dm_bdc_table->num_client) { /* BFer STA Only?: yes */
-			PHYDM_DBG(p_dm, DBG_ANT_DIV, ("BFer STA only?  (( Yes ))\n"));
-			p_dm_bdc_table->bdc_try_flag = 0;
-			p_dm_bdc_table->BDC_state = BDC_DIV_TRAIN_STATE;
-			odm_bd_ccoex_type_with_bfer_client(p_dm, DIVOFF_CSION);
+	/* @------------------------------------------------------------ */
+
+	/* @2 mode 2 & 3 */
+	if (dm_bdc_table->bdc_mode == BDC_MODE_2 ||
+	    dm_bdc_table->bdc_mode == BDC_MODE_3) {
+		PHYDM_DBG(dm, DBG_ANT_DIV,
+			  "\n{ Try_flag,  Try_counter } = {  %d , %d  }\n",
+			  dm_bdc_table->bdc_try_flag,
+			  dm_bdc_table->bdc_try_counter);
+		PHYDM_DBG(dm, DBG_ANT_DIV, "BDCcoexType = (( %d ))\n\n",
+			  dm_bdc_table->bd_ccoex_type_wbfer);
+
+		/* @All Client have Bfer-Cap------------------------------- */
+		if (dm_bdc_table->num_txbfer_client == dm_bdc_table->num_client) {
+			/* @BFer STA Only?: yes */
+			PHYDM_DBG(dm, DBG_ANT_DIV,
+				  "BFer STA only?  (( Yes ))\n");
+			dm_bdc_table->bdc_try_flag = 0;
+			dm_bdc_table->BDC_state = BDC_DIV_TRAIN_STATE;
+			odm_bd_ccoex_type_with_bfer_client(dm, DIVOFF_CSION);
 			return;
 		} else
-			PHYDM_DBG(p_dm, DBG_ANT_DIV, ("BFer STA only?  (( No ))\n"));
-		/*  */
-		if (p_dm_bdc_table->is_all_bf_sta_idle == false && p_dm_bdc_table->is_all_div_sta_idle == true) {
-			PHYDM_DBG(p_dm, DBG_ANT_DIV, ("All DIV-STA are idle, but BF-STA not\n"));
-			p_dm_bdc_table->bdc_try_flag = 0;
-			p_dm_bdc_table->BDC_state = bdc_bfer_train_state;
-			odm_bd_ccoex_type_with_bfer_client(p_dm, DIVOFF_CSION);
+			PHYDM_DBG(dm, DBG_ANT_DIV,
+				  "BFer STA only?  (( No ))\n");
+		if (dm_bdc_table->is_all_bf_sta_idle == false && dm_bdc_table->is_all_div_sta_idle == true) {
+			PHYDM_DBG(dm, DBG_ANT_DIV,
+				  "All DIV-STA are idle, but BF-STA not\n");
+			dm_bdc_table->bdc_try_flag = 0;
+			dm_bdc_table->BDC_state = bdc_bfer_train_state;
+			odm_bd_ccoex_type_with_bfer_client(dm, DIVOFF_CSION);
 			return;
-		} else if (p_dm_bdc_table->is_all_bf_sta_idle == true && p_dm_bdc_table->is_all_div_sta_idle == false) {
-			PHYDM_DBG(p_dm, DBG_ANT_DIV, ("All BF-STA are idle, but DIV-STA not\n"));
-			p_dm_bdc_table->bdc_try_flag = 0;
-			p_dm_bdc_table->BDC_state = BDC_DIV_TRAIN_STATE;
-			odm_bd_ccoex_type_with_bfer_client(p_dm, DIVON_CSIOFF);
+		} else if (dm_bdc_table->is_all_bf_sta_idle == true && dm_bdc_table->is_all_div_sta_idle == false) {
+			PHYDM_DBG(dm, DBG_ANT_DIV,
+				  "All BF-STA are idle, but DIV-STA not\n");
+			dm_bdc_table->bdc_try_flag = 0;
+			dm_bdc_table->BDC_state = BDC_DIV_TRAIN_STATE;
+			odm_bd_ccoex_type_with_bfer_client(dm, DIVON_CSIOFF);
 			return;
 		}
 
 		/* Select active mode-------------------------------------- */
-		if (p_dm_bdc_table->num_bf_tar == 0) { /* Selsect_1,  Selsect_2 */
-			if (p_dm_bdc_table->num_div_tar == 0) { /* Selsect_3 */
-				PHYDM_DBG(p_dm, DBG_ANT_DIV, ("Select active mode (( 1 ))\n"));
-				p_dm_bdc_table->bdc_active_mode = 1;
+		if (dm_bdc_table->num_bf_tar == 0) { /* Selsect_1,  Selsect_2 */
+			if (dm_bdc_table->num_div_tar == 0) { /* Selsect_3 */
+				PHYDM_DBG(dm, DBG_ANT_DIV,
+					  "Select active mode (( 1 ))\n");
+				dm_bdc_table->bdc_active_mode = 1;
 			} else {
-				PHYDM_DBG(p_dm, DBG_ANT_DIV, ("Select active mode  (( 2 ))\n"));
-				p_dm_bdc_table->bdc_active_mode = 2;
+				PHYDM_DBG(dm, DBG_ANT_DIV,
+					  "Select active mode  (( 2 ))\n");
+				dm_bdc_table->bdc_active_mode = 2;
 			}
-			p_dm_bdc_table->bdc_try_flag = 0;
-			p_dm_bdc_table->BDC_state = BDC_DIV_TRAIN_STATE;
-			odm_bd_ccoex_type_with_bfer_client(p_dm, DIVON_CSIOFF);
+			dm_bdc_table->bdc_try_flag = 0;
+			dm_bdc_table->BDC_state = BDC_DIV_TRAIN_STATE;
+			odm_bd_ccoex_type_with_bfer_client(dm, DIVON_CSIOFF);
 			return;
 		} else { /* num_bf_tar > 0 */
-			if (p_dm_bdc_table->num_div_tar == 0) { /* Selsect_3 */
-				PHYDM_DBG(p_dm, DBG_ANT_DIV, ("Select active mode (( 3 ))\n"));
-				p_dm_bdc_table->bdc_active_mode = 3;
-				p_dm_bdc_table->bdc_try_flag = 0;
-				p_dm_bdc_table->BDC_state = bdc_bfer_train_state;
-				odm_bd_ccoex_type_with_bfer_client(p_dm, DIVOFF_CSION);
+			if (dm_bdc_table->num_div_tar == 0) { /* Selsect_3 */
+				PHYDM_DBG(dm, DBG_ANT_DIV,
+					  "Select active mode (( 3 ))\n");
+				dm_bdc_table->bdc_active_mode = 3;
+				dm_bdc_table->bdc_try_flag = 0;
+				dm_bdc_table->BDC_state = bdc_bfer_train_state;
+				odm_bd_ccoex_type_with_bfer_client(dm,
+								   DIVOFF_CSION)
+								   ;
 				return;
 			} else { /* Selsect_4 */
 				bdc_active_mode = 4;
-				PHYDM_DBG(p_dm, DBG_ANT_DIV, ("Select active mode (( 4 ))\n"));
+				PHYDM_DBG(dm, DBG_ANT_DIV,
+					  "Select active mode (( 4 ))\n");
 
-				if (bdc_active_mode != p_dm_bdc_table->bdc_active_mode) {
-					p_dm_bdc_table->bdc_active_mode = 4;
-					PHYDM_DBG(p_dm, DBG_ANT_DIV, ("Change to active mode (( 4 ))  &  return!!!\n"));
+				if (bdc_active_mode != dm_bdc_table->bdc_active_mode) {
+					dm_bdc_table->bdc_active_mode = 4;
+					PHYDM_DBG(dm, DBG_ANT_DIV, "Change to active mode (( 4 ))  &  return!!!\n");
 					return;
 				}
 			}
 		}
 
 #if 1
-		if (p_dm->bdc_holdstate == 0xff) {
-			p_dm_bdc_table->BDC_state = BDC_DIV_HOLD_STATE;
-			odm_bd_ccoex_type_with_bfer_client(p_dm, DIVON_CSIOFF);
-			PHYDM_DBG(p_dm, DBG_ANT_DIV, ("Force in [ DIV STATE]\n"));
+		if (dm->bdc_holdstate == 0xff) {
+			dm_bdc_table->BDC_state = BDC_DIV_HOLD_STATE;
+			odm_bd_ccoex_type_with_bfer_client(dm, DIVON_CSIOFF);
+			PHYDM_DBG(dm, DBG_ANT_DIV, "Force in [ DIV STATE]\n");
 			return;
 		}
 #endif
 
-		/* Does Client number changed ? ------------------------------- */
-		if (p_dm_bdc_table->num_client != p_dm_bdc_table->pre_num_client) {
-			p_dm_bdc_table->bdc_try_flag = 0;
-			p_dm_bdc_table->BDC_state = BDC_DIV_TRAIN_STATE;
-			PHYDM_DBG(p_dm, DBG_ANT_DIV, ("[  The number of client has been changed !!!]   return to (( BDC_DIV_TRAIN_STATE ))\n"));
+		/* @Does Client number changed ? ------------------------------- */
+		if (dm_bdc_table->num_client != dm_bdc_table->pre_num_client) {
+			dm_bdc_table->bdc_try_flag = 0;
+			dm_bdc_table->BDC_state = BDC_DIV_TRAIN_STATE;
+			PHYDM_DBG(dm, DBG_ANT_DIV,
+				  "[  The number of client has been changed !!!]   return to (( BDC_DIV_TRAIN_STATE ))\n");
 		}
-		p_dm_bdc_table->pre_num_client = p_dm_bdc_table->num_client;
-
-		if (p_dm_bdc_table->bdc_try_flag == 0) {
-			/* 2 DIV_TRAIN_STATE (mode 2-0) */
-			if (p_dm_bdc_table->BDC_state == BDC_DIV_TRAIN_STATE)
-				odm_div_train_state_setting(p_dm);
-			/* 2 BFer_TRAIN_STATE (mode 2-1) */
-			else if (p_dm_bdc_table->BDC_state == bdc_bfer_train_state) {
-				PHYDM_DBG(p_dm, DBG_ANT_DIV, ("*****[2-1. BFer_TRAIN_STATE ]*****\n"));
-
-				/* if(p_dm_bdc_table->num_bf_tar==0) */
-				/* { */
-				/*	PHYDM_DBG(p_dm,DBG_ANT_DIV, ("BF_tars exist?  : (( No )),   [ bdc_bfer_train_state ] >> [BDC_DIV_TRAIN_STATE]\n")); */
-				/*	odm_div_train_state_setting( p_dm); */
-				/* } */
+		dm_bdc_table->pre_num_client = dm_bdc_table->num_client;
+
+		if (dm_bdc_table->bdc_try_flag == 0) {
+			/* @2 DIV_TRAIN_STATE (mode 2-0) */
+			if (dm_bdc_table->BDC_state == BDC_DIV_TRAIN_STATE)
+				odm_div_train_state_setting(dm);
+			/* @2 BFer_TRAIN_STATE (mode 2-1) */
+			else if (dm_bdc_table->BDC_state == bdc_bfer_train_state) {
+				PHYDM_DBG(dm, DBG_ANT_DIV,
+					  "*****[2-1. BFer_TRAIN_STATE ]*****\n");
+
+#if 0
+				/* @if(dm_bdc_table->num_bf_tar==0) */
+				/* @{ */
+				/*	PHYDM_DBG(dm,DBG_ANT_DIV, "BF_tars exist?  : (( No )),   [ bdc_bfer_train_state ] >> [BDC_DIV_TRAIN_STATE]\n"); */
+				/*	odm_div_train_state_setting( dm); */
+				/* @} */
 				/* else */ /* num_bf_tar != 0 */
-				/* { */
-				p_dm_bdc_table->bdc_try_counter = 2;
-				p_dm_bdc_table->bdc_try_flag = 1;
-				p_dm_bdc_table->BDC_state = BDC_DECISION_STATE;
-				odm_bd_ccoex_type_with_bfer_client(p_dm, DIVOFF_CSION);
-				PHYDM_DBG(p_dm, DBG_ANT_DIV, ("BF_tars exist?  : (( Yes )),   [ bdc_bfer_train_state ] >> [BDC_DECISION_STATE]\n"));
-				/* } */
+				/* @{ */
+#endif
+				dm_bdc_table->bdc_try_counter = 2;
+				dm_bdc_table->bdc_try_flag = 1;
+				dm_bdc_table->BDC_state = BDC_DECISION_STATE;
+				odm_bd_ccoex_type_with_bfer_client(dm, DIVOFF_CSION);
+				PHYDM_DBG(dm, DBG_ANT_DIV,
+					  "BF_tars exist?  : (( Yes )),   [ bdc_bfer_train_state ] >> [BDC_DECISION_STATE]\n");
+				/* @} */
 			}
-			/* 2 DECISION_STATE (mode 2-2) */
-			else if (p_dm_bdc_table->BDC_state == BDC_DECISION_STATE) {
-				PHYDM_DBG(p_dm, DBG_ANT_DIV, ("*****[2-2. DECISION_STATE]*****\n"));
-				/* if(p_dm_bdc_table->num_bf_tar==0) */
-				/* { */
+			/* @2 DECISION_STATE (mode 2-2) */
+			else if (dm_bdc_table->BDC_state == BDC_DECISION_STATE) {
+				PHYDM_DBG(dm, DBG_ANT_DIV,
+					  "*****[2-2. DECISION_STATE]*****\n");
+#if 0
+				/* @if(dm_bdc_table->num_bf_tar==0) */
+				/* @{ */
 				/*	ODM_AntDiv_Printk(("BF_tars exist?  : (( No )),   [ DECISION_STATE ] >> [BDC_DIV_TRAIN_STATE]\n")); */
-				/*	odm_div_train_state_setting( p_dm); */
-				/* } */
+				/*	odm_div_train_state_setting( dm); */
+				/* @} */
 				/* else */ /* num_bf_tar != 0 */
-				/* { */
-				if (p_dm_bdc_table->BF_pass == false || p_dm_bdc_table->DIV_pass == false)
+				/* @{ */
+#endif
+				if (dm_bdc_table->BF_pass == false || dm_bdc_table->DIV_pass == false)
 					stop_bf_flag = true;
 				else
 					stop_bf_flag = false;
 
-				PHYDM_DBG(p_dm, DBG_ANT_DIV, ("BF_tars exist?  : (( Yes )),  {BF_pass, DIV_pass, stop_bf_flag }  = { %d, %d, %d }\n", p_dm_bdc_table->BF_pass, p_dm_bdc_table->DIV_pass, stop_bf_flag));
-
-				if (stop_bf_flag == true) { /* DIV_en */
-					p_dm_bdc_table->bdc_hold_counter = 10; /* 20 */
-					odm_bd_ccoex_type_with_bfer_client(p_dm, DIVON_CSIOFF);
-					p_dm_bdc_table->BDC_state = BDC_DIV_HOLD_STATE;
-					PHYDM_DBG(p_dm, DBG_ANT_DIV, ("[ stop_bf_flag= ((true)),   BDC_DECISION_STATE ] >> [BDC_DIV_HOLD_STATE]\n"));
-				} else { /* BF_en */
-					p_dm_bdc_table->bdc_hold_counter = 10; /* 20 */
-					odm_bd_ccoex_type_with_bfer_client(p_dm, DIVOFF_CSION);
-					p_dm_bdc_table->BDC_state = BDC_BF_HOLD_STATE;
-					PHYDM_DBG(p_dm, DBG_ANT_DIV, ("[stop_bf_flag= ((false)),   BDC_DECISION_STATE ] >> [BDC_BF_HOLD_STATE]\n"));
+				PHYDM_DBG(dm, DBG_ANT_DIV,
+					  "BF_tars exist?  : (( Yes )),  {BF_pass, DIV_pass, stop_bf_flag }  = { %d, %d, %d }\n",
+					  dm_bdc_table->BF_pass,
+					  dm_bdc_table->DIV_pass, stop_bf_flag);
+
+				if (stop_bf_flag == true) { /* @DIV_en */
+					dm_bdc_table->bdc_hold_counter = 10; /* @20 */
+					odm_bd_ccoex_type_with_bfer_client(dm, DIVON_CSIOFF);
+					dm_bdc_table->BDC_state = BDC_DIV_HOLD_STATE;
+					PHYDM_DBG(dm, DBG_ANT_DIV, "[ stop_bf_flag= ((true)),   BDC_DECISION_STATE ] >> [BDC_DIV_HOLD_STATE]\n");
+				} else { /* @BF_en */
+					dm_bdc_table->bdc_hold_counter = 10; /* @20 */
+					odm_bd_ccoex_type_with_bfer_client(dm, DIVOFF_CSION);
+					dm_bdc_table->BDC_state = BDC_BF_HOLD_STATE;
+					PHYDM_DBG(dm, DBG_ANT_DIV, "[stop_bf_flag= ((false)),   BDC_DECISION_STATE ] >> [BDC_BF_HOLD_STATE]\n");
 				}
-				/* } */
+				/* @} */
 			}
-			/* 2 BF-HOLD_STATE (mode 2-3) */
-			else if (p_dm_bdc_table->BDC_state == BDC_BF_HOLD_STATE) {
-				PHYDM_DBG(p_dm, DBG_ANT_DIV, ("*****[2-3. BF_HOLD_STATE ]*****\n"));
-
-				PHYDM_DBG(p_dm, DBG_ANT_DIV, ("bdc_hold_counter = (( %d ))\n", p_dm_bdc_table->bdc_hold_counter));
-
-				if (p_dm_bdc_table->bdc_hold_counter == 1) {
-					PHYDM_DBG(p_dm, DBG_ANT_DIV, ("[ BDC_BF_HOLD_STATE ] >> [BDC_DIV_TRAIN_STATE]\n"));
-					odm_div_train_state_setting(p_dm);
+			/* @2 BF-HOLD_STATE (mode 2-3) */
+			else if (dm_bdc_table->BDC_state == BDC_BF_HOLD_STATE) {
+				PHYDM_DBG(dm, DBG_ANT_DIV,
+					  "*****[2-3. BF_HOLD_STATE ]*****\n");
+
+				PHYDM_DBG(dm, DBG_ANT_DIV,
+					  "bdc_hold_counter = (( %d ))\n",
+					  dm_bdc_table->bdc_hold_counter);
+
+				if (dm_bdc_table->bdc_hold_counter == 1) {
+					PHYDM_DBG(dm, DBG_ANT_DIV, "[ BDC_BF_HOLD_STATE ] >> [BDC_DIV_TRAIN_STATE]\n");
+					odm_div_train_state_setting(dm);
 				} else {
-					p_dm_bdc_table->bdc_hold_counter--;
+					dm_bdc_table->bdc_hold_counter--;
 
-					/* if(p_dm_bdc_table->num_bf_tar==0) */
-					/* { */
-					/*	PHYDM_DBG(p_dm,DBG_ANT_DIV, ("BF_tars exist?  : (( No )),   [ BDC_BF_HOLD_STATE ] >> [BDC_DIV_TRAIN_STATE]\n")); */
-					/*	odm_div_train_state_setting( p_dm); */
-					/* } */
+#if 0
+					/* @if(dm_bdc_table->num_bf_tar==0) */
+					/* @{ */
+					/*	PHYDM_DBG(dm,DBG_ANT_DIV, "BF_tars exist?  : (( No )),   [ BDC_BF_HOLD_STATE ] >> [BDC_DIV_TRAIN_STATE]\n"); */
+					/*	odm_div_train_state_setting( dm); */
+					/* @} */
 					/* else */ /* num_bf_tar != 0 */
-					/* { */
-					/* PHYDM_DBG(p_dm,DBG_ANT_DIV, ("BF_tars exist?  : (( Yes ))\n")); */
-					p_dm_bdc_table->BDC_state = BDC_BF_HOLD_STATE;
-					odm_bd_ccoex_type_with_bfer_client(p_dm, DIVOFF_CSION);
-					PHYDM_DBG(p_dm, DBG_ANT_DIV, ("[ BDC_BF_HOLD_STATE ] >> [BDC_BF_HOLD_STATE]\n"));
-					/* } */
+					/* @{ */
+					/* PHYDM_DBG(dm,DBG_ANT_DIV, "BF_tars exist?  : (( Yes ))\n"); */
+#endif
+					dm_bdc_table->BDC_state = BDC_BF_HOLD_STATE;
+					odm_bd_ccoex_type_with_bfer_client(dm, DIVOFF_CSION);
+					PHYDM_DBG(dm, DBG_ANT_DIV, "[ BDC_BF_HOLD_STATE ] >> [BDC_BF_HOLD_STATE]\n");
+					/* @} */
 				}
-
 			}
-			/* 2 DIV-HOLD_STATE (mode 2-4) */
-			else if (p_dm_bdc_table->BDC_state == BDC_DIV_HOLD_STATE) {
-				PHYDM_DBG(p_dm, DBG_ANT_DIV, ("*****[2-4. DIV_HOLD_STATE ]*****\n"));
-
-				PHYDM_DBG(p_dm, DBG_ANT_DIV, ("bdc_hold_counter = (( %d ))\n", p_dm_bdc_table->bdc_hold_counter));
-
-				if (p_dm_bdc_table->bdc_hold_counter == 1) {
-					PHYDM_DBG(p_dm, DBG_ANT_DIV, ("[ BDC_DIV_HOLD_STATE ] >> [BDC_DIV_TRAIN_STATE]\n"));
-					odm_div_train_state_setting(p_dm);
+			/* @2 DIV-HOLD_STATE (mode 2-4) */
+			else if (dm_bdc_table->BDC_state == BDC_DIV_HOLD_STATE) {
+				PHYDM_DBG(dm, DBG_ANT_DIV,
+					  "*****[2-4. DIV_HOLD_STATE ]*****\n");
+
+				PHYDM_DBG(dm, DBG_ANT_DIV,
+					  "bdc_hold_counter = (( %d ))\n",
+					  dm_bdc_table->bdc_hold_counter);
+
+				if (dm_bdc_table->bdc_hold_counter == 1) {
+					PHYDM_DBG(dm, DBG_ANT_DIV, "[ BDC_DIV_HOLD_STATE ] >> [BDC_DIV_TRAIN_STATE]\n");
+					odm_div_train_state_setting(dm);
 				} else {
-					p_dm_bdc_table->bdc_hold_counter--;
-					p_dm_bdc_table->BDC_state = BDC_DIV_HOLD_STATE;
-					odm_bd_ccoex_type_with_bfer_client(p_dm, DIVON_CSIOFF);
-					PHYDM_DBG(p_dm, DBG_ANT_DIV, ("[ BDC_DIV_HOLD_STATE ] >> [BDC_DIV_HOLD_STATE]\n"));
+					dm_bdc_table->bdc_hold_counter--;
+					dm_bdc_table->BDC_state = BDC_DIV_HOLD_STATE;
+					odm_bd_ccoex_type_with_bfer_client(dm, DIVON_CSIOFF);
+					PHYDM_DBG(dm, DBG_ANT_DIV, "[ BDC_DIV_HOLD_STATE ] >> [BDC_DIV_HOLD_STATE]\n");
 				}
-
 			}
 
-		} else if (p_dm_bdc_table->bdc_try_flag == 1) {
-			/* 2 Set Training counter */
-			if (p_dm_bdc_table->bdc_try_counter > 1) {
-				p_dm_bdc_table->bdc_try_counter--;
-				if (p_dm_bdc_table->bdc_try_counter == 1)
-					p_dm_bdc_table->bdc_try_flag = 0;
+		} else if (dm_bdc_table->bdc_try_flag == 1) {
+			/* @2 Set Training counter */
+			if (dm_bdc_table->bdc_try_counter > 1) {
+				dm_bdc_table->bdc_try_counter--;
+				if (dm_bdc_table->bdc_try_counter == 1)
+					dm_bdc_table->bdc_try_flag = 0;
 
-				PHYDM_DBG(p_dm, DBG_ANT_DIV, ("Training !!\n"));
+				PHYDM_DBG(dm, DBG_ANT_DIV, "Training !!\n");
 				/* return ; */
 			}
-
 		}
-
 	}
 
-	PHYDM_DBG(p_dm, DBG_ANT_DIV, ("\n[end]\n"));
-
-#endif /* #if(DM_ODM_SUPPORT_TYPE  == ODM_AP) */
-
-
-
-
-
+	PHYDM_DBG(dm, DBG_ANT_DIV, "\n[end]\n");
 
+#endif /* @#if(DM_ODM_SUPPORT_TYPE  == ODM_AP) */
 }
 
 #endif
-#endif /* #ifdef BEAMFORMING_SUPPORT */
-
+#endif /* @#ifdef PHYDM_BEAMFORMING_SUPPORT*/
 
 #if (RTL8188E_SUPPORT == 1)
 
-
-void
-odm_rx_hw_ant_div_init_88e(
-	void		*p_dm_void
-)
+void odm_rx_hw_ant_div_init_88e(void *dm_void)
 {
-	struct PHY_DM_STRUCT		*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	u32	value32;
-	struct phydm_fat_struct	*p_dm_fat_table = &p_dm->dm_fat_table;
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	u32 value32;
+	struct phydm_fat_struct *fat_tab = &dm->dm_fat_table;
 
-#if 0
-	if (*(p_dm->p_mp_mode) == true) {
-		odm_set_bb_reg(p_dm, ODM_REG_IGI_A_11N, BIT(7), 0); /* disable HW AntDiv */
-		odm_set_bb_reg(p_dm, ODM_REG_LNA_SWITCH_11N, BIT(31), 1);  /* 1:CG, 0:CS */
-		return;
-	}
-#endif
+	PHYDM_DBG(dm, DBG_ANT_DIV, "[%s]=====>\n", __func__);
 
-	PHYDM_DBG(p_dm, DBG_ANT_DIV, ("***8188E AntDiv_Init =>  ant_div_type=[CGCS_RX_HW_ANTDIV]\n"));
-
-	/* MAC setting */
-	value32 = odm_get_mac_reg(p_dm, ODM_REG_ANTSEL_PIN_11N, MASKDWORD);
-	odm_set_mac_reg(p_dm, ODM_REG_ANTSEL_PIN_11N, MASKDWORD, value32 | (BIT(23) | BIT(25))); /* Reg4C[25]=1, Reg4C[23]=1 for pin output */
+	/* @MAC setting */
+	value32 = odm_get_mac_reg(dm, ODM_REG_ANTSEL_PIN_11N, MASKDWORD);
+	odm_set_mac_reg(dm, ODM_REG_ANTSEL_PIN_11N, MASKDWORD,
+			value32 | (BIT(23) | BIT(25)));
+			/* Reg4C[25]=1, Reg4C[23]=1 for pin output */
 	/* Pin Settings */
-	odm_set_bb_reg(p_dm, ODM_REG_PIN_CTRL_11N, BIT(9) | BIT(8), 0);/* reg870[8]=1'b0, reg870[9]=1'b0		 */ /* antsel antselb by HW */
-	odm_set_bb_reg(p_dm, ODM_REG_RX_ANT_CTRL_11N, BIT(10), 0);	/* reg864[10]=1'b0	 */ /* antsel2 by HW */
-	odm_set_bb_reg(p_dm, ODM_REG_LNA_SWITCH_11N, BIT(22), 1);	/* regb2c[22]=1'b0	 */ /* disable CS/CG switch */
-	odm_set_bb_reg(p_dm, ODM_REG_LNA_SWITCH_11N, BIT(31), 1);	/* regb2c[31]=1'b1	 */ /* output at CG only */
+	odm_set_bb_reg(dm, ODM_REG_PIN_CTRL_11N, BIT(9) | BIT(8), 0);
+			/* reg870[8]=1'b0, reg870[9]=1'b0 */
+			/* antsel antselb by HW */
+	odm_set_bb_reg(dm, ODM_REG_RX_ANT_CTRL_11N, BIT(10), 0);
+			/* reg864[10]=1'b0 */ /* antsel2 by HW */
+	odm_set_bb_reg(dm, ODM_REG_LNA_SWITCH_11N, BIT(22), 1);
+			/* regb2c[22]=1'b0 */ /* disable CS/CG switch */
+	odm_set_bb_reg(dm, ODM_REG_LNA_SWITCH_11N, BIT(31), 1);
+			/* regb2c[31]=1'b1 */ /* output at CG only */
 	/* OFDM Settings */
-	odm_set_bb_reg(p_dm, ODM_REG_ANTDIV_PARA1_11N, MASKDWORD, 0x000000a0);
-	/* CCK Settings */
-	odm_set_bb_reg(p_dm, ODM_REG_BB_PWR_SAV4_11N, BIT(7), 1); /* Fix CCK PHY status report issue */
-	odm_set_bb_reg(p_dm, ODM_REG_CCK_ANTDIV_PARA2_11N, BIT(4), 1); /* CCK complete HW AntDiv within 64 samples */
+	odm_set_bb_reg(dm, ODM_REG_ANTDIV_PARA1_11N, MASKDWORD, 0x000000a0);
+	/* @CCK Settings */
+	odm_set_bb_reg(dm, ODM_REG_BB_PWR_SAV4_11N, BIT(7), 1);
+			/* @Fix CCK PHY status report issue */
+	odm_set_bb_reg(dm, ODM_REG_CCK_ANTDIV_PARA2_11N, BIT(4), 1);
+			/* @CCK complete HW AntDiv within 64 samples */
 
-	odm_set_bb_reg(p_dm, ODM_REG_ANT_MAPPING1_11N, 0xFFFF, 0x0001);	/* antenna mapping table */
+	odm_set_bb_reg(dm, ODM_REG_ANT_MAPPING1_11N, 0xFFFF, 0x0001);
+			/* @antenna mapping table */
 
-	p_dm_fat_table->enable_ctrl_frame_antdiv = 1;
+	fat_tab->enable_ctrl_frame_antdiv = 1;
 }
 
-void
-odm_trx_hw_ant_div_init_88e(
-	void		*p_dm_void
-)
+void odm_trx_hw_ant_div_init_88e(void *dm_void)
 {
-	struct PHY_DM_STRUCT		*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	u32	value32;
-	struct phydm_fat_struct	*p_dm_fat_table = &p_dm->dm_fat_table;
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	u32 value32;
+	struct phydm_fat_struct *fat_tab = &dm->dm_fat_table;
 
-#if 0
-	if (*(p_dm->p_mp_mode) == true) {
-		odm_set_bb_reg(p_dm, ODM_REG_IGI_A_11N, BIT(7), 0); /* disable HW AntDiv */
-		odm_set_bb_reg(p_dm, ODM_REG_RX_ANT_CTRL_11N, BIT(5) | BIT4 | BIT3, 0); /* Default RX   (0/1) */
-		return;
-	}
-#endif
 
-	PHYDM_DBG(p_dm, DBG_ANT_DIV, ("***8188E AntDiv_Init =>  ant_div_type=[CG_TRX_HW_ANTDIV (SPDT)]\n"));
+	PHYDM_DBG(dm, DBG_ANT_DIV, "[%s]=====>\n", __func__);
 
-	/* MAC setting */
-	value32 = odm_get_mac_reg(p_dm, ODM_REG_ANTSEL_PIN_11N, MASKDWORD);
-	odm_set_mac_reg(p_dm, ODM_REG_ANTSEL_PIN_11N, MASKDWORD, value32 | (BIT(23) | BIT(25))); /* Reg4C[25]=1, Reg4C[23]=1 for pin output */
+	/* @MAC setting */
+	value32 = odm_get_mac_reg(dm, ODM_REG_ANTSEL_PIN_11N, MASKDWORD);
+	odm_set_mac_reg(dm, ODM_REG_ANTSEL_PIN_11N, MASKDWORD,
+			value32 | (BIT(23) | BIT(25)));
+			/* Reg4C[25]=1, Reg4C[23]=1 for pin output */
 	/* Pin Settings */
-	odm_set_bb_reg(p_dm, ODM_REG_PIN_CTRL_11N, BIT(9) | BIT(8), 0);/* reg870[8]=1'b0, reg870[9]=1'b0		 */ /* antsel antselb by HW */
-	odm_set_bb_reg(p_dm, ODM_REG_RX_ANT_CTRL_11N, BIT(10), 0);	/* reg864[10]=1'b0	 */ /* antsel2 by HW */
-	odm_set_bb_reg(p_dm, ODM_REG_LNA_SWITCH_11N, BIT(22), 0);	/* regb2c[22]=1'b0	 */ /* disable CS/CG switch */
-	odm_set_bb_reg(p_dm, ODM_REG_LNA_SWITCH_11N, BIT(31), 1);	/* regb2c[31]=1'b1	 */ /* output at CG only */
+	odm_set_bb_reg(dm, ODM_REG_PIN_CTRL_11N, BIT(9) | BIT(8), 0);
+			/* reg870[8]=1'b0, reg870[9]=1'b0 */
+			/* antsel antselb by HW */
+	odm_set_bb_reg(dm, ODM_REG_RX_ANT_CTRL_11N, BIT(10), 0);
+			/* reg864[10]=1'b0 */ /* antsel2 by HW */
+	odm_set_bb_reg(dm, ODM_REG_LNA_SWITCH_11N, BIT(22), 0);
+			/* regb2c[22]=1'b0 */ /* disable CS/CG switch */
+	odm_set_bb_reg(dm, ODM_REG_LNA_SWITCH_11N, BIT(31), 1);
+			/* regb2c[31]=1'b1 */ /* output at CG only */
 	/* OFDM Settings */
-	odm_set_bb_reg(p_dm, ODM_REG_ANTDIV_PARA1_11N, MASKDWORD, 0x000000a0);
-	/* CCK Settings */
-	odm_set_bb_reg(p_dm, ODM_REG_BB_PWR_SAV4_11N, BIT(7), 1); /* Fix CCK PHY status report issue */
-	odm_set_bb_reg(p_dm, ODM_REG_CCK_ANTDIV_PARA2_11N, BIT(4), 1); /* CCK complete HW AntDiv within 64 samples */
-
-	/* antenna mapping table */
-	if (!p_dm->is_mp_chip) { /* testchip */
-		odm_set_bb_reg(p_dm, ODM_REG_RX_DEFUALT_A_11N, BIT(10) | BIT(9) | BIT(8), 1);	/* Reg858[10:8]=3'b001 */
-		odm_set_bb_reg(p_dm, ODM_REG_RX_DEFUALT_A_11N, BIT(13) | BIT(12) | BIT(11), 2);	/* Reg858[13:11]=3'b010 */
-	} else /* MPchip */
-		odm_set_bb_reg(p_dm, ODM_REG_ANT_MAPPING1_11N, MASKDWORD, 0x0201);	/*Reg914=3'b010, Reg915=3'b001*/
-
-	p_dm_fat_table->enable_ctrl_frame_antdiv = 1;
+	odm_set_bb_reg(dm, ODM_REG_ANTDIV_PARA1_11N, MASKDWORD, 0x000000a0);
+	/* @CCK Settings */
+	odm_set_bb_reg(dm, ODM_REG_BB_PWR_SAV4_11N, BIT(7), 1);
+			/* @Fix CCK PHY status report issue */
+	odm_set_bb_reg(dm, ODM_REG_CCK_ANTDIV_PARA2_11N, BIT(4), 1);
+			/* @CCK complete HW AntDiv within 64 samples */
+
+	/* @antenna mapping table */
+	if (!dm->is_mp_chip) { /* testchip */
+		odm_set_bb_reg(dm, ODM_REG_RX_DEFAULT_A_11N, 0x700, 1);
+				/* Reg858[10:8]=3'b001 */
+		odm_set_bb_reg(dm, ODM_REG_RX_DEFAULT_A_11N, 0x3800, 2);
+				/* Reg858[13:11]=3'b010 */
+	} else /* @MPchip */
+		odm_set_bb_reg(dm, ODM_REG_ANT_MAPPING1_11N, MASKDWORD, 0x0201);
+				/*Reg914=3'b010, Reg915=3'b001*/
+
+	fat_tab->enable_ctrl_frame_antdiv = 1;
 }
 
-
 #if (defined(CONFIG_5G_CG_SMART_ANT_DIVERSITY)) || (defined(CONFIG_2G_CG_SMART_ANT_DIVERSITY))
-void
-odm_smart_hw_ant_div_init_88e(
-	void		*p_dm_void
-)
+void odm_smart_hw_ant_div_init_88e(
+	void *dm_void)
 {
-	struct PHY_DM_STRUCT		*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	u32	value32, i;
-	struct phydm_fat_struct	*p_dm_fat_table = &p_dm->dm_fat_table;
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	u32 value32, i;
+	struct phydm_fat_struct *fat_tab = &dm->dm_fat_table;
 
-	PHYDM_DBG(p_dm, DBG_ANT_DIV, ("***8188E AntDiv_Init =>  ant_div_type=[CG_TRX_SMART_ANTDIV]\n"));
+	PHYDM_DBG(dm, DBG_ANT_DIV,
+		  "***8188E AntDiv_Init =>  ant_div_type=[CG_TRX_SMART_ANTDIV]\n");
 
 #if 0
-	if (*(p_dm->p_mp_mode) == true) {
-		PHYDM_DBG(p_dm, ODM_COMP_INIT, ("p_dm->ant_div_type: %d\n", p_dm->ant_div_type));
+	if (*dm->mp_mode == true) {
+		PHYDM_DBG(dm, ODM_COMP_INIT, "dm->ant_div_type: %d\n",
+			  dm->ant_div_type);
 		return;
 	}
 #endif
 
-	p_dm_fat_table->train_idx = 0;
-	p_dm_fat_table->fat_state = FAT_PREPARE_STATE;
+	fat_tab->train_idx = 0;
+	fat_tab->fat_state = FAT_PREPARE_STATE;
 
-	p_dm->fat_comb_a = 5;
-	p_dm->antdiv_intvl = 0x64; /* 100ms */
+	dm->fat_comb_a = 5;
+	dm->antdiv_intvl = 0x64; /* @100ms */
 
 	for (i = 0; i < 6; i++)
-		p_dm_fat_table->bssid[i] = 0;
-	for (i = 0; i < (p_dm->fat_comb_a) ; i++) {
-		p_dm_fat_table->ant_sum_rssi[i] = 0;
-		p_dm_fat_table->ant_rssi_cnt[i] = 0;
-		p_dm_fat_table->ant_ave_rssi[i] = 0;
+		fat_tab->bssid[i] = 0;
+	for (i = 0; i < (dm->fat_comb_a); i++) {
+		fat_tab->ant_sum_rssi[i] = 0;
+		fat_tab->ant_rssi_cnt[i] = 0;
+		fat_tab->ant_ave_rssi[i] = 0;
 	}
 
-	/* MAC setting */
-	value32 = odm_get_mac_reg(p_dm, 0x4c, MASKDWORD);
-	odm_set_mac_reg(p_dm, 0x4c, MASKDWORD, value32 | (BIT(23) | BIT(25))); /* Reg4C[25]=1, Reg4C[23]=1 for pin output */
-	value32 = odm_get_mac_reg(p_dm,  0x7B4, MASKDWORD);
-	odm_set_mac_reg(p_dm, 0x7b4, MASKDWORD, value32 | (BIT(16) | BIT(17))); /* Reg7B4[16]=1 enable antenna training, Reg7B4[17]=1 enable A2 match */
+	/* @MAC setting */
+	value32 = odm_get_mac_reg(dm, R_0x4c, MASKDWORD);
+	odm_set_mac_reg(dm, R_0x4c, MASKDWORD, value32 | (BIT(23) | BIT(25))); /* Reg4C[25]=1, Reg4C[23]=1 for pin output */
+	value32 = odm_get_mac_reg(dm, R_0x7b4, MASKDWORD);
+	odm_set_mac_reg(dm, R_0x7b4, MASKDWORD, value32 | (BIT(16) | BIT(17))); /* Reg7B4[16]=1 enable antenna training, Reg7B4[17]=1 enable A2 match */
 	/* value32 = platform_efio_read_4byte(adapter, 0x7B4); */
 	/* platform_efio_write_4byte(adapter, 0x7b4, value32|BIT(18));	 */ /* append MACID in reponse packet */
 
-	/* Match MAC ADDR */
-	odm_set_mac_reg(p_dm, 0x7b4, 0xFFFF, 0);
-	odm_set_mac_reg(p_dm, 0x7b0, MASKDWORD, 0);
-
-	odm_set_bb_reg(p_dm, 0x870, BIT(9) | BIT(8), 0);/* reg870[8]=1'b0, reg870[9]=1'b0		 */ /* antsel antselb by HW */
-	odm_set_bb_reg(p_dm, 0x864, BIT(10), 0);	/* reg864[10]=1'b0	 */ /* antsel2 by HW */
-	odm_set_bb_reg(p_dm, 0xb2c, BIT(22), 0);	/* regb2c[22]=1'b0	 */ /* disable CS/CG switch */
-	odm_set_bb_reg(p_dm, 0xb2c, BIT(31), 0);	/* regb2c[31]=1'b1	 */ /* output at CS only */
-	odm_set_bb_reg(p_dm, 0xca4, MASKDWORD, 0x000000a0);
-
-	/* antenna mapping table */
-	if (p_dm->fat_comb_a == 2) {
-		if (!p_dm->is_mp_chip) { /* testchip */
-			odm_set_bb_reg(p_dm, 0x858, BIT(10) | BIT(9) | BIT(8), 1);	/* Reg858[10:8]=3'b001 */
-			odm_set_bb_reg(p_dm, 0x858, BIT(13) | BIT(12) | BIT(11), 2);	/* Reg858[13:11]=3'b010 */
-		} else { /* MPchip */
-			odm_set_bb_reg(p_dm, 0x914, MASKBYTE0, 1);
-			odm_set_bb_reg(p_dm, 0x914, MASKBYTE1, 2);
+	/* @Match MAC ADDR */
+	odm_set_mac_reg(dm, R_0x7b4, 0xFFFF, 0);
+	odm_set_mac_reg(dm, R_0x7b0, MASKDWORD, 0);
+
+	odm_set_bb_reg(dm, R_0x870, BIT(9) | BIT(8), 0); /* reg870[8]=1'b0, reg870[9]=1'b0		 */ /* antsel antselb by HW */
+	odm_set_bb_reg(dm, R_0x864, BIT(10), 0); /* reg864[10]=1'b0	 */ /* antsel2 by HW */
+	odm_set_bb_reg(dm, R_0xb2c, BIT(22), 0); /* regb2c[22]=1'b0	 */ /* disable CS/CG switch */
+	odm_set_bb_reg(dm, R_0xb2c, BIT(31), 0); /* regb2c[31]=1'b1	 */ /* output at CS only */
+	odm_set_bb_reg(dm, R_0xca4, MASKDWORD, 0x000000a0);
+
+	/* @antenna mapping table */
+	if (dm->fat_comb_a == 2) {
+		if (!dm->is_mp_chip) { /* testchip */
+			odm_set_bb_reg(dm, R_0x858, BIT(10) | BIT(9) | BIT(8), 1); /* Reg858[10:8]=3'b001 */
+			odm_set_bb_reg(dm, R_0x858, BIT(13) | BIT(12) | BIT(11), 2); /* Reg858[13:11]=3'b010 */
+		} else { /* @MPchip */
+			odm_set_bb_reg(dm, R_0x914, MASKBYTE0, 1);
+			odm_set_bb_reg(dm, R_0x914, MASKBYTE1, 2);
 		}
 	} else {
-		if (!p_dm->is_mp_chip) { /* testchip */
-			odm_set_bb_reg(p_dm, 0x858, BIT(10) | BIT(9) | BIT(8), 0);	/* Reg858[10:8]=3'b000 */
-			odm_set_bb_reg(p_dm, 0x858, BIT(13) | BIT(12) | BIT(11), 1);	/* Reg858[13:11]=3'b001 */
-			odm_set_bb_reg(p_dm, 0x878, BIT(16), 0);
-			odm_set_bb_reg(p_dm, 0x858, BIT(15) | BIT(14), 2);	/* (Reg878[0],Reg858[14:15])=3'b010 */
-			odm_set_bb_reg(p_dm, 0x878, BIT(19) | BIT(18) | BIT(17), 3); /* Reg878[3:1]=3b'011 */
-			odm_set_bb_reg(p_dm, 0x878, BIT(22) | BIT(21) | BIT(20), 4); /* Reg878[6:4]=3b'100 */
-			odm_set_bb_reg(p_dm, 0x878, BIT(25) | BIT(24) | BIT(23), 5); /* Reg878[9:7]=3b'101 */
-			odm_set_bb_reg(p_dm, 0x878, BIT(28) | BIT(27) | BIT(26), 6); /* Reg878[12:10]=3b'110 */
-			odm_set_bb_reg(p_dm, 0x878, BIT(31) | BIT(30) | BIT(29), 7); /* Reg878[15:13]=3b'111 */
-		} else { /* MPchip */
-			odm_set_bb_reg(p_dm, 0x914, MASKBYTE0, 4);     /* 0: 3b'000 */
-			odm_set_bb_reg(p_dm, 0x914, MASKBYTE1, 2);     /* 1: 3b'001 */
-			odm_set_bb_reg(p_dm, 0x914, MASKBYTE2, 0);     /* 2: 3b'010 */
-			odm_set_bb_reg(p_dm, 0x914, MASKBYTE3, 1);     /* 3: 3b'011 */
-			odm_set_bb_reg(p_dm, 0x918, MASKBYTE0, 3);     /* 4: 3b'100 */
-			odm_set_bb_reg(p_dm, 0x918, MASKBYTE1, 5);     /* 5: 3b'101 */
-			odm_set_bb_reg(p_dm, 0x918, MASKBYTE2, 6);     /* 6: 3b'110 */
-			odm_set_bb_reg(p_dm, 0x918, MASKBYTE3, 255); /* 7: 3b'111 */
+		if (!dm->is_mp_chip) { /* testchip */
+			odm_set_bb_reg(dm, R_0x858, BIT(10) | BIT(9) | BIT(8), 0); /* Reg858[10:8]=3'b000 */
+			odm_set_bb_reg(dm, R_0x858, BIT(13) | BIT(12) | BIT(11), 1); /* Reg858[13:11]=3'b001 */
+			odm_set_bb_reg(dm, R_0x878, BIT(16), 0);
+			odm_set_bb_reg(dm, R_0x858, BIT(15) | BIT(14), 2); /* @(Reg878[0],Reg858[14:15])=3'b010 */
+			odm_set_bb_reg(dm, R_0x878, BIT(19) | BIT(18) | BIT(17), 3); /* Reg878[3:1]=3b'011 */
+			odm_set_bb_reg(dm, R_0x878, BIT(22) | BIT(21) | BIT(20), 4); /* Reg878[6:4]=3b'100 */
+			odm_set_bb_reg(dm, R_0x878, BIT(25) | BIT(24) | BIT(23), 5); /* Reg878[9:7]=3b'101 */
+			odm_set_bb_reg(dm, R_0x878, BIT(28) | BIT(27) | BIT(26), 6); /* Reg878[12:10]=3b'110 */
+			odm_set_bb_reg(dm, R_0x878, BIT(31) | BIT(30) | BIT(29), 7); /* Reg878[15:13]=3b'111 */
+		} else { /* @MPchip */
+			odm_set_bb_reg(dm, R_0x914, MASKBYTE0, 4); /* @0: 3b'000 */
+			odm_set_bb_reg(dm, R_0x914, MASKBYTE1, 2); /* @1: 3b'001 */
+			odm_set_bb_reg(dm, R_0x914, MASKBYTE2, 0); /* @2: 3b'010 */
+			odm_set_bb_reg(dm, R_0x914, MASKBYTE3, 1); /* @3: 3b'011 */
+			odm_set_bb_reg(dm, R_0x918, MASKBYTE0, 3); /* @4: 3b'100 */
+			odm_set_bb_reg(dm, R_0x918, MASKBYTE1, 5); /* @5: 3b'101 */
+			odm_set_bb_reg(dm, R_0x918, MASKBYTE2, 6); /* @6: 3b'110 */
+			odm_set_bb_reg(dm, R_0x918, MASKBYTE3, 255); /* @7: 3b'111 */
 		}
 	}
 
-	/* Default ant setting when no fast training */
-	odm_set_bb_reg(p_dm, 0x864, BIT(5) | BIT(4) | BIT(3), 0);	/* Default RX */
-	odm_set_bb_reg(p_dm, 0x864, BIT(8) | BIT(7) | BIT(6), 1);	/* Optional RX */
-	odm_set_bb_reg(p_dm, 0x860, BIT(14) | BIT(13) | BIT(12), 0); /* Default TX */
+	/* @Default ant setting when no fast training */
+	odm_set_bb_reg(dm, R_0x864, BIT(5) | BIT(4) | BIT(3), 0); /* @Default RX */
+	odm_set_bb_reg(dm, R_0x864, BIT(8) | BIT(7) | BIT(6), 1); /* Optional RX */
+	odm_set_bb_reg(dm, R_0x860, BIT(14) | BIT(13) | BIT(12), 0); /* @Default TX */
 
-	/* Enter Traing state */
-	odm_set_bb_reg(p_dm, 0x864, BIT(2) | BIT(1) | BIT(0), (p_dm->fat_comb_a - 1));	/* reg864[2:0]=3'd6	 */ /* ant combination=reg864[2:0]+1 */
+	/* @Enter Traing state */
+	odm_set_bb_reg(dm, R_0x864, BIT(2) | BIT(1) | BIT(0), (dm->fat_comb_a - 1)); /* reg864[2:0]=3'd6	 */ /* ant combination=reg864[2:0]+1 */
 
+#if 0
 	/* SW Control */
 	/* phy_set_bb_reg(adapter, 0x864, BIT10, 1); */
 	/* phy_set_bb_reg(adapter, 0x870, BIT9, 1); */
@@ -992,907 +1110,1320 @@ odm_smart_hw_ant_div_init_88e(
 	/* phy_set_bb_reg(adapter, 0x864, BIT11, 1); */
 	/* phy_set_bb_reg(adapter, 0x860, BIT9, 0); */
 	/* phy_set_bb_reg(adapter, 0x860, BIT8, 0); */
+#endif
 }
 #endif
 
-#endif /* #if (RTL8188E_SUPPORT == 1) */
-
+#endif /* @#if (RTL8188E_SUPPORT == 1) */
 
 #if (RTL8192E_SUPPORT == 1)
-void
-odm_rx_hw_ant_div_init_92e(
-	void		*p_dm_void
-)
+void odm_rx_hw_ant_div_init_92e(void *dm_void)
 {
-	struct PHY_DM_STRUCT		*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	struct phydm_fat_struct	*p_dm_fat_table = &p_dm->dm_fat_table;
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct phydm_fat_struct *fat_tab = &dm->dm_fat_table;
 
 #if 0
-	if (*(p_dm->p_mp_mode) == true) {
-		odm_ant_div_on_off(p_dm, ANTDIV_OFF);
-		odm_set_bb_reg(p_dm, 0xc50, BIT(8), 0); /* r_rxdiv_enable_anta  regc50[8]=1'b0  0: control by c50[9] */
-		odm_set_bb_reg(p_dm, 0xc50, BIT(9), 1);  /* 1:CG, 0:CS */
+	if (*dm->mp_mode == true) {
+		odm_ant_div_on_off(dm, ANTDIV_OFF);
+		odm_set_bb_reg(dm, R_0xc50, BIT(8), 0);
+		/* r_rxdiv_enable_anta  regc50[8]=1'b0  0: control by c50[9] */
+		odm_set_bb_reg(dm, R_0xc50, BIT(9), 1);
+		/* @1:CG, 0:CS */
 		return;
 	}
 #endif
 
-	PHYDM_DBG(p_dm, DBG_ANT_DIV, ("***8192E AntDiv_Init =>  ant_div_type=[CGCS_RX_HW_ANTDIV]\n"));
+	PHYDM_DBG(dm, DBG_ANT_DIV, "[%s]=====>\n", __func__);
 
 	/* Pin Settings */
-	odm_set_bb_reg(p_dm, 0x870, BIT(8), 0);/* reg870[8]=1'b0,     */ /* "antsel" is controled by HWs */
-	odm_set_bb_reg(p_dm, 0xc50, BIT(8), 1); /* regc50[8]=1'b1   */ /* " CS/CG switching" is controled by HWs */
+	odm_set_bb_reg(dm, R_0x870, BIT(8), 0);
+		/* reg870[8]=1'b0,   antsel is controled by HWs */
+	odm_set_bb_reg(dm, R_0xc50, BIT(8), 1);
+		/* regc50[8]=1'b1    CS/CG switching is controled by HWs*/
 
-	/* Mapping table */
-	odm_set_bb_reg(p_dm, 0x914, 0xFFFF, 0x0100); /* antenna mapping table */
+	/* @Mapping table */
+	odm_set_bb_reg(dm, R_0x914, 0xFFFF, 0x0100);
+		/* @antenna mapping table */
 
 	/* OFDM Settings */
-	odm_set_bb_reg(p_dm, 0xca4, 0x7FF, 0xA0); /* thershold */
-	odm_set_bb_reg(p_dm, 0xca4, 0x7FF000, 0x0); /* bias */
-
-	/* CCK Settings */
-	odm_set_bb_reg(p_dm, 0xa04, 0xF000000, 0); /* Select which path to receive for CCK_1 & CCK_2 */
-	odm_set_bb_reg(p_dm, 0xb34, BIT(30), 0); /* (92E) ANTSEL_CCK_opt = r_en_antsel_cck? ANTSEL_CCK: 1'b0 */
-	odm_set_bb_reg(p_dm, 0xa74, BIT(7), 1); /* Fix CCK PHY status report issue */
-	odm_set_bb_reg(p_dm, 0xa0c, BIT(4), 1); /* CCK complete HW AntDiv within 64 samples */
+	odm_set_bb_reg(dm, R_0xca4, 0x7FF, 0xA0); /* thershold */
+	odm_set_bb_reg(dm, R_0xca4, 0x7FF000, 0x0); /* @bias */
+
+	/* @CCK Settings */
+	odm_set_bb_reg(dm, R_0xa04, 0xF000000, 0);
+		/* Select which path to receive for CCK_1 & CCK_2 */
+	odm_set_bb_reg(dm, R_0xb34, BIT(30), 0);
+		/* @(92E) ANTSEL_CCK_opt = r_en_antsel_cck? ANTSEL_CCK: 1'b0 */
+	odm_set_bb_reg(dm, R_0xa74, BIT(7), 1);
+		/* @Fix CCK PHY status report issue */
+	odm_set_bb_reg(dm, R_0xa0c, BIT(4), 1);
+		/* @CCK complete HW AntDiv within 64 samples */
 
 #ifdef ODM_EVM_ENHANCE_ANTDIV
-	phydm_evm_sw_antdiv_init(p_dm);
+	phydm_evm_sw_antdiv_init(dm);
 #endif
-
 }
 
-void
-odm_trx_hw_ant_div_init_92e(
-	void		*p_dm_void
-)
+void odm_trx_hw_ant_div_init_92e(void *dm_void)
 {
-	struct PHY_DM_STRUCT		*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
 
 #if 0
-	if (*(p_dm->p_mp_mode) == true) {
-		odm_ant_div_on_off(p_dm, ANTDIV_OFF);
-		odm_set_bb_reg(p_dm, 0xc50, BIT(8), 0); /* r_rxdiv_enable_anta  regc50[8]=1'b0  0: control by c50[9] */
-		odm_set_bb_reg(p_dm, 0xc50, BIT(9), 1);  /* 1:CG, 0:CS */
+	if (*dm->mp_mode == true) {
+		odm_ant_div_on_off(dm, ANTDIV_OFF);
+		odm_set_bb_reg(dm, R_0xc50, BIT(8), 0); /* r_rxdiv_enable_anta  regc50[8]=1'b0  0: control by c50[9] */
+		odm_set_bb_reg(dm, R_0xc50, BIT(9), 1);  /* @1:CG, 0:CS */
 		return;
 	}
 #endif
 
-	PHYDM_DBG(p_dm, DBG_ANT_DIV, ("***8192E AntDiv_Init =>  ant_div_type=[ Only for DIR605, CG_TRX_HW_ANTDIV]\n"));
-
-	/* 3 --RFE pin setting--------- */
-	/* [MAC] */
-	odm_set_mac_reg(p_dm, 0x38, BIT(11), 1);            /* DBG PAD Driving control (GPIO 8) */
-	odm_set_mac_reg(p_dm, 0x4c, BIT(23), 0);            /* path-A, RFE_CTRL_3 */
-	odm_set_mac_reg(p_dm, 0x4c, BIT(29), 1);            /* path-A, RFE_CTRL_8 */
-	/* [BB] */
-	odm_set_bb_reg(p_dm, 0x944, BIT(3), 1);              /* RFE_buffer */
-	odm_set_bb_reg(p_dm, 0x944, BIT(8), 1);
-	odm_set_bb_reg(p_dm, 0x940, BIT(7) | BIT(6), 0x0); /* r_rfe_path_sel_   (RFE_CTRL_3) */
-	odm_set_bb_reg(p_dm, 0x940, BIT(17) | BIT(16), 0x0); /* r_rfe_path_sel_   (RFE_CTRL_8) */
-	odm_set_bb_reg(p_dm, 0x944, BIT(31), 0);     /* RFE_buffer */
-	odm_set_bb_reg(p_dm, 0x92C, BIT(3), 0);     /* rfe_inv  (RFE_CTRL_3) */
-	odm_set_bb_reg(p_dm, 0x92C, BIT(8), 1);     /* rfe_inv  (RFE_CTRL_8) */
-	odm_set_bb_reg(p_dm, 0x930, 0xF000, 0x8);           /* path-A, RFE_CTRL_3 */
-	odm_set_bb_reg(p_dm, 0x934, 0xF, 0x8);           /* path-A, RFE_CTRL_8 */
-	/* 3 ------------------------- */
+	PHYDM_DBG(dm, DBG_ANT_DIV, "[%s]=====>\n", __func__);
+
+	/* @3 --RFE pin setting--------- */
+	/* @[MAC] */
+	odm_set_mac_reg(dm, R_0x38, BIT(11), 1);
+		/* @DBG PAD Driving control (GPIO 8) */
+	odm_set_mac_reg(dm, R_0x4c, BIT(23), 0); /* path-A, RFE_CTRL_3 */
+	odm_set_mac_reg(dm, R_0x4c, BIT(29), 1); /* path-A, RFE_CTRL_8 */
+	/* @[BB] */
+	odm_set_bb_reg(dm, R_0x944, BIT(3), 1); /* RFE_buffer */
+	odm_set_bb_reg(dm, R_0x944, BIT(8), 1);
+	odm_set_bb_reg(dm, R_0x940, BIT(7) | BIT(6), 0x0);
+		/* r_rfe_path_sel_   (RFE_CTRL_3) */
+	odm_set_bb_reg(dm, R_0x940, BIT(17) | BIT(16), 0x0);
+		/* r_rfe_path_sel_   (RFE_CTRL_8) */
+	odm_set_bb_reg(dm, R_0x944, BIT(31), 0); /* RFE_buffer */
+	odm_set_bb_reg(dm, R_0x92c, BIT(3), 0); /* rfe_inv  (RFE_CTRL_3) */
+	odm_set_bb_reg(dm, R_0x92c, BIT(8), 1); /* rfe_inv  (RFE_CTRL_8) */
+	odm_set_bb_reg(dm, R_0x930, 0xF000, 0x8); /* path-A, RFE_CTRL_3 */
+	odm_set_bb_reg(dm, R_0x934, 0xF, 0x8); /* path-A, RFE_CTRL_8 */
+	/* @3 ------------------------- */
 
 	/* Pin Settings */
-	odm_set_bb_reg(p_dm, 0xC50, BIT(8), 0);	/* path-A  	 */ /* disable CS/CG switch */
+	odm_set_bb_reg(dm, R_0xc50, BIT(8), 0);
+		/* path-A  */ /* disable CS/CG switch */
 
 #if 0
-	/* Let it follows PHY_REG for bit9 setting */
-	if (p_dm->priv->pshare->rf_ft_var.use_ext_pa || p_dm->priv->pshare->rf_ft_var.use_ext_lna)
-		odm_set_bb_reg(p_dm, 0xC50, BIT(9), 1);	/* path-A 	output at CS */
+	/* @Let it follows PHY_REG for bit9 setting */
+	if (dm->priv->pshare->rf_ft_var.use_ext_pa ||
+	    dm->priv->pshare->rf_ft_var.use_ext_lna)
+		odm_set_bb_reg(dm, R_0xc50, BIT(9), 1);/* path-A output at CS */
 	else
-		odm_set_bb_reg(p_dm, 0xC50, BIT(9), 0);	/* path-A 	output at CG ->normal power */
+		odm_set_bb_reg(dm, R_0xc50, BIT(9), 0);
+			/* path-A output at CG ->normal power */
 #endif
 
-	odm_set_bb_reg(p_dm, 0x870, BIT(9) | BIT(8), 0);	/* path-A*/	/* antsel antselb by HW */
-	odm_set_bb_reg(p_dm, 0xB38, BIT(10), 0);	/* path-A	*/	/* antsel2 by HW */
+	odm_set_bb_reg(dm, R_0x870, BIT(9) | BIT(8), 0);
+		/* path-A*/ /* antsel antselb by HW */
+	odm_set_bb_reg(dm, R_0xb38, BIT(10), 0);/* path-A*/ /* antsel2 by HW */
 
-	/* Mapping table */
-	odm_set_bb_reg(p_dm, 0x914, 0xFFFF, 0x0100); /* antenna mapping table */
+	/* @Mapping table */
+	odm_set_bb_reg(dm, R_0x914, 0xFFFF, 0x0100);
+		/* @antenna mapping table */
 
 	/* OFDM Settings */
-	odm_set_bb_reg(p_dm, 0xca4, 0x7FF, 0xA0); /* thershold */
-	odm_set_bb_reg(p_dm, 0xca4, 0x7FF000, 0x0); /* bias */
-
-	/* CCK Settings */
-	odm_set_bb_reg(p_dm, 0xa04, 0xF000000, 0); /* Select which path to receive for CCK_1 & CCK_2 */
-	odm_set_bb_reg(p_dm, 0xb34, BIT(30), 0); /* (92E) ANTSEL_CCK_opt = r_en_antsel_cck? ANTSEL_CCK: 1'b0 */
-	odm_set_bb_reg(p_dm, 0xa74, BIT(7), 1); /* Fix CCK PHY status report issue */
-	odm_set_bb_reg(p_dm, 0xa0c, BIT(4), 1); /* CCK complete HW AntDiv within 64 samples */
+	odm_set_bb_reg(dm, R_0xca4, 0x7FF, 0xA0); /* thershold */
+	odm_set_bb_reg(dm, R_0xca4, 0x7FF000, 0x0); /* @bias */
+
+	/* @CCK Settings */
+	odm_set_bb_reg(dm, R_0xa04, 0xF000000, 0);
+		/* Select which path to receive for CCK_1 & CCK_2 */
+	odm_set_bb_reg(dm, R_0xb34, BIT(30), 0);
+		/* @(92E) ANTSEL_CCK_opt = r_en_antsel_cck? ANTSEL_CCK: 1'b0 */
+	odm_set_bb_reg(dm, R_0xa74, BIT(7), 1);
+		/* @Fix CCK PHY status report issue */
+	odm_set_bb_reg(dm, R_0xa0c, BIT(4), 1);
+		/* @CCK complete HW AntDiv within 64 samples */
 
 #ifdef ODM_EVM_ENHANCE_ANTDIV
-	phydm_evm_sw_antdiv_init(p_dm);
+	phydm_evm_sw_antdiv_init(dm);
 #endif
 }
 
 #if (defined(CONFIG_5G_CG_SMART_ANT_DIVERSITY)) || (defined(CONFIG_2G_CG_SMART_ANT_DIVERSITY))
-void
-odm_smart_hw_ant_div_init_92e(
-	void		*p_dm_void
-)
+void odm_smart_hw_ant_div_init_92e(
+	void *dm_void)
 {
-	struct PHY_DM_STRUCT		*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
 
-	PHYDM_DBG(p_dm, DBG_ANT_DIV, ("***8192E AntDiv_Init =>  ant_div_type=[CG_TRX_SMART_ANTDIV]\n"));
+	PHYDM_DBG(dm, DBG_ANT_DIV,
+		  "***8192E AntDiv_Init =>  ant_div_type=[CG_TRX_SMART_ANTDIV]\n");
 }
 #endif
 
-#endif /* #if (RTL8192E_SUPPORT == 1) */
+#endif /* @#if (RTL8192E_SUPPORT == 1) */
 
-#if (RTL8723D_SUPPORT == 1)
-void
-odm_trx_hw_ant_div_init_8723d(
-	void		*p_dm_void
-)
+#if (RTL8192F_SUPPORT == 1)
+void odm_rx_hw_ant_div_init_92f(void *dm_void)
 {
-	struct PHY_DM_STRUCT		*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct phydm_fat_struct *fat_tab = &dm->dm_fat_table;
 
-	PHYDM_DBG(p_dm, DBG_ANT_DIV, ("[8723D] AntDiv_Init =>  ant_div_type=[S0S1_HW_TRX_AntDiv]\n"));
+	PHYDM_DBG(dm, DBG_ANT_DIV, "[%s]=====>\n", __func__);
 
-	/*BT Coexistence*/
-	/*keep antsel_map when GNT_BT = 1*/
-	odm_set_bb_reg(p_dm, 0x864, BIT(12), 1);
-	/* Disable hw antsw & fast_train.antsw when GNT_BT=1 */
-	odm_set_bb_reg(p_dm, 0x874, BIT(23), 0);
-	/* Disable hw antsw & fast_train.antsw when BT TX/RX */
-	odm_set_bb_reg(p_dm, 0xE64, 0xFFFF0000, 0x000c);
+	/* Pin Settings */
+	odm_set_bb_reg(dm, R_0x870, BIT(8), 0);
+		/* reg870[8]=1'b0, "antsel" is controlled by HWs */
+	odm_set_bb_reg(dm, R_0xc50, BIT(8), 1);
+		/* regc50[8]=1'b1, " CS/CG switching" is controlled by HWs */
 
+	/* @Mapping table */
+	odm_set_bb_reg(dm, R_0x914, 0xFFFF, 0x0100);
+		/* @antenna mapping table */
 
-	odm_set_bb_reg(p_dm, 0x870, BIT(9) | BIT(8), 0);
-	/*PTA setting: WL_BB_SEL_BTG_TRXG_anta,  (1: HW CTRL  0: SW CTRL)*/
-	/*odm_set_bb_reg(p_dm, 0x948, BIT6, 0);*/
-	/*odm_set_bb_reg(p_dm, 0x948, BIT8, 0);*/
-	/*GNT_WL tx*/
-	odm_set_bb_reg(p_dm, 0x950, BIT(29), 0);
+	/* OFDM Settings */
+	odm_set_bb_reg(dm, R_0xca4, 0x7FF, 0xA0); /* thershold */
+	odm_set_bb_reg(dm, R_0xca4, 0x7FF000, 0x0); /* @bias */
+
+	/* @CCK Settings */
+	odm_set_bb_reg(dm, R_0xa04, 0xF000000, 0);
+		/* Select which path to receive for CCK_1 & CCK_2 */
+	odm_set_bb_reg(dm, R_0xb34, BIT(30), 0);
+		/* @(92E) ANTSEL_CCK_opt = r_en_antsel_cck? ANTSEL_CCK: 1'b0 */
+	odm_set_bb_reg(dm, R_0xa74, BIT(7), 1);
+		/* @Fix CCK PHY status report issue */
+	odm_set_bb_reg(dm, R_0xa0c, BIT(4), 1);
+		/* @CCK complete HW AntDiv within 64 samples */
 
+#ifdef ODM_EVM_ENHANCE_ANTDIV
+	phydm_evm_sw_antdiv_init(dm);
+#endif
+}
 
-	/*Mapping Table*/
-	odm_set_bb_reg(p_dm, 0x914, MASKBYTE0, 0);
-	odm_set_bb_reg(p_dm, 0x914, MASKBYTE1, 3);
-	/* odm_set_bb_reg(p_dm, 0x864, BIT5|BIT4|BIT3, 0); */
-	/* odm_set_bb_reg(p_dm, 0x864, BIT8|BIT7|BIT6, 1); */
+void odm_trx_hw_ant_div_init_92f(void *dm_void)
 
-	/* Set WLBB_SEL_RF_ON 1 if RXFIR_PWDB > 0xCcc[3:0] */
-	odm_set_bb_reg(p_dm, 0xCcc, BIT(12), 0);
-	/* Low-to-High threshold for WLBB_SEL_RF_ON when OFDM enable */
-	odm_set_bb_reg(p_dm, 0xCcc, 0x0F, 0x01);
-	/* High-to-Low threshold for WLBB_SEL_RF_ON when OFDM enable */
-	odm_set_bb_reg(p_dm, 0xCcc, 0xF0, 0x0);
-	/* b Low-to-High threshold for WLBB_SEL_RF_ON when OFDM disable ( only CCK ) */
-	odm_set_bb_reg(p_dm, 0xAbc, 0xFF, 0x06);
-	/* High-to-Low threshold for WLBB_SEL_RF_ON when OFDM disable ( only CCK ) */
-	odm_set_bb_reg(p_dm, 0xAbc, 0xFF00, 0x00);
+{
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+
+	PHYDM_DBG(dm, DBG_ANT_DIV, "[%s]=====>\n", __func__);
+	/* @3 --RFE pin setting--------- */
+	/* @[MAC] */
+	odm_set_mac_reg(dm, R_0x1048, BIT(0), 1);
+		/* @DBG PAD Driving control (gpioA_0) */
+	odm_set_mac_reg(dm, R_0x1048, BIT(1), 1);
+		/* @DBG PAD Driving control (gpioA_1) */
+	odm_set_mac_reg(dm, R_0x4c, BIT(24), 1);
+	odm_set_mac_reg(dm, R_0x1038, BIT(25) | BIT(24) | BIT(23), 0);
+		/* @gpioA_0,gpioA_1*/
+	odm_set_mac_reg(dm, R_0x4c, BIT(23), 0);
+	/* @[BB] */
+	odm_set_bb_reg(dm, R_0x944, BIT(8), 1); /* output enable */
+	odm_set_bb_reg(dm, R_0x944, BIT(9), 1);
+	odm_set_bb_reg(dm, R_0x940, BIT(16) | BIT(17), 0x0);
+		/* r_rfe_path_sel_   (RFE_CTRL_8) */
+	odm_set_bb_reg(dm, R_0x940, BIT(18) | BIT(19), 0x0);
+		/* r_rfe_path_sel_   (RFE_CTRL_9) */
+	odm_set_bb_reg(dm, R_0x944, BIT(31), 0); /* RFE_buffer_en */
+	odm_set_bb_reg(dm, R_0x92c, BIT(8), 0); /* rfe_inv  (RFE_CTRL_8) */
+	odm_set_bb_reg(dm, R_0x92c, BIT(9), 1); /* rfe_inv  (RFE_CTRL_9) */
+	odm_set_bb_reg(dm, R_0x934, 0xF, 0x8); /* path-A, RFE_CTRL_8 */
+	odm_set_bb_reg(dm, R_0x934, 0xF0, 0x8); /* path-A, RFE_CTRL_9 */
+	/* @3 ------------------------- */
 
+	/* Pin Settings */
+	odm_set_bb_reg(dm, R_0xc50, BIT(8), 0);
+		/* path-A,disable CS/CG switch */
+	odm_set_bb_reg(dm, R_0x870, BIT(9) | BIT(8), 0);
+		/* path-A*, antsel antselb by HW */
+	odm_set_bb_reg(dm, R_0xb38, BIT(10), 0); /* path-A ,antsel2 by HW */
 
-	/*OFDM HW AntDiv Parameters*/
-	odm_set_bb_reg(p_dm, 0xCA4, 0x7FF, 0xa0);
-	odm_set_bb_reg(p_dm, 0xCA4, 0x7FF000, 0x00);
-	odm_set_bb_reg(p_dm, 0xC5C, BIT(20) | BIT(19) | BIT(18), 0x04);
+	/* @Mapping table */
+	odm_set_bb_reg(dm, R_0x914, 0xFFFF, 0x0100);
+		/* @antenna mapping table */
 
-	/*CCK HW AntDiv Parameters*/
-	odm_set_bb_reg(p_dm, 0xA74, BIT(7), 1);
-	odm_set_bb_reg(p_dm, 0xA0C, BIT(4), 1);
-	odm_set_bb_reg(p_dm, 0xAA8, BIT(8), 0);
+	/* OFDM Settings */
+	odm_set_bb_reg(dm, R_0xca4, 0x7FF, 0xA0); /* thershold */
+	odm_set_bb_reg(dm, R_0xca4, 0x7FF000, 0x0); /* @bias */
+
+	/* @CCK Settings */
+	odm_set_bb_reg(dm, R_0xa04, 0xF000000, 0);
+		/* Select which path to receive for CCK_1 & CCK_2 */
+	odm_set_bb_reg(dm, R_0xb34, BIT(30), 0);
+		/* @(92E) ANTSEL_CCK_opt = r_en_antsel_cck? ANTSEL_CCK: 1'b0 */
+	odm_set_bb_reg(dm, R_0xa74, BIT(7), 1);
+		/* @Fix CCK PHY status report issue */
+	odm_set_bb_reg(dm, R_0xa0c, BIT(4), 1);
+		/* @CCK complete HW AntDiv within 64 samples */
 
-	odm_set_bb_reg(p_dm, 0xA0C, 0x0F, 0xf);
-	odm_set_bb_reg(p_dm, 0xA14, 0x1F, 0x8);
-	odm_set_bb_reg(p_dm, 0xA10, BIT(13), 0x1);
-	odm_set_bb_reg(p_dm, 0xA74, BIT(8), 0x0);
-	odm_set_bb_reg(p_dm, 0xB34, BIT(30), 0x1);
+#ifdef ODM_EVM_ENHANCE_ANTDIV
+	phydm_evm_sw_antdiv_init(dm);
+#endif
+}
+
+#endif /* @#if (RTL8192F_SUPPORT == 1) */
+
+#if (RTL8822B_SUPPORT == 1)
+void phydm_trx_hw_ant_div_init_22b(void *dm_void)
+{
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+
+	PHYDM_DBG(dm, DBG_ANT_DIV, "[%s]=====>\n", __func__);
 
-	/*disable antenna training	*/
-	odm_set_bb_reg(p_dm, 0xE08, BIT(16), 0);
-	odm_set_bb_reg(p_dm, 0xc50, BIT(8), 0);
+	/* Pin Settings */
+	odm_set_bb_reg(dm, R_0xcb8, BIT(21) | BIT(20), 0x1);
+	odm_set_bb_reg(dm, R_0xcb8, BIT(23) | BIT(22), 0x1);
+	odm_set_bb_reg(dm, R_0xc1c, BIT(7) | BIT(6), 0x0);
+	/* @------------------------- */
+
+	/* @Mapping table */
+	/* @antenna mapping table */
+	odm_set_bb_reg(dm, R_0xca4, 0xFFFF, 0x0100);
+
+	/* OFDM Settings */
+	/* thershold */
+	odm_set_bb_reg(dm, R_0x8d4, 0x7FF, 0xA0);
+	/* @bias */
+	odm_set_bb_reg(dm, R_0x8d4, 0x7FF000, 0x0);
+	odm_set_bb_reg(dm, R_0x668, BIT(3), 0x1);
+
+	/* @CCK Settings */
+	/* Select which path to receive for CCK_1 & CCK_2 */
+	odm_set_bb_reg(dm, R_0xa04, 0xF000000, 0);
+	/* @Fix CCK PHY status report issue */
+	odm_set_bb_reg(dm, R_0xa74, BIT(7), 1);
+	/* @CCK complete HW AntDiv within 64 samples */
+	odm_set_bb_reg(dm, R_0xa0c, BIT(4), 1);
+	/* @BT Coexistence */
+	/* @keep antsel_map when GNT_BT = 1 */
+	odm_set_bb_reg(dm, R_0xcac, BIT(9), 1);
+	/* @Disable hw antsw & fast_train.antsw when GNT_BT=1 */
+	odm_set_bb_reg(dm, R_0x804, BIT(4), 1);
+	/* response TX ant by RX ant */
+	odm_set_mac_reg(dm, R_0x668, BIT(3), 1);
+#if (defined(CONFIG_2T4R_ANTENNA))
+	PHYDM_DBG(dm, DBG_ANT_DIV,
+		  "***8822B AntDiv_Init =>  2T4R case\n");
+	/* Pin Settings */
+	odm_set_bb_reg(dm, R_0xeb8, BIT(21) | BIT(20), 0x1);
+	odm_set_bb_reg(dm, R_0xeb8, BIT(23) | BIT(22), 0x1);
+	odm_set_bb_reg(dm, R_0xe1c, BIT(7) | BIT(6), 0x0);
+	/* @BT Coexistence */
+	odm_set_bb_reg(dm, R_0xeac, BIT(9), 1);
+	/* @keep antsel_map when GNT_BT = 1 */
+	/* Mapping table */
+	/* antenna mapping table */
+	odm_set_bb_reg(dm, R_0xea4, 0xFFFF, 0x0100);
+	/*odm_set_bb_reg(dm, R_0x900, 0x30000, 0x3);*/
+#endif
 
+#ifdef ODM_EVM_ENHANCE_ANTDIV
+	phydm_evm_sw_antdiv_init(dm);
+#endif
 }
-/*Mingzhi 2017-05-08*/
-
-void
-odm_update_rx_idle_ant_8723d(
-	void			*p_dm_void,
-	u8			ant,
-	u32			default_ant,
-	u32			optional_ant
-)
+#endif /* @#if (RTL8822B_SUPPORT == 1) */
+
+#if (RTL8197F_SUPPORT == 1)
+void phydm_rx_hw_ant_div_init_97f(void *dm_void)
 {
-	struct PHY_DM_STRUCT		*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	struct phydm_fat_struct			*p_dm_fat_table = &p_dm->dm_fat_table;
-	struct _ADAPTER		*p_adapter = p_dm->adapter;
-	u8			count = 0;
-	
-
-/*	odm_set_bb_reg(p_dm, 0x948, BIT(6), 0x1);	*/
-	odm_set_bb_reg(p_dm, 0x948, BIT(7), default_ant);
-	odm_set_bb_reg(p_dm, 0x864, BIT(5) | BIT(4) | BIT(3), default_ant);      /*Default RX*/
-	odm_set_bb_reg(p_dm, 0x864, BIT(8) | BIT(7) | BIT(6), optional_ant);     /*Optional RX*/
-	odm_set_bb_reg(p_dm, 0x860, BIT(14) | BIT(13) | BIT(12), default_ant);    /*Default TX*/
-	p_dm_fat_table->rx_idle_ant = ant;
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct phydm_fat_struct *fat_tab = &dm->dm_fat_table;
+
+#if 0
+	if (*dm->mp_mode == true) {
+		odm_ant_div_on_off(dm, ANTDIV_OFF);
+		odm_set_bb_reg(dm, R_0xc50, BIT(8), 0);
+		/* r_rxdiv_enable_anta  regc50[8]=1'b0  0: control by c50[9] */
+		odm_set_bb_reg(dm, R_0xc50, BIT(9), 1);  /* @1:CG, 0:CS */
+		return;
+	}
+#endif
+	PHYDM_DBG(dm, DBG_ANT_DIV, "[%s]=====>\n", __func__);
+
+	/* Pin Settings */
+	odm_set_bb_reg(dm, R_0x870, BIT(8), 0);
+		/* reg870[8]=1'b0, */ /* "antsel" is controlled by HWs */
+	odm_set_bb_reg(dm, R_0xc50, BIT(8), 1);
+		/* regc50[8]=1'b1 *//*"CS/CG switching" is controlled by HWs */
 
+	/* @Mapping table */
+	odm_set_bb_reg(dm, R_0x914, 0xFFFF, 0x0100);
+		/* @antenna mapping table */
+
+	/* OFDM Settings */
+	odm_set_bb_reg(dm, R_0xca4, 0x7FF, 0xA0); /* thershold */
+	odm_set_bb_reg(dm, R_0xca4, 0x7FF000, 0x0); /* @bias */
+
+	/* @CCK Settings */
+	odm_set_bb_reg(dm, R_0xa04, 0xF000000, 0);
+		/* Select which path to receive for CCK_1 & CCK_2 */
+	odm_set_bb_reg(dm, R_0xb34, BIT(30), 0);
+		/* @(92E) ANTSEL_CCK_opt = r_en_antsel_cck? ANTSEL_CCK: 1'b0 */
+	odm_set_bb_reg(dm, R_0xa74, BIT(7), 1);
+		/* @Fix CCK PHY status report issue */
+	odm_set_bb_reg(dm, R_0xa0c, BIT(4), 1);
+		/* @CCK complete HW AntDiv within 64 samples */
+
+#ifdef ODM_EVM_ENHANCE_ANTDIV
+	phydm_evm_sw_antdiv_init(dm);
+#endif
 }
+#endif //#if (RTL8197F_SUPPORT == 1)
 
-void
-phydm_set_tx_ant_pwr_8723d(
-	void			*p_dm_void,
-	u8			ant
-)
+#if (RTL8723D_SUPPORT == 1)
+void odm_trx_hw_ant_div_init_8723d(void *dm_void)
 {
-	struct PHY_DM_STRUCT		*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	struct phydm_fat_struct			*p_dm_fat_table = &p_dm->dm_fat_table;
-	struct _ADAPTER		*p_adapter = p_dm->adapter;
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
 
-	p_dm_fat_table->rx_idle_ant = ant;
+	PHYDM_DBG(dm, DBG_ANT_DIV, "[%s]=====>\n", __func__);
+
+	/*@BT Coexistence*/
+	/*@keep antsel_map when GNT_BT = 1*/
+	odm_set_bb_reg(dm, R_0x864, BIT(12), 1);
+	/* @Disable hw antsw & fast_train.antsw when GNT_BT=1 */
+	odm_set_bb_reg(dm, R_0x874, BIT(23), 0);
+	/* @Disable hw antsw & fast_train.antsw when BT TX/RX */
+	odm_set_bb_reg(dm, R_0xe64, 0xFFFF0000, 0x000c);
+
+	odm_set_bb_reg(dm, R_0x870, BIT(9) | BIT(8), 0);
+#if 0
+	/*PTA setting: WL_BB_SEL_BTG_TRXG_anta,  (1: HW CTRL  0: SW CTRL)*/
+	/*odm_set_bb_reg(dm, R_0x948, BIT6, 0);*/
+	/*odm_set_bb_reg(dm, R_0x948, BIT8, 0);*/
+#endif
+	/*@GNT_WL tx*/
+	odm_set_bb_reg(dm, R_0x950, BIT(29), 0);
+
+	/*@Mapping Table*/
+	odm_set_bb_reg(dm, R_0x914, MASKBYTE0, 0);
+	odm_set_bb_reg(dm, R_0x914, MASKBYTE1, 3);
+#if 0
+	/* odm_set_bb_reg(dm, R_0x864, BIT5|BIT4|BIT3, 0); */
+	/* odm_set_bb_reg(dm, R_0x864, BIT8|BIT7|BIT6, 1); */
+#endif
+
+	/* Set WLBB_SEL_RF_ON 1 if RXFIR_PWDB > 0xCcc[3:0] */
+	odm_set_bb_reg(dm, R_0xccc, BIT(12), 0);
+	/* @Low-to-High threshold for WLBB_SEL_RF_ON when OFDM enable */
+	odm_set_bb_reg(dm, R_0xccc, 0x0F, 0x01);
+	/* @High-to-Low threshold for WLBB_SEL_RF_ON when OFDM enable */
+	odm_set_bb_reg(dm, R_0xccc, 0xF0, 0x0);
+	/* @b Low-to-High threshold for WLBB_SEL_RF_ON when OFDM disable (CCK)*/
+	odm_set_bb_reg(dm, R_0xabc, 0xFF, 0x06);
+	/* @High-to-Low threshold for WLBB_SEL_RF_ON when OFDM disable (CCK) */
+	odm_set_bb_reg(dm, R_0xabc, 0xFF00, 0x00);
+
+	/*OFDM HW AntDiv Parameters*/
+	odm_set_bb_reg(dm, R_0xca4, 0x7FF, 0xa0);
+	odm_set_bb_reg(dm, R_0xca4, 0x7FF000, 0x00);
+	odm_set_bb_reg(dm, R_0xc5c, BIT(20) | BIT(19) | BIT(18), 0x04);
+
+	/*@CCK HW AntDiv Parameters*/
+	odm_set_bb_reg(dm, R_0xa74, BIT(7), 1);
+	odm_set_bb_reg(dm, R_0xa0c, BIT(4), 1);
+	odm_set_bb_reg(dm, R_0xaa8, BIT(8), 0);
+
+	odm_set_bb_reg(dm, R_0xa0c, 0x0F, 0xf);
+	odm_set_bb_reg(dm, R_0xa14, 0x1F, 0x8);
+	odm_set_bb_reg(dm, R_0xa10, BIT(13), 0x1);
+	odm_set_bb_reg(dm, R_0xa74, BIT(8), 0x0);
+	odm_set_bb_reg(dm, R_0xb34, BIT(30), 0x1);
+
+	/*@disable antenna training	*/
+	odm_set_bb_reg(dm, R_0xe08, BIT(16), 0);
+	odm_set_bb_reg(dm, R_0xc50, BIT(8), 0);
+}
+/*@Mingzhi 2017-05-08*/
+
+void odm_s0s1_sw_ant_div_init_8723d(void *dm_void)
+{
+	struct dm_struct		*dm = (struct dm_struct *)dm_void;
+	struct sw_antenna_switch	*swat_tab = &dm->dm_swat_table;
+	struct phydm_fat_struct		*fat_tab = &dm->dm_fat_table;
+
+	PHYDM_DBG(dm, DBG_ANT_DIV,
+		  "***8723D AntDiv_Init => ant_div_type=[ S0S1_SW_AntDiv]\n");
+
+	/*@keep antsel_map when GNT_BT = 1*/
+	odm_set_bb_reg(dm, R_0x864, BIT(12), 1);
+
+	/* @Disable antsw when GNT_BT=1 */
+	odm_set_bb_reg(dm, R_0x874, BIT(23), 0);
+
+	/* @Mapping Table */
+	odm_set_bb_reg(dm, R_0x914, MASKBYTE0, 0);
+	odm_set_bb_reg(dm, R_0x914, MASKBYTE1, 1);
+
+	/* Output Pin Settings */
+#if 0
+	/* odm_set_bb_reg(dm, R_0x948, BIT6, 0x1); */
+#endif
+	odm_set_bb_reg(dm, R_0x870, BIT(8), 1);
+	odm_set_bb_reg(dm, R_0x870, BIT(9), 1);
+
+	/* Status init */
+	fat_tab->is_become_linked  = false;
+	swat_tab->try_flag = SWAW_STEP_INIT;
+	swat_tab->double_chk_flag = 0;
+	swat_tab->cur_antenna = MAIN_ANT;
+	swat_tab->pre_ant = MAIN_ANT;
+	dm->antdiv_counter = CONFIG_ANTDIV_PERIOD;
+
+	/* @2 [--For HW Bug setting] */
+	odm_set_bb_reg(dm, R_0x80c, BIT(21), 0); /* TX ant  by Reg */
+}
+
+void odm_update_rx_idle_ant_8723d(void *dm_void, u8 ant, u32 default_ant,
+				  u32 optional_ant)
+{
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct phydm_fat_struct *fat_tab = &dm->dm_fat_table;
+	void *adapter = dm->adapter;
+	u8 count = 0;
+
+#if (DM_ODM_SUPPORT_TYPE & (ODM_CE))
+	/*score board to BT ,a002:WL to do ant-div*/
+	odm_set_mac_reg(dm, R_0xa8, MASKHWORD, 0xa002);
+	ODM_delay_us(50);
+#endif
+#if 0
+	/*	odm_set_bb_reg(dm, R_0x948, BIT(6), 0x1);	*/
+#endif
+	if (dm->ant_div_type == S0S1_SW_ANTDIV) {
+	odm_set_bb_reg(dm, R_0x860, BIT(8), default_ant);
+	odm_set_bb_reg(dm, R_0x860, BIT(9), default_ant);
+	}
+	odm_set_bb_reg(dm, R_0x864, BIT(5) | BIT(4) | BIT(3), default_ant);
+		/*@Default RX*/
+	odm_set_bb_reg(dm, R_0x864, BIT(8) | BIT(7) | BIT(6), optional_ant);
+		/*Optional RX*/
+	odm_set_bb_reg(dm, R_0x860, BIT(14) | BIT(13) | BIT(12), default_ant);
+		/*@Default TX*/
+	fat_tab->rx_idle_ant = ant;
+#if (DM_ODM_SUPPORT_TYPE & (ODM_CE))
+	/*score board to BT ,a000:WL@S1 a001:WL@S0*/
+	if (default_ant == ANT1_2G)
+		odm_set_mac_reg(dm, R_0xa8, MASKHWORD, 0xa000);
+	else
+		odm_set_mac_reg(dm, R_0xa8, MASKHWORD, 0xa001);
+#endif
+}
+
+void phydm_set_tx_ant_pwr_8723d(void *dm_void, u8 ant)
+{
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct phydm_fat_struct *fat_tab = &dm->dm_fat_table;
+	void *adapter = dm->adapter;
+
+	fat_tab->rx_idle_ant = ant;
 
 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
-	p_adapter->HalFunc.SetTxPowerLevelHandler(p_adapter, *p_dm->p_channel);
+	((PADAPTER)adapter)->HalFunc.SetTxPowerLevelHandler(adapter, *dm->channel);
 #elif (DM_ODM_SUPPORT_TYPE == ODM_CE)
-	rtw_hal_set_tx_power_level(p_adapter, *p_dm->p_channel);
+	rtw_hal_set_tx_power_level(adapter, *dm->channel);
+#endif
+}
 #endif
 
+#if (RTL8721D_SUPPORT)
+#if 0
+void odm_update_rx_idle_ant_8721d(void *dm_void, u8 ant, u32 default_ant,
+				  u32 optional_ant)
+{
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct phydm_fat_struct *fat_tab = &dm->dm_fat_table;
+
+	odm_set_bb_reg(dm, R_0x864, BIT(5) | BIT(4) | BIT(3), default_ant);
+	/*@Default RX*/
+	odm_set_bb_reg(dm, R_0x864, BIT(8) | BIT(7) | BIT(6), optional_ant);
+	/*@Optional RX*/
+	odm_set_bb_reg(dm, R_0x860, BIT(14) | BIT(13) | BIT(12), default_ant);
+	/*@Default TX*/
+	fat_tab->rx_idle_ant = ant;
 }
 #endif
 
+void odm_trx_hw_ant_div_init_8721d(void *dm_void)
+{
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+
+	PHYDM_DBG(dm, DBG_ANT_DIV,
+		  "[8721D] AntDiv_Init =>  ant_div_type=[CG_TRX_HW_ANTDIV]\n");
+
+	/*@BT Coexistence*/
+	/*@keep antsel_map when GNT_BT = 1*/
+	odm_set_bb_reg(dm, R_0x864, BIT(12), 1);
+	/* @Disable hw antsw & fast_train.antsw when GNT_BT=1 */
+	odm_set_bb_reg(dm, R_0x874, BIT(23), 0);
+	/* @Disable hw antsw & fast_train.antsw when BT TX/RX */
+	odm_set_bb_reg(dm, R_0xe64, 0xFFFF0000, 0x000c);
+
+	odm_set_bb_reg(dm, R_0x870, BIT(9) | BIT(8), 0);
+	odm_set_bb_reg(dm, R_0x804, 0xF00, 1); /* r_keep_rfpin */
+	odm_set_bb_reg(dm, R_0x930, 0xF, 8); /* RFE CTRL_0 ANTSEL */
+	odm_set_bb_reg(dm, R_0x930, 0xF0, 9); /* RFE CTRL_1 ANTSEL_B */
+	/*PTA setting: WL_BB_SEL_BTG_TRXG_anta,  (1: HW CTRL  0: SW CTRL)*/
+	/*odm_set_bb_reg(dm, R_0x948, BIT6, 0);*/
+	/*odm_set_bb_reg(dm, R_0x948, BIT8, 0);*/
+	/*@GNT_WL tx*/
+	odm_set_bb_reg(dm, R_0x950, BIT(29), 0);
+
+	/*@Mapping Table*/
+	odm_set_bb_reg(dm, R_0x914, MASKBYTE0, 0);
+	odm_set_bb_reg(dm, R_0x914, MASKBYTE1, 1);
+	/* odm_set_bb_reg(dm, R_0x864, BIT5|BIT4|BIT3, 0); */
+	/* odm_set_bb_reg(dm, R_0x864, BIT8|BIT7|BIT6, 1); */
+
+	/* Set WLBB_SEL_RF_ON 1 if RXFIR_PWDB > 0xCcc[3:0] */
+	odm_set_bb_reg(dm, R_0xccc, BIT(12), 0);
+	/* @Low-to-High threshold for WLBB_SEL_RF_ON */
+	/*when OFDM enable */
+	odm_set_bb_reg(dm, R_0xccc, 0x0F, 0x01);
+	/* @High-to-Low threshold for WLBB_SEL_RF_ON */
+	/* when OFDM enable */
+	odm_set_bb_reg(dm, R_0xccc, 0xF0, 0x0);
+	/* @b Low-to-High threshold for WLBB_SEL_RF_ON*/
+	/*when OFDM disable ( only CCK ) */
+	odm_set_bb_reg(dm, R_0xabc, 0xFF, 0x06);
+	/* @High-to-Low threshold for WLBB_SEL_RF_ON*/
+	/* when OFDM disable ( only CCK ) */
+	odm_set_bb_reg(dm, R_0xabc, 0xFF00, 0x00);
+
+	/*OFDM HW AntDiv Parameters*/
+	odm_set_bb_reg(dm, R_0xca4, 0x7FF, 0xa0);
+	odm_set_bb_reg(dm, R_0xca4, 0x7FF000, 0x00);
+	odm_set_bb_reg(dm, R_0xc5c, BIT(20) | BIT(19) | BIT(18), 0x04);
+
+	/*@CCK HW AntDiv Parameters*/
+	odm_set_bb_reg(dm, R_0xa74, BIT(7), 1);
+	odm_set_bb_reg(dm, R_0xa0c, BIT(4), 1);
+	odm_set_bb_reg(dm, R_0xaa8, BIT(8), 0);
+
+	odm_set_bb_reg(dm, R_0xa0c, 0x0F, 0xf);
+	odm_set_bb_reg(dm, R_0xa14, 0x1F, 0x8);
+	odm_set_bb_reg(dm, R_0xa10, BIT(13), 0x1);
+	odm_set_bb_reg(dm, R_0xa74, BIT(8), 0x0);
+	odm_set_bb_reg(dm, R_0xb34, BIT(30), 0x1);
+
+	/*@disable antenna training	*/
+	odm_set_bb_reg(dm, R_0xe08, BIT(16), 0);
+	odm_set_bb_reg(dm, R_0xc50, BIT(8), 0);
+}
+#endif
 #if (RTL8723B_SUPPORT == 1)
-void
-odm_trx_hw_ant_div_init_8723b(
-	void		*p_dm_void
-)
+void odm_trx_hw_ant_div_init_8723b(void *dm_void)
 {
-	struct PHY_DM_STRUCT		*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
 
-	PHYDM_DBG(p_dm, DBG_ANT_DIV, ("***8723B AntDiv_Init =>  ant_div_type=[CG_TRX_HW_ANTDIV(DPDT)]\n"));
+	PHYDM_DBG(dm, DBG_ANT_DIV,
+		  "***8723B AntDiv_Init =>  ant_div_type=[CG_TRX_HW_ANTDIV(DPDT)]\n");
 
-	/* Mapping Table */
-	odm_set_bb_reg(p_dm, 0x914, MASKBYTE0, 0);
-	odm_set_bb_reg(p_dm, 0x914, MASKBYTE1, 1);
+	/* @Mapping Table */
+	odm_set_bb_reg(dm, R_0x914, MASKBYTE0, 0);
+	odm_set_bb_reg(dm, R_0x914, MASKBYTE1, 1);
 
 	/* OFDM HW AntDiv Parameters */
-	odm_set_bb_reg(p_dm, 0xCA4, 0x7FF, 0xa0); /* thershold */
-	odm_set_bb_reg(p_dm, 0xCA4, 0x7FF000, 0x00); /* bias */
+	odm_set_bb_reg(dm, R_0xca4, 0x7FF, 0xa0); /* thershold */
+	odm_set_bb_reg(dm, R_0xca4, 0x7FF000, 0x00); /* @bias */
 
-	/* CCK HW AntDiv Parameters */
-	odm_set_bb_reg(p_dm, 0xA74, BIT(7), 1); /* patch for clk from 88M to 80M */
-	odm_set_bb_reg(p_dm, 0xA0C, BIT(4), 1); /* do 64 samples */
+	/* @CCK HW AntDiv Parameters */
+	odm_set_bb_reg(dm, R_0xa74, BIT(7), 1);
+		/* patch for clk from 88M to 80M */
+	odm_set_bb_reg(dm, R_0xa0c, BIT(4), 1);
+		/* @do 64 samples */
 
-	/* BT Coexistence */
-	odm_set_bb_reg(p_dm, 0x864, BIT(12), 0); /* keep antsel_map when GNT_BT = 1 */
-	odm_set_bb_reg(p_dm, 0x874, BIT(23), 0); /* Disable hw antsw & fast_train.antsw when GNT_BT=1 */
+	/* @BT Coexistence */
+	odm_set_bb_reg(dm, R_0x864, BIT(12), 0);
+		/* @keep antsel_map when GNT_BT = 1 */
+	odm_set_bb_reg(dm, R_0x874, BIT(23), 0);
+		/* @Disable hw antsw & fast_train.antsw when GNT_BT=1 */
 
 	/* Output Pin Settings */
-	odm_set_bb_reg(p_dm, 0x870, BIT(8), 0);
-
-	odm_set_bb_reg(p_dm, 0x948, BIT(6), 0); /* WL_BB_SEL_BTG_TRXG_anta,  (1: HW CTRL  0: SW CTRL) */
-	odm_set_bb_reg(p_dm, 0x948, BIT(7), 0);
+	odm_set_bb_reg(dm, R_0x870, BIT(8), 0);
 
-	odm_set_mac_reg(p_dm, 0x40, BIT(3), 1);
-	odm_set_mac_reg(p_dm, 0x38, BIT(11), 1);
-	odm_set_mac_reg(p_dm, 0x4C,  BIT(24) | BIT(23), 2); /* select DPDT_P and DPDT_N as output pin */
+	odm_set_bb_reg(dm, R_0x948, BIT(6), 0);
+		/* WL_BB_SEL_BTG_TRXG_anta,  (1: HW CTRL  0: SW CTRL) */
+	odm_set_bb_reg(dm, R_0x948, BIT(7), 0);
 
-	odm_set_bb_reg(p_dm, 0x944, BIT(0) | BIT(1), 3); /* in/out */
-	odm_set_bb_reg(p_dm, 0x944, BIT(31), 0);
+	odm_set_mac_reg(dm, R_0x40, BIT(3), 1);
+	odm_set_mac_reg(dm, R_0x38, BIT(11), 1);
+	odm_set_mac_reg(dm, R_0x4c, BIT(24) | BIT(23), 2);
+		/* select DPDT_P and DPDT_N as output pin */
 
-	odm_set_bb_reg(p_dm, 0x92C, BIT(1), 0); /* DPDT_P non-inverse */
-	odm_set_bb_reg(p_dm, 0x92C, BIT(0), 1); /* DPDT_N inverse */
+	odm_set_bb_reg(dm, R_0x944, BIT(0) | BIT(1), 3); /* @in/out */
+	odm_set_bb_reg(dm, R_0x944, BIT(31), 0);
 
-	odm_set_bb_reg(p_dm, 0x930, 0xF0, 8); /* DPDT_P = ANTSEL[0] */
-	odm_set_bb_reg(p_dm, 0x930, 0xF, 8); /* DPDT_N = ANTSEL[0] */
+	odm_set_bb_reg(dm, R_0x92c, BIT(1), 0); /* @DPDT_P non-inverse */
+	odm_set_bb_reg(dm, R_0x92c, BIT(0), 1); /* @DPDT_N inverse */
 
-	/* 2 [--For HW Bug setting] */
-	if (p_dm->ant_type == ODM_AUTO_ANT)
-		odm_set_bb_reg(p_dm, 0xA00, BIT(15), 0); /* CCK AntDiv function block enable */
+	odm_set_bb_reg(dm, R_0x930, 0xF0, 8); /* @DPDT_P = ANTSEL[0] */
+	odm_set_bb_reg(dm, R_0x930, 0xF, 8); /* @DPDT_N = ANTSEL[0] */
 
+	/* @2 [--For HW Bug setting] */
+	if (dm->ant_type == ODM_AUTO_ANT)
+		odm_set_bb_reg(dm, R_0xa00, BIT(15), 0);
+			/* @CCK AntDiv function block enable */
 }
 
-
-
-void
-odm_s0s1_sw_ant_div_init_8723b(
-	void		*p_dm_void
-)
+void odm_s0s1_sw_ant_div_init_8723b(void *dm_void)
 {
-	struct PHY_DM_STRUCT		*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	struct _sw_antenna_switch_		*p_dm_swat_table = &p_dm->dm_swat_table;
-	struct phydm_fat_struct		*p_dm_fat_table = &p_dm->dm_fat_table;
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct sw_antenna_switch *swat_tab = &dm->dm_swat_table;
+	struct phydm_fat_struct *fat_tab = &dm->dm_fat_table;
 
-	PHYDM_DBG(p_dm, DBG_ANT_DIV, ("***8723B AntDiv_Init => ant_div_type=[ S0S1_SW_AntDiv]\n"));
+	PHYDM_DBG(dm, DBG_ANT_DIV,
+		  "***8723B AntDiv_Init => ant_div_type=[ S0S1_SW_AntDiv]\n");
 
-	/* Mapping Table */
-	odm_set_bb_reg(p_dm, 0x914, MASKBYTE0, 0);
-	odm_set_bb_reg(p_dm, 0x914, MASKBYTE1, 1);
+	/* @Mapping Table */
+	odm_set_bb_reg(dm, R_0x914, MASKBYTE0, 0);
+	odm_set_bb_reg(dm, R_0x914, MASKBYTE1, 1);
 
+#if 0
 	/* Output Pin Settings */
-	/* odm_set_bb_reg(p_dm, 0x948, BIT6, 0x1); */
-	odm_set_bb_reg(p_dm, 0x870, BIT(9) | BIT(8), 0);
-
-	p_dm_fat_table->is_become_linked  = false;
-	p_dm_swat_table->try_flag = SWAW_STEP_INIT;
-	p_dm_swat_table->double_chk_flag = 0;
+	/* odm_set_bb_reg(dm, R_0x948, BIT6, 0x1); */
+#endif
+	odm_set_bb_reg(dm, R_0x870, BIT(9) | BIT(8), 0);
 
-	/* 2 [--For HW Bug setting] */
-	odm_set_bb_reg(p_dm, 0x80C, BIT(21), 0); /* TX ant  by Reg */
+	fat_tab->is_become_linked = false;
+	swat_tab->try_flag = SWAW_STEP_INIT;
+	swat_tab->double_chk_flag = 0;
 
+	/* @2 [--For HW Bug setting] */
+	odm_set_bb_reg(dm, R_0x80c, BIT(21), 0); /* TX ant  by Reg */
 }
 
-void
-odm_update_rx_idle_ant_8723b(
-	void			*p_dm_void,
-	u8			ant,
-	u32			default_ant,
-	u32			optional_ant
-)
+void odm_update_rx_idle_ant_8723b(
+	void *dm_void,
+	u8 ant,
+	u32 default_ant,
+	u32 optional_ant)
 {
-	struct PHY_DM_STRUCT		*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	struct phydm_fat_struct			*p_dm_fat_table = &p_dm->dm_fat_table;
-	struct _ADAPTER		*p_adapter = p_dm->adapter;
-	u8			count = 0;
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct phydm_fat_struct *fat_tab = &dm->dm_fat_table;
+	void *adapter = dm->adapter;
+	u8 count = 0;
 	/*u8			u1_temp;*/
 	/*u8			h2c_parameter;*/
 
-	if ((!p_dm->is_linked) && (p_dm->ant_type == ODM_AUTO_ANT)) {
-		PHYDM_DBG(p_dm, DBG_ANT_DIV, ("[ Update Rx-Idle-ant ] 8723B: Fail to set RX antenna due to no link\n"));
+	if (!dm->is_linked && dm->ant_type == ODM_AUTO_ANT) {
+		PHYDM_DBG(dm, DBG_ANT_DIV,
+			  "[ Update Rx-Idle-ant ] 8723B: Fail to set RX antenna due to no link\n");
 		return;
 	}
 
 #if 0
 	/* Send H2C command to FW */
-	/* Enable wifi calibration */
+	/* @Enable wifi calibration */
 	h2c_parameter = true;
-	odm_fill_h2c_cmd(p_dm, ODM_H2C_WIFI_CALIBRATION, 1, &h2c_parameter);
+	odm_fill_h2c_cmd(dm, ODM_H2C_WIFI_CALIBRATION, 1, &h2c_parameter);
 
-	/* Check if H2C command sucess or not (0x1e6) */
-	u1_temp = odm_read_1byte(p_dm, 0x1e6);
+	/* @Check if H2C command sucess or not (0x1e6) */
+	u1_temp = odm_read_1byte(dm, 0x1e6);
 	while ((u1_temp != 0x1) && (count < 100)) {
 		ODM_delay_us(10);
-		u1_temp = odm_read_1byte(p_dm, 0x1e6);
+		u1_temp = odm_read_1byte(dm, 0x1e6);
 		count++;
 	}
-	PHYDM_DBG(p_dm, DBG_ANT_DIV, ("[ Update Rx-Idle-ant ] 8723B: H2C command status = %d, count = %d\n", u1_temp, count));
+	PHYDM_DBG(dm, DBG_ANT_DIV,
+		  "[ Update Rx-Idle-ant ] 8723B: H2C command status = %d, count = %d\n",
+		  u1_temp, count);
 
 	if (u1_temp == 0x1) {
-		/* Check if BT is doing IQK (0x1e7) */
+		/* @Check if BT is doing IQK (0x1e7) */
 		count = 0;
-		u1_temp = odm_read_1byte(p_dm, 0x1e7);
+		u1_temp = odm_read_1byte(dm, 0x1e7);
 		while ((!(u1_temp & BIT(0)))  && (count < 100)) {
 			ODM_delay_us(50);
-			u1_temp = odm_read_1byte(p_dm, 0x1e7);
+			u1_temp = odm_read_1byte(dm, 0x1e7);
 			count++;
 		}
-		PHYDM_DBG(p_dm, DBG_ANT_DIV, ("[ Update Rx-Idle-ant ] 8723B: BT IQK status = %d, count = %d\n", u1_temp, count));
+		PHYDM_DBG(dm, DBG_ANT_DIV,
+			  "[ Update Rx-Idle-ant ] 8723B: BT IQK status = %d, count = %d\n",
+			  u1_temp, count);
 
 		if (u1_temp & BIT(0)) {
-			odm_set_bb_reg(p_dm, 0x948, BIT(6), 0x1);
-			odm_set_bb_reg(p_dm, 0x948, BIT(9), default_ant);
-			odm_set_bb_reg(p_dm, 0x864, BIT(5) | BIT4 | BIT3, default_ant);	/* Default RX */
-			odm_set_bb_reg(p_dm, 0x864, BIT(8) | BIT7 | BIT6, optional_ant);	/* Optional RX */
-			odm_set_bb_reg(p_dm, 0x860, BIT(14) | BIT13 | BIT12, default_ant); /* Default TX */
-			p_dm_fat_table->rx_idle_ant = ant;
+			odm_set_bb_reg(dm, R_0x948, BIT(6), 0x1);
+			odm_set_bb_reg(dm, R_0x948, BIT(9), default_ant);
+			odm_set_bb_reg(dm, R_0x864, 0x38, default_ant);
+					/* @Default RX */
+			odm_set_bb_reg(dm, R_0x864, 0x1c0, optional_ant);
+					/* @Optional RX */
+			odm_set_bb_reg(dm, R_0x860, 0x7000, default_ant);
+					/* @Default TX */
+			fat_tab->rx_idle_ant = ant;
 
 			/* Set TX AGC by S0/S1 */
 			/* Need to consider Linux driver */
 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
-			p_adapter->hal_func.set_tx_power_level_handler(p_adapter, *p_dm->p_channel);
+			adapter->hal_func.set_tx_power_level_handler(adapter, *dm->channel);
 #elif (DM_ODM_SUPPORT_TYPE == ODM_CE)
-			rtw_hal_set_tx_power_level(p_adapter, *p_dm->p_channel);
+			rtw_hal_set_tx_power_level(adapter, *dm->channel);
 #endif
 
 			/* Set IQC by S0/S1 */
-			odm_set_iqc_by_rfpath(p_dm, default_ant);
-			PHYDM_DBG(p_dm, DBG_ANT_DIV, ("[ Update Rx-Idle-ant ] 8723B: Success to set RX antenna\n"));
+			odm_set_iqc_by_rfpath(dm, default_ant);
+			PHYDM_DBG(dm, DBG_ANT_DIV,
+				  "[ Update Rx-Idle-ant ] 8723B: Success to set RX antenna\n");
 		} else
-			PHYDM_DBG(p_dm, DBG_ANT_DIV, ("[ Update Rx-Idle-ant ] 8723B: Fail to set RX antenna due to BT IQK\n"));
+			PHYDM_DBG(dm, DBG_ANT_DIV,
+				  "[ Update Rx-Idle-ant ] 8723B: Fail to set RX antenna due to BT IQK\n");
 	} else
-		PHYDM_DBG(p_dm, DBG_ANT_DIV, ("[ Update Rx-Idle-ant ] 8723B: Fail to set RX antenna due to H2C command fail\n"));
+		PHYDM_DBG(dm, DBG_ANT_DIV,
+			  "[ Update Rx-Idle-ant ] 8723B: Fail to set RX antenna due to H2C command fail\n");
 
 	/* Send H2C command to FW */
-	/* Disable wifi calibration */
+	/* @Disable wifi calibration */
 	h2c_parameter = false;
-	odm_fill_h2c_cmd(p_dm, ODM_H2C_WIFI_CALIBRATION, 1, &h2c_parameter);
+	odm_fill_h2c_cmd(dm, ODM_H2C_WIFI_CALIBRATION, 1, &h2c_parameter);
 #else
 
-	odm_set_bb_reg(p_dm, 0x948, BIT(6), 0x1);
-	odm_set_bb_reg(p_dm, 0x948, BIT(9), default_ant);
-	odm_set_bb_reg(p_dm, 0x864, BIT(5) | BIT(4) | BIT(3), default_ant);      /*Default RX*/
-	odm_set_bb_reg(p_dm, 0x864, BIT(8) | BIT(7) | BIT(6), optional_ant);     /*Optional RX*/
-	odm_set_bb_reg(p_dm, 0x860, BIT(14) | BIT(13) | BIT(12), default_ant);    /*Default TX*/
-	p_dm_fat_table->rx_idle_ant = ant;
-
-	/* Set TX AGC by S0/S1 */
-	/* Need to consider Linux driver */
+	odm_set_bb_reg(dm, R_0x948, BIT(6), 0x1);
+	odm_set_bb_reg(dm, R_0x948, BIT(9), default_ant);
+	odm_set_bb_reg(dm, R_0x864, BIT(5) | BIT(4) | BIT(3), default_ant);
+			/*@Default RX*/
+	odm_set_bb_reg(dm, R_0x864, BIT(8) | BIT(7) | BIT(6), optional_ant);
+			/*Optional RX*/
+	odm_set_bb_reg(dm, R_0x860, BIT(14) | BIT(13) | BIT(12), default_ant);
+			/*@Default TX*/
+	fat_tab->rx_idle_ant = ant;
+
+/* Set TX AGC by S0/S1 */
+/* Need to consider Linux driver */
 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
-	p_adapter->HalFunc.SetTxPowerLevelHandler(p_adapter, *p_dm->p_channel);
+	((PADAPTER)adapter)->HalFunc.SetTxPowerLevelHandler(adapter, *dm->channel);
 #elif (DM_ODM_SUPPORT_TYPE == ODM_CE)
-	rtw_hal_set_tx_power_level(p_adapter, *p_dm->p_channel);
+	rtw_hal_set_tx_power_level(adapter, *dm->channel);
 #endif
 
 	/* Set IQC by S0/S1 */
-	odm_set_iqc_by_rfpath(p_dm, default_ant);
-	PHYDM_DBG(p_dm, DBG_ANT_DIV, ("[ Update Rx-Idle-ant ] 8723B: Success to set RX antenna\n"));
+	odm_set_iqc_by_rfpath(dm, default_ant);
+	PHYDM_DBG(dm, DBG_ANT_DIV,
+		  "[ Update Rx-Idle-ant ] 8723B: Success to set RX antenna\n");
 
 #endif
 }
 
 boolean
-phydm_is_bt_enable_8723b(
-	void			*p_dm_void
-)
+phydm_is_bt_enable_8723b(void *dm_void)
 {
-	struct PHY_DM_STRUCT		*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	u32			bt_state;
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	u32 bt_state;
+#if 0
 	/*u32			reg75;*/
 
-	/*reg75 = odm_get_bb_reg(p_dm, 0x74, BIT8);*/
-	/*odm_set_bb_reg(p_dm, 0x74, BIT8, 0x0);*/
-	odm_set_bb_reg(p_dm, 0xa0, BIT(24) | BIT(25) | BIT(26), 0x5);
-	bt_state = odm_get_bb_reg(p_dm, 0xa0, (BIT(3) | BIT(2) | BIT(1) | BIT(0)));
-	/*odm_set_bb_reg(p_dm, 0x74, BIT8, reg75);*/
+	/*reg75 = odm_get_bb_reg(dm, R_0x74, BIT8);*/
+	/*odm_set_bb_reg(dm, R_0x74, BIT8, 0x0);*/
+#endif
+	odm_set_bb_reg(dm, R_0xa0, BIT(24) | BIT(25) | BIT(26), 0x5);
+	bt_state = odm_get_bb_reg(dm, R_0xa0, 0xf);
+#if 0
+	/*odm_set_bb_reg(dm, R_0x74, BIT8, reg75);*/
+#endif
 
-	if ((bt_state == 4) || (bt_state == 7) || (bt_state == 9) || (bt_state == 13))
+	if (bt_state == 4 || bt_state == 7 || bt_state == 9 || bt_state == 13)
 		return true;
 	else
 		return false;
 }
-#endif /* #if (RTL8723B_SUPPORT == 1) */
+#endif /* @#if (RTL8723B_SUPPORT == 1) */
 
 #if (RTL8821A_SUPPORT == 1)
 
-void
-odm_trx_hw_ant_div_init_8821a(
-	void		*p_dm_void
-)
+void odm_trx_hw_ant_div_init_8821a(void *dm_void)
 {
-	struct PHY_DM_STRUCT		*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
 
-	PHYDM_DBG(p_dm, DBG_ANT_DIV, ("***8821A AntDiv_Init => ant_div_type=[ CG_TRX_HW_ANTDIV (DPDT)]\n"));
+	PHYDM_DBG(dm, DBG_ANT_DIV, "[%s]=====>\n", __func__);
 
 	/* Output Pin Settings */
-	odm_set_mac_reg(p_dm, 0x4C, BIT(25), 0);
+	odm_set_mac_reg(dm, R_0x4c, BIT(25), 0);
 
-	odm_set_mac_reg(p_dm, 0x64, BIT(29), 1); /* PAPE by WLAN control */
-	odm_set_mac_reg(p_dm, 0x64, BIT(28), 1); /* LNAON by WLAN control */
+	odm_set_mac_reg(dm, R_0x64, BIT(29), 1); /* PAPE by WLAN control */
+	odm_set_mac_reg(dm, R_0x64, BIT(28), 1); /* @LNAON by WLAN control */
 
-	odm_set_bb_reg(p_dm, 0xCB8, BIT(16), 0);
+	odm_set_bb_reg(dm, R_0xcb8, BIT(16), 0);
 
-	odm_set_mac_reg(p_dm, 0x4C, BIT(23), 0); /* select DPDT_P and DPDT_N as output pin */
-	odm_set_mac_reg(p_dm, 0x4C, BIT(24), 1); /* by WLAN control */
-	odm_set_bb_reg(p_dm, 0xCB4, 0xF, 8); /* DPDT_P = ANTSEL[0] */
-	odm_set_bb_reg(p_dm, 0xCB4, 0xF0, 8); /* DPDT_N = ANTSEL[0] */
-	odm_set_bb_reg(p_dm, 0xCB4, BIT(29), 0); /* DPDT_P non-inverse */
-	odm_set_bb_reg(p_dm, 0xCB4, BIT(28), 1); /* DPDT_N inverse */
+	odm_set_mac_reg(dm, R_0x4c, BIT(23), 0);
+			/* select DPDT_P and DPDT_N as output pin */
+	odm_set_mac_reg(dm, R_0x4c, BIT(24), 1); /* @by WLAN control */
+	odm_set_bb_reg(dm, R_0xcb4, 0xF, 8); /* @DPDT_P = ANTSEL[0] */
+	odm_set_bb_reg(dm, R_0xcb4, 0xF0, 8); /* @DPDT_N = ANTSEL[0] */
+	odm_set_bb_reg(dm, R_0xcb4, BIT(29), 0); /* @DPDT_P non-inverse */
+	odm_set_bb_reg(dm, R_0xcb4, BIT(28), 1); /* @DPDT_N inverse */
 
-	/* Mapping Table */
-	odm_set_bb_reg(p_dm, 0xCA4, MASKBYTE0, 0);
-	odm_set_bb_reg(p_dm, 0xCA4, MASKBYTE1, 1);
+	/* @Mapping Table */
+	odm_set_bb_reg(dm, R_0xca4, MASKBYTE0, 0);
+	odm_set_bb_reg(dm, R_0xca4, MASKBYTE1, 1);
 
 	/* OFDM HW AntDiv Parameters */
-	odm_set_bb_reg(p_dm, 0x8D4, 0x7FF, 0xA0); /* thershold */
-	odm_set_bb_reg(p_dm, 0x8D4, 0x7FF000, 0x10); /* bias */
+	odm_set_bb_reg(dm, R_0x8d4, 0x7FF, 0xA0); /* thershold */
+	odm_set_bb_reg(dm, R_0x8d4, 0x7FF000, 0x10); /* @bias */
 
-	/* CCK HW AntDiv Parameters */
-	odm_set_bb_reg(p_dm, 0xA74, BIT(7), 1); /* patch for clk from 88M to 80M */
-	odm_set_bb_reg(p_dm, 0xA0C, BIT(4), 1); /* do 64 samples */
+	/* @CCK HW AntDiv Parameters */
+	odm_set_bb_reg(dm, R_0xa74, BIT(7), 1);
+		/* patch for clk from 88M to 80M */
+	odm_set_bb_reg(dm, R_0xa0c, BIT(4), 1); /* @do 64 samples */
 
-	odm_set_bb_reg(p_dm, 0x800, BIT(25), 0); /* ANTSEL_CCK sent to the smart_antenna circuit */
-	odm_set_bb_reg(p_dm, 0xA00, BIT(15), 0); /* CCK AntDiv function block enable */
+	odm_set_bb_reg(dm, R_0x800, BIT(25), 0);
+		/* @ANTSEL_CCK sent to the smart_antenna circuit */
+	odm_set_bb_reg(dm, R_0xa00, BIT(15), 0);
+		/* @CCK AntDiv function block enable */
 
-	/* BT Coexistence */
-	odm_set_bb_reg(p_dm, 0xCAC, BIT(9), 1); /* keep antsel_map when GNT_BT = 1 */
-	odm_set_bb_reg(p_dm, 0x804, BIT(4), 1); /* Disable hw antsw & fast_train.antsw when GNT_BT=1 */
+	/* @BT Coexistence */
+	odm_set_bb_reg(dm, R_0xcac, BIT(9), 1);
+		/* @keep antsel_map when GNT_BT = 1 */
+	odm_set_bb_reg(dm, R_0x804, BIT(4), 1);
+		/* @Disable hw antsw & fast_train.antsw when GNT_BT=1 */
 
-	odm_set_bb_reg(p_dm, 0x8CC, BIT(20) | BIT(19) | BIT(18), 3); /* settling time of antdiv by RF LNA = 100ns */
+	odm_set_bb_reg(dm, R_0x8cc, BIT(20) | BIT(19) | BIT(18), 3);
+		/* settling time of antdiv by RF LNA = 100ns */
 
 	/* response TX ant by RX ant */
-	odm_set_mac_reg(p_dm, 0x668, BIT(3), 1);
-
+	odm_set_mac_reg(dm, R_0x668, BIT(3), 1);
 }
 
-void
-odm_s0s1_sw_ant_div_init_8821a(
-	void		*p_dm_void
-)
+void odm_s0s1_sw_ant_div_init_8821a(void *dm_void)
 {
-	struct PHY_DM_STRUCT		*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	struct _sw_antenna_switch_		*p_dm_swat_table = &p_dm->dm_swat_table;
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct sw_antenna_switch *swat_tab = &dm->dm_swat_table;
 
-	PHYDM_DBG(p_dm, DBG_ANT_DIV, ("***8821A AntDiv_Init => ant_div_type=[ S0S1_SW_AntDiv]\n"));
+	PHYDM_DBG(dm, DBG_ANT_DIV, "[%s]=====>\n", __func__);
 
 	/* Output Pin Settings */
-	odm_set_mac_reg(p_dm, 0x4C, BIT(25), 0);
+	odm_set_mac_reg(dm, R_0x4c, BIT(25), 0);
 
-	odm_set_mac_reg(p_dm, 0x64, BIT(29), 1); /* PAPE by WLAN control */
-	odm_set_mac_reg(p_dm, 0x64, BIT(28), 1); /* LNAON by WLAN control */
+	odm_set_mac_reg(dm, R_0x64, BIT(29), 1); /* PAPE by WLAN control */
+	odm_set_mac_reg(dm, R_0x64, BIT(28), 1); /* @LNAON by WLAN control */
 
-	odm_set_bb_reg(p_dm, 0xCB8, BIT(16), 0);
+	odm_set_bb_reg(dm, R_0xcb8, BIT(16), 0);
 
-	odm_set_mac_reg(p_dm, 0x4C, BIT(23), 0); /* select DPDT_P and DPDT_N as output pin */
-	odm_set_mac_reg(p_dm, 0x4C, BIT(24), 1); /* by WLAN control */
-	odm_set_bb_reg(p_dm, 0xCB4, 0xF, 8); /* DPDT_P = ANTSEL[0] */
-	odm_set_bb_reg(p_dm, 0xCB4, 0xF0, 8); /* DPDT_N = ANTSEL[0] */
-	odm_set_bb_reg(p_dm, 0xCB4, BIT(29), 0); /* DPDT_P non-inverse */
-	odm_set_bb_reg(p_dm, 0xCB4, BIT(28), 1); /* DPDT_N inverse */
+	odm_set_mac_reg(dm, R_0x4c, BIT(23), 0);
+		/* select DPDT_P and DPDT_N as output pin */
+	odm_set_mac_reg(dm, R_0x4c, BIT(24), 1); /* @by WLAN control */
+	odm_set_bb_reg(dm, R_0xcb4, 0xF, 8); /* @DPDT_P = ANTSEL[0] */
+	odm_set_bb_reg(dm, R_0xcb4, 0xF0, 8); /* @DPDT_N = ANTSEL[0] */
+	odm_set_bb_reg(dm, R_0xcb4, BIT(29), 0); /* @DPDT_P non-inverse */
+	odm_set_bb_reg(dm, R_0xcb4, BIT(28), 1); /* @DPDT_N inverse */
 
-	/* Mapping Table */
-	odm_set_bb_reg(p_dm, 0xCA4, MASKBYTE0, 0);
-	odm_set_bb_reg(p_dm, 0xCA4, MASKBYTE1, 1);
+	/* @Mapping Table */
+	odm_set_bb_reg(dm, R_0xca4, MASKBYTE0, 0);
+	odm_set_bb_reg(dm, R_0xca4, MASKBYTE1, 1);
 
 	/* OFDM HW AntDiv Parameters */
-	odm_set_bb_reg(p_dm, 0x8D4, 0x7FF, 0xA0); /* thershold */
-	odm_set_bb_reg(p_dm, 0x8D4, 0x7FF000, 0x10); /* bias */
+	odm_set_bb_reg(dm, R_0x8d4, 0x7FF, 0xA0); /* thershold */
+	odm_set_bb_reg(dm, R_0x8d4, 0x7FF000, 0x10); /* @bias */
 
-	/* CCK HW AntDiv Parameters */
-	odm_set_bb_reg(p_dm, 0xA74, BIT(7), 1); /* patch for clk from 88M to 80M */
-	odm_set_bb_reg(p_dm, 0xA0C, BIT(4), 1); /* do 64 samples */
+	/* @CCK HW AntDiv Parameters */
+	odm_set_bb_reg(dm, R_0xa74, BIT(7), 1);
+		/* patch for clk from 88M to 80M */
+	odm_set_bb_reg(dm, R_0xa0c, BIT(4), 1); /* @do 64 samples */
 
-	odm_set_bb_reg(p_dm, 0x800, BIT(25), 0); /* ANTSEL_CCK sent to the smart_antenna circuit */
-	odm_set_bb_reg(p_dm, 0xA00, BIT(15), 0); /* CCK AntDiv function block enable */
+	odm_set_bb_reg(dm, R_0x800, BIT(25), 0);
+		/* @ANTSEL_CCK sent to the smart_antenna circuit */
+	odm_set_bb_reg(dm, R_0xa00, BIT(15), 0);
+		/* @CCK AntDiv function block enable */
 
-	/* BT Coexistence */
-	odm_set_bb_reg(p_dm, 0xCAC, BIT(9), 1); /* keep antsel_map when GNT_BT = 1 */
-	odm_set_bb_reg(p_dm, 0x804, BIT(4), 1); /* Disable hw antsw & fast_train.antsw when GNT_BT=1 */
+	/* @BT Coexistence */
+	odm_set_bb_reg(dm, R_0xcac, BIT(9), 1);
+		/* @keep antsel_map when GNT_BT = 1 */
+	odm_set_bb_reg(dm, R_0x804, BIT(4), 1);
+		/* @Disable hw antsw & fast_train.antsw when GNT_BT=1 */
 
-	odm_set_bb_reg(p_dm, 0x8CC, BIT(20) | BIT(19) | BIT(18), 3); /* settling time of antdiv by RF LNA = 100ns */
+	odm_set_bb_reg(dm, R_0x8cc, BIT(20) | BIT(19) | BIT(18), 3);
+		/* settling time of antdiv by RF LNA = 100ns */
 
 	/* response TX ant by RX ant */
-	odm_set_mac_reg(p_dm, 0x668, BIT(3), 1);
-
-
-	odm_set_bb_reg(p_dm, 0x900, BIT(18), 0);
+	odm_set_mac_reg(dm, R_0x668, BIT(3), 1);
 
-	p_dm_swat_table->try_flag = SWAW_STEP_INIT;
-	p_dm_swat_table->double_chk_flag = 0;
-	p_dm_swat_table->cur_antenna = MAIN_ANT;
-	p_dm_swat_table->pre_antenna = MAIN_ANT;
-	p_dm_swat_table->swas_no_link_state = 0;
+	odm_set_bb_reg(dm, R_0x900, BIT(18), 0);
 
+	swat_tab->try_flag = SWAW_STEP_INIT;
+	swat_tab->double_chk_flag = 0;
+	swat_tab->cur_antenna = MAIN_ANT;
+	swat_tab->pre_ant = MAIN_ANT;
+	swat_tab->swas_no_link_state = 0;
 }
-#endif /* #if (RTL8821A_SUPPORT == 1) */
+#endif /* @#if (RTL8821A_SUPPORT == 1) */
 
 #if (RTL8821C_SUPPORT == 1)
-void
-odm_trx_hw_ant_div_init_8821c(
-	void		*p_dm_void
-)
+void odm_trx_hw_ant_div_init_8821c(void *dm_void)
 {
-	struct PHY_DM_STRUCT		*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
 
-	PHYDM_DBG(p_dm, DBG_ANT_DIV, ("***8821C AntDiv_Init => ant_div_type=[ CG_TRX_HW_ANTDIV (DPDT)]\n"));
+	PHYDM_DBG(dm, DBG_ANT_DIV, "[%s]=====>\n", __func__);
 	/* Output Pin Settings */
-	odm_set_mac_reg(p_dm, 0x4C, BIT(25), 0);
+	odm_set_mac_reg(dm, R_0x4c, BIT(25), 0);
 
-	odm_set_mac_reg(p_dm, 0x64, BIT(29), 1); /* PAPE by WLAN control */
-	odm_set_mac_reg(p_dm, 0x64, BIT(28), 1); /* LNAON by WLAN control */
+	odm_set_mac_reg(dm, R_0x64, BIT(29), 1); /* PAPE by WLAN control */
+	odm_set_mac_reg(dm, R_0x64, BIT(28), 1); /* @LNAON by WLAN control */
 
-	odm_set_bb_reg(p_dm, 0xCB8, BIT(16), 0);
+	odm_set_bb_reg(dm, R_0xcb8, BIT(16), 0);
 
-	odm_set_mac_reg(p_dm, 0x4C, BIT(23), 0); /* select DPDT_P and DPDT_N as output pin */
-	odm_set_mac_reg(p_dm, 0x4C, BIT(24), 1); /* by WLAN control */
-	odm_set_bb_reg(p_dm, 0xCB4, 0xF, 8); /* DPDT_P = ANTSEL[0] */
-	odm_set_bb_reg(p_dm, 0xCB4, 0xF0, 8); /* DPDT_N = ANTSEL[0] */
-	odm_set_bb_reg(p_dm, 0xCB4, BIT(29), 0); /* DPDT_P non-inverse */
-	odm_set_bb_reg(p_dm, 0xCB4, BIT(28), 1); /* DPDT_N inverse */
+	odm_set_mac_reg(dm, R_0x4c, BIT(23), 0);
+		/* select DPDT_P and DPDT_N as output pin */
+	odm_set_mac_reg(dm, R_0x4c, BIT(24), 1); /* @by WLAN control */
+	odm_set_bb_reg(dm, R_0xcb4, 0xF, 8); /* @DPDT_P = ANTSEL[0] */
+	odm_set_bb_reg(dm, R_0xcb4, 0xF0, 8); /* @DPDT_N = ANTSEL[0] */
+	odm_set_bb_reg(dm, R_0xcb4, BIT(29), 0); /* @DPDT_P non-inverse */
+	odm_set_bb_reg(dm, R_0xcb4, BIT(28), 1); /* @DPDT_N inverse */
 
-	/* Mapping Table */
-	odm_set_bb_reg(p_dm, 0xCA4, MASKBYTE0, 0);
-	odm_set_bb_reg(p_dm, 0xCA4, MASKBYTE1, 1);
+	/* @Mapping Table */
+	odm_set_bb_reg(dm, R_0xca4, MASKBYTE0, 0);
+	odm_set_bb_reg(dm, R_0xca4, MASKBYTE1, 1);
 
 	/* OFDM HW AntDiv Parameters */
-	odm_set_bb_reg(p_dm, 0x8D4, 0x7FF, 0xA0); /* thershold */
-	odm_set_bb_reg(p_dm, 0x8D4, 0x7FF000, 0x10); /* bias */
+	odm_set_bb_reg(dm, R_0x8d4, 0x7FF, 0xA0); /* thershold */
+	odm_set_bb_reg(dm, R_0x8d4, 0x7FF000, 0x10); /* @bias */
 
-	/* CCK HW AntDiv Parameters */
-	odm_set_bb_reg(p_dm, 0xA74, BIT(7), 1); /* patch for clk from 88M to 80M */
-	odm_set_bb_reg(p_dm, 0xA0C, BIT(4), 1); /* do 64 samples */
+	/* @CCK HW AntDiv Parameters */
+	odm_set_bb_reg(dm, R_0xa74, BIT(7), 1);
+		/* patch for clk from 88M to 80M */
+	odm_set_bb_reg(dm, R_0xa0c, BIT(4), 1); /* @do 64 samples */
 
-	odm_set_bb_reg(p_dm, 0x800, BIT(25), 0); /* ANTSEL_CCK sent to the smart_antenna circuit */
-	odm_set_bb_reg(p_dm, 0xA00, BIT(15), 0); /* CCK AntDiv function block enable */
+	odm_set_bb_reg(dm, R_0x800, BIT(25), 0);
+		/* @ANTSEL_CCK sent to the smart_antenna circuit */
+	odm_set_bb_reg(dm, R_0xa00, BIT(15), 0);
+		/* @CCK AntDiv function block enable */
 
-	/* BT Coexistence */
-	odm_set_bb_reg(p_dm, 0xCAC, BIT(9), 1); /* keep antsel_map when GNT_BT = 1 */
-	odm_set_bb_reg(p_dm, 0x804, BIT(4), 1); /* Disable hw antsw & fast_train.antsw when GNT_BT=1 */
+	/* @BT Coexistence */
+	odm_set_bb_reg(dm, R_0xcac, BIT(9), 1);
+		/* @keep antsel_map when GNT_BT = 1 */
+	odm_set_bb_reg(dm, R_0x804, BIT(4), 1);
+		/* @Disable hw antsw & fast_train.antsw when GNT_BT=1 */
 
 	/* Timming issue */
-	odm_set_bb_reg(p_dm, 0x818, BIT(23) | BIT(22) | BIT(21) | BIT(20), 0); /*keep antidx after tx for ACK ( unit x 3.2 mu sec)*/
-	odm_set_bb_reg(p_dm, 0x8CC, BIT(20) | BIT(19) | BIT(18), 3); /* settling time of antdiv by RF LNA = 100ns */
+	odm_set_bb_reg(dm, R_0x818, BIT(23) | BIT(22) | BIT(21) | BIT(20), 0);
+		/*@keep antidx after tx for ACK ( unit x 3.2 mu sec)*/
+	odm_set_bb_reg(dm, R_0x8cc, BIT(20) | BIT(19) | BIT(18), 3);
+		/* settling time of antdiv by RF LNA = 100ns */
 
 	/* response TX ant by RX ant */
-	odm_set_mac_reg(p_dm, 0x668, BIT(3), 1);
-
+	odm_set_mac_reg(dm, R_0x668, BIT(3), 1);
 }
 
-void
-phydm_s0s1_sw_ant_div_init_8821c(
-	void		*p_dm_void
-)
+void phydm_s0s1_sw_ant_div_init_8821c(void *dm_void)
 {
-	struct PHY_DM_STRUCT		*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	struct _sw_antenna_switch_		*p_dm_swat_table = &p_dm->dm_swat_table;
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct sw_antenna_switch *swat_tab = &dm->dm_swat_table;
 
-	PHYDM_DBG(p_dm, DBG_ANT_DIV, ("***8821C AntDiv_Init => ant_div_type=[ S0S1_SW_AntDiv]\n"));
+	PHYDM_DBG(dm, DBG_ANT_DIV, "[%s]=====>\n", __func__);
 
 	/* Output Pin Settings */
-	odm_set_mac_reg(p_dm, 0x4C, BIT(25), 0);
+	odm_set_mac_reg(dm, R_0x4c, BIT(25), 0);
 
-	odm_set_mac_reg(p_dm, 0x64, BIT(29), 1); /* PAPE by WLAN control */
-	odm_set_mac_reg(p_dm, 0x64, BIT(28), 1); /* LNAON by WLAN control */
+	odm_set_mac_reg(dm, R_0x64, BIT(29), 1); /* PAPE by WLAN control */
+	odm_set_mac_reg(dm, R_0x64, BIT(28), 1); /* @LNAON by WLAN control */
 
-	odm_set_bb_reg(p_dm, 0xCB8, BIT(16), 0);
+	odm_set_bb_reg(dm, R_0xcb8, BIT(16), 0);
 
-	odm_set_mac_reg(p_dm, 0x4C, BIT(23), 0); /* select DPDT_P and DPDT_N as output pin */
-	odm_set_mac_reg(p_dm, 0x4C, BIT(24), 1); /* by WLAN control */
-	odm_set_bb_reg(p_dm, 0xCB4, 0xF, 8); /* DPDT_P = ANTSEL[0] */
-	odm_set_bb_reg(p_dm, 0xCB4, 0xF0, 8); /* DPDT_N = ANTSEL[0] */
-	odm_set_bb_reg(p_dm, 0xCB4, BIT(29), 0); /* DPDT_P non-inverse */
-	odm_set_bb_reg(p_dm, 0xCB4, BIT(28), 1); /* DPDT_N inverse */
+	odm_set_mac_reg(dm, R_0x4c, BIT(23), 0);
+		/* select DPDT_P and DPDT_N as output pin */
+	odm_set_mac_reg(dm, R_0x4c, BIT(24), 1); /* @by WLAN control */
+	odm_set_bb_reg(dm, R_0xcb4, 0xF, 8); /* @DPDT_P = ANTSEL[0] */
+	odm_set_bb_reg(dm, R_0xcb4, 0xF0, 8); /* @DPDT_N = ANTSEL[0] */
+	odm_set_bb_reg(dm, R_0xcb4, BIT(29), 0); /* @DPDT_P non-inverse */
+	odm_set_bb_reg(dm, R_0xcb4, BIT(28), 1); /* @DPDT_N inverse */
 
-	/* Mapping Table */
-	odm_set_bb_reg(p_dm, 0xCA4, MASKBYTE0, 0);
-	odm_set_bb_reg(p_dm, 0xCA4, MASKBYTE1, 1);
+	/* @Mapping Table */
+	odm_set_bb_reg(dm, R_0xca4, MASKBYTE0, 0);
+	odm_set_bb_reg(dm, R_0xca4, MASKBYTE1, 1);
 
 	/* OFDM HW AntDiv Parameters */
-	odm_set_bb_reg(p_dm, 0x8D4, 0x7FF, 0xA0); /* thershold */
-	odm_set_bb_reg(p_dm, 0x8D4, 0x7FF000, 0x00); /* bias */
+	odm_set_bb_reg(dm, R_0x8d4, 0x7FF, 0xA0); /* thershold */
+	odm_set_bb_reg(dm, R_0x8d4, 0x7FF000, 0x00); /* @bias */
 
-	/* CCK HW AntDiv Parameters */
-	odm_set_bb_reg(p_dm, 0xA74, BIT(7), 1); /* patch for clk from 88M to 80M */
-	odm_set_bb_reg(p_dm, 0xA0C, BIT(4), 1); /* do 64 samples */
+	/* @CCK HW AntDiv Parameters */
+	odm_set_bb_reg(dm, R_0xa74, BIT(7), 1);
+		/* patch for clk from 88M to 80M */
+	odm_set_bb_reg(dm, R_0xa0c, BIT(4), 1); /* @do 64 samples */
 
-	odm_set_bb_reg(p_dm, 0x800, BIT(25), 0); /* ANTSEL_CCK sent to the smart_antenna circuit */
-	odm_set_bb_reg(p_dm, 0xA00, BIT(15), 0); /* CCK AntDiv function block enable */
+	odm_set_bb_reg(dm, R_0x800, BIT(25), 0);
+		/* @ANTSEL_CCK sent to the smart_antenna circuit */
+	odm_set_bb_reg(dm, R_0xa00, BIT(15), 0);
+		/* @CCK AntDiv function block enable */
 
-	/* BT Coexistence */
-	odm_set_bb_reg(p_dm, 0xCAC, BIT(9), 1); /* keep antsel_map when GNT_BT = 1 */
-	odm_set_bb_reg(p_dm, 0x804, BIT(4), 1); /* Disable hw antsw & fast_train.antsw when GNT_BT=1 */
+	/* @BT Coexistence */
+	odm_set_bb_reg(dm, R_0xcac, BIT(9), 1);
+		/* @keep antsel_map when GNT_BT = 1 */
+	odm_set_bb_reg(dm, R_0x804, BIT(4), 1);
+		/* @Disable hw antsw & fast_train.antsw when GNT_BT=1 */
 
-	odm_set_bb_reg(p_dm, 0x8CC, BIT(20) | BIT(19) | BIT(18), 3); /* settling time of antdiv by RF LNA = 100ns */
+	odm_set_bb_reg(dm, R_0x8cc, BIT(20) | BIT(19) | BIT(18), 3);
+		/* settling time of antdiv by RF LNA = 100ns */
 
 	/* response TX ant by RX ant */
-	odm_set_mac_reg(p_dm, 0x668, BIT(3), 1);
-
-
-	odm_set_bb_reg(p_dm, 0x900, BIT(18), 0);
+	odm_set_mac_reg(dm, R_0x668, BIT(3), 1);
 
-	p_dm_swat_table->try_flag = SWAW_STEP_INIT;
-	p_dm_swat_table->double_chk_flag = 0;
-	p_dm_swat_table->cur_antenna = MAIN_ANT;
-	p_dm_swat_table->pre_antenna = MAIN_ANT;
-	p_dm_swat_table->swas_no_link_state = 0;
+	odm_set_bb_reg(dm, R_0x900, BIT(18), 0);
 
+	swat_tab->try_flag = SWAW_STEP_INIT;
+	swat_tab->double_chk_flag = 0;
+	swat_tab->cur_antenna = MAIN_ANT;
+	swat_tab->pre_ant = MAIN_ANT;
+	swat_tab->swas_no_link_state = 0;
 }
-#endif /* #if (RTL8821C_SUPPORT == 1) */
-
+#endif /* @#if (RTL8821C_SUPPORT == 1) */
 
 #if (RTL8881A_SUPPORT == 1)
-void
-odm_trx_hw_ant_div_init_8881a(
-	void		*p_dm_void
-)
+void odm_trx_hw_ant_div_init_8881a(void *dm_void)
 {
-	struct PHY_DM_STRUCT		*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
 
-	PHYDM_DBG(p_dm, DBG_ANT_DIV, ("***8881A AntDiv_Init => ant_div_type=[ CG_TRX_HW_ANTDIV (SPDT)]\n"));
+	PHYDM_DBG(dm, DBG_ANT_DIV, "[%s]=====>\n", __func__);
 
 	/* Output Pin Settings */
-	/* [SPDT related] */
-	odm_set_mac_reg(p_dm, 0x4C, BIT(25), 0);
-	odm_set_mac_reg(p_dm, 0x4C, BIT(26), 0);
-	odm_set_bb_reg(p_dm, 0xCB4, BIT(31), 0); /* delay buffer */
-	odm_set_bb_reg(p_dm, 0xCB4, BIT(22), 0);
-	odm_set_bb_reg(p_dm, 0xCB4, BIT(24), 1);
-	odm_set_bb_reg(p_dm, 0xCB0, 0xF00, 8); /* DPDT_P = ANTSEL[0] */
-	odm_set_bb_reg(p_dm, 0xCB0, 0xF0000, 8); /* DPDT_N = ANTSEL[0] */
-
-	/* Mapping Table */
-	odm_set_bb_reg(p_dm, 0xCA4, MASKBYTE0, 0);
-	odm_set_bb_reg(p_dm, 0xCA4, MASKBYTE1, 1);
+	/* @[SPDT related] */
+	odm_set_mac_reg(dm, R_0x4c, BIT(25), 0);
+	odm_set_mac_reg(dm, R_0x4c, BIT(26), 0);
+	odm_set_bb_reg(dm, R_0xcb4, BIT(31), 0); /* @delay buffer */
+	odm_set_bb_reg(dm, R_0xcb4, BIT(22), 0);
+	odm_set_bb_reg(dm, R_0xcb4, BIT(24), 1);
+	odm_set_bb_reg(dm, R_0xcb0, 0xF00, 8); /* @DPDT_P = ANTSEL[0] */
+	odm_set_bb_reg(dm, R_0xcb0, 0xF0000, 8); /* @DPDT_N = ANTSEL[0] */
+
+	/* @Mapping Table */
+	odm_set_bb_reg(dm, R_0xca4, MASKBYTE0, 0);
+	odm_set_bb_reg(dm, R_0xca4, MASKBYTE1, 1);
 
 	/* OFDM HW AntDiv Parameters */
-	odm_set_bb_reg(p_dm, 0x8D4, 0x7FF, 0xA0); /* thershold */
-	odm_set_bb_reg(p_dm, 0x8D4, 0x7FF000, 0x0); /* bias */
-	odm_set_bb_reg(p_dm, 0x8CC, BIT(20) | BIT(19) | BIT(18), 3); /* settling time of antdiv by RF LNA = 100ns */
+	odm_set_bb_reg(dm, R_0x8d4, 0x7FF, 0xA0); /* thershold */
+	odm_set_bb_reg(dm, R_0x8d4, 0x7FF000, 0x0); /* @bias */
+	odm_set_bb_reg(dm, R_0x8cc, BIT(20) | BIT(19) | BIT(18), 3);
+		/* settling time of antdiv by RF LNA = 100ns */
 
-	/* CCK HW AntDiv Parameters */
-	odm_set_bb_reg(p_dm, 0xA74, BIT(7), 1); /* patch for clk from 88M to 80M */
-	odm_set_bb_reg(p_dm, 0xA0C, BIT(4), 1); /* do 64 samples */
+	/* @CCK HW AntDiv Parameters */
+	odm_set_bb_reg(dm, R_0xa74, BIT(7), 1);
+		/* patch for clk from 88M to 80M */
+	odm_set_bb_reg(dm, R_0xa0c, BIT(4), 1); /* @do 64 samples */
 
-	/* 2 [--For HW Bug setting] */
+	/* @2 [--For HW Bug setting] */
 
-	odm_set_bb_reg(p_dm, 0x900, BIT(18), 0); /* TX ant  by Reg */ /* A-cut bug */
+	odm_set_bb_reg(dm, R_0x900, BIT(18), 0);
+		/* TX ant  by Reg *//* A-cut bug */
 }
 
-#endif /* #if (RTL8881A_SUPPORT == 1) */
-
+#endif /* @#if (RTL8881A_SUPPORT == 1) */
 
 #if (RTL8812A_SUPPORT == 1)
-void
-odm_trx_hw_ant_div_init_8812a(
-	void		*p_dm_void
-)
+void odm_trx_hw_ant_div_init_8812a(void *dm_void)
 {
-	struct PHY_DM_STRUCT		*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-
-	PHYDM_DBG(p_dm, DBG_ANT_DIV, ("***8812A AntDiv_Init => ant_div_type=[ CG_TRX_HW_ANTDIV (SPDT)]\n"));
-
-	/* 3 */ /* 3 --RFE pin setting--------- */
-	/* [BB] */
-	odm_set_bb_reg(p_dm, 0x900, BIT(10) | BIT(9) | BIT(8), 0x0);	 /* disable SW switch */
-	odm_set_bb_reg(p_dm, 0x900, BIT(17) | BIT(16), 0x0);
-	odm_set_bb_reg(p_dm, 0x974, BIT(7) | BIT(6), 0x3);   /* in/out */
-	odm_set_bb_reg(p_dm, 0xCB4, BIT(31), 0); /* delay buffer */
-	odm_set_bb_reg(p_dm, 0xCB4, BIT(26), 0);
-	odm_set_bb_reg(p_dm, 0xCB4, BIT(27), 1);
-	odm_set_bb_reg(p_dm, 0xCB0, 0xF000000, 8); /* DPDT_P = ANTSEL[0] */
-	odm_set_bb_reg(p_dm, 0xCB0, 0xF0000000, 8); /* DPDT_N = ANTSEL[0] */
-	/* 3 ------------------------- */
-
-	/* Mapping Table */
-	odm_set_bb_reg(p_dm, 0xCA4, MASKBYTE0, 0);
-	odm_set_bb_reg(p_dm, 0xCA4, MASKBYTE1, 1);
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+
+	PHYDM_DBG(dm, DBG_ANT_DIV, "[%s]=====>\n", __func__);
+
+	/* @3 */ /* @3 --RFE pin setting--------- */
+	/* @[BB] */
+	odm_set_bb_reg(dm, R_0x900, BIT(10) | BIT(9) | BIT(8), 0x0);
+		/* @disable SW switch */
+	odm_set_bb_reg(dm, R_0x900, BIT(17) | BIT(16), 0x0);
+	odm_set_bb_reg(dm, R_0x974, BIT(7) | BIT(6), 0x3); /* @in/out */
+	odm_set_bb_reg(dm, R_0xcb4, BIT(31), 0); /* @delay buffer */
+	odm_set_bb_reg(dm, R_0xcb4, BIT(26), 0);
+	odm_set_bb_reg(dm, R_0xcb4, BIT(27), 1);
+	odm_set_bb_reg(dm, R_0xcb0, 0xF000000, 8); /* @DPDT_P = ANTSEL[0] */
+	odm_set_bb_reg(dm, R_0xcb0, 0xF0000000, 8); /* @DPDT_N = ANTSEL[0] */
+	/* @3 ------------------------- */
+
+	/* @Mapping Table */
+	odm_set_bb_reg(dm, R_0xca4, MASKBYTE0, 0);
+	odm_set_bb_reg(dm, R_0xca4, MASKBYTE1, 1);
 
 	/* OFDM HW AntDiv Parameters */
-	odm_set_bb_reg(p_dm, 0x8D4, 0x7FF, 0xA0); /* thershold */
-	odm_set_bb_reg(p_dm, 0x8D4, 0x7FF000, 0x0); /* bias */
-	odm_set_bb_reg(p_dm, 0x8CC, BIT(20) | BIT(19) | BIT(18), 3); /* settling time of antdiv by RF LNA = 100ns */
-
-	/* CCK HW AntDiv Parameters */
-	odm_set_bb_reg(p_dm, 0xA74, BIT(7), 1); /* patch for clk from 88M to 80M */
-	odm_set_bb_reg(p_dm, 0xA0C, BIT(4), 1); /* do 64 samples */
+	odm_set_bb_reg(dm, R_0x8d4, 0x7FF, 0xA0); /* thershold */
+	odm_set_bb_reg(dm, R_0x8d4, 0x7FF000, 0x0); /* @bias */
+	odm_set_bb_reg(dm, R_0x8cc, BIT(20) | BIT(19) | BIT(18), 3);
+		/* settling time of antdiv by RF LNA = 100ns */
 
-	/* 2 [--For HW Bug setting] */
+	/* @CCK HW AntDiv Parameters */
+	odm_set_bb_reg(dm, R_0xa74, BIT(7), 1);
+		/* patch for clk from 88M to 80M */
+	odm_set_bb_reg(dm, R_0xa0c, BIT(4), 1); /* @do 64 samples */
 
-	odm_set_bb_reg(p_dm, 0x900, BIT(18), 0); /* TX ant  by Reg */ /* A-cut bug */
+	/* @2 [--For HW Bug setting] */
 
+	odm_set_bb_reg(dm, R_0x900, BIT(18), 0);
+		/* TX ant  by Reg */ /* A-cut bug */
 }
 
-#endif /* #if (RTL8812A_SUPPORT == 1) */
+#endif /* @#if (RTL8812A_SUPPORT == 1) */
 
 #if (RTL8188F_SUPPORT == 1)
-void
-odm_s0s1_sw_ant_div_init_8188f(
-	void		*p_dm_void
-)
+void odm_s0s1_sw_ant_div_init_8188f(void *dm_void)
 {
-	struct PHY_DM_STRUCT		*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	struct _sw_antenna_switch_		*p_dm_swat_table = &p_dm->dm_swat_table;
-	struct phydm_fat_struct		*p_dm_fat_table = &p_dm->dm_fat_table;
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct sw_antenna_switch *swat_tab = &dm->dm_swat_table;
+	struct phydm_fat_struct *fat_tab = &dm->dm_fat_table;
 
-	PHYDM_DBG(p_dm, DBG_ANT_DIV, ("***8188F AntDiv_Init => ant_div_type=[ S0S1_SW_AntDiv]\n"));
+	PHYDM_DBG(dm, DBG_ANT_DIV, "[%s]=====>\n", __func__);
 
+#if 0
+	/*@GPIO setting*/
+	/*odm_set_mac_reg(dm, R_0x64, BIT(18), 0); */
+	/*odm_set_mac_reg(dm, R_0x44, BIT(28)|BIT(27), 0);*/
+	/*odm_set_mac_reg(dm, R_0x44, BIT(20) | BIT(19), 0x3);*/
+		/*enable_output for P_GPIO[4:3]*/
+	/*odm_set_mac_reg(dm, R_0x44, BIT(12)|BIT(11), 0);*/ /*output value*/
+	/*odm_set_mac_reg(dm, R_0x40, BIT(1)|BIT(0), 0);*/ /*GPIO function*/
+#endif
 
-	/*GPIO setting*/
-	/*odm_set_mac_reg(p_dm, 0x64, BIT(18), 0); */
-	/*odm_set_mac_reg(p_dm, 0x44, BIT(28)|BIT(27), 0);*/
-	/*odm_set_mac_reg(p_dm, 0x44, BIT(20) | BIT(19), 0x3);*/	/*enable_output for P_GPIO[4:3]*/
-	/*odm_set_mac_reg(p_dm, 0x44, BIT(12)|BIT(11), 0);*/ /*output value*/
-	/*odm_set_mac_reg(p_dm, 0x40, BIT(1)|BIT(0), 0);*/		/*GPIO function*/
-
-	if (p_dm->support_ic_type == ODM_RTL8188F) {
-		if (p_dm->support_interface == ODM_ITRF_USB)
-			odm_set_mac_reg(p_dm, 0x44, BIT(20) | BIT(19), 0x3);	/*enable_output for P_GPIO[4:3]*/
-		else if (p_dm->support_interface == ODM_ITRF_SDIO)
-			odm_set_mac_reg(p_dm, 0x44, BIT(18), 0x1);	/*enable_output for P_GPIO[2]*/
+	if (dm->support_ic_type == ODM_RTL8188F) {
+		if (dm->support_interface == ODM_ITRF_USB)
+			odm_set_mac_reg(dm, R_0x44, BIT(20) | BIT(19), 0x3);
+				/*@enable_output for P_GPIO[4:3]*/
+		else if (dm->support_interface == ODM_ITRF_SDIO)
+			odm_set_mac_reg(dm, R_0x44, BIT(18), 0x1);
+				/*@enable_output for P_GPIO[2]*/
 	}
-	
-	p_dm_fat_table->is_become_linked  = false;
-	p_dm_swat_table->try_flag = SWAW_STEP_INIT;
-	p_dm_swat_table->double_chk_flag = 0;
+
+	fat_tab->is_become_linked = false;
+	swat_tab->try_flag = SWAW_STEP_INIT;
+	swat_tab->double_chk_flag = 0;
 }
 
-void
-phydm_update_rx_idle_antenna_8188F(
-	void	*p_dm_void,
-	u32	default_ant
-)
+void phydm_update_rx_idle_antenna_8188F(void *dm_void, u32 default_ant)
 {
-	struct PHY_DM_STRUCT	*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	u8		codeword;
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	u8 codeword;
 
-	if (p_dm->support_ic_type == ODM_RTL8188F) {
-		if (p_dm->support_interface == ODM_ITRF_USB) {
+	if (dm->support_ic_type == ODM_RTL8188F) {
+		if (dm->support_interface == ODM_ITRF_USB) {
 			if (default_ant == ANT1_2G)
-				codeword = 1; /*2'b01*/
+				codeword = 1; /*@2'b01*/
 			else
-				codeword = 2;/*2'b10*/
-			odm_set_mac_reg(p_dm, 0x44, (BIT(12) | BIT(11)), codeword); /*GPIO[4:3] output value*/
-		} else if (p_dm->support_interface == ODM_ITRF_SDIO) {
+				codeword = 2; /*@2'b10*/
+			odm_set_mac_reg(dm, R_0x44, 0x1800, codeword);
+				/*@GPIO[4:3] output value*/
+		} else if (dm->support_interface == ODM_ITRF_SDIO) {
 			if (default_ant == ANT1_2G) {
-				codeword = 0; /*1'b0*/
-				odm_set_bb_reg(p_dm, 0x870, BIT(9)|BIT(8), 0x3);
-				odm_set_bb_reg(p_dm, 0x860, BIT(9)|BIT(8), 0x1);
+				codeword = 0; /*@1'b0*/
+				odm_set_bb_reg(dm, R_0x870, 0x300, 0x3);
+				odm_set_bb_reg(dm, R_0x860, 0x300, 0x1);
 			} else {
-				codeword = 1;/*1'b1*/
-				odm_set_bb_reg(p_dm, 0x870, BIT(9)|BIT(8), 0x3);
-				odm_set_bb_reg(p_dm, 0x860, BIT(9)|BIT(8), 0x2);
+				codeword = 1; /*@1'b1*/
+				odm_set_bb_reg(dm, R_0x870, 0x300, 0x3);
+				odm_set_bb_reg(dm, R_0x860, 0x300, 0x2);
 			}
-			odm_set_mac_reg(p_dm, 0x44, BIT(10), codeword); /*GPIO[2] output value*/
-		}	
+			odm_set_mac_reg(dm, R_0x44, BIT(10), codeword);
+				/*@GPIO[2] output value*/
+		}
 	}
 }
 #endif
 
+#ifdef ODM_EVM_ENHANCE_ANTDIV
+void phydm_statistics_evm_1ss(void *dm_void,	void *phy_info_void,
+			      u8 antsel_tr_mux, u32 id, u32 utility)
+{
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct phydm_fat_struct *fat_tab = &dm->dm_fat_table;
+	struct phydm_phyinfo_struct *phy_info = NULL;
 
+	phy_info = (struct phydm_phyinfo_struct *)phy_info_void;
+	if (antsel_tr_mux == ANT1_2G) {
+		fat_tab->main_evm_sum[id] += ((phy_info->rx_mimo_evm_dbm[0])
+					     << 5);
+		fat_tab->main_evm_cnt[id]++;
+	} else {
+		fat_tab->aux_evm_sum[id] += ((phy_info->rx_mimo_evm_dbm[0])
+					    << 5);
+		fat_tab->aux_evm_cnt[id]++;
+	}
+}
 
-#ifdef ODM_EVM_ENHANCE_ANTDIV
-void
-phydm_evm_sw_antdiv_init(
-	void		*p_dm_void
-)
+void phydm_statistics_evm_2ss(void *dm_void,	void *phy_info_void,
+			      u8 antsel_tr_mux, u32 id, u32 utility)
 {
-	struct PHY_DM_STRUCT		*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	struct phydm_fat_struct	*p_dm_fat_table = &p_dm->dm_fat_table;
-
-	/*EVM enhance AntDiv method init----------------------------------------------------------------------*/
-	p_dm_fat_table->EVM_method_enable = 0;
-	p_dm_fat_table->fat_state = NORMAL_STATE_MIAN;
-	p_dm_fat_table->fat_state_cnt = 0;
-	p_dm_fat_table->pre_antdiv_rssi = 0;
-
-	p_dm->antdiv_intvl = 30;
-	p_dm->antdiv_train_num = 2;
-	odm_set_bb_reg(p_dm, 0x910, 0x3f, 0xf);
-	p_dm->antdiv_evm_en = 1;
-	/*p_dm->antdiv_period=1;*/
-	p_dm->evm_antdiv_period = 3;
-	p_dm->stop_antdiv_rssi_th = 3;
-	p_dm->stop_antdiv_tp_th = 80;
-	p_dm->antdiv_tp_period = 3;
-	p_dm->stop_antdiv_tp_diff_th = 5;
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct phydm_fat_struct *fat_tab = &dm->dm_fat_table;
+	struct phydm_phyinfo_struct *phy_info = NULL;
+
+	phy_info = (struct phydm_phyinfo_struct *)phy_info_void;
+	if (antsel_tr_mux == ANT1_2G) {
+		fat_tab->main_evm_2ss_sum[id][0] += phy_info->rx_mimo_evm_dbm[0]
+						    << 5;
+		fat_tab->main_evm_2ss_sum[id][1] += phy_info->rx_mimo_evm_dbm[1]
+						    << 5;
+		fat_tab->main_evm_2ss_cnt[id]++;
+
+	} else {
+		fat_tab->aux_evm_2ss_sum[id][0] += (phy_info->rx_mimo_evm_dbm[0]
+						   << 5);
+		fat_tab->aux_evm_2ss_sum[id][1] += (phy_info->rx_mimo_evm_dbm[1]
+						   << 5);
+		fat_tab->aux_evm_2ss_cnt[id]++;
+	}
 }
 
-void
-odm_evm_fast_ant_reset(
-	void		*p_dm_void
-)
+void phydm_evm_sw_antdiv_init(void *dm_void)
 {
-	struct PHY_DM_STRUCT		*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	struct phydm_fat_struct	*p_dm_fat_table = &p_dm->dm_fat_table;
-
-	p_dm_fat_table->EVM_method_enable = 0;
-	odm_ant_div_on_off(p_dm, ANTDIV_ON);
-	p_dm_fat_table->fat_state = NORMAL_STATE_MIAN;
-	p_dm_fat_table->fat_state_cnt = 0;
-	p_dm->antdiv_period = 0;
-	odm_set_mac_reg(p_dm, 0x608, BIT(8), 0);
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct phydm_fat_struct *fat_tab = &dm->dm_fat_table;
+
+	/*@EVM enhance AntDiv method init----------------*/
+	fat_tab->evm_method_enable = 0;
+	fat_tab->fat_state = NORMAL_STATE_MIAN;
+	fat_tab->fat_state_cnt = 0;
+	fat_tab->pre_antdiv_rssi = 0;
+
+	dm->antdiv_intvl = 30;
+	dm->antdiv_train_num = 2;
+	odm_set_bb_reg(dm, R_0x910, 0x3f, 0xf);
+	dm->antdiv_evm_en = 1;
+	/*@dm->antdiv_period=1;*/
+#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_CE))
+	dm->evm_antdiv_period = 1;
+#else
+	dm->evm_antdiv_period = 3;
+#endif
+	dm->stop_antdiv_rssi_th = 3;
+	dm->stop_antdiv_tp_th = 80;
+	dm->antdiv_tp_period = 3;
+	dm->stop_antdiv_tp_diff_th = 5;
 }
 
+void odm_evm_fast_ant_reset(void *dm_void)
+{
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct phydm_fat_struct *fat_tab = &dm->dm_fat_table;
+
+	fat_tab->evm_method_enable = 0;
+	if (fat_tab->div_path_type == ANT_PATH_A)
+		odm_ant_div_on_off(dm, ANTDIV_ON, ANT_PATH_A);
+	else if (fat_tab->div_path_type == ANT_PATH_B)
+		odm_ant_div_on_off(dm, ANTDIV_ON, ANT_PATH_B);
+	else if (fat_tab->div_path_type == ANT_PATH_AB)
+		odm_ant_div_on_off(dm, ANTDIV_ON, ANT_PATH_AB);
+	fat_tab->fat_state = NORMAL_STATE_MIAN;
+	fat_tab->fat_state_cnt = 0;
+	dm->antdiv_period = 0;
+	odm_set_mac_reg(dm, R_0x608, BIT(8), 0);
+}
 
-void
-odm_evm_enhance_ant_div(
-	void		*p_dm_void
-)
+void odm_evm_enhance_ant_div(void *dm_void)
 {
-	struct PHY_DM_STRUCT		*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	u32	main_rssi, aux_rssi ;
-	u32	main_crc_utility = 0, aux_crc_utility = 0, utility_ratio = 1;
-	u32	main_evm, aux_evm, diff_rssi = 0, diff_EVM = 0;
-	u32	main_2ss_evm[2], aux_2ss_evm[2];
-	u32	main_1ss_evm, aux_1ss_evm;
-	u32	main_2ss_evm_sum, aux_2ss_evm_sum;
-	u8	score_EVM = 0, score_CRC = 0;
-	u8	rssi_larger_ant = 0;
-	struct phydm_fat_struct	*p_dm_fat_table = &p_dm->dm_fat_table;
-	u32	value32, i;
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	u32 main_rssi, aux_rssi;
+	u32 main_crc_utility = 0, aux_crc_utility = 0, utility_ratio = 1;
+	u32 main_evm, aux_evm, diff_rssi = 0, diff_EVM = 0;
+	u32 main_2ss_evm[2], aux_2ss_evm[2];
+	u32 main_1ss_evm, aux_1ss_evm;
+	u32 main_2ss_evm_sum, aux_2ss_evm_sum;
+	u8 score_EVM = 0, score_CRC = 0;
+	u8 rssi_larger_ant = 0;
+	struct phydm_fat_struct *fat_tab = &dm->dm_fat_table;
+	u32 value32, i;
 	boolean main_above1 = false, aux_above1 = false;
 	boolean force_antenna = false;
-	struct cmn_sta_info	*p_sta;
-	u32	antdiv_tp_main_avg, antdiv_tp_aux_avg;
-	u8	curr_rssi, rssi_diff;
-	u32	tp_diff;
-	u8	tp_diff_return = 0, tp_return = 0, rssi_return = 0;
-	u8	target_ant_evm_1ss, target_ant_evm_2ss;
-	u8	decision_evm_ss;
-	u8	next_ant;
-
-	p_dm_fat_table->target_ant_enhance = 0xFF;
-
-	if ((p_dm->support_ic_type & ODM_EVM_ENHANCE_ANTDIV_SUPPORT_IC)) {
-		if (p_dm->is_one_entry_only) {
-			/* PHYDM_DBG(p_dm,DBG_ANT_DIV, ("[One Client only]\n")); */
-			i = p_dm->one_entry_macid;
-			p_sta = p_dm->p_phydm_sta_info[i];
-
-			main_rssi = (p_dm_fat_table->main_ant_cnt[i] != 0) ? (p_dm_fat_table->main_ant_sum[i] / p_dm_fat_table->main_ant_cnt[i]) : 0;
-			aux_rssi = (p_dm_fat_table->aux_ant_cnt[i] != 0) ? (p_dm_fat_table->aux_ant_sum[i] / p_dm_fat_table->aux_ant_cnt[i]) : 0;
+	struct cmn_sta_info *sta;
+	u32 main_tp_avg, aux_tp_avg;
+	u8 curr_rssi, rssi_diff;
+	u32 tp_diff;
+	u8 tp_diff_return = 0, tp_return = 0, rssi_return = 0;
+	u8 target_ant_evm_1ss, target_ant_evm_2ss;
+	u8 decision_evm_ss;
+	u8 next_ant;
+
+	fat_tab->target_ant_enhance = 0xFF;
+
+	if ((dm->support_ic_type & ODM_EVM_ANTDIV_IC)) {
+		if (dm->is_one_entry_only) {
+#if 0
+			/* PHYDM_DBG(dm,DBG_ANT_DIV, "[One Client only]\n"); */
+#endif
+			i = dm->one_entry_macid;
+			sta = dm->phydm_sta_info[i];
+
+			main_rssi = (fat_tab->main_cnt[i] != 0) ? (fat_tab->main_sum[i] / fat_tab->main_cnt[i]) : 0;
+			aux_rssi = (fat_tab->aux_cnt[i] != 0) ? (fat_tab->aux_sum[i] / fat_tab->aux_cnt[i]) : 0;
 
 			if ((main_rssi == 0 && aux_rssi != 0 && aux_rssi >= FORCE_RSSI_DIFF) || (main_rssi != 0 && aux_rssi == 0 && main_rssi >= FORCE_RSSI_DIFF))
 				diff_rssi = FORCE_RSSI_DIFF;
@@ -1904,139 +2435,145 @@ odm_evm_enhance_ant_div(
 			else
 				rssi_larger_ant = AUX_ANT;
 
-			PHYDM_DBG(p_dm, DBG_ANT_DIV, ("Main_Cnt=(( %d )), main_rssi=(( %d ))\n", p_dm_fat_table->main_ant_cnt[i], main_rssi));
-			PHYDM_DBG(p_dm, DBG_ANT_DIV, ("Aux_Cnt=(( %d )), aux_rssi=(( %d ))\n", p_dm_fat_table->aux_ant_cnt[i], aux_rssi));
+			PHYDM_DBG(dm, DBG_ANT_DIV,
+				  "Main_Cnt=(( %d )), main_rssi=(( %d ))\n",
+				  fat_tab->main_cnt[i], main_rssi);
+			PHYDM_DBG(dm, DBG_ANT_DIV,
+				  "Aux_Cnt=(( %d )), aux_rssi=(( %d ))\n",
+				  fat_tab->aux_cnt[i], aux_rssi);
 
-			if (((main_rssi >= evm_rssi_th_high || aux_rssi >= evm_rssi_th_high) || (p_dm_fat_table->EVM_method_enable == 1))
-			/* && (diff_rssi <= FORCE_RSSI_DIFF + 1) */
-			) {
-				PHYDM_DBG(p_dm, DBG_ANT_DIV, ("> TH_H || EVM_method_enable==1\n"));
+			if (((main_rssi >= evm_rssi_th_high || aux_rssi >= evm_rssi_th_high) || fat_tab->evm_method_enable == 1)
+			    /* @&& (diff_rssi <= FORCE_RSSI_DIFF + 1) */
+			    ) {
+				PHYDM_DBG(dm, DBG_ANT_DIV,
+					  "> TH_H || evm_method_enable==1\n");
 
-				if (((main_rssi >= evm_rssi_th_low) || (aux_rssi >= evm_rssi_th_low))) {
-					PHYDM_DBG(p_dm, DBG_ANT_DIV, ("> TH_L, fat_state_cnt =((%d))\n", p_dm_fat_table->fat_state_cnt));
+				if ((main_rssi >= evm_rssi_th_low || aux_rssi >= evm_rssi_th_low)) {
+					PHYDM_DBG(dm, DBG_ANT_DIV, "> TH_L, fat_state_cnt =((%d))\n", fat_tab->fat_state_cnt);
 
 					/*Traning state: 0(alt) 1(ori) 2(alt) 3(ori)============================================================*/
-					if (p_dm_fat_table->fat_state_cnt < ((p_dm->antdiv_train_num)<<1)) {
-
-						if (p_dm_fat_table->fat_state_cnt == 0) {
+					if (fat_tab->fat_state_cnt < (dm->antdiv_train_num << 1)) {
+						if (fat_tab->fat_state_cnt == 0) {
 							/*Reset EVM 1SS Method */
-							p_dm_fat_table->main_ant_evm_sum[i] = 0;
-							p_dm_fat_table->aux_ant_evm_sum[i] = 0;
-							p_dm_fat_table->main_ant_evm_cnt[i] = 0;
-							p_dm_fat_table->aux_ant_evm_cnt[i] = 0;
+							fat_tab->main_evm_sum[i] = 0;
+							fat_tab->aux_evm_sum[i] = 0;
+							fat_tab->main_evm_cnt[i] = 0;
+							fat_tab->aux_evm_cnt[i] = 0;
 							/*Reset EVM 2SS Method */
-							p_dm_fat_table->main_ant_evm_2ss_sum[i][0] = 0;
-							p_dm_fat_table->main_ant_evm_2ss_sum[i][1] = 0;
-							p_dm_fat_table->aux_ant_evm_2ss_sum[i][0] = 0;
-							p_dm_fat_table->aux_ant_evm_2ss_sum[i][1] = 0;
-							p_dm_fat_table->main_ant_evm_2ss_cnt[i] = 0;
-							p_dm_fat_table->aux_ant_evm_2ss_cnt[i] = 0;
-							#if 0
+							fat_tab->main_evm_2ss_sum[i][0] = 0;
+							fat_tab->main_evm_2ss_sum[i][1] = 0;
+							fat_tab->aux_evm_2ss_sum[i][0] = 0;
+							fat_tab->aux_evm_2ss_sum[i][1] = 0;
+							fat_tab->main_evm_2ss_cnt[i] = 0;
+							fat_tab->aux_evm_2ss_cnt[i] = 0;
+#if 0
 							/*Reset TP Method */
-							p_dm_fat_table->antdiv_tp_main = 0;
-							p_dm_fat_table->antdiv_tp_aux = 0;
-							p_dm_fat_table->antdiv_tp_main_cnt = 0;
-							p_dm_fat_table->antdiv_tp_aux_cnt = 0;
-							#endif
+							fat_tab->main_tp = 0;
+							fat_tab->aux_tp = 0;
+							fat_tab->main_tp_cnt = 0;
+							fat_tab->aux_tp_cnt = 0;
+#endif
 							/*Reset CRC Method */
-							p_dm_fat_table->main_crc32_ok_cnt = 0;
-							p_dm_fat_table->main_crc32_fail_cnt = 0;
-							p_dm_fat_table->aux_crc32_ok_cnt = 0;
-							p_dm_fat_table->aux_crc32_fail_cnt = 0;
-
-							#ifdef SKIP_EVM_ANTDIV_TRAINING_PATCH
-							if ((*p_dm->p_band_width == CHANNEL_WIDTH_20) && (p_sta->mimo_type == RF_2T2R)) {
-								/*1. Skip training: RSSI*/
-								/*PHYDM_DBG(pDM_Odm,DBG_ANT_DIV, ("TargetAnt_enhance=((%d)), RxIdleAnt=((%d))\n", pDM_FatTable->TargetAnt_enhance, pDM_FatTable->RxIdleAnt));*/
-								curr_rssi = (u8)((p_dm_fat_table->rx_idle_ant == MAIN_ANT) ? main_rssi : aux_rssi);
-								rssi_diff = (curr_rssi > p_dm_fat_table->pre_antdiv_rssi) ? (curr_rssi - p_dm_fat_table->pre_antdiv_rssi) : (p_dm_fat_table->pre_antdiv_rssi - curr_rssi);
-
-								PHYDM_DBG(p_dm, DBG_ANT_DIV, ("[1] rssi_return, curr_rssi=((%d)), pre_rssi=((%d))\n", curr_rssi, p_dm_fat_table->pre_antdiv_rssi));
-
-								p_dm_fat_table->pre_antdiv_rssi = curr_rssi;
-								if ((rssi_diff < (p_dm->stop_antdiv_rssi_th)) && (curr_rssi != 0))
+							fat_tab->main_crc32_ok_cnt = 0;
+							fat_tab->main_crc32_fail_cnt = 0;
+							fat_tab->aux_crc32_ok_cnt = 0;
+							fat_tab->aux_crc32_fail_cnt = 0;
+
+#ifdef SKIP_EVM_ANTDIV_TRAINING_PATCH
+							if ((*dm->band_width == CHANNEL_WIDTH_20) && sta->mimo_type == RF_2T2R) {
+								/*@1. Skip training: RSSI*/
+#if 0
+								/*PHYDM_DBG(pDM_Odm,DBG_ANT_DIV, "TargetAnt_enhance=((%d)), RxIdleAnt=((%d))\n", pDM_FatTable->TargetAnt_enhance, pDM_FatTable->RxIdleAnt);*/
+#endif
+								curr_rssi = (u8)((fat_tab->rx_idle_ant == MAIN_ANT) ? main_rssi : aux_rssi);
+								rssi_diff = (curr_rssi > fat_tab->pre_antdiv_rssi) ? (curr_rssi - fat_tab->pre_antdiv_rssi) : (fat_tab->pre_antdiv_rssi - curr_rssi);
+
+								PHYDM_DBG(dm, DBG_ANT_DIV, "[1] rssi_return, curr_rssi=((%d)), pre_rssi=((%d))\n", curr_rssi, fat_tab->pre_antdiv_rssi);
+
+								fat_tab->pre_antdiv_rssi = curr_rssi;
+								if (rssi_diff < dm->stop_antdiv_rssi_th && curr_rssi != 0)
 									rssi_return = 1;
 
-								/*2. Skip training: TP Diff*/
-								tp_diff = (p_dm->rx_tp > p_dm_fat_table->pre_antdiv_tp) ? (p_dm->rx_tp  - p_dm_fat_table->pre_antdiv_tp) : (p_dm_fat_table->pre_antdiv_tp - p_dm->rx_tp);
+								/*@2. Skip training: TP Diff*/
+								tp_diff = (dm->rx_tp > fat_tab->pre_antdiv_tp) ? (dm->rx_tp - fat_tab->pre_antdiv_tp) : (fat_tab->pre_antdiv_tp - dm->rx_tp);
 
-								PHYDM_DBG(p_dm, DBG_ANT_DIV, ("[2] tp_diff_return, curr_tp=((%d)), pre_tp=((%d))\n", p_dm->rx_tp, p_dm_fat_table->pre_antdiv_tp));
-								p_dm_fat_table->pre_antdiv_tp = p_dm->rx_tp;
-								if ((tp_diff < (u32)(p_dm->stop_antdiv_tp_diff_th)  && (p_dm->rx_tp != 0)))
+								PHYDM_DBG(dm, DBG_ANT_DIV, "[2] tp_diff_return, curr_tp=((%d)), pre_tp=((%d))\n", dm->rx_tp, fat_tab->pre_antdiv_tp);
+								fat_tab->pre_antdiv_tp = dm->rx_tp;
+								if ((tp_diff < (u32)(dm->stop_antdiv_tp_diff_th) && dm->rx_tp != 0))
 									tp_diff_return = 1;
 
-								PHYDM_DBG(p_dm, DBG_ANT_DIV, ("[3] tp_return, curr_rx_tp=((%d))\n", p_dm->rx_tp));
-								/*3. Skip training: TP*/
-								if (p_dm->rx_tp >= (u32)(p_dm->stop_antdiv_tp_th))
+								PHYDM_DBG(dm, DBG_ANT_DIV, "[3] tp_return, curr_rx_tp=((%d))\n", dm->rx_tp);
+								/*@3. Skip training: TP*/
+								if (dm->rx_tp >= (u32)(dm->stop_antdiv_tp_th))
 									tp_return = 1;
 
-								PHYDM_DBG(p_dm, DBG_ANT_DIV, ("[4] Return {rssi, tp_diff, tp} = {%d, %d, %d}\n", rssi_return, tp_diff_return, tp_return));
-								/*4. Joint Return Decision*/
+								PHYDM_DBG(dm, DBG_ANT_DIV, "[4] Return {rssi, tp_diff, tp} = {%d, %d, %d}\n", rssi_return, tp_diff_return, tp_return);
+								/*@4. Joint Return Decision*/
 								if (tp_return) {
 									if (tp_diff_return || rssi_diff) {
-
-										PHYDM_DBG(p_dm, DBG_ANT_DIV, ("***Return EVM SW AntDiv\n"));
+										PHYDM_DBG(dm, DBG_ANT_DIV, "***Return EVM SW AntDiv\n");
 										return;
 									}
 								}
 							}
-							#endif
-
-							p_dm_fat_table->EVM_method_enable = 1;
-							odm_ant_div_on_off(p_dm, ANTDIV_OFF);
-							p_dm->antdiv_period = p_dm->evm_antdiv_period;
-							odm_set_mac_reg(p_dm, 0x608, BIT(8), 1); /*RCR accepts CRC32-Error packets*/
+#endif
 
+							fat_tab->evm_method_enable = 1;
+							if (fat_tab->div_path_type == ANT_PATH_A)
+								odm_ant_div_on_off(dm, ANTDIV_OFF, ANT_PATH_A);
+							else if (fat_tab->div_path_type == ANT_PATH_B)
+								odm_ant_div_on_off(dm, ANTDIV_OFF, ANT_PATH_B);
+							else if (fat_tab->div_path_type == ANT_PATH_AB)
+								odm_ant_div_on_off(dm, ANTDIV_OFF, ANT_PATH_AB);
+							dm->antdiv_period = dm->evm_antdiv_period;
+							odm_set_mac_reg(dm, R_0x608, BIT(8), 1); /*RCR accepts CRC32-Error packets*/
 						}
 
-
-					p_dm_fat_table->fat_state_cnt++;
-					next_ant = (p_dm_fat_table->rx_idle_ant == MAIN_ANT) ? AUX_ANT : MAIN_ANT;
-					odm_update_rx_idle_ant(p_dm, next_ant);
-					odm_set_timer(p_dm, &p_dm->evm_fast_ant_training_timer, p_dm->antdiv_intvl); //ms
-
+						fat_tab->fat_state_cnt++;
+						next_ant = (fat_tab->rx_idle_ant == MAIN_ANT) ? AUX_ANT : MAIN_ANT;
+						odm_update_rx_idle_ant(dm, next_ant);
+						odm_set_timer(dm, &dm->evm_fast_ant_training_timer, dm->antdiv_intvl); //ms
 					}
-					/*Decision state: 4==============================================================*/
+					/*@Decision state: 4==============================================================*/
 					else {
+						fat_tab->fat_state_cnt = 0;
+						PHYDM_DBG(dm, DBG_ANT_DIV, "[Decisoin state ]\n");
 
-						p_dm_fat_table->fat_state_cnt = 0;
-						PHYDM_DBG(p_dm, DBG_ANT_DIV, ("[Decisoin state ]\n"));
-
-						/* 3 [CRC32 statistic] */
-						#if 0
-						if ((p_dm_fat_table->main_crc32_ok_cnt > ((p_dm_fat_table->aux_crc32_ok_cnt) << 1)) || ((diff_rssi >= 40) && (rssi_larger_ant == MAIN_ANT))) {
-							p_dm_fat_table->target_ant_crc32 = MAIN_ANT;
+/* @3 [CRC32 statistic] */
+#if 0
+						if ((fat_tab->main_crc32_ok_cnt > (fat_tab->aux_crc32_ok_cnt << 1)) || (diff_rssi >= 40 && rssi_larger_ant == MAIN_ANT)) {
+							fat_tab->target_ant_crc32 = MAIN_ANT;
 							force_antenna = true;
-							PHYDM_DBG(p_dm, DBG_ANT_DIV, ("CRC32 Force Main\n"));
-						} else if ((p_dm_fat_table->aux_crc32_ok_cnt > ((p_dm_fat_table->main_crc32_ok_cnt) << 1)) || ((diff_rssi >= 40) && (rssi_larger_ant == AUX_ANT))) {
-							p_dm_fat_table->target_ant_crc32 = AUX_ANT;
+							PHYDM_DBG(dm, DBG_ANT_DIV, "CRC32 Force Main\n");
+						} else if ((fat_tab->aux_crc32_ok_cnt > ((fat_tab->main_crc32_ok_cnt) << 1)) || ((diff_rssi >= 40) && (rssi_larger_ant == AUX_ANT))) {
+							fat_tab->target_ant_crc32 = AUX_ANT;
 							force_antenna = true;
-							PHYDM_DBG(p_dm, DBG_ANT_DIV, ("CRC32 Force Aux\n"));
+							PHYDM_DBG(dm, DBG_ANT_DIV, "CRC32 Force Aux\n");
 						} else
-						#endif
+#endif
 						{
-							if (p_dm_fat_table->main_crc32_fail_cnt <= 5)
-								p_dm_fat_table->main_crc32_fail_cnt = 5;
+							if (fat_tab->main_crc32_fail_cnt <= 5)
+								fat_tab->main_crc32_fail_cnt = 5;
 
-							if (p_dm_fat_table->aux_crc32_fail_cnt <= 5)
-								p_dm_fat_table->aux_crc32_fail_cnt = 5;
+							if (fat_tab->aux_crc32_fail_cnt <= 5)
+								fat_tab->aux_crc32_fail_cnt = 5;
 
-							if (p_dm_fat_table->main_crc32_ok_cnt > p_dm_fat_table->main_crc32_fail_cnt)
+							if (fat_tab->main_crc32_ok_cnt > fat_tab->main_crc32_fail_cnt)
 								main_above1 = true;
 
-							if (p_dm_fat_table->aux_crc32_ok_cnt > p_dm_fat_table->aux_crc32_fail_cnt)
+							if (fat_tab->aux_crc32_ok_cnt > fat_tab->aux_crc32_fail_cnt)
 								aux_above1 = true;
 
 							if (main_above1 == true && aux_above1 == false) {
 								force_antenna = true;
-								p_dm_fat_table->target_ant_crc32 = MAIN_ANT;
+								fat_tab->target_ant_crc32 = MAIN_ANT;
 							} else if (main_above1 == false && aux_above1 == true) {
 								force_antenna = true;
-								p_dm_fat_table->target_ant_crc32 = AUX_ANT;
+								fat_tab->target_ant_crc32 = AUX_ANT;
 							} else if (main_above1 == true && aux_above1 == true) {
-								main_crc_utility = ((p_dm_fat_table->main_crc32_ok_cnt) << 7) / p_dm_fat_table->main_crc32_fail_cnt;
-								aux_crc_utility = ((p_dm_fat_table->aux_crc32_ok_cnt) << 7) / p_dm_fat_table->aux_crc32_fail_cnt;
-								p_dm_fat_table->target_ant_crc32 = (main_crc_utility == aux_crc_utility) ? (p_dm_fat_table->pre_target_ant_enhance) : ((main_crc_utility >= aux_crc_utility) ? MAIN_ANT : AUX_ANT);
+								main_crc_utility = ((fat_tab->main_crc32_ok_cnt) << 7) / fat_tab->main_crc32_fail_cnt;
+								aux_crc_utility = ((fat_tab->aux_crc32_ok_cnt) << 7) / fat_tab->aux_crc32_fail_cnt;
+								fat_tab->target_ant_crc32 = (main_crc_utility == aux_crc_utility) ? (fat_tab->pre_target_ant_enhance) : ((main_crc_utility >= aux_crc_utility) ? MAIN_ANT : AUX_ANT);
 
 								if (main_crc_utility != 0 && aux_crc_utility != 0) {
 									if (main_crc_utility >= aux_crc_utility)
@@ -2045,14 +2582,14 @@ odm_evm_enhance_ant_div(
 										utility_ratio = (aux_crc_utility << 1) / main_crc_utility;
 								}
 							} else if (main_above1 == false && aux_above1 == false) {
-								if (p_dm_fat_table->main_crc32_ok_cnt == 0)
-									p_dm_fat_table->main_crc32_ok_cnt = 1;
-								if (p_dm_fat_table->aux_crc32_ok_cnt == 0)
-									p_dm_fat_table->aux_crc32_ok_cnt = 1;
+								if (fat_tab->main_crc32_ok_cnt == 0)
+									fat_tab->main_crc32_ok_cnt = 1;
+								if (fat_tab->aux_crc32_ok_cnt == 0)
+									fat_tab->aux_crc32_ok_cnt = 1;
 
-								main_crc_utility = ((p_dm_fat_table->main_crc32_fail_cnt) << 7) / p_dm_fat_table->main_crc32_ok_cnt;
-								aux_crc_utility = ((p_dm_fat_table->aux_crc32_fail_cnt) << 7) / p_dm_fat_table->aux_crc32_ok_cnt;
-								p_dm_fat_table->target_ant_crc32 = (main_crc_utility == aux_crc_utility) ? (p_dm_fat_table->pre_target_ant_enhance) : ((main_crc_utility <= aux_crc_utility) ? MAIN_ANT : AUX_ANT);
+								main_crc_utility = ((fat_tab->main_crc32_fail_cnt) << 7) / fat_tab->main_crc32_ok_cnt;
+								aux_crc_utility = ((fat_tab->aux_crc32_fail_cnt) << 7) / fat_tab->aux_crc32_ok_cnt;
+								fat_tab->target_ant_crc32 = (main_crc_utility == aux_crc_utility) ? (fat_tab->pre_target_ant_enhance) : ((main_crc_utility <= aux_crc_utility) ? MAIN_ANT : AUX_ANT);
 
 								if (main_crc_utility != 0 && aux_crc_utility != 0) {
 									if (main_crc_utility >= aux_crc_utility)
@@ -2062,46 +2599,46 @@ odm_evm_enhance_ant_div(
 								}
 							}
 						}
-						odm_set_mac_reg(p_dm, 0x608, BIT(8), 0);/* NOT Accept CRC32 Error packets. */
-						PHYDM_DBG(p_dm, DBG_ANT_DIV, ("MAIN_CRC: Ok=((%d)), Fail = ((%d)), Utility = ((%d))\n", p_dm_fat_table->main_crc32_ok_cnt, p_dm_fat_table->main_crc32_fail_cnt, main_crc_utility));
-						PHYDM_DBG(p_dm, DBG_ANT_DIV, ("AUX__CRC: Ok=((%d)), Fail = ((%d)), Utility = ((%d))\n", p_dm_fat_table->aux_crc32_ok_cnt, p_dm_fat_table->aux_crc32_fail_cnt, aux_crc_utility));
-						PHYDM_DBG(p_dm, DBG_ANT_DIV, ("***1.TargetAnt_CRC32 = ((%s))\n", (p_dm_fat_table->target_ant_crc32 == MAIN_ANT)?"MAIN_ANT":"AUX_ANT"));
-
-						/* 3 [EVM statistic] */
-						/*1SS EVM*/
-						main_1ss_evm = (p_dm_fat_table->main_ant_evm_cnt[i] != 0) ? (p_dm_fat_table->main_ant_evm_sum[i] / p_dm_fat_table->main_ant_evm_cnt[i]) : 0;
-						aux_1ss_evm = (p_dm_fat_table->aux_ant_evm_cnt[i] != 0) ? (p_dm_fat_table->aux_ant_evm_sum[i] / p_dm_fat_table->aux_ant_evm_cnt[i]) : 0;
-						target_ant_evm_1ss = (main_1ss_evm == aux_1ss_evm) ? (p_dm_fat_table->pre_target_ant_enhance) : ((main_1ss_evm >= aux_1ss_evm) ? MAIN_ANT : AUX_ANT);
-
-						PHYDM_DBG(p_dm, DBG_ANT_DIV, ("Cnt = ((%d)), Main1ss_EVM= ((  %d ))\n", p_dm_fat_table->main_ant_evm_cnt[i], main_1ss_evm));
-						PHYDM_DBG(p_dm, DBG_ANT_DIV, ("Cnt = ((%d)), Aux_1ss_EVM = ((  %d ))\n", p_dm_fat_table->main_ant_evm_cnt[i], aux_1ss_evm));
-
-						/*2SS EVM*/
-						main_2ss_evm[0] = (p_dm_fat_table->main_ant_evm_2ss_cnt[i] != 0) ? (p_dm_fat_table->main_ant_evm_2ss_sum[i][0] / p_dm_fat_table->main_ant_evm_2ss_cnt[i]) : 0;
-						main_2ss_evm[1] = (p_dm_fat_table->main_ant_evm_2ss_cnt[i] != 0) ? (p_dm_fat_table->main_ant_evm_2ss_sum[i][1] / p_dm_fat_table->main_ant_evm_2ss_cnt[i]) : 0;
+						odm_set_mac_reg(dm, R_0x608, BIT(8), 0); /* NOT Accept CRC32 Error packets. */
+						PHYDM_DBG(dm, DBG_ANT_DIV, "MAIN_CRC: Ok=((%d)), Fail = ((%d)), Utility = ((%d))\n", fat_tab->main_crc32_ok_cnt, fat_tab->main_crc32_fail_cnt, main_crc_utility);
+						PHYDM_DBG(dm, DBG_ANT_DIV, "AUX__CRC: Ok=((%d)), Fail = ((%d)), Utility = ((%d))\n", fat_tab->aux_crc32_ok_cnt, fat_tab->aux_crc32_fail_cnt, aux_crc_utility);
+						PHYDM_DBG(dm, DBG_ANT_DIV, "***1.TargetAnt_CRC32 = ((%s))\n", (fat_tab->target_ant_crc32 == MAIN_ANT) ? "MAIN_ANT" : "AUX_ANT");
+
+						/* @3 [EVM statistic] */
+						/*@1SS EVM*/
+						main_1ss_evm = (fat_tab->main_evm_cnt[i] != 0) ? (fat_tab->main_evm_sum[i] / fat_tab->main_evm_cnt[i]) : 0;
+						aux_1ss_evm = (fat_tab->aux_evm_cnt[i] != 0) ? (fat_tab->aux_evm_sum[i] / fat_tab->aux_evm_cnt[i]) : 0;
+						target_ant_evm_1ss = (main_1ss_evm == aux_1ss_evm) ? (fat_tab->pre_target_ant_enhance) : ((main_1ss_evm >= aux_1ss_evm) ? MAIN_ANT : AUX_ANT);
+
+						PHYDM_DBG(dm, DBG_ANT_DIV, "Cnt = ((%d)), Main1ss_EVM= ((  %d ))\n", fat_tab->main_evm_cnt[i], main_1ss_evm);
+						PHYDM_DBG(dm, DBG_ANT_DIV, "Cnt = ((%d)), Aux_1ss_EVM = ((  %d ))\n", fat_tab->aux_evm_cnt[i], aux_1ss_evm);
+
+						/*@2SS EVM*/
+						main_2ss_evm[0] = (fat_tab->main_evm_2ss_cnt[i] != 0) ? (fat_tab->main_evm_2ss_sum[i][0] / fat_tab->main_evm_2ss_cnt[i]) : 0;
+						main_2ss_evm[1] = (fat_tab->main_evm_2ss_cnt[i] != 0) ? (fat_tab->main_evm_2ss_sum[i][1] / fat_tab->main_evm_2ss_cnt[i]) : 0;
 						main_2ss_evm_sum = main_2ss_evm[0] + main_2ss_evm[1];
 
-						aux_2ss_evm[0] = (p_dm_fat_table->aux_ant_evm_2ss_cnt[i] != 0) ? (p_dm_fat_table->aux_ant_evm_2ss_sum[i][0] / p_dm_fat_table->aux_ant_evm_2ss_cnt[i]) : 0;
-						aux_2ss_evm[1] = (p_dm_fat_table->aux_ant_evm_2ss_cnt[i] != 0) ? (p_dm_fat_table->aux_ant_evm_2ss_sum[i][1] / p_dm_fat_table->aux_ant_evm_2ss_cnt[i]) : 0;
+						aux_2ss_evm[0] = (fat_tab->aux_evm_2ss_cnt[i] != 0) ? (fat_tab->aux_evm_2ss_sum[i][0] / fat_tab->aux_evm_2ss_cnt[i]) : 0;
+						aux_2ss_evm[1] = (fat_tab->aux_evm_2ss_cnt[i] != 0) ? (fat_tab->aux_evm_2ss_sum[i][1] / fat_tab->aux_evm_2ss_cnt[i]) : 0;
 						aux_2ss_evm_sum = aux_2ss_evm[0] + aux_2ss_evm[1];
 
-						target_ant_evm_2ss = (main_2ss_evm_sum == aux_2ss_evm_sum) ? (p_dm_fat_table->pre_target_ant_enhance) : ((main_2ss_evm_sum >= aux_2ss_evm_sum) ? MAIN_ANT : AUX_ANT);
+						target_ant_evm_2ss = (main_2ss_evm_sum == aux_2ss_evm_sum) ? (fat_tab->pre_target_ant_enhance) : ((main_2ss_evm_sum >= aux_2ss_evm_sum) ? MAIN_ANT : AUX_ANT);
 
-						PHYDM_DBG(p_dm, DBG_ANT_DIV, ("Cnt = ((%d)), Main2ss_EVM{A,B,Sum} = {%d, %d, %d}\n",
-							p_dm_fat_table->main_ant_evm_2ss_cnt[i], main_2ss_evm[0], main_2ss_evm[1], main_2ss_evm_sum));
-						PHYDM_DBG(p_dm, DBG_ANT_DIV, ("Cnt = ((%d)), Aux_2ss_EVM{A,B,Sum} = {%d, %d, %d}\n",
-							p_dm_fat_table->aux_ant_evm_2ss_cnt[i], aux_2ss_evm[0], aux_2ss_evm[1], aux_2ss_evm_sum));
+						PHYDM_DBG(dm, DBG_ANT_DIV, "Cnt = ((%d)), Main2ss_EVM{A,B,Sum} = {%d, %d, %d}\n",
+							  fat_tab->main_evm_2ss_cnt[i], main_2ss_evm[0], main_2ss_evm[1], main_2ss_evm_sum);
+						PHYDM_DBG(dm, DBG_ANT_DIV, "Cnt = ((%d)), Aux_2ss_EVM{A,B,Sum} = {%d, %d, %d}\n",
+							  fat_tab->aux_evm_2ss_cnt[i], aux_2ss_evm[0], aux_2ss_evm[1], aux_2ss_evm_sum);
 
 						if ((main_2ss_evm_sum + aux_2ss_evm_sum) != 0) {
 							decision_evm_ss = 2;
 							main_evm = main_2ss_evm_sum;
 							aux_evm = aux_2ss_evm_sum;
-							p_dm_fat_table->target_ant_evm = target_ant_evm_2ss;
+							fat_tab->target_ant_evm = target_ant_evm_2ss;
 						} else {
 							decision_evm_ss = 1;
 							main_evm = main_1ss_evm;
 							aux_evm = aux_1ss_evm;
-							p_dm_fat_table->target_ant_evm = target_ant_evm_1ss;
+							fat_tab->target_ant_evm = target_ant_evm_1ss;
 						}
 
 						if ((main_evm == 0 || aux_evm == 0))
@@ -2111,53 +2648,52 @@ odm_evm_enhance_ant_div(
 						else
 							diff_EVM = aux_evm - main_evm;
 
-						PHYDM_DBG(p_dm, DBG_ANT_DIV, ("***2.TargetAnt_EVM((%d-ss)) = ((%s))\n", decision_evm_ss, (p_dm_fat_table->target_ant_evm == MAIN_ANT) ? "MAIN_ANT" : "AUX_ANT"));
-
+						PHYDM_DBG(dm, DBG_ANT_DIV, "***2.TargetAnt_EVM((%d-ss)) = ((%s))\n", decision_evm_ss, (fat_tab->target_ant_evm == MAIN_ANT) ? "MAIN_ANT" : "AUX_ANT");
 
 						//3 [TP statistic]
-						antdiv_tp_main_avg = (p_dm_fat_table->antdiv_tp_main_cnt != 0) ? (p_dm_fat_table->antdiv_tp_main / p_dm_fat_table->antdiv_tp_main_cnt) : 0;
-						antdiv_tp_aux_avg = (p_dm_fat_table->antdiv_tp_aux_cnt != 0) ? (p_dm_fat_table->antdiv_tp_aux / p_dm_fat_table->antdiv_tp_aux_cnt) : 0;
-						p_dm_fat_table->target_ant_tp = (antdiv_tp_main_avg == antdiv_tp_aux_avg) ? (p_dm_fat_table->pre_target_ant_enhance) : ((antdiv_tp_main_avg >= antdiv_tp_aux_avg) ? MAIN_ANT : AUX_ANT);
+						main_tp_avg = (fat_tab->main_tp_cnt != 0) ? (fat_tab->main_tp / fat_tab->main_tp_cnt) : 0;
+						aux_tp_avg = (fat_tab->aux_tp_cnt != 0) ? (fat_tab->aux_tp / fat_tab->aux_tp_cnt) : 0;
+						fat_tab->target_ant_tp = (main_tp_avg == aux_tp_avg) ? (fat_tab->pre_target_ant_enhance) : ((main_tp_avg >= aux_tp_avg) ? MAIN_ANT : AUX_ANT);
 
-						PHYDM_DBG(p_dm, DBG_ANT_DIV, ("Cnt = ((%d)), Main_TP = ((%d))\n", p_dm_fat_table->antdiv_tp_main_cnt, antdiv_tp_main_avg));
-						PHYDM_DBG(p_dm, DBG_ANT_DIV, ("Cnt = ((%d)), Aux_TP = ((%d))\n", p_dm_fat_table->antdiv_tp_aux_cnt, antdiv_tp_aux_avg));
-						PHYDM_DBG(p_dm, DBG_ANT_DIV, ("***3.TargetAnt_TP = ((%s))\n", (p_dm_fat_table->target_ant_tp == MAIN_ANT) ? "MAIN_ANT" : "AUX_ANT"));
+						PHYDM_DBG(dm, DBG_ANT_DIV, "Cnt = ((%d)), Main_TP = ((%d))\n", fat_tab->main_tp_cnt, main_tp_avg);
+						PHYDM_DBG(dm, DBG_ANT_DIV, "Cnt = ((%d)), Aux_TP = ((%d))\n", fat_tab->aux_tp_cnt, aux_tp_avg);
+						PHYDM_DBG(dm, DBG_ANT_DIV, "***3.TargetAnt_TP = ((%s))\n", (fat_tab->target_ant_tp == MAIN_ANT) ? "MAIN_ANT" : "AUX_ANT");
 
 						/*Reset TP Method */
-						p_dm_fat_table->antdiv_tp_main = 0;
-						p_dm_fat_table->antdiv_tp_aux = 0;
-						p_dm_fat_table->antdiv_tp_main_cnt = 0;
-						p_dm_fat_table->antdiv_tp_aux_cnt = 0;
+						fat_tab->main_tp = 0;
+						fat_tab->aux_tp = 0;
+						fat_tab->main_tp_cnt = 0;
+						fat_tab->aux_tp_cnt = 0;
 
-						/* 2 [ Decision state ] */
-						if (p_dm_fat_table->target_ant_evm == p_dm_fat_table->target_ant_crc32) {
-							PHYDM_DBG(p_dm, DBG_ANT_DIV, ("Decision type 1, CRC_utility = ((%d)), EVM_diff = ((%d))\n", utility_ratio, diff_EVM));
+						/* @2 [ Decision state ] */
+						if (fat_tab->target_ant_evm == fat_tab->target_ant_crc32) {
+							PHYDM_DBG(dm, DBG_ANT_DIV, "Decision type 1, CRC_utility = ((%d)), EVM_diff = ((%d))\n", utility_ratio, diff_EVM);
 
 							if ((utility_ratio < 2 && force_antenna == false) && diff_EVM <= 30)
-								p_dm_fat_table->target_ant_enhance = p_dm_fat_table->pre_target_ant_enhance;
+								fat_tab->target_ant_enhance = fat_tab->pre_target_ant_enhance;
 							else
-								p_dm_fat_table->target_ant_enhance = p_dm_fat_table->target_ant_evm;
+								fat_tab->target_ant_enhance = fat_tab->target_ant_evm;
 						}
 						#if 0
 						else if ((diff_EVM <= 50 && (utility_ratio > 4 && force_antenna == false)) || (force_antenna == true)) {
-							PHYDM_DBG(p_dm, DBG_ANT_DIV, ("Decision type 2, CRC_utility = ((%d)), EVM_diff = ((%d))\n", utility_ratio, diff_EVM));
-							p_dm_fat_table->target_ant_enhance = p_dm_fat_table->target_ant_crc32;
+							PHYDM_DBG(dm, DBG_ANT_DIV, "Decision type 2, CRC_utility = ((%d)), EVM_diff = ((%d))\n", utility_ratio, diff_EVM);
+							fat_tab->target_ant_enhance = fat_tab->target_ant_crc32;
 						}
 						#endif
 						else if (diff_EVM >= 20) {
-							PHYDM_DBG(p_dm, DBG_ANT_DIV, ("Decision type 3, CRC_utility = ((%d)), EVM_diff = ((%d))\n", utility_ratio, diff_EVM));
-							p_dm_fat_table->target_ant_enhance = p_dm_fat_table->target_ant_evm;
+							PHYDM_DBG(dm, DBG_ANT_DIV, "Decision type 3, CRC_utility = ((%d)), EVM_diff = ((%d))\n", utility_ratio, diff_EVM);
+							fat_tab->target_ant_enhance = fat_tab->target_ant_evm;
 						} else if (utility_ratio >= 6 && force_antenna == false) {
-							PHYDM_DBG(p_dm, DBG_ANT_DIV, ("Decision type 4, CRC_utility = ((%d)), EVM_diff = ((%d))\n", utility_ratio, diff_EVM));
-							p_dm_fat_table->target_ant_enhance = p_dm_fat_table->target_ant_crc32;
+							PHYDM_DBG(dm, DBG_ANT_DIV, "Decision type 4, CRC_utility = ((%d)), EVM_diff = ((%d))\n", utility_ratio, diff_EVM);
+							fat_tab->target_ant_enhance = fat_tab->target_ant_crc32;
 						} else {
-							PHYDM_DBG(p_dm, DBG_ANT_DIV, ("Decision type 5, CRC_utility = ((%d)), EVM_diff = ((%d))\n", utility_ratio, diff_EVM));
+							PHYDM_DBG(dm, DBG_ANT_DIV, "Decision type 5, CRC_utility = ((%d)), EVM_diff = ((%d))\n", utility_ratio, diff_EVM);
 
 							if (force_antenna == true)
 								score_CRC = 2;
-							else if (utility_ratio >= 5) /*>2.5*/
+							else if (utility_ratio >= 5) /*@>2.5*/
 								score_CRC = 2;
-							else if (utility_ratio >= 4) /*>2*/
+							else if (utility_ratio >= 4) /*@>2*/
 								score_CRC = 1;
 							else
 								score_CRC = 0;
@@ -2172,2112 +2708,2593 @@ odm_evm_enhance_ant_div(
 								score_EVM = 0;
 
 							if (score_CRC > score_EVM)
-								p_dm_fat_table->target_ant_enhance = p_dm_fat_table->target_ant_crc32;
+								fat_tab->target_ant_enhance = fat_tab->target_ant_crc32;
 							else if (score_CRC < score_EVM)
-								p_dm_fat_table->target_ant_enhance = p_dm_fat_table->target_ant_evm;
+								fat_tab->target_ant_enhance = fat_tab->target_ant_evm;
 							else
-								p_dm_fat_table->target_ant_enhance = p_dm_fat_table->pre_target_ant_enhance;
+								fat_tab->target_ant_enhance = fat_tab->pre_target_ant_enhance;
 						}
-						p_dm_fat_table->pre_target_ant_enhance = p_dm_fat_table->target_ant_enhance;
-
-						PHYDM_DBG(p_dm, DBG_ANT_DIV, ("*** 4.TargetAnt_enhance = (( %s ))******\n", (p_dm_fat_table->target_ant_enhance == MAIN_ANT)?"MAIN_ANT":"AUX_ANT"));
-
+						fat_tab->pre_target_ant_enhance = fat_tab->target_ant_enhance;
 
+						PHYDM_DBG(dm, DBG_ANT_DIV, "*** 4.TargetAnt_enhance = (( %s ))******\n", (fat_tab->target_ant_enhance == MAIN_ANT) ? "MAIN_ANT" : "AUX_ANT");
 					}
 				} else { /* RSSI< = evm_rssi_th_low */
-					PHYDM_DBG(p_dm, DBG_ANT_DIV, ("[ <TH_L: escape from > TH_L ]\n"));
-					odm_evm_fast_ant_reset(p_dm);
+					PHYDM_DBG(dm, DBG_ANT_DIV, "[ <TH_L: escape from > TH_L ]\n");
+					odm_evm_fast_ant_reset(dm);
 				}
 			} else {
-				PHYDM_DBG(p_dm, DBG_ANT_DIV, ("[escape from> TH_H || EVM_method_enable==1]\n"));
-				odm_evm_fast_ant_reset(p_dm);
+				PHYDM_DBG(dm, DBG_ANT_DIV,
+					  "[escape from> TH_H || evm_method_enable==1]\n");
+				odm_evm_fast_ant_reset(dm);
 			}
 		} else {
-			PHYDM_DBG(p_dm, DBG_ANT_DIV, ("[multi-Client]\n"));
-			odm_evm_fast_ant_reset(p_dm);
+			PHYDM_DBG(dm, DBG_ANT_DIV, "[multi-Client]\n");
+			odm_evm_fast_ant_reset(dm);
 		}
 	}
 }
 
-void
-odm_evm_fast_ant_training_callback(
-	void		*p_dm_void
-)
+#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
+void phydm_evm_antdiv_callback(
+	struct phydm_timer_list *timer)
 {
-	struct PHY_DM_STRUCT		*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
+	void *adapter = (void *)timer->Adapter;
+	HAL_DATA_TYPE *hal_data = GET_HAL_DATA(((PADAPTER)adapter));
+	struct dm_struct *dm = &hal_data->DM_OutSrc;
+
+	#if DEV_BUS_TYPE == RT_PCI_INTERFACE
+	#if USE_WORKITEM
+	odm_schedule_work_item(&dm->phydm_evm_antdiv_workitem);
+	#else
+	{
+		odm_hw_ant_div(dm);
+	}
+	#endif
+	#else
+	odm_schedule_work_item(&dm->phydm_evm_antdiv_workitem);
+	#endif
+}
+
+void phydm_evm_antdiv_workitem_callback(
+	void *context)
+{
+	void *adapter = (void *)context;
+	HAL_DATA_TYPE *hal_data = GET_HAL_DATA(((PADAPTER)adapter));
+	struct dm_struct *dm = &hal_data->DM_OutSrc;
 
-	PHYDM_DBG(p_dm, DBG_ANT_DIV, ("******AntDiv_Callback******\n"));
-	odm_hw_ant_div(p_dm);
+	odm_hw_ant_div(dm);
 }
-#endif
 
-void
-odm_hw_ant_div(
-	void		*p_dm_void
-)
+#elif (DM_ODM_SUPPORT_TYPE == ODM_CE)
+void phydm_evm_antdiv_callback(void *dm_void)
 {
-	struct PHY_DM_STRUCT		*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	u32	i, min_max_rssi = 0xFF,  ant_div_max_rssi = 0, max_rssi = 0, local_max_rssi;
-	u32	main_rssi, aux_rssi, mian_cnt, aux_cnt;
-	struct phydm_fat_struct	*p_dm_fat_table = &p_dm->dm_fat_table;
-	u8	rx_idle_ant = p_dm_fat_table->rx_idle_ant, target_ant = 7;
-	struct phydm_dig_struct	*p_dig_t = &p_dm->dm_dig_table;
-	struct cmn_sta_info	*p_sta;
-
-#if (BEAMFORMING_SUPPORT == 1)
-#if (DM_ODM_SUPPORT_TYPE == ODM_AP)
-	struct _BF_DIV_COEX_    *p_dm_bdc_table = &p_dm->dm_bdc_table;
-	u32	TH1 = 500000;
-	u32	TH2 = 10000000;
-	u32	ma_rx_temp, degrade_TP_temp, improve_TP_temp;
-	u8	monitor_rssi_threshold = 30;
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	void *padapter = dm->adapter;
 
-	p_dm_bdc_table->BF_pass = true;
-	p_dm_bdc_table->DIV_pass = true;
-	p_dm_bdc_table->is_all_div_sta_idle = true;
-	p_dm_bdc_table->is_all_bf_sta_idle = true;
-	p_dm_bdc_table->num_bf_tar = 0 ;
-	p_dm_bdc_table->num_div_tar = 0;
-	p_dm_bdc_table->num_client = 0;
-#endif
+	if (*dm->is_net_closed)
+		return;
+	if (dm->support_interface == ODM_ITRF_PCIE) {
+		odm_hw_ant_div(dm);
+	} else {
+		/* @Can't do I/O in timer callback*/
+		phydm_run_in_thread_cmd(dm,
+					phydm_evm_antdiv_workitem_callback,
+					padapter);
+	}
+}
+
+void phydm_evm_antdiv_workitem_callback(void *context)
+{
+	void *adapter = (void *)context;
+	HAL_DATA_TYPE *hal_data = GET_HAL_DATA(((PADAPTER)adapter));
+	struct dm_struct *dm = &hal_data->odmpriv;
+
+	odm_hw_ant_div(dm);
+}
+
+#else
+void phydm_evm_antdiv_callback(
+	void *dm_void)
+{
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+
+	PHYDM_DBG(dm, DBG_ANT_DIV, "******AntDiv_Callback******\n");
+	odm_hw_ant_div(dm);
+}
 #endif
 
-	if (!p_dm->is_linked) { /* is_linked==False */
-		PHYDM_DBG(p_dm, DBG_ANT_DIV, ("[No Link!!!]\n"));
+#endif
 
-		if (p_dm_fat_table->is_become_linked == true) {
-			odm_ant_div_on_off(p_dm, ANTDIV_OFF);
-			odm_update_rx_idle_ant(p_dm, MAIN_ANT);
-			odm_tx_by_tx_desc_or_reg(p_dm, TX_BY_REG);
-			p_dm->antdiv_period = 0;
+void odm_hw_ant_div(void *dm_void)
+{
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	u32 i, min_max_rssi = 0xFF, ant_div_max_rssi = 0, max_rssi = 0;
+	u32 main_rssi, aux_rssi, mian_cnt, aux_cnt, local_max_rssi;
+	struct phydm_fat_struct *fat_tab = &dm->dm_fat_table;
+	u8 rx_idle_ant = fat_tab->rx_idle_ant, target_ant = 7;
+	struct phydm_dig_struct *dig_t = &dm->dm_dig_table;
+	struct cmn_sta_info *sta;
+
+#ifdef PHYDM_BEAMFORMING_SUPPORT
+#if (DM_ODM_SUPPORT_TYPE == ODM_AP)
+	struct _BF_DIV_COEX_ *dm_bdc_table = &dm->dm_bdc_table;
+	u32 TH1 = 500000;
+	u32 TH2 = 10000000;
+	u32 ma_rx_temp, degrade_TP_temp, improve_TP_temp;
+	u8 monitor_rssi_threshold = 30;
+
+	dm_bdc_table->BF_pass = true;
+	dm_bdc_table->DIV_pass = true;
+	dm_bdc_table->is_all_div_sta_idle = true;
+	dm_bdc_table->is_all_bf_sta_idle = true;
+	dm_bdc_table->num_bf_tar = 0;
+	dm_bdc_table->num_div_tar = 0;
+	dm_bdc_table->num_client = 0;
+#endif
+#endif
 
-			p_dm_fat_table->is_become_linked = p_dm->is_linked;
+	if (!dm->is_linked) { /* @is_linked==False */
+		PHYDM_DBG(dm, DBG_ANT_DIV, "[No Link!!!]\n");
+
+		if (fat_tab->is_become_linked == true) {
+			if (fat_tab->div_path_type == ANT_PATH_A)
+				odm_ant_div_on_off(dm, ANTDIV_OFF, ANT_PATH_A);
+			else if (fat_tab->div_path_type == ANT_PATH_B)
+				odm_ant_div_on_off(dm, ANTDIV_OFF, ANT_PATH_B);
+			else if (fat_tab->div_path_type == ANT_PATH_AB)
+				odm_ant_div_on_off(dm, ANTDIV_OFF, ANT_PATH_AB);
+			odm_update_rx_idle_ant(dm, MAIN_ANT);
+			odm_tx_by_tx_desc_or_reg(dm, TX_BY_REG);
+			dm->antdiv_period = 0;
+
+			fat_tab->is_become_linked = dm->is_linked;
 		}
 		return;
 	} else {
-		if (p_dm_fat_table->is_become_linked == false) {
-			PHYDM_DBG(p_dm, DBG_ANT_DIV, ("[Linked !!!]\n"));
-			odm_ant_div_on_off(p_dm, ANTDIV_ON);
-			/*odm_tx_by_tx_desc_or_reg(p_dm, TX_BY_DESC);*/
+		if (fat_tab->is_become_linked == false) {
+			PHYDM_DBG(dm, DBG_ANT_DIV, "[Linked !!!]\n");
+			if (fat_tab->div_path_type == ANT_PATH_A)
+				odm_ant_div_on_off(dm, ANTDIV_ON, ANT_PATH_A);
+			else if (fat_tab->div_path_type == ANT_PATH_B)
+				odm_ant_div_on_off(dm, ANTDIV_ON, ANT_PATH_B);
+			else if (fat_tab->div_path_type == ANT_PATH_AB)
+				odm_ant_div_on_off(dm, ANTDIV_ON, ANT_PATH_AB);
+#if 0
+			/*odm_tx_by_tx_desc_or_reg(dm, TX_BY_DESC);*/
+#endif
 
-			/* if(p_dm->support_ic_type == ODM_RTL8821 ) */
-			/* odm_set_bb_reg(p_dm, 0x800, BIT(25), 0); */ /* CCK AntDiv function disable */
+#if 0
+			/* @if(dm->support_ic_type == ODM_RTL8821 ) */
+			/* odm_set_bb_reg(dm, R_0x800, BIT(25), 0); */
+			/* CCK AntDiv function disable */
+#endif
 
-			/* #if(DM_ODM_SUPPORT_TYPE  == ODM_AP) */
-			/* else if(p_dm->support_ic_type == ODM_RTL8881A) */
-			/* odm_set_bb_reg(p_dm, 0x800, BIT(25), 0); */ /* CCK AntDiv function disable */
-			/* #endif */
+#if 0
+			/* @#if(DM_ODM_SUPPORT_TYPE  == ODM_AP) */
+			/* @else if(dm->support_ic_type == ODM_RTL8881A) */
+			/* odm_set_bb_reg(dm, R_0x800, BIT(25), 0); */
+			/* CCK AntDiv function disable */
+			/* @#endif */
+#endif
 
-			/* else if(p_dm->support_ic_type == ODM_RTL8723B ||p_dm->support_ic_type == ODM_RTL8812) */
-			/* odm_set_bb_reg(p_dm, 0xA00, BIT(15), 0); */ /* CCK AntDiv function disable */
+#if 0
+			/* @else if(dm->support_ic_type == ODM_RTL8723B ||*/
+			/* @dm->support_ic_type == ODM_RTL8812) */
+			/* odm_set_bb_reg(dm, R_0xa00, BIT(15), 0); */
+			/* CCK AntDiv function disable */
+#endif
 
-			p_dm_fat_table->is_become_linked = p_dm->is_linked;
+			fat_tab->is_become_linked = dm->is_linked;
 
-			if (p_dm->support_ic_type == ODM_RTL8723B && p_dm->ant_div_type == CG_TRX_HW_ANTDIV) {
-				odm_set_bb_reg(p_dm, 0x930, 0xF0, 8); /* DPDT_P = ANTSEL[0]   */ /* for 8723B AntDiv function patch.  BB  Dino  130412 */
-				odm_set_bb_reg(p_dm, 0x930, 0xF, 8); /* DPDT_N = ANTSEL[0] */
+			if (dm->support_ic_type == ODM_RTL8723B &&
+			    dm->ant_div_type == CG_TRX_HW_ANTDIV) {
+				odm_set_bb_reg(dm, R_0x930, 0xF0, 8);
+				/* @DPDT_P = ANTSEL[0] for 8723B AntDiv */
+				/* @ function patch. BB  Dino 130412 */
+				odm_set_bb_reg(dm, R_0x930, 0xF, 8);
+				/* @DPDT_N = ANTSEL[0] */
 			}
 
-			/* 2 BDC Init */
-#if (BEAMFORMING_SUPPORT == 1)
+/* @2 BDC Init */
+#ifdef PHYDM_BEAMFORMING_SUPPORT
 #if (DM_ODM_SUPPORT_TYPE == ODM_AP)
-			odm_bdc_init(p_dm);
+			odm_bdc_init(dm);
 #endif
 #endif
 
 #ifdef ODM_EVM_ENHANCE_ANTDIV
-			odm_evm_fast_ant_reset(p_dm);
+			odm_evm_fast_ant_reset(dm);
 #endif
 		}
 	}
 
-	if (*(p_dm_fat_table->p_force_tx_ant_by_desc) == false) {
-		if (p_dm->is_one_entry_only == true)
-			odm_tx_by_tx_desc_or_reg(p_dm, TX_BY_REG);
+	if (!(*fat_tab->p_force_tx_by_desc)) {
+		if (dm->is_one_entry_only == true)
+			odm_tx_by_tx_desc_or_reg(dm, TX_BY_REG);
 		else
-			odm_tx_by_tx_desc_or_reg(p_dm, TX_BY_DESC);
+			odm_tx_by_tx_desc_or_reg(dm, TX_BY_DESC);
 	}
 
 #ifdef ODM_EVM_ENHANCE_ANTDIV
-	if (p_dm->antdiv_evm_en == 1) {
-		odm_evm_enhance_ant_div(p_dm);
-		if (p_dm_fat_table->fat_state_cnt != 0)
+	if (dm->antdiv_evm_en == 1) {
+		odm_evm_enhance_ant_div(dm);
+		if (fat_tab->fat_state_cnt != 0)
 			return;
 	} else
-		odm_evm_fast_ant_reset(p_dm);
+		odm_evm_fast_ant_reset(dm);
 #endif
 
-	/* 2 BDC mode Arbitration */
-#if (BEAMFORMING_SUPPORT == 1)
+/* @2 BDC mode Arbitration */
+#ifdef PHYDM_BEAMFORMING_SUPPORT
 #if (DM_ODM_SUPPORT_TYPE == ODM_AP)
-	if (p_dm->antdiv_evm_en == 0 || p_dm_fat_table->EVM_method_enable == 0)
-		odm_bf_ant_div_mode_arbitration(p_dm);
+	if (dm->antdiv_evm_en == 0 || fat_tab->evm_method_enable == 0)
+		odm_bf_ant_div_mode_arbitration(dm);
 #endif
 #endif
 
 	for (i = 0; i < ODM_ASSOCIATE_ENTRY_NUM; i++) {
-		p_sta = p_dm->p_phydm_sta_info[i];
-		if (is_sta_active(p_sta)) {
-			/* 2 Caculate RSSI per Antenna */
-			if ((p_dm_fat_table->main_ant_cnt[i] != 0) || (p_dm_fat_table->aux_ant_cnt[i] != 0)) {
-				mian_cnt = p_dm_fat_table->main_ant_cnt[i];
-				aux_cnt = p_dm_fat_table->aux_ant_cnt[i];
-				main_rssi = (mian_cnt != 0) ? (p_dm_fat_table->main_ant_sum[i] / mian_cnt) : 0;
-				aux_rssi = (aux_cnt != 0) ? (p_dm_fat_table->aux_ant_sum[i] / aux_cnt) : 0;
-				target_ant = (mian_cnt == aux_cnt) ? p_dm_fat_table->rx_idle_ant : ((mian_cnt >= aux_cnt) ? MAIN_ANT : AUX_ANT); /*Use counter number for OFDM*/
-
-			} else {	/*CCK only case*/
-				mian_cnt = p_dm_fat_table->main_ant_cnt_cck[i];
-				aux_cnt = p_dm_fat_table->aux_ant_cnt_cck[i];
-				main_rssi = (mian_cnt != 0) ? (p_dm_fat_table->main_ant_sum_cck[i] / mian_cnt) : 0;
-				aux_rssi = (aux_cnt != 0) ? (p_dm_fat_table->aux_ant_sum_cck[i] / aux_cnt) : 0;
-				target_ant = (main_rssi == aux_rssi) ? p_dm_fat_table->rx_idle_ant : ((main_rssi >= aux_rssi) ? MAIN_ANT : AUX_ANT); /*Use RSSI for CCK only case*/
-			}
+		sta = dm->phydm_sta_info[i];
+		if (!is_sta_active(sta)) {
+			phydm_antdiv_reset_statistic(dm, i);
+			continue;
+		}
 
-			PHYDM_DBG(p_dm, DBG_ANT_DIV, ("*** Client[ %d ] : Main_Cnt = (( %d ))  ,  CCK_Main_Cnt = (( %d )) ,  main_rssi= ((  %d ))\n", i, p_dm_fat_table->main_ant_cnt[i], p_dm_fat_table->main_ant_cnt_cck[i], main_rssi));
-			PHYDM_DBG(p_dm, DBG_ANT_DIV, ("*** Client[ %d ] : Aux_Cnt   = (( %d ))  , CCK_Aux_Cnt   = (( %d )) ,  aux_rssi = ((  %d ))\n", i, p_dm_fat_table->aux_ant_cnt[i], p_dm_fat_table->aux_ant_cnt_cck[i], aux_rssi));
-			/* PHYDM_DBG(p_dm,DBG_ANT_DIV, ("*** MAC ID:[ %d ] , target_ant = (( %s ))\n", i ,( target_ant ==MAIN_ANT)?"MAIN_ANT":"AUX_ANT")); */
-
-			local_max_rssi = (main_rssi > aux_rssi) ? main_rssi : aux_rssi;
-			/* 2 Select max_rssi for DIG */
-			if ((local_max_rssi > ant_div_max_rssi) && (local_max_rssi < 40))
-				ant_div_max_rssi = local_max_rssi;
-			if (local_max_rssi > max_rssi)
-				max_rssi = local_max_rssi;
-
-			/* 2 Select RX Idle Antenna */
-			if ((local_max_rssi != 0) && (local_max_rssi < min_max_rssi)) {
-				rx_idle_ant = target_ant;
-				min_max_rssi = local_max_rssi;
-			}
+		/* @2 Caculate RSSI per Antenna */
+		if (fat_tab->main_cnt[i] != 0 || fat_tab->aux_cnt[i] != 0) {
+			mian_cnt = fat_tab->main_cnt[i];
+			aux_cnt = fat_tab->aux_cnt[i];
+			main_rssi = (mian_cnt != 0) ?
+				    (fat_tab->main_sum[i] / mian_cnt) : 0;
+			aux_rssi = (aux_cnt != 0) ?
+				   (fat_tab->aux_sum[i] / aux_cnt) : 0;
+			target_ant = (mian_cnt == aux_cnt) ?
+				     fat_tab->rx_idle_ant :
+				     ((mian_cnt >= aux_cnt) ?
+				     MAIN_ANT : AUX_ANT);
+				     /*Use counter number for OFDM*/
+
+		} else { /*@CCK only case*/
+			mian_cnt = fat_tab->main_cnt_cck[i];
+			aux_cnt = fat_tab->aux_cnt_cck[i];
+			main_rssi = (mian_cnt != 0) ?
+				    (fat_tab->main_sum_cck[i] / mian_cnt) : 0;
+			aux_rssi = (aux_cnt != 0) ?
+				   (fat_tab->aux_sum_cck[i] / aux_cnt) : 0;
+			target_ant = (main_rssi == aux_rssi) ?
+				     fat_tab->rx_idle_ant :
+				     ((main_rssi >= aux_rssi) ?
+				     MAIN_ANT : AUX_ANT);
+				     /*Use RSSI for CCK only case*/
+		}
+
+		PHYDM_DBG(dm, DBG_ANT_DIV,
+			  "*** Client[ %d ] : Main_Cnt = (( %d ))  ,  CCK_Main_Cnt = (( %d )) ,  main_rssi= ((  %d ))\n",
+			  i, fat_tab->main_cnt[i],
+			  fat_tab->main_cnt_cck[i], main_rssi);
+		PHYDM_DBG(dm, DBG_ANT_DIV,
+			  "*** Client[ %d ] : Aux_Cnt   = (( %d ))  , CCK_Aux_Cnt   = (( %d )) ,  aux_rssi = ((  %d ))\n",
+			  i, fat_tab->aux_cnt[i],
+			  fat_tab->aux_cnt_cck[i], aux_rssi);
+#if 0
+		/* PHYDM_DBG(dm,DBG_ANT_DIV, "*** MAC ID:[ %d ] , target_ant =*/
+		/*( %s )\n", i ,(target_ant==MAIN_ANT)?"MAIN_ANT":"AUX_ANT"); */
+#endif
+
+		local_max_rssi = (main_rssi > aux_rssi) ? main_rssi : aux_rssi;
+		/* @2 Select max_rssi for DIG */
+		if (local_max_rssi > ant_div_max_rssi && local_max_rssi < 40)
+			ant_div_max_rssi = local_max_rssi;
+		if (local_max_rssi > max_rssi)
+			max_rssi = local_max_rssi;
+
+		/* @2 Select RX Idle Antenna */
+		if (local_max_rssi != 0 && local_max_rssi < min_max_rssi) {
+			rx_idle_ant = target_ant;
+			min_max_rssi = local_max_rssi;
+		}
 
 #ifdef ODM_EVM_ENHANCE_ANTDIV
-			if (p_dm->antdiv_evm_en == 1) {
-				if (p_dm_fat_table->target_ant_enhance != 0xFF) {
-					target_ant = p_dm_fat_table->target_ant_enhance;
-					rx_idle_ant = p_dm_fat_table->target_ant_enhance;
-				}
+		if (dm->antdiv_evm_en == 1) {
+			if (fat_tab->target_ant_enhance != 0xFF) {
+				target_ant = fat_tab->target_ant_enhance;
+				rx_idle_ant = fat_tab->target_ant_enhance;
 			}
+		}
 #endif
 
-			/* 2 Select TX Antenna */
-			if (p_dm->ant_div_type != CGCS_RX_HW_ANTDIV) {
-#if (BEAMFORMING_SUPPORT == 1)
+		/* @2 Select TX Antenna */
+		if (dm->ant_div_type != CGCS_RX_HW_ANTDIV) {
+#ifdef PHYDM_BEAMFORMING_SUPPORT
 #if (DM_ODM_SUPPORT_TYPE == ODM_AP)
-				if (p_dm_bdc_table->w_bfee_client[i] == 0)
+			if (dm_bdc_table->w_bfee_client[i] == 0)
 #endif
 #endif
-				{
-					odm_update_tx_ant(p_dm, target_ant, i);
-				}
+			{
+				odm_update_tx_ant(dm, target_ant, i);
 			}
+		}
 
-			/* ------------------------------------------------------------ */
+/* @------------------------------------------------------------ */
 
-#if (BEAMFORMING_SUPPORT == 1)
+#ifdef PHYDM_BEAMFORMING_SUPPORT
 #if (DM_ODM_SUPPORT_TYPE == ODM_AP)
 
-			p_dm_bdc_table->num_client++;
-
-			if (p_dm_bdc_table->bdc_mode == BDC_MODE_2 || p_dm_bdc_table->bdc_mode == BDC_MODE_3) {
-				/* 2 Byte counter */
+		dm_bdc_table->num_client++;
 
-				ma_rx_temp = p_sta->rx_moving_average_tp; /* RX  TP   ( bit /sec) */
+		if (dm_bdc_table->bdc_mode == BDC_MODE_2 || dm_bdc_table->bdc_mode == BDC_MODE_3) {
+			/* @2 Byte counter */
 
-				if (p_dm_bdc_table->BDC_state == bdc_bfer_train_state)
-					p_dm_bdc_table->MA_rx_TP_DIV[i] =  ma_rx_temp ;
-				else
-					p_dm_bdc_table->MA_rx_TP[i] = ma_rx_temp ;
+			ma_rx_temp = sta->rx_moving_average_tp; /* RX  TP   ( bit /sec) */
 
-				if ((ma_rx_temp < TH2)   && (ma_rx_temp > TH1) && (local_max_rssi <= monitor_rssi_threshold)) {
-					if (p_dm_bdc_table->w_bfer_client[i] == 1) { /* Bfer_Target */
-						p_dm_bdc_table->num_bf_tar++;
+			if (dm_bdc_table->BDC_state == bdc_bfer_train_state)
+				dm_bdc_table->MA_rx_TP_DIV[i] = ma_rx_temp;
+			else
+				dm_bdc_table->MA_rx_TP[i] = ma_rx_temp;
 
-						if (p_dm_bdc_table->BDC_state == BDC_DECISION_STATE && p_dm_bdc_table->bdc_try_flag == 0) {
-							improve_TP_temp = (p_dm_bdc_table->MA_rx_TP_DIV[i] * 9) >> 3 ; /* * 1.125 */
-							p_dm_bdc_table->BF_pass = (p_dm_bdc_table->MA_rx_TP[i] > improve_TP_temp) ? true : false;
-							PHYDM_DBG(p_dm, DBG_ANT_DIV, ("*** Client[ %d ] :  { MA_rx_TP,improve_TP_temp, MA_rx_TP_DIV,  BF_pass}={ %d,  %d, %d , %d }\n", i, p_dm_bdc_table->MA_rx_TP[i], improve_TP_temp, p_dm_bdc_table->MA_rx_TP_DIV[i], p_dm_bdc_table->BF_pass));
-						}
-					} else { /* DIV_Target */
-						p_dm_bdc_table->num_div_tar++;
+			if (ma_rx_temp < TH2 && ma_rx_temp > TH1 && local_max_rssi <= monitor_rssi_threshold) {
+				if (dm_bdc_table->w_bfer_client[i] == 1) { /* @Bfer_Target */
+					dm_bdc_table->num_bf_tar++;
 
-						if (p_dm_bdc_table->BDC_state == BDC_DECISION_STATE && p_dm_bdc_table->bdc_try_flag == 0) {
-							degrade_TP_temp = (p_dm_bdc_table->MA_rx_TP_DIV[i] * 5) >> 3; /* * 0.625 */
-							p_dm_bdc_table->DIV_pass = (p_dm_bdc_table->MA_rx_TP[i] > degrade_TP_temp) ? true : false;
-							PHYDM_DBG(p_dm, DBG_ANT_DIV, ("*** Client[ %d ] :  { MA_rx_TP, degrade_TP_temp, MA_rx_TP_DIV,  DIV_pass}=\n{ %d,  %d, %d , %d }\n", i, p_dm_bdc_table->MA_rx_TP[i], degrade_TP_temp, p_dm_bdc_table->MA_rx_TP_DIV[i], p_dm_bdc_table->DIV_pass));
-						}
+					if (dm_bdc_table->BDC_state == BDC_DECISION_STATE && dm_bdc_table->bdc_try_flag == 0) {
+						improve_TP_temp = (dm_bdc_table->MA_rx_TP_DIV[i] * 9) >> 3; /* @* 1.125 */
+						dm_bdc_table->BF_pass = (dm_bdc_table->MA_rx_TP[i] > improve_TP_temp) ? true : false;
+						PHYDM_DBG(dm, DBG_ANT_DIV, "*** Client[ %d ] :  { MA_rx_TP,improve_TP_temp, MA_rx_TP_DIV,  BF_pass}={ %d,  %d, %d , %d }\n", i, dm_bdc_table->MA_rx_TP[i], improve_TP_temp, dm_bdc_table->MA_rx_TP_DIV[i], dm_bdc_table->BF_pass);
 					}
-				}
+				} else { /* @DIV_Target */
+					dm_bdc_table->num_div_tar++;
 
-				if (ma_rx_temp > TH1) {
-					if (p_dm_bdc_table->w_bfer_client[i] == 1) /* Bfer_Target */
-						p_dm_bdc_table->is_all_bf_sta_idle = false;
-					else/* DIV_Target */
-						p_dm_bdc_table->is_all_div_sta_idle = false;
+					if (dm_bdc_table->BDC_state == BDC_DECISION_STATE && dm_bdc_table->bdc_try_flag == 0) {
+						degrade_TP_temp = (dm_bdc_table->MA_rx_TP_DIV[i] * 5) >> 3; /* @* 0.625 */
+						dm_bdc_table->DIV_pass = (dm_bdc_table->MA_rx_TP[i] > degrade_TP_temp) ? true : false;
+						PHYDM_DBG(dm, DBG_ANT_DIV, "*** Client[ %d ] :  { MA_rx_TP, degrade_TP_temp, MA_rx_TP_DIV,  DIV_pass}=\n{ %d,  %d, %d , %d }\n", i, dm_bdc_table->MA_rx_TP[i], degrade_TP_temp, dm_bdc_table->MA_rx_TP_DIV[i], dm_bdc_table->DIV_pass);
+					}
 				}
+			}
 
-				PHYDM_DBG(p_dm, DBG_ANT_DIV, ("*** Client[ %d ] :  { BFmeeCap, BFmerCap}  = { %d , %d }\n", i, p_dm_bdc_table->w_bfee_client[i], p_dm_bdc_table->w_bfer_client[i]));
+			if (ma_rx_temp > TH1) {
+				if (dm_bdc_table->w_bfer_client[i] == 1) /* @Bfer_Target */
+					dm_bdc_table->is_all_bf_sta_idle = false;
+				else /* @DIV_Target */
+					dm_bdc_table->is_all_div_sta_idle = false;
+			}
 
-				if (p_dm_bdc_table->BDC_state == bdc_bfer_train_state)
-					PHYDM_DBG(p_dm, DBG_ANT_DIV, ("*** Client[ %d ] :    MA_rx_TP_DIV = (( %d ))\n", i, p_dm_bdc_table->MA_rx_TP_DIV[i]));
+			PHYDM_DBG(dm, DBG_ANT_DIV,
+				  "*** Client[ %d ] :  { BFmeeCap, BFmerCap}  = { %d , %d }\n",
+				  i, dm_bdc_table->w_bfee_client[i],
+				  dm_bdc_table->w_bfer_client[i]);
 
-				else
-					PHYDM_DBG(p_dm, DBG_ANT_DIV, ("*** Client[ %d ] :    MA_rx_TP = (( %d ))\n", i, p_dm_bdc_table->MA_rx_TP[i]));
+			if (dm_bdc_table->BDC_state == bdc_bfer_train_state)
+				PHYDM_DBG(dm, DBG_ANT_DIV, "*** Client[ %d ] :    MA_rx_TP_DIV = (( %d ))\n", i, dm_bdc_table->MA_rx_TP_DIV[i]);
 
-			}
+			else
+				PHYDM_DBG(dm, DBG_ANT_DIV, "*** Client[ %d ] :    MA_rx_TP = (( %d ))\n", i, dm_bdc_table->MA_rx_TP[i]);
+		}
 #endif
 #endif
 
-		}
-
-#if (BEAMFORMING_SUPPORT == 1)
+#ifdef PHYDM_BEAMFORMING_SUPPORT
 #if (DM_ODM_SUPPORT_TYPE == ODM_AP)
-		if (p_dm_bdc_table->bdc_try_flag == 0)
+		if (dm_bdc_table->bdc_try_flag == 0)
 #endif
 #endif
 		{
-			phydm_antdiv_reset_statistic(p_dm, i);
+			phydm_antdiv_reset_statistic(dm, i);
 		}
 	}
 
-
-
-	/* 2 Set RX Idle Antenna & TX Antenna(Because of HW Bug ) */
+/* @2 Set RX Idle Antenna & TX Antenna(Because of HW Bug ) */
 #if (DM_ODM_SUPPORT_TYPE == ODM_AP)
-	PHYDM_DBG(p_dm, DBG_ANT_DIV, ("*** rx_idle_ant = (( %s ))\n", (rx_idle_ant == MAIN_ANT) ? "MAIN_ANT" : "AUX_ANT"));
+	PHYDM_DBG(dm, DBG_ANT_DIV, "*** rx_idle_ant = (( %s ))\n",
+		  (rx_idle_ant == MAIN_ANT) ? "MAIN_ANT" : "AUX_ANT");
 
-#if (BEAMFORMING_SUPPORT == 1)
+#ifdef PHYDM_BEAMFORMING_SUPPORT
 #if (DM_ODM_SUPPORT_TYPE == ODM_AP)
-	if (p_dm_bdc_table->bdc_mode == BDC_MODE_1 || p_dm_bdc_table->bdc_mode == BDC_MODE_3) {
-		PHYDM_DBG(p_dm, DBG_ANT_DIV, ("*** bdc_rx_idle_update_counter = (( %d ))\n", p_dm_bdc_table->bdc_rx_idle_update_counter));
-
-		if (p_dm_bdc_table->bdc_rx_idle_update_counter == 1) {
-			PHYDM_DBG(p_dm, DBG_ANT_DIV, ("***Update RxIdle Antenna!!!\n"));
-			p_dm_bdc_table->bdc_rx_idle_update_counter = 30;
-			odm_update_rx_idle_ant(p_dm, rx_idle_ant);
+	if (dm_bdc_table->bdc_mode == BDC_MODE_1 || dm_bdc_table->bdc_mode == BDC_MODE_3) {
+		PHYDM_DBG(dm, DBG_ANT_DIV,
+			  "*** bdc_rx_idle_update_counter = (( %d ))\n",
+			  dm_bdc_table->bdc_rx_idle_update_counter);
+
+		if (dm_bdc_table->bdc_rx_idle_update_counter == 1) {
+			PHYDM_DBG(dm, DBG_ANT_DIV,
+				  "***Update RxIdle Antenna!!!\n");
+			dm_bdc_table->bdc_rx_idle_update_counter = 30;
+			odm_update_rx_idle_ant(dm, rx_idle_ant);
 		} else {
-			p_dm_bdc_table->bdc_rx_idle_update_counter--;
-			PHYDM_DBG(p_dm, DBG_ANT_DIV, ("***NOT update RxIdle Antenna because of BF  ( need to fix TX-ant)\n"));
+			dm_bdc_table->bdc_rx_idle_update_counter--;
+			PHYDM_DBG(dm, DBG_ANT_DIV,
+				  "***NOT update RxIdle Antenna because of BF  ( need to fix TX-ant)\n");
 		}
 	} else
 #endif
 #endif
-		odm_update_rx_idle_ant(p_dm, rx_idle_ant);
+		odm_update_rx_idle_ant(dm, rx_idle_ant);
 #else
 
-	odm_update_rx_idle_ant(p_dm, rx_idle_ant);
-
-#endif/* #if(DM_ODM_SUPPORT_TYPE  == ODM_AP) */
+	odm_update_rx_idle_ant(dm, rx_idle_ant);
 
+#endif /* @#if(DM_ODM_SUPPORT_TYPE  == ODM_AP) */
 
-
-	/* 2 BDC Main Algorithm */
-#if (BEAMFORMING_SUPPORT == 1)
+/* @2 BDC Main Algorithm */
+#ifdef PHYDM_BEAMFORMING_SUPPORT
 #if (DM_ODM_SUPPORT_TYPE == ODM_AP)
-	if (p_dm->antdiv_evm_en == 0 || p_dm_fat_table->EVM_method_enable == 0)
-		odm_bd_ccoex_bfee_rx_div_arbitration(p_dm);
+	if (dm->antdiv_evm_en == 0 || fat_tab->evm_method_enable == 0)
+		odm_bd_ccoex_bfee_rx_div_arbitration(dm);
+
+	dm_bdc_table->num_txbfee_client = 0;
+	dm_bdc_table->num_txbfer_client = 0;
 #endif
 #endif
 
 	if (ant_div_max_rssi == 0)
-		p_dig_t->ant_div_rssi_max = p_dm->rssi_min;
+		dig_t->ant_div_rssi_max = dm->rssi_min;
 	else
-		p_dig_t->ant_div_rssi_max = ant_div_max_rssi;
+		dig_t->ant_div_rssi_max = ant_div_max_rssi;
 
-	PHYDM_DBG(p_dm, DBG_ANT_DIV, ("***AntDiv End***\n\n"));
+	PHYDM_DBG(dm, DBG_ANT_DIV, "***AntDiv End***\n\n");
 }
 
-
-
 #ifdef CONFIG_S0S1_SW_ANTENNA_DIVERSITY
 
-void
-odm_s0s1_sw_ant_div_reset(
-	void		*p_dm_void
-)
+void odm_s0s1_sw_ant_div_reset(void *dm_void)
 {
-	struct PHY_DM_STRUCT	*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	struct _sw_antenna_switch_		*p_dm_swat_table	= &p_dm->dm_swat_table;
-	struct phydm_fat_struct		*p_dm_fat_table		= &p_dm->dm_fat_table;
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct sw_antenna_switch *swat_tab = &dm->dm_swat_table;
+	struct phydm_fat_struct *fat_tab = &dm->dm_fat_table;
 
-	p_dm_fat_table->is_become_linked  = false;
-	p_dm_swat_table->try_flag = SWAW_STEP_INIT;
-	p_dm_swat_table->double_chk_flag = 0;
+	fat_tab->is_become_linked = false;
+	swat_tab->try_flag = SWAW_STEP_INIT;
+	swat_tab->double_chk_flag = 0;
 
-	PHYDM_DBG(p_dm, DBG_ANT_DIV, ("odm_s0s1_sw_ant_div_reset(): p_dm_fat_table->is_become_linked = %d\n", p_dm_fat_table->is_become_linked));
+	PHYDM_DBG(dm, DBG_ANT_DIV, "%s: fat_tab->is_become_linked = %d\n",
+		  __func__, fat_tab->is_become_linked);
 }
 
-void
-odm_s0s1_sw_ant_div(
-	void			*p_dm_void,
-	u8			step
-)
+void phydm_sw_antdiv_train_time(void *dm_void)
 {
-	struct PHY_DM_STRUCT		*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	struct _sw_antenna_switch_			*p_dm_swat_table = &p_dm->dm_swat_table;
-	struct phydm_fat_struct			*p_dm_fat_table = &p_dm->dm_fat_table;
-	u32			i, min_max_rssi = 0xFF, local_max_rssi, local_min_rssi;
-	u32			main_rssi, aux_rssi;
-	u8			high_traffic_train_time_u = 0x32, high_traffic_train_time_l = 0, train_time_temp;
-	u8			low_traffic_train_time_u = 200, low_traffic_train_time_l = 0;
-	u8			rx_idle_ant = p_dm_swat_table->pre_antenna, target_ant, next_ant = 0;
-	struct cmn_sta_info		*p_entry = NULL;
-	u32			value32;
-	u32			main_ant_sum = 0;
-	u32			aux_ant_sum = 0;
-	u32			main_ant_cnt = 0;
-	u32			aux_ant_cnt = 0;
-
-
-	if (!p_dm->is_linked) { /* is_linked==False */
-		PHYDM_DBG(p_dm, DBG_ANT_DIV, ("[No Link!!!]\n"));
-		if (p_dm_fat_table->is_become_linked == true) {
-			odm_tx_by_tx_desc_or_reg(p_dm, TX_BY_REG);
-			if (p_dm->support_ic_type == ODM_RTL8723B) {
-
-				PHYDM_DBG(p_dm, DBG_ANT_DIV, ("Set REG 948[9:6]=0x0\n"));
-				odm_set_bb_reg(p_dm, 0x948, (BIT(9) | BIT(8) | BIT(7) | BIT(6)), 0x0);
-			}
-			p_dm_fat_table->is_become_linked = p_dm->is_linked;
-		}
-		return;
-	} else {
-		if (p_dm_fat_table->is_become_linked == false) {
-			PHYDM_DBG(p_dm, DBG_ANT_DIV, ("[Linked !!!]\n"));
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct sw_antenna_switch *swat_tab = &dm->dm_swat_table;
+	u8 high_traffic_train_time_u = 0x32, high_traffic_train_time_l = 0;
+	u8 low_traffic_train_time_u = 200, low_traffic_train_time_l = 0;
+	u8 train_time_temp;
 
-			if (p_dm->support_ic_type == ODM_RTL8723B) {
-				value32 = odm_get_bb_reg(p_dm, 0x864, BIT(5) | BIT(4) | BIT(3));
+	if (dm->traffic_load == TRAFFIC_HIGH) {
+		train_time_temp = swat_tab->train_time;
 
-#if (RTL8723B_SUPPORT == 1)
-				if (value32 == 0x0)
-					odm_update_rx_idle_ant_8723b(p_dm, MAIN_ANT, ANT1_2G, ANT2_2G);
-				else if (value32 == 0x1)
-					odm_update_rx_idle_ant_8723b(p_dm, AUX_ANT, ANT2_2G, ANT1_2G);
-#endif
+		if (swat_tab->train_time_flag == 3) {
+			high_traffic_train_time_l = 0xa;
 
-				PHYDM_DBG(p_dm, DBG_ANT_DIV, ("8723B: First link! Force antenna to  %s\n", (value32 == 0x0 ? "MAIN" : "AUX")));
-			}
-			p_dm_fat_table->is_become_linked = p_dm->is_linked;
+			if (train_time_temp <= 16)
+				train_time_temp = high_traffic_train_time_l;
+			else
+				train_time_temp -= 16;
+
+		} else if (swat_tab->train_time_flag == 2) {
+			train_time_temp -= 8;
+			high_traffic_train_time_l = 0xf;
+		} else if (swat_tab->train_time_flag == 1) {
+			train_time_temp -= 4;
+			high_traffic_train_time_l = 0x1e;
+		} else if (swat_tab->train_time_flag == 0) {
+			train_time_temp += 8;
+			high_traffic_train_time_l = 0x28;
 		}
-	}
-
-	if (*(p_dm_fat_table->p_force_tx_ant_by_desc) == false) {
-		if (p_dm->is_one_entry_only == true)
-			odm_tx_by_tx_desc_or_reg(p_dm, TX_BY_REG);
-		else
-			odm_tx_by_tx_desc_or_reg(p_dm, TX_BY_DESC);
-	}
-
-	PHYDM_DBG(p_dm, DBG_ANT_DIV, ("[%d] { try_flag=(( %d )), step=(( %d )), double_chk_flag = (( %d )) }\n",
-		__LINE__, p_dm_swat_table->try_flag, step, p_dm_swat_table->double_chk_flag));
-
-	/* Handling step mismatch condition. */
-	/* Peak step is not finished at last time. Recover the variable and check again. */
-	if (step != p_dm_swat_table->try_flag) {
-		PHYDM_DBG(p_dm, DBG_ANT_DIV, ("[step != try_flag]    Need to Reset After Link\n"));
-		odm_sw_ant_div_rest_after_link(p_dm);
-	}
 
-	if (p_dm_swat_table->try_flag == SWAW_STEP_INIT) {
+		if (dm->support_ic_type == ODM_RTL8188F) {
+			if (dm->support_interface == ODM_ITRF_SDIO)
+				high_traffic_train_time_l += 0xa;
+		}
 
-		p_dm_swat_table->try_flag = SWAW_STEP_PEEK;
-		p_dm_swat_table->train_time_flag = 0;
-		PHYDM_DBG(p_dm, DBG_ANT_DIV, ("[set try_flag = 0]  Prepare for peek!\n\n"));
-		return;
+		/* @-- */
+		if (train_time_temp > high_traffic_train_time_u)
+			train_time_temp = high_traffic_train_time_u;
 
-	} else {
+		else if (train_time_temp < high_traffic_train_time_l)
+			train_time_temp = high_traffic_train_time_l;
 
-		/* 1 Normal state (Begin Trying) */
-		if (p_dm_swat_table->try_flag == SWAW_STEP_PEEK) {
+		swat_tab->train_time = train_time_temp; /*@10ms~200ms*/
 
-			PHYDM_DBG(p_dm, DBG_ANT_DIV, ("TxOkCnt=(( %llu )), RxOkCnt=(( %llu )), traffic_load = (%d))\n", p_dm->cur_tx_ok_cnt, p_dm->cur_rx_ok_cnt, p_dm->traffic_load));
+		PHYDM_DBG(dm, DBG_ANT_DIV,
+			  "train_time_flag=((%d)), train_time=((%d))\n",
+			  swat_tab->train_time_flag,
+			  swat_tab->train_time);
 
-			if (p_dm->traffic_load == TRAFFIC_HIGH) {
-				train_time_temp = p_dm_swat_table->train_time ;
+	} else if ((dm->traffic_load == TRAFFIC_MID) ||
+		   (dm->traffic_load == TRAFFIC_LOW)) {
+		train_time_temp = swat_tab->train_time;
 
-				if (p_dm_swat_table->train_time_flag == 3) {
-					high_traffic_train_time_l = 0xa;
+		if (swat_tab->train_time_flag == 3) {
+			low_traffic_train_time_l = 10;
+			if (train_time_temp < 50)
+				train_time_temp = low_traffic_train_time_l;
+			else
+				train_time_temp -= 50;
+		} else if (swat_tab->train_time_flag == 2) {
+			train_time_temp -= 30;
+			low_traffic_train_time_l = 36;
+		} else if (swat_tab->train_time_flag == 1) {
+			train_time_temp -= 10;
+			low_traffic_train_time_l = 40;
+		} else {
+			train_time_temp += 10;
+			low_traffic_train_time_l = 50;
+		}
 
-					if (train_time_temp <= 16)
-						train_time_temp = high_traffic_train_time_l;
-					else
-						train_time_temp -= 16;
-
-				} else if (p_dm_swat_table->train_time_flag == 2) {
-					train_time_temp -= 8;
-					high_traffic_train_time_l = 0xf;
-				} else if (p_dm_swat_table->train_time_flag == 1) {
-					train_time_temp -= 4;
-					high_traffic_train_time_l = 0x1e;
-				} else if (p_dm_swat_table->train_time_flag == 0) {
-					train_time_temp += 8;
-					high_traffic_train_time_l = 0x28;
-				}
-				
-				if (p_dm->support_ic_type == ODM_RTL8188F) {
-					if (p_dm->support_interface == ODM_ITRF_SDIO)
-						high_traffic_train_time_l += 0xa;
-				}
+		if (dm->support_ic_type == ODM_RTL8188F) {
+			if (dm->support_interface == ODM_ITRF_SDIO)
+				low_traffic_train_time_l += 10;
+		}
 
-				/* PHYDM_DBG(p_dm,DBG_ANT_DIV, ("*** train_time_temp = ((%d))\n",train_time_temp)); */
+		/* @-- */
+		if (train_time_temp >= low_traffic_train_time_u)
+			train_time_temp = low_traffic_train_time_u;
 
-				/* -- */
-				if (train_time_temp > high_traffic_train_time_u)
-					train_time_temp = high_traffic_train_time_u;
+		else if (train_time_temp <= low_traffic_train_time_l)
+			train_time_temp = low_traffic_train_time_l;
 
-				else if (train_time_temp < high_traffic_train_time_l)
-					train_time_temp = high_traffic_train_time_l;
+		swat_tab->train_time = train_time_temp; /*@10ms~200ms*/
 
-				p_dm_swat_table->train_time = train_time_temp; /*10ms~200ms*/
+		PHYDM_DBG(dm, DBG_ANT_DIV,
+			  "train_time_flag=((%d)) , train_time=((%d))\n",
+			  swat_tab->train_time_flag, swat_tab->train_time);
 
-				PHYDM_DBG(p_dm, DBG_ANT_DIV, ("train_time_flag=((%d)), train_time=((%d))\n", p_dm_swat_table->train_time_flag, p_dm_swat_table->train_time));
+	} else {
+		swat_tab->train_time = 0xc8; /*@200ms*/
+	}
+}
 
-			} else if ((p_dm->traffic_load == TRAFFIC_MID) || (p_dm->traffic_load == TRAFFIC_LOW)) {
+void phydm_sw_antdiv_decision(void *dm_void)
+{
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct sw_antenna_switch *swat_tab = &dm->dm_swat_table;
+	struct phydm_fat_struct *fat_tab = &dm->dm_fat_table;
+	u32 i, min_max_rssi = 0xFF, local_max_rssi, local_min_rssi;
+	u32 main_rssi, aux_rssi;
+	u8 rx_idle_ant = swat_tab->pre_ant;
+	u8 target_ant = swat_tab->pre_ant, next_ant = 0;
+	struct cmn_sta_info *entry = NULL;
+	u32 main_cnt = 0, aux_cnt = 0, main_sum = 0, aux_sum = 0;
+	u32 main_ctrl_cnt = 0, aux_ctrl_cnt = 0;
+	boolean is_by_ctrl_frame = false;
+	boolean cond_23d_main, cond_23d_aux;
+	u64 pkt_cnt_total = 0;
 
-				train_time_temp = p_dm_swat_table->train_time ;
+	for (i = 0; i < ODM_ASSOCIATE_ENTRY_NUM; i++) {
+		entry = dm->phydm_sta_info[i];
+		if (!is_sta_active(entry)) {
+			phydm_antdiv_reset_statistic(dm, i);
+			continue;
+		}
 
-				if (p_dm_swat_table->train_time_flag == 3) {
-					low_traffic_train_time_l = 10;
-					if (train_time_temp < 50)
-						train_time_temp = low_traffic_train_time_l;
+		/* @2 Caculate RSSI per Antenna */
+		if (fat_tab->main_cnt[i] != 0 || fat_tab->aux_cnt[i] != 0) {
+			main_cnt = (u32)fat_tab->main_cnt[i];
+			aux_cnt = (u32)fat_tab->aux_cnt[i];
+			main_rssi = (main_cnt != 0) ?
+				    (fat_tab->main_sum[i] / main_cnt) : 0;
+			aux_rssi = (aux_cnt != 0) ?
+				   (fat_tab->aux_sum[i] / aux_cnt) : 0;
+			if (dm->support_ic_type == ODM_RTL8723D) {
+				cond_23d_main = (aux_cnt > main_cnt) &&
+						((main_rssi - aux_rssi < 5) ||
+						(aux_rssi > main_rssi));
+				cond_23d_aux = (main_cnt > aux_cnt) &&
+					       ((aux_rssi - main_rssi < 5) ||
+					       (main_rssi > aux_rssi));
+				if (swat_tab->pre_ant == MAIN_ANT) {
+					if (main_cnt == 0)
+						target_ant = (aux_cnt != 0) ?
+							     AUX_ANT :
+							     swat_tab->pre_ant;
 					else
-						train_time_temp -= 50;
-				} else if (p_dm_swat_table->train_time_flag == 2) {
-					train_time_temp -= 30;
-					low_traffic_train_time_l = 36;
-				} else if (p_dm_swat_table->train_time_flag == 1) {
-					train_time_temp -= 10;
-					low_traffic_train_time_l = 40;
+						target_ant = cond_23d_main ?
+							     AUX_ANT :
+							     swat_tab->pre_ant;
 				} else {
-
-					train_time_temp += 10;
-					low_traffic_train_time_l = 50;
-				}
-
-				if (p_dm->support_ic_type == ODM_RTL8188F) {
-					if (p_dm->support_interface == ODM_ITRF_SDIO)
-						low_traffic_train_time_l += 10;
+					if (aux_cnt == 0)
+						target_ant = (main_cnt != 0) ?
+							     MAIN_ANT :
+							     swat_tab->pre_ant;
+					else
+						target_ant = cond_23d_aux ?
+							     MAIN_ANT :
+							     swat_tab->pre_ant;
 				}
-
-				/* -- */
-				if (train_time_temp >= low_traffic_train_time_u)
-					train_time_temp = low_traffic_train_time_u;
-
-				else if (train_time_temp <= low_traffic_train_time_l)
-					train_time_temp = low_traffic_train_time_l;
-
-				p_dm_swat_table->train_time = train_time_temp; /*10ms~200ms*/
-
-				PHYDM_DBG(p_dm, DBG_ANT_DIV, ("train_time_flag=((%d)) , train_time=((%d))\n", p_dm_swat_table->train_time_flag, p_dm_swat_table->train_time));
-
 			} else {
-				p_dm_swat_table->train_time = 0xc8; /*200ms*/
-
+				if (swat_tab->pre_ant == MAIN_ANT) {
+					target_ant = (aux_rssi > main_rssi) ?
+						     AUX_ANT :
+						     swat_tab->pre_ant;
+				} else if (swat_tab->pre_ant == AUX_ANT) {
+					target_ant = (main_rssi > aux_rssi) ?
+						     MAIN_ANT :
+						     swat_tab->pre_ant;
+				}
 			}
-
-			/* ----------------- */
-
-			PHYDM_DBG(p_dm, DBG_ANT_DIV, ("Current min_max_rssi is ((%d))\n", p_dm_fat_table->min_max_rssi));
-
-			/* ---reset index--- */
-			if (p_dm_swat_table->reset_idx >= RSSI_CHECK_RESET_PERIOD) {
-
-				p_dm_fat_table->min_max_rssi = 0;
-				p_dm_swat_table->reset_idx = 0;
+		} else { /*@CCK only case*/
+			main_cnt = fat_tab->main_cnt_cck[i];
+			aux_cnt = fat_tab->aux_cnt_cck[i];
+			main_rssi = (main_cnt != 0) ?
+				    (fat_tab->main_sum_cck[i] / main_cnt) : 0;
+			aux_rssi = (aux_cnt != 0) ?
+				   (fat_tab->aux_sum_cck[i] / aux_cnt) : 0;
+			target_ant = (main_rssi == aux_rssi) ?
+				     swat_tab->pre_ant :
+				     ((main_rssi >= aux_rssi) ?
+				     MAIN_ANT : AUX_ANT);
+				     /*Use RSSI for CCK only case*/
+		}
+		local_max_rssi = (main_rssi >= aux_rssi) ? main_rssi : aux_rssi;
+		local_min_rssi = (main_rssi >= aux_rssi) ? aux_rssi : main_rssi;
+
+		PHYDM_DBG(dm, DBG_ANT_DIV,
+			  "***  CCK_counter_main = (( %d ))  , CCK_counter_aux= ((  %d ))\n",
+			  fat_tab->main_cnt_cck[i], fat_tab->aux_cnt_cck[i]);
+		PHYDM_DBG(dm, DBG_ANT_DIV,
+			  "***  OFDM_counter_main = (( %d ))  , OFDM_counter_aux= ((  %d ))\n",
+			  fat_tab->main_cnt[i], fat_tab->aux_cnt[i]);
+		PHYDM_DBG(dm, DBG_ANT_DIV,
+			  "***  main_Cnt = (( %d ))  , aux_Cnt   = (( %d ))\n",
+			  main_cnt, aux_cnt);
+		PHYDM_DBG(dm, DBG_ANT_DIV,
+			  "***  main_rssi= ((  %d )) , aux_rssi = ((  %d ))\n",
+			  main_rssi, aux_rssi);
+		PHYDM_DBG(dm, DBG_ANT_DIV,
+			  "*** MAC ID:[ %d ] , target_ant = (( %s ))\n", i,
+			  (target_ant == MAIN_ANT) ? "MAIN_ANT" : "AUX_ANT");
+
+		/* @2 Select RX Idle Antenna */
+
+		if (local_max_rssi != 0 && local_max_rssi < min_max_rssi) {
+			rx_idle_ant = target_ant;
+			min_max_rssi = local_max_rssi;
+			PHYDM_DBG(dm, DBG_ANT_DIV,
+				  "*** local_max_rssi-local_min_rssi = ((%d))\n",
+				  (local_max_rssi - local_min_rssi));
+
+			if ((local_max_rssi - local_min_rssi) > 8) {
+				if (local_min_rssi != 0) {
+					swat_tab->train_time_flag = 3;
+				} else {
+					if (min_max_rssi > RSSI_CHECK_THRESHOLD)
+						swat_tab->train_time_flag = 0;
+					else
+						swat_tab->train_time_flag = 3;
+				}
+			} else if ((local_max_rssi - local_min_rssi) > 5) {
+				swat_tab->train_time_flag = 2;
+			} else if ((local_max_rssi - local_min_rssi) > 2) {
+				swat_tab->train_time_flag = 1;
+			} else {
+				swat_tab->train_time_flag = 0;
 			}
-			PHYDM_DBG(p_dm, DBG_ANT_DIV, ("reset_idx = (( %d ))\n", p_dm_swat_table->reset_idx));
+		}
 
-			p_dm_swat_table->reset_idx++;
+		/* @2 Select TX Antenna */
+		if (target_ant == MAIN_ANT)
+			fat_tab->antsel_a[i] = ANT1_2G;
+		else
+			fat_tab->antsel_a[i] = ANT2_2G;
 
-			/* ---double check flag--- */
-			if ((p_dm_fat_table->min_max_rssi > RSSI_CHECK_THRESHOLD) && (p_dm_swat_table->double_chk_flag == 0)) {
-				PHYDM_DBG(p_dm, DBG_ANT_DIV, (" min_max_rssi is ((%d)), and > %d\n",
-					p_dm_fat_table->min_max_rssi, RSSI_CHECK_THRESHOLD));
+		phydm_antdiv_reset_statistic(dm, i);
+		pkt_cnt_total += (main_cnt + aux_cnt);
+	}
 
-				p_dm_swat_table->double_chk_flag = 1;
-				p_dm_swat_table->try_flag = SWAW_STEP_DETERMINE;
-				p_dm_swat_table->rssi_trying = 0;
+	if (swat_tab->is_sw_ant_div_by_ctrl_frame) {
+		odm_s0s1_sw_ant_div_by_ctrl_frame(dm, SWAW_STEP_DETERMINE);
+		is_by_ctrl_frame = true;
+	}
 
-				PHYDM_DBG(p_dm, DBG_ANT_DIV, ("Test the current ant for (( %d )) ms again\n", p_dm_swat_table->train_time));
-				odm_update_rx_idle_ant(p_dm, p_dm_fat_table->rx_idle_ant);
-				odm_set_timer(p_dm, &(p_dm_swat_table->phydm_sw_antenna_switch_timer), p_dm_swat_table->train_time); /*ms*/
-				return;
+	PHYDM_DBG(dm, DBG_ANT_DIV,
+		  "Control frame packet counter = %d, data frame packet counter = %llu\n",
+		  swat_tab->pkt_cnt_sw_ant_div_by_ctrl_frame, pkt_cnt_total);
+
+	if (min_max_rssi == 0xff || ((pkt_cnt_total <
+	    (swat_tab->pkt_cnt_sw_ant_div_by_ctrl_frame >> 1)) &&
+	    dm->phy_dbg_info.num_qry_beacon_pkt < 2)) {
+		min_max_rssi = 0;
+		PHYDM_DBG(dm, DBG_ANT_DIV,
+			  "Check RSSI of control frame because min_max_rssi == 0xff\n");
+		PHYDM_DBG(dm, DBG_ANT_DIV, "is_by_ctrl_frame = %d\n",
+			  is_by_ctrl_frame);
+
+		if (is_by_ctrl_frame) {
+			main_ctrl_cnt = fat_tab->main_ctrl_cnt;
+			aux_ctrl_cnt = fat_tab->aux_ctrl_cnt;
+			main_rssi = (main_ctrl_cnt != 0) ?
+				    (fat_tab->main_ctrl_sum / main_ctrl_cnt) :
+				    0;
+			aux_rssi = (aux_ctrl_cnt != 0) ?
+				   (fat_tab->aux_ctrl_sum / aux_ctrl_cnt) : 0;
+
+			if (main_ctrl_cnt <= 1 &&
+			    fat_tab->cck_ctrl_frame_cnt_main >= 1)
+				main_rssi = 0;
+
+			if (aux_ctrl_cnt <= 1 &&
+			    fat_tab->cck_ctrl_frame_cnt_aux >= 1)
+				aux_rssi = 0;
+
+			if (main_rssi != 0 || aux_rssi != 0) {
+				rx_idle_ant = (main_rssi == aux_rssi) ?
+					      swat_tab->pre_ant :
+					      ((main_rssi >= aux_rssi) ?
+					      MAIN_ANT : AUX_ANT);
+				local_max_rssi = (main_rssi >= aux_rssi) ?
+						 main_rssi : aux_rssi;
+				local_min_rssi = (main_rssi >= aux_rssi) ?
+						 aux_rssi : main_rssi;
+
+				if ((local_max_rssi - local_min_rssi) > 8)
+					swat_tab->train_time_flag = 3;
+				else if ((local_max_rssi - local_min_rssi) > 5)
+					swat_tab->train_time_flag = 2;
+				else if ((local_max_rssi - local_min_rssi) > 2)
+					swat_tab->train_time_flag = 1;
+				else
+					swat_tab->train_time_flag = 0;
+
+				PHYDM_DBG(dm, DBG_ANT_DIV,
+					  "Control frame: main_rssi = %d, aux_rssi = %d\n",
+					  main_rssi, aux_rssi);
+				PHYDM_DBG(dm, DBG_ANT_DIV,
+					  "rx_idle_ant decided by control frame = %s\n",
+					  (rx_idle_ant == MAIN_ANT ?
+					  "MAIN" : "AUX"));
 			}
+		}
+	}
 
-			next_ant = (p_dm_fat_table->rx_idle_ant == MAIN_ANT) ? AUX_ANT : MAIN_ANT;
-
-			p_dm_swat_table->try_flag = SWAW_STEP_DETERMINE;
+	fat_tab->min_max_rssi = min_max_rssi;
+	swat_tab->try_flag = SWAW_STEP_PEEK;
 
-			if (p_dm_swat_table->reset_idx <= 1)
-				p_dm_swat_table->rssi_trying = 2;
-			else
-				p_dm_swat_table->rssi_trying = 1;
+	if (swat_tab->double_chk_flag == 1) {
+		swat_tab->double_chk_flag = 0;
 
-			odm_s0s1_sw_ant_div_by_ctrl_frame(p_dm, SWAW_STEP_PEEK);
-			PHYDM_DBG(p_dm, DBG_ANT_DIV, ("[set try_flag=1]  Normal state:  Begin Trying!!\n"));
+		if (fat_tab->min_max_rssi > RSSI_CHECK_THRESHOLD) {
+			PHYDM_DBG(dm, DBG_ANT_DIV,
+				  " [Double check] min_max_rssi ((%d)) > %d again!!\n",
+				  fat_tab->min_max_rssi, RSSI_CHECK_THRESHOLD);
 
-		} else if ((p_dm_swat_table->try_flag == SWAW_STEP_DETERMINE) && (p_dm_swat_table->double_chk_flag == 0)) {
+			odm_update_rx_idle_ant(dm, rx_idle_ant);
 
-			next_ant = (p_dm_fat_table->rx_idle_ant  == MAIN_ANT) ? AUX_ANT : MAIN_ANT;
-			p_dm_swat_table->rssi_trying--;
+			PHYDM_DBG(dm, DBG_ANT_DIV,
+				  "[reset try_flag = 0] Training accomplished !!!]\n\n\n");
+		} else {
+			PHYDM_DBG(dm, DBG_ANT_DIV,
+				  " [Double check] min_max_rssi ((%d)) <= %d !!\n",
+				  fat_tab->min_max_rssi, RSSI_CHECK_THRESHOLD);
+
+			next_ant = (fat_tab->rx_idle_ant == MAIN_ANT) ?
+				   AUX_ANT : MAIN_ANT;
+			swat_tab->try_flag = SWAW_STEP_PEEK;
+			swat_tab->reset_idx = RSSI_CHECK_RESET_PERIOD;
+			PHYDM_DBG(dm, DBG_ANT_DIV,
+				  "[set try_flag=0]  Normal state:  Need to tryg again!!\n\n\n");
 		}
+	} else {
+		if (fat_tab->min_max_rssi < RSSI_CHECK_THRESHOLD)
+			swat_tab->reset_idx = RSSI_CHECK_RESET_PERIOD;
 
-		/* 1 Decision state */
-		if ((p_dm_swat_table->try_flag == SWAW_STEP_DETERMINE) && (p_dm_swat_table->rssi_trying == 0)) {
-
-			boolean is_by_ctrl_frame = false;
-			u64	pkt_cnt_total = 0;
-
-			for (i = 0; i < ODM_ASSOCIATE_ENTRY_NUM; i++) {
-				p_entry = p_dm->p_phydm_sta_info[i];
-				if (is_sta_active(p_entry)) {
-					/* 2 Caculate RSSI per Antenna */
-					/*
-					main_ant_sum = (u32)p_dm_fat_table->main_ant_sum[i] + (u32)p_dm_fat_table->main_ant_sum_cck[i];
-					aux_ant_sum = (u32)p_dm_fat_table->aux_ant_sum[i] + (u32)p_dm_fat_table->aux_ant_sum_cck[i];
-					main_ant_cnt = (u32)p_dm_fat_table->main_ant_cnt[i] + (u32)p_dm_fat_table->main_ant_cnt_cck[i];
-					aux_ant_cnt = (u32)p_dm_fat_table->aux_ant_cnt[i] + (u32)p_dm_fat_table->aux_ant_cnt_cck[i];
-
-					main_rssi = (main_ant_cnt != 0) ? (main_ant_sum / main_ant_cnt) : 0;
-					aux_rssi = (aux_ant_cnt != 0) ? (aux_ant_sum / aux_ant_cnt) : 0;
-
-					if (p_dm_fat_table->main_ant_cnt[i] <= 1 && p_dm_fat_table->main_ant_cnt_cck[i] >= 1)
-						main_rssi = 0;
-
-					if (p_dm_fat_table->aux_ant_cnt[i] <= 1 && p_dm_fat_table->aux_ant_cnt_cck[i] >= 1)
-						aux_rssi = 0;*/
-					if ((p_dm_fat_table->main_ant_cnt[i] != 0) || (p_dm_fat_table->aux_ant_cnt[i] != 0)) {
-						main_ant_cnt = (u32)p_dm_fat_table->main_ant_cnt[i];
-						aux_ant_cnt = (u32)p_dm_fat_table->aux_ant_cnt[i];
-						main_rssi = (main_ant_cnt != 0) ? (p_dm_fat_table->main_ant_sum[i] / main_ant_cnt) : 0;
-						aux_rssi = (aux_ant_cnt != 0) ? (p_dm_fat_table->aux_ant_sum[i] / aux_ant_cnt) : 0;
-						if (p_dm_swat_table->pre_antenna == MAIN_ANT) {
-							target_ant = ((aux_ant_cnt > 20) && (aux_rssi >= main_rssi)) ? AUX_ANT : p_dm_swat_table->pre_antenna;
-						} else {
-							target_ant = ((main_ant_cnt > 20) && (main_rssi >= aux_rssi)) ? MAIN_ANT : p_dm_swat_table->pre_antenna;
-						}
+		swat_tab->pre_ant = rx_idle_ant;
+		odm_update_rx_idle_ant(dm, rx_idle_ant);
+		PHYDM_DBG(dm, DBG_ANT_DIV,
+			  "[reset try_flag = 0] Training accomplished !!!]\n\n\n");
+	}
+}
 
-					} else {	/*CCK only case*/
-						main_ant_cnt = p_dm_fat_table->main_ant_cnt_cck[i];
-						aux_ant_cnt = p_dm_fat_table->aux_ant_cnt_cck[i];
-						main_rssi = (main_ant_cnt != 0) ? (p_dm_fat_table->main_ant_sum_cck[i] / main_ant_cnt) : 0;
-						aux_rssi = (aux_ant_cnt != 0) ? (p_dm_fat_table->aux_ant_sum_cck[i] / aux_ant_cnt) : 0;
-						target_ant = (main_rssi == aux_rssi) ? p_dm_fat_table->rx_idle_ant : ((main_rssi >= aux_rssi) ? MAIN_ANT : AUX_ANT); /*Use RSSI for CCK only case*/
-					}
-					/*target_ant = (main_rssi == aux_rssi) ? p_dm_swat_table->pre_antenna : ((main_rssi >= aux_rssi) ? MAIN_ANT : AUX_ANT);*/
-					local_max_rssi = (main_rssi >= aux_rssi) ? main_rssi : aux_rssi;
-					local_min_rssi = (main_rssi >= aux_rssi) ? aux_rssi : main_rssi;
-
-					PHYDM_DBG(p_dm, DBG_ANT_DIV, ("***  CCK_counter_main = (( %d ))  , CCK_counter_aux= ((  %d ))\n", p_dm_fat_table->main_ant_cnt_cck[i], p_dm_fat_table->aux_ant_cnt_cck[i]));
-					PHYDM_DBG(p_dm, DBG_ANT_DIV, ("***  OFDM_counter_main = (( %d ))  , OFDM_counter_aux= ((  %d ))\n", p_dm_fat_table->main_ant_cnt[i], p_dm_fat_table->aux_ant_cnt[i]));
-					PHYDM_DBG(p_dm, DBG_ANT_DIV, ("***  Main_Cnt = (( %d ))  , main_rssi= ((  %d ))\n", main_ant_cnt, main_rssi));
-					PHYDM_DBG(p_dm, DBG_ANT_DIV, ("***  Aux_Cnt   = (( %d ))  , aux_rssi = ((  %d ))\n", aux_ant_cnt, aux_rssi));
-					PHYDM_DBG(p_dm, DBG_ANT_DIV, ("*** MAC ID:[ %d ] , target_ant = (( %s ))\n", i, (target_ant == MAIN_ANT) ? "MAIN_ANT" : "AUX_ANT"));
-
-					/* 2 Select RX Idle Antenna */
-
-					if (local_max_rssi != 0 && local_max_rssi < min_max_rssi) {
-						rx_idle_ant = target_ant;
-						min_max_rssi = local_max_rssi;
-						PHYDM_DBG(p_dm, DBG_ANT_DIV, ("*** local_max_rssi-local_min_rssi = ((%d))\n", (local_max_rssi - local_min_rssi)));
-
-						if ((local_max_rssi - local_min_rssi) > 8) {
-							if (local_min_rssi != 0)
-								p_dm_swat_table->train_time_flag = 3;
-							else {
-								if (min_max_rssi > RSSI_CHECK_THRESHOLD)
-									p_dm_swat_table->train_time_flag = 0;
-								else
-									p_dm_swat_table->train_time_flag = 3;
-							}
-						} else if ((local_max_rssi - local_min_rssi) > 5)
-							p_dm_swat_table->train_time_flag = 2;
-						else if ((local_max_rssi - local_min_rssi) > 2)
-							p_dm_swat_table->train_time_flag = 1;
-						else
-							p_dm_swat_table->train_time_flag = 0;
+void odm_s0s1_sw_ant_div(void *dm_void, u8 step)
+{
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct sw_antenna_switch *swat_tab = &dm->dm_swat_table;
+	struct phydm_fat_struct *fat_tab = &dm->dm_fat_table;
+	u32 value32;
+	u8 next_ant = 0;
+
+	if (!dm->is_linked) { /* @is_linked==False */
+		PHYDM_DBG(dm, DBG_ANT_DIV, "[No Link!!!]\n");
+		if (fat_tab->is_become_linked == true) {
+			odm_tx_by_tx_desc_or_reg(dm, TX_BY_REG);
+			if (dm->support_ic_type == ODM_RTL8723B) {
+				PHYDM_DBG(dm, DBG_ANT_DIV,
+					  "Set REG 948[9:6]=0x0\n");
+				odm_set_bb_reg(dm, R_0x948, 0x3c0, 0x0);
+			}
+			fat_tab->is_become_linked = dm->is_linked;
+		}
+		return;
+	} else {
+		if (fat_tab->is_become_linked == false) {
+			PHYDM_DBG(dm, DBG_ANT_DIV, "[Linked !!!]\n");
 
-					}
+			if (dm->support_ic_type == ODM_RTL8723B) {
+				value32 = odm_get_bb_reg(dm, R_0x864, 0x38);
 
-					/* 2 Select TX Antenna */
-					if (target_ant == MAIN_ANT)
-						p_dm_fat_table->antsel_a[i] = ANT1_2G;
-					else
-						p_dm_fat_table->antsel_a[i] = ANT2_2G;
+#if (RTL8723B_SUPPORT == 1)
+				if (value32 == 0x0)
+					odm_update_rx_idle_ant_8723b(dm,
+								     MAIN_ANT,
+								     ANT1_2G,
+								     ANT2_2G);
+				else if (value32 == 0x1)
+					odm_update_rx_idle_ant_8723b(dm,
+								     AUX_ANT,
+								     ANT2_2G,
+								     ANT1_2G);
+#endif
 
-				}
-				phydm_antdiv_reset_statistic(p_dm, i);
-				pkt_cnt_total += (main_ant_cnt + aux_ant_cnt);
+				PHYDM_DBG(dm, DBG_ANT_DIV,
+					  "8723B: First link! Force antenna to  %s\n",
+					  (value32 == 0x0 ? "MAIN" : "AUX"));
 			}
 
-			if (p_dm_swat_table->is_sw_ant_div_by_ctrl_frame) {
-				odm_s0s1_sw_ant_div_by_ctrl_frame(p_dm, SWAW_STEP_DETERMINE);
-				is_by_ctrl_frame = true;
+			if (dm->support_ic_type == ODM_RTL8723D) {
+				value32 = odm_get_bb_reg(dm, R_0x864, 0x38);
+#if (RTL8723D_SUPPORT == 1)
+				if (value32 == 0x0)
+					odm_update_rx_idle_ant_8723d(dm,
+								     MAIN_ANT,
+								     ANT1_2G,
+								     ANT2_2G);
+				else if (value32 == 0x1)
+					odm_update_rx_idle_ant_8723d(dm,
+								     AUX_ANT,
+								     ANT2_2G,
+								     ANT1_2G);
+				PHYDM_DBG(dm, DBG_ANT_DIV,
+					  "8723D: First link! Force antenna to  %s\n",
+					  (value32 == 0x0 ? "MAIN" : "AUX"));
+#endif
 			}
+			fat_tab->is_become_linked = dm->is_linked;
+		}
+	}
 
-			PHYDM_DBG(p_dm, DBG_ANT_DIV, ("Control frame packet counter = %d, data frame packet counter = %llu\n",
-				p_dm_swat_table->pkt_cnt_sw_ant_div_by_ctrl_frame, pkt_cnt_total));
-
-			if (min_max_rssi == 0xff || ((pkt_cnt_total < (p_dm_swat_table->pkt_cnt_sw_ant_div_by_ctrl_frame >> 1)) && p_dm->phy_dbg_info.num_qry_beacon_pkt < 2)) {
-				min_max_rssi = 0;
-				PHYDM_DBG(p_dm, DBG_ANT_DIV, ("Check RSSI of control frame because min_max_rssi == 0xff\n"));
-				PHYDM_DBG(p_dm, DBG_ANT_DIV, ("is_by_ctrl_frame = %d\n", is_by_ctrl_frame));
-
-				if (is_by_ctrl_frame) {
-					main_rssi = (p_dm_fat_table->main_ant_ctrl_frame_cnt != 0) ? (p_dm_fat_table->main_ant_ctrl_frame_sum / p_dm_fat_table->main_ant_ctrl_frame_cnt) : 0;
-					aux_rssi = (p_dm_fat_table->aux_ant_ctrl_frame_cnt != 0) ? (p_dm_fat_table->aux_ant_ctrl_frame_sum / p_dm_fat_table->aux_ant_ctrl_frame_cnt) : 0;
-
-					if (p_dm_fat_table->main_ant_ctrl_frame_cnt <= 1 && p_dm_fat_table->cck_ctrl_frame_cnt_main >= 1)
-						main_rssi = 0;
-
-					if (p_dm_fat_table->aux_ant_ctrl_frame_cnt <= 1 && p_dm_fat_table->cck_ctrl_frame_cnt_aux >= 1)
-						aux_rssi = 0;
+	if (!(*fat_tab->p_force_tx_by_desc)) {
+		if (dm->is_one_entry_only == true)
+			odm_tx_by_tx_desc_or_reg(dm, TX_BY_REG);
+		else
+			odm_tx_by_tx_desc_or_reg(dm, TX_BY_DESC);
+	}
 
-					if (main_rssi != 0 || aux_rssi != 0) {
-						rx_idle_ant = (main_rssi == aux_rssi) ? p_dm_swat_table->pre_antenna : ((main_rssi >= aux_rssi) ? MAIN_ANT : AUX_ANT);
-						local_max_rssi = (main_rssi >= aux_rssi) ? main_rssi : aux_rssi;
-						local_min_rssi = (main_rssi >= aux_rssi) ? aux_rssi : main_rssi;
+	PHYDM_DBG(dm, DBG_ANT_DIV,
+		  "[%d] { try_flag=(( %d )), step=(( %d )), double_chk_flag = (( %d )) }\n",
+		  __LINE__, swat_tab->try_flag, step,
+		  swat_tab->double_chk_flag);
+
+	/* @ Handling step mismatch condition. */
+	/* @ Peak step is not finished at last time. */
+	/* @ Recover the variable and check again. */
+	if (step != swat_tab->try_flag) {
+		PHYDM_DBG(dm, DBG_ANT_DIV,
+			  "[step != try_flag]    Need to Reset After Link\n");
+		odm_sw_ant_div_rest_after_link(dm);
+	}
 
-						if ((local_max_rssi - local_min_rssi) > 8)
-							p_dm_swat_table->train_time_flag = 3;
-						else if ((local_max_rssi - local_min_rssi) > 5)
-							p_dm_swat_table->train_time_flag = 2;
-						else if ((local_max_rssi - local_min_rssi) > 2)
-							p_dm_swat_table->train_time_flag = 1;
-						else
-							p_dm_swat_table->train_time_flag = 0;
+	if (swat_tab->try_flag == SWAW_STEP_INIT) {
+		swat_tab->try_flag = SWAW_STEP_PEEK;
+		swat_tab->train_time_flag = 0;
+		PHYDM_DBG(dm, DBG_ANT_DIV,
+			  "[set try_flag = 0]  Prepare for peek!\n\n");
+		return;
 
-						PHYDM_DBG(p_dm, DBG_ANT_DIV, ("Control frame: main_rssi = %d, aux_rssi = %d\n", main_rssi, aux_rssi));
-						PHYDM_DBG(p_dm, DBG_ANT_DIV, ("rx_idle_ant decided by control frame = %s\n", (rx_idle_ant == MAIN_ANT ? "MAIN" : "AUX")));
-					}
-				}
+	} else {
+		/* @1 Normal state (Begin Trying) */
+		if (swat_tab->try_flag == SWAW_STEP_PEEK) {
+			PHYDM_DBG(dm, DBG_ANT_DIV,
+				  "TxOkCnt=(( %llu )), RxOkCnt=(( %llu )), traffic_load = (%d))\n",
+				  dm->cur_tx_ok_cnt, dm->cur_rx_ok_cnt,
+				  dm->traffic_load);
+			phydm_sw_antdiv_train_time(dm);
+
+			PHYDM_DBG(dm, DBG_ANT_DIV,
+				  "Current min_max_rssi is ((%d))\n",
+				  fat_tab->min_max_rssi);
+
+			/* @---reset index--- */
+			if (swat_tab->reset_idx >= RSSI_CHECK_RESET_PERIOD) {
+				fat_tab->min_max_rssi = 0;
+				swat_tab->reset_idx = 0;
+			}
+			PHYDM_DBG(dm, DBG_ANT_DIV, "reset_idx = (( %d ))\n",
+				  swat_tab->reset_idx);
+
+			swat_tab->reset_idx++;
+
+			/* @---double check flag--- */
+			if (fat_tab->min_max_rssi > RSSI_CHECK_THRESHOLD &&
+			    swat_tab->double_chk_flag == 0) {
+				PHYDM_DBG(dm, DBG_ANT_DIV,
+					  " min_max_rssi is ((%d)), and > %d\n",
+					  fat_tab->min_max_rssi,
+					  RSSI_CHECK_THRESHOLD);
+
+				swat_tab->double_chk_flag = 1;
+				swat_tab->try_flag = SWAW_STEP_DETERMINE;
+				swat_tab->rssi_trying = 0;
+
+				PHYDM_DBG(dm, DBG_ANT_DIV,
+					  "Test the current ant for (( %d )) ms again\n",
+					  swat_tab->train_time);
+				odm_update_rx_idle_ant(dm,
+						       fat_tab->rx_idle_ant);
+				odm_set_timer(dm, &swat_tab->sw_antdiv_timer,
+					      swat_tab->train_time); /*@ms*/
+				return;
 			}
 
-			p_dm_fat_table->min_max_rssi = min_max_rssi;
-			p_dm_swat_table->try_flag = SWAW_STEP_PEEK;
-
-			if (p_dm_swat_table->double_chk_flag == 1) {
-				p_dm_swat_table->double_chk_flag = 0;
-
-				if (p_dm_fat_table->min_max_rssi > RSSI_CHECK_THRESHOLD) {
-
-					PHYDM_DBG(p_dm, DBG_ANT_DIV, (" [Double check] min_max_rssi ((%d)) > %d again!!\n",
-						p_dm_fat_table->min_max_rssi, RSSI_CHECK_THRESHOLD));
-
-					odm_update_rx_idle_ant(p_dm, rx_idle_ant);
+			next_ant = (fat_tab->rx_idle_ant == MAIN_ANT) ?
+				   AUX_ANT : MAIN_ANT;
 
-					PHYDM_DBG(p_dm, DBG_ANT_DIV, ("[reset try_flag = 0] Training accomplished !!!]\n\n\n"));
-					return;
-				} else {
-					PHYDM_DBG(p_dm, DBG_ANT_DIV, (" [Double check] min_max_rssi ((%d)) <= %d !!\n",
-						p_dm_fat_table->min_max_rssi, RSSI_CHECK_THRESHOLD));
+			swat_tab->try_flag = SWAW_STEP_DETERMINE;
 
-					next_ant = (p_dm_fat_table->rx_idle_ant  == MAIN_ANT) ? AUX_ANT : MAIN_ANT;
-					p_dm_swat_table->try_flag = SWAW_STEP_PEEK;
-					p_dm_swat_table->reset_idx = RSSI_CHECK_RESET_PERIOD;
-					PHYDM_DBG(p_dm, DBG_ANT_DIV, ("[set try_flag=0]  Normal state:  Need to tryg again!!\n\n\n"));
-					return;
-				}
-			} else {
-				if (p_dm_fat_table->min_max_rssi < RSSI_CHECK_THRESHOLD)
-					p_dm_swat_table->reset_idx = RSSI_CHECK_RESET_PERIOD;
+			if (swat_tab->reset_idx <= 1)
+				swat_tab->rssi_trying = 2;
+			else
+				swat_tab->rssi_trying = 1;
 
-				p_dm_swat_table->pre_antenna = rx_idle_ant;
-				odm_update_rx_idle_ant(p_dm, rx_idle_ant);
-				PHYDM_DBG(p_dm, DBG_ANT_DIV, ("[reset try_flag = 0] Training accomplished !!!]\n\n\n"));
-				return;
-			}
+			odm_s0s1_sw_ant_div_by_ctrl_frame(dm, SWAW_STEP_PEEK);
+			PHYDM_DBG(dm, DBG_ANT_DIV,
+				  "[set try_flag=1]  Normal state:  Begin Trying!!\n");
 
+		} else if ((swat_tab->try_flag == SWAW_STEP_DETERMINE) &&
+			   (swat_tab->double_chk_flag == 0)) {
+			next_ant = (fat_tab->rx_idle_ant == MAIN_ANT) ?
+				   AUX_ANT : MAIN_ANT;
+			swat_tab->rssi_trying--;
 		}
 
+		/* @1 Decision state */
+		if (swat_tab->try_flag == SWAW_STEP_DETERMINE &&
+		    swat_tab->rssi_trying == 0) {
+			phydm_sw_antdiv_decision(dm);
+			return;
+		}
 	}
 
-	/* 1 4.Change TRX antenna */
+	/* @1 4.Change TRX antenna */
 
-	PHYDM_DBG(p_dm, DBG_ANT_DIV, ("rssi_trying = (( %d )),    ant: (( %s )) >>> (( %s ))\n",
-		p_dm_swat_table->rssi_trying, (p_dm_fat_table->rx_idle_ant  == MAIN_ANT ? "MAIN" : "AUX"), (next_ant == MAIN_ANT ? "MAIN" : "AUX")));
+	PHYDM_DBG(dm, DBG_ANT_DIV,
+		  "rssi_trying = (( %d )),    ant: (( %s )) >>> (( %s ))\n",
+		  swat_tab->rssi_trying,
+		  (fat_tab->rx_idle_ant == MAIN_ANT ? "MAIN" : "AUX"),
+		  (next_ant == MAIN_ANT ? "MAIN" : "AUX"));
 
-	odm_update_rx_idle_ant(p_dm, next_ant);
+	odm_update_rx_idle_ant(dm, next_ant);
 
-	/* 1 5.Reset Statistics */
+	/* @1 5.Reset Statistics */
 
-	p_dm_fat_table->rx_idle_ant  = next_ant;
+	fat_tab->rx_idle_ant = next_ant;
 
-	if (p_dm->support_ic_type == ODM_RTL8188F) {
-		if (p_dm->support_interface == ODM_ITRF_SDIO) {
+	if (dm->support_ic_type == ODM_RTL8723D) {
+		if (fat_tab->rx_idle_ant == MAIN_ANT) {
+			fat_tab->main_sum[0] = 0;
+			fat_tab->main_cnt[0] = 0;
+			fat_tab->main_sum_cck[0] = 0;
+			fat_tab->main_cnt_cck[0] = 0;
+		} else {
+			fat_tab->aux_sum[0] = 0;
+			fat_tab->aux_cnt[0] = 0;
+			fat_tab->aux_sum_cck[0] = 0;
+			fat_tab->aux_cnt_cck[0] = 0;
+		}
+	}
 
+	if (dm->support_ic_type == ODM_RTL8188F) {
+		if (dm->support_interface == ODM_ITRF_SDIO) {
 			ODM_delay_us(200);
-			
-			if (p_dm_fat_table->rx_idle_ant == MAIN_ANT) {
-				p_dm_fat_table->main_ant_sum[0] = 0;
-				p_dm_fat_table->main_ant_cnt[0] = 0;
-				p_dm_fat_table->main_ant_sum_cck[0] = 0;
-				p_dm_fat_table->main_ant_cnt_cck[0] = 0;	
+
+			if (fat_tab->rx_idle_ant == MAIN_ANT) {
+				fat_tab->main_sum[0] = 0;
+				fat_tab->main_cnt[0] = 0;
+				fat_tab->main_sum_cck[0] = 0;
+				fat_tab->main_cnt_cck[0] = 0;
 			} else {
-				p_dm_fat_table->aux_ant_sum[0] = 0;
-				p_dm_fat_table->aux_ant_cnt[0] = 0;
-				p_dm_fat_table->aux_ant_sum_cck[0] = 0;
-				p_dm_fat_table->aux_ant_cnt_cck[0] = 0;	
-			}	
-		}	
+				fat_tab->aux_sum[0] = 0;
+				fat_tab->aux_cnt[0] = 0;
+				fat_tab->aux_sum_cck[0] = 0;
+				fat_tab->aux_cnt_cck[0] = 0;
+			}
+		}
 	}
-
-	/* 1 6.Set next timer   (Trying state) */
-
-	PHYDM_DBG(p_dm, DBG_ANT_DIV, (" Test ((%s)) ant for (( %d )) ms\n", (next_ant == MAIN_ANT ? "MAIN" : "AUX"), p_dm_swat_table->train_time));
-	odm_set_timer(p_dm, &(p_dm_swat_table->phydm_sw_antenna_switch_timer), p_dm_swat_table->train_time); /*ms*/
+	/* @1 6.Set next timer   (Trying state) */
+	PHYDM_DBG(dm, DBG_ANT_DIV, " Test ((%s)) ant for (( %d )) ms\n",
+		  (next_ant == MAIN_ANT ? "MAIN" : "AUX"),
+		  swat_tab->train_time);
+	odm_set_timer(dm, &swat_tab->sw_antdiv_timer, swat_tab->train_time);
+								/*@ms*/
 }
 
-
 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
-void
-odm_sw_antdiv_callback(
-	struct timer_list		*p_timer
-)
+void odm_sw_antdiv_callback(struct phydm_timer_list *timer)
 {
-	struct _ADAPTER		*adapter = (struct _ADAPTER *)p_timer->Adapter;
-	HAL_DATA_TYPE	*p_hal_data = GET_HAL_DATA(adapter);
-	struct _sw_antenna_switch_			*p_dm_swat_table = &p_hal_data->DM_OutSrc.dm_swat_table;
+	void *adapter = (void *)timer->Adapter;
+	HAL_DATA_TYPE *hal_data = GET_HAL_DATA(((PADAPTER)adapter));
+	struct sw_antenna_switch *swat_tab = &hal_data->DM_OutSrc.dm_swat_table;
 
 #if DEV_BUS_TYPE == RT_PCI_INTERFACE
 #if USE_WORKITEM
-	odm_schedule_work_item(&p_dm_swat_table->phydm_sw_antenna_switch_workitem);
+	odm_schedule_work_item(&swat_tab->phydm_sw_antenna_switch_workitem);
 #else
 	{
-		/* dbg_print("SW_antdiv_Callback"); */
-		odm_s0s1_sw_ant_div(&p_hal_data->DM_OutSrc, SWAW_STEP_DETERMINE);
+#if 0
+		/* @dbg_print("SW_antdiv_Callback"); */
+#endif
+		odm_s0s1_sw_ant_div(&hal_data->DM_OutSrc, SWAW_STEP_DETERMINE);
 	}
 #endif
 #else
-	odm_schedule_work_item(&p_dm_swat_table->phydm_sw_antenna_switch_workitem);
+	odm_schedule_work_item(&swat_tab->phydm_sw_antenna_switch_workitem);
 #endif
 }
-void
-odm_sw_antdiv_workitem_callback(
-	void            *p_context
-)
+
+void odm_sw_antdiv_workitem_callback(void *context)
 {
-	struct _ADAPTER		*p_adapter = (struct _ADAPTER *)p_context;
-	HAL_DATA_TYPE	*p_hal_data = GET_HAL_DATA(p_adapter);
+	void *adapter = (void *)context;
+	HAL_DATA_TYPE *hal_data = GET_HAL_DATA(((PADAPTER)adapter));
 
-	/* dbg_print("SW_antdiv_Workitem_Callback"); */
-	odm_s0s1_sw_ant_div(&p_hal_data->DM_OutSrc, SWAW_STEP_DETERMINE);
+#if 0
+	/* @dbg_print("SW_antdiv_Workitem_Callback"); */
+#endif
+	odm_s0s1_sw_ant_div(&hal_data->DM_OutSrc, SWAW_STEP_DETERMINE);
 }
 
 #elif (DM_ODM_SUPPORT_TYPE == ODM_CE)
 
-void
-odm_sw_antdiv_workitem_callback(
-	void	*p_context
-)
+void odm_sw_antdiv_workitem_callback(void *context)
 {
-	struct _ADAPTER *
-	p_adapter = (struct _ADAPTER *)p_context;
+	void *
+		adapter = (void *)context;
 	HAL_DATA_TYPE
-	*p_hal_data = GET_HAL_DATA(p_adapter);
+	*hal_data = GET_HAL_DATA(((PADAPTER)adapter));
 
-	/*dbg_print("SW_antdiv_Workitem_Callback");*/
-	odm_s0s1_sw_ant_div(&p_hal_data->odmpriv, SWAW_STEP_DETERMINE);
+#if 0
+	/*@dbg_print("SW_antdiv_Workitem_Callback");*/
+#endif
+	odm_s0s1_sw_ant_div(&hal_data->odmpriv, SWAW_STEP_DETERMINE);
 }
 
-void
-odm_sw_antdiv_callback(void *function_context)
+void odm_sw_antdiv_callback(void *function_context)
 {
-	struct PHY_DM_STRUCT	*p_dm = (struct PHY_DM_STRUCT *)function_context;
-	struct _ADAPTER	*padapter = p_dm->adapter;
-	if (padapter->net_closed == true)
+	struct dm_struct *dm = (struct dm_struct *)function_context;
+	void *padapter = dm->adapter;
+	if (*dm->is_net_closed == true)
 		return;
 
-#if 0 /* Can't do I/O in timer callback*/
-	odm_s0s1_sw_ant_div(p_dm, SWAW_STEP_DETERMINE);
+#if 0 /* @Can't do I/O in timer callback*/
+	odm_s0s1_sw_ant_div(dm, SWAW_STEP_DETERMINE);
 #else
-	rtw_run_in_thread_cmd(padapter, odm_sw_antdiv_workitem_callback, padapter);
+	rtw_run_in_thread_cmd(padapter, odm_sw_antdiv_workitem_callback,
+			      padapter);
 #endif
 }
 
-
 #endif
 
-void
-odm_s0s1_sw_ant_div_by_ctrl_frame(
-	void			*p_dm_void,
-	u8			step
-)
+void odm_s0s1_sw_ant_div_by_ctrl_frame(void *dm_void, u8 step)
 {
-	struct PHY_DM_STRUCT		*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	struct _sw_antenna_switch_	*p_dm_swat_table = &p_dm->dm_swat_table;
-	struct phydm_fat_struct		*p_dm_fat_table = &p_dm->dm_fat_table;
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct sw_antenna_switch *swat_tab = &dm->dm_swat_table;
+	struct phydm_fat_struct *fat_tab = &dm->dm_fat_table;
 
 	switch (step) {
 	case SWAW_STEP_PEEK:
-		p_dm_swat_table->pkt_cnt_sw_ant_div_by_ctrl_frame = 0;
-		p_dm_swat_table->is_sw_ant_div_by_ctrl_frame = true;
-		p_dm_fat_table->main_ant_ctrl_frame_cnt = 0;
-		p_dm_fat_table->aux_ant_ctrl_frame_cnt = 0;
-		p_dm_fat_table->main_ant_ctrl_frame_sum = 0;
-		p_dm_fat_table->aux_ant_ctrl_frame_sum = 0;
-		p_dm_fat_table->cck_ctrl_frame_cnt_main = 0;
-		p_dm_fat_table->cck_ctrl_frame_cnt_aux = 0;
-		p_dm_fat_table->ofdm_ctrl_frame_cnt_main = 0;
-		p_dm_fat_table->ofdm_ctrl_frame_cnt_aux = 0;
-		PHYDM_DBG(p_dm, DBG_ANT_DIV, ("odm_S0S1_SwAntDivForAPMode(): Start peek and reset counter\n"));
+		swat_tab->pkt_cnt_sw_ant_div_by_ctrl_frame = 0;
+		swat_tab->is_sw_ant_div_by_ctrl_frame = true;
+		fat_tab->main_ctrl_cnt = 0;
+		fat_tab->aux_ctrl_cnt = 0;
+		fat_tab->main_ctrl_sum = 0;
+		fat_tab->aux_ctrl_sum = 0;
+		fat_tab->cck_ctrl_frame_cnt_main = 0;
+		fat_tab->cck_ctrl_frame_cnt_aux = 0;
+		fat_tab->ofdm_ctrl_frame_cnt_main = 0;
+		fat_tab->ofdm_ctrl_frame_cnt_aux = 0;
+		PHYDM_DBG(dm, DBG_ANT_DIV,
+			  "odm_S0S1_SwAntDivForAPMode(): Start peek and reset counter\n");
 		break;
 	case SWAW_STEP_DETERMINE:
-		p_dm_swat_table->is_sw_ant_div_by_ctrl_frame = false;
-		PHYDM_DBG(p_dm, DBG_ANT_DIV, ("odm_S0S1_SwAntDivForAPMode(): Stop peek\n"));
+		swat_tab->is_sw_ant_div_by_ctrl_frame = false;
+		PHYDM_DBG(dm, DBG_ANT_DIV,
+			  "odm_S0S1_SwAntDivForAPMode(): Stop peek\n");
 		break;
 	default:
-		p_dm_swat_table->is_sw_ant_div_by_ctrl_frame = false;
+		swat_tab->is_sw_ant_div_by_ctrl_frame = false;
 		break;
 	}
 }
 
-void
-odm_antsel_statistics_of_ctrl_frame(
-	void			*p_dm_void,
-	u8			antsel_tr_mux,
-	u32			rx_pwdb_all
-
-)
+void odm_antsel_statistics_ctrl(void *dm_void, u8 antsel_tr_mux,
+				u32 rx_pwdb_all)
 {
-	struct PHY_DM_STRUCT		*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	struct phydm_fat_struct	*p_dm_fat_table = &p_dm->dm_fat_table;
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct phydm_fat_struct *fat_tab = &dm->dm_fat_table;
 
 	if (antsel_tr_mux == ANT1_2G) {
-		p_dm_fat_table->main_ant_ctrl_frame_sum += rx_pwdb_all;
-		p_dm_fat_table->main_ant_ctrl_frame_cnt++;
+		fat_tab->main_ctrl_sum += rx_pwdb_all;
+		fat_tab->main_ctrl_cnt++;
 	} else {
-		p_dm_fat_table->aux_ant_ctrl_frame_sum += rx_pwdb_all;
-		p_dm_fat_table->aux_ant_ctrl_frame_cnt++;
+		fat_tab->aux_ctrl_sum += rx_pwdb_all;
+		fat_tab->aux_ctrl_cnt++;
 	}
 }
 
-void
-odm_s0s1_sw_ant_div_by_ctrl_frame_process_rssi(
-	void			*p_dm_void,
-	void			*p_phy_info_void,
-	void			*p_pkt_info_void
-	/*	struct phydm_phyinfo_struct*		p_phy_info, */
-	/*	struct phydm_perpkt_info_struct*		p_pktinfo */
-)
+void odm_s0s1_sw_ant_div_by_ctrl_frame_process_rssi(void *dm_void,
+						    void *phy_info_void,
+						    void *pkt_info_void
+	/*	struct phydm_phyinfo_struct*		phy_info, */
+	/*	struct phydm_perpkt_info_struct*		pktinfo */
+	)
 {
-	struct PHY_DM_STRUCT		*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	struct phydm_phyinfo_struct	*p_phy_info = (struct phydm_phyinfo_struct *)p_phy_info_void;
-	struct phydm_perpkt_info_struct	*p_pktinfo = (struct phydm_perpkt_info_struct *)p_pkt_info_void;
-	struct _sw_antenna_switch_	*p_dm_swat_table = &p_dm->dm_swat_table;
-	struct phydm_fat_struct		*p_dm_fat_table = &p_dm->dm_fat_table;
-	boolean		is_cck_rate;
-
-	if (!(p_dm->support_ability & ODM_BB_ANT_DIV))
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct phydm_phyinfo_struct *phy_info = NULL;
+	struct phydm_perpkt_info_struct *pktinfo = NULL;
+	struct sw_antenna_switch *swat_tab = &dm->dm_swat_table;
+	struct phydm_fat_struct *fat_tab = &dm->dm_fat_table;
+	u8 rssi_cck;
+
+	phy_info = (struct phydm_phyinfo_struct *)phy_info_void;
+	pktinfo = (struct phydm_perpkt_info_struct *)pkt_info_void;
+
+	if (!(dm->support_ability & ODM_BB_ANT_DIV))
 		return;
 
-	if (p_dm->ant_div_type != S0S1_SW_ANTDIV)
+	if (dm->ant_div_type != S0S1_SW_ANTDIV)
 		return;
 
-	/* In try state */
-	if (!p_dm_swat_table->is_sw_ant_div_by_ctrl_frame)
+	/* @In try state */
+	if (!swat_tab->is_sw_ant_div_by_ctrl_frame)
 		return;
 
 	/* No HW error and match receiver address */
-	if (!p_pktinfo->is_to_self)
+	if (!pktinfo->is_to_self)
 		return;
 
-	p_dm_swat_table->pkt_cnt_sw_ant_div_by_ctrl_frame++;
-	is_cck_rate = ((p_pktinfo->data_rate >= DESC_RATE1M) && (p_pktinfo->data_rate <= DESC_RATE11M)) ? true : false;
+	swat_tab->pkt_cnt_sw_ant_div_by_ctrl_frame++;
 
-	if (is_cck_rate) {
-		p_dm_fat_table->antsel_rx_keep_0 = (p_dm_fat_table->rx_idle_ant == MAIN_ANT) ? ANT1_2G : ANT2_2G;
+	if (pktinfo->is_cck_rate) {
+		rssi_cck = phy_info->rx_mimo_signal_strength[RF_PATH_A];
+		fat_tab->antsel_rx_keep_0 = (fat_tab->rx_idle_ant == MAIN_ANT) ?
+					    ANT1_2G : ANT2_2G;
 
-		if (p_dm_fat_table->antsel_rx_keep_0 == ANT1_2G)
-			p_dm_fat_table->cck_ctrl_frame_cnt_main++;
+		if (fat_tab->antsel_rx_keep_0 == ANT1_2G)
+			fat_tab->cck_ctrl_frame_cnt_main++;
 		else
-			p_dm_fat_table->cck_ctrl_frame_cnt_aux++;
+			fat_tab->cck_ctrl_frame_cnt_aux++;
 
-		odm_antsel_statistics_of_ctrl_frame(p_dm, p_dm_fat_table->antsel_rx_keep_0, p_phy_info->rx_mimo_signal_strength[RF_PATH_A]);
+		odm_antsel_statistics_ctrl(dm, fat_tab->antsel_rx_keep_0,
+					   rssi_cck);
 	} else {
-		p_dm_fat_table->antsel_rx_keep_0 = (p_dm_fat_table->rx_idle_ant == MAIN_ANT) ? ANT1_2G : ANT2_2G;
-		
-		if (p_dm_fat_table->antsel_rx_keep_0 == ANT1_2G)
-			p_dm_fat_table->ofdm_ctrl_frame_cnt_main++;
+		fat_tab->antsel_rx_keep_0 = (fat_tab->rx_idle_ant == MAIN_ANT) ?
+					    ANT1_2G : ANT2_2G;
+
+		if (fat_tab->antsel_rx_keep_0 == ANT1_2G)
+			fat_tab->ofdm_ctrl_frame_cnt_main++;
 		else
-			p_dm_fat_table->ofdm_ctrl_frame_cnt_aux++;
+			fat_tab->ofdm_ctrl_frame_cnt_aux++;
 
-		odm_antsel_statistics_of_ctrl_frame(p_dm, p_dm_fat_table->antsel_rx_keep_0, p_phy_info->rx_pwdb_all);
+		odm_antsel_statistics_ctrl(dm, fat_tab->antsel_rx_keep_0,
+					   phy_info->rx_pwdb_all);
 	}
 }
 
-#endif /* #if (RTL8723B_SUPPORT == 1) || (RTL8821A_SUPPORT == 1) */
-
-
-
+#endif /* @#if (RTL8723B_SUPPORT == 1) || (RTL8821A_SUPPORT == 1) */
 
-void
-odm_set_next_mac_addr_target(
-	void		*p_dm_void
-)
+void odm_set_next_mac_addr_target(void *dm_void)
 {
-	struct PHY_DM_STRUCT		*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	struct phydm_fat_struct			*p_dm_fat_table = &p_dm->dm_fat_table;
-	struct cmn_sta_info	*p_entry;
-	u32			value32, i;
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct phydm_fat_struct *fat_tab = &dm->dm_fat_table;
+	struct cmn_sta_info *entry;
+	u32 value32, i;
 
-	PHYDM_DBG(p_dm, DBG_ANT_DIV, ("odm_set_next_mac_addr_target() ==>\n"));
+	PHYDM_DBG(dm, DBG_ANT_DIV, "%s ==>\n", __func__);
 
-	if (p_dm->is_linked) {
+	if (dm->is_linked) {
 		for (i = 0; i < ODM_ASSOCIATE_ENTRY_NUM; i++) {
-
-			if ((p_dm_fat_table->train_idx + 1) == ODM_ASSOCIATE_ENTRY_NUM)
-				p_dm_fat_table->train_idx = 0;
+			if ((fat_tab->train_idx + 1) == ODM_ASSOCIATE_ENTRY_NUM)
+				fat_tab->train_idx = 0;
 			else
-				p_dm_fat_table->train_idx++;
-
-			p_entry = p_dm->p_phydm_sta_info[p_dm_fat_table->train_idx];
+				fat_tab->train_idx++;
 
-			if (is_sta_active(p_entry)) {
+			entry = dm->phydm_sta_info[fat_tab->train_idx];
 
-				/*Match MAC ADDR*/
-				value32 = (p_entry->mac_addr[5] << 8) | p_entry->mac_addr[4];
+			if (is_sta_active(entry)) {
+				/*@Match MAC ADDR*/
+				value32 = (entry->mac_addr[5] << 8) | entry->mac_addr[4];
 
-				odm_set_mac_reg(p_dm, 0x7b4, 0xFFFF, value32);/*0x7b4~0x7b5*/
+				odm_set_mac_reg(dm, R_0x7b4, 0xFFFF, value32); /*@0x7b4~0x7b5*/
 
-				value32 = (p_entry->mac_addr[3] << 24) | (p_entry->mac_addr[2] << 16) | (p_entry->mac_addr[1] << 8) | p_entry->mac_addr[0];
+				value32 = (entry->mac_addr[3] << 24) | (entry->mac_addr[2] << 16) | (entry->mac_addr[1] << 8) | entry->mac_addr[0];
 
-				odm_set_mac_reg(p_dm, 0x7b0, MASKDWORD, value32);/*0x7b0~0x7b3*/
+				odm_set_mac_reg(dm, R_0x7b0, MASKDWORD, value32); /*@0x7b0~0x7b3*/
 
-				PHYDM_DBG(p_dm, DBG_ANT_DIV, ("p_dm_fat_table->train_idx=%d\n", p_dm_fat_table->train_idx));
+				PHYDM_DBG(dm, DBG_ANT_DIV,
+					  "fat_tab->train_idx=%d\n",
+					  fat_tab->train_idx);
 
-				PHYDM_DBG(p_dm, DBG_ANT_DIV, ("Training MAC addr = %x:%x:%x:%x:%x:%x\n",
-					p_entry->mac_addr[5], p_entry->mac_addr[4], p_entry->mac_addr[3], p_entry->mac_addr[2], p_entry->mac_addr[1], p_entry->mac_addr[0]));
+				PHYDM_DBG(dm, DBG_ANT_DIV,
+					  "Training MAC addr = %x:%x:%x:%x:%x:%x\n",
+					  entry->mac_addr[5],
+					  entry->mac_addr[4],
+					  entry->mac_addr[3],
+					  entry->mac_addr[2],
+					  entry->mac_addr[1],
+					  entry->mac_addr[0]);
 
 				break;
 			}
 		}
 	}
-
 }
 
 #if (defined(CONFIG_5G_CG_SMART_ANT_DIVERSITY)) || (defined(CONFIG_2G_CG_SMART_ANT_DIVERSITY))
 
-void
-odm_fast_ant_training(
-	void		*p_dm_void
-)
+void odm_fast_ant_training(
+	void *dm_void)
 {
-	struct PHY_DM_STRUCT		*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	struct phydm_fat_struct	*p_dm_fat_table = &p_dm->dm_fat_table;
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct phydm_fat_struct *fat_tab = &dm->dm_fat_table;
 
-	u32	max_rssi_path_a = 0, pckcnt_path_a = 0;
-	u8	i, target_ant_path_a = 0;
-	boolean	is_pkt_filter_macth_path_a = false;
+	u32 max_rssi_path_a = 0, pckcnt_path_a = 0;
+	u8 i, target_ant_path_a = 0;
+	boolean is_pkt_filter_macth_path_a = false;
 #if (RTL8192E_SUPPORT == 1)
-	u32	max_rssi_path_b = 0, pckcnt_path_b = 0;
-	u8	target_ant_path_b = 0;
-	boolean	is_pkt_filter_macth_path_b = false;
+	u32 max_rssi_path_b = 0, pckcnt_path_b = 0;
+	u8 target_ant_path_b = 0;
+	boolean is_pkt_filter_macth_path_b = false;
 #endif
 
+	if (!dm->is_linked) { /* @is_linked==False */
+		PHYDM_DBG(dm, DBG_ANT_DIV, "[No Link!!!]\n");
 
-	if (!p_dm->is_linked) { /* is_linked==False */
-		PHYDM_DBG(p_dm, DBG_ANT_DIV, ("[No Link!!!]\n"));
-
-		if (p_dm_fat_table->is_become_linked == true) {
-			odm_ant_div_on_off(p_dm, ANTDIV_OFF);
-			phydm_fast_training_enable(p_dm, FAT_OFF);
-			odm_tx_by_tx_desc_or_reg(p_dm, TX_BY_REG);
-			p_dm_fat_table->is_become_linked = p_dm->is_linked;
+		if (fat_tab->is_become_linked == true) {
+			odm_ant_div_on_off(dm, ANTDIV_OFF, ANT_PATH_A);
+			phydm_fast_training_enable(dm, FAT_OFF);
+			odm_tx_by_tx_desc_or_reg(dm, TX_BY_REG);
+			fat_tab->is_become_linked = dm->is_linked;
 		}
 		return;
 	} else {
-		if (p_dm_fat_table->is_become_linked == false) {
-			PHYDM_DBG(p_dm, DBG_ANT_DIV, ("[Linked!!!]\n"));
-			p_dm_fat_table->is_become_linked = p_dm->is_linked;
+		if (fat_tab->is_become_linked == false) {
+			PHYDM_DBG(dm, DBG_ANT_DIV, "[Linked!!!]\n");
+			fat_tab->is_become_linked = dm->is_linked;
 		}
 	}
 
-	if (*(p_dm_fat_table->p_force_tx_ant_by_desc) == false) {
-		if (p_dm->is_one_entry_only == true)
-			odm_tx_by_tx_desc_or_reg(p_dm, TX_BY_REG);
+	if (!(*fat_tab->p_force_tx_by_desc)) {
+		if (dm->is_one_entry_only == true)
+			odm_tx_by_tx_desc_or_reg(dm, TX_BY_REG);
 		else
-			odm_tx_by_tx_desc_or_reg(p_dm, TX_BY_DESC);
+			odm_tx_by_tx_desc_or_reg(dm, TX_BY_DESC);
 	}
 
-
-	if (p_dm->support_ic_type == ODM_RTL8188E)
-		odm_set_bb_reg(p_dm, 0x864, BIT(2) | BIT(1) | BIT(0), ((p_dm->fat_comb_a) - 1));
+	if (dm->support_ic_type == ODM_RTL8188E)
+		odm_set_bb_reg(dm, R_0x864, BIT(2) | BIT(1) | BIT(0), ((dm->fat_comb_a) - 1));
 #if (RTL8192E_SUPPORT == 1)
-	else if (p_dm->support_ic_type == ODM_RTL8192E) {
-		odm_set_bb_reg(p_dm, 0xB38, BIT(2) | BIT(1) | BIT(0), ((p_dm->fat_comb_a) - 1));	   /* path-A  */ /* ant combination=regB38[2:0]+1 */
-		odm_set_bb_reg(p_dm, 0xB38, BIT(18) | BIT(17) | BIT(16), ((p_dm->fat_comb_b) - 1));  /* path-B  */ /* ant combination=regB38[18:16]+1 */
+	else if (dm->support_ic_type == ODM_RTL8192E) {
+		odm_set_bb_reg(dm, R_0xb38, BIT(2) | BIT(1) | BIT(0), ((dm->fat_comb_a) - 1)); /* path-A  */ /* ant combination=regB38[2:0]+1 */
+		odm_set_bb_reg(dm, R_0xb38, BIT(18) | BIT(17) | BIT(16), ((dm->fat_comb_b) - 1)); /* path-B  */ /* ant combination=regB38[18:16]+1 */
 	}
 #endif
 
-	PHYDM_DBG(p_dm, DBG_ANT_DIV, ("==>odm_fast_ant_training()\n"));
+	PHYDM_DBG(dm, DBG_ANT_DIV, "==>%s\n", __func__);
 
-	/* 1 TRAINING STATE */
-	if (p_dm_fat_table->fat_state == FAT_TRAINING_STATE) {
-		/* 2 Caculate RSSI per Antenna */
+	/* @1 TRAINING STATE */
+	if (fat_tab->fat_state == FAT_TRAINING_STATE) {
+		/* @2 Caculate RSSI per Antenna */
 
-		/* 3 [path-A]--------------------------- */
-		for (i = 0; i < (p_dm->fat_comb_a); i++) { /* i : antenna index */
-			if (p_dm_fat_table->ant_rssi_cnt[i] == 0)
-				p_dm_fat_table->ant_ave_rssi[i] = 0;
+		/* @3 [path-A]--------------------------- */
+		for (i = 0; i < (dm->fat_comb_a); i++) { /* @i : antenna index */
+			if (fat_tab->ant_rssi_cnt[i] == 0)
+				fat_tab->ant_ave_rssi[i] = 0;
 			else {
-				p_dm_fat_table->ant_ave_rssi[i] = p_dm_fat_table->ant_sum_rssi[i] / p_dm_fat_table->ant_rssi_cnt[i];
+				fat_tab->ant_ave_rssi[i] = fat_tab->ant_sum_rssi[i] / fat_tab->ant_rssi_cnt[i];
 				is_pkt_filter_macth_path_a = true;
 			}
 
-			if (p_dm_fat_table->ant_ave_rssi[i] > max_rssi_path_a) {
-				max_rssi_path_a = p_dm_fat_table->ant_ave_rssi[i];
-				pckcnt_path_a = p_dm_fat_table->ant_rssi_cnt[i];
-				target_ant_path_a =  i ;
-			} else if (p_dm_fat_table->ant_ave_rssi[i] == max_rssi_path_a) {
-				if ((p_dm_fat_table->ant_rssi_cnt[i])   >   pckcnt_path_a) {
-					max_rssi_path_a = p_dm_fat_table->ant_ave_rssi[i];
-					pckcnt_path_a = p_dm_fat_table->ant_rssi_cnt[i];
-					target_ant_path_a = i ;
+			if (fat_tab->ant_ave_rssi[i] > max_rssi_path_a) {
+				max_rssi_path_a = fat_tab->ant_ave_rssi[i];
+				pckcnt_path_a = fat_tab->ant_rssi_cnt[i];
+				target_ant_path_a = i;
+			} else if (fat_tab->ant_ave_rssi[i] == max_rssi_path_a) {
+				if (fat_tab->ant_rssi_cnt[i] > pckcnt_path_a) {
+					max_rssi_path_a = fat_tab->ant_ave_rssi[i];
+					pckcnt_path_a = fat_tab->ant_rssi_cnt[i];
+					target_ant_path_a = i;
 				}
 			}
 
-			PHYDM_DBG("*** ant-index : [ %d ],      counter = (( %d )),     Avg RSSI = (( %d ))\n", i, p_dm_fat_table->ant_rssi_cnt[i],  p_dm_fat_table->ant_ave_rssi[i]);
+			PHYDM_DBG(
+				  "*** ant-index : [ %d ],      counter = (( %d )),     Avg RSSI = (( %d ))\n",
+				  i, fat_tab->ant_rssi_cnt[i],
+				  fat_tab->ant_ave_rssi[i]);
 		}
 
-
 #if 0
 #if (RTL8192E_SUPPORT == 1)
-		/* 3 [path-B]--------------------------- */
-		for (i = 0; i < (p_dm->fat_comb_b); i++) {
-			if (p_dm_fat_table->antRSSIcnt_pathB[i] == 0)
-				p_dm_fat_table->antAveRSSI_pathB[i] = 0;
-			else { /*  (ant_rssi_cnt[i] != 0) */
-				p_dm_fat_table->antAveRSSI_pathB[i] = p_dm_fat_table->antSumRSSI_pathB[i] / p_dm_fat_table->antRSSIcnt_pathB[i];
+		/* @3 [path-B]--------------------------- */
+		for (i = 0; i < (dm->fat_comb_b); i++) {
+			if (fat_tab->antRSSIcnt_pathB[i] == 0)
+				fat_tab->antAveRSSI_pathB[i] = 0;
+			else { /*  @(ant_rssi_cnt[i] != 0) */
+				fat_tab->antAveRSSI_pathB[i] = fat_tab->antSumRSSI_pathB[i] / fat_tab->antRSSIcnt_pathB[i];
 				is_pkt_filter_macth_path_b = true;
 			}
-			if (p_dm_fat_table->antAveRSSI_pathB[i] > max_rssi_path_b) {
-				max_rssi_path_b = p_dm_fat_table->antAveRSSI_pathB[i];
-				pckcnt_path_b = p_dm_fat_table->antRSSIcnt_pathB[i];
-				target_ant_path_b = (u8) i;
+			if (fat_tab->antAveRSSI_pathB[i] > max_rssi_path_b) {
+				max_rssi_path_b = fat_tab->antAveRSSI_pathB[i];
+				pckcnt_path_b = fat_tab->antRSSIcnt_pathB[i];
+				target_ant_path_b = (u8)i;
 			}
-			if (p_dm_fat_table->antAveRSSI_pathB[i] == max_rssi_path_b) {
-				if (p_dm_fat_table->antRSSIcnt_pathB > pckcnt_path_b) {
-					max_rssi_path_b = p_dm_fat_table->antAveRSSI_pathB[i];
-					target_ant_path_b = (u8) i;
+			if (fat_tab->antAveRSSI_pathB[i] == max_rssi_path_b) {
+				if (fat_tab->antRSSIcnt_pathB > pckcnt_path_b) {
+					max_rssi_path_b = fat_tab->antAveRSSI_pathB[i];
+					target_ant_path_b = (u8)i;
 				}
 			}
-			if (p_dm->fat_print_rssi == 1) {
-				PHYDM_DBG(p_dm, DBG_ANT_DIV, ("***{path-B}: Sum RSSI[%d] = (( %d )),      cnt RSSI [%d] = (( %d )),     Avg RSSI[%d] = (( %d ))\n",
-					i, p_dm_fat_table->antSumRSSI_pathB[i], i, p_dm_fat_table->antRSSIcnt_pathB[i], i, p_dm_fat_table->antAveRSSI_pathB[i]));
+			if (dm->fat_print_rssi == 1) {
+				PHYDM_DBG(dm, DBG_ANT_DIV,
+					  "***{path-B}: Sum RSSI[%d] = (( %d )),      cnt RSSI [%d] = (( %d )),     Avg RSSI[%d] = (( %d ))\n",
+					  i, fat_tab->antSumRSSI_pathB[i], i,
+					  fat_tab->antRSSIcnt_pathB[i], i,
+					  fat_tab->antAveRSSI_pathB[i]);
 			}
 		}
 #endif
 #endif
 
-		/* 1 DECISION STATE */
+		/* @1 DECISION STATE */
 
-		/* 2 Select TRX Antenna */
+		/* @2 Select TRX Antenna */
 
-		phydm_fast_training_enable(p_dm, FAT_OFF);
+		phydm_fast_training_enable(dm, FAT_OFF);
 
-		/* 3 [path-A]--------------------------- */
-		if (is_pkt_filter_macth_path_a  == false) {
-			/* PHYDM_DBG(p_dm,DBG_ANT_DIV, ("{path-A}: None Packet is matched\n")); */
-			PHYDM_DBG(p_dm, DBG_ANT_DIV, ("{path-A}: None Packet is matched\n"));
-			odm_ant_div_on_off(p_dm, ANTDIV_OFF);
+		/* @3 [path-A]--------------------------- */
+		if (is_pkt_filter_macth_path_a == false) {
+#if 0
+			/* PHYDM_DBG(dm,DBG_ANT_DIV, "{path-A}: None Packet is matched\n"); */
+#endif
+			PHYDM_DBG(dm, DBG_ANT_DIV,
+				  "{path-A}: None Packet is matched\n");
+			odm_ant_div_on_off(dm, ANTDIV_OFF, ANT_PATH_A);
 		} else {
-			PHYDM_DBG("target_ant_path_a = (( %d )) , max_rssi_path_a = (( %d ))\n", target_ant_path_a, max_rssi_path_a);
+			PHYDM_DBG(
+				  "target_ant_path_a = (( %d )) , max_rssi_path_a = (( %d ))\n",
+				  target_ant_path_a, max_rssi_path_a);
 
-			/* 3 [ update RX-optional ant ]        Default RX is Omni, Optional RX is the best decision by FAT */
-			if (p_dm->support_ic_type == ODM_RTL8188E)
-				odm_set_bb_reg(p_dm, 0x864, BIT(8) | BIT(7) | BIT(6), target_ant_path_a);
-			else if (p_dm->support_ic_type == ODM_RTL8192E)
-				odm_set_bb_reg(p_dm, 0xB38, BIT(8) | BIT(7) | BIT(6), target_ant_path_a); /* Optional RX [pth-A] */
+			/* @3 [ update RX-optional ant ]        Default RX is Omni, Optional RX is the best decision by FAT */
+			if (dm->support_ic_type == ODM_RTL8188E)
+				odm_set_bb_reg(dm, R_0x864, BIT(8) | BIT(7) | BIT(6), target_ant_path_a);
+			else if (dm->support_ic_type == ODM_RTL8192E)
+				odm_set_bb_reg(dm, R_0xb38, BIT(8) | BIT(7) | BIT(6), target_ant_path_a); /* Optional RX [pth-A] */
 
-			/* 3 [ update TX ant ] */
-			odm_update_tx_ant(p_dm, target_ant_path_a, (p_dm_fat_table->train_idx));
+			/* @3 [ update TX ant ] */
+			odm_update_tx_ant(dm, target_ant_path_a, (fat_tab->train_idx));
 
 			if (target_ant_path_a == 0)
-				odm_ant_div_on_off(p_dm, ANTDIV_OFF);
+				odm_ant_div_on_off(dm, ANTDIV_OFF, ANT_PATH_A);
 		}
 #if 0
 #if (RTL8192E_SUPPORT == 1)
-		/* 3 [path-B]--------------------------- */
+		/* @3 [path-B]--------------------------- */
 		if (is_pkt_filter_macth_path_b == false) {
-			if (p_dm->fat_print_rssi == 1)
-				PHYDM_DBG(p_dm, DBG_ANT_DIV, ("***[%d]{path-B}: None Packet is matched\n\n\n", __LINE__));
+			if (dm->fat_print_rssi == 1)
+				PHYDM_DBG(dm, DBG_ANT_DIV,
+					  "***[%d]{path-B}: None Packet is matched\n\n\n",
+					  __LINE__);
 		} else {
-			if (p_dm->fat_print_rssi == 1) {
-				PHYDM_DBG(p_dm, DBG_ANT_DIV,
-					(" ***target_ant_path_b = (( %d )) *** max_rssi = (( %d ))***\n\n\n", target_ant_path_b, max_rssi_path_b));
+			if (dm->fat_print_rssi == 1) {
+				PHYDM_DBG(dm, DBG_ANT_DIV,
+					  " ***target_ant_path_b = (( %d )) *** max_rssi = (( %d ))***\n\n\n",
+					  target_ant_path_b, max_rssi_path_b);
 			}
-			odm_set_bb_reg(p_dm, 0xB38, BIT(21) | BIT20 | BIT19, target_ant_path_b);	/* Default RX is Omni, Optional RX is the best decision by FAT */
-			odm_set_bb_reg(p_dm, 0x80c, BIT(21), 1); /* Reg80c[21]=1'b1		//from TX Info */
+			odm_set_bb_reg(dm, R_0xb38, BIT(21) | BIT20 | BIT19, target_ant_path_b);	/* @Default RX is Omni, Optional RX is the best decision by FAT */
+			odm_set_bb_reg(dm, R_0x80c, BIT(21), 1); /* Reg80c[21]=1'b1		//from TX Info */
 
-			p_dm_fat_table->antsel_pathB[p_dm_fat_table->train_idx] = target_ant_path_b;
+			fat_tab->antsel_pathB[fat_tab->train_idx] = target_ant_path_b;
 		}
 #endif
 #endif
 
-		/* 2 Reset counter */
-		for (i = 0; i < (p_dm->fat_comb_a); i++) {
-			p_dm_fat_table->ant_sum_rssi[i] = 0;
-			p_dm_fat_table->ant_rssi_cnt[i] = 0;
+		/* @2 Reset counter */
+		for (i = 0; i < (dm->fat_comb_a); i++) {
+			fat_tab->ant_sum_rssi[i] = 0;
+			fat_tab->ant_rssi_cnt[i] = 0;
 		}
-		/*
+		/*@
 		#if (RTL8192E_SUPPORT == 1)
-		for(i=0; i<=(p_dm->fat_comb_b); i++)
+		for(i=0; i<=(dm->fat_comb_b); i++)
 		{
-			p_dm_fat_table->antSumRSSI_pathB[i] = 0;
-			p_dm_fat_table->antRSSIcnt_pathB[i] = 0;
+			fat_tab->antSumRSSI_pathB[i] = 0;
+			fat_tab->antRSSIcnt_pathB[i] = 0;
 		}
 		#endif
 		*/
 
-		p_dm_fat_table->fat_state = FAT_PREPARE_STATE;
+		fat_tab->fat_state = FAT_PREPARE_STATE;
 		return;
 	}
 
-	/* 1 NORMAL STATE */
-	if (p_dm_fat_table->fat_state == FAT_PREPARE_STATE) {
-		PHYDM_DBG(p_dm, DBG_ANT_DIV, ("[ Start Prepare state ]\n"));
+	/* @1 NORMAL STATE */
+	if (fat_tab->fat_state == FAT_PREPARE_STATE) {
+		PHYDM_DBG(dm, DBG_ANT_DIV, "[ Start Prepare state ]\n");
 
-		odm_set_next_mac_addr_target(p_dm);
+		odm_set_next_mac_addr_target(dm);
 
-		/* 2 Prepare Training */
-		p_dm_fat_table->fat_state = FAT_TRAINING_STATE;
-		phydm_fast_training_enable(p_dm, FAT_ON);
-		odm_ant_div_on_off(p_dm, ANTDIV_ON);		/* enable HW AntDiv */
-		PHYDM_DBG(p_dm, DBG_ANT_DIV, ("[Start Training state]\n"));
+		/* @2 Prepare Training */
+		fat_tab->fat_state = FAT_TRAINING_STATE;
+		phydm_fast_training_enable(dm, FAT_ON);
+		odm_ant_div_on_off(dm, ANTDIV_ON, ANT_PATH_A);
+		/* @enable HW AntDiv */
+		PHYDM_DBG(dm, DBG_ANT_DIV, "[Start Training state]\n");
 
-		odm_set_timer(p_dm, &p_dm->fast_ant_training_timer, p_dm->antdiv_intvl); /* ms */
+		odm_set_timer(dm, &dm->fast_ant_training_timer, dm->antdiv_intvl); /* @ms */
 	}
-
 }
 
-void
-odm_fast_ant_training_callback(
-	void		*p_dm_void
-)
+void odm_fast_ant_training_callback(
+	void *dm_void)
 {
-	struct PHY_DM_STRUCT		*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
 
 #if (DM_ODM_SUPPORT_TYPE == ODM_CE)
-	struct _ADAPTER	*padapter = p_dm->adapter;
-	if (padapter->net_closed == true)
+	if (*(dm->is_net_closed) == true)
 		return;
-	/* if(*p_dm->p_is_net_closed == true) */
-	/* return; */
 #endif
 
 #if USE_WORKITEM
-	odm_schedule_work_item(&p_dm->fast_ant_training_workitem);
+	odm_schedule_work_item(&dm->fast_ant_training_workitem);
 #else
-	PHYDM_DBG(p_dm, DBG_ANT_DIV, ("******odm_fast_ant_training_callback******\n"));
-	odm_fast_ant_training(p_dm);
+	PHYDM_DBG(dm, DBG_ANT_DIV, "******%s******\n", __func__);
+	odm_fast_ant_training(dm);
 #endif
 }
 
-void
-odm_fast_ant_training_work_item_callback(
-	void		*p_dm_void
-)
+void odm_fast_ant_training_work_item_callback(
+	void *dm_void)
 {
-	struct PHY_DM_STRUCT		*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
 
-	PHYDM_DBG(p_dm, DBG_ANT_DIV, ("******odm_fast_ant_training_work_item_callback******\n"));
-	odm_fast_ant_training(p_dm);
+	PHYDM_DBG(dm, DBG_ANT_DIV, "******%s******\n", __func__);
+	odm_fast_ant_training(dm);
 }
 
 #endif
 
-void
-odm_ant_div_init(
-	void		*p_dm_void
-)
+void odm_ant_div_init(void *dm_void)
 {
-	struct PHY_DM_STRUCT		*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	struct phydm_fat_struct			*p_dm_fat_table = &p_dm->dm_fat_table;
-	struct _sw_antenna_switch_			*p_dm_swat_table = &p_dm->dm_swat_table;
-
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct phydm_fat_struct *fat_tab = &dm->dm_fat_table;
+	struct sw_antenna_switch *swat_tab = &dm->dm_swat_table;
 
-	if (!(p_dm->support_ability & ODM_BB_ANT_DIV)) {
-		PHYDM_DBG(p_dm, DBG_ANT_DIV, ("[Return!!!]   Not Support Antenna Diversity Function\n"));
+	if (!(dm->support_ability & ODM_BB_ANT_DIV)) {
+		PHYDM_DBG(dm, DBG_ANT_DIV,
+			  "[Return!!!]   Not Support Antenna Diversity Function\n");
 		return;
 	}
-	/* --- */
+/* @--- */
 #if (DM_ODM_SUPPORT_TYPE == ODM_AP)
-	if (p_dm_fat_table->ant_div_2g_5g == ODM_ANTDIV_2G) {
-		PHYDM_DBG(p_dm, DBG_ANT_DIV, ("[2G AntDiv Init]: Only Support 2G Antenna Diversity Function\n"));
-		if (!(p_dm->support_ic_type & ODM_ANTDIV_2G_SUPPORT_IC))
+	if (fat_tab->ant_div_2g_5g == ODM_ANTDIV_2G) {
+		PHYDM_DBG(dm, DBG_ANT_DIV,
+			  "[2G AntDiv Init]: Only Support 2G Antenna Diversity Function\n");
+		if (!(dm->support_ic_type & ODM_ANTDIV_2G_SUPPORT_IC))
 			return;
-	} else	if (p_dm_fat_table->ant_div_2g_5g == ODM_ANTDIV_5G) {
-		PHYDM_DBG(p_dm, DBG_ANT_DIV, ("[5G AntDiv Init]: Only Support 5G Antenna Diversity Function\n"));
-		if (!(p_dm->support_ic_type & ODM_ANTDIV_5G_SUPPORT_IC))
+	} else if (fat_tab->ant_div_2g_5g == ODM_ANTDIV_5G) {
+		PHYDM_DBG(dm, DBG_ANT_DIV,
+			  "[5G AntDiv Init]: Only Support 5G Antenna Diversity Function\n");
+		if (!(dm->support_ic_type & ODM_ANTDIV_5G_SUPPORT_IC))
 			return;
-	} else	if (p_dm_fat_table->ant_div_2g_5g == (ODM_ANTDIV_2G | ODM_ANTDIV_5G))
-		PHYDM_DBG(p_dm, DBG_ANT_DIV, ("[2G & 5G AntDiv Init]:Support Both 2G & 5G Antenna Diversity Function\n"));
+	} else if (fat_tab->ant_div_2g_5g == (ODM_ANTDIV_2G | ODM_ANTDIV_5G))
+		PHYDM_DBG(dm, DBG_ANT_DIV,
+			  "[2G & 5G AntDiv Init]:Support Both 2G & 5G Antenna Diversity Function\n");
 
 #endif
-	/* --- */
+	/* @--- */
 
-	/* 2 [--General---] */
-	p_dm->antdiv_period = 0;
+	/* @2 [--General---] */
+	dm->antdiv_period = 0;
 
-	p_dm_fat_table->is_become_linked = false;
-	p_dm_fat_table->ant_div_on_off = 0xff;
+	fat_tab->is_become_linked = false;
+	fat_tab->ant_div_on_off = 0xff;
 
-	/* 3       -   AP   - */
+/* @3       -   AP   - */
 #if (DM_ODM_SUPPORT_TYPE == ODM_AP)
 
-#if (BEAMFORMING_SUPPORT == 1)
+#ifdef PHYDM_BEAMFORMING_SUPPORT
 #if (DM_ODM_SUPPORT_TYPE == ODM_AP)
-	odm_bdc_init(p_dm);
+	odm_bdc_init(dm);
 #endif
 #endif
 
-	/* 3     -   WIN   - */
+/* @3     -   WIN   - */
 #elif (DM_ODM_SUPPORT_TYPE == ODM_WIN)
-	p_dm_swat_table->ant_5g = MAIN_ANT;
-	p_dm_swat_table->ant_2g = MAIN_ANT;
+	swat_tab->ant_5g = MAIN_ANT;
+	swat_tab->ant_2g = MAIN_ANT;
 #endif
 
-	/* 2 [---Set MAIN_ANT as default antenna if Auto-ant enable---] */
-	odm_ant_div_on_off(p_dm, ANTDIV_OFF);
-
-	p_dm->ant_type = ODM_AUTO_ANT;
-
-	p_dm_fat_table->rx_idle_ant = 0xff; /*to make RX-idle-antenna will be updated absolutly*/
-	odm_update_rx_idle_ant(p_dm, MAIN_ANT);
-	phydm_keep_rx_ack_ant_by_tx_ant_time(p_dm, 0);  /* Timming issue: keep Rx ant after tx for ACK ( 5 x 3.2 mu = 16mu sec)*/
-
-	/* 2 [---Set TX Antenna---] */
-	if (p_dm_fat_table->p_force_tx_ant_by_desc == NULL) {
-	p_dm_fat_table->force_tx_ant_by_desc = 0;
-	p_dm_fat_table->p_force_tx_ant_by_desc = &(p_dm_fat_table->force_tx_ant_by_desc);
+	/* @2 [---Set MAIN_ANT as default antenna if Auto-ant enable---] */
+	if (fat_tab->div_path_type == ANT_PATH_A)
+		odm_ant_div_on_off(dm, ANTDIV_OFF, ANT_PATH_A);
+	else if (fat_tab->div_path_type == ANT_PATH_B)
+		odm_ant_div_on_off(dm, ANTDIV_OFF, ANT_PATH_B);
+	else if (fat_tab->div_path_type == ANT_PATH_AB)
+		odm_ant_div_on_off(dm, ANTDIV_OFF, ANT_PATH_AB);
+
+	dm->ant_type = ODM_AUTO_ANT;
+
+	fat_tab->rx_idle_ant = 0xff;
+		/*to make RX-idle-antenna will be updated absolutly*/
+	odm_update_rx_idle_ant(dm, MAIN_ANT);
+	phydm_keep_rx_ack_ant_by_tx_ant_time(dm, 0);
+	/* Timming issue: keep Rx ant after tx for ACK(5 x 3.2 mu = 16mu sec)*/
+
+	/* @2 [---Set TX Antenna---] */
+	if (!fat_tab->p_force_tx_by_desc) {
+		fat_tab->force_tx_by_desc = 0;
+		fat_tab->p_force_tx_by_desc = &fat_tab->force_tx_by_desc;
 	}
-	PHYDM_DBG(p_dm, DBG_ANT_DIV, ("p_force_tx_ant_by_desc = %d\n", *p_dm_fat_table->p_force_tx_ant_by_desc));
+	PHYDM_DBG(dm, DBG_ANT_DIV, "p_force_tx_by_desc = %d\n",
+		  *fat_tab->p_force_tx_by_desc);
 
-	if (*(p_dm_fat_table->p_force_tx_ant_by_desc) == true)
-		odm_tx_by_tx_desc_or_reg(p_dm, TX_BY_DESC);
+	if (*fat_tab->p_force_tx_by_desc)
+		odm_tx_by_tx_desc_or_reg(dm, TX_BY_DESC);
 	else
-	odm_tx_by_tx_desc_or_reg(p_dm, TX_BY_REG);
+		odm_tx_by_tx_desc_or_reg(dm, TX_BY_REG);
 
-
-	/* 2 [--88E---] */
-	if (p_dm->support_ic_type == ODM_RTL8188E) {
+	/* @2 [--88E---] */
+	if (dm->support_ic_type == ODM_RTL8188E) {
 #if (RTL8188E_SUPPORT == 1)
-		/* p_dm->ant_div_type = CGCS_RX_HW_ANTDIV; */
-		/* p_dm->ant_div_type = CG_TRX_HW_ANTDIV; */
-		/* p_dm->ant_div_type = CG_TRX_SMART_ANTDIV; */
-
-		if ((p_dm->ant_div_type != CGCS_RX_HW_ANTDIV)  && (p_dm->ant_div_type != CG_TRX_HW_ANTDIV) && (p_dm->ant_div_type != CG_TRX_SMART_ANTDIV)) {
-			PHYDM_DBG(p_dm, DBG_ANT_DIV, ("[Return!!!]  88E Not Supprrt This AntDiv type\n"));
-			p_dm->support_ability &= ~(ODM_BB_ANT_DIV);
+		/* @dm->ant_div_type = CGCS_RX_HW_ANTDIV; */
+		/* @dm->ant_div_type = CG_TRX_HW_ANTDIV; */
+		/* @dm->ant_div_type = CG_TRX_SMART_ANTDIV; */
+
+		if (dm->ant_div_type != CGCS_RX_HW_ANTDIV &&
+		    dm->ant_div_type != CG_TRX_HW_ANTDIV &&
+		    dm->ant_div_type != CG_TRX_SMART_ANTDIV) {
+			PHYDM_DBG(dm, DBG_ANT_DIV,
+				  "[Return!!!]  88E Not Supprrt This AntDiv type\n");
+			dm->support_ability &= ~(ODM_BB_ANT_DIV);
 			return;
 		}
 
-		if (p_dm->ant_div_type == CGCS_RX_HW_ANTDIV)
-			odm_rx_hw_ant_div_init_88e(p_dm);
-		else if (p_dm->ant_div_type == CG_TRX_HW_ANTDIV)
-			odm_trx_hw_ant_div_init_88e(p_dm);
+		if (dm->ant_div_type == CGCS_RX_HW_ANTDIV)
+			odm_rx_hw_ant_div_init_88e(dm);
+		else if (dm->ant_div_type == CG_TRX_HW_ANTDIV)
+			odm_trx_hw_ant_div_init_88e(dm);
 #if (defined(CONFIG_5G_CG_SMART_ANT_DIVERSITY)) || (defined(CONFIG_2G_CG_SMART_ANT_DIVERSITY))
-		else if (p_dm->ant_div_type == CG_TRX_SMART_ANTDIV)
-			odm_smart_hw_ant_div_init_88e(p_dm);
+		else if (dm->ant_div_type == CG_TRX_SMART_ANTDIV)
+			odm_smart_hw_ant_div_init_88e(dm);
 #endif
 #endif
 	}
 
-	/* 2 [--92E---] */
+/* @2 [--92E---] */
 #if (RTL8192E_SUPPORT == 1)
-	else if (p_dm->support_ic_type == ODM_RTL8192E) {
-		/* p_dm->ant_div_type = CGCS_RX_HW_ANTDIV; */
-		/* p_dm->ant_div_type = CG_TRX_HW_ANTDIV; */
-		/* p_dm->ant_div_type = CG_TRX_SMART_ANTDIV; */
-
-		if ((p_dm->ant_div_type != CGCS_RX_HW_ANTDIV) && (p_dm->ant_div_type != CG_TRX_HW_ANTDIV)   && (p_dm->ant_div_type != CG_TRX_SMART_ANTDIV)) {
-			PHYDM_DBG(p_dm, DBG_ANT_DIV, ("[Return!!!]  8192E Not Supprrt This AntDiv type\n"));
-			p_dm->support_ability &= ~(ODM_BB_ANT_DIV);
+	else if (dm->support_ic_type == ODM_RTL8192E) {
+		/* @dm->ant_div_type = CGCS_RX_HW_ANTDIV; */
+		/* @dm->ant_div_type = CG_TRX_HW_ANTDIV; */
+		/* @dm->ant_div_type = CG_TRX_SMART_ANTDIV; */
+
+		if (dm->ant_div_type != CGCS_RX_HW_ANTDIV &&
+		    dm->ant_div_type != CG_TRX_HW_ANTDIV &&
+		    dm->ant_div_type != CG_TRX_SMART_ANTDIV) {
+			PHYDM_DBG(dm, DBG_ANT_DIV,
+				  "[Return!!!]  8192E Not Supprrt This AntDiv type\n");
+			dm->support_ability &= ~(ODM_BB_ANT_DIV);
 			return;
 		}
 
-		if (p_dm->ant_div_type == CGCS_RX_HW_ANTDIV)
-			odm_rx_hw_ant_div_init_92e(p_dm);
-		else if (p_dm->ant_div_type == CG_TRX_HW_ANTDIV)
-			odm_trx_hw_ant_div_init_92e(p_dm);
+		if (dm->ant_div_type == CGCS_RX_HW_ANTDIV)
+			odm_rx_hw_ant_div_init_92e(dm);
+		else if (dm->ant_div_type == CG_TRX_HW_ANTDIV)
+			odm_trx_hw_ant_div_init_92e(dm);
 #if (defined(CONFIG_5G_CG_SMART_ANT_DIVERSITY)) || (defined(CONFIG_2G_CG_SMART_ANT_DIVERSITY))
-		else if (p_dm->ant_div_type == CG_TRX_SMART_ANTDIV)
-			odm_smart_hw_ant_div_init_92e(p_dm);
+		else if (dm->ant_div_type == CG_TRX_SMART_ANTDIV)
+			odm_smart_hw_ant_div_init_92e(dm);
+#endif
+	}
 #endif
 
+	/* @2 [--92F---] */
+#if (RTL8192F_SUPPORT == 1)
+	else if (dm->support_ic_type == ODM_RTL8192F) {
+	/* @dm->ant_div_type = CGCS_RX_HW_ANTDIV; */
+	/* @dm->ant_div_type = CG_TRX_HW_ANTDIV; */
+	/* @dm->ant_div_type = CG_TRX_SMART_ANTDIV; */
+
+	if (dm->ant_div_type != CGCS_RX_HW_ANTDIV) {
+		if (dm->ant_div_type != CG_TRX_HW_ANTDIV) {
+			PHYDM_DBG(dm, DBG_ANT_DIV,
+				  "[Return!!!]  8192F Not Supprrt This AntDiv type\n");
+			dm->support_ability &= ~(ODM_BB_ANT_DIV);
+			return;
+		}
+	}
+	if (dm->ant_div_type == CGCS_RX_HW_ANTDIV)
+		odm_rx_hw_ant_div_init_92f(dm);
+	else if (dm->ant_div_type == CG_TRX_HW_ANTDIV)
+	odm_trx_hw_ant_div_init_92f(dm);
 	}
 #endif
 
-	/* 2 [--8723B---] */
-#if (RTL8723B_SUPPORT == 1)
-	else if (p_dm->support_ic_type == ODM_RTL8723B) {
-		p_dm->ant_div_type = S0S1_SW_ANTDIV;
-		/* p_dm->ant_div_type = CG_TRX_HW_ANTDIV; */
+#if (RTL8197F_SUPPORT == 1)
+	else if (dm->support_ic_type == ODM_RTL8197F) {
+		dm->ant_div_type = CGCS_RX_HW_ANTDIV;
 
-		if (p_dm->ant_div_type != S0S1_SW_ANTDIV && p_dm->ant_div_type != CG_TRX_HW_ANTDIV) {
-			PHYDM_DBG(p_dm, DBG_ANT_DIV, ("[Return!!!] 8723B  Not Supprrt This AntDiv type\n"));
-			p_dm->support_ability &= ~(ODM_BB_ANT_DIV);
+		if (dm->ant_div_type != CGCS_RX_HW_ANTDIV) {
+			PHYDM_DBG(dm, DBG_ANT_DIV,
+				  "[Return!!!]  8197F Not Supprrt This AntDiv type\n");
+			dm->support_ability &= ~(ODM_BB_ANT_DIV);
+			return;
+		}
+		phydm_rx_hw_ant_div_init_97f(dm);
+	}
+#endif
+/* @2 [--8723B---] */
+#if (RTL8723B_SUPPORT == 1)
+	else if (dm->support_ic_type == ODM_RTL8723B) {
+		dm->ant_div_type = S0S1_SW_ANTDIV;
+		/* @dm->ant_div_type = CG_TRX_HW_ANTDIV; */
+
+		if (dm->ant_div_type != S0S1_SW_ANTDIV &&
+		    dm->ant_div_type != CG_TRX_HW_ANTDIV) {
+			PHYDM_DBG(dm, DBG_ANT_DIV,
+				  "[Return!!!] 8723B  Not Supprrt This AntDiv type\n");
+			dm->support_ability &= ~(ODM_BB_ANT_DIV);
 			return;
 		}
 
-		if (p_dm->ant_div_type == S0S1_SW_ANTDIV)
-			odm_s0s1_sw_ant_div_init_8723b(p_dm);
-		else if (p_dm->ant_div_type == CG_TRX_HW_ANTDIV)
-			odm_trx_hw_ant_div_init_8723b(p_dm);
+		if (dm->ant_div_type == S0S1_SW_ANTDIV)
+			odm_s0s1_sw_ant_div_init_8723b(dm);
+		else if (dm->ant_div_type == CG_TRX_HW_ANTDIV)
+			odm_trx_hw_ant_div_init_8723b(dm);
 	}
 #endif
-	/*2 [--8723D---]*/
+/*@2 [--8723D---]*/
 #if (RTL8723D_SUPPORT == 1)
-	else if (p_dm->support_ic_type == ODM_RTL8723D) {
-		if (p_dm_fat_table->p_default_s0_s1 == NULL) {
-			p_dm_fat_table->default_s0_s1 = 1;
-			p_dm_fat_table->p_default_s0_s1 = &(p_dm_fat_table->default_s0_s1);
+	else if (dm->support_ic_type == ODM_RTL8723D) {
+		if (fat_tab->p_default_s0_s1 == NULL) {
+			fat_tab->default_s0_s1 = 1;
+			fat_tab->p_default_s0_s1 = &fat_tab->default_s0_s1;
 		}
-		PHYDM_DBG(p_dm, DBG_ANT_DIV, ("default_s0_s1 = %d\n", *p_dm_fat_table->p_default_s0_s1));
+		PHYDM_DBG(dm, DBG_ANT_DIV, "default_s0_s1 = %d\n",
+			  *fat_tab->p_default_s0_s1);
 
-		if (*(p_dm_fat_table->p_default_s0_s1) == true)
-			odm_update_rx_idle_ant(p_dm, MAIN_ANT);
+		if (*fat_tab->p_default_s0_s1 == true)
+			odm_update_rx_idle_ant(dm, MAIN_ANT);
 		else
-			odm_update_rx_idle_ant(p_dm, AUX_ANT);
+			odm_update_rx_idle_ant(dm, AUX_ANT);
 
-		if (p_dm->ant_div_type == S0S1_TRX_HW_ANTDIV)
-			odm_trx_hw_ant_div_init_8723d(p_dm);
+		if (dm->ant_div_type == S0S1_TRX_HW_ANTDIV)
+			odm_trx_hw_ant_div_init_8723d(dm);
+		else if (dm->ant_div_type == S0S1_SW_ANTDIV)
+			odm_s0s1_sw_ant_div_init_8723d(dm);
 		else {
-			PHYDM_DBG(p_dm, DBG_ANT_DIV, ("[Return!!!] 8723D  Not Supprrt This AntDiv type\n"));
-			p_dm->support_ability &= ~(ODM_BB_ANT_DIV);
+			PHYDM_DBG(dm, DBG_ANT_DIV,
+				"[Return!!!] 8723D  Not Supprrt This AntDiv type\n");
+			dm->support_ability &= ~(ODM_BB_ANT_DIV);
 			return;
 		}
-
 	}
 #endif
-	/* 2 [--8811A 8821A---] */
+#if (RTL8721D_SUPPORT == 1)
+	else if (dm->support_ic_type == ODM_RTL8721D) {
+		/* @dm->ant_div_type = CG_TRX_HW_ANTDIV; */
+
+		if (dm->ant_div_type != CG_TRX_HW_ANTDIV) {
+			PHYDM_DBG(dm, DBG_ANT_DIV,
+				  "[Return!!!]  8721D Not Supprrt This AntDiv type\n");
+			dm->support_ability &= ~(ODM_BB_ANT_DIV);
+			return;
+		}
+		if (dm->ant_div_type == CG_TRX_HW_ANTDIV)
+			odm_trx_hw_ant_div_init_8721d(dm);
+	}
+#endif
+/* @2 [--8811A 8821A---] */
 #if (RTL8821A_SUPPORT == 1)
-	else if (p_dm->support_ic_type == ODM_RTL8821) {
-		#ifdef CONFIG_HL_SMART_ANTENNA_TYPE1
-		p_dm->ant_div_type = HL_SW_SMART_ANT_TYPE1;
-
-		if (p_dm->ant_div_type == HL_SW_SMART_ANT_TYPE1) {
+	else if (dm->support_ic_type == ODM_RTL8821) {
+#ifdef CONFIG_HL_SMART_ANTENNA_TYPE1
+		dm->ant_div_type = HL_SW_SMART_ANT_TYPE1;
 
-			odm_trx_hw_ant_div_init_8821a(p_dm);
-			phydm_hl_smart_ant_type1_init_8821a(p_dm);
+		if (dm->ant_div_type == HL_SW_SMART_ANT_TYPE1) {
+			odm_trx_hw_ant_div_init_8821a(dm);
+			phydm_hl_smart_ant_type1_init_8821a(dm);
 		} else
-		#endif
+#endif
 		{
-			#ifdef ODM_CONFIG_BT_COEXIST
-			p_dm->ant_div_type = S0S1_SW_ANTDIV;
-			#else
-			p_dm->ant_div_type = CG_TRX_HW_ANTDIV;
-			#endif
+#ifdef ODM_CONFIG_BT_COEXIST
+			dm->ant_div_type = S0S1_SW_ANTDIV;
+#else
+			dm->ant_div_type = CG_TRX_HW_ANTDIV;
+#endif
 
-			if (p_dm->ant_div_type != CG_TRX_HW_ANTDIV && p_dm->ant_div_type != S0S1_SW_ANTDIV) {
-				PHYDM_DBG(p_dm, DBG_ANT_DIV, ("[Return!!!] 8821A & 8811A  Not Supprrt This AntDiv type\n"));
-				p_dm->support_ability &= ~(ODM_BB_ANT_DIV);
+			if (dm->ant_div_type != CG_TRX_HW_ANTDIV &&
+			    dm->ant_div_type != S0S1_SW_ANTDIV) {
+				PHYDM_DBG(dm, DBG_ANT_DIV,
+					  "[Return!!!] 8821A & 8811A  Not Supprrt This AntDiv type\n");
+				dm->support_ability &= ~(ODM_BB_ANT_DIV);
 				return;
 			}
-			if (p_dm->ant_div_type == CG_TRX_HW_ANTDIV)
-				odm_trx_hw_ant_div_init_8821a(p_dm);
-			else if (p_dm->ant_div_type == S0S1_SW_ANTDIV)
-				odm_s0s1_sw_ant_div_init_8821a(p_dm);
+			if (dm->ant_div_type == CG_TRX_HW_ANTDIV)
+				odm_trx_hw_ant_div_init_8821a(dm);
+			else if (dm->ant_div_type == S0S1_SW_ANTDIV)
+				odm_s0s1_sw_ant_div_init_8821a(dm);
 		}
 	}
 #endif
 
-	/* 2 [--8821C---] */
+/* @2 [--8821C---] */
 #if (RTL8821C_SUPPORT == 1)
-	else if (p_dm->support_ic_type == ODM_RTL8821C) {
-		p_dm->ant_div_type = S0S1_SW_ANTDIV;
-		if (p_dm->ant_div_type != S0S1_SW_ANTDIV) {
-			PHYDM_DBG(p_dm, DBG_ANT_DIV, ("[Return!!!] 8821C  Not Supprrt This AntDiv type\n"));
-			p_dm->support_ability &= ~(ODM_BB_ANT_DIV);
+	else if (dm->support_ic_type == ODM_RTL8821C) {
+		dm->ant_div_type = S0S1_SW_ANTDIV;
+		if (dm->ant_div_type != S0S1_SW_ANTDIV) {
+			PHYDM_DBG(dm, DBG_ANT_DIV,
+				  "[Return!!!] 8821C  Not Supprrt This AntDiv type\n");
+			dm->support_ability &= ~(ODM_BB_ANT_DIV);
 			return;
 		}
-		phydm_s0s1_sw_ant_div_init_8821c(p_dm);
-		odm_trx_hw_ant_div_init_8821c(p_dm);
+		phydm_s0s1_sw_ant_div_init_8821c(dm);
+		odm_trx_hw_ant_div_init_8821c(dm);
 	}
 #endif
 
-	/* 2 [--8881A---] */
+/* @2 [--8881A---] */
 #if (RTL8881A_SUPPORT == 1)
-	else if (p_dm->support_ic_type == ODM_RTL8881A) {
-		/* p_dm->ant_div_type = CGCS_RX_HW_ANTDIV; */
-		/* p_dm->ant_div_type = CG_TRX_HW_ANTDIV; */
+	else if (dm->support_ic_type == ODM_RTL8881A) {
+		/* @dm->ant_div_type = CGCS_RX_HW_ANTDIV; */
+		/* @dm->ant_div_type = CG_TRX_HW_ANTDIV; */
 
-		if (p_dm->ant_div_type == CG_TRX_HW_ANTDIV) {
-
-			odm_trx_hw_ant_div_init_8881a(p_dm);
-			/**/
+		if (dm->ant_div_type == CG_TRX_HW_ANTDIV) {
+			odm_trx_hw_ant_div_init_8881a(dm);
 		} else {
-
-			PHYDM_DBG(p_dm, DBG_ANT_DIV, ("[Return!!!] 8881A  Not Supprrt This AntDiv type\n"));
-			p_dm->support_ability &= ~(ODM_BB_ANT_DIV);
+			PHYDM_DBG(dm, DBG_ANT_DIV,
+				  "[Return!!!] 8881A  Not Supprrt This AntDiv type\n");
+			dm->support_ability &= ~(ODM_BB_ANT_DIV);
 			return;
 		}
 
-		odm_trx_hw_ant_div_init_8881a(p_dm);
+		odm_trx_hw_ant_div_init_8881a(dm);
 	}
 #endif
 
-	/* 2 [--8812---] */
+/* @2 [--8812---] */
 #if (RTL8812A_SUPPORT == 1)
-	else if (p_dm->support_ic_type == ODM_RTL8812) {
-		/* p_dm->ant_div_type = CG_TRX_HW_ANTDIV; */
+	else if (dm->support_ic_type == ODM_RTL8812) {
+		/* @dm->ant_div_type = CG_TRX_HW_ANTDIV; */
 
-		if (p_dm->ant_div_type != CG_TRX_HW_ANTDIV) {
-			PHYDM_DBG(p_dm, DBG_ANT_DIV, ("[Return!!!] 8812A  Not Supprrt This AntDiv type\n"));
-			p_dm->support_ability &= ~(ODM_BB_ANT_DIV);
+		if (dm->ant_div_type != CG_TRX_HW_ANTDIV) {
+			PHYDM_DBG(dm, DBG_ANT_DIV,
+				  "[Return!!!] 8812A  Not Supprrt This AntDiv type\n");
+			dm->support_ability &= ~(ODM_BB_ANT_DIV);
 			return;
 		}
-		odm_trx_hw_ant_div_init_8812a(p_dm);
+		odm_trx_hw_ant_div_init_8812a(dm);
 	}
 #endif
 
-	/*[--8188F---]*/
+/*@[--8188F---]*/
 #if (RTL8188F_SUPPORT == 1)
-	else if (p_dm->support_ic_type == ODM_RTL8188F) {
-
-		p_dm->ant_div_type = S0S1_SW_ANTDIV;
-		odm_s0s1_sw_ant_div_init_8188f(p_dm);
+	else if (dm->support_ic_type == ODM_RTL8188F) {
+		dm->ant_div_type = S0S1_SW_ANTDIV;
+		odm_s0s1_sw_ant_div_init_8188f(dm);
 	}
 #endif
 
-	/*[--8822B---]*/
+/*@[--8822B---]*/
 #if (RTL8822B_SUPPORT == 1)
-	else if (p_dm->support_ic_type == ODM_RTL8822B) {
-		#ifdef CONFIG_HL_SMART_ANTENNA_TYPE2
-		p_dm->ant_div_type = HL_SW_SMART_ANT_TYPE2;
+	else if (dm->support_ic_type == ODM_RTL8822B) {
+		dm->ant_div_type = CG_TRX_HW_ANTDIV;
 
-		if (p_dm->ant_div_type == HL_SW_SMART_ANT_TYPE2)
-			phydm_hl_smart_ant_type2_init_8822b(p_dm);
-		#endif
+		if (dm->ant_div_type != CG_TRX_HW_ANTDIV) {
+			PHYDM_DBG(dm, DBG_ANT_DIV,
+				  "[Return!!!]  8822B Not Supprrt This AntDiv type\n");
+			dm->support_ability &= ~(ODM_BB_ANT_DIV);
+			return;
+		}
+		phydm_trx_hw_ant_div_init_22b(dm);
+#ifdef CONFIG_HL_SMART_ANTENNA_TYPE2
+		dm->ant_div_type = HL_SW_SMART_ANT_TYPE2;
+
+		if (dm->ant_div_type == HL_SW_SMART_ANT_TYPE2)
+			phydm_hl_smart_ant_type2_init_8822b(dm);
+#endif
 	}
 #endif
 
-	/*
-	PHYDM_DBG(p_dm, DBG_ANT_DIV, ("*** support_ic_type=[%lu]\n",p_dm->support_ic_type));
-	PHYDM_DBG(p_dm, DBG_ANT_DIV, ("*** AntDiv support_ability=[%lu]\n",(p_dm->support_ability & ODM_BB_ANT_DIV)>>6));
-	PHYDM_DBG(p_dm, DBG_ANT_DIV, ("*** AntDiv type=[%d]\n",p_dm->ant_div_type));
-	*/
+/*@PHYDM_DBG(dm, DBG_ANT_DIV, "*** support_ic_type=[%lu]\n",*/
+/*dm->support_ic_type);*/
+/*PHYDM_DBG(dm, DBG_ANT_DIV, "*** AntDiv support_ability=[%lu]\n",*/
+/*	  (dm->support_ability & ODM_BB_ANT_DIV)>>6);*/
+/*PHYDM_DBG(dm, DBG_ANT_DIV, "*** AntDiv type=[%d]\n",dm->ant_div_type);*/
 }
 
-void
-odm_ant_div(
-	void		*p_dm_void
-)
+void odm_ant_div(void *dm_void)
 {
-	struct PHY_DM_STRUCT		*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	struct _ADAPTER		*p_adapter	= p_dm->adapter;
-	struct phydm_fat_struct			*p_dm_fat_table = &p_dm->dm_fat_table;
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	void *adapter = dm->adapter;
+	struct phydm_fat_struct *fat_tab = &dm->dm_fat_table;
 #if (defined(CONFIG_HL_SMART_ANTENNA))
-	struct smt_ant_honbo			*pdm_sat_table = &(p_dm->dm_sat_table);
+	struct smt_ant_honbo *sat_tab = &dm->dm_sat_table;
 #endif
 
 #ifdef ODM_EVM_ENHANCE_ANTDIV
 
-	if (p_dm->is_linked) {
-		PHYDM_DBG(p_dm, DBG_ANT_DIV, ("tp_active_occur=((%d)), EVM_method_enable=((%d))\n",
-		p_dm->tp_active_occur, p_dm_fat_table->EVM_method_enable));
-
-		if ((p_dm->tp_active_occur == 1) && (p_dm_fat_table->EVM_method_enable == 1)) {
+	if (dm->is_linked) {
+		PHYDM_DBG(dm, DBG_ANT_DIV,
+			  "tp_active_occur=((%d)), evm_method_enable=((%d))\n",
+			  dm->tp_active_occur, fat_tab->evm_method_enable);
 
-			p_dm_fat_table->idx_ant_div_counter_5g = p_dm->antdiv_period;
-			p_dm_fat_table->idx_ant_div_counter_2g = p_dm->antdiv_period;
+		if (dm->tp_active_occur == 1 &&
+		    fat_tab->evm_method_enable == 1) {
+			fat_tab->idx_ant_div_counter_5g = dm->antdiv_period;
+			fat_tab->idx_ant_div_counter_2g = dm->antdiv_period;
 		}
 	}
 #endif
 
-	if (*p_dm->p_band_type == ODM_BAND_5G) {
-		if (p_dm_fat_table->idx_ant_div_counter_5g <  p_dm->antdiv_period) {
-			p_dm_fat_table->idx_ant_div_counter_5g++;
+	if (*dm->band_type == ODM_BAND_5G) {
+		if (fat_tab->idx_ant_div_counter_5g < dm->antdiv_period) {
+			fat_tab->idx_ant_div_counter_5g++;
 			return;
 		} else
-			p_dm_fat_table->idx_ant_div_counter_5g = 0;
-	} else	if (*p_dm->p_band_type == ODM_BAND_2_4G) {
-		if (p_dm_fat_table->idx_ant_div_counter_2g <  p_dm->antdiv_period) {
-			p_dm_fat_table->idx_ant_div_counter_2g++;
+			fat_tab->idx_ant_div_counter_5g = 0;
+	} else if (*dm->band_type == ODM_BAND_2_4G) {
+		if (fat_tab->idx_ant_div_counter_2g < dm->antdiv_period) {
+			fat_tab->idx_ant_div_counter_2g++;
 			return;
 		} else
-			p_dm_fat_table->idx_ant_div_counter_2g = 0;
+			fat_tab->idx_ant_div_counter_2g = 0;
 	}
 
-	/* ---------- */
+/* @---------- */
 
-	/* ---------- */
+/* @---------- */
 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN || DM_ODM_SUPPORT_TYPE == ODM_CE)
 
-	if (p_dm_fat_table->enable_ctrl_frame_antdiv) {
-
-		if ((p_dm->data_frame_num <= 10) && (p_dm->is_linked))
-			p_dm_fat_table->use_ctrl_frame_antdiv = 1;
+	if (fat_tab->enable_ctrl_frame_antdiv) {
+		if (dm->data_frame_num <= 10 && dm->is_linked)
+			fat_tab->use_ctrl_frame_antdiv = 1;
 		else
-			p_dm_fat_table->use_ctrl_frame_antdiv = 0;
+			fat_tab->use_ctrl_frame_antdiv = 0;
 
-		PHYDM_DBG(p_dm, DBG_ANT_DIV, ("use_ctrl_frame_antdiv = (( %d )), data_frame_num = (( %d ))\n", p_dm_fat_table->use_ctrl_frame_antdiv, p_dm->data_frame_num));
-		p_dm->data_frame_num = 0;
+		PHYDM_DBG(dm, DBG_ANT_DIV,
+			  "use_ctrl_frame_antdiv = (( %d )), data_frame_num = (( %d ))\n",
+			  fat_tab->use_ctrl_frame_antdiv, dm->data_frame_num);
+		dm->data_frame_num = 0;
 	}
 
-	#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
-	if (p_adapter->MgntInfo.AntennaTest)
-		return;
-	#endif
-
 	{
-#if (BEAMFORMING_SUPPORT == 1)
-
-		enum beamforming_cap		beamform_cap = phydm_get_beamform_cap(p_dm);
-
-		PHYDM_DBG(p_dm, DBG_ANT_DIV, ("is_bt_continuous_turn = ((%d))\n", p_dm->is_bt_continuous_turn));
-		PHYDM_DBG(p_dm, DBG_ANT_DIV, ("[ AntDiv Beam Cap ]   cap= ((%d))\n", beamform_cap));
-	if (!p_dm->is_bt_continuous_turn) {
-			if ((beamform_cap & BEAMFORMEE_CAP) && (!(*p_dm_fat_table->is_no_csi_feedback))) { /* BFmee On  &&   Div On->Div Off */
-				PHYDM_DBG(p_dm, DBG_ANT_DIV, ("[ AntDiv : OFF ]   BFmee ==1; cap= ((%d))\n", beamform_cap));
-				PHYDM_DBG(p_dm, DBG_ANT_DIV, ("[ AntDiv BF]   is_no_csi_feedback= ((%d))\n", *(p_dm_fat_table->is_no_csi_feedback)));
-				if (p_dm_fat_table->fix_ant_bfee == 0) {
-					odm_ant_div_on_off(p_dm, ANTDIV_OFF);
-					p_dm_fat_table->fix_ant_bfee = 1;
+#ifdef PHYDM_BEAMFORMING_SUPPORT
+
+		enum beamforming_cap beamform_cap = phydm_get_beamform_cap(dm);
+		PHYDM_DBG(dm, DBG_ANT_DIV, "is_bt_continuous_turn = ((%d))\n",
+			  dm->is_bt_continuous_turn);
+		PHYDM_DBG(dm, DBG_ANT_DIV,
+			  "[ AntDiv Beam Cap ]   cap= ((%d))\n", beamform_cap);
+		if (!dm->is_bt_continuous_turn) {
+			if ((beamform_cap & BEAMFORMEE_CAP) &&
+			    (!(*fat_tab->is_no_csi_feedback))) {
+			    /* @BFmee On  &&   Div On->Div Off */
+				PHYDM_DBG(dm, DBG_ANT_DIV,
+					  "[ AntDiv : OFF ]   BFmee ==1; cap= ((%d))\n",
+					  beamform_cap);
+				PHYDM_DBG(dm, DBG_ANT_DIV,
+					  "[ AntDiv BF]   is_no_csi_feedback= ((%d))\n",
+					  *(fat_tab->is_no_csi_feedback));
+				if (fat_tab->fix_ant_bfee == 0) {
+					odm_ant_div_on_off(dm, ANTDIV_OFF,
+							   ANT_PATH_A);
+					fat_tab->fix_ant_bfee = 1;
 				}
 				return;
-			} else { /* BFmee Off   &&   Div Off->Div On */
-				if ((p_dm_fat_table->fix_ant_bfee == 1)  &&  p_dm->is_linked) {
-					PHYDM_DBG(p_dm, DBG_ANT_DIV, ("[ AntDiv : ON ]   BFmee ==0; cap=((%d))\n", beamform_cap));
-					PHYDM_DBG(p_dm, DBG_ANT_DIV, ("[ AntDiv BF]   is_no_csi_feedback= ((%d))\n", *(p_dm_fat_table->is_no_csi_feedback)));
-					if (p_dm->ant_div_type != S0S1_SW_ANTDIV)
-						odm_ant_div_on_off(p_dm, ANTDIV_ON);
-
-					p_dm_fat_table->fix_ant_bfee = 0;
+			} else { /* @BFmee Off   &&   Div Off->Div On */
+				if (fat_tab->fix_ant_bfee == 1 &&
+				    dm->is_linked) {
+					PHYDM_DBG(dm, DBG_ANT_DIV,
+						  "[ AntDiv : ON ]   BFmee ==0; cap=((%d))\n",
+						  beamform_cap);
+					PHYDM_DBG(dm, DBG_ANT_DIV,
+						  "[ AntDiv BF]   is_no_csi_feedback= ((%d))\n",
+						  *fat_tab->is_no_csi_feedback);
+					if (dm->ant_div_type != S0S1_SW_ANTDIV)
+						odm_ant_div_on_off(dm, ANTDIV_ON
+								   , ANT_PATH_A)
+								   ;
+					fat_tab->fix_ant_bfee = 0;
 				}
 			}
-	}else {
-		odm_ant_div_on_off(p_dm, ANTDIV_ON);
-	}
+		} else {
+			if (fat_tab->div_path_type == ANT_PATH_A)
+				odm_ant_div_on_off(dm, ANTDIV_ON, ANT_PATH_A);
+			else if (fat_tab->div_path_type == ANT_PATH_B)
+				odm_ant_div_on_off(dm, ANTDIV_ON, ANT_PATH_B);
+			else if (fat_tab->div_path_type == ANT_PATH_AB)
+				odm_ant_div_on_off(dm, ANTDIV_ON, ANT_PATH_AB);
+		}
 #endif
 	}
 #elif (DM_ODM_SUPPORT_TYPE == ODM_AP)
-	/* ----------just for fool proof */
+	/* @----------just for fool proof */
 
-	if (p_dm->antdiv_rssi)
-		p_dm->debug_components |= DBG_ANT_DIV;
+	if (dm->antdiv_rssi)
+		dm->debug_components |= DBG_ANT_DIV;
 	else
-		p_dm->debug_components &= ~DBG_ANT_DIV;
+		dm->debug_components &= ~DBG_ANT_DIV;
 
-	if (p_dm_fat_table->ant_div_2g_5g == ODM_ANTDIV_2G) {
-		/* PHYDM_DBG(p_dm, DBG_ANT_DIV,("[ 2G AntDiv Running ]\n")); */
-		if (!(p_dm->support_ic_type & ODM_ANTDIV_2G_SUPPORT_IC))
+	if (fat_tab->ant_div_2g_5g == ODM_ANTDIV_2G) {
+#if 0
+		/* PHYDM_DBG(dm, DBG_ANT_DIV,"[ 2G AntDiv Running ]\n"); */
+#endif
+		if (!(dm->support_ic_type & ODM_ANTDIV_2G_SUPPORT_IC))
 			return;
-	} else if (p_dm_fat_table->ant_div_2g_5g == ODM_ANTDIV_5G) {
-		/* PHYDM_DBG(p_dm, DBG_ANT_DIV,("[ 5G AntDiv Running ]\n")); */
-		if (!(p_dm->support_ic_type & ODM_ANTDIV_5G_SUPPORT_IC))
+	} else if (fat_tab->ant_div_2g_5g == ODM_ANTDIV_5G) {
+#if 0
+		/* PHYDM_DBG(dm, DBG_ANT_DIV,"[ 5G AntDiv Running ]\n"); */
+#endif
+		if (!(dm->support_ic_type & ODM_ANTDIV_5G_SUPPORT_IC))
 			return;
 	}
-	/* else 	if(p_dm_fat_table->ant_div_2g_5g == (ODM_ANTDIV_2G|ODM_ANTDIV_5G)) */
-	/* { */
-	/* PHYDM_DBG(p_dm, DBG_ANT_DIV,("[ 2G & 5G AntDiv Running ]\n")); */
-	/* } */
+#if 0
+/* @else 	if(fat_tab->ant_div_2g_5g == (ODM_ANTDIV_2G|ODM_ANTDIV_5G)) */
+/* @{ */
+/* PHYDM_DBG(dm, DBG_ANT_DIV,"[ 2G & 5G AntDiv Running ]\n"); */
+/* @} */
+#endif
 #endif
 
-	/* ---------- */
+	/* @---------- */
 
-	if (p_dm->antdiv_select == 1)
-		p_dm->ant_type = ODM_FIX_MAIN_ANT;
-	else if (p_dm->antdiv_select == 2)
-		p_dm->ant_type = ODM_FIX_AUX_ANT;
-	else { /* if (p_dm->antdiv_select==0) */
-		p_dm->ant_type = ODM_AUTO_ANT;
+	if (dm->antdiv_select == 1)
+		dm->ant_type = ODM_FIX_MAIN_ANT;
+	else if (dm->antdiv_select == 2)
+		dm->ant_type = ODM_FIX_AUX_ANT;
+	else { /* @if (dm->antdiv_select==0) */
+		dm->ant_type = ODM_AUTO_ANT;
 
-		#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
+#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
 		/*Stop Antenna diversity for CMW500 testing case*/
-		if (p_dm->consecutive_idlel_time >= 10) {
-			p_dm->ant_type = ODM_FIX_MAIN_ANT;
-			PHYDM_DBG(p_dm, DBG_ANT_DIV, ("[AntDiv: OFF] No TP case, consecutive_idlel_time=((%d))\n", p_dm->consecutive_idlel_time));
+		if (dm->consecutive_idlel_time >= 10) {
+			dm->ant_type = ODM_FIX_MAIN_ANT;
+			PHYDM_DBG(dm, DBG_ANT_DIV,
+				  "[AntDiv: OFF] No TP case, consecutive_idlel_time=((%d))\n",
+				  dm->consecutive_idlel_time);
 		}
-		#endif
+#endif
 	}
 
-	/* PHYDM_DBG(p_dm, DBG_ANT_DIV,("ant_type= (( %d )) , pre_ant_type= (( %d ))\n",p_dm->ant_type,p_dm->pre_ant_type)); */
+#if 0
+	/* PHYDM_DBG(dm, DBG_ANT_DIV,"ant_type= (%d), pre_ant_type= (%d)\n",*/
+	/*dm->ant_type,dm->pre_ant_type); */
+#endif
 
-	if (p_dm->ant_type != ODM_AUTO_ANT) {
-		PHYDM_DBG(p_dm, DBG_ANT_DIV, ("Fix Antenna at (( %s ))\n", (p_dm->ant_type == ODM_FIX_MAIN_ANT) ? "MAIN" : "AUX"));
+	if (dm->ant_type != ODM_AUTO_ANT) {
+		PHYDM_DBG(dm, DBG_ANT_DIV, "Fix Antenna at (( %s ))\n",
+			  (dm->ant_type == ODM_FIX_MAIN_ANT) ? "MAIN" : "AUX");
 
-		if (p_dm->ant_type != p_dm->pre_ant_type) {
-			odm_ant_div_on_off(p_dm, ANTDIV_OFF);
-			odm_tx_by_tx_desc_or_reg(p_dm, TX_BY_REG);
+		if (dm->ant_type != dm->pre_ant_type) {
+			odm_ant_div_on_off(dm, ANTDIV_OFF, ANT_PATH_A);
+			odm_tx_by_tx_desc_or_reg(dm, TX_BY_REG);
 
-			if (p_dm->ant_type == ODM_FIX_MAIN_ANT)
-				odm_update_rx_idle_ant(p_dm, MAIN_ANT);
-			else if (p_dm->ant_type == ODM_FIX_AUX_ANT)
-				odm_update_rx_idle_ant(p_dm, AUX_ANT);
+			if (dm->ant_type == ODM_FIX_MAIN_ANT)
+				odm_update_rx_idle_ant(dm, MAIN_ANT);
+			else if (dm->ant_type == ODM_FIX_AUX_ANT)
+				odm_update_rx_idle_ant(dm, AUX_ANT);
 		}
-		p_dm->pre_ant_type = p_dm->ant_type;
+		dm->pre_ant_type = dm->ant_type;
 		return;
 	} else {
-		if (p_dm->ant_type != p_dm->pre_ant_type) {
-			odm_ant_div_on_off(p_dm, ANTDIV_ON);
-			odm_tx_by_tx_desc_or_reg(p_dm, TX_BY_DESC);
+		if (dm->ant_type != dm->pre_ant_type) {
+			odm_ant_div_on_off(dm, ANTDIV_ON, ANT_PATH_A);
+			odm_tx_by_tx_desc_or_reg(dm, TX_BY_DESC);
+		}
+		dm->pre_ant_type = dm->ant_type;
+	}
+#if (defined(CONFIG_2T4R_ANTENNA))
+	if (dm->ant_type2 != ODM_AUTO_ANT) {
+		PHYDM_DBG(dm, DBG_ANT_DIV, "PathB Fix Ant at (( %s ))\n",
+			  (dm->ant_type2 == ODM_FIX_MAIN_ANT) ? "MAIN" : "AUX");
+
+		if (dm->ant_type2 != dm->pre_ant_type2) {
+			odm_ant_div_on_off(dm, ANTDIV_OFF, ANT_PATH_B);
+			odm_tx_by_tx_desc_or_reg(dm, TX_BY_REG);
+
+			if (dm->ant_type2 == ODM_FIX_MAIN_ANT)
+				phydm_update_rx_idle_ant_pathb(dm, MAIN_ANT);
+			else if (dm->ant_type2 == ODM_FIX_AUX_ANT)
+				phydm_update_rx_idle_ant_pathb(dm, AUX_ANT);
 		}
-		p_dm->pre_ant_type = p_dm->ant_type;
+		dm->pre_ant_type2 = dm->ant_type2;
+		return;
+	}
+	if (dm->ant_type2 != dm->pre_ant_type2) {
+		odm_ant_div_on_off(dm, ANTDIV_ON, ANT_PATH_B);
+		odm_tx_by_tx_desc_or_reg(dm, TX_BY_DESC);
 	}
+	dm->pre_ant_type2 = dm->ant_type2;
 
+#endif
 
-	/* 3 ----------------------------------------------------------------------------------------------------------- */
-	/* 2 [--88E---] */
-	if (p_dm->support_ic_type == ODM_RTL8188E) {
+	/* @3 ----------------------------------------------- */
+	/* @2 [--88E---] */
+	if (dm->support_ic_type == ODM_RTL8188E) {
 #if (RTL8188E_SUPPORT == 1)
-		if (p_dm->ant_div_type == CG_TRX_HW_ANTDIV || p_dm->ant_div_type == CGCS_RX_HW_ANTDIV)
-			odm_hw_ant_div(p_dm);
-
-#if (defined(CONFIG_5G_CG_SMART_ANT_DIVERSITY)) || (defined(CONFIG_2G_CG_SMART_ANT_DIVERSITY))
-		else if (p_dm->ant_div_type == CG_TRX_SMART_ANTDIV)
-			odm_fast_ant_training(p_dm);
+		if (dm->ant_div_type == CG_TRX_HW_ANTDIV ||
+		    dm->ant_div_type == CGCS_RX_HW_ANTDIV)
+			odm_hw_ant_div(dm);
+
+#if (defined(CONFIG_5G_CG_SMART_ANT_DIVERSITY)) ||\
+	(defined(CONFIG_2G_CG_SMART_ANT_DIVERSITY))
+		else if (dm->ant_div_type == CG_TRX_SMART_ANTDIV)
+			odm_fast_ant_training(dm);
 #endif
 
 #endif
-
 	}
-	/* 2 [--92E---] */
+/* @2 [--92E---] */
 #if (RTL8192E_SUPPORT == 1)
-	else if (p_dm->support_ic_type == ODM_RTL8192E) {
-		if (p_dm->ant_div_type == CGCS_RX_HW_ANTDIV || p_dm->ant_div_type == CG_TRX_HW_ANTDIV)
-			odm_hw_ant_div(p_dm);
-
-#if (defined(CONFIG_5G_CG_SMART_ANT_DIVERSITY)) || (defined(CONFIG_2G_CG_SMART_ANT_DIVERSITY))
-		else if (p_dm->ant_div_type == CG_TRX_SMART_ANTDIV)
-			odm_fast_ant_training(p_dm);
+	else if (dm->support_ic_type == ODM_RTL8192E) {
+		if (dm->ant_div_type == CGCS_RX_HW_ANTDIV ||
+		    dm->ant_div_type == CG_TRX_HW_ANTDIV)
+			odm_hw_ant_div(dm);
+
+#if (defined(CONFIG_5G_CG_SMART_ANT_DIVERSITY)) ||\
+	(defined(CONFIG_2G_CG_SMART_ANT_DIVERSITY))
+		else if (dm->ant_div_type == CG_TRX_SMART_ANTDIV)
+			odm_fast_ant_training(dm);
 #endif
-
+	}
+#endif
+/* @2 [--97F---] */
+#if (RTL8197F_SUPPORT == 1)
+	else if (dm->support_ic_type == ODM_RTL8197F) {
+		if (dm->ant_div_type == CGCS_RX_HW_ANTDIV)
+			odm_hw_ant_div(dm);
 	}
 #endif
 
 #if (RTL8723B_SUPPORT == 1)
-	/* 2 [--8723B---] */
-	else if (p_dm->support_ic_type == ODM_RTL8723B) {
-		if (phydm_is_bt_enable_8723b(p_dm)) {
-			PHYDM_DBG(p_dm, DBG_ANT_DIV, ("[BT is enable!!!]\n"));
-			if (p_dm_fat_table->is_become_linked == true) {
-				PHYDM_DBG(p_dm, DBG_ANT_DIV, ("Set REG 948[9:6]=0x0\n"));
-				if (p_dm->support_ic_type == ODM_RTL8723B)
-					odm_set_bb_reg(p_dm, 0x948, BIT(9) | BIT(8) | BIT(7) | BIT(6), 0x0);
-
-				p_dm_fat_table->is_become_linked = false;
+	/* @2 [--8723B---] */
+	else if (dm->support_ic_type == ODM_RTL8723B) {
+		if (phydm_is_bt_enable_8723b(dm)) {
+			PHYDM_DBG(dm, DBG_ANT_DIV, "[BT is enable!!!]\n");
+			if (fat_tab->is_become_linked == true) {
+				PHYDM_DBG(dm, DBG_ANT_DIV,
+					  "Set REG 948[9:6]=0x0\n");
+				if (dm->support_ic_type == ODM_RTL8723B)
+					odm_set_bb_reg(dm, R_0x948, 0x3c0, 0x0)
+						       ;
+
+				fat_tab->is_become_linked = false;
 			}
 		} else {
-			if (p_dm->ant_div_type == S0S1_SW_ANTDIV) {
-
+			if (dm->ant_div_type == S0S1_SW_ANTDIV) {
 #ifdef CONFIG_S0S1_SW_ANTENNA_DIVERSITY
-				odm_s0s1_sw_ant_div(p_dm, SWAW_STEP_PEEK);
+				odm_s0s1_sw_ant_div(dm, SWAW_STEP_PEEK);
 #endif
-			} else if (p_dm->ant_div_type == CG_TRX_HW_ANTDIV)
-				odm_hw_ant_div(p_dm);
+			} else if (dm->ant_div_type == CG_TRX_HW_ANTDIV)
+				odm_hw_ant_div(dm);
 		}
 	}
 #endif
-	/*8723D*/
+/*@8723D*/
 #if (RTL8723D_SUPPORT == 1)
-	else if (p_dm->support_ic_type == ODM_RTL8723D) {
-
-		odm_hw_ant_div(p_dm);
-		/**/
+	else if (dm->support_ic_type == ODM_RTL8723D) {
+		if (dm->ant_div_type == S0S1_SW_ANTDIV) {
+#ifdef CONFIG_S0S1_SW_ANTENNA_DIVERSITY
+			if (dm->antdiv_counter ==
+				CONFIG_ANTDIV_PERIOD) {
+				odm_s0s1_sw_ant_div(dm, SWAW_STEP_PEEK);
+				dm->antdiv_counter--;
+			} else {
+				dm->antdiv_counter--;
+			}
+			if (dm->antdiv_counter == 0)
+				dm->antdiv_counter = CONFIG_ANTDIV_PERIOD;
+#endif
+		} else if (dm->ant_div_type == CG_TRX_HW_ANTDIV) {
+			odm_hw_ant_div(dm);
+		}
 	}
 #endif
-
-	/* 2 [--8821A---] */
+#if (RTL8721D_SUPPORT == 1)
+	else if (dm->support_ic_type == ODM_RTL8721D) {
+		if (dm->ant_div_type == CG_TRX_HW_ANTDIV) {
+			odm_hw_ant_div(dm);
+		}
+	}
+#endif
+/* @2 [--8821A---] */
 #if (RTL8821A_SUPPORT == 1)
-	else if (p_dm->support_ic_type == ODM_RTL8821) {
-		#ifdef CONFIG_HL_SMART_ANTENNA_TYPE1
-		if (p_dm->ant_div_type == HL_SW_SMART_ANT_TYPE1) {
-
-			if (pdm_sat_table->fix_beam_pattern_en != 0) {
-				PHYDM_DBG(p_dm, DBG_ANT_DIV, (" [ SmartAnt ] Fix SmartAnt Pattern = 0x%x\n", pdm_sat_table->fix_beam_pattern_codeword));
+	else if (dm->support_ic_type == ODM_RTL8821) {
+#ifdef CONFIG_HL_SMART_ANTENNA_TYPE1
+		if (dm->ant_div_type == HL_SW_SMART_ANT_TYPE1) {
+			if (sat_tab->fix_beam_pattern_en != 0) {
+				PHYDM_DBG(dm, DBG_ANT_DIV,
+					  " [ SmartAnt ] Fix SmartAnt Pattern = 0x%x\n",
+					  sat_tab->fix_beam_pattern_codeword);
 				/*return;*/
 			} else {
-				/*PHYDM_DBG(p_dm, DBG_ANT_DIV, ("[ SmartAnt ] ant_div_type = HL_SW_SMART_ANT_TYPE1\n"));*/
-				odm_fast_ant_training_hl_smart_antenna_type1(p_dm);
+#if 0
+/*PHYDM_DBG(dm,DBG_ANT_DIV,"[SmartAnt] ant_div_type=HL_SW_SMART_ANT_TYPE1\n");*/
+#endif
+				odm_fast_ant_training_hl_smart_antenna_type1(dm);
 			}
 
 		} else
-		#endif
+#endif
 		{
-
-			#ifdef ODM_CONFIG_BT_COEXIST
-			if (!p_dm->bt_info_table.is_bt_enabled) { /*BT disabled*/
-				if (p_dm->ant_div_type == S0S1_SW_ANTDIV) {
-					p_dm->ant_div_type = CG_TRX_HW_ANTDIV;
-					PHYDM_DBG(p_dm, DBG_ANT_DIV, (" [S0S1_SW_ANTDIV]  ->  [CG_TRX_HW_ANTDIV]\n"));
-					/*odm_set_bb_reg(p_dm, 0x8D4, BIT24, 1); */
-					if (p_dm_fat_table->is_become_linked == true)
-						odm_ant_div_on_off(p_dm, ANTDIV_ON);
+#ifdef ODM_CONFIG_BT_COEXIST
+			if (!dm->bt_info_table.is_bt_enabled) { /*@BT disabled*/
+				if (dm->ant_div_type == S0S1_SW_ANTDIV) {
+					dm->ant_div_type = CG_TRX_HW_ANTDIV;
+					PHYDM_DBG(dm, DBG_ANT_DIV,
+						  " [S0S1_SW_ANTDIV]  ->  [CG_TRX_HW_ANTDIV]\n");
+#if 0
+				/*odm_set_bb_reg(dm, R_0x8d4, BIT24, 1); */
+#endif
+					if (fat_tab->is_become_linked == true)
+						odm_ant_div_on_off(dm,
+								   ANTDIV_ON,
+								   ANT_PATH_A);
 				}
 
-			} else { /*BT enabled*/
+			} else { /*@BT enabled*/
 
-				if (p_dm->ant_div_type == CG_TRX_HW_ANTDIV) {
-					p_dm->ant_div_type = S0S1_SW_ANTDIV;
-					PHYDM_DBG(p_dm, DBG_ANT_DIV, (" [CG_TRX_HW_ANTDIV]  ->  [S0S1_SW_ANTDIV]\n"));
-					/*odm_set_bb_reg(p_dm, 0x8D4, BIT24, 0);*/
-					odm_ant_div_on_off(p_dm, ANTDIV_OFF);
+				if (dm->ant_div_type == CG_TRX_HW_ANTDIV) {
+					dm->ant_div_type = S0S1_SW_ANTDIV;
+					PHYDM_DBG(dm, DBG_ANT_DIV,
+						  " [CG_TRX_HW_ANTDIV]  ->  [S0S1_SW_ANTDIV]\n");
+#if 0
+				/*odm_set_bb_reg(dm, R_0x8d4, BIT24, 0);*/
+#endif
+					odm_ant_div_on_off(dm, ANTDIV_OFF,
+							   ANT_PATH_A);
 				}
 			}
-			#endif
-
-			if (p_dm->ant_div_type == S0S1_SW_ANTDIV) {
+#endif
 
-				#ifdef CONFIG_S0S1_SW_ANTENNA_DIVERSITY
-				odm_s0s1_sw_ant_div(p_dm, SWAW_STEP_PEEK);
-				#endif
-			} else if (p_dm->ant_div_type == CG_TRX_HW_ANTDIV)
-				odm_hw_ant_div(p_dm);
+			if (dm->ant_div_type == S0S1_SW_ANTDIV) {
+#ifdef CONFIG_S0S1_SW_ANTENNA_DIVERSITY
+				odm_s0s1_sw_ant_div(dm, SWAW_STEP_PEEK);
+#endif
+			} else if (dm->ant_div_type == CG_TRX_HW_ANTDIV)
+				odm_hw_ant_div(dm);
 		}
 	}
 #endif
 
-	/* 2 [--8821C---] */
+/* @2 [--8821C---] */
 #if (RTL8821C_SUPPORT == 1)
-	else if (p_dm->support_ic_type == ODM_RTL8821C) {
-		if (!p_dm->is_bt_continuous_turn) {
-			p_dm->ant_div_type = S0S1_SW_ANTDIV;
-			ODM_RT_TRACE(p_dm, DBG_ANT_DIV, ODM_DBG_LOUD, ("is_bt_continuous_turn = ((%d))   ==> SW AntDiv\n", p_dm->is_bt_continuous_turn));
+	else if (dm->support_ic_type == ODM_RTL8821C) {
+		if (!dm->is_bt_continuous_turn) {
+			dm->ant_div_type = S0S1_SW_ANTDIV;
+			PHYDM_DBG(dm, DBG_ANT_DIV,
+				  "is_bt_continuous_turn = ((%d))   ==> SW AntDiv\n",
+				  dm->is_bt_continuous_turn);
 
 		} else {
-			p_dm->ant_div_type = CG_TRX_HW_ANTDIV;
-			ODM_RT_TRACE(p_dm, DBG_ANT_DIV, ODM_DBG_LOUD, ("is_bt_continuous_turn = ((%d))   ==> HW AntDiv\n", p_dm->is_bt_continuous_turn));
+			dm->ant_div_type = CG_TRX_HW_ANTDIV;
+			PHYDM_DBG(dm, DBG_ANT_DIV,
+				  "is_bt_continuous_turn = ((%d))   ==> HW AntDiv\n",
+				  dm->is_bt_continuous_turn);
+			odm_ant_div_on_off(dm, ANTDIV_ON, ANT_PATH_A);
 		}
 
-		if (p_dm->ant_div_type == S0S1_SW_ANTDIV) {
+		if (fat_tab->force_antdiv_type)
+			dm->ant_div_type = fat_tab->antdiv_type_dbg;
 
+		if (dm->ant_div_type == S0S1_SW_ANTDIV) {
 #ifdef CONFIG_S0S1_SW_ANTENNA_DIVERSITY
-			odm_s0s1_sw_ant_div(p_dm, SWAW_STEP_PEEK);
+			odm_s0s1_sw_ant_div(dm, SWAW_STEP_PEEK);
 #endif
-		} else if (p_dm->ant_div_type == CG_TRX_HW_ANTDIV)
-			odm_hw_ant_div(p_dm);
+		} else if (dm->ant_div_type == CG_TRX_HW_ANTDIV) {
+			odm_ant_div_on_off(dm, ANTDIV_ON, ANT_PATH_A);
+			odm_hw_ant_div(dm);
+		}
 	}
 #endif
 
-	/* 2 [--8881A---] */
+/* @2 [--8881A---] */
 #if (RTL8881A_SUPPORT == 1)
-	else if (p_dm->support_ic_type == ODM_RTL8881A)
-		odm_hw_ant_div(p_dm);
+	else if (dm->support_ic_type == ODM_RTL8881A)
+		odm_hw_ant_div(dm);
 #endif
 
-	/* 2 [--8812A---] */
+/* @2 [--8812A---] */
 #if (RTL8812A_SUPPORT == 1)
-	else if (p_dm->support_ic_type == ODM_RTL8812)
-		odm_hw_ant_div(p_dm);
+	else if (dm->support_ic_type == ODM_RTL8812)
+		odm_hw_ant_div(dm);
 #endif
 
 #if (RTL8188F_SUPPORT == 1)
-	/* [--8188F---]*/
-	else if (p_dm->support_ic_type == ODM_RTL8188F)	{
-
+	/* @[--8188F---]*/
+	else if (dm->support_ic_type == ODM_RTL8188F) {
 #ifdef CONFIG_S0S1_SW_ANTENNA_DIVERSITY
-		odm_s0s1_sw_ant_div(p_dm, SWAW_STEP_PEEK);
+		odm_s0s1_sw_ant_div(dm, SWAW_STEP_PEEK);
 #endif
 	}
 #endif
 
-	/* [--8822B---]*/
+/* @[--8822B---]*/
 #if (RTL8822B_SUPPORT == 1)
-	else if (p_dm->support_ic_type == ODM_RTL8822B) {
-		#ifdef CONFIG_HL_SMART_ANTENNA_TYPE2
-		if (p_dm->ant_div_type == HL_SW_SMART_ANT_TYPE2) {
-
-			if (pdm_sat_table->fix_beam_pattern_en != 0)
-				PHYDM_DBG(p_dm, DBG_ANT_DIV, (" [ SmartAnt ] Fix SmartAnt Pattern = 0x%x\n", pdm_sat_table->fix_beam_pattern_codeword));
+	else if (dm->support_ic_type == ODM_RTL8822B) {
+		if (dm->ant_div_type == CG_TRX_HW_ANTDIV)
+			odm_hw_ant_div(dm);
+#ifdef CONFIG_HL_SMART_ANTENNA_TYPE2
+		if (dm->ant_div_type == HL_SW_SMART_ANT_TYPE2) {
+			if (sat_tab->fix_beam_pattern_en != 0)
+				PHYDM_DBG(dm, DBG_ANT_DIV,
+					  " [ SmartAnt ] Fix SmartAnt Pattern = 0x%x\n",
+					  sat_tab->fix_beam_pattern_codeword);
 			else
-				phydm_fast_ant_training_hl_smart_antenna_type2(p_dm);
+				phydm_fast_ant_training_hl_smart_antenna_type2(dm);
 		}
-		#endif
+#endif
 	}
 #endif
-
-
 }
 
-
-void
-odm_antsel_statistics(
-	void			*p_dm_void,
-	void			*p_phy_info_void,
-	u8			antsel_tr_mux,
-	u32			mac_id,
-	u32			utility,
-	u8			method,
-	u8			is_cck_rate
-
-)
+void odm_antsel_statistics(void *dm_void, void *phy_info_void,
+			   u8 antsel_tr_mux, u32 mac_id, u32 utility, u8 method,
+			   u8 is_cck_rate)
 {
-	struct PHY_DM_STRUCT		*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	struct phydm_fat_struct	*p_dm_fat_table = &p_dm->dm_fat_table;
-	struct phydm_phyinfo_struct	*p_phy_info = (struct phydm_phyinfo_struct *)p_phy_info_void;
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct phydm_fat_struct *fat_tab = &dm->dm_fat_table;
+	struct phydm_phyinfo_struct *phy_info = NULL;
 
-	if (method == RSSI_METHOD) {
+	phy_info = (struct phydm_phyinfo_struct *)phy_info_void;
 
+	if (method == RSSI_METHOD) {
 		if (is_cck_rate) {
 			if (antsel_tr_mux == ANT1_2G) {
-				if (p_dm_fat_table->main_ant_sum_cck[mac_id] > 65435) /*to prevent u16 overflow, max(RSSI)=100, 65435+100 = 65535 (u16)*/
+	/*to prevent u16 overflow, max(RSSI)=100, 65435+100 = 65535 (u16)*/
+				if (fat_tab->main_sum_cck[mac_id] > 65435)
 					return;
 
-				p_dm_fat_table->main_ant_sum_cck[mac_id] += (u16)utility;
-				p_dm_fat_table->main_ant_cnt_cck[mac_id]++;
+				fat_tab->main_sum_cck[mac_id] += (u16)utility;
+				fat_tab->main_cnt_cck[mac_id]++;
 			} else {
-				if (p_dm_fat_table->aux_ant_sum_cck[mac_id] > 65435)
+				if (fat_tab->aux_sum_cck[mac_id] > 65435)
 					return;
 
-				p_dm_fat_table->aux_ant_sum_cck[mac_id] += (u16)utility;
-				p_dm_fat_table->aux_ant_cnt_cck[mac_id]++;
+				fat_tab->aux_sum_cck[mac_id] += (u16)utility;
+				fat_tab->aux_cnt_cck[mac_id]++;
 			}
 
 		} else { /*ofdm rate*/
 
 			if (antsel_tr_mux == ANT1_2G) {
-				if (p_dm_fat_table->main_ant_sum[mac_id] > 65435)
+				if (fat_tab->main_sum[mac_id] > 65435)
 					return;
 
-				p_dm_fat_table->main_ant_sum[mac_id] += (u16)utility;
-				p_dm_fat_table->main_ant_cnt[mac_id]++;
+				fat_tab->main_sum[mac_id] += (u16)utility;
+				fat_tab->main_cnt[mac_id]++;
 			} else {
-				if (p_dm_fat_table->aux_ant_sum[mac_id] > 65435)
+				if (fat_tab->aux_sum[mac_id] > 65435)
 					return;
 
-				p_dm_fat_table->aux_ant_sum[mac_id] += (u16)utility;
-				p_dm_fat_table->aux_ant_cnt[mac_id]++;
+				fat_tab->aux_sum[mac_id] += (u16)utility;
+				fat_tab->aux_cnt[mac_id]++;
 			}
 		}
 	}
 #ifdef ODM_EVM_ENHANCE_ANTDIV
 	else if (method == EVM_METHOD) {
-		if (p_dm->rate_ss == 1) {
-
-			if (antsel_tr_mux == ANT1_2G) {
-				p_dm_fat_table->main_ant_evm_sum[mac_id] += ((p_phy_info->rx_mimo_evm_dbm[0])<<5);
-				p_dm_fat_table->main_ant_evm_cnt[mac_id]++;
-			} else {
-				p_dm_fat_table->aux_ant_evm_sum[mac_id] += ((p_phy_info->rx_mimo_evm_dbm[0])<<5);
-				p_dm_fat_table->aux_ant_evm_cnt[mac_id]++;
-			}
-
-		} else {/*>= 2SS*/
-
-			if (antsel_tr_mux == ANT1_2G) {
-
-				p_dm_fat_table->main_ant_evm_2ss_sum[mac_id][0] += (p_phy_info->rx_mimo_evm_dbm[0]<<5);
-				p_dm_fat_table->main_ant_evm_2ss_sum[mac_id][1] += (p_phy_info->rx_mimo_evm_dbm[1]<<5);
-				p_dm_fat_table->main_ant_evm_2ss_cnt[mac_id]++;
-
-			} else {
-
-				p_dm_fat_table->aux_ant_evm_2ss_sum[mac_id][0] += (p_phy_info->rx_mimo_evm_dbm[0]<<5);
-				p_dm_fat_table->aux_ant_evm_2ss_sum[mac_id][1] += (p_phy_info->rx_mimo_evm_dbm[1]<<5);
-				p_dm_fat_table->aux_ant_evm_2ss_cnt[mac_id]++;
-			}
+		if (dm->rate_ss == 1) {
+			phydm_statistics_evm_1ss(dm, phy_info, antsel_tr_mux,
+						 mac_id, utility);
+		} else { /*@>= 2SS*/
+			phydm_statistics_evm_2ss(dm, phy_info, antsel_tr_mux,
+						 mac_id, utility);
 		}
 
 	} else if (method == CRC32_METHOD) {
-
 		if (antsel_tr_mux == ANT1_2G) {
-			p_dm_fat_table->main_crc32_ok_cnt += utility;
-			p_dm_fat_table->main_crc32_fail_cnt++;
+			fat_tab->main_crc32_ok_cnt += utility;
+			fat_tab->main_crc32_fail_cnt++;
 		} else {
-			p_dm_fat_table->aux_crc32_ok_cnt += utility;
-			p_dm_fat_table->aux_crc32_fail_cnt++;
+			fat_tab->aux_crc32_ok_cnt += utility;
+			fat_tab->aux_crc32_fail_cnt++;
 		}
 
 	} else if (method == TP_METHOD) {
-		if (((utility <= ODM_RATEMCS15) && (utility >= ODM_RATEMCS0)) &&
-			(p_dm_fat_table->fat_state_cnt <= p_dm->antdiv_tp_period)
-		) {
-
+		if ((utility <= ODM_RATEMCS15 && utility >= ODM_RATEMCS0) &&
+		    fat_tab->fat_state_cnt <= dm->antdiv_tp_period) {
 			if (antsel_tr_mux == ANT1_2G) {
-				p_dm_fat_table->antdiv_tp_main += (phy_rate_table[utility])<<5;
-				p_dm_fat_table->antdiv_tp_main_cnt++;
+				fat_tab->main_tp += (phy_rate_table[utility])
+						    << 5;
+				fat_tab->main_tp_cnt++;
 			} else {
-				p_dm_fat_table->antdiv_tp_aux += (phy_rate_table[utility])<<5;
-				p_dm_fat_table->antdiv_tp_aux_cnt++;
+				fat_tab->aux_tp += (phy_rate_table[utility])
+						   << 5;
+				fat_tab->aux_tp_cnt++;
 			}
 		}
 	}
 #endif
 }
 
-void
-odm_process_rssi_for_ant_div(
-	void			*p_dm_void,
-	void			*p_phy_info_void,
-	void			*p_pkt_info_void
-)
+void odm_process_rssi_smart(void *dm_void, void *phy_info_void,
+			    void *pkt_info_void, u8 rx_power_ant0)
 {
-	struct PHY_DM_STRUCT				*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	struct phydm_phyinfo_struct			*p_phy_info = (struct phydm_phyinfo_struct *)p_phy_info_void;
-	struct phydm_perpkt_info_struct				*p_pktinfo = (struct phydm_perpkt_info_struct *)p_pkt_info_void;
-	struct phydm_fat_struct		*p_dm_fat_table = &p_dm->dm_fat_table;
-#if (defined(CONFIG_HL_SMART_ANTENNA))
-	struct smt_ant_honbo	*pdm_sat_table = &(p_dm->dm_sat_table);
-	u32			beam_tmp;
-	u8			next_ant;
-	u8			train_pkt_number;
-#endif
-	u8			is_cck_rate = FALSE;
-	u8			rx_power_ant0 = p_phy_info->rx_mimo_signal_strength[0];
-	u8			rx_power_ant1 = p_phy_info->rx_mimo_signal_strength[1];
-	u8			rx_evm_ant0 = p_phy_info->rx_mimo_signal_quality[0];
-	u8			rx_evm_ant1 = p_phy_info->rx_mimo_signal_quality[1];
-	u8			rssi_avg;
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct phydm_phyinfo_struct *phy_info = NULL;
+	struct phydm_perpkt_info_struct *pktinfo = NULL;
+	struct phydm_fat_struct *fat_tab = &dm->dm_fat_table;
+
+	phy_info = (struct phydm_phyinfo_struct *)phy_info_void;
+	pktinfo = (struct phydm_perpkt_info_struct *)pkt_info_void;
+
+	if ((dm->support_ic_type & ODM_SMART_ANT_SUPPORT) &&
+	    pktinfo->is_packet_to_self &&
+	    fat_tab->fat_state == FAT_TRAINING_STATE) {
+	/* @(pktinfo->is_packet_match_bssid && (!pktinfo->is_packet_beacon)) */
+		u8 antsel_tr_mux;
+
+		antsel_tr_mux = (fat_tab->antsel_rx_keep_2 << 2) |
+				(fat_tab->antsel_rx_keep_1 << 1) |
+				fat_tab->antsel_rx_keep_0;
+		fat_tab->ant_sum_rssi[antsel_tr_mux] += rx_power_ant0;
+		fat_tab->ant_rssi_cnt[antsel_tr_mux]++;
+	}
+}
 
-	is_cck_rate = (p_pktinfo->data_rate <= ODM_RATE11M) ? true : false;
+void odm_process_rssi_normal(void *dm_void, void *phy_info_void,
+			     void *pkt_info_void, u8 rx_power_ant0)
+{
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct phydm_phyinfo_struct *phy_info = NULL;
+	struct phydm_perpkt_info_struct *pktinfo = NULL;
+	struct phydm_fat_struct *fat_tab = &dm->dm_fat_table;
+	u8 rx_evm_ant0, rx_evm_ant1;
+
+	phy_info = (struct phydm_phyinfo_struct *)phy_info_void;
+	pktinfo = (struct phydm_perpkt_info_struct *)pkt_info_void;
+	rx_evm_ant0 = phy_info->rx_mimo_signal_quality[0];
+	rx_evm_ant1 = phy_info->rx_mimo_signal_quality[1];
+
+	if ((dm->support_ic_type & ODM_ANTDIV_SUPPORT) &&
+	    (pktinfo->is_packet_to_self ||
+	    fat_tab->use_ctrl_frame_antdiv)) {
+		if (dm->ant_div_type == S0S1_SW_ANTDIV) {
+			if (pktinfo->is_cck_rate ||
+			    dm->support_ic_type == ODM_RTL8188F) {
+				boolean b_main;
+
+				b_main = (fat_tab->rx_idle_ant == MAIN_ANT);
+				fat_tab->antsel_rx_keep_0 = b_main ? ANT1_2G :
+							    ANT2_2G;
+			}
+
+			odm_antsel_statistics(dm, phy_info,
+					      fat_tab->antsel_rx_keep_0,
+					      pktinfo->station_id,
+					      rx_power_ant0, RSSI_METHOD,
+					      pktinfo->is_cck_rate);
+		} else {
+			odm_antsel_statistics(dm, phy_info,
+					      fat_tab->antsel_rx_keep_0,
+					      pktinfo->station_id,
+					      rx_power_ant0, RSSI_METHOD,
+					      pktinfo->is_cck_rate);
+
+			#ifdef ODM_EVM_ENHANCE_ANTDIV
+			if (!(dm->support_ic_type & ODM_EVM_ANTDIV_IC))
+				return;
+			if (pktinfo->is_cck_rate)
+				return;
+
+			odm_antsel_statistics(dm, phy_info,
+					      fat_tab->antsel_rx_keep_0,
+					      pktinfo->station_id,
+					      rx_evm_ant0, EVM_METHOD,
+					      pktinfo->is_cck_rate);
+			odm_antsel_statistics(dm, phy_info,
+					      fat_tab->antsel_rx_keep_0,
+					      pktinfo->station_id,
+					      rx_evm_ant0, TP_METHOD,
+					      pktinfo->is_cck_rate);
+
+			#endif
+		}
+	}
+}
 
-	if ((p_dm->support_ic_type & ODM_IC_2SS) && (!is_cck_rate)) {
+void odm_process_rssi_for_ant_div(void *dm_void, void *phy_info_void,
+				  void *pkt_info_void)
+{
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct phydm_phyinfo_struct *phy_info = NULL;
+	struct phydm_perpkt_info_struct *pktinfo = NULL;
+	struct phydm_fat_struct *fat_tab = &dm->dm_fat_table;
+#if (defined(CONFIG_HL_SMART_ANTENNA))
+	struct smt_ant_honbo *sat_tab = &dm->dm_sat_table;
+	u32 beam_tmp;
+	u8 next_ant;
+	u8 train_pkt_number;
+#endif
+	boolean b_main;
+	u8 rx_power_ant0, rx_power_ant1;
+	u8 rx_evm_ant0, rx_evm_ant1;
+	u8 rssi_avg;
+	u64 rssi_linear = 0;
+
+	phy_info = (struct phydm_phyinfo_struct *)phy_info_void;
+	pktinfo = (struct phydm_perpkt_info_struct *)pkt_info_void;
+	rx_power_ant0 = phy_info->rx_mimo_signal_strength[0];
+	rx_power_ant1 = phy_info->rx_mimo_signal_strength[1];
+	rx_evm_ant0 = phy_info->rx_mimo_signal_quality[0];
+	rx_evm_ant1 = phy_info->rx_mimo_signal_quality[1];
+
+	if ((dm->support_ic_type & ODM_IC_2SS) && !pktinfo->is_cck_rate) {
+		if (rx_power_ant1 < 100) {
+			rssi_linear = phydm_db_2_linear(rx_power_ant0) +
+				      phydm_db_2_linear(rx_power_ant1);
+			/* @Rounding and removing fractional bits */
+			rssi_linear = (rssi_linear +
+				       (1 << (FRAC_BITS - 1))) >> FRAC_BITS;
+			/* @Calculate average RSSI */
+			rssi_linear = DIVIDED_2(rssi_linear);
+			/* @averaged PWDB */
+			rssi_avg = (u8)odm_convert_to_db(rssi_linear);
+		}
 
-		if (rx_power_ant1 < 100)
-			rssi_avg = (u8)odm_convert_to_db((odm_convert_to_linear(rx_power_ant0) + odm_convert_to_linear(rx_power_ant1))>>1); /*averaged PWDB*/
-		
 	} else {
-		rx_power_ant0 = (u8)p_phy_info->rx_pwdb_all;
+		rx_power_ant0 = (u8)phy_info->rx_pwdb_all;
 		rssi_avg = rx_power_ant0;
 	}
-	
+
 #ifdef CONFIG_HL_SMART_ANTENNA_TYPE2
-	if ((p_dm->ant_div_type == HL_SW_SMART_ANT_TYPE2) && (p_dm_fat_table->fat_state == FAT_TRAINING_STATE))
-		phydm_process_rssi_for_hb_smtant_type2(p_dm, p_phy_info, p_pktinfo, rssi_avg);	/*for 8822B*/
+	if ((dm->ant_div_type == HL_SW_SMART_ANT_TYPE2) && (fat_tab->fat_state == FAT_TRAINING_STATE))
+		phydm_process_rssi_for_hb_smtant_type2(dm, phy_info, pktinfo, rssi_avg); /*@for 8822B*/
 	else
 #endif
 
 #ifdef CONFIG_HL_SMART_ANTENNA_TYPE1
 #ifdef CONFIG_FAT_PATCH
-	if ((p_dm->ant_div_type == HL_SW_SMART_ANT_TYPE1) && (p_dm_fat_table->fat_state == FAT_TRAINING_STATE)) {
-
-		/*[Beacon]*/
-		if (p_pktinfo->is_packet_beacon) {
-
-			pdm_sat_table->beacon_counter++;
-			PHYDM_DBG(p_dm, DBG_ANT_DIV, ("MatchBSSID_beacon_counter = ((%d))\n", pdm_sat_table->beacon_counter));
-
-			if (pdm_sat_table->beacon_counter >= pdm_sat_table->pre_beacon_counter + 2) {
-
-				if (pdm_sat_table->ant_num > 1) {
-					next_ant = (p_dm_fat_table->rx_idle_ant == MAIN_ANT) ? AUX_ANT : MAIN_ANT;
-					odm_update_rx_idle_ant(p_dm, next_ant);
+		if (dm->ant_div_type == HL_SW_SMART_ANT_TYPE1 && fat_tab->fat_state == FAT_TRAINING_STATE) {
+		/*@[Beacon]*/
+		if (pktinfo->is_packet_beacon) {
+			sat_tab->beacon_counter++;
+			PHYDM_DBG(dm, DBG_ANT_DIV,
+				  "MatchBSSID_beacon_counter = ((%d))\n",
+				  sat_tab->beacon_counter);
+
+			if (sat_tab->beacon_counter >= sat_tab->pre_beacon_counter + 2) {
+				if (sat_tab->ant_num > 1) {
+					next_ant = (fat_tab->rx_idle_ant == MAIN_ANT) ? AUX_ANT : MAIN_ANT;
+					odm_update_rx_idle_ant(dm, next_ant);
 				}
 
-				pdm_sat_table->update_beam_idx++;
+				sat_tab->update_beam_idx++;
 
-				PHYDM_DBG(p_dm, DBG_ANT_DIV, ("pre_beacon_counter = ((%d)), pkt_counter = ((%d)), update_beam_idx = ((%d))\n",
-					pdm_sat_table->pre_beacon_counter, pdm_sat_table->pkt_counter, pdm_sat_table->update_beam_idx));
+				PHYDM_DBG(dm, DBG_ANT_DIV,
+					  "pre_beacon_counter = ((%d)), pkt_counter = ((%d)), update_beam_idx = ((%d))\n",
+					  sat_tab->pre_beacon_counter,
+					  sat_tab->pkt_counter,
+					  sat_tab->update_beam_idx);
 
-				pdm_sat_table->pre_beacon_counter = pdm_sat_table->beacon_counter;
-				pdm_sat_table->pkt_counter = 0;
+				sat_tab->pre_beacon_counter = sat_tab->beacon_counter;
+				sat_tab->pkt_counter = 0;
 			}
 		}
-		/*[data]*/
-		else if (p_pktinfo->is_packet_to_self) {
-
-			if (pdm_sat_table->pkt_skip_statistic_en == 0) {
-				/*
-				PHYDM_DBG(p_dm, DBG_ANT_DIV, ("StaID[%d]:  antsel_pathA = ((%d)), hw_antsw_occur = ((%d)), Beam_num = ((%d)), RSSI = ((%d))\n",
-					p_pktinfo->station_id, p_dm_fat_table->antsel_rx_keep_0, p_dm_fat_table->hw_antsw_occur, pdm_sat_table->fast_training_beam_num, rx_power_ant0));
+		/*@[data]*/
+		else if (pktinfo->is_packet_to_self) {
+			if (sat_tab->pkt_skip_statistic_en == 0) {
+				/*@
+				PHYDM_DBG(dm, DBG_ANT_DIV, "StaID[%d]:  antsel_pathA = ((%d)), hw_antsw_occur = ((%d)), Beam_num = ((%d)), RSSI = ((%d))\n",
+					pktinfo->station_id, fat_tab->antsel_rx_keep_0, fat_tab->hw_antsw_occur, sat_tab->fast_training_beam_num, rx_power_ant0);
 				*/
-				PHYDM_DBG(p_dm, DBG_ANT_DIV, ("ID[%d][pkt_cnt = %d]: {ANT, Beam} = {%d, %d}, RSSI = ((%d))\n",
-					p_pktinfo->station_id, pdm_sat_table->pkt_counter, p_dm_fat_table->antsel_rx_keep_0, pdm_sat_table->fast_training_beam_num, rx_power_ant0));
+				PHYDM_DBG(dm, DBG_ANT_DIV,
+					  "ID[%d][pkt_cnt = %d]: {ANT, Beam} = {%d, %d}, RSSI = ((%d))\n",
+					  pktinfo->station_id,
+					  sat_tab->pkt_counter,
+					  fat_tab->antsel_rx_keep_0,
+					  sat_tab->fast_training_beam_num,
+					  rx_power_ant0);
+
+				sat_tab->pkt_rssi_sum[fat_tab->antsel_rx_keep_0][sat_tab->fast_training_beam_num] += rx_power_ant0;
+				sat_tab->pkt_rssi_cnt[fat_tab->antsel_rx_keep_0][sat_tab->fast_training_beam_num]++;
+				sat_tab->pkt_counter++;
 
-				pdm_sat_table->pkt_rssi_sum[p_dm_fat_table->antsel_rx_keep_0][pdm_sat_table->fast_training_beam_num] += rx_power_ant0;
-				pdm_sat_table->pkt_rssi_cnt[p_dm_fat_table->antsel_rx_keep_0][pdm_sat_table->fast_training_beam_num]++;
-				pdm_sat_table->pkt_counter++;
-
-				#if 1
-				train_pkt_number = pdm_sat_table->beam_train_cnt[p_dm_fat_table->rx_idle_ant - 1][pdm_sat_table->fast_training_beam_num];
-				#else
-				train_pkt_number =  pdm_sat_table->per_beam_training_pkt_num;
-				#endif
+#if 1
+				train_pkt_number = sat_tab->beam_train_cnt[fat_tab->rx_idle_ant - 1][sat_tab->fast_training_beam_num];
+#else
+				train_pkt_number = sat_tab->per_beam_training_pkt_num;
+#endif
 
 				/*Swich Antenna erery N pkts*/
-				if (pdm_sat_table->pkt_counter == train_pkt_number) {
-
-					if (pdm_sat_table->ant_num > 1) {
-
-						PHYDM_DBG(p_dm, DBG_ANT_DIV, ("packet enugh ((%d ))pkts ---> Switch antenna\n", train_pkt_number));
-						next_ant = (p_dm_fat_table->rx_idle_ant == MAIN_ANT) ? AUX_ANT : MAIN_ANT;
-						odm_update_rx_idle_ant(p_dm, next_ant);
+				if (sat_tab->pkt_counter == train_pkt_number) {
+					if (sat_tab->ant_num > 1) {
+						PHYDM_DBG(dm, DBG_ANT_DIV, "packet enugh ((%d ))pkts ---> Switch antenna\n", train_pkt_number);
+						next_ant = (fat_tab->rx_idle_ant == MAIN_ANT) ? AUX_ANT : MAIN_ANT;
+						odm_update_rx_idle_ant(dm, next_ant);
 					}
 
-					pdm_sat_table->update_beam_idx++;
-					PHYDM_DBG(p_dm, DBG_ANT_DIV, ("pre_beacon_counter = ((%d)), update_beam_idx_counter = ((%d))\n",
-						pdm_sat_table->pre_beacon_counter, pdm_sat_table->update_beam_idx));
+					sat_tab->update_beam_idx++;
+					PHYDM_DBG(dm, DBG_ANT_DIV, "pre_beacon_counter = ((%d)), update_beam_idx_counter = ((%d))\n",
+						  sat_tab->pre_beacon_counter, sat_tab->update_beam_idx);
 
-					pdm_sat_table->pre_beacon_counter = pdm_sat_table->beacon_counter;
-					pdm_sat_table->pkt_counter = 0;
+					sat_tab->pre_beacon_counter = sat_tab->beacon_counter;
+					sat_tab->pkt_counter = 0;
 				}
 			}
 		}
 
-		/*Swich Beam after switch "pdm_sat_table->ant_num" antennas*/
-		if (pdm_sat_table->update_beam_idx == pdm_sat_table->ant_num) {
-
-			pdm_sat_table->update_beam_idx = 0;
-			pdm_sat_table->pkt_counter = 0;
-			beam_tmp = pdm_sat_table->fast_training_beam_num;
-
-			if (pdm_sat_table->fast_training_beam_num >= (pdm_sat_table->beam_patten_num_each_ant - 1)) {
-
-				p_dm_fat_table->fat_state = FAT_DECISION_STATE;
+		/*Swich Beam after switch "sat_tab->ant_num" antennas*/
+		if (sat_tab->update_beam_idx == sat_tab->ant_num) {
+			sat_tab->update_beam_idx = 0;
+			sat_tab->pkt_counter = 0;
+			beam_tmp = sat_tab->fast_training_beam_num;
 
-				#if DEV_BUS_TYPE == RT_PCI_INTERFACE
-				odm_fast_ant_training_hl_smart_antenna_type1(p_dm);
-				#else
-				odm_schedule_work_item(&pdm_sat_table->hl_smart_antenna_decision_workitem);
-				#endif
+			if (sat_tab->fast_training_beam_num >= (sat_tab->beam_patten_num_each_ant - 1)) {
+				fat_tab->fat_state = FAT_DECISION_STATE;
 
+#if DEV_BUS_TYPE == RT_PCI_INTERFACE
+				if (dm->support_interface == ODM_ITRF_PCIE)
+					odm_fast_ant_training_hl_smart_antenna_type1(dm);
+#endif
+#if DEV_BUS_TYPE == RT_USB_INTERFACE || DEV_BUS_TYPE == RT_SDIO_INTERFACE
+				if (dm->support_interface == ODM_ITRF_USB || dm->support_interface == ODM_ITRF_SDIO)
+					odm_schedule_work_item(&sat_tab->hl_smart_antenna_decision_workitem);
+#endif
 
 			} else {
-				pdm_sat_table->fast_training_beam_num++;
-				PHYDM_DBG(p_dm, DBG_ANT_DIV, ("Update Beam_num (( %d )) -> (( %d ))\n", beam_tmp, pdm_sat_table->fast_training_beam_num));
-				phydm_set_all_ant_same_beam_num(p_dm);
-
-				p_dm_fat_table->fat_state = FAT_TRAINING_STATE;
+				sat_tab->fast_training_beam_num++;
+				PHYDM_DBG(dm, DBG_ANT_DIV,
+					  "Update Beam_num (( %d )) -> (( %d ))\n",
+					  beam_tmp,
+					  sat_tab->fast_training_beam_num);
+				phydm_set_all_ant_same_beam_num(dm);
+
+				fat_tab->fat_state = FAT_TRAINING_STATE;
 			}
 		}
-
 	}
 #else
 
-	if (p_dm->ant_div_type == HL_SW_SMART_ANT_TYPE1) {
-		if ((p_dm->support_ic_type & ODM_HL_SMART_ANT_TYPE1_SUPPORT) &&
-		    (p_pktinfo->is_packet_to_self)   &&
-		    (p_dm_fat_table->fat_state == FAT_TRAINING_STATE)
-		   ) {
-
-			if (pdm_sat_table->pkt_skip_statistic_en == 0) {
-				/*
-				PHYDM_DBG(p_dm, DBG_ANT_DIV, ("StaID[%d]:  antsel_pathA = ((%d)), hw_antsw_occur = ((%d)), Beam_num = ((%d)), RSSI = ((%d))\n",
-					p_pktinfo->station_id, p_dm_fat_table->antsel_rx_keep_0, p_dm_fat_table->hw_antsw_occur, pdm_sat_table->fast_training_beam_num, rx_power_ant0));
+		if (dm->ant_div_type == HL_SW_SMART_ANT_TYPE1) {
+		if ((dm->support_ic_type & ODM_HL_SMART_ANT_TYPE1_SUPPORT) &&
+		    pktinfo->is_packet_to_self &&
+		    fat_tab->fat_state == FAT_TRAINING_STATE) {
+			if (sat_tab->pkt_skip_statistic_en == 0) {
+				/*@
+				PHYDM_DBG(dm, DBG_ANT_DIV, "StaID[%d]:  antsel_pathA = ((%d)), hw_antsw_occur = ((%d)), Beam_num = ((%d)), RSSI = ((%d))\n",
+					pktinfo->station_id, fat_tab->antsel_rx_keep_0, fat_tab->hw_antsw_occur, sat_tab->fast_training_beam_num, rx_power_ant0);
 				*/
-				PHYDM_DBG(p_dm, DBG_ANT_DIV, ("StaID[%d]:  antsel_pathA = ((%d)), is_packet_to_self = ((%d)), Beam_num = ((%d)), RSSI = ((%d))\n",
-					p_pktinfo->station_id, p_dm_fat_table->antsel_rx_keep_0, p_pktinfo->is_packet_to_self, pdm_sat_table->fast_training_beam_num, rx_power_ant0));
-
-
-				pdm_sat_table->pkt_rssi_sum[p_dm_fat_table->antsel_rx_keep_0][pdm_sat_table->fast_training_beam_num] += rx_power_ant0;
-				pdm_sat_table->pkt_rssi_cnt[p_dm_fat_table->antsel_rx_keep_0][pdm_sat_table->fast_training_beam_num]++;
-				pdm_sat_table->pkt_counter++;
+				PHYDM_DBG(dm, DBG_ANT_DIV,
+					  "StaID[%d]:  antsel_pathA = ((%d)), is_packet_to_self = ((%d)), Beam_num = ((%d)), RSSI = ((%d))\n",
+					  pktinfo->station_id,
+					  fat_tab->antsel_rx_keep_0,
+					  pktinfo->is_packet_to_self,
+					  sat_tab->fast_training_beam_num,
+					  rx_power_ant0);
+
+				sat_tab->pkt_rssi_sum[fat_tab->antsel_rx_keep_0][sat_tab->fast_training_beam_num] += rx_power_ant0;
+				sat_tab->pkt_rssi_cnt[fat_tab->antsel_rx_keep_0][sat_tab->fast_training_beam_num]++;
+				sat_tab->pkt_counter++;
 
 				/*swich beam every N pkt*/
-				if ((pdm_sat_table->pkt_counter) >= (pdm_sat_table->per_beam_training_pkt_num)) {
-
-					pdm_sat_table->pkt_counter = 0;
-					beam_tmp = pdm_sat_table->fast_training_beam_num;
-
-					if (pdm_sat_table->fast_training_beam_num >= (pdm_sat_table->beam_patten_num_each_ant - 1)) {
+				if (sat_tab->pkt_counter >= sat_tab->per_beam_training_pkt_num) {
+					sat_tab->pkt_counter = 0;
+					beam_tmp = sat_tab->fast_training_beam_num;
 
-						p_dm_fat_table->fat_state = FAT_DECISION_STATE;
-
-						#if DEV_BUS_TYPE == RT_PCI_INTERFACE
-						odm_fast_ant_training_hl_smart_antenna_type1(p_dm);
-						#else
-						odm_schedule_work_item(&pdm_sat_table->hl_smart_antenna_decision_workitem);
-						#endif
+					if (sat_tab->fast_training_beam_num >= (sat_tab->beam_patten_num_each_ant - 1)) {
+						fat_tab->fat_state = FAT_DECISION_STATE;
 
+#if DEV_BUS_TYPE == RT_PCI_INTERFACE
+						if (dm->support_interface == ODM_ITRF_PCIE)
+							odm_fast_ant_training_hl_smart_antenna_type1(dm);
+#endif
+#if DEV_BUS_TYPE == RT_USB_INTERFACE || DEV_BUS_TYPE == RT_SDIO_INTERFACE
+						if (dm->support_interface == ODM_ITRF_USB || dm->support_interface == ODM_ITRF_SDIO)
+							odm_schedule_work_item(&sat_tab->hl_smart_antenna_decision_workitem);
+#endif
 
 					} else {
-						pdm_sat_table->fast_training_beam_num++;
-						phydm_set_all_ant_same_beam_num(p_dm);
+						sat_tab->fast_training_beam_num++;
+						phydm_set_all_ant_same_beam_num(dm);
 
-						p_dm_fat_table->fat_state = FAT_TRAINING_STATE;
-						PHYDM_DBG(p_dm, DBG_ANT_DIV, ("Update  Beam_num (( %d )) -> (( %d ))\n", beam_tmp, pdm_sat_table->fast_training_beam_num));
+						fat_tab->fat_state = FAT_TRAINING_STATE;
+						PHYDM_DBG(dm, DBG_ANT_DIV, "Update  Beam_num (( %d )) -> (( %d ))\n", beam_tmp, sat_tab->fast_training_beam_num);
 					}
 				}
 			}
@@ -4286,460 +5303,595 @@ odm_process_rssi_for_ant_div(
 #endif
 	else
 #endif
-		if (p_dm->ant_div_type == CG_TRX_SMART_ANTDIV) {
-			if ((p_dm->support_ic_type & ODM_SMART_ANT_SUPPORT) && (p_pktinfo->is_packet_to_self)   && (p_dm_fat_table->fat_state == FAT_TRAINING_STATE)) { /* (p_pktinfo->is_packet_match_bssid && (!p_pktinfo->is_packet_beacon)) */
-				u8	antsel_tr_mux;
-				antsel_tr_mux = (p_dm_fat_table->antsel_rx_keep_2 << 2) | (p_dm_fat_table->antsel_rx_keep_1 << 1) | p_dm_fat_table->antsel_rx_keep_0;
-				p_dm_fat_table->ant_sum_rssi[antsel_tr_mux] += rx_power_ant0;
-				p_dm_fat_table->ant_rssi_cnt[antsel_tr_mux]++;
-			}
-		} else { /* ant_div_type != CG_TRX_SMART_ANTDIV */
-			if ((p_dm->support_ic_type & ODM_ANTDIV_SUPPORT) && (p_pktinfo->is_packet_to_self || p_dm_fat_table->use_ctrl_frame_antdiv)) {
-
-				if (p_dm->ant_div_type == S0S1_SW_ANTDIV) {
-
-					if (is_cck_rate || (p_dm->support_ic_type == ODM_RTL8188F))
-						p_dm_fat_table->antsel_rx_keep_0 = (p_dm_fat_table->rx_idle_ant == MAIN_ANT) ? ANT1_2G : ANT2_2G;
-
-						odm_antsel_statistics(p_dm, p_phy_info, p_dm_fat_table->antsel_rx_keep_0, p_pktinfo->station_id, rx_power_ant0, RSSI_METHOD, is_cck_rate);
-
-				} else {
-					
-					odm_antsel_statistics(p_dm, p_phy_info, p_dm_fat_table->antsel_rx_keep_0, p_pktinfo->station_id, rx_power_ant0, RSSI_METHOD, is_cck_rate);
-
-					#ifdef ODM_EVM_ENHANCE_ANTDIV
-					if (p_dm->support_ic_type == ODM_RTL8192E) {
-						if (!is_cck_rate) {
-							odm_antsel_statistics(p_dm, p_phy_info, p_dm_fat_table->antsel_rx_keep_0, p_pktinfo->station_id, rx_evm_ant0, EVM_METHOD, is_cck_rate);
-							odm_antsel_statistics(p_dm, p_phy_info, p_dm_fat_table->antsel_rx_keep_0, p_pktinfo->station_id, rx_evm_ant0, TP_METHOD, is_cck_rate);
-						}
-
-					}
-					#endif
-				}
-			}
+		if (dm->ant_div_type == CG_TRX_SMART_ANTDIV) {
+			odm_process_rssi_smart(dm, phy_info, pktinfo,
+					       rx_power_ant0);
+		} else { /* @ant_div_type != CG_TRX_SMART_ANTDIV */
+			odm_process_rssi_normal(dm, phy_info, pktinfo,
+						rx_power_ant0);
 		}
-	/* PHYDM_DBG(p_dm,DBG_ANT_DIV,("is_cck_rate=%d, PWDB_ALL=%d\n",is_cck_rate, p_phy_info->rx_pwdb_all)); */
-	/* PHYDM_DBG(p_dm,DBG_ANT_DIV,("antsel_tr_mux=3'b%d%d%d\n",p_dm_fat_table->antsel_rx_keep_2, p_dm_fat_table->antsel_rx_keep_1, p_dm_fat_table->antsel_rx_keep_0)); */
+#if 0
+/* PHYDM_DBG(dm,DBG_ANT_DIV,"is_cck_rate=%d, pwdb_all=%d\n",
+ *	     pktinfo->is_cck_rate, phy_info->rx_pwdb_all);
+ * PHYDM_DBG(dm,DBG_ANT_DIV,"antsel_tr_mux=3'b%d%d%d\n",
+ *	     fat_tab->antsel_rx_keep_2, fat_tab->antsel_rx_keep_1,
+ *	     fat_tab->antsel_rx_keep_0);
+ */
+#endif
 }
 
-#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_CE))
-void
-odm_set_tx_ant_by_tx_info(
-	void			*p_dm_void,
-	u8			*p_desc,
-	u8			mac_id
-
-)
+#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_CE | ODM_IOT))
+void odm_set_tx_ant_by_tx_info(void *dm_void, u8 *desc, u8 mac_id)
 {
-	struct PHY_DM_STRUCT		*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	struct phydm_fat_struct	*p_dm_fat_table = &p_dm->dm_fat_table;
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct phydm_fat_struct *fat_tab = &dm->dm_fat_table;
 
-	if (!(p_dm->support_ability & ODM_BB_ANT_DIV))
+	if (!(dm->support_ability & ODM_BB_ANT_DIV))
 		return;
 
-	if (p_dm->ant_div_type == CGCS_RX_HW_ANTDIV)
+	if (dm->ant_div_type == CGCS_RX_HW_ANTDIV)
 		return;
 
-
-	if (p_dm->support_ic_type == ODM_RTL8723B) {
-#if (RTL8723B_SUPPORT == 1)
-		SET_TX_DESC_ANTSEL_A_8723B(p_desc, p_dm_fat_table->antsel_a[mac_id]);
-		/*PHYDM_DBG(p_dm,DBG_ANT_DIV, ("[8723B] SetTxAntByTxInfo_WIN: mac_id=%d, antsel_tr_mux=3'b%d%d%d\n",
-			mac_id, p_dm_fat_table->antsel_c[mac_id], p_dm_fat_table->antsel_b[mac_id], p_dm_fat_table->antsel_a[mac_id]));*/
+	if (dm->support_ic_type == (ODM_RTL8723B | ODM_RTL8721D)) {
+#if (RTL8723B_SUPPORT == 1 || RTL8721D_SUPPORT == 1)
+		SET_TX_DESC_ANTSEL_A_8723B(desc, fat_tab->antsel_a[mac_id]);
+/*PHYDM_DBG(dm,DBG_ANT_DIV,
+ *	   "[8723B] SetTxAntByTxInfo_WIN: mac_id=%d, antsel_tr_mux=3'b%d%d%d\n",
+ *	    mac_id, fat_tab->antsel_c[mac_id], fat_tab->antsel_b[mac_id],
+ *	    fat_tab->antsel_a[mac_id]);
+ */
 #endif
-	} else if (p_dm->support_ic_type == ODM_RTL8821) {
+	} else if (dm->support_ic_type == ODM_RTL8821) {
 #if (RTL8821A_SUPPORT == 1)
-		SET_TX_DESC_ANTSEL_A_8812(p_desc, p_dm_fat_table->antsel_a[mac_id]);
-		/*PHYDM_DBG(p_dm,DBG_ANT_DIV, ("[8821A] SetTxAntByTxInfo_WIN: mac_id=%d, antsel_tr_mux=3'b%d%d%d\n",
-			mac_id, p_dm_fat_table->antsel_c[mac_id], p_dm_fat_table->antsel_b[mac_id], p_dm_fat_table->antsel_a[mac_id]));*/
+		SET_TX_DESC_ANTSEL_A_8812(desc, fat_tab->antsel_a[mac_id]);
+/*PHYDM_DBG(dm,DBG_ANT_DIV,
+ *	   "[8821A] SetTxAntByTxInfo_WIN: mac_id=%d, antsel_tr_mux=3'b%d%d%d\n",
+ *	    mac_id, fat_tab->antsel_c[mac_id], fat_tab->antsel_b[mac_id],
+ *	    fat_tab->antsel_a[mac_id]);
+ */
 #endif
-	} else if (p_dm->support_ic_type == ODM_RTL8188E) {
+	} else if (dm->support_ic_type == ODM_RTL8188E) {
 #if (RTL8188E_SUPPORT == 1)
-		SET_TX_DESC_ANTSEL_A_88E(p_desc, p_dm_fat_table->antsel_a[mac_id]);
-		SET_TX_DESC_ANTSEL_B_88E(p_desc, p_dm_fat_table->antsel_b[mac_id]);
-		SET_TX_DESC_ANTSEL_C_88E(p_desc, p_dm_fat_table->antsel_c[mac_id]);
-		/*PHYDM_DBG(p_dm,DBG_ANT_DIV, ("[8188E] SetTxAntByTxInfo_WIN: mac_id=%d, antsel_tr_mux=3'b%d%d%d\n",
-			mac_id, p_dm_fat_table->antsel_c[mac_id], p_dm_fat_table->antsel_b[mac_id], p_dm_fat_table->antsel_a[mac_id]));*/
+		SET_TX_DESC_ANTSEL_A_88E(desc, fat_tab->antsel_a[mac_id]);
+		SET_TX_DESC_ANTSEL_B_88E(desc, fat_tab->antsel_b[mac_id]);
+		SET_TX_DESC_ANTSEL_C_88E(desc, fat_tab->antsel_c[mac_id]);
+/*PHYDM_DBG(dm,DBG_ANT_DIV,
+ *	   "[8188E] SetTxAntByTxInfo_WIN: mac_id=%d, antsel_tr_mux=3'b%d%d%d\n",
+ *	    mac_id, fat_tab->antsel_c[mac_id], fat_tab->antsel_b[mac_id],
+ *	    fat_tab->antsel_a[mac_id]);
+ */
 #endif
-	} else if (p_dm->support_ic_type == ODM_RTL8821C) {
+	} else if (dm->support_ic_type == ODM_RTL8821C) {
 #if (RTL8821C_SUPPORT == 1)
-		SET_TX_DESC_ANTSEL_A_8821C(p_desc, p_dm_fat_table->antsel_a[mac_id]);
-		/*PHYDM_DBG(p_dm,DBG_ANT_DIV, ("[8821C] SetTxAntByTxInfo_WIN: mac_id=%d, antsel_tr_mux=3'b%d%d%d\n",
-			mac_id, p_dm_fat_table->antsel_c[mac_id], p_dm_fat_table->antsel_b[mac_id], p_dm_fat_table->antsel_a[mac_id]));*/
+		SET_TX_DESC_ANTSEL_A_8821C(desc, fat_tab->antsel_a[mac_id]);
+/*PHYDM_DBG(dm,DBG_ANT_DIV,
+ *	   "[8821C] SetTxAntByTxInfo_WIN: mac_id=%d, antsel_tr_mux=3'b%d%d%d\n",
+ *	    mac_id, fat_tab->antsel_c[mac_id], fat_tab->antsel_b[mac_id],
+ *	    fat_tab->antsel_a[mac_id]);
+ */
+#endif
+	} else if (dm->support_ic_type == ODM_RTL8822B) {
+#if (RTL8822B_SUPPORT == 1)
+		SET_TX_DESC_ANTSEL_A_8822B(desc, fat_tab->antsel_a[mac_id]);
 #endif
+
 	}
 }
 #elif (DM_ODM_SUPPORT_TYPE == ODM_AP)
 
-void
-odm_set_tx_ant_by_tx_info(
-	struct	rtl8192cd_priv		*priv,
-	struct	tx_desc	*pdesc,
-	unsigned short			aid
-)
+void odm_set_tx_ant_by_tx_info(
+	struct rtl8192cd_priv *priv,
+	struct tx_desc *pdesc,
+	unsigned short aid)
 {
-	struct PHY_DM_STRUCT	*p_dm = GET_PDM_ODM(priv);/*&(priv->pshare->_dmODM);*/
-	struct phydm_fat_struct		*p_dm_fat_table = &(p_dm->dm_fat_table);
+	struct dm_struct *dm = GET_PDM_ODM(priv); /*@&(priv->pshare->_dmODM);*/
+	struct phydm_fat_struct *fat_tab = &dm->dm_fat_table;
 
-	if (!(p_dm->support_ability & ODM_BB_ANT_DIV))
+	if (!(dm->support_ability & ODM_BB_ANT_DIV))
 		return;
 
-	if (p_dm->ant_div_type == CGCS_RX_HW_ANTDIV)
+	if (dm->ant_div_type == CGCS_RX_HW_ANTDIV)
 		return;
 
-	if (p_dm->support_ic_type == ODM_RTL8881A) {
+	if (dm->support_ic_type == ODM_RTL8881A) {
+#if 0
 		/*panic_printk("[%s] [%d]   ******ODM_SetTxAntByTxInfo_8881E******\n",__FUNCTION__,__LINE__);	*/
+#endif
 		pdesc->Dword6 &= set_desc(~(BIT(18) | BIT(17) | BIT(16)));
-		pdesc->Dword6 |= set_desc(p_dm_fat_table->antsel_a[aid] << 16);
-	} else if (p_dm->support_ic_type == ODM_RTL8192E) {
+		pdesc->Dword6 |= set_desc(fat_tab->antsel_a[aid] << 16);
+	} else if (dm->support_ic_type == ODM_RTL8192E) {
+#if 0
 		/*panic_printk("[%s] [%d]   ******ODM_SetTxAntByTxInfo_8192E******\n",__FUNCTION__,__LINE__);	*/
+#endif
 		pdesc->Dword6 &= set_desc(~(BIT(18) | BIT(17) | BIT(16)));
-		pdesc->Dword6 |= set_desc(p_dm_fat_table->antsel_a[aid] << 16);
-	} else if (p_dm->support_ic_type == ODM_RTL8188E) {
+		pdesc->Dword6 |= set_desc(fat_tab->antsel_a[aid] << 16);
+	} else if (dm->support_ic_type == ODM_RTL8197F) {
+#if 0
+		/*panic_printk("[%s] [%d]   ******ODM_SetTxAntByTxInfo_8192E******\n",__FUNCTION__,__LINE__);	*/
+#endif
+		pdesc->Dword6 &= set_desc(~(BIT(17) | BIT(16)));
+		pdesc->Dword6 |= set_desc(fat_tab->antsel_a[aid] << 16);
+	} else if (dm->support_ic_type == ODM_RTL8822B) {
+		pdesc->Dword6 &= set_desc(~(BIT(17) | BIT(16)));
+		pdesc->Dword6 |= set_desc(fat_tab->antsel_a[aid] << 16);
+	} else if (dm->support_ic_type == ODM_RTL8188E) {
+#if 0
 		/*panic_printk("[%s] [%d]   ******ODM_SetTxAntByTxInfo_8188E******\n",__FUNCTION__,__LINE__);*/
+#endif
 		pdesc->Dword2 &= set_desc(~BIT(24));
 		pdesc->Dword2 &= set_desc(~BIT(25));
 		pdesc->Dword7 &= set_desc(~BIT(29));
 
-		pdesc->Dword2 |= set_desc(p_dm_fat_table->antsel_a[aid] << 24);
-		pdesc->Dword2 |= set_desc(p_dm_fat_table->antsel_b[aid] << 25);
-		pdesc->Dword7 |= set_desc(p_dm_fat_table->antsel_c[aid] << 29);
+		pdesc->Dword2 |= set_desc(fat_tab->antsel_a[aid] << 24);
+		pdesc->Dword2 |= set_desc(fat_tab->antsel_b[aid] << 25);
+		pdesc->Dword7 |= set_desc(fat_tab->antsel_c[aid] << 29);
 
-
-	} else if (p_dm->support_ic_type == ODM_RTL8812) {
-		/*[path-A]*/
+	} else if (dm->support_ic_type == ODM_RTL8812) {
+		/*@[path-A]*/
+#if 0
 		/*panic_printk("[%s] [%d]   ******ODM_SetTxAntByTxInfo_8881E******\n",__FUNCTION__,__LINE__);*/
+#endif
 
 		pdesc->Dword6 &= set_desc(~BIT(16));
 		pdesc->Dword6 &= set_desc(~BIT(17));
 		pdesc->Dword6 &= set_desc(~BIT(18));
 
-		pdesc->Dword6 |= set_desc(p_dm_fat_table->antsel_a[aid] << 16);
-		pdesc->Dword6 |= set_desc(p_dm_fat_table->antsel_b[aid] << 17);
-		pdesc->Dword6 |= set_desc(p_dm_fat_table->antsel_c[aid] << 18);
-
+		pdesc->Dword6 |= set_desc(fat_tab->antsel_a[aid] << 16);
+		pdesc->Dword6 |= set_desc(fat_tab->antsel_b[aid] << 17);
+		pdesc->Dword6 |= set_desc(fat_tab->antsel_c[aid] << 18);
 	}
 }
 
-
-#if 1 /*def CONFIG_WLAN_HAL*/
-void
-odm_set_tx_ant_by_tx_info_hal(
-	struct	rtl8192cd_priv		*priv,
-	void	*pdesc_data,
-	u16					aid
-)
+#if 1 /*@def CONFIG_WLAN_HAL*/
+void odm_set_tx_ant_by_tx_info_hal(
+	struct rtl8192cd_priv *priv,
+	void *pdesc_data,
+	u16 aid)
 {
-	struct PHY_DM_STRUCT	*p_dm = GET_PDM_ODM(priv);/*&(priv->pshare->_dmODM);*/
-	struct phydm_fat_struct		*p_dm_fat_table = &(p_dm->dm_fat_table);
-	PTX_DESC_DATA_88XX	pdescdata = (PTX_DESC_DATA_88XX)pdesc_data;
+	struct dm_struct *dm = GET_PDM_ODM(priv); /*@&(priv->pshare->_dmODM);*/
+	struct phydm_fat_struct *fat_tab = &dm->dm_fat_table;
+	PTX_DESC_DATA_88XX pdescdata = (PTX_DESC_DATA_88XX)pdesc_data;
 
-	if (!(p_dm->support_ability & ODM_BB_ANT_DIV))
+	if (!(dm->support_ability & ODM_BB_ANT_DIV))
 		return;
 
-	if (p_dm->ant_div_type == CGCS_RX_HW_ANTDIV)
+	if (dm->ant_div_type == CGCS_RX_HW_ANTDIV)
 		return;
 
-	if (p_dm->support_ic_type & (ODM_RTL8881A | ODM_RTL8192E | ODM_RTL8814A)) {
-		/*panic_printk("[%s] [%d] ******odm_set_tx_ant_by_tx_info_hal******\n",__FUNCTION__,__LINE__);*/
+	if (dm->support_ic_type & (ODM_RTL8881A | ODM_RTL8192E | ODM_RTL8814A |
+	    ODM_RTL8197F | ODM_RTL8822B)) {
+#if 0
+		/*panic_printk("[%s] [%d] **odm_set_tx_ant_by_tx_info_hal**\n",
+		 *	       __FUNCTION__,__LINE__);
+		 */
+#endif
 		pdescdata->ant_sel = 1;
-		pdescdata->ant_sel_a = p_dm_fat_table->antsel_a[aid];
+		pdescdata->ant_sel_a = fat_tab->antsel_a[aid];
 	}
 }
-#endif	/*#ifdef CONFIG_WLAN_HAL*/
+#endif /*@#ifdef CONFIG_WLAN_HAL*/
 
 #endif
 
-
-void
-odm_ant_div_config(
-	void		*p_dm_void
-)
+void odm_ant_div_config(void *dm_void)
 {
-	struct PHY_DM_STRUCT		*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	struct phydm_fat_struct			*p_dm_fat_table = &p_dm->dm_fat_table;
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct phydm_fat_struct *fat_tab = &dm->dm_fat_table;
 #if (DM_ODM_SUPPORT_TYPE & (ODM_WIN))
-	PHYDM_DBG(p_dm, DBG_ANT_DIV, ("WIN Config Antenna Diversity\n"));
-	/*
-	if(p_dm->support_ic_type==ODM_RTL8723B)
+	PHYDM_DBG(dm, DBG_ANT_DIV, "WIN Config Antenna Diversity\n");
+	/*@
+	if(dm->support_ic_type==ODM_RTL8723B)
 	{
-		if((!p_dm->dm_swat_table.ANTA_ON || !p_dm->dm_swat_table.ANTB_ON))
-			p_dm->support_ability &= ~(ODM_BB_ANT_DIV);
+		if((!dm->swat_tab.ANTA_ON || !dm->swat_tab.ANTB_ON))
+			dm->support_ability &= ~(ODM_BB_ANT_DIV);
 	}
 	*/
-	if (p_dm->support_ic_type == ODM_RTL8723D) {
+	#if (defined(CONFIG_2T3R_ANTENNA))
+	#if (RTL8822B_SUPPORT == 1)
+		dm->rfe_type = ANT_2T3R_RFE_TYPE;
+	#endif
+	#endif
 
-		p_dm->ant_div_type = S0S1_TRX_HW_ANTDIV;
-		/**/
-	}
+	#if (defined(CONFIG_2T4R_ANTENNA))
+	#if (RTL8822B_SUPPORT == 1)
+		dm->rfe_type = ANT_2T4R_RFE_TYPE;
+	#endif
+	#endif
+
+	if (dm->support_ic_type == ODM_RTL8723D)
+		dm->ant_div_type = S0S1_TRX_HW_ANTDIV;
 #elif (DM_ODM_SUPPORT_TYPE & (ODM_CE))
 
-	PHYDM_DBG(p_dm, DBG_ANT_DIV, ("CE Config Antenna Diversity\n"));
+	PHYDM_DBG(dm, DBG_ANT_DIV, "CE Config Antenna Diversity\n");
 
-	if (p_dm->support_ic_type == ODM_RTL8723B)
-		p_dm->ant_div_type = S0S1_SW_ANTDIV;
+	if (dm->support_ic_type == ODM_RTL8723B)
+		dm->ant_div_type = S0S1_SW_ANTDIV;
 
+	if (dm->support_ic_type == ODM_RTL8723D)
+		dm->ant_div_type = S0S1_SW_ANTDIV;
+#elif (DM_ODM_SUPPORT_TYPE & (ODM_IOT))
 
+	PHYDM_DBG(dm, DBG_ANT_DIV, "IOT Config Antenna Diversity\n");
+
+	if (dm->support_ic_type == ODM_RTL8721D)
+		dm->ant_div_type = CG_TRX_HW_ANTDIV;
 
 #elif (DM_ODM_SUPPORT_TYPE & (ODM_AP))
 
-	PHYDM_DBG(p_dm, DBG_ANT_DIV, ("AP Config Antenna Diversity\n"));
+	PHYDM_DBG(dm, DBG_ANT_DIV, "AP Config Antenna Diversity\n");
 
-	/* 2 [ NOT_SUPPORT_ANTDIV ] */
+	/* @2 [ NOT_SUPPORT_ANTDIV ] */
 #if (defined(CONFIG_NOT_SUPPORT_ANTDIV))
-	p_dm->support_ability &= ~(ODM_BB_ANT_DIV);
-	PHYDM_DBG(p_dm, DBG_ANT_DIV, ("[ Disable AntDiv function] : Not Support 2.4G & 5G Antenna Diversity\n"));
+	dm->support_ability &= ~(ODM_BB_ANT_DIV);
+	PHYDM_DBG(dm, DBG_ANT_DIV,
+		  "[ Disable AntDiv function] : Not Support 2.4G & 5G Antenna Diversity\n");
 
-	/* 2 [ 2G&5G_SUPPORT_ANTDIV ] */
+	/* @2 [ 2G&5G_SUPPORT_ANTDIV ] */
 #elif (defined(CONFIG_2G5G_SUPPORT_ANTDIV))
-	PHYDM_DBG(p_dm, DBG_ANT_DIV, ("[ Enable AntDiv function] : 2.4G & 5G Support Antenna Diversity Simultaneously\n"));
-	p_dm_fat_table->ant_div_2g_5g = (ODM_ANTDIV_2G | ODM_ANTDIV_5G);
+	PHYDM_DBG(dm, DBG_ANT_DIV,
+		  "[ Enable AntDiv function] : 2.4G & 5G Support Antenna Diversity Simultaneously\n");
+	fat_tab->ant_div_2g_5g = (ODM_ANTDIV_2G | ODM_ANTDIV_5G);
 
-	if (p_dm->support_ic_type & ODM_ANTDIV_SUPPORT)
-		p_dm->support_ability |= ODM_BB_ANT_DIV;
-	if (*p_dm->p_band_type == ODM_BAND_5G) {
+	if (dm->support_ic_type & ODM_ANTDIV_SUPPORT)
+		dm->support_ability |= ODM_BB_ANT_DIV;
+	if (*dm->band_type == ODM_BAND_5G) {
 #if (defined(CONFIG_5G_CGCS_RX_DIVERSITY))
-		p_dm->ant_div_type = CGCS_RX_HW_ANTDIV;
-		PHYDM_DBG(p_dm, DBG_ANT_DIV, ("[ 5G] : AntDiv type = CGCS_RX_HW_ANTDIV\n"));
+		dm->ant_div_type = CGCS_RX_HW_ANTDIV;
+		PHYDM_DBG(dm, DBG_ANT_DIV,
+			  "[ 5G] : AntDiv type = CGCS_RX_HW_ANTDIV\n");
 		panic_printk("[ 5G] : AntDiv type = CGCS_RX_HW_ANTDIV\n");
-#elif (defined(CONFIG_5G_CG_TRX_DIVERSITY) || defined(CONFIG_2G5G_CG_TRX_DIVERSITY_8881A))
-		p_dm->ant_div_type = CG_TRX_HW_ANTDIV;
-		PHYDM_DBG(p_dm, DBG_ANT_DIV, ("[ 5G] : AntDiv type = CG_TRX_HW_ANTDIV\n"));
+#elif (defined(CONFIG_5G_CG_TRX_DIVERSITY) ||\
+	defined(CONFIG_2G5G_CG_TRX_DIVERSITY_8881A))
+		dm->ant_div_type = CG_TRX_HW_ANTDIV;
+		PHYDM_DBG(dm, DBG_ANT_DIV,
+			  "[ 5G] : AntDiv type = CG_TRX_HW_ANTDIV\n");
 		panic_printk("[ 5G] : AntDiv type = CG_TRX_HW_ANTDIV\n");
 #elif (defined(CONFIG_5G_CG_SMART_ANT_DIVERSITY))
-		p_dm->ant_div_type = CG_TRX_SMART_ANTDIV;
-		PHYDM_DBG(p_dm, DBG_ANT_DIV, ("[ 5G] : AntDiv type = CG_SMART_ANTDIV\n"));
+		dm->ant_div_type = CG_TRX_SMART_ANTDIV;
+		PHYDM_DBG(dm, DBG_ANT_DIV,
+			  "[ 5G] : AntDiv type = CG_SMART_ANTDIV\n");
 #elif (defined(CONFIG_5G_S0S1_SW_ANT_DIVERSITY))
-		p_dm->ant_div_type = S0S1_SW_ANTDIV;
-		PHYDM_DBG(p_dm, DBG_ANT_DIV, ("[ 5G] : AntDiv type = S0S1_SW_ANTDIV\n"));
+		dm->ant_div_type = S0S1_SW_ANTDIV;
+		PHYDM_DBG(dm, DBG_ANT_DIV,
+			  "[ 5G] : AntDiv type = S0S1_SW_ANTDIV\n");
 #endif
-	} else if (*p_dm->p_band_type == ODM_BAND_2_4G) {
+	} else if (*dm->band_type == ODM_BAND_2_4G) {
 #if (defined(CONFIG_2G_CGCS_RX_DIVERSITY))
-		p_dm->ant_div_type = CGCS_RX_HW_ANTDIV;
-		PHYDM_DBG(p_dm, DBG_ANT_DIV, ("[ 2.4G] : AntDiv type = CGCS_RX_HW_ANTDIV\n"));
-#elif (defined(CONFIG_2G_CG_TRX_DIVERSITY) || defined(CONFIG_2G5G_CG_TRX_DIVERSITY_8881A))
-		p_dm->ant_div_type = CG_TRX_HW_ANTDIV;
-		PHYDM_DBG(p_dm, DBG_ANT_DIV, ("[ 2.4G] : AntDiv type = CG_TRX_HW_ANTDIV\n"));
+		dm->ant_div_type = CGCS_RX_HW_ANTDIV;
+		PHYDM_DBG(dm, DBG_ANT_DIV,
+			  "[ 2.4G] : AntDiv type = CGCS_RX_HW_ANTDIV\n");
+#elif (defined(CONFIG_2G_CG_TRX_DIVERSITY) ||\
+	defined(CONFIG_2G5G_CG_TRX_DIVERSITY_8881A))
+		dm->ant_div_type = CG_TRX_HW_ANTDIV;
+		PHYDM_DBG(dm, DBG_ANT_DIV,
+			  "[ 2.4G] : AntDiv type = CG_TRX_HW_ANTDIV\n");
 #elif (defined(CONFIG_2G_CG_SMART_ANT_DIVERSITY))
-		p_dm->ant_div_type = CG_TRX_SMART_ANTDIV;
-		PHYDM_DBG(p_dm, DBG_ANT_DIV, ("[ 2.4G] : AntDiv type = CG_SMART_ANTDIV\n"));
+		dm->ant_div_type = CG_TRX_SMART_ANTDIV;
+		PHYDM_DBG(dm, DBG_ANT_DIV,
+			  "[ 2.4G] : AntDiv type = CG_SMART_ANTDIV\n");
 #elif (defined(CONFIG_2G_S0S1_SW_ANT_DIVERSITY))
-		p_dm->ant_div_type = S0S1_SW_ANTDIV;
-		PHYDM_DBG(p_dm, DBG_ANT_DIV, ("[ 2.4G] : AntDiv type = S0S1_SW_ANTDIV\n"));
+		dm->ant_div_type = S0S1_SW_ANTDIV;
+		PHYDM_DBG(dm, DBG_ANT_DIV,
+			  "[ 2.4G] : AntDiv type = S0S1_SW_ANTDIV\n");
 #endif
 	}
 
-	/* 2 [ 5G_SUPPORT_ANTDIV ] */
+	/* @2 [ 5G_SUPPORT_ANTDIV ] */
 #elif (defined(CONFIG_5G_SUPPORT_ANTDIV))
-	PHYDM_DBG(p_dm, DBG_ANT_DIV, ("[ Enable AntDiv function] : Only 5G Support Antenna Diversity\n"));
+	PHYDM_DBG(dm, DBG_ANT_DIV,
+		  "[ Enable AntDiv function] : Only 5G Support Antenna Diversity\n");
 	panic_printk("[ Enable AntDiv function] : Only 5G Support Antenna Diversity\n");
-	p_dm_fat_table->ant_div_2g_5g = (ODM_ANTDIV_5G);
-	if (*p_dm->p_band_type == ODM_BAND_5G) {
-		if (p_dm->support_ic_type & ODM_ANTDIV_5G_SUPPORT_IC)
-			p_dm->support_ability |= ODM_BB_ANT_DIV;
+	fat_tab->ant_div_2g_5g = (ODM_ANTDIV_5G);
+	if (*dm->band_type == ODM_BAND_5G) {
+		if (dm->support_ic_type & ODM_ANTDIV_5G_SUPPORT_IC)
+			dm->support_ability |= ODM_BB_ANT_DIV;
 #if (defined(CONFIG_5G_CGCS_RX_DIVERSITY))
-		p_dm->ant_div_type = CGCS_RX_HW_ANTDIV;
-		PHYDM_DBG(p_dm, DBG_ANT_DIV, ("[ 5G] : AntDiv type = CGCS_RX_HW_ANTDIV\n"));
+		dm->ant_div_type = CGCS_RX_HW_ANTDIV;
+		PHYDM_DBG(dm, DBG_ANT_DIV,
+			  "[ 5G] : AntDiv type = CGCS_RX_HW_ANTDIV\n");
 		panic_printk("[ 5G] : AntDiv type = CGCS_RX_HW_ANTDIV\n");
 #elif (defined(CONFIG_5G_CG_TRX_DIVERSITY))
-		p_dm->ant_div_type = CG_TRX_HW_ANTDIV;
+		dm->ant_div_type = CG_TRX_HW_ANTDIV;
 		panic_printk("[ 5G] : AntDiv type = CG_TRX_HW_ANTDIV\n");
-		PHYDM_DBG(p_dm, DBG_ANT_DIV, ("[ 5G] : AntDiv type = CG_TRX_HW_ANTDIV\n"));
+		PHYDM_DBG(dm, DBG_ANT_DIV,
+			  "[ 5G] : AntDiv type = CG_TRX_HW_ANTDIV\n");
 #elif (defined(CONFIG_5G_CG_SMART_ANT_DIVERSITY))
-		p_dm->ant_div_type = CG_TRX_SMART_ANTDIV;
-		PHYDM_DBG(p_dm, DBG_ANT_DIV, ("[ 5G] : AntDiv type = CG_SMART_ANTDIV\n"));
+		dm->ant_div_type = CG_TRX_SMART_ANTDIV;
+		PHYDM_DBG(dm, DBG_ANT_DIV,
+			  "[ 5G] : AntDiv type = CG_SMART_ANTDIV\n");
 #elif (defined(CONFIG_5G_S0S1_SW_ANT_DIVERSITY))
-		p_dm->ant_div_type = S0S1_SW_ANTDIV;
-		PHYDM_DBG(p_dm, DBG_ANT_DIV, ("[ 5G] : AntDiv type = S0S1_SW_ANTDIV\n"));
+		dm->ant_div_type = S0S1_SW_ANTDIV;
+		PHYDM_DBG(dm, DBG_ANT_DIV,
+			  "[ 5G] : AntDiv type = S0S1_SW_ANTDIV\n");
 #endif
-	} else if (*p_dm->p_band_type == ODM_BAND_2_4G) {
-		PHYDM_DBG(p_dm, DBG_ANT_DIV, ("Not Support 2G ant_div_type\n"));
-		p_dm->support_ability &= ~(ODM_BB_ANT_DIV);
+	} else if (*dm->band_type == ODM_BAND_2_4G) {
+		PHYDM_DBG(dm, DBG_ANT_DIV, "Not Support 2G ant_div_type\n");
+		dm->support_ability &= ~(ODM_BB_ANT_DIV);
 	}
 
-	/* 2 [ 2G_SUPPORT_ANTDIV ] */
+	/* @2 [ 2G_SUPPORT_ANTDIV ] */
 #elif (defined(CONFIG_2G_SUPPORT_ANTDIV))
-	PHYDM_DBG(p_dm, DBG_ANT_DIV, ("[ Enable AntDiv function] : Only 2.4G Support Antenna Diversity\n"));
-	p_dm_fat_table->ant_div_2g_5g = (ODM_ANTDIV_2G);
-	if (*p_dm->p_band_type == ODM_BAND_2_4G) {
-		if (p_dm->support_ic_type & ODM_ANTDIV_2G_SUPPORT_IC)
-			p_dm->support_ability |= ODM_BB_ANT_DIV;
+	PHYDM_DBG(dm, DBG_ANT_DIV,
+		  "[ Enable AntDiv function] : Only 2.4G Support Antenna Diversity\n");
+	fat_tab->ant_div_2g_5g = (ODM_ANTDIV_2G);
+	if (*dm->band_type == ODM_BAND_2_4G) {
+		if (dm->support_ic_type & ODM_ANTDIV_2G_SUPPORT_IC)
+			dm->support_ability |= ODM_BB_ANT_DIV;
 #if (defined(CONFIG_2G_CGCS_RX_DIVERSITY))
-		p_dm->ant_div_type = CGCS_RX_HW_ANTDIV;
-		PHYDM_DBG(p_dm, DBG_ANT_DIV, ("[ 2.4G] : AntDiv type = CGCS_RX_HW_ANTDIV\n"));
+		dm->ant_div_type = CGCS_RX_HW_ANTDIV;
+		PHYDM_DBG(dm, DBG_ANT_DIV,
+			  "[ 2.4G] : AntDiv type = CGCS_RX_HW_ANTDIV\n");
 #elif (defined(CONFIG_2G_CG_TRX_DIVERSITY))
-		p_dm->ant_div_type = CG_TRX_HW_ANTDIV;
-		PHYDM_DBG(p_dm, DBG_ANT_DIV, ("[ 2.4G] : AntDiv type = CG_TRX_HW_ANTDIV\n"));
+		dm->ant_div_type = CG_TRX_HW_ANTDIV;
+		PHYDM_DBG(dm, DBG_ANT_DIV,
+			  "[ 2.4G] : AntDiv type = CG_TRX_HW_ANTDIV\n");
 #elif (defined(CONFIG_2G_CG_SMART_ANT_DIVERSITY))
-		p_dm->ant_div_type = CG_TRX_SMART_ANTDIV;
-		PHYDM_DBG(p_dm, DBG_ANT_DIV, ("[ 2.4G] : AntDiv type = CG_SMART_ANTDIV\n"));
+		dm->ant_div_type = CG_TRX_SMART_ANTDIV;
+		PHYDM_DBG(dm, DBG_ANT_DIV,
+			  "[ 2.4G] : AntDiv type = CG_SMART_ANTDIV\n");
 #elif (defined(CONFIG_2G_S0S1_SW_ANT_DIVERSITY))
-		p_dm->ant_div_type = S0S1_SW_ANTDIV;
-		PHYDM_DBG(p_dm, DBG_ANT_DIV, ("[ 2.4G] : AntDiv type = S0S1_SW_ANTDIV\n"));
+		dm->ant_div_type = S0S1_SW_ANTDIV;
+		PHYDM_DBG(dm, DBG_ANT_DIV,
+			  "[ 2.4G] : AntDiv type = S0S1_SW_ANTDIV\n");
 #endif
-	} else if (*p_dm->p_band_type == ODM_BAND_5G) {
-		PHYDM_DBG(p_dm, DBG_ANT_DIV, ("Not Support 5G ant_div_type\n"));
-		p_dm->support_ability &= ~(ODM_BB_ANT_DIV);
+	} else if (*dm->band_type == ODM_BAND_5G) {
+		PHYDM_DBG(dm, DBG_ANT_DIV, "Not Support 5G ant_div_type\n");
+		dm->support_ability &= ~(ODM_BB_ANT_DIV);
 	}
 #endif
 #endif
 
-	PHYDM_DBG(p_dm, DBG_ANT_DIV, ("[AntDiv Config Info] AntDiv_SupportAbility = (( %x ))\n", ((p_dm->support_ability & ODM_BB_ANT_DIV) ? 1 : 0)));
-	PHYDM_DBG(p_dm, DBG_ANT_DIV, ("[AntDiv Config Info] be_fix_tx_ant = ((%d))\n", p_dm->dm_fat_table.b_fix_tx_ant));
-
+	PHYDM_DBG(dm, DBG_ANT_DIV,
+		  "[AntDiv Config Info] AntDiv_SupportAbility = (( %x ))\n",
+		  ((dm->support_ability & ODM_BB_ANT_DIV) ? 1 : 0));
+	PHYDM_DBG(dm, DBG_ANT_DIV,
+		  "[AntDiv Config Info] be_fix_tx_ant = ((%d))\n",
+		  dm->dm_fat_table.b_fix_tx_ant);
 }
 
-
-void
-odm_ant_div_timers(
-	void		*p_dm_void,
-	u8		state
-)
+void odm_ant_div_timers(void *dm_void, u8 state)
 {
-	struct PHY_DM_STRUCT		*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
 	if (state == INIT_ANTDIV_TIMMER) {
 #ifdef CONFIG_S0S1_SW_ANTENNA_DIVERSITY
-		odm_initialize_timer(p_dm, &(p_dm->dm_swat_table.phydm_sw_antenna_switch_timer),
-			(void *)odm_sw_antdiv_callback, NULL, "phydm_sw_antenna_switch_timer");
-#elif (defined(CONFIG_5G_CG_SMART_ANT_DIVERSITY)) || (defined(CONFIG_2G_CG_SMART_ANT_DIVERSITY))
-		odm_initialize_timer(p_dm, &p_dm->fast_ant_training_timer,
-			(void *)odm_fast_ant_training_callback, NULL, "fast_ant_training_timer");
+		odm_initialize_timer(dm,
+				     &dm->dm_swat_table.sw_antdiv_timer,
+				     (void *)odm_sw_antdiv_callback, NULL,
+				     "sw_antdiv_timer");
+#elif (defined(CONFIG_5G_CG_SMART_ANT_DIVERSITY)) ||\
+	(defined(CONFIG_2G_CG_SMART_ANT_DIVERSITY))
+		odm_initialize_timer(dm, &dm->fast_ant_training_timer,
+				     (void *)odm_fast_ant_training_callback,
+				     NULL, "fast_ant_training_timer");
 #endif
 
 #ifdef ODM_EVM_ENHANCE_ANTDIV
-		odm_initialize_timer(p_dm, &p_dm->evm_fast_ant_training_timer,
-			(void *)odm_evm_fast_ant_training_callback, NULL, "evm_fast_ant_training_timer");
+		odm_initialize_timer(dm, &dm->evm_fast_ant_training_timer,
+				     (void *)phydm_evm_antdiv_callback, NULL,
+				     "evm_fast_ant_training_timer");
 #endif
 	} else if (state == CANCEL_ANTDIV_TIMMER) {
 #ifdef CONFIG_S0S1_SW_ANTENNA_DIVERSITY
-		odm_cancel_timer(p_dm, &(p_dm->dm_swat_table.phydm_sw_antenna_switch_timer));
-#elif (defined(CONFIG_5G_CG_SMART_ANT_DIVERSITY)) || (defined(CONFIG_2G_CG_SMART_ANT_DIVERSITY))
-		odm_cancel_timer(p_dm, &p_dm->fast_ant_training_timer);
+		odm_cancel_timer(dm,
+				 &dm->dm_swat_table.sw_antdiv_timer);
+#elif (defined(CONFIG_5G_CG_SMART_ANT_DIVERSITY)) ||\
+	(defined(CONFIG_2G_CG_SMART_ANT_DIVERSITY))
+		odm_cancel_timer(dm, &dm->fast_ant_training_timer);
 #endif
 
 #ifdef ODM_EVM_ENHANCE_ANTDIV
-		odm_cancel_timer(p_dm, &p_dm->evm_fast_ant_training_timer);
+		odm_cancel_timer(dm, &dm->evm_fast_ant_training_timer);
 #endif
 	} else if (state == RELEASE_ANTDIV_TIMMER) {
 #ifdef CONFIG_S0S1_SW_ANTENNA_DIVERSITY
-		odm_release_timer(p_dm, &(p_dm->dm_swat_table.phydm_sw_antenna_switch_timer));
-#elif (defined(CONFIG_5G_CG_SMART_ANT_DIVERSITY)) || (defined(CONFIG_2G_CG_SMART_ANT_DIVERSITY))
-		odm_release_timer(p_dm, &p_dm->fast_ant_training_timer);
+		odm_release_timer(dm,
+				  &dm->dm_swat_table.sw_antdiv_timer);
+#elif (defined(CONFIG_5G_CG_SMART_ANT_DIVERSITY)) ||\
+	(defined(CONFIG_2G_CG_SMART_ANT_DIVERSITY))
+		odm_release_timer(dm, &dm->fast_ant_training_timer);
 #endif
 
 #ifdef ODM_EVM_ENHANCE_ANTDIV
-		odm_release_timer(p_dm, &p_dm->evm_fast_ant_training_timer);
+		odm_release_timer(dm, &dm->evm_fast_ant_training_timer);
 #endif
 	}
-
 }
 
-void
-phydm_antdiv_debug(
-	void		*p_dm_void,
-	u32		*const dm_value,
-	u32		*_used,
-	char			*output,
-	u32		*_out_len
-)
+void phydm_antdiv_debug(void *dm_void, char input[][16], u32 *_used,
+			char *output, u32 *_out_len)
 {
-	struct PHY_DM_STRUCT		*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	/*struct phydm_fat_struct*			p_dm_fat_table = &p_dm->dm_fat_table;*/
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct phydm_fat_struct	*fat_tab = &dm->dm_fat_table;
 	u32 used = *_used;
 	u32 out_len = *_out_len;
+	u32 dm_value[10] = {0};
+	char help[] = "-h";
+	u8 i, input_idx = 0;
+
+	for (i = 0; i < 5; i++) {
+		if (input[i + 1]) {
+			PHYDM_SSCANF(input[i + 1], DCMD_HEX, &dm_value[i]);
+			input_idx++;
+		}
+	}
+
+	if (input_idx == 0)
+		return;
 
-	if (dm_value[0] == 1) { /*fixed or auto antenna*/
+	if ((strcmp(input[1], help) == 0)) {
+		PDM_SNPF(out_len, used, output + used, out_len - used,
+			 "{1} {0:auto, 1:fix main, 2:fix auto}\n");
+		PDM_SNPF(out_len, used, output + used, out_len - used,
+			 "{2} {antdiv_period}\n");
+		#if (RTL8821C_SUPPORT == 1)
+		PDM_SNPF(out_len, used, output + used, out_len - used,
+			 "{3} {en} {0:Default, 1:HW_Div, 2:SW_Div}\n");
+		#endif
 
+	} else if (dm_value[0] == 1) {
+	/*@fixed or auto antenna*/
 		if (dm_value[1] == 0) {
-			p_dm->ant_type = ODM_AUTO_ANT;
-			PHYDM_SNPRINTF((output + used, out_len - used, "AntDiv: Auto\n"));
+			dm->ant_type = ODM_AUTO_ANT;
+			PDM_SNPF(out_len, used, output + used, out_len - used,
+				 "AntDiv: Auto\n");
 		} else if (dm_value[1] == 1) {
-			p_dm->ant_type = ODM_FIX_MAIN_ANT;
-			PHYDM_SNPRINTF((output + used, out_len - used, "AntDiv: Fix Main\n"));
+			dm->ant_type = ODM_FIX_MAIN_ANT;
+			PDM_SNPF(out_len, used, output + used, out_len - used,
+				 "AntDiv: Fix Main\n");
 		} else if (dm_value[1] == 2) {
-			p_dm->ant_type = ODM_FIX_AUX_ANT;
-			PHYDM_SNPRINTF((output + used, out_len - used, "AntDiv: Fix Aux\n"));
+			dm->ant_type = ODM_FIX_AUX_ANT;
+			PDM_SNPF(out_len, used, output + used, out_len - used,
+				 "AntDiv: Fix Aux\n");
 		}
 
-		if (p_dm->ant_type != ODM_AUTO_ANT) {
-
-			odm_stop_antenna_switch_dm(p_dm);
-			if (p_dm->ant_type == ODM_FIX_MAIN_ANT)
-				odm_update_rx_idle_ant(p_dm, MAIN_ANT);
-			else if (p_dm->ant_type == ODM_FIX_AUX_ANT)
-				odm_update_rx_idle_ant(p_dm, AUX_ANT);
+		if (dm->ant_type != ODM_AUTO_ANT) {
+			odm_stop_antenna_switch_dm(dm);
+			if (dm->ant_type == ODM_FIX_MAIN_ANT)
+				odm_update_rx_idle_ant(dm, MAIN_ANT);
+			else if (dm->ant_type == ODM_FIX_AUX_ANT)
+				odm_update_rx_idle_ant(dm, AUX_ANT);
 		} else {
-			phydm_enable_antenna_diversity(p_dm);
+			phydm_enable_antenna_diversity(dm);
 		}
-		p_dm->pre_ant_type = p_dm->ant_type;
-	} else if (dm_value[0] == 2) { /*dynamic period for AntDiv*/
+		dm->pre_ant_type = dm->ant_type;
+	} else if (dm_value[0] == 2) {
+	/*@dynamic period for AntDiv*/
+		dm->antdiv_period = (u8)dm_value[1];
+		PDM_SNPF(out_len, used, output + used, out_len - used,
+			 "AntDiv_period=((%d))\n", dm->antdiv_period);
+	}
+	#if (RTL8821C_SUPPORT == 1)
+	else if (dm_value[0] == 3 &&
+		 dm->support_ic_type == ODM_RTL8821C) {
+		/*Only for 8821C*/
+		if (dm_value[1] == 0) {
+			fat_tab->force_antdiv_type = false;
+			PDM_SNPF(out_len, used, output + used, out_len - used,
+				 "[8821C] AntDiv: Default\n");
+		} else if (dm_value[1] == 1) {
+			fat_tab->force_antdiv_type = true;
+			fat_tab->antdiv_type_dbg = CG_TRX_HW_ANTDIV;
+			PDM_SNPF(out_len, used, output + used, out_len - used,
+				 "[8821C] AntDiv: HW diversity\n");
+		} else if (dm_value[1] == 2) {
+			fat_tab->force_antdiv_type = true;
+			fat_tab->antdiv_type_dbg = S0S1_SW_ANTDIV;
+			PDM_SNPF(out_len, used, output + used, out_len - used,
+				 "[8821C] AntDiv: SW diversity\n");
+		}
+	}
+	#endif
+	#ifdef ODM_EVM_ENHANCE_ANTDIV
+	else if (dm_value[0] == 4) {
+		if (dm_value[1] == 0) {
+			/*@init parameters for EVM AntDiv*/
+			phydm_evm_sw_antdiv_init(dm);
+			PDM_SNPF(out_len, used, output + used, out_len - used,
+				 "init evm antdiv parameters\n");
+		} else if (dm_value[1] == 1) {
+			/*training number for EVM AntDiv*/
+			dm->antdiv_train_num = (u8)dm_value[2];
+			PDM_SNPF(out_len, used, output + used, out_len - used,
+				 "antdiv_train_num = ((%d))\n",
+				 dm->antdiv_train_num);
+		} else if (dm_value[1] == 2) {
+			/*training interval for EVM AntDiv*/
+			dm->antdiv_intvl = (u8)dm_value[2];
+			PDM_SNPF(out_len, used, output + used, out_len - used,
+				 "antdiv_intvl = ((%d))\n",
+				 dm->antdiv_intvl);
+		} else if (dm_value[1] == 3) {
+			/*@function period for EVM AntDiv*/
+			dm->evm_antdiv_period = (u8)dm_value[2];
+			PDM_SNPF(out_len, used, output + used, out_len - used,
+				 "evm_antdiv_period = ((%d))\n",
+				 dm->evm_antdiv_period);
+		} else if (dm_value[1] == 100) {/*show parameters*/
+			PDM_SNPF(out_len, used, output + used, out_len - used,
+				 "ant_type = ((%d))\n", dm->ant_type);
+			PDM_SNPF(out_len, used, output + used, out_len - used,
+				 "antdiv_train_num = ((%d))\n",
+				 dm->antdiv_train_num);
+			PDM_SNPF(out_len, used, output + used, out_len - used,
+				 "antdiv_intvl = ((%d))\n",
+				 dm->antdiv_intvl);
+			PDM_SNPF(out_len, used, output + used, out_len - used,
+				 "evm_antdiv_period = ((%d))\n",
+				 dm->evm_antdiv_period);
+		}
+	}
+	#ifdef CONFIG_2T4R_ANTENNA
+	else if (dm_value[0] == 5) { /*Only for 8822B 2T4R case*/
 
-		p_dm->antdiv_period = (u8)dm_value[1];
-		PHYDM_SNPRINTF((output + used, out_len - used, "AntDiv_period = ((%d))\n", p_dm->antdiv_period));
+		if (dm_value[1] == 0) {
+			dm->ant_type2 = ODM_AUTO_ANT;
+			PDM_SNPF(out_len, used, output + used, out_len - used,
+				 "AntDiv: PathB Auto\n");
+		} else if (dm_value[1] == 1) {
+			dm->ant_type2 = ODM_FIX_MAIN_ANT;
+			PDM_SNPF(out_len, used, output + used, out_len - used,
+				 "AntDiv: PathB Fix Main\n");
+		} else if (dm_value[1] == 2) {
+			dm->ant_type2 = ODM_FIX_AUX_ANT;
+			PDM_SNPF(out_len, used, output + used, out_len - used,
+				 "AntDiv: PathB Fix Aux\n");
+		}
+
+		if (dm->ant_type2 != ODM_AUTO_ANT) {
+			odm_stop_antenna_switch_dm(dm);
+			if (dm->ant_type2 == ODM_FIX_MAIN_ANT)
+				phydm_update_rx_idle_ant_pathb(dm, MAIN_ANT);
+			else if (dm->ant_type2 == ODM_FIX_AUX_ANT)
+				phydm_update_rx_idle_ant_pathb(dm, AUX_ANT);
+		} else {
+			phydm_enable_antenna_diversity(dm);
+		}
+		dm->pre_ant_type2 = dm->ant_type2;
 	}
+	#endif
+	#endif
 	*_used = used;
 	*_out_len = out_len;
 }
 
-#endif /*#if (defined(CONFIG_PHYDM_ANTENNA_DIVERSITY))*/
-
-void
-odm_ant_div_reset(
-	void		*p_dm_void
-)
+void odm_ant_div_reset(void *dm_void)
 {
-	struct PHY_DM_STRUCT		*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-
-	if (p_dm->ant_div_type == S0S1_SW_ANTDIV) {
-#ifdef CONFIG_S0S1_SW_ANTENNA_DIVERSITY
-		odm_s0s1_sw_ant_div_reset(p_dm);
-#endif
-	}
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
 
+	#ifdef CONFIG_S0S1_SW_ANTENNA_DIVERSITY
+	if (dm->ant_div_type == S0S1_SW_ANTDIV)
+		odm_s0s1_sw_ant_div_reset(dm);
+	#endif
 }
 
-void
-odm_antenna_diversity_init(
-	void		*p_dm_void
-)
+void odm_antenna_diversity_init(void *dm_void)
 {
-#if (defined(CONFIG_PHYDM_ANTENNA_DIVERSITY))
-	struct PHY_DM_STRUCT		*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-
-#if 0
-	if (*(p_dm->p_mp_mode) == true)
-		return;
-#endif
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
 
-	odm_ant_div_config(p_dm);
-	odm_ant_div_init(p_dm);
-#endif
+	odm_ant_div_config(dm);
+	odm_ant_div_init(dm);
 }
 
-void
-odm_antenna_diversity(
-	void		*p_dm_void
-)
+void odm_antenna_diversity(void *dm_void)
 {
-#if (defined(CONFIG_PHYDM_ANTENNA_DIVERSITY))
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
 
-	struct PHY_DM_STRUCT		*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-
-	if (*(p_dm->p_mp_mode) == true)
+	if (*dm->mp_mode)
 		return;
 
-	if (!(p_dm->support_ability & ODM_BB_ANT_DIV)) {
-		PHYDM_DBG(p_dm, DBG_ANT_DIV, ("[Return!!!]   Not Support Antenna Diversity Function\n"));
+	if (!(dm->support_ability & ODM_BB_ANT_DIV)) {
+		PHYDM_DBG(dm, DBG_ANT_DIV,
+			  "[Return!!!]   Not Support Antenna Diversity Function\n");
 		return;
 	}
 
-	if (p_dm->pause_ability & ODM_BB_ANT_DIV) {
-		
-		PHYDM_DBG(p_dm, DBG_ANT_DIV, ("Return: Pause AntDIv in LV=%d\n", p_dm->pause_lv_table.lv_antdiv));
+	if (dm->pause_ability & ODM_BB_ANT_DIV) {
+		PHYDM_DBG(dm, DBG_ANT_DIV, "Return: Pause AntDIv in LV=%d\n",
+			  dm->pause_lv_table.lv_antdiv);
 		return;
 	}
 
-	odm_ant_div(p_dm);
-#endif
+	odm_ant_div(dm);
 }
+#endif /*@#ifdef CONFIG_PHYDM_ANTENNA_DIVERSITY*/
+
diff --git a/rtl8723DS/hal/phydm/phydm_antdiv.h b/rtl8723DS/hal/phydm/phydm_antdiv.h
index 9eb11e8..0449ce8 100755..100644
--- a/rtl8723DS/hal/phydm/phydm_antdiv.h
+++ b/rtl8723DS/hal/phydm/phydm_antdiv.h
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2007 - 2017 Realtek Corporation.
+ * Copyright(c) 2007 - 2017  Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -8,40 +8,64 @@
  *
  * This program is distributed in the hope that it will be useful, but WITHOUT
  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  * more details.
  *
+ * The full GNU General Public License is included in this distribution in the
+ * file called LICENSE.
+ *
+ * Contact Information:
+ * wlanfae <wlanfae@realtek.com>
+ * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
+ * Hsinchu 300, Taiwan.
+ *
+ * Larry Finger <Larry.Finger@lwfinger.net>
+ *
  *****************************************************************************/
 
-#ifndef	__PHYDMANTDIV_H__
-#define    __PHYDMANTDIV_H__
-
-/*#define ANTDIV_VERSION	"2.0"  //2014.11.04*/
-/*#define ANTDIV_VERSION	"2.1"  //2015.01.13  Dino*/
-/*#define ANTDIV_VERSION	"2.2"  2015.01.16  Dino*/
-/*#define ANTDIV_VERSION	"3.1"  2015.07.29  YuChen, remove 92c 92d 8723a*/
-/*#define ANTDIV_VERSION	"3.2"  2015.08.11  Stanley, disable antenna diversity when BT is enable for 8723B*/
-/*#define ANTDIV_VERSION	"3.3"  2015.08.12  Stanley. 8723B does not need to check the antenna is control by BT,
-							because antenna diversity only works when BT is disable or radio off*/
-/*#define ANTDIV_VERSION	"3.4"  2015.08.28  Dino  1.Add 8821A Smart Antenna 2. Add 8188F SW S0S1 Antenna Diversity*/
-/*#define ANTDIV_VERSION	"3.5"  2015.10.07  Stanley  Always check antenna detection result from BT-coex. for 8723B, not from PHYDM*/
-/*#define ANTDIV_VERSION	"3.6"*/  /*2015.11.16  Stanley  */
-/*#define ANTDIV_VERSION	"3.7"*/  /*2015.11.20  Dino Add SmartAnt FAT Patch */
-/*#define ANTDIV_VERSION	"3.8"  2015.12.21  Dino, Add SmartAnt dynamic training packet num */
-/*#define ANTDIV_VERSION	"3.9"  2016.01.05  Dino, Add SmartAnt cmd for converting single & two smtant, and add cmd for adjust truth table */
-#define ANTDIV_VERSION	"4.0"  /*2017.05.25  Mark, Add SW antenna diversity for 8821c because HW transient issue */
-
-/* 1 ============================================================
+#ifndef __PHYDMANTDIV_H__
+#define __PHYDMANTDIV_H__
+
+/*@#define ANTDIV_VERSION	"2.0"  //2014.11.04*/
+/*@#define ANTDIV_VERSION	"2.1"  //2015.01.13  Dino*/
+/*@#define ANTDIV_VERSION	"2.2"  2015.01.16  Dino*/
+/*@#define ANTDIV_VERSION	"3.1"  2015.07.29  YuChen,remove 92c 92d 8723a*/
+/*@#define ANTDIV_VERSION	"3.2"  2015.08.11  Stanley, disable antenna*/
+				/*@diversity when BT is enable for 8723B*/
+/*@#define ANTDIV_VERSION	"3.3"  2015.08.12  Stanley. 8723B does not*/
+				/*@need to check the antenna is control by BT,*/
+				/*@because antenna diversity only works when */
+				/*@BT is disable or radio off*/
+/*@#define ANTDIV_VERSION	"3.4"  2015.08.28 Dino 1.Add 8821A Smart */
+				/*@Antenna 2. Add 8188F SW S0S1 Antenna*/
+				/*@Diversity*/
+/*@#define ANTDIV_VERSION	"3.5"  2015.10.07 Stanley Always check antenna*/
+				/*@detection result from BT-coex. for 8723B,*/
+				/*@not from PHYDM*/
+/*@#define ANTDIV_VERSION	"3.6"*/ /*@2015.11.16  Stanley  */
+/*@#define ANTDIV_VERSION	"3.7"  2015.11.20 Dino Add SmartAnt FAT Patch */
+/*@#define ANTDIV_VERSION	"3.8"  2015.12.21 Dino, Add SmartAnt dynamic*/
+				/*@training packet num */
+/*@#define ANTDIV_VERSION	"3.9"  2016.01.05 Dino, Add SmartAnt cmd for*/
+				/*@converting single & two smtant, and add cmd*/
+				/*@for adjust truth table */
+#define ANTDIV_VERSION "4.0"	/*@2017.05.25  Mark, Add SW antenna diversity*/
+				/*@for 8821c because HW transient issue */
+
+/* @1 ============================================================
  * 1  Definition
- * 1 ============================================================ */
+ * 1 ============================================================
+ */
 
 #define	ANTDIV_INIT		0xff
-#define	MAIN_ANT	1		/*ant A or ant Main   or S1*/
-#define	AUX_ANT		2		/*AntB or ant Aux   or S0*/
-#define	MAX_ANT		3		/* 3 for AP using*/
-
-#define ANT1_2G 0 /* = ANT2_5G	for 8723D  BTG S1 RX S0S1 diversity for 8723D, TX fixed at S1 */
-#define ANT2_2G 1 /* = ANT1_5G	for 8723D  BTG S0  RX S0S1 diversity for 8723D, TX fixed at S1 */
+#define	MAIN_ANT	1		/*@ant A or ant Main   or S1*/
+#define	AUX_ANT		2		/*@AntB or ant Aux   or S0*/
+#define	MAX_ANT		3		/* @3 for AP using*/
+
+#define ANT1_2G 0
+/* @= ANT2_5G for 8723D  BTG S1 RX S0S1 diversity for 8723D, TX fixed at S1 */
+#define ANT2_2G 1
+/* @= ANT1_5G for 8723D  BTG S0  RX S0S1 diversity for 8723D, TX fixed at S1 */
 /*smart antenna*/
 #define SUPPORT_RF_PATH_NUM 4
 #define SUPPORT_BEAM_PATTERN_NUM 4
@@ -53,21 +77,27 @@
 #define	FIX_TX_AT_MAIN	1
 #define	FIX_AUX_AT_MAIN	2
 
-/* Antenna Diversty Control type */
+/* @Antenna Diversty Control type */
 #define	ODM_AUTO_ANT		0
 #define	ODM_FIX_MAIN_ANT	1
 #define	ODM_FIX_AUX_ANT	2
 
-#define ODM_N_ANTDIV_SUPPORT		(ODM_RTL8188E | ODM_RTL8192E | ODM_RTL8723B | ODM_RTL8188F | ODM_RTL8723D | ODM_RTL8195A)
-#define ODM_AC_ANTDIV_SUPPORT	(ODM_RTL8821 | ODM_RTL8881A | ODM_RTL8812 | ODM_RTL8821C | ODM_RTL8822B | ODM_RTL8814B)
-#define ODM_ANTDIV_SUPPORT		(ODM_N_ANTDIV_SUPPORT | ODM_AC_ANTDIV_SUPPORT)
+#define ODM_N_ANTDIV_SUPPORT (ODM_RTL8188E | ODM_RTL8192E | ODM_RTL8723B |\
+			ODM_RTL8188F | ODM_RTL8723D | ODM_RTL8195A |\
+			ODM_RTL8197F | ODM_RTL8721D)
+#define ODM_AC_ANTDIV_SUPPORT (ODM_RTL8821 | ODM_RTL8881A | ODM_RTL8812 |\
+			ODM_RTL8821C | ODM_RTL8822B | ODM_RTL8814B)
+#define ODM_ANTDIV_SUPPORT	(ODM_N_ANTDIV_SUPPORT | ODM_AC_ANTDIV_SUPPORT)
 #define ODM_SMART_ANT_SUPPORT	(ODM_RTL8188E | ODM_RTL8192E)
 #define ODM_HL_SMART_ANT_TYPE1_SUPPORT		(ODM_RTL8821 | ODM_RTL8822B)
 
-#define ODM_ANTDIV_2G_SUPPORT_IC			(ODM_RTL8188E | ODM_RTL8192E | ODM_RTL8723B | ODM_RTL8881A | ODM_RTL8188F | ODM_RTL8723D)
-#define ODM_ANTDIV_5G_SUPPORT_IC			(ODM_RTL8821 | ODM_RTL8881A | ODM_RTL8812 | ODM_RTL8821C)
+#define ODM_ANTDIV_2G_SUPPORT_IC (ODM_RTL8188E | ODM_RTL8192E | ODM_RTL8723B |\
+			ODM_RTL8881A | ODM_RTL8188F | ODM_RTL8723D |\
+			ODM_RTL8197F)
+#define ODM_ANTDIV_5G_SUPPORT_IC (ODM_RTL8821 | ODM_RTL8881A | ODM_RTL8812 |\
+			ODM_RTL8821C | ODM_RTL8822B)
 
-#define ODM_EVM_ENHANCE_ANTDIV_SUPPORT_IC	(ODM_RTL8192E)
+#define ODM_EVM_ANTDIV_IC (ODM_RTL8192E | ODM_RTL8197F | ODM_RTL8822B)
 
 #define ODM_ANTDIV_2G	BIT(0)
 #define ODM_ANTDIV_5G	BIT(1)
@@ -75,6 +105,10 @@
 #define ANTDIV_ON	1
 #define ANTDIV_OFF	0
 
+#define ANT_PATH_A	0
+#define ANT_PATH_B	1
+#define ANT_PATH_AB	2
+
 #define FAT_ON	1
 #define FAT_OFF	0
 
@@ -128,25 +162,34 @@
 #define RSSI_CHECK_RESET_PERIOD	10
 #define RSSI_CHECK_THRESHOLD		50
 
-/*Hong Lin Smart antenna*/
+/*@Hong Lin Smart antenna*/
 #define HL_SMTANT_2WIRE_DATA_LEN 24
 
-/* 1 ============================================================
+#if (RTL8723D_SUPPORT == 1)
+	#ifndef CONFIG_ANTDIV_PERIOD
+		#define CONFIG_ANTDIV_PERIOD 1
+	#endif
+#endif
+/* @1 ============================================================
  * 1  structure
- * 1 ============================================================ */
+ * 1 ============================================================
+ */
 
 
-struct _sw_antenna_switch_ {
-	u8		double_chk_flag;	/*If current antenna RSSI > "RSSI_CHECK_THRESHOLD", than check this antenna again*/
+struct sw_antenna_switch {
+	u8		double_chk_flag;
+	/*@If current antenna RSSI > "RSSI_CHECK_THRESHOLD", than*/
+	/*@check this antenna again*/
 	u8		try_flag;
 	s32		pre_rssi;
 	u8		cur_antenna;
-	u8		pre_antenna;
+	u8		pre_ant;
 	u8		rssi_trying;
 	u8		reset_idx;
 	u8		train_time;
-	u8		train_time_flag; /*base on RSSI difference between two antennas*/
-	struct timer_list	phydm_sw_antenna_switch_timer;
+	u8		train_time_flag;
+	/*@base on RSSI difference between two antennas*/
+	struct phydm_timer_list	sw_antdiv_timer;
 	u32		pkt_cnt_sw_ant_div_by_ctrl_frame;
 	boolean		is_sw_ant_div_by_ctrl_frame;
 
@@ -156,7 +199,7 @@ struct _sw_antenna_switch_ {
 #endif
 #endif
 
-	/* AntDect (Before link Antenna Switch check) need to be moved*/
+	/* @AntDect (Before link Antenna Switch check) need to be moved*/
 	u16		single_ant_counter;
 	u16		dual_ant_counter;
 	u16		aux_fail_detec_counter;
@@ -164,25 +207,22 @@ struct _sw_antenna_switch_ {
 	u8		swas_no_link_state;
 	u32		swas_no_link_bk_reg948;
 	boolean		ANTA_ON;	/*To indicate ant A is or not*/
-	boolean		ANTB_ON;	/*To indicate ant B is on or not*/
+	boolean		ANTB_ON;	/*@To indicate ant B is on or not*/
 	boolean		pre_aux_fail_detec;
 	boolean		rssi_ant_dect_result;
 	u8		ant_5g;
 	u8		ant_2g;
-
-
 };
 
-
 #if (DM_ODM_SUPPORT_TYPE & (ODM_AP))
 #if (defined(CONFIG_PHYDM_ANTENNA_DIVERSITY))
 struct _BF_DIV_COEX_ {
 	boolean w_bfer_client[ODM_ASSOCIATE_ENTRY_NUM];
 	boolean w_bfee_client[ODM_ASSOCIATE_ENTRY_NUM];
-	u32	MA_rx_TP[ODM_ASSOCIATE_ENTRY_NUM];
-	u32	MA_rx_TP_DIV[ODM_ASSOCIATE_ENTRY_NUM];
+	u32 MA_rx_TP[ODM_ASSOCIATE_ENTRY_NUM];
+	u32 MA_rx_TP_DIV[ODM_ASSOCIATE_ENTRY_NUM];
 
-	u8  bd_ccoex_type_wbfer;
+	u8 bd_ccoex_type_wbfer;
 	u8 num_txbfee_client;
 	u8 num_txbfer_client;
 	u8 bdc_try_counter;
@@ -205,7 +245,6 @@ struct _BF_DIV_COEX_ {
 #endif
 #endif
 
-
 struct phydm_fat_struct {
 	u8	bssid[6];
 	u8	antsel_rx_keep_0;
@@ -221,17 +260,19 @@ struct phydm_fat_struct {
 	u8	antsel_a[ODM_ASSOCIATE_ENTRY_NUM];
 	u8	antsel_b[ODM_ASSOCIATE_ENTRY_NUM];
 	u8	antsel_c[ODM_ASSOCIATE_ENTRY_NUM];
-	u16	main_ant_sum[ODM_ASSOCIATE_ENTRY_NUM];
-	u16	aux_ant_sum[ODM_ASSOCIATE_ENTRY_NUM];
-	u16	main_ant_cnt[ODM_ASSOCIATE_ENTRY_NUM];
-	u16	aux_ant_cnt[ODM_ASSOCIATE_ENTRY_NUM];
-	u16	main_ant_sum_cck[ODM_ASSOCIATE_ENTRY_NUM];
-	u16	aux_ant_sum_cck[ODM_ASSOCIATE_ENTRY_NUM];
-	u16	main_ant_cnt_cck[ODM_ASSOCIATE_ENTRY_NUM];
-	u16	aux_ant_cnt_cck[ODM_ASSOCIATE_ENTRY_NUM];
+	u16	main_sum[ODM_ASSOCIATE_ENTRY_NUM];
+	u16	aux_sum[ODM_ASSOCIATE_ENTRY_NUM];
+	u16	main_cnt[ODM_ASSOCIATE_ENTRY_NUM];
+	u16	aux_cnt[ODM_ASSOCIATE_ENTRY_NUM];
+	u16	main_sum_cck[ODM_ASSOCIATE_ENTRY_NUM];
+	u16	aux_sum_cck[ODM_ASSOCIATE_ENTRY_NUM];
+	u16	main_cnt_cck[ODM_ASSOCIATE_ENTRY_NUM];
+	u16	aux_cnt_cck[ODM_ASSOCIATE_ENTRY_NUM];
 	u8	rx_idle_ant;
+	u8	rx_idle_ant2;
 	u8	rvrt_val;
 	u8	ant_div_on_off;
+	u8	div_path_type;
 	boolean	is_become_linked;
 	u32	min_max_rssi;
 	u8	idx_ant_div_counter_2g;
@@ -239,19 +280,19 @@ struct phydm_fat_struct {
 	u8	ant_div_2g_5g;
 
 #ifdef ODM_EVM_ENHANCE_ANTDIV
-	/*For 1SS RX phy rate*/
-	u32	main_ant_evm_sum[ODM_ASSOCIATE_ENTRY_NUM];
-	u32	aux_ant_evm_sum[ODM_ASSOCIATE_ENTRY_NUM];
-	u32	main_ant_evm_cnt[ODM_ASSOCIATE_ENTRY_NUM];
-	u32	aux_ant_evm_cnt[ODM_ASSOCIATE_ENTRY_NUM];
-
-	/*For 2SS RX phy rate*/
-	u32	main_ant_evm_2ss_sum[ODM_ASSOCIATE_ENTRY_NUM][2];	/*2SS with A1+B*/
-	u32	aux_ant_evm_2ss_sum[ODM_ASSOCIATE_ENTRY_NUM][2];	/*2SS with A2+B*/
-	u32	main_ant_evm_2ss_cnt[ODM_ASSOCIATE_ENTRY_NUM];
-	u32	aux_ant_evm_2ss_cnt[ODM_ASSOCIATE_ENTRY_NUM];
-
-	boolean	EVM_method_enable;
+	/*@For 1SS RX phy rate*/
+	u32	main_evm_sum[ODM_ASSOCIATE_ENTRY_NUM];
+	u32	aux_evm_sum[ODM_ASSOCIATE_ENTRY_NUM];
+	u32	main_evm_cnt[ODM_ASSOCIATE_ENTRY_NUM];
+	u32	aux_evm_cnt[ODM_ASSOCIATE_ENTRY_NUM];
+
+	/*@For 2SS RX phy rate*/
+	u32	main_evm_2ss_sum[ODM_ASSOCIATE_ENTRY_NUM][2];/*@2SS with A1+B*/
+	u32	aux_evm_2ss_sum[ODM_ASSOCIATE_ENTRY_NUM][2];/*@2SS with A2+B*/
+	u32	main_evm_2ss_cnt[ODM_ASSOCIATE_ENTRY_NUM];
+	u32	aux_evm_2ss_cnt[ODM_ASSOCIATE_ENTRY_NUM];
+
+	boolean	evm_method_enable;
 	u8	target_ant_evm;
 	u8	target_ant_crc32;
 	u8	target_ant_tp;
@@ -267,10 +308,10 @@ struct phydm_fat_struct {
 	u32	main_crc32_fail_cnt;
 	u32	aux_crc32_fail_cnt;
 
-	u32	antdiv_tp_main;
-	u32	antdiv_tp_aux;
-	u32	antdiv_tp_main_cnt;
-	u32	antdiv_tp_aux_cnt;
+	u32	main_tp;
+	u32	aux_tp;
+	u32	main_tp_cnt;
+	u32	aux_tp_cnt;
 
 	u8	pre_antdiv_rssi;
 	u8	pre_antdiv_tp;
@@ -280,31 +321,32 @@ struct phydm_fat_struct {
 	u32    cck_ctrl_frame_cnt_aux;
 	u32    ofdm_ctrl_frame_cnt_main;
 	u32    ofdm_ctrl_frame_cnt_aux;
-	u32	main_ant_ctrl_frame_sum;
-	u32	aux_ant_ctrl_frame_sum;
-	u32	main_ant_ctrl_frame_cnt;
-	u32	aux_ant_ctrl_frame_cnt;
+	u32	main_ctrl_sum;
+	u32	aux_ctrl_sum;
+	u32	main_ctrl_cnt;
+	u32	aux_ctrl_cnt;
 #endif
 	u8	b_fix_tx_ant;
 	boolean	fix_ant_bfee;
 	boolean	enable_ctrl_frame_antdiv;
 	boolean	use_ctrl_frame_antdiv;
 	boolean	*is_no_csi_feedback;
+	boolean	force_antdiv_type;
+	u8	antdiv_type_dbg;
 	u8	hw_antsw_occur;
-	u8	*p_force_tx_ant_by_desc;
-	u8	force_tx_ant_by_desc; /*A temp value, will hook to driver team's outer parameter later*/
-	u8    *p_default_s0_s1;
-	u8    default_s0_s1;
+	u8	*p_force_tx_by_desc;
+	u8	force_tx_by_desc;
+	/*@A temp value, will hook to driver team's outer parameter later*/
+	u8	*p_default_s0_s1;
+	u8	default_s0_s1;
 };
 
-
-/* 1 ============================================================
+/* @1 ============================================================
  * 1  enumeration
- * 1 ============================================================ */
-
+ * 1 ============================================================
+ */
 
-
-enum fat_state_e /*Fast antenna training*/
+enum fat_state /*@Fast antenna training*/
 {
 	FAT_BEFORE_LINK_STATE	= 0,
 	FAT_PREPARE_STATE			= 1,
@@ -312,296 +354,166 @@ enum fat_state_e /*Fast antenna training*/
 	FAT_DECISION_STATE		= 3
 };
 
-enum ant_div_type_e {
+enum ant_div_type {
 	NO_ANTDIV			= 0xFF,
 	CG_TRX_HW_ANTDIV			= 0x01,
 	CGCS_RX_HW_ANTDIV		= 0x02,
 	FIXED_HW_ANTDIV		= 0x03,
 	CG_TRX_SMART_ANTDIV	= 0x04,
 	CGCS_RX_SW_ANTDIV	= 0x05,
-	S0S1_SW_ANTDIV          = 0x06, /*8723B intrnal switch S0 S1*/
-	S0S1_TRX_HW_ANTDIV     = 0x07, /*TRX S0S1 diversity for 8723D*/
-	HL_SW_SMART_ANT_TYPE1	= 0x10, /*Hong-Lin Smart antenna use for 8821AE which is a 2 ant. entitys, and each ant. is equipped with 4 antenna patterns*/
-	HL_SW_SMART_ANT_TYPE2	= 0x11 /*Hong-Bo Smart antenna use for 8822B which is a 2 ant. entitys*/
+	S0S1_SW_ANTDIV	= 0x06, /*@8723B intrnal switch S0 S1*/
+	S0S1_TRX_HW_ANTDIV	= 0x07, /*TRX S0S1 diversity for 8723D*/
+	HL_SW_SMART_ANT_TYPE1	= 0x10,
+	/*@Hong-Lin Smart antenna use for 8821AE which is a 2 ant. entitys,*/
+	/*@and each ant. is equipped with 4 antenna patterns*/
+	HL_SW_SMART_ANT_TYPE2	= 0x11
+	/*@Hong-Bo Smart antenna use for 8822B which is a 2 ant. entitys*/
 };
 
-
-/* 1 ============================================================
+/* @1 ============================================================
  * 1  function prototype
- * 1 ============================================================ */
+ * 1 ============================================================
+ */
 
+void odm_stop_antenna_switch_dm(void *dm_void);
 
-void
-odm_stop_antenna_switch_dm(
-	void	*p_dm_void
-);
+void phydm_enable_antenna_diversity(void *dm_void);
 
-void
-phydm_enable_antenna_diversity(
-	void			*p_dm_void
-);
+void odm_set_ant_config(void *dm_void, u8 ant_setting /* @0=A, 1=B, 2=C,....*/
+			);
 
-void
-odm_set_ant_config(
-	void	*p_dm_void,
-	u8		ant_setting	/* 0=A, 1=B, 2=C, .... */
-);
+#define sw_ant_div_rest_after_link odm_sw_ant_div_rest_after_link
 
+void odm_sw_ant_div_rest_after_link(void *dm_void);
 
-#define sw_ant_div_rest_after_link	odm_sw_ant_div_rest_after_link
+void odm_ant_div_on_off(void *dm_void, u8 swch, u8 path);
 
-void odm_sw_ant_div_rest_after_link(
-	void	*p_dm_void
-);
+void odm_tx_by_tx_desc_or_reg(void *dm_void, u8 swch);
 
-void
-odm_ant_div_on_off(
-	void		*p_dm_void,
-	u8		swch
-);
+#if (defined(CONFIG_PHYDM_ANTENNA_DIVERSITY))
 
-void
-odm_tx_by_tx_desc_or_reg(
-	void		*p_dm_void,
-	u8		swch
-);
+void phydm_antdiv_reset_statistic(void *dm_void, u32 macid);
 
-#if (defined(CONFIG_PHYDM_ANTENNA_DIVERSITY))
+void odm_update_rx_idle_ant(void *dm_void, u8 ant);
 
-void
-phydm_antdiv_reset_statistic(
-	void	*p_dm_void,
-	u32	macid
-);
-
-void
-odm_update_rx_idle_ant(
-	void		*p_dm_void,
-	u8		ant
-);
-
-void
-phydm_set_antdiv_val(
-	void			*p_dm_void,
-	u32			*val_buf,
-	u8			val_len
-);
+void phydm_update_rx_idle_ant_pathb(void *dm_void, u8 ant);
+
+void phydm_set_antdiv_val(void *dm_void, u32 *val_buf,	u8 val_len);
 
 #if (RTL8723B_SUPPORT == 1)
-void
-odm_update_rx_idle_ant_8723b(
-	void			*p_dm_void,
-	u8			ant,
-	u32			default_ant,
-	u32			optional_ant
-);
+void odm_update_rx_idle_ant_8723b(void *dm_void, u8 ant, u32 default_ant,
+				  u32 optional_ant);
 #endif
 
 #if (RTL8188F_SUPPORT == 1)
-void
-phydm_update_rx_idle_antenna_8188F(
-	void	*p_dm_void,
-	u32	default_ant
-);
+void phydm_update_rx_idle_antenna_8188F(void *dm_void,	u32 default_ant);
 #endif
 
 #if (RTL8723D_SUPPORT == 1)
 
-void
-phydm_set_tx_ant_pwr_8723d(
-	void			*p_dm_void,
-	u8			ant
-);
+void phydm_set_tx_ant_pwr_8723d(void *dm_void, u8 ant);
 
-void
-odm_update_rx_idle_ant_8723d(
-	void			*p_dm_void,
-	u8			ant,
-	u32			default_ant,
-	u32			optional_ant
-);
+void odm_update_rx_idle_ant_8723d(void *dm_void, u8 ant, u32 default_ant,
+				  u32 optional_ant);
 
 #endif
 
 #ifdef CONFIG_S0S1_SW_ANTENNA_DIVERSITY
 
 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
-void
-odm_sw_antdiv_callback(
-	struct timer_list		*p_timer
-);
-
-void
-odm_sw_antdiv_workitem_callback(
-	void	*p_context
-);
+void odm_sw_antdiv_callback(struct phydm_timer_list *timer);
 
+void odm_sw_antdiv_workitem_callback(void *context);
 
 #elif (DM_ODM_SUPPORT_TYPE == ODM_CE)
 
-void
-odm_sw_antdiv_workitem_callback(
-	void	*p_context
-);
+void odm_sw_antdiv_workitem_callback(void *context);
 
-void
-odm_sw_antdiv_callback(
-	void		*function_context
-);
+void odm_sw_antdiv_callback(void *function_context);
 
 #endif
 
-void
-odm_s0s1_sw_ant_div_by_ctrl_frame(
-	void			*p_dm_void,
-	u8			step
-);
-
-void
-odm_antsel_statistics_of_ctrl_frame(
-	void			*p_dm_void,
-	u8			antsel_tr_mux,
-	u32			rx_pwdb_all
-);
-
-void
-odm_s0s1_sw_ant_div_by_ctrl_frame_process_rssi(
-	void				*p_dm_void,
-	void		*p_phy_info_void,
-	void		*p_pkt_info_void
-);
+void odm_s0s1_sw_ant_div_by_ctrl_frame(void *dm_void, u8 step);
+
+void odm_antsel_statistics_ctrl(void *dm_void,	u8 antsel_tr_mux,
+				u32 rx_pwdb_all);
+
+void odm_s0s1_sw_ant_div_by_ctrl_frame_process_rssi(void *dm_void,
+						    void *phy_info_void,
+						    void *pkt_info_void);
 
 #endif
 
 #ifdef ODM_EVM_ENHANCE_ANTDIV
-VOID
-phydm_evm_sw_antdiv_init(
-	void		*p_dm_void
-);
-
-void
-odm_evm_fast_ant_training_callback(
-	void		*p_dm_void
-);
+void phydm_evm_sw_antdiv_init(void *dm_void);
+
+#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
+void phydm_evm_antdiv_callback(struct phydm_timer_list *timer);
+
+void phydm_evm_antdiv_workitem_callback(void *context);
+
+#elif (DM_ODM_SUPPORT_TYPE == ODM_CE)
+void phydm_evm_antdiv_callback(void *dm_void);
+
+void phydm_evm_antdiv_workitem_callback(void *context);
+
+#else
+void phydm_evm_antdiv_callback(void *dm_void);
 #endif
 
-void
-odm_hw_ant_div(
-	void		*p_dm_void
-);
-
-#if (defined(CONFIG_5G_CG_SMART_ANT_DIVERSITY)) || (defined(CONFIG_2G_CG_SMART_ANT_DIVERSITY))
-void
-odm_fast_ant_training(
-	void		*p_dm_void
-);
-
-void
-odm_fast_ant_training_callback(
-	void		*p_dm_void
-);
-
-void
-odm_fast_ant_training_work_item_callback(
-	void		*p_dm_void
-);
 #endif
 
-void
-odm_ant_div_init(
-	void		*p_dm_void
-);
+void odm_hw_ant_div(void *dm_void);
 
-void
-odm_ant_div(
-	void		*p_dm_void
-);
+#if (defined(CONFIG_5G_CG_SMART_ANT_DIVERSITY)) ||\
+	(defined(CONFIG_2G_CG_SMART_ANT_DIVERSITY))
+void odm_fast_ant_training(
+	void *dm_void);
 
-void
-odm_antsel_statistics(
-	void			*p_dm_void,
-	void			*p_phy_info_void,
-	u8			antsel_tr_mux,
-	u32			mac_id,
-	u32			utility,
-	u8			method,
-	u8			is_cck_rate
-);
+void odm_fast_ant_training_callback(void *dm_void);
 
-void
-odm_process_rssi_for_ant_div(
-	void		*p_dm_void,
-	void		*p_phy_info_void,
-	void		*p_pkt_info_void
-);
+void odm_fast_ant_training_work_item_callback(void *dm_void);
+#endif
+
+void odm_ant_div_init(void *dm_void);
+
+void odm_ant_div(void *dm_void);
 
+void odm_antsel_statistics(void *dm_void, void *phy_info_void,
+			   u8 antsel_tr_mux, u32 mac_id, u32 utility, u8 method,
+			   u8 is_cck_rate);
 
+void odm_process_rssi_for_ant_div(void *dm_void, void *phy_info_void,
+				  void *pkt_info_void);
 
 #if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_CE))
-void
-odm_set_tx_ant_by_tx_info(
-	void			*p_dm_void,
-	u8			*p_desc,
-	u8			mac_id
-);
+void odm_set_tx_ant_by_tx_info(void *dm_void,	 u8 *desc, u8 mac_id);
 
 #elif (DM_ODM_SUPPORT_TYPE == ODM_AP)
 
-struct tx_desc; /*declared tx_desc here or compile error happened when enabled 8822B*/
-
-void
-odm_set_tx_ant_by_tx_info(
-	struct	rtl8192cd_priv		*priv,
-	struct	tx_desc			*pdesc,
-	unsigned short			aid
-);
-
-#if 1/*def def CONFIG_WLAN_HAL*/
-void
-odm_set_tx_ant_by_tx_info_hal(
-	struct	rtl8192cd_priv		*priv,
-	void	*pdesc_data,
-	u16		aid
-);
-#endif	/*#ifdef CONFIG_WLAN_HAL*/
+struct tx_desc;
+/*@declared tx_desc here or compile error happened when enabled 8822B*/
+
+void odm_set_tx_ant_by_tx_info(struct rtl8192cd_priv *priv,
+			       struct tx_desc *pdesc, unsigned short aid);
+
+#if 1 /*@def def CONFIG_WLAN_HAL*/
+void odm_set_tx_ant_by_tx_info_hal(struct rtl8192cd_priv *priv,
+				   void *pdesc_data, u16 aid);
+#endif /*@#ifdef CONFIG_WLAN_HAL*/
 #endif
 
+void odm_ant_div_config(void *dm_void);
+
+void odm_ant_div_timers(void *dm_void, u8 state);
+
+void phydm_antdiv_debug(void *dm_void, char input[][16], u32 *_used,
+			char *output, u32 *_out_len);
+
+void odm_ant_div_reset(void *dm_void);
+
+void odm_antenna_diversity_init(void *dm_void);
 
-void
-odm_ant_div_config(
-	void		*p_dm_void
-);
-
-void
-odm_ant_div_timers(
-	void		*p_dm_void,
-	u8		state
-);
-
-void
-phydm_antdiv_debug(
-	void		*p_dm_void,
-	u32		*const dm_value,
-	u32		*_used,
-	char			*output,
-	u32		*_out_len
-);
-
-#endif /*#if (defined(CONFIG_PHYDM_ANTENNA_DIVERSITY))*/
-
-void
-odm_ant_div_reset(
-	void		*p_dm_void
-);
-
-void
-odm_antenna_diversity_init(
-	void		*p_dm_void
-);
-
-void
-odm_antenna_diversity(
-	void		*p_dm_void
-);
-
-#endif /*#ifndef	__ODMANTDIV_H__*/
+void odm_antenna_diversity(void *dm_void);
+#endif /*@#ifdef CONFIG_PHYDM_ANTENNA_DIVERSITY*/
+#endif /*@#ifndef	__ODMANTDIV_H__*/
diff --git a/rtl8723DS/hal/phydm/phydm_api.c b/rtl8723DS/hal/phydm/phydm_api.c
index b23a0cc..f84279c 100755..100644
--- a/rtl8723DS/hal/phydm/phydm_api.c
+++ b/rtl8723DS/hal/phydm/phydm_api.c
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2007 - 2017 Realtek Corporation.
+ * Copyright(c) 2007 - 2017  Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -8,177 +8,421 @@
  *
  * This program is distributed in the hope that it will be useful, but WITHOUT
  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  * more details.
  *
+ * The full GNU General Public License is included in this distribution in the
+ * file called LICENSE.
+ *
+ * Contact Information:
+ * wlanfae <wlanfae@realtek.com>
+ * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
+ * Hsinchu 300, Taiwan.
+ *
+ * Larry Finger <Larry.Finger@lwfinger.net>
+ *
  *****************************************************************************/
 
-/* ************************************************************
+/*@************************************************************
  * include files
- * ************************************************************ */
+ * ************************************************************
+ */
 
 #include "mp_precomp.h"
 #include "phydm_precomp.h"
 
+void phydm_reset_bb_hw_cnt(void *dm_void)
+{
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+
+	/*@ Reset all counter when 1 */
+	if (dm->support_ic_type & ODM_IC_JGR3_SERIES) {
+		odm_set_bb_reg(dm, R_0x1eb4, BIT(25), 1);
+		odm_set_bb_reg(dm, R_0x1eb4, BIT(25), 0);
+	} else if (dm->support_ic_type & ODM_IC_11AC_SERIES) {
+		/*@ Reset all counter when 1 (including PMAC and PHY)*/
+		/* Reset Page F counter*/
+		odm_set_bb_reg(dm, R_0xb58, BIT(0), 1);
+		odm_set_bb_reg(dm, R_0xb58, BIT(0), 0);
+	} else if (dm->support_ic_type & ODM_IC_11N_SERIES) {
+		odm_set_bb_reg(dm, R_0xf14, BIT(16), 0x1);
+		odm_set_bb_reg(dm, R_0xf14, BIT(16), 0x0);
+	}
+}
 
-void
-phydm_init_trx_antenna_setting(
-	void		*p_dm_void
-)
+void phydm_dynamic_ant_weighting(void *dm_void)
 {
-	struct PHY_DM_STRUCT	*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	
-	if (p_dm->support_ic_type & (ODM_RTL8814A)) {
-		u8	rx_ant = 0, tx_ant = 0;
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
 
-		rx_ant = (u8)odm_get_bb_reg(p_dm, ODM_REG(BB_RX_PATH, p_dm), ODM_BIT(BB_RX_PATH, p_dm));
-		tx_ant = (u8)odm_get_bb_reg(p_dm, ODM_REG(BB_TX_PATH, p_dm), ODM_BIT(BB_TX_PATH, p_dm));
-		p_dm->tx_ant_status = (tx_ant & 0xf);
-		p_dm->rx_ant_status = (rx_ant & 0xf);
-	} else if (p_dm->support_ic_type & (ODM_RTL8723D | ODM_RTL8821C | ODM_RTL8710B)) {/* JJ ADD 20161014 */
-		p_dm->tx_ant_status = 0x1;
-		p_dm->rx_ant_status = 0x1;
+#ifdef DYN_ANT_WEIGHTING_SUPPORT
+	#if (RTL8197F_SUPPORT)
+	if (dm->support_ic_type & (ODM_RTL8197F))
+		phydm_dynamic_ant_weighting_8197f(dm);
+	#endif
 
+	#if (RTL8812A_SUPPORT)
+	if (dm->support_ic_type & (ODM_RTL8812)) {
+		phydm_dynamic_ant_weighting_8812a(dm);
 	}
+	#endif
+
+	#if (RTL8822B_SUPPORT)
+	if (dm->support_ic_type & (ODM_RTL8822B))
+		phydm_dynamic_ant_weighting_8822b(dm);
+	#endif
+#endif
 }
 
-void
-phydm_config_ofdm_tx_path(
-	void			*p_dm_void,
-	u32			path
-)
+#ifdef DYN_ANT_WEIGHTING_SUPPORT
+void phydm_ant_weight_dbg(void *dm_void, char input[][16], u32 *_used,
+			  char *output, u32 *_out_len)
 {
-	struct PHY_DM_STRUCT	*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-#if ((RTL8192E_SUPPORT == 1) || (RTL8812A_SUPPORT == 1))
-	u8	ofdm_tx_path = 0x33;
-#endif
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	char help[] = "-h";
+	u32 var1[10] = {0};
+	u32 used = *_used;
+	u32 out_len = *_out_len;
 
-#if (RTL8192E_SUPPORT == 1)
-	if (p_dm->support_ic_type & (ODM_RTL8192E)) {
+	if ((strcmp(input[1], help) == 0)) {
+		PDM_SNPF(out_len, used, output + used, out_len - used,
+			 "echo dis_dym_ant_weighting {0/1}\n");
 
-		if (path == BB_PATH_A) {
-			odm_set_bb_reg(p_dm, 0x90c, MASKDWORD, 0x81121111);
-			/**/
-		} else if (path == BB_PATH_B) {
-			odm_set_bb_reg(p_dm, 0x90c, MASKDWORD, 0x82221222);
-			/**/
-		} else  if (path == BB_PATH_AB) {
-			odm_set_bb_reg(p_dm, 0x90c, MASKDWORD, 0x83321333);
-			/**/
+	} else {
+		PHYDM_SSCANF(input[1], DCMD_DECIMAL, &var1[0]);
+
+		if (var1[0] == 1) {
+			dm->is_disable_dym_ant_weighting = 1;
+			PDM_SNPF(out_len, used, output + used, out_len - used,
+				 "Disable dyn-ant-weighting\n");
+		} else {
+			dm->is_disable_dym_ant_weighting = 0;
+			PDM_SNPF(out_len, used, output + used, out_len - used,
+				 "Enable dyn-ant-weighting\n");
 		}
+	}
+	*_used = used;
+	*_out_len = out_len;
+}
+#endif
 
+void phydm_iq_gen_en(void *dm_void)
+{
+#ifdef PHYDM_COMPILE_IC_2SS
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	u8 i = 0;
+	enum rf_path path = RF_PATH_A;
+
+	#if (ODM_IC_11AC_SERIES_SUPPORT)
+	if (!(dm->support_ic_type & ODM_IC_11AC_SERIES))
+		return;
 
+	for (i = RF_PATH_A; i <= RF_PATH_B; i++) {
+		path = (enum rf_path)i;
+
+		/*RF mode table write enable*/
+		odm_set_rf_reg(dm, path, RF_0xef, BIT(19), 0x1);
+		/*Select RX mode*/
+		odm_set_rf_reg(dm, path, RF_0x33, 0xF, 3);
+		/*Set Table data*/
+		odm_set_rf_reg(dm, path, RF_0x3e, 0xfffff, 0x00036);
+		/*Set Table data*/
+		odm_set_rf_reg(dm, path, RF_0x3f, 0xfffff, 0x5AFCE);
+		/*RF mode table write disable*/
+		odm_set_rf_reg(dm, path, RF_0xef, BIT(19), 0x0);
 	}
+	#endif
+	#if (ODM_IC_11N_SERIES_SUPPORT)
+	if (!(dm->support_ic_type & ODM_IC_11N_SERIES))
+		return;
+	if (dm->support_ic_type & ODM_RTL8192F) {
+		 /*RF mode table write enable*/
+		odm_set_rf_reg(dm, RF_PATH_A, RF_0xef, 0x80000, 0x1);
+		odm_set_rf_reg(dm, RF_PATH_B, RF_0xef, 0x80000, 0x1);
+		/* Path A */
+		odm_set_rf_reg(dm, RF_PATH_A, RF_0x30, 0xfffff, 0x08000);
+		odm_set_rf_reg(dm, RF_PATH_A, RF_0x31, 0xfffff, 0x0005f);
+		odm_set_rf_reg(dm, RF_PATH_A, RF_0x32, 0xfffff, 0x01042);
+		odm_set_rf_reg(dm, RF_PATH_A, RF_0x30, 0xfffff, 0x18000);
+		odm_set_rf_reg(dm, RF_PATH_A, RF_0x31, 0xfffff, 0x0004f);
+		odm_set_rf_reg(dm, RF_PATH_A, RF_0x32, 0xfffff, 0x71fc2);
+		/* Path B */
+		odm_set_rf_reg(dm, RF_PATH_B, RF_0x30, 0xfffff, 0x08000);
+		odm_set_rf_reg(dm, RF_PATH_B, RF_0x31, 0xfffff, 0x00050);
+		odm_set_rf_reg(dm, RF_PATH_B, RF_0x32, 0xfffff, 0x01042);
+		odm_set_rf_reg(dm, RF_PATH_B, RF_0x30, 0xfffff, 0x18000);
+		odm_set_rf_reg(dm, RF_PATH_B, RF_0x31, 0xfffff, 0x00040);
+		odm_set_rf_reg(dm, RF_PATH_B, RF_0x32, 0xfffff, 0x71fc2);
+		/*RF mode table write disable*/
+		odm_set_rf_reg(dm, RF_PATH_A, RF_0xef, 0x80000, 0x0);
+		odm_set_rf_reg(dm, RF_PATH_B, RF_0xef, 0x80000, 0x0);
+	}
+	#endif
 #endif
+}
 
-#if (RTL8812A_SUPPORT == 1)
-	if (p_dm->support_ic_type & (ODM_RTL8812)) {
+void phydm_dis_cdd(void *dm_void)
+{
+#ifdef PHYDM_COMPILE_IC_2SS
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+
+	#if (ODM_IC_11AC_SERIES_SUPPORT)
+	if (dm->support_ic_type & ODM_IC_11AC_SERIES) {
+		odm_set_bb_reg(dm, R_0x808, 0x3ffff00, 0);
+		odm_set_bb_reg(dm, R_0x9ac, 0x1fff, 0);
+		odm_set_bb_reg(dm, R_0x9ac, BIT(13), 1);
+	}
+	#endif
+	#if (ODM_IC_11N_SERIES_SUPPORT)
+	if (dm->support_ic_type & ODM_IC_11N_SERIES) {
+		odm_set_bb_reg(dm, R_0x90c, 0xffffffff, 0x83321333);
+		/* Set Tx delay setting for CCK pathA,B*/
+		odm_set_bb_reg(dm, R_0xa2c, 0xf0000000, 0);
+		//Enable Tx CDD for HT-portion when spatial expansion is applied
+		odm_set_bb_reg(dm, R_0xd00, BIT(8), 0);
+		/* Tx CDD for Legacy*/
+		odm_set_bb_reg(dm, R_0xd04, 0xf0000, 0);
+		/* Tx CDD for non-HT*/
+		odm_set_bb_reg(dm, R_0xd0c, 0x3c0, 0);
+		/* Tx CDD for HT SS1*/
+		odm_set_bb_reg(dm, R_0xd0c, 0xf8000, 0);
+	}
+	#endif
+#endif
+}
 
-		if (path == BB_PATH_A) {
-			ofdm_tx_path = 0x11;
-			/**/
-		} else if (path == BB_PATH_B) {
-			ofdm_tx_path = 0x22;
-			/**/
-		} else  if (path == BB_PATH_AB) {
-			ofdm_tx_path = 0x33;
-			/**/
-		}
+void phydm_pathb_q_matrix_rotate_en(void *dm_void)
+{
+#ifdef PHYDM_COMPILE_IC_2SS
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+
+	#if (ODM_IC_11AC_SERIES_SUPPORT)
+	if (dm->support_ic_type & ODM_IC_11AC_SERIES) {
+		phydm_iq_gen_en(dm);
 
-		odm_set_bb_reg(p_dm, 0x80c, 0xff00, ofdm_tx_path);
+		#ifdef PHYDM_COMMON_API_SUPPORT
+		if (!phydm_api_trx_mode(dm, BB_PATH_AB, BB_PATH_AB, true))
+			return;
+		#endif
+
+		phydm_dis_cdd(dm);
+		/*Set Q matrix r_v11 =1*/
+		odm_set_bb_reg(dm, R_0x195c, MASKDWORD, 0x40000);
+		phydm_pathb_q_matrix_rotate(dm, 0);
+		/*Set Q matrix enable*/
+		odm_set_bb_reg(dm, R_0x191c, BIT(7), 1);
 	}
+	#endif
+	#if (ODM_IC_11N_SERIES_SUPPORT)
+	if (dm->support_ic_type & ODM_IC_11N_SERIES) {
+		phydm_iq_gen_en(dm);
+
+		#ifdef PHYDM_COMMON_API_SUPPORT
+		if (!phydm_api_trx_mode(dm, BB_PATH_AB, BB_PATH_AB, true))
+			return;
+		#endif
+		phydm_dis_cdd(dm);
+		phydm_pathb_q_matrix_rotate(dm, 0);
+	}
+	#endif
 #endif
 }
 
-void
-phydm_config_ofdm_rx_path(
-	void			*p_dm_void,
-	u32			path
-)
+void phydm_pathb_q_matrix_rotate(void *dm_void, u16 idx)
 {
-	struct PHY_DM_STRUCT	*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	u8	ofdm_rx_path = 0;
+#ifdef PHYDM_COMPILE_IC_2SS
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	#if (ODM_IC_11AC_SERIES_SUPPORT)
+	u32 phase_table_0[12] = {0x40000, 0x376CF, 0x20000, 0x00000,
+				 0xFE0000, 0xFC8930, 0xFC0000, 0xFC8930,
+				 0xFDFFFF, 0x000000, 0x020000, 0x0376CF};
+	u32 phase_table_1[12] = {0x00000, 0x1FFFF, 0x376CF, 0x40000,
+				 0x0376CF, 0x01FFFF, 0x000000, 0xFDFFFF,
+				 0xFC8930, 0xFC0000, 0xFC8930, 0xFDFFFF};
+	#endif
+	#if (ODM_IC_11N_SERIES_SUPPORT)
+	u32 phase_table_N_0[12] = {0x00, 0x0B, 0x02, 0x00, 0x02, 0x02, 0x04,
+				   0x02, 0x0D, 0x09, 0x04, 0x0B};
+	u32 phase_table_N_1[12] = {0x40000100, 0x377F00DD, 0x201D8880,
+				   0x00000000, 0xE01D8B80, 0xC8BF0322,
+				   0xC000FF00, 0xC8BF0322, 0xDFE2777F,
+				   0xFFC003FF, 0x20227480, 0x377F00DD};
+	u32 phase_table_N_2[12] = {0x00, 0x1E, 0x3C, 0x4C, 0x3C, 0x1E, 0x0F,
+				   0xD2, 0xC3, 0xC4, 0xC3, 0xD2};
+	#endif
+	if (idx >= 12) {
+		PHYDM_DBG(dm, ODM_COMP_API, "Phase Set Error: %d\n", idx);
+		return;
+	}
 
+	#if (ODM_IC_11AC_SERIES_SUPPORT)
+	if (dm->support_ic_type & ODM_IC_11AC_SERIES) {
+		/*Set Q matrix r_v21*/
+		odm_set_bb_reg(dm, R_0x1954, 0xffffff, phase_table_0[idx]);
+		odm_set_bb_reg(dm, R_0x1950, 0xffffff, phase_table_1[idx]);
+	}
+	#endif
+	#if (ODM_IC_11N_SERIES_SUPPORT)
+	if (dm->support_ic_type & ODM_IC_11N_SERIES) {
+		/*Set Q matrix r_v21*/
+		odm_set_bb_reg(dm, R_0xc4c, 0xff000000, phase_table_N_0[idx]);
+		odm_set_bb_reg(dm, R_0xc88, 0xffffffff, phase_table_N_1[idx]);
+		odm_set_bb_reg(dm, R_0xc9c, 0xff000000, phase_table_N_2[idx]);
+	}
+	#endif
+#endif
+}
 
-	if (p_dm->support_ic_type & (ODM_RTL8192E)) {
-#if (RTL8192E_SUPPORT == 1)
-		if (path == BB_PATH_A) {
-			ofdm_rx_path = 1;
-			/**/
-		} else if (path == BB_PATH_B) {
-			ofdm_rx_path = 2;
-			/**/
-		} else  if (path == BB_PATH_AB) {
-			ofdm_rx_path = 3;
-			/**/
-		}
+void phydm_trx_antenna_setting_init(void *dm_void, u8 num_rf_path)
+{
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	u8 rx_ant = 0, tx_ant = 0;
+	u8 path_bitmap = 1;
 
-		odm_set_bb_reg(p_dm, 0xC04, 0xff, (((ofdm_rx_path) << 4) | ofdm_rx_path));
-		odm_set_bb_reg(p_dm, 0xD04, 0xf, ofdm_rx_path);
+	path_bitmap = (u8)phydm_gen_bitmask(num_rf_path);
+#if 0
+	/*PHYDM_DBG(dm, ODM_COMP_INIT, "path_bitmap=0x%x\n", path_bitmap);*/
 #endif
+
+	dm->tx_ant_status = path_bitmap;
+	dm->rx_ant_status = path_bitmap;
+
+	if (num_rf_path == PDM_1SS)
+		return;
+
+	#if (defined(PHYDM_COMPILE_ABOVE_2SS))
+	if (dm->support_ic_type &
+		   (ODM_RTL8192F | ODM_RTL8192E | ODM_RTL8197F)) {
+		dm->rx_ant_status = (u8)odm_get_bb_reg(dm, R_0xc04, 0x3);
+		dm->tx_ant_status = (u8)odm_get_bb_reg(dm, R_0x90c, 0x3);
+	} else if (dm->support_ic_type & (ODM_RTL8812 | ODM_RTL8814A)) {
+		dm->rx_ant_status = (u8)odm_get_bb_reg(dm, R_0x808, 0xf);
+		dm->tx_ant_status = (u8)odm_get_bb_reg(dm, R_0x80c, 0xf);
 	}
-#if (RTL8812A_SUPPORT || RTL8822B_SUPPORT)
-	else if (p_dm->support_ic_type & (ODM_RTL8812 | ODM_RTL8822B)) {
+	#endif
+	#if (defined(PHYDM_IC_JGR3_SERIES_SUPPORT))
+	if (dm->support_ic_type & ODM_RTL8814B) {
+		dm->rx_ant_status = (u8)odm_get_bb_reg(dm, R_0x824, 0xf0000);
+		dm->tx_ant_status = (u8)odm_get_bb_reg(dm, R_0x820, 0xf);
+	}
+	#endif
 
-		if (path == BB_PATH_A) {
-			ofdm_rx_path = 1;
-			/**/
-		} else if (path == BB_PATH_B) {
-			ofdm_rx_path = 2;
-			/**/
-		} else  if (path == BB_PATH_AB) {
-			ofdm_rx_path = 3;
-			/**/
-		}
+	PHYDM_DBG(dm, ODM_COMP_INIT, "[%s]ant_status{tx,rx}={0x%x, 0x%x}\n",
+		  __func__, dm->tx_ant_status, dm->rx_ant_status);
+}
+
+void phydm_config_ofdm_tx_path(void *dm_void, u32 path)
+{
+#if (RTL8192E_SUPPORT || RTL8812A_SUPPORT)
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	u8 ofdm_tx_path = 0x33;
+
+	if (dm->num_rf_path == PDM_1SS)
+		return;
+
+	switch (dm->support_ic_type) {
+	#if (RTL8192E_SUPPORT)
+	case ODM_RTL8192E:
+		if (path == BB_PATH_A)
+			odm_set_bb_reg(dm, R_0x90c, MASKDWORD, 0x81121111);
+		else if (path == BB_PATH_B)
+			odm_set_bb_reg(dm, R_0x90c, MASKDWORD, 0x82221222);
+		else if (path == BB_PATH_AB)
+			odm_set_bb_reg(dm, R_0x90c, MASKDWORD, 0x83321333);
+
+		break;
+	#endif
+
+	#if (RTL8812A_SUPPORT)
+	case ODM_RTL8812:
+		if (path == BB_PATH_A)
+			ofdm_tx_path = 0x11;
+		else if (path == BB_PATH_B)
+			ofdm_tx_path = 0x22;
+		else if (path == BB_PATH_AB)
+			ofdm_tx_path = 0x33;
+
+		odm_set_bb_reg(dm, R_0x80c, 0xff00, ofdm_tx_path);
+
+		break;
+	#endif
 
-		odm_set_bb_reg(p_dm, 0x808, MASKBYTE0, ((ofdm_rx_path << 4) | ofdm_rx_path));
+	default:
+		break;
 	}
 #endif
 }
 
-void
-phydm_config_cck_rx_antenna_init(
-	void		*p_dm_void
-)
+void phydm_config_ofdm_rx_path(void *dm_void, u32 path)
 {
-	struct PHY_DM_STRUCT	*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	u8 val = 0;
+
+	if (dm->support_ic_type & (ODM_RTL8192E)) {
+#if (RTL8192E_SUPPORT)
+		if (path == BB_PATH_A)
+			val = 1;
+		else if (path == BB_PATH_B)
+			val = 2;
+		else if (path == BB_PATH_AB)
+			val = 3;
+
+		odm_set_bb_reg(dm, R_0xc04, 0xff, ((val << 4) | val));
+		odm_set_bb_reg(dm, R_0xd04, 0xf, val);
+#endif
+	}
+#if (RTL8812A_SUPPORT || RTL8822B_SUPPORT)
+	else if (dm->support_ic_type & (ODM_RTL8812 | ODM_RTL8822B)) {
+		if (path == BB_PATH_A)
+			val = 1;
+		else if (path == BB_PATH_B)
+			val = 2;
+		else if (path == BB_PATH_AB)
+			val = 3;
+
+		odm_set_bb_reg(dm, R_0x808, MASKBYTE0, ((val << 4) | val));
+	}
+#endif
+}
+
+void phydm_config_cck_rx_antenna_init(void *dm_void)
+{
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
 
 #if (defined(PHYDM_COMPILE_ABOVE_2SS))
-	/*CCK 2R CCA parameters*/
-	odm_set_bb_reg(p_dm, 0xa00, BIT(15), 0x0); /*Disable antenna diversity*/
-	odm_set_bb_reg(p_dm, 0xa70, BIT(7), 0); /*Concurrent CCA at LSB & USB*/
-	odm_set_bb_reg(p_dm, 0xa74, BIT(8), 0); /*RX path diversity enable*/
-	odm_set_bb_reg(p_dm, 0xa14, BIT(7), 0); /*r_en_mrc_antsel*/
-	odm_set_bb_reg(p_dm, 0xa20, (BIT(5) | BIT(4)), 1); /*MBC weighting*/
-
-	if (p_dm->support_ic_type & (ODM_RTL8192E | ODM_RTL8197F)) {
-		odm_set_bb_reg(p_dm, 0xa08, BIT(28), 1); /*r_cck_2nd_sel_eco*/
-		/**/
-	} else if (p_dm->support_ic_type & ODM_RTL8814A) {
-		odm_set_bb_reg(p_dm, 0xa84, BIT(28), 1); /*2R CCA only*/
-		/**/
-	}
+	if (dm->support_ic_type & ODM_IC_1SS)
+		return;
+
+	/*@CCK 2R CCA parameters*/
+	odm_set_bb_reg(dm, R_0xa00, BIT(15), 0x0); /*@Disable Ant diversity*/
+	odm_set_bb_reg(dm, R_0xa70, BIT(7), 0); /*@Concurrent CCA at LSB & USB*/
+	odm_set_bb_reg(dm, R_0xa74, BIT(8), 0); /*RX path diversity enable*/
+	odm_set_bb_reg(dm, R_0xa14, BIT(7), 0); /*r_en_mrc_antsel*/
+	odm_set_bb_reg(dm, R_0xa20, (BIT(5) | BIT(4)), 1); /*@MBC weighting*/
+
+	if (dm->support_ic_type & (ODM_RTL8192E | ODM_RTL8197F | ODM_RTL8192F))
+		odm_set_bb_reg(dm, R_0xa08, BIT(28), 1); /*r_cck_2nd_sel_eco*/
+	else if (dm->support_ic_type & ODM_RTL8814A)
+		odm_set_bb_reg(dm, R_0xa84, BIT(28), 1); /*@2R CCA only*/
 #endif
 }
 
-void
-phydm_config_cck_rx_path(
-	void		*p_dm_void,
-	enum bb_path			path
-)
+void phydm_config_cck_rx_path(void *dm_void, enum bb_path path)
 {
 #if (defined(PHYDM_COMPILE_ABOVE_2SS))
-	struct PHY_DM_STRUCT	*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	u8	path_div_select = 0;
-	u8	cck_path[2] = {0};
-	u8	en_2R_path = 0;
-	u8	en_2R_mrc = 0;
-	u8	i = 0, j =0; 
-	u8	num_enable_path = 0;
-	u8	cck_mrc_max_path = 2;
-	
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	u8 path_div_select = 0;
+	u8 cck_path[2] = {0};
+	u8 en_2R_path = 0;
+	u8 en_2R_mrc = 0;
+	u8 i = 0, j = 0;
+	u8 num_enable_path = 0;
+	u8 cck_mrc_max_path = 2;
+
+	if (dm->support_ic_type & ODM_IC_1SS)
+		return;
+
 	for (i = 0; i < 4; i++) {
-		if (path & BIT(i)) { /*ex: PHYDM_ABCD*/
+		if (path & BIT(i)) { /*@ex: PHYDM_ABCD*/
 			num_enable_path++;
 			cck_path[j] = i;
 			j++;
@@ -196,299 +440,551 @@ phydm_config_cck_rx_path(
 		en_2R_path = 0;
 		en_2R_mrc = 0;
 	}
-		
-	odm_set_bb_reg(p_dm, 0xa04, (BIT(27) | BIT(26)), cck_path[0]);	/*CCK_1 input signal path*/
-	odm_set_bb_reg(p_dm, 0xa04, (BIT(25) | BIT(24)), cck_path[1]);	/*CCK_2 input signal path*/
-	odm_set_bb_reg(p_dm, 0xa74, BIT(8), path_div_select);	/*enable Rx path diversity*/
-	odm_set_bb_reg(p_dm, 0xa2c, BIT(18), en_2R_path);	/*enable 2R Rx path*/
-	odm_set_bb_reg(p_dm, 0xa2c, BIT(22), en_2R_mrc);	/*enable 2R MRC*/
-	
+	/*@CCK_1 input signal path*/
+	odm_set_bb_reg(dm, R_0xa04, (BIT(27) | BIT(26)), cck_path[0]);
+	/*@CCK_2 input signal path*/
+	odm_set_bb_reg(dm, R_0xa04, (BIT(25) | BIT(24)), cck_path[1]);
+	/*@enable Rx path diversity*/
+	odm_set_bb_reg(dm, R_0xa74, BIT(8), path_div_select);
+	/*@enable 2R Rx path*/
+	odm_set_bb_reg(dm, R_0xa2c, BIT(18), en_2R_path);
+	/*@enable 2R MRC*/
+	odm_set_bb_reg(dm, R_0xa2c, BIT(22), en_2R_mrc);
+	if (dm->support_ic_type & ODM_RTL8192F) {
+		if (path == BB_PATH_A) {
+			odm_set_bb_reg(dm, R_0xa04, (BIT(27) | BIT(26)), 0);
+			odm_set_bb_reg(dm, R_0xa04, (BIT(25) | BIT(24)), 0);
+			odm_set_bb_reg(dm, R_0xa74, BIT(8), 0);
+			odm_set_bb_reg(dm, R_0xa2c, (BIT(18) | BIT(17)), 0);
+			odm_set_bb_reg(dm, R_0xa2c, (BIT(22) | BIT(21)), 0);
+		} else if (path == BB_PATH_B) {/*@for DC cancellation*/
+			odm_set_bb_reg(dm, R_0xa04, (BIT(27) | BIT(26)), 1);
+			odm_set_bb_reg(dm, R_0xa04, (BIT(25) | BIT(24)), 1);
+			odm_set_bb_reg(dm, R_0xa74, BIT(8), 0);
+			odm_set_bb_reg(dm, R_0xa2c, (BIT(18) | BIT(17)), 0);
+			odm_set_bb_reg(dm, R_0xa2c, (BIT(22) | BIT(21)), 0);
+		} else if (path == BB_PATH_AB) {
+			odm_set_bb_reg(dm, R_0xa04, (BIT(27) | BIT(26)), 0);
+			odm_set_bb_reg(dm, R_0xa04, (BIT(25) | BIT(24)), 1);
+			odm_set_bb_reg(dm, R_0xa74, BIT(8), 1);
+			odm_set_bb_reg(dm, R_0xa2c, (BIT(18) | BIT(17)), 1);
+			odm_set_bb_reg(dm, R_0xa2c, (BIT(22) | BIT(21)), 1);
+		}
+	}
+
 #endif
 }
 
-void
-phydm_config_trx_path(
-	void		*p_dm_void,
-	u32		*const dm_value,
-	u32		*_used,
-	char		*output,
-	u32		*_out_len
-)
+void phydm_config_cck_tx_path(void *dm_void, enum bb_path path)
 {
-	struct PHY_DM_STRUCT		*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
+#if (defined(PHYDM_COMPILE_ABOVE_2SS))
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+
+	if (path == BB_PATH_A)
+		odm_set_bb_reg(dm, R_0xa04, 0xf0000000, 0x8);
+	else if (path == BB_PATH_B)
+		odm_set_bb_reg(dm, R_0xa04, 0xf0000000, 0x4);
+	else if (path == BB_PATH_AB)
+		odm_set_bb_reg(dm, R_0xa04, 0xf0000000, 0xc);
+#endif
+}
+
+void phydm_config_trx_path_v2(void *dm_void, char input[][16], u32 *_used,
+			      char *output, u32 *_out_len)
+{
+#if (RTL8822B_SUPPORT || RTL8197F_SUPPORT || RTL8192F_SUPPORT ||\
+	RTL8822C_SUPPORT || RTL8814B_SUPPORT)
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
 	u32 used = *_used;
 	u32 out_len = *_out_len;
+	u32 val[10] = {0};
+	char help[] = "-h";
+	u8 i = 0, input_idx = 0;
+	enum bb_path tx_path, rx_path;
+	boolean dbg_mode_en, tx2_path_en;
+
+	if (!(dm->support_ic_type &
+	    (ODM_RTL8822B | ODM_RTL8197F | ODM_RTL8192F | ODM_RTL8822C |
+	     ODM_RTL8814B)))
+		return;
 
-	/* CCK */
-	if (dm_value[0] == 0) {
-
-		if (dm_value[1] == 1) { /*TX*/
-			if (dm_value[2] == 1)
-				odm_set_bb_reg(p_dm, 0xa04, 0xf0000000, 0x8);
-			else if (dm_value[2] == 2)
-				odm_set_bb_reg(p_dm, 0xa04, 0xf0000000, 0x4);
-			else if (dm_value[2] == 3)
-				odm_set_bb_reg(p_dm, 0xa04, 0xf0000000, 0xc);
-		} else if (dm_value[1] == 2) { /*RX*/
-
-			phydm_config_cck_rx_antenna_init(p_dm);
-
-			if (dm_value[2] == 1)
-				phydm_config_cck_rx_path(p_dm, BB_PATH_A);
-			else  if (dm_value[2] == 2)
-				phydm_config_cck_rx_path(p_dm, BB_PATH_B);
-			else  if (dm_value[2] == 3) {
-				phydm_config_cck_rx_path(p_dm, BB_PATH_AB);
-			}
+	for (i = 0; i < 5; i++) {
+		if (input[i + 1]) {
+			PHYDM_SSCANF(input[i + 1], DCMD_HEX, &val[i]);
+			input_idx++;
 		}
 	}
-	/* OFDM */
-	else if (dm_value[0] == 1) {
-
-		if (dm_value[1] == 1) { /*TX*/
-			phydm_config_ofdm_tx_path(p_dm, dm_value[2]);
-			/**/
-		} else if (dm_value[1] == 2) { /*RX*/
-			phydm_config_ofdm_rx_path(p_dm, dm_value[2]);
-			/**/
+
+	if (input_idx == 0)
+		return;
+
+	dbg_mode_en = (boolean)val[0];
+	tx_path = (enum bb_path)val[1];
+	rx_path = (enum bb_path)val[2];
+	tx2_path_en = (boolean)val[3];
+
+	if ((strcmp(input[1], help) == 0)) {
+		PDM_SNPF(out_len, used, output + used, out_len - used,
+			 "{en} {tx_path} {rx_path} {1ss_tx_2_path_en}\n");
+
+	} else if (dbg_mode_en) {
+		dm->is_disable_phy_api = false;
+		phydm_api_trx_mode(dm, tx_path, rx_path, tx2_path_en);
+		dm->is_disable_phy_api = true;
+		PDM_SNPF(out_len, used, output + used, out_len - used,
+			 "tx_path = 0x%x, rx_path = 0x%x, tx2_path_en = %d\n",
+			 tx_path, rx_path, tx2_path_en);
+	} else {
+		dm->is_disable_phy_api = false;
+		PDM_SNPF(out_len, used, output + used, out_len - used,
+			 "Disable API debug mode\n");
+	}
+#endif
+}
+
+void phydm_config_trx_path_v1(void *dm_void, char input[][16], u32 *_used,
+			      char *output, u32 *_out_len)
+{
+#if (RTL8192E_SUPPORT || RTL8812A_SUPPORT)
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	u32 used = *_used;
+	u32 out_len = *_out_len;
+	u32 val[10] = {0};
+	char help[] = "-h";
+	u8 i = 0, input_idx = 0;
+
+	if (!(dm->support_ic_type & (ODM_RTL8192E | ODM_RTL8812)))
+		return;
+
+	for (i = 0; i < 5; i++) {
+		if (input[i + 1]) {
+			PHYDM_SSCANF(input[i + 1], DCMD_HEX, &val[i]);
+			input_idx++;
+		}
+	}
+
+	if (input_idx == 0)
+		return;
+
+	if ((strcmp(input[1], help) == 0)) {
+		PDM_SNPF(out_len, used, output + used, out_len - used,
+			 "{0:CCK, 1:OFDM} {1:TX, 2:RX} {1:path_A, 2:path_B, 3:path_AB}\n");
+
+		*_used = used;
+		*_out_len = out_len;
+		return;
+
+	} else if (val[0] == 0) {
+	/* @CCK */
+		if (val[1] == 1) { /*TX*/
+			if (val[2] == 1)
+				phydm_config_cck_tx_path(dm, BB_PATH_A);
+			else if (val[2] == 2)
+				phydm_config_cck_tx_path(dm, BB_PATH_B);
+			else if (val[2] == 3)
+				phydm_config_cck_tx_path(dm, BB_PATH_AB);
+		} else if (val[1] == 2) { /*RX*/
+
+			phydm_config_cck_rx_antenna_init(dm);
+
+			if (val[2] == 1)
+				phydm_config_cck_rx_path(dm, BB_PATH_A);
+			else if (val[2] == 2)
+				phydm_config_cck_rx_path(dm, BB_PATH_B);
+			else if (val[2] == 3)
+				phydm_config_cck_rx_path(dm, BB_PATH_AB);
+			}
 		}
+	/* OFDM */
+	else if (val[0] == 1) {
+		if (val[1] == 1) /*TX*/
+			phydm_config_ofdm_tx_path(dm, val[2]);
+		else if (val[1] == 2) /*RX*/
+			phydm_config_ofdm_rx_path(dm, val[2]);
 	}
 
-	PHYDM_SNPRINTF((output + used, out_len - used, "PHYDM Set path [%s] [%s] = [%s%s%s%s]\n",
-			(dm_value[0] == 1) ? "OFDM" : "CCK",
-			(dm_value[1] == 1) ? "TX" : "RX",
-			(dm_value[2] & 0x1) ? "A" : "",
-			(dm_value[2] & 0x2) ? "B" : "",
-			(dm_value[2] & 0x4) ? "C" : "",
-			(dm_value[2] & 0x8) ? "D" : ""
-		       ));
+	PDM_SNPF(out_len, used, output + used, out_len - used,
+		 "PHYDM Set path [%s] [%s] = [%s%s%s%s]\n",
+		 (val[0] == 1) ? "OFDM" : "CCK",
+		 (val[1] == 1) ? "TX" : "RX",
+		 (val[2] & 0x1) ? "A" : "", (val[2] & 0x2) ? "B" : "",
+		 (val[2] & 0x4) ? "C" : "",
+		 (val[2] & 0x8) ? "D" : "");
 
+	*_used = used;
+	*_out_len = out_len;
+#endif
 }
 
-void
-phydm_stop_3_wire(
-	void		*p_dm_void,
-	u8		set_type
-)
+void phydm_config_trx_path(void *dm_void, char input[][16], u32 *_used,
+			   char *output, u32 *_out_len)
 {
-	struct	PHY_DM_STRUCT	*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+
+	if (dm->support_ic_type & (ODM_RTL8192E | ODM_RTL8812)) {
+		#if (RTL8192E_SUPPORT || RTL8812A_SUPPORT || RTL8814B_SUPPORT)
+		phydm_config_trx_path_v1(dm, input, _used, output, _out_len);
+		#endif
+	} else if (dm->support_ic_type & (ODM_RTL8822B | ODM_RTL8197F |
+		   ODM_RTL8192F | ODM_RTL8822C)) {
+		#if (RTL8822B_SUPPORT || RTL8197F_SUPPORT ||\
+		     RTL8192F_SUPPORT || RTL8822C_SUPPORT || RTL8814B_SUPPORT)
+		phydm_config_trx_path_v2(dm, input, _used, output, _out_len);
+		#endif
+	}
+}
+
+void phydm_tx_2path(void *dm_void)
+{
+#if (defined(PHYDM_COMPILE_IC_2SS))
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	enum bb_path rx_path = (enum bb_path)dm->rx_ant_status;
+
+	PHYDM_DBG(dm, ODM_COMP_API, "%s ======>\n", __func__);
+
+
+	if (!(dm->support_ic_type & ODM_IC_2SS))
+		return;
+
+	#if (RTL8822B_SUPPORT || RTL8192F_SUPPORT || RTL8197F_SUPPORT)
+	if (dm->support_ic_type & (ODM_RTL8822B | ODM_RTL8197F | ODM_RTL8192F))
+		phydm_api_trx_mode(dm, BB_PATH_AB, rx_path, true);
+	#endif
+
+	#if (RTL8812A_SUPPORT || RTL8192E_SUPPORT)
+	if (dm->support_ic_type & (ODM_RTL8812 | ODM_RTL8192E)) {
+		phydm_config_cck_tx_path(dm, BB_PATH_AB);
+		phydm_config_ofdm_tx_path(dm, BB_PATH_AB);
+	}
+	#endif
+#endif
+}
+
+void phydm_stop_3_wire(void *dm_void, u8 set_type)
+{
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
 
 	if (set_type == PHYDM_SET) {
+		/*@[Stop 3-wires]*/
+		if (dm->support_ic_type & ODM_IC_JGR3_SERIES) {
+			odm_set_bb_reg(dm, R_0x180c, 0x3, 0x0);
+			odm_set_bb_reg(dm, R_0x180c, BIT(28), 0x1);
+
+			#if (defined(PHYDM_COMPILE_ABOVE_2SS))
+			if (dm->support_ic_type & PHYDM_IC_ABOVE_2SS) {
+				odm_set_bb_reg(dm, R_0x410c, 0x3, 0x0);
+				odm_set_bb_reg(dm, R_0x410c, BIT(28), 0x1);
+			}
+			#endif
 
-		/*[Stop 3-wires]*/
-		if (p_dm->support_ic_type & ODM_IC_11AC_SERIES) {
-			odm_set_bb_reg(p_dm, 0xc00, 0xf, 0x4);/*	hardware 3-wire off */
-			odm_set_bb_reg(p_dm, 0xe00, 0xf, 0x4);/*	hardware 3-wire off */
+			#if (defined(PHYDM_COMPILE_ABOVE_4SS))
+			if (dm->support_ic_type & PHYDM_IC_ABOVE_4SS) {
+				odm_set_bb_reg(dm, R_0x520c, 0x3, 0x0);
+				odm_set_bb_reg(dm, R_0x520c, BIT(28), 0x1);
+				odm_set_bb_reg(dm, R_0x530c, 0x3, 0x0);
+				odm_set_bb_reg(dm, R_0x530c, BIT(28), 0x1);
+			}
+			#endif
+		} else if (dm->support_ic_type & ODM_IC_11AC_SERIES) {
+			odm_set_bb_reg(dm, R_0xc00, 0xf, 0x4);
+			odm_set_bb_reg(dm, R_0xe00, 0xf, 0x4);
 		} else {
-			odm_set_bb_reg(p_dm, 0x88c, 0xf00000, 0xf);	/* 3 wire Disable    88c[23:20]=0xf */
+			odm_set_bb_reg(dm, R_0x88c, 0xf00000, 0xf);
 		}
-		
-	} else {  /*if (set_type == PHYDM_REVERT)*/
-		
-		/*[Start 3-wires]*/
-		if (p_dm->support_ic_type & ODM_IC_11AC_SERIES) {
-			odm_set_bb_reg(p_dm, 0xc00, 0xf, 0x7);/*	hardware 3-wire on */
-			odm_set_bb_reg(p_dm, 0xe00, 0xf, 0x7);/*	hardware 3-wire on */
+
+	} else { /*@if (set_type == PHYDM_REVERT)*/
+
+		/*@[Start 3-wires]*/
+		if (dm->support_ic_type & ODM_IC_JGR3_SERIES) {
+			odm_set_bb_reg(dm, R_0x180c, 0x3, 0x3);
+			odm_set_bb_reg(dm, R_0x180c, BIT(28), 0x1);
+
+			#if (defined(PHYDM_COMPILE_ABOVE_2SS))
+			if (dm->support_ic_type & PHYDM_IC_ABOVE_2SS) {
+				odm_set_bb_reg(dm, R_0x410c, 0x3, 0x3);
+				odm_set_bb_reg(dm, R_0x410c, BIT(28), 0x1);
+			}
+			#endif
+
+			#if (defined(PHYDM_COMPILE_ABOVE_4SS))
+			if (dm->support_ic_type & PHYDM_IC_ABOVE_4SS) {
+				odm_set_bb_reg(dm, R_0x520c, 0x3, 0x3);
+				odm_set_bb_reg(dm, R_0x520c, BIT(28), 0x1);
+				odm_set_bb_reg(dm, R_0x530c, 0x3, 0x3);
+				odm_set_bb_reg(dm, R_0x530c, BIT(28), 0x1);
+			}
+			#endif
+		} else if (dm->support_ic_type & ODM_IC_11AC_SERIES) {
+			odm_set_bb_reg(dm, R_0xc00, 0xf, 0x7);
+			odm_set_bb_reg(dm, R_0xe00, 0xf, 0x7);
 		} else {
-			odm_set_bb_reg(p_dm, 0x88c, 0xf00000, 0x0);	/* 3 wire enable 88c[23:20]=0x0 */
+			odm_set_bb_reg(dm, R_0x88c, 0xf00000, 0x0);
 		}
 	}
 }
 
-u8
-phydm_stop_ic_trx(
-	void		*p_dm_void,
-	u8		set_type
-	)
+u8 phydm_stop_ic_trx(void *dm_void, u8 set_type)
 {
-	struct	PHY_DM_STRUCT	*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	struct	phydm_api_stuc 	*p_api = &(p_dm->api_table);
-	u32		i;
-	u8		trx_idle_success = false;
-	u32		dbg_port_value = 0;
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct phydm_api_stuc *api = &dm->api_table;
+	u32 i = 0;
+	u8 trx_idle_success = false;
+	u32 dbg_port_value = 0;
 
 	if (set_type == PHYDM_SET) {
-		/*[Stop TRX]---------------------------------------------------------------------*/
-		if (phydm_set_bb_dbg_port(p_dm, BB_DBGPORT_PRIORITY_3, 0x0) == false) /*set debug port to 0x0*/
+	/*@[Stop TRX]---------------------------------------------------------*/
+		/*set debug port to 0x0*/
+		if (!phydm_set_bb_dbg_port(dm, DBGPORT_PRI_3, 0x0))
 			return PHYDM_SET_FAIL;
-		
-		for (i = 0; i<10000; i++) {
-			dbg_port_value = phydm_get_bb_dbg_port_value(p_dm);
-			if ((dbg_port_value & (BIT(17) | BIT(3))) == 0)	/* PHYTXON && CCA_all */ {
-				PHYDM_DBG(p_dm, ODM_COMP_API, ("PSD wait for ((%d)) times\n", i));
-				
-				trx_idle_success = true;
-				break;
+
+		for (i = 0; i < 100; i++) {
+			dbg_port_value = phydm_get_bb_dbg_port_val(dm);
+
+			if (dm->support_ic_type & ODM_IC_JGR3_SERIES) {
+				/* BB idle */
+				if ((dbg_port_value & 0x1FFEFF3F) == 0 &&
+				    (dbg_port_value & 0xC0010000) ==
+				    0xC0010000) {
+					PHYDM_DBG(dm, ODM_COMP_API,
+						  "Stop trx wait for (%d) times\n",
+						  i);
+
+					trx_idle_success = true;
+					break;
+				}
+			} else {
+				/* PHYTXON && CCA_all */
+				if ((dbg_port_value & (BIT(17) | BIT(3)))
+				     == 0) {
+					PHYDM_DBG(dm, ODM_COMP_API,
+						  "Stop trx wait for (%d) times\n",
+						  i);
+
+					trx_idle_success = true;
+					break;
+				}
 			}
+			ODM_delay_ms(1);
 		}
-		phydm_release_bb_dbg_port(p_dm);
-		
-		if (trx_idle_success) {
+		phydm_release_bb_dbg_port(dm);
 
-			p_api->tx_queue_bitmap = (u8)odm_get_bb_reg(p_dm, 0x520, 0xff0000);
-			
-			odm_set_bb_reg(p_dm, 0x520, 0xff0000, 0xff); /*pause all TX queue*/
-			
-			if (p_dm->support_ic_type & ODM_IC_11AC_SERIES) {
-				odm_set_bb_reg(p_dm, 0x808, BIT(28), 0); /*disable CCK block*/
-				odm_set_bb_reg(p_dm, 0x838, BIT(1), 1); /*disable OFDM RX CCA*/
-			} else {
-				/*TBD*/
-				odm_set_bb_reg(p_dm, 0x800, BIT(24), 0); /* disable whole CCK block */
+		if (trx_idle_success) {
+			api->tx_queue_bitmap = odm_read_1byte(dm, R_0x522);
 
+			/*pause all TX queue*/
+			odm_set_mac_reg(dm, R_0x520, 0xff0000, 0xff);
 
-				p_api->rx_iqc_reg_1 = odm_get_bb_reg(p_dm, 0xc14, MASKDWORD);
-				p_api->rx_iqc_reg_2 = odm_get_bb_reg(p_dm, 0xc1c, MASKDWORD);
-				
-				odm_set_bb_reg(p_dm, 0xc14, MASKDWORD, 0x0); /* [ Set IQK Matrix = 0 ] equivalent to [ Turn off CCA] */
-				odm_set_bb_reg(p_dm, 0xc1c, MASKDWORD, 0x0);
+			if (dm->support_ic_type & ODM_IC_JGR3_SERIES) {
+				/*@disable OFDM RX CCA*/
+				odm_set_bb_reg(dm, R_0x1c68, BIT(24), 1);
+			} else if (dm->support_ic_type & ODM_IC_11AC_SERIES) {
+				/*@disable OFDM RX CCA*/
+				odm_set_bb_reg(dm, R_0x838, BIT(1), 1);
+			} else {
+				api->rxiqc_reg1 = odm_read_4byte(dm, R_0xc14);
+				api->rxiqc_reg2 = odm_read_4byte(dm, R_0xc1c);
+				/* @[ Set IQK Matrix = 0 ]
+				 * equivalent to [ Turn off CCA]
+				 */
+				odm_set_bb_reg(dm, R_0xc14, MASKDWORD, 0x0);
+				odm_set_bb_reg(dm, R_0xc1c, MASKDWORD, 0x0);
 			}
-				
+			phydm_dis_cck_trx(dm, PHYDM_SET);
 		} else {
 			return PHYDM_SET_FAIL;
 		}
-		
+
 		return PHYDM_SET_SUCCESS;
-		
-	} else {  /*if (set_type == PHYDM_REVERT)*/
 
-		odm_set_bb_reg(p_dm, 0x520, 0xff0000, (u32)(p_api->tx_queue_bitmap)); /*Release all TX queue*/
+	} else { /*@if (set_type == PHYDM_REVERT)*/
+		/*Release all TX queue*/
+		odm_write_1byte(dm, R_0x522, api->tx_queue_bitmap);
 
-		if (p_dm->support_ic_type & ODM_IC_11AC_SERIES) {
-			odm_set_bb_reg(p_dm, 0x808, BIT(28), 1); /*enable CCK block*/
-			odm_set_bb_reg(p_dm, 0x838, BIT(1), 0); /*enable OFDM RX CCA*/
+		if (dm->support_ic_type & ODM_IC_JGR3_SERIES) {
+			/*@enable OFDM RX CCA*/
+			odm_set_bb_reg(dm, R_0x1c68, BIT(24), 0);
+		} else if (dm->support_ic_type & ODM_IC_11AC_SERIES) {
+			/*@enable OFDM RX CCA*/
+			odm_set_bb_reg(dm, R_0x838, BIT(1), 0);
 		} else {
-			/*TBD*/
-			odm_set_bb_reg(p_dm, 0x800, BIT(24), 1); /* enable whole CCK block */
-			
-			odm_set_bb_reg(p_dm, 0xc14, MASKDWORD, p_api->rx_iqc_reg_1); /* [ Set IQK Matrix = 0 ] equivalent to [ Turn off CCA] */
-			odm_set_bb_reg(p_dm, 0xc1c, MASKDWORD, p_api->rx_iqc_reg_2);
+			/* @[Set IQK Matrix = 0] equivalent to [ Turn off CCA]*/
+			odm_write_4byte(dm, R_0xc14, api->rxiqc_reg1);
+			odm_write_4byte(dm, R_0xc1c, api->rxiqc_reg2);
 		}
-
+		phydm_dis_cck_trx(dm, PHYDM_REVERT);
 		return PHYDM_SET_SUCCESS;
 	}
-	
 }
 
-void
-phydm_set_ext_switch(
-	void		*p_dm_void,
-	u32		*const dm_value,
-	u32		*_used,
-	char		*output,
-	u32		*_out_len
-)
+void phydm_dis_cck_trx(void *dm_void, u8 set_type)
 {
-	struct PHY_DM_STRUCT		*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	u32			ext_ant_switch =  dm_value[0];
-
-#if (RTL8821A_SUPPORT == 1) || (RTL8881A_SUPPORT == 1)
-	if (p_dm->support_ic_type & (ODM_RTL8821 | ODM_RTL8881A)) {
-
-		/*Output Pin Settings*/
-		odm_set_mac_reg(p_dm, 0x4C, BIT(23), 0); /*select DPDT_P and DPDT_N as output pin*/
-		odm_set_mac_reg(p_dm, 0x4C, BIT(24), 1); /*by WLAN control*/
-
-		odm_set_bb_reg(p_dm, 0xCB4, 0xFF, 77); /*DPDT_N = 1b'0*/  /*DPDT_P = 1b'0*/
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct phydm_api_stuc *api = &dm->api_table;
 
-		if (ext_ant_switch == MAIN_ANT) {
-			odm_set_bb_reg(p_dm, 0xCB4, (BIT(29) | BIT(28)), 1);
-			PHYDM_DBG(p_dm, ODM_COMP_API, ("***8821A set ant switch = 2b'01 (Main)\n"));
-		} else if (ext_ant_switch == AUX_ANT) {
-			odm_set_bb_reg(p_dm, 0xCB4, BIT(29) | BIT(28), 2);
-			PHYDM_DBG(p_dm, ODM_COMP_API, ("***8821A set ant switch = 2b'10 (Aux)\n"));
+	if (set_type == PHYDM_SET) {
+		if (dm->support_ic_type & ODM_IC_JGR3_SERIES) {
+			api->ccktx_path = (u8)odm_get_bb_reg(dm, R_0x1a04,
+							     0xf0000000);
+			/* @CCK RxIQ weighting = [0,0] */
+			odm_set_bb_reg(dm, R_0x1a14, 0x300, 0x3);
+			/* @disable CCK Tx */
+			odm_set_bb_reg(dm, R_0x1a04, 0xf0000000, 0x0);
+		} else if (dm->support_ic_type & ODM_IC_11AC_SERIES) {
+			api->ccktx_path = (u8)odm_get_bb_reg(dm, R_0xa04,
+							     0xf0000000);
+			/* @disable CCK block */
+			odm_set_bb_reg(dm, R_0x808, BIT(28), 0);
+			/* @disable CCK Tx */
+			odm_set_bb_reg(dm, R_0xa04, 0xf0000000, 0x0);
+		} else {
+			api->ccktx_path = (u8)odm_get_bb_reg(dm, R_0xa04,
+							     0xf0000000);
+			/* @disable whole CCK block */
+			odm_set_bb_reg(dm, R_0x800, BIT(24), 0);
+			/* @disable CCK Tx */
+			odm_set_bb_reg(dm, R_0xa04, 0xf0000000, 0x0);
+		}
+	} else if (set_type == PHYDM_REVERT) {
+		if (dm->support_ic_type & ODM_IC_JGR3_SERIES) {
+			/* @CCK RxIQ weighting = [1,1] */
+			odm_set_bb_reg(dm, R_0x1a14, 0x300, 0x0);
+			/* @enable CCK Tx */
+			odm_set_bb_reg(dm, R_0x1a04, 0xf0000000,
+				       api->ccktx_path);
+		} else if (dm->support_ic_type & ODM_IC_11AC_SERIES) {
+			/* @enable CCK block */
+			odm_set_bb_reg(dm, R_0x808, BIT(28), 1);
+			/* @enable CCK Tx */
+			odm_set_bb_reg(dm, R_0xa04, 0xf0000000,
+				       api->ccktx_path);
+		} else {
+			/* @enable whole CCK block */
+			odm_set_bb_reg(dm, R_0x800, BIT(24), 1);
+			/* @enable CCK Tx */
+			odm_set_bb_reg(dm, R_0xa04, 0xf0000000,
+				       api->ccktx_path);
 		}
 	}
-#endif
 }
-
-void
-phydm_csi_mask_enable(
-	void		*p_dm_void,
-	u32		enable
-)
+void phydm_set_ext_switch(void *dm_void, u32 ext_ant_switch)
 {
-	struct PHY_DM_STRUCT	*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	u32		reg_value = 0;
+#if (RTL8821A_SUPPORT || RTL8881A_SUPPORT)
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
 
-	reg_value = (enable == FUNC_ENABLE) ? 1 : 0;
+	if (!(dm->support_ic_type & (ODM_RTL8821 | ODM_RTL8881A)))
+		return;
 
-	if (p_dm->support_ic_type & ODM_IC_11N_SERIES) {
+	/*Output Pin Settings*/
 
-		odm_set_bb_reg(p_dm, 0xD2C, BIT(28), reg_value);
-		PHYDM_DBG(p_dm, ODM_COMP_API, ("Enable CSI Mask:  Reg 0xD2C[28] = ((0x%x))\n", reg_value));
+	/*select DPDT_P and DPDT_N as output pin*/
+	odm_set_mac_reg(dm, R_0x4c, BIT(23), 0);
 
-	} else if (p_dm->support_ic_type & ODM_IC_11AC_SERIES) {
+	/*@by WLAN control*/
+	odm_set_mac_reg(dm, R_0x4c, BIT(24), 1);
 
-		odm_set_bb_reg(p_dm, 0x874, BIT(0), reg_value);
-		PHYDM_DBG(p_dm, ODM_COMP_API, ("Enable CSI Mask:  Reg 0x874[0] = ((0x%x))\n", reg_value));
-	}
+	/*@DPDT_N = 1b'0*/ /*@DPDT_P = 1b'0*/
+	odm_set_bb_reg(dm, R_0xcb4, 0xFF, 77);
 
+	if (ext_ant_switch == 1) { /*@2b'01*/
+		odm_set_bb_reg(dm, R_0xcb4, (BIT(29) | BIT(28)), 1);
+		PHYDM_DBG(dm, ODM_COMP_API, "8821A ant swh=2b'01\n");
+	} else if (ext_ant_switch == 2) { /*@2b'10*/
+		odm_set_bb_reg(dm, R_0xcb4, BIT(29) | BIT(28), 2);
+		PHYDM_DBG(dm, ODM_COMP_API, "*8821A ant swh=2b'10\n");
+	}
+#endif
 }
 
-void
-phydm_clean_all_csi_mask(
-	void		*p_dm_void
-)
+void phydm_csi_mask_enable(void *dm_void, u32 enable)
 {
-	struct PHY_DM_STRUCT	*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-
-	if (p_dm->support_ic_type & ODM_IC_11N_SERIES) {
-
-		odm_set_bb_reg(p_dm, 0xD40, MASKDWORD, 0);
-		odm_set_bb_reg(p_dm, 0xD44, MASKDWORD, 0);
-		odm_set_bb_reg(p_dm, 0xD48, MASKDWORD, 0);
-		odm_set_bb_reg(p_dm, 0xD4c, MASKDWORD, 0);
-
-	} else if (p_dm->support_ic_type & ODM_IC_11AC_SERIES) {
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	boolean en = false;
+
+	en = (enable == FUNC_ENABLE) ? true : false;
+
+	if (dm->support_ic_type & ODM_IC_11N_SERIES) {
+		odm_set_bb_reg(dm, R_0xd2c, BIT(28), en);
+		PHYDM_DBG(dm, ODM_COMP_API,
+			  "Enable CSI Mask:  Reg 0xD2C[28] = ((0x%x))\n", en);
+	#ifdef PHYDM_IC_JGR3_SERIES_SUPPORT
+	} else if (dm->support_ic_type & ODM_IC_JGR3_SERIES) {
+		odm_set_bb_reg(dm, R_0xc0c, BIT(3), en);
+		PHYDM_DBG(dm, ODM_COMP_API,
+			  "Enable CSI Mask:  Reg 0xc0c[3] = ((0x%x))\n", en);
+	#endif
+	} else if (dm->support_ic_type & ODM_IC_11AC_SERIES) {
+		odm_set_bb_reg(dm, R_0x874, BIT(0), en);
+		PHYDM_DBG(dm, ODM_COMP_API,
+			  "Enable CSI Mask:  Reg 0x874[0] = ((0x%x))\n", en);
+	}
+}
 
-		odm_set_bb_reg(p_dm, 0x880, MASKDWORD, 0);
-		odm_set_bb_reg(p_dm, 0x884, MASKDWORD, 0);
-		odm_set_bb_reg(p_dm, 0x888, MASKDWORD, 0);
-		odm_set_bb_reg(p_dm, 0x88c, MASKDWORD, 0);
-		odm_set_bb_reg(p_dm, 0x890, MASKDWORD, 0);
-		odm_set_bb_reg(p_dm, 0x894, MASKDWORD, 0);
-		odm_set_bb_reg(p_dm, 0x898, MASKDWORD, 0);
-		odm_set_bb_reg(p_dm, 0x89c, MASKDWORD, 0);
+void phydm_clean_all_csi_mask(void *dm_void)
+{
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+
+	if (dm->support_ic_type & ODM_IC_11N_SERIES) {
+		odm_set_bb_reg(dm, R_0xd40, MASKDWORD, 0);
+		odm_set_bb_reg(dm, R_0xd44, MASKDWORD, 0);
+		odm_set_bb_reg(dm, R_0xd48, MASKDWORD, 0);
+		odm_set_bb_reg(dm, R_0xd4c, MASKDWORD, 0);
+	#ifdef PHYDM_IC_JGR3_SERIES_SUPPORT
+	} else if (dm->support_ic_type & ODM_IC_JGR3_SERIES) {
+		u8 i = 0, idx_lmt = 0;
+
+		if (dm->support_ic_type & (ODM_RTL8822C | ODM_RTL8812F))
+			idx_lmt = 127;
+		else /*@for IC supporting 80 + 80*/
+			idx_lmt = 255;
+
+		odm_set_bb_reg(dm, R_0x1ee8, 0x3, 0x3);
+		odm_set_bb_reg(dm, R_0x1d94, BIT(31) | BIT(30), 0x1);
+		for (i = 0; i < idx_lmt; i++) {
+			odm_set_bb_reg(dm, R_0x1d94, MASKBYTE2, i);
+			odm_set_bb_reg(dm, R_0x1d94, MASKBYTE0, 0x0);
+		}
+		odm_set_bb_reg(dm, R_0x1ee8, 0x3, 0x0);
+	#endif
+	} else if (dm->support_ic_type & ODM_IC_11AC_SERIES) {
+		odm_set_bb_reg(dm, R_0x880, MASKDWORD, 0);
+		odm_set_bb_reg(dm, R_0x884, MASKDWORD, 0);
+		odm_set_bb_reg(dm, R_0x888, MASKDWORD, 0);
+		odm_set_bb_reg(dm, R_0x88c, MASKDWORD, 0);
+		odm_set_bb_reg(dm, R_0x890, MASKDWORD, 0);
+		odm_set_bb_reg(dm, R_0x894, MASKDWORD, 0);
+		odm_set_bb_reg(dm, R_0x898, MASKDWORD, 0);
+		odm_set_bb_reg(dm, R_0x89c, MASKDWORD, 0);
 	}
 }
 
-void
-phydm_set_csi_mask_reg(
-	void		*p_dm_void,
-	u32		tone_idx_tmp,
-	u8		tone_direction
-)
+void phydm_set_csi_mask(void *dm_void, u32 tone_idx_tmp, u8 tone_direction)
 {
-	struct PHY_DM_STRUCT	*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	u8		byte_offset, bit_offset;
-	u32		target_reg;
-	u8		reg_tmp_value;
-	u32		tone_num = 64;
-	u32		tone_num_shift = 0;
-	u32		csi_mask_reg_p = 0, csi_mask_reg_n = 0;
-
-	/* calculate real tone idx*/
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	u8 byte_offset = 0, bit_offset = 0;
+	u32 target_reg = 0;
+	u8 reg_tmp_value = 0;
+	u32 tone_num = 64;
+	u32 tone_num_shift = 0;
+	u32 csi_mask_reg_p = 0, csi_mask_reg_n = 0;
+
+	/* @calculate real tone idx*/
 	if ((tone_idx_tmp % 10) >= 5)
 		tone_idx_tmp += 10;
 
 	tone_idx_tmp = (tone_idx_tmp / 10);
 
-	if (p_dm->support_ic_type & ODM_IC_11N_SERIES) {
-
+	if (dm->support_ic_type & ODM_IC_11N_SERIES) {
 		tone_num = 64;
 		csi_mask_reg_p = 0xD40;
 		csi_mask_reg_n = 0xD48;
 
-	} else if (p_dm->support_ic_type & ODM_IC_11AC_SERIES) {
-
+	} else if (dm->support_ic_type & ODM_IC_11AC_SERIES) {
 		tone_num = 128;
 		csi_mask_reg_p = 0x880;
 		csi_mask_reg_n = 0x890;
 	}
 
 	if (tone_direction == FREQ_POSITIVE) {
-
 		if (tone_idx_tmp >= (tone_num - 1))
 			tone_idx_tmp = (tone_num - 1);
 
@@ -509,184 +1005,180 @@ phydm_set_csi_mask_reg(
 		target_reg = csi_mask_reg_n + byte_offset;
 	}
 
-	reg_tmp_value = odm_read_1byte(p_dm, target_reg);
-	PHYDM_DBG(p_dm, ODM_COMP_API, ("Pre Mask tone idx[%d]:  Reg0x%x = ((0x%x))\n", (tone_idx_tmp + tone_num_shift), target_reg, reg_tmp_value));
+	reg_tmp_value = odm_read_1byte(dm, target_reg);
+	PHYDM_DBG(dm, ODM_COMP_API,
+		  "Pre Mask tone idx[%d]:  Reg0x%x = ((0x%x))\n",
+		  (tone_idx_tmp + tone_num_shift), target_reg, reg_tmp_value);
 	reg_tmp_value |= BIT(bit_offset);
-	odm_write_1byte(p_dm, target_reg, reg_tmp_value);
-	PHYDM_DBG(p_dm, ODM_COMP_API, ("New Mask tone idx[%d]:  Reg0x%x = ((0x%x))\n", (tone_idx_tmp + tone_num_shift), target_reg, reg_tmp_value));
+	odm_write_1byte(dm, target_reg, reg_tmp_value);
+	PHYDM_DBG(dm, ODM_COMP_API,
+		  "New Mask tone idx[%d]:  Reg0x%x = ((0x%x))\n",
+		  (tone_idx_tmp + tone_num_shift), target_reg, reg_tmp_value);
 }
 
-void
-phydm_set_nbi_reg(
-	void		*p_dm_void,
-	u32		tone_idx_tmp,
-	u32		bw
-)
+void phydm_set_nbi_reg(void *dm_void, u32 tone_idx_tmp, u32 bw)
 {
-	struct PHY_DM_STRUCT	*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	u32	nbi_table_128[NBI_TABLE_SIZE_128] = {25, 55, 85, 115, 135, 155, 185, 205, 225, 245,		/*1~10*/		/*tone_idx X 10*/
-		     265, 285, 305, 335, 355, 375, 395, 415, 435, 455,	/*11~20*/
-					     485, 505, 525, 555, 585, 615, 635
-						};				/*21~27*/
-
-	u32	nbi_table_256[NBI_TABLE_SIZE_256] = { 25,   55,   85, 115, 135, 155, 175, 195, 225, 245,	/*1~10*/
-		265, 285, 305, 325, 345, 365, 385, 405, 425, 445,	/*11~20*/
-		465, 485, 505, 525, 545, 565, 585, 605, 625, 645,	/*21~30*/
-		665, 695, 715, 735, 755, 775, 795, 815, 835, 855,	/*31~40*/
-		875, 895, 915, 935, 955, 975, 995, 1015, 1035, 1055,	/*41~50*/
-		      1085, 1105, 1125, 1145, 1175, 1195, 1225, 1255, 1275
-						};	/*51~59*/
-
-	u32	reg_idx = 0;
-	u32	i;
-	u8	nbi_table_idx = FFT_128_TYPE;
-
-	if (p_dm->support_ic_type & ODM_IC_11N_SERIES)
-
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	/*tone_idx X 10*/
+	u32 nbi_128[NBI_128TONE] = {25, 55, 85, 115, 135,
+				    155, 185, 205, 225, 245,
+				    265, 285, 305, 335, 355,
+				    375, 395, 415, 435, 455,
+				    485, 505, 525, 555, 585, 615, 635};
+	/*tone_idx X 10*/
+	u32 nbi_256[NBI_256TONE] = {25, 55, 85, 115, 135,
+				    155, 175, 195, 225, 245,
+				    265, 285, 305, 325, 345,
+				    365, 385, 405, 425, 445,
+				    465, 485, 505, 525, 545,
+				    565, 585, 605, 625, 645,
+				    665, 695, 715, 735, 755,
+				    775, 795, 815, 835, 855,
+				    875, 895, 915, 935, 955,
+				    975, 995, 1015, 1035, 1055,
+				    1085, 1105, 1125, 1145, 1175,
+				    1195, 1225, 1255, 1275};
+	u32 reg_idx = 0;
+	u32 i;
+	u8 nbi_table_idx = FFT_128_TYPE;
+
+	if (dm->support_ic_type & ODM_IC_11N_SERIES) {
 		nbi_table_idx = FFT_128_TYPE;
-	else if (p_dm->support_ic_type & ODM_IC_11AC_1_SERIES)
-
+	} else if (dm->support_ic_type & ODM_IC_11AC_1_SERIES) {
 		nbi_table_idx = FFT_256_TYPE;
-	else if (p_dm->support_ic_type & ODM_IC_11AC_2_SERIES) {
-
+	} else if (dm->support_ic_type & ODM_IC_11AC_2_SERIES) {
 		if (bw == 80)
 			nbi_table_idx = FFT_256_TYPE;
-		else /*20M, 40M*/
+		else /*@20M, 40M*/
 			nbi_table_idx = FFT_128_TYPE;
 	}
 
 	if (nbi_table_idx == FFT_128_TYPE) {
-
-		for (i = 0; i < NBI_TABLE_SIZE_128; i++) {
-			if (tone_idx_tmp < nbi_table_128[i]) {
+		for (i = 0; i < NBI_128TONE; i++) {
+			if (tone_idx_tmp < nbi_128[i]) {
 				reg_idx = i + 1;
 				break;
 			}
 		}
 
 	} else if (nbi_table_idx == FFT_256_TYPE) {
-
-		for (i = 0; i < NBI_TABLE_SIZE_256; i++) {
-			if (tone_idx_tmp < nbi_table_256[i]) {
+		for (i = 0; i < NBI_256TONE; i++) {
+			if (tone_idx_tmp < nbi_256[i]) {
 				reg_idx = i + 1;
 				break;
 			}
 		}
 	}
 
-	if (p_dm->support_ic_type & ODM_IC_11N_SERIES) {
-		odm_set_bb_reg(p_dm, 0xc40, 0x1f000000, reg_idx);
-		PHYDM_DBG(p_dm, ODM_COMP_API, ("Set tone idx:  Reg0xC40[28:24] = ((0x%x))\n", reg_idx));
-		/**/
+	if (dm->support_ic_type & ODM_IC_11N_SERIES) {
+		odm_set_bb_reg(dm, R_0xc40, 0x1f000000, reg_idx);
+		PHYDM_DBG(dm, ODM_COMP_API,
+			  "Set tone idx:  Reg0xC40[28:24] = ((0x%x))\n",
+			  reg_idx);
 	} else {
-		odm_set_bb_reg(p_dm, 0x87c, 0xfc000, reg_idx);
-		PHYDM_DBG(p_dm, ODM_COMP_API, ("Set tone idx: Reg0x87C[19:14] = ((0x%x))\n", reg_idx));
-		/**/
+		odm_set_bb_reg(dm, R_0x87c, 0xfc000, reg_idx);
+		PHYDM_DBG(dm, ODM_COMP_API,
+			  "Set tone idx: Reg0x87C[19:14] = ((0x%x))\n",
+			  reg_idx);
 	}
 }
 
-
-void
-phydm_nbi_enable(
-	void		*p_dm_void,
-	u32		enable
-)
+void phydm_nbi_enable(void *dm_void, u32 enable)
 {
-	struct PHY_DM_STRUCT	*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	u32		reg_value = 0;
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	u32 val = 0;
 
-	reg_value = (enable == FUNC_ENABLE) ? 1 : 0;
+	val = (enable == FUNC_ENABLE) ? 1 : 0;
 
-	if (p_dm->support_ic_type & ODM_IC_11N_SERIES) {
+	PHYDM_DBG(dm, ODM_COMP_API, "Enable NBI=%d\n", val);
 
-		odm_set_bb_reg(p_dm, 0xc40, BIT(9), reg_value);
-		PHYDM_DBG(p_dm, ODM_COMP_API, ("Enable NBI Reg0xC40[9] = ((0x%x))\n", reg_value));
-
-	} else if (p_dm->support_ic_type & ODM_IC_11AC_SERIES) {
-
-		if (p_dm->support_ic_type & (ODM_RTL8822B|ODM_RTL8821C)) {
-			odm_set_bb_reg(p_dm, 0x87c, BIT(13), reg_value);
-			odm_set_bb_reg(p_dm, 0xc20, BIT(28), reg_value);
-			if (p_dm->rf_type > RF_1T1R)
-				odm_set_bb_reg(p_dm, 0xe20, BIT(28), reg_value);
-		} else
-			odm_set_bb_reg(p_dm, 0x87c, BIT(13), reg_value);
-		PHYDM_DBG(p_dm, ODM_COMP_API, ("Enable NBI Reg0x87C[13] = ((0x%x))\n", reg_value));
+	if (dm->support_ic_type & ODM_IC_11N_SERIES) {
+		if (dm->support_ic_type & (ODM_RTL8192F | ODM_RTL8197F)) {
+			val = (enable == FUNC_ENABLE) ? 0xf : 0;
+			odm_set_bb_reg(dm, R_0xc50, 0xf000000, val);
+		} else {
+			odm_set_bb_reg(dm, R_0xc40, BIT(9), val);
+		}
+	} else if (dm->support_ic_type & ODM_IC_11AC_SERIES) {
+		if (dm->support_ic_type & (ODM_RTL8822B | ODM_RTL8821C)) {
+			odm_set_bb_reg(dm, R_0x87c, BIT(13), val);
+			odm_set_bb_reg(dm, R_0xc20, BIT(28), val);
+			if (dm->rf_type > RF_1T1R)
+				odm_set_bb_reg(dm, R_0xe20, BIT(28), val);
+		} else {
+			odm_set_bb_reg(dm, R_0x87c, BIT(13), val);
+		}
 	}
 }
 
-u8
-phydm_calculate_fc(
-	void		*p_dm_void,
-	u32		channel,
-	u32		bw,
-	u32		second_ch,
-	u32		*fc_in
-)
+u8 phydm_find_fc(void *dm_void, u32 channel, u32 bw, u32 second_ch, u32 *fc_in)
 {
-	struct PHY_DM_STRUCT	*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	u32		fc = *fc_in;
-	u32		start_ch_per_40m[NUM_START_CH_40M] = {36, 44, 52, 60, 100, 108, 116, 124, 132, 140, 149, 157, 165, 173};
-	u32		start_ch_per_80m[NUM_START_CH_80M] = {36, 52, 100, 116, 132, 149, 165};
-	u32		*p_start_ch = &(start_ch_per_40m[0]);
-	u32		num_start_channel = NUM_START_CH_40M;
-	u32		channel_offset = 0;
-	u32		i;
-
-	/*2.4G*/
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	u32 fc = *fc_in;
+	u32 start_ch_per_40m[NUM_START_CH_40M] = {36, 44, 52, 60, 100,
+						  108, 116, 124, 132, 140,
+						  149, 157, 165, 173};
+	u32 start_ch_per_80m[NUM_START_CH_80M] = {36, 52, 100, 116, 132,
+						  149, 165};
+	u32 *start_ch = &start_ch_per_40m[0];
+	u32 num_start_channel = NUM_START_CH_40M;
+	u32 channel_offset = 0;
+	u32 i;
+
+	/*@2.4G*/
 	if (channel <= 14 && channel > 0) {
-
 		if (bw == 80)
-			return	PHYDM_SET_FAIL;
+			return PHYDM_SET_FAIL;
 
 		fc = 2412 + (channel - 1) * 5;
 
-		if (bw == 40 && (second_ch == PHYDM_ABOVE)) {
-
+		if (bw == 40 && second_ch == PHYDM_ABOVE) {
 			if (channel >= 10) {
-				PHYDM_DBG(p_dm, ODM_COMP_API, ("CH = ((%d)), Scnd_CH = ((%d)) Error setting\n", channel, second_ch));
-				return	PHYDM_SET_FAIL;
+				PHYDM_DBG(dm, ODM_COMP_API,
+					  "CH = ((%d)), Scnd_CH = ((%d)) Error setting\n",
+					  channel, second_ch);
+				return PHYDM_SET_FAIL;
 			}
 			fc += 10;
 		} else if (bw == 40 && (second_ch == PHYDM_BELOW)) {
-
 			if (channel <= 2) {
-				PHYDM_DBG(p_dm, ODM_COMP_API, ("CH = ((%d)), Scnd_CH = ((%d)) Error setting\n", channel, second_ch));
-				return	PHYDM_SET_FAIL;
+				PHYDM_DBG(dm, ODM_COMP_API,
+					  "CH = ((%d)), Scnd_CH = ((%d)) Error setting\n",
+					  channel, second_ch);
+				return PHYDM_SET_FAIL;
 			}
 			fc -= 10;
 		}
 	}
-	/*5G*/
+	/*@5G*/
 	else if (channel >= 36 && channel <= 177) {
-
 		if (bw != 20) {
-
 			if (bw == 40) {
 				num_start_channel = NUM_START_CH_40M;
-				p_start_ch = &(start_ch_per_40m[0]);
+				start_ch = &start_ch_per_40m[0];
 				channel_offset = CH_OFFSET_40M;
 			} else if (bw == 80) {
 				num_start_channel = NUM_START_CH_80M;
-				p_start_ch = &(start_ch_per_80m[0]);
+				start_ch = &start_ch_per_80m[0];
 				channel_offset = CH_OFFSET_80M;
 			}
 
 			for (i = 0; i < (num_start_channel - 1); i++) {
-
-				if (channel < p_start_ch[i + 1]) {
-					channel = p_start_ch[i] + channel_offset;
+				if (channel < start_ch[i + 1]) {
+					channel = start_ch[i] + channel_offset;
 					break;
 				}
 			}
-			PHYDM_DBG(p_dm, ODM_COMP_API, ("Mod_CH = ((%d))\n", channel));
+			PHYDM_DBG(dm, ODM_COMP_API, "Mod_CH = ((%d))\n",
+				  channel);
 		}
 
 		fc = 5180 + (channel - 36) * 5;
 
 	} else {
-		PHYDM_DBG(p_dm, ODM_COMP_API, ("CH = ((%d)) Error setting\n", channel));
-		return	PHYDM_SET_FAIL;
+		PHYDM_DBG(dm, ODM_COMP_API, "CH = ((%d)) Error setting\n",
+			  channel);
+		return PHYDM_SET_FAIL;
 	}
 
 	*fc_in = fc;
@@ -694,492 +1186,1764 @@ phydm_calculate_fc(
 	return PHYDM_SET_SUCCESS;
 }
 
-
-u8
-phydm_calculate_intf_distance(
-	void		*p_dm_void,
-	u32		bw,
-	u32		fc,
-	u32		f_interference,
-	u32		*p_tone_idx_tmp_in
-)
+u8 phydm_find_intf_distance(void *dm_void, u32 bw, u32 fc, u32 f_interference,
+			    u32 *tone_idx_tmp_in)
 {
-	struct PHY_DM_STRUCT	*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	u32		bw_up, bw_low;
-	u32		int_distance;
-	u32		tone_idx_tmp;
-	u8		set_result = PHYDM_SET_NO_NEED;
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	u32 bw_up = 0, bw_low = 0;
+	u32 int_distance = 0;
+	u32 tone_idx_tmp = 0;
+	u8 set_result = PHYDM_SET_NO_NEED;
 
 	bw_up = fc + bw / 2;
 	bw_low = fc - bw / 2;
 
-	PHYDM_DBG(p_dm, ODM_COMP_API, ("[f_l, fc, fh] = [ %d, %d, %d ], f_int = ((%d))\n", bw_low, fc, bw_up, f_interference));
+	PHYDM_DBG(dm, ODM_COMP_API,
+		  "[f_l, fc, fh] = [ %d, %d, %d ], f_int = ((%d))\n", bw_low,
+		  fc, bw_up, f_interference);
+
+	if (f_interference >= bw_low && f_interference <= bw_up) {
+		int_distance = DIFF_2(fc, f_interference);
+		/*@10*(int_distance /0.3125)*/
+		tone_idx_tmp = (int_distance << 5);
+		PHYDM_DBG(dm, ODM_COMP_API,
+			  "int_distance = ((%d MHz)) Mhz, tone_idx_tmp = ((%d.%d))\n",
+			  int_distance, tone_idx_tmp / 10,
+			  tone_idx_tmp % 10);
+		*tone_idx_tmp_in = tone_idx_tmp;
+		set_result = PHYDM_SET_SUCCESS;
+	}
+
+	return set_result;
+}
 
-	if ((f_interference >= bw_low) && (f_interference <= bw_up)) {
+u8 phydm_csi_mask_setting(void *dm_void, u32 enable, u32 ch, u32 bw,
+			  u32 f_intf, u32 sec_ch)
+{
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	u32 fc = 2412;
+	u8 direction = FREQ_POSITIVE;
+	u32 tone_idx = 0;
+	u8 set_result = PHYDM_SET_SUCCESS;
+	u8 rpt = 0;
 
-		int_distance = (fc >= f_interference) ? (fc - f_interference) : (f_interference - fc);
-		tone_idx_tmp = (int_distance << 5); /* =10*(int_distance /0.3125) */
-		PHYDM_DBG(p_dm, ODM_COMP_API, ("int_distance = ((%d MHz)) Mhz, tone_idx_tmp = ((%d.%d))\n", int_distance, (tone_idx_tmp / 10), (tone_idx_tmp % 10)));
-		*p_tone_idx_tmp_in = tone_idx_tmp;
+	if (enable == FUNC_DISABLE) {
 		set_result = PHYDM_SET_SUCCESS;
+		phydm_clean_all_csi_mask(dm);
+
+	} else {
+		PHYDM_DBG(dm, ODM_COMP_API,
+			  "[Set CSI MASK_] CH = ((%d)), BW = ((%d)), f_intf = ((%d)), Scnd_CH = ((%s))\n",
+			  ch, bw, f_intf,
+			  (((bw == 20) || (ch > 14)) ? "Don't care" :
+			  (sec_ch == PHYDM_ABOVE) ? "H" : "L"));
+
+		/*@calculate fc*/
+		if (phydm_find_fc(dm, ch, bw, sec_ch, &fc) == PHYDM_SET_FAIL) {
+			set_result = PHYDM_SET_FAIL;
+		} else {
+			/*@calculate interference distance*/
+			rpt = phydm_find_intf_distance(dm, bw, fc, f_intf,
+						       &tone_idx);
+			if (rpt == PHYDM_SET_SUCCESS) {
+				if (f_intf >= fc)
+					direction = FREQ_POSITIVE;
+				else
+					direction = FREQ_NEGATIVE;
+
+				phydm_set_csi_mask(dm, tone_idx, direction);
+				set_result = PHYDM_SET_SUCCESS;
+			} else {
+				set_result = PHYDM_SET_NO_NEED;
+			}
+		}
 	}
 
-	return	set_result;
+	if (set_result == PHYDM_SET_SUCCESS)
+		phydm_csi_mask_enable(dm, enable);
+	else
+		phydm_csi_mask_enable(dm, FUNC_DISABLE);
 
+	return set_result;
 }
 
+#ifdef PHYDM_IC_JGR3_SERIES_SUPPORT
+u8 phydm_find_intf_distance_jgr3(void *dm_void, u32 bw, u32 fc,
+				 u32 f_interference, u32 *tone_idx_tmp_in)
+{
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	u32 bw_up = 0, bw_low = 0;
+	u32 int_distance = 0;
+	u32 tone_idx_tmp = 0;
+	u8 set_result = PHYDM_SET_NO_NEED;
+
+	bw_up = 1000 * (fc + bw / 2);
+	bw_low = 1000 * (fc - bw / 2);
+	fc = 1000 * fc;
+
+	PHYDM_DBG(dm, ODM_COMP_API,
+		  "[f_l, fc, fh] = [ %d, %d, %d ], f_int = ((%d))\n", bw_low,
+		  fc, bw_up, f_interference);
+
+	if (f_interference >= bw_low && f_interference <= bw_up) {
+		int_distance = DIFF_2(fc, f_interference);
+		/*@10*(int_distance /0.3125)*/
+		tone_idx_tmp = (int_distance / 312);
+		PHYDM_DBG(dm, ODM_COMP_API,
+			  "int_distance = ((%d)) , tone_idx_tmp = ((%d))\n",
+			  int_distance, tone_idx_tmp);
+		*tone_idx_tmp_in = tone_idx_tmp;
+		set_result = PHYDM_SET_SUCCESS;
+	}
 
-u8
-phydm_csi_mask_setting(
-	void		*p_dm_void,
-	u32		enable,
-	u32		channel,
-	u32		bw,
-	u32		f_interference,
-	u32		second_ch
-)
+	return set_result;
+}
+u8 phydm_csi_mask_setting_jgr3(void *dm_void, u32 enable, u32 ch, u32 bw,
+			       u32 f_intf, u32 sec_ch, u8 wgt)
 {
-	struct PHY_DM_STRUCT	*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	u32		fc = 2412;
-	u8		tone_direction;
-	u32		tone_idx_tmp;
-	u8		set_result = PHYDM_SET_SUCCESS;
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	u32 fc = 2412;
+	u8 direction = FREQ_POSITIVE;
+	u32 tone_idx = 0;
+	u8 set_result = PHYDM_SET_SUCCESS;
+	u8 rpt = 0;
 
 	if (enable == FUNC_DISABLE) {
+		phydm_csi_mask_enable(dm, FUNC_ENABLE);
+		phydm_clean_all_csi_mask(dm);
+		phydm_csi_mask_enable(dm, FUNC_DISABLE);
 		set_result = PHYDM_SET_SUCCESS;
-		phydm_clean_all_csi_mask(p_dm);
-
 	} else {
+		PHYDM_DBG(dm, ODM_COMP_API,
+			  "[Set CSI MASK] CH = ((%d)), BW = ((%d)), f_intf = ((%d)), Scnd_CH = ((%s)), wgt = ((%d))\n",
+			  ch, bw, f_intf,
+			  (((bw == 20) || (ch > 14)) ? "Don't care" :
+			  (sec_ch == PHYDM_ABOVE) ? "H" : "L"), wgt);
+
+		/*@calculate fc*/
+		if (phydm_find_fc(dm, ch, bw, sec_ch, &fc) == PHYDM_SET_FAIL) {
+			set_result = PHYDM_SET_FAIL;
+		} else {
+			/*@calculate interference distance*/
+			rpt = phydm_find_intf_distance_jgr3(dm, bw, fc, f_intf,
+							    &tone_idx);
+			if (rpt == PHYDM_SET_SUCCESS) {
+				if (f_intf >= 1000 * fc)
+					direction = FREQ_POSITIVE;
+				else
+					direction = FREQ_NEGATIVE;
+
+				phydm_csi_mask_enable(dm, FUNC_ENABLE);
+				phydm_set_csi_mask_jgr3(dm, tone_idx, direction,
+							wgt);
+				set_result = PHYDM_SET_SUCCESS;
+			} else {
+				set_result = PHYDM_SET_NO_NEED;
+			}
+		}
+		if (!(set_result == PHYDM_SET_SUCCESS))
+			phydm_csi_mask_enable(dm, FUNC_DISABLE);
+	}
 
-		PHYDM_DBG(p_dm, ODM_COMP_API, ("[Set CSI MASK_] CH = ((%d)), BW = ((%d)), f_intf = ((%d)), Scnd_CH = ((%s))\n",
-			channel, bw, f_interference, (((bw == 20) || (channel > 14)) ? "Don't care" : (second_ch == PHYDM_ABOVE) ? "H" : "L")));
+	return set_result;
+}
 
-		/*calculate fc*/
-		if (phydm_calculate_fc(p_dm, channel, bw, second_ch, &fc) == PHYDM_SET_FAIL)
-			set_result = PHYDM_SET_FAIL;
+void phydm_set_csi_mask_jgr3(void *dm_void, u32 tone_idx_tmp, u8 tone_direction,
+			     u8 wgt)
+{
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	u32 reg_tmp_value = 0;
+	u32 tone_num = 64;
+	u32 table_addr = 0;
+	u32 addr = 0;
+	u8 rf_bw = 0;
+	u8 value = 0;
+
+	rf_bw = odm_read_1byte(dm, R_0x9b0);
+	if (((rf_bw & 0xc) >> 2) == 0x2)
+		tone_num = 128; /* @RF80 : tone(-1) at tone_idx=255 */
+	else
+		tone_num = 64; /* @RF20/40 : tone(-1) at tone_idx=127 */
+
+	if (tone_direction == FREQ_POSITIVE) {
+		if (tone_idx_tmp >= (tone_num - 1))
+			tone_idx_tmp = (tone_num - 1);
+	} else {
+		if (tone_idx_tmp >= tone_num)
+			tone_idx_tmp = tone_num;
 
-		else {
-			/*calculate interference distance*/
-			if (phydm_calculate_intf_distance(p_dm, bw, fc, f_interference, &tone_idx_tmp) == PHYDM_SET_SUCCESS) {
+		tone_idx_tmp = (tone_num << 1) - tone_idx_tmp;
+	}
+	table_addr = tone_idx_tmp >> 1;
+
+	reg_tmp_value = odm_read_4byte(dm, R_0x1d94);
+	PHYDM_DBG(dm, ODM_COMP_API,
+		  "Pre Mask tone idx[%d]: Reg0x1d94 = ((0x%x))\n",
+		  tone_idx_tmp, reg_tmp_value);
+	odm_set_bb_reg(dm, R_0x1ee8, 0x3, 0x3);
+	odm_set_bb_reg(dm, R_0x1d94, BIT(31) | BIT(30), 0x1);
+	odm_set_bb_reg(dm, R_0x1d94, MASKBYTE2, (table_addr & 0xff));
+	if (tone_idx_tmp % 2)
+		value = (BIT(3) | (wgt & 0x7)) << 4;
+	else
+		value = BIT(3) | (wgt & 0x7);
+
+	odm_set_bb_reg(dm, R_0x1d94, 0xff, value);
+	reg_tmp_value = odm_read_4byte(dm, R_0x1d94);
+	PHYDM_DBG(dm, ODM_COMP_API,
+		  "New Mask tone idx[%d]: Reg0x1d94 = ((0x%x))\n",
+		  tone_idx_tmp, reg_tmp_value);
+	odm_set_bb_reg(dm, R_0x1ee8, 0x3, 0x0);
+}
+
+u8 phydm_nbi_setting_jgr3(void *dm_void, u32 enable, u32 ch, u32 bw, u32 f_intf,
+			  u32 sec_ch, u8 path)
+{
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	u32 fc = 2412;
+	u8 direction = FREQ_POSITIVE;
+	u32 tone_idx = 0;
+	u8 set_result = PHYDM_SET_SUCCESS;
+	u8 rpt = 0;
 
-				tone_direction = (f_interference >= fc) ? FREQ_POSITIVE : FREQ_NEGATIVE;
-				phydm_set_csi_mask_reg(p_dm, tone_idx_tmp, tone_direction);
+	if (enable == FUNC_DISABLE) {
+		set_result = PHYDM_SET_SUCCESS;
+	} else {
+		PHYDM_DBG(dm, ODM_COMP_API,
+			  "[Set NBI] CH = ((%d)), BW = ((%d)), f_intf = ((%d)), Scnd_CH = ((%s))\n",
+			  ch, bw, f_intf,
+			  (((sec_ch == PHYDM_DONT_CARE) || (bw == 20) ||
+			  (ch > 14)) ? "Don't care" :
+			  (sec_ch == PHYDM_ABOVE) ? "H" : "L"));
+
+		/*@calculate fc*/
+		if (phydm_find_fc(dm, ch, bw, sec_ch, &fc) == PHYDM_SET_FAIL) {
+			set_result = PHYDM_SET_FAIL;
+		} else {
+			/*@calculate interference distance*/
+			rpt = phydm_find_intf_distance(dm, bw, fc, f_intf,
+						       &tone_idx);
+			if (rpt == PHYDM_SET_SUCCESS) {
+				if (f_intf >= fc)
+					direction = FREQ_POSITIVE;
+				else
+					direction = FREQ_NEGATIVE;
+
+				phydm_set_nbi_reg_jgr3(dm, tone_idx, direction,
+						       path);
 				set_result = PHYDM_SET_SUCCESS;
-			} else
+			} else {
 				set_result = PHYDM_SET_NO_NEED;
 		}
 	}
+	}
 
 	if (set_result == PHYDM_SET_SUCCESS)
-		phydm_csi_mask_enable(p_dm, enable);
+		phydm_nbi_enable_jgr3(dm, enable, path);
 	else
-		phydm_csi_mask_enable(p_dm, FUNC_DISABLE);
+		phydm_nbi_enable_jgr3(dm, FUNC_DISABLE, path);
 
-	return	set_result;
+	return set_result;
 }
 
-u8
-phydm_nbi_setting(
-	void		*p_dm_void,
-	u32		enable,
-	u32		channel,
-	u32		bw,
-	u32		f_interference,
-	u32		second_ch
-)
+void phydm_set_nbi_reg_jgr3(void *dm_void, u32 tone_idx_tmp, u8 tone_direction,
+			    u8 path)
 {
-	struct PHY_DM_STRUCT	*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	u32		fc = 2412;
-	u32		tone_idx_tmp;
-	u8		set_result = PHYDM_SET_SUCCESS;
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	u32 reg_tmp_value = 0;
+	u32 tone_num = 64;
+	u32 tone_num_shift = 0;
+	u32 addr = 0;
+	u8 rf_bw = 0;
+
+	/* @calculate real tone idx*/
+	if ((tone_idx_tmp % 10) >= 5)
+		tone_idx_tmp += 10;
 
-	if (enable == FUNC_DISABLE)
-		set_result = PHYDM_SET_SUCCESS;
+	tone_idx_tmp = (tone_idx_tmp / 10);
+
+	rf_bw = odm_read_1byte(dm, R_0x9b0);
+	if (((rf_bw & 0xc) >> 2) == 0x2)
+		tone_num = 128; /* RF80 : tone-1 at tone_idx=255 */
+	else
+		tone_num = 64; /* RF20/40 : tone-1 at tone_idx=127 */
 
-	else {
+	if (tone_direction == FREQ_POSITIVE) {
+		if (tone_idx_tmp >= (tone_num - 1))
+			tone_idx_tmp = (tone_num - 1);
+	} else {
+		tone_num_shift = tone_num;
+		if (tone_idx_tmp >= tone_num)
+			tone_idx_tmp = tone_num;
+
+		tone_idx_tmp = (tone_num << 1) - tone_idx_tmp;
+	}
+
+	switch (path) {
+	case RF_PATH_A:
+		odm_set_bb_reg(dm, R_0x1944, 0x001FF000, tone_idx_tmp);
+		PHYDM_DBG(dm, ODM_COMP_API,
+			  "Set tone idx[%d]:PATH-A = ((0x%x))\n",
+			  (tone_idx_tmp + tone_num_shift), tone_idx_tmp);
+		break;
+	#if (defined(PHYDM_COMPILE_ABOVE_2SS))
+	case RF_PATH_B:
+		odm_set_bb_reg(dm, R_0x4044, 0x001FF000, tone_idx_tmp);
+		PHYDM_DBG(dm, ODM_COMP_API,
+			  "Set tone idx[%d]:PATH-B = ((0x%x))\n",
+			  (tone_idx_tmp + tone_num_shift), tone_idx_tmp);
+		break;
+	#endif
+	#if (defined(PHYDM_COMPILE_ABOVE_3SS))
+	case RF_PATH_C:
+		odm_set_bb_reg(dm, R_0x5044, 0x001FF000, tone_idx_tmp);
+		PHYDM_DBG(dm, ODM_COMP_API,
+			  "Set tone idx[%d]:PATH-C = ((0x%x))\n",
+			  (tone_idx_tmp + tone_num_shift), tone_idx_tmp);
+		break;
+	#endif
+	#if (defined(PHYDM_COMPILE_ABOVE_4SS))
+	case RF_PATH_D:
+		odm_set_bb_reg(dm, R_0x5144, 0x001FF000, tone_idx_tmp);
+		PHYDM_DBG(dm, ODM_COMP_API,
+			  "Set tone idx[%d]:PATH-D = ((0x%x))\n",
+			  (tone_idx_tmp + tone_num_shift), tone_idx_tmp);
+		break;
+	#endif
+	default:
+		break;
+	}
+}
+
+void phydm_nbi_enable_jgr3(void *dm_void, u32 enable, u8 path)
+{
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	boolean val = false;
 
-		PHYDM_DBG(p_dm, ODM_COMP_API, ("[Set NBI] CH = ((%d)), BW = ((%d)), f_intf = ((%d)), Scnd_CH = ((%s))\n",
-			channel, bw, f_interference, (((second_ch == PHYDM_DONT_CARE) || (bw == 20) || (channel > 14)) ? "Don't care" : (second_ch == PHYDM_ABOVE) ? "H" : "L")));
+	val = (enable == FUNC_ENABLE) ? true : false;
 
-		/*calculate fc*/
-		if (phydm_calculate_fc(p_dm, channel, bw, second_ch, &fc) == PHYDM_SET_FAIL)
+	PHYDM_DBG(dm, ODM_COMP_API, "Enable NBI=%d\n", val);
+
+	odm_set_bb_reg(dm, R_0x818, BIT(11), val);
+	if (enable == FUNC_ENABLE) {
+		switch (path) {
+		case RF_PATH_A:
+			odm_set_bb_reg(dm, R_0x1940, BIT(31), val);
+			break;
+		#if (defined(PHYDM_COMPILE_ABOVE_2SS))
+		case RF_PATH_B:
+			odm_set_bb_reg(dm, R_0x4040, BIT(31), val);
+			break;
+		#endif
+		#if (defined(PHYDM_COMPILE_ABOVE_3SS))
+		case RF_PATH_C:
+			odm_set_bb_reg(dm, R_0x5040, BIT(31), val);
+			break;
+		#endif
+		#if (defined(PHYDM_COMPILE_ABOVE_4SS))
+		case RF_PATH_D:
+			odm_set_bb_reg(dm, R_0x5140, BIT(31), val);
+			break;
+		#endif
+		default:
+			break;
+		}
+	} else {
+		odm_set_bb_reg(dm, R_0x1940, BIT(31), val);
+		#if (defined(PHYDM_COMPILE_ABOVE_2SS))
+		odm_set_bb_reg(dm, R_0x4040, BIT(31), val);
+		#endif
+		#if (defined(PHYDM_COMPILE_ABOVE_3SS))
+		odm_set_bb_reg(dm, R_0x5040, BIT(31), val);
+		#endif
+		#if (defined(PHYDM_COMPILE_ABOVE_4SS))
+		odm_set_bb_reg(dm, R_0x5140, BIT(31), val);
+		#endif
+	}
+}
+
+u8 phydm_phystat_rpt_jgr3(void *dm_void, enum phystat_rpt info,
+			  enum rf_path ant_path)
+{
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	s8 evm_org, cfo_org, rxsnr_org;
+	u8 i, return_info = 0, tmp_lsb = 0, tmp_msb = 0, tmp_info = 0;
+
+	/* Update the status for each pkt */
+	odm_set_bb_reg(dm, R_0x8c4, 0xfff000, 0x448);
+	odm_set_bb_reg(dm, R_0x8c0, MASKLWORD, 0x4001);
+	/* PHY status Page1 */
+	odm_set_bb_reg(dm, R_0x8c0, 0x3C00000, 0x1);
+	/*choose debug port for phystatus */
+	odm_set_bb_reg(dm, R_0x1c3c, 0xFFF00, 0x380);
+
+	if (info == PHY_PWDB) {
+		/* Choose the report of the diff path */
+		if (ant_path == RF_PATH_A)
+			odm_set_bb_reg(dm, R_0x8c4, 0x3ff, 0x1);
+		else if (ant_path == RF_PATH_B)
+			odm_set_bb_reg(dm, R_0x8c4, 0x3ff, 0x2);
+		else if (ant_path == RF_PATH_C)
+			odm_set_bb_reg(dm, R_0x8c4, 0x3ff, 0x3);
+		else if (ant_path == RF_PATH_D)
+			odm_set_bb_reg(dm, R_0x8c4, 0x3ff, 0x4);
+	} else if (info == PHY_EVM) {
+		/* Choose the report of the diff path */
+		if (ant_path == RF_PATH_A)
+			odm_set_bb_reg(dm, R_0x8c4, 0x3ff, 0x10);
+		else if (ant_path == RF_PATH_B)
+			odm_set_bb_reg(dm, R_0x8c4, 0x3ff, 0x11);
+		else if (ant_path == RF_PATH_C)
+			odm_set_bb_reg(dm, R_0x8c4, 0x3ff, 0x12);
+		else if (ant_path == RF_PATH_D)
+			odm_set_bb_reg(dm, R_0x8c4, 0x3ff, 0x13);
+		return_info = (u8)odm_get_bb_reg(dm, R_0x2dbc, 0xff);
+	} else if (info == PHY_CFO) {
+		/* Choose the report of the diff path */
+		if (ant_path == RF_PATH_A)
+			odm_set_bb_reg(dm, R_0x8c4, 0x3ff, 0x14);
+		else if (ant_path == RF_PATH_B)
+			odm_set_bb_reg(dm, R_0x8c4, 0x3ff, 0x15);
+		else if (ant_path == RF_PATH_C)
+			odm_set_bb_reg(dm, R_0x8c4, 0x3ff, 0x16);
+		else if (ant_path == RF_PATH_D)
+			odm_set_bb_reg(dm, R_0x8c4, 0x3ff, 0x17);
+		return_info = (u8)odm_get_bb_reg(dm, R_0x2dbc, 0xff);
+	} else if (info == PHY_RXSNR) {
+		/* Choose the report of the diff path */
+		if (ant_path == RF_PATH_A)
+			odm_set_bb_reg(dm, R_0x8c4, 0x3ff, 0x18);
+		else if (ant_path == RF_PATH_B)
+			odm_set_bb_reg(dm, R_0x8c4, 0x3ff, 0x19);
+		else if (ant_path == RF_PATH_C)
+			odm_set_bb_reg(dm, R_0x8c4, 0x3ff, 0x1a);
+		else if (ant_path == RF_PATH_D)
+			odm_set_bb_reg(dm, R_0x8c4, 0x3ff, 0x1b);
+		return_info = (u8)odm_get_bb_reg(dm, R_0x2dbc, 0xff);
+	} else if (info == PHY_LGAIN) {
+		/* choose page */
+		odm_set_bb_reg(dm, R_0x8c0, 0x3c00000, 0x2);
+		/* Choose the report of the diff path */
+		if (ant_path == RF_PATH_A) {
+			odm_set_bb_reg(dm, R_0x8c4, 0x3ff, 0xd);
+			tmp_info = (u8)odm_get_bb_reg(dm, R_0x2dbc, 0x3f);
+			return_info = tmp_info;
+		} else if (ant_path == RF_PATH_B) {
+			odm_set_bb_reg(dm, R_0x8c4, 0x3ff, 0xd);
+			tmp_lsb = (u8)odm_get_bb_reg(dm, R_0x2dbc, 0xc0);
+			odm_set_bb_reg(dm, R_0x8c4, 0x3ff, 0xe);
+			tmp_msb = (u8)odm_get_bb_reg(dm, R_0x2dbc, 0xf);
+			tmp_info |= (tmp_msb << 2) | tmp_lsb;
+			return_info = tmp_info;
+		} else if (ant_path == RF_PATH_C) {
+			odm_set_bb_reg(dm, R_0x8c4, 0x3ff, 0xe);
+			tmp_lsb = (u8)odm_get_bb_reg(dm, R_0x2dbc, 0xf0);
+			odm_set_bb_reg(dm, R_0x8c4, 0x3ff, 0xf);
+			tmp_msb = (u8)odm_get_bb_reg(dm, R_0x2dbc, 0x3);
+			tmp_info |= (tmp_msb << 4) | tmp_lsb;
+			return_info = tmp_info;
+		} else if (ant_path == RF_PATH_D) {
+			odm_set_bb_reg(dm, R_0x8c4, 0x3ff, 0x10);
+			tmp_info = (u8)odm_get_bb_reg(dm, R_0x2dbc, 0x3f);
+			return_info = tmp_info;
+		}
+	} else if (info == PHY_HT_AAGC_GAIN) {
+		/* choose page */
+		odm_set_bb_reg(dm, R_0x8c0, 0x3c00000, 0x2);
+		/* Choose the report of the diff path */
+		if (ant_path == RF_PATH_A)
+			odm_set_bb_reg(dm, R_0x8c4, 0x3ff, 0x12);
+		else if (ant_path == RF_PATH_B)
+			odm_set_bb_reg(dm, R_0x8c4, 0x3ff, 0x13);
+		else if (ant_path == RF_PATH_C)
+			odm_set_bb_reg(dm, R_0x8c4, 0x3ff, 0x14);
+		else if (ant_path == RF_PATH_D)
+			odm_set_bb_reg(dm, R_0x8c4, 0x3ff, 0x15);
+		return_info = (u8)odm_get_bb_reg(dm, R_0x2dbc, 0xff);
+	}
+	return return_info;
+}
+
+void phydm_ex_hal8814b_wifi_only_hw_config(void *dm_void)
+{
+	/*BB control*/
+	/*halwifionly_phy_set_bb_reg(pwifionlycfg, 0x4c, 0x01800000, 0x2);*/
+	/*SW control*/
+	/*halwifionly_phy_set_bb_reg(pwifionlycfg, 0xcb4, 0xff, 0x77);*/
+	/*antenna mux switch */
+	/*halwifionly_phy_set_bb_reg(pwifionlycfg, 0x974, 0x300, 0x3);*/
+
+	/*halwifionly_phy_set_bb_reg(pwifionlycfg, 0x1990, 0x300, 0x0);*/
+
+	/*halwifionly_phy_set_bb_reg(pwifionlycfg, 0xcbc, 0x80000, 0x0);*/
+	/*switch to WL side controller and gnt_wl gnt_bt debug signal */
+	/*halwifionly_phy_set_bb_reg(pwifionlycfg, 0x70, 0xff000000, 0x0e);*/
+	/*gnt_wl=1 , gnt_bt=0*/
+	/*halwifionly_phy_set_bb_reg(pwifionlycfg, 0x1704, 0xffffffff,
+	 *			     0x7700);
+	 */
+	/*halwifionly_phy_set_bb_reg(pwifionlycfg, 0x1700, 0xffffffff,
+	 *			     0xc00f0038);
+	 */
+}
+
+void phydm_user_position_for_sniffer(void *dm_void, u8 user_position)
+{
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+
+	/* user position valid */
+	odm_set_bb_reg(dm, R_0xa68, BIT(17), 1);
+	/* Select user seat from pmac */
+	odm_set_bb_reg(dm, R_0xa68, BIT(16), 1);
+	/*user seat*/
+	odm_set_bb_reg(dm, R_0xa68, (BIT(19) | BIT(18)), user_position);
+}
+
+void phydm_txagc_power_limit(void *dm_void, boolean is_bf, u8 ss, u8 pwr)
+{
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	u8 tx_bw = 0;
+
+	if (!(dm->support_ic_type & ODM_IC_JGR3_SERIES)) {
+		PHYDM_DBG(dm, ODM_COMP_API, "Not JGR3!\n");
+		return;
+	}
+
+	tx_bw = (u8)odm_get_bb_reg(dm, R_0x9b0, 0x3);
+
+	if (is_bf) {
+		switch (tx_bw) {
+		case 1:
+			if (ss == 1) {
+				odm_set_bb_reg(dm, R_0x18f8, 0x007F0000, pwr);
+				odm_set_bb_reg(dm, R_0x41f8, 0x007F0000, pwr);
+			} else if (ss == 2) {
+				odm_set_bb_reg(dm, R_0x18f8, 0x7F000000, pwr);
+				odm_set_bb_reg(dm, R_0x41f8, 0x7F000000, pwr);
+			}
+			break;
+		case 2:
+			if (ss == 1) {
+				odm_set_bb_reg(dm, R_0x18fc, 0x007F0000, pwr);
+				odm_set_bb_reg(dm, R_0x41fc, 0x007F0000, pwr);
+			} else if (ss == 2) {
+				odm_set_bb_reg(dm, R_0x18fc, 0x7F000000, pwr);
+				odm_set_bb_reg(dm, R_0x41fc, 0x7F000000, pwr);
+			}
+			break;
+		case 3:
+			if (ss == 1) {
+				odm_set_bb_reg(dm, R_0x1864, 0x7F000000, pwr);
+				odm_set_bb_reg(dm, R_0x4164, 0x7F000000, pwr);
+			} else if (ss == 2) {
+				odm_set_bb_reg(dm, R_0x18f0, 0x7F000000, pwr);
+				odm_set_bb_reg(dm, R_0x41f0, 0x7F000000, pwr);
+			}
+			break;
+		default:
+			break;
+		}
+	} else {
+		switch (tx_bw) {
+		case 1:
+			if (ss == 1) {
+				odm_set_bb_reg(dm, R_0x18f8, 0x0000007F, pwr);
+				odm_set_bb_reg(dm, R_0x41f8, 0x0000007F, pwr);
+			} else if (ss == 2) {
+				odm_set_bb_reg(dm, R_0x18f8, 0x00007F00, pwr);
+				odm_set_bb_reg(dm, R_0x41f8, 0x00007F00, pwr);
+			}
+			break;
+		case 2:
+			if (ss == 1) {
+				odm_set_bb_reg(dm, R_0x18fc, 0x0000007F, pwr);
+				odm_set_bb_reg(dm, R_0x41fc, 0x0000007F, pwr);
+			} else if (ss == 2) {
+				odm_set_bb_reg(dm, R_0x18fc, 0x00007F00, pwr);
+				odm_set_bb_reg(dm, R_0x41fc, 0x00007F00, pwr);
+			}
+			break;
+		case 3:
+			if (ss == 1) {
+				odm_set_bb_reg(dm, R_0x180c, 0x07F00000, pwr);
+				odm_set_bb_reg(dm, R_0x410c, 0x07F00000, pwr);
+			} else if (ss == 2) {
+				odm_set_bb_reg(dm, R_0x1860, 0x000007F0, pwr);
+				odm_set_bb_reg(dm, R_0x4160, 0x000007F0, pwr);
+			}
+			break;
+		default:
+			break;
+		}
+	}
+}
+#endif
+u8 phydm_nbi_setting(void *dm_void, u32 enable, u32 ch, u32 bw, u32 f_intf,
+		     u32 sec_ch)
+{
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	u32 fc = 2412;
+	u8 direction = FREQ_POSITIVE;
+	u32 tone_idx = 0;
+	u8 set_result = PHYDM_SET_SUCCESS;
+	u8 rpt = 0;
+
+	if (enable == FUNC_DISABLE) {
+		set_result = PHYDM_SET_SUCCESS;
+	} else {
+		PHYDM_DBG(dm, ODM_COMP_API,
+			  "[Set NBI] CH = ((%d)), BW = ((%d)), f_intf = ((%d)), Scnd_CH = ((%s))\n",
+			  ch, bw, f_intf,
+			  (((sec_ch == PHYDM_DONT_CARE) || (bw == 20) ||
+			  (ch > 14)) ? "Don't care" :
+			  (sec_ch == PHYDM_ABOVE) ? "H" : "L"));
+
+		/*@calculate fc*/
+		if (phydm_find_fc(dm, ch, bw, sec_ch, &fc) == PHYDM_SET_FAIL) {
 			set_result = PHYDM_SET_FAIL;
+		} else {
+			/*@calculate interference distance*/
+			rpt = phydm_find_intf_distance(dm, bw, fc, f_intf,
+						       &tone_idx);
+			if (rpt == PHYDM_SET_SUCCESS) {
+				if (f_intf >= fc)
+					direction = FREQ_POSITIVE;
+				else
+					direction = FREQ_NEGATIVE;
 
-		else {
-			/*calculate interference distance*/
-			if (phydm_calculate_intf_distance(p_dm, bw, fc, f_interference, &tone_idx_tmp) == PHYDM_SET_SUCCESS) {
+				phydm_set_nbi_reg(dm, tone_idx, bw);
 
-				phydm_set_nbi_reg(p_dm, tone_idx_tmp, bw);
 				set_result = PHYDM_SET_SUCCESS;
-			} else
+			} else {
 				set_result = PHYDM_SET_NO_NEED;
 		}
 	}
+	}
 
 	if (set_result == PHYDM_SET_SUCCESS)
-		phydm_nbi_enable(p_dm, enable);
+		phydm_nbi_enable(dm, enable);
 	else
-		phydm_nbi_enable(p_dm, FUNC_DISABLE);
+		phydm_nbi_enable(dm, FUNC_DISABLE);
 
-	return	set_result;
+	return set_result;
 }
 
-void
-phydm_api_debug(
-	void		*p_dm_void,
-	u32		function_map,
-	u32		*const dm_value,
-	u32		*_used,
-	char		*output,
-	u32		*_out_len
-)
+void phydm_nbi_debug(void *dm_void, char input[][16], u32 *_used, char *output,
+		     u32 *_out_len)
 {
-	struct PHY_DM_STRUCT		*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	u32			used = *_used;
-	u32			out_len = *_out_len;
-	u32			channel =  dm_value[1];
-	u32			bw =  dm_value[2];
-	u32			f_interference =  dm_value[3];
-	u32			second_ch =  dm_value[4];
-	u8			set_result = 0;
-
-	/*PHYDM_API_NBI*/
-	/*-------------------------------------------------------------------------------------------------------------------------------*/
-	if (function_map == PHYDM_API_NBI) {
-
-		if (dm_value[0] == 100) {
-
-			PHYDM_SNPRINTF((output + used, out_len - used, "[HELP-NBI]  EN(on=1, off=2)   CH   BW(20/40/80)  f_intf(Mhz)    Scnd_CH(L=1, H=2)\n"));
-			return;
-
-		} else if (dm_value[0] == FUNC_ENABLE) {
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	u32 used = *_used;
+	u32 out_len = *_out_len;
+	u32 val[10] = {0};
+	char help[] = "-h";
+	u8 i = 0, input_idx = 0, idx_lmt = 0;
+	u32 enable = 0; /*@function enable*/
+	u32 ch = 0;
+	u32 bw = 0;
+	u32 f_int = 0; /*@interference frequency*/
+	u32 sec_ch = 0; /*secondary channel*/
+	u8 rpt = 0;
+	u8 path = 0;
+
+	if (dm->support_ic_type & ODM_IC_JGR3_SERIES)
+		idx_lmt = 6;
+	else
+		idx_lmt = 5;
+	for (i = 0; i < idx_lmt; i++) {
+		if (input[i + 1]) {
+			PHYDM_SSCANF(input[i + 1], DCMD_DECIMAL, &val[i]);
+			input_idx++;
+		}
+	}
 
-			PHYDM_SNPRINTF((output + used, out_len - used, "[Enable NBI] CH = ((%d)), BW = ((%d)), f_intf = ((%d)), Scnd_CH = ((%s))\n",
-				channel, bw, f_interference, ((second_ch == PHYDM_DONT_CARE) || (bw == 20) || (channel > 14)) ? "Don't care" : ((second_ch == PHYDM_ABOVE) ? "H" : "L")));
-			set_result = phydm_nbi_setting(p_dm, FUNC_ENABLE, channel, bw, f_interference, second_ch);
+	if (input_idx == 0)
+		return;
 
-		} else if (dm_value[0] == FUNC_DISABLE) {
+	enable = val[0];
+	ch = val[1];
+	bw = val[2];
+	f_int = val[3];
+	sec_ch = val[4];
+	#ifdef PHYDM_IC_JGR3_SERIES_SUPPORT
+	path = (u8)val[5];
+	#endif
+
+	if ((strcmp(input[1], help) == 0)) {
+		#ifdef PHYDM_IC_JGR3_SERIES_SUPPORT
+		if (dm->support_ic_type & ODM_IC_JGR3_SERIES)
+			PDM_SNPF(out_len, used, output + used, out_len - used,
+				 "{en:1 Dis:2} {ch} {BW:20/40/80} {f_intf(Mhz)} {Scnd_CH(L=1, H=2)} {Path:A~D(0~3)}\n");
+		else
+		#endif
+			PDM_SNPF(out_len, used, output + used, out_len - used,
+				 "{en:1 Dis:2} {ch} {BW:20/40/80} {f_intf(Mhz)} {Scnd_CH(L=1, H=2)}\n");
+		*_used = used;
+		*_out_len = out_len;
+		return;
+	} else if (val[0] == FUNC_ENABLE) {
+		PDM_SNPF(out_len, used, output + used, out_len - used,
+			 "[Enable NBI] CH = ((%d)), BW = ((%d)), f_intf = ((%d)), Scnd_CH = ((%s))\n",
+			 ch, bw, f_int,
+			 ((sec_ch == PHYDM_DONT_CARE) ||
+			 (bw == 20) || (ch > 14)) ? "Don't care" :
+			 ((sec_ch == PHYDM_ABOVE) ? "H" : "L"));
+		#ifdef PHYDM_IC_JGR3_SERIES_SUPPORT
+		if (dm->support_ic_type & ODM_IC_JGR3_SERIES)
+			rpt = phydm_nbi_setting_jgr3(dm, enable, ch, bw, f_int,
+						     sec_ch, path);
+		else
+		#endif
+			rpt = phydm_nbi_setting(dm, enable, ch, bw, f_int,
+						sec_ch);
+	} else if (val[0] == FUNC_DISABLE) {
+		PDM_SNPF(out_len, used, output + used, out_len - used,
+			 "[Disable NBI]\n");
+		#ifdef PHYDM_IC_JGR3_SERIES_SUPPORT
+		if (dm->support_ic_type & ODM_IC_JGR3_SERIES)
+			rpt = phydm_nbi_setting_jgr3(dm, enable, ch, bw, f_int,
+						     sec_ch, path);
+		else
+		#endif
+			rpt = phydm_nbi_setting(dm, enable, ch, bw, f_int,
+						sec_ch);
+	} else {
+		rpt = PHYDM_SET_FAIL;
+	}
 
-			PHYDM_SNPRINTF((output + used, out_len - used, "[Disable NBI]\n"));
-			set_result = phydm_nbi_setting(p_dm, FUNC_DISABLE, channel, bw, f_interference, second_ch);
+	PDM_SNPF(out_len, used, output + used, out_len - used,
+		 "[NBI set result: %s]\n",
+		 (rpt == PHYDM_SET_SUCCESS) ? "Success" :
+		 ((rpt == PHYDM_SET_NO_NEED) ? "No need" : "Error"));
 
-		} else
+	*_used = used;
+	*_out_len = out_len;
+}
 
-			set_result = PHYDM_SET_FAIL;
-		PHYDM_SNPRINTF((output + used, out_len - used, "[NBI set result: %s]\n", (set_result == PHYDM_SET_SUCCESS) ? "Success" : ((set_result == PHYDM_SET_NO_NEED) ? "No need" : "Error")));
+void phydm_csi_debug(void *dm_void, char input[][16], u32 *_used, char *output,
+		     u32 *_out_len)
+{
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	u32 used = *_used;
+	u32 out_len = *_out_len;
+	u32 val[10] = {0};
+	char help[] = "-h";
+	u8 i = 0, input_idx = 0, idx_lmt = 0;
+	u32 enable = 0;  /*@function enable*/
+	u32 ch = 0;
+	u32 bw = 0;
+	u32 f_int = 0; /*@interference frequency*/
+	u32 sec_ch = 0;  /*secondary channel*/
+	u8 rpt = 0;
+	u8 wgt = 0;
+
+	if (dm->support_ic_type & ODM_IC_JGR3_SERIES)
+		idx_lmt = 6;
+	else
+		idx_lmt = 5;
 
+	for (i = 0; i < idx_lmt; i++) {
+		if (input[i + 1]) {
+			PHYDM_SSCANF(input[i + 1], DCMD_DECIMAL, &val[i]);
+			input_idx++;
+		}
 	}
 
-	/*PHYDM_CSI_MASK*/
-	/*-------------------------------------------------------------------------------------------------------------------------------*/
-	else if (function_map == PHYDM_API_CSI_MASK) {
+	if (input_idx == 0)
+		return;
 
-		if (dm_value[0] == 100) {
+	enable = val[0];
+	ch = val[1];
+	bw = val[2];
+	f_int = val[3];
+	sec_ch = val[4];
+	#ifdef PHYDM_IC_JGR3_SERIES_SUPPORT
+	wgt = (u8)val[5];
+	#endif
+
+	if ((strcmp(input[1], help) == 0)) {
+		#ifdef PHYDM_IC_JGR3_SERIES_SUPPORT
+		if (dm->support_ic_type & ODM_IC_JGR3_SERIES)
+			PDM_SNPF(out_len, used, output + used, out_len - used,
+				 "{en:1 Dis:2} {ch} {BW:20/40/80} {f_intf(KHz)} {Scnd_CH(L=1, H=2)}\n{wgt:(7:3/4),(6~1: 1/2 ~ 1/64),(0:0)}\n");
+		else
+		#endif
+			PDM_SNPF(out_len, used, output + used, out_len - used,
+				 "{en:1 Dis:2} {ch} {BW:20/40/80} {f_intf(Mhz)} {Scnd_CH(L=1, H=2)}\n");
 
-			PHYDM_SNPRINTF((output + used, out_len - used, "[HELP-CSI MASK]  EN(on=1, off=2)   CH   BW(20/40/80)  f_intf(Mhz)    Scnd_CH(L=1, H=2)\n"));
-			return;
+		*_used = used;
+		*_out_len = out_len;
+		return;
 
-		} else if (dm_value[0] == FUNC_ENABLE) {
+	} else if (val[0] == FUNC_ENABLE) {
+		PDM_SNPF(out_len, used, output + used, out_len - used,
+			 "[Enable CSI MASK] CH = ((%d)), BW = ((%d)), f_intf = ((%d)), Scnd_CH = ((%s))\n",
+			 ch, bw, f_int,
+			 (ch > 14) ? "Don't care" :
+			 (((sec_ch == PHYDM_DONT_CARE) ||
+			 (bw == 20) || (ch > 14)) ? "H" : "L"));
+		#ifdef PHYDM_IC_JGR3_SERIES_SUPPORT
+		if (dm->support_ic_type & ODM_IC_JGR3_SERIES)
+			rpt = phydm_csi_mask_setting_jgr3(dm, enable, ch, bw,
+							  f_int, sec_ch, wgt);
+		else
+		#endif
+			rpt = phydm_csi_mask_setting(dm, enable, ch, bw, f_int,
+						     sec_ch);
+	} else if (val[0] == FUNC_DISABLE) {
+		PDM_SNPF(out_len, used, output + used, out_len - used,
+			 "[Disable CSI MASK]\n");
+		#ifdef PHYDM_IC_JGR3_SERIES_SUPPORT
+		if (dm->support_ic_type & ODM_IC_JGR3_SERIES)
+			rpt = phydm_csi_mask_setting_jgr3(dm, enable, ch, bw,
+							  f_int, sec_ch, wgt);
+		else
+		#endif
+			rpt = phydm_csi_mask_setting(dm, enable, ch, bw, f_int,
+						     sec_ch);
+	} else {
+		rpt = PHYDM_SET_FAIL;
+	}
+	PDM_SNPF(out_len, used, output + used, out_len - used,
+		 "[CSI MASK set result: %s]\n",
+		 (rpt == PHYDM_SET_SUCCESS) ? "Success" :
+		 ((rpt == PHYDM_SET_NO_NEED) ? "No need" : "Error"));
 
-			PHYDM_SNPRINTF((output + used, out_len - used, "[Enable CSI MASK] CH = ((%d)), BW = ((%d)), f_intf = ((%d)), Scnd_CH = ((%s))\n",
-				channel, bw, f_interference, (channel > 14) ? "Don't care" : (((second_ch == PHYDM_DONT_CARE) || (bw == 20) || (channel > 14)) ? "H" : "L")));
-			set_result = phydm_csi_mask_setting(p_dm,	FUNC_ENABLE, channel, bw, f_interference, second_ch);
+	*_used = used;
+	*_out_len = out_len;
+}
 
-		} else if (dm_value[0] == FUNC_DISABLE) {
+void phydm_stop_ck320(void *dm_void, u8 enable)
+{
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	u32 val = enable ? 1 : 0;
 
-			PHYDM_SNPRINTF((output + used, out_len - used, "[Disable CSI MASK]\n"));
-			set_result = phydm_csi_mask_setting(p_dm, FUNC_DISABLE, channel, bw, f_interference, second_ch);
+	if (dm->support_ic_type & ODM_IC_11AC_SERIES) {
+		odm_set_bb_reg(dm, R_0x8b4, BIT(6), val);
+	} else {
+		if (dm->support_ic_type & ODM_IC_N_2SS) /*N-2SS*/
+			odm_set_bb_reg(dm, R_0x87c, BIT(29), val);
+		else /*N-1SS*/
+			odm_set_bb_reg(dm, R_0x87c, BIT(31), val);
+	}
+}
 
-		} else
+boolean
+phydm_set_bb_txagc_offset(void *dm_void, s8 power_offset, /*@(unit: dB)*/
+			  u8 add_half_db /*@(+0.5 dB)*/)
+{
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	s8 power_idx = power_offset * 2;
+	boolean set_success = false;
 
-			set_result = PHYDM_SET_FAIL;
-		PHYDM_SNPRINTF((output + used, out_len - used, "[CSI MASK set result: %s]\n", (set_result == PHYDM_SET_SUCCESS) ? "Success" : ((set_result == PHYDM_SET_NO_NEED) ? "No need" : "Error")));
+	PHYDM_DBG(dm, ODM_COMP_API, "power_offset=%d, add_half_db =%d\n",
+		  power_offset, add_half_db);
+
+	#if ODM_IC_11AC_SERIES_SUPPORT
+	if (dm->support_ic_type & ODM_IC_11AC_SERIES) {
+		if (power_offset > -16 && power_offset < 15) {
+			if (add_half_db)
+				power_idx += 1;
+
+			power_idx &= 0x3f;
+
+			PHYDM_DBG(dm, ODM_COMP_API, "Reg_idx =0x%x\n",
+				  power_idx);
+			odm_set_bb_reg(dm, R_0x8b4, 0x3f, power_idx);
+			set_success = true;
+		} else {
+			pr_debug("[Warning] TX AGC Offset Setting error!");
+		}
 	}
-	*_used = used;
-	*_out_len = out_len;
+	#endif
+
+	#if ODM_IC_11N_SERIES_SUPPORT
+	if (dm->support_ic_type & ODM_IC_11N_SERIES) {
+		if (power_offset > -8 || power_offset < 7) {
+			if (add_half_db)
+				power_idx += 1;
+
+			power_idx &= 0x1f;
+
+			PHYDM_DBG(dm, ODM_COMP_API, "Reg_idx =0x%x\n",
+				  power_idx);
+			/*r_txagc_offset_a*/
+			odm_set_bb_reg(dm, R_0x80c, 0x1f00, power_idx);
+			/*r_txagc_offset_b*/
+			odm_set_bb_reg(dm, R_0x80c, 0x3e000, power_idx);
+			set_success = true;
+		} else {
+			pr_debug("[Warning] TX AGC Offset Setting error!");
+		}
+	}
+	#endif
+
+	return set_success;
 }
 
-void
-phydm_stop_ck320(
-	void			*p_dm_void,
-	u8			enable
-) {
-	struct PHY_DM_STRUCT		*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	u32		reg_value = (enable == true) ? 1 : 0;
-	
-	if (p_dm->support_ic_type & ODM_IC_11AC_SERIES) {
-		odm_set_bb_reg(p_dm, 0x8b4, BIT(6), reg_value);
-		/**/
-	} else { 
-
-		if (p_dm->support_ic_type & ODM_IC_N_2SS) {	/*N-2SS*/
-			odm_set_bb_reg(p_dm, 0x87c, BIT(29), reg_value);
-			/**/
-		} else {	/*N-1SS*/
-			odm_set_bb_reg(p_dm, 0x87c, BIT(31), reg_value);
-			/**/
+#ifdef PHYDM_COMMON_API_SUPPORT
+boolean
+phydm_api_shift_txagc(void *dm_void, u32 pwr_offset, enum rf_path path,
+		      boolean is_positive) {
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	boolean ret = false;
+	u32 txagc_cck = 0;
+	u32 txagc_ofdm = 0;
+	u32 r_txagc_ofdm[4] = {0x18e8, 0x41e8, 0x52e8, 0x53e8};
+	u32 r_txagc_cck[4] = {0x18a0, 0x41a0, 0x52a0, 0x53a0};
+
+	#if (RTL8822C_SUPPORT || RTL8812F_SUPPORT)
+	if (dm->support_ic_type & (ODM_RTL8822C | ODM_RTL8812F)) {
+		if (path > RF_PATH_B) {
+			PHYDM_DBG(dm, ODM_PHY_CONFIG, "Unsupported path (%d)\n",
+				  path);
+			return false;
+		}
+		txagc_cck = (u8)odm_get_bb_reg(dm, r_txagc_cck[path],
+						   0x7F0000);
+		txagc_ofdm = (u8)odm_get_bb_reg(dm, r_txagc_ofdm[path],
+						    0x1FC00);
+		if (is_positive) {
+			if (((txagc_cck + pwr_offset) > 127) ||
+			    ((txagc_ofdm + pwr_offset) > 127))
+				return false;
+
+			txagc_cck += pwr_offset;
+			txagc_ofdm += pwr_offset;
+		} else {
+			if (pwr_offset > txagc_cck || pwr_offset > txagc_ofdm)
+				return false;
+
+			txagc_cck -= pwr_offset;
+			txagc_ofdm -= pwr_offset;
+		}
+		#if (RTL8822C_SUPPORT)
+		ret = config_phydm_write_txagc_ref_8822c(dm, (u8)txagc_cck,
+							 path, PDM_CCK);
+		ret &= config_phydm_write_txagc_ref_8822c(dm, (u8)txagc_ofdm,
+							 path, PDM_OFDM);
+		#endif
+		#if (RTL8812F_SUPPORT)
+		ret = config_phydm_write_txagc_ref_8812f(dm, (u8)txagc_cck,
+							 path, PDM_CCK);
+		ret &= config_phydm_write_txagc_ref_8812f(dm, (u8)txagc_ofdm,
+							 path, PDM_OFDM);
+		#endif
+		PHYDM_DBG(dm, ODM_PHY_CONFIG,
+			  "%s: path-%d txagc_cck_ref=%x txagc_ofdm_ref=0x%x\n",
+			  __func__, path, txagc_cck, txagc_ofdm);
+	}
+	#endif
+
+	#if (RTL8198F_SUPPORT || RTL8814B_SUPPORT)
+	if (dm->support_ic_type & (ODM_RTL8198F | ODM_RTL8814B)) {
+		if (path > RF_PATH_D) {
+			PHYDM_DBG(dm, ODM_PHY_CONFIG, "Unsupported path (%d)\n",
+				  path);
+			return false;
+		}
+		txagc_cck = (u8)odm_get_bb_reg(dm, r_txagc_cck[path],
+						   0x7F0000);
+		txagc_ofdm = (u8)odm_get_bb_reg(dm, r_txagc_ofdm[path],
+						    0x1FC00);
+		if (is_positive) {
+			if (((txagc_cck + pwr_offset) > 127) ||
+			    ((txagc_ofdm + pwr_offset) > 127))
+				return false;
+
+			txagc_cck += pwr_offset;
+			txagc_ofdm += pwr_offset;
+		} else {
+			if (pwr_offset > txagc_cck || pwr_offset > txagc_ofdm)
+				return false;
+
+			txagc_cck -= pwr_offset;
+			txagc_ofdm -= pwr_offset;
 		}
+		#if (RTL8198F_SUPPORT)
+		ret = config_phydm_write_txagc_ref_8198f(dm, (u8)txagc_cck,
+							 path, PDM_CCK);
+		ret &= config_phydm_write_txagc_ref_8198f(dm, (u8)txagc_ofdm,
+							 path, PDM_OFDM);
+		#endif
+		#if (RTL8814B_SUPPORT)
+		ret = config_phydm_write_txagc_ref_8814b(dm, (u8)txagc_cck,
+							 path, PDM_CCK);
+		ret &= config_phydm_write_txagc_ref_8814b(dm, (u8)txagc_ofdm,
+							 path, PDM_OFDM);
+		#endif
+		PHYDM_DBG(dm, ODM_PHY_CONFIG,
+			  "%s: path-%d txagc_cck_ref=%x txagc_ofdm_ref=0x%x\n",
+			  __func__, path, txagc_cck, txagc_ofdm);
 	}
+	#endif
+
+	return ret;
 }
 
-#ifdef PHYDM_COMMON_API_SUPPORT
 boolean
-phydm_api_set_txagc(
-	void				*p_dm_void,
-	u32				power_index,
-	enum rf_path		path,
-	u8				hw_rate,
-	boolean			is_single_rate
-)
+phydm_api_set_txagc(void *dm_void, u32 pwr_idx, enum rf_path path,
+		    u8 rate, boolean is_single_rate)
 {
-	struct PHY_DM_STRUCT		*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	boolean		ret = false;
-	u8	i;
-
-#if ((RTL8822B_SUPPORT == 1) || (RTL8821C_SUPPORT == 1))
-	if (p_dm->support_ic_type & (ODM_RTL8822B | ODM_RTL8821C)) {
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	boolean ret = false;
+	#if (RTL8198F_SUPPORT || RTL8822C_SUPPORT || RTL8812F_SUPPORT ||\
+	     RTL8814B_SUPPORT)
+	u8 base = 0;
+	u8 txagc_tmp = 0;
+	s8 pw_by_rate_tmp = 0;
+	s8 pw_by_rate_new = 0;
+	#endif
+	#if (DM_ODM_SUPPORT_TYPE & ODM_AP)
+	u8 i = 0;
+	#endif
+
+#if (RTL8822B_SUPPORT || RTL8821C_SUPPORT || RTL8195B_SUPPORT)
+	if (dm->support_ic_type &
+	    (ODM_RTL8822B | ODM_RTL8821C | ODM_RTL8195B)) {
 		if (is_single_rate) {
-			
-			#if (RTL8822B_SUPPORT == 1)
-			if (p_dm->support_ic_type == ODM_RTL8822B)
-				ret = phydm_write_txagc_1byte_8822b(p_dm, power_index, path, hw_rate);
+			#if (RTL8822B_SUPPORT)
+			if (dm->support_ic_type == ODM_RTL8822B)
+				ret = phydm_write_txagc_1byte_8822b(dm, pwr_idx,
+								    path, rate);
 			#endif
-			
-			#if (RTL8821C_SUPPORT == 1)
-			if (p_dm->support_ic_type == ODM_RTL8821C)
-				ret = phydm_write_txagc_1byte_8821c(p_dm, power_index, path, hw_rate);
+
+			#if (RTL8821C_SUPPORT)
+			if (dm->support_ic_type == ODM_RTL8821C)
+				ret = phydm_write_txagc_1byte_8821c(dm, pwr_idx,
+								    path, rate);
 			#endif
-			
+
+			#if (RTL8195B_SUPPORT)
+			if (dm->support_ic_type == ODM_RTL8195B)
+				ret = phydm_write_txagc_1byte_8195b(dm, pwr_idx,
+								    path, rate);
+			#endif
+
 			#if (DM_ODM_SUPPORT_TYPE & ODM_AP)
-			set_current_tx_agc(p_dm->priv, path, hw_rate, (u8)power_index);
+			set_current_tx_agc(dm->priv, path, rate, (u8)pwr_idx);
 			#endif
 
 		} else {
+			#if (RTL8822B_SUPPORT)
+			if (dm->support_ic_type == ODM_RTL8822B)
+				ret = config_phydm_write_txagc_8822b(dm,
+								     pwr_idx,
+								     path,
+								     rate);
+			#endif
 
-			#if (RTL8822B_SUPPORT == 1)
-			if (p_dm->support_ic_type == ODM_RTL8822B)
-				ret = config_phydm_write_txagc_8822b(p_dm, power_index, path, hw_rate);
+			#if (RTL8821C_SUPPORT)
+			if (dm->support_ic_type == ODM_RTL8821C)
+				ret = config_phydm_write_txagc_8821c(dm,
+								     pwr_idx,
+								     path,
+								     rate);
 			#endif
-			
-			#if (RTL8821C_SUPPORT == 1)
-			if (p_dm->support_ic_type == ODM_RTL8821C)
-				ret = config_phydm_write_txagc_8821c(p_dm, power_index, path, hw_rate);
+
+			#if (RTL8195B_SUPPORT)
+			if (dm->support_ic_type == ODM_RTL8195B)
+				ret = config_phydm_write_txagc_8195b(dm,
+								     pwr_idx,
+								     path,
+								     rate);
 			#endif
-			
+
 			#if (DM_ODM_SUPPORT_TYPE & ODM_AP)
 			for (i = 0; i < 4; i++)
-				set_current_tx_agc(p_dm->priv, path, (hw_rate + i), (u8)power_index);
+				set_current_tx_agc(dm->priv, path, (rate + i),
+						   (u8)pwr_idx);
 			#endif
 		}
 	}
 #endif
 
+#if (RTL8198F_SUPPORT)
+	if (dm->support_ic_type & ODM_RTL8198F) {
+		if (rate < 0x4)
+			txagc_tmp = config_phydm_read_txagc_8198f(dm, path,
+								  rate,
+								  PDM_CCK);
+		else
+			txagc_tmp = config_phydm_read_txagc_8198f(dm, path,
+								  rate,
+								  PDM_OFDM);
+
+		pw_by_rate_tmp = config_phydm_read_txagc_diff_8198f(dm, rate);
+		base = txagc_tmp -  pw_by_rate_tmp;
+		base = base & 0x7f;
+		if (DIFF_2((pwr_idx & 0x7f), base) > 64 || pwr_idx > 127)
+			return false;
+
+		pw_by_rate_new = (s8)(pwr_idx - base);
+		ret = phydm_write_txagc_1byte_8198f(dm, pw_by_rate_new, rate);
+		PHYDM_DBG(dm, ODM_PHY_CONFIG,
+			  "%s: path-%d rate_idx=%x base=0x%x new_diff=0x%x\n",
+			  __func__, path, rate, base, pw_by_rate_new);
+	}
+#endif
 
-#if (RTL8197F_SUPPORT == 1)
-	if (p_dm->support_ic_type & ODM_RTL8197F)
-		ret = config_phydm_write_txagc_8197f(p_dm, power_index, path, hw_rate);
+#if (RTL8822C_SUPPORT)
+	if (dm->support_ic_type & ODM_RTL8822C) {
+		if (rate < 0x4)
+			txagc_tmp = config_phydm_read_txagc_8822c(dm, path,
+								  rate,
+								  PDM_CCK);
+		else
+			txagc_tmp = config_phydm_read_txagc_8822c(dm, path,
+								  rate,
+								  PDM_OFDM);
+
+		pw_by_rate_tmp = config_phydm_read_txagc_diff_8822c(dm, rate);
+		base = txagc_tmp - pw_by_rate_tmp;
+		base = base & 0x7f;
+		if (DIFF_2((pwr_idx & 0x7f), base) > 63 || pwr_idx > 127)
+			return false;
+
+		pw_by_rate_new = (s8)(pwr_idx - base);
+		ret = phydm_write_txagc_1byte_8822c(dm, pw_by_rate_new, rate);
+		PHYDM_DBG(dm, ODM_PHY_CONFIG,
+			  "%s: path-%d rate_idx=%x base=0x%x new_diff=0x%x\n",
+			  __func__, path, rate, base, pw_by_rate_new);
+	}
+#endif
+
+#if (RTL8814B_SUPPORT)
+	if (dm->support_ic_type & ODM_RTL8814B) {
+		if (rate < 0x4)
+			txagc_tmp = config_phydm_read_txagc_8814b(dm, path,
+								  rate,
+								  PDM_CCK);
+		else
+			txagc_tmp = config_phydm_read_txagc_8814b(dm, path,
+								  rate,
+								  PDM_OFDM);
+
+		pw_by_rate_tmp = config_phydm_read_txagc_diff_8814b(dm, rate);
+		base = txagc_tmp -  pw_by_rate_tmp;
+		base = base & 0x7f;
+		if (DIFF_2((pwr_idx & 0x7f), base) > 64)
+			return false;
+
+		pw_by_rate_new = (s8)(pwr_idx - base);
+		ret = phydm_write_txagc_1byte_8814b(dm, pw_by_rate_new, rate);
+		PHYDM_DBG(dm, ODM_PHY_CONFIG,
+			  "%s: path-%d rate_idx=%x base=0x%x new_diff=0x%x\n",
+			  __func__, path, rate, base, pw_by_rate_new);
+	}
 #endif
 
+#if (RTL8812F_SUPPORT)
+	if (dm->support_ic_type & ODM_RTL8812F) {
+		if (rate < 0x4)
+			txagc_tmp = config_phydm_read_txagc_8812f(dm, path,
+								  rate,
+								  PDM_CCK);
+		else
+			txagc_tmp = config_phydm_read_txagc_8812f(dm, path,
+								  rate,
+								  PDM_OFDM);
+
+		pw_by_rate_tmp = config_phydm_read_txagc_diff_8812f(dm, rate);
+		base = txagc_tmp - pw_by_rate_tmp;
+		base = base & 0x7f;
+		if (DIFF_2((pwr_idx & 0x7f), base) > 63 || pwr_idx > 127)
+			return false;
+
+		pw_by_rate_new = (s8)(pwr_idx - base);
+		ret = phydm_write_txagc_1byte_8812f(dm, pw_by_rate_new, rate);
+		PHYDM_DBG(dm, ODM_PHY_CONFIG,
+			  "%s: path-%d rate_idx=%x base=0x%x new_diff=0x%x\n",
+			  __func__, path, rate, base, pw_by_rate_new);
+	}
+#endif
+
+#if (RTL8197F_SUPPORT)
+	if (dm->support_ic_type & ODM_RTL8197F)
+		ret = config_phydm_write_txagc_8197f(dm, pwr_idx, path, rate);
+#endif
+
+#if (RTL8192F_SUPPORT)
+	if (dm->support_ic_type & ODM_RTL8192F)
+		ret = config_phydm_write_txagc_8192f(dm, pwr_idx, path, rate);
+#endif
+
+#if (RTL8721D_SUPPORT)
+	if (dm->support_ic_type & ODM_RTL8721D)
+		ret = config_phydm_write_txagc_8721d(dm, pwr_idx, path, rate);
+#endif
 	return ret;
 }
 
-u8
-phydm_api_get_txagc(
-	void				*p_dm_void,
-	enum rf_path		path,
-	u8				hw_rate
-)
+u8 phydm_api_get_txagc(void *dm_void, enum rf_path path, u8 hw_rate)
 {
-	struct PHY_DM_STRUCT		*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	u8	ret = 0;
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	u8 ret = 0;
+
+#if (RTL8822B_SUPPORT)
+	if (dm->support_ic_type & ODM_RTL8822B)
+		ret = config_phydm_read_txagc_8822b(dm, path, hw_rate);
+#endif
+
+#if (RTL8197F_SUPPORT)
+	if (dm->support_ic_type & ODM_RTL8197F)
+		ret = config_phydm_read_txagc_8197f(dm, path, hw_rate);
+#endif
 
-#if (RTL8822B_SUPPORT == 1)
-	if (p_dm->support_ic_type & ODM_RTL8822B)
-		ret = config_phydm_read_txagc_8822b(p_dm, path, hw_rate);
+#if (RTL8821C_SUPPORT)
+	if (dm->support_ic_type & ODM_RTL8821C)
+		ret = config_phydm_read_txagc_8821c(dm, path, hw_rate);
 #endif
 
-#if (RTL8197F_SUPPORT == 1)
-	if (p_dm->support_ic_type & ODM_RTL8197F)
-		ret = config_phydm_read_txagc_8197f(p_dm, path, hw_rate);
+#if (RTL8195B_SUPPORT)
+	if (dm->support_ic_type & ODM_RTL8195B)
+		ret = config_phydm_read_txagc_8195b(dm, path, hw_rate);
 #endif
 
-#if (RTL8821C_SUPPORT == 1)
-	if (p_dm->support_ic_type & ODM_RTL8821C)
-		ret = config_phydm_read_txagc_8821c(p_dm, path, hw_rate);
+/*@jj add 20170822*/
+#if (RTL8192F_SUPPORT)
+	if (dm->support_ic_type & ODM_RTL8192F)
+		ret = config_phydm_read_txagc_8192f(dm, path, hw_rate);
 #endif
 
+#if (RTL8198F_SUPPORT)
+	if (dm->support_ic_type & ODM_RTL8198F) {
+		if (hw_rate < 0x4) {
+			ret = config_phydm_read_txagc_8198f(dm, path, hw_rate,
+							    PDM_CCK);
+		} else {
+			ret = config_phydm_read_txagc_8198f(dm, path, hw_rate,
+							    PDM_OFDM);
+		}
+	}
+#endif
+
+#if (RTL8822C_SUPPORT)
+	if (dm->support_ic_type & ODM_RTL8822C) {
+		if (hw_rate < 0x4) {
+			ret = config_phydm_read_txagc_8822c(dm, path, hw_rate,
+							    PDM_CCK);
+		} else {
+			ret = config_phydm_read_txagc_8822c(dm, path, hw_rate,
+							    PDM_OFDM);
+		}
+	}
+#endif
+
+#if (RTL8814B_SUPPORT)
+	if (dm->support_ic_type & ODM_RTL8814B) {
+		if (hw_rate < 0x4) {
+			ret = config_phydm_read_txagc_8814b(dm, path, hw_rate,
+							    PDM_CCK);
+		} else {
+			ret = config_phydm_read_txagc_8814b(dm, path, hw_rate,
+							    PDM_OFDM);
+		}
+	}
+#endif
+
+#if (RTL8812F_SUPPORT)
+	if (dm->support_ic_type & ODM_RTL8812F) {
+		if (hw_rate < 0x4) {
+			ret = config_phydm_read_txagc_8812f(dm, path, hw_rate,
+							    PDM_CCK);
+		} else {
+			ret = config_phydm_read_txagc_8812f(dm, path, hw_rate,
+							    PDM_OFDM);
+		}
+	}
+#endif
+
+#if (RTL8721D_SUPPORT)
+	if (dm->support_ic_type & ODM_RTL8721D)
+		ret = config_phydm_read_txagc_8721d(dm, path, hw_rate);
+#endif
 	return ret;
 }
 
-
 boolean
-phydm_api_switch_bw_channel(
-	void					*p_dm_void,
-	u8					central_ch,
-	u8					primary_ch_idx,
-	enum channel_width	bandwidth
-)
+phydm_api_switch_bw_channel(void *dm_void, u8 ch, u8 pri_ch,
+			    enum channel_width bw)
 {
-	struct PHY_DM_STRUCT		*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;	
-	boolean		ret = false;
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	boolean ret = false;
+
+	switch (dm->support_ic_type) {
+#if (RTL8822B_SUPPORT)
+	case ODM_RTL8822B:
+		ret = config_phydm_switch_channel_bw_8822b(dm, ch, pri_ch, bw);
+	break;
+#endif
+
+#if (RTL8197F_SUPPORT)
+	case ODM_RTL8197F:
+		ret = config_phydm_switch_channel_bw_8197f(dm, ch, pri_ch, bw);
+	break;
+#endif
 
-#if (RTL8822B_SUPPORT == 1)
-	if (p_dm->support_ic_type & ODM_RTL8822B)
-		ret = config_phydm_switch_channel_bw_8822b(p_dm, central_ch, primary_ch_idx, bandwidth);
+#if (RTL8821C_SUPPORT)
+	case ODM_RTL8821C:
+		ret = config_phydm_switch_channel_bw_8821c(dm, ch, pri_ch, bw);
+	break;
 #endif
 
-#if (RTL8197F_SUPPORT == 1)
-	if (p_dm->support_ic_type & ODM_RTL8197F)
-		ret = config_phydm_switch_channel_bw_8197f(p_dm, central_ch, primary_ch_idx, bandwidth);
+#if (RTL8192F_SUPPORT)
+	case ODM_RTL8192F:
+		ret = config_phydm_switch_channel_bw_8192f(dm, ch, pri_ch, bw);
+	break;
 #endif
 
-#if (RTL8821C_SUPPORT == 1)
-	if (p_dm->support_ic_type & ODM_RTL8821C)
-		ret = config_phydm_switch_channel_bw_8821c(p_dm, central_ch, primary_ch_idx, bandwidth);
+#if (RTL8198F_SUPPORT)
+	case ODM_RTL8198F:
+		ret = config_phydm_switch_channel_bw_8198f(dm, ch, pri_ch, bw);
+	break;
 #endif
 
+#if (RTL8822C_SUPPORT)
+	case ODM_RTL8822C:
+		ret = config_phydm_switch_channel_bw_8822c(dm, ch, pri_ch, bw);
+	break;
+#endif
+
+#if (RTL8814B_SUPPORT)
+	case ODM_RTL8814B:
+		ret = config_phydm_switch_channel_bw_8814b(dm, ch, pri_ch, bw);
+	break;
+#endif
+
+#if (RTL8812F_SUPPORT)
+	case ODM_RTL8812F:
+		ret = config_phydm_switch_channel_bw_8812f(dm, ch, pri_ch, bw);
+	break;
+#endif
+
+#if (RTL8721D_SUPPORT)
+	case ODM_RTL8721D:
+		ret = config_phydm_switch_channel_bw_8721d(dm, ch, pri_ch, bw);
+#endif
+
+	default:
+		break;
+	}
 	return ret;
 }
 
 boolean
-phydm_api_trx_mode(
-	void				*p_dm_void,
-	enum bb_path	tx_path,
-	enum bb_path	rx_path,
-	boolean			is_tx2_path
-)
+phydm_api_trx_mode(void *dm_void, enum bb_path tx_path, enum bb_path rx_path,
+		   boolean is_2tx)
 {
-	struct PHY_DM_STRUCT		*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	boolean		ret = false;
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	boolean ret = false;
 
-#if (RTL8822B_SUPPORT == 1)
-	if (p_dm->support_ic_type & ODM_RTL8822B)
-		ret = config_phydm_trx_mode_8822b(p_dm, tx_path, rx_path, is_tx2_path);
+#if (RTL8822B_SUPPORT)
+	if (dm->support_ic_type & ODM_RTL8822B)
+		ret = config_phydm_trx_mode_8822b(dm, tx_path, rx_path, is_2tx);
+#endif
+
+#if (RTL8197F_SUPPORT)
+	if (dm->support_ic_type & ODM_RTL8197F)
+		ret = config_phydm_trx_mode_8197f(dm, tx_path, rx_path, is_2tx);
+#endif
+
+#if (RTL8192F_SUPPORT)
+	if (dm->support_ic_type & ODM_RTL8192F)
+		ret = config_phydm_trx_mode_8192f(dm, tx_path, rx_path, is_2tx);
+#endif
+
+#if (RTL8198F_SUPPORT)
+	if (dm->support_ic_type & ODM_RTL8198F)
+		ret = config_phydm_trx_mode_8198f(dm, tx_path, rx_path, is_2tx);
+#endif
+
+/*#if (RTL8814B_SUPPORT)
+	if (dm->support_ic_type & ODM_RTL8814B)
+		ret = config_phydm_trx_mode_8814b(dm, tx_path, rx_path, is_2tx);
+#endif
+*/
+#if (RTL8822C_SUPPORT)
+	if (dm->support_ic_type & ODM_RTL8822C)
+		ret = config_phydm_trx_mode_8822c(dm, tx_path, rx_path, is_2tx);
 #endif
 
-#if (RTL8197F_SUPPORT == 1)
-	if (p_dm->support_ic_type & ODM_RTL8197F)
-		ret = config_phydm_trx_mode_8197f(p_dm, tx_path, rx_path, is_tx2_path);
+#if (RTL8812F_SUPPORT)
+	if (dm->support_ic_type & ODM_RTL8812F)
+		ret = config_phydm_trx_mode_8812f(dm, tx_path, rx_path, is_2tx);
+#endif
+
+#if (RTL8721D_SUPPORT)
+	if (dm->support_ic_type & ODM_RTL8721D)
+		ret = config_phydm_trx_mode_8721d(dm, tx_path, rx_path, is_2tx);
 #endif
 
 	return ret;
 }
-#endif
+#else
+u8 config_phydm_read_txagc_n(void *dm_void, enum rf_path path, u8 hw_rate)
+{
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	u8 read_back_data = INVALID_TXAGC_DATA;
+	u32 reg_txagc;
+	u32 reg_mask;
+	/* This function is for 92E/88E etc... */
+	/* @Input need to be HW rate index, not driver rate index!!!! */
+
+	/* @Error handling */
+	if (path > RF_PATH_B || hw_rate > ODM_RATEMCS15) {
+		PHYDM_DBG(dm, ODM_PHY_CONFIG, "%s: unsupported path (%d)\n",
+			  __func__, path);
+		return INVALID_TXAGC_DATA;
+	}
 
+	if (path == RF_PATH_A) {
+		switch (hw_rate) {
+		case ODM_RATE1M:
+			reg_txagc = R_0xe08;
+			reg_mask = 0x00007f00;
+			break;
+		case ODM_RATE2M:
+			reg_txagc = R_0x86c;
+			reg_mask = 0x00007f00;
+			break;
+		case ODM_RATE5_5M:
+			reg_txagc = R_0x86c;
+			reg_mask = 0x007f0000;
+			break;
+		case ODM_RATE11M:
+			reg_txagc = R_0x86c;
+			reg_mask = 0x7f000000;
+			break;
+
+		case ODM_RATE6M:
+			reg_txagc = R_0xe00;
+			reg_mask = 0x0000007f;
+			break;
+		case ODM_RATE9M:
+			reg_txagc = R_0xe00;
+			reg_mask = 0x00007f00;
+			break;
+		case ODM_RATE12M:
+			reg_txagc = R_0xe00;
+			reg_mask = 0x007f0000;
+			break;
+		case ODM_RATE18M:
+			reg_txagc = R_0xe00;
+			reg_mask = 0x7f000000;
+			break;
+		case ODM_RATE24M:
+			reg_txagc = R_0xe04;
+			reg_mask = 0x0000007f;
+			break;
+		case ODM_RATE36M:
+			reg_txagc = R_0xe04;
+			reg_mask = 0x00007f00;
+			break;
+		case ODM_RATE48M:
+			reg_txagc = R_0xe04;
+			reg_mask = 0x007f0000;
+			break;
+		case ODM_RATE54M:
+			reg_txagc = R_0xe04;
+			reg_mask = 0x7f000000;
+			break;
+
+		case ODM_RATEMCS0:
+			reg_txagc = R_0xe10;
+			reg_mask = 0x0000007f;
+			break;
+		case ODM_RATEMCS1:
+			reg_txagc = R_0xe10;
+			reg_mask = 0x00007f00;
+			break;
+		case ODM_RATEMCS2:
+			reg_txagc = R_0xe10;
+			reg_mask = 0x007f0000;
+			break;
+		case ODM_RATEMCS3:
+			reg_txagc = R_0xe10;
+			reg_mask = 0x7f000000;
+			break;
+		case ODM_RATEMCS4:
+			reg_txagc = R_0xe14;
+			reg_mask = 0x0000007f;
+			break;
+		case ODM_RATEMCS5:
+			reg_txagc = R_0xe14;
+			reg_mask = 0x00007f00;
+			break;
+		case ODM_RATEMCS6:
+			reg_txagc = R_0xe14;
+			reg_mask = 0x007f0000;
+			break;
+		case ODM_RATEMCS7:
+			reg_txagc = R_0xe14;
+			reg_mask = 0x7f000000;
+			break;
+
+		case ODM_RATEMCS8:
+			reg_txagc = R_0xe18;
+			reg_mask = 0x0000007f;
+			break;
+		case ODM_RATEMCS9:
+			reg_txagc = R_0xe18;
+			reg_mask = 0x00007f00;
+			break;
+		case ODM_RATEMCS10:
+			reg_txagc = R_0xe18;
+			reg_mask = 0x007f0000;
+			break;
+		case ODM_RATEMCS11:
+			reg_txagc = R_0xe18;
+			reg_mask = 0x7f000000;
+			break;
+		case ODM_RATEMCS12:
+			reg_txagc = R_0xe1c;
+			reg_mask = 0x0000007f;
+			break;
+		case ODM_RATEMCS13:
+			reg_txagc = R_0xe1c;
+			reg_mask = 0x00007f00;
+			break;
+		case ODM_RATEMCS14:
+			reg_txagc = R_0xe1c;
+			reg_mask = 0x007f0000;
+			break;
+		case ODM_RATEMCS15:
+			reg_txagc = R_0xe1c;
+			reg_mask = 0x7f000000;
+			break;
+
+		default:
+			PHYDM_DBG(dm, ODM_PHY_CONFIG, "Invalid HWrate!\n");
+			break;
+		}
+	} else if (path == RF_PATH_B) {
+		switch (hw_rate) {
+		case ODM_RATE1M:
+			reg_txagc = R_0x838;
+			reg_mask = 0x00007f00;
+			break;
+		case ODM_RATE2M:
+			reg_txagc = R_0x838;
+			reg_mask = 0x007f0000;
+			break;
+		case ODM_RATE5_5M:
+			reg_txagc = R_0x838;
+			reg_mask = 0x7f000000;
+			break;
+		case ODM_RATE11M:
+			reg_txagc = R_0x86c;
+			reg_mask = 0x0000007f;
+			break;
+
+		case ODM_RATE6M:
+			reg_txagc = R_0x830;
+			reg_mask = 0x0000007f;
+			break;
+		case ODM_RATE9M:
+			reg_txagc = R_0x830;
+			reg_mask = 0x00007f00;
+			break;
+		case ODM_RATE12M:
+			reg_txagc = R_0x830;
+			reg_mask = 0x007f0000;
+			break;
+		case ODM_RATE18M:
+			reg_txagc = R_0x830;
+			reg_mask = 0x7f000000;
+			break;
+		case ODM_RATE24M:
+			reg_txagc = R_0x834;
+			reg_mask = 0x0000007f;
+			break;
+		case ODM_RATE36M:
+			reg_txagc = R_0x834;
+			reg_mask = 0x00007f00;
+			break;
+		case ODM_RATE48M:
+			reg_txagc = R_0x834;
+			reg_mask = 0x007f0000;
+			break;
+		case ODM_RATE54M:
+			reg_txagc = R_0x834;
+			reg_mask = 0x7f000000;
+			break;
+
+		case ODM_RATEMCS0:
+			reg_txagc = R_0x83c;
+			reg_mask = 0x0000007f;
+			break;
+		case ODM_RATEMCS1:
+			reg_txagc = R_0x83c;
+			reg_mask = 0x00007f00;
+			break;
+		case ODM_RATEMCS2:
+			reg_txagc = R_0x83c;
+			reg_mask = 0x007f0000;
+			break;
+		case ODM_RATEMCS3:
+			reg_txagc = R_0x83c;
+			reg_mask = 0x7f000000;
+			break;
+		case ODM_RATEMCS4:
+			reg_txagc = R_0x848;
+			reg_mask = 0x0000007f;
+			break;
+		case ODM_RATEMCS5:
+			reg_txagc = R_0x848;
+			reg_mask = 0x00007f00;
+			break;
+		case ODM_RATEMCS6:
+			reg_txagc = R_0x848;
+			reg_mask = 0x007f0000;
+			break;
+		case ODM_RATEMCS7:
+			reg_txagc = R_0x848;
+			reg_mask = 0x7f000000;
+			break;
+
+		case ODM_RATEMCS8:
+			reg_txagc = R_0x84c;
+			reg_mask = 0x0000007f;
+			break;
+		case ODM_RATEMCS9:
+			reg_txagc = R_0x84c;
+			reg_mask = 0x00007f00;
+			break;
+		case ODM_RATEMCS10:
+			reg_txagc = R_0x84c;
+			reg_mask = 0x007f0000;
+			break;
+		case ODM_RATEMCS11:
+			reg_txagc = R_0x84c;
+			reg_mask = 0x7f000000;
+			break;
+		case ODM_RATEMCS12:
+			reg_txagc = R_0x868;
+			reg_mask = 0x0000007f;
+			break;
+		case ODM_RATEMCS13:
+			reg_txagc = R_0x868;
+			reg_mask = 0x00007f00;
+			break;
+		case ODM_RATEMCS14:
+			reg_txagc = R_0x868;
+			reg_mask = 0x007f0000;
+			break;
+		case ODM_RATEMCS15:
+			reg_txagc = R_0x868;
+			reg_mask = 0x7f000000;
+			break;
+
+		default:
+			PHYDM_DBG(dm, ODM_PHY_CONFIG, "Invalid HWrate!\n");
+			break;
+		}
+	} else {
+		PHYDM_DBG(dm, ODM_PHY_CONFIG, "Invalid RF path!!\n");
+	}
+	read_back_data = (u8)odm_get_bb_reg(dm, reg_txagc, reg_mask);
+	PHYDM_DBG(dm, ODM_PHY_CONFIG, "%s: path-%d rate index 0x%x = 0x%x\n",
+		  __func__, path, hw_rate, read_back_data);
+	return read_back_data;
+}
+#endif
 
 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
-void
-phydm_normal_driver_rx_sniffer(
-	struct PHY_DM_STRUCT			*p_dm,
-	u8				*p_desc,
-	PRT_RFD_STATUS		p_rt_rfd_status,
-	u8				*p_drv_info,
-	u8				phy_status
-)
+void phydm_normal_driver_rx_sniffer(
+	struct dm_struct *dm,
+	u8 *desc,
+	PRT_RFD_STATUS rt_rfd_status,
+	u8 *drv_info,
+	u8 phy_status)
 {
 #if (defined(CONFIG_PHYDM_RX_SNIFFER_PARSING))
-	u32		*p_msg;
-	u16		seq_num;
-	struct phydm_fat_struct		*p_dm_fat_table = &p_dm->dm_fat_table;
+	u32 *msg;
+	u16 seq_num;
 
-	if (p_rt_rfd_status->packet_report_type != NORMAL_RX)
+	if (rt_rfd_status->packet_report_type != NORMAL_RX)
 		return;
 
-	if (!p_dm->is_linked) {
-		if (p_rt_rfd_status->is_hw_error)
+	if (!dm->is_linked) {
+		if (rt_rfd_status->is_hw_error)
 			return;
 	}
 
-	if (!(p_dm_fat_table->fat_state == FAT_TRAINING_STATE))
-		return;
-
 	if (phy_status == true) {
-
-		if ((p_dm->rx_pkt_type == type_block_ack) || (p_dm->rx_pkt_type == type_rts) || (p_dm->rx_pkt_type == type_cts))
+		if (dm->rx_pkt_type == type_block_ack ||
+		    dm->rx_pkt_type == type_rts || dm->rx_pkt_type == type_cts)
 			seq_num = 0;
 		else
-			seq_num = p_rt_rfd_status->seq_num;
-
-		PHYDM_DBG_F(p_dm, ODM_COMP_SNIFFER, ("%04d , %01s, rate=0x%02x, L=%04d , %s , %s",
-				seq_num,
-				/*p_rt_rfd_status->mac_id,*/
-			((p_rt_rfd_status->is_crc) ? "C" : (p_rt_rfd_status->is_ampdu) ? "A" : "_"),
-				p_rt_rfd_status->data_rate,
-				p_rt_rfd_status->length,
-			((p_rt_rfd_status->band_width == 0) ? "20M" : ((p_rt_rfd_status->band_width == 1) ? "40M" : "80M")),
-				((p_rt_rfd_status->is_ldpc) ? "LDP" : "BCC")));
-
-		if (p_dm->rx_pkt_type == type_asoc_req) {
-			PHYDM_DBG_F(p_dm, ODM_COMP_SNIFFER, (" , [%s]", "AS_REQ"));
-			/**/
-		} else if (p_dm->rx_pkt_type == type_asoc_rsp) {
-			PHYDM_DBG_F(p_dm, ODM_COMP_SNIFFER, (" , [%s]", "AS_RSP"));
-			/**/
-		} else if (p_dm->rx_pkt_type == type_probe_req) {
-			PHYDM_DBG_F(p_dm, ODM_COMP_SNIFFER, (" , [%s]", "PR_REQ"));
-			/**/
-		} else if (p_dm->rx_pkt_type == type_probe_rsp) {
-			PHYDM_DBG_F(p_dm, ODM_COMP_SNIFFER, (" , [%s]", "PR_RSP"));
-			/**/
-		} else if (p_dm->rx_pkt_type == type_deauth) {
-			PHYDM_DBG_F(p_dm, ODM_COMP_SNIFFER, (" , [%s]", "DEAUTH"));
-			/**/
-		} else if (p_dm->rx_pkt_type == type_beacon) {
-			PHYDM_DBG_F(p_dm, ODM_COMP_SNIFFER, (" , [%s]", "BEACON"));
-			/**/
-		} else if (p_dm->rx_pkt_type == type_block_ack_req) {
-			PHYDM_DBG_F(p_dm, ODM_COMP_SNIFFER, (" , [%s]", "BA_REQ"));
-			/**/
-		} else if (p_dm->rx_pkt_type == type_rts) {
-			PHYDM_DBG_F(p_dm, ODM_COMP_SNIFFER, (" , [%s]", "__RTS_"));
-			/**/
-		} else if (p_dm->rx_pkt_type == type_cts) {
-			PHYDM_DBG_F(p_dm, ODM_COMP_SNIFFER, (" , [%s]", "__CTS_"));
-			/**/
-		} else if (p_dm->rx_pkt_type == type_ack) {
-			PHYDM_DBG_F(p_dm, ODM_COMP_SNIFFER, (" , [%s]", "__ACK_"));
-			/**/
-		} else if (p_dm->rx_pkt_type == type_block_ack) {
-			PHYDM_DBG_F(p_dm, ODM_COMP_SNIFFER, (" , [%s]", "__BA__"));
-			/**/
-		} else if (p_dm->rx_pkt_type == type_data) {
-			PHYDM_DBG_F(p_dm, ODM_COMP_SNIFFER, (" , [%s]", "_DATA_"));
-			/**/
-		} else if (p_dm->rx_pkt_type == type_data_ack) {
-			PHYDM_DBG_F(p_dm, ODM_COMP_SNIFFER, (" , [%s]", "Data_Ack"));
-			/**/
-		} else if (p_dm->rx_pkt_type == type_qos_data) {
-			PHYDM_DBG_F(p_dm, ODM_COMP_SNIFFER, (" , [%s]", "QoS_Data"));
-			/**/
-		} else {
-			PHYDM_DBG_F(p_dm, ODM_COMP_SNIFFER, (" , [0x%x]", p_dm->rx_pkt_type));
-			/**/
-		}
+			seq_num = rt_rfd_status->seq_num;
+
+		PHYDM_DBG_F(dm, ODM_COMP_SNIFFER,
+			    "%04d , %01s, rate=0x%02x, L=%04d , %s , %s",
+			    seq_num,
+			    /*rt_rfd_status->mac_id,*/
+			    (rt_rfd_status->is_crc ? "C" :
+			    rt_rfd_status->is_ampdu ? "A" : "_"),
+			    rt_rfd_status->data_rate,
+			    rt_rfd_status->length,
+			    ((rt_rfd_status->band_width == 0) ? "20M" :
+			    ((rt_rfd_status->band_width == 1) ? "40M" : "80M")),
+			    (rt_rfd_status->is_ldpc ? "LDP" : "BCC"));
+
+		if (dm->rx_pkt_type == type_asoc_req)
+			PHYDM_DBG_F(dm, ODM_COMP_SNIFFER, " , [%s]", "AS_REQ");
+		else if (dm->rx_pkt_type == type_asoc_rsp)
+			PHYDM_DBG_F(dm, ODM_COMP_SNIFFER, " , [%s]", "AS_RSP");
+		else if (dm->rx_pkt_type == type_probe_req)
+			PHYDM_DBG_F(dm, ODM_COMP_SNIFFER, " , [%s]", "PR_REQ");
+		else if (dm->rx_pkt_type == type_probe_rsp)
+			PHYDM_DBG_F(dm, ODM_COMP_SNIFFER, " , [%s]", "PR_RSP");
+		else if (dm->rx_pkt_type == type_deauth)
+			PHYDM_DBG_F(dm, ODM_COMP_SNIFFER, " , [%s]", "DEAUTH");
+		else if (dm->rx_pkt_type == type_beacon)
+			PHYDM_DBG_F(dm, ODM_COMP_SNIFFER, " , [%s]", "BEACON");
+		else if (dm->rx_pkt_type == type_block_ack_req)
+			PHYDM_DBG_F(dm, ODM_COMP_SNIFFER, " , [%s]", "BA_REQ");
+		else if (dm->rx_pkt_type == type_rts)
+			PHYDM_DBG_F(dm, ODM_COMP_SNIFFER, " , [%s]", "__RTS_");
+		else if (dm->rx_pkt_type == type_cts)
+			PHYDM_DBG_F(dm, ODM_COMP_SNIFFER, " , [%s]", "__CTS_");
+		else if (dm->rx_pkt_type == type_ack)
+			PHYDM_DBG_F(dm, ODM_COMP_SNIFFER, " , [%s]", "__ACK_");
+		else if (dm->rx_pkt_type == type_block_ack)
+			PHYDM_DBG_F(dm, ODM_COMP_SNIFFER, " , [%s]", "__BA__");
+		else if (dm->rx_pkt_type == type_data)
+			PHYDM_DBG_F(dm, ODM_COMP_SNIFFER, " , [%s]", "_DATA_");
+		else if (dm->rx_pkt_type == type_data_ack)
+			PHYDM_DBG_F(dm, ODM_COMP_SNIFFER, " , [%s]", "Data_Ack");
+		else if (dm->rx_pkt_type == type_qos_data)
+			PHYDM_DBG_F(dm, ODM_COMP_SNIFFER, " , [%s]", "QoS_Data");
+		else
+			PHYDM_DBG_F(dm, ODM_COMP_SNIFFER, " , [0x%x]",
+				    dm->rx_pkt_type);
 
-		PHYDM_DBG_F(p_dm, ODM_COMP_SNIFFER, (" , [RSSI=%d,%d,%d,%d ]",
-				p_dm->RSSI_A,
-				p_dm->RSSI_B,
-				p_dm->RSSI_C,
-				p_dm->RSSI_D));
+		PHYDM_DBG_F(dm, ODM_COMP_SNIFFER, " , [RSSI=%d,%d,%d,%d ]",
+			    dm->rssi_a,
+			    dm->rssi_b,
+			    dm->rssi_c,
+			    dm->rssi_d);
 
-		p_msg = (u32 *)p_drv_info;
+		msg = (u32 *)drv_info;
 
-		PHYDM_DBG_F(p_dm, ODM_COMP_SNIFFER, (" , P-STS[28:0]=%08x-%08x-%08x-%08x-%08x-%08x-%08x\n",
-			p_msg[6], p_msg[5], p_msg[4], p_msg[3], p_msg[2], p_msg[1], p_msg[1]));
+		PHYDM_DBG_F(dm, ODM_COMP_SNIFFER,
+			    " , P-STS[28:0]=%08x-%08x-%08x-%08x-%08x-%08x-%08x\n",
+			    msg[6], msg[5], msg[4], msg[3],
+			    msg[2], msg[1], msg[1]);
 	} else {
-
-		PHYDM_DBG_F(p_dm, ODM_COMP_SNIFFER, ("%04d , %01s, rate=0x%02x, L=%04d , %s , %s\n",
-				p_rt_rfd_status->seq_num,
-				/*p_rt_rfd_status->mac_id,*/
-			((p_rt_rfd_status->is_crc) ? "C" : (p_rt_rfd_status->is_ampdu) ? "A" : "_"),
-				p_rt_rfd_status->data_rate,
-				p_rt_rfd_status->length,
-			((p_rt_rfd_status->band_width == 0) ? "20M" : ((p_rt_rfd_status->band_width == 1) ? "40M" : "80M")),
-				((p_rt_rfd_status->is_ldpc) ? "LDP" : "BCC")));
+		PHYDM_DBG_F(dm, ODM_COMP_SNIFFER,
+			    "%04d , %01s, rate=0x%02x, L=%04d , %s , %s\n",
+			    rt_rfd_status->seq_num,
+			    /*rt_rfd_status->mac_id,*/
+			    (rt_rfd_status->is_crc ? "C" :
+			    (rt_rfd_status->is_ampdu) ? "A" : "_"),
+			    rt_rfd_status->data_rate,
+			    rt_rfd_status->length,
+			    ((rt_rfd_status->band_width == 0) ? "20M" :
+			    ((rt_rfd_status->band_width == 1) ? "40M" : "80M")),
+			    (rt_rfd_status->is_ldpc ? "LDP" : "BCC"));
 	}
 
-
 #endif
 }
 #endif
-
diff --git a/rtl8723DS/hal/phydm/phydm_api.h b/rtl8723DS/hal/phydm/phydm_api.h
index 446350e..8ab47a0 100755..100644
--- a/rtl8723DS/hal/phydm/phydm_api.h
+++ b/rtl8723DS/hal/phydm/phydm_api.h
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2007 - 2017 Realtek Corporation.
+ * Copyright(c) 2007 - 2017  Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -8,193 +8,178 @@
  *
  * This program is distributed in the hope that it will be useful, but WITHOUT
  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  * more details.
  *
+ * The full GNU General Public License is included in this distribution in the
+ * file called LICENSE.
+ *
+ * Contact Information:
+ * wlanfae <wlanfae@realtek.com>
+ * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
+ * Hsinchu 300, Taiwan.
+ *
+ * Larry Finger <Larry.Finger@lwfinger.net>
+ *
  *****************************************************************************/
 
+#ifndef __PHYDM_API_H__
+#define __PHYDM_API_H__
 
-#ifndef	__PHYDM_API_H__
-#define    __PHYDM_API_H__
+#define PHYDM_API_VERSION "1.0" /* @2017.07.10  Dino, Add phydm_api.h*/
 
-#define PHYDM_API_VERSION	"1.0"		/* 2017.07.10  Dino, Add phydm_api.h*/
-
-
-/* 1 ============================================================
+/* @1 ============================================================
  * 1  Definition
- * 1 ============================================================ */
+ * 1 ============================================================
+ */
+#define CN_CNT_MAX 10 /*@max condition number threshold*/
 
+#define FUNC_ENABLE 1
+#define FUNC_DISABLE 2
 
-#define	FUNC_ENABLE 1
-#define	FUNC_DISABLE 2
+/*@NBI API------------------------------------*/
+#define NBI_128TONE 27 /*register table size*/
+#define NBI_256TONE 59 /*register table size*/
 
-/*NBI API------------------------------------*/
-#define	NBI_TABLE_SIZE_128	27
-#define	NBI_TABLE_SIZE_256	59
+#define NUM_START_CH_80M 7
+#define NUM_START_CH_40M 14
 
-#define	NUM_START_CH_80M	7
-#define	NUM_START_CH_40M	14
+#define CH_OFFSET_40M 2
+#define CH_OFFSET_80M 6
 
-#define	CH_OFFSET_40M		2
-#define	CH_OFFSET_80M		6
+#define FFT_128_TYPE 1
+#define FFT_256_TYPE 2
 
-#define	FFT_128_TYPE	1
-#define	FFT_256_TYPE	2
+#define FREQ_POSITIVE 1
+#define FREQ_NEGATIVE 2
+/*@------------------------------------------------*/
 
-#define	FREQ_POSITIVE	1
-#define	FREQ_NEGATIVE	2
-/*------------------------------------------------*/
+enum phystat_rpt {
+	PHY_PWDB = 0,
+	PHY_EVM = 1,
+	PHY_CFO = 2,
+	PHY_RXSNR = 3,
+	PHY_LGAIN = 4,
+	PHY_HT_AAGC_GAIN = 5,
+};
 
-/* 1 ============================================================
+#ifndef PHYDM_COMMON_API_SUPPORT
+#define INVALID_RF_DATA 0xffffffff
+#define INVALID_TXAGC_DATA 0xff
+#endif
+
+/* @1 ============================================================
  * 1  structure
- * 1 ============================================================ */
+ * 1 ============================================================
+ */
 
 struct phydm_api_stuc {
-
-	u32	rx_iqc_reg_1;	/*N-mode: for pathA REG0xc14*/
-	u32	rx_iqc_reg_2;	/*N-mode: for pathB REG0xc1c*/
-	u8	tx_queue_bitmap;/*REG0x520[23:16]*/
-
+	u32 rxiqc_reg1; /*N-mode: for pathA REG0xc14*/
+	u32 rxiqc_reg2; /*N-mode: for pathB REG0xc1c*/
+	u8 tx_queue_bitmap; /*REG0x520[23:16]*/
+	u8 ccktx_path;
 };
 
-/* 1 ============================================================
+/* @1 ============================================================
  * 1  enumeration
- * 1 ============================================================ */
+ * 1 ============================================================
+ */
+
+/* @1 ============================================================
+ * 1  function prototype
+ * 1 ============================================================
+ */
+void phydm_reset_bb_hw_cnt(void *dm_void);
 
+void phydm_dynamic_ant_weighting(void *dm_void);
 
+#ifdef DYN_ANT_WEIGHTING_SUPPORT
+void phydm_ant_weight_dbg(void *dm_void, char input[][16], u32 *_used,
+			  char *output, u32 *_out_len);
+#endif
 
-/* 1 ============================================================
- * 1  function prototype
- * 1 ============================================================ */
-
-void
-phydm_init_trx_antenna_setting(
-	void		*p_dm_void
-);
-
-void
-phydm_config_ofdm_rx_path(
-	void		*p_dm_void,
-	u32		path
-);
-
-void
-phydm_config_cck_rx_path(
-	void		*p_dm_void,
-	enum bb_path	path
-);
-
-void
-phydm_config_cck_rx_antenna_init(
-	void		*p_dm_void
-);
-
-void
-phydm_config_trx_path(
-	void		*p_dm_void,
-	u32		*const dm_value,
-	u32		*_used,
-	char		*output,
-	u32		*_out_len
-);
-
-void
-phydm_stop_3_wire(
-	void		*p_dm_void,
-	u8		set_type
-);
-
-u8
-phydm_stop_ic_trx(
-	void		*p_dm_void,
-	u8		set_type
-);
-
-void
-phydm_set_ext_switch(
-	void		*p_dm_void,
-	u32		*const dm_value,
-	u32		*_used,
-	char		*output,
-	u32		*_out_len
-);
-
-void
-phydm_nbi_enable(
-	void		*p_dm_void,
-	u32		enable
-);
-
-u8
-phydm_csi_mask_setting(
-	void		*p_dm_void,
-	u32		enable,
-	u32		channel,
-	u32		bw,
-	u32		f_interference,
-	u32		Second_ch
-);
-
-u8
-phydm_nbi_setting(
-	void		*p_dm_void,
-	u32		enable,
-	u32		channel,
-	u32		bw,
-	u32		f_interference,
-	u32		second_ch
-);
-
-
-void
-phydm_api_debug(
-	void		*p_dm_void,
-	u32		function_map,
-	u32		*const dm_value,
-	u32		*_used,
-	char		*output,
-	u32		*_out_len
-);
-
-void
-phydm_stop_ck320(
-	void			*p_dm_void,
-	u8			enable
-);
+void phydm_pathb_q_matrix_rotate_en(void *dm_void);
 
-#ifdef PHYDM_COMMON_API_SUPPORT
+void phydm_pathb_q_matrix_rotate(void *dm_void, u16 phase_idx);
+
+void phydm_trx_antenna_setting_init(void *dm_void, u8 num_rf_path);
+
+void phydm_config_ofdm_rx_path(void *dm_void, u32 path);
+
+void phydm_config_cck_rx_path(void *dm_void, enum bb_path path);
+
+void phydm_config_cck_rx_antenna_init(void *dm_void);
+
+void phydm_config_trx_path(void *dm_void, char input[][16], u32 *_used,
+			   char *output, u32 *_out_len);
+
+void phydm_tx_2path(void *dm_void);
+
+void phydm_stop_3_wire(void *dm_void, u8 set_type);
+
+u8 phydm_stop_ic_trx(void *dm_void, u8 set_type);
+
+void phydm_dis_cck_trx(void *dm_void, u8 set_type);
+
+void phydm_set_ext_switch(void *dm_void, u32 ext_ant_switch);
+
+void phydm_nbi_enable(void *dm_void, u32 enable);
+
+u8 phydm_csi_mask_setting(void *dm_void, u32 enable, u32 ch, u32 bw, u32 f_intf,
+			  u32 sec_ch);
+
+u8 phydm_nbi_setting(void *dm_void, u32 enable, u32 ch, u32 bw, u32 f_intf,
+		     u32 sec_ch);
+
+void phydm_nbi_debug(void *dm_void, char input[][16], u32 *_used,
+		     char *output, u32 *_out_len);
+
+void phydm_csi_debug(void *dm_void, char input[][16], u32 *_used,
+		     char *output, u32 *_out_len);
+
+void phydm_stop_ck320(void *dm_void, u8 enable);
 
 boolean
-phydm_api_set_txagc(
-	void				*p_dm_void,
-	u32				power_index,
-	enum rf_path		path,
-	u8				hw_rate,
-	boolean			is_single_rate
-);
-
-u8
-phydm_api_get_txagc(
-	void				*p_dm_void,
-	enum rf_path		path,
-	u8				hw_rate
-);
+phydm_set_bb_txagc_offset(void *dm_void, s8 power_offset, u8 add_half_db);
+#ifdef PHYDM_IC_JGR3_SERIES_SUPPORT
+u8 phydm_csi_mask_setting_jgr3(void *dm_void, u32 enable, u32 ch, u32 bw,
+			       u32 f_intf, u32 sec_ch, u8 wgt);
+
+void phydm_set_csi_mask_jgr3(void *dm_void, u32 tone_idx_tmp, u8 tone_direction,
+			     u8 wgt);
+
+u8 phydm_nbi_setting_jgr3(void *dm_void, u32 enable, u32 ch, u32 bw, u32 f_intf,
+			  u32 sec_ch, u8 path);
+
+void phydm_set_nbi_reg_jgr3(void *dm_void, u32 tone_idx_tmp, u8 tone_direction,
+			    u8 path);
+
+void phydm_nbi_enable_jgr3(void *dm_void, u32 enable, u8 path);
+
+u8 phydm_phystat_rpt_jgr3(void *dm_void, enum phystat_rpt info,
+			  enum rf_path ant_path);
+void phydm_user_position_for_sniffer(void *dm_void, u8 user_position);
+
+void phydm_txagc_power_limit(void *dm_void, boolean is_bf, u8 ss, u8 pwr);
+#endif
+
+#ifdef PHYDM_COMMON_API_SUPPORT
+boolean
+phydm_api_shift_txagc(void *dm_void, u32 pwr_offset, enum rf_path path,
+		      boolean is_positive);
+boolean
+phydm_api_set_txagc(void *dm_void, u32 power_index, enum rf_path path,
+		    u8 hw_rate, boolean is_single_rate);
+
+u8 phydm_api_get_txagc(void *dm_void, enum rf_path path, u8 hw_rate);
 
 boolean
-phydm_api_switch_bw_channel(
-	void					*p_dm_void,
-	u8					central_ch,
-	u8					primary_ch_idx,
-	enum channel_width	bandwidth
-);
+phydm_api_switch_bw_channel(void *dm_void, u8 central_ch, u8 primary_ch_idx,
+			    enum channel_width bandwidth);
 
 boolean
-phydm_api_trx_mode(
-	void				*p_dm_void,
-	enum bb_path	tx_path,
-	enum bb_path	rx_path,
-	boolean			is_tx2_path
-);
+phydm_api_trx_mode(void *dm_void, enum bb_path tx_path, enum bb_path rx_path,
+		   boolean is_tx2_path);
 
 #endif
 
diff --git a/rtl8723DS/hal/phydm/phydm_auto_dbg.c b/rtl8723DS/hal/phydm/phydm_auto_dbg.c
index e396a2f..1a9d953 100755..100644
--- a/rtl8723DS/hal/phydm/phydm_auto_dbg.c
+++ b/rtl8723DS/hal/phydm/phydm_auto_dbg.c
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2007 - 2017 Realtek Corporation.
+ * Copyright(c) 2007 - 2017  Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -8,628 +8,706 @@
  *
  * This program is distributed in the hope that it will be useful, but WITHOUT
  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  * more details.
  *
+ * The full GNU General Public License is included in this distribution in the
+ * file called LICENSE.
+ *
+ * Contact Information:
+ * wlanfae <wlanfae@realtek.com>
+ * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
+ * Hsinchu 300, Taiwan.
+ *
+ * Larry Finger <Larry.Finger@lwfinger.net>
+ *
  *****************************************************************************/
 
-/* ************************************************************
+/*************************************************************
  * include files
- * ************************************************************ */
+ ************************************************************/
 
 #include "mp_precomp.h"
 #include "phydm_precomp.h"
 
 #ifdef PHYDM_AUTO_DEGBUG
 
-void
-phydm_check_hang_reset(
-	void			*p_dm_void
-)
+void phydm_check_hang_reset(
+	void *dm_void)
 {
-	struct PHY_DM_STRUCT	*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	struct phydm_auto_dbg_struc	*p_atd_t = &(p_dm->auto_dbg_table);
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct phydm_auto_dbg_struct *atd_t = &dm->auto_dbg_table;
 
-	dbg_print("%s ======>\n", __func__);
+	atd_t->dbg_step = 0;
+	atd_t->auto_dbg_type = AUTO_DBG_STOP;
+	phydm_pause_dm_watchdog(dm, PHYDM_RESUME);
+	dm->debug_components &= (~ODM_COMP_API);
+}
+
+void phydm_check_hang_init(
+	void *dm_void)
+{
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct phydm_auto_dbg_struct *atd_t = &dm->auto_dbg_table;
 
-	p_atd_t->dbg_step = 0;
-	p_atd_t->auto_dbg_type = AUTO_DBG_STOP;
-	phydm_pause_dm_watchdog(p_dm, PHYDM_RESUME);
-	p_dm->debug_components &= (~ODM_COMP_API);
+	atd_t->dbg_step = 0;
+	atd_t->auto_dbg_type = AUTO_DBG_STOP;
+	phydm_pause_dm_watchdog(dm, PHYDM_RESUME);
 }
 
 #if (ODM_IC_11N_SERIES_SUPPORT == 1)
-void
-phydm_auto_check_hang_engine_n(
-	void			*p_dm_void
-)
+void phydm_auto_check_hang_engine_n(
+	void *dm_void)
 {
-	struct	PHY_DM_STRUCT	*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	struct	phydm_auto_dbg_struc	*p_atd_t = &(p_dm->auto_dbg_table);
-	struct	n_dbgport_803	dbgport_803 = {0};
-	u32		value32_tmp = 0, value32_tmp_2 = 0;
-	u8		i;
-	u32		curr_dbg_port_val[DBGPORT_CHK_NUM];
-	u16		curr_ofdm_t_cnt;
-	u16		curr_ofdm_r_cnt;
-	u16		curr_cck_t_cnt;
-	u16		curr_cck_r_cnt;
-	u16		curr_ofdm_crc_error_cnt;
-	u16		curr_cck_crc_error_cnt;
-	u16		diff_ofdm_t_cnt;
-	u16		diff_ofdm_r_cnt;
-	u16		diff_cck_t_cnt;
-	u16		diff_cck_r_cnt;
-	u16		diff_ofdm_crc_error_cnt;
-	u16		diff_cck_crc_error_cnt;
-	u8		rf_mode;
-
-
-	if (p_atd_t->auto_dbg_type == AUTO_DBG_STOP)
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct phydm_auto_dbg_struct *atd_t = &dm->auto_dbg_table;
+	struct n_dbgport_803 dbgport_803 = {0};
+	u32 value32_tmp = 0, value32_tmp_2 = 0;
+	u8 i;
+	u32 curr_dbg_port_val[DBGPORT_CHK_NUM];
+	u16 curr_ofdm_t_cnt;
+	u16 curr_ofdm_r_cnt;
+	u16 curr_cck_t_cnt;
+	u16 curr_cck_r_cnt;
+	u16 curr_ofdm_crc_error_cnt;
+	u16 curr_cck_crc_error_cnt;
+	u16 diff_ofdm_t_cnt;
+	u16 diff_ofdm_r_cnt;
+	u16 diff_cck_t_cnt;
+	u16 diff_cck_r_cnt;
+	u16 diff_ofdm_crc_error_cnt;
+	u16 diff_cck_crc_error_cnt;
+	u8 rf_mode;
+
+	if (atd_t->auto_dbg_type == AUTO_DBG_STOP)
 		return;
 
-	if (p_dm->support_ic_type & ODM_IC_11AC_SERIES) {
-
-		phydm_check_hang_reset(p_dm);
+	if (dm->support_ic_type & ODM_IC_11AC_SERIES) {
+		phydm_check_hang_reset(dm);
 		return;
 	}
 
-	if (p_atd_t->dbg_step == 0) {
+	if (atd_t->dbg_step == 0) {
+		pr_debug("dbg_step=0\n\n");
 
-		dbg_print("dbg_step=0\n\n");
-		
 		/*Reset all packet counter*/
-		odm_set_bb_reg(p_dm, 0xf14, BIT(16), 1);
-		odm_set_bb_reg(p_dm, 0xf14, BIT(16), 0);
-
-
+		odm_set_bb_reg(dm, R_0xf14, BIT(16), 1);
+		odm_set_bb_reg(dm, R_0xf14, BIT(16), 0);
 
-	} else if (p_atd_t->dbg_step == 1)  {
-
-		dbg_print("dbg_step=1\n\n");
+	} else if (atd_t->dbg_step == 1) {
+		pr_debug("dbg_step=1\n\n");
 
 		/*Check packet counter Register*/
-		p_atd_t->ofdm_t_cnt = (u16)odm_get_bb_reg(p_dm, 0x9cc, MASKHWORD);
-		p_atd_t->ofdm_r_cnt = (u16)odm_get_bb_reg(p_dm, 0xf94, MASKLWORD);
-		p_atd_t->ofdm_crc_error_cnt = (u16)odm_get_bb_reg(p_dm, 0xf94, MASKHWORD);
-		
-		p_atd_t->cck_t_cnt = (u16)odm_get_bb_reg(p_dm, 0x9d0, MASKHWORD);;
-		p_atd_t->cck_r_cnt = (u16)odm_get_bb_reg(p_dm, 0xfa0, MASKHWORD);
-		p_atd_t->cck_crc_error_cnt = (u16)odm_get_bb_reg(p_dm, 0xf84, 0x3fff);	
+		atd_t->ofdm_t_cnt = (u16)odm_get_bb_reg(dm, R_0x9cc, MASKHWORD);
+		atd_t->ofdm_r_cnt = (u16)odm_get_bb_reg(dm, R_0xf94, MASKLWORD);
+		atd_t->ofdm_crc_error_cnt = (u16)odm_get_bb_reg(dm, R_0xf94,
+								MASKHWORD);
 
+		atd_t->cck_t_cnt = (u16)odm_get_bb_reg(dm, R_0x9d0, MASKHWORD);
+		atd_t->cck_r_cnt = (u16)odm_get_bb_reg(dm, R_0xfa0, MASKHWORD);
+		atd_t->cck_crc_error_cnt = (u16)odm_get_bb_reg(dm, R_0xf84,
+							       0x3fff);
 
 		/*Check Debug Port*/
 		for (i = 0; i < DBGPORT_CHK_NUM; i++) {
-			
-			if (phydm_set_bb_dbg_port(p_dm, BB_DBGPORT_PRIORITY_3, (u32)p_atd_t->dbg_port_table[i])) {
-				p_atd_t->dbg_port_val[i] = phydm_get_bb_dbg_port_value(p_dm);
-				phydm_release_bb_dbg_port(p_dm);
+			if (phydm_set_bb_dbg_port(dm, DBGPORT_PRI_3,
+						  (u32)atd_t->dbg_port_table[i])
+						  ) {
+				atd_t->dbg_port_val[i] =
+					phydm_get_bb_dbg_port_val(dm);
+				phydm_release_bb_dbg_port(dm);
 			}
 		}
-	
-	} else if (p_atd_t->dbg_step == 2)  {
 
-		dbg_print("dbg_step=2\n\n");
+	} else if (atd_t->dbg_step == 2) {
+		pr_debug("dbg_step=2\n\n");
 
 		/*Check packet counter Register*/
-		curr_ofdm_t_cnt = (u16)odm_get_bb_reg(p_dm, 0x9cc, MASKHWORD);
-		curr_ofdm_r_cnt = (u16)odm_get_bb_reg(p_dm, 0xf94, MASKLWORD);
-		curr_ofdm_crc_error_cnt = (u16)odm_get_bb_reg(p_dm, 0xf94, MASKHWORD);
-		
-		curr_cck_t_cnt = (u16)odm_get_bb_reg(p_dm, 0x9d0, MASKHWORD);;
-		curr_cck_r_cnt = (u16)odm_get_bb_reg(p_dm, 0xfa0, MASKHWORD);
-		curr_cck_crc_error_cnt = (u16)odm_get_bb_reg(p_dm, 0xf84, 0x3fff);	
+		curr_ofdm_t_cnt = (u16)odm_get_bb_reg(dm, R_0x9cc, MASKHWORD);
+		curr_ofdm_r_cnt = (u16)odm_get_bb_reg(dm, R_0xf94, MASKLWORD);
+		curr_ofdm_crc_error_cnt = (u16)odm_get_bb_reg(dm, R_0xf94,
+							      MASKHWORD);
+
+		curr_cck_t_cnt = (u16)odm_get_bb_reg(dm, R_0x9d0, MASKHWORD);
+		curr_cck_r_cnt = (u16)odm_get_bb_reg(dm, R_0xfa0, MASKHWORD);
+		curr_cck_crc_error_cnt = (u16)odm_get_bb_reg(dm, R_0xf84,
+							     0x3fff);
 
 		/*Check Debug Port*/
 		for (i = 0; i < DBGPORT_CHK_NUM; i++) {
-			
-			if (phydm_set_bb_dbg_port(p_dm, BB_DBGPORT_PRIORITY_3, (u32)p_atd_t->dbg_port_table[i])) {
-				curr_dbg_port_val[i] = phydm_get_bb_dbg_port_value(p_dm);
-				phydm_release_bb_dbg_port(p_dm);
+			if (phydm_set_bb_dbg_port(dm, DBGPORT_PRI_3,
+						  (u32)atd_t->dbg_port_table[i])
+						  ) {
+				curr_dbg_port_val[i] =
+					phydm_get_bb_dbg_port_val(dm);
+				phydm_release_bb_dbg_port(dm);
 			}
 		}
-	
-		/*=== Make check hang decision ================================*/
-		dbg_print("Check Hang Decision\n\n");
 
-		/* ----- Check RF Register -----------------------------------*/
-		for (i = 0; i < p_dm->num_rf_path; i++) {
-		
-			rf_mode = (u8)odm_get_rf_reg(p_dm, i, 0x0, 0xf0000);
-				
-			dbg_print("RF0x0[%d] = 0x%x\n", i, rf_mode);
+		/*=== Make check hang decision ===============================*/
+		pr_debug("Check Hang Decision\n\n");
 
+		/* ----- Check RF Register -----------------------------------*/
+		for (i = 0; i < dm->num_rf_path; i++) {
+			rf_mode = (u8)odm_get_rf_reg(dm, i, RF_0x0, 0xf0000);
+			pr_debug("RF0x0[%d] = 0x%x\n", i, rf_mode);
 			if (rf_mode > 3) {
-				dbg_print("Incorrect RF mode\n");
-				dbg_print("ReasonCode:RHN-1\n");
-
-				
+				pr_debug("Incorrect RF mode\n");
+				pr_debug("ReasonCode:RHN-1\n");
 			}
 		}
-
-		value32_tmp = odm_get_rf_reg(p_dm, 0, 0xb0, 0xf0000);
-			
-		if (p_dm->support_ic_type == ODM_RTL8188E) {
+		value32_tmp = odm_get_rf_reg(dm, 0, RF_0xb0, 0xf0000);
+		if (dm->support_ic_type == ODM_RTL8188E) {
 			if (value32_tmp != 0xff8c8) {
-				dbg_print("ReasonCode:RHN-3\n");
+				pr_debug("ReasonCode:RHN-3\n");
 			}
 		}
-
-		/* ----- Check BB Register -----------------------------------*/
-		
+		/* ----- Check BB Register ----------------------------------*/
 		/*BB mode table*/
-		value32_tmp = odm_get_bb_reg(p_dm, 0x824, 0xe);
-		value32_tmp_2 = odm_get_bb_reg(p_dm, 0x82c, 0xe);
-		dbg_print("BB TX mode table {A, B}= {%d, %d}\n", value32_tmp, value32_tmp_2);
+		value32_tmp = odm_get_bb_reg(dm, R_0x824, 0xe);
+		value32_tmp_2 = odm_get_bb_reg(dm, R_0x82c, 0xe);
+		pr_debug("BB TX mode table {A, B}= {%d, %d}\n",
+			 value32_tmp, value32_tmp_2);
 
-		if ((value32_tmp > 3) || (value32_tmp_2 > 3)) {
-			
-			dbg_print("ReasonCode:RHN-2\n");
+		if (value32_tmp > 3 || value32_tmp_2 > 3) {
+			pr_debug("ReasonCode:RHN-2\n");
 		}
 
-		value32_tmp = odm_get_bb_reg(p_dm, 0x824, 0x700000);
-		value32_tmp_2 = odm_get_bb_reg(p_dm, 0x82c, 0x700000);
-		dbg_print("BB RX mode table {A, B}= {%d, %d}\n", value32_tmp, value32_tmp_2);
+		value32_tmp = odm_get_bb_reg(dm, R_0x824, 0x700000);
+		value32_tmp_2 = odm_get_bb_reg(dm, R_0x82c, 0x700000);
+		pr_debug("BB RX mode table {A, B}= {%d, %d}\n", value32_tmp,
+			 value32_tmp_2);
 
-		if ((value32_tmp > 3) || (value32_tmp_2 > 3)) {
-			
-			dbg_print("ReasonCode:RHN-2\n");
+		if (value32_tmp > 3 || value32_tmp_2 > 3) {
+			pr_debug("ReasonCode:RHN-2\n");
 		}
-		
 
 		/*BB HW Block*/
-		value32_tmp = odm_get_bb_reg(p_dm, 0x800, MASKDWORD);
-		
+		value32_tmp = odm_get_bb_reg(dm, R_0x800, MASKDWORD);
+
 		if (!(value32_tmp & BIT(24))) {
-			dbg_print("Reg0x800[24] = 0, CCK BLK is disabled\n");
-			dbg_print("ReasonCode: THN-3\n");
+			pr_debug("Reg0x800[24] = 0, CCK BLK is disabled\n");
+			pr_debug("ReasonCode: THN-3\n");
 		}
-		
+
 		if (!(value32_tmp & BIT(25))) {
-			dbg_print("Reg0x800[24] = 0, OFDM BLK is disabled\n");
-			dbg_print("ReasonCode:THN-3\n");
+			pr_debug("Reg0x800[24] = 0, OFDM BLK is disabled\n");
+			pr_debug("ReasonCode:THN-3\n");
 		}
 
 		/*BB Continue TX*/
-		value32_tmp = odm_get_bb_reg(p_dm, 0xd00, 0x70000000);
-		dbg_print("Continue TX=%d\n", value32_tmp);
+		value32_tmp = odm_get_bb_reg(dm, R_0xd00, 0x70000000);
+		pr_debug("Continue TX=%d\n", value32_tmp);
 		if (value32_tmp != 0) {
-			dbg_print("ReasonCode: THN-4\n");
+			pr_debug("ReasonCode: THN-4\n");
 		}
-		
 
 		/* ----- Check Packet Counter --------------------------------*/
-		diff_ofdm_t_cnt = curr_ofdm_t_cnt - p_atd_t->ofdm_t_cnt;
-		diff_ofdm_r_cnt = curr_ofdm_r_cnt - p_atd_t->ofdm_r_cnt;
-		diff_ofdm_crc_error_cnt = curr_ofdm_crc_error_cnt - p_atd_t->ofdm_crc_error_cnt;
-		
-		diff_cck_t_cnt = curr_cck_t_cnt - p_atd_t->cck_t_cnt;
-		diff_cck_r_cnt = curr_cck_r_cnt - p_atd_t->cck_r_cnt;
-		diff_cck_crc_error_cnt = curr_cck_crc_error_cnt - p_atd_t->cck_crc_error_cnt;
-
-		dbg_print("OFDM[t=0~1] {TX, RX, CRC_error} = {%d, %d, %d}\n", 
-			p_atd_t->ofdm_t_cnt, p_atd_t->ofdm_r_cnt, p_atd_t->ofdm_crc_error_cnt);
-		dbg_print("OFDM[t=1~2] {TX, RX, CRC_error} = {%d, %d, %d}\n", 
-			curr_ofdm_t_cnt, curr_ofdm_r_cnt, curr_ofdm_crc_error_cnt);
-		dbg_print("OFDM_diff {TX, RX, CRC_error} = {%d, %d, %d}\n", 
-			diff_ofdm_t_cnt, diff_ofdm_r_cnt, diff_ofdm_crc_error_cnt);
-
-		dbg_print("CCK[t=0~1] {TX, RX, CRC_error} = {%d, %d, %d}\n", 
-			p_atd_t->cck_t_cnt, p_atd_t->cck_r_cnt, p_atd_t->cck_crc_error_cnt);
-		dbg_print("CCK[t=1~2] {TX, RX, CRC_error} = {%d, %d, %d}\n", 
-			curr_cck_t_cnt, curr_cck_r_cnt, curr_cck_crc_error_cnt);
-		dbg_print("CCK_diff {TX, RX, CRC_error} = {%d, %d, %d}\n", 
-			diff_cck_t_cnt, diff_cck_r_cnt, diff_cck_crc_error_cnt);
+		diff_ofdm_t_cnt = curr_ofdm_t_cnt - atd_t->ofdm_t_cnt;
+		diff_ofdm_r_cnt = curr_ofdm_r_cnt - atd_t->ofdm_r_cnt;
+		diff_ofdm_crc_error_cnt = curr_ofdm_crc_error_cnt -
+					  atd_t->ofdm_crc_error_cnt;
+
+		diff_cck_t_cnt = curr_cck_t_cnt - atd_t->cck_t_cnt;
+		diff_cck_r_cnt = curr_cck_r_cnt - atd_t->cck_r_cnt;
+		diff_cck_crc_error_cnt = curr_cck_crc_error_cnt -
+					 atd_t->cck_crc_error_cnt;
+
+		pr_debug("OFDM[t=0~1] {TX, RX, CRC_error} = {%d, %d, %d}\n",
+			 atd_t->ofdm_t_cnt, atd_t->ofdm_r_cnt,
+			 atd_t->ofdm_crc_error_cnt);
+		pr_debug("OFDM[t=1~2] {TX, RX, CRC_error} = {%d, %d, %d}\n",
+			 curr_ofdm_t_cnt, curr_ofdm_r_cnt,
+			 curr_ofdm_crc_error_cnt);
+		pr_debug("OFDM_diff {TX, RX, CRC_error} = {%d, %d, %d}\n",
+			 diff_ofdm_t_cnt, diff_ofdm_r_cnt,
+			 diff_ofdm_crc_error_cnt);
+
+		pr_debug("CCK[t=0~1] {TX, RX, CRC_error} = {%d, %d, %d}\n",
+			 atd_t->cck_t_cnt, atd_t->cck_r_cnt,
+			 atd_t->cck_crc_error_cnt);
+		pr_debug("CCK[t=1~2] {TX, RX, CRC_error} = {%d, %d, %d}\n",
+			 curr_cck_t_cnt, curr_cck_r_cnt,
+			 curr_cck_crc_error_cnt);
+		pr_debug("CCK_diff {TX, RX, CRC_error} = {%d, %d, %d}\n",
+			 diff_cck_t_cnt, diff_cck_r_cnt,
+			 diff_cck_crc_error_cnt);
 
 		/* ----- Check Dbg Port --------------------------------*/
 
 		for (i = 0; i < DBGPORT_CHK_NUM; i++) {
-
-			dbg_print("Dbg_port=((0x%x))\n", p_atd_t->dbg_port_table[i]);
-			dbg_print("Val{pre, curr}={0x%x, 0x%x}\n", p_atd_t->dbg_port_val[i], curr_dbg_port_val[i]);
-
-			if ((p_atd_t->dbg_port_table[i]) == 0) {
-
-				if (p_atd_t->dbg_port_val[i] == curr_dbg_port_val[i]) {
-					
-					dbg_print("BB state hang\n");
-					dbg_print("ReasonCode:\n");
+			pr_debug("Dbg_port=((0x%x))\n",
+				 atd_t->dbg_port_table[i]);
+			pr_debug("Val{pre, curr}={0x%x, 0x%x}\n",
+				 atd_t->dbg_port_val[i], curr_dbg_port_val[i]);
+
+			if (atd_t->dbg_port_table[i] == 0) {
+				if (atd_t->dbg_port_val[i] ==
+				    curr_dbg_port_val[i]) {
+					pr_debug("BB state hang\n");
+					pr_debug("ReasonCode:\n");
 				}
 
-			} else if (p_atd_t->dbg_port_table[i] == 0x803) {
-
-				if (p_atd_t->dbg_port_val[i] == curr_dbg_port_val[i]) {
-
-					//dbgport_803 = (struct n_dbgport_803 )(p_atd_t->dbg_port_val[i]);
-
-					odm_move_memory(p_dm, &(dbgport_803),  &(p_atd_t->dbg_port_val[i]), sizeof(struct n_dbgport_803));
-
-					dbg_print("RSTB{BB, GLB, OFDM}={%d, %d, %d}\n", dbgport_803.bb_rst_b, dbgport_803.glb_rst_b, dbgport_803.ofdm_rst_b);
-					dbg_print("{ofdm_tx_en, cck_tx_en, phy_tx_on}={%d, %d, %d}\n", dbgport_803.ofdm_tx_en, dbgport_803.cck_tx_en, dbgport_803.phy_tx_on);
-					dbg_print("CCA_PP{OFDM, CCK}={%d, %d}\n", dbgport_803.ofdm_cca_pp, dbgport_803.cck_cca_pp);
+			} else if (atd_t->dbg_port_table[i] == 0x803) {
+				if (atd_t->dbg_port_val[i] ==
+				    curr_dbg_port_val[i]) {
+					/* dbgport_803 =  */
+					/* (struct n_dbgport_803 )   */
+					/* (atd_t->dbg_port_val[i]); */
+					odm_move_memory(dm, &dbgport_803,
+							&atd_t->dbg_port_val[i],
+							sizeof(struct n_dbgport_803));
+					pr_debug("RSTB{BB, GLB, OFDM}={%d, %d,%d}\n",
+						 dbgport_803.bb_rst_b,
+						 dbgport_803.glb_rst_b,
+						 dbgport_803.ofdm_rst_b);
+					pr_debug("{ofdm_tx_en, cck_tx_en, phy_tx_on}={%d, %d, %d}\n",
+						 dbgport_803.ofdm_tx_en,
+						 dbgport_803.cck_tx_en,
+						 dbgport_803.phy_tx_on);
+					pr_debug("CCA_PP{OFDM, CCK}={%d, %d}\n",
+						 dbgport_803.ofdm_cca_pp,
+						 dbgport_803.cck_cca_pp);
 
 					if (dbgport_803.phy_tx_on)
-						dbg_print("Maybe TX Hang\n");
-					else if (dbgport_803.ofdm_cca_pp || dbgport_803.cck_cca_pp)
-						dbg_print("Maybe RX Hang\n");	
+						pr_debug("Maybe TX Hang\n");
+					else if (dbgport_803.ofdm_cca_pp ||
+						 dbgport_803.cck_cca_pp)
+						pr_debug("Maybe RX Hang\n");
 				}
 
-			} else if (p_atd_t->dbg_port_table[i] == 0x208) {
-
-				if ((p_atd_t->dbg_port_val[i] & BIT(30)) && (curr_dbg_port_val[i] & BIT(30))) {
-					
-					dbg_print("EDCCA Pause TX\n");
-					dbg_print("ReasonCode: THN-2\n");
+			} else if (atd_t->dbg_port_table[i] == 0x208) {
+				if ((atd_t->dbg_port_val[i] & BIT(30)) &&
+				    (curr_dbg_port_val[i] & BIT(30))) {
+					pr_debug("EDCCA Pause TX\n");
+					pr_debug("ReasonCode: THN-2\n");
 				}
 
-			} else if (p_atd_t->dbg_port_table[i] == 0xab0) {
-
-				if (((p_atd_t->dbg_port_val[i] & 0xffffff) == 0) || 
-					((curr_dbg_port_val[i] & 0xffffff) == 0)) {
-					
-					dbg_print("Wrong L-SIG formate\n");
-					dbg_print("ReasonCode: THN-1\n");
+			} else if (atd_t->dbg_port_table[i] == 0xab0) {
+				/* atd_t->dbg_port_val[i] & 0xffffff == 0 */
+				/* curr_dbg_port_val[i] & 0xffffff == 0 */
+				if (((atd_t->dbg_port_val[i] &
+				      MASK24BITS) == 0) ||
+				    ((curr_dbg_port_val[i] &
+				      MASK24BITS) == 0)) {
+					pr_debug("Wrong L-SIG formate\n");
+					pr_debug("ReasonCode: THN-1\n");
 				}
 			}
 		}
-		
-		phydm_check_hang_reset(p_dm);
+
+		phydm_check_hang_reset(dm);
 	}
 
-	p_atd_t->dbg_step++;
-	
+	atd_t->dbg_step++;
 }
 
-void
-phydm_bb_auto_check_hang_start_n(
-	void			*p_dm_void,
-	u32			*_used,
-	char			*output,
-	u32			*_out_len
-)
+void phydm_bb_auto_check_hang_start_n(
+	void *dm_void,
+	u32 *_used,
+	char *output,
+	u32 *_out_len)
 {
-	u32	value32 = 0;
-	struct PHY_DM_STRUCT	*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	struct phydm_auto_dbg_struc	*p_atd_t = &(p_dm->auto_dbg_table);
+	u32 value32 = 0;
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct phydm_auto_dbg_struct *atd_t = &dm->auto_dbg_table;
 	u32 used = *_used;
 	u32 out_len = *_out_len;
 
-	if (p_dm->support_ic_type & ODM_IC_11AC_SERIES)
+	if (dm->support_ic_type & ODM_IC_11AC_SERIES)
 		return;
 
-	PHYDM_SNPRINTF((output + used, out_len - used, 
-		"PHYDM auto check hang (N-series) is started, Please check the system log\n"));
-
-	p_dm->debug_components |= ODM_COMP_API;
-	p_atd_t->auto_dbg_type = AUTO_DBG_CHECK_HANG;
-	p_atd_t->dbg_step = 0;
-	
+	PDM_SNPF(out_len, used, output + used, out_len - used,
+		 "PHYDM auto check hang (N-series) is started, Please check the system log\n");
 
-	phydm_pause_dm_watchdog(p_dm, PHYDM_PAUSE);
+	dm->debug_components |= ODM_COMP_API;
+	atd_t->auto_dbg_type = AUTO_DBG_CHECK_HANG;
+	atd_t->dbg_step = 0;
 
+	phydm_pause_dm_watchdog(dm, PHYDM_PAUSE);
 
-	
 	*_used = used;
 	*_out_len = out_len;
 }
 
-void
-phydm_bb_rx_hang_info_n(
-	void			*p_dm_void,
-	u32			*_used,
-	char			*output,
-	u32			*_out_len
-)
+void phydm_dbg_port_dump_n(void *dm_void, u32 *_used, char *output,
+			   u32 *_out_len)
 {
-	u32	value32 = 0;
-	struct PHY_DM_STRUCT		*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
+	u32 value32 = 0;
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
 	u32 used = *_used;
 	u32 out_len = *_out_len;
 
-	if (p_dm->support_ic_type & ODM_IC_11AC_SERIES)
+	if (dm->support_ic_type & ODM_IC_11AC_SERIES)
 		return;
 
-	PHYDM_SNPRINTF((output + used, out_len - used, "not support now\n"));
+	PDM_SNPF(out_len, used, output + used, out_len - used,
+		 "not support now\n");
 
 	*_used = used;
 	*_out_len = out_len;
 }
 
-#endif	
+#endif
 
 #if (ODM_IC_11AC_SERIES_SUPPORT == 1)
-void
-phydm_bb_rx_hang_info_ac(
-	void			*p_dm_void,
-	u32			*_used,
-	char			*output,
-	u32			*_out_len
-)
+void phydm_dbg_port_dump_ac(void *dm_void, u32 *_used, char *output,
+			    u32 *_out_len)
 {
-	u32	value32 = 0;
-	struct PHY_DM_STRUCT		*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
+	u32 value32 = 0;
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
 	u32 used = *_used;
 	u32 out_len = *_out_len;
 
-	if (p_dm->support_ic_type & ODM_IC_11N_SERIES)
+	if (dm->support_ic_type & ODM_IC_11N_SERIES)
 		return;
 
-	value32 = odm_get_bb_reg(p_dm, 0xF80, MASKDWORD);
-	PHYDM_SNPRINTF((output + used, out_len - used,  "\r\n %-35s = 0x%x", "rptreg of sc/bw/ht/...", value32));
+	value32 = odm_get_bb_reg(dm, R_0xf80, MASKDWORD);
+	PDM_SNPF(out_len, used, output + used, out_len - used,
+		 "\r\n %-35s = 0x%x", "rptreg of sc/bw/ht/...", value32);
 
-	if (p_dm->support_ic_type & ODM_RTL8822B)
-		odm_set_bb_reg(p_dm, 0x198c, BIT(2) | BIT(1) | BIT(0), 7);
+	if (dm->support_ic_type & ODM_RTL8822B)
+		odm_set_bb_reg(dm, R_0x198c, BIT(2) | BIT(1) | BIT(0), 7);
 
 	/* dbg_port = basic state machine */
 	{
-		odm_set_bb_reg(p_dm, ODM_REG_DBG_RPT_11AC, MASKDWORD, 0x000);
-		value32 = odm_get_bb_reg(p_dm, ODM_REG_DBG_RPT_11AC, MASKDWORD);
-		PHYDM_SNPRINTF((output + used, out_len - used, "\r\n %-35s = 0x%x", "0x8fc", value32));
-
-		value32 = odm_get_bb_reg(p_dm, ODM_REG_RPT_11AC, MASKDWORD);
-		PHYDM_SNPRINTF((output + used, out_len - used, "\r\n %-35s = 0x%x", "basic state machine", value32));
+		odm_set_bb_reg(dm, ODM_REG_DBG_RPT_11AC, MASKDWORD, 0x000);
+		value32 = odm_get_bb_reg(dm, ODM_REG_DBG_RPT_11AC, MASKDWORD);
+		PDM_SNPF(out_len, used, output + used, out_len - used,
+			 "\r\n %-35s = 0x%x", "0x8fc", value32);
+
+		value32 = odm_get_bb_reg(dm, ODM_REG_RPT_11AC, MASKDWORD);
+		PDM_SNPF(out_len, used, output + used, out_len - used,
+			 "\r\n %-35s = 0x%x", "basic state machine", value32);
 	}
 
 	/* dbg_port = state machine */
 	{
-		odm_set_bb_reg(p_dm, ODM_REG_DBG_RPT_11AC, MASKDWORD, 0x007);
-		value32 = odm_get_bb_reg(p_dm, ODM_REG_DBG_RPT_11AC, MASKDWORD);
-		PHYDM_SNPRINTF((output + used, out_len - used, "\r\n %-35s = 0x%x", "0x8fc", value32));
-
-		value32 = odm_get_bb_reg(p_dm, ODM_REG_RPT_11AC, MASKDWORD);
-		PHYDM_SNPRINTF((output + used, out_len - used, "\r\n %-35s = 0x%x", "state machine", value32));
+		odm_set_bb_reg(dm, ODM_REG_DBG_RPT_11AC, MASKDWORD, 0x007);
+		value32 = odm_get_bb_reg(dm, ODM_REG_DBG_RPT_11AC, MASKDWORD);
+		PDM_SNPF(out_len, used, output + used, out_len - used,
+			 "\r\n %-35s = 0x%x", "0x8fc", value32);
+
+		value32 = odm_get_bb_reg(dm, ODM_REG_RPT_11AC, MASKDWORD);
+		PDM_SNPF(out_len, used, output + used, out_len - used,
+			 "\r\n %-35s = 0x%x", "state machine", value32);
 	}
 
 	/* dbg_port = CCA-related*/
 	{
-		odm_set_bb_reg(p_dm, ODM_REG_DBG_RPT_11AC, MASKDWORD, 0x204);
-		value32 = odm_get_bb_reg(p_dm, ODM_REG_DBG_RPT_11AC, MASKDWORD);
-		PHYDM_SNPRINTF((output + used, out_len - used, "\r\n %-35s = 0x%x", "0x8fc", value32));
-
-		value32 = odm_get_bb_reg(p_dm, ODM_REG_RPT_11AC, MASKDWORD);
-		PHYDM_SNPRINTF((output + used, out_len - used, "\r\n %-35s = 0x%x", "CCA-related", value32));
+		odm_set_bb_reg(dm, ODM_REG_DBG_RPT_11AC, MASKDWORD, 0x204);
+		value32 = odm_get_bb_reg(dm, ODM_REG_DBG_RPT_11AC, MASKDWORD);
+		PDM_SNPF(out_len, used, output + used, out_len - used,
+			 "\r\n %-35s = 0x%x", "0x8fc", value32);
+
+		value32 = odm_get_bb_reg(dm, ODM_REG_RPT_11AC, MASKDWORD);
+		PDM_SNPF(out_len, used, output + used, out_len - used,
+			 "\r\n %-35s = 0x%x", "CCA-related", value32);
 	}
 
-
 	/* dbg_port = edcca/rxd*/
 	{
-		odm_set_bb_reg(p_dm, ODM_REG_DBG_RPT_11AC, MASKDWORD, 0x278);
-		value32 = odm_get_bb_reg(p_dm, ODM_REG_DBG_RPT_11AC, MASKDWORD);
-		PHYDM_SNPRINTF((output + used, out_len - used, "\r\n %-35s = 0x%x", "0x8fc", value32));
-
-		value32 = odm_get_bb_reg(p_dm, ODM_REG_RPT_11AC, MASKDWORD);
-		PHYDM_SNPRINTF((output + used, out_len - used, "\r\n %-35s = 0x%x", "edcca/rxd", value32));
+		odm_set_bb_reg(dm, ODM_REG_DBG_RPT_11AC, MASKDWORD, 0x278);
+		value32 = odm_get_bb_reg(dm, ODM_REG_DBG_RPT_11AC, MASKDWORD);
+		PDM_SNPF(out_len, used, output + used, out_len - used,
+			 "\r\n %-35s = 0x%x", "0x8fc", value32);
+
+		value32 = odm_get_bb_reg(dm, ODM_REG_RPT_11AC, MASKDWORD);
+		PDM_SNPF(out_len, used, output + used, out_len - used,
+			 "\r\n %-35s = 0x%x", "edcca/rxd", value32);
 	}
 
 	/* dbg_port = rx_state/mux_state/ADC_MASK_OFDM*/
 	{
-		odm_set_bb_reg(p_dm, ODM_REG_DBG_RPT_11AC, MASKDWORD, 0x290);
-		value32 = odm_get_bb_reg(p_dm, ODM_REG_DBG_RPT_11AC, MASKDWORD);
-		PHYDM_SNPRINTF((output + used, out_len - used, "\r\n %-35s = 0x%x", "0x8fc", value32));
-
-		value32 = odm_get_bb_reg(p_dm, ODM_REG_RPT_11AC, MASKDWORD);
-		PHYDM_SNPRINTF((output + used, out_len - used, "\r\n %-35s = 0x%x", "rx_state/mux_state/ADC_MASK_OFDM", value32));
+		odm_set_bb_reg(dm, ODM_REG_DBG_RPT_11AC, MASKDWORD, 0x290);
+		value32 = odm_get_bb_reg(dm, ODM_REG_DBG_RPT_11AC, MASKDWORD);
+		PDM_SNPF(out_len, used, output + used, out_len - used,
+			 "\r\n %-35s = 0x%x", "0x8fc", value32);
+
+		value32 = odm_get_bb_reg(dm, ODM_REG_RPT_11AC, MASKDWORD);
+		PDM_SNPF(out_len, used, output + used, out_len - used,
+			 "\r\n %-35s = 0x%x",
+			 "rx_state/mux_state/ADC_MASK_OFDM", value32);
 	}
 
 	/* dbg_port = bf-related*/
 	{
-		odm_set_bb_reg(p_dm, ODM_REG_DBG_RPT_11AC, MASKDWORD, 0x2B2);
-		value32 = odm_get_bb_reg(p_dm, ODM_REG_DBG_RPT_11AC, MASKDWORD);
-		PHYDM_SNPRINTF((output + used, out_len - used, "\r\n %-35s = 0x%x", "0x8fc", value32));
-
-		value32 = odm_get_bb_reg(p_dm, ODM_REG_RPT_11AC, MASKDWORD);
-		PHYDM_SNPRINTF((output + used, out_len - used, "\r\n %-35s = 0x%x", "bf-related", value32));
+		odm_set_bb_reg(dm, ODM_REG_DBG_RPT_11AC, MASKDWORD, 0x2B2);
+		value32 = odm_get_bb_reg(dm, ODM_REG_DBG_RPT_11AC, MASKDWORD);
+		PDM_SNPF(out_len, used, output + used, out_len - used,
+			 "\r\n %-35s = 0x%x", "0x8fc", value32);
+
+		value32 = odm_get_bb_reg(dm, ODM_REG_RPT_11AC, MASKDWORD);
+		PDM_SNPF(out_len, used, output + used, out_len - used,
+			 "\r\n %-35s = 0x%x", "bf-related", value32);
 	}
 
 	/* dbg_port = bf-related*/
 	{
-		odm_set_bb_reg(p_dm, ODM_REG_DBG_RPT_11AC, MASKDWORD, 0x2B8);
-		value32 = odm_get_bb_reg(p_dm, ODM_REG_DBG_RPT_11AC, MASKDWORD);
-		PHYDM_SNPRINTF((output + used, out_len - used, "\r\n %-35s = 0x%x", "0x8fc", value32));
-
-		value32 = odm_get_bb_reg(p_dm, ODM_REG_RPT_11AC, MASKDWORD);
-		PHYDM_SNPRINTF((output + used, out_len - used, "\r\n %-35s = 0x%x", "bf-related", value32));
+		odm_set_bb_reg(dm, ODM_REG_DBG_RPT_11AC, MASKDWORD, 0x2B8);
+		value32 = odm_get_bb_reg(dm, ODM_REG_DBG_RPT_11AC, MASKDWORD);
+		PDM_SNPF(out_len, used, output + used, out_len - used,
+			 "\r\n %-35s = 0x%x", "0x8fc", value32);
+
+		value32 = odm_get_bb_reg(dm, ODM_REG_RPT_11AC, MASKDWORD);
+		PDM_SNPF(out_len, used, output + used, out_len - used,
+			 "\r\n %-35s = 0x%x", "bf-related", value32);
 	}
 
 	/* dbg_port = txon/rxd*/
 	{
-		odm_set_bb_reg(p_dm, ODM_REG_DBG_RPT_11AC, MASKDWORD, 0xA03);
-		value32 = odm_get_bb_reg(p_dm, ODM_REG_DBG_RPT_11AC, MASKDWORD);
-		PHYDM_SNPRINTF((output + used, out_len - used, "\r\n %-35s = 0x%x", "0x8fc", value32));
-
-		value32 = odm_get_bb_reg(p_dm, ODM_REG_RPT_11AC, MASKDWORD);
-		PHYDM_SNPRINTF((output + used, out_len - used, "\r\n %-35s = 0x%x", "txon/rxd", value32));
+		odm_set_bb_reg(dm, ODM_REG_DBG_RPT_11AC, MASKDWORD, 0xA03);
+		value32 = odm_get_bb_reg(dm, ODM_REG_DBG_RPT_11AC, MASKDWORD);
+		PDM_SNPF(out_len, used, output + used, out_len - used,
+			 "\r\n %-35s = 0x%x", "0x8fc", value32);
+
+		value32 = odm_get_bb_reg(dm, ODM_REG_RPT_11AC, MASKDWORD);
+		PDM_SNPF(out_len, used, output + used, out_len - used,
+			 "\r\n %-35s = 0x%x", "txon/rxd", value32);
 	}
 
 	/* dbg_port = l_rate/l_length*/
 	{
-		odm_set_bb_reg(p_dm, ODM_REG_DBG_RPT_11AC, MASKDWORD, 0xA0B);
-		value32 = odm_get_bb_reg(p_dm, ODM_REG_DBG_RPT_11AC, MASKDWORD);
-		PHYDM_SNPRINTF((output + used, out_len - used, "\r\n %-35s = 0x%x", "0x8fc", value32));
-
-		value32 = odm_get_bb_reg(p_dm, ODM_REG_RPT_11AC, MASKDWORD);
-		PHYDM_SNPRINTF((output + used, out_len - used, "\r\n %-35s = 0x%x", "l_rate/l_length", value32));
+		odm_set_bb_reg(dm, ODM_REG_DBG_RPT_11AC, MASKDWORD, 0xA0B);
+		value32 = odm_get_bb_reg(dm, ODM_REG_DBG_RPT_11AC, MASKDWORD);
+		PDM_SNPF(out_len, used, output + used, out_len - used,
+			 "\r\n %-35s = 0x%x", "0x8fc", value32);
+
+		value32 = odm_get_bb_reg(dm, ODM_REG_RPT_11AC, MASKDWORD);
+		PDM_SNPF(out_len, used, output + used, out_len - used,
+			 "\r\n %-35s = 0x%x", "l_rate/l_length", value32);
 	}
 
 	/* dbg_port = rxd/rxd_hit*/
 	{
-		odm_set_bb_reg(p_dm, ODM_REG_DBG_RPT_11AC, MASKDWORD, 0xA0D);
-		value32 = odm_get_bb_reg(p_dm, ODM_REG_DBG_RPT_11AC, MASKDWORD);
-		PHYDM_SNPRINTF((output + used, out_len - used, "\r\n %-35s = 0x%x", "0x8fc", value32));
-
-		value32 = odm_get_bb_reg(p_dm, ODM_REG_RPT_11AC, MASKDWORD);
-		PHYDM_SNPRINTF((output + used, out_len - used, "\r\n %-35s = 0x%x", "rxd/rxd_hit", value32));
+		odm_set_bb_reg(dm, ODM_REG_DBG_RPT_11AC, MASKDWORD, 0xA0D);
+		value32 = odm_get_bb_reg(dm, ODM_REG_DBG_RPT_11AC, MASKDWORD);
+		PDM_SNPF(out_len, used, output + used, out_len - used,
+			 "\r\n %-35s = 0x%x", "0x8fc", value32);
+
+		value32 = odm_get_bb_reg(dm, ODM_REG_RPT_11AC, MASKDWORD);
+		PDM_SNPF(out_len, used, output + used, out_len - used,
+			 "\r\n %-35s = 0x%x", "rxd/rxd_hit", value32);
 	}
 
 	/* dbg_port = dis_cca*/
 	{
-		odm_set_bb_reg(p_dm, ODM_REG_DBG_RPT_11AC, MASKDWORD, 0xAA0);
-		value32 = odm_get_bb_reg(p_dm, ODM_REG_DBG_RPT_11AC, MASKDWORD);
-		PHYDM_SNPRINTF((output + used, out_len - used, "\r\n %-35s = 0x%x", "0x8fc", value32));
-
-		value32 = odm_get_bb_reg(p_dm, ODM_REG_RPT_11AC, MASKDWORD);
-		PHYDM_SNPRINTF((output + used, out_len - used, "\r\n %-35s = 0x%x", "dis_cca", value32));
+		odm_set_bb_reg(dm, ODM_REG_DBG_RPT_11AC, MASKDWORD, 0xAA0);
+		value32 = odm_get_bb_reg(dm, ODM_REG_DBG_RPT_11AC, MASKDWORD);
+		PDM_SNPF(out_len, used, output + used, out_len - used,
+			 "\r\n %-35s = 0x%x", "0x8fc", value32);
+
+		value32 = odm_get_bb_reg(dm, ODM_REG_RPT_11AC, MASKDWORD);
+		PDM_SNPF(out_len, used, output + used, out_len - used,
+			 "\r\n %-35s = 0x%x", "dis_cca", value32);
 	}
 
-
 	/* dbg_port = tx*/
 	{
-		odm_set_bb_reg(p_dm, ODM_REG_DBG_RPT_11AC, MASKDWORD, 0xAB0);
-		value32 = odm_get_bb_reg(p_dm, ODM_REG_DBG_RPT_11AC, MASKDWORD);
-		PHYDM_SNPRINTF((output + used, out_len - used, "\r\n %-35s = 0x%x", "0x8fc", value32));
-
-		value32 = odm_get_bb_reg(p_dm, ODM_REG_RPT_11AC, MASKDWORD);
-		PHYDM_SNPRINTF((output + used, out_len - used, "\r\n %-35s = 0x%x", "tx", value32));
+		odm_set_bb_reg(dm, ODM_REG_DBG_RPT_11AC, MASKDWORD, 0xAB0);
+		value32 = odm_get_bb_reg(dm, ODM_REG_DBG_RPT_11AC, MASKDWORD);
+		PDM_SNPF(out_len, used, output + used, out_len - used,
+			 "\r\n %-35s = 0x%x", "0x8fc", value32);
+
+		value32 = odm_get_bb_reg(dm, ODM_REG_RPT_11AC, MASKDWORD);
+		PDM_SNPF(out_len, used, output + used, out_len - used,
+			 "\r\n %-35s = 0x%x", "tx", value32);
 	}
 
 	/* dbg_port = rx plcp*/
 	{
-		odm_set_bb_reg(p_dm, ODM_REG_DBG_RPT_11AC, MASKDWORD, 0xAD0);
-		value32 = odm_get_bb_reg(p_dm, ODM_REG_DBG_RPT_11AC, MASKDWORD);
-		PHYDM_SNPRINTF((output + used, out_len - used, "\r\n %-35s = 0x%x", "0x8fc", value32));
-
-		value32 = odm_get_bb_reg(p_dm, ODM_REG_RPT_11AC, MASKDWORD);
-		PHYDM_SNPRINTF((output + used, out_len - used, "\r\n %-35s = 0x%x", "rx plcp", value32));
-
-		odm_set_bb_reg(p_dm, ODM_REG_DBG_RPT_11AC, MASKDWORD, 0xAD1);
-		value32 = odm_get_bb_reg(p_dm, ODM_REG_DBG_RPT_11AC, MASKDWORD);
-		PHYDM_SNPRINTF((output + used, out_len - used, "\r\n %-35s = 0x%x", "0x8fc", value32));
-
-		value32 = odm_get_bb_reg(p_dm, ODM_REG_RPT_11AC, MASKDWORD);
-		PHYDM_SNPRINTF((output + used, out_len - used, "\r\n %-35s = 0x%x", "rx plcp", value32));
+		odm_set_bb_reg(dm, ODM_REG_DBG_RPT_11AC, MASKDWORD, 0xAD0);
+		value32 = odm_get_bb_reg(dm, ODM_REG_DBG_RPT_11AC, MASKDWORD);
+		PDM_SNPF(out_len, used, output + used, out_len - used,
+			 "\r\n %-35s = 0x%x", "0x8fc", value32);
+
+		value32 = odm_get_bb_reg(dm, ODM_REG_RPT_11AC, MASKDWORD);
+		PDM_SNPF(out_len, used, output + used, out_len - used,
+			 "\r\n %-35s = 0x%x", "rx plcp", value32);
+
+		odm_set_bb_reg(dm, ODM_REG_DBG_RPT_11AC, MASKDWORD, 0xAD1);
+		value32 = odm_get_bb_reg(dm, ODM_REG_DBG_RPT_11AC, MASKDWORD);
+		PDM_SNPF(out_len, used, output + used, out_len - used,
+			 "\r\n %-35s = 0x%x", "0x8fc", value32);
+
+		value32 = odm_get_bb_reg(dm, ODM_REG_RPT_11AC, MASKDWORD);
+		PDM_SNPF(out_len, used, output + used, out_len - used,
+			 "\r\n %-35s = 0x%x", "rx plcp", value32);
+
+		odm_set_bb_reg(dm, ODM_REG_DBG_RPT_11AC, MASKDWORD, 0xAD2);
+		value32 = odm_get_bb_reg(dm, ODM_REG_DBG_RPT_11AC, MASKDWORD);
+		PDM_SNPF(out_len, used, output + used, out_len - used,
+			 "\r\n %-35s = 0x%x", "0x8fc", value32);
+
+		value32 = odm_get_bb_reg(dm, ODM_REG_RPT_11AC, MASKDWORD);
+		PDM_SNPF(out_len, used, output + used, out_len - used,
+			 "\r\n %-35s = 0x%x", "rx plcp", value32);
+
+		odm_set_bb_reg(dm, ODM_REG_DBG_RPT_11AC, MASKDWORD, 0xAD3);
+		value32 = odm_get_bb_reg(dm, ODM_REG_DBG_RPT_11AC, MASKDWORD);
+		PDM_SNPF(out_len, used, output + used, out_len - used,
+			 "\r\n %-35s = 0x%x", "0x8fc", value32);
+
+		value32 = odm_get_bb_reg(dm, ODM_REG_RPT_11AC, MASKDWORD);
+		PDM_SNPF(out_len, used, output + used, out_len - used,
+			 "\r\n %-35s = 0x%x", "rx plcp", value32);
+	}
+	*_used = used;
+	*_out_len = out_len;
+}
+#endif
 
-		odm_set_bb_reg(p_dm, ODM_REG_DBG_RPT_11AC, MASKDWORD, 0xAD2);
-		value32 = odm_get_bb_reg(p_dm, ODM_REG_DBG_RPT_11AC, MASKDWORD);
-		PHYDM_SNPRINTF((output + used, out_len - used, "\r\n %-35s = 0x%x", "0x8fc", value32));
+#ifdef PHYDM_IC_JGR3_SERIES_SUPPORT
+void phydm_dbg_port_dump_jgr3(void *dm_void, u32 *_used, char *output,
+			      u32 *_out_len)
+{
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	u32 used = *_used;
+	u32 out_len = *_out_len;
+	u32 dbg_port_idx_all[3] = {0x000, 0x001, 0x002};
+	u32 val = 0;
+	u32 dbg_port_idx = 0;
+	u32 i = 0;
 
-		value32 = odm_get_bb_reg(p_dm, ODM_REG_RPT_11AC, MASKDWORD);
-		PHYDM_SNPRINTF((output + used, out_len - used, "\r\n %-35s = 0x%x", "rx plcp", value32));
+	if (!(dm->support_ic_type & ODM_IC_JGR3_SERIES))
+		return;
 
-		odm_set_bb_reg(p_dm, ODM_REG_DBG_RPT_11AC, MASKDWORD, 0xAD3);
-		value32 = odm_get_bb_reg(p_dm, ODM_REG_DBG_RPT_11AC, MASKDWORD);
-		PHYDM_SNPRINTF((output + used, out_len - used, "\r\n %-35s = 0x%x", "0x8fc", value32));
+	PDM_SNPF(out_len, used, output + used, out_len - used,
+		 "%-16s = %s\n", "DbgPort index", "Value");
+
+	/*0x000/0x001/0x002*/
+	for (i = 0; i < 3; i++) {
+		dbg_port_idx = dbg_port_idx_all[i];
+		if (phydm_set_bb_dbg_port(dm, DBGPORT_PRI_3, dbg_port_idx)) {
+			val = phydm_get_bb_dbg_port_val(dm);
+			PDM_SNPF(out_len, used, output + used, out_len - used,
+				 "0x%-15x = 0x%x\n", dbg_port_idx, val);
+			phydm_release_bb_dbg_port(dm);
+		}
+	}
 
-		value32 = odm_get_bb_reg(p_dm, ODM_REG_RPT_11AC, MASKDWORD);
-		PHYDM_SNPRINTF((output + used, out_len - used, "\r\n %-35s = 0x%x", "rx plcp", value32));
+	/*0x3a0/0x3a1/.../0x3ab/0x3ac*/
+	for (dbg_port_idx = 0x3a0; dbg_port_idx <= 0x3ac; dbg_port_idx++) {
+		if (phydm_set_bb_dbg_port(dm, DBGPORT_PRI_3, dbg_port_idx)) {
+			val = phydm_get_bb_dbg_port_val(dm);
+			PDM_SNPF(out_len, used, output + used, out_len - used,
+				 "0x%-15x = 0x%x\n", dbg_port_idx, val);
+			phydm_release_bb_dbg_port(dm);
+		}
 	}
 	*_used = used;
 	*_out_len = out_len;
 }
 #endif
-
-void
-phydm_auto_dbg_console(
-	void		*p_dm_void,
-	char		input[][16],
-	u32		*_used,
-	char		*output,
-	u32		*_out_len,
-	u32		input_num
-)
+void phydm_auto_dbg_console(
+	void *dm_void,
+	char input[][16],
+	u32 *_used,
+	char *output,
+	u32 *_out_len)
 {
-	struct PHY_DM_STRUCT	*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	char		help[] = "-h";
-	u32		var1[10] = {0};
-	u32		used = *_used;
-	u32		out_len = *_out_len;
-
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	char help[] = "-h";
+	u32 var1[10] = {0};
+	u32 used = *_used;
+	u32 out_len = *_out_len;
 
 	PHYDM_SSCANF(input[1], DCMD_DECIMAL, &var1[0]);
 
 	if ((strcmp(input[1], help) == 0)) {
-		PHYDM_SNPRINTF((output + used, out_len - used, "Show dbg port: {1} {1}\n"));
-		PHYDM_SNPRINTF((output + used, out_len - used, "Auto check hang: {1} {2}\n"));
+		PDM_SNPF(out_len, used, output + used, out_len - used,
+			 "hang: {1} {1:Show DbgPort, 2:Auto check hang}\n");
 		return;
 	} else if (var1[0] == 1) {
-
 		PHYDM_SSCANF(input[2], DCMD_DECIMAL, &var1[1]);
-
 		if (var1[1] == 1) {
-			if (p_dm->support_ic_type & ODM_IC_11AC_SERIES) {
-				#if (ODM_IC_11AC_SERIES_SUPPORT == 1)
-				phydm_bb_rx_hang_info_ac(p_dm, &used, output, &out_len);
-				#else
-				PHYDM_SNPRINTF((output + used, out_len - used, "Not support\n"));
-				#endif
-			} else {
-				#if (ODM_IC_11N_SERIES_SUPPORT == 1)
-				phydm_bb_rx_hang_info_n(p_dm, &used, output, &out_len);
-				#else
-				PHYDM_SNPRINTF((output + used, out_len - used, "Not support\n"));
-				#endif
+			switch (dm->ic_ip_series) {
+			#ifdef PHYDM_IC_JGR3_SERIES_SUPPORT
+			case PHYDM_IC_JGR3:
+				phydm_dbg_port_dump_jgr3(dm, &used, output,
+							 &out_len);
+				break;
+			#endif
+
+			#if (ODM_IC_11AC_SERIES_SUPPORT == 1)
+			case PHYDM_IC_AC:
+				phydm_dbg_port_dump_ac(dm, &used, output,
+						       &out_len);
+				break;
+			#endif
+
+			#if (ODM_IC_11N_SERIES_SUPPORT == 1)
+			case PHYDM_IC_N:
+				phydm_dbg_port_dump_n(dm, &used, output,
+						      &out_len);
+				break;
+			#endif
+
+			default:
+				break;
+
 			}
 		} else if (var1[1] == 2) {
-		
-			if (p_dm->support_ic_type & ODM_IC_11AC_SERIES) {
-				PHYDM_SNPRINTF((output + used, out_len - used, "Not support\n"));
+			if (dm->support_ic_type & ODM_IC_11AC_SERIES) {
+				PDM_SNPF(out_len, used, output + used,
+					 out_len - used, "Not support\n");
 			} else {
 				#if (ODM_IC_11N_SERIES_SUPPORT == 1)
-				phydm_bb_auto_check_hang_start_n(p_dm, &used, output, &out_len);
+				phydm_bb_auto_check_hang_start_n(dm, &used,
+								 output,
+								 &out_len);
 				#else
-				PHYDM_SNPRINTF((output + used, out_len - used, "Not support\n"));
+				PDM_SNPF(out_len, used, output + used,
+					 out_len - used, "Not support\n");
 				#endif
 			}
 		}
-	} 
+	}
 
 	*_used = used;
 	*_out_len = out_len;
 }
 
-
-#endif
-
-void
-phydm_auto_dbg_engine(
-	void			*p_dm_void
-)
+void phydm_auto_dbg_engine(void *dm_void)
 {
-#ifdef PHYDM_AUTO_DEGBUG
-	u32	value32 = 0;
-	struct PHY_DM_STRUCT	*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	struct phydm_auto_dbg_struc	*p_atd_t = &(p_dm->auto_dbg_table);
+	u32 value32 = 0;
 
-	if (p_atd_t->auto_dbg_type == AUTO_DBG_STOP)
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct phydm_auto_dbg_struct *atd_t = &dm->auto_dbg_table;
+
+	if (atd_t->auto_dbg_type == AUTO_DBG_STOP)
 		return;
 
-	dbg_print("%s ======>\n", __func__);
-	
-	if (p_atd_t->auto_dbg_type == AUTO_DBG_CHECK_HANG) {
+	pr_debug("%s ======>\n", __func__);
 
-		if (p_dm->support_ic_type & ODM_IC_11AC_SERIES) {
-			dbg_print("Not Support\n");
+	if (atd_t->auto_dbg_type == AUTO_DBG_CHECK_HANG) {
+		if (dm->support_ic_type & ODM_IC_11AC_SERIES) {
+			pr_debug("Not Support\n");
 		} else {
 			#if (ODM_IC_11N_SERIES_SUPPORT == 1)
-			phydm_auto_check_hang_engine_n(p_dm);
+			phydm_auto_check_hang_engine_n(dm);
 			#else
-			dbg_print("Not Support\n");
+			pr_debug("Not Support\n");
 			#endif
 		}
 
-	} else if (p_atd_t->auto_dbg_type == AUTO_DBG_CHECK_RA) {
-	
-		dbg_print("Not Support\n");
-
+	} else if (atd_t->auto_dbg_type == AUTO_DBG_CHECK_RA) {
+		pr_debug("Not Support\n");
 	}
-#endif
 }
 
-void
-phydm_auto_dbg_engine_init(
-	void		*p_dm_void
-)
+void phydm_auto_dbg_engine_init(void *dm_void)
 {
-#ifdef PHYDM_AUTO_DEGBUG
-	struct PHY_DM_STRUCT	*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	struct phydm_auto_dbg_struc	*p_atd_t = &(p_dm->auto_dbg_table);
-	u16 dbg_port_table[DBGPORT_CHK_NUM] = {0x0, 0x803, 0x208, 0xab0, 0xab1, 0xab2};
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct phydm_auto_dbg_struct *atd_t = &dm->auto_dbg_table;
+	u16 dbg_port_table[DBGPORT_CHK_NUM] = {0x0, 0x803, 0x208, 0xab0,
+					       0xab1, 0xab2};
 
-	PHYDM_DBG(p_dm, ODM_COMP_API, ("%s ======>n", __func__));
+	PHYDM_DBG(dm, ODM_COMP_API, "%s ======>n", __func__);
 
-	odm_move_memory(p_dm, &(p_atd_t->dbg_port_table[0]),  &(dbg_port_table[0]), (DBGPORT_CHK_NUM * 2));
+	odm_move_memory(dm, &atd_t->dbg_port_table[0],
+			&dbg_port_table[0], (DBGPORT_CHK_NUM * 2));
 
-	phydm_check_hang_reset(p_dm);
-#endif
+	phydm_check_hang_init(dm);
 }
-
-
+#endif
diff --git a/rtl8723DS/hal/phydm/phydm_auto_dbg.h b/rtl8723DS/hal/phydm/phydm_auto_dbg.h
index 784c5d1..f6ef51d 100755..100644
--- a/rtl8723DS/hal/phydm/phydm_auto_dbg.h
+++ b/rtl8723DS/hal/phydm/phydm_auto_dbg.h
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2007 - 2017 Realtek Corporation.
+ * Copyright(c) 2007 - 2017  Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -8,108 +8,106 @@
  *
  * This program is distributed in the hope that it will be useful, but WITHOUT
  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  * more details.
  *
+ * The full GNU General Public License is included in this distribution in the
+ * file called LICENSE.
+ *
+ * Contact Information:
+ * wlanfae <wlanfae@realtek.com>
+ * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
+ * Hsinchu 300, Taiwan.
+ *
+ * Larry Finger <Larry.Finger@lwfinger.net>
+ *
  *****************************************************************************/
 
+#ifndef __PHYDM_AUTO_DBG_H__
+#define __PHYDM_AUTO_DBG_H__
 
-#ifndef	__PHYDM_AUTO_DBG_H__
-#define    __PHYDM_AUTO_DBG_H__
-
-#define AUTO_DBG_VERSION	"1.0"		/* 2017.05.015  Dino, Add phydm_auto_dbg.h*/
+#define AUTO_DBG_VERSION "1.0" /* @2017.05.015  Dino, Add phydm_auto_dbg.h*/
 
-
-/* 1 ============================================================
+/* @1 ============================================================
  * 1  Definition
- * 1 ============================================================ */
+ * 1 ============================================================
+ */
 
-#define	AUTO_CHK_HANG_STEP_MAX	3
-#define	DBGPORT_CHK_NUM			6
+#define AUTO_CHK_HANG_STEP_MAX 3
+#define DBGPORT_CHK_NUM 6
 
 #ifdef PHYDM_AUTO_DEGBUG
 
-
-/* 1 ============================================================
+/* @1 ============================================================
  * 1  enumeration
- * 1 ============================================================ */
+ * 1 ============================================================
+ */
 
-enum auto_dbg_type_e{
-	AUTO_DBG_STOP 		= 0,
-	AUTO_DBG_CHECK_HANG 	= 1,
+enum auto_dbg_type_e {
+	AUTO_DBG_STOP		= 0,
+	AUTO_DBG_CHECK_HANG	= 1,
 	AUTO_DBG_CHECK_RA	= 2,
-	AUTO_DBG_CHECK_DIG	= 3	
+	AUTO_DBG_CHECK_DIG	= 3
 };
 
-/* 1 ============================================================
+/* @1 ============================================================
  * 1  structure
- * 1 ============================================================ */
+ * 1 ============================================================
+ */
 
 struct n_dbgport_803 {
-	/*BYTE 3*/
-	u8 bb_rst_b: 1;
-	u8 glb_rst_b: 1;
-	u8 zero_1bit_1:1;
-	u8 ofdm_rst_b: 1;
-	u8 cck_txpe: 1;
-	u8 ofdm_txpe: 1;
-	u8 phy_tx_on: 1;
-	u8 tdrdy: 1;
-	/*BYTE 2*/
-	u8 txd:8;
-	/*BYTE 1*/
-	u8 cck_cca_pp: 1; 
-	u8 ofdm_cca_pp: 1;
-	u8 rx_rst: 1;
-	u8 rdrdy: 1;
-	u8 rxd_7_4: 4;
-	/*BYTE 0*/
-	u8 rxd_3_0: 4;
-	u8 ofdm_tx_en: 1; 
-	u8 cck_tx_en: 1;
-	u8 zero_1bit_2:1;
-	u8 clk_80m: 1;
+	/*@BYTE 3*/
+	u8 bb_rst_b : 1;
+	u8 glb_rst_b : 1;
+	u8 zero_1bit_1 : 1;
+	u8 ofdm_rst_b : 1;
+	u8 cck_txpe : 1;
+	u8 ofdm_txpe : 1;
+	u8 phy_tx_on : 1;
+	u8 tdrdy : 1;
+	/*@BYTE 2*/
+	u8 txd : 8;
+	/*@BYTE 1*/
+	u8 cck_cca_pp : 1;
+	u8 ofdm_cca_pp : 1;
+	u8 rx_rst : 1;
+	u8 rdrdy : 1;
+	u8 rxd_7_4 : 4;
+	/*@BYTE 0*/
+	u8 rxd_3_0 : 4;
+	u8 ofdm_tx_en : 1;
+	u8 cck_tx_en : 1;
+	u8 zero_1bit_2 : 1;
+	u8 clk_80m : 1;
 };
 
-struct phydm_auto_dbg_struc {
-
-	enum	auto_dbg_type_e	auto_dbg_type;
-	u8		dbg_step;
-	u16		dbg_port_table[DBGPORT_CHK_NUM];
-	u32		dbg_port_val[DBGPORT_CHK_NUM];
-	u16		ofdm_t_cnt;
-	u16		ofdm_r_cnt;
-	u16		cck_t_cnt;
-	u16		cck_r_cnt;
-	u16		ofdm_crc_error_cnt;
-	u16		cck_crc_error_cnt;
-
+struct phydm_auto_dbg_struct {
+	enum auto_dbg_type_e auto_dbg_type;
+	u8 dbg_step;
+	u16 dbg_port_table[DBGPORT_CHK_NUM];
+	u32 dbg_port_val[DBGPORT_CHK_NUM];
+	u16 ofdm_t_cnt;
+	u16 ofdm_r_cnt;
+	u16 cck_t_cnt;
+	u16 cck_r_cnt;
+	u16 ofdm_crc_error_cnt;
+	u16 cck_crc_error_cnt;
 };
 
-
-/* 1 ============================================================
+/* @1 ============================================================
  * 1  function prototype
- * 1 ============================================================ */
-
+ * 1 ============================================================
+ */
 
-void
-phydm_auto_dbg_console(
-	void		*p_dm_void,
-	char		input[][16],
-	u32		*_used,
-	char		*output,
-	u32		*_out_len,
-	u32		input_num
-);
-#endif
+void phydm_auto_dbg_console(
+	void *dm_void,
+	char input[][16],
+	u32 *_used,
+	char *output,
+	u32 *_out_len);
 
-void
-phydm_auto_dbg_engine(
-	void			*p_dm_void
-);
+void phydm_auto_dbg_engine(void *dm_void);
 
-void
-phydm_auto_dbg_engine_init(
-	void		*p_dm_void
-);
-#endif
\ No newline at end of file
+void phydm_auto_dbg_engine_init(void *dm_void);
+#endif
+#endif
diff --git a/rtl8723DS/hal/phydm/phydm_beamforming.c b/rtl8723DS/hal/phydm/phydm_beamforming.c
index c2a9af5..bc4855c 100755..100644
--- a/rtl8723DS/hal/phydm/phydm_beamforming.c
+++ b/rtl8723DS/hal/phydm/phydm_beamforming.c
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2007 - 2017 Realtek Corporation.
+ * Copyright(c) 2007 - 2017  Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -8,9 +8,19 @@
  *
  * This program is distributed in the hope that it will be useful, but WITHOUT
  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  * more details.
  *
+ * The full GNU General Public License is included in this distribution in the
+ * file called LICENSE.
+ *
+ * Contact Information:
+ * wlanfae <wlanfae@realtek.com>
+ * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
+ * Hsinchu 300, Taiwan.
+ *
+ * Larry Finger <Larry.Finger@lwfinger.net>
+ *
  *****************************************************************************/
 
 #include "mp_precomp.h"
@@ -22,119 +32,160 @@
 	#endif
 #endif
 
-#if (BEAMFORMING_SUPPORT == 1)
+#ifdef PHYDM_BEAMFORMING_SUPPORT
 
-struct _RT_BEAMFORM_STAINFO *
-phydm_sta_info_init(
-	struct PHY_DM_STRUCT		*p_dm,
-	u16			sta_idx
-)
+void phydm_get_txbf_device_num(
+	void *dm_void,
+	u8 macid)
 {
-	struct _RT_BEAMFORMING_INFO		*p_beam_info = &p_dm->beamforming_info;
-	struct _RT_BEAMFORM_STAINFO		*p_entry = &(p_beam_info->beamform_sta_info);
-	struct sta_info					*p_sta = p_dm->p_odm_sta_info[sta_idx];
-	struct cmn_sta_info				*p_cmn_sta = p_dm->p_phydm_sta_info[sta_idx];
-	struct _ADAPTER					*adapter = p_dm->adapter;
-#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
-	PMGNT_INFO					p_MgntInfo = &adapter->MgntInfo;
-	PRT_HIGH_THROUGHPUT		p_ht_info = GET_HT_INFO(p_MgntInfo);
-	PRT_VERY_HIGH_THROUGHPUT	p_vht_info = GET_VHT_INFO(p_MgntInfo);
-	u1Byte						iotpeer = 0;
-
-	iotpeer = p_MgntInfo->IOTPeer;
-	odm_move_memory(p_dm, p_entry->my_mac_addr, adapter->CurrentAddress, 6);
-
-	p_entry->ht_beamform_cap = p_ht_info->HtBeamformCap;
-	p_entry->vht_beamform_cap = p_vht_info->VhtBeamformCap;
-	
-	/*IBSS, AP mode*/
-	if (sta_idx != 0) {
-		p_entry->aid = p_cmn_sta->aid;
-		p_entry->ra = p_cmn_sta->mac_addr;
-		p_entry->mac_id = p_cmn_sta->mac_id;
-		p_entry->wireless_mode = p_sta->WirelessMode;
-		p_entry->bw = p_cmn_sta->bw_mode;
-		p_entry->cur_beamform = p_cmn_sta->bf_info.ht_beamform_cap;
-	} else {/*client mode*/
-		p_entry->aid = p_MgntInfo->mAId;
-		p_entry->ra = p_MgntInfo->Bssid;
-		p_entry->mac_id = p_MgntInfo->mMacId;
-		p_entry->wireless_mode = p_MgntInfo->dot11CurrentWirelessMode;
-		p_entry->bw = p_MgntInfo->dot11CurrentChannelBandWidth;
-		p_entry->cur_beamform = p_ht_info->HtCurBeamform;
+#if (defined(CONFIG_PHYDM_ANTENNA_DIVERSITY)) /*@For BDC*/
+#if (DM_ODM_SUPPORT_TYPE == ODM_AP)
+
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct cmn_sta_info *sta = dm->phydm_sta_info[macid];
+	struct bf_cmn_info *bf = NULL;
+	struct _BF_DIV_COEX_ *dm_bdc_table = &dm->dm_bdc_table;
+	u8 act_as_bfer = 0;
+	u8 act_as_bfee = 0;
+
+	if (is_sta_active(sta)) {
+		bf = &(sta->bf_info);
+	} else {
+		PHYDM_DBG(dm, DBG_TXBF, "[Warning] %s invalid sta_info\n",
+			  __func__);
+		return;
 	}
 
-	if ((p_entry->wireless_mode & WIRELESS_MODE_AC_5G) || (p_entry->wireless_mode & WIRELESS_MODE_AC_24G)) {
-		if (sta_idx != 0)
-			p_entry->cur_beamform_vht = p_cmn_sta->bf_info.vht_beamform_cap;
-		else
-			p_entry->cur_beamform_vht = p_vht_info->VhtCurBeamform;
+	if (sta->support_wireless_set & WIRELESS_VHT) {
+		if (bf->vht_beamform_cap & BEAMFORMING_VHT_BEAMFORMEE_ENABLE)
+			act_as_bfer = 1;
+
+		if (bf->vht_beamform_cap & BEAMFORMING_VHT_BEAMFORMER_ENABLE)
+			act_as_bfee = 1;
+
+	} else if (sta->support_wireless_set & WIRELESS_HT) {
+		if (bf->ht_beamform_cap & BEAMFORMING_HT_BEAMFORMEE_ENABLE)
+			act_as_bfer = 1;
+
+		if (bf->ht_beamform_cap & BEAMFORMING_HT_BEAMFORMER_ENABLE)
+			act_as_bfee = 1;
 	}
 
-	PHYDM_DBG(p_dm, DBG_TXBF, ("p_sta->wireless_mode = 0x%x, staidx = %d\n", p_sta->WirelessMode, sta_idx));
-#elif (DM_ODM_SUPPORT_TYPE == ODM_CE)
+	if (act_as_bfer))
+		{ /* Our Device act as BFer */
+			dm_bdc_table->w_bfee_client[macid] = true;
+			dm_bdc_table->num_txbfee_client++;
+		}
+	else
+		dm_bdc_table->w_bfee_client[macid] = false;
 
-	if (!is_sta_active(p_cmn_sta)) {
-		PHYDM_DBG(p_dm, DBG_TXBF, ("%s => sta_info(mac_id:%d) failed\n", __func__, sta_idx));
+	if (act_as_bfee))
+		{ /* Our Device act as BFee */
+			dm_bdc_table->w_bfer_client[macid] = true;
+			dm_bdc_table->num_txbfer_client++;
+		}
+	else
+		dm_bdc_table->w_bfer_client[macid] = false;
+
+#endif
+#endif
+}
+
+struct _RT_BEAMFORM_STAINFO *
+phydm_sta_info_init(struct dm_struct *dm, u16 sta_idx, u8 *my_mac_addr)
+{
+	struct _RT_BEAMFORMING_INFO *beam_info = &dm->beamforming_info;
+	struct _RT_BEAMFORM_STAINFO *entry = &beam_info->beamform_sta_info;
+	struct cmn_sta_info *cmn_sta = dm->phydm_sta_info[sta_idx];
+	//void					*adapter = dm->adapter;
+	ADAPTER * adapter = dm->adapter;
+#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
+	PMGNT_INFO p_MgntInfo = &((adapter)->MgntInfo);
+	PRT_HIGH_THROUGHPUT p_ht_info = GET_HT_INFO(p_MgntInfo);
+	PRT_VERY_HIGH_THROUGHPUT p_vht_info = GET_VHT_INFO(p_MgntInfo);
+#endif
+
+	if (!is_sta_active(cmn_sta)) {
+		PHYDM_DBG(dm, DBG_TXBF, "%s => sta_info(mac_id:%d) failed\n",
+			  __func__, sta_idx);
+		#if (DM_ODM_SUPPORT_TYPE == ODM_CE)
 		rtw_warn_on(1);
-		return p_entry;
+		#endif
+
+		return entry;
 	}
 
-	odm_move_memory(p_dm, p_entry->my_mac_addr, adapter_mac_addr(p_sta->padapter), 6);
-	#ifdef CONFIG_80211N_HT
-	p_entry->ht_beamform_cap = p_cmn_sta->bf_info.ht_beamform_cap;
-	#endif
+#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
+	/*odm_move_memory(dm, (PVOID)(entry->my_mac_addr),*/
+	/*(PVOID)(adapter->CurrentAddress), 6);*/
+	odm_move_memory(dm, entry->my_mac_addr, my_mac_addr, 6);
+#elif (DM_ODM_SUPPORT_TYPE == ODM_CE)
+	/*odm_move_memory(dm, entry->my_mac_addr,*/
+	/*adapter_mac_addr(sta->padapter), 6);*/
+	odm_move_memory(dm, entry->my_mac_addr, my_mac_addr, 6);
+#endif
 
-	p_entry->aid = p_cmn_sta->aid;
-	p_entry->ra = p_cmn_sta->mac_addr;
-	p_entry->mac_id = p_cmn_sta->mac_id;
-	p_entry->wireless_mode = p_sta->wireless_mode;
-	p_entry->bw = p_cmn_sta->bw_mode;
-	#ifdef CONFIG_80211N_HT
-	p_entry->cur_beamform = p_cmn_sta->bf_info.ht_beamform_cap;
-	#endif
-#if	ODM_IC_11AC_SERIES_SUPPORT
-	if ((p_entry->wireless_mode & WIRELESS_MODE_AC_5G) || (p_entry->wireless_mode & WIRELESS_MODE_AC_24G)) {
-		p_entry->cur_beamform_vht = p_cmn_sta->bf_info.vht_beamform_cap;
-		p_entry->vht_beamform_cap = p_cmn_sta->bf_info.vht_beamform_cap;
+	entry->aid = cmn_sta->aid;
+	entry->ra = cmn_sta->mac_addr;
+	entry->mac_id = cmn_sta->mac_id;
+	entry->bw = cmn_sta->bw_mode;
+	entry->cur_beamform = cmn_sta->bf_info.ht_beamform_cap;
+	entry->ht_beamform_cap = cmn_sta->bf_info.ht_beamform_cap;
+
+#if ODM_IC_11AC_SERIES_SUPPORT
+	if (cmn_sta->support_wireless_set & WIRELESS_VHT) {
+		entry->cur_beamform_vht = cmn_sta->bf_info.vht_beamform_cap;
+		entry->vht_beamform_cap = cmn_sta->bf_info.vht_beamform_cap;
 	}
 #endif
-	PHYDM_DBG(p_dm, DBG_TXBF, ("p_sta->wireless_mode = 0x%x, staidx = %d\n", p_sta->wireless_mode, sta_idx));
+
+#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) /*To Be Removed */
+	entry->ht_beamform_cap = p_ht_info->HtBeamformCap; /*To Be Removed*/
+	entry->vht_beamform_cap = p_vht_info->VhtBeamformCap; /*To Be Removed*/
+
+	if (sta_idx == 0) { /*@client mode*/
+		#if ODM_IC_11AC_SERIES_SUPPORT
+		if (cmn_sta->support_wireless_set & WIRELESS_VHT)
+			entry->cur_beamform_vht = p_vht_info->VhtCurBeamform;
+		#endif
+	}
 #endif
-	PHYDM_DBG(p_dm, DBG_TXBF, ("p_entry->cur_beamform = 0x%x, p_entry->cur_beamform_vht = 0x%x\n", p_entry->cur_beamform, p_entry->cur_beamform_vht));
-	return p_entry;
 
+	PHYDM_DBG(dm, DBG_TXBF, "wireless_set = 0x%x, staidx = %d\n",
+		  cmn_sta->support_wireless_set, sta_idx);
+	PHYDM_DBG(dm, DBG_TXBF,
+		  "entry->cur_beamform = 0x%x, entry->cur_beamform_vht = 0x%x\n",
+		  entry->cur_beamform, entry->cur_beamform_vht);
+	return entry;
 }
 void phydm_sta_info_update(
-	struct PHY_DM_STRUCT			*p_dm,
-	u16				sta_idx,
-	struct _RT_BEAMFORMEE_ENTRY	*p_beamform_entry
-)
+	struct dm_struct *dm,
+	u16 sta_idx,
+	struct _RT_BEAMFORMEE_ENTRY *beamform_entry)
 {
-	struct cmn_sta_info *p_sta = p_dm->p_phydm_sta_info[sta_idx];
+	struct cmn_sta_info *sta = dm->phydm_sta_info[sta_idx];
 
-	if (!is_sta_active(p_sta))
+	if (!is_sta_active(sta))
 		return;
 
-	p_sta->bf_info.p_aid = p_beamform_entry->p_aid;
-	p_sta->bf_info.g_id = p_beamform_entry->g_id;
+	sta->bf_info.p_aid = beamform_entry->p_aid;
+	sta->bf_info.g_id = beamform_entry->g_id;
 }
 
 struct _RT_BEAMFORMEE_ENTRY *
 phydm_beamforming_get_bfee_entry_by_addr(
-	void		*p_dm_void,
-	u8		*RA,
-	u8		*idx
-)
+	void *dm_void,
+	u8 *RA,
+	u8 *idx)
 {
-	struct PHY_DM_STRUCT					*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	u8	i = 0;
-	struct _RT_BEAMFORMING_INFO *p_beam_info = &p_dm->beamforming_info;
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	u8 i = 0;
+	struct _RT_BEAMFORMING_INFO *beam_info = &dm->beamforming_info;
 
 	for (i = 0; i < BEAMFORMEE_ENTRY_NUM; i++) {
-		if (p_beam_info->beamformee_entry[i].is_used && (eq_mac_addr(RA, p_beam_info->beamformee_entry[i].mac_addr))) {
+		if (beam_info->beamformee_entry[i].is_used && (eq_mac_addr(RA, beam_info->beamformee_entry[i].mac_addr))) {
 			*idx = i;
-			return &(p_beam_info->beamformee_entry[i]);
+			return &beam_info->beamformee_entry[i];
 		}
 	}
 
@@ -143,62 +194,57 @@ phydm_beamforming_get_bfee_entry_by_addr(
 
 struct _RT_BEAMFORMER_ENTRY *
 phydm_beamforming_get_bfer_entry_by_addr(
-	void	*p_dm_void,
-	u8	*TA,
-	u8	*idx
-)
+	void *dm_void,
+	u8 *TA,
+	u8 *idx)
 {
-	struct PHY_DM_STRUCT	*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	u8		i = 0;
-	struct _RT_BEAMFORMING_INFO	*p_beam_info = &p_dm->beamforming_info;
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	u8 i = 0;
+	struct _RT_BEAMFORMING_INFO *beam_info = &dm->beamforming_info;
 
 	for (i = 0; i < BEAMFORMER_ENTRY_NUM; i++) {
-		if (p_beam_info->beamformer_entry[i].is_used && (eq_mac_addr(TA, p_beam_info->beamformer_entry[i].mac_addr))) {
+		if (beam_info->beamformer_entry[i].is_used && (eq_mac_addr(TA, beam_info->beamformer_entry[i].mac_addr))) {
 			*idx = i;
-			return &(p_beam_info->beamformer_entry[i]);
+			return &beam_info->beamformer_entry[i];
 		}
 	}
 
 	return NULL;
 }
 
-
 struct _RT_BEAMFORMEE_ENTRY *
 phydm_beamforming_get_entry_by_mac_id(
-	void		*p_dm_void,
-	u8		mac_id,
-	u8		*idx
-)
+	void *dm_void,
+	u8 mac_id,
+	u8 *idx)
 {
-	struct PHY_DM_STRUCT					*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	u8	i = 0;
-	struct _RT_BEAMFORMING_INFO *p_beam_info = &p_dm->beamforming_info;
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	u8 i = 0;
+	struct _RT_BEAMFORMING_INFO *beam_info = &dm->beamforming_info;
 
 	for (i = 0; i < BEAMFORMEE_ENTRY_NUM; i++) {
-		if (p_beam_info->beamformee_entry[i].is_used && (mac_id == p_beam_info->beamformee_entry[i].mac_id)) {
+		if (beam_info->beamformee_entry[i].is_used && mac_id == beam_info->beamformee_entry[i].mac_id) {
 			*idx = i;
-			return &(p_beam_info->beamformee_entry[i]);
+			return &beam_info->beamformee_entry[i];
 		}
 	}
 
 	return NULL;
 }
 
-
 enum beamforming_cap
 phydm_beamforming_get_entry_beam_cap_by_mac_id(
-	void		*p_dm_void,
-	u8		mac_id
-)
+	void *dm_void,
+	u8 mac_id)
 {
-	struct PHY_DM_STRUCT					*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	u8	i = 0;
-	struct _RT_BEAMFORMING_INFO	*p_beam_info = &p_dm->beamforming_info;
-	enum beamforming_cap			beamform_entry_cap = BEAMFORMING_CAP_NONE;
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	u8 i = 0;
+	struct _RT_BEAMFORMING_INFO *beam_info = &dm->beamforming_info;
+	enum beamforming_cap beamform_entry_cap = BEAMFORMING_CAP_NONE;
 
 	for (i = 0; i < BEAMFORMEE_ENTRY_NUM; i++) {
-		if (p_beam_info->beamformee_entry[i].is_used && (mac_id == p_beam_info->beamformee_entry[i].mac_id)) {
-			beamform_entry_cap =  p_beam_info->beamformee_entry[i].beamform_entry_cap;
+		if (beam_info->beamformee_entry[i].is_used && mac_id == beam_info->beamformee_entry[i].mac_id) {
+			beamform_entry_cap = beam_info->beamformee_entry[i].beamform_entry_cap;
 			i = BEAMFORMEE_ENTRY_NUM;
 		}
 	}
@@ -206,21 +252,19 @@ phydm_beamforming_get_entry_beam_cap_by_mac_id(
 	return beamform_entry_cap;
 }
 
-
 struct _RT_BEAMFORMEE_ENTRY *
 phydm_beamforming_get_free_bfee_entry(
-	void		*p_dm_void,
-	u8		*idx
-)
+	void *dm_void,
+	u8 *idx)
 {
-	struct PHY_DM_STRUCT					*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	u8	i = 0;
-	struct _RT_BEAMFORMING_INFO *p_beam_info = &p_dm->beamforming_info;
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	u8 i = 0;
+	struct _RT_BEAMFORMING_INFO *beam_info = &dm->beamforming_info;
 
 	for (i = 0; i < BEAMFORMEE_ENTRY_NUM; i++) {
-		if (p_beam_info->beamformee_entry[i].is_used == false) {
+		if (beam_info->beamformee_entry[i].is_used == false) {
 			*idx = i;
-			return &(p_beam_info->beamformee_entry[i]);
+			return &beam_info->beamformee_entry[i];
 		}
 	}
 	return NULL;
@@ -228,26 +272,25 @@ phydm_beamforming_get_free_bfee_entry(
 
 struct _RT_BEAMFORMER_ENTRY *
 phydm_beamforming_get_free_bfer_entry(
-	void		*p_dm_void,
-	u8		*idx
-)
+	void *dm_void,
+	u8 *idx)
 {
-	struct PHY_DM_STRUCT					*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	u8	i = 0;
-	struct _RT_BEAMFORMING_INFO *p_beam_info = &p_dm->beamforming_info;
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	u8 i = 0;
+	struct _RT_BEAMFORMING_INFO *beam_info = &dm->beamforming_info;
 
-	PHYDM_DBG(p_dm, DBG_TXBF, ("%s ===>\n", __func__));
+	PHYDM_DBG(dm, DBG_TXBF, "%s ===>\n", __func__);
 
 	for (i = 0; i < BEAMFORMER_ENTRY_NUM; i++) {
-		if (p_beam_info->beamformer_entry[i].is_used == false) {
+		if (beam_info->beamformer_entry[i].is_used == false) {
 			*idx = i;
-			return &(p_beam_info->beamformer_entry[i]);
+			return &beam_info->beamformer_entry[i];
 		}
 	}
 	return NULL;
 }
 
-/*
+/*@
  * Description: Get the first entry index of MU Beamformee.
  *
  * Return value: index of the first MU sta.
@@ -255,19 +298,18 @@ phydm_beamforming_get_free_bfer_entry(
  * 2015.05.25. Created by tynli.
  *
  */
-u8
-phydm_beamforming_get_first_mu_bfee_entry_idx(
-	void		*p_dm_void
-)
+u8 phydm_beamforming_get_first_mu_bfee_entry_idx(
+	void *dm_void)
 {
-	struct PHY_DM_STRUCT				*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	u8					idx = 0xFF;
-	struct _RT_BEAMFORMING_INFO	*p_beam_info = &p_dm->beamforming_info;
-	boolean					is_found = false;
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	u8 idx = 0xFF;
+	struct _RT_BEAMFORMING_INFO *beam_info = &dm->beamforming_info;
+	boolean is_found = false;
 
 	for (idx = 0; idx < BEAMFORMEE_ENTRY_NUM; idx++) {
-		if (p_beam_info->beamformee_entry[idx].is_used && p_beam_info->beamformee_entry[idx].is_mu_sta) {
-			PHYDM_DBG(p_dm, DBG_TXBF, ("[%s] idx=%d!\n", __func__, idx));
+		if (beam_info->beamformee_entry[idx].is_used && beam_info->beamformee_entry[idx].is_mu_sta) {
+			PHYDM_DBG(dm, DBG_TXBF, "[%s] idx=%d!\n", __func__,
+				  idx);
 			is_found = true;
 			break;
 		}
@@ -279,137 +321,141 @@ phydm_beamforming_get_first_mu_bfee_entry_idx(
 	return idx;
 }
 
-
-/*Add SU BFee and MU BFee*/
+/*@Add SU BFee and MU BFee*/
 struct _RT_BEAMFORMEE_ENTRY *
 beamforming_add_bfee_entry(
-	void					*p_dm_void,
-	struct _RT_BEAMFORM_STAINFO	*p_sta,
-	enum beamforming_cap		beamform_cap,
-	u8					num_of_sounding_dim,
-	u8					comp_steering_num_of_bfer,
-	u8					*idx
-)
+	void *dm_void,
+	struct _RT_BEAMFORM_STAINFO *sta,
+	enum beamforming_cap beamform_cap,
+	u8 num_of_sounding_dim,
+	u8 comp_steering_num_of_bfer,
+	u8 *idx)
 {
-	struct PHY_DM_STRUCT				*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	struct _RT_BEAMFORMEE_ENTRY	*p_entry = phydm_beamforming_get_free_bfee_entry(p_dm, idx);
-
-	PHYDM_DBG(p_dm, DBG_TXBF, ("%s Start!\n", __func__));
-
-	if (p_entry != NULL) {
-		p_entry->is_used = true;
-		p_entry->aid = p_sta->aid;
-		p_entry->mac_id = p_sta->mac_id;
-		p_entry->sound_bw = p_sta->bw;
-		odm_move_memory(p_dm, p_entry->my_mac_addr, p_sta->my_mac_addr, 6);
-
-		if (phydm_acting_determine(p_dm, phydm_acting_as_ap)) {
-			/*BSSID[44:47] xor BSSID[40:43]*/
-			u16 bssid = ((p_sta->my_mac_addr[5] & 0xf0) >> 4) ^ (p_sta->my_mac_addr[5] & 0xf);
-			/*(dec(A) + dec(B)*32) mod 512*/
-			p_entry->p_aid = (p_sta->aid + bssid * 32) & 0x1ff;
-			p_entry->g_id = 63;
-			PHYDM_DBG(p_dm, DBG_TXBF, ("%s: BFee P_AID addressed to STA=%d\n", __func__, p_entry->p_aid));
-		} else if (phydm_acting_determine(p_dm, phydm_acting_as_ibss)) {
-			/*ad hoc mode*/
-			p_entry->p_aid = 0;
-			p_entry->g_id = 63;
-			PHYDM_DBG(p_dm, DBG_TXBF, ("%s: BFee P_AID as IBSS=%d\n", __func__, p_entry->p_aid));
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct _RT_BEAMFORMEE_ENTRY *entry = phydm_beamforming_get_free_bfee_entry(dm, idx);
+
+	PHYDM_DBG(dm, DBG_TXBF, "%s Start!\n", __func__);
+
+	if (entry != NULL) {
+		entry->is_used = true;
+		entry->aid = sta->aid;
+		entry->mac_id = sta->mac_id;
+		entry->sound_bw = sta->bw;
+		odm_move_memory(dm, entry->my_mac_addr, sta->my_mac_addr, 6);
+
+		if (phydm_acting_determine(dm, phydm_acting_as_ap)) {
+			/*@BSSID[44:47] xor BSSID[40:43]*/
+			u16 bssid = ((sta->my_mac_addr[5] & 0xf0) >> 4) ^ (sta->my_mac_addr[5] & 0xf);
+			/*@(dec(A) + dec(B)*32) mod 512*/
+			entry->p_aid = (sta->aid + bssid * 32) & 0x1ff;
+			entry->g_id = 63;
+			PHYDM_DBG(dm, DBG_TXBF,
+				  "%s: BFee P_AID addressed to STA=%d\n",
+				  __func__, entry->p_aid);
+		} else if (phydm_acting_determine(dm, phydm_acting_as_ibss)) {
+			/*@ad hoc mode*/
+			entry->p_aid = 0;
+			entry->g_id = 63;
+			PHYDM_DBG(dm, DBG_TXBF, "%s: BFee P_AID as IBSS=%d\n",
+				  __func__, entry->p_aid);
 		} else {
-			/*client mode*/
-			p_entry->p_aid =  p_sta->ra[5];
-			/*BSSID[39:47]*/
-			p_entry->p_aid = (p_entry->p_aid << 1) | (p_sta->ra[4] >> 7);
-			p_entry->g_id = 0;
-			PHYDM_DBG(p_dm, DBG_TXBF, ("%s: BFee P_AID addressed to AP=0x%X\n", __func__, p_entry->p_aid));
+			/*@client mode*/
+			entry->p_aid = sta->ra[5];
+			/*@BSSID[39:47]*/
+			entry->p_aid = (entry->p_aid << 1) | (sta->ra[4] >> 7);
+			entry->g_id = 0;
+			PHYDM_DBG(dm, DBG_TXBF,
+				  "%s: BFee P_AID addressed to AP=0x%X\n",
+				  __func__, entry->p_aid);
 		}
-		cp_mac_addr(p_entry->mac_addr, p_sta->ra);
-		p_entry->is_txbf = false;
-		p_entry->is_sound = false;
-		p_entry->sound_period = 400;
-		p_entry->beamform_entry_cap = beamform_cap;
-		p_entry->beamform_entry_state = BEAMFORMING_ENTRY_STATE_UNINITIALIZE;
+		cp_mac_addr(entry->mac_addr, sta->ra);
+		entry->is_txbf = false;
+		entry->is_sound = false;
+		entry->sound_period = 400;
+		entry->beamform_entry_cap = beamform_cap;
+		entry->beamform_entry_state = BEAMFORMING_ENTRY_STATE_UNINITIALIZE;
 
-		/*		p_entry->log_seq = 0xff;				Move to beamforming_add_bfer_entry*/
-		/*		p_entry->log_retry_cnt = 0;			Move to beamforming_add_bfer_entry*/
-		/*		p_entry->LogSuccessCnt = 0;		Move to beamforming_add_bfer_entry*/
+		/*		@entry->log_seq = 0xff;				Move to beamforming_add_bfer_entry*/
+		/*		@entry->log_retry_cnt = 0;			Move to beamforming_add_bfer_entry*/
+		/*		@entry->LogSuccessCnt = 0;		Move to beamforming_add_bfer_entry*/
 
-		p_entry->log_status_fail_cnt = 0;
+		entry->log_status_fail_cnt = 0;
 
-		p_entry->num_of_sounding_dim = num_of_sounding_dim;
-		p_entry->comp_steering_num_of_bfer = comp_steering_num_of_bfer;
+		entry->num_of_sounding_dim = num_of_sounding_dim;
+		entry->comp_steering_num_of_bfer = comp_steering_num_of_bfer;
 
 		if (beamform_cap & BEAMFORMER_CAP_VHT_MU) {
-			p_dm->beamforming_info.beamformee_mu_cnt += 1;
-			p_entry->is_mu_sta = true;
-			p_dm->beamforming_info.first_mu_bfee_index = phydm_beamforming_get_first_mu_bfee_entry_idx(p_dm);
+			dm->beamforming_info.beamformee_mu_cnt += 1;
+			entry->is_mu_sta = true;
+			dm->beamforming_info.first_mu_bfee_index = phydm_beamforming_get_first_mu_bfee_entry_idx(dm);
 		} else if (beamform_cap & (BEAMFORMER_CAP_VHT_SU | BEAMFORMER_CAP_HT_EXPLICIT)) {
-			p_dm->beamforming_info.beamformee_su_cnt += 1;
-			p_entry->is_mu_sta = false;
+			dm->beamforming_info.beamformee_su_cnt += 1;
+			entry->is_mu_sta = false;
 		}
 
-		return p_entry;
+		return entry;
 	} else
 		return NULL;
 }
 
-/*Add SU BFee and MU BFer*/
+/*@Add SU BFee and MU BFer*/
 struct _RT_BEAMFORMER_ENTRY *
 beamforming_add_bfer_entry(
-	void					*p_dm_void,
-	struct _RT_BEAMFORM_STAINFO	*p_sta,
-	enum beamforming_cap		beamform_cap,
-	u8					num_of_sounding_dim,
-	u8					*idx
-)
+	void *dm_void,
+	struct _RT_BEAMFORM_STAINFO *sta,
+	enum beamforming_cap beamform_cap,
+	u8 num_of_sounding_dim,
+	u8 *idx)
 {
-	struct PHY_DM_STRUCT				*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	struct _RT_BEAMFORMER_ENTRY	*p_entry = phydm_beamforming_get_free_bfer_entry(p_dm, idx);
-
-	PHYDM_DBG(p_dm, DBG_TXBF, ("%s Start!\n", __func__));
-
-	if (p_entry != NULL) {
-		p_entry->is_used = true;
-		odm_move_memory(p_dm, p_entry->my_mac_addr, p_sta->my_mac_addr, 6);
-		if (phydm_acting_determine(p_dm, phydm_acting_as_ap)) {
-			/*BSSID[44:47] xor BSSID[40:43]*/
-			u16 bssid = ((p_sta->my_mac_addr[5] & 0xf0) >> 4) ^ (p_sta->my_mac_addr[5] & 0xf);
-
-			p_entry->p_aid = (p_sta->aid + bssid * 32) & 0x1ff;
-			p_entry->g_id = 63;
-			/*(dec(A) + dec(B)*32) mod 512*/
-		} else if (phydm_acting_determine(p_dm, phydm_acting_as_ibss)) {
-			p_entry->p_aid = 0;
-			p_entry->g_id = 63;
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct _RT_BEAMFORMER_ENTRY *entry = phydm_beamforming_get_free_bfer_entry(dm, idx);
+
+	PHYDM_DBG(dm, DBG_TXBF, "%s Start!\n", __func__);
+
+	if (entry != NULL) {
+		entry->is_used = true;
+		odm_move_memory(dm, entry->my_mac_addr, sta->my_mac_addr, 6);
+		if (phydm_acting_determine(dm, phydm_acting_as_ap)) {
+			/*@BSSID[44:47] xor BSSID[40:43]*/
+			u16 bssid = ((sta->my_mac_addr[5] & 0xf0) >> 4) ^ (sta->my_mac_addr[5] & 0xf);
+
+			entry->p_aid = (sta->aid + bssid * 32) & 0x1ff;
+			entry->g_id = 63;
+			/*@(dec(A) + dec(B)*32) mod 512*/
+		} else if (phydm_acting_determine(dm, phydm_acting_as_ibss)) {
+			entry->p_aid = 0;
+			entry->g_id = 63;
 		} else {
-			p_entry->p_aid =  p_sta->ra[5];
-			/*BSSID[39:47]*/
-			p_entry->p_aid = (p_entry->p_aid << 1) | (p_sta->ra[4] >> 7);
-			p_entry->g_id = 0;
-			PHYDM_DBG(p_dm, DBG_TXBF, ("%s: P_AID addressed to AP=0x%X\n", __func__, p_entry->p_aid));
+			entry->p_aid = sta->ra[5];
+			/*@BSSID[39:47]*/
+			entry->p_aid = (entry->p_aid << 1) | (sta->ra[4] >> 7);
+			entry->g_id = 0;
+			PHYDM_DBG(dm, DBG_TXBF,
+				  "%s: P_AID addressed to AP=0x%X\n", __func__,
+				  entry->p_aid);
 		}
 
-		cp_mac_addr(p_entry->mac_addr, p_sta->ra);
-		p_entry->beamform_entry_cap = beamform_cap;
+		cp_mac_addr(entry->mac_addr, sta->ra);
+		entry->beamform_entry_cap = beamform_cap;
 
-		p_entry->pre_log_seq = 0;	/*Modified by Jeffery @2015-04-13*/
-		p_entry->log_seq = 0;		/*Modified by Jeffery @2014-10-29*/
-		p_entry->log_retry_cnt = 0;	/*Modified by Jeffery @2014-10-29*/
-		p_entry->log_success = 0;	/*log_success is NOT needed to be accumulated, so  LogSuccessCnt->log_success, 2015-04-13, Jeffery*/
-		p_entry->clock_reset_times = 0;	/*Modified by Jeffery @2015-04-13*/
+		entry->pre_log_seq = 0; /*@Modified by Jeffery @2015-04-13*/
+		entry->log_seq = 0; /*@Modified by Jeffery @2014-10-29*/
+		entry->log_retry_cnt = 0; /*@Modified by Jeffery @2014-10-29*/
+		entry->log_success = 0; /*@log_success is NOT needed to be accumulated, so  LogSuccessCnt->log_success, 2015-04-13, Jeffery*/
+		entry->clock_reset_times = 0; /*@Modified by Jeffery @2015-04-13*/
 
-		p_entry->num_of_sounding_dim = num_of_sounding_dim;
+		entry->num_of_sounding_dim = num_of_sounding_dim;
 
 		if (beamform_cap & BEAMFORMEE_CAP_VHT_MU) {
-			p_dm->beamforming_info.beamformer_mu_cnt += 1;
-			p_entry->is_mu_ap = true;
-			p_entry->aid = p_sta->aid;
+			dm->beamforming_info.beamformer_mu_cnt += 1;
+			entry->is_mu_ap = true;
+			entry->aid = sta->aid;
 		} else if (beamform_cap & (BEAMFORMEE_CAP_VHT_SU | BEAMFORMEE_CAP_HT_EXPLICIT)) {
-			p_dm->beamforming_info.beamformer_su_cnt += 1;
-			p_entry->is_mu_ap = false;
+			dm->beamforming_info.beamformer_su_cnt += 1;
+			entry->is_mu_ap = false;
 		}
 
-		return p_entry;
+		return entry;
 	} else
 		return NULL;
 }
@@ -417,54 +463,51 @@ beamforming_add_bfer_entry(
 #if 0
 boolean
 beamforming_remove_entry(
-	struct _ADAPTER			*adapter,
+	void			*adapter,
 	u8		*RA,
 	u8		*idx
 )
 {
-	HAL_DATA_TYPE			*p_hal_data = GET_HAL_DATA(adapter);
-	struct PHY_DM_STRUCT				*p_dm = &p_hal_data->DM_OutSrc;
+	HAL_DATA_TYPE			*hal_data = GET_HAL_DATA(((PADAPTER)adapter));
+	struct dm_struct				*dm = &hal_data->DM_OutSrc;
 
-	struct _RT_BEAMFORMER_ENTRY	*p_bfer_entry = phydm_beamforming_get_bfer_entry_by_addr(p_dm, RA, idx);
-	struct _RT_BEAMFORMEE_ENTRY	*p_entry = phydm_beamforming_get_bfee_entry_by_addr(p_dm, RA, idx);
+	struct _RT_BEAMFORMER_ENTRY	*bfer_entry = phydm_beamforming_get_bfer_entry_by_addr(dm, RA, idx);
+	struct _RT_BEAMFORMEE_ENTRY	*entry = phydm_beamforming_get_bfee_entry_by_addr(dm, RA, idx);
 	boolean ret = false;
 
 	RT_DISP(FBEAM, FBEAM_FUN, ("[Beamforming]@%s Start!\n", __func__));
-	RT_DISP(FBEAM, FBEAM_FUN, ("[Beamforming]@%s, p_bfer_entry=0x%x\n", __func__, p_bfer_entry));
-	RT_DISP(FBEAM, FBEAM_FUN, ("[Beamforming]@%s, p_entry=0x%x\n", __func__, p_entry));
-
-	if (p_entry != NULL) {
-		p_entry->is_used = false;
-		p_entry->beamform_entry_cap = BEAMFORMING_CAP_NONE;
-		/*p_entry->beamform_entry_state = BEAMFORMING_ENTRY_STATE_UNINITIALIZE;*/
-		p_entry->is_beamforming_in_progress = false;
+	RT_DISP(FBEAM, FBEAM_FUN, ("[Beamforming]@%s, bfer_entry=0x%x\n", __func__, bfer_entry));
+	RT_DISP(FBEAM, FBEAM_FUN, ("[Beamforming]@%s, entry=0x%x\n", __func__, entry));
+
+	if (entry != NULL) {
+		entry->is_used = false;
+		entry->beamform_entry_cap = BEAMFORMING_CAP_NONE;
+		/*@entry->beamform_entry_state = BEAMFORMING_ENTRY_STATE_UNINITIALIZE;*/
+		entry->is_beamforming_in_progress = false;
 		ret = true;
 	}
-	if (p_bfer_entry != NULL) {
-		p_bfer_entry->is_used = false;
-		p_bfer_entry->beamform_entry_cap = BEAMFORMING_CAP_NONE;
+	if (bfer_entry != NULL) {
+		bfer_entry->is_used = false;
+		bfer_entry->beamform_entry_cap = BEAMFORMING_CAP_NONE;
 		ret = true;
 	}
 	return ret;
-
 }
 #endif
 
 /* Used for beamforming_start_v1 */
-void
-phydm_beamforming_ndpa_rate(
-	void		*p_dm_void,
-	enum channel_width	BW,
-	u8			rate
-)
+void phydm_beamforming_ndpa_rate(
+	void *dm_void,
+	enum channel_width BW,
+	u8 rate)
 {
-	u16			ndpa_rate = rate;
-	struct PHY_DM_STRUCT		*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
+	u16 ndpa_rate = rate;
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
 
-	PHYDM_DBG(p_dm, DBG_TXBF, ("%s Start!\n", __func__));
+	PHYDM_DBG(dm, DBG_TXBF, "%s Start!\n", __func__);
 
 	if (ndpa_rate == 0) {
-		if (p_dm->rssi_min > 30) /* link RSSI > 30% */
+		if (dm->rssi_min > 30) /* @link RSSI > 30% */
 			ndpa_rate = ODM_RATE24M;
 		else
 			ndpa_rate = ODM_RATE6M;
@@ -474,219 +517,213 @@ phydm_beamforming_ndpa_rate(
 		BW = (enum channel_width)CHANNEL_WIDTH_20;
 
 	ndpa_rate = (ndpa_rate << 8) | BW;
-	hal_com_txbf_set(p_dm, TXBF_SET_SOUNDING_RATE, (u8 *)&ndpa_rate);
-
+	hal_com_txbf_set(dm, TXBF_SET_SOUNDING_RATE, (u8 *)&ndpa_rate);
 }
 
-
 /* Used for beamforming_start_sw and  beamforming_start_fw */
-void
-phydm_beamforming_dym_ndpa_rate(
-	void		*p_dm_void
-)
+void phydm_beamforming_dym_ndpa_rate(
+	void *dm_void)
 {
-	u16			ndpa_rate = ODM_RATE6M, BW;
-	struct PHY_DM_STRUCT		*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
+	u16 ndpa_rate = ODM_RATE6M, BW;
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
 
 	ndpa_rate = ODM_RATE6M;
 	BW = CHANNEL_WIDTH_20;
 
 	ndpa_rate = ndpa_rate << 8 | BW;
-	hal_com_txbf_set(p_dm, TXBF_SET_SOUNDING_RATE, (u8 *)&ndpa_rate);
-	PHYDM_DBG(p_dm, DBG_TXBF, ("%s End, NDPA rate = 0x%X\n", __func__, ndpa_rate));
+	hal_com_txbf_set(dm, TXBF_SET_SOUNDING_RATE, (u8 *)&ndpa_rate);
+	PHYDM_DBG(dm, DBG_TXBF, "%s End, NDPA rate = 0x%X\n", __func__,
+		  ndpa_rate);
 }
 
-/*
+/*@
 *	SW Sounding : SW Timer unit 1ms
 *				 HW Timer unit (1/32000) s  32k is clock.
 *	FW Sounding : FW Timer unit 10ms
 */
-void
-beamforming_dym_period(
-	void		*p_dm_void,
-	u8          status
-)
+void beamforming_dym_period(
+	void *dm_void,
+	u8 status)
 {
-	u8					idx;
-	boolean					is_change_period = false;
-	u16					sound_period_sw, sound_period_fw;
-	struct PHY_DM_STRUCT				*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
+	u8 idx;
+	boolean is_change_period = false;
+	u16 sound_period_sw, sound_period_fw;
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
 
-	struct _RT_BEAMFORMEE_ENTRY	*p_beamform_entry;
-	struct _RT_BEAMFORMING_INFO	*p_beam_info = &(p_dm->beamforming_info);
-	struct _RT_SOUNDING_INFO		*p_sound_info = &(p_beam_info->sounding_info);
+	struct _RT_BEAMFORMEE_ENTRY *beamform_entry;
+	struct _RT_BEAMFORMING_INFO *beam_info = &dm->beamforming_info;
+	struct _RT_SOUNDING_INFO *sound_info = &beam_info->sounding_info;
 
-	struct _RT_BEAMFORMEE_ENTRY	*p_entry = &(p_beam_info->beamformee_entry[p_beam_info->beamformee_cur_idx]);
+	struct _RT_BEAMFORMEE_ENTRY *entry = &beam_info->beamformee_entry[beam_info->beamformee_cur_idx];
 
-	PHYDM_DBG(p_dm, DBG_TXBF, ("[%s] Start!\n", __func__));
+	PHYDM_DBG(dm, DBG_TXBF, "[%s] Start!\n", __func__);
 
-	/* 3 TODO  per-client throughput caculation. */
+	/* @3 TODO  per-client throughput caculation. */
 
-	if ((*(p_dm->p_current_tx_tp) + *(p_dm->p_current_rx_tp) > 2) && ((p_entry->log_status_fail_cnt <= 20) || status)) {
-		sound_period_sw = 40;	/* 40ms */
-		sound_period_fw = 40;	/* From  H2C cmd, unit = 10ms */
+	if ((*dm->current_tx_tp + *dm->current_rx_tp > 2) && (entry->log_status_fail_cnt <= 20 || status)) {
+		sound_period_sw = 40; /* @40ms */
+		sound_period_fw = 40; /* @From  H2C cmd, unit = 10ms */
 	} else {
-		sound_period_sw = 4000;/* 4s */
+		sound_period_sw = 4000; /* @4s */
 		sound_period_fw = 400;
 	}
-	PHYDM_DBG(p_dm, DBG_TXBF, ("[%s]sound_period_sw=%d, sound_period_fw=%d\n",	__func__, sound_period_sw, sound_period_fw));
+	PHYDM_DBG(dm, DBG_TXBF, "[%s]sound_period_sw=%d, sound_period_fw=%d\n",
+		  __func__, sound_period_sw, sound_period_fw);
 
 	for (idx = 0; idx < BEAMFORMEE_ENTRY_NUM; idx++) {
-		p_beamform_entry = p_beam_info->beamformee_entry + idx;
+		beamform_entry = beam_info->beamformee_entry + idx;
 
-		if (p_beamform_entry->default_csi_cnt > 20) {
-			/*Modified by David*/
+		if (beamform_entry->default_csi_cnt > 20) {
+			/*@Modified by David*/
 			sound_period_sw = 4000;
 			sound_period_fw = 400;
 		}
 
-		PHYDM_DBG(p_dm, DBG_TXBF, ("[%s] period = %d\n", __func__, sound_period_sw));
-		if (p_beamform_entry->beamform_entry_cap & (BEAMFORMER_CAP_HT_EXPLICIT | BEAMFORMER_CAP_VHT_SU)) {
-			if (p_sound_info->sound_mode == SOUNDING_FW_VHT_TIMER || p_sound_info->sound_mode == SOUNDING_FW_HT_TIMER) {
-				if (p_beamform_entry->sound_period != sound_period_fw) {
-					p_beamform_entry->sound_period = sound_period_fw;
-					is_change_period = true;		/*Only FW sounding need to send H2C packet to change sound period. */
-				}
-			} else if (p_beamform_entry->sound_period != sound_period_sw)
-				p_beamform_entry->sound_period = sound_period_sw;
-		}
+		PHYDM_DBG(dm, DBG_TXBF, "[%s] period = %d\n", __func__,
+			  sound_period_sw);
+		if ((beamform_entry->beamform_entry_cap & (BEAMFORMER_CAP_HT_EXPLICIT | BEAMFORMER_CAP_VHT_SU)) == 0)
+			continue;
+
+		if (sound_info->sound_mode == SOUNDING_FW_VHT_TIMER || sound_info->sound_mode == SOUNDING_FW_HT_TIMER) {
+			if (beamform_entry->sound_period != sound_period_fw) {
+				beamform_entry->sound_period = sound_period_fw;
+				is_change_period = true; /*Only FW sounding need to send H2C packet to change sound period. */
+			}
+		} else if (beamform_entry->sound_period != sound_period_sw)
+			beamform_entry->sound_period = sound_period_sw;
 	}
 
 	if (is_change_period)
-		hal_com_txbf_set(p_dm, TXBF_SET_SOUNDING_FW_NDPA, (u8 *)&idx);
+		hal_com_txbf_set(dm, TXBF_SET_SOUNDING_FW_NDPA, (u8 *)&idx);
 }
 
-
-
-
 boolean
 beamforming_send_ht_ndpa_packet(
-	void			*p_dm_void,
-	u8			*RA,
-	enum channel_width	BW,
-	u8			q_idx
-)
+	void *dm_void,
+	u8 *RA,
+	enum channel_width BW,
+	u8 q_idx)
 {
-	boolean		ret = true;
-	struct PHY_DM_STRUCT	*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
+	boolean ret = true;
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
 
 	if (q_idx == BEACON_QUEUE)
-		ret = send_fw_ht_ndpa_packet(p_dm, RA, BW);
+		ret = send_fw_ht_ndpa_packet(dm, RA, BW);
 	else
-		ret = send_sw_ht_ndpa_packet(p_dm, RA, BW);
+		ret = send_sw_ht_ndpa_packet(dm, RA, BW);
 
 	return ret;
 }
 
-
-
 boolean
 beamforming_send_vht_ndpa_packet(
-	void			*p_dm_void,
-	u8			*RA,
-	u16			AID,
-	enum channel_width	BW,
-	u8			q_idx
-)
+	void *dm_void,
+	u8 *RA,
+	u16 AID,
+	enum channel_width BW,
+	u8 q_idx)
 {
-	struct PHY_DM_STRUCT	*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	struct _RT_BEAMFORMING_INFO	*p_beam_info = &(p_dm->beamforming_info);
-	boolean					ret = true;
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct _RT_BEAMFORMING_INFO *beam_info = &dm->beamforming_info;
+	boolean ret = true;
 
-	hal_com_txbf_set(p_dm, TXBF_SET_GET_TX_RATE, NULL);
+	hal_com_txbf_set(dm, TXBF_SET_GET_TX_RATE, NULL);
 
-	if ((p_beam_info->tx_bf_data_rate >= ODM_RATEVHTSS3MCS7) && (p_beam_info->tx_bf_data_rate <= ODM_RATEVHTSS3MCS9) && (p_beam_info->snding3ss == false))
-		PHYDM_DBG(p_dm, DBG_TXBF, ("@%s: 3SS VHT 789 don't sounding\n", __func__));
+	if (beam_info->tx_bf_data_rate >= ODM_RATEVHTSS3MCS7 && beam_info->tx_bf_data_rate <= ODM_RATEVHTSS3MCS9 && !beam_info->snding3ss)
+		PHYDM_DBG(dm, DBG_TXBF, "@%s: 3SS VHT 789 don't sounding\n",
+			  __func__);
 
-	else  {
+	else {
 		if (q_idx == BEACON_QUEUE) /* Send to reserved page => FW NDPA */
-			ret = send_fw_vht_ndpa_packet(p_dm, RA, AID, BW);
+			ret = send_fw_vht_ndpa_packet(dm, RA, AID, BW);
 		else {
 #ifdef SUPPORT_MU_BF
 #if (SUPPORT_MU_BF == 1)
-			p_beam_info->is_mu_sounding = true;
-			ret = send_sw_vht_mu_ndpa_packet(p_dm, BW);
+			beam_info->is_mu_sounding = true;
+			ret = send_sw_vht_mu_ndpa_packet(dm, BW);
 #else
-			p_beam_info->is_mu_sounding = false;
-			ret = send_sw_vht_ndpa_packet(p_dm, RA, AID, BW);
+			beam_info->is_mu_sounding = false;
+			ret = send_sw_vht_ndpa_packet(dm, RA, AID, BW);
 #endif
 #else
-			p_beam_info->is_mu_sounding = false;
-			ret = send_sw_vht_ndpa_packet(p_dm, RA, AID, BW);
+			beam_info->is_mu_sounding = false;
+			ret = send_sw_vht_ndpa_packet(dm, RA, AID, BW);
 #endif
 		}
 	}
 	return ret;
 }
 
-
 enum beamforming_notify_state
 phydm_beamfomring_is_sounding(
-	void				*p_dm_void,
-	struct _RT_BEAMFORMING_INFO	*p_beam_info,
-	u8					*idx
-)
+	void *dm_void,
+	struct _RT_BEAMFORMING_INFO *beam_info,
+	u8 *idx)
 {
-	enum beamforming_notify_state	is_sounding = BEAMFORMING_NOTIFY_NONE;
-	struct _RT_BEAMFORMING_OID_INFO	beam_oid_info = p_beam_info->beamforming_oid_info;
-	struct PHY_DM_STRUCT					*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
+	enum beamforming_notify_state is_sounding = BEAMFORMING_NOTIFY_NONE;
+	struct _RT_BEAMFORMING_OID_INFO beam_oid_info = beam_info->beamforming_oid_info;
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	u8 i;
 
-	PHYDM_DBG(p_dm, DBG_TXBF, ("%s Start!\n", __func__));
+	PHYDM_DBG(dm, DBG_TXBF, "%s Start!\n", __func__);
 
-	/*if(( Beamforming_GetBeamCap(p_beam_info) & BEAMFORMER_CAP) == 0)*/
-	/*is_sounding = BEAMFORMING_NOTIFY_RESET;*/
-	if (beam_oid_info.sound_oid_mode == sounding_stop_all_timer)
+	/*@if(( Beamforming_GetBeamCap(beam_info) & BEAMFORMER_CAP) == 0)*/
+	/*@is_sounding = BEAMFORMING_NOTIFY_RESET;*/
+	if (beam_oid_info.sound_oid_mode == sounding_stop_all_timer) {
 		is_sounding = BEAMFORMING_NOTIFY_RESET;
-	else {
-		u8 i;
+		goto out;
+	}
 
-		for (i = 0 ; i < BEAMFORMEE_ENTRY_NUM ; i++) {
-			PHYDM_DBG(p_dm, DBG_TXBF, ("@%s: BFee Entry %d is_used=%d, is_sound=%d\n", __func__, i, p_beam_info->beamformee_entry[i].is_used, p_beam_info->beamformee_entry[i].is_sound));
-			if (p_beam_info->beamformee_entry[i].is_used && (!p_beam_info->beamformee_entry[i].is_sound)) {
-				PHYDM_DBG(p_dm, DBG_TXBF, ("%s: Add BFee entry %d\n", __func__, i));
-				*idx = i;
-				if (p_beam_info->beamformee_entry[i].is_mu_sta)
-					is_sounding = BEAMFORMEE_NOTIFY_ADD_MU;
-				else
-					is_sounding = BEAMFORMEE_NOTIFY_ADD_SU;
-			}
+	for (i = 0; i < BEAMFORMEE_ENTRY_NUM; i++) {
+		PHYDM_DBG(dm, DBG_TXBF,
+			  "@%s: BFee Entry %d is_used=%d, is_sound=%d\n",
+			  __func__, i, beam_info->beamformee_entry[i].is_used,
+			  beam_info->beamformee_entry[i].is_sound);
+		if (beam_info->beamformee_entry[i].is_used && !beam_info->beamformee_entry[i].is_sound) {
+			PHYDM_DBG(dm, DBG_TXBF, "%s: Add BFee entry %d\n",
+				  __func__, i);
+			*idx = i;
+			if (beam_info->beamformee_entry[i].is_mu_sta)
+				is_sounding = BEAMFORMEE_NOTIFY_ADD_MU;
+			else
+				is_sounding = BEAMFORMEE_NOTIFY_ADD_SU;
+		}
 
-			if ((!p_beam_info->beamformee_entry[i].is_used) && p_beam_info->beamformee_entry[i].is_sound) {
-				PHYDM_DBG(p_dm, DBG_TXBF, ("%s: Delete BFee entry %d\n", __func__, i));
-				*idx = i;
-				if (p_beam_info->beamformee_entry[i].is_mu_sta)
-					is_sounding = BEAMFORMEE_NOTIFY_DELETE_MU;
-				else
-					is_sounding = BEAMFORMEE_NOTIFY_DELETE_SU;
-			}
+		if (!beam_info->beamformee_entry[i].is_used && beam_info->beamformee_entry[i].is_sound) {
+			PHYDM_DBG(dm, DBG_TXBF, "%s: Delete BFee entry %d\n",
+				  __func__, i);
+			*idx = i;
+			if (beam_info->beamformee_entry[i].is_mu_sta)
+				is_sounding = BEAMFORMEE_NOTIFY_DELETE_MU;
+			else
+				is_sounding = BEAMFORMEE_NOTIFY_DELETE_SU;
 		}
 	}
 
-	PHYDM_DBG(p_dm, DBG_TXBF, ("%s End, is_sounding = %d\n", __func__, is_sounding));
+out:
+	PHYDM_DBG(dm, DBG_TXBF, "%s End, is_sounding = %d\n", __func__,
+		  is_sounding);
 	return is_sounding;
 }
 
-
 /* This function is unused */
-u8
-phydm_beamforming_sounding_idx(
-	void				*p_dm_void,
-	struct _RT_BEAMFORMING_INFO		*p_beam_info
-)
+u8 phydm_beamforming_sounding_idx(
+	void *dm_void,
+	struct _RT_BEAMFORMING_INFO *beam_info)
 {
-	u8					idx = 0;
-	struct _RT_BEAMFORMING_OID_INFO	beam_oid_info = p_beam_info->beamforming_oid_info;
-	struct PHY_DM_STRUCT					*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
+	u8 idx = 0;
+	struct _RT_BEAMFORMING_OID_INFO beam_oid_info = beam_info->beamforming_oid_info;
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
 
-	PHYDM_DBG(p_dm, DBG_TXBF, ("%s Start!\n", __func__));
+	PHYDM_DBG(dm, DBG_TXBF, "%s Start!\n", __func__);
 
 	if (beam_oid_info.sound_oid_mode == SOUNDING_SW_HT_TIMER || beam_oid_info.sound_oid_mode == SOUNDING_SW_VHT_TIMER ||
 	    beam_oid_info.sound_oid_mode == SOUNDING_HW_HT_TIMER || beam_oid_info.sound_oid_mode == SOUNDING_HW_VHT_TIMER)
 		idx = beam_oid_info.sound_oid_idx;
 	else {
-		u8	i;
+		u8 i;
 		for (i = 0; i < BEAMFORMEE_ENTRY_NUM; i++) {
-			if (p_beam_info->beamformee_entry[i].is_used && (false == p_beam_info->beamformee_entry[i].is_sound)) {
+			if (beam_info->beamformee_entry[i].is_used && !beam_info->beamformee_entry[i].is_sound) {
 				idx = i;
 				break;
 			}
@@ -696,20 +733,18 @@ phydm_beamforming_sounding_idx(
 	return idx;
 }
 
-
 enum sounding_mode
 phydm_beamforming_sounding_mode(
-	void				*p_dm_void,
-	struct _RT_BEAMFORMING_INFO	*p_beam_info,
-	u8					idx
-)
+	void *dm_void,
+	struct _RT_BEAMFORMING_INFO *beam_info,
+	u8 idx)
 {
-	struct PHY_DM_STRUCT		*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	u8			support_interface = p_dm->support_interface;
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	u8 support_interface = dm->support_interface;
 
-	struct _RT_BEAMFORMEE_ENTRY		beam_entry = p_beam_info->beamformee_entry[idx];
-	struct _RT_BEAMFORMING_OID_INFO	beam_oid_info = p_beam_info->beamforming_oid_info;
-	enum sounding_mode				mode = beam_oid_info.sound_oid_mode;
+	struct _RT_BEAMFORMEE_ENTRY beam_entry = beam_info->beamformee_entry[idx];
+	struct _RT_BEAMFORMING_OID_INFO beam_oid_info = beam_info->beamforming_oid_info;
+	enum sounding_mode mode = beam_oid_info.sound_oid_mode;
 
 	if (beam_oid_info.sound_oid_mode == SOUNDING_SW_VHT_TIMER || beam_oid_info.sound_oid_mode == SOUNDING_HW_VHT_TIMER) {
 		if (beam_entry.beamform_entry_cap & BEAMFORMER_CAP_VHT_SU)
@@ -722,103 +757,100 @@ phydm_beamforming_sounding_mode(
 		else
 			mode = sounding_stop_all_timer;
 	} else if (beam_entry.beamform_entry_cap & BEAMFORMER_CAP_VHT_SU) {
-		if ((support_interface == ODM_ITRF_USB) && !(p_dm->support_ic_type & (ODM_RTL8814A | ODM_RTL8822B)))
+		if (support_interface == ODM_ITRF_USB && !(dm->support_ic_type & (ODM_RTL8814A | ODM_RTL8822B)))
 			mode = SOUNDING_FW_VHT_TIMER;
 		else
 			mode = SOUNDING_SW_VHT_TIMER;
 	} else if (beam_entry.beamform_entry_cap & BEAMFORMER_CAP_HT_EXPLICIT) {
-		if ((support_interface == ODM_ITRF_USB) && !(p_dm->support_ic_type & (ODM_RTL8814A | ODM_RTL8822B)))
+		if (support_interface == ODM_ITRF_USB && !(dm->support_ic_type & (ODM_RTL8814A | ODM_RTL8822B)))
 			mode = SOUNDING_FW_HT_TIMER;
 		else
 			mode = SOUNDING_SW_HT_TIMER;
 	} else
 		mode = sounding_stop_all_timer;
 
-	PHYDM_DBG(p_dm, DBG_TXBF, ("[%s] support_interface=%d, mode=%d\n", __func__, support_interface, mode));
+	PHYDM_DBG(dm, DBG_TXBF, "[%s] support_interface=%d, mode=%d\n",
+		  __func__, support_interface, mode);
 
 	return mode;
 }
 
-
-u16
-phydm_beamforming_sounding_time(
-	void				*p_dm_void,
-	struct _RT_BEAMFORMING_INFO	*p_beam_info,
-	enum sounding_mode			mode,
-	u8					idx
-)
+u16 phydm_beamforming_sounding_time(
+	void *dm_void,
+	struct _RT_BEAMFORMING_INFO *beam_info,
+	enum sounding_mode mode,
+	u8 idx)
 {
-	u16						sounding_time = 0xffff;
-	struct _RT_BEAMFORMEE_ENTRY		beam_entry = p_beam_info->beamformee_entry[idx];
-	struct _RT_BEAMFORMING_OID_INFO	beam_oid_info = p_beam_info->beamforming_oid_info;
-	struct PHY_DM_STRUCT					*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
+	u16 sounding_time = 0xffff;
+	struct _RT_BEAMFORMEE_ENTRY beam_entry = beam_info->beamformee_entry[idx];
+	struct _RT_BEAMFORMING_OID_INFO beam_oid_info = beam_info->beamforming_oid_info;
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
 
-	PHYDM_DBG(p_dm, DBG_TXBF, ("%s Start!\n", __func__));
+	PHYDM_DBG(dm, DBG_TXBF, "%s Start!\n", __func__);
 
 	if (mode == SOUNDING_HW_HT_TIMER || mode == SOUNDING_HW_VHT_TIMER)
 		sounding_time = beam_oid_info.sound_oid_period * 32;
 	else if (mode == SOUNDING_SW_HT_TIMER || mode == SOUNDING_SW_VHT_TIMER)
-		/*Modified by David*/
-		sounding_time = beam_entry.sound_period;	/*beam_oid_info.sound_oid_period;*/
+		/*@Modified by David*/
+		sounding_time = beam_entry.sound_period; /*@beam_oid_info.sound_oid_period;*/
 	else
 		sounding_time = beam_entry.sound_period;
 
 	return sounding_time;
 }
 
-
 enum channel_width
 phydm_beamforming_sounding_bw(
-	void				*p_dm_void,
-	struct _RT_BEAMFORMING_INFO	*p_beam_info,
-	enum sounding_mode			mode,
-	u8					idx
-)
+	void *dm_void,
+	struct _RT_BEAMFORMING_INFO *beam_info,
+	enum sounding_mode mode,
+	u8 idx)
 {
-	enum channel_width				sounding_bw = CHANNEL_WIDTH_20;
-	struct _RT_BEAMFORMEE_ENTRY		beam_entry = p_beam_info->beamformee_entry[idx];
-	struct _RT_BEAMFORMING_OID_INFO	beam_oid_info = p_beam_info->beamforming_oid_info;
-	struct PHY_DM_STRUCT					*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
+	enum channel_width sounding_bw = CHANNEL_WIDTH_20;
+	struct _RT_BEAMFORMEE_ENTRY beam_entry = beam_info->beamformee_entry[idx];
+	struct _RT_BEAMFORMING_OID_INFO beam_oid_info = beam_info->beamforming_oid_info;
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
 
 	if (mode == SOUNDING_HW_HT_TIMER || mode == SOUNDING_HW_VHT_TIMER)
 		sounding_bw = beam_oid_info.sound_oid_bw;
 	else if (mode == SOUNDING_SW_HT_TIMER || mode == SOUNDING_SW_VHT_TIMER)
-		/*Modified by David*/
-		sounding_bw = beam_entry.sound_bw;		/*beam_oid_info.sound_oid_bw;*/
+		/*@Modified by David*/
+		sounding_bw = beam_entry.sound_bw; /*@beam_oid_info.sound_oid_bw;*/
 	else
 		sounding_bw = beam_entry.sound_bw;
 
-	PHYDM_DBG(p_dm, DBG_TXBF, ("%s, sounding_bw=0x%X\n", __func__, sounding_bw));
+	PHYDM_DBG(dm, DBG_TXBF, "%s, sounding_bw=0x%X\n", __func__,
+		  sounding_bw);
 
 	return sounding_bw;
 }
 
-
 boolean
 phydm_beamforming_select_beam_entry(
-	void				*p_dm_void,
-	struct _RT_BEAMFORMING_INFO	*p_beam_info
-)
+	void *dm_void,
+	struct _RT_BEAMFORMING_INFO *beam_info)
 {
-	struct _RT_SOUNDING_INFO		*p_sound_info = &(p_beam_info->sounding_info);
-	struct PHY_DM_STRUCT				*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
+	struct _RT_SOUNDING_INFO *sound_info = &beam_info->sounding_info;
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
 
-	/*p_entry.is_sound is different between first and latter NDPA, and should not be used as BFee entry selection*/
-	/*BTW, latter modification should sync to the selection mechanism of AP/ADSL instead of the fixed sound_idx.*/
-	p_sound_info->sound_idx = phydm_beamforming_sounding_idx(p_dm, p_beam_info);
-	/*p_sound_info->sound_idx = 0;*/
+	/*@entry.is_sound is different between first and latter NDPA, and should not be used as BFee entry selection*/
+	/*@BTW, latter modification should sync to the selection mechanism of AP/ADSL instead of the fixed sound_idx.*/
+	sound_info->sound_idx = phydm_beamforming_sounding_idx(dm, beam_info);
+	/*sound_info->sound_idx = 0;*/
 
-	if (p_sound_info->sound_idx < BEAMFORMEE_ENTRY_NUM)
-		p_sound_info->sound_mode = phydm_beamforming_sounding_mode(p_dm, p_beam_info, p_sound_info->sound_idx);
+	if (sound_info->sound_idx < BEAMFORMEE_ENTRY_NUM)
+		sound_info->sound_mode = phydm_beamforming_sounding_mode(dm, beam_info, sound_info->sound_idx);
 	else
-		p_sound_info->sound_mode = sounding_stop_all_timer;
+		sound_info->sound_mode = sounding_stop_all_timer;
 
-	if (sounding_stop_all_timer == p_sound_info->sound_mode) {
-		PHYDM_DBG(p_dm, DBG_TXBF, ("[%s] Return because of sounding_stop_all_timer\n", __func__));
+	if (sounding_stop_all_timer == sound_info->sound_mode) {
+		PHYDM_DBG(dm, DBG_TXBF,
+			  "[%s] Return because of sounding_stop_all_timer\n",
+			  __func__);
 		return false;
 	} else {
-		p_sound_info->sound_bw = phydm_beamforming_sounding_bw(p_dm, p_beam_info, p_sound_info->sound_mode, p_sound_info->sound_idx);
-		p_sound_info->sound_period = phydm_beamforming_sounding_time(p_dm, p_beam_info, p_sound_info->sound_mode, p_sound_info->sound_idx);
+		sound_info->sound_bw = phydm_beamforming_sounding_bw(dm, beam_info, sound_info->sound_mode, sound_info->sound_idx);
+		sound_info->sound_period = phydm_beamforming_sounding_time(dm, beam_info, sound_info->sound_mode, sound_info->sound_idx);
 		return true;
 	}
 }
@@ -826,181 +858,184 @@ phydm_beamforming_select_beam_entry(
 /*SU BFee Entry Only*/
 boolean
 phydm_beamforming_start_period(
-	void				*p_dm_void
-)
+	void *dm_void)
 {
-	struct PHY_DM_STRUCT					*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	boolean						ret = true;
-	struct _RT_BEAMFORMING_INFO		*p_beam_info = &p_dm->beamforming_info;
-	struct _RT_SOUNDING_INFO			*p_sound_info = &(p_beam_info->sounding_info);
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	boolean ret = true;
+	struct _RT_BEAMFORMING_INFO *beam_info = &dm->beamforming_info;
+	struct _RT_SOUNDING_INFO *sound_info = &beam_info->sounding_info;
 
-	phydm_beamforming_dym_ndpa_rate(p_dm);
+	phydm_beamforming_dym_ndpa_rate(dm);
 
-	phydm_beamforming_select_beam_entry(p_dm, p_beam_info);		/* Modified */
+	phydm_beamforming_select_beam_entry(dm, beam_info); /* @Modified */
 
-	if (p_sound_info->sound_mode == SOUNDING_SW_VHT_TIMER || p_sound_info->sound_mode == SOUNDING_SW_HT_TIMER)
-		odm_set_timer(p_dm, &p_beam_info->beamforming_timer, p_sound_info->sound_period);
-	else if (p_sound_info->sound_mode == SOUNDING_HW_VHT_TIMER || p_sound_info->sound_mode == SOUNDING_HW_HT_TIMER ||
-		p_sound_info->sound_mode == SOUNDING_AUTO_VHT_TIMER || p_sound_info->sound_mode == SOUNDING_AUTO_HT_TIMER) {
+	if (sound_info->sound_mode == SOUNDING_SW_VHT_TIMER || sound_info->sound_mode == SOUNDING_SW_HT_TIMER)
+		odm_set_timer(dm, &beam_info->beamforming_timer, sound_info->sound_period);
+	else if (sound_info->sound_mode == SOUNDING_HW_VHT_TIMER || sound_info->sound_mode == SOUNDING_HW_HT_TIMER ||
+		 sound_info->sound_mode == SOUNDING_AUTO_VHT_TIMER || sound_info->sound_mode == SOUNDING_AUTO_HT_TIMER) {
 		HAL_HW_TIMER_TYPE timer_type = HAL_TIMER_TXBF;
-		u32	val = (p_sound_info->sound_period | (timer_type << 16));
-
-		/* HW timer stop: All IC has the same setting */
-		phydm_set_hw_reg_handler_interface(p_dm, HW_VAR_HW_REG_TIMER_STOP, (u8 *)(&timer_type));
-		/* odm_write_1byte(p_dm, 0x15F, 0); */
-		/* HW timer init: All IC has the same setting, but 92E & 8812A only write 2 bytes */
-		phydm_set_hw_reg_handler_interface(p_dm, HW_VAR_HW_REG_TIMER_INIT, (u8 *)(&val));
-		/* odm_write_1byte(p_dm, 0x164, 1); */
-		/* odm_write_4byte(p_dm, 0x15C, val); */
-		/* HW timer start: All IC has the same setting */
-		phydm_set_hw_reg_handler_interface(p_dm, HW_VAR_HW_REG_TIMER_START, (u8 *)(&timer_type));
-		/* odm_write_1byte(p_dm, 0x15F, 0x5); */
-	} else if (p_sound_info->sound_mode == SOUNDING_FW_VHT_TIMER || p_sound_info->sound_mode == SOUNDING_FW_HT_TIMER)
-		ret = beamforming_start_fw(p_dm, p_sound_info->sound_idx);
+		u32 val = (sound_info->sound_period | (timer_type << 16));
+
+		/* @HW timer stop: All IC has the same setting */
+		phydm_set_hw_reg_handler_interface(dm, HW_VAR_HW_REG_TIMER_STOP, (u8 *)(&timer_type));
+		/* odm_write_1byte(dm, 0x15F, 0); */
+		/* @HW timer init: All IC has the same setting, but 92E & 8812A only write 2 bytes */
+		phydm_set_hw_reg_handler_interface(dm, HW_VAR_HW_REG_TIMER_INIT, (u8 *)(&val));
+		/* odm_write_1byte(dm, 0x164, 1); */
+		/* odm_write_4byte(dm, 0x15C, val); */
+		/* @HW timer start: All IC has the same setting */
+		phydm_set_hw_reg_handler_interface(dm, HW_VAR_HW_REG_TIMER_START, (u8 *)(&timer_type));
+		/* odm_write_1byte(dm, 0x15F, 0x5); */
+	} else if (sound_info->sound_mode == SOUNDING_FW_VHT_TIMER || sound_info->sound_mode == SOUNDING_FW_HT_TIMER)
+		ret = beamforming_start_fw(dm, sound_info->sound_idx);
 	else
 		ret = false;
 
-	PHYDM_DBG(p_dm, DBG_TXBF, ("[%s] sound_idx=%d, sound_mode=%d, sound_bw=%d, sound_period=%d\n", __func__,
-		p_sound_info->sound_idx, p_sound_info->sound_mode, p_sound_info->sound_bw, p_sound_info->sound_period));
+	PHYDM_DBG(dm, DBG_TXBF,
+		  "[%s] sound_idx=%d, sound_mode=%d, sound_bw=%d, sound_period=%d\n",
+		  __func__, sound_info->sound_idx, sound_info->sound_mode,
+		  sound_info->sound_bw, sound_info->sound_period);
 
 	return ret;
 }
 
 /* Used after beamforming_leave, and will clear the setting of the "already deleted" entry
  *SU BFee Entry Only*/
-void
-phydm_beamforming_end_period_sw(
-	void				*p_dm_void
-)
+void phydm_beamforming_end_period_sw(
+	void *dm_void)
 {
-	struct PHY_DM_STRUCT					*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	/*struct _ADAPTER					*adapter = p_dm->adapter;*/
-	struct _RT_BEAMFORMING_INFO		*p_beam_info = &p_dm->beamforming_info;
-	struct _RT_SOUNDING_INFO			*p_sound_info = &(p_beam_info->sounding_info);
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	/*void					*adapter = dm->adapter;*/
+	struct _RT_BEAMFORMING_INFO *beam_info = &dm->beamforming_info;
+	struct _RT_SOUNDING_INFO *sound_info = &beam_info->sounding_info;
 
 	HAL_HW_TIMER_TYPE timer_type = HAL_TIMER_TXBF;
 
-	PHYDM_DBG(p_dm, DBG_TXBF, ("%s Start!\n", __func__));
+	PHYDM_DBG(dm, DBG_TXBF, "%s Start!\n", __func__);
 
-	if (p_sound_info->sound_mode == SOUNDING_SW_VHT_TIMER || p_sound_info->sound_mode == SOUNDING_SW_HT_TIMER)
-		odm_cancel_timer(p_dm, &p_beam_info->beamforming_timer);
-	else if (p_sound_info->sound_mode == SOUNDING_HW_VHT_TIMER || p_sound_info->sound_mode == SOUNDING_HW_HT_TIMER ||
-		p_sound_info->sound_mode == SOUNDING_AUTO_VHT_TIMER || p_sound_info->sound_mode == SOUNDING_AUTO_HT_TIMER)
-		/*HW timer stop: All IC has the same setting*/
-		phydm_set_hw_reg_handler_interface(p_dm, HW_VAR_HW_REG_TIMER_STOP, (u8 *)(&timer_type));
-	/*odm_write_1byte(p_dm, 0x15F, 0);*/
+	if (sound_info->sound_mode == SOUNDING_SW_VHT_TIMER || sound_info->sound_mode == SOUNDING_SW_HT_TIMER)
+		odm_cancel_timer(dm, &beam_info->beamforming_timer);
+	else if (sound_info->sound_mode == SOUNDING_HW_VHT_TIMER || sound_info->sound_mode == SOUNDING_HW_HT_TIMER ||
+		 sound_info->sound_mode == SOUNDING_AUTO_VHT_TIMER || sound_info->sound_mode == SOUNDING_AUTO_HT_TIMER)
+		/*@HW timer stop: All IC has the same setting*/
+		phydm_set_hw_reg_handler_interface(dm, HW_VAR_HW_REG_TIMER_STOP, (u8 *)(&timer_type));
+	/*odm_write_1byte(dm, 0x15F, 0);*/
 }
 
-void
-phydm_beamforming_end_period_fw(
-	void				*p_dm_void
-)
+void phydm_beamforming_end_period_fw(
+	void *dm_void)
 {
-	struct PHY_DM_STRUCT			*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	u8				idx = 0;
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	u8 idx = 0;
 
-	hal_com_txbf_set(p_dm, TXBF_SET_SOUNDING_FW_NDPA, (u8 *)&idx);
-	PHYDM_DBG(p_dm, DBG_TXBF, ("[%s]\n", __func__));
+	hal_com_txbf_set(dm, TXBF_SET_SOUNDING_FW_NDPA, (u8 *)&idx);
+	PHYDM_DBG(dm, DBG_TXBF, "[%s]\n", __func__);
 }
 
-
 /*SU BFee Entry Only*/
-void
-phydm_beamforming_clear_entry_sw(
-	void			*p_dm_void,
-	boolean				is_delete,
-	u8				delete_idx
-)
+void phydm_beamforming_clear_entry_sw(
+	void *dm_void,
+	boolean is_delete,
+	u8 delete_idx)
 {
-	u8						idx = 0;
-	struct _RT_BEAMFORMEE_ENTRY		*p_beamform_entry = NULL;
-	struct PHY_DM_STRUCT					*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	struct _RT_BEAMFORMING_INFO		*p_beam_info = &p_dm->beamforming_info;
+	u8 idx = 0;
+	struct _RT_BEAMFORMEE_ENTRY *beamform_entry = NULL;
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct _RT_BEAMFORMING_INFO *beam_info = &dm->beamforming_info;
 
 	if (is_delete) {
 		if (delete_idx < BEAMFORMEE_ENTRY_NUM) {
-			p_beamform_entry = p_beam_info->beamformee_entry + delete_idx;
-			if (!((!p_beamform_entry->is_used) && p_beamform_entry->is_sound)) {
-				PHYDM_DBG(p_dm, DBG_TXBF, ("[%s] SW delete_idx is wrong!!!!!\n", __func__));
+			beamform_entry = beam_info->beamformee_entry + delete_idx;
+			if (!(!beamform_entry->is_used && beamform_entry->is_sound)) {
+				PHYDM_DBG(dm, DBG_TXBF,
+					  "[%s] SW delete_idx is wrong!!!!!\n",
+					  __func__);
 				return;
 			}
 		}
 
-		PHYDM_DBG(p_dm, DBG_TXBF, ("[%s] SW delete BFee entry %d\n", __func__, delete_idx));
-		if (p_beamform_entry->beamform_entry_state == BEAMFORMING_ENTRY_STATE_PROGRESSING) {
-			p_beamform_entry->is_beamforming_in_progress = false;
-			p_beamform_entry->beamform_entry_state = BEAMFORMING_ENTRY_STATE_UNINITIALIZE;
-		} else if (p_beamform_entry->beamform_entry_state == BEAMFORMING_ENTRY_STATE_PROGRESSED) {
-			p_beamform_entry->beamform_entry_state  = BEAMFORMING_ENTRY_STATE_UNINITIALIZE;
-			hal_com_txbf_set(p_dm, TXBF_SET_SOUNDING_STATUS, (u8 *)&delete_idx);
+		PHYDM_DBG(dm, DBG_TXBF, "[%s] SW delete BFee entry %d\n",
+			  __func__, delete_idx);
+		if (beamform_entry->beamform_entry_state == BEAMFORMING_ENTRY_STATE_PROGRESSING) {
+			beamform_entry->is_beamforming_in_progress = false;
+			beamform_entry->beamform_entry_state = BEAMFORMING_ENTRY_STATE_UNINITIALIZE;
+		} else if (beamform_entry->beamform_entry_state == BEAMFORMING_ENTRY_STATE_PROGRESSED) {
+			beamform_entry->beamform_entry_state = BEAMFORMING_ENTRY_STATE_UNINITIALIZE;
+			hal_com_txbf_set(dm, TXBF_SET_SOUNDING_STATUS, (u8 *)&delete_idx);
 		}
-		p_beamform_entry->is_sound = false;
-	} else {
-		for (idx = 0; idx < BEAMFORMEE_ENTRY_NUM; idx++) {
-			p_beamform_entry = p_beam_info->beamformee_entry + idx;
+		beamform_entry->is_sound = false;
+		return;
+	}
 
-			/*Used after is_sounding=RESET, and will clear the setting of "ever sounded" entry, which is not necessarily be deleted.*/
-			/*This function is mainly used in case "beam_oid_info.sound_oid_mode == sounding_stop_all_timer".*/
-			/*However, setting oid doesn't delete entries (is_used is still true), new entries may fail to be added in.*/
+	for (idx = 0; idx < BEAMFORMEE_ENTRY_NUM; idx++) {
+		beamform_entry = beam_info->beamformee_entry + idx;
 
-			if (p_beamform_entry->is_sound) {
-				PHYDM_DBG(p_dm, DBG_TXBF, ("[%s] SW reset BFee entry %d\n", __func__, idx));
-				/*
-				*	If End procedure is
-				*	1. Between (Send NDPA, C2H packet return), reset state to initialized.
-				*	After C2H packet return , status bit will be set to zero.
-				*
-				*	2. After C2H packet, then reset state to initialized and clear status bit.
-				*/
+		/*Used after is_sounding=RESET, and will clear the setting of "ever sounded" entry, which is not necessarily be deleted.*/
+		/*This function is mainly used in case "beam_oid_info.sound_oid_mode == sounding_stop_all_timer".*/
+		/*@However, setting oid doesn't delete entries (is_used is still true), new entries may fail to be added in.*/
 
-				if (p_beamform_entry->beamform_entry_state == BEAMFORMING_ENTRY_STATE_PROGRESSING)
-					phydm_beamforming_end_sw(p_dm, 0);
-				else if (p_beamform_entry->beamform_entry_state == BEAMFORMING_ENTRY_STATE_PROGRESSED) {
-					p_beamform_entry->beamform_entry_state  = BEAMFORMING_ENTRY_STATE_INITIALIZED;
-					hal_com_txbf_set(p_dm, TXBF_SET_SOUNDING_STATUS, (u8 *)&idx);
-				}
+		if (!beamform_entry->is_sound)
+			continue;
 
-				p_beamform_entry->is_sound = false;
-			}
+		PHYDM_DBG(dm, DBG_TXBF, "[%s] SW reset BFee entry %d\n",
+			  __func__, idx);
+		/*@
+		*	If End procedure is
+		*	1. Between (Send NDPA, C2H packet return), reset state to initialized.
+		*	After C2H packet return , status bit will be set to zero.
+		*
+		*	2. After C2H packet, then reset state to initialized and clear status bit.
+		*/
+
+		if (beamform_entry->beamform_entry_state == BEAMFORMING_ENTRY_STATE_PROGRESSING)
+			phydm_beamforming_end_sw(dm, 0);
+		else if (beamform_entry->beamform_entry_state == BEAMFORMING_ENTRY_STATE_PROGRESSED) {
+			beamform_entry->beamform_entry_state = BEAMFORMING_ENTRY_STATE_INITIALIZED;
+			hal_com_txbf_set(dm, TXBF_SET_SOUNDING_STATUS, (u8 *)&idx);
 		}
+
+		beamform_entry->is_sound = false;
 	}
 }
 
-void
-phydm_beamforming_clear_entry_fw(
-	void			*p_dm_void,
-	boolean				is_delete,
-	u8				delete_idx
-)
+void phydm_beamforming_clear_entry_fw(
+	void *dm_void,
+	boolean is_delete,
+	u8 delete_idx)
 {
-	u8						idx = 0;
-	struct _RT_BEAMFORMEE_ENTRY		*p_beamform_entry = NULL;
-	struct PHY_DM_STRUCT					*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	struct _RT_BEAMFORMING_INFO		*p_beam_info = &p_dm->beamforming_info;
+	u8 idx = 0;
+	struct _RT_BEAMFORMEE_ENTRY *beamform_entry = NULL;
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct _RT_BEAMFORMING_INFO *beam_info = &dm->beamforming_info;
 
 	if (is_delete) {
 		if (delete_idx < BEAMFORMEE_ENTRY_NUM) {
-			p_beamform_entry = p_beam_info->beamformee_entry + delete_idx;
+			beamform_entry = beam_info->beamformee_entry + delete_idx;
 
-			if (!((!p_beamform_entry->is_used) && p_beamform_entry->is_sound)) {
-				PHYDM_DBG(p_dm, DBG_TXBF, ("[%s] FW delete_idx is wrong!!!!!\n", __func__));
+			if (!(!beamform_entry->is_used && beamform_entry->is_sound)) {
+				PHYDM_DBG(dm, DBG_TXBF,
+					  "[%s] FW delete_idx is wrong!!!!!\n",
+					  __func__);
 				return;
 			}
 		}
-		PHYDM_DBG(p_dm, DBG_TXBF, ("%s: FW delete BFee entry %d\n", __func__, delete_idx));
-		p_beamform_entry->beamform_entry_state = BEAMFORMING_ENTRY_STATE_UNINITIALIZE;
-		p_beamform_entry->is_sound = false;
+		PHYDM_DBG(dm, DBG_TXBF, "%s: FW delete BFee entry %d\n",
+			  __func__, delete_idx);
+		beamform_entry->beamform_entry_state = BEAMFORMING_ENTRY_STATE_UNINITIALIZE;
+		beamform_entry->is_sound = false;
 	} else {
 		for (idx = 0; idx < BEAMFORMEE_ENTRY_NUM; idx++) {
-			p_beamform_entry = p_beam_info->beamformee_entry + idx;
+			beamform_entry = beam_info->beamformee_entry + idx;
 
 			/*Used after is_sounding=RESET, and will clear the setting of "ever sounded" entry, which is not necessarily be deleted.*/
 			/*This function is mainly used in case "beam_oid_info.sound_oid_mode == sounding_stop_all_timer".*/
-			/*However, setting oid doesn't delete entries (is_used is still true), new entries may fail to be added in.*/
+			/*@However, setting oid doesn't delete entries (is_used is still true), new entries may fail to be added in.*/
 
-			if (p_beamform_entry->is_sound) {
-				PHYDM_DBG(p_dm, DBG_TXBF, ("[%s]FW reset BFee entry %d\n", __func__, idx));
-				/*
+			if (beamform_entry->is_sound) {
+				PHYDM_DBG(dm, DBG_TXBF,
+					  "[%s]FW reset BFee entry %d\n",
+					  __func__, idx);
+				/*@
 				*	If End procedure is
 				*	1. Between (Send NDPA, C2H packet return), reset state to initialized.
 				*	After C2H packet return , status bit will be set to zero.
@@ -1008,88 +1043,97 @@ phydm_beamforming_clear_entry_fw(
 				*	2. After C2H packet, then reset state to initialized and clear status bit.
 				*/
 
-				p_beamform_entry->beamform_entry_state = BEAMFORMING_ENTRY_STATE_INITIALIZED;
-				p_beamform_entry->is_sound = false;
+				beamform_entry->beamform_entry_state = BEAMFORMING_ENTRY_STATE_INITIALIZED;
+				beamform_entry->is_sound = false;
 			}
 		}
 	}
 }
 
-/*
+/*@
 *	Called :
 *	1. Add and delete entry : beamforming_enter/beamforming_leave
 *	2. FW trigger :  Beamforming_SetTxBFen
 *	3. Set OID_RT_BEAMFORMING_PERIOD : beamforming_control_v2
 */
-void
-phydm_beamforming_notify(
-	void			*p_dm_void
-)
+void phydm_beamforming_notify(
+	void *dm_void)
 {
-	u8						idx = BEAMFORMEE_ENTRY_NUM;
-	enum beamforming_notify_state	is_sounding = BEAMFORMING_NOTIFY_NONE;
-	struct PHY_DM_STRUCT					*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	struct _RT_BEAMFORMING_INFO		*p_beam_info = &p_dm->beamforming_info;
-	struct _RT_SOUNDING_INFO			*p_sound_info = &(p_beam_info->sounding_info);
-
-	PHYDM_DBG(p_dm, DBG_TXBF, ("%s Start!\n", __func__));
+	u8 idx = BEAMFORMEE_ENTRY_NUM;
+	enum beamforming_notify_state is_sounding = BEAMFORMING_NOTIFY_NONE;
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct _RT_BEAMFORMING_INFO *beam_info = &dm->beamforming_info;
+	struct _RT_SOUNDING_INFO *sound_info = &beam_info->sounding_info;
 
-	is_sounding = phydm_beamfomring_is_sounding(p_dm, p_beam_info, &idx);
+	PHYDM_DBG(dm, DBG_TXBF, "%s Start!\n", __func__);
 
-	PHYDM_DBG(p_dm, DBG_TXBF, ("%s, Before notify, is_sounding=%d, idx=%d\n", __func__, is_sounding, idx));
-	PHYDM_DBG(p_dm, DBG_TXBF, ("%s: p_beam_info->beamformee_su_cnt = %d\n", __func__, p_beam_info->beamformee_su_cnt));
+	is_sounding = phydm_beamfomring_is_sounding(dm, beam_info, &idx);
 
+	PHYDM_DBG(dm, DBG_TXBF, "%s, Before notify, is_sounding=%d, idx=%d\n",
+		  __func__, is_sounding, idx);
+	PHYDM_DBG(dm, DBG_TXBF, "%s: beam_info->beamformee_su_cnt = %d\n",
+		  __func__, beam_info->beamformee_su_cnt);
 
 	switch (is_sounding) {
 	case BEAMFORMEE_NOTIFY_ADD_SU:
-		PHYDM_DBG(p_dm, DBG_TXBF, ("%s: BEAMFORMEE_NOTIFY_ADD_SU\n", __func__));
-		phydm_beamforming_start_period(p_dm);
+		PHYDM_DBG(dm, DBG_TXBF, "%s: BEAMFORMEE_NOTIFY_ADD_SU\n",
+			  __func__);
+		phydm_beamforming_start_period(dm);
 		break;
 
 	case BEAMFORMEE_NOTIFY_DELETE_SU:
-		PHYDM_DBG(p_dm, DBG_TXBF, ("%s: BEAMFORMEE_NOTIFY_DELETE_SU\n", __func__));
-		if (p_sound_info->sound_mode == SOUNDING_FW_HT_TIMER || p_sound_info->sound_mode == SOUNDING_FW_VHT_TIMER) {
-			phydm_beamforming_clear_entry_fw(p_dm, true, idx);
-			if (p_beam_info->beamformee_su_cnt == 0) { /* For 2->1 entry, we should not cancel SW timer */
-				phydm_beamforming_end_period_fw(p_dm);
-				PHYDM_DBG(p_dm, DBG_TXBF, ("%s: No BFee left\n", __func__));
+		PHYDM_DBG(dm, DBG_TXBF, "%s: BEAMFORMEE_NOTIFY_DELETE_SU\n",
+			  __func__);
+		if (sound_info->sound_mode == SOUNDING_FW_HT_TIMER || sound_info->sound_mode == SOUNDING_FW_VHT_TIMER) {
+			phydm_beamforming_clear_entry_fw(dm, true, idx);
+			if (beam_info->beamformee_su_cnt == 0) { /* @For 2->1 entry, we should not cancel SW timer */
+				phydm_beamforming_end_period_fw(dm);
+				PHYDM_DBG(dm, DBG_TXBF, "%s: No BFee left\n",
+					  __func__);
 			}
 		} else {
-			phydm_beamforming_clear_entry_sw(p_dm, true, idx);
-			if (p_beam_info->beamformee_su_cnt == 0) { /* For 2->1 entry, we should not cancel SW timer */
-				phydm_beamforming_end_period_sw(p_dm);
-				PHYDM_DBG(p_dm, DBG_TXBF, ("%s: No BFee left\n", __func__));
+			phydm_beamforming_clear_entry_sw(dm, true, idx);
+			if (beam_info->beamformee_su_cnt == 0) { /* @For 2->1 entry, we should not cancel SW timer */
+				phydm_beamforming_end_period_sw(dm);
+				PHYDM_DBG(dm, DBG_TXBF, "%s: No BFee left\n",
+					  __func__);
 			}
 		}
 		break;
 
 	case BEAMFORMEE_NOTIFY_ADD_MU:
-		PHYDM_DBG(p_dm, DBG_TXBF, ("%s: BEAMFORMEE_NOTIFY_ADD_MU\n", __func__));
-		if (p_beam_info->beamformee_mu_cnt == 2) {
-			/*if (p_sound_info->sound_mode == SOUNDING_SW_VHT_TIMER || p_sound_info->sound_mode == SOUNDING_SW_HT_TIMER)
-				odm_set_timer(p_dm, &p_beam_info->beamforming_timer, p_sound_info->sound_period);*/
-			odm_set_timer(p_dm, &p_beam_info->beamforming_timer, 1000); /*Do MU sounding every 1sec*/
+		PHYDM_DBG(dm, DBG_TXBF, "%s: BEAMFORMEE_NOTIFY_ADD_MU\n",
+			  __func__);
+		if (beam_info->beamformee_mu_cnt == 2) {
+			/*@if (sound_info->sound_mode == SOUNDING_SW_VHT_TIMER || sound_info->sound_mode == SOUNDING_SW_HT_TIMER)
+				odm_set_timer(dm, &beam_info->beamforming_timer, sound_info->sound_period);*/
+			odm_set_timer(dm, &beam_info->beamforming_timer, 1000); /*@Do MU sounding every 1sec*/
 		} else
-			PHYDM_DBG(p_dm, DBG_TXBF, ("%s: Less or larger than 2 MU STAs, not to set timer\n", __func__));
+			PHYDM_DBG(dm, DBG_TXBF,
+				  "%s: Less or larger than 2 MU STAs, not to set timer\n",
+				  __func__);
 		break;
 
 	case BEAMFORMEE_NOTIFY_DELETE_MU:
-		PHYDM_DBG(p_dm, DBG_TXBF, ("%s: BEAMFORMEE_NOTIFY_DELETE_MU\n", __func__));
-		if (p_beam_info->beamformee_mu_cnt == 1) {
-			/*if (p_sound_info->sound_mode == SOUNDING_SW_VHT_TIMER || p_sound_info->sound_mode == SOUNDING_SW_HT_TIMER)*/{
-				odm_cancel_timer(p_dm, &p_beam_info->beamforming_timer);
-				PHYDM_DBG(p_dm, DBG_TXBF, ("%s: Less than 2 MU STAs, stop sounding\n", __func__));
+		PHYDM_DBG(dm, DBG_TXBF, "%s: BEAMFORMEE_NOTIFY_DELETE_MU\n",
+			  __func__);
+		if (beam_info->beamformee_mu_cnt == 1) {
+			/*@if (sound_info->sound_mode == SOUNDING_SW_VHT_TIMER || sound_info->sound_mode == SOUNDING_SW_HT_TIMER)*/ {
+				odm_cancel_timer(dm, &beam_info->beamforming_timer);
+				PHYDM_DBG(dm, DBG_TXBF,
+					  "%s: Less than 2 MU STAs, stop sounding\n",
+					  __func__);
 			}
 		}
 		break;
 
 	case BEAMFORMING_NOTIFY_RESET:
-		if (p_sound_info->sound_mode == SOUNDING_FW_HT_TIMER || p_sound_info->sound_mode == SOUNDING_FW_VHT_TIMER) {
-			phydm_beamforming_clear_entry_fw(p_dm, false, idx);
-			phydm_beamforming_end_period_fw(p_dm);
+		if (sound_info->sound_mode == SOUNDING_FW_HT_TIMER || sound_info->sound_mode == SOUNDING_FW_VHT_TIMER) {
+			phydm_beamforming_clear_entry_fw(dm, false, idx);
+			phydm_beamforming_end_period_fw(dm);
 		} else {
-			phydm_beamforming_clear_entry_sw(p_dm, false, idx);
-			phydm_beamforming_end_period_sw(p_dm);
+			phydm_beamforming_clear_entry_sw(dm, false, idx);
+			phydm_beamforming_end_period_sw(dm);
 		}
 
 		break;
@@ -1097,606 +1141,637 @@ phydm_beamforming_notify(
 	default:
 		break;
 	}
-
 }
 
-
-
 boolean
-beamforming_init_entry(
-	void		*p_dm_void,
-	u16		sta_idx,
-	u8			*bfer_bfee_idx
-)
+beamforming_init_entry(void *dm_void, u16 sta_idx, u8 *bfer_bfee_idx,
+		       u8 *my_mac_addr)
 {
-	struct PHY_DM_STRUCT					*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	struct _RT_BEAMFORMEE_ENTRY		*p_beamform_entry = NULL;
-	struct _RT_BEAMFORMER_ENTRY		*p_beamformer_entry = NULL;
-	struct _RT_BEAMFORM_STAINFO		*p_sta = NULL;
-	enum beamforming_cap			beamform_cap = BEAMFORMING_CAP_NONE;
-	u8						bfer_idx = 0xF, bfee_idx = 0xF;
-	u8						num_of_sounding_dim = 0, comp_steering_num_of_bfer = 0;
-
-	p_sta = phydm_sta_info_init(p_dm, sta_idx);
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct cmn_sta_info *cmn_sta = dm->phydm_sta_info[sta_idx];
+	struct _RT_BEAMFORMEE_ENTRY *beamform_entry = NULL;
+	struct _RT_BEAMFORMER_ENTRY *beamformer_entry = NULL;
+	struct _RT_BEAMFORM_STAINFO *sta = NULL;
+	enum beamforming_cap beamform_cap = BEAMFORMING_CAP_NONE;
+	u8 bfer_idx = 0xF, bfee_idx = 0xF;
+	u8 num_of_sounding_dim = 0, comp_steering_num_of_bfer = 0;
+
+	if (!is_sta_active(cmn_sta)) {
+		PHYDM_DBG(dm, DBG_TXBF, "%s => sta_info(mac_id:%d) failed\n",
+			  __func__, sta_idx);
+		#if (DM_ODM_SUPPORT_TYPE == ODM_CE)
+		rtw_warn_on(1);
+		#endif
+		return false;
+	}
 
+	sta = phydm_sta_info_init(dm, sta_idx, my_mac_addr);
 	/*The current setting does not support Beaforming*/
-	if (BEAMFORMING_CAP_NONE == p_sta->ht_beamform_cap && BEAMFORMING_CAP_NONE == p_sta->vht_beamform_cap) {
-		PHYDM_DBG(p_dm, DBG_TXBF, ("The configuration disabled Beamforming! Skip...\n"));
+	if (BEAMFORMING_CAP_NONE == sta->ht_beamform_cap && BEAMFORMING_CAP_NONE == sta->vht_beamform_cap) {
+		PHYDM_DBG(dm, DBG_TXBF,
+			  "The configuration disabled Beamforming! Skip...\n");
 		return false;
 	}
 
-	if (p_sta->wireless_mode < WIRELESS_MODE_N_24G)
+	if (!(cmn_sta->support_wireless_set & (WIRELESS_VHT | WIRELESS_HT)))
 		return false;
 	else {
-		if (p_sta->wireless_mode & WIRELESS_MODE_N_5G || p_sta->wireless_mode & WIRELESS_MODE_N_24G) {/*HT*/
-			if (TEST_FLAG(p_sta->cur_beamform, BEAMFORMING_HT_BEAMFORMER_ENABLE)) {/*We are Beamformee because the STA is Beamformer*/
+		if (cmn_sta->support_wireless_set & WIRELESS_HT) { /*@HT*/
+			if (TEST_FLAG(sta->cur_beamform, BEAMFORMING_HT_BEAMFORMER_ENABLE)) { /*We are Beamformee because the STA is Beamformer*/
 				beamform_cap = (enum beamforming_cap)(beamform_cap | BEAMFORMEE_CAP_HT_EXPLICIT);
-				num_of_sounding_dim = (p_sta->cur_beamform & BEAMFORMING_HT_BEAMFORMEE_CHNL_EST_CAP) >> 6;
+				num_of_sounding_dim = (sta->cur_beamform & BEAMFORMING_HT_BEAMFORMEE_CHNL_EST_CAP) >> 6;
 			}
 			/*We are Beamformer because the STA is Beamformee*/
-			if (TEST_FLAG(p_sta->cur_beamform, BEAMFORMING_HT_BEAMFORMEE_ENABLE) ||
-			    TEST_FLAG(p_sta->ht_beamform_cap, BEAMFORMING_HT_BEAMFORMER_TEST)) {
+			if (TEST_FLAG(sta->cur_beamform, BEAMFORMING_HT_BEAMFORMEE_ENABLE) ||
+			    TEST_FLAG(sta->ht_beamform_cap, BEAMFORMING_HT_BEAMFORMER_TEST)) {
 				beamform_cap = (enum beamforming_cap)(beamform_cap | BEAMFORMER_CAP_HT_EXPLICIT);
-				comp_steering_num_of_bfer = (p_sta->cur_beamform & BEAMFORMING_HT_BEAMFORMER_STEER_NUM) >> 4;
+				comp_steering_num_of_bfer = (sta->cur_beamform & BEAMFORMING_HT_BEAMFORMER_STEER_NUM) >> 4;
 			}
-			PHYDM_DBG(p_dm, DBG_TXBF, ("[%s] HT cur_beamform=0x%X, beamform_cap=0x%X\n", __func__, p_sta->cur_beamform, beamform_cap));
-			PHYDM_DBG(p_dm, DBG_TXBF, ("[%s] HT num_of_sounding_dim=%d, comp_steering_num_of_bfer=%d\n", __func__, num_of_sounding_dim, comp_steering_num_of_bfer));
+			PHYDM_DBG(dm, DBG_TXBF,
+				  "[%s] HT cur_beamform=0x%X, beamform_cap=0x%X\n",
+				  __func__, sta->cur_beamform, beamform_cap);
+			PHYDM_DBG(dm, DBG_TXBF,
+				  "[%s] HT num_of_sounding_dim=%d, comp_steering_num_of_bfer=%d\n",
+				  __func__, num_of_sounding_dim,
+				  comp_steering_num_of_bfer);
 		}
 #if (ODM_IC_11AC_SERIES_SUPPORT == 1)
-		if (p_sta->wireless_mode & WIRELESS_MODE_AC_5G || p_sta->wireless_mode & WIRELESS_MODE_AC_24G) {	/*VHT*/
+		if (cmn_sta->support_wireless_set & WIRELESS_VHT) { /*VHT*/
 
 			/* We are Beamformee because the STA is SU Beamformer*/
-			if (TEST_FLAG(p_sta->cur_beamform_vht, BEAMFORMING_VHT_BEAMFORMER_ENABLE)) {
+			if (TEST_FLAG(sta->cur_beamform_vht, BEAMFORMING_VHT_BEAMFORMER_ENABLE)) {
 				beamform_cap = (enum beamforming_cap)(beamform_cap | BEAMFORMEE_CAP_VHT_SU);
-				num_of_sounding_dim = (p_sta->cur_beamform_vht & BEAMFORMING_VHT_BEAMFORMEE_SOUND_DIM) >> 12;
+				num_of_sounding_dim = (sta->cur_beamform_vht & BEAMFORMING_VHT_BEAMFORMEE_SOUND_DIM) >> 12;
 			}
 			/* We are Beamformer because the STA is SU Beamformee*/
-			if (TEST_FLAG(p_sta->cur_beamform_vht, BEAMFORMING_VHT_BEAMFORMEE_ENABLE) ||
-			    TEST_FLAG(p_sta->vht_beamform_cap, BEAMFORMING_VHT_BEAMFORMER_TEST)) {
+			if (TEST_FLAG(sta->cur_beamform_vht, BEAMFORMING_VHT_BEAMFORMEE_ENABLE) ||
+			    TEST_FLAG(sta->vht_beamform_cap, BEAMFORMING_VHT_BEAMFORMER_TEST)) {
 				beamform_cap = (enum beamforming_cap)(beamform_cap | BEAMFORMER_CAP_VHT_SU);
-				comp_steering_num_of_bfer = (p_sta->cur_beamform_vht & BEAMFORMING_VHT_BEAMFORMER_STS_CAP) >> 8;
+				comp_steering_num_of_bfer = (sta->cur_beamform_vht & BEAMFORMING_VHT_BEAMFORMER_STS_CAP) >> 8;
 			}
 			/* We are Beamformee because the STA is MU Beamformer*/
-			if (TEST_FLAG(p_sta->cur_beamform_vht, BEAMFORMING_VHT_MU_MIMO_AP_ENABLE)) {
+			if (TEST_FLAG(sta->cur_beamform_vht, BEAMFORMING_VHT_MU_MIMO_AP_ENABLE)) {
 				beamform_cap = (enum beamforming_cap)(beamform_cap | BEAMFORMEE_CAP_VHT_MU);
-				num_of_sounding_dim = (p_sta->cur_beamform_vht & BEAMFORMING_VHT_BEAMFORMEE_SOUND_DIM) >> 12;
+				num_of_sounding_dim = (sta->cur_beamform_vht & BEAMFORMING_VHT_BEAMFORMEE_SOUND_DIM) >> 12;
 			}
 			/* We are Beamformer because the STA is MU Beamformee*/
-			if (phydm_acting_determine(p_dm, phydm_acting_as_ap)) { /* Only AP mode supports to act an MU beamformer */
-				if (TEST_FLAG(p_sta->cur_beamform_vht, BEAMFORMING_VHT_MU_MIMO_STA_ENABLE) ||
-				    TEST_FLAG(p_sta->vht_beamform_cap, BEAMFORMING_VHT_BEAMFORMER_TEST)) {
+			if (phydm_acting_determine(dm, phydm_acting_as_ap)) { /* Only AP mode supports to act an MU beamformer */
+				if (TEST_FLAG(sta->cur_beamform_vht, BEAMFORMING_VHT_MU_MIMO_STA_ENABLE) ||
+				    TEST_FLAG(sta->vht_beamform_cap, BEAMFORMING_VHT_BEAMFORMER_TEST)) {
 					beamform_cap = (enum beamforming_cap)(beamform_cap | BEAMFORMER_CAP_VHT_MU);
-					comp_steering_num_of_bfer = (p_sta->cur_beamform_vht & BEAMFORMING_VHT_BEAMFORMER_STS_CAP) >> 8;
+					comp_steering_num_of_bfer = (sta->cur_beamform_vht & BEAMFORMING_VHT_BEAMFORMER_STS_CAP) >> 8;
 				}
 			}
-			PHYDM_DBG(p_dm, DBG_TXBF, ("[%s]VHT cur_beamform_vht=0x%X, beamform_cap=0x%X\n", __func__, p_sta->cur_beamform_vht, beamform_cap));
-			PHYDM_DBG(p_dm, DBG_TXBF, ("[%s]VHT num_of_sounding_dim=0x%X, comp_steering_num_of_bfer=0x%X\n", __func__, num_of_sounding_dim, comp_steering_num_of_bfer));
-
+			PHYDM_DBG(dm, DBG_TXBF,
+				  "[%s]VHT cur_beamform_vht=0x%X, beamform_cap=0x%X\n",
+				  __func__, sta->cur_beamform_vht,
+				  beamform_cap);
+			PHYDM_DBG(dm, DBG_TXBF,
+				  "[%s]VHT num_of_sounding_dim=0x%X, comp_steering_num_of_bfer=0x%X\n",
+				  __func__, num_of_sounding_dim,
+				  comp_steering_num_of_bfer);
 		}
 #endif
 	}
 
-
 	if (beamform_cap == BEAMFORMING_CAP_NONE)
 		return false;
 
-	PHYDM_DBG(p_dm, DBG_TXBF, ("[%s] Self BF Entry Cap = 0x%02X\n", __func__, beamform_cap));
+	PHYDM_DBG(dm, DBG_TXBF, "[%s] Self BF Entry Cap = 0x%02X\n", __func__,
+		  beamform_cap);
 
 	/*We are BFee, so the entry is BFer*/
 	if (beamform_cap & (BEAMFORMEE_CAP_VHT_MU | BEAMFORMEE_CAP_VHT_SU | BEAMFORMEE_CAP_HT_EXPLICIT)) {
-		p_beamformer_entry = phydm_beamforming_get_bfer_entry_by_addr(p_dm, p_sta->ra, &bfer_idx);
-
-		if (p_beamformer_entry == NULL) {
-			p_beamformer_entry = beamforming_add_bfer_entry(p_dm, p_sta, beamform_cap, num_of_sounding_dim, &bfer_idx);
-			if (p_beamformer_entry == NULL)
-				PHYDM_DBG(p_dm, DBG_TXBF, ("[%s]Not enough BFer entry!!!!!\n", __func__));
+		beamformer_entry = phydm_beamforming_get_bfer_entry_by_addr(dm, sta->ra, &bfer_idx);
+
+		if (beamformer_entry == NULL) {
+			beamformer_entry = beamforming_add_bfer_entry(dm, sta, beamform_cap, num_of_sounding_dim, &bfer_idx);
+			if (beamformer_entry == NULL)
+				PHYDM_DBG(dm, DBG_TXBF,
+					  "[%s]Not enough BFer entry!!!!!\n",
+					  __func__);
 		}
 	}
 
 	/*We are BFer, so the entry is BFee*/
 	if (beamform_cap & (BEAMFORMER_CAP_VHT_MU | BEAMFORMER_CAP_VHT_SU | BEAMFORMER_CAP_HT_EXPLICIT)) {
-		p_beamform_entry = phydm_beamforming_get_bfee_entry_by_addr(p_dm, p_sta->ra, &bfee_idx);
+		beamform_entry = phydm_beamforming_get_bfee_entry_by_addr(dm, sta->ra, &bfee_idx);
 
-		/*¦pªGBFeeIdx = 0xF «h¥Nªí¥Ø«eentry·í¤¤¨S¦³¬Û¦PªºMACID¦b¤º*/
-		PHYDM_DBG(p_dm, DBG_TXBF, ("[%s] Get BFee entry 0x%X by address\n", __func__, bfee_idx));
-		if (p_beamform_entry == NULL) {
-			p_beamform_entry = beamforming_add_bfee_entry(p_dm, p_sta, beamform_cap, num_of_sounding_dim, comp_steering_num_of_bfer, &bfee_idx);
-			PHYDM_DBG(p_dm, DBG_TXBF, ("[%s]: p_sta->AID=%d, p_sta->mac_id=%d\n", __func__, p_sta->aid, p_sta->mac_id));
+		/*@if BFeeIdx = 0xF, that represent for no matched MACID among all linked entrys */
+		PHYDM_DBG(dm, DBG_TXBF, "[%s] Get BFee entry 0x%X by address\n",
+			  __func__, bfee_idx);
+		if (beamform_entry == NULL) {
+			beamform_entry = beamforming_add_bfee_entry(dm, sta, beamform_cap, num_of_sounding_dim, comp_steering_num_of_bfer, &bfee_idx);
+			PHYDM_DBG(dm, DBG_TXBF,
+				  "[%s]: sta->AID=%d, sta->mac_id=%d\n",
+				  __func__, sta->aid, sta->mac_id);
 
-			PHYDM_DBG(p_dm, DBG_TXBF, ("[%s]: Add BFee entry %d\n", __func__, bfee_idx));
+			PHYDM_DBG(dm, DBG_TXBF, "[%s]: Add BFee entry %d\n",
+				  __func__, bfee_idx);
 
-			if (p_beamform_entry == NULL)
+			if (beamform_entry == NULL)
 				return false;
 			else
-				p_beamform_entry->beamform_entry_state = BEAMFORMING_ENTRY_STATE_INITIALIZEING;
+				beamform_entry->beamform_entry_state = BEAMFORMING_ENTRY_STATE_INITIALIZEING;
 		} else {
-			/*Entry has been created. If entry is initialing or progressing then errors occur.*/
-			if (p_beamform_entry->beamform_entry_state != BEAMFORMING_ENTRY_STATE_INITIALIZED &&
-			    p_beamform_entry->beamform_entry_state != BEAMFORMING_ENTRY_STATE_PROGRESSED)
+			/*@Entry has been created. If entry is initialing or progressing then errors occur.*/
+			if (beamform_entry->beamform_entry_state != BEAMFORMING_ENTRY_STATE_INITIALIZED &&
+			    beamform_entry->beamform_entry_state != BEAMFORMING_ENTRY_STATE_PROGRESSED)
 				return false;
 			else
-				p_beamform_entry->beamform_entry_state = BEAMFORMING_ENTRY_STATE_INITIALIZEING;
+				beamform_entry->beamform_entry_state = BEAMFORMING_ENTRY_STATE_INITIALIZEING;
 		}
-		p_beamform_entry->beamform_entry_state = BEAMFORMING_ENTRY_STATE_INITIALIZED;
-		phydm_sta_info_update(p_dm, sta_idx, p_beamform_entry);
+		beamform_entry->beamform_entry_state = BEAMFORMING_ENTRY_STATE_INITIALIZED;
+		phydm_sta_info_update(dm, sta_idx, beamform_entry);
 	}
 
 	*bfer_bfee_idx = (bfer_idx << 4) | bfee_idx;
-	PHYDM_DBG(p_dm, DBG_TXBF, ("[%s] End: bfer_idx=0x%X, bfee_idx=0x%X, bfer_bfee_idx=0x%X\n", __func__, bfer_idx, bfee_idx, *bfer_bfee_idx));
+	PHYDM_DBG(dm, DBG_TXBF,
+		  "[%s] End: bfer_idx=0x%X, bfee_idx=0x%X, bfer_bfee_idx=0x%X\n",
+		  __func__, bfer_idx, bfee_idx, *bfer_bfee_idx);
 
 	return true;
 }
 
-
-void
-beamforming_deinit_entry(
-	void		*p_dm_void,
-	u8			*RA
-)
+void beamforming_deinit_entry(
+	void *dm_void,
+	u8 *RA)
 {
-	struct PHY_DM_STRUCT			*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	u8				idx = 0;
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	u8 idx = 0;
 
-	struct _RT_BEAMFORMER_ENTRY	*p_bfer_entry = phydm_beamforming_get_bfer_entry_by_addr(p_dm, RA, &idx);
-	struct _RT_BEAMFORMEE_ENTRY	*p_bfee_entry = phydm_beamforming_get_bfee_entry_by_addr(p_dm, RA, &idx);
+	struct _RT_BEAMFORMER_ENTRY *bfer_entry = phydm_beamforming_get_bfer_entry_by_addr(dm, RA, &idx);
+	struct _RT_BEAMFORMEE_ENTRY *bfee_entry = phydm_beamforming_get_bfee_entry_by_addr(dm, RA, &idx);
 	boolean ret = false;
 
-	PHYDM_DBG(p_dm, DBG_TXBF, ("%s Start!\n",  __func__));
+	PHYDM_DBG(dm, DBG_TXBF, "%s Start!\n", __func__);
 
-	if (p_bfee_entry != NULL) {
-		PHYDM_DBG(p_dm, DBG_TXBF, ("%s, p_bfee_entry\n", __func__));
-		p_bfee_entry->is_used = false;
-		p_bfee_entry->beamform_entry_cap = BEAMFORMING_CAP_NONE;
-		p_bfee_entry->is_beamforming_in_progress = false;
-		if (p_bfee_entry->is_mu_sta) {
-			p_dm->beamforming_info.beamformee_mu_cnt -= 1;
-			p_dm->beamforming_info.first_mu_bfee_index = phydm_beamforming_get_first_mu_bfee_entry_idx(p_dm);
+	if (bfee_entry != NULL) {
+		PHYDM_DBG(dm, DBG_TXBF, "%s, bfee_entry\n", __func__);
+		bfee_entry->is_used = false;
+		bfee_entry->beamform_entry_cap = BEAMFORMING_CAP_NONE;
+		bfee_entry->is_beamforming_in_progress = false;
+		if (bfee_entry->is_mu_sta) {
+			dm->beamforming_info.beamformee_mu_cnt -= 1;
+			dm->beamforming_info.first_mu_bfee_index = phydm_beamforming_get_first_mu_bfee_entry_idx(dm);
 		} else
-			p_dm->beamforming_info.beamformee_su_cnt -= 1;
+			dm->beamforming_info.beamformee_su_cnt -= 1;
 		ret = true;
 	}
 
-	if (p_bfer_entry != NULL) {
-		PHYDM_DBG(p_dm, DBG_TXBF, ("%s, p_bfer_entry\n", __func__));
-		p_bfer_entry->is_used = false;
-		p_bfer_entry->beamform_entry_cap = BEAMFORMING_CAP_NONE;
-		if (p_bfer_entry->is_mu_ap)
-			p_dm->beamforming_info.beamformer_mu_cnt -= 1;
+	if (bfer_entry != NULL) {
+		PHYDM_DBG(dm, DBG_TXBF, "%s, bfer_entry\n", __func__);
+		bfer_entry->is_used = false;
+		bfer_entry->beamform_entry_cap = BEAMFORMING_CAP_NONE;
+		if (bfer_entry->is_mu_ap)
+			dm->beamforming_info.beamformer_mu_cnt -= 1;
 		else
-			p_dm->beamforming_info.beamformer_su_cnt -= 1;
+			dm->beamforming_info.beamformer_su_cnt -= 1;
 		ret = true;
 	}
 
 	if (ret == true)
-		hal_com_txbf_set(p_dm, TXBF_SET_SOUNDING_LEAVE, (u8 *)&idx);
+		hal_com_txbf_set(dm, TXBF_SET_SOUNDING_LEAVE, (u8 *)&idx);
 
-	PHYDM_DBG(p_dm, DBG_TXBF, ("%s End, idx = 0x%X\n", __func__, idx));
+	PHYDM_DBG(dm, DBG_TXBF, "%s End, idx = 0x%X\n", __func__, idx);
 }
 
-
 boolean
 beamforming_start_v1(
-	void		*p_dm_void,
-	u8			*RA,
-	boolean			mode,
-	enum channel_width	BW,
-	u8			rate
-)
+	void *dm_void,
+	u8 *RA,
+	boolean mode,
+	enum channel_width BW,
+	u8 rate)
 {
-	struct PHY_DM_STRUCT				*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	u8					idx = 0;
-	struct _RT_BEAMFORMEE_ENTRY	*p_entry;
-	boolean					ret = true;
-	struct _RT_BEAMFORMING_INFO	*p_beam_info = &(p_dm->beamforming_info);
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	u8 idx = 0;
+	struct _RT_BEAMFORMEE_ENTRY *entry;
+	boolean ret = true;
+	struct _RT_BEAMFORMING_INFO *beam_info = &dm->beamforming_info;
 
-	p_entry = phydm_beamforming_get_bfee_entry_by_addr(p_dm, RA, &idx);
+	entry = phydm_beamforming_get_bfee_entry_by_addr(dm, RA, &idx);
 
-	if (p_entry->is_used == false) {
-		p_entry->is_beamforming_in_progress = false;
+	if (entry->is_used == false) {
+		entry->is_beamforming_in_progress = false;
 		return false;
 	} else {
-		if (p_entry->is_beamforming_in_progress)
+		if (entry->is_beamforming_in_progress)
 			return false;
 
-		p_entry->is_beamforming_in_progress = true;
+		entry->is_beamforming_in_progress = true;
 
 		if (mode == 1) {
-			if (!(p_entry->beamform_entry_cap & BEAMFORMER_CAP_HT_EXPLICIT)) {
-				p_entry->is_beamforming_in_progress = false;
+			if (!(entry->beamform_entry_cap & BEAMFORMER_CAP_HT_EXPLICIT)) {
+				entry->is_beamforming_in_progress = false;
 				return false;
 			}
 		} else if (mode == 0) {
-			if (!(p_entry->beamform_entry_cap & BEAMFORMER_CAP_VHT_SU)) {
-				p_entry->is_beamforming_in_progress = false;
+			if (!(entry->beamform_entry_cap & BEAMFORMER_CAP_VHT_SU)) {
+				entry->is_beamforming_in_progress = false;
 				return false;
 			}
 		}
 
-		if (p_entry->beamform_entry_state != BEAMFORMING_ENTRY_STATE_INITIALIZED && p_entry->beamform_entry_state != BEAMFORMING_ENTRY_STATE_PROGRESSED) {
-			p_entry->is_beamforming_in_progress = false;
+		if (entry->beamform_entry_state != BEAMFORMING_ENTRY_STATE_INITIALIZED && entry->beamform_entry_state != BEAMFORMING_ENTRY_STATE_PROGRESSED) {
+			entry->is_beamforming_in_progress = false;
 			return false;
 		} else {
-			p_entry->beamform_entry_state = BEAMFORMING_ENTRY_STATE_PROGRESSING;
-			p_entry->is_sound = true;
+			entry->beamform_entry_state = BEAMFORMING_ENTRY_STATE_PROGRESSING;
+			entry->is_sound = true;
 		}
 	}
 
-	p_entry->sound_bw = BW;
-	p_beam_info->beamformee_cur_idx = idx;
-	phydm_beamforming_ndpa_rate(p_dm, BW, rate);
-	hal_com_txbf_set(p_dm, TXBF_SET_SOUNDING_STATUS, (u8 *)&idx);
+	entry->sound_bw = BW;
+	beam_info->beamformee_cur_idx = idx;
+	phydm_beamforming_ndpa_rate(dm, BW, rate);
+	hal_com_txbf_set(dm, TXBF_SET_SOUNDING_STATUS, (u8 *)&idx);
 
 	if (mode == 1)
-		ret = beamforming_send_ht_ndpa_packet(p_dm, RA, BW, NORMAL_QUEUE);
+		ret = beamforming_send_ht_ndpa_packet(dm, RA, BW, NORMAL_QUEUE);
 	else
-		ret = beamforming_send_vht_ndpa_packet(p_dm, RA, p_entry->aid, BW, NORMAL_QUEUE);
+		ret = beamforming_send_vht_ndpa_packet(dm, RA, entry->aid, BW, NORMAL_QUEUE);
 
 	if (ret == false) {
-		beamforming_leave(p_dm, RA);
-		p_entry->is_beamforming_in_progress = false;
+		beamforming_leave(dm, RA);
+		entry->is_beamforming_in_progress = false;
 		return false;
 	}
 
-	PHYDM_DBG(p_dm, DBG_TXBF, ("%s  idx %d\n", __func__, idx));
+	PHYDM_DBG(dm, DBG_TXBF, "%s  idx %d\n", __func__, idx);
 	return true;
 }
 
-
 boolean
 beamforming_start_sw(
-	void		*p_dm_void,
-	u8			idx,
-	u8			mode,
-	enum channel_width	BW
-)
+	void *dm_void,
+	u8 idx,
+	u8 mode,
+	enum channel_width BW)
 {
-	u8					*ra = NULL;
-	struct PHY_DM_STRUCT				*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	struct _RT_BEAMFORMEE_ENTRY	*p_entry;
-	boolean					ret = true;
-	struct _RT_BEAMFORMING_INFO	*p_beam_info = &(p_dm->beamforming_info);
+	u8 *ra = NULL;
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct _RT_BEAMFORMEE_ENTRY *entry;
+	boolean ret = true;
+	struct _RT_BEAMFORMING_INFO *beam_info = &dm->beamforming_info;
+#ifdef SUPPORT_MU_BF
+#if (SUPPORT_MU_BF == 1)
+	u8 i, poll_sta_cnt = 0;
+	boolean is_get_first_bfee = false;
+#endif
+#endif
 
-	if (p_beam_info->is_mu_sounding) {
-		p_beam_info->is_mu_sounding_in_progress = true;
-		p_entry = &(p_beam_info->beamformee_entry[idx]);
-		ra = p_entry->mac_addr;
+	if (beam_info->is_mu_sounding) {
+		beam_info->is_mu_sounding_in_progress = true;
+		entry = &beam_info->beamformee_entry[idx];
+		ra = entry->mac_addr;
 
 	} else {
-		p_entry = &(p_beam_info->beamformee_entry[idx]);
+		entry = &beam_info->beamformee_entry[idx];
 
-		if (p_entry->is_used == false) {
-			PHYDM_DBG(p_dm, DBG_TXBF, ("Skip Beamforming, no entry for idx =%d\n", idx));
-			p_entry->is_beamforming_in_progress = false;
+		if (entry->is_used == false) {
+			PHYDM_DBG(dm, DBG_TXBF,
+				  "Skip Beamforming, no entry for idx =%d\n",
+				  idx);
+			entry->is_beamforming_in_progress = false;
 			return false;
-		} else {
-			if (p_entry->is_beamforming_in_progress) {
-				PHYDM_DBG(p_dm, DBG_TXBF, ("is_beamforming_in_progress, skip...\n"));
-				return false;
-			}
+		}
 
-			p_entry->is_beamforming_in_progress = true;
-			ra = p_entry->mac_addr;
+		if (entry->is_beamforming_in_progress) {
+			PHYDM_DBG(dm, DBG_TXBF,
+				  "is_beamforming_in_progress, skip...\n");
+			return false;
+		}
 
-			if (mode == SOUNDING_SW_HT_TIMER || mode == SOUNDING_HW_HT_TIMER || mode == SOUNDING_AUTO_HT_TIMER) {
-				if (!(p_entry->beamform_entry_cap & BEAMFORMER_CAP_HT_EXPLICIT)) {
-					p_entry->is_beamforming_in_progress = false;
-					PHYDM_DBG(p_dm, DBG_TXBF, ("%s Return by not support BEAMFORMER_CAP_HT_EXPLICIT <==\n", __func__));
-					return false;
-				}
-			} else if (mode == SOUNDING_SW_VHT_TIMER || mode == SOUNDING_HW_VHT_TIMER || mode == SOUNDING_AUTO_VHT_TIMER) {
-				if (!(p_entry->beamform_entry_cap & BEAMFORMER_CAP_VHT_SU)) {
-					p_entry->is_beamforming_in_progress = false;
-					PHYDM_DBG(p_dm, DBG_TXBF, ("%s Return by not support BEAMFORMER_CAP_VHT_SU <==\n", __func__));
-					return false;
-				}
+		entry->is_beamforming_in_progress = true;
+		ra = entry->mac_addr;
+
+		if (mode == SOUNDING_SW_HT_TIMER || mode == SOUNDING_HW_HT_TIMER || mode == SOUNDING_AUTO_HT_TIMER) {
+			if (!(entry->beamform_entry_cap & BEAMFORMER_CAP_HT_EXPLICIT)) {
+				entry->is_beamforming_in_progress = false;
+				PHYDM_DBG(dm, DBG_TXBF,
+					  "%s Return by not support BEAMFORMER_CAP_HT_EXPLICIT <==\n",
+					  __func__);
+				return false;
 			}
-			if (p_entry->beamform_entry_state != BEAMFORMING_ENTRY_STATE_INITIALIZED && p_entry->beamform_entry_state != BEAMFORMING_ENTRY_STATE_PROGRESSED) {
-				p_entry->is_beamforming_in_progress = false;
-				PHYDM_DBG(p_dm, DBG_TXBF, ("%s Return by incorrect beamform_entry_state(%d) <==\n", __func__, p_entry->beamform_entry_state));
+		} else if (mode == SOUNDING_SW_VHT_TIMER || mode == SOUNDING_HW_VHT_TIMER || mode == SOUNDING_AUTO_VHT_TIMER) {
+			if (!(entry->beamform_entry_cap & BEAMFORMER_CAP_VHT_SU)) {
+				entry->is_beamforming_in_progress = false;
+				PHYDM_DBG(dm, DBG_TXBF,
+					  "%s Return by not support BEAMFORMER_CAP_VHT_SU <==\n",
+					  __func__);
 				return false;
-			} else {
-				p_entry->beamform_entry_state = BEAMFORMING_ENTRY_STATE_PROGRESSING;
-				p_entry->is_sound = true;
 			}
 		}
+		if (entry->beamform_entry_state != BEAMFORMING_ENTRY_STATE_INITIALIZED && entry->beamform_entry_state != BEAMFORMING_ENTRY_STATE_PROGRESSED) {
+			entry->is_beamforming_in_progress = false;
+			PHYDM_DBG(dm, DBG_TXBF,
+				  "%s Return by incorrect beamform_entry_state(%d) <==\n",
+				  __func__, entry->beamform_entry_state);
+			return false;
+		} else {
+			entry->beamform_entry_state = BEAMFORMING_ENTRY_STATE_PROGRESSING;
+			entry->is_sound = true;
+		}
 
-		p_beam_info->beamformee_cur_idx = idx;
+		beam_info->beamformee_cur_idx = idx;
 	}
 
-	/*2014.12.22 Luke: Need to be checked*/
-	/*GET_TXBF_INFO(adapter)->fTxbfSet(adapter, TXBF_SET_SOUNDING_STATUS, (u8*)&idx);*/
+	/*@2014.12.22 Luke: Need to be checked*/
+	/*@GET_TXBF_INFO(adapter)->fTxbfSet(adapter, TXBF_SET_SOUNDING_STATUS, (u8*)&idx);*/
 
 	if (mode == SOUNDING_SW_HT_TIMER || mode == SOUNDING_HW_HT_TIMER || mode == SOUNDING_AUTO_HT_TIMER)
-		ret = beamforming_send_ht_ndpa_packet(p_dm, ra, BW, NORMAL_QUEUE);
+		ret = beamforming_send_ht_ndpa_packet(dm, ra, BW, NORMAL_QUEUE);
 	else
-		ret = beamforming_send_vht_ndpa_packet(p_dm, ra, p_entry->aid, BW, NORMAL_QUEUE);
+		ret = beamforming_send_vht_ndpa_packet(dm, ra, entry->aid, BW, NORMAL_QUEUE);
 
 	if (ret == false) {
-		beamforming_leave(p_dm, ra);
-		p_entry->is_beamforming_in_progress = false;
+		beamforming_leave(dm, ra);
+		entry->is_beamforming_in_progress = false;
 		return false;
 	}
 
-
-	/*--------------------------
+/*@--------------------------
 	 * Send BF Report Poll for MU BF
 	--------------------------*/
 #ifdef SUPPORT_MU_BF
 #if (SUPPORT_MU_BF == 1)
-	{
-		u8				idx, poll_sta_cnt = 0;
-		boolean				is_get_first_bfee = false;
-
-		if (p_beam_info->beamformee_mu_cnt > 1) { /* More than 1 MU STA*/
-
-			for (idx = 0; idx < BEAMFORMEE_ENTRY_NUM; idx++) {
-				p_entry = &(p_beam_info->beamformee_entry[idx]);
-				if (p_entry->is_mu_sta) {
-					if (is_get_first_bfee) {
-						poll_sta_cnt++;
-						if (poll_sta_cnt == (p_beam_info->beamformee_mu_cnt - 1))/* The last STA*/
-							send_sw_vht_bf_report_poll(p_dm, p_entry->mac_addr, true);
-						else
-							send_sw_vht_bf_report_poll(p_dm, p_entry->mac_addr, false);
-					} else
-						is_get_first_bfee = true;
-				}
-			}
+	if (beam_info->beamformee_mu_cnt <= 1)
+		goto out;
+
+	/* @More than 1 MU STA*/
+	for (i = 0; i < BEAMFORMEE_ENTRY_NUM; i++) {
+		entry = &beam_info->beamformee_entry[i];
+		if (!entry->is_mu_sta)
+			continue;
+
+		if (!is_get_first_bfee) {
+			is_get_first_bfee = true;
+			continue;
 		}
+
+		poll_sta_cnt++;
+		if (poll_sta_cnt == (beam_info->beamformee_mu_cnt - 1)) /* The last STA*/
+			send_sw_vht_bf_report_poll(dm, entry->mac_addr, true);
+		else
+			send_sw_vht_bf_report_poll(dm, entry->mac_addr, false);
 	}
+out:
 #endif
 #endif
 	return true;
 }
 
-
 boolean
 beamforming_start_fw(
-	void		*p_dm_void,
-	u8			idx
-)
+	void *dm_void,
+	u8 idx)
 {
-	struct PHY_DM_STRUCT				*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	struct _RT_BEAMFORMEE_ENTRY	*p_entry;
-	struct _RT_BEAMFORMING_INFO	*p_beam_info = &(p_dm->beamforming_info);
-
-	p_entry = &(p_beam_info->beamformee_entry[idx]);
-	if (p_entry->is_used == false) {
-		PHYDM_DBG(p_dm, DBG_TXBF, ("Skip Beamforming, no entry for idx =%d\n", idx));
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct _RT_BEAMFORMEE_ENTRY *entry;
+	struct _RT_BEAMFORMING_INFO *beam_info = &dm->beamforming_info;
+
+	entry = &beam_info->beamformee_entry[idx];
+	if (entry->is_used == false) {
+		PHYDM_DBG(dm, DBG_TXBF,
+			  "Skip Beamforming, no entry for idx =%d\n", idx);
 		return false;
 	}
 
-	p_entry->beamform_entry_state = BEAMFORMING_ENTRY_STATE_PROGRESSING;
-	p_entry->is_sound = true;
-	hal_com_txbf_set(p_dm, TXBF_SET_SOUNDING_FW_NDPA, (u8 *)&idx);
+	entry->beamform_entry_state = BEAMFORMING_ENTRY_STATE_PROGRESSING;
+	entry->is_sound = true;
+	hal_com_txbf_set(dm, TXBF_SET_SOUNDING_FW_NDPA, (u8 *)&idx);
 
-	PHYDM_DBG(p_dm, DBG_TXBF, ("[%s] End, idx=0x%X\n", __func__, idx));
+	PHYDM_DBG(dm, DBG_TXBF, "[%s] End, idx=0x%X\n", __func__, idx);
 	return true;
 }
 
-void
-beamforming_check_sounding_success(
-	void			*p_dm_void,
-	boolean			status
-)
+void beamforming_check_sounding_success(
+	void *dm_void,
+	boolean status)
 {
-	struct PHY_DM_STRUCT				*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	struct _RT_BEAMFORMING_INFO	*p_beam_info = &(p_dm->beamforming_info);
-	struct _RT_BEAMFORMEE_ENTRY	*p_entry = &(p_beam_info->beamformee_entry[p_beam_info->beamformee_cur_idx]);
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct _RT_BEAMFORMING_INFO *beam_info = &dm->beamforming_info;
+	struct _RT_BEAMFORMEE_ENTRY *entry = &beam_info->beamformee_entry[beam_info->beamformee_cur_idx];
 
-	PHYDM_DBG(p_dm, DBG_TXBF, ("[David]@%s Start!\n", __func__));
+	PHYDM_DBG(dm, DBG_TXBF, "[David]@%s Start!\n", __func__);
 
 	if (status == 1) {
-		if (p_entry->log_status_fail_cnt == 21)
-			beamforming_dym_period(p_dm, status);
-		p_entry->log_status_fail_cnt = 0;
-	} else if (p_entry->log_status_fail_cnt <= 20) {
-		p_entry->log_status_fail_cnt++;
-		PHYDM_DBG(p_dm, DBG_TXBF, ("%s log_status_fail_cnt %d\n", __func__, p_entry->log_status_fail_cnt));
+		if (entry->log_status_fail_cnt == 21)
+			beamforming_dym_period(dm, status);
+		entry->log_status_fail_cnt = 0;
+	} else if (entry->log_status_fail_cnt <= 20) {
+		entry->log_status_fail_cnt++;
+		PHYDM_DBG(dm, DBG_TXBF, "%s log_status_fail_cnt %d\n", __func__,
+			  entry->log_status_fail_cnt);
 	}
-	if (p_entry->log_status_fail_cnt > 20) {
-		p_entry->log_status_fail_cnt = 21;
-		PHYDM_DBG(p_dm, DBG_TXBF, ("%s log_status_fail_cnt > 20, Stop SOUNDING\n", __func__));
-		beamforming_dym_period(p_dm, status);
+	if (entry->log_status_fail_cnt > 20) {
+		entry->log_status_fail_cnt = 21;
+		PHYDM_DBG(dm, DBG_TXBF,
+			  "%s log_status_fail_cnt > 20, Stop SOUNDING\n",
+			  __func__);
+		beamforming_dym_period(dm, status);
 	}
 }
 
-void
-phydm_beamforming_end_sw(
-	void		*p_dm_void,
-	boolean			status
-)
+void phydm_beamforming_end_sw(
+	void *dm_void,
+	boolean status)
 {
-	struct PHY_DM_STRUCT				*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	struct _RT_BEAMFORMING_INFO	*p_beam_info = &p_dm->beamforming_info;
-	struct _RT_BEAMFORMEE_ENTRY	*p_entry = &(p_beam_info->beamformee_entry[p_beam_info->beamformee_cur_idx]);
-
-	if (p_beam_info->is_mu_sounding) {
-		PHYDM_DBG(p_dm, DBG_TXBF, ("%s: MU sounding done\n", __func__));
-		p_beam_info->is_mu_sounding_in_progress = false;
-		hal_com_txbf_set(p_dm, TXBF_SET_SOUNDING_STATUS, (u8 *)&(p_beam_info->beamformee_cur_idx));
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct _RT_BEAMFORMING_INFO *beam_info = &dm->beamforming_info;
+	struct _RT_BEAMFORMEE_ENTRY *entry = &beam_info->beamformee_entry[beam_info->beamformee_cur_idx];
+
+	if (beam_info->is_mu_sounding) {
+		PHYDM_DBG(dm, DBG_TXBF, "%s: MU sounding done\n", __func__);
+		beam_info->is_mu_sounding_in_progress = false;
+		hal_com_txbf_set(dm, TXBF_SET_SOUNDING_STATUS,
+				 (u8 *)&beam_info->beamformee_cur_idx);
 	} else {
-		if (p_entry->beamform_entry_state != BEAMFORMING_ENTRY_STATE_PROGRESSING) {
-			PHYDM_DBG(p_dm, DBG_TXBF, ("[%s] BeamformStatus %d\n", __func__, p_entry->beamform_entry_state));
+		if (entry->beamform_entry_state != BEAMFORMING_ENTRY_STATE_PROGRESSING) {
+			PHYDM_DBG(dm, DBG_TXBF, "[%s] BeamformStatus %d\n",
+				  __func__, entry->beamform_entry_state);
 			return;
 		}
 
-		if ((p_beam_info->tx_bf_data_rate >= ODM_RATEVHTSS3MCS7) && (p_beam_info->tx_bf_data_rate <= ODM_RATEVHTSS3MCS9) && (p_beam_info->snding3ss == false)) {
-			PHYDM_DBG(p_dm, DBG_TXBF, ("[%s] VHT3SS 7,8,9, do not apply V matrix.\n", __func__));
-			p_entry->beamform_entry_state = BEAMFORMING_ENTRY_STATE_INITIALIZED;
-			hal_com_txbf_set(p_dm, TXBF_SET_SOUNDING_STATUS, (u8 *)&(p_beam_info->beamformee_cur_idx));
+		if (beam_info->tx_bf_data_rate >= ODM_RATEVHTSS3MCS7 && beam_info->tx_bf_data_rate <= ODM_RATEVHTSS3MCS9 && !beam_info->snding3ss) {
+			PHYDM_DBG(dm, DBG_TXBF,
+				  "[%s] VHT3SS 7,8,9, do not apply V matrix.\n",
+				  __func__);
+			entry->beamform_entry_state = BEAMFORMING_ENTRY_STATE_INITIALIZED;
+			hal_com_txbf_set(dm, TXBF_SET_SOUNDING_STATUS,
+					 (u8 *)&beam_info->beamformee_cur_idx);
 		} else if (status == 1) {
-			p_entry->log_status_fail_cnt = 0;
-			p_entry->beamform_entry_state = BEAMFORMING_ENTRY_STATE_PROGRESSED;
-			hal_com_txbf_set(p_dm, TXBF_SET_SOUNDING_STATUS, (u8 *)&(p_beam_info->beamformee_cur_idx));
+			entry->log_status_fail_cnt = 0;
+			entry->beamform_entry_state = BEAMFORMING_ENTRY_STATE_PROGRESSED;
+			hal_com_txbf_set(dm, TXBF_SET_SOUNDING_STATUS,
+					 (u8 *)&beam_info->beamformee_cur_idx);
 		} else {
-			p_entry->log_status_fail_cnt++;
-			p_entry->beamform_entry_state = BEAMFORMING_ENTRY_STATE_INITIALIZED;
-			hal_com_txbf_set(p_dm, TXBF_SET_TX_PATH_RESET, (u8 *)&(p_beam_info->beamformee_cur_idx));
-			PHYDM_DBG(p_dm, DBG_TXBF, ("[%s] log_status_fail_cnt %d\n", __func__, p_entry->log_status_fail_cnt));
+			entry->log_status_fail_cnt++;
+			entry->beamform_entry_state = BEAMFORMING_ENTRY_STATE_INITIALIZED;
+			hal_com_txbf_set(dm, TXBF_SET_TX_PATH_RESET,
+					 (u8 *)&beam_info->beamformee_cur_idx);
+			PHYDM_DBG(dm, DBG_TXBF, "[%s] log_status_fail_cnt %d\n",
+				  __func__, entry->log_status_fail_cnt);
 		}
 
-		if (p_entry->log_status_fail_cnt > 50) {
-			PHYDM_DBG(p_dm, DBG_TXBF, ("%s log_status_fail_cnt > 50, Stop SOUNDING\n", __func__));
-			p_entry->is_sound = false;
-			beamforming_deinit_entry(p_dm, p_entry->mac_addr);
+		if (entry->log_status_fail_cnt > 50) {
+			PHYDM_DBG(dm, DBG_TXBF,
+				  "%s log_status_fail_cnt > 50, Stop SOUNDING\n",
+				  __func__);
+			entry->is_sound = false;
+			beamforming_deinit_entry(dm, entry->mac_addr);
 
-			/*Modified by David - Every action of deleting entry should follow by Notify*/
-			phydm_beamforming_notify(p_dm);
+			/*@Modified by David - Every action of deleting entry should follow by Notify*/
+			phydm_beamforming_notify(dm);
 		}
 
-		p_entry->is_beamforming_in_progress = false;
+		entry->is_beamforming_in_progress = false;
 	}
-	PHYDM_DBG(p_dm, DBG_TXBF, ("%s: status=%d\n", __func__, status));
+	PHYDM_DBG(dm, DBG_TXBF, "%s: status=%d\n", __func__, status);
 }
 
-
-void
-beamforming_timer_callback(
+void beamforming_timer_callback(
 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
-	void			*p_dm_void
+	void *dm_void
 #elif (DM_ODM_SUPPORT_TYPE == ODM_CE)
-	void            *p_context
+	void *context
 #endif
-)
+	)
 {
 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
-	struct PHY_DM_STRUCT					*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
 #elif (DM_ODM_SUPPORT_TYPE == ODM_CE)
-	struct _ADAPTER					*adapter = (struct _ADAPTER *)p_context;
-	PHAL_DATA_TYPE				p_hal_data = GET_HAL_DATA(adapter);
-	struct PHY_DM_STRUCT					*p_dm = &p_hal_data->odmpriv;
+	void *adapter = (void *)context;
+	PHAL_DATA_TYPE hal_data = GET_HAL_DATA(((PADAPTER)adapter));
+	struct dm_struct *dm = &hal_data->odmpriv;
 #endif
-	boolean						ret = false;
-	struct _RT_BEAMFORMING_INFO		*p_beam_info = &(p_dm->beamforming_info);
-	struct _RT_BEAMFORMEE_ENTRY		*p_entry = &(p_beam_info->beamformee_entry[p_beam_info->beamformee_cur_idx]);
-	struct _RT_SOUNDING_INFO			*p_sound_info = &(p_beam_info->sounding_info);
-	boolean					is_beamforming_in_progress;
+	boolean ret = false;
+	struct _RT_BEAMFORMING_INFO *beam_info = &(dm->beamforming_info);
+	struct _RT_BEAMFORMEE_ENTRY *entry = &(beam_info->beamformee_entry[beam_info->beamformee_cur_idx]);
+	struct _RT_SOUNDING_INFO *sound_info = &(beam_info->sounding_info);
+	boolean is_beamforming_in_progress;
 
-	PHYDM_DBG(p_dm, DBG_TXBF, ("%s Start!\n", __func__));
+	PHYDM_DBG(dm, DBG_TXBF, "%s Start!\n", __func__);
 
-	if (p_beam_info->is_mu_sounding)
-		is_beamforming_in_progress = p_beam_info->is_mu_sounding_in_progress;
+	if (beam_info->is_mu_sounding)
+		is_beamforming_in_progress = beam_info->is_mu_sounding_in_progress;
 	else
-		is_beamforming_in_progress = p_entry->is_beamforming_in_progress;
+		is_beamforming_in_progress = entry->is_beamforming_in_progress;
 
 	if (is_beamforming_in_progress) {
-		PHYDM_DBG(p_dm, DBG_TXBF, ("is_beamforming_in_progress, reset it\n"));
-		phydm_beamforming_end_sw(p_dm, 0);
+		PHYDM_DBG(dm, DBG_TXBF,
+			  "is_beamforming_in_progress, reset it\n");
+		phydm_beamforming_end_sw(dm, 0);
 	}
 
-	ret = phydm_beamforming_select_beam_entry(p_dm, p_beam_info);
+	ret = phydm_beamforming_select_beam_entry(dm, beam_info);
 #if (SUPPORT_MU_BF == 1)
-	if (ret && p_beam_info->beamformee_mu_cnt > 1)
+	if (ret && beam_info->beamformee_mu_cnt > 1)
 		ret = 1;
 	else
 		ret = 0;
 #endif
 	if (ret)
-		ret = beamforming_start_sw(p_dm, p_sound_info->sound_idx, p_sound_info->sound_mode, p_sound_info->sound_bw);
+		ret = beamforming_start_sw(dm, sound_info->sound_idx, sound_info->sound_mode, sound_info->sound_bw);
 	else
-		PHYDM_DBG(p_dm, DBG_TXBF, ("%s, Error value return from BeamformingStart_V2\n", __func__));
+		PHYDM_DBG(dm, DBG_TXBF,
+			  "%s, Error value return from BeamformingStart_V2\n",
+			  __func__);
 
-	if ((p_beam_info->beamformee_su_cnt != 0) || (p_beam_info->beamformee_mu_cnt > 1)) {
-		if (p_sound_info->sound_mode == SOUNDING_SW_VHT_TIMER || p_sound_info->sound_mode == SOUNDING_SW_HT_TIMER)
-			odm_set_timer(p_dm, &p_beam_info->beamforming_timer, p_sound_info->sound_period);
+	if (beam_info->beamformee_su_cnt != 0 || beam_info->beamformee_mu_cnt > 1) {
+		if (sound_info->sound_mode == SOUNDING_SW_VHT_TIMER || sound_info->sound_mode == SOUNDING_SW_HT_TIMER)
+			odm_set_timer(dm, &beam_info->beamforming_timer, sound_info->sound_period);
 		else {
-			u32	val = (p_sound_info->sound_period << 16) | HAL_TIMER_TXBF;
-			phydm_set_hw_reg_handler_interface(p_dm, HW_VAR_HW_REG_TIMER_RESTART, (u8 *)(&val));
+			u32 val = (sound_info->sound_period << 16) | HAL_TIMER_TXBF;
+			phydm_set_hw_reg_handler_interface(dm, HW_VAR_HW_REG_TIMER_RESTART, (u8 *)(&val));
 		}
 	}
 }
 
-
-void
-beamforming_sw_timer_callback(
+void beamforming_sw_timer_callback(
 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
-	struct timer_list		*p_timer
+	struct phydm_timer_list *timer
 #elif (DM_ODM_SUPPORT_TYPE == ODM_CE)
 	void *function_context
 #endif
-)
+	)
 {
 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
-	struct _ADAPTER		*adapter = (struct _ADAPTER *)p_timer->Adapter;
-	HAL_DATA_TYPE	*p_hal_data = GET_HAL_DATA(adapter);
-	struct PHY_DM_STRUCT		*p_dm = &p_hal_data->DM_OutSrc;
+	void *adapter = (void *)timer->Adapter;
+	HAL_DATA_TYPE *hal_data = GET_HAL_DATA(((PADAPTER)adapter));
+	struct dm_struct *dm = &hal_data->DM_OutSrc;
 
-	PHYDM_DBG(p_dm, DBG_TXBF, ("[%s] Start!\n", __func__));
-	beamforming_timer_callback(p_dm);
+	PHYDM_DBG(dm, DBG_TXBF, "[%s] Start!\n", __func__);
+	beamforming_timer_callback(dm);
 #elif (DM_ODM_SUPPORT_TYPE == ODM_CE)
-	struct PHY_DM_STRUCT	*p_dm = (struct PHY_DM_STRUCT *)function_context;
-	struct _ADAPTER	*adapter = p_dm->adapter;
+	struct dm_struct *dm = (struct dm_struct *)function_context;
+	void *adapter = dm->adapter;
 
-	if (adapter->net_closed == true)
+	if (*dm->is_net_closed == true)
 		return;
-	rtw_run_in_thread_cmd(adapter, beamforming_timer_callback, adapter);
+	phydm_run_in_thread_cmd(dm, beamforming_timer_callback, adapter);
 #endif
-
 }
 
-
-void
-phydm_beamforming_init(
-	void			*p_dm_void
-)
+void phydm_beamforming_init(
+	void *dm_void)
 {
-	struct PHY_DM_STRUCT					*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	struct _RT_BEAMFORMING_INFO		*p_beam_info = &p_dm->beamforming_info;
-	struct _RT_BEAMFORMING_OID_INFO	*p_beam_oid_info = &(p_beam_info->beamforming_oid_info);
-	#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
-	struct _ADAPTER		*adapter = p_dm->adapter;
-	HAL_DATA_TYPE	*p_hal_data = GET_HAL_DATA(adapter);
-	
-	#ifdef BEAMFORMING_VERSION_1
-	if (p_hal_data->beamforming_version != BEAMFORMING_VERSION_1) {
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct _RT_BEAMFORMING_INFO *beam_info = &dm->beamforming_info;
+	struct _RT_BEAMFORMING_OID_INFO *beam_oid_info = &beam_info->beamforming_oid_info;
+#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
+	void *adapter = dm->adapter;
+	HAL_DATA_TYPE *hal_data = GET_HAL_DATA(((PADAPTER)adapter));
+
+#ifdef BEAMFORMING_VERSION_1
+	if (hal_data->beamforming_version != BEAMFORMING_VERSION_1) {
 		return;
 	}
-	#endif
-	#endif
-
-	p_beam_oid_info->sound_oid_mode = SOUNDING_STOP_OID_TIMER;
-	PHYDM_DBG(p_dm, DBG_TXBF, ("%s mode (%d)\n", __func__, p_beam_oid_info->sound_oid_mode));
+#endif
+#endif
 
-	p_beam_info->beamformee_su_cnt = 0;
-	p_beam_info->beamformer_su_cnt = 0;
-	p_beam_info->beamformee_mu_cnt = 0;
-	p_beam_info->beamformer_mu_cnt = 0;
-	p_beam_info->beamformee_mu_reg_maping = 0;
-	p_beam_info->mu_ap_index = 0;
-	p_beam_info->is_mu_sounding = false;
-	p_beam_info->first_mu_bfee_index = 0xFF;
-	p_beam_info->apply_v_matrix = true;
-	p_beam_info->snding3ss = false;
+	beam_oid_info->sound_oid_mode = SOUNDING_STOP_OID_TIMER;
+	PHYDM_DBG(dm, DBG_TXBF, "%s mode (%d)\n", __func__,
+		  beam_oid_info->sound_oid_mode);
+
+	beam_info->beamformee_su_cnt = 0;
+	beam_info->beamformer_su_cnt = 0;
+	beam_info->beamformee_mu_cnt = 0;
+	beam_info->beamformer_mu_cnt = 0;
+	beam_info->beamformee_mu_reg_maping = 0;
+	beam_info->mu_ap_index = 0;
+	beam_info->is_mu_sounding = false;
+	beam_info->first_mu_bfee_index = 0xFF;
+	beam_info->apply_v_matrix = true;
+	beam_info->snding3ss = false;
 
 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
-	p_beam_info->source_adapter = p_dm->adapter;
+	beam_info->source_adapter = dm->adapter;
 #endif
-	hal_com_txbf_beamform_init(p_dm);
+	hal_com_txbf_beamform_init(dm);
 }
 
-
 boolean
 phydm_acting_determine(
-	void			*p_dm_void,
-	enum phydm_acting_type	type
-)
+	void *dm_void,
+	enum phydm_acting_type type)
 {
-	struct PHY_DM_STRUCT	*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	boolean		ret = false;
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	boolean ret = false;
 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
-	struct _ADAPTER	*adapter = p_dm->beamforming_info.source_adapter;
+	void *adapter = dm->beamforming_info.source_adapter;
 #else
-	struct _ADAPTER	*adapter = p_dm->adapter;
+	struct _ADAPTER *adapter = dm->adapter;
 #endif
 
 #if (DM_ODM_SUPPORT_TYPE & ODM_WIN)
 	if (type == phydm_acting_as_ap)
 		ret = ACTING_AS_AP(adapter);
 	else if (type == phydm_acting_as_ibss)
-		ret = ACTING_AS_IBSS(adapter);
+		ret = ACTING_AS_IBSS(((PADAPTER)(adapter)));
 #elif (DM_ODM_SUPPORT_TYPE & ODM_CE)
-	struct mlme_priv			*pmlmepriv = &(adapter->mlmepriv);
+	struct mlme_priv *pmlmepriv = &adapter->mlmepriv;
 
 	if (type == phydm_acting_as_ap)
 		ret = check_fwstate(pmlmepriv, WIFI_AP_STATE);
@@ -1705,101 +1780,97 @@ phydm_acting_determine(
 #endif
 
 	return ret;
-
 }
 
-void
-beamforming_enter(
-	void			*p_dm_void,
-	u16		sta_idx
-)
+void beamforming_enter(void *dm_void, u16 sta_idx, u8 *my_mac_addr)
 {
-	struct PHY_DM_STRUCT		*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	u8			bfer_bfee_idx = 0xff;
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	u8 bfer_bfee_idx = 0xff;
 
-	if (beamforming_init_entry(p_dm, sta_idx, &bfer_bfee_idx))
-		hal_com_txbf_set(p_dm, TXBF_SET_SOUNDING_ENTER, (u8 *)&bfer_bfee_idx);
+	if (beamforming_init_entry(dm, sta_idx, &bfer_bfee_idx, my_mac_addr))
+		hal_com_txbf_set(dm, TXBF_SET_SOUNDING_ENTER, (u8 *)&bfer_bfee_idx);
 
-	PHYDM_DBG(p_dm, DBG_TXBF, ("[%s] End!\n", __func__));
+	PHYDM_DBG(dm, DBG_TXBF, "[%s] End!\n", __func__);
 }
 
-
-void
-beamforming_leave(
-	void			*p_dm_void,
-	u8			*RA
-)
+void beamforming_leave(
+	void *dm_void,
+	u8 *RA)
 {
-	struct PHY_DM_STRUCT		*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
 
 	if (RA != NULL) {
-		beamforming_deinit_entry(p_dm, RA);
-		phydm_beamforming_notify(p_dm);
+		beamforming_deinit_entry(dm, RA);
+		phydm_beamforming_notify(dm);
 	}
 
-	PHYDM_DBG(p_dm, DBG_TXBF, ("[%s] End!!\n", __func__));
+	PHYDM_DBG(dm, DBG_TXBF, "[%s] End!!\n", __func__);
 }
 
 #if 0
 /* Nobody calls this function */
 void
 phydm_beamforming_set_txbf_en(
-	void		*p_dm_void,
+	void		*dm_void,
 	u8			mac_id,
 	boolean			is_txbf
 )
 {
-	struct PHY_DM_STRUCT				*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
+	struct dm_struct				*dm = (struct dm_struct *)dm_void;
 	u8					idx = 0;
-	struct _RT_BEAMFORMEE_ENTRY	*p_entry;
+	struct _RT_BEAMFORMEE_ENTRY	*entry;
 
-	PHYDM_DBG(p_dm, DBG_TXBF, ("%s Start!\n", __func__));
+	PHYDM_DBG(dm, DBG_TXBF, "%s Start!\n", __func__);
 
-	p_entry = phydm_beamforming_get_entry_by_mac_id(p_dm, mac_id, &idx);
+	entry = phydm_beamforming_get_entry_by_mac_id(dm, mac_id, &idx);
 
-	if (p_entry == NULL)
+	if (entry == NULL)
 		return;
 	else
-		p_entry->is_txbf = is_txbf;
+		entry->is_txbf = is_txbf;
 
-	PHYDM_DBG(p_dm, DBG_TXBF, ("%s mac_id %d TxBF %d\n", __func__, p_entry->mac_id, p_entry->is_txbf));
+	PHYDM_DBG(dm, DBG_TXBF, "%s mac_id %d TxBF %d\n", __func__,
+		  entry->mac_id, entry->is_txbf);
 
-	phydm_beamforming_notify(p_dm);
+	phydm_beamforming_notify(dm);
 }
 #endif
 
 enum beamforming_cap
 phydm_beamforming_get_beam_cap(
-	void						*p_dm_void,
-	struct _RT_BEAMFORMING_INFO	*p_beam_info
-)
+	void *dm_void,
+	struct _RT_BEAMFORMING_INFO *beam_info)
 {
-	u8					i;
-	boolean				is_self_beamformer = false;
-	boolean				is_self_beamformee = false;
-	struct _RT_BEAMFORMEE_ENTRY	beamformee_entry;
-	struct _RT_BEAMFORMER_ENTRY	beamformer_entry;
-	enum beamforming_cap		beamform_cap = BEAMFORMING_CAP_NONE;
-	struct PHY_DM_STRUCT				*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
+	u8 i;
+	boolean is_self_beamformer = false;
+	boolean is_self_beamformee = false;
+	struct _RT_BEAMFORMEE_ENTRY beamformee_entry;
+	struct _RT_BEAMFORMER_ENTRY beamformer_entry;
+	enum beamforming_cap beamform_cap = BEAMFORMING_CAP_NONE;
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
 
-	PHYDM_DBG(p_dm, DBG_TXBF, ("[%s] Start!\n", __func__));
+	PHYDM_DBG(dm, DBG_TXBF, "[%s] Start!\n", __func__);
 
 	for (i = 0; i < BEAMFORMEE_ENTRY_NUM; i++) {
-		beamformee_entry = p_beam_info->beamformee_entry[i];
+		beamformee_entry = beam_info->beamformee_entry[i];
 
 		if (beamformee_entry.is_used) {
 			is_self_beamformer = true;
-			PHYDM_DBG(p_dm, DBG_TXBF, ("[%s] BFee entry %d is_used=true\n", __func__, i));
+			PHYDM_DBG(dm, DBG_TXBF,
+				  "[%s] BFee entry %d is_used=true\n", __func__,
+				  i);
 			break;
 		}
 	}
 
 	for (i = 0; i < BEAMFORMER_ENTRY_NUM; i++) {
-		beamformer_entry = p_beam_info->beamformer_entry[i];
+		beamformer_entry = beam_info->beamformer_entry[i];
 
 		if (beamformer_entry.is_used) {
 			is_self_beamformee = true;
-			PHYDM_DBG(p_dm, DBG_TXBF, ("[%s]: BFer entry %d is_used=true\n", __func__, i));
+			PHYDM_DBG(dm, DBG_TXBF,
+				  "[%s]: BFer entry %d is_used=true\n",
+				  __func__, i);
 			break;
 		}
 	}
@@ -1812,38 +1883,37 @@ phydm_beamforming_get_beam_cap(
 	return beamform_cap;
 }
 
-
 boolean
 beamforming_control_v1(
-	void			*p_dm_void,
-	u8			*RA,
-	u8			AID,
-	u8			mode,
-	enum channel_width	BW,
-	u8			rate
-)
+	void *dm_void,
+	u8 *RA,
+	u8 AID,
+	u8 mode,
+	enum channel_width BW,
+	u8 rate)
 {
-	struct PHY_DM_STRUCT	*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	boolean		ret = true;
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	boolean ret = true;
 
-	PHYDM_DBG(p_dm, DBG_TXBF, ("%s Start!\n", __func__));
+	PHYDM_DBG(dm, DBG_TXBF, "%s Start!\n", __func__);
 
-	PHYDM_DBG(p_dm, DBG_TXBF, ("AID (%d), mode (%d), BW (%d)\n", AID, mode, BW));
+	PHYDM_DBG(dm, DBG_TXBF, "AID (%d), mode (%d), BW (%d)\n", AID, mode,
+		  BW);
 
 	switch (mode) {
 	case 0:
-		ret = beamforming_start_v1(p_dm, RA, 0, BW, rate);
+		ret = beamforming_start_v1(dm, RA, 0, BW, rate);
 		break;
 	case 1:
-		ret = beamforming_start_v1(p_dm, RA, 1, BW, rate);
+		ret = beamforming_start_v1(dm, RA, 1, BW, rate);
 		break;
 	case 2:
-		phydm_beamforming_ndpa_rate(p_dm, BW, rate);
-		ret = beamforming_send_vht_ndpa_packet(p_dm, RA, AID, BW, NORMAL_QUEUE);
+		phydm_beamforming_ndpa_rate(dm, BW, rate);
+		ret = beamforming_send_vht_ndpa_packet(dm, RA, AID, BW, NORMAL_QUEUE);
 		break;
 	case 3:
-		phydm_beamforming_ndpa_rate(p_dm, BW, rate);
-		ret = beamforming_send_ht_ndpa_packet(p_dm, RA, BW, NORMAL_QUEUE);
+		phydm_beamforming_ndpa_rate(dm, BW, rate);
+		ret = beamforming_send_ht_ndpa_packet(dm, RA, BW, NORMAL_QUEUE);
 		break;
 	}
 	return ret;
@@ -1852,71 +1922,68 @@ beamforming_control_v1(
 /*Only OID uses this function*/
 boolean
 phydm_beamforming_control_v2(
-	void		*p_dm_void,
-	u8			idx,
-	u8			mode,
-	enum channel_width	BW,
-	u16			period
-)
+	void *dm_void,
+	u8 idx,
+	u8 mode,
+	enum channel_width BW,
+	u16 period)
 {
-	struct PHY_DM_STRUCT					*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	struct _RT_BEAMFORMING_INFO		*p_beam_info =  &p_dm->beamforming_info;
-	struct _RT_BEAMFORMING_OID_INFO	*p_beam_oid_info = &(p_beam_info->beamforming_oid_info);
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct _RT_BEAMFORMING_INFO *beam_info = &dm->beamforming_info;
+	struct _RT_BEAMFORMING_OID_INFO *beam_oid_info = &beam_info->beamforming_oid_info;
 
-	PHYDM_DBG(p_dm, DBG_TXBF, ("%s Start!\n", __func__));
-	PHYDM_DBG(p_dm, DBG_TXBF, ("idx (%d), mode (%d), BW (%d), period (%d)\n", idx, mode, BW, period));
+	PHYDM_DBG(dm, DBG_TXBF, "%s Start!\n", __func__);
+	PHYDM_DBG(dm, DBG_TXBF, "idx (%d), mode (%d), BW (%d), period (%d)\n",
+		  idx, mode, BW, period);
 
-	p_beam_oid_info->sound_oid_idx = idx;
-	p_beam_oid_info->sound_oid_mode = (enum sounding_mode) mode;
-	p_beam_oid_info->sound_oid_bw = BW;
-	p_beam_oid_info->sound_oid_period = period;
+	beam_oid_info->sound_oid_idx = idx;
+	beam_oid_info->sound_oid_mode = (enum sounding_mode)mode;
+	beam_oid_info->sound_oid_bw = BW;
+	beam_oid_info->sound_oid_period = period;
 
-	phydm_beamforming_notify(p_dm);
+	phydm_beamforming_notify(dm);
 
 	return true;
 }
 
-
-void
-phydm_beamforming_watchdog(
-	void		*p_dm_void
-)
+void phydm_beamforming_watchdog(
+	void *dm_void)
 {
-	struct PHY_DM_STRUCT					*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	struct _RT_BEAMFORMING_INFO		*p_beam_info = &p_dm->beamforming_info;
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct _RT_BEAMFORMING_INFO *beam_info = &dm->beamforming_info;
 
-	PHYDM_DBG(p_dm, DBG_TXBF, ("%s Start!\n", __func__));
+	PHYDM_DBG(dm, DBG_TXBF, "%s Start!\n", __func__);
 
-	if (p_beam_info->beamformee_su_cnt == 0)
+	if (beam_info->beamformee_su_cnt == 0)
 		return;
 
-	beamforming_dym_period(p_dm, 0);
+	beamforming_dym_period(dm, 0);
 }
 enum beamforming_cap
 phydm_get_beamform_cap(
-	void			*p_dm_void
-)
+	void *dm_void)
 {
-	struct PHY_DM_STRUCT                    *p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	struct cmn_sta_info                     *p_sta = NULL;
-	struct bf_cmn_info                      *p_bf_info = NULL;
-	struct _RT_BEAMFORMING_INFO             *p_beam_info = &p_dm->beamforming_info;
-	struct _ADAPTER                         *adapter = p_dm->adapter;
-	enum beamforming_cap                     beamform_cap = BEAMFORMING_CAP_NONE;
-	u8                                       macid;
-	u8                                       ht_curbeamformcap = 0;
-	u16                                      vht_curbeamformcap = 0;
-
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct cmn_sta_info *sta = NULL;
+	struct bf_cmn_info *bf_info = NULL;
+	struct _RT_BEAMFORMING_INFO *beam_info = &dm->beamforming_info;
+	void *adapter = dm->adapter;
+	enum beamforming_cap beamform_cap = BEAMFORMING_CAP_NONE;
+	u8 macid;
+	u8 ht_curbeamformcap = 0;
+	u16 vht_curbeamformcap = 0;
 
 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
-	PMGNT_INFO                              p_MgntInfo = &adapter->MgntInfo;
-	PRT_VERY_HIGH_THROUGHPUT                p_vht_info = GET_VHT_INFO(p_MgntInfo);
-	PRT_HIGH_THROUGHPUT                     p_ht_info  = GET_HT_INFO(p_MgntInfo);
+	PMGNT_INFO p_MgntInfo = &(((PADAPTER)(adapter))->MgntInfo);
+	PRT_VERY_HIGH_THROUGHPUT p_vht_info = GET_VHT_INFO(p_MgntInfo);
+	PRT_HIGH_THROUGHPUT p_ht_info = GET_HT_INFO(p_MgntInfo);
 
 	ht_curbeamformcap = p_ht_info->HtCurBeamform;
 	vht_curbeamformcap = p_vht_info->VhtCurBeamform;
 
-	PHYDM_DBG(p_dm, DBG_ANT_DIV, ("[%s] WIN ht_curcap = %d ; vht_curcap = %d\n", __func__, ht_curbeamformcap, vht_curbeamformcap));
+	PHYDM_DBG(dm, DBG_ANT_DIV,
+		  "[%s] WIN ht_curcap = %d ; vht_curcap = %d\n", __func__,
+		  ht_curbeamformcap, vht_curbeamformcap);
 
 	if (TEST_FLAG(ht_curbeamformcap, BEAMFORMING_HT_BEAMFORMER_ENABLE)) /*We are Beamformee because the STA is Beamformer*/
 		beamform_cap = (enum beamforming_cap)(beamform_cap | (BEAMFORMEE_CAP_HT_EXPLICIT | BEAMFORMEE_CAP));
@@ -1925,7 +1992,7 @@ phydm_get_beamform_cap(
 	if (TEST_FLAG(ht_curbeamformcap, BEAMFORMING_HT_BEAMFORMEE_ENABLE))
 		beamform_cap = (enum beamforming_cap)(beamform_cap | (BEAMFORMER_CAP_HT_EXPLICIT | BEAMFORMER_CAP));
 
-	#if (ODM_IC_11AC_SERIES_SUPPORT == 1)
+#if (ODM_IC_11AC_SERIES_SUPPORT == 1)
 
 	/* We are Beamformee because the STA is SU Beamformer*/
 	if (TEST_FLAG(vht_curbeamformcap, BEAMFORMING_VHT_BEAMFORMER_ENABLE))
@@ -1938,20 +2005,18 @@ phydm_get_beamform_cap(
 	/* We are Beamformee because the STA is MU Beamformer*/
 	if (TEST_FLAG(vht_curbeamformcap, BEAMFORMING_VHT_MU_MIMO_AP_ENABLE))
 		beamform_cap = (enum beamforming_cap)(beamform_cap | (BEAMFORMEE_CAP_VHT_MU | BEAMFORMEE_CAP));
-	#endif
+#endif
 #elif (DM_ODM_SUPPORT_TYPE == ODM_CE)
 
+	for (macid = 0; macid < ODM_ASSOCIATE_ENTRY_NUM; macid++) {
+		sta = dm->phydm_sta_info[macid];
 
-		for (macid = 0; macid < ODM_ASSOCIATE_ENTRY_NUM; macid++) {
-
-		p_sta = p_dm->p_phydm_sta_info[macid];
-
-		if (!is_sta_active(p_sta))
+		if (!is_sta_active(sta))
 			continue;
 
-		p_bf_info = &(p_sta->bf_info);
-		vht_curbeamformcap = p_bf_info->vht_beamform_cap;
-		ht_curbeamformcap  = p_bf_info->ht_beamform_cap;
+		bf_info = &sta->bf_info;
+		vht_curbeamformcap = bf_info->vht_beamform_cap;
+		ht_curbeamformcap = bf_info->ht_beamform_cap;
 
 		if (TEST_FLAG(ht_curbeamformcap, BEAMFORMING_HT_BEAMFORMER_ENABLE)) /*We are Beamformee because the STA is Beamformer*/
 			beamform_cap = (enum beamforming_cap)(beamform_cap | (BEAMFORMEE_CAP_HT_EXPLICIT | BEAMFORMEE_CAP));
@@ -1960,7 +2025,7 @@ phydm_get_beamform_cap(
 		if (TEST_FLAG(ht_curbeamformcap, BEAMFORMING_HT_BEAMFORMEE_ENABLE))
 			beamform_cap = (enum beamforming_cap)(beamform_cap | (BEAMFORMER_CAP_HT_EXPLICIT | BEAMFORMER_CAP));
 
-	#if (ODM_IC_11AC_SERIES_SUPPORT == 1)
+#if (ODM_IC_11AC_SERIES_SUPPORT == 1)
 		/* We are Beamformee because the STA is SU Beamformer*/
 		if (TEST_FLAG(vht_curbeamformcap, BEAMFORMING_VHT_BEAMFORMER_ENABLE))
 			beamform_cap = (enum beamforming_cap)(beamform_cap | (BEAMFORMEE_CAP_VHT_SU | BEAMFORMEE_CAP));
@@ -1972,14 +2037,14 @@ phydm_get_beamform_cap(
 		/* We are Beamformee because the STA is MU Beamformer*/
 		if (TEST_FLAG(vht_curbeamformcap, BEAMFORMING_VHT_MU_MIMO_AP_ENABLE))
 			beamform_cap = (enum beamforming_cap)(beamform_cap | (BEAMFORMEE_CAP_VHT_MU | BEAMFORMEE_CAP));
-	#endif
-}
-	PHYDM_DBG(p_dm, DBG_ANT_DIV, ("[%s] CE ht_curcap = %d ; vht_curcap = %d\n", __func__, ht_curbeamformcap, vht_curbeamformcap));
-
 #endif
+	}
+	PHYDM_DBG(dm, DBG_ANT_DIV, "[%s] CE ht_curcap = %d ; vht_curcap = %d\n",
+		  __func__, ht_curbeamformcap, vht_curbeamformcap);
 
-return beamform_cap;
+#endif
 
+	return beamform_cap;
 }
 
 #endif
diff --git a/rtl8723DS/hal/phydm/phydm_beamforming.h b/rtl8723DS/hal/phydm/phydm_beamforming.h
index 4b8d221..26e54c0 100755..100644
--- a/rtl8723DS/hal/phydm/phydm_beamforming.h
+++ b/rtl8723DS/hal/phydm/phydm_beamforming.h
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2007 - 2017 Realtek Corporation.
+ * Copyright(c) 2007 - 2017  Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -8,19 +8,25 @@
  *
  * This program is distributed in the hope that it will be useful, but WITHOUT
  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  * more details.
  *
+ * The full GNU General Public License is included in this distribution in the
+ * file called LICENSE.
+ *
+ * Contact Information:
+ * wlanfae <wlanfae@realtek.com>
+ * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
+ * Hsinchu 300, Taiwan.
+ *
+ * Larry Finger <Larry.Finger@lwfinger.net>
+ *
  *****************************************************************************/
 
 #ifndef __INC_PHYDM_BEAMFORMING_H
 #define __INC_PHYDM_BEAMFORMING_H
 
-#ifndef BEAMFORMING_SUPPORT
-	#define	BEAMFORMING_SUPPORT		0
-#endif
-
-/*Beamforming Related*/
+/*@Beamforming Related*/
 #include "txbf/halcomtxbf.h"
 #include "txbf/haltxbfjaguar.h"
 #include "txbf/haltxbf8192e.h"
@@ -28,34 +34,34 @@
 #include "txbf/haltxbf8822b.h"
 #include "txbf/haltxbfinterface.h"
 
-#if (BEAMFORMING_SUPPORT == 1)
+#ifdef PHYDM_BEAMFORMING_SUPPORT
 
 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
 
-#define eq_mac_addr(a,b)						( ((a)[0]==(b)[0] && (a)[1]==(b)[1] && (a)[2]==(b)[2] && (a)[3]==(b)[3] && (a)[4]==(b)[4] && (a)[5]==(b)[5]) ? 1:0 )
-#define cp_mac_addr(des,src)					((des)[0]=(src)[0],(des)[1]=(src)[1],(des)[2]=(src)[2],(des)[3]=(src)[3],(des)[4]=(src)[4],(des)[5]=(src)[5])
+#define eq_mac_addr(a, b) (((a)[0] == (b)[0] && (a)[1] == (b)[1] && (a)[2] == (b)[2] && (a)[3] == (b)[3] && (a)[4] == (b)[4] && (a)[5] == (b)[5]) ? 1 : 0)
+#define cp_mac_addr(des, src) ((des)[0] = (src)[0], (des)[1] = (src)[1], (des)[2] = (src)[2], (des)[3] = (src)[3], (des)[4] = (src)[4], (des)[5] = (src)[5])
 
 #endif
 
-#define MAX_BEAMFORMEE_SU	2
-#define MAX_BEAMFORMER_SU	2
+#define MAX_BEAMFORMEE_SU 2
+#define MAX_BEAMFORMER_SU 2
 #if (RTL8822B_SUPPORT == 1)
-	#define MAX_BEAMFORMEE_MU	6
-	#define MAX_BEAMFORMER_MU	1
+#define MAX_BEAMFORMEE_MU 6
+#define MAX_BEAMFORMER_MU 1
 #else
-	#define MAX_BEAMFORMEE_MU	0
-	#define MAX_BEAMFORMER_MU	0
+#define MAX_BEAMFORMEE_MU 0
+#define MAX_BEAMFORMER_MU 0
 #endif
 
-#define BEAMFORMEE_ENTRY_NUM		(MAX_BEAMFORMEE_SU + MAX_BEAMFORMEE_MU)
-#define BEAMFORMER_ENTRY_NUM		(MAX_BEAMFORMER_SU + MAX_BEAMFORMER_MU)
+#define BEAMFORMEE_ENTRY_NUM (MAX_BEAMFORMEE_SU + MAX_BEAMFORMEE_MU)
+#define BEAMFORMER_ENTRY_NUM (MAX_BEAMFORMER_SU + MAX_BEAMFORMER_MU)
 
 #if (DM_ODM_SUPPORT_TYPE == ODM_CE)
-	/*for different naming between WIN and CE*/
-	#define BEACON_QUEUE	BCN_QUEUE_INX
-	#define NORMAL_QUEUE	MGT_QUEUE_INX
-	#define RT_DISABLE_FUNC RTW_DISABLE_FUNC
-	#define RT_ENABLE_FUNC RTW_ENABLE_FUNC
+/*@for different naming between WIN and CE*/
+#define BEACON_QUEUE BCN_QUEUE_INX
+#define NORMAL_QUEUE MGT_QUEUE_INX
+#define RT_DISABLE_FUNC RTW_DISABLE_FUNC
+#define RT_ENABLE_FUNC RTW_ENABLE_FUNC
 #endif
 
 enum beamforming_entry_state {
@@ -66,7 +72,6 @@ enum beamforming_entry_state {
 	BEAMFORMING_ENTRY_STATE_PROGRESSED
 };
 
-
 enum beamforming_notify_state {
 	BEAMFORMING_NOTIFY_NONE,
 	BEAMFORMING_NOTIFY_ADD,
@@ -82,15 +87,14 @@ enum beamforming_cap {
 	BEAMFORMING_CAP_NONE = 0x0,
 	BEAMFORMER_CAP_HT_EXPLICIT = BIT(1),
 	BEAMFORMEE_CAP_HT_EXPLICIT = BIT(2),
-	BEAMFORMER_CAP_VHT_SU = BIT(5),			/* Self has er Cap, because Reg er  & peer ee */
-	BEAMFORMEE_CAP_VHT_SU = BIT(6),			/* Self has ee Cap, because Reg ee & peer er */
-	BEAMFORMER_CAP_VHT_MU = BIT(7),			/* Self has er Cap, because Reg er  & peer ee */
-	BEAMFORMEE_CAP_VHT_MU = BIT(8),			/* Self has ee Cap, because Reg ee & peer er */
+	BEAMFORMER_CAP_VHT_SU = BIT(5), /* @Self has er Cap, because Reg er  & peer ee */
+	BEAMFORMEE_CAP_VHT_SU = BIT(6), /* @Self has ee Cap, because Reg ee & peer er */
+	BEAMFORMER_CAP_VHT_MU = BIT(7), /* @Self has er Cap, because Reg er  & peer ee */
+	BEAMFORMEE_CAP_VHT_MU = BIT(8), /* @Self has ee Cap, because Reg ee & peer er */
 	BEAMFORMER_CAP = BIT(9),
 	BEAMFORMEE_CAP = BIT(10),
 };
 
-
 enum sounding_mode {
 	SOUNDING_SW_VHT_TIMER = 0x0,
 	SOUNDING_SW_HT_TIMER = 0x1,
@@ -105,132 +109,131 @@ enum sounding_mode {
 };
 
 struct _RT_BEAMFORM_STAINFO {
-	u8						*ra;
-	u16						aid;
-	u16						mac_id;
-	u8						my_mac_addr[6];
-	WIRELESS_MODE				wireless_mode;
-	enum channel_width				bw;
-	enum beamforming_cap			beamform_cap;
-	u8						ht_beamform_cap;
-	u16						vht_beamform_cap;
-	u8						cur_beamform;
-	u16						cur_beamform_vht;
+	u8 *ra;
+	u16 aid;
+	u16 mac_id;
+	u8 my_mac_addr[6];
+	/*WIRELESS_MODE				wireless_mode;*/
+	enum channel_width bw;
+	enum beamforming_cap beamform_cap;
+	u8 ht_beamform_cap;
+	u16 vht_beamform_cap;
+	u8 cur_beamform;
+	u16 cur_beamform_vht;
 };
 
-
 struct _RT_BEAMFORMEE_ENTRY {
 	boolean is_used;
-	boolean	is_txbf;
+	boolean is_txbf;
 	boolean is_sound;
-	u16	aid;				/*Used to construct AID field of NDPA packet.*/
-	u16	mac_id;				/*Used to Set Reg42C in IBSS mode. */
-	u16	p_aid;				/*Used to fill Reg42C & Reg714 to compare with P_AID of Tx DESC. */
-	u8	g_id;				/*Used to fill Tx DESC*/
-	u8	my_mac_addr[6];
-	u8	mac_addr[6];			/*Used to fill Reg6E4 to fill Mac address of CSI report frame.*/
-	enum channel_width			sound_bw;		/*Sounding band_width*/
-	u16					sound_period;
-	enum beamforming_cap			beamform_entry_cap;
-	enum beamforming_entry_state	beamform_entry_state;
-	boolean						is_beamforming_in_progress;
-	/*u8	log_seq;									// Move to _RT_BEAMFORMER_ENTRY*/
-	/*u16	log_retry_cnt:3;		// 0~4				// Move to _RT_BEAMFORMER_ENTRY*/
-	/*u16	LogSuccessCnt:2;		// 0~2				// Move to _RT_BEAMFORMER_ENTRY*/
-	u16	log_status_fail_cnt:5;	/* 0~21 */
-	u16	default_csi_cnt:5;		/* 0~21 */
-	u8	csi_matrix[327];
-	u16	csi_matrix_len;
-	u8	num_of_sounding_dim;
-	u8	comp_steering_num_of_bfer;
-	u8	su_reg_index;
-	/*For MU-MIMO*/
-	boolean	is_mu_sta;
-	u8	mu_reg_index;
-	u8	gid_valid[8];
-	u8	user_position[16];
+	u16 aid; /*Used to construct AID field of NDPA packet.*/
+	u16 mac_id; /*Used to Set Reg42C in IBSS mode. */
+	u16 p_aid; /*@Used to fill Reg42C & Reg714 to compare with P_AID of Tx DESC. */
+	u8 g_id; /*Used to fill Tx DESC*/
+	u8 my_mac_addr[6];
+	u8 mac_addr[6]; /*@Used to fill Reg6E4 to fill Mac address of CSI report frame.*/
+	enum channel_width sound_bw; /*Sounding band_width*/
+	u16 sound_period;
+	enum beamforming_cap beamform_entry_cap;
+	enum beamforming_entry_state beamform_entry_state;
+	boolean is_beamforming_in_progress;
+	/*@u8	log_seq;									// Move to _RT_BEAMFORMER_ENTRY*/
+	/*@u16	log_retry_cnt:3;		// 0~4				// Move to _RT_BEAMFORMER_ENTRY*/
+	/*@u16	LogSuccessCnt:2;		// 0~2				// Move to _RT_BEAMFORMER_ENTRY*/
+	u16 log_status_fail_cnt : 5; /* @0~21 */
+	u16 default_csi_cnt : 5; /* @0~21 */
+	u8 csi_matrix[327];
+	u16 csi_matrix_len;
+	u8 num_of_sounding_dim;
+	u8 comp_steering_num_of_bfer;
+	u8 su_reg_index;
+	/*@For MU-MIMO*/
+	boolean is_mu_sta;
+	u8 mu_reg_index;
+	u8 gid_valid[8];
+	u8 user_position[16];
 };
 
 struct _RT_BEAMFORMER_ENTRY {
-	boolean			is_used;
+	boolean is_used;
 	/*P_AID of BFer entry is probably not used*/
-	u16				p_aid;					/*Used to fill Reg42C & Reg714 to compare with P_AID of Tx DESC. */
-	u8				g_id;
-	u8				my_mac_addr[6];
-	u8				mac_addr[6];
-	enum beamforming_cap		beamform_entry_cap;
-	u8				num_of_sounding_dim;
-	u8				clock_reset_times;		/*Modified by Jeffery @2015-04-10*/
-	u8				pre_log_seq;				/*Modified by Jeffery @2015-03-30*/
-	u8				log_seq;					/*Modified by Jeffery @2014-10-29*/
-	u16				log_retry_cnt:3;			/*Modified by Jeffery @2014-10-29*/
-	u16				log_success:2;			/*Modified by Jeffery @2014-10-29*/
-	u8				su_reg_index;
-	/*For MU-MIMO*/
-	boolean				is_mu_ap;
-	u8				gid_valid[8];
-	u8				user_position[16];
-	u16				aid;
+	u16 p_aid; /*@Used to fill Reg42C & Reg714 to compare with P_AID of Tx DESC. */
+	u8 g_id;
+	u8 my_mac_addr[6];
+	u8 mac_addr[6];
+	enum beamforming_cap beamform_entry_cap;
+	u8 num_of_sounding_dim;
+	u8 clock_reset_times; /*@Modified by Jeffery @2015-04-10*/
+	u8 pre_log_seq; /*@Modified by Jeffery @2015-03-30*/
+	u8 log_seq; /*@Modified by Jeffery @2014-10-29*/
+	u16 log_retry_cnt : 3; /*@Modified by Jeffery @2014-10-29*/
+	u16 log_success : 2; /*@Modified by Jeffery @2014-10-29*/
+	u8 su_reg_index;
+	/*@For MU-MIMO*/
+	boolean is_mu_ap;
+	u8 gid_valid[8];
+	u8 user_position[16];
+	u16 aid;
 };
 
 struct _RT_SOUNDING_INFO {
-	u8			sound_idx;
-	enum channel_width	sound_bw;
-	enum sounding_mode	sound_mode;
-	u16			sound_period;
+	u8 sound_idx;
+	enum channel_width sound_bw;
+	enum sounding_mode sound_mode;
+	u16 sound_period;
 };
 
-
-
 struct _RT_BEAMFORMING_OID_INFO {
-	u8			sound_oid_idx;
-	enum channel_width	sound_oid_bw;
-	enum sounding_mode	sound_oid_mode;
-	u16			sound_oid_period;
+	u8 sound_oid_idx;
+	enum channel_width sound_oid_bw;
+	enum sounding_mode sound_oid_mode;
+	u16 sound_oid_period;
 };
 
-
 struct _RT_BEAMFORMING_INFO {
-	enum beamforming_cap			beamform_cap;
-	struct _RT_BEAMFORMEE_ENTRY		beamformee_entry[BEAMFORMEE_ENTRY_NUM];
-	struct _RT_BEAMFORMER_ENTRY		beamformer_entry[BEAMFORMER_ENTRY_NUM];
-	struct _RT_BEAMFORM_STAINFO		beamform_sta_info;
-	u8					beamformee_cur_idx;
-	struct timer_list					beamforming_timer;
-	struct timer_list					mu_timer;
-	struct _RT_SOUNDING_INFO			sounding_info;
-	struct _RT_BEAMFORMING_OID_INFO	beamforming_oid_info;
-	struct _HAL_TXBF_INFO			txbf_info;
-	u8					sounding_sequence;
-	u8					beamformee_su_cnt;
-	u8					beamformer_su_cnt;
-	u32					beamformee_su_reg_maping;
-	u32					beamformer_su_reg_maping;
-	/*For MU-MINO*/
-	u8					beamformee_mu_cnt;
-	u8					beamformer_mu_cnt;
-	u32					beamformee_mu_reg_maping;
-	u8					mu_ap_index;
-	boolean					is_mu_sounding;
-	u8					first_mu_bfee_index;
-	boolean					is_mu_sounding_in_progress;
-	boolean					dbg_disable_mu_tx;
-	boolean					apply_v_matrix;
-	boolean					snding3ss;
+	enum beamforming_cap beamform_cap;
+	struct _RT_BEAMFORMEE_ENTRY beamformee_entry[BEAMFORMEE_ENTRY_NUM];
+	struct _RT_BEAMFORMER_ENTRY beamformer_entry[BEAMFORMER_ENTRY_NUM];
+	struct _RT_BEAMFORM_STAINFO beamform_sta_info;
+	u8 beamformee_cur_idx;
+	struct phydm_timer_list beamforming_timer;
+	struct phydm_timer_list mu_timer;
+	struct _RT_SOUNDING_INFO sounding_info;
+	struct _RT_BEAMFORMING_OID_INFO beamforming_oid_info;
+	struct _HAL_TXBF_INFO txbf_info;
+	u8 sounding_sequence;
+	u8 beamformee_su_cnt;
+	u8 beamformer_su_cnt;
+	u32 beamformee_su_reg_maping;
+	u32 beamformer_su_reg_maping;
+	/*@For MU-MINO*/
+	u8 beamformee_mu_cnt;
+	u8 beamformer_mu_cnt;
+	u32 beamformee_mu_reg_maping;
+	u8 mu_ap_index;
+	boolean is_mu_sounding;
+	u8 first_mu_bfee_index;
+	boolean is_mu_sounding_in_progress;
+	boolean dbg_disable_mu_tx;
+	boolean apply_v_matrix;
+	boolean snding3ss;
 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
-	struct _ADAPTER				*source_adapter;
+	void *source_adapter;
 #endif
-	/* Control register */
-	u32					reg_mu_tx_ctrl;		/* For USB/SDIO interfaces aync I/O */
-	u8					tx_bf_data_rate;
-	u8					last_usb_hub;
+	/* @Control register */
+	u32 reg_mu_tx_ctrl; /* @For USB/SDIO interfaces aync I/O */
+	u8 tx_bf_data_rate;
+	u8 last_usb_hub;
 };
 
+void phydm_get_txbf_device_num(
+	void *dm_void,
+	u8 macid);
 
 struct _RT_NDPA_STA_INFO {
-	u16	aid:12;
-	u16	feedback_type:1;
-	u16	nc_index:3;
+	u16 aid : 12;
+	u16 feedback_type : 1;
+	u16 nc_index : 3;
 };
 
 enum phydm_acting_type {
@@ -238,158 +241,123 @@ enum phydm_acting_type {
 	phydm_acting_as_ap = 1
 };
 
-
 enum beamforming_cap
 phydm_beamforming_get_entry_beam_cap_by_mac_id(
-	void	*p_dm_void,
-	u8	mac_id
-);
+	void *dm_void,
+	u8 mac_id);
 
 struct _RT_BEAMFORMEE_ENTRY *
 phydm_beamforming_get_bfee_entry_by_addr(
-	void		*p_dm_void,
-	u8		*RA,
-	u8		*idx
-);
+	void *dm_void,
+	u8 *RA,
+	u8 *idx);
 
 struct _RT_BEAMFORMER_ENTRY *
 phydm_beamforming_get_bfer_entry_by_addr(
-	void	*p_dm_void,
-	u8	*TA,
-	u8	*idx
-);
+	void *dm_void,
+	u8 *TA,
+	u8 *idx);
 
-void
-phydm_beamforming_notify(
-	void	*p_dm_void
-);
+void phydm_beamforming_notify(
+	void *dm_void);
 
 boolean
 phydm_acting_determine(
-	void		*p_dm_void,
-	enum phydm_acting_type	type
-);
-
-void
-beamforming_enter(
-	void		*p_dm_void,
-	u16	sta_idx
-);
-
-void
-beamforming_leave(
-	void		*p_dm_void,
-	u8			*RA
-);
+	void *dm_void,
+	enum phydm_acting_type type);
 
-boolean
-beamforming_start_fw(
-	void			*p_dm_void,
-	u8			idx
-);
+void beamforming_enter(void *dm_void, u16 sta_idx, u8 *my_mac_addr);
 
-void
-beamforming_check_sounding_success(
-	void			*p_dm_void,
-	boolean			status
-);
+void beamforming_leave(
+	void *dm_void,
+	u8 *RA);
 
-void
-phydm_beamforming_end_sw(
-	void		*p_dm_void,
-	boolean			status
-);
+boolean
+beamforming_start_fw(
+	void *dm_void,
+	u8 idx);
 
-void
-beamforming_timer_callback(
-	void			*p_dm_void
-);
+void beamforming_check_sounding_success(
+	void *dm_void,
+	boolean status);
 
-void
-phydm_beamforming_init(
-	void		*p_dm_void
-);
+void phydm_beamforming_end_sw(
+	void *dm_void,
+	boolean status);
 
+void beamforming_timer_callback(
+	void *dm_void);
 
+void phydm_beamforming_init(
+	void *dm_void);
 
 enum beamforming_cap
 phydm_beamforming_get_beam_cap(
-	void			*p_dm_void,
-	struct _RT_BEAMFORMING_INFO	*p_beam_info
-);
+	void *dm_void,
+	struct _RT_BEAMFORMING_INFO *beam_info);
 
 enum beamforming_cap
 phydm_get_beamform_cap(
-	void			*p_dm_void
-);
+	void *dm_void);
 
 boolean
 beamforming_control_v1(
-	void			*p_dm_void,
-	u8			*RA,
-	u8			AID,
-	u8			mode,
-	enum channel_width	BW,
-	u8			rate
-);
-
+	void *dm_void,
+	u8 *RA,
+	u8 AID,
+	u8 mode,
+	enum channel_width BW,
+	u8 rate);
 
 boolean
 phydm_beamforming_control_v2(
-	void		*p_dm_void,
-	u8			idx,
-	u8			mode,
-	enum channel_width	BW,
-	u16			period
-);
-
-void
-phydm_beamforming_watchdog(
-	void		*p_dm_void
-);
-
-void
-beamforming_sw_timer_callback(
+	void *dm_void,
+	u8 idx,
+	u8 mode,
+	enum channel_width BW,
+	u16 period);
+
+void phydm_beamforming_watchdog(
+	void *dm_void);
+
+void beamforming_sw_timer_callback(
 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
-	struct timer_list		*p_timer
+	struct phydm_timer_list *timer
 #elif (DM_ODM_SUPPORT_TYPE == ODM_CE)
 	void *function_context
 #endif
-);
+	);
 
 boolean
 beamforming_send_ht_ndpa_packet(
-	void			*p_dm_void,
-	u8			*RA,
-	enum channel_width	BW,
-	u8			q_idx
-);
-
+	void *dm_void,
+	u8 *RA,
+	enum channel_width BW,
+	u8 q_idx);
 
 boolean
 beamforming_send_vht_ndpa_packet(
-	void			*p_dm_void,
-	u8			*RA,
-	u16			AID,
-	enum channel_width	BW,
-	u8			q_idx
-);
+	void *dm_void,
+	u8 *RA,
+	u16 AID,
+	enum channel_width BW,
+	u8 q_idx);
 
 #else
-#define beamforming_gid_paid(adapter, p_tcb)
-#define	phydm_acting_determine(p_dm, type)	false
-#define beamforming_enter(p_dm, sta_idx)
-#define beamforming_leave(p_dm, RA)
-#define beamforming_end_fw(p_dm)
-#define beamforming_control_v1(p_dm, RA, AID, mode, BW, rate)		true
-#define beamforming_control_v2(p_dm, idx, mode, BW, period)		true
-#define phydm_beamforming_end_sw(p_dm, _status)
-#define beamforming_timer_callback(p_dm)
-#define phydm_beamforming_init(p_dm)
-#define phydm_beamforming_control_v2(p_dm, _idx, _mode, _BW, _period)	false
-#define beamforming_watchdog(p_dm)
-#define phydm_beamforming_watchdog(p_dm)
-
-
-#endif
+#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_AP))
+#define beamforming_gid_paid(adapter, tcb)
+#define phydm_acting_determine(dm, type) false
+#define beamforming_enter(dm, sta_idx, my_mac_addr)
+#define beamforming_leave(dm, RA)
+#define beamforming_end_fw(dm)
+#define beamforming_control_v1(dm, RA, AID, mode, BW, rate) true
+#define beamforming_control_v2(dm, idx, mode, BW, period) true
+#define phydm_beamforming_end_sw(dm, _status)
+#define beamforming_timer_callback(dm)
+#define phydm_beamforming_init(dm)
+#define phydm_beamforming_control_v2(dm, _idx, _mode, _BW, _period) false
+#define beamforming_watchdog(dm)
+#define phydm_beamforming_watchdog(dm)
+#endif /*@(DM_ODM_SUPPORT_TYPE & (ODM_CE | ODM_AP))*/
+#endif /*@#ifdef PHYDM_BEAMFORMING_SUPPORT*/
 #endif
diff --git a/rtl8723DS/hal/phydm/phydm_cck_pd.c b/rtl8723DS/hal/phydm/phydm_cck_pd.c
index 1f1eba9..8f5229a 100755..100644
--- a/rtl8723DS/hal/phydm/phydm_cck_pd.c
+++ b/rtl8723DS/hal/phydm/phydm_cck_pd.c
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2007 - 2017 Realtek Corporation.
+ * Copyright(c) 2007 - 2017  Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -8,448 +8,1079 @@
  *
  * This program is distributed in the hope that it will be useful, but WITHOUT
  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  * more details.
  *
+ * The full GNU General Public License is included in this distribution in the
+ * file called LICENSE.
+ *
+ * Contact Information:
+ * wlanfae <wlanfae@realtek.com>
+ * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
+ * Hsinchu 300, Taiwan.
+ *
+ * Larry Finger <Larry.Finger@lwfinger.net>
+ *
  *****************************************************************************/
 
-/* ************************************************************
+/*@************************************************************
  * include files
- * ************************************************************ */
+ ************************************************************/
 
 #include "mp_precomp.h"
 #include "phydm_precomp.h"
- 
+
 #ifdef PHYDM_SUPPORT_CCKPD
+#ifdef PHYDM_COMPILE_CCKPD_TYPE1
+void phydm_write_cck_pd_type1(void *dm_void, u8 cca_th)
+{
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct phydm_cckpd_struct *cckpd_t = &dm->dm_cckpd_table;
+
+	PHYDM_DBG(dm, DBG_CCKPD, "[%s] cck_cca_th=((0x%x))\n",
+		  __func__, cca_th);
+
+	odm_write_1byte(dm, R_0xa0a, cca_th);
+	cckpd_t->cur_cck_cca_thres = cca_th;
+}
 
-void
-phydm_write_cck_cca_th_new_cs_ratio(
-	void			*p_dm_void,
-	u8			cca_th,
-	u8			cca_th_aaa
-)
+void phydm_set_cckpd_lv_type1(void *dm_void, enum cckpd_lv lv)
 {
-	struct PHY_DM_STRUCT	*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	struct phydm_cckpd_struct	*p_cckpd_t = &p_dm->dm_cckpd_table;
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct phydm_cckpd_struct *cckpd_t = &dm->dm_cckpd_table;
+	u8 pd_th = 0;
 
-	PHYDM_DBG(p_dm, DBG_CCKPD, ("%s ======>\n", __func__));
-	PHYDM_DBG(p_dm, DBG_CCKPD, ("[New] pd_th=0x%x, cs_ratio=0x%x\n\n", cca_th, cca_th_aaa));
+	PHYDM_DBG(dm, DBG_CCKPD, "%s ======>\n", __func__);
+	PHYDM_DBG(dm, DBG_CCKPD, "lv: (%d) -> (%d)\n", cckpd_t->cck_pd_lv, lv);
 
-	if (p_cckpd_t->cur_cck_cca_thres != cca_th) {
-		
-		p_cckpd_t->cur_cck_cca_thres = cca_th;
-		odm_set_bb_reg(p_dm, 0xa08, 0xf0000, cca_th);
-		p_cckpd_t->cck_fa_ma = CCK_FA_MA_RESET;
-		
+	if (cckpd_t->cck_pd_lv == lv) {
+		PHYDM_DBG(dm, DBG_CCKPD, "stay in lv=%d\n", lv);
+		return;
 	}
 
-	if (p_cckpd_t->cck_cca_th_aaa != cca_th_aaa) {
-		
-		p_cckpd_t->cck_cca_th_aaa = cca_th_aaa;
-		odm_set_bb_reg(p_dm, 0xaa8, 0x1f0000, cca_th_aaa);
-		p_cckpd_t->cck_fa_ma = CCK_FA_MA_RESET;
-	}
-	
+	cckpd_t->cck_pd_lv = lv;
+	cckpd_t->cck_fa_ma = CCK_FA_MA_RESET;
+
+	if (lv == CCK_PD_LV_4)
+		pd_th = 0xed;
+	else if (lv == CCK_PD_LV_3)
+		pd_th = 0xdd;
+	else if (lv == CCK_PD_LV_2)
+		pd_th = 0xcd;
+	else if (lv == CCK_PD_LV_1)
+		pd_th = 0x83;
+	else if (lv == CCK_PD_LV_0)
+		pd_th = 0x40;
+
+	phydm_write_cck_pd_type1(dm, pd_th);
 }
 
-void
-phydm_write_cck_cca_th(
-	void			*p_dm_void,
-	u8			cca_th
-)
+void phydm_cckpd_type1(void *dm_void)
 {
-	struct PHY_DM_STRUCT	*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	struct phydm_cckpd_struct	*p_cckpd_t = &p_dm->dm_cckpd_table;
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct phydm_dig_struct *dig_t = &dm->dm_dig_table;
+	struct phydm_cckpd_struct *cckpd_t = &dm->dm_cckpd_table;
+	enum cckpd_lv lv = CCK_PD_LV_INIT;
+	boolean is_update = true;
 
-	PHYDM_DBG(p_dm, DBG_CCKPD, ("%s ======>\n", __func__));
-	PHYDM_DBG(p_dm, DBG_CCKPD, ("New cck_cca_th=((0x%x))\n\n", cca_th));
+	if (dm->is_linked) {
+	#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_CE))
+		if (dm->rssi_min > 60) {
+			lv = CCK_PD_LV_3;
+		} else if (dm->rssi_min > 35) {
+			lv = CCK_PD_LV_2;
+		} else if (dm->rssi_min > 20) {
+			if (cckpd_t->cck_fa_ma > 500)
+				lv = CCK_PD_LV_2;
+			else if (cckpd_t->cck_fa_ma < 250)
+				lv = CCK_PD_LV_1;
+			else
+				is_update = false;
+		} else { /*RSSI < 20*/
+			lv = CCK_PD_LV_1;
+		}
+	#else /*ODM_AP*/
+		if (dig_t->cur_ig_value > 0x32)
+			lv = CCK_PD_LV_4;
+		else if (dig_t->cur_ig_value > 0x2a)
+			lv = CCK_PD_LV_3;
+		else if (dig_t->cur_ig_value > 0x24)
+			lv = CCK_PD_LV_2;
+		else
+			lv = CCK_PD_LV_1;
+	#endif
+	} else {
+		if (cckpd_t->cck_fa_ma > 1000)
+			lv = CCK_PD_LV_1;
+		else if (cckpd_t->cck_fa_ma < 500)
+			lv = CCK_PD_LV_0;
+		else
+			is_update = false;
+	}
 
-	if (p_cckpd_t->cur_cck_cca_thres != cca_th) {
-		
-		odm_write_1byte(p_dm, ODM_REG(CCK_CCA, p_dm), cca_th);
-		p_cckpd_t->cck_fa_ma = CCK_FA_MA_RESET;
+	/*[Abnormal case] =================================================*/
+	#if (DM_ODM_SUPPORT_TYPE & ODM_WIN)
+	/*@HP 22B LPS power consumption issue & [PCIE-1596]*/
+	if (dm->hp_hw_id && dm->traffic_load == TRAFFIC_ULTRA_LOW) {
+		lv = CCK_PD_LV_0;
+		PHYDM_DBG(dm, DBG_CCKPD, "CCKPD Abnormal case1\n");
+	} else if ((dm->p_advance_ota & PHYDM_ASUS_OTA_SETTING) &&
+	    cckpd_t->cck_fa_ma > 200 && dm->rssi_min <= 20) {
+		lv = CCK_PD_LV_1;
+		cckpd_t->cck_pd_lv = lv;
+		phydm_write_cck_pd_type1(dm, 0xc3); /*@for ASUS OTA test*/
+		is_update = false;
+		PHYDM_DBG(dm, DBG_CCKPD, "CCKPD Abnormal case2\n");
 	}
-	p_cckpd_t->cur_cck_cca_thres = cca_th;
+	#elif (DM_ODM_SUPPORT_TYPE & (ODM_AP))
+		#ifdef MCR_WIRELESS_EXTEND
+		lv = CCK_PD_LV_2;
+		cckpd_t->cck_pd_lv = lv;
+		phydm_write_cck_pd_type1(dm, 0x43);
+		is_update = false;
+		PHYDM_DBG(dm, DBG_CCKPD, "CCKPD Abnormal case3\n");
+		#endif
+	#endif
+	/*=================================================================*/
+
+	if (is_update)
+		phydm_set_cckpd_lv_type1(dm, lv);
+
+	PHYDM_DBG(dm, DBG_CCKPD, "is_linked=%d, lv=%d, pd_th=0x%x\n\n",
+		  dm->is_linked, cckpd_t->cck_pd_lv,
+		  cckpd_t->cur_cck_cca_thres);
+}
+#endif /*#ifdef PHYDM_COMPILE_CCKPD_TYPE1*/
+
+#ifdef PHYDM_COMPILE_CCKPD_TYPE2
+void phydm_write_cck_pd_type2(void *dm_void, u8 cca_th, u8 cca_th_aaa)
+{
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct phydm_cckpd_struct *cckpd_t = &dm->dm_cckpd_table;
+
+	PHYDM_DBG(dm, DBG_CCKPD, "[%s] pd_th=0x%x, cs_ratio=0x%x\n",
+		  __func__, cca_th, cca_th_aaa);
+
+	odm_set_bb_reg(dm, R_0xa08, 0x3f0000, cca_th);
+	odm_set_bb_reg(dm, R_0xaa8, 0x1f0000, cca_th_aaa);
+	cckpd_t->cur_cck_cca_thres = cca_th;
+	cckpd_t->cck_cca_th_aaa = cca_th_aaa;
 }
 
-void
-phydm_set_cckpd_val(
-	void			*p_dm_void,
-	u32			*val_buf,
-	u8			val_len
-)
+void phydm_set_cckpd_lv_type2(void *dm_void, enum cckpd_lv lv)
 {
-	struct PHY_DM_STRUCT	*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct phydm_cckpd_struct *cckpd_t = &dm->dm_cckpd_table;
+	u8 pd_th = 0, cs_ratio = 0, cs_2r_offset = 0;
+	u8 cck_n_rx = 1;
+
+	PHYDM_DBG(dm, DBG_CCKPD, "%s ======>\n", __func__);
+	PHYDM_DBG(dm, DBG_CCKPD, "lv: (%d) -> (%d)\n", cckpd_t->cck_pd_lv, lv);
 
+	/*@r_mrx & r_cca_mrc*/
+	cck_n_rx = (odm_get_bb_reg(dm, R_0xa2c, BIT(18)) &&
+		    odm_get_bb_reg(dm, R_0xa2c, BIT(22))) ? 2 : 1;
 
-	if (val_len != 2) {
-		PHYDM_DBG(p_dm, ODM_COMP_API, ("[Error][CCKPD]Need val_len=2\n"));
+	if (cckpd_t->cck_pd_lv == lv && cckpd_t->cck_n_rx == cck_n_rx) {
+		PHYDM_DBG(dm, DBG_CCKPD, "stay in lv=%d\n", lv);
 		return;
 	}
-	
-	/*val_buf[0]: 0xa0a*/
-	/*val_buf[1]: 0xaaa*/
-	
-	if (p_dm->support_ic_type & EXTEND_CCK_CCATH_AAA_IC) {
-		phydm_write_cck_cca_th_new_cs_ratio(p_dm, (u8)val_buf[0], (u8)val_buf[1]);
-	} else {
-		phydm_write_cck_cca_th(p_dm, (u8)val_buf[0]);
+
+	cckpd_t->cck_n_rx = cck_n_rx;
+	cckpd_t->cck_pd_lv = lv;
+	cckpd_t->cck_fa_ma = CCK_FA_MA_RESET;
+
+	if (lv == CCK_PD_LV_4) {
+		cs_ratio = cckpd_t->aaa_default + 8;
+		cs_2r_offset = 5;
+		pd_th = 0xd;
+	} else if (lv == CCK_PD_LV_3) {
+		cs_ratio = cckpd_t->aaa_default + 6;
+		cs_2r_offset = 4;
+		pd_th = 0xd;
+	} else if (lv == CCK_PD_LV_2) {
+		cs_ratio = cckpd_t->aaa_default + 4;
+		cs_2r_offset = 3;
+		pd_th = 0xd;
+	} else if (lv == CCK_PD_LV_1) {
+		cs_ratio = cckpd_t->aaa_default + 2;
+		cs_2r_offset = 1;
+		pd_th = 0x7;
+	} else if (lv == CCK_PD_LV_0) {
+		cs_ratio = cckpd_t->aaa_default;
+		cs_2r_offset = 0;
+		pd_th = 0x3;
 	}
 
+	if (cckpd_t->cck_n_rx == 2) {
+		if (cs_ratio >= cs_2r_offset)
+			cs_ratio = cs_ratio - cs_2r_offset;
+		else
+			cs_ratio = 0;
+	}
+	phydm_write_cck_pd_type2(dm, pd_th, cs_ratio);
 }
 
-boolean
-phydm_stop_cck_pd_th(
-	void		*p_dm_void
-)
+void phydm_cckpd_type2(void *dm_void)
 {
-	struct PHY_DM_STRUCT	*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct phydm_dig_struct *dig_t = &dm->dm_dig_table;
+	struct phydm_cckpd_struct *cckpd_t = &dm->dm_cckpd_table;
+	enum cckpd_lv lv = CCK_PD_LV_INIT;
+	u8 igi = dig_t->cur_ig_value;
+	u8 rssi_min = dm->rssi_min;
+	boolean is_update = true;
 
-	if (!(p_dm->support_ability & (ODM_BB_CCK_PD | ODM_BB_FA_CNT))) {
-		
-		PHYDM_DBG(p_dm, DBG_CCKPD, ("Not Support\n"));
+	PHYDM_DBG(dm, DBG_CCKPD, "%s ======>\n", __func__);
 
-		#if (DM_ODM_SUPPORT_TYPE & (ODM_AP))
-		#ifdef MCR_WIRELESS_EXTEND
-		phydm_write_cck_cca_th(p_dm, 0x43);
-		#endif
-		#endif
-		
-		return true;
+	if (dm->is_linked) {
+		if (igi > 0x38 && rssi_min > 32) {
+			lv = CCK_PD_LV_4;
+		} else if (igi > 0x2a && rssi_min > 32) {
+			lv = CCK_PD_LV_3;
+		} else if (igi > 0x24 || (rssi_min > 24 && rssi_min <= 30)) {
+			lv = CCK_PD_LV_2;
+		} else if (igi <= 0x24 || rssi_min < 22) {
+			if (cckpd_t->cck_fa_ma > 1000) {
+				lv = CCK_PD_LV_1;
+			} else if (cckpd_t->cck_fa_ma < 500) {
+				lv = CCK_PD_LV_0;
+			} else {
+				is_update = false;
+			}
+		} else {
+			is_update = false;
+		}
+	} else {
+		if (cckpd_t->cck_fa_ma > 1000) {
+			lv = CCK_PD_LV_1;
+		} else if (cckpd_t->cck_fa_ma < 500) {
+			lv = CCK_PD_LV_0;
+		} else {
+			is_update = false;
+		}
 	}
 
-	if (p_dm->pause_ability & ODM_BB_CCK_PD) {
-		
-		PHYDM_DBG(p_dm, DBG_CCKPD, ("Return: Pause CCKPD in LV=%d\n", p_dm->pause_lv_table.lv_cckpd));
-		return true;
+	/*[Abnormal case] =================================================*/
+	#if (DM_ODM_SUPPORT_TYPE & ODM_WIN)
+	/*@21C Miracast lag issue & [PCIE-3298]*/
+	if (dm->support_ic_type & ODM_RTL8821C && rssi_min > 60) {
+		lv = CCK_PD_LV_4;
+		cckpd_t->cck_pd_lv = lv;
+		phydm_write_cck_pd_type2(dm, 0x1d, (cckpd_t->aaa_default + 8));
+		is_update = false;
+		PHYDM_DBG(dm, DBG_CCKPD, "CCKPD Abnormal case1\n");
 	}
-
-	#if 0/*(DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_CE))*/
-	if (p_dm->ext_lna)
-		return true;
 	#endif
+	/*=================================================================*/
 
-	return false;
-	
+	if (is_update) {
+		phydm_set_cckpd_lv_type2(dm, lv);
+	}
+
+	PHYDM_DBG(dm, DBG_CCKPD,
+		  "is_linked=%d, lv=%d, n_rx=%d, cs_ratio=0x%x, pd_th=0x%x\n\n",
+		  dm->is_linked, cckpd_t->cck_pd_lv, cckpd_t->cck_n_rx,
+		  cckpd_t->cck_cca_th_aaa, cckpd_t->cur_cck_cca_thres);
 }
+#endif /*#ifdef PHYDM_COMPILE_CCKPD_TYPE2*/
 
-void
-phydm_cckpd(
-	void			*p_dm_void
-)
+#ifdef PHYDM_COMPILE_CCKPD_TYPE3
+void phydm_write_cck_pd_type3(void *dm_void, u8 pd_th, u8 cs_ratio,
+			      enum cckpd_mode mode)
 {
-	struct PHY_DM_STRUCT	*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	struct phydm_dig_struct	*p_dig_t = &p_dm->dm_dig_table;
-	struct phydm_cckpd_struct	*p_cckpd_t = &p_dm->dm_cckpd_table;
-	u8	cur_cck_cca_th= p_cckpd_t->cur_cck_cca_thres;
-
-	if (p_dm->is_linked) {
-#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_CE))
-
-		/*Add hp_hw_id condition due to 22B LPS power consumption issue and [PCIE-1596]*/
-		if (p_dm->hp_hw_id && (p_dm->traffic_load == TRAFFIC_ULTRA_LOW))
-			cur_cck_cca_th = 0x40;
-		else if (p_dm->rssi_min > 35)
-			cur_cck_cca_th = 0xcd;
-		else if (p_dm->rssi_min > 20) {
-			
-			if (p_cckpd_t->cck_fa_ma > 500)
-				cur_cck_cca_th = 0xcd;
-			else if (p_cckpd_t->cck_fa_ma < 250)
-				cur_cck_cca_th = 0x83;
-			
-		} else {
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct phydm_cckpd_struct *cckpd_t = &dm->dm_cckpd_table;
 
-			if((p_dm->p_advance_ota & PHYDM_ASUS_OTA_SETTING) && (p_cckpd_t->cck_fa_ma > 200))
-				cur_cck_cca_th = 0xc3; /*for ASUS OTA test*/
-			else
-				cur_cck_cca_th = 0x83;
+	PHYDM_DBG(dm, DBG_CCKPD,
+		  "[%s] mode=%d, pd_th=0x%x, cs_ratio=0x%x\n", __func__,
+		  mode, pd_th, cs_ratio);
+
+	switch (mode) {
+	case CCK_BW20_1R: /*RFBW20_1R*/
+	{
+		cckpd_t->cur_cck_pd_20m_1r = pd_th;
+		cckpd_t->cur_cck_cs_ratio_20m_1r = cs_ratio;
+		odm_set_bb_reg(dm, R_0xac8, 0xff, pd_th);
+		odm_set_bb_reg(dm, R_0xad0, 0x1f, cs_ratio);
+	} break;
+	case CCK_BW20_2R: /*RFBW20_2R*/
+	{
+		cckpd_t->cur_cck_pd_20m_2r = pd_th;
+		cckpd_t->cur_cck_cs_ratio_20m_2r = cs_ratio;
+		odm_set_bb_reg(dm, R_0xac8, 0xff00, pd_th);
+		odm_set_bb_reg(dm, R_0xad0, 0x3e0, cs_ratio);
+	} break;
+	case CCK_BW40_1R: /*RFBW40_1R*/
+	{
+		cckpd_t->cur_cck_pd_40m_1r = pd_th;
+		cckpd_t->cur_cck_cs_ratio_40m_1r = cs_ratio;
+		odm_set_bb_reg(dm, R_0xacc, 0xff, pd_th);
+		odm_set_bb_reg(dm, R_0xad0, 0x1f00000, cs_ratio);
+	} break;
+	case CCK_BW40_2R: /*RFBW40_2R*/
+	{
+		cckpd_t->cur_cck_pd_40m_2r = pd_th;
+		cckpd_t->cur_cck_cs_ratio_40m_2r = cs_ratio;
+		odm_set_bb_reg(dm, R_0xacc, 0xff00, pd_th);
+		odm_set_bb_reg(dm, R_0xad0, 0x3e000000, cs_ratio);
+	} break;
+
+	default:
+		/*@pr_debug("[%s] warning!\n", __func__);*/
+		break;
+	}
+}
+
+void phydm_set_cckpd_lv_type3(void *dm_void, enum cckpd_lv lv)
+{
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct phydm_cckpd_struct *cckpd_t = &dm->dm_cckpd_table;
+	enum cckpd_mode cck_mode = CCK_BW20_2R;
+	enum channel_width cck_bw = CHANNEL_WIDTH_20;
+	u8 cck_n_rx = 1;
+	u8 pd_th;
+	u8 cs_ratio;
+
+	PHYDM_DBG(dm, DBG_CCKPD, "%s ======>\n", __func__);
+	PHYDM_DBG(dm, DBG_CCKPD, "lv: (%d) -> (%d)\n", cckpd_t->cck_pd_lv, lv);
+
+	/*[Check Nrx]*/
+	cck_n_rx = (odm_get_bb_reg(dm, R_0xa2c, BIT(17))) ? 2 : 1;
+
+	/*[Check BW]*/
+	if (odm_get_bb_reg(dm, R_0x800, BIT(0)))
+		cck_bw = CHANNEL_WIDTH_40;
+	else
+		cck_bw = CHANNEL_WIDTH_20;
+
+	/*[Check LV]*/
+	if (cckpd_t->cck_pd_lv == lv &&
+	    cckpd_t->cck_n_rx == cck_n_rx &&
+	    cckpd_t->cck_bw == cck_bw) {
+		PHYDM_DBG(dm, DBG_CCKPD, "stay in lv=%d\n", lv);
+		return;
+	}
+
+	cckpd_t->cck_bw = cck_bw;
+	cckpd_t->cck_n_rx = cck_n_rx;
+	cckpd_t->cck_pd_lv = lv;
+	cckpd_t->cck_fa_ma = CCK_FA_MA_RESET;
+
+	if (cck_n_rx == 2) {
+		if (cck_bw == CHANNEL_WIDTH_20) {
+			pd_th = cckpd_t->cck_pd_20m_2r;
+			cs_ratio = cckpd_t->cck_cs_ratio_20m_2r;
+			cck_mode = CCK_BW20_2R;
+		} else {
+			pd_th = cckpd_t->cck_pd_40m_2r;
+			cs_ratio = cckpd_t->cck_cs_ratio_40m_2r;
+			cck_mode = CCK_BW40_2R;
 		}
-		
-#else	/*ODM_AP*/
-		if (p_dig_t->cur_ig_value > 0x32)
-			cur_cck_cca_th = 0xed;
-		else if (p_dig_t->cur_ig_value > 0x2a)
-			cur_cck_cca_th = 0xdd;
-		else if (p_dig_t->cur_ig_value > 0x24)
-			cur_cck_cca_th = 0xcd;
-		else 
-			cur_cck_cca_th = 0x83;
-		
-#endif
 	} else {
-	
-		if (p_cckpd_t->cck_fa_ma > 1000)
-			cur_cck_cca_th = 0x83;
-		else if (p_cckpd_t->cck_fa_ma < 500)
-			cur_cck_cca_th = 0x40;
+		if (cck_bw == CHANNEL_WIDTH_20) {
+			pd_th = cckpd_t->cck_pd_20m_1r;
+			cs_ratio = cckpd_t->cck_cs_ratio_20m_1r;
+			cck_mode = CCK_BW20_1R;
+		} else {
+			pd_th = cckpd_t->cck_pd_40m_1r;
+			cs_ratio = cckpd_t->cck_cs_ratio_40m_1r;
+			cck_mode = CCK_BW40_1R;
+		}
 	}
 
-	phydm_write_cck_cca_th(p_dm, cur_cck_cca_th);
-	/*PHYDM_DBG(p_dm, DBG_CCKPD, ("New cck_cca_th=((0x%x))\n\n", cur_cck_cca_th));*/
+	if (lv == CCK_PD_LV_4) {
+		if (cck_n_rx == 2) {
+			pd_th += 4;
+			cs_ratio += 2;
+		} else {
+			pd_th += 4;
+			cs_ratio += 3;
+		}
+	} else if (lv == CCK_PD_LV_3) {
+		if (cck_n_rx == 2) {
+			pd_th += 3;
+			cs_ratio += 1;
+		} else {
+			pd_th += 3;
+			cs_ratio += 2;
+		}
+	} else if (lv == CCK_PD_LV_2) {
+		pd_th += 2;
+		cs_ratio += 1;
+	} else if (lv == CCK_PD_LV_1) {
+		pd_th += 1;
+		cs_ratio += 1;
+	}
+	#if 0
+	else if (lv == CCK_PD_LV_0) {
+		pd_th += 0;
+		cs_ratio += 0;
+	}
+	#endif
 
+	phydm_write_cck_pd_type3(dm, pd_th, cs_ratio, cck_mode);
 }
 
-void
-phydm_cckpd_new_cs_ratio(
-	void			*p_dm_void
-)
+void phydm_cckpd_type3(void *dm_void)
 {
-	struct PHY_DM_STRUCT	*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	struct phydm_dig_struct	*p_dig_t = &p_dm->dm_dig_table;
-	struct phydm_cckpd_struct	*p_cckpd_t = &p_dm->dm_cckpd_table;
-	u8	pd_th = 0, cs_ration = 0, cs_2r_offset = 0;
-	u8	igi_curr = p_dig_t->cur_ig_value;
-	u8	en_2rcca;
-
-	PHYDM_DBG(p_dm, DBG_CCKPD, ("%s ======>\n", __func__));
-
-	en_2rcca = (u8)(odm_get_bb_reg(p_dm, 0xa2c, BIT(18)) && odm_get_bb_reg(p_dm, 0xa2c, BIT(22)));
-
-	if (p_dm->is_linked) {
-		
-		if ((igi_curr > 0x38) && (p_dm->rssi_min > 32)) {
-			cs_ration = p_dig_t->aaa_default + AAA_BASE + AAA_STEP * 2;
-			cs_2r_offset = 5;
-			pd_th = 0xd;
-		} else if ((igi_curr > 0x2a) && (p_dm->rssi_min > 32)) {
-			cs_ration = p_dig_t->aaa_default + AAA_BASE + AAA_STEP;
-			cs_2r_offset = 4;
-			pd_th = 0xd;
-		} else if ((igi_curr > 0x24) || (p_dm->rssi_min > 24 && p_dm->rssi_min <= 30)) {
-			cs_ration = p_dig_t->aaa_default + AAA_BASE;
-			cs_2r_offset = 3;
-			pd_th = 0xd;
-		} else if ((igi_curr <= 0x24) || (p_dm->rssi_min < 22)) {
-			
-			if (p_cckpd_t->cck_fa_ma > 1000) {
-				cs_ration = p_dig_t->aaa_default + AAA_STEP;
-				cs_2r_offset = 1;
-				pd_th = 0x7;
-			} else if (p_cckpd_t->cck_fa_ma < 500) {
-				cs_ration = p_dig_t->aaa_default;
-				pd_th = 0x3;
-			} else {
-				cs_ration = p_cckpd_t->cck_cca_th_aaa;
-				pd_th = p_cckpd_t->cur_cck_cca_thres;
-			}
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct phydm_cckpd_struct *cckpd_t = &dm->dm_cckpd_table;
+	enum cckpd_lv lv = CCK_PD_LV_INIT;
+	u8 igi = dm->dm_dig_table.cur_ig_value;
+	boolean is_update = true;
+	u8 pd_th = 0;
+	u8 cs_ratio = 0;
+
+	PHYDM_DBG(dm, DBG_CCKPD, "%s ======>\n", __func__);
+
+	if (dm->is_linked) {
+		if (igi > 0x38 && dm->rssi_min > 32) {
+			lv = CCK_PD_LV_4;
+		} else if ((igi > 0x2a) && (dm->rssi_min > 32)) {
+			lv = CCK_PD_LV_3;
+		} else if ((igi > 0x24) ||
+			   (dm->rssi_min > 24 && dm->rssi_min <= 30)) {
+			lv = CCK_PD_LV_2;
+		} else if ((igi <= 0x24) || (dm->rssi_min < 22)) {
+			if (cckpd_t->cck_fa_ma > 1000)
+				lv = CCK_PD_LV_1;
+			else if (cckpd_t->cck_fa_ma < 500)
+				lv = CCK_PD_LV_0;
+			else
+				is_update = false;
 		}
 	} else {
-	
-		if (p_cckpd_t->cck_fa_ma > 1000) {
-			cs_ration = p_dig_t->aaa_default + AAA_STEP;
-			cs_2r_offset = 1;
-			pd_th = 0x7;
-		} else if (p_cckpd_t->cck_fa_ma < 500) {
-			cs_ration = p_dig_t->aaa_default;
-			pd_th = 0x3;
+		if (cckpd_t->cck_fa_ma > 1000)
+			lv = CCK_PD_LV_1;
+		else if (cckpd_t->cck_fa_ma < 500)
+			lv = CCK_PD_LV_0;
+		else
+			is_update = false;
+	}
+
+	if (is_update)
+		phydm_set_cckpd_lv_type3(dm, lv);
+
+	if (cckpd_t->cck_n_rx == 2) {
+		if (cckpd_t->cck_bw == CHANNEL_WIDTH_20) {
+			pd_th = cckpd_t->cur_cck_pd_20m_2r;
+			cs_ratio = cckpd_t->cur_cck_cs_ratio_20m_2r;
+		} else {
+			pd_th = cckpd_t->cur_cck_pd_40m_2r;
+			cs_ratio = cckpd_t->cur_cck_cs_ratio_40m_2r;
+		}
+	} else {
+		if (cckpd_t->cck_bw == CHANNEL_WIDTH_20) {
+			pd_th = cckpd_t->cur_cck_pd_20m_1r;
+			cs_ratio = cckpd_t->cur_cck_cs_ratio_20m_1r;
 		} else {
-			cs_ration = p_cckpd_t->cck_cca_th_aaa;
-			pd_th = p_cckpd_t->cur_cck_cca_thres;
+			pd_th = cckpd_t->cur_cck_pd_40m_1r;
+			cs_ratio = cckpd_t->cur_cck_cs_ratio_40m_1r;
 		}
 	}
-	
-	if (en_2rcca)
-		cs_ration = (cs_ration >= cs_2r_offset) ? (cs_ration - cs_2r_offset) : 0;
+	PHYDM_DBG(dm, DBG_CCKPD,
+		  "[%dR][%dM] is_linked=%d, lv=%d, cs_ratio=0x%x, pd_th=0x%x\n\n",
+		  cckpd_t->cck_n_rx, 20 << cckpd_t->cck_bw, dm->is_linked,
+		  cckpd_t->cck_pd_lv, cs_ratio, pd_th);
+}
 
-	p_cckpd_t->cur_cck_cca_thres = pd_th;
-	p_cckpd_t->cck_cca_th_aaa = cs_ration;
+void phydm_cck_pd_init_type3(void *dm_void)
+{
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct phydm_cckpd_struct *cckpd_t = &dm->dm_cckpd_table;
+	u32 reg_tmp = 0;
 
-	PHYDM_DBG(p_dm, DBG_CCKPD, 
-	("[New] cs_ratio=0x%x, pd_th=0x%x\n", cs_ration, pd_th));
+	/*Get Default value*/
+	cckpd_t->cck_pd_20m_1r = (u8)odm_get_bb_reg(dm, R_0xac8, 0xff);
+	cckpd_t->cck_pd_20m_2r = (u8)odm_get_bb_reg(dm, R_0xac8, 0xff00);
+	cckpd_t->cck_pd_40m_1r = (u8)odm_get_bb_reg(dm, R_0xacc, 0xff);
+	cckpd_t->cck_pd_40m_2r = (u8)odm_get_bb_reg(dm, R_0xacc, 0xff00);
 
-	odm_set_bb_reg(p_dm, 0xa08, 0xf0000, pd_th);
-	odm_set_bb_reg(p_dm, 0xaa8, 0x1f0000, cs_ration);
+	reg_tmp = odm_get_bb_reg(dm, R_0xad0, MASKDWORD);
+	cckpd_t->cck_cs_ratio_20m_1r = (u8)(reg_tmp & 0x1f);
+	cckpd_t->cck_cs_ratio_20m_2r = (u8)((reg_tmp & 0x3e0) >> 5);
+	cckpd_t->cck_cs_ratio_40m_1r = (u8)((reg_tmp & 0x1f00000) >> 20);
+	cckpd_t->cck_cs_ratio_40m_2r = (u8)((reg_tmp & 0x3e000000) >> 25);
 
-	/*phydm_write_cck_cca_th_new_cs_ratio(p_dm, pd_th, cs_ration);*/
+	phydm_set_cckpd_lv_type3(dm, CCK_PD_LV_0);
 }
+#endif /*#ifdef PHYDM_COMPILE_CCKPD_TYPE3*/
 
-#endif
-
-void
-phydm_cck_pd_th(
-	void		*p_dm_void
-)
+#ifdef PHYDM_COMPILE_CCKPD_TYPE4
+void phydm_write_cck_pd_type4(void *dm_void, enum cckpd_lv lv,
+			      enum cckpd_mode mode)
 {
-#ifdef PHYDM_SUPPORT_CCKPD
-	struct PHY_DM_STRUCT	*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	struct phydm_fa_struct		*p_fa_t= &p_dm->false_alm_cnt;
-	struct phydm_cckpd_struct	*p_cckpd_t = &p_dm->dm_cckpd_table;
-	u32	cnt_cck_fail_tmp = p_fa_t->cnt_cck_fail;
-	#ifdef PHYDM_TDMA_DIG_SUPPORT
-	struct phydm_fa_acc_struct	*p_fa_acc_t = &p_dm->false_alm_cnt_acc;
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct phydm_cckpd_struct *cckpd_t = &dm->dm_cckpd_table;
+	u32 val = 0;
+
+	PHYDM_DBG(dm, DBG_CCKPD, "write CCK CCA parameters(CS_ratio & PD)\n");
+	switch (mode) {
+	case CCK_BW20_1R: /*RFBW20_1R*/
+	{
+		val = cckpd_t->cck_pd_table_jgr3[0][0][0][lv];
+		odm_set_bb_reg(dm, R_0x1ac8, 0xff, val);
+		val = cckpd_t->cck_pd_table_jgr3[0][0][1][lv];
+		odm_set_bb_reg(dm, R_0x1ad0, 0x1f, val);
+	} break;
+	case CCK_BW40_1R: /*RFBW40_1R*/
+	{
+		val = cckpd_t->cck_pd_table_jgr3[1][0][0][lv];
+		odm_set_bb_reg(dm, R_0x1acc, 0xff, val);
+		val = cckpd_t->cck_pd_table_jgr3[1][0][1][lv];
+		odm_set_bb_reg(dm, R_0x1ad0, 0x01F00000, val);
+	} break;
+	#if (defined(PHYDM_COMPILE_ABOVE_2SS))
+	case CCK_BW20_2R: /*RFBW20_2R*/
+	{
+		val = cckpd_t->cck_pd_table_jgr3[0][1][0][lv];
+		odm_set_bb_reg(dm, R_0x1ac8, 0xff00, val);
+		val = cckpd_t->cck_pd_table_jgr3[0][1][1][lv];
+		odm_set_bb_reg(dm, R_0x1ad0, 0x3e0, val);
+	} break;
+	case CCK_BW40_2R: /*RFBW40_2R*/
+	{
+		val = cckpd_t->cck_pd_table_jgr3[1][1][0][lv];
+		odm_set_bb_reg(dm, R_0x1acc, 0xff00, val);
+		val = cckpd_t->cck_pd_table_jgr3[1][1][1][lv];
+		odm_set_bb_reg(dm, R_0x1ad0, 0x3E000000, val);
+	} break;
 	#endif
-	
-	PHYDM_DBG(p_dm, DBG_CCKPD, ("%s ======>\n", __func__));
+	#if (defined(PHYDM_COMPILE_ABOVE_3SS))
+	case CCK_BW20_3R: /*RFBW20_3R*/
+	{
+		val = cckpd_t->cck_pd_table_jgr3[0][2][0][lv];
+		odm_set_bb_reg(dm, R_0x1ac8, 0xff0000, val);
+		val = cckpd_t->cck_pd_table_jgr3[0][2][1][lv];
+		odm_set_bb_reg(dm, R_0x1ad0, 0x7c00, val);
+	} break;
+	case CCK_BW40_3R: /*RFBW40_3R*/
+	{
+		val = cckpd_t->cck_pd_table_jgr3[1][2][0][lv];
+		odm_set_bb_reg(dm, R_0x1acc, 0xff0000, val);
+		val = cckpd_t->cck_pd_table_jgr3[1][2][1][lv] & 0x3;
+		odm_set_bb_reg(dm, R_0x1ad0, 0xC0000000, val);
+		val = (cckpd_t->cck_pd_table_jgr3[1][2][1][lv] & 0x1c) >> 2;
+		odm_set_bb_reg(dm, R_0x1ad4, 0x7, val);
+	} break;
+	#endif
+	#if (defined(PHYDM_COMPILE_ABOVE_4SS))
+	case CCK_BW20_4R: /*RFBW20_4R*/
+	{
+		val = cckpd_t->cck_pd_table_jgr3[0][3][0][lv];
+		odm_set_bb_reg(dm, R_0x1ac8, 0xff000000, val);
+		val = cckpd_t->cck_pd_table_jgr3[0][3][1][lv];
+		odm_set_bb_reg(dm, R_0x1ad0, 0xF8000, val);
+	} break;
+	case CCK_BW40_4R: /*RFBW40_4R*/
+	{
+		val = cckpd_t->cck_pd_table_jgr3[1][3][0][lv];
+		odm_set_bb_reg(dm, R_0x1acc, 0xff000000, val);
+		val = cckpd_t->cck_pd_table_jgr3[1][3][1][lv];
+		odm_set_bb_reg(dm, R_0x1ad4, 0xf8, val);
+	} break;
+	#endif
+	default:
+		/*@pr_debug("[%s] warning!\n", __func__);*/
+		break;
+	}
+}
 
-	if (phydm_stop_cck_pd_th(p_dm) == true)
-		return;
+void phydm_set_cck_pd_lv_type4(void *dm_void, enum cckpd_lv lv)
+{
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct phydm_cckpd_struct *cckpd_t = &dm->dm_cckpd_table;
+	enum cckpd_mode cck_mode = CCK_BW20_2R;
+	enum channel_width cck_bw = CHANNEL_WIDTH_20;
+	u8 cck_n_rx = 0;
+	u32 val = 0;
+	/*u32 val_dbg = 0;*/
 
-#ifdef PHYDM_TDMA_DIG_SUPPORT
-	cnt_cck_fail_tmp = (p_dm->original_dig_restore) ? (p_fa_t->cnt_cck_fail) : (p_fa_acc_t->cnt_cck_fail_1sec);
-#endif
-	
-	if (p_cckpd_t->cck_fa_ma == CCK_FA_MA_RESET)
-		p_cckpd_t->cck_fa_ma = cnt_cck_fail_tmp;
-	else {
-		p_cckpd_t->cck_fa_ma = ((p_cckpd_t->cck_fa_ma << 1) +
-									p_cckpd_t->cck_fa_ma + cnt_cck_fail_tmp) >> 2;
-	}
-	
-	PHYDM_DBG(p_dm, DBG_CCKPD, ("CCK FA=%d\n", p_cckpd_t->cck_fa_ma));
-
-	if (p_dm->support_ic_type & EXTEND_CCK_CCATH_AAA_IC)
-		phydm_cckpd_new_cs_ratio(p_dm);
+	PHYDM_DBG(dm, DBG_CCKPD, "%s ======>\n", __func__);
+	PHYDM_DBG(dm, DBG_CCKPD, "lv: (%d) -> (%d)\n", cckpd_t->cck_pd_lv, lv);
+
+	/*[Check Nrx]*/
+	cck_n_rx = (u8)odm_get_bb_reg(dm, R_0x1a2c, 0x60000) + 1;
+
+	/*[Check BW]*/
+	val = odm_get_bb_reg(dm, R_0x9b0, 0xc);
+	if (val == 0)
+		cck_bw = CHANNEL_WIDTH_20;
+	else if (val == 1)
+		cck_bw = CHANNEL_WIDTH_40;
 	else
-		phydm_cckpd(p_dm);
-	
-#endif
+		cck_bw = CHANNEL_WIDTH_80;
+
+	/*[Check LV]*/
+	if (cckpd_t->cck_pd_lv == lv &&
+	    cckpd_t->cck_n_rx == cck_n_rx &&
+	    cckpd_t->cck_bw == cck_bw) {
+		PHYDM_DBG(dm, DBG_CCKPD, "stay in lv=%d\n", lv);
+		return;
+	}
+
+	cckpd_t->cck_bw = cck_bw;
+	cckpd_t->cck_n_rx = cck_n_rx;
+	cckpd_t->cck_pd_lv = lv;
+	cckpd_t->cck_fa_ma = CCK_FA_MA_RESET;
+
+	switch (cck_n_rx) {
+	case 1: /*1R*/
+	{
+		if (cck_bw == CHANNEL_WIDTH_20)
+			cck_mode = CCK_BW20_1R;
+		else if (cck_bw == CHANNEL_WIDTH_40)
+			cck_mode = CCK_BW40_1R;
+	} break;
+	#if (defined(PHYDM_COMPILE_ABOVE_2SS))
+	case 2: /*2R*/
+	{
+		if (cck_bw == CHANNEL_WIDTH_20)
+			cck_mode = CCK_BW20_2R;
+		else if (cck_bw == CHANNEL_WIDTH_40)
+			cck_mode = CCK_BW40_2R;
+	} break;
+	#endif
+	#if (defined(PHYDM_COMPILE_ABOVE_3SS))
+	case 3: /*3R*/
+	{
+		if (cck_bw == CHANNEL_WIDTH_20)
+			cck_mode = CCK_BW20_3R;
+		else if (cck_bw == CHANNEL_WIDTH_40)
+			cck_mode = CCK_BW40_3R;
+	} break;
+	#endif
+	#if (defined(PHYDM_COMPILE_ABOVE_4SS))
+	case 4: /*4R*/
+	{
+		if (cck_bw == CHANNEL_WIDTH_20)
+			cck_mode = CCK_BW20_4R;
+		else if (cck_bw == CHANNEL_WIDTH_40)
+			cck_mode = CCK_BW40_4R;
+	} break;
+	#endif
+	default:
+		/*@pr_debug("[%s] warning!\n", __func__);*/
+		break;
+	}
+phydm_write_cck_pd_type4(dm, lv, cck_mode);
 }
 
-void
-odm_pause_cck_packet_detection(
-	void					*p_dm_void,
-	enum phydm_pause_type		pause_type,
-	enum phydm_pause_level		pause_lv,
-	u8					cck_pd_th
-)
+void phydm_read_cckpd_para_type4(void *dm_void)
 {
-#ifdef PHYDM_SUPPORT_CCKPD
-	struct PHY_DM_STRUCT	*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	struct phydm_cckpd_struct	*p_cckpd_t = &p_dm->dm_cckpd_table;
-	s8	max_level;
-	u8	i;
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct phydm_cckpd_struct *cckpd_t = &dm->dm_cckpd_table;
+	u8 bw = 0; /*r_RX_RF_BW*/
+	u8 n_rx = 0;
+	u8 curr_cck_pd_t[2][4][2];
+	u32 reg0 = 0;
+	u32 reg1 = 0;
+	u32 reg2 = 0;
+	u32 reg3 = 0;
 
-	PHYDM_DBG(p_dm, DBG_CCKPD, ("%s ======>\n", __func__));
+	bw = (u8)odm_get_bb_reg(dm, R_0x9b0, 0xc);
+	n_rx = (u8)odm_get_bb_reg(dm, R_0x1a2c, 0x60000) + 1;
 
-	if ((p_cckpd_t->pause_bitmap == 0) &&
-		(!(p_dm->support_ability & (ODM_BB_CCK_PD | ODM_BB_FA_CNT)))) {
-		
-		PHYDM_DBG(p_dm, DBG_CCKPD, ("Return: not support\n"));
-		return;
+	reg0 = odm_get_bb_reg(dm, R_0x1ac8, MASKDWORD);
+	reg1 = odm_get_bb_reg(dm, R_0x1acc, MASKDWORD);
+	reg2 = odm_get_bb_reg(dm, R_0x1ad0, MASKDWORD);
+	reg3 = odm_get_bb_reg(dm, R_0x1ad4, MASKDWORD);
+	curr_cck_pd_t[0][0][0] = (u8)(reg0 & 0x000000ff);
+	curr_cck_pd_t[1][0][0] = (u8)(reg1 & 0x000000ff);
+	curr_cck_pd_t[0][0][1] = (u8)(reg2 & 0x0000001f);
+	curr_cck_pd_t[1][0][1] = (u8)((reg2 & 0x01f00000) >> 20);
+	#if (defined(PHYDM_COMPILE_ABOVE_2SS))
+	if (dm->support_ic_type & PHYDM_IC_ABOVE_2SS) {
+		curr_cck_pd_t[0][1][0] = (u8)((reg0 & 0x0000ff00) >> 8);
+		curr_cck_pd_t[1][1][0] = (u8)((reg1 & 0x0000ff00) >> 8);
+		curr_cck_pd_t[0][1][1] = (u8)((reg2 & 0x000003E0) >> 5);
+		curr_cck_pd_t[1][1][1] = (u8)((reg2 & 0x3E000000) >> 25);
 	}
+	#endif
+	#if (defined(PHYDM_COMPILE_ABOVE_3SS))
+	if (dm->support_ic_type & PHYDM_IC_ABOVE_3SS) {
+		curr_cck_pd_t[0][2][0] = (u8)((reg0 & 0x00ff0000) >> 16);
+		curr_cck_pd_t[1][2][0] = (u8)((reg1 & 0x00ff0000) >> 16);
+		curr_cck_pd_t[0][2][1] = (u8)((reg2 & 0x00007C00) >> 10);
+		curr_cck_pd_t[1][2][1] = (u8)((reg2 & 0xC0000000) >> 30) |
+					 (u8)((reg3 & 0x00000007) << 3);
+	}
+	#endif
+	#if (defined(PHYDM_COMPILE_ABOVE_4SS))
+	if (dm->support_ic_type & PHYDM_IC_ABOVE_4SS) {
+		curr_cck_pd_t[0][3][0] = (u8)((reg0 & 0xff000000) >> 24);
+		curr_cck_pd_t[1][3][0] = (u8)((reg1 & 0xff000000) >> 24);
+		curr_cck_pd_t[0][3][1] = (u8)((reg2 & 0x000F8000) >> 15);
+		curr_cck_pd_t[1][3][1] = (u8)((reg3 & 0x000000F8) >> 3);
+	}
+	#endif
 
-	if (pause_lv >= PHYDM_PAUSE_MAX_NUM) {
-		PHYDM_DBG(p_dm, DBG_CCKPD, ("Return: Wrong LV !\n"));
-		return;
+	PHYDM_DBG(dm, DBG_CCKPD, "bw=%dM, Nrx=%d\n", 20 << bw, n_rx);
+	PHYDM_DBG(dm, DBG_CCKPD, "lv=%d, readback CS_th=0x%x, PD th=0x%x\n",
+		  cckpd_t->cck_pd_lv,
+		  curr_cck_pd_t[bw][n_rx - 1][1],
+		  curr_cck_pd_t[bw][n_rx - 1][0]);
+}
+
+void phydm_cckpd_type4(void *dm_void)
+{
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct phydm_cckpd_struct *cckpd_t = &dm->dm_cckpd_table;
+	u8 igi = dm->dm_dig_table.cur_ig_value;
+	enum cckpd_lv lv = 0;
+	boolean is_update = true;
+
+	PHYDM_DBG(dm, DBG_CCKPD, "%s ======>\n", __func__);
+
+	if (dm->is_linked) {
+		PHYDM_DBG(dm, DBG_CCKPD, "Linked!!!\n");
+		if (igi > 0x38 && dm->rssi_min > 32) {
+			lv = CCK_PD_LV_4;
+			PHYDM_DBG(dm, DBG_CCKPD, "Order 1\n");
+		} else if (igi > 0x2a && dm->rssi_min > 32) {
+			lv = CCK_PD_LV_3;
+			PHYDM_DBG(dm, DBG_CCKPD, "Order 2\n");
+		} else if (igi > 0x24 || dm->rssi_min > 24) {
+			lv = CCK_PD_LV_2;
+			PHYDM_DBG(dm, DBG_CCKPD, "Order 3\n");
+		} else {
+			if (cckpd_t->cck_fa_ma > 1000) {
+				lv = CCK_PD_LV_1;
+				PHYDM_DBG(dm, DBG_CCKPD, "Order 4-1\n");
+			} else if (cckpd_t->cck_fa_ma < 500) {
+				lv = CCK_PD_LV_0;
+				PHYDM_DBG(dm, DBG_CCKPD, "Order 4-2\n");
+			} else {
+				is_update = false;
+				PHYDM_DBG(dm, DBG_CCKPD, "Order 4-3\n");
+			}
+		}
+	} else {
+		PHYDM_DBG(dm, DBG_CCKPD, "UnLinked!!!\n");
+		if (cckpd_t->cck_fa_ma > 1000) {
+			lv = CCK_PD_LV_1;
+			PHYDM_DBG(dm, DBG_CCKPD, "Order 1\n");
+		} else if (cckpd_t->cck_fa_ma < 500) {
+			lv = CCK_PD_LV_0;
+			PHYDM_DBG(dm, DBG_CCKPD, "Order 2\n");
+		} else {
+			is_update = false;
+			PHYDM_DBG(dm, DBG_CCKPD, "Order 3\n");
+		}
 	}
-	PHYDM_DBG(p_dm, DBG_CCKPD, ("Set pause{Type, LV, val} = {%d, %d, 0x%x}\n", 
-		pause_type, pause_lv, cck_pd_th));
 
-	PHYDM_DBG(p_dm, DBG_CCKPD, ("pause LV=0x%x\n", p_cckpd_t->pause_bitmap));
+	if (is_update) {
+		phydm_set_cck_pd_lv_type4(dm, lv);
 
-	for (i = 0; i < PHYDM_PAUSE_MAX_NUM; i ++) {
-		PHYDM_DBG(p_dm, DBG_CCKPD, ("pause val[%d]=0x%x\n", 
-										i, p_cckpd_t->pause_cckpd_value[i]));
+		PHYDM_DBG(dm, DBG_CCKPD, "setting CS_th = 0x%x, PD th = 0x%x\n",
+			  cckpd_t->cck_pd_table_jgr3[cckpd_t->cck_bw]
+			  [cckpd_t->cck_n_rx - 1][1][lv],
+			  cckpd_t->cck_pd_table_jgr3[cckpd_t->cck_bw]
+			  [cckpd_t->cck_n_rx - 1][0][lv]);
 	}
 
-	switch (pause_type) {
+	phydm_read_cckpd_para_type4(dm);
+}
 
-	case PHYDM_PAUSE:
-	{
-		/* Disable CCK PD */
-		p_dm->support_ability &= ~ODM_BB_CCK_PD;
-		
-		PHYDM_DBG(p_dm, DBG_CCKPD, ("Pause CCK PD th\n"));
-
-		/* Backup original CCK PD threshold decided by CCK PD mechanism */
-		if (p_cckpd_t->pause_bitmap == 0) {
-			
-			p_cckpd_t->cckpd_bkp = p_cckpd_t->cur_cck_cca_thres;
-			
-			PHYDM_DBG(p_dm, DBG_CCKPD, ("cckpd_bkp=0x%x\n", 
-				p_cckpd_t->cckpd_bkp));
-		}
+void phydm_cck_pd_init_type4(void *dm_void)
+{
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct phydm_cckpd_struct *cckpd_t = &dm->dm_cckpd_table;
+	u32 reg0 = 0;
+	u32 reg1 = 0;
+	u32 reg2 = 0;
+	u32 reg3 = 0;
+	u8 pd_step = 0;
+	u8 cck_bw = 0; /*r_RX_RF_BW*/
+	u8 cck_n_rx = 0;
+	u8 val = 0;
+	u8 i = 0;
 
-		p_cckpd_t->pause_bitmap |= BIT(pause_lv); /* Update pause level */
-		p_cckpd_t->pause_cckpd_value[pause_lv] = cck_pd_th; 
+	PHYDM_DBG(dm, DBG_CCKPD, "[%s]======>\n", __func__);
 
-		/* Write new CCK PD threshold */
-		if (BIT(pause_lv + 1) > p_cckpd_t->pause_bitmap) {
+	#if 0
+	/*@
+	 *cckpd_t[0][0][0][0] =  1ac8[7:0]	r_PD_lim_RFBW20_1R
+	 *cckpd_t[0][1][0][0] =  1ac8[15:8]	r_PD_lim_RFBW20_2R
+	 *cckpd_t[0][2][0][0] =  1ac8[23:16]	r_PD_lim_RFBW20_3R
+	 *cckpd_t[0][3][0][0] =  1ac8[31:24]	r_PD_lim_RFBW20_4R
+	 *cckpd_t[1][0][0][0] =  1acc[7:0]	r_PD_lim_RFBW40_1R
+	 *cckpd_t[1][1][0][0] =  1acc[15:8]	r_PD_lim_RFBW40_2R
+	 *cckpd_t[1][2][0][0] =  1acc[23:16]	r_PD_lim_RFBW40_3R
+	 *cckpd_t[1][3][0][0] =  1acc[31:24]	r_PD_lim_RFBW40_4R
+	 *
+	 *
+	 *cckpd_t[0][0][1][0] =  1ad0[4:0]	r_CS_ratio_RFBW20_1R[4:0]
+	 *cckpd_t[0][1][1][0] =  1ad0[9:5]	r_CS_ratio_RFBW20_2R[4:0]
+	 *cckpd_t[0][2][1][0] =  1ad0[14:10]	r_CS_ratio_RFBW20_3R[4:0]
+	 *cckpd_t[0][3][1][0] =  1ad0[19:15]	r_CS_ratio_RFBW20_4R[4:0]
+	 *cckpd_t[1][0][1][0] =  1ad0[24:20]	r_CS_ratio_RFBW40_1R[4:0]
+	 *cckpd_t[1][1][1][0] =  1ad0[29:25]	r_CS_ratio_RFBW40_2R[4:0]
+	 *cckpd_t[1][2][1][0] =  1ad0[31:30]	r_CS_ratio_RFBW40_3R[1:0]
+	 *			  1ad4[2:0]	r_CS_ratio_RFBW40_3R[4:2]
+	 *cckpd_t[1][3][1][0] =  1ad4[7:3]	r_CS_ratio_RFBW40_4R[4:0]
+	 */
+	#endif
+	/*[Check Nrx]*/
+	cck_n_rx = (u8)odm_get_bb_reg(dm, R_0x1a2c, 0x60000) + 1;
 
-			PHYDM_DBG(p_dm, DBG_CCKPD, ("> ori pause LV=0x%x\n", 
-				p_cckpd_t->pause_bitmap));
-			
-			phydm_write_cck_cca_th(p_dm, cck_pd_th);
-		}
-		break;
-	}
-	case PHYDM_RESUME:
-	{
-		/* check if the level is illegal or not */
-		if ((p_cckpd_t->pause_bitmap & (BIT(pause_lv))) != 0) {
-			
-			p_cckpd_t->pause_bitmap &= (~(BIT(pause_lv)));
-			p_cckpd_t->pause_cckpd_value[pause_lv] = 0;
-			PHYDM_DBG(p_dm, DBG_CCKPD, ("Resume CCK PD\n"));
-		} else {
-		
-			PHYDM_DBG(p_dm, DBG_CCKPD, ("Wrong resume LV\n"));
-			break;
+	/*[Check BW]*/
+	val = (u8)odm_get_bb_reg(dm, R_0x9b0, 0xc);
+	if (val == 0)
+		cck_bw = CHANNEL_WIDTH_20;
+	else if (val == 1)
+		cck_bw = CHANNEL_WIDTH_40;
+	else
+		cck_bw = CHANNEL_WIDTH_80;
+
+	cckpd_t->cck_bw = cck_bw;
+	cckpd_t->cck_n_rx = cck_n_rx;
+	reg0 = odm_get_bb_reg(dm, R_0x1ac8, MASKDWORD);
+	reg1 = odm_get_bb_reg(dm, R_0x1acc, MASKDWORD);
+	reg2 = odm_get_bb_reg(dm, R_0x1ad0, MASKDWORD);
+	reg3 = odm_get_bb_reg(dm, R_0x1ad4, MASKDWORD);
+
+	for (i = 0 ; i < CCK_PD_LV_MAX ; i++) {
+		pd_step = i * 2;
+
+		val = (u8)(reg0 & 0x000000ff) + pd_step;
+		PHYDM_DBG(dm, DBG_CCKPD, "lvl %d val = %x\n\n", i, val);
+		cckpd_t->cck_pd_table_jgr3[0][0][0][i] = val;
+
+		val = (u8)(reg1 & 0x000000ff) + pd_step;
+		cckpd_t->cck_pd_table_jgr3[1][0][0][i] = val;
+
+		val = (u8)(reg2 & 0x0000001F) + pd_step;
+		cckpd_t->cck_pd_table_jgr3[0][0][1][i] = val;
+
+		val = (u8)((reg2 & 0x01F00000) >> 20) + pd_step;
+		cckpd_t->cck_pd_table_jgr3[1][0][1][i] = val;
+
+		#ifdef PHYDM_COMPILE_ABOVE_2SS
+		if (dm->support_ic_type & PHYDM_IC_ABOVE_2SS) {
+			val = (u8)((reg0 & 0x0000ff00) >> 8) + pd_step;
+			cckpd_t->cck_pd_table_jgr3[0][1][0][i] = val;
+
+			val = (u8)((reg1 & 0x0000ff00) >> 8) + pd_step;
+			cckpd_t->cck_pd_table_jgr3[1][1][0][i] = val;
+
+			val = (u8)((reg2 & 0x000003E0) >> 5) + pd_step;
+			cckpd_t->cck_pd_table_jgr3[0][1][1][i] = val;
+
+			val = (u8)((reg2 & 0x3E000000) >> 25) + pd_step;
+			cckpd_t->cck_pd_table_jgr3[1][1][1][i] = val;
 		}
+		#endif
 
-		/* Resume CCKPD */
-		if (p_cckpd_t->pause_bitmap == 0) {
-			
-			PHYDM_DBG(p_dm, DBG_CCKPD,("Revert bkp_CCKPD=0x%x\n", 
-														p_cckpd_t->cckpd_bkp));
-			
-			phydm_write_cck_cca_th(p_dm, p_cckpd_t->cckpd_bkp);
-			p_dm->support_ability |= ODM_BB_CCK_PD;/* Enable CCKPD */
-			break;
+		#ifdef PHYDM_COMPILE_ABOVE_3SS
+		if (dm->support_ic_type & PHYDM_IC_ABOVE_3SS) {
+			val = (u8)((reg0 & 0x00ff0000) >> 16) + pd_step;
+			cckpd_t->cck_pd_table_jgr3[0][2][0][i] = val;
+
+			val = (u8)((reg1 & 0x00ff0000) >> 16) + pd_step;
+			cckpd_t->cck_pd_table_jgr3[1][2][0][i] = val;
+			val = (u8)((reg2 & 0x00007C00) >> 10) + pd_step;
+			cckpd_t->cck_pd_table_jgr3[0][2][1][i] = val;
+			val = (u8)(((reg2 & 0xC0000000) >> 30) |
+			      ((reg3 & 0x7) << 3)) + pd_step;
+			cckpd_t->cck_pd_table_jgr3[1][2][1][i] = val;
 		}
+		#endif
 
-		if (BIT(pause_lv) > p_cckpd_t->pause_bitmap) {
+		#ifdef PHYDM_COMPILE_ABOVE_4SS
+		if (dm->support_ic_type & PHYDM_IC_ABOVE_4SS) {
+			val = (u8)((reg0 & 0xff000000) >> 24) + pd_step;
+			cckpd_t->cck_pd_table_jgr3[0][3][0][i] = val;
 
-			/* Calculate the maximum level now */
-			for (max_level = (pause_lv - 1); max_level >= 0; max_level--) {
-				if (p_cckpd_t->pause_bitmap & BIT(max_level))
-					break;
-			}
+			val = (u8)((reg1 & 0xff000000) >> 24) + pd_step;
+			cckpd_t->cck_pd_table_jgr3[1][3][0][i] = val;
+
+			val = (u8)((reg2 & 0x000F8000) >> 15) + pd_step;
+			cckpd_t->cck_pd_table_jgr3[0][3][1][i] = val;
 
-			/* write CCKPD of lower level */
-			phydm_write_cck_cca_th(p_dm, p_cckpd_t->pause_cckpd_value[max_level]);
-			PHYDM_DBG(p_dm, DBG_CCKPD, ("Write CCKPD=0x%x for max_LV=%d\n",
-				p_cckpd_t->pause_cckpd_value[max_level], max_level));
-			break;
+			val = (u8)((reg3 & 0x000000F8) >> 3) + pd_step;
+			cckpd_t->cck_pd_table_jgr3[1][3][1][i] = val;
 		}
-		break;
+		#endif
+	}
+}
+#endif /*#ifdef PHYDM_COMPILE_CCKPD_TYPE4*/
+
+void phydm_set_cckpd_val(void *dm_void, u32 *val_buf, u8 val_len)
+{
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct phydm_cckpd_struct *cckpd_t = &dm->dm_cckpd_table;
+	enum cckpd_lv lv;
+
+	if (val_len != 1) {
+		PHYDM_DBG(dm, ODM_COMP_API, "[Error][CCKPD]Need val_len=1\n");
+		return;
+	}
+
+	lv = (enum cckpd_lv)val_buf[0];
+
+	if (lv > CCK_PD_LV_4) {
+		pr_debug("[%s] warning! lv=%d\n", __func__, lv);
+		return;
 	}
+
+	switch (cckpd_t->cckpd_hw_type) {
+	#ifdef PHYDM_COMPILE_CCKPD_TYPE1
+	case 1:
+		phydm_set_cckpd_lv_type1(dm, lv);
+		break;
+	#endif
+	#ifdef PHYDM_COMPILE_CCKPD_TYPE2
+	case 2:
+		phydm_set_cckpd_lv_type2(dm, lv);
+		break;
+	#endif
+	#ifdef PHYDM_COMPILE_CCKPD_TYPE3
+	case 3:
+		phydm_set_cckpd_lv_type3(dm, lv);
+		break;
+	#endif
+	#ifdef PHYDM_COMPILE_CCKPD_TYPE4
+	case 4:
+		phydm_set_cck_pd_lv_type4(dm, lv);
+		break;
+	#endif
 	default:
-		PHYDM_DBG(p_dm, DBG_CCKPD,("Wrong  type\n"));
+		pr_debug("[%s]warning\n", __func__);
 		break;
 	}
+}
+
+boolean
+phydm_stop_cck_pd_th(void *dm_void)
+{
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+
+	if (!(dm->support_ability & (ODM_BB_CCK_PD | ODM_BB_FA_CNT))) {
+		PHYDM_DBG(dm, DBG_CCKPD, "Not Support\n");
+		return true;
+	}
 
-	PHYDM_DBG(p_dm, DBG_CCKPD, ("New pause bitmap=0x%x\n", 
-													p_cckpd_t->pause_bitmap));
-	
-	for (i = 0; i < PHYDM_PAUSE_MAX_NUM; i ++) {
-		PHYDM_DBG(p_dm, DBG_CCKPD, ("pause val[%d]=0x%x\n", 
-										i, p_cckpd_t->pause_cckpd_value[i]));
+	if (dm->pause_ability & ODM_BB_CCK_PD) {
+		PHYDM_DBG(dm, DBG_CCKPD, "Return: Pause CCKPD in LV=%d\n",
+			  dm->pause_lv_table.lv_cckpd);
+		return true;
+	}
+
+	if (dm->is_linked && (*dm->channel > 36)) {
+		PHYDM_DBG(dm, DBG_CCKPD, "Return: 5G CH=%d\n", *dm->channel);
+		return true;
 	}
-#endif
+	return false;
 }
 
-void
-phydm_cck_pd_init(
-	void		*p_dm_void
-)
+void phydm_cck_pd_th(void *dm_void)
 {
-#ifdef PHYDM_SUPPORT_CCKPD
-	struct PHY_DM_STRUCT		*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	struct phydm_cckpd_struct		*p_cckpd_t = &p_dm->dm_cckpd_table;
-	struct phydm_dig_struct		*p_dig_t = &p_dm->dm_dig_table;
-
-	p_cckpd_t->cur_cck_cca_thres = 0;
-	p_cckpd_t->cck_cca_th_aaa = 0;
-	
-	p_cckpd_t->pause_bitmap = 0;
-
-	if (p_dm->support_ic_type & EXTEND_CCK_CCATH_AAA_IC)
-		p_dig_t->aaa_default = odm_read_1byte(p_dm, 0xaaa) & 0x1f;
-	
-	odm_memory_set(p_dm, p_cckpd_t->pause_cckpd_value, 0, PHYDM_PAUSE_MAX_NUM);
-#endif
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct phydm_fa_struct *fa_t = &dm->false_alm_cnt;
+	struct phydm_cckpd_struct *cckpd_t = &dm->dm_cckpd_table;
+	u32 cck_fa = fa_t->cnt_cck_fail;
+	#ifdef PHYDM_TDMA_DIG_SUPPORT
+	struct phydm_fa_acc_struct *fa_acc_t = &dm->false_alm_cnt_acc;
+	#endif
+
+	PHYDM_DBG(dm, DBG_CCKPD, "[%s] ======>\n", __func__);
+
+	if (phydm_stop_cck_pd_th(dm))
+		return;
+
+	#ifdef PHYDM_TDMA_DIG_SUPPORT
+	if (dm->original_dig_restore)
+		cck_fa = fa_t->cnt_cck_fail;
+	else
+		cck_fa = fa_acc_t->cnt_cck_fail_1sec;
+	#endif
+
+	if (cckpd_t->cck_fa_ma == CCK_FA_MA_RESET)
+		cckpd_t->cck_fa_ma = cck_fa;
+	else
+		cckpd_t->cck_fa_ma = (cckpd_t->cck_fa_ma * 3 + cck_fa) >> 2;
+
+	PHYDM_DBG(dm, DBG_CCKPD,
+		  "IGI=0x%x, rssi_min=%d, cck_fa=%d, cck_fa_ma=%d\n",
+		  dm->dm_dig_table.cur_ig_value, dm->rssi_min,
+		  cck_fa, cckpd_t->cck_fa_ma);
+
+	switch (cckpd_t->cckpd_hw_type) {
+	#ifdef PHYDM_COMPILE_CCKPD_TYPE1
+	case 1:
+		phydm_cckpd_type1(dm);
+		break;
+	#endif
+	#ifdef PHYDM_COMPILE_CCKPD_TYPE2
+	case 2:
+		phydm_cckpd_type2(dm);
+		break;
+	#endif
+	#ifdef PHYDM_COMPILE_CCKPD_TYPE3
+	case 3:
+		phydm_cckpd_type3(dm);
+		break;
+	#endif
+	#ifdef PHYDM_COMPILE_CCKPD_TYPE4
+	case 4:
+		phydm_cckpd_type4(dm);
+		break;
+	#endif
+	default:
+		pr_debug("[%s]warning\n", __func__);
+		break;
+	}
 }
 
+void phydm_cck_pd_init(void *dm_void)
+{
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct phydm_cckpd_struct *cckpd_t = &dm->dm_cckpd_table;
+
+	if (dm->support_ic_type & CCK_PD_IC_TYPE1)
+		cckpd_t->cckpd_hw_type = 1;
+	else if (dm->support_ic_type & CCK_PD_IC_TYPE2)
+		cckpd_t->cckpd_hw_type = 2;
+	else if (dm->support_ic_type & CCK_PD_IC_TYPE3)
+		cckpd_t->cckpd_hw_type = 3;
+	else if (dm->support_ic_type & CCK_PD_IC_TYPE4)
+		cckpd_t->cckpd_hw_type = 4;
+
+	PHYDM_DBG(dm, DBG_CCKPD, "[%s] cckpd_hw_type=%d\n",
+		  __func__, cckpd_t->cckpd_hw_type);
+
+	cckpd_t->cck_pd_lv = CCK_PD_LV_INIT;
+	cckpd_t->cck_n_rx = 0xff;
+	cckpd_t->cck_bw = CHANNEL_WIDTH_MAX;
+
+	switch (cckpd_t->cckpd_hw_type) {
+	#ifdef PHYDM_COMPILE_CCKPD_TYPE1
+	case 1:
+		phydm_set_cckpd_lv_type1(dm, CCK_PD_LV_0);
+		break;
+	#endif
+	#ifdef PHYDM_COMPILE_CCKPD_TYPE2
+	case 2:
+		cckpd_t->aaa_default = odm_read_1byte(dm, 0xaaa) & 0x1f;
+		phydm_set_cckpd_lv_type2(dm, CCK_PD_LV_0);
+		break;
+	#endif
+	#ifdef PHYDM_COMPILE_CCKPD_TYPE3
+	case 3:
+		phydm_cck_pd_init_type3(dm);
+		break;
+	#endif
+	#ifdef PHYDM_COMPILE_CCKPD_TYPE4
+	case 4:
+		phydm_cck_pd_init_type4(dm);
+		break;
+	#endif
+	default:
+		pr_debug("[%s]warning\n", __func__);
+		break;
+	}
+}
+#endif /*#ifdef PHYDM_SUPPORT_CCKPD*/
 
diff --git a/rtl8723DS/hal/phydm/phydm_cck_pd.h b/rtl8723DS/hal/phydm/phydm_cck_pd.h
index 9337b76..f8c8625 100755..100644
--- a/rtl8723DS/hal/phydm/phydm_cck_pd.h
+++ b/rtl8723DS/hal/phydm/phydm_cck_pd.h
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2007 - 2017 Realtek Corporation.
+ * Copyright(c) 2007 - 2017  Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -8,78 +8,148 @@
  *
  * This program is distributed in the hope that it will be useful, but WITHOUT
  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  * more details.
  *
+ * The full GNU General Public License is included in this distribution in the
+ * file called LICENSE.
+ *
+ * Contact Information:
+ * wlanfae <wlanfae@realtek.com>
+ * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
+ * Hsinchu 300, Taiwan.
+ *
+ * Larry Finger <Larry.Finger@lwfinger.net>
+ *
  *****************************************************************************/
 
+#ifndef __PHYDM_CCK_PD_H__
+#define __PHYDM_CCK_PD_H__
 
-#ifndef	__PHYDM_CCK_PD_H__
-#define    __PHYDM_CCK_PD_H__
-
-#define CCK_PD_VERSION	"1.0"		/* 2017.05.09  Dino, Add phydm_cck_pd.h*/
-
+#define CCK_PD_VERSION "3.1"
 
-/* 1 ============================================================
+/*@
+ * 1 ============================================================
  * 1  Definition
- * 1 ============================================================ */
+ * 1 ============================================================
+ */
+#define CCK_FA_MA_RESET 0xffffffff
+
+/*@Run time flag of CCK_PD HW type*/
+#define CCK_PD_IC_TYPE1 (ODM_RTL8188E | ODM_RTL8812 | ODM_RTL8821 |\
+			ODM_RTL8192E | ODM_RTL8723B | ODM_RTL8814A |\
+			ODM_RTL8881A | ODM_RTL8822B | ODM_RTL8703B |\
+			ODM_RTL8195A | ODM_RTL8188F)
+
+#define CCK_PD_IC_TYPE2 (ODM_RTL8197F | ODM_RTL8821C | ODM_RTL8723D |\
+			ODM_RTL8710B | ODM_RTL8195B) /*extend 0xaaa*/
+
+#define CCK_PD_IC_TYPE3 (ODM_RTL8192F | ODM_RTL8721D)
+/*@extend for different bw & path*/
+
+#define CCK_PD_IC_TYPE4 ODM_IC_JGR3_SERIES /*@extend for different bw & path*/
+
+/*@Compile time flag of CCK_PD HW type*/
+#if (RTL8188E_SUPPORT || RTL8812A_SUPPORT || RTL8821A_SUPPORT ||\
+	RTL8192E_SUPPORT || RTL8723B_SUPPORT || RTL8814A_SUPPORT ||\
+	RTL8881A_SUPPORT || RTL8822B_SUPPORT || RTL8703B_SUPPORT ||\
+	RTL8195A_SUPPORT || RTL8188F_SUPPORT)
+	#define PHYDM_COMPILE_CCKPD_TYPE1 /*@only 0xa0a*/
+#endif
 
+#if (RTL8197F_SUPPORT || RTL8821C_SUPPORT || RTL8723D_SUPPORT ||\
+	RTL8710B_SUPPORT || RTL8195B_SUPPORT)
+	#define PHYDM_COMPILE_CCKPD_TYPE2 /*@extend 0xaaa*/
+#endif
 
-#define	AAA_BASE	4
-#define	AAA_STEP	2
+#if (RTL8192F_SUPPORT || RTL8721D_SUPPORT)
+	#define PHYDM_COMPILE_CCKPD_TYPE3 /*@extend for different & path*/
+#endif
 
-#define	CCK_FA_MA_RESET	0xffffffff
+#ifdef PHYDM_IC_JGR3_SERIES_SUPPORT
+	#define PHYDM_COMPILE_CCKPD_TYPE4 /*@extend for different bw & path*/
+#endif
+/*@
+ * 1 ============================================================
+ * 1  enumeration
+ * 1 ============================================================
+ */
+enum cckpd_lv {
+	CCK_PD_LV_INIT = 0xff,
+	CCK_PD_LV_0 = 0,
+	CCK_PD_LV_1 = 1,
+	CCK_PD_LV_2 = 2,
+	CCK_PD_LV_3 = 3,
+	CCK_PD_LV_4 = 4,
+	CCK_PD_LV_MAX = 5
+};
+
+enum cckpd_mode {
+	CCK_BW20_1R = 0,
+	CCK_BW20_2R = 1,
+	CCK_BW20_3R = 2,
+	CCK_BW20_4R = 3,
+	CCK_BW40_1R = 4,
+	CCK_BW40_2R = 5,
+	CCK_BW40_3R = 6,
+	CCK_BW40_4R = 7
+};
 
-#define	EXTEND_CCK_CCATH_AAA_IC	(ODM_RTL8197F | ODM_RTL8821C | ODM_RTL8723D |ODM_RTL8710B)
-/* 1 ============================================================
+/*@
+ * 1 ============================================================
  * 1  structure
- * 1 ============================================================ */
+ * 1 ============================================================
+ */
 
 #ifdef PHYDM_SUPPORT_CCKPD
 struct phydm_cckpd_struct {
-
-	u8		cur_cck_cca_thres; /*0xA0A*/
-	u8		cck_cca_th_aaa; /*0xAAA*/
+	u8		cckpd_hw_type;
+	u8		cur_cck_cca_thres; /*@current cck_pd value 0xa0a*/
 	u32		cck_fa_ma;
-	u8		cckpd_bkp;
-	u32		rvrt_val[2];
-	u8		pause_bitmap;/*will be removed*/
+	u8		rvrt_val;
 	u8		pause_lv;
-	u8		pause_cckpd_value[PHYDM_PAUSE_MAX_NUM]; /*will be removed*/
+	u8		cck_n_rx;
+	enum channel_width cck_bw;
+	enum cckpd_lv	cck_pd_lv;
+	#ifdef PHYDM_COMPILE_CCKPD_TYPE2
+	u8		cck_cca_th_aaa; /*@current cs_ratio value 0xaaa*/
+	u8		aaa_default;	/*@Init cs_ratio value - 0xaaa*/
+	#endif
+	#ifdef PHYDM_COMPILE_CCKPD_TYPE3
+	/*Default value*/
+	u8		cck_pd_20m_1r;
+	u8		cck_pd_20m_2r;
+	u8		cck_pd_40m_1r;
+	u8		cck_pd_40m_2r;
+	u8		cck_cs_ratio_20m_1r;
+	u8		cck_cs_ratio_20m_2r;
+	u8		cck_cs_ratio_40m_1r;
+	u8		cck_cs_ratio_40m_2r;
+	/*Current value*/
+	u8		cur_cck_pd_20m_1r;
+	u8		cur_cck_pd_20m_2r;
+	u8		cur_cck_pd_40m_1r;
+	u8		cur_cck_pd_40m_2r;
+	u8		cur_cck_cs_ratio_20m_1r;
+	u8		cur_cck_cs_ratio_20m_2r;
+	u8		cur_cck_cs_ratio_40m_1r;
+	u8		cur_cck_cs_ratio_40m_2r;
+	#endif
+	#ifdef PHYDM_COMPILE_CCKPD_TYPE4
+	/*@[bw][nrx][0:PD/1:CS][lv]*/
+	u8		cck_pd_table_jgr3[2][4][2][CCK_PD_LV_MAX];
+	#endif
 };
 #endif
 
-/* 1 ============================================================
- * 1  enumeration
- * 1 ============================================================ */
-
-/* 1 ============================================================
+/*@
+ * 1 ============================================================
  * 1  function prototype
- * 1 ============================================================ */
-
-void
-phydm_set_cckpd_val(
-	void			*p_dm_void,
-	u32			*val_buf,
-	u8			val_len
-);
-
-void
-phydm_cck_pd_th(
-	void		*p_dm_void
-);
-
-void
-odm_pause_cck_packet_detection(
-	void					*p_dm_void,
-	enum phydm_pause_type		pause_type,
-	enum phydm_pause_level		pause_level,
-	u8					cck_pd_threshold
-);
-
-void
-phydm_cck_pd_init(
-	void		*p_dm_void
-);
+ * 1 ============================================================
+ */
+void phydm_set_cckpd_val(void *dm_void, u32 *val_buf, u8 val_len);
+
+void phydm_cck_pd_th(void *dm_void);
 
+void phydm_cck_pd_init(void *dm_void);
 #endif
diff --git a/rtl8723DS/hal/phydm/phydm_ccx.c b/rtl8723DS/hal/phydm/phydm_ccx.c
index 183dd24..7ac54da 100755..100644
--- a/rtl8723DS/hal/phydm/phydm_ccx.c
+++ b/rtl8723DS/hal/phydm/phydm_ccx.c
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2007 - 2017 Realtek Corporation.
+ * Copyright(c) 2007 - 2017  Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -8,1156 +8,1795 @@
  *
  * This program is distributed in the hope that it will be useful, but WITHOUT
  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  * more details.
  *
+ * The full GNU General Public License is included in this distribution in the
+ * file called LICENSE.
+ *
+ * Contact Information:
+ * wlanfae <wlanfae@realtek.com>
+ * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
+ * Hsinchu 300, Taiwan.
+ *
+ * Larry Finger <Larry.Finger@lwfinger.net>
+ *
  *****************************************************************************/
 
 #include "mp_precomp.h"
 #include "phydm_precomp.h"
 
+void phydm_ccx_hw_restart(void *dm_void)
+			  /*@Will Restart NHM/CLM/FAHM simultaneously*/
+{
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	u32 reg1 = 0;
+
+	if (dm->support_ic_type & ODM_IC_11AC_SERIES)
+		reg1 = R_0x994;
+	#ifdef PHYDM_IC_JGR3_SERIES_SUPPORT
+	else if (dm->support_ic_type & ODM_IC_JGR3_SERIES)
+		reg1 = R_0x1e60;
+	#endif
+	else
+		reg1 = R_0x890;
+
+	PHYDM_DBG(dm, DBG_ENV_MNTR, "[%s]===>\n", __func__);
+	/*@disable NHM,CLM, FAHM*/
+	odm_set_bb_reg(dm, reg1, 0x7, 0x0);
+	odm_set_bb_reg(dm, reg1, BIT(8), 0x0);
+	odm_set_bb_reg(dm, reg1, BIT(8), 0x1);
+}
+
 #ifdef FAHM_SUPPORT
 
-u16
-phydm_hw_divider(
-	void	*p_dm_void,
-	u16	numerator,
-	u16	denumerator
-)
+u16 phydm_hw_divider(void *dm_void, u16 numerator, u16 denumerator)
 {
-	struct PHY_DM_STRUCT	*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	u16	result = DEVIDER_ERROR;
-	u32	tmp_u32 = ((numerator << 16) | denumerator);
-	u32	reg_devider_input;
-	u32	reg_devider_rpt;
-	u8	i;
-
-	PHYDM_DBG(p_dm, DBG_ENV_MNTR, ("[%s]===>\n", __FUNCTION__));
-
-	if (p_dm->support_ic_type & ODM_IC_11AC_SERIES) {
-		reg_devider_input =  0x1cbc;
-		reg_devider_rpt = 0x1f98;
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	u16 result = DEVIDER_ERROR;
+	u32 tmp_u32 = ((numerator << 16) | denumerator);
+	u32 reg_devider_input;
+	u32 reg;
+	u8 i;
+
+	PHYDM_DBG(dm, DBG_ENV_MNTR, "[%s]===>\n", __func__);
+
+	if (dm->support_ic_type & ODM_IC_11AC_SERIES) {
+		reg_devider_input = 0x1cbc;
+		reg = 0x1f98;
 	} else {
-		reg_devider_input =  0x980;
-		reg_devider_rpt = 0x9f0;
+		reg_devider_input = 0x980;
+		reg = 0x9f0;
 	}
 
-	odm_set_bb_reg(p_dm, reg_devider_input, MASKDWORD, tmp_u32);
+	odm_set_bb_reg(dm, reg_devider_input, MASKDWORD, tmp_u32);
 
 	for (i = 0; i < 10; i++) {
 		ODM_delay_ms(1);
-		if (odm_get_bb_reg(p_dm, reg_devider_rpt, BIT(24))) { /*Chk HW rpt is ready*/
-			
-			result = (u16)odm_get_bb_reg(p_dm, reg_devider_rpt, MASKBYTE2);
+		if (odm_get_bb_reg(dm, reg, BIT(24))) {
+		/*@Chk HW rpt is ready*/
+
+			result = (u16)odm_get_bb_reg(dm, reg, MASKBYTE2);
 			break;
 		}
 	}
-	return	result;
+	return result;
 }
 
-void
-phydm_fahm_trigger(
-	void		*p_dm_void,
-	u16		trigger_period	/*unit (4us)*/
-)
-{
-	struct PHY_DM_STRUCT	*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	struct _CCX_INFO			*ccx_info = &p_dm->dm_ccx_info;
-	u32		fahm_reg1;
-	u32		fahm_reg2;
+void phydm_fahm_trigger(void *dm_void, u16 tgr_period)
+{ /*@unit (4us)*/
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	u32 fahm_reg1;
 
-	if (p_dm->support_ic_type & ODM_IC_11AC_SERIES) {
+	if (dm->support_ic_type & ODM_IC_11AC_SERIES) {
+		odm_set_bb_reg(dm, R_0x1cf8, 0xffff00, tgr_period);
 
-		odm_set_bb_reg(p_dm, 0x1cf8, 0xffff00, trigger_period);
-		
-		fahm_reg1 =  0x994;
+		fahm_reg1 = 0x994;
 	} else {
-	
-		odm_set_bb_reg(p_dm, 0x978, 0xff000000, (trigger_period & 0xff));		
-		odm_set_bb_reg(p_dm, 0x97c, 0xff, (trigger_period & 0xff00)>>8);
-		
-		fahm_reg1 =  0x890;
+		odm_set_bb_reg(dm, R_0x978, 0xff000000, (tgr_period & 0xff));
+		odm_set_bb_reg(dm, R_0x97c, 0xff, (tgr_period & 0xff00) >> 8);
+
+		fahm_reg1 = 0x890;
 	}
 
-	odm_set_bb_reg(p_dm, fahm_reg1, BIT(2), 0);
-	odm_set_bb_reg(p_dm, fahm_reg1, BIT(2), 1);
+	odm_set_bb_reg(dm, fahm_reg1, BIT(2), 0);
+	odm_set_bb_reg(dm, fahm_reg1, BIT(2), 1);
 }
 
-void
-phydm_fahm_set_valid_cnt(
-	void		*p_dm_void,
-	u8		numerator_sel,
-	u8		denumerator_sel
-)
+void phydm_fahm_set_valid_cnt(void *dm_void, u8 numerator_sel,
+			      u8 denominator_sel)
 {
-	struct PHY_DM_STRUCT	*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	struct _CCX_INFO			*ccx_info = &p_dm->dm_ccx_info;
-	u32		fahm_reg1;
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct ccx_info *ccx_info = &dm->dm_ccx_info;
+	u32 fahm_reg1;
 
-	PHYDM_DBG(p_dm, DBG_ENV_MNTR, ("[%s]===>\n", __FUNCTION__));
+	PHYDM_DBG(dm, DBG_ENV_MNTR, "[%s]===>\n", __func__);
 
-	if ((ccx_info->fahm_nume_sel == numerator_sel) && 
-		(ccx_info->fahm_denum_sel == denumerator_sel)) {
-
-		PHYDM_DBG(p_dm, DBG_ENV_MNTR, ("no need to update\n", __FUNCTION__));
+	if (ccx_info->fahm_nume_sel == numerator_sel &&
+	    ccx_info->fahm_denom_sel == denominator_sel) {
+		PHYDM_DBG(dm, DBG_ENV_MNTR, "no need to update\n");
 		return;
 	}
 
 	ccx_info->fahm_nume_sel = numerator_sel;
-	ccx_info->fahm_denum_sel = denumerator_sel;
-	
-	if (p_dm->support_ic_type & ODM_IC_11AC_SERIES) {
-		fahm_reg1 =  0x994;
-	} else {
-		fahm_reg1 =  0x890;
-	}
+	ccx_info->fahm_denom_sel = denominator_sel;
+
+	if (dm->support_ic_type & ODM_IC_11AC_SERIES)
+		fahm_reg1 = 0x994;
+	else
+		fahm_reg1 = 0x890;
 
-	odm_set_bb_reg(p_dm, fahm_reg1, 0xe0, numerator_sel);
-	odm_set_bb_reg(p_dm, fahm_reg1, 0x7000, denumerator_sel);
+	odm_set_bb_reg(dm, fahm_reg1, 0xe0, numerator_sel);
+	odm_set_bb_reg(dm, fahm_reg1, 0x7000, denominator_sel);
 }
 
-void
-phydm_get_fahm_result(
-	void		*p_dm_void
-)
+void phydm_fahm_get_result(void *dm_void)
 {
-	struct PHY_DM_STRUCT	*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	struct _CCX_INFO			*ccx_info = &p_dm->dm_ccx_info;
-	u16		fahm_rpt_cnt[12];	/*packet count*/
-	u16		fahm_rpt[12];		/*percentage*/
-	u16		fahm_denumerator;	/*packet count*/
-	u32		reg_rpt, reg_rpt_2;
-	u32		reg_val_tmp;
-	boolean	is_ready = false;
-	u8		i;
-
-	PHYDM_DBG(p_dm, DBG_ENV_MNTR, ("[%s]===>\n", __FUNCTION__));
-	
-	if (p_dm->support_ic_type & ODM_IC_11AC_SERIES) {
-		reg_rpt =  0x1f80;
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	u16 fahm_cnt[12]; /*packet count*/
+	u16 fahm_rpt[12]; /*percentage*/
+	u16 denominator; /*@fahm_denominator packet count*/
+	u32 reg_rpt, reg_rpt_2;
+	u32 reg_tmp;
+	boolean is_ready = false;
+	u8 i;
+
+	PHYDM_DBG(dm, DBG_ENV_MNTR, "[%s]===>\n", __func__);
+
+	if (dm->support_ic_type & ODM_IC_11AC_SERIES) {
+		reg_rpt = 0x1f80;
 		reg_rpt_2 = 0x1f98;
 	} else {
-		reg_rpt =  0x9d8;
+		reg_rpt = 0x9d8;
 		reg_rpt_2 = 0x9f0;
 	}
 
-	for (i = 0; i < 10; i++) {
-		
-		if (odm_get_bb_reg(p_dm, reg_rpt_2, BIT(31))) { /*Chk HW rpt is ready*/
-			
+	for (i = 0; i < 3; i++) {
+		if (odm_get_bb_reg(dm, reg_rpt_2, BIT(31))) {
+		/*@Chk HW rpt is ready*/
 			is_ready = true;
 			break;
 		}
 		ODM_delay_ms(1);
 	}
 
-	if (is_ready == false)
+	if (!is_ready)
 		return;
 
-	/*Get Denumerator*/
-	fahm_denumerator = (u16)odm_get_bb_reg(p_dm, reg_rpt_2, MASKLWORD);
+	/*@Get FAHM Denominator*/
+	denominator = (u16)odm_get_bb_reg(dm, reg_rpt_2, MASKLWORD);
 
-	PHYDM_DBG(p_dm, DBG_ENV_MNTR, ("Reg[0x%x] fahm_denmrtr = %d\n", reg_rpt_2, fahm_denumerator));
-	
+	PHYDM_DBG(dm, DBG_ENV_MNTR, "Reg[0x%x] fahm_denmrtr = %d\n", reg_rpt_2,
+		  denominator);
 
-	/*Get nemerator*/
-	for (i = 0; i<6; i++) {
-		reg_val_tmp = odm_get_bb_reg(p_dm, reg_rpt + (i<<2), MASKDWORD);
-		
-		PHYDM_DBG(p_dm, DBG_ENV_MNTR, ("Reg[0x%x] fahm_denmrtr = %d\n", (p_dm, reg_rpt + (i*4), reg_val_tmp)));
-		
-		fahm_rpt_cnt[i*2] = (u16)(reg_val_tmp & MASKLWORD);
-		fahm_rpt_cnt[i*2 +1] = (u16)((reg_val_tmp & MASKHWORD)>>16);
-	}
+	/*@Get FAHM nemerator*/
+	for (i = 0; i < 6; i++) {
+		reg_tmp = odm_get_bb_reg(dm, reg_rpt + (i << 2), MASKDWORD);
 
-	for (i = 0; i<12; i++) {
-		fahm_rpt[i] = phydm_hw_divider(p_dm, fahm_rpt_cnt[i], fahm_denumerator);
-	}
+		PHYDM_DBG(dm, DBG_ENV_MNTR, "Reg[0x%x] fahm_denmrtr = %d\n",
+			  reg_rpt + (i * 4), reg_tmp);
 
-	PHYDM_DBG(p_dm, DBG_ENV_MNTR,("FAHM_RPT_cnt[10:0]=[%d, %d, %d, %d, %d(IGI), %d, %d, %d, %d, %d, %d, %d]\n",
-		fahm_rpt_cnt[11], fahm_rpt_cnt[10], fahm_rpt_cnt[9], fahm_rpt_cnt[8], fahm_rpt_cnt[7], fahm_rpt_cnt[6], 
-		fahm_rpt_cnt[5], fahm_rpt_cnt[4], fahm_rpt_cnt[3], fahm_rpt_cnt[2], fahm_rpt_cnt[1], fahm_rpt_cnt[0]));
+		fahm_cnt[i * 2] = (u16)(reg_tmp & MASKLWORD);
+		fahm_cnt[i * 2 + 1] = (u16)((reg_tmp & MASKHWORD) >> 16);
+	}
 
-	PHYDM_DBG(p_dm, DBG_ENV_MNTR,("FAHM_RPT_%[10:0]=[%d, %d, %d, %d, %d(IGI), %d, %d, %d, %d, %d, %d, %d]\n",
-		fahm_rpt[11], fahm_rpt[10], fahm_rpt[9], fahm_rpt[8], fahm_rpt[7], fahm_rpt[6], 
-		fahm_rpt[5], fahm_rpt[4], fahm_rpt[3], fahm_rpt[2], fahm_rpt[1], fahm_rpt[0]));
-	
+	for (i = 0; i < 12; i++)
+		fahm_rpt[i] = phydm_hw_divider(dm, fahm_cnt[i], denominator);
+
+	PHYDM_DBG(dm, DBG_ENV_MNTR,
+		  "FAHM_RPT_cnt[10:0]=[%d, %d, %d, %d, %d(IGI), %d, %d, %d, %d, %d, %d, %d]\n",
+		  fahm_cnt[11], fahm_cnt[10], fahm_cnt[9],
+		  fahm_cnt[8], fahm_cnt[7], fahm_cnt[6],
+		  fahm_cnt[5], fahm_cnt[4], fahm_cnt[3],
+		  fahm_cnt[2], fahm_cnt[1], fahm_cnt[0]);
+
+	PHYDM_DBG(dm, DBG_ENV_MNTR,
+		  "FAHM_RPT[10:0]=[%d, %d, %d, %d, %d(IGI), %d, %d, %d, %d, %d, %d, %d]\n",
+		  fahm_rpt[11], fahm_rpt[10], fahm_rpt[9], fahm_rpt[8],
+		  fahm_rpt[7], fahm_rpt[6], fahm_rpt[5], fahm_rpt[4],
+		  fahm_rpt[3], fahm_rpt[2], fahm_rpt[1], fahm_rpt[0]);
 }
 
-void
-phydm_set_fahm_th_by_igi(
-	void		*p_dm_void,
-	u8		igi
-)
+void phydm_fahm_set_th_by_igi(void *dm_void, u8 igi)
 {
-	struct PHY_DM_STRUCT	*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	struct _CCX_INFO			*ccx_info = &p_dm->dm_ccx_info;
-	u8	fahm_th[11];
-	u8	rssi_th[11];	/*in RSSI scale*/
-	u8	th_gap = 2 * IGI_TO_NHM_TH_MULTIPLIER;	/*beacuse unit is 0.5dB for FAHM*/
-	u8	i;
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct ccx_info *ccx_info = &dm->dm_ccx_info;
+	u32 val = 0;
+	u8 f_th[11]; /*@FAHM Threshold*/
+	u8 rssi_th[11]; /*@in RSSI scale*/
+	u8 th_gap = 2 * IGI_TO_NHM_TH_MULTIPLIER; /*unit is 0.5dB for FAHM*/
+	u8 i;
 
-	PHYDM_DBG(p_dm, DBG_ENV_MNTR, ("[%s]===>\n", __FUNCTION__));
+	PHYDM_DBG(dm, DBG_ENV_MNTR, "[%s]===>\n", __func__);
 
 	if (ccx_info->env_mntr_igi == igi) {
-		PHYDM_DBG(p_dm, DBG_ENV_MNTR, ("No need to update FAHM_th, IGI=0x%x\n", ccx_info->env_mntr_igi));
+		PHYDM_DBG(dm, DBG_ENV_MNTR,
+			  "No need to update FAHM_th, IGI=0x%x\n",
+			  ccx_info->env_mntr_igi);
 		return;
 	}
 
-	ccx_info->env_mntr_igi = igi;	/*bkp IGI*/
+	ccx_info->env_mntr_igi = igi; /*@bkp IGI*/
 
-	if (igi >= CCA_CAP) 
-		fahm_th[0] = (igi - CCA_CAP) * IGI_TO_NHM_TH_MULTIPLIER;
+	if (igi >= CCA_CAP)
+		f_th[0] = (igi - CCA_CAP) * IGI_TO_NHM_TH_MULTIPLIER;
 	else
-		fahm_th[0] = 0;
-	
-	rssi_th[0] = igi -10 - CCA_CAP;
-	
+		f_th[0] = 0;
+
+	rssi_th[0] = igi - 10 - CCA_CAP;
+
 	for (i = 1; i <= 10; i++) {
-		fahm_th[i] = fahm_th[0] + th_gap * i;
-		rssi_th[i] = rssi_th[0] +  (i<<1);
+		f_th[i] = f_th[0] + th_gap * i;
+		rssi_th[i] = rssi_th[0] + (i << 1);
 	}
 
-	PHYDM_DBG(p_dm, DBG_ENV_MNTR,("FAHM_RSSI_th[10:0]=[%d, %d, %d, (IGI)%d, %d, %d, %d, %d, %d, %d, %d]\n",
-		rssi_th[10], rssi_th[9], rssi_th[8], rssi_th[7], rssi_th[6], rssi_th[5], rssi_th[4], rssi_th[3], rssi_th[2], rssi_th[1], rssi_th[0]));
-
-	if (p_dm->support_ic_type & ODM_IC_11AC_SERIES) {
-		
-		odm_set_bb_reg(p_dm, 0x1c38, 0xffffff00, ((fahm_th[2]<<24) |(fahm_th[1]<<16) | (fahm_th[0]<<8)));
-		odm_set_bb_reg(p_dm, 0x1c78, 0xffffff00, ((fahm_th[5]<<24) |(fahm_th[4]<<16) | (fahm_th[3]<<8)));
-		odm_set_bb_reg(p_dm, 0x1c7c, 0xffffff00, ((fahm_th[7]<<24) |(fahm_th[6]<<16)));
-		odm_set_bb_reg(p_dm, 0x1cb8, 0xffffff00, ((fahm_th[10]<<24) |(fahm_th[9]<<16) | (fahm_th[8]<<8)));
+	PHYDM_DBG(dm, DBG_ENV_MNTR,
+		  "FAHM_RSSI_th[10:0]=[%d, %d, %d, (IGI)%d, %d, %d, %d, %d, %d, %d, %d]\n",
+		  rssi_th[10], rssi_th[9], rssi_th[8], rssi_th[7], rssi_th[6],
+		  rssi_th[5], rssi_th[4], rssi_th[3], rssi_th[2], rssi_th[1],
+		  rssi_th[0]);
+
+	if (dm->support_ic_type & ODM_IC_11AC_SERIES) {
+		val = BYTE_2_DWORD(0, f_th[2], f_th[1], f_th[0]);
+		odm_set_bb_reg(dm, R_0x1c38, 0xffffff00, val);
+		val = BYTE_2_DWORD(0, f_th[5], f_th[4], f_th[3]);
+		odm_set_bb_reg(dm, R_0x1c78, 0xffffff00, val);
+		val = BYTE_2_DWORD(0, 0, f_th[7], f_th[6]);
+		odm_set_bb_reg(dm, R_0x1c7c, 0xffff0000, val);
+		val = BYTE_2_DWORD(0, f_th[10], f_th[9], f_th[8]);
+		odm_set_bb_reg(dm, R_0x1cb8, 0xffffff00, val);
 	} else {
-
-		odm_set_bb_reg(p_dm, 0x970, MASKDWORD, ((fahm_th[3]<<24) |(fahm_th[2]<<16) | (fahm_th[1]<<8) | fahm_th[0]));
-		odm_set_bb_reg(p_dm, 0x974, MASKDWORD, ((fahm_th[7]<<24) |(fahm_th[6]<<16) | (fahm_th[5]<<8) | fahm_th[4]));
-		odm_set_bb_reg(p_dm, 0x978, MASKDWORD, ((fahm_th[10]<<16) | (fahm_th[9]<<8) | fahm_th[8]));
-	}	
+		val = BYTE_2_DWORD(f_th[3], f_th[2], f_th[1], f_th[0]);
+		odm_set_bb_reg(dm, R_0x970, MASKDWORD, val);
+		val = BYTE_2_DWORD(f_th[7], f_th[6], f_th[5], f_th[4]);
+		odm_set_bb_reg(dm, R_0x974, MASKDWORD, val);
+		val = BYTE_2_DWORD(0, f_th[10], f_th[9], f_th[8]);
+		odm_set_bb_reg(dm, R_0x978, 0xffffff, val);
+	}
 }
 
-void
-phydm_fahm_init(
-	void			*p_dm_void
-)
+void phydm_fahm_init(void *dm_void)
 {
-	struct PHY_DM_STRUCT	*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	struct _CCX_INFO			*ccx_info = &p_dm->dm_ccx_info;
-	u32	fahm_reg1;
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct ccx_info *ccx_info = &dm->dm_ccx_info;
+	u32 fahm_reg1;
+	u8 denumerator_sel = 0;
 
-	PHYDM_DBG(p_dm, DBG_ENV_MNTR, ("[%s]===>\n", __FUNCTION__));
-	PHYDM_DBG(p_dm, DBG_ENV_MNTR, ("IGI=0x%x\n", p_dm->dm_dig_table.cur_ig_value));
+	PHYDM_DBG(dm, DBG_ENV_MNTR, "[%s]===>\n", __func__);
+	PHYDM_DBG(dm, DBG_ENV_MNTR, "IGI=0x%x\n",
+		  dm->dm_dig_table.cur_ig_value);
 
-	if (p_dm->support_ic_type & ODM_IC_11AC_SERIES) {
-		fahm_reg1 =  0x994;
-	} else {
-		fahm_reg1 =  0x890;
-	}
+	if (dm->support_ic_type & ODM_IC_11AC_SERIES)
+		fahm_reg1 = 0x994;
+	else
+		fahm_reg1 = 0x890;
 
 	ccx_info->fahm_period = 65535;
-	
-	odm_set_bb_reg(p_dm, fahm_reg1, 0x6, 3);	/*FAHM HW block enable*/
-	
-	phydm_fahm_set_valid_cnt(p_dm, FAHM_INCLD_FA, (FAHM_INCLD_FA| FAHM_INCLD_CRC_OK |FAHM_INCLD_CRC_ER));
-	phydm_set_fahm_th_by_igi(p_dm, p_dm->dm_dig_table.cur_ig_value);
+
+	odm_set_bb_reg(dm, fahm_reg1, 0x6, 3); /*@FAHM HW block enable*/
+
+	denumerator_sel = FAHM_INCLD_FA | FAHM_INCLD_CRC_OK | FAHM_INCLD_CRC_ER;
+	phydm_fahm_set_valid_cnt(dm, FAHM_INCLD_FA, denumerator_sel);
+	phydm_fahm_set_th_by_igi(dm, dm->dm_dig_table.cur_ig_value);
 }
 
-void
-phydm_fahm_dbg(
-	void		*p_dm_void,
-	char		input[][16],
-	u32		*_used,
-	char		*output,
-	u32		*_out_len,
-	u32		input_num
-)
+void phydm_fahm_dbg(void *dm_void, char input[][16], u32 *_used, char *output,
+		    u32 *_out_len)
 {
-	struct PHY_DM_STRUCT	*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	struct _CCX_INFO	*ccx_info = &p_dm->dm_ccx_info;
-	char		help[] = "-h";
-	u32		var1[10] = {0};
-	u32		used = *_used;
-	u32		out_len = *_out_len;
-	u32		i;
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct ccx_info *ccx_info = &dm->dm_ccx_info;
+	char help[] = "-h";
+	u32 var1[10] = {0};
+	u32 used = *_used;
+	u32 out_len = *_out_len;
+	u32 i;
 
 	for (i = 0; i < 2; i++) {
-		if (input[i + 1]) {
+		if (input[i + 1])
 			PHYDM_SSCANF(input[i + 1], DCMD_DECIMAL, &var1[i]);
-		}
 	}
 
 	if ((strcmp(input[1], help) == 0)) {
-		PHYDM_SNPRINTF((output + used, out_len - used, "{1: trigger, 2:get result}\n"));
-		PHYDM_SNPRINTF((output + used, out_len - used, "{3: MNTR mode sel} {1: driver, 2. FW}\n"));
+		PDM_SNPF(out_len, used, output + used, out_len - used,
+			 "{1: trigger, 2:get result}\n");
+		PDM_SNPF(out_len, used, output + used, out_len - used,
+			 "{3: MNTR mode sel} {1: driver, 2. FW}\n");
 		return;
 	} else if (var1[0] == 1) { /* Set & trigger CLM */
-		
-		phydm_set_fahm_th_by_igi(p_dm, p_dm->dm_dig_table.cur_ig_value);
-		phydm_fahm_trigger(p_dm, ccx_info->fahm_period);
-		PHYDM_SNPRINTF((output + used, out_len - used, "Monitor FAHM for %d * 4us\n", ccx_info->fahm_period));
-		
-	} else if (var1[0] == 2) { /* Get CLM results */
-
-		phydm_get_fahm_result(p_dm);
-		PHYDM_SNPRINTF((output + used, out_len - used, "FAHM_result=%d us\n", (ccx_info->clm_result<<2)));
-
-	} /*else if (var1[0] == 3) {
-
-		if (var1[1] == 1)
-			ccx_info->clm_mntr_mode = CLM_DRIVER_MNTR;
-		else if (var1[1] == 2)
-			ccx_info->clm_mntr_mode = CLM_FW_MNTR;
-
-	}*/ else {
-		
-		PHYDM_SNPRINTF((output + used, out_len - used, "Error\n"));
+
+		phydm_fahm_set_th_by_igi(dm, dm->dm_dig_table.cur_ig_value);
+		phydm_fahm_trigger(dm, ccx_info->fahm_period);
+		PDM_SNPF(out_len, used, output + used, out_len - used,
+			 "Monitor FAHM for %d * 4us\n", ccx_info->fahm_period);
+
+	} else if (var1[0] == 2) { /* @Get CLM results */
+
+		phydm_fahm_get_result(dm);
+		PDM_SNPF(out_len, used, output + used, out_len - used,
+			 "FAHM_result=%d us\n", (ccx_info->clm_result << 2));
+
+	} else {
+		PDM_SNPF(out_len, used, output + used, out_len - used,
+			 "Error\n");
 	}
-	
+
 	*_used = used;
 	*_out_len = out_len;
 }
 
+#endif /*@#ifdef FAHM_SUPPORT*/
 
-#endif
+#ifdef NHM_SUPPORT
 
-void
-phydm_c2h_clm_report_handler(
-	void	*p_dm_void,
-	u8	*cmd_buf,
-	u8	cmd_len
-)
+void phydm_nhm_racing_release(void *dm_void)
 {
-	struct PHY_DM_STRUCT	*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	struct _CCX_INFO			*ccx_info = &p_dm->dm_ccx_info;
-	u8	clm_report = cmd_buf[0];
-	u8	clm_report_idx = cmd_buf[1];
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct ccx_info *ccx = &dm->dm_ccx_info;
+	u32 value32 = 0;
 
-	if (cmd_len >=12)
-		return;
-	
-	ccx_info->clm_fw_result_acc += clm_report;
-	ccx_info->clm_fw_result_cnt++;
+	PHYDM_DBG(dm, DBG_ENV_MNTR, "[%s]===>\n", __func__);
+	PHYDM_DBG(dm, DBG_ENV_MNTR, "lv:(%d)->(0)\n", ccx->nhm_set_lv);
 
-	PHYDM_DBG(p_dm, DBG_ENV_MNTR, ("[%d] clm_report= %d\n", ccx_info->clm_fw_result_cnt, clm_report));
-	
+	ccx->nhm_ongoing = false;
+	ccx->nhm_set_lv = NHM_RELEASE;
+
+	if (!(ccx->nhm_app == NHM_BACKGROUND || ccx->nhm_app == NHM_ACS)) {
+		phydm_pause_func(dm, F00_DIG, PHYDM_RESUME,
+				 PHYDM_PAUSE_LEVEL_1, 1, &value32);
+	}
+
+	ccx->nhm_app = NHM_BACKGROUND;
 }
 
-void
-phydm_clm_h2c(
-	void	*p_dm_void,
-	u16	obs_time,
-	u8	fw_clm_en
-)
+u8 phydm_nhm_racing_ctrl(void *dm_void, enum phydm_nhm_level nhm_lv)
 {
-	struct PHY_DM_STRUCT		*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	u8		h2c_val[H2C_MAX_LENGTH] = {0};
-	u8		i = 0;
-	u8		obs_time_idx = 0;
-	
-	PHYDM_DBG(p_dm, DBG_ENV_MNTR, ("%s ======>\n", __func__));
-	PHYDM_DBG(p_dm, DBG_ENV_MNTR, ("obs_time_index=%d *4 ms\n", obs_time));
-
-	for (i =1; i<=16; i++) {
-		if (obs_time & BIT(16 -i)) {
-			obs_time_idx = 16-i;
-			break;
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct ccx_info *ccx = &dm->dm_ccx_info;
+	u8 set_result = PHYDM_SET_SUCCESS;
+	/*@acquire to control NHM API*/
+
+	PHYDM_DBG(dm, DBG_ENV_MNTR, "nhm_ongoing=%d, lv:(%d)->(%d)\n",
+		  ccx->nhm_ongoing, ccx->nhm_set_lv, nhm_lv);
+	if (ccx->nhm_ongoing) {
+		if (nhm_lv <= ccx->nhm_set_lv) {
+			set_result = PHYDM_SET_FAIL;
+		} else {
+			phydm_ccx_hw_restart(dm);
+			ccx->nhm_ongoing = false;
 		}
 	}
-	
-	/*
-	obs_time =(2^16 -1) ~ (2^15)  => obs_time_idx = 15  (65535 ~ 32768)
-	obs_time =(2^15 -1) ~ (2^14)  => obs_time_idx = 14
-	...
-	...
-	...
-	obs_time =(2^1 -1) ~ (2^0)  => obs_time_idx = 0
-
-	*/
-
-	h2c_val[0] = obs_time_idx | (((fw_clm_en) ? 1 : 0)<< 7);
-	h2c_val[1] = CLM_MAX_REPORT_TIME;
 
-	PHYDM_DBG(p_dm, DBG_ENV_MNTR, ("PHYDM h2c[0x4d]=0x%x %x %x %x %x %x %x\n",
-		h2c_val[6], h2c_val[5], h2c_val[4], h2c_val[3], h2c_val[2], h2c_val[1], h2c_val[0]));
+	if (set_result)
+		ccx->nhm_set_lv = nhm_lv;
 
-	odm_fill_h2c_cmd(p_dm, PHYDM_H2C_FW_CLM_MNTR, H2C_MAX_LENGTH, h2c_val);
+	PHYDM_DBG(dm, DBG_ENV_MNTR, "nhm racing success=%d\n", set_result);
+	return set_result;
+}
 
+void phydm_nhm_trigger(void *dm_void)
+{
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct ccx_info *ccx = &dm->dm_ccx_info;
+	u32 nhm_reg1 = 0;
+
+	if (dm->support_ic_type & ODM_IC_11AC_SERIES)
+		nhm_reg1 = R_0x994;
+	#ifdef PHYDM_IC_JGR3_SERIES_SUPPORT
+	else if (dm->support_ic_type & ODM_IC_JGR3_SERIES)
+		nhm_reg1 = R_0x1e60;
+	#endif
+	else
+		nhm_reg1 = R_0x890;
+	PHYDM_DBG(dm, DBG_ENV_MNTR, "[%s]===>\n", __func__);
+
+	/*Trigger NHM*/
+	pdm_set_reg(dm, nhm_reg1, BIT(1), 0);
+	pdm_set_reg(dm, nhm_reg1, BIT(1), 1);
+	ccx->nhm_trigger_time = dm->phydm_sys_up_time;
+	ccx->nhm_rpt_stamp++;
+	ccx->nhm_ongoing = true;
 }
 
 boolean
-phydm_cal_nhm_cnt(
-	void		*p_dm_void
-)
+phydm_nhm_check_rdy(void *dm_void)
 {
-	struct PHY_DM_STRUCT		*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	struct _CCX_INFO		*ccx_info = &p_dm->dm_ccx_info;
-	u8						noisy_nhm_th_index, low_pwr_cnt = 0, high_pwr_cnt = 0;
-	u8						noisy_nhm_th = 0x52;
-	u8						i;
-	boolean					noisy = false, clean = true;
-
-	PHYDM_DBG(p_dm, DBG_ENV_MNTR, ("[%s]===>\n", __FUNCTION__));
-
-	if (!(p_dm->support_ability & ODM_BB_ENV_MONITOR))
-		return noisy;
-
-	/*nhm_th = 0x52 means 0x52/2-110 = -69dbm*/
-	/* IGI < 0x14 */
-	if (ccx_info->nhm_th[10] < noisy_nhm_th)
-		return	clean;
-	else if (ccx_info->nhm_th[0] > noisy_nhm_th)
-		return	(p_dm->noisy_decision) ? noisy : clean;
-	/* 0x14 <= IGI <= 0x37*/
-	else {
-		/* search index */
-		noisy_nhm_th_index = (noisy_nhm_th - ccx_info->nhm_th[0]) << 2;
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	boolean is_ready = false;
+	u32 reg1 = 0, reg1_bit = 0;
+#if (ENV_MNTR_DBG || ENV_MNTR_DBG_1)
+	u16 i = 0;
+	u64 start_time = 0, progressing_time = 0;
+	u32 reg_val_start = 0, reg_val = 0;
+	u8 print_rpt = 0;
+#endif
 
-		for (i = 0; i <= 11; i++) {
-			if (i <= noisy_nhm_th_index)
-				low_pwr_cnt += ccx_info->nhm_result[i];
-			else
-				high_pwr_cnt += ccx_info->nhm_result[i];
+	if (dm->support_ic_type & ODM_IC_11AC_SERIES) {
+		reg1 = R_0xfb4;
+		reg1_bit = 16;
+	#ifdef PHYDM_IC_JGR3_SERIES_SUPPORT
+	} else if (dm->support_ic_type & ODM_IC_JGR3_SERIES) {
+		reg1 = R_0x2d4c;
+		reg1_bit = 16;
+	#endif
+	} else {
+		reg1 = R_0x8b4;
+		if (dm->support_ic_type == ODM_RTL8710B) {
+			reg1_bit = 25;
+		} else {
+			reg1_bit = 17;
 		}
-
-		if (low_pwr_cnt + high_pwr_cnt == 0)
-			return noisy;		/* noisy environment */
-		else if (low_pwr_cnt - high_pwr_cnt >= 100)
-			return clean;		/* clean environment */
-		else
-			return noisy;		/* noisy environment */
 	}
-}
 
-void
-phydm_nhm_setting(
-	void		*p_dm_void,
-	u8	nhm_setting
-)
-{
-	struct PHY_DM_STRUCT	*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	struct _CCX_INFO	*ccx_info = &p_dm->dm_ccx_info;
-
-	PHYDM_DBG(p_dm, DBG_ENV_MNTR, ("[%s]===>\n", __FUNCTION__));
-
-	
-	PHYDM_DBG(p_dm, DBG_ENV_MNTR, ("IGI=0x%x\n", ccx_info->echo_igi));
-	
-	if (nhm_setting == SET_NHM_SETTING) {
-		PHYDM_DBG(p_dm, DBG_ENV_MNTR,
-		("NHM_th[H->L]=[0x%x 0x%x 0x%x 0x%x 0x%x 0x%x 0x%x 0x%x 0x%x 0x%x 0x%x]\n",
-		ccx_info->nhm_th[10], ccx_info->nhm_th[9], ccx_info->nhm_th[8],
-		ccx_info->nhm_th[7], ccx_info->nhm_th[6], ccx_info->nhm_th[5],
-		ccx_info->nhm_th[4], ccx_info->nhm_th[3], ccx_info->nhm_th[2],
-		ccx_info->nhm_th[1], ccx_info->nhm_th[0]));
-	}
+#if (ENV_MNTR_DBG_1)
+	start_time = odm_get_current_time(dm);
+
+	if (dm->support_ic_type & (ODM_RTL8812 | ODM_RTL8821)) {
+		PHYDM_DBG(dm, DBG_ENV_MNTR, "NHM_period = %d\n",
+			  odm_get_bb_reg(dm, R_0x990, MASKDWORD));
+
+		 /*NHM trigger bit*/
+		reg_val_start = odm_get_bb_reg(dm, R_0x994, BIT(1));
+		PHYDM_DBG(dm, DBG_ENV_MNTR, "reg_val_start = %d\n",
+			  reg_val_start);
+
+		for (i = 0; i <= 400; i++) {
+			if (print_rpt == 0) {
+				reg_val = odm_get_bb_reg(dm, R_0x994, BIT(1));
+				if (reg_val != reg_val_start) {
+					print_rpt = 1;
+					PHYDM_DBG(dm, DBG_ENV_MNTR,
+						  "Trig[%d] (%d) -> (%d)\n",
+						  i, reg_val_start, reg_val);
+				}
+			}
 
-	if (p_dm->support_ic_type & ODM_IC_11AC_SERIES) {
-
-		if (nhm_setting == SET_NHM_SETTING) {
-
-			/*Set inexclude_cca, inexclude_txon*/
-			odm_set_bb_reg(p_dm, ODM_REG_NHM_TH9_TH10_11AC, BIT(9), ccx_info->nhm_inexclude_cca);
-			odm_set_bb_reg(p_dm, ODM_REG_NHM_TH9_TH10_11AC, BIT(10), ccx_info->nhm_inexclude_txon);
-
-			/*Set NHM period*/
-			odm_set_bb_reg(p_dm, ODM_REG_CCX_PERIOD_11AC, MASKHWORD, ccx_info->nhm_period);
-
-			/*Set NHM threshold*/ /*Unit: PWdB U(8,1)*/
-			odm_set_bb_reg(p_dm, ODM_REG_NHM_TH3_TO_TH0_11AC, MASKBYTE0, ccx_info->nhm_th[0]);
-			odm_set_bb_reg(p_dm, ODM_REG_NHM_TH3_TO_TH0_11AC, MASKBYTE1, ccx_info->nhm_th[1]);
-			odm_set_bb_reg(p_dm, ODM_REG_NHM_TH3_TO_TH0_11AC, MASKBYTE2, ccx_info->nhm_th[2]);
-			odm_set_bb_reg(p_dm, ODM_REG_NHM_TH3_TO_TH0_11AC, MASKBYTE3, ccx_info->nhm_th[3]);
-			odm_set_bb_reg(p_dm, ODM_REG_NHM_TH7_TO_TH4_11AC, MASKBYTE0, ccx_info->nhm_th[4]);
-			odm_set_bb_reg(p_dm, ODM_REG_NHM_TH7_TO_TH4_11AC, MASKBYTE1, ccx_info->nhm_th[5]);
-			odm_set_bb_reg(p_dm, ODM_REG_NHM_TH7_TO_TH4_11AC, MASKBYTE2, ccx_info->nhm_th[6]);
-			odm_set_bb_reg(p_dm, ODM_REG_NHM_TH7_TO_TH4_11AC, MASKBYTE3, ccx_info->nhm_th[7]);
-			odm_set_bb_reg(p_dm, ODM_REG_NHM_TH8_11AC, MASKBYTE0, ccx_info->nhm_th[8]);
-			odm_set_bb_reg(p_dm, ODM_REG_NHM_TH9_TH10_11AC, MASKBYTE2, ccx_info->nhm_th[9]);
-			odm_set_bb_reg(p_dm, ODM_REG_NHM_TH9_TH10_11AC, MASKBYTE3, ccx_info->nhm_th[10]);
-
-			/*CCX EN*/
-			odm_set_bb_reg(p_dm, ODM_REG_NHM_TH9_TH10_11AC, BIT(8), CCX_EN);
-
-		} else if (nhm_setting == STORE_NHM_SETTING) {
-
-			/*Store pervious disable_ignore_cca, disable_ignore_txon*/
-			ccx_info->nhm_inexclude_cca_restore = (enum nhm_inexclude_cca)odm_get_bb_reg(p_dm, ODM_REG_NHM_TH9_TH10_11AC, BIT(9));
-			ccx_info->nhm_inexclude_txon_restore = (enum nhm_inexclude_txon)odm_get_bb_reg(p_dm, ODM_REG_NHM_TH9_TH10_11AC, BIT(10));
-
-			/*Store pervious NHM period*/
-			ccx_info->nhm_period_restore = (u16)odm_get_bb_reg(p_dm, ODM_REG_CCX_PERIOD_11AC, MASKHWORD);
-
-			/*Store NHM threshold*/
-			ccx_info->nhm_th_restore[0] = (u8)odm_get_bb_reg(p_dm, ODM_REG_NHM_TH3_TO_TH0_11AC, MASKBYTE0);
-			ccx_info->nhm_th_restore[1] = (u8)odm_get_bb_reg(p_dm, ODM_REG_NHM_TH3_TO_TH0_11AC, MASKBYTE1);
-			ccx_info->nhm_th_restore[2] = (u8)odm_get_bb_reg(p_dm, ODM_REG_NHM_TH3_TO_TH0_11AC, MASKBYTE2);
-			ccx_info->nhm_th_restore[3] = (u8)odm_get_bb_reg(p_dm, ODM_REG_NHM_TH3_TO_TH0_11AC, MASKBYTE3);
-			ccx_info->nhm_th_restore[4] = (u8)odm_get_bb_reg(p_dm, ODM_REG_NHM_TH7_TO_TH4_11AC, MASKBYTE0);
-			ccx_info->nhm_th_restore[5] = (u8)odm_get_bb_reg(p_dm, ODM_REG_NHM_TH7_TO_TH4_11AC, MASKBYTE1);
-			ccx_info->nhm_th_restore[6] = (u8)odm_get_bb_reg(p_dm, ODM_REG_NHM_TH7_TO_TH4_11AC, MASKBYTE2);
-			ccx_info->nhm_th_restore[7] = (u8)odm_get_bb_reg(p_dm, ODM_REG_NHM_TH7_TO_TH4_11AC, MASKBYTE3);
-			ccx_info->nhm_th_restore[8] = (u8)odm_get_bb_reg(p_dm, ODM_REG_NHM_TH8_11AC, MASKBYTE0);
-			ccx_info->nhm_th_restore[9] = (u8)odm_get_bb_reg(p_dm, ODM_REG_NHM_TH9_TH10_11AC, MASKBYTE2);
-			ccx_info->nhm_th_restore[10] = (u8)odm_get_bb_reg(p_dm, ODM_REG_NHM_TH9_TH10_11AC, MASKBYTE3);
-		} else if (nhm_setting == RESTORE_NHM_SETTING) {
-
-			/*Set disable_ignore_cca, disable_ignore_txon*/
-			odm_set_bb_reg(p_dm, ODM_REG_NHM_TH9_TH10_11AC, BIT(9), ccx_info->nhm_inexclude_cca_restore);
-			odm_set_bb_reg(p_dm, ODM_REG_NHM_TH9_TH10_11AC, BIT(10), ccx_info->nhm_inexclude_txon_restore);
-
-			/*Set NHM period*/
-			odm_set_bb_reg(p_dm, ODM_REG_CCX_PERIOD_11AC, MASKHWORD, ccx_info->nhm_period);
-
-			/*Set NHM threshold*/
-			odm_set_bb_reg(p_dm, ODM_REG_NHM_TH3_TO_TH0_11AC, MASKBYTE0, ccx_info->nhm_th_restore[0]);
-			odm_set_bb_reg(p_dm, ODM_REG_NHM_TH3_TO_TH0_11AC, MASKBYTE1, ccx_info->nhm_th_restore[1]);
-			odm_set_bb_reg(p_dm, ODM_REG_NHM_TH3_TO_TH0_11AC, MASKBYTE2, ccx_info->nhm_th_restore[2]);
-			odm_set_bb_reg(p_dm, ODM_REG_NHM_TH3_TO_TH0_11AC, MASKBYTE3, ccx_info->nhm_th_restore[3]);
-			odm_set_bb_reg(p_dm, ODM_REG_NHM_TH7_TO_TH4_11AC, MASKBYTE0, ccx_info->nhm_th_restore[4]);
-			odm_set_bb_reg(p_dm, ODM_REG_NHM_TH7_TO_TH4_11AC, MASKBYTE1, ccx_info->nhm_th_restore[5]);
-			odm_set_bb_reg(p_dm, ODM_REG_NHM_TH7_TO_TH4_11AC, MASKBYTE2, ccx_info->nhm_th_restore[6]);
-			odm_set_bb_reg(p_dm, ODM_REG_NHM_TH7_TO_TH4_11AC, MASKBYTE3, ccx_info->nhm_th_restore[7]);
-			odm_set_bb_reg(p_dm, ODM_REG_NHM_TH8_11AC, MASKBYTE0, ccx_info->nhm_th_restore[8]);
-			odm_set_bb_reg(p_dm, ODM_REG_NHM_TH9_TH10_11AC, MASKBYTE2, ccx_info->nhm_th_restore[9]);
-			odm_set_bb_reg(p_dm, ODM_REG_NHM_TH9_TH10_11AC, MASKBYTE3, ccx_info->nhm_th_restore[10]);
-		} else
-			return;
+			if (odm_get_bb_reg(dm, reg1, BIT(reg1_bit))) {
+				is_ready = true;
+				break;
+			}
+			ODM_delay_ms(1);
+		}
+	} else {
+		if (odm_get_bb_reg(dm, reg1, BIT(reg1_bit)))
+			is_ready = true;
 	}
 
-	else if (p_dm->support_ic_type & ODM_IC_11N_SERIES) {
-
-		if (nhm_setting == SET_NHM_SETTING) {
-
-			/*Set disable_ignore_cca, disable_ignore_txon*/
-			odm_set_bb_reg(p_dm, ODM_REG_NHM_TH9_TH10_11N, BIT(9), ccx_info->nhm_inexclude_cca);
-			odm_set_bb_reg(p_dm, ODM_REG_NHM_TH9_TH10_11N, BIT(10), ccx_info->nhm_inexclude_txon);
-
-			/*Set NHM period*/
-			odm_set_bb_reg(p_dm, ODM_REG_CCX_PERIOD_11N, MASKHWORD, ccx_info->nhm_period);
-
-			/*Set NHM threshold*/
-			odm_set_bb_reg(p_dm, ODM_REG_NHM_TH3_TO_TH0_11N, MASKBYTE0, ccx_info->nhm_th[0]);
-			odm_set_bb_reg(p_dm, ODM_REG_NHM_TH3_TO_TH0_11N, MASKBYTE1, ccx_info->nhm_th[1]);
-			odm_set_bb_reg(p_dm, ODM_REG_NHM_TH3_TO_TH0_11N, MASKBYTE2, ccx_info->nhm_th[2]);
-			odm_set_bb_reg(p_dm, ODM_REG_NHM_TH3_TO_TH0_11N, MASKBYTE3, ccx_info->nhm_th[3]);
-			odm_set_bb_reg(p_dm, ODM_REG_NHM_TH7_TO_TH4_11N, MASKBYTE0, ccx_info->nhm_th[4]);
-			odm_set_bb_reg(p_dm, ODM_REG_NHM_TH7_TO_TH4_11N, MASKBYTE1, ccx_info->nhm_th[5]);
-			odm_set_bb_reg(p_dm, ODM_REG_NHM_TH7_TO_TH4_11N, MASKBYTE2, ccx_info->nhm_th[6]);
-			odm_set_bb_reg(p_dm, ODM_REG_NHM_TH7_TO_TH4_11N, MASKBYTE3, ccx_info->nhm_th[7]);
-			odm_set_bb_reg(p_dm, ODM_REG_NHM_TH8_11N, MASKBYTE0, ccx_info->nhm_th[8]);
-			odm_set_bb_reg(p_dm, ODM_REG_NHM_TH9_TH10_11N, MASKBYTE2, ccx_info->nhm_th[9]);
-			odm_set_bb_reg(p_dm, ODM_REG_NHM_TH9_TH10_11N, MASKBYTE3, ccx_info->nhm_th[10]);
-
-			/*CCX EN*/
-			odm_set_bb_reg(p_dm, ODM_REG_NHM_TH9_TH10_11N, BIT(8), CCX_EN);
-		} else if (nhm_setting == STORE_NHM_SETTING) {
-
-			/*Store pervious disable_ignore_cca, disable_ignore_txon*/
-			ccx_info->nhm_inexclude_cca_restore = (enum nhm_inexclude_cca)odm_get_bb_reg(p_dm, ODM_REG_NHM_TH9_TH10_11N, BIT(9));
-			ccx_info->nhm_inexclude_txon_restore = (enum nhm_inexclude_txon)odm_get_bb_reg(p_dm, ODM_REG_NHM_TH9_TH10_11N, BIT(10));
-
-			/*Store pervious NHM period*/
-			ccx_info->nhm_period_restore = (u16)odm_get_bb_reg(p_dm, ODM_REG_CCX_PERIOD_11N, MASKHWORD);
-
-			/*Store NHM threshold*/
-			ccx_info->nhm_th_restore[0] = (u8)odm_get_bb_reg(p_dm, ODM_REG_NHM_TH3_TO_TH0_11N, MASKBYTE0);
-			ccx_info->nhm_th_restore[1] = (u8)odm_get_bb_reg(p_dm, ODM_REG_NHM_TH3_TO_TH0_11N, MASKBYTE1);
-			ccx_info->nhm_th_restore[2] = (u8)odm_get_bb_reg(p_dm, ODM_REG_NHM_TH3_TO_TH0_11N, MASKBYTE2);
-			ccx_info->nhm_th_restore[3] = (u8)odm_get_bb_reg(p_dm, ODM_REG_NHM_TH3_TO_TH0_11N, MASKBYTE3);
-			ccx_info->nhm_th_restore[4] = (u8)odm_get_bb_reg(p_dm, ODM_REG_NHM_TH7_TO_TH4_11N, MASKBYTE0);
-			ccx_info->nhm_th_restore[5] = (u8)odm_get_bb_reg(p_dm, ODM_REG_NHM_TH7_TO_TH4_11N, MASKBYTE1);
-			ccx_info->nhm_th_restore[6] = (u8)odm_get_bb_reg(p_dm, ODM_REG_NHM_TH7_TO_TH4_11N, MASKBYTE2);
-			ccx_info->nhm_th_restore[7] = (u8)odm_get_bb_reg(p_dm, ODM_REG_NHM_TH7_TO_TH4_11N, MASKBYTE3);
-			ccx_info->nhm_th_restore[8] = (u8)odm_get_bb_reg(p_dm, ODM_REG_NHM_TH8_11N, MASKBYTE0);
-			ccx_info->nhm_th_restore[9] = (u8)odm_get_bb_reg(p_dm, ODM_REG_NHM_TH9_TH10_11N, MASKBYTE2);
-			ccx_info->nhm_th_restore[10] = (u8)odm_get_bb_reg(p_dm, ODM_REG_NHM_TH9_TH10_11N, MASKBYTE3);
-
-		} else if (nhm_setting == RESTORE_NHM_SETTING) {
-
-			/*Set disable_ignore_cca, disable_ignore_txon*/
-			odm_set_bb_reg(p_dm, ODM_REG_NHM_TH9_TH10_11N, BIT(9), ccx_info->nhm_inexclude_cca_restore);
-			odm_set_bb_reg(p_dm, ODM_REG_NHM_TH9_TH10_11N, BIT(10), ccx_info->nhm_inexclude_txon_restore);
-
-			/*Set NHM period*/
-			odm_set_bb_reg(p_dm, ODM_REG_CCX_PERIOD_11N, MASKHWORD, ccx_info->nhm_period_restore);
-
-			/*Set NHM threshold*/
-			odm_set_bb_reg(p_dm, ODM_REG_NHM_TH3_TO_TH0_11N, MASKBYTE0, ccx_info->nhm_th_restore[0]);
-			odm_set_bb_reg(p_dm, ODM_REG_NHM_TH3_TO_TH0_11N, MASKBYTE1, ccx_info->nhm_th_restore[1]);
-			odm_set_bb_reg(p_dm, ODM_REG_NHM_TH3_TO_TH0_11N, MASKBYTE2, ccx_info->nhm_th_restore[2]);
-			odm_set_bb_reg(p_dm, ODM_REG_NHM_TH3_TO_TH0_11N, MASKBYTE3, ccx_info->nhm_th_restore[3]);
-			odm_set_bb_reg(p_dm, ODM_REG_NHM_TH7_TO_TH4_11N, MASKBYTE0, ccx_info->nhm_th_restore[4]);
-			odm_set_bb_reg(p_dm, ODM_REG_NHM_TH7_TO_TH4_11N, MASKBYTE1, ccx_info->nhm_th_restore[5]);
-			odm_set_bb_reg(p_dm, ODM_REG_NHM_TH7_TO_TH4_11N, MASKBYTE2, ccx_info->nhm_th_restore[6]);
-			odm_set_bb_reg(p_dm, ODM_REG_NHM_TH7_TO_TH4_11N, MASKBYTE3, ccx_info->nhm_th_restore[7]);
-			odm_set_bb_reg(p_dm, ODM_REG_NHM_TH8_11N, MASKBYTE0, ccx_info->nhm_th_restore[8]);
-			odm_set_bb_reg(p_dm, ODM_REG_NHM_TH9_TH10_11N, MASKBYTE2, ccx_info->nhm_th_restore[9]);
-			odm_set_bb_reg(p_dm, ODM_REG_NHM_TH9_TH10_11N, MASKBYTE3, ccx_info->nhm_th_restore[10]);
-		} else
-			return;
+	progressing_time = odm_get_progressing_time(dm, start_time);
+	PHYDM_DBG(dm, DBG_ENV_MNTR, "NHM rdy=%d, i=%d, NHM_polling_time=%lld\n",
+		  is_ready, i, progressing_time);
 
+#elif (ENV_MNTR_DBG)
+	start_time = odm_get_current_time(dm);
+	for (i = 0; i <= 400; i++) {
+		if (odm_get_bb_reg(dm, reg1, BIT(reg1_bit))) {
+			is_ready = true;
+			break;
+		}
+		ODM_delay_ms(1);
 	}
-}
-
-void
-phydm_nhm_trigger(
-	void		*p_dm_void
-)
-{
-	struct PHY_DM_STRUCT		*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
+	progressing_time = odm_get_progressing_time(dm, start_time);
+	PHYDM_DBG(dm, DBG_ENV_MNTR, "NHM rdy=%d, i=%d, NHM_polling_time=%lld\n",
+		  is_ready, i, progressing_time);
+#else
+	if (odm_get_bb_reg(dm, reg1, BIT(reg1_bit)))
+		is_ready = true;
 
-	PHYDM_DBG(p_dm, DBG_ENV_MNTR, ("[%s]===>\n", __FUNCTION__));
+	PHYDM_DBG(dm, DBG_ENV_MNTR, "NHM rdy=%d\n", is_ready);
 
-	if (p_dm->support_ic_type & ODM_IC_11AC_SERIES) {
+#endif
+	return is_ready;
+}
 
-		/*Trigger NHM*/
-		odm_set_bb_reg(p_dm, ODM_REG_NHM_TH9_TH10_11AC, BIT(1), 0);
-		odm_set_bb_reg(p_dm, ODM_REG_NHM_TH9_TH10_11AC, BIT(1), 1);
-	} else if (p_dm->support_ic_type & ODM_IC_11N_SERIES) {
+void phydm_nhm_get_utility(void *dm_void)
+{
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct ccx_info *ccx = &dm->dm_ccx_info;
+	u8 nhm_rpt_non_0 = 0;
 
-		/*Trigger NHM*/
-		odm_set_bb_reg(p_dm, ODM_REG_NHM_TH9_TH10_11N, BIT(1), 0);
-		odm_set_bb_reg(p_dm, ODM_REG_NHM_TH9_TH10_11N, BIT(1), 1);
+	if (ccx->nhm_rpt_sum >= ccx->nhm_result[0]) {
+		nhm_rpt_non_0 = ccx->nhm_rpt_sum - ccx->nhm_result[0];
+		ccx->nhm_ratio = (nhm_rpt_non_0 * 100) >> 8;
+	} else {
+		PHYDM_DBG(dm, DBG_ENV_MNTR, "[warning] nhm_rpt_sum invalid\n");
+		ccx->nhm_ratio = 0;
 	}
+
+	PHYDM_DBG(dm, DBG_ENV_MNTR, "nhm_ratio=%d\n", ccx->nhm_ratio);
 }
 
-void
-phydm_get_nhm_result(
-	void		*p_dm_void
-)
+boolean
+phydm_nhm_get_result(void *dm_void)
 {
-	struct PHY_DM_STRUCT		*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	struct _CCX_INFO		*ccx_info = &p_dm->dm_ccx_info;
-	u32			value32;
-	u8			i;
-
-	if (p_dm->support_ic_type & ODM_IC_11AC_SERIES) {
-
-		value32 = odm_read_4byte(p_dm, ODM_REG_NHM_CNT_11AC);
-		ccx_info->nhm_result[0] = (u8)(value32 & MASKBYTE0);
-		ccx_info->nhm_result[1] = (u8)((value32 & MASKBYTE1) >> 8);
-		ccx_info->nhm_result[2] = (u8)((value32 & MASKBYTE2) >> 16);
-		ccx_info->nhm_result[3] = (u8)((value32 & MASKBYTE3) >> 24);
-
-		value32 = odm_read_4byte(p_dm, ODM_REG_NHM_CNT7_TO_CNT4_11AC);
-		ccx_info->nhm_result[4] = (u8)(value32 & MASKBYTE0);
-		ccx_info->nhm_result[5] = (u8)((value32 & MASKBYTE1) >> 8);
-		ccx_info->nhm_result[6] = (u8)((value32 & MASKBYTE2) >> 16);
-		ccx_info->nhm_result[7] = (u8)((value32 & MASKBYTE3) >> 24);
-
-		value32 = odm_read_4byte(p_dm, ODM_REG_NHM_CNT11_TO_CNT8_11AC);
-		ccx_info->nhm_result[8] = (u8)(value32 & MASKBYTE0);
-		ccx_info->nhm_result[9] = (u8)((value32 & MASKBYTE1) >> 8);
-		ccx_info->nhm_result[10] = (u8)((value32 & MASKBYTE2) >> 16);
-		ccx_info->nhm_result[11] = (u8)((value32 & MASKBYTE3) >> 24);
-
-		/*Get NHM duration*/
-		value32 = odm_read_4byte(p_dm, ODM_REG_NHM_DUR_READY_11AC);
-		ccx_info->nhm_duration = (u16)(value32 & MASKLWORD);
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct ccx_info *ccx = &dm->dm_ccx_info;
+	u32 value32 = 0;
+	u8 i = 0;
+	u32 nhm_reg1 = 0;
+	u16 nhm_rpt_sum_tmp = 0;
+
+	if (dm->support_ic_type & ODM_IC_11AC_SERIES)
+		nhm_reg1 = R_0x994;
+	#ifdef PHYDM_IC_JGR3_SERIES_SUPPORT
+	else if (dm->support_ic_type & ODM_IC_JGR3_SERIES)
+		nhm_reg1 = R_0x1e60;
+	#endif
+	else
+		nhm_reg1 = R_0x890;
+	PHYDM_DBG(dm, DBG_ENV_MNTR, "[%s]===>\n", __func__);
+
+	if (!(dm->support_ic_type == ODM_RTL8822C))
+		pdm_set_reg(dm, nhm_reg1, BIT(1), 0);
+
+#if (ENV_MNTR_DBG_2)
+	PHYDM_DBG(dm, DBG_ENV_MNTR,
+		  "[DBG][3] 0xc50=0x%x, 0x994=0x%x, 0x998=0x%x\n",
+		  odm_get_bb_reg(dm, R_0xc50, MASKDWORD),
+		  odm_get_bb_reg(dm, R_0x994, MASKDWORD),
+		  odm_get_bb_reg(dm, R_0x998, MASKDWORD));
+#endif
 
+	if (!(phydm_nhm_check_rdy(dm))) {
+		PHYDM_DBG(dm, DBG_ENV_MNTR, "Get NHM report Fail\n");
+		phydm_nhm_racing_release(dm);
+		return false;
 	}
 
-	else if (p_dm->support_ic_type & ODM_IC_11N_SERIES) {
+	if (dm->support_ic_type & ODM_IC_11AC_SERIES) {
+		value32 = odm_read_4byte(dm, R_0xfa8);
+		odm_move_memory(dm, &ccx->nhm_result[0], &value32, 4);
+
+		value32 = odm_read_4byte(dm, R_0xfac);
+		odm_move_memory(dm, &ccx->nhm_result[4], &value32, 4);
 
-		value32 = odm_read_4byte(p_dm, ODM_REG_NHM_CNT_11N);
-		ccx_info->nhm_result[0] = (u8)(value32 & MASKBYTE0);
-		ccx_info->nhm_result[1] = (u8)((value32 & MASKBYTE1) >> 8);
-		ccx_info->nhm_result[2] = (u8)((value32 & MASKBYTE2) >> 16);
-		ccx_info->nhm_result[3] = (u8)((value32 & MASKBYTE3) >> 24);
+		value32 = odm_read_4byte(dm, R_0xfb0);
+		odm_move_memory(dm, &ccx->nhm_result[8], &value32, 4);
+
+		/*@Get NHM duration*/
+		value32 = odm_read_4byte(dm, R_0xfb4);
+		ccx->nhm_duration = (u16)(value32 & MASKLWORD);
+	#ifdef PHYDM_IC_JGR3_SERIES_SUPPORT
+	} else if (dm->support_ic_type & ODM_IC_JGR3_SERIES) {
+		value32 = odm_read_4byte(dm, R_0x2d40);
+		odm_move_memory(dm, &ccx->nhm_result[0], &value32, 4);
+
+		value32 = odm_read_4byte(dm, R_0x2d44);
+		odm_move_memory(dm, &ccx->nhm_result[4], &value32, 4);
+
+		value32 = odm_read_4byte(dm, R_0x2d48);
+		odm_move_memory(dm, &ccx->nhm_result[8], &value32, 4);
+
+		/*@Get NHM duration*/
+		value32 = odm_read_4byte(dm, R_0x2d4c);
+		ccx->nhm_duration = (u16)(value32 & MASKLWORD);
+	#endif
+	} else {
+		value32 = odm_read_4byte(dm, R_0x8d8);
+		odm_move_memory(dm, &ccx->nhm_result[0], &value32, 4);
 
-		value32 = odm_read_4byte(p_dm, ODM_REG_NHM_CNT7_TO_CNT4_11N);
-		ccx_info->nhm_result[4] = (u8)(value32 & MASKBYTE0);
-		ccx_info->nhm_result[5] = (u8)((value32 & MASKBYTE1) >> 8);
-		ccx_info->nhm_result[6] = (u8)((value32 & MASKBYTE2) >> 16);
-		ccx_info->nhm_result[7] = (u8)((value32 & MASKBYTE3) >> 24);
+		value32 = odm_read_4byte(dm, R_0x8dc);
+		odm_move_memory(dm, &ccx->nhm_result[4], &value32, 4);
 
-		value32 = odm_read_4byte(p_dm, ODM_REG_NHM_CNT9_TO_CNT8_11N);
-		ccx_info->nhm_result[8] = (u8)((value32 & MASKBYTE2) >> 16);
-		ccx_info->nhm_result[9] = (u8)((value32 & MASKBYTE3) >> 24);
+		value32 = odm_get_bb_reg(dm, R_0x8d0, 0xffff0000);
+		odm_move_memory(dm, &ccx->nhm_result[8], &value32, 2);
 
-		value32 = odm_read_4byte(p_dm, ODM_REG_NHM_CNT10_TO_CNT11_11N);
-		ccx_info->nhm_result[10] = (u8)((value32 & MASKBYTE2) >> 16);
-		ccx_info->nhm_result[11] = (u8)((value32 & MASKBYTE3) >> 24);
+		value32 = odm_read_4byte(dm, R_0x8d4);
 
-		/*Get NHM duration*/
-		value32 = odm_read_4byte(p_dm, ODM_REG_NHM_CNT10_TO_CNT11_11N);
-		ccx_info->nhm_duration = (u16)(value32 & MASKLWORD);
+		ccx->nhm_result[10] = (u8)((value32 & MASKBYTE2) >> 16);
+		ccx->nhm_result[11] = (u8)((value32 & MASKBYTE3) >> 24);
 
+		/*@Get NHM duration*/
+		ccx->nhm_duration = (u16)(value32 & MASKLWORD);
 	}
 
 	/* sum all nhm_result */
-	ccx_info->nhm_result_total = 0;
-	for (i = 0; i <= 11; i++)
-		ccx_info->nhm_result_total += ccx_info->nhm_result[i];
-
-		PHYDM_DBG(p_dm, DBG_ENV_MNTR,
-		("NHM_result=(H->L)[%d %d %d %d (igi) %d %d %d %d %d %d %d %d]\n",
-			ccx_info->nhm_result[11], ccx_info->nhm_result[10], ccx_info->nhm_result[9],
-			ccx_info->nhm_result[8], ccx_info->nhm_result[7], ccx_info->nhm_result[6],
-			ccx_info->nhm_result[5], ccx_info->nhm_result[4], ccx_info->nhm_result[3],
-			ccx_info->nhm_result[2], ccx_info->nhm_result[1], ccx_info->nhm_result[0]));
+	if (ccx->nhm_period >= 65530) {
+		value32 = (ccx->nhm_duration * 100) >> 16;
+		PHYDM_DBG(dm, DBG_ENV_MNTR,
+			  "NHM valid time = %d, valid: %d percent\n",
+			  ccx->nhm_duration, value32);
+	}
+
+	for (i = 0; i < NHM_RPT_NUM; i++)
+		nhm_rpt_sum_tmp += (u16)ccx->nhm_result[i];
+
+	ccx->nhm_rpt_sum = (u8)nhm_rpt_sum_tmp;
+
+	PHYDM_DBG(dm, DBG_ENV_MNTR,
+		  "NHM_Rpt[%d](H->L)[%d %d %d %d %d %d %d %d %d %d %d %d]\n",
+		  ccx->nhm_rpt_stamp, ccx->nhm_result[11], ccx->nhm_result[10],
+		  ccx->nhm_result[9], ccx->nhm_result[8], ccx->nhm_result[7],
+		  ccx->nhm_result[6], ccx->nhm_result[5], ccx->nhm_result[4],
+		  ccx->nhm_result[3], ccx->nhm_result[2], ccx->nhm_result[1],
+		  ccx->nhm_result[0]);
+
+	phydm_nhm_racing_release(dm);
+
+#if (ENV_MNTR_DBG_2)
+	PHYDM_DBG(dm, DBG_ENV_MNTR,
+		  "[DBG][4] 0xc50=0x%x, 0x994=0x%x, 0x998=0x%x\n",
+		  odm_get_bb_reg(dm, R_0xc50, MASKDWORD),
+		  odm_get_bb_reg(dm, R_0x994, MASKDWORD),
+		  odm_get_bb_reg(dm, R_0x998, MASKDWORD));
+#endif
+
+	if (nhm_rpt_sum_tmp > 255) {
+		PHYDM_DBG(dm, DBG_ENV_MNTR,
+			  "[Warning] Invalid NHM RPT, total=%d\n",
+			  nhm_rpt_sum_tmp);
+		return false;
+	}
+
+	return true;
 }
 
-boolean
-phydm_check_nhm_rdy(
-	void		*p_dm_void
-)
+void phydm_nhm_set_th_reg(void *dm_void)
 {
-	struct PHY_DM_STRUCT		*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	u8			i;
-	boolean			is_ready = false;
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct ccx_info *ccx = &dm->dm_ccx_info;
+	u32 reg1 = 0, reg2 = 0, reg3 = 0, reg4 = 0, reg4_bit = 0;
+	u32 val = 0;
+
+	PHYDM_DBG(dm, DBG_ENV_MNTR, "[%s]===>\n", __func__);
+
+	if (dm->support_ic_type & ODM_IC_11AC_SERIES) {
+		reg1 = R_0x994;
+		reg2 = R_0x998;
+		reg3 = R_0x99c;
+		reg4 = R_0x9a0;
+		reg4_bit = MASKBYTE0;
+	#ifdef PHYDM_IC_JGR3_SERIES_SUPPORT
+	} else if (dm->support_ic_type & ODM_IC_JGR3_SERIES) {
+		reg1 = R_0x1e60;
+		reg2 = R_0x1e44;
+		reg3 = R_0x1e48;
+		reg4 = R_0x1e5c;
+		reg4_bit = MASKBYTE2;
+	#endif
+	} else {
+		reg1 = R_0x890;
+		reg2 = R_0x898;
+		reg3 = R_0x89c;
+		reg4 = R_0xe28;
+		reg4_bit = MASKBYTE0;
+	}
 
-	if (p_dm->support_ic_type & ODM_IC_11AC_SERIES) {
+	/*Set NHM threshold*/ /*Unit: PWdB U(8,1)*/
+	val = BYTE_2_DWORD(ccx->nhm_th[3], ccx->nhm_th[2],
+			   ccx->nhm_th[1], ccx->nhm_th[0]);
+	pdm_set_reg(dm, reg2, MASKDWORD, val);
+	val = BYTE_2_DWORD(ccx->nhm_th[7], ccx->nhm_th[6],
+			   ccx->nhm_th[5], ccx->nhm_th[4]);
+	pdm_set_reg(dm, reg3, MASKDWORD, val);
+	pdm_set_reg(dm, reg4, reg4_bit, ccx->nhm_th[8]);
+	val = BYTE_2_DWORD(0, 0, ccx->nhm_th[10], ccx->nhm_th[9]);
+	pdm_set_reg(dm, reg1, 0xffff0000, val);
+
+	PHYDM_DBG(dm, DBG_ENV_MNTR,
+		  "Update NHM_th[H->L]=[%d %d %d %d %d %d %d %d %d %d %d]\n",
+		  ccx->nhm_th[10], ccx->nhm_th[9], ccx->nhm_th[8],
+		  ccx->nhm_th[7], ccx->nhm_th[6], ccx->nhm_th[5],
+		  ccx->nhm_th[4], ccx->nhm_th[3], ccx->nhm_th[2],
+		  ccx->nhm_th[1], ccx->nhm_th[0]);
+}
 
-		for (i = 0; i < 200; i++) {
-			ODM_delay_ms(1);
-			if (odm_get_bb_reg(p_dm, ODM_REG_NHM_DUR_READY_11AC, BIT(16))) {
-				is_ready = 1;
-				break;
-			}
+boolean
+phydm_nhm_th_update_chk(void *dm_void, enum nhm_application nhm_app, u8 *nhm_th,
+			u32 *igi_new)
+{
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct ccx_info *ccx = &dm->dm_ccx_info;
+	boolean is_update = false;
+	u8 igi_curr = phydm_get_igi(dm, BB_PATH_A);
+	u8 nhm_igi_th_11k_low[NHM_TH_NUM] = {0x12, 0x15, 0x18, 0x1b, 0x1e,
+					     0x23, 0x28, 0x2c, 0x78,
+					     0x78, 0x78};
+	u8 nhm_igi_th_11k_high[NHM_TH_NUM] = {0x1e, 0x23, 0x28, 0x2d, 0x32,
+					      0x37, 0x78, 0x78, 0x78, 0x78,
+					      0x78};
+	u8 nhm_igi_th_xbox[NHM_TH_NUM] = {0x1a, 0x2c, 0x2e, 0x30, 0x32, 0x34,
+					  0x36, 0x38, 0x3a, 0x3c, 0x3d};
+	u8 i;
+
+	PHYDM_DBG(dm, DBG_ENV_MNTR, "[%s]===>\n", __func__);
+	PHYDM_DBG(dm, DBG_ENV_MNTR, "App=%d, nhm_igi=0x%x, igi_curr=0x%x\n",
+		  nhm_app, ccx->nhm_igi, igi_curr);
+
+	if (igi_curr < 0x10) /* Protect for invalid IGI*/
+		return false;
+
+	switch (nhm_app) {
+	case NHM_BACKGROUND: /*@Get IGI form driver parameter(cur_ig_value)*/
+	case NHM_ACS:
+		if (ccx->nhm_igi != igi_curr || ccx->nhm_app != nhm_app) {
+			is_update = true;
+			*igi_new = (u32)igi_curr;
+			nhm_th[0] = (u8)IGI_2_NHM_TH(igi_curr - CCA_CAP);
+			for (i = 1; i <= 10; i++)
+				nhm_th[i] = nhm_th[0] + IGI_2_NHM_TH(2 * i);
+		}
+		break;
+
+	case IEEE_11K_HIGH:
+		is_update = true;
+		*igi_new = 0x2c;
+		for (i = 0; i < NHM_TH_NUM; i++)
+			nhm_th[i] = IGI_2_NHM_TH(nhm_igi_th_11k_high[i]);
+		break;
+
+	case IEEE_11K_LOW:
+		is_update = true;
+		*igi_new = 0x20;
+		for (i = 0; i < NHM_TH_NUM; i++)
+			nhm_th[i] = IGI_2_NHM_TH(nhm_igi_th_11k_low[i]);
+		break;
+
+	case INTEL_XBOX:
+		is_update = true;
+		*igi_new = 0x36;
+		for (i = 0; i < NHM_TH_NUM; i++)
+			nhm_th[i] = IGI_2_NHM_TH(nhm_igi_th_xbox[i]);
+		break;
+
+	case NHM_DBG: /*@Get IGI form register*/
+		igi_curr = phydm_get_igi(dm, BB_PATH_A);
+		if (ccx->nhm_igi != igi_curr || ccx->nhm_app != nhm_app) {
+			is_update = true;
+			*igi_new = (u32)igi_curr;
+			nhm_th[0] = (u8)IGI_2_NHM_TH(igi_curr - CCA_CAP);
+			for (i = 1; i <= 10; i++)
+				nhm_th[i] = nhm_th[0] + IGI_2_NHM_TH(2 * i);
 		}
+		break;
 	}
 
-	else if (p_dm->support_ic_type & ODM_IC_11N_SERIES) {
+	if (is_update) {
+		PHYDM_DBG(dm, DBG_ENV_MNTR, "[Update NHM_TH] igi_RSSI=%d\n",
+			  IGI_2_RSSI(*igi_new));
 
-		for (i = 0; i < 200; i++) {
-			ODM_delay_ms(1);
-			if (odm_get_bb_reg(p_dm, 0x8b4, BIT(17))) {
-				is_ready = 1;
-				break;
-			}
+		for (i = 0; i < NHM_TH_NUM; i++) {
+			PHYDM_DBG(dm, DBG_ENV_MNTR, "NHM_th[%d](RSSI) = %d\n",
+				  i, NTH_TH_2_RSSI(nhm_th[i]));
 		}
+	} else {
+		PHYDM_DBG(dm, DBG_ENV_MNTR, "No need to update NHM_TH\n");
 	}
-	PHYDM_DBG(p_dm, DBG_ENV_MNTR, ("NHM rdy=%d\n", is_ready));
-	return is_ready;
+	return is_update;
 }
 
-void
-phydm_store_nhm_setting(
-	void		*p_dm_void
-)
+void phydm_nhm_set(void *dm_void, enum nhm_option_txon_all include_tx,
+		   enum nhm_option_cca_all include_cca,
+		   enum nhm_divider_opt_all divi_opt,
+		   enum nhm_application nhm_app, u16 period)
 {
-	struct PHY_DM_STRUCT	*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-
-	PHYDM_DBG(p_dm, DBG_ENV_MNTR, ("[%s]===>\n", __FUNCTION__));
-
-	if (p_dm->support_ic_type & ODM_IC_11AC_SERIES) {
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct ccx_info *ccx = &dm->dm_ccx_info;
+	u8 nhm_th[NHM_TH_NUM] = {0};
+	u32 igi = 0x20;
+	u32 reg1 = 0, reg2 = 0;
+	u32 val_tmp = 0;
+
+	PHYDM_DBG(dm, DBG_ENV_MNTR, "[%s]===>\n", __func__);
+
+	PHYDM_DBG(dm, DBG_ENV_MNTR,
+		  "incld{tx, cca}={%d, %d}, divi_opt=%d, period=%d\n",
+		  include_tx, include_cca, divi_opt, period);
+
+	if (dm->support_ic_type & ODM_IC_11AC_SERIES) {
+		reg1 = R_0x994;
+		reg2 = R_0x990;
+	#ifdef PHYDM_IC_JGR3_SERIES_SUPPORT
+	} else if (dm->support_ic_type & ODM_IC_JGR3_SERIES) {
+		reg1 = R_0x1e60;
+		reg2 = R_0x1e40;
+	#endif
+	} else {
+		reg1 = R_0x890;
+		reg2 = R_0x894;
+	}
 
+	/*Set disable_ignore_cca, disable_ignore_txon, ccx_en*/
+	if (include_tx != ccx->nhm_include_txon ||
+	    include_cca != ccx->nhm_include_cca ||
+	    divi_opt != ccx->nhm_divider_opt) {
+	    /* some old ic is not supported on NHM divider option */
+		if (dm->support_ic_type & (ODM_RTL8188E | ODM_RTL8723B |
+		    ODM_RTL8195A | ODM_RTL8192E)) {
+			val_tmp = (u32)((include_tx << 2) |
+				  (include_cca << 1) | 1);
+			pdm_set_reg(dm, reg1, R_0x700, val_tmp);
+		} else {
+			val_tmp = (u32)BIT_2_BYTE(divi_opt, include_tx,
+				  include_cca, 1);
+			pdm_set_reg(dm, reg1, R_0xf00, val_tmp);
+		}
+		ccx->nhm_include_txon = include_tx;
+		ccx->nhm_include_cca = include_cca;
+		ccx->nhm_divider_opt = divi_opt;
+		#if 0
+		PHYDM_DBG(dm, DBG_ENV_MNTR,
+			  "val_tmp=%d, incld{tx, cca}={%d, %d}, divi_opt=%d, period=%d\n",
+			  val_tmp, include_tx, include_cca, divi_opt, period);
+
+		PHYDM_DBG(dm, DBG_ENV_MNTR, "0x994=0x%x\n",
+			  odm_get_bb_reg(dm, 0x994, 0xf00));
+		#endif
+	}
 
-	} else if (p_dm->support_ic_type & ODM_IC_11N_SERIES) {
+	/*Set NHM period*/
+	if (period != ccx->nhm_period) {
+		pdm_set_reg(dm, reg2, MASKHWORD, period);
+		PHYDM_DBG(dm, DBG_ENV_MNTR,
+			  "Update NHM period ((%d)) -> ((%d))\n",
+			  ccx->nhm_period, period);
 
+		ccx->nhm_period = period;
+	}
 
+	/*Set NHM threshold*/
+	if (phydm_nhm_th_update_chk(dm, nhm_app, &(nhm_th[0]), &igi)) {
+		/*Pause IGI*/
+		if (nhm_app == NHM_BACKGROUND || nhm_app == NHM_ACS) {
+			PHYDM_DBG(dm, DBG_ENV_MNTR, "DIG Free Run\n");
+		} else if (phydm_pause_func(dm, F00_DIG, PHYDM_PAUSE,
+					    PHYDM_PAUSE_LEVEL_1, 1, &igi)
+					    == PAUSE_FAIL) {
+			PHYDM_DBG(dm, DBG_ENV_MNTR, "pause DIG Fail\n");
+			return;
+		} else {
+			PHYDM_DBG(dm, DBG_ENV_MNTR, "pause DIG=0x%x\n", igi);
+		}
+		ccx->nhm_app = nhm_app;
+		ccx->nhm_igi = (u8)igi;
+		odm_move_memory(dm, &ccx->nhm_th[0], &nhm_th, NHM_TH_NUM);
 
+		/*Set NHM th*/
+		phydm_nhm_set_th_reg(dm);
 	}
 }
 
-void
-phydm_clm_setting(
-	void			*p_dm_void
-)
+u8 phydm_nhm_mntr_set(void *dm_void, struct nhm_para_info *nhm_para)
 {
-	struct PHY_DM_STRUCT		*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	struct _CCX_INFO	*ccx_info = &p_dm->dm_ccx_info;
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	u16 nhm_time = 0; /*unit: 4us*/
 
-	if (p_dm->support_ic_type & ODM_IC_11AC_SERIES) {
+	PHYDM_DBG(dm, DBG_ENV_MNTR, "[%s]===>\n", __func__);
 
-		odm_set_bb_reg(p_dm, ODM_REG_CCX_PERIOD_11AC, MASKLWORD, ccx_info->clm_period);	/*4us sample 1 time*/
-		/**/
-	} else if (p_dm->support_ic_type & ODM_IC_11N_SERIES) {
+	if (nhm_para->mntr_time == 0)
+		return PHYDM_SET_FAIL;
 
-		odm_set_bb_reg(p_dm, ODM_REG_CCX_PERIOD_11N, MASKLWORD, ccx_info->clm_period);
-		/**/
+	if (nhm_para->nhm_lv >= NHM_MAX_NUM) {
+		PHYDM_DBG(dm, DBG_ENV_MNTR, "Wrong LV=%d\n", nhm_para->nhm_lv);
+		return PHYDM_SET_FAIL;
 	}
 
-	PHYDM_DBG(p_dm, DBG_ENV_MNTR, ("Set CLM period=%d * 4us\n", ccx_info->clm_period));
+	if (phydm_nhm_racing_ctrl(dm, nhm_para->nhm_lv) == PHYDM_SET_FAIL)
+		return PHYDM_SET_FAIL;
+
+	if (nhm_para->mntr_time >= 262)
+		nhm_time = NHM_PERIOD_MAX;
+	else
+		nhm_time = nhm_para->mntr_time * MS_TO_4US_RATIO;
+
+	phydm_nhm_set(dm, nhm_para->incld_txon, nhm_para->incld_cca,
+		      nhm_para->div_opt, nhm_para->nhm_app, nhm_time);
 
+	return PHYDM_SET_SUCCESS;
 }
 
-void
-phydm_clm_hw_restart(
-	void			*p_dm_void
-)
+/*@Environment Monitor*/
+boolean
+phydm_nhm_mntr_chk(void *dm_void, u16 monitor_time /*unit ms*/)
 {
-	struct PHY_DM_STRUCT		*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	struct _CCX_INFO	*ccx_info = &p_dm->dm_ccx_info;
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct ccx_info *ccx = &dm->dm_ccx_info;
+	struct nhm_para_info nhm_para = {0};
+	boolean nhm_chk_result = false;
+	u32 sys_return_time = 0;
 
-	if (p_dm->support_ic_type & ODM_IC_11AC_SERIES) {
+	PHYDM_DBG(dm, DBG_ENV_MNTR, "[%s]===>\n", __func__);
 
-		odm_set_bb_reg(p_dm, ODM_REG_CLM_11AC, BIT(8), 0x0); /*Enable CCX for CLM*/
-		odm_set_bb_reg(p_dm, ODM_REG_CLM_11AC, BIT(8), 0x1); /*Enable CCX for CLM*/
-
-	} else if (p_dm->support_ic_type & ODM_IC_11N_SERIES) {
+	if (ccx->nhm_manual_ctrl) {
+		PHYDM_DBG(dm, DBG_ENV_MNTR, "NHM in manual ctrl\n");
+		return nhm_chk_result;
+	}
+	sys_return_time = ccx->nhm_trigger_time + MAX_ENV_MNTR_TIME;
+	if (ccx->nhm_app != NHM_BACKGROUND &&
+	    (sys_return_time > dm->phydm_sys_up_time)) {
+		PHYDM_DBG(dm, DBG_ENV_MNTR,
+			  "nhm_app=%d, trigger_time %d, sys_time=%d\n",
+			  ccx->nhm_app, ccx->nhm_trigger_time,
+			  dm->phydm_sys_up_time);
+
+		return nhm_chk_result;
+	}
 
-		odm_set_bb_reg(p_dm, ODM_REG_CLM_11AC, BIT(8), 0x0); /*Enable CCX for CLM*/
-		odm_set_bb_reg(p_dm, ODM_REG_CLM_11N, BIT(8), 0x1);	/*Enable CCX for CLM*/
+	/*@[NHM get result & calculate Utility----------------------------*/
+	if (phydm_nhm_get_result(dm)) {
+		PHYDM_DBG(dm, DBG_ENV_MNTR, "Get NHM_rpt success\n");
+		phydm_nhm_get_utility(dm);
 	}
 
-	PHYDM_DBG(p_dm, DBG_ENV_MNTR, ("Set CLM period=%d * 4us\n", ccx_info->clm_period));
+	/*@[NHM trigger]-------------------------------------------------*/
+	nhm_para.incld_txon = NHM_EXCLUDE_TXON;
+	nhm_para.incld_cca = NHM_EXCLUDE_CCA;
+	nhm_para.div_opt = NHM_CNT_ALL;
+	nhm_para.nhm_app = NHM_BACKGROUND;
+	nhm_para.nhm_lv = NHM_LV_1;
+	nhm_para.mntr_time = monitor_time;
+
+	nhm_chk_result = phydm_nhm_mntr_set(dm, &nhm_para);
 
+	return nhm_chk_result;
 }
 
-void
-phydm_clm_trigger(
-	void			*p_dm_void
-)
+void phydm_nhm_init(void *dm_void)
 {
-	struct PHY_DM_STRUCT		*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct ccx_info *ccx = &dm->dm_ccx_info;
 
-	PHYDM_DBG(p_dm, DBG_ENV_MNTR, ("[%s]===>\n", __FUNCTION__));
+	PHYDM_DBG(dm, DBG_ENV_MNTR, "[%s]===>\n", __func__);
+	PHYDM_DBG(dm, DBG_ENV_MNTR, "cur_igi=0x%x\n",
+		  dm->dm_dig_table.cur_ig_value);
 
-	if (p_dm->support_ic_type & ODM_IC_11AC_SERIES) {
-		odm_set_bb_reg(p_dm, ODM_REG_CLM_11AC, BIT(0), 0x0);	/*Trigger CLM*/
-		odm_set_bb_reg(p_dm, ODM_REG_CLM_11AC, BIT(0), 0x1);
-	} else if (p_dm->support_ic_type & ODM_IC_11N_SERIES) {
-		odm_set_bb_reg(p_dm, ODM_REG_CLM_11N, BIT(0), 0x0);	/*Trigger CLM*/
-		odm_set_bb_reg(p_dm, ODM_REG_CLM_11N, BIT(0), 0x1);
-	}
+	ccx->nhm_app = NHM_BACKGROUND;
+	ccx->nhm_igi = 0xff;
+
+	/*Set NHM threshold*/
+	ccx->nhm_ongoing = false;
+	ccx->nhm_set_lv = NHM_RELEASE;
+
+	if (phydm_nhm_th_update_chk(dm, ccx->nhm_app, &ccx->nhm_th[0],
+				    (u32 *)&ccx->nhm_igi))
+		phydm_nhm_set_th_reg(dm);
+
+	ccx->nhm_period = 0;
+
+	ccx->nhm_include_cca = NHM_CCA_INIT;
+	ccx->nhm_include_txon = NHM_TXON_INIT;
+	ccx->nhm_divider_opt = NHM_CNT_INIT;
+
+	ccx->nhm_manual_ctrl = 0;
+	ccx->nhm_rpt_stamp = 0;
 }
 
-boolean
-phydm_check_clm_rdy(
-	void			*p_dm_void
-)
+void phydm_nhm_dbg(void *dm_void, char input[][16], u32 *_used, char *output,
+		   u32 *_out_len)
 {
-	struct PHY_DM_STRUCT		*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	boolean			is_ready = false;
-	u8				i;
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct ccx_info *ccx = &dm->dm_ccx_info;
+	struct nhm_para_info nhm_para;
+	char help[] = "-h";
+	u32 var1[10] = {0};
+	u32 used = *_used;
+	u32 out_len = *_out_len;
+	boolean nhm_rpt_success = true;
+	u8 result_tmp = 0;
+	u8 i;
+
+	PHYDM_SSCANF(input[1], DCMD_DECIMAL, &var1[0]);
 
-	if (p_dm->support_ic_type & ODM_IC_11AC_SERIES) {
-		for (i = 0; i < 200; i++) {
-			ODM_delay_ms(1);
-			if (odm_get_bb_reg(p_dm, ODM_REG_CLM_RESULT_11AC, BIT(16))) {
-				is_ready = 1;
-				break;
+	if ((strcmp(input[1], help) == 0)) {
+		PDM_SNPF(out_len, used, output + used, out_len - used,
+			 "NHM Basic-Trigger 262ms: {1}\n");
+
+		PDM_SNPF(out_len, used, output + used, out_len - used,
+			 "NHM Adv-Trigger: {2} {Include TXON} {Include CCA}\n{0:Cnt_all, 1:Cnt valid} {App} {LV} {0~262ms}\n");
+
+		PDM_SNPF(out_len, used, output + used, out_len - used,
+			 "NHM Get Result: {100}\n");
+	} else if (var1[0] == 100) { /*@Get NHM results*/
+
+		PDM_SNPF(out_len, used, output + used, out_len - used,
+			 "IGI=0x%x, rpt_stamp=%d\n", ccx->nhm_igi,
+			 ccx->nhm_rpt_stamp);
+
+		nhm_rpt_success = phydm_nhm_get_result(dm);
+
+		if (nhm_rpt_success) {
+			for (i = 0; i <= 11; i++) {
+				result_tmp = ccx->nhm_result[i];
+				PDM_SNPF(out_len, used, output + used,
+					 out_len - used,
+					 "nhm_rpt[%d] = %d (%d percent)\n",
+					 i, result_tmp,
+					 (((result_tmp * 100) + 128) >> 8));
 			}
+		} else {
+			PDM_SNPF(out_len, used, output + used, out_len - used,
+				 "Get NHM_rpt Fail\n");
 		}
-	} else if (p_dm->support_ic_type & ODM_IC_11N_SERIES) {
-		for (i = 0; i < 200; i++) {
-			ODM_delay_ms(1);
-			if (odm_get_bb_reg(p_dm, ODM_REG_CLM_READY_11N, BIT(16))) {
-				is_ready = 1;
-				break;
+		ccx->nhm_manual_ctrl = 0;
+
+	} else { /*NMH trigger*/
+
+		ccx->nhm_manual_ctrl = 1;
+
+		for (i = 1; i < 7; i++) {
+			if (input[i + 1]) {
+				PHYDM_SSCANF(input[i + 1], DCMD_DECIMAL,
+					     &var1[i]);
+			}
+		}
+
+		if (var1[0] == 1) {
+			nhm_para.incld_txon = NHM_EXCLUDE_TXON;
+			nhm_para.incld_cca = NHM_EXCLUDE_CCA;
+			nhm_para.div_opt = NHM_CNT_ALL;
+			nhm_para.nhm_app = NHM_DBG;
+			nhm_para.nhm_lv = NHM_LV_4;
+			nhm_para.mntr_time = 262;
+		} else {
+			nhm_para.incld_txon = (enum nhm_option_txon_all)var1[1];
+			nhm_para.incld_cca = (enum nhm_option_cca_all)var1[2];
+			nhm_para.div_opt = (enum nhm_divider_opt_all)var1[3];
+			nhm_para.nhm_app = (enum nhm_application)var1[4];
+			nhm_para.nhm_lv = (enum phydm_nhm_level)var1[5];
+			nhm_para.mntr_time = (u16)var1[6];
+
+			/* some old ic is not supported on NHM divider option */
+			if (dm->support_ic_type & (ODM_RTL8188E | ODM_RTL8723B |
+			    ODM_RTL8195A | ODM_RTL8192E)) {
+				nhm_para.div_opt = NHM_CNT_ALL;
 			}
 		}
+
+		PDM_SNPF(out_len, used, output + used, out_len - used,
+			 "txon=%d, cca=%d, dev=%d, app=%d, lv=%d, time=%d ms\n",
+			 nhm_para.incld_txon, nhm_para.incld_cca,
+			 nhm_para.div_opt, nhm_para.nhm_app,
+			 nhm_para.nhm_lv, nhm_para.mntr_time);
+
+		if (phydm_nhm_mntr_set(dm, &nhm_para) == PHYDM_SET_SUCCESS)
+			phydm_nhm_trigger(dm);
+
+		PDM_SNPF(out_len, used, output + used, out_len - used,
+			 "IGI=0x%x, rpt_stamp=%d\n", ccx->nhm_igi,
+			 ccx->nhm_rpt_stamp);
+
+		for (i = 0; i <= 10; i++) {
+			PDM_SNPF(out_len, used, output + used, out_len - used,
+				 "NHM_th[%d] RSSI = %d\n", i,
+				 NTH_TH_2_RSSI(ccx->nhm_th[i]));
+		}
 	}
-	PHYDM_DBG(p_dm, DBG_ENV_MNTR, ("CLM rdy=%d\n", is_ready));
-	return is_ready;
+
+	*_used = used;
+	*_out_len = out_len;
+}
+#endif /*@#ifdef NHM_SUPPORT*/
+
+#ifdef CLM_SUPPORT
+
+void phydm_clm_racing_release(void *dm_void)
+{
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct ccx_info *ccx = &dm->dm_ccx_info;
+
+	PHYDM_DBG(dm, DBG_ENV_MNTR, "[%s]===>\n", __func__);
+	PHYDM_DBG(dm, DBG_ENV_MNTR, "lv:(%d)->(0)\n", ccx->clm_set_lv);
+
+	ccx->clm_ongoing = false;
+	ccx->clm_set_lv = CLM_RELEASE;
+	ccx->clm_app = CLM_BACKGROUND;
 }
 
-void
-phydm_get_clm_result(
-	void			*p_dm_void
-)
+u8 phydm_clm_racing_ctrl(void *dm_void, enum phydm_nhm_level clm_lv)
 {
-	struct PHY_DM_STRUCT		*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	struct _CCX_INFO	*ccx_info = &p_dm->dm_ccx_info;
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct ccx_info *ccx = &dm->dm_ccx_info;
+	u8 set_result = PHYDM_SET_SUCCESS;
+	/*@acquire to control CLM API*/
+
+	PHYDM_DBG(dm, DBG_ENV_MNTR, "clm_ongoing=%d, lv:(%d)->(%d)\n",
+		  ccx->clm_ongoing, ccx->clm_set_lv, clm_lv);
+	if (ccx->clm_ongoing) {
+		if (clm_lv <= ccx->clm_set_lv) {
+			set_result = PHYDM_SET_FAIL;
+		} else {
+			phydm_ccx_hw_restart(dm);
+			ccx->clm_ongoing = false;
+		}
+	}
 
-	if (p_dm->support_ic_type & ODM_IC_11AC_SERIES)
-		ccx_info->clm_result = (u16)odm_get_bb_reg(p_dm, ODM_REG_CLM_RESULT_11AC, MASKDWORD);
-	else if (p_dm->support_ic_type & ODM_IC_11N_SERIES)
-		ccx_info->clm_result = (u16)odm_get_bb_reg(p_dm, ODM_REG_CLM_RESULT_11N, MASKDWORD);
+	if (set_result)
+		ccx->clm_set_lv = clm_lv;
 
-	PHYDM_DBG(p_dm, DBG_ENV_MNTR, ("CLM result = %d *4 us\n", ccx_info->clm_result));
+	PHYDM_DBG(dm, DBG_ENV_MNTR, "clm racing success=%d\n", set_result);
+	return set_result;
 }
 
-void
-phydm_set_nhm_th_by_igi(
-	void			*p_dm_void,
-	u8				igi
-)
+void phydm_clm_c2h_report_handler(void *dm_void, u8 *cmd_buf, u8 cmd_len)
 {
-	struct PHY_DM_STRUCT	*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	struct _CCX_INFO		*ccx_info = &p_dm->dm_ccx_info;
-	u8	th_gap = 2 * IGI_TO_NHM_TH_MULTIPLIER;
-	u8	i;
-
-	ccx_info->echo_igi = igi;
-	ccx_info->nhm_th[0] = (ccx_info->echo_igi - CCA_CAP) * IGI_TO_NHM_TH_MULTIPLIER;
-	for (i = 1; i <= 10; i++)
-		ccx_info->nhm_th[i] = ccx_info->nhm_th[0] + th_gap * i;
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct ccx_info *ccx_info = &dm->dm_ccx_info;
+	u8 clm_report = cmd_buf[0];
+	/*@u8 clm_report_idx = cmd_buf[1];*/
+
+	if (cmd_len >= 12)
+		return;
+
+	ccx_info->clm_fw_result_acc += clm_report;
+	ccx_info->clm_fw_result_cnt++;
+
+	PHYDM_DBG(dm, DBG_ENV_MNTR, "[%d] clm_report= %d\n",
+		  ccx_info->clm_fw_result_cnt, clm_report);
 }
 
-void
-phydm_set_clm_mntr_mode(
-	void			*p_dm_void,
-	enum clm_monitor_mode_e mode
-)
+void phydm_clm_h2c(void *dm_void, u16 obs_time, u8 fw_clm_en)
 {
-	struct PHY_DM_STRUCT	*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	struct _CCX_INFO		*ccx_info = &p_dm->dm_ccx_info;
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	u8 h2c_val[H2C_MAX_LENGTH] = {0};
+	u8 i = 0;
+	u8 obs_time_idx = 0;
 
-	if (ccx_info->clm_mntr_mode != mode) {
-		ccx_info->clm_mntr_mode = mode;
-		phydm_clm_hw_restart(p_dm);
+	PHYDM_DBG(dm, DBG_ENV_MNTR, "[%s] ======>\n", __func__);
+	PHYDM_DBG(dm, DBG_ENV_MNTR, "obs_time_index=%d *4 us\n", obs_time);
 
-		if (mode == CLM_DRIVER_MNTR) {
-			phydm_clm_h2c(p_dm,0, 0);
+	for (i = 1; i <= 16; i++) {
+		if (obs_time & BIT(16 - i)) {
+			obs_time_idx = 16 - i;
+			break;
 		}
 	}
+#if 0
+	obs_time = (2 ^ 16 - 1)~(2 ^ 15)  => obs_time_idx = 15  (65535 ~32768)
+	obs_time = (2 ^ 15 - 1)~(2 ^ 14)  => obs_time_idx = 14
+	...
+	...
+	...
+	obs_time = (2 ^ 1 - 1)~(2 ^ 0)  => obs_time_idx = 0
+
+#endif
+
+	h2c_val[0] = obs_time_idx | (((fw_clm_en) ? 1 : 0) << 7);
+	h2c_val[1] = CLM_MAX_REPORT_TIME;
+
+	PHYDM_DBG(dm, DBG_ENV_MNTR, "PHYDM h2c[0x4d]=0x%x %x %x %x %x %x %x\n",
+		  h2c_val[6], h2c_val[5], h2c_val[4], h2c_val[3], h2c_val[2],
+		  h2c_val[1], h2c_val[0]);
+
+	odm_fill_h2c_cmd(dm, PHYDM_H2C_FW_CLM_MNTR, H2C_MAX_LENGTH, h2c_val);
 }
 
-void
-phydm_ccx_monitor_trigger(
-	void			*p_dm_void,
-	u16			monitor_time		/*unit ms*/
-)
+void phydm_clm_setting(void *dm_void, u16 clm_period /*@4us sample 1 time*/)
 {
-	u8			nhm_th[11], i, igi;
-	struct PHY_DM_STRUCT	*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	struct _CCX_INFO		*ccx_info = &p_dm->dm_ccx_info;
-	u16 	monitor_time_4us = 0;
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct ccx_info *ccx = &dm->dm_ccx_info;
+
+	if (ccx->clm_period != clm_period) {
+		if (dm->support_ic_type & ODM_IC_11AC_SERIES)
+			odm_set_bb_reg(dm, R_0x990, MASKLWORD, clm_period);
+		#ifdef PHYDM_IC_JGR3_SERIES_SUPPORT
+		else if (dm->support_ic_type & ODM_IC_JGR3_SERIES)
+			odm_set_bb_reg(dm, R_0x1e40, MASKLWORD, clm_period);
+		#endif
+		else if (dm->support_ic_type & ODM_IC_11N_SERIES)
+			odm_set_bb_reg(dm, R_0x894, MASKLWORD, clm_period);
+
+		ccx->clm_period = clm_period;
+		PHYDM_DBG(dm, DBG_ENV_MNTR,
+			  "Update CLM period ((%d)) -> ((%d))\n",
+			  ccx->clm_period, clm_period);
+	}
 
-	if (!(p_dm->support_ability & ODM_BB_ENV_MONITOR))
-		return;
+	PHYDM_DBG(dm, DBG_ENV_MNTR, "Set CLM period=%d * 4us\n",
+		  ccx->clm_period);
+}
 
-	PHYDM_DBG(p_dm, DBG_ENV_MNTR, ("[%s]===>\n", __FUNCTION__));
+void phydm_clm_trigger(void *dm_void)
+{
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct ccx_info *ccx = &dm->dm_ccx_info;
+	u32 reg1 = 0;
+
+	if (dm->support_ic_type & ODM_IC_11AC_SERIES)
+		reg1 = R_0x994;
+	#ifdef PHYDM_IC_JGR3_SERIES_SUPPORT
+	else if (dm->support_ic_type & ODM_IC_JGR3_SERIES)
+		reg1 = R_0x1e60;
+	#endif
+	else
+		reg1 = R_0x890;
+	PHYDM_DBG(dm, DBG_ENV_MNTR, "[%s]===>\n", __func__);
 
-	if (monitor_time == 0)
-		return;
+	odm_set_bb_reg(dm, reg1, BIT(0), 0x0);
+	odm_set_bb_reg(dm, reg1, BIT(0), 0x1);
 
-	if (monitor_time >= 262)
-		monitor_time_4us = 65534;
+	ccx->clm_trigger_time = dm->phydm_sys_up_time;
+	ccx->clm_rpt_stamp++;
+	ccx->clm_ongoing = true;
+}
+
+boolean
+phydm_clm_check_rdy(void *dm_void)
+{
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	boolean is_ready = false;
+	u32 reg1 = 0, reg1_bit = 0;
+#if (ENV_MNTR_DBG)
+	u16 i = 0;
+	u64 start_time = 0, progressing_time = 0;
+#endif
+
+	if (dm->support_ic_type & ODM_IC_11AC_SERIES) {
+		reg1 = R_0xfa4;
+		reg1_bit = 16;
+	#ifdef PHYDM_IC_JGR3_SERIES_SUPPORT
+	} else if (dm->support_ic_type & ODM_IC_JGR3_SERIES) {
+		reg1 = R_0x2d88;
+		reg1_bit = 16;
+	#endif
+	} else if (dm->support_ic_type & ODM_IC_11N_SERIES) {
+		if (dm->support_ic_type == ODM_RTL8710B) {
+			reg1 = R_0x8b4;
+			reg1_bit = 24;
+		} else {
+			reg1 = R_0x8b4;
+			reg1_bit = 16;
+		}
+	}
+#if (ENV_MNTR_DBG)
+	start_time = odm_get_current_time(dm);
+	for (i = 0; i <= 400; i++) {
+		if (odm_get_bb_reg(dm, reg1, BIT(reg1_bit))) {
+			is_ready = true;
+			break;
+		}
+		ODM_delay_ms(1);
+	}
+	progressing_time = odm_get_progressing_time(dm, start_time);
+
+	PHYDM_DBG(dm, DBG_ENV_MNTR, "CLM rdy=%d, i=%d, CLM_polling_time=%lld\n",
+		  is_ready, i, progressing_time);
+#else
+	if (odm_get_bb_reg(dm, reg1, BIT(reg1_bit)))
+		is_ready = true;
+
+	PHYDM_DBG(dm, DBG_ENV_MNTR, "CLM rdy=%d\n", is_ready);
+#endif
+	return is_ready;
+}
+
+void phydm_clm_get_utility(void *dm_void)
+{
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct ccx_info *ccx = &dm->dm_ccx_info;
+	u32 clm_result_tmp;
+
+	if (ccx->clm_period == 0) {
+		PHYDM_DBG(dm, DBG_ENV_MNTR, "[warning] clm_period = 0\n");
+		ccx->clm_ratio = 0;
+	} else if (ccx->clm_period >= 65530) {
+		clm_result_tmp = (u32)(ccx->clm_result * 100);
+		ccx->clm_ratio = (u8)((clm_result_tmp + (1 << 15)) >> 16);
+	} else {
+		clm_result_tmp = (u32)(ccx->clm_result * 100);
+		ccx->clm_ratio = (u8)(clm_result_tmp / (u32)ccx->clm_period);
+	}
+}
+
+boolean
+phydm_clm_get_result(void *dm_void)
+{
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct ccx_info *ccx_info = &dm->dm_ccx_info;
+	u32 reg1 = 0;
+	u32 val = 0;
+
+	if (dm->support_ic_type & ODM_IC_11AC_SERIES)
+		reg1 = R_0x994;
+	#ifdef PHYDM_IC_JGR3_SERIES_SUPPORT
+	else if (dm->support_ic_type & ODM_IC_JGR3_SERIES)
+		reg1 = R_0x1e60;
+	#endif
 	else
-		monitor_time_4us = monitor_time * MS_TO_4US_RATIO;
-
-	/* check if NHM threshold is changed */
-	if (p_dm->support_ic_type & ODM_IC_11AC_SERIES) {
-		
-		nhm_th[0] = (u8)odm_get_bb_reg(p_dm, ODM_REG_NHM_TH3_TO_TH0_11AC, MASKBYTE0);
-		nhm_th[1] = (u8)odm_get_bb_reg(p_dm, ODM_REG_NHM_TH3_TO_TH0_11AC, MASKBYTE1);
-		nhm_th[2] = (u8)odm_get_bb_reg(p_dm, ODM_REG_NHM_TH3_TO_TH0_11AC, MASKBYTE2);
-		nhm_th[3] = (u8)odm_get_bb_reg(p_dm, ODM_REG_NHM_TH3_TO_TH0_11AC, MASKBYTE3);
-		nhm_th[4] = (u8)odm_get_bb_reg(p_dm, ODM_REG_NHM_TH7_TO_TH4_11AC, MASKBYTE0);
-		nhm_th[5] = (u8)odm_get_bb_reg(p_dm, ODM_REG_NHM_TH7_TO_TH4_11AC, MASKBYTE1);
-		nhm_th[6] = (u8)odm_get_bb_reg(p_dm, ODM_REG_NHM_TH7_TO_TH4_11AC, MASKBYTE2);
-		nhm_th[7] = (u8)odm_get_bb_reg(p_dm, ODM_REG_NHM_TH7_TO_TH4_11AC, MASKBYTE3);
-		nhm_th[8] = (u8)odm_get_bb_reg(p_dm, ODM_REG_NHM_TH8_11AC, MASKBYTE0);
-		nhm_th[9] = (u8)odm_get_bb_reg(p_dm, ODM_REG_NHM_TH9_TH10_11AC, MASKBYTE2);
-		nhm_th[10] = (u8)odm_get_bb_reg(p_dm, ODM_REG_NHM_TH9_TH10_11AC, MASKBYTE3);
-	} else if (p_dm->support_ic_type & ODM_IC_11N_SERIES) {
-		
-		nhm_th[0] = (u8)odm_get_bb_reg(p_dm, ODM_REG_NHM_TH3_TO_TH0_11N, MASKBYTE0);
-		nhm_th[1] = (u8)odm_get_bb_reg(p_dm, ODM_REG_NHM_TH3_TO_TH0_11N, MASKBYTE1);
-		nhm_th[2] = (u8)odm_get_bb_reg(p_dm, ODM_REG_NHM_TH3_TO_TH0_11N, MASKBYTE2);
-		nhm_th[3] = (u8)odm_get_bb_reg(p_dm, ODM_REG_NHM_TH3_TO_TH0_11N, MASKBYTE3);
-		nhm_th[4] = (u8)odm_get_bb_reg(p_dm, ODM_REG_NHM_TH7_TO_TH4_11N, MASKBYTE0);
-		nhm_th[5] = (u8)odm_get_bb_reg(p_dm, ODM_REG_NHM_TH7_TO_TH4_11N, MASKBYTE1);
-		nhm_th[6] = (u8)odm_get_bb_reg(p_dm, ODM_REG_NHM_TH7_TO_TH4_11N, MASKBYTE2);
-		nhm_th[7] = (u8)odm_get_bb_reg(p_dm, ODM_REG_NHM_TH7_TO_TH4_11N, MASKBYTE3);
-		nhm_th[8] = (u8)odm_get_bb_reg(p_dm, ODM_REG_NHM_TH8_11N, MASKBYTE0);
-		nhm_th[9] = (u8)odm_get_bb_reg(p_dm, ODM_REG_NHM_TH9_TH10_11N, MASKBYTE2);
-		nhm_th[10] = (u8)odm_get_bb_reg(p_dm, ODM_REG_NHM_TH9_TH10_11N, MASKBYTE3);
+		reg1 = R_0x890;
+	if (!(dm->support_ic_type == ODM_RTL8822C))
+		odm_set_bb_reg(dm, reg1, BIT(0), 0x0);
+	if (phydm_clm_check_rdy(dm) == false) {
+		PHYDM_DBG(dm, DBG_ENV_MNTR, "Get CLM report Fail\n");
+		phydm_clm_racing_release(dm);
+		return false;
 	}
 
-	for (i = 0; i <= 10; i++) {
-		
-		if (nhm_th[i] != ccx_info->nhm_th[i]) {	
-			PHYDM_DBG(p_dm, DBG_ENV_MNTR,
-				("nhm_th[%d] != ccx_info->nhm_th[%d]!!\n", i, i));
-		}
+	if (dm->support_ic_type & ODM_IC_11AC_SERIES) {
+		val = odm_get_bb_reg(dm, R_0xfa4, MASKLWORD);
+		ccx_info->clm_result = (u16)val;
+	#ifdef PHYDM_IC_JGR3_SERIES_SUPPORT
+	} else if (dm->support_ic_type & ODM_IC_JGR3_SERIES) {
+		val = odm_get_bb_reg(dm, R_0x2d88, MASKLWORD);
+		ccx_info->clm_result = (u16)val;
+	#endif
+	} else if (dm->support_ic_type & ODM_IC_11N_SERIES) {
+		val = odm_get_bb_reg(dm, R_0x8d0, MASKLWORD);
+		ccx_info->clm_result = (u16)val;
 	}
-	/*[NHM]*/
-	igi = (u8)odm_get_bb_reg(p_dm, 0xC50, MASKBYTE0);
-	phydm_set_nhm_th_by_igi(p_dm, igi);
-
-	ccx_info->nhm_period = monitor_time_4us;
-	ccx_info->nhm_inexclude_cca = NHM_EXCLUDE_CCA;
-	ccx_info->nhm_inexclude_txon = NHM_EXCLUDE_TXON;
-
-	phydm_nhm_setting(p_dm, SET_NHM_SETTING);
-	phydm_nhm_trigger(p_dm);
-
-	/*[CLM]*/
-	ccx_info->clm_period = monitor_time_4us;
-	
-	if (ccx_info->clm_mntr_mode == CLM_DRIVER_MNTR) {
-		phydm_clm_setting(p_dm);
-		phydm_clm_trigger(p_dm);
-	} else if (ccx_info->clm_mntr_mode == CLM_FW_MNTR){
-		phydm_clm_h2c(p_dm, monitor_time_4us, TRUE);
+
+	PHYDM_DBG(dm, DBG_ENV_MNTR, "CLM result = %d *4 us\n",
+		  ccx_info->clm_result);
+	phydm_clm_racing_release(dm);
+	return true;
+}
+
+void phydm_clm_mntr_fw(void *dm_void, u16 monitor_time /*unit ms*/)
+{
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct ccx_info *ccx = &dm->dm_ccx_info;
+	u32 val = 0;
+
+	/*@[Get CLM report]*/
+	if (ccx->clm_fw_result_cnt != 0) {
+		val = ccx->clm_fw_result_acc / ccx->clm_fw_result_cnt;
+		ccx->clm_ratio = (u8)val;
 	} else {
-		PHYDM_DBG(p_dm, DBG_ENV_MNTR, ("CLM_ECHO_DBG_MODE\n"));
+		ccx->clm_ratio = 0;
 	}
 
+	PHYDM_DBG(dm, DBG_ENV_MNTR,
+		  "clm_fw_result_acc=%d, clm_fw_result_cnt=%d\n",
+		  ccx->clm_fw_result_acc, ccx->clm_fw_result_cnt);
+
+	ccx->clm_fw_result_acc = 0;
+	ccx->clm_fw_result_cnt = 0;
+
+	/*@[CLM trigger]*/
+	if (monitor_time >= 262)
+		ccx->clm_period = 65535;
+	else
+		ccx->clm_period = monitor_time * MS_TO_4US_RATIO;
+
+	phydm_clm_h2c(dm, ccx->clm_period, true);
 }
 
-void
-phydm_ccx_monitor_result(
-	void			*p_dm_void
-)
+u8 phydm_clm_mntr_set(void *dm_void, struct clm_para_info *clm_para)
 {
-	struct PHY_DM_STRUCT	*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	struct _CCX_INFO		*ccx_info = &p_dm->dm_ccx_info;
-	u32					clm_result_tmp = 0;
+	/*@Driver Monitor CLM*/
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct ccx_info *ccx = &dm->dm_ccx_info;
+	u16 clm_period = 0;
+
+	if (clm_para->mntr_time == 0)
+		return PHYDM_SET_FAIL;
+
+	if (clm_para->clm_lv >= CLM_MAX_NUM) {
+		PHYDM_DBG(dm, DBG_ENV_MNTR, "[WARNING] Wrong LV=%d\n",
+			  clm_para->clm_lv);
+		return PHYDM_SET_FAIL;
+	}
 
-	if (!(p_dm->support_ability & ODM_BB_ENV_MONITOR))
-		return;
+	if (phydm_clm_racing_ctrl(dm, clm_para->clm_lv) == PHYDM_SET_FAIL)
+		return PHYDM_SET_FAIL;
+
+	if (clm_para->mntr_time >= 262)
+		clm_period = CLM_PERIOD_MAX;
+	else
+		clm_period = clm_para->mntr_time * MS_TO_4US_RATIO;
 
-	PHYDM_DBG(p_dm, DBG_ENV_MNTR, ("%s ======>\n", __func__));
+	ccx->clm_app = clm_para->clm_app;
+	phydm_clm_setting(dm, clm_period);
 
-	if (phydm_check_nhm_rdy(p_dm)) {
-		phydm_get_nhm_result(p_dm);
+	return PHYDM_SET_SUCCESS;
+}
 
-		if (ccx_info->nhm_result_total != 0)
-			ccx_info->nhm_ratio  = (u8)(((ccx_info->nhm_result_total - ccx_info->nhm_result[0])*100) >> 8);
+boolean
+phydm_clm_mntr_chk(void *dm_void, u16 monitor_time /*unit ms*/)
+{
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct ccx_info *ccx = &dm->dm_ccx_info;
+	struct clm_para_info clm_para = {0};
+	boolean clm_chk_result = false;
+	u32 sys_return_time = 0;
+
+	PHYDM_DBG(dm, DBG_ENV_MNTR, "[%s] ======>\n", __func__);
+	if (ccx->clm_manual_ctrl) {
+		PHYDM_DBG(dm, DBG_ENV_MNTR, "CLM in manual ctrl\n");
+		return clm_chk_result;
 	}
 
-	if (ccx_info->clm_mntr_mode == CLM_DRIVER_MNTR) {
-		
-		if (phydm_check_clm_rdy(p_dm)) {
-			phydm_get_clm_result(p_dm);
-
-			if (ccx_info->clm_period != 0) {
-
-				if (ccx_info->clm_period == 64000)
-					ccx_info->clm_ratio = (u8)(((ccx_info->clm_result >> 6) + 5) /10);
-				else if (ccx_info->clm_period == 65535) {
-					
-					clm_result_tmp = (u32)(ccx_info->clm_result * 100);
-					ccx_info->clm_ratio = (u8)((clm_result_tmp + (1<<15)) >> 16);
-				} else
-					ccx_info->clm_ratio = (u8)((ccx_info->clm_result*100) / ccx_info->clm_period);
-			}
+	sys_return_time = ccx->clm_trigger_time + MAX_ENV_MNTR_TIME;
+
+	if (ccx->clm_app != CLM_BACKGROUND &&
+	    sys_return_time > dm->phydm_sys_up_time) {
+		PHYDM_DBG(dm, DBG_ENV_MNTR, "trigger_time %d, sys_time=%d\n",
+			  ccx->clm_trigger_time, dm->phydm_sys_up_time);
+
+		return clm_chk_result;
+	}
+
+	clm_para.clm_app = CLM_BACKGROUND;
+	clm_para.clm_lv = CLM_LV_1;
+	clm_para.mntr_time = monitor_time;
+	if (ccx->clm_mntr_mode == CLM_DRIVER_MNTR) {
+		/*@[Get CLM report]*/
+		if (phydm_clm_get_result(dm)) {
+			PHYDM_DBG(dm, DBG_ENV_MNTR, "Get CLM_rpt success\n");
+			phydm_clm_get_utility(dm);
 		}
-		
+
+		/*@[CLM trigger]----------------------------------------------*/
+		if (phydm_clm_mntr_set(dm, &clm_para) == PHYDM_SET_SUCCESS)
+			clm_chk_result = true;
 	} else {
-		if (ccx_info->clm_fw_result_cnt != 0)
-			ccx_info->clm_ratio = (u8)(ccx_info->clm_fw_result_acc /ccx_info->clm_fw_result_cnt);
-		else
-			ccx_info->clm_ratio = 0;
-
-		PHYDM_DBG(p_dm, DBG_ENV_MNTR, ("clm_fw_result_acc=%d, clm_fw_result_cnt=%d\n",
-			ccx_info->clm_fw_result_acc, ccx_info->clm_fw_result_cnt));
-		
-		ccx_info->clm_fw_result_acc = 0;
-		ccx_info->clm_fw_result_cnt = 0;
+		phydm_clm_mntr_fw(dm, monitor_time);
 	}
 
-	PHYDM_DBG(p_dm, DBG_ENV_MNTR, ("IGI=0x%x, nhm_ratio=%d, clm_ratio=%d\n\n",
-		ccx_info->echo_igi, ccx_info->nhm_ratio, ccx_info->clm_ratio));
-		
+	PHYDM_DBG(dm, DBG_ENV_MNTR, "clm_ratio=%d\n", ccx->clm_ratio);
+
+	/*@PHYDM_DBG(dm, DBG_ENV_MNTR, "clm_chk_result=%d\n",clm_chk_result);*/
+
+	return clm_chk_result;
 }
 
-void
-phydm_ccx_monitor(
-	void			*p_dm_void
-)
+void phydm_set_clm_mntr_mode(void *dm_void, enum clm_monitor_mode mode)
 {
-	struct PHY_DM_STRUCT	*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct ccx_info *ccx_info = &dm->dm_ccx_info;
 
-	if (!(p_dm->support_ability & ODM_BB_ENV_MONITOR))
-		return;
+	if (ccx_info->clm_mntr_mode != mode) {
+		ccx_info->clm_mntr_mode = mode;
+		phydm_ccx_hw_restart(dm);
 
-	PHYDM_DBG(p_dm, DBG_ENV_MNTR, ("[%s]===>\n", __FUNCTION__));
+		if (mode == CLM_DRIVER_MNTR)
+			phydm_clm_h2c(dm, 0, 0);
+	}
+}
 
-	phydm_ccx_monitor_result(p_dm);
-	phydm_ccx_monitor_trigger(p_dm, 262);	/*monitor 262ms*/
+void phydm_clm_init(void *dm_void)
+{
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct ccx_info *ccx = &dm->dm_ccx_info;
+
+	PHYDM_DBG(dm, DBG_ENV_MNTR, "[%s]===>\n", __func__);
+	ccx->clm_ongoing = false;
+	ccx->clm_manual_ctrl = 0;
+	ccx->clm_mntr_mode = CLM_DRIVER_MNTR;
+	ccx->clm_period = 0;
+	ccx->clm_rpt_stamp = 0;
+	phydm_clm_setting(dm, 65535);
 }
 
-void
-phydm_nhm_init(
-	void			*p_dm_void
-)
+void phydm_clm_dbg(void *dm_void, char input[][16], u32 *_used, char *output,
+		   u32 *_out_len)
 {
-	struct PHY_DM_STRUCT	*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	struct _CCX_INFO		*ccx_info = &p_dm->dm_ccx_info;
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct ccx_info *ccx = &dm->dm_ccx_info;
+	char help[] = "-h";
+	u32 var1[10] = {0};
+	u32 used = *_used;
+	u32 out_len = *_out_len;
+	struct clm_para_info clm_para = {0};
+	u32 i;
+
+	for (i = 0; i < 4; i++) {
+		if (input[i + 1])
+			PHYDM_SSCANF(input[i + 1], DCMD_DECIMAL, &var1[i]);
+	}
 
-	PHYDM_DBG(p_dm, DBG_ENV_MNTR, ("[%s]===>\n", __FUNCTION__));
-	PHYDM_DBG(p_dm, DBG_ENV_MNTR, ("cur_ig_value=0x%x\n", p_dm->dm_dig_table.cur_ig_value));
+	if ((strcmp(input[1], help) == 0)) {
+		PDM_SNPF(out_len, used, output + used, out_len - used,
+			 "CLM Driver Basic-Trigger 262ms: {1}\n");
+		PDM_SNPF(out_len, used, output + used, out_len - used,
+			 "CLM Driver Adv-Trigger: {2} {app} {LV} {0~262ms}\n");
+		PDM_SNPF(out_len, used, output + used, out_len - used,
+			 "CLM FW Trigger: {3} {1:drv, 2:fw}\n");
+		PDM_SNPF(out_len, used, output + used, out_len - used,
+			 "CLM Get Result: {100}\n");
+	} else if (var1[0] == 100) { /* @Get CLM results */
 
-	phydm_set_nhm_th_by_igi(p_dm, p_dm->dm_dig_table.cur_ig_value);
+		if (phydm_clm_get_result(dm))
+			phydm_clm_get_utility(dm);
 
-	ccx_info->nhm_period = 64000;
-	ccx_info->nhm_inexclude_cca = NHM_EXCLUDE_CCA;
-	ccx_info->nhm_inexclude_txon = NHM_EXCLUDE_TXON;
+		PDM_SNPF(out_len, used, output + used, out_len - used,
+			 "clm_rpt_stamp=%d\n", ccx->clm_rpt_stamp);
+
+		PDM_SNPF(out_len, used, output + used, out_len - used,
+			 "clm_ratio:((%d percent)) = (%d us/ %d us)\n",
+			 ccx->clm_ratio, ccx->clm_result << 2,
+			 ccx->clm_period << 2);
+
+		ccx->clm_manual_ctrl = 0;
+
+	} else if (var1[0] == 3) {
+		phydm_set_clm_mntr_mode(dm, (enum clm_monitor_mode)var1[1]);
+		PDM_SNPF(out_len, used, output + used, out_len - used,
+			 "CLM mode: %s mode\n",
+			 ((ccx->clm_mntr_mode == CLM_FW_MNTR) ? "FW" : "Drv"));
+	} else { /* Set & trigger CLM */
+		ccx->clm_manual_ctrl = 1;
+
+		if (var1[0] == 1) {
+			clm_para.clm_app = CLM_BACKGROUND;
+			clm_para.clm_lv = CLM_LV_4;
+			clm_para.mntr_time = 262;
+			ccx->clm_mntr_mode = CLM_DRIVER_MNTR;
+
+		} else if (var1[0] == 2) {
+			clm_para.clm_app = (enum clm_application)var1[1];
+			clm_para.clm_lv = (enum phydm_clm_level)var1[2];
+			ccx->clm_mntr_mode = CLM_DRIVER_MNTR;
+			clm_para.mntr_time = (u16)var1[3];
+
+		}
+
+		PDM_SNPF(out_len, used, output + used, out_len - used,
+			 "app=%d, lv=%d, mode=%s, time=%d ms\n",
+			 clm_para.clm_app, clm_para.clm_lv,
+			 ((ccx->clm_mntr_mode == CLM_FW_MNTR) ? "FW" :
+			 "driver"), clm_para.mntr_time);
+
+		if (phydm_clm_mntr_set(dm, &clm_para) == PHYDM_SET_SUCCESS)
+			phydm_clm_trigger(dm);
+
+		PDM_SNPF(out_len, used, output + used, out_len - used,
+			 "clm_rpt_stamp=%d\n", ccx->clm_rpt_stamp);
+	}
 
-	phydm_nhm_setting(p_dm, SET_NHM_SETTING);
+	*_used = used;
+	*_out_len = out_len;
 }
 
-void
-phydm_clm_init(
-	void			*p_dm_void
-)
+#endif /*@#ifdef CLM_SUPPORT*/
+
+u8 phydm_env_mntr_trigger(void *dm_void, struct nhm_para_info *nhm_para,
+			  struct clm_para_info *clm_para,
+			  struct env_trig_rpt *trig_rpt)
 {
-	struct PHY_DM_STRUCT	*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	struct _CCX_INFO		*ccx_info = &p_dm->dm_ccx_info;
+#if (defined(NHM_SUPPORT) && defined(CLM_SUPPORT))
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct ccx_info *ccx = &dm->dm_ccx_info;
+	boolean nhm_set_ok = false;
+	boolean clm_set_ok = false;
+	u8 trigger_result = 0;
+
+	PHYDM_DBG(dm, DBG_ENV_MNTR, "[%s] ======>\n", __func__);
+
+#if (ENV_MNTR_DBG_2)
+	if (dm->support_ic_type & ODM_IC_11AC_SERIES) {
+	PHYDM_DBG(dm, DBG_ENV_MNTR,
+		  "[DBG][2] 0xc50=0x%x, 0x994=0x%x, 0x998=0x%x\n",
+		  odm_get_bb_reg(dm, R_0xc50, MASKDWORD),
+		  odm_get_bb_reg(dm, R_0x994, MASKDWORD),
+		  odm_get_bb_reg(dm, R_0x998, MASKDWORD));
+	#ifdef PHYDM_IC_JGR3_SERIES_SUPPORT
+	} else if (dm->support_ic_type & ODM_IC_JGR3_SERIES) {
+		PHYDM_DBG(dm, DBG_ENV_MNTR,
+			  "[DBG][2] 0x1d70=0x%x, 0x1e60=0x%x, 0x1e44=0x%x\n",
+			 odm_get_bb_reg(dm, R_0x1d70, MASKDWORD),
+			 odm_get_bb_reg(dm, R_0x1e60, MASKDWORD),
+			 odm_get_bb_reg(dm, R_0x1e44, MASKDWORD));
+	#endif
+	}
+#endif
+
+	/*@[NHM]*/
+	nhm_set_ok = phydm_nhm_mntr_set(dm, nhm_para);
+
+	/*@[CLM]*/
+	if (ccx->clm_mntr_mode == CLM_DRIVER_MNTR) {
+		clm_set_ok = phydm_clm_mntr_set(dm, clm_para);
+	} else if (ccx->clm_mntr_mode == CLM_FW_MNTR) {
+		phydm_clm_h2c(dm, CLM_PERIOD_MAX, true);
+		trigger_result |= CLM_SUCCESS;
+	}
+
+	if (nhm_set_ok) {
+		phydm_nhm_trigger(dm);
+		trigger_result |= NHM_SUCCESS;
+	}
 
-	PHYDM_DBG(p_dm, DBG_ENV_MNTR, ("[%s]===>\n", __FUNCTION__));
+	if (clm_set_ok) {
+		phydm_clm_trigger(dm);
+		trigger_result |= CLM_SUCCESS;
+	}
+
+	/*@monitor for the test duration*/
+	ccx->start_time = odm_get_current_time(dm);
+
+	trig_rpt->nhm_rpt_stamp = ccx->nhm_rpt_stamp;
+	trig_rpt->clm_rpt_stamp = ccx->clm_rpt_stamp;
 
-	ccx_info->clm_mntr_mode = CLM_DRIVER_MNTR;
-	ccx_info->clm_period = 65535;
-	phydm_clm_setting(p_dm);
-	phydm_clm_hw_restart(p_dm);
+	PHYDM_DBG(dm, DBG_ENV_MNTR, "nhm_rpt_stamp=%d, clm_rpt_stamp=%d,\n\n",
+		  trig_rpt->nhm_rpt_stamp, trig_rpt->clm_rpt_stamp);
+
+	return trigger_result;
+#endif
 }
 
-void
-phydm_env_monitor_init(
-	void			*p_dm_void
-)
+u8 phydm_env_mntr_result(void *dm_void, struct env_mntr_rpt *rpt)
 {
-	struct PHY_DM_STRUCT	*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
+#if (defined(NHM_SUPPORT) && defined(CLM_SUPPORT))
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct ccx_info *ccx = &dm->dm_ccx_info;
+	u8 env_mntr_rpt = 0;
+	u64 progressing_time = 0;
+	u32 val_tmp = 0;
+
+	/*@monitor for the test duration*/
+	progressing_time = odm_get_progressing_time(dm, ccx->start_time);
+	PHYDM_DBG(dm, DBG_ENV_MNTR, "[%s] ======>\n", __func__);
+	PHYDM_DBG(dm, DBG_ENV_MNTR, "env_time=%lld\n", progressing_time);
+
+#if (ENV_MNTR_DBG_2)
+	if (dm->support_ic_type & ODM_IC_11AC_SERIES) {
+		PHYDM_DBG(dm, DBG_ENV_MNTR,
+			  "[DBG][2] 0xc50=0x%x, 0x994=0x%x, 0x998=0x%x\n",
+			  odm_get_bb_reg(dm, R_0xc50, MASKDWORD),
+			  odm_get_bb_reg(dm, R_0x994, MASKDWORD),
+			  odm_get_bb_reg(dm, R_0x998, MASKDWORD));
+	#ifdef PHYDM_IC_JGR3_SERIES_SUPPORT
+	} else if (dm->support_ic_type & ODM_IC_JGR3_SERIES) {
+		PHYDM_DBG(dm, DBG_ENV_MNTR,
+			  "[DBG][2] 0x1d70=0x%x, 0x1e60=0x%x, 0x1e44=0x%x\n",
+			  odm_get_bb_reg(dm, R_0x1d70, MASKDWORD),
+			  odm_get_bb_reg(dm, R_0x1e60, MASKDWORD),
+			  odm_get_bb_reg(dm, R_0x1e44, MASKDWORD));
+	#endif
+	}
+#endif
+
+	/*@Get NHM result*/
+	if (phydm_nhm_get_result(dm)) {
+		PHYDM_DBG(dm, DBG_ENV_MNTR, "Get NHM_rpt success\n");
+		phydm_nhm_get_utility(dm);
+		rpt->nhm_ratio = ccx->nhm_ratio;
+		env_mntr_rpt |= NHM_SUCCESS;
 
-	if (!(p_dm->support_ability & ODM_BB_ENV_MONITOR))
+		odm_move_memory(dm, &rpt->nhm_result[0],
+				&ccx->nhm_result[0], NHM_RPT_NUM);
+	} else {
+		rpt->nhm_ratio = ENV_MNTR_FAIL;
+	}
+
+	/*@Get CLM result*/
+	if (ccx->clm_mntr_mode == CLM_DRIVER_MNTR) {
+		if (phydm_clm_get_result(dm)) {
+			PHYDM_DBG(dm, DBG_ENV_MNTR, "Get CLM_rpt success\n");
+			phydm_clm_get_utility(dm);
+			env_mntr_rpt |= CLM_SUCCESS;
+			rpt->clm_ratio = ccx->clm_ratio;
+		} else {
+			rpt->clm_ratio = ENV_MNTR_FAIL;
+		}
+
+	} else {
+		if (ccx->clm_fw_result_cnt != 0) {
+			val_tmp = ccx->clm_fw_result_acc
+			/ ccx->clm_fw_result_cnt;
+			ccx->clm_ratio = (u8)val_tmp;
+		} else {
+			ccx->clm_ratio = 0;
+		}
+
+		rpt->clm_ratio = ccx->clm_ratio;
+		PHYDM_DBG(dm, DBG_ENV_MNTR,
+			  "clm_fw_result_acc=%d, clm_fw_result_cnt=%d\n",
+			  ccx->clm_fw_result_acc, ccx->clm_fw_result_cnt);
+
+		ccx->clm_fw_result_acc = 0;
+		ccx->clm_fw_result_cnt = 0;
+		env_mntr_rpt |= CLM_SUCCESS;
+	}
+
+	rpt->nhm_rpt_stamp = ccx->nhm_rpt_stamp;
+	rpt->clm_rpt_stamp = ccx->clm_rpt_stamp;
+
+	PHYDM_DBG(dm, DBG_ENV_MNTR,
+		  "IGI=0x%x, nhm_ratio=%d, clm_ratio=%d, nhm_rpt_stamp=%d, clm_rpt_stamp=%d\n\n",
+		  ccx->nhm_igi, rpt->nhm_ratio, rpt->clm_ratio,
+		  rpt->nhm_rpt_stamp, rpt->clm_rpt_stamp);
+
+	return env_mntr_rpt;
+#endif
+}
+
+/*@Environment Monitor*/
+void phydm_env_mntr_watchdog(void *dm_void)
+{
+#if (defined(NHM_SUPPORT) && defined(CLM_SUPPORT))
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct ccx_info *ccx = &dm->dm_ccx_info;
+	boolean nhm_chk_ok = false;
+	boolean clm_chk_ok = false;
+
+	if (!(dm->support_ability & ODM_BB_ENV_MONITOR))
 		return;
 
-	PHYDM_DBG(p_dm, DBG_ENV_MNTR, ("[%s]===>\n", __FUNCTION__));
+	PHYDM_DBG(dm, DBG_ENV_MNTR, "[%s]===>\n", __func__);
+	nhm_chk_ok = phydm_nhm_mntr_chk(dm, 262); /*@monitor 262ms*/
+	clm_chk_ok = phydm_clm_mntr_chk(dm, 262); /*@monitor 262ms*/
+
+	/*@PHYDM_DBG(dm, DBG_ENV_MNTR, "nhm_chk_ok %d\n\n",nhm_chk_ok);*/
+	/*@PHYDM_DBG(dm, DBG_ENV_MNTR, "clm_chk_ok %d\n\n",clm_chk_ok);*/
+
+	if (nhm_chk_ok)
+		phydm_nhm_trigger(dm);
 
-	phydm_nhm_init(p_dm);
-	phydm_clm_init(p_dm);
+	if (clm_chk_ok)
+		phydm_clm_trigger(dm);
+
+	PHYDM_DBG(dm, DBG_ENV_MNTR,
+		  "Summary: nhm_ratio=((%d)) clm_ratio=((%d))\n\n",
+		  ccx->nhm_ratio, ccx->clm_ratio);
+#endif
 }
 
-void
-phydm_clm_dbg(
-	void		*p_dm_void,
-	char		input[][16],
-	u32		*_used,
-	char		*output,
-	u32		*_out_len,
-	u32		input_num
-)
+void phydm_env_monitor_init(void *dm_void)
 {
-	struct PHY_DM_STRUCT	*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	struct _CCX_INFO	*ccx_info = &p_dm->dm_ccx_info;
-	char		help[] = "-h";
-	u32		var1[10] = {0};
-	u32		used = *_used;
-	u32		out_len = *_out_len;
-	u32		i;
+#if (defined(NHM_SUPPORT) && defined(CLM_SUPPORT))
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
 
-	for (i = 0; i < 2; i++) {
-		if (input[i + 1]) {
-			PHYDM_SSCANF(input[i + 1], DCMD_DECIMAL, &var1[i]);
-		}
-	}
+	if (!(dm->support_ability & ODM_BB_ENV_MONITOR))
+		return;
+
+	PHYDM_DBG(dm, DBG_ENV_MNTR, "[%s]===>\n", __func__);
+	phydm_ccx_hw_restart(dm);
+	phydm_nhm_init(dm);
+	phydm_clm_init(dm);
+#endif
+}
+
+void phydm_env_mntr_dbg(void *dm_void, char input[][16], u32 *_used,
+			char *output, u32 *_out_len)
+{
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	char help[] = "-h";
+	u32 var1[10] = {0};
+	u32 used = *_used;
+	u32 out_len = *_out_len;
+	struct clm_para_info clm_para = {0};
+	struct nhm_para_info nhm_para = {0};
+	struct env_mntr_rpt rpt = {0};
+	struct env_trig_rpt trig_rpt = {0};
+	u8 set_result;
+	u8 i;
+
+	PHYDM_SSCANF(input[1], DCMD_DECIMAL, &var1[0]);
 
 	if ((strcmp(input[1], help) == 0)) {
-		PHYDM_SNPRINTF((output + used, out_len - used, "{1: trigger, 2:get result}\n"));
-		PHYDM_SNPRINTF((output + used, out_len - used, "{3: MNTR mode sel} {1: driver, 2. FW}\n"));
-		return;
-	} else if (var1[0] == 1) { /* Set & trigger CLM */
-		
-		ccx_info->clm_period = 65535;		/* 65535*4us = 262.14ms*/
-		phydm_clm_setting(p_dm);
-		phydm_clm_hw_restart(p_dm);
-		phydm_clm_trigger(p_dm);
-		PHYDM_SNPRINTF((output + used, out_len - used, "Monitor CLM for 262ms\n"));
-		
-	} else if (var1[0] == 2) { /* Get CLM results */
-
-		phydm_get_clm_result(p_dm);
-		PHYDM_SNPRINTF((output + used, out_len - used, "CLM_result=%d us\n", (ccx_info->clm_result<<2)));
+		PDM_SNPF(out_len, used, output + used, out_len - used,
+			 "Basic-Trigger 262ms: {1}\n");
+		PDM_SNPF(out_len, used, output + used, out_len - used,
+			 "Get Result: {100}\n");
+	} else if (var1[0] == 100) { /* @Get CLM results */
 
-	} else if (var1[0] == 3) {
+		set_result = phydm_env_mntr_result(dm, &rpt);
 
-		if (var1[1] == 1)
-			ccx_info->clm_mntr_mode = CLM_DRIVER_MNTR;
-		else if (var1[1] == 2)
-			ccx_info->clm_mntr_mode = CLM_FW_MNTR;
+		PDM_SNPF(out_len, used, output + used, out_len - used,
+			 "Set Result=%d\n nhm_ratio=%d clm_ratio=%d\n nhm_rpt_stamp=%d, clm_rpt_stamp=%d,\n",
+			 set_result, rpt.nhm_ratio, rpt.clm_ratio,
+			 rpt.nhm_rpt_stamp, rpt.clm_rpt_stamp);
 
-	} else {
-		
-		PHYDM_SNPRINTF((output + used, out_len - used, "Error\n"));
+		for (i = 0; i <= 11; i++) {
+			PDM_SNPF(out_len, used, output + used, out_len - used,
+				 "nhm_rpt[%d] = %d (%d percent)\n", i,
+				 rpt.nhm_result[i],
+				 (((rpt.nhm_result[i] * 100) + 128) >> 8));
+		}
+
+	} else { /* Set & trigger CLM */
+		/*nhm para*/
+		nhm_para.incld_txon = NHM_EXCLUDE_TXON;
+		nhm_para.incld_cca = NHM_EXCLUDE_CCA;
+		nhm_para.div_opt = NHM_CNT_ALL;
+		nhm_para.nhm_app = NHM_ACS;
+		nhm_para.nhm_lv = NHM_LV_2;
+		nhm_para.mntr_time = 262;
+
+		/*@clm para*/
+		clm_para.clm_app = CLM_ACS;
+		clm_para.clm_lv = CLM_LV_2;
+		clm_para.mntr_time = 262;
+
+		set_result = phydm_env_mntr_trigger(dm, &nhm_para,
+						    &clm_para, &trig_rpt);
+
+		PDM_SNPF(out_len, used, output + used, out_len - used,
+			 "Set Result=%d, nhm_rpt_stamp=%d, clm_rpt_stamp=%d\n",
+			 set_result, trig_rpt.nhm_rpt_stamp,
+			 trig_rpt.clm_rpt_stamp);
 	}
-	
+
 	*_used = used;
 	*_out_len = out_len;
-}
\ No newline at end of file
+}
+
diff --git a/rtl8723DS/hal/phydm/phydm_ccx.h b/rtl8723DS/hal/phydm/phydm_ccx.h
index 3719fed..2b3d1da 100755..100644
--- a/rtl8723DS/hal/phydm/phydm_ccx.h
+++ b/rtl8723DS/hal/phydm/phydm_ccx.h
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2007 - 2017 Realtek Corporation.
+ * Copyright(c) 2007 - 2017  Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -8,35 +8,85 @@
  *
  * This program is distributed in the hope that it will be useful, but WITHOUT
  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  * more details.
  *
+ * The full GNU General Public License is included in this distribution in the
+ * file called LICENSE.
+ *
+ * Contact Information:
+ * wlanfae <wlanfae@realtek.com>
+ * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
+ * Hsinchu 300, Taiwan.
+ *
+ * Larry Finger <Larry.Finger@lwfinger.net>
+ *
  *****************************************************************************/
 
-#ifndef	__PHYDMCCX_H__
-#define    __PHYDMCCX_H__
+#ifndef __PHYDMCCX_H__
+#define __PHYDMCCX_H__
 
-/* 1 ============================================================
+/* @1 ============================================================
  * 1  Definition
- * 1 ============================================================ */
+ * 1 ============================================================
+ */
+#define	ENV_MNTR_DBG	0	/*@debug for the HW processing time from NHM/CLM trigger and get result*/
+#define	ENV_MNTR_DBG_1	0	/*@debug 8812A & 8821A P2P Fail to get result*/
+#define	ENV_MNTR_DBG_2	0	/*@debug for read reister*/
 
 #define CCX_EN 1
 
-#define	IGI_TO_NHM_TH_MULTIPLIER	2
-#define	MS_TO_4US_RATIO				250
-#define	CCA_CAP	14
+#define	MAX_ENV_MNTR_TIME	8	/*second*/
+#define	IGI_TO_NHM_TH_MULTIPLIER 2
+#define	MS_TO_4US_RATIO		250
+#define	CCA_CAP			14
 #define	CLM_MAX_REPORT_TIME	10
-#define	DEVIDER_ERROR	0xffff
+#define	DEVIDER_ERROR		0xffff
+#define CLM_PERIOD_MAX		65535
+#define NHM_PERIOD_MAX		65534
+#define	NHM_TH_NUM		11	/*threshold number of NHM*/
+#define	NHM_RPT_NUM		12
 
-/*FAHM*/
-#define	FAHM_INCLD_FA			BIT(0)
+#define	IGI_2_NHM_TH(igi)	((igi) << 1)/*NHM_threshold = IGI * 2*/
+#define	NTH_TH_2_RSSI(th)	((th >> 1) - 10)
+
+/*@FAHM*/
+#define	FAHM_INCLD_FA		BIT(0)
 #define	FAHM_INCLD_CRC_OK	BIT(1)
-#define	FAHM_INCLD_CRC_ER		BIT(2)
+#define	FAHM_INCLD_CRC_ER	BIT(2)
 
+#define NHM_SUCCESS		BIT(0)
+#define CLM_SUCCESS		BIT(1)
+#define FAHM_SUCCESS		BIT(2)
+#define	ENV_MNTR_FAIL		0xff
 
-/* 1 ============================================================
+/* @1 ============================================================
  * 1 enumrate
- * 1 ============================================================ */
+ * 1 ============================================================
+ */
+enum phydm_clm_level {
+	CLM_RELEASE		= 0,
+	CLM_LV_1		= 1,	/* @Low Priority function */
+	CLM_LV_2		= 2,	/* @Middle Priority function */
+	CLM_LV_3		= 3,	/* @High priority function (ex: Check hang function) */
+	CLM_LV_4		= 4,	/* @Debug function (the highest priority) */
+	CLM_MAX_NUM		= 5
+};
+
+enum phydm_nhm_level {
+	NHM_RELEASE		= 0,
+	NHM_LV_1		= 1,	/* @Low Priority function */
+	NHM_LV_2		= 2,	/* @Middle Priority function */
+	NHM_LV_3		= 3,	/* @High priority function (ex: Check hang function) */
+	NHM_LV_4		= 4,	/* @Debug function (the highest priority) */
+	NHM_MAX_NUM		= 5
+};
+
+enum nhm_divider_opt_all {
+	NHM_CNT_ALL		= 0,	/*nhm SUM report <= 255*/
+	NHM_VALID		= 1,	/*nhm SUM report = 255*/
+	NHM_CNT_INIT
+};
 
 enum nhm_setting {
 	SET_NHM_SETTING,
@@ -44,166 +94,175 @@ enum nhm_setting {
 	RESTORE_NHM_SETTING
 };
 
-enum nhm_inexclude_cca {
-	NHM_EXCLUDE_CCA,
-	NHM_INCLUDE_CCA
+enum nhm_option_cca_all {
+	NHM_EXCLUDE_CCA		= 0,
+	NHM_INCLUDE_CCA		= 1,
+	NHM_CCA_INIT
+};
+
+enum nhm_option_txon_all {
+	NHM_EXCLUDE_TXON	= 0,
+	NHM_INCLUDE_TXON	= 1,
+	NHM_TXON_INIT
 };
 
-enum nhm_inexclude_txon {
-	NHM_EXCLUDE_TXON,
-	NHM_INCLUDE_TXON
+enum nhm_application {
+	NHM_BACKGROUND		= 0,/*@default*/
+	NHM_ACS			= 1,
+	IEEE_11K_HIGH		= 2,
+	IEEE_11K_LOW		= 3,
+	INTEL_XBOX		= 4,
+	NHM_DBG			= 5, /*@manual trigger*/
 };
 
-enum clm_monitor_mode_e {
-	CLM_ECHO_DBG_MODE	= 0,
+enum clm_application {
+	CLM_BACKGROUND		= 0,/*@default*/
+	CLM_ACS			= 1,
+};
+
+enum clm_monitor_mode {
 	CLM_DRIVER_MNTR		= 1,
-	CLM_FW_MNTR			= 2
+	CLM_FW_MNTR		= 2
 };
 
-/* 1 ============================================================
+/* @1 ============================================================
  * 1  structure
- * 1 ============================================================ */
+ * 1 ============================================================
+ */
+struct env_trig_rpt {
+	u8			nhm_rpt_stamp;
+	u8			clm_rpt_stamp;
+};
+
+
+struct env_mntr_rpt {
+	u8			nhm_ratio;
+	u8			nhm_result[NHM_RPT_NUM];
+	u8			clm_ratio;
+	u8			nhm_rpt_stamp;
+	u8			clm_rpt_stamp;
+};
 
-struct _CCX_INFO {
+struct nhm_para_info {
+	enum nhm_option_txon_all	incld_txon;	/*@Include TX on*/
+	enum nhm_option_cca_all		incld_cca;	/*@Include CCA*/
+	enum nhm_divider_opt_all	div_opt;	/*@divider option*/
+	enum nhm_application		nhm_app;
+	enum phydm_nhm_level		nhm_lv;
+	u16				mntr_time;	/*@0~262 unit ms*/
 
-	/*Settings*/
-	u8					nhm_th[11];
-	u16					nhm_period;				/* 4us per unit */
-	u16					clm_period;				/* 4us per unit */
-	enum nhm_inexclude_txon		nhm_inexclude_txon;
-	enum nhm_inexclude_cca		nhm_inexclude_cca;
+};
 
-	/*Previous Settings*/
-	u8					nhm_th_restore[11];
-	u16					nhm_period_restore;				/* 4us per unit */
-	u16					clm_period_restore;				/* 4us per unit */
-	enum nhm_inexclude_txon		nhm_inexclude_txon_restore;
-	enum nhm_inexclude_cca		nhm_inexclude_cca_restore;
+struct clm_para_info {
+	enum clm_application		clm_app;
+	enum phydm_clm_level		clm_lv;
+	u16				mntr_time;	/*@0~262 unit ms*/
+};
 
+struct ccx_info {
+	u32			nhm_trigger_time;
+	u32			clm_trigger_time;
+	u64			start_time;	/*@monitor for the test duration*/
+#ifdef NHM_SUPPORT
+	enum nhm_application		nhm_app;
+	enum nhm_option_txon_all	nhm_include_txon;
+	enum nhm_option_cca_all		nhm_include_cca;
+	enum nhm_divider_opt_all 	nhm_divider_opt;
 	/*Report*/
-	u8		nhm_result[12];
-	u8		nhm_ratio;		/*1% per nuit, it means the interference igi can't overcome.*/
-	u8		nhm_result_total;
-	u16		nhm_duration;
-	u16		clm_result;
-	u8		clm_ratio;
-	u8		echo_igi;	/* nhm_result comes from this igi */
-	u32		clm_fw_result_acc;
-	u8		clm_fw_result_cnt;
-	enum clm_monitor_mode_e		clm_mntr_mode;
-	u8		env_mntr_igi;
+	u8			nhm_th[NHM_TH_NUM];
+	u8			nhm_result[NHM_RPT_NUM];
+	u16			nhm_period;	/* @4us per unit */
+	u8			nhm_igi;
+	u8			nhm_manual_ctrl;
+	u8			nhm_ratio;	/*@1% per nuit, it means the interference igi can't overcome.*/
+	u8			nhm_rpt_sum;
+	u16			nhm_duration;	/*@Real time of NHM_VALID */
+	u8			nhm_set_lv;
+	boolean			nhm_ongoing;
+	u8			nhm_rpt_stamp;
+#endif
+#ifdef CLM_SUPPORT
+	enum clm_application	clm_app;
+	u8			clm_manual_ctrl;
+	u8			clm_set_lv;
+	boolean			clm_ongoing;
+	u16			clm_period;	/* @4us per unit */
+	u16			clm_result;
+	u8			clm_ratio;
+	u32			clm_fw_result_acc;
+	u8			clm_fw_result_cnt;
+	enum clm_monitor_mode	clm_mntr_mode;
+	u8			clm_rpt_stamp;
+#endif
 #ifdef FAHM_SUPPORT
-	u8		fahm_nume_sel;		/*fahm_numerator_sel: select {FA, CRCOK, CRC_fail} */
-	u8		fahm_denum_sel;	/*fahm_denumerator_sel: select {FA, CRCOK, CRC_fail} */
-	u16		fahm_period;			/*unit: 4us*/
+	boolean			fahm_ongoing;
+	u8			env_mntr_igi;
+	u8			fahm_nume_sel;	/*@fahm_numerator_sel: select {FA, CRCOK, CRC_fail} */
+	u8			fahm_denom_sel;	/*@fahm_denominator_sel: select {FA, CRCOK, CRC_fail} */
+	u16			fahm_period;	/*unit: 4us*/
 #endif
-
 };
 
-/* 1 ============================================================
- * 1 structure
- * 1 ============================================================ */
+/* @1 ============================================================
+ * 1 Function Prototype
+ * 1 ============================================================
+ */
 
 #ifdef FAHM_SUPPORT
 
-void
-phydm_fahm_init(
-	void			*p_dm_void
-);
-
-void
-phydm_fahm_dbg(
-	void		*p_dm_void,
-	char		input[][16],
-	u32		*_used,
-	char		*output,
-	u32		*_out_len,
-	u32		input_num
-);
+void phydm_fahm_init(void *dm_void);
+
+void phydm_fahm_dbg(void *dm_void, char input[][16], u32 *_used, char *output,
+		    u32 *_out_len);
+
+#endif
+
+/*@NHM*/
+#ifdef NHM_SUPPORT
+void phydm_nhm_trigger(void *dm_void);
+
+void phydm_nhm_init(void *dm_void);
 
+void phydm_nhm_dbg(void *dm_void, char input[][16], u32 *_used, char *output,
+		   u32 *_out_len);
+u8 phydm_get_igi(void *dm_void, enum bb_path path);
 #endif
 
-void
-phydm_c2h_clm_report_handler(
-	void	*p_dm_void,
-	u8	*cmd_buf,
-	u8	cmd_len
-);
-/*NHM*/
-
-boolean
-phydm_cal_nhm_cnt(
-	void		*p_dm_void
-);
-
-void
-phydm_nhm_setting(
-	void		*p_dm_void,
-	u8	nhm_setting
-);
-
-void
-phydm_nhm_trigger(
-	void		*p_dm_void
-);
-
-void
-phydm_get_nhm_result(
-	void		*p_dm_void
-);
-
-/*CLM*/
-
-void
-phydm_clm_setting(
-	void			*p_dm_void
-);
-
-void
-phydm_clm_trigger(
-	void			*p_dm_void
-);
-
-void
-phydm_get_clm_result(
-	void			*p_dm_void
-);
-
-void
-phydm_ccx_monitor(
-	void			*p_dm_void
-);
-
-void
-phydm_ccx_monitor_trigger(
-	void			*p_dm_void,
-	u16				monitor_time
-);
-
-void
-phydm_ccx_monitor_result(
-	void			*p_dm_void
-);
-
-void
-phydm_set_clm_mntr_mode(
-	void			*p_dm_void,
-	enum clm_monitor_mode_e mode
-);
-
-void
-phydm_env_monitor_init(
-	void			*p_dm_void
-);
-
-void
-phydm_clm_dbg(
-	void		*p_dm_void,
-	char		input[][16],
-	u32		*_used,
-	char		*output,
-	u32		*_out_len,
-	u32		input_num
-);
+/*@CLM*/
+#ifdef CLM_SUPPORT
+void phydm_clm_c2h_report_handler(void *dm_void, u8 *cmd_buf, u8 cmd_len);
+
+void phydm_clm_h2c(void *dm_void, u16 obs_time, u8 fw_clm_en);
+
+void phydm_clm_setting(void *dm_void, u16 clm_period);
+
+void phydm_clm_trigger(void *dm_void);
+
+boolean phydm_clm_check_rdy(void *dm_void);
+
+void phydm_clm_get_utility(void *dm_void);
+
+boolean phydm_clm_get_result(void *dm_void);
+
+u8 phydm_clm_mntr_set(void *dm_void, struct clm_para_info *clm_para);
+
+void phydm_set_clm_mntr_mode(void *dm_void, enum clm_monitor_mode mode);
+
+void phydm_clm_dbg(void *dm_void, char input[][16], u32 *_used, char *output,
+		   u32 *_out_len);
+#endif
+
+u8 phydm_env_mntr_trigger(void *dm_void, struct nhm_para_info *nhm_para,
+			  struct clm_para_info *clm_para,
+			  struct env_trig_rpt *rpt);
+
+u8 phydm_env_mntr_result(void *dm_void, struct env_mntr_rpt *rpt);
+
+void phydm_env_mntr_watchdog(void *dm_void);
+
+void phydm_env_monitor_init(void *dm_void);
+
+void phydm_env_mntr_dbg(void *dm_void, char input[][16], u32 *_used,
+			char *output, u32 *_out_len);
 
 #endif
diff --git a/rtl8723DS/hal/phydm/phydm_cfotracking.c b/rtl8723DS/hal/phydm/phydm_cfotracking.c
index 375181f..95d89e3 100755..100644
--- a/rtl8723DS/hal/phydm/phydm_cfotracking.c
+++ b/rtl8723DS/hal/phydm/phydm_cfotracking.c
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2007 - 2017 Realtek Corporation.
+ * Copyright(c) 2007 - 2017  Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -8,374 +8,587 @@
  *
  * This program is distributed in the hope that it will be useful, but WITHOUT
  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  * more details.
  *
+ * The full GNU General Public License is included in this distribution in the
+ * file called LICENSE.
+ *
+ * Contact Information:
+ * wlanfae <wlanfae@realtek.com>
+ * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
+ * Hsinchu 300, Taiwan.
+ *
+ * Larry Finger <Larry.Finger@lwfinger.net>
+ *
  *****************************************************************************/
 #include "mp_precomp.h"
 #include "phydm_precomp.h"
 
-void
-phydm_set_crystal_cap(
-	void					*p_dm_void,
-	u8					crystal_cap
-)
+s32 phydm_get_cfo_hz(void *dm_void, u32 val, u8 bit_num, u8 frac_num)
 {
-	struct PHY_DM_STRUCT				*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	struct phydm_cfo_track_struct				*p_cfo_track = (struct phydm_cfo_track_struct *)phydm_get_structure(p_dm, PHYDM_CFOTRACK);
+	s32 val_s = 0;
 
-	if (p_cfo_track->crystal_cap == crystal_cap)
-		return;
+	val_s = phydm_cnvrt_2_sign(val, bit_num);
 
-	crystal_cap = crystal_cap & 0x3F;
-	p_cfo_track->crystal_cap = crystal_cap;
+	if (frac_num == 10) /*@ (X*312500)/1024 ~= X*305*/
+		val_s *= 305;
+	else if (frac_num == 11) /*@ (X*312500)/2048 ~= X*152*/
+		val_s *= 152;
+	else if (frac_num == 12) /*@ (X*312500)/4096 ~= X*76*/
+		val_s *= 76;
 
-	if (p_dm->support_ic_type & (ODM_RTL8188E | ODM_RTL8188F)) {
-		#if (RTL8188E_SUPPORT == 1) || (RTL8188F_SUPPORT == 1)
-		/* write 0x24[22:17] = 0x24[16:11] = crystal_cap */
-		odm_set_bb_reg(p_dm, REG_AFE_XTAL_CTRL, 0x007ff800, (crystal_cap | (crystal_cap << 6)));
-		#endif
-	}
-	#if (RTL8812A_SUPPORT == 1)
-	else if (p_dm->support_ic_type & ODM_RTL8812) {
-	
-		/* write 0x2C[30:25] = 0x2C[24:19] = crystal_cap */
-		odm_set_bb_reg(p_dm, REG_MAC_PHY_CTRL, 0x7FF80000, (crystal_cap | (crystal_cap << 6)));
-		
-	} 
+	return val_s;
+}
+
+#if (ODM_IC_11AC_SERIES_SUPPORT)
+void phydm_get_cfo_info_ac(void *dm_void, struct phydm_cfo_rpt *cfo)
+{
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	u8 i = 0;
+	u32 val[4] = {0};
+	u32 val_1[4] = {0};
+	u32 val_2[4] = {0};
+	u32 val_tmp = 0;
+
+	val[0] = odm_read_4byte(dm, R_0xd0c);
+	val_1[0] = odm_read_4byte(dm, R_0xd10);
+	val_2[0] = odm_get_bb_reg(dm, R_0xd14, 0x1fff0000);
+
+	#if (defined(PHYDM_COMPILE_ABOVE_2SS))
+	val[1] = odm_read_4byte(dm, R_0xd4c);
+	val_1[1] = odm_read_4byte(dm, R_0xd50);
+	val_2[1] = odm_get_bb_reg(dm, R_0xd54, 0x1fff0000);
 	#endif
-	#if (RTL8703B_SUPPORT == 1) || (RTL8723B_SUPPORT == 1) || (RTL8192E_SUPPORT == 1) || (RTL8821A_SUPPORT == 1) || (RTL8723D_SUPPORT == 1)
-	else if ((p_dm->support_ic_type & (ODM_RTL8703B | ODM_RTL8723B | ODM_RTL8192E | ODM_RTL8821 | ODM_RTL8723D))) {
-	
-		/* 0x2C[23:18] = 0x2C[17:12] = crystal_cap */
-		odm_set_bb_reg(p_dm, REG_MAC_PHY_CTRL, 0x00FFF000, (crystal_cap | (crystal_cap << 6)));
-		
-	}
+
+	#if (defined(PHYDM_COMPILE_ABOVE_3SS))
+	val[2] = odm_read_4byte(dm, R_0xd8c);
+	val_1[2] = odm_read_4byte(dm, R_0xd90);
+	val_2[2] = odm_get_bb_reg(dm, R_0xd94, 0x1fff0000);
 	#endif
-	#if (RTL8814A_SUPPORT == 1)	
-	else if (p_dm->support_ic_type & ODM_RTL8814A) {
-	
-		/* write 0x2C[26:21] = 0x2C[20:15] = crystal_cap */
-		odm_set_bb_reg(p_dm, REG_MAC_PHY_CTRL, 0x07FF8000, (crystal_cap | (crystal_cap << 6)));
-		
-	}
+
+	#if (defined(PHYDM_COMPILE_ABOVE_4SS))
+	val[3] = odm_read_4byte(dm, R_0xdcc);
+	val_1[3] = odm_read_4byte(dm, R_0xdd0);
+	val_2[3] = odm_get_bb_reg(dm, R_0xdd4, 0x1fff0000);
 	#endif
-	#if (RTL8822B_SUPPORT == 1) || (RTL8821C_SUPPORT == 1) || (RTL8197F_SUPPORT == 1)
-	else if (p_dm->support_ic_type & (ODM_RTL8822B | ODM_RTL8821C | ODM_RTL8197F)) {
-	
-		/* write 0x24[30:25] = 0x28[6:1] = crystal_cap */
-		odm_set_bb_reg(p_dm, REG_AFE_XTAL_CTRL, 0x7e000000, crystal_cap);
-		odm_set_bb_reg(p_dm, REG_AFE_PLL_CTRL, 0x7e, crystal_cap);
-		
+
+	for (i = 0; i < dm->num_rf_path; i++) {
+		val_tmp = val[i] & 0xfff;	/*@ Short CFO, S(12,11)*/
+		cfo->cfo_rpt_s[i] = phydm_get_cfo_hz(dm, val_tmp, 12, 11);
+
+		val_tmp = val[i] >> 16;		/*@ Long CFO, S(13,12)*/
+		cfo->cfo_rpt_l[i] = phydm_get_cfo_hz(dm, val_tmp, 13, 12);
+
+		val_tmp = val_1[i] & 0x7ff;	/*@ SCFO, S(11,10)*/
+		cfo->cfo_rpt_sec[i] = phydm_get_cfo_hz(dm, val_tmp, 11, 10);
+
+		val_tmp = val_1[i] >> 16;	/*@ Acq CFO, S(13,12)*/
+		cfo->cfo_rpt_acq[i] = phydm_get_cfo_hz(dm, val_tmp, 13, 12);
+
+		val_tmp = val_2[i];		/*@ End CFO, S(13,12)*/
+		cfo->cfo_rpt_end[i] = phydm_get_cfo_hz(dm, val_tmp, 13, 12);
 	}
-	#endif
-	#if (RTL8710B_SUPPORT == 1)
-	else if (p_dm->support_ic_type & (ODM_RTL8710B)) {
-	
-		#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE))		
-		/* write 0x60[29:24] = 0x60[23:18] = crystal_cap */
-		HAL_SetSYSOnReg(p_dm->adapter, REG_SYS_XTAL_CTRL0, 0x3FFC0000, (crystal_cap | (crystal_cap << 6)));
-		#endif
+}
+#endif
+
+#if (ODM_IC_11N_SERIES_SUPPORT)
+void phydm_get_cfo_info_n(void *dm_void, struct phydm_cfo_rpt *cfo)
+{
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	u32 val[5] = {0};
+	u32 val_tmp = 0;
+
+	odm_set_bb_reg(dm, R_0xd00, BIT(26), 1);
+
+	val[0] = odm_read_4byte(dm, R_0xdac); /*@ Short CFO*/
+	val[1] = odm_read_4byte(dm, R_0xdb0); /*@ Long CFO*/
+	val[2] = odm_read_4byte(dm, R_0xdb8); /*@ Sec CFO*/
+	val[3] = odm_read_4byte(dm, R_0xde0); /*@ Acq CFO*/
+	val[4] = odm_read_4byte(dm, R_0xdbc); /*@ End CFO*/
+
+	/*@[path-A]*/
+	if (dm->support_ic_type == ODM_RTL8721D) {
+		val_tmp = (val[0] & 0x0fff0000) >> 16; /*@ Short CFO, S(12,11)*/
+		cfo->cfo_rpt_s[0] = phydm_get_cfo_hz(dm, val_tmp, 12, 11);
+		val_tmp = (val[1] & 0x0fff0000) >> 16;	/*@ Long CFO, S(12,11)*/
+		cfo->cfo_rpt_l[0] = phydm_get_cfo_hz(dm, val_tmp, 12, 11);
+		val_tmp = (val[2] & 0x0fff0000) >> 16;	/*@ Sec CFO, S(12,11)*/
+		cfo->cfo_rpt_sec[0] = phydm_get_cfo_hz(dm, val_tmp, 12, 11);
+		val_tmp = (val[3] & 0x0fff0000) >> 16;	/*@ Acq CFO, S(12,11)*/
+		cfo->cfo_rpt_acq[0] = phydm_get_cfo_hz(dm, val_tmp, 12, 11);
+		val_tmp = (val[4] & 0x0fff0000) >> 16;	/*@ Acq CFO, S(12,11)*/
+		cfo->cfo_rpt_end[0] = phydm_get_cfo_hz(dm, val_tmp, 12, 11);
+	} else {
+		val_tmp = (val[0] & 0x0fff0000) >> 16; /*@ Short CFO, S(12,11)*/
+		cfo->cfo_rpt_s[0] = phydm_get_cfo_hz(dm, val_tmp, 12, 11);
+		val_tmp = (val[1] & 0x1fff0000) >> 16;	/*@ Long CFO, S(13,12)*/
+		cfo->cfo_rpt_l[0] = phydm_get_cfo_hz(dm, val_tmp, 13, 12);
+		val_tmp = (val[2] & 0x7ff0000) >> 16;	/*@ Sec CFO, S(11,10)*/
+		cfo->cfo_rpt_sec[0] = phydm_get_cfo_hz(dm, val_tmp, 11, 10);
+		val_tmp = (val[3] & 0x1fff0000) >> 16;	/*@ Acq CFO, S(13,12)*/
+		cfo->cfo_rpt_acq[0] = phydm_get_cfo_hz(dm, val_tmp, 13, 12);
+		val_tmp = (val[4] & 0x1fff0000) >> 16;	/*@ Acq CFO, S(13,12)*/
+		cfo->cfo_rpt_end[0] = phydm_get_cfo_hz(dm, val_tmp, 13, 12);
 	}
-	#endif
-	PHYDM_DBG(p_dm, DBG_CFO_TRK, ("Set rystal_cap = 0x%x\n", p_cfo_track->crystal_cap));
 
+	#if (defined(PHYDM_COMPILE_ABOVE_2SS))
+	/*@[path-B]*/
+	val_tmp = val[0] & 0xfff;		/*@ Short CFO, S(12,11)*/
+	cfo->cfo_rpt_s[1] = phydm_get_cfo_hz(dm, val_tmp, 12, 11);
+	val_tmp = val[1] & 0x1fff;		/*@ Long CFO, S(13,12)*/
+	cfo->cfo_rpt_l[1] = phydm_get_cfo_hz(dm, val_tmp, 13, 12);
+	val_tmp = val[2] & 0x7ff;		/*@ Sec CFO, S(11,10)*/
+	cfo->cfo_rpt_sec[1] = phydm_get_cfo_hz(dm, val_tmp, 11, 10);
+	val_tmp = val[3] & 0x1fff;		/*@ Acq CFO, S(13,12)*/
+	cfo->cfo_rpt_acq[1] = phydm_get_cfo_hz(dm, val_tmp, 13, 12);
+	val_tmp = val[4] & 0x1fff;		/*@ Acq CFO, S(13,12)*/
+	cfo->cfo_rpt_end[1] = phydm_get_cfo_hz(dm, val_tmp, 13, 12);
+	#endif
 }
 
-u8
-odm_get_default_crytaltal_cap(
-	void					*p_dm_void
-)
+void phydm_set_atc_status(void *dm_void, boolean atc_status)
 {
-	struct PHY_DM_STRUCT					*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	u8						crystal_cap = 0x20;
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct phydm_cfo_track_struct *cfo_track = &dm->dm_cfo_track;
+	u32 reg_tmp = 0;
+	u32 mask_tmp = 0;
 
-#if (DM_ODM_SUPPORT_TYPE & ODM_CE) && defined(DM_ODM_CE_MAC80211)
-	struct rtl_priv *rtlpriv = (struct rtl_priv *)p_dm->adapter;
-	struct rtl_efuse *rtlefuse = rtl_efuse(rtlpriv);
+	PHYDM_DBG(dm, DBG_CFO_TRK, "[%s]ATC_en=%d\n", __func__, atc_status);
 
-	crystal_cap = rtlefuse->crystalcap;
-#elif (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_CE))
-	struct _ADAPTER					*adapter = p_dm->adapter;
-	HAL_DATA_TYPE				*p_hal_data = GET_HAL_DATA(adapter);
+	if (cfo_track->is_atc_status == atc_status)
+		return;
 
-	crystal_cap = p_hal_data->crystal_cap;
-#else
-	struct rtl8192cd_priv	*priv		= p_dm->priv;
+	reg_tmp = ODM_REG(BB_ATC, dm);
+	mask_tmp = ODM_BIT(BB_ATC, dm);
+	odm_set_bb_reg(dm, reg_tmp, mask_tmp, atc_status);
+	cfo_track->is_atc_status = atc_status;
+}
+
+boolean
+phydm_get_atc_status(void *dm_void)
+{
+	boolean atc_status = false;
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	u32 reg_tmp = 0;
+	u32 mask_tmp = 0;
+
+	reg_tmp = ODM_REG(BB_ATC, dm);
+	mask_tmp = ODM_BIT(BB_ATC, dm);
 
-	if (priv->pmib->dot11RFEntry.xcap > 0)
-		crystal_cap = priv->pmib->dot11RFEntry.xcap;
+	atc_status = (boolean)odm_get_bb_reg(dm, reg_tmp, mask_tmp);
+
+	PHYDM_DBG(dm, DBG_CFO_TRK, "[%s]atc_status=%d\n", __func__, atc_status);
+	return atc_status;
+}
 #endif
 
-	crystal_cap = crystal_cap & 0x3f;
+void phydm_get_cfo_info(void *dm_void, struct phydm_cfo_rpt *cfo)
+{
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
 
-	return crystal_cap;
+	switch (dm->ic_ip_series) {
+	#if (ODM_IC_11N_SERIES_SUPPORT)
+	case PHYDM_IC_N:
+		phydm_get_cfo_info_n(dm, cfo);
+		break;
+	#endif
+	#if (ODM_IC_11AC_SERIES_SUPPORT)
+	case PHYDM_IC_AC:
+		phydm_get_cfo_info_ac(dm, cfo);
+		break;
+	#endif
+	default:
+		break;
+	}
 }
 
-void
-odm_set_atc_status(
-	void					*p_dm_void,
-	boolean					atc_status
-)
+void phydm_set_crystal_cap(void *dm_void, u8 crystal_cap)
 {
-	struct PHY_DM_STRUCT					*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	struct phydm_cfo_track_struct				*p_cfo_track = (struct phydm_cfo_track_struct *)phydm_get_structure(p_dm, PHYDM_CFOTRACK);
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct phydm_cfo_track_struct *cfo_track = &dm->dm_cfo_track;
 
-	if (p_cfo_track->is_atc_status == atc_status)
+	if (cfo_track->crystal_cap == crystal_cap)
 		return;
 
-	odm_set_bb_reg(p_dm, ODM_REG(BB_ATC, p_dm), ODM_BIT(BB_ATC, p_dm), atc_status);
-	p_cfo_track->is_atc_status = atc_status;
+	if (phydm_set_crystal_cap_reg(dm, crystal_cap))
+		PHYDM_DBG(dm, DBG_CFO_TRK, "Set crystal_cap = 0x%x\n",
+			  cfo_track->crystal_cap);
+	else
+		PHYDM_DBG(dm, DBG_CFO_TRK, "Set fail\n");
 }
 
 boolean
-odm_get_atc_status(
-	void					*p_dm_void
-)
+phydm_set_crystal_cap_reg(void *dm_void, u8 crystal_cap)
 {
-	boolean						atc_status;
-	struct PHY_DM_STRUCT					*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct phydm_cfo_track_struct *cfo_track = &dm->dm_cfo_track;
+	u32 reg_val = 0;
+
+	if (dm->support_ic_type & (ODM_RTL8822C | ODM_RTL8814B |
+	    ODM_RTL8195B | ODM_RTL8812F | ODM_RTL8721D)) {
+		crystal_cap &= 0x7F;
+		reg_val = crystal_cap | (crystal_cap << 7);
+	} else {
+		crystal_cap &= 0x3F;
+		reg_val = crystal_cap | (crystal_cap << 6);
+	}
 
-	atc_status = (boolean)odm_get_bb_reg(p_dm, ODM_REG(BB_ATC, p_dm), ODM_BIT(BB_ATC, p_dm));
-	return atc_status;
+	cfo_track->crystal_cap = crystal_cap;
+
+	if (dm->support_ic_type & (ODM_RTL8188E | ODM_RTL8188F)) {
+		#if (RTL8188E_SUPPORT || RTL8188F_SUPPORT)
+		/* write 0x24[22:17] = 0x24[16:11] = crystal_cap */
+		odm_set_mac_reg(dm, R_0x24, 0x7ff800, reg_val);
+		#endif
+	}
+	#if (RTL8812A_SUPPORT)
+	else if (dm->support_ic_type & ODM_RTL8812) {
+		/* write 0x2C[30:25] = 0x2C[24:19] = crystal_cap */
+		odm_set_mac_reg(dm, R_0x2c, 0x7FF80000, reg_val);
+	}
+	#endif
+	#if (RTL8703B_SUPPORT || RTL8723B_SUPPORT || RTL8192E_SUPPORT ||\
+	     RTL8821A_SUPPORT || RTL8723D_SUPPORT)
+	else if ((dm->support_ic_type &
+		 (ODM_RTL8703B | ODM_RTL8723B | ODM_RTL8192E | ODM_RTL8821 |
+		 ODM_RTL8723D))) {
+		/* @0x2C[23:18] = 0x2C[17:12] = crystal_cap */
+		odm_set_mac_reg(dm, R_0x2c, 0x00FFF000, reg_val);
+	}
+	#endif
+	#if (RTL8814A_SUPPORT)
+	else if (dm->support_ic_type & ODM_RTL8814A) {
+		/* write 0x2C[26:21] = 0x2C[20:15] = crystal_cap */
+		odm_set_mac_reg(dm, R_0x2c, 0x07FF8000, reg_val);
+	}
+	#endif
+	#if (RTL8822B_SUPPORT || RTL8821C_SUPPORT || RTL8197F_SUPPORT ||\
+	     RTL8192F_SUPPORT)
+	else if (dm->support_ic_type & (ODM_RTL8822B | ODM_RTL8821C |
+		 ODM_RTL8197F | ODM_RTL8192F)) {
+		/* write 0x24[30:25] = 0x28[6:1] = crystal_cap */
+		odm_set_mac_reg(dm, R_0x24, 0x7e000000, crystal_cap);
+		odm_set_mac_reg(dm, R_0x28, 0x7e, crystal_cap);
+	}
+	#endif
+	#if (RTL8710B_SUPPORT)
+	else if (dm->support_ic_type & (ODM_RTL8710B)) {
+		#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_CE))
+		/* write 0x60[29:24] = 0x60[23:18] = crystal_cap */
+		HAL_SetSYSOnReg(dm->adapter, R_0x60, 0x3FFC0000, reg_val);
+		#endif
+	}
+	#endif
+	#if (RTL8195B_SUPPORT)
+	else if (dm->support_ic_type & ODM_RTL8195B) {
+		phydm_set_crystalcap(dm, (u8)(reg_val & 0x7f));
+	}
+	#endif
+	#if (RTL8721D_SUPPORT)
+	else if (dm->support_ic_type & (ODM_RTL8721D)) {
+		/* write 0x4800_0228[30:24] crystal_cap */
+		/*HAL_SetSYSOnReg(dm->adapter, */
+		/*REG_SYS_XTAL_8721d, 0x7F000000, crystal_cap);*/
+		u32 temp_val = HAL_READ32(SYSTEM_CTRL_BASE_LP,
+					   REG_SYS_EFUSE_SYSCFG2);
+		temp_val = ((crystal_cap << 24) & 0x7F000000)
+						| (temp_val & (~0x7F000000));
+		HAL_WRITE32(SYSTEM_CTRL_BASE_LP, REG_SYS_EFUSE_SYSCFG2,
+			    temp_val);
+	}
+	#endif
+#if (RTL8822C_SUPPORT || RTL8814B_SUPPORT || RTL8812F_SUPPORT)
+	else if (dm->support_ic_type & (ODM_RTL8822C | ODM_RTL8814B |
+		 ODM_RTL8812F)) {
+		/* write 0x1040[23:17] = 0x1040[16:10] = crystal_cap */
+		odm_set_mac_reg(dm, R_0x1040, 0x00FFFC00, reg_val);
+	} else {
+		return false;
+	}
+#endif
+	return true;
 }
 
-void
-odm_cfo_tracking_reset(
-	void					*p_dm_void
-)
+void phydm_cfo_tracking_reset(void *dm_void)
 {
-	struct PHY_DM_STRUCT					*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	struct phydm_cfo_track_struct				*p_cfo_track = (struct phydm_cfo_track_struct *)phydm_get_structure(p_dm, PHYDM_CFOTRACK);
-
-	p_cfo_track->def_x_cap = odm_get_default_crytaltal_cap(p_dm);
-	p_cfo_track->is_adjust = true;
-
-	if (p_cfo_track->crystal_cap > p_cfo_track->def_x_cap) {
-		phydm_set_crystal_cap(p_dm, p_cfo_track->crystal_cap - 1);
-		PHYDM_DBG(p_dm, DBG_CFO_TRK,
-			("odm_cfo_tracking_reset(): approch default value (0x%x)\n", p_cfo_track->crystal_cap));
-	} else if (p_cfo_track->crystal_cap < p_cfo_track->def_x_cap) {
-		phydm_set_crystal_cap(p_dm, p_cfo_track->crystal_cap + 1);
-		PHYDM_DBG(p_dm, DBG_CFO_TRK,
-			("odm_cfo_tracking_reset(): approch default value (0x%x)\n", p_cfo_track->crystal_cap));
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct phydm_cfo_track_struct *cfo_track = &dm->dm_cfo_track;
+
+	PHYDM_DBG(dm, DBG_CFO_TRK, "%s ======>\n", __func__);
+
+	if (dm->support_ic_type & (ODM_RTL8822C | ODM_RTL8814B | ODM_RTL8195B |
+	    ODM_RTL8812F))
+		cfo_track->def_x_cap = cfo_track->crystal_cap_default & 0x7f;
+	else
+		cfo_track->def_x_cap = cfo_track->crystal_cap_default & 0x3f;
+
+	cfo_track->is_adjust = true;
+
+	if (cfo_track->crystal_cap > cfo_track->def_x_cap) {
+		phydm_set_crystal_cap(dm, cfo_track->crystal_cap - 1);
+		PHYDM_DBG(dm, DBG_CFO_TRK, "approch to Init-val (0x%x)\n",
+			  cfo_track->crystal_cap);
+
+	} else if (cfo_track->crystal_cap < cfo_track->def_x_cap) {
+		phydm_set_crystal_cap(dm, cfo_track->crystal_cap + 1);
+		PHYDM_DBG(dm, DBG_CFO_TRK, "approch to init-val 0x%x\n",
+			  cfo_track->crystal_cap);
 	}
 
+#if ODM_IC_11N_SERIES_SUPPORT
 #if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_CE))
-	odm_set_atc_status(p_dm, true);
+	if (dm->support_ic_type & ODM_IC_11N_SERIES)
+		phydm_set_atc_status(dm, true);
+#endif
 #endif
 }
 
-void
-phydm_cfo_tracking_init(
-	void					*p_dm_void
-)
+void phydm_cfo_tracking_init(void *dm_void)
 {
-	struct PHY_DM_STRUCT					*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	struct phydm_cfo_track_struct				*p_cfo_track = (struct phydm_cfo_track_struct *)phydm_get_structure(p_dm, PHYDM_CFOTRACK);
-
-	p_cfo_track->def_x_cap = p_cfo_track->crystal_cap = odm_get_default_crytaltal_cap(p_dm);
-	p_cfo_track->is_atc_status = odm_get_atc_status(p_dm);
-	p_cfo_track->is_adjust = true;
-	PHYDM_DBG(p_dm, DBG_CFO_TRK, ("ODM_CfoTracking_init()=========>\n"));
-	PHYDM_DBG(p_dm, DBG_CFO_TRK, ("ODM_CfoTracking_init(): is_atc_status = %d, crystal_cap = 0x%x\n", p_cfo_track->is_atc_status, p_cfo_track->def_x_cap));
-
-#if RTL8822B_SUPPORT
-	/* Crystal cap. control by WiFi */
-	if (p_dm->support_ic_type & ODM_RTL8822B)
-		odm_set_bb_reg(p_dm, 0x10, 0x40, 0x1);
-#endif
-
-#if RTL8821C_SUPPORT
-	/* Crystal cap. control by WiFi */
-	if (p_dm->support_ic_type & ODM_RTL8821C)
-		odm_set_bb_reg(p_dm, 0x10, 0x40, 0x1);
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct phydm_cfo_track_struct *cfo_track = &dm->dm_cfo_track;
+
+	PHYDM_DBG(dm, DBG_CFO_TRK, "[%s]=========>\n", __func__);
+	if (dm->support_ic_type & (ODM_RTL8822C | ODM_RTL8814B | ODM_RTL8195B |
+	    ODM_RTL8812F))
+		cfo_track->crystal_cap = cfo_track->crystal_cap_default & 0x7f;
+	else
+		cfo_track->crystal_cap = cfo_track->crystal_cap_default & 0x3f;
+
+	cfo_track->def_x_cap = cfo_track->crystal_cap;
+	cfo_track->is_adjust = true;
+	PHYDM_DBG(dm, DBG_CFO_TRK, "crystal_cap=0x%x\n", cfo_track->def_x_cap);
+
+#if (RTL8822B_SUPPORT || RTL8821C_SUPPORT)
+	/* @Crystal cap. control by WiFi */
+	if (dm->support_ic_type & (ODM_RTL8822B | ODM_RTL8821C))
+		odm_set_mac_reg(dm, R_0x10, 0x40, 0x1);
 #endif
 }
 
-void
-odm_cfo_tracking(
-	void					*p_dm_void
-)
+void phydm_cfo_tracking(void *dm_void)
 {
-	struct PHY_DM_STRUCT					*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	struct phydm_cfo_track_struct				*p_cfo_track = (struct phydm_cfo_track_struct *)phydm_get_structure(p_dm, PHYDM_CFOTRACK);
-	s32						CFO_ave = 0;
-	u32						CFO_rpt_sum, cfo_khz_avg[4] = {0};
-	s32						CFO_ave_diff;
-	s8						crystal_cap = p_cfo_track->crystal_cap;
-	u8						adjust_xtal = 1, i, valid_path_cnt = 0;
-
-	/* 4 Support ability */
-	if (!(p_dm->support_ability & ODM_BB_CFO_TRACKING)) {
-		PHYDM_DBG(p_dm, DBG_CFO_TRK, ("odm_cfo_tracking(): Return: support_ability ODM_BB_CFO_TRACKING is disabled\n"));
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct phydm_cfo_track_struct *cfo_track = &dm->dm_cfo_track;
+	s32 cfo_avg = 0, cfo_path_sum = 0, cfo_abs = 0;
+	u32 cfo_rpt_sum = 0, cfo_khz_avg[4] = {0};
+	s8 crystal_cap = cfo_track->crystal_cap;
+	u8 i = 0, valid_path_cnt = 0;
+
+	if (!(dm->support_ability & ODM_BB_CFO_TRACKING))
 		return;
-	}
 
-	PHYDM_DBG(p_dm, DBG_CFO_TRK, ("odm_cfo_tracking()=========>\n"));
+	PHYDM_DBG(dm, DBG_CFO_TRK, "%s ======>\n", __func__);
+
+	if (!dm->is_linked || !dm->is_one_entry_only) {
+		phydm_cfo_tracking_reset(dm);
+		PHYDM_DBG(dm, DBG_CFO_TRK, "is_linked=%d, one_entry_only=%d\n",
+			  dm->is_linked, dm->is_one_entry_only);
 
-	if (!p_dm->is_linked || !p_dm->is_one_entry_only) {
-		/* 4 No link or more than one entry */
-		odm_cfo_tracking_reset(p_dm);
-		PHYDM_DBG(p_dm, DBG_CFO_TRK, ("odm_cfo_tracking(): Reset: is_linked = %d, is_one_entry_only = %d\n",
-			p_dm->is_linked, p_dm->is_one_entry_only));
 	} else {
-		/* 3 1. CFO Tracking */
-		/* 4 1.1 No new packet */
-		if (p_cfo_track->packet_count == p_cfo_track->packet_count_pre) {
-			PHYDM_DBG(p_dm, DBG_CFO_TRK, ("odm_cfo_tracking(): packet counter doesn't change\n"));
+		/* No new packet */
+		if (cfo_track->packet_count == cfo_track->packet_count_pre) {
+			PHYDM_DBG(dm, DBG_CFO_TRK, "Pkt cnt doesn't change\n");
 			return;
 		}
-		p_cfo_track->packet_count_pre = p_cfo_track->packet_count;
-
-		/* 4 1.2 Calculate CFO */
-		for (i = 0; i < p_dm->num_rf_path; i++) {
+		cfo_track->packet_count_pre = cfo_track->packet_count;
 
-			if (p_cfo_track->CFO_cnt[i] == 0)
+		/*@Calculate CFO */
+		for (i = 0; i < dm->num_rf_path; i++) {
+			if (!(dm->rx_ant_status & BIT(i)))
 				continue;
 
 			valid_path_cnt++;
-			CFO_rpt_sum = (u32)((p_cfo_track->CFO_tail[i] < 0) ? (0 - p_cfo_track->CFO_tail[i]) :  p_cfo_track->CFO_tail[i]);
-			cfo_khz_avg[i] = CFO_HW_RPT_2_MHZ(CFO_rpt_sum) / p_cfo_track->CFO_cnt[i];
 
-			PHYDM_DBG(p_dm, DBG_CFO_TRK, ("[path %d] CFO_rpt_sum = (( %d )), CFO_cnt = (( %d )) , CFO_avg= (( %s%d )) kHz\n",
-				i, CFO_rpt_sum, p_cfo_track->CFO_cnt[i], ((p_cfo_track->CFO_tail[i] < 0) ? "-" : " "), cfo_khz_avg[i]));
-		}
+			if (cfo_track->CFO_tail[i] < 0)
+				cfo_abs = 0 - cfo_track->CFO_tail[i];
+			else
+				cfo_abs = cfo_track->CFO_tail[i];
+
+			cfo_rpt_sum = (u32)CFO_HW_RPT_2_KHZ(cfo_abs);
+			cfo_khz_avg[i] = cfo_rpt_sum / cfo_track->CFO_cnt[i];
 
-		for (i = 0; i < valid_path_cnt; i++) {
+			PHYDM_DBG(dm, DBG_CFO_TRK,
+				  "[Path-%d] CFO_sum=((%d)), cnt=((%d)), CFO_avg=((%s%d))kHz\n",
+				  i, cfo_rpt_sum, cfo_track->CFO_cnt[i],
+				  ((cfo_track->CFO_tail[i] < 0) ? "-" : " "),
+				  cfo_khz_avg[i]);
 
-			/* PHYDM_DBG(p_dm, DBG_CFO_TRK, ("path [%d], p_cfo_track->CFO_tail = %d\n", i, p_cfo_track->CFO_tail[i])); */
-			if (p_cfo_track->CFO_tail[i] < 0) {
-				CFO_ave += (0 - (s32)cfo_khz_avg[i]);
-				/* PHYDM_DBG(p_dm, DBG_CFO_TRK, ("CFO_ave = %d\n", CFO_ave)); */
-			} else
-				CFO_ave += (s32)cfo_khz_avg[i];
+			if (cfo_track->CFO_tail[i] < 0)
+				cfo_path_sum += (0 - (s32)cfo_khz_avg[i]);
+			else
+				cfo_path_sum += (s32)cfo_khz_avg[i];
 		}
 
 		if (valid_path_cnt >= 2)
-			CFO_ave = CFO_ave / valid_path_cnt;
+			cfo_avg = cfo_path_sum / valid_path_cnt;
+		else
+			cfo_avg = cfo_path_sum;
+
+		cfo_track->CFO_ave_pre = cfo_avg;
 
-		PHYDM_DBG(p_dm, DBG_CFO_TRK, ("valid_path_cnt = ((%d)), CFO_ave = ((%d kHz))\n", valid_path_cnt, CFO_ave));
+		PHYDM_DBG(dm, DBG_CFO_TRK, "path_cnt=%d, CFO_avg_path=%d kHz\n",
+			  valid_path_cnt, cfo_avg);
 
 		/*reset counter*/
-		for (i = 0; i < p_dm->num_rf_path; i++) {
-			p_cfo_track->CFO_tail[i] = 0;
-			p_cfo_track->CFO_cnt[i] = 0;
+		for (i = 0; i < dm->num_rf_path; i++) {
+			cfo_track->CFO_tail[i] = 0;
+			cfo_track->CFO_cnt[i] = 0;
 		}
 
-		/* 4 1.3 Avoid abnormal large CFO */
-		CFO_ave_diff = (p_cfo_track->CFO_ave_pre >= CFO_ave) ? (p_cfo_track->CFO_ave_pre - CFO_ave) : (CFO_ave - p_cfo_track->CFO_ave_pre);
-		if (CFO_ave_diff > 20 && p_cfo_track->large_cfo_hit == 0 && !p_cfo_track->is_adjust) {
-			PHYDM_DBG(p_dm, DBG_CFO_TRK, ("odm_cfo_tracking(): first large CFO hit\n"));
-			p_cfo_track->large_cfo_hit = 1;
-			return;
-		} else
-			p_cfo_track->large_cfo_hit = 0;
-		p_cfo_track->CFO_ave_pre = CFO_ave;
-
-		/* 4 1.4 Dynamic Xtal threshold */
-		if (p_cfo_track->is_adjust == false) {
-			if (CFO_ave > CFO_TH_XTAL_HIGH || CFO_ave < (-CFO_TH_XTAL_HIGH))
-				p_cfo_track->is_adjust = true;
+		/* To adjust crystal cap or not */
+		if (!cfo_track->is_adjust) {
+			if (cfo_avg > CFO_TRK_ENABLE_TH ||
+			    cfo_avg < (-CFO_TRK_ENABLE_TH))
+				cfo_track->is_adjust = true;
 		} else {
-			if (CFO_ave < CFO_TH_XTAL_LOW && CFO_ave > (-CFO_TH_XTAL_LOW))
-				p_cfo_track->is_adjust = false;
+			if (cfo_avg < CFO_TRK_STOP_TH &&
+			    cfo_avg > (-CFO_TRK_STOP_TH))
+				cfo_track->is_adjust = false;
 		}
 
-#ifdef ODM_CONFIG_BT_COEXIST
-		/* 4 1.5 BT case: Disable CFO tracking */
-		if (p_dm->bt_info_table.is_bt_enabled) {
-			p_cfo_track->is_adjust = false;
-			phydm_set_crystal_cap(p_dm, p_cfo_track->def_x_cap);
-			PHYDM_DBG(p_dm, DBG_CFO_TRK, ("odm_cfo_tracking(): Disable CFO tracking for BT!!\n"));
+		#ifdef ODM_CONFIG_BT_COEXIST
+		/*@BT case: Disable CFO tracking */
+		if (dm->bt_info_table.is_bt_enabled) {
+			cfo_track->is_adjust = false;
+			phydm_set_crystal_cap(dm, cfo_track->def_x_cap);
+			PHYDM_DBG(dm, DBG_CFO_TRK, "[BT]Disable CFO_track\n");
 		}
-#if 0
-		/* 4 1.6 Big jump */
-		if (p_cfo_track->is_adjust) {
-			if (CFO_ave > CFO_TH_XTAL_LOW)
-				adjust_xtal =  adjust_xtal + ((CFO_ave - CFO_TH_XTAL_LOW) >> 2);
-			else if (CFO_ave < (-CFO_TH_XTAL_LOW))
-				adjust_xtal =  adjust_xtal + ((CFO_TH_XTAL_LOW - CFO_ave) >> 2);
-
-			PHYDM_DBG(p_dm, DBG_CFO_TRK, ("odm_cfo_tracking(): Crystal cap offset = %d\n", adjust_xtal));
-		}
-#endif
-#endif
-		/* 4 1.7 Adjust Crystal Cap. */
-		if (p_cfo_track->is_adjust) {
-			if (CFO_ave > CFO_TH_XTAL_LOW)
-				crystal_cap = crystal_cap + adjust_xtal;
-			else if (CFO_ave < (-CFO_TH_XTAL_LOW))
-				crystal_cap = crystal_cap - adjust_xtal;
-
-			if (crystal_cap > 0x3f)
-				crystal_cap = 0x3f;
-			else if (crystal_cap < 0)
+		#endif
+
+		/*@Adjust Crystal Cap. */
+		if (cfo_track->is_adjust) {
+			if (cfo_avg > CFO_TRK_STOP_TH)
+				crystal_cap += 1;
+			else if (cfo_avg < (-CFO_TRK_STOP_TH))
+				crystal_cap -= 1;
+
+			if (dm->support_ic_type & (ODM_RTL8822C |
+			    ODM_RTL8814B | ODM_RTL8195B | ODM_RTL8812F)) {
+				if (crystal_cap > 0x7F)
+					crystal_cap = 0x7F;
+			} else {
+				if (crystal_cap > 0x3F)
+					crystal_cap = 0x3F;
+			}
+			if (crystal_cap < 0)
 				crystal_cap = 0;
 
-			phydm_set_crystal_cap(p_dm, (u8)crystal_cap);
+			phydm_set_crystal_cap(dm, (u8)crystal_cap);
 		}
-		PHYDM_DBG(p_dm, DBG_CFO_TRK, ("odm_cfo_tracking(): Crystal cap = 0x%x, Default Crystal cap = 0x%x\n",
-			p_cfo_track->crystal_cap, p_cfo_track->def_x_cap));
 
-#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_CE))
-		if (p_dm->support_ic_type & ODM_IC_11AC_SERIES)
-			return;
+		PHYDM_DBG(dm, DBG_CFO_TRK, "X_cap{Curr,Default}={0x%x,0x%x}\n",
+			  cfo_track->crystal_cap, cfo_track->def_x_cap);
+
+		/* @Dynamic ATC switch */
+		#if ODM_IC_11N_SERIES_SUPPORT
+		#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_CE))
+		if (dm->support_ic_type & ODM_IC_11N_SERIES) {
+			if (cfo_avg < CFO_TH_ATC && cfo_avg > -CFO_TH_ATC)
+				phydm_set_atc_status(dm, false);
+			else
+				phydm_set_atc_status(dm, true);
 
-		/* 3 2. Dynamic ATC switch */
-		if (CFO_ave < CFO_TH_ATC && CFO_ave > -CFO_TH_ATC) {
-			odm_set_atc_status(p_dm, false);
-			PHYDM_DBG(p_dm, DBG_CFO_TRK, ("odm_cfo_tracking(): Disable ATC!!\n"));
-		} else {
-			odm_set_atc_status(p_dm, true);
-			PHYDM_DBG(p_dm, DBG_CFO_TRK, ("odm_cfo_tracking(): Enable ATC!!\n"));
 		}
-#endif
+		#endif
+		#endif
 	}
 }
 
-void
-odm_parsing_cfo(
-	void			*p_dm_void,
-	void			*p_pktinfo_void,
-	s8			*pcfotail,
-	u8			num_ss
-)
+void phydm_parsing_cfo(void *dm_void, void *pktinfo_void, s8 *pcfotail,
+		       u8 num_ss)
 {
-	struct PHY_DM_STRUCT				*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	struct phydm_perpkt_info_struct		*p_pktinfo = (struct phydm_perpkt_info_struct *)p_pktinfo_void;
-	struct phydm_cfo_track_struct			*p_cfo_track = (struct phydm_cfo_track_struct *)phydm_get_structure(p_dm, PHYDM_CFOTRACK);
-	u8					i;
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct phydm_perpkt_info_struct *pktinfo = NULL;
+	struct phydm_cfo_track_struct *cfo_track = &dm->dm_cfo_track;
+	boolean valid_info = false;
+	u8 i = 0;
 
-	if (!(p_dm->support_ability & ODM_BB_CFO_TRACKING))
+	if (!(dm->support_ability & ODM_BB_CFO_TRACKING))
 		return;
 
-#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_CE))
-	if (p_pktinfo->is_packet_match_bssid)
+	pktinfo = (struct phydm_perpkt_info_struct *)pktinfo_void;
+
+#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_CE | ODM_IOT))
+	if (pktinfo->is_packet_match_bssid)
+		valid_info = true;
 #else
-	if (p_pktinfo->station_id != 0)
+	if (dm->number_active_client == 1)
+		valid_info = true;
 #endif
-	{
-		if (num_ss > p_dm->num_rf_path) /*For fool proof*/
-			num_ss = p_dm->num_rf_path;
-
-		/*PHYDM_DBG(p_dm, DBG_CFO_TRK, ("num_ss = ((%d)),  p_dm->num_rf_path = ((%d))\n", num_ss,  p_dm->num_rf_path));*/
-
+	if (valid_info) {
+		if (num_ss > dm->num_rf_path) /*@For fool proof*/
+			num_ss = dm->num_rf_path;
+		#if 0
+		PHYDM_DBG(dm, DBG_CFO_TRK, "num_ss=%d, num_rf_path=%d\n",
+			  num_ss, dm->num_rf_path);
+		#endif
 
-		/* 3 Update CFO report for path-A & path-B */
+		/* @ Update CFO report for path-A & path-B */
 		/* Only paht-A and path-B have CFO tail and short CFO */
-		for (i = 0; i < num_ss; i++) {
-			p_cfo_track->CFO_tail[i] += pcfotail[i];
-			p_cfo_track->CFO_cnt[i]++;
-			/*PHYDM_DBG(p_dm, DBG_CFO_TRK, ("[ID %d][path %d][rate 0x%x] CFO_tail = ((%d)), CFO_tail_sum = ((%d)), CFO_cnt = ((%d))\n",
-				p_pktinfo->station_id, i, p_pktinfo->data_rate, pcfotail[i], p_cfo_track->CFO_tail[i], p_cfo_track->CFO_cnt[i]));
-			*/
+		for (i = 0; i < dm->num_rf_path; i++) {
+			if (!(dm->rx_ant_status & BIT(i)))
+				continue;
+			cfo_track->CFO_tail[i] += pcfotail[i];
+			cfo_track->CFO_cnt[i]++;
+			#if 0
+			PHYDM_DBG(dm, DBG_CFO_TRK,
+				  "[ID %d][path %d][rate 0x%x] CFO_tail = ((%d)), CFO_tail_sum = ((%d)), CFO_cnt = ((%d))\n",
+				  pktinfo->station_id, i, pktinfo->data_rate,
+				  pcfotail[i], cfo_track->CFO_tail[i],
+				  cfo_track->CFO_cnt[i]);
+			#endif
 		}
 
-		/* 3 Update packet counter */
-		if (p_cfo_track->packet_count == 0xffffffff)
-			p_cfo_track->packet_count = 0;
+		/* @ Update packet counter */
+		if (cfo_track->packet_count == 0xffffffff)
+			cfo_track->packet_count = 0;
 		else
-			p_cfo_track->packet_count++;
+			cfo_track->packet_count++;
 	}
 }
+
+#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
+void phy_Init_crystal_capacity(void *dm_void, u8 crystal_cap)
+{
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+
+	if (!phydm_set_crystal_cap_reg(dm, crystal_cap))
+		RT_TRACE_F(COMP_INIT, DBG_SERIOUS,
+			   ("Crystal is not initialized!\n"));
+}
+#endif
+
+void phydm_cfo_tracking_debug(void *dm_void, char input[][16], u32 *_used,
+			      char *output, u32 *_out_len)
+{
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct phydm_cfo_track_struct *cfo_track = &dm->dm_cfo_track;
+	char help[] = "-h";
+	u32 var1[10] = {0};
+	u32 used = *_used;
+	u32 out_len = *_out_len;
+
+	if ((strcmp(input[1], help) == 0)) {
+		PDM_SNPF(out_len, used, output + used, out_len - used,
+			 "set Xcap: {1}\n");
+		PDM_SNPF(out_len, used, output + used, out_len - used,
+			 "show Xcap: {100}\n");
+	} else {
+		PHYDM_SSCANF(input[1], DCMD_DECIMAL, &var1[0]);
+
+		if (var1[0] == 1) {
+			PHYDM_SSCANF(input[2], DCMD_HEX, &var1[1]);
+			phydm_set_crystal_cap(dm, (u8)var1[1]);
+			PDM_SNPF(out_len, used, output + used, out_len - used,
+				 "Set X_cap=0x%x\n", cfo_track->crystal_cap);
+		} else if (var1[0] == 100) {
+			PDM_SNPF(out_len, used, output + used, out_len - used,
+				 "X_cap=0x%x\n", cfo_track->crystal_cap);
+		}
+	}
+	*_used = used;
+	*_out_len = out_len;
+}
+
diff --git a/rtl8723DS/hal/phydm/phydm_cfotracking.h b/rtl8723DS/hal/phydm/phydm_cfotracking.h
index 43815f2..080c293 100755..100644
--- a/rtl8723DS/hal/phydm/phydm_cfotracking.h
+++ b/rtl8723DS/hal/phydm/phydm_cfotracking.h
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2007 - 2017 Realtek Corporation.
+ * Copyright(c) 2007 - 2017  Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -8,63 +8,66 @@
  *
  * This program is distributed in the hope that it will be useful, but WITHOUT
  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  * more details.
  *
+ * The full GNU General Public License is included in this distribution in the
+ * file called LICENSE.
+ *
+ * Contact Information:
+ * wlanfae <wlanfae@realtek.com>
+ * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
+ * Hsinchu 300, Taiwan.
+ *
+ * Larry Finger <Larry.Finger@lwfinger.net>
+ *
  *****************************************************************************/
 
-#ifndef	__PHYDMCFOTRACK_H__
-#define    __PHYDMCFOTRACK_H__
+#ifndef __PHYDMCFOTRACK_H__
+#define __PHYDMCFOTRACK_H__
 
-#define CFO_TRACKING_VERSION	"1.4" /*2015.10.01	Stanley, Modify for 8822B*/
+#define CFO_TRACKING_VERSION "2.0"
 
-#define		CFO_TH_XTAL_HIGH			20			/* kHz */
-#define		CFO_TH_XTAL_LOW			10			/* kHz */
-#define		CFO_TH_ATC					80			/* kHz */
+#define		CFO_TRK_ENABLE_TH	20 /* @kHz enable CFO_Track threshold*/
+#define		CFO_TRK_STOP_TH		10 /* @kHz disable CFO_Track threshold*/
+#define		CFO_TH_ATC		80 /* @kHz */
 
 struct phydm_cfo_track_struct {
-	boolean			is_atc_status;
-	boolean			large_cfo_hit;
-	boolean			is_adjust;
-	u8			crystal_cap;
-	u8			def_x_cap;
-	s32			CFO_tail[4];
-	u32			CFO_cnt[4];
-	s32			CFO_ave_pre;
-	u32			packet_count;
-	u32			packet_count_pre;
+	boolean		is_atc_status;
+	boolean		is_adjust;	/*@already modify crystal cap*/
+	u8		crystal_cap;
+	u8		crystal_cap_default;
+	u8		def_x_cap;
+	s32		CFO_tail[4];
+	u32		CFO_cnt[4];
+	s32		CFO_ave_pre;
+	u32		packet_count;
+	u32		packet_count_pre;
+};
 
-	boolean			is_force_xtal_cap;
-	boolean			is_reset;
+struct phydm_cfo_rpt {
+	s32 cfo_rpt_s[PHYDM_MAX_RF_PATH];
+	s32 cfo_rpt_l[PHYDM_MAX_RF_PATH];
+	s32 cfo_rpt_acq[PHYDM_MAX_RF_PATH];
+	s32 cfo_rpt_sec[PHYDM_MAX_RF_PATH];
+	s32 cfo_rpt_end[PHYDM_MAX_RF_PATH];
 };
 
-void
-phydm_set_crystal_cap(
-	void					*p_dm_void,
-	u8					crystal_cap
-);
+void phydm_get_cfo_info(void *dm_void, struct phydm_cfo_rpt *cfo);
 
-void
-odm_cfo_tracking_reset(
-	void					*p_dm_void
-);
+void phydm_set_crystal_cap(void *dm_void, u8 crystal_cap);
 
-void
-phydm_cfo_tracking_init(
-	void					*p_dm_void
-);
+boolean phydm_set_crystal_cap_reg(void *dm_void, u8 crystal_cap);
 
-void
-odm_cfo_tracking(
-	void					*p_dm_void
-);
+void phydm_cfo_tracking_init(void *dm_void);
 
-void
-odm_parsing_cfo(
-	void					*p_dm_void,
-	void					*p_pktinfo_void,
-	s8					*pcfotail,
-	u8					num_ss
-);
+void phydm_cfo_tracking(void *dm_void);
 
+void phydm_parsing_cfo(void *dm_void, void *pktinfo_void, s8 *pcfotail,
+		       u8 num_ss);
+void phydm_cfo_tracking_debug(void *dm_void, char input[][16], u32 *_used,
+			      char *output, u32 *_out_len);
+#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
+void phy_Init_crystal_capacity(void *dm_void, u8 crystal_cap);
+#endif
 #endif
diff --git a/rtl8723DS/hal/phydm/phydm_debug.c b/rtl8723DS/hal/phydm/phydm_debug.c
index 8bb4faf..5d63ea4 100755..100644
--- a/rtl8723DS/hal/phydm/phydm_debug.c
+++ b/rtl8723DS/hal/phydm/phydm_debug.c
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2007 - 2017 Realtek Corporation.
+ * Copyright(c) 2007 - 2017  Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -8,206 +8,192 @@
  *
  * This program is distributed in the hope that it will be useful, but WITHOUT
  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  * more details.
  *
+ * The full GNU General Public License is included in this distribution in the
+ * file called LICENSE.
+ *
+ * Contact Information:
+ * wlanfae <wlanfae@realtek.com>
+ * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
+ * Hsinchu 300, Taiwan.
+ *
+ * Larry Finger <Larry.Finger@lwfinger.net>
+ *
  *****************************************************************************/
 
-/* ************************************************************
+/*@************************************************************
  * include files
- * ************************************************************ */
+ ************************************************************/
 
 #include "mp_precomp.h"
 #include "phydm_precomp.h"
 
-void
-phydm_init_debug_setting(
-	struct PHY_DM_STRUCT		*p_dm
-)
+void phydm_init_debug_setting(struct dm_struct *dm)
 {
-	p_dm->debug_level = ODM_DBG_TRACE;
+	dm->fw_debug_components = 0;
+	dm->debug_components =
 
-	p_dm->fw_debug_components = 0;
-	p_dm->debug_components =
-		\
 #if DBG
-		/*BB Functions*/
-		/*									DBG_DIG					|*/
-		/*									DBG_RA_MASK				|*/
-		/*									DBG_DYN_TXPWR		|*/
-		/*									DBG_FA_CNT				|*/
-		/*									DBG_RSSI_MNTR			|*/
-		/*									DBG_CCKPD					|*/
-		/*									DBG_ANT_DIV				|*/
-		/*									DBG_SMT_ANT				|*/
-		/*									DBG_PWR_TRAIN					|*/
-		/*									DBG_RA					|*/
-		/*									DBG_PATH_DIV				|*/
-		/*									DBG_DFS					|*/
-		/*									DBG_DYN_ARFR			|*/
-		/*									DBG_ADPTVTY			|*/
-		/*									DBG_CFO_TRK		|*/
-		/*									DBG_ENV_MNTR					|*/
-		/*									DBG_PRI_CCA		|*/
-		/*									DBG_ADPTV_SOML		|*/
-		
-		
-		/*									DBG_DYN_RX_PATH		|*/
-		/*									DBG_TMP					|*/
-		/*									DBG_FW_TRACE			|*/
-		/*									DBG_TXBF				|*/
-		/*									DBG_COMMON_FLOW				|*/
-		/*									ODM_COMP_TX_PWR_TRACK		|*/
-		/*									ODM_COMP_CALIBRATION			|*/
-		/*									ODM_COMP_MP					|*/
-		/*									ODM_PHY_CONFIG					|*/
-		/*									ODM_COMP_INIT					|*/
-		/*									ODM_COMP_COMMON				|*/
-		/*									ODM_COMP_API					|*/
-
-
-#endif
-		0;
-
-	p_dm->fw_buff_is_enpty = true;
-	p_dm->pre_c2h_seq = 0;
-	p_dm->c2h_cmd_start = 0;
+	/*@BB Functions*/
+	/*@DBG_DIG					|*/
+	/*@DBG_RA_MASK					|*/
+	/*@DBG_DYN_TXPWR				|*/
+	/*@DBG_FA_CNT					|*/
+	/*@DBG_RSSI_MNTR				|*/
+	/*@DBG_CCKPD					|*/
+	/*@DBG_ANT_DIV					|*/
+	/*@DBG_SMT_ANT					|*/
+	/*@DBG_PWR_TRAIN				|*/
+	/*@DBG_RA					|*/
+	/*@DBG_PATH_DIV					|*/
+	/*@DBG_DFS					|*/
+	/*@DBG_DYN_ARFR					|*/
+	/*@DBG_ADPTVTY					|*/
+	/*@DBG_CFO_TRK					|*/
+	/*@DBG_ENV_MNTR					|*/
+	/*@DBG_PRI_CCA					|*/
+	/*@DBG_ADPTV_SOML				|*/
+	/*@DBG_LNA_SAT_CHK				|*/
+	/*@DBG_PHY_STATUS				|*/
+	/*@DBG_TMP					|*/
+	/*@DBG_FW_TRACE					|*/
+	/*@DBG_TXBF					|*/
+	/*@DBG_COMMON_FLOW				|*/
+	/*@ODM_PHY_CONFIG				|*/
+	/*@ODM_COMP_INIT				|*/
+	/*@DBG_CMN					|*/
+	/*@ODM_COMP_API					|*/
+#endif
+	0;
+
+	dm->fw_buff_is_enpty = true;
+	dm->pre_c2h_seq = 0;
+	dm->c2h_cmd_start = 0;
+	dm->cmn_dbg_msg_cnt = PHYDM_WATCH_DOG_PERIOD;
+	dm->cmn_dbg_msg_period = PHYDM_WATCH_DOG_PERIOD;
+	phydm_reset_rx_rate_distribution(dm);
 }
 
-void
-phydm_bb_dbg_port_header_sel(
-	void			*p_dm_void,
-	u32			header_idx
-) {
-	struct PHY_DM_STRUCT		*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	
-	if (p_dm->support_ic_type & ODM_IC_11AC_SERIES) {
-		
-		odm_set_bb_reg(p_dm, 0x8f8, (BIT(25) | BIT(24) | BIT(23) | BIT(22)), header_idx);
-		
-		/*
-		header_idx:
-			(0:) '{ofdm_dbg[31:0]}'
-			(1:) '{cca,crc32_fail,dbg_ofdm[29:0]}'
-			(2:) '{vbon,crc32_fail,dbg_ofdm[29:0]}'
-			(3:) '{cca,crc32_ok,dbg_ofdm[29:0]}'
-			(4:) '{vbon,crc32_ok,dbg_ofdm[29:0]}'
-			(5:) '{dbg_iqk_anta}'
-			(6:) '{cca,ofdm_crc_ok,dbg_dp_anta[29:0]}'
-			(7:) '{dbg_iqk_antb}'
-			(8:) '{DBGOUT_RFC_b[31:0]}'
-			(9:) '{DBGOUT_RFC_a[31:0]}'
-			(a:) '{dbg_ofdm}'
-			(b:) '{dbg_cck}'
-		*/
+void phydm_bb_dbg_port_header_sel(void *dm_void, u32 header_idx)
+{
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+
+	if (dm->support_ic_type & ODM_IC_11AC_SERIES) {
+		odm_set_bb_reg(dm, R_0x8f8, 0x3c00000, header_idx);
+
+		/*@
+		 * header_idx:
+		 *	(0:) '{ofdm_dbg[31:0]}'
+		 *	(1:) '{cca,crc32_fail,dbg_ofdm[29:0]}'
+		 *	(2:) '{vbon,crc32_fail,dbg_ofdm[29:0]}'
+		 *	(3:) '{cca,crc32_ok,dbg_ofdm[29:0]}'
+		 *	(4:) '{vbon,crc32_ok,dbg_ofdm[29:0]}'
+		 *	(5:) '{dbg_iqk_anta}'
+		 *	(6:) '{cca,ofdm_crc_ok,dbg_dp_anta[29:0]}'
+		 *	(7:) '{dbg_iqk_antb}'
+		 *	(8:) '{DBGOUT_RFC_b[31:0]}'
+		 *	(9:) '{DBGOUT_RFC_a[31:0]}'
+		 *	(a:) '{dbg_ofdm}'
+		 *	(b:) '{dbg_cck}'
+		 */
 	}
 }
 
-void
-phydm_bb_dbg_port_clock_en(
-	void			*p_dm_void,
-	u8			enable
-) {
-	struct PHY_DM_STRUCT		*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	u32		reg_value = 0;
-	
-	if (p_dm->support_ic_type & (ODM_RTL8822B | ODM_RTL8821C | ODM_RTL8814A | ODM_RTL8814B)) {
-		
-		reg_value = (enable == true) ? 0x7 : 0;
-		odm_set_bb_reg(p_dm, 0x198c, 0x7, reg_value); /*enable/disable debug port clock, for power saving*/
+void phydm_bb_dbg_port_clock_en(void *dm_void, u8 enable)
+{
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	u32 reg_value = 0;
+
+	if (dm->support_ic_type &
+	    (ODM_RTL8822B | ODM_RTL8821C | ODM_RTL8814A | ODM_RTL8814B |
+	    ODM_RTL8195B)) {
+		/*@enable/disable debug port clock, for power saving*/
+		reg_value = enable ? 0x7 : 0;
+		odm_set_bb_reg(dm, R_0x198c, 0x7, reg_value);
 	}
 }
 
-u8
-phydm_set_bb_dbg_port(
-	void			*p_dm_void,
-	u8			curr_dbg_priority,
-	u32			debug_port
-)
+u8 phydm_set_bb_dbg_port(void *dm_void, u8 curr_dbg_priority, u32 debug_port)
 {
-	struct PHY_DM_STRUCT		*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	u8	dbg_port_result = false;
-
-	if (curr_dbg_priority > p_dm->pre_dbg_priority) {
-
-		if (p_dm->support_ic_type & ODM_IC_11AC_SERIES) {
-			
-			phydm_bb_dbg_port_clock_en(p_dm, true);
-			
-			odm_set_bb_reg(p_dm, 0x8fc, MASKDWORD, debug_port);
-			/**/
-		} else /*if (p_dm->support_ic_type & ODM_IC_11N_SERIES)*/ {
-			odm_set_bb_reg(p_dm, 0x908, MASKDWORD, debug_port);
-			/**/
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	u8 dbg_port_result = false;
+
+	if (curr_dbg_priority > dm->pre_dbg_priority) {
+		if (dm->support_ic_type & ODM_IC_11AC_SERIES) {
+			phydm_bb_dbg_port_clock_en(dm, true);
+
+			odm_set_bb_reg(dm, R_0x8fc, MASKDWORD, debug_port);
+		} else if (dm->support_ic_type & ODM_IC_JGR3_SERIES) {
+			odm_set_bb_reg(dm, R_0x1c3c, 0xfff00, debug_port);
+
+		} else { /*@if (dm->support_ic_type & ODM_IC_11N_SERIES)*/
+			odm_set_bb_reg(dm, R_0x908, MASKDWORD, debug_port);
 		}
-		PHYDM_DBG(p_dm, ODM_COMP_API, ("DbgPort ((0x%x)) set success, Cur_priority=((%d)), Pre_priority=((%d))\n", debug_port, curr_dbg_priority, p_dm->pre_dbg_priority));
-		p_dm->pre_dbg_priority = curr_dbg_priority;
+		PHYDM_DBG(dm, ODM_COMP_API,
+			  "DbgPort ((0x%x)) set success, Cur_priority=((%d)), Pre_priority=((%d))\n",
+			  debug_port, curr_dbg_priority, dm->pre_dbg_priority);
+		dm->pre_dbg_priority = curr_dbg_priority;
 		dbg_port_result = true;
 	}
-		
+
 	return dbg_port_result;
 }
 
-void
-phydm_release_bb_dbg_port(
-	void			*p_dm_void
-)
+void phydm_release_bb_dbg_port(void *dm_void)
 {
-	struct PHY_DM_STRUCT		*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
 
-	phydm_bb_dbg_port_clock_en(p_dm, false);
-	phydm_bb_dbg_port_header_sel(p_dm, 0);
+	phydm_bb_dbg_port_clock_en(dm, false);
+	phydm_bb_dbg_port_header_sel(dm, 0);
 
-	p_dm->pre_dbg_priority = BB_DBGPORT_RELEASE;
-	PHYDM_DBG(p_dm, ODM_COMP_API, ("Release BB dbg_port\n"));
+	dm->pre_dbg_priority = DBGPORT_RELEASE;
+	PHYDM_DBG(dm, ODM_COMP_API, "Release BB dbg_port\n");
 }
 
-u32
-phydm_get_bb_dbg_port_value(
-	void			*p_dm_void
-)
+u32 phydm_get_bb_dbg_port_val(void *dm_void)
 {
-	struct PHY_DM_STRUCT		*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	u32	dbg_port_value = 0;
-
-	if (p_dm->support_ic_type & ODM_IC_11AC_SERIES) {
-		dbg_port_value = odm_get_bb_reg(p_dm, 0xfa0, MASKDWORD);
-		/**/
-	} else /*if (p_dm->support_ic_type & ODM_IC_11N_SERIES)*/ {
-		dbg_port_value = odm_get_bb_reg(p_dm, 0xdf4, MASKDWORD);
-		/**/
-	}
-	PHYDM_DBG(p_dm, ODM_COMP_API, ("dbg_port_value = 0x%x\n", dbg_port_value));
-	return	dbg_port_value;
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	u32 dbg_port_value = 0;
+
+	if (dm->support_ic_type & ODM_IC_11AC_SERIES)
+		dbg_port_value = odm_get_bb_reg(dm, R_0xfa0, MASKDWORD);
+	else if (dm->support_ic_type & ODM_IC_JGR3_SERIES)
+		dbg_port_value = odm_get_bb_reg(dm, R_0x2dbc, MASKDWORD);
+	else /*@if (dm->support_ic_type & ODM_IC_11N_SERIES)*/
+		dbg_port_value = odm_get_bb_reg(dm, R_0xdf4, MASKDWORD);
+
+	PHYDM_DBG(dm, ODM_COMP_API, "dbg_port_value = 0x%x\n", dbg_port_value);
+	return dbg_port_value;
 }
 
 #ifdef CONFIG_PHYDM_DEBUG_FUNCTION
-
-void
-phydm_bb_debug_info_n_series(
-	void			*p_dm_void,
-	u32			*_used,
-	char				*output,
-	u32			*_out_len
-)
+#if (ODM_IC_11N_SERIES_SUPPORT)
+void phydm_bb_hw_dbg_info_n(void *dm_void, u32 *_used, char *output,
+			    u32 *_out_len)
 {
-	struct PHY_DM_STRUCT		*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
 	u32 used = *_used;
 	u32 out_len = *_out_len;
+	u32 value32 = 0, value32_1 = 0;
+	u8 rf_gain_a = 0, rf_gain_b = 0, rf_gain_c = 0, rf_gain_d = 0;
+	u8 rx_snr_a = 0, rx_snr_b = 0, rx_snr_c = 0, rx_snr_d = 0;
+	s8 rxevm_0 = 0, rxevm_1 = 0;
+	#if 1
+	struct phydm_cfo_rpt cfo;
+	u8 i = 0;
+	#else
+	s32 short_cfo_a = 0, short_cfo_b = 0, long_cfo_a = 0, long_cfo_b = 0;
+	s32 scfo_a = 0, scfo_b = 0, avg_cfo_a = 0, avg_cfo_b = 0;
+	s32 cfo_end_a = 0, cfo_end_b = 0, acq_cfo_a = 0, acq_cfo_b = 0;
+	#endif
 
-	u32	value32 = 0, value32_1 = 0;
-	u8	rf_gain_a = 0, rf_gain_b = 0, rf_gain_c = 0, rf_gain_d = 0;
-	u8	rx_snr_a = 0, rx_snr_b = 0, rx_snr_c = 0, rx_snr_d = 0;
-
-	s8    rxevm_0 = 0, rxevm_1 = 0;
-	s32	short_cfo_a = 0, short_cfo_b = 0, long_cfo_a = 0, long_cfo_b = 0;
-	s32	scfo_a = 0, scfo_b = 0, avg_cfo_a = 0, avg_cfo_b = 0;
-	s32	cfo_end_a = 0, cfo_end_b = 0, acq_cfo_a = 0, acq_cfo_b = 0;
-
-	PHYDM_SNPRINTF((output + used, out_len - used, "\r\n %-35s\n", "BB Report Info"));
+	PDM_SNPF(out_len, used, output + used, out_len - used, "\r\n %-35s\n",
+		 "BB Report Info");
 
-	/*AGC result*/
-	value32 = odm_get_bb_reg(p_dm, 0xdd0, MASKDWORD);
+	/*@AGC result*/
+	value32 = odm_get_bb_reg(dm, R_0xdd0, MASKDWORD);
 	rf_gain_a = (u8)(value32 & 0x3f);
 	rf_gain_a = rf_gain_a << 1;
 
@@ -220,10 +206,12 @@ phydm_bb_debug_info_n_series(
 	rf_gain_d = (u8)((value32 >> 24) & 0x3f);
 	rf_gain_d = rf_gain_d << 1;
 
-	PHYDM_SNPRINTF((output + used, out_len - used, "\r\n %-35s = %d / %d / %d / %d", "OFDM RX RF Gain(A/B/C/D)", rf_gain_a, rf_gain_b, rf_gain_c, rf_gain_d));
+	PDM_SNPF(out_len, used, output + used, out_len - used,
+		 "\r\n %-35s = %d / %d / %d / %d", "OFDM RX RF Gain(A/B/C/D)",
+		 rf_gain_a, rf_gain_b, rf_gain_c, rf_gain_d);
 
 	/*SNR report*/
-	value32 = odm_get_bb_reg(p_dm, 0xdd4, MASKDWORD);
+	value32 = odm_get_bb_reg(dm, R_0xdd4, MASKDWORD);
 	rx_snr_a = (u8)(value32 & 0xff);
 	rx_snr_a = rx_snr_a >> 1;
 
@@ -236,10 +224,12 @@ phydm_bb_debug_info_n_series(
 	rx_snr_d = (u8)((value32 >> 24) & 0xff);
 	rx_snr_d = rx_snr_d >> 1;
 
-	PHYDM_SNPRINTF((output + used, out_len - used, "\r\n %-35s = %d / %d / %d / %d", "RXSNR(A/B/C/D, dB)", rx_snr_a, rx_snr_b, rx_snr_c, rx_snr_d));
+	PDM_SNPF(out_len, used, output + used, out_len - used,
+		 "\r\n %-35s = %d / %d / %d / %d", "RXSNR(A/B/C/D, dB)",
+		 rx_snr_a, rx_snr_b, rx_snr_c, rx_snr_d);
 
 	/* PostFFT related info*/
-	value32 = odm_get_bb_reg(p_dm, 0xdd8, MASKDWORD);
+	value32 = odm_get_bb_reg(dm, R_0xdd8, MASKDWORD);
 
 	rxevm_0 = (s8)((value32 & MASKBYTE2) >> 16);
 	rxevm_0 /= 2;
@@ -251,19 +241,30 @@ phydm_bb_debug_info_n_series(
 	if (rxevm_1 < -63)
 		rxevm_1 = 0;
 
-	PHYDM_SNPRINTF((output + used, out_len - used, "\r\n %-35s = %d / %d", "RXEVM (1ss/2ss)", rxevm_0, rxevm_1));
-
-	/*CFO Report Info*/
-	odm_set_bb_reg(p_dm, 0xd00, BIT(26), 1);
+	PDM_SNPF(out_len, used, output + used, out_len - used,
+		 "\r\n %-35s = %d / %d", "RXEVM (1ss/2ss)", rxevm_0, rxevm_1);
+
+#if 1
+	phydm_get_cfo_info(dm, &cfo);
+	for (i = 0; i < dm->num_rf_path; i++) {
+		PDM_SNPF(out_len, used, output + used, out_len - used,
+			 "\r\n %s[%d] %-28s = {%d, %d, %d, %d, %d}",
+			 "CFO", i, "{S, L, Sec, Acq, End}",
+			 cfo.cfo_rpt_s[i], cfo.cfo_rpt_l[i], cfo.cfo_rpt_sec[i],
+			 cfo.cfo_rpt_acq[i], cfo.cfo_rpt_end[i]);
+	}
+#else
+	/*@CFO Report Info*/
+	odm_set_bb_reg(dm, R_0xd00, BIT(26), 1);
 
 	/*Short CFO*/
-	value32 = odm_get_bb_reg(p_dm, 0xdac, MASKDWORD);
-	value32_1 = odm_get_bb_reg(p_dm, 0xdb0, MASKDWORD);
+	value32 = odm_get_bb_reg(dm, R_0xdac, MASKDWORD);
+	value32_1 = odm_get_bb_reg(dm, R_0xdb0, MASKDWORD);
 
-	short_cfo_b = (s32)(value32 & 0xfff);			/*S(12,11)*/
+	short_cfo_b = (s32)(value32 & 0xfff); /*S(12,11)*/
 	short_cfo_a = (s32)((value32 & 0x0fff0000) >> 16);
 
-	long_cfo_b = (s32)(value32_1 & 0x1fff);		/*S(13,12)*/
+	long_cfo_b = (s32)(value32_1 & 0x1fff); /*S(13,12)*/
 	long_cfo_a = (s32)((value32_1 & 0x1fff0000) >> 16);
 
 	/*SFO 2's to dec*/
@@ -275,7 +276,7 @@ phydm_bb_debug_info_n_series(
 	short_cfo_a = (short_cfo_a * 312500) / 2048;
 	short_cfo_b = (short_cfo_b * 312500) / 2048;
 
-	/*LFO 2's to dec*/
+	/*@LFO 2's to dec*/
 
 	if (long_cfo_a > 4095)
 		long_cfo_a = long_cfo_a - 8192;
@@ -286,15 +287,20 @@ phydm_bb_debug_info_n_series(
 	long_cfo_a = long_cfo_a * 312500 / 4096;
 	long_cfo_b = long_cfo_b * 312500 / 4096;
 
-	PHYDM_SNPRINTF((output + used, out_len - used, "\r\n %-35s", "CFO Report Info"));
-	PHYDM_SNPRINTF((output + used, out_len - used, "\r\n %-35s = %d / %d", "Short CFO(Hz) <A/B>", short_cfo_a, short_cfo_b));
-	PHYDM_SNPRINTF((output + used, out_len - used, "\r\n %-35s = %d / %d", "Long CFO(Hz) <A/B>", long_cfo_a, long_cfo_b));
+	PDM_SNPF(out_len, used, output + used, out_len - used, "\r\n %-35s",
+		 "CFO Report Info");
+	PDM_SNPF(out_len, used, output + used, out_len - used,
+		 "\r\n %-35s = %d / %d", "Short CFO(Hz) <A/B>", short_cfo_a,
+		 short_cfo_b);
+	PDM_SNPF(out_len, used, output + used, out_len - used,
+		 "\r\n %-35s = %d / %d", "Long CFO(Hz) <A/B>", long_cfo_a,
+		 long_cfo_b);
 
 	/*SCFO*/
-	value32 = odm_get_bb_reg(p_dm, 0xdb8, MASKDWORD);
-	value32_1 = odm_get_bb_reg(p_dm, 0xdb4, MASKDWORD);
+	value32 = odm_get_bb_reg(dm, R_0xdb8, MASKDWORD);
+	value32_1 = odm_get_bb_reg(dm, R_0xdb4, MASKDWORD);
 
-	scfo_b = (s32)(value32 & 0x7ff);			/*S(11,10)*/
+	scfo_b = (s32)(value32 & 0x7ff); /*S(11,10)*/
 	scfo_a = (s32)((value32 & 0x07ff0000) >> 16);
 
 	if (scfo_a > 1023)
@@ -306,7 +312,7 @@ phydm_bb_debug_info_n_series(
 	scfo_a = scfo_a * 312500 / 1024;
 	scfo_b = scfo_b * 312500 / 1024;
 
-	avg_cfo_b = (s32)(value32_1 & 0x1fff);	/*S(13,12)*/
+	avg_cfo_b = (s32)(value32_1 & 0x1fff); /*S(13,12)*/
 	avg_cfo_a = (s32)((value32_1 & 0x1fff0000) >> 16);
 
 	if (avg_cfo_a > 4095)
@@ -318,13 +324,17 @@ phydm_bb_debug_info_n_series(
 	avg_cfo_a = avg_cfo_a * 312500 / 4096;
 	avg_cfo_b = avg_cfo_b * 312500 / 4096;
 
-	PHYDM_SNPRINTF((output + used, out_len - used, "\r\n %-35s = %d / %d", "value SCFO(Hz) <A/B>", scfo_a, scfo_b));
-	PHYDM_SNPRINTF((output + used, out_len - used, "\r\n %-35s = %d / %d", "Avg CFO(Hz) <A/B>", avg_cfo_a, avg_cfo_b));
+	PDM_SNPF(out_len, used, output + used, out_len - used,
+		 "\r\n %-35s = %d / %d", "value SCFO(Hz) <A/B>", scfo_a,
+		 scfo_b);
+	PDM_SNPF(out_len, used, output + used, out_len - used,
+		 "\r\n %-35s = %d / %d", "Avg CFO(Hz) <A/B>", avg_cfo_a,
+		 avg_cfo_b);
 
-	value32 = odm_get_bb_reg(p_dm, 0xdbc, MASKDWORD);
-	value32_1 = odm_get_bb_reg(p_dm, 0xde0, MASKDWORD);
+	value32 = odm_get_bb_reg(dm, R_0xdbc, MASKDWORD);
+	value32_1 = odm_get_bb_reg(dm, R_0xde0, MASKDWORD);
 
-	cfo_end_b = (s32)(value32 & 0x1fff);		/*S(13,12)*/
+	cfo_end_b = (s32)(value32 & 0x1fff); /*S(13,12)*/
 	cfo_end_a = (s32)((value32 & 0x1fff0000) >> 16);
 
 	if (cfo_end_a > 4095)
@@ -336,7 +346,7 @@ phydm_bb_debug_info_n_series(
 	cfo_end_a = cfo_end_a * 312500 / 4096;
 	cfo_end_b = cfo_end_b * 312500 / 4096;
 
-	acq_cfo_b = (s32)(value32_1 & 0x1fff);	/*S(13,12)*/
+	acq_cfo_b = (s32)(value32_1 & 0x1fff); /*S(13,12)*/
 	acq_cfo_a = (s32)((value32_1 & 0x1fff0000) >> 16);
 
 	if (acq_cfo_a > 4095)
@@ -348,1652 +358,3528 @@ phydm_bb_debug_info_n_series(
 	acq_cfo_a = acq_cfo_a * 312500 / 4096;
 	acq_cfo_b = acq_cfo_b * 312500 / 4096;
 
-	PHYDM_SNPRINTF((output + used, out_len - used, "\r\n %-35s = %d / %d", "End CFO(Hz) <A/B>", cfo_end_a, cfo_end_b));
-	PHYDM_SNPRINTF((output + used, out_len - used, "\r\n %-35s = %d / %d", "ACQ CFO(Hz) <A/B>", acq_cfo_a, acq_cfo_b));
-
+	PDM_SNPF(out_len, used, output + used, out_len - used,
+		 "\r\n %-35s = %d / %d", "End CFO(Hz) <A/B>", cfo_end_a,
+		 cfo_end_b);
+	PDM_SNPF(out_len, used, output + used, out_len - used,
+		 "\r\n %-35s = %d / %d", "ACQ CFO(Hz) <A/B>", acq_cfo_a,
+		 acq_cfo_b);
+#endif
 }
+#endif
 
-
-void
-phydm_bb_debug_info(
-	void			*p_dm_void,
-	u32			*_used,
-	char			*output,
-	u32			*_out_len
-)
+#if (ODM_IC_11AC_SERIES_SUPPORT)
+#if (RTL8822B_SUPPORT)
+void phydm_bb_hw_dbg_info_8822b(void *dm_void, u32 *_used, char *output,
+				u32 *_out_len)
 {
-	struct PHY_DM_STRUCT		*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
 	u32 used = *_used;
 	u32 out_len = *_out_len;
+	u32 condi_num = 0;
+	u8 i = 0;
 
-	char *tmp_string = NULL;
+	if (!(dm->support_ic_type == ODM_RTL8822B))
+		return;
 
-	u8	RX_HT_BW, RX_VHT_BW, RXSC, RX_HT, RX_BW;
-	static u8 v_rx_bw ;
-	u32	value32, value32_1, value32_2, value32_3;
-	s32	SFO_A, SFO_B, SFO_C, SFO_D;
-	s32	LFO_A, LFO_B, LFO_C, LFO_D;
-	static u8	MCSS, tail, parity, rsv, vrsv, idx, smooth, htsound, agg, stbc, vstbc, fec, fecext, sgi, sgiext, htltf, vgid, v_nsts, vtxops, vrsv2, vbrsv, bf, vbcrc;
-	static u16	h_length, htcrc8, length;
-	static u16 vpaid;
-	static u16	v_length, vhtcrc8, v_mcss, v_tail, vb_tail;
-	static u8	HMCSS, HRX_BW;
+	condi_num = phydm_get_condi_num_8822b(dm);
+	phydm_get_condi_num_acc_8822b(dm);
 
-	u8    pwdb;
-	s8    RXEVM_0, RXEVM_1, RXEVM_2 ;
-	u8    rf_gain_path_a, rf_gain_path_b, rf_gain_path_c, rf_gain_path_d;
-	u8    rx_snr_path_a, rx_snr_path_b, rx_snr_path_c, rx_snr_path_d;
-	s32    sig_power;
+	PDM_SNPF(out_len, used, output + used, out_len - used,
+		 "\r\n %-35s = %d.%.4d", "condi_num",
+		 condi_num >> 4, phydm_show_fraction_num(condi_num & 0xf, 4));
 
-	const char *L_rate[8] = {"6M", "9M", "12M", "18M", "24M", "36M", "48M", "54M"};
+	for (i = 0; i < CN_CNT_MAX; i++) {
+		PDM_SNPF(out_len, used, output + used, out_len - used,
+			 "\r\n Tone_num[CN>%d]%-21s = %d",
+			 i, " ", dm->phy_dbg_info.condi_num_cdf[i]);
+	}
 
-#if 0
-	const double evm_comp_20M = 0.579919469776867; /* 10*log10(64.0/56.0) */
-	const double evm_comp_40M = 0.503051183113957; /* 10*log10(128.0/114.0) */
-	const double evm_comp_80M = 0.244245993314183; /* 10*log10(256.0/242.0) */
-	const double evm_comp_160M = 0.244245993314183; /* 10*log10(512.0/484.0) */
+	*_used = used;
+	*_out_len = out_len;
+}
 #endif
 
-	if (p_dm->support_ic_type & ODM_IC_11N_SERIES) {
-		phydm_bb_debug_info_n_series(p_dm, &used, output, &out_len);
-		return;
+void phydm_bb_hw_dbg_info_ac(void *dm_void, u32 *_used, char *output,
+			     u32 *_out_len)
+{
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	u32 used = *_used;
+	u32 out_len = *_out_len;
+	char *tmp_string = NULL;
+	u8 rx_ht_bw, rx_vht_bw, rxsc, rx_ht, bw_idx = 0;
+	static u8 v_rx_bw;
+	u32 value32, value32_1, value32_2, value32_3;
+	struct phydm_cfo_rpt cfo;
+	u8 i = 0;
+	static u8 tail, parity, rsv, vrsv, smooth, htsound, agg;
+	static u8 stbc, vstbc, fec, fecext, sgi, sgiext, htltf, vgid, v_nsts;
+	static u8 vtxops, vrsv2, vbrsv, bf, vbcrc;
+	static u16 h_length, htcrc8, length;
+	static u16 vpaid;
+	static u16 v_length, vhtcrc8, v_mcss, v_tail, vb_tail;
+	static u8 hmcss, hrx_bw;
+	u8 pwdb;
+	s8 rxevm_0, rxevm_1, rxevm_2;
+	u8 rf_gain[4];
+	u8 rx_snr[4];
+	s32 sig_power;
+
+	PDM_SNPF(out_len, used, output + used, out_len - used, "\r\n %-35s\n",
+		 "BB Report Info");
+
+	/*@ [BW & Mode] =====================================================*/
+
+	value32 = odm_get_bb_reg(dm, R_0xf80, MASKDWORD);
+	rx_ht = (u8)((value32 & 0x180) >> 7);
+
+	if (rx_ht == AD_VHT_MODE) {
+		tmp_string = "VHT";
+		bw_idx = (u8)((value32 >> 1) & 0x3);
+	} else if (rx_ht == AD_HT_MODE) {
+		tmp_string = "HT";
+		bw_idx = (u8)(value32 & 0x1);
+	} else {
+		tmp_string = "Legacy";
+		bw_idx = 0;
 	}
+	PDM_SNPF(out_len, used, output + used, out_len - used,
+		 "\r\n %-35s %s %dM", "mode", tmp_string, (20 << bw_idx));
 
-	PHYDM_SNPRINTF((output + used, out_len - used, "\r\n %-35s\n", "BB Report Info"));
-
-	/*BW & mode Detection*/
+	if (rx_ht != AD_LEGACY_MODE) {
+		rxsc = (u8)(value32 & 0x78);
 
-	value32 = odm_get_bb_reg(p_dm, 0xf80, MASKDWORD);
-	value32_2 = value32;
-	RX_HT_BW = (u8)(value32 & 0x1);
-	RX_VHT_BW = (u8)((value32 >> 1) & 0x3);
-	RXSC = (u8)(value32 & 0x78);
-	value32_1 = (value32 & 0x180) >> 7;
-	RX_HT = (u8)(value32_1);
-
-	RX_BW = 0;
-
-	if (RX_HT == 2) {
-		if (RX_VHT_BW == 0)
-			tmp_string = "20M";
-		else if (RX_VHT_BW == 1)
-			tmp_string = "40M";
-		else
-			tmp_string = "80M";
-		PHYDM_SNPRINTF((output + used, out_len - used, "\r\n %-35s %s %s", "mode", "VHT", tmp_string));
-		RX_BW = RX_VHT_BW;
-	} else if (RX_HT == 1) {
-		if (RX_HT_BW == 0)
-			tmp_string = "20M";
-		else if (RX_HT_BW == 1)
-			tmp_string = "40M";
-		PHYDM_SNPRINTF((output + used, out_len - used, "\r\n %-35s %s %s", "mode", "HT", tmp_string));
-		RX_BW = RX_HT_BW;
-	} else
-		PHYDM_SNPRINTF((output + used, out_len - used, "\r\n %-35s %s", "mode", "Legacy"));
-
-	if (RX_HT != 0) {
-		if (RXSC == 0)
+		if (rxsc == 0)
 			tmp_string = "duplicate/full bw";
-		else if (RXSC == 1)
+		else if (rxsc == 1)
 			tmp_string = "usc20-1";
-		else if (RXSC == 2)
+		else if (rxsc == 2)
 			tmp_string = "lsc20-1";
-		else if (RXSC == 3)
+		else if (rxsc == 3)
 			tmp_string = "usc20-2";
-		else if (RXSC == 4)
+		else if (rxsc == 4)
 			tmp_string = "lsc20-2";
-		else if (RXSC == 9)
+		else if (rxsc == 9)
 			tmp_string = "usc40";
-		else if (RXSC == 10)
+		else if (rxsc == 10)
 			tmp_string = "lsc40";
-		PHYDM_SNPRINTF((output + used, out_len - used, "  %-35s", tmp_string));
-	}
-
-	/* RX signal power and AGC related info*/
-
-	value32 = odm_get_bb_reg(p_dm, 0xF90, MASKDWORD);
-	pwdb = (u8)((value32 & MASKBYTE1) >> 8);
-	pwdb = pwdb >> 1;
-	sig_power = -110 + pwdb;
-	PHYDM_SNPRINTF((output + used, out_len - used, "\r\n %-35s = %d", "OFDM RX Signal Power(dB)", sig_power));
-
-	value32 = odm_get_bb_reg(p_dm, 0xd14, MASKDWORD);
-	rx_snr_path_a = (u8)(value32 & 0xFF) >> 1;
-	rf_gain_path_a = (s8)((value32 & MASKBYTE1) >> 8);
-	rf_gain_path_a *= 2;
-	value32 = odm_get_bb_reg(p_dm, 0xd54, MASKDWORD);
-	rx_snr_path_b = (u8)(value32 & 0xFF) >> 1;
-	rf_gain_path_b = (s8)((value32 & MASKBYTE1) >> 8);
-	rf_gain_path_b *= 2;
-	value32 = odm_get_bb_reg(p_dm, 0xd94, MASKDWORD);
-	rx_snr_path_c = (u8)(value32 & 0xFF) >> 1;
-	rf_gain_path_c = (s8)((value32 & MASKBYTE1) >> 8);
-	rf_gain_path_c *= 2;
-	value32 = odm_get_bb_reg(p_dm, 0xdd4, MASKDWORD);
-	rx_snr_path_d = (u8)(value32 & 0xFF) >> 1;
-	rf_gain_path_d = (s8)((value32 & MASKBYTE1) >> 8);
-	rf_gain_path_d *= 2;
-
-	PHYDM_SNPRINTF((output + used, out_len - used, "\r\n %-35s = %d / %d / %d / %d", "OFDM RX RF Gain(A/B/C/D)", rf_gain_path_a, rf_gain_path_b, rf_gain_path_c, rf_gain_path_d));
 
+		PDM_SNPF(out_len, used, output + used, out_len - used,
+			 "  %-35s", tmp_string);
+	}
 
-	/* RX counter related info*/
-
-	value32 = odm_get_bb_reg(p_dm, 0xF08, MASKDWORD);
-	PHYDM_SNPRINTF((output + used, out_len - used, "\r\n %-35s = %d", "OFDM CCA counter", ((value32 & 0xFFFF0000) >> 16)));
-
-	value32 = odm_get_bb_reg(p_dm, 0xFD0, MASKDWORD);
-	PHYDM_SNPRINTF((output + used, out_len - used, "\r\n %-35s = %d", "OFDM SBD Fail counter", value32 & 0xFFFF));
-
-	value32 = odm_get_bb_reg(p_dm, 0xFC4, MASKDWORD);
-	PHYDM_SNPRINTF((output + used, out_len - used, "\r\n %-35s = %d / %d", "VHT SIGA/SIGB CRC8 Fail counter", value32 & 0xFFFF, ((value32 & 0xFFFF0000) >> 16)));
-
-	value32 = odm_get_bb_reg(p_dm, 0xFCC, MASKDWORD);
-	PHYDM_SNPRINTF((output + used, out_len - used, "\r\n %-35s = %d", "CCK CCA counter", value32 & 0xFFFF));
-
-	value32 = odm_get_bb_reg(p_dm, 0xFBC, MASKDWORD);
-	PHYDM_SNPRINTF((output + used, out_len - used, "\r\n %-35s = %d / %d", "LSIG (parity Fail/rate Illegal) counter", value32 & 0xFFFF, ((value32 & 0xFFFF0000) >> 16)));
-
-	value32_1 = odm_get_bb_reg(p_dm, 0xFC8, MASKDWORD);
-	value32_2 = odm_get_bb_reg(p_dm, 0xFC0, MASKDWORD);
-	PHYDM_SNPRINTF((output + used, out_len - used, "\r\n %-35s = %d / %d", "HT/VHT MCS NOT SUPPORT counter", ((value32_2 & 0xFFFF0000) >> 16), value32_1 & 0xFFFF));
-
-	/* PostFFT related info*/
-	value32 = odm_get_bb_reg(p_dm, 0xF8c, MASKDWORD);
-	RXEVM_0 = (s8)((value32 & MASKBYTE2) >> 16);
-	RXEVM_0 /= 2;
-	if (RXEVM_0 < -63)
-		RXEVM_0 = 0;
+	/*@ [RX signal power and AGC related info] ==========================*/
 
-	RXEVM_1 = (s8)((value32 & MASKBYTE3) >> 24);
-	RXEVM_1 /= 2;
-	value32 = odm_get_bb_reg(p_dm, 0xF88, MASKDWORD);
-	RXEVM_2 = (s8)((value32 & MASKBYTE2) >> 16);
-	RXEVM_2 /= 2;
+	pwdb = (u8)odm_get_bb_reg(dm, R_0xf90, MASKBYTE1);
+	sig_power = -110 + (pwdb >> 1);
+	PDM_SNPF(out_len, used, output + used, out_len - used,
+		 "\r\n %-35s = %d", "OFDM RX Signal Power(dB)", sig_power);
 
-	if (RXEVM_1 < -63)
-		RXEVM_1 = 0;
-	if (RXEVM_2 < -63)
-		RXEVM_2 = 0;
+	value32 = odm_get_bb_reg(dm, R_0xd14, MASKDWORD);
+	rx_snr[RF_PATH_A] = (u8)(value32 & 0xFF) >> 1; /*@ S(8,1)*/
+	rf_gain[RF_PATH_A] = (s8)(((value32 & MASKBYTE1) >> 8) * 2);
 
-	PHYDM_SNPRINTF((output + used, out_len - used, "\r\n %-35s = %d / %d / %d", "RXEVM (1ss/2ss/3ss)", RXEVM_0, RXEVM_1, RXEVM_2));
-	PHYDM_SNPRINTF((output + used, out_len - used, "\r\n %-35s = %d / %d / %d / %d", "RXSNR(A/B/C/D, dB)", rx_snr_path_a, rx_snr_path_b, rx_snr_path_c, rx_snr_path_d));
+	value32 = odm_get_bb_reg(dm, R_0xd54, MASKDWORD);
+	rx_snr[RF_PATH_B] = (u8)(value32 & 0xFF) >> 1; /*@ S(8,1)*/
+	rf_gain[RF_PATH_B] = (s8)(((value32 & MASKBYTE1) >> 8) * 2);
 
-	value32 = odm_get_bb_reg(p_dm, 0xF8C, MASKDWORD);
-	PHYDM_SNPRINTF((output + used, out_len - used, "\r\n %-35s = %d / %d", "CSI_1st /CSI_2nd", value32 & 0xFFFF, ((value32 & 0xFFFF0000) >> 16)));
+	value32 = odm_get_bb_reg(dm, R_0xd94, MASKDWORD);
+	rx_snr[RF_PATH_C] = (u8)(value32 & 0xFF) >> 1; /*@ S(8,1)*/
+	rf_gain[RF_PATH_C] = (s8)(((value32 & MASKBYTE1) >> 8) * 2);
 
-	/*BW & mode Detection*/
+	value32 = odm_get_bb_reg(dm, R_0xdd4, MASKDWORD);
+	rx_snr[RF_PATH_D] = (u8)(value32 & 0xFF) >> 1; /*@ S(8,1)*/
+	rf_gain[RF_PATH_D] = (s8)(((value32 & MASKBYTE1) >> 8) * 2);
 
-	/*Reset Page F counter*/
-	odm_set_bb_reg(p_dm, 0xB58, BIT(0), 1);
-	odm_set_bb_reg(p_dm, 0xB58, BIT(0), 0);
+	PDM_SNPF(out_len, used, output + used, out_len - used,
+		 "\r\n %-35s = %d / %d / %d / %d", "OFDM RX RF Gain(A/B/C/D)",
+		 rf_gain[RF_PATH_A], rf_gain[RF_PATH_B],
+		 rf_gain[RF_PATH_C], rf_gain[RF_PATH_D]);
 
-	/*CFO Report Info*/
-	/*Short CFO*/
-	value32 = odm_get_bb_reg(p_dm, 0xd0c, MASKDWORD);
-	value32_1 = odm_get_bb_reg(p_dm, 0xd4c, MASKDWORD);
-	value32_2 = odm_get_bb_reg(p_dm, 0xd8c, MASKDWORD);
-	value32_3 = odm_get_bb_reg(p_dm, 0xdcc, MASKDWORD);
+	/*@ [RX counter Info] ===============================================*/
 
-	SFO_A = (s32)(value32 & 0xfff);
-	SFO_B = (s32)(value32_1 & 0xfff);
-	SFO_C = (s32)(value32_2 & 0xfff);
-	SFO_D = (s32)(value32_3 & 0xfff);
+	PDM_SNPF(out_len, used, output + used, out_len - used,
+		 "\r\n %-35s = %d", "OFDM CCA cnt",
+		 odm_get_bb_reg(dm, R_0xf08, 0xFFFF0000));
 
-	LFO_A = (s32)(value32 >> 16);
-	LFO_B = (s32)(value32_1 >> 16);
-	LFO_C = (s32)(value32_2 >> 16);
-	LFO_D = (s32)(value32_3 >> 16);
+	PDM_SNPF(out_len, used, output + used, out_len - used,
+		 "\r\n %-35s = %d", "OFDM SBD Fail cnt",
+		 odm_get_bb_reg(dm, R_0xfd0, 0xFFFF));
 
-	/*SFO 2's to dec*/
-	if (SFO_A > 2047)
-		SFO_A = SFO_A - 4096;
-	SFO_A = (SFO_A * 312500) / 2048;
-	if (SFO_B > 2047)
-		SFO_B = SFO_B - 4096;
-	SFO_B = (SFO_B * 312500) / 2048;
-	if (SFO_C > 2047)
-		SFO_C = SFO_C - 4096;
-	SFO_C = (SFO_C * 312500) / 2048;
-	if (SFO_D > 2047)
-		SFO_D = SFO_D - 4096;
-	SFO_D = (SFO_D * 312500) / 2048;
-
-	/*LFO 2's to dec*/
-
-	if (LFO_A > 4095)
-		LFO_A = LFO_A - 8192;
-
-	if (LFO_B > 4095)
-		LFO_B = LFO_B - 8192;
-
-	if (LFO_C > 4095)
-		LFO_C = LFO_C - 8192;
-
-	if (LFO_D > 4095)
-		LFO_D = LFO_D - 8192;
-	LFO_A = LFO_A * 312500 / 4096;
-	LFO_B = LFO_B * 312500 / 4096;
-	LFO_C = LFO_C * 312500 / 4096;
-	LFO_D = LFO_D * 312500 / 4096;
-	PHYDM_SNPRINTF((output + used, out_len - used, "\r\n %-35s", "CFO Report Info"));
-	PHYDM_SNPRINTF((output + used, out_len - used, "\r\n %-35s = %d / %d / %d /%d", "Short CFO(Hz) <A/B/C/D>", SFO_A, SFO_B, SFO_C, SFO_D));
-	PHYDM_SNPRINTF((output + used, out_len - used, "\r\n %-35s = %d / %d / %d /%d", "Long CFO(Hz) <A/B/C/D>", LFO_A, LFO_B, LFO_C, LFO_D));
+	value32 = odm_get_bb_reg(dm, R_0xfc4, MASKDWORD);
+	PDM_SNPF(out_len, used, output + used, out_len - used,
+		 "\r\n %-35s = %d / %d", "VHT SIGA/SIGB CRC8 Fail cnt",
+		 value32 & 0xFFFF, ((value32 & 0xFFFF0000) >> 16));
 
-	/*SCFO*/
-	value32 = odm_get_bb_reg(p_dm, 0xd10, MASKDWORD);
-	value32_1 = odm_get_bb_reg(p_dm, 0xd50, MASKDWORD);
-	value32_2 = odm_get_bb_reg(p_dm, 0xd90, MASKDWORD);
-	value32_3 = odm_get_bb_reg(p_dm, 0xdd0, MASKDWORD);
+	PDM_SNPF(out_len, used, output + used, out_len - used,
+		 "\r\n %-35s = %d", "CCK CCA cnt",
+		 odm_get_bb_reg(dm, R_0xfcc, 0xFFFF));
 
-	SFO_A = (s32)(value32 & 0x7ff);
-	SFO_B = (s32)(value32_1 & 0x7ff);
-	SFO_C = (s32)(value32_2 & 0x7ff);
-	SFO_D = (s32)(value32_3 & 0x7ff);
+	value32 = odm_get_bb_reg(dm, R_0xfbc, MASKDWORD);
+	PDM_SNPF(out_len, used, output + used, out_len - used,
+		 "\r\n %-35s = %d / %d",
+		 "LSIG (parity Fail/rate Illegal) cnt", value32 & 0xFFFF,
+		 ((value32 & 0xFFFF0000) >> 16));
 
-	if (SFO_A > 1023)
-		SFO_A = SFO_A - 2048;
+	PDM_SNPF(out_len, used, output + used, out_len - used,
+		 "\r\n %-35s = %d / %d", "HT/VHT MCS NOT SUPPORT cnt",
+		 odm_get_bb_reg(dm, R_0xfc0, (0xFFFF0000 >> 16)),
+		 odm_get_bb_reg(dm, R_0xfc8, 0xFFFF));
 
-	if (SFO_B > 2047)
-		SFO_B = SFO_B - 4096;
+	/*@ [PostFFT Info] =================================================*/
+	value32 = odm_get_bb_reg(dm, R_0xf8c, MASKDWORD);
+	rxevm_0 = (s8)((value32 & MASKBYTE2) >> 16);
+	rxevm_0 /= 2;
+	if (rxevm_0 < -63)
+		rxevm_0 = 0;
 
-	if (SFO_C > 2047)
-		SFO_C = SFO_C - 4096;
+	rxevm_1 = (s8)((value32 & MASKBYTE3) >> 24);
+	rxevm_1 /= 2;
+	value32 = odm_get_bb_reg(dm, R_0xf88, MASKDWORD);
+	rxevm_2 = (s8)((value32 & MASKBYTE2) >> 16);
+	rxevm_2 /= 2;
 
-	if (SFO_D > 2047)
-		SFO_D = SFO_D - 4096;
+	if (rxevm_1 < -63)
+		rxevm_1 = 0;
+	if (rxevm_2 < -63)
+		rxevm_2 = 0;
+
+	PDM_SNPF(out_len, used, output + used, out_len - used,
+		 "\r\n %-35s = %d / %d / %d", "RXEVM (1ss/2ss/3ss)", rxevm_0,
+		 rxevm_1, rxevm_2);
+	PDM_SNPF(out_len, used, output + used, out_len - used,
+		 "\r\n %-35s = %d / %d / %d / %d", "RXSNR(A/B/C/D dB)",
+		 rx_snr[RF_PATH_A], rx_snr[RF_PATH_B],
+		 rx_snr[RF_PATH_C], rx_snr[RF_PATH_D]);
+
+	value32 = odm_get_bb_reg(dm, R_0xf8c, MASKDWORD);
+	PDM_SNPF(out_len, used, output + used, out_len - used,
+		 "\r\n %-35s = %d / %d", "CSI_1st /CSI_2nd", value32 & 0xFFFF,
+		 ((value32 & 0xFFFF0000) >> 16));
+
+	/*@ [CFO Report Info] ===============================================*/
+	phydm_get_cfo_info(dm, &cfo);
+	for (i = 0; i < dm->num_rf_path; i++) {
+		PDM_SNPF(out_len, used, output + used, out_len - used,
+			 "\r\n %s[%d] %-28s = {%d, %d, %d, %d, %d}",
+			 "CFO", i, "{S, L, Sec, Acq, End}",
+			 cfo.cfo_rpt_s[i], cfo.cfo_rpt_l[i], cfo.cfo_rpt_sec[i],
+			 cfo.cfo_rpt_acq[i], cfo.cfo_rpt_end[i]);
+	}
 
-	SFO_A = SFO_A * 312500 / 1024;
-	SFO_B = SFO_B * 312500 / 1024;
-	SFO_C = SFO_C * 312500 / 1024;
-	SFO_D = SFO_D * 312500 / 1024;
+	/*@ [L-SIG Content] =================================================*/
+	value32 = odm_get_bb_reg(dm, R_0xf20, MASKDWORD);
+
+	tail = (u8)((value32 & 0xfc0000) >> 18);/*@[23:18]*/
+	parity = (u8)((value32 & 0x20000) >> 17);/*@[17]*/
+	length = (u16)((value32 & 0x1ffe0) >> 5);/*@[16:5]*/
+	rsv = (u8)((value32 & 0x10) >> 4);/*@[4]*/
+
+	PDM_SNPF(out_len, used, output + used, out_len - used, "\r\n %-35s",
+		 "L-SIG");
+	PDM_SNPF(out_len, used, output + used, out_len - used,
+		 "\r\n %-35s = %d M", "rate",
+		 phydm_get_l_sig_rate(dm, (u8)(value32 & 0x0f)));
+
+	PDM_SNPF(out_len, used, output + used, out_len - used,
+		 "\r\n %-35s = %x / %d / %d", "Rsv/length/parity", rsv, length,
+		 parity);
+
+	if (rx_ht == AD_HT_MODE) {
+	/*@ [HT SIG 1] ======================================================*/
+		value32 = odm_get_bb_reg(dm, R_0xf2c, MASKDWORD);
+
+		hmcss = (u8)(value32 & 0x7F);
+		hrx_bw = (u8)((value32 & 0x80) >> 7);
+		h_length = (u16)((value32 & 0x0fff00) >> 8);
+
+		PDM_SNPF(out_len, used, output + used, out_len - used,
+			 "\r\n %-35s", "HT-SIG1");
+		PDM_SNPF(out_len, used, output + used, out_len - used,
+			 "\r\n %-35s = %d / %d / %d", "MCS/BW/length",
+			 hmcss, hrx_bw, h_length);
+	/*@ [HT SIG 2] ======================================================*/
+		value32 = odm_get_bb_reg(dm, R_0xf30, MASKDWORD);
+		smooth = (u8)(value32 & 0x01);
+		htsound = (u8)((value32 & 0x02) >> 1);
+		rsv = (u8)((value32 & 0x04) >> 2);
+		agg = (u8)((value32 & 0x08) >> 3);
+		stbc = (u8)((value32 & 0x30) >> 4);
+		fec = (u8)((value32 & 0x40) >> 6);
+		sgi = (u8)((value32 & 0x80) >> 7);
+		htltf = (u8)((value32 & 0x300) >> 8);
+		htcrc8 = (u16)((value32 & 0x3fc00) >> 10);
+		tail = (u8)((value32 & 0xfc0000) >> 18);
+
+		PDM_SNPF(out_len, used, output + used, out_len - used,
+			 "\r\n %-35s",
+			 "HT-SIG2");
+		PDM_SNPF(out_len, used, output + used, out_len - used,
+			 "\r\n %-35s = %x / %x / %x / %x / %x / %x",
+			 "Smooth/NoSound/Rsv/Aggregate/STBC/LDPC",
+			 smooth, htsound, rsv, agg, stbc, fec);
+		PDM_SNPF(out_len, used, output + used, out_len - used,
+			 "\r\n %-35s = %x / %x / %x / %x",
+			 "SGI/E-HT-LTFs/CRC/tail",
+			 sgi, htltf, htcrc8, tail);
+	} else if (rx_ht == AD_VHT_MODE) {
+	/*@ [VHT SIG A1] ====================================================*/
+		value32 = odm_get_bb_reg(dm, R_0xf2c, MASKDWORD);
 
-	LFO_A = (s32)(value32 >> 16);
-	LFO_B = (s32)(value32_1 >> 16);
-	LFO_C = (s32)(value32_2 >> 16);
-	LFO_D = (s32)(value32_3 >> 16);
+		v_rx_bw = (u8)(value32 & 0x03);
+		vrsv = (u8)((value32 & 0x04) >> 2);
+		vstbc = (u8)((value32 & 0x08) >> 3);
+		vgid = (u8)((value32 & 0x3f0) >> 4);
+		v_nsts = (u8)(((value32 & 0x1c00) >> 10) + 1);
+		vpaid = (u16)((value32 & 0x3fe000) >> 13);
+		vtxops = (u8)((value32 & 0x400000) >> 22);
+		vrsv2 = (u8)((value32 & 0x800000) >> 23);
+
+		PDM_SNPF(out_len, used, output + used, out_len - used,
+			 "\r\n %-35s",
+			 "VHT-SIG-A1");
+		PDM_SNPF(out_len, used, output + used, out_len - used,
+			 "\r\n %-35s = %x / %x / %x / %x / %x / %x / %x / %x",
+			 "BW/Rsv1/STBC/GID/Nsts/PAID/TXOPPS/Rsv2", v_rx_bw,
+			 vrsv, vstbc, vgid, v_nsts, vpaid, vtxops, vrsv2);
+
+	/*@ [VHT SIG A2] ====================================================*/
+		value32 = odm_get_bb_reg(dm, R_0xf30, MASKDWORD);
+
+		/* @sgi=(u8)(value32&0x01); */
+		sgiext = (u8)(value32 & 0x03);
+		/* @fec = (u8)(value32&0x04); */
+		fecext = (u8)((value32 & 0x0C) >> 2);
 
-	if (LFO_A > 4095)
-		LFO_A = LFO_A - 8192;
+		v_mcss = (u8)((value32 & 0xf0) >> 4);
+		bf = (u8)((value32 & 0x100) >> 8);
+		vrsv = (u8)((value32 & 0x200) >> 9);
+		vhtcrc8 = (u16)((value32 & 0x3fc00) >> 10);
+		v_tail = (u8)((value32 & 0xfc0000) >> 18);
 
-	if (LFO_B > 4095)
-		LFO_B = LFO_B - 8192;
+		PDM_SNPF(out_len, used, output + used, out_len - used,
+			 "\r\n %-35s", "VHT-SIG-A2");
+		PDM_SNPF(out_len, used, output + used, out_len - used,
+			 "\r\n %-35s = %x / %x / %x / %x / %x / %x / %x",
+			 "SGI/FEC/MCS/BF/Rsv/CRC/tail",
+			 sgiext, fecext, v_mcss, bf, vrsv, vhtcrc8, v_tail);
 
-	if (LFO_C > 4095)
-		LFO_C = LFO_C - 8192;
+	/*@ [VHT SIG B] ====================================================*/
+		value32 = odm_get_bb_reg(dm, R_0xf34, MASKDWORD);
 
-	if (LFO_D > 4095)
-		LFO_D = LFO_D - 8192;
-	LFO_A = LFO_A * 312500 / 4096;
-	LFO_B = LFO_B * 312500 / 4096;
-	LFO_C = LFO_C * 312500 / 4096;
-	LFO_D = LFO_D * 312500 / 4096;
+		#if 0
+		v_length = (u16)(value32 & 0x1fffff);
+		vbrsv = (u8)((value32 & 0x600000) >> 21);
+		vb_tail = (u16)((value32 & 0x1f800000) >> 23);
+		vbcrc = (u8)((value32 & 0x80000000) >> 31);
+		#endif
 
-	PHYDM_SNPRINTF((output + used, out_len - used, "\r\n %-35s = %d / %d / %d /%d", "value SCFO(Hz) <A/B/C/D>", SFO_A, SFO_B, SFO_C, SFO_D));
-	PHYDM_SNPRINTF((output + used, out_len - used, "\r\n %-35s = %d / %d / %d /%d", "ACQ CFO(Hz) <A/B/C/D>", LFO_A, LFO_B, LFO_C, LFO_D));
+		PDM_SNPF(out_len, used, output + used, out_len - used,
+			 "\r\n %-35s", "VHT-SIG-B");
+		PDM_SNPF(out_len, used, output + used, out_len - used,
+			 "\r\n %-35s = %x",
+			 "Codeword", value32);
+
+		#if 0
+		PDM_SNPF(out_len, used, output + used, out_len - used,
+			 "\r\n %-35s = %x / %x / %x / %x",
+			 "length/Rsv/tail/CRC",
+			 v_length, vbrsv, vb_tail, vbcrc);
+		#endif
+	}
 
-	value32 = odm_get_bb_reg(p_dm, 0xd14, MASKDWORD);
-	value32_1 = odm_get_bb_reg(p_dm, 0xd54, MASKDWORD);
-	value32_2 = odm_get_bb_reg(p_dm, 0xd94, MASKDWORD);
-	value32_3 = odm_get_bb_reg(p_dm, 0xdd4, MASKDWORD);
+	*_used = used;
+	*_out_len = out_len;
+}
+#endif
 
-	LFO_A = (s32)(value32 >> 16);
-	LFO_B = (s32)(value32_1 >> 16);
-	LFO_C = (s32)(value32_2 >> 16);
-	LFO_D = (s32)(value32_3 >> 16);
+#ifdef PHYDM_IC_JGR3_SERIES_SUPPORT
+void phydm_bb_hw_dbg_info_jgr3(void *dm_void, u32 *_used, char *output,
+			       u32 *_out_len)
+{
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	u32 used = *_used;
+	u32 out_len = *_out_len;
+	char *tmp_string = NULL;
+	u8 rx_ht_bw = 0, rx_vht_bw = 0, rx_ht = 0;
+	static u8 v_rx_bw;
+	u32 value32 = 0;
+	u8 i = 0;
+	static u8 tail, parity, rsv, vrsv, smooth, htsound, agg;
+	static u8 stbc, vstbc, fec, fecext, sgi, sgiext, htltf, vgid, v_nsts;
+	static u8 vtxops, vrsv2, vbrsv, bf, vbcrc;
+	static u16 h_length, htcrc8, length;
+	static u16 vpaid;
+	static u16 v_length, vhtcrc8, v_mcss, v_tail, vb_tail;
+	static u8 hmcss, hrx_bw;
 
-	if (LFO_A > 4095)
-		LFO_A = LFO_A - 8192;
+	PDM_SNPF(out_len, used, output + used, out_len - used, "\r\n %-35s\n",
+		 "BB Report Info");
 
-	if (LFO_B > 4095)
-		LFO_B = LFO_B - 8192;
+	/*@ [Mode] =====================================================*/
 
-	if (LFO_C > 4095)
-		LFO_C = LFO_C - 8192;
+	value32 = odm_get_bb_reg(dm, R_0x2c20, MASKDWORD);
+	rx_ht = (u8)((value32 & 0xC0000) >> 18);
+	if (rx_ht == AD_VHT_MODE)
+		tmp_string = "VHT";
+	else if (rx_ht == AD_HT_MODE)
+		tmp_string = "HT";
+	else
+		tmp_string = "Legacy";
+
+	PDM_SNPF(out_len, used, output + used, out_len - used,
+		 "\r\n %-35s %s", "mode", tmp_string);
+	/*@ [RX counter Info] ===============================================*/
+
+	PDM_SNPF(out_len, used, output + used, out_len - used,
+		 "\r\n %-35s = %d", "CCK CCA cnt",
+		 odm_get_bb_reg(dm, R_0x2c08, 0xFFFF));
+
+	PDM_SNPF(out_len, used, output + used, out_len - used,
+		 "\r\n %-35s = %d", "OFDM CCA cnt",
+		 odm_get_bb_reg(dm, R_0x2c08, 0xFFFF0000));
+
+	PDM_SNPF(out_len, used, output + used, out_len - used,
+		 "\r\n %-35s = %d", "OFDM SBD Fail cnt",
+		 odm_get_bb_reg(dm, R_0x2d20, 0xFFFF0000));
+
+	PDM_SNPF(out_len, used, output + used, out_len - used,
+		 "\r\n %-35s = %d / %d",
+		 "LSIG (parity Fail/rate Illegal) cnt",
+		 odm_get_bb_reg(dm, R_0x2d04, 0xFFFF0000),
+		 odm_get_bb_reg(dm, R_0x2d08, 0xFFFF));
+
+	value32 = odm_get_bb_reg(dm, R_0x2d10, MASKDWORD);
+	PDM_SNPF(out_len, used, output + used, out_len - used,
+		 "\r\n %-35s = %d / %d", "HT/VHT MCS NOT SUPPORT cnt",
+		 value32 & 0xFFFF, ((value32 & 0xFFFF0000) >> 16));
+
+	value32 = odm_get_bb_reg(dm, R_0x2d0c, MASKDWORD);
+	PDM_SNPF(out_len, used, output + used, out_len - used,
+		 "\r\n %-35s = %d / %d", "VHT SIGA/SIGB CRC8 Fail cnt",
+		 value32 & 0xFFFF, ((value32 & 0xFFFF0000) >> 16));
+	/*@ [L-SIG Content] =================================================*/
+	value32 = odm_get_bb_reg(dm, R_0x2c20, MASKDWORD);
+
+	parity = (u8)((value32 & 0x20000) >> 17);/*@[17]*/
+	length = (u16)((value32 & 0x1ffe0) >> 5);/*@[16:5]*/
+	rsv = (u8)((value32 & 0x10) >> 4);/*@[4]*/
+
+	PDM_SNPF(out_len, used, output + used, out_len - used, "\r\n %-35s",
+		 "L-SIG");
+	PDM_SNPF(out_len, used, output + used, out_len - used,
+		 "\r\n %-35s = %d M", "rate",
+		 phydm_get_l_sig_rate(dm, (u8)(value32 & 0x0f)));
+
+	PDM_SNPF(out_len, used, output + used, out_len - used,
+		 "\r\n %-35s = %x / %d / %d", "Rsv/length/parity", rsv, length,
+		 parity);
+
+	if (rx_ht == AD_HT_MODE) {
+	/*@ [HT SIG 1] ======================================================*/
+		value32 = odm_get_bb_reg(dm, R_0x2c2c, MASKDWORD);
+
+		hmcss = (u8)(value32 & 0x7F);
+		hrx_bw = (u8)((value32 & 0x80) >> 7);
+		h_length = (u16)((value32 & 0x0fff00) >> 8);
+
+		PDM_SNPF(out_len, used, output + used, out_len - used,
+			 "\r\n %-35s", "HT-SIG1");
+		PDM_SNPF(out_len, used, output + used, out_len - used,
+			 "\r\n %-35s = %d / %d / %d", "MCS/BW/length",
+			 hmcss, hrx_bw, h_length);
+	/*@ [HT SIG 2] ======================================================*/
+		value32 = odm_get_bb_reg(dm, R_0x2c30, MASKDWORD);
+		smooth = (u8)(value32 & 0x01);
+		htsound = (u8)((value32 & 0x02) >> 1);
+		rsv = (u8)((value32 & 0x04) >> 2);
+		agg = (u8)((value32 & 0x08) >> 3);
+		stbc = (u8)((value32 & 0x30) >> 4);
+		fec = (u8)((value32 & 0x40) >> 6);
+		sgi = (u8)((value32 & 0x80) >> 7);
+		htltf = (u8)((value32 & 0x300) >> 8);
+		htcrc8 = (u16)((value32 & 0x3fc00) >> 10);
+		tail = (u8)((value32 & 0xfc0000) >> 18);
+
+		PDM_SNPF(out_len, used, output + used, out_len - used,
+			 "\r\n %-35s",
+			 "HT-SIG2");
+		PDM_SNPF(out_len, used, output + used, out_len - used,
+			 "\r\n %-35s = %x / %x / %x / %x / %x / %x",
+			 "Smooth/NoSound/Rsv/Aggregate/STBC/LDPC",
+			 smooth, htsound, rsv, agg, stbc, fec);
+		PDM_SNPF(out_len, used, output + used, out_len - used,
+			 "\r\n %-35s = %x / %x / %x / %x",
+			 "SGI/E-HT-LTFs/CRC/tail",
+			 sgi, htltf, htcrc8, tail);
+	} else if (rx_ht == AD_VHT_MODE) {
+	/*@ [VHT SIG A1] ====================================================*/
+		value32 = odm_get_bb_reg(dm, R_0x2c2c, MASKDWORD);
 
-	if (LFO_D > 4095)
-		LFO_D = LFO_D - 8192;
+		v_rx_bw = (u8)(value32 & 0x03);
+		vrsv = (u8)((value32 & 0x04) >> 2);
+		vstbc = (u8)((value32 & 0x08) >> 3);
+		vgid = (u8)((value32 & 0x3f0) >> 4);
+		v_nsts = (u8)(((value32 & 0x1c00) >> 10) + 1);
+		vpaid = (u16)((value32 & 0x3fe000) >> 13);
+		vtxops = (u8)((value32 & 0x400000) >> 22);
+		vrsv2 = (u8)((value32 & 0x800000) >> 23);
+
+		PDM_SNPF(out_len, used, output + used, out_len - used,
+			 "\r\n %-35s",
+			 "VHT-SIG-A1");
+		PDM_SNPF(out_len, used, output + used, out_len - used,
+			 "\r\n %-35s = %x / %x / %x / %x / %x / %x / %x / %x",
+			 "BW/Rsv1/STBC/GID/Nsts/PAID/TXOPPS/Rsv2", v_rx_bw,
+			 vrsv, vstbc, vgid, v_nsts, vpaid, vtxops, vrsv2);
+
+	/*@ [VHT SIG A2] ====================================================*/
+		value32 = odm_get_bb_reg(dm, R_0x2c30, MASKDWORD);
+
+		/* @sgi=(u8)(value32&0x01); */
+		sgiext = (u8)(value32 & 0x03);
+		/* @fec = (u8)(value32&0x04); */
+		fecext = (u8)((value32 & 0x0C) >> 2);
 
-	LFO_A = LFO_A * 312500 / 4096;
-	LFO_B = LFO_B * 312500 / 4096;
-	LFO_C = LFO_C * 312500 / 4096;
-	LFO_D = LFO_D * 312500 / 4096;
+		v_mcss = (u8)((value32 & 0xf0) >> 4);
+		bf = (u8)((value32 & 0x100) >> 8);
+		vrsv = (u8)((value32 & 0x200) >> 9);
+		vhtcrc8 = (u16)((value32 & 0x3fc00) >> 10);
+		v_tail = (u8)((value32 & 0xfc0000) >> 18);
+
+		PDM_SNPF(out_len, used, output + used, out_len - used,
+			 "\r\n %-35s", "VHT-SIG-A2");
+		PDM_SNPF(out_len, used, output + used, out_len - used,
+			 "\r\n %-35s = %x / %x / %x / %x / %x / %x / %x",
+			 "SGI/FEC/MCS/BF/Rsv/CRC/tail",
+			 sgiext, fecext, v_mcss, bf, vrsv, vhtcrc8, v_tail);
+
+	/*@ [VHT SIG B] ====================================================*/
+		value32 = odm_get_bb_reg(dm, R_0x2c34, MASKDWORD);
+
+		PDM_SNPF(out_len, used, output + used, out_len - used,
+			 "\r\n %-35s", "VHT-SIG-B");
+		PDM_SNPF(out_len, used, output + used, out_len - used,
+			 "\r\n %-35s = %x",
+			 "Codeword", value32);
+
+		if (v_rx_bw == 0) {
+			v_length = (u16)(value32 & 0x1ffff);
+			vbrsv = (u8)((value32 & 0xE0000) >> 17);
+			vb_tail = (u16)((value32 & 0x03F00000) >> 20);
+		} else if (v_rx_bw == 1) {
+			v_length = (u16)(value32 & 0x7FFFF);
+			vbrsv = (u8)((value32 & 0x180000) >> 19);
+			vb_tail = (u16)((value32 & 0x07E00000) >> 21);
+		} else if (v_rx_bw == 2) {
+			v_length = (u16)(value32 & 0x1fffff);
+			vbrsv = (u8)((value32 & 0x600000) >> 21);
+			vb_tail = (u16)((value32 & 0x1f800000) >> 23);
+		}
+		vbcrc = (u8)((value32 & 0x80000000) >> 31);
 
-	PHYDM_SNPRINTF((output + used, out_len - used, "\r\n %-35s = %d / %d / %d /%d", "End CFO(Hz) <A/B/C/D>", LFO_A, LFO_B, LFO_C, LFO_D));
+		PDM_SNPF(out_len, used, output + used, out_len - used,
+			 "\r\n %-35s = %x / %x / %x / %x",
+			 "length/Rsv/tail/CRC",
+			 v_length, vbrsv, vb_tail, vbcrc);
+	}
 
-	value32 = odm_get_bb_reg(p_dm, 0xf20, MASKDWORD);  /*L SIG*/
+	*_used = used;
+	*_out_len = out_len;
+}
+#endif
 
-	tail = (u8)((value32 & 0xfc0000) >> 16);
-	parity = (u8)((value32 & 0x20000) >> 16);
-	length = (u16)((value32 & 0x1ffe00) >> 8);
-	rsv = (u8)(value32 & 0x10);
-	MCSS = (u8)(value32 & 0x0f);
+u8 phydm_get_l_sig_rate(void *dm_void, u8 rate_idx_l_sig)
+{
+	u8 rate_idx = 0xff;
 
-	switch (MCSS) {
+	switch (rate_idx_l_sig) {
 	case 0x0b:
-		idx = 0;
+		rate_idx = 6;
 		break;
 	case 0x0f:
-		idx = 1;
+		rate_idx = 9;
 		break;
 	case 0x0a:
-		idx = 2;
+		rate_idx = 12;
 		break;
 	case 0x0e:
-		idx = 3;
+		rate_idx = 18;
 		break;
 	case 0x09:
-		idx = 4;
+		rate_idx = 24;
+		break;
+	case 0x0d:
+		rate_idx = 36;
 		break;
 	case 0x08:
-		idx = 5;
+		rate_idx = 48;
 		break;
 	case 0x0c:
-		idx = 6;
+		rate_idx = 54;
 		break;
 	default:
-		idx = 6;
+		rate_idx = 0xff;
 		break;
-
 	}
 
-	PHYDM_SNPRINTF((output + used, out_len - used, "\r\n %-35s", "L-SIG"));
-	PHYDM_SNPRINTF((output + used, out_len - used, "\r\n %-35s : %s", "rate", L_rate[idx]));
-	PHYDM_SNPRINTF((output + used, out_len - used, "\r\n %-35s = %x / %x / %x", "Rsv/length/parity", rsv, RX_BW, length));
+	return rate_idx;
+}
+
+void phydm_bb_hw_dbg_info(void *dm_void, char input[][16], u32 *_used,
+			  char *output, u32 *_out_len)
+{
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	u32 used = *_used;
+	u32 out_len = *_out_len;
 
-	value32 = odm_get_bb_reg(p_dm, 0xf2c, MASKDWORD);  /*HT SIG*/
-	if (RX_HT == 1) {
+	switch (dm->ic_ip_series) {
+	#if (ODM_IC_11N_SERIES_SUPPORT)
+	case PHYDM_IC_N:
+		phydm_bb_hw_dbg_info_n(dm, &used, output, &out_len);
+		break;
+	#endif
 
-		HMCSS = (u8)(value32 & 0x7F);
-		HRX_BW = (u8)(value32 & 0x80);
-		h_length = (u16)((value32 >> 8) & 0xffff);
+	#if (ODM_IC_11AC_SERIES_SUPPORT)
+	case PHYDM_IC_AC:
+		phydm_bb_hw_dbg_info_ac(dm, &used, output, &out_len);
+		phydm_reset_bb_hw_cnt(dm);
+		#if (RTL8822B_SUPPORT)
+		phydm_bb_hw_dbg_info_8822b(dm, &used, output, &out_len);
+		#endif
+		break;
+	#endif
+
+	#ifdef PHYDM_IC_JGR3_SERIES_SUPPORT
+	case PHYDM_IC_JGR3:
+		phydm_bb_hw_dbg_info_jgr3(dm, &used, output, &out_len);
+		phydm_reset_bb_hw_cnt(dm);
+		break;
+	#endif
+	default:
+		break;
 	}
-	PHYDM_SNPRINTF((output + used, out_len - used, "\r\n %-35s", "HT-SIG1"));
-	PHYDM_SNPRINTF((output + used, out_len - used, "\r\n %-35s = %x / %x / %x", "MCS/BW/length", HMCSS, HRX_BW, h_length));
 
-	value32 = odm_get_bb_reg(p_dm, 0xf30, MASKDWORD);  /*HT SIG*/
+	*_used = used;
+	*_out_len = out_len;
+}
 
-	if (RX_HT == 1) {
-		smooth = (u8)(value32 & 0x01);
-		htsound = (u8)(value32 & 0x02);
-		rsv = (u8)(value32 & 0x04);
-		agg = (u8)(value32 & 0x08);
-		stbc = (u8)(value32 & 0x30);
-		fec = (u8)(value32 & 0x40);
-		sgi = (u8)(value32 & 0x80);
-		htltf = (u8)((value32 & 0x300) >> 8);
-		htcrc8 = (u16)((value32 & 0x3fc00) >> 8);
-		tail = (u8)((value32 & 0xfc0000) >> 16);
+#endif /*@#ifdef CONFIG_PHYDM_DEBUG_FUNCTION*/
+
+#if (DM_ODM_SUPPORT_TYPE & ODM_WIN)
+
+void phydm_dm_summary_cli_win(void *dm_void, char *buf, u8 macid)
+{
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct phydm_dig_struct *dig_t = &dm->dm_dig_table;
+	struct phydm_cfo_track_struct *cfo_t = &dm->dm_cfo_track;
+	struct cmn_sta_info *sta = NULL;
+	struct ra_sta_info *ra = NULL;
+	struct dtp_info *dtp = NULL;
+	u64 comp = dm->support_ability;
+	u64 pause_comp = dm->pause_ability;
+
+	if (!dm->is_linked) {
+		RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE, "[%s]No Link !!!\n", __func__);
+		RT_PRINT(buf);
+		return;
 	}
-	PHYDM_SNPRINTF((output + used, out_len - used, "\r\n %-35s", "HT-SIG2"));
-	PHYDM_SNPRINTF((output + used, out_len - used, "\r\n %-35s = %x / %x / %x / %x / %x / %x", "Smooth/NoSound/Rsv/Aggregate/STBC/LDPC", smooth, htsound, rsv, agg, stbc, fec));
-	PHYDM_SNPRINTF((output + used, out_len - used, "\r\n %-35s = %x / %x / %x / %x", "SGI/E-HT-LTFs/CRC/tail", sgi, htltf, htcrc8, tail));
 
-	value32 = odm_get_bb_reg(p_dm, 0xf2c, MASKDWORD);  /*VHT SIG A1*/
-	if (RX_HT == 2) {
-		/* value32 = odm_get_bb_reg(p_dm, 0xf2c,MASKDWORD);*/
-		v_rx_bw = (u8)(value32 & 0x03);
-		vrsv = (u8)(value32 & 0x04);
-		vstbc = (u8)(value32 & 0x08);
-		vgid = (u8)((value32 & 0x3f0) >> 4);
-		v_nsts = (u8)(((value32 & 0x1c00) >> 8) + 1);
-		vpaid = (u16)(value32 & 0x3fe);
-		vtxops = (u8)((value32 & 0x400000) >> 20);
-		vrsv2 = (u8)((value32 & 0x800000) >> 20);
+	RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE, "00.(%s) %-12s: IGI=0x%x, Dyn_Rng=0x%x~0x%x, FA_th={%d,%d,%d}\n",
+		   ((comp & ODM_BB_DIG) ?
+		   ((pause_comp & ODM_BB_DIG) ? "P" : "V") : "."),
+		   "DIG",
+		   dig_t->cur_ig_value,
+		   dig_t->rx_gain_range_min, dig_t->rx_gain_range_max,
+		   dig_t->fa_th[0], dig_t->fa_th[1], dig_t->fa_th[2]);
+        RT_PRINT(buf);
+
+	sta = dm->phydm_sta_info[macid];
+	if (is_sta_active(sta)) {
+		RT_PRINT(buf);
+
+		ra = &sta->ra_info;
+		dtp = &sta->dtp_stat;
+
+		RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE, "01.(%s) %-12s: rssi_lv=%d, mask=0x%llx\n",
+			   ((comp & ODM_BB_RA_MASK) ?
+			   ((pause_comp & ODM_BB_RA_MASK) ? "P" : "V") : "."),
+			   "RaMask",
+			   ra->rssi_level, ra->ramask);
+		RT_PRINT(buf);
+
+		#ifdef CONFIG_DYNAMIC_TX_TWR
+		RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE, "02.(%s) %-12s: pwr_lv=%d\n",
+			   ((comp & ODM_BB_DYNAMIC_TXPWR) ?
+			   ((pause_comp & ODM_BB_DYNAMIC_TXPWR) ? "P" : "V") : "."),
+			   "DynTxPwr",
+			   dtp->sta_tx_high_power_lvl);
+		RT_PRINT(buf);
+		#endif
 	}
-	PHYDM_SNPRINTF((output + used, out_len - used, "\r\n %-35s", "VHT-SIG-A1"));
-	PHYDM_SNPRINTF((output + used, out_len - used, "\r\n %-35s = %x / %x / %x / %x / %x / %x / %x / %x", "BW/Rsv1/STBC/GID/Nsts/PAID/TXOPPS/Rsv2", v_rx_bw, vrsv, vstbc, vgid, v_nsts, vpaid, vtxops, vrsv2));
 
-	value32 = odm_get_bb_reg(p_dm, 0xf30, MASKDWORD);  /*VHT SIG*/
+	RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE, "05.(%s) %-12s: cck_pd_lv=%d\n",
+		   ((comp & ODM_BB_CCK_PD) ?
+		   ((pause_comp & ODM_BB_CCK_PD) ? "P" : "V") : "."),
+		   "CCK_PD", dm->dm_cckpd_table.cck_pd_lv);
+	RT_PRINT(buf);
+
+#ifdef CONFIG_PHYDM_ANTENNA_DIVERSITY
+	RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE, "06.(%s) %-12s: div_type=%d, curr_ant=%s\n",
+		   ((comp & ODM_BB_ANT_DIV) ?
+		   ((pause_comp & ODM_BB_ANT_DIV) ? "P" : "V") : "."),
+		   "ANT_DIV",
+		   dm->ant_div_type,
+		   (dm->dm_fat_table.rx_idle_ant == MAIN_ANT) ? "MAIN" : "AUX");
+	RT_PRINT(buf);
+#endif
 
-	if (RX_HT == 2) {
-		/*value32 = odm_get_bb_reg(p_dm, 0xf30,MASKDWORD); */  /*VHT SIG*/
+#ifdef PHYDM_POWER_TRAINING_SUPPORT
+	RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE, "08.(%s) %-12s: PT_score=%d, disable_PT=%d\n",
+		   ((comp & ODM_BB_PWR_TRAIN) ?
+		   ((pause_comp & ODM_BB_PWR_TRAIN) ? "P" : "V") : "."),
+		   "PwrTrain",
+		   dm->pow_train_table.pow_train_score,
+		   dm->is_disable_power_training);
+	RT_PRINT(buf);
+#endif
 
-		/* sgi=(u8)(value32&0x01); */
-		sgiext = (u8)(value32 & 0x03);
-		/* fec = (u8)(value32&0x04); */
-		fecext = (u8)(value32 & 0x0C);
+#ifdef CONFIG_PHYDM_DFS_MASTER
+	RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE, "11.(%s) %-12s: dbg_mode=%d, region_domain=%d\n",
+		   ((comp & ODM_BB_DFS) ?
+		   ((pause_comp & ODM_BB_DFS) ? "P" : "V") : "."),
+		   "DFS",
+		   dm->dfs.dbg_mode, dm->dfs_region_domain);
+	RT_PRINT(buf);
+#endif
+#ifdef PHYDM_SUPPORT_ADAPTIVITY
+	RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE, "13.(%s) %-12s: th{l2h, h2l}={%d, %d}, edcca_flag=%d\n",
+		   ((comp & ODM_BB_ADAPTIVITY) ?
+		   ((pause_comp & ODM_BB_ADAPTIVITY) ? "P" : "V") : "."),
+		   "Adaptivity",
+		   dm->adaptivity.th_l2h, dm->adaptivity.th_h2l,
+		   dm->false_alm_cnt.edcca_flag);
+	RT_PRINT(buf);
+#endif
+	RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE, "14.(%s) %-12s: CFO_avg=%d kHz, CFO_traking=%s%d\n",
+		   ((comp & ODM_BB_CFO_TRACKING) ?
+		   ((pause_comp & ODM_BB_CFO_TRACKING) ? "P" : "V") : "."),
+		   "CfoTrack",
+		   cfo_t->CFO_ave_pre,
+		   ((cfo_t->crystal_cap > cfo_t->def_x_cap) ? "+" : "-"),
+		   DIFF_2(cfo_t->crystal_cap, cfo_t->def_x_cap));
+	RT_PRINT(buf);
+
+	RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE, "15.(%s) %-12s: ratio{nhm, clm}={%d, %d}\n",
+		   ((comp & ODM_BB_ENV_MONITOR) ?
+		   ((pause_comp & ODM_BB_ENV_MONITOR) ? "P" : "V") : "."),
+		   "EnvMntr",
+		   dm->dm_ccx_info.nhm_ratio, dm->dm_ccx_info.clm_ratio);
+	RT_PRINT(buf);
+#ifdef PHYDM_PRIMARY_CCA
+	RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE, "16.(%s) %-12s: CCA @ (%s SB)\n",
+		   ((comp & ODM_BB_PRIMARY_CCA) ?
+		   ((pause_comp & ODM_BB_PRIMARY_CCA) ? "P" : "V") : "."),
+		   "PriCCA",
+		   ((dm->dm_pri_cca.mf_state == MF_USC_LSC) ? "D" :
+		   ((dm->dm_pri_cca.mf_state == MF_LSC) ? "L" : "U")));
+	RT_PRINT(buf);
+#endif
+#ifdef CONFIG_ADAPTIVE_SOML
+	RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE, "17.(%s) %-12s: soml_en = %s\n",
+		   ((comp & ODM_BB_ADAPTIVE_SOML) ?
+		   ((pause_comp & ODM_BB_ADAPTIVE_SOML) ? "P" : "V") : "."),
+		   "A-SOML",
+		   (dm->dm_soml_table.soml_last_state == SOML_ON) ?
+		   "ON" : "OFF");
+	RT_PRINT(buf);
+#endif
+#ifdef PHYDM_LNA_SAT_CHK_SUPPORT
+	RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE, "18.(%s) %-12s:\n",
+		   ((comp & ODM_BB_LNA_SAT_CHK) ?
+		   ((pause_comp & ODM_BB_LNA_SAT_CHK) ? "P" : "V") : "."),
+		   "LNA_SAT_CHK");
+	RT_PRINT(buf);
+#endif
+}
 
-		v_mcss = (u8)(value32 & 0xf0);
-		bf = (u8)((value32 & 0x100) >> 8);
-		vrsv = (u8)((value32 & 0x200) >> 8);
-		vhtcrc8 = (u16)((value32 & 0x3fc00) >> 8);
-		v_tail = (u8)((value32 & 0xfc0000) >> 16);
-	}
-	PHYDM_SNPRINTF((output + used, out_len - used, "\r\n %-35s", "VHT-SIG-A2"));
-	PHYDM_SNPRINTF((output + used, out_len - used, "\r\n %-35s = %x / %x / %x / %x / %x / %x / %x", "SGI/FEC/MCS/BF/Rsv/CRC/tail", sgiext, fecext, v_mcss, bf, vrsv, vhtcrc8, v_tail));
+void phydm_basic_dbg_msg_cli_win(void *dm_void, char *buf)
+{
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct phydm_fa_struct *fa_t = &dm->false_alm_cnt;
+	struct phydm_cfo_track_struct *cfo_t = &dm->dm_cfo_track;
+	struct odm_phy_dbg_info *dbg = &dm->phy_dbg_info;
+	struct phydm_phystatus_statistic *dbg_s = &dbg->physts_statistic_info;
+	struct phydm_phystatus_avg *dbg_avg = &dbg->phystatus_statistic_avg;
+	u8 macid, target_macid = 0;
+	u8 i = 0;
+	u8 rate_num = dm->num_rf_path;
+	u8 ss_ofst = 0;
+	struct cmn_sta_info *entry = NULL;
+	char dbg_buf[PHYDM_SNPRINT_SIZE] = {0};
+
+	RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE, "\r\n PHYDM Common Dbg Msg --------->");
+	RT_PRINT(buf);
+	RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE, "\r\n System up time=%d", dm->phydm_sys_up_time);
+	RT_PRINT(buf);
+
+	if (dm->is_linked) {
+		RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE, "\r\n ID=((%d)), BW=((%d)), fc=((CH-%d))",
+			   dm->curr_station_id, 20 << *dm->band_width, *dm->channel);
+		RT_PRINT(buf);
+
+		if (((*dm->channel <= 14) && (*dm->band_width == CHANNEL_WIDTH_40)) &&
+		    (dm->support_ic_type & ODM_IC_11N_SERIES)) {
+			RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE, "\r\n Primary CCA at ((%s SB))",
+				   (*dm->sec_ch_offset == SECOND_CH_AT_LSB) ? "U" : "L");
+			RT_PRINT(buf);
+		}
 
-	value32 = odm_get_bb_reg(p_dm, 0xf34, MASKDWORD);  /*VHT SIG*/
-	{
-		v_length = (u16)(value32 & 0x1fffff);
-		vbrsv = (u8)((value32 & 0x600000) >> 20);
-		vb_tail = (u16)((value32 & 0x1f800000) >> 20);
-		vbcrc = (u8)((value32 & 0x80000000) >> 28);
+		if ((dm->support_ic_type & PHYSTS_2ND_TYPE_IC) || dm->rx_rate > ODM_RATE11M) {
+			RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE, "\r\n [AGC Idx] {0x%x, 0x%x, 0x%x, 0x%x}",
+				   dm->ofdm_agc_idx[0], dm->ofdm_agc_idx[1],
+				   dm->ofdm_agc_idx[2], dm->ofdm_agc_idx[3]);
+			RT_PRINT(buf);
+		} else {
+			RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE, "\r\n [CCK AGC Idx] {LNA,VGA}={0x%x, 0x%x}",
+				   dm->cck_lna_idx, dm->cck_vga_idx);
+			RT_PRINT(buf);
+		}
 
-	}
-	PHYDM_SNPRINTF((output + used, out_len - used, "\r\n %-35s", "VHT-SIG-B"));
-	PHYDM_SNPRINTF((output + used, out_len - used, "\r\n %-35s = %x / %x / %x / %x", "length/Rsv/tail/CRC", v_length, vbrsv, vb_tail, vbcrc));
+		phydm_print_rate_2_buff(dm, dm->rx_rate, dbg_buf, PHYDM_SNPRINT_SIZE);
+		RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE, "\r\n RSSI:{%d, %d, %d, %d}, RxRate:%s (0x%x)",
+			   (dm->rssi_a == 0xff) ? 0 : dm->rssi_a,
+			   (dm->rssi_b == 0xff) ? 0 : dm->rssi_b,
+			   (dm->rssi_c == 0xff) ? 0 : dm->rssi_c,
+			   (dm->rssi_d == 0xff) ? 0 : dm->rssi_d,
+			  dbg_buf, dm->rx_rate);
+		RT_PRINT(buf);
+
+		phydm_print_rate_2_buff(dm, dm->phy_dbg_info.beacon_phy_rate, dbg_buf, PHYDM_SNPRINT_SIZE);
+		RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE, "\r\n Beacon_cnt=%d, rate_idx:%s (0x%x)",
+			   dm->phy_dbg_info.beacon_cnt_in_period,
+			   dbg_buf,
+			   dm->phy_dbg_info.beacon_phy_rate);
+		RT_PRINT(buf);
+
+		/*Show phydm_rx_rate_distribution;*/
+		RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE, "\r\n [RxRate Cnt] =============>");
+		RT_PRINT(buf);
+
+		/*@======CCK=================================================*/
+		if (*dm->channel <= 14) {
+			RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE, "\r\n * CCK = {%d, %d, %d, %d}",
+				   dbg->num_qry_legacy_pkt[0], dbg->num_qry_legacy_pkt[1],
+				   dbg->num_qry_legacy_pkt[2], dbg->num_qry_legacy_pkt[3]);
+			RT_PRINT(buf);
+		}
+		/*@======OFDM================================================*/
+		RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE, "\r\n * OFDM = {%d, %d, %d, %d, %d, %d, %d, %d}",
+			   dbg->num_qry_legacy_pkt[4], dbg->num_qry_legacy_pkt[5],
+			   dbg->num_qry_legacy_pkt[6], dbg->num_qry_legacy_pkt[7],
+			   dbg->num_qry_legacy_pkt[8], dbg->num_qry_legacy_pkt[9],
+			   dbg->num_qry_legacy_pkt[10], dbg->num_qry_legacy_pkt[11]);
+		RT_PRINT(buf);
+
+		/*@======HT==================================================*/
+		if (dbg->ht_pkt_not_zero) {
+			for (i = 0; i < rate_num; i++) {
+				ss_ofst = (i << 3);
+
+				RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE, "\r\n * HT MCS[%d :%d ] = {%d, %d, %d, %d, %d, %d, %d, %d}",
+					   (ss_ofst), (ss_ofst + 7),
+					   dbg->num_qry_ht_pkt[ss_ofst + 0], dbg->num_qry_ht_pkt[ss_ofst + 1],
+					   dbg->num_qry_ht_pkt[ss_ofst + 2], dbg->num_qry_ht_pkt[ss_ofst + 3],
+					   dbg->num_qry_ht_pkt[ss_ofst + 4], dbg->num_qry_ht_pkt[ss_ofst + 5],
+					   dbg->num_qry_ht_pkt[ss_ofst + 6], dbg->num_qry_ht_pkt[ss_ofst + 7]);
+				RT_PRINT(buf);
+			}
 
-	/*for Condition number*/
-	if (p_dm->support_ic_type & ODM_RTL8822B) {
-		s32	condition_num = 0;
-		char *factor = NULL;
+			if (dbg->low_bw_20_occur) {
+				for (i = 0; i < rate_num; i++) {
+					ss_ofst = (i << 3);
+
+					RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE, "\r\n * [Low BW 20M] HT MCS[%d :%d ] = {%d, %d, %d, %d, %d, %d, %d, %d}",
+						   (ss_ofst), (ss_ofst + 7),
+						   dbg->num_qry_pkt_sc_20m[ss_ofst + 0], dbg->num_qry_pkt_sc_20m[ss_ofst + 1],
+						   dbg->num_qry_pkt_sc_20m[ss_ofst + 2], dbg->num_qry_pkt_sc_20m[ss_ofst + 3],
+						   dbg->num_qry_pkt_sc_20m[ss_ofst + 4], dbg->num_qry_pkt_sc_20m[ss_ofst + 5],
+						   dbg->num_qry_pkt_sc_20m[ss_ofst + 6], dbg->num_qry_pkt_sc_20m[ss_ofst + 7]);
+					RT_PRINT(buf);
+				}
+			}
+		}
 
-		odm_set_bb_reg(p_dm, 0x1988, BIT(22), 0x1);	/*enable report condition number*/
+#if (ODM_IC_11AC_SERIES_SUPPORT || defined(PHYDM_IC_JGR3_SERIES_SUPPORT))
+		/*@======VHT=================================================*/
+		if (dbg->vht_pkt_not_zero) {
+			for (i = 0; i < rate_num; i++) {
+				ss_ofst = 10 * i;
+
+				RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE, "\r\n * VHT-%d ss MCS[0:9] = {%d, %d, %d, %d, %d, %d, %d, %d, %d, %d}",
+					   (i + 1),
+					   dbg->num_qry_vht_pkt[ss_ofst + 0], dbg->num_qry_vht_pkt[ss_ofst + 1],
+					   dbg->num_qry_vht_pkt[ss_ofst + 2], dbg->num_qry_vht_pkt[ss_ofst + 3],
+					   dbg->num_qry_vht_pkt[ss_ofst + 4], dbg->num_qry_vht_pkt[ss_ofst + 5],
+					   dbg->num_qry_vht_pkt[ss_ofst + 6], dbg->num_qry_vht_pkt[ss_ofst + 7],
+					   dbg->num_qry_vht_pkt[ss_ofst + 8], dbg->num_qry_vht_pkt[ss_ofst + 9]);
+				RT_PRINT(buf);
+			}
 
-		condition_num = odm_get_bb_reg(p_dm, 0xf84, MASKDWORD);
-		condition_num = (condition_num & 0x3ffff) >> 4;
+			if (dbg->low_bw_20_occur) {
+				for (i = 0; i < rate_num; i++) {
+					ss_ofst = 10 * i;
+
+					RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE, "\r\n *[Low BW 20M] VHT-%d ss MCS[0:9] = {%d, %d, %d, %d, %d, %d, %d, %d, %d, %d}",
+						   (i + 1),
+						   dbg->num_qry_pkt_sc_20m[ss_ofst + 0], dbg->num_qry_pkt_sc_20m[ss_ofst + 1],
+						   dbg->num_qry_pkt_sc_20m[ss_ofst + 2], dbg->num_qry_pkt_sc_20m[ss_ofst + 3],
+						   dbg->num_qry_pkt_sc_20m[ss_ofst + 4], dbg->num_qry_pkt_sc_20m[ss_ofst + 5],
+						   dbg->num_qry_pkt_sc_20m[ss_ofst + 6], dbg->num_qry_pkt_sc_20m[ss_ofst + 7],
+						   dbg->num_qry_pkt_sc_20m[ss_ofst + 8], dbg->num_qry_pkt_sc_20m[ss_ofst + 9]);
+					RT_PRINT(buf);
+				}
+			}
 
-		if (*p_dm->p_band_width == CHANNEL_WIDTH_80)
-			factor = "256/234";
-		else if (*p_dm->p_band_width == CHANNEL_WIDTH_40)
-			factor = "128/108";
-		else if (*p_dm->p_band_width == CHANNEL_WIDTH_20) {
-			if (RX_HT != 2 || RX_HT != 1)
-				factor = "64/52";	/*HT or VHT*/
-			else
-				factor = "64/48";	/*legacy*/
+			if (dbg->low_bw_40_occur) {
+				for (i = 0; i < rate_num; i++) {
+					ss_ofst = 10 * i;
+
+					RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE, "\r\n *[Low BW 40M] VHT-%d ss MCS[0:9] = {%d, %d, %d, %d, %d, %d, %d, %d, %d, %d}",
+						   (i + 1),
+						   dbg->num_qry_pkt_sc_40m[ss_ofst + 0], dbg->num_qry_pkt_sc_40m[ss_ofst + 1],
+						   dbg->num_qry_pkt_sc_40m[ss_ofst + 2], dbg->num_qry_pkt_sc_40m[ss_ofst + 3],
+						   dbg->num_qry_pkt_sc_40m[ss_ofst + 4], dbg->num_qry_pkt_sc_40m[ss_ofst + 5],
+						   dbg->num_qry_pkt_sc_40m[ss_ofst + 6], dbg->num_qry_pkt_sc_40m[ss_ofst + 7],
+						   dbg->num_qry_pkt_sc_40m[ss_ofst + 8], dbg->num_qry_pkt_sc_40m[ss_ofst + 9]);
+					RT_PRINT(buf);
+				}
+			}
+		}
+#endif
+
+		phydm_reset_rx_rate_distribution(dm);
+
+		//1 Show phydm_avg_phystatus_val
+		RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE, "\r\n [Avg PHY Statistic] ==============>");
+		RT_PRINT(buf);
+
+		phydm_reset_phystatus_avg(dm);
+
+		/*@CCK*/
+		dbg_avg->rssi_cck_avg = (u8)((dbg_s->rssi_cck_cnt != 0) ? (dbg_s->rssi_cck_sum / dbg_s->rssi_cck_cnt) : 0);
+		RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE, "\r\n * cck Cnt= ((%d)) RSSI:{%d}",
+			   dbg_s->rssi_cck_cnt, dbg_avg->rssi_cck_avg);
+		RT_PRINT(buf);
+
+		/*OFDM*/
+		if (dbg_s->rssi_ofdm_cnt != 0) {
+			dbg_avg->rssi_ofdm_avg = (u8)(dbg_s->rssi_ofdm_sum / dbg_s->rssi_ofdm_cnt);
+			dbg_avg->evm_ofdm_avg = (u8)(dbg_s->evm_ofdm_sum / dbg_s->rssi_ofdm_cnt);
+			dbg_avg->snr_ofdm_avg = (u8)(dbg_s->snr_ofdm_sum / dbg_s->rssi_ofdm_cnt);
+		}
+
+		RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE, "\r\n * ofdm Cnt= ((%d)) RSSI:{%d} EVM:{%d} SNR:{%d}",
+			   dbg_s->rssi_ofdm_cnt, dbg_avg->rssi_ofdm_avg,
+			   dbg_avg->evm_ofdm_avg, dbg_avg->snr_ofdm_avg);
+		RT_PRINT(buf);
+
+		if (dbg_s->rssi_1ss_cnt != 0) {
+			dbg_avg->rssi_1ss_avg = (u8)(dbg_s->rssi_1ss_sum / dbg_s->rssi_1ss_cnt);
+			dbg_avg->evm_1ss_avg = (u8)(dbg_s->evm_1ss_sum / dbg_s->rssi_1ss_cnt);
+			dbg_avg->snr_1ss_avg = (u8)(dbg_s->snr_1ss_sum / dbg_s->rssi_1ss_cnt);
+		}
+
+		RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE, "\r\n * 1-ss Cnt= ((%d)) RSSI:{%d} EVM:{%d} SNR:{%d}",
+			   dbg_s->rssi_1ss_cnt, dbg_avg->rssi_1ss_avg,
+			   dbg_avg->evm_1ss_avg, dbg_avg->snr_1ss_avg);
+		RT_PRINT(buf);
+
+#if (defined(PHYDM_COMPILE_ABOVE_2SS))
+		if (dm->support_ic_type & (PHYDM_IC_ABOVE_2SS)) {
+			if (dbg_s->rssi_2ss_cnt != 0) {
+				dbg_avg->rssi_2ss_avg[0] = (u8)(dbg_s->rssi_2ss_sum[0] / dbg_s->rssi_2ss_cnt);
+				dbg_avg->rssi_2ss_avg[1] = (u8)(dbg_s->rssi_2ss_sum[1] / dbg_s->rssi_2ss_cnt);
+
+				dbg_avg->evm_2ss_avg[0] = (u8)(dbg_s->evm_2ss_sum[0] / dbg_s->rssi_2ss_cnt);
+				dbg_avg->evm_2ss_avg[1] = (u8)(dbg_s->evm_2ss_sum[1] / dbg_s->rssi_2ss_cnt);
+
+				dbg_avg->snr_2ss_avg[0] = (u8)(dbg_s->snr_2ss_sum[0] / dbg_s->rssi_2ss_cnt);
+				dbg_avg->snr_2ss_avg[1] = (u8)(dbg_s->snr_2ss_sum[1] / dbg_s->rssi_2ss_cnt);
+			}
+
+			RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE, "\r\n * 2-ss Cnt= ((%d)) RSSI:{%d, %d}, EVM:{%d, %d}, SNR:{%d, %d}",
+				   dbg_s->rssi_2ss_cnt, dbg_avg->rssi_2ss_avg[0],
+				   dbg_avg->rssi_2ss_avg[1], dbg_avg->evm_2ss_avg[0],
+				   dbg_avg->evm_2ss_avg[1], dbg_avg->snr_2ss_avg[0],
+				   dbg_avg->snr_2ss_avg[1]);
+			RT_PRINT(buf);
+		}
+#endif
+
+#if (defined(PHYDM_COMPILE_ABOVE_3SS))
+		if (dm->support_ic_type & (PHYDM_IC_ABOVE_3SS)) {
+			if (dbg_s->rssi_3ss_cnt != 0) {
+				dbg_avg->rssi_3ss_avg[0] = (u8)(dbg_s->rssi_3ss_sum[0] / dbg_s->rssi_3ss_cnt);
+				dbg_avg->rssi_3ss_avg[1] = (u8)(dbg_s->rssi_3ss_sum[1] / dbg_s->rssi_3ss_cnt);
+				dbg_avg->rssi_3ss_avg[2] = (u8)(dbg_s->rssi_3ss_sum[2] / dbg_s->rssi_3ss_cnt);
+
+				dbg_avg->evm_3ss_avg[0] = (u8)(dbg_s->evm_3ss_sum[0] / dbg_s->rssi_3ss_cnt);
+				dbg_avg->evm_3ss_avg[1] = (u8)(dbg_s->evm_3ss_sum[1] / dbg_s->rssi_3ss_cnt);
+				dbg_avg->evm_3ss_avg[2] = (u8)(dbg_s->evm_3ss_sum[2] / dbg_s->rssi_3ss_cnt);
+
+				dbg_avg->snr_3ss_avg[0] = (u8)(dbg_s->snr_3ss_sum[0] / dbg_s->rssi_3ss_cnt);
+				dbg_avg->snr_3ss_avg[1] = (u8)(dbg_s->snr_3ss_sum[1] / dbg_s->rssi_3ss_cnt);
+				dbg_avg->snr_3ss_avg[2] = (u8)(dbg_s->snr_3ss_sum[2] / dbg_s->rssi_3ss_cnt);
+			}
+
+			RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE, "\r\n * 3-ss Cnt= ((%d)) RSSI:{%d, %d, %d} EVM:{%d, %d, %d} SNR:{%d, %d, %d}",
+				   dbg_s->rssi_3ss_cnt, dbg_avg->rssi_3ss_avg[0],
+				   dbg_avg->rssi_3ss_avg[1], dbg_avg->rssi_3ss_avg[2],
+				   dbg_avg->evm_3ss_avg[0], dbg_avg->evm_3ss_avg[1],
+				   dbg_avg->evm_3ss_avg[2], dbg_avg->snr_3ss_avg[0],
+				   dbg_avg->snr_3ss_avg[1], dbg_avg->snr_3ss_avg[2]);
+			RT_PRINT(buf);
+		}
+#endif
+
+#if (defined(PHYDM_COMPILE_ABOVE_4SS))
+		if (dm->support_ic_type & PHYDM_IC_ABOVE_4SS) {
+			if (dbg_s->rssi_4ss_cnt != 0) {
+				dbg_avg->rssi_4ss_avg[0] = (u8)(dbg_s->rssi_4ss_sum[0] / dbg_s->rssi_4ss_cnt);
+				dbg_avg->rssi_4ss_avg[1] = (u8)(dbg_s->rssi_4ss_sum[1] / dbg_s->rssi_4ss_cnt);
+				dbg_avg->rssi_4ss_avg[2] = (u8)(dbg_s->rssi_4ss_sum[2] / dbg_s->rssi_4ss_cnt);
+				dbg_avg->rssi_4ss_avg[3] = (u8)(dbg_s->rssi_4ss_sum[3] / dbg_s->rssi_4ss_cnt);
+
+				dbg_avg->evm_4ss_avg[0] = (u8)(dbg_s->evm_4ss_sum[0] / dbg_s->rssi_4ss_cnt);
+				dbg_avg->evm_4ss_avg[1] = (u8)(dbg_s->evm_4ss_sum[1] / dbg_s->rssi_4ss_cnt);
+				dbg_avg->evm_4ss_avg[2] = (u8)(dbg_s->evm_4ss_sum[2] / dbg_s->rssi_4ss_cnt);
+				dbg_avg->evm_4ss_avg[3] = (u8)(dbg_s->evm_4ss_sum[3] / dbg_s->rssi_4ss_cnt);
+
+				dbg_avg->snr_4ss_avg[0] = (u8)(dbg_s->snr_4ss_sum[0] / dbg_s->rssi_4ss_cnt);
+				dbg_avg->snr_4ss_avg[1] = (u8)(dbg_s->snr_4ss_sum[1] / dbg_s->rssi_4ss_cnt);
+				dbg_avg->snr_4ss_avg[2] = (u8)(dbg_s->snr_4ss_sum[2] / dbg_s->rssi_4ss_cnt);
+				dbg_avg->snr_4ss_avg[3] = (u8)(dbg_s->snr_4ss_sum[3] / dbg_s->rssi_4ss_cnt);
+			}
+
+			RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE, "\r\n * 4-ss Cnt= ((%d)) RSSI:{%d, %d, %d, %d} EVM:{%d, %d, %d, %d} SNR:{%d, %d, %d, %d}",
+				   dbg_s->rssi_4ss_cnt, dbg_avg->rssi_4ss_avg[0],
+				   dbg_avg->rssi_4ss_avg[1], dbg_avg->rssi_4ss_avg[2],
+				   dbg_avg->rssi_4ss_avg[3], dbg_avg->evm_4ss_avg[0],
+				   dbg_avg->evm_4ss_avg[1], dbg_avg->evm_4ss_avg[2],
+				   dbg_avg->evm_4ss_avg[3], dbg_avg->snr_4ss_avg[0],
+				   dbg_avg->snr_4ss_avg[1], dbg_avg->snr_4ss_avg[2],
+				   dbg_avg->snr_4ss_avg[3]);
+			RT_PRINT(buf);
+		}
+#endif
+		phydm_reset_phystatus_statistic(dm);
+		/*@----------------------------------------------------------*/
+
+		/*Print TX rate*/
+		for (macid = 0; macid < ODM_ASSOCIATE_ENTRY_NUM; macid++) {
+			entry = dm->phydm_sta_info[macid];
+
+			if (is_sta_active(entry)) {
+				phydm_print_rate_2_buff(dm, entry->ra_info.curr_tx_rate, dbg_buf, PHYDM_SNPRINT_SIZE);
+				RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE, "\r\n TxRate[%d]=%s (0x%x)", macid, dbg_buf, entry->ra_info.curr_tx_rate);
+				RT_PRINT(buf);
+				target_macid = macid;
+				break;
+			}
+		}
+
+		RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE,
+			   "\r\n TP {Tx, Rx, Total} = {%d, %d, %d}Mbps, Traffic_Load=(%d))",
+			   dm->tx_tp, dm->rx_tp, dm->total_tp, dm->traffic_load);
+		RT_PRINT(buf);
+
+		RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE, "\r\n CFO_avg=((%d kHz)), CFO_traking = ((%s%d))",
+			   cfo_t->CFO_ave_pre,
+			   ((cfo_t->crystal_cap > cfo_t->def_x_cap) ? "+" : "-"),
+			   DIFF_2(cfo_t->crystal_cap, cfo_t->def_x_cap));
+		RT_PRINT(buf);
+
+		/* @Condition number */
+		#if (RTL8822B_SUPPORT)
+		if (dm->support_ic_type == ODM_RTL8822B) {
+			RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE, "\r\n Condi_Num=((%d.%.4d))",
+				   dm->phy_dbg_info.condi_num >> 4,
+				   phydm_show_fraction_num(dm->phy_dbg_info.condi_num & 0xf, 4));
+			RT_PRINT(buf);
 		}
+		#endif
 
-		PHYDM_SNPRINTF((output + used, out_len - used, "\r\n %-35s = %d (factor = %s)", "Condition number", condition_num, factor));
+#if (ODM_PHY_STATUS_NEW_TYPE_SUPPORT || defined(PHYSTS_3RD_TYPE_SUPPORT))
+		/*STBC or LDPC pkt*/
+		if (dm->support_ic_type & (PHYSTS_2ND_TYPE_IC |
+					   PHYSTS_3RD_TYPE_IC))
+			RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE, "\r\n Coding: LDPC=((%s)), STBC=((%s))",
+				   (dm->phy_dbg_info.is_ldpc_pkt) ? "Y" : "N",
+				   (dm->phy_dbg_info.is_stbc_pkt) ? "Y" : "N");
+			RT_PRINT(buf);
+#endif
 
+	} else {
+		RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE, "\r\n No Link !!!");
+		RT_PRINT(buf);
 	}
-	*_used = used;
-	*_out_len = out_len;
 
-}
-#endif /*#ifdef CONFIG_PHYDM_DEBUG_FUNCTION*/
+	RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE, "\r\n [CCA Cnt] {CCK, OFDM, Total} = {%d, %d, %d}",
+		   fa_t->cnt_cck_cca, fa_t->cnt_ofdm_cca, fa_t->cnt_cca_all);
+	RT_PRINT(buf);
+
+	RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE, "\r\n [FA Cnt] {CCK, OFDM, Total} = {%d, %d, %d}",
+		   fa_t->cnt_cck_fail, fa_t->cnt_ofdm_fail, fa_t->cnt_all);
+	RT_PRINT(buf);
+
+	#if (ODM_IC_11N_SERIES_SUPPORT)
+	if (dm->support_ic_type & ODM_IC_11N_SERIES) {
+		RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE,
+			   "\r\n [OFDM FA Detail] Parity_Fail=%d, Rate_Illegal=%d, CRC8=%d, MCS_fail=%d, Fast_sync=%d, SB_Search_fail=%d",
+			   fa_t->cnt_parity_fail, fa_t->cnt_rate_illegal,
+			   fa_t->cnt_crc8_fail, fa_t->cnt_mcs_fail,
+			   fa_t->cnt_fast_fsync, fa_t->cnt_sb_search_fail);
+		RT_PRINT(buf);
+	}
+	#endif
+	RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE,
+		   "\r\n is_linked = %d, Num_client = %d, rssi_min = %d, IGI = 0x%x, bNoisy=%d",
+		   dm->is_linked, dm->number_linked_client, dm->rssi_min,
+		   dm->dm_dig_table.cur_ig_value, dm->noisy_decision);
+	RT_PRINT(buf);
 
-#if (DM_ODM_SUPPORT_TYPE & ODM_WIN)
+	phydm_dm_summary_cli_win(dm, buf, target_macid);
+}
 
 #ifdef CONFIG_PHYDM_DEBUG_FUNCTION
 void phydm_sbd_check(
-	struct PHY_DM_STRUCT					*p_dm
-)
+	struct dm_struct *dm)
 {
-	static u32	pkt_cnt = 0;
-	static boolean sbd_state = 0;
-	u32	sym_count, count, value32;
+	static u32 pkt_cnt;
+	static boolean sbd_state;
+	u32 sym_count, count, value32;
 
 	if (sbd_state == 0) {
 		pkt_cnt++;
-		if (pkt_cnt % 5 == 0) { /*read SBD conter once every 5 packets*/
-			odm_set_timer(p_dm, &p_dm->sbdcnt_timer, 0); /*ms*/
+		/*read SBD conter once every 5 packets*/
+		if (pkt_cnt % 5 == 0) {
+			odm_set_timer(dm, &dm->sbdcnt_timer, 0); /*@ms*/
 			sbd_state = 1;
 		}
 	} else { /*read counter*/
-		value32 = odm_get_bb_reg(p_dm, 0xF98, MASKDWORD);
+		value32 = odm_get_bb_reg(dm, R_0xf98, MASKDWORD);
 		sym_count = (value32 & 0x7C000000) >> 26;
 		count = (value32 & 0x3F00000) >> 20;
-		dbg_print("#SBD#    sym_count   %d   count   %d\n", sym_count, count);
+		pr_debug("#SBD# sym_count %d count %d\n", sym_count, count);
 		sbd_state = 0;
 	}
 }
 #endif
 
 void phydm_sbd_callback(
-	struct timer_list		*p_timer
-)
+	struct phydm_timer_list *timer)
 {
 #ifdef CONFIG_PHYDM_DEBUG_FUNCTION
-	struct _ADAPTER		*adapter = (struct _ADAPTER *)p_timer->Adapter;
-	HAL_DATA_TYPE	*p_hal_data = GET_HAL_DATA(adapter);
-	struct PHY_DM_STRUCT		*p_dm = &p_hal_data->DM_OutSrc;
+	void *adapter = timer->Adapter;
+	HAL_DATA_TYPE *hal_data = GET_HAL_DATA((PADAPTER)adapter);
+	struct dm_struct *dm = &hal_data->DM_OutSrc;
 
-	#if USE_WORKITEM
-	odm_schedule_work_item(&p_dm->sbdcnt_workitem);
-	#else
-	phydm_sbd_check(p_dm);
-	#endif
+#if USE_WORKITEM
+	odm_schedule_work_item(&dm->sbdcnt_workitem);
+#else
+	phydm_sbd_check(dm);
+#endif
 #endif
 }
 
 void phydm_sbd_workitem_callback(
-	void            *p_context
-)
+	void *context)
 {
 #ifdef CONFIG_PHYDM_DEBUG_FUNCTION
-	struct _ADAPTER	*p_adapter = (struct _ADAPTER *)p_context;
-	HAL_DATA_TYPE	*p_hal_data = GET_HAL_DATA(p_adapter);
-	struct PHY_DM_STRUCT		*p_dm = &p_hal_data->DM_OutSrc;
+	void *adapter = (void *)context;
+	HAL_DATA_TYPE *hal_data = GET_HAL_DATA((PADAPTER)adapter);
+	struct dm_struct *dm = &hal_data->DM_OutSrc;
 
-	phydm_sbd_check(p_dm);
+	phydm_sbd_check(dm);
 #endif
 }
 #endif
 
-void
-phydm_reset_rx_rate_distribution(
-	struct PHY_DM_STRUCT	*p_dm_odm
-)
+void phydm_reset_rx_rate_distribution(struct dm_struct *dm)
 {
-	struct _odm_phy_dbg_info_		*p_dbg = &(p_dm_odm->phy_dbg_info);
-
-	odm_memory_set(p_dm_odm, &(p_dbg->num_qry_legacy_pkt[0]), 0, (LEGACY_RATE_NUM * 2));
-	odm_memory_set(p_dm_odm, &(p_dbg->num_qry_ht_pkt[0]), 0, (HT_RATE_NUM * 2));
-	p_dbg->ht_pkt_not_zero = false;
-	
-#if	ODM_IC_11AC_SERIES_SUPPORT
-	odm_memory_set(p_dm_odm, &(p_dbg->num_qry_vht_pkt[0]), 0, (VHT_RATE_NUM * 2));
-	p_dbg->vht_pkt_not_zero = false;
+	struct odm_phy_dbg_info *dbg = &dm->phy_dbg_info;
+
+	odm_memory_set(dm, &dbg->num_qry_legacy_pkt[0], 0,
+		       (LEGACY_RATE_NUM * 2));
+	odm_memory_set(dm, &dbg->num_qry_ht_pkt[0], 0,
+		       (HT_RATE_NUM * 2));
+	odm_memory_set(dm, &dbg->num_qry_pkt_sc_20m[0], 0,
+		       (LOW_BW_RATE_NUM * 2));
+
+	dbg->ht_pkt_not_zero = false;
+	dbg->low_bw_20_occur = false;
+
+#if (ODM_IC_11AC_SERIES_SUPPORT || defined(PHYDM_IC_JGR3_SERIES_SUPPORT))
+	odm_memory_set(dm, &dbg->num_qry_vht_pkt[0], 0, VHT_RATE_NUM * 2);
+	odm_memory_set(dm, &dbg->num_qry_pkt_sc_40m[0], 0, LOW_BW_RATE_NUM * 2);
+	#if (ODM_PHY_STATUS_NEW_TYPE_SUPPORT == 1) || (defined(PHYSTS_3RD_TYPE_SUPPORT))
+	odm_memory_set(dm, &dbg->num_mu_vht_pkt[0], 0, VHT_RATE_NUM * 2);
+	#endif
+	dbg->vht_pkt_not_zero = false;
+	dbg->low_bw_40_occur = false;
 #endif
 }
 
-void
-phydm_rx_rate_distribution
-(
-	void			*p_dm_void
-)
+void phydm_rx_rate_distribution(void *dm_void)
 {
-	struct PHY_DM_STRUCT		*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	struct _odm_phy_dbg_info_		*p_dbg = &(p_dm->phy_dbg_info);
-	u8	i = 0, j = 0;
-	u8	rate_num = 1, rate_ss_shift = 0;
-
-	if (p_dm->support_ic_type & ODM_IC_4SS)
-		rate_num = 4;
-	else if (p_dm->support_ic_type & ODM_IC_3SS)
-		rate_num = 3;
-	else if (p_dm->support_ic_type & ODM_IC_2SS)
-		rate_num = 2;
-
-	PHYDM_DBG(p_dm, ODM_COMP_COMMON, ("[RxRate Cnt] =============>\n"));
-
-	/*======CCK=============================================================*/
-	if (*(p_dm->p_channel) <= 14) {
-		PHYDM_DBG(p_dm, ODM_COMP_COMMON, ("* CCK = {%d, %d, %d, %d}\n",
-			p_dbg->num_qry_legacy_pkt[0],
-			p_dbg->num_qry_legacy_pkt[1],
-			p_dbg->num_qry_legacy_pkt[2],
-			p_dbg->num_qry_legacy_pkt[3]
-			));
-	}
-	/*======OFDM============================================================*/
-	PHYDM_DBG(p_dm, ODM_COMP_COMMON, ("* OFDM = {%d, %d, %d, %d, %d, %d, %d, %d}\n",
-		p_dbg->num_qry_legacy_pkt[4], p_dbg->num_qry_legacy_pkt[5],
-		p_dbg->num_qry_legacy_pkt[6], p_dbg->num_qry_legacy_pkt[7],
-		p_dbg->num_qry_legacy_pkt[8], p_dbg->num_qry_legacy_pkt[9],
-		p_dbg->num_qry_legacy_pkt[10], p_dbg->num_qry_legacy_pkt[11]));
-
-	/*======HT==============================================================*/
-	if (p_dbg->ht_pkt_not_zero) {
-		
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct odm_phy_dbg_info *dbg = &dm->phy_dbg_info;
+	u8 i = 0;
+	u8 rate_num = dm->num_rf_path, ss_ofst = 0;
+
+	PHYDM_DBG(dm, DBG_CMN, "[RxRate Cnt] =============>\n");
+
+	/*@======CCK=========================================================*/
+	if (*dm->channel <= 14) {
+		PHYDM_DBG(dm, DBG_CMN, "* CCK = {%d, %d, %d, %d}\n",
+			  dbg->num_qry_legacy_pkt[0],
+			  dbg->num_qry_legacy_pkt[1],
+			  dbg->num_qry_legacy_pkt[2],
+			  dbg->num_qry_legacy_pkt[3]);
+	}
+	/*@======OFDM========================================================*/
+	PHYDM_DBG(dm, DBG_CMN, "* OFDM = {%d, %d, %d, %d, %d, %d, %d, %d}\n",
+		  dbg->num_qry_legacy_pkt[4], dbg->num_qry_legacy_pkt[5],
+		  dbg->num_qry_legacy_pkt[6], dbg->num_qry_legacy_pkt[7],
+		  dbg->num_qry_legacy_pkt[8], dbg->num_qry_legacy_pkt[9],
+		  dbg->num_qry_legacy_pkt[10], dbg->num_qry_legacy_pkt[11]);
+
+	/*@======HT==========================================================*/
+	if (dbg->ht_pkt_not_zero) {
 		for (i = 0; i < rate_num; i++) {
-			
-			rate_ss_shift = (i << 3);
-			
-			PHYDM_DBG(p_dm, ODM_COMP_COMMON, ("* HT MCS[%d :%d ] = {%d, %d, %d, %d, %d, %d, %d, %d}\n",
-				(rate_ss_shift), (rate_ss_shift+7),
-				p_dbg->num_qry_ht_pkt[rate_ss_shift + 0], p_dbg->num_qry_ht_pkt[rate_ss_shift + 1],
-				p_dbg->num_qry_ht_pkt[rate_ss_shift + 2], p_dbg->num_qry_ht_pkt[rate_ss_shift + 3],
-				p_dbg->num_qry_ht_pkt[rate_ss_shift + 4], p_dbg->num_qry_ht_pkt[rate_ss_shift + 5],
-				p_dbg->num_qry_ht_pkt[rate_ss_shift + 6], p_dbg->num_qry_ht_pkt[rate_ss_shift + 7]));
+			ss_ofst = (i << 3);
+
+			PHYDM_DBG(dm, DBG_CMN,
+				  "* HT MCS[%d :%d ] = {%d, %d, %d, %d, %d, %d, %d, %d}\n",
+				  (ss_ofst), (ss_ofst + 7),
+				  dbg->num_qry_ht_pkt[ss_ofst + 0],
+				  dbg->num_qry_ht_pkt[ss_ofst + 1],
+				  dbg->num_qry_ht_pkt[ss_ofst + 2],
+				  dbg->num_qry_ht_pkt[ss_ofst + 3],
+				  dbg->num_qry_ht_pkt[ss_ofst + 4],
+				  dbg->num_qry_ht_pkt[ss_ofst + 5],
+				  dbg->num_qry_ht_pkt[ss_ofst + 6],
+				  dbg->num_qry_ht_pkt[ss_ofst + 7]);
+		}
 
+		if (dbg->low_bw_20_occur) {
+			for (i = 0; i < rate_num; i++) {
+				ss_ofst = (i << 3);
+
+				PHYDM_DBG(dm, DBG_CMN,
+					  "* [Low BW 20M] HT MCS[%d :%d ] = {%d, %d, %d, %d, %d, %d, %d, %d}\n",
+					  (ss_ofst), (ss_ofst + 7),
+					  dbg->num_qry_pkt_sc_20m[ss_ofst + 0],
+					  dbg->num_qry_pkt_sc_20m[ss_ofst + 1],
+					  dbg->num_qry_pkt_sc_20m[ss_ofst + 2],
+					  dbg->num_qry_pkt_sc_20m[ss_ofst + 3],
+					  dbg->num_qry_pkt_sc_20m[ss_ofst + 4],
+					  dbg->num_qry_pkt_sc_20m[ss_ofst + 5],
+					  dbg->num_qry_pkt_sc_20m[ss_ofst + 6],
+					  dbg->num_qry_pkt_sc_20m[ss_ofst + 7]);
+			}
 		}
 	}
-	
-#if	ODM_IC_11AC_SERIES_SUPPORT
-	/*======VHT=============================================================*/
-	if (p_dbg->vht_pkt_not_zero){
-		
+
+#if (ODM_IC_11AC_SERIES_SUPPORT || defined(PHYDM_IC_JGR3_SERIES_SUPPORT))
+	/*@======VHT==========================================================*/
+	if (dbg->vht_pkt_not_zero) {
 		for (i = 0; i < rate_num; i++) {
-			
-			rate_ss_shift = 10 * i;
-			
-			PHYDM_DBG(p_dm, ODM_COMP_COMMON, ("* VHT-%d ss MCS[0:9] = {%d, %d, %d, %d, %d, %d, %d, %d, %d, %d}\n",
-				(i + 1),
-				p_dbg->num_qry_vht_pkt[rate_ss_shift + 0], p_dbg->num_qry_vht_pkt[rate_ss_shift + 1],
-				p_dbg->num_qry_vht_pkt[rate_ss_shift + 2], p_dbg->num_qry_vht_pkt[rate_ss_shift + 3],
-				p_dbg->num_qry_vht_pkt[rate_ss_shift + 4], p_dbg->num_qry_vht_pkt[rate_ss_shift + 5],
-				p_dbg->num_qry_vht_pkt[rate_ss_shift + 6], p_dbg->num_qry_vht_pkt[rate_ss_shift + 7],
-				p_dbg->num_qry_vht_pkt[rate_ss_shift + 8], p_dbg->num_qry_vht_pkt[rate_ss_shift + 9]));
+			ss_ofst = 10 * i;
+
+			PHYDM_DBG(dm, DBG_CMN,
+				  "* VHT-%d ss MCS[0:9] = {%d, %d, %d, %d, %d, %d, %d, %d, %d, %d}\n",
+				  (i + 1),
+				  dbg->num_qry_vht_pkt[ss_ofst + 0],
+				  dbg->num_qry_vht_pkt[ss_ofst + 1],
+				  dbg->num_qry_vht_pkt[ss_ofst + 2],
+				  dbg->num_qry_vht_pkt[ss_ofst + 3],
+				  dbg->num_qry_vht_pkt[ss_ofst + 4],
+				  dbg->num_qry_vht_pkt[ss_ofst + 5],
+				  dbg->num_qry_vht_pkt[ss_ofst + 6],
+				  dbg->num_qry_vht_pkt[ss_ofst + 7],
+				  dbg->num_qry_vht_pkt[ss_ofst + 8],
+				  dbg->num_qry_vht_pkt[ss_ofst + 9]);
+		}
+
+		if (dbg->low_bw_20_occur) {
+			for (i = 0; i < rate_num; i++) {
+				ss_ofst = 10 * i;
+
+				PHYDM_DBG(dm, DBG_CMN,
+					  "*[Low BW 20M] VHT-%d ss MCS[0:9] = {%d, %d, %d, %d, %d, %d, %d, %d, %d, %d}\n",
+					  (i + 1),
+					  dbg->num_qry_pkt_sc_20m[ss_ofst + 0],
+					  dbg->num_qry_pkt_sc_20m[ss_ofst + 1],
+					  dbg->num_qry_pkt_sc_20m[ss_ofst + 2],
+					  dbg->num_qry_pkt_sc_20m[ss_ofst + 3],
+					  dbg->num_qry_pkt_sc_20m[ss_ofst + 4],
+					  dbg->num_qry_pkt_sc_20m[ss_ofst + 5],
+					  dbg->num_qry_pkt_sc_20m[ss_ofst + 6],
+					  dbg->num_qry_pkt_sc_20m[ss_ofst + 7],
+					  dbg->num_qry_pkt_sc_20m[ss_ofst + 8],
+					  dbg->num_qry_pkt_sc_20m[ss_ofst + 9]);
+			}
+		}
 
+		if (dbg->low_bw_40_occur) {
+			for (i = 0; i < rate_num; i++) {
+				ss_ofst = 10 * i;
+
+				PHYDM_DBG(dm, DBG_CMN,
+					  "*[Low BW 40M] VHT-%d ss MCS[0:9] = {%d, %d, %d, %d, %d, %d, %d, %d, %d, %d}\n",
+					  (i + 1),
+					  dbg->num_qry_pkt_sc_40m[ss_ofst + 0],
+					  dbg->num_qry_pkt_sc_40m[ss_ofst + 1],
+					  dbg->num_qry_pkt_sc_40m[ss_ofst + 2],
+					  dbg->num_qry_pkt_sc_40m[ss_ofst + 3],
+					  dbg->num_qry_pkt_sc_40m[ss_ofst + 4],
+					  dbg->num_qry_pkt_sc_40m[ss_ofst + 5],
+					  dbg->num_qry_pkt_sc_40m[ss_ofst + 6],
+					  dbg->num_qry_pkt_sc_40m[ss_ofst + 7],
+					  dbg->num_qry_pkt_sc_40m[ss_ofst + 8],
+					  dbg->num_qry_pkt_sc_40m[ss_ofst + 9]);
+			}
 		}
 	}
 #endif
-	
 }
 
-void
-phydm_get_avg_phystatus_val
-(
-	void		*p_dm_void
-)
+void phydm_print_hist_2_buf(void *dm_void, u16 *val, u16 len, char *buf,
+			    u16 buf_size)
 {
-	struct PHY_DM_STRUCT		*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	struct phydm_phystatus_statistic		*p_dbg_statistic = &(p_dm->phy_dbg_info.phystatus_statistic_info);
-	struct phydm_phystatus_avg		*p_dbg_avg = &(p_dm->phy_dbg_info.phystatus_statistic_avg);
-	
-	PHYDM_DBG(p_dm, ODM_COMP_COMMON, ("[Avg PHY Statistic] ==============>\n"));
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+
+	if (len == PHY_HIST_SIZE) {
+		PHYDM_SNPRINTF(buf, buf_size,
+			       "[%.2d, %.2d, %.2d, %.2d, %.2d, %.2d, %.2d, %.2d, %.2d, %.2d, %.2d, %.2d]",
+			       val[0], val[1], val[2], val[3], val[4],
+			       val[5], val[6], val[7], val[8], val[9],
+			       val[10], val[11]);
+	} else if (len == (PHY_HIST_SIZE - 1)) {
+		PHYDM_SNPRINTF(buf, buf_size,
+			       "[%.2d, %.2d, %.2d, %.2d, %.2d, %.2d, %.2d, %.2d, %.2d, %.2d, %.2d]",
+			       val[0], val[1], val[2], val[3], val[4],
+			       val[5], val[6], val[7], val[8], val[9],
+			       val[10]);
+	}
+}
 
-	phydm_reset_phystatus_avg(p_dm);
+void phydm_nss_hitogram(void *dm_void, enum PDM_RATE_TYPE rate_type)
+{
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct odm_phy_dbg_info *dbg_i = &dm->phy_dbg_info;
+	struct phydm_phystatus_statistic *dbg_s = &dbg_i->physts_statistic_info;
+	char buf[PHYDM_SNPRINT_SIZE] = {0};
+	u16 buf_size = PHYDM_SNPRINT_SIZE;
+	u16 h_size = PHY_HIST_SIZE;
+	u16 *evm_hist = &dbg_s->evm_1ss_hist[0];
+	u16 *snr_hist = &dbg_s->snr_1ss_hist[0];
+	u8 i = 0;
+	u8 ss = phydm_rate_type_2_num_ss(dm, rate_type);
+
+	for (i = 0; i < ss; i++) {
+		if (rate_type == PDM_1SS) {
+			evm_hist = &dbg_s->evm_1ss_hist[0];
+			snr_hist = &dbg_s->snr_1ss_hist[0];
+		} else if (rate_type == PDM_2SS) {
+			#if (defined(PHYDM_COMPILE_ABOVE_2SS))
+			evm_hist = &dbg_s->evm_2ss_hist[i][0];
+			snr_hist = &dbg_s->snr_2ss_hist[i][0];
+			#endif
+		} else if (rate_type == PDM_3SS) {
+			#if (defined(PHYDM_COMPILE_ABOVE_3SS))
+			evm_hist = &dbg_s->evm_3ss_hist[i][0];
+			snr_hist = &dbg_s->snr_3ss_hist[i][0];
+			#endif
+		} else if (rate_type == PDM_4SS) {
+			#if (defined(PHYDM_COMPILE_ABOVE_4SS))
+			evm_hist = &dbg_s->evm_4ss_hist[i][0];
+			snr_hist = &dbg_s->snr_4ss_hist[i][0];
+			#endif
+		}
 
-	/*CCK*/
-	p_dbg_avg->rssi_cck_avg = (u8)((p_dbg_statistic->rssi_cck_cnt != 0) ? (p_dbg_statistic->rssi_cck_sum/p_dbg_statistic->rssi_cck_cnt) : 0);
-	PHYDM_DBG(p_dm, ODM_COMP_COMMON, ("* cck Cnt= ((%d)) RSSI:{%d}\n", p_dbg_statistic->rssi_cck_cnt, p_dbg_avg->rssi_cck_avg));
-	
-	/*OFDM*/
-	if (p_dbg_statistic->rssi_ofdm_cnt != 0) {
-		p_dbg_avg->rssi_ofdm_avg = (u8)(p_dbg_statistic->rssi_ofdm_sum/p_dbg_statistic->rssi_ofdm_cnt);
-		p_dbg_avg->evm_ofdm_avg = (u8)(p_dbg_statistic->evm_ofdm_sum/p_dbg_statistic->rssi_ofdm_cnt);
-		p_dbg_avg->snr_ofdm_avg = (u8)(p_dbg_statistic->snr_ofdm_sum/p_dbg_statistic->rssi_ofdm_cnt);
+		phydm_print_hist_2_buf(dm, evm_hist, h_size, buf, buf_size);
+		PHYDM_DBG(dm, DBG_CMN, "[%d-SS][EVM][%d]=%s\n", ss, i, buf);
+		phydm_print_hist_2_buf(dm, snr_hist, h_size, buf, buf_size);
+		PHYDM_DBG(dm, DBG_CMN, "[%d-SS][SNR][%d]=%s\n",  ss, i, buf);
 	}
+}
 
-	PHYDM_DBG(p_dm, ODM_COMP_COMMON, ("* ofdm Cnt= ((%d)) RSSI:{%d} EVM:{%d} SNR:{%d}\n",
-		p_dbg_statistic->rssi_ofdm_cnt, p_dbg_avg->rssi_ofdm_avg, p_dbg_avg->evm_ofdm_avg, p_dbg_avg->snr_ofdm_avg));
-	
-	if (p_dbg_statistic->rssi_1ss_cnt != 0) {
-		p_dbg_avg->rssi_1ss_avg = (u8)(p_dbg_statistic->rssi_1ss_sum/p_dbg_statistic->rssi_1ss_cnt);
-		p_dbg_avg->evm_1ss_avg = (u8)(p_dbg_statistic->evm_1ss_sum/p_dbg_statistic->rssi_1ss_cnt);
-		p_dbg_avg->snr_1ss_avg = (u8)(p_dbg_statistic->snr_1ss_sum/p_dbg_statistic->rssi_1ss_cnt);
+void phydm_show_phy_hitogram(void *dm_void)
+{
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct odm_phy_dbg_info *dbg_i = &dm->phy_dbg_info;
+	struct phydm_phystatus_statistic *dbg_s = &dbg_i->physts_statistic_info;
+	char buf[PHYDM_SNPRINT_SIZE] = {0};
+	u16 buf_size = PHYDM_SNPRINT_SIZE;
+	u16 th_size = PHY_HIST_SIZE - 1;
+	u8 i = 0;
+
+	PHYDM_DBG(dm, DBG_CMN, "[PHY Histogram] ==============>\n");
+/*@===[Threshold]=============================================================*/
+	phydm_print_hist_2_buf(dm, dbg_i->evm_hist_th, th_size, buf, buf_size);
+	PHYDM_DBG(dm, DBG_CMN, "%-16s=%s\n", "[EVM_TH]", buf);
+
+	phydm_print_hist_2_buf(dm, dbg_i->snr_hist_th, th_size, buf, buf_size);
+	PHYDM_DBG(dm, DBG_CMN, "%-16s=%s\n", "[SNR_TH]", buf);
+/*@===[OFDM]==================================================================*/
+	if (dbg_s->rssi_ofdm_cnt) {
+		phydm_print_hist_2_buf(dm, dbg_s->evm_ofdm_hist, PHY_HIST_SIZE,
+				       buf, buf_size);
+		PHYDM_DBG(dm, DBG_CMN, "%-14s=%s\n", "[OFDM][EVM]", buf);
+
+		phydm_print_hist_2_buf(dm, dbg_s->snr_ofdm_hist, PHY_HIST_SIZE,
+				       buf, buf_size);
+		PHYDM_DBG(dm, DBG_CMN, "%-14s=%s\n", "[OFDM][SNR]", buf);
 	}
+/*@===[1-SS]==================================================================*/
+	if (dbg_s->rssi_1ss_cnt)
+		phydm_nss_hitogram(dm, PDM_1SS);
+/*@===[2-SS]==================================================================*/
+	#if (defined(PHYDM_COMPILE_ABOVE_2SS))
+	if ((dm->support_ic_type & PHYDM_IC_ABOVE_2SS) && dbg_s->rssi_2ss_cnt)
+		phydm_nss_hitogram(dm, PDM_2SS);
+	#endif
+/*@===[3-SS]==================================================================*/
+	#if (defined(PHYDM_COMPILE_ABOVE_3SS))
+	if ((dm->support_ic_type & PHYDM_IC_ABOVE_3SS) && dbg_s->rssi_3ss_cnt)
+		phydm_nss_hitogram(dm, PDM_3SS);
+	#endif
+/*@===[4-SS]==================================================================*/
+	#if (defined(PHYDM_COMPILE_ABOVE_4SS))
+	if (dm->support_ic_type & PHYDM_IC_ABOVE_4SS && dbg_s->rssi_4ss_cnt)
+		phydm_nss_hitogram(dm, PDM_4SS);
+	#endif
+}
 
-	PHYDM_DBG(p_dm, ODM_COMP_COMMON, ("* 1-ss Cnt= ((%d)) RSSI:{%d} EVM:{%d} SNR:{%d}\n",
-		p_dbg_statistic->rssi_1ss_cnt, p_dbg_avg->rssi_1ss_avg, p_dbg_avg->evm_1ss_avg, p_dbg_avg->snr_1ss_avg));
+void phydm_get_avg_phystatus_val(void *dm_void)
+{
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct odm_phy_dbg_info *dbg_i = &dm->phy_dbg_info;
+	struct phydm_phystatus_statistic *dbg_s = &dbg_i->physts_statistic_info;
+	struct phydm_phystatus_avg *dbg_avg = &dbg_i->phystatus_statistic_avg;
+
+	PHYDM_DBG(dm, DBG_CMN, "[PHY Avg] ==============>\n");
+	phydm_reset_phystatus_avg(dm);
+
+/*@===[CCK]===================================================================*/
+	if (dbg_s->rssi_cck_cnt != 0)
+		dbg_avg->rssi_cck_avg = (u8)(dbg_s->rssi_cck_sum /
+					dbg_s->rssi_cck_cnt);
+	else
+		dbg_avg->rssi_cck_avg = 0;
+
+	PHYDM_DBG(dm, DBG_CMN, "* cck Cnt= ((%d)) RSSI:{%d}\n",
+		  dbg_s->rssi_cck_cnt, dbg_avg->rssi_cck_avg);
+
+/*@===[OFDM]==================================================================*/
+	if (dbg_s->rssi_ofdm_cnt != 0) {
+		dbg_avg->rssi_ofdm_avg = (u8)(dbg_s->rssi_ofdm_sum /
+					      dbg_s->rssi_ofdm_cnt);
+		dbg_avg->evm_ofdm_avg = (u8)(dbg_s->evm_ofdm_sum /
+					     dbg_s->rssi_ofdm_cnt);
+		dbg_avg->snr_ofdm_avg = (u8)(dbg_s->snr_ofdm_sum /
+					     dbg_s->rssi_ofdm_cnt);
+	}
 
-	#if (defined(PHYDM_COMPILE_ABOVE_2SS))
-	if (p_dm->support_ic_type & (PHYDM_IC_ABOVE_2SS)) {
-
-		if (p_dbg_statistic->rssi_2ss_cnt != 0) {
-			p_dbg_avg->rssi_2ss_avg[0] = (u8)(p_dbg_statistic->rssi_2ss_sum[0] /p_dbg_statistic->rssi_2ss_cnt);
-			p_dbg_avg->rssi_2ss_avg[1] = (u8)(p_dbg_statistic->rssi_2ss_sum[1] /p_dbg_statistic->rssi_2ss_cnt);
-			
-			p_dbg_avg->evm_2ss_avg[0] = (u8)(p_dbg_statistic->evm_2ss_sum[0] /p_dbg_statistic->rssi_2ss_cnt);
-			p_dbg_avg->evm_2ss_avg[1] = (u8)(p_dbg_statistic->evm_2ss_sum[1] /p_dbg_statistic->rssi_2ss_cnt);
-			
-			p_dbg_avg->snr_2ss_avg[0] = (u8)(p_dbg_statistic->snr_2ss_sum[0] /p_dbg_statistic->rssi_2ss_cnt);
-			p_dbg_avg->snr_2ss_avg[1] = (u8)(p_dbg_statistic->snr_2ss_sum[1] /p_dbg_statistic->rssi_2ss_cnt);
-		}
-		
-		PHYDM_DBG(p_dm, ODM_COMP_COMMON, ("* 2-ss Cnt= ((%d)) RSSI:{%d, %d}, EVM:{%d, %d}, SNR:{%d, %d}\n",
-			p_dbg_statistic->rssi_2ss_cnt, 
-			p_dbg_avg->rssi_2ss_avg[0], p_dbg_avg->rssi_2ss_avg[1], 
-			p_dbg_avg->evm_2ss_avg[0], p_dbg_avg->evm_2ss_avg[1], 
-			p_dbg_avg->snr_2ss_avg[0], p_dbg_avg->snr_2ss_avg[1]));
+	PHYDM_DBG(dm, DBG_CMN,
+		  "* ofdm Cnt= ((%d)) RSSI:{%d} EVM:{%d} SNR:{%d}\n",
+		  dbg_s->rssi_ofdm_cnt, dbg_avg->rssi_ofdm_avg,
+		  dbg_avg->evm_ofdm_avg, dbg_avg->snr_ofdm_avg);
+/*@===[1-SS]==================================================================*/
+	if (dbg_s->rssi_1ss_cnt != 0) {
+		dbg_avg->rssi_1ss_avg = (u8)(dbg_s->rssi_1ss_sum /
+					     dbg_s->rssi_1ss_cnt);
+		dbg_avg->evm_1ss_avg = (u8)(dbg_s->evm_1ss_sum /
+					    dbg_s->rssi_1ss_cnt);
+		dbg_avg->snr_1ss_avg = (u8)(dbg_s->snr_1ss_sum /
+					    dbg_s->rssi_1ss_cnt);
 	}
-	#endif
 
-	#if (defined(PHYDM_COMPILE_ABOVE_3SS))
-	if (p_dm->support_ic_type & (PHYDM_IC_ABOVE_3SS)) {
-
-		if (p_dbg_statistic->rssi_3ss_cnt != 0) {
-			p_dbg_avg->rssi_3ss_avg[0] = (u8)(p_dbg_statistic->rssi_3ss_sum[0] /p_dbg_statistic->rssi_3ss_cnt);
-			p_dbg_avg->rssi_3ss_avg[1] = (u8)(p_dbg_statistic->rssi_3ss_sum[1] /p_dbg_statistic->rssi_3ss_cnt);
-			p_dbg_avg->rssi_3ss_avg[2] = (u8)(p_dbg_statistic->rssi_3ss_sum[2] /p_dbg_statistic->rssi_3ss_cnt);
-			
-			p_dbg_avg->evm_3ss_avg[0] = (u8)(p_dbg_statistic->evm_3ss_sum[0] /p_dbg_statistic->rssi_3ss_cnt);
-			p_dbg_avg->evm_3ss_avg[1] = (u8)(p_dbg_statistic->evm_3ss_sum[1] /p_dbg_statistic->rssi_3ss_cnt);
-			p_dbg_avg->evm_3ss_avg[2] = (u8)(p_dbg_statistic->evm_3ss_sum[2] /p_dbg_statistic->rssi_3ss_cnt);
-
-			p_dbg_avg->snr_3ss_avg[0] = (u8)(p_dbg_statistic->snr_3ss_sum[0] /p_dbg_statistic->rssi_3ss_cnt);
-			p_dbg_avg->snr_3ss_avg[1] = (u8)(p_dbg_statistic->snr_3ss_sum[1] /p_dbg_statistic->rssi_3ss_cnt);
-			p_dbg_avg->snr_3ss_avg[2] = (u8)(p_dbg_statistic->snr_3ss_sum[2] /p_dbg_statistic->rssi_3ss_cnt);
+	PHYDM_DBG(dm, DBG_CMN,
+		  "* 1-ss Cnt= ((%d)) RSSI:{%d} EVM:{%d} SNR:{%d}\n",
+		  dbg_s->rssi_1ss_cnt, dbg_avg->rssi_1ss_avg,
+		  dbg_avg->evm_1ss_avg, dbg_avg->snr_1ss_avg);
+
+/*@===[2-SS]==================================================================*/
+#if (defined(PHYDM_COMPILE_ABOVE_2SS))
+	if (dm->support_ic_type & (PHYDM_IC_ABOVE_2SS)) {
+		if (dbg_s->rssi_2ss_cnt != 0) {
+			dbg_avg->rssi_2ss_avg[0] = (u8)(dbg_s->rssi_2ss_sum[0] /
+							dbg_s->rssi_2ss_cnt);
+			dbg_avg->rssi_2ss_avg[1] = (u8)(dbg_s->rssi_2ss_sum[1] /
+							dbg_s->rssi_2ss_cnt);
+
+			dbg_avg->evm_2ss_avg[0] = (u8)(dbg_s->evm_2ss_sum[0] /
+						       dbg_s->rssi_2ss_cnt);
+			dbg_avg->evm_2ss_avg[1] = (u8)(dbg_s->evm_2ss_sum[1] /
+						       dbg_s->rssi_2ss_cnt);
+
+			dbg_avg->snr_2ss_avg[0] = (u8)(dbg_s->snr_2ss_sum[0] /
+						       dbg_s->rssi_2ss_cnt);
+			dbg_avg->snr_2ss_avg[1] = (u8)(dbg_s->snr_2ss_sum[1] /
+						       dbg_s->rssi_2ss_cnt);
 		}
-		
-		PHYDM_DBG(p_dm, ODM_COMP_COMMON, ("* 3-ss Cnt= ((%d)) RSSI:{%d, %d, %d} EVM:{%d, %d, %d} SNR:{%d, %d, %d}\n",
-			p_dbg_statistic->rssi_3ss_cnt, 
-			p_dbg_avg->rssi_3ss_avg[0], p_dbg_avg->rssi_3ss_avg[1], p_dbg_avg->rssi_3ss_avg[2],
-			p_dbg_avg->evm_3ss_avg[0], p_dbg_avg->evm_3ss_avg[1], p_dbg_avg->evm_3ss_avg[2],
-			p_dbg_avg->snr_3ss_avg[0], p_dbg_avg->snr_3ss_avg[1], p_dbg_avg->snr_3ss_avg[2]));
+
+		PHYDM_DBG(dm, DBG_CMN,
+			  "* 2-ss Cnt= ((%d)) RSSI:{%d, %d}, EVM:{%d, %d}, SNR:{%d, %d}\n",
+			  dbg_s->rssi_2ss_cnt, dbg_avg->rssi_2ss_avg[0],
+			  dbg_avg->rssi_2ss_avg[1], dbg_avg->evm_2ss_avg[0],
+			  dbg_avg->evm_2ss_avg[1], dbg_avg->snr_2ss_avg[0],
+			  dbg_avg->snr_2ss_avg[1]);
 	}
-	#endif
+#endif
 
-	#if (defined(PHYDM_COMPILE_ABOVE_4SS))
-	if (p_dm->support_ic_type & PHYDM_IC_ABOVE_4SS) {
-
-		if (p_dbg_statistic->rssi_4ss_cnt != 0) {
-			p_dbg_avg->rssi_4ss_avg[0] = (u8)(p_dbg_statistic->rssi_4ss_sum[0] /p_dbg_statistic->rssi_4ss_cnt);
-			p_dbg_avg->rssi_4ss_avg[1] = (u8)(p_dbg_statistic->rssi_4ss_sum[1] /p_dbg_statistic->rssi_4ss_cnt);
-			p_dbg_avg->rssi_4ss_avg[2] = (u8)(p_dbg_statistic->rssi_4ss_sum[2] /p_dbg_statistic->rssi_4ss_cnt);
-			p_dbg_avg->rssi_4ss_avg[3] = (u8)(p_dbg_statistic->rssi_4ss_sum[3] /p_dbg_statistic->rssi_4ss_cnt);
-
-			p_dbg_avg->evm_4ss_avg[0] = (u8)(p_dbg_statistic->evm_4ss_sum[0] /p_dbg_statistic->rssi_4ss_cnt);
-			p_dbg_avg->evm_4ss_avg[1] = (u8)(p_dbg_statistic->evm_4ss_sum[1] /p_dbg_statistic->rssi_4ss_cnt);
-			p_dbg_avg->evm_4ss_avg[2] = (u8)(p_dbg_statistic->evm_4ss_sum[2] /p_dbg_statistic->rssi_4ss_cnt);
-			p_dbg_avg->evm_4ss_avg[3] = (u8)(p_dbg_statistic->evm_4ss_sum[3] /p_dbg_statistic->rssi_4ss_cnt);
-
-			p_dbg_avg->snr_4ss_avg[0] = (u8)(p_dbg_statistic->snr_4ss_sum[0] /p_dbg_statistic->rssi_4ss_cnt);
-			p_dbg_avg->snr_4ss_avg[1] = (u8)(p_dbg_statistic->snr_4ss_sum[1] /p_dbg_statistic->rssi_4ss_cnt);
-			p_dbg_avg->snr_4ss_avg[2] = (u8)(p_dbg_statistic->snr_4ss_sum[2] /p_dbg_statistic->rssi_4ss_cnt);
-			p_dbg_avg->snr_4ss_avg[3] = (u8)(p_dbg_statistic->snr_4ss_sum[3] /p_dbg_statistic->rssi_4ss_cnt);
+/*@===[3-SS]==================================================================*/
+#if (defined(PHYDM_COMPILE_ABOVE_3SS))
+	if (dm->support_ic_type & (PHYDM_IC_ABOVE_3SS)) {
+		if (dbg_s->rssi_3ss_cnt != 0) {
+			dbg_avg->rssi_3ss_avg[0] = (u8)(dbg_s->rssi_3ss_sum[0] /
+							dbg_s->rssi_3ss_cnt);
+			dbg_avg->rssi_3ss_avg[1] = (u8)(dbg_s->rssi_3ss_sum[1] /
+							dbg_s->rssi_3ss_cnt);
+			dbg_avg->rssi_3ss_avg[2] = (u8)(dbg_s->rssi_3ss_sum[2] /
+							dbg_s->rssi_3ss_cnt);
+
+			dbg_avg->evm_3ss_avg[0] = (u8)(dbg_s->evm_3ss_sum[0] /
+						       dbg_s->rssi_3ss_cnt);
+			dbg_avg->evm_3ss_avg[1] = (u8)(dbg_s->evm_3ss_sum[1] /
+						       dbg_s->rssi_3ss_cnt);
+			dbg_avg->evm_3ss_avg[2] = (u8)(dbg_s->evm_3ss_sum[2] /
+						       dbg_s->rssi_3ss_cnt);
+
+			dbg_avg->snr_3ss_avg[0] = (u8)(dbg_s->snr_3ss_sum[0] /
+						       dbg_s->rssi_3ss_cnt);
+			dbg_avg->snr_3ss_avg[1] = (u8)(dbg_s->snr_3ss_sum[1] /
+						       dbg_s->rssi_3ss_cnt);
+			dbg_avg->snr_3ss_avg[2] = (u8)(dbg_s->snr_3ss_sum[2] /
+						       dbg_s->rssi_3ss_cnt);
 		}
-		
-		PHYDM_DBG(p_dm, ODM_COMP_COMMON, ("* 4-ss Cnt= ((%d)) RSSI:{%d, %d, %d, %d} EVM:{%d, %d, %d, %d} SNR:{%d, %d, %d, %d}\n",
-			p_dbg_statistic->rssi_4ss_cnt, 
-			p_dbg_avg->rssi_4ss_avg[0], p_dbg_avg->rssi_4ss_avg[1], p_dbg_avg->rssi_4ss_avg[2], p_dbg_avg->rssi_4ss_avg[3],
-			p_dbg_avg->evm_4ss_avg[0], p_dbg_avg->evm_4ss_avg[1], p_dbg_avg->evm_4ss_avg[2], p_dbg_avg->evm_4ss_avg[3],
-			p_dbg_avg->snr_4ss_avg[0], p_dbg_avg->snr_4ss_avg[1], p_dbg_avg->snr_4ss_avg[2], p_dbg_avg->snr_4ss_avg[3]));
+
+		PHYDM_DBG(dm, DBG_CMN,
+			  "* 3-ss Cnt= ((%d)) RSSI:{%d, %d, %d} EVM:{%d, %d, %d} SNR:{%d, %d, %d}\n",
+			  dbg_s->rssi_3ss_cnt, dbg_avg->rssi_3ss_avg[0],
+			  dbg_avg->rssi_3ss_avg[1], dbg_avg->rssi_3ss_avg[2],
+			  dbg_avg->evm_3ss_avg[0], dbg_avg->evm_3ss_avg[1],
+			  dbg_avg->evm_3ss_avg[2], dbg_avg->snr_3ss_avg[0],
+			  dbg_avg->snr_3ss_avg[1], dbg_avg->snr_3ss_avg[2]);
 	}
-	#endif
+#endif
 
-	
+/*@===[4-SS]==================================================================*/
+#if (defined(PHYDM_COMPILE_ABOVE_4SS))
+	if (dm->support_ic_type & PHYDM_IC_ABOVE_4SS) {
+		if (dbg_s->rssi_4ss_cnt != 0) {
+			dbg_avg->rssi_4ss_avg[0] = (u8)(dbg_s->rssi_4ss_sum[0] /
+							dbg_s->rssi_4ss_cnt);
+			dbg_avg->rssi_4ss_avg[1] = (u8)(dbg_s->rssi_4ss_sum[1] /
+							dbg_s->rssi_4ss_cnt);
+			dbg_avg->rssi_4ss_avg[2] = (u8)(dbg_s->rssi_4ss_sum[2] /
+							dbg_s->rssi_4ss_cnt);
+			dbg_avg->rssi_4ss_avg[3] = (u8)(dbg_s->rssi_4ss_sum[3] /
+							dbg_s->rssi_4ss_cnt);
+
+			dbg_avg->evm_4ss_avg[0] = (u8)(dbg_s->evm_4ss_sum[0] /
+						       dbg_s->rssi_4ss_cnt);
+			dbg_avg->evm_4ss_avg[1] = (u8)(dbg_s->evm_4ss_sum[1] /
+						       dbg_s->rssi_4ss_cnt);
+			dbg_avg->evm_4ss_avg[2] = (u8)(dbg_s->evm_4ss_sum[2] /
+						       dbg_s->rssi_4ss_cnt);
+			dbg_avg->evm_4ss_avg[3] = (u8)(dbg_s->evm_4ss_sum[3] /
+						       dbg_s->rssi_4ss_cnt);
+
+			dbg_avg->snr_4ss_avg[0] = (u8)(dbg_s->snr_4ss_sum[0] /
+						       dbg_s->rssi_4ss_cnt);
+			dbg_avg->snr_4ss_avg[1] = (u8)(dbg_s->snr_4ss_sum[1] /
+						       dbg_s->rssi_4ss_cnt);
+			dbg_avg->snr_4ss_avg[2] = (u8)(dbg_s->snr_4ss_sum[2] /
+						       dbg_s->rssi_4ss_cnt);
+			dbg_avg->snr_4ss_avg[3] = (u8)(dbg_s->snr_4ss_sum[3] /
+						       dbg_s->rssi_4ss_cnt);
+		}
 
+		PHYDM_DBG(dm, DBG_CMN,
+			  "* 4-ss Cnt= ((%d)) RSSI:{%d, %d, %d, %d} EVM:{%d, %d, %d, %d} SNR:{%d, %d, %d, %d}\n",
+			  dbg_s->rssi_4ss_cnt, dbg_avg->rssi_4ss_avg[0],
+			  dbg_avg->rssi_4ss_avg[1], dbg_avg->rssi_4ss_avg[2],
+			  dbg_avg->rssi_4ss_avg[3], dbg_avg->evm_4ss_avg[0],
+			  dbg_avg->evm_4ss_avg[1], dbg_avg->evm_4ss_avg[2],
+			  dbg_avg->evm_4ss_avg[3], dbg_avg->snr_4ss_avg[0],
+			  dbg_avg->snr_4ss_avg[1], dbg_avg->snr_4ss_avg[2],
+			  dbg_avg->snr_4ss_avg[3]);
+	}
+#endif
 }
 
-void
-phydm_get_phy_statistic(
-	void		*p_dm_void
-)
+void phydm_get_phy_statistic(void *dm_void)
 {
-	struct	PHY_DM_STRUCT		*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	
-	phydm_rx_rate_distribution(p_dm);
-	phydm_reset_rx_rate_distribution(p_dm);
-	
-	phydm_get_avg_phystatus_val(p_dm);
-	phydm_reset_phystatus_statistic(p_dm);
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+
+	phydm_rx_rate_distribution(dm);
+	phydm_reset_rx_rate_distribution(dm);
+
+	phydm_show_phy_hitogram(dm);
+	phydm_get_avg_phystatus_val(dm);
+	phydm_reset_phystatus_statistic(dm);
 };
 
-void
-phydm_basic_dbg_message
-(
-	void			*p_dm_void
-)
+void phydm_basic_dbg_msg_linked(void *dm_void)
 {
-#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_CE))
-	struct PHY_DM_STRUCT		*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	struct phydm_fa_struct *false_alm_cnt = (struct phydm_fa_struct *)phydm_get_structure(p_dm, PHYDM_FALSEALMCNT);
-	struct phydm_cfo_track_struct				*p_cfo_track = (struct phydm_cfo_track_struct *)phydm_get_structure(p_dm, PHYDM_CFOTRACK);
-	struct phydm_dig_struct	*p_dig_t = &p_dm->dm_dig_table;
-	struct _rate_adaptive_table_	*p_ra_table = &p_dm->dm_ra_table;
-	u16	macid, phydm_macid, client_cnt = 0;
-	struct cmn_sta_info	*p_entry = NULL;
-	s32	tmp_val = 0;
-	u8	tmp_val_u1 = 0;
-
-	if (!(p_dm->debug_components & ODM_COMP_COMMON))
-		return;
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct phydm_cfo_track_struct *cfo_t = &dm->dm_cfo_track;
+	struct odm_phy_dbg_info *dbg_t = &dm->phy_dbg_info;
+	u16 macid, client_cnt = 0;
+	u8 rate = 0;
+	struct cmn_sta_info *entry = NULL;
+	char dbg_buf[PHYDM_SNPRINT_SIZE] = {0};
+	struct phydm_cfo_rpt cfo;
+	u8 i = 0;
+
+	PHYDM_DBG(dm, DBG_CMN, "ID=((%d)), BW=((%d)), fc=((CH-%d))\n",
+		  dm->curr_station_id, 20 << *dm->band_width, *dm->channel);
+
+	#ifdef ODM_IC_11N_SERIES_SUPPORT
+	#ifdef PHYDM_PRIMARY_CCA
+	if (((*dm->channel <= 14) && (*dm->band_width == CHANNEL_WIDTH_40)) &&
+	    (dm->support_ic_type & ODM_IC_11N_SERIES)) {
+		PHYDM_DBG(dm, DBG_CMN, "Primary CCA at ((%s SB))\n",
+			  ((*dm->sec_ch_offset == SECOND_CH_AT_LSB) ? "U" :
+			  "L"));
+	}
+	#endif
+	#endif
 
-	PHYDM_DBG(p_dm, ODM_COMP_COMMON, ("[PHYDM Common MSG] System up time: ((%d sec))----->\n", p_dm->phydm_sys_up_time));
+	if ((dm->support_ic_type & PHYSTS_2ND_TYPE_IC) ||
+	    dm->rx_rate > ODM_RATE11M) {
+		PHYDM_DBG(dm, DBG_CMN, "[AGC Idx] {0x%x, 0x%x, 0x%x, 0x%x}\n",
+			  dm->ofdm_agc_idx[0], dm->ofdm_agc_idx[1],
+			  dm->ofdm_agc_idx[2], dm->ofdm_agc_idx[3]);
+	} else {
+		PHYDM_DBG(dm, DBG_CMN, "[CCK AGC Idx] {LNA,VGA}={0x%x, 0x%x}\n",
+			  dm->cck_lna_idx, dm->cck_vga_idx);
+	}
 
-	if (p_dm->is_linked) {
-		PHYDM_DBG(p_dm, ODM_COMP_COMMON, ("ID=((%d)), BW=((%d)), fc=((CH-%d))\n", p_dm->curr_station_id, 20<<(*(p_dm->p_band_width)), *(p_dm->p_channel)));
+	phydm_print_rate_2_buff(dm, dm->rx_rate, dbg_buf, PHYDM_SNPRINT_SIZE);
+	PHYDM_DBG(dm, DBG_CMN, "RSSI:{%d, %d, %d, %d}, RxRate:%s (0x%x)\n",
+		  (dm->rssi_a == 0xff) ? 0 : dm->rssi_a,
+		  (dm->rssi_b == 0xff) ? 0 : dm->rssi_b,
+		  (dm->rssi_c == 0xff) ? 0 : dm->rssi_c,
+		  (dm->rssi_d == 0xff) ? 0 : dm->rssi_d,
+		  dbg_buf, dm->rx_rate);
 
-		if ((*(p_dm->p_channel) <= 14) && (*(p_dm->p_band_width) == CHANNEL_WIDTH_40)) {
-			PHYDM_DBG(p_dm, ODM_COMP_COMMON, ("Primary CCA at ((%s SB))\n",
-				(((*(p_dm->p_sec_ch_offset)) == SECOND_CH_AT_LSB)?"U":"L")));
-		}
+	rate = dbg_t->beacon_phy_rate;
+	phydm_print_rate_2_buff(dm, rate, dbg_buf, PHYDM_SNPRINT_SIZE);
 
-		if ((p_dm->support_ic_type & ODM_IC_PHY_STATUE_NEW_TYPE) || p_dm->rx_rate > ODM_RATE11M) {
-			
-			PHYDM_DBG(p_dm, ODM_COMP_COMMON, ("[AGC Idx] {0x%x, 0x%x, 0x%x, 0x%x}\n",
-				p_dm->ofdm_agc_idx[0], p_dm->ofdm_agc_idx[1], p_dm->ofdm_agc_idx[2], p_dm->ofdm_agc_idx[3]));
-		} else {
-		
-			PHYDM_DBG(p_dm, ODM_COMP_COMMON, ("[CCK AGC Idx] {LNA, VGA}={0x%x, 0x%x}\n",
-				p_dm->cck_lna_idx, p_dm->cck_vga_idx));
-		}
+	PHYDM_DBG(dm, DBG_CMN, "Beacon_cnt=%d, rate_idx=%s (0x%x)\n",
+		  dbg_t->num_qry_beacon_pkt, dbg_buf, dbg_t->beacon_phy_rate);
 
-		PHYDM_DBG(p_dm, ODM_COMP_COMMON, ("RSSI:{%d, %d, %d, %d}, RxRate:",
-			(p_dm->RSSI_A == 0xff) ? 0 : p_dm->RSSI_A,
-			(p_dm->RSSI_B == 0xff) ? 0 : p_dm->RSSI_B,
-			(p_dm->RSSI_C == 0xff) ? 0 : p_dm->RSSI_C,
-			(p_dm->RSSI_D == 0xff) ? 0 : p_dm->RSSI_D));
+	phydm_get_phy_statistic(dm);
 
-		phydm_print_rate(p_dm, p_dm->rx_rate, ODM_COMP_COMMON);
+	PHYDM_DBG(dm, DBG_CMN,
+		  "rxsc_idx {Legacy, 20, 40, 80} = {%d, %d, %d, %d}\n",
+		  dm->rxsc_l, dm->rxsc_20, dm->rxsc_40, dm->rxsc_80);
 
-		phydm_get_phy_statistic(p_dm);
+	/*Print TX rate*/
+	for (macid = 0; macid < ODM_ASSOCIATE_ENTRY_NUM; macid++) {
+		entry = dm->phydm_sta_info[macid];
 
-		/*Print TX rate*/
-		for (macid = 0; macid < ODM_ASSOCIATE_ENTRY_NUM; macid++) {
+		if (!is_sta_active(entry))
+			continue;
 
-			p_entry = p_dm->p_phydm_sta_info[macid];
-			if (!is_sta_active(p_entry)) {
-				continue;
-			}
+		rate = entry->ra_info.curr_tx_rate;
+		phydm_print_rate_2_buff(dm, rate, dbg_buf, PHYDM_SNPRINT_SIZE);
+		PHYDM_DBG(dm, DBG_CMN, "TxRate[%d]=%s (0x%x)\n",
+			  macid, dbg_buf, entry->ra_info.curr_tx_rate);
 
-			phydm_macid = (p_dm->phydm_macid_table[macid]);
-			PHYDM_DBG(p_dm, ODM_COMP_COMMON, ("TxRate[%d]:", macid));
-			phydm_print_rate(p_dm, p_entry->ra_info.curr_tx_rate, ODM_COMP_COMMON);
+		client_cnt++;
 
-			client_cnt++;
+		if (client_cnt >= dm->number_linked_client)
+			break;
+	}
 
-			if (client_cnt >= p_dm->number_linked_client)
-				break;
+	PHYDM_DBG(dm, DBG_CMN,
+		  "TP {Tx, Rx, Total} = {%d, %d, %d}Mbps, Traffic_Load=(%d))\n",
+		  dm->tx_tp, dm->rx_tp, dm->total_tp, dm->traffic_load);
+
+	PHYDM_DBG(dm, DBG_CMN, "CFO_avg=((%d kHz)), CFO_traking = ((%s%d))\n",
+		  cfo_t->CFO_ave_pre,
+		  ((cfo_t->crystal_cap > cfo_t->def_x_cap) ? "+" : "-"),
+		  DIFF_2(cfo_t->crystal_cap, cfo_t->def_x_cap));
+
+	/* @CFO report */
+	switch (dm->ic_ip_series) {
+	#ifdef PHYDM_IC_JGR3_SERIES_SUPPORT
+	case PHYDM_IC_JGR3:
+		PHYDM_DBG(dm, DBG_CMN, "cfo_tail = {%d, %d, %d, %d}\n",
+			  dbg_t->cfo_tail[0], dbg_t->cfo_tail[1],
+			  dbg_t->cfo_tail[2], dbg_t->cfo_tail[3]);
+		break;
+	#endif
+	default:
+		phydm_get_cfo_info(dm, &cfo);
+		for (i = 0; i < dm->num_rf_path; i++) {
+			PHYDM_DBG(dm, DBG_CMN,
+				  "CFO[%d] {S, L, Sec, Acq, End} = {%d, %d, %d, %d, %d}\n",
+				  i, cfo.cfo_rpt_s[i], cfo.cfo_rpt_l[i],
+				  cfo.cfo_rpt_sec[i], cfo.cfo_rpt_acq[i],
+				  cfo.cfo_rpt_end[i]);
 		}
+		break;
+	}
 
-		PHYDM_DBG(p_dm, ODM_COMP_COMMON, ("TP {Tx, Rx, Total} = {%d, %d, %d}Mbps, Traffic_Load=(%d))\n",
-			p_dm->tx_tp, p_dm->rx_tp, p_dm->total_tp, p_dm->traffic_load));
-
-		tmp_val_u1 = (p_cfo_track->crystal_cap > p_cfo_track->def_x_cap) ? (p_cfo_track->crystal_cap - p_cfo_track->def_x_cap) : (p_cfo_track->def_x_cap - p_cfo_track->crystal_cap);
-		PHYDM_DBG(p_dm, ODM_COMP_COMMON, ("CFO_avg = ((%d kHz)) , CFO_tracking = ((%s%d))\n",
-			p_cfo_track->CFO_ave_pre, ((p_cfo_track->crystal_cap > p_cfo_track->def_x_cap) ? "+" : "-"), tmp_val_u1));
+/* @Condition number */
+#if (RTL8822B_SUPPORT)
+	if (dm->support_ic_type == ODM_RTL8822B) {
+		PHYDM_DBG(dm, DBG_CMN, "Condi_Num=((%d.%.4d)), %d\n",
+			  dbg_t->condi_num >> 4,
+			  phydm_show_fraction_num(dbg_t->condi_num & 0xf, 4),
+			  dbg_t->condi_num);
+	}
+#endif
+#ifdef PHYSTS_3RD_TYPE_SUPPORT
+	if (dm->support_ic_type & PHYSTS_3RD_TYPE_IC) {
+		PHYDM_DBG(dm, DBG_CMN, "Condi_Num=((%d.%4d dB))\n",
+			  dbg_t->condi_num >> 1,
+			  phydm_show_fraction_num(dbg_t->condi_num & 0x1, 1));
+	}
+#endif
 
-		/* Condition number */
-	#if (RTL8822B_SUPPORT == 1)
-		if (p_dm->support_ic_type == ODM_RTL8822B) {
-			tmp_val = phydm_get_condition_number_8822B(p_dm);
-			PHYDM_DBG(p_dm, ODM_COMP_COMMON, ("Condi_Num=((%d))\n", tmp_val));
-		}
-	#endif
+#if (ODM_PHY_STATUS_NEW_TYPE_SUPPORT || defined(PHYSTS_3RD_TYPE_SUPPORT))
+	/*STBC or LDPC pkt*/
+	if (dm->support_ic_type & (PHYSTS_2ND_TYPE_IC | PHYSTS_3RD_TYPE_IC))
+		PHYDM_DBG(dm, DBG_CMN, "Coding: LDPC=((%s)), STBC=((%s))\n",
+			  (dbg_t->is_ldpc_pkt) ? "Y" : "N",
+			  (dbg_t->is_stbc_pkt) ? "Y" : "N");
+#endif
+}
 
-	#if (ODM_PHY_STATUS_NEW_TYPE_SUPPORT == 1)
-		/*STBC or LDPC pkt*/
-		if (p_dm->support_ic_type & ODM_IC_PHY_STATUE_NEW_TYPE)
-			PHYDM_DBG(p_dm, ODM_COMP_COMMON, ("Coding: LDPC=((%s)), STBC=((%s))\n", (p_dm->phy_dbg_info.is_ldpc_pkt) ? "Y" : "N", (p_dm->phy_dbg_info.is_stbc_pkt) ? "Y" : "N"));
-	#endif
-	} else
-		PHYDM_DBG(p_dm, ODM_COMP_COMMON, ("No Link !!!\n"));
+void phydm_dm_summary(void *dm_void, u8 macid)
+{
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct phydm_dig_struct *dig_t = &dm->dm_dig_table;
+	struct phydm_cfo_track_struct *cfo_t = &dm->dm_cfo_track;
+	struct cmn_sta_info *sta = NULL;
+	struct ra_sta_info *ra = NULL;
+	struct dtp_info *dtp = NULL;
+	u64 comp = dm->support_ability;
+	u64 pause_comp = dm->pause_ability;
+
+	if (!(dm->debug_components & DBG_DM_SUMMARY))
+		return;
 
-	PHYDM_DBG(p_dm, ODM_COMP_COMMON, ("[CCA Cnt] {CCK, OFDM, Total} = {%d, %d, %d}\n",
-		false_alm_cnt->cnt_cck_cca, false_alm_cnt->cnt_ofdm_cca, false_alm_cnt->cnt_cca_all));
+	if (!dm->is_linked) {
+		pr_debug("[%s]No Link !!!\n", __func__);
+		return;
+	}
 
-	PHYDM_DBG(p_dm, ODM_COMP_COMMON, ("[FA Cnt] {CCK, OFDM, Total} = {%d, %d, %d}\n",
-		false_alm_cnt->cnt_cck_fail, false_alm_cnt->cnt_ofdm_fail, false_alm_cnt->cnt_all));
+	sta = dm->phydm_sta_info[macid];
 
-	#if (ODM_IC_11N_SERIES_SUPPORT == 1)
-	if (p_dm->support_ic_type & ODM_IC_11N_SERIES) {
-		PHYDM_DBG(p_dm, ODM_COMP_COMMON, ("[OFDM FA Detail] Parity_Fail = (( %d )), Rate_Illegal = (( %d )), CRC8_fail = (( %d )), Mcs_fail = (( %d )), Fast_Fsync = (( %d )), SB_Search_fail = (( %d ))\n",
-			false_alm_cnt->cnt_parity_fail, false_alm_cnt->cnt_rate_illegal, false_alm_cnt->cnt_crc8_fail, false_alm_cnt->cnt_mcs_fail, false_alm_cnt->cnt_fast_fsync, false_alm_cnt->cnt_sb_search_fail));
+	if (!is_sta_active(sta)) {
+		pr_debug("[Warning] %s invalid STA, macid=%d\n",
+			 __func__, macid);
+		return;
 	}
-	#endif
 
-	PHYDM_DBG(p_dm, ODM_COMP_COMMON, ("is_linked = %d, Num_client = %d, rssi_min = %d, IGI = 0x%x, bNoisy=%d\n\n",
-		p_dm->is_linked, p_dm->number_linked_client, p_dm->rssi_min, p_dig_t->cur_ig_value, p_dm->noisy_decision));
+	ra = &sta->ra_info;
+	dtp = &sta->dtp_stat;
+	pr_debug("[%s]===========>\n", __func__);
+
+	pr_debug("00.(%s) %-12s: IGI=0x%x, Dyn_Rng=0x%x~0x%x, FA_th={%d,%d,%d}\n",
+		 ((comp & ODM_BB_DIG) ?
+		 ((pause_comp & ODM_BB_DIG) ? "P" : "V") : "."),
+		 "DIG",
+		 dig_t->cur_ig_value,
+		 dig_t->rx_gain_range_min, dig_t->rx_gain_range_max,
+		 dig_t->fa_th[0], dig_t->fa_th[1], dig_t->fa_th[2]);
+
+	pr_debug("01.(%s) %-12s: rssi_lv=%d, mask=0x%llx\n",
+		 ((comp & ODM_BB_RA_MASK) ?
+		 ((pause_comp & ODM_BB_RA_MASK) ? "P" : "V") : "."),
+		 "RaMask",
+		 ra->rssi_level, ra->ramask);
+
+#ifdef CONFIG_DYNAMIC_TX_TWR
+	pr_debug("02.(%s) %-12s: pwr_lv=%d\n",
+		 ((comp & ODM_BB_DYNAMIC_TXPWR) ?
+		 ((pause_comp & ODM_BB_DYNAMIC_TXPWR) ? "P" : "V") : "."),
+		 "DynTxPwr",
+		 dtp->sta_tx_high_power_lvl);
+#endif
+
+	pr_debug("05.(%s) %-12s: cck_pd_lv=%d\n",
+		 ((comp & ODM_BB_CCK_PD) ?
+		 ((pause_comp & ODM_BB_CCK_PD) ? "P" : "V") : "."),
+		 "CCK_PD", dm->dm_cckpd_table.cck_pd_lv);
+
+#ifdef CONFIG_PHYDM_ANTENNA_DIVERSITY
+	pr_debug("06.(%s) %-12s: div_type=%d, curr_ant=%s\n",
+		 ((comp & ODM_BB_ANT_DIV) ?
+		 ((pause_comp & ODM_BB_ANT_DIV) ? "P" : "V") : "."),
+		 "ANT_DIV",
+		 dm->ant_div_type,
+		 (dm->dm_fat_table.rx_idle_ant == MAIN_ANT) ? "MAIN" : "AUX");
+#endif
+
+#ifdef PHYDM_POWER_TRAINING_SUPPORT
+	pr_debug("08.(%s) %-12s: PT_score=%d, disable_PT=%d\n",
+		 ((comp & ODM_BB_PWR_TRAIN) ?
+		 ((pause_comp & ODM_BB_PWR_TRAIN) ? "P" : "V") : "."),
+		 "PwrTrain",
+		 dm->pow_train_table.pow_train_score,
+		 dm->is_disable_power_training);
+#endif
 
+#ifdef CONFIG_PHYDM_DFS_MASTER
+	pr_debug("11.(%s) %-12s: dbg_mode=%d, region_domain=%d\n",
+		 ((comp & ODM_BB_DFS) ?
+		 ((pause_comp & ODM_BB_DFS) ? "P" : "V") : "."),
+		 "DFS",
+		 dm->dfs.dbg_mode, dm->dfs_region_domain);
+#endif
+#ifdef PHYDM_SUPPORT_ADAPTIVITY
+	pr_debug("13.(%s) %-12s: th{l2h, h2l}={%d, %d}, edcca_flag=%d\n",
+		 ((comp & ODM_BB_ADAPTIVITY) ?
+		 ((pause_comp & ODM_BB_ADAPTIVITY) ? "P" : "V") : "."),
+		 "Adaptivity",
+		 dm->adaptivity.th_l2h, dm->adaptivity.th_h2l,
+		 dm->false_alm_cnt.edcca_flag);
+#endif
+	pr_debug("14.(%s) %-12s: CFO_avg=%d kHz, CFO_traking=%s%d\n",
+		 ((comp & ODM_BB_CFO_TRACKING) ?
+		 ((pause_comp & ODM_BB_CFO_TRACKING) ? "P" : "V") : "."),
+		 "CfoTrack",
+		 cfo_t->CFO_ave_pre,
+		 ((cfo_t->crystal_cap > cfo_t->def_x_cap) ? "+" : "-"),
+		 DIFF_2(cfo_t->crystal_cap, cfo_t->def_x_cap));
+
+	pr_debug("15.(%s) %-12s: ratio{nhm, clm}={%d, %d}\n",
+		 ((comp & ODM_BB_ENV_MONITOR) ?
+		 ((pause_comp & ODM_BB_ENV_MONITOR) ? "P" : "V") : "."),
+		 "EnvMntr",
+		 dm->dm_ccx_info.nhm_ratio, dm->dm_ccx_info.clm_ratio);
+
+#ifdef PHYDM_PRIMARY_CCA
+	pr_debug("16.(%s) %-12s: CCA @ (%s SB)\n",
+		 ((comp & ODM_BB_PRIMARY_CCA) ?
+		 ((pause_comp & ODM_BB_PRIMARY_CCA) ? "P" : "V") : "."),
+		 "PriCCA",
+		 ((dm->dm_pri_cca.mf_state == MF_USC_LSC) ? "D" :
+		 ((dm->dm_pri_cca.mf_state == MF_LSC) ? "L" : "U")));
+#endif
+#ifdef CONFIG_ADAPTIVE_SOML
+	pr_debug("17.(%s) %-12s: soml_en = %s\n",
+		 ((comp & ODM_BB_ADAPTIVE_SOML) ?
+		 ((pause_comp & ODM_BB_ADAPTIVE_SOML) ? "P" : "V") : "."),
+		 "A-SOML",
+		 (dm->dm_soml_table.soml_last_state == SOML_ON) ?
+		 "ON" : "OFF");
+#endif
+#ifdef PHYDM_LNA_SAT_CHK_SUPPORT
+	pr_debug("18.(%s) %-12s:\n",
+		 ((comp & ODM_BB_LNA_SAT_CHK) ?
+		 ((pause_comp & ODM_BB_LNA_SAT_CHK) ? "P" : "V") : "."),
+		 "LNA_SAT_CHK");
 #endif
 }
 
+void phydm_basic_dbg_message(void *dm_void)
+{
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct phydm_fa_struct *fa_t = &dm->false_alm_cnt;
+
+	/*if (!(dm->debug_components & DBG_CMN))*/
+	/*	return;				*/
+	
+
+	if (dm->cmn_dbg_msg_cnt >= dm->cmn_dbg_msg_period) {
+		dm->cmn_dbg_msg_cnt = PHYDM_WATCH_DOG_PERIOD;
+	} else {
+		dm->cmn_dbg_msg_cnt += PHYDM_WATCH_DOG_PERIOD;
+		return;
+	}
+
+	PHYDM_DBG(dm, DBG_CMN, "[%s] System up time: ((%d sec))---->\n",
+		  __func__, dm->phydm_sys_up_time);
+
+	if (dm->is_linked)
+		phydm_basic_dbg_msg_linked(dm);
+	else
+		PHYDM_DBG(dm, DBG_CMN, "No Link !!!\n");
+
+	PHYDM_DBG(dm, DBG_CMN, "[CCA Cnt] {CCK, OFDM, Total} = {%d, %d, %d}\n",
+		  fa_t->cnt_cck_cca, fa_t->cnt_ofdm_cca, fa_t->cnt_cca_all);
+
+	PHYDM_DBG(dm, DBG_CMN, "[FA Cnt] {CCK, OFDM, Total} = {%d, %d, %d}\n",
+		  fa_t->cnt_cck_fail, fa_t->cnt_ofdm_fail, fa_t->cnt_all);
+
+	PHYDM_DBG(dm, DBG_CMN,
+		  "[OFDM FA Detail] Parity_Fail=%d, Rate_Illegal=%d, CRC8=%d, MCS_fail=%d, Fast_sync=%d, SB_Search_fail=%d\n",
+		  fa_t->cnt_parity_fail, fa_t->cnt_rate_illegal,
+		  fa_t->cnt_crc8_fail, fa_t->cnt_mcs_fail,
+		  fa_t->cnt_fast_fsync, fa_t->cnt_sb_search_fail);
+
+#if (ODM_IC_11AC_SERIES_SUPPORT || defined(PHYDM_IC_JGR3_SERIES_SUPPORT))
+	if (dm->support_ic_type & (ODM_IC_11AC_SERIES | ODM_IC_JGR3_SERIES)) {
+		PHYDM_DBG(dm, DBG_CMN,
+			  "[OFDM FA Detail VHT] CRC8_VHT=%d, MCS_Fail_VHT=%d\n",
+			  fa_t->cnt_crc8_fail_vht, fa_t->cnt_mcs_fail_vht);
+	}
+#endif
+
+	PHYDM_DBG(dm, DBG_CMN,
+		  "is_linked = %d, Num_client = %d, rssi_min = %d, IGI = 0x%x, bNoisy=%d\n\n",
+		  dm->is_linked, dm->number_linked_client, dm->rssi_min,
+		  dm->dm_dig_table.cur_ig_value, dm->noisy_decision);
+}
 
-void phydm_basic_profile(
-	void			*p_dm_void,
-	u32			*_used,
-	char				*output,
-	u32			*_out_len
-)
+void phydm_basic_profile(void *dm_void, u32 *_used, char *output, u32 *_out_len)
 {
 #ifdef CONFIG_PHYDM_DEBUG_FUNCTION
-	struct PHY_DM_STRUCT		*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	char  *cut = NULL;
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	char *cut = NULL;
 	char *ic_type = NULL;
 	u32 used = *_used;
 	u32 out_len = *_out_len;
-	u32	date = 0;
-	char	*commit_by = NULL;
-	u32	release_ver = 0;
+	u32 date = 0;
+	char *commit_by = NULL;
+	u32 release_ver = 0;
 
-	PHYDM_SNPRINTF((output + used, out_len - used, "%-35s\n", "% Basic Profile %"));
+	PDM_SNPF(out_len, used, output + used, out_len - used, "%-35s\n",
+		 "% Basic Profile %");
 
-	if (p_dm->support_ic_type == ODM_RTL8188E) {
-#if (RTL8188E_SUPPORT == 1)
+	if (dm->support_ic_type == ODM_RTL8188E) {
+#if (RTL8188E_SUPPORT)
 		ic_type = "RTL8188E";
 		date = RELEASE_DATE_8188E;
 		commit_by = COMMIT_BY_8188E;
 		release_ver = RELEASE_VERSION_8188E;
 #endif
-	}
-#if (RTL8812A_SUPPORT == 1)
-	else if (p_dm->support_ic_type == ODM_RTL8812) {
+#if (RTL8812A_SUPPORT)
+	} else if (dm->support_ic_type == ODM_RTL8812) {
 		ic_type = "RTL8812A";
 		date = RELEASE_DATE_8812A;
 		commit_by = COMMIT_BY_8812A;
 		release_ver = RELEASE_VERSION_8812A;
-	}
 #endif
-#if (RTL8821A_SUPPORT == 1)
-	else if (p_dm->support_ic_type == ODM_RTL8821) {
+#if (RTL8821A_SUPPORT)
+	} else if (dm->support_ic_type == ODM_RTL8821) {
 		ic_type = "RTL8821A";
 		date = RELEASE_DATE_8821A;
 		commit_by = COMMIT_BY_8821A;
 		release_ver = RELEASE_VERSION_8821A;
-	}
 #endif
-#if (RTL8192E_SUPPORT == 1)
-	else if (p_dm->support_ic_type == ODM_RTL8192E) {
+#if (RTL8192E_SUPPORT)
+	} else if (dm->support_ic_type == ODM_RTL8192E) {
 		ic_type = "RTL8192E";
 		date = RELEASE_DATE_8192E;
 		commit_by = COMMIT_BY_8192E;
 		release_ver = RELEASE_VERSION_8192E;
-	}
 #endif
-#if (RTL8723B_SUPPORT == 1)
-	else if (p_dm->support_ic_type == ODM_RTL8723B) {
+#if (RTL8723B_SUPPORT)
+	} else if (dm->support_ic_type == ODM_RTL8723B) {
 		ic_type = "RTL8723B";
 		date = RELEASE_DATE_8723B;
 		commit_by = COMMIT_BY_8723B;
 		release_ver = RELEASE_VERSION_8723B;
-	}
 #endif
-#if (RTL8814A_SUPPORT == 1)
-	else if (p_dm->support_ic_type == ODM_RTL8814A) {
+#if (RTL8814A_SUPPORT)
+	} else if (dm->support_ic_type == ODM_RTL8814A) {
 		ic_type = "RTL8814A";
 		date = RELEASE_DATE_8814A;
 		commit_by = COMMIT_BY_8814A;
 		release_ver = RELEASE_VERSION_8814A;
-	}
 #endif
-#if (RTL8881A_SUPPORT == 1)
-	else if (p_dm->support_ic_type == ODM_RTL8881A) {
+#if (RTL8881A_SUPPORT)
+	} else if (dm->support_ic_type == ODM_RTL8881A) {
 		ic_type = "RTL8881A";
-		/**/
-	}
 #endif
-#if (RTL8822B_SUPPORT == 1)
-	else if (p_dm->support_ic_type == ODM_RTL8822B) {
+#if (RTL8822B_SUPPORT)
+	} else if (dm->support_ic_type == ODM_RTL8822B) {
 		ic_type = "RTL8822B";
 		date = RELEASE_DATE_8822B;
 		commit_by = COMMIT_BY_8822B;
 		release_ver = RELEASE_VERSION_8822B;
-	}
 #endif
-#if (RTL8197F_SUPPORT == 1)
-	else if (p_dm->support_ic_type == ODM_RTL8197F) {
+#if (RTL8197F_SUPPORT)
+	} else if (dm->support_ic_type == ODM_RTL8197F) {
 		ic_type = "RTL8197F";
 		date = RELEASE_DATE_8197F;
 		commit_by = COMMIT_BY_8197F;
 		release_ver = RELEASE_VERSION_8197F;
-	}
 #endif
-
-#if (RTL8703B_SUPPORT == 1)
-	else if (p_dm->support_ic_type == ODM_RTL8703B) {
-
+#if (RTL8703B_SUPPORT)
+	} else if (dm->support_ic_type == ODM_RTL8703B) {
 		ic_type = "RTL8703B";
 		date = RELEASE_DATE_8703B;
 		commit_by = COMMIT_BY_8703B;
 		release_ver = RELEASE_VERSION_8703B;
-
-	}
 #endif
-#if (RTL8195A_SUPPORT == 1)
-	else if (p_dm->support_ic_type == ODM_RTL8195A) {
+#if (RTL8195A_SUPPORT)
+	} else if (dm->support_ic_type == ODM_RTL8195A) {
 		ic_type = "RTL8195A";
-		/**/
-	}
 #endif
-#if (RTL8188F_SUPPORT == 1)
-	else if (p_dm->support_ic_type == ODM_RTL8188F) {
+#if (RTL8188F_SUPPORT)
+	} else if (dm->support_ic_type == ODM_RTL8188F) {
 		ic_type = "RTL8188F";
 		date = RELEASE_DATE_8188F;
 		commit_by = COMMIT_BY_8188F;
 		release_ver = RELEASE_VERSION_8188F;
-	}
 #endif
-#if (RTL8723D_SUPPORT == 1)
-	else if (p_dm->support_ic_type == ODM_RTL8723D) {
+#if (RTL8723D_SUPPORT)
+	} else if (dm->support_ic_type == ODM_RTL8723D) {
 		ic_type = "RTL8723D";
 		date = RELEASE_DATE_8723D;
 		commit_by = COMMIT_BY_8723D;
 		release_ver = RELEASE_VERSION_8723D;
-		/**/
-	}
 #endif
+	}
 
-/* JJ ADD 20161014 */
-#if (RTL8710B_SUPPORT == 1)
-	else if (p_dm->support_ic_type == ODM_RTL8710B) {
+/* @JJ ADD 20161014 */
+#if (RTL8710B_SUPPORT)
+	else if (dm->support_ic_type == ODM_RTL8710B) {
 		ic_type = "RTL8710B";
 		date = RELEASE_DATE_8710B;
 		commit_by = COMMIT_BY_8710B;
 		release_ver = RELEASE_VERSION_8710B;
-		/**/
 	}
 #endif
 
-#if (RTL8821C_SUPPORT == 1)
-	else if (p_dm->support_ic_type == ODM_RTL8821C) {
+#if (RTL8721D_SUPPORT)
+	else if (dm->support_ic_type == ODM_RTL8721D) {
+		ic_type = "RTL8721D";
+		date = RELEASE_DATE_8721D;
+		commit_by = COMMIT_BY_8721D;
+		release_ver = RELEASE_VERSION_8721D;
+	}
+#endif
+#if (RTL8821C_SUPPORT)
+	else if (dm->support_ic_type == ODM_RTL8821C) {
 		ic_type = "RTL8821C";
 		date = RELEASE_DATE_8821C;
 		commit_by = COMMIT_BY_8821C;
 		release_ver = RELEASE_VERSION_8821C;
 	}
 #endif
-	PHYDM_SNPRINTF((output + used, out_len - used, "  %-35s: %s (MP Chip: %s)\n", "IC type", ic_type, p_dm->is_mp_chip ? "Yes" : "No"));
 
-	if (p_dm->cut_version == ODM_CUT_A)
+/*@jj add 20170822*/
+#if (RTL8192F_SUPPORT)
+	else if (dm->support_ic_type == ODM_RTL8192F) {
+		ic_type = "RTL8192F";
+		date = RELEASE_DATE_8192F;
+		commit_by = COMMIT_BY_8192F;
+		release_ver = RELEASE_VERSION_8192F;
+	}
+#endif
+
+#if (RTL8198F_SUPPORT)
+	else if (dm->support_ic_type == ODM_RTL8198F) {
+		ic_type = "RTL8198F";
+		date = RELEASE_DATE_8198F;
+		commit_by = COMMIT_BY_8198F;
+		release_ver = RELEASE_VERSION_8198F;
+	}
+#endif
+
+#if (RTL8822C_SUPPORT)
+	else if (dm->support_ic_type == ODM_RTL8822C) {
+		ic_type = "RTL8822C";
+		date = RELEASE_DATE_8822C;
+		commit_by = COMMIT_BY_8822C;
+		release_ver = RELEASE_VERSION_8822C;
+	}
+#endif
+
+#if (RTL8812F_SUPPORT)
+	else if (dm->support_ic_type == ODM_RTL8812F) {
+		ic_type = "RTL8812F";
+		date = RELEASE_DATE_8812F;
+		commit_by = COMMIT_BY_8812F;
+		release_ver = RELEASE_VERSION_8812F;
+	}
+#endif
+	PDM_SNPF(out_len, used, output + used, out_len - used,
+		 "  %-35s: %s (MP Chip: %s)\n", "IC type", ic_type,
+		 dm->is_mp_chip ? "Yes" : "No");
+
+	if (dm->cut_version == ODM_CUT_A)
 		cut = "A";
-	else if (p_dm->cut_version == ODM_CUT_B)
+	else if (dm->cut_version == ODM_CUT_B)
 		cut = "B";
-	else if (p_dm->cut_version == ODM_CUT_C)
+	else if (dm->cut_version == ODM_CUT_C)
 		cut = "C";
-	else if (p_dm->cut_version == ODM_CUT_D)
+	else if (dm->cut_version == ODM_CUT_D)
 		cut = "D";
-	else if (p_dm->cut_version == ODM_CUT_E)
+	else if (dm->cut_version == ODM_CUT_E)
 		cut = "E";
-	else if (p_dm->cut_version == ODM_CUT_F)
+	else if (dm->cut_version == ODM_CUT_F)
 		cut = "F";
-	else if (p_dm->cut_version == ODM_CUT_I)
+	else if (dm->cut_version == ODM_CUT_I)
 		cut = "I";
 
-	PHYDM_SNPRINTF((output + used, out_len - used, "  %-35s: %d\n", "RFE type", p_dm->rfe_type));
-	PHYDM_SNPRINTF((output + used, out_len - used, "  %-35s: %s\n", "Cut Ver", cut));
-	PHYDM_SNPRINTF((output + used, out_len - used, "  %-35s: %d\n", "PHY Para Ver", odm_get_hw_img_version(p_dm)));
-	PHYDM_SNPRINTF((output + used, out_len - used, "  %-35s: %d\n", "PHY Para Commit date", date));
-	PHYDM_SNPRINTF((output + used, out_len - used, "  %-35s: %s\n", "PHY Para Commit by", commit_by));
-	PHYDM_SNPRINTF((output + used, out_len - used, "  %-35s: %d\n", "PHY Para Release Ver", release_ver));
-
-#if (DM_ODM_SUPPORT_TYPE & ODM_WIN)
-	{
-		struct _ADAPTER		*adapter = p_dm->adapter;
-		PHYDM_SNPRINTF((output + used, out_len - used, "  %-35s: %d (Subversion: %d)\n", "FW Ver", adapter->MgntInfo.FirmwareVersion, adapter->MgntInfo.FirmwareSubVersion));
-	}
-#elif (DM_ODM_SUPPORT_TYPE & ODM_AP)
-	{
-		struct rtl8192cd_priv *priv = p_dm->priv;
-		PHYDM_SNPRINTF((output + used, out_len - used, "  %-35s: %d (Subversion: %d)\n", "FW Ver", priv->pshare->fw_version, priv->pshare->fw_sub_version));
-	}
-#elif (DM_ODM_SUPPORT_TYPE == ODM_CE) && defined(DM_ODM_CE_MAC80211)
-	{
-		struct rtl_priv *rtlpriv = (struct rtl_priv *)p_dm->adapter;
-		struct rtl_hal *rtlhal = rtl_hal(rtlpriv);
-
-		PHYDM_SNPRINTF((output + used, out_len - used, "  %-35s: %d (Subversion: %d)\n", "FW Ver", rtlhal->fw_version, rtlhal->fw_subversion));
-	}
-#else
-	{
-		struct _ADAPTER		*adapter = p_dm->adapter;
-		HAL_DATA_TYPE		*p_hal_data = GET_HAL_DATA(adapter);
-		PHYDM_SNPRINTF((output + used, out_len - used, "  %-35s: %d (Subversion: %d)\n", "FW Ver", p_hal_data->firmware_version, p_hal_data->firmware_sub_version));
-	}
-#endif
-	/* 1 PHY DM version List */
-	PHYDM_SNPRINTF((output + used, out_len - used, "%-35s\n", "% PHYDM version %"));
-	PHYDM_SNPRINTF((output + used, out_len - used, "  %-35s: %s\n", "Code base", PHYDM_CODE_BASE));
-	PHYDM_SNPRINTF((output + used, out_len - used, "  %-35s: %s\n", "Release Date", PHYDM_RELEASE_DATE));
-	PHYDM_SNPRINTF((output + used, out_len - used, "  %-35s: %s\n", "Adaptivity", ADAPTIVITY_VERSION));
-	PHYDM_SNPRINTF((output + used, out_len - used, "  %-35s: %s\n", "DIG", DIG_VERSION));
-	PHYDM_SNPRINTF((output + used, out_len - used, "  %-35s: %s\n", "CFO Tracking", CFO_TRACKING_VERSION));
-	PHYDM_SNPRINTF((output + used, out_len - used, "  %-35s: %s\n", "AntDiv", ANTDIV_VERSION));
-	PHYDM_SNPRINTF((output + used, out_len - used, "  %-35s: %s\n", "Dynamic TxPower", DYNAMIC_TXPWR_VERSION));
-	PHYDM_SNPRINTF((output + used, out_len - used, "  %-35s: %s\n", "RA Info", RAINFO_VERSION));
+	PDM_SNPF(out_len, used, output + used, out_len - used, "  %-35s: %d\n",
+		 "RFE type", dm->rfe_type);
+	PDM_SNPF(out_len, used, output + used, out_len - used, "  %-35s: %s\n",
+		 "Cut Ver", cut);
+	PDM_SNPF(out_len, used, output + used, out_len - used, "  %-35s: %d\n",
+		 "PHY Para Ver", odm_get_hw_img_version(dm));
+	PDM_SNPF(out_len, used, output + used, out_len - used, "  %-35s: %d\n",
+		 "PHY Para Commit date", date);
+	PDM_SNPF(out_len, used, output + used, out_len - used, "  %-35s: %s\n",
+		 "PHY Para Commit by", commit_by);
+	PDM_SNPF(out_len, used, output + used, out_len - used, "  %-35s: %d\n",
+		 "PHY Para Release Ver", release_ver);
+
+	PDM_SNPF(out_len, used, output + used, out_len - used,
+		 "  %-35s: %d (Subversion: %d)\n", "FW Ver", dm->fw_version,
+		 dm->fw_sub_version);
+
+	/* @1 PHY DM version List */
+	PDM_SNPF(out_len, used, output + used, out_len - used, "%-35s\n",
+		 "% PHYDM version %");
+	PDM_SNPF(out_len, used, output + used, out_len - used, "  %-35s: %s\n",
+		 "Code base", PHYDM_CODE_BASE);
+	PDM_SNPF(out_len, used, output + used, out_len - used, "  %-35s: %s\n",
+		 "Release Date", PHYDM_RELEASE_DATE);
+	PDM_SNPF(out_len, used, output + used, out_len - used, "  %-35s: %s\n",
+		 "Adaptivity", ADAPTIVITY_VERSION);
+	PDM_SNPF(out_len, used, output + used, out_len - used, "  %-35s: %s\n",
+		 "DIG", DIG_VERSION);
+	PDM_SNPF(out_len, used, output + used, out_len - used, "  %-35s: %s\n",
+		 "CFO Tracking", CFO_TRACKING_VERSION);
+#ifdef CONFIG_PHYDM_ANTENNA_DIVERSITY
+	PDM_SNPF(out_len, used, output + used, out_len - used, "  %-35s: %s\n",
+		 "AntDiv", ANTDIV_VERSION);
+#endif
+#ifdef CONFIG_DYNAMIC_TX_TWR
+	PDM_SNPF(out_len, used, output + used, out_len - used, "  %-35s: %s\n",
+		 "Dynamic TxPower", DYNAMIC_TXPWR_VERSION);
+#endif
+	PDM_SNPF(out_len, used, output + used, out_len - used, "  %-35s: %s\n",
+		 "RA Info", RAINFO_VERSION);
 #if (DM_ODM_SUPPORT_TYPE & ODM_WIN)
-	PHYDM_SNPRINTF((output + used, out_len - used, "  %-35s: %s\n", "AntDetect", ANTDECT_VERSION));
+	PDM_SNPF(out_len, used, output + used, out_len - used, "  %-35s: %s\n",
+		 "AntDetect", ANTDECT_VERSION);
+#endif
+#ifdef CONFIG_PATH_DIVERSITY
+	PDM_SNPF(out_len, used, output + used, out_len - used, "  %-35s: %s\n",
+		 "PathDiv", PATHDIV_VERSION);
+#endif
+#ifdef CONFIG_ADAPTIVE_SOML
+	PDM_SNPF(out_len, used, output + used, out_len - used, "  %-35s: %s\n",
+		 "Adaptive SOML", ADAPTIVE_SOML_VERSION);
 #endif
-	PHYDM_SNPRINTF((output + used, out_len - used, "  %-35s: %s\n", "ACS", ACS_VERSION));
-	PHYDM_SNPRINTF((output + used, out_len - used, "  %-35s: %s\n", "PathDiv", PATHDIV_VERSION));
-	PHYDM_SNPRINTF((output + used, out_len - used, "  %-35s: %s\n", "LA mode", DYNAMIC_LA_MODE));
-	PHYDM_SNPRINTF((output + used, out_len - used, "  %-35s: %s\n", "Primary CCA", PRIMARYCCA_VERSION));
-	PHYDM_SNPRINTF((output + used, out_len - used, "  %-35s: %s\n", "DFS", DFS_VERSION));
+#if (PHYDM_LA_MODE_SUPPORT)
+	PDM_SNPF(out_len, used, output + used, out_len - used, "  %-35s: %s\n",
+		 "LA mode", DYNAMIC_LA_MODE);
+#endif
+#ifdef PHYDM_PRIMARY_CCA
+	PDM_SNPF(out_len, used, output + used, out_len - used, "  %-35s: %s\n",
+		 "Primary CCA", PRIMARYCCA_VERSION);
+#endif
+	PDM_SNPF(out_len, used, output + used, out_len - used, "  %-35s: %s\n",
+		 "DFS", DFS_VERSION);
 
-#if (RTL8822B_SUPPORT == 1)
-	if (p_dm->support_ic_type & ODM_RTL8822B)
-		PHYDM_SNPRINTF((output + used, out_len - used, "  %-35s: %s\n", "PHY config 8822B", PHY_CONFIG_VERSION_8822B));
+#if (RTL8822B_SUPPORT)
+	if (dm->support_ic_type & ODM_RTL8822B)
+		PDM_SNPF(out_len, used, output + used, out_len - used,
+			 "  %-35s: %s\n", "PHY config 8822B",
+			 PHY_CONFIG_VERSION_8822B);
+
+#endif
+#if (RTL8197F_SUPPORT)
+	if (dm->support_ic_type & ODM_RTL8197F)
+		PDM_SNPF(out_len, used, output + used, out_len - used,
+			 "  %-35s: %s\n", "PHY config 8197F",
+			 PHY_CONFIG_VERSION_8197F);
+#endif
 
+/*@jj add 20170822*/
+#if (RTL8192F_SUPPORT)
+	if (dm->support_ic_type & ODM_RTL8192F)
+		PDM_SNPF(out_len, used, output + used, out_len - used,
+			 "  %-35s: %s\n", "PHY config 8192F",
+			 PHY_CONFIG_VERSION_8192F);
 #endif
-#if (RTL8197F_SUPPORT == 1)
-	if (p_dm->support_ic_type & ODM_RTL8197F)
-		PHYDM_SNPRINTF((output + used, out_len - used, "  %-35s: %s\n", "PHY config 8197F", PHY_CONFIG_VERSION_8197F));
+#if (RTL8721D_SUPPORT)
+	if (dm->support_ic_type & ODM_RTL8721D)
+		PDM_SNPF(out_len, used, output + used, out_len - used,
+			 "  %-35s: %s\n", "PHY config 8721D",
+			 PHY_CONFIG_VERSION_8721D);
 #endif
+
 	*_used = used;
 	*_out_len = out_len;
-#endif /*#if CONFIG_PHYDM_DEBUG_FUNCTION*/
+
+#endif /*@#if CONFIG_PHYDM_DEBUG_FUNCTION*/
 }
 
 #ifdef CONFIG_PHYDM_DEBUG_FUNCTION
-void
-phydm_fw_trace_en_h2c(
-	void		*p_dm_void,
-	boolean		enable,
-	u32		fw_debug_component,
-	u32		monitor_mode,
-	u32		macid
-)
+void phydm_fw_trace_en_h2c(void *dm_void, boolean enable,
+			   u32 fw_dbg_comp, u32 monitor_mode, u32 macid)
 {
-	struct PHY_DM_STRUCT		*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	u8			h2c_parameter[7] = {0};
-	u8			cmd_length;
-
-	if (p_dm->support_ic_type & PHYDM_IC_3081_SERIES) {
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	u8 h2c_parameter[7] = {0};
+	u8 cmd_length;
 
+	if (dm->support_ic_type & PHYDM_IC_3081_SERIES) {
 		h2c_parameter[0] = enable;
-		h2c_parameter[1] = (u8)(fw_debug_component & MASKBYTE0);
-		h2c_parameter[2] = (u8)((fw_debug_component & MASKBYTE1) >> 8);
-		h2c_parameter[3] = (u8)((fw_debug_component & MASKBYTE2) >> 16);
-		h2c_parameter[4] = (u8)((fw_debug_component & MASKBYTE3) >> 24);
+		h2c_parameter[1] = (u8)(fw_dbg_comp & MASKBYTE0);
+		h2c_parameter[2] = (u8)((fw_dbg_comp & MASKBYTE1) >> 8);
+		h2c_parameter[3] = (u8)((fw_dbg_comp & MASKBYTE2) >> 16);
+		h2c_parameter[4] = (u8)((fw_dbg_comp & MASKBYTE3) >> 24);
 		h2c_parameter[5] = (u8)monitor_mode;
 		h2c_parameter[6] = (u8)macid;
 		cmd_length = 7;
 
 	} else {
-
 		h2c_parameter[0] = enable;
 		h2c_parameter[1] = (u8)monitor_mode;
 		h2c_parameter[2] = (u8)macid;
 		cmd_length = 3;
 	}
 
+	PHYDM_DBG(dm, DBG_FW_TRACE,
+		  "[H2C] FW_debug_en: (( %d )), mode: (( %d )), macid: (( %d ))\n",
+		  enable, monitor_mode, macid);
 
-	PHYDM_DBG(p_dm, DBG_FW_TRACE, ("---->\n"));
-	if (monitor_mode == 0)
-		PHYDM_DBG(p_dm, DBG_FW_TRACE, ("[H2C] FW_debug_en: (( %d ))\n", enable));
-	else
-		PHYDM_DBG(p_dm, DBG_FW_TRACE, ("[H2C] FW_debug_en: (( %d )), mode: (( %d )), macid: (( %d ))\n", enable, monitor_mode, macid));
-	odm_fill_h2c_cmd(p_dm, PHYDM_H2C_FW_TRACE_EN, cmd_length, h2c_parameter);
+	odm_fill_h2c_cmd(dm, PHYDM_H2C_FW_TRACE_EN, cmd_length, h2c_parameter);
 }
 
-void
-phydm_get_per_path_txagc(
-	void			*p_dm_void,
-	u8			path,
-	u32			*_used,
-	char				*output,
-	u32			*_out_len
-)
+void phydm_get_per_path_txagc(void *dm_void, u8 path, u32 *_used, char *output,
+			      u32 *_out_len)
 {
-	struct PHY_DM_STRUCT		*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	u8			rate_idx;
-	u8			txagc;
-	u32			used = *_used;
-	u32			out_len = *_out_len;
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	u8 rate_idx;
+	u8 txagc;
+	u32 used = *_used;
+	u32 out_len = *_out_len;
 
 #ifdef PHYDM_COMMON_API_SUPPORT
-	if (((p_dm->support_ic_type & (ODM_RTL8822B | ODM_RTL8197F)) && (path <= RF_PATH_B)) ||
-		((p_dm->support_ic_type & (ODM_RTL8821C)) && (path <= RF_PATH_A))) {
-		for (rate_idx = 0; rate_idx <= 0x53; rate_idx++) {
-			if (rate_idx == ODM_RATE1M)
-				PHYDM_SNPRINTF((output + used, out_len - used, "  %-35s\n", "CCK====>"));
-			else if (rate_idx == ODM_RATE6M)
-				PHYDM_SNPRINTF((output + used, out_len - used, "\n  %-35s\n", "OFDM====>"));
-			else if (rate_idx == ODM_RATEMCS0)
-				PHYDM_SNPRINTF((output + used, out_len - used, "\n  %-35s\n", "HT 1ss====>"));
-			else if (rate_idx == ODM_RATEMCS8)
-				PHYDM_SNPRINTF((output + used, out_len - used, "\n  %-35s\n", "HT 2ss====>"));
-			else if (rate_idx == ODM_RATEMCS16)
-				PHYDM_SNPRINTF((output + used, out_len - used, "\n  %-35s\n", "HT 3ss====>"));
-			else if (rate_idx == ODM_RATEMCS24)
-				PHYDM_SNPRINTF((output + used, out_len - used, "\n  %-35s\n", "HT 4ss====>"));
-			else if (rate_idx == ODM_RATEVHTSS1MCS0)
-				PHYDM_SNPRINTF((output + used, out_len - used, "\n  %-35s\n", "VHT 1ss====>"));
-			else if (rate_idx == ODM_RATEVHTSS2MCS0)
-				PHYDM_SNPRINTF((output + used, out_len - used, "\n  %-35s\n", "VHT 2ss====>"));
-			else if (rate_idx == ODM_RATEVHTSS3MCS0)
-				PHYDM_SNPRINTF((output + used, out_len - used, "\n  %-35s\n", "VHT 3ss====>"));
-			else if (rate_idx == ODM_RATEVHTSS4MCS0)
-				PHYDM_SNPRINTF((output + used, out_len - used, "\n  %-35s\n", "VHT 4ss====>"));
-
-			txagc = phydm_api_get_txagc(p_dm, (enum rf_path) path, rate_idx);
-			if (config_phydm_read_txagc_check(txagc))
-				PHYDM_SNPRINTF((output + used, out_len - used, "  0x%02x    ", txagc));
-			else
-				PHYDM_SNPRINTF((output + used, out_len - used, "  0x%s    ", "xx"));
-		}
+	if (!(dm->support_ic_type & CMN_API_SUPPORT_IC))
+		return;
+
+	if (dm->num_rf_path == 1 && path > RF_PATH_A)
+		return;
+	else if (dm->num_rf_path == 2 && path > RF_PATH_B)
+		return;
+	else if (dm->num_rf_path == 3 && path > RF_PATH_C)
+		return;
+	else if (dm->num_rf_path == 4 && path > RF_PATH_D)
+		return;
+
+	for (rate_idx = 0; rate_idx <= 0x53; rate_idx++) {
+		if (!(dm->support_ic_type & PHYDM_IC_ABOVE_3SS) &&
+		    ((rate_idx >= ODM_RATEMCS16 &&
+		    rate_idx < ODM_RATEVHTSS1MCS0) ||
+		    rate_idx >= ODM_RATEVHTSS3MCS0))
+			continue;
+
+		if (rate_idx == ODM_RATE1M)
+			PDM_SNPF(out_len, used, output + used, out_len - used,
+				 "  %-35s\n", "CCK====>");
+		else if (rate_idx == ODM_RATE6M)
+			PDM_SNPF(out_len, used, output + used, out_len - used,
+				 "\n  %-35s\n", "OFDM====>");
+		else if (rate_idx == ODM_RATEMCS0)
+			PDM_SNPF(out_len, used, output + used, out_len - used,
+				 "\n  %-35s\n", "HT 1ss====>");
+		else if (rate_idx == ODM_RATEMCS8)
+			PDM_SNPF(out_len, used, output + used, out_len - used,
+				 "\n  %-35s\n", "HT 2ss====>");
+		else if (rate_idx == ODM_RATEMCS16)
+			PDM_SNPF(out_len, used, output + used, out_len - used,
+				 "\n  %-35s\n", "HT 3ss====>");
+		else if (rate_idx == ODM_RATEMCS24)
+			PDM_SNPF(out_len, used, output + used, out_len - used,
+				 "\n  %-35s\n", "HT 4ss====>");
+		else if (rate_idx == ODM_RATEVHTSS1MCS0)
+			PDM_SNPF(out_len, used, output + used, out_len - used,
+				 "\n  %-35s\n", "VHT 1ss====>");
+		else if (rate_idx == ODM_RATEVHTSS2MCS0)
+			PDM_SNPF(out_len, used, output + used, out_len - used,
+				 "\n  %-35s\n", "VHT 2ss====>");
+		else if (rate_idx == ODM_RATEVHTSS3MCS0)
+			PDM_SNPF(out_len, used, output + used, out_len - used,
+				 "\n  %-35s\n", "VHT 3ss====>");
+		else if (rate_idx == ODM_RATEVHTSS4MCS0)
+			PDM_SNPF(out_len, used, output + used, out_len - used,
+				 "\n  %-35s\n", "VHT 4ss====>");
+
+		txagc = phydm_api_get_txagc(dm, (enum rf_path)path, rate_idx);
+		if (config_phydm_read_txagc_check(txagc))
+			PDM_SNPF(out_len, used, output + used,
+				 out_len - used, "  0x%02x    ", txagc);
+		else
+			PDM_SNPF(out_len, used, output + used,
+				 out_len - used, "  0x%s    ", "xx");
 	}
 #endif
 
 	*_used = used;
 	*_out_len = out_len;
-
 }
 
-
-void
-phydm_get_txagc(
-	void			*p_dm_void,
-	u32			*_used,
-	char			*output,
-	u32			*_out_len
-)
+void phydm_get_txagc(void *dm_void, u32 *_used, char *output, u32 *_out_len)
 {
-	struct PHY_DM_STRUCT		*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	u32			used = *_used;
-	u32			out_len = *_out_len;
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	u32 used = *_used;
+	u32 out_len = *_out_len;
 
 	/* path-A */
-	PHYDM_SNPRINTF((output + used, out_len - used, "%-35s\n", "path-A===================="));
-	phydm_get_per_path_txagc(p_dm, RF_PATH_A, &used, output, &out_len);
+	PDM_SNPF(out_len, used, output + used, out_len - used, "%-35s\n",
+		 "path-A====================");
+	phydm_get_per_path_txagc(dm, RF_PATH_A, &used, output, &out_len);
 
 	/* path-B */
-	PHYDM_SNPRINTF((output + used, out_len - used, "\n%-35s\n", "path-B===================="));
-	phydm_get_per_path_txagc(p_dm, RF_PATH_B, &used, output, &out_len);
+	PDM_SNPF(out_len, used, output + used, out_len - used, "\n%-35s\n",
+		 "path-B====================");
+	phydm_get_per_path_txagc(dm, RF_PATH_B, &used, output, &out_len);
 
 	/* path-C */
-	PHYDM_SNPRINTF((output + used, out_len - used, "\n%-35s\n", "path-C===================="));
-	phydm_get_per_path_txagc(p_dm, RF_PATH_C, &used, output, &out_len);
+	PDM_SNPF(out_len, used, output + used, out_len - used, "\n%-35s\n",
+		 "path-C====================");
+	phydm_get_per_path_txagc(dm, RF_PATH_C, &used, output, &out_len);
 
 	/* path-D */
-	PHYDM_SNPRINTF((output + used, out_len - used, "\n%-35s\n", "path-D===================="));
-	phydm_get_per_path_txagc(p_dm, RF_PATH_D, &used, output, &out_len);
+	PDM_SNPF(out_len, used, output + used, out_len - used, "\n%-35s\n",
+		 "path-D====================");
+	phydm_get_per_path_txagc(dm, RF_PATH_D, &used, output, &out_len);
 
 	*_used = used;
 	*_out_len = out_len;
-
 }
 
-void
-phydm_set_txagc(
-	void			*p_dm_void,
-	u32			*const dm_value,
-	u32			*_used,
-	char			*output,
-	u32			*_out_len
-)
+void phydm_set_txagc(void *dm_void, u32 *const val, u32 *_used,
+		     char *output, u32 *_out_len)
 {
-	struct PHY_DM_STRUCT		*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	u32			used = *_used;
-	u32			out_len = *_out_len;
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	u32 used = *_used;
+	u32 out_len = *_out_len;
+	u8 i = 0;
+	u32 pow = 0; /*power index*/
+	u8 vht_start_rate = ODM_RATEVHTSS1MCS0;
+	boolean rpt = true;
+	enum rf_path path = RF_PATH_A;
 
-	/*dm_value[1] = path*/
-	/*dm_value[2] = hw_rate*/
-	/*dm_value[3] = power_index*/
+/*@val[1] = path*/
+/*@val[2] = hw_rate*/
+/*@val[3] = power_index*/
 
 #ifdef PHYDM_COMMON_API_SUPPORT
-	if (p_dm->support_ic_type & (ODM_RTL8822B | ODM_RTL8197F | ODM_RTL8821C)) {
-		if (dm_value[1] <= 1) {
-			if ((u8)dm_value[2] != 0xff) {
-				if (phydm_api_set_txagc(p_dm, dm_value[3], (enum rf_path) dm_value[1], (u8)dm_value[2], true))
-					PHYDM_SNPRINTF((output + used, out_len - used, "  %s%d   %s%x%s%x\n", "Write path-", dm_value[1], "rate index-0x", dm_value[2], " = 0x", dm_value[3]));
-				else
-					PHYDM_SNPRINTF((output + used, out_len - used, "  %s%d   %s%x%s\n", "Write path-", (dm_value[1] & 0x1), "rate index-0x", (dm_value[2] & 0x7f), " fail"));
-			} else {
-				u8	i;
-				u32	power_index;
-				boolean	status = true;
-
-				power_index = (dm_value[3] & 0x3f);
-
-				if (p_dm->support_ic_type & (ODM_RTL8822B | ODM_RTL8821C)) {
-					power_index = (power_index << 24) | (power_index << 16) | (power_index << 8) | (power_index);
-
-					for (i = 0; i < ODM_RATEVHTSS2MCS9; i += 4)
-						status = (status & phydm_api_set_txagc(p_dm, power_index, (enum rf_path) dm_value[1], i, false));
-				} else if (p_dm->support_ic_type & ODM_RTL8197F) {
-					for (i = 0; i <= ODM_RATEMCS15; i++)
-						status = (status & phydm_api_set_txagc(p_dm, power_index, (enum rf_path) dm_value[1], i, false));
-				}
+	if (!(dm->support_ic_type & CMN_API_SUPPORT_IC))
+		return;
+
+	path = (enum rf_path)val[1];
 
-				if (status)
-					PHYDM_SNPRINTF((output + used, out_len - used, "  %s%d   %s%x\n", "Write all TXAGC of path-", dm_value[1], " = 0x", dm_value[3]));
-				else
-					PHYDM_SNPRINTF((output + used, out_len - used, "  %s%d   %s\n", "Write all TXAGC of path-", dm_value[1], " fail"));
+	if (val[1] >= dm->num_rf_path) {
+		PDM_SNPF(out_len, used, output + used, out_len - used,
+			 "Write path-%d rate_idx-0x%x fail\n", val[1], val[2]);
+	} else if ((u8)val[2] != 0xff) {
+		if (phydm_api_set_txagc(dm, val[3], path, (u8)val[2], true))
+			PDM_SNPF(out_len, used, output + used, out_len - used,
+				 "Write path-%d rate_idx-0x%x = 0x%x\n",
+				 val[1], val[2], val[3]);
+		else
+			PDM_SNPF(out_len, used, output + used, out_len - used,
+				 "Write path-%d rate index-0x%x fail\n",
+				 val[1], val[2]);
+	} else {
+
+		if (dm->support_ic_type &
+		    (ODM_RTL8822B | ODM_RTL8821C | ODM_RTL8195B)) {
+			pow = (val[3] & 0x3f);
+			pow = BYTE_DUPLICATE_2_DWORD(pow);
+
+			for (i = 0; i < ODM_RATEVHTSS2MCS9; i += 4)
+				rpt &= phydm_api_set_txagc(dm, pow, path, i, 0);
+		} else if (dm->support_ic_type &
+			   (ODM_RTL8197F | ODM_RTL8192F)) {
+			pow = (val[3] & 0x3f);
+			for (i = 0; i <= ODM_RATEMCS15; i++)
+				rpt &= phydm_api_set_txagc(dm, pow, path, i, 0);
+		} else if (dm->support_ic_type & ODM_RTL8198F) {
+			pow = (val[3] & 0x7f);
+			for (i = 0; i <= ODM_RATEVHTSS4MCS9; i++)
+				rpt &= phydm_api_set_txagc(dm, pow, path, i, 0);
+		} else if (dm->support_ic_type &
+			   (ODM_RTL8822C | ODM_RTL8812F)) {
+			pow = (val[3] & 0x7f);
+			for (i = 0; i <= ODM_RATEMCS15; i++)
+				rpt &= phydm_api_set_txagc(dm, pow, path, i, 0);
+			for (i = vht_start_rate; i <= ODM_RATEVHTSS2MCS9; i++)
+				rpt &= phydm_api_set_txagc(dm, pow, path, i, 0);
+		} else if (dm->support_ic_type &
+			   (ODM_RTL8721D)) {
+			pow = (val[3] & 0x3f);
+			for (i = 0; i <= ODM_RATEMCS7; i++)
+				rpt &= phydm_api_set_txagc(dm, pow, path, i, 0);
+		}
+
+		if (rpt)
+			PDM_SNPF(out_len, used, output + used, out_len - used,
+				 "Write all TXAGC of path-%d = 0x%x\n",
+				 val[1], val[3]);
+		else
+			PDM_SNPF(out_len, used, output + used, out_len - used,
+				 "Write all TXAGC of path-%d fail\n", val[1]);
+	}
+
+#endif
+	*_used = used;
+	*_out_len = out_len;
+}
+
+void phydm_shift_txagc(void *dm_void, u32 *const val, u32 *_used, char *output,
+		       u32 *_out_len)
+{
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	u32 used = *_used;
+	u32 out_len = *_out_len;
+	u8 i = 0;
+	u32 pow = 0; /*Power index*/
+	boolean rpt = true;
+	u8 vht_start_rate = ODM_RATEVHTSS1MCS0;
+	enum rf_path path = RF_PATH_A;
+
+#ifdef PHYDM_COMMON_API_SUPPORT
+	if (!(dm->support_ic_type & CMN_API_SUPPORT_IC))
+		return;
+
+	if (val[1] >= dm->num_rf_path) {
+		PDM_SNPF(out_len, used, output + used, out_len - used,
+			 "Write path-%d fail\n", val[1]);
+		return;
+	}
+
+	path = (enum rf_path)val[1];
+
+	if ((u8)val[2] == 0) {
+	/*@{0:-, 1:+} {Pwr Offset}*/
+		if (dm->support_ic_type & (ODM_RTL8195B | ODM_RTL8821C)) {
+			for (i = 0; i <= ODM_RATEMCS7; i++) {
+				pow = phydm_api_get_txagc(dm, path, i) - val[3];
+				rpt &= phydm_api_set_txagc(dm, pow, path, i, 1);
 			}
-		} else
-			PHYDM_SNPRINTF((output + used, out_len - used, "  %s%d   %s%x%s\n", "Write path-", (dm_value[1] & 0x1), "rate index-0x", (dm_value[2] & 0x7f), " fail"));
+			for (i = vht_start_rate; i <= ODM_RATEVHTSS1MCS9; i++) {
+				pow = phydm_api_get_txagc(dm, path, i) - val[3];
+				rpt &= phydm_api_set_txagc(dm, pow, path, i, 1);
+			}
+		} else if (dm->support_ic_type & (ODM_RTL8822B)) {
+			for (i = 0; i <= ODM_RATEMCS15; i++) {
+				pow = phydm_api_get_txagc(dm, path, i) - val[3];
+				rpt &= phydm_api_set_txagc(dm, pow, path, i, 1);
+			}
+			for (i = vht_start_rate; i <= ODM_RATEVHTSS2MCS9; i++) {
+				pow = phydm_api_get_txagc(dm, path, i) - val[3];
+				rpt &= phydm_api_set_txagc(dm, pow, path, i, 1);
+			}
+		} else if (dm->support_ic_type &
+			   (ODM_RTL8197F | ODM_RTL8192F)) {
+			for (i = 0; i <= ODM_RATEMCS15; i++) {
+				pow = phydm_api_get_txagc(dm, path, i) - val[3];
+				rpt &= phydm_api_set_txagc(dm, pow, path, i, 1);
+			}
+		} else if (dm->support_ic_type & ODM_IC_JGR3_SERIES) {
+			rpt &= phydm_api_shift_txagc(dm, val[3], path, 0);
+		} else if (dm->support_ic_type &
+			   (ODM_RTL8721D)) {
+			for (i = 0; i <= ODM_RATEMCS7; i++) {
+				pow = phydm_api_get_txagc(dm, path, i) - val[3];
+				rpt &= phydm_api_set_txagc(dm, pow, path, i, 1);
+			}
+		}
+	} else if ((u8)val[2] == 1) {
+	/*@{0:-, 1:+} {Pwr Offset}*/
+		if (dm->support_ic_type & (ODM_RTL8195B | ODM_RTL8821C)) {
+			for (i = 0; i <= ODM_RATEMCS7; i++) {
+				pow = phydm_api_get_txagc(dm, path, i) + val[3];
+				rpt &= phydm_api_set_txagc(dm, pow, path, i, 1);
+			}
+			for (i = vht_start_rate; i <= ODM_RATEVHTSS1MCS9; i++) {
+				pow = phydm_api_get_txagc(dm, path, i) + val[3];
+				rpt &= phydm_api_set_txagc(dm, pow, path, i, 1);
+			}
+		} else if (dm->support_ic_type & (ODM_RTL8822B)) {
+			for (i = 0; i <= ODM_RATEMCS15; i++) {
+				pow = phydm_api_get_txagc(dm, path, i) + val[3];
+				rpt &= phydm_api_set_txagc(dm, pow, path, i, 1);
+			}
+			for (i = vht_start_rate; i <= ODM_RATEVHTSS2MCS9; i++) {
+				pow = phydm_api_get_txagc(dm, path, i) + val[3];
+				rpt &= phydm_api_set_txagc(dm, pow, path, i, 1);
+			}
+		} else if (dm->support_ic_type &
+			   (ODM_RTL8197F | ODM_RTL8192F)) {
+			for (i = 0; i <= ODM_RATEMCS15; i++) {
+				pow = phydm_api_get_txagc(dm, path, i) + val[3];
+				rpt &= phydm_api_set_txagc(dm, pow, path, i, 1);
+			}
+		} else if (dm->support_ic_type & ODM_RTL8721D) {
+			for (i = 0; i <= ODM_RATEMCS7; i++) {
+				pow = phydm_api_get_txagc(dm, path, i) + val[3];
+				rpt &= phydm_api_set_txagc(dm, pow, path, i, 1);
+			}
+		} else if (dm->support_ic_type &
+			   (ODM_RTL8822C | ODM_RTL8812F)) {
+			rpt &= phydm_api_shift_txagc(dm, val[3], path, 1);
+		}
 	}
+	#ifdef PHYDM_IC_JGR3_SERIES_SUPPORT
+	if (dm->support_ic_type & ODM_IC_JGR3_SERIES)
+		PDM_SNPF(out_len, used, output + used, out_len - used,
+			 "[All rate] Set Path-%d Pow_idx: %s %d\n",
+			 val[1], (val[2] ? "+" : "-"), val[3]);
+	else
+	#endif
+		PDM_SNPF(out_len, used, output + used, out_len - used,
+			 "[All rate] Set Path-%d Pow_idx: %s %d(%d.%s dB)\n",
+			 val[1], (val[2] ? "+" : "-"), val[3], val[3] >> 1,
+			 ((val[3] & 1) ? "5" : "0"));
+
 #endif
 	*_used = used;
 	*_out_len = out_len;
 }
 
-void
-phydm_debug_trace(
-	void		*p_dm_void,
-	u32		*const dm_value,
-	u32		*_used,
-	char		*output,
-	u32		*_out_len
-)
+void phydm_set_txagc_dbg(void *dm_void, char input[][16], u32 *_used,
+			 char *output, u32 *_out_len)
+{
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	u32 used = *_used;
+	u32 out_len = *_out_len;
+	u32 var1[10] = {0};
+	char help[] = "-h";
+	u8 i = 0, input_idx = 0;
+
+	for (i = 0; i < 5; i++) {
+		if (input[i + 1]) {
+			PHYDM_SSCANF(input[i + 1], DCMD_HEX, &var1[i]);
+			input_idx++;
+		}
+	}
+
+	if ((strcmp(input[1], help) == 0)) {
+		PDM_SNPF(out_len, used, output + used, out_len - used,
+			 "{Dis:0, En:1} {pathA~D(0~3)} {rate_idx(Hex), All_rate:0xff} {txagc_idx (Hex)}\n");
+		PDM_SNPF(out_len, used, output + used, out_len - used,
+			 "{Pwr Shift(All rate):2} {pathA~D(0~3)} {0:-, 1:+} {Pwr Offset(Hex)}\n");
+	} else if (var1[0] == 0) {
+		dm->is_disable_phy_api = false;
+		PDM_SNPF(out_len, used, output + used, out_len - used,
+			 "Disable API debug mode\n");
+	} else if (var1[0] == 1) {
+		dm->is_disable_phy_api = false;
+		phydm_set_txagc(dm, (u32 *)var1, &used, output, &out_len);
+		dm->is_disable_phy_api = true;
+	} else if (var1[0] == 2) {
+		PHYDM_SSCANF(input[4], DCMD_HEX, &var1[3]);
+		dm->is_disable_phy_api = false;
+		phydm_shift_txagc(dm, (u32 *)var1, &used, output, &out_len);
+		dm->is_disable_phy_api = true;
+	}
+
+	*_used = used;
+	*_out_len = out_len;
+}
+
+void phydm_debug_trace(void *dm_void, char input[][16], u32 *_used,
+		       char *output, u32 *_out_len)
 {
-	struct PHY_DM_STRUCT		*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	u64			pre_debug_components, one = 1;
-	u32			used = *_used;
-	u32			out_len = *_out_len;
-
-	pre_debug_components = p_dm->debug_components;
-
-	PHYDM_SNPRINTF((output + used, out_len - used, "\n%s\n", "================================"));
-	if (dm_value[0] == 100) {
-		PHYDM_SNPRINTF((output + used, out_len - used, "%s\n", "[Debug Message] PhyDM Selection"));
-		PHYDM_SNPRINTF((output + used, out_len - used, "%s\n", "================================"));
-		PHYDM_SNPRINTF((output + used, out_len - used, "00. (( %s ))DIG\n", ((p_dm->debug_components & DBG_DIG) ? ("V") : ("."))));
-		PHYDM_SNPRINTF((output + used, out_len - used, "01. (( %s ))RA_MASK\n", ((p_dm->debug_components & DBG_RA_MASK) ? ("V") : ("."))));
-		PHYDM_SNPRINTF((output + used, out_len - used, "02. (( %s ))DYNAMIC_TXPWR\n", ((p_dm->debug_components & DBG_DYN_TXPWR) ? ("V") : ("."))));
-		PHYDM_SNPRINTF((output + used, out_len - used, "03. (( %s ))FA_CNT\n", ((p_dm->debug_components & DBG_FA_CNT) ? ("V") : ("."))));
-		PHYDM_SNPRINTF((output + used, out_len - used, "04. (( %s ))RSSI_MONITOR\n", ((p_dm->debug_components & DBG_RSSI_MNTR) ? ("V") : ("."))));
-		PHYDM_SNPRINTF((output + used, out_len - used, "05. (( %s ))CCKPD\n", ((p_dm->debug_components & DBG_CCKPD) ? ("V") : ("."))));
-		PHYDM_SNPRINTF((output + used, out_len - used, "06. (( %s ))ANT_DIV\n", ((p_dm->debug_components & DBG_ANT_DIV) ? ("V") : ("."))));
-		PHYDM_SNPRINTF((output + used, out_len - used, "07. (( %s ))SMT_ANT\n", ((p_dm->debug_components & DBG_SMT_ANT) ? ("V") : ("."))));
-		PHYDM_SNPRINTF((output + used, out_len - used, "08. (( %s ))PWR_TRAIN\n", ((p_dm->debug_components & F08_PWR_TRAIN) ? ("V") : ("."))));
-		PHYDM_SNPRINTF((output + used, out_len - used, "09. (( %s ))RA\n", ((p_dm->debug_components & DBG_RA) ? ("V") : ("."))));
-		PHYDM_SNPRINTF((output + used, out_len - used, "10. (( %s ))PATH_DIV\n", ((p_dm->debug_components & DBG_PATH_DIV) ? ("V") : ("."))));
-		PHYDM_SNPRINTF((output + used, out_len - used, "11. (( %s ))DFS\n", ((p_dm->debug_components & DBG_DFS) ? ("V") : ("."))));
-		PHYDM_SNPRINTF((output + used, out_len - used, "12. (( %s ))DYN_ARFR\n", ((p_dm->debug_components & DBG_DYN_ARFR) ? ("V") : ("."))));
-		PHYDM_SNPRINTF((output + used, out_len - used, "13. (( %s ))ADAPTIVITY\n", ((p_dm->debug_components & DBG_ADPTVTY) ? ("V") : ("."))));
-		PHYDM_SNPRINTF((output + used, out_len - used, "14. (( %s ))CFO_TRK\n", ((p_dm->debug_components & DBG_CFO_TRK) ? ("V") : ("."))));
-		PHYDM_SNPRINTF((output + used, out_len - used, "15. (( %s ))ENV_MNTR\n", ((p_dm->debug_components & DBG_ENV_MNTR) ? ("V") : ("."))));
-		PHYDM_SNPRINTF((output + used, out_len - used, "16. (( %s ))PRI_CCA\n", ((p_dm->debug_components & DBG_PRI_CCA) ? ("V") : ("."))));
-		PHYDM_SNPRINTF((output + used, out_len - used, "17. (( %s ))ADPTV_SOML\n", ((p_dm->debug_components & DBG_ADPTV_SOML) ? ("V") : ("."))));
-		PHYDM_SNPRINTF((output + used, out_len - used, "18. (( %s ))LNA_SAT_CHK\n", ((p_dm->debug_components & DBG_LNA_SAT_CHK) ? ("V") : ("."))));
-		/*PHYDM_SNPRINTF((output + used, out_len - used, "19. (( %s ))TBD1\n", ((p_dm->debug_components & DBG_TBD1) ? ("V") : ("."))));*/
-		PHYDM_SNPRINTF((output + used, out_len - used, "20. (( %s ))DRP\n", ((p_dm->debug_components & DBG_DYN_RX_PATH) ? ("V") : ("."))));
-		PHYDM_SNPRINTF((output + used, out_len - used, "21. (( %s ))TMP\n", ((p_dm->debug_components & DBG_TMP) ? ("V") : ("."))));
-		PHYDM_SNPRINTF((output + used, out_len - used, "22. (( %s ))FW_DEBUG_TRACE\n", ((p_dm->debug_components & DBG_FW_TRACE) ? ("V") : ("."))));
-		PHYDM_SNPRINTF((output + used, out_len - used, "23. (( %s ))TXBF\n", ((p_dm->debug_components & DBG_TXBF) ? ("V") : ("."))));
-		PHYDM_SNPRINTF((output + used, out_len - used, "24. (( %s ))COMMON_FLOW\n", ((p_dm->debug_components & DBG_COMMON_FLOW) ? ("V") : ("."))));
-		PHYDM_SNPRINTF((output + used, out_len - used, "25. (( %s ))TX_PWR_TRK\n", ((p_dm->debug_components & ODM_COMP_TX_PWR_TRACK) ? ("V") : ("."))));
-		PHYDM_SNPRINTF((output + used, out_len - used, "26. (( %s ))CALIBRATION\n", ((p_dm->debug_components & ODM_COMP_CALIBRATION) ? ("V") : ("."))));
-		PHYDM_SNPRINTF((output + used, out_len - used, "27. (( %s ))MP\n", ((p_dm->debug_components & ODM_COMP_MP) ? ("V") : ("."))));
-		PHYDM_SNPRINTF((output + used, out_len - used, "28. (( %s ))PHY_CONFIG\n", ((p_dm->debug_components & ODM_PHY_CONFIG) ? ("V") : ("."))));
-		PHYDM_SNPRINTF((output + used, out_len - used, "29. (( %s ))INIT\n", ((p_dm->debug_components & ODM_COMP_INIT) ? ("V") : ("."))));
-		PHYDM_SNPRINTF((output + used, out_len - used, "30. (( %s ))COMMON\n", ((p_dm->debug_components & ODM_COMP_COMMON) ? ("V") : ("."))));
-		PHYDM_SNPRINTF((output + used, out_len - used, "31. (( %s ))API\n", ((p_dm->debug_components & ODM_COMP_API) ? ("V") : ("."))));
-		PHYDM_SNPRINTF((output + used, out_len - used, "%s\n", "================================"));
-
-	} else if (dm_value[0] == 101) {
-		p_dm->debug_components = 0;
-		PHYDM_SNPRINTF((output + used, out_len - used, "%s\n", "Disable all debug components"));
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	u64 pre_debug_components, one = 1;
+	u64 comp = 0;
+	u32 used = *_used;
+	u32 out_len = *_out_len;
+	u32 val[10] = {0};
+	u8 i;
+
+	for (i = 0; i < 5; i++) {
+		if (input[i + 1])
+			PHYDM_SSCANF(input[i + 1], DCMD_DECIMAL, &val[i]);
+	}
+	comp = dm->debug_components;
+	pre_debug_components = dm->debug_components;
+
+	PDM_SNPF(out_len, used, output + used, out_len - used,
+		 "\n================================\n");
+	if (val[0] == 100) {
+		PDM_SNPF(out_len, used, output + used, out_len - used,
+			 "[DBG MSG] Component Selection\n");
+		PDM_SNPF(out_len, used, output + used, out_len - used,
+			 "================================\n");
+		PDM_SNPF(out_len, used, output + used, out_len - used,
+			 "00. (( %s ))DIG\n",
+			 ((comp & DBG_DIG) ? ("V") : (".")));
+		PDM_SNPF(out_len, used, output + used, out_len - used,
+			 "01. (( %s ))RA_MASK\n",
+			 ((comp & DBG_RA_MASK) ? ("V") : (".")));
+		PDM_SNPF(out_len, used, output + used, out_len - used,
+			 "02. (( %s ))DYN_TXPWR\n",
+			 ((comp & DBG_DYN_TXPWR) ? ("V") : (".")));
+		PDM_SNPF(out_len, used, output + used, out_len - used,
+			 "03. (( %s ))FA_CNT\n",
+			 ((comp & DBG_FA_CNT) ? ("V") : (".")));
+		PDM_SNPF(out_len, used, output + used, out_len - used,
+			 "04. (( %s ))RSSI_MNTR\n",
+			 ((comp & DBG_RSSI_MNTR) ? ("V") : (".")));
+		PDM_SNPF(out_len, used, output + used, out_len - used,
+			 "05. (( %s ))CCKPD\n",
+			 ((comp & DBG_CCKPD) ? ("V") : (".")));
+		PDM_SNPF(out_len, used, output + used, out_len - used,
+			 "06. (( %s ))ANT_DIV\n",
+			 ((comp & DBG_ANT_DIV) ? ("V") : (".")));
+		PDM_SNPF(out_len, used, output + used, out_len - used,
+			 "07. (( %s ))SMT_ANT\n",
+			 ((comp & DBG_SMT_ANT) ? ("V") : (".")));
+		PDM_SNPF(out_len, used, output + used, out_len - used,
+			 "08. (( %s ))PWR_TRAIN\n",
+			 ((comp & DBG_PWR_TRAIN) ? ("V") : (".")));
+		PDM_SNPF(out_len, used, output + used, out_len - used,
+			 "09. (( %s ))RA\n",
+			 ((comp & DBG_RA) ? ("V") : (".")));
+		PDM_SNPF(out_len, used, output + used, out_len - used,
+			 "10. (( %s ))PATH_DIV\n",
+			 ((comp & DBG_PATH_DIV) ? ("V") : (".")));
+		PDM_SNPF(out_len, used, output + used, out_len - used,
+			 "11. (( %s ))DFS\n",
+			 ((comp & DBG_DFS) ? ("V") : (".")));
+		PDM_SNPF(out_len, used, output + used, out_len - used,
+			 "12. (( %s ))DYN_ARFR\n",
+			 ((comp & DBG_DYN_ARFR) ? ("V") : (".")));
+		PDM_SNPF(out_len, used, output + used, out_len - used,
+			 "13. (( %s ))ADAPTIVITY\n",
+			 ((comp & DBG_ADPTVTY) ? ("V") : (".")));
+		PDM_SNPF(out_len, used, output + used, out_len - used,
+			 "14. (( %s ))CFO_TRK\n",
+			 ((comp & DBG_CFO_TRK) ? ("V") : (".")));
+		PDM_SNPF(out_len, used, output + used, out_len - used,
+			 "15. (( %s ))ENV_MNTR\n",
+			 ((comp & DBG_ENV_MNTR) ? ("V") : (".")));
+		PDM_SNPF(out_len, used, output + used, out_len - used,
+			 "16. (( %s ))PRI_CCA\n",
+			 ((comp & DBG_PRI_CCA) ? ("V") : (".")));
+		PDM_SNPF(out_len, used, output + used, out_len - used,
+			 "17. (( %s ))ADPTV_SOML\n",
+			 ((comp & DBG_ADPTV_SOML) ? ("V") : (".")));
+		PDM_SNPF(out_len, used, output + used, out_len - used,
+			 "18. (( %s ))LNA_SAT_CHK\n",
+			 ((comp & DBG_LNA_SAT_CHK) ? ("V") : (".")));
+		PDM_SNPF(out_len, used, output + used, out_len - used,
+			 "20. (( %s ))PHY_STATUS\n",
+			 ((comp & DBG_PHY_STATUS) ? ("V") : (".")));
+		PDM_SNPF(out_len, used, output + used, out_len - used,
+			 "21. (( %s ))TMP\n",
+			 ((comp & DBG_TMP) ? ("V") : (".")));
+		PDM_SNPF(out_len, used, output + used, out_len - used,
+			 "22. (( %s ))FW_DBG_TRACE\n",
+			 ((comp & DBG_FW_TRACE) ? ("V") : (".")));
+		PDM_SNPF(out_len, used, output + used, out_len - used,
+			 "23. (( %s ))TXBF\n",
+			 ((comp & DBG_TXBF) ? ("V") : (".")));
+		PDM_SNPF(out_len, used, output + used, out_len - used,
+			 "24. (( %s ))COMMON_FLOW\n",
+			 ((comp & DBG_COMMON_FLOW) ? ("V") : (".")));
+		PDM_SNPF(out_len, used, output + used, out_len - used,
+			 "28. (( %s ))PHY_CONFIG\n",
+			 ((comp & ODM_PHY_CONFIG) ? ("V") : (".")));
+		PDM_SNPF(out_len, used, output + used, out_len - used,
+			 "29. (( %s ))INIT\n",
+			 ((comp & ODM_COMP_INIT) ? ("V") : (".")));
+		PDM_SNPF(out_len, used, output + used, out_len - used,
+			 "30. (( %s ))COMMON\n",
+			 ((comp & DBG_CMN) ? ("V") : (".")));
+		PDM_SNPF(out_len, used, output + used, out_len - used,
+			 "31. (( %s ))API\n",
+			 ((comp & ODM_COMP_API) ? ("V") : (".")));
+		PDM_SNPF(out_len, used, output + used, out_len - used,
+			 "================================\n");
+
+	} else if (val[0] == 101) {
+		dm->debug_components = 0;
+		PDM_SNPF(out_len, used, output + used, out_len - used,
+			 "Disable all debug components\n");
 	} else {
-		if (dm_value[1] == 1)   /*enable*/
-			p_dm->debug_components |= (one << dm_value[0]);
-		else if (dm_value[1] == 2)   /*disable*/
-			p_dm->debug_components &= ~(one << dm_value[0]);
+		if (val[1] == 1) /*@enable*/
+			dm->debug_components |= (one << val[0]);
+		else if (val[1] == 2) /*@disable*/
+			dm->debug_components &= ~(one << val[0]);
 		else
-			PHYDM_SNPRINTF((output + used, out_len - used, "%s\n", "[Warning!!!]  1:enable,  2:disable"));
+			PDM_SNPF(out_len, used, output + used, out_len - used,
+				 "[Warning]  1:on,  2:off\n");
+
+		if ((BIT(val[0]) == DBG_PHY_STATUS) && val[1] == 1) {
+			dm->phy_dbg_info.show_phy_sts_all_pkt = (u8)val[2];
+			dm->phy_dbg_info.show_phy_sts_max_cnt = (u16)val[3];
+
+			PDM_SNPF(out_len, used, output + used, out_len - used,
+				 "show_all_pkt=%d, show_max_num=%d\n\n",
+				 dm->phy_dbg_info.show_phy_sts_all_pkt,
+				 dm->phy_dbg_info.show_phy_sts_max_cnt);
+
+		} else if ((BIT(val[0]) == DBG_CMN) && (val[1] == 1)) {
+			dm->cmn_dbg_msg_period = (u8)val[2];
+
+			if (dm->cmn_dbg_msg_period < PHYDM_WATCH_DOG_PERIOD)
+				dm->cmn_dbg_msg_period = PHYDM_WATCH_DOG_PERIOD;
+
+			PDM_SNPF(out_len, used, output + used, out_len - used,
+				 "cmn_dbg_msg_period=%d\n",
+				 dm->cmn_dbg_msg_period);
+		}
 	}
-	PHYDM_SNPRINTF((output + used, out_len - used, "pre-DbgComponents = 0x%llx\n", pre_debug_components));
-	PHYDM_SNPRINTF((output + used, out_len - used, "Curr-DbgComponents = 0x%llx\n", p_dm->debug_components));
-	PHYDM_SNPRINTF((output + used, out_len - used, "%s\n", "================================"));
+	PDM_SNPF(out_len, used, output + used, out_len - used,
+		 "pre-DbgComponents = 0x%llx\n", pre_debug_components);
+	PDM_SNPF(out_len, used, output + used, out_len - used,
+		 "Curr-DbgComponents = 0x%llx\n", dm->debug_components);
+	PDM_SNPF(out_len, used, output + used, out_len - used,
+		 "================================\n");
 
 	*_used = used;
 	*_out_len = out_len;
 }
 
-void
-phydm_fw_debug_trace(
-	void		*p_dm_void,
-	u32		*const dm_value,
-	u32		*_used,
-	char			*output,
-	u32		*_out_len
-)
+void phydm_fw_debug_trace(void *dm_void, char input[][16], u32 *_used,
+			  char *output, u32 *_out_len)
 {
-	struct PHY_DM_STRUCT		*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	u32			pre_fw_debug_components, one = 1;
-	u32			used = *_used;
-	u32			out_len = *_out_len;
-
-	pre_fw_debug_components = p_dm->fw_debug_components;
-
-	PHYDM_SNPRINTF((output + used, out_len - used, "\n%s\n", "================================"));
-	if (dm_value[0] == 100) {
-		PHYDM_SNPRINTF((output + used, out_len - used, "%s\n", "[FW Debug Component]"));
-		PHYDM_SNPRINTF((output + used, out_len - used, "%s\n", "================================"));
-		PHYDM_SNPRINTF((output + used, out_len - used, "00. (( %s ))RA\n", ((p_dm->fw_debug_components & PHYDM_FW_COMP_RA) ? ("V") : ("."))));
-
-		if (p_dm->support_ic_type & PHYDM_IC_3081_SERIES) {
-			PHYDM_SNPRINTF((output + used, out_len - used, "01. (( %s ))MU\n", ((p_dm->fw_debug_components & PHYDM_FW_COMP_MU) ? ("V") : ("."))));
-			PHYDM_SNPRINTF((output + used, out_len - used, "02. (( %s ))path Div\n", ((p_dm->fw_debug_components & PHYDM_FW_COMP_PATH_DIV) ? ("V") : ("."))));
-			PHYDM_SNPRINTF((output + used, out_len - used, "03. (( %s ))Power training\n", ((p_dm->fw_debug_components & PHYDM_FW_COMP_PT) ? ("V") : ("."))));
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	u32 used = *_used;
+	u32 out_len = *_out_len;
+	u32 val[10] = {0};
+	u8 i, input_idx = 0;
+	char help[] = "-h";
+	u32 pre_fw_debug_components = 0, one = 1;
+	u32 comp = 0;
+
+	for (i = 0; i < 5; i++) {
+		if (input[i + 1]) {
+			PHYDM_SSCANF(input[i + 1], DCMD_DECIMAL, &val[i]);
+			input_idx++;
 		}
-		PHYDM_SNPRINTF((output + used, out_len - used, "%s\n", "================================"));
+	}
 
+	if (input_idx == 0)
+		return;
+
+	pre_fw_debug_components = dm->fw_debug_components;
+	comp = dm->fw_debug_components;
+
+	if ((strcmp(input[1], help) == 0)) {
+		PDM_SNPF(out_len, used, output + used, out_len - used,
+				 "{dbg_comp} {1:en, 2:dis} {mode} {macid}\n");
 	} else {
-		if (dm_value[0] == 101) {
-			p_dm->fw_debug_components = 0;
-			PHYDM_SNPRINTF((output + used, out_len - used, "%s\n", "Clear all fw debug components"));
+		if (val[0] == 101) {
+			dm->fw_debug_components = 0;
+			PDM_SNPF(out_len, used, output + used, out_len - used,
+				 "%s\n", "Clear all fw debug components");
 		} else {
-			if (dm_value[1] == 1)   /*enable*/
-				p_dm->fw_debug_components |= (one << dm_value[0]);
-			else if (dm_value[1] == 2)   /*disable*/
-				p_dm->fw_debug_components &= ~(one << dm_value[0]);
+			if (val[1] == 1) /*@enable*/
+				dm->fw_debug_components |= (one << val[0]);
+			else if (val[1] == 2) /*@disable*/
+				dm->fw_debug_components &= ~(one << val[0]);
 			else
-				PHYDM_SNPRINTF((output + used, out_len - used, "%s\n", "[Warning!!!]  1:enable,  2:disable"));
+				PDM_SNPF(out_len, used, output + used,
+					 out_len - used, "%s\n",
+					 "[Warning!!!]  1:enable,  2:disable");
 		}
 
-		if (p_dm->fw_debug_components == 0) {
-			p_dm->debug_components &= ~DBG_FW_TRACE;
-			phydm_fw_trace_en_h2c(p_dm, false, p_dm->fw_debug_components, dm_value[2], dm_value[3]); /*H2C to enable C2H Msg*/
+		comp = dm->fw_debug_components;
+
+		if (comp == 0) {
+			dm->debug_components &= ~DBG_FW_TRACE;
+			/*@H2C to enable C2H Msg*/
+			phydm_fw_trace_en_h2c(dm, false, comp, val[2], val[3]);
 		} else {
-			p_dm->debug_components |= DBG_FW_TRACE;
-			phydm_fw_trace_en_h2c(p_dm, true, p_dm->fw_debug_components, dm_value[2], dm_value[3]); /*H2C to enable C2H Msg*/
+			dm->debug_components |= DBG_FW_TRACE;
+			/*@H2C to enable C2H Msg*/
+			phydm_fw_trace_en_h2c(dm, true, comp, val[2], val[3]);
 		}
 	}
 }
 
-void
-phydm_dump_bb_reg(
-	void			*p_dm_void,
-	u32			*_used,
-	char				*output,
-	u32			*_out_len
-)
+#if (ODM_IC_11N_SERIES_SUPPORT)
+void phydm_dump_bb_reg_n(void *dm_void, u32 *_used, char *output, u32 *_out_len)
 {
-	struct PHY_DM_STRUCT		*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	u32			addr = 0;
-	u32			used = *_used;
-	u32			out_len = *_out_len;
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	u32 addr = 0;
+	u32 used = *_used;
+	u32 out_len = *_out_len;
 
+	/*@For Nseries IC we only need to dump page8 to pageF using 3 digits*/
+	for (addr = 0x800; addr < 0xfff; addr += 4) {
+		PDM_VAST_SNPF(out_len, used, output + used, out_len - used,
+			      "0x%03x 0x%08x\n",
+			      addr, odm_get_bb_reg(dm, addr, MASKDWORD));
+	}
+
+	*_used = used;
+	*_out_len = out_len;
+}
+#endif
+
+#if (ODM_IC_11AC_SERIES_SUPPORT)
+void phydm_dump_bb_reg_ac(void *dm_void, u32 *_used, char *output,
+			  u32 *_out_len)
+{
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	u32 addr = 0;
+	u32 used = *_used;
+	u32 out_len = *_out_len;
 
-	/* BB Reg, For Nseries IC we only need to dump page8 to pageF using 3 digits*/
 	for (addr = 0x800; addr < 0xfff; addr += 4) {
-		if (p_dm->support_ic_type & ODM_IC_11N_SERIES)
-			PHYDM_VAST_INFO_SNPRINTF((output + used, out_len - used, "0x%03x 0x%08x\n", addr, odm_get_bb_reg(p_dm, addr, MASKDWORD)));
-		else
-			PHYDM_VAST_INFO_SNPRINTF((output + used, out_len - used, "0x%04x 0x%08x\n", addr, odm_get_bb_reg(p_dm, addr, MASKDWORD)));
+		PDM_VAST_SNPF(out_len, used, output + used, out_len - used,
+			      "0x%04x 0x%08x\n",
+			      addr, odm_get_bb_reg(dm, addr, MASKDWORD));
 	}
 
-	if (p_dm->support_ic_type & (ODM_RTL8822B | ODM_RTL8814A | ODM_RTL8821C)) {
+	if (!(dm->support_ic_type &
+	    (ODM_RTL8822B | ODM_RTL8814A | ODM_RTL8821C)))
+		goto rpt_reg;
+
+	if (dm->rf_type > RF_2T2R) {
+		for (addr = 0x1800; addr < 0x18ff; addr += 4)
+			PDM_VAST_SNPF(out_len, used, output + used,
+				      out_len - used, "0x%04x 0x%08x\n",
+				      addr,
+				      odm_get_bb_reg(dm, addr, MASKDWORD));
+	}
+
+	if (dm->rf_type > RF_3T3R) {
+		for (addr = 0x1a00; addr < 0x1aff; addr += 4)
+			PDM_VAST_SNPF(out_len, used, output + used,
+				      out_len - used, "0x%04x 0x%08x\n",
+				      addr,
+				      odm_get_bb_reg(dm, addr, MASKDWORD));
+	}
 
-		if (p_dm->rf_type > RF_2T2R) {
-			for (addr = 0x1800; addr < 0x18ff; addr += 4)
-				PHYDM_VAST_INFO_SNPRINTF((output + used, out_len - used, "0x%04x 0x%08x\n", addr, odm_get_bb_reg(p_dm, addr, MASKDWORD)));
+	for (addr = 0x1900; addr < 0x19ff; addr += 4)
+		PDM_VAST_SNPF(out_len, used, output + used, out_len - used,
+			      "0x%04x 0x%08x\n",
+			      addr, odm_get_bb_reg(dm, addr, MASKDWORD));
+
+	for (addr = 0x1c00; addr < 0x1cff; addr += 4)
+		PDM_VAST_SNPF(out_len, used, output + used, out_len - used,
+			      "0x%04x 0x%08x\n",
+			      addr, odm_get_bb_reg(dm, addr, MASKDWORD));
+
+	for (addr = 0x1f00; addr < 0x1fff; addr += 4)
+		PDM_VAST_SNPF(out_len, used, output + used, out_len - used,
+			      "0x%04x 0x%08x\n",
+			      addr, odm_get_bb_reg(dm, addr, MASKDWORD));
+
+rpt_reg:
+
+	*_used = used;
+	*_out_len = out_len;
+}
+
+#endif
+
+#ifdef PHYDM_IC_JGR3_SERIES_SUPPORT
+void phydm_dump_bb_reg_jgr3(void *dm_void, u32 *_used, char *output,
+			    u32 *_out_len)
+{
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	u32 addr = 0;
+	u32 used = *_used;
+	u32 out_len = *_out_len;
+
+	if (dm->support_ic_type & ODM_IC_JGR3_SERIES) {
+		for (addr = 0x800; addr < 0xdff; addr += 4)
+			PDM_VAST_SNPF(out_len, used, output + used,
+				      out_len - used, "0x%04x 0x%08x\n", addr,
+				      odm_get_bb_reg(dm, addr, MASKDWORD));
+
+		for (addr = 0x1800; addr < 0x1aff; addr += 4)
+			PDM_VAST_SNPF(out_len, used, output + used,
+				      out_len - used, "0x%04x 0x%08x\n", addr,
+				      odm_get_bb_reg(dm, addr, MASKDWORD));
+
+		for (addr = 0x1c00; addr < 0x1eff; addr += 4)
+			PDM_VAST_SNPF(out_len, used, output + used,
+				      out_len - used, "0x%04x 0x%08x\n", addr,
+				      odm_get_bb_reg(dm, addr, MASKDWORD));
+
+		for (addr = 0x4000; addr < 0x41ff; addr += 4)
+			PDM_VAST_SNPF(out_len, used, output + used,
+				      out_len - used, "0x%04x 0x%08x\n", addr,
+				      odm_get_bb_reg(dm, addr, MASKDWORD));
+	}
+	*_used = used;
+	*_out_len = out_len;
+}
+
+void phydm_dump_bb_reg2_jgr3(void *dm_void, u32 *_used, char *output,
+			     u32 *_out_len)
+{
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	u32 addr = 0;
+	u32 used = *_used;
+	u32 out_len = *_out_len;
+
+	if (dm->support_ic_type & ODM_IC_JGR3_SERIES) {
+		#if (defined(PHYDM_COMPILE_ABOVE_4SS))
+		if (dm->support_ic_type & PHYDM_IC_ABOVE_4SS) {
+			for (addr = 0x5000; addr < 0x53ff; addr += 4)
+				PDM_VAST_SNPF(out_len, used, output + used,
+					      out_len - used, "0x%04x 0x%08x\n",
+					      addr, odm_get_bb_reg(dm, addr,
+					      MASKDWORD));
+		}
+		#endif
+		/* @Do not change the order of page-2C/2D*/
+		for (addr = 0x2c00; addr < 0x2dff; addr += 4)
+			PDM_VAST_SNPF(out_len, used, output + used,
+				      out_len - used, "0x%04x 0x%08x\n", addr,
+				      odm_get_bb_reg(dm, addr, MASKDWORD));
+	}
+
+	*_used = used;
+	*_out_len = out_len;
+}
+#endif
+
+void phydm_dump_bb_reg(void *dm_void, u32 *_used, char *output, u32 *_out_len)
+{
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	u32 used = *_used;
+	u32 out_len = *_out_len;
+
+	PDM_VAST_SNPF(out_len, used, output + used, out_len - used,
+		      "BB==========\n");
+
+	if (dm->support_ic_type & ODM_IC_11N_SERIES)
+#if (ODM_IC_11N_SERIES_SUPPORT)
+		phydm_dump_bb_reg_n(dm, &used, output, &out_len);
+#else
+		;
+#endif
+#ifdef PHYDM_IC_JGR3_SERIES_SUPPORT
+	else if (dm->support_ic_type & ODM_IC_JGR3_SERIES)
+		phydm_dump_bb_reg_jgr3(dm, &used, output, &out_len);
+#endif
+	else if (dm->support_ic_type & ODM_IC_11AC_SERIES)
+#if (ODM_IC_11AC_SERIES_SUPPORT)
+		phydm_dump_bb_reg_ac(dm, &used, output, &out_len);
+#else
+		;
+#endif
+
+	*_used = used;
+	*_out_len = out_len;
+}
+
+void phydm_dump_rf_reg(void *dm_void, u32 *_used, char *output, u32 *_out_len)
+{
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	u32 addr = 0;
+	u32 used = *_used;
+	u32 out_len = *_out_len;
+	u32 reg = 0;
+
+	/* @dump RF register */
+	PDM_VAST_SNPF(out_len, used, output + used, out_len - used,
+		      "RF-A==========\n");
+
+	for (addr = 0; addr < 0xFF; addr++) {
+		reg = odm_get_rf_reg(dm, RF_PATH_A, addr, RFREG_MASK);
+		PDM_VAST_SNPF(out_len, used, output + used, out_len - used,
+			      "0x%02x 0x%05x\n", addr, reg);
 		}
 
-		if (p_dm->rf_type > RF_3T3R) {
-			for (addr = 0x1a00; addr < 0x1aff; addr += 4)
-				PHYDM_VAST_INFO_SNPRINTF((output + used, out_len - used, "0x%04x 0x%08x\n", addr, odm_get_bb_reg(p_dm, addr, MASKDWORD)));
+#ifdef PHYDM_COMPILE_ABOVE_2SS
+	if (dm->rf_type > RF_1T1R) {
+		PDM_VAST_SNPF(out_len, used, output + used, out_len - used,
+			      "RF-B==========\n");
+
+		for (addr = 0; addr < 0xFF; addr++) {
+			reg = odm_get_rf_reg(dm, RF_PATH_B, addr, RFREG_MASK);
+			PDM_VAST_SNPF(out_len, used, output + used,
+				      out_len - used, "0x%02x 0x%05x\n",
+				      addr, reg);
 		}
+	}
+#endif
+
+#ifdef PHYDM_COMPILE_ABOVE_3SS
+	if (dm->rf_type > RF_2T2R) {
+		PDM_VAST_SNPF(out_len, used, output + used, out_len - used,
+			      "RF-C==========\n");
 
-		for (addr = 0x1900; addr < 0x19ff; addr += 4)
-			PHYDM_VAST_INFO_SNPRINTF((output + used, out_len - used, "0x%04x 0x%08x\n", addr, odm_get_bb_reg(p_dm, addr, MASKDWORD)));
+		for (addr = 0; addr < 0xFF; addr++) {
+			reg = odm_get_rf_reg(dm, RF_PATH_C, addr, RFREG_MASK);
+			PDM_VAST_SNPF(out_len, used, output + used,
+				      out_len - used, "0x%02x 0x%05x\n",
+				      addr, reg);
+		}
+	}
+#endif
 
-		for (addr = 0x1c00; addr < 0x1cff; addr += 4)
-			PHYDM_VAST_INFO_SNPRINTF((output + used, out_len - used, "0x%04x 0x%08x\n", addr, odm_get_bb_reg(p_dm, addr, MASKDWORD)));
+#ifdef PHYDM_COMPILE_ABOVE_4SS
+	if (dm->rf_type > RF_3T3R) {
+		PDM_VAST_SNPF(out_len, used, output + used, out_len - used,
+			      "RF-D==========\n");
 
-		for (addr = 0x1f00; addr < 0x1fff; addr += 4)
-			PHYDM_VAST_INFO_SNPRINTF((output + used, out_len - used, "0x%04x 0x%08x\n", addr, odm_get_bb_reg(p_dm, addr, MASKDWORD)));
+		for (addr = 0; addr < 0xFF; addr++) {
+			reg = odm_get_rf_reg(dm, RF_PATH_D, addr, RFREG_MASK);
+			PDM_VAST_SNPF(out_len, used, output + used,
+				      out_len - used, "0x%02x 0x%05x\n",
+				      addr, reg);
+		}
 	}
+#endif
 
 	*_used = used;
 	*_out_len = out_len;
 }
 
-void
-phydm_dump_all_reg(
-	void			*p_dm_void,
-	u32			*_used,
-	char				*output,
-	u32			*_out_len
-)
+void phydm_dump_mac_reg(void *dm_void, u32 *_used, char *output, u32 *_out_len)
 {
-	struct PHY_DM_STRUCT		*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	u32			addr = 0;
-	u32			used = *_used;
-	u32			out_len = *_out_len;
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	u32 addr = 0;
+	u32 used = *_used;
+	u32 out_len = *_out_len;
+
+	/* @dump MAC register */
+	PDM_VAST_SNPF(out_len, used, output + used, out_len - used,
+		      "MAC==========\n");
 
-	/* dump MAC register */
-	PHYDM_VAST_INFO_SNPRINTF((output + used, out_len - used, "MAC==========\n"));
 	for (addr = 0; addr < 0x7ff; addr += 4)
-		PHYDM_VAST_INFO_SNPRINTF((output + used, out_len - used, "0x%04x 0x%08x\n", addr, odm_get_bb_reg(p_dm, addr, MASKDWORD)));
+		PDM_VAST_SNPF(out_len, used, output + used, out_len - used,
+			      "0x%04x 0x%08x\n",
+			      addr, odm_get_bb_reg(dm, addr, MASKDWORD));
 
 	for (addr = 0x1000; addr < 0x17ff; addr += 4)
-		PHYDM_VAST_INFO_SNPRINTF((output + used, out_len - used, "0x%04x 0x%08x\n", addr, odm_get_bb_reg(p_dm, addr, MASKDWORD)));
+		PDM_VAST_SNPF(out_len, used, output + used, out_len - used,
+			      "0x%04x 0x%08x\n",
+			      addr, odm_get_bb_reg(dm, addr, MASKDWORD));
 
-	/* dump BB register */
-	PHYDM_VAST_INFO_SNPRINTF((output + used, out_len - used, "BB==========\n"));
-	phydm_dump_bb_reg(p_dm, &used, output, &out_len);
+	*_used = used;
+	*_out_len = out_len;
+}
 
-	/* dump RF register */
-	PHYDM_VAST_INFO_SNPRINTF((output + used, out_len - used, "RF-A==========\n"));
-	for (addr = 0; addr < 0xFF; addr++)
-		PHYDM_VAST_INFO_SNPRINTF((output + used, out_len - used, "0x%02x 0x%05x\n", addr, odm_get_rf_reg(p_dm, RF_PATH_A, addr, RFREGOFFSETMASK)));
+void phydm_dump_reg(void *dm_void, char input[][16], u32 *_used, char *output,
+		    u32 *_out_len)
+{
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	char help[] = "-h";
+	u32 var1[10] = {0};
+	u32 used = *_used;
+	u32 out_len = *_out_len;
+	u32 addr = 0;
 
-	if (p_dm->rf_type > RF_1T1R) {
-		PHYDM_VAST_INFO_SNPRINTF((output + used, out_len - used, "RF-B==========\n"));
-		for (addr = 0; addr < 0xFF; addr++)
-			PHYDM_VAST_INFO_SNPRINTF((output + used, out_len - used, "0x%02x 0x%05x\n", addr, odm_get_rf_reg(p_dm, RF_PATH_B, addr, RFREGOFFSETMASK)));
-	}
+	if (input[1])
+		PHYDM_SSCANF(input[1], DCMD_DECIMAL, &var1[0]);
 
-	if (p_dm->rf_type > RF_2T2R) {
-		PHYDM_VAST_INFO_SNPRINTF((output + used, out_len - used, "RF-C==========\n"));
-		for (addr = 0; addr < 0xFF; addr++)
-			PHYDM_VAST_INFO_SNPRINTF((output + used, out_len - used, "0x%02x 0x%05x\n", addr, odm_get_rf_reg(p_dm, RF_PATH_C, addr, RFREGOFFSETMASK)));
-	}
+	if ((strcmp(input[1], help) == 0)) {
+		#ifdef PHYDM_IC_JGR3_SERIES_SUPPORT
+		if (dm->support_ic_type & ODM_IC_JGR3_SERIES)
+			PDM_SNPF(out_len, used, output + used, out_len - used,
+				 "dumpreg {0:all, 1:BB, 2:RF, 3:MAC 4:BB2 for jgr3}\n");
+		else
+		#endif
+			PDM_SNPF(out_len, used, output + used, out_len - used,
+				 "dumpreg {0:all, 1:BB, 2:RF, 3:MAC}\n");
+	} else if (var1[0] == 0) {
+		phydm_dump_mac_reg(dm, &used, output, &out_len);
+		phydm_dump_bb_reg(dm, &used, output, &out_len);
+		#ifdef PHYDM_IC_JGR3_SERIES_SUPPORT
+		if (dm->support_ic_type & ODM_IC_JGR3_SERIES)
+			phydm_dump_bb_reg2_jgr3(dm, &used, output, &out_len);
+		#endif
 
-	if (p_dm->rf_type > RF_3T3R) {
-		PHYDM_VAST_INFO_SNPRINTF((output + used, out_len - used, "RF-D==========\n"));
-		for (addr = 0; addr < 0xFF; addr++)
-			PHYDM_VAST_INFO_SNPRINTF((output + used, out_len - used, "0x%02x 0x%05x\n", addr, odm_get_rf_reg(p_dm, RF_PATH_D, addr, RFREGOFFSETMASK)));
+		phydm_dump_rf_reg(dm, &used, output, &out_len);
+	} else if (var1[0] == 1) {
+		phydm_dump_bb_reg(dm, &used, output, &out_len);
+	} else if (var1[0] == 2) {
+		phydm_dump_rf_reg(dm, &used, output, &out_len);
+	} else if (var1[0] == 3) {
+		phydm_dump_mac_reg(dm, &used, output, &out_len);
+	} else if (var1[0] == 4) {
+		#ifdef PHYDM_IC_JGR3_SERIES_SUPPORT
+		if (dm->support_ic_type & ODM_IC_JGR3_SERIES)
+			phydm_dump_bb_reg2_jgr3(dm, &used, output, &out_len);
+		else
+		#endif
+			;
 	}
 
 	*_used = used;
 	*_out_len = out_len;
 }
 
-void
-phydm_enable_big_jump(
-	struct PHY_DM_STRUCT	*p_dm,
-	boolean		state
-)
+void phydm_enable_big_jump(void *dm_void, char input[][16], u32 *_used,
+			   char *output, u32 *_out_len)
 {
-#if (RTL8822B_SUPPORT == 1)
-	struct phydm_dig_struct			*p_dig_t = &p_dm->dm_dig_table;
+#if (RTL8822B_SUPPORT)
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct phydm_dig_struct *dig_t = &dm->dm_dig_table;
+	u32 dm_value[10] = {0};
+	u8 i, input_idx = 0;
+	u32 val;
+
+	if (!(dm->support_ic_type & ODM_RTL8822B))
+		return;
+
+	for (i = 0; i < 5; i++) {
+		if (input[i + 1]) {
+			PHYDM_SSCANF(input[i + 1], DCMD_HEX, &dm_value[i]);
+			input_idx++;
+		}
+	}
+
+	if (input_idx == 0)
+		return;
+
+	if (dm_value[0] == 0) {
+		dm->dm_dig_table.enable_adjust_big_jump = false;
+
+		val = (dig_t->big_jump_step3 << 5) |
+		      (dig_t->big_jump_step2 << 3) |
+		      dig_t->big_jump_step1;
 
-	if (state == false) {
-		p_dm->dm_dig_table.enable_adjust_big_jump = false;
-		odm_set_bb_reg(p_dm, 0x8c8, 0xfe, ((p_dig_t->big_jump_step3 << 5) | (p_dig_t->big_jump_step2 << 3) | p_dig_t->big_jump_step1));
-	} else
-		p_dm->dm_dig_table.enable_adjust_big_jump = true;
+		odm_set_bb_reg(dm, R_0x8c8, 0xfe, val);
+	} else {
+		dm->dm_dig_table.enable_adjust_big_jump = true;
+	}
 #endif
 }
 
-#if (RTL8822B_SUPPORT == 1 | RTL8821C_SUPPORT == 1 | RTL8814B_SUPPORT == 1)
-
-void
-phydm_show_rx_rate(
-	struct PHY_DM_STRUCT			*p_dm,
-	u32			*_used,
-	char			*output,
-	u32			*_out_len
-)
+void phydm_show_rx_rate(void *dm_void, char input[][16], u32 *_used,
+			char *output, u32 *_out_len)
 {
-	u32			used = *_used;
-	u32			out_len = *_out_len;
-
-	PHYDM_SNPRINTF((output + used, out_len - used, "=====Rx SU rate Statistics=====\n"));
-	PHYDM_SNPRINTF((output + used, out_len - used, "1SS MCS0 = %d, 1SS MCS1 = %d, 1SS MCS2 = %d, 1SS MCS 3 = %d\n",
-		p_dm->phy_dbg_info.num_qry_vht_pkt[0], p_dm->phy_dbg_info.num_qry_vht_pkt[1], p_dm->phy_dbg_info.num_qry_vht_pkt[2], p_dm->phy_dbg_info.num_qry_vht_pkt[3]));
-	PHYDM_SNPRINTF((output + used, out_len - used, "1SS MCS4 = %d, 1SS MCS5 = %d, 1SS MCS6 = %d, 1SS MCS 7 = %d\n",
-		p_dm->phy_dbg_info.num_qry_vht_pkt[4], p_dm->phy_dbg_info.num_qry_vht_pkt[5], p_dm->phy_dbg_info.num_qry_vht_pkt[6], p_dm->phy_dbg_info.num_qry_vht_pkt[7]));
-	PHYDM_SNPRINTF((output + used, out_len - used, "1SS MCS8 = %d, 1SS MCS9 = %d\n",
-		p_dm->phy_dbg_info.num_qry_vht_pkt[8], p_dm->phy_dbg_info.num_qry_vht_pkt[9]));
-	PHYDM_SNPRINTF((output + used, out_len - used, "2SS MCS0 = %d, 2SS MCS1 = %d, 2SS MCS2 = %d, 2SS MCS 3 = %d\n",
-		p_dm->phy_dbg_info.num_qry_vht_pkt[10], p_dm->phy_dbg_info.num_qry_vht_pkt[11], p_dm->phy_dbg_info.num_qry_vht_pkt[12], p_dm->phy_dbg_info.num_qry_vht_pkt[13]));
-	PHYDM_SNPRINTF((output + used, out_len - used, "2SS MCS4 = %d, 2SS MCS5 = %d, 2SS MCS6 = %d, 2SS MCS 7 = %d\n",
-		p_dm->phy_dbg_info.num_qry_vht_pkt[14], p_dm->phy_dbg_info.num_qry_vht_pkt[15], p_dm->phy_dbg_info.num_qry_vht_pkt[16], p_dm->phy_dbg_info.num_qry_vht_pkt[17]));
-	PHYDM_SNPRINTF((output + used, out_len - used, "2SS MCS8 = %d, 2SS MCS9 = %d\n",
-		p_dm->phy_dbg_info.num_qry_vht_pkt[18], p_dm->phy_dbg_info.num_qry_vht_pkt[19]));
-
-	PHYDM_SNPRINTF((output + used, out_len - used, "=====Rx MU rate Statistics=====\n"));
-	PHYDM_SNPRINTF((output + used, out_len - used, "1SS MCS0 = %d, 1SS MCS1 = %d, 1SS MCS2 = %d, 1SS MCS 3 = %d\n",
-		p_dm->phy_dbg_info.num_qry_mu_vht_pkt[0], p_dm->phy_dbg_info.num_qry_mu_vht_pkt[1], p_dm->phy_dbg_info.num_qry_mu_vht_pkt[2], p_dm->phy_dbg_info.num_qry_mu_vht_pkt[3]));
-	PHYDM_SNPRINTF((output + used, out_len - used, "1SS MCS4 = %d, 1SS MCS5 = %d, 1SS MCS6 = %d, 1SS MCS 7 = %d\n",
-		p_dm->phy_dbg_info.num_qry_mu_vht_pkt[4], p_dm->phy_dbg_info.num_qry_mu_vht_pkt[5], p_dm->phy_dbg_info.num_qry_mu_vht_pkt[6], p_dm->phy_dbg_info.num_qry_mu_vht_pkt[7]));
-	PHYDM_SNPRINTF((output + used, out_len - used, "1SS MCS8 = %d, 1SS MCS9 = %d\n",
-		p_dm->phy_dbg_info.num_qry_mu_vht_pkt[8], p_dm->phy_dbg_info.num_qry_mu_vht_pkt[9]));
-	PHYDM_SNPRINTF((output + used, out_len - used, "2SS MCS0 = %d, 2SS MCS1 = %d, 2SS MCS2 = %d, 2SS MCS 3 = %d\n",
-		p_dm->phy_dbg_info.num_qry_mu_vht_pkt[10], p_dm->phy_dbg_info.num_qry_mu_vht_pkt[11], p_dm->phy_dbg_info.num_qry_mu_vht_pkt[12], p_dm->phy_dbg_info.num_qry_mu_vht_pkt[13]));
-	PHYDM_SNPRINTF((output + used, out_len - used, "2SS MCS4 = %d, 2SS MCS5 = %d, 2SS MCS6 = %d, 2SS MCS 7 = %d\n",
-		p_dm->phy_dbg_info.num_qry_mu_vht_pkt[14], p_dm->phy_dbg_info.num_qry_mu_vht_pkt[15], p_dm->phy_dbg_info.num_qry_mu_vht_pkt[16], p_dm->phy_dbg_info.num_qry_mu_vht_pkt[17]));
-	PHYDM_SNPRINTF((output + used, out_len - used, "2SS MCS8 = %d, 2SS MCS9 = %d\n",
-		p_dm->phy_dbg_info.num_qry_mu_vht_pkt[18], p_dm->phy_dbg_info.num_qry_mu_vht_pkt[19]));
+#if (RTL8822B_SUPPORT || RTL8821C_SUPPORT || RTL8814B_SUPPORT ||\
+	RTL8195B_SUPPORT || RTL8822C_SUPPORT)
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct odm_phy_dbg_info *dbg = &dm->phy_dbg_info;
+	u32 used = *_used;
+	u32 out_len = *_out_len;
+	u32 var1[10] = {0};
+	char help[] = "-h";
+	u8 i, input_idx = 0;
 
+	for (i = 0; i < 5; i++) {
+		if (input[i + 1]) {
+			PHYDM_SSCANF(input[i + 1], DCMD_HEX, &var1[i]);
+			input_idx++;
+		}
+	}
+
+	if (input_idx == 0)
+		return;
+
+	if ((strcmp(input[1], help) == 0)) {
+		PDM_SNPF(out_len, used, output + used, out_len - used,
+			 "{1: show Rx rate, 0:reset counter}\n");
+		*_used = used;
+		*_out_len = out_len;
+		return;
+
+	} else if (var1[0] == 0) {
+		phydm_reset_rx_rate_distribution(dm);
+		*_used = used;
+		*_out_len = out_len;
+		return;
+	}
+
+	/* @==Show SU Rate====================================================*/
+	PDM_SNPF(out_len, used, output + used, out_len - used,
+		 "=====Rx SU rate Statistics=====\n");
+	PDM_SNPF(out_len, used, output + used, out_len - used,
+		 "[SU][1SS] {%d, %d, %d, %d | %d, %d, %d, %d | %d, %d}\n",
+		 dbg->num_qry_vht_pkt[0], dbg->num_qry_vht_pkt[1],
+		 dbg->num_qry_vht_pkt[2], dbg->num_qry_vht_pkt[3],
+		 dbg->num_qry_vht_pkt[4], dbg->num_qry_vht_pkt[5],
+		 dbg->num_qry_vht_pkt[6], dbg->num_qry_vht_pkt[7],
+		 dbg->num_qry_vht_pkt[8], dbg->num_qry_vht_pkt[9]);
+
+	#if (defined(PHYDM_COMPILE_ABOVE_2SS))
+	if (dm->support_ic_type & (PHYDM_IC_ABOVE_2SS)) {
+		PDM_SNPF(out_len, used, output + used, out_len - used,
+			 "[SU][2SS] {%d, %d, %d, %d | %d, %d, %d, %d | %d, %d}\n",
+			 dbg->num_qry_vht_pkt[10], dbg->num_qry_vht_pkt[11],
+			 dbg->num_qry_vht_pkt[12], dbg->num_qry_vht_pkt[13],
+			 dbg->num_qry_vht_pkt[14], dbg->num_qry_vht_pkt[15],
+			 dbg->num_qry_vht_pkt[16], dbg->num_qry_vht_pkt[17],
+			 dbg->num_qry_vht_pkt[18], dbg->num_qry_vht_pkt[19]);
+	}
+	#endif
+	/* @==Show MU Rate====================================================*/
+#if (ODM_PHY_STATUS_NEW_TYPE_SUPPORT) || (defined(PHYSTS_3RD_TYPE_SUPPORT))
+	PDM_SNPF(out_len, used, output + used, out_len - used,
+		 "=====Rx MU rate Statistics=====\n");
+	PDM_SNPF(out_len, used, output + used, out_len - used,
+		 "[MU][1SS] {%d, %d, %d, %d | %d, %d, %d, %d | %d, %d}\n",
+		 dbg->num_mu_vht_pkt[0], dbg->num_mu_vht_pkt[1],
+		 dbg->num_mu_vht_pkt[2], dbg->num_mu_vht_pkt[3],
+		 dbg->num_mu_vht_pkt[4], dbg->num_mu_vht_pkt[5],
+		 dbg->num_mu_vht_pkt[6], dbg->num_mu_vht_pkt[7],
+		 dbg->num_mu_vht_pkt[8], dbg->num_mu_vht_pkt[9]);
+
+	#if (defined(PHYDM_COMPILE_ABOVE_2SS))
+	if (dm->support_ic_type & (PHYDM_IC_ABOVE_2SS)) {
+		PDM_SNPF(out_len, used, output + used, out_len - used,
+			 "[MU][2SS] {%d, %d, %d, %d | %d, %d, %d, %d | %d, %d}\n",
+			 dbg->num_mu_vht_pkt[10], dbg->num_mu_vht_pkt[11],
+			 dbg->num_mu_vht_pkt[12], dbg->num_mu_vht_pkt[13],
+			 dbg->num_mu_vht_pkt[14], dbg->num_mu_vht_pkt[15],
+			 dbg->num_mu_vht_pkt[16], dbg->num_mu_vht_pkt[17],
+			 dbg->num_mu_vht_pkt[18], dbg->num_mu_vht_pkt[19]);
+	}
+	#endif
+#endif
 	*_used = used;
 	*_out_len = out_len;
+#endif
 }
 
+void phydm_per_tone_evm(void *dm_void, char input[][16], u32 *_used,
+			char *output, u32 *_out_len)
+{
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	u8 i, j;
+	u32 used = *_used;
+	u32 out_len = *_out_len;
+	u32 var1[4] = {0};
+	u32 val, tone_num, round;
+	s8 rxevm_0, rxevm_1;
+	s32 avg_num, evm_tone_0[256] = {0}, evm_tone_1[256] = {0};
+	s32 rxevm_sum_0, rxevm_sum_1;
+
+	if (dm->support_ic_type & ODM_IC_11N_SERIES) {
+		pr_debug("n series not support yet !\n");
+		return;
+	}
+
+	for (i = 0; i < 4; i++) {
+		if (input[i + 1])
+			PHYDM_SSCANF(input[i + 1], DCMD_DECIMAL, &var1[i]);
+	}
+
+	avg_num = var1[0];
+	round = var1[1];
+
+	if (!dm->is_linked) {
+		PDM_SNPF(out_len, used, output + used, out_len - used,
+			 "No Link !!\n");
+
+		*_used = used;
+		*_out_len = out_len;
+
+		return;
+	}
+
+	pr_debug("ID=((%d)), BW=((%d)), fc=((CH-%d))\n", dm->curr_station_id,
+		 20 << *dm->band_width, *dm->channel);
+	pr_debug("avg_num =((%d)), round =((%d))\n", avg_num, round);
+#if (DM_ODM_SUPPORT_TYPE & ODM_AP)
+	watchdog_stop(dm->priv);
 #endif
+	for (j = 0; j < round; j++) {
+		pr_debug("\nround((%d))\n", (j + 1));
+		if (*dm->band_width == CHANNEL_WIDTH_20) {
+			for (tone_num = 228; tone_num <= 255; tone_num++) {
+				odm_set_bb_reg(dm, R_0x8c4, 0xff8, tone_num);
+				rxevm_sum_0 = 0;
+				rxevm_sum_1 = 0;
+				for (i = 0; i < avg_num; i++) {
+					val = odm_read_4byte(dm, R_0xf8c);
+
+					rxevm_0 = (s8)((val & MASKBYTE2) >> 16);
+					rxevm_0 = (rxevm_0 / 2);
+					if (rxevm_0 < -63)
+						rxevm_0 = 0;
+
+					rxevm_1 = (s8)((val & MASKBYTE3) >> 24);
+					rxevm_1 = (rxevm_1 / 2);
+					if (rxevm_1 < -63)
+						rxevm_1 = 0;
+					rxevm_sum_0 += rxevm_0;
+					rxevm_sum_1 += rxevm_1;
+					ODM_delay_ms(1);
+				}
+				evm_tone_0[tone_num] = (rxevm_sum_0 / avg_num);
+				evm_tone_1[tone_num] = (rxevm_sum_1 / avg_num);
+				pr_debug("Tone(-%-3d) RXEVM(1ss/2ss)=%d, %d\n",
+					 (256 - tone_num), evm_tone_0[tone_num],
+					 evm_tone_1[tone_num]);
+			}
+
+			for (tone_num = 1; tone_num <= 28; tone_num++) {
+				odm_set_bb_reg(dm, R_0x8c4, 0xff8, tone_num);
+				rxevm_sum_0 = 0;
+				rxevm_sum_1 = 0;
+				for (i = 0; i < avg_num; i++) {
+					val = odm_read_4byte(dm, R_0xf8c);
+
+					rxevm_0 = (s8)((val & MASKBYTE2) >> 16);
+					rxevm_0 = (rxevm_0 / 2);
+					if (rxevm_0 < -63)
+						rxevm_0 = 0;
+
+					rxevm_1 = (s8)((val & MASKBYTE3) >> 24);
+					rxevm_1 = (rxevm_1 / 2);
+					if (rxevm_1 < -63)
+						rxevm_1 = 0;
+					rxevm_sum_0 += rxevm_0;
+					rxevm_sum_1 += rxevm_1;
+					ODM_delay_ms(1);
+				}
+				evm_tone_0[tone_num] = (rxevm_sum_0 / avg_num);
+				evm_tone_1[tone_num] = (rxevm_sum_1 / avg_num);
+				pr_debug("Tone(%-3d) RXEVM(1ss/2ss)=%d, %d\n",
+					 tone_num, evm_tone_0[tone_num],
+					 evm_tone_1[tone_num]);
+			}
+		} else if (*dm->band_width == CHANNEL_WIDTH_40) {
+			for (tone_num = 198; tone_num <= 254; tone_num++) {
+				odm_set_bb_reg(dm, R_0x8c4, 0xff8, tone_num);
+				rxevm_sum_0 = 0;
+				rxevm_sum_1 = 0;
+				for (i = 0; i < avg_num; i++) {
+					val = odm_read_4byte(dm, R_0xf8c);
+
+					rxevm_0 = (s8)((val & MASKBYTE2) >> 16);
+					rxevm_0 = (rxevm_0 / 2);
+					if (rxevm_0 < -63)
+						rxevm_0 = 0;
+
+					rxevm_1 = (s8)((val & MASKBYTE3) >> 24);
+					rxevm_1 = (rxevm_1 / 2);
+					if (rxevm_1 < -63)
+						rxevm_1 = 0;
+
+					rxevm_sum_0 += rxevm_0;
+					rxevm_sum_1 += rxevm_1;
+					ODM_delay_ms(1);
+				}
+				evm_tone_0[tone_num] = (rxevm_sum_0 / avg_num);
+				evm_tone_1[tone_num] = (rxevm_sum_1 / avg_num);
+				pr_debug("Tone(-%-3d) RXEVM(1ss/2ss)=%d, %d\n",
+					 (256 - tone_num), evm_tone_0[tone_num],
+					 evm_tone_1[tone_num]);
+			}
+
+			for (tone_num = 2; tone_num <= 58; tone_num++) {
+				odm_set_bb_reg(dm, R_0x8c4, 0xff8, tone_num);
+				rxevm_sum_0 = 0;
+				rxevm_sum_1 = 0;
+				for (i = 0; i < avg_num; i++) {
+					val = odm_read_4byte(dm, R_0xf8c);
+
+					rxevm_0 = (s8)((val & MASKBYTE2) >> 16);
+					rxevm_0 = (rxevm_0 / 2);
+					if (rxevm_0 < -63)
+						rxevm_0 = 0;
+
+					rxevm_1 = (s8)((val & MASKBYTE3) >> 24);
+					rxevm_1 = (rxevm_1 / 2);
+					if (rxevm_1 < -63)
+						rxevm_1 = 0;
+					rxevm_sum_0 += rxevm_0;
+					rxevm_sum_1 += rxevm_1;
+					ODM_delay_ms(1);
+				}
+				evm_tone_0[tone_num] = (rxevm_sum_0 / avg_num);
+				evm_tone_1[tone_num] = (rxevm_sum_1 / avg_num);
+				pr_debug("Tone(%-3d) RXEVM(1ss/2ss)=%d, %d\n",
+					 tone_num, evm_tone_0[tone_num],
+					 evm_tone_1[tone_num]);
+			}
+		} else if (*dm->band_width == CHANNEL_WIDTH_80) {
+			for (tone_num = 134; tone_num <= 254; tone_num++) {
+				odm_set_bb_reg(dm, R_0x8c4, 0xff8, tone_num);
+				rxevm_sum_0 = 0;
+				rxevm_sum_1 = 0;
+				for (i = 0; i < avg_num; i++) {
+					val = odm_read_4byte(dm, R_0xf8c);
+
+					rxevm_0 = (s8)((val & MASKBYTE2) >> 16);
+					rxevm_0 = (rxevm_0 / 2);
+					if (rxevm_0 < -63)
+						rxevm_0 = 0;
+
+					rxevm_1 = (s8)((val & MASKBYTE3) >> 24);
+					rxevm_1 = (rxevm_1 / 2);
+					if (rxevm_1 < -63)
+						rxevm_1 = 0;
+					rxevm_sum_0 += rxevm_0;
+					rxevm_sum_1 += rxevm_1;
+					ODM_delay_ms(1);
+				}
+				evm_tone_0[tone_num] = (rxevm_sum_0 / avg_num);
+				evm_tone_1[tone_num] = (rxevm_sum_1 / avg_num);
+				pr_debug("Tone(-%-3d) RXEVM(1ss/2ss)=%d, %d\n",
+					 (256 - tone_num), evm_tone_0[tone_num],
+					 evm_tone_1[tone_num]);
+			}
+
+			for (tone_num = 2; tone_num <= 122; tone_num++) {
+				odm_set_bb_reg(dm, R_0x8c4, 0xff8, tone_num);
+				rxevm_sum_0 = 0;
+				rxevm_sum_1 = 0;
+				for (i = 0; i < avg_num; i++) {
+					val = odm_read_4byte(dm, R_0xf8c);
+
+					rxevm_0 = (s8)((val & MASKBYTE2) >> 16);
+					rxevm_0 = (rxevm_0 / 2);
+					if (rxevm_0 < -63)
+						rxevm_0 = 0;
+
+					rxevm_1 = (s8)((val & MASKBYTE3) >> 24);
+					rxevm_1 = (rxevm_1 / 2);
+					if (rxevm_1 < -63)
+						rxevm_1 = 0;
+					rxevm_sum_0 += rxevm_0;
+					rxevm_sum_1 += rxevm_1;
+					ODM_delay_ms(1);
+				}
+				evm_tone_0[tone_num] = (rxevm_sum_0 / avg_num);
+				evm_tone_1[tone_num] = (rxevm_sum_1 / avg_num);
+				pr_debug("Tone(%-3d) RXEVM (1ss/2ss)=%d, %d\n",
+					 tone_num, evm_tone_0[tone_num],
+					 evm_tone_1[tone_num]);
+			}
+		}
+	}
+	*_used = used;
+	*_out_len = out_len;
+}
 
-void
-phydm_api_adjust(
-	void		*p_dm_void,
-	char		input[][16],
-	u32		*_used,
-	char		*output,
-	u32		*_out_len,
-	u32		input_num
-)
+void phydm_bw_ch_adjust(void *dm_void, char input[][16],
+			u32 *_used, char *output, u32 *_out_len)
 {
-	struct PHY_DM_STRUCT	*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	char		help[] = "-h";
-	u32		var1[10] = {0};
-	u32		used = *_used;
-	u32		out_len = *_out_len;
-	u8		i;
-	boolean	is_enable_dbg_mode;
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	char help[] = "-h";
+	u32 var1[10] = {0};
+	u32 used = *_used;
+	u32 out_len = *_out_len;
+	u8 i;
+	boolean is_enable_dbg_mode;
 	u8 central_ch, primary_ch_idx;
-	enum channel_width	bandwidth;
-	
+	enum channel_width bw;
+
 #ifdef PHYDM_COMMON_API_SUPPORT
 
 	if ((strcmp(input[1], help) == 0)) {
-		
-		PHYDM_SNPRINTF((output + used, out_len - used, "{en} {ch_num} {prm_ch 1/2/3/4/9/10} {0:20M, 1:40M, 2:80M}\n"));
-		
-	} else {
-	
-		if (p_dm->support_ic_type & (ODM_RTL8822B | ODM_RTL8197F | ODM_RTL8821C)) {
+		PDM_SNPF(out_len, used, output + used, out_len - used,
+			 "{en} {CH} {pr_ch_idx 1/2/3/4/9/10} {0:20M,1:40M,2:80M}\n");
+		goto out;
+	}
 
-			for (i = 0; i < 4; i++) {
-				if (input[i + 1])
-					PHYDM_SSCANF(input[i + 1], DCMD_DECIMAL, &var1[i]);
-			}
+	if (!(dm->support_ic_type & CMN_API_SUPPORT_IC)) {
+		PDM_SNPF(out_len, used, output + used, out_len - used,
+			 "Not support this API\n");
+		goto out;
+	}
 
-			is_enable_dbg_mode = (boolean)var1[0];
-			central_ch = (u8) var1[1];
-			primary_ch_idx = (u8) var1[2];
-			bandwidth = (enum channel_width)var1[3];
-
-			if (is_enable_dbg_mode) {
-				p_dm->is_disable_phy_api = false;
-				phydm_api_switch_bw_channel(p_dm, central_ch, primary_ch_idx, bandwidth);
-				p_dm->is_disable_phy_api = true;
-				PHYDM_SNPRINTF((output + used, out_len - used, "central_ch = %d, primary_ch_idx = %d, bandwidth = %d\n", central_ch, primary_ch_idx, bandwidth));
-			} else {
-				p_dm->is_disable_phy_api = false;
-				PHYDM_SNPRINTF((output + used, out_len - used, "Disable API debug mode\n"));
-			}
-		} else {
-			PHYDM_SNPRINTF((output + used, out_len - used, "This IC doesn't support PHYDM API function\n"));
-			/**/
-		}
+	for (i = 0; i < 4; i++) {
+		if (input[i + 1])
+			PHYDM_SSCANF(input[i + 1], DCMD_DECIMAL, &var1[i]);
 	}
 
-#else
-		PHYDM_SNPRINTF((output + used, out_len - used, "This IC doesn't support PHYDM API function\n"));
+	is_enable_dbg_mode = (boolean)var1[0];
+	central_ch = (u8)var1[1];
+	primary_ch_idx = (u8)var1[2];
+	bw = (enum channel_width)var1[3];
+
+	if (is_enable_dbg_mode) {
+		dm->is_disable_phy_api = false;
+		phydm_api_switch_bw_channel(dm, central_ch, primary_ch_idx, bw);
+		dm->is_disable_phy_api = true;
+		PDM_SNPF(out_len, used, output + used, out_len - used,
+			 "central_ch = %d, primary_ch_idx = %d, bw = %d\n",
+			 central_ch, primary_ch_idx, bw);
+	}
+out:
 #endif
 
 	*_used = used;
 	*_out_len = out_len;
 }
 
-void
-phydm_parameter_adjust(
-	void		*p_dm_void,
-	char		input[][16],
-	u32		*_used,
-	char		*output,
-	u32		*_out_len,
-	u32		input_num
-)
+void phydm_ext_rf_element_ctrl(void *dm_void, char input[][16], u32 *_used,
+			       char *output, u32 *_out_len)
 {
-	struct PHY_DM_STRUCT	*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	struct phydm_cfo_track_struct				*p_cfo_track = (struct phydm_cfo_track_struct *)phydm_get_structure(p_dm, PHYDM_CFOTRACK);
-	char		help[] = "-h";
-	u32		var1[10] = {0};
-	u32		used = *_used;
-	u32		out_len = *_out_len;
-	u8		i;
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	u32 val[10] = {0};
+	u8 i = 0, input_idx = 0;
+
+	for (i = 0; i < 5; i++) {
+		if (input[i + 1]) {
+			PHYDM_SSCANF(input[i + 1], DCMD_DECIMAL, &val[i]);
+			input_idx++;
+		}
+	}
 
-	if ((strcmp(input[1], help) == 0)) {
-		PHYDM_SNPRINTF((output + used, out_len - used, "1. X_cap = ((0x%x))\n", p_cfo_track->crystal_cap));
+	if (input_idx == 0)
+		return;
 
-	} else {
-	
-		PHYDM_SSCANF(input[1], DCMD_DECIMAL, &var1[0]);
+	if (val[0] == 1) /*@ext switch*/ {
+		phydm_set_ext_switch(dm, val[1]);
+	}
+}
 
-		if (var1[0] == 0) {
+void phydm_print_dbgport(void *dm_void, char input[][16], u32 *_used,
+			 char *output, u32 *_out_len)
+{
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	char help[] = "-h";
+	u32 var1[10] = {0};
+	u32 used = *_used;
+	u32 out_len = *_out_len;
+	u32 dbg_port_value = 0;
+	u8 val[32];
+	u8 tmp = 0;
+	u8 i;
+
+	if (strcmp(input[1], help) == 0) {
+		PDM_SNPF(out_len, used, output + used, out_len - used,
+			 "{dbg_port_idx}\n");
+		goto out;
+	}
+
+	PHYDM_SSCANF(input[1], DCMD_HEX, &var1[0]);
+
+	dm->debug_components |= ODM_COMP_API;
+	if (phydm_set_bb_dbg_port(dm, DBGPORT_PRI_3, var1[0])) {
+		dbg_port_value = phydm_get_bb_dbg_port_val(dm);
+		phydm_release_bb_dbg_port(dm);
+
+		for (i = 0; i < 32; i++)
+			val[i] = (u8)((dbg_port_value & BIT(i)) >> i);
+
+		PDM_SNPF(out_len, used, output + used, out_len - used,
+			 "Dbg Port[0x%x] = ((0x%x))\n", var1[0],
+			 dbg_port_value);
 
-			PHYDM_SSCANF(input[2], DCMD_HEX, &var1[1]);
-			phydm_set_crystal_cap(p_dm, (u8)var1[1]);
-			PHYDM_SNPRINTF((output + used, out_len - used, "X_cap = ((0x%x))\n", p_cfo_track->crystal_cap));
+		for (i = 4; i != 0; i--) {
+			tmp = 8 * (i - 1);
+			PDM_SNPF(out_len, used, output + used, out_len - used,
+				 "val[%d:%d] = 8b'%d %d %d %d %d %d %d %d\n",
+				 tmp + 7, tmp, val[tmp + 7], val[tmp + 6],
+				 val[tmp + 5], val[tmp + 4], val[tmp + 3],
+				 val[tmp + 2], val[tmp + 1], val[tmp + 0]);
 		}
 	}
+	dm->debug_components &= (~ODM_COMP_API);
+out:
 	*_used = used;
 	*_out_len = out_len;
 }
 
-struct _PHYDM_COMMAND {
+struct phydm_command {
 	char name[16];
 	u8 id;
 };
@@ -2001,6 +3887,7 @@ struct _PHYDM_COMMAND {
 enum PHYDM_CMD_ID {
 	PHYDM_HELP,
 	PHYDM_DEMO,
+	PHYDM_RF_CMD,
 	PHYDM_DIG,
 	PHYDM_RA,
 	PHYDM_PROFILE,
@@ -2009,15 +3896,10 @@ enum PHYDM_CMD_ID {
 	PHYDM_DEBUG,
 	PHYDM_FW_DEBUG,
 	PHYDM_SUPPORT_ABILITY,
-	PHYDM_RF_SUPPORTABILITY,
-	PHYDM_RF_PROFILE,
-	PHYDM_RF_IQK_INFO,
-	PHYDM_IQK,
-	PHYDM_IQK_DEBUG,
 	PHYDM_GET_TXAGC,
 	PHYDM_SET_TXAGC,
 	PHYDM_SMART_ANT,
-	PHYDM_API,
+	PHYDM_CH_BW,
 	PHYDM_TRX_PATH,
 	PHYDM_LA_MODE,
 	PHYDM_DUMP_REG,
@@ -2027,30 +3909,35 @@ enum PHYDM_CMD_ID {
 	PHYDM_NBI_EN,
 	PHYDM_CSI_MASK_EN,
 	PHYDM_DFS_DEBUG,
+	PHYDM_DFS_HIST,
 	PHYDM_NHM,
 	PHYDM_CLM,
+	PHYDM_FAHM,
+	PHYDM_ENV_MNTR,
 	PHYDM_BB_INFO,
 	PHYDM_TXBF,
 	PHYDM_H2C,
-	PHYDM_ANT_SWITCH,
-	PHYDM_DYNAMIC_RA_PATH,
+	PHYDM_EXT_RF_E_CTRL,
 	PHYDM_ADAPTIVE_SOML,
 	PHYDM_PSD,
 	PHYDM_DEBUG_PORT,
 	PHYDM_DIS_HTSTF_CONTROL,
-	PHYDM_TUNE_PARAMETER,
+	PHYDM_CFO_TRK,
 	PHYDM_ADAPTIVITY_DEBUG,
 	PHYDM_DIS_DYM_ANT_WEIGHTING,
 	PHYDM_FORECE_PT_STATE,
-	PHYDM_DIS_RXHP_CTR,
 	PHYDM_STA_INFO,
-	PHYDM_PAUSE_FUNC
+	PHYDM_PAUSE_FUNC,
+	PHYDM_PER_TONE_EVM,
+	PHYDM_DYN_TXPWR,
+	PHYDM_LNA_SAT
 };
 
-struct _PHYDM_COMMAND phy_dm_ary[] = {
-	{"-h", PHYDM_HELP},		/*do not move this element to other position*/
-	{"demo", PHYDM_DEMO},	/*do not move this element to other position*/
-	{"dig", PHYDM_DIG},	
+struct phydm_command phy_dm_ary[] = {
+	{"-h", PHYDM_HELP}, /*@do not move this element to other position*/
+	{"demo", PHYDM_DEMO}, /*@do not move this element to other position*/
+	{"rf", PHYDM_RF_CMD},
+	{"dig", PHYDM_DIG},
 	{"ra", PHYDM_RA},
 	{"profile", PHYDM_PROFILE},
 	{"antdiv", PHYDM_ANTDIV},
@@ -2058,15 +3945,10 @@ struct _PHYDM_COMMAND phy_dm_ary[] = {
 	{"dbg", PHYDM_DEBUG},
 	{"fw_dbg", PHYDM_FW_DEBUG},
 	{"ability", PHYDM_SUPPORT_ABILITY},
-	{"rf_ability", PHYDM_RF_SUPPORTABILITY},
-	{"rf_profile", PHYDM_RF_PROFILE},
-	{"iqk_info", PHYDM_RF_IQK_INFO},
-	{"iqk", PHYDM_IQK},
-	{"iqk_dbg", PHYDM_IQK_DEBUG},
 	{"get_txagc", PHYDM_GET_TXAGC},
 	{"set_txagc", PHYDM_SET_TXAGC},
 	{"smtant", PHYDM_SMART_ANT},
-	{"api", PHYDM_API},
+	{"ch_bw", PHYDM_CH_BW},
 	{"trxpath", PHYDM_TRX_PATH},
 	{"lamode", PHYDM_LA_MODE},
 	{"dumpreg", PHYDM_DUMP_REG},
@@ -2076,55 +3958,51 @@ struct _PHYDM_COMMAND phy_dm_ary[] = {
 	{"nbi", PHYDM_NBI_EN},
 	{"csi_mask", PHYDM_CSI_MASK_EN},
 	{"dfs", PHYDM_DFS_DEBUG},
+	{"dfs_hist", PHYDM_DFS_HIST},
 	{"nhm", PHYDM_NHM},
 	{"clm", PHYDM_CLM},
+	{"fahm", PHYDM_FAHM},
+	{"env_mntr", PHYDM_ENV_MNTR},
 	{"bbinfo", PHYDM_BB_INFO},
 	{"txbf", PHYDM_TXBF},
 	{"h2c", PHYDM_H2C},
-	{"ant_switch", PHYDM_ANT_SWITCH},
-	{"drp", PHYDM_DYNAMIC_RA_PATH},
+	{"ext_rfe", PHYDM_EXT_RF_E_CTRL},
 	{"soml", PHYDM_ADAPTIVE_SOML},
 	{"psd", PHYDM_PSD},
 	{"dbgport", PHYDM_DEBUG_PORT},
 	{"dis_htstf", PHYDM_DIS_HTSTF_CONTROL},
-	{"tune_para", PHYDM_TUNE_PARAMETER},
+	{"cfo_trk", PHYDM_CFO_TRK},
 	{"adapt_debug", PHYDM_ADAPTIVITY_DEBUG},
 	{"dis_dym_ant_wgt", PHYDM_DIS_DYM_ANT_WEIGHTING},
 	{"force_pt_state", PHYDM_FORECE_PT_STATE},
-	{"dis_drxhp", PHYDM_DIS_RXHP_CTR},
 	{"sta_info", PHYDM_STA_INFO},
-	{"pause", PHYDM_PAUSE_FUNC}
-};
+	{"pause", PHYDM_PAUSE_FUNC},
+	{"evm", PHYDM_PER_TONE_EVM},
+	{"dyn_txpwr", PHYDM_DYN_TXPWR},
+	{"lna_sat", PHYDM_LNA_SAT} };
+
+#endif /*@#ifdef CONFIG_PHYDM_DEBUG_FUNCTION*/
 
-#endif /*#ifdef CONFIG_PHYDM_DEBUG_FUNCTION*/
-
-void
-phydm_cmd_parser(
-	struct PHY_DM_STRUCT	*p_dm,
-	char		input[][MAX_ARGV],
-	u32	input_num,
-	u8	flag,
-	char		*output,
-	u32	out_len
-)
+void phydm_cmd_parser(struct dm_struct *dm, char input[][MAX_ARGV],
+		      u32 input_num, u8 flag, char *output, u32 out_len)
 {
 #ifdef CONFIG_PHYDM_DEBUG_FUNCTION
 	u32 used = 0;
 	u8 id = 0;
-	int var1[10] = {0};
-	int i, input_idx = 0, phydm_ary_size = sizeof(phy_dm_ary) / sizeof(struct _PHYDM_COMMAND);
-	char help[] = "-h";
+	u32 var1[10] = {0};
+	u32 i;
+	u32 phydm_ary_size = sizeof(phy_dm_ary) / sizeof(struct phydm_command);
 
 	if (flag == 0) {
-		PHYDM_SNPRINTF((output + used, out_len - used, "GET, nothing to print\n"));
+		PDM_SNPF(out_len, used, output + used, out_len - used,
+			 "GET, nothing to print\n");
 		return;
 	}
 
-	PHYDM_SNPRINTF((output + used, out_len - used, "\n"));
+	PDM_SNPF(out_len, used, output + used, out_len - used, "\n");
 
 	/* Parsing Cmd ID */
 	if (input_num) {
-
 		for (i = 0; i < phydm_ary_size; i++) {
 			if (strcmp(phy_dm_ary[i].name, input[0]) == 0) {
 				id = phy_dm_ary[i].id;
@@ -2132,778 +4010,318 @@ phydm_cmd_parser(
 			}
 		}
 		if (i == phydm_ary_size) {
-			PHYDM_SNPRINTF((output + used, out_len - used, "SET, command not found!\n"));
+			PDM_SNPF(out_len, used, output + used, out_len - used,
+				 "PHYDM command not found!\n");
 			return;
 		}
 	}
 
 	switch (id) {
+	case PHYDM_HELP: {
+		PDM_SNPF(out_len, used, output + used, out_len - used,
+			 "BB cmd ==>\n");
 
-	case PHYDM_HELP:
-	{
-		PHYDM_SNPRINTF((output + used, out_len - used, "BB cmd ==>\n"));
-		for (i = 0; i < phydm_ary_size - 2; i++) {
-
-			PHYDM_SNPRINTF((output + used, out_len - used, "  %-5d: %s\n", i, phy_dm_ary[i + 2].name));
-			/**/
-		}
-	}
-	break;
+		for (i = 0; i < phydm_ary_size - 2; i++)
+			PDM_SNPF(out_len, used, output + used, out_len - used,
+				 "  %-5d: %s\n", i, phy_dm_ary[i + 2].name);
+	} break;
 
-	case PHYDM_DEMO: { /*echo demo 10 0x3a z abcde >cmd*/
+	case PHYDM_DEMO: { /*@echo demo 10 0x3a z abcde >cmd*/
 		u32 directory = 0;
 
-#if (DM_ODM_SUPPORT_TYPE & (ODM_CE | ODM_AP))
+		#if (DM_ODM_SUPPORT_TYPE & (ODM_CE | ODM_AP))
 		char char_temp;
-#else
+		#else
 		u32 char_temp = ' ';
-#endif
+		#endif
 
 		PHYDM_SSCANF(input[1], DCMD_DECIMAL, &directory);
-		PHYDM_SNPRINTF((output + used, out_len - used, "Decimal value = %d\n", directory));
+		PDM_SNPF(out_len, used, output + used, out_len - used,
+			 "Decimal value = %d\n", directory);
 		PHYDM_SSCANF(input[2], DCMD_HEX, &directory);
-		PHYDM_SNPRINTF((output + used, out_len - used, "Hex value = 0x%x\n", directory));
+		PDM_SNPF(out_len, used, output + used, out_len - used,
+			 "Hex value = 0x%x\n", directory);
 		PHYDM_SSCANF(input[3], DCMD_CHAR, &char_temp);
-		PHYDM_SNPRINTF((output + used, out_len - used, "Char = %c\n", char_temp));
-		PHYDM_SNPRINTF((output + used, out_len - used, "String = %s\n", input[4]));
-	}
-	break;
-	
-	case PHYDM_DIG:
+		PDM_SNPF(out_len, used, output + used, out_len - used,
+			 "Char = %c\n", char_temp);
+		PDM_SNPF(out_len, used, output + used, out_len - used,
+			 "String = %s\n", input[4]);
+	} break;
+	case PHYDM_RF_CMD:
+		halrf_cmd_parser(dm, input, &used, output, &out_len, input_num);
+		break;
 
-		phydm_dig_debug(p_dm, &input[0], &used, output, &out_len, input_num);
+	case PHYDM_DIG:
+		phydm_dig_debug(dm, input, &used, output, &out_len);
 		break;
 
 	case PHYDM_RA:
-		phydm_ra_debug(p_dm, &input[0], &used, output, &out_len);
+		phydm_ra_debug(dm, input, &used, output, &out_len);
 		break;
 
 	case PHYDM_ANTDIV:
-
-		for (i = 0; i < 5; i++) {
-			if (input[i + 1]) {
-				PHYDM_SSCANF(input[i + 1], DCMD_HEX, &var1[i]);
-
-				/*PHYDM_SNPRINTF((output+used, out_len-used, "new SET, PATHDIV_var[%d]= (( %d ))\n", i, var1[i]));*/
-				input_idx++;
-			}
-		}
-
-		if (input_idx >= 1) {
-			/*PHYDM_SNPRINTF((output+used, out_len-used, "odm_PATHDIV_debug\n"));*/
-#if (defined(CONFIG_PHYDM_ANTENNA_DIVERSITY))
-			phydm_antdiv_debug(p_dm, (u32 *)var1, &used, output, &out_len);
-#endif
-		}
-
+		#if (defined(CONFIG_PHYDM_ANTENNA_DIVERSITY))
+		phydm_antdiv_debug(dm, input, &used, output, &out_len);
+		#endif
 		break;
 
 	case PHYDM_PATHDIV:
-
-		for (i = 0; i < 5; i++) {
-			if (input[i + 1]) {
-				PHYDM_SSCANF(input[i + 1], DCMD_HEX, &var1[i]);
-
-				/*PHYDM_SNPRINTF((output+used, out_len-used, "new SET, PATHDIV_var[%d]= (( %d ))\n", i, var1[i]));*/
-				input_idx++;
-			}
-		}
-
-		if (input_idx >= 1) {
-			/*PHYDM_SNPRINTF((output+used, out_len-used, "odm_PATHDIV_debug\n"));*/
-#if (defined(CONFIG_PATH_DIVERSITY))
-			odm_pathdiv_debug(p_dm, (u32 *)var1, &used, output, &out_len);
-#endif
-		}
-
+		#if (defined(CONFIG_PATH_DIVERSITY))
+		phydm_pathdiv_debug(dm, input, &used, output, &out_len);
+		#endif
 		break;
 
 	case PHYDM_DEBUG:
-
-		for (i = 0; i < 5; i++) {
-			if (input[i + 1]) {
-				PHYDM_SSCANF(input[i + 1], DCMD_DECIMAL, &var1[i]);
-
-				/*PHYDM_SNPRINTF((output+used, out_len-used, "new SET, Debug_var[%d]= (( %d ))\n", i, var1[i]));*/
-				input_idx++;
-			}
-		}
-
-		if (input_idx >= 1) {
-			/*PHYDM_SNPRINTF((output+used, out_len-used, "odm_debug_comp\n"));*/
-			phydm_debug_trace(p_dm, (u32 *)var1, &used, output, &out_len);
-		}
-
-
+		phydm_debug_trace(dm, input, &used, output, &out_len);
 		break;
 
 	case PHYDM_FW_DEBUG:
-
-		for (i = 0; i < 5; i++) {
-			if (input[i + 1]) {
-				PHYDM_SSCANF(input[i + 1], DCMD_DECIMAL, &var1[i]);
-				input_idx++;
-			}
-		}
-
-		if (input_idx >= 1)
-			phydm_fw_debug_trace(p_dm, (u32 *)var1, &used, output, &out_len);
-
+		phydm_fw_debug_trace(dm, input, &used, output, &out_len);
 		break;
 
 	case PHYDM_SUPPORT_ABILITY:
-
-		for (i = 0; i < 5; i++) {
-			if (input[i + 1]) {
-				PHYDM_SSCANF(input[i + 1], DCMD_DECIMAL, &var1[i]);
-
-				/*PHYDM_SNPRINTF((output+used, out_len-used, "new SET, support ablity_var[%d]= (( %d ))\n", i, var1[i]));*/
-				input_idx++;
-			}
-		}
-
-		if (input_idx >= 1) {
-			/*PHYDM_SNPRINTF((output+used, out_len-used, "support ablity\n"));*/
-			phydm_support_ability_debug(p_dm, (u32 *)var1, &used, output, &out_len);
-		}
-
+		phydm_supportability_en(dm, input, &used, output, &out_len);
 		break;
 
-	case PHYDM_RF_SUPPORTABILITY:
-		halrf_support_ability_debug(p_dm, &input[0], &used, output, &out_len);
-		break;
-
-	case PHYDM_RF_PROFILE:
-		halrf_basic_profile(p_dm, &used, output, &out_len);
-		break;
-		
-	case PHYDM_RF_IQK_INFO:
-		#if (RTL8822B_SUPPORT == 1 || RTL8821C_SUPPORT == 1)
-		if (p_dm->support_ic_type & (ODM_RTL8822B | ODM_RTL8821C))
-			halrf_iqk_info_dump(p_dm, &used, output, &out_len);
-		#endif
-		break;
-
-	case PHYDM_IQK:
-
-		PHYDM_SNPRINTF((output + used, out_len - used, "TRX IQK Trigger\n"));
-		halrf_iqk_trigger(p_dm, false);
-
-		#if (RTL8822B_SUPPORT == 1 || RTL8821C_SUPPORT == 1)
-		if (p_dm->support_ic_type & (ODM_RTL8822B | ODM_RTL8821C))
-			halrf_iqk_info_dump(p_dm, &used, output, &out_len);
-		#endif
-		
-		break;
-		
-	case PHYDM_IQK_DEBUG:
-
-		for (i = 0; i < 5; i++) {
-			if (input[i + 1]) {
-				PHYDM_SSCANF(input[i + 1], DCMD_HEX, &var1[i]);
-				input_idx++;
-			}
-		}
-
-		if (input_idx >= 1) {
-			#if (RTL8822B_SUPPORT == 1 || RTL8821C_SUPPORT == 1)
-			if (p_dm->support_ic_type & (ODM_RTL8822B | ODM_RTL8821C))
-				halrf_iqk_debug(p_dm, (u32 *)var1, &used, output, &out_len);
-			#endif
-		}
-		break;
-		
 	case PHYDM_SMART_ANT:
-
-		for (i = 0; i < 5; i++) {
-			if (input[i + 1]) {
-				PHYDM_SSCANF(input[i + 1], DCMD_HEX, &var1[i]);
-				input_idx++;
-			}
-		}
-
-		if (input_idx >= 1) {
-	#if (defined(CONFIG_PHYDM_ANTENNA_DIVERSITY))
+		#if (defined(CONFIG_PHYDM_ANTENNA_DIVERSITY))
 
 		#ifdef CONFIG_HL_SMART_ANTENNA_TYPE2
-		phydm_hl_smart_ant_debug_type2(p_dm, &input[0], &used, output, &out_len, input_num);
+		phydm_hl_smt_ant_dbg_type2(dm, input, &used, output, &out_len);
 		#elif (defined(CONFIG_HL_SMART_ANTENNA_TYPE1))
-		phydm_hl_smart_ant_debug(p_dm, &input[0], &used, output, &out_len, input_num);
+		phydm_hl_smart_ant_debug(dm, input, &used, output, &out_len);
 		#endif
-	
-	#endif
 
-	#if (defined(CONFIG_CUMITEK_SMART_ANTENNA))
-		phydm_cumitek_smt_ant_debug(p_dm, &input[0], &used, output, &out_len, input_num);
-	#endif
-		}
+		#elif (defined(CONFIG_CUMITEK_SMART_ANTENNA))
+		phydm_cumitek_smt_ant_debug(dm, input, &used, output, &out_len);
+		#endif
 
 		break;
 
-	case PHYDM_API:
-		phydm_api_adjust(p_dm, &input[0], &used, output, &out_len, input_num);
+	case PHYDM_CH_BW:
+		phydm_bw_ch_adjust(dm, input, &used, output, &out_len);
 		break;
 
 	case PHYDM_PROFILE:
-		phydm_basic_profile(p_dm, &used, output, &out_len);
+		phydm_basic_profile(dm, &used, output, &out_len);
 		break;
 
 	case PHYDM_GET_TXAGC:
-		phydm_get_txagc(p_dm, &used, output, &out_len);
+		phydm_get_txagc(dm, &used, output, &out_len);
 		break;
 
 	case PHYDM_SET_TXAGC:
-	{
-		boolean		is_enable_dbg_mode;
-
-		for (i = 0; i < 5; i++) {
-			if (input[i + 1]) {
-				PHYDM_SSCANF(input[i + 1], DCMD_HEX, &var1[i]);
-				input_idx++;
-			}
-		}
-
-		if ((strcmp(input[1], help) == 0)) {
-			PHYDM_SNPRINTF((output + used, out_len - used, "{En} {pathA~D(0~3)} {rate_idx(Hex), All_rate:0xff} {txagc_idx (Hex)}\n"));
-			/**/
-
-		} else {
-
-			is_enable_dbg_mode = (boolean)var1[0];
-			if (is_enable_dbg_mode) {
-				p_dm->is_disable_phy_api = false;
-				phydm_set_txagc(p_dm, (u32 *)var1, &used, output, &out_len);
-				p_dm->is_disable_phy_api = true;
-			} else {
-				p_dm->is_disable_phy_api = false;
-				PHYDM_SNPRINTF((output + used, out_len - used, "Disable API debug mode\n"));
-			}
-		}
-	}
-	break;
+		phydm_set_txagc_dbg(dm, input, &used, output, &out_len);
+		break;
 
 	case PHYDM_TRX_PATH:
-
-		for (i = 0; i < 4; i++) {
-			if (input[i + 1])
-				PHYDM_SSCANF(input[i + 1], DCMD_DECIMAL, &var1[i]);
-		}
-#if (RTL8822B_SUPPORT == 1 || RTL8197F_SUPPORT == 1)
-		if (p_dm->support_ic_type & (ODM_RTL8822B | ODM_RTL8197F)) {
-			u8		tx_path, rx_path;
-			boolean		is_enable_dbg_mode, is_tx2_path;
-
-			is_enable_dbg_mode = (boolean)var1[0];
-			tx_path = (u8) var1[1];
-			rx_path = (u8) var1[2];
-			is_tx2_path = (boolean) var1[3];
-
-			if (is_enable_dbg_mode) {
-				p_dm->is_disable_phy_api = false;
-				phydm_api_trx_mode(p_dm, (enum bb_path) tx_path, (enum bb_path) rx_path, is_tx2_path);
-				p_dm->is_disable_phy_api = true;
-				PHYDM_SNPRINTF((output + used, out_len - used, "tx_path = 0x%x, rx_path = 0x%x, is_tx2_path = %d\n", tx_path, rx_path, is_tx2_path));
-			} else {
-				p_dm->is_disable_phy_api = false;
-				PHYDM_SNPRINTF((output + used, out_len - used, "Disable API debug mode\n"));
-			}
-		} else
-#endif
-			phydm_config_trx_path(p_dm, (u32 *)var1, &used, output, &out_len);
-
+		phydm_config_trx_path(dm, input, &used, output, &out_len);
 		break;
 
 	case PHYDM_LA_MODE:
-
-		#if (PHYDM_LA_MODE_SUPPORT == 1)
-		phydm_lamode_trigger_setting(p_dm, &input[0], &used, output, &out_len, input_num);
-		#else
-		PHYDM_SNPRINTF((output + used, out_len - used, "This IC doesn't support LA mode\n"));
+		#if (PHYDM_LA_MODE_SUPPORT)
+		phydm_lamode_trigger_cmd(dm, input, &used, output, &out_len);
 		#endif
-
 		break;
 
 	case PHYDM_DUMP_REG:
-	{
-		u8	type = 0;
-
-		if (input[1]) {
-			PHYDM_SSCANF(input[1], DCMD_DECIMAL, &var1[0]);
-			type = (u8)var1[0];
-		}
-
-		if (type == 0)
-			phydm_dump_bb_reg(p_dm, &used, output, &out_len);
-		else if (type == 1)
-			phydm_dump_all_reg(p_dm, &used, output, &out_len);
-	}
-	break;
+		phydm_dump_reg(dm, input, &used, output, &out_len);
+		break;
 
 	case PHYDM_BIG_JUMP:
-	{
-#if (RTL8822B_SUPPORT == 1)
-		if (p_dm->support_ic_type & ODM_RTL8822B) {
-			if (input[1]) {
-				PHYDM_SSCANF(input[1], DCMD_DECIMAL, &var1[0]);
-				phydm_enable_big_jump(p_dm, (boolean)(var1[0]));
-			} else
-				PHYDM_SNPRINTF((output + used, out_len - used, "unknown command!\n"));
-		} else
-			PHYDM_SNPRINTF((output + used, out_len - used, "The command is only for 8822B!\n"));
-#endif
+		phydm_enable_big_jump(dm, input, &used, output, &out_len);
 		break;
-	}
 
 	case PHYDM_AUTO_DBG:
 		#ifdef PHYDM_AUTO_DEGBUG
-		phydm_auto_dbg_console(p_dm, &input[0], &used, output, &out_len, input_num);
+		phydm_auto_dbg_console(dm, input, &used, output, &out_len);
 		#endif
 		break;
 
 	case PHYDM_SHOW_RXRATE:
-#if (RTL8822B_SUPPORT == 1 | RTL8821C_SUPPORT == 1 | RTL8814B_SUPPORT == 1)
-		if (p_dm->support_ic_type & PHYDM_IC_SUPPORT_MU_BFEE) {
-			u8	rate_idx;
-
-			if (input[1])
-				PHYDM_SSCANF(input[1], DCMD_DECIMAL, &var1[0]);
-
-			if (var1[0] == 1)
-				phydm_show_rx_rate(p_dm, &used, output, &out_len);
-			else {
-				PHYDM_SNPRINTF((output + used, out_len - used, "Reset Rx rate counter\n"));
-
-				for (rate_idx = 0; rate_idx < 40; rate_idx++) {
-					p_dm->phy_dbg_info.num_qry_vht_pkt[rate_idx] = 0;
-					p_dm->phy_dbg_info.num_qry_mu_vht_pkt[rate_idx] = 0;
-				}
-			}
-		}
-#endif
+		phydm_show_rx_rate(dm, input, &used, output, &out_len);
 		break;
 
 	case PHYDM_NBI_EN:
-
-		for (i = 0; i < 5; i++) {
-			if (input[i + 1]) {
-				PHYDM_SSCANF(input[i + 1], DCMD_DECIMAL, &var1[i]);
-				input_idx++;
-			}
-		}
-
-		if (input_idx >= 1) {
-
-			phydm_api_debug(p_dm, PHYDM_API_NBI, (u32 *)var1, &used, output, &out_len);
-			/**/
-		}
-
-
+		phydm_nbi_debug(dm, input, &used, output, &out_len);
 		break;
 
 	case PHYDM_CSI_MASK_EN:
-
-		for (i = 0; i < 5; i++) {
-			if (input[i + 1]) {
-				PHYDM_SSCANF(input[i + 1], DCMD_DECIMAL, &var1[i]);
-				input_idx++;
-			}
-		}
-
-		if (input_idx >= 1) {
-
-			phydm_api_debug(p_dm, PHYDM_API_CSI_MASK, (u32 *)var1, &used, output, &out_len);
-			/**/
-		}
-
-
+		phydm_csi_debug(dm, input, &used, output, &out_len);
 		break;
 
+	#ifdef CONFIG_PHYDM_DFS_MASTER
 	case PHYDM_DFS_DEBUG:
-#ifdef CONFIG_PHYDM_DFS_MASTER
-		{
-			u32 var[4] = {0};
-
-			for (i = 0; i < 4; i++) {
-				if (input[i + 1]) {
-					PHYDM_SSCANF(input[i + 1], DCMD_HEX, &var[i]);
-					input_idx++;
-				}
-			}
+		phydm_dfs_debug(dm, input, &used, output, &out_len);
+		break;
 
-			if (input_idx >= 1)
-				phydm_dfs_debug(p_dm, var, &used, output, &out_len);
-		}
-#endif
+	case PHYDM_DFS_HIST:
+		phydm_dfs_hist_dbg(dm, input, &used, output, &out_len);
 		break;
+	#endif
 
 	case PHYDM_NHM:
-	{
-		u8		target_rssi;
-		u16		nhm_period = 0xC350;	/* 200ms */
-		u8		IGI;
-		struct _CCX_INFO	*ccx_info = &p_dm->dm_ccx_info;
-
-		PHYDM_SSCANF(input[1], DCMD_DECIMAL, &var1[0]);
-
-		if (input_num == 1) {
-
-			PHYDM_SNPRINTF((output + used, out_len - used, "\r\n Trigger NHM: echo nhm 1\n"));
-			PHYDM_SNPRINTF((output + used, out_len - used, "\r (Exclude CCA)\n"));
-			PHYDM_SNPRINTF((output + used, out_len - used, "\r Trigger NHM: echo nhm 2\n"));
-			PHYDM_SNPRINTF((output + used, out_len - used, "\r (Include CCA)\n"));
-			PHYDM_SNPRINTF((output + used, out_len - used, "\r Get NHM results: echo nhm 3\n"));
-
-			return;
-		}
-
-		/* NMH trigger */
-		if ((var1[0] <= 2) && (var1[0] != 0)) {
-
-			ccx_info->echo_igi = (u8)odm_get_bb_reg(p_dm, 0xC50, MASKBYTE0);
-
-			target_rssi = ccx_info->echo_igi - 10;
-
-			ccx_info->nhm_th[0] = (target_rssi - 15 + 10) * 2; /*Unit: PWdB U(8,1)*/
-
-			for (i = 1; i <= 10; i++)
-				ccx_info->nhm_th[i] = ccx_info->nhm_th[0] + 6 * i;
-
-			/* 4 1. store previous NHM setting */
-			phydm_nhm_setting(p_dm, STORE_NHM_SETTING);
-
-			/* 4 2. Set NHM period, 0x990[31:16]=0xC350, Time duration for NHM unit: 4us, 0xC350=200ms */
-			ccx_info->nhm_period = nhm_period;
-
-			PHYDM_SNPRINTF((output + used, out_len - used, "\r\n Monitor NHM for %d us", nhm_period * 4));
-
-			/* 4 3. Set NHM inexclude_txon, inexclude_cca, ccx_en */
-
-
-			ccx_info->nhm_inexclude_cca = (var1[0] == 1) ? NHM_EXCLUDE_CCA : NHM_INCLUDE_CCA;
-			ccx_info->nhm_inexclude_txon = NHM_EXCLUDE_TXON;
-
-			phydm_nhm_setting(p_dm, SET_NHM_SETTING);
-
-			for (i = 0; i <= 10; i++) {
-
-				if (i == 5)
-					PHYDM_SNPRINTF((output + used, out_len - used, "\r\n NHM_th[%d] = 0x%x, echo_igi = 0x%x", i, ccx_info->nhm_th[i], ccx_info->echo_igi));
-				else if (i == 10)
-					PHYDM_SNPRINTF((output + used, out_len - used, "\r\n NHM_th[%d] = 0x%x\n", i, ccx_info->nhm_th[i]));
-				else
-					PHYDM_SNPRINTF((output + used, out_len - used, "\r\n NHM_th[%d] = 0x%x", i, ccx_info->nhm_th[i]));
-			}
-
-			/* 4 4. Trigger NHM */
-			phydm_nhm_trigger(p_dm);
-
-		}
-
-		/*Get NHM results*/
-		else if (var1[0] == 3) {
-
-			IGI = (u8)odm_get_bb_reg(p_dm, 0xC50, MASKBYTE0);
-
-			PHYDM_SNPRINTF((output + used, out_len - used, "\r\n Cur_IGI = 0x%x", IGI));
-
-			phydm_get_nhm_result(p_dm);
-
-			/* 4 Resotre NHM setting */
-			phydm_nhm_setting(p_dm, RESTORE_NHM_SETTING);
-
-			for (i = 0; i <= 11; i++) {
-
-				if (i == 5)
-					PHYDM_SNPRINTF((output + used, out_len - used, "\r\n nhm_result[%d] = %d, echo_igi = 0x%x", i, ccx_info->nhm_result[i], ccx_info->echo_igi));
-				else if (i == 11)
-					PHYDM_SNPRINTF((output + used, out_len - used, "\r\n nhm_result[%d] = %d\n", i, ccx_info->nhm_result[i]));
-				else
-					PHYDM_SNPRINTF((output + used, out_len - used, "\r\n nhm_result[%d] = %d", i, ccx_info->nhm_result[i]));
-			}
-
-		} else {
-
-			PHYDM_SNPRINTF((output + used, out_len - used, "\r\n Trigger NHM: echo nhm 1\n"));
-			PHYDM_SNPRINTF((output + used, out_len - used, "\r (Exclude CCA)\n"));
-			PHYDM_SNPRINTF((output + used, out_len - used, "\r Trigger NHM: echo nhm 2\n"));
-			PHYDM_SNPRINTF((output + used, out_len - used, "\r (Include CCA)\n"));
-			PHYDM_SNPRINTF((output + used, out_len - used, "\r Get NHM results: echo nhm 3\n"));
-
-			return;
-		}
-	}
-	break;
+		#ifdef NHM_SUPPORT
+		phydm_nhm_dbg(dm, input, &used, output, &out_len);
+		#endif
+		break;
 
 	case PHYDM_CLM:
-		phydm_clm_dbg(p_dm, &input[0], &used, output, &out_len, input_num);
+		#ifdef CLM_SUPPORT
+		phydm_clm_dbg(dm, input, &used, output, &out_len);
+		#endif
 		break;
 
 	#ifdef FAHM_SUPPORT
 	case PHYDM_FAHM:
-		phydm_fahm_dbg(p_dm, &input[0], &used, output, &out_len, input_num);
-	break;
+		phydm_fahm_dbg(dm, input, &used, output, &out_len);
+		break;
 	#endif
 
+	case PHYDM_ENV_MNTR:
+		phydm_env_mntr_dbg(dm, input, &used, output, &out_len);
+		break;
+
 	case PHYDM_BB_INFO:
-	{
-		s32 value32 = 0;
+		phydm_bb_hw_dbg_info(dm, input, &used, output, &out_len);
+		break;
 
-		phydm_bb_debug_info(p_dm, &used, output, &out_len);
+	case PHYDM_TXBF: {
+	#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_CE))
+	#ifdef PHYDM_BEAMFORMING_SUPPORT
+		struct _RT_BEAMFORMING_INFO *beamforming_info = NULL;
 
-		if (p_dm->support_ic_type & ODM_RTL8822B && input[1]) {
-			PHYDM_SSCANF(input[1], DCMD_DECIMAL, &var1[0]);
-			odm_set_bb_reg(p_dm, 0x1988, 0x003fff00, var1[0]);
-			value32 = odm_get_bb_reg(p_dm, 0xf84, MASKDWORD);
-			value32 = (value32 & 0xff000000) >> 24;
-			PHYDM_SNPRINTF((output + used, out_len - used, "\r\n %-35s = condition num = %d, subcarriers = %d\n", "Over condition num subcarrier", var1[0], value32));
-			odm_set_bb_reg(p_dm, 0x1988, BIT(22), 0x0);	/*disable report condition number*/
-		}
-	}
-	break;
-
-	case PHYDM_TXBF:
-	{
-#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_CE))
-#if (BEAMFORMING_SUPPORT == 1)
-		struct _RT_BEAMFORMING_INFO	*p_beamforming_info = &p_dm->beamforming_info;
+		beamforming_info = &dm->beamforming_info;
 
 		PHYDM_SSCANF(input[1], DCMD_DECIMAL, &var1[0]);
 		if (var1[0] == 0) {
-			p_beamforming_info->apply_v_matrix = false;
-			p_beamforming_info->snding3ss = true;
-			PHYDM_SNPRINTF((output + used, out_len - used, "\r\n dont apply V matrix and 3SS 789 snding\n"));
+			beamforming_info->apply_v_matrix = false;
+			beamforming_info->snding3ss = true;
+			PDM_SNPF(out_len, used, output + used, out_len - used,
+				 "\r\n dont apply V matrix and 3SS 789 snding\n");
 		} else if (var1[0] == 1) {
-			p_beamforming_info->apply_v_matrix = true;
-			p_beamforming_info->snding3ss = true;
-			PHYDM_SNPRINTF((output + used, out_len - used, "\r\n apply V matrix and 3SS 789 snding\n"));
+			beamforming_info->apply_v_matrix = true;
+			beamforming_info->snding3ss = true;
+			PDM_SNPF(out_len, used, output + used, out_len - used,
+				 "\r\n apply V matrix and 3SS 789 snding\n");
 		} else if (var1[0] == 2) {
-			p_beamforming_info->apply_v_matrix = true;
-			p_beamforming_info->snding3ss = false;
-			PHYDM_SNPRINTF((output + used, out_len - used, "\r\n default txbf setting\n"));
+			beamforming_info->apply_v_matrix = true;
+			beamforming_info->snding3ss = false;
+			PDM_SNPF(out_len, used, output + used, out_len - used,
+				 "\r\n default txbf setting\n");
 		} else
-			PHYDM_SNPRINTF((output + used, out_len - used, "\r\n unknown cmd!!\n"));
-#else
-		PHYDM_SNPRINTF((output + used, out_len - used, "\r\n no TxBF !!\n"));
-#endif
-#endif
-	}
-		break;
+			PDM_SNPF(out_len, used, output + used, out_len - used,
+				 "\r\n unknown cmd!!\n");
+	#endif
+	#endif
+	} break;
 
 	case PHYDM_H2C:
-
-		for (i = 0; i < 8; i++) {
-			if (input[i + 1]) {
-				PHYDM_SSCANF(input[i + 1], DCMD_HEX, &var1[i]);
-				input_idx++;
-			}
-		}
-
-		if (input_idx >= 1)
-			phydm_h2C_debug(p_dm, (u32 *)var1, &used, output, &out_len);
-
-
-		break;
-
-	case PHYDM_ANT_SWITCH:
-
-		for (i = 0; i < 8; i++) {
-			if (input[i + 1]) {
-				PHYDM_SSCANF(input[i + 1], DCMD_DECIMAL, &var1[i]);
-				input_idx++;
-			}
-		}
-
-		if (input_idx >= 1) {
-
-#if (RTL8821A_SUPPORT == 1)
-			phydm_set_ext_switch(p_dm, (u32 *)var1, &used, output, &out_len);
-#else
-			PHYDM_SNPRINTF((output + used, out_len - used, "Not Support IC"));
-#endif
-		}
-
-
+		phydm_h2C_debug(dm, input, &used, output, &out_len);
 		break;
 
-	case PHYDM_DYNAMIC_RA_PATH:
-
-#ifdef CONFIG_DYNAMIC_RX_PATH
-		for (i = 0; i < 8; i++) {
-			if (input[i + 1]) {
-				PHYDM_SSCANF(input[i + 1], DCMD_DECIMAL, &var1[i]);
-				input_idx++;
-			}
-		}
-
-		if (input_idx >= 1)
-			phydm_drp_debug(p_dm, (u32 *)var1, &used, output, &out_len);
-
-#else
-		PHYDM_SNPRINTF((output + used, out_len - used, "Not Support IC"));
-#endif
-
+	case PHYDM_EXT_RF_E_CTRL:
+		phydm_ext_rf_element_ctrl(dm, input, &used, output, &out_len);
 		break;
 
 	case PHYDM_ADAPTIVE_SOML:
-
-#ifdef CONFIG_ADAPTIVE_SOML
-		for (i = 0; i < 8; i++) {
-			if (input[i + 1]) {
-				PHYDM_SSCANF(input[i + 1], DCMD_DECIMAL, &var1[i]);
-				input_idx++;
-			}
-		}
-
-		if (input_idx >= 1)
-			phydm_soml_debug(p_dm, (u32 *)var1, &used, output, &out_len);
-
-#else
-		PHYDM_SNPRINTF((output + used, out_len - used, "Not Support IC"));
-#endif
-
+		#ifdef CONFIG_ADAPTIVE_SOML
+		phydm_soml_debug(dm, input, &used, output, &out_len);
+		#endif
 		break;
 
 	case PHYDM_PSD:
 
 		#ifdef CONFIG_PSD_TOOL
-		phydm_psd_debug(p_dm, &input[0], &used, output, &out_len, input_num);
+		phydm_psd_debug(dm, input, &used, output, &out_len);
 		#endif
 
 		break;
-		
-	case PHYDM_DEBUG_PORT:
-		{
-			u32	dbg_port_value;
-
-			PHYDM_SSCANF(input[1], DCMD_HEX, &var1[0]);
 
-			p_dm->debug_components |= ODM_COMP_API;
-			if (phydm_set_bb_dbg_port(p_dm, BB_DBGPORT_PRIORITY_3, var1[0])) {/*set debug port to 0x0*/
-
-				dbg_port_value = phydm_get_bb_dbg_port_value(p_dm);
-				phydm_release_bb_dbg_port(p_dm);
-				
-				PHYDM_SNPRINTF((output + used, out_len - used, "Dbg Port[0x%x] = ((0x%x))\n", var1[0], dbg_port_value));
-			}
-			p_dm->debug_components &= (~ODM_COMP_API);
-		}
-		break;
-		
-	case PHYDM_DIS_HTSTF_CONTROL:
-		{
-			if (input[1])
-				PHYDM_SSCANF(input[1], DCMD_DECIMAL, &var1[0]);
-
-			if (var1[0] == 1) {
-				
-				/* setting being false is for debug */
-				p_dm->bhtstfdisabled = true;
-				PHYDM_SNPRINTF((output + used, out_len - used, "Dynamic HT-STF Gain Control is Disable\n"));
-			}
-			else {
-				
-				/* default setting should be true, always be dynamic control*/
-				p_dm->bhtstfdisabled = false;
-				PHYDM_SNPRINTF((output + used, out_len - used, "Dynamic HT-STF Gain Control is Enable\n"));
-			}
-		}
-		break;
-		
-	case PHYDM_TUNE_PARAMETER:
-		phydm_parameter_adjust(p_dm, &input[0], &used, output, &out_len, input_num);
+	case PHYDM_DEBUG_PORT:
+		phydm_print_dbgport(dm, input, &used, output, &out_len);
 		break;
 
-	case PHYDM_ADAPTIVITY_DEBUG:
+	case PHYDM_DIS_HTSTF_CONTROL: {
+		if (input[1])
+			PHYDM_SSCANF(input[1], DCMD_DECIMAL, &var1[0]);
 
-		for (i = 0; i < 5; i++) {
-			if (input[i + 1]) {
-				PHYDM_SSCANF(input[i + 1], DCMD_HEX, &var1[i]);
-				input_idx++;
-			}
+		if (var1[0] == 1) {
+			/* setting being false is for debug */
+			dm->bhtstfdisabled = true;
+			PDM_SNPF(out_len, used, output + used, out_len - used,
+				 "Dynamic HT-STF Gain Control is Disable\n");
+		} else {
+			/* @default setting should be true,
+			 * always be dynamic control
+			 */
+			dm->bhtstfdisabled = false;
+			PDM_SNPF(out_len, used, output + used, out_len - used,
+				 "Dynamic HT-STF Gain Control is Enable\n");
 		}
+	} break;
 
-		if (input_idx >= 1)
-			phydm_adaptivity_debug(p_dm, (u32 *)var1, &used, output, &out_len);
+	case PHYDM_CFO_TRK:
+		phydm_cfo_tracking_debug(dm, input, &used, output, &out_len);
+		break;
 
+	case PHYDM_ADAPTIVITY_DEBUG:
+		#ifdef PHYDM_SUPPORT_ADAPTIVITY
+		phydm_adaptivity_debug(dm, input, &used, output, &out_len);
+		#endif
 		break;
 
-	case PHYDM_DIS_DYM_ANT_WEIGHTING:	
-		PHYDM_SSCANF(input[1], DCMD_DECIMAL, &var1[0]);
-		if (input_num == 1) {		
-			PHYDM_SNPRINTF((output + used, out_len - used, "\r\n Disable dynamic antenna weighting: echo dis_dym_ant_weighting 1\n"));
-			PHYDM_SNPRINTF((output + used, out_len - used, "\r\n Enable dynamic antenna weighting: echo dis_dym_ant_weighting 0\n"));
-			return;
-		}
-		
-		if (var1[0] == 1) {
-			p_dm->is_disable_dym_ant_weighting = 1;
-			PHYDM_SNPRINTF((output + used, out_len - used, "\r\n Disable dynmic antenna weighting !\n"));
-		} else if(var1[0] == 0) {
-			p_dm->is_disable_dym_ant_weighting = 0;
-			PHYDM_SNPRINTF((output + used, out_len - used, "\r\n Enable dynmic antenna weighting !\n"));
-		} else {
-			p_dm->is_disable_dym_ant_weighting = 0;
-			PHYDM_SNPRINTF((output + used, out_len - used, "\r\n Enable dynmic antenna weighting !\n"));
-		}
+	case PHYDM_DIS_DYM_ANT_WEIGHTING:
+		#ifdef DYN_ANT_WEIGHTING_SUPPORT
+		phydm_ant_weight_dbg(dm, input, &used, output, &out_len);
+		#endif
 		break;
 
 	case PHYDM_FORECE_PT_STATE:
-		{
-
-		#ifdef PHYDM_POWER_TRAINING_SUPPORT	
-			phydm_pow_train_debug(p_dm, &input[0], &used, output, &out_len, input_num);
-		#else
-			PHYDM_SNPRINTF((output + used, out_len - used, "Pow training: Not Support\n"));
+		#ifdef PHYDM_POWER_TRAINING_SUPPORT
+		phydm_pow_train_debug(dm, input, &used, output, &out_len);
 		#endif
-		
 		break;
-		}
 
-	case PHYDM_DIS_RXHP_CTR:
-		{
-			if (input[1])
-				PHYDM_SSCANF(input[1], DCMD_DECIMAL, &var1[0]);
-
-			if (var1[0] == 1) {
-				/* the setting being on is at debug mode to disconnect RxHP seeting with SoML on/odd */
-				p_dm->disrxhpsoml = true;
-				PHYDM_SNPRINTF((output + used, out_len - used, "Dynamic RxHP Control with SoML on/off is Disable\n"));
-			}
-			else if (var1[0] == 0) {
-				/* default setting, RxHP setting will follow SoML on/off setting */
-				p_dm->disrxhpsoml = false;
-				PHYDM_SNPRINTF((output + used, out_len - used, "Dynamic RxHP Control with SoML on/off is Enable\n"));
-			}
-			else {
-				p_dm->disrxhpsoml = false;
-				PHYDM_SNPRINTF((output + used, out_len - used, "Default Setting, Dynamic RxHP Control with SoML on/off is Enable\n"));
-			}
-		}
-		break;
-		
 	case PHYDM_STA_INFO:
-		phydm_show_sta_info(p_dm, &input[0], &used, output, &out_len, input_num);
+		phydm_show_sta_info(dm, input, &used, output, &out_len);
 		break;
 
 	case PHYDM_PAUSE_FUNC:
-		phydm_pause_func_console(p_dm, &input[0], &used, output, &out_len, input_num);
+		phydm_pause_func_console(dm, input, &used, output, &out_len);
 		break;
 
-	default:
-		PHYDM_SNPRINTF((output + used, out_len - used, "SET, unknown command!\n"));
+	case PHYDM_PER_TONE_EVM:
+		phydm_per_tone_evm(dm, input, &used, output, &out_len);
+		break;
+
+	#ifdef CONFIG_DYNAMIC_TX_TWR
+	case PHYDM_DYN_TXPWR:
+		phydm_dtp_debug(dm, input, &used, output, &out_len);
+		break;
+	#endif
+
+	case PHYDM_LNA_SAT:
+		#ifdef PHYDM_LNA_SAT_CHK_SUPPORT
+		phydm_lna_sat_debug(dm, input, &used, output, &out_len);
+		#endif
 		break;
 
+	default:
+		PDM_SNPF(out_len, used, output + used, out_len - used,
+			 "Do not support this command\n");
+		break;
 	}
-#endif /*#ifdef CONFIG_PHYDM_DEBUG_FUNCTION*/
+#endif /*@#ifdef CONFIG_PHYDM_DEBUG_FUNCTION*/
 }
 
-#ifdef __ECOS
+#if defined __ECOS || defined __ICCARM__
 char *strsep(char **s, const char *ct)
 {
 	char *sbegin = *s;
 	char *end;
 
-	if (sbegin == NULL)
+	if (!sbegin)
 		return NULL;
 
 	end = strpbrk(sbegin, ct);
@@ -2914,320 +4332,367 @@ char *strsep(char **s, const char *ct)
 }
 #endif
 
-#if (DM_ODM_SUPPORT_TYPE & (ODM_CE | ODM_AP))
-s32
-phydm_cmd(
-	struct PHY_DM_STRUCT	*p_dm,
-	char		*input,
-	u32	in_len,
-	u8	flag,
-	char	*output,
-	u32	out_len
-)
+#if (DM_ODM_SUPPORT_TYPE & (ODM_CE | ODM_AP | ODM_IOT))
+s32 phydm_cmd(struct dm_struct *dm, char *input, u32 in_len, u8 flag,
+	      char *output, u32 out_len)
 {
 	char *token;
-	u32	argc = 0;
-	char		argv[MAX_ARGC][MAX_ARGV];
+	u32 argc = 0;
+	char argv[MAX_ARGC][MAX_ARGV];
 
 	do {
 		token = strsep(&input, ", ");
 		if (token) {
-			strcpy(argv[argc], token);
+			if (strlen(token) <= MAX_ARGV)
+				strcpy(argv[argc], token);
+
 			argc++;
-		} else
+		} else {
 			break;
+		}
 	} while (argc < MAX_ARGC);
 
 	if (argc == 1)
 		argv[0][strlen(argv[0]) - 1] = '\0';
 
-	phydm_cmd_parser(p_dm, argv, argc, flag, output, out_len);
+	phydm_cmd_parser(dm, argv, argc, flag, output, out_len);
 
 	return 0;
 }
 #endif
 
-
-void
-phydm_fw_trace_handler(
-	void	*p_dm_void,
-	u8	*cmd_buf,
-	u8	cmd_len
-)
+void phydm_fw_trace_handler(void *dm_void, u8 *cmd_buf, u8 cmd_len)
 {
 #ifdef CONFIG_PHYDM_DEBUG_FUNCTION
-	struct PHY_DM_STRUCT		*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
 
-	/*u8	debug_trace_11byte[60];*/
-	u8		freg_num, c2h_seq, buf_0 = 0;
+	/*@u8	debug_trace_11byte[60];*/
+	u8 freg_num, c2h_seq, buf_0 = 0;
 
-
-	if (!(p_dm->support_ic_type & PHYDM_IC_3081_SERIES))
+	if (!(dm->support_ic_type & PHYDM_IC_3081_SERIES))
 		return;
 
-	if ((cmd_len > 12) || (cmd_len == 0)) {
-		dbg_print("[Warning] Error C2H cmd_len=%d\n", cmd_len);
+	if (cmd_len > 12 || cmd_len == 0) {
+		pr_debug("[Warning] Error C2H cmd_len=%d\n", cmd_len);
 		return;
 	}
 
 	buf_0 = cmd_buf[0];
 	freg_num = (buf_0 & 0xf);
 	c2h_seq = (buf_0 & 0xf0) >> 4;
-	/*PHYDM_DBG(p_dm, DBG_FW_TRACE,("[FW debug message] freg_num = (( %d )), c2h_seq = (( %d ))\n", freg_num,c2h_seq ));*/
-
-	/*strncpy(debug_trace_11byte,&cmd_buf[1],(cmd_len-1));*/
-	/*debug_trace_11byte[cmd_len-1] = '\0';*/
-	/*PHYDM_DBG(p_dm, DBG_FW_TRACE,("[FW debug message] %s\n", debug_trace_11byte));*/
-	/*PHYDM_DBG(p_dm, DBG_FW_TRACE,("[FW debug message] cmd_len = (( %d ))\n", cmd_len));*/
-	/*PHYDM_DBG(p_dm, DBG_FW_TRACE,("[FW debug message] c2h_cmd_start  = (( %d ))\n", p_dm->c2h_cmd_start));*/
-
-
 
-	/*PHYDM_DBG(p_dm, DBG_FW_TRACE,("pre_seq = (( %d )), current_seq = (( %d ))\n", p_dm->pre_c2h_seq, c2h_seq));*/
-	/*PHYDM_DBG(p_dm, DBG_FW_TRACE,("fw_buff_is_enpty = (( %d ))\n", p_dm->fw_buff_is_enpty));*/
+	#if 0
+	PHYDM_DBG(dm, DBG_FW_TRACE,
+		  "[FW debug message] freg_num = (( %d )), c2h_seq=(( %d ))\n",
+		  freg_num, c2h_seq);
+
+	strncpy(debug_trace_11byte, &cmd_buf[1], (cmd_len - 1));
+	debug_trace_11byte[cmd_len - 1] = '\0';
+	PHYDM_DBG(dm, DBG_FW_TRACE, "[FW debug message] %s\n",
+		  debug_trace_11byte);
+	PHYDM_DBG(dm, DBG_FW_TRACE, "[FW debug message] cmd_len = (( %d ))\n",
+		  cmd_len);
+	PHYDM_DBG(dm, DBG_FW_TRACE, "[FW debug message] c2h_cmd_start=((%d))\n",
+		  dm->c2h_cmd_start);
+
+	PHYDM_DBG(dm, DBG_FW_TRACE, "pre_seq = (( %d )), current_seq=((%d))\n",
+		  dm->pre_c2h_seq, c2h_seq);
+	PHYDM_DBG(dm, DBG_FW_TRACE, "fw_buff_is_enpty = (( %d ))\n",
+		  dm->fw_buff_is_enpty);
+	#endif
 
-	if ((c2h_seq != p_dm->pre_c2h_seq)  &&  p_dm->fw_buff_is_enpty == false) {
-		p_dm->fw_debug_trace[p_dm->c2h_cmd_start] = '\0';
-		PHYDM_DBG(p_dm, DBG_FW_TRACE, ("[FW Dbg Queue Overflow] %s\n", p_dm->fw_debug_trace));
-		p_dm->c2h_cmd_start = 0;
+	if (c2h_seq != dm->pre_c2h_seq && dm->fw_buff_is_enpty == false) {
+		dm->fw_debug_trace[dm->c2h_cmd_start] = '\0';
+		PHYDM_DBG(dm, DBG_FW_TRACE, "[FW Dbg Queue Overflow] %s\n",
+			  dm->fw_debug_trace);
+		dm->c2h_cmd_start = 0;
 	}
 
-	if ((cmd_len - 1) > (60 - p_dm->c2h_cmd_start)) {
-		p_dm->fw_debug_trace[p_dm->c2h_cmd_start] = '\0';
-		PHYDM_DBG(p_dm, DBG_FW_TRACE, ("[FW Dbg Queue error: wrong C2H length] %s\n", p_dm->fw_debug_trace));
-		p_dm->c2h_cmd_start = 0;
+	if ((cmd_len - 1) > (60 - dm->c2h_cmd_start)) {
+		dm->fw_debug_trace[dm->c2h_cmd_start] = '\0';
+		PHYDM_DBG(dm, DBG_FW_TRACE,
+			  "[FW Dbg Queue error: wrong C2H length] %s\n",
+			  dm->fw_debug_trace);
+		dm->c2h_cmd_start = 0;
 		return;
 	}
 
-	strncpy((char *)&(p_dm->fw_debug_trace[p_dm->c2h_cmd_start]), (char *)&cmd_buf[1], (cmd_len - 1));
-	p_dm->c2h_cmd_start += (cmd_len - 1);
-	p_dm->fw_buff_is_enpty = false;
+	strncpy((char *)&dm->fw_debug_trace[dm->c2h_cmd_start],
+		(char *)&cmd_buf[1], (cmd_len - 1));
+	dm->c2h_cmd_start += (cmd_len - 1);
+	dm->fw_buff_is_enpty = false;
 
-	if (freg_num == 0 || p_dm->c2h_cmd_start >= 60) {
-		if (p_dm->c2h_cmd_start < 60)
-			p_dm->fw_debug_trace[p_dm->c2h_cmd_start] = '\0';
+	if (freg_num == 0 || dm->c2h_cmd_start >= 60) {
+		if (dm->c2h_cmd_start < 60)
+			dm->fw_debug_trace[dm->c2h_cmd_start] = '\0';
 		else
-			p_dm->fw_debug_trace[59] = '\0';
+			dm->fw_debug_trace[59] = '\0';
 
-		PHYDM_DBG(p_dm, DBG_FW_TRACE, ("[FW DBG Msg] %s\n", p_dm->fw_debug_trace));
-		/*dbg_print("[FW DBG Msg] %s\n", p_dm->fw_debug_trace);*/
-		p_dm->c2h_cmd_start = 0;
-		p_dm->fw_buff_is_enpty = true;
+		PHYDM_DBG(dm, DBG_FW_TRACE, "[FW DBG Msg] %s\n",
+			  dm->fw_debug_trace);
+#if 0
+		/*@dbg_print("[FW DBG Msg] %s\n", dm->fw_debug_trace);*/
+#endif
+		dm->c2h_cmd_start = 0;
+		dm->fw_buff_is_enpty = true;
 	}
 
-	p_dm->pre_c2h_seq = c2h_seq;
-#endif /*#ifdef CONFIG_PHYDM_DEBUG_FUNCTION*/
+	dm->pre_c2h_seq = c2h_seq;
+#endif /*@#ifdef CONFIG_PHYDM_DEBUG_FUNCTION*/
 }
 
-void
-phydm_fw_trace_handler_code(
-	void	*p_dm_void,
-	u8	*buffer,
-	u8	cmd_len
-)
+void phydm_fw_trace_handler_code(void *dm_void, u8 *buffer, u8 cmd_len)
 {
 #ifdef CONFIG_PHYDM_DEBUG_FUNCTION
-	struct PHY_DM_STRUCT	*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	u8	function = buffer[0];
-	u8	dbg_num = buffer[1];
-	u16	content_0 = (((u16)buffer[3]) << 8) | ((u16)buffer[2]);
-	u16	content_1 = (((u16)buffer[5]) << 8) | ((u16)buffer[4]);
-	u16	content_2 = (((u16)buffer[7]) << 8) | ((u16)buffer[6]);
-	u16	content_3 = (((u16)buffer[9]) << 8) | ((u16)buffer[8]);
-	u16	content_4 = (((u16)buffer[11]) << 8) | ((u16)buffer[10]);
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	u8 function = buffer[0];
+	u8 dbg_num = buffer[1];
+	u16 content_0 = (((u16)buffer[3]) << 8) | ((u16)buffer[2]);
+	u16 content_1 = (((u16)buffer[5]) << 8) | ((u16)buffer[4]);
+	u16 content_2 = (((u16)buffer[7]) << 8) | ((u16)buffer[6]);
+	u16 content_3 = (((u16)buffer[9]) << 8) | ((u16)buffer[8]);
+	u16 content_4 = (((u16)buffer[11]) << 8) | ((u16)buffer[10]);
 
 	if (cmd_len > 12)
-		PHYDM_DBG(p_dm, DBG_FW_TRACE, ("[FW Msg] Invalid cmd length (( %d )) >12\n", cmd_len));
-
-	/* PHYDM_DBG(p_dm, DBG_FW_TRACE,("[FW Msg] Func=((%d)),  num=((%d)), ct_0=((%d)), ct_1=((%d)), ct_2=((%d)), ct_3=((%d)), ct_4=((%d))\n", */
-	/*	function, dbg_num, content_0, content_1, content_2, content_3, content_4)); */
-
-	/*--------------------------------------------*/
+		PHYDM_DBG(dm, DBG_FW_TRACE,
+			  "[FW Msg] Invalid cmd length (( %d )) >12\n",
+			  cmd_len);
+/*@--------------------------------------------*/
 #ifdef CONFIG_RA_FW_DBG_CODE
 	if (function == RATE_DECISION) {
 		if (dbg_num == 0) {
 			if (content_0 == 1)
-				PHYDM_DBG(p_dm, DBG_FW_TRACE, ("[FW] RA_CNT=((%d))  Max_device=((%d))--------------------------->\n", content_1, content_2));
+				PHYDM_DBG(dm, DBG_FW_TRACE,
+					  "[FW] RA_CNT=((%d))  Max_device=((%d))--------------------------->\n",
+					  content_1, content_2);
 			else if (content_0 == 2)
-				PHYDM_DBG(p_dm, DBG_FW_TRACE, ("[FW] Check RA macid= ((%d)), MediaStatus=((%d)), Dis_RA=((%d)),  try_bit=((0x%x))\n", content_1, content_2, content_3, content_4));
+				PHYDM_DBG(dm, DBG_FW_TRACE,
+					  "[FW] Check RA macid= ((%d)), MediaStatus=((%d)), Dis_RA=((%d)),  try_bit=((0x%x))\n",
+					  content_1, content_2, content_3,
+					  content_4);
 			else if (content_0 == 3)
-				PHYDM_DBG(p_dm, DBG_FW_TRACE, ("[FW] Check RA  total=((%d)),  drop=((0x%x)), TXRPT_TRY_bit=((%x)), bNoisy=((%x))\n", content_1, content_2, content_3, content_4));
+				PHYDM_DBG(dm, DBG_FW_TRACE,
+					  "[FW] Check RA  total=((%d)),  drop=((0x%x)), TXRPT_TRY_bit=((%x)), bNoisy=((%x))\n",
+					  content_1, content_2, content_3,
+					  content_4);
 		} else if (dbg_num == 1) {
 			if (content_0 == 1)
-				PHYDM_DBG(p_dm, DBG_FW_TRACE, ("[FW] RTY[0,1,2,3]=[ %d , %d , %d , %d ]\n", content_1, content_2, content_3, content_4));
+				PHYDM_DBG(dm, DBG_FW_TRACE,
+					  "[FW] RTY[0,1,2,3]=[ %d , %d , %d , %d ]\n",
+					  content_1, content_2, content_3,
+					  content_4);
 			else if (content_0 == 2) {
-				PHYDM_DBG(p_dm, DBG_FW_TRACE, ("[FW] RTY[4]=[ %d ], drop=(( %d )), total=(( %d )), current_rate=((0x %x ))", content_1, content_2, content_3, content_4));
-				phydm_print_rate(p_dm, (u8)content_4, DBG_FW_TRACE);
+				PHYDM_DBG(dm, DBG_FW_TRACE,
+					  "[FW] RTY[4]=[ %d ], drop=(( %d )), total=(( %d )), current_rate=((0x %x ))",
+					  content_1, content_2, content_3,
+					  content_4);
+				phydm_print_rate(dm, (u8)content_4,
+						 DBG_FW_TRACE);
 			} else if (content_0 == 3)
-				PHYDM_DBG(p_dm, DBG_FW_TRACE, ("[FW] penality_idx=(( %d ))\n", content_1));
+				PHYDM_DBG(dm, DBG_FW_TRACE,
+					  "[FW] penality_idx=(( %d ))\n",
+					  content_1);
 			else if (content_0 == 4)
-				PHYDM_DBG(p_dm, DBG_FW_TRACE, ("[FW] RSSI=(( %d )), ra_stage = (( %d ))\n", content_1, content_2));
-		}
-
-		else if (dbg_num == 3) {
+				PHYDM_DBG(dm, DBG_FW_TRACE,
+					  "[FW] RSSI=(( %d )), ra_stage = (( %d ))\n",
+					  content_1, content_2);
+		} else if (dbg_num == 3) {
 			if (content_0 == 1)
-				PHYDM_DBG(p_dm, DBG_FW_TRACE, ("[FW] Fast_RA (( DOWN ))  total=((%d)),  total>>1=((%d)), R4+R3+R2 = ((%d)), RateDownHold = ((%d))\n", content_1, content_2, content_3, content_4));
+				PHYDM_DBG(dm, DBG_FW_TRACE,
+					  "[FW] Fast_RA (( DOWN ))  total=((%d)),  total>>1=((%d)), R4+R3+R2 = ((%d)), RateDownHold = ((%d))\n",
+					  content_1, content_2, content_3,
+					  content_4);
 			else if (content_0 == 2)
-				PHYDM_DBG(p_dm, DBG_FW_TRACE, ("[FW] Fast_RA (( UP ))  total_acc=((%d)),  total_acc>>1=((%d)), R4+R3+R2 = ((%d)), RateDownHold = ((%d))\n", content_1, content_2, content_3, content_4));
+				PHYDM_DBG(dm, DBG_FW_TRACE,
+					  "[FW] Fast_RA (( UP ))  total_acc=((%d)),  total_acc>>1=((%d)), R4+R3+R2 = ((%d)), RateDownHold = ((%d))\n",
+					  content_1, content_2, content_3,
+					  content_4);
 			else if (content_0 == 3)
-				PHYDM_DBG(p_dm, DBG_FW_TRACE, ("[FW] Fast_RA (( UP )) ((rate Down Hold))  RA_CNT=((%d))\n", content_1));
+				PHYDM_DBG(dm, DBG_FW_TRACE,
+					  "[FW] Fast_RA (( UP )) ((rate Down Hold))  RA_CNT=((%d))\n",
+					  content_1);
 			else if (content_0 == 4)
-				PHYDM_DBG(p_dm, DBG_FW_TRACE, ("[FW] Fast_RA (( UP )) ((tota_accl<5 skip))  RA_CNT=((%d))\n", content_1));
+				PHYDM_DBG(dm, DBG_FW_TRACE,
+					  "[FW] Fast_RA (( UP )) ((tota_accl<5 skip))  RA_CNT=((%d))\n",
+					  content_1);
 			else if (content_0 == 8)
-				PHYDM_DBG(p_dm, DBG_FW_TRACE, ("[FW] Fast_RA (( Reset Tx Rpt )) RA_CNT=((%d))\n", content_1));
-		}
-
-		else if (dbg_num == 4) {
-			if (content_0 == 3) {
-				PHYDM_DBG(p_dm, DBG_FW_TRACE, ("[FW] RER_CNT   PCR_ori =(( %d )),  ratio_ori =(( %d )), pcr_updown_bitmap =(( 0x%x )), pcr_var_diff =(( %d ))\n", content_1, content_2, content_3, content_4));
-				/**/
-			} else if (content_0 == 4) {
-				PHYDM_DBG(p_dm, DBG_FW_TRACE, ("[FW] pcr_shift_value =(( %s%d )), rate_down_threshold =(( %d )), rate_up_threshold =(( %d ))\n", ((content_1) ? "+" : "-"), content_2, content_3, content_4));
-				/**/
-			} else if (content_0 == 5) {
-				PHYDM_DBG(p_dm, DBG_FW_TRACE, ("[FW] pcr_mean =(( %d )), PCR_VAR =(( %d )), offset =(( %d )), decision_offset_p =(( %d ))\n", content_1, content_2, content_3, content_4));
-				/**/
-			}
-		}
-
-		else if (dbg_num == 5) {
+				PHYDM_DBG(dm, DBG_FW_TRACE,
+					  "[FW] Fast_RA (( Reset Tx Rpt )) RA_CNT=((%d))\n",
+					  content_1);
+		} else if (dbg_num == 4) {
+			if (content_0 == 3)
+				PHYDM_DBG(dm, DBG_FW_TRACE,
+					  "[FW] RER_CNT   PCR_ori =(( %d )),  ratio_ori =(( %d )), pcr_updown_bitmap =(( 0x%x )), pcr_var_diff =(( %d ))\n",
+					  content_1, content_2, content_3,
+					  content_4);
+			else if (content_0 == 4)
+				PHYDM_DBG(dm, DBG_FW_TRACE,
+					  "[FW] pcr_shift_value =(( %s%d )), rate_down_threshold =(( %d )), rate_up_threshold =(( %d ))\n",
+					  ((content_1) ? "+" : "-"), content_2,
+					  content_3, content_4);
+			else if (content_0 == 5)
+				PHYDM_DBG(dm, DBG_FW_TRACE,
+					  "[FW] pcr_mean =(( %d )), PCR_VAR =(( %d )), offset =(( %d )), decision_offset_p =(( %d ))\n",
+					  content_1, content_2, content_3,
+					  content_4);
+		} else if (dbg_num == 5) {
 			if (content_0 == 1)
-				PHYDM_DBG(p_dm, DBG_FW_TRACE, ("[FW] (( UP))  Nsc=(( %d )), N_High=(( %d )), RateUp_Waiting=(( %d )), RateUp_Fail=(( %d ))\n", content_1, content_2, content_3, content_4));
+				PHYDM_DBG(dm, DBG_FW_TRACE,
+					  "[FW] (( UP))  Nsc=(( %d )), N_High=(( %d )), RateUp_Waiting=(( %d )), RateUp_Fail=(( %d ))\n",
+					  content_1, content_2, content_3,
+					  content_4);
 			else if (content_0 == 2)
-				PHYDM_DBG(p_dm, DBG_FW_TRACE, ("[FW] ((DOWN))  Nsc=(( %d )), N_Low=(( %d ))\n", content_1, content_2));
+				PHYDM_DBG(dm, DBG_FW_TRACE,
+					  "[FW] ((DOWN))  Nsc=(( %d )), N_Low=(( %d ))\n",
+					  content_1, content_2);
 			else if (content_0 == 3)
-				PHYDM_DBG(p_dm, DBG_FW_TRACE, ("[FW] ((HOLD))  Nsc=((%d)), N_High=((%d)), N_Low=((%d)), Reset_CNT=((%d))\n", content_1, content_2, content_3, content_4));
+				PHYDM_DBG(dm, DBG_FW_TRACE,
+					  "[FW] ((HOLD))  Nsc=((%d)), N_High=((%d)), N_Low=((%d)), Reset_CNT=((%d))\n",
+					  content_1, content_2, content_3,
+					  content_4);
 		} else if (dbg_num == 0x60) {
 			if (content_0 == 1)
-				PHYDM_DBG(p_dm, DBG_FW_TRACE, ("[FW] ((AP RPT))  macid=((%d)), BUPDATE[macid]=((%d))\n", content_1, content_2));
+				PHYDM_DBG(dm, DBG_FW_TRACE,
+					  "[FW] ((AP RPT))  macid=((%d)), BUPDATE[macid]=((%d))\n",
+					  content_1, content_2);
 			else if (content_0 == 4)
-				PHYDM_DBG(p_dm, DBG_FW_TRACE, ("[FW] ((AP RPT))  pass=((%d)), rty_num=((%d)), drop=((%d)), total=((%d))\n", content_1, content_2, content_3, content_4));
+				PHYDM_DBG(dm, DBG_FW_TRACE,
+					  "[FW] ((AP RPT))  pass=((%d)), rty_num=((%d)), drop=((%d)), total=((%d))\n",
+					  content_1, content_2, content_3,
+					  content_4);
 			else if (content_0 == 5)
-				PHYDM_DBG(p_dm, DBG_FW_TRACE, ("[FW] ((AP RPT))  PASS=((%d)), RTY_NUM=((%d)), DROP=((%d)), TOTAL=((%d))\n", content_1, content_2, content_3, content_4));
+				PHYDM_DBG(dm, DBG_FW_TRACE,
+					  "[FW] ((AP RPT))  PASS=((%d)), RTY_NUM=((%d)), DROP=((%d)), TOTAL=((%d))\n",
+					  content_1, content_2, content_3,
+					  content_4);
 		}
-	}
-	/*--------------------------------------------*/
-	else if (function == INIT_RA_TABLE) {
+	} else if (function == INIT_RA_TABLE) {
 		if (dbg_num == 3)
-			PHYDM_DBG(p_dm, DBG_FW_TRACE, ("[FW][INIT_RA_INFO] Ra_init, RA_SKIP_CNT = (( %d ))\n", content_0));
-
-	}
-	/*--------------------------------------------*/
-	else if (function == RATE_UP) {
+			PHYDM_DBG(dm, DBG_FW_TRACE,
+				  "[FW][INIT_RA_INFO] Ra_init, RA_SKIP_CNT = (( %d ))\n",
+				  content_0);
+	} else if (function == RATE_UP) {
 		if (dbg_num == 2) {
 			if (content_0 == 1)
-				PHYDM_DBG(p_dm, DBG_FW_TRACE, ("[FW][RateUp]  ((Highest rate->return)), macid=((%d))  Nsc=((%d))\n", content_1, content_2));
+				PHYDM_DBG(dm, DBG_FW_TRACE,
+					  "[FW][RateUp]  ((Highest rate->return)), macid=((%d))  Nsc=((%d))\n",
+					  content_1, content_2);
 		} else if (dbg_num == 5) {
 			if (content_0 == 0)
-				PHYDM_DBG(p_dm, DBG_FW_TRACE, ("[FW][RateUp]  ((rate UP)), up_rate_tmp=((0x%x)), rate_idx=((0x%x)), SGI_en=((%d)),  SGI=((%d))\n", content_1, content_2, content_3, content_4));
+				PHYDM_DBG(dm, DBG_FW_TRACE,
+					  "[FW][RateUp]  ((rate UP)), up_rate_tmp=((0x%x)), rate_idx=((0x%x)), SGI_en=((%d)),  SGI=((%d))\n",
+					  content_1, content_2, content_3,
+					  content_4);
 			else if (content_0 == 1)
-				PHYDM_DBG(p_dm, DBG_FW_TRACE, ("[FW][RateUp]  ((rate UP)), rate_1=((0x%x)), rate_2=((0x%x)), BW=((%d)), Try_Bit=((%d))\n", content_1, content_2, content_3, content_4));
+				PHYDM_DBG(dm, DBG_FW_TRACE,
+					  "[FW][RateUp]  ((rate UP)), rate_1=((0x%x)), rate_2=((0x%x)), BW=((%d)), Try_Bit=((%d))\n",
+					  content_1, content_2, content_3,
+					  content_4);
 		}
-
-	}
-	/*--------------------------------------------*/
-	else if (function == RATE_DOWN) {
+	} else if (function == RATE_DOWN) {
 		if (dbg_num == 5) {
 			if (content_0 == 1)
-				PHYDM_DBG(p_dm, DBG_FW_TRACE, ("[FW][RateDownStep]  ((rate Down)), macid=((%d)), rate1=((0x%x)),  rate2=((0x%x)), BW=((%d))\n", content_1, content_2, content_3, content_4));
+				PHYDM_DBG(dm, DBG_FW_TRACE,
+					  "[FW][RateDownStep]  ((rate Down)), macid=((%d)), rate1=((0x%x)),  rate2=((0x%x)), BW=((%d))\n",
+					  content_1, content_2, content_3,
+					  content_4);
 		}
 	} else if (function == TRY_DONE) {
 		if (dbg_num == 1) {
-			if (content_0 == 1) {
-				PHYDM_DBG(p_dm, DBG_FW_TRACE, ("[FW][Try Done]  ((try succsess )) macid=((%d)), Try_Done_cnt=((%d))\n", content_1, content_2));
-				/**/
-			}
+			if (content_0 == 1)
+				PHYDM_DBG(dm, DBG_FW_TRACE,
+					  "[FW][Try Done]  ((try succsess )) macid=((%d)), Try_Done_cnt=((%d))\n",
+					  content_1, content_2);
 		} else if (dbg_num == 2) {
-			if (content_0 == 1) {
-				PHYDM_DBG(p_dm, DBG_FW_TRACE, ("[FW][Try Done]  ((try)) macid=((%d)), Try_Done_cnt=((%d)),  rate_2=((%d)),  try_succes=((%d))\n", content_1, content_2, content_3, content_4));
-				/**/
-			}
+			if (content_0 == 1)
+				PHYDM_DBG(dm, DBG_FW_TRACE,
+					  "[FW][Try Done]  ((try)) macid=((%d)), Try_Done_cnt=((%d)),  rate_2=((%d)),  try_succes=((%d))\n",
+					  content_1, content_2, content_3,
+					  content_4);
 		}
-	}
-	/*--------------------------------------------*/
-	else if (function == RA_H2C) {
+	} else if (function == RA_H2C) {
 		if (dbg_num == 1) {
-			if (content_0 == 0) {
-				PHYDM_DBG(p_dm, DBG_FW_TRACE, ("[FW][H2C=0x49]  fw_trace_en=((%d)), mode =((%d)),  macid=((%d))\n", content_1, content_2, content_3));
-				/**/
-				/*C2H_RA_Dbg_code(F_RA_H2C,1,0, SysMib.ODM.DEBUG.fw_trace_en, mode, macid, 0);    //RA MASK*/
-			}
-#if 0
-			else if (dbg_num == 2) {
-
-				if (content_0 == 1) {
-					PHYDM_DBG(p_dm, DBG_FW_TRACE, ("[FW][H2C=0x40]  MACID=((%d)), rate ID=((%d)),  SGI=((%d)),  BW=((%d))\n", content_1, content_2, content_3, content_4));
-					/**/
-				} else if (content_0 == 2) {
-					PHYDM_DBG(p_dm, DBG_FW_TRACE, ("[FW][H2C=0x40]   VHT_en=((%d)), Disable_PowerTraining=((%d)),  Disable_RA=((%d)),  No_Update=((%d))\n", content_1, content_2, content_3, content_4));
-					/**/
-				} else if (content_0 == 3) {
-					PHYDM_DBG(p_dm, DBG_FW_TRACE, ("[FW][H2C=0x40]   RA_MSK=[%x | %x | %x | %x ]\n", content_1, content_2, content_3, content_4));
-					/**/
-				}
-			}
-#endif
+			if (content_0 == 0)
+				PHYDM_DBG(dm, DBG_FW_TRACE,
+					  "[FW][H2C=0x49]  fw_trace_en=((%d)), mode =((%d)),  macid=((%d))\n",
+					  content_1, content_2, content_3);
 		}
-	}
-	/*--------------------------------------------*/
-	else if (function == F_RATE_AP_RPT) {
+	} else if (function == F_RATE_AP_RPT) {
 		if (dbg_num == 1) {
 			if (content_0 == 1)
-				PHYDM_DBG(p_dm, DBG_FW_TRACE, ("[FW][AP RPT]  ((1)), SPE_STATIS=((0x%x))---------->\n", content_3));
+				PHYDM_DBG(dm, DBG_FW_TRACE,
+					  "[FW][AP RPT]  ((1)), SPE_STATIS=((0x%x))---------->\n",
+					  content_3);
 		} else if (dbg_num == 2) {
 			if (content_0 == 1)
-				PHYDM_DBG(p_dm, DBG_FW_TRACE, ("[FW][AP RPT]  RTY_all=((%d))\n", content_1));
+				PHYDM_DBG(dm, DBG_FW_TRACE,
+					  "[FW][AP RPT]  RTY_all=((%d))\n",
+					  content_1);
 		} else if (dbg_num == 3) {
 			if (content_0 == 1)
-				PHYDM_DBG(p_dm, DBG_FW_TRACE, ("[FW][AP RPT]  MACID1[%d], TOTAL=((%d)),  RTY=((%d))\n", content_3, content_1, content_2));
+				PHYDM_DBG(dm, DBG_FW_TRACE,
+					  "[FW][AP RPT]  MACID1[%d], TOTAL=((%d)),  RTY=((%d))\n",
+					  content_3, content_1, content_2);
 		} else if (dbg_num == 4) {
 			if (content_0 == 1)
-				PHYDM_DBG(p_dm, DBG_FW_TRACE, ("[FW][AP RPT]  MACID2[%d], TOTAL=((%d)),  RTY=((%d))\n", content_3, content_1, content_2));
+				PHYDM_DBG(dm, DBG_FW_TRACE,
+					  "[FW][AP RPT]  MACID2[%d], TOTAL=((%d)),  RTY=((%d))\n",
+					  content_3, content_1, content_2);
 		} else if (dbg_num == 5) {
 			if (content_0 == 1)
-				PHYDM_DBG(p_dm, DBG_FW_TRACE, ("[FW][AP RPT]  MACID1[%d], PASS=((%d)),  DROP=((%d))\n", content_3, content_1, content_2));
+				PHYDM_DBG(dm, DBG_FW_TRACE,
+					  "[FW][AP RPT]  MACID1[%d], PASS=((%d)),  DROP=((%d))\n",
+					  content_3, content_1, content_2);
 		} else if (dbg_num == 6) {
 			if (content_0 == 1)
-				PHYDM_DBG(p_dm, DBG_FW_TRACE, ("[FW][AP RPT]  MACID2[%d],, PASS=((%d)),  DROP=((%d))\n", content_3, content_1, content_2));
+				PHYDM_DBG(dm, DBG_FW_TRACE,
+					  "[FW][AP RPT]  MACID2[%d],, PASS=((%d)),  DROP=((%d))\n",
+					  content_3, content_1, content_2);
 		}
+	} else if (function == DBC_FW_CLM) {
+		PHYDM_DBG(dm, DBG_FW_TRACE,
+			  "[FW][CLM][%d, %d] = {%d, %d, %d, %d}\n", dbg_num,
+			  content_0, content_1, content_2, content_3,
+			  content_4);
 	} else {
-		PHYDM_DBG(p_dm, DBG_FW_TRACE, ("[FW][general][%d, %d, %d] = {%d, %d, %d, %d}\n", function, dbg_num, content_0, content_1, content_2, content_3, content_4));
-		/**/
+		PHYDM_DBG(dm, DBG_FW_TRACE,
+			  "[FW][general][%d, %d, %d] = {%d, %d, %d, %d}\n",
+			  function, dbg_num, content_0, content_1, content_2,
+			  content_3, content_4);
 	}
 #else
-	PHYDM_DBG(p_dm, DBG_FW_TRACE, ("[FW][general][%d, %d, %d] = {%d, %d, %d, %d}\n", function, dbg_num, content_0, content_1, content_2, content_3, content_4));
+	PHYDM_DBG(dm, DBG_FW_TRACE,
+		  "[FW][general][%d, %d, %d] = {%d, %d, %d, %d}\n", function,
+		  dbg_num, content_0, content_1, content_2, content_3,
+		  content_4);
 #endif
-	/*--------------------------------------------*/
+/*@--------------------------------------------*/
 
-#endif /*#ifdef CONFIG_PHYDM_DEBUG_FUNCTION*/
+#endif /*@#ifdef CONFIG_PHYDM_DEBUG_FUNCTION*/
 }
 
-void
-phydm_fw_trace_handler_8051(
-	void	*p_dm_void,
-	u8	*buffer,
-	u8	cmd_len
-)
+void phydm_fw_trace_handler_8051(void *dm_void, u8 *buffer, u8 cmd_len)
 {
 #ifdef CONFIG_PHYDM_DEBUG_FUNCTION
-	struct PHY_DM_STRUCT	*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
 #if 0
 	if (cmd_len >= 3)
 		cmd_buf[cmd_len - 1] = '\0';
-	PHYDM_DBG(p_dm, DBG_FW_TRACE, ("[FW DBG Msg] %s\n", &(cmd_buf[3])));
+	PHYDM_DBG(dm, DBG_FW_TRACE, "[FW DBG Msg] %s\n", &cmd_buf[3]);
 #else
 
 	int i = 0;
-	u8	extend_c2h_sub_id = 0, extend_c2h_dbg_len = 0, extend_c2h_dbg_seq = 0;
-	u8	fw_debug_trace[128];
-	u8	*extend_c2h_dbg_content = 0;
+	u8 extend_c2h_sub_id = 0, extend_c2h_dbg_len = 0;
+	u8 extend_c2h_dbg_seq = 0;
+	u8 fw_debug_trace[128];
+	u8 *extend_c2h_dbg_content = 0;
 
 	if (cmd_len > 127)
 		return;
 
 	extend_c2h_sub_id = buffer[0];
 	extend_c2h_dbg_len = buffer[1];
-	extend_c2h_dbg_content = buffer + 2; /*DbgSeq+DbgContent  for show HEX*/
+	extend_c2h_dbg_content = buffer + 2; /*@DbgSeq+DbgContent for show HEX*/
 
 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
 	RT_DISP(FC2H, C2H_Summary, ("[Extend C2H packet], Extend_c2hSubId=0x%x, extend_c2h_dbg_len=%d\n",
@@ -3245,21 +4710,22 @@ go_backfor_aggre_dbg_pkt:
 	RT_DISP(FC2H, C2H_Summary, ("[RTKFW, SEQ= %d] :", extend_c2h_dbg_seq));
 #endif
 
-	for (; ; i++) {
+	for (;; i++) {
 		fw_debug_trace[i] = extend_c2h_dbg_content[i];
 		if (extend_c2h_dbg_content[i + 1] == '\0') {
 			fw_debug_trace[i + 1] = '\0';
-			PHYDM_DBG(p_dm, DBG_FW_TRACE, ("[FW DBG Msg] %s", &(fw_debug_trace[0])));
+			PHYDM_DBG(dm, DBG_FW_TRACE, "[FW DBG Msg] %s",
+				  &fw_debug_trace[0]);
 			break;
 		} else if (extend_c2h_dbg_content[i] == '\n') {
 			fw_debug_trace[i + 1] = '\0';
-			PHYDM_DBG(p_dm, DBG_FW_TRACE, ("[FW DBG Msg] %s", &(fw_debug_trace[0])));
+			PHYDM_DBG(dm, DBG_FW_TRACE, "[FW DBG Msg] %s",
+				  &fw_debug_trace[0]);
 			buffer = extend_c2h_dbg_content + i + 3;
 			goto go_backfor_aggre_dbg_pkt;
 		}
 	}
 
-
 #endif
-#endif /*#ifdef CONFIG_PHYDM_DEBUG_FUNCTION*/
+#endif /*@#ifdef CONFIG_PHYDM_DEBUG_FUNCTION*/
 }
diff --git a/rtl8723DS/hal/phydm/phydm_debug.h b/rtl8723DS/hal/phydm/phydm_debug.h
index dbe86a2..660f48f 100755..100644
--- a/rtl8723DS/hal/phydm/phydm_debug.h
+++ b/rtl8723DS/hal/phydm/phydm_debug.h
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2007 - 2017 Realtek Corporation.
+ * Copyright(c) 2007 - 2017  Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -8,107 +8,101 @@
  *
  * This program is distributed in the hope that it will be useful, but WITHOUT
  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  * more details.
  *
+ * The full GNU General Public License is included in this distribution in the
+ * file called LICENSE.
+ *
+ * Contact Information:
+ * wlanfae <wlanfae@realtek.com>
+ * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
+ * Hsinchu 300, Taiwan.
+ *
+ * Larry Finger <Larry.Finger@lwfinger.net>
+ *
  *****************************************************************************/
 
-
-#ifndef	__ODM_DBG_H__
+#ifndef __ODM_DBG_H__
 #define __ODM_DBG_H__
 
-/*#define DEBUG_VERSION	"1.1"*/  /*2015.07.29 YuChen*/
-/*#define DEBUG_VERSION	"1.2"*/  /*2015.08.28 Dino*/
-/*#define DEBUG_VERSION	"1.3"*/  /*2016.04.28 YuChen*/
-#define DEBUG_VERSION	"1.4"  /*2017.03.13 Dino*/
-
-/* -----------------------------------------------------------------------------
- *	Define the debug levels
- *
- *	1.	DBG_TRACE and DBG_LOUD are used for normal cases.
- *	So that, they can help SW engineer to develope or trace states changed
- *	and also help HW enginner to trace every operation to and from HW,
- *	e.g IO, Tx, Rx.
- *
- *	2.	DBG_WARNNING and DBG_SERIOUS are used for unusual or error cases,
- *	which help us to debug SW or HW.
- *
- * -----------------------------------------------------------------------------
- *
- *	Never used in a call to ODM_RT_TRACE()!
- *   */
-#define ODM_DBG_OFF					1
-
-/*
- *	Fatal bug.
- *	For example, Tx/Rx/IO locked up, OS hangs, memory access violation,
- *	resource allocation failed, unexpected HW behavior, HW BUG and so on.
- *   */
-#define ODM_DBG_SERIOUS				2
-
-/*
- *	Abnormal, rare, or unexpeted cases.
- *	For example, IRP/Packet/OID canceled, device suprisely unremoved and so on.
- *   */
-#define ODM_DBG_WARNING				3
-
-/*
- *	Normal case with useful information about current SW or HW state.
- *	For example, Tx/Rx descriptor to fill, Tx/Rx descriptor completed status,
- *	SW protocol state change, dynamic mechanism state change and so on.
- *   */
-#define ODM_DBG_LOUD					4
-
-/*
- *	Normal case with detail execution flow or information.
- *   */
-#define ODM_DBG_TRACE					5
-
-/*FW DBG MSG*/
-#define	RATE_DECISION	BIT(0)
-#define	INIT_RA_TABLE	BIT(1)
-#define	RATE_UP		BIT(2)
-#define	RATE_DOWN		BIT(3)
-#define	TRY_DONE		BIT(4)
-#define	RA_H2C			BIT(5)
-#define	F_RATE_AP_RPT	BIT(7)
-
-/* -----------------------------------------------------------------------------
+/*@#define DEBUG_VERSION	"1.1"*/ /*@2015.07.29 YuChen*/
+/*@#define DEBUG_VERSION	"1.2"*/ /*@2015.08.28 Dino*/
+/*@#define DEBUG_VERSION	"1.3"*/ /*@2016.04.28 YuChen*/
+/*@#define DEBUG_VERSION	"1.4"*/ /*@2017.03.13 Dino*/
+#define DEBUG_VERSION "2.0" /*@2018.01.10 Dino*/
+
+/*@
+ * ============================================================
+ *  Definition
+ * ============================================================
+ */
+
+/*@FW DBG MSG*/
+#define	RATE_DECISION		1
+#define	INIT_RA_TABLE		2
+#define	RATE_UP			4
+#define	RATE_DOWN		8
+#define	TRY_DONE		16
+#define	RA_H2C			32
+#define	F_RATE_AP_RPT		64
+#define	DBC_FW_CLM		9
+
+#define PHYDM_SNPRINT_SIZE	64
+/* @----------------------------------------------------------------------------
  * Define the tracing components
  *
  * -----------------------------------------------------------------------------
- *BB FW Functions*/
-#define	PHYDM_FW_COMP_RA			BIT(0)
-#define	PHYDM_FW_COMP_MU			BIT(1)
-#define	PHYDM_FW_COMP_PATH_DIV		BIT(2)
-#define	PHYDM_FW_COMP_PT			BIT(3)
-
-
+ * BB FW Functions
+ */
+#define	PHYDM_FW_COMP_RA	BIT(0)
+#define	PHYDM_FW_COMP_MU	BIT(1)
+#define	PHYDM_FW_COMP_PATH_DIV	BIT(2)
+#define	PHYDM_FW_COMP_PT	BIT(3)
 
+/*@------------------------Export Marco Definition---------------------------*/
 
-/*------------------------Export Marco Definition---------------------------*/
-
-#define	config_phydm_read_txagc_check(data)		(data != INVALID_TXAGC_DATA)
+#define config_phydm_read_txagc_check(data) (data != INVALID_TXAGC_DATA)
 
 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
-	#define	dbg_print				DbgPrint
-	#define	dcmd_printf				DCMD_Printf
-	#define	dcmd_scanf				DCMD_Scanf
-	#define RT_PRINTK				dbg_print
+	#if (DBG_CMD_SUPPORT == 1)
+		extern	VOID DCMD_Printf(const char *pMsg);
+	#else
+		#define DCMD_Printf(_pMsg)
+	#endif
+
+	#if OS_WIN_FROM_WIN10(OS_VERSION)
+	#define	pr_debug(fmt, ...) DbgPrintEx(DPFLTR_IHVNETWORK_ID, DPFLTR_ERROR_LEVEL, fmt, ##__VA_ARGS__)
+	#else
+	#define	pr_debug		DbgPrint
+	#endif
+
+	#define	dcmd_printf		DCMD_Printf
+	#define	dcmd_scanf		DCMD_Scanf
+	#define	RT_PRINTK		pr_debug
+	#define	PRINT_MAX_SIZE		512
+	#define PHYDM_SNPRINTF		RT_SPRINTF
+	#define	PHYDM_TRACE(_MSG_) 	EXhalPHYDMoutsrc_Print(_MSG_)
 #elif (DM_ODM_SUPPORT_TYPE == ODM_CE) && defined(DM_ODM_CE_MAC80211)
-	#define dbg_print(args...)
-	#define RT_PRINTK(fmt, args...)	\
-			RT_TRACE(((struct rtl_priv *)p_dm->adapter),	\
-				 COMP_PHYDM, DBG_DMESG, fmt, ## args)
-	#define	RT_DISP(dbgtype, dbgflag, printstr)
+	#define PHYDM_SNPRINTF		snprintf
 #elif (DM_ODM_SUPPORT_TYPE == ODM_CE)
-	#define dbg_print	printk
-	#define RT_PRINTK(fmt, args...)	dbg_print(fmt, ## args)
+	#undef	pr_debug
+	#define pr_debug		printk
+	#define RT_PRINTK(fmt, args...)	pr_debug(fmt, ## args)
 	#define	RT_DISP(dbgtype, dbgflag, printstr)
+	#define RT_TRACE(adapter, comp, drv_level, fmt, args...)	\
+		RTW_INFO(fmt, ## args)
+	#define PHYDM_SNPRINTF		snprintf
+#elif (DM_ODM_SUPPORT_TYPE == ODM_IOT)
+	#define pr_debug(fmt, args...)		RTW_PRINT_MSG(fmt, ## args)
+	#define RT_DEBUG(comp, drv_level, fmt, args...)	\
+		RTW_PRINT_MSG(fmt, ## args)
+	#define PHYDM_SNPRINTF		snprintf
 #else
-	#define dbg_print	panic_printk
-	/*#define RT_PRINTK(fmt, args...)	dbg_print("%s(): " fmt, __FUNCTION__, ## args);*/
-	#define RT_PRINTK(args...)	dbg_print(args)
+	#define pr_debug	panic_printk
+	/*@#define RT_PRINTK(fmt, args...)	pr_debug("%s(): " fmt, __FUNCTION__, ## args);*/
+	#define RT_PRINTK(fmt, args...)	pr_debug(fmt, ## args)
+	#define PHYDM_SNPRINTF		snprintf
 #endif
 
 #ifndef ASSERT
@@ -116,250 +110,369 @@
 #endif
 
 #if DBG
-#define PHYDM_DBG(p_dm, comp, fmt)				\
-	do {													\
-		if ((comp) & (p_dm->debug_components)) {	\
-														\
-			dbg_print("[PHYDM] ");						\
-			RT_PRINTK fmt;								\
-		}												\
+#if (DM_ODM_SUPPORT_TYPE == ODM_AP)
+#define PHYDM_DBG(dm, comp, fmt, args...)			\
+	do {							\
+		if ((comp) & dm->debug_components) {          \
+			pr_debug("[PHYDM] ");			\
+			RT_PRINTK(fmt, ## args);		\
+		}						\
 	} while (0)
 
-#define PHYDM_DBG_F(p_dm, comp, fmt)									 do {\
-		if ((comp) & p_dm->debug_components) { \
-			\
-			RT_PRINTK fmt;															\
+#define PHYDM_DBG_F(dm, comp, fmt, args...)			\
+	do {							\
+		if ((comp) & dm->debug_components) {		\
+			RT_PRINTK(fmt, ## args);		\
+		}						\
+	} while (0)
+
+#define PHYDM_PRINT_ADDR(dm, comp, title_str, addr)		\
+	do {							\
+		if ((comp) & dm->debug_components) {		\
+			int __i;				\
+			u8 *__ptr = (u8 *)addr;			\
+			pr_debug("[PHYDM] ");			\
+			pr_debug(title_str);			\
+			pr_debug(" ");				\
+			for (__i = 0; __i < 6; __i++)		\
+				pr_debug("%02X%s", __ptr[__i], (__i == 5) ? "" : "-");\
+			pr_debug("\n");				\
+		}						\
+	} while (0)
+#elif (DM_ODM_SUPPORT_TYPE == ODM_WIN)
+
+static __inline void PHYDM_DBG(PDM_ODM_T dm, int comp, char *fmt, ...)
+{
+	RT_STATUS rt_status;
+	va_list args;
+	char buf[PRINT_MAX_SIZE] = {0};
+
+	if ((comp & dm->debug_components) == 0)
+		return;
+
+	if (fmt == NULL)
+		return;
+
+	va_start(args, fmt);
+	rt_status = (RT_STATUS)RtlStringCbVPrintfA(buf, PRINT_MAX_SIZE, fmt, args);
+	va_end(args);
+
+	if (rt_status != RT_STATUS_SUCCESS) {
+		DbgPrint("Failed (%d) to print message to buffer\n", rt_status);
+		return;
+	}
+
+	#if OS_WIN_FROM_WIN10(OS_VERSION)
+	DbgPrintEx(DPFLTR_IHVNETWORK_ID, DPFLTR_ERROR_LEVEL, "%s", buf);
+	#else
+	DbgPrint("%s", buf);
+	#endif
+}
+
+static __inline void PHYDM_DBG_F(PDM_ODM_T dm, int comp, char *fmt, ...)
+{
+	RT_STATUS rt_status;
+	va_list args;
+	char buf[PRINT_MAX_SIZE] = {0};
+
+	if ((comp & dm->debug_components) == 0)
+		return;
+
+	if (fmt == NULL)
+		return;
+
+	va_start(args, fmt);
+	rt_status = (RT_STATUS)RtlStringCbVPrintfA(buf, PRINT_MAX_SIZE, fmt, args);
+	va_end(args);
+
+	if (rt_status != RT_STATUS_SUCCESS) {
+		/*@DbgPrint("DM Print Fail\n");*/
+		return;
+	}
+
+	#if OS_WIN_FROM_WIN10(OS_VERSION)
+	DbgPrintEx(DPFLTR_IHVNETWORK_ID, DPFLTR_ERROR_LEVEL, "%s", buf);
+	#else
+	DbgPrint("%s", buf);
+	#endif
+}
+
+#define PHYDM_PRINT_ADDR(p_dm, comp, title_str, ptr)		\
+	do {							\
+		if ((comp) & p_dm->debug_components) {		\
+								\
+			int __i;				\
+			u8 *__ptr = (u8 *)ptr;			\
+			pr_debug("[PHYDM] ");			\
+			pr_debug(title_str);			\
+			pr_debug(" ");				\
+			for (__i = 0; __i < 6; __i++)		\
+				pr_debug("%02X%s", __ptr[__i], (__i == 5) ? "" : "-");	\
+			pr_debug("\n");				\
 		}	\
 	} while (0)
+#elif (DM_ODM_SUPPORT_TYPE == ODM_IOT)
+
+#define PHYDM_DBG(dm, comp, fmt, args...)			\
+	do {							\
+		if ((comp) & dm->debug_components) {		\
+			RT_DEBUG(COMP_PHYDM, \
+				 DBG_DMESG, "[PHYDM] " fmt, ##args);	\
+		}						\
+	} while (0)
 
-#define PHYDM_PRINT_ADDR(p_dm, comp, title_str, ptr)							 do {\
-		if ((comp) & p_dm->debug_components) { \
-			\
-			int __i;																\
-			u8 *__ptr = (u8 *)ptr;											\
-			dbg_print("[PHYDM] ");													\
-			dbg_print(title_str);													\
-			dbg_print(" ");														\
-			for (__i = 0; __i < 6; __i++)												\
-				dbg_print("%02X%s", __ptr[__i], (__i == 5) ? "" : "-");						\
-			dbg_print("\n");														\
+#define PHYDM_DBG_F(dm, comp, fmt, args...)			\
+	do {							\
+		if ((comp) & dm->debug_components) {		\
+			RT_DEBUG(COMP_PHYDM, \
+				 DBG_DMESG, fmt, ##args);	\
 		}	\
 	} while (0)
 
-#define ODM_RT_TRACE(p_dm, comp, level, fmt)									\
-	do {	\
-		if (((comp) & p_dm->debug_components) && (level <= p_dm->debug_level || level == ODM_DBG_SERIOUS)) { \
-			\
-			if (p_dm->support_ic_type == ODM_RTL8188E)							\
-				dbg_print("[PhyDM-8188E] ");											\
-			else if (p_dm->support_ic_type == ODM_RTL8192E)						\
-				dbg_print("[PhyDM-8192E] ");											\
-			else if (p_dm->support_ic_type == ODM_RTL8812)							\
-				dbg_print("[PhyDM-8812A] ");											\
-			else if (p_dm->support_ic_type == ODM_RTL8821)							\
-				dbg_print("[PhyDM-8821A] ");											\
-			else if (p_dm->support_ic_type == ODM_RTL8814A)							\
-				dbg_print("[PhyDM-8814A] ");											\
-			else if (p_dm->support_ic_type == ODM_RTL8703B)							\
-				dbg_print("[PhyDM-8703B] ");											\
-			else if (p_dm->support_ic_type == ODM_RTL8822B)							\
-				dbg_print("[PhyDM-8822B] ");											\
-			else if (p_dm->support_ic_type == ODM_RTL8188F)							\
-				dbg_print("[PhyDM-8188F] ");											\
-			RT_PRINTK fmt;															\
+#define PHYDM_PRINT_ADDR(dm, comp, title_str, addr)		\
+	do {							\
+		if ((comp) & dm->debug_components) {		\
+			RT_DEBUG(COMP_PHYDM, \
+				 DBG_DMESG, "[PHYDM] " title_str "%pM\n",	\
+				 addr);				\
+		}						\
+	} while (0)
+
+#elif defined(DM_ODM_CE_MAC80211_V2)
+
+#define PHYDM_DBG(dm, comp, fmt, args...)
+#define PHYDM_DBG_F(dm, comp, fmt, args...)
+#define PHYDM_PRINT_ADDR(dm, comp, title_str, addr)
+
+#else
+
+#define PHYDM_DBG(dm, comp, fmt, args...)			\
+	do {							\
+		struct dm_struct *__dm = (dm);			\
+		if ((comp) & __dm->debug_components) {		\
+			RT_TRACE(((struct rtl_priv *)__dm->adapter),\
+				 COMP_PHYDM, DBG_DMESG,		\
+				 "[PHYDM] " fmt, ##args);	\
+		}						\
+	} while (0)
+
+#define PHYDM_DBG_F(dm, comp, fmt, args...)			\
+	do {							\
+		struct dm_struct *__dm = (dm);			\
+		if ((comp) & __dm->debug_components) {		\
+			RT_TRACE(((struct rtl_priv *)__dm->adapter),\
+				 COMP_PHYDM, DBG_DMESG, fmt, ##args);	\
 		}	\
 	} while (0)
 
+#define PHYDM_PRINT_ADDR(dm, comp, title_str, addr)		\
+	do {							\
+		struct dm_struct *__dm = (dm);			\
+		if ((comp) & __dm->debug_components) {		\
+			RT_TRACE(((struct rtl_priv *)__dm->adapter),\
+				 COMP_PHYDM, DBG_DMESG,		\
+				 "[PHYDM] " title_str "%pM\n", addr);\
+		}						\
+	} while (0)
+#endif
+
+#else /*@#if DBG*/
+#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
+static __inline void PHYDM_DBG(struct dm_struct *dm, int comp, char *fmt, ...)
+{
+	RT_STATUS rt_status;
+	va_list args;
+	char buf[PRINT_MAX_SIZE] = {0};
+
+	if ((comp & dm->debug_components) == 0)
+		return;
+
+	if (fmt == NULL)
+		return;
+
+	va_start(args, fmt);
+	rt_status = (RT_STATUS)RtlStringCbVPrintfA(buf, PRINT_MAX_SIZE, fmt, args);
+	va_end(args);
+
+	if (rt_status != RT_STATUS_SUCCESS) {
+		DbgPrint("Failed (%d) to print message to buffer\n", rt_status);
+		return;
+	}
+
+	PHYDM_TRACE(buf);
+}
+static __inline void PHYDM_DBG_F(struct dm_struct *dm, int comp, char *fmt, ...)
+{
+}
 #else
-#define PHYDM_DBG(p_dm, comp, fmt)
-#define PHYDM_DBG_F(p_dm, comp, fmt)
-#define PHYDM_PRINT_ADDR(p_dm, comp, title_str, ptr)
+#define PHYDM_DBG(dm, comp, fmt, args...)
+#define PHYDM_DBG_F(dm, comp, fmt, args...)
+#endif
+#define PHYDM_PRINT_ADDR(dm, comp, title_str, ptr)
 
-#define ODM_RT_TRACE(p_dm, comp, level, fmt)
 #endif
 
-#define	BB_DBGPORT_PRIORITY_3	3	/*Debug function (the highest priority)*/
-#define	BB_DBGPORT_PRIORITY_2	2	/*Check hang function & Strong function*/
-#define	BB_DBGPORT_PRIORITY_1	1	/*Watch dog function*/
-#define	BB_DBGPORT_RELEASE		0	/*Init value (the lowest priority)*/
+#define	DBGPORT_PRI_3	3	/*@Debug function (the highest priority)*/
+#define	DBGPORT_PRI_2	2	/*@Check hang function & Strong function*/
+#define	DBGPORT_PRI_1	1	/*Watch dog function*/
+#define	DBGPORT_RELEASE	0	/*@Init value (the lowest priority)*/
 
 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
 #define	PHYDM_DBGPRINT		0
 #define	PHYDM_SSCANF(x, y, z)	dcmd_scanf(x, y, z)
-#define	PHYDM_VAST_INFO_SNPRINTF	PHYDM_SNPRINTF
+#define	PDM_VAST_SNPF		PDM_SNPF
 #if (PHYDM_DBGPRINT == 1)
-#define	PHYDM_SNPRINTF(msg)	\
-	do {\
-		rsprintf msg;\
-		dbg_print(output);\
-	} while (0)
-#else
-#define	PHYDM_SNPRINTF(msg)	\
+#define	PDM_SNPF(msg)	\
 	do {\
 		rsprintf msg;\
-		dcmd_printf(output);\
+		pr_debug("%s", output);\
 	} while (0)
-#endif
-#else
-#if (DM_ODM_SUPPORT_TYPE == ODM_CE) || defined(__OSK__)
-	#define	PHYDM_DBGPRINT		0
 #else
-	#define	PHYDM_DBGPRINT		1
-#endif
-#define	MAX_ARGC				20
-#define	MAX_ARGV				16
-#define	DCMD_DECIMAL			"%d"
-#define	DCMD_CHAR				"%c"
-#define	DCMD_HEX				"%x"
+
+static __inline void PDM_SNPF(u32 out_len, u32 used, char *buff, int len,
+			      char *fmt, ...)
+{
+	RT_STATUS rt_status;
+	va_list args;
+	char buf[PRINT_MAX_SIZE] = {0};
+
+	if (fmt == NULL)
+		return;
+
+	va_start(args, fmt);
+	rt_status = (RT_STATUS)RtlStringCbVPrintfA(buf, PRINT_MAX_SIZE, fmt, args);
+	va_end(args);
+
+	if (rt_status != RT_STATUS_SUCCESS) {
+		/*@DbgPrint("DM Print Fail\n");*/
+		return;
+	}
+
+	DCMD_Printf(buf);
+}
+
+
+
+#endif	/*@#if (PHYDM_DBGPRINT == 1)*/
+#else	/*@(DM_ODM_SUPPORT_TYPE & (ODM_CE | ODM_AP))*/
+	#if (DM_ODM_SUPPORT_TYPE == ODM_CE) || defined(__OSK__)
+	#define	PHYDM_DBGPRINT	0
+	#else
+	#define	PHYDM_DBGPRINT	1
+	#endif
+#define	MAX_ARGC		20
+#define	MAX_ARGV		16
+#define	DCMD_DECIMAL		"%d"
+#define	DCMD_CHAR		"%c"
+#define	DCMD_HEX		"%x"
 
 #define	PHYDM_SSCANF(x, y, z)	sscanf(x, y, z)
 
-#define	PHYDM_VAST_INFO_SNPRINTF(msg)\
-	do {\
-		snprintf msg;\
-		dbg_print(output);\
+#if (DM_ODM_SUPPORT_TYPE & ODM_AP)
+#define PDM_VAST_SNPF(out_len, used, buff, len, fmt, args...) RT_PRINTK(fmt, ## args)
+
+#elif (DM_ODM_SUPPORT_TYPE & ODM_IOT)
+#define	PDM_VAST_SNPF(out_len, used, buff, len, fmt, args...)	\
+	do {								\
+		RT_DEBUG(COMP_PHYDM, DBG_DMESG, fmt, ##args);		\
 	} while (0)
+#elif (DM_ODM_SUPPORT_TYPE == ODM_CE) && defined(DM_ODM_CE_MAC80211_V2)
+#define	PDM_VAST_SNPF(out_len, used, buff, len, fmt, args...)
+#else
+#define	PDM_VAST_SNPF(out_len, used, buff, len, fmt, args...)	\
+		RT_TRACE(((struct rtl_priv *)dm->adapter), COMP_PHYDM, \
+			DBG_DMESG, fmt, ##args)
+#endif
 
 #if (PHYDM_DBGPRINT == 1)
-#define	PHYDM_SNPRINTF(msg)\
-	do {\
-		snprintf msg;\
-		dbg_print(output);\
+#define	PDM_SNPF(out_len, used, buff, len, fmt, args...)		\
+	do {								\
+		snprintf(buff, len, fmt, ##args);			\
+		pr_debug("%s", output);					\
 	} while (0)
 #else
-#define	PHYDM_SNPRINTF(msg)\
-	do {\
-		if (out_len > used)\
-			used += snprintf msg;\
+#define	PDM_SNPF(out_len, used, buff, len, fmt, args...)		\
+	do {								\
+		u32 *__pdm_snpf_u = &(used);				\
+		if (out_len > *__pdm_snpf_u)				\
+			*__pdm_snpf_u += snprintf(buff, len, fmt, ##args);\
 	} while (0)
 #endif
 #endif
+/* @1 ============================================================
+ * 1  enumeration
+ * 1 ============================================================
+ */
+
+enum auto_detection_state { /*@Fast antenna training*/
+	AD_LEGACY_MODE	= 0,
+	AD_HT_MODE	= 1,
+	AD_VHT_MODE	= 2
+};
+
+/*@
+ * ============================================================
+ * 1  structure
+ * ============================================================
+ */
+
+#ifdef CONFIG_PHYDM_DEBUG_FUNCTION
+u8 phydm_get_l_sig_rate(void *dm_void, u8 rate_idx_l_sig);
+#endif
 
-void
-phydm_init_debug_setting(
-	struct	PHY_DM_STRUCT	*p_dm
-);
-
-void
-phydm_bb_dbg_port_header_sel(
-	void		*p_dm_void,
-	u32		header_idx
-);
-
-u8
-phydm_set_bb_dbg_port(
-	void		*p_dm_void,
-	u8		curr_dbg_priority,
-	u32		debug_port
-);
-
-void
-phydm_release_bb_dbg_port(
-	void		*p_dm_void
-);
-
-u32
-phydm_get_bb_dbg_port_value(
-	void		*p_dm_void
-);
-
-void
-phydm_reset_rx_rate_distribution(
-	struct PHY_DM_STRUCT	*p_dm_odm
-);
-
-void
-phydm_rx_rate_distribution
-(
-	void			*p_dm_void
-);
-
-void
-phydm_get_avg_phystatus_val
-(
-	void		*p_dm_void
-);
-
-void
-phydm_get_phy_statistic(
-	void		*p_dm_void
-);
-
-void 
-phydm_basic_dbg_message(
-	void		*p_dm_void
-);
-
-void 
-phydm_basic_profile(
-	void		*p_dm_void,
-	u32		*_used,
-	char		*output,
-	u32		*_out_len
-);
+void phydm_init_debug_setting(struct dm_struct *dm);
+
+void phydm_bb_dbg_port_header_sel(void *dm_void, u32 header_idx);
+
+u8 phydm_set_bb_dbg_port(void *dm_void, u8 curr_dbg_priority, u32 debug_port);
+
+void phydm_release_bb_dbg_port(void *dm_void);
+
+u32 phydm_get_bb_dbg_port_val(void *dm_void);
+
+void phydm_reset_rx_rate_distribution(struct dm_struct *dm);
+
+void phydm_rx_rate_distribution(void *dm_void);
+
+void phydm_show_phy_hitogram(void *dm_void);
+
+void phydm_get_avg_phystatus_val(void *dm_void);
+
+void phydm_get_phy_statistic(void *dm_void);
+
+void phydm_dm_summary(void *dm_void, u8 macid);
+
+void phydm_basic_dbg_message(void *dm_void);
+
+void phydm_basic_profile(void *dm_void, u32 *_used, char *output,
+			 u32 *_out_len);
 #if (DM_ODM_SUPPORT_TYPE & (ODM_CE | ODM_AP))
-s32
-phydm_cmd(
-	struct PHY_DM_STRUCT	*p_dm,
-	char		*input,
-	u32		in_len,
-	u8		flag,
-	char		*output,
-	u32		out_len
-);
+s32 phydm_cmd(struct dm_struct *dm, char *input, u32 in_len, u8 flag,
+	      char *output, u32 out_len);
 #endif
-void
-phydm_cmd_parser(
-	struct PHY_DM_STRUCT	*p_dm,
-	char		input[][16],
-	u32		input_num,
-	u8		flag,
-	char		*output,
-	u32		out_len
-);
+void phydm_cmd_parser(struct dm_struct *dm, char input[][16], u32 input_num,
+		      u8 flag, char *output, u32 out_len);
 
 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
+void phydm_basic_dbg_msg_cli_win(void *dm_void, char *buf);
+
 void phydm_sbd_check(
-	struct	PHY_DM_STRUCT	*p_dm
-);
+	struct dm_struct *dm);
 
 void phydm_sbd_callback(
-	struct timer_list		*p_timer
-);
+	struct phydm_timer_list *timer);
 
 void phydm_sbd_workitem_callback(
-	void	*p_context
-);
+	void *context);
 #endif
 
-void
-phydm_fw_trace_en_h2c(
-	void		*p_dm_void,
-	boolean	enable,
-	u32		fw_debug_component,
-	u32		monitor_mode,
-	u32		macid
-);
-
-void
-phydm_fw_trace_handler(
-	void	*p_dm_void,
-	u8	*cmd_buf,
-	u8	cmd_len
-);
-
-void
-phydm_fw_trace_handler_code(
-	void	*p_dm_void,
-	u8	*buffer,
-	u8	cmd_len
-);
-
-void
-phydm_fw_trace_handler_8051(
-	void	*p_dm_void,
-	u8	*cmd_buf,
-	u8	cmd_len
-);
-
-#endif /* __ODM_DBG_H__ */
+void phydm_fw_trace_en_h2c(void *dm_void, boolean enable,
+			   u32 fw_debug_component, u32 monitor_mode, u32 macid);
+
+void phydm_fw_trace_handler(void *dm_void, u8 *cmd_buf, u8 cmd_len);
+
+void phydm_fw_trace_handler_code(void *dm_void, u8 *buffer, u8 cmd_len);
+
+void phydm_fw_trace_handler_8051(void *dm_void, u8 *cmd_buf, u8 cmd_len);
+
+#endif /* @__ODM_DBG_H__ */
diff --git a/rtl8723DS/hal/phydm/phydm_dfs.c b/rtl8723DS/hal/phydm/phydm_dfs.c
index 53f0080..39c3879 100755..100644
--- a/rtl8723DS/hal/phydm/phydm_dfs.c
+++ b/rtl8723DS/hal/phydm/phydm_dfs.c
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2007 - 2017 Realtek Corporation.
+ * Copyright(c) 2007 - 2017  Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -8,262 +8,603 @@
  *
  * This program is distributed in the hope that it will be useful, but WITHOUT
  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  * more details.
  *
+ * The full GNU General Public License is included in this distribution in the
+ * file called LICENSE.
+ *
+ * Contact Information:
+ * wlanfae <wlanfae@realtek.com>
+ * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
+ * Hsinchu 300, Taiwan.
+ *
+ * Larry Finger <Larry.Finger@lwfinger.net>
+ *
  *****************************************************************************/
 
-/*
-============================================================
- include files
-============================================================
-*/
+/*@
+ * ============================================================
+ * include files
+ * ============================================================
+ */
 
 #include "mp_precomp.h"
 #include "phydm_precomp.h"
 
 #if defined(CONFIG_PHYDM_DFS_MASTER)
 
-boolean phydm_dfs_is_meteorology_channel(void *p_dm_void){
+boolean phydm_dfs_is_meteorology_channel(void *dm_void)
+{
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
 
-	struct PHY_DM_STRUCT *p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	
-	u8 c_channel = *(p_dm->p_channel);
-	u8 band_width = *(p_dm->p_band_width);
-	
-	return ( (band_width == CHANNEL_WIDTH_80 && (c_channel) >= 116 && (c_channel) <= 128) || 
-	  (band_width == CHANNEL_WIDTH_40 && (c_channel) >= 116 && (c_channel) <= 128) ||
-	  (band_width == CHANNEL_WIDTH_20 && (c_channel) >= 120 && (c_channel) <= 128) );
+	u8 ch = *dm->channel;
+	u8 bw = *dm->band_width;
+
+	return ((bw  == CHANNEL_WIDTH_80 && (ch) >= 116 && (ch) <= 128) ||
+		(bw  == CHANNEL_WIDTH_40 && (ch) >= 116 && (ch) <= 128) ||
+		(bw  == CHANNEL_WIDTH_20 && (ch) >= 120 && (ch) <= 128));
 }
 
-void phydm_radar_detect_reset(void *p_dm_void)
+void phydm_radar_detect_reset(void *dm_void)
 {
-	struct PHY_DM_STRUCT *p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-
-	odm_set_bb_reg(p_dm, 0x924, BIT(15), 0);
-	odm_set_bb_reg(p_dm, 0x924, BIT(15), 1);
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+
+	if (dm->support_ic_type & ODM_IC_JGR3_SERIES) {
+		odm_set_bb_reg(dm, R_0xa40, BIT(15), 0);
+		odm_set_bb_reg(dm, R_0xa40, BIT(15), 1);
+	#if (RTL8721D_SUPPORT)
+	} else if (dm->support_ic_type & (ODM_RTL8721D)) {
+		odm_set_bb_reg(dm, R_0xf58, BIT(29), 0);
+		odm_set_bb_reg(dm, R_0xf58, BIT(29), 1);
+	#endif
+	} else {
+		odm_set_bb_reg(dm, R_0x924, BIT(15), 0);
+		odm_set_bb_reg(dm, R_0x924, BIT(15), 1);
+	}
 }
 
-void phydm_radar_detect_disable(void *p_dm_void)
+void phydm_radar_detect_disable(void *dm_void)
 {
-	struct PHY_DM_STRUCT *p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+
+	if (dm->support_ic_type & ODM_IC_JGR3_SERIES)
+		odm_set_bb_reg(dm, R_0xa40, BIT(15), 0);
+	#if (RTL8721D_SUPPORT)
+	else if (dm->support_ic_type & (ODM_RTL8721D))
+		odm_set_bb_reg(dm, R_0xf58, BIT(29), 0);
+	#endif
+	else
+		odm_set_bb_reg(dm, R_0x924, BIT(15), 0);
 
-	odm_set_bb_reg(p_dm, 0x924, BIT(15), 0);
-	PHYDM_DBG(p_dm, DBG_DFS, ("\n"));
+	PHYDM_DBG(dm, DBG_DFS, "\n");
 }
 
-static void phydm_radar_detect_with_dbg_parm(void *p_dm_void)
+static void phydm_radar_detect_with_dbg_parm(void *dm_void)
 {
-	struct PHY_DM_STRUCT *p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-
-	odm_set_bb_reg(p_dm, 0x918, MASKDWORD, p_dm->radar_detect_reg_918);
-	odm_set_bb_reg(p_dm, 0x91c, MASKDWORD, p_dm->radar_detect_reg_91c);
-	odm_set_bb_reg(p_dm, 0x920, MASKDWORD, p_dm->radar_detect_reg_920);
-	odm_set_bb_reg(p_dm, 0x924, MASKDWORD, p_dm->radar_detect_reg_924);
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+
+	if (dm->support_ic_type & ODM_RTL8721D) {
+		odm_set_bb_reg(dm, R_0xf54, MASKDWORD,
+			       dm->radar_detect_reg_f54);
+		odm_set_bb_reg(dm, R_0xf58, MASKDWORD,
+			       dm->radar_detect_reg_f58);
+		odm_set_bb_reg(dm, R_0xf5c, MASKDWORD,
+			       dm->radar_detect_reg_f5c);
+		odm_set_bb_reg(dm, R_0xf70, MASKDWORD,
+			       dm->radar_detect_reg_f70);
+		odm_set_bb_reg(dm, R_0xf74, MASKDWORD,
+			       dm->radar_detect_reg_f74);
+	} else {
+		odm_set_bb_reg(dm, R_0x918, MASKDWORD,
+			       dm->radar_detect_reg_918);
+		odm_set_bb_reg(dm, R_0x91c, MASKDWORD,
+			       dm->radar_detect_reg_91c);
+		odm_set_bb_reg(dm, R_0x920, MASKDWORD,
+			       dm->radar_detect_reg_920);
+		odm_set_bb_reg(dm, R_0x924, MASKDWORD,
+			       dm->radar_detect_reg_924);
+	}
 }
 
-/* Init radar detection parameters, called after ch, bw is set */
-void phydm_radar_detect_enable(void *p_dm_void)
+/* @Init radar detection parameters, called after ch, bw is set */
+
+void phydm_radar_detect_enable(void *dm_void)
 {
-	struct PHY_DM_STRUCT *p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	struct _DFS_STATISTICS	*p_dfs = (struct _DFS_STATISTICS *)phydm_get_structure(p_dm, PHYDM_DFS);
-	u8 region_domain = p_dm->dfs_region_domain;
-	u8 c_channel = *(p_dm->p_channel);
-	u8 band_width = *(p_dm->p_band_width);
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct _DFS_STATISTICS *dfs = &dm->dfs;
+	u8 region_domain = dm->dfs_region_domain;
+	u8 c_channel = *dm->channel;
+	u8 band_width = *dm->band_width;
 	u8 enable = 0;
+	u8 short_pw_upperbound = 0;
 
-	PHYDM_DBG(p_dm, DBG_DFS, ("test, region_domain = %d\n", region_domain));
+	PHYDM_DBG(dm, DBG_DFS, "test, region_domain = %d\n", region_domain);
 	if (region_domain == PHYDM_DFS_DOMAIN_UNKNOWN) {
-		PHYDM_DBG(p_dm, DBG_DFS, ("PHYDM_DFS_DOMAIN_UNKNOWN\n"));
+		PHYDM_DBG(dm, DBG_DFS, "PHYDM_DFS_DOMAIN_UNKNOWN\n");
 		goto exit;
 	}
 
-	if (p_dm->support_ic_type & (ODM_RTL8821 | ODM_RTL8812 | ODM_RTL8881A)) {
-
-		odm_set_bb_reg(p_dm, 0x814, 0x3fffffff, 0x04cc4d10);
-		odm_set_bb_reg(p_dm, 0x834, MASKBYTE0, 0x06);
+	if (dm->support_ic_type & (ODM_RTL8821 | ODM_RTL8812 | ODM_RTL8881A)) {
+		odm_set_bb_reg(dm, R_0x814, 0x3fffffff, 0x04cc4d10);
+		odm_set_bb_reg(dm, R_0x834, MASKBYTE0, 0x06);
 
-		if (p_dm->radar_detect_dbg_parm_en) {
-			phydm_radar_detect_with_dbg_parm(p_dm);
+		if (dm->radar_detect_dbg_parm_en) {
+			phydm_radar_detect_with_dbg_parm(dm);
 			enable = 1;
 			goto exit;
 		}
 
 		if (region_domain == PHYDM_DFS_DOMAIN_ETSI) {
-			odm_set_bb_reg(p_dm, 0x918, MASKDWORD, 0x1c17ecdf);
-			odm_set_bb_reg(p_dm, 0x924, MASKDWORD, 0x01528500);
-			odm_set_bb_reg(p_dm, 0x91c, MASKDWORD, 0x0fa21a20);
-			odm_set_bb_reg(p_dm, 0x920, MASKDWORD, 0xe0f69204);
+			odm_set_bb_reg(dm, R_0x918, MASKDWORD, 0x1c17ecdf);
+			odm_set_bb_reg(dm, R_0x924, MASKDWORD, 0x01528500);
+			odm_set_bb_reg(dm, R_0x91c, MASKDWORD, 0x0fa21a20);
+			odm_set_bb_reg(dm, R_0x920, MASKDWORD, 0xe0f69204);
 
 		} else if (region_domain == PHYDM_DFS_DOMAIN_MKK) {
-			odm_set_bb_reg(p_dm, 0x924, MASKDWORD, 0x01528500);
-			odm_set_bb_reg(p_dm, 0x920, MASKDWORD, 0xe0d67234);
+			odm_set_bb_reg(dm, R_0x924, MASKDWORD, 0x01528500);
+			odm_set_bb_reg(dm, R_0x920, MASKDWORD, 0xe0d67234);
 
 			if (c_channel >= 52 && c_channel <= 64) {
-				odm_set_bb_reg(p_dm, 0x918, MASKDWORD, 0x1c16ecdf);
-				odm_set_bb_reg(p_dm, 0x91c, MASKDWORD, 0x0f141a20);
+				odm_set_bb_reg(dm, R_0x918, MASKDWORD,
+					       0x1c16ecdf);
+				odm_set_bb_reg(dm, R_0x91c, MASKDWORD,
+					       0x0f141a20);
 			} else {
-				odm_set_bb_reg(p_dm, 0x918, MASKDWORD, 0x1c16acdf);
+				odm_set_bb_reg(dm, R_0x918, MASKDWORD,
+					       0x1c16acdf);
 				if (band_width == CHANNEL_WIDTH_20)
-					odm_set_bb_reg(p_dm, 0x91c, MASKDWORD, 0x64721a20);
+					odm_set_bb_reg(dm, R_0x91c, MASKDWORD,
+						       0x64721a20);
 				else
-					odm_set_bb_reg(p_dm, 0x91c, MASKDWORD, 0x68721a20);
+					odm_set_bb_reg(dm, R_0x91c, MASKDWORD,
+						       0x68721a20);
 			}
 
 		} else if (region_domain == PHYDM_DFS_DOMAIN_FCC) {
-			odm_set_bb_reg(p_dm, 0x918, MASKDWORD, 0x1c16acdf);
-			odm_set_bb_reg(p_dm, 0x924, MASKDWORD, 0x01528500);
-			odm_set_bb_reg(p_dm, 0x920, MASKDWORD, 0xe0d67231);
+			odm_set_bb_reg(dm, R_0x918, MASKDWORD, 0x1c16acdf);
+			odm_set_bb_reg(dm, R_0x924, MASKDWORD, 0x01528500);
+			odm_set_bb_reg(dm, R_0x920, MASKDWORD, 0xe0d67231);
 			if (band_width == CHANNEL_WIDTH_20)
-				odm_set_bb_reg(p_dm, 0x91c, MASKDWORD, 0x64741a20);
+				odm_set_bb_reg(dm, R_0x91c, MASKDWORD,
+					       0x64741a20);
 			else
-				odm_set_bb_reg(p_dm, 0x91c, MASKDWORD, 0x68741a20);
+				odm_set_bb_reg(dm, R_0x91c, MASKDWORD,
+					       0x68741a20);
 
 		} else {
 			/* not supported */
-			PHYDM_DBG(p_dm, DBG_DFS, ("Unsupported dfs_region_domain:%d\n", region_domain));
+			PHYDM_DBG(dm, DBG_DFS,
+				  "Unsupported dfs_region_domain:%d\n",
+				  region_domain);
 			goto exit;
 		}
 
-	} else if (p_dm->support_ic_type & (ODM_RTL8814A | ODM_RTL8822B | ODM_RTL8821C)) {
+	} else if (dm->support_ic_type &
+		   (ODM_RTL8814A | ODM_RTL8822B | ODM_RTL8821C)) {
 
-		odm_set_bb_reg(p_dm, 0x814, 0x3fffffff, 0x04cc4d10);
-		odm_set_bb_reg(p_dm, 0x834, MASKBYTE0, 0x06);
+		odm_set_bb_reg(dm, R_0x814, 0x3fffffff, 0x04cc4d10);
+		odm_set_bb_reg(dm, R_0x834, MASKBYTE0, 0x06);
 
-		/* 8822B only, when BW = 20M, DFIR output is 40Mhz, but DFS input is 80MMHz, so it need to upgrade to 80MHz */
-		if (p_dm->support_ic_type & (ODM_RTL8822B | ODM_RTL8821C)) {
+		/* @8822B only, when BW = 20M, DFIR output is 40Mhz,
+		 * but DFS input is 80MMHz, so it need to upgrade to 80MHz
+		 */
+		if (dm->support_ic_type & (ODM_RTL8822B | ODM_RTL8821C)) {
 			if (band_width == CHANNEL_WIDTH_20)
-				odm_set_bb_reg(p_dm, 0x1984, BIT(26), 1);
+				odm_set_bb_reg(dm, R_0x1984, BIT(26), 1);
 			else
-				odm_set_bb_reg(p_dm, 0x1984, BIT(26), 0);
+				odm_set_bb_reg(dm, R_0x1984, BIT(26), 0);
 		}
 
-		if (p_dm->radar_detect_dbg_parm_en) {
-			phydm_radar_detect_with_dbg_parm(p_dm);
+		if (dm->radar_detect_dbg_parm_en) {
+			phydm_radar_detect_with_dbg_parm(dm);
 			enable = 1;
 			goto exit;
 		}
 
 		if (region_domain == PHYDM_DFS_DOMAIN_ETSI) {
-			odm_set_bb_reg(p_dm, 0x918, MASKDWORD, 0x1c16acdf);
-			odm_set_bb_reg(p_dm, 0x924, MASKDWORD, 0x095a8500);
-			odm_set_bb_reg(p_dm, 0x91c, MASKDWORD, 0x0fa21a20);
-			odm_set_bb_reg(p_dm, 0x920, MASKDWORD, 0xe0f57204);
+			odm_set_bb_reg(dm, R_0x918, MASKDWORD, 0x1c16acdf);
+			odm_set_bb_reg(dm, R_0x924, MASKDWORD, 0x095a8500);
+			odm_set_bb_reg(dm, R_0x91c, MASKDWORD, 0x0fc01a1f);
+			odm_set_bb_reg(dm, R_0x920, MASKDWORD, 0xe0f57204);
 
 		} else if (region_domain == PHYDM_DFS_DOMAIN_MKK) {
-			odm_set_bb_reg(p_dm, 0x924, MASKDWORD, 0x095a8500);
-			odm_set_bb_reg(p_dm, 0x920, MASKDWORD, 0xe0d67234);
+			odm_set_bb_reg(dm, R_0x924, MASKDWORD, 0x095a8500);
+			odm_set_bb_reg(dm, R_0x920, MASKDWORD, 0xe0d67234);
 
 			if (c_channel >= 52 && c_channel <= 64) {
-				odm_set_bb_reg(p_dm, 0x918, MASKDWORD, 0x1c16ecdf);
-				odm_set_bb_reg(p_dm, 0x91c, MASKDWORD, 0x0f141a20);
+				odm_set_bb_reg(dm, R_0x918, MASKDWORD,
+					       0x1c16ecdf);
+				odm_set_bb_reg(dm, R_0x91c, MASKDWORD,
+					       0x0f141a1f);
 			} else {
-				odm_set_bb_reg(p_dm, 0x918, MASKDWORD, 0x1c166cdf);
+				odm_set_bb_reg(dm, R_0x918, MASKDWORD,
+					       0x1c166cdf);
 				if (band_width == CHANNEL_WIDTH_20)
-					odm_set_bb_reg(p_dm, 0x91c, MASKDWORD, 0x64721a20);
+					odm_set_bb_reg(dm, R_0x91c, MASKDWORD,
+						       0x64721a1f);
 				else
-					odm_set_bb_reg(p_dm, 0x91c, MASKDWORD, 0x68721a20);
+					odm_set_bb_reg(dm, R_0x91c, MASKDWORD,
+						       0x68721a1f);
 			}
 
 		} else if (region_domain == PHYDM_DFS_DOMAIN_FCC) {
-			odm_set_bb_reg(p_dm, 0x918, MASKDWORD, 0x1c166cdf);
-			odm_set_bb_reg(p_dm, 0x924, MASKDWORD, 0x095a8500);
-			odm_set_bb_reg(p_dm, 0x920, MASKDWORD, 0xe0d67231);
+			odm_set_bb_reg(dm, R_0x918, MASKDWORD, 0x1c176cdf);
+			odm_set_bb_reg(dm, R_0x924, MASKDWORD, 0x095a8400);
+			odm_set_bb_reg(dm, R_0x920, MASKDWORD, 0xe076d231);
 			if (band_width == CHANNEL_WIDTH_20)
-				odm_set_bb_reg(p_dm, 0x91c, MASKDWORD, 0x64741a20);
+				odm_set_bb_reg(dm, R_0x91c, MASKDWORD,
+					       0x64901a1f);
 			else
-				odm_set_bb_reg(p_dm, 0x91c, MASKDWORD, 0x68741a20);
+				odm_set_bb_reg(dm, R_0x91c, MASKDWORD,
+					       0x62901a1f);
 
 		} else {
 			/* not supported */
-			PHYDM_DBG(p_dm, DBG_DFS, ("Unsupported dfs_region_domain:%d\n", region_domain));
+			PHYDM_DBG(dm, DBG_DFS,
+				  "Unsupported dfs_region_domain:%d\n",
+				  region_domain);
 			goto exit;
 		}
+		/*RXHP low corner will extend the pulse width,
+		 *so we need to increase the upper bound.
+		 */
+		if (dm->support_ic_type & (ODM_RTL8822B | ODM_RTL8821C)) {
+			if (odm_get_bb_reg(dm, 0x8d8,
+					   BIT28 | BIT27 | BIT26) == 0) {
+				short_pw_upperbound =
+					(u8)odm_get_bb_reg(dm, 0x91c,
+						       BIT23 | BIT22 |
+						       BIT21 | BIT20);
+				if ((short_pw_upperbound + 4) > 15)
+					odm_set_bb_reg(dm, 0x91c,
+						       BIT23 | BIT22 |
+						       BIT21 | BIT20, 15);
+				else
+					odm_set_bb_reg(dm, 0x91c,
+						       BIT23 | BIT22 |
+						       BIT21 | BIT20,
+						       short_pw_upperbound + 4);
+			}
+			/*@if peak index -1~+1, use original NB method*/
+			odm_set_bb_reg(dm, 0x19e4, 0x003C0000, 13);
+			odm_set_bb_reg(dm, 0x924, 0x70000, 0);
+		}
+
+		if (dm->support_ic_type & (ODM_RTL8881A))
+			odm_set_bb_reg(dm, 0xb00, 0xc0000000, 3);
+
+		/*@for 8814 new dfs mechanism setting*/
+		if (dm->support_ic_type &
+		    (ODM_RTL8814A | ODM_RTL8822B | ODM_RTL8821C)) {
+			/*Turn off dfs scaling factor*/
+			odm_set_bb_reg(dm, 0x19e4, 0x1fff, 0x0c00);
+			/*NonDC peak_th = 2times DC peak_th*/
+			odm_set_bb_reg(dm, 0x19e4, 0x30000, 1);
+			/*power for debug and auto test flow latch after ST*/
+			odm_set_bb_reg(dm, 0x9f8, 0xc0000000, 3);
+
+			/*@low pulse width radar pattern will cause wrong drop*/
+			/*@disable peak index should the same
+			 *during the same short pulse (new mechan)
+			 */
+			odm_set_bb_reg(dm, 0x9f4, 0x80000000, 0);
+
+			/*@disable peak index should the same
+			 *during the same short pulse (old mechan)
+			 */
+			odm_set_bb_reg(dm, 0x924, 0x20000000, 0);
+
+			/*@if peak index diff >=2, then drop the result*/
+			odm_set_bb_reg(dm, 0x19e4, 0xe000, 2);
+			if (region_domain == 2) {
+				if ((c_channel >= 52) && (c_channel <= 64)) {
+					/*pulse width hist th setting*/
+					/*th1=2*04us*/
+					odm_set_bb_reg(dm, 0x19e4,
+						       0xff000000, 2);
+					/*th2 = 3*0.4us, th3 = 4*0.4us
+					 *th4 = 7*0.4, th5 = 34*0.4
+					 */
+					odm_set_bb_reg(dm, 0x19e8,
+						       MASKDWORD, 0x22070403);
+
+					/*PRI hist th setting*/
+					/*th1=42*32us*/
+					odm_set_bb_reg(dm, 0x19b8,
+						       0x00007f80, 42);
+					/*th2=47*32us, th3=115*32us,
+					 *th4=123*32us, th5=130*32us
+					 */
+					odm_set_bb_reg(dm, 0x19ec,
+						       MASKDWORD, 0x827b732f);
+				} else {
+					/*pulse width hist th setting*/
+					/*th1=2*04us*/
+					odm_set_bb_reg(dm, 0x19e4,
+						       0xff000000, 1);
+					/*th2 = 13*0.4us, th3 = 26*0.4us
+					 *th4 = 75*0.4us, th5 = 255*0.4us
+					 */
+					odm_set_bb_reg(dm, 0x19e8,
+						       MASKDWORD, 0xff4b1a0d);
+					/*PRI hist th setting*/
+					/*th1=4*32us*/
+
+					odm_set_bb_reg(dm, 0x19b8,
+						       0x00007f80, 4);
+					/*th2=8*32us, th3=16*32us,
+					 *th4=32*32us, th5=128*32=4096us
+					 */
+					odm_set_bb_reg(dm, 0x19ec,
+						       MASKDWORD, 0x80201008);
+				}
+			}
+			/*@ETSI*/
+			else if (region_domain == 3) {
+				/*pulse width hist th setting*/
+				/*th1=2*04us*/
+				odm_set_bb_reg(dm, 0x19e4, 0xff000000, 1);
+				odm_set_bb_reg(dm, 0x19e8,
+					       MASKDWORD, 0x68260d06);
+				/*PRI hist th setting*/
+				/*th1=7*32us*/
+				odm_set_bb_reg(dm, 0x19b8, 0x00007f80, 7);
+				/*th2=40*32us, th3=80*32us,
+				 *th4=110*32us, th5=157*32=5024
+				 */
+				odm_set_bb_reg(dm, 0x19ec,
+					       MASKDWORD, 0xc06e2010);
+			}
+			/*@FCC*/
+			else if (region_domain == 1) {
+				/*pulse width hist th setting*/
+				/*th1=2*04us*/
+				odm_set_bb_reg(dm, 0x19e4, 0xff000000, 2);
+				/*th2 = 13*0.4us, th3 = 26*0.4us,
+				 *th4 = 75*0.4us, th5 = 255*0.4us
+				 */
+				odm_set_bb_reg(dm, 0x19e8,
+					       MASKDWORD, 0xff4b1a0d);
+
+				/*PRI hist th setting*/
+				/*th1=4*32us*/
+				odm_set_bb_reg(dm, 0x19b8, 0x00007f80, 4);
+				/*th2=8*32us, th3=21*32us,
+				 *th4=32*32us, th5=96*32=3072
+				 */
+				if (band_width == CHANNEL_WIDTH_20)
+					odm_set_bb_reg(dm, 0x19ec,
+						       MASKDWORD, 0x60282010);
+				else
+					odm_set_bb_reg(dm, 0x19ec,
+						       MASKDWORD, 0x60282420);
+			} else {
+			}
+		}
+	} else if (dm->support_ic_type &
+		   ODM_IC_JGR3_SERIES) {
+	#if (RTL8721D_SUPPORT)
+	} else if (dm->support_ic_type & ODM_RTL8721D) {
+		odm_set_bb_reg(dm, R_0x814, 0x3fffffff, 0x04cc4d10);
+		/*CCA MASK*/
+		odm_set_bb_reg(dm, R_0xc38, 0x07c00000, 0x06);
+		/*CCA Threshold*/
+		odm_set_bb_reg(dm, R_0xc3c, 0x00000007, 0x0);
+
+		if (dm->radar_detect_dbg_parm_en) {
+			phydm_radar_detect_with_dbg_parm(dm);
+			enable = 1;
+			goto exit;
+		}
+
+		if (region_domain == PHYDM_DFS_DOMAIN_ETSI) {
+			odm_set_bb_reg(dm, R_0xf54, MASKDWORD, 0x230006a8);
+			odm_set_bb_reg(dm, R_0xf58, MASKDWORD, 0x354cd7dd);
+			odm_set_bb_reg(dm, R_0xf5c, MASKDWORD, 0x9984ab25);
+			odm_set_bb_reg(dm, R_0xf70, MASKDWORD, 0xbd9fab98);
+			odm_set_bb_reg(dm, R_0xf74, MASKDWORD, 0xcc45029f);
+
+		} else if (region_domain == PHYDM_DFS_DOMAIN_MKK) {
+			odm_set_bb_reg(dm, R_0xf54, MASKDWORD, 0x230006a8);
+			odm_set_bb_reg(dm, R_0xf5c, MASKDWORD, 0x9984ab25);
+			odm_set_bb_reg(dm, R_0xf70, MASKDWORD, 0xbd9fb398);
+			odm_set_bb_reg(dm, R_0xf74, MASKDWORD, 0xcc450e9d);
+
+			if (c_channel >= 52 && c_channel <= 64) {
+				odm_set_bb_reg(dm, R_0xf58, MASKDWORD,
+					       0x354cd7fd);
+			} else {
+				odm_set_bb_reg(dm, R_0xf58, MASKDWORD,
+					       0x354cd7bd);
+			}
+		} else if (region_domain == PHYDM_DFS_DOMAIN_FCC) {
+			odm_set_bb_reg(dm, R_0xf54, MASKDWORD, 0x230006a8);
+			odm_set_bb_reg(dm, R_0xf58, MASKDWORD, 0x3558d7bd);
+			odm_set_bb_reg(dm, R_0xf5c, MASKDWORD, 0x9984ab35);
+			odm_set_bb_reg(dm, R_0xf70, MASKDWORD, 0xbd9fb398);
+			odm_set_bb_reg(dm, R_0xf74, MASKDWORD, 0xcc444e9d);
+		} else {
+			/* not supported */
+			PHYDM_DBG(dm, DBG_DFS,
+				  "Unsupported dfs_region_domain:%d\n",
+				  region_domain);
+			goto exit;
+		}
+
+		/*if peak index -1~+1, use original NB method*/
+		odm_set_bb_reg(dm, R_0xf70, 0x00070000, 0x7);
+		odm_set_bb_reg(dm, R_0xf74, 0x000c0000, 0);
+
+		/*Turn off dfs scaling factor*/
+		odm_set_bb_reg(dm, R_0xf70, 0x00080000, 0x0);
+		/*NonDC peak_th = 2times DC peak_th*/
+		odm_set_bb_reg(dm, R_0xf58, 0x00007800, 1);
+
+		/*low pulse width radar pattern will cause wrong drop*/
+		/*disable peak index should the same*/
+		/*during the same short pulse (new mechan)*/
+		odm_set_bb_reg(dm, R_0xf70, 0x00100000, 0x0);
+		/*if peak index diff >=2, then drop the result*/
+		odm_set_bb_reg(dm, R_0xf70, 0x30000000, 0x2);
+	#endif
 	} else {
-		/* not supported IC type*/
-		PHYDM_DBG(p_dm, DBG_DFS, ("Unsupported IC type:%d\n", p_dm->support_ic_type));
+		/*not supported IC type*/
+		PHYDM_DBG(dm, DBG_DFS, "Unsupported IC type:%d\n",
+			  dm->support_ic_type);
 		goto exit;
 	}
 
 	enable = 1;
 
-	p_dfs->st_l2h_cur = (u8)odm_get_bb_reg(p_dm, 0x91c, 0x000000ff);
-	p_dfs->pwdb_th = (u8)odm_get_bb_reg(p_dm, 0x918, 0x00001f00);
-	p_dfs->peak_th = (u8)odm_get_bb_reg(p_dm, 0x918, 0x00030000);
-	p_dfs->short_pulse_cnt_th = (u8)odm_get_bb_reg(p_dm, 0x920, 0x000f0000);
-	p_dfs->long_pulse_cnt_th = (u8)odm_get_bb_reg(p_dm, 0x920, 0x00f00000);
-	p_dfs->peak_window = (u8)odm_get_bb_reg(p_dm, 0x920, 0x00000300);
-	p_dfs->nb2wb_th = (u8)odm_get_bb_reg(p_dm, 0x920, 0x0000e000);
+	if (dm->support_ic_type & ODM_IC_JGR3_SERIES) {
+		dfs->st_l2h_cur = (u8)odm_get_bb_reg(dm, R_0xa40, 0x00007f00);
+		dfs->pwdb_th_cur = (u8)odm_get_bb_reg(dm, R_0xa50, 0x000000f0);
+		dfs->peak_th = (u8)odm_get_bb_reg(dm, R_0xa48, 0x00c00000);
+		dfs->short_pulse_cnt_th = (u8)odm_get_bb_reg(dm, R_0xa50,
+							     0x00f00000);
+		dfs->long_pulse_cnt_th = (u8)odm_get_bb_reg(dm, R_0xa4c,
+							    0xf0000000);
+		dfs->peak_window = (u8)odm_get_bb_reg(dm, R_0xa40, 0x00030000);
+		dfs->three_peak_opt = (u8)odm_get_bb_reg(dm, R_0xa40,
+							 0x30000000);
+		dfs->three_peak_th2 = (u8)odm_get_bb_reg(dm, R_0xa44,
+							 0x00000007);
+	#if (RTL8721D_SUPPORT)
+	} else if (dm->support_ic_type & (ODM_RTL8721D)) {
+		dfs->st_l2h_cur = (u8)odm_get_bb_reg(dm, R_0xf54,
+						     0x0000001f) << 2);
+		dfs->st_l2h_cur += (u8)odm_get_bb_reg(dm, R_0xf58, 0xc0000000);
+		dfs->pwdb_th_cur = (u8)odm_get_bb_reg(dm, R_0xf70, 0x03c00000);
+		dfs->peak_th = (u8)odm_get_bb_reg(dm, R_0xf5c, 0x00000030);
+		dfs->short_pulse_cnt_th = (u8)odm_get_bb_reg(dm, R_0xf70,
+							     0x00007800);
+		dfs->long_pulse_cnt_th = (u8)odm_get_bb_reg(dm, R_0xf74,
+							    0x0000000f);
+		dfs->peak_window = (u8)odm_get_bb_reg(dm, R_0xf58, 0x18000000);
+		dfs->three_peak_opt = (u8)odm_get_bb_reg(dm, R_0xf58,
+							 0x00030000);
+		dfs->three_peak_th2 = (u8)odm_get_bb_reg(dm,
+							 R_0xf58, 0x00007c00);
+	#endif
+	} else {
+		dfs->st_l2h_cur = (u8)odm_get_bb_reg(dm, R_0x91c, 0x000000ff);
+		dfs->pwdb_th_cur = (u8)odm_get_bb_reg(dm, R_0x918, 0x00001f00);
+		dfs->peak_th = (u8)odm_get_bb_reg(dm, R_0x918, 0x00030000);
+		dfs->short_pulse_cnt_th = (u8)odm_get_bb_reg(dm, R_0x920,
+							     0x000f0000);
+		dfs->long_pulse_cnt_th = (u8)odm_get_bb_reg(dm, R_0x920,
+							    0x00f00000);
+		dfs->peak_window = (u8)odm_get_bb_reg(dm, R_0x920, 0x00000300);
+		dfs->three_peak_opt = (u8)odm_get_bb_reg(dm, 0x924, 0x00000180);
+		dfs->three_peak_th2 = (u8)odm_get_bb_reg(dm, 0x924, 0x00007000);
+	}
 
-	phydm_dfs_parameter_init(p_dm);
+	phydm_dfs_parameter_init(dm);
 
 exit:
 	if (enable) {
-		phydm_radar_detect_reset(p_dm);
-		PHYDM_DBG(p_dm, DBG_DFS, ("on cch:%u, bw:%u\n", c_channel, band_width));
+		phydm_radar_detect_reset(dm);
+		PHYDM_DBG(dm, DBG_DFS, "on cch:%u, bw:%u\n", c_channel,
+			  band_width);
 	} else
-		phydm_radar_detect_disable(p_dm);
+		phydm_radar_detect_disable(dm);
 }
 
-void phydm_dfs_parameter_init(void *p_dm_void)
+void phydm_dfs_parameter_init(void *dm_void)
 {
-
-	struct PHY_DM_STRUCT *p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	struct _DFS_STATISTICS	*p_dfs = (struct _DFS_STATISTICS *)phydm_get_structure(p_dm, PHYDM_DFS);
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct _DFS_STATISTICS *dfs = &dm->dfs;
 
 	u8 i;
-	
-	p_dfs->fa_mask_th = 30;
-	p_dfs->det_print = 1;
-	p_dfs->det_print2 = 0;
-	p_dfs->st_l2h_min = 0x20;
-	p_dfs->st_l2h_max = 0x4e;
-	p_dfs->pwdb_scalar_factor = 12;
-	p_dfs->pwdb_th = 8;
-	for (i = 0 ; i < 5 ; i++) {
-		p_dfs->pulse_flag_hist[i] = 0;
-		p_dfs->radar_det_mask_hist[i] = 0;
-		p_dfs->fa_inc_hist[i] = 0;
+	for (i = 0; i < 5; i++) {
+		dfs->pulse_flag_hist[i] = 0;
+		dfs->pulse_type_hist[i] = 0;
+		dfs->radar_det_mask_hist[i] = 0;
+		dfs->fa_inc_hist[i] = 0;
 	}
 
+	/*@for dfs mode*/
+	dfs->force_TP_mode = 0;
+	dfs->sw_trigger_mode = 0;
+	dfs->det_print = 0;
+	dfs->det_print2 = 0;
+	dfs->print_hist_rpt = 0;
+	dfs->hist_cond_on = 1;
+
+	/*@for dynamic dfs*/
+	dfs->pwdb_th = 8;
+	dfs->fa_mask_th = 30;
+	dfs->st_l2h_min = 0x20;
+	dfs->st_l2h_max = 0x4e;
+	dfs->pwdb_scalar_factor = 12;
+
+	/*@for dfs histogram*/
+	dfs->pri_hist_th = 5;
+	dfs->pri_sum_g1_th = 9;
+	dfs->pri_sum_g5_th = 5;
+	dfs->pri_sum_g1_fcc_th = 4;		/*@FCC Type6*/
+	dfs->pri_sum_g3_fcc_th = 6;
+	dfs->pri_sum_safe_th = 50;
+	dfs->pri_sum_safe_fcc_th = 110;		/*@30 for AP*/
+	dfs->pri_sum_type4_th = 16;
+	dfs->pri_sum_type6_th = 12;
+	dfs->pri_sum_g5_under_g1_th = 4;
+	dfs->pri_pw_diff_th = 4;
+	dfs->pri_pw_diff_fcc_th = 8;
+	dfs->pri_pw_diff_fcc_idle_th = 2;
+	dfs->pri_pw_diff_w53_th = 10;
+	dfs->pw_std_th = 7;			/*@FCC Type4*/
+	dfs->pw_std_idle_th = 10;
+	dfs->pri_std_th = 6;			/*@FCC Type3,4,6*/
+	dfs->pri_std_idle_th = 10;
+	dfs->pri_type1_upp_fcc_th = 110;
+	dfs->pri_type1_low_fcc_th = 50;
+	dfs->pri_type1_cen_fcc_th = 70;
+	dfs->pw_g0_th = 8;
+	dfs->pw_long_lower_th = 6;		/*@7->6*/
+	dfs->pri_long_upper_th = 30;
+	dfs->pw_long_lower_20m_th = 7;		/*@7 for AP*/
+	dfs->pw_long_sum_upper_th = 60;
+	dfs->type4_pw_max_cnt = 7;
+	dfs->type4_safe_pri_sum_th = 5;
 }
 
 void phydm_dfs_dynamic_setting(
-	void *p_dm_void
-){
-	struct PHY_DM_STRUCT *p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	struct _DFS_STATISTICS	*p_dfs = (struct _DFS_STATISTICS *)phydm_get_structure(p_dm, PHYDM_DFS);
-
-	u8 peak_th_cur=0, short_pulse_cnt_th_cur=0, long_pulse_cnt_th_cur=0, three_peak_opt_cur=0, three_peak_th2_cur=0;
-	u8 peak_window_cur=0, nb2wb_th_cur=0;
-	u8 region_domain = p_dm->dfs_region_domain;
-	u8 c_channel = *(p_dm->p_channel);
-	
-	if (p_dm->rx_tp <= 2) {
-		p_dfs->idle_mode = 1;
-		if(p_dfs->force_TP_mode)
-			p_dfs->idle_mode = 0;
-	} else{
-		p_dfs->idle_mode = 0;
-	}
-
-	if ((p_dfs->idle_mode == 1)) { /*idle (no traffic)*/
+	void *dm_void)
+{
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct _DFS_STATISTICS *dfs = &dm->dfs;
+
+	u8 peak_th_cur = 0, short_pulse_cnt_th_cur = 0;
+	u8 long_pulse_cnt_th_cur = 0, three_peak_opt_cur = 0;
+	u8 three_peak_th2_cur = 0;
+	u8 peak_window_cur = 0;
+	u8 region_domain = dm->dfs_region_domain;
+	u8 c_channel = *dm->channel;
+
+	if (dm->rx_tp + dm->tx_tp <= 2) {
+		dfs->idle_mode = 1;
+		if (dfs->force_TP_mode)
+			dfs->idle_mode = 0;
+	} else {
+		dfs->idle_mode = 0;
+	}
+
+	if (dfs->idle_mode == 1) { /*@idle (no traffic)*/
 		peak_th_cur = 3;
 		short_pulse_cnt_th_cur = 6;
-		long_pulse_cnt_th_cur = 13;
+		long_pulse_cnt_th_cur = 9;
 		peak_window_cur = 2;
-		nb2wb_th_cur = 6;
-		three_peak_opt_cur = 1;
+		three_peak_opt_cur = 0;
 		three_peak_th2_cur = 2;
 		if (region_domain == PHYDM_DFS_DOMAIN_MKK) {
-			if ((c_channel >= 52) && (c_channel <= 64)) {
+			if (c_channel >= 52 && c_channel <= 64) {
 				short_pulse_cnt_th_cur = 14;
 				long_pulse_cnt_th_cur = 15;
-				nb2wb_th_cur = 3;
-				three_peak_th2_cur = 0;                
+				three_peak_th2_cur = 0;
 			} else {
 				short_pulse_cnt_th_cur = 6;
-				nb2wb_th_cur = 3;
 				three_peak_th2_cur = 0;
 				long_pulse_cnt_th_cur = 10;
 			}
@@ -271,183 +612,421 @@ void phydm_dfs_dynamic_setting(
 			three_peak_th2_cur = 0;
 		} else if (region_domain == PHYDM_DFS_DOMAIN_ETSI) {
 			long_pulse_cnt_th_cur = 15;
-			if (phydm_dfs_is_meteorology_channel(p_dm)) {/*need to add check cac end condition*/
+			if (phydm_dfs_is_meteorology_channel(dm)) {
+			/*need to add check cac end condition*/
 				peak_th_cur = 2;
-				nb2wb_th_cur = 3;
-				three_peak_opt_cur = 1;
-				three_peak_th2_cur = 0;	
+				three_peak_opt_cur = 0;
+				three_peak_th2_cur = 0;
 				short_pulse_cnt_th_cur = 7;
 			} else {
-				three_peak_opt_cur = 1;
-				three_peak_th2_cur = 0;	
+				three_peak_opt_cur = 0;
+				three_peak_th2_cur = 0;
 				short_pulse_cnt_th_cur = 7;
-				nb2wb_th_cur = 3;
 			}
-		} else	/*default: FCC*/
+		} else /*@default: FCC*/
 			three_peak_th2_cur = 0;
 
-	} else { /*in service (with TP)*/
+	} else { /*@in service (with TP)*/
 		peak_th_cur = 2;
 		short_pulse_cnt_th_cur = 6;
-		long_pulse_cnt_th_cur = 9;
+		long_pulse_cnt_th_cur = 7;
 		peak_window_cur = 2;
-		nb2wb_th_cur = 3;
-		three_peak_opt_cur = 1;
+		three_peak_opt_cur = 0;
 		three_peak_th2_cur = 2;
-		if(region_domain == PHYDM_DFS_DOMAIN_MKK){
-			if ((c_channel >= 52) && (c_channel <= 64)) {
+		if (region_domain == PHYDM_DFS_DOMAIN_MKK) {
+			if (c_channel >= 52 && c_channel <= 64) {
 				long_pulse_cnt_th_cur = 15;
-				short_pulse_cnt_th_cur = 5; /*for high duty cycle*/
-				three_peak_th2_cur = 0;			
-			}
-			else {
+				/*@for high duty cycle*/
+				short_pulse_cnt_th_cur = 5;
+				three_peak_th2_cur = 0;
+			} else {
 				three_peak_opt_cur = 0;
 				three_peak_th2_cur = 0;
 				long_pulse_cnt_th_cur = 8;
 			}
-		}		
-		else if(region_domain == PHYDM_DFS_DOMAIN_FCC){
-		}
-		else if(region_domain == PHYDM_DFS_DOMAIN_ETSI){
+		} else if (region_domain == PHYDM_DFS_DOMAIN_FCC) {
+			long_pulse_cnt_th_cur = 5;	/*for 80M FCC*/
+			short_pulse_cnt_th_cur = 5;	/*for 80M FCC*/
+		} else if (region_domain == PHYDM_DFS_DOMAIN_ETSI) {
 			long_pulse_cnt_th_cur = 15;
 			short_pulse_cnt_th_cur = 5;
 			three_peak_opt_cur = 0;
 		}
-		else{
-		}
 	}
 
-}
+	if (dm->support_ic_type & ODM_IC_JGR3_SERIES) {
+		if (dfs->peak_th != peak_th_cur)
+			odm_set_bb_reg(dm, R_0xa48, 0x00c00000, peak_th_cur);
+		if (dfs->short_pulse_cnt_th != short_pulse_cnt_th_cur)
+			odm_set_bb_reg(dm, R_0xa50, 0x00f00000,
+				       short_pulse_cnt_th_cur);
+		if (dfs->long_pulse_cnt_th != long_pulse_cnt_th_cur)
+			odm_set_bb_reg(dm, R_0xa4c, 0xf0000000,
+				       long_pulse_cnt_th_cur);
+		if (dfs->peak_window != peak_window_cur)
+			odm_set_bb_reg(dm, R_0xa40, 0x00030000,
+				       peak_window_cur);
+		if (dfs->three_peak_opt != three_peak_opt_cur)
+			odm_set_bb_reg(dm, R_0xa40, 0x30000000,
+				       three_peak_opt_cur);
+		if (dfs->three_peak_th2 != three_peak_th2_cur)
+			odm_set_bb_reg(dm, R_0xa44, 0x00000007,
+				       three_peak_th2_cur);
+	#if (RTL8721D_SUPPORT)
+	} else if (dm->support_ic_type & (ODM_RTL8721D)) {
+		if (dfs->peak_th != peak_th_cur)
+			odm_set_bb_reg(dm, R_0xf5c, 0x00000030, peak_th_cur);
+		if (dfs->short_pulse_cnt_th != short_pulse_cnt_th_cur)
+			odm_set_bb_reg(dm, R_0xf70, 0x00007800,
+				       short_pulse_cnt_th_cur);
+		if (dfs->long_pulse_cnt_th != long_pulse_cnt_th_cur)
+			odm_set_bb_reg(dm, R_0xf74, 0x0000000f,
+				       long_pulse_cnt_th_cur);
+		if (dfs->peak_window != peak_window_cur)
+			odm_set_bb_reg(dm, R_0xf58, 0x18000000,
+				       peak_window_cur);
+		if (dfs->three_peak_opt != three_peak_opt_cur)
+			odm_set_bb_reg(dm, R_0xf58, 0x00030000,
+				       three_peak_opt_cur);
+		if (dfs->three_peak_th2 != three_peak_th2_cur)
+			odm_set_bb_reg(dm, R_0xf58, 0x00007c00,
+				       three_peak_th2_cur);
+	#endif
+	} else {
+		if (dfs->peak_th != peak_th_cur)
+			odm_set_bb_reg(dm, R_0x918, 0x00030000, peak_th_cur);
+		if (dfs->short_pulse_cnt_th != short_pulse_cnt_th_cur)
+			odm_set_bb_reg(dm, R_0x920, 0x000f0000,
+				       short_pulse_cnt_th_cur);
+		if (dfs->long_pulse_cnt_th != long_pulse_cnt_th_cur)
+			odm_set_bb_reg(dm, R_0x920, 0x00f00000,
+				       long_pulse_cnt_th_cur);
+		if (dfs->peak_window != peak_window_cur)
+			odm_set_bb_reg(dm, R_0x920, 0x00000300,
+				       peak_window_cur);
+		if (dfs->three_peak_opt != three_peak_opt_cur)
+			odm_set_bb_reg(dm, R_0x924, 0x00000180,
+				       three_peak_opt_cur);
+		if (dfs->three_peak_th2 != three_peak_th2_cur)
+			odm_set_bb_reg(dm, R_0x924, 0x00007000,
+				       three_peak_th2_cur);
+	}
 
+	dfs->peak_th = peak_th_cur;
+	dfs->short_pulse_cnt_th = short_pulse_cnt_th_cur;
+	dfs->long_pulse_cnt_th = long_pulse_cnt_th_cur;
+	dfs->peak_window = peak_window_cur;
+	dfs->three_peak_opt = three_peak_opt_cur;
+	dfs->three_peak_th2 = three_peak_th2_cur;
+}
 
 boolean
 phydm_radar_detect_dm_check(
-	void *p_dm_void
-){
-	struct PHY_DM_STRUCT *p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	struct _DFS_STATISTICS	*p_dfs = (struct _DFS_STATISTICS *)phydm_get_structure(p_dm, PHYDM_DFS);
-	u8 region_domain = p_dm->dfs_region_domain, index = 0;
-
-	u16 i = 0, k = 0, fa_count_cur = 0, fa_count_inc = 0, total_fa_in_hist = 0, pre_post_now_acc_fa_in_hist = 0, max_fa_in_hist = 0, vht_crc_ok_cnt_cur = 0;
-	u16 vht_crc_ok_cnt_inc = 0, ht_crc_ok_cnt_cur = 0, ht_crc_ok_cnt_inc = 0, leg_crc_ok_cnt_cur = 0, leg_crc_ok_cnt_inc = 0;
-	u16 total_crc_ok_cnt_inc = 0, short_pulse_cnt_cur = 0, short_pulse_cnt_inc = 0, long_pulse_cnt_cur = 0, long_pulse_cnt_inc = 0, total_pulse_count_inc = 0;
-	u32 regf98_value = 0, reg918_value = 0, reg91c_value = 0, reg920_value = 0, reg924_value = 0;
-	boolean tri_short_pulse = 0, tri_long_pulse = 0, radar_type = 0, fault_flag_det = 0, fault_flag_psd = 0, fa_flag = 0, radar_detected = 0;
+	void *dm_void)
+{
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct _DFS_STATISTICS *dfs = &dm->dfs;
+	u8 region_domain = dm->dfs_region_domain, index = 0;
+
+	u16 i = 0, j = 0, k = 0, fa_count_cur = 0, fa_count_inc = 0;
+	u16 total_fa_in_hist = 0, pre_post_now_acc_fa_in_hist = 0;
+	u16 max_fa_in_hist = 0, vht_crc_ok_cnt_cur = 0;
+	u16 vht_crc_ok_cnt_inc = 0, ht_crc_ok_cnt_cur = 0;
+	u16 ht_crc_ok_cnt_inc = 0, leg_crc_ok_cnt_cur = 0;
+	u16 leg_crc_ok_cnt_inc = 0;
+	u16 total_crc_ok_cnt_inc = 0, short_pulse_cnt_cur = 0;
+	u16 short_pulse_cnt_inc = 0, long_pulse_cnt_cur = 0;
+	u16 long_pulse_cnt_inc = 0, total_pulse_count_inc = 0;
+	u32 regf98_value = 0, reg918_value = 0, reg91c_value = 0;
+	u32 reg920_value = 0, reg924_value = 0, dbgport2dbc_value = 0;
+	u32 regf54_value = 0, regf58_value = 0, regf5c_value = 0;
+	u32 regdf4_value = 0, regf70_value = 0, regf74_value = 0;
+	u32 rega40_value = 0, rega44_value = 0, rega48_value = 0;
+	u32 rega4c_value = 0, rega50_value = 0, rega54_value = 0;
+	#if (RTL8721D_SUPPORT)
+	u32 reg908_value = 0, regdf4_value = 0;
+	u32 regf54_value = 0, regf58_value = 0, regf5c_value = 0;
+	u32 regf70_value = 0, regf74_value = 0;
+	#endif
+	boolean tri_short_pulse = 0, tri_long_pulse = 0, radar_type = 0;
+	boolean fault_flag_det = 0, fault_flag_psd = 0, fa_flag = 0;
+	boolean radar_detected = 0;
 	u8 st_l2h_new = 0, fa_mask_th = 0, sum = 0;
-	u8 c_channel = *(p_dm->p_channel);
-		
-	/*Get FA count during past 100ms*/
-	fa_count_cur = (u16)odm_get_bb_reg(p_dm, 0xf48, 0x0000ffff);
-	
-	if (p_dfs->fa_count_pre == 0)
+	u8 c_channel = *dm->channel;
+
+	/*@Get FA count during past 100ms, R_0xf48 for AC series*/
+	if (dm->support_ic_type & ODM_IC_JGR3_SERIES)
+		fa_count_cur = (u16)odm_get_bb_reg(dm, R_0x2d00, MASKLWORD);
+	#if (RTL8721D_SUPPORT)
+	else if (dm->support_ic_type & (ODM_RTL8721D)) {
+		fa_count_cur = (u16)odm_get_bb_reg(dm,
+						   ODM_REG_OFDM_FA_TYPE2_11N,
+						   MASKHWORD);
+		fa_count_cur += (u16)odm_get_bb_reg(dm,
+						    ODM_REG_OFDM_FA_TYPE3_11N,
+						    MASKLWORD);
+		fa_count_cur += (u16)odm_get_bb_reg(dm,
+						    ODM_REG_OFDM_FA_TYPE3_11N,
+						    MASKHWORD);
+		fa_count_cur += (u16)odm_get_bb_reg(dm,
+						    ODM_REG_OFDM_FA_TYPE4_11N,
+						    MASKLWORD);
+		fa_count_cur += (u16)odm_get_bb_reg(dm,
+						    ODM_REG_OFDM_FA_TYPE1_11N,
+						    MASKLWORD);
+		fa_count_cur += (u16)odm_get_bb_reg(dm,
+						    ODM_REG_OFDM_FA_TYPE1_11N,
+						    MASKHWORD);
+	}
+	#endif
+	else
+		fa_count_cur = (u16)odm_get_bb_reg(dm, R_0xf48, 0x0000ffff);
+
+	if (dfs->fa_count_pre == 0)
 		fa_count_inc = 0;
-	else if (fa_count_cur >= p_dfs->fa_count_pre)
-		fa_count_inc = fa_count_cur - p_dfs->fa_count_pre;
+	else if (fa_count_cur >= dfs->fa_count_pre)
+		fa_count_inc = fa_count_cur - dfs->fa_count_pre;
 	else
 		fa_count_inc = fa_count_cur;
-	p_dfs->fa_count_pre = fa_count_cur;
-
-	p_dfs->fa_inc_hist[p_dfs->mask_idx] = fa_count_inc;
-	
-	for (i=0; i<5; i++) {		
-		total_fa_in_hist = total_fa_in_hist + p_dfs->fa_inc_hist[i];		
-		if (p_dfs->fa_inc_hist[i] > max_fa_in_hist)			
-			max_fa_in_hist = p_dfs->fa_inc_hist[i];	
-	}	
-	if (p_dfs->mask_idx >= 2)		
-		index = p_dfs->mask_idx - 2;
-	else		
-		index = 5 + p_dfs->mask_idx - 2;	
-	if (index == 0)		
-		pre_post_now_acc_fa_in_hist = p_dfs->fa_inc_hist[index] + p_dfs->fa_inc_hist[index+1] + p_dfs->fa_inc_hist[4];	
-	else if (index == 4)		
-		pre_post_now_acc_fa_in_hist = p_dfs->fa_inc_hist[index] + p_dfs->fa_inc_hist[0] + p_dfs->fa_inc_hist[index-1];	
-	else		
-		pre_post_now_acc_fa_in_hist = p_dfs->fa_inc_hist[index] + p_dfs->fa_inc_hist[index+1] + p_dfs->fa_inc_hist[index-1];
-		
-	/*Get VHT CRC32 ok count during past 100ms*/
-	vht_crc_ok_cnt_cur = (u16)odm_get_bb_reg(p_dm, 0xf0c, 0x00003fff);
-	if (vht_crc_ok_cnt_cur >= p_dfs->vht_crc_ok_cnt_pre)
-		vht_crc_ok_cnt_inc = vht_crc_ok_cnt_cur - p_dfs->vht_crc_ok_cnt_pre;
+	dfs->fa_count_pre = fa_count_cur;
+
+	dfs->fa_inc_hist[dfs->mask_idx] = fa_count_inc;
+
+	for (i = 0; i < 5; i++) {
+		total_fa_in_hist = total_fa_in_hist + dfs->fa_inc_hist[i];
+		if (dfs->fa_inc_hist[i] > max_fa_in_hist)
+			max_fa_in_hist = dfs->fa_inc_hist[i];
+	}
+	if (dfs->mask_idx >= 2)
+		index = dfs->mask_idx - 2;
 	else
+		index = 5 + dfs->mask_idx - 2;
+	if (index == 0) {
+		pre_post_now_acc_fa_in_hist = dfs->fa_inc_hist[index] +
+					      dfs->fa_inc_hist[index + 1] +
+					      dfs->fa_inc_hist[4];
+	} else if (index == 4) {
+		pre_post_now_acc_fa_in_hist = dfs->fa_inc_hist[index] +
+					      dfs->fa_inc_hist[0] +
+					      dfs->fa_inc_hist[index - 1];
+	} else {
+		pre_post_now_acc_fa_in_hist = dfs->fa_inc_hist[index] +
+					      dfs->fa_inc_hist[index + 1] +
+					      dfs->fa_inc_hist[index - 1];
+	}
+
+	/*@Get VHT CRC32 ok count during past 100ms*/
+	if (dm->support_ic_type & ODM_IC_JGR3_SERIES)
+		vht_crc_ok_cnt_cur = (u16)odm_get_bb_reg(dm, R_0x2c0c, 0xffff);
+	#if (RTL8721D_SUPPORT)
+	else if (dm->support_ic_type & ODM_RTL8721D)
+		vht_crc_ok_cnt_cur = 0;
+	#endif
+	else
+		vht_crc_ok_cnt_cur = (u16)odm_get_bb_reg(dm, R_0xf0c,
+							 0x00003fff);
+
+	if (vht_crc_ok_cnt_cur >= dfs->vht_crc_ok_cnt_pre) {
+		vht_crc_ok_cnt_inc = vht_crc_ok_cnt_cur -
+				     dfs->vht_crc_ok_cnt_pre;
+	} else {
 		vht_crc_ok_cnt_inc = vht_crc_ok_cnt_cur;
-	p_dfs->vht_crc_ok_cnt_pre = vht_crc_ok_cnt_cur;
+	}
+	dfs->vht_crc_ok_cnt_pre = vht_crc_ok_cnt_cur;
+
+	/*@Get HT CRC32 ok count during past 100ms*/
+	if (dm->support_ic_type & ODM_IC_JGR3_SERIES)
+		ht_crc_ok_cnt_cur = (u16)odm_get_bb_reg(dm, R_0x2c10, 0xffff);
+	#if (RTL8721D_SUPPORT)
+	else if (dm->support_ic_type & (ODM_RTL8721D))
+		ht_crc_ok_cnt_cur = (u16)odm_get_bb_reg(dm, R_0xf90, MASKLWORD);
+	#endif
+	else
+		ht_crc_ok_cnt_cur = (u16)odm_get_bb_reg(dm, R_0xf10,
+							0x00003fff);
 
-	/*Get HT CRC32 ok count during past 100ms*/
-	ht_crc_ok_cnt_cur = (u16)odm_get_bb_reg(p_dm, 0xf10, 0x00003fff);
-	if (ht_crc_ok_cnt_cur >= p_dfs->ht_crc_ok_cnt_pre)
-		ht_crc_ok_cnt_inc = ht_crc_ok_cnt_cur - p_dfs->ht_crc_ok_cnt_pre;
+	if (ht_crc_ok_cnt_cur >= dfs->ht_crc_ok_cnt_pre)
+		ht_crc_ok_cnt_inc = ht_crc_ok_cnt_cur - dfs->ht_crc_ok_cnt_pre;
 	else
 		ht_crc_ok_cnt_inc = ht_crc_ok_cnt_cur;
-	p_dfs->ht_crc_ok_cnt_pre = ht_crc_ok_cnt_cur;
+	dfs->ht_crc_ok_cnt_pre = ht_crc_ok_cnt_cur;
+
+	/*@Get Legacy CRC32 ok count during past 100ms*/
+	if (dm->support_ic_type & ODM_IC_JGR3_SERIES)
+		leg_crc_ok_cnt_cur = (u16)odm_get_bb_reg(dm, R_0x2c14, 0xffff);
+	#if (RTL8721D_SUPPORT)
+	else if (dm->support_ic_type & ODM_RTL8721D)
+		leg_crc_ok_cnt_cur = (u16)odm_get_bb_reg(dm,
+							 R_0xf94, MASKLWORD);
+	#endif
+	else
+		leg_crc_ok_cnt_cur = (u16)odm_get_bb_reg(dm, R_0xf14,
+							 0x00003fff);
 
-	/*Get Legacy CRC32 ok count during past 100ms*/
-	leg_crc_ok_cnt_cur = (u16)odm_get_bb_reg(p_dm, 0xf14, 0x00003fff);
-	if (leg_crc_ok_cnt_cur >= p_dfs->leg_crc_ok_cnt_pre)
-		leg_crc_ok_cnt_inc = leg_crc_ok_cnt_cur - p_dfs->leg_crc_ok_cnt_pre;
+	if (leg_crc_ok_cnt_cur >= dfs->leg_crc_ok_cnt_pre)
+		leg_crc_ok_cnt_inc = leg_crc_ok_cnt_cur - dfs->leg_crc_ok_cnt_pre;
 	else
 		leg_crc_ok_cnt_inc = leg_crc_ok_cnt_cur;
-	p_dfs->leg_crc_ok_cnt_pre = leg_crc_ok_cnt_cur;
+	dfs->leg_crc_ok_cnt_pre = leg_crc_ok_cnt_cur;
 
-	if ((vht_crc_ok_cnt_cur == 0x3fff) ||
-		(ht_crc_ok_cnt_cur == 0x3fff) ||
-		(leg_crc_ok_cnt_cur == 0x3fff)) {
-		odm_set_bb_reg(p_dm, 0xb58, BIT(0), 1);
-		odm_set_bb_reg(p_dm, 0xb58, BIT(0), 0);
+	if (dm->support_ic_type & ODM_IC_JGR3_SERIES) {
+		if (vht_crc_ok_cnt_cur == 0xffff ||
+			ht_crc_ok_cnt_cur == 0xffff ||
+			leg_crc_ok_cnt_cur == 0xffff) {
+			phydm_reset_bb_hw_cnt(dm);
+		}
+	#if (RTL8721D_SUPPORT)
+	} else if (dm->support_ic_type & (ODM_RTL8721D)) {
+		if (ht_crc_ok_cnt_cur == 0xffff ||
+		    leg_crc_ok_cnt_cur == 0xffff) {
+			odm_set_bb_reg(dm, R_0xf14, BIT(16), 1);
+			odm_set_bb_reg(dm, R_0xf14, BIT(16), 0);
+		}
+	#endif
+	} else {
+		if (vht_crc_ok_cnt_cur == 0x3fff ||
+		    ht_crc_ok_cnt_cur == 0x3fff ||
+		    leg_crc_ok_cnt_cur == 0x3fff) {
+			phydm_reset_bb_hw_cnt(dm);
+		}
 	}
 
-	total_crc_ok_cnt_inc = vht_crc_ok_cnt_inc + ht_crc_ok_cnt_inc + leg_crc_ok_cnt_inc;
+	total_crc_ok_cnt_inc = vht_crc_ok_cnt_inc +
+			       ht_crc_ok_cnt_inc +
+			       leg_crc_ok_cnt_inc;
 
-	/*Get short pulse count, need carefully handle the counter overflow*/
-	regf98_value = odm_get_bb_reg(p_dm, 0xf98, 0xffffffff);
-	short_pulse_cnt_cur = (u16)(regf98_value & 0x000000ff);
-	if (short_pulse_cnt_cur >= p_dfs->short_pulse_cnt_pre)
-		short_pulse_cnt_inc = short_pulse_cnt_cur - p_dfs->short_pulse_cnt_pre;
-	else
+	if (dm->support_ic_type & ODM_IC_JGR3_SERIES) {
+		if (phydm_set_bb_dbg_port(dm, DBGPORT_PRI_2, 0x3b0)) {
+			odm_set_bb_reg(dm, 0x1e28, 0x03c00000, 8);
+			dbgport2dbc_value = phydm_get_bb_dbg_port_val(dm);
+			phydm_release_bb_dbg_port(dm);
+		}
+		short_pulse_cnt_cur = (u16)((dbgport2dbc_value & 0x000ff800)
+					    >> 11);
+		long_pulse_cnt_cur = (u16)((dbgport2dbc_value & 0x0fc00000)
+					    >> 22);
+	#if (RTL8721D_SUPPORT)
+	} else if (dm->support_ic_type & (ODM_RTL8721D)) {
+		reg908_value = (u32)odm_get_bb_reg(dm, R_0x908, MASKDWORD);
+		odm_set_bb_reg(dm, R_0x908, MASKDWORD, 0x254);
+		regdf4_value = odm_get_bb_reg(dm, R_0xdf4, MASKDWORD);
+		short_pulse_cnt_cur = (u16)((regdf4_value & 0x000ff000) >> 12);
+		long_pulse_cnt_cur = (u16)((regdf4_value & 0x0fc00000) >> 22);
+
+		tri_short_pulse = (regdf4_value & BIT(20)) ? 1 : 0;
+		tri_long_pulse = (regdf4_value & BIT(28)) ? 1 : 0;
+		if (tri_short_pulse || tri_long_pulse) {
+			odm_set_bb_reg(dm, R_0xf58, BIT(29), 0);
+			odm_set_bb_reg(dm, R_0xf58, BIT(29), 1);
+		}
+	#endif
+	} else {
+		regf98_value = odm_get_bb_reg(dm, R_0xf98, 0xffffffff);
+		short_pulse_cnt_cur = (u16)(regf98_value & 0x000000ff);
+		long_pulse_cnt_cur = (u16)((regf98_value & 0x0000ff00) >> 8);
+	}
+
+	/*@Get short pulse count, need carefully handle the counter overflow*/
+
+	if (short_pulse_cnt_cur >= dfs->short_pulse_cnt_pre) {
+		short_pulse_cnt_inc = short_pulse_cnt_cur -
+				      dfs->short_pulse_cnt_pre;
+	} else {
 		short_pulse_cnt_inc = short_pulse_cnt_cur;
-	p_dfs->short_pulse_cnt_pre = short_pulse_cnt_cur;
+	}
+	dfs->short_pulse_cnt_pre = short_pulse_cnt_cur;
 
-	/*Get long pulse count, need carefully handle the counter overflow*/
-	long_pulse_cnt_cur = (u16)((regf98_value & 0x0000ff00) >> 8);
-	if (long_pulse_cnt_cur >= p_dfs->long_pulse_cnt_pre)
-		long_pulse_cnt_inc = long_pulse_cnt_cur - p_dfs->long_pulse_cnt_pre;
-	else
+	/*@Get long pulse count, need carefully handle the counter overflow*/
+
+	if (long_pulse_cnt_cur >= dfs->long_pulse_cnt_pre) {
+		long_pulse_cnt_inc = long_pulse_cnt_cur -
+				     dfs->long_pulse_cnt_pre;
+	} else {
 		long_pulse_cnt_inc = long_pulse_cnt_cur;
-	p_dfs->long_pulse_cnt_pre = long_pulse_cnt_cur;
+	}
+	dfs->long_pulse_cnt_pre = long_pulse_cnt_cur;
 
 	total_pulse_count_inc = short_pulse_cnt_inc + long_pulse_cnt_inc;
 
-	if (p_dfs->det_print){
-		PHYDM_DBG(p_dm, DBG_DFS, ("=====================================================================\n"));
-		PHYDM_DBG(p_dm, DBG_DFS, ("Total_CRC_OK_cnt_inc[%d] VHT_CRC_ok_cnt_inc[%d] HT_CRC_ok_cnt_inc[%d] LEG_CRC_ok_cnt_inc[%d] FA_count_inc[%d]\n",
-			total_crc_ok_cnt_inc, vht_crc_ok_cnt_inc, ht_crc_ok_cnt_inc, leg_crc_ok_cnt_inc, fa_count_inc));
-		PHYDM_DBG(p_dm, DBG_DFS, ("Init_Gain[%x] 0x91c[%x] 0xf98[%08x] short_pulse_cnt_inc[%d] long_pulse_cnt_inc[%d]\n",
-			p_dfs->igi_cur, p_dfs->st_l2h_cur, regf98_value, short_pulse_cnt_inc, long_pulse_cnt_inc));
-		PHYDM_DBG(p_dm, DBG_DFS, ("Throughput: %dMbps\n", p_dm->rx_tp));
-		reg918_value = odm_get_bb_reg(p_dm, 0x918, 0xffffffff);
-		reg91c_value = odm_get_bb_reg(p_dm, 0x91c, 0xffffffff);
-		reg920_value = odm_get_bb_reg(p_dm, 0x920, 0xffffffff);
-		reg924_value = odm_get_bb_reg(p_dm, 0x924, 0xffffffff);
-		PHYDM_DBG(p_dm, DBG_DFS, ("0x918[%08x] 0x91c[%08x] 0x920[%08x] 0x924[%08x]\n", reg918_value, reg91c_value, reg920_value, reg924_value));
-		PHYDM_DBG(p_dm, DBG_DFS, ("dfs_regdomain = %d, dbg_mode = %d, idle_mode = %d\n", region_domain, p_dfs->dbg_mode, p_dfs->idle_mode));
-	}
-	tri_short_pulse = (regf98_value & BIT(17))? 1 : 0;
-	tri_long_pulse = (regf98_value & BIT(19))? 1 : 0;
-
-	if(tri_short_pulse)
-		radar_type = 0;
-	else if(tri_long_pulse)
-		radar_type = 1;
+	if (dfs->det_print) {
+		PHYDM_DBG(dm, DBG_DFS,
+			  "===============================================\n");
+		PHYDM_DBG(dm, DBG_DFS,
+			  "Total_CRC_OK_cnt_inc[%d] VHT_CRC_ok_cnt_inc[%d] HT_CRC_ok_cnt_inc[%d] LEG_CRC_ok_cnt_inc[%d] FA_count_inc[%d]\n",
+			  total_crc_ok_cnt_inc, vht_crc_ok_cnt_inc,
+			  ht_crc_ok_cnt_inc, leg_crc_ok_cnt_inc, fa_count_inc);
+		if (dm->support_ic_type & (ODM_RTL8721D)) {
+			PHYDM_DBG(dm, DBG_DFS,
+				  "Init_Gain[%x] st_l2h_cur[%x] 0xdf4[%08x] short_pulse_cnt_inc[%d] long_pulse_cnt_inc[%d]\n",
+				  dfs->igi_cur, dfs->st_l2h_cur, regdf4_value,
+				  short_pulse_cnt_inc, long_pulse_cnt_inc);
+			regf54_value = odm_get_bb_reg(dm, R_0xf54, MASKDWORD);
+			regf58_value = odm_get_bb_reg(dm, R_0xf58, MASKDWORD);
+			regf5c_value = odm_get_bb_reg(dm, R_0xf5c, MASKDWORD);
+			regf70_value = odm_get_bb_reg(dm, R_0xf70, MASKDWORD);
+			regf74_value = odm_get_bb_reg(dm, R_0xf74, MASKDWORD);
+			PHYDM_DBG(dm, DBG_DFS,
+				  "0xf54[%08x] 0xf58[%08x] 0xf5c[%08x] 0xf70[%08x] 0xf74[%08x]\n",
+				  regf54_value, regf58_value, regf5c_value,
+				  regf70_value, regf74_value);
+		} else if (dm->support_ic_type & ODM_IC_JGR3_SERIES) {
+			PHYDM_DBG(dm, DBG_DFS,
+				  "Init_Gain[%x] st_l2h_cur[%x] 0x2dbc[%08x] short_pulse_cnt_inc[%d] long_pulse_cnt_inc[%d]\n",
+				  dfs->igi_cur, dfs->st_l2h_cur,
+				  dbgport2dbc_value, short_pulse_cnt_inc,
+				  long_pulse_cnt_inc);
+			rega40_value = odm_get_bb_reg(dm, R_0xa40, MASKDWORD);
+			rega44_value = odm_get_bb_reg(dm, R_0xa44, MASKDWORD);
+			rega48_value = odm_get_bb_reg(dm, R_0xa48, MASKDWORD);
+			rega4c_value = odm_get_bb_reg(dm, R_0xa4c, MASKDWORD);
+			rega50_value = odm_get_bb_reg(dm, R_0xa50, MASKDWORD);
+			rega54_value = odm_get_bb_reg(dm, R_0xa54, MASKDWORD);
+			PHYDM_DBG(dm, DBG_DFS,
+				  "0xa40[%08x] 0xa44[%08x] 0xa48[%08x] 0xa4c[%08x] 0xa50[%08x] 0xa54[%08x]\n",
+				  rega40_value, rega44_value, rega48_value,
+				  rega4c_value, rega50_value, rega54_value);
+		} else {
+			PHYDM_DBG(dm, DBG_DFS,
+				  "Init_Gain[%x] 0x91c[%x] 0xf98[%08x] short_pulse_cnt_inc[%d] long_pulse_cnt_inc[%d]\n",
+				  dfs->igi_cur, dfs->st_l2h_cur, regf98_value,
+				  short_pulse_cnt_inc, long_pulse_cnt_inc);
+			reg918_value = odm_get_bb_reg(dm, R_0x918,
+						      0xffffffff);
+			reg91c_value = odm_get_bb_reg(dm, R_0x91c,
+						      0xffffffff);
+			reg920_value = odm_get_bb_reg(dm, R_0x920,
+						      0xffffffff);
+			reg924_value = odm_get_bb_reg(dm, R_0x924,
+						      0xffffffff);
+			PHYDM_DBG(dm, DBG_DFS,
+				  "0x918[%08x] 0x91c[%08x] 0x920[%08x] 0x924[%08x]\n",
+				  reg918_value, reg91c_value,
+				  reg920_value, reg924_value);
+		}
+		PHYDM_DBG(dm, DBG_DFS, "Throughput: %dMbps\n",
+			  (dm->rx_tp + dm->tx_tp));
+
+		PHYDM_DBG(dm, DBG_DFS,
+			  "dfs_regdomain = %d, dbg_mode = %d, idle_mode = %d, print_hist_rpt = %d, hist_cond_on = %d\n",
+			  region_domain, dfs->dbg_mode,
+			  dfs->idle_mode, dfs->print_hist_rpt,
+			  dfs->hist_cond_on);
+	}
+	if (dm->support_ic_type & ODM_IC_JGR3_SERIES) {
+		tri_short_pulse = (dbgport2dbc_value & BIT(20)) ? 1 : 0;
+		tri_long_pulse = (dbgport2dbc_value & BIT(28)) ? 1 : 0;
+	} else {
+		tri_short_pulse = (regf98_value & BIT(17)) ? 1 : 0;
+		tri_long_pulse = (regf98_value & BIT(19)) ? 1 : 0;
+	}
 
 	if (tri_short_pulse) {
-		odm_set_bb_reg(p_dm, 0x924, BIT(15), 0);
-		odm_set_bb_reg(p_dm, 0x924, BIT(15), 1);
+		phydm_radar_detect_reset(dm);
 	}
 	if (tri_long_pulse) {
-		odm_set_bb_reg(p_dm, 0x924, BIT(15), 0);
-		odm_set_bb_reg(p_dm, 0x924, BIT(15), 1);
-		if (region_domain == PHYDM_DFS_DOMAIN_MKK) {	
-			if ((c_channel >= 52) && (c_channel <= 64)) {
+		phydm_radar_detect_reset(dm);
+		if (region_domain == PHYDM_DFS_DOMAIN_MKK) {
+			if (c_channel >= 52 && c_channel <= 64) {
 				tri_long_pulse = 0;
 			}
 		}
@@ -456,189 +1035,1226 @@ phydm_radar_detect_dm_check(
 		}
 	}
 
-	st_l2h_new = p_dfs->st_l2h_cur;
-	p_dfs->pulse_flag_hist[p_dfs->mask_idx] = tri_short_pulse | tri_long_pulse;
+	st_l2h_new = dfs->st_l2h_cur;
+	dfs->pulse_flag_hist[dfs->mask_idx] = tri_short_pulse | tri_long_pulse;
+	dfs->pulse_type_hist[dfs->mask_idx] = (tri_long_pulse) ? 1 : 0;
 
 	/* PSD(not ready) */
 
 	fault_flag_det = 0;
 	fault_flag_psd = 0;
 	fa_flag = 0;
-	if(region_domain == PHYDM_DFS_DOMAIN_ETSI){
-		fa_mask_th = p_dfs->fa_mask_th + 20;		
-	}
-	else{
-		fa_mask_th = p_dfs->fa_mask_th;		
-	}
-	if (max_fa_in_hist >= fa_mask_th || total_fa_in_hist >= fa_mask_th || pre_post_now_acc_fa_in_hist >= fa_mask_th || (p_dfs->igi_cur >= 0x30)){		
-		st_l2h_new = p_dfs->st_l2h_max;
-		p_dfs->radar_det_mask_hist[index] = 1;		
-		if (p_dfs->pulse_flag_hist[index] == 1){			
-			p_dfs->pulse_flag_hist[index] = 0;			
-			if (p_dfs->det_print2){
-				PHYDM_DBG(p_dm, DBG_DFS, ("Radar is masked : FA mask\n"));
+	if (region_domain == PHYDM_DFS_DOMAIN_ETSI) {
+		fa_mask_th = dfs->fa_mask_th + 20;
+	} else {
+		fa_mask_th = dfs->fa_mask_th;
+	}
+	if (max_fa_in_hist >= fa_mask_th ||
+	    total_fa_in_hist >= fa_mask_th ||
+	    pre_post_now_acc_fa_in_hist >= fa_mask_th ||
+	    dfs->igi_cur >= 0x30) {
+		st_l2h_new = dfs->st_l2h_max;
+		dfs->radar_det_mask_hist[index] = 1;
+		if (dfs->pulse_flag_hist[index] == 1) {
+			dfs->pulse_flag_hist[index] = 0;
+			if (dfs->det_print2) {
+				PHYDM_DBG(dm, DBG_DFS,
+					  "Radar is masked : FA mask\n");
 			}
 		}
 		fa_flag = 1;
+	} else {
+		dfs->radar_det_mask_hist[index] = 0;
 	}
 
-	if (p_dfs->det_print) {
-		PHYDM_DBG(p_dm, DBG_DFS, ("mask_idx: %d\n", p_dfs->mask_idx));
-		PHYDM_DBG(p_dm, DBG_DFS, ("radar_det_mask_hist: "));
-		for (i=0; i<5; i++)
-			PHYDM_DBG(p_dm, DBG_DFS, ("%d ", p_dfs->radar_det_mask_hist[i]));
-		PHYDM_DBG(p_dm, DBG_DFS, ("pulse_flag_hist: "));
-		for (i=0; i<5; i++)
-			PHYDM_DBG(p_dm, DBG_DFS, ("%d ", p_dfs->pulse_flag_hist[i]));
-		PHYDM_DBG(p_dm, DBG_DFS, ("fa_inc_hist: "));
-		for (i=0; i<5; i++)			
-			PHYDM_DBG(p_dm, DBG_DFS, ("%d ", p_dfs->fa_inc_hist[i]));
-		PHYDM_DBG(p_dm, DBG_DFS,
-			("\nmax_fa_in_hist: %d pre_post_now_acc_fa_in_hist: %d ", max_fa_in_hist, pre_post_now_acc_fa_in_hist));
+	if (dfs->det_print) {
+		PHYDM_DBG(dm, DBG_DFS, "mask_idx: %d\n", dfs->mask_idx);
+		PHYDM_DBG(dm, DBG_DFS, "radar_det_mask_hist: ");
+		for (i = 0; i < 5; i++)
+			PHYDM_DBG(dm, DBG_DFS, "%d ",
+				  dfs->radar_det_mask_hist[i]);
+		PHYDM_DBG(dm, DBG_DFS, "pulse_flag_hist: ");
+		for (i = 0; i < 5; i++)
+			PHYDM_DBG(dm, DBG_DFS, "%d ", dfs->pulse_flag_hist[i]);
+		PHYDM_DBG(dm, DBG_DFS, "fa_inc_hist: ");
+		for (i = 0; i < 5; i++)
+			PHYDM_DBG(dm, DBG_DFS, "%d ", dfs->fa_inc_hist[i]);
+		PHYDM_DBG(dm, DBG_DFS,
+			  "\nfa_mask_th: %d max_fa_in_hist: %d total_fa_in_hist: %d pre_post_now_acc_fa_in_hist: %d ",
+			  fa_mask_th, max_fa_in_hist, total_fa_in_hist,
+			  pre_post_now_acc_fa_in_hist);
 	}
 
 	sum = 0;
-	for (k=0; k<5; k++) {
-		if (p_dfs->radar_det_mask_hist[k] == 1)
+	for (k = 0; k < 5; k++) {
+		if (dfs->radar_det_mask_hist[k] == 1)
 			sum++;
 	}
 
-	if (p_dfs->mask_hist_checked <= 5)
-		p_dfs->mask_hist_checked++;
+	if (dfs->mask_hist_checked <= 5)
+		dfs->mask_hist_checked++;
 
-	if ((p_dfs->mask_hist_checked >= 5) && p_dfs->pulse_flag_hist[index])
-	{
-		if (sum <= 2) 
-		{
-			radar_detected = 1 ;
-			PHYDM_DBG(p_dm, DBG_DFS, ("Detected type %d radar signal!\n", radar_type));
-		}
-		else {
+	if (dfs->mask_hist_checked >= 5 && dfs->pulse_flag_hist[index]) {
+		if (sum <= 2) {
+			if (dfs->hist_cond_on &&
+			    (!(dm->support_ic_type & ODM_RTL8721D))) {
+				/*return the value from hist_radar_detected*/
+				radar_detected = phydm_dfs_hist_log(dm, index);
+			} else {
+				if (dfs->pulse_type_hist[index] == 0)
+					dfs->radar_type = 0;
+				else if (dfs->pulse_type_hist[index] == 1)
+					dfs->radar_type = 1;
+				radar_detected = 1;
+				PHYDM_DBG(dm, DBG_DFS,
+					  "Detected type %d radar signal!\n",
+					  dfs->radar_type);
+			}
+		} else {
 			fault_flag_det = 1;
-			if (p_dfs->det_print2){
-				PHYDM_DBG(p_dm, DBG_DFS, ("Radar is masked : mask_hist large than thd\n"));
+			if (dfs->det_print2) {
+				PHYDM_DBG(dm, DBG_DFS,
+					  "Radar is masked : mask_hist large than thd\n");
 			}
 		}
 	}
 
-	p_dfs->mask_idx++;
-	if (p_dfs->mask_idx == 5)
-		p_dfs->mask_idx = 0;
+	dfs->mask_idx++;
+	if (dfs->mask_idx == 5)
+		dfs->mask_idx = 0;
 
-	if ((fault_flag_det == 0) && (fault_flag_psd == 0) && (fa_flag ==0)) {		
-		if (p_dfs->igi_cur < 0x30) {
-			st_l2h_new = p_dfs->st_l2h_min;
+	if (fault_flag_det == 0 && fault_flag_psd == 0 && fa_flag == 0) {
+		if (dfs->igi_cur < 0x30) {
+			st_l2h_new = dfs->st_l2h_min;
 		}
 	}
-	
-	if ((st_l2h_new != p_dfs->st_l2h_cur)) {
-		if (st_l2h_new < p_dfs->st_l2h_min) {			
-			p_dfs->st_l2h_cur = p_dfs->st_l2h_min;			
+
+	if (st_l2h_new != dfs->st_l2h_cur) {
+		if (st_l2h_new < dfs->st_l2h_min) {
+			dfs->st_l2h_cur = dfs->st_l2h_min;
+		} else if (st_l2h_new > dfs->st_l2h_max)
+			dfs->st_l2h_cur = dfs->st_l2h_max;
+		else
+			dfs->st_l2h_cur = st_l2h_new;
+		/*odm_set_bb_reg(dm, R_0x91c, 0xff, dfs->st_l2h_cur);*/
+
+		dfs->pwdb_th_cur = ((int)dfs->st_l2h_cur - (int)dfs->igi_cur)
+				    / 2 + dfs->pwdb_scalar_factor;
+
+		/*@limit the pwdb value to absolute lower bound 8*/
+		dfs->pwdb_th_cur = MAX_2(dfs->pwdb_th_cur, (int)dfs->pwdb_th);
+
+		/*@limit the pwdb value to absolute upper bound 0x1f*/
+		dfs->pwdb_th_cur = MIN_2(dfs->pwdb_th_cur, 0x1f);
+
+		if (dm->support_ic_type & ODM_IC_JGR3_SERIES)
+			odm_set_bb_reg(dm, R_0xa50, 0x000000f0,
+				       dfs->pwdb_th_cur);
+		#if (RTL8721D_SUPPORT)
+		else if (dm->support_ic_type & ODM_RTL8721D) {
+			odm_set_bb_reg(dm, R_0xf54, 0x0000001f,
+				       ((dfs->st_l2h_cur & 0x0000007c) >> 2));
+			odm_set_bb_reg(dm, R_0xf58, 0xc0000000,
+				       (dfs->st_l2h_cur & 0x00000003));
+			odm_set_bb_reg(dm, R_0xf70, 0x03c00000,
+				       dfs->pwdb_th_cur);
 		}
-		else if (st_l2h_new > p_dfs->st_l2h_max)
-			p_dfs->st_l2h_cur = p_dfs->st_l2h_max;
+		#endif
 		else
-			p_dfs->st_l2h_cur = st_l2h_new;
-		odm_set_bb_reg(p_dm, 0x91c, 0xff, p_dfs->st_l2h_cur);
-
-		p_dfs->pwdb_th = ((int)p_dfs->st_l2h_cur - (int)p_dfs->igi_cur)/2 + p_dfs->pwdb_scalar_factor;
-		p_dfs->pwdb_th = MAX_2(p_dfs->pwdb_th, (int)p_dfs->pwdb_th); /*limit the pwdb value to absoulte lower bound 8*/
-		p_dfs->pwdb_th = MIN_2(p_dfs->pwdb_th, 0x1f);    /*limit the pwdb value to absoulte upper bound 0x1f*/
-		odm_set_bb_reg(p_dm, 0x918, 0x00001f00, p_dfs->pwdb_th);
+			odm_set_bb_reg(dm, R_0x918, 0x00001f00,
+				       dfs->pwdb_th_cur);
 	}
 
-	if (p_dfs->det_print2) {
-		PHYDM_DBG(p_dm, DBG_DFS,
-			("fault_flag_det[%d], fault_flag_psd[%d], DFS_detected [%d]\n", fault_flag_det, fault_flag_psd, radar_detected));
+	if (dfs->det_print) {
+		PHYDM_DBG(dm, DBG_DFS,
+			  "fault_flag_det[%d], fault_flag_psd[%d], DFS_detected [%d]\n",
+			  fault_flag_det, fault_flag_psd, radar_detected);
 	}
+	#if (RTL8721D_SUPPORT)
+	if (dm->support_ic_type & (ODM_RTL8721D))
+		odm_set_bb_reg(dm, R_0x908, MASKDWORD, reg908_value);
+	#endif
 
 	return radar_detected;
+}
+
+void phydm_dfs_histogram_radar_distinguish(
+	void *dm_void)
+{
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct _DFS_STATISTICS *dfs = &dm->dfs;
+	u8 region_domain = dm->dfs_region_domain;
+	u8 c_channel = *dm->channel;
+	u8 band_width = *dm->band_width;
+
+	u8 dfs_pw_thd1 = 0, dfs_pw_thd2 = 0, dfs_pw_thd3 = 0;
+	u8 dfs_pw_thd4 = 0, dfs_pw_thd5 = 0;
+	u8 dfs_pri_thd1 = 0, dfs_pri_thd2 = 0, dfs_pri_thd3 = 0;
+	u8 dfs_pri_thd4 = 0, dfs_pri_thd5 = 0;
+	u8 pri_th = 0, i = 0;
+	u8 max_pri_idx = 0, max_pw_idx = 0, max_pri_cnt_th = 0;
+	u8 max_pri_cnt_fcc_g1_th = 0, max_pri_cnt_fcc_g3_th = 0;
+	u8 safe_pri_pw_diff_th = 0, safe_pri_pw_diff_fcc_th = 0;
+	u8 safe_pri_pw_diff_w53_th = 0, safe_pri_pw_diff_fcc_idle_th = 0;
+	u16 j = 0;
+	u32 dfs_hist1_peak_index = 0, dfs_hist2_peak_index = 0;
+	u32 dfs_hist1_pw = 0, dfs_hist2_pw = 0, g_pw[6] = {0};
+	u32 g_peakindex[16] = {0}, g_mask_32 = 0, false_peak_hist1 = 0;
+	u32 false_peak_hist2_above10 = 0, false_peak_hist2_above0 = 0;
+	u32 dfs_hist1_pri = 0, dfs_hist2_pri = 0, g_pri[6] = {0};
+	u32 pw_sum_g0g5 = 0, pw_sum_g1g2g3g4 = 0;
+	u32 pri_sum_g0g5 = 0, pri_sum_g1g2g3g4 = 0;
+	u32 pw_sum_ss_g1g2g3g4 = 0, pri_sum_ss_g1g2g3g4 = 0;
+	u32 max_pri_cnt = 0, max_pw_cnt = 0;
+	#if (RTL8721D_SUPPORT)
+	if (dm->support_ic_type & (ODM_RTL8721D))
+		return;
+	#endif
+
+	/*read peak index hist report*/
+	odm_set_bb_reg(dm, 0x19e4, BIT(22) | BIT(23), 0x0);
+	dfs_hist1_peak_index = odm_get_bb_reg(dm, 0xf5c, 0xffffffff);
+	dfs_hist2_peak_index = odm_get_bb_reg(dm, 0xf74, 0xffffffff);
+
+	g_peakindex[15] = ((dfs_hist1_peak_index & 0x0000000f) >> 0);
+	g_peakindex[14] = ((dfs_hist1_peak_index & 0x000000f0) >> 4);
+	g_peakindex[13] = ((dfs_hist1_peak_index & 0x00000f00) >> 8);
+	g_peakindex[12] = ((dfs_hist1_peak_index & 0x0000f000) >> 12);
+	g_peakindex[11] = ((dfs_hist1_peak_index & 0x000f0000) >> 16);
+	g_peakindex[10] = ((dfs_hist1_peak_index & 0x00f00000) >> 20);
+	g_peakindex[9] = ((dfs_hist1_peak_index & 0x0f000000) >> 24);
+	g_peakindex[8] = ((dfs_hist1_peak_index & 0xf0000000) >> 28);
+	g_peakindex[7] = ((dfs_hist2_peak_index & 0x0000000f) >> 0);
+	g_peakindex[6] = ((dfs_hist2_peak_index & 0x000000f0) >> 4);
+	g_peakindex[5] = ((dfs_hist2_peak_index & 0x00000f00) >> 8);
+	g_peakindex[4] = ((dfs_hist2_peak_index & 0x0000f000) >> 12);
+	g_peakindex[3] = ((dfs_hist2_peak_index & 0x000f0000) >> 16);
+	g_peakindex[2] = ((dfs_hist2_peak_index & 0x00f00000) >> 20);
+	g_peakindex[1] = ((dfs_hist2_peak_index & 0x0f000000) >> 24);
+	g_peakindex[0] = ((dfs_hist2_peak_index & 0xf0000000) >> 28);
+
+	/*read pulse width hist report*/
+	odm_set_bb_reg(dm, 0x19e4, BIT(22) | BIT(23), 0x1);
+	dfs_hist1_pw = odm_get_bb_reg(dm, 0xf5c, 0xffffffff);
+	dfs_hist2_pw = odm_get_bb_reg(dm, 0xf74, 0xffffffff);
+
+	g_pw[0] = (unsigned int)((dfs_hist2_pw & 0xff000000) >> 24);
+	g_pw[1] = (unsigned int)((dfs_hist2_pw & 0x00ff0000) >> 16);
+	g_pw[2] = (unsigned int)((dfs_hist2_pw & 0x0000ff00) >> 8);
+	g_pw[3] = (unsigned int)dfs_hist2_pw & 0x000000ff;
+	g_pw[4] = (unsigned int)((dfs_hist1_pw & 0xff000000) >> 24);
+	g_pw[5] = (unsigned int)((dfs_hist1_pw & 0x00ff0000) >> 16);
+
+	/*read pulse repetition interval hist report*/
+	odm_set_bb_reg(dm, 0x19e4, BIT(22) | BIT(23), 0x3);
+	dfs_hist1_pri = odm_get_bb_reg(dm, 0xf5c, 0xffffffff);
+	dfs_hist2_pri = odm_get_bb_reg(dm, 0xf74, 0xffffffff);
+	odm_set_bb_reg(dm, 0x19b4, 0x10000000, 1); /*reset histo report*/
+	odm_set_bb_reg(dm, 0x19b4, 0x10000000, 0); /*@continue histo report*/
+
+	g_pri[0] = (unsigned int)((dfs_hist2_pri & 0xff000000) >> 24);
+	g_pri[1] = (unsigned int)((dfs_hist2_pri & 0x00ff0000) >> 16);
+	g_pri[2] = (unsigned int)((dfs_hist2_pri & 0x0000ff00) >> 8);
+	g_pri[3] = (unsigned int)dfs_hist2_pri & 0x000000ff;
+	g_pri[4] = (unsigned int)((dfs_hist1_pri & 0xff000000) >> 24);
+	g_pri[5] = (unsigned int)((dfs_hist1_pri & 0x00ff0000) >> 16);
+
+	dfs->pri_cond1 = 0;
+	dfs->pri_cond2 = 0;
+	dfs->pri_cond3 = 0;
+	dfs->pri_cond4 = 0;
+	dfs->pri_cond5 = 0;
+	dfs->pw_cond1 = 0;
+	dfs->pw_cond2 = 0;
+	dfs->pw_cond3 = 0;
+	dfs->pri_type3_4_cond1 = 0;	/*@for ETSI*/
+	dfs->pri_type3_4_cond2 = 0;	/*@for ETSI*/
+	dfs->pw_long_cond1 = 0;		/*@for long radar*/
+	dfs->pw_long_cond2 = 0;		/*@for long radar*/
+	dfs->pri_long_cond1 = 0;	/*@for long radar*/
+	dfs->pw_flag = 0;
+	dfs->pri_flag = 0;
+	dfs->pri_type3_4_flag = 0;	/*@for ETSI*/
+	dfs->long_radar_flag = 0;
+	dfs->pw_std = 0;	/*The std(var) of reasonable num of pw group*/
+	dfs->pri_std = 0;	/*The std(var) of reasonable num of pri group*/
+
+	for (i = 0; i < 6; i++) {
+		dfs->pw_hold_sum[i] = 0;
+		dfs->pri_hold_sum[i] = 0;
+		dfs->pw_long_hold_sum[i] = 0;
+		dfs->pri_long_hold_sum[i] = 0;
+	}
+
+	if (dfs->idle_mode == 1)
+		pri_th = dfs->pri_hist_th;
+	else
+		pri_th = dfs->pri_hist_th - 1;
+
+	for (i = 0; i < 6; i++) {
+		dfs->pw_hold[dfs->hist_idx][i] = (u8)g_pw[i];
+		dfs->pri_hold[dfs->hist_idx][i] = (u8)g_pri[i];
+		/*@collect whole histogram report may take some time
+		 *so we add the counter of 2 time slots in FCC and ETSI
+		 */
+		if (region_domain == 1 || region_domain == 3) {
+			dfs->pw_hold_sum[i] = dfs->pw_hold_sum[i] +
+				dfs->pw_hold[(dfs->hist_idx + 1) % 3][i] +
+				dfs->pw_hold[(dfs->hist_idx + 2) % 3][i];
+			dfs->pri_hold_sum[i] = dfs->pri_hold_sum[i] +
+				dfs->pri_hold[(dfs->hist_idx + 1) % 3][i] +
+				dfs->pri_hold[(dfs->hist_idx + 2) % 3][i];
+		} else{
+		/*@collect whole histogram report may take some time,
+		 *so we add the counter of 3 time slots in MKK or else
+		 */
+			dfs->pw_hold_sum[i] = dfs->pw_hold_sum[i] +
+				dfs->pw_hold[(dfs->hist_idx + 1) % 4][i] +
+				dfs->pw_hold[(dfs->hist_idx + 2) % 4][i] +
+				dfs->pw_hold[(dfs->hist_idx + 3) % 4][i];
+			dfs->pri_hold_sum[i] = dfs->pri_hold_sum[i] +
+				dfs->pri_hold[(dfs->hist_idx + 1) % 4][i] +
+				dfs->pri_hold[(dfs->hist_idx + 2) % 4][i] +
+				dfs->pri_hold[(dfs->hist_idx + 3) % 4][i];
+		}
+	}
+	/*@For long radar type*/
+	for (i = 0; i < 6; i++) {
+		dfs->pw_long_hold[dfs->hist_long_idx][i] = (u8)g_pw[i];
+		dfs->pri_long_hold[dfs->hist_long_idx][i] = (u8)g_pri[i];
+		/*@collect whole histogram report may take some time,
+		 *so we add the counter of 299 time slots for long radar
+		 */
+		for (j = 1; j < 300; j++) {
+		dfs->pw_long_hold_sum[i] = dfs->pw_long_hold_sum[i] +
+			dfs->pw_long_hold[(dfs->hist_long_idx + j) % 300][i];
+		dfs->pri_long_hold_sum[i] = dfs->pri_long_hold_sum[i] +
+			dfs->pri_long_hold[(dfs->hist_long_idx + j) % 300][i];
+		}
+	}
+	dfs->hist_idx++;
+	dfs->hist_long_idx++;
+	if (dfs->hist_long_idx == 300)
+		dfs->hist_long_idx = 0;
+	if (region_domain == 1 || region_domain == 3) {
+		if (dfs->hist_idx == 3)
+			dfs->hist_idx = 0;
+	} else if (dfs->hist_idx == 4) {
+		dfs->hist_idx = 0;
+	}
+
+	max_pri_cnt = 0;
+	max_pri_idx = 0;
+	max_pw_cnt = 0;
+	max_pw_idx = 0;
+	max_pri_cnt_th = dfs->pri_sum_g1_th;
+	max_pri_cnt_fcc_g1_th = dfs->pri_sum_g1_fcc_th;
+	max_pri_cnt_fcc_g3_th = dfs->pri_sum_g3_fcc_th;
+	safe_pri_pw_diff_th = dfs->pri_pw_diff_th;
+	safe_pri_pw_diff_fcc_th = dfs->pri_pw_diff_fcc_th;
+	safe_pri_pw_diff_fcc_idle_th = dfs->pri_pw_diff_fcc_idle_th;
+	safe_pri_pw_diff_w53_th = dfs->pri_pw_diff_w53_th;
+
+	/*@g1 to g4 is the reseasonable range of pri and pw*/
+	for (i = 1; i <= 4; i++) {
+		if (dfs->pri_hold_sum[i] > max_pri_cnt) {
+			max_pri_cnt = dfs->pri_hold_sum[i];
+			max_pri_idx = i;
+		}
+		if (dfs->pw_hold_sum[i] > max_pw_cnt) {
+			max_pw_cnt = dfs->pw_hold_sum[i];
+			max_pw_idx = i;
+		}
+		if (dfs->pri_hold_sum[i] >= pri_th)
+			dfs->pri_cond1 = 1;
+	}
+
+	pri_sum_g0g5 = dfs->pri_hold_sum[0];
+	if (pri_sum_g0g5 == 0)
+		pri_sum_g0g5 = 1;
+	pri_sum_g1g2g3g4 = dfs->pri_hold_sum[1] + dfs->pri_hold_sum[2]
+			 + dfs->pri_hold_sum[3] + dfs->pri_hold_sum[4];
+
+	/*pw will reduce because of dc, so we do not treat g0 as illegal group*/
+	pw_sum_g0g5 = dfs->pw_hold_sum[5];
+	if (pw_sum_g0g5 == 0)
+		pw_sum_g0g5 = 1;
+	pw_sum_g1g2g3g4 = dfs->pw_hold_sum[1] + dfs->pw_hold_sum[2] +
+				dfs->pw_hold_sum[3] + dfs->pw_hold_sum[4];
+
+	/*@Calculate the variation from g1 to g4*/
+	for (i = 1; i < 5; i++) {
+		/*Sum of square*/
+		pw_sum_ss_g1g2g3g4 = pw_sum_ss_g1g2g3g4 +
+		(dfs->pw_hold_sum[i] - (pw_sum_g1g2g3g4 / 4)) *
+		(dfs->pw_hold_sum[i] - (pw_sum_g1g2g3g4 / 4));
+		pri_sum_ss_g1g2g3g4 = pri_sum_ss_g1g2g3g4 +
+		(dfs->pri_hold_sum[i] - (pri_sum_g1g2g3g4 / 4)) *
+		(dfs->pri_hold_sum[i] - (pri_sum_g1g2g3g4 / 4));
+	}
+	/*The value may less than the normal variance,
+	 *since the variable type is int (not float)
+	 */
+		dfs->pw_std = (u16)(pw_sum_ss_g1g2g3g4 / 4);
+		dfs->pri_std = (u16)(pri_sum_ss_g1g2g3g4 / 4);
+
+	if (region_domain == 1) {
+		dfs->pri_type3_4_flag = 1;	/*@ETSI flag*/
+
+		/*PRI judgment conditions for short radar type*/
+		/*ratio of reasonable group and illegal group &&
+		 *pri variation of short radar should be large (=6)
+		 */
+		if (max_pri_idx != 4 && dfs->pri_hold_sum[5] > 0)
+			dfs->pri_cond2 = 0;
+		else
+			dfs->pri_cond2 = 1;
+
+		/*reasonable group shouldn't large*/
+		if ((pri_sum_g0g5 + pri_sum_g1g2g3g4) / pri_sum_g0g5 > 2 &&
+		    pri_sum_g1g2g3g4 <= dfs->pri_sum_safe_fcc_th)
+			dfs->pri_cond3 = 1;
+
+		/*@Cancel the condition that the abs between pri and pw*/
+		if (dfs->pri_std >= dfs->pri_std_th)
+			dfs->pri_cond4 = 1;
+		else if (max_pri_idx == 1 &&
+			 max_pri_cnt >= max_pri_cnt_fcc_g1_th)
+			dfs->pri_cond4 = 1;
+
+		/*we set threshold = 7 (>4) for distinguishing type 3,4 (g3)*/
+		if (max_pri_idx == 1 && dfs->pri_hold_sum[3] +
+		    dfs->pri_hold_sum[4] + dfs->pri_hold_sum[5] > 0)
+			dfs->pri_cond5 = 0;
+		else
+			dfs->pri_cond5 = 1;
+
+		if (dfs->pri_cond1 && dfs->pri_cond2 && dfs->pri_cond3 &&
+		    dfs->pri_cond4 && dfs->pri_cond5)
+			dfs->pri_flag = 1;
+
+		/* PW judgment conditions for short radar type */
+		/*ratio of reasonable and illegal group && g5 should be zero*/
+		if (((pw_sum_g0g5 + pw_sum_g1g2g3g4) / pw_sum_g0g5 > 2) &&
+		    (dfs->pw_hold_sum[5] <= 1))
+			dfs->pw_cond1 = 1;
+		/*unreasonable group*/
+		if (dfs->pw_hold_sum[4] == 0 && dfs->pw_hold_sum[5] == 0)
+			dfs->pw_cond2 = 1;
+		/*pw's std (short radar) should be large(=7)*/
+		if (dfs->pw_std >= dfs->pw_std_th)
+			dfs->pw_cond3 = 1;
+		if (dfs->pw_cond1 && dfs->pw_cond2 && dfs->pw_cond3)
+			dfs->pw_flag = 1;
+
+		/* @Judgment conditions of long radar type */
+		if (band_width == CHANNEL_WIDTH_20) {
+			if (dfs->pw_long_hold_sum[4] >=
+			    dfs->pw_long_lower_20m_th)
+				dfs->pw_long_cond1 = 1;
+		} else{
+			if (dfs->pw_long_hold_sum[4] >= dfs->pw_long_lower_th)
+				dfs->pw_long_cond1 = 1;
+		}
+		/* @Disable the condition that dfs->pw_long_hold_sum[1] */
+		if (dfs->pw_long_hold_sum[2] + dfs->pw_long_hold_sum[3] +
+		    dfs->pw_long_hold_sum[4] <= dfs->pw_long_sum_upper_th &&
+		    dfs->pw_long_hold_sum[2] <= dfs->pw_long_hold_sum[4] &&
+		    dfs->pw_long_hold_sum[3] <= dfs->pw_long_hold_sum[4])
+			dfs->pw_long_cond2 = 1;
+		/*@g4 should be large for long radar*/
+		if (dfs->pri_long_hold_sum[4] <= dfs->pri_long_upper_th)
+			dfs->pri_long_cond1 = 1;
+		if (dfs->pw_long_cond1 && dfs->pw_long_cond2 &&
+		    dfs->pri_long_cond1)
+			dfs->long_radar_flag = 1;
+	} else if (region_domain == 2) {
+		dfs->pri_type3_4_flag = 1;	/*@ETSI flag*/
+
+		/*PRI judgment conditions for short radar type*/
+		if ((pri_sum_g0g5 + pri_sum_g1g2g3g4) / pri_sum_g0g5 > 2)
+			dfs->pri_cond2 = 1;
+
+		/*reasonable group shouldn't too large*/
+		if (pri_sum_g1g2g3g4 <= dfs->pri_sum_safe_fcc_th)
+			dfs->pri_cond3 = 1;
+
+		/*Cancel the abs diff between pri and pw for idle mode (thr=2)*/
+		dfs->pri_cond4 = 1;
+
+		if (dfs->idle_mode == 1) {
+			if (dfs->pri_std >= dfs->pri_std_idle_th) {
+				if (max_pw_idx == 3 &&
+				    pri_sum_g1g2g3g4 <= dfs->pri_sum_type4_th){
+		/*To distinguish between type 4 radar and false detection*/
+					dfs->pri_cond5 = 1;
+				} else if (max_pw_idx == 1 &&
+					   pri_sum_g1g2g3g4 >=
+					   dfs->pri_sum_type6_th) {
+		/*To distinguish between type 6 radar and false detection*/
+					dfs->pri_cond5 = 1;
+				} else {
+		/*pri variation of short radar should be large (idle mode)*/
+					dfs->pri_cond5 = 1;
+				}
+			}
+		} else {
+		/*pri variation of short radar should be large (TP mode)*/
+			if (dfs->pri_std >= dfs->pri_std_th)
+				dfs->pri_cond5 = 1;
+		}
+
+		if (dfs->pri_cond1 && dfs->pri_cond2 && dfs->pri_cond3 &&
+		    dfs->pri_cond4 && dfs->pri_cond5)
+			dfs->pri_flag = 1;
+
+		/* PW judgment conditions for short radar type */
+		if (((pw_sum_g0g5 + pw_sum_g1g2g3g4) / pw_sum_g0g5 > 2) &&
+		    (dfs->pw_hold_sum[5] <= 1))
+		/*ratio of reasonable and illegal group && g5 should be zero*/
+			dfs->pw_cond1 = 1;
+
+		if ((c_channel >= 52) && (c_channel <= 64))
+			dfs->pw_cond2 = 1;
+		/*unreasonable group shouldn't too large*/
+		else if (dfs->pw_hold_sum[0] <= dfs->pw_g0_th)
+			dfs->pw_cond2 = 1;
+
+		if (dfs->idle_mode == 1) {
+		/*pw variation of short radar should be large (idle mode)*/
+			if (dfs->pw_std >= dfs->pw_std_idle_th)
+				dfs->pw_cond3 = 1;
+		} else {
+		/*pw variation of short radar should be large (TP mode)*/
+			if (dfs->pw_std >= dfs->pw_std_th)
+				dfs->pw_cond3 = 1;
+		}
+		if (dfs->pw_cond1 && dfs->pw_cond2 && dfs->pw_cond3)
+			dfs->pw_flag = 1;
+
+		/* @Judgment conditions of long radar type */
+		if (band_width == CHANNEL_WIDTH_20) {
+			if (dfs->pw_long_hold_sum[4] >=
+			    dfs->pw_long_lower_20m_th)
+				dfs->pw_long_cond1 = 1;
+		} else{
+			if (dfs->pw_long_hold_sum[4] >= dfs->pw_long_lower_th)
+				dfs->pw_long_cond1 = 1;
+		}
+		if (dfs->pw_long_hold_sum[1] + dfs->pw_long_hold_sum[2] +
+		    dfs->pw_long_hold_sum[3] + dfs->pw_long_hold_sum[4]
+		    <= dfs->pw_long_sum_upper_th)
+			dfs->pw_long_cond2 = 1;
+		/*@g4 should be large for long radar*/
+		if (dfs->pri_long_hold_sum[4] <= dfs->pri_long_upper_th)
+			dfs->pri_long_cond1 = 1;
+		if (dfs->pw_long_cond1 &&
+		    dfs->pw_long_cond2 && dfs->pri_long_cond1)
+			dfs->long_radar_flag = 1;
+	} else if (region_domain == 3) {
+		/*ratio of reasonable group and illegal group */
+		if ((pri_sum_g0g5 + pri_sum_g1g2g3g4) / pri_sum_g0g5 > 2)
+			dfs->pri_cond2 = 1;
+
+		if (pri_sum_g1g2g3g4 <= dfs->pri_sum_safe_th)
+			dfs->pri_cond3 = 1;
+
+		/*@Cancel the condition that the abs between pri and pw*/
+			dfs->pri_cond4 = 1;
+
+		if (dfs->pri_hold_sum[5] <= dfs->pri_sum_g5_th)
+			dfs->pri_cond5 = 1;
+
+		if (band_width == CHANNEL_WIDTH_40) {
+			if (max_pw_idx == 4) {
+				if (max_pw_cnt >= dfs->type4_pw_max_cnt &&
+				    pri_sum_g1g2g3g4 >=
+				    dfs->type4_safe_pri_sum_th) {
+					dfs->pri_cond1 = 1;
+					dfs->pri_cond4 = 1;
+					dfs->pri_type3_4_cond1 = 1;
+				}
+			}
+		}
+
+		if (dfs->pri_cond1 && dfs->pri_cond2 &&
+		    dfs->pri_cond3 && dfs->pri_cond4 && dfs->pri_cond5)
+			dfs->pri_flag = 1;
+
+		if (((pw_sum_g0g5 + pw_sum_g1g2g3g4) / pw_sum_g0g5 > 2))
+			dfs->pw_flag = 1;
+
+		/*@max num pri group is g1 means radar type3 or type4*/
+		if (max_pri_idx == 1) {
+			if (max_pri_cnt >= max_pri_cnt_th)
+				dfs->pri_type3_4_cond1 = 1;
+			if (dfs->pri_hold_sum[4] <=
+			    dfs->pri_sum_g5_under_g1_th &&
+			    dfs->pri_hold_sum[5] <= dfs->pri_sum_g5_under_g1_th)
+				dfs->pri_type3_4_cond2 = 1;
+		} else {
+			dfs->pri_type3_4_cond1 = 1;
+			dfs->pri_type3_4_cond2 = 1;
+		}
+		if (dfs->pri_type3_4_cond1 && dfs->pri_type3_4_cond2)
+			dfs->pri_type3_4_flag = 1;
+	} else {
+	}
+
+	if (dfs->print_hist_rpt) {
+		dfs_pw_thd1 = (u8)odm_get_bb_reg(dm, 0x19e4, 0xff000000);
+		dfs_pw_thd2 = (u8)odm_get_bb_reg(dm, 0x19e8, 0x000000ff);
+		dfs_pw_thd3 = (u8)odm_get_bb_reg(dm, 0x19e8, 0x0000ff00);
+		dfs_pw_thd4 = (u8)odm_get_bb_reg(dm, 0x19e8, 0x00ff0000);
+		dfs_pw_thd5 = (u8)odm_get_bb_reg(dm, 0x19e8, 0xff000000);
+
+		dfs_pri_thd1 = (u8)odm_get_bb_reg(dm, 0x19b8, 0x7F80);
+		dfs_pri_thd2 = (u8)odm_get_bb_reg(dm, 0x19ec, 0x000000ff);
+		dfs_pri_thd3 = (u8)odm_get_bb_reg(dm, 0x19ec, 0x0000ff00);
+		dfs_pri_thd4 = (u8)odm_get_bb_reg(dm, 0x19ec, 0x00ff0000);
+		dfs_pri_thd5 = (u8)odm_get_bb_reg(dm, 0x19ec, 0xff000000);
+
+		PHYDM_DBG(dm, DBG_DFS, "peak index hist\n");
+		PHYDM_DBG(dm, DBG_DFS, "dfs_hist_peak_index=%x %x\n",
+			  dfs_hist1_peak_index, dfs_hist2_peak_index);
+		PHYDM_DBG(dm, DBG_DFS, "g_peak_index_hist = ");
+		for (i = 0; i < 16; i++)
+			PHYDM_DBG(dm, DBG_DFS, " %x", g_peakindex[i]);
+		PHYDM_DBG(dm, DBG_DFS, "\ndfs_pw_thd=%d %d %d %d %d\n",
+			  dfs_pw_thd1, dfs_pw_thd2, dfs_pw_thd3,
+			  dfs_pw_thd4, dfs_pw_thd5);
+		PHYDM_DBG(dm, DBG_DFS, "-----pulse width hist-----\n");
+		PHYDM_DBG(dm, DBG_DFS, "dfs_hist_pw=%x %x\n",
+			  dfs_hist1_pw, dfs_hist2_pw);
+		PHYDM_DBG(dm, DBG_DFS, "g_pw_hist = %x %x %x %x %x %x\n",
+			  g_pw[0], g_pw[1], g_pw[2], g_pw[3],
+			  g_pw[4], g_pw[5]);
+		PHYDM_DBG(dm, DBG_DFS, "dfs_pri_thd=%d %d %d %d %d\n",
+			  dfs_pri_thd1, dfs_pri_thd2, dfs_pri_thd3,
+			  dfs_pri_thd4, dfs_pri_thd5);
+		PHYDM_DBG(dm, DBG_DFS, "-----pulse interval hist-----\n");
+		PHYDM_DBG(dm, DBG_DFS, "dfs_hist_pri=%x %x\n",
+			  dfs_hist1_pri, dfs_hist2_pri);
+		PHYDM_DBG(dm, DBG_DFS,
+			  "g_pri_hist = %x %x %x %x %x %x, pw_flag = %d, pri_flag = %d\n",
+			  g_pri[0], g_pri[1], g_pri[2], g_pri[3], g_pri[4],
+			  g_pri[5], dfs->pw_flag, dfs->pri_flag);
+		if (region_domain == 1 || region_domain == 3) {
+			PHYDM_DBG(dm, DBG_DFS, "hist_idx= %d\n",
+				  (dfs->hist_idx + 2) % 3);
+		} else {
+			PHYDM_DBG(dm, DBG_DFS, "hist_idx= %d\n",
+				  (dfs->hist_idx + 3) % 4);
+		}
+		PHYDM_DBG(dm, DBG_DFS, "hist_long_idx= %d\n",
+			  (dfs->hist_long_idx + 299) % 300);
+		PHYDM_DBG(dm, DBG_DFS,
+			  "pw_sum_g0g5 = %d, pw_sum_g1g2g3g4 = %d\n",
+			  pw_sum_g0g5, pw_sum_g1g2g3g4);
+		PHYDM_DBG(dm, DBG_DFS,
+			  "pri_sum_g0g5 = %d, pri_sum_g1g2g3g4 = %d\n",
+			  pri_sum_g0g5, pri_sum_g1g2g3g4);
+		PHYDM_DBG(dm, DBG_DFS, "pw_hold_sum = %d %d %d %d %d %d\n",
+			  dfs->pw_hold_sum[0], dfs->pw_hold_sum[1],
+			  dfs->pw_hold_sum[2], dfs->pw_hold_sum[3],
+			  dfs->pw_hold_sum[4], dfs->pw_hold_sum[5]);
+		PHYDM_DBG(dm, DBG_DFS, "pri_hold_sum = %d %d %d %d %d %d\n",
+			  dfs->pri_hold_sum[0], dfs->pri_hold_sum[1],
+			  dfs->pri_hold_sum[2], dfs->pri_hold_sum[3],
+			  dfs->pri_hold_sum[4], dfs->pri_hold_sum[5]);
+		PHYDM_DBG(dm, DBG_DFS, "pw_long_hold_sum = %d %d %d %d %d %d\n",
+			  dfs->pw_long_hold_sum[0], dfs->pw_long_hold_sum[1],
+			  dfs->pw_long_hold_sum[2], dfs->pw_long_hold_sum[3],
+			  dfs->pw_long_hold_sum[4], dfs->pw_long_hold_sum[5]);
+		PHYDM_DBG(dm, DBG_DFS,
+			  "pri_long_hold_sum = %d %d %d %d %d %d\n",
+			  dfs->pri_long_hold_sum[0], dfs->pri_long_hold_sum[1],
+			  dfs->pri_long_hold_sum[2], dfs->pri_long_hold_sum[3],
+			  dfs->pri_long_hold_sum[4], dfs->pri_long_hold_sum[5]);
+		PHYDM_DBG(dm, DBG_DFS, "idle_mode = %d\n", dfs->idle_mode);
+		PHYDM_DBG(dm, DBG_DFS, "pw_standard = %d\n", dfs->pw_std);
+		PHYDM_DBG(dm, DBG_DFS, "pri_standard = %d\n", dfs->pri_std);
+		for (j = 0; j < 4; j++) {
+			for (i = 0; i < 6; i++) {
+				PHYDM_DBG(dm, DBG_DFS, "pri_hold = %d ",
+					  dfs->pri_hold[j][i]);
+			}
+			PHYDM_DBG(dm, DBG_DFS, "\n");
+		}
+		PHYDM_DBG(dm, DBG_DFS, "\n");
+		PHYDM_DBG(dm, DBG_DFS,
+			  "pri_cond1 = %d, pri_cond2 = %d, pri_cond3 = %d, pri_cond4 = %d, pri_cond5 = %d\n",
+			  dfs->pri_cond1, dfs->pri_cond2, dfs->pri_cond3,
+			  dfs->pri_cond4, dfs->pri_cond5);
+		PHYDM_DBG(dm, DBG_DFS,
+			  "bandwidth = %d, pri_th = %d, max_pri_cnt_th = %d, safe_pri_pw_diff_th = %d\n",
+			  band_width, pri_th, max_pri_cnt_th,
+			  safe_pri_pw_diff_th);
+	}
+}
 
+boolean phydm_dfs_hist_log(void *dm_void, u8 index)
+{
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct _DFS_STATISTICS *dfs = &dm->dfs;
+	u8 i = 0, j = 0;
+	boolean hist_radar_detected = 0;
+
+	if (dfs->pulse_type_hist[index] == 0) {
+		dfs->radar_type = 0;
+		if (dfs->pw_flag && dfs->pri_flag &&
+		    dfs->pri_type3_4_flag) {
+			hist_radar_detected = 1;
+			PHYDM_DBG(dm, DBG_DFS,
+				  "Detected type %d radar signal!\n",
+				  dfs->radar_type);
+			if (dfs->det_print2) {
+				PHYDM_DBG(dm, DBG_DFS,
+					  "hist_idx= %d\n",
+					  (dfs->hist_idx + 3) % 4);
+				for (j = 0; j < 4; j++) {
+				for (i = 0; i < 6; i++) {
+					PHYDM_DBG(dm, DBG_DFS,
+						  "pri_hold = %d ",
+						  dfs->pri_hold[j][i]);
+				}
+				PHYDM_DBG(dm, DBG_DFS, "\n");
+				}
+				PHYDM_DBG(dm, DBG_DFS, "\n");
+				for (j = 0; j < 4; j++) {
+				for (i = 0; i < 6; i++) {
+					PHYDM_DBG(dm, DBG_DFS, "pw_hold = %d ",
+						  dfs->pw_hold[j][i]);
+				}
+					PHYDM_DBG(dm, DBG_DFS, "\n");
+				}
+				PHYDM_DBG(dm, DBG_DFS, "\n");
+				PHYDM_DBG(dm, DBG_DFS, "idle_mode = %d\n",
+					  dfs->idle_mode);
+				PHYDM_DBG(dm, DBG_DFS,
+					  "pw_hold_sum = %d %d %d %d %d %d\n",
+					  dfs->pw_hold_sum[0],
+					  dfs->pw_hold_sum[1],
+					  dfs->pw_hold_sum[2],
+					  dfs->pw_hold_sum[3],
+					  dfs->pw_hold_sum[4],
+					  dfs->pw_hold_sum[5]);
+				PHYDM_DBG(dm, DBG_DFS,
+					  "pri_hold_sum = %d %d %d %d %d %d\n",
+					  dfs->pri_hold_sum[0],
+					  dfs->pri_hold_sum[1],
+					  dfs->pri_hold_sum[2],
+					  dfs->pri_hold_sum[3],
+					  dfs->pri_hold_sum[4],
+					  dfs->pri_hold_sum[5]);
+			}
+		} else {
+		if (dfs->det_print2) {
+			if (dfs->pulse_flag_hist[index] &&
+			    dfs->pri_flag == 0) {
+				PHYDM_DBG(dm, DBG_DFS, "pri_variation = %d\n",
+					  dfs->pri_std);
+				PHYDM_DBG(dm, DBG_DFS,
+					  "PRI criterion is not satisfied!\n");
+				if (dfs->pri_cond1 == 0)
+					PHYDM_DBG(dm, DBG_DFS,
+						  "pri_cond1 is not satisfied!\n");
+				if (dfs->pri_cond2 == 0)
+					PHYDM_DBG(dm, DBG_DFS,
+						  "pri_cond2 is not satisfied!\n");
+				if (dfs->pri_cond3 == 0)
+					PHYDM_DBG(dm, DBG_DFS,
+						  "pri_cond3 is not satisfied!\n");
+				if (dfs->pri_cond4 == 0)
+					PHYDM_DBG(dm, DBG_DFS,
+						  "pri_cond4 is not satisfied!\n");
+				if (dfs->pri_cond5 == 0)
+					PHYDM_DBG(dm, DBG_DFS,
+						  "pri_cond5 is not satisfied!\n");
+			}
+			if (dfs->pulse_flag_hist[index] &&
+			    dfs->pw_flag == 0) {
+				PHYDM_DBG(dm, DBG_DFS, "pw_variation = %d\n",
+					  dfs->pw_std);
+				PHYDM_DBG(dm, DBG_DFS,
+					  "PW criterion is not satisfied!\n");
+				if (dfs->pw_cond1 == 0)
+					PHYDM_DBG(dm, DBG_DFS,
+						  "pw_cond1 is not satisfied!\n");
+				if (dfs->pw_cond2 == 0)
+					PHYDM_DBG(dm, DBG_DFS,
+						  "pw_cond2 is not satisfied!\n");
+				if (dfs->pw_cond3 == 0)
+					PHYDM_DBG(dm, DBG_DFS,
+						  "pw_cond3 is not satisfied!\n");
+			}
+			if (dfs->pulse_flag_hist[index] &&
+			    (dfs->pri_type3_4_flag == 0)) {
+				PHYDM_DBG(dm, DBG_DFS,
+					  "pri_type3_4 criterion is not satisfied!\n");
+				if (dfs->pri_type3_4_cond1 == 0)
+					PHYDM_DBG(dm, DBG_DFS,
+						  "pri_type3_4_cond1 is not satisfied!\n");
+				if (dfs->pri_type3_4_cond2 == 0)
+					PHYDM_DBG(dm, DBG_DFS,
+						  "pri_type3_4_cond2 is not satisfied!\n");
+			}
+			PHYDM_DBG(dm, DBG_DFS, "hist_idx= %d\n",
+				  (dfs->hist_idx + 3) % 4);
+			for (j = 0; j < 4; j++) {
+				for (i = 0; i < 6; i++) {
+					PHYDM_DBG(dm, DBG_DFS,
+						  "pri_hold = %d ",
+						  dfs->pri_hold[j][i]);
+				}
+				PHYDM_DBG(dm, DBG_DFS, "\n");
+			}
+			PHYDM_DBG(dm, DBG_DFS, "\n");
+			for (j = 0; j < 4; j++) {
+				for (i = 0; i < 6; i++)
+					PHYDM_DBG(dm, DBG_DFS,
+						  "pw_hold = %d ",
+						  dfs->pw_hold[j][i]);
+				PHYDM_DBG(dm, DBG_DFS, "\n");
+			}
+			PHYDM_DBG(dm, DBG_DFS, "\n");
+			PHYDM_DBG(dm, DBG_DFS, "idle_mode = %d\n",
+				  dfs->idle_mode);
+			PHYDM_DBG(dm, DBG_DFS,
+				  "pw_hold_sum = %d %d %d %d %d %d\n",
+				  dfs->pw_hold_sum[0], dfs->pw_hold_sum[1],
+				  dfs->pw_hold_sum[2], dfs->pw_hold_sum[3],
+				  dfs->pw_hold_sum[4], dfs->pw_hold_sum[5]);
+			PHYDM_DBG(dm, DBG_DFS,
+				  "pri_hold_sum = %d %d %d %d %d %d\n",
+				  dfs->pri_hold_sum[0], dfs->pri_hold_sum[1],
+				  dfs->pri_hold_sum[2], dfs->pri_hold_sum[3],
+				  dfs->pri_hold_sum[4], dfs->pri_hold_sum[5]);
+		}
+		}
+	} else {
+		dfs->radar_type = 1;
+		if (dfs->det_print2) {
+			PHYDM_DBG(dm, DBG_DFS, "\n");
+			PHYDM_DBG(dm, DBG_DFS, "idle_mode = %d\n",
+				  dfs->idle_mode);
+			PHYDM_DBG(dm, DBG_DFS,
+				  "long_radar_pw_hold_sum = %d %d %d %d %d %d\n",
+				  dfs->pw_long_hold_sum[0],
+				  dfs->pw_long_hold_sum[1],
+				  dfs->pw_long_hold_sum[2],
+				  dfs->pw_long_hold_sum[3],
+				  dfs->pw_long_hold_sum[4],
+				  dfs->pw_long_hold_sum[5]);
+			PHYDM_DBG(dm, DBG_DFS,
+				  "long_radar_pri_hold_sum = %d %d %d %d %d %d\n",
+				  dfs->pri_long_hold_sum[0],
+				  dfs->pri_long_hold_sum[1],
+				  dfs->pri_long_hold_sum[2],
+				  dfs->pri_long_hold_sum[3],
+				  dfs->pri_long_hold_sum[4],
+				  dfs->pri_long_hold_sum[5]);
+		}
+		/* @Long radar should satisfy three conditions */
+		if (dfs->long_radar_flag == 1) {
+			hist_radar_detected = 1;
+			PHYDM_DBG(dm, DBG_DFS,
+				  "Detected type %d radar signal!\n",
+				  dfs->radar_type);
+		} else {
+			if (dfs->det_print2) {
+				if (dfs->pw_long_cond1 == 0)
+					PHYDM_DBG(dm, DBG_DFS,
+						  "--pw_long_cond1 is not satisfied!--\n");
+				if (dfs->pw_long_cond2 == 0)
+					PHYDM_DBG(dm, DBG_DFS,
+						  "--pw_long_cond2 is not satisfied!--\n");
+				if (dfs->pri_long_cond1 == 0)
+					PHYDM_DBG(dm, DBG_DFS,
+						  "--pri_long_cond1 is not satisfied!--\n");
+			}
+		}
+	}
+	return hist_radar_detected;
 }
 
-boolean phydm_radar_detect(void *p_dm_void)
+boolean phydm_radar_detect(void *dm_void)
 {
-	struct PHY_DM_STRUCT *p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	struct _DFS_STATISTICS	*p_dfs = (struct _DFS_STATISTICS *)phydm_get_structure(p_dm, PHYDM_DFS);
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct _DFS_STATISTICS *dfs = &dm->dfs;
 	boolean enable_DFS = false;
 	boolean radar_detected = false;
 
-	p_dfs->igi_cur = (u8)odm_get_bb_reg(p_dm, 0xc50, 0x0000007f);
-
-	p_dfs->st_l2h_cur = (u8)odm_get_bb_reg(p_dm, 0x91c, 0x000000ff);
+	if (dm->support_ic_type & ODM_IC_JGR3_SERIES) {
+		dfs->igi_cur = (u8)odm_get_bb_reg(dm, R_0x1d70, 0x0000007f);
+		dfs->st_l2h_cur = (u8)odm_get_bb_reg(dm, R_0xa40, 0x00007f00);
+	#if (RTL8721D_SUPPORT)
+	} else if (dm->support_ic_type & (ODM_RTL8721D)) {
+		dfs->st_l2h_cur = (u8)(odm_get_bb_reg(dm, R_0xf54,
+						      0x0000001f) << 2);
+		dfs->st_l2h_cur += (u8)odm_get_bb_reg(dm, R_0xf58, 0xc0000000);
+	#endif
+	} else {
+		dfs->igi_cur = (u8)odm_get_bb_reg(dm, R_0xc50, 0x0000007f);
+		dfs->st_l2h_cur = (u8)odm_get_bb_reg(dm, R_0x91c, 0x000000ff);
+	}
 
-	/* dynamic pwdb calibration */
-	if (p_dfs->igi_pre != p_dfs->igi_cur) {
-		p_dfs->pwdb_th = ((int)p_dfs->st_l2h_cur - (int)p_dfs->igi_cur)/2 + p_dfs->pwdb_scalar_factor;
-		p_dfs->pwdb_th = MAX_2(p_dfs->pwdb_th_cur, (int)p_dfs->pwdb_th); /* limit the pwdb value to absoulte lower bound 0xa */
-		p_dfs->pwdb_th = MIN_2(p_dfs->pwdb_th_cur, 0x1f);    /* limit the pwdb value to absoulte upper bound 0x1f */
-		odm_set_bb_reg(p_dm,  0x918, 0x00001f00, p_dfs->pwdb_th);
+	/* @dynamic pwdb calibration */
+	if (dfs->igi_pre != dfs->igi_cur) {
+		dfs->pwdb_th_cur = ((int)dfs->st_l2h_cur - (int)dfs->igi_cur)
+				    / 2 + dfs->pwdb_scalar_factor;
+
+		/* @limit the pwdb value to absolute lower bound 0xa */
+		dfs->pwdb_th_cur = MAX_2(dfs->pwdb_th_cur, (int)dfs->pwdb_th);
+		/* @limit the pwdb value to absolute upper bound 0x1f */
+		dfs->pwdb_th_cur = MIN_2(dfs->pwdb_th_cur, 0x1f);
+
+		if (dm->support_ic_type & ODM_IC_JGR3_SERIES)
+			odm_set_bb_reg(dm, R_0xa50, 0x000000f0,
+				       dfs->pwdb_th_cur);
+		#if (RTL8721D_SUPPORT)
+		else if (dm->support_ic_type & (ODM_RTL8721D))
+			odm_set_bb_reg(dm, R_0xf70, 0x03c00000,
+				       dfs->pwdb_th_cur);
+		#endif
+		else
+			odm_set_bb_reg(dm, R_0x918, 0x00001f00,
+				       dfs->pwdb_th_cur);
 	}
 
-	p_dfs->igi_pre = p_dfs->igi_cur;
+	dfs->igi_pre = dfs->igi_cur;
 
-	phydm_dfs_dynamic_setting(p_dm);
-	radar_detected = phydm_radar_detect_dm_check(p_dm);
+	phydm_dfs_dynamic_setting(dm);
+	phydm_dfs_histogram_radar_distinguish(dm);
+	radar_detected = phydm_radar_detect_dm_check(dm);
 
-	if (odm_get_bb_reg(p_dm, 0x924, BIT(15)))
-		enable_DFS = true;
+	if (dm->support_ic_type & ODM_IC_JGR3_SERIES) {
+		if (odm_get_bb_reg(dm, R_0xa40, BIT(15)))
+			enable_DFS = true;
+	#if (RTL8721D_SUPPORT)
+	} else if (dm->support_ic_type & (ODM_RTL8721D)) {
+		if (odm_get_bb_reg(dm, R_0xf58, BIT(29)))
+			enable_DFS = true;
+	#endif
+	} else {
+		if (odm_get_bb_reg(dm, R_0x924, BIT(15)))
+			enable_DFS = true;
+	}
 
 	if (enable_DFS && radar_detected) {
-		PHYDM_DBG(p_dm, DBG_DFS, ("Radar detect: enable_DFS:%d, radar_detected:%d\n", enable_DFS, radar_detected));
-		phydm_radar_detect_reset(p_dm);
-                if (p_dfs->dbg_mode == 1){
-			PHYDM_DBG(p_dm, DBG_DFS, ("Radar is detected in DFS dbg mode.\n"));
+		PHYDM_DBG(dm, DBG_DFS,
+			  "Radar detect: enable_DFS:%d, radar_detected:%d\n",
+			  enable_DFS, radar_detected);
+		phydm_radar_detect_reset(dm);
+		if (dfs->dbg_mode == 1) {
+			PHYDM_DBG(dm, DBG_DFS,
+				  "Radar is detected in DFS dbg mode.\n");
 			radar_detected = 0;
 		}
 	}
 
+	if (enable_DFS && dfs->sw_trigger_mode == 1) {
+		radar_detected = 1;
+		PHYDM_DBG(dm, DBG_DFS,
+			  "Radar is detected in DFS SW trigger mode.\n");
+	}
+
 	return enable_DFS && radar_detected;
 }
 
+void phydm_dfs_hist_dbg(void *dm_void, char input[][16], u32 *_used,
+			char *output, u32 *_out_len)
+{
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct _DFS_STATISTICS *dfs = &dm->dfs;
+	char help[] = "-h";
+	u32 argv[30] = {0};
+	u32 used = *_used;
+	u32 out_len = *_out_len;
+	u8 i;
 
-void
-phydm_dfs_debug(
-	void		*p_dm_void,
-	u32		*const argv,
-	u32		*_used,
-	char		*output,
-	u32		*_out_len
-)
+	if ((strcmp(input[1], help) == 0)) {
+		PDM_SNPF(out_len, used, output + used, out_len - used,
+			 "{0} pri_hist_th = %d\n", dfs->pri_hist_th);
+		PDM_SNPF(out_len, used, output + used, out_len - used,
+			 "{1} pri_sum_g1_th = %d\n", dfs->pri_sum_g1_th);
+		PDM_SNPF(out_len, used, output + used, out_len - used,
+			 "{2} pri_sum_g5_th = %d\n", dfs->pri_sum_g5_th);
+		PDM_SNPF(out_len, used, output + used, out_len - used,
+			 "{3} pri_sum_g1_fcc_th = %d\n",
+			 dfs->pri_sum_g1_fcc_th);
+		PDM_SNPF(out_len, used, output + used, out_len - used,
+			 "{4} pri_sum_g3_fcc_th = %d\n",
+			 dfs->pri_sum_g3_fcc_th);
+		PDM_SNPF(out_len, used, output + used, out_len - used,
+			 "{5} pri_sum_safe_fcc_th = %d\n",
+			 dfs->pri_sum_safe_fcc_th);
+		PDM_SNPF(out_len, used, output + used, out_len - used,
+			 "{6} pri_sum_type4_th = %d\n", dfs->pri_sum_type4_th);
+		PDM_SNPF(out_len, used, output + used, out_len - used,
+			 "{7} pri_sum_type6_th = %d\n", dfs->pri_sum_type6_th);
+		PDM_SNPF(out_len, used, output + used, out_len - used,
+			 "{8} pri_sum_safe_th = %d\n", dfs->pri_sum_safe_th);
+		PDM_SNPF(out_len, used, output + used, out_len - used,
+			 "{9} pri_sum_g5_under_g1_th = %d\n",
+			 dfs->pri_sum_g5_under_g1_th);
+		PDM_SNPF(out_len, used, output + used, out_len - used,
+			 "{10} pri_pw_diff_th = %d\n", dfs->pri_pw_diff_th);
+		PDM_SNPF(out_len, used, output + used, out_len - used,
+			 "{11} pri_pw_diff_fcc_th = %d\n",
+			 dfs->pri_pw_diff_fcc_th);
+		PDM_SNPF(out_len, used, output + used, out_len - used,
+			 "{12} pri_pw_diff_fcc_idle_th = %d\n",
+			 dfs->pri_pw_diff_fcc_idle_th);
+		PDM_SNPF(out_len, used, output + used, out_len - used,
+			 "{13} pri_pw_diff_w53_th = %d\n",
+			 dfs->pri_pw_diff_w53_th);
+		PDM_SNPF(out_len, used, output + used, out_len - used,
+			 "{14} pri_type1_low_fcc_th = %d\n",
+			 dfs->pri_type1_low_fcc_th);
+		PDM_SNPF(out_len, used, output + used, out_len - used,
+			 "{15} pri_type1_upp_fcc_th = %d\n",
+			 dfs->pri_type1_upp_fcc_th);
+		PDM_SNPF(out_len, used, output + used, out_len - used,
+			 "{16} pri_type1_cen_fcc_th = %d\n",
+			 dfs->pri_type1_cen_fcc_th);
+		PDM_SNPF(out_len, used, output + used, out_len - used,
+			 "{17} pw_g0_th = %d\n", dfs->pw_g0_th);
+		PDM_SNPF(out_len, used, output + used, out_len - used,
+			 "{18} pw_long_lower_20m_th = %d\n",
+			 dfs->pw_long_lower_20m_th);
+		PDM_SNPF(out_len, used, output + used, out_len - used,
+			 "{19} pw_long_lower_th = %d\n",
+			 dfs->pw_long_lower_th);
+		PDM_SNPF(out_len, used, output + used, out_len - used,
+			 "{20} pri_long_upper_th = %d\n",
+			 dfs->pri_long_upper_th);
+		PDM_SNPF(out_len, used, output + used, out_len - used,
+			 "{21} pw_long_sum_upper_th = %d\n",
+			 dfs->pw_long_sum_upper_th);
+		PDM_SNPF(out_len, used, output + used, out_len - used,
+			 "{22} pw_std_th = %d\n", dfs->pw_std_th);
+		PDM_SNPF(out_len, used, output + used, out_len - used,
+			 "{23} pw_std_idle_th = %d\n", dfs->pw_std_idle_th);
+		PDM_SNPF(out_len, used, output + used, out_len - used,
+			 "{24} pri_std_th = %d\n", dfs->pri_std_th);
+		PDM_SNPF(out_len, used, output + used, out_len - used,
+			 "{25} pri_std_idle_th = %d\n", dfs->pri_std_idle_th);
+		PDM_SNPF(out_len, used, output + used, out_len - used,
+			 "{26} type4_pw_max_cnt = %d\n", dfs->type4_pw_max_cnt);
+		PDM_SNPF(out_len, used, output + used, out_len - used,
+			 "{27} type4_safe_pri_sum_th = %d\n",
+			 dfs->type4_safe_pri_sum_th);
+	} else {
+		PHYDM_SSCANF(input[1], DCMD_DECIMAL, &argv[0]);
+
+		for (i = 1; i < 30; i++) {
+			if (input[i + 1])
+				PHYDM_SSCANF(input[i + 1], DCMD_DECIMAL,
+					     &argv[i]);
+		}
+		if (argv[0] == 0) {
+			dfs->pri_hist_th = (u8)argv[1];
+			PDM_SNPF(out_len, used, output + used, out_len - used,
+				 "pri_hist_th = %d\n",
+				 dfs->pri_hist_th);
+		} else if (argv[0] == 1) {
+			dfs->pri_sum_g1_th = (u8)argv[1];
+			PDM_SNPF(out_len, used, output + used, out_len - used,
+				 "pri_sum_g1_th = %d\n",
+				 dfs->pri_sum_g1_th);
+		} else if (argv[0] == 2) {
+			dfs->pri_sum_g5_th = (u8)argv[1];
+			PDM_SNPF(out_len, used, output + used, out_len - used,
+				 "pri_sum_g5_th = %d\n",
+				 dfs->pri_sum_g5_th);
+		} else if (argv[0] == 3) {
+			dfs->pri_sum_g1_fcc_th = (u8)argv[1];
+			PDM_SNPF(out_len, used, output + used, out_len - used,
+				 "pri_sum_g1_fcc_th = %d\n",
+				 dfs->pri_sum_g1_fcc_th);
+		} else if (argv[0] == 4) {
+			dfs->pri_sum_g3_fcc_th = (u8)argv[1];
+			PDM_SNPF(out_len, used, output + used, out_len - used,
+				 "pri_sum_g3_fcc_th = %d\n",
+				 dfs->pri_sum_g3_fcc_th);
+		} else if (argv[0] == 5) {
+			dfs->pri_sum_safe_fcc_th = (u8)argv[1];
+			PDM_SNPF(out_len, used, output + used, out_len - used,
+				 "pri_sum_safe_fcc_th = %d\n",
+				 dfs->pri_sum_safe_fcc_th);
+		} else if (argv[0] == 6) {
+			dfs->pri_sum_type4_th = (u8)argv[1];
+			PDM_SNPF(out_len, used, output + used, out_len - used,
+				 "pri_sum_type4_th = %d\n",
+				 dfs->pri_sum_type4_th);
+		} else if (argv[0] == 7) {
+			dfs->pri_sum_type6_th = (u8)argv[1];
+			PDM_SNPF(out_len, used, output + used, out_len - used,
+				 "pri_sum_type6_th = %d\n",
+				 dfs->pri_sum_type6_th);
+		} else if (argv[0] == 8) {
+			dfs->pri_sum_safe_th = (u8)argv[1];
+			PDM_SNPF(out_len, used, output + used, out_len - used,
+				 "pri_sum_safe_th = %d\n",
+				 dfs->pri_sum_safe_th);
+		} else if (argv[0] == 9) {
+			dfs->pri_sum_g5_under_g1_th = (u8)argv[1];
+			PDM_SNPF(out_len, used, output + used, out_len - used,
+				 "pri_sum_g5_under_g1_th = %d\n",
+				 dfs->pri_sum_g5_under_g1_th);
+		} else if (argv[0] == 10) {
+			dfs->pri_pw_diff_th = (u8)argv[1];
+			PDM_SNPF(out_len, used, output + used, out_len - used,
+				 "pri_pw_diff_th = %d\n",
+				 dfs->pri_pw_diff_th);
+		} else if (argv[0] == 11) {
+			dfs->pri_pw_diff_fcc_th = (u8)argv[1];
+			PDM_SNPF(out_len, used, output + used, out_len - used,
+				 "pri_pw_diff_fcc_th = %d\n",
+				 dfs->pri_pw_diff_fcc_th);
+		} else if (argv[0] == 12) {
+			dfs->pri_pw_diff_fcc_idle_th = (u8)argv[1];
+			PDM_SNPF(out_len, used, output + used, out_len - used,
+				 "pri_pw_diff_fcc_idle_th = %d\n",
+				 dfs->pri_pw_diff_fcc_idle_th);
+		} else if (argv[0] == 13) {
+			dfs->pri_pw_diff_w53_th = (u8)argv[1];
+			PDM_SNPF(out_len, used, output + used, out_len - used,
+				 "pri_pw_diff_w53_th = %d\n",
+				 dfs->pri_pw_diff_w53_th);
+		} else if (argv[0] == 14) {
+			dfs->pri_type1_low_fcc_th = (u8)argv[1];
+			PDM_SNPF(out_len, used, output + used, out_len - used,
+				 "pri_type1_low_fcc_th = %d\n",
+				 dfs->pri_type1_low_fcc_th);
+		} else if (argv[0] == 15) {
+			dfs->pri_type1_upp_fcc_th = (u8)argv[1];
+			PDM_SNPF(out_len, used, output + used, out_len - used,
+				 "pri_type1_upp_fcc_th = %d\n",
+				 dfs->pri_type1_upp_fcc_th);
+		} else if (argv[0] == 16) {
+			dfs->pri_type1_cen_fcc_th = (u8)argv[1];
+			PDM_SNPF(out_len, used, output + used, out_len - used,
+				 "pri_type1_cen_fcc_th = %d\n",
+				 dfs->pri_type1_cen_fcc_th);
+		} else if (argv[0] == 17) {
+			dfs->pw_g0_th = (u8)argv[1];
+			PDM_SNPF(out_len, used, output + used, out_len - used,
+				 "pw_g0_th = %d\n",
+				 dfs->pw_g0_th);
+		} else if (argv[0] == 18) {
+			dfs->pw_long_lower_20m_th = (u8)argv[1];
+			PDM_SNPF(out_len, used, output + used, out_len - used,
+				 "pw_long_lower_20m_th = %d\n",
+				 dfs->pw_long_lower_20m_th);
+		} else if (argv[0] == 19) {
+			dfs->pw_long_lower_th = (u8)argv[1];
+			PDM_SNPF(out_len, used, output + used, out_len - used,
+				 "pw_long_lower_th = %d\n",
+				 dfs->pw_long_lower_th);
+		} else if (argv[0] == 20) {
+			dfs->pri_long_upper_th = (u8)argv[1];
+			PDM_SNPF(out_len, used, output + used, out_len - used,
+				 "pri_long_upper_th = %d\n",
+				 dfs->pri_long_upper_th);
+		} else if (argv[0] == 21) {
+			dfs->pw_long_sum_upper_th = (u8)argv[1];
+			PDM_SNPF(out_len, used, output + used, out_len - used,
+				 "pw_long_sum_upper_th = %d\n",
+				 dfs->pw_long_sum_upper_th);
+		} else if (argv[0] == 22) {
+			dfs->pw_std_th = (u8)argv[1];
+			PDM_SNPF(out_len, used, output + used, out_len - used,
+				 "pw_std_th = %d\n",
+				 dfs->pw_std_th);
+		} else if (argv[0] == 23) {
+			dfs->pw_std_idle_th = (u8)argv[1];
+			PDM_SNPF(out_len, used, output + used, out_len - used,
+				 "pw_std_idle_th = %d\n",
+				 dfs->pw_std_idle_th);
+		} else if (argv[0] == 24) {
+			dfs->pri_std_th = (u8)argv[1];
+			PDM_SNPF(out_len, used, output + used, out_len - used,
+				 "pri_std_th = %d\n",
+				 dfs->pri_std_th);
+		} else if (argv[0] == 25) {
+			dfs->pri_std_idle_th = (u8)argv[1];
+			PDM_SNPF(out_len, used, output + used, out_len - used,
+				 "pri_std_idle_th = %d\n",
+				 dfs->pri_std_idle_th);
+		} else if (argv[0] == 26) {
+			dfs->type4_pw_max_cnt = (u8)argv[1];
+			PDM_SNPF(out_len, used, output + used, out_len - used,
+				 "type4_pw_max_cnt = %d\n",
+				 dfs->type4_pw_max_cnt);
+		} else if (argv[0] == 27) {
+			dfs->type4_safe_pri_sum_th = (u8)argv[1];
+			PDM_SNPF(out_len, used, output + used, out_len - used,
+				 "type4_safe_pri_sum_th = %d\n",
+				 dfs->type4_safe_pri_sum_th);
+		}
+	}
+	*_used = used;
+	*_out_len = out_len;
+}
+
+void phydm_dfs_debug(void *dm_void, char input[][16], u32 *_used,
+		     char *output, u32 *_out_len)
 {
-	struct PHY_DM_STRUCT		*p_dm_odm = (struct PHY_DM_STRUCT *)p_dm_void;
-	struct _DFS_STATISTICS	*p_dfs = (struct _DFS_STATISTICS *)phydm_get_structure(p_dm_odm, PHYDM_DFS);
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct _DFS_STATISTICS *dfs = &dm->dfs;
 	u32 used = *_used;
 	u32 out_len = *_out_len;
+	u32 argv[10] = {0};
+	u8 i, input_idx = 0;
+
+	for (i = 0; i < 7; i++) {
+		if (input[i + 1]) {
+			PHYDM_SSCANF(input[i + 1], DCMD_HEX, &argv[i]);
+			input_idx++;
+		}
+	}
 
-	p_dfs->dbg_mode = (boolean)argv[0];
-	p_dfs->force_TP_mode = (boolean)argv[1];
-	p_dfs->det_print = (boolean)argv[2];
-	p_dfs->det_print2 = (boolean)argv[3];
+	if (input_idx == 0)
+		return;
+
+	dfs->dbg_mode = (boolean)argv[0];
+	dfs->sw_trigger_mode = (boolean)argv[1];
+	dfs->force_TP_mode = (boolean)argv[2];
+	dfs->det_print = (boolean)argv[3];
+	dfs->det_print2 = (boolean)argv[4];
+	dfs->print_hist_rpt = (boolean)argv[5];
+	dfs->hist_cond_on = (boolean)argv[6];
+
+	PDM_SNPF(out_len, used, output + used, out_len - used,
+		 "dbg_mode: %d, sw_trigger_mode: %d, force_TP_mode: %d, det_print: %d,det_print2: %d, print_hist_rpt: %d, hist_cond_on: %d\n",
+		 dfs->dbg_mode, dfs->sw_trigger_mode, dfs->force_TP_mode,
+		 dfs->det_print, dfs->det_print2, dfs->print_hist_rpt,
+		 dfs->hist_cond_on);
 
-	PHYDM_SNPRINTF((output + used, out_len - used, "dbg_mode: %d, force_TP_mode: %d, det_print: %d, det_print2: %d\n", p_dfs->dbg_mode, p_dfs->force_TP_mode, p_dfs->det_print, p_dfs->det_print2));
-	
 	/*switch (argv[0]) {
 	case 1:
 #if defined(CONFIG_PHYDM_DFS_MASTER)
-		 set dbg parameters for radar detection instead of the default value 
+		 set dbg parameters for radar detection instead of the default value
 		if (argv[1] == 1) {
-			p_dm_odm->radar_detect_reg_918 = argv[2];
-			p_dm_odm->radar_detect_reg_91c = argv[3];
-			p_dm_odm->radar_detect_reg_920 = argv[4];
-			p_dm_odm->radar_detect_reg_924 = argv[5];
-			p_dm_odm->radar_detect_dbg_parm_en = 1;
-
-			PHYDM_SNPRINTF((output + used, out_len - used, "Radar detection with dbg parameter\n"));
-			PHYDM_SNPRINTF((output + used, out_len - used, "reg918:0x%08X\n", p_dm_odm->radar_detect_reg_918));
-			PHYDM_SNPRINTF((output + used, out_len - used, "reg91c:0x%08X\n", p_dm_odm->radar_detect_reg_91c));
-			PHYDM_SNPRINTF((output + used, out_len - used, "reg920:0x%08X\n", p_dm_odm->radar_detect_reg_920));
-			PHYDM_SNPRINTF((output + used, out_len - used, "reg924:0x%08X\n", p_dm_odm->radar_detect_reg_924));
+			dm->radar_detect_reg_918 = argv[2];
+			dm->radar_detect_reg_91c = argv[3];
+			dm->radar_detect_reg_920 = argv[4];
+			dm->radar_detect_reg_924 = argv[5];
+			dm->radar_detect_dbg_parm_en = 1;
+
+			PDM_SNPF((output + used, out_len - used, "Radar detection with dbg parameter\n"));
+			PDM_SNPF((output + used, out_len - used, "reg918:0x%08X\n", dm->radar_detect_reg_918));
+			PDM_SNPF((output + used, out_len - used, "reg91c:0x%08X\n", dm->radar_detect_reg_91c));
+			PDM_SNPF((output + used, out_len - used, "reg920:0x%08X\n", dm->radar_detect_reg_920));
+			PDM_SNPF((output + used, out_len - used, "reg924:0x%08X\n", dm->radar_detect_reg_924));
 		} else {
-			p_dm_odm->radar_detect_dbg_parm_en = 0;
-			PHYDM_SNPRINTF((output + used, out_len - used, "Radar detection with default parameter\n"));
+			dm->radar_detect_dbg_parm_en = 0;
+			PDM_SNPF((output + used, out_len - used, "Radar detection with default parameter\n"));
 		}
-		phydm_radar_detect_enable(p_dm_odm);
-#endif  defined(CONFIG_PHYDM_DFS_MASTER) 
+		phydm_radar_detect_enable(dm);
+#endif  defined(CONFIG_PHYDM_DFS_MASTER)
 
 		break;
 	default:
@@ -646,35 +2262,62 @@ phydm_dfs_debug(
 	}*/
 }
 
+u8 phydm_dfs_polling_time(void *dm_void)
+{
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	u8 dfs_polling_time = 0;
 
+	if (dm->support_ic_type & (ODM_RTL8814A | ODM_RTL8822B | ODM_RTL8821C))
+		dfs_polling_time = 40;
+	else
+		dfs_polling_time = 100;
 
-#endif /* defined(CONFIG_PHYDM_DFS_MASTER) */
+	return dfs_polling_time;
+}
+
+#endif /* @defined(CONFIG_PHYDM_DFS_MASTER) */
 
 boolean
-phydm_is_dfs_band(
-	void		*p_dm_void
-)
+phydm_is_dfs_band(void *dm_void)
 {
-	struct PHY_DM_STRUCT *p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
 
-	if (((*p_dm->p_channel >= 52) && (*p_dm->p_channel <= 64)) ||
-		((*p_dm->p_channel >= 100) && (*p_dm->p_channel <= 140)))
+	if (((*dm->channel >= 52) && (*dm->channel <= 64)) ||
+	    ((*dm->channel >= 100) && (*dm->channel <= 144)))
 		return true;
 	else
 		return false;
 }
 
 boolean
-phydm_dfs_master_enabled(
-	void		*p_dm_void
-)
+phydm_dfs_master_enabled(void *dm_void)
 {
 #ifdef CONFIG_PHYDM_DFS_MASTER
-	struct PHY_DM_STRUCT		*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	boolean ret_val = false;
+
+	if (dm->dfs_master_enabled) /*pointer protection*/
+		ret_val = *dm->dfs_master_enabled ? true : false;
 
-	return *p_dm->dfs_master_enabled ? true : false;
+	return ret_val;
 #else
 	return false;
 #endif
 }
 
+#if (DM_ODM_SUPPORT_TYPE & ODM_WIN)
+#ifdef PHYDM_IC_JGR3_SERIES_SUPPORT
+void phydm_dfs_ap_reset_radar_detect_counter_and_flag(void *dm_void)
+{
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+
+	/* @Clear Radar Counter and Radar flag */
+	odm_set_bb_reg(dm, R_0xa40, BIT(15), 0);
+	odm_set_bb_reg(dm, R_0xa40, BIT(15), 1);
+
+	/* RT_TRACE(COMP_DFS, DBG_LOUD, ("[DFS], After reset radar counter, 0xcf8 = 0x%x, 0xcf4 = 0x%x\n", */
+	/* PHY_QueryBBReg(Adapter, 0xcf8, bMaskDWord), */
+	/* PHY_QueryBBReg(Adapter, 0xcf4, bMaskDWord))); */
+}
+#endif
+#endif
diff --git a/rtl8723DS/hal/phydm/phydm_dfs.h b/rtl8723DS/hal/phydm/phydm_dfs.h
index 761a403..a1a96db 100755..100644
--- a/rtl8723DS/hal/phydm/phydm_dfs.h
+++ b/rtl8723DS/hal/phydm/phydm_dfs.h
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2007 - 2017 Realtek Corporation.
+ * Copyright(c) 2007 - 2017  Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -8,101 +8,183 @@
  *
  * This program is distributed in the hope that it will be useful, but WITHOUT
  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  * more details.
  *
+ * The full GNU General Public License is included in this distribution in the
+ * file called LICENSE.
+ *
+ * Contact Information:
+ * wlanfae <wlanfae@realtek.com>
+ * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
+ * Hsinchu 300, Taiwan.
+ *
+ * Larry Finger <Larry.Finger@lwfinger.net>
+ *
  *****************************************************************************/
 
 #ifndef __PHYDM_DFS_H__
 #define __PHYDM_DFS_H__
 
-#define DFS_VERSION	"1.1"
+#define DFS_VERSION "1.1"
 
-/* ============================================================
-  Definition
- ============================================================
-*/
+/*@
+ * ============================================================
+ *  Definition
+ * ============================================================
+ */
 
-/*
-============================================================
-1  structure
- ============================================================
-*/
+/*@
+ * ============================================================
+ * 1  structure
+ * ============================================================
+ */
 
 struct _DFS_STATISTICS {
-	u8			mask_idx;
-	u8			igi_cur;
-	u8			igi_pre;
-	u8			st_l2h_cur;
-	u16			fa_count_pre;
-	u16			fa_inc_hist[5];	
-	u16			vht_crc_ok_cnt_pre;
-	u16			ht_crc_ok_cnt_pre;
-	u16			leg_crc_ok_cnt_pre;
-	u16			short_pulse_cnt_pre;
-	u16			long_pulse_cnt_pre;
-	u8			pwdb_th;
-	u8			pwdb_th_cur;
-	u8			pwdb_scalar_factor;	
-	u8			peak_th;
-	u8			short_pulse_cnt_th;
-	u8			long_pulse_cnt_th;
-	u8			peak_window;
-	u8			nb2wb_th;
-	u8			fa_mask_th;
-	u8			det_flag_offset;
-	u8			st_l2h_max;
-	u8			st_l2h_min;
-	u8			mask_hist_checked;
+	u8		mask_idx;
+	u8		igi_cur;
+	u8		igi_pre;
+	u8		st_l2h_cur;
+	u16		fa_count_pre;
+	u16		fa_inc_hist[5];
+	u16		vht_crc_ok_cnt_pre;
+	u16		ht_crc_ok_cnt_pre;
+	u16		leg_crc_ok_cnt_pre;
+	u16		short_pulse_cnt_pre;
+	u16		long_pulse_cnt_pre;
+	u8		pwdb_th;
+	u8		pwdb_th_cur;
+	u8		pwdb_scalar_factor;
+	u8		peak_th;
+	u8		short_pulse_cnt_th;
+	u8		long_pulse_cnt_th;
+	u8		peak_window;
+	u8		three_peak_opt;
+	u8		three_peak_th2;
+	u8		fa_mask_th;
+	u8		det_flag_offset;
+	u8		st_l2h_max;
+	u8		st_l2h_min;
+	u8		mask_hist_checked;
 	boolean		pulse_flag_hist[5];
+	boolean		pulse_type_hist[5];
 	boolean		radar_det_mask_hist[5];
 	boolean		idle_mode;
 	boolean		force_TP_mode;
 	boolean		dbg_mode;
+	boolean		sw_trigger_mode;
 	boolean		det_print;
 	boolean		det_print2;
+	boolean		radar_type;
+	/*@dfs histogram*/
+	boolean		print_hist_rpt;
+	boolean		hist_cond_on;
+	boolean		pri_cond1;
+	boolean		pri_cond2;
+	boolean		pri_cond3;
+	boolean		pri_cond4;
+	boolean		pri_cond5;
+	boolean		pw_cond1;
+	boolean		pw_cond2;
+	boolean		pw_cond3;
+	boolean		pri_type3_4_cond1;	/*@for ETSI*/
+	boolean		pri_type3_4_cond2;	/*@for ETSI*/
+	boolean		pw_long_cond1;	/*@for long radar*/
+	boolean		pw_long_cond2;	/*@for long radar*/
+	boolean		pri_long_cond1;	/*@for long radar*/
+	boolean		pw_flag;
+	boolean		pri_flag;
+	boolean		pri_type3_4_flag;	/*@for ETSI*/
+	boolean		long_radar_flag;
+	u16		pri_hold_sum[6];
+	u16		pw_hold_sum[6];
+	u16		pri_long_hold_sum[6];
+	u16		pw_long_hold_sum[6];
+	u8		hist_idx;
+	u8		hist_long_idx;
+	u8		pw_hold[4][6];
+	u8		pri_hold[4][6];
+	u8		pw_long_hold[300][6];
+	u8		pri_long_hold[300][6];
+	u16		pw_std;	/*@The std(var) of reasonable num of pw group*/
+	u16		pri_std;/*@The std(var) of reasonable num of pri group*/
+	/*@dfs histogram threshold*/
+	u8		pri_hist_th;
+	u8		pri_sum_g1_th;
+	u8		pri_sum_g5_th;
+	u8		pri_sum_g1_fcc_th;
+	u8		pri_sum_g3_fcc_th;
+	u8		pri_sum_safe_fcc_th;
+	u8		pri_sum_type4_th;
+	u8		pri_sum_type6_th;
+	u8		pri_sum_safe_th;
+	u8		pri_sum_g5_under_g1_th;
+	u8		pri_pw_diff_th;
+	u8		pri_pw_diff_fcc_th;
+	u8		pri_pw_diff_fcc_idle_th;
+	u8		pri_pw_diff_w53_th;
+	u8		pri_type1_low_fcc_th;
+	u8		pri_type1_upp_fcc_th;
+	u8		pri_type1_cen_fcc_th;
+	u8		pw_g0_th;
+	u8		pw_long_lower_20m_th;
+	u8		pw_long_lower_th;
+	u8		pri_long_upper_th;
+	u8		pw_long_sum_upper_th;
+	u8		pw_std_th;
+	u8		pw_std_idle_th;
+	u8		pri_std_th;
+	u8		pri_std_idle_th;
+	u8		type4_pw_max_cnt;
+	u8		type4_safe_pri_sum_th;
 };
 
-
-/* ============================================================
-  enumeration
- ============================================================
-*/
+/*@
+ * ============================================================
+ * enumeration
+ * ============================================================
+ */
 
 enum phydm_dfs_region_domain {
-	PHYDM_DFS_DOMAIN_UNKNOWN = 0,
-	PHYDM_DFS_DOMAIN_FCC = 1,
-	PHYDM_DFS_DOMAIN_MKK = 2,
-	PHYDM_DFS_DOMAIN_ETSI = 3,
+	PHYDM_DFS_DOMAIN_UNKNOWN =	0,
+	PHYDM_DFS_DOMAIN_FCC =		1,
+	PHYDM_DFS_DOMAIN_MKK =		2,
+	PHYDM_DFS_DOMAIN_ETSI =		3,
 };
 
-/*
-============================================================
-  function prototype
-============================================================
-*/
+/*@
+ * ============================================================
+ * function prototype
+ * ============================================================
+ */
 #if defined(CONFIG_PHYDM_DFS_MASTER)
-void phydm_radar_detect_reset(void *p_dm_void);
-void phydm_radar_detect_disable(void *p_dm_void);
-void phydm_radar_detect_enable(void *p_dm_void);
-boolean phydm_radar_detect(void *p_dm_void);
-void phydm_dfs_parameter_init(void *p_dm_void);
-void phydm_dfs_debug(void *p_dm_void, u32 *const argv, u32 *_used, char *output, u32 *_out_len);
-#endif /* defined(CONFIG_PHYDM_DFS_MASTER) */
+void phydm_radar_detect_reset(void *dm_void);
+void phydm_radar_detect_disable(void *dm_void);
+void phydm_radar_detect_enable(void *dm_void);
+boolean phydm_radar_detect(void *dm_void);
+void phydm_dfs_histogram_radar_distinguish(void *dm_void);
+boolean phydm_dfs_hist_log(void *dm_void, u8 index);
+void phydm_dfs_parameter_init(void *dm_void);
+void phydm_dfs_hist_dbg(void *dm_void, char input[][16], u32 *_used,
+			char *output, u32 *_out_len);
+void phydm_dfs_debug(void *dm_void, char input[][16], u32 *_used,
+		     char *output, u32 *_out_len);
+u8 phydm_dfs_polling_time(void *dm_void);
+#endif /* @defined(CONFIG_PHYDM_DFS_MASTER) */
 
-boolean 
-phydm_dfs_is_meteorology_channel(
-	void		*p_dm_void
-);
+boolean
+phydm_dfs_is_meteorology_channel(void *dm_void);
 
 boolean
-phydm_is_dfs_band(
-	void		*p_dm_void
-);
+phydm_is_dfs_band(void *dm_void);
 
 boolean
-phydm_dfs_master_enabled(
-	void		*p_dm_void
-);
+phydm_dfs_master_enabled(void *dm_void);
+
+#if (DM_ODM_SUPPORT_TYPE & ODM_WIN)
+#ifdef PHYDM_IC_JGR3_SERIES_SUPPORT
+void phydm_dfs_ap_reset_radar_detect_counter_and_flag(void *dm_void);
+#endif
+#endif
 
-#endif /*#ifndef __PHYDM_DFS_H__ */
+#endif /*@#ifndef __PHYDM_DFS_H__ */
diff --git a/rtl8723DS/hal/phydm/phydm_dig.c b/rtl8723DS/hal/phydm/phydm_dig.c
index 7136837..eea6dce 100755..100644
--- a/rtl8723DS/hal/phydm/phydm_dig.c
+++ b/rtl8723DS/hal/phydm/phydm_dig.c
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2007 - 2017 Realtek Corporation.
+ * Copyright(c) 2007 - 2017  Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -8,424 +8,713 @@
  *
  * This program is distributed in the hope that it will be useful, but WITHOUT
  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  * more details.
  *
+ * The full GNU General Public License is included in this distribution in the
+ * file called LICENSE.
+ *
+ * Contact Information:
+ * wlanfae <wlanfae@realtek.com>
+ * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
+ * Hsinchu 300, Taiwan.
+ *
+ * Larry Finger <Larry.Finger@lwfinger.net>
+ *
  *****************************************************************************/
 
-/* ************************************************************
+/*@************************************************************
  * include files
- * ************************************************************ */
+ * ************************************************************
+ */
 #include "mp_precomp.h"
 #include "phydm_precomp.h"
 
+#ifdef CFG_DIG_DAMPING_CHK
+void phydm_dig_recorder_reset(void *dm_void)
+{
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct phydm_dig_struct *dig_t = &dm->dm_dig_table;
+	struct phydm_dig_recorder_strcut *dig_rc = &dig_t->dig_recorder_t;
+
+	PHYDM_DBG(dm, DBG_DIG, "%s ======>\n", __func__);
+
+	odm_memory_set(dm, &dig_rc->igi_bitmap, 0,
+		       sizeof(struct phydm_dig_recorder_strcut));
+}
+
+void phydm_dig_recorder(void *dm_void, boolean first_connect, u8 igi_curr,
+			u32 fa_cnt)
+{
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct phydm_dig_struct *dig_t = &dm->dm_dig_table;
+	struct phydm_dig_recorder_strcut *dig_rc = &dig_t->dig_recorder_t;
+	u8 igi_pre = dig_rc->igi_history[0];
+	u8 igi_up = 0;
+
+	if (!dm->is_linked)
+		return;
+
+	PHYDM_DBG(dm, DBG_DIG, "%s ======>\n", __func__);
+
+	if (first_connect) {
+		phydm_dig_recorder_reset(dm);
+		dig_rc->igi_history[0] = igi_curr;
+		dig_rc->fa_history[0] = fa_cnt;
+		return;
+	}
+
+	if (igi_curr % 2)
+		igi_curr--;
+
+	igi_pre = dig_rc->igi_history[0];
+	igi_up = (igi_curr > igi_pre) ? 1 : 0;
+	dig_rc->igi_bitmap = ((dig_rc->igi_bitmap << 1) & 0xfe) | igi_up;
+
+	dig_rc->igi_history[3] = dig_rc->igi_history[2];
+	dig_rc->igi_history[2] = dig_rc->igi_history[1];
+	dig_rc->igi_history[1] = dig_rc->igi_history[0];
+	dig_rc->igi_history[0] = igi_curr;
+
+	dig_rc->fa_history[3] = dig_rc->fa_history[2];
+	dig_rc->fa_history[2] = dig_rc->fa_history[1];
+	dig_rc->fa_history[1] = dig_rc->fa_history[0];
+	dig_rc->fa_history[0] = fa_cnt;
+
+	PHYDM_DBG(dm, DBG_DIG, "igi_history[3:0] = {0x%x, 0x%x, 0x%x, 0x%x}\n",
+		  dig_rc->igi_history[3], dig_rc->igi_history[2],
+		  dig_rc->igi_history[1], dig_rc->igi_history[0]);
+	PHYDM_DBG(dm, DBG_DIG, "fa_history[3:0] = {%d, %d, %d, %d}\n",
+		  dig_rc->fa_history[3], dig_rc->fa_history[2],
+		  dig_rc->fa_history[1], dig_rc->fa_history[0]);
+	PHYDM_DBG(dm, DBG_DIG, "igi_bitmap = {%d, %d, %d, %d} = 0x%x\n",
+		  (u8)((dig_rc->igi_bitmap & BIT(3)) >> 3),
+		  (u8)((dig_rc->igi_bitmap & BIT(2)) >> 2),
+		  (u8)((dig_rc->igi_bitmap & BIT(1)) >> 1),
+		  (u8)(dig_rc->igi_bitmap & BIT(0)),
+		  dig_rc->igi_bitmap);
+}
+
+void phydm_dig_damping_chk(void *dm_void)
+{
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct phydm_dig_struct *dig_t = &dm->dm_dig_table;
+	struct phydm_dig_recorder_strcut *dig_rc = &dig_t->dig_recorder_t;
+	u8 igi_bitmap_4bit = dig_rc->igi_bitmap & 0xf;
+	u8 diff1 = 0, diff2 = 0;
+	u32 fa_low_th = dig_t->fa_th[0];
+	u32 fa_high_th = dig_t->fa_th[1];
+	u32 fa_high_th2 = dig_t->fa_th[2];
+	u8 fa_pattern_match = 0;
+	u32 time_tmp = 0;
+
+	if (!dm->is_linked)
+		return;
+
+	PHYDM_DBG(dm, DBG_DIG, "%s ======>\n", __func__);
+
+	/*@== Release Damping ================================================*/
+	if (dig_rc->damping_limit_en) {
+		PHYDM_DBG(dm, DBG_DIG,
+			  "[Damping Limit!] limit_time=%d, phydm_sys_up_time=%d\n",
+			  dig_rc->limit_time, dm->phydm_sys_up_time);
+
+		time_tmp = dig_rc->limit_time + DIG_LIMIT_PERIOD;
+
+		if (DIFF_2(dm->rssi_min, dig_rc->limit_rssi) > 3 ||
+		    time_tmp < dm->phydm_sys_up_time) {
+			dig_rc->damping_limit_en = 0;
+			PHYDM_DBG(dm, DBG_DIG, "rssi_min=%d, limit_rssi=%d\n",
+				  dm->rssi_min, dig_rc->limit_rssi);
+		}
+		return;
+	}
+
+	/*@== Damping Pattern Check===========================================*/
+	PHYDM_DBG(dm, DBG_DIG, "fa_th{H, L}= {%d,%d}\n", fa_high_th, fa_low_th);
+
+	switch (igi_bitmap_4bit) {
+	case 0x5:
+	/*@ 4b'0101 
+	* IGI:[3]down(0x24)->[2]up(0x26)->[1]down(0x24)->[0]up(0x26)->[new](Lock @ 0x26)
+	* FA: [3] >high1   ->[2] <low   ->[1] >high1   ->[0] <low   ->[new]   <low
+	*
+	* IGI:[3]down(0x24)->[2]up(0x28)->[1]down(0x24)->[0]up(0x28)->[new](Lock @ 0x28)
+	* FA: [3] >high2   ->[2] <low   ->[1] >high2   ->[0] <low   ->[new]   <low
+	*/
+		if (dig_rc->igi_history[0] > dig_rc->igi_history[1])
+			diff1 = dig_rc->igi_history[0] - dig_rc->igi_history[1];
+
+		if (dig_rc->igi_history[2] > dig_rc->igi_history[3])
+			diff2 = dig_rc->igi_history[2] - dig_rc->igi_history[3];
+
+		if (dig_rc->fa_history[0] < fa_low_th &&
+		    dig_rc->fa_history[1] > fa_high_th &&
+		    dig_rc->fa_history[2] < fa_low_th &&
+		    dig_rc->fa_history[3] > fa_high_th) {
+		    /*@Check each fa element*/
+			fa_pattern_match = 1;
+		}
+		break;
+	case 0x9:
+	/*@ 4b'1001
+	* IGI:[3]up(0x28)->[2]down(0x26)->[1]down(0x24)->[0]up(0x28)->[new](Lock @ 0x28)
+	* FA: [3]  <low  ->[2] <low     ->[1] >high2   ->[0] <low   ->[new]  <low
+	*/
+		if (dig_rc->igi_history[0] > dig_rc->igi_history[1])
+			diff1 = dig_rc->igi_history[0] - dig_rc->igi_history[1];
+
+		if (dig_rc->igi_history[2] < dig_rc->igi_history[3])
+			diff2 = dig_rc->igi_history[3] - dig_rc->igi_history[2];
+
+		if (dig_rc->fa_history[0] < fa_low_th &&
+		    dig_rc->fa_history[1] > fa_high_th2 &&
+		    dig_rc->fa_history[2] < fa_low_th &&
+		    dig_rc->fa_history[3] < fa_low_th) {
+		    /*@Check each fa element*/
+			fa_pattern_match = 1;
+		}
+		break;
+	default:
+		break;
+	}
+
+	if (diff1 >= 2 && diff2 >= 2 && fa_pattern_match) {
+		dig_rc->damping_limit_en = 1;
+		dig_rc->damping_limit_val = dig_rc->igi_history[0];
+		dig_rc->limit_time = dm->phydm_sys_up_time;
+		dig_rc->limit_rssi = dm->rssi_min;
+
+		PHYDM_DBG(dm, DBG_DIG,
+			  "[Start damping_limit!] IGI_dyn_min=0x%x, limit_time=%d, limit_rssi=%d\n",
+			  dig_rc->damping_limit_val,
+			  dig_rc->limit_time, dig_rc->limit_rssi);
+	}
+
+	PHYDM_DBG(dm, DBG_DIG, "damping_limit=%d\n", dig_rc->damping_limit_en);
+}
+#endif
 
 boolean
-phydm_dig_go_up_check(
-	void		*p_dm_void
-)
+phydm_dig_go_up_check(void *dm_void)
 {
-	struct PHY_DM_STRUCT		*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	struct _CCX_INFO			*ccx_info = &p_dm->dm_ccx_info;
-	struct phydm_dig_struct		*p_dig_t = &p_dm->dm_dig_table;
-	u8		cur_ig_value = p_dig_t->cur_ig_value;
-	u8		max_cover_bond;
-	u8		rx_gain_range_max = p_dig_t->rx_gain_range_max;
-	u8		i = 0, j = 0;
-	u8		total_nhm_cnt = ccx_info->nhm_result_total;
-	u32		dig_cover_cnt = 0;
-	u32		over_dig_cover_cnt = 0;
-	boolean		ret = true;
-
-	if (*p_dm->p_bb_op_mode == PHYDM_PERFORMANCE_MODE)
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct ccx_info *ccx_info = &dm->dm_ccx_info;
+	struct phydm_dig_struct *dig_t = &dm->dm_dig_table;
+	u8 cur_ig_value = dig_t->cur_ig_value;
+	u8 max_cover_bond = 0;
+	u8 rx_gain_range_max = dig_t->rx_gain_range_max;
+	u8 i = 0, j = 0;
+	u8 total_nhm_cnt = ccx_info->nhm_rpt_sum;
+	u32 dig_cnt = 0;
+	u32 over_dig_cnt = 0;
+	boolean ret = true;
+
+	if (*dm->bb_op_mode == PHYDM_PERFORMANCE_MODE)
 		return ret;
 
-	max_cover_bond = DIG_MAX_BALANCE_MODE - p_dig_t->dig_upcheck_initial_value;
+	max_cover_bond = DIG_MAX_BALANCE_MODE - dig_t->upcheck_init_val;
 
 	if (cur_ig_value < max_cover_bond - 6)
-		p_dig_t->dig_go_up_check_level = DIG_GOUPCHECK_LEVEL_0;
+		dig_t->go_up_chk_lv = DIG_GOUPCHECK_LEVEL_0;
 	else if (cur_ig_value <= DIG_MAX_BALANCE_MODE)
-		p_dig_t->dig_go_up_check_level = DIG_GOUPCHECK_LEVEL_1;
-	else	/* cur_ig_value > DM_DIG_MAX_AP, foolproof */
-		p_dig_t->dig_go_up_check_level = DIG_GOUPCHECK_LEVEL_2;
-	
-
-	PHYDM_DBG(p_dm, DBG_DIG, ("check_lv = %d, max_cover_bond = 0x%x\n",
-			p_dig_t->dig_go_up_check_level,
-			max_cover_bond));
-
-	if (total_nhm_cnt != 0) {
-		if (p_dig_t->dig_go_up_check_level == DIG_GOUPCHECK_LEVEL_0) {
-			for (i = 3; i<=11; i++)
-				dig_cover_cnt += ccx_info->nhm_result[i];
-			ret = ((p_dig_t->dig_level0_ratio_reciprocal * dig_cover_cnt) >= total_nhm_cnt) ? true : false;
-		} else if (p_dig_t->dig_go_up_check_level == DIG_GOUPCHECK_LEVEL_1) {
-			
-			/* search index */
-			for (i = 0; i<=10; i++) {
-				if ((max_cover_bond * 2) == ccx_info->nhm_th[i]) {
-					for(j =(i+1); j <= 11; j++)
-						over_dig_cover_cnt += ccx_info->nhm_result[j];
-					break;
-				}
-			}
-			ret = (p_dig_t->dig_level1_ratio_reciprocal * over_dig_cover_cnt < total_nhm_cnt) ? true : false;
+		dig_t->go_up_chk_lv = DIG_GOUPCHECK_LEVEL_1;
+	else /* @cur_ig_value > DM_DIG_MAX_AP, foolproof */
+		dig_t->go_up_chk_lv = DIG_GOUPCHECK_LEVEL_2;
+
+	PHYDM_DBG(dm, DBG_DIG, "check_lv = %d, max_cover_bond = 0x%x\n",
+		  dig_t->go_up_chk_lv, max_cover_bond);
+
+	if (total_nhm_cnt == 0)
+		return true;
 
-			if (!ret) {
-				/* update p_dig_t->rx_gain_range_max */
-				p_dig_t->rx_gain_range_max = (rx_gain_range_max >= max_cover_bond - 6) ? (max_cover_bond - 6) : rx_gain_range_max;
+	if (dig_t->go_up_chk_lv == DIG_GOUPCHECK_LEVEL_0) {
+		for (i = 3; i <= 11; i++)
+			dig_cnt += ccx_info->nhm_result[i];
 
-				PHYDM_DBG(p_dm, DBG_DIG,
-					("Noise pwr over DIG can filter, lock rx_gain_range_max to 0x%x\n",
-					p_dig_t->rx_gain_range_max));
+		if ((dig_t->lv0_ratio_reciprocal * dig_cnt) >= total_nhm_cnt)
+			ret = true;
+		else
+			ret = false;
+
+	} else if (dig_t->go_up_chk_lv == DIG_GOUPCHECK_LEVEL_1) {
+		/* search index */
+		for (i = 0; i <= 10; i++) {
+			if ((max_cover_bond * 2) == ccx_info->nhm_th[i]) {
+				for (j = (i + 1); j <= 11; j++)
+					over_dig_cnt += ccx_info->nhm_result[j];
+				break;
 			}
-		} else if (p_dig_t->dig_go_up_check_level == DIG_GOUPCHECK_LEVEL_2) {
-			/* cur_ig_value > DM_DIG_MAX_AP, foolproof */
+		}
+
+		if (dig_t->lv1_ratio_reciprocal * over_dig_cnt < total_nhm_cnt)
 			ret = true;
+		else
+			ret = false;
+
+		if (!ret) {
+			/* update dig_t->rx_gain_range_max */
+			if (rx_gain_range_max + 6 >= max_cover_bond)
+				dig_t->rx_gain_range_max =  max_cover_bond - 6;
+			else
+				dig_t->rx_gain_range_max =  rx_gain_range_max;
+
+			PHYDM_DBG(dm, DBG_DIG,
+				  "Noise pwr over DIG can filter, lock rx_gain_range_max to 0x%x\n",
+				  dig_t->rx_gain_range_max);
 		}
-	} else
+	} else if (dig_t->go_up_chk_lv == DIG_GOUPCHECK_LEVEL_2) {
+		/* @cur_ig_value > DM_DIG_MAX_AP, foolproof */
 		ret = true;
+	}
 
 	return ret;
 }
 
-void
-odm_fa_threshold_check(
-	void			*p_dm_void,
-	boolean			is_dfs_band,
-	boolean			is_performance
-)
+void phydm_fa_threshold_check(void *dm_void, boolean is_dfs_band)
 {
-	struct PHY_DM_STRUCT	*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	struct phydm_dig_struct	*p_dig_t = &p_dm->dm_dig_table;
-
-	if (p_dig_t->is_dbg_fa_th) {
-
-		PHYDM_DBG(p_dm, DBG_DIG, ("Manual Fix FA_th\n"));
-		
-	//if (p_dig_t->is_dbg_fa_th == true)
-		//return;
-
-	} else if (p_dm->is_linked && (is_performance || is_dfs_band)) {
-		if (p_dm->rssi_min < 20) {	/*[PHYDM-252]*/
-			p_dig_t->fa_th[0] = 500;
-			p_dig_t->fa_th[1] = 750;
-			p_dig_t->fa_th[2] = 1000;
-	
-	//if (p_dm->is_linked && (is_performance || is_dfs_band)) {
-		} else if ((p_dm->rx_tp >> 2) > p_dm->tx_tp && p_dm->rx_tp < 10 && p_dm->rx_tp > 1) {			/*10Mbps & 1Mbps*/
-			p_dig_t->fa_th[0] = 125;
-			p_dig_t->fa_th[1] = 250;
-			p_dig_t->fa_th[2] = 500;
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct phydm_dig_struct *dig_t = &dm->dm_dig_table;
+
+	if (dig_t->is_dbg_fa_th) {
+		PHYDM_DBG(dm, DBG_DIG, "Manual Fix FA_th\n");
+	} else if (dm->is_linked) {
+		if (dm->rssi_min < 20) { /*@[PHYDM-252]*/
+			dig_t->fa_th[0] = 500;
+			dig_t->fa_th[1] = 750;
+			dig_t->fa_th[2] = 1000;
+		} else if (((dm->rx_tp >> 2) > dm->tx_tp) && /*Test RX TP*/
+			   (dm->rx_tp < 10) && (dm->rx_tp > 1)) { /*TP=1~10Mb*/
+			dig_t->fa_th[0] = 125;
+			dig_t->fa_th[1] = 250;
+			dig_t->fa_th[2] = 500;
 		} else {
-			p_dig_t->fa_th[0] = 250;
-			p_dig_t->fa_th[1] = 500;
-			p_dig_t->fa_th[2] = 750;
+			dig_t->fa_th[0] = 250;
+			dig_t->fa_th[1] = 500;
+			dig_t->fa_th[2] = 750;
 		}
 	} else {
+		if (is_dfs_band) { /* @For DFS band and no link */
 
-		if (is_dfs_band) {	/* For DFS band and no link */
-			
-			p_dig_t->fa_th[0] = 250;
-			p_dig_t->fa_th[1] = 1000;
-			p_dig_t->fa_th[2] = 2000;
+			dig_t->fa_th[0] = 250;
+			dig_t->fa_th[1] = 1000;
+			dig_t->fa_th[2] = 2000;
 		} else {
-			p_dig_t->fa_th[0] = 2000;
-			p_dig_t->fa_th[1] = 4000;
-			p_dig_t->fa_th[2] = 5000;
+			dig_t->fa_th[0] = 2000;
+			dig_t->fa_th[1] = 4000;
+			dig_t->fa_th[2] = 5000;
 		}
 	}
 
-	PHYDM_DBG(p_dm, DBG_DIG,
-		("FA_th={%d,%d,%d}\n",
-		p_dig_t->fa_th[0],
-		p_dig_t->fa_th[1],
-		p_dig_t->fa_th[2]));
-
+	PHYDM_DBG(dm, DBG_DIG, "FA_th={%d,%d,%d}\n", dig_t->fa_th[0],
+		  dig_t->fa_th[1], dig_t->fa_th[2]);
 }
 
-void
-phydm_set_big_jump_step(
-	void			*p_dm_void,
-	u8			current_igi
-)
+void phydm_set_big_jump_step(void *dm_void, u8 curr_igi)
 {
-#if (RTL8822B_SUPPORT == 1 || RTL8197F_SUPPORT == 1)
-	struct PHY_DM_STRUCT	*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	struct phydm_dig_struct	*p_dig_t = &p_dm->dm_dig_table;
-	u8		step1[8] = {24, 30, 40, 50, 60, 70, 80, 90};
-	u8		i;
-
-	if (p_dig_t->enable_adjust_big_jump == 0)
+#if (RTL8822B_SUPPORT || RTL8197F_SUPPORT || RTL8192F_SUPPORT)
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct phydm_dig_struct *dig_t = &dm->dm_dig_table;
+	u8 step1[8] = {24, 30, 40, 50, 60, 70, 80, 90};
+	u8 big_jump_lmt = dig_t->big_jump_lmt[dig_t->agc_table_idx];
+	u8 i;
+
+	if (dig_t->enable_adjust_big_jump == 0)
 		return;
 
-	for (i = 0; i <= p_dig_t->big_jump_step1; i++) {
-		if ((current_igi + step1[i]) > p_dig_t->big_jump_lmt[p_dig_t->agc_table_idx]) {
+	for (i = 0; i <= dig_t->big_jump_step1; i++) {
+		if ((curr_igi + step1[i]) > big_jump_lmt) {
 			if (i != 0)
 				i = i - 1;
 			break;
-		} else if (i == p_dig_t->big_jump_step1)
+		} else if (i == dig_t->big_jump_step1) {
 			break;
+		}
 	}
-	if (p_dm->support_ic_type & ODM_RTL8822B)
-		odm_set_bb_reg(p_dm, 0x8c8, 0xe, i);
-	else if (p_dm->support_ic_type & ODM_RTL8197F)
-		odm_set_bb_reg(p_dm, ODM_REG_BB_AGC_SET_2_11N, 0xe, i);
+	if (dm->support_ic_type & ODM_RTL8822B)
+		odm_set_bb_reg(dm, R_0x8c8, 0xe, i);
+	else if (dm->support_ic_type & (ODM_RTL8197F | ODM_RTL8192F))
+		odm_set_bb_reg(dm, ODM_REG_BB_AGC_SET_2_11N, 0xe, i);
 
-	PHYDM_DBG(p_dm, DBG_DIG,
-		("phydm_set_big_jump_step(): bigjump = %d (ori = 0x%x), LMT=0x%x\n",
-		i, p_dig_t->big_jump_step1, p_dig_t->big_jump_lmt[p_dig_t->agc_table_idx]));
+	PHYDM_DBG(dm, DBG_DIG, "Bigjump = %d (ori = 0x%x), LMT=0x%x\n", i,
+		  dig_t->big_jump_step1, big_jump_lmt);
 #endif
 }
 
-void
-odm_write_dig(
-	void			*p_dm_void,
-	u8			current_igi
-)
+#ifdef PHYDM_IC_JGR3_SERIES_SUPPORT
+void phydm_write_dig_reg_jgr3(void *dm_void, u8 igi)
 {
-	struct PHY_DM_STRUCT	*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	struct phydm_dig_struct	*p_dig_t = &p_dm->dm_dig_table;
-	struct phydm_adaptivity_struct	*p_adaptivity = (struct phydm_adaptivity_struct *)phydm_get_structure(p_dm, PHYDM_ADAPTIVITY);
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct phydm_dig_struct *dig_t = &dm->dm_dig_table;
+
+	PHYDM_DBG(dm, DBG_DIG, "%s===>\n", __func__);
 
-	PHYDM_DBG(p_dm, DBG_DIG, ("odm_write_dig===>\n"));
+	/* Set IGI value */
+	if (!(dm->support_ic_type & ODM_IC_JGR3_SERIES))
+		return;
+
+	odm_set_bb_reg(dm, R_0x1d70, ODM_BIT_IGI_11AC, igi);
 
-	/* 1 Check IGI by upper bound */
-	if (p_adaptivity->igi_lmt_en && 
-		(current_igi > p_adaptivity->adapt_igi_up) && p_dm->is_linked) {
-		
-		current_igi = p_adaptivity->adapt_igi_up;
+	#if (defined(PHYDM_COMPILE_ABOVE_2SS))
+	if (dm->support_ic_type & PHYDM_IC_ABOVE_2SS)
+		odm_set_bb_reg(dm, R_0x1d70, ODM_BIT_IGI_B_11AC3, igi);
+	#endif
 
-		PHYDM_DBG(p_dm, DBG_DIG,
-			("Force to Adaptivity Upper bound=((0x%x))\n", current_igi));
+	#if (defined(PHYDM_COMPILE_ABOVE_4SS))
+	if (dm->support_ic_type & PHYDM_IC_ABOVE_4SS) {
+		odm_set_bb_reg(dm, R_0x1d70, ODM_BIT_IGI_C_11AC3, igi);
+		odm_set_bb_reg(dm, R_0x1d70, ODM_BIT_IGI_D_11AC3, igi);
 	}
+	#endif
+}
 
-	if (p_dig_t->cur_ig_value != current_igi) {
+u8 phydm_get_igi_reg_val_jgr3(void *dm_void, enum bb_path path)
+{
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	u32 val = 0;
 
-		#if (RTL8822B_SUPPORT == 1 || RTL8197F_SUPPORT == 1)
-		/* Modify big jump step for 8822B and 8197F */
-		if (p_dm->support_ic_type & (ODM_RTL8822B | ODM_RTL8197F))
-			phydm_set_big_jump_step(p_dm, current_igi);
-		#endif
+	PHYDM_DBG(dm, DBG_DIG, "%s===>\n", __func__);
 
-		#if (ODM_PHY_STATUS_NEW_TYPE_SUPPORT == 1)
-		/* Set IGI value of CCK for new CCK AGC */
-		if (p_dm->cck_new_agc && (p_dm->support_ic_type & ODM_IC_PHY_STATUE_NEW_TYPE))
-			odm_set_bb_reg(p_dm, 0xa0c, 0x3f00, (current_igi >> 1));
-		#endif
+	/* Set IGI value */
+	if (!(dm->support_ic_type & ODM_IC_JGR3_SERIES))
+		return (u8)val;
 
-		/*Add by YuChen for USB IO too slow issue*/
-		if (p_dm->support_ic_type &
-			(ODM_IC_11AC_GAIN_IDX_EDCCA | ODM_IC_11N_GAIN_IDX_EDCCA)) {
-			if ((p_dm->support_ability & ODM_BB_ADAPTIVITY) &&
-				(current_igi < p_dig_t->cur_ig_value)) {
-				p_dig_t->cur_ig_value = current_igi;
-				phydm_adaptivity(p_dm);
-			}
-		} else {
-			if ((p_dm->support_ability & ODM_BB_ADAPTIVITY) &&
-				(current_igi > p_dig_t->cur_ig_value)) {
-				p_dig_t->cur_ig_value = current_igi;
-				phydm_adaptivity(p_dm);
-			}
-		}
+	if (path == BB_PATH_A)
+		val = odm_get_bb_reg(dm, R_0x1d70, ODM_BIT_IGI_11AC);
+#if (defined(PHYDM_COMPILE_ABOVE_2SS))
+	else if (path == BB_PATH_B)
+		val = odm_get_bb_reg(dm, R_0x1d70, ODM_BIT_IGI_B_11AC3);
+#endif
 
-		/* Set IGI value */
-		odm_set_bb_reg(p_dm, ODM_REG(IGI_A, p_dm), ODM_BIT(IGI, p_dm), current_igi);
+#if (defined(PHYDM_COMPILE_ABOVE_3SS))
+	else if (path == BB_PATH_C)
+		val = odm_get_bb_reg(dm, R_0x1d70, ODM_BIT_IGI_C_11AC3);
+#endif
 
-		#if (defined(PHYDM_COMPILE_ABOVE_2SS))
-		if (p_dm->support_ic_type & PHYDM_IC_ABOVE_2SS)
-			odm_set_bb_reg(p_dm, ODM_REG(IGI_B, p_dm), ODM_BIT(IGI, p_dm), current_igi);
-		#endif
+#if (defined(PHYDM_COMPILE_ABOVE_4SS))
+	else if (path == BB_PATH_D)
+		val = odm_get_bb_reg(dm, R_0x1d70, ODM_BIT_IGI_D_11AC3);
+#endif
+	return (u8)val;
+}
 
-		#if (defined(PHYDM_COMPILE_ABOVE_4SS))
-		if (p_dm->support_ic_type & PHYDM_IC_ABOVE_4SS) {
-			odm_set_bb_reg(p_dm, ODM_REG(IGI_C, p_dm), ODM_BIT(IGI, p_dm), current_igi);
-			odm_set_bb_reg(p_dm, ODM_REG(IGI_D, p_dm), ODM_BIT(IGI, p_dm), current_igi);
-		}
-		#endif
-		
-		p_dig_t->cur_ig_value = current_igi;
+void phydm_fa_cnt_statistics_jgr3(void *dm_void)
+{
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct phydm_fa_struct *fa_t = &dm->false_alm_cnt;
+	u32 ret_value = 0;
+	u32 cck_enable = 0;
+	u16 ofdm_tx_counter = 0;
+	u16 cck_tx_counter = 0;
+
+	if (!(dm->support_ic_type & ODM_IC_JGR3_SERIES))
+		return;
+
+	ofdm_tx_counter = (u16)odm_get_bb_reg(dm, R_0x2de0, MASKLWORD);
+	cck_tx_counter = (u16)odm_get_bb_reg(dm, R_0x2de4, MASKLWORD);
+
+	ret_value = odm_get_bb_reg(dm, R_0x2d20, MASKDWORD);
+	fa_t->cnt_fast_fsync = (ret_value & 0xffff);
+	fa_t->cnt_sb_search_fail = ((ret_value & 0xffff0000) >> 16);
+
+	ret_value = odm_get_bb_reg(dm, R_0x2d04, MASKDWORD);
+	fa_t->cnt_parity_fail = ((ret_value & 0xffff0000) >> 16);
+
+	ret_value = odm_get_bb_reg(dm, R_0x2d08, MASKDWORD);
+	fa_t->cnt_rate_illegal = (ret_value & 0xffff);
+	fa_t->cnt_crc8_fail = ((ret_value & 0xffff0000) >> 16);
+
+	ret_value = odm_get_bb_reg(dm, R_0x2d10, MASKDWORD);
+	fa_t->cnt_mcs_fail = (ret_value & 0xffff);
+
+	/* @read OFDM FA counter, subtract tx_cnt due to new design of brk_cnt*/
+	fa_t->cnt_ofdm_fail = odm_get_bb_reg(dm, R_0x2d00, MASKLWORD)
+			      - ofdm_tx_counter;
+
+	/* Read CCK FA counter */
+	fa_t->cnt_cck_fail = odm_get_bb_reg(dm, R_0x1a5c, MASKLWORD);
+
+	/* read CCK/OFDM CCA counter */
+	ret_value = odm_get_bb_reg(dm, R_0x2c08, MASKDWORD);
+	fa_t->cnt_ofdm_cca = ((ret_value & 0xffff0000) >> 16);
+	fa_t->cnt_cck_cca = ret_value & 0xffff;
+
+	/* read CCK CRC32 counter */
+	ret_value = odm_get_bb_reg(dm, R_0x2c04, MASKDWORD);
+	fa_t->cnt_cck_crc32_error = ((ret_value & 0xffff0000) >> 16);
+	fa_t->cnt_cck_crc32_ok = ret_value & 0xffff;
+
+	/* read OFDM CRC32 counter */
+	ret_value = odm_get_bb_reg(dm, R_0x2c14, MASKDWORD);
+	fa_t->cnt_ofdm_crc32_error = ((ret_value & 0xffff0000) >> 16);
+	fa_t->cnt_ofdm_crc32_ok = ret_value & 0xffff;
+
+	/* read HT CRC32 counter */
+	ret_value = odm_get_bb_reg(dm, R_0x2c10, MASKDWORD);
+	fa_t->cnt_ht_crc32_error = ((ret_value & 0xffff0000) >> 16);
+	fa_t->cnt_ht_crc32_ok = ret_value & 0xffff;
+
+	/* @for VHT part */
+	if (dm->support_ic_type & (ODM_RTL8822C | ODM_RTL8812F |
+	    ODM_RTL8814B)) {
+		/* read VHT CRC32 counter */
+		ret_value = odm_get_bb_reg(dm, R_0x2c0c, MASKDWORD);
+		fa_t->cnt_vht_crc32_error = ((ret_value & 0xffff0000) >> 16);
+		fa_t->cnt_vht_crc32_ok = ret_value & 0xffff;
+
+		ret_value = odm_get_bb_reg(dm, R_0x2d10, MASKDWORD);
+		fa_t->cnt_mcs_fail_vht = ((ret_value & 0xffff0000) >> 16);
+
+		ret_value = odm_get_bb_reg(dm, R_0x2d0c, MASKDWORD);
+		fa_t->cnt_crc8_fail_vht = (ret_value & 0xffff) +
+					  ((ret_value & 0xffff0000) >> 16);
+	} else {
+		fa_t->cnt_vht_crc32_error = 0;
+		fa_t->cnt_vht_crc32_ok = 0;
+		fa_t->cnt_mcs_fail_vht = 0;
+		fa_t->cnt_crc8_fail_vht = 0;
 	}
 
-	PHYDM_DBG(p_dm, DBG_DIG, ("New_igi=((0x%x))\n\n", current_igi));
+	/* @CCK RxIQ weighting = 1 => 0x1a14[9:8]=0x0 */
+	cck_enable = odm_get_bb_reg(dm, R_0x1a14, 0x300);
+	if (cck_enable == 0x0) { /* @if(*dm->band_type == ODM_BAND_2_4G) */
+		fa_t->cnt_all = fa_t->cnt_ofdm_fail + fa_t->cnt_cck_fail;
+		fa_t->cnt_cca_all = fa_t->cnt_cck_cca + fa_t->cnt_ofdm_cca;
+		PHYDM_DBG(dm, DBG_FA_CNT, "ac3 OFDM FA = %d, CCK FA = %d\n",
+			  fa_t->cnt_ofdm_fail, fa_t->cnt_cck_fail);
+	} else {
+		fa_t->cnt_all = fa_t->cnt_ofdm_fail;
+		fa_t->cnt_cca_all = fa_t->cnt_ofdm_cca;
+		PHYDM_DBG(dm, DBG_FA_CNT, "ac3 CCK disable OFDM FA = %d\n",
+			  fa_t->cnt_ofdm_fail);
+	}
+
+	PHYDM_DBG(dm, DBG_FA_CNT,
+		  "ac3 [OFDM FA Detail] Parity_fail=((%d)), Rate_Illegal=((%d)), CRC8_fail=((%d)), Mcs_fail=((%d)), Fast_Fsync=((%d)), SBD_fail=((%d))\n",
+		  fa_t->cnt_parity_fail, fa_t->cnt_rate_illegal,
+		  fa_t->cnt_crc8_fail, fa_t->cnt_mcs_fail, fa_t->cnt_fast_fsync,
+		  fa_t->cnt_sb_search_fail);
 }
 
-void
-phydm_set_dig_val(
-	void			*p_dm_void,
-	u32			*val_buf,
-	u8			val_len
-)
+#endif
+
+void phydm_write_dig_reg_c50(void *dm_void, u8 igi)
 {
-	struct PHY_DM_STRUCT	*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
 
-	if (val_len != 1) {
-		PHYDM_DBG(p_dm, ODM_COMP_API, ("[Error][DIG]Need val_len=1\n"));
-		return;
+	PHYDM_DBG(dm, DBG_DIG, "%s===>\n", __func__);
+
+	odm_set_bb_reg(dm, ODM_REG(IGI_A, dm), ODM_BIT(IGI, dm), igi);
+
+	#if (defined(PHYDM_COMPILE_ABOVE_2SS))
+	if (dm->support_ic_type & PHYDM_IC_ABOVE_2SS)
+		odm_set_bb_reg(dm, ODM_REG(IGI_B, dm), ODM_BIT(IGI, dm), igi);
+	#endif
+
+	#if (defined(PHYDM_COMPILE_ABOVE_4SS))
+	if (dm->support_ic_type & PHYDM_IC_ABOVE_4SS) {
+		odm_set_bb_reg(dm, ODM_REG(IGI_C, dm), ODM_BIT(IGI, dm), igi);
+		odm_set_bb_reg(dm, ODM_REG(IGI_D, dm), ODM_BIT(IGI, dm), igi);
 	}
-	
-	odm_write_dig(p_dm, (u8)(*val_buf));
+	#endif
 }
 
-void
-odm_pause_dig(
-	void					*p_dm_void,
-	enum phydm_pause_type		pause_type,
-	enum phydm_pause_level		pause_level,
-	u8					igi_value
-)
+void phydm_write_dig_reg(void *dm_void, u8 igi)
 {
-	struct PHY_DM_STRUCT	*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	struct phydm_dig_struct	*p_dig_t = &p_dm->dm_dig_table;
-	u8	i = 0;
-	s8	max_level;
-	
-	PHYDM_DBG(p_dm, DBG_DIG, ("%s ======>\n", __func__));
-
-	if ((p_dig_t->pause_lv_bitmap == 0) && 
-		(!(p_dm->support_ability & (ODM_BB_DIG | ODM_BB_FA_CNT)))) {
-		
-		PHYDM_DBG(p_dm, DBG_DIG, ("Return: DIG or FA is disabled\n"));
-		return;
-	}
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct phydm_dig_struct *dig_t = &dm->dm_dig_table;
 
-	if (pause_level >= PHYDM_PAUSE_MAX_NUM) {
-		PHYDM_DBG(p_dm, DBG_DIG, ("Return: Wrong Lv\n"));
-		return;
-	}
+	PHYDM_DBG(dm, DBG_DIG, "%s===>\n", __func__);
+
+	#ifdef PHYDM_IC_JGR3_SERIES_SUPPORT
+	if (dm->support_ic_type & ODM_IC_JGR3_SERIES)
+		phydm_write_dig_reg_jgr3(dm, igi);
+	else
+	#endif
+		phydm_write_dig_reg_c50(dm, igi);
 
-	PHYDM_DBG(p_dm, DBG_DIG, ("Set pause {type, lv, IGI}={%d, %d, 0x%x}\n",
-		pause_type, pause_level, igi_value));
-	
-	for (i = 0; i < PHYDM_PAUSE_MAX_NUM; i ++) {
-		PHYDM_DBG(p_dm, DBG_DIG, ("pause val[%d]=0x%x\n", 
-										i, p_dig_t->pause_dig_value[i]));
+	dig_t->cur_ig_value = igi;
+}
+
+void odm_write_dig(void *dm_void, u8 new_igi)
+{
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct phydm_dig_struct *dig_t = &dm->dm_dig_table;
+	struct phydm_adaptivity_struct *adaptivity = &dm->adaptivity;
+
+	PHYDM_DBG(dm, DBG_DIG, "%s===>\n", __func__);
+
+	/* @1 Check IGI by upper bound */
+	if (adaptivity->igi_lmt_en &&
+	    new_igi > adaptivity->adapt_igi_up && dm->is_linked) {
+		new_igi = adaptivity->adapt_igi_up;
+
+		PHYDM_DBG(dm, DBG_DIG, "Force Adaptivity Up-bound=((0x%x))\n",
+			  new_igi);
 	}
 
-	switch (pause_type) {
-	
-	case PHYDM_PAUSE:
-	{
-		PHYDM_DBG(p_dm, DBG_DIG, ("Pause DIG\n"));
-		
-		p_dm->support_ability &= ~ODM_BB_DIG;
-		
-		if (p_dig_t->pause_lv_bitmap == 0) {
-			p_dig_t->igi_backup = p_dig_t->cur_ig_value; /* Backup IGI value */
-			PHYDM_DBG(p_dm, DBG_DIG, ("Backup IGI=0x%x\n", 
-														p_dig_t->igi_backup));
-		}
+	#if (RTL8192F_SUPPORT)
+	if ((dm->support_ic_type & ODM_RTL8192F) &&
+	    dm->cut_version == ODM_CUT_A &&
+	    new_igi > 0x38) {
+		new_igi = 0x38;
+		PHYDM_DBG(dm, DBG_DIG,
+			  "Force 92F Adaptivity Up-bound=((0x%x))\n", new_igi);
+	}
+	#endif
+
+	if (dig_t->cur_ig_value != new_igi) {
+		#if (RTL8822B_SUPPORT || RTL8197F_SUPPORT || RTL8192F_SUPPORT)
+		/* @Modify big jump step for 8822B and 8197F */
+		if (dm->support_ic_type &
+		    (ODM_RTL8822B | ODM_RTL8197F | ODM_RTL8192F))
+			phydm_set_big_jump_step(dm, new_igi);
+		#endif
 
-		p_dig_t->pause_dig_value[pause_level] = igi_value; /* Record IGI value */
-		p_dig_t->pause_lv_bitmap |= BIT(pause_level); /* Update pause level bit-map*/
+		#if (ODM_PHY_STATUS_NEW_TYPE_SUPPORT)
+		/* Set IGI value of CCK for new CCK AGC */
+		if (dm->cck_new_agc &&
+		    (dm->support_ic_type & PHYSTS_2ND_TYPE_IC))
+			odm_set_bb_reg(dm, R_0xa0c, 0x3f00, (new_igi >> 1));
+		#endif
 
-		if (BIT(pause_level + 1) > p_dig_t->pause_lv_bitmap) {
-			PHYDM_DBG(p_dm, DBG_DIG, ("[SUCCESS ]Pause DIG\n"));
-			odm_write_dig(p_dm, igi_value);
+		/*@Add by YuChen for USB IO too slow issue*/
+		if (!(dm->support_ic_type & ODM_IC_PWDB_EDCCA)) {
+			if (dm->support_ability & ODM_BB_ADAPTIVITY &&
+			    new_igi < dig_t->cur_ig_value) {
+				dig_t->cur_ig_value = new_igi;
+				phydm_adaptivity(dm);
+			}
 		} else {
-			PHYDM_DBG(p_dm, DBG_DIG, 
-				("[FAIL] Pause DIG, pause_bitmap=0x%x\n", p_dig_t->pause_lv_bitmap));
+			if (dm->support_ability & ODM_BB_ADAPTIVITY &&
+			    new_igi > dig_t->cur_ig_value) {
+				dig_t->cur_ig_value = new_igi;
+				phydm_adaptivity(dm);
+			}
 		}
+		phydm_write_dig_reg(dm, new_igi);
+	}
+
+	PHYDM_DBG(dm, DBG_DIG, "New_igi=((0x%x))\n\n", new_igi);
+}
+
+u8 phydm_get_igi_reg_val(void *dm_void, enum bb_path path)
+{
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	u32 val = 0;
+	u32 bit_map = ODM_BIT(IGI, dm);
+
+	switch (path) {
+	case BB_PATH_A:
+		val = odm_get_bb_reg(dm, ODM_REG(IGI_A, dm), bit_map);
+		break;
+	#if (defined(PHYDM_COMPILE_ABOVE_2SS))
+	case BB_PATH_B:
+		val = odm_get_bb_reg(dm, ODM_REG(IGI_B, dm), bit_map);
+		break;
+	#endif
+
+	#if (defined(PHYDM_COMPILE_ABOVE_3SS))
+	case BB_PATH_C:
+		val = odm_get_bb_reg(dm, ODM_REG(IGI_C, dm), bit_map);
+		break;
+	#endif
+
+	#if (defined(PHYDM_COMPILE_ABOVE_4SS))
+	case BB_PATH_D:
+		val = odm_get_bb_reg(dm, ODM_REG(IGI_D, dm), bit_map);
+		break;
+	#endif
+
+	default:
 		break;
 	}
-	
-	case PHYDM_RESUME:
-	{
-		PHYDM_DBG(p_dm, DBG_DIG, ("Resume DIG\n"));
-		
-		/* check if the level is illegal or not */
-		if ((p_dig_t->pause_lv_bitmap & (BIT(pause_level))) != 0) {
-			
-			p_dig_t->pause_lv_bitmap &= ~(BIT(pause_level));
-			p_dig_t->pause_dig_value[pause_level] = 0;
-		} else {
-		
-			PHYDM_DBG(p_dm, DBG_DIG, ("Wrong resume Lv\n"));
-			break;
-		}
 
-		PHYDM_DBG(p_dm, DBG_DIG, ("Pause_bitmap =0x%x\n", 
-													p_dig_t->pause_lv_bitmap));
+	return (u8)val;
+}
 
-		/* Resume DIG */
-		if (p_dig_t->pause_lv_bitmap == 0) {
+u8 phydm_get_igi(void *dm_void, enum bb_path path)
+{
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	u8 val = 0;
 
-			PHYDM_DBG(p_dm, DBG_DIG, ("Revert ori_IGI\n"));
-			odm_write_dig(p_dm, p_dig_t->igi_backup); /* Revert IGI*/
-			p_dig_t->is_ignore_dig = true;
-			p_dm->support_ability |= ODM_BB_DIG;/* Enable DIG */
-			break;
-		}
+	#ifdef PHYDM_IC_JGR3_SERIES_SUPPORT
+	if (dm->support_ic_type & ODM_IC_JGR3_SERIES)
+		val = phydm_get_igi_reg_val_jgr3(dm, path);
+	else
+	#endif
+		val = phydm_get_igi_reg_val(dm, path);
 
-		if (BIT(pause_level) > p_dig_t->pause_lv_bitmap) {
+	return val;
+}
 
-			/* Calculate the maximum level now */
-			for (max_level = (pause_level - 1); max_level >= 0; max_level--) {
-				if (p_dig_t->pause_lv_bitmap & BIT(max_level))
-					break;
-			}
+void phydm_set_dig_val(void *dm_void, u32 *val_buf, u8 val_len)
+{
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
 
-			/* write IGI to lower level */
-			PHYDM_DBG(p_dm, DBG_DIG, ("Pause @ IGI{Lv=0x%x}=%d)\n",
-				max_level, p_dig_t->pause_dig_value[max_level]));
-			
-			odm_write_dig(p_dm, p_dig_t->pause_dig_value[max_level]);
+	if (val_len != 1) {
+		PHYDM_DBG(dm, ODM_COMP_API, "[Error][DIG]Need val_len=1\n");
+		return;
+	}
 
-			break;
-		}
+	odm_write_dig(dm, (u8)(*val_buf));
+}
+
+void odm_pause_dig(void *dm_void, enum phydm_pause_type type,
+		   enum phydm_pause_level lv, u8 igi_input)
+{
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	u8 rpt = false;
+	u32 igi = (u32)igi_input;
+
+	PHYDM_DBG(dm, DBG_DIG, "[%s]type=%d, LV=%d, igi=0x%x\n", __func__, type,
+		  lv, igi);
+
+	switch (type) {
+	case PHYDM_PAUSE:
+	case PHYDM_PAUSE_NO_SET: {
+		rpt = phydm_pause_func(dm, F00_DIG, PHYDM_PAUSE, lv, 1, &igi);
 		break;
 	}
-	default:
-		PHYDM_DBG(p_dm, DBG_DIG, ("Wrong pause  type\n"));
+
+	case PHYDM_RESUME: {
+		rpt = phydm_pause_func(dm, F00_DIG, PHYDM_RESUME, lv, 1, &igi);
 		break;
 	}
-
-	PHYDM_DBG(p_dm, DBG_DIG, ("New pause bitmap = 0x%x\n",
-		p_dig_t->pause_lv_bitmap));
-	
-	for (i = 0; i < PHYDM_PAUSE_MAX_NUM; i ++) {
-		PHYDM_DBG(p_dm, DBG_DIG, ("pause val[%d]=0x%x\n", 
-										i, p_dig_t->pause_dig_value[i]));
+	default:
+		PHYDM_DBG(dm, DBG_DIG, "Wrong type\n");
+		break;
 	}
 
+	PHYDM_DBG(dm, DBG_DIG, "pause_result=%d\n", rpt);
 }
 
 boolean
-odm_dig_abort(
-	void			*p_dm_void
-)
+phydm_dig_abort(void *dm_void)
 {
-	struct PHY_DM_STRUCT	*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	struct phydm_dig_struct	*p_dig_t = &p_dm->dm_dig_table;
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
 #if (DM_ODM_SUPPORT_TYPE & ODM_WIN)
-	struct _ADAPTER		*p_adapter	= p_dm->adapter;
+	void *adapter = dm->adapter;
 #endif
 
 	/* support_ability */
-	if ((!(p_dm->support_ability & ODM_BB_FA_CNT)) ||
-		(!(p_dm->support_ability & ODM_BB_DIG)) ||
-		(*(p_dm->p_is_scan_in_process))) {
-		PHYDM_DBG(p_dm, DBG_DIG, ("Not Support\n"));
+	if ((!(dm->support_ability & ODM_BB_FA_CNT)) ||
+	    (!(dm->support_ability & ODM_BB_DIG)) ||
+	    *dm->is_scan_in_process) {
+		PHYDM_DBG(dm, DBG_DIG, "Not Support\n");
 		return true;
 	}
 
-	if (p_dm->pause_ability & ODM_BB_DIG) {
-		
-		PHYDM_DBG(p_dm, DBG_DIG, ("Return: Pause DIG in LV=%d\n", p_dm->pause_lv_table.lv_dig));
-		return true;
-	}
-	
-	if (p_dig_t->is_ignore_dig) {
-		p_dig_t->is_ignore_dig = false;
-		PHYDM_DBG(p_dm, DBG_DIG, ("Return: Ignore DIG\n"));
+	if (dm->pause_ability & ODM_BB_DIG) {
+		PHYDM_DBG(dm, DBG_DIG, "Return: Pause DIG in LV=%d\n",
+			  dm->pause_lv_table.lv_dig);
 		return true;
 	}
 
 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
 #if OS_WIN_FROM_WIN7(OS_VERSION)
-	if (IsAPModeExist(p_adapter) && p_adapter->bInHctTest) {
-		PHYDM_DBG(p_dm, DBG_DIG, (" Return: Is AP mode or In HCT Test\n"));
+	if (IsAPModeExist(adapter) && ((PADAPTER)(adapter))->bInHctTest) {
+		PHYDM_DBG(dm, DBG_DIG, " Return: Is AP mode or In HCT Test\n");
 		return true;
 	}
 #endif
@@ -434,513 +723,467 @@ odm_dig_abort(
 	return false;
 }
 
-void
-phydm_dig_init(
-	void		*p_dm_void
-)
+void phydm_dig_init(void *dm_void)
 {
-	struct PHY_DM_STRUCT		*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	struct phydm_dig_struct		*p_dig_t = &p_dm->dm_dig_table;
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct phydm_dig_struct *dig_t = &dm->dm_dig_table;
 #if (DM_ODM_SUPPORT_TYPE & (ODM_AP))
-	struct phydm_fa_struct	*false_alm_cnt = (struct phydm_fa_struct *)phydm_get_structure(p_dm, PHYDM_FALSEALMCNT);
+	struct phydm_fa_struct *false_alm_cnt = &dm->false_alm_cnt;
 #endif
-	u32			ret_value = 0;
-	u8			i;
+	u32 ret_value = 0;
+	u8 i;
 
-	p_dig_t->dm_dig_max = DIG_MAX_BALANCE_MODE;
-	p_dig_t->dm_dig_min = DIG_MIN_PERFORMANCE;
-	p_dig_t->dig_max_of_min = DIG_MAX_OF_MIN_BALANCE_MODE;
+	dig_t->dm_dig_max = DIG_MAX_BALANCE_MODE;
+	dig_t->dm_dig_min = DIG_MIN_PERFORMANCE;
+	dig_t->dig_max_of_min = DIG_MAX_OF_MIN_BALANCE_MODE;
 
-	p_dig_t->is_ignore_dig = false;
-	p_dig_t->cur_ig_value = (u8) odm_get_bb_reg(p_dm, ODM_REG(IGI_A, p_dm), ODM_BIT(IGI, p_dm));
-	p_dig_t->is_media_connect = false;
+	dig_t->cur_ig_value = phydm_get_igi(dm, BB_PATH_A);
 
-	p_dig_t->fa_th[0] = 250;
-	p_dig_t->fa_th[1] = 500;
-	p_dig_t->fa_th[2] = 750;
-	p_dig_t->is_dbg_fa_th = false;
+	dig_t->is_media_connect = false;
+
+	dig_t->fa_th[0] = 250;
+	dig_t->fa_th[1] = 500;
+	dig_t->fa_th[2] = 750;
+	dig_t->is_dbg_fa_th = false;
 #if (DM_ODM_SUPPORT_TYPE & (ODM_AP))
-	/* For RTL8881A */
+	/* @For RTL8881A */
 	false_alm_cnt->cnt_ofdm_fail_pre = 0;
 #endif
 
-	odm_memory_set(p_dm, p_dig_t->pause_dig_value, 0, PHYDM_PAUSE_MAX_NUM);
-	p_dig_t->pause_lv_bitmap = 0;
-
-	p_dig_t->rx_gain_range_max = DIG_MAX_BALANCE_MODE;
-	p_dig_t->rx_gain_range_min = p_dig_t->cur_ig_value;
-
-#if (RTL8822B_SUPPORT == 1 || RTL8197F_SUPPORT == 1)
-	p_dig_t->enable_adjust_big_jump = 1;
-	if (p_dm->support_ic_type & ODM_RTL8822B)
-		ret_value = odm_get_bb_reg(p_dm, 0x8c8, MASKLWORD);
-	else if (p_dm->support_ic_type & ODM_RTL8197F)
-		ret_value = odm_get_bb_reg(p_dm, 0xc74, MASKLWORD);
-
-	p_dig_t->big_jump_step1 = (u8)(ret_value & 0xe) >> 1;
-	p_dig_t->big_jump_step2 = (u8)(ret_value & 0x30) >> 4;
-	p_dig_t->big_jump_step3 = (u8)(ret_value & 0xc0) >> 6;
-
-	if (p_dm->support_ic_type & (ODM_RTL8822B | ODM_RTL8197F)) {
-		for (i = 0; i < sizeof(p_dig_t->big_jump_lmt); i++) {
-			if (p_dig_t->big_jump_lmt[i] == 0)
-				p_dig_t->big_jump_lmt[i] = 0x64;		/* Set -10dBm as default value */
+	dig_t->rx_gain_range_max = DIG_MAX_BALANCE_MODE;
+	dig_t->rx_gain_range_min = dig_t->cur_ig_value;
+
+#if (RTL8822B_SUPPORT || RTL8197F_SUPPORT || RTL8192F_SUPPORT)
+	dig_t->enable_adjust_big_jump = 1;
+	if (dm->support_ic_type & ODM_RTL8822B)
+		ret_value = odm_get_bb_reg(dm, R_0x8c8, MASKLWORD);
+	else if (dm->support_ic_type & (ODM_RTL8197F | ODM_RTL8192F))
+		ret_value = odm_get_bb_reg(dm, R_0xc74, MASKLWORD);
+
+	dig_t->big_jump_step1 = (u8)(ret_value & 0xe) >> 1;
+	dig_t->big_jump_step2 = (u8)(ret_value & 0x30) >> 4;
+	dig_t->big_jump_step3 = (u8)(ret_value & 0xc0) >> 6;
+
+	if (dm->support_ic_type &
+	    (ODM_RTL8822B | ODM_RTL8197F | ODM_RTL8192F)) {
+		for (i = 0; i < sizeof(dig_t->big_jump_lmt); i++) {
+			if (dig_t->big_jump_lmt[i] == 0)
+				dig_t->big_jump_lmt[i] = 0x64;
+				/* Set -10dBm as default value */
 		}
 	}
 #endif
 
-	p_dm->pre_rssi_min = 0;
-
 #ifdef PHYDM_TDMA_DIG_SUPPORT
-	p_dm->original_dig_restore = 1;
+	#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_CE))
+		dm->original_dig_restore = true;
+		dm->tdma_dig_state_number = DIG_NUM_OF_TDMA_STATES;
+		dm->tdma_dig_timer_ms = DIG_TIMER_MS;
+	#endif
 #endif
-}
-
-boolean
-phydm_dig_performance_mode_decision(
-	struct PHY_DM_STRUCT		*p_dm
-)
-{
-	boolean	is_performance = true;
-
-#ifdef PHYDM_DIG_MODE_DECISION_SUPPORT
-	struct phydm_dig_struct	*p_dig_t = &p_dm->dm_dig_table;
-
-	switch (p_dig_t->dig_mode_decision) {
-	case PHYDM_DIG_PERFORAMNCE_MODE:
-		is_performance = true;
-		break;
-	case PHYDM_DIG_COVERAGE_MODE:
-		is_performance = false;
-		break;
-	default:
-		is_performance = true;
-		break;
-	}
+#ifdef CFG_DIG_DAMPING_CHK
+	phydm_dig_recorder_reset(dm);
+	dig_t->dig_dl_en = 1;
 #endif
-
-	return is_performance;
 }
 
-void
-phydm_dig_abs_boundary_decision(
-	struct PHY_DM_STRUCT		*p_dm,
-	boolean	is_performance,
-	boolean	is_dfs_band
-)
+void phydm_dig_abs_boundary_decision(struct dm_struct *dm, boolean is_dfs_band)
 {
-	struct phydm_dig_struct	*p_dig_t = &p_dm->dm_dig_table;
-
-	if (!p_dm->is_linked) {
-		p_dig_t->dm_dig_max = DIG_MAX_COVERAGR;
-		p_dig_t->dm_dig_min = DIG_MIN_COVERAGE;
-	} else if (is_dfs_band == true) {
-		if (*p_dm->p_band_width == CHANNEL_WIDTH_20)
-			p_dig_t->dm_dig_min = DIG_MIN_DFS + 2;
+	struct phydm_dig_struct *dig_t = &dm->dm_dig_table;
+	struct phydm_adaptivity_struct *adapt = &dm->adaptivity;
+
+	if (!dm->is_linked) {
+		dig_t->dm_dig_max = DIG_MAX_COVERAGR;
+		dig_t->dm_dig_min = DIG_MIN_COVERAGE;
+	} else if (is_dfs_band) {
+		if (*dm->band_width == CHANNEL_WIDTH_20)
+			dig_t->dm_dig_min = DIG_MIN_DFS + 2;
 		else
-			p_dig_t->dm_dig_min = DIG_MIN_DFS;
-
-		p_dig_t->dig_max_of_min = DIG_MAX_OF_MIN_BALANCE_MODE;
-		p_dig_t->dm_dig_max = DIG_MAX_BALANCE_MODE;
+			dig_t->dm_dig_min = DIG_MIN_DFS;
 
-	} else if (!is_performance) {
-		p_dig_t->dm_dig_max = DIG_MAX_COVERAGR;
-		p_dig_t->dm_dig_min = DIG_MIN_COVERAGE;
-		#if (DIG_HW == 1)
-		p_dig_t->dig_max_of_min = DIG_MIN_COVERAGE;
-		#else
-		p_dig_t->dig_max_of_min = DIG_MAX_OF_MIN_COVERAGE;
-		#endif
+		dig_t->dig_max_of_min = DIG_MAX_OF_MIN_BALANCE_MODE;
+		dig_t->dm_dig_max = DIG_MAX_BALANCE_MODE;
 	} else {
-		if (*p_dm->p_bb_op_mode == PHYDM_BALANCE_MODE) {	/*service > 2 devices*/
-			p_dig_t->dm_dig_max = DIG_MAX_BALANCE_MODE;
+		if (*dm->bb_op_mode == PHYDM_BALANCE_MODE) {
+		/*service > 2 devices*/
+			dig_t->dm_dig_max = DIG_MAX_BALANCE_MODE;
 			#if (DIG_HW == 1)
-			p_dig_t->dig_max_of_min = DIG_MIN_COVERAGE;
+			dig_t->dig_max_of_min = DIG_MIN_COVERAGE;
 			#else
-			p_dig_t->dig_max_of_min = DIG_MAX_OF_MIN_BALANCE_MODE;
+			dig_t->dig_max_of_min = DIG_MAX_OF_MIN_BALANCE_MODE;
 			#endif
-		} else if (*p_dm->p_bb_op_mode == PHYDM_PERFORMANCE_MODE) {	/*service 1 devices*/
-			p_dig_t->dm_dig_max = DIG_MAX_PERFORMANCE_MODE;
-			p_dig_t->dig_max_of_min = DIG_MAX_OF_MIN_PERFORMANCE_MODE;
+		} else if (*dm->bb_op_mode == PHYDM_PERFORMANCE_MODE) {
+		/*service 1 devices*/
+			if (adapt->is_adapt_en && (dm->support_ic_type &
+			    (ODM_RTL8197F | ODM_RTL8192F)))
+			/*dig_max shouldn't be too high because of adaptivity*/
+				dig_t->dm_dig_max =
+					MIN_2((adapt->th_l2h + 40),
+					      DIG_MAX_PERFORMANCE_MODE);
+			else
+				dig_t->dm_dig_max = DIG_MAX_PERFORMANCE_MODE;
+
+			dig_t->dig_max_of_min = DIG_MAX_OF_MIN_PERFORMANCE_MODE;
 		}
 
-		if (p_dm->support_ic_type &
-			(ODM_RTL8814A | ODM_RTL8812 | ODM_RTL8821 | ODM_RTL8822B))
-			p_dig_t->dm_dig_min = 0x1c;
-		else if (p_dm->support_ic_type & ODM_RTL8197F)
-			p_dig_t->dm_dig_min = 0x1e;		/*For HW setting*/
+		if (dm->support_ic_type &
+		    (ODM_RTL8814A | ODM_RTL8812 | ODM_RTL8821 | ODM_RTL8822B))
+			dig_t->dm_dig_min = 0x1c;
+		else if (dm->support_ic_type & ODM_RTL8197F)
+			dig_t->dm_dig_min = 0x1e; /*@For HW setting*/
 		else
-			p_dig_t->dm_dig_min = DIG_MIN_PERFORMANCE;
+			dig_t->dm_dig_min = DIG_MIN_PERFORMANCE;
 	}
 
-	PHYDM_DBG(p_dm, DBG_DIG,
-		("Abs-bound{Max, Min}={0x%x, 0x%x}, Max_of_min =  0x%x\n",
-		p_dig_t->dm_dig_max,
-		p_dig_t->dm_dig_min,
-		p_dig_t->dig_max_of_min));
-
+	PHYDM_DBG(dm, DBG_DIG, "Abs{Max, Min}={0x%x, 0x%x}, Max_of_min=0x%x\n",
+		  dig_t->dm_dig_max, dig_t->dm_dig_min, dig_t->dig_max_of_min);
 }
 
-void
-phydm_dig_dym_boundary_decision(
-	struct PHY_DM_STRUCT		*p_dm,
-	boolean	is_performance
-)
+void phydm_dig_dym_boundary_decision(struct dm_struct *dm)
 {
-	struct phydm_dig_struct	*p_dig_t = &p_dm->dm_dig_table;
+	struct phydm_dig_struct *dig_t = &dm->dm_dig_table;
+#ifdef CFG_DIG_DAMPING_CHK
+	struct phydm_dig_recorder_strcut *dig_rc = &dig_t->dig_recorder_t;
+#endif
 	u8 offset = 15, tmp_max = 0;
 	u8 max_of_rssi_min = 0;
 
-	PHYDM_DBG(p_dm, DBG_DIG,
-			("Offset=((%d))\n", offset));
+	PHYDM_DBG(dm, DBG_DIG, "%s ======>\n", __func__);
 
-	/* DIG lower bound */
-	if (p_dm->rssi_min > p_dig_t->dig_max_of_min)
-		p_dig_t->rx_gain_range_min = p_dig_t->dig_max_of_min;
-	else if (p_dm->rssi_min < p_dig_t->dm_dig_min)
-		p_dig_t->rx_gain_range_min = p_dig_t->dm_dig_min;
-	else
-		p_dig_t->rx_gain_range_min = p_dm->rssi_min;
+	if (!dm->is_linked) {
+		/*@if no link, always stay at lower bound*/
+		dig_t->rx_gain_range_max = dig_t->dig_max_of_min;
+		dig_t->rx_gain_range_min = dig_t->dm_dig_min;
 
-	/* DIG upper bound */
-	tmp_max = p_dig_t->rx_gain_range_min + offset;
-	if (p_dig_t->rx_gain_range_min != p_dm->rssi_min) {
-		max_of_rssi_min = p_dm->rssi_min + offset;
-		if (tmp_max > max_of_rssi_min)
-			tmp_max = max_of_rssi_min;
+		PHYDM_DBG(dm, DBG_DIG, "No-Link, Dyn{Max, Min}={0x%x, 0x%x}\n",
+			  dig_t->rx_gain_range_max, dig_t->rx_gain_range_min);
+		return;
 	}
-	if (tmp_max > p_dig_t->dm_dig_max)
-		p_dig_t->rx_gain_range_max = p_dig_t->dm_dig_max;
+
+	PHYDM_DBG(dm, DBG_DIG, "rssi_min=%d, ofst=%d\n", dm->rssi_min, offset);
+
+	/* @DIG lower bound */
+	if (dm->rssi_min > dig_t->dig_max_of_min)
+		dig_t->rx_gain_range_min = dig_t->dig_max_of_min;
+	else if (dm->rssi_min < dig_t->dm_dig_min)
+		dig_t->rx_gain_range_min = dig_t->dm_dig_min;
 	else
-		p_dig_t->rx_gain_range_max = tmp_max;
-
-	/* 1 Force Lower Bound for AntDiv */
-	if (!p_dm->is_one_entry_only) {
-		if ((p_dm->support_ic_type & ODM_ANTDIV_SUPPORT) && (p_dm->support_ability & ODM_BB_ANT_DIV)) {
-			if (p_dm->ant_div_type == CG_TRX_HW_ANTDIV || p_dm->ant_div_type == CG_TRX_SMART_ANTDIV) {
-				if (p_dig_t->ant_div_rssi_max > p_dig_t->dig_max_of_min)
-					p_dig_t->rx_gain_range_min = p_dig_t->dig_max_of_min;
-				else
-					p_dig_t->rx_gain_range_min = (u8)p_dig_t->ant_div_rssi_max;
-				
-				PHYDM_DBG(p_dm, DBG_DIG,
-					("AntDiv: Force Dyn-Min = 0x%x, RSSI_max = 0x%x\n",
-					p_dig_t->rx_gain_range_min, p_dig_t->ant_div_rssi_max));
-			}
-		}
+		dig_t->rx_gain_range_min = dm->rssi_min;
+
+#ifdef CFG_DIG_DAMPING_CHK
+	/*@Limit Dyn min by damping*/
+	if (dig_t->dig_dl_en &&
+	    dig_rc->damping_limit_en &&
+	    dig_t->rx_gain_range_min < dig_rc->damping_limit_val) {
+		PHYDM_DBG(dm, DBG_DIG,
+			  "[Limit by Damping] Dig_dyn_min=0x%x -> 0x%x\n",
+			  dig_t->rx_gain_range_min, dig_rc->damping_limit_val);
+
+		dig_t->rx_gain_range_min = dig_rc->damping_limit_val;
 	}
-	PHYDM_DBG(p_dm, DBG_DIG,
-		("Dym-bound{Max, Min}={0x%x, 0x%x}\n",
-		p_dig_t->rx_gain_range_max, p_dig_t->rx_gain_range_min));
-}
+#endif
 
-void
-phydm_dig_abnormal_case(
-	struct PHY_DM_STRUCT		*p_dm,
-	u8	current_igi,
-	boolean	is_performance,
-	boolean	is_dfs_band
-)
-{
-	struct phydm_dig_struct	*p_dig_t = &p_dm->dm_dig_table;
-	boolean	first_connect = false, first_dis_connect = false;
+	/* @DIG upper bound */
+	tmp_max = dig_t->rx_gain_range_min + offset;
+	if (dig_t->rx_gain_range_min != dm->rssi_min) {
+		max_of_rssi_min = dm->rssi_min + offset;
+		if (tmp_max > max_of_rssi_min)
+			tmp_max = max_of_rssi_min;
+	}
 
-	first_connect = (p_dm->is_linked) && (p_dig_t->is_media_connect == false);
-	first_dis_connect = (!p_dm->is_linked) && (p_dig_t->is_media_connect == true);
+	if (tmp_max > dig_t->dm_dig_max)
+		dig_t->rx_gain_range_max = dig_t->dm_dig_max;
+	else if (tmp_max < dig_t->dm_dig_min)
+		dig_t->rx_gain_range_max = dig_t->dm_dig_min;
+	else
+		dig_t->rx_gain_range_max = tmp_max;
+
+	#ifdef CONFIG_PHYDM_ANTENNA_DIVERSITY
+	/* @1 Force Lower Bound for AntDiv */
+	if (!dm->is_one_entry_only &&
+	    (dm->support_ability & ODM_BB_ANT_DIV) &&
+	    (dm->ant_div_type == CG_TRX_HW_ANTDIV ||
+	     dm->ant_div_type == CG_TRX_SMART_ANTDIV)) {
+		if (dig_t->ant_div_rssi_max > dig_t->dig_max_of_min)
+			dig_t->rx_gain_range_min = dig_t->dig_max_of_min;
+		else
+			dig_t->rx_gain_range_min = (u8)dig_t->ant_div_rssi_max;
 
-	/* Modify DIG lower bound, deal with abnormal case */
-	if (!p_dm->is_linked && is_dfs_band && is_performance) {
-		p_dig_t->rx_gain_range_max = DIG_MAX_DFS;
-		PHYDM_DBG(p_dm, DBG_DIG,
-			("DFS band: Force max to 0x%x before link\n", p_dig_t->rx_gain_range_max));
+		PHYDM_DBG(dm, DBG_DIG, "Force Dyn-Min=0x%x, RSSI_max=0x%x\n",
+			  dig_t->rx_gain_range_min, dig_t->ant_div_rssi_max);
 	}
+	#endif
 
-	if (is_dfs_band)
-		p_dig_t->rx_gain_range_min = p_dig_t->dm_dig_min;
+	PHYDM_DBG(dm, DBG_DIG, "Dyn{Max, Min}={0x%x, 0x%x}\n",
+		  dig_t->rx_gain_range_max, dig_t->rx_gain_range_min);
+}
 
-	/* Abnormal lower bound case */
-	if (p_dig_t->rx_gain_range_min > p_dig_t->rx_gain_range_max)
-		p_dig_t->rx_gain_range_min = p_dig_t->rx_gain_range_max;
+void phydm_dig_abnormal_case(struct dm_struct *dm)
+{
+	struct phydm_dig_struct *dig_t = &dm->dm_dig_table;
 
-	PHYDM_DBG(p_dm, DBG_DIG,
-		("Abnoraml checked {Max, Min}={0x%x, 0x%x}\n",
-		p_dig_t->rx_gain_range_max, p_dig_t->rx_gain_range_min));
+	/* @Abnormal lower bound case */
+	if (dig_t->rx_gain_range_min > dig_t->rx_gain_range_max)
+		dig_t->rx_gain_range_min = dig_t->rx_gain_range_max;
 
+	PHYDM_DBG(dm, DBG_DIG, "Abnoraml checked {Max, Min}={0x%x, 0x%x}\n",
+		  dig_t->rx_gain_range_max, dig_t->rx_gain_range_min);
 }
 
-u8
-phydm_dig_current_igi_by_fa_th(
-	struct PHY_DM_STRUCT		*p_dm,
-	u8			current_igi,
-	u32			false_alm_cnt,
-	u8			*step_size
-)
+u8 phydm_new_igi_by_fa(struct dm_struct *dm, u8 igi, u32 fa_cnt, u8 *step_size)
 {
-	boolean	dig_go_up_check = true;
-	struct phydm_dig_struct	*p_dig_t = &p_dm->dm_dig_table;
-	
-	dig_go_up_check = phydm_dig_go_up_check(p_dm);
+	boolean dig_go_up_check = true;
+	struct phydm_dig_struct *dig_t = &dm->dm_dig_table;
 
-	if ((false_alm_cnt > p_dig_t->fa_th[2]) && dig_go_up_check)
-		current_igi = current_igi + step_size[0];
-	else if ((false_alm_cnt > p_dig_t->fa_th[1]) && dig_go_up_check)
-		current_igi = current_igi + step_size[1];
-	else if (false_alm_cnt < p_dig_t->fa_th[0])
-		current_igi = current_igi - step_size[2];
+#if 0
+	/*@dig_go_up_check = phydm_dig_go_up_check(dm);*/
+#endif
 
-	return current_igi;
+	if (fa_cnt > dig_t->fa_th[2] && dig_go_up_check)
+		igi = igi + step_size[0];
+	else if ((fa_cnt > dig_t->fa_th[1]) && dig_go_up_check)
+		igi = igi + step_size[1];
+	else if (fa_cnt < dig_t->fa_th[0])
+		igi = igi - step_size[2];
 
+	return igi;
 }
 
-u8
-phydm_dig_igi_start_value(
-	struct PHY_DM_STRUCT		*p_dm,
-	boolean	is_performance,
-	u8		current_igi,
-	u32		false_alm_cnt,
-	boolean	is_dfs_band
-)
+u8 phydm_get_new_igi(struct dm_struct *dm, u8 igi, u32 fa_cnt,
+		     boolean is_dfs_band)
 {
-	struct phydm_dig_struct	*p_dig_t = &p_dm->dm_dig_table;
-	u8		step_size[3] = {0};
-	boolean	first_connect = false, first_dis_connect = false;
-
-	first_connect = (p_dm->is_linked) && (p_dig_t->is_media_connect == false);
-	first_dis_connect = (!p_dm->is_linked) && (p_dig_t->is_media_connect == true);
-
-	if (p_dm->is_linked) {
-		if (p_dm->pre_rssi_min <= p_dm->rssi_min) {
-			step_size[0] = 2;
-			step_size[1] = 1;
-			step_size[2] = 2;
+	struct phydm_dig_struct *dig_t = &dm->dm_dig_table;
+	u8 step[3] = {0};
+	boolean first_connect = false, first_dis_connect = false;
+
+	first_connect = (dm->is_linked) && !dig_t->is_media_connect;
+	first_dis_connect = (!dm->is_linked) && dig_t->is_media_connect;
+
+	if (dm->is_linked) {
+		if (dm->pre_rssi_min <= dm->rssi_min) {
+			PHYDM_DBG(dm, DBG_DIG, "pre_rssi_min <= rssi_min\n");
+			step[0] = 2;
+			step[1] = 1;
+			step[2] = 2;
 		} else {
-			step_size[0] = 4;
-			step_size[1] = 2;
-			step_size[2] = 2;
+			step[0] = 4;
+			step[1] = 2;
+			step[2] = 2;
 		}
-		p_dm->pre_rssi_min = p_dm->rssi_min;
 	} else {
-		step_size[0] = 2;
-		step_size[1] = 1;
-		step_size[2] = 2;
-	}
-	
-	PHYDM_DBG(p_dm, DBG_DIG,
-		("step_size = {-%d,  +%d, +%d}\n", step_size[2], step_size[1], step_size[0]));
-
-	PHYDM_DBG(p_dm, DBG_DIG,
-		("rssi_min = %d, pre_rssi_min = %d\n", p_dm->rssi_min, p_dm->pre_rssi_min));
-
-	if (p_dm->is_linked && is_performance) {
-		/* 2 After link */
-		PHYDM_DBG(p_dm, DBG_DIG, ("Adjust IGI after link\n"));
-
-		if (first_connect && is_performance) {
-
-			if (is_dfs_band) {
-				if (p_dm->rssi_min > DIG_MAX_DFS)
-					current_igi = DIG_MAX_DFS;
-				else
-					current_igi = p_dm->rssi_min;
-				PHYDM_DBG(p_dm, DBG_DIG,
-					("DFS band: one shot IGI to 0x%x most\n", p_dig_t->rx_gain_range_max));
-			} else
-				current_igi = p_dig_t->rx_gain_range_min;
-#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_CE))
-#if (RTL8812A_SUPPORT == 1)
-			if (p_dm->support_ic_type == ODM_RTL8812)
-				odm_config_bb_with_header_file(p_dm, CONFIG_BB_AGC_TAB_DIFF);
-#endif
-#endif
-			PHYDM_DBG(p_dm, DBG_DIG,
-				("First connect case: IGI does on-shot to 0x%x\n", current_igi));
+		step[0] = 2;
+		step[1] = 1;
+		step[2] = 2;
+	}
+
+	PHYDM_DBG(dm, DBG_DIG, "step = {-%d, +%d, +%d}\n", step[2], step[1],
+		  step[0]);
+
+	if (first_connect) {
+		if (is_dfs_band) {
+			if (dm->rssi_min > DIG_MAX_DFS)
+				igi = DIG_MAX_DFS;
+			else
+				igi = dm->rssi_min;
+			PHYDM_DBG(dm, DBG_DIG, "DFS band:IgiMax=0x%x\n",
+				  dig_t->rx_gain_range_max);
 		} else {
+			igi = dig_t->rx_gain_range_min;
+		}
 
-			/* 4 Abnormal # beacon case */
-#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_CE))		
-			if ((p_dm->phy_dbg_info.num_qry_beacon_pkt < 5) &&
-				(false_alm_cnt < DM_DIG_FA_TH1) && (p_dm->bsta_state)) {
-				if (p_dm->support_ic_type != ODM_RTL8723D) {
-					p_dig_t->rx_gain_range_min = 0x1c;
-					current_igi = p_dig_t->rx_gain_range_min;
-					PHYDM_DBG(p_dm, DBG_DIG,
-						("Abnormal #beacon (%d) case: IGI does one-shot to 0x%x\n",
-						p_dm->phy_dbg_info.num_qry_beacon_pkt, current_igi));
-				}
-			} else
-#endif
-				current_igi = phydm_dig_current_igi_by_fa_th(p_dm,
-						current_igi, false_alm_cnt, step_size);
+		#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_CE))
+		#if (RTL8812A_SUPPORT)
+		if (dm->support_ic_type == ODM_RTL8812)
+			odm_config_bb_with_header_file(dm,
+						       CONFIG_BB_AGC_TAB_DIFF);
+		#endif
+		#endif
+		PHYDM_DBG(dm, DBG_DIG, "First connect: foce IGI=0x%x\n", igi);
+	} else if (dm->is_linked) {
+		PHYDM_DBG(dm, DBG_DIG, "Adjust IGI @ linked\n");
+		/* @4 Abnormal # beacon case */
+		#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_CE))
+		if (dm->phy_dbg_info.num_qry_beacon_pkt < 5 &&
+		    fa_cnt < DM_DIG_FA_TH1 && dm->bsta_state &&
+		    dm->support_ic_type != ODM_RTL8723D) {
+			dig_t->rx_gain_range_min = 0x1c;
+			igi = dig_t->rx_gain_range_min;
+			PHYDM_DBG(dm, DBG_DIG, "Beacon_num=%d,force igi=0x%x\n",
+				  dm->phy_dbg_info.num_qry_beacon_pkt, igi);
+		} else {
+			igi = phydm_new_igi_by_fa(dm, igi, fa_cnt, step);
 		}
+		#else
+		igi = phydm_new_igi_by_fa(dm, igi, fa_cnt, step);
+		#endif
 	} else {
-		/* 2 Before link */
-		PHYDM_DBG(p_dm, DBG_DIG, ("Adjust IGI before link\n"));
+		/* @2 Before link */
+		PHYDM_DBG(dm, DBG_DIG, "Adjust IGI before link\n");
 
 		if (first_dis_connect) {
-			current_igi = p_dig_t->dm_dig_min;
-			PHYDM_DBG(p_dm, DBG_DIG, ("First disconnect case: IGI does on-shot to lower bound\n"));
+			igi = dig_t->dm_dig_min;
+			PHYDM_DBG(dm, DBG_DIG,
+				  "First disconnect:foce IGI to lower bound\n");
 		} else {
-			PHYDM_DBG(p_dm, DBG_DIG,
-				("Pre_IGI=((0x%x)), FA=((%d))\n", current_igi, false_alm_cnt));
+			PHYDM_DBG(dm, DBG_DIG, "Pre_IGI=((0x%x)), FA=((%d))\n",
+				  igi, fa_cnt);
 
-			current_igi = phydm_dig_current_igi_by_fa_th(p_dm,
-						current_igi, false_alm_cnt, step_size);
+			igi = phydm_new_igi_by_fa(dm, igi, fa_cnt, step);
 		}
 	}
 
-	return current_igi;
+	/*@Check IGI by dyn-upper/lower bound */
+	if (igi < dig_t->rx_gain_range_min)
+		igi = dig_t->rx_gain_range_min;
+
+	if (igi > dig_t->rx_gain_range_max)
+		igi = dig_t->rx_gain_range_max;
+
+	PHYDM_DBG(dm, DBG_DIG, "fa_cnt = %d, IGI: 0x%x -> 0x%x\n",
+		  fa_cnt, dig_t->cur_ig_value, igi);
 
+	return igi;
+}
+
+boolean phydm_dig_dfs_mode_en(void *dm_void)
+{
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	boolean dfs_mode_en = false;
+
+	/* @Modify lower bound for DFS band */
+	if (dm->is_dfs_band) {
+		#if (DM_ODM_SUPPORT_TYPE & (ODM_AP))
+		dfs_mode_en = true;
+		#else
+		if (phydm_dfs_master_enabled(dm))
+			dfs_mode_en = true;
+		#endif
+		PHYDM_DBG(dm, DBG_DIG, "In DFS band\n");
+	}
+	return dfs_mode_en;
 }
 
-void
-phydm_dig(
-	void		*p_dm_void
-)
+void phydm_dig(void *dm_void)
 {
-	struct PHY_DM_STRUCT	*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	struct phydm_dig_struct	*p_dig_t = &p_dm->dm_dig_table;
-	struct phydm_fa_struct		*p_falm_cnt = &p_dm->false_alm_cnt;
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct phydm_dig_struct *dig_t = &dm->dm_dig_table;
+	struct phydm_fa_struct *falm_cnt = &dm->false_alm_cnt;
 #ifdef PHYDM_TDMA_DIG_SUPPORT
-	struct phydm_fa_acc_struct *p_falm_cnt_acc = &p_dm->false_alm_cnt_acc;
+	struct phydm_fa_acc_struct *falm_cnt_acc = &dm->false_alm_cnt_acc;
 #endif
-	boolean		first_connect, first_dis_connect;
-	u8			current_igi = p_dig_t->cur_ig_value;
-	u32			false_alm_cnt= p_falm_cnt->cnt_all;
-	boolean		is_dfs_band = false, is_performance = true;
+	boolean first_connect, first_disconnect;
+	u8 igi = dig_t->cur_ig_value;
+	u8 new_igi = 0x20;
+	u32 fa_cnt = falm_cnt->cnt_all;
+	boolean dfs_mode_en = false;
 
 #ifdef PHYDM_TDMA_DIG_SUPPORT
-	if (p_dm->original_dig_restore == 0) {
-		if (p_dig_t->cur_ig_value_tdma == 0)
-			p_dig_t->cur_ig_value_tdma = p_dig_t->cur_ig_value;
-		
-		current_igi = p_dig_t->cur_ig_value_tdma;
-		false_alm_cnt = p_falm_cnt_acc->cnt_all_1sec;
+	if (!(dm->original_dig_restore)) {
+		if (dig_t->cur_ig_value_tdma == 0)
+			dig_t->cur_ig_value_tdma = dig_t->cur_ig_value;
+
+		igi = dig_t->cur_ig_value_tdma;
+		fa_cnt = falm_cnt_acc->cnt_all_1sec;
 	}
 #endif
 
-	if (odm_dig_abort(p_dm) == true)
+	if (phydm_dig_abort(dm)) {
+		dig_t->cur_ig_value = phydm_get_igi(dm, BB_PATH_A);
 		return;
-
-	PHYDM_DBG(p_dm, DBG_DIG, ("%s Start===>\n", __func__));
-
-	/* 1 Update status */
-	first_connect = (p_dm->is_linked) && (p_dig_t->is_media_connect == false);
-	first_dis_connect = (!p_dm->is_linked) && (p_dig_t->is_media_connect == true);
-
-	PHYDM_DBG(p_dm, DBG_DIG,
-		("is_linked = %d, RSSI = %d, 1stConnect = %d, 1stDisconnect = %d\n",
-		p_dm->is_linked, p_dm->rssi_min, first_connect, first_dis_connect));
-
-#if (DM_ODM_SUPPORT_TYPE & (ODM_AP | ODM_CE))
-	/* Modify lower bound for DFS band */
-	if (p_dm->is_dfs_band) {
-		#if (DM_ODM_SUPPORT_TYPE & (ODM_CE))
-		if (phydm_dfs_master_enabled(p_dm))
-		#endif
-			is_dfs_band = true;
-		
-		PHYDM_DBG(p_dm, DBG_DIG, ("In DFS band\n"));
 	}
-#endif
 
-	is_performance = phydm_dig_performance_mode_decision(p_dm);
-	PHYDM_DBG(p_dm, DBG_DIG,
-		("DIG ((%s)) mode\n", (is_performance ? "Performance" : "Coverage")));
+	PHYDM_DBG(dm, DBG_DIG, "%s Start===>\n", __func__);
 
-	/* Boundary Decision */
-	phydm_dig_abs_boundary_decision(p_dm, is_performance, is_dfs_band);
+	/* @1 Update status */
+	first_connect = (dm->is_linked) && !dig_t->is_media_connect;
+	first_disconnect = (!dm->is_linked) && dig_t->is_media_connect;
 
-	/*init dym boundary*/
-	p_dig_t->rx_gain_range_max = p_dig_t->dig_max_of_min;	/*if no link, always stay at lower bound*/
-	p_dig_t->rx_gain_range_min = p_dig_t->dm_dig_min;
+	PHYDM_DBG(dm, DBG_DIG,
+		  "is_linked=%d, RSSI=%d, 1stConnect=%d, 1stDisconnect=%d\n",
+		  dm->is_linked, dm->rssi_min, first_connect, first_disconnect);
 
-	/* Adjust boundary by RSSI */
-	if (p_dm->is_linked)
-		phydm_dig_dym_boundary_decision(p_dm, is_performance);
+	PHYDM_DBG(dm, DBG_DIG, "DIG ((%s)) mode\n",
+		  (*dm->bb_op_mode ? "Balance" : "Performance"));
 
-	/*Abnormal case check*/
-	phydm_dig_abnormal_case(p_dm, current_igi, is_performance, is_dfs_band);
+	/*@DFS mode enable check*/
+	dfs_mode_en = phydm_dig_dfs_mode_en(dm);
 
-	/* False alarm threshold decision */
-	odm_fa_threshold_check(p_dm, is_dfs_band, is_performance);
+#ifdef CFG_DIG_DAMPING_CHK
+	/*Record IGI History*/
+	phydm_dig_recorder(dm, first_connect, igi, fa_cnt);
 
-	/* 1 Adjust initial gain by false alarm */
-	current_igi = phydm_dig_igi_start_value(p_dm,
-		is_performance, current_igi, false_alm_cnt, is_dfs_band);
+	/*@DIG Damping Check*/
+	phydm_dig_damping_chk(dm);
+#endif
 
-	/* 1 Check initial gain by upper/lower bound */
-	if (current_igi < p_dig_t->rx_gain_range_min)
-		current_igi = p_dig_t->rx_gain_range_min;
+	/*@Absolute Boundary Decision */
+	phydm_dig_abs_boundary_decision(dm, dfs_mode_en);
 
-	if (current_igi > p_dig_t->rx_gain_range_max)
-		current_igi = p_dig_t->rx_gain_range_max;
+	/*@Dynamic Boundary Decision*/
+	phydm_dig_dym_boundary_decision(dm);
 
-	PHYDM_DBG(p_dm, DBG_DIG, ("New_IGI=((0x%x))\n", current_igi));
+	/*@Abnormal case check*/
+	phydm_dig_abnormal_case(dm);
 
-	/* 1 Update status */
-#ifdef PHYDM_TDMA_DIG_SUPPORT
-	if (p_dm->original_dig_restore == 0) {
+	/*@FA threshold decision */
+	phydm_fa_threshold_check(dm, dfs_mode_en);
+
+	/*Select new IGI by FA */
+	new_igi = phydm_get_new_igi(dm, igi, fa_cnt, dfs_mode_en);
 
-		p_dig_t->cur_ig_value_tdma = current_igi;
-		/*It is possible fa_acc_1sec_tsf >= */
-		/*1sec while tdma_dig_state == 0*/
-		if (p_dig_t->tdma_dig_state != 0)
-			odm_write_dig(p_dm, p_dig_t->cur_ig_value_tdma);
+	/* @1 Update status */
+	#ifdef PHYDM_TDMA_DIG_SUPPORT
+	if (!(dm->original_dig_restore)) {
+		dig_t->cur_ig_value_tdma = new_igi;
+		/*@It is possible fa_acc_1sec_tsf >= */
+		/*@1sec while tdma_dig_state == 0*/
+		if (dig_t->tdma_dig_state != 0)
+			odm_write_dig(dm, dig_t->cur_ig_value_tdma);
 	} else
-#endif 
-		odm_write_dig(p_dm, current_igi);
+	#endif
+		odm_write_dig(dm, new_igi);
 
-	p_dig_t->is_media_connect = p_dm->is_linked;
-	
-	PHYDM_DBG(p_dm, DBG_DIG, ("DIG end\n"));
+	dig_t->is_media_connect = dm->is_linked;
 }
 
-void
-phydm_dig_lps_32k(
-	void		*p_dm_void
-)
+void phydm_dig_lps_32k(void *dm_void)
 {
-	struct PHY_DM_STRUCT	*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	u8	current_igi = p_dm->rssi_min;
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	u8 current_igi = dm->rssi_min;
 
-
-	odm_write_dig(p_dm, current_igi);
+	odm_write_dig(dm, current_igi);
 }
 
-void
-phydm_dig_by_rssi_lps(
-	void		*p_dm_void
-)
+void phydm_dig_by_rssi_lps(void *dm_void)
 {
-#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_CE))
-	struct PHY_DM_STRUCT	*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	struct phydm_fa_struct	*p_falm_cnt;
+#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_CE | ODM_IOT))
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct phydm_fa_struct *falm_cnt;
 
-	u8	rssi_lower = DIG_MIN_LPS; /* 0x1E or 0x1C */
-	u8	current_igi = p_dm->rssi_min;
+	u8 rssi_lower = DIG_MIN_LPS; /* @0x1E or 0x1C */
+	u8 current_igi = dm->rssi_min;
 
-	p_falm_cnt = &p_dm->false_alm_cnt;
-	if (odm_dig_abort(p_dm) == true)
+	falm_cnt = &dm->false_alm_cnt;
+	if (phydm_dig_abort(dm))
 		return;
 
 	current_igi = current_igi + RSSI_OFFSET_DIG_LPS;
-	PHYDM_DBG(p_dm, DBG_DIG, ("%s==>\n", __func__));
+	PHYDM_DBG(dm, DBG_DIG, "%s==>\n", __func__);
 
 	/* Using FW PS mode to make IGI */
-	/* Adjust by  FA in LPS MODE */
-	if (p_falm_cnt->cnt_all > DM_DIG_FA_TH2_LPS)
+	/* @Adjust by  FA in LPS MODE */
+	if (falm_cnt->cnt_all > DM_DIG_FA_TH2_LPS)
 		current_igi = current_igi + 4;
-	else if (p_falm_cnt->cnt_all > DM_DIG_FA_TH1_LPS)
+	else if (falm_cnt->cnt_all > DM_DIG_FA_TH1_LPS)
 		current_igi = current_igi + 2;
-	else if (p_falm_cnt->cnt_all < DM_DIG_FA_TH0_LPS)
+	else if (falm_cnt->cnt_all < DM_DIG_FA_TH0_LPS)
 		current_igi = current_igi - 2;
 
-
-	/* Lower bound checking */
+	/* @Lower bound checking */
 
 	/* RSSI Lower bound check */
-	if ((p_dm->rssi_min - 10) > DIG_MIN_LPS)
-		rssi_lower = (p_dm->rssi_min - 10);
+	if ((dm->rssi_min - 10) > DIG_MIN_LPS)
+		rssi_lower = (dm->rssi_min - 10);
 	else
 		rssi_lower = DIG_MIN_LPS;
 
@@ -950,962 +1193,1666 @@ phydm_dig_by_rssi_lps(
 	else if (current_igi < rssi_lower)
 		current_igi = rssi_lower;
 
-	PHYDM_DBG(p_dm, DBG_DIG,
-		("%s p_falm_cnt->cnt_all = %d\n", __func__,
-		p_falm_cnt->cnt_all));
-	PHYDM_DBG(p_dm, DBG_DIG,
-		("%s p_dm->rssi_min = %d\n", __func__,
-		p_dm->rssi_min));
-	PHYDM_DBG(p_dm, DBG_DIG,
-		("%s current_igi = 0x%x\n", __func__,
-		current_igi));
-
-	/* odm_write_dig(p_dm, p_dig_t->cur_ig_value); */
-	odm_write_dig(p_dm, current_igi);
+	PHYDM_DBG(dm, DBG_DIG, "fa_cnt_all=%d, rssi_min=%d, curr_igi=0x%x\n",
+		  falm_cnt->cnt_all, dm->rssi_min, current_igi);
+	odm_write_dig(dm, current_igi);
 #endif
 }
 
-/* 3============================================================
+/* @3============================================================
  * 3 FASLE ALARM CHECK
- * 3============================================================ */
-void
-phydm_false_alarm_counter_reg_reset(
-	void					*p_dm_void
-)
+ * 3============================================================
+ */
+void phydm_false_alarm_counter_reg_reset(void *dm_void)
 {
-	struct PHY_DM_STRUCT *p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	struct phydm_dig_struct	*p_dig_t = &p_dm->dm_dig_table;
-	struct phydm_fa_struct *p_falm_cnt = &p_dm->false_alm_cnt;
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct phydm_fa_struct *falm_cnt = &dm->false_alm_cnt;
 #ifdef PHYDM_TDMA_DIG_SUPPORT
-	struct phydm_fa_acc_struct *p_falm_cnt_acc = &p_dm->false_alm_cnt_acc;
+	struct phydm_dig_struct *dig_t = &dm->dm_dig_table;
+	struct phydm_fa_acc_struct *falm_cnt_acc = &dm->false_alm_cnt_acc;
 #endif
-	u32	false_alm_cnt;
+	u32 false_alm_cnt = 0;
 
 #ifdef PHYDM_TDMA_DIG_SUPPORT
-	if (p_dm->original_dig_restore == 0) {
+	if (!(dm->original_dig_restore)) {
+		if (dig_t->cur_ig_value_tdma == 0)
+			dig_t->cur_ig_value_tdma = dig_t->cur_ig_value;
 
-		if (p_dig_t->cur_ig_value_tdma == 0)
-			p_dig_t->cur_ig_value_tdma = p_dig_t->cur_ig_value;
-
-		false_alm_cnt = p_falm_cnt_acc->cnt_all_1sec;
-	} else 
+		false_alm_cnt = falm_cnt_acc->cnt_all_1sec;
+	} else
 #endif
 	{
-		false_alm_cnt = p_falm_cnt->cnt_all;
-	}
-
-#if (ODM_IC_11N_SERIES_SUPPORT == 1)
-	if (p_dm->support_ic_type & ODM_IC_11N_SERIES) {
-		/*reset false alarm counter registers*/
-		odm_set_bb_reg(p_dm, 0xC0C, BIT(31), 1);
-		odm_set_bb_reg(p_dm, 0xC0C, BIT(31), 0);
-		odm_set_bb_reg(p_dm, 0xD00, BIT(27), 1);
-		odm_set_bb_reg(p_dm, 0xD00, BIT(27), 0);
-
-		/*update ofdm counter*/
-		/*update page C counter*/
-		odm_set_bb_reg(p_dm, 0xD00, BIT(31), 0);
-		/*update page D counter*/
-		odm_set_bb_reg(p_dm, 0xD00, BIT(31), 0);
-
-		/*reset CCK CCA counter*/
-		odm_set_bb_reg(p_dm, 0xA2C, BIT(13) | BIT(12), 0);
-		odm_set_bb_reg(p_dm, 0xA2C, BIT(13) | BIT(12), 2);
-
-		/*reset CCK FA counter*/
-		odm_set_bb_reg(p_dm, 0xA2C, BIT(15) | BIT(14), 0);
-		odm_set_bb_reg(p_dm, 0xA2C, BIT(15) | BIT(14), 2);
-
-		/*reset CRC32 counter*/
-		odm_set_bb_reg(p_dm, 0xF14, BIT(16), 1);
-		odm_set_bb_reg(p_dm, 0xF14, BIT(16), 0);
-	}
-#endif	/* #if (ODM_IC_11N_SERIES_SUPPORT == 1) */
-
-#if (ODM_IC_11AC_SERIES_SUPPORT == 1)
-		if (p_dm->support_ic_type & ODM_IC_11AC_SERIES) {
-	#if (RTL8881A_SUPPORT == 1)
-			/* Reset FA counter by enable/disable OFDM */
-			if (false_alm_cnt->cnt_ofdm_fail_pre >= 0x7fff) {
-				/* reset OFDM */
-				odm_set_bb_reg(p_dm, 0x808, BIT(29), 0);
-				odm_set_bb_reg(p_dm, 0x808, BIT(29), 1);
-				false_alm_cnt->cnt_ofdm_fail_pre = 0;
-				PHYDM_DBG(p_dm, DBG_FA_CNT, ("Reset FA_cnt\n"));
-			}
-	#endif	/* #if (RTL8881A_SUPPORT == 1) */
-			/* reset OFDM FA countner */
-			odm_set_bb_reg(p_dm, 0x9A4, BIT(17), 1);
-			odm_set_bb_reg(p_dm, 0x9A4, BIT(17), 0);
-
-			/* reset CCK FA counter */
-			odm_set_bb_reg(p_dm, 0xA2C, BIT(15), 0);
-			odm_set_bb_reg(p_dm, 0xA2C, BIT(15), 1);
-
-			/* reset CCA counter */
-			odm_set_bb_reg(p_dm, 0xB58, BIT(0), 1);
-			odm_set_bb_reg(p_dm, 0xB58, BIT(0), 0);
+		false_alm_cnt = falm_cnt->cnt_all;
+	}
+
+#ifdef PHYDM_IC_JGR3_SERIES_SUPPORT
+	if (dm->support_ic_type & ODM_IC_JGR3_SERIES) {
+		/* @reset CCK FA counter */
+		odm_set_bb_reg(dm, R_0x1a2c, BIT(15) | BIT(14), 0);
+		odm_set_bb_reg(dm, R_0x1a2c, BIT(15) | BIT(14), 2);
+
+		/* @reset CCK CCA counter */
+		odm_set_bb_reg(dm, R_0x1a2c, BIT(13) | BIT(12), 0);
+		odm_set_bb_reg(dm, R_0x1a2c, BIT(13) | BIT(12), 2);
+
+		/* @Disable common rx clk gating => WLANBB-1106*/
+		odm_set_bb_reg(dm, R_0x1d2c, BIT(31), 0);
+		/* @reset OFDM CCA counter, OFDM FA counter*/
+		phydm_reset_bb_hw_cnt(dm);
+		/* @Enable common rx clk gating => WLANBB-1106*/
+		odm_set_bb_reg(dm, R_0x1d2c, BIT(31), 1);
+	}
+#endif
+#if (ODM_IC_11N_SERIES_SUPPORT)
+	if (dm->support_ic_type & ODM_IC_11N_SERIES) {
+		/* @reset false alarm counter registers*/
+		odm_set_bb_reg(dm, R_0xc0c, BIT(31), 1);
+		odm_set_bb_reg(dm, R_0xc0c, BIT(31), 0);
+		odm_set_bb_reg(dm, R_0xd00, BIT(27), 1);
+		odm_set_bb_reg(dm, R_0xd00, BIT(27), 0);
+
+		/* @update ofdm counter*/
+		/* @update page C counter*/
+		odm_set_bb_reg(dm, R_0xc00, BIT(31), 0);
+		/* @update page D counter*/
+		odm_set_bb_reg(dm, R_0xd00, BIT(31), 0);
+
+		/* @reset CCK CCA counter*/
+		odm_set_bb_reg(dm, R_0xa2c, BIT(13) | BIT(12), 0);
+		odm_set_bb_reg(dm, R_0xa2c, BIT(13) | BIT(12), 2);
+
+		/* @reset CCK FA counter*/
+		odm_set_bb_reg(dm, R_0xa2c, BIT(15) | BIT(14), 0);
+		odm_set_bb_reg(dm, R_0xa2c, BIT(15) | BIT(14), 2);
+
+		/* @reset CRC32 counter*/
+		odm_set_bb_reg(dm, R_0xf14, BIT(16), 1);
+		odm_set_bb_reg(dm, R_0xf14, BIT(16), 0);
+	}
+#endif /* @#if (ODM_IC_11N_SERIES_SUPPORT) */
+
+#if (ODM_IC_11AC_SERIES_SUPPORT)
+	if (dm->support_ic_type & ODM_IC_11AC_SERIES) {
+		#if (RTL8881A_SUPPORT)
+		/* @Reset FA counter by enable/disable OFDM */
+		if ((dm->support_ic_type == ODM_RTL8881A) &&
+		    false_alm_cnt->cnt_ofdm_fail_pre >= 0x7fff) {
+			/* reset OFDM */
+			odm_set_bb_reg(dm, R_0x808, BIT(29), 0);
+			odm_set_bb_reg(dm, R_0x808, BIT(29), 1);
+			false_alm_cnt->cnt_ofdm_fail_pre = 0;
+			PHYDM_DBG(dm, DBG_FA_CNT, "Reset FA_cnt\n");
 		}
-#endif	/* #if (ODM_IC_11AC_SERIES_SUPPORT == 1) */
-}
+		#endif /* @#if (RTL8881A_SUPPORT) */
 
-void
-phydm_false_alarm_counter_reg_hold(
-	void					*p_dm_void
-)
-{
-	struct PHY_DM_STRUCT *p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
+		/* @reset OFDM FA countner */
+		odm_set_bb_reg(dm, R_0x9a4, BIT(17), 1);
+		odm_set_bb_reg(dm, R_0x9a4, BIT(17), 0);
 
-	if (p_dm->support_ic_type & ODM_IC_11N_SERIES) {
-		/*hold ofdm counter*/
-		/*hold page C counter*/
-		odm_set_bb_reg(p_dm, 0xC00, BIT(31), 1);
-		/*hold page D counter*/
-		odm_set_bb_reg(p_dm, 0xD00, BIT(31), 1);
+		/* @reset CCK FA counter */
+		odm_set_bb_reg(dm, R_0xa2c, BIT(15), 0);
+		odm_set_bb_reg(dm, R_0xa2c, BIT(15), 1);
 
-		//hold cck counter
-		odm_set_bb_reg(p_dm, 0xA2C, BIT(12), 1);
-		odm_set_bb_reg(p_dm, 0xA2C, BIT(14), 1);
+		/* @reset CCA counter */
+		phydm_reset_bb_hw_cnt(dm);
 	}
+#endif /* @#if (ODM_IC_11AC_SERIES_SUPPORT) */
 }
 
-void
-odm_false_alarm_counter_statistics(
-	void		*p_dm_void
-)
+void phydm_false_alarm_counter_reg_hold(void *dm_void)
 {
-	struct PHY_DM_STRUCT					*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	struct phydm_fa_struct	*false_alm_cnt = (struct phydm_fa_struct *)phydm_get_structure(p_dm, PHYDM_FALSEALMCNT);
-	struct phydm_adaptivity_struct	*adaptivity = (struct phydm_adaptivity_struct *)phydm_get_structure(p_dm, PHYDM_ADAPTIVITY);
-	u32						ret_value;
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+
+	if (dm->support_ic_type & ODM_IC_JGR3_SERIES) {
+		/* @hold cck counter */
+		odm_set_bb_reg(dm, R_0x1a2c, BIT(12), 1);
+		odm_set_bb_reg(dm, R_0x1a2c, BIT(14), 1);
+	} else if (dm->support_ic_type & ODM_IC_11N_SERIES) {
+		/*@hold ofdm counter*/
+		/*@hold page C counter*/
+		odm_set_bb_reg(dm, R_0xc00, BIT(31), 1);
+		/*@hold page D counter*/
+		odm_set_bb_reg(dm, R_0xd00, BIT(31), 1);
+
+		/*@hold cck counter*/
+		odm_set_bb_reg(dm, R_0xa2c, BIT(12), 1);
+		odm_set_bb_reg(dm, R_0xa2c, BIT(14), 1);
+	}
+}
 
-	if (!(p_dm->support_ability & ODM_BB_FA_CNT))
-		return;
+#if (ODM_IC_11N_SERIES_SUPPORT)
+void phydm_fa_cnt_statistics_n(void *dm_void)
+{
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct phydm_fa_struct *fa_t = &dm->false_alm_cnt;
+	u32 reg = 0;
 
-	PHYDM_DBG(p_dm, DBG_FA_CNT, ("FA_Counter()======>\n"));
+	if (!(dm->support_ic_type & ODM_IC_11N_SERIES))
+		return;
 
-#if (ODM_IC_11N_SERIES_SUPPORT == 1)
-	if (p_dm->support_ic_type & ODM_IC_11N_SERIES) {
+	/* @hold ofdm & cck counter */
+	phydm_false_alarm_counter_reg_hold(dm);
+
+	reg = odm_get_bb_reg(dm, ODM_REG_OFDM_FA_TYPE1_11N, MASKDWORD);
+	fa_t->cnt_fast_fsync = (reg & 0xffff);
+	fa_t->cnt_sb_search_fail = ((reg & 0xffff0000) >> 16);
+
+	reg = odm_get_bb_reg(dm, ODM_REG_OFDM_FA_TYPE2_11N, MASKDWORD);
+	fa_t->cnt_ofdm_cca = (reg & 0xffff);
+	fa_t->cnt_parity_fail = ((reg & 0xffff0000) >> 16);
+
+	reg = odm_get_bb_reg(dm, ODM_REG_OFDM_FA_TYPE3_11N, MASKDWORD);
+	fa_t->cnt_rate_illegal = (reg & 0xffff);
+	fa_t->cnt_crc8_fail = ((reg & 0xffff0000) >> 16);
+
+	reg = odm_get_bb_reg(dm, ODM_REG_OFDM_FA_TYPE4_11N, MASKDWORD);
+	fa_t->cnt_mcs_fail = (reg & 0xffff);
+
+	fa_t->cnt_ofdm_fail =
+		fa_t->cnt_parity_fail + fa_t->cnt_rate_illegal +
+		fa_t->cnt_crc8_fail + fa_t->cnt_mcs_fail +
+		fa_t->cnt_fast_fsync + fa_t->cnt_sb_search_fail;
+
+	/* read CCK CRC32 counter */
+	fa_t->cnt_cck_crc32_error = odm_get_bb_reg(dm, R_0xf84, MASKDWORD);
+	fa_t->cnt_cck_crc32_ok = odm_get_bb_reg(dm, R_0xf88, MASKDWORD);
+
+	/* read OFDM CRC32 counter */
+	reg = odm_get_bb_reg(dm, ODM_REG_OFDM_CRC32_CNT_11N, MASKDWORD);
+	fa_t->cnt_ofdm_crc32_error = (reg & 0xffff0000) >> 16;
+	fa_t->cnt_ofdm_crc32_ok = reg & 0xffff;
+
+	/* read HT CRC32 counter */
+	reg = odm_get_bb_reg(dm, ODM_REG_HT_CRC32_CNT_11N, MASKDWORD);
+	fa_t->cnt_ht_crc32_error = (reg & 0xffff0000) >> 16;
+	fa_t->cnt_ht_crc32_ok = reg & 0xffff;
+
+	/* read VHT CRC32 counter */
+	fa_t->cnt_vht_crc32_error = 0;
+	fa_t->cnt_vht_crc32_ok = 0;
+
+	#if (RTL8723D_SUPPORT)
+	if (dm->support_ic_type == ODM_RTL8723D) {
+		/* read HT CRC32 agg counter */
+		reg = odm_get_bb_reg(dm, R_0xfb8, MASKDWORD);
+		fa_t->cnt_ht_crc32_error_agg = (reg & 0xffff0000) >> 16;
+		fa_t->cnt_ht_crc32_ok_agg = reg & 0xffff;
+	}
+	#endif
 
-		/* hold ofdm & cck counter */
-		phydm_false_alarm_counter_reg_hold(p_dm);
+	#if (RTL8188E_SUPPORT)
+	if (dm->support_ic_type == ODM_RTL8188E) {
+		reg = odm_get_bb_reg(dm, ODM_REG_SC_CNT_11N, MASKDWORD);
+		fa_t->cnt_bw_lsc = (reg & 0xffff);
+		fa_t->cnt_bw_usc = ((reg & 0xffff0000) >> 16);
+	}
+	#endif
 
-		ret_value = odm_get_bb_reg(p_dm, ODM_REG_OFDM_FA_TYPE1_11N, MASKDWORD);
-		false_alm_cnt->cnt_fast_fsync = (ret_value & 0xffff);
-		false_alm_cnt->cnt_sb_search_fail = ((ret_value & 0xffff0000) >> 16);
+	reg = odm_get_bb_reg(dm, ODM_REG_CCK_FA_LSB_11N, MASKBYTE0);
+	fa_t->cnt_cck_fail = reg;
 
-		ret_value = odm_get_bb_reg(p_dm, ODM_REG_OFDM_FA_TYPE2_11N, MASKDWORD);
-		false_alm_cnt->cnt_ofdm_cca = (ret_value & 0xffff);
-		false_alm_cnt->cnt_parity_fail = ((ret_value & 0xffff0000) >> 16);
+	reg = odm_get_bb_reg(dm, ODM_REG_CCK_FA_MSB_11N, MASKBYTE3);
+	fa_t->cnt_cck_fail += (reg & 0xff) << 8;
 
-		ret_value = odm_get_bb_reg(p_dm, ODM_REG_OFDM_FA_TYPE3_11N, MASKDWORD);
-		false_alm_cnt->cnt_rate_illegal = (ret_value & 0xffff);
-		false_alm_cnt->cnt_crc8_fail = ((ret_value & 0xffff0000) >> 16);
+	reg = odm_get_bb_reg(dm, ODM_REG_CCK_CCA_CNT_11N, MASKDWORD);
+	fa_t->cnt_cck_cca = ((reg & 0xFF) << 8) | ((reg & 0xFF00) >> 8);
 
-		ret_value = odm_get_bb_reg(p_dm, ODM_REG_OFDM_FA_TYPE4_11N, MASKDWORD);
-		false_alm_cnt->cnt_mcs_fail = (ret_value & 0xffff);
+	fa_t->cnt_all_pre = fa_t->cnt_all;
 
-		false_alm_cnt->cnt_ofdm_fail =
-			false_alm_cnt->cnt_parity_fail + false_alm_cnt->cnt_rate_illegal +
-			false_alm_cnt->cnt_crc8_fail + false_alm_cnt->cnt_mcs_fail +
-			false_alm_cnt->cnt_fast_fsync + false_alm_cnt->cnt_sb_search_fail;
+	fa_t->cnt_all = fa_t->cnt_fast_fsync +
+			fa_t->cnt_sb_search_fail +
+			fa_t->cnt_parity_fail +
+			fa_t->cnt_rate_illegal +
+			fa_t->cnt_crc8_fail +
+			fa_t->cnt_mcs_fail +
+			fa_t->cnt_cck_fail;
 
-		/* read CCK CRC32 counter */
-		false_alm_cnt->cnt_cck_crc32_error = odm_get_bb_reg(p_dm, ODM_REG_CCK_CRC32_ERROR_CNT_11N, MASKDWORD);
-		false_alm_cnt->cnt_cck_crc32_ok = odm_get_bb_reg(p_dm, ODM_REG_CCK_CRC32_OK_CNT_11N, MASKDWORD);
+	fa_t->cnt_cca_all = fa_t->cnt_ofdm_cca + fa_t->cnt_cck_cca;
 
-		/* read OFDM CRC32 counter */
-		ret_value = odm_get_bb_reg(p_dm, ODM_REG_OFDM_CRC32_CNT_11N, MASKDWORD);
-		false_alm_cnt->cnt_ofdm_crc32_error = (ret_value & 0xffff0000) >> 16;
-		false_alm_cnt->cnt_ofdm_crc32_ok = ret_value & 0xffff;
+	PHYDM_DBG(dm, DBG_FA_CNT,
+		  "[OFDM FA Detail] Parity_Fail=((%d)), Rate_Illegal=((%d)), CRC8_fail=((%d)), Mcs_fail=((%d)), Fast_Fsync=(( %d )), SBD_fail=((%d))\n",
+		  fa_t->cnt_parity_fail, fa_t->cnt_rate_illegal,
+		  fa_t->cnt_crc8_fail, fa_t->cnt_mcs_fail, fa_t->cnt_fast_fsync,
+		  fa_t->cnt_sb_search_fail);
+}
+#endif
 
-		/* read HT CRC32 counter */
-		ret_value = odm_get_bb_reg(p_dm, ODM_REG_HT_CRC32_CNT_11N, MASKDWORD);
-		false_alm_cnt->cnt_ht_crc32_error = (ret_value & 0xffff0000) >> 16;
-		false_alm_cnt->cnt_ht_crc32_ok = ret_value & 0xffff;
+#if (ODM_IC_11AC_SERIES_SUPPORT)
+void phydm_fa_cnt_statistics_ac(void *dm_void)
+{
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct phydm_fa_struct *fa_t = &dm->false_alm_cnt;
+	u32 ret_value = 0;
+	u32 cck_enable = 0;
 
-		/* read VHT CRC32 counter */
-		false_alm_cnt->cnt_vht_crc32_error = 0;
-		false_alm_cnt->cnt_vht_crc32_ok = 0;
-		
-#if (RTL8723D_SUPPORT == 1)
-		if (p_dm->support_ic_type == ODM_RTL8723D) {
-			/* read HT CRC32 agg counter */
-			ret_value = odm_get_bb_reg(p_dm, ODM_REG_HT_CRC32_CNT_11N_AGG, MASKDWORD);
-			false_alm_cnt->cnt_ht_crc32_error_agg = (ret_value & 0xffff0000) >> 16;
-			false_alm_cnt->cnt_ht_crc32_ok_agg= ret_value & 0xffff;
-		}
-#endif
-		
-#if (RTL8188E_SUPPORT == 1)
-		if (p_dm->support_ic_type == ODM_RTL8188E) {
-			ret_value = odm_get_bb_reg(p_dm, ODM_REG_SC_CNT_11N, MASKDWORD);
-			false_alm_cnt->cnt_bw_lsc = (ret_value & 0xffff);
-			false_alm_cnt->cnt_bw_usc = ((ret_value & 0xffff0000) >> 16);
-		}
-#endif
+	if (!(dm->support_ic_type & ODM_IC_11AC_SERIES))
+		return;
 
-		{
-			ret_value = odm_get_bb_reg(p_dm, ODM_REG_CCK_FA_LSB_11N, MASKBYTE0);
-			false_alm_cnt->cnt_cck_fail = ret_value;
+	ret_value = odm_get_bb_reg(dm, ODM_REG_OFDM_FA_TYPE1_11AC, MASKDWORD);
+	fa_t->cnt_fast_fsync = ((ret_value & 0xffff0000) >> 16);
 
-			ret_value = odm_get_bb_reg(p_dm, ODM_REG_CCK_FA_MSB_11N, MASKBYTE3);
-			false_alm_cnt->cnt_cck_fail += (ret_value & 0xff) << 8;
+	ret_value = odm_get_bb_reg(dm, ODM_REG_OFDM_FA_TYPE2_11AC, MASKDWORD);
+	fa_t->cnt_sb_search_fail = (ret_value & 0xffff);
 
-			ret_value = odm_get_bb_reg(p_dm, ODM_REG_CCK_CCA_CNT_11N, MASKDWORD);
-			false_alm_cnt->cnt_cck_cca = ((ret_value & 0xFF) << 8) | ((ret_value & 0xFF00) >> 8);
-		}
+	ret_value = odm_get_bb_reg(dm, ODM_REG_OFDM_FA_TYPE3_11AC, MASKDWORD);
+	fa_t->cnt_parity_fail = (ret_value & 0xffff);
+	fa_t->cnt_rate_illegal = ((ret_value & 0xffff0000) >> 16);
 
-		false_alm_cnt->cnt_all_pre = false_alm_cnt->cnt_all;
+	ret_value = odm_get_bb_reg(dm, ODM_REG_OFDM_FA_TYPE4_11AC, MASKDWORD);
+	fa_t->cnt_crc8_fail = (ret_value & 0xffff);
+	fa_t->cnt_mcs_fail = ((ret_value & 0xffff0000) >> 16);
 
-		false_alm_cnt->cnt_all = (false_alm_cnt->cnt_fast_fsync +
-					  false_alm_cnt->cnt_sb_search_fail +
-					  false_alm_cnt->cnt_parity_fail +
-					  false_alm_cnt->cnt_rate_illegal +
-					  false_alm_cnt->cnt_crc8_fail +
-					  false_alm_cnt->cnt_mcs_fail +
-					  false_alm_cnt->cnt_cck_fail);
+	ret_value = odm_get_bb_reg(dm, ODM_REG_OFDM_FA_TYPE5_11AC, MASKDWORD);
+	fa_t->cnt_crc8_fail_vht = (ret_value & 0xffff) +
+				  (ret_value & 0xffff0000 >> 16);
 
-		false_alm_cnt->cnt_cca_all = false_alm_cnt->cnt_ofdm_cca + false_alm_cnt->cnt_cck_cca;
+	ret_value = odm_get_bb_reg(dm, ODM_REG_OFDM_FA_TYPE6_11AC, MASKDWORD);
+	fa_t->cnt_mcs_fail_vht = (ret_value & 0xffff);
 
-		PHYDM_DBG(p_dm, DBG_FA_CNT,
-			("[OFDM FA Detail] Parity_Fail = (( %d )), Rate_Illegal = (( %d )), CRC8_fail = (( %d )), Mcs_fail = (( %d )), Fast_Fsync = (( %d )), SB_Search_fail = (( %d ))\n",
-			false_alm_cnt->cnt_parity_fail, false_alm_cnt->cnt_rate_illegal, false_alm_cnt->cnt_crc8_fail, false_alm_cnt->cnt_mcs_fail, false_alm_cnt->cnt_fast_fsync, false_alm_cnt->cnt_sb_search_fail));
-		
-	}
-#endif
+	/* read OFDM FA counter */
+	fa_t->cnt_ofdm_fail = odm_get_bb_reg(dm, R_0xf48, MASKLWORD);
 
-#if (ODM_IC_11AC_SERIES_SUPPORT == 1)
-	if (p_dm->support_ic_type & ODM_IC_11AC_SERIES) {
-		u32 cck_enable;
+	/* Read CCK FA counter */
+	fa_t->cnt_cck_fail = odm_get_bb_reg(dm, ODM_REG_CCK_FA_11AC, MASKLWORD);
 
-		/* read OFDM FA counter */
-		false_alm_cnt->cnt_ofdm_fail = odm_get_bb_reg(p_dm, ODM_REG_OFDM_FA_11AC, MASKLWORD);
+	/* read CCK/OFDM CCA counter */
+	ret_value = odm_get_bb_reg(dm, ODM_REG_CCK_CCA_CNT_11AC, MASKDWORD);
+	fa_t->cnt_ofdm_cca = (ret_value & 0xffff0000) >> 16;
+	fa_t->cnt_cck_cca = ret_value & 0xffff;
 
-		/* Read CCK FA counter */
-		false_alm_cnt->cnt_cck_fail = odm_get_bb_reg(p_dm, ODM_REG_CCK_FA_11AC, MASKLWORD);
+	/* read CCK CRC32 counter */
+	ret_value = odm_get_bb_reg(dm, ODM_REG_CCK_CRC32_CNT_11AC, MASKDWORD);
+	fa_t->cnt_cck_crc32_error = (ret_value & 0xffff0000) >> 16;
+	fa_t->cnt_cck_crc32_ok = ret_value & 0xffff;
 
-		/* read CCK/OFDM CCA counter */
-		ret_value = odm_get_bb_reg(p_dm, ODM_REG_CCK_CCA_CNT_11AC, MASKDWORD);
-		false_alm_cnt->cnt_ofdm_cca = (ret_value & 0xffff0000) >> 16;
-		false_alm_cnt->cnt_cck_cca = ret_value & 0xffff;
+	/* read OFDM CRC32 counter */
+	ret_value = odm_get_bb_reg(dm, ODM_REG_OFDM_CRC32_CNT_11AC, MASKDWORD);
+	fa_t->cnt_ofdm_crc32_error = (ret_value & 0xffff0000) >> 16;
+	fa_t->cnt_ofdm_crc32_ok = ret_value & 0xffff;
 
-		/* read CCK CRC32 counter */
-		ret_value = odm_get_bb_reg(p_dm, ODM_REG_CCK_CRC32_CNT_11AC, MASKDWORD);
-		false_alm_cnt->cnt_cck_crc32_error = (ret_value & 0xffff0000) >> 16;
-		false_alm_cnt->cnt_cck_crc32_ok = ret_value & 0xffff;
+	/* read HT CRC32 counter */
+	ret_value = odm_get_bb_reg(dm, ODM_REG_HT_CRC32_CNT_11AC, MASKDWORD);
+	fa_t->cnt_ht_crc32_error = (ret_value & 0xffff0000) >> 16;
+	fa_t->cnt_ht_crc32_ok = ret_value & 0xffff;
 
-		/* read OFDM CRC32 counter */
-		ret_value = odm_get_bb_reg(p_dm, ODM_REG_OFDM_CRC32_CNT_11AC, MASKDWORD);
-		false_alm_cnt->cnt_ofdm_crc32_error = (ret_value & 0xffff0000) >> 16;
-		false_alm_cnt->cnt_ofdm_crc32_ok = ret_value & 0xffff;
+	/* read VHT CRC32 counter */
+	ret_value = odm_get_bb_reg(dm, ODM_REG_VHT_CRC32_CNT_11AC, MASKDWORD);
+	fa_t->cnt_vht_crc32_error = (ret_value & 0xffff0000) >> 16;
+	fa_t->cnt_vht_crc32_ok = ret_value & 0xffff;
 
-		/* read HT CRC32 counter */
-		ret_value = odm_get_bb_reg(p_dm, ODM_REG_HT_CRC32_CNT_11AC, MASKDWORD);
-		false_alm_cnt->cnt_ht_crc32_error = (ret_value & 0xffff0000) >> 16;
-		false_alm_cnt->cnt_ht_crc32_ok = ret_value & 0xffff;
+	#if (RTL8881A_SUPPORT)
+	if (dm->support_ic_type == ODM_RTL8881A) {
+		u32 tmp = 0;
 
-		/* read VHT CRC32 counter */
-		ret_value = odm_get_bb_reg(p_dm, ODM_REG_VHT_CRC32_CNT_11AC, MASKDWORD);
-		false_alm_cnt->cnt_vht_crc32_error = (ret_value & 0xffff0000) >> 16;
-		false_alm_cnt->cnt_vht_crc32_ok = ret_value & 0xffff;
-
-#if (RTL8881A_SUPPORT == 1)
-		/* For 8881A */
-		if (p_dm->support_ic_type == ODM_RTL8881A) {
-			u32 cnt_ofdm_fail_temp = 0;
-
-			if (false_alm_cnt->cnt_ofdm_fail >= false_alm_cnt->cnt_ofdm_fail_pre) {
-				cnt_ofdm_fail_temp = false_alm_cnt->cnt_ofdm_fail_pre;
-				false_alm_cnt->cnt_ofdm_fail_pre = false_alm_cnt->cnt_ofdm_fail;
-				false_alm_cnt->cnt_ofdm_fail = false_alm_cnt->cnt_ofdm_fail - cnt_ofdm_fail_temp;
-			} else
-				false_alm_cnt->cnt_ofdm_fail_pre = false_alm_cnt->cnt_ofdm_fail;
-			PHYDM_DBG(p_dm, DBG_FA_CNT, ("odm_false_alarm_counter_statistics(): cnt_ofdm_fail=%d\n",	false_alm_cnt->cnt_ofdm_fail_pre));
-			PHYDM_DBG(p_dm, DBG_FA_CNT, ("odm_false_alarm_counter_statistics(): cnt_ofdm_fail_pre=%d\n",	cnt_ofdm_fail_temp));
-		}
-#endif
-		cck_enable =  odm_get_bb_reg(p_dm, ODM_REG_BB_RX_PATH_11AC, BIT(28));
-		if (cck_enable) { /* if(*p_dm->p_band_type == ODM_BAND_2_4G) */
-			false_alm_cnt->cnt_all = false_alm_cnt->cnt_ofdm_fail + false_alm_cnt->cnt_cck_fail;
-			false_alm_cnt->cnt_cca_all = false_alm_cnt->cnt_cck_cca + false_alm_cnt->cnt_ofdm_cca;
+		if (fa_t->cnt_ofdm_fail >= fa_t->cnt_ofdm_fail_pre) {
+			tmp = fa_t->cnt_ofdm_fail_pre;
+			fa_t->cnt_ofdm_fail_pre = fa_t->cnt_ofdm_fail;
+			fa_t->cnt_ofdm_fail = fa_t->cnt_ofdm_fail - tmp;
 		} else {
-			false_alm_cnt->cnt_all = false_alm_cnt->cnt_ofdm_fail;
-			false_alm_cnt->cnt_cca_all = false_alm_cnt->cnt_ofdm_cca;
+			fa_t->cnt_ofdm_fail_pre = fa_t->cnt_ofdm_fail;
 		}
+
+		PHYDM_DBG(dm, DBG_FA_CNT,
+			  "[8881]cnt_ofdm_fail{curr,pre}={%d,%d}\n",
+			  fa_t->cnt_ofdm_fail_pre, tmp);
 	}
-#endif
+	#endif
 
-	if (p_dm->support_ic_type != ODM_RTL8723D) {
-		if (phydm_set_bb_dbg_port(p_dm, BB_DBGPORT_PRIORITY_1, 0x0)) {/*set debug port to 0x0*/
-			false_alm_cnt->dbg_port0 = phydm_get_bb_dbg_port_value(p_dm);
-			phydm_release_bb_dbg_port(p_dm);
-		}
+	cck_enable = odm_get_bb_reg(dm, ODM_REG_BB_RX_PATH_11AC, BIT(28));
 
-		if (phydm_set_bb_dbg_port(p_dm, BB_DBGPORT_PRIORITY_1, adaptivity->adaptivity_dbg_port)) {
-			if (p_dm->support_ic_type & (ODM_RTL8723B | ODM_RTL8188E))
-				false_alm_cnt->edcca_flag = (boolean)((phydm_get_bb_dbg_port_value(p_dm) & BIT(30)) >> 30);
-			else
-				false_alm_cnt->edcca_flag = (boolean)((phydm_get_bb_dbg_port_value(p_dm) & BIT(29)) >> 29);
-			phydm_release_bb_dbg_port(p_dm);
-		}
+	if (cck_enable) { /* @if(*dm->band_type == ODM_BAND_2_4G) */
+		fa_t->cnt_all = fa_t->cnt_ofdm_fail + fa_t->cnt_cck_fail;
+		fa_t->cnt_cca_all = fa_t->cnt_cck_cca + fa_t->cnt_ofdm_cca;
 	} else {
-		false_alm_cnt->edcca_flag = (boolean)(odm_get_bb_reg(p_dm, 0x9a0, BIT(29)));
+		fa_t->cnt_all = fa_t->cnt_ofdm_fail;
+		fa_t->cnt_cca_all = fa_t->cnt_ofdm_cca;
+	}
+}
+#endif
+
+void phydm_get_dbg_port_info(void *dm_void)
+{
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct phydm_fa_struct *fa_t = &dm->false_alm_cnt;
+	u32 dbg_port = dm->adaptivity.adaptivity_dbg_port;
+	u32 val = 0;
+
+	/*set debug port to 0x0*/
+	if (phydm_set_bb_dbg_port(dm, DBGPORT_PRI_1, 0x0)) {
+		fa_t->dbg_port0 = phydm_get_bb_dbg_port_val(dm);
+		phydm_release_bb_dbg_port(dm);
 	}
 
+	if (dm->support_ic_type & ODM_RTL8723D) {
+		val = odm_get_bb_reg(dm, R_0x9a0, BIT(29));
+	} else if (dm->support_ic_type & ODM_IC_JGR3_SERIES) {
+		val = odm_get_bb_reg(dm, R_0x2d38, BIT(24));
+	} else if (phydm_set_bb_dbg_port(dm, DBGPORT_PRI_1, dbg_port)) {
+		if (dm->support_ic_type & (ODM_RTL8723B | ODM_RTL8188E))
+			val = (phydm_get_bb_dbg_port_val(dm) & BIT(30)) >> 30;
+		else
+			val = (phydm_get_bb_dbg_port_val(dm) & BIT(29)) >> 29;
+		phydm_release_bb_dbg_port(dm);
+	}
+
+	fa_t->edcca_flag = (boolean)val;
+
+	PHYDM_DBG(dm, DBG_FA_CNT, "FA_Cnt: Dbg port 0x0 = 0x%x, EDCCA = %d\n\n",
+		  fa_t->dbg_port0, fa_t->edcca_flag);
+}
 
-	phydm_false_alarm_counter_reg_reset(p_dm_void);
+void phydm_false_alarm_counter_statistics(void *dm_void)
+{
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct phydm_fa_struct *fa_t = &dm->false_alm_cnt;
 
-	false_alm_cnt->cnt_crc32_error_all = false_alm_cnt->cnt_vht_crc32_error + false_alm_cnt->cnt_ht_crc32_error + false_alm_cnt->cnt_ofdm_crc32_error + false_alm_cnt->cnt_cck_crc32_error;
-	false_alm_cnt->cnt_crc32_ok_all = false_alm_cnt->cnt_vht_crc32_ok + false_alm_cnt->cnt_ht_crc32_ok + false_alm_cnt->cnt_ofdm_crc32_ok + false_alm_cnt->cnt_cck_crc32_ok;
+	if (!(dm->support_ability & ODM_BB_FA_CNT))
+		return;
 
-	PHYDM_DBG(p_dm, DBG_FA_CNT, ("[CCA Cnt] {CCK, OFDM, Total} = {%d, %d, %d}\n",
-		false_alm_cnt->cnt_cck_cca, false_alm_cnt->cnt_ofdm_cca, false_alm_cnt->cnt_cca_all));
+	PHYDM_DBG(dm, DBG_FA_CNT, "%s======>\n", __func__);
 
-	PHYDM_DBG(p_dm, DBG_FA_CNT, ("[FA Cnt] {CCK, OFDM, Total} = {%d, %d, %d}\n",
-		false_alm_cnt->cnt_cck_fail, false_alm_cnt->cnt_ofdm_fail, false_alm_cnt->cnt_all));
+	if (dm->support_ic_type & ODM_IC_JGR3_SERIES) {
+		#ifdef PHYDM_IC_JGR3_SERIES_SUPPORT
+		phydm_fa_cnt_statistics_jgr3(dm);
+		#endif
+	} else if (dm->support_ic_type & ODM_IC_11N_SERIES) {
+		#if (ODM_IC_11N_SERIES_SUPPORT)
+		phydm_fa_cnt_statistics_n(dm);
+		#endif
+	} else if (dm->support_ic_type & ODM_IC_11AC_SERIES) {
+		#if (ODM_IC_11AC_SERIES_SUPPORT)
+		phydm_fa_cnt_statistics_ac(dm);
+		#endif
+	}
 
-	PHYDM_DBG(p_dm, DBG_FA_CNT, ("[CCK]  CRC32 {error, ok}= {%d, %d}\n", false_alm_cnt->cnt_cck_crc32_error, false_alm_cnt->cnt_cck_crc32_ok));
-	PHYDM_DBG(p_dm, DBG_FA_CNT, ("[OFDM]CRC32 {error, ok}= {%d, %d}\n", false_alm_cnt->cnt_ofdm_crc32_error, false_alm_cnt->cnt_ofdm_crc32_ok));
-	PHYDM_DBG(p_dm, DBG_FA_CNT, ("[ HT ]  CRC32 {error, ok}= {%d, %d}\n", false_alm_cnt->cnt_ht_crc32_error, false_alm_cnt->cnt_ht_crc32_ok));
-	PHYDM_DBG(p_dm, DBG_FA_CNT, ("[VHT]  CRC32 {error, ok}= {%d, %d}\n", false_alm_cnt->cnt_vht_crc32_error, false_alm_cnt->cnt_vht_crc32_ok));
-	PHYDM_DBG(p_dm, DBG_FA_CNT, ("[VHT]  CRC32 {error, ok}= {%d, %d}\n", false_alm_cnt->cnt_crc32_error_all, false_alm_cnt->cnt_crc32_ok_all));
-	PHYDM_DBG(p_dm, DBG_FA_CNT, ("FA_Cnt: Dbg port 0x0 = 0x%x, EDCCA = %d\n\n", false_alm_cnt->dbg_port0, false_alm_cnt->edcca_flag));
+	phydm_get_dbg_port_info(dm);
+	phydm_false_alarm_counter_reg_reset(dm_void);
+
+	fa_t->time_fa_all = fa_t->cnt_fast_fsync * 12 +
+			    fa_t->cnt_sb_search_fail * 12 +
+			    fa_t->cnt_parity_fail * 28 +
+			    fa_t->cnt_rate_illegal * 28 +
+			    fa_t->cnt_crc8_fail * 36 +
+			    fa_t->cnt_crc8_fail_vht * 36 +
+			    fa_t->cnt_mcs_fail_vht * 36 +
+			    fa_t->cnt_mcs_fail * 32 +
+			    fa_t->cnt_cck_fail * 80;
+
+	fa_t->cnt_crc32_error_all = fa_t->cnt_vht_crc32_error +
+				    fa_t->cnt_ht_crc32_error +
+				    fa_t->cnt_ofdm_crc32_error +
+				    fa_t->cnt_cck_crc32_error;
+
+	fa_t->cnt_crc32_ok_all = fa_t->cnt_vht_crc32_ok +
+				 fa_t->cnt_ht_crc32_ok +
+				 fa_t->cnt_ofdm_crc32_ok +
+				 fa_t->cnt_cck_crc32_ok;
+
+	PHYDM_DBG(dm, DBG_FA_CNT,
+		  "[OFDM FA Detail-1] Parity=((%d)), Rate_Illegal=((%d)), HT_CRC8=((%d)), HT_MCS=((%d))\n",
+		  fa_t->cnt_parity_fail, fa_t->cnt_rate_illegal,
+		  fa_t->cnt_crc8_fail, fa_t->cnt_mcs_fail);
+	PHYDM_DBG(dm, DBG_FA_CNT,
+		  "[OFDM FA Detail-2] Fast_Fsync=((%d)), SBD=((%d)), VHT_CRC8=((%d)), VHT_MCS=((%d))\n",
+		  fa_t->cnt_fast_fsync, fa_t->cnt_sb_search_fail,
+		  fa_t->cnt_crc8_fail_vht, fa_t->cnt_mcs_fail_vht);
+	PHYDM_DBG(dm, DBG_FA_CNT,
+		  "[CCA Cnt] {CCK, OFDM, Total} = {%d, %d, %d}\n",
+		  fa_t->cnt_cck_cca, fa_t->cnt_ofdm_cca, fa_t->cnt_cca_all);
+	PHYDM_DBG(dm, DBG_FA_CNT,
+		  "[FA Cnt] {CCK, OFDM, Total} = {%d, %d, %d}\n",
+		  fa_t->cnt_cck_fail, fa_t->cnt_ofdm_fail, fa_t->cnt_all);
+	PHYDM_DBG(dm, DBG_FA_CNT, "[CCK]  CRC32 {error, ok}= {%d, %d}\n",
+		  fa_t->cnt_cck_crc32_error, fa_t->cnt_cck_crc32_ok);
+	PHYDM_DBG(dm, DBG_FA_CNT, "[OFDM]CRC32 {error, ok}= {%d, %d}\n",
+		  fa_t->cnt_ofdm_crc32_error, fa_t->cnt_ofdm_crc32_ok);
+	PHYDM_DBG(dm, DBG_FA_CNT, "[ HT ]  CRC32 {error, ok}= {%d, %d}\n",
+		  fa_t->cnt_ht_crc32_error, fa_t->cnt_ht_crc32_ok);
+	PHYDM_DBG(dm, DBG_FA_CNT, "[VHT]  CRC32 {error, ok}= {%d, %d}\n",
+		  fa_t->cnt_vht_crc32_error, fa_t->cnt_vht_crc32_ok);
+	PHYDM_DBG(dm, DBG_FA_CNT, "[TOTAL]  CRC32 {error, ok}= {%d, %d}\n",
+		  fa_t->cnt_crc32_error_all, fa_t->cnt_crc32_ok_all);
 }
 
 #ifdef PHYDM_TDMA_DIG_SUPPORT
-void
-phydm_set_tdma_dig_timer(
-	void		*p_dm_void
-	)
+void phydm_set_tdma_dig_timer(void *dm_void)
 {
-	struct PHY_DM_STRUCT *p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	u32	delta_time_us = p_dm->tdma_dig_timer_ms * 1000;
-	struct phydm_dig_struct	*p_dig_t;
-	u32	timeout;
-	u32	current_time_stamp, diff_time_stamp, regb0;
-	
-	p_dig_t = &p_dm->dm_dig_table;
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	u32 delta_time_us = dm->tdma_dig_timer_ms * 1000;
+	struct phydm_dig_struct *dig_t = &dm->dm_dig_table;
+	u32 timeout = 0;
+	u32 current_time_stamp, diff_time_stamp, regb0 = 0;
+
 	/*some IC has no FREERUN_CUNT register, like 92E*/
-	if (p_dm->support_ic_type & ODM_RTL8197F)
-		current_time_stamp = odm_get_bb_reg(p_dm, 0x568, bMaskDWord);
+	if (dm->support_ic_type & ODM_RTL8197F)
+		current_time_stamp = odm_get_bb_reg(dm, R_0x568, 0xffffffff);
 	else
 		return;
 
 	timeout = current_time_stamp + delta_time_us;
 
-	diff_time_stamp = current_time_stamp - p_dig_t->cur_timestamp;
-	p_dig_t->pre_timestamp = p_dig_t->cur_timestamp;
-	p_dig_t->cur_timestamp = current_time_stamp;
-
-	/*HIMR0, it shows HW interrupt mask*/
-	regb0 = odm_get_bb_reg(p_dm, 0xb0, bMaskDWord);
-
-	PHYDM_DBG(p_dm, DBG_DIG,
-		("Set next tdma_dig_timer\n"));
-	PHYDM_DBG(p_dm, DBG_DIG,
-		("current_time_stamp=%d, delta_time_us=%d, timeout=%d, diff_time_stamp=%d, Reg0xb0 = 0x%x\n",
-		current_time_stamp,
-		delta_time_us,
-		timeout,
-		diff_time_stamp,
-		regb0));
-
-	if (p_dm->support_ic_type & ODM_RTL8197F)		/*REG_PS_TIMER2*/
-		odm_set_bb_reg(p_dm, 0x588, bMaskDWord, timeout);
+	diff_time_stamp = current_time_stamp - dig_t->cur_timestamp;
+	dig_t->pre_timestamp = dig_t->cur_timestamp;
+	dig_t->cur_timestamp = current_time_stamp;
+
+	/*@HIMR0, it shows HW interrupt mask*/
+	regb0 = odm_get_bb_reg(dm, R_0xb0, 0xffffffff);
+
+	PHYDM_DBG(dm, DBG_DIG, "Set next timer\n");
+	PHYDM_DBG(dm, DBG_DIG,
+		  "curr_time_stamp=%d, delta_time_us=%d\n",
+		  current_time_stamp, delta_time_us);
+	PHYDM_DBG(dm, DBG_DIG,
+		  "timeout=%d, diff_time_stamp=%d, Reg0xb0 = 0x%x\n",
+		  timeout, diff_time_stamp, regb0);
+
+	if (dm->support_ic_type & ODM_RTL8197F) /*REG_PS_TIMER2*/
+		odm_set_bb_reg(dm, R_0x588, 0xffffffff, timeout);
 	else {
-		PHYDM_DBG(p_dm, DBG_DIG,
-					("NOT 97F, TDMA-DIG timer does NOT start!\n"));
+		PHYDM_DBG(dm, DBG_DIG, "NOT 97F, NOT start\n");
 		return;
 	}
 }
 
-void
-phydm_tdma_dig_timer_check(
-	void		*p_dm_void
-	)
+void phydm_tdma_dig_timer_check(void *dm_void)
 {
-	struct PHY_DM_STRUCT *p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	struct phydm_dig_struct	*p_dig_t;
-
-	p_dig_t = &p_dm->dm_dig_table;
-	
-	PHYDM_DBG(p_dm, DBG_DIG,
-				("tdma_dig_cnt=%d, pre_tdma_dig_cnt=%d\n",
-				p_dig_t->tdma_dig_cnt,
-				p_dig_t->pre_tdma_dig_cnt));
-
-	if ((p_dig_t->tdma_dig_cnt == 0) ||
-		(p_dig_t->tdma_dig_cnt == p_dig_t->pre_tdma_dig_cnt)) {
-
-		if (p_dm->support_ability & ODM_BB_DIG) {
-			/*if interrupt mask info is got.*/
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct phydm_dig_struct *dig_t = &dm->dm_dig_table;
+
+	PHYDM_DBG(dm, DBG_DIG, "tdma_dig_cnt=%d, pre_tdma_dig_cnt=%d\n",
+		  dig_t->tdma_dig_cnt, dig_t->pre_tdma_dig_cnt);
+
+	if (dig_t->tdma_dig_cnt == 0 ||
+	    dig_t->tdma_dig_cnt == dig_t->pre_tdma_dig_cnt) {
+		if (dm->support_ability & ODM_BB_DIG) {
+#ifdef IS_USE_NEW_TDMA
+			if (dm->support_ic_type & (ODM_RTL8198F | ODM_RTL8814B |
+			    ODM_RTL8812F | ODM_RTL8822B | ODM_RTL8192F |
+			    ODM_RTL8821C)) {
+				PHYDM_DBG(dm, DBG_DIG,
+					  "Check fail, Restart timer\n\n");
+				phydm_false_alarm_counter_reset(dm);
+				odm_set_timer(dm, &dm->tdma_dig_timer,
+					      dm->tdma_dig_timer_ms);
+			} else {
+				PHYDM_DBG(dm, DBG_DIG,
+					  "Not 98F/14B/12F/22B/92F/21C no SW timer\n");
+			}
+#else
+			/*@if interrupt mask info is got.*/
 			/*Reg0xb0 is no longer needed*/
-			/*regb0 = odm_get_bb_reg(p_dm, 0xb0, bMaskDWord);*/
-			PHYDM_DBG(p_dm, DBG_DIG,
-						("Check fail, IntMask[0]=0x%x, restart tdma_dig_timer !!!\n",
-						*p_dm->p_interrupt_mask));
-
-			phydm_tdma_dig_add_interrupt_mask_handler(p_dm);
-			phydm_enable_rx_related_interrupt_handler(p_dm);
-			phydm_set_tdma_dig_timer(p_dm);
+#if 0
+			/*regb0 = odm_get_bb_reg(dm, R_0xb0, bMaskDWord);*/
+#endif
+			PHYDM_DBG(dm, DBG_DIG,
+				  "Check fail, Mask[0]=0x%x, restart timer\n",
+				  *dm->interrupt_mask);
+
+			phydm_tdma_dig_add_interrupt_mask_handler(dm);
+			phydm_enable_rx_related_interrupt_handler(dm);
+			phydm_set_tdma_dig_timer(dm);
+#endif
 		}
-	} else
-		PHYDM_DBG(p_dm, DBG_DIG,
-					("Check pass, update pre_tdma_dig_cnt\n"));
+	} else {
+		PHYDM_DBG(dm, DBG_DIG, "Check pass, update pre_tdma_dig_cnt\n");
+	}
 
-	p_dig_t->pre_tdma_dig_cnt = p_dig_t->tdma_dig_cnt;
+	dig_t->pre_tdma_dig_cnt = dig_t->tdma_dig_cnt;
 }
 
-/*different IC/team may use different timer for tdma-dig*/
-void
-phydm_tdma_dig_add_interrupt_mask_handler(
-	void		*p_dm_void
-	)
+/*@different IC/team may use different timer for tdma-dig*/
+void phydm_tdma_dig_add_interrupt_mask_handler(void *dm_void)
 {
-	struct PHY_DM_STRUCT *p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
 
 #if (DM_ODM_SUPPORT_TYPE == (ODM_AP))
-	if (p_dm->support_ic_type & ODM_RTL8197F)
-		phydm_add_interrupt_mask_handler(p_dm, HAL_INT_TYPE_PSTIMEOUT2);	/*HAL_INT_TYPE_PSTIMEOUT2*/
+	if (dm->support_ic_type & ODM_RTL8197F) {
+		/*@HAL_INT_TYPE_PSTIMEOUT2*/
+		phydm_add_interrupt_mask_handler(dm, HAL_INT_TYPE_PSTIMEOUT2);
+	}
 #elif (DM_ODM_SUPPORT_TYPE == (ODM_WIN))
 #elif (DM_ODM_SUPPORT_TYPE == (ODM_CE))
 #endif
 }
 
-void
-phydm_tdma_dig(
-	void		*p_dm_void
-	)
+/* will be triggered by HW timer*/
+void phydm_tdma_dig(void *dm_void)
 {
-	struct PHY_DM_STRUCT *p_dm;
-	struct phydm_dig_struct	*p_dig_t;
-	struct phydm_fa_struct *p_falm_cnt;
-	u32	reg_c50;
-	
-	p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	p_dig_t = &p_dm->dm_dig_table;
-	p_falm_cnt = &p_dm->false_alm_cnt;
-	reg_c50 = odm_get_bb_reg(p_dm, 0xc50, MASKBYTE0);
-
-	p_dig_t->tdma_dig_state =
-		p_dig_t->tdma_dig_cnt % p_dm->tdma_dig_state_number;
-
-	PHYDM_DBG(p_dm, DBG_DIG,
-				("tdma_dig_state=%d, regc50=0x%x\n",
-				p_dig_t->tdma_dig_state,
-				reg_c50));
-
-	p_dig_t->tdma_dig_cnt++;
-
-	if (p_dig_t->tdma_dig_state == 1) {
-		// update IGI from tdma_dig_state == 0
-		if (p_dig_t->cur_ig_value_tdma == 0)
-			p_dig_t->cur_ig_value_tdma = p_dig_t->cur_ig_value;
-
-		odm_write_dig(p_dm, p_dig_t->cur_ig_value_tdma);
-		phydm_tdma_false_alarm_counter_check(p_dm);
-		PHYDM_DBG(p_dm, DBG_DIG,
-			("tdma_dig_state=%d, reset FA counter !!!\n",
-			p_dig_t->tdma_dig_state));
-
-	} else if (p_dig_t->tdma_dig_state == 0) {
-		/* update p_dig_t->CurIGValue,*/
-		/* it may different from p_dig_t->cur_ig_value_tdma */
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct phydm_dig_struct *dig_t = &dm->dm_dig_table;
+	struct phydm_fa_struct *falm_cnt = &dm->false_alm_cnt;
+	u32 reg_c50 = 0;
+
+#if (RTL8198F_SUPPORT || RTL8814B_SUPPORT || RTL8812F_SUPPORT ||\
+	RTL8822B_SUPPORT || RTL8192F_SUPPORT || RTL8821C_SUPPORT)
+#ifdef IS_USE_NEW_TDMA
+	if (dm->support_ic_type &
+	    (ODM_RTL8198F | ODM_RTL8814B | ODM_RTL8812F | ODM_RTL8822B |
+	     ODM_RTL8192F | ODM_RTL8821C)) {
+		PHYDM_DBG(dm, DBG_DIG, "98F/14B/12F/22B/92F/21C, new tdma\n");
+		return;
+	}
+#endif
+#endif
+	reg_c50 = odm_get_bb_reg(dm, R_0xc50, MASKBYTE0);
+
+	dig_t->tdma_dig_state =
+		dig_t->tdma_dig_cnt % dm->tdma_dig_state_number;
+
+	PHYDM_DBG(dm, DBG_DIG, "tdma_dig_state=%d, regc50=0x%x\n",
+		  dig_t->tdma_dig_state, reg_c50);
+
+	dig_t->tdma_dig_cnt++;
+
+	if (dig_t->tdma_dig_state == 1) {
+		/* update IGI from tdma_dig_state == 0*/
+		if (dig_t->cur_ig_value_tdma == 0)
+			dig_t->cur_ig_value_tdma = dig_t->cur_ig_value;
+
+		odm_write_dig(dm, dig_t->cur_ig_value_tdma);
+		phydm_tdma_false_alarm_counter_check(dm);
+		PHYDM_DBG(dm, DBG_DIG, "tdma_dig_state=%d, reset FA counter\n",
+			  dig_t->tdma_dig_state);
+
+	} else if (dig_t->tdma_dig_state == 0) {
+		/* update dig_t->CurIGValue,*/
+		/* @it may different from dig_t->cur_ig_value_tdma */
 		/* TDMA IGI upperbond @ L-state = */
 		/* rf_ft_var.tdma_dig_low_upper_bond = 0x26 */
 
-		if (p_dig_t->cur_ig_value >= p_dm->tdma_dig_low_upper_bond)
-			p_dig_t->low_ig_value = p_dm->tdma_dig_low_upper_bond;
+		if (dig_t->cur_ig_value >= dm->tdma_dig_low_upper_bond)
+			dig_t->low_ig_value = dm->tdma_dig_low_upper_bond;
 		else
-			p_dig_t->low_ig_value = p_dig_t->cur_ig_value;
+			dig_t->low_ig_value = dig_t->cur_ig_value;
 
-		odm_write_dig(p_dm, p_dig_t->low_ig_value);
-		phydm_tdma_false_alarm_counter_check(p_dm);
-	} else
-		phydm_tdma_false_alarm_counter_check(p_dm);
+		odm_write_dig(dm, dig_t->low_ig_value);
+		phydm_tdma_false_alarm_counter_check(dm);
+	} else {
+		phydm_tdma_false_alarm_counter_check(dm);
+	}
 }
 
-/*============================================================*/
-/*FASLE ALARM CHECK*/
-/*============================================================*/
-
-void
-phydm_tdma_false_alarm_counter_check(
-	void		*p_dm_void
-	)
+/*@============================================================*/
+/*@FASLE ALARM CHECK*/
+/*@============================================================*/
+void phydm_tdma_false_alarm_counter_check(void *dm_void)
 {
-	struct PHY_DM_STRUCT	*p_dm;
-	struct phydm_fa_struct	*p_falm_cnt;
-	struct phydm_fa_acc_struct	*p_falm_cnt_acc;
-	struct phydm_dig_struct	*p_dig_t;
-	boolean	rssi_dump_en = 0;
-	u32 timestamp;
-	u8 tdma_dig_state_number;
-
-	p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	p_falm_cnt = &p_dm->false_alm_cnt;
-	p_falm_cnt_acc = &p_dm->false_alm_cnt_acc;
-	p_dig_t = &p_dm->dm_dig_table;
-
-	if (p_dig_t->tdma_dig_state == 1)
-		phydm_false_alarm_counter_reset(p_dm);
-		/* Reset FalseAlarmCounterStatistics */
-		/* fa_acc_1sec_tsf = fa_acc_1sec_tsf, keep */
-		/* fa_end_tsf = fa_start_tsf = TSF */
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct phydm_fa_struct *falm_cnt = &dm->false_alm_cnt;
+	struct phydm_fa_acc_struct *falm_cnt_acc = &dm->false_alm_cnt_acc;
+	struct phydm_dig_struct *dig_t = &dm->dm_dig_table;
+	boolean rssi_dump_en = 0;
+	u32 timestamp = 0;
+	u8 tdma_dig_state_number = 0;
+	u32 start_th = 0;
+
+	if (dig_t->tdma_dig_state == 1)
+		phydm_false_alarm_counter_reset(dm);
+	/* Reset FalseAlarmCounterStatistics */
+	/* @fa_acc_1sec_tsf = fa_acc_1sec_tsf, keep */
+	/* @fa_end_tsf = fa_start_tsf = TSF */
 	else {
-		odm_false_alarm_counter_statistics(p_dm);
-		if (p_dm->support_ic_type & ODM_RTL8197F)		/*REG_FREERUN_CNT*/
-			timestamp = odm_get_bb_reg(p_dm, 0x568, bMaskDWord);
+		phydm_false_alarm_counter_statistics(dm);
+		if (dm->support_ic_type & ODM_RTL8197F) /*REG_FREERUN_CNT*/
+			timestamp = odm_get_bb_reg(dm, R_0x568, bMaskDWord);
 		else {
-			PHYDM_DBG(p_dm, DBG_DIG,
-						("Caution! NOT 97F! TDMA-DIG timer does NOT start!!!\n"));
+			PHYDM_DBG(dm, DBG_DIG, "NOT 97F! NOT start\n");
 			return;
 		}
-		p_dig_t->fa_end_timestamp = timestamp;
-		p_dig_t->fa_acc_1sec_timestamp +=
-			(p_dig_t->fa_end_timestamp - p_dig_t->fa_start_timestamp);
+		dig_t->fa_end_timestamp = timestamp;
+		dig_t->fa_acc_1sec_timestamp +=
+			(dig_t->fa_end_timestamp - dig_t->fa_start_timestamp);
 
 		/*prevent dumb*/
-		if (p_dm->tdma_dig_state_number == 1)
-			p_dm->tdma_dig_state_number = 2;
+		if (dm->tdma_dig_state_number == 1)
+			dm->tdma_dig_state_number = 2;
 
-		tdma_dig_state_number = p_dm->tdma_dig_state_number;
-		p_dig_t->sec_factor =
+		tdma_dig_state_number = dm->tdma_dig_state_number;
+		dig_t->sec_factor =
 			tdma_dig_state_number / (tdma_dig_state_number - 1);
 
-		/*1sec = 1000000us*/
-		if (p_dig_t->fa_acc_1sec_timestamp >= (u32)(1000000 / p_dig_t->sec_factor)) {
+		/*@1sec = 1000000us*/
+		if (dig_t->sec_factor)
+			start_th = (u32)(1000000 / dig_t->sec_factor);
+
+		if (dig_t->fa_acc_1sec_timestamp >= start_th) {
 			rssi_dump_en = 1;
-			phydm_false_alarm_counter_acc(p_dm, rssi_dump_en);
-			PHYDM_DBG(p_dm, DBG_DIG,
-						("sec_factor = %u, total FA = %u, is_linked=%u\n",
-						p_dig_t->sec_factor,
-						p_falm_cnt_acc->cnt_all,
-						p_dm->is_linked));
-
-			phydm_noisy_detection(p_dm);
-			phydm_cck_pd_th(p_dm);
-			phydm_dig(p_dm);
-			phydm_false_alarm_counter_acc_reset(p_dm);
+			phydm_false_alarm_counter_acc(dm, rssi_dump_en);
+			PHYDM_DBG(dm, DBG_DIG,
+				  "sec_factor=%d, total FA=%d, is_linked=%d\n",
+				  dig_t->sec_factor, falm_cnt_acc->cnt_all,
+				  dm->is_linked);
+
+			phydm_noisy_detection(dm);
+			#ifdef PHYDM_SUPPORT_CCKPD
+			phydm_cck_pd_th(dm);
+			#endif
+			phydm_dig(dm);
+			phydm_false_alarm_counter_acc_reset(dm);
 
 			/* Reset FalseAlarmCounterStatistics */
-			/* fa_end_tsf = fa_start_tsf = TSF, keep */
-			/* fa_acc_1sec_tsf = 0 */
-			phydm_false_alarm_counter_reset(p_dm);
-		} else
-			phydm_false_alarm_counter_acc(p_dm, rssi_dump_en);
+			/* @fa_end_tsf = fa_start_tsf = TSF, keep */
+			/* @fa_acc_1sec_tsf = 0 */
+			phydm_false_alarm_counter_reset(dm);
+		} else {
+			phydm_false_alarm_counter_acc(dm, rssi_dump_en);
+		}
 	}
 }
 
-void
-phydm_false_alarm_counter_acc(
-	void		*p_dm_void,
-	boolean		rssi_dump_en
-	)
+void phydm_false_alarm_counter_acc(void *dm_void, boolean rssi_dump_en)
 {
-	struct PHY_DM_STRUCT	*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	struct phydm_fa_struct			*p_falm_cnt;
-	struct phydm_fa_acc_struct		*p_falm_cnt_acc;
-	struct phydm_dig_struct	*p_dig_t;
-	
-	p_falm_cnt = &p_dm->false_alm_cnt;
-	p_falm_cnt_acc = &p_dm->false_alm_cnt_acc;
-	p_dig_t = &p_dm->dm_dig_table;
-
-	p_falm_cnt_acc->cnt_parity_fail += p_falm_cnt->cnt_parity_fail;
-	p_falm_cnt_acc->cnt_rate_illegal += p_falm_cnt->cnt_rate_illegal;
-	p_falm_cnt_acc->cnt_crc8_fail += p_falm_cnt->cnt_crc8_fail;
-	p_falm_cnt_acc->cnt_mcs_fail += p_falm_cnt->cnt_mcs_fail;
-	p_falm_cnt_acc->cnt_ofdm_fail += p_falm_cnt->cnt_ofdm_fail;
-	p_falm_cnt_acc->cnt_cck_fail += p_falm_cnt->cnt_cck_fail;
-	p_falm_cnt_acc->cnt_all += p_falm_cnt->cnt_all;
-	p_falm_cnt_acc->cnt_fast_fsync += p_falm_cnt->cnt_fast_fsync;
-	p_falm_cnt_acc->cnt_sb_search_fail += p_falm_cnt->cnt_sb_search_fail;
-	p_falm_cnt_acc->cnt_ofdm_cca += p_falm_cnt->cnt_ofdm_cca;
-	p_falm_cnt_acc->cnt_cck_cca += p_falm_cnt->cnt_cck_cca;
-	p_falm_cnt_acc->cnt_cca_all += p_falm_cnt->cnt_cca_all;
-	p_falm_cnt_acc->cnt_cck_crc32_error += p_falm_cnt->cnt_cck_crc32_error;
-	p_falm_cnt_acc->cnt_cck_crc32_ok += p_falm_cnt->cnt_cck_crc32_ok;
-	p_falm_cnt_acc->cnt_ofdm_crc32_error += p_falm_cnt->cnt_ofdm_crc32_error;
-	p_falm_cnt_acc->cnt_ofdm_crc32_ok += p_falm_cnt->cnt_ofdm_crc32_ok;
-	p_falm_cnt_acc->cnt_ht_crc32_error += p_falm_cnt->cnt_ht_crc32_error;
-	p_falm_cnt_acc->cnt_ht_crc32_ok += p_falm_cnt->cnt_ht_crc32_ok;
-	p_falm_cnt_acc->cnt_vht_crc32_error += p_falm_cnt->cnt_vht_crc32_error;
-	p_falm_cnt_acc->cnt_vht_crc32_ok += p_falm_cnt->cnt_vht_crc32_ok;
-	p_falm_cnt_acc->cnt_crc32_error_all += p_falm_cnt->cnt_crc32_error_all;
-	p_falm_cnt_acc->cnt_crc32_ok_all += p_falm_cnt->cnt_crc32_ok_all;
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct phydm_fa_struct *falm_cnt = &dm->false_alm_cnt;
+	struct phydm_fa_acc_struct *falm_cnt_acc = &dm->false_alm_cnt_acc;
+	struct phydm_dig_struct *dig_t = &dm->dm_dig_table;
+
+	falm_cnt_acc->cnt_parity_fail += falm_cnt->cnt_parity_fail;
+	falm_cnt_acc->cnt_rate_illegal += falm_cnt->cnt_rate_illegal;
+	falm_cnt_acc->cnt_crc8_fail += falm_cnt->cnt_crc8_fail;
+	falm_cnt_acc->cnt_mcs_fail += falm_cnt->cnt_mcs_fail;
+	falm_cnt_acc->cnt_ofdm_fail += falm_cnt->cnt_ofdm_fail;
+	falm_cnt_acc->cnt_cck_fail += falm_cnt->cnt_cck_fail;
+	falm_cnt_acc->cnt_all += falm_cnt->cnt_all;
+	falm_cnt_acc->cnt_fast_fsync += falm_cnt->cnt_fast_fsync;
+	falm_cnt_acc->cnt_sb_search_fail += falm_cnt->cnt_sb_search_fail;
+	falm_cnt_acc->cnt_ofdm_cca += falm_cnt->cnt_ofdm_cca;
+	falm_cnt_acc->cnt_cck_cca += falm_cnt->cnt_cck_cca;
+	falm_cnt_acc->cnt_cca_all += falm_cnt->cnt_cca_all;
+	falm_cnt_acc->cnt_cck_crc32_error += falm_cnt->cnt_cck_crc32_error;
+	falm_cnt_acc->cnt_cck_crc32_ok += falm_cnt->cnt_cck_crc32_ok;
+	falm_cnt_acc->cnt_ofdm_crc32_error += falm_cnt->cnt_ofdm_crc32_error;
+	falm_cnt_acc->cnt_ofdm_crc32_ok += falm_cnt->cnt_ofdm_crc32_ok;
+	falm_cnt_acc->cnt_ht_crc32_error += falm_cnt->cnt_ht_crc32_error;
+	falm_cnt_acc->cnt_ht_crc32_ok += falm_cnt->cnt_ht_crc32_ok;
+	falm_cnt_acc->cnt_vht_crc32_error += falm_cnt->cnt_vht_crc32_error;
+	falm_cnt_acc->cnt_vht_crc32_ok += falm_cnt->cnt_vht_crc32_ok;
+	falm_cnt_acc->cnt_crc32_error_all += falm_cnt->cnt_crc32_error_all;
+	falm_cnt_acc->cnt_crc32_ok_all += falm_cnt->cnt_crc32_ok_all;
 
 	if (rssi_dump_en == 1) {
-		p_falm_cnt_acc->cnt_all_1sec =
-			p_falm_cnt_acc->cnt_all * p_dig_t->sec_factor;
-		p_falm_cnt_acc->cnt_cca_all_1sec =
-			p_falm_cnt_acc->cnt_cca_all * p_dig_t->sec_factor;
-		p_falm_cnt_acc->cnt_cck_fail_1sec =
-			p_falm_cnt_acc->cnt_cck_fail * p_dig_t->sec_factor;
+		falm_cnt_acc->cnt_all_1sec =
+			falm_cnt_acc->cnt_all * dig_t->sec_factor;
+		falm_cnt_acc->cnt_cca_all_1sec =
+			falm_cnt_acc->cnt_cca_all * dig_t->sec_factor;
+		falm_cnt_acc->cnt_cck_fail_1sec =
+			falm_cnt_acc->cnt_cck_fail * dig_t->sec_factor;
 	}
 }
 
-void
-phydm_false_alarm_counter_acc_reset(
-	void		*p_dm_void
-	)
+void phydm_false_alarm_counter_acc_reset(void *dm_void)
 {
-	struct PHY_DM_STRUCT *p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	struct phydm_fa_acc_struct *p_falm_cnt_acc;
-
-	p_falm_cnt_acc = &p_dm->false_alm_cnt_acc;
-
-	/* Cnt_all_for_rssi_dump & Cnt_CCA_all_for_rssi_dump */
-	/* do NOT need to be reset */
-	odm_memory_set(p_dm, p_falm_cnt_acc, 0, sizeof(p_falm_cnt_acc));
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct phydm_fa_acc_struct *falm_cnt_acc = NULL;
+
+#ifdef IS_USE_NEW_TDMA
+	struct phydm_fa_acc_struct *falm_cnt_acc_low = NULL;
+	u32 tmp_cca_1sec = 0;
+	u32 tmp_fa_1sec = 0;
+
+	/*@clear L-fa_acc struct*/
+	falm_cnt_acc_low = &dm->false_alm_cnt_acc_low;
+	tmp_cca_1sec = falm_cnt_acc_low->cnt_cca_all_1sec;
+	tmp_fa_1sec = falm_cnt_acc_low->cnt_all_1sec;
+	odm_memory_set(dm, falm_cnt_acc_low, 0, sizeof(dm->false_alm_cnt_acc));
+	falm_cnt_acc_low->cnt_cca_all_1sec = tmp_cca_1sec;
+	falm_cnt_acc_low->cnt_all_1sec = tmp_fa_1sec;
+
+	/*@clear H-fa_acc struct*/
+	falm_cnt_acc = &dm->false_alm_cnt_acc;
+	tmp_cca_1sec = falm_cnt_acc->cnt_cca_all_1sec;
+	tmp_fa_1sec = falm_cnt_acc->cnt_all_1sec;
+	odm_memory_set(dm, falm_cnt_acc, 0, sizeof(dm->false_alm_cnt_acc));
+	falm_cnt_acc->cnt_cca_all_1sec = tmp_cca_1sec;
+	falm_cnt_acc->cnt_all_1sec = tmp_fa_1sec;
+#else
+	falm_cnt_acc = &dm->false_alm_cnt_acc;
+	/* @Cnt_all_for_rssi_dump & Cnt_CCA_all_for_rssi_dump */
+	/* @do NOT need to be reset */
+	odm_memory_set(dm, falm_cnt_acc, 0, sizeof(falm_cnt_acc));
+#endif
 }
 
-void
-phydm_false_alarm_counter_reset(
-	void		*p_dm_void
-	)
+void phydm_false_alarm_counter_reset(void *dm_void)
 {
-	struct PHY_DM_STRUCT *p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	struct phydm_fa_struct *p_falm_cnt;
-	struct phydm_dig_struct	*p_dig_t;
-	u32	timestamp;
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct phydm_fa_struct *falm_cnt;
+	struct phydm_dig_struct *dig_t;
+	u32 timestamp;
 
-	p_falm_cnt = &p_dm->false_alm_cnt;
-	p_dig_t = &p_dm->dm_dig_table;
+	falm_cnt = &dm->false_alm_cnt;
+	dig_t = &dm->dm_dig_table;
 
-	memset(p_falm_cnt, 0, sizeof(p_dm->false_alm_cnt));
-	phydm_false_alarm_counter_reg_reset(p_dm);
+	memset(falm_cnt, 0, sizeof(dm->false_alm_cnt));
+	phydm_false_alarm_counter_reg_reset(dm);
 
-	if (p_dig_t->tdma_dig_state != 1)
-		p_dig_t->fa_acc_1sec_timestamp = 0;
+#ifdef IS_USE_NEW_TDMA
+	return;
+#endif
+	if (dig_t->tdma_dig_state != 1)
+		dig_t->fa_acc_1sec_timestamp = 0;
 	else
-		p_dig_t->fa_acc_1sec_timestamp = p_dig_t->fa_acc_1sec_timestamp;
+		dig_t->fa_acc_1sec_timestamp = dig_t->fa_acc_1sec_timestamp;
 
 	/*REG_FREERUN_CNT*/
-	timestamp = odm_get_bb_reg(p_dm, 0x568, bMaskDWord);
-	p_dig_t->fa_start_timestamp = timestamp;
-	p_dig_t->fa_end_timestamp = timestamp;
+	timestamp = odm_get_bb_reg(dm, R_0x568, bMaskDWord);
+	dig_t->fa_start_timestamp = timestamp;
+	dig_t->fa_end_timestamp = timestamp;
 }
 
-#endif	/*#ifdef PHYDM_TDMA_DIG_SUPPORT*/
+void phydm_tdma_dig_para_upd(void *dm_void, enum upd_type type, u8 input)
+{
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+
+	switch (type) {
+	case ENABLE_TDMA:
+		dm->original_dig_restore = !((boolean)input);
+		break;
+	case MODE_DECISION:
+		if (input == MODE_PERFORMANCE)
+			dm->tdma_dig_state_number = DIG_NUM_OF_TDMA_STATES + 2;
+		else if (input == MODE_COVERAGE)
+			dm->tdma_dig_state_number = DIG_NUM_OF_TDMA_STATES;
+		else
+			dm->tdma_dig_state_number = DIG_NUM_OF_TDMA_STATES;
+		break;
+	}
+}
 
-#ifdef PHYDM_LNA_SAT_CHK_SUPPORT
-void
-phydm_lna_sat_chk_init(
-	void		*p_dm_void
-	)
+#ifdef IS_USE_NEW_TDMA
+void phydm_tdma_dig_timers(void *dm_void, u8 state)
 {
-	struct PHY_DM_STRUCT	*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct phydm_dig_struct *dig_t = &dm->dm_dig_table;
+
+	if (state == INIT_TDMA_DIG_TIMMER)
+		odm_initialize_timer(dm, &dm->tdma_dig_timer,
+				     (void *)phydm_tdma_dig_cbk,
+				     NULL, "phydm_tdma_dig_timer");
+	else if (state == CANCEL_TDMA_DIG_TIMMER)
+		odm_cancel_timer(dm, &dm->tdma_dig_timer);
+	else if (state == RELEASE_TDMA_DIG_TIMMER)
+		odm_release_timer(dm, &dm->tdma_dig_timer);
+}
+
+u8 get_new_igi_bound(struct dm_struct *dm, u8 igi, u32 fa_cnt, u8 *rx_gain_max,
+		     u8 *rx_gain_min, boolean is_dfs_band)
+{
+	struct phydm_dig_struct *dig_t = &dm->dm_dig_table;
+	u8 step[3] = {0};
+	u8 cur_igi = igi;
+	boolean first_connect = false, first_dis_connect = false;
+
+	first_connect = (dm->is_linked) && !dig_t->is_media_connect;
+	first_dis_connect = (!dm->is_linked) && dig_t->is_media_connect;
+
+	if (dm->is_linked) {
+		if (dm->pre_rssi_min <= dm->rssi_min) {
+			PHYDM_DBG(dm, DBG_DIG, "pre_rssi_min <= rssi_min\n");
+			step[0] = 2;
+			step[1] = 1;
+			step[2] = 2;
+		} else {
+			step[0] = 4;
+			step[1] = 2;
+			step[2] = 2;
+		}
+	} else {
+		step[0] = 2;
+		step[1] = 1;
+		step[2] = 2;
+	}
 
-	struct phydm_lna_sat_info_struct *p_lna_info = &p_dm->dm_lna_sat_info;
+	PHYDM_DBG(dm, DBG_DIG, "step = {-%d, +%d, +%d}\n", step[2], step[1],
+		  step[0]);
 
-	PHYDM_DBG(p_dm, DBG_LNA_SAT_CHK, ("%s ==>\n", __FUNCTION__));
+	if (first_connect) {
+		if (is_dfs_band) {
+			if (dm->rssi_min > DIG_MAX_DFS)
+				igi = DIG_MAX_DFS;
+			else
+				igi = dm->rssi_min;
+			PHYDM_DBG(dm, DBG_DIG, "DFS band:IgiMax=0x%x\n",
+				  *rx_gain_max);
+		} else {
+			igi = *rx_gain_min;
+		}
+
+		#if 0
+		#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_CE))
+		#if (RTL8812A_SUPPORT)
+		if (dm->support_ic_type == ODM_RTL8812)
+			odm_config_bb_with_header_file(dm,
+						       CONFIG_BB_AGC_TAB_DIFF);
+		#endif
+		#endif
+		#endif
+		PHYDM_DBG(dm, DBG_DIG, "First connect: foce IGI=0x%x\n", igi);
+	} else {
+		/* @2 Before link */
+		PHYDM_DBG(dm, DBG_DIG, "Adjust IGI before link\n");
+
+		if (first_dis_connect) {
+			igi = dig_t->dm_dig_min;
+			PHYDM_DBG(dm, DBG_DIG,
+				  "First disconnect:foce IGI to lower bound\n");
+		} else {
+			PHYDM_DBG(dm, DBG_DIG, "Pre_IGI=((0x%x)), FA=((%d))\n",
+				  igi, fa_cnt);
+
+			igi = phydm_new_igi_by_fa(dm, igi, fa_cnt, step);
+		}
+	}
+	/*@Check IGI by dyn-upper/lower bound */
+	if (igi < *rx_gain_min)
+		igi = *rx_gain_min;
+
+	if (igi > *rx_gain_max)
+		igi = *rx_gain_max;
 
-	p_lna_info->check_time = 0;
-	p_lna_info->sat_cnt_acc_patha = 0;
-	p_lna_info->sat_cnt_acc_pathb = 0;
-	p_lna_info->cur_sat_status = 0;
-	p_lna_info->pre_sat_status = 0;
-	p_lna_info->cur_timer_check_cnt = 0;
-	p_lna_info->pre_timer_check_cnt = 0;
+	PHYDM_DBG(dm, DBG_DIG, "fa_cnt = %d, IGI: 0x%x -> 0x%x\n",
+		  fa_cnt, cur_igi, igi);
+
+	return igi;
 }
 
-void
-phydm_set_ofdm_agc_tab(
-	void	*p_dm_void,
-	u8		tab_sel
-)
+/*@callback function triggered by SW timer*/
+#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
+void phydm_tdma_dig_cbk(struct phydm_timer_list *timer)
+{
+	void *adapter = (void *)timer->Adapter;
+	HAL_DATA_TYPE *hal_data = GET_HAL_DATA(((PADAPTER)adapter));
+	struct dm_struct *dm = &hal_data->DM_OutSrc;
+
+	struct phydm_dig_struct *dig_t = &dm->dm_dig_table;
+
+	if (phydm_dig_abort(dm) || dm->original_dig_restore)
+		return;
+	/*@
+	 *PHYDM_DBG(dm, DBG_DIG, "timer callback =======> tdma_dig_state=%d\n");
+	 *	  dig_t->tdma_dig_state);
+	 *PHYDM_DBG(dm, DBG_DIG, "tdma_h_igi=0x%x, tdma_l_igi=0x%x\n",
+	 *	  dig_t->cur_ig_value_tdma,
+	 *	  dig_t->low_ig_value);
+	 */
+	phydm_tdma_fa_cnt_chk(dm);
+
+	/*@prevent dumb*/
+	if (dm->tdma_dig_state_number < 2)
+		dm->tdma_dig_state_number = 2;
+
+	/*@update state*/
+	dig_t->tdma_dig_cnt++;
+	dig_t->tdma_dig_state = dig_t->tdma_dig_cnt % dm->tdma_dig_state_number;
+
+	/*@
+	 *PHYDM_DBG(dm, DBG_DIG, "enter state %d, dig count %d\n",
+	 *	  dig_t->tdma_dig_state, dig_t->tdma_dig_cnt);
+	 */
+
+	if (dig_t->tdma_dig_state == TDMA_DIG_LOW_STATE)
+		odm_write_dig(dm, dig_t->low_ig_value);
+	else if (dig_t->tdma_dig_state >= TDMA_DIG_HIGH_STATE)
+		odm_write_dig(dm, dig_t->cur_ig_value_tdma);
+
+	odm_set_timer(dm, &dm->tdma_dig_timer, dm->tdma_dig_timer_ms);
+}
+#elif (DM_ODM_SUPPORT_TYPE == ODM_CE)
+void phydm_tdma_dig_cbk(void *dm_void)
 {
-	struct PHY_DM_STRUCT	*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	void *padapter = dm->adapter;
 
-	/* table sel:0/2, 1 is used for CCK */
-	if (tab_sel == OFDM_AGC_TAB_0)
-		odm_set_bb_reg(p_dm, 0xc70, 0x1e00, OFDM_AGC_TAB_0);
-	else if (tab_sel == OFDM_AGC_TAB_2)
-		odm_set_bb_reg(p_dm, 0xc70, 0x1e00, OFDM_AGC_TAB_2);
+	if (dm->support_interface == ODM_ITRF_PCIE)
+		phydm_tdma_dig_workitem_callback(dm);
+	/* @Can't do I/O in timer callback*/
 	else
-		odm_set_bb_reg(p_dm, 0xc70, 0x1e00, OFDM_AGC_TAB_0);
+		phydm_run_in_thread_cmd(dm, phydm_tdma_dig_workitem_callback,
+					dm);
 }
 
-u8
-phydm_get_ofdm_agc_tab(
-	void	*p_dm_void
-)
+void phydm_tdma_dig_workitem_callback(void *dm_void)
 {
-	struct PHY_DM_STRUCT	*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct phydm_dig_struct *dig_t = &dm->dm_dig_table;
 
-	return (u1Byte)odm_get_bb_reg(p_dm, 0xc70, 0x1e00);
+	if (phydm_dig_abort(dm) || (dm->original_dig_restore))
+		return;
+	/*@
+	 *PHYDM_DBG(dm, DBG_DIG, "timer callback =======> tdma_dig_state=%d\n");
+	 *	  dig_t->tdma_dig_state);
+	 *PHYDM_DBG(dm, DBG_DIG, "tdma_h_igi=0x%x, tdma_l_igi=0x%x\n",
+	 *	  dig_t->cur_ig_value_tdma,
+	 *	  dig_t->low_ig_value);
+	 */
+	phydm_tdma_fa_cnt_chk(dm);
+
+	/*@prevent dumb*/
+	if (dm->tdma_dig_state_number < 2)
+		dm->tdma_dig_state_number = 2;
+
+	/*@update state*/
+	dig_t->tdma_dig_cnt++;
+	dig_t->tdma_dig_state = dig_t->tdma_dig_cnt % dm->tdma_dig_state_number;
+
+	/*@
+	 *PHYDM_DBG(dm, DBG_DIG, "enter state %d, dig count %d\n",
+	 *	  dig_t->tdma_dig_state, dig_t->tdma_dig_cnt);
+	 */
+
+	if (dig_t->tdma_dig_state == TDMA_DIG_LOW_STATE)
+		odm_write_dig(dm, dig_t->low_ig_value);
+	else if (dig_t->tdma_dig_state >= TDMA_DIG_HIGH_STATE)
+		odm_write_dig(dm, dig_t->cur_ig_value_tdma);
+
+	odm_set_timer(dm, &dm->tdma_dig_timer, dm->tdma_dig_timer_ms);
 }
-
-void
-phydm_lna_sat_chk(
-	void		*p_dm_void
-	)
+#else
+void phydm_tdma_dig_cbk(void *dm_void)
 {
-	struct PHY_DM_STRUCT	*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	struct phydm_dig_struct	*p_dig_t = &p_dm->dm_dig_table;
-	struct phydm_lna_sat_info_struct *p_lna_info = &p_dm->dm_lna_sat_info;
-
-	u1Byte			igi_rssi_min, rssi_min = p_dm->rssi_min;
-	u4Byte			sat_status_patha, sat_status_pathb;
-	u1Byte			igi_restore = p_dig_t->cur_ig_value;
-	u1Byte			i, lna_sat_chk_cnt = p_dm->lna_sat_chk_cnt;
-	u4Byte			lna_sat_cnt_thd = 0;
-	u1Byte			agc_tab;
-	u4Byte			max_check_time = 0;
-
-	PHYDM_DBG(p_dm, DBG_LNA_SAT_CHK, ("\n%s ==>\n", __FUNCTION__));
-
-	if (!(p_dm->support_ability & ODM_BB_LNA_SAT_CHK)) {
-		PHYDM_DBG(p_dm, DBG_LNA_SAT_CHK,
-			("support ability is disabled, return.\n"));
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct phydm_dig_struct *dig_t = &dm->dm_dig_table;
+
+	if (phydm_dig_abort(dm) || dm->original_dig_restore)
 		return;
+	/*@
+	 *PHYDM_DBG(dm, DBG_DIG, "timer callback =======> tdma_dig_state=%d\n");
+	 *	  dig_t->tdma_dig_state);
+	 *PHYDM_DBG(dm, DBG_DIG, "tdma_h_igi=0x%x, tdma_l_igi=0x%x\n",
+	 *	  dig_t->cur_ig_value_tdma,
+	 *	  dig_t->low_ig_value);
+	 */
+	phydm_tdma_fa_cnt_chk(dm);
+
+	/*@prevent dumb*/
+	if (dm->tdma_dig_state_number < 2)
+		dm->tdma_dig_state_number = 2;
+
+	/*@update state*/
+	dig_t->tdma_dig_cnt++;
+	dig_t->tdma_dig_state = dig_t->tdma_dig_cnt % dm->tdma_dig_state_number;
+
+	/*@
+	 *PHYDM_DBG(dm, DBG_DIG, "enter state %d, dig count %d\n",
+	 *	  dig_t->tdma_dig_state, dig_t->tdma_dig_cnt);
+	 */
+
+	if (dig_t->tdma_dig_state == TDMA_DIG_LOW_STATE)
+		odm_write_dig(dm, dig_t->low_ig_value);
+	else if (dig_t->tdma_dig_state >= TDMA_DIG_HIGH_STATE)
+		odm_write_dig(dm, dig_t->cur_ig_value_tdma);
+
+	odm_set_timer(dm, &dm->tdma_dig_timer, dm->tdma_dig_timer_ms);
+}
+#endif
+/*@============================================================*/
+/*@FASLE ALARM CHECK*/
+/*@============================================================*/
+void phydm_tdma_fa_cnt_chk(void *dm_void)
+{
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct phydm_fa_struct *falm_cnt = &dm->false_alm_cnt;
+	struct phydm_fa_acc_struct *fa_t_acc = &dm->false_alm_cnt_acc;
+	struct phydm_fa_acc_struct *fa_t_acc_low = &dm->false_alm_cnt_acc_low;
+	struct phydm_dig_struct *dig_t = &dm->dm_dig_table;
+	boolean rssi_dump_en = false;
+	u32 timestamp = 0;
+	u8 states_per_block = dm->tdma_dig_state_number;
+	u8 cur_tdma_dig_state = 0;
+	u32 start_th = 0;
+	u8 state_diff = 0;
+	u32 tdma_dig_block_period_ms = 0;
+	u32 tdma_dig_block_cnt_thd = 0;
+	u32 timestamp_diff = 0;
+
+	/*@calculate duration of a tdma block*/
+	tdma_dig_block_period_ms = dm->tdma_dig_timer_ms * states_per_block;
+
+	/*@
+	 *caution!ONE_SEC_MS must be divisible by tdma_dig_block_period_ms,
+	 *or FA will be fewer.
+	 */
+	tdma_dig_block_cnt_thd = ONE_SEC_MS / tdma_dig_block_period_ms;
+
+	/*@tdma_dig_state == 0, collect H-state FA, else, collect L-state FA*/
+	if (dig_t->tdma_dig_state == TDMA_DIG_LOW_STATE)
+		cur_tdma_dig_state = TDMA_DIG_LOW_STATE;
+	else if (dig_t->tdma_dig_state >= TDMA_DIG_HIGH_STATE)
+		cur_tdma_dig_state = TDMA_DIG_HIGH_STATE;
+	/*@
+	 *PHYDM_DBG(dm, DBG_DIG, "in state %d, dig count %d\n",
+	 *	  cur_tdma_dig_state, dig_t->tdma_dig_cnt);
+	 */
+	if (cur_tdma_dig_state == 0) {
+		/*@L-state indicates next block*/
+		dig_t->tdma_dig_block_cnt++;
+
+		/*@1sec dump check*/
+		if (dig_t->tdma_dig_block_cnt >= tdma_dig_block_cnt_thd)
+			rssi_dump_en = true;
+
+		/*@
+		 *PHYDM_DBG(dm, DBG_DIG,"[L-state] tdma_dig_block_cnt=%d\n",
+		 *	  dig_t->tdma_dig_block_cnt);
+		 */
+
+		/*@collect FA till this block end*/
+		phydm_false_alarm_counter_statistics(dm);
+		phydm_fa_cnt_acc(dm, rssi_dump_en, cur_tdma_dig_state);
+		/*@1s L-FA collect end*/
+
+		/*@1sec dump reached*/
+		if (rssi_dump_en) {
+			/*@L-DIG*/
+			phydm_noisy_detection(dm);
+			#ifdef PHYDM_SUPPORT_CCKPD
+			phydm_cck_pd_th(dm);
+			#endif
+			PHYDM_DBG(dm, DBG_DIG, "run tdma L-state dig ====>\n");
+			phydm_tdma_low_dig(dm);
+			PHYDM_DBG(dm, DBG_DIG, "\n\n");
+		}
+	} else if (cur_tdma_dig_state == 1) {
+		/*@1sec dump check*/
+		if (dig_t->tdma_dig_block_cnt >= tdma_dig_block_cnt_thd)
+			rssi_dump_en = true;
+
+		/*@
+		 *PHYDM_DBG(dm, DBG_DIG,"[H-state] tdma_dig_block_cnt=%d\n",
+		 *	  dig_t->tdma_dig_block_cnt);
+		 */
+
+		/*@collect FA till this block end*/
+		phydm_false_alarm_counter_statistics(dm);
+		phydm_fa_cnt_acc(dm, rssi_dump_en, cur_tdma_dig_state);
+		/*@1s H-FA collect end*/
+
+		/*@1sec dump reached*/
+		state_diff = dm->tdma_dig_state_number - dig_t->tdma_dig_state;
+		if (rssi_dump_en && (state_diff == 1)) {
+			/*@H-DIG*/
+			phydm_noisy_detection(dm);
+			#ifdef PHYDM_SUPPORT_CCKPD
+			phydm_cck_pd_th(dm);
+			#endif
+			PHYDM_DBG(dm, DBG_DIG, "run tdma H-state dig ====>\n");
+			phydm_tdma_high_dig(dm);
+			PHYDM_DBG(dm, DBG_DIG, "\n\n");
+			PHYDM_DBG(dm, DBG_DIG, "1 sec reached, is_linked=%d\n",
+				  dm->is_linked);
+			PHYDM_DBG(dm, DBG_DIG, "1 sec L-CCA=%d, L-FA=%d\n",
+				  fa_t_acc_low->cnt_cca_all_1sec,
+				  fa_t_acc_low->cnt_all_1sec);
+			PHYDM_DBG(dm, DBG_DIG, "1 sec H-CCA=%d, H-FA=%d\n",
+				  fa_t_acc->cnt_cca_all_1sec,
+				  fa_t_acc->cnt_all_1sec);
+			PHYDM_DBG(dm, DBG_DIG,
+				  "1 sec TOTAL-CCA=%d, TOTAL-FA=%d\n\n",
+				  fa_t_acc->cnt_cca_all +
+				  fa_t_acc_low->cnt_cca_all,
+				  fa_t_acc->cnt_all + fa_t_acc_low->cnt_all);
+
+			/*@Reset AccFalseAlarmCounterStatistics */
+			phydm_false_alarm_counter_acc_reset(dm);
+			dig_t->tdma_dig_block_cnt = 0;
+		}
+	}
+	/*@Reset FalseAlarmCounterStatistics */
+	phydm_false_alarm_counter_reset(dm);
+}
+
+void phydm_tdma_low_dig(void *dm_void)
+{
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct phydm_dig_struct *dig_t = &dm->dm_dig_table;
+	struct phydm_fa_struct *falm_cnt = &dm->false_alm_cnt;
+	struct phydm_fa_acc_struct *falm_cnt_acc = &dm->false_alm_cnt_acc_low;
+#ifdef CFG_DIG_DAMPING_CHK
+	struct phydm_dig_recorder_strcut *dig_rc = &dig_t->dig_recorder_t;
+#endif
+	boolean first_connect, first_disconnect = false;
+	u8 igi = dig_t->cur_ig_value;
+	u8 new_igi = 0x20;
+	u8 tdma_l_igi = dig_t->low_ig_value;
+	u8 tdma_l_dym_min = dig_t->tdma_rx_gain_min[TDMA_DIG_LOW_STATE];
+	u8 tdma_l_dym_max = dig_t->tdma_rx_gain_max[TDMA_DIG_LOW_STATE];
+	u32 fa_cnt = falm_cnt->cnt_all;
+	boolean dfs_mode_en = false, is_performance = true;
+	u8 rssi_min = dm->rssi_min;
+	u8 igi_upper_rssi_min = 0;
+	u8 offset = 15;
+
+	if (!(dm->original_dig_restore)) {
+		if (tdma_l_igi == 0)
+			tdma_l_igi = igi;
+
+		fa_cnt = falm_cnt_acc->cnt_all_1sec;
 	}
 
-	if (p_dm->is_disable_lna_sat_chk) {
-		phydm_lna_sat_chk_init(p_dm);
-		PHYDM_DBG(p_dm, DBG_LNA_SAT_CHK,
-			("is_disable_lna_sat_chk=%d, return.\n", p_dm->is_disable_lna_sat_chk));
+	if (phydm_dig_abort(dm)) {
+		dig_t->low_ig_value = phydm_get_igi(dm, BB_PATH_A);
 		return;
 	}
 
-	//func_start = ODM_GetBBReg(pDM_Odm, 0x560, bMaskDWord);
+	/*@Mode Decision*/
+	dfs_mode_en = false;
+	is_performance = true;
 
-	// move igi to target pin of rssi_min
-	if ((rssi_min == 0) || (rssi_min == 0xff)) {
-		// adapt agc table 0
-		phydm_set_ofdm_agc_tab(p_dm, OFDM_AGC_TAB_0);
-		phydm_lna_sat_chk_init(p_dm);
-		return;
-	} else if (rssi_min % 2 != 0)
-		igi_rssi_min = rssi_min + DIFF_RSSI_TO_IGI - 1;
-	else
-		igi_rssi_min = rssi_min + DIFF_RSSI_TO_IGI;
+	/* @Abs Boundary Decision*/
+	dig_t->dm_dig_max = DIG_MAX_COVERAGR; //0x26
+	dig_t->dm_dig_min = DIG_MIN_PERFORMANCE; //0x20
+	dig_t->dig_max_of_min = DIG_MAX_OF_MIN_COVERAGE; //0x22
 
-	if ((p_dm->lna_sat_chk_period_ms > 0) && (p_dm->lna_sat_chk_period_ms <= ONE_SEC_MS))
-		max_check_time = lna_sat_chk_cnt*(ONE_SEC_MS/(p_dm->lna_sat_chk_period_ms))*5;
-	else
-		max_check_time = lna_sat_chk_cnt * 5;
-
-	lna_sat_cnt_thd = (max_check_time * p_dm->lna_sat_chk_duty_cycle)/100;
-
-	PHYDM_DBG(p_dm, DBG_LNA_SAT_CHK,
-		("check_time=%d, rssi_min=%d, igi_rssi_min=0x%x\nlna_sat_chk_cnt=%d, lna_sat_chk_period_ms=%d, max_check_time=%d, lna_sat_cnt_thd=%d\n",
-		p_lna_info->check_time,
-		rssi_min,
-		igi_rssi_min,
-		lna_sat_chk_cnt,
-		p_dm->lna_sat_chk_period_ms,
-		max_check_time,
-		lna_sat_cnt_thd));
-
-	odm_write_dig(p_dm, igi_rssi_min);
-
-	// adapt agc table 0 check saturation status
-	phydm_set_ofdm_agc_tab(p_dm, OFDM_AGC_TAB_0);
-	// open rf power detection ckt & set detection range
-	odm_set_rf_reg(p_dm, RF_PATH_A, 0x86, 0x1f, 0x10);
-	odm_set_rf_reg(p_dm, RF_PATH_B, 0x86, 0x1f, 0x10);
-
-	// check saturation status
-	for (i = 0; i < lna_sat_chk_cnt; i++) {
-		sat_status_patha = odm_get_rf_reg(p_dm, RF_PATH_A, 0xae, 0xc0000);
-		sat_status_pathb = odm_get_rf_reg(p_dm, RF_PATH_B, 0xae, 0xc0000);
-		if (sat_status_patha != 0)
-			p_lna_info->sat_cnt_acc_patha++;
-		if (sat_status_pathb != 0)
-			p_lna_info->sat_cnt_acc_pathb++;
-
-		if ((p_lna_info->sat_cnt_acc_patha >= lna_sat_cnt_thd) ||
-			(p_lna_info->sat_cnt_acc_pathb >= lna_sat_cnt_thd)) {
-			p_lna_info->cur_sat_status = 1;
-			PHYDM_DBG(p_dm, DBG_LNA_SAT_CHK,
-			("cur_sat_status=%d, check_time=%d\n",
-			p_lna_info->cur_sat_status,
-			p_lna_info->check_time));
-			break;
-		} else
-			p_lna_info->cur_sat_status = 0;
-	}
-
-	PHYDM_DBG(p_dm, DBG_LNA_SAT_CHK,
-		("cur_sat_status=%d, pre_sat_status=%d, sat_cnt_acc_patha=%d, sat_cnt_acc_pathb=%d\n",
-		p_lna_info->cur_sat_status,
-		p_lna_info->pre_sat_status,
-		p_lna_info->sat_cnt_acc_patha,
-		p_lna_info->sat_cnt_acc_pathb));
-
-	// agc table decision
-	if (p_lna_info->cur_sat_status) {
-		if (!p_dm->is_disable_gain_table_switch)
-			phydm_set_ofdm_agc_tab(p_dm, OFDM_AGC_TAB_2);
-		p_lna_info->check_time = 0;
-		p_lna_info->sat_cnt_acc_patha = 0;
-		p_lna_info->sat_cnt_acc_pathb = 0;
-		p_lna_info->pre_sat_status = p_lna_info->cur_sat_status;
-
-	} else if (p_lna_info->check_time <= (max_check_time - 1)) {
-		if (p_lna_info->pre_sat_status && (!p_dm->is_disable_gain_table_switch))
-			phydm_set_ofdm_agc_tab(p_dm, OFDM_AGC_TAB_2);
-		p_lna_info->check_time++;
-
-	} else if (p_lna_info->check_time == max_check_time) {
-		if (!p_dm->is_disable_gain_table_switch && (p_lna_info->pre_sat_status == 1))
-			phydm_set_ofdm_agc_tab(p_dm, OFDM_AGC_TAB_0);
-		p_lna_info->check_time = 0;
-		p_lna_info->sat_cnt_acc_patha = 0;
-		p_lna_info->sat_cnt_acc_pathb = 0;
-		p_lna_info->pre_sat_status = p_lna_info->cur_sat_status;
-	}
-
-	agc_tab = phydm_get_ofdm_agc_tab(p_dm);
-
-	PHYDM_DBG(p_dm, DBG_LNA_SAT_CHK, ("use AGC tab %d\n", agc_tab));
-	//func_end = ODM_GetBBReg(pDM_Odm, 0x560, bMaskDWord);
-
-	//PHYDM_DBG(pDM_Odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("function process time=%d\n",
-	//	func_end - func_start));
-
-	// restore previous igi
-	odm_write_dig(p_dm, igi_restore);
-	p_lna_info->cur_timer_check_cnt++;
-	odm_set_timer(p_dm, &p_lna_info->phydm_lna_sat_chk_timer, p_dm->lna_sat_chk_period_ms);
-}
+	if (dfs_mode_en) {
+		if (*dm->band_width == CHANNEL_WIDTH_20)
+			dig_t->dm_dig_min = DIG_MIN_DFS + 2;
+		else
+			dig_t->dm_dig_min = DIG_MIN_DFS;
 
-void
-phydm_lna_sat_chk_callback(
-	void		*p_dm_void
+	} else {
+		#if 0
+		if (dm->support_ic_type &
+		    (ODM_RTL8814A | ODM_RTL8812 | ODM_RTL8821 | ODM_RTL8822B))
+			dig_t->dm_dig_min = 0x1c;
+		else if (dm->support_ic_type & ODM_RTL8197F)
+			dig_t->dm_dig_min = 0x1e; /*@For HW setting*/
+		#endif
+	}
 
-	)
-{
-	struct PHY_DM_STRUCT	*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
+	PHYDM_DBG(dm, DBG_DIG, "Abs{Max, Min}={0x%x, 0x%x}, Max_of_min=0x%x\n",
+		  dig_t->dm_dig_max, dig_t->dm_dig_min, dig_t->dig_max_of_min);
 
-	PHYDM_DBG(p_dm, DBG_LNA_SAT_CHK, ("\n%s ==>\n", __FUNCTION__));
-	phydm_lna_sat_chk(p_dm);
-}
+	/* @Dyn Boundary by RSSI*/
+	if (!dm->is_linked) {
+		/*@if no link, always stay at lower bound*/
+		tdma_l_dym_max = 0x26;
+		tdma_l_dym_min = dig_t->dm_dig_min;
 
-void
-phydm_lna_sat_chk_timers(
-	void		*p_dm_void,
-	u8			state
-	)
-{
-	struct PHY_DM_STRUCT	*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	struct phydm_lna_sat_info_struct *p_lna_info = &p_dm->dm_lna_sat_info;
+		PHYDM_DBG(dm, DBG_DIG, "No-Link, Dyn{Max, Min}={0x%x, 0x%x}\n",
+			  tdma_l_dym_max, tdma_l_dym_min);
+	} else {
+		PHYDM_DBG(dm, DBG_DIG, "rssi_min=%d, ofst=%d\n",
+			  dm->rssi_min, offset);
+
+		/* @DIG lower bound in L-state*/
+		tdma_l_dym_min = dig_t->dm_dig_min;
+
+#ifdef CFG_DIG_DAMPING_CHK
+		/*@Limit Dyn min by damping*/
+		if (dig_t->dig_dl_en &&
+		    dig_rc->damping_limit_en &&
+		    tdma_l_dym_min < dig_rc->damping_limit_val) {
+			PHYDM_DBG(dm, DBG_DIG,
+				  "[Limit by Damping] dyn_min=0x%x -> 0x%x\n",
+				  tdma_l_dym_min, dig_rc->damping_limit_val);
+
+			tdma_l_dym_min = dig_rc->damping_limit_val;
+		}
+#endif
 
-	if (state == INIT_LNA_SAT_CHK_TIMMER) {
-		odm_initialize_timer(p_dm, &(p_lna_info->phydm_lna_sat_chk_timer),
-			(void *)phydm_lna_sat_chk_callback, NULL, "phydm_lna_sat_chk_timer");
-	} else if (state == CANCEL_LNA_SAT_CHK_TIMMER) {
-		odm_cancel_timer(p_dm, &(p_lna_info->phydm_lna_sat_chk_timer));
-	} else if (state == RELEASE_LNA_SAT_CHK_TIMMER) {
-		odm_release_timer(p_dm, &(p_lna_info->phydm_lna_sat_chk_timer));
+		/*@DIG upper bound in L-state*/
+		igi_upper_rssi_min = rssi_min + offset;
+		if (igi_upper_rssi_min > dig_t->dm_dig_max)
+			tdma_l_dym_max = dig_t->dm_dig_max;
+		else if (igi_upper_rssi_min < dig_t->dm_dig_min)
+			tdma_l_dym_max = dig_t->dm_dig_min;
+		else
+			tdma_l_dym_max = igi_upper_rssi_min;
+
+		/* @1 Force Lower Bound for AntDiv */
+		/*@
+		 *if (!dm->is_one_entry_only &&
+		 *(dm->support_ability & ODM_BB_ANT_DIV) &&
+		 *(dm->ant_div_type == CG_TRX_HW_ANTDIV ||
+		 *dm->ant_div_type == CG_TRX_SMART_ANTDIV)) {
+		 *if (dig_t->ant_div_rssi_max > dig_t->dig_max_of_min)
+		 *	dig_t->rx_gain_range_min = dig_t->dig_max_of_min;
+		 *else
+		 *	dig_t->rx_gain_range_min = (u8)dig_t->ant_div_rssi_max;
+		 *
+		 *PHYDM_DBG(dm, DBG_DIG, "Force Dyn-Min=0x%x, RSSI_max=0x%x\n",
+		 *	  dig_t->rx_gain_range_min, dig_t->ant_div_rssi_max);
+		 *}
+		 */
+
+		PHYDM_DBG(dm, DBG_DIG, "Dyn{Max, Min}={0x%x, 0x%x}\n",
+			  tdma_l_dym_max, tdma_l_dym_min);
 	}
-}
 
-void
-phydm_lna_sat_chk_watchdog(
-	void		*p_dm_void
-	)
-{
-	struct PHY_DM_STRUCT	*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	struct phydm_lna_sat_info_struct *p_lna_info = &p_dm->dm_lna_sat_info;
+	/*@Abnormal Case Check*/
+	/*@Abnormal lower bound case*/
+	if (tdma_l_dym_min > tdma_l_dym_max)
+		tdma_l_dym_min = tdma_l_dym_max;
+
+	PHYDM_DBG(dm, DBG_DIG,
+		  "Abnoraml chk, force {Max, Min}={0x%x, 0x%x}\n",
+		  tdma_l_dym_max, tdma_l_dym_min);
+
+	/*@False Alarm Threshold Decision*/
+	phydm_fa_threshold_check(dm, dfs_mode_en);
+
+	/*@Adjust Initial Gain by False Alarm*/
+	/*Select new IGI by FA */
+	if (!(dm->original_dig_restore)) {
+		tdma_l_igi = get_new_igi_bound(dm, tdma_l_igi, fa_cnt,
+					       &tdma_l_dym_max,
+					       &tdma_l_dym_min,
+					       dfs_mode_en);
+	} else {
+		new_igi = phydm_get_new_igi(dm, igi, fa_cnt, dfs_mode_en);
+	}
+
+	/*Update status*/
+	if (!(dm->original_dig_restore)) {
+		dig_t->low_ig_value = tdma_l_igi;
+		dig_t->tdma_rx_gain_min[TDMA_DIG_LOW_STATE] = tdma_l_dym_min;
+		dig_t->tdma_rx_gain_max[TDMA_DIG_LOW_STATE] = tdma_l_dym_max;
+#if 0
+		/*odm_write_dig(dm, tdma_l_igi);*/
+#endif
+	} else {
+		odm_write_dig(dm, new_igi);
+	}
 
-	u1Byte rssi_min = p_dm->rssi_min;
+	dig_t->is_media_connect = dm->is_linked;
+}
 
-	PHYDM_DBG(p_dm, DBG_LNA_SAT_CHK, ("\n%s ==>\n", __FUNCTION__));
+void phydm_tdma_high_dig(void *dm_void)
+{
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct phydm_dig_struct *dig_t = &dm->dm_dig_table;
+	struct phydm_fa_struct *falm_cnt = &dm->false_alm_cnt;
+	struct phydm_fa_acc_struct *falm_cnt_acc = &dm->false_alm_cnt_acc;
+#ifdef CFG_DIG_DAMPING_CHK
+	struct phydm_dig_recorder_strcut *dig_rc = &dig_t->dig_recorder_t;
+#endif
+	boolean first_connect, first_disconnect = false;
+	u8 igi = dig_t->cur_ig_value;
+	u8 new_igi = 0x20;
+	u8 tdma_h_igi = dig_t->cur_ig_value_tdma;
+	u8 tdma_h_dym_min = dig_t->tdma_rx_gain_min[TDMA_DIG_HIGH_STATE];
+	u8 tdma_h_dym_max = dig_t->tdma_rx_gain_max[TDMA_DIG_HIGH_STATE];
+	u32 fa_cnt = falm_cnt->cnt_all;
+	boolean dfs_mode_en = false, is_performance = true;
+	u8 rssi_min = dm->rssi_min;
+	u8 igi_upper_rssi_min = 0;
+	u8 offset = 15;
+
+	if (!(dm->original_dig_restore)) {
+		if (tdma_h_igi == 0)
+			tdma_h_igi = igi;
+
+		fa_cnt = falm_cnt_acc->cnt_all_1sec;
+	}
 
-	if (!(p_dm->support_ability & ODM_BB_LNA_SAT_CHK)) {
-		PHYDM_DBG(p_dm, DBG_LNA_SAT_CHK,
-			("support ability is disabled, return.\n"));
+	if (phydm_dig_abort(dm)) {
+		dig_t->cur_ig_value_tdma = phydm_get_igi(dm, BB_PATH_A);
 		return;
 	}
 
-	PHYDM_DBG(p_dm, DBG_LNA_SAT_CHK, ("pre_timer_check_cnt=%d, cur_timer_check_cnt=%d\n",
-		p_lna_info->pre_timer_check_cnt,
-		p_lna_info->cur_timer_check_cnt));
+	/*@Mode Decision*/
+	dfs_mode_en = false;
+	is_performance = true;
 
-	if (p_dm->is_disable_lna_sat_chk) {
-		phydm_lna_sat_chk_init(p_dm);
-		PHYDM_DBG(p_dm, DBG_LNA_SAT_CHK,
-			("is_disable_lna_sat_chk=%d, return.\n", p_dm->is_disable_lna_sat_chk));
-		return;
+	/*@Abs Boundary Decision*/
+	dig_t->dig_max_of_min = DIG_MAX_OF_MIN_BALANCE_MODE; // 0x2a
+
+	if (!dm->is_linked) {
+		dig_t->dm_dig_max = DIG_MAX_COVERAGR;
+		dig_t->dm_dig_min = DIG_MIN_PERFORMANCE; // 0x20
+	} else if (dfs_mode_en) {
+		if (*dm->band_width == CHANNEL_WIDTH_20)
+			dig_t->dm_dig_min = DIG_MIN_DFS + 2;
+		else
+			dig_t->dm_dig_min = DIG_MIN_DFS;
+
+		dig_t->dig_max_of_min = DIG_MAX_OF_MIN_BALANCE_MODE;
+		dig_t->dm_dig_max = DIG_MAX_BALANCE_MODE;
+	} else {
+		if (*dm->bb_op_mode == PHYDM_BALANCE_MODE) {
+		/*service > 2 devices*/
+			dig_t->dm_dig_max = DIG_MAX_BALANCE_MODE;
+			#if (DIG_HW == 1)
+			dig_t->dig_max_of_min = DIG_MIN_COVERAGE;
+			#else
+			dig_t->dig_max_of_min = DIG_MAX_OF_MIN_BALANCE_MODE;
+			#endif
+		} else if (*dm->bb_op_mode == PHYDM_PERFORMANCE_MODE) {
+		/*service 1 devices*/
+			dig_t->dm_dig_max = DIG_MAX_PERFORMANCE_MODE;
+			dig_t->dig_max_of_min = DIG_MAX_OF_MIN_PERFORMANCE_MODE;
+		}
+
+		#if 0
+		if (dm->support_ic_type &
+		    (ODM_RTL8814A | ODM_RTL8812 | ODM_RTL8821 | ODM_RTL8822B))
+			dig_t->dm_dig_min = 0x1c;
+		else if (dm->support_ic_type & ODM_RTL8197F)
+			dig_t->dm_dig_min = 0x1e; /*@For HW setting*/
+		else
+		#endif
+			dig_t->dm_dig_min = DIG_MIN_PERFORMANCE;
 	}
+	PHYDM_DBG(dm, DBG_DIG, "Abs{Max, Min}={0x%x, 0x%x}, Max_of_min=0x%x\n",
+		  dig_t->dm_dig_max, dig_t->dm_dig_min, dig_t->dig_max_of_min);
 
-	if ((p_dm->support_ic_type & ODM_RTL8197F) == 0) {
-		PHYDM_DBG(p_dm, DBG_LNA_SAT_CHK,
-			("SupportICType != ODM_RTL8197F, return.\n"));
-		return;
+	/*@Dyn Boundary by RSSI*/
+	if (!dm->is_linked) {
+		/*@if no link, always stay at lower bound*/
+		tdma_h_dym_max = dig_t->dig_max_of_min;
+		tdma_h_dym_min = dig_t->dm_dig_min;
+
+		PHYDM_DBG(dm, DBG_DIG, "No-Link, Dyn{Max, Min}={0x%x, 0x%x}\n",
+			  tdma_h_dym_max, tdma_h_dym_min);
+	} else {
+		PHYDM_DBG(dm, DBG_DIG, "rssi_min=%d, ofst=%d\n",
+			  dm->rssi_min, offset);
+
+		/* @DIG lower bound in H-state*/
+		if (rssi_min < dig_t->dm_dig_min)
+			tdma_h_dym_min = dig_t->dm_dig_min;
+		else
+			tdma_h_dym_min = rssi_min; // turbo not considered yet
+
+#ifdef CFG_DIG_DAMPING_CHK
+		/*@Limit Dyn min by damping*/
+		if (dig_t->dig_dl_en &&
+		    dig_rc->damping_limit_en &&
+		    tdma_h_dym_min < dig_rc->damping_limit_val) {
+			PHYDM_DBG(dm, DBG_DIG,
+				  "[Limit by Damping] dyn_min=0x%x -> 0x%x\n",
+				  tdma_h_dym_min, dig_rc->damping_limit_val);
+
+			tdma_h_dym_min = dig_rc->damping_limit_val;
+		}
+#endif
+
+		/*@DIG upper bound in H-state*/
+		igi_upper_rssi_min = rssi_min + offset;
+		if (igi_upper_rssi_min > dig_t->dm_dig_max)
+			tdma_h_dym_max = dig_t->dm_dig_max;
+		else
+			tdma_h_dym_max = igi_upper_rssi_min;
+
+		/* @1 Force Lower Bound for AntDiv */
+		/*@
+		 *if (!dm->is_one_entry_only &&
+		 *(dm->support_ability & ODM_BB_ANT_DIV) &&
+		 *(dm->ant_div_type == CG_TRX_HW_ANTDIV ||
+		 *dm->ant_div_type == CG_TRX_SMART_ANTDIV)) {
+		 *	if (dig_t->ant_div_rssi_max > dig_t->dig_max_of_min)
+		 *	dig_t->rx_gain_range_min = dig_t->dig_max_of_min;
+		 *	else
+		 *	dig_t->rx_gain_range_min = (u8)dig_t->ant_div_rssi_max;
+		 */
+		/*@
+		 *PHYDM_DBG(dm, DBG_DIG, "Force Dyn-Min=0x%x, RSSI_max=0x%x\n",
+		 *	  dig_t->rx_gain_range_min, dig_t->ant_div_rssi_max);
+		 *}
+		 */
+		PHYDM_DBG(dm, DBG_DIG, "Dyn{Max, Min}={0x%x, 0x%x}\n",
+			  tdma_h_dym_max, tdma_h_dym_min);
 	}
 
-	if ((rssi_min == 0) || (rssi_min == 0xff)) {
-		// adapt agc table 0
-		phydm_set_ofdm_agc_tab(p_dm, OFDM_AGC_TAB_0);
-		phydm_lna_sat_chk_init(p_dm);
-		PHYDM_DBG(p_dm, DBG_LNA_SAT_CHK,
-			("rssi_min=%d, return.\n", rssi_min));
-		return;
+	/*@Abnormal Case Check*/
+	/*@Abnormal low higher bound case*/
+	if (tdma_h_dym_max < dig_t->dm_dig_min)
+		tdma_h_dym_max = dig_t->dm_dig_min;
+	/*@Abnormal lower bound case*/
+	if (tdma_h_dym_min > tdma_h_dym_max)
+		tdma_h_dym_min = tdma_h_dym_max;
+
+	PHYDM_DBG(dm, DBG_DIG, "Abnoraml chk, force {Max, Min}={0x%x, 0x%x}\n",
+		  tdma_h_dym_max, tdma_h_dym_min);
+
+	/*@False Alarm Threshold Decision*/
+	phydm_fa_threshold_check(dm, dfs_mode_en);
+
+	/*@Adjust Initial Gain by False Alarm*/
+	/*Select new IGI by FA */
+	if (!(dm->original_dig_restore)) {
+		tdma_h_igi = get_new_igi_bound(dm, tdma_h_igi, fa_cnt,
+					       &tdma_h_dym_max,
+					       &tdma_h_dym_min,
+					       dfs_mode_en);
+	} else {
+		new_igi = phydm_get_new_igi(dm, igi, fa_cnt, dfs_mode_en);
 	}
 
-	if (p_lna_info->cur_timer_check_cnt == p_lna_info->pre_timer_check_cnt) {
-		PHYDM_DBG(p_dm, DBG_LNA_SAT_CHK, ("Timer check fail, restart timer.\n"));
-		phydm_lna_sat_chk(p_dm);
+	/*Update status*/
+	if (!(dm->original_dig_restore)) {
+		dig_t->cur_ig_value_tdma = tdma_h_igi;
+		dig_t->tdma_rx_gain_min[TDMA_DIG_HIGH_STATE] = tdma_h_dym_min;
+		dig_t->tdma_rx_gain_max[TDMA_DIG_HIGH_STATE] = tdma_h_dym_max;
+#if 0
+		/*odm_write_dig(dm, tdma_h_igi);*/
+#endif
 	} else {
-		PHYDM_DBG(p_dm, DBG_LNA_SAT_CHK, ("Timer check pass.\n"));
+		odm_write_dig(dm, new_igi);
 	}
-	p_lna_info->pre_timer_check_cnt = p_lna_info->cur_timer_check_cnt;
+
+	dig_t->is_media_connect = dm->is_linked;
 }
-#endif	/*#if (PHYDM_LNA_SAT_CHK_SUPPORT == 1)*/
-
-void
-phydm_dig_debug(
-	void		*p_dm_void,
-	char		input[][16],
-	u32		*_used,
-	char		*output,
-	u32		*_out_len,
-	u32		input_num
-)
+
+void phydm_fa_cnt_acc(void *dm_void, boolean rssi_dump_en,
+		      u8 cur_tdma_dig_state)
 {
-	struct PHY_DM_STRUCT	*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	struct phydm_dig_struct	*p_dig_t = &p_dm->dm_dig_table;
-	char		help[] = "-h";
-	char		monitor[] = "-m";
-	u32		var1[10] = {0};
-	u32		used = *_used;
-	u32		out_len = *_out_len;
-	u8		i;
-
-	if ((strcmp(input[1], help) == 0))
-		PHYDM_SNPRINTF((output + used, out_len - used, "{0} fa[0] fa[1] fa[2]\n"));
-	else if ((strcmp(input[1], monitor) == 0)) {
-		PHYDM_SNPRINTF((output + used, out_len - used,
-			"Read DIG fa_th[0:2]= {%d, %d, %d}\n", 
-			p_dig_t->fa_th[0], p_dig_t->fa_th[1], p_dig_t->fa_th[2]));
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct phydm_fa_struct *falm_cnt = &dm->false_alm_cnt;
+	struct phydm_fa_acc_struct *falm_cnt_acc = NULL;
+	struct phydm_dig_struct *dig_t = &dm->dm_dig_table;
+	u8 factor_num = 0;
+	u8 factor_denum = 1;
+	u8 total_state_number = 0;
+
+	if (cur_tdma_dig_state == TDMA_DIG_LOW_STATE)
+		falm_cnt_acc = &dm->false_alm_cnt_acc_low;
+	else if (cur_tdma_dig_state == TDMA_DIG_HIGH_STATE)
+
+		falm_cnt_acc = &dm->false_alm_cnt_acc;
+	/*@
+	 *PHYDM_DBG(dm, DBG_DIG,
+	 *	  "[%s] ==> dig_state=%d, one_sec=%d\n", __func__,
+	 *	  cur_tdma_dig_state, rssi_dump_en);
+	 */
+	falm_cnt_acc->cnt_parity_fail += falm_cnt->cnt_parity_fail;
+	falm_cnt_acc->cnt_rate_illegal += falm_cnt->cnt_rate_illegal;
+	falm_cnt_acc->cnt_crc8_fail += falm_cnt->cnt_crc8_fail;
+	falm_cnt_acc->cnt_mcs_fail += falm_cnt->cnt_mcs_fail;
+	falm_cnt_acc->cnt_ofdm_fail += falm_cnt->cnt_ofdm_fail;
+	falm_cnt_acc->cnt_cck_fail += falm_cnt->cnt_cck_fail;
+	falm_cnt_acc->cnt_all += falm_cnt->cnt_all;
+	falm_cnt_acc->cnt_fast_fsync += falm_cnt->cnt_fast_fsync;
+	falm_cnt_acc->cnt_sb_search_fail += falm_cnt->cnt_sb_search_fail;
+	falm_cnt_acc->cnt_ofdm_cca += falm_cnt->cnt_ofdm_cca;
+	falm_cnt_acc->cnt_cck_cca += falm_cnt->cnt_cck_cca;
+	falm_cnt_acc->cnt_cca_all += falm_cnt->cnt_cca_all;
+	falm_cnt_acc->cnt_cck_crc32_error += falm_cnt->cnt_cck_crc32_error;
+	falm_cnt_acc->cnt_cck_crc32_ok += falm_cnt->cnt_cck_crc32_ok;
+	falm_cnt_acc->cnt_ofdm_crc32_error += falm_cnt->cnt_ofdm_crc32_error;
+	falm_cnt_acc->cnt_ofdm_crc32_ok += falm_cnt->cnt_ofdm_crc32_ok;
+	falm_cnt_acc->cnt_ht_crc32_error += falm_cnt->cnt_ht_crc32_error;
+	falm_cnt_acc->cnt_ht_crc32_ok += falm_cnt->cnt_ht_crc32_ok;
+	falm_cnt_acc->cnt_vht_crc32_error += falm_cnt->cnt_vht_crc32_error;
+	falm_cnt_acc->cnt_vht_crc32_ok += falm_cnt->cnt_vht_crc32_ok;
+	falm_cnt_acc->cnt_crc32_error_all += falm_cnt->cnt_crc32_error_all;
+	falm_cnt_acc->cnt_crc32_ok_all += falm_cnt->cnt_crc32_ok_all;
+
+	/*@
+	 *PHYDM_DBG(dm, DBG_DIG,
+	 *	"[CCA Cnt]     {CCK, OFDM, Total} = {%d, %d, %d}\n",
+	 *	falm_cnt->cnt_cck_cca,
+	 *	falm_cnt->cnt_ofdm_cca,
+	 *	falm_cnt->cnt_cca_all);
+	 *PHYDM_DBG(dm, DBG_DIG,
+	 *	"[FA Cnt]      {CCK, OFDM, Total} = {%d, %d, %d}\n",
+	 *	falm_cnt->cnt_cck_fail,
+	 *	falm_cnt->cnt_ofdm_fail,
+	 *	falm_cnt->cnt_all);
+	 */
+	if (rssi_dump_en == 1) {
+		total_state_number = dm->tdma_dig_state_number;
+
+		if (cur_tdma_dig_state == TDMA_DIG_HIGH_STATE) {
+			factor_num = total_state_number;
+			factor_denum = total_state_number - 1;
+		} else if (cur_tdma_dig_state == TDMA_DIG_LOW_STATE) {
+			factor_num = total_state_number;
+			factor_denum = 1;
+		}
 
-	} else {
+		falm_cnt_acc->cnt_all_1sec =
+			falm_cnt_acc->cnt_all * factor_num / factor_denum;
+		falm_cnt_acc->cnt_cca_all_1sec =
+			falm_cnt_acc->cnt_cca_all * factor_num / factor_denum;
+		falm_cnt_acc->cnt_cck_fail_1sec =
+			falm_cnt_acc->cnt_cck_fail * factor_num / factor_denum;
+
+		PHYDM_DBG(dm, DBG_DIG,
+			  "[ACC CCA Cnt] {CCK, OFDM, Total} = {%d, %d, %d}\n",
+			  falm_cnt_acc->cnt_cck_cca,
+			  falm_cnt_acc->cnt_ofdm_cca,
+			  falm_cnt_acc->cnt_cca_all);
+		PHYDM_DBG(dm, DBG_DIG,
+			  "[ACC FA Cnt]  {CCK, OFDM, Total} = {%d, %d, %d}\n\n",
+			  falm_cnt_acc->cnt_cck_fail,
+			  falm_cnt_acc->cnt_ofdm_fail,
+			  falm_cnt_acc->cnt_all);
+
+	}
+}
+#endif /*@#ifdef IS_USE_NEW_TDMA*/
+#endif /*@#ifdef PHYDM_TDMA_DIG_SUPPORT*/
 
+void phydm_dig_debug(void *dm_void, char input[][16], u32 *_used, char *output,
+		     u32 *_out_len)
+{
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct phydm_dig_struct *dig_t = &dm->dm_dig_table;
+	char help[] = "-h";
+	u32 var1[10] = {0};
+	u32 used = *_used;
+	u32 out_len = *_out_len;
+	u8 i = 0;
+
+	if ((strcmp(input[1], help) == 0)) {
+		PDM_SNPF(out_len, used, output + used, out_len - used,
+			 "{0} {en} fa_th[0] fa_th[1] fa_th[2]\n");
+		PDM_SNPF(out_len, used, output + used, out_len - used,
+			 "{1} {Damping Limit en}\n");
+		#ifdef PHYDM_TDMA_DIG_SUPPORT
+		PDM_SNPF(out_len, used, output + used, out_len - used,
+			 "{2} {original_dig_restore = %d}\n",
+			 dm->original_dig_restore);
+		PDM_SNPF(out_len, used, output + used, out_len - used,
+			 "{3} {tdma_dig_timer_ms = %d}\n",
+			 dm->tdma_dig_timer_ms);
+		PDM_SNPF(out_len, used, output + used, out_len - used,
+			 "{4} {tdma_dig_state_number = %d}\n",
+			 dm->tdma_dig_state_number);
+		#endif
+	} else {
 		PHYDM_SSCANF(input[1], DCMD_DECIMAL, &var1[0]);
 
-		for (i = 1; i < 10; i++) {
-			if (input[i + 1])
-				PHYDM_SSCANF(input[i + 1], DCMD_DECIMAL, &var1[i]);
-		}
+		for (i = 1; i < 10; i++)
+			PHYDM_SSCANF(input[i + 1], DCMD_DECIMAL, &var1[i]);
 
 		if (var1[0] == 0) {
-			p_dig_t->is_dbg_fa_th = true;
-			p_dig_t->fa_th[0] =  (u16)var1[1];
-			p_dig_t->fa_th[1] =  (u16)var1[2];
-			p_dig_t->fa_th[2] =  (u16)var1[3];
+			if (var1[1] == 1) {
+				dig_t->is_dbg_fa_th = true;
+				dig_t->fa_th[0] = (u16)var1[2];
+				dig_t->fa_th[1] = (u16)var1[3];
+				dig_t->fa_th[2] = (u16)var1[4];
+
+				PDM_SNPF(out_len, used, output + used,
+					 out_len - used,
+					 "Set DIG fa_th[0:2]= {%d, %d, %d}\n",
+					 dig_t->fa_th[0], dig_t->fa_th[1],
+					 dig_t->fa_th[2]);
+			} else {
+				dig_t->is_dbg_fa_th = false;
+			}
+		#ifdef PHYDM_TDMA_DIG_SUPPORT
+		} else if (var1[0] == 2) {
+			dm->original_dig_restore = (u8)var1[1];
+			if (dm->original_dig_restore == 1) {
+				PDM_SNPF(out_len, used, output + used,
+					 out_len - used, "Disable TDMA-DIG\n");
+			} else {
+				PDM_SNPF(out_len, used, output + used,
+					 out_len - used, "Enable TDMA-DIG\n");
+			}
+		} else if (var1[0] == 3) {
+			dm->tdma_dig_timer_ms = (u8)var1[1];
+			PDM_SNPF(out_len, used, output + used,
+				 out_len - used, "tdma_dig_timer_ms = %d\n",
+				 dm->tdma_dig_timer_ms);
+		} else if (var1[0] == 4) {
+			dm->tdma_dig_state_number = (u8)var1[1];
+			PDM_SNPF(out_len, used, output + used,
+				 out_len - used, "tdma_dig_state_number = %d\n",
+				 dm->tdma_dig_state_number);
+		#endif
+		}
 
-			PHYDM_SNPRINTF((output + used, out_len - used,
-				"Set DIG fa_th[0:2]= {%d, %d, %d}\n", 
-				p_dig_t->fa_th[0], p_dig_t->fa_th[1], p_dig_t->fa_th[2]));
-		} else
-			p_dig_t->is_dbg_fa_th = false;
+		#ifdef CFG_DIG_DAMPING_CHK
+		else if (var1[0] == 1) {
+			dig_t->dig_dl_en = (u8)var1[1];
+			/*@*/
+		}
+		#endif
 	}
 	*_used = used;
 	*_out_len = out_len;
 }
 
+#ifdef CONFIG_MCC_DM
+#if (RTL8822B_SUPPORT)
+void phydm_mcc_igi_clr(void *dm_void, u8 clr_port)
+{
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct _phydm_mcc_dm_ *mcc_dm = &dm->mcc_dm;
+	mcc_dm->mcc_rssi[clr_port] = 0xff;
+	mcc_dm->mcc_dm_val[0][clr_port] = 0xff; /* 0xc50 clr */
+	mcc_dm->mcc_dm_val[1][clr_port] = 0xff; /* 0xe50 clr */
+}
+
+void phydm_mcc_igi_chk(void *dm_void)
+{
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct _phydm_mcc_dm_ *mcc_dm = &dm->mcc_dm;
+
+	if (mcc_dm->mcc_dm_val[0][0] == 0xff &&
+	    mcc_dm->mcc_dm_val[0][1] == 0xff) {
+		mcc_dm->mcc_dm_reg[0] = 0xffff;
+		mcc_dm->mcc_reg_id[0] = 0xff;
+	}
+	if (mcc_dm->mcc_dm_val[1][0] == 0xff &&
+	    mcc_dm->mcc_dm_val[1][1] == 0xff) {
+		mcc_dm->mcc_dm_reg[1] = 0xffff;
+		mcc_dm->mcc_reg_id[1] = 0xff;
+	}
+}
+
+void phydm_mcc_igi_cal(void *dm_void)
+{
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct _phydm_mcc_dm_ *mcc_dm = &dm->mcc_dm;
+	struct phydm_dig_struct *dig_t = &dm->dm_dig_table;
+	u8	shift = 0;
+	u8	igi_val0, igi_val1;
+	if (mcc_dm->mcc_rssi[0] == 0xff)
+		phydm_mcc_igi_clr(dm, 0);
+	if (mcc_dm->mcc_rssi[1] == 0xff)
+		phydm_mcc_igi_clr(dm, 1);
+	phydm_mcc_igi_chk(dm);
+	igi_val0 = mcc_dm->mcc_rssi[0] - shift;
+	igi_val1 = mcc_dm->mcc_rssi[1] - shift;
+	phydm_fill_mcccmd(dm, 0, 0xc50, igi_val0, igi_val1);
+	phydm_fill_mcccmd(dm, 1, 0xe50, igi_val0, igi_val1);
+	PHYDM_DBG(dm, DBG_COMP_MCC, "RSSI_min: %d %d, MCC_igi: %d %d\n",
+		  mcc_dm->mcc_rssi[0], mcc_dm->mcc_rssi[1],
+		  mcc_dm->mcc_dm_val[0][0], mcc_dm->mcc_dm_val[0][1]);
+}
+#endif /*#if (RTL8822B_SUPPORT)*/
+#endif /*#ifdef CONFIG_MCC_DM*/
diff --git a/rtl8723DS/hal/phydm/phydm_dig.h b/rtl8723DS/hal/phydm/phydm_dig.h
index 434e957..9800980 100755..100644
--- a/rtl8723DS/hal/phydm/phydm_dig.h
+++ b/rtl8723DS/hal/phydm/phydm_dig.h
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2007 - 2017 Realtek Corporation.
+ * Copyright(c) 2007 - 2017  Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -8,69 +8,79 @@
  *
  * This program is distributed in the hope that it will be useful, but WITHOUT
  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  * more details.
  *
+ * The full GNU General Public License is included in this distribution in the
+ * file called LICENSE.
+ *
+ * Contact Information:
+ * wlanfae <wlanfae@realtek.com>
+ * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
+ * Hsinchu 300, Taiwan.
+ *
+ * Larry Finger <Larry.Finger@lwfinger.net>
+ *
  *****************************************************************************/
 
-#ifndef	__PHYDMDIG_H__
-#define	__PHYDMDIG_H__
+#ifndef __PHYDMDIG_H__
+#define __PHYDMDIG_H__
+
+#define DIG_VERSION "2.3"
 
-/*#define DIG_VERSION	"1.4"*/		/* 2017.04.18  YuChen. refine DIG code structure*/
-/*#define DIG_VERSION	"2.0"*/		/* 2017.05.09  Dino. Move CCKPD to new files*/
-/*#define DIG_VERSION	"2.1"*/		/* 2017.06.01  YuChen. Refine DFS condition*/
-#define DIG_VERSION	"2.2"		/* 2017.06.13  YuChen. Remove MP dig*/
+#define	DIG_HW		0
+#define DIG_LIMIT_PERIOD 60 /*@60 sec*/
 
-#define DIG_HW		0
+/*@--------------------Define ---------------------------------------*/
 
-/*--------------------Define ---------------------------------------*/
+/*@=== [DIG Boundary] ========================================*/
+/*@DIG coverage mode*/
+#define	DIG_MAX_COVERAGR		0x26
+#define	DIG_MIN_COVERAGE		0x1c
+#define	DIG_MAX_OF_MIN_COVERAGE		0x22
 
-/*=== [DIG Boundary] ========================================*/
-/*DIG coverage mode*/
-#define		DIG_MAX_COVERAGR				0x26
-#define		DIG_MIN_COVERAGE				0x1c
-#define		DIG_MAX_OF_MIN_COVERAGE		0x22
-/*DIG performance mode*/
+/*@[DIG Balance mode]*/
 #if (DIG_HW == 1)
-#define		DIG_MAX_BALANCE_MODE		0x32
+#define	DIG_MAX_BALANCE_MODE		0x32
 #else
-#define		DIG_MAX_BALANCE_MODE		0x3e
+#define	DIG_MAX_BALANCE_MODE		0x3e
 #endif
-#define		DIG_MAX_OF_MIN_BALANCE_MODE		0x2a
+#define	DIG_MAX_OF_MIN_BALANCE_MODE	0x2a
 
-#define		DIG_MAX_PERFORMANCE_MODE		0x5a
-#define		DIG_MAX_OF_MIN_PERFORMANCE_MODE		0x40	/*from 3E -> 2A, refine by YuChen 2017/04/18*/
+/*@[DIG Performance mode]*/
+#define	DIG_MAX_PERFORMANCE_MODE	0x5a
+#define	DIG_MAX_OF_MIN_PERFORMANCE_MODE	0x40	/*@[WLANBB-871]*/
+#define	DIG_MIN_PERFORMANCE		0x20
 
-#define		DIG_MIN_PERFORMANCE			0x20
+/*@DIG DFS function*/
+#define	DIG_MAX_DFS			0x28
+#define	DIG_MIN_DFS			0x20
 
-/*DIG DFS function*/
-#define		DIG_MAX_DFS					0x28
-#define		DIG_MIN_DFS					0x20
+/*@DIG LPS function*/
+#define	DIG_MAX_LPS			0x3e
+#define	DIG_MIN_LPS			0x20
 
-/*DIG LPS function*/
-#define		DIG_MAX_LPS					0x3e
-#define		DIG_MIN_LPS					0x20
+#ifdef PHYDM_TDMA_DIG_SUPPORT
+#define DIG_NUM_OF_TDMA_STATES	2 /*@L, H state*/
+#define DIG_TIMER_MS			250
+#define	ONE_SEC_MS			1000
+#endif
 
-/*=== [DIG FA Threshold] ======================================*/
+/*@=== [DIG FA Threshold] ======================================*/
 
 /*Normal*/
-#define		DM_DIG_FA_TH0					500
-#define		DM_DIG_FA_TH1					750
-
-/*LPS*/
-#define		DM_DIG_FA_TH0_LPS			4	/* -> 4 lps */
-#define		DM_DIG_FA_TH1_LPS			15	/* -> 15 lps */
-#define		DM_DIG_FA_TH2_LPS			30	/* -> 30 lps */
+#define	DM_DIG_FA_TH0			500
+#define	DM_DIG_FA_TH1			750
 
-#define		RSSI_OFFSET_DIG_LPS			5
+/*@LPS*/
+#define	DM_DIG_FA_TH0_LPS		4	/* @-> 4 lps */
+#define	DM_DIG_FA_TH1_LPS		15	/* @-> 15 lps */
+#define	DM_DIG_FA_TH2_LPS		30	/* @-> 30 lps */
 
-/*LNA saturation check*/
-#define OFDM_AGC_TAB_0			0
-#define	OFDM_AGC_TAB_2			2
-#define	DIFF_RSSI_TO_IGI		10
-#define	ONE_SEC_MS				1000
+#define	RSSI_OFFSET_DIG_LPS		5
+#define DIG_RECORD_NUM			4
 
-/*--------------------Enum-----------------------------------*/
+/*@--------------------Enum-----------------------------------*/
 enum dig_goupcheck_level {
 	DIG_GOUPCHECK_LEVEL_0,
 	DIG_GOUPCHECK_LEVEL_1,
@@ -79,38 +89,76 @@ enum dig_goupcheck_level {
 
 enum phydm_dig_mode {
 	PHYDM_DIG_PERFORAMNCE_MODE	= 0,
-	PHYDM_DIG_COVERAGE_MODE	= 1,
+	PHYDM_DIG_COVERAGE_MODE		= 1,
 };
 
-enum lna_sat_timer_state {
-	INIT_LNA_SAT_CHK_TIMMER,
-	CANCEL_LNA_SAT_CHK_TIMMER,
-	RELEASE_LNA_SAT_CHK_TIMMER
+#ifdef PHYDM_TDMA_DIG_SUPPORT
+enum upd_type {
+	ENABLE_TDMA,
+	MODE_DECISION
 };
-/*--------------------Define Struct-----------------------------------*/
 
-struct phydm_dig_struct {
+enum tdma_opmode {
+	MODE_PERFORMANCE = 1,
+	MODE_COVERAGE = 2
+};
+
+#ifdef IS_USE_NEW_TDMA
+enum tdma_dig_timer {
+	INIT_TDMA_DIG_TIMMER,
+	CANCEL_TDMA_DIG_TIMMER,
+	RELEASE_TDMA_DIG_TIMMER
+};
+
+enum tdma_dig_state {
+	TDMA_DIG_LOW_STATE = 0,
+	TDMA_DIG_HIGH_STATE = 1,
+	NORMAL_DIG = 2
+};
+#endif
+#endif
+
+/*@--------------------Define Struct-----------------------------------*/
+#ifdef CFG_DIG_DAMPING_CHK
+struct phydm_dig_recorder_strcut {
+	u8		igi_bitmap; /*@Don't add any new parameter before this*/
+	u8		igi_history[DIG_RECORD_NUM];
+	u32		fa_history[DIG_RECORD_NUM];
+	u8		damping_limit_en;
+	u8		damping_limit_val; /*@Limit IGI_dyn_min*/
+	u32		limit_time;
+	u8		limit_rssi;
+};
+#endif
+
+struct phydm_mcc_dig {
+	u8		mcc_rssi_A;
+	u8		mcc_rssi_B;
+};
 
-	boolean	is_ignore_dig; /*for old pause function*/
-	boolean	is_dbg_fa_th;
-	u8		dig_mode_decision;
+struct phydm_dig_struct {
+#ifdef CFG_DIG_DAMPING_CHK
+	struct phydm_dig_recorder_strcut dig_recorder_t;
+	u8		dig_dl_en; /*@damping limit function enable*/
+#endif
+	boolean		is_dbg_fa_th;
 	u8		cur_ig_value;
 	u8		rvrt_val;
 	u8		igi_backup;
-	u8		rx_gain_range_max;	/*dig_dynamic_max*/
-	u8		rx_gain_range_min;	/*dig_dynamic_min*/
-	u8		dm_dig_max;			/*Absolutly upper bound*/
-	u8		dm_dig_min;			/*Absolutly lower bound*/
-	u8		dig_max_of_min;		/*Absolutly max of min*/
-	boolean	is_media_connect;
+	u8		rx_gain_range_max;	/*@dig_dynamic_max*/
+	u8		rx_gain_range_min;	/*@dig_dynamic_min*/
+	u8		dm_dig_max;		/*@Absolutly upper bound*/
+	u8		dm_dig_min;		/*@Absolutly lower bound*/
+	u8		dig_max_of_min;		/*@Absolutly max of min*/
+	boolean		is_media_connect;
 	u32		ant_div_rssi_max;
 	u8		*is_p2p_in_process;
-	u8		pause_lv_bitmap; /*bit-map of pause level*/
-	u8		pause_dig_value[PHYDM_PAUSE_MAX_NUM];
-	enum dig_goupcheck_level		dig_go_up_check_level;
-	u8		aaa_default;
+	enum dig_goupcheck_level	go_up_chk_lv;
 	u16		fa_th[3];
-#if (RTL8822B_SUPPORT == 1 || RTL8197F_SUPPORT == 1 || RTL8821C_SUPPORT == 1)
+#if (RTL8822B_SUPPORT || RTL8197F_SUPPORT || RTL8821C_SUPPORT ||\
+	RTL8198F_SUPPORT || RTL8192F_SUPPORT || RTL8195B_SUPPORT ||\
+	RTL8822C_SUPPORT || RTL8814B_SUPPORT || RTL8721D_SUPPORT ||\
+	RTL8812F_SUPPORT || RTL8197G_SUPPORT)
 	u8		rf_gain_idx;
 	u8		agc_table_idx;
 	u8		big_jump_lmt[16];
@@ -119,14 +167,14 @@ struct phydm_dig_struct {
 	u8		big_jump_step2:2;
 	u8		big_jump_step3:2;
 #endif
-	u8		dig_upcheck_initial_value;
-	u8		dig_level0_ratio_reciprocal;
-	u8		dig_level1_ratio_reciprocal;
+	u8		upcheck_init_val;
+	u8		lv0_ratio_reciprocal;
+	u8		lv1_ratio_reciprocal;
 #ifdef PHYDM_TDMA_DIG_SUPPORT
 	u8		cur_ig_value_tdma;
 	u8		low_ig_value;
-	u8		tdma_dig_state;	/*To distinguish which state is now.(L-sate or H-state)*/
-	u8		tdma_dig_cnt;	/*for phydm_tdma_dig_timer_check use*/
+	u8		tdma_dig_state;	/*@To distinguish which state is now.(L-sate or H-state)*/
+	u8		tdma_dig_cnt;	/*@for phydm_tdma_dig_timer_check use*/
 	u8		pre_tdma_dig_cnt;
 	u8		sec_factor;
 	u32		cur_timestamp;
@@ -134,18 +182,29 @@ struct phydm_dig_struct {
 	u32		fa_start_timestamp;
 	u32		fa_end_timestamp;
 	u32		fa_acc_1sec_timestamp;
-#endif	
+#ifdef IS_USE_NEW_TDMA
+	u8		tdma_dig_block_cnt;/*@for 1 second dump indicator use*/
+			/*@dynamic upper bound for L/H state*/
+	u8		tdma_rx_gain_max[DIG_NUM_OF_TDMA_STATES];
+			/*@dynamic lower bound for L/H state*/
+	u8		tdma_rx_gain_min[DIG_NUM_OF_TDMA_STATES];
+			/*To distinguish current state(L-sate or H-state)*/
+#endif
+#endif
 };
 
 struct phydm_fa_struct {
 	u32		cnt_parity_fail;
 	u32		cnt_rate_illegal;
 	u32		cnt_crc8_fail;
+	u32		cnt_crc8_fail_vht;
 	u32		cnt_mcs_fail;
+	u32		cnt_mcs_fail_vht;
 	u32		cnt_ofdm_fail;
-	u32		cnt_ofdm_fail_pre;	/* For RTL8881A */
+	u32		cnt_ofdm_fail_pre;	/* @For RTL8881A */
 	u32		cnt_cck_fail;
 	u32		cnt_all;
+	u32		cnt_all_accumulated;
 	u32		cnt_all_pre;
 	u32		cnt_fast_fsync;
 	u32		cnt_sb_search_fail;
@@ -166,10 +225,11 @@ struct phydm_fa_struct {
 	u32		cnt_vht_crc32_ok;
 	u32		cnt_crc32_error_all;
 	u32		cnt_crc32_ok_all;
-	boolean	cck_block_enable;
-	boolean	ofdm_block_enable;
+	u32		time_fa_all;
+	boolean		cck_block_enable;
+	boolean		ofdm_block_enable;
 	u32		dbg_port0;
-	boolean	edcca_flag;
+	boolean		edcca_flag;
 };
 
 #ifdef PHYDM_TDMA_DIG_SUPPORT
@@ -179,7 +239,7 @@ struct phydm_fa_acc_struct {
 	u32		cnt_crc8_fail;
 	u32		cnt_mcs_fail;
 	u32		cnt_ofdm_fail;
-	u32		cnt_ofdm_fail_pre;	/*For RTL8881A*/
+	u32		cnt_ofdm_fail_pre;	/*@For RTL8881A*/
 	u32		cnt_cck_fail;
 	u32		cnt_all;
 	u32		cnt_all_pre;
@@ -203,148 +263,75 @@ struct phydm_fa_acc_struct {
 	u32		cnt_cck_fail_1sec;
 };
 
-#endif	/*#ifdef PHYDM_TDMA_DIG_SUPPORT*/
-
-struct phydm_lna_sat_info_struct {
-	u32			sat_cnt_acc_patha;
-	u32			sat_cnt_acc_pathb;
-	u32			check_time;
-	boolean		pre_sat_status;
-	boolean		cur_sat_status;
-	struct timer_list	phydm_lna_sat_chk_timer;
-	u32			cur_timer_check_cnt;
-	u32			pre_timer_check_cnt;
-};
+#endif	/*@#ifdef PHYDM_TDMA_DIG_SUPPORT*/
+
+/*@--------------------Function declaration-----------------------------*/
+void phydm_write_dig_reg(void *dm_void, u8 igi);
+
+void odm_write_dig(void *dm_void, u8 current_igi);
 
-/*--------------------Function declaration-----------------------------*/
-void
-odm_write_dig(
-	void					*p_dm_void,
-	u8					current_igi
-);
-
-void
-phydm_set_dig_val(
-	void			*p_dm_void,
-	u32			*val_buf,
-	u8			val_len
-);
-
-void
-odm_pause_dig(
-	void					*p_dm_void,
-	enum phydm_pause_type		pause_type,
-	enum phydm_pause_level		pause_level,
-	u8					igi_value
-);
-
-void
-phydm_dig_init(
-	void					*p_dm_void
-);
-
-void
-phydm_dig(
-	void					*p_dm_void
-);
-
-void
-phydm_dig_lps_32k(
-	void		*p_dm_void
-);
-
-void
-phydm_dig_by_rssi_lps(
-	void					*p_dm_void
-);
-
-void
-odm_false_alarm_counter_statistics(
-	void					*p_dm_void
-);
+u8 phydm_get_igi(void *dm_void, enum bb_path path);
+
+void phydm_set_dig_val(void *dm_void, u32 *val_buf, u8 val_len);
+
+void odm_pause_dig(void *dm_void, enum phydm_pause_type pause_type,
+		   enum phydm_pause_level pause_level, u8 igi_value);
+
+void phydm_dig_init(void *dm_void);
+
+void phydm_dig(void *dm_void);
+
+void phydm_dig_lps_32k(void *dm_void);
+
+void phydm_dig_by_rssi_lps(void *dm_void);
+
+void phydm_false_alarm_counter_statistics(void *dm_void);
 
 #ifdef PHYDM_TDMA_DIG_SUPPORT
-void
-phydm_set_tdma_dig_timer(
-	void					*p_dm_void
-);
-
-void
-phydm_tdma_dig_timer_check(
-	void					*p_dm_void
-);
-
-void
-phydm_tdma_dig(
-	void		*p_dm_void
-);
-
-void
-phydm_tdma_false_alarm_counter_check(
-	void		*p_dm_void
-);
-
-void
-phydm_tdma_dig_add_interrupt_mask_handler(
-	void		*p_dm_void
-);
-
-void
-phydm_false_alarm_counter_reset(
-	void		*p_dm_void
-);
-
-void
-phydm_false_alarm_counter_acc(
-	void		*p_dm_void,
-	boolean		rssi_dump_en
-	);
-
-void
-phydm_false_alarm_counter_acc_reset(
-	void		*p_dm_void
-	);
-
-#endif	/*#ifdef PHYDM_TDMA_DIG_SUPPORT*/
-
-void
-phydm_set_ofdm_agc_tab(
-	void	*p_dm_void,
-	u8		tab_sel
-);
-
-#ifdef PHYDM_LNA_SAT_CHK_SUPPORT
-u8
-phydm_get_ofdm_agc_tab(
-	void	*p_dm_void
-);
-
-void
-phydm_lna_sat_chk(
-	void		*p_dm_void
-);
-
-void
-phydm_lna_sat_chk_timers(
-	void		*p_dm_void,
-	u8			state
-);
-
-void
-phydm_lna_sat_chk_watchdog(
-	void		*p_dm_void
-);
-
-#endif	/*#if (PHYDM_LNA_SAT_CHK_SUPPORT == 1)*/
-
-void
-phydm_dig_debug(
-	void		*p_dm_void,
-	char		input[][16],
-	u32		*_used,
-	char		*output,
-	u32		*_out_len,
-	u32		input_num
-);
+void phydm_set_tdma_dig_timer(void *dm_void);
+
+void phydm_tdma_dig_timer_check(void *dm_void);
+
+void phydm_tdma_dig(void *dm_void);
+
+void phydm_tdma_false_alarm_counter_check(void *dm_void);
+
+void phydm_tdma_dig_add_interrupt_mask_handler(void *dm_void);
+
+void phydm_false_alarm_counter_reset(void *dm_void);
+
+void phydm_false_alarm_counter_acc(void *dm_void, boolean rssi_dump_en);
+
+void phydm_false_alarm_counter_acc_reset(void *dm_void);
+
+void phydm_tdma_dig_para_upd(void *dm_void, enum upd_type type, u8 input);
+
+#ifdef IS_USE_NEW_TDMA
+void phydm_tdma_dig_timers(void *dm_void, u8 state);
+
+void phydm_tdma_dig_cbk(void *dm_void);
+
+void phydm_tdma_dig_workitem_callback(void *dm_void);
+
+void phydm_tdma_fa_cnt_chk(void *dm_void);
+
+void phydm_tdma_low_dig(void *dm_void);
+
+void phydm_tdma_high_dig(void *dm_void);
+
+void phydm_fa_cnt_acc(void *dm_void, boolean rssi_dump_en,
+		      u8 cur_tdma_dig_state);
+#endif /*@#ifdef IS_USE_NEW_TDMA*/
+#endif /*@#ifdef PHYDM_TDMA_DIG_SUPPORT*/
+
+void phydm_set_ofdm_agc_tab(void *dm_void, u8 tab_sel);
+
+void phydm_dig_debug(void *dm_void, char input[][16], u32 *_used, char *output,
+		     u32 *_out_len);
+
+#ifdef CONFIG_MCC_DM
+void phydm_mcc_igi_cal(void *dm_void);
+#endif
+
 
 #endif
diff --git a/rtl8723DS/hal/phydm/phydm_dynamic_rx_path.c b/rtl8723DS/hal/phydm/phydm_dynamic_rx_path.c
deleted file mode 100755
index 84b6db9..0000000
--- a/rtl8723DS/hal/phydm/phydm_dynamic_rx_path.c
+++ b/dev/null
@@ -1,355 +0,0 @@
-/******************************************************************************
- *
- * Copyright(c) 2007 - 2017 Realtek Corporation.
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of version 2 of the GNU General Public License as
- * published by the Free Software Foundation.
- *
- * This program is distributed in the hope that it will be useful, but WITHOUT
- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
- * more details.
- *
- *****************************************************************************/
-
-/* ************************************************************
- * include files
- * ************************************************************ */
-#include "mp_precomp.h"
-#include "phydm_precomp.h"
-
-#ifdef CONFIG_DYNAMIC_RX_PATH
-
-void
-phydm_process_phy_status_for_dynamic_rx_path(
-	void			*p_dm_void,
-	void			*p_phy_info_void,
-	void			*p_pkt_info_void
-)
-{
-	struct PHY_DM_STRUCT				*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	struct phydm_phyinfo_struct		*p_phy_info = (struct phydm_phyinfo_struct *)p_phy_info_void;
-	struct phydm_perpkt_info_struct		*p_pktinfo = (struct phydm_perpkt_info_struct *)p_pkt_info_void;
-	struct _DYNAMIC_RX_PATH_					*p_dm_drp_table	= &(p_dm->dm_drp_table);
-	/*u8					is_cck_rate=0;*/
-
-
-
-}
-
-void
-phydm_drp_get_statistic(
-	void			*p_dm_void
-)
-{
-	struct PHY_DM_STRUCT					*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	struct _DYNAMIC_RX_PATH_						*p_dm_drp_table = &(p_dm->dm_drp_table);
-	struct phydm_fa_struct		*false_alm_cnt = (struct phydm_fa_struct *)phydm_get_structure(p_dm, PHYDM_FALSEALMCNT);
-
-	odm_false_alarm_counter_statistics(p_dm);
-
-	PHYDM_DBG(p_dm, DBG_DYN_RX_PATH, ("[CCA Cnt] {CCK, OFDM, Total} = {%d, %d, %d}\n",
-		false_alm_cnt->cnt_cck_cca, false_alm_cnt->cnt_ofdm_cca, false_alm_cnt->cnt_cca_all));
-
-	PHYDM_DBG(p_dm, DBG_DYN_RX_PATH, ("[FA Cnt] {CCK, OFDM, Total} = {%d, %d, %d}\n",
-		false_alm_cnt->cnt_cck_fail, false_alm_cnt->cnt_ofdm_fail, false_alm_cnt->cnt_all));
-}
-
-void
-phydm_dynamic_rx_path(
-	void			*p_dm_void
-)
-{
-	struct PHY_DM_STRUCT				*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	struct _DYNAMIC_RX_PATH_					*p_dm_drp_table	= &(p_dm->dm_drp_table);
-	u8		training_set_timmer_en;
-	u8		curr_drp_state;
-	u32		rx_ok_cal;
-	u32		RSSI = 0;
-	struct phydm_fa_struct		*false_alm_cnt = (struct phydm_fa_struct *)phydm_get_structure(p_dm, PHYDM_FALSEALMCNT);
-
-	if (!(p_dm->support_ability & ODM_BB_DYNAMIC_RX_PATH)) {
-		PHYDM_DBG(p_dm, DBG_DYN_RX_PATH, ("[Return Init]   Not Support Dynamic RX PAth\n"));
-		return;
-	}
-
-	PHYDM_DBG(p_dm, DBG_DYN_RX_PATH, ("Current drp_state = ((%d))\n", p_dm_drp_table->drp_state));
-
-	curr_drp_state = p_dm_drp_table->drp_state;
-
-	if (p_dm_drp_table->drp_state == DRP_INIT_STATE) {
-
-		phydm_drp_get_statistic(p_dm);
-
-		if (false_alm_cnt->cnt_crc32_ok_all > 20) {
-			PHYDM_DBG(p_dm, DBG_DYN_RX_PATH, ("[Stop DRP Training] cnt_crc32_ok_all = ((%d))\n", false_alm_cnt->cnt_crc32_ok_all));
-			p_dm_drp_table->drp_state  = DRP_INIT_STATE;
-			training_set_timmer_en = false;
-		} else {
-			PHYDM_DBG(p_dm, DBG_DYN_RX_PATH, ("[Start DRP Training] cnt_crc32_ok_all = ((%d))\n", false_alm_cnt->cnt_crc32_ok_all));
-			p_dm_drp_table->drp_state  = DRP_TRAINING_STATE_0;
-			p_dm_drp_table->curr_rx_path = BB_PATH_AB;
-			training_set_timmer_en = true;
-		}
-
-	} else if (p_dm_drp_table->drp_state == DRP_TRAINING_STATE_0) {
-
-		phydm_drp_get_statistic(p_dm);
-
-		p_dm_drp_table->curr_cca_all_cnt_0 = false_alm_cnt->cnt_cca_all;
-		p_dm_drp_table->curr_fa_all_cnt_0 = false_alm_cnt->cnt_all;
-
-		p_dm_drp_table->drp_state  = DRP_TRAINING_STATE_1;
-		p_dm_drp_table->curr_rx_path = BB_PATH_B;
-		training_set_timmer_en = true;
-
-	} else if (p_dm_drp_table->drp_state == DRP_TRAINING_STATE_1) {
-
-		phydm_drp_get_statistic(p_dm);
-
-		p_dm_drp_table->curr_cca_all_cnt_1 = false_alm_cnt->cnt_cca_all;
-		p_dm_drp_table->curr_fa_all_cnt_1 = false_alm_cnt->cnt_all;
-
-#if 1
-		p_dm_drp_table->drp_state  = DRP_DECISION_STATE;
-#else
-
-		if (*(p_dm->p_mp_mode)) {
-			rx_ok_cal = p_dm->phy_dbg_info.num_qry_phy_status_cck + p_dm->phy_dbg_info.num_qry_phy_status_ofdm;
-			RSSI = (rx_ok_cal != 0) ? p_dm->rx_pwdb_ave / rx_ok_cal : 0;
-			PHYDM_DBG(p_dm, DBG_DYN_RX_PATH, ("MP RSSI = ((%d))\n", RSSI));
-		}
-
-		if (RSSI > p_dm_drp_table->rssi_threshold)
-
-			p_dm_drp_table->drp_state  = DRP_DECISION_STATE;
-
-		else  {
-
-			p_dm_drp_table->drp_state  = DRP_TRAINING_STATE_2;
-			p_dm_drp_table->curr_rx_path = BB_PATH_A;
-			training_set_timmer_en = true;
-		}
-#endif
-	} else if (p_dm_drp_table->drp_state == DRP_TRAINING_STATE_2) {
-
-		phydm_drp_get_statistic(p_dm);
-
-		p_dm_drp_table->curr_cca_all_cnt_2 = false_alm_cnt->cnt_cca_all;
-		p_dm_drp_table->curr_fa_all_cnt_2 = false_alm_cnt->cnt_all;
-		p_dm_drp_table->drp_state  = DRP_DECISION_STATE;
-	}
-
-	if (p_dm_drp_table->drp_state == DRP_DECISION_STATE) {
-
-		PHYDM_DBG(p_dm, DBG_DYN_RX_PATH, ("Current drp_state = ((%d))\n", p_dm_drp_table->drp_state));
-
-		PHYDM_DBG(p_dm, DBG_DYN_RX_PATH, ("[0] {CCA, FA} = {%d, %d}\n", p_dm_drp_table->curr_cca_all_cnt_0, p_dm_drp_table->curr_fa_all_cnt_0));
-		PHYDM_DBG(p_dm, DBG_DYN_RX_PATH, ("[1] {CCA, FA} = {%d, %d}\n", p_dm_drp_table->curr_cca_all_cnt_1, p_dm_drp_table->curr_fa_all_cnt_1));
-		PHYDM_DBG(p_dm, DBG_DYN_RX_PATH, ("[2] {CCA, FA} = {%d, %d}\n", p_dm_drp_table->curr_cca_all_cnt_2, p_dm_drp_table->curr_fa_all_cnt_2));
-
-		if (p_dm_drp_table->curr_fa_all_cnt_1 < p_dm_drp_table->curr_fa_all_cnt_0) {
-
-			if ((p_dm_drp_table->curr_fa_all_cnt_0 - p_dm_drp_table->curr_fa_all_cnt_1) > p_dm_drp_table->fa_diff_threshold)
-				p_dm_drp_table->curr_rx_path = BB_PATH_B;
-			else
-				p_dm_drp_table->curr_rx_path = BB_PATH_AB;
-		} else
-			p_dm_drp_table->curr_rx_path = BB_PATH_AB;
-
-		phydm_config_ofdm_rx_path(p_dm, p_dm_drp_table->curr_rx_path);
-		PHYDM_DBG(p_dm, DBG_DYN_RX_PATH, ("[Training Result]  curr_rx_path = ((%s%s)),\n",
-			((p_dm_drp_table->curr_rx_path & BB_PATH_A)  ? "A"  : " "), ((p_dm_drp_table->curr_rx_path & BB_PATH_B)  ? "B"  : " ")));
-
-		p_dm_drp_table->drp_state = DRP_INIT_STATE;
-		training_set_timmer_en = false;
-	}
-
-	PHYDM_DBG(p_dm, DBG_DYN_RX_PATH, ("DRP_state: ((%d)) -> ((%d))\n", curr_drp_state, p_dm_drp_table->drp_state));
-
-	if (training_set_timmer_en) {
-
-		PHYDM_DBG(p_dm, DBG_DYN_RX_PATH, ("[Training en]  curr_rx_path = ((%s%s)), training_time = ((%d ms))\n",
-			((p_dm_drp_table->curr_rx_path & BB_PATH_A)  ? "A"  : " "), ((p_dm_drp_table->curr_rx_path & BB_PATH_B)  ? "B"  : " "), p_dm_drp_table->training_time));
-
-		phydm_config_ofdm_rx_path(p_dm, p_dm_drp_table->curr_rx_path);
-		odm_set_timer(p_dm, &(p_dm_drp_table->phydm_dynamic_rx_path_timer), p_dm_drp_table->training_time); /*ms*/
-	} else
-		PHYDM_DBG(p_dm, DBG_DYN_RX_PATH, ("DRP period end\n\n", curr_drp_state, p_dm_drp_table->drp_state));
-
-}
-
-#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
-void
-phydm_dynamic_rx_path_callback(
-	struct timer_list		*p_timer
-)
-{
-	struct _ADAPTER		*adapter = (struct _ADAPTER *)p_timer->adapter;
-	HAL_DATA_TYPE	*p_hal_data = GET_HAL_DATA(adapter);
-	struct PHY_DM_STRUCT		*p_dm = &(p_hal_data->DM_OutSrc);
-	struct _DYNAMIC_RX_PATH_			*p_dm_drp_table = &(p_dm->dm_drp_table);
-
-#if DEV_BUS_TYPE == RT_PCI_INTERFACE
-#if USE_WORKITEM
-	odm_schedule_work_item(&(p_dm_drp_table->phydm_dynamic_rx_path_workitem));
-#else
-	{
-		/* dbg_print("phydm_dynamic_rx_path\n"); */
-		phydm_dynamic_rx_path(p_dm);
-	}
-#endif
-#else
-	odm_schedule_work_item(&(p_dm_drp_table->phydm_dynamic_rx_path_workitem));
-#endif
-}
-
-void
-phydm_dynamic_rx_path_workitem_callback(
-	void		*p_context
-)
-{
-	struct _ADAPTER		*p_adapter = (struct _ADAPTER *)p_context;
-	HAL_DATA_TYPE	*p_hal_data = GET_HAL_DATA(p_adapter);
-	struct PHY_DM_STRUCT		*p_dm = &(p_hal_data->DM_OutSrc);
-
-	/* dbg_print("phydm_dynamic_rx_path\n"); */
-	phydm_dynamic_rx_path(p_dm);
-}
-#else if (DM_ODM_SUPPORT_TYPE == ODM_CE)
-
-void
-phydm_dynamic_rx_path_callback(
-	void *function_context
-)
-{
-	struct PHY_DM_STRUCT	*p_dm = (struct PHY_DM_STRUCT *)function_context;
-	struct _ADAPTER	*padapter = p_dm->adapter;
-
-	if (padapter->net_closed == true)
-		return;
-
-#if 0 /* Can't do I/O in timer callback*/
-	odm_s0s1_sw_ant_div(p_dm, SWAW_STEP_DETERMINE);
-#else
-	/*rtw_run_in_thread_cmd(padapter, odm_sw_antdiv_workitem_callback, padapter);*/
-#endif
-}
-
-#endif
-
-void
-phydm_dynamic_rx_path_timers(
-	void		*p_dm_void,
-	u8		state
-)
-{
-	struct PHY_DM_STRUCT		*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	struct _DYNAMIC_RX_PATH_			*p_dm_drp_table	= &(p_dm->dm_drp_table);
-
-	if (state == INIT_DRP_TIMMER) {
-
-		odm_initialize_timer(p_dm, &(p_dm_drp_table->phydm_dynamic_rx_path_timer),
-			(void *)phydm_dynamic_rx_path_callback, NULL, "phydm_sw_antenna_switch_timer");
-	} else if (state == CANCEL_DRP_TIMMER)
-
-		odm_cancel_timer(p_dm, &(p_dm_drp_table->phydm_dynamic_rx_path_timer));
-
-	else if (state == RELEASE_DRP_TIMMER)
-
-		odm_release_timer(p_dm, &(p_dm_drp_table->phydm_dynamic_rx_path_timer));
-
-}
-
-void
-phydm_dynamic_rx_path_init(
-	void			*p_dm_void
-)
-{
-	struct PHY_DM_STRUCT				*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	struct _DYNAMIC_RX_PATH_					*p_dm_drp_table	= &(p_dm->dm_drp_table);
-	boolean			ret_value;
-
-	if (!(p_dm->support_ability & ODM_BB_DYNAMIC_RX_PATH)) {
-		PHYDM_DBG(p_dm, DBG_DYN_RX_PATH, ("[Return]   Not Support Dynamic RX PAth\n"));
-		return;
-	}
-	PHYDM_DBG(p_dm, DBG_DYN_RX_PATH, ("phydm_dynamic_rx_path_init\n"));
-
-	p_dm_drp_table->drp_state = DRP_INIT_STATE;
-	p_dm_drp_table->rssi_threshold = DRP_RSSI_TH;
-	p_dm_drp_table->fa_count_thresold = 50;
-	p_dm_drp_table->fa_diff_threshold = 50;
-	p_dm_drp_table->training_time = 100; /*ms*/
-	p_dm_drp_table->drp_skip_counter = 0;
-	p_dm_drp_table->drp_period  = 0;
-	p_dm_drp_table->drp_init_finished = true;
-
-	ret_value = phydm_api_trx_mode(p_dm, (enum bb_path)BB_PATH_AB, (enum bb_path)BB_PATH_AB, true);
-
-}
-
-void
-phydm_drp_debug(
-	void		*p_dm_void,
-	u32		*const dm_value,
-	u32		*_used,
-	char		*output,
-	u32		*_out_len
-)
-{
-	struct PHY_DM_STRUCT		*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	u32			used = *_used;
-	u32			out_len = *_out_len;
-	struct _DYNAMIC_RX_PATH_			*p_dm_drp_table = &(p_dm->dm_drp_table);
-
-	switch (dm_value[0])	{
-
-	case DRP_TRAINING_TIME:
-		p_dm_drp_table->training_time = (u16)dm_value[1];
-		break;
-	case DRP_TRAINING_PERIOD:
-		p_dm_drp_table->drp_period = (u8)dm_value[1];
-		break;
-	case DRP_RSSI_THRESHOLD:
-		p_dm_drp_table->rssi_threshold = (u8)dm_value[1];
-		break;
-	case DRP_FA_THRESHOLD:
-		p_dm_drp_table->fa_count_thresold = dm_value[1];
-		break;
-	case DRP_FA_DIFF_THRESHOLD:
-		p_dm_drp_table->fa_diff_threshold = dm_value[1];
-		break;
-	default:
-		PHYDM_SNPRINTF((output + used, out_len - used, "[DRP] unknown command\n"));
-		break;
-	}
-
-	*_used = used;
-	*_out_len = out_len;
-}
-
-void
-phydm_dynamic_rx_path_caller(
-	void			*p_dm_void
-)
-{
-	struct PHY_DM_STRUCT		*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	struct _DYNAMIC_RX_PATH_			*p_dm_drp_table	= &(p_dm->dm_drp_table);
-
-	if (p_dm_drp_table->drp_skip_counter <  p_dm_drp_table->drp_period)
-		p_dm_drp_table->drp_skip_counter++;
-	else
-		p_dm_drp_table->drp_skip_counter = 0;
-
-	if (p_dm_drp_table->drp_skip_counter != 0)
-		return;
-
-	if (p_dm_drp_table->drp_init_finished != true)
-		return;
-
-	phydm_dynamic_rx_path(p_dm);
-
-}
-#endif
diff --git a/rtl8723DS/hal/phydm/phydm_dynamic_rx_path.h b/rtl8723DS/hal/phydm/phydm_dynamic_rx_path.h
deleted file mode 100755
index 2b1a82d..0000000
--- a/rtl8723DS/hal/phydm/phydm_dynamic_rx_path.h
+++ b/dev/null
@@ -1,141 +0,0 @@
-/******************************************************************************
- *
- * Copyright(c) 2007 - 2017 Realtek Corporation.
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of version 2 of the GNU General Public License as
- * published by the Free Software Foundation.
- *
- * This program is distributed in the hope that it will be useful, but WITHOUT
- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
- * more details.
- *
- *****************************************************************************/
-
-#ifndef	__PHYDMDYMICRXPATH_H__
-#define    __PHYDMDYMICRXPATH_H__
-
-#define DYNAMIC_RX_PATH_VERSION	"1.0"  /*2016.07.15  Dino */
-
-
-#define	DRP_RSSI_TH	35
-
-#define INIT_DRP_TIMMER		0
-#define CANCEL_DRP_TIMMER		1
-#define RELEASE_DRP_TIMMER		2
-
-#if (RTL8822B_SUPPORT == 1)
-struct drp_rtl8822b_struct {
-	enum bb_path	path_judge;
-	u16	path_a_cck_fa;
-	u16	path_b_cck_fa;
-	
-};
-#endif
-
-#ifdef CONFIG_DYNAMIC_RX_PATH
-
-enum drp_state_e {
-	DRP_INIT_STATE				= 0,
-	DRP_TRAINING_STATE_0	= 1,
-	DRP_TRAINING_STATE_1		= 2,
-	DRP_TRAINING_STATE_2		= 3,
-	DRP_DECISION_STATE		= 4
-};
-
-enum adjustable_value_e {
-	DRP_TRAINING_TIME		= 0,
-	DRP_TRAINING_PERIOD	= 1,
-	DRP_RSSI_THRESHOLD	= 2,
-	DRP_FA_THRESHOLD		= 3,
-	DRP_FA_DIFF_THRESHOLD = 4
-};
-
-struct _DYNAMIC_RX_PATH_ {
-	u8			curr_rx_path;
-	u8			drp_state;
-	u16			training_time;
-	u8			rssi_threshold;
-	u32			fa_count_thresold;
-	u32			fa_diff_threshold;
-	u32			curr_cca_all_cnt_0;
-	u32			curr_fa_all_cnt_0;
-	u32			curr_cca_all_cnt_1;
-	u32			curr_fa_all_cnt_1;
-	u32			curr_cca_all_cnt_2;
-	u32			curr_fa_all_cnt_2;
-	u8			drp_skip_counter;
-	u8			drp_period;
-	u8			drp_init_finished;
-
-#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
-#if USE_WORKITEM
-	RT_WORK_ITEM	phydm_dynamic_rx_path_workitem;
-#endif
-#endif
-	struct timer_list		phydm_dynamic_rx_path_timer;
-
-};
-
-
-
-void
-phydm_process_phy_status_for_dynamic_rx_path(
-	void			*p_dm_void,
-	void			*p_phy_info_void,
-	void			*p_pkt_info_void
-);
-
-void
-phydm_dynamic_rx_path(
-	void			*p_dm_void
-);
-
-#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
-void
-phydm_dynamic_rx_path_callback(
-	struct timer_list		*p_timer
-);
-
-void
-phydm_dynamic_rx_path_workitem_callback(
-	void		*p_context
-);
-
-#else if (DM_ODM_SUPPORT_TYPE == ODM_CE)
-
-void
-phydm_dynamic_rx_path_callback(
-	void *function_context
-);
-
-#endif
-
-void
-phydm_dynamic_rx_path_timers(
-	void		*p_dm_void,
-	u8		state
-);
-
-void
-phydm_dynamic_rx_path_init(
-	void			*p_dm_void
-);
-
-void
-phydm_drp_debug(
-	void		*p_dm_void,
-	u32		*const dm_value,
-	u32		*_used,
-	char			*output,
-	u32		*_out_len
-);
-
-void
-phydm_dynamic_rx_path_caller(
-	void			*p_dm_void
-);
-
-#endif
-#endif
diff --git a/rtl8723DS/hal/phydm/phydm_dynamictxpower.c b/rtl8723DS/hal/phydm/phydm_dynamictxpower.c
index cc3a149..ceed35f 100755..100644
--- a/rtl8723DS/hal/phydm/phydm_dynamictxpower.c
+++ b/rtl8723DS/hal/phydm/phydm_dynamictxpower.c
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2007 - 2017 Realtek Corporation.
+ * Copyright(c) 2007 - 2017  Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -8,449 +8,510 @@
  *
  * This program is distributed in the hope that it will be useful, but WITHOUT
  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  * more details.
  *
+ * The full GNU General Public License is included in this distribution in the
+ * file called LICENSE.
+ *
+ * Contact Information:
+ * wlanfae <wlanfae@realtek.com>
+ * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
+ * Hsinchu 300, Taiwan.
+ *
+ * Larry Finger <Larry.Finger@lwfinger.net>
+ *
  *****************************************************************************/
 
-/* ************************************************************
+/*************************************************************
  * include files
- * ************************************************************ */
+ ************************************************************/
 #include "mp_precomp.h"
 #include "phydm_precomp.h"
 
+#ifdef CONFIG_DYNAMIC_TX_TWR
+
+#ifdef BB_RAM_SUPPORT
 void
-phydm_dynamic_tx_power_init(
-	void					*p_dm_void
-)
+phydm_2ndtype_dtp_init(void *dm_void)
 {
-	struct PHY_DM_STRUCT		*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
-	struct _ADAPTER	*adapter = p_dm->adapter;
-	PMGNT_INFO			p_mgnt_info = &adapter->MgntInfo;
-	HAL_DATA_TYPE		*p_hal_data = GET_HAL_DATA(adapter);
-
-	/*if (!IS_HARDWARE_TYPE_8814A(adapter)) {*/
-	/*	PHYDM_DBG(p_dm,DBG_DYN_TXPWR, */
-	/*	("phydm_dynamic_tx_power_init DynamicTxPowerEnable=%d\n", p_mgnt_info->is_dynamic_tx_power_enable));*/
-	/*	return;*/
-	/*} else*/
-	{
-		p_mgnt_info->bDynamicTxPowerEnable = true;
-		PHYDM_DBG(p_dm, DBG_DYN_TXPWR,
-			("phydm_dynamic_tx_power_init DynamicTxPowerEnable=%d\n", p_mgnt_info->bDynamicTxPowerEnable));
-	}
-
-#if DEV_BUS_TYPE == RT_USB_INTERFACE
-	if (RT_GetInterfaceSelection(adapter) == INTF_SEL1_USB_High_Power) {
-		odm_dynamic_tx_power_save_power_index(p_dm);
-		p_mgnt_info->bDynamicTxPowerEnable = true;
-	} else
-#else
-	/* so 92c pci do not need dynamic tx power? vivi check it later */
-	p_mgnt_info->bDynamicTxPowerEnable = false;
-#endif
-
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	u8	pwr_offset_minus3, pwr_offset_minus7;
+	/*@ 2's com, for offset 3dB and 7dB, which 1 step will be 0.25dB*/
+	pwr_offset_minus3 = BIT(7) | 0x74;
+	pwr_offset_minus7 = BIT(7) | 0x64;
+	odm_set_bb_reg(dm, 0x1e70, 0x00ff0000, pwr_offset_minus3);
+	odm_set_bb_reg(dm, 0x1e70, 0xff000000, pwr_offset_minus7);
+};
 
-		p_hal_data->LastDTPLvl = tx_high_pwr_level_normal;
-	p_hal_data->DynamicTxHighPowerLvl = tx_high_pwr_level_normal;
+void
+phdm_2ndtype_rd_ram_pwr(void *dm_void,	u8	macid)
+{
+};
 
-#elif (DM_ODM_SUPPORT_TYPE == ODM_CE)
+void
+phdm_2ndtype_wt_ram_pwr(void *dm_void, u8	macid, boolean pwr_offset0_en,
+			     boolean	pwr_offset1_en, s8 pwr_offset0, s8 pwr_offset1)
+{
+	u32 reg_io_0x1e84 = 0;
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct phydm_bb_ram_per_sta *dm_ram_per_sta = NULL;
+	dm_ram_per_sta = &dm->p_bb_ram_ctrl.pram_sta_ctrl[macid];
+	dm_ram_per_sta->tx_pwr_offset0_en = pwr_offset0_en;
+	dm_ram_per_sta->tx_pwr_offset1_en = pwr_offset1_en;
+	dm_ram_per_sta->tx_pwr_offset0 = pwr_offset0;
+	dm_ram_per_sta->tx_pwr_offset1 = pwr_offset1;
+	reg_io_0x1e84 = (dm_ram_per_sta->hw_igi_en<<7) + dm_ram_per_sta->hw_igi;
+	reg_io_0x1e84 |= (pwr_offset0_en<<15) + ((pwr_offset0&0x7f)<<8);
+	reg_io_0x1e84 |= (pwr_offset1_en<<23) + ((pwr_offset1&0x7f)<<16);
+	reg_io_0x1e84 |= (macid&0x3f)<<24;
+	reg_io_0x1e84 |= BIT(30);
+	odm_set_bb_reg(dm, 0x1e84, 0xffffffff, reg_io_0x1e84);
+};
+
+u8 phydm_pwr_lv_mapping_2ndtype(u8 tx_pwr_lv)
+{
+	if (tx_pwr_lv == tx_high_pwr_level_level3)
+		/*PHYDM_2ND_OFFSET_MINUS_11DB;*/
+		return PHYDM_2ND_OFFSET_MINUS_7DB;
+	else if (tx_pwr_lv == tx_high_pwr_level_level2)
+		return PHYDM_2ND_OFFSET_MINUS_7DB;
+	else if (tx_pwr_lv == tx_high_pwr_level_level1)
+		return PHYDM_2ND_OFFSET_MINUS_3DB;
+	else
+		return PHYDM_2ND_OFFSET_ZERO;
+}
 
-	p_dm->last_dtp_lvl = tx_high_pwr_level_normal;
-	p_dm->dynamic_tx_high_power_lvl = tx_high_pwr_level_normal;
-	p_dm->tx_agc_ofdm_18_6 = odm_get_bb_reg(p_dm, 0xC24, MASKDWORD); /*TXAGC {18M 12M 9M 6M}*/
+void phydm_dtp_fill_cmninfo_2ndtype(void *dm_void, u8 macid, u8 dtp_lvl)
+{
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct dtp_info *dtp = NULL;
+	dtp = &dm->phydm_sta_info[macid]->dtp_stat;
+	if (!(dm->support_ability & ODM_BB_DYNAMIC_TXPWR))
+		return;
+	dtp->dyn_tx_power = phydm_pwr_lv_mapping_2ndtype(dtp_lvl);
+	PHYDM_DBG(dm, DBG_DYN_TXPWR,
+		  "Fill cmninfo TxPwr: macid=(%d), PwrLv (%d)\n", macid,
+		  dtp->dyn_tx_power);
+	/* dyn_tx_power is 2 bit at 8822C/14B/98F/12F*/
+}
 
 #endif
 
-}
-
-void
-odm_dynamic_tx_power_save_power_index(
-	void					*p_dm_void
-)
+boolean
+phydm_check_rates(void *dm_void, u8 rate_idx)
 {
-#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
-	struct PHY_DM_STRUCT		*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	u8		index;
-	u32		power_index_reg[6] = {0xc90, 0xc91, 0xc92, 0xc98, 0xc99, 0xc9a};
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	u32 check_rate_bitmap0 = 0x08080808; /* @check CCK11M, OFDM54M, MCS7, MCS15*/
+	u32 check_rate_bitmap1 = 0x80200808; /* @check MCS23, MCS31, VHT1SS M9, VHT2SS M9*/
+	u32 check_rate_bitmap2 = 0x00080200; /* @check VHT3SS M9, VHT4SS M9*/
+	u32 bitmap_result;
+
+#if (RTL8822B_SUPPORT == 1)
+	if (dm->support_ic_type & ODM_RTL8822B) {
+		check_rate_bitmap2 &= 0;
+		check_rate_bitmap1 &= 0xfffff000;
+		check_rate_bitmap0 &= 0x0fffffff;
+	}
+#endif
 
-#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
-	struct _ADAPTER	*adapter = p_dm->adapter;
-	HAL_DATA_TYPE	*p_hal_data = GET_HAL_DATA(adapter);
-	for (index = 0; index < 6; index++)
-		p_hal_data->PowerIndex_backup[index] = PlatformEFIORead1Byte(adapter, power_index_reg[index]);
+#if (RTL8197F_SUPPORT == 1)
+	if (dm->support_ic_type & ODM_RTL8197F) {
+		check_rate_bitmap2 &= 0;
+		check_rate_bitmap1 &= 0;
+		check_rate_bitmap0 &= 0x0fffffff;
+	}
+#endif
 
+#if (RTL8192E_SUPPORT == 1)
+	if (dm->support_ic_type & ODM_RTL8192E) {
+		check_rate_bitmap2 &= 0;
+		check_rate_bitmap1 &= 0;
+		check_rate_bitmap0 &= 0x0fffffff;
+	}
+#endif
 
+/*@jj add 20170822*/
+#if (RTL8192F_SUPPORT == 1)
+	if (dm->support_ic_type & ODM_RTL8192F) {
+		check_rate_bitmap2 &= 0;
+		check_rate_bitmap1 &= 0;
+		check_rate_bitmap0 &= 0x0fffffff;
+	}
+#endif
+#if (RTL8721D_SUPPORT == 1)
+	if (dm->support_ic_type & ODM_RTL8721D) {
+		check_rate_bitmap2 &= 0;
+		check_rate_bitmap1 &= 0;
+		check_rate_bitmap0 &= 0x000fffff;
+	}
 #endif
+#if (RTL8821C_SUPPORT == 1)
+	if (dm->support_ic_type & ODM_RTL8821C) {
+		check_rate_bitmap2 &= 0;
+		check_rate_bitmap1 &= 0x003ff000;
+		check_rate_bitmap0 &= 0x000fffff;
+	}
 #endif
+
+	if (rate_idx >= 64)
+		bitmap_result = BIT(rate_idx - 64) & check_rate_bitmap2;
+	else if (rate_idx >= 32)
+		bitmap_result = BIT(rate_idx - 32) & check_rate_bitmap1;
+	else if (rate_idx <= 31)
+		bitmap_result = BIT(rate_idx) & check_rate_bitmap0;
+
+	if (bitmap_result != 0)
+		return true;
+	else
+		return false;
 }
 
-void
-odm_dynamic_tx_power_restore_power_index(
-	void					*p_dm_void
-)
+enum rf_path
+phydm_check_paths(void *dm_void)
 {
-#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
-	struct PHY_DM_STRUCT		*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	u8			index;
-	struct _ADAPTER		*adapter = p_dm->adapter;
-	HAL_DATA_TYPE	*p_hal_data = GET_HAL_DATA(adapter);
-	u32			power_index_reg[6] = {0xc90, 0xc91, 0xc92, 0xc98, 0xc99, 0xc9a};
-
-	for (index = 0; index < 6; index++)
-		PlatformEFIOWrite1Byte(adapter, power_index_reg[index], p_hal_data->PowerIndex_backup[index]);
-
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	enum rf_path max_path = RF_PATH_A;
+
+	if (dm->num_rf_path == 1)
+		max_path = RF_PATH_A;
+	if (dm->num_rf_path == 2)
+		max_path = RF_PATH_B;
+	if (dm->num_rf_path == 3)
+		max_path = RF_PATH_C;
+	if (dm->num_rf_path == 4)
+		max_path = RF_PATH_D;
+
+	return max_path;
+}
 
+#ifndef PHYDM_COMMON_API_SUPPORT
+u8 phydm_dtp_get_txagc(void *dm_void, enum rf_path path, u8 hw_rate)
+{
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	u8 ret = 0xff;
 
+#if (RTL8192E_SUPPORT == 1)
+	ret = config_phydm_read_txagc_n(dm, path, hw_rate);
 #endif
+	return ret;
 }
+#endif
 
-void
-odm_dynamic_tx_power_write_power_index(
-	void					*p_dm_void,
-	u8		value)
+u8 phydm_search_min_power_index(void *dm_void)
 {
-	struct PHY_DM_STRUCT		*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	u8			index;
-	u32			power_index_reg[6] = {0xc90, 0xc91, 0xc92, 0xc98, 0xc99, 0xc9a};
-
-	for (index = 0; index < 6; index++)
-		/* platform_efio_write_1byte(adapter, power_index_reg[index], value); */
-		odm_write_1byte(p_dm, power_index_reg[index], value);
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	enum rf_path path;
+	enum rf_path max_path;
+	u8 min_gain_index = 0x3f;
+	u8 gain_index;
+	u8 rate_idx;
+
+	PHYDM_DBG(dm, DBG_DYN_TXPWR, "%s\n", __func__);
+	max_path = phydm_check_paths(dm);
+	for (path = 0; path <= max_path; path++)
+		for (rate_idx = 0; rate_idx < 84; rate_idx++)
+			if (phydm_check_rates(dm, rate_idx)) {
+#ifdef PHYDM_COMMON_API_SUPPORT
+				/*This is for API support IC : 97F,8822B,92F,8821C*/
+				gain_index = phydm_api_get_txagc(dm, path, rate_idx);
+#else
+				/*This is for API non-support IC : 92E */
+				gain_index = phydm_dtp_get_txagc(dm, path, rate_idx);
+#endif
+				if (gain_index == 0xff) {
+					min_gain_index = 0x20;
+					PHYDM_DBG(dm, DBG_DYN_TXPWR, 
+						"Error Gain idx!! Rewite to: ((%d))\n", min_gain_index);
+					break;
+				}
+				PHYDM_DBG(dm, DBG_DYN_TXPWR,
+					  "Support Rate: ((%d)) -> Gain idx: ((%d))\n",
+					  rate_idx, gain_index);
+				if (gain_index < min_gain_index)
+					min_gain_index = gain_index;
+			}
 
+	return min_gain_index;
 }
 
-void
-odm_dynamic_tx_power_nic_ce(
-	void					*p_dm_void
-)
+void phydm_dynamic_tx_power_init(void *dm_void)
 {
-#if (DM_ODM_SUPPORT_TYPE & (ODM_CE))
-#if (RTL8821A_SUPPORT == 1)
-	struct PHY_DM_STRUCT		*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	u8			val;
-	u8			rssi_tmp = p_dm->rssi_min;
-
-	if (!(p_dm->support_ability & ODM_BB_DYNAMIC_TXPWR))
-		return;
-
-	if (rssi_tmp >= TX_POWER_NEAR_FIELD_THRESH_LVL2) {
-		p_dm->dynamic_tx_high_power_lvl = tx_high_pwr_level_level2;
-		/**/
-	} else if (rssi_tmp >= TX_POWER_NEAR_FIELD_THRESH_LVL1) {
-		p_dm->dynamic_tx_high_power_lvl = tx_high_pwr_level_level1;
-		/**/
-	} else if (rssi_tmp < (TX_POWER_NEAR_FIELD_THRESH_LVL1 - 5)) {
-		p_dm->dynamic_tx_high_power_lvl = tx_high_pwr_level_normal;
-		/**/
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	u8 i;
+	dm->last_dtp_lvl = tx_high_pwr_level_normal;
+	dm->dynamic_tx_high_power_lvl = tx_high_pwr_level_normal;
+	for (i = 0; i < 3; i++) {
+		dm->enhance_pwr_th[i] = 0xff;
 	}
+	dm->set_pwr_th[0] = TX_POWER_NEAR_FIELD_THRESH_LVL1;
+	dm->set_pwr_th[1] = TX_POWER_NEAR_FIELD_THRESH_LVL2;
+	dm->set_pwr_th[2] = 0xff;
+	dm->min_power_index = phydm_search_min_power_index(dm);
+	PHYDM_DBG(dm, DBG_DYN_TXPWR, "DTP init: Min Gain idx: ((%d))\n",
+		  dm->min_power_index);
+}
 
-	if (p_dm->last_dtp_lvl != p_dm->dynamic_tx_high_power_lvl) {
-
-		PHYDM_DBG(p_dm, DBG_DYN_TXPWR, ("update_DTP_lv: ((%d)) -> ((%d))\n", p_dm->last_dtp_lvl, p_dm->dynamic_tx_high_power_lvl));
-
-		p_dm->last_dtp_lvl = p_dm->dynamic_tx_high_power_lvl;
-
-		if (p_dm->support_ic_type & (ODM_RTL8821)) {
-
-			if (p_dm->dynamic_tx_high_power_lvl == tx_high_pwr_level_level2) {
-
-				odm_set_mac_reg(p_dm, 0x6D8, BIT(20) | BIT19 | BIT18, 1); /* Resp TXAGC offset = -3dB*/
+void phydm_noisy_enhance_hp_th(void *dm_void, u8 noisy_state)
+{
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	if (noisy_state == 0) {
+		dm->enhance_pwr_th[0] = dm->set_pwr_th[0];
+		dm->enhance_pwr_th[1] = dm->set_pwr_th[1];
+		dm->enhance_pwr_th[2] = dm->set_pwr_th[2];
+	} else {
+		dm->enhance_pwr_th[0] = dm->set_pwr_th[0] + 8;
+		dm->enhance_pwr_th[1] = dm->set_pwr_th[1] + 5;
+		dm->enhance_pwr_th[2] = dm->set_pwr_th[2];
+	}
+	PHYDM_DBG(dm, DBG_DYN_TXPWR,
+		  "DTP hp_th: Lv1_th =%d ,Lv2_th = %d ,Lv3_th = %d\n",
+		  dm->enhance_pwr_th[0], dm->enhance_pwr_th[1],
+		  dm->enhance_pwr_th[2]);
+}
 
-				val = p_dm->tx_agc_ofdm_18_6 & 0xff;
-				if (val >= 0x20)
-					val -= 0x16;
+u8 phydm_pwr_lvl_check(void *dm_void, u8 input_rssi)
+{
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	u8 th0,th1,th2;
+	th2 = dm->enhance_pwr_th[2];
+	th1 = dm->enhance_pwr_th[1];
+	th0 = dm->enhance_pwr_th[0];
+	if (input_rssi >= th2)
+		return tx_high_pwr_level_level3;
+	else if (input_rssi < (th2 - 3) && input_rssi >= th1)
+		return tx_high_pwr_level_level2;
+	else if (input_rssi < (th1 - 3) && input_rssi >= th0)
+		return tx_high_pwr_level_level1;
+	else if (input_rssi < (th0 - 3))
+		return tx_high_pwr_level_normal;
+	else
+		return tx_high_pwr_level_unchange;
+}
 
-				odm_set_bb_reg(p_dm, 0xC24, 0xff, val);
-				PHYDM_DBG(p_dm, DBG_DYN_TXPWR, ("Set TX power: level 2\n"));
-			} else if (p_dm->dynamic_tx_high_power_lvl == tx_high_pwr_level_level1) {
+u8 phydm_pwr_lv_mapping(u8 tx_pwr_lv)
+{
+	if (tx_pwr_lv == tx_high_pwr_level_level3)
+		return PHYDM_OFFSET_MINUS_11DB;
+	else if (tx_pwr_lv == tx_high_pwr_level_level2)
+		return PHYDM_OFFSET_MINUS_7DB;
+	else if (tx_pwr_lv == tx_high_pwr_level_level1)
+		return PHYDM_OFFSET_MINUS_3DB;
+	else
+		return PHYDM_OFFSET_ZERO;
+}
 
-				odm_set_mac_reg(p_dm, 0x6D8, BIT(20) | BIT19 | BIT18, 1); /* Resp TXAGC offset = -3dB*/
+void phydm_dynamic_response_power(void *dm_void)
+{
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	u8 rpwr;
+	if (!(dm->support_ability & ODM_BB_DYNAMIC_TXPWR))
+		return;
+	if (dm->dynamic_tx_high_power_lvl == tx_high_pwr_level_unchange) {
+		dm->dynamic_tx_high_power_lvl = dm->last_dtp_lvl;
+		PHYDM_DBG(dm, DBG_DYN_TXPWR, "RespPwr not change\n");
+		return;
+	}
 
-				val = p_dm->tx_agc_ofdm_18_6 & 0xff;
-				if (val >= 0x20)
-					val -= 0x10;
+	PHYDM_DBG(dm, DBG_DYN_TXPWR,
+		  "RespPwr update_DTP_lv: ((%d)) -> ((%d))\n", dm->last_dtp_lvl,
+		  dm->dynamic_tx_high_power_lvl);
+	dm->last_dtp_lvl = dm->dynamic_tx_high_power_lvl;
+	rpwr = phydm_pwr_lv_mapping(dm->dynamic_tx_high_power_lvl);
+	odm_set_mac_reg(dm, ODM_REG_RESP_TX_11AC, BIT(20) | BIT(19) | BIT(18), rpwr);
+	PHYDM_DBG(dm, DBG_DYN_TXPWR, "RespPwr Set TxPwr: Lv (%d)\n",
+		  dm->dynamic_tx_high_power_lvl);
+}
 
-				odm_set_bb_reg(p_dm, 0xC24, 0xff, val);
-				PHYDM_DBG(p_dm, DBG_DYN_TXPWR, ("Set TX power: level 1\n"));
-			} else if (p_dm->dynamic_tx_high_power_lvl == tx_high_pwr_level_normal) {
+void phydm_dtp_fill_cmninfo(void *dm_void, u8 macid, u8 dtp_lvl)
+{
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct dtp_info *dtp = NULL;
+	dtp = &dm->phydm_sta_info[macid]->dtp_stat;
+	if (!(dm->support_ability & ODM_BB_DYNAMIC_TXPWR))
+		return;
+	dtp->dyn_tx_power = phydm_pwr_lv_mapping(dtp_lvl);
+	PHYDM_DBG(dm, DBG_DYN_TXPWR,
+		  "Fill cmninfo TxPwr: macid=(%d), PwrLv (%d)\n", macid,
+		  dtp->dyn_tx_power);
+}
 
-				odm_set_mac_reg(p_dm, 0x6D8, BIT(20) | BIT19 | BIT18, 0); /* Resp TXAGC offset = 0dB*/
-				odm_set_bb_reg(p_dm, 0xC24, MASKDWORD, p_dm->tx_agc_ofdm_18_6);
-				PHYDM_DBG(p_dm, DBG_DYN_TXPWR, ("Set TX power: normal\n"));
-			}
+void phydm_dtp_per_sta(void *dm_void, u8 macid)
+{
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct cmn_sta_info *sta = dm->phydm_sta_info[macid];
+	struct dtp_info *dtp = NULL;
+	struct rssi_info *rssi = NULL;
+	if (is_sta_active(sta)) {
+		dtp = &sta->dtp_stat;
+		rssi = &sta->rssi_stat;
+		dtp->sta_tx_high_power_lvl = phydm_pwr_lvl_check(dm, rssi->rssi);
+		PHYDM_DBG(dm, DBG_DYN_TXPWR,
+			  "STA=%d , RSSI: %d , GetPwrLv: %d\n", macid,
+			  rssi->rssi, dtp->sta_tx_high_power_lvl);
+		if (dtp->sta_tx_high_power_lvl == tx_high_pwr_level_unchange 
+			|| dtp->sta_tx_high_power_lvl == dtp->sta_last_dtp_lvl) {
+			dtp->sta_tx_high_power_lvl = dtp->sta_last_dtp_lvl;
+			PHYDM_DBG(dm, DBG_DYN_TXPWR,
+				  "DTP_lv not change: ((%d))\n",
+				  dtp->sta_tx_high_power_lvl);
+			return;
 		}
-	}
 
+		PHYDM_DBG(dm, DBG_DYN_TXPWR,
+			  "DTP_lv update: ((%d)) -> ((%d))\n", dm->last_dtp_lvl,
+			  dm->dynamic_tx_high_power_lvl);
+		dtp->sta_last_dtp_lvl = dtp->sta_tx_high_power_lvl;
+#ifdef BB_RAM_SUPPORT
+		phydm_dtp_fill_cmninfo_2ndtype(dm, macid, dtp->sta_tx_high_power_lvl);
+#else
+		phydm_dtp_fill_cmninfo(dm, macid, dtp->sta_tx_high_power_lvl);
 #endif
-#endif
+	}
 }
 
 
-void
-odm_dynamic_tx_power(
-	void					*p_dm_void
-)
+void odm_set_dyntxpwr(void *dm_void, u8 *desc, u8 macid)
 {
-	/*  */
-	/* For AP/ADSL use struct rtl8192cd_priv* */
-	/* For CE/NIC use struct _ADAPTER* */
-	/*  */
-	/* struct _ADAPTER*		p_adapter = p_dm->adapter;
-	*	struct rtl8192cd_priv*	priv		= p_dm->priv; */
-	struct PHY_DM_STRUCT		*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-
-	if (!(p_dm->support_ability & ODM_BB_DYNAMIC_TXPWR))
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct dtp_info *dtp = NULL;
+	dtp = &dm->phydm_sta_info[macid]->dtp_stat;
+	if (!(dm->support_ability & ODM_BB_DYNAMIC_TXPWR))
 		return;
-	/*  */
-	/* 2011/09/29 MH In HW integration first stage, we provide 4 different handle to operate */
-	/* at the same time. In the stage2/3, we need to prive universal interface and merge all */
-	/* HW dynamic mechanism. */
-	/*  */
-	switch	(p_dm->support_platform) {
-	case	ODM_WIN:
-		odm_dynamic_tx_power_nic(p_dm);
-		break;
-	case	ODM_CE:
-		odm_dynamic_tx_power_nic_ce(p_dm);
-		break;
-	default:
-		break;
+	if (dm->fill_desc_dyntxpwr)
+		dm->fill_desc_dyntxpwr(dm, desc, dtp->dyn_tx_power);
+	else
+		PHYDM_DBG(dm, DBG_DYN_TXPWR,
+			  "%s: fill_desc_dyntxpwr is null!\n", __func__);
+	if (dtp->last_tx_power != dtp->dyn_tx_power) {
+		PHYDM_DBG(dm, DBG_DYN_TXPWR,
+			  "%s: last_offset=%d, txpwr_offset=%d\n", __func__,
+			  dtp->last_tx_power, dtp->dyn_tx_power);
+		dtp->last_tx_power = dtp->dyn_tx_power;
 	}
-
-
 }
 
-
-void
-odm_dynamic_tx_power_nic(
-	void					*p_dm_void
-)
+void phydm_dtp_debug(void *dm_void, char input[][16], u32 *_used, char *output,
+			     u32 *_out_len)
 {
-	struct PHY_DM_STRUCT		*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-
-	if (!(p_dm->support_ability & ODM_BB_DYNAMIC_TXPWR))
-		return;
-
-#if (DM_ODM_SUPPORT_TYPE & ODM_WIN)
-
-	if (p_dm->support_ic_type == ODM_RTL8814A)
-		odm_dynamic_tx_power_8814a(p_dm);
-	else if (p_dm->support_ic_type & ODM_RTL8821) {
-		struct _ADAPTER		*adapter	 =  p_dm->adapter;
-		PMGNT_INFO		p_mgnt_info = GetDefaultMgntInfo(adapter);
-
-		if (p_mgnt_info->RegRspPwr == 1)	{
-			if (p_dm->rssi_min > 60)
-				odm_set_mac_reg(p_dm, ODM_REG_RESP_TX_11AC, BIT(20) | BIT19 | BIT18, 1); /*Resp TXAGC offset = -3dB*/
-			else if (p_dm->rssi_min < 55)
-				odm_set_mac_reg(p_dm, ODM_REG_RESP_TX_11AC, BIT(20) | BIT19 | BIT18, 0); /*Resp TXAGC offset = 0dB*/
+	u32 used = *_used;
+	u32 out_len = *_out_len;
+
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	char help[] = "-h";
+	u32 var1[3] = {0};
+	u8 set_pwr_th1, set_pwr_th2, set_pwr_th3;
+	u8 i;
+
+	if ((strcmp(input[1], help) == 0)) {
+		PDM_SNPF(out_len, used, output + used, out_len - used,
+			 "Set DTP threhosld: {1} {TH[0]} {TH[1]} {TH[2]}\n");
+	} else {
+		for (i = 0; i < 3; i++) {
+			if (input[i + 1])
+				PHYDM_SSCANF(input[i + 1], DCMD_HEX, &var1[i]);
+		}
+		if (var1[0] == 1) {
+			for (i = 0; i < 3; i++)
+				if (var1[i] == 0 || var1[i] > 100)
+					dm->set_pwr_th[i] = 0xff;
+				else
+					dm->set_pwr_th[i] = (u8)var1[1 + i];
+
+			PDM_SNPF(out_len, used, output + used, out_len - used,
+				 "DTP_TH[0:2] = {%d, %d, %d}\n",
+				 dm->set_pwr_th[0], dm->set_pwr_th[1],
+				 dm->set_pwr_th[2]);
 		}
 	}
-#endif
+	*_used = used;
+	*_out_len = out_len;
 }
 
 
-void
-odm_dynamic_tx_power_8821(
-	void			*p_dm_void,
-	u8			*p_desc,
-	u8			mac_id
-)
+void phydm_dynamic_tx_power(void *dm_void)
 {
-#if (RTL8821A_SUPPORT == 1)
-#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
-	struct PHY_DM_STRUCT		*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	struct cmn_sta_info		*p_entry;
-	u8			reg0xc56_byte;
-	u8			txpwr_offset = 0;
-
-	p_entry = p_dm->p_phydm_sta_info[mac_id];
 
-	reg0xc56_byte = odm_read_1byte(p_dm, 0xc56);
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct cmn_sta_info *sta = NULL;
+	u8 i;
+	u8 cnt = 0;
+	u8 rssi_min = dm->rssi_min;
+	u8 rssi_tmp = 0;
 
-	PHYDM_DBG(p_dm, DBG_DYN_TXPWR, ("reg0xc56_byte=%d\n", reg0xc56_byte));
-
-	if (p_entry[mac_id].rssi_stat.rssi > 85) {
-
-		/* Avoid TXAGC error after TX power offset is applied.
-		For example: Reg0xc56=0x6, if txpwr_offset=3( reduce 11dB )
-		Total power = 6-11= -5( overflow!! ), PA may be burned !
-		so txpwr_offset should be adjusted by Reg0xc56*/
-
-		if (reg0xc56_byte < 7)
-			txpwr_offset = 1;
-		else if (reg0xc56_byte < 11)
-			txpwr_offset = 2;
-		else
-			txpwr_offset = 3;
-
-		SET_TX_DESC_TX_POWER_OFFSET_8812(p_desc, txpwr_offset);
-		PHYDM_DBG(p_dm, DBG_DYN_TXPWR, ("odm_dynamic_tx_power_8821: RSSI=%d, txpwr_offset=%d\n", p_entry[mac_id].rssi_stat.rssi, txpwr_offset));
-
-	} else {
-		SET_TX_DESC_TX_POWER_OFFSET_8812(p_desc, txpwr_offset);
-		PHYDM_DBG(p_dm, DBG_DYN_TXPWR, ("odm_dynamic_tx_power_8821: RSSI=%d, txpwr_offset=%d\n", p_entry[mac_id].rssi_stat.rssi, txpwr_offset));
+	if (!(dm->support_ability & ODM_BB_DYNAMIC_TXPWR))
+		return;
 
+	PHYDM_DBG(dm, DBG_DYN_TXPWR,
+		  "[%s] RSSI_min = %d, Noisy_dec = %d\n", __func__, rssi_min,
+		  dm->noisy_decision);
+	phydm_noisy_enhance_hp_th(dm, dm->noisy_decision);
+#ifndef BB_RAM_SUPPORT
+	/* Response Power */
+	dm->dynamic_tx_high_power_lvl = phydm_pwr_lvl_check(dm, rssi_min);
+	phydm_dynamic_response_power(dm);
+#endif /* #ifndef BB_RAM_SUPPORT */
+	/* Per STA Tx power */
+	for (i = 0; i < ODM_ASSOCIATE_ENTRY_NUM; i++) {
+		phydm_dtp_per_sta(dm, i);
+		cnt++;
+		if (cnt >= dm->number_linked_client)
+			break;
 	}
-#endif	/*#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)*/
-#endif	/*#if (RTL8821A_SUPPORT==1)*/
 }
-
 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
-void
-odm_dynamic_tx_power_8814a(
-	void					*p_dm_void
-)
-{
-	struct PHY_DM_STRUCT		*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	struct _ADAPTER *adapter = p_dm->adapter;
-	PMGNT_INFO			p_mgnt_info = &adapter->MgntInfo;
-	HAL_DATA_TYPE		*p_hal_data = GET_HAL_DATA(adapter);
-	s32				undecorated_smoothed_pwdb;
-
-	PHYDM_DBG(p_dm, DBG_DYN_TXPWR,
-		("TxLevel=%d p_mgnt_info->iot_action=%x p_mgnt_info->is_dynamic_tx_power_enable=%d\n",
-		p_hal_data->DynamicTxHighPowerLvl, p_mgnt_info->IOTAction, p_mgnt_info->bDynamicTxPowerEnable));
-
-	/*STA not connected and AP not connected*/
-	if ((!p_mgnt_info->bMediaConnect) && (p_hal_data->EntryMinUndecoratedSmoothedPWDB == 0)) {
-		PHYDM_DBG(p_dm, DBG_DYN_TXPWR, ("Not connected to any reset power lvl\n"));
-		p_hal_data->DynamicTxHighPowerLvl = tx_high_pwr_level_normal;
-		return;
-	}
-
-
-	if ((p_mgnt_info->bDynamicTxPowerEnable != true) || p_mgnt_info->IOTAction & HT_IOT_ACT_DISABLE_HIGH_POWER)
-		p_hal_data->DynamicTxHighPowerLvl = tx_high_pwr_level_normal;
-	else {
-		if (p_mgnt_info->bMediaConnect) {	/*Default port*/
-			if (ACTING_AS_AP(adapter) || ACTING_AS_IBSS(adapter)) {
-				undecorated_smoothed_pwdb = p_hal_data->EntryMinUndecoratedSmoothedPWDB;
-				PHYDM_DBG(p_dm, DBG_DYN_TXPWR, ("AP Client PWDB = 0x%x\n", undecorated_smoothed_pwdb));
-			} else {
-				undecorated_smoothed_pwdb = p_hal_data->UndecoratedSmoothedPWDB;
-				PHYDM_DBG(p_dm, DBG_DYN_TXPWR, ("STA Default Port PWDB = 0x%x\n", undecorated_smoothed_pwdb));
-			}
-		} else {/*associated entry pwdb*/
-			undecorated_smoothed_pwdb = p_hal_data->EntryMinUndecoratedSmoothedPWDB;
-			PHYDM_DBG(p_dm, DBG_DYN_TXPWR, ("AP Ext Port PWDB = 0x%x\n", undecorated_smoothed_pwdb));
-		}
 
-		/*Should we separate as 2.4G/5G band?*/
-
-		if (undecorated_smoothed_pwdb >= TX_POWER_NEAR_FIELD_THRESH_LVL2) {
-			p_hal_data->DynamicTxHighPowerLvl = tx_high_pwr_level_level2;
-			PHYDM_DBG(p_dm, DBG_DYN_TXPWR, ("tx_high_pwr_level_level1 (TxPwr=0x0)\n"));
-		} else if ((undecorated_smoothed_pwdb < (TX_POWER_NEAR_FIELD_THRESH_LVL2 - 3)) &&
-			(undecorated_smoothed_pwdb >= TX_POWER_NEAR_FIELD_THRESH_LVL1)) {
-			p_hal_data->DynamicTxHighPowerLvl = tx_high_pwr_level_level1;
-			PHYDM_DBG(p_dm, DBG_DYN_TXPWR, ("tx_high_pwr_level_level1 (TxPwr=0x10)\n"));
-		} else if (undecorated_smoothed_pwdb < (TX_POWER_NEAR_FIELD_THRESH_LVL1 - 5)) {
-			p_hal_data->DynamicTxHighPowerLvl = tx_high_pwr_level_normal;
-			PHYDM_DBG(p_dm, DBG_DYN_TXPWR, ("tx_high_pwr_level_normal\n"));
-		}
-	}
+void phydm_dynamic_tx_power_init_win(void *dm_void)
+{
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	void *adapter = dm->adapter;
+	PMGNT_INFO mgnt_info = &((PADAPTER)adapter)->MgntInfo;
+	HAL_DATA_TYPE *hal_data = GET_HAL_DATA((PADAPTER)adapter);
 
+	mgnt_info->bDynamicTxPowerEnable = false;
 
-	if (p_hal_data->DynamicTxHighPowerLvl != p_hal_data->LastDTPLvl) {
-		PHYDM_DBG(p_dm, DBG_DYN_TXPWR, ("odm_dynamic_tx_power_8814a() channel = %d\n", p_hal_data->CurrentChannel));
-		odm_set_tx_power_level8814(adapter, p_hal_data->CurrentChannel, p_hal_data->DynamicTxHighPowerLvl);
+	#if DEV_BUS_TYPE == RT_USB_INTERFACE
+	if (RT_GetInterfaceSelection((PADAPTER)adapter) ==
+	    INTF_SEL1_USB_High_Power) {
+		mgnt_info->bDynamicTxPowerEnable = true;
 	}
+	#endif
 
+	hal_data->LastDTPLvl = tx_high_pwr_level_normal;
+	hal_data->DynamicTxHighPowerLvl = tx_high_pwr_level_normal;
 
-	PHYDM_DBG(p_dm, DBG_DYN_TXPWR,
-		("odm_dynamic_tx_power_8814a() channel = %d  TXpower lvl=%d/%d\n",
-		p_hal_data->CurrentChannel, p_hal_data->LastDTPLvl, p_hal_data->DynamicTxHighPowerLvl));
-
-	p_hal_data->LastDTPLvl = p_hal_data->DynamicTxHighPowerLvl;
-
+	PHYDM_DBG(dm, DBG_DYN_TXPWR, "[%s] DTP=%d\n", __func__,
+		  mgnt_info->bDynamicTxPowerEnable);
 }
 
-
-
-/**/
-/*For normal driver we always use the FW method to configure TX power index to reduce I/O transaction.*/
-/**/
-/**/
-void
-odm_set_tx_power_level8814(
-	struct _ADAPTER		*adapter,
-	u8			channel,
-	u8			pwr_lvl
-)
+void phydm_dynamic_tx_power_win(void *dm_void)
 {
-#if (DEV_BUS_TYPE == RT_USB_INTERFACE)
-	u32			i, j, k = 0;
-	u32			value[264] = {0};
-	u32			path = 0, power_index, txagc_table_wd = 0x00801000;
-
-	HAL_DATA_TYPE	*p_hal_data = GET_HAL_DATA(adapter);
-
-	u8	jaguar2_rates[][4] = { {MGN_1M, MGN_2M, MGN_5_5M, MGN_11M},
-		{MGN_6M, MGN_9M, MGN_12M, MGN_18M},
-		{MGN_24M, MGN_36M, MGN_48M, MGN_54M},
-		{MGN_MCS0, MGN_MCS1, MGN_MCS2, MGN_MCS3},
-		{MGN_MCS4, MGN_MCS5, MGN_MCS6, MGN_MCS7},
-		{MGN_MCS8, MGN_MCS9, MGN_MCS10, MGN_MCS11},
-		{MGN_MCS12, MGN_MCS13, MGN_MCS14, MGN_MCS15},
-		{MGN_MCS16, MGN_MCS17, MGN_MCS18, MGN_MCS19},
-		{MGN_MCS20, MGN_MCS21, MGN_MCS22, MGN_MCS23},
-		{MGN_VHT1SS_MCS0, MGN_VHT1SS_MCS1, MGN_VHT1SS_MCS2, MGN_VHT1SS_MCS3},
-		{MGN_VHT1SS_MCS4, MGN_VHT1SS_MCS5, MGN_VHT1SS_MCS6, MGN_VHT1SS_MCS7},
-		{MGN_VHT2SS_MCS8, MGN_VHT2SS_MCS9, MGN_VHT2SS_MCS0, MGN_VHT2SS_MCS1},
-		{MGN_VHT2SS_MCS2, MGN_VHT2SS_MCS3, MGN_VHT2SS_MCS4, MGN_VHT2SS_MCS5},
-		{MGN_VHT2SS_MCS6, MGN_VHT2SS_MCS7, MGN_VHT2SS_MCS8, MGN_VHT2SS_MCS9},
-		{MGN_VHT3SS_MCS0, MGN_VHT3SS_MCS1, MGN_VHT3SS_MCS2, MGN_VHT3SS_MCS3},
-		{MGN_VHT3SS_MCS4, MGN_VHT3SS_MCS5, MGN_VHT3SS_MCS6, MGN_VHT3SS_MCS7},
-		{MGN_VHT3SS_MCS8, MGN_VHT3SS_MCS9, 0, 0}
-	};
-
-	for (path = RF_PATH_A; path <= RF_PATH_D; ++path) {
-
-		u8	usb_host = UsbModeQueryHubUsbType(adapter);
-		u8	usb_rfset = UsbModeQueryRfSet(adapter);
-		u8	usb_rf_type = RT_GetRFType(adapter);
-
-		for (i = 0; i <= 16; i++) {
-			for (j = 0; j <= 3; j++) {
-				if (jaguar2_rates[i][j] == 0)
-					continue;
-
-				txagc_table_wd =  0x00801000;
-				power_index = (u32) PHY_GetTxPowerIndex(adapter, (u8)path, jaguar2_rates[i][j], p_hal_data->CurrentChannelBW, channel);
-
-				/*for Query bus type to recude tx power.*/
-				if (usb_host != USB_MODE_U3 && usb_rfset == 1 && IS_HARDWARE_TYPE_8814AU(adapter) && usb_rf_type == RF_3T3R) {
-					if (channel <= 14) {
-						if (power_index >= 16)
-							power_index -= 16;
-						else
-							power_index = 0;
-					} else
-						power_index = 0;
-				}
-
-				if (pwr_lvl == tx_high_pwr_level_level1) {
-					if (power_index >= 0x10)
-						power_index -= 0x10;
-					else
-						power_index = 0;
-				} else if (pwr_lvl == tx_high_pwr_level_level2)
-					power_index = 0;
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
 
-				txagc_table_wd |= (path << 8) | MRateToHwRate(jaguar2_rates[i][j]) | (power_index << 24);
-
-				PHY_SetTxPowerIndexShadow(adapter, (u8)power_index, (u8)path, jaguar2_rates[i][j]);
+	if (!(dm->support_ability & ODM_BB_DYNAMIC_TXPWR))
+		return;
 
-				value[k++] = txagc_table_wd;
+	#if (RTL8814A_SUPPORT == 1)
+	if (dm->support_ic_type == ODM_RTL8814A)
+		odm_dynamic_tx_power_8814a(dm);
+	#endif
+
+	#if (RTL8821A_SUPPORT == 1)
+	if (dm->support_ic_type & ODM_RTL8821) {
+		void *adapter = dm->adapter;
+		PMGNT_INFO mgnt_info = GetDefaultMgntInfo((PADAPTER)adapter);
+
+		if (mgnt_info->RegRspPwr == 1) {
+			if (dm->rssi_min > 60) {
+				/*Resp TXAGC offset = -3dB*/
+				odm_set_mac_reg(dm, 0x6d8, 0x1C0000, 1);
+			} else if (dm->rssi_min < 55) {
+				/*Resp TXAGC offset = 0dB*/
+				odm_set_mac_reg(dm, 0x6d8, 0x1C0000, 0);
 			}
 		}
 	}
-
-	if (adapter->MgntInfo.bScanInProgress == false &&  adapter->MgntInfo.RegFWOffload == 2)
-		HalDownloadTxPowerLevel8814(adapter, value);
-#endif
+	#endif
 }
-#endif
+#endif /*@#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)*/
+#endif /* @#ifdef CONFIG_DYNAMIC_TX_TWR */
diff --git a/rtl8723DS/hal/phydm/phydm_dynamictxpower.h b/rtl8723DS/hal/phydm/phydm_dynamictxpower.h
index c79f88c..3906b72 100755..100644
--- a/rtl8723DS/hal/phydm/phydm_dynamictxpower.h
+++ b/rtl8723DS/hal/phydm/phydm_dynamictxpower.h
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2007 - 2017 Realtek Corporation.
+ * Copyright(c) 2007 - 2017  Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -8,93 +8,96 @@
  *
  * This program is distributed in the hope that it will be useful, but WITHOUT
  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  * more details.
  *
+ * The full GNU General Public License is included in this distribution in the
+ * file called LICENSE.
+ *
+ * Contact Information:
+ * wlanfae <wlanfae@realtek.com>
+ * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
+ * Hsinchu 300, Taiwan.
+ *
+ * Larry Finger <Larry.Finger@lwfinger.net>
+ *
  *****************************************************************************/
 
-#ifndef	__PHYDMDYNAMICTXPOWER_H__
-#define    __PHYDMDYNAMICTXPOWER_H__
+#ifndef __PHYDMDYNAMICTXPOWER_H__
+#define __PHYDMDYNAMICTXPOWER_H__
 
-/*#define DYNAMIC_TXPWR_VERSION	"1.0"*/
-/*#define DYNAMIC_TXPWR_VERSION	"1.3" */ /*2015.08.26, Add 8814 Dynamic TX power*/
-#define DYNAMIC_TXPWR_VERSION	"1.4" /*2015.11.06, Add CE 8821A Dynamic TX power*/
+#ifdef CONFIG_DYNAMIC_TX_TWR
+/* @============================================================
+ *  Definition
+ * ============================================================
+ */
+
+/*@#define DYNAMIC_TXPWR_VERSION	"1.0"*/
+/*@#define DYNAMIC_TXPWR_VERSION	"1.3" */ /*@2015.08.26, Add 8814 Dynamic TX power*/
+#define DYNAMIC_TXPWR_VERSION "1.4" /*@2015.11.06, Add CE 8821A Dynamic TX power*/
 
 #if (DM_ODM_SUPPORT_TYPE == ODM_AP)
-	#define		TX_POWER_NEAR_FIELD_THRESH_LVL2	74
-	#define		TX_POWER_NEAR_FIELD_THRESH_LVL1	60
-	#define		TX_POWER_NEAR_FIELD_THRESH_AP	0x3F
+#define TX_POWER_NEAR_FIELD_THRESH_LVL2 74
+#define TX_POWER_NEAR_FIELD_THRESH_LVL1 60
+#define TX_POWER_NEAR_FIELD_THRESH_AP 0x3F
 #elif (DM_ODM_SUPPORT_TYPE == ODM_WIN)
-	#define		TX_POWER_NEAR_FIELD_THRESH_LVL2	74
-	#define		TX_POWER_NEAR_FIELD_THRESH_LVL1	67
+#define TX_POWER_NEAR_FIELD_THRESH_LVL2 74
+#define TX_POWER_NEAR_FIELD_THRESH_LVL1 67
 #elif (DM_ODM_SUPPORT_TYPE == ODM_CE)
-	#define		TX_POWER_NEAR_FIELD_THRESH_LVL2	74
-	#define		TX_POWER_NEAR_FIELD_THRESH_LVL1	60
+#define TX_POWER_NEAR_FIELD_THRESH_LVL2 74
+#define TX_POWER_NEAR_FIELD_THRESH_LVL1 60
 #endif
 
-#define		tx_high_pwr_level_normal		0
-#define		tx_high_pwr_level_level1		1
-#define		tx_high_pwr_level_level2		2
-
-#define		tx_high_pwr_level_bt1			3
-#define		tx_high_pwr_level_bt2			4
-#define		tx_high_pwr_level_15			5
-#define		tx_high_pwr_level_35			6
-#define		tx_high_pwr_level_50			7
-#define		tx_high_pwr_level_70			8
-#define		tx_high_pwr_level_100			9
-
-void
-phydm_dynamic_tx_power_init(
-	void					*p_dm_void
-);
-
-void
-odm_dynamic_tx_power_restore_power_index(
-	void					*p_dm_void
-);
-
-void
-odm_dynamic_tx_power_nic(
-	void					*p_dm_void
-);
-
-#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_CE))
-void
-odm_dynamic_tx_power_save_power_index(
-	void					*p_dm_void
-);
-
-void
-odm_dynamic_tx_power_write_power_index(
-	void					*p_dm_void,
-	u8		value);
-
-void
-odm_dynamic_tx_power_8821(
-	void					*p_dm_void,
-	u8					*p_desc,
-	u8					mac_id
-);
+#define tx_high_pwr_level_normal 0
+#define tx_high_pwr_level_level1 1
+#define tx_high_pwr_level_level2 2
+#define tx_high_pwr_level_level3 3
+#define tx_high_pwr_level_unchange 4
+
+/* @============================================================
+ * enumrate
+ * ============================================================
+ */
+enum phydm_dtp_power_offset {
+	PHYDM_OFFSET_ZERO = 0,
+	PHYDM_OFFSET_MINUS_3DB = 1,
+	PHYDM_OFFSET_MINUS_7DB = 2,
+	PHYDM_OFFSET_MINUS_11DB = 3,
+	PHYDM_OFFSET_ADD_3DB = 4,
+	PHYDM_OFFSET_ADD_6DB = 5
+};
+
+enum phydm_dtp_power_offset_2ndtype {
+	PHYDM_2ND_OFFSET_ZERO = 0,
+	PHYDM_2ND_OFFSET_MINUS_3DB = 2,
+	PHYDM_2ND_OFFSET_MINUS_7DB = 3,
+	PHYDM_2ND_OFFSET_MINUS_11DB = 1
+};
+
+
+/* @============================================================
+ *  structure
+ * ============================================================
+ */
+
+/* @============================================================
+ *  Function Prototype
+ * ============================================================
+ */
+
+extern void
+odm_set_dyntxpwr(void *dm_void, u8 *desc, u8 mac_id);
+
+void phydm_dynamic_tx_power(void *dm_void);
+
+void phydm_dynamic_tx_power_init(void *dm_void);
+
+void phydm_dtp_debug(void *dm_void, char input[][16], u32 *_used, char *output,
+			     u32 *_out_len);
+
 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
-void
-odm_dynamic_tx_power_8814a(
-	void					*p_dm_void
-);
-
-
-void
-odm_set_tx_power_level8814(
-	struct _ADAPTER		*adapter,
-	u8			channel,
-	u8			pwr_lvl
-);
-#endif
+void odm_dynamic_tx_power_win(void *dm_void);
 #endif
 
-void
-odm_dynamic_tx_power(
-	void					*p_dm_void
-);
-
+#endif
 #endif
diff --git a/rtl8723DS/hal/phydm/phydm_features.h b/rtl8723DS/hal/phydm/phydm_features.h
index 2932582..afb1839 100755..100644
--- a/rtl8723DS/hal/phydm/phydm_features.h
+++ b/rtl8723DS/hal/phydm/phydm_features.h
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2007 - 2017 Realtek Corporation.
+ * Copyright(c) 2007 - 2017  Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -8,35 +8,65 @@
  *
  * This program is distributed in the hope that it will be useful, but WITHOUT
  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  * more details.
  *
+ * The full GNU General Public License is included in this distribution in the
+ * file called LICENSE.
+ *
+ * Contact Information:
+ * wlanfae <wlanfae@realtek.com>
+ * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
+ * Hsinchu 300, Taiwan.
+ *
+ * Larry Finger <Larry.Finger@lwfinger.net>
+ *
  *****************************************************************************/
 
-#ifndef	__PHYDM_FEATURES_H__
-#define __PHYDM_FEATURES
+#ifndef __PHYDM_FEATURES_H__
+#define __PHYDM_FEATURES_H__
 
-#define ODM_DC_CANCELLATION_SUPPORT		(ODM_RTL8188F | ODM_RTL8710B)
+#define CONFIG_RUN_IN_DRV
+#define ODM_DC_CANCELLATION_SUPPORT		(ODM_RTL8188F | \
+						 ODM_RTL8710B | \
+						 ODM_RTL8192F | \
+						 ODM_RTL8821C | \
+						 ODM_RTL8721D)
 #define ODM_RECEIVER_BLOCKING_SUPPORT	(ODM_RTL8188E | ODM_RTL8192E)
 
-#if ((RTL8814A_SUPPORT == 1) || (RTL8821C_SUPPORT == 1) || (RTL8822B_SUPPORT == 1) || (RTL8197F_SUPPORT == 1))
-	#define PHYDM_LA_MODE_SUPPORT			1
-#else
-	#define PHYDM_LA_MODE_SUPPORT			0
-#endif
-
-/*20170103 YuChen add for FW API*/
-#define PHYDM_FW_API_ENABLE_8822B			1
+/*@20170103 YuChen add for FW API*/
+#define PHYDM_FW_API_ENABLE_8822B		1
 #define PHYDM_FW_API_FUNC_ENABLE_8822B		1
-#define PHYDM_FW_API_ENABLE_8821C			1
+#define PHYDM_FW_API_ENABLE_8821C		1
 #define PHYDM_FW_API_FUNC_ENABLE_8821C		1
+#define PHYDM_FW_API_ENABLE_8195B		1
+#define PHYDM_FW_API_FUNC_ENABLE_8195B		1
+#define PHYDM_FW_API_ENABLE_8198F		1
+#define PHYDM_FW_API_FUNC_ENABLE_8198F		1
+#define PHYDM_FW_API_ENABLE_8822C 1
+#define PHYDM_FW_API_FUNC_ENABLE_8822C 1
+#define PHYDM_FW_API_ENABLE_8814B 1
+#define PHYDM_FW_API_FUNC_ENABLE_8814B 1
+#define PHYDM_FW_API_ENABLE_8812F 1
+#define PHYDM_FW_API_FUNC_ENABLE_8812F 1
+
+#define CONFIG_POWERSAVING 0
+
+#ifdef BEAMFORMING_SUPPORT
+#if (BEAMFORMING_SUPPORT)
+	#define PHYDM_BEAMFORMING_SUPPORT
+#endif
+#endif
 
 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
 	#include	"phydm_features_win.h"
 #elif (DM_ODM_SUPPORT_TYPE == ODM_CE)
 	#include	"phydm_features_ce.h"
+	/*@#include	"phydm_features_ce2_kernel.h"*/
 #elif (DM_ODM_SUPPORT_TYPE == ODM_AP)
 	#include	"phydm_features_ap.h"
+#elif (DM_ODM_SUPPORT_TYPE == ODM_IOT)
+	#include	"phydm_features_iot.h"
 #endif
 
 #endif
diff --git a/rtl8723DS/hal/phydm/phydm_features_ap.h b/rtl8723DS/hal/phydm/phydm_features_ap.h
index ac13c4e..db2c3d2 100755..100644
--- a/rtl8723DS/hal/phydm/phydm_features_ap.h
+++ b/rtl8723DS/hal/phydm/phydm_features_ap.h
@@ -14,70 +14,140 @@
  *****************************************************************************/
 
 #ifndef	__PHYDM_FEATURES_AP_H__
-#define __PHYDM_FEATURES_AP
+#define __PHYDM_FEATURES_AP_H__
+
+#if (RTL8814A_SUPPORT || RTL8821C_SUPPORT || RTL8822B_SUPPORT ||\
+	RTL8197F_SUPPORT || RTL8192F_SUPPORT || RTL8198F_SUPPORT ||\
+	RTL8822C_SUPPORT || RTL8812F_SUPPORT || RTL8814B_SUPPORT)
+	#define PHYDM_LA_MODE_SUPPORT			1
+#else
+	#define PHYDM_LA_MODE_SUPPORT			0
+#endif
 
-#if (RTL8822B_SUPPORT == 1)
+#if (RTL8822B_SUPPORT || RTL8812A_SUPPORT || RTL8197F_SUPPORT ||\
+	RTL8192F_SUPPORT)
+	#define DYN_ANT_WEIGHTING_SUPPORT
+#endif
+
+#if (RTL8822B_SUPPORT || RTL8821C_SUPPORT)
+	#define FAHM_SUPPORT
+#endif
+	#define NHM_SUPPORT
+	#define CLM_SUPPORT
+
+#if (RTL8822B_SUPPORT)
 	/*#define PHYDM_PHYSTAUS_SMP_MODE*/
 #endif
 
-#if (RTL8197F_SUPPORT == 1)
+#if (RTL8197F_SUPPORT)
 	/*#define PHYDM_TDMA_DIG_SUPPORT*/
 #endif
 
-#if (RTL8197F_SUPPORT == 1)
+#if (RTL8198F_SUPPORT || RTL8814B_SUPPORT || RTL8812F_SUPPORT)
+	#define PHYDM_TDMA_DIG_SUPPORT 1
+	#ifdef PHYDM_TDMA_DIG_SUPPORT
+	#define IS_USE_NEW_TDMA /*new tdma dig test*/
+	#endif
+#endif
+
+#if (RTL8197F_SUPPORT || RTL8822B_SUPPORT ||\
+	RTL8198F_SUPPORT || RTL8814B_SUPPORT || RTL8812F_SUPPORT)
 	#define PHYDM_LNA_SAT_CHK_SUPPORT
+	#ifdef PHYDM_LNA_SAT_CHK_SUPPORT
+
+		#if (RTL8197F_SUPPORT)
+		/*#define PHYDM_LNA_SAT_CHK_SUPPORT_TYPE1*/
+		#endif
+
+		#if (RTL8822B_SUPPORT)
+		/*#define PHYDM_LNA_SAT_CHK_TYPE2*/
+		#endif
+
+		#if (RTL8198F_SUPPORT || RTL8814B_SUPPORT || RTL8812F_SUPPORT)
+		#define PHYDM_LNA_SAT_CHK_TYPE1
+		#endif
+	#endif
 #endif
 
-#if (RTL8822B_SUPPORT == 1)
+#if (RTL8822B_SUPPORT)
 	/*#define PHYDM_POWER_TRAINING_SUPPORT*/
 #endif
 
-#if (RTL8822B_SUPPORT == 1)
+#if (RTL8814B_SUPPORT)
+	/* #define PHYDM_PMAC_TX_SETTING_SUPPORT */
+#endif
+
+#if (RTL8814B_SUPPORT)
+	/* #define PHYDM_MP_SUPPORT */
+#endif
+
+#if (RTL8822B_SUPPORT)
 	#define PHYDM_TXA_CALIBRATION
 #endif
 
-#if (RTL8188E_SUPPORT == 1) || (RTL8197F_SUPPORT == 1)
+#if (RTL8188E_SUPPORT || RTL8197F_SUPPORT || RTL8192F_SUPPORT)
 	#define	PHYDM_PRIMARY_CCA
 #endif
 
-#if (RTL8188F_SUPPORT == 1 || RTL8710B_SUPPORT == 1 || RTL8821C_SUPPORT == 1 || RTL8822B_SUPPORT == 1)
+#if (RTL8188F_SUPPORT || RTL8710B_SUPPORT || RTL8821C_SUPPORT ||\
+	RTL8822B_SUPPORT || RTL8192F_SUPPORT)
 	#define	PHYDM_DC_CANCELLATION
 #endif
 
-#if (RTL8822B_SUPPORT == 1)
-	/*#define	CONFIG_DYNAMIC_RX_PATH*/
+#if (RTL8822B_SUPPORT || RTL8197F_SUPPORT || RTL8192F_SUPPORT)
+	#define	CONFIG_ADAPTIVE_SOML
+#endif
+
+#if (RTL8812A_SUPPORT || RTL8821A_SUPPORT || RTL8881A_SUPPORT ||\
+	RTL8192E_SUPPORT || RTL8723B_SUPPORT)
+	/*#define	CONFIG_RA_FW_DBG_CODE*/
 #endif
 
-#if (RTL8822B_SUPPORT == 1 || RTL8197F_SUPPORT == 1)
-	/*#define	CONFIG_ADAPTIVE_SOML*/
+#if (RTL8192F_SUPPORT == 1)
+	/*#define	CONFIG_8912F_SPUR_CALIBRATION*/
 #endif
 
-#define PHYDM_DIG_MODE_DECISION_SUPPORT
+#if (RTL8822B_SUPPORT == 1)
+	/* #define	CONFIG_8822B_SPUR_CALIBRATION */
+#endif
+
+#ifdef CONFIG_SUPPORT_DYNAMIC_TXPWR
+#define CONFIG_DYNAMIC_TX_TWR
+#endif
 /*#define	CONFIG_PSD_TOOL*/
 #define PHYDM_SUPPORT_CCKPD
-#define RA_MASK_PHYDMLIZE_AP
-/* #define	CONFIG_RA_DBG_CMD*/
-/*#define	CONFIG_RA_FW_DBG_CODE*/
-
+#define PHYDM_SUPPORT_ADAPTIVITY
 /*#define	CONFIG_PATH_DIVERSITY*/
 /*#define	CONFIG_RA_DYNAMIC_RTY_LIMIT*/
-#define	CONFIG_RA_DYNAMIC_RATE_ID
+/*#define	CONFIG_RA_DYNAMIC_RATE_ID*/
 #define	CONFIG_BB_TXBF_API
 /*#define	ODM_CONFIG_BT_COEXIST*/
-/*#define	PHYDM_3RD_REFORM_RA_MASK*/
-#define	PHYDM_3RD_REFORM_RSSI_MONOTOR
 #define	PHYDM_SUPPORT_RSSI_MONITOR
 #if !defined(CONFIG_DISABLE_PHYDM_DEBUG_FUNCTION)
 	#define CONFIG_PHYDM_DEBUG_FUNCTION
 #endif
 
 /* [ Configure Antenna Diversity ] */
-#if defined(CONFIG_RTL_8881A_ANT_SWITCH) || defined(CONFIG_SLOT_0_ANT_SWITCH) || defined(CONFIG_SLOT_1_ANT_SWITCH)
+#if (RTL8188F_SUPPORT)
+	#ifdef CONFIG_ANTENNA_DIVERSITY
+		#define CONFIG_PHYDM_ANTENNA_DIVERSITY
+		#define CONFIG_S0S1_SW_ANTENNA_DIVERSITY
+	#endif
+#endif
+
+#if defined(CONFIG_RTL_8881A_ANT_SWITCH) || defined(CONFIG_SLOT_0_ANT_SWITCH) || defined(CONFIG_SLOT_1_ANT_SWITCH) || defined(CONFIG_RTL_8197F_ANT_SWITCH)
 	#define CONFIG_PHYDM_ANTENNA_DIVERSITY
 	#define ODM_EVM_ENHANCE_ANTDIV
 	#define SKIP_EVM_ANTDIV_TRAINING_PATCH
 
 	/*----------*/
+	#ifdef CONFIG_NO_2G_DIVERSITY_8197F
+		#define CONFIG_NO_2G_DIVERSITY
+	#elif defined(CONFIG_2G_CGCS_RX_DIVERSITY_8197F)
+		#define CONFIG_2G_CGCS_RX_DIVERSITY
+	#elif defined(CONFIG_2G_CG_TRX_DIVERSITY_8197F)
+		#define CONFIG_2G_CG_TRX_DIVERSITY
+	#endif
 
 	#if (!defined(CONFIG_NO_2G_DIVERSITY) && !defined(CONFIG_2G5G_CG_TRX_DIVERSITY_8881A) && !defined(CONFIG_2G_CGCS_RX_DIVERSITY) && !defined(CONFIG_2G_CG_TRX_DIVERSITY) && !defined(CONFIG_2G_CG_SMART_ANT_DIVERSITY))
 		#define CONFIG_NO_2G_DIVERSITY
@@ -113,6 +183,14 @@
 #ifdef CONFIG_SMART_ANTENNA
 	/*#define	CONFIG_CUMITEK_SMART_ANTENNA*/
 #endif
+#define CFG_DIG_DAMPING_CHK
 /* --------------------------------------------------*/
+#ifdef PHYDM_BEAMFORMING_SUPPORT
+	#if (RTL8192F_SUPPORT || RTL8195B_SUPPORT || RTL8821C_SUPPORT ||\
+	     RTL8822B_SUPPORT || RTL8197F_SUPPORT || RTL8198F_SUPPORT ||\
+	     RTL8814B_SUPPORT || RTL8812F_SUPPORT)
+		#define	DRIVER_BEAMFORMING_VERSION2
+	#endif
+#endif
 
 #endif
diff --git a/rtl8723DS/hal/phydm/phydm_features_ce.h b/rtl8723DS/hal/phydm/phydm_features_ce.h
index 813e1e4..6c12436 100755..100644
--- a/rtl8723DS/hal/phydm/phydm_features_ce.h
+++ b/rtl8723DS/hal/phydm/phydm_features_ce.h
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2007 - 2017 Realtek Corporation.
+ * Copyright(c) 2007 - 2017  Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -8,100 +8,207 @@
  *
  * This program is distributed in the hope that it will be useful, but WITHOUT
  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  * more details.
  *
+ * The full GNU General Public License is included in this distribution in the
+ * file called LICENSE.
+ *
+ * Contact Information:
+ * wlanfae <wlanfae@realtek.com>
+ * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
+ * Hsinchu 300, Taiwan.
+ *
+ * Larry Finger <Larry.Finger@lwfinger.net>
+ *
  *****************************************************************************/
 
-#ifndef	__PHYDM_FEATURES_CE_H__
-#define __PHYDM_FEATURES_CE
+#ifndef __PHYDM_FEATURES_CE_H__
+#define __PHYDM_FEATURES_CE_H__
 
-#if (RTL8822B_SUPPORT == 1)
-	/*#define PHYDM_PHYSTAUS_SMP_MODE*/
+#if (RTL8814A_SUPPORT || RTL8821C_SUPPORT || RTL8822B_SUPPORT ||\
+	RTL8197F_SUPPORT || RTL8192F_SUPPORT || RTL8198F_SUPPORT ||\
+	RTL8822C_SUPPORT)
+	#define PHYDM_LA_MODE_SUPPORT			1
+#else
+	#define PHYDM_LA_MODE_SUPPORT			0
 #endif
 
-/*#define PHYDM_TDMA_DIG_SUPPORT*/
-/*#define PHYDM_LNA_SAT_CHK_SUPPORT*/
+#if (RTL8822B_SUPPORT || RTL8812A_SUPPORT || RTL8197F_SUPPORT ||\
+	RTL8192F_SUPPORT)
+	#define DYN_ANT_WEIGHTING_SUPPORT
+#endif
 
-#if (RTL8822B_SUPPORT == 1)
+#if (RTL8822B_SUPPORT || RTL8821C_SUPPORT)
+	#define FAHM_SUPPORT
+#endif
+	#define NHM_SUPPORT
+	#define CLM_SUPPORT
+
+#if (RTL8822B_SUPPORT)
+	/*@#define PHYDM_PHYSTAUS_SMP_MODE*/
+#endif
+
+/*@#define PHYDM_TDMA_DIG_SUPPORT*/
+
+#if (RTL8822B_SUPPORT || RTL8192F_SUPPORT || RTL8821C_SUPPORT)
+	#ifdef CONFIG_TDMADIG
+	#define PHYDM_TDMA_DIG_SUPPORT
+	#ifdef PHYDM_TDMA_DIG_SUPPORT
+	#define IS_USE_NEW_TDMA /*new tdma dig test*/
+	#endif
+	#endif
+#endif
+
+#if (RTL8814B_SUPPORT)
+	/*@#define PHYDM_TDMA_DIG_SUPPORT*/
+	#ifdef PHYDM_TDMA_DIG_SUPPORT
+	/*@#define IS_USE_NEW_TDMA*/ /*new tdma dig test*/
+	#endif
+#endif
+
+#if (RTL8197F_SUPPORT || RTL8822B_SUPPORT || RTL8814B_SUPPORT)
+	/*@#define PHYDM_LNA_SAT_CHK_SUPPORT*/
+	#ifdef PHYDM_LNA_SAT_CHK_SUPPORT
+
+		#if (RTL8197F_SUPPORT)
+		/*@#define PHYDM_LNA_SAT_CHK_SUPPORT_TYPE1*/
+		#endif
+
+		#if (RTL8822B_SUPPORT)
+		/*@#define PHYDM_LNA_SAT_CHK_TYPE2*/
+		#endif
+
+		#if (RTL8814B_SUPPORT)
+		/*@#define PHYDM_LNA_SAT_CHK_TYPE1*/
+		#endif
+	#endif
+#endif
+
+#if (RTL8822B_SUPPORT || RTL8192F_SUPPORT)
 	#define PHYDM_POWER_TRAINING_SUPPORT
 #endif
 
-#if (RTL8822B_SUPPORT == 1)
+#if (RTL8822C_SUPPORT)
+	#define PHYDM_PMAC_TX_SETTING_SUPPORT
+#endif
+
+#if (RTL8822C_SUPPORT)
+	#define PHYDM_MP_SUPPORT
+#endif
+
+#if (RTL8822B_SUPPORT)
 	#define PHYDM_TXA_CALIBRATION
 #endif
 
-#if (RTL8188E_SUPPORT == 1)
+#if (RTL8188E_SUPPORT)
 	#define	PHYDM_PRIMARY_CCA
 #endif
 
-#if (RTL8188F_SUPPORT == 1 || RTL8710B_SUPPORT == 1 || RTL8821C_SUPPORT == 1 || RTL8822B_SUPPORT == 1)
+#if (RTL8188F_SUPPORT || RTL8710B_SUPPORT || RTL8821C_SUPPORT ||\
+	RTL8822B_SUPPORT || RTL8192F_SUPPORT)
 	#define	PHYDM_DC_CANCELLATION
 #endif
 
-#if (RTL8822B_SUPPORT == 1 || RTL8197F_SUPPORT == 1)
+#if (RTL8822B_SUPPORT || RTL8197F_SUPPORT || RTL8192F_SUPPORT)
 	#define	CONFIG_ADAPTIVE_SOML
 #endif
 
+#if (RTL8188E_SUPPORT || RTL8192E_SUPPORT)
+	#define	CONFIG_RECEIVER_BLOCKING
+#endif
 
+#if (RTL8192F_SUPPORT == 1)
+	/*#define	CONFIG_8912F_SPUR_CALIBRATION*/
+#endif
 
 #if (RTL8822B_SUPPORT == 1)
-	/*#define	CONFIG_DYNAMIC_RX_PATH*/
+	#define	CONFIG_8822B_SPUR_CALIBRATION
 #endif
 
-#if (RTL8188E_SUPPORT == 1 || RTL8192E_SUPPORT == 1)
-	#define	CONFIG_RECEIVER_BLOCKING
+#ifdef CONFIG_SUPPORT_DYNAMIC_TXPWR
+#define CONFIG_DYNAMIC_TX_TWR
 #endif
 #define PHYDM_SUPPORT_CCKPD
-#define RA_MASK_PHYDMLIZE_CE
+#define PHYDM_SUPPORT_ADAPTIVITY
 
-/*Antenna Diversity*/
+/*@Antenna Diversity*/
 #ifdef CONFIG_ANTENNA_DIVERSITY
 	#define CONFIG_PHYDM_ANTENNA_DIVERSITY
 
 	#ifdef CONFIG_PHYDM_ANTENNA_DIVERSITY
 
-		#if (RTL8723B_SUPPORT == 1) || (RTL8821A_SUPPORT == 1) || (RTL8188F_SUPPORT == 1) || (RTL8821C_SUPPORT == 1)
+		#if (RTL8723B_SUPPORT || RTL8821A_SUPPORT ||\
+		     RTL8188F_SUPPORT || RTL8821C_SUPPORT ||\
+		     RTL8723D_SUPPORT)
 			#define	CONFIG_S0S1_SW_ANTENNA_DIVERSITY
 		#endif
 
-		#if (RTL8821A_SUPPORT == 1)
-			/*#define CONFIG_HL_SMART_ANTENNA_TYPE1*/
+		#if (RTL8821A_SUPPORT)
+			/*@#define CONFIG_HL_SMART_ANTENNA_TYPE1*/
 		#endif
 
-		#if (RTL8822B_SUPPORT == 1)
-			/*#define CONFIG_HL_SMART_ANTENNA_TYPE2*/
+		#if (RTL8822B_SUPPORT)
+			/*@#define CONFIG_HL_SMART_ANTENNA_TYPE2*/
 		#endif
+
 	#endif
 #endif
 
-/*[SmartAntenna]*/
-/*#define	CONFIG_SMART_ANTENNA*/
+/*@[SmartAntenna]*/
+/*@#define	CONFIG_SMART_ANTENNA*/
 #ifdef CONFIG_SMART_ANTENNA
-	/*#define	CONFIG_CUMITEK_SMART_ANTENNA*/
+	/*@#define	CONFIG_CUMITEK_SMART_ANTENNA*/
 #endif
-/* --------------------------------------------------*/
+/* @--------------------------------------------------*/
 
 #ifdef CONFIG_DFS_MASTER
 	#define CONFIG_PHYDM_DFS_MASTER
 #endif
 
-/*#define PHYDM_DIG_MODE_DECISION_SUPPORT*/
+#if (RTL8812A_SUPPORT || RTL8821A_SUPPORT || RTL8881A_SUPPORT ||\
+	RTL8192E_SUPPORT || RTL8723B_SUPPORT)
+	/*@#define	CONFIG_RA_FW_DBG_CODE*/
+#endif
+
 #define	CONFIG_PSD_TOOL
-/*#define	CONFIG_RA_DBG_CMD*/
-/*#define	CONFIG_RA_FW_DBG_CODE*/
-/*#define	CONFIG_ANT_DETECTION*/
-/*#define	CONFIG_PATH_DIVERSITY*/
-/*#define	CONFIG_RA_DYNAMIC_RTY_LIMIT*/
+/*@#define	CONFIG_ANT_DETECTION*/
+/*@#define	CONFIG_PATH_DIVERSITY*/
+/*@#define	CONFIG_RA_DYNAMIC_RTY_LIMIT*/
 #define	CONFIG_BB_TXBF_API
 #define	CONFIG_PHYDM_DEBUG_FUNCTION
 
 #ifdef CONFIG_BT_COEXIST
 	#define	ODM_CONFIG_BT_COEXIST
 #endif
-#define	PHYDM_3RD_REFORM_RA_MASK
-#define	PHYDM_3RD_REFORM_RSSI_MONOTOR
 #define	PHYDM_SUPPORT_RSSI_MONITOR
-/*#define	PHYDM_AUTO_DEGBUG*/
+/*@#define	PHYDM_AUTO_DEGBUG*/
+#define CFG_DIG_DAMPING_CHK
+
+
+#ifdef PHYDM_BEAMFORMING_SUPPORT
+	#if (RTL8812A_SUPPORT || RTL8821A_SUPPORT || RTL8192E_SUPPORT ||\
+	     RTL8814A_SUPPORT || RTL8881A_SUPPORT)
+		#define	PHYDM_BEAMFORMING_VERSION1
+	#endif
+	#if (RTL8192F_SUPPORT || RTL8195B_SUPPORT || RTL8821C_SUPPORT ||\
+	     RTL8822B_SUPPORT || RTL8197F_SUPPORT || RTL8198F_SUPPORT ||\
+	     RTL8822C_SUPPORT || RTL8814B_SUPPORT)
+		#define	DRIVER_BEAMFORMING_VERSION2
+	#endif
+#endif
+
+#if (RTL8822B_SUPPORT)
+	#ifdef CONFIG_MCC_MODE
+	#define	CONFIG_MCC_DM
+	#endif
+#endif
+
+#if (RTL8822B_SUPPORT)
+	#ifdef CONFIG_DYNAMIC_BYPASS_MODE
+	#define	CONFIG_DYNAMIC_BYPASS
+	#endif
+#endif
+
 
 #endif
diff --git a/rtl8723DS/hal/phydm/phydm_features_ce2_kernel.h b/rtl8723DS/hal/phydm/phydm_features_ce2_kernel.h
new file mode 100644
index 0000000..c206ea6
--- a/dev/null
+++ b/rtl8723DS/hal/phydm/phydm_features_ce2_kernel.h
@@ -0,0 +1,84 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2007 - 2017  Realtek Corporation.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ *
+ * The full GNU General Public License is included in this distribution in the
+ * file called LICENSE.
+ *
+ * Contact Information:
+ * wlanfae <wlanfae@realtek.com>
+ * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
+ * Hsinchu 300, Taiwan.
+ *
+ * Larry Finger <Larry.Finger@lwfinger.net>
+ *
+ *****************************************************************************/
+
+#ifndef __PHYDM_FEATURES_CE_H__
+#define __PHYDM_FEATURES_CE_H__
+
+#define PHYDM_LA_MODE_SUPPORT			0
+
+#if (RTL8822B_SUPPORT || RTL8812A_SUPPORT || RTL8197F_SUPPORT ||\
+	RTL8192F_SUPPORT)
+	#define DYN_ANT_WEIGHTING_SUPPORT
+#endif
+
+#if (RTL8822B_SUPPORT || RTL8821C_SUPPORT)
+	#define FAHM_SUPPORT
+#endif
+	#define NHM_SUPPORT
+	#define CLM_SUPPORT
+
+#if (RTL8822B_SUPPORT)
+	#define PHYDM_TXA_CALIBRATION
+#endif
+
+#if (RTL8188F_SUPPORT || RTL8710B_SUPPORT || RTL8821C_SUPPORT ||\
+	RTL8822B_SUPPORT || RTL8192F_SUPPORT)
+	#define	PHYDM_DC_CANCELLATION
+#endif
+
+#if (RTL8192F_SUPPORT == 1)
+	/*#define	CONFIG_8912F_SPUR_CALIBRATION*/
+#endif
+
+#if (RTL8822B_SUPPORT == 1)
+	/* #define	CONFIG_8822B_SPUR_CALIBRATION */
+#endif
+
+#define PHYDM_SUPPORT_CCKPD
+#define PHYDM_SUPPORT_ADAPTIVITY
+
+#ifdef CONFIG_DFS_MASTER
+	#define CONFIG_PHYDM_DFS_MASTER
+#endif
+
+#define	CONFIG_BB_TXBF_API
+#define	CONFIG_PHYDM_DEBUG_FUNCTION
+
+#ifdef CONFIG_BT_COEXIST
+	#define	ODM_CONFIG_BT_COEXIST
+#endif
+#define	PHYDM_SUPPORT_RSSI_MONITOR
+#define CFG_DIG_DAMPING_CHK
+
+
+#ifdef PHYDM_BEAMFORMING_SUPPORT
+	#if (RTL8192F_SUPPORT || RTL8195B_SUPPORT || RTL8821C_SUPPORT ||\
+	     RTL8822B_SUPPORT || RTL8197F_SUPPORT || RTL8198F_SUPPORT ||\
+	     RTL8822C_SUPPORT || RTL8814B_SUPPORT)
+		#define	DRIVER_BEAMFORMING_VERSION2
+	#endif
+#endif
+
+#endif
diff --git a/rtl8723DS/hal/phydm/phydm_features_iot.h b/rtl8723DS/hal/phydm/phydm_features_iot.h
new file mode 100644
index 0000000..a74d571
--- a/dev/null
+++ b/rtl8723DS/hal/phydm/phydm_features_iot.h
@@ -0,0 +1,174 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2007 - 2017  Realtek Corporation.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ *
+ * The full GNU General Public License is included in this distribution in the
+ * file called LICENSE.
+ *
+ * Contact Information:
+ * wlanfae <wlanfae@realtek.com>
+ * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
+ * Hsinchu 300, Taiwan.
+ *
+ * Larry Finger <Larry.Finger@lwfinger.net>
+ *
+ *****************************************************************************/
+
+#ifndef	__PHYDM_FEATURES_IOT_H__
+#define __PHYDM_FEATURES_IOT_H__
+
+#if (RTL8814A_SUPPORT || RTL8821C_SUPPORT || RTL8822B_SUPPORT ||\
+	RTL8197F_SUPPORT || RTL8192F_SUPPORT || RTL8198F_SUPPORT ||\
+	RTL8822C_SUPPORT || RTL8195B_SUPPORT)
+	#define PHYDM_LA_MODE_SUPPORT			1
+#else
+	#define PHYDM_LA_MODE_SUPPORT			0
+#endif
+
+#if (RTL8822B_SUPPORT || RTL8812A_SUPPORT || RTL8197F_SUPPORT ||\
+	RTL8192F_SUPPORT)
+	#define DYN_ANT_WEIGHTING_SUPPORT
+#endif
+
+#if (RTL8822B_SUPPORT || RTL8821C_SUPPORT)
+	#define FAHM_SUPPORT
+#endif
+	#define NHM_SUPPORT
+	#define CLM_SUPPORT
+
+#if (RTL8822B_SUPPORT)
+	/*#define PHYDM_PHYSTAUS_SMP_MODE*/
+#endif
+
+/*#define PHYDM_TDMA_DIG_SUPPORT*/
+
+#if (RTL8197F_SUPPORT || RTL8822B_SUPPORT)
+	/*#define PHYDM_LNA_SAT_CHK_SUPPORT*/
+	#ifdef PHYDM_LNA_SAT_CHK_SUPPORT
+		#if (RTL8197F_SUPPORT)
+		/*#define PHYDM_LNA_SAT_CHK_SUPPORT_TYPE1*/
+		#endif
+
+		#if (RTL8822B_SUPPORT)
+		/*#define PHYDM_LNA_SAT_CHK_TYPE2*/
+		#endif
+	#endif
+#endif
+
+#if (RTL8822B_SUPPORT)
+	#define PHYDM_POWER_TRAINING_SUPPORT
+#endif
+
+#if (RTL8822C_SUPPORT)
+	/* #define PHYDM_PMAC_TX_SETTING_SUPPORT */
+#endif
+
+#if (RTL8822C_SUPPORT)
+	/* #define PHYDM_MP_SUPPORT */
+#endif
+
+#if (RTL8822B_SUPPORT)
+	#define PHYDM_TXA_CALIBRATION
+#endif
+
+#if (RTL8188E_SUPPORT)
+	#define	PHYDM_PRIMARY_CCA
+#endif
+
+#if (RTL8188F_SUPPORT || RTL8710B_SUPPORT || RTL8821C_SUPPORT ||\
+	RTL8822B_SUPPORT || RTL8721D_SUPPORT)
+	#define	PHYDM_DC_CANCELLATION
+#endif
+
+#if (RTL8822B_SUPPORT || RTL8197F_SUPPORT || RTL8192F_SUPPORT)
+	#define	CONFIG_ADAPTIVE_SOML
+#endif
+
+#if (RTL8822B_SUPPORT)
+	/*#define	CONFIG_DYNAMIC_RX_PATH*/
+#endif
+
+#if (RTL8822B_SUPPORT == 1)
+	/* #define	CONFIG_8822B_SPUR_CALIBRATION */
+#endif
+
+#if (RTL8188E_SUPPORT || RTL8192E_SUPPORT)
+	#define	CONFIG_RECEIVER_BLOCKING
+#endif
+
+#ifdef CONFIG_SUPPORT_DYNAMIC_TXPWR
+#define CONFIG_DYNAMIC_TX_TWR
+#endif
+#define PHYDM_SUPPORT_CCKPD
+#define PHYDM_SUPPORT_ADAPTIVITY
+
+/*Antenna Diversity*/
+#ifdef CONFIG_ANTENNA_DIVERSITY
+	#define CONFIG_PHYDM_ANTENNA_DIVERSITY
+
+	#ifdef CONFIG_PHYDM_ANTENNA_DIVERSITY
+
+		#if (RTL8723B_SUPPORT || RTL8821A_SUPPORT ||\
+		     RTL8188F_SUPPORT || RTL8821C_SUPPORT)
+			#define	CONFIG_S0S1_SW_ANTENNA_DIVERSITY
+		#endif
+
+		#if (RTL8821A_SUPPORT)
+			/*#define CONFIG_HL_SMART_ANTENNA_TYPE1*/
+		#endif
+
+		#if (RTL8822B_SUPPORT)
+			/*#define CONFIG_HL_SMART_ANTENNA_TYPE2*/
+		#endif
+	#endif
+#endif
+
+/*[SmartAntenna]*/
+/*#define	CONFIG_SMART_ANTENNA*/
+#ifdef CONFIG_SMART_ANTENNA
+	/*#define	CONFIG_CUMITEK_SMART_ANTENNA*/
+#endif
+/* --------------------------------------------------*/
+
+#ifdef CONFIG_DFS_MASTER
+	#define CONFIG_PHYDM_DFS_MASTER
+#endif
+
+#if (RTL8812A_SUPPORT || RTL8821A_SUPPORT || RTL8881A_SUPPORT ||\
+	RTL8192E_SUPPORT || RTL8723B_SUPPORT)
+	/*#define	CONFIG_RA_FW_DBG_CODE*/
+#endif
+
+#define	CONFIG_PSD_TOOL
+/*#define	CONFIG_RA_DBG_CMD*/
+/*#define	CONFIG_ANT_DETECTION*/
+/*#define	CONFIG_PATH_DIVERSITY*/
+/*#define	CONFIG_RA_DYNAMIC_RTY_LIMIT*/
+#define	CONFIG_BB_TXBF_API
+#define	CONFIG_PHYDM_DEBUG_FUNCTION
+
+#ifdef CONFIG_BT_COEXIST
+	#define	ODM_CONFIG_BT_COEXIST
+#endif
+#define	PHYDM_SUPPORT_RSSI_MONITOR
+/*#define	PHYDM_AUTO_DEGBUG*/
+#define CFG_DIG_DAMPING_CHK
+
+#ifdef PHYDM_BEAMFORMING_SUPPORT
+	#if (RTL8192F_SUPPORT || RTL8195B_SUPPORT || RTL8821C_SUPPORT ||\
+	     RTL8822B_SUPPORT || RTL8197F_SUPPORT || RTL8198F_SUPPORT ||\
+	     RTL8822C_SUPPORT || RTL8814B_SUPPORT)
+		#define	DRIVER_BEAMFORMING_VERSION2
+	#endif
+#endif
+
+#endif
diff --git a/rtl8723DS/hal/phydm/phydm_features_win.h b/rtl8723DS/hal/phydm/phydm_features_win.h
index f2141b5..8d2d131 100755..100644
--- a/rtl8723DS/hal/phydm/phydm_features_win.h
+++ b/rtl8723DS/hal/phydm/phydm_features_win.h
@@ -14,51 +14,114 @@
  *****************************************************************************/
 
 #ifndef	__PHYDM_FEATURES_WIN_H__
-#define __PHYDM_FEATURES_WIN
+#define __PHYDM_FEATURES_WIN_H__
+
+#if (RTL8814A_SUPPORT || RTL8821C_SUPPORT || RTL8822B_SUPPORT ||\
+	RTL8197F_SUPPORT || RTL8192F_SUPPORT || RTL8198F_SUPPORT ||\
+	RTL8822C_SUPPORT || RTL8814B_SUPPORT)
+	#define PHYDM_LA_MODE_SUPPORT			1
+#else
+	#define PHYDM_LA_MODE_SUPPORT			0
+#endif
+
+#if (RTL8822B_SUPPORT || RTL8812A_SUPPORT || RTL8197F_SUPPORT ||\
+	RTL8192F_SUPPORT)
+	#define DYN_ANT_WEIGHTING_SUPPORT
+#endif
+
+#if (RTL8822B_SUPPORT || RTL8821C_SUPPORT)
+	#define FAHM_SUPPORT
+#endif
+	#define NHM_SUPPORT
+	#define CLM_SUPPORT
 
-#if (RTL8822B_SUPPORT == 1)
+#if (RTL8822B_SUPPORT)
 	/*#define PHYDM_PHYSTAUS_SMP_MODE*/
 #endif
 
 /*#define PHYDM_TDMA_DIG_SUPPORT*/
-/*#define PHYDM_LNA_SAT_CHK_SUPPORT*/
 
-#if (RTL8822B_SUPPORT == 1)
+#if (RTL8814B_SUPPORT)
+	/*#define PHYDM_TDMA_DIG_SUPPORT*/
+	#ifdef PHYDM_TDMA_DIG_SUPPORT
+	/*#define IS_USE_NEW_TDMA*/ /*new tdma dig test*/
+	#endif
+#endif
+
+#if (RTL8197F_SUPPORT || RTL8822B_SUPPORT || RTL8814B_SUPPORT)
+	/*#define PHYDM_LNA_SAT_CHK_SUPPORT*/
+	#ifdef PHYDM_LNA_SAT_CHK_SUPPORT
+
+		#if (RTL8197F_SUPPORT)
+		/*#define PHYDM_LNA_SAT_CHK_SUPPORT_TYPE1*/
+		#endif
+
+		#if (RTL8822B_SUPPORT)
+		/*#define PHYDM_LNA_SAT_CHK_TYPE2*/
+		#endif
+
+		#if (RTL8814B_SUPPORT)
+		/*#define PHYDM_LNA_SAT_CHK_TYPE1*/
+		#endif
+	#endif
+#endif
+
+#if (RTL8822B_SUPPORT || RTL8710B_SUPPORT || RTL8723D_SUPPORT ||\
+	RTL8192F_SUPPORT)
 	#define	PHYDM_POWER_TRAINING_SUPPORT
 #endif
 
-#if (RTL8822B_SUPPORT == 1)
+#if (RTL8822C_SUPPORT || RTL8814B_SUPPORT)
+	#define	PHYDM_PMAC_TX_SETTING_SUPPORT
+#endif
+
+#if (RTL8822C_SUPPORT || RTL8814B_SUPPORT)
+	#define	PHYDM_MP_SUPPORT
+#endif
+
+#if (RTL8822B_SUPPORT)
 	#define	PHYDM_TXA_CALIBRATION
 #endif
 
-#if (RTL8188E_SUPPORT == 1 || RTL8192E_SUPPORT == 1)
+#if (RTL8188E_SUPPORT || RTL8192E_SUPPORT)
 	#define	PHYDM_PRIMARY_CCA
 #endif
 
-#if (RTL8188F_SUPPORT == 1 || RTL8710B_SUPPORT == 1 || RTL8821C_SUPPORT == 1 || RTL8822B_SUPPORT == 1)
+#if (RTL8188F_SUPPORT || RTL8710B_SUPPORT || RTL8821C_SUPPORT ||\
+	RTL8822B_SUPPORT || RTL8192F_SUPPORT)
 	#define	PHYDM_DC_CANCELLATION
 #endif
 
-#if (RTL8822B_SUPPORT == 1 || RTL8197F_SUPPORT == 1)
-	/*#define	CONFIG_ADAPTIVE_SOML*/
+#if (RTL8822B_SUPPORT || RTL8197F_SUPPORT || RTL8192F_SUPPORT)
+	#define	CONFIG_ADAPTIVE_SOML
 #endif
 
+#if (RTL8192F_SUPPORT == 1)
+	#define	CONFIG_8912F_SPUR_CALIBRATION
+#endif
 
 /*Antenna Diversity*/
 #define	CONFIG_PHYDM_ANTENNA_DIVERSITY
 #ifdef CONFIG_PHYDM_ANTENNA_DIVERSITY
 
-	#if (RTL8723B_SUPPORT == 1) || (RTL8821A_SUPPORT == 1) || (RTL8188F_SUPPORT == 1) || (RTL8821C_SUPPORT == 1)
+	#if (RTL8723B_SUPPORT || RTL8821A_SUPPORT || RTL8188F_SUPPORT ||\
+	     RTL8821C_SUPPORT)
 		#define	CONFIG_S0S1_SW_ANTENNA_DIVERSITY
 	#endif
 
+	#if (RTL8822B_SUPPORT)
+		/*#define	ODM_EVM_ENHANCE_ANTDIV*/
+		/*#define	CONFIG_2T3R_ANTENNA*/
+		/*#define	CONFIG_2T4R_ANTENNA*/
+	#endif
+
 	/* --[SmtAnt]-----------------------------------------*/
-	#if (RTL8821A_SUPPORT == 1)
+	#if (RTL8821A_SUPPORT)
 		/*#define	CONFIG_HL_SMART_ANTENNA_TYPE1*/
 		#define	CONFIG_FAT_PATCH
 	#endif
 	
-	#if (RTL8822B_SUPPORT == 1)
+	#if (RTL8822B_SUPPORT)
 		/*#define CONFIG_HL_SMART_ANTENNA_TYPE2*/
 	#endif
 	
@@ -70,37 +133,53 @@
 
 #endif
 
+#if (RTL8822C_SUPPORT)
+	#define CONFIG_PATH_DIVERSITY
+#endif
+
 /*[SmartAntenna]*/
 #define	CONFIG_SMART_ANTENNA
 #ifdef CONFIG_SMART_ANTENNA
-		/*#define	CONFIG_CUMITEK_SMART_ANTENNA*/
+	/*#define	CONFIG_CUMITEK_SMART_ANTENNA*/
 #endif
 	/* --------------------------------------------------*/
 
-#if (RTL8822B_SUPPORT == 1)
-	/*#define	CONFIG_DYNAMIC_RX_PATH*/
+#if (RTL8188E_SUPPORT || RTL8192E_SUPPORT)
+	#define	CONFIG_RECEIVER_BLOCKING
 #endif
 
-#if (RTL8188E_SUPPORT == 1 || RTL8192E_SUPPORT == 1)
-	#define	CONFIG_RECEIVER_BLOCKING
+#if (RTL8812A_SUPPORT || RTL8821A_SUPPORT || RTL8881A_SUPPORT ||\
+	RTL8192E_SUPPORT || RTL8723B_SUPPORT)
+	#define	CONFIG_RA_FW_DBG_CODE
 #endif
 
-/*#define PHYDM_DIG_MODE_DECISION_SUPPORT	*/
+/* #ifdef CONFIG_SUPPORT_DYNAMIC_TXPWR */
+#define CONFIG_DYNAMIC_TX_TWR
+/* #endif */
 #define	CONFIG_PSD_TOOL
+#define PHYDM_SUPPORT_ADAPTIVITY
 #define	PHYDM_SUPPORT_CCKPD
-#define	RA_MASK_PHYDMLIZE_WIN
 /*#define	CONFIG_PATH_DIVERSITY*/
 /*#define	CONFIG_RA_DYNAMIC_RTY_LIMIT*/
 #define CONFIG_ANT_DETECTION
-/*#define	CONFIG_RA_DBG_CMD*/
-#define	CONFIG_RA_FW_DBG_CODE
 #define	CONFIG_BB_TXBF_API
 #define	ODM_CONFIG_BT_COEXIST
-#define	PHYDM_3RD_REFORM_RA_MASK
-/*#define	PHYDM_3RD_REFORM_RSSI_MONOTOR*/
 #define	CONFIG_PHYDM_DFS_MASTER
 #define	PHYDM_SUPPORT_RSSI_MONITOR
 #define	PHYDM_AUTO_DEGBUG
 #define CONFIG_PHYDM_DEBUG_FUNCTION
+#define CFG_DIG_DAMPING_CHK
+
+#ifdef PHYDM_BEAMFORMING_SUPPORT
+	#if (RTL8812A_SUPPORT || RTL8821A_SUPPORT ||  RTL8192E_SUPPORT ||\
+	     RTL8814A_SUPPORT || RTL8881A_SUPPORT)
+		#define	PHYDM_BEAMFORMING_VERSION1
+	#endif
+	#if (RTL8192F_SUPPORT || RTL8195B_SUPPORT || RTL8821C_SUPPORT ||\
+	     RTL8822B_SUPPORT || RTL8197F_SUPPORT || RTL8198F_SUPPORT ||\
+	     RTL8822C_SUPPORT || RTL8814B_SUPPORT)
+		#define	DRIVER_BEAMFORMING_VERSION2
+	#endif
+#endif
 
 #endif
diff --git a/rtl8723DS/hal/phydm/phydm_hwconfig.c b/rtl8723DS/hal/phydm/phydm_hwconfig.c
index 9ec2efd..3522817 100755..100644
--- a/rtl8723DS/hal/phydm/phydm_hwconfig.c
+++ b/rtl8723DS/hal/phydm/phydm_hwconfig.c
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2007 - 2017 Realtek Corporation.
+ * Copyright(c) 2007 - 2017  Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -8,65 +8,73 @@
  *
  * This program is distributed in the hope that it will be useful, but WITHOUT
  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  * more details.
  *
+ * The full GNU General Public License is included in this distribution in the
+ * file called LICENSE.
+ *
+ * Contact Information:
+ * wlanfae <wlanfae@realtek.com>
+ * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
+ * Hsinchu 300, Taiwan.
+ *
+ * Larry Finger <Larry.Finger@lwfinger.net>
+ *
  *****************************************************************************/
 
-/* ************************************************************
+/*@************************************************************
  * include files
- * ************************************************************ */
+ ************************************************************/
 
 #include "mp_precomp.h"
 #include "phydm_precomp.h"
 
-#define READ_AND_CONFIG_MP(ic, txt) (odm_read_and_config_mp_##ic##txt(p_dm))
-#define READ_AND_CONFIG_TC(ic, txt) (odm_read_and_config_tc_##ic##txt(p_dm))
-
+#define READ_AND_CONFIG_MP(ic, txt) (odm_read_and_config_mp_##ic##txt(dm))
+#define READ_AND_CONFIG_TC(ic, txt) (odm_read_and_config_tc_##ic##txt(dm))
 
 #if (PHYDM_TESTCHIP_SUPPORT == 1)
-#define READ_AND_CONFIG(ic, txt) do {\
-		if (p_dm->is_mp_chip)\
-			READ_AND_CONFIG_MP(ic, txt);\
-		else\
-			READ_AND_CONFIG_TC(ic, txt);\
+#define READ_AND_CONFIG(ic, txt)                     \
+	do {                                         \
+		if (dm->is_mp_chip)                  \
+			READ_AND_CONFIG_MP(ic, txt); \
+		else                                 \
+			READ_AND_CONFIG_TC(ic, txt); \
 	} while (0)
 #else
-#define READ_AND_CONFIG     READ_AND_CONFIG_MP
+#define READ_AND_CONFIG READ_AND_CONFIG_MP
 #endif
 
-#define GET_VERSION_MP(ic, txt)		(odm_get_version_mp_##ic##txt())
-#define GET_VERSION_TC(ic, txt)		(odm_get_version_tc_##ic##txt())
+#define GET_VERSION_MP(ic, txt) (odm_get_version_mp_##ic##txt())
+#define GET_VERSION_TC(ic, txt) (odm_get_version_tc_##ic##txt())
 
 #if (PHYDM_TESTCHIP_SUPPORT == 1)
-	#define GET_VERSION(ic, txt) (p_dm->is_mp_chip ? GET_VERSION_MP(ic, txt) : GET_VERSION_TC(ic, txt))
+#define GET_VERSION(ic, txt) (dm->is_mp_chip ? GET_VERSION_MP(ic, txt) : GET_VERSION_TC(ic, txt))
 #else
-	#define GET_VERSION(ic, txt) GET_VERSION_MP(ic, txt)
+#define GET_VERSION(ic, txt) GET_VERSION_MP(ic, txt)
 #endif
 
 enum hal_status
-odm_config_rf_with_header_file(
-	struct PHY_DM_STRUCT		*p_dm,
-	enum odm_rf_config_type		config_type,
-	u8			e_rf_path
-)
+odm_config_rf_with_header_file(struct dm_struct *dm,
+			       enum odm_rf_config_type config_type,
+			       u8 e_rf_path)
 {
 #if (DM_ODM_SUPPORT_TYPE & ODM_WIN)
-	struct _ADAPTER		*adapter = p_dm->adapter;
-	PMGNT_INFO		p_mgnt_info = &(adapter->MgntInfo);
+	void *adapter = dm->adapter;
+	PMGNT_INFO mgnt_info = &((PADAPTER)adapter)->MgntInfo;
 #endif
-	enum hal_status	result = HAL_STATUS_SUCCESS;
+	enum hal_status result = HAL_STATUS_SUCCESS;
 
-	PHYDM_DBG(p_dm, ODM_COMP_INIT,
-		("===>odm_config_rf_with_header_file (%s)\n", (p_dm->is_mp_chip) ? "MPChip" : "TestChip"));
-	PHYDM_DBG(p_dm, ODM_COMP_INIT,
-		("support_platform: 0x%X, support_interface: 0x%X, board_type: 0x%X\n",
-		p_dm->support_platform, p_dm->support_interface, p_dm->board_type));
+	PHYDM_DBG(dm, ODM_COMP_INIT, "===>%s (%s)\n", __func__,
+		  (dm->is_mp_chip) ? "MPChip" : "TestChip");
+	PHYDM_DBG(dm, ODM_COMP_INIT,
+		  "support_platform: 0x%X, support_interface: 0x%X, board_type: 0x%X\n",
+		  dm->support_platform, dm->support_interface, dm->board_type);
 
-	/* 1 AP doesn't use PHYDM power tracking table in these ICs */
+/* @1 AP doesn't use PHYDM power tracking table in these ICs */
 #if (DM_ODM_SUPPORT_TYPE != ODM_AP)
 #if (RTL8812A_SUPPORT == 1)
-	if (p_dm->support_ic_type == ODM_RTL8812) {
+	if (dm->support_ic_type == ODM_RTL8812) {
 		if (config_type == CONFIG_RF_RADIO) {
 			if (e_rf_path == RF_PATH_A)
 				READ_AND_CONFIG_MP(8812a, _radioa);
@@ -74,10 +82,10 @@ odm_config_rf_with_header_file(
 				READ_AND_CONFIG_MP(8812a, _radiob);
 		} else if (config_type == CONFIG_RF_TXPWR_LMT) {
 #if (DM_ODM_SUPPORT_TYPE & ODM_WIN) && (DEV_BUS_TYPE == RT_PCI_INTERFACE)
-			HAL_DATA_TYPE	*p_hal_data = GET_HAL_DATA(adapter);
-			if ((p_hal_data->EEPROMSVID == 0x17AA && p_hal_data->EEPROMSMID == 0xA811) ||
-			    (p_hal_data->EEPROMSVID == 0x10EC && p_hal_data->EEPROMSMID == 0xA812) ||
-			    (p_hal_data->EEPROMSVID == 0x10EC && p_hal_data->EEPROMSMID == 0x8812))
+			HAL_DATA_TYPE * hal_data = GET_HAL_DATA(((PADAPTER)adapter));
+			if ((hal_data->EEPROMSVID == 0x17AA && hal_data->EEPROMSMID == 0xA811) ||
+			    (hal_data->EEPROMSVID == 0x10EC && hal_data->EEPROMSMID == 0xA812) ||
+			    (hal_data->EEPROMSVID == 0x10EC && hal_data->EEPROMSMID == 0x8812))
 				READ_AND_CONFIG_MP(8812a, _txpwr_lmt_hm812a03);
 			else
 #endif
@@ -86,21 +94,21 @@ odm_config_rf_with_header_file(
 	}
 #endif
 #if (RTL8821A_SUPPORT == 1)
-	if (p_dm->support_ic_type == ODM_RTL8821) {
+	if (dm->support_ic_type == ODM_RTL8821) {
 		if (config_type == CONFIG_RF_RADIO) {
 			if (e_rf_path == RF_PATH_A)
 				READ_AND_CONFIG_MP(8821a, _radioa);
 		} else if (config_type == CONFIG_RF_TXPWR_LMT) {
-			if (p_dm->support_interface == ODM_ITRF_USB) {
-				if (p_dm->ext_pa_5g || p_dm->ext_lna_5g)
+			if (dm->support_interface == ODM_ITRF_USB) {
+				if (dm->ext_pa_5g || dm->ext_lna_5g)
 					READ_AND_CONFIG_MP(8821a, _txpwr_lmt_8811a_u_fem);
 				else
 					READ_AND_CONFIG_MP(8821a, _txpwr_lmt_8811a_u_ipa);
 			} else {
 #if (DM_ODM_SUPPORT_TYPE & ODM_WIN)
-				if (p_mgnt_info->CustomerID == RT_CID_8821AE_ASUS_MB)
+				if (mgnt_info->CustomerID == RT_CID_8821AE_ASUS_MB)
 					READ_AND_CONFIG_MP(8821a, _txpwr_lmt_8821a_sar_8mm);
-				else if (p_mgnt_info->CustomerID == RT_CID_ASUS_NB)
+				else if (mgnt_info->CustomerID == RT_CID_ASUS_NB)
 					READ_AND_CONFIG_MP(8821a, _txpwr_lmt_8821a_sar_5mm);
 				else
 #endif
@@ -110,18 +118,18 @@ odm_config_rf_with_header_file(
 	}
 #endif
 #if (RTL8192E_SUPPORT == 1)
-	if (p_dm->support_ic_type == ODM_RTL8192E) {
+	if (dm->support_ic_type == ODM_RTL8192E) {
 		if (config_type == CONFIG_RF_RADIO) {
 			if (e_rf_path == RF_PATH_A)
 				READ_AND_CONFIG_MP(8192e, _radioa);
 			else if (e_rf_path == RF_PATH_B)
 				READ_AND_CONFIG_MP(8192e, _radiob);
 		} else if (config_type == CONFIG_RF_TXPWR_LMT) {
-#if (DM_ODM_SUPPORT_TYPE & ODM_WIN) && (DEV_BUS_TYPE == RT_PCI_INTERFACE)	/*Refine by Vincent Lan for 5mm SAR pwr limit*/
-			HAL_DATA_TYPE	*p_hal_data = GET_HAL_DATA(adapter);
+#if (DM_ODM_SUPPORT_TYPE & ODM_WIN) && (DEV_BUS_TYPE == RT_PCI_INTERFACE) /*Refine by Vincent Lan for 5mm SAR pwr limit*/
+			HAL_DATA_TYPE * hal_data = GET_HAL_DATA(((PADAPTER)adapter));
 
-			if ((p_hal_data->EEPROMSVID == 0x11AD && p_hal_data->EEPROMSMID == 0x8192) ||
-			    (p_hal_data->EEPROMSVID == 0x11AD && p_hal_data->EEPROMSMID == 0x8193))
+			if ((hal_data->EEPROMSVID == 0x11AD && hal_data->EEPROMSMID == 0x8192) ||
+			    (hal_data->EEPROMSVID == 0x11AD && hal_data->EEPROMSMID == 0x8193))
 				READ_AND_CONFIG_MP(8192e, _txpwr_lmt_8192e_sar_5mm);
 			else
 #endif
@@ -130,17 +138,18 @@ odm_config_rf_with_header_file(
 	}
 #endif
 #if (RTL8723D_SUPPORT == 1)
-	if (p_dm->support_ic_type == ODM_RTL8723D) {
+	if (dm->support_ic_type == ODM_RTL8723D) {
 		if (config_type == CONFIG_RF_RADIO) {
 			if (e_rf_path == RF_PATH_A)
 				READ_AND_CONFIG_MP(8723d, _radioa);
-		} else if (config_type == CONFIG_RF_TXPWR_LMT)
+		} else if (config_type == CONFIG_RF_TXPWR_LMT) {
 			READ_AND_CONFIG_MP(8723d, _txpwr_lmt);
+		}
 	}
 #endif
-/* JJ ADD 20161014 */
+/* @JJ ADD 20161014 */
 #if (RTL8710B_SUPPORT == 1)
-	if (p_dm->support_ic_type == ODM_RTL8710B) {
+	if (dm->support_ic_type == ODM_RTL8710B) {
 		if (config_type == CONFIG_RF_RADIO) {
 			if (e_rf_path == RF_PATH_A)
 				READ_AND_CONFIG_MP(8710b, _radioa);
@@ -149,11 +158,10 @@ odm_config_rf_with_header_file(
 	}
 #endif
 
-#endif/* (DM_ODM_SUPPORT_TYPE !=  ODM_AP) */
-
-	/* 1 All platforms support */
+#endif /* @(DM_ODM_SUPPORT_TYPE !=  ODM_AP) */
+/* @1 All platforms support */
 #if (RTL8188E_SUPPORT == 1)
-	if (p_dm->support_ic_type == ODM_RTL8188E) {
+	if (dm->support_ic_type == ODM_RTL8188E) {
 		if (config_type == CONFIG_RF_RADIO) {
 			if (e_rf_path == RF_PATH_A)
 				READ_AND_CONFIG_MP(8188e, _radioa);
@@ -162,7 +170,7 @@ odm_config_rf_with_header_file(
 	}
 #endif
 #if (RTL8723B_SUPPORT == 1)
-	if (p_dm->support_ic_type == ODM_RTL8723B) {
+	if (dm->support_ic_type == ODM_RTL8723B) {
 		if (config_type == CONFIG_RF_RADIO)
 			READ_AND_CONFIG_MP(8723b, _radioa);
 		else if (config_type == CONFIG_RF_TXPWR_LMT)
@@ -170,7 +178,7 @@ odm_config_rf_with_header_file(
 	}
 #endif
 #if (RTL8814A_SUPPORT == 1)
-	if (p_dm->support_ic_type == ODM_RTL8814A) {
+	if (dm->support_ic_type == ODM_RTL8814A) {
 		if (config_type == CONFIG_RF_RADIO) {
 			if (e_rf_path == RF_PATH_A)
 				READ_AND_CONFIG_MP(8814a, _radioa);
@@ -181,27 +189,27 @@ odm_config_rf_with_header_file(
 			else if (e_rf_path == RF_PATH_D)
 				READ_AND_CONFIG_MP(8814a, _radiod);
 		} else if (config_type == CONFIG_RF_TXPWR_LMT) {
-			if (p_dm->rfe_type == 0)
-				READ_AND_CONFIG_MP(8814a,_txpwr_lmt_type0);
-			else if (p_dm->rfe_type == 1)
-				READ_AND_CONFIG_MP(8814a,_txpwr_lmt_type1);				
-			else if (p_dm->rfe_type == 2)
-				READ_AND_CONFIG_MP(8814a,_txpwr_lmt_type2);		
-			else if (p_dm->rfe_type == 3)
-				READ_AND_CONFIG_MP(8814a,_txpwr_lmt_type3);		
-			else if (p_dm->rfe_type == 5)
-				READ_AND_CONFIG_MP(8814a,_txpwr_lmt_type5);		
-			else if (p_dm->rfe_type == 7)
-				READ_AND_CONFIG_MP(8814a,_txpwr_lmt_type7);
-			else if (p_dm->rfe_type == 8)
-				READ_AND_CONFIG_MP(8814a,_txpwr_lmt_type8);
+			if (dm->rfe_type == 0)
+				READ_AND_CONFIG_MP(8814a, _txpwr_lmt_type0);
+			else if (dm->rfe_type == 1)
+				READ_AND_CONFIG_MP(8814a, _txpwr_lmt_type1);
+			else if (dm->rfe_type == 2)
+				READ_AND_CONFIG_MP(8814a, _txpwr_lmt_type2);
+			else if (dm->rfe_type == 3)
+				READ_AND_CONFIG_MP(8814a, _txpwr_lmt_type3);
+			else if (dm->rfe_type == 5)
+				READ_AND_CONFIG_MP(8814a, _txpwr_lmt_type5);
+			else if (dm->rfe_type == 7)
+				READ_AND_CONFIG_MP(8814a, _txpwr_lmt_type7);
+			else if (dm->rfe_type == 8)
+				READ_AND_CONFIG_MP(8814a, _txpwr_lmt_type8);
 			else
-				READ_AND_CONFIG_MP(8814a,_txpwr_lmt);
+				READ_AND_CONFIG_MP(8814a, _txpwr_lmt);
 		}
 	}
 #endif
 #if (RTL8703B_SUPPORT == 1)
-	if (p_dm->support_ic_type == ODM_RTL8703B) {
+	if (dm->support_ic_type == ODM_RTL8703B) {
 		if (config_type == CONFIG_RF_RADIO) {
 			if (e_rf_path == RF_PATH_A)
 				READ_AND_CONFIG_MP(8703b, _radioa);
@@ -209,7 +217,7 @@ odm_config_rf_with_header_file(
 	}
 #endif
 #if (RTL8188F_SUPPORT == 1)
-	if (p_dm->support_ic_type == ODM_RTL8188F) {
+	if (dm->support_ic_type == ODM_RTL8188F) {
 		if (config_type == CONFIG_RF_RADIO) {
 			if (e_rf_path == RF_PATH_A)
 				READ_AND_CONFIG_MP(8188f, _radioa);
@@ -218,29 +226,31 @@ odm_config_rf_with_header_file(
 	}
 #endif
 #if (RTL8822B_SUPPORT == 1)
-	if (p_dm->support_ic_type == ODM_RTL8822B) {
+	if (dm->support_ic_type == ODM_RTL8822B) {
 		if (config_type == CONFIG_RF_RADIO) {
 			if (e_rf_path == RF_PATH_A)
 				READ_AND_CONFIG_MP(8822b, _radioa);
 			else if (e_rf_path == RF_PATH_B)
 				READ_AND_CONFIG_MP(8822b, _radiob);
 		} else if (config_type == CONFIG_RF_TXPWR_LMT) {
-			if (p_dm->rfe_type == 5)
+			if (dm->rfe_type == 5)
 				READ_AND_CONFIG_MP(8822b, _txpwr_lmt_type5);
-			else if (p_dm->rfe_type == 2)
+			else if (dm->rfe_type == 2)
 				READ_AND_CONFIG_MP(8822b, _txpwr_lmt_type2);
-			else if (p_dm->rfe_type == 3)
+			else if (dm->rfe_type == 3)
 				READ_AND_CONFIG_MP(8822b, _txpwr_lmt_type3);
-			else if (p_dm->rfe_type == 4)
+			else if (dm->rfe_type == 4)
 				READ_AND_CONFIG_MP(8822b, _txpwr_lmt_type4);
-			else if (p_dm->rfe_type == 12)
+			else if (dm->rfe_type == 12)
 				READ_AND_CONFIG_MP(8822b, _txpwr_lmt_type12);
-			else if (p_dm->rfe_type == 15)
+			else if (dm->rfe_type == 15)
 				READ_AND_CONFIG_MP(8822b, _txpwr_lmt_type15);
-			else if (p_dm->rfe_type == 16)
+			else if (dm->rfe_type == 16)
 				READ_AND_CONFIG_MP(8822b, _txpwr_lmt_type16);
-			else if (p_dm->rfe_type == 17)
+			else if (dm->rfe_type == 17)
 				READ_AND_CONFIG_MP(8822b, _txpwr_lmt_type17);
+			else if (dm->rfe_type == 18)
+				READ_AND_CONFIG_MP(8822b, _txpwr_lmt_type18);
 			else
 				READ_AND_CONFIG_MP(8822b, _txpwr_lmt);
 		}
@@ -248,7 +258,7 @@ odm_config_rf_with_header_file(
 #endif
 
 #if (RTL8197F_SUPPORT == 1)
-	if (p_dm->support_ic_type == ODM_RTL8197F) {
+	if (dm->support_ic_type == ODM_RTL8197F) {
 		if (config_type == CONFIG_RF_RADIO) {
 			if (e_rf_path == RF_PATH_A)
 				READ_AND_CONFIG_MP(8197f, _radioa);
@@ -257,29 +267,200 @@ odm_config_rf_with_header_file(
 		}
 	}
 #endif
-
+/*@jj add 20170822*/
+#if (RTL8192F_SUPPORT == 1)
+	if (dm->support_ic_type == ODM_RTL8192F) {
+		if (config_type == CONFIG_RF_RADIO) {
+			if (e_rf_path == RF_PATH_A)
+				READ_AND_CONFIG_MP(8192f, _radioa);
+			else if (e_rf_path == RF_PATH_B)
+				READ_AND_CONFIG_MP(8192f, _radiob);
+		} else if (config_type == CONFIG_RF_TXPWR_LMT) {
+			if (dm->rfe_type == 0)
+				READ_AND_CONFIG_MP(8192f, _txpwr_lmt_type0);
+			else if (dm->rfe_type == 1)
+				READ_AND_CONFIG_MP(8192f, _txpwr_lmt_type1);
+			else if (dm->rfe_type == 2)
+				READ_AND_CONFIG_MP(8192f, _txpwr_lmt_type2);
+			else if (dm->rfe_type == 3)
+				READ_AND_CONFIG_MP(8192f, _txpwr_lmt_type3);
+			else if (dm->rfe_type == 4)
+				READ_AND_CONFIG_MP(8192f, _txpwr_lmt_type4);
+			else if (dm->rfe_type == 5)
+				READ_AND_CONFIG_MP(8192f, _txpwr_lmt_type5);
+			else if (dm->rfe_type == 6)
+				READ_AND_CONFIG_MP(8192f, _txpwr_lmt_type6);
+			else if (dm->rfe_type == 7)
+				READ_AND_CONFIG_MP(8192f, _txpwr_lmt_type7);
+			else if (dm->rfe_type == 8)
+				READ_AND_CONFIG_MP(8192f, _txpwr_lmt_type8);
+			else if (dm->rfe_type == 9)
+				READ_AND_CONFIG_MP(8192f, _txpwr_lmt_type9);
+			else if (dm->rfe_type == 10)
+				READ_AND_CONFIG_MP(8192f, _txpwr_lmt_type10);
+			else if (dm->rfe_type == 11)
+				READ_AND_CONFIG_MP(8192f, _txpwr_lmt_type11);
+			else if (dm->rfe_type == 12)
+				READ_AND_CONFIG_MP(8192f, _txpwr_lmt_type12);
+			else if (dm->rfe_type == 13)
+				READ_AND_CONFIG_MP(8192f, _txpwr_lmt_type13);
+			else if (dm->rfe_type == 14)
+				READ_AND_CONFIG_MP(8192f, _txpwr_lmt_type14);
+			else if (dm->rfe_type == 15)
+				READ_AND_CONFIG_MP(8192f, _txpwr_lmt_type15);
+			else if (dm->rfe_type == 16)
+				READ_AND_CONFIG_MP(8192f, _txpwr_lmt_type16);
+			else if (dm->rfe_type == 17)
+				READ_AND_CONFIG_MP(8192f, _txpwr_lmt_type17);
+			else if (dm->rfe_type == 18)
+				READ_AND_CONFIG_MP(8192f, _txpwr_lmt_type18);
+			else if (dm->rfe_type == 19)
+				READ_AND_CONFIG_MP(8192f, _txpwr_lmt_type19);
+			else if (dm->rfe_type == 20)
+				READ_AND_CONFIG_MP(8192f, _txpwr_lmt_type20);
+			else if (dm->rfe_type == 21)
+				READ_AND_CONFIG_MP(8192f, _txpwr_lmt_type21);
+			else if (dm->rfe_type == 22)
+				READ_AND_CONFIG_MP(8192f, _txpwr_lmt_type22);
+			else if (dm->rfe_type == 23)
+				READ_AND_CONFIG_MP(8192f, _txpwr_lmt_type23);
+			else if (dm->rfe_type == 24)
+				READ_AND_CONFIG_MP(8192f, _txpwr_lmt_type24);
+			else if (dm->rfe_type == 25)
+				READ_AND_CONFIG_MP(8192f, _txpwr_lmt_type25);
+			else if (dm->rfe_type == 26)
+				READ_AND_CONFIG_MP(8192f, _txpwr_lmt_type26);
+			else if (dm->rfe_type == 27)
+				READ_AND_CONFIG_MP(8192f, _txpwr_lmt_type27);
+			else if (dm->rfe_type == 28)
+				READ_AND_CONFIG_MP(8192f, _txpwr_lmt_type28);
+			else if (dm->rfe_type == 29)
+				READ_AND_CONFIG_MP(8192f, _txpwr_lmt_type29);
+			else if (dm->rfe_type == 30)
+				READ_AND_CONFIG_MP(8192f, _txpwr_lmt_type30);
+			else if (dm->rfe_type == 31)
+				READ_AND_CONFIG_MP(8192f, _txpwr_lmt_type31);
+			else
+				READ_AND_CONFIG_MP(8192f, _txpwr_lmt);
+		}
+	}
+#endif
+#if (RTL8721D_SUPPORT == 1)
+	if (dm->support_ic_type == ODM_RTL8721D) {
+		if (config_type == CONFIG_RF_RADIO) {
+			if (e_rf_path == RF_PATH_A)
+				READ_AND_CONFIG_MP(8721d, _radioa);
+		} else if (config_type == CONFIG_RF_TXPWR_LMT)
+			READ_AND_CONFIG_MP(8721d, _txpwr_lmt);
+	}
+#endif
 #if (RTL8821C_SUPPORT == 1)
-	if (p_dm->support_ic_type == ODM_RTL8821C) {
+	if (dm->support_ic_type == ODM_RTL8821C) {
 		if (config_type == CONFIG_RF_RADIO) {
 			if (e_rf_path == RF_PATH_A)
 				READ_AND_CONFIG(8821c, _radioa);
-		} else if (config_type == CONFIG_RF_TXPWR_LMT)
+		} else if (config_type == CONFIG_RF_TXPWR_LMT) {
 			READ_AND_CONFIG(8821c, _txpwr_lmt);
+		}
+	}
+#endif
+#if (RTL8195B_SUPPORT == 1)
+	if (dm->support_ic_type == ODM_RTL8195B) {
+		if (config_type == CONFIG_RF_RADIO) {
+			if (e_rf_path == RF_PATH_A)
+				READ_AND_CONFIG(8195b, _radioa);
+		}
+		#if 0
+		else if (config_type == CONFIG_RF_TXPWR_LMT) {
+			READ_AND_CONFIG(8821c, _txpwr_lmt);
+			/*@*/
+		}
+		#endif
+	}
+#endif
+#if (RTL8198F_SUPPORT == 1)
+	if (dm->support_ic_type == ODM_RTL8198F) {
+		if (config_type == CONFIG_RF_RADIO) {
+			if (e_rf_path == RF_PATH_A)
+				READ_AND_CONFIG_MP(8198f, _radioa);
+			else if (e_rf_path == RF_PATH_B)
+				READ_AND_CONFIG_MP(8198f, _radiob);
+			else if (e_rf_path == RF_PATH_C)
+				READ_AND_CONFIG_MP(8198f, _radioc);
+			else if (e_rf_path == RF_PATH_D)
+				READ_AND_CONFIG_MP(8198f, _radiod);
+		}
+	}
+#endif
+/*#if (RTL8814B_SUPPORT == 1)
+	if (dm->support_ic_type == ODM_RTL8814B) {
+		if (config_type == CONFIG_RF_RADIO) {
+			if (e_rf_path == RF_PATH_A)
+				READ_AND_CONFIG_MP(8814b, _radioa);
+			else if (e_rf_path == RF_PATH_B)
+				READ_AND_CONFIG_MP(8814b, _radiob);
+			else if (e_rf_path == RF_PATH_C)
+				READ_AND_CONFIG_MP(8814b, _radioc);
+			else if (e_rf_path == RF_PATH_D)
+				READ_AND_CONFIG_MP(8814b, _radiod);
+		}
+	}
+#endif
+*/
+#if (RTL8822C_SUPPORT)
+	if (dm->support_ic_type == ODM_RTL8822C) {
+		if (config_type == CONFIG_RF_RADIO) {
+			if (e_rf_path == RF_PATH_A)
+				READ_AND_CONFIG_MP(8822c, _radioa);
+			else if (e_rf_path == RF_PATH_B)
+				READ_AND_CONFIG_MP(8822c, _radiob);
+		}
+	}
+#endif
+#if (RTL8812F_SUPPORT)
+	if (dm->support_ic_type == ODM_RTL8812F) {
+		if (config_type == CONFIG_RF_RADIO) {
+			if (e_rf_path == RF_PATH_A)
+				READ_AND_CONFIG_MP(8812f, _radioa);
+			else if (e_rf_path == RF_PATH_B)
+				READ_AND_CONFIG_MP(8812f, _radiob);
+		}
 	}
 #endif
 
+ /*8814B need review, when phydm has related files*/
+ #if (RTL8814B_SUPPORT)
+	if (dm->support_ic_type == ODM_RTL8814B) {
+		if (config_type == CONFIG_RF_RADIO) {
+			if (e_rf_path == RF_PATH_A)
+				READ_AND_CONFIG_MP(8814b, _radioa);
+			else if (e_rf_path == RF_PATH_B)
+				READ_AND_CONFIG_MP(8814b, _radiob);
+			else if (e_rf_path == RF_PATH_C)
+				READ_AND_CONFIG_MP(8814b, _radioc);
+			else if (e_rf_path == RF_PATH_D)
+				READ_AND_CONFIG_MP(8814b, _radiod);
+		}
+		if (config_type == CONFIG_RF_SYN_RADIO) {
+			if (e_rf_path == RF_SYN0)
+				READ_AND_CONFIG_MP(8814b, _radiosyn0);
+			else if (e_rf_path == RF_SYN1)
+				READ_AND_CONFIG_MP(8814b, _radiosyn1);
+		}
+	}
+  #endif
+
 	if (config_type == CONFIG_RF_RADIO) {
-		if (p_dm->fw_offload_ability & PHYDM_PHY_PARAM_OFFLOAD) {
-
-			result = phydm_set_reg_by_fw(p_dm,
-							PHYDM_HALMAC_CMD_END,
-							0,
-							0,
-							0,
-							(enum rf_path)0,
-							0);
-			PHYDM_DBG(p_dm, ODM_COMP_INIT,
-				("rf param offload end!result = %d", result));
+		if (dm->fw_offload_ability & PHYDM_PHY_PARAM_OFFLOAD) {
+			result = phydm_set_reg_by_fw(dm,
+						     PHYDM_HALMAC_CMD_END,
+						     0,
+						     0,
+						     0,
+						     (enum rf_path)0,
+						     0);
+			PHYDM_DBG(dm, ODM_COMP_INIT,
+				  "rf param offload end!result = %d", result);
 		}
 	}
 
@@ -287,120 +468,113 @@ odm_config_rf_with_header_file(
 }
 
 enum hal_status
-odm_config_rf_with_tx_pwr_track_header_file(
-	struct PHY_DM_STRUCT		*p_dm
-)
+odm_config_rf_with_tx_pwr_track_header_file(struct dm_struct *dm)
 {
-	PHYDM_DBG(p_dm, ODM_COMP_INIT,
-		("===>odm_config_rf_with_tx_pwr_track_header_file (%s)\n", (p_dm->is_mp_chip) ? "MPChip" : "TestChip"));
-	PHYDM_DBG(p_dm, ODM_COMP_INIT,
-		("support_platform: 0x%X, support_interface: 0x%X, board_type: 0x%X\n",
-		p_dm->support_platform, p_dm->support_interface, p_dm->board_type));
-
+	PHYDM_DBG(dm, ODM_COMP_INIT, "===>%s (%s)\n", __func__,
+		  (dm->is_mp_chip) ? "MPChip" : "TestChip");
+	PHYDM_DBG(dm, ODM_COMP_INIT,
+		  "support_platform: 0x%X, support_interface: 0x%X, board_type: 0x%X\n",
+		  dm->support_platform, dm->support_interface, dm->board_type);
 
-	/* 1 AP doesn't use PHYDM power tracking table in these ICs */
+/* @1 AP doesn't use PHYDM power tracking table in these ICs */
 #if (DM_ODM_SUPPORT_TYPE != ODM_AP)
 #if RTL8821A_SUPPORT
-	if (p_dm->support_ic_type == ODM_RTL8821) {
-		if (p_dm->support_interface == ODM_ITRF_PCIE)
+	if (dm->support_ic_type == ODM_RTL8821) {
+		if (dm->support_interface == ODM_ITRF_PCIE)
 			READ_AND_CONFIG_MP(8821a, _txpowertrack_pcie);
-		else if (p_dm->support_interface == ODM_ITRF_USB)
+		else if (dm->support_interface == ODM_ITRF_USB)
 			READ_AND_CONFIG_MP(8821a, _txpowertrack_usb);
-		else if (p_dm->support_interface == ODM_ITRF_SDIO)
+		else if (dm->support_interface == ODM_ITRF_SDIO)
 			READ_AND_CONFIG_MP(8821a, _txpowertrack_sdio);
 	}
 #endif
 #if RTL8812A_SUPPORT
-	if (p_dm->support_ic_type == ODM_RTL8812) {
-		if (p_dm->support_interface == ODM_ITRF_PCIE)
+	if (dm->support_ic_type == ODM_RTL8812) {
+		if (dm->support_interface == ODM_ITRF_PCIE)
 			READ_AND_CONFIG_MP(8812a, _txpowertrack_pcie);
-		else if (p_dm->support_interface == ODM_ITRF_USB) {
-			if (p_dm->rfe_type == 3 && p_dm->is_mp_chip)
+		else if (dm->support_interface == ODM_ITRF_USB) {
+			if (dm->rfe_type == 3 && dm->is_mp_chip)
 				READ_AND_CONFIG_MP(8812a, _txpowertrack_rfe3);
 			else
 				READ_AND_CONFIG_MP(8812a, _txpowertrack_usb);
 		}
-
 	}
 #endif
 #if RTL8192E_SUPPORT
-	if (p_dm->support_ic_type == ODM_RTL8192E) {
-		if (p_dm->support_interface == ODM_ITRF_PCIE)
+	if (dm->support_ic_type == ODM_RTL8192E) {
+		if (dm->support_interface == ODM_ITRF_PCIE)
 			READ_AND_CONFIG_MP(8192e, _txpowertrack_pcie);
-		else if (p_dm->support_interface == ODM_ITRF_USB)
+		else if (dm->support_interface == ODM_ITRF_USB)
 			READ_AND_CONFIG_MP(8192e, _txpowertrack_usb);
-		else if (p_dm->support_interface == ODM_ITRF_SDIO)
+		else if (dm->support_interface == ODM_ITRF_SDIO)
 			READ_AND_CONFIG_MP(8192e, _txpowertrack_sdio);
 	}
 #endif
 #if RTL8723D_SUPPORT
-	if (p_dm->support_ic_type == ODM_RTL8723D) {
-		if (p_dm->support_interface == ODM_ITRF_PCIE)
+	if (dm->support_ic_type == ODM_RTL8723D) {
+		if (dm->support_interface == ODM_ITRF_PCIE)
 			READ_AND_CONFIG_MP(8723d, _txpowertrack_pcie);
-		else if (p_dm->support_interface == ODM_ITRF_USB)
+		else if (dm->support_interface == ODM_ITRF_USB)
 			READ_AND_CONFIG_MP(8723d, _txpowertrack_usb);
-		else if (p_dm->support_interface == ODM_ITRF_SDIO)
+		else if (dm->support_interface == ODM_ITRF_SDIO)
 			READ_AND_CONFIG_MP(8723d, _txpowertrack_sdio);
 
 		READ_AND_CONFIG_MP(8723d, _txxtaltrack);
 	}
 #endif
-/* JJ ADD 20161014 */
+/* @JJ ADD 20161014 */
 #if RTL8710B_SUPPORT
-	if (p_dm->support_ic_type == ODM_RTL8710B) {
-		if (p_dm->package_type == 1)
+	if (dm->support_ic_type == ODM_RTL8710B) {
+		if (dm->package_type == 1)
 			READ_AND_CONFIG_MP(8710b, _txpowertrack_qfn48m_smic);
-		else if (p_dm->package_type == 5)
-			READ_AND_CONFIG_MP(8710b, _txpowertrack_qfn48m_umc);	
-			
+		else if (dm->package_type == 5)
+			READ_AND_CONFIG_MP(8710b, _txpowertrack_qfn48m_umc);
+
 		READ_AND_CONFIG_MP(8710b, _txxtaltrack);
 	}
 #endif
-
 #if RTL8188E_SUPPORT
-	if (p_dm->support_ic_type == ODM_RTL8188E) {
-		if (odm_get_mac_reg(p_dm, 0xF0, 0xF000) >= 8) {		/*if 0xF0[15:12] >= 8, SMIC*/
-			if (p_dm->support_interface == ODM_ITRF_PCIE)
+	if (dm->support_ic_type == ODM_RTL8188E) {
+		if (odm_get_mac_reg(dm, R_0xf0, 0xF000) >= 8) { /*@if 0xF0[15:12] >= 8, SMIC*/
+			if (dm->support_interface == ODM_ITRF_PCIE)
 				READ_AND_CONFIG_MP(8188e, _txpowertrack_pcie_icut);
-			else if (p_dm->support_interface == ODM_ITRF_USB)
+			else if (dm->support_interface == ODM_ITRF_USB)
 				READ_AND_CONFIG_MP(8188e, _txpowertrack_usb_icut);
-			else if (p_dm->support_interface == ODM_ITRF_SDIO)
+			else if (dm->support_interface == ODM_ITRF_SDIO)
 				READ_AND_CONFIG_MP(8188e, _txpowertrack_sdio_icut);
-		} else {	/*else 0xF0[15:12] < 8, TSMC*/
-			if (p_dm->support_interface == ODM_ITRF_PCIE)
+		} else { /*@else 0xF0[15:12] < 8, TSMC*/
+			if (dm->support_interface == ODM_ITRF_PCIE)
 				READ_AND_CONFIG_MP(8188e, _txpowertrack_pcie);
-			else if (p_dm->support_interface == ODM_ITRF_USB)
+			else if (dm->support_interface == ODM_ITRF_USB)
 				READ_AND_CONFIG_MP(8188e, _txpowertrack_usb);
-			else if (p_dm->support_interface == ODM_ITRF_SDIO)
+			else if (dm->support_interface == ODM_ITRF_SDIO)
 				READ_AND_CONFIG_MP(8188e, _txpowertrack_sdio);
 		}
-
 	}
 #endif
-#endif/* (DM_ODM_SUPPORT_TYPE !=  ODM_AP) */
-
-	/* 1 All platforms support */
+#endif /* @(DM_ODM_SUPPORT_TYPE !=  ODM_AP) */
+/* @1 All platforms support */
 #if RTL8723B_SUPPORT
-	if (p_dm->support_ic_type == ODM_RTL8723B) {
-		if (p_dm->support_interface == ODM_ITRF_PCIE)
+	if (dm->support_ic_type == ODM_RTL8723B) {
+		if (dm->support_interface == ODM_ITRF_PCIE)
 			READ_AND_CONFIG_MP(8723b, _txpowertrack_pcie);
-		else if (p_dm->support_interface == ODM_ITRF_USB)
+		else if (dm->support_interface == ODM_ITRF_USB)
 			READ_AND_CONFIG_MP(8723b, _txpowertrack_usb);
-		else if (p_dm->support_interface == ODM_ITRF_SDIO)
+		else if (dm->support_interface == ODM_ITRF_SDIO)
 			READ_AND_CONFIG_MP(8723b, _txpowertrack_sdio);
 	}
 #endif
 #if RTL8814A_SUPPORT
-	if (p_dm->support_ic_type == ODM_RTL8814A) {
-		if (p_dm->rfe_type == 0)
+	if (dm->support_ic_type == ODM_RTL8814A) {
+		if (dm->rfe_type == 0)
 			READ_AND_CONFIG_MP(8814a, _txpowertrack_type0);
-		else if (p_dm->rfe_type == 2)
+		else if (dm->rfe_type == 2)
 			READ_AND_CONFIG_MP(8814a, _txpowertrack_type2);
-		else if (p_dm->rfe_type == 5)
+		else if (dm->rfe_type == 5)
 			READ_AND_CONFIG_MP(8814a, _txpowertrack_type5);
-		else if (p_dm->rfe_type == 7)
+		else if (dm->rfe_type == 7)
 			READ_AND_CONFIG_MP(8814a, _txpowertrack_type7);
-		else if (p_dm->rfe_type == 8)
+		else if (dm->rfe_type == 8)
 			READ_AND_CONFIG_MP(8814a, _txpowertrack_type8);
 		else
 			READ_AND_CONFIG_MP(8814a, _txpowertrack);
@@ -409,124 +583,228 @@ odm_config_rf_with_tx_pwr_track_header_file(
 	}
 #endif
 #if RTL8703B_SUPPORT
-	if (p_dm->support_ic_type == ODM_RTL8703B) {
-		if (p_dm->support_interface == ODM_ITRF_USB)
+	if (dm->support_ic_type == ODM_RTL8703B) {
+		if (dm->support_interface == ODM_ITRF_USB)
 			READ_AND_CONFIG_MP(8703b, _txpowertrack_usb);
-		else if (p_dm->support_interface == ODM_ITRF_SDIO)
+		else if (dm->support_interface == ODM_ITRF_SDIO)
 			READ_AND_CONFIG_MP(8703b, _txpowertrack_sdio);
 
 		READ_AND_CONFIG_MP(8703b, _txxtaltrack);
 	}
 #endif
-
 #if RTL8188F_SUPPORT
-	if (p_dm->support_ic_type == ODM_RTL8188F) {
-		if (p_dm->support_interface == ODM_ITRF_USB)
+	if (dm->support_ic_type == ODM_RTL8188F) {
+		if (dm->support_interface == ODM_ITRF_USB)
 			READ_AND_CONFIG_MP(8188f, _txpowertrack_usb);
-		else if (p_dm->support_interface == ODM_ITRF_SDIO)
+		else if (dm->support_interface == ODM_ITRF_SDIO)
 			READ_AND_CONFIG_MP(8188f, _txpowertrack_sdio);
 	}
 #endif
-
 #if RTL8822B_SUPPORT
-	if (p_dm->support_ic_type == ODM_RTL8822B) {
-		if (p_dm->rfe_type == 0)
+	if (dm->support_ic_type == ODM_RTL8822B) {
+		if (dm->rfe_type == 0)
 			READ_AND_CONFIG_MP(8822b, _txpowertrack_type0);
-		else if (p_dm->rfe_type == 1)
+		else if (dm->rfe_type == 1)
 			READ_AND_CONFIG_MP(8822b, _txpowertrack_type1);
-		else if (p_dm->rfe_type == 2)
+		else if (dm->rfe_type == 2)
 			READ_AND_CONFIG_MP(8822b, _txpowertrack_type2);
-		else if ((p_dm->rfe_type == 3) || (p_dm->rfe_type == 5))
+		else if ((dm->rfe_type == 3) || (dm->rfe_type == 5))
 			READ_AND_CONFIG_MP(8822b, _txpowertrack_type3_type5);
-		else if (p_dm->rfe_type == 4)
+		else if (dm->rfe_type == 4)
 			READ_AND_CONFIG_MP(8822b, _txpowertrack_type4);
-		else if (p_dm->rfe_type == 6)
+		else if (dm->rfe_type == 6)
 			READ_AND_CONFIG_MP(8822b, _txpowertrack_type6);
-		else if (p_dm->rfe_type == 7)
+		else if (dm->rfe_type == 7)
 			READ_AND_CONFIG_MP(8822b, _txpowertrack_type7);
-		else if (p_dm->rfe_type == 8)
+		else if (dm->rfe_type == 8)
 			READ_AND_CONFIG_MP(8822b, _txpowertrack_type8);
-		else if (p_dm->rfe_type == 9)
+		else if (dm->rfe_type == 9)
 			READ_AND_CONFIG_MP(8822b, _txpowertrack_type9);
-		else if (p_dm->rfe_type == 10)
+		else if (dm->rfe_type == 10)
 			READ_AND_CONFIG_MP(8822b, _txpowertrack_type10);
-		else if (p_dm->rfe_type == 11)
+		else if (dm->rfe_type == 11)
 			READ_AND_CONFIG_MP(8822b, _txpowertrack_type11);
-		else if (p_dm->rfe_type == 12)
+		else if (dm->rfe_type == 12)
 			READ_AND_CONFIG_MP(8822b, _txpowertrack_type12);
-		else if (p_dm->rfe_type == 13)
+		else if (dm->rfe_type == 13)
 			READ_AND_CONFIG_MP(8822b, _txpowertrack_type13);
-		else if (p_dm->rfe_type == 14)
+		else if (dm->rfe_type == 14)
 			READ_AND_CONFIG_MP(8822b, _txpowertrack_type14);
-		else if (p_dm->rfe_type == 15)
+		else if (dm->rfe_type == 15)
 			READ_AND_CONFIG_MP(8822b, _txpowertrack_type15);
-		else if (p_dm->rfe_type == 16)
+		else if (dm->rfe_type == 16)
 			READ_AND_CONFIG_MP(8822b, _txpowertrack_type16);
-		else if (p_dm->rfe_type == 17)
+		else if (dm->rfe_type == 17)
 			READ_AND_CONFIG_MP(8822b, _txpowertrack_type17);
+		else if (dm->rfe_type == 18)
+			READ_AND_CONFIG_MP(8822b, _txpowertrack_type18);
 		else
 			READ_AND_CONFIG_MP(8822b, _txpowertrack);
 	}
 #endif
-
 #if RTL8197F_SUPPORT
-	if (p_dm->support_ic_type == ODM_RTL8197F) {
-		if (p_dm->rfe_type == 0)
+	if (dm->support_ic_type == ODM_RTL8197F) {
+		if (dm->rfe_type == 0)
 			READ_AND_CONFIG_MP(8197f, _txpowertrack_type0);
-		else if (p_dm->rfe_type == 1)
+		else if (dm->rfe_type == 1)
 			READ_AND_CONFIG_MP(8197f, _txpowertrack_type1);
 		else
 			READ_AND_CONFIG_MP(8197f, _txpowertrack);
 	}
 #endif
+/*@jj add 20170822*/
+#if RTL8192F_SUPPORT
+	if (dm->support_ic_type == ODM_RTL8192F) {
+		if (dm->rfe_type == 0)
+			READ_AND_CONFIG_MP(8192f, _txpowertrack_type0);
+		else if (dm->rfe_type == 1)
+			READ_AND_CONFIG_MP(8192f, _txpowertrack_type1);
+		else if (dm->rfe_type == 2)
+			READ_AND_CONFIG_MP(8192f, _txpowertrack_type2);
+		else if (dm->rfe_type == 3)
+			READ_AND_CONFIG_MP(8192f, _txpowertrack_type3);
+		else if (dm->rfe_type == 4)
+			READ_AND_CONFIG_MP(8192f, _txpowertrack_type4);
+		else if (dm->rfe_type == 5)
+			READ_AND_CONFIG_MP(8192f, _txpowertrack_type5);
+		else if (dm->rfe_type == 6)
+			READ_AND_CONFIG_MP(8192f, _txpowertrack_type6);
+		else if (dm->rfe_type == 7)
+			READ_AND_CONFIG_MP(8192f, _txpowertrack_type7);
+		else if (dm->rfe_type == 8)
+			READ_AND_CONFIG_MP(8192f, _txpowertrack_type8);
+		else if (dm->rfe_type == 9)
+			READ_AND_CONFIG_MP(8192f, _txpowertrack_type9);
+		else if (dm->rfe_type == 10)
+			READ_AND_CONFIG_MP(8192f, _txpowertrack_type10);
+		else if (dm->rfe_type == 11)
+			READ_AND_CONFIG_MP(8192f, _txpowertrack_type11);
+		else if (dm->rfe_type == 12)
+			READ_AND_CONFIG_MP(8192f, _txpowertrack_type12);
+		else if (dm->rfe_type == 13)
+			READ_AND_CONFIG_MP(8192f, _txpowertrack_type13);
+		else if (dm->rfe_type == 14)
+			READ_AND_CONFIG_MP(8192f, _txpowertrack_type14);
+		else if (dm->rfe_type == 15)
+			READ_AND_CONFIG_MP(8192f, _txpowertrack_type15);
+		else if (dm->rfe_type == 16)
+			READ_AND_CONFIG_MP(8192f, _txpowertrack_type16);
+		else if (dm->rfe_type == 17)
+			READ_AND_CONFIG_MP(8192f, _txpowertrack_type17);
+		else if (dm->rfe_type == 18)
+			READ_AND_CONFIG_MP(8192f, _txpowertrack_type18);
+		else if (dm->rfe_type == 19)
+			READ_AND_CONFIG_MP(8192f, _txpowertrack_type19);
+		else if (dm->rfe_type == 20)
+			READ_AND_CONFIG_MP(8192f, _txpowertrack_type20);
+		else if (dm->rfe_type == 21)
+			READ_AND_CONFIG_MP(8192f, _txpowertrack_type21);
+		else if (dm->rfe_type == 22)
+			READ_AND_CONFIG_MP(8192f, _txpowertrack_type22);
+		else if (dm->rfe_type == 23)
+			READ_AND_CONFIG_MP(8192f, _txpowertrack_type23);
+		else if (dm->rfe_type == 24)
+			READ_AND_CONFIG_MP(8192f, _txpowertrack_type24);
+		else if (dm->rfe_type == 25)
+			READ_AND_CONFIG_MP(8192f, _txpowertrack_type25);
+		else if (dm->rfe_type == 26)
+			READ_AND_CONFIG_MP(8192f, _txpowertrack_type26);
+		else if (dm->rfe_type == 27)
+			READ_AND_CONFIG_MP(8192f, _txpowertrack_type27);
+		else if (dm->rfe_type == 28)
+			READ_AND_CONFIG_MP(8192f, _txpowertrack_type28);
+		else if (dm->rfe_type == 29)
+			READ_AND_CONFIG_MP(8192f, _txpowertrack_type29);
+		else if (dm->rfe_type == 30)
+			READ_AND_CONFIG_MP(8192f, _txpowertrack_type30);
+		else if (dm->rfe_type == 31)
+			READ_AND_CONFIG_MP(8192f, _txpowertrack_type31);
+		else
+			READ_AND_CONFIG_MP(8192f, _txpowertrack);
+
+		READ_AND_CONFIG_MP(8192f, _txxtaltrack);
+	}
+#endif
 
+#if RTL8721D_SUPPORT
+	if (dm->support_ic_type == ODM_RTL8721D) {
+		#if 0
+		if (dm->package_type == 1)
+			READ_AND_CONFIG_MP(8721d, _txpowertrack_qfn48m_smic);
+		else if (dm->package_type == 5)
+			READ_AND_CONFIG_MP(8721d, _txpowertrack_qfn48m_umc);
+		#endif
+		READ_AND_CONFIG_MP(8721d, _txpowertrack);
+		READ_AND_CONFIG_MP(8721d, _txxtaltrack);
+	}
+#endif
 #if RTL8821C_SUPPORT
-	if (p_dm->support_ic_type == ODM_RTL8821C) {
-		if (p_dm->rfe_type == 0x5)
+	if (dm->support_ic_type == ODM_RTL8821C) {
+		if (dm->rfe_type == 0x5)
 			READ_AND_CONFIG(8821c, _txpowertrack_type0x28);
-		else if (p_dm->rfe_type == 0x4)
+		else if (dm->rfe_type == 0x4)
 			READ_AND_CONFIG(8821c, _txpowertrack_type0x20);
 		else
 			READ_AND_CONFIG(8821c, _txpowertrack);
 	}
 #endif
 
+#if RTL8198F_SUPPORT
+	if (dm->support_ic_type == ODM_RTL8198F)
+		READ_AND_CONFIG_MP(8198f, _txpowertrack);
+#endif
+
+#if RTL8195B_SUPPORT
+	if (dm->support_ic_type == ODM_RTL8195B) {
+		READ_AND_CONFIG_MP(8195b, _txpowertrack);
+		READ_AND_CONFIG_MP(8195b, _txxtaltrack);
+	}
+#endif
+
+#if (RTL8822C_SUPPORT)
+	if (dm->support_ic_type == ODM_RTL8822C)
+		READ_AND_CONFIG_MP(8822c, _txpowertrack);
+#endif
+
+#if (RTL8812F_SUPPORT)
+	if (dm->support_ic_type == ODM_RTL8812F)
+		READ_AND_CONFIG_MP(8812f, _txpowertrack);
+#endif
+
 	return HAL_STATUS_SUCCESS;
 }
 
 enum hal_status
-odm_config_bb_with_header_file(
-	struct PHY_DM_STRUCT		*p_dm,
-	enum odm_bb_config_type		config_type
-)
+odm_config_bb_with_header_file(struct dm_struct *dm,
+			       enum odm_bb_config_type config_type)
 {
 #if (DM_ODM_SUPPORT_TYPE & ODM_WIN)
-	struct _ADAPTER		*adapter = p_dm->adapter;
-	PMGNT_INFO		p_mgnt_info = &(adapter->MgntInfo);
+	void *adapter = dm->adapter;
+	PMGNT_INFO mgnt_info = &((PADAPTER)adapter)->MgntInfo;
 #endif
-	enum hal_status	result = HAL_STATUS_SUCCESS;
+	enum hal_status result = HAL_STATUS_SUCCESS;
 
-	/* 1 AP doesn't use PHYDM initialization in these ICs */
+/* @1 AP doesn't use PHYDM initialization in these ICs */
 #if (DM_ODM_SUPPORT_TYPE != ODM_AP)
 #if (RTL8812A_SUPPORT == 1)
-	if (p_dm->support_ic_type == ODM_RTL8812) {
+	if (dm->support_ic_type == ODM_RTL8812) {
 		if (config_type == CONFIG_BB_PHY_REG)
 			READ_AND_CONFIG_MP(8812a, _phy_reg);
 		else if (config_type == CONFIG_BB_AGC_TAB)
 			READ_AND_CONFIG_MP(8812a, _agc_tab);
 		else if (config_type == CONFIG_BB_PHY_REG_PG) {
-			if (p_dm->rfe_type == 3 && p_dm->is_mp_chip)
+			if (dm->rfe_type == 3 && dm->is_mp_chip)
 				READ_AND_CONFIG_MP(8812a, _phy_reg_pg_asus);
 #if (DM_ODM_SUPPORT_TYPE & ODM_WIN)
-			else if (p_mgnt_info->CustomerID == RT_CID_WNC_NEC && p_dm->is_mp_chip)
+			else if (mgnt_info->CustomerID == RT_CID_WNC_NEC && dm->is_mp_chip)
 				READ_AND_CONFIG_MP(8812a, _phy_reg_pg_nec);
 #if RT_PLATFORM == PLATFORM_MACOSX
-			/*{1827}{1024} for BUFFALO power by rate table. Isaiah 2013-11-29*/
-			else if (p_mgnt_info->CustomerID == RT_CID_DNI_BUFFALO)
+			/*@{1827}{1024} for BUFFALO power by rate table. Isaiah 2013-11-29*/
+			else if (mgnt_info->CustomerID == RT_CID_DNI_BUFFALO)
 				READ_AND_CONFIG_MP(8812a, _phy_reg_pg_dni);
 			/* TP-Link T4UH, Isaiah 2015-03-16*/
-			else if (p_mgnt_info->CustomerID == RT_CID_TPLINK_HPWR) {
-				dbg_print("RT_CID_TPLINK_HPWR:: _PHY_REG_PG_TPLINK\n");
+			else if (mgnt_info->CustomerID == RT_CID_TPLINK_HPWR) {
+				pr_debug("RT_CID_TPLINK_HPWR:: _PHY_REG_PG_TPLINK\n");
 				READ_AND_CONFIG_MP(8812a, _phy_reg_pg_tplink);
 			}
 #endif
@@ -536,17 +814,17 @@ odm_config_bb_with_header_file(
 		} else if (config_type == CONFIG_BB_PHY_REG_MP)
 			READ_AND_CONFIG_MP(8812a, _phy_reg_mp);
 		else if (config_type == CONFIG_BB_AGC_TAB_DIFF) {
-			p_dm->fw_offload_ability &= ~PHYDM_PHY_PARAM_OFFLOAD;
-			/*AGC_TAB DIFF dont support FW offload*/
-			if ((*p_dm->p_channel >= 36)  && (*p_dm->p_channel  <= 64))
+			dm->fw_offload_ability &= ~PHYDM_PHY_PARAM_OFFLOAD;
+			/*@AGC_TAB DIFF dont support FW offload*/
+			if ((*dm->channel >= 36) && (*dm->channel <= 64))
 				AGC_DIFF_CONFIG_MP(8812a, lb);
-			else if (*p_dm->p_channel >= 100)
+			else if (*dm->channel >= 100)
 				AGC_DIFF_CONFIG_MP(8812a, hb);
 		}
 	}
 #endif
 #if (RTL8821A_SUPPORT == 1)
-	if (p_dm->support_ic_type == ODM_RTL8821) {
+	if (dm->support_ic_type == ODM_RTL8821) {
 		if (config_type == CONFIG_BB_PHY_REG)
 			READ_AND_CONFIG_MP(8821a, _phy_reg);
 		else if (config_type == CONFIG_BB_AGC_TAB)
@@ -554,29 +832,29 @@ odm_config_bb_with_header_file(
 		else if (config_type == CONFIG_BB_PHY_REG_PG) {
 #if (DM_ODM_SUPPORT_TYPE & ODM_WIN)
 #if (DEV_BUS_TYPE == RT_PCI_INTERFACE)
-			HAL_DATA_TYPE	*p_hal_data = GET_HAL_DATA(adapter);
+			HAL_DATA_TYPE * hal_data = GET_HAL_DATA(((PADAPTER)adapter));
 
-			if ((p_hal_data->EEPROMSVID == 0x1043 && p_hal_data->EEPROMSMID == 0x207F))
+			if ((hal_data->EEPROMSVID == 0x1043 && hal_data->EEPROMSMID == 0x207F))
 				READ_AND_CONFIG_MP(8821a, _phy_reg_pg_e202_sa);
 			else
 #endif
 #if (RT_PLATFORM == PLATFORM_MACOSX)
-				/*{1827}{1022} for BUFFALO power by rate table. Isaiah 2013-10-18*/
-				if (p_mgnt_info->CustomerID == RT_CID_DNI_BUFFALO) {
-					/*{1024} for BUFFALO power by rate table. (JP/US)*/
-					if (p_mgnt_info->ChannelPlan == RT_CHANNEL_DOMAIN_US_2G_CANADA_5G)
-						READ_AND_CONFIG_MP(8821a, _phy_reg_pg_dni_us);
-					else
-						READ_AND_CONFIG_MP(8821a, _phy_reg_pg_dni_jp);
-				} else
+				/*@  for BUFFALO pwr by rate table */
+				if (mgnt_info->CustomerID == RT_CID_DNI_BUFFALO) {
+				/*@  for BUFFALO pwr by rate table (JP/US)*/
+				if (mgnt_info->ChannelPlan == RT_CHANNEL_DOMAIN_US_2G_CANADA_5G)
+					READ_AND_CONFIG_MP(8821a, _phy_reg_pg_dni_us);
+				else
+					READ_AND_CONFIG_MP(8821a, _phy_reg_pg_dni_jp);
+			} else
 #endif
 #endif
-					READ_AND_CONFIG_MP(8821a, _phy_reg_pg);
+				READ_AND_CONFIG_MP(8821a, _phy_reg_pg);
 		}
 	}
 #endif
 #if (RTL8192E_SUPPORT == 1)
-	if (p_dm->support_ic_type == ODM_RTL8192E) {
+	if (dm->support_ic_type == ODM_RTL8192E) {
 		if (config_type == CONFIG_BB_PHY_REG)
 			READ_AND_CONFIG_MP(8192e, _phy_reg);
 		else if (config_type == CONFIG_BB_AGC_TAB)
@@ -586,7 +864,7 @@ odm_config_bb_with_header_file(
 	}
 #endif
 #if (RTL8723D_SUPPORT == 1)
-	if (p_dm->support_ic_type == ODM_RTL8723D) {
+	if (dm->support_ic_type == ODM_RTL8723D) {
 		if (config_type == CONFIG_BB_PHY_REG)
 			READ_AND_CONFIG_MP(8723d, _phy_reg);
 		else if (config_type == CONFIG_BB_AGC_TAB)
@@ -595,9 +873,9 @@ odm_config_bb_with_header_file(
 			READ_AND_CONFIG_MP(8723d, _phy_reg_pg);
 	}
 #endif
-/* JJ ADD 20161014 */
+/* @JJ ADD 20161014 */
 #if (RTL8710B_SUPPORT == 1)
-	if (p_dm->support_ic_type == ODM_RTL8710B) {
+	if (dm->support_ic_type == ODM_RTL8710B) {
 		if (config_type == CONFIG_BB_PHY_REG)
 			READ_AND_CONFIG_MP(8710b, _phy_reg);
 		else if (config_type == CONFIG_BB_AGC_TAB)
@@ -607,12 +885,10 @@ odm_config_bb_with_header_file(
 	}
 #endif
 
-#endif/* (DM_ODM_SUPPORT_TYPE !=  ODM_AP) */
-
-
-	/* 1 All platforms support */
+#endif /* @(DM_ODM_SUPPORT_TYPE !=  ODM_AP) */
+/* @1 All platforms support */
 #if (RTL8188E_SUPPORT == 1)
-	if (p_dm->support_ic_type == ODM_RTL8188E) {
+	if (dm->support_ic_type == ODM_RTL8188E) {
 		if (config_type == CONFIG_BB_PHY_REG)
 			READ_AND_CONFIG_MP(8188e, _phy_reg);
 		else if (config_type == CONFIG_BB_AGC_TAB)
@@ -622,7 +898,7 @@ odm_config_bb_with_header_file(
 	}
 #endif
 #if (RTL8723B_SUPPORT == 1)
-	if (p_dm->support_ic_type == ODM_RTL8723B) {
+	if (dm->support_ic_type == ODM_RTL8723B) {
 		if (config_type == CONFIG_BB_PHY_REG)
 			READ_AND_CONFIG_MP(8723b, _phy_reg);
 		else if (config_type == CONFIG_BB_AGC_TAB)
@@ -632,35 +908,34 @@ odm_config_bb_with_header_file(
 	}
 #endif
 #if (RTL8814A_SUPPORT == 1)
-	if (p_dm->support_ic_type == ODM_RTL8814A) {
+	if (dm->support_ic_type == ODM_RTL8814A) {
 		if (config_type == CONFIG_BB_PHY_REG)
 			READ_AND_CONFIG_MP(8814a, _phy_reg);
 		else if (config_type == CONFIG_BB_AGC_TAB)
 			READ_AND_CONFIG_MP(8814a, _agc_tab);
 		else if (config_type == CONFIG_BB_PHY_REG_PG) {
-			if (p_dm->rfe_type == 0)
-				READ_AND_CONFIG_MP(8814a,_phy_reg_pg_type0);
-			else if (p_dm->rfe_type == 2)
-				READ_AND_CONFIG_MP(8814a,_phy_reg_pg_type2);				
-			else if (p_dm->rfe_type == 3)
-				READ_AND_CONFIG_MP(8814a,_phy_reg_pg_type3);		
-			else if (p_dm->rfe_type == 4)
-				READ_AND_CONFIG_MP(8814a,_phy_reg_pg_type4);		
-			else if (p_dm->rfe_type == 5)
-				READ_AND_CONFIG_MP(8814a,_phy_reg_pg_type5);		
-			else if (p_dm->rfe_type == 7)
-				READ_AND_CONFIG_MP(8814a,_phy_reg_pg_type7);
-			else if (p_dm->rfe_type == 8)
-				READ_AND_CONFIG_MP(8814a,_phy_reg_pg_type8);
+			if (dm->rfe_type == 0)
+				READ_AND_CONFIG_MP(8814a, _phy_reg_pg_type0);
+			else if (dm->rfe_type == 2)
+				READ_AND_CONFIG_MP(8814a, _phy_reg_pg_type2);
+			else if (dm->rfe_type == 3)
+				READ_AND_CONFIG_MP(8814a, _phy_reg_pg_type3);
+			else if (dm->rfe_type == 4)
+				READ_AND_CONFIG_MP(8814a, _phy_reg_pg_type4);
+			else if (dm->rfe_type == 5)
+				READ_AND_CONFIG_MP(8814a, _phy_reg_pg_type5);
+			else if (dm->rfe_type == 7)
+				READ_AND_CONFIG_MP(8814a, _phy_reg_pg_type7);
+			else if (dm->rfe_type == 8)
+				READ_AND_CONFIG_MP(8814a, _phy_reg_pg_type8);
 			else
-				READ_AND_CONFIG_MP(8814a,_phy_reg_pg);
-		}
-		else if (config_type == CONFIG_BB_PHY_REG_MP)
+				READ_AND_CONFIG_MP(8814a, _phy_reg_pg);
+		} else if (config_type == CONFIG_BB_PHY_REG_MP)
 			READ_AND_CONFIG_MP(8814a, _phy_reg_mp);
 	}
 #endif
 #if (RTL8703B_SUPPORT == 1)
-	if (p_dm->support_ic_type == ODM_RTL8703B) {
+	if (dm->support_ic_type == ODM_RTL8703B) {
 		if (config_type == CONFIG_BB_PHY_REG)
 			READ_AND_CONFIG_MP(8703b, _phy_reg);
 		else if (config_type == CONFIG_BB_AGC_TAB)
@@ -670,7 +945,7 @@ odm_config_bb_with_header_file(
 	}
 #endif
 #if (RTL8188F_SUPPORT == 1)
-	if (p_dm->support_ic_type == ODM_RTL8188F) {
+	if (dm->support_ic_type == ODM_RTL8188F) {
 		if (config_type == CONFIG_BB_PHY_REG)
 			READ_AND_CONFIG_MP(8188f, _phy_reg);
 		else if (config_type == CONFIG_BB_AGC_TAB)
@@ -680,74 +955,162 @@ odm_config_bb_with_header_file(
 	}
 #endif
 #if (RTL8822B_SUPPORT == 1)
-	if (p_dm->support_ic_type == ODM_RTL8822B) {
-		if (config_type == CONFIG_BB_PHY_REG)
+	if (dm->support_ic_type == ODM_RTL8822B) {
+		if (config_type == CONFIG_BB_PHY_REG) {
 			READ_AND_CONFIG_MP(8822b, _phy_reg);
-		else if (config_type == CONFIG_BB_AGC_TAB)
+		} else if (config_type == CONFIG_BB_AGC_TAB) {
 			READ_AND_CONFIG_MP(8822b, _agc_tab);
-		else if (config_type == CONFIG_BB_PHY_REG_PG) {
-			if (p_dm->rfe_type == 2)
+		} else if (config_type == CONFIG_BB_PHY_REG_PG) {
+			if (dm->rfe_type == 2)
 				READ_AND_CONFIG_MP(8822b, _phy_reg_pg_type2);
-			else if (p_dm->rfe_type == 3)
+			else if (dm->rfe_type == 3)
 				READ_AND_CONFIG_MP(8822b, _phy_reg_pg_type3);
-			else if (p_dm->rfe_type == 4)
+			else if (dm->rfe_type == 4)
 				READ_AND_CONFIG_MP(8822b, _phy_reg_pg_type4);
-			else if (p_dm->rfe_type == 5)
+			else if (dm->rfe_type == 5)
 				READ_AND_CONFIG_MP(8822b, _phy_reg_pg_type5);
-			else if (p_dm->rfe_type == 12)
+			else if (dm->rfe_type == 12)
 				READ_AND_CONFIG_MP(8822b, _phy_reg_pg_type12);
-			else if (p_dm->rfe_type == 15)
+			else if (dm->rfe_type == 15)
 				READ_AND_CONFIG_MP(8822b, _phy_reg_pg_type15);
-			else if (p_dm->rfe_type == 16)
+			else if (dm->rfe_type == 16)
 				READ_AND_CONFIG_MP(8822b, _phy_reg_pg_type16);
-			else if (p_dm->rfe_type == 17)
+			else if (dm->rfe_type == 17)
 				READ_AND_CONFIG_MP(8822b, _phy_reg_pg_type17);
+			else if (dm->rfe_type == 18)
+				READ_AND_CONFIG_MP(8822b, _phy_reg_pg_type18);
 			else
 				READ_AND_CONFIG_MP(8822b, _phy_reg_pg);
 		}
-
 	}
 #endif
 
 #if (RTL8197F_SUPPORT == 1)
-	if (p_dm->support_ic_type == ODM_RTL8197F) {
+	if (dm->support_ic_type == ODM_RTL8197F) {
 		if (config_type == CONFIG_BB_PHY_REG) {
 			READ_AND_CONFIG_MP(8197f, _phy_reg);
-			if (p_dm->cut_version == ODM_CUT_A)
-				phydm_phypara_a_cut(p_dm);
+			if (dm->cut_version == ODM_CUT_A)
+				phydm_phypara_a_cut(dm);
 		} else if (config_type == CONFIG_BB_AGC_TAB)
 			READ_AND_CONFIG_MP(8197f, _agc_tab);
 	}
 #endif
-
-#if (RTL8821C_SUPPORT == 1)
-	if (p_dm->support_ic_type == ODM_RTL8821C) {
+/*@jj add 20170822*/
+#if (RTL8192F_SUPPORT == 1)
+	if (dm->support_ic_type == ODM_RTL8192F) {
+		if (config_type == CONFIG_BB_PHY_REG) {
+			READ_AND_CONFIG_MP(8192f, _phy_reg);
+		} else if (config_type == CONFIG_BB_AGC_TAB) {
+			READ_AND_CONFIG_MP(8192f, _agc_tab);
+		} else if (config_type == CONFIG_BB_PHY_REG_PG) {
+			if (dm->rfe_type == 0)
+				READ_AND_CONFIG_MP(8192f, _phy_reg_pg_type0);
+			else if (dm->rfe_type == 1)
+				READ_AND_CONFIG_MP(8192f, _phy_reg_pg_type1);
+			else if (dm->rfe_type == 2)
+				READ_AND_CONFIG_MP(8192f, _phy_reg_pg_type2);
+			else if (dm->rfe_type == 3)
+				READ_AND_CONFIG_MP(8192f, _phy_reg_pg_type3);
+			else if (dm->rfe_type == 4)
+				READ_AND_CONFIG_MP(8192f, _phy_reg_pg_type4);
+			else if (dm->rfe_type == 5)
+				READ_AND_CONFIG_MP(8192f, _phy_reg_pg_type5);
+			else if (dm->rfe_type == 6)
+				READ_AND_CONFIG_MP(8192f, _phy_reg_pg_type6);
+			else if (dm->rfe_type == 7)
+				READ_AND_CONFIG_MP(8192f, _phy_reg_pg_type7);
+			else if (dm->rfe_type == 8)
+				READ_AND_CONFIG_MP(8192f, _phy_reg_pg_type8);
+			else if (dm->rfe_type == 9)
+				READ_AND_CONFIG_MP(8192f, _phy_reg_pg_type9);
+			else if (dm->rfe_type == 10)
+				READ_AND_CONFIG_MP(8192f, _phy_reg_pg_type10);
+			else if (dm->rfe_type == 11)
+				READ_AND_CONFIG_MP(8192f, _phy_reg_pg_type11);
+			else if (dm->rfe_type == 12)
+				READ_AND_CONFIG_MP(8192f, _phy_reg_pg_type12);
+			else if (dm->rfe_type == 13)
+				READ_AND_CONFIG_MP(8192f, _phy_reg_pg_type13);
+			else if (dm->rfe_type == 14)
+				READ_AND_CONFIG_MP(8192f, _phy_reg_pg_type14);
+			else if (dm->rfe_type == 15)
+				READ_AND_CONFIG_MP(8192f, _phy_reg_pg_type15);
+			else if (dm->rfe_type == 16)
+				READ_AND_CONFIG_MP(8192f, _phy_reg_pg_type16);
+			else if (dm->rfe_type == 17)
+				READ_AND_CONFIG_MP(8192f, _phy_reg_pg_type17);
+			else if (dm->rfe_type == 18)
+				READ_AND_CONFIG_MP(8192f, _phy_reg_pg_type18);
+			else if (dm->rfe_type == 19)
+				READ_AND_CONFIG_MP(8192f, _phy_reg_pg_type19);
+			else if (dm->rfe_type == 20)
+				READ_AND_CONFIG_MP(8192f, _phy_reg_pg_type20);
+			else if (dm->rfe_type == 21)
+				READ_AND_CONFIG_MP(8192f, _phy_reg_pg_type21);
+			else if (dm->rfe_type == 22)
+				READ_AND_CONFIG_MP(8192f, _phy_reg_pg_type22);
+			else if (dm->rfe_type == 23)
+				READ_AND_CONFIG_MP(8192f, _phy_reg_pg_type23);
+			else if (dm->rfe_type == 24)
+				READ_AND_CONFIG_MP(8192f, _phy_reg_pg_type24);
+			else if (dm->rfe_type == 25)
+				READ_AND_CONFIG_MP(8192f, _phy_reg_pg_type25);
+			else if (dm->rfe_type == 26)
+				READ_AND_CONFIG_MP(8192f, _phy_reg_pg_type26);
+			else if (dm->rfe_type == 27)
+				READ_AND_CONFIG_MP(8192f, _phy_reg_pg_type27);
+			else if (dm->rfe_type == 28)
+				READ_AND_CONFIG_MP(8192f, _phy_reg_pg_type28);
+			else if (dm->rfe_type == 29)
+				READ_AND_CONFIG_MP(8192f, _phy_reg_pg_type29);
+			else if (dm->rfe_type == 30)
+				READ_AND_CONFIG_MP(8192f, _phy_reg_pg_type30);
+			else if (dm->rfe_type == 31)
+				READ_AND_CONFIG_MP(8192f, _phy_reg_pg_type31);
+			else
+				READ_AND_CONFIG_MP(8192f, _phy_reg_pg);
+		}
+	}
+#endif
+#if (RTL8721D_SUPPORT == 1)
+	if (dm->support_ic_type == ODM_RTL8721D) {
 		if (config_type == CONFIG_BB_PHY_REG)
+			READ_AND_CONFIG_MP(8721d, _phy_reg);
+		else if (config_type == CONFIG_BB_AGC_TAB)
+			READ_AND_CONFIG_MP(8721d, _agc_tab);
+		else if (config_type == CONFIG_BB_PHY_REG_PG)
+			READ_AND_CONFIG_MP(8721d, _phy_reg_pg);
+	}
+#endif
+#if (RTL8821C_SUPPORT == 1)
+	if (dm->support_ic_type == ODM_RTL8821C) {
+		if (config_type == CONFIG_BB_PHY_REG) {
 			READ_AND_CONFIG(8821c, _phy_reg);
-		else if (config_type == CONFIG_BB_AGC_TAB) {
+		} else if (config_type == CONFIG_BB_AGC_TAB) {
 			READ_AND_CONFIG(8821c, _agc_tab);
-			/* According to RFEtype, choosing correct AGC table*/
-			if (p_dm->default_rf_set_8821c == SWITCH_TO_BTG)
+			/* @According to RFEtype, choosing correct AGC table*/
+			if (dm->default_rf_set_8821c == SWITCH_TO_BTG)
 				AGC_DIFF_CONFIG_MP(8821c, btg);
 		} else if (config_type == CONFIG_BB_PHY_REG_PG) {
-			if (p_dm->rfe_type == 0x5)
+			if (dm->rfe_type == 0x5)
 				READ_AND_CONFIG(8821c, _phy_reg_pg_type0x28);
 			else
 				READ_AND_CONFIG(8821c, _phy_reg_pg);
 		} else if (config_type == CONFIG_BB_AGC_TAB_DIFF) {
-			p_dm->fw_offload_ability &= ~PHYDM_PHY_PARAM_OFFLOAD;
-			/*AGC_TAB DIFF dont support FW offload*/
-			if (p_dm->current_rf_set_8821c == SWITCH_TO_BTG)
+			dm->fw_offload_ability &= ~PHYDM_PHY_PARAM_OFFLOAD;
+			/*@AGC_TAB DIFF dont support FW offload*/
+			if (dm->current_rf_set_8821c == SWITCH_TO_BTG)
 				AGC_DIFF_CONFIG_MP(8821c, btg);
-			else if (p_dm->current_rf_set_8821c == SWITCH_TO_WLG)
+			else if (dm->current_rf_set_8821c == SWITCH_TO_WLG)
 				AGC_DIFF_CONFIG_MP(8821c, wlg);
-		} else if (config_type == CONFIG_BB_PHY_REG_MP)
+		} else if (config_type == CONFIG_BB_PHY_REG_MP) {
 			READ_AND_CONFIG(8821c, _phy_reg_mp);
+		}
 	}
 #endif
 
 #if (RTL8195A_SUPPORT == 1)
-	if (p_dm->support_ic_type == ODM_RTL8195A) {
+	if (dm->support_ic_type == ODM_RTL8195A) {
 		if (config_type == CONFIG_BB_PHY_REG)
 			READ_AND_CONFIG(8195a, _phy_reg);
 		else if (config_type == CONFIG_BB_AGC_TAB)
@@ -756,263 +1119,353 @@ odm_config_bb_with_header_file(
 			READ_AND_CONFIG(8195a, _phy_reg_pg);
 	}
 #endif
+#if (RTL8195B_SUPPORT == 1)
+	if (dm->support_ic_type == ODM_RTL8195B) {
+		if (config_type == CONFIG_BB_PHY_REG)
+			READ_AND_CONFIG(8195b, _phy_reg);
+		else if (config_type == CONFIG_BB_AGC_TAB)
+			READ_AND_CONFIG(8195b, _agc_tab);
+		else if (config_type == CONFIG_BB_PHY_REG_PG)
+			READ_AND_CONFIG(8195b, _phy_reg_pg);
+	}
+#endif
+#if (RTL8198F_SUPPORT == 1)
+	if (dm->support_ic_type == ODM_RTL8198F) {
+		if (config_type == CONFIG_BB_PHY_REG)
+			READ_AND_CONFIG_MP(8198f, _phy_reg);
+		else if (config_type == CONFIG_BB_AGC_TAB)
+			READ_AND_CONFIG_MP(8198f, _agc_tab);
+	}
+#endif
+#if (RTL8814B_SUPPORT == 1)
+	if (dm->support_ic_type == ODM_RTL8814B) {
+		if (config_type == CONFIG_BB_PHY_REG)
+			READ_AND_CONFIG_MP(8814b, _phy_reg);
+		else if (config_type == CONFIG_BB_AGC_TAB)
+			READ_AND_CONFIG_MP(8814b, _agc_tab);
+	}
+#endif
+#if (RTL8822C_SUPPORT)
+	if (dm->support_ic_type == ODM_RTL8822C) {
+		if (config_type == CONFIG_BB_PHY_REG)
+			READ_AND_CONFIG_MP(8822c, _phy_reg);
+		else if (config_type == CONFIG_BB_AGC_TAB)
+			READ_AND_CONFIG_MP(8822c, _agc_tab);
+	}
+#endif
+#if (RTL8812F_SUPPORT)
+	if (dm->support_ic_type == ODM_RTL8812F) {
+		if (config_type == CONFIG_BB_PHY_REG)
+			READ_AND_CONFIG_MP(8812f, _phy_reg);
+		else if (config_type == CONFIG_BB_AGC_TAB)
+			READ_AND_CONFIG_MP(8812f, _agc_tab);
+	}
+#endif
 
-	if (config_type == CONFIG_BB_PHY_REG || config_type == CONFIG_BB_AGC_TAB)
-		if (p_dm->fw_offload_ability & PHYDM_PHY_PARAM_OFFLOAD) {
-
-			result = phydm_set_reg_by_fw(p_dm,
-								PHYDM_HALMAC_CMD_END,
-								0,
-								0,
-								0,
-								(enum rf_path)0,
-								0);
-			PHYDM_DBG(p_dm, ODM_COMP_INIT,
-				("phy param offload end!result = %d", result));
+	if (config_type == CONFIG_BB_PHY_REG ||
+	    config_type == CONFIG_BB_AGC_TAB)
+		if (dm->fw_offload_ability & PHYDM_PHY_PARAM_OFFLOAD) {
+			result = phydm_set_reg_by_fw(dm,
+						     PHYDM_HALMAC_CMD_END,
+						     0,
+						     0,
+						     0,
+						     (enum rf_path)0,
+						     0);
+			PHYDM_DBG(dm, ODM_COMP_INIT,
+				  "phy param offload end!result = %d", result);
 		}
 
 	return result;
 }
 
 enum hal_status
-odm_config_mac_with_header_file(
-	struct PHY_DM_STRUCT	*p_dm
-)
+odm_config_mac_with_header_file(struct dm_struct *dm)
 {
-	enum hal_status	result = HAL_STATUS_SUCCESS;
-	PHYDM_DBG(p_dm, ODM_COMP_INIT,
-		("===>odm_config_mac_with_header_file (%s)\n", (p_dm->is_mp_chip) ? "MPChip" : "TestChip"));
-	PHYDM_DBG(p_dm, ODM_COMP_INIT,
-		("support_platform: 0x%X, support_interface: 0x%X, board_type: 0x%X\n",
-		p_dm->support_platform, p_dm->support_interface, p_dm->board_type));
-
-	/* 1 AP doesn't use PHYDM initialization in these ICs */
+	enum hal_status result = HAL_STATUS_SUCCESS;
+
+	PHYDM_DBG(dm, ODM_COMP_INIT, "===>%s (%s)\n", __func__,
+		  (dm->is_mp_chip) ? "MPChip" : "TestChip");
+	PHYDM_DBG(dm, ODM_COMP_INIT,
+		  "support_platform: 0x%X, support_interface: 0x%X, board_type: 0x%X\n",
+		  dm->support_platform, dm->support_interface, dm->board_type);
+
+/* @1 AP doesn't use PHYDM initialization in these ICs */
 #if (DM_ODM_SUPPORT_TYPE != ODM_AP)
 #if (RTL8812A_SUPPORT == 1)
-	if (p_dm->support_ic_type == ODM_RTL8812)
+	if (dm->support_ic_type == ODM_RTL8812)
 		READ_AND_CONFIG_MP(8812a, _mac_reg);
 #endif
 #if (RTL8821A_SUPPORT == 1)
-	if (p_dm->support_ic_type == ODM_RTL8821)
+	if (dm->support_ic_type == ODM_RTL8821)
 		READ_AND_CONFIG_MP(8821a, _mac_reg);
 #endif
 #if (RTL8192E_SUPPORT == 1)
-	if (p_dm->support_ic_type == ODM_RTL8192E)
+	if (dm->support_ic_type == ODM_RTL8192E)
 		READ_AND_CONFIG_MP(8192e, _mac_reg);
 #endif
 #if (RTL8723D_SUPPORT == 1)
-	if (p_dm->support_ic_type == ODM_RTL8723D)
+	if (dm->support_ic_type == ODM_RTL8723D)
 		READ_AND_CONFIG_MP(8723d, _mac_reg);
 #endif
-/* JJ ADD 20161014 */
+/* @JJ ADD 20161014 */
 #if (RTL8710B_SUPPORT == 1)
-	if (p_dm->support_ic_type == ODM_RTL8710B)
+	if (dm->support_ic_type == ODM_RTL8710B)
 		READ_AND_CONFIG_MP(8710b, _mac_reg);
 #endif
-
-#endif/* (DM_ODM_SUPPORT_TYPE !=  ODM_AP) */
-
-	/* 1 All platforms support */
+#endif /* @(DM_ODM_SUPPORT_TYPE !=  ODM_AP) */
+/* @1 All platforms support */
 #if (RTL8188E_SUPPORT == 1)
-	if (p_dm->support_ic_type == ODM_RTL8188E)
+	if (dm->support_ic_type == ODM_RTL8188E)
 		READ_AND_CONFIG_MP(8188e, _mac_reg);
 #endif
 #if (RTL8723B_SUPPORT == 1)
-	if (p_dm->support_ic_type == ODM_RTL8723B)
+	if (dm->support_ic_type == ODM_RTL8723B)
 		READ_AND_CONFIG_MP(8723b, _mac_reg);
 #endif
 #if (RTL8814A_SUPPORT == 1)
-	if (p_dm->support_ic_type == ODM_RTL8814A)
+	if (dm->support_ic_type == ODM_RTL8814A)
 		READ_AND_CONFIG_MP(8814a, _mac_reg);
 #endif
 #if (RTL8703B_SUPPORT == 1)
-	if (p_dm->support_ic_type == ODM_RTL8703B)
+	if (dm->support_ic_type == ODM_RTL8703B)
 		READ_AND_CONFIG_MP(8703b, _mac_reg);
 #endif
 #if (RTL8188F_SUPPORT == 1)
-	if (p_dm->support_ic_type == ODM_RTL8188F)
+	if (dm->support_ic_type == ODM_RTL8188F)
 		READ_AND_CONFIG_MP(8188f, _mac_reg);
 #endif
 #if (RTL8822B_SUPPORT == 1)
-	if (p_dm->support_ic_type == ODM_RTL8822B)
+	if (dm->support_ic_type == ODM_RTL8822B)
 		READ_AND_CONFIG_MP(8822b, _mac_reg);
 #endif
-
 #if (RTL8197F_SUPPORT == 1)
-	if (p_dm->support_ic_type == ODM_RTL8197F)
+	if (dm->support_ic_type == ODM_RTL8197F)
 		READ_AND_CONFIG_MP(8197f, _mac_reg);
 #endif
 
+/*@jj add 20170822*/
+#if (RTL8192F_SUPPORT == 1)
+	if (dm->support_ic_type == ODM_RTL8192F)
+		READ_AND_CONFIG_MP(8192f, _mac_reg);
+#endif
+
+#if (RTL8721D_SUPPORT == 1)
+	if (dm->support_ic_type == ODM_RTL8721D)
+		READ_AND_CONFIG_MP(8721d, _mac_reg);
+#endif
 #if (RTL8821C_SUPPORT == 1)
-	if (p_dm->support_ic_type == ODM_RTL8821C)
+	if (dm->support_ic_type == ODM_RTL8821C)
 		READ_AND_CONFIG(8821c, _mac_reg);
 #endif
-
 #if (RTL8195A_SUPPORT == 1)
-	if (p_dm->support_ic_type == ODM_RTL8195A)
+	if (dm->support_ic_type == ODM_RTL8195A)
 		READ_AND_CONFIG_MP(8195a, _mac_reg);
 #endif
-
-	if (p_dm->fw_offload_ability & PHYDM_PHY_PARAM_OFFLOAD) {
-
-		result = phydm_set_reg_by_fw(p_dm,
-							PHYDM_HALMAC_CMD_END,
-							0,
-							0,
-							0,
-							(enum rf_path)0,
-							0);
-		PHYDM_DBG(p_dm, ODM_COMP_INIT,
-			("mac param offload end!result = %d", result));
+#if (RTL8195B_SUPPORT == 1)
+	if (dm->support_ic_type == ODM_RTL8195B)
+		READ_AND_CONFIG_MP(8195b, _mac_reg);
+#endif
+#if (RTL8198F_SUPPORT == 1)
+	if (dm->support_ic_type == ODM_RTL8198F)
+		READ_AND_CONFIG_MP(8198f, _mac_reg);
+#endif
+#if (RTL8814B_SUPPORT == 1)
+	if (dm->support_ic_type == ODM_RTL8814B)
+		READ_AND_CONFIG_MP(8814b, _mac_reg);
+#endif
+#if (RTL8822C_SUPPORT)
+	if (dm->support_ic_type == ODM_RTL8822C)
+		READ_AND_CONFIG_MP(8822c, _mac_reg);
+#endif
+#if (RTL8812F_SUPPORT)
+	if (dm->support_ic_type == ODM_RTL8812F)
+		READ_AND_CONFIG_MP(8812f, _mac_reg);
+#endif
+
+	if (dm->fw_offload_ability & PHYDM_PHY_PARAM_OFFLOAD) {
+		result = phydm_set_reg_by_fw(dm,
+					     PHYDM_HALMAC_CMD_END,
+					     0,
+					     0,
+					     0,
+					     (enum rf_path)0,
+					     0);
+		PHYDM_DBG(dm, ODM_COMP_INIT,
+			  "mac param offload end!result = %d", result);
 	}
 
 	return result;
 }
 
-u32
-odm_get_hw_img_version(
-	struct PHY_DM_STRUCT	*p_dm
-)
+u32 odm_get_hw_img_version(struct dm_struct *dm)
 {
-	u32  version = 0;
+	u32 version = 0;
 
-	/* 1 AP doesn't use PHYDM initialization in these ICs */
+/* @1 AP doesn't use PHYDM initialization in these ICs */
 #if (DM_ODM_SUPPORT_TYPE != ODM_AP)
 #if (RTL8821A_SUPPORT == 1)
-	if (p_dm->support_ic_type == ODM_RTL8821)
+	if (dm->support_ic_type == ODM_RTL8821)
 		version = GET_VERSION_MP(8821a, _mac_reg);
 #endif
 #if (RTL8192E_SUPPORT == 1)
-	if (p_dm->support_ic_type == ODM_RTL8192E)
+	if (dm->support_ic_type == ODM_RTL8192E)
 		version = GET_VERSION_MP(8192e, _mac_reg);
 #endif
 #if (RTL8812A_SUPPORT == 1)
-	if (p_dm->support_ic_type == ODM_RTL8812)
+	if (dm->support_ic_type == ODM_RTL8812)
 		version = GET_VERSION_MP(8812a, _mac_reg);
 #endif
 #if (RTL8723D_SUPPORT == 1)
-	if (p_dm->support_ic_type == ODM_RTL8723D)
+	if (dm->support_ic_type == ODM_RTL8723D)
 		version = GET_VERSION_MP(8723d, _mac_reg);
 #endif
-/* JJ ADD 20161014 */
+/* @JJ ADD 20161014 */
 #if (RTL8710B_SUPPORT == 1)
-	if (p_dm->support_ic_type == ODM_RTL8710B)
+	if (dm->support_ic_type == ODM_RTL8710B)
 		version = GET_VERSION_MP(8710b, _mac_reg);
 #endif
+#endif /* @(DM_ODM_SUPPORT_TYPE != ODM_AP) */
 
-#endif /* (DM_ODM_SUPPORT_TYPE != ODM_AP) */
-
-	/*1 All platforms support*/
+/*@1 All platforms support*/
 #if (RTL8188E_SUPPORT == 1)
-	if (p_dm->support_ic_type == ODM_RTL8188E)
+	if (dm->support_ic_type == ODM_RTL8188E)
 		version = GET_VERSION_MP(8188e, _mac_reg);
 #endif
 #if (RTL8723B_SUPPORT == 1)
-	if (p_dm->support_ic_type == ODM_RTL8723B)
+	if (dm->support_ic_type == ODM_RTL8723B)
 		version = GET_VERSION_MP(8723b, _mac_reg);
 #endif
 #if (RTL8814A_SUPPORT == 1)
-	if (p_dm->support_ic_type == ODM_RTL8814A)
+	if (dm->support_ic_type == ODM_RTL8814A)
 		version = GET_VERSION_MP(8814a, _mac_reg);
 #endif
 #if (RTL8703B_SUPPORT == 1)
-	if (p_dm->support_ic_type == ODM_RTL8703B)
+	if (dm->support_ic_type == ODM_RTL8703B)
 		version = GET_VERSION_MP(8703b, _mac_reg);
 #endif
 #if (RTL8188F_SUPPORT == 1)
-	if (p_dm->support_ic_type == ODM_RTL8188F)
+	if (dm->support_ic_type == ODM_RTL8188F)
 		version = GET_VERSION_MP(8188f, _mac_reg);
 #endif
 #if (RTL8822B_SUPPORT == 1)
-	if (p_dm->support_ic_type == ODM_RTL8822B)
+	if (dm->support_ic_type == ODM_RTL8822B)
 		version = GET_VERSION_MP(8822b, _mac_reg);
 #endif
-
 #if (RTL8197F_SUPPORT == 1)
-	if (p_dm->support_ic_type == ODM_RTL8197F)
+	if (dm->support_ic_type == ODM_RTL8197F)
 		version = GET_VERSION_MP(8197f, _mac_reg);
 #endif
 
+/*@jj add 20170822*/
+#if (RTL8192F_SUPPORT == 1)
+	if (dm->support_ic_type == ODM_RTL8192F)
+		version = GET_VERSION_MP(8192f, _mac_reg);
+#endif
+#if (RTL8721D_SUPPORT == 1)
+	if (dm->support_ic_type == ODM_RTL8721D)
+		version = GET_VERSION_MP(8721d, _mac_reg);
+#endif
 #if (RTL8821C_SUPPORT == 1)
-	if (p_dm->support_ic_type == ODM_RTL8821C)
+	if (dm->support_ic_type == ODM_RTL8821C)
 		version = GET_VERSION(8821c, _mac_reg);
 #endif
+#if (RTL8195B_SUPPORT == 1)
+	if (dm->support_ic_type == ODM_RTL8195B)
+		version = GET_VERSION(8195b, _mac_reg);
+#endif
+#if (RTL8198F_SUPPORT == 1)
+	if (dm->support_ic_type == ODM_RTL8198F)
+		version = GET_VERSION_MP(8198f, _mac_reg);
+#endif
+#if (RTL8822C_SUPPORT)
+	if (dm->support_ic_type == ODM_RTL8822C)
+		version = GET_VERSION_MP(8822c, _mac_reg);
+#endif
+#if (RTL8812F_SUPPORT)
+	if (dm->support_ic_type == ODM_RTL8812F)
+		version = GET_VERSION_MP(8812f, _mac_reg);
+#endif
+#if (RTL8814B_SUPPORT == 1)
+	if (dm->support_ic_type == ODM_RTL8814B)
+		version = GET_VERSION_MP(8814b, _mac_reg);
+#endif
 
 	return version;
 }
 
-
-u32
-query_phydm_trx_capability(
-	struct PHY_DM_STRUCT					*p_dm
-)
+u32 query_phydm_trx_capability(struct dm_struct *dm)
 {
 	u32 value32 = 0xFFFFFFFF;
 
 #if (RTL8821C_SUPPORT == 1)
-	if (p_dm->support_ic_type == ODM_RTL8821C)
-		value32 = query_phydm_trx_capability_8821c(p_dm);
+	if (dm->support_ic_type == ODM_RTL8821C)
+		value32 = query_phydm_trx_capability_8821c(dm);
+#endif
+#if (RTL8195B_SUPPORT == 1)
+	if (dm->support_ic_type == ODM_RTL8195B)
+		value32 = query_phydm_trx_capability_8195b(dm);
 #endif
-
 	return value32;
 }
 
-u32
-query_phydm_stbc_capability(
-	struct PHY_DM_STRUCT					*p_dm
-)
+u32 query_phydm_stbc_capability(struct dm_struct *dm)
 {
 	u32 value32 = 0xFFFFFFFF;
 
 #if (RTL8821C_SUPPORT == 1)
-	if (p_dm->support_ic_type == ODM_RTL8821C)
-		value32 = query_phydm_stbc_capability_8821c(p_dm);
+	if (dm->support_ic_type == ODM_RTL8821C)
+		value32 = query_phydm_stbc_capability_8821c(dm);
+#endif
+#if (RTL8195B_SUPPORT == 1)
+	if (dm->support_ic_type == ODM_RTL8195B)
+		value32 = query_phydm_stbc_capability_8195b(dm);
 #endif
 
 	return value32;
 }
 
-u32
-query_phydm_ldpc_capability(
-	struct PHY_DM_STRUCT					*p_dm
-)
+u32 query_phydm_ldpc_capability(struct dm_struct *dm)
 {
 	u32 value32 = 0xFFFFFFFF;
 
 #if (RTL8821C_SUPPORT == 1)
-	if (p_dm->support_ic_type == ODM_RTL8821C)
-		value32 = query_phydm_ldpc_capability_8821c(p_dm);
+	if (dm->support_ic_type == ODM_RTL8821C)
+		value32 = query_phydm_ldpc_capability_8821c(dm);
+#endif
+#if (RTL8195B_SUPPORT == 1)
+	if (dm->support_ic_type == ODM_RTL8195B)
+		value32 = query_phydm_ldpc_capability_8195b(dm);
 #endif
-
 	return value32;
 }
 
-u32
-query_phydm_txbf_parameters(
-	struct PHY_DM_STRUCT					*p_dm
-)
+u32 query_phydm_txbf_parameters(struct dm_struct *dm)
 {
 	u32 value32 = 0xFFFFFFFF;
 
 #if (RTL8821C_SUPPORT == 1)
-	if (p_dm->support_ic_type == ODM_RTL8821C)
-		value32 = query_phydm_txbf_parameters_8821c(p_dm);
+	if (dm->support_ic_type == ODM_RTL8821C)
+		value32 = query_phydm_txbf_parameters_8821c(dm);
+#endif
+#if (RTL8195B_SUPPORT == 1)
+	if (dm->support_ic_type == ODM_RTL8195B)
+		value32 = query_phydm_txbf_parameters_8195b(dm);
 #endif
-
 	return value32;
 }
 
-u32
-query_phydm_txbf_capability(
-	struct PHY_DM_STRUCT					*p_dm
-)
+u32 query_phydm_txbf_capability(struct dm_struct *dm)
 {
 	u32 value32 = 0xFFFFFFFF;
 
 #if (RTL8821C_SUPPORT == 1)
-	if (p_dm->support_ic_type == ODM_RTL8821C)
-		value32 = query_phydm_txbf_capability_8821c(p_dm);
+	if (dm->support_ic_type == ODM_RTL8821C)
+		value32 = query_phydm_txbf_capability_8821c(dm);
+#endif
+#if (RTL8195B_SUPPORT == 1)
+	if (dm->support_ic_type == ODM_RTL8195B)
+		value32 = query_phydm_txbf_capability_8195b(dm);
 #endif
-
 	return value32;
 }
diff --git a/rtl8723DS/hal/phydm/phydm_hwconfig.h b/rtl8723DS/hal/phydm/phydm_hwconfig.h
index e3c65e3..7c4d1e3 100755..100644
--- a/rtl8723DS/hal/phydm/phydm_hwconfig.h
+++ b/rtl8723DS/hal/phydm/phydm_hwconfig.h
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2007 - 2017 Realtek Corporation.
+ * Copyright(c) 2007 - 2017  Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -8,86 +8,72 @@
  *
  * This program is distributed in the hope that it will be useful, but WITHOUT
  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  * more details.
  *
+ * The full GNU General Public License is included in this distribution in the
+ * file called LICENSE.
+ *
+ * Contact Information:
+ * wlanfae <wlanfae@realtek.com>
+ * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
+ * Hsinchu 300, Taiwan.
+ *
+ * Larry Finger <Larry.Finger@lwfinger.net>
+ *
  *****************************************************************************/
 
-
-#ifndef	__HALHWOUTSRC_H__
+#ifndef __HALHWOUTSRC_H__
 #define __HALHWOUTSRC_H__
 
-
-/*--------------------------Define -------------------------------------------*/
-#define AGC_DIFF_CONFIG_MP(ic, band) (odm_read_and_config_mp_##ic##_agc_tab_diff(p_dm, array_mp_##ic##_agc_tab_diff_##band, \
-		      sizeof(array_mp_##ic##_agc_tab_diff_##band)/sizeof(u32)))
-#define AGC_DIFF_CONFIG_TC(ic, band) (odm_read_and_config_tc_##ic##_agc_tab_diff(p_dm, array_tc_##ic##_agc_tab_diff_##band, \
-		      sizeof(array_tc_##ic##_agc_tab_diff_##band)/sizeof(u32)))
-
-#define AGC_DIFF_CONFIG(ic, band) do {\
-		if (p_dm->is_mp_chip)\
-			AGC_DIFF_CONFIG_MP(ic, band);\
-		else\
-			AGC_DIFF_CONFIG_TC(ic, band);\
+/*@--------------------------Define -------------------------------------------*/
+#define AGC_DIFF_CONFIG_MP(ic, band)				\
+	(odm_read_and_config_mp_##ic##_agc_tab_diff(dm,		\
+	array_mp_##ic##_agc_tab_diff_##band,			\
+	sizeof(array_mp_##ic##_agc_tab_diff_##band) / sizeof(u32)))
+#define AGC_DIFF_CONFIG_TC(ic, band)				\
+	(odm_read_and_config_tc_##ic##_agc_tab_diff(dm,		\
+	array_tc_##ic##_agc_tab_diff_##band,			\
+	sizeof(array_tc_##ic##_agc_tab_diff_##band) / sizeof(u32)))
+#if defined(DM_ODM_CE_MAC80211)
+#else
+#define AGC_DIFF_CONFIG(ic, band)                     \
+	do {                                          \
+		if (dm->is_mp_chip)                   \
+			AGC_DIFF_CONFIG_MP(ic, band); \
+		else                                  \
+			AGC_DIFF_CONFIG_TC(ic, band); \
 	} while (0)
-
-
-/* ************************************************************
+#endif
+/*@************************************************************
  * structure and define
- * ************************************************************ */
+ ************************************************************/
 
 enum hal_status
-odm_config_rf_with_tx_pwr_track_header_file(
-	struct PHY_DM_STRUCT		*p_dm
-);
+odm_config_rf_with_tx_pwr_track_header_file(struct dm_struct *dm);
 
 enum hal_status
-odm_config_rf_with_header_file(
-	struct PHY_DM_STRUCT		*p_dm,
-	enum odm_rf_config_type		config_type,
-	u8						e_rf_path
-);
+odm_config_rf_with_header_file(struct dm_struct *dm,
+			       enum odm_rf_config_type config_type,
+			       u8 e_rf_path);
 
 enum hal_status
-odm_config_bb_with_header_file(
-	struct PHY_DM_STRUCT	*p_dm,
-	enum odm_bb_config_type		config_type
-);
+odm_config_bb_with_header_file(struct dm_struct *dm,
+			       enum odm_bb_config_type config_type);
 
 enum hal_status
-odm_config_mac_with_header_file(
-	struct PHY_DM_STRUCT	*p_dm
-);
-
-u32
-odm_get_hw_img_version(
-	struct PHY_DM_STRUCT	*p_dm
-);
+odm_config_mac_with_header_file(struct dm_struct *dm);
 
+u32 odm_get_hw_img_version(struct dm_struct *dm);
 
-u32
-query_phydm_trx_capability(
-	struct PHY_DM_STRUCT					*p_dm
-);
+u32 query_phydm_trx_capability(struct dm_struct *dm);
 
-u32
-query_phydm_stbc_capability(
-	struct PHY_DM_STRUCT					*p_dm
-);
+u32 query_phydm_stbc_capability(struct dm_struct *dm);
 
-u32
-query_phydm_ldpc_capability(
-	struct PHY_DM_STRUCT					*p_dm
-);
+u32 query_phydm_ldpc_capability(struct dm_struct *dm);
 
-u32
-query_phydm_txbf_parameters(
-	struct PHY_DM_STRUCT					*p_dm
-);
+u32 query_phydm_txbf_parameters(struct dm_struct *dm);
 
-u32
-query_phydm_txbf_capability(
-	struct PHY_DM_STRUCT					*p_dm
-);
+u32 query_phydm_txbf_capability(struct dm_struct *dm);
 
-#endif /*#ifndef	__HALHWOUTSRC_H__*/
+#endif /*@#ifndef	__HALHWOUTSRC_H__*/
diff --git a/rtl8723DS/hal/phydm/phydm_interface.c b/rtl8723DS/hal/phydm/phydm_interface.c
index 88b15ed..fe0f5c2 100755..100644
--- a/rtl8723DS/hal/phydm/phydm_interface.c
+++ b/rtl8723DS/hal/phydm/phydm_interface.c
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2007 - 2017 Realtek Corporation.
+ * Copyright(c) 2007 - 2017  Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -8,501 +8,523 @@
  *
  * This program is distributed in the hope that it will be useful, but WITHOUT
  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  * more details.
  *
+ * The full GNU General Public License is included in this distribution in the
+ * file called LICENSE.
+ *
+ * Contact Information:
+ * wlanfae <wlanfae@realtek.com>
+ * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
+ * Hsinchu 300, Taiwan.
+ *
+ * Larry Finger <Larry.Finger@lwfinger.net>
+ *
  *****************************************************************************/
 
-/* ************************************************************
+/*@************************************************************
  * include files
- * ************************************************************ */
+ ************************************************************/
 
 #include "mp_precomp.h"
 #include "phydm_precomp.h"
 
-/*
+/*@
  * ODM IO Relative API.
- *   */
+ */
 
-u8
-odm_read_1byte(
-	struct PHY_DM_STRUCT		*p_dm,
-	u32			reg_addr
-)
+u8 odm_read_1byte(struct dm_struct *dm, u32 reg_addr)
 {
 #if (DM_ODM_SUPPORT_TYPE & (ODM_AP))
-	struct rtl8192cd_priv	*priv	= p_dm->priv;
-	return	RTL_R8(reg_addr);
+	struct rtl8192cd_priv *priv = dm->priv;
+	return RTL_R8(reg_addr);
 #elif (DM_ODM_SUPPORT_TYPE & ODM_CE) && defined(DM_ODM_CE_MAC80211)
-	struct rtl_priv *rtlpriv = (struct rtl_priv *)p_dm->adapter;
+	struct rtl_priv *rtlpriv = (struct rtl_priv *)dm->adapter;
 
 	return rtl_read_byte(rtlpriv, reg_addr);
+#elif (DM_ODM_SUPPORT_TYPE & ODM_CE) && defined(DM_ODM_CE_MAC80211_V2)
+	struct rtw_dev *rtwdev = dm->adapter;
+
+	return rtw_read8(rtwdev, reg_addr);
 #elif (DM_ODM_SUPPORT_TYPE & ODM_CE)
-	struct _ADAPTER		*adapter = p_dm->adapter;
+	void *adapter = dm->adapter;
 	return rtw_read8(adapter, reg_addr);
 #elif (DM_ODM_SUPPORT_TYPE & ODM_WIN)
-	struct _ADAPTER		*adapter = p_dm->adapter;
-	return	PlatformEFIORead1Byte(adapter, reg_addr);
-#endif
+	void *adapter = dm->adapter;
+	return PlatformEFIORead1Byte(adapter, reg_addr);
+#elif (DM_ODM_SUPPORT_TYPE & ODM_IOT)
+	void *adapter = dm->adapter;
 
+	return rtw_read8(adapter, reg_addr);
+#endif
 }
 
-
-u16
-odm_read_2byte(
-	struct PHY_DM_STRUCT		*p_dm,
-	u32			reg_addr
-)
+u16 odm_read_2byte(struct dm_struct *dm, u32 reg_addr)
 {
 #if (DM_ODM_SUPPORT_TYPE & (ODM_AP))
-	struct rtl8192cd_priv	*priv	= p_dm->priv;
-	return	RTL_R16(reg_addr);
+	struct rtl8192cd_priv *priv = dm->priv;
+	return RTL_R16(reg_addr);
 #elif (DM_ODM_SUPPORT_TYPE & ODM_CE) && defined(DM_ODM_CE_MAC80211)
-	struct rtl_priv *rtlpriv = (struct rtl_priv *)p_dm->adapter;
+	struct rtl_priv *rtlpriv = (struct rtl_priv *)dm->adapter;
 
 	return rtl_read_word(rtlpriv, reg_addr);
+#elif (DM_ODM_SUPPORT_TYPE & ODM_CE) && defined(DM_ODM_CE_MAC80211_V2)
+	struct rtw_dev *rtwdev = dm->adapter;
+
+	return rtw_read16(rtwdev, reg_addr);
 #elif (DM_ODM_SUPPORT_TYPE & ODM_CE)
-	struct _ADAPTER		*adapter = p_dm->adapter;
+	void *adapter = dm->adapter;
 	return rtw_read16(adapter, reg_addr);
 #elif (DM_ODM_SUPPORT_TYPE & ODM_WIN)
-	struct _ADAPTER		*adapter = p_dm->adapter;
-	return	PlatformEFIORead2Byte(adapter, reg_addr);
-#endif
+	void *adapter = dm->adapter;
+	return PlatformEFIORead2Byte(adapter, reg_addr);
+#elif (DM_ODM_SUPPORT_TYPE & ODM_IOT)
+	void *adapter = dm->adapter;
 
+	return rtw_read16(adapter, reg_addr);
+#endif
 }
 
-
-u32
-odm_read_4byte(
-	struct PHY_DM_STRUCT		*p_dm,
-	u32			reg_addr
-)
+u32 odm_read_4byte(struct dm_struct *dm, u32 reg_addr)
 {
 #if (DM_ODM_SUPPORT_TYPE & (ODM_AP))
-	struct rtl8192cd_priv	*priv	= p_dm->priv;
-	return	RTL_R32(reg_addr);
+	struct rtl8192cd_priv *priv = dm->priv;
+	return RTL_R32(reg_addr);
 #elif (DM_ODM_SUPPORT_TYPE & ODM_CE) && defined(DM_ODM_CE_MAC80211)
-	struct rtl_priv *rtlpriv = (struct rtl_priv *)p_dm->adapter;
+	struct rtl_priv *rtlpriv = (struct rtl_priv *)dm->adapter;
 
 	return rtl_read_dword(rtlpriv, reg_addr);
+#elif (DM_ODM_SUPPORT_TYPE & ODM_CE) && defined(DM_ODM_CE_MAC80211_V2)
+	struct rtw_dev *rtwdev = dm->adapter;
+
+	return rtw_read32(rtwdev, reg_addr);
 #elif (DM_ODM_SUPPORT_TYPE & ODM_CE)
-	struct _ADAPTER		*adapter = p_dm->adapter;
+	void *adapter = dm->adapter;
 	return rtw_read32(adapter, reg_addr);
 #elif (DM_ODM_SUPPORT_TYPE & ODM_WIN)
-	struct _ADAPTER		*adapter = p_dm->adapter;
-	return	PlatformEFIORead4Byte(adapter, reg_addr);
-#endif
+	void *adapter = dm->adapter;
+	return PlatformEFIORead4Byte(adapter, reg_addr);
+#elif (DM_ODM_SUPPORT_TYPE & ODM_IOT)
+	void *adapter = dm->adapter;
 
+	return rtw_read32(adapter, reg_addr);
+#endif
 }
 
-
-void
-odm_write_1byte(
-	struct PHY_DM_STRUCT		*p_dm,
-	u32			reg_addr,
-	u8			data
-)
+void odm_write_1byte(struct dm_struct *dm, u32 reg_addr, u8 data)
 {
 #if (DM_ODM_SUPPORT_TYPE & (ODM_AP))
-	struct rtl8192cd_priv	*priv	= p_dm->priv;
+	struct rtl8192cd_priv *priv = dm->priv;
 	RTL_W8(reg_addr, data);
 #elif (DM_ODM_SUPPORT_TYPE & ODM_CE) && defined(DM_ODM_CE_MAC80211)
-	struct rtl_priv *rtlpriv = (struct rtl_priv *)p_dm->adapter;
+	struct rtl_priv *rtlpriv = (struct rtl_priv *)dm->adapter;
 
 	rtl_write_byte(rtlpriv, reg_addr, data);
+#elif (DM_ODM_SUPPORT_TYPE & ODM_CE) && defined(DM_ODM_CE_MAC80211_V2)
+	struct rtw_dev *rtwdev = dm->adapter;
+
+	rtw_write8(rtwdev, reg_addr, data);
 #elif (DM_ODM_SUPPORT_TYPE & ODM_CE)
-	struct _ADAPTER		*adapter = p_dm->adapter;
+	void *adapter = dm->adapter;
 	rtw_write8(adapter, reg_addr, data);
 #elif (DM_ODM_SUPPORT_TYPE & ODM_WIN)
-	struct _ADAPTER		*adapter = p_dm->adapter;
+	void *adapter = dm->adapter;
 	PlatformEFIOWrite1Byte(adapter, reg_addr, data);
-#endif
+#elif (DM_ODM_SUPPORT_TYPE & ODM_IOT)
+	void *adapter = dm->adapter;
 
+	rtw_write8(adapter, reg_addr, data);
+#endif
 }
 
-
-void
-odm_write_2byte(
-	struct PHY_DM_STRUCT		*p_dm,
-	u32			reg_addr,
-	u16			data
-)
+void odm_write_2byte(struct dm_struct *dm, u32 reg_addr, u16 data)
 {
 #if (DM_ODM_SUPPORT_TYPE & (ODM_AP))
-	struct rtl8192cd_priv	*priv	= p_dm->priv;
+	struct rtl8192cd_priv *priv = dm->priv;
 	RTL_W16(reg_addr, data);
 #elif (DM_ODM_SUPPORT_TYPE & ODM_CE) && defined(DM_ODM_CE_MAC80211)
-	struct rtl_priv *rtlpriv = (struct rtl_priv *)p_dm->adapter;
+	struct rtl_priv *rtlpriv = (struct rtl_priv *)dm->adapter;
 
 	rtl_write_word(rtlpriv, reg_addr, data);
+#elif (DM_ODM_SUPPORT_TYPE & ODM_CE) && defined(DM_ODM_CE_MAC80211_V2)
+	struct rtw_dev *rtwdev = dm->adapter;
+
+	rtw_write16(rtwdev, reg_addr, data);
 #elif (DM_ODM_SUPPORT_TYPE & ODM_CE)
-	struct _ADAPTER		*adapter = p_dm->adapter;
+	void *adapter = dm->adapter;
 	rtw_write16(adapter, reg_addr, data);
 #elif (DM_ODM_SUPPORT_TYPE & ODM_WIN)
-	struct _ADAPTER		*adapter = p_dm->adapter;
+	void *adapter = dm->adapter;
 	PlatformEFIOWrite2Byte(adapter, reg_addr, data);
-#endif
+#elif (DM_ODM_SUPPORT_TYPE & ODM_IOT)
+	void *adapter = dm->adapter;
 
+	rtw_write16(adapter, reg_addr, data);
+#endif
 }
 
-
-void
-odm_write_4byte(
-	struct PHY_DM_STRUCT		*p_dm,
-	u32			reg_addr,
-	u32			data
-)
+void odm_write_4byte(struct dm_struct *dm, u32 reg_addr, u32 data)
 {
 #if (DM_ODM_SUPPORT_TYPE & (ODM_AP))
-	struct rtl8192cd_priv	*priv	= p_dm->priv;
+	struct rtl8192cd_priv *priv = dm->priv;
 	RTL_W32(reg_addr, data);
 #elif (DM_ODM_SUPPORT_TYPE & ODM_CE) && defined(DM_ODM_CE_MAC80211)
-	struct rtl_priv *rtlpriv = (struct rtl_priv *)p_dm->adapter;
+	struct rtl_priv *rtlpriv = (struct rtl_priv *)dm->adapter;
 
 	rtl_write_dword(rtlpriv, reg_addr, data);
+#elif (DM_ODM_SUPPORT_TYPE & ODM_CE) && defined(DM_ODM_CE_MAC80211_V2)
+	struct rtw_dev *rtwdev = dm->adapter;
+
+	rtw_write32(rtwdev, reg_addr, data);
 #elif (DM_ODM_SUPPORT_TYPE & ODM_CE)
-	struct _ADAPTER		*adapter = p_dm->adapter;
+	void *adapter = dm->adapter;
 	rtw_write32(adapter, reg_addr, data);
 #elif (DM_ODM_SUPPORT_TYPE & ODM_WIN)
-	struct _ADAPTER		*adapter = p_dm->adapter;
+	void *adapter = dm->adapter;
 	PlatformEFIOWrite4Byte(adapter, reg_addr, data);
-#endif
+#elif (DM_ODM_SUPPORT_TYPE & ODM_IOT)
+	void *adapter = dm->adapter;
 
+	rtw_write32(adapter, reg_addr, data);
+#endif
 }
 
-
-void
-odm_set_mac_reg(
-	struct PHY_DM_STRUCT	*p_dm,
-	u32		reg_addr,
-	u32		bit_mask,
-	u32		data
-)
+void odm_set_mac_reg(struct dm_struct *dm, u32 reg_addr, u32 bit_mask, u32 data)
 {
 #if (DM_ODM_SUPPORT_TYPE & (ODM_AP))
-	phy_set_bb_reg(p_dm->priv, reg_addr, bit_mask, data);
+	phy_set_bb_reg(dm->priv, reg_addr, bit_mask, data);
 #elif (DM_ODM_SUPPORT_TYPE & ODM_WIN)
-	struct _ADAPTER		*adapter = p_dm->adapter;
+	void *adapter = dm->adapter;
 	PHY_SetBBReg(adapter, reg_addr, bit_mask, data);
 #elif (DM_ODM_SUPPORT_TYPE & ODM_CE) && defined(DM_ODM_CE_MAC80211)
-	struct rtl_priv *rtlpriv = (struct rtl_priv *)p_dm->adapter;
+	struct rtl_priv *rtlpriv = (struct rtl_priv *)dm->adapter;
 
 	rtl_set_bbreg(rtlpriv->hw, reg_addr, bit_mask, data);
+#elif (DM_ODM_SUPPORT_TYPE & ODM_CE) && defined(DM_ODM_CE_MAC80211_V2)
+	struct rtw_dev *rtwdev = dm->adapter;
+
+	rtw_set_reg_with_mask(rtwdev, reg_addr, bit_mask, data);
+#elif (DM_ODM_SUPPORT_TYPE & ODM_IOT)
+	phy_set_bb_reg(dm->adapter, reg_addr, bit_mask, data);
 #else
-	phy_set_bb_reg(p_dm->adapter, reg_addr, bit_mask, data);
+	phy_set_bb_reg(dm->adapter, reg_addr, bit_mask, data);
 #endif
 }
 
-
-u32
-odm_get_mac_reg(
-	struct PHY_DM_STRUCT	*p_dm,
-	u32		reg_addr,
-	u32		bit_mask
-)
+u32 odm_get_mac_reg(struct dm_struct *dm, u32 reg_addr, u32 bit_mask)
 {
 #if (DM_ODM_SUPPORT_TYPE & (ODM_AP))
-	return phy_query_bb_reg(p_dm->priv, reg_addr, bit_mask);
+	return phy_query_bb_reg(dm->priv, reg_addr, bit_mask);
 #elif (DM_ODM_SUPPORT_TYPE & ODM_WIN)
-	return PHY_QueryMacReg(p_dm->adapter, reg_addr, bit_mask);
+	return PHY_QueryMacReg(dm->adapter, reg_addr, bit_mask);
 #elif (DM_ODM_SUPPORT_TYPE & ODM_CE) && defined(DM_ODM_CE_MAC80211)
-	struct rtl_priv *rtlpriv = (struct rtl_priv *)p_dm->adapter;
+	struct rtl_priv *rtlpriv = (struct rtl_priv *)dm->adapter;
 
 	return rtl_get_bbreg(rtlpriv->hw, reg_addr, bit_mask);
+#elif (DM_ODM_SUPPORT_TYPE & ODM_CE) && defined(DM_ODM_CE_MAC80211_V2)
+	struct rtw_dev *rtwdev = dm->adapter;
+
+	return rtw_get_reg_with_mask(rtwdev, reg_addr, bit_mask);
+#elif (DM_ODM_SUPPORT_TYPE & ODM_IOT)
+	return phy_query_bb_reg(dm->adapter, reg_addr, bit_mask);
 #else
-	return phy_query_mac_reg(p_dm->adapter, reg_addr, bit_mask);
+	return phy_query_mac_reg(dm->adapter, reg_addr, bit_mask);
 #endif
 }
 
-
-void
-odm_set_bb_reg(
-	struct PHY_DM_STRUCT	*p_dm,
-	u32		reg_addr,
-	u32		bit_mask,
-	u32		data
-)
+void odm_set_bb_reg(struct dm_struct *dm, u32 reg_addr, u32 bit_mask, u32 data)
 {
 #if (DM_ODM_SUPPORT_TYPE & (ODM_AP))
-	phy_set_bb_reg(p_dm->priv, reg_addr, bit_mask, data);
+	phy_set_bb_reg(dm->priv, reg_addr, bit_mask, data);
 #elif (DM_ODM_SUPPORT_TYPE & ODM_WIN)
-	struct _ADAPTER		*adapter = p_dm->adapter;
+	void *adapter = dm->adapter;
 	PHY_SetBBReg(adapter, reg_addr, bit_mask, data);
 #elif (DM_ODM_SUPPORT_TYPE & ODM_CE) && defined(DM_ODM_CE_MAC80211)
-	struct rtl_priv *rtlpriv = (struct rtl_priv *)p_dm->adapter;
+	struct rtl_priv *rtlpriv = (struct rtl_priv *)dm->adapter;
 
 	rtl_set_bbreg(rtlpriv->hw, reg_addr, bit_mask, data);
+#elif (DM_ODM_SUPPORT_TYPE & ODM_CE) && defined(DM_ODM_CE_MAC80211_V2)
+	struct rtw_dev *rtwdev = dm->adapter;
+
+	rtw_set_reg_with_mask(rtwdev, reg_addr, bit_mask, data);
+#elif (DM_ODM_SUPPORT_TYPE & ODM_IOT)
+	phy_set_bb_reg(dm->adapter, reg_addr, bit_mask, data);
 #else
-	phy_set_bb_reg(p_dm->adapter, reg_addr, bit_mask, data);
+	phy_set_bb_reg(dm->adapter, reg_addr, bit_mask, data);
 #endif
 }
 
-
-u32
-odm_get_bb_reg(
-	struct PHY_DM_STRUCT	*p_dm,
-	u32		reg_addr,
-	u32		bit_mask
-)
+u32 odm_get_bb_reg(struct dm_struct *dm, u32 reg_addr, u32 bit_mask)
 {
 #if (DM_ODM_SUPPORT_TYPE & (ODM_AP))
-	return phy_query_bb_reg(p_dm->priv, reg_addr, bit_mask);
+	return phy_query_bb_reg(dm->priv, reg_addr, bit_mask);
 #elif (DM_ODM_SUPPORT_TYPE & ODM_WIN)
-	struct _ADAPTER		*adapter = p_dm->adapter;
+	void *adapter = dm->adapter;
 	return PHY_QueryBBReg(adapter, reg_addr, bit_mask);
 #elif (DM_ODM_SUPPORT_TYPE & ODM_CE) && defined(DM_ODM_CE_MAC80211)
-	struct rtl_priv *rtlpriv = (struct rtl_priv *)p_dm->adapter;
+	struct rtl_priv *rtlpriv = (struct rtl_priv *)dm->adapter;
 
 	return rtl_get_bbreg(rtlpriv->hw, reg_addr, bit_mask);
+#elif (DM_ODM_SUPPORT_TYPE & ODM_CE) && defined(DM_ODM_CE_MAC80211_V2)
+	struct rtw_dev *rtwdev = dm->adapter;
+
+	return rtw_get_reg_with_mask(rtwdev, reg_addr, bit_mask);
+#elif (DM_ODM_SUPPORT_TYPE & ODM_IOT)
+	return phy_query_bb_reg(dm->adapter, reg_addr, bit_mask);
 #else
-	return phy_query_bb_reg(p_dm->adapter, reg_addr, bit_mask);
+	return phy_query_bb_reg(dm->adapter, reg_addr, bit_mask);
 #endif
 }
 
-
-void
-odm_set_rf_reg(
-	struct PHY_DM_STRUCT			*p_dm,
-	u8			e_rf_path,
-	u32				reg_addr,
-	u32				bit_mask,
-	u32				data
-)
+void odm_set_rf_reg(struct dm_struct *dm, u8 e_rf_path, u32 reg_addr,
+		    u32 bit_mask, u32 data)
 {
 #if (DM_ODM_SUPPORT_TYPE & ODM_AP)
-	phy_set_rf_reg(p_dm->priv, e_rf_path, reg_addr, bit_mask, data);
+	phy_set_rf_reg(dm->priv, e_rf_path, reg_addr, bit_mask, data);
 #elif (DM_ODM_SUPPORT_TYPE & ODM_WIN)
-	struct _ADAPTER		*adapter = p_dm->adapter;
+	void *adapter = dm->adapter;
 	PHY_SetRFReg(adapter, e_rf_path, reg_addr, bit_mask, data);
 	ODM_delay_us(2);
 
 #elif (DM_ODM_SUPPORT_TYPE & ODM_CE) && defined(DM_ODM_CE_MAC80211)
-	struct rtl_priv *rtlpriv = (struct rtl_priv *)p_dm->adapter;
+	struct rtl_priv *rtlpriv = (struct rtl_priv *)dm->adapter;
 
 	rtl_set_rfreg(rtlpriv->hw, e_rf_path, reg_addr, bit_mask, data);
+#elif (DM_ODM_SUPPORT_TYPE & ODM_CE) && defined(DM_ODM_CE_MAC80211_V2)
+	struct rtw_dev *rtwdev = dm->adapter;
+
+	rtw_write_rf(rtwdev, e_rf_path, reg_addr, bit_mask, data);
 #elif (DM_ODM_SUPPORT_TYPE & ODM_CE)
-	phy_set_rf_reg(p_dm->adapter, e_rf_path, reg_addr, bit_mask, data);
+	phy_set_rf_reg(dm->adapter, e_rf_path, reg_addr, bit_mask, data);
+#elif (DM_ODM_SUPPORT_TYPE & ODM_IOT)
+	phy_set_rf_reg(dm->adapter, e_rf_path, reg_addr, bit_mask, data);
+	ODM_delay_us(2);
 #endif
 }
 
-u32
-odm_get_rf_reg(
-	struct PHY_DM_STRUCT			*p_dm,
-	u8			e_rf_path,
-	u32				reg_addr,
-	u32				bit_mask
-)
+u32 odm_get_rf_reg(struct dm_struct *dm, u8 e_rf_path, u32 reg_addr,
+		   u32 bit_mask)
 {
 #if (DM_ODM_SUPPORT_TYPE & (ODM_AP))
-	return phy_query_rf_reg(p_dm->priv, e_rf_path, reg_addr, bit_mask, 1);
+	return phy_query_rf_reg(dm->priv, e_rf_path, reg_addr, bit_mask, 1);
 #elif (DM_ODM_SUPPORT_TYPE & ODM_WIN)
-	struct _ADAPTER		*adapter = p_dm->adapter;
+	void *adapter = dm->adapter;
 	return PHY_QueryRFReg(adapter, e_rf_path, reg_addr, bit_mask);
 #elif (DM_ODM_SUPPORT_TYPE & ODM_CE) && defined(DM_ODM_CE_MAC80211)
-	struct rtl_priv *rtlpriv = (struct rtl_priv *)p_dm->adapter;
+	struct rtl_priv *rtlpriv = (struct rtl_priv *)dm->adapter;
 
 	return rtl_get_rfreg(rtlpriv->hw, e_rf_path, reg_addr, bit_mask);
+#elif (DM_ODM_SUPPORT_TYPE & ODM_CE) && defined(DM_ODM_CE_MAC80211_V2)
+	struct rtw_dev *rtwdev = dm->adapter;
+
+	return rtw_read_rf(rtwdev, e_rf_path, reg_addr, bit_mask);
+#elif (DM_ODM_SUPPORT_TYPE & ODM_IOT)
+	return phy_query_rf_reg(dm->adapter, e_rf_path, reg_addr, bit_mask);
 #else
-	return phy_query_rf_reg(p_dm->adapter, e_rf_path, reg_addr, bit_mask);
+	return phy_query_rf_reg(dm->adapter, e_rf_path, reg_addr, bit_mask);
 #endif
 }
 
 enum hal_status
-phydm_set_reg_by_fw(
-	struct PHY_DM_STRUCT			*p_dm,
-	enum phydm_halmac_param	config_type,
-	u32	offset,
-	u32	data,
-	u32	mask,
-	enum rf_path	e_rf_path,
-	u32 delay_time
-)
+phydm_set_reg_by_fw(struct dm_struct *dm, enum phydm_halmac_param config_type,
+		    u32 offset, u32 data, u32 mask, enum rf_path e_rf_path,
+		    u32 delay_time)
 {
 #if (DM_ODM_SUPPORT_TYPE & (ODM_WIN))
-	return HAL_MAC_Config_PHY_WriteNByte(p_dm,
-									config_type,
-									offset,
-									data,
-									mask,
-									e_rf_path,
-									delay_time);
+	return HAL_MAC_Config_PHY_WriteNByte(dm,
+					     config_type,
+					     offset,
+					     data,
+					     mask,
+					     e_rf_path,
+					     delay_time);
 #elif (DM_ODM_SUPPORT_TYPE & ODM_CE)
-	return rtw_phydm_cfg_phy_para(p_dm,
-							config_type,
-							offset,
-							data,
-							mask,
-							e_rf_path,
-							delay_time);
+#if (DM_ODM_SUPPORT_TYPE & ODM_CE) && defined(DM_ODM_CE_MAC80211)
+	PHYDM_DBG(dm, DBG_CMN, "Not support for CE MAC80211 driver!\n");
+#elif (DM_ODM_SUPPORT_TYPE & ODM_CE) && defined(DM_ODM_CE_MAC80211_V2)
+	return -ENOTSUPP;
+#else
+	return rtw_phydm_cfg_phy_para(dm,
+				      config_type,
+				      offset,
+				      data,
+				      mask,
+				      e_rf_path,
+				      delay_time);
+#endif
+#elif (DM_ODM_SUPPORT_TYPE & ODM_IOT)
+	PHYDM_DBG(dm, DBG_CMN, "Not support for CE MAC80211 driver!\n");
 #endif
-
 }
 
-
-/*
+/*@
  * ODM Memory relative API.
- *   */
-void
-odm_allocate_memory(
-	struct PHY_DM_STRUCT	*p_dm,
-	void **p_ptr,
-	u32		length
-)
+ */
+void odm_allocate_memory(struct dm_struct *dm, void **ptr, u32 length)
 {
 #if (DM_ODM_SUPPORT_TYPE & (ODM_AP))
-	*p_ptr = kmalloc(length, GFP_ATOMIC);
+	*ptr = kmalloc(length, GFP_ATOMIC);
 #elif (DM_ODM_SUPPORT_TYPE & ODM_CE) && defined(DM_ODM_CE_MAC80211)
-	*p_ptr = kmalloc(length, GFP_ATOMIC);
+	*ptr = kmalloc(length, GFP_ATOMIC);
+#elif (DM_ODM_SUPPORT_TYPE & ODM_CE) && defined(DM_ODM_CE_MAC80211_V2)
+	*ptr = kmalloc(length, GFP_ATOMIC);
 #elif (DM_ODM_SUPPORT_TYPE & ODM_CE)
-	*p_ptr = rtw_zvmalloc(length);
+	*ptr = rtw_zvmalloc(length);
 #elif (DM_ODM_SUPPORT_TYPE & ODM_WIN)
-	struct _ADAPTER		*adapter = p_dm->adapter;
-	PlatformAllocateMemory(adapter, p_ptr, length);
+	void *adapter = dm->adapter;
+	PlatformAllocateMemory(adapter, ptr, length);
+#elif (DM_ODM_SUPPORT_TYPE & ODM_IOT)
+	*ptr = rtw_zvmalloc(length);
 #endif
 }
 
-/* length could be ignored, used to detect memory leakage. */
-void
-odm_free_memory(
-	struct PHY_DM_STRUCT	*p_dm,
-	void		*p_ptr,
-	u32		length
-)
+/* @length could be ignored, used to detect memory leakage. */
+void odm_free_memory(struct dm_struct *dm, void *ptr, u32 length)
 {
 #if (DM_ODM_SUPPORT_TYPE & (ODM_AP))
-	kfree(p_ptr);
+	kfree(ptr);
 #elif (DM_ODM_SUPPORT_TYPE & ODM_CE) && defined(DM_ODM_CE_MAC80211)
-	kfree(p_ptr);
+	kfree(ptr);
+#elif (DM_ODM_SUPPORT_TYPE & ODM_CE) && defined(DM_ODM_CE_MAC80211_V2)
+	kfree(ptr);
 #elif (DM_ODM_SUPPORT_TYPE & ODM_CE)
-	rtw_vmfree(p_ptr, length);
+	rtw_vmfree(ptr, length);
 #elif (DM_ODM_SUPPORT_TYPE & ODM_WIN)
-	/* struct _ADAPTER*    adapter = p_dm->adapter; */
-	PlatformFreeMemory(p_ptr, length);
+	/* struct void*    adapter = dm->adapter; */
+	PlatformFreeMemory(ptr, length);
+#elif (DM_ODM_SUPPORT_TYPE & ODM_IOT)
+	rtw_vmfree(ptr, length);
 #endif
 }
 
-void
-odm_move_memory(
-	struct PHY_DM_STRUCT	*p_dm,
-	void		*p_dest,
-	void		*p_src,
-	u32		length
-)
+void odm_move_memory(struct dm_struct *dm, void *dest, void *src, u32 length)
 {
 #if (DM_ODM_SUPPORT_TYPE & ODM_AP)
-	memcpy(p_dest, p_src, length);
+	memcpy(dest, src, length);
 #elif (DM_ODM_SUPPORT_TYPE & ODM_CE) && defined(DM_ODM_CE_MAC80211)
-	memcpy(p_dest, p_src, length);
+	memcpy(dest, src, length);
+#elif (DM_ODM_SUPPORT_TYPE & ODM_CE) && defined(DM_ODM_CE_MAC80211_V2)
+	memcpy(dest, src, length);
 #elif (DM_ODM_SUPPORT_TYPE & ODM_CE)
-	_rtw_memcpy(p_dest, p_src, length);
+	_rtw_memcpy(dest, src, length);
 #elif (DM_ODM_SUPPORT_TYPE & ODM_WIN)
-	PlatformMoveMemory(p_dest, p_src, length);
+	PlatformMoveMemory(dest, src, length);
+#elif (DM_ODM_SUPPORT_TYPE & ODM_IOT)
+	rtw_memcpy(dest, src, length);
 #endif
 }
 
-void odm_memory_set(
-	struct PHY_DM_STRUCT	*p_dm,
-	void		*pbuf,
-	s8		value,
-	u32		length
-)
+void odm_memory_set(struct dm_struct *dm, void *pbuf, s8 value, u32 length)
 {
 #if (DM_ODM_SUPPORT_TYPE & ODM_AP)
 	memset(pbuf, value, length);
 #elif (DM_ODM_SUPPORT_TYPE & ODM_CE) && defined(DM_ODM_CE_MAC80211)
 	memset(pbuf, value, length);
+#elif (DM_ODM_SUPPORT_TYPE & ODM_CE) && defined(DM_ODM_CE_MAC80211_V2)
+	memset(pbuf, value, length);
 #elif (DM_ODM_SUPPORT_TYPE & ODM_CE)
 	_rtw_memset(pbuf, value, length);
 #elif (DM_ODM_SUPPORT_TYPE & ODM_WIN)
 	PlatformFillMemory(pbuf, length, value);
+#elif (DM_ODM_SUPPORT_TYPE & ODM_IOT)
+	rtw_memset(pbuf, value, length);
 #endif
 }
-s32 odm_compare_memory(
-	struct PHY_DM_STRUCT		*p_dm,
-	void           *p_buf1,
-	void           *p_buf2,
-	u32          length
-)
+
+s32 odm_compare_memory(struct dm_struct *dm, void *buf1, void *buf2, u32 length)
 {
 #if (DM_ODM_SUPPORT_TYPE & (ODM_AP))
-	return memcmp(p_buf1, p_buf2, length);
+	return memcmp(buf1, buf2, length);
 #elif (DM_ODM_SUPPORT_TYPE & ODM_CE) && defined(DM_ODM_CE_MAC80211)
-	return memcmp(p_buf1, p_buf2, length);
+	return memcmp(buf1, buf2, length);
+#elif (DM_ODM_SUPPORT_TYPE & ODM_CE) && defined(DM_ODM_CE_MAC80211_V2)
+	return memcmp(buf1, buf2, length);
 #elif (DM_ODM_SUPPORT_TYPE & ODM_CE)
-	return _rtw_memcmp(p_buf1, p_buf2, length);
+	return _rtw_memcmp(buf1, buf2, length);
 #elif (DM_ODM_SUPPORT_TYPE & ODM_WIN)
-	return PlatformCompareMemory(p_buf1, p_buf2, length);
+	return PlatformCompareMemory(buf1, buf2, length);
+#elif (DM_ODM_SUPPORT_TYPE & ODM_IOT)
+	return rtw_memcmp(buf1, buf2, length);
 #endif
 }
 
-
-
-/*
+/*@
  * ODM MISC relative API.
- *   */
-void
-odm_acquire_spin_lock(
-	struct PHY_DM_STRUCT			*p_dm,
-	enum rt_spinlock_type	type
-)
+ */
+void odm_acquire_spin_lock(struct dm_struct *dm, enum rt_spinlock_type type)
 {
 #if (DM_ODM_SUPPORT_TYPE & (ODM_AP))
 
 #elif (DM_ODM_SUPPORT_TYPE & ODM_CE) && defined(DM_ODM_CE_MAC80211)
+	struct rtl_priv *rtlpriv = (struct rtl_priv *)dm->adapter;
+
+	rtl_odm_acquirespinlock(rtlpriv, type);
+#elif (DM_ODM_SUPPORT_TYPE & ODM_CE) && defined(DM_ODM_CE_MAC80211_V2)
+	struct rtw_dev *rtwdev = dm->adapter;
+
+	spin_lock(&rtwdev->hal.dm_lock);
 #elif (DM_ODM_SUPPORT_TYPE & ODM_CE)
-	struct _ADAPTER *adapter = p_dm->adapter;
+	void *adapter = dm->adapter;
 	rtw_odm_acquirespinlock(adapter, type);
 #elif (DM_ODM_SUPPORT_TYPE & ODM_WIN)
-	struct _ADAPTER		*adapter = p_dm->adapter;
+	void *adapter = dm->adapter;
 	PlatformAcquireSpinLock(adapter, type);
+#elif (DM_ODM_SUPPORT_TYPE & ODM_IOT)
+	void *adapter = dm->adapter;
+
+	rtw_odm_acquirespinlock(adapter, type);
 #endif
 }
-void
-odm_release_spin_lock(
-	struct PHY_DM_STRUCT			*p_dm,
-	enum rt_spinlock_type	type
-)
+
+void odm_release_spin_lock(struct dm_struct *dm, enum rt_spinlock_type type)
 {
 #if (DM_ODM_SUPPORT_TYPE & (ODM_AP))
 
 #elif (DM_ODM_SUPPORT_TYPE & ODM_CE) && defined(DM_ODM_CE_MAC80211)
+	struct rtl_priv *rtlpriv = (struct rtl_priv *)dm->adapter;
+
+	rtl_odm_releasespinlock(rtlpriv, type);
+#elif (DM_ODM_SUPPORT_TYPE & ODM_CE) && defined(DM_ODM_CE_MAC80211_V2)
+	struct rtw_dev *rtwdev = dm->adapter;
+
+	spin_unlock(&rtwdev->hal.dm_lock);
 #elif (DM_ODM_SUPPORT_TYPE & ODM_CE)
-	struct _ADAPTER *adapter = p_dm->adapter;
+	void *adapter = dm->adapter;
 	rtw_odm_releasespinlock(adapter, type);
 #elif (DM_ODM_SUPPORT_TYPE & ODM_WIN)
-	struct _ADAPTER		*adapter = p_dm->adapter;
+	void *adapter = dm->adapter;
 	PlatformReleaseSpinLock(adapter, type);
+#elif (DM_ODM_SUPPORT_TYPE & ODM_IOT)
+	void *adapter = dm->adapter;
+
+	rtw_odm_releasespinlock(adapter, type);
 #endif
 }
 
 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
-/*
+/*@
  * Work item relative API. FOr MP driver only~!
  *   */
-void
-odm_initialize_work_item(
-	struct PHY_DM_STRUCT					*p_dm,
-	PRT_WORK_ITEM				p_rt_work_item,
-	RT_WORKITEM_CALL_BACK		rt_work_item_callback,
-	void						*p_context,
-	const char					*sz_id
-)
+void odm_initialize_work_item(
+	struct dm_struct *dm,
+	PRT_WORK_ITEM work_item,
+	RT_WORKITEM_CALL_BACK callback,
+	void *context,
+	const char *id)
 {
 #if (DM_ODM_SUPPORT_TYPE & (ODM_AP))
 
 #elif (DM_ODM_SUPPORT_TYPE & ODM_CE)
 
 #elif (DM_ODM_SUPPORT_TYPE & ODM_WIN)
-	struct _ADAPTER		*adapter = p_dm->adapter;
-	PlatformInitializeWorkItem(adapter, p_rt_work_item, rt_work_item_callback, p_context, sz_id);
+	void *adapter = dm->adapter;
+	PlatformInitializeWorkItem(adapter, work_item, callback, context, id);
 #endif
 }
 
-
-void
-odm_start_work_item(
-	PRT_WORK_ITEM	p_rt_work_item
-)
+void odm_start_work_item(
+	PRT_WORK_ITEM p_rt_work_item)
 {
 #if (DM_ODM_SUPPORT_TYPE & (ODM_AP))
 
@@ -513,11 +535,8 @@ odm_start_work_item(
 #endif
 }
 
-
-void
-odm_stop_work_item(
-	PRT_WORK_ITEM	p_rt_work_item
-)
+void odm_stop_work_item(
+	PRT_WORK_ITEM p_rt_work_item)
 {
 #if (DM_ODM_SUPPORT_TYPE & (ODM_AP))
 
@@ -528,11 +547,8 @@ odm_stop_work_item(
 #endif
 }
 
-
-void
-odm_free_work_item(
-	PRT_WORK_ITEM	p_rt_work_item
-)
+void odm_free_work_item(
+	PRT_WORK_ITEM p_rt_work_item)
 {
 #if (DM_ODM_SUPPORT_TYPE & (ODM_AP))
 
@@ -543,11 +559,8 @@ odm_free_work_item(
 #endif
 }
 
-
-void
-odm_schedule_work_item(
-	PRT_WORK_ITEM	p_rt_work_item
-)
+void odm_schedule_work_item(
+	PRT_WORK_ITEM p_rt_work_item)
 {
 #if (DM_ODM_SUPPORT_TYPE & (ODM_AP))
 
@@ -558,11 +571,9 @@ odm_schedule_work_item(
 #endif
 }
 
-
 boolean
 odm_is_work_item_scheduled(
-	PRT_WORK_ITEM	p_rt_work_item
-)
+	PRT_WORK_ITEM p_rt_work_item)
 {
 #if (DM_ODM_SUPPORT_TYPE & (ODM_AP))
 
@@ -574,142 +585,144 @@ odm_is_work_item_scheduled(
 }
 #endif
 
-
-/*
+/*@
  * ODM Timer relative API.
- *   */
+ */
 
-void
-ODM_delay_ms(u32	ms)
+void ODM_delay_ms(u32 ms)
 {
 #if (DM_ODM_SUPPORT_TYPE & (ODM_AP))
 	delay_ms(ms);
 #elif (DM_ODM_SUPPORT_TYPE & ODM_CE) && defined(DM_ODM_CE_MAC80211)
 	mdelay(ms);
+#elif (DM_ODM_SUPPORT_TYPE & ODM_CE) && defined(DM_ODM_CE_MAC80211_V2)
+	mdelay(ms);
 #elif (DM_ODM_SUPPORT_TYPE & ODM_CE)
 	rtw_mdelay_os(ms);
 #elif (DM_ODM_SUPPORT_TYPE & ODM_WIN)
 	delay_ms(ms);
+#elif (DM_ODM_SUPPORT_TYPE & ODM_IOT)
+	rtw_mdelay_os(ms);
 #endif
 }
 
-void
-ODM_delay_us(u32	us)
+void ODM_delay_us(u32 us)
 {
 #if (DM_ODM_SUPPORT_TYPE & (ODM_AP))
 	delay_us(us);
 #elif (DM_ODM_SUPPORT_TYPE & ODM_CE) && defined(DM_ODM_CE_MAC80211)
 	udelay(us);
+#elif (DM_ODM_SUPPORT_TYPE & ODM_CE) && defined(DM_ODM_CE_MAC80211_V2)
+	udelay(us);
 #elif (DM_ODM_SUPPORT_TYPE & ODM_CE)
 	rtw_udelay_os(us);
 #elif (DM_ODM_SUPPORT_TYPE & ODM_WIN)
 	PlatformStallExecution(us);
+#elif (DM_ODM_SUPPORT_TYPE & ODM_IOT)
+	rtw_udelay_os(us);
 #endif
 }
 
-void
-ODM_sleep_ms(u32	ms)
+void ODM_sleep_ms(u32 ms)
 {
 #if (DM_ODM_SUPPORT_TYPE & (ODM_AP))
 	delay_ms(ms);
 #elif (DM_ODM_SUPPORT_TYPE & ODM_CE) && defined(DM_ODM_CE_MAC80211)
 	msleep(ms);
+#elif (DM_ODM_SUPPORT_TYPE & ODM_CE) && defined(DM_ODM_CE_MAC80211_V2)
+	msleep(ms);
 #elif (DM_ODM_SUPPORT_TYPE & ODM_CE)
 	rtw_msleep_os(ms);
 #elif (DM_ODM_SUPPORT_TYPE & ODM_WIN)
 	delay_ms(ms);
+#elif (DM_ODM_SUPPORT_TYPE & ODM_IOT)
+	rtw_msleep_os(ms);
 #endif
 }
 
-void
-ODM_sleep_us(u32	us)
+void ODM_sleep_us(u32 us)
 {
 #if (DM_ODM_SUPPORT_TYPE & (ODM_AP))
 	delay_us(us);
 #elif (DM_ODM_SUPPORT_TYPE & ODM_CE) && defined(DM_ODM_CE_MAC80211)
 	usleep_range(us, us + 1);
+#elif (DM_ODM_SUPPORT_TYPE & ODM_CE) && defined(DM_ODM_CE_MAC80211_V2)
+	usleep_range(us, us + 1);
 #elif (DM_ODM_SUPPORT_TYPE & ODM_CE)
 	rtw_usleep_os(us);
 #elif (DM_ODM_SUPPORT_TYPE & ODM_WIN)
 	PlatformStallExecution(us);
+#elif (DM_ODM_SUPPORT_TYPE & ODM_IOT)
+	rtw_usleep_os(us);
 #endif
 }
 
-void
-odm_set_timer(
-	struct PHY_DM_STRUCT		*p_dm,
-	struct timer_list		*p_timer,
-	u32			ms_delay
-)
+void odm_set_timer(struct dm_struct *dm, struct phydm_timer_list *timer,
+		   u32 ms_delay)
 {
 #if (DM_ODM_SUPPORT_TYPE & ODM_AP)
-	mod_timer(p_timer, jiffies + RTL_MILISECONDS_TO_JIFFIES(ms_delay));
+	mod_timer(timer, jiffies + RTL_MILISECONDS_TO_JIFFIES(ms_delay));
 #elif (DM_ODM_SUPPORT_TYPE & ODM_CE) && defined(DM_ODM_CE_MAC80211)
-	mod_timer(p_timer, jiffies + msecs_to_jiffies(ms_delay));
+	mod_timer(timer, jiffies + msecs_to_jiffies(ms_delay));
+#elif (DM_ODM_SUPPORT_TYPE & ODM_CE) && defined(DM_ODM_CE_MAC80211_V2)
+	mod_timer(&timer->timer, jiffies + msecs_to_jiffies(ms_delay));
 #elif (DM_ODM_SUPPORT_TYPE & ODM_CE)
-	_set_timer(p_timer, ms_delay); /* ms */
+	_set_timer(timer, ms_delay); /* @ms */
 #elif (DM_ODM_SUPPORT_TYPE & ODM_WIN)
-	struct _ADAPTER		*adapter = p_dm->adapter;
-	PlatformSetTimer(adapter, p_timer, ms_delay);
+	void *adapter = dm->adapter;
+	PlatformSetTimer(adapter, timer, ms_delay);
+#elif (DM_ODM_SUPPORT_TYPE & ODM_IOT)
+	rtw_set_timer(timer, ms_delay); /* @ms */
 #endif
-
 }
 
-void
-odm_initialize_timer(
-	struct PHY_DM_STRUCT			*p_dm,
-	struct timer_list			*p_timer,
-	void	*call_back_func,
-	void				*p_context,
-	const char			*sz_id
-)
+void odm_initialize_timer(struct dm_struct *dm, struct phydm_timer_list *timer,
+			  void *call_back_func, void *context,
+			  const char *sz_id)
 {
 #if (DM_ODM_SUPPORT_TYPE & ODM_AP)
-	init_timer(p_timer);
-	p_timer->function = call_back_func;
-	p_timer->data = (unsigned long)p_dm;
-	/*mod_timer(p_timer, jiffies+RTL_MILISECONDS_TO_JIFFIES(10));	*/
+	init_timer(timer);
+	timer->function = call_back_func;
+	timer->data = (unsigned long)dm;
+#if 0
+	/*@mod_timer(timer, jiffies+RTL_MILISECONDS_TO_JIFFIES(10));	*/
+#endif
 #elif (DM_ODM_SUPPORT_TYPE & ODM_CE) && defined(DM_ODM_CE_MAC80211)
-	init_timer(p_timer);
-	p_timer->function = call_back_func;
-	p_timer->data = (unsigned long)p_dm;
-	/*mod_timer(p_timer, jiffies+RTL_MILISECONDS_TO_JIFFIES(10));	*/
+	timer_setup(timer, call_back_func, 0);
 #elif (DM_ODM_SUPPORT_TYPE & ODM_CE)
-	struct _ADAPTER *adapter = p_dm->adapter;
+	struct _ADAPTER *adapter = dm->adapter;
 
-	_init_timer(p_timer, adapter->pnetdev, call_back_func, p_dm);
+	_init_timer(timer, adapter->pnetdev, call_back_func, dm);
 #elif (DM_ODM_SUPPORT_TYPE & ODM_WIN)
-	struct _ADAPTER *adapter = p_dm->adapter;
+	void *adapter = dm->adapter;
 
-	PlatformInitializeTimer(adapter, p_timer, (RT_TIMER_CALL_BACK)call_back_func, p_context, sz_id);
+	PlatformInitializeTimer(adapter, timer, (RT_TIMER_CALL_BACK)call_back_func, context, sz_id);
+#elif (DM_ODM_SUPPORT_TYPE & ODM_IOT)
+	struct _ADAPTER *adapter = dm->adapter;
+
+	rtw_init_timer(timer, adapter->pnetdev, (TIMER_FUN)call_back_func, dm, NULL);
 #endif
 }
 
-
-void
-odm_cancel_timer(
-	struct PHY_DM_STRUCT		*p_dm,
-	struct timer_list		*p_timer
-)
+void odm_cancel_timer(struct dm_struct *dm, struct phydm_timer_list *timer)
 {
 #if (DM_ODM_SUPPORT_TYPE & ODM_AP)
-	del_timer(p_timer);
+	del_timer(timer);
 #elif (DM_ODM_SUPPORT_TYPE & ODM_CE) && defined(DM_ODM_CE_MAC80211)
-	del_timer(p_timer);
+	del_timer(timer);
+#elif (DM_ODM_SUPPORT_TYPE & ODM_CE) && defined(DM_ODM_CE_MAC80211_V2)
+	del_timer(&timer->timer);
 #elif (DM_ODM_SUPPORT_TYPE & ODM_CE)
-	_cancel_timer_ex(p_timer);
+	_cancel_timer_ex(timer);
 #elif (DM_ODM_SUPPORT_TYPE & ODM_WIN)
-	struct _ADAPTER *adapter = p_dm->adapter;
-	PlatformCancelTimer(adapter, p_timer);
+	void *adapter = dm->adapter;
+	PlatformCancelTimer(adapter, timer);
+#elif (DM_ODM_SUPPORT_TYPE & ODM_IOT)
+	rtw_cancel_timer(timer);
 #endif
 }
 
-
-void
-odm_release_timer(
-	struct PHY_DM_STRUCT		*p_dm,
-	struct timer_list		*p_timer
-)
+void odm_release_timer(struct dm_struct *dm, struct phydm_timer_list *timer)
 {
 #if (DM_ODM_SUPPORT_TYPE & (ODM_AP))
 
@@ -717,61 +730,64 @@ odm_release_timer(
 
 #elif (DM_ODM_SUPPORT_TYPE & ODM_WIN)
 
-	struct _ADAPTER *adapter = p_dm->adapter;
+	void *adapter = dm->adapter;
 
-	/* <20120301, Kordan> If the initilization fails, InitializeAdapterXxx will return regardless of InitHalDm.
-	 * Hence, uninitialized timers cause BSOD when the driver releases resources since the init fail. */
-	if (p_timer == 0) {
-		PHYDM_DBG(p_dm, ODM_COMP_INIT, ("=====>odm_release_timer(), The timer is NULL! Please check it!\n"));
+	/* @<20120301, Kordan> If the initilization fails,
+	 * InitializeAdapterXxx will return regardless of InitHalDm.
+	 * Hence, uninitialized timers cause BSOD when the driver
+	 * releases resources since the init fail.
+	 */
+	if (timer == 0) {
+		PHYDM_DBG(dm, ODM_COMP_INIT,
+			  "[%s] Timer is NULL! Please check!\n", __func__);
 		return;
 	}
 
-	PlatformReleaseTimer(adapter, p_timer);
+	PlatformReleaseTimer(adapter, timer);
+#elif (DM_ODM_SUPPORT_TYPE & ODM_IOT)
+	rtw_del_timer(timer);
 #endif
 }
 
-
-u8
-phydm_trans_h2c_id(
-	struct PHY_DM_STRUCT	*p_dm,
-	u8		phydm_h2c_id
-)
+u8 phydm_trans_h2c_id(struct dm_struct *dm, u8 phydm_h2c_id)
 {
 	u8 platform_h2c_id = phydm_h2c_id;
 
 	switch (phydm_h2c_id) {
-	/* 1 [0] */
+	/* @1 [0] */
 	case ODM_H2C_RSSI_REPORT:
 
 #if (DM_ODM_SUPPORT_TYPE & ODM_WIN)
-		if (p_dm->support_ic_type == ODM_RTL8188E)
+		#if (RTL8188E_SUPPORT == 1)
+		if (dm->support_ic_type == ODM_RTL8188E)
 			platform_h2c_id = H2C_88E_RSSI_REPORT;
-		else if (p_dm->support_ic_type == ODM_RTL8814A)
-			platform_h2c_id = H2C_8814A_RSSI_REPORT;
 		else
+		#endif
 			platform_h2c_id = H2C_RSSI_REPORT;
 
 #elif (DM_ODM_SUPPORT_TYPE & ODM_CE) && defined(DM_ODM_CE_MAC80211)
+#elif (DM_ODM_SUPPORT_TYPE & ODM_CE) && defined(DM_ODM_CE_MAC80211_V2)
 #elif (DM_ODM_SUPPORT_TYPE & ODM_CE)
 		platform_h2c_id = H2C_RSSI_SETTING;
 
 #elif (DM_ODM_SUPPORT_TYPE & ODM_AP)
-#if ((RTL8881A_SUPPORT == 1) || (RTL8192E_SUPPORT == 1) || (RTL8814A_SUPPORT == 1) || (RTL8822B_SUPPORT == 1) || (RTL8197F_SUPPORT == 1))
-		if (p_dm->support_ic_type == ODM_RTL8881A || p_dm->support_ic_type == ODM_RTL8192E || p_dm->support_ic_type & PHYDM_IC_3081_SERIES)
+#if ((RTL8881A_SUPPORT == 1) || (RTL8192E_SUPPORT == 1) || (RTL8814A_SUPPORT == 1) || (RTL8822B_SUPPORT == 1) || (RTL8197F_SUPPORT == 1) || (RTL8192F_SUPPORT == 1)) /*@jj add 20170822*/
+		if (dm->support_ic_type == ODM_RTL8881A || dm->support_ic_type == ODM_RTL8192E || dm->support_ic_type & PHYDM_IC_3081_SERIES)
 			platform_h2c_id = H2C_88XX_RSSI_REPORT;
 		else
 #endif
 #if (RTL8812A_SUPPORT == 1)
-			if (p_dm->support_ic_type == ODM_RTL8812)
-				platform_h2c_id = H2C_8812_RSSI_REPORT;
-			else
+			if (dm->support_ic_type == ODM_RTL8812)
+			platform_h2c_id = H2C_8812_RSSI_REPORT;
+		else
 #endif
-			{}
+		{
+		}
 #endif
 
 		break;
 
-	/* 1 [3] */
+	/* @1 [3] */
 	case ODM_H2C_WIFI_CALIBRATION:
 #if (DM_ODM_SUPPORT_TYPE & ODM_WIN)
 		platform_h2c_id = H2C_WIFI_CALIBRATION;
@@ -785,8 +801,7 @@ phydm_trans_h2c_id(
 #endif
 		break;
 
-
-	/* 1 [4] */
+	/* @1 [4] */
 	case ODM_H2C_IQ_CALIBRATION:
 #if (DM_ODM_SUPPORT_TYPE & ODM_WIN)
 		platform_h2c_id = H2C_IQ_CALIBRATION;
@@ -799,15 +814,13 @@ phydm_trans_h2c_id(
 #endif
 
 		break;
-	/* 1 [5] */
+	/* @1 [5] */
 	case ODM_H2C_RA_PARA_ADJUST:
 
 #if (DM_ODM_SUPPORT_TYPE & ODM_WIN)
-		if (p_dm->support_ic_type & (ODM_RTL8814A | ODM_RTL8822B))
-			platform_h2c_id = H2C_8814A_RA_PARA_ADJUST;
-		else
-			platform_h2c_id = H2C_RA_PARA_ADJUST;
+		platform_h2c_id = H2C_RA_PARA_ADJUST;
 #elif (DM_ODM_SUPPORT_TYPE & ODM_CE) && defined(DM_ODM_CE_MAC80211)
+#elif (DM_ODM_SUPPORT_TYPE & ODM_CE) && defined(DM_ODM_CE_MAC80211_V2)
 #elif (DM_ODM_SUPPORT_TYPE & ODM_CE)
 #if ((RTL8812A_SUPPORT == 1) || (RTL8821A_SUPPORT == 1))
 		platform_h2c_id = H2C_8812_RA_PARA_ADJUST;
@@ -820,36 +833,38 @@ phydm_trans_h2c_id(
 #endif
 
 #elif (DM_ODM_SUPPORT_TYPE & ODM_AP)
-#if ((RTL8881A_SUPPORT == 1) || (RTL8192E_SUPPORT == 1) || (RTL8814A_SUPPORT == 1) || (RTL8822B_SUPPORT == 1) || (RTL8197F_SUPPORT == 1))
-		if (p_dm->support_ic_type == ODM_RTL8881A || p_dm->support_ic_type == ODM_RTL8192E || p_dm->support_ic_type & PHYDM_IC_3081_SERIES)
+#if ((RTL8881A_SUPPORT == 1) || (RTL8192E_SUPPORT == 1) || (RTL8814A_SUPPORT == 1) || (RTL8822B_SUPPORT == 1) || (RTL8197F_SUPPORT == 1) || (RTL8192F_SUPPORT == 1)) /*@jj add 20170822*/
+		if (dm->support_ic_type == ODM_RTL8881A || dm->support_ic_type == ODM_RTL8192E || dm->support_ic_type & PHYDM_IC_3081_SERIES)
 			platform_h2c_id = H2C_88XX_RA_PARA_ADJUST;
 		else
 #endif
 #if (RTL8812A_SUPPORT == 1)
-			if (p_dm->support_ic_type == ODM_RTL8812)
-				platform_h2c_id = H2C_8812_RA_PARA_ADJUST;
-			else
+			if (dm->support_ic_type == ODM_RTL8812)
+			platform_h2c_id = H2C_8812_RA_PARA_ADJUST;
+		else
 #endif
-			{}
+		{
+		}
 #endif
 
 		break;
 
-
-	/* 1 [6] */
+	/* @1 [6] */
 	case PHYDM_H2C_DYNAMIC_TX_PATH:
 
 #if (DM_ODM_SUPPORT_TYPE & ODM_WIN)
-		if (p_dm->support_ic_type == ODM_RTL8814A)
+	#if (RTL8814A_SUPPORT == 1)
+		if (dm->support_ic_type == ODM_RTL8814A)
 			platform_h2c_id = H2C_8814A_DYNAMIC_TX_PATH;
+	#endif
 #elif (DM_ODM_SUPPORT_TYPE & ODM_CE)
 #if (RTL8814A_SUPPORT == 1)
-		if (p_dm->support_ic_type == ODM_RTL8814A)
+		if (dm->support_ic_type == ODM_RTL8814A)
 			platform_h2c_id = H2C_DYNAMIC_TX_PATH;
 #endif
 #elif (DM_ODM_SUPPORT_TYPE & ODM_AP)
 #if (RTL8814A_SUPPORT == 1)
-		if (p_dm->support_ic_type == ODM_RTL8814A)
+		if (dm->support_ic_type == ODM_RTL8814A)
 			platform_h2c_id = H2C_88XX_DYNAMIC_TX_PATH;
 #endif
 
@@ -857,31 +872,30 @@ phydm_trans_h2c_id(
 
 		break;
 
-	/* [7]*/
+	/* @[7]*/
 	case PHYDM_H2C_FW_TRACE_EN:
 
 #if (DM_ODM_SUPPORT_TYPE & ODM_WIN)
-		if (p_dm->support_ic_type & (ODM_RTL8814A | ODM_RTL8822B))
-			platform_h2c_id = H2C_8814A_FW_TRACE_EN;
-		else
-			platform_h2c_id = H2C_FW_TRACE_EN;
+
+		platform_h2c_id = H2C_FW_TRACE_EN;
 
 #elif (DM_ODM_SUPPORT_TYPE & ODM_CE)
 
 		platform_h2c_id = 0x49;
 
 #elif (DM_ODM_SUPPORT_TYPE & ODM_AP)
-#if ((RTL8881A_SUPPORT == 1) || (RTL8192E_SUPPORT == 1) || (RTL8814A_SUPPORT == 1) || (RTL8822B_SUPPORT == 1) || (RTL8197F_SUPPORT == 1))
-		if (p_dm->support_ic_type == ODM_RTL8881A || p_dm->support_ic_type == ODM_RTL8192E || p_dm->support_ic_type & PHYDM_IC_3081_SERIES)
-			platform_h2c_id  = H2C_88XX_FW_TRACE_EN;
+#if ((RTL8881A_SUPPORT == 1) || (RTL8192E_SUPPORT == 1) || (RTL8814A_SUPPORT == 1) || (RTL8822B_SUPPORT == 1) || (RTL8197F_SUPPORT == 1) || (RTL8192F_SUPPORT == 1)) /*@jj add 20170822*/
+		if (dm->support_ic_type == ODM_RTL8881A || dm->support_ic_type == ODM_RTL8192E || dm->support_ic_type & PHYDM_IC_3081_SERIES)
+			platform_h2c_id = H2C_88XX_FW_TRACE_EN;
 		else
 #endif
 #if (RTL8812A_SUPPORT == 1)
-			if (p_dm->support_ic_type == ODM_RTL8812)
-				platform_h2c_id = H2C_8812_FW_TRACE_EN;
-			else
+		if (dm->support_ic_type == ODM_RTL8812)
+			platform_h2c_id = H2C_8812_FW_TRACE_EN;
+		else
 #endif
-			{}
+		{
+		}
 
 #endif
 
@@ -889,13 +903,13 @@ phydm_trans_h2c_id(
 
 	case PHYDM_H2C_TXBF:
 #if ((RTL8192E_SUPPORT == 1) || (RTL8812A_SUPPORT == 1))
-		platform_h2c_id  = 0x41;	/*H2C_TxBF*/
+		platform_h2c_id = 0x41; /*@H2C_TxBF*/
 #endif
 		break;
 
 	case PHYDM_H2C_MU:
 #if (RTL8822B_SUPPORT == 1)
-		platform_h2c_id  = 0x4a;	/*H2C_MU*/
+		platform_h2c_id = 0x4a; /*@H2C_MU*/
 #endif
 		break;
 
@@ -905,128 +919,133 @@ phydm_trans_h2c_id(
 	}
 
 	return platform_h2c_id;
-
 }
 
-/*ODM FW relative API.*/
+/*@ODM FW relative API.*/
 
-void
-odm_fill_h2c_cmd(
-	struct PHY_DM_STRUCT		*p_dm,
-	u8			phydm_h2c_id,
-	u32			cmd_len,
-	u8			*p_cmd_buffer
-)
+void odm_fill_h2c_cmd(struct dm_struct *dm, u8 phydm_h2c_id, u32 cmd_len,
+		      u8 *cmd_buf)
 {
 #if (DM_ODM_SUPPORT_TYPE & ODM_CE) && defined(DM_ODM_CE_MAC80211)
-	struct rtl_priv *rtlpriv = (struct rtl_priv *)p_dm->adapter;
+	struct rtl_priv *rtlpriv = (struct rtl_priv *)dm->adapter;
+#elif (DM_ODM_SUPPORT_TYPE & ODM_CE) && defined(DM_ODM_CE_MAC80211_V2)
+	struct rtw_dev *rtwdev = dm->adapter;
+	u8 cmd_id, cmd_class;
+	u8 h2c_pkt[8];
 #else
-	struct _ADAPTER	*adapter = p_dm->adapter;
+	void *adapter = dm->adapter;
 #endif
-	u8		h2c_id = phydm_trans_h2c_id(p_dm, phydm_h2c_id);
+	u8 h2c_id = phydm_trans_h2c_id(dm, phydm_h2c_id);
 
-	PHYDM_DBG(p_dm, DBG_RA, ("[H2C]  h2c_id=((0x%x))\n", h2c_id));
+	PHYDM_DBG(dm, DBG_RA, "[H2C]  h2c_id=((0x%x))\n", h2c_id);
 
 #if (DM_ODM_SUPPORT_TYPE & ODM_WIN)
-	if (p_dm->support_ic_type == ODM_RTL8188E)	{
-		if (!p_dm->ra_support88e)
-			FillH2CCmd88E(adapter, h2c_id, cmd_len, p_cmd_buffer);
-	} else if (p_dm->support_ic_type == ODM_RTL8814A)
-		FillH2CCmd8814A(adapter, h2c_id, cmd_len, p_cmd_buffer);
-	else if (p_dm->support_ic_type == ODM_RTL8822B)
-		FillH2CCmd8822B(adapter, h2c_id, cmd_len, p_cmd_buffer);
+	if (dm->support_ic_type == ODM_RTL8188E) {
+		if (!dm->ra_support88e)
+			FillH2CCmd88E(adapter, h2c_id, cmd_len, cmd_buf);
+	} else if (dm->support_ic_type == ODM_RTL8814A)
+		FillH2CCmd8814A(adapter, h2c_id, cmd_len, cmd_buf);
+	else if (dm->support_ic_type == ODM_RTL8822B)
+		FillH2CCmd8822B(adapter, h2c_id, cmd_len, cmd_buf);
 	else
-		FillH2CCmd(adapter, h2c_id, cmd_len, p_cmd_buffer);
+		FillH2CCmd(adapter, h2c_id, cmd_len, cmd_buf);
 
 #elif (DM_ODM_SUPPORT_TYPE & ODM_CE)
 
 	#ifdef DM_ODM_CE_MAC80211
-	rtlpriv->cfg->ops->fill_h2c_cmd(rtlpriv->hw, h2c_id,cmd_len, p_cmd_buffer);
+	rtlpriv->cfg->ops->fill_h2c_cmd(rtlpriv->hw, h2c_id, cmd_len, cmd_buf);
+	#elif defined(DM_ODM_CE_MAC80211_V2)
+	cmd_id = phydm_h2c_id & 0x1f;
+	cmd_class = (phydm_h2c_id >> RTW_H2C_CLASS_OFFSET) & 0x7;
+	memcpy(h2c_pkt + 1, cmd_buf, 7);
+	h2c_pkt[0] = phydm_h2c_id;
+	rtw_fw_send_h2c_packet(rtwdev, h2c_pkt, cmd_id, cmd_class);
+	/* TODO: implement fill h2c command for rtwlan */
 	#else
-	rtw_hal_fill_h2c_cmd(adapter, h2c_id, cmd_len, p_cmd_buffer);
+	rtw_hal_fill_h2c_cmd(adapter, h2c_id, cmd_len, cmd_buf);
 	#endif
 
 #elif (DM_ODM_SUPPORT_TYPE & ODM_AP)
 
 	#if (RTL8812A_SUPPORT == 1)
-	if (p_dm->support_ic_type == ODM_RTL8812) {
-		fill_h2c_cmd8812(p_dm->priv, h2c_id, cmd_len, p_cmd_buffer);
+	if (dm->support_ic_type == ODM_RTL8812) {
+		fill_h2c_cmd8812(dm->priv, h2c_id, cmd_len, cmd_buf);
 	} else
 	#endif
 	{
-		GET_HAL_INTERFACE(p_dm->priv)->fill_h2c_cmd_handler(p_dm->priv, h2c_id, cmd_len, p_cmd_buffer);
+		GET_HAL_INTERFACE(dm->priv)->fill_h2c_cmd_handler(dm->priv, h2c_id, cmd_len, cmd_buf);
 	}
+
+#elif (DM_ODM_SUPPORT_TYPE & ODM_IOT)
+	rtw_hal_fill_h2c_cmd(adapter, h2c_id, cmd_len, cmd_buf);
+
 #endif
 }
 
-u8
-phydm_c2H_content_parsing(
-	void			*p_dm_void,
-	u8			c2h_cmd_id,
-	u8			c2h_cmd_len,
-	u8			*tmp_buf
-)
+u8 phydm_c2H_content_parsing(void *dm_void, u8 c2h_cmd_id, u8 c2h_cmd_len,
+			     u8 *tmp_buf)
 {
-	struct PHY_DM_STRUCT		*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
-	struct _ADAPTER	*adapter = p_dm->adapter;
-#endif
-	u8	extend_c2h_sub_id = 0;
-	u8	find_c2h_cmd = true;
-	
-	if ((c2h_cmd_len > 12) || (c2h_cmd_len == 0)) {
-		dbg_print("[Warning] Error C2H ID=%d, len=%d\n", c2h_cmd_id, c2h_cmd_len);
-		
+	void *adapter = dm->adapter;
+#endif
+	u8 extend_c2h_sub_id = 0;
+	u8 find_c2h_cmd = true;
+
+	if (c2h_cmd_len > 12 || c2h_cmd_len == 0) {
+		pr_debug("[Warning] Error C2H ID=%d, len=%d\n",
+			 c2h_cmd_id, c2h_cmd_len);
+
 		find_c2h_cmd = false;
 		return find_c2h_cmd;
 	}
-	
+
 	switch (c2h_cmd_id) {
 	case PHYDM_C2H_DBG:
-		phydm_fw_trace_handler(p_dm, tmp_buf, c2h_cmd_len);
+		phydm_fw_trace_handler(dm, tmp_buf, c2h_cmd_len);
 		break;
 
 	case PHYDM_C2H_RA_RPT:
-		phydm_c2h_ra_report_handler(p_dm, tmp_buf, c2h_cmd_len);
+		phydm_c2h_ra_report_handler(dm, tmp_buf, c2h_cmd_len);
 		break;
 
 	case PHYDM_C2H_RA_PARA_RPT:
-		odm_c2h_ra_para_report_handler(p_dm, tmp_buf, c2h_cmd_len);
+		odm_c2h_ra_para_report_handler(dm, tmp_buf, c2h_cmd_len);
 		break;
-
+#ifdef CONFIG_PATH_DIVERSITY
 	case PHYDM_C2H_DYNAMIC_TX_PATH_RPT:
-		if (p_dm->support_ic_type & (ODM_RTL8814A))
-			phydm_c2h_dtp_handler(p_dm, tmp_buf, c2h_cmd_len);
+		if (dm->support_ic_type & (ODM_RTL8814A))
+			phydm_c2h_dtp_handler(dm, tmp_buf, c2h_cmd_len);
 		break;
+#endif
 
 	case PHYDM_C2H_IQK_FINISH:
 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
 
-		if (p_dm->support_ic_type & (ODM_RTL8812 | ODM_RTL8821)) {
-
+		if (dm->support_ic_type & (ODM_RTL8812 | ODM_RTL8821)) {
 			RT_TRACE(COMP_MP, DBG_LOUD, ("== FW IQK Finish ==\n"));
-			odm_acquire_spin_lock(p_dm, RT_IQK_SPINLOCK);
-			p_dm->rf_calibrate_info.is_iqk_in_progress = false;
-			odm_release_spin_lock(p_dm, RT_IQK_SPINLOCK);
-			p_dm->rf_calibrate_info.iqk_progressing_time = 0;
-			p_dm->rf_calibrate_info.iqk_progressing_time = odm_get_progressing_time(p_dm, p_dm->rf_calibrate_info.iqk_start_time);
+			odm_acquire_spin_lock(dm, RT_IQK_SPINLOCK);
+			dm->rf_calibrate_info.is_iqk_in_progress = false;
+			odm_release_spin_lock(dm, RT_IQK_SPINLOCK);
+			dm->rf_calibrate_info.iqk_progressing_time = 0;
+			dm->rf_calibrate_info.iqk_progressing_time = odm_get_progressing_time(dm, dm->rf_calibrate_info.iqk_start_time);
 		}
 
 #endif
 		break;
 
 	case PHYDM_C2H_CLM_MONITOR:
-		phydm_c2h_clm_report_handler(p_dm, tmp_buf, c2h_cmd_len);
+		phydm_clm_c2h_report_handler(dm, tmp_buf, c2h_cmd_len);
 		break;
 
 	case PHYDM_C2H_DBG_CODE:
-		phydm_fw_trace_handler_code(p_dm, tmp_buf, c2h_cmd_len);
+		phydm_fw_trace_handler_code(dm, tmp_buf, c2h_cmd_len);
 		break;
 
 	case PHYDM_C2H_EXTEND:
 		extend_c2h_sub_id = tmp_buf[0];
 		if (extend_c2h_sub_id == PHYDM_EXTEND_C2H_DBG_PRINT)
-			phydm_fw_trace_handler_8051(p_dm, tmp_buf, c2h_cmd_len);
+			phydm_fw_trace_handler_8051(dm, tmp_buf, c2h_cmd_len);
 
 		break;
 
@@ -1036,78 +1055,71 @@ phydm_c2H_content_parsing(
 	}
 
 	return find_c2h_cmd;
-
 }
 
-u64
-odm_get_current_time(
-	struct PHY_DM_STRUCT		*p_dm
-)
+u64 odm_get_current_time(struct dm_struct *dm)
 {
 #if (DM_ODM_SUPPORT_TYPE & (ODM_AP))
 	return (u64)rtw_get_current_time();
 #elif (DM_ODM_SUPPORT_TYPE & ODM_CE) && defined(DM_ODM_CE_MAC80211)
 	return jiffies;
+#elif (DM_ODM_SUPPORT_TYPE & ODM_CE) && defined(DM_ODM_CE_MAC80211_V2)
+	return jiffies;
 #elif (DM_ODM_SUPPORT_TYPE & ODM_CE)
 	return rtw_get_current_time();
 #elif (DM_ODM_SUPPORT_TYPE & ODM_WIN)
-	return  PlatformGetCurrentTime();
+	return PlatformGetCurrentTime();
+#elif (DM_ODM_SUPPORT_TYPE & ODM_IOT)
+	return rtw_get_current_time();
 #endif
 }
 
-u64
-odm_get_progressing_time(
-	struct PHY_DM_STRUCT		*p_dm,
-	u64			start_time
-)
+u64 odm_get_progressing_time(struct dm_struct *dm, u64 start_time)
 {
 #if (DM_ODM_SUPPORT_TYPE & (ODM_AP))
 	return rtw_get_passing_time_ms((u32)start_time);
 #elif (DM_ODM_SUPPORT_TYPE & ODM_CE) && defined(DM_ODM_CE_MAC80211)
 	return jiffies_to_msecs(jiffies - start_time);
+#elif (DM_ODM_SUPPORT_TYPE & ODM_CE) && defined(DM_ODM_CE_MAC80211_V2)
+	return jiffies_to_msecs(jiffies - start_time);
 #elif (DM_ODM_SUPPORT_TYPE & ODM_CE)
 	return rtw_get_passing_time_ms((systime)start_time);
 #elif (DM_ODM_SUPPORT_TYPE & ODM_WIN)
 	return ((PlatformGetCurrentTime() - start_time) >> 10);
+#elif (DM_ODM_SUPPORT_TYPE & ODM_IOT)
+	return rtw_get_passing_time_ms(start_time);
 #endif
 }
 
-#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE)) && !defined(DM_ODM_CE_MAC80211)
+#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_CE)) && \
+	(!defined(DM_ODM_CE_MAC80211) && !defined(DM_ODM_CE_MAC80211_V2))
 
-void
-phydm_set_hw_reg_handler_interface (
-	struct PHY_DM_STRUCT		*p_dm,
-	u8				RegName,
-	u8				*val
-	)
+void phydm_set_hw_reg_handler_interface(struct dm_struct *dm, u8 RegName,
+					u8 *val)
 {
-#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE))
-	struct _ADAPTER *adapter = p_dm->adapter;
+#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_CE))
+	struct _ADAPTER *adapter = dm->adapter;
 
 #if (DM_ODM_SUPPORT_TYPE & ODM_WIN)
-	adapter->HalFunc.SetHwRegHandler(adapter, RegName, val);
+	((PADAPTER)adapter)->HalFunc.SetHwRegHandler(adapter, RegName, val);
 #else
 	adapter->hal_func.set_hw_reg_handler(adapter, RegName, val);
 #endif
 
 #endif
-
 }
 
-void
-phydm_get_hal_def_var_handler_interface (
-	struct PHY_DM_STRUCT		*p_dm,
-	enum _HAL_DEF_VARIABLE		e_variable,
-	void						*p_value
-	)
+void phydm_get_hal_def_var_handler_interface(struct dm_struct *dm,
+					     enum _HAL_DEF_VARIABLE e_variable,
+					     void *value)
 {
-#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE))
-	struct _ADAPTER *adapter = p_dm->adapter;
+#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_CE))
+	struct _ADAPTER *adapter = dm->adapter;
 
 #if (DM_ODM_SUPPORT_TYPE & ODM_WIN)
-	adapter->HalFunc.GetHalDefVarHandler(adapter, e_variable, p_value);
+	((PADAPTER)adapter)->HalFunc.GetHalDefVarHandler(adapter, e_variable, value);
 #else
-	adapter->hal_func.get_hal_def_var_handler(adapter, e_variable, p_value);
+	adapter->hal_func.get_hal_def_var_handler(adapter, e_variable, value);
 #endif
 
 #endif
@@ -1115,192 +1127,182 @@ phydm_get_hal_def_var_handler_interface (
 
 #endif
 
-void
-odm_set_tx_power_index_by_rate_section (
-	struct PHY_DM_STRUCT	*p_dm,
-	enum rf_path		path,
-	u8				Channel,
-	u8				RateSection
-	)
+void odm_set_tx_power_index_by_rate_section(struct dm_struct *dm,
+					    enum rf_path path, u8 ch,
+					    u8 section)
 {
 #if (DM_ODM_SUPPORT_TYPE & ODM_WIN)
-	struct _ADAPTER		*adapter = p_dm->adapter;
-	PHY_SetTxPowerIndexByRateSection(adapter, path, Channel, RateSection);
+	void *adapter = dm->adapter;
+	PHY_SetTxPowerIndexByRateSection(adapter, path, ch, section);
 #elif (DM_ODM_SUPPORT_TYPE == ODM_CE) && defined(DM_ODM_CE_MAC80211)
-	void *adapter = p_dm->adapter;
+	void *adapter = dm->adapter;
 
-	phy_set_tx_power_index_by_rs(adapter, Channel, path, RateSection);
+	phy_set_tx_power_index_by_rs(adapter, ch, path, section);
+#elif (DM_ODM_SUPPORT_TYPE == ODM_CE) && defined(DM_ODM_CE_MAC80211_V2)
 #elif (DM_ODM_SUPPORT_TYPE & ODM_CE)
-	phy_set_tx_power_index_by_rate_section(p_dm->adapter, path, Channel, RateSection);
+	phy_set_tx_power_index_by_rate_section(dm->adapter, path, ch, section);
+#elif (DM_ODM_SUPPORT_TYPE & ODM_IOT)
+	void *adapter = dm->adapter;
+
+	PHY_SetTxPowerIndexByRateSection(adapter, path, ch, section);
 #endif
 }
 
-
-u8
-odm_get_tx_power_index (
-	struct PHY_DM_STRUCT	*p_dm,
-	enum rf_path		path,
-	u8				tx_rate,
-	u8				band_width,
-	u8				Channel
-	)
+u8 odm_get_tx_power_index(struct dm_struct *dm, enum rf_path path, u8 rate,
+			  u8 bw, u8 ch)
 {
 #if (DM_ODM_SUPPORT_TYPE & ODM_WIN)
-	struct _ADAPTER		*adapter = p_dm->adapter;
+	void *adapter = dm->adapter;
 
-	return PHY_GetTxPowerIndex(p_dm->adapter, path, tx_rate, (CHANNEL_WIDTH)band_width, Channel);
+	return PHY_GetTxPowerIndex(dm->adapter, path, rate, (CHANNEL_WIDTH)bw, ch);
 #elif (DM_ODM_SUPPORT_TYPE & ODM_CE) && defined(DM_ODM_CE_MAC80211)
-	void		*adapter = p_dm->adapter;
+	void *adapter = dm->adapter;
 
-	return phy_get_tx_power_index(adapter, (enum rf_path)path, tx_rate, band_width, Channel);
+	return phy_get_tx_power_index(adapter, path, rate, bw, ch);
+#elif (DM_ODM_SUPPORT_TYPE & ODM_CE) && defined(DM_ODM_CE_MAC80211_V2)
+	void *adapter = dm->adapter;
+
+	return phy_get_tx_power_index(adapter, path, rate, bw, ch);
 #elif (DM_ODM_SUPPORT_TYPE & ODM_CE)
-	return phy_get_tx_power_index(p_dm->adapter, path, tx_rate, band_width, Channel);
+	return phy_get_tx_power_index(dm->adapter, path, rate, bw, ch);
+#elif (DM_ODM_SUPPORT_TYPE & ODM_IOT)
+	void *adapter = dm->adapter;
+
+	return PHY_GetTxPowerIndex(dm->adapter, path, rate, bw, ch);
 #endif
 }
 
-
-
-u8
-odm_efuse_one_byte_read(
-	struct PHY_DM_STRUCT	*p_dm,
-	u16			addr,
-	u8			*data,
-	boolean		b_pseu_do_test
-	)
+u8 odm_efuse_one_byte_read(struct dm_struct *dm, u16 addr, u8 *data,
+			   boolean b_pseu_do_test)
 {
 #if (DM_ODM_SUPPORT_TYPE & ODM_WIN)
-	struct	_ADAPTER	*adapter = p_dm->adapter;
+	void *adapter = dm->adapter;
 
 	return (u8)EFUSE_OneByteRead(adapter, addr, data, b_pseu_do_test);
 #elif (DM_ODM_SUPPORT_TYPE & ODM_CE) && defined(DM_ODM_CE_MAC80211)
-	void		*adapter = p_dm->adapter;
+	void *adapter = dm->adapter;
 
 	return rtl_efuse_onebyte_read(adapter, addr, data, b_pseu_do_test);
+#elif (DM_ODM_SUPPORT_TYPE & ODM_CE) && defined(DM_ODM_CE_MAC80211_V2)
+	return -1;
 #elif (DM_ODM_SUPPORT_TYPE & ODM_CE)
-	return efuse_onebyte_read(p_dm->adapter, addr, data, b_pseu_do_test);
+	return efuse_onebyte_read(dm->adapter, addr, data, b_pseu_do_test);
 #elif (DM_ODM_SUPPORT_TYPE & ODM_AP)
-	/*ReadEFuseByte(p_dm->priv, addr, data);*/
-	/*return true;*/
+	return Efuse_OneByteRead(dm, addr, data);
+#elif (DM_ODM_SUPPORT_TYPE & ODM_IOT)
+	void *adapter = dm->adapter;
+
+	return (u8)efuse_OneByteRead(adapter, addr, data, b_pseu_do_test);
 #endif
 }
 
-
-
-void
-odm_efuse_logical_map_read(
-	struct	PHY_DM_STRUCT	*p_dm,
-	u8	type,
-	u16	offset,
-	u32	*data
-)
+void odm_efuse_logical_map_read(struct dm_struct *dm, u8 type, u16 offset,
+				u32 *data)
 {
 #if (DM_ODM_SUPPORT_TYPE & ODM_WIN)
-	struct	_ADAPTER *adapter = p_dm->adapter;
+	void *adapter = dm->adapter;
 
 	EFUSE_ShadowRead(adapter, type, offset, data);
 #elif (DM_ODM_SUPPORT_TYPE & ODM_CE) && defined(DM_ODM_CE_MAC80211)
-	void		*adapter = p_dm->adapter;
+	void *adapter = dm->adapter;
 
 	rtl_efuse_logical_map_read(adapter, type, offset, data);
+#elif (DM_ODM_SUPPORT_TYPE & ODM_CE) && defined(DM_ODM_CE_MAC80211_V2)
 #elif (DM_ODM_SUPPORT_TYPE & ODM_CE)
-	efuse_logical_map_read(p_dm->adapter, type, offset, data);
+	efuse_logical_map_read(dm->adapter, type, offset, data);
+#elif (DM_ODM_SUPPORT_TYPE & ODM_IOT)
+	void *adapter = dm->adapter;
+
+	EFUSE_ShadowRead(adapter, type, offset, data);
 #endif
 }
 
 enum hal_status
-odm_iq_calibrate_by_fw(
-	struct PHY_DM_STRUCT	*p_dm,
-	u8 clear,
-	u8 segment
-	)
+odm_iq_calibrate_by_fw(struct dm_struct *dm, u8 clear, u8 segment)
 {
 	enum hal_status iqk_result = HAL_STATUS_FAILURE;
 
 #if (DM_ODM_SUPPORT_TYPE & ODM_WIN)
-	struct	_ADAPTER	*adapter = p_dm->adapter;
+	struct _ADAPTER *adapter = dm->adapter;
 
 	if (HAL_MAC_FWIQK_Trigger(&GET_HAL_MAC_INFO(adapter), clear, segment) == 0)
 		iqk_result = HAL_STATUS_SUCCESS;
 #elif (DM_ODM_SUPPORT_TYPE & ODM_CE)
-	iqk_result = rtw_phydm_fw_iqk(p_dm, clear, segment);
+#if (DM_ODM_SUPPORT_TYPE & ODM_CE) && defined(DM_ODM_CE_MAC80211)
+	void *adapter = dm->adapter;
+
+	iqk_result = rtl_phydm_fw_iqk(adapter, clear, segment);
+#elif (DM_ODM_SUPPORT_TYPE & ODM_CE) && defined(DM_ODM_CE_MAC80211_V2)
+#else
+	iqk_result = rtw_phydm_fw_iqk(dm, clear, segment);
+#endif
+#elif (DM_ODM_SUPPORT_TYPE & ODM_IOT)
+	iqk_result = rtw_phydm_fw_iqk(dm, clear, segment);
 #endif
 	return iqk_result;
 }
 
-void
-odm_cmn_info_ptr_array_hook(
-	struct PHY_DM_STRUCT		*p_dm,
-	enum odm_cmninfo_e	cmn_info,
-	u16			index,
-	void			*p_value
-)
+void odm_cmn_info_ptr_array_hook(struct dm_struct *dm,
+				 enum odm_cmninfo cmn_info, u16 index,
+				 void *value)
 {
-	switch	(cmn_info) {
-	/*Dynamic call by reference pointer.	*/
-	case	ODM_CMNINFO_STA_STATUS:
-		p_dm->p_odm_sta_info[index] = (struct sta_info *)p_value;
-		break;
-	/* To remove the compiler warning, must add an empty default statement to handle the other values. */
-	default:
-		/* do nothing */
-		break;
-	}
-
+	/*ODM_CMNINFO_STA_STATUS*/
 }
 
-void
-phydm_cmn_sta_info_hook(
-	struct PHY_DM_STRUCT		*p_dm,
-	u8			mac_id,
-	struct cmn_sta_info *pcmn_sta_info
-)
+void phydm_cmn_sta_info_hook(struct dm_struct *dm, u8 mac_id,
+			     struct cmn_sta_info *pcmn_sta_info)
 {
-	p_dm->p_phydm_sta_info[mac_id] = pcmn_sta_info;
+	dm->phydm_sta_info[mac_id] = pcmn_sta_info;
 
 	if (is_sta_active(pcmn_sta_info))
-		p_dm->phydm_macid_table[pcmn_sta_info->mac_id] = mac_id;
+		dm->phydm_macid_table[pcmn_sta_info->mac_id] = mac_id;
 }
 
-void
-phydm_add_interrupt_mask_handler(
-	struct PHY_DM_STRUCT		*p_dm,
-	u8							interrupt_type
-)
+void phydm_macid2sta_idx_table(struct dm_struct *dm, u8 entry_idx,
+			       struct cmn_sta_info *pcmn_sta_info)
+{
+	if (is_sta_active(pcmn_sta_info))
+		dm->phydm_macid_table[pcmn_sta_info->mac_id] = entry_idx;
+}
+
+void phydm_add_interrupt_mask_handler(struct dm_struct *dm, u8 interrupt_type)
 {
 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
 #elif (DM_ODM_SUPPORT_TYPE == ODM_AP)
 
-	struct rtl8192cd_priv	*priv = p_dm->priv;
+	struct rtl8192cd_priv *priv = dm->priv;
 
 	#if IS_EXIST_PCI || IS_EXIST_EMBEDDED
-	GET_HAL_INTERFACE(priv)->AddInterruptMaskHandler(priv, interrupt_type);
+	if (dm->support_interface == ODM_ITRF_PCIE)
+		GET_HAL_INTERFACE(priv)->AddInterruptMaskHandler(priv,
+								 interrupt_type)
+								 ;
 	#endif
-	
+
 #elif (DM_ODM_SUPPORT_TYPE == ODM_CE)
 #endif
 }
 
-void
-phydm_enable_rx_related_interrupt_handler(
-	struct PHY_DM_STRUCT		*p_dm
-)
+void phydm_enable_rx_related_interrupt_handler(struct dm_struct *dm)
 {
 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
 #elif (DM_ODM_SUPPORT_TYPE == ODM_AP)
 
-	struct rtl8192cd_priv	*priv = p_dm->priv;
+	struct rtl8192cd_priv *priv = dm->priv;
 
 	#if IS_EXIST_PCI || IS_EXIST_EMBEDDED
-	GET_HAL_INTERFACE(priv)->EnableRxRelatedInterruptHandler(priv);
+	if (dm->support_interface == ODM_ITRF_PCIE)
+		GET_HAL_INTERFACE(priv)->EnableRxRelatedInterruptHandler(priv);
 	#endif
 
 #elif (DM_ODM_SUPPORT_TYPE == ODM_CE)
 #endif
 }
 
+#if 0
 boolean
 phydm_get_txbf_en(
-	struct PHY_DM_STRUCT		*p_dm,
+	struct dm_struct		*dm,
 	u16							mac_id,
 	u8							i
 )
@@ -1310,13 +1312,13 @@ phydm_get_txbf_en(
 #if (DM_ODM_SUPPORT_TYPE & ODM_WIN)
 #elif (DM_ODM_SUPPORT_TYPE & ODM_CE) && !defined(DM_ODM_CE_MAC80211)
 
-	#ifdef CONFIG_BEAMFORMING
+#ifdef CONFIG_BEAMFORMING
 	enum beamforming_cap beamform_cap;
-	struct _ADAPTER *adapter = p_dm->adapter;
-	#if (BEAMFORMING_SUPPORT == 1)
+	void *adapter = dm->adapter;
+	#ifdef PHYDM_BEAMFORMING_SUPPORT
 	beamform_cap =
-	phydm_beamforming_get_entry_beam_cap_by_mac_id(p_dm, mac_id);
-	#else/*for drv beamforming*/
+	phydm_beamforming_get_entry_beam_cap_by_mac_id(dm, mac_id);
+	#else/*@for drv beamforming*/
 	beamform_cap =
 	beamforming_get_entry_beam_cap_by_mac_id(&adapter->mlmepriv, mac_id);
 	#endif
@@ -1324,64 +1326,143 @@ phydm_get_txbf_en(
 		txbf_en = true;
 	else
 		txbf_en = false;
-	#endif /*#ifdef CONFIG_BEAMFORMING*/
+#endif /*@#ifdef CONFIG_BEAMFORMING*/
 
 #elif (DM_ODM_SUPPORT_TYPE & ODM_AP)
 
-	#if (BEAMFORMING_SUPPORT == 1)
+#ifdef PHYDM_BEAMFORMING_SUPPORT
 	u8 idx = 0xff;
 	boolean act_bfer = false;
 	BEAMFORMING_CAP beamform_cap = BEAMFORMING_CAP_NONE;
-	PRT_BEAMFORMING_ENTRY	p_entry = NULL;
-	struct rtl8192cd_priv *priv			= p_dm->priv;
+	PRT_BEAMFORMING_ENTRY	entry = NULL;
+	struct rtl8192cd_priv *priv			= dm->priv;
 	#if (defined(CONFIG_PHYDM_ANTENNA_DIVERSITY))
-	struct _BF_DIV_COEX_	*p_dm_bdc_table = &p_dm->dm_bdc_table;
+	struct _BF_DIV_COEX_	*dm_bdc_table = &dm->dm_bdc_table;
 
-	p_dm_bdc_table->num_txbfee_client = 0;
-	p_dm_bdc_table->num_txbfer_client = 0;
-	#endif
+	dm_bdc_table->num_txbfee_client = 0;
+	dm_bdc_table->num_txbfer_client = 0;
 	#endif
+#endif
 
-	#if (BEAMFORMING_SUPPORT == 1)
+#ifdef PHYDM_BEAMFORMING_SUPPORT
 	beamform_cap = Beamforming_GetEntryBeamCapByMacId(priv, mac_id);
-	p_entry = Beamforming_GetEntryByMacId(priv, mac_id, &idx);
+	entry = Beamforming_GetEntryByMacId(priv, mac_id, &idx);
 	if (beamform_cap & (BEAMFORMER_CAP_HT_EXPLICIT | BEAMFORMER_CAP_VHT_SU)) {
-		if (p_entry->Sounding_En)
+		if (entry->Sounding_En)
 			txbf_en = true;
 		else
 			txbf_en = false;
 		act_bfer = true;
 	}
-	#if (defined(CONFIG_PHYDM_ANTENNA_DIVERSITY)) /*BDC*/
+	#if (defined(CONFIG_PHYDM_ANTENNA_DIVERSITY)) /*@BDC*/
 	if (act_bfer == true) {
-		p_dm_bdc_table->w_bfee_client[i] = true; /* AP act as BFer */
-		p_dm_bdc_table->num_txbfee_client++;
+		dm_bdc_table->w_bfee_client[i] = true; /* @AP act as BFer */
+		dm_bdc_table->num_txbfee_client++;
 	} else
-		p_dm_bdc_table->w_bfee_client[i] = false; /* AP act as BFer */
-	
+		dm_bdc_table->w_bfee_client[i] = false; /* @AP act as BFer */
+
 	if (beamform_cap & (BEAMFORMEE_CAP_HT_EXPLICIT | BEAMFORMEE_CAP_VHT_SU)) {
-		p_dm_bdc_table->w_bfer_client[i] = true; /* AP act as BFee */
-		p_dm_bdc_table->num_txbfer_client++;
+		dm_bdc_table->w_bfer_client[i] = true; /* @AP act as BFee */
+		dm_bdc_table->num_txbfer_client++;
 	} else
-		p_dm_bdc_table->w_bfer_client[i] = false; /* AP act as BFer */
+		dm_bdc_table->w_bfer_client[i] = false; /* @AP act as BFer */
 
 	#endif
-	#endif
+#endif
 
 #endif
 	return txbf_en;
-
 }
+#endif
 
-void
-phydm_iqk_wait(
-	struct PHY_DM_STRUCT		*p_dm,
-	u32		timeout
-)
+void phydm_iqk_wait(struct dm_struct *dm, u32 timeout)
 {
 #if (DM_ODM_SUPPORT_TYPE == ODM_CE)
-	struct _ADAPTER		*p_adapter = p_dm->adapter;
+#if (DM_ODM_SUPPORT_TYPE & ODM_CE) && defined(DM_ODM_CE_MAC80211)
+	PHYDM_DBG(dm, DBG_CMN, "Not support for CE MAC80211 driver!\n");
+#elif (DM_ODM_SUPPORT_TYPE & ODM_CE) && defined(DM_ODM_CE_MAC80211_V2)
+#else
+	void *adapter = dm->adapter;
+
+	rtl8812_iqk_wait(adapter, timeout);
+#endif
+#endif
+}
+
+u8 phydm_get_hwrate_to_mrate(struct dm_struct *dm, u8 rate)
+{
+#if (DM_ODM_SUPPORT_TYPE == ODM_IOT)
+	return HwRateToMRate(rate);
+#endif
+	return 0;
+}
+
+void phydm_set_crystalcap(struct dm_struct *dm, u8 crystal_cap)
+{
+#if (DM_ODM_SUPPORT_TYPE == ODM_IOT)
+	ROM_odm_SetCrystalCap(dm, crystal_cap);
+#endif
+}
 
-	rtl8812_iqk_wait(p_adapter, timeout);
+void phydm_run_in_thread_cmd(struct dm_struct *dm, void (*func)(void *),
+			     void *context)
+{
+#if (DM_ODM_SUPPORT_TYPE & ODM_CE) && defined(DM_ODM_CE_MAC80211)
+	PHYDM_DBG(dm, DBG_CMN, "Not support for CE MAC80211 driver!\n");
+#elif (DM_ODM_SUPPORT_TYPE & ODM_CE)
+	void *adapter = dm->adapter;
+
+	rtw_run_in_thread_cmd(adapter, func, context);
 #endif
 }
+
+u32 phydm_get_tx_rate(struct dm_struct *dm)
+{
+	struct _hal_rf_ *rf = &dm->rf_table;
+#if (DM_ODM_SUPPORT_TYPE & ODM_WIN)
+	struct _ADAPTER *adapter = dm->adapter;
+#endif
+	u8 tx_rate = 0xFF;
+	u8 mpt_rate_index = 0;
+
+	if (*dm->mp_mode == 1) {
+#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_CE))
+#if (DM_ODM_SUPPORT_TYPE & ODM_WIN)
+#if (MP_DRIVER == 1)
+		PMPT_CONTEXT p_mpt_ctx = &adapter->MptCtx;
+
+		tx_rate = MptToMgntRate(p_mpt_ctx->MptRateIndex);
+#endif
+#elif (DM_ODM_SUPPORT_TYPE & ODM_CE)
+#ifdef CONFIG_MP_INCLUDED
+		if (rf->mp_rate_index)
+			mpt_rate_index = *rf->mp_rate_index;
+
+		tx_rate = mpt_to_mgnt_rate(mpt_rate_index);
+#endif
+#endif
+#endif
+	} else {
+		u16 rate = *dm->forced_data_rate;
+
+		if (!rate) { /*auto rate*/
+#if (DM_ODM_SUPPORT_TYPE & ODM_WIN)
+			struct _ADAPTER *adapter = dm->adapter;
+
+			tx_rate = ((PADAPTER)adapter)->HalFunc.GetHwRateFromMRateHandler(dm->tx_rate);
+#elif (DM_ODM_SUPPORT_TYPE & ODM_CE) && defined(DM_ODM_CE_MAC80211)
+			tx_rate = dm->tx_rate;
+#elif (DM_ODM_SUPPORT_TYPE & ODM_CE)
+			if (dm->number_linked_client != 0)
+				tx_rate = hw_rate_to_m_rate(dm->tx_rate);
+			else
+				tx_rate = rf->p_rate_index;
+#endif
+		} else { /*force rate*/
+			tx_rate = (u8)rate;
+		}
+	}
+
+	return tx_rate;
+}
+
diff --git a/rtl8723DS/hal/phydm/phydm_interface.h b/rtl8723DS/hal/phydm/phydm_interface.h
index 1b0f6c2..38edfb4 100755..100644
--- a/rtl8723DS/hal/phydm/phydm_interface.h
+++ b/rtl8723DS/hal/phydm/phydm_interface.h
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2007 - 2017 Realtek Corporation.
+ * Copyright(c) 2007 - 2017  Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -8,49 +8,63 @@
  *
  * This program is distributed in the hope that it will be useful, but WITHOUT
  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  * more details.
  *
+ * The full GNU General Public License is included in this distribution in the
+ * file called LICENSE.
+ *
+ * Contact Information:
+ * wlanfae <wlanfae@realtek.com>
+ * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
+ * Hsinchu 300, Taiwan.
+ *
+ * Larry Finger <Larry.Finger@lwfinger.net>
+ *
  *****************************************************************************/
 
-
-#ifndef	__ODM_INTERFACE_H__
+#ifndef __ODM_INTERFACE_H__
 #define __ODM_INTERFACE_H__
 
-#define INTERFACE_VERSION	"1.2"		/*2017.05.03  YuChen add phy param offload HAL MAC API*/
+#define INTERFACE_VERSION "1.2"
+
+#define pdm_set_reg odm_set_bb_reg
 
-/*=========== Constant/Structure/Enum/... Define*/
+/*@=========== Constant/Structure/Enum/... Define*/
 
 enum phydm_h2c_cmd {
 	PHYDM_H2C_RA_MASK		= 0x40,
 	PHYDM_H2C_TXBF			= 0x41,
 	ODM_H2C_RSSI_REPORT		= 0x42,
-	ODM_H2C_IQ_CALIBRATION	= 0x45,
-	PHYDM_RA_MASK_ABOVE_3SS = 0x46,
-	ODM_H2C_RA_PARA_ADJUST	= 0x47,
-	PHYDM_H2C_DYNAMIC_TX_PATH = 0x48,
-	PHYDM_H2C_FW_TRACE_EN	= 0x49,
+	ODM_H2C_IQ_CALIBRATION		= 0x45,
+	PHYDM_RA_MASK_ABOVE_3SS		= 0x46,
+	ODM_H2C_RA_PARA_ADJUST		= 0x47,
+	PHYDM_H2C_DYNAMIC_TX_PATH	= 0x48,
+	PHYDM_H2C_FW_TRACE_EN		= 0x49,
 	ODM_H2C_WIFI_CALIBRATION	= 0x6d,
-	PHYDM_H2C_MU				= 0x4a,
-	PHYDM_H2C_FW_GENERAL_INIT = 0x4c,
-	PHYDM_H2C_FW_CLM_MNTR = 0x4d,
+	PHYDM_H2C_MU			= 0x4a,
+	PHYDM_H2C_FW_GENERAL_INIT	= 0x4c,
+	PHYDM_H2C_FW_CLM_MNTR		= 0x4d,
+	PHYDM_H2C_MCC			= 0x4f,
+	PHYDM_H2C_RESP_TX_PATH_CTRL	= 0x50,
+	PHYDM_H2C_RESP_TX_ANT_CTRL	= 0x51,
 	ODM_MAX_H2CCMD
 };
 
 enum phydm_c2h_evt {
-	PHYDM_C2H_DBG = 0,
-	PHYDM_C2H_LB = 1,
-	PHYDM_C2H_XBF = 2,
-	PHYDM_C2H_TX_REPORT = 3,
-	PHYDM_C2H_INFO = 9,
-	PHYDM_C2H_BT_MP = 11,
-	PHYDM_C2H_RA_RPT = 12,
+	PHYDM_C2H_DBG =		0,
+	PHYDM_C2H_LB =		1,
+	PHYDM_C2H_XBF =		2,
+	PHYDM_C2H_TX_REPORT =	3,
+	PHYDM_C2H_INFO =	9,
+	PHYDM_C2H_BT_MP =	11,
+	PHYDM_C2H_RA_RPT =	12,
 	PHYDM_C2H_RA_PARA_RPT = 14,
 	PHYDM_C2H_DYNAMIC_TX_PATH_RPT = 15,
-	PHYDM_C2H_IQK_FINISH = 17, /*0x11*/
-	PHYDM_C2H_CLM_MONITOR = 0x2a,
-	PHYDM_C2H_DBG_CODE = 0xFE,
-	PHYDM_C2H_EXTEND = 0xFF,
+	PHYDM_C2H_IQK_FINISH =	17, /*@0x11*/
+	PHYDM_C2H_CLM_MONITOR =	0x2a,
+	PHYDM_C2H_DBG_CODE =	0xFE,
+	PHYDM_C2H_EXTEND =	0xFF,
 };
 
 enum phydm_extend_c2h_evt {
@@ -71,435 +85,259 @@ enum phydm_halmac_param {
 	PHYDM_HALMAC_CMD_END = 0XFF,
 };
 
-/*=========== Macro Define*/
+/*@=========== Macro Define*/
 
 #define _reg_all(_name)			ODM_##_name
 #define _reg_ic(_name, _ic)		ODM_##_name##_ic
 #define _bit_all(_name)			BIT_##_name
 #define _bit_ic(_name, _ic)		BIT_##_name##_ic
 
-/* _cat: implemented by Token-Pasting Operator. */
+/* @_cat: implemented by Token-Pasting Operator. */
 #if 0
-#define _cat(_name, _ic_type, _func)								\
-	(\
-	 _func##_all(_name)										\
-	)
+#define _cat(_name, _ic_type, _func) \
+	(                            \
+		_func##_all(_name))
 #endif
 
-/*===================================
+#if 0
 
 #define ODM_REG_DIG_11N		0xC50
 #define ODM_REG_DIG_11AC	0xDDD
 
 ODM_REG(DIG,_pdm_odm)
-=====================================*/
+#endif
 
+#if defined(DM_ODM_CE_MAC80211)
+#define ODM_BIT(name, dm)				\
+	((dm->support_ic_type & ODM_IC_11N_SERIES) ?	\
+	 ODM_BIT_##name##_11N : ODM_BIT_##name##_11AC)
+
+#define ODM_REG(name, dm)				\
+	((dm->support_ic_type & ODM_IC_11N_SERIES) ?	\
+	 ODM_REG_##name##_11N : ODM_REG_##name##_11AC)
+#else
 #define _reg_11N(_name)			ODM_REG_##_name##_11N
 #define _reg_11AC(_name)		ODM_REG_##_name##_11AC
 #define _bit_11N(_name)			ODM_BIT_##_name##_11N
 #define _bit_11AC(_name)		ODM_BIT_##_name##_11AC
 
 #ifdef __ECOS
-#define _rtk_cat(_name, _ic_type, _func)		\
-	(\
-	 ((_ic_type) & ODM_IC_11N_SERIES) ? _func##_11N(_name) :		\
-	 _func##_11AC(_name)	\
-	)
+#define _rtk_cat(_name, _ic_type, _func)                                \
+	(                                                               \
+		((_ic_type) & ODM_IC_11N_SERIES) ? _func##_11N(_name) : \
+						   _func##_11AC(_name))
 #else
 
-#define _cat(_name, _ic_type, _func)									\
-	(\
-	 ((_ic_type) & ODM_IC_11N_SERIES) ? _func##_11N(_name) :		\
-	 _func##_11AC(_name)									\
-	)
+#define _cat(_name, _ic_type, _func)                                    \
+	(                                                               \
+		((_ic_type) & ODM_IC_11N_SERIES) ? _func##_11N(_name) : \
+						   _func##_11AC(_name))
 #endif
-/*
+/*@
  * only sample code
- *#define _cat(_name, _ic_type, _func)									\
- *	(															\
- *		((_ic_type) & ODM_RTL8188E) ? _func##_ic(_name, _8188E) :		\
- *		_func##_ic(_name, _8195)									\
+ *#define _cat(_name, _ic_type, _func)					\
+ *	(								\
+ *		((_ic_type) & ODM_RTL8188E) ? _func##_ic(_name, _8188E) :\
+ *		_func##_ic(_name, _8195)				\
  *	)
  */
 
-/* _name: name of register or bit.
- * Example: "ODM_REG(R_A_AGC_CORE1, p_dm)"
- * gets "ODM_R_A_AGC_CORE1" or "ODM_R_A_AGC_CORE1_8192C", depends on support_ic_type. */
+/* @_name: name of register or bit.
+ * Example: "ODM_REG(R_A_AGC_CORE1, dm)"
+ * gets "ODM_R_A_AGC_CORE1" or "ODM_R_A_AGC_CORE1_8192C",
+ * depends on support_ic_type.
+ */
 #ifdef __ECOS
-	#define ODM_REG(_name, _pdm_odm)	_rtk_cat(_name, _pdm_odm->support_ic_type, _reg)
-	#define ODM_BIT(_name, _pdm_odm)	_rtk_cat(_name, _pdm_odm->support_ic_type, _bit)
+	#define ODM_REG(_name, _pdm_odm)	\
+		_rtk_cat(_name, _pdm_odm->support_ic_type, _reg)
+	#define ODM_BIT(_name, _pdm_odm)	\
+		_rtk_cat(_name, _pdm_odm->support_ic_type, _bit)
 #else
-	#define ODM_REG(_name, _pdm_odm)	_cat(_name, _pdm_odm->support_ic_type, _reg)
-	#define ODM_BIT(_name, _pdm_odm)	_cat(_name, _pdm_odm->support_ic_type, _bit)
+	#define ODM_REG(_name, _pdm_odm)	\
+		_cat(_name, _pdm_odm->support_ic_type, _reg)
+	#define ODM_BIT(_name, _pdm_odm)	\
+		_cat(_name, _pdm_odm->support_ic_type, _bit)
 #endif
 
-/*
+#endif
+/*@
  * =========== Extern Variable ??? It should be forbidden.
- *   */
-
+ */
 
-/*
+/*@
  * =========== EXtern Function Prototype
- *   */
+ */
 
+u8 odm_read_1byte(struct dm_struct *dm, u32 reg_addr);
 
-u8
-odm_read_1byte(
-	struct PHY_DM_STRUCT		*p_dm,
-	u32			reg_addr
-);
+u16 odm_read_2byte(struct dm_struct *dm, u32 reg_addr);
 
-u16
-odm_read_2byte(
-	struct PHY_DM_STRUCT		*p_dm,
-	u32			reg_addr
-);
+u32 odm_read_4byte(struct dm_struct *dm, u32 reg_addr);
 
-u32
-odm_read_4byte(
-	struct PHY_DM_STRUCT		*p_dm,
-	u32			reg_addr
-);
+void odm_write_1byte(struct dm_struct *dm, u32 reg_addr, u8 data);
 
-void
-odm_write_1byte(
-	struct PHY_DM_STRUCT		*p_dm,
-	u32			reg_addr,
-	u8			data
-);
+void odm_write_2byte(struct dm_struct *dm, u32 reg_addr, u16 data);
 
-void
-odm_write_2byte(
-	struct PHY_DM_STRUCT		*p_dm,
-	u32			reg_addr,
-	u16			data
-);
+void odm_write_4byte(struct dm_struct *dm, u32 reg_addr, u32 data);
 
-void
-odm_write_4byte(
-	struct PHY_DM_STRUCT		*p_dm,
-	u32			reg_addr,
-	u32			data
-);
+void odm_set_mac_reg(struct dm_struct *dm, u32 reg_addr, u32 bit_mask,
+		     u32 data);
 
-void
-odm_set_mac_reg(
-	struct PHY_DM_STRUCT	*p_dm,
-	u32		reg_addr,
-	u32		bit_mask,
-	u32		data
-);
+u32 odm_get_mac_reg(struct dm_struct *dm, u32 reg_addr, u32 bit_mask);
 
-u32
-odm_get_mac_reg(
-	struct PHY_DM_STRUCT	*p_dm,
-	u32		reg_addr,
-	u32		bit_mask
-);
+void odm_set_bb_reg(struct dm_struct *dm, u32 reg_addr, u32 bit_mask, u32 data);
 
-void
-odm_set_bb_reg(
-	struct PHY_DM_STRUCT	*p_dm,
-	u32		reg_addr,
-	u32		bit_mask,
-	u32		data
-);
+u32 odm_get_bb_reg(struct dm_struct *dm, u32 reg_addr, u32 bit_mask);
 
-u32
-odm_get_bb_reg(
-	struct PHY_DM_STRUCT	*p_dm,
-	u32		reg_addr,
-	u32		bit_mask
-);
-
-void
-odm_set_rf_reg(
-	struct PHY_DM_STRUCT			*p_dm,
-	u8			e_rf_path,
-	u32				reg_addr,
-	u32				bit_mask,
-	u32				data
-);
+void odm_set_rf_reg(struct dm_struct *dm, u8 e_rf_path, u32 reg_addr,
+		    u32 bit_mask, u32 data);
 
-u32
-odm_get_rf_reg(
-	struct PHY_DM_STRUCT			*p_dm,
-	u8			e_rf_path,
-	u32				reg_addr,
-	u32				bit_mask
-);
+u32 odm_get_rf_reg(struct dm_struct *dm, u8 e_rf_path, u32 reg_addr,
+		   u32 bit_mask);
 
-
-/*
+/*@
  * Memory Relative Function.
- *   */
-void
-odm_allocate_memory(
-	struct PHY_DM_STRUCT	*p_dm,
-	void **p_ptr,
-	u32		length
-);
-void
-odm_free_memory(
-	struct PHY_DM_STRUCT	*p_dm,
-	void		*p_ptr,
-	u32		length
-);
+ */
+void odm_allocate_memory(struct dm_struct *dm, void **ptr, u32 length);
+void odm_free_memory(struct dm_struct *dm, void *ptr, u32 length);
 
-void
-odm_move_memory(
-	struct PHY_DM_STRUCT	*p_dm,
-	void		*p_dest,
-	void		*p_src,
-	u32		length
-);
+void odm_move_memory(struct dm_struct *dm, void *dest, void *src, u32 length);
 
-s32 odm_compare_memory(
-	struct PHY_DM_STRUCT	*p_dm,
-	void           *p_buf1,
-	void           *p_buf2,
-	u32          length
-);
+s32 odm_compare_memory(struct dm_struct *dm, void *buf1, void *buf2,
+		       u32 length);
 
-void odm_memory_set(
-	struct PHY_DM_STRUCT	*p_dm,
-	void	*pbuf,
-	s8	value,
-	u32	length
-);
+void odm_memory_set(struct dm_struct *dm, void *pbuf, s8 value, u32 length);
 
-/*
+/*@
  * ODM MISC-spin lock relative API.
- *   */
-void
-odm_acquire_spin_lock(
-	struct PHY_DM_STRUCT			*p_dm,
-	enum rt_spinlock_type	type
-);
+ */
+void odm_acquire_spin_lock(struct dm_struct *dm, enum rt_spinlock_type type);
 
-void
-odm_release_spin_lock(
-	struct PHY_DM_STRUCT			*p_dm,
-	enum rt_spinlock_type	type
-);
+void odm_release_spin_lock(struct dm_struct *dm, enum rt_spinlock_type type);
 
 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
-/*
+/*@
  * ODM MISC-workitem relative API.
- *   */
-void
-odm_initialize_work_item(
-	struct PHY_DM_STRUCT					*p_dm,
-	PRT_WORK_ITEM				p_rt_work_item,
-	RT_WORKITEM_CALL_BACK		rt_work_item_callback,
-	void						*p_context,
-	const char					*sz_id
-);
+ */
+void odm_initialize_work_item(
+	struct dm_struct *dm,
+	PRT_WORK_ITEM p_rt_work_item,
+	RT_WORKITEM_CALL_BACK rt_work_item_callback,
+	void *context,
+	const char *sz_id);
 
-void
-odm_start_work_item(
-	PRT_WORK_ITEM	p_rt_work_item
-);
+void odm_start_work_item(
+	PRT_WORK_ITEM p_rt_work_item);
 
-void
-odm_stop_work_item(
-	PRT_WORK_ITEM	p_rt_work_item
-);
+void odm_stop_work_item(
+	PRT_WORK_ITEM p_rt_work_item);
 
-void
-odm_free_work_item(
-	PRT_WORK_ITEM	p_rt_work_item
-);
+void odm_free_work_item(
+	PRT_WORK_ITEM p_rt_work_item);
 
-void
-odm_schedule_work_item(
-	PRT_WORK_ITEM	p_rt_work_item
-);
+void odm_schedule_work_item(
+	PRT_WORK_ITEM p_rt_work_item);
 
 boolean
 odm_is_work_item_scheduled(
-	PRT_WORK_ITEM	p_rt_work_item
-);
+	PRT_WORK_ITEM p_rt_work_item);
 #endif
 
-/*
+/*@
  * ODM Timer relative API.
- *   */
-void
-ODM_delay_ms(u32	ms);
+ */
+void ODM_delay_ms(u32 ms);
 
-void
-ODM_delay_us(u32	us);
+void ODM_delay_us(u32 us);
 
-void
-ODM_sleep_ms(u32	ms);
+void ODM_sleep_ms(u32 ms);
 
-void
-ODM_sleep_us(u32	us);
+void ODM_sleep_us(u32 us);
 
-void
-odm_set_timer(
-	struct PHY_DM_STRUCT		*p_dm,
-	struct timer_list		*p_timer,
-	u32			ms_delay
-);
+void odm_set_timer(struct dm_struct *dm, struct phydm_timer_list *timer,
+		   u32 ms_delay);
 
-void
-odm_initialize_timer(
-	struct PHY_DM_STRUCT			*p_dm,
-	struct timer_list			*p_timer,
-	void	*call_back_func,
-	void				*p_context,
-	const char			*sz_id
-);
+void odm_initialize_timer(struct dm_struct *dm, struct phydm_timer_list *timer,
+			  void *call_back_func, void *context,
+			  const char *sz_id);
 
-void
-odm_cancel_timer(
-	struct PHY_DM_STRUCT		*p_dm,
-	struct timer_list		*p_timer
-);
+void odm_cancel_timer(struct dm_struct *dm, struct phydm_timer_list *timer);
 
-void
-odm_release_timer(
-	struct PHY_DM_STRUCT		*p_dm,
-	struct timer_list		*p_timer
-);
+void odm_release_timer(struct dm_struct *dm, struct phydm_timer_list *timer);
 
 /*ODM FW relative API.*/
 
-
 enum hal_status
-phydm_set_reg_by_fw(
-	struct PHY_DM_STRUCT			*p_dm,
-	enum phydm_halmac_param	config_type,
-	u32	offset,
-	u32	data,
-	u32	mask,
-	enum rf_path	e_rf_path,
-	u32 delay_time
-);
+phydm_set_reg_by_fw(struct dm_struct *dm, enum phydm_halmac_param config_type,
+		    u32 offset, u32 data, u32 mask, enum rf_path e_rf_path,
+		    u32 delay_time);
 
-void
-odm_fill_h2c_cmd(
-	struct PHY_DM_STRUCT		*p_dm,
-	u8			element_id,
-	u32			cmd_len,
-	u8			*p_cmd_buffer
-);
+void odm_fill_h2c_cmd(struct dm_struct *dm, u8 element_id, u32 cmd_len,
+		      u8 *cmd_buffer);
 
-u8
-phydm_c2H_content_parsing(
-	void			*p_dm_void,
-	u8			c2h_cmd_id,
-	u8			c2h_cmd_len,
-	u8			*tmp_buf
-);
+u8 phydm_c2H_content_parsing(void *dm_void, u8 c2h_cmd_id, u8 c2h_cmd_len,
+			     u8 *tmp_buf);
 
-u64
-odm_get_current_time(
-	struct PHY_DM_STRUCT		*p_dm
-);
-u64
-odm_get_progressing_time(
-	struct PHY_DM_STRUCT		*p_dm,
-	u64			start_time
-);
+u64 odm_get_current_time(struct dm_struct *dm);
+u64 odm_get_progressing_time(struct dm_struct *dm, u64 start_time);
 
-#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE)) && !defined(DM_ODM_CE_MAC80211)
+#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_CE)) && \
+	(!defined(DM_ODM_CE_MAC80211) && !defined(DM_ODM_CE_MAC80211_V2))
 
-void
-phydm_set_hw_reg_handler_interface (
-	struct PHY_DM_STRUCT		*p_dm,
-	u8				reg_Name,
-	u8				*val
-	);
+void phydm_set_hw_reg_handler_interface(struct dm_struct *dm, u8 reg_Name,
+					u8 *val);
 
-void
-phydm_get_hal_def_var_handler_interface (
-	struct PHY_DM_STRUCT		*p_dm,
-	enum _HAL_DEF_VARIABLE		e_variable,
-	void						*p_value
-	);
+void phydm_get_hal_def_var_handler_interface(struct dm_struct *dm,
+					     enum _HAL_DEF_VARIABLE e_variable,
+					     void *value);
 
 #endif
 
-void
-odm_set_tx_power_index_by_rate_section (
-	struct PHY_DM_STRUCT	*p_dm,
-	enum rf_path		path,
-	u8				Channel,
-	u8				RateSection
-);
+void odm_set_tx_power_index_by_rate_section(struct dm_struct *dm,
+					    enum rf_path path, u8 channel,
+					    u8 rate_section);
 
-u8
-odm_get_tx_power_index (
-	struct PHY_DM_STRUCT	*p_dm,
-	enum rf_path		path,
-	u8				tx_rate,
-	u8				band_width,
-	u8				Channel
-);
+u8 odm_get_tx_power_index(struct dm_struct *dm, enum rf_path path, u8 tx_rate,
+			  u8 band_width, u8 channel);
 
-u8
-odm_efuse_one_byte_read(
-	struct PHY_DM_STRUCT	*p_dm,
-	u16			addr,
-	u8			*data,
-	boolean		b_pseu_do_test
-);
+u8 odm_efuse_one_byte_read(struct dm_struct *dm, u16 addr, u8 *data,
+			   boolean b_pseu_do_test);
 
-void
-odm_efuse_logical_map_read(
-	struct	PHY_DM_STRUCT	*p_dm,
-	u8	type,
-	u16	offset,
-	u32	*data
-);
+void odm_efuse_logical_map_read(struct dm_struct *dm, u8 type, u16 offset,
+				u32 *data);
 
 enum hal_status
-odm_iq_calibrate_by_fw(
-	struct PHY_DM_STRUCT	*p_dm,
-	u8 clear,
-	u8 segment
-);
+odm_iq_calibrate_by_fw(struct dm_struct *dm, u8 clear, u8 segment);
 
-void
-odm_cmn_info_ptr_array_hook(
-	struct PHY_DM_STRUCT		*p_dm,
-	enum odm_cmninfo_e	cmn_info,
-	u16			index,
-	void			*p_value
-);
+void odm_cmn_info_ptr_array_hook(struct dm_struct *dm,
+				 enum odm_cmninfo cmn_info, u16 index,
+				 void *value);
 
-void
-phydm_cmn_sta_info_hook(
-	struct PHY_DM_STRUCT		*p_dm,
-	u8			index,
-	struct cmn_sta_info *pcmn_sta_info
-);
+void phydm_cmn_sta_info_hook(struct dm_struct *dm, u8 index,
+			     struct cmn_sta_info *pcmn_sta_info);
 
-void
-phydm_add_interrupt_mask_handler(
-	struct PHY_DM_STRUCT		*p_dm,
-	u8							interrupt_type
-);
+void phydm_macid2sta_idx_table(struct dm_struct *dm, u8 entry_idx,
+			       struct cmn_sta_info *pcmn_sta_info);
 
-void
-phydm_enable_rx_related_interrupt_handler(
-	struct PHY_DM_STRUCT		*p_dm
-);
+void phydm_add_interrupt_mask_handler(struct dm_struct *dm, u8 interrupt_type);
+
+void phydm_enable_rx_related_interrupt_handler(struct dm_struct *dm);
 
+#if 0
 boolean
 phydm_get_txbf_en(
-	struct PHY_DM_STRUCT		*p_dm,
+	struct dm_struct		*dm,
 	u16		mac_id,
 	u8		i
 );
+#endif
 
-void
-phydm_iqk_wait(
-	struct PHY_DM_STRUCT		*p_dm,
-	u32		timeout
-);
-#endif /* __ODM_INTERFACE_H__ */
+void phydm_iqk_wait(struct dm_struct *dm, u32 timeout);
+
+u8 phydm_get_hwrate_to_mrate(struct dm_struct *dm, u8 rate);
 
+void phydm_set_crystalcap(struct dm_struct *dm, u8 crystal_cap);
+void phydm_run_in_thread_cmd(struct dm_struct *dm, void (*func)(void *),
+			     void *context);
+u32 phydm_get_tx_rate(struct dm_struct *dm);
+#endif /* @__ODM_INTERFACE_H__ */
diff --git a/rtl8723DS/hal/phydm/phydm_lna_sat.c b/rtl8723DS/hal/phydm/phydm_lna_sat.c
new file mode 100644
index 0000000..5320468
--- a/dev/null
+++ b/rtl8723DS/hal/phydm/phydm_lna_sat.c
@@ -0,0 +1,1343 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2007 - 2017  Realtek Corporation.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ *
+ * The full GNU General Public License is included in this distribution in the
+ * file called LICENSE.
+ *
+ * Contact Information:
+ * wlanfae <wlanfae@realtek.com>
+ * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
+ * Hsinchu 300, Taiwan.
+ *
+ * Larry Finger <Larry.Finger@lwfinger.net>
+ *
+ *****************************************************************************/
+
+/*************************************************************
+ * include files
+ * *************************************************************/
+#include "mp_precomp.h"
+#include "phydm_precomp.h"
+
+#ifdef PHYDM_LNA_SAT_CHK_SUPPORT
+
+#ifdef PHYDM_LNA_SAT_CHK_TYPE1
+void phydm_lna_sat_chk_init(
+	void *dm_void)
+{
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct phydm_lna_sat_t *lna_info = &dm->dm_lna_sat_info;
+
+	PHYDM_DBG(dm, DBG_LNA_SAT_CHK, "%s ==>\n", __func__);
+
+	lna_info->check_time = 0;
+	lna_info->sat_cnt_acc_patha = 0;
+	lna_info->sat_cnt_acc_pathb = 0;
+	#ifdef PHYDM_IC_ABOVE_3SS
+	lna_info->sat_cnt_acc_pathc = 0;
+	#endif
+	#ifdef PHYDM_IC_ABOVE_4SS
+	lna_info->sat_cnt_acc_pathd = 0;
+	#endif
+	lna_info->cur_sat_status = 0;
+	lna_info->pre_sat_status = 0;
+	lna_info->cur_timer_check_cnt = 0;
+	lna_info->pre_timer_check_cnt = 0;
+
+	#if (RTL8198F_SUPPORT || RTL8814B_SUPPORT)
+	if (dm->support_ic_type &
+	    (ODM_RTL8198F | ODM_RTL8814B))
+		phydm_lna_sat_chk_bb_init(dm);
+	#endif
+}
+
+#if (RTL8198F_SUPPORT || RTL8814B_SUPPORT)
+void phydm_lna_sat_chk_bb_init(void *dm_void)
+{
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct phydm_lna_sat_t *lna_info = &dm->dm_lna_sat_info;
+
+	boolean disable_bb_switch_tab = false;
+
+	PHYDM_DBG(dm, DBG_LNA_SAT_CHK, "%s ==>\n", __func__);
+
+	/*@set table switch mux r_6table_sel_anten*/
+	odm_set_bb_reg(dm, 0x18ac, BIT(8), 0);
+
+	/*@tab decision when idle*/
+	odm_set_bb_reg(dm, 0x18ac, BIT(16), disable_bb_switch_tab);
+	odm_set_bb_reg(dm, 0x41ac, BIT(16), disable_bb_switch_tab);
+	odm_set_bb_reg(dm, 0x52ac, BIT(16), disable_bb_switch_tab);
+	odm_set_bb_reg(dm, 0x53ac, BIT(16), disable_bb_switch_tab);
+	/*@tab decision when ofdmcca*/
+	odm_set_bb_reg(dm, 0x18ac, BIT(17), disable_bb_switch_tab);
+	odm_set_bb_reg(dm, 0x41ac, BIT(17), disable_bb_switch_tab);
+	odm_set_bb_reg(dm, 0x52ac, BIT(17), disable_bb_switch_tab);
+	odm_set_bb_reg(dm, 0x53ac, BIT(17), disable_bb_switch_tab);
+}
+
+void phydm_set_ofdm_agc_tab_path(
+	void *dm_void,
+	u8 tab_sel,
+	enum rf_path path)
+{
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+
+	PHYDM_DBG(dm, DBG_LNA_SAT_CHK, "%s ==>\n", __func__);
+	if (dm->support_ic_type & (ODM_RTL8198F | ODM_RTL8814B)) {
+		PHYDM_DBG(dm, DBG_LNA_SAT_CHK, "set AGC Tab%d\n", tab_sel);
+		PHYDM_DBG(dm, DBG_LNA_SAT_CHK, "r_6table_sel_anten = 0x%x\n",
+			  odm_get_bb_reg(dm, 0x18ac, BIT(8)));
+	}
+
+	if (dm->support_ic_type & ODM_RTL8198F) {
+		/*@table sel:0/2, mapping 2 to 1 */
+		if (tab_sel == OFDM_AGC_TAB_0) {
+			odm_set_bb_reg(dm, 0x18ac, BIT(4), 0);
+			odm_set_bb_reg(dm, 0x41ac, BIT(4), 0);
+			odm_set_bb_reg(dm, 0x52ac, BIT(4), 0);
+			odm_set_bb_reg(dm, 0x53ac, BIT(4), 0);
+		} else if (tab_sel == OFDM_AGC_TAB_2) {
+			odm_set_bb_reg(dm, 0x18ac, BIT(4), 1);
+			odm_set_bb_reg(dm, 0x41ac, BIT(4), 1);
+			odm_set_bb_reg(dm, 0x52ac, BIT(4), 1);
+			odm_set_bb_reg(dm, 0x53ac, BIT(4), 1);
+		} else {
+			odm_set_bb_reg(dm, 0x18ac, BIT(4), 0);
+			odm_set_bb_reg(dm, 0x41ac, BIT(4), 0);
+			odm_set_bb_reg(dm, 0x52ac, BIT(4), 0);
+			odm_set_bb_reg(dm, 0x53ac, BIT(4), 0);
+		}
+	} else if (dm->support_ic_type & ODM_RTL8814B) {
+		if (tab_sel == OFDM_AGC_TAB_0) {
+			odm_set_bb_reg(dm, 0x18ac, 0xf0, 0);
+			odm_set_bb_reg(dm, 0x41ac, 0xf0, 0);
+			odm_set_bb_reg(dm, 0x52ac, 0xf0, 0);
+			odm_set_bb_reg(dm, 0x53ac, 0xf0, 0);
+		} else if (tab_sel == OFDM_AGC_TAB_2) {
+			odm_set_bb_reg(dm, 0x18ac, 0xf0, 2);
+			odm_set_bb_reg(dm, 0x41ac, 0xf0, 2);
+			odm_set_bb_reg(dm, 0x52ac, 0xf0, 2);
+			odm_set_bb_reg(dm, 0x53ac, 0xf0, 2);
+		} else {
+			odm_set_bb_reg(dm, 0x18ac, 0xf0, 0);
+			odm_set_bb_reg(dm, 0x41ac, 0xf0, 0);
+			odm_set_bb_reg(dm, 0x52ac, 0xf0, 0);
+			odm_set_bb_reg(dm, 0x53ac, 0xf0, 0);
+		}
+	}
+}
+
+u8 phydm_get_ofdm_agc_tab_path(
+	void *dm_void,
+	enum rf_path path)
+{
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	u8 tab_sel = 0;
+
+	if (dm->support_ic_type & ODM_RTL8198F) {
+		tab_sel = (u8)odm_get_bb_reg(dm, R_0x18ac, BIT(4));
+		if (tab_sel == 0)
+			tab_sel = OFDM_AGC_TAB_0;
+		else if (tab_sel == 1)
+			tab_sel = OFDM_AGC_TAB_2;
+	} else if (dm->support_ic_type & ODM_RTL8814B) {
+		tab_sel = (u8)odm_get_bb_reg(dm, R_0x18ac, 0xf0);
+		if (tab_sel == 0)
+			tab_sel = OFDM_AGC_TAB_0;
+		else if (tab_sel == 2)
+			tab_sel = OFDM_AGC_TAB_2;
+	}
+	PHYDM_DBG(dm, DBG_LNA_SAT_CHK, "get path %d AGC Tab %d\n",
+		  path, tab_sel);
+	return tab_sel;
+}
+#endif /*@#if (RTL8198F_SUPPORT || RTL8814B_SUPPORT)*/
+
+void phydm_set_ofdm_agc_tab(
+	void *dm_void,
+	u8 tab_sel)
+{
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+
+	/*@table sel:0/2, 1 is used for CCK */
+	if (tab_sel == OFDM_AGC_TAB_0)
+		odm_set_bb_reg(dm, R_0xc70, 0x1e00, OFDM_AGC_TAB_0);
+	else if (tab_sel == OFDM_AGC_TAB_2)
+		odm_set_bb_reg(dm, R_0xc70, 0x1e00, OFDM_AGC_TAB_2);
+	else
+		odm_set_bb_reg(dm, R_0xc70, 0x1e00, OFDM_AGC_TAB_0);
+}
+
+u8 phydm_get_ofdm_agc_tab(
+	void *dm_void)
+{
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+
+	return (u8)odm_get_bb_reg(dm, R_0xc70, 0x1e00);
+}
+
+void phydm_lna_sat_chk(
+	void *dm_void)
+{
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct phydm_dig_struct *dig_t = &dm->dm_dig_table;
+	struct phydm_lna_sat_t *lna_info = &dm->dm_lna_sat_info;
+	u8 igi_rssi_min;
+	u8 rssi_min = dm->rssi_min;
+	u32 sat_status_a, sat_status_b;
+	#ifdef PHYDM_IC_ABOVE_3SS
+	u32 sat_status_c;
+	#endif
+	#ifdef PHYDM_IC_ABOVE_4SS
+	u32 sat_status_d;
+	#endif
+	u8 igi_restore = dig_t->cur_ig_value;
+	u8 i, chk_cnt = lna_info->chk_cnt;
+	u32 lna_sat_cnt_thd = 0;
+	u8 agc_tab;
+	u32 max_check_time = 0;
+	/*@use rssi_max if rssi_min is not stable;*/
+	/*@rssi_min = dm->rssi_max;*/
+
+	PHYDM_DBG(dm, DBG_LNA_SAT_CHK, "\n%s ==>\n", __func__);
+
+	if (!(dm->support_ability & ODM_BB_LNA_SAT_CHK)) {
+		PHYDM_DBG(dm, DBG_LNA_SAT_CHK, "Func disable\n");
+		return;
+	}
+
+	if (lna_info->is_disable_lna_sat_chk) {
+		phydm_lna_sat_chk_init(dm);
+		PHYDM_DBG(dm, DBG_LNA_SAT_CHK, "disable_lna_sat_chk\n");
+		return;
+	}
+
+	/*@move igi to target pin of rssi_min */
+	if (rssi_min == 0 || rssi_min == 0xff) {
+		PHYDM_DBG(dm, DBG_LNA_SAT_CHK,
+			  "rssi_min=%d, set AGC Tab0\n", rssi_min);
+		/*@adapt agc table 0*/
+		phydm_set_ofdm_agc_tab(dm, OFDM_AGC_TAB_0);
+		phydm_lna_sat_chk_init(dm);
+		return;
+	} else if (rssi_min % 2 != 0) {
+		igi_rssi_min = rssi_min + DIFF_RSSI_TO_IGI - 1;
+	} else {
+		igi_rssi_min = rssi_min + DIFF_RSSI_TO_IGI;
+	}
+
+	if ((lna_info->chk_period > 0) && (lna_info->chk_period <= ONE_SEC_MS))
+		max_check_time = chk_cnt * (ONE_SEC_MS / (lna_info->chk_period)) * 5;
+	else
+		max_check_time = chk_cnt * 5;
+
+	lna_sat_cnt_thd = (max_check_time * lna_info->chk_duty_cycle) / 100;
+
+	PHYDM_DBG(dm, DBG_LNA_SAT_CHK,
+		  "check_time=%d, rssi_min=%d, igi_rssi_min=0x%x\nchk_cnt=%d, chk_period=%d, max_check_time=%d, lna_sat_cnt_thd=%d\n",
+		  lna_info->check_time,
+		  rssi_min,
+		  igi_rssi_min,
+		  chk_cnt,
+		  lna_info->chk_period,
+		  max_check_time,
+		  lna_sat_cnt_thd);
+
+	odm_write_dig(dm, igi_rssi_min);
+
+	/*@adapt agc table 0 check saturation status*/
+	#if (RTL8198F_SUPPORT || RTL8814B_SUPPORT)
+	if (dm->support_ic_type & (ODM_RTL8198F | ODM_RTL8814B))
+		phydm_set_ofdm_agc_tab_path(dm, OFDM_AGC_TAB_0, RF_PATH_A);
+	else
+	#endif
+		phydm_set_ofdm_agc_tab(dm, OFDM_AGC_TAB_0);
+	/*@open rf power detection ckt & set detection range */
+	#if (RTL8198F_SUPPORT || RTL8814B_SUPPORT)
+	if (dm->support_ic_type & ODM_RTL8198F) {
+		/*@set rf detection range (threshold)*/
+		config_phydm_write_rf_reg_8198f(dm, RF_PATH_A, 0x85,
+						0x3f, 0x3f);
+		config_phydm_write_rf_reg_8198f(dm, RF_PATH_B, 0x85,
+						0x3f, 0x3f);
+		config_phydm_write_rf_reg_8198f(dm, RF_PATH_C, 0x85,
+						0x3f, 0x3f);
+		config_phydm_write_rf_reg_8198f(dm, RF_PATH_D, 0x85,
+						0x3f, 0x3f);
+		/*@open rf power detection ckt*/
+		config_phydm_write_rf_reg_8198f(dm, RF_PATH_A, 0x86, 0x10, 1);
+		config_phydm_write_rf_reg_8198f(dm, RF_PATH_B, 0x86, 0x10, 1);
+		config_phydm_write_rf_reg_8198f(dm, RF_PATH_C, 0x86, 0x10, 1);
+		config_phydm_write_rf_reg_8198f(dm, RF_PATH_D, 0x86, 0x10, 1);
+	} else if (dm->support_ic_type & ODM_RTL8814B) {
+		/*@set rf detection range (threshold)*/
+#if 0
+		config_phydm_write_rf_reg_8814b(dm, RF_PATH_A, 0x87, 0x3, 0x3);
+		config_phydm_write_rf_reg_8814b(dm, RF_PATH_B, 0x87, 0x3, 0x3);
+		config_phydm_write_rf_reg_8814b(dm, RF_PATH_C, 0x87, 0x3, 0x3);
+		config_phydm_write_rf_reg_8814b(dm, RF_PATH_D, 0x87, 0x3, 0x3);
+#endif
+		/*@open rf power detection ckt*/
+#if 0
+		config_phydm_write_rf_reg_8814b(dm, RF_PATH_A, 0x87, 0x10, 1);
+		config_phydm_write_rf_reg_8814b(dm, RF_PATH_B, 0x87, 0x10, 1);
+		config_phydm_write_rf_reg_8814b(dm, RF_PATH_C, 0x87, 0x10, 1);
+		config_phydm_write_rf_reg_8814b(dm, RF_PATH_D, 0x87, 0x10, 1);
+#endif
+	} else
+	#endif
+	{
+		odm_set_rf_reg(dm, RF_PATH_A, RF_0x86, 0x1f, 0x10);
+		odm_set_rf_reg(dm, RF_PATH_B, RF_0x86, 0x1f, 0x10);
+		#ifdef PHYDM_IC_ABOVE_3SS
+		odm_set_rf_reg(dm, RF_PATH_C, RF_0x86, 0x1f, 0x10);
+		#endif
+		#ifdef PHYDM_IC_ABOVE_4SS
+		odm_set_rf_reg(dm, RF_PATH_D, RF_0x86, 0x1f, 0x10);
+		#endif
+	}
+
+	/*@check saturation status*/
+	for (i = 0; i < chk_cnt; i++) {
+	#if (RTL8198F_SUPPORT || RTL8814B_SUPPORT)
+	if (dm->support_ic_type & ODM_RTL8198F) {
+		sat_status_a = config_phydm_read_rf_reg_8198f(dm, RF_PATH_A,
+							      RF_0xae,
+							      0xe0000);
+		sat_status_b = config_phydm_read_rf_reg_8198f(dm, RF_PATH_B,
+							      RF_0xae,
+							      0xe0000);
+		sat_status_c = config_phydm_read_rf_reg_8198f(dm, RF_PATH_C,
+							      RF_0xae,
+							      0xe0000);
+		sat_status_d = config_phydm_read_rf_reg_8198f(dm, RF_PATH_D,
+							      RF_0xae,
+							      0xe0000);
+	} else if (dm->support_ic_type & ODM_RTL8814B) {
+	/*@read peak detector info from 8814B rf reg*/
+#if 0
+		sat_status_a = config_phydm_read_rf_reg_8814b(dm, RF_PATH_A,
+							      RF_0xae,
+							      0xc0000);
+		sat_status_b = config_phydm_read_rf_reg_8814b(dm, RF_PATH_B,
+							      RF_0xae,
+							      0xc0000);
+		sat_status_c = config_phydm_read_rf_reg_8814b(dm, RF_PATH_C,
+							      RF_0xae,
+							      0xc0000);
+		sat_status_d = config_phydm_read_rf_reg_8814b(dm, RF_PATH_D,
+							      RF_0xae,
+							      0xc0000);
+#endif
+	} else
+	#endif
+	{
+		sat_status_a = odm_get_rf_reg(dm, RF_PATH_A, RF_0xae, 0xc0000);
+		sat_status_b = odm_get_rf_reg(dm, RF_PATH_B, RF_0xae, 0xc0000);
+		#ifdef PHYDM_IC_ABOVE_3SS
+		sat_status_c = odm_get_rf_reg(dm, RF_PATH_C, RF_0xae, 0xc0000);
+		#endif
+		#ifdef PHYDM_IC_ABOVE_4SS
+		sat_status_d = odm_get_rf_reg(dm, RF_PATH_D, RF_0xae, 0xc0000);
+		#endif
+	}
+
+		if (sat_status_a != 0)
+			lna_info->sat_cnt_acc_patha++;
+		if (sat_status_b != 0)
+			lna_info->sat_cnt_acc_pathb++;
+		#ifdef PHYDM_IC_ABOVE_3SS
+		if (sat_status_c != 0)
+			lna_info->sat_cnt_acc_pathc++;
+		#endif
+		#ifdef PHYDM_IC_ABOVE_4SS
+		if (sat_status_d != 0)
+			lna_info->sat_cnt_acc_pathd++;
+		#endif
+
+		if (lna_info->sat_cnt_acc_patha >= lna_sat_cnt_thd ||
+		    lna_info->sat_cnt_acc_pathb >= lna_sat_cnt_thd ||
+		    #ifdef PHYDM_IC_ABOVE_3SS
+		    lna_info->sat_cnt_acc_pathc >= lna_sat_cnt_thd ||
+		    #endif
+		    #ifdef PHYDM_IC_ABOVE_4SS
+		    lna_info->sat_cnt_acc_pathd >= lna_sat_cnt_thd ||
+		    #endif
+		    0) {
+			lna_info->cur_sat_status = 1;
+			PHYDM_DBG(dm, DBG_LNA_SAT_CHK,
+				  "cur_sat_status=%d, check_time=%d\n",
+				  lna_info->cur_sat_status,
+				  lna_info->check_time);
+			break;
+		}
+		lna_info->cur_sat_status = 0;
+	}
+
+	PHYDM_DBG(dm, DBG_LNA_SAT_CHK,
+		  "cur_sat_status=%d, pre_sat_status=%d, sat_cnt_acc_patha=%d, sat_cnt_acc_pathb=%d\n",
+		  lna_info->cur_sat_status,
+		  lna_info->pre_sat_status,
+		  lna_info->sat_cnt_acc_patha,
+		  lna_info->sat_cnt_acc_pathb);
+
+	#ifdef PHYDM_IC_ABOVE_4SS
+	PHYDM_DBG(dm, DBG_LNA_SAT_CHK,
+		  "cur_sat_status=%d, pre_sat_status=%d, sat_cnt_acc_pathc=%d, sat_cnt_acc_pathd=%d\n",
+		  lna_info->cur_sat_status,
+		  lna_info->pre_sat_status,
+		  lna_info->sat_cnt_acc_pathc,
+		  lna_info->sat_cnt_acc_pathd);
+	#endif
+	/*@agc table decision*/
+	if (lna_info->cur_sat_status) {
+		if (!lna_info->dis_agc_table_swh)
+			#if (RTL8198F_SUPPORT || RTL8814B_SUPPORT)
+			if (dm->support_ic_type & (ODM_RTL8198F | ODM_RTL8814B))
+				phydm_set_ofdm_agc_tab_path(dm,
+							    OFDM_AGC_TAB_2,
+							    RF_PATH_A);
+			else
+			#endif
+				phydm_set_ofdm_agc_tab(dm, OFDM_AGC_TAB_2);
+		else
+			PHYDM_DBG(dm, DBG_LNA_SAT_CHK,
+				  "disable set to AGC Tab%d\n", OFDM_AGC_TAB_2);
+		lna_info->check_time = 0;
+		lna_info->sat_cnt_acc_patha = 0;
+		lna_info->sat_cnt_acc_pathb = 0;
+		#ifdef PHYDM_IC_ABOVE_3SS
+		lna_info->sat_cnt_acc_pathc = 0;
+		#endif
+		#ifdef PHYDM_IC_ABOVE_4SS
+		lna_info->sat_cnt_acc_pathd = 0;
+		#endif
+		lna_info->pre_sat_status = lna_info->cur_sat_status;
+
+	} else if (lna_info->check_time <= (max_check_time - 1)) {
+		if (lna_info->pre_sat_status && !lna_info->dis_agc_table_swh)
+			#if (RTL8198F_SUPPORT || RTL8814B_SUPPORT)
+			if (dm->support_ic_type & (ODM_RTL8198F | ODM_RTL8814B))
+				phydm_set_ofdm_agc_tab_path(dm,
+							    OFDM_AGC_TAB_2,
+							    RF_PATH_A);
+			else
+			#endif
+				phydm_set_ofdm_agc_tab(dm, OFDM_AGC_TAB_2);
+
+		PHYDM_DBG(dm, DBG_LNA_SAT_CHK, "ckeck time not reached\n");
+		if (lna_info->dis_agc_table_swh)
+			PHYDM_DBG(dm, DBG_LNA_SAT_CHK,
+				  "disable set to AGC Tab%d\n", OFDM_AGC_TAB_2);
+		lna_info->check_time++;
+
+	} else if (lna_info->check_time >= max_check_time) {
+		if (!lna_info->dis_agc_table_swh)
+			#if (RTL8198F_SUPPORT || RTL8814B_SUPPORT)
+			if (dm->support_ic_type & (ODM_RTL8198F | ODM_RTL8814B))
+				phydm_set_ofdm_agc_tab_path(dm,
+							    OFDM_AGC_TAB_0,
+							    RF_PATH_A);
+			else
+			#endif
+				phydm_set_ofdm_agc_tab(dm, OFDM_AGC_TAB_0);
+
+		PHYDM_DBG(dm, DBG_LNA_SAT_CHK, "ckeck time reached\n");
+		if (lna_info->dis_agc_table_swh)
+			PHYDM_DBG(dm, DBG_LNA_SAT_CHK,
+				  "disable set to AGC Tab%d\n", OFDM_AGC_TAB_0);
+		lna_info->check_time = 0;
+		lna_info->sat_cnt_acc_patha = 0;
+		lna_info->sat_cnt_acc_pathb = 0;
+		#ifdef PHYDM_IC_ABOVE_3SS
+		lna_info->sat_cnt_acc_pathc = 0;
+		#endif
+		#ifdef PHYDM_IC_ABOVE_4SS
+		lna_info->sat_cnt_acc_pathd = 0;
+		#endif
+		lna_info->pre_sat_status = lna_info->cur_sat_status;
+	}
+
+	#if (RTL8198F_SUPPORT || RTL8814B_SUPPORT)
+	if (dm->support_ic_type & (ODM_RTL8198F | ODM_RTL8814B))
+		agc_tab = phydm_get_ofdm_agc_tab_path(dm, RF_PATH_A);
+	else
+	#endif
+		agc_tab = phydm_get_ofdm_agc_tab(dm);
+
+	PHYDM_DBG(dm, DBG_LNA_SAT_CHK, "use AGC tab %d\n", agc_tab);
+
+	/*@restore previous igi*/
+	odm_write_dig(dm, igi_restore);
+	lna_info->cur_timer_check_cnt++;
+	odm_set_timer(dm, &lna_info->phydm_lna_sat_chk_timer,
+		      lna_info->chk_period);
+}
+
+void phydm_lna_sat_chk_callback(
+	void *dm_void
+
+	)
+{
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+
+	PHYDM_DBG(dm, DBG_LNA_SAT_CHK, "\n%s ==>\n", __func__);
+	phydm_lna_sat_chk(dm);
+}
+
+void phydm_lna_sat_chk_timers(
+	void *dm_void,
+	u8 state)
+{
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct phydm_lna_sat_t *lna_info = &dm->dm_lna_sat_info;
+
+	if (state == INIT_LNA_SAT_CHK_TIMMER) {
+		odm_initialize_timer(dm,
+				     &lna_info->phydm_lna_sat_chk_timer,
+				     (void *)phydm_lna_sat_chk_callback, NULL,
+				     "phydm_lna_sat_chk_timer");
+	} else if (state == CANCEL_LNA_SAT_CHK_TIMMER) {
+		odm_cancel_timer(dm, &lna_info->phydm_lna_sat_chk_timer);
+	} else if (state == RELEASE_LNA_SAT_CHK_TIMMER) {
+		odm_release_timer(dm, &lna_info->phydm_lna_sat_chk_timer);
+	}
+}
+
+void phydm_lna_sat_chk_watchdog_type1(
+	void *dm_void)
+{
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct phydm_lna_sat_t *lna_info = &dm->dm_lna_sat_info;
+
+	u8 rssi_min = dm->rssi_min;
+
+	PHYDM_DBG(dm, DBG_LNA_SAT_CHK, "\n%s ==>\n", __func__);
+
+	if (!(dm->support_ability & ODM_BB_LNA_SAT_CHK)) {
+		PHYDM_DBG(dm, DBG_LNA_SAT_CHK,
+			  "func disable\n");
+		return;
+	}
+
+	PHYDM_DBG(dm, DBG_LNA_SAT_CHK,
+		  "pre_timer_check_cnt=%d, cur_timer_check_cnt=%d\n",
+		  lna_info->pre_timer_check_cnt,
+		  lna_info->cur_timer_check_cnt);
+
+	if (lna_info->is_disable_lna_sat_chk) {
+		phydm_lna_sat_chk_init(dm);
+		PHYDM_DBG(dm, DBG_LNA_SAT_CHK,
+			  "is_disable_lna_sat_chk=%d, return\n",
+			  lna_info->is_disable_lna_sat_chk);
+		return;
+	}
+
+	if (!(dm->support_ic_type &
+	    (ODM_RTL8197F | ODM_RTL8198F | ODM_RTL8814B))) {
+		PHYDM_DBG(dm, DBG_LNA_SAT_CHK,
+			  "support_ic_type not 97F/98F/14B, return\n");
+		return;
+	}
+
+	if (rssi_min == 0 || rssi_min == 0xff) {
+		/*@adapt agc table 0 */
+		phydm_set_ofdm_agc_tab(dm, OFDM_AGC_TAB_0);
+		phydm_lna_sat_chk_init(dm);
+		PHYDM_DBG(dm, DBG_LNA_SAT_CHK,
+			  "rssi_min=%d, return\n", rssi_min);
+		return;
+	}
+
+	if (lna_info->cur_timer_check_cnt == lna_info->pre_timer_check_cnt) {
+		PHYDM_DBG(dm, DBG_LNA_SAT_CHK, "fail, restart timer\n");
+		odm_set_timer(dm, &lna_info->phydm_lna_sat_chk_timer,
+			      lna_info->chk_period);
+	} else {
+		PHYDM_DBG(dm, DBG_LNA_SAT_CHK, "Timer check pass\n");
+	}
+	lna_info->pre_timer_check_cnt = lna_info->cur_timer_check_cnt;
+}
+
+#endif /*@#ifdef PHYDM_LNA_SAT_CHK_TYPE1*/
+
+#ifdef PHYDM_LNA_SAT_CHK_TYPE2
+
+void phydm_bubble_sort(
+	void *dm_void,
+	u8 *array,
+	u16 array_length)
+{
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	u16 i, j;
+	u8 temp;
+
+	PHYDM_DBG(dm, DBG_LNA_SAT_CHK, "%s ==>\n", __func__);
+	for (i = 0; i < (array_length - 1); i++) {
+		for (j = (i + 1); j < (array_length); j++) {
+			if (array[i] > array[j]) {
+				temp = array[i];
+				array[i] = array[j];
+				array[j] = temp;
+			}
+		}
+	}
+}
+
+void phydm_lna_sat_chk_type2_init(
+	void *dm_void)
+{
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct phydm_lna_sat_t	*pinfo = &dm->dm_lna_sat_info;
+	u8 real_shift = pinfo->total_bit_shift;
+
+	PHYDM_DBG(dm, DBG_LNA_SAT_CHK, "%s ==>\n", __func__);
+
+	pinfo->total_cnt_snr = 1 << real_shift;
+	pinfo->is_sm_done = TRUE;
+	pinfo->is_snr_done = FALSE;
+	pinfo->cur_snr_mean = 0;
+	pinfo->cur_snr_var = 0;
+	pinfo->cur_lower_snr_mean = 0;
+	pinfo->pre_snr_mean = 0;
+	pinfo->pre_snr_var = 0;
+	pinfo->pre_lower_snr_mean = 0;
+	pinfo->nxt_state = ORI_TABLE_MONITOR;
+	pinfo->pre_state = ORI_TABLE_MONITOR;
+}
+
+void phydm_snr_collect(
+	void *dm_void,
+	u8 rx_snr)
+{
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct phydm_lna_sat_t	*pinfo = &dm->dm_lna_sat_info;
+
+	if (pinfo->is_sm_done) {
+#if 0
+		/*PHYDM_DBG(dm, DBG_LNA_SAT_CHK, "%s ==>\n", __func__);*/
+#endif
+
+		/* @adapt only path-A for calculation */
+		pinfo->snr_statistic[pinfo->cnt_snr_statistic] = rx_snr;
+
+		if (pinfo->cnt_snr_statistic == (pinfo->total_cnt_snr - 1)) {
+			pinfo->is_snr_done = TRUE;
+			pinfo->cnt_snr_statistic = 0;
+		} else {
+			pinfo->cnt_snr_statistic++;
+		}
+	} else {
+		return;
+	}
+}
+
+void phydm_parsing_snr(void *dm_void, void *pktinfo_void, s8 *rx_snr)
+{
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct phydm_lna_sat_t	*lna_t = &dm->dm_lna_sat_info;
+	struct phydm_perpkt_info_struct *pktinfo = NULL;
+	u8 target_macid = dm->rssi_min_macid;
+
+	if (!(dm->support_ability & ODM_BB_LNA_SAT_CHK))
+		return;
+
+	pktinfo = (struct phydm_perpkt_info_struct *)pktinfo_void;
+
+	if (!pktinfo->is_packet_match_bssid)
+		return;
+
+	if (lna_t->force_traget_macid != 0)
+		target_macid = lna_t->force_traget_macid;
+
+	if (target_macid != pktinfo->station_id)
+		return;
+
+	phydm_snr_collect(dm, rx_snr[0]); /*path-A B C D???*/
+}
+
+void phydm_snr_data_processing(
+	void *dm_void)
+{
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct phydm_lna_sat_t	*pinfo = &dm->dm_lna_sat_info;
+	u8 real_shift = pinfo->total_bit_shift;
+	u16 total_snr_cnt = pinfo->total_cnt_snr;
+	u16 total_loop_cnt = (total_snr_cnt - 1), i;
+	u32 temp;
+	u32 sum_snr_statistic = 0;
+
+	PHYDM_DBG(dm, DBG_LNA_SAT_CHK, "%s ==>\n", __func__);
+	PHYDM_DBG(dm, DBG_LNA_SAT_CHK,
+		  "total_loop_cnt=%d\n", total_loop_cnt);
+
+	for (i = 0; (i <= total_loop_cnt); i++) {
+		if (pinfo->is_snr_detail_en) {
+			PHYDM_DBG(dm, DBG_LNA_SAT_CHK,
+				  "snr[%d]=%d\n", i, pinfo->snr_statistic[i]);
+		}
+
+		sum_snr_statistic += (u32)(pinfo->snr_statistic[i]);
+
+		pinfo->snr_statistic_sqr[i] = (u16)(pinfo->snr_statistic[i] * pinfo->snr_statistic[i]);
+	}
+
+	phydm_bubble_sort(dm, pinfo->snr_statistic, pinfo->total_cnt_snr);
+
+	/*update SNR's cur mean*/
+	pinfo->cur_snr_mean = (sum_snr_statistic >> real_shift);
+
+	for (i = 0; (i <= total_loop_cnt); i++) {
+		if (pinfo->snr_statistic[i] >= pinfo->cur_snr_mean)
+			temp = pinfo->snr_statistic[i] - pinfo->cur_snr_mean;
+		else
+			temp = pinfo->cur_snr_mean - pinfo->snr_statistic[i];
+
+		pinfo->cur_snr_var += (temp * temp);
+	}
+
+	/*update SNR's VAR*/
+	pinfo->cur_snr_var = (pinfo->cur_snr_var >> real_shift);
+
+	/*@acquire lower SNR's statistics*/
+	temp = 0;
+	pinfo->cnt_lower_snr_statistic = (total_snr_cnt >> pinfo->lwr_snr_ratio_bit_shift);
+	pinfo->cnt_lower_snr_statistic = MAX_2(pinfo->cnt_lower_snr_statistic, SNR_RPT_MAX);
+
+	for (i = 0; i < pinfo->cnt_lower_snr_statistic; i++)
+		temp += pinfo->snr_statistic[i];
+
+	pinfo->cur_lower_snr_mean = temp >> (real_shift - pinfo->lwr_snr_ratio_bit_shift);
+}
+
+boolean phydm_is_snr_improve(
+	void *dm_void)
+{
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct phydm_lna_sat_t	*pinfo = &dm->dm_lna_sat_info;
+	boolean is_snr_improve;
+	u8 cur_state = pinfo->nxt_state;
+	u32 cur_mean = pinfo->cur_snr_mean;
+	u32 pre_mean = pinfo->pre_snr_mean;
+	u32 cur_lower_mean = pinfo->cur_lower_snr_mean;
+	u32 pre_lower_mean = pinfo->pre_lower_snr_mean;
+	u32 cur_var = pinfo->cur_snr_var;
+
+	/*special case, zero VAR, interference is gone*/
+	 /*@make sure pre_var is larger enough*/
+	if (cur_state == SAT_TABLE_MONITOR ||
+	    cur_state == ORI_TABLE_TRAINING) {
+		if (cur_mean >= pre_mean) {
+			if (cur_var == 0)
+				return true;
+		}
+	}
+#if 0
+	/*special case, mean degrade less than VAR improvement*/
+	/*@make sure pre_var is larger enough*/
+	if (cur_state == ORI_TABLE_MONITOR &&
+	    cur_mean < pre_mean &&
+	    cur_var < pre_var) {
+		diff_mean = pre_mean - cur_mean;
+		diff_var = pre_var - cur_var;
+		return (diff_var > (2 * diff_mean * diff_mean)) ? true : false;
+	}
+
+#endif
+	if (cur_lower_mean >= (pre_lower_mean + pinfo->delta_snr_mean))
+		is_snr_improve = true;
+	else
+		is_snr_improve = false;
+#if 0
+/* @condition refine, mean is bigger enough or VAR is smaller enough*/
+/* @1. from mean's view, mean improve delta_snr_mean(2), VAR not degrade lot*/
+	if (cur_mean > (pre_mean + pinfo->delta_snr_mean)) {
+		is_mean_improve = TRUE;
+		is_var_improve = (cur_var <= pre_var + dm->delta_snr_var)
+				 ? TRUE : FALSE;
+
+	} else if (cur_var + dm->delta_snr_var <= pre_var) {
+		is_var_improve = TRUE;
+		is_mean_improve = ((cur_mean + 1) >= pre_mean) ? TRUE : FALSE;
+	} else {
+		return false;
+	}
+#endif
+	return is_snr_improve;
+}
+
+boolean phydm_is_snr_degrade(
+	void *dm_void)
+{
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct phydm_lna_sat_t	*pinfo = &dm->dm_lna_sat_info;
+	u32 cur_lower_mean = pinfo->cur_lower_snr_mean;
+	u32 pre_lower_mean = pinfo->pre_lower_snr_mean;
+	boolean is_degrade;
+
+	if (cur_lower_mean <= (pre_lower_mean - pinfo->delta_snr_mean))
+		is_degrade = TRUE;
+	else
+		is_degrade = FALSE;
+#if 0
+	is_mean_dgrade = (pinfo->cur_snr_mean + pinfo->delta_snr_mean <= pinfo->pre_snr_mean) ? TRUE : FALSE;
+	is_var_degrade = (pinfo->cur_snr_var > (pinfo->pre_snr_var + pinfo->delta_snr_mean)) ? TRUE : FALSE;
+
+	PHYDM_DBG(dm, DBG_LNA_SAT_CHK, "%s: cur_mean=%d, pre_mean=%d, cur_var=%d, pre_var=%d\n",
+		  __func__,
+		  pinfo->cur_snr_mean,
+		  pinfo->pre_snr_mean,
+		  pinfo->cur_snr_var,
+		  pinfo->pre_snr_var);
+
+	return (is_mean_dgrade & is_var_degrade);
+#endif
+	return is_degrade;
+}
+
+boolean phydm_is_large_var(
+	void *dm_void)
+{
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct phydm_lna_sat_t	*pinfo = &dm->dm_lna_sat_info;
+	boolean is_large_var = (pinfo->cur_snr_var >= pinfo->snr_var_thd) ? TRUE : FALSE;
+
+	return is_large_var;
+}
+
+void phydm_update_pre_status(
+	void *dm_void)
+{
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct phydm_lna_sat_t	*pinfo = &dm->dm_lna_sat_info;
+
+	pinfo->pre_lower_snr_mean = pinfo->cur_lower_snr_mean;
+	pinfo->pre_snr_mean = pinfo->cur_snr_mean;
+	pinfo->pre_snr_var = pinfo->cur_snr_var;
+}
+
+void phydm_ori_table_monitor(
+	void *dm_void)
+{
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct phydm_lna_sat_t	*pinfo = &dm->dm_lna_sat_info;
+
+	if (phydm_is_large_var(dm)) {
+		pinfo->nxt_state = SAT_TABLE_TRAINING;
+		config_phydm_switch_agc_tab_8822b(dm, *dm->channel, LNA_SAT_AGC_TABLE);
+	} else {
+		pinfo->nxt_state = ORI_TABLE_MONITOR;
+		/*switch to anti-sat table*/
+		config_phydm_switch_agc_tab_8822b(dm, *dm->channel, DEFAULT_AGC_TABLE);
+	}
+	phydm_update_pre_status(dm);
+	pinfo->pre_state = ORI_TABLE_MONITOR;
+}
+
+void phydm_sat_table_training(
+	void *dm_void)
+{
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct phydm_lna_sat_t	*pinfo = &dm->dm_lna_sat_info;
+
+	#if 0
+	if pre_state = ORI_TABLE_MONITOR || SAT_TABLE_TRY_FAIL,
+	/*@"pre" adapt ori-table, "cur" adapt sat-table*/
+	/*@adapt ori table*/
+	if (pinfo->pre_state == ORI_TABLE_MONITOR) {
+		pinfo->nxt_state = SAT_TABLE_TRAINING;
+		config_phydm_switch_agc_tab_8822b(dm, *dm->channel, LNA_SAT_AGC_TABLE);
+	} else {
+	#endif
+	if (phydm_is_snr_improve(dm)) {
+		pinfo->nxt_state = SAT_TABLE_MONITOR;
+	} else {
+		pinfo->nxt_state = SAT_TABLE_TRY_FAIL;
+		config_phydm_switch_agc_tab_8822b(dm, *dm->channel, DEFAULT_AGC_TABLE);
+	}
+	/*@}*/
+
+	phydm_update_pre_status(dm);
+	pinfo->pre_state = SAT_TABLE_TRAINING;
+}
+
+void phydm_sat_table_try_fail(
+	void *dm_void)
+{
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct phydm_lna_sat_t	*pinfo = &dm->dm_lna_sat_info;
+
+	/* @if pre_state = SAT_TABLE_TRAINING, "pre" adapt sat-table, "cur" adapt ori-table */
+	/* @if pre_state = SAT_TABLE_TRY_FAIL, "pre" adapt ori-table, "cur" adapt ori-table */
+
+	if (phydm_is_large_var(dm)) {
+		if (phydm_is_snr_degrade(dm)) {
+			pinfo->nxt_state = SAT_TABLE_TRAINING;
+			config_phydm_switch_agc_tab_8822b(dm, *dm->channel, LNA_SAT_AGC_TABLE);
+		} else {
+			pinfo->nxt_state = SAT_TABLE_TRY_FAIL;
+		}
+	} else {
+		pinfo->nxt_state = ORI_TABLE_MONITOR;
+	}
+	phydm_update_pre_status(dm);
+	pinfo->pre_state = SAT_TABLE_TRY_FAIL;
+}
+
+void phydm_sat_table_monitor(
+	void *dm_void)
+{
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct phydm_lna_sat_t	*pinfo = &dm->dm_lna_sat_info;
+
+	if (phydm_is_snr_improve(dm)) {
+		pinfo->sat_table_monitor_times = 0;
+
+		/* @if pre_state = SAT_TABLE_MONITOR, "pre" adapt sat-table, "cur" adapt sat-table */
+		if (pinfo->pre_state == SAT_TABLE_MONITOR) {
+			pinfo->nxt_state = ORI_TABLE_TRAINING;
+			config_phydm_switch_agc_tab_8822b(dm, *dm->channel, DEFAULT_AGC_TABLE);
+			//phydm_update_pre_status(dm);
+		} else {
+			pinfo->nxt_state = SAT_TABLE_MONITOR;
+		}
+
+		/* @if pre_state = SAT_TABLE_TRAINING, "pre" adapt sat-table, "cur" adapt sat-table */
+		/* @if pre_state = ORI_TABLE_TRAINING, "pre" adapt ori-table, "cur" adapt sat-table */
+		/*pre_state above is no need to update*/
+	} else {
+		if (pinfo->sat_table_monitor_times == pinfo->force_change_period) {
+			PHYDM_DBG(dm, DBG_LNA_SAT_CHK, "%s: sat_table_monitor_times=%d\n",
+				  __func__, pinfo->sat_table_monitor_times);
+
+			pinfo->nxt_state = ORI_TABLE_TRAINING;
+			pinfo->sat_table_monitor_times = 0;
+			config_phydm_switch_agc_tab_8822b(dm, *dm->channel, DEFAULT_AGC_TABLE);
+		} else {
+			pinfo->nxt_state = SAT_TABLE_MONITOR;
+			pinfo->sat_table_monitor_times++;
+		}
+	}
+	phydm_update_pre_status(dm);
+	pinfo->pre_state = SAT_TABLE_MONITOR;
+}
+
+void phydm_ori_table_training(
+	void *dm_void)
+{
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct phydm_lna_sat_t	*pinfo = &dm->dm_lna_sat_info;
+
+	/* pre_state = SAT_TABLE_MONITOR, "pre" adapt sat-table, "cur" adapt ori-table */
+
+	if (phydm_is_snr_degrade(dm) == FALSE) {
+		pinfo->nxt_state = ORI_TABLE_MONITOR;
+	} else {
+		if (pinfo->pre_snr_var == 0)
+			pinfo->nxt_state = ORI_TABLE_TRY_FAIL;
+		else
+			pinfo->nxt_state = SAT_TABLE_MONITOR;
+
+		config_phydm_switch_agc_tab_8822b(dm, *dm->channel, LNA_SAT_AGC_TABLE);
+	}
+	phydm_update_pre_status(dm);
+	pinfo->pre_state = ORI_TABLE_TRAINING;
+}
+
+void phydm_ori_table_try_fail(
+	void *dm_void)
+{
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct phydm_lna_sat_t	*pinfo = &dm->dm_lna_sat_info;
+
+	if (pinfo->pre_state == ORI_TABLE_TRY_FAIL) {
+		if (phydm_is_snr_improve(dm)) {
+			pinfo->nxt_state = ORI_TABLE_TRAINING;
+			pinfo->ori_table_try_fail_times = 0;
+			config_phydm_switch_agc_tab_8822b(dm, *dm->channel, DEFAULT_AGC_TABLE);
+		} else {
+			if (pinfo->ori_table_try_fail_times == pinfo->force_change_period) {
+				PHYDM_DBG(dm, DBG_LNA_SAT_CHK,
+					  "%s: ori_table_try_fail_times=%d\n", __func__, pinfo->ori_table_try_fail_times);
+
+				pinfo->nxt_state = ORI_TABLE_TRY_FAIL;
+				pinfo->ori_table_try_fail_times = 0;
+				phydm_update_pre_status(dm);
+			} else {
+				pinfo->nxt_state = ORI_TABLE_TRY_FAIL;
+				pinfo->ori_table_try_fail_times++;
+				phydm_update_pre_status(dm);
+				//config_phydm_switch_agc_tab_8822b(dm, *dm->channel, LNA_SAT_AGC_TABLE);
+			}
+		}
+	} else {
+		pinfo->nxt_state = ORI_TABLE_TRY_FAIL;
+		pinfo->ori_table_try_fail_times = 0;
+		phydm_update_pre_status(dm);
+		//config_phydm_switch_agc_tab_8822b(dm, *dm->channel, LNA_SAT_AGC_TABLE);
+	}
+
+#if 0
+	if (phydm_is_large_var(dm)) {
+		if (phydm_is_snr_degrade(dm)) {
+			pinfo->nxt_state = SAT_TABLE_TRAINING;
+			config_phydm_switch_agc_tab_8822b(dm, *dm->channel, LNA_SAT_AGC_TABLE);
+		} else {
+			pinfo->nxt_state = SAT_TABLE_TRY_FAIL;
+		}
+	} else {
+		pinfo->nxt_state = ORI_TABLE_MONITOR;
+	}
+
+	phydm_update_pre_status(dm);
+#endif
+	pinfo->pre_state = ORI_TABLE_TRY_FAIL;
+}
+
+char *phydm_lna_sat_state_msg(
+	void *dm_void,
+	IN u8 state)
+{
+	char *dbg_message;
+
+	switch (state) {
+	case ORI_TABLE_MONITOR:
+		dbg_message = "ORI_TABLE_MONITOR";
+		break;
+
+	case SAT_TABLE_TRAINING:
+		dbg_message = "SAT_TABLE_TRAINING";
+		break;
+
+	case SAT_TABLE_TRY_FAIL:
+		dbg_message = "SAT_TABLE_TRY_FAIL";
+		break;
+
+	case SAT_TABLE_MONITOR:
+		dbg_message = "SAT_TABLE_MONITOR";
+		break;
+
+	case ORI_TABLE_TRAINING:
+		dbg_message = "ORI_TABLE_TRAINING";
+		break;
+
+	case ORI_TABLE_TRY_FAIL:
+		dbg_message = "ORI_TABLE_TRY_FAIL";
+		break;
+
+	default:
+		dbg_message = "ORI_TABLE_MONITOR";
+		break;
+	}
+
+	return dbg_message;
+}
+
+void phydm_lna_sat_type2_sm(
+	void *dm_void)
+{
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct phydm_lna_sat_t	*pinfo = &dm->dm_lna_sat_info;
+	u8 state = pinfo->nxt_state;
+	u8 agc_tab = (u8)odm_get_bb_reg(dm, 0x958, 0x1f);
+	char *dbg_message, *nxt_dbg_message;
+	u8 real_shift = pinfo->total_bit_shift;
+
+	PHYDM_DBG(dm, DBG_LNA_SAT_CHK, "\n\n%s ==>\n", __func__);
+
+	if ((dm->support_ic_type & ODM_RTL8822B) == FALSE) {
+		PHYDM_DBG(dm, DBG_LNA_SAT_CHK, "ODM_BB_LNA_SAT_CHK_TYPE2 only support 22B.\n");
+		return;
+	}
+
+	if ((dm->support_ability & ODM_BB_LNA_SAT_CHK) == FALSE) {
+		phydm_lna_sat_chk_type2_init(dm);
+		PHYDM_DBG(dm, DBG_LNA_SAT_CHK, "ODM_BB_LNA_SAT_CHK_TYPE2 is NOT supported, cur table=%d\n", agc_tab);
+		return;
+	}
+
+	if (pinfo->is_snr_done)
+		phydm_snr_data_processing(dm);
+	else
+		return;
+
+	PHYDM_DBG(dm, DBG_LNA_SAT_CHK, "cur agc table %d\n", agc_tab);
+
+	if (pinfo->is_force_lna_sat_table != AUTO_AGC_TABLE) {
+		/*reset state machine*/
+		pinfo->nxt_state = ORI_TABLE_MONITOR;
+		if (pinfo->is_snr_done) {
+			if (pinfo->is_force_lna_sat_table == DEFAULT_AGC_TABLE)
+				config_phydm_switch_agc_tab_8822b(dm, *dm->channel, DEFAULT_AGC_TABLE);
+			else if (pinfo->is_force_lna_sat_table == LNA_SAT_AGC_TABLE)
+				config_phydm_switch_agc_tab_8822b(dm, *dm->channel, LNA_SAT_AGC_TABLE);
+			else
+				config_phydm_switch_agc_tab_8822b(dm, *dm->channel, DEFAULT_AGC_TABLE);
+
+			PHYDM_DBG(dm, DBG_LNA_SAT_CHK,
+				  "%s: cur_mean=%d, pre_mean=%d, cur_var=%d, pre_var=%d,cur_lower_mean=%d, pre_lower_mean=%d, cnt_lower_snr=%d\n",
+				  __func__,
+				  pinfo->cur_snr_mean,
+				  pinfo->pre_snr_mean,
+				  pinfo->cur_snr_var,
+				  pinfo->pre_snr_var,
+				  pinfo->cur_lower_snr_mean,
+				  pinfo->pre_lower_snr_mean,
+				  pinfo->cnt_lower_snr_statistic);
+
+			pinfo->is_snr_done = FALSE;
+			pinfo->is_sm_done = TRUE;
+			phydm_update_pre_status(dm);
+		} else {
+			return;
+		}
+	} else if (pinfo->is_snr_done) {
+		PHYDM_DBG(dm, DBG_LNA_SAT_CHK,
+			  "%s: cur_mean=%d, pre_mean=%d, cur_var=%d, pre_var=%d,cur_lower_mean=%d, pre_lower_mean=%d, cnt_lower_snr=%d\n",
+			  __func__,
+			  pinfo->cur_snr_mean,
+			  pinfo->pre_snr_mean,
+			  pinfo->cur_snr_var,
+			  pinfo->pre_snr_var,
+			  pinfo->cur_lower_snr_mean,
+			  pinfo->pre_lower_snr_mean,
+			  pinfo->cnt_lower_snr_statistic);
+
+		switch (state) {
+		case ORI_TABLE_MONITOR:
+			dbg_message = "ORI_TABLE_MONITOR";
+			phydm_ori_table_monitor(dm);
+			break;
+
+		case SAT_TABLE_TRAINING:
+			dbg_message = "SAT_TABLE_TRAINING";
+			phydm_sat_table_training(dm);
+			break;
+
+		case SAT_TABLE_TRY_FAIL:
+			dbg_message = "SAT_TABLE_TRY_FAIL";
+			phydm_sat_table_try_fail(dm);
+			break;
+
+		case SAT_TABLE_MONITOR:
+			dbg_message = "SAT_TABLE_MONITOR";
+			phydm_sat_table_monitor(dm);
+			break;
+
+		case ORI_TABLE_TRAINING:
+			dbg_message = "ORI_TABLE_TRAINING";
+			phydm_ori_table_training(dm);
+			break;
+
+		case ORI_TABLE_TRY_FAIL:
+			dbg_message = "ORI_TABLE_TRAINING";
+			phydm_ori_table_try_fail(dm);
+			break;
+
+		default:
+			dbg_message = "ORI_TABLE_MONITOR";
+			phydm_ori_table_monitor(dm);
+			break;
+		}
+
+		dbg_message = phydm_lna_sat_state_msg(dm, state);
+		nxt_dbg_message = phydm_lna_sat_state_msg(dm, pinfo->nxt_state);
+		PHYDM_DBG(dm, DBG_LNA_SAT_CHK, "state: [%s]->[%s]\n",
+			  dbg_message, nxt_dbg_message);
+
+		pinfo->is_snr_done = FALSE;
+		pinfo->is_sm_done = TRUE;
+		pinfo->total_cnt_snr = 1 << real_shift;
+
+	} else {
+		return;
+	}
+}
+
+
+#endif /*@#ifdef PHYDM_LNA_SAT_CHK_TYPE2*/
+
+void phydm_lna_sat_debug(
+	void *dm_void,
+	char input[][16],
+	u32 *_used,
+	char *output,
+	u32 *_out_len)
+{
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct phydm_lna_sat_t	*lna_t = &dm->dm_lna_sat_info;
+	char help[] = "-h";
+	char monitor[] = "-m";
+	u32 var1[10] = {0};
+	u32 used = *_used;
+	u32 out_len = *_out_len;
+	u8 i;
+	u8 agc_tab = 0;
+
+	if ((strcmp(input[1], help) == 0)) {
+		PDM_SNPF(out_len, used, output + used, out_len - used,
+			 "monitor: -m\n");
+		#ifdef PHYDM_LNA_SAT_CHK_TYPE1
+		PDM_SNPF(out_len, used, output + used, out_len - used,
+			 "{0} {lna_sat_chk_en}\n");
+		PDM_SNPF(out_len, used, output + used, out_len - used,
+			 "{1} {agc_table_switch_en}\n");
+		PDM_SNPF(out_len, used, output + used, out_len - used,
+			 "{2} {chk_cnt per callback}\n");
+		PDM_SNPF(out_len, used, output + used, out_len - used,
+			 "{3} {chk_period(ms)}\n");
+		PDM_SNPF(out_len, used, output + used, out_len - used,
+			 "{4} {chk_duty_cycle(%)}\n");
+		#endif
+	} else if ((strcmp(input[1], monitor) == 0)) {
+#ifdef PHYDM_LNA_SAT_CHK_TYPE1
+		#if (RTL8198F_SUPPORT || RTL8814B_SUPPORT)
+		if (dm->support_ic_type & (ODM_RTL8198F | ODM_RTL8814B))
+			agc_tab = phydm_get_ofdm_agc_tab_path(dm, RF_PATH_A);
+		else
+		#endif
+			agc_tab = phydm_get_ofdm_agc_tab(dm);
+
+		PDM_SNPF(out_len, used, output + used, out_len - used,
+			 "%s%d, %s%d, %s%d, %s%d\n",
+			 "check_time = ", lna_t->check_time,
+			 "pre_sat_status = ", lna_t->pre_sat_status,
+			 "cur_sat_status = ", lna_t->cur_sat_status,
+			 "current AGC tab = ", agc_tab);
+#endif
+	} else {
+		PHYDM_SSCANF(input[1], DCMD_DECIMAL, &var1[0]);
+
+		for (i = 1; i < 10; i++) {
+			if (input[i + 1])
+				PHYDM_SSCANF(input[i + 1], DCMD_DECIMAL,
+					     &var1[i]);
+		}
+		#ifdef PHYDM_LNA_SAT_CHK_TYPE1
+		if (var1[0] == 0) {
+			if (var1[1] == 1)
+				lna_t->is_disable_lna_sat_chk = false;
+			else if (var1[1] == 0)
+				lna_t->is_disable_lna_sat_chk = true;
+
+			PDM_SNPF(out_len, used, output + used, out_len - used,
+				 "dis_lna_sat_chk=%d\n",
+				 lna_t->is_disable_lna_sat_chk);
+		} else if (var1[0] == 1) {
+			if (var1[1] == 1)
+				lna_t->dis_agc_table_swh = false;
+			else if (var1[1] == 0)
+				lna_t->dis_agc_table_swh = true;
+
+			PDM_SNPF(out_len, used, output + used, out_len - used,
+				 "dis_agc_table_swh=%d\n",
+				 lna_t->dis_agc_table_swh);
+
+		} else if (var1[0] == 2) {
+			lna_t->chk_cnt = (u8)var1[1];
+			PDM_SNPF(out_len, used, output + used, out_len - used,
+				 "chk_cnt=%d\n", lna_t->chk_cnt);
+		} else if (var1[0] == 3) {
+			lna_t->chk_period = var1[1];
+			PDM_SNPF(out_len, used, output + used, out_len - used,
+				 "chk_period=%d\n", lna_t->chk_period);
+		} else if (var1[0] == 4) {
+			lna_t->chk_duty_cycle = (u8)var1[1];
+			PDM_SNPF(out_len, used, output + used, out_len - used,
+				 "chk_duty_cycle=%d\n",
+				 lna_t->chk_duty_cycle);
+		}
+		#endif
+		#ifdef PHYDM_LNA_SAT_CHK_TYPE2
+		if (var1[0] == 1)
+			lna_t->force_traget_macid = var1[1];
+		#endif
+	}
+	*_used = used;
+	*_out_len = out_len;
+}
+
+void phydm_lna_sat_chk_watchdog(
+	void *dm_void)
+{
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct phydm_lna_sat_t *lna_sat = &dm->dm_lna_sat_info;
+
+	PHYDM_DBG(dm, DBG_LNA_SAT_CHK, "%s ==>\n", __func__);
+
+	if (lna_sat->lna_sat_type == LNA_SAT_WITH_PEAK_DET) {
+		#ifdef PHYDM_LNA_SAT_CHK_TYPE1
+		phydm_lna_sat_chk_watchdog_type1(dm);
+		#endif
+	} else if (lna_sat->lna_sat_type == LNA_SAT_WITH_TRAIN) {
+		#ifdef PHYDM_LNA_SAT_CHK_TYPE2
+
+		#endif
+	}
+
+}
+
+void phydm_lna_sat_config(
+	void *dm_void)
+{
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct phydm_lna_sat_t	*lna_sat = &dm->dm_lna_sat_info;
+
+	#if (RTL8822B_SUPPORT == 1)
+	if (dm->support_ic_type & (ODM_RTL8822B))
+		lna_sat->lna_sat_type = LNA_SAT_WITH_TRAIN;
+	#endif
+
+	#if (RTL8197F_SUPPORT || RTL8192F_SUPPORT ||\
+	     RTL8198F_SUPPORT || RTL8814B_SUPPORT)
+	if (dm->support_ic_type &
+	    (ODM_RTL8197F | ODM_RTL8192F | ODM_RTL8198F | ODM_RTL8814B))
+		lna_sat->lna_sat_type = LNA_SAT_WITH_PEAK_DET;
+	#endif
+
+	PHYDM_DBG(dm, DBG_LNA_SAT_CHK, "[%s] lna_sat_type=%d\n",
+		  __func__, lna_sat->lna_sat_type);
+}
+
+void phydm_lna_sat_check_init(
+	void *dm_void)
+{
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct phydm_lna_sat_t	*lna_sat = &dm->dm_lna_sat_info;
+
+	if ((dm->support_ability & ODM_BB_LNA_SAT_CHK))
+		return;
+
+	/*@2018.04.17 Johnson*/
+	phydm_lna_sat_config(dm);
+	#ifdef PHYDM_LNA_SAT_CHK_TYPE1
+	lna_sat->chk_period = LNA_CHK_PERIOD;
+	lna_sat->chk_cnt = LNA_CHK_CNT;
+	lna_sat->chk_duty_cycle = LNA_CHK_DUTY_CYCLE;
+	lna_sat->dis_agc_table_swh = false;
+	#endif
+	/*@2018.04.17 Johnson end*/
+
+	if (lna_sat->lna_sat_type == LNA_SAT_WITH_PEAK_DET) {
+		#ifdef PHYDM_LNA_SAT_CHK_TYPE1
+		phydm_lna_sat_chk_init(dm);
+		#endif
+	} else if (lna_sat->lna_sat_type == LNA_SAT_WITH_TRAIN) {
+		#ifdef PHYDM_LNA_SAT_CHK_TYPE2
+		phydm_lna_sat_chk_type2_init(dm);
+		#endif
+	}
+}
+
+#endif /*@#ifdef PHYDM_LNA_SAT_CHK_SUPPORT*/
diff --git a/rtl8723DS/hal/phydm/phydm_lna_sat.h b/rtl8723DS/hal/phydm/phydm_lna_sat.h
new file mode 100644
index 0000000..c9345b8
--- a/dev/null
+++ b/rtl8723DS/hal/phydm/phydm_lna_sat.h
@@ -0,0 +1,173 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2007 - 2017  Realtek Corporation.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ *
+ * The full GNU General Public License is included in this distribution in the
+ * file called LICENSE.
+ *
+ * Contact Information:
+ * wlanfae <wlanfae@realtek.com>
+ * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
+ * Hsinchu 300, Taiwan.
+ *
+ * Larry Finger <Larry.Finger@lwfinger.net>
+ *
+ *****************************************************************************/
+
+#ifndef __PHYDM_LNA_SAT_H__
+#define __PHYDM_LNA_SAT_H__
+#ifdef PHYDM_LNA_SAT_CHK_SUPPORT
+/* @1 ============================================================
+ * 1  Definition
+ * 1 ============================================================
+ */
+
+#define LNA_SAT_VERSION "1.0"
+
+/*@LNA saturation check*/
+#define	OFDM_AGC_TAB_0			0
+#define	OFDM_AGC_TAB_2			2
+
+#define	DIFF_RSSI_TO_IGI		10
+#define	ONE_SEC_MS			1000
+
+#define LNA_CHK_PERIOD			100 /*@ms*/
+#define LNA_CHK_CNT			10 /*@checks per callback*/
+#define LNA_CHK_DUTY_CYCLE		5 /*@percentage*/
+
+#define	DELTA_STD	2
+#define	DELTA_MEAN	2
+#define	SNR_STATISTIC_SHIFT	8
+#define	SNR_RPT_MAX	256
+
+/* @1 ============================================================
+ * 1 enumrate
+ * 1 ============================================================
+ */
+
+enum lna_sat_timer_state {
+	INIT_LNA_SAT_CHK_TIMMER,
+	CANCEL_LNA_SAT_CHK_TIMMER,
+	RELEASE_LNA_SAT_CHK_TIMMER
+};
+
+#ifdef PHYDM_LNA_SAT_CHK_TYPE2
+enum lna_sat_chk_type2_status {
+	ORI_TABLE_MONITOR,
+	ORI_TABLE_TRAINING,
+	SAT_TABLE_MONITOR,
+	SAT_TABLE_TRAINING,
+	SAT_TABLE_TRY_FAIL,
+	ORI_TABLE_TRY_FAIL
+};
+
+#endif
+
+enum lna_sat_type {
+	LNA_SAT_WITH_PEAK_DET	= 1,	/*type1*/
+	LNA_SAT_WITH_TRAIN	= 2,	/*type2*/
+};
+
+/* @1 ============================================================
+ * 1  structure
+ * 1 ============================================================
+ */
+
+struct phydm_lna_sat_t {
+#ifdef PHYDM_LNA_SAT_CHK_TYPE1
+	u8			chk_cnt;
+	u8			chk_duty_cycle;
+	u32			chk_period;/*@ms*/
+	boolean			is_disable_lna_sat_chk;
+	boolean			dis_agc_table_swh;
+#endif
+#ifdef PHYDM_LNA_SAT_CHK_TYPE2
+	u8			force_traget_macid;
+	u32			snr_var_thd;
+	u32			delta_snr_mean;
+	u16			ori_table_try_fail_times;
+	u16			cnt_lower_snr_statistic;
+	u16			sat_table_monitor_times;
+	u16			force_change_period;
+	u8			is_snr_detail_en;
+	u8			is_force_lna_sat_table;
+	u8			lwr_snr_ratio_bit_shift;
+	u8			cnt_snr_statistic;
+	u16			snr_statistic_sqr[SNR_RPT_MAX];
+	u8			snr_statistic[SNR_RPT_MAX];
+	u8			is_sm_done;
+	u8			is_snr_done;
+	u32			cur_snr_var;
+	u8			total_bit_shift;
+	u8			total_cnt_snr;
+	u32			cur_snr_mean;
+	u8			cur_snr_var0;
+	u32			cur_lower_snr_mean;
+	u32			pre_snr_mean;
+	u32			pre_snr_var;
+	u32			pre_lower_snr_mean;
+	u8			nxt_state;
+	u8			pre_state;
+#endif
+	enum lna_sat_type	lna_sat_type;
+	u32			sat_cnt_acc_patha;
+	u32			sat_cnt_acc_pathb;
+#ifdef PHYDM_IC_ABOVE_3SS
+	u32			sat_cnt_acc_pathc;
+#endif
+#ifdef PHYDM_IC_ABOVE_4SS
+	u32			sat_cnt_acc_pathd;
+#endif
+	u32			check_time;
+	boolean			pre_sat_status;
+	boolean			cur_sat_status;
+	struct phydm_timer_list	phydm_lna_sat_chk_timer;
+	u32			cur_timer_check_cnt;
+	u32			pre_timer_check_cnt;
+};
+
+/* @1 ============================================================
+ * 1 function prototype
+ * 1 ============================================================
+ */
+void phydm_lna_sat_chk_init(void *dm_void);
+
+u8 phydm_get_ofdm_agc_tab(void *dm_void);
+
+void phydm_lna_sat_chk(void *dm_void);
+
+void phydm_lna_sat_chk_timers(void *dm_void, u8 state);
+
+#ifdef PHYDM_LNA_SAT_CHK_TYPE1
+#if (RTL8198F_SUPPORT || RTL8814B_SUPPORT)
+void phydm_lna_sat_chk_bb_init(void *dm_void);
+
+void phydm_set_ofdm_agc_tab_path(void *dm_void,
+				 u8 tab_sel, enum rf_path path);
+
+u8 phydm_get_ofdm_agc_tab_path(void *dm_void, enum rf_path path);
+#endif /*@#if (RTL8198F_SUPPORT || RTL8814B_SUPPORT)*/
+#endif
+
+#ifdef PHYDM_LNA_SAT_CHK_TYPE2
+void phydm_parsing_snr(void *dm_void, void *pktinfo_void, s8 *rx_snr);
+#endif
+
+void phydm_lna_sat_debug(void *dm_void, char input[][16], u32 *_used,
+			 char *output, u32 *_out_len);
+
+void phydm_lna_sat_chk_watchdog(void *dm_void);
+
+void phydm_lna_sat_check_init(void *dm_void);
+
+#endif /*@#if (PHYDM_LNA_SAT_CHK_SUPPORT == 1)*/
+#endif
diff --git a/rtl8723DS/hal/phydm/phydm_math_lib.c b/rtl8723DS/hal/phydm/phydm_math_lib.c
index 85e747d..aa5f3a9 100755..100644
--- a/rtl8723DS/hal/phydm/phydm_math_lib.c
+++ b/rtl8723DS/hal/phydm/phydm_math_lib.c
@@ -1,112 +1,130 @@
-/******************************************************************************

- *

- * Copyright(c) 2007 - 2017 Realtek Corporation.

- *

- * This program is free software; you can redistribute it and/or modify it

- * under the terms of version 2 of the GNU General Public License as

- * published by the Free Software Foundation.

- *

- * This program is distributed in the hope that it will be useful, but WITHOUT

- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or

- * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for

- * more details.

- *

- *****************************************************************************/

-

-/* ************************************************************

- * include files

- * ************************************************************ */

-

-#include "mp_precomp.h"

-#include "phydm_precomp.h"

-

-const u16 db_invert_table[12][8] = {
-	{	1,		1,		1,		2,		2,		2,		2,		3},
-	{	3,		3,		4,		4,		4,		5,		6,		6},
-	{	7,		8,		9,		10,		11,		13,		14,		16},
-	{	18,		20,		22,		25,		28,		32,		35,		40},
-	{	45,		50,		56,		63,		71,		79,		89,		100},
-	{	112,		126,		141,		158,		178,		200,		224,		251},
-	{	282,		316,		355,		398,		447,		501,		562,		631},
-	{	708,		794,		891,		1000,	1122,	1259,	1413,	1585},
-	{	1778,	1995,	2239,	2512,	2818,	3162,	3548,	3981},
-	{	4467,	5012,	5623,	6310,	7079,	7943,	8913,	10000},
-	{	11220,	12589,	14125,	15849,	17783,	19953,	22387,	25119},
-	{	28184,	31623,	35481,	39811,	44668,	50119,	56234,	65535}
-};

-

+/******************************************************************************
+ *
+ * Copyright(c) 2007 - 2017  Realtek Corporation.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ *
+ * The full GNU General Public License is included in this distribution in the
+ * file called LICENSE.
+ *
+ * Contact Information:
+ * wlanfae <wlanfae@realtek.com>
+ * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
+ * Hsinchu 300, Taiwan.
+ *
+ * Larry Finger <Larry.Finger@lwfinger.net>
+ *
+ *****************************************************************************/
+
+/*@************************************************************
+ * include files
+ ************************************************************/
+
+#include "mp_precomp.h"
+#include "phydm_precomp.h"
+
+const u32 db_invert_table[12][8] = {
+	{10, 13, 16, 20, 25, 32, 40, 50}, /* @U(32,3) */
+	{64, 80, 101, 128, 160, 201, 256, 318}, /* @U(32,3) */
+	{401, 505, 635, 800, 1007, 1268, 1596, 2010}, /* @U(32,3) */
+	{316, 398, 501, 631, 794, 1000, 1259, 1585}, /* @U(32,0) */
+	{1995, 2512, 3162, 3981, 5012, 6310, 7943, 10000}, /* @U(32,0) */
+	{12589, 15849, 19953, 25119, 31623, 39811, 50119, 63098}, /* @U(32,0) */
+	{79433, 100000, 125893, 158489, 199526, 251189, 316228,
+	 398107}, /* @U(32,0) */
+	{501187, 630957, 794328, 1000000, 1258925, 1584893, 1995262,
+	 2511886}, /* @U(32,0) */
+	{3162278, 3981072, 5011872, 6309573, 7943282, 1000000, 12589254,
+	 15848932}, /* @U(32,0) */
+	{19952623, 25118864, 31622777, 39810717, 50118723, 63095734,
+	 79432823, 100000000}, /* @U(32,0) */
+	{125892541, 158489319, 199526232, 251188643, 316227766, 398107171,
+	 501187234, 630957345}, /* @U(32,0) */
+	{794328235, 1000000000, 1258925412, 1584893192, 1995262315,
+	 2511886432U, 3162277660U, 3981071706U} }; /* @U(32,0) */
 
 /*Y = 10*log(X)*/
-s32
-odm_pwdb_conversion(
-	s32 X,
-	u32 total_bit,
-	u32 decimal_bit
-)
+s32 odm_pwdb_conversion(s32 X, u32 total_bit, u32 decimal_bit)
 {
 	s32 Y, integer = 0, decimal = 0;
 	u32 i;
 
 	if (X == 0)
-		X = 1; /* log2(x), x can't be 0 */
+		X = 1; /* @log2(x), x can't be 0 */
 
 	for (i = (total_bit - 1); i > 0; i--) {
 		if (X & BIT(i)) {
 			integer = i;
-			if (i > 0)
-				decimal = (X & BIT(i - 1)) ? 2 : 0; /* decimal is 0.5dB*3=1.5dB~=2dB */
+			if (i > 0) {
+				/*decimal is 0.5dB*3=1.5dB~=2dB */
+				decimal = (X & BIT(i - 1)) ? 2 : 0;
+			}
 			break;
 		}
 	}
 
-	Y = 3 * (integer - decimal_bit) + decimal; /* 10*log(x)=3*log2(x), */
+	Y = 3 * (integer - decimal_bit) + decimal; /* @10*log(x)=3*log2(x), */
 
 	return Y;
 }
 
-s32
-odm_sign_conversion(
-	s32 value,
-	u32 total_bit
-)
+s32 odm_sign_conversion(s32 value, u32 total_bit)
 {
 	if (value & BIT(total_bit - 1))
-		value -= BIT(total_bit);

-	

+		value -= BIT(total_bit);
+
 	return value;
 }
 
-void
-phydm_seq_sorting(
-	void	*p_dm_void,
-	u32	*p_value,
-	u32	*rank_idx,
-	u32	*p_idx_out,
-	u8	seq_length
-)
+/*threshold must form low to high*/
+u16 phydm_find_intrvl(void *dm_void, u16 val, u16 *threshold, u16 th_len)
 {
-	u8		i = 0, j = 0;
-	u32		tmp_a, tmp_b;
-	u32		tmp_idx_a, tmp_idx_b;
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	u16 i = 0;
+	u16 ret_val = 0;
+	u16 max_th = threshold[th_len - 1];
+
+	for (i = 0; i < th_len; i++) {
+		if (val < threshold[i]) {
+			ret_val = i;
+			break;
+		} else if (val >= max_th) {
+			ret_val = th_len;
+			break;
+		}
+	}
 
-	for (i = 0; i < seq_length; i++) {
+	return ret_val;
+}
+
+void phydm_seq_sorting(void *dm_void, u32 *value, u32 *rank_idx, u32 *idx_out,
+		       u8 seq_length)
+{
+	u8 i = 0, j = 0;
+	u32 tmp_a, tmp_b;
+	u32 tmp_idx_a, tmp_idx_b;
+
+	for (i = 0; i < seq_length; i++)
 		rank_idx[i] = i;
-		/**/
-	}
 
 	for (i = 0; i < (seq_length - 1); i++) {
-
 		for (j = 0; j < (seq_length - 1 - i); j++) {
-
-			tmp_a = p_value[j];
-			tmp_b = p_value[j + 1];
+			tmp_a = value[j];
+			tmp_b = value[j + 1];
 
 			tmp_idx_a = rank_idx[j];
 			tmp_idx_b = rank_idx[j + 1];
 
 			if (tmp_a < tmp_b) {
-				p_value[j] = tmp_b;
-				p_value[j + 1] = tmp_a;
+				value[j] = tmp_b;
+				value[j + 1] = tmp_a;
 
 				rank_idx[j] = tmp_idx_b;
 				rank_idx[j + 1] = tmp_idx_a;
@@ -114,50 +132,72 @@ phydm_seq_sorting(
 		}
 	}
 
-	for (i = 0; i < seq_length; i++) {
-		p_idx_out[rank_idx[i]] = i + 1;
-		/**/
-	}

+	for (i = 0; i < seq_length; i++)
+		idx_out[rank_idx[i]] = i + 1;
 }
-

-u32
-odm_convert_to_db(
-	u32	value)
+
+u32 odm_convert_to_db(u64 value)
 {
 	u8 i;
 	u8 j;
 	u32 dB;
 
-	value = value & 0xFFFF;
+	if (value >= db_invert_table[11][7]) {
+		pr_debug("[%s] ====>\n", __func__);
+		return 96; /* @maximum 96 dB */
+	}
 
 	for (i = 0; i < 12; i++) {
-		if (value <= db_invert_table[i][7])
+		if (i <= 2 && (value << FRAC_BITS) <= db_invert_table[i][7])
+			break;
+		else if (i > 2 && value <= db_invert_table[i][7])
 			break;
-	}
-
-	if (i >= 12) {
-		return 96;	/* maximum 96 dB */
 	}
 
 	for (j = 0; j < 8; j++) {
-		if (value <= db_invert_table[i][j])
+		if (i <= 2 && (value << FRAC_BITS) <= db_invert_table[i][j])
+			break;
+		else if (i > 2 && i < 12 && value <= db_invert_table[i][j])
 			break;
 	}
 
+	if (j == 0 && i == 0)
+		goto end;
+
+	if (j == 0) {
+		if (i != 3) {
+			if (db_invert_table[i][0] - value >
+			    value - db_invert_table[i - 1][7]) {
+				i = i - 1;
+				j = 7;
+			}
+		} else {
+			if (db_invert_table[3][0] - value >
+			    value - db_invert_table[2][7]) {
+				i = 2;
+				j = 7;
+			}
+		}
+	} else {
+		if (db_invert_table[i][j] - value >
+		    value - db_invert_table[i][j - 1]) {
+			i = i;
+			j = j - 1;
+		}
+	}
+end:
 	dB = (i << 3) + j + 1;
 
 	return dB;
 }
 
-u32
-odm_convert_to_linear(
-	u32	value)
+u64 phydm_db_2_linear(u32 value)
 {
 	u8 i;
 	u8 j;
-	u32 linear;
+	u64 linear;
 
-	/* 1dB~96dB */
+	/* @1dB~96dB */
 
 	value = value & 0xFF;
 
@@ -166,6 +206,44 @@ odm_convert_to_linear(
 
 	linear = db_invert_table[i][j];
 
+	if (i > 2)
+		linear = linear << FRAC_BITS;
+
 	return linear;
-}

-

+}
+
+u16 phydm_show_fraction_num(u32 frac_val, u8 bit_num)
+{
+	u8 i = 0;
+	u16 val = 0;
+	u16 base = 5000;
+
+	for (i = bit_num; i > 0; i--) {
+		if (frac_val & BIT(i - 1))
+			val += (base >> (bit_num - i));
+	}
+	return val;
+}
+
+u32 phydm_gen_bitmask(u8 mask_num)
+{
+	u8 i = 0;
+	u32 bitmask = 0;
+
+	if (mask_num > 32)
+		return 1;
+
+	for (i = 0; i < mask_num; i++)
+		bitmask = (bitmask << 1) | BIT(0);
+
+	return bitmask;
+}
+
+s32 phydm_cnvrt_2_sign(u32 val, u8 bit_num)
+{
+	if (val & BIT(bit_num - 1)) /*Sign BIT*/
+		val -= (1 << bit_num); /*@2's*/
+
+	return val;
+}
+
diff --git a/rtl8723DS/hal/phydm/phydm_math_lib.h b/rtl8723DS/hal/phydm/phydm_math_lib.h
index a8fb773..daee352 100755..100644
--- a/rtl8723DS/hal/phydm/phydm_math_lib.h
+++ b/rtl8723DS/hal/phydm/phydm_math_lib.h
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2007 - 2017 Realtek Corporation.
+ * Copyright(c) 2007 - 2017  Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -8,70 +8,107 @@
  *
  * This program is distributed in the hope that it will be useful, but WITHOUT
  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  * more details.
  *
+ * The full GNU General Public License is included in this distribution in the
+ * file called LICENSE.
+ *
+ * Contact Information:
+ * wlanfae <wlanfae@realtek.com>
+ * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
+ * Hsinchu 300, Taiwan.
+ *
+ * Larry Finger <Larry.Finger@lwfinger.net>
+ *
  *****************************************************************************/
 
+#ifndef __PHYDM_MATH_LIB_H__
+#define __PHYDM_MATH_LIB_H__
 
-#ifndef	__PHYDM_MATH_LIB_H__
-#define    __PHYDM_MATH_LIB_H__
+#define AUTO_MATH_LIB_VERSION "1.0" /* @2017.06.06*/
 
-#define AUTO_MATH_LIB_VERSION	"1.0"		/* 2017.06.06*/
+/*@
+ * 1 ============================================================
+ * 1  Definition
+ * 1 ============================================================
+ */
+
+#define DIVIDED_2(X) ((X) >> 1)
+/*@1/3 ~ 11/32*/
+#if defined(DM_ODM_CE_MAC80211)
+#define DIVIDED_3(X) ({	\
+	u32 div_3_tmp = (X);	\
+	(((div_3_tmp) + ((div_3_tmp) << 1) + ((div_3_tmp) << 3)) >> 5); })
+#else
+#define DIVIDED_3(X) (((X) + ((X) << 1) + ((X) << 3)) >> 5)
+#endif
+#define DIVIDED_4(X) ((X) >> 2)
+
+/*Store Ori Value*/
+#if defined(DM_ODM_CE_MAC80211)
+#define WEIGHTING_AVG(v1, w1, v2, w2)	\
+	__WEIGHTING_AVG(v1, w1, v2, w2, typeof(v1), typeof(w1), typeof(v2), \
+			typeof(w2))
+#define __WEIGHTING_AVG(v1, w1, v2, w2, t1, t2, t3, t4)	({	\
+	t1 __w_a_v1 = (v1);	\
+	t2 __w_a_w1 = (w1);	\
+	t3 __w_a_v2 = (v2);	\
+	t4 __w_a_w2 = (w2);	\
+	((__w_a_v1) * (__w_a_w1) + (__w_a_v2) * (__w_a_w2))	\
+	/ ((__w_a_w2) + (__w_a_w1)); })
+#else
+#define WEIGHTING_AVG(v1, w1, v2, w2) \
+	(((v1) * (w1) + (v2) * (w2)) / ((w2) + (w1)))
+#endif
 
+/*Store 2^ma x Value*/
+#if defined(DM_ODM_CE_MAC80211)
+#define MA_ACC(old, new_val, ma) ({	\
+	s16 __ma_acc_o = (old);		\
+	(__ma_acc_o) - ((__ma_acc_o) >> (ma)) + (new_val); })
+#define GET_MA_VAL(val, ma) ({	\
+	s16 __get_ma_tmp = (ma);\
+	((val) + (1 << ((__get_ma_tmp) - 1))) >> (__get_ma_tmp); })
+#else
+#define MA_ACC(old, new_val, ma) ((old) - ((old) >> (ma)) + (new_val))
+#define GET_MA_VAL(val, ma) (((val) + (1 << ((ma) - 1))) >> (ma))
+#endif
+#define FRAC_BITS 3
+/*@
+ * 1 ============================================================
+ * 1  enumeration
+ * 1 ============================================================
+ */
 
-/* 1 ============================================================
- * 1  Definition
- * 1 ============================================================ */
+/*@
+ * 1 ============================================================
+ * 1  structure
+ * 1 ============================================================
+ */
 
+/*@
+ * 1 ============================================================
+ * 1  function prototype
+ * 1 ============================================================
+ */
 
+s32 odm_pwdb_conversion(s32 X, u32 total_bit, u32 decimal_bit);
 
+s32 odm_sign_conversion(s32 value, u32 total_bit);
 
-/* 1 ============================================================
- * 1  enumeration
- * 1 ============================================================ */
+u16 phydm_find_intrvl(void *dm_void, u16 val, u16 *threshold, u16 th_len);
 
+void phydm_seq_sorting(void *dm_void, u32 *value, u32 *rank_idx, u32 *idx_out,
+		       u8 seq_length);
 
+u32 odm_convert_to_db(u64 value);
 
-/* 1 ============================================================
- * 1  structure
- * 1 ============================================================ */
+u64 phydm_db_2_linear(u32 value);
 
+u16 phydm_show_fraction_num(u32 frac_val, u8 bit_num);
 
-/* 1 ============================================================
- * 1  function prototype
- * 1 ============================================================ */
-
-s32
-odm_pwdb_conversion(
-	s32 X,
-	u32 total_bit,
-	u32 decimal_bit
-);
-
-s32
-odm_sign_conversion(
-	s32 value,
-	u32 total_bit
-);
-
-void
-phydm_seq_sorting(
-	void	*p_dm_void,
-	u32	*p_value,
-	u32	*rank_idx,
-	u32	*p_idx_out,
-	u8	seq_length
-);
-
-u32 
-odm_convert_to_db(
-	u32	 value
-);
-
-u32
-odm_convert_to_linear(
-	u32	value
-);
+u32 phydm_gen_bitmask(u8 mask_num);
 
+s32 phydm_cnvrt_2_sign(u32 val, u8 bit_num);
 #endif
diff --git a/rtl8723DS/hal/phydm/phydm_mp.c b/rtl8723DS/hal/phydm/phydm_mp.c
new file mode 100644
index 0000000..7d964f5
--- a/dev/null
+++ b/rtl8723DS/hal/phydm/phydm_mp.c
@@ -0,0 +1,348 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2007 - 2017  Realtek Corporation.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ *
+ * The full GNU General Public License is included in this distribution in the
+ * file called LICENSE.
+ *
+ * Contact Information:
+ * wlanfae <wlanfae@realtek.com>
+ * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
+ * Hsinchu 300, Taiwan.
+ *
+ * Larry Finger <Larry.Finger@lwfinger.net>
+ *
+ *****************************************************************************/
+
+/*@************************************************************
+ * include files
+ ************************************************************/
+
+#include "mp_precomp.h"
+#include "phydm_precomp.h"
+
+#ifdef PHYDM_MP_SUPPORT
+#ifdef PHYDM_IC_JGR3_SERIES_SUPPORT
+
+void phydm_mp_set_single_tone_jgr3(void *dm_void, boolean is_single_tone,
+				   u8 path)
+{
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct phydm_mp *mp = &dm->dm_mp_table;
+	u8 start = RF_PATH_A, end = RF_PATH_A;
+
+	switch (path) {
+	case RF_PATH_A:
+	case RF_PATH_B:
+	case RF_PATH_C:
+	case RF_PATH_D:
+		start = path;
+		end = path;
+		break;
+	case RF_PATH_AB:
+		start = RF_PATH_A;
+		end = RF_PATH_B;
+		break;
+#if (RTL8814B_SUPPORT == 1 || RTL8198F_SUPPORT == 1)
+	case RF_PATH_AC:
+		start = RF_PATH_A;
+		end = RF_PATH_C;
+		break;
+	case RF_PATH_AD:
+		start = RF_PATH_A;
+		end = RF_PATH_D;
+		break;
+	case RF_PATH_BC:
+		start = RF_PATH_B;
+		end = RF_PATH_C;
+		break;
+	case RF_PATH_BD:
+		start = RF_PATH_B;
+		end = RF_PATH_D;
+		break;
+	case RF_PATH_CD:
+		start = RF_PATH_C;
+		end = RF_PATH_D;
+		break;
+	case RF_PATH_ABC:
+		start = RF_PATH_A;
+		end = RF_PATH_C;
+		break;
+	case RF_PATH_ABD:
+		start = RF_PATH_A;
+		end = RF_PATH_D;
+		break;
+	case RF_PATH_ACD:
+		start = RF_PATH_A;
+		end = RF_PATH_D;
+		break;
+	case RF_PATH_BCD:
+		start = RF_PATH_B;
+		end = RF_PATH_D;
+		break;
+	case RF_PATH_ABCD:
+		start = RF_PATH_A;
+		end = RF_PATH_D;
+		break;
+#endif
+	}
+	if (is_single_tone) {
+		mp->rf_reg0 = odm_get_rf_reg(dm, RF_PATH_A, RF_0x00, 0xfffff);
+#if 0
+		mp->rfe_sel_a_0 = odm_get_bb_reg(dm, R_0x1840, MASKDWORD);
+		mp->rfe_sel_b_0 = odm_get_bb_reg(dm, R_0x4140, MASKDWORD);
+		mp->rfe_sel_c_0 = odm_get_bb_reg(dm, R_0x5240, MASKDWORD);
+		mp->rfe_sel_d_0 = odm_get_bb_reg(dm, R_0x5340, MASKDWORD);
+		mp->rfe_sel_a_1 = odm_get_bb_reg(dm, R_0x1844, MASKDWORD);
+		mp->rfe_sel_b_1 = odm_get_bb_reg(dm, R_0x4144, MASKDWORD);
+		mp->rfe_sel_c_1 = odm_get_bb_reg(dm, R_0x5244, MASKDWORD);
+		mp->rfe_sel_d_1 = odm_get_bb_reg(dm, R_0x5344, MASKDWORD);
+#endif
+		/* Disable CCK and OFDM */
+		odm_set_bb_reg(dm, R_0x1c3c, 0x3, 0x0);
+		for (start; start <= end; start++) {
+			/* @Tx mode: RF0x00[19:16]=4'b0010 */
+			odm_set_rf_reg(dm, start, RF_0x0, 0xF0000, 0x2);
+			/* @Lowest RF gain index: RF_0x0[4:0] = 0*/
+			odm_set_rf_reg(dm, start, RF_0x0, 0x1F, 0x0);
+			/* @RF LO enabled */
+			odm_set_rf_reg(dm, start, RF_0x58, BIT(1), 0x1);
+		}
+		#if (RTL8814B_SUPPORT == 1)
+		if (dm->support_ic_type & ODM_RTL8814B) {
+			/* @Tx mode: RF0x00[19:16]=4'b0010 */
+			config_phydm_write_rf_syn_8814b(dm, RF_SYN0, RF_0x0,
+							0xF0000, 0x2);
+			/* @Lowest RF gain index: RF_0x0[4:0] = 0*/
+			config_phydm_write_rf_syn_8814b(dm, RF_SYN0, RF_0x0,
+							0x1F, 0x0);
+			/* @RF LO enabled */
+			config_phydm_write_rf_syn_8814b(dm, RF_SYN0, RF_0x58,
+							BIT(1), 0x1);
+		}
+		#endif
+	} else {
+		/* Eable CCK and OFDM */
+		odm_set_bb_reg(dm, R_0x1c3c, 0x3, 0x3);
+		if (!(dm->support_ic_type & ODM_RTL8814B)) {
+			for (start; start <= end; start++) {
+				odm_set_rf_reg(dm, start, RF_0x00, 0xfffff,
+					       mp->rf_reg0);
+				/* RF LO disabled */
+				odm_set_rf_reg(dm, start, RF_0x58, BIT(1),
+					       0x0);
+			}
+		}
+#if 0
+		odm_set_bb_reg(dm, R_0x1840, MASKDWORD, mp->rfe_sel_a_0);
+		odm_set_bb_reg(dm, R_0x4140, MASKDWORD, mp->rfe_sel_b_0);
+		odm_set_bb_reg(dm, R_0x5240, MASKDWORD, mp->rfe_sel_c_0);
+		odm_set_bb_reg(dm, R_0x5340, MASKDWORD, mp->rfe_sel_d_0);
+		odm_set_bb_reg(dm, R_0x1844, MASKDWORD, mp->rfe_sel_a_1);
+		odm_set_bb_reg(dm, R_0x4144, MASKDWORD, mp->rfe_sel_b_1);
+		odm_set_bb_reg(dm, R_0x5244, MASKDWORD, mp->rfe_sel_c_1);
+		odm_set_bb_reg(dm, R_0x5344, MASKDWORD, mp->rfe_sel_d_1);
+#endif
+	}
+}
+
+void phydm_mp_set_carrier_supp_jgr3(void *dm_void, boolean is_carrier_supp,
+				    u32 rate_index)
+{
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct phydm_mp *mp = &dm->dm_mp_table;
+
+	if (is_carrier_supp) {
+		if (phydm_is_cck_rate(dm, (u8)rate_index)) {
+			/* @if CCK block on? */
+			if (!odm_get_bb_reg(dm, R_0x1c3c, BIT(1)))
+				odm_set_bb_reg(dm, R_0x1c3c, BIT(1), 1);
+
+			/* @Turn Off All Test mode */
+			odm_set_bb_reg(dm, R_0x1ca4, 0x7, 0x0);
+
+			/* @transmit mode */
+			odm_set_bb_reg(dm, R_0x1a00, 0x3, 0x2);
+			/* @turn off scramble setting */
+			odm_set_bb_reg(dm, R_0x1a00, 0x8, 0x0);
+			/* @Set CCK Tx Test Rate, set FTxRate to 1Mbps */
+			odm_set_bb_reg(dm, R_0x1a00, 0x3000, 0x0);
+		}
+	} else { /* @Stop Carrier Suppression. */
+		if (phydm_is_cck_rate(dm, (u8)rate_index)) {
+			/* @normal mode */
+			odm_set_bb_reg(dm, R_0x1a00, 0x3, 0x0);
+			/* @turn on scramble setting */
+			odm_set_bb_reg(dm, R_0x1a00, 0x8, 0x1);
+			/* @BB Reset */
+			odm_set_bb_reg(dm, R_0x1d0c, 0x10000, 0x0);
+			odm_set_bb_reg(dm, R_0x1d0c, 0x10000, 0x1);
+		}
+	}
+}
+#endif
+
+void phydm_mp_set_crystal_cap(void *dm_void, u8 crystal_cap)
+{
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+
+	phydm_set_crystal_cap(dm, crystal_cap);
+}
+
+void phydm_mp_set_single_tone(void *dm_void, boolean is_single_tone, u8 path)
+{
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+
+	if (dm->support_ic_type & ODM_IC_JGR3_SERIES)
+		phydm_mp_set_single_tone_jgr3(dm, is_single_tone, path);
+}
+
+void phydm_mp_set_carrier_supp(void *dm_void, boolean is_carrier_supp,
+			       u32 rate_index)
+{
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+
+	if (dm->support_ic_type & ODM_IC_JGR3_SERIES)
+		phydm_mp_set_carrier_supp_jgr3(dm, is_carrier_supp, rate_index);
+}
+
+void phydm_mp_set_single_carrier(void *dm_void, boolean is_single_carrier)
+{
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct phydm_mp *mp = &dm->dm_mp_table;
+
+	if (is_single_carrier) {
+		if (dm->support_ic_type & ODM_IC_JGR3_SERIES) {
+			/* @1. if OFDM block on? */
+			if (!odm_get_bb_reg(dm, R_0x1c3c, BIT(0)))
+				odm_set_bb_reg(dm, R_0x1c3c, BIT(0), 1);
+
+			/* @2. set CCK test mode off, set to CCK normal mode */
+			odm_set_bb_reg(dm, R_0x1a00, 0x3, 0);
+
+			/* @3. turn on scramble setting */
+			odm_set_bb_reg(dm, R_0x1a00, 0x8, 1);
+
+			/* @4. Turn On single carrier. */
+			odm_set_bb_reg(dm, R_0x1ca4, 0x7, OFDM_SINGLE_CARRIER);
+		} else {
+			/* @1. if OFDM block on? */
+			if (!odm_get_bb_reg(dm, R_0x800, 0x2000000))
+				odm_set_bb_reg(dm, R_0x800, 0x2000000, 1);
+
+			/* @2. set CCK test mode off, set to CCK normal mode */
+			odm_set_bb_reg(dm, R_0xa00, 0x3, 0);
+
+			/* @3. turn on scramble setting */
+			odm_set_bb_reg(dm, R_0xa00, 0x8, 1);
+
+			/* @4. Turn On single carrier. */
+			if (dm->support_ic_type & ODM_IC_11AC_SERIES)
+				odm_set_bb_reg(dm, R_0x914, 0x70000,
+					       OFDM_SINGLE_CARRIER);
+			else if (dm->support_ic_type & ODM_IC_11N_SERIES)
+				odm_set_bb_reg(dm, R_0xd00, 0x70000000,
+					       OFDM_SINGLE_CARRIER);
+		}
+	} else { /* @Stop Single Carrier. */
+	    /* @Turn off all test modes. */
+		if (dm->support_ic_type & ODM_IC_JGR3_SERIES)
+			odm_set_bb_reg(dm, R_0x1ca4, 0x7, OFDM_OFF);
+		else if (dm->support_ic_type & ODM_IC_11AC_SERIES)
+			odm_set_bb_reg(dm, R_0x914, 0x70000, OFDM_OFF);
+		else if (dm->support_ic_type & ODM_IC_11N_SERIES)
+			odm_set_bb_reg(dm, R_0xd00, 0x70000000, OFDM_OFF);
+		/* @Delay 10 ms */
+		ODM_delay_ms(10);
+
+		/* @BB Reset */
+		if (dm->support_ic_type & ODM_IC_JGR3_SERIES) {
+			odm_set_bb_reg(dm, R_0x1d0c, 0x10000, 0x0);
+			odm_set_bb_reg(dm, R_0x1d0c, 0x10000, 0x1);
+		} else {
+			odm_set_bb_reg(dm, R_0x100, 0x100, 0x0);
+			odm_set_bb_reg(dm, R_0x100, 0x100, 0x1);
+		}
+	} 
+}
+void phydm_mp_reset_rx_counters_phy(void *dm_void)
+{
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+
+	phydm_reset_bb_hw_cnt(dm);
+}
+
+void phydm_mp_get_tx_ok(void *dm_void, u32 rate_index)
+{
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct phydm_mp *mp = &dm->dm_mp_table;
+
+	if (dm->support_ic_type & ODM_IC_JGR3_SERIES) {
+		if (phydm_is_cck_rate(dm, (u8)rate_index))
+			mp->tx_phy_ok_cnt = odm_get_bb_reg(dm, R_0x2de4,
+							   0xffff);
+		else
+			mp->tx_phy_ok_cnt = odm_get_bb_reg(dm, R_0x2de0,
+							   0xffff);
+	} else {
+		if (phydm_is_cck_rate(dm, (u8)rate_index))
+			mp->tx_phy_ok_cnt = odm_get_bb_reg(dm, R_0xf50,
+							   0xffff);
+		else
+			mp->tx_phy_ok_cnt = odm_get_bb_reg(dm, R_0xf50,
+							   0xffff0000);
+	}
+}
+
+void phydm_mp_get_rx_ok(void *dm_void)
+{
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct phydm_mp *mp = &dm->dm_mp_table;	
+
+	u32 cck_ok = 0, ofdm_ok = 0, ht_ok = 0, vht_ok = 0;	
+	u32 cck_err = 0, ofdm_err = 0, ht_err = 0, vht_err = 0;
+
+	if (dm->support_ic_type & ODM_IC_JGR3_SERIES) {
+		cck_ok = odm_get_bb_reg(dm, R_0x2c04, 0xffff);
+		ofdm_ok = odm_get_bb_reg(dm, R_0x2c14, 0xffff);
+		ht_ok = odm_get_bb_reg(dm, R_0x2c10, 0xffff);
+		vht_ok = odm_get_bb_reg(dm, R_0x2c0c, 0xffff);
+  
+		cck_err = odm_get_bb_reg(dm, R_0x2c04, 0xffff0000);
+		ofdm_err = odm_get_bb_reg(dm, R_0x2c14, 0xffff0000);
+		ht_err = odm_get_bb_reg(dm, R_0x2c10, 0xffff0000);
+		vht_err = odm_get_bb_reg(dm, R_0x2c0c, 0xffff0000);
+	} else if (dm->support_ic_type & ODM_IC_11AC_SERIES) {
+		cck_ok = odm_get_bb_reg(dm, R_0xf04, 0x3FFF);
+		ofdm_ok = odm_get_bb_reg(dm, R_0xf14, 0x3FFF);
+		ht_ok = odm_get_bb_reg(dm, R_0xf10, 0x3FFF);
+		vht_ok = odm_get_bb_reg(dm, R_0xf0c, 0x3FFF);
+  
+		cck_err = odm_get_bb_reg(dm, R_0xf04, 0x3FFF0000);
+		ofdm_err = odm_get_bb_reg(dm, R_0xf14, 0x3FFF0000);
+		ht_err = odm_get_bb_reg(dm, R_0xf10, 0x3FFF0000);
+		vht_err = odm_get_bb_reg(dm, R_0xf0c, 0x3FFF0000);
+	} else if (dm->support_ic_type & ODM_IC_11N_SERIES) {
+		cck_ok = odm_get_bb_reg(dm, R_0xf88, MASKDWORD);
+		ofdm_ok = odm_get_bb_reg(dm, R_0xf94, 0xffff);
+		ht_ok = odm_get_bb_reg(dm, R_0xf90, 0xffff);
+	    
+		cck_err = odm_get_bb_reg(dm, R_0xf84, MASKDWORD);
+		ofdm_err = odm_get_bb_reg(dm, R_0xf94, 0xffff0000);
+		ht_err = odm_get_bb_reg(dm, R_0xf90, 0xffff0000);
+	}
+
+	mp->rx_phy_ok_cnt = cck_ok + ofdm_ok + ht_ok + vht_ok;
+	mp->rx_phy_crc_err_cnt = cck_err + ofdm_err + ht_err + vht_err;
+	mp->io_value = (u32)mp->rx_phy_ok_cnt;
+}
+#endif
diff --git a/rtl8723DS/hal/phydm/phydm_mp.h b/rtl8723DS/hal/phydm/phydm_mp.h
new file mode 100644
index 0000000..40088c6
--- a/dev/null
+++ b/rtl8723DS/hal/phydm/phydm_mp.h
@@ -0,0 +1,94 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2007 - 2017  Realtek Corporation.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ *
+ * The full GNU General Public License is included in this distribution in the
+ * file called LICENSE.
+ *
+ * Contact Information:
+ * wlanfae <wlanfae@realtek.com>
+ * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
+ * Hsinchu 300, Taiwan.
+ *
+ * Larry Finger <Larry.Finger@lwfinger.net>
+ *
+ *****************************************************************************/
+
+#ifndef __PHYDM_MP_H__
+#define __PHYDM_MP_H__
+
+#define MP_VERSION "1.0"
+
+/* @1 ============================================================
+ * 1  Definition
+ * 1 ============================================================
+ */
+/* @1 ============================================================
+ * 1  structure
+ * 1 ============================================================
+ */
+struct phydm_mp {
+	/* @Rx OK count, statistics used in Mass Production Test.*/
+	u64 tx_phy_ok_cnt;
+	u64 rx_phy_ok_cnt;
+	/* @Rx CRC32 error count, statistics used in Mass Production Test.*/
+	u64 rx_phy_crc_err_cnt;
+	/* @The Value of IO operation is depend of MptActType.*/
+	u32 io_value;
+	u32 rf_reg0;
+	/* @u32 rfe_sel_a_0;*/
+	/* @u32 rfe_sel_b_0;*/
+	/* @u32 rfe_sel_c_0;*/
+	/* @u32 rfe_sel_d_0;*/
+	/* @u32 rfe_sel_a_1;*/
+	/* @u32 rfe_sel_b_1;*/
+	/* @u32 rfe_sel_c_1;*/
+	/* @u32 rfe_sel_d_1;*/
+};
+
+/* @1 ============================================================
+ * 1  enumeration
+ * 1 ============================================================
+ */
+enum TX_MODE_OFDM {
+	OFDM_OFF = 0,	
+	OFDM_CONT_TX = 1,
+	OFDM_SINGLE_CARRIER = 2,
+	OFDM_SINGLE_TONE = 4,
+};
+/* @1 ============================================================
+ * 1  function prototype
+ * 1 ============================================================
+ */
+#ifdef PHYDM_IC_JGR3_SERIES_SUPPORT
+void phydm_mp_set_single_tone_jgr3(void *dm_void, boolean is_single_tone,
+				   u8 path);
+
+void phydm_mp_set_carrier_supp_jgr3(void *dm_void, boolean is_carrier_supp,
+				    u32 rate_index);
+#endif
+
+void phydm_mp_set_crystal_cap(void *dm_void, u8 crystal_cap);
+
+void phydm_mp_set_single_tone(void *dm_void, boolean is_single_tone, u8 path);
+
+void phydm_mp_set_carrier_supp(void *dm_void, boolean is_carrier_supp,
+			       u32 rate_index);
+
+void phydm_mp_set_single_carrier(void *dm_void, boolean is_single_carrier);
+
+void phydm_mp_reset_rx_counters_phy(void *dm_void);
+
+void phydm_mp_get_tx_ok(void *dm_void, u32 rate_index);
+
+void phydm_mp_get_rx_ok(void *dm_void);
+#endif
diff --git a/rtl8723DS/hal/phydm/phydm_noisemonitor.c b/rtl8723DS/hal/phydm/phydm_noisemonitor.c
index 6f62dd7..aeeb255 100755..100644
--- a/rtl8723DS/hal/phydm/phydm_noisemonitor.c
+++ b/rtl8723DS/hal/phydm/phydm_noisemonitor.c
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2007 - 2017 Realtek Corporation.
+ * Copyright(c) 2007 - 2017  Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -8,18 +8,28 @@
  *
  * This program is distributed in the hope that it will be useful, but WITHOUT
  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  * more details.
  *
+ * The full GNU General Public License is included in this distribution in the
+ * file called LICENSE.
+ *
+ * Contact Information:
+ * wlanfae <wlanfae@realtek.com>
+ * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
+ * Hsinchu 300, Taiwan.
+ *
+ * Larry Finger <Larry.Finger@lwfinger.net>
+ *
  *****************************************************************************/
 
-/* ************************************************************
+/*************************************************************
  * include files
- * ************************************************************ */
+ ************************************************************/
 #include "mp_precomp.h"
 #include "phydm_precomp.h"
 
-/* *************************************************
+/**************************************************
  * This function is for inband noise test utility only
  * To obtain the inband noise level(dbm), do the following.
  * 1. disable DIG and Power Saving
@@ -27,371 +37,398 @@
  * 3. Stop updating idle time pwer report (for driver read)
  *	- 0x80c[25]
  *
- * ************************************************* */
-
-#define VALID_CNT				5
+ *************************************************/
 
 void phydm_set_noise_data_sum(struct noise_level *noise_data, u8 max_rf_path)
 {
-	u8 rf_path;
+	u8 i = 0;
 
-	for (rf_path = RF_PATH_A; rf_path < max_rf_path; rf_path++) {
-		if (noise_data->valid_cnt[rf_path])
-			noise_data->sum[rf_path] /= noise_data->valid_cnt[rf_path];
+	for (i = RF_PATH_A; i < max_rf_path; i++) {
+		if (noise_data->valid_cnt[i])
+			noise_data->sum[i] /= noise_data->valid_cnt[i];
 		else
-			noise_data->sum[rf_path]  = 0;
+			noise_data->sum[i] = 0;
 	}
 }
 
-s16 odm_inband_noise_monitor_n_series(struct PHY_DM_STRUCT	*p_dm, u8 is_pause_dig, u8 igi_value, u32 max_time)
+#if (ODM_IC_11N_SERIES_SUPPORT)
+s16 odm_inband_noise_monitor_n(struct dm_struct *dm, u8 is_pause_dig, u8 igi,
+			       u32 max_time)
 {
-	u32				tmp4b;
-	u8				max_rf_path = 0, rf_path;
-	u8				reg_c50, reg_c58, valid_done = 0;
-	struct noise_level		noise_data;
-	u64	start  = 0, func_start = 0,	func_end = 0;
+	u32 tmp4b;
+	u8 max_rf_path = 0, i = 0;
+	u8 reg_c50, reg_c58, valid_done = 0;
+	struct noise_level noise_data;
+	u64 start = 0, func_start = 0, func_end = 0;
+	s8 val_s8 = 0;
 
-	func_start = odm_get_current_time(p_dm);
-	p_dm->noise_level.noise_all = 0;
+	func_start = odm_get_current_time(dm);
+	dm->noise_level.noise_all = 0;
 
-	if ((p_dm->rf_type == RF_1T2R) || (p_dm->rf_type == RF_2T2R))
+	if (dm->rf_type == RF_1T2R || dm->rf_type == RF_2T2R)
 		max_rf_path = 2;
 	else
 		max_rf_path = 1;
 
-	PHYDM_DBG(p_dm, DBG_ENV_MNTR, ("odm_DebugControlInbandNoise_Nseries() ==>\n"));
+	PHYDM_DBG(dm, DBG_ENV_MNTR,
+		  "odm_DebugControlInbandNoise_Nseries() ==>\n");
 
-	odm_memory_set(p_dm, &noise_data, 0, sizeof(struct noise_level));
+	odm_memory_set(dm, &noise_data, 0, sizeof(struct noise_level));
 	/* step 1. Disable DIG && Set initial gain. */
 
 	if (is_pause_dig)
-		odm_pause_dig(p_dm, PHYDM_PAUSE, PHYDM_PAUSE_LEVEL_1, igi_value);
+		odm_pause_dig(dm, PHYDM_PAUSE, PHYDM_PAUSE_LEVEL_1, igi);
 
 	/* step 3. Get noise power level */
-	start = odm_get_current_time(p_dm);
+	start = odm_get_current_time(dm);
 	while (1) {
-
 		/* Stop updating idle time pwer report (for driver read) */
-		odm_set_bb_reg(p_dm, REG_FPGA0_TX_GAIN_STAGE, BIT(25), 1);
+		odm_set_bb_reg(dm, REG_FPGA0_TX_GAIN_STAGE, BIT(25), 1);
 
 		/* Read Noise Floor Report */
-		tmp4b = odm_get_bb_reg(p_dm, 0x8f8, MASKDWORD);
+		tmp4b = odm_get_bb_reg(dm, R_0x8f8, MASKDWORD);
 
 		/* update idle time pwer report per 5us */
-		odm_set_bb_reg(p_dm, REG_FPGA0_TX_GAIN_STAGE, BIT(25), 0);
+		odm_set_bb_reg(dm, REG_FPGA0_TX_GAIN_STAGE, BIT(25), 0);
 
 		ODM_delay_us(5);
 
 		noise_data.value[RF_PATH_A] = (u8)(tmp4b & 0xff);
-		noise_data.value[RF_PATH_B]  = (u8)((tmp4b & 0xff00) >> 8);
+		noise_data.value[RF_PATH_B] = (u8)((tmp4b & 0xff00) >> 8);
 
-		for (rf_path = RF_PATH_A; rf_path < max_rf_path; rf_path++) {
-			noise_data.sval[rf_path] = (s8)noise_data.value[rf_path];
-			noise_data.sval[rf_path] /= 2;
+		for (i = RF_PATH_A; i < max_rf_path; i++) {
+			noise_data.sval[i] = (s8)noise_data.value[i];
+			noise_data.sval[i] /= 2;
 		}
 
-		for (rf_path = RF_PATH_A; rf_path < max_rf_path; rf_path++) {
-			if (noise_data.valid_cnt[rf_path] < VALID_CNT) {
-				noise_data.valid_cnt[rf_path]++;
-				noise_data.sum[rf_path] += noise_data.sval[rf_path];
-				PHYDM_DBG(p_dm, DBG_ENV_MNTR, ("rf_path:%d Valid sval = %d\n", rf_path, noise_data.sval[rf_path]));
-				PHYDM_DBG(p_dm, DBG_ENV_MNTR, ("Sum of sval = %d,\n", noise_data.sum[rf_path]));
-				if (noise_data.valid_cnt[rf_path] == VALID_CNT)
-					valid_done++;
-			}
+		for (i = RF_PATH_A; i < max_rf_path; i++) {
+			if (noise_data.valid_cnt[i] >= VALID_CNT)
+				continue;
+
+			noise_data.valid_cnt[i]++;
+			noise_data.sum[i] += noise_data.sval[i];
+			PHYDM_DBG(dm, DBG_ENV_MNTR,
+				  "rf_path:%d Valid sval=%d\n", i,
+				  noise_data.sval[i]);
+			PHYDM_DBG(dm, DBG_ENV_MNTR, "Sum of sval = %d,\n",
+				  noise_data.sum[i]);
+			if (noise_data.valid_cnt[i] == VALID_CNT)
+				valid_done++;
 		}
-		if ((valid_done == max_rf_path) || (odm_get_progressing_time(p_dm, start) > max_time)) {
+		if (valid_done == max_rf_path ||
+		    (odm_get_progressing_time(dm, start) > max_time)) {
 			phydm_set_noise_data_sum(&noise_data, max_rf_path);
 			break;
 		}
 	}
-	reg_c50 = (u8)odm_get_bb_reg(p_dm, REG_OFDM_0_XA_AGC_CORE1, MASKBYTE0);
+	reg_c50 = (u8)odm_get_bb_reg(dm, REG_OFDM_0_XA_AGC_CORE1, MASKBYTE0);
 	reg_c50 &= ~BIT(7);
-	p_dm->noise_level.noise[RF_PATH_A] = (s8)(-110 + reg_c50 + noise_data.sum[RF_PATH_A]);
-	p_dm->noise_level.noise_all += p_dm->noise_level.noise[RF_PATH_A];
+	val_s8 = (s8)(-110 + reg_c50 + noise_data.sum[RF_PATH_A]);
+	dm->noise_level.noise[RF_PATH_A] = val_s8;
+	dm->noise_level.noise_all += dm->noise_level.noise[RF_PATH_A];
 
 	if (max_rf_path == 2) {
-		reg_c58 = (u8)odm_get_bb_reg(p_dm, REG_OFDM_0_XB_AGC_CORE1, MASKBYTE0);
+		reg_c58 = (u8)odm_get_bb_reg(dm, R_0xc58, MASKBYTE0);
 		reg_c58 &= ~BIT(7);
-		p_dm->noise_level.noise[RF_PATH_B] = (s8)(-110 + reg_c58 + noise_data.sum[RF_PATH_B]);
-		p_dm->noise_level.noise_all += p_dm->noise_level.noise[RF_PATH_B];
+		val_s8 = (s8)(-110 + reg_c58 + noise_data.sum[RF_PATH_B]);
+		dm->noise_level.noise[RF_PATH_B] = val_s8;
+		dm->noise_level.noise_all += dm->noise_level.noise[RF_PATH_B];
 	}
-	p_dm->noise_level.noise_all /= max_rf_path;
+	dm->noise_level.noise_all /= max_rf_path;
 
-	PHYDM_DBG(p_dm, DBG_ENV_MNTR, ("noise_a = %d, noise_b = %d, noise_all = %d\n",
-		p_dm->noise_level.noise[RF_PATH_A], p_dm->noise_level.noise[RF_PATH_B],
-		p_dm->noise_level.noise_all));
+	PHYDM_DBG(dm, DBG_ENV_MNTR,
+		  "noise_a = %d, noise_b = %d, noise_all = %d\n",
+		  dm->noise_level.noise[RF_PATH_A],
+		  dm->noise_level.noise[RF_PATH_B], dm->noise_level.noise_all);
 
 	/* step 4. Recover the Dig */
 	if (is_pause_dig)
-		odm_pause_dig(p_dm, PHYDM_RESUME, PHYDM_PAUSE_LEVEL_1, igi_value);
-	func_end = odm_get_progressing_time(p_dm, func_start);
-
-	PHYDM_DBG(p_dm, DBG_ENV_MNTR, ("end\n"));
-	return p_dm->noise_level.noise_all;
+		odm_pause_dig(dm, PHYDM_RESUME, PHYDM_PAUSE_LEVEL_1, igi);
+	func_end = odm_get_progressing_time(dm, func_start);
 
+	PHYDM_DBG(dm, DBG_ENV_MNTR, "end\n");
+	return dm->noise_level.noise_all;
 }
+#endif
 
-
-s16
-phydm_idle_noise_measurement_ac(
-	struct PHY_DM_STRUCT	*p_dm,
-	u8	is_pause_dig,
-	u8	igi_value,
-	u32	max_time
-	)
+#if (ODM_IC_11AC_SERIES_SUPPORT)
+s16 phydm_idle_noise_measure_ac(struct dm_struct *dm, u8 pause_dig,
+				u8 igi, u32 max_time)
 {
-	u32				tmp4b;
-	u8				max_rf_path = 0, rf_path;
-	u8				reg_c50, reg_e50, valid_done = 0;
-	u64				start  = 0, func_start = 0, func_end = 0;
-	struct noise_level	noise_data;
+	u32 tmp4b;
+	u8 max_rf_path = 0, i = 0;
+	u8 reg_c50, reg_e50, valid_done = 0;
+	u64 start = 0, func_start = 0, func_end = 0;
+	struct noise_level noise_data;
+	s8 val_s8 = 0;
 
-	func_start = odm_get_current_time(p_dm);
-	p_dm->noise_level.noise_all = 0;
+	func_start = odm_get_current_time(dm);
+	dm->noise_level.noise_all = 0;
 
-	if ((p_dm->rf_type == RF_1T2R) || (p_dm->rf_type == RF_2T2R))
+	if (dm->rf_type == RF_1T2R || dm->rf_type == RF_2T2R)
 		max_rf_path = 2;
 	else
 		max_rf_path = 1;
 
-	PHYDM_DBG(p_dm, DBG_ENV_MNTR, ("phydm_idle_noise_measurement_ac==>\n"));
+	PHYDM_DBG(dm, DBG_ENV_MNTR, "%s==>\n", __func__);
 
-	odm_memory_set(p_dm, &noise_data, 0, sizeof(struct noise_level));
+	odm_memory_set(dm, &noise_data, 0, sizeof(struct noise_level));
 
 	/*Step 1. Disable DIG && Set initial gain.*/
 
-	if (is_pause_dig)
-		odm_pause_dig(p_dm, PHYDM_PAUSE, PHYDM_PAUSE_LEVEL_1, igi_value);
+	if (pause_dig)
+		odm_pause_dig(dm, PHYDM_PAUSE, PHYDM_PAUSE_LEVEL_1, igi);
 
 	/*Step 2. Get noise power level*/
-	start = odm_get_current_time(p_dm);
+	start = odm_get_current_time(dm);
 
 	while (1) {
-
 		/*Stop updating idle time pwer report (for driver read)*/
-		odm_set_bb_reg(p_dm, 0x9e4, BIT(30), 0x1);
+		odm_set_bb_reg(dm, R_0x9e4, BIT(30), 0x1);
 
 		/*Read Noise Floor Report*/
-		tmp4b = odm_get_bb_reg(p_dm, 0xff0, MASKDWORD);
+		tmp4b = odm_get_bb_reg(dm, R_0xff0, MASKDWORD);
 
 		/*update idle time pwer report per 5us*/
-		odm_set_bb_reg(p_dm, 0x9e4, BIT(30), 0x0);
+		odm_set_bb_reg(dm, R_0x9e4, BIT(30), 0x0);
 
 		ODM_delay_us(5);
 
 		noise_data.value[RF_PATH_A] = (u8)(tmp4b & 0xff);
 		noise_data.value[RF_PATH_B] = (u8)((tmp4b & 0xff00) >> 8);
 
-		for (rf_path = RF_PATH_A; rf_path < max_rf_path; rf_path++) {
-			noise_data.sval[rf_path] = (s8)noise_data.value[rf_path];
-			noise_data.sval[rf_path] = noise_data.sval[rf_path] >> 1;
+		for (i = RF_PATH_A; i < max_rf_path; i++) {
+			noise_data.sval[i] = (s8)noise_data.value[i];
+			noise_data.sval[i] = noise_data.sval[i] >> 1;
 		}
 
-		for (rf_path = RF_PATH_A; rf_path < max_rf_path; rf_path++) {
-			if (noise_data.valid_cnt[rf_path] < VALID_CNT) {
-				noise_data.valid_cnt[rf_path]++;
-				noise_data.sum[rf_path] += noise_data.sval[rf_path];
-				PHYDM_DBG(p_dm, DBG_ENV_MNTR, ("Path:%d Valid sval = %d\n", rf_path, noise_data.sval[rf_path]));
-				PHYDM_DBG(p_dm, DBG_ENV_MNTR, ("Sum of sval = %d\n", noise_data.sum[rf_path]));
-				if (noise_data.valid_cnt[rf_path] == VALID_CNT)
-					valid_done++;
-			}
+		for (i = RF_PATH_A; i < max_rf_path; i++) {
+			if (noise_data.valid_cnt[i] >= VALID_CNT)
+				continue;
+
+			noise_data.valid_cnt[i]++;
+			noise_data.sum[i] += noise_data.sval[i];
+			PHYDM_DBG(dm, DBG_ENV_MNTR, "Path:%d Valid sval = %d\n",
+				  i, noise_data.sval[i]);
+			PHYDM_DBG(dm, DBG_ENV_MNTR, "Sum of sval = %d\n",
+				  noise_data.sum[i]);
+			if (noise_data.valid_cnt[i] == VALID_CNT)
+				valid_done++;
 		}
 
-		if ((valid_done == max_rf_path) || (odm_get_progressing_time(p_dm, start) > max_time)) {
+		if (valid_done == max_rf_path ||
+		    (odm_get_progressing_time(dm, start) > max_time)) {
 			phydm_set_noise_data_sum(&noise_data, max_rf_path);
 			break;
 		}
 	}
-	reg_c50 = (u8)odm_get_bb_reg(p_dm, 0xc50, MASKBYTE0);
+	reg_c50 = (u8)odm_get_bb_reg(dm, R_0xc50, MASKBYTE0);
 	reg_c50 &= ~BIT(7);
-	p_dm->noise_level.noise[RF_PATH_A] = (s8)(-110 + reg_c50 + noise_data.sum[RF_PATH_A]);
-	p_dm->noise_level.noise_all += p_dm->noise_level.noise[RF_PATH_A];
+	val_s8 = (s8)(-110 + reg_c50 + noise_data.sum[RF_PATH_A]);
+	dm->noise_level.noise[RF_PATH_A] = val_s8;
+	dm->noise_level.noise_all += dm->noise_level.noise[RF_PATH_A];
 
 	if (max_rf_path == 2) {
-		reg_e50 = (u8)odm_get_bb_reg(p_dm, 0xe50, MASKBYTE0);
+		reg_e50 = (u8)odm_get_bb_reg(dm, R_0xe50, MASKBYTE0);
 		reg_e50 &= ~BIT(7);
-		p_dm->noise_level.noise[RF_PATH_B] = (s8)(-110 + reg_e50 + noise_data.sum[RF_PATH_B]);
-		p_dm->noise_level.noise_all += p_dm->noise_level.noise[RF_PATH_B];
+		val_s8 = (s8)(-110 + reg_e50 + noise_data.sum[RF_PATH_B]);
+		dm->noise_level.noise[RF_PATH_B] = val_s8;
+		dm->noise_level.noise_all += dm->noise_level.noise[RF_PATH_B];
 	}
-	p_dm->noise_level.noise_all /= max_rf_path;
+	dm->noise_level.noise_all /= max_rf_path;
 
-	PHYDM_DBG(p_dm, DBG_ENV_MNTR, ("noise_a = %d, noise_b = %d, noise_all = %d\n",
-		p_dm->noise_level.noise[RF_PATH_A], p_dm->noise_level.noise[RF_PATH_B],
-		p_dm->noise_level.noise_all));
+	PHYDM_DBG(dm, DBG_ENV_MNTR,
+		  "noise_a = %d, noise_b = %d, noise_all = %d\n",
+		  dm->noise_level.noise[RF_PATH_A],
+		  dm->noise_level.noise[RF_PATH_B], dm->noise_level.noise_all);
 
 	/*Step 3. Recover the Dig*/
-	if (is_pause_dig)
-		odm_pause_dig(p_dm, PHYDM_RESUME, PHYDM_PAUSE_LEVEL_1, igi_value);
-	func_end = odm_get_progressing_time(p_dm, func_start);
-
-	PHYDM_DBG(p_dm, DBG_ENV_MNTR, ("end\n"));
-	return p_dm->noise_level.noise_all;
+	if (pause_dig)
+		odm_pause_dig(dm, PHYDM_RESUME, PHYDM_PAUSE_LEVEL_1, igi);
+	func_end = odm_get_progressing_time(dm, func_start);
 
+	PHYDM_DBG(dm, DBG_ENV_MNTR, "end\n");
+	return dm->noise_level.noise_all;
 }
 
-
-s16
-odm_inband_noise_monitor_ac_series(
-	struct PHY_DM_STRUCT	*p_dm,
-	u8 is_pause_dig,
-	u8 igi_value,
-	u32 max_time
-	)
+s16 odm_inband_noise_monitor_ac(struct dm_struct *dm, u8 pause_dig, u8 igi,
+				u32 max_time)
 {
-	s32          rxi_buf_anta, rxq_buf_anta; /*rxi_buf_antb, rxq_buf_antb;*/
-	s32	        value32, pwdb_A = 0, sval, noise, sum = 0;
-	boolean	        pd_flag;
-	u8		valid_cnt = 0;
-	u64	start = 0, func_start = 0, func_end = 0;
-
-	if (p_dm->support_ic_type & (ODM_RTL8822B | ODM_RTL8821C))
-		return phydm_idle_noise_measurement_ac(p_dm, is_pause_dig, igi_value, max_time);
+	s32 rxi_buf_anta, rxq_buf_anta; /*rxi_buf_antb, rxq_buf_antb;*/
+	s32 value32, pwdb_A = 0, sval, noise, sum = 0;
+	boolean pd_flag;
+	u8 valid_cnt = 0;
+	u64 start = 0, func_start = 0, func_end = 0;
+	s32 val_s32 = 0;
+	s16 rpt = 0;
+	u8 val_u8 = 0;
+
+	if (dm->support_ic_type & (ODM_RTL8822B | ODM_RTL8821C)) {
+		rpt = phydm_idle_noise_measure_ac(dm, pause_dig, igi, max_time);
+		return rpt;
+	}
 
-	if (!(p_dm->support_ic_type & (ODM_RTL8812 | ODM_RTL8821 | ODM_RTL8814A)))
+	if (!(dm->support_ic_type & (ODM_RTL8812 | ODM_RTL8821 | ODM_RTL8814A)))
 		return 0;
 
-	func_start = odm_get_current_time(p_dm);
-	p_dm->noise_level.noise_all = 0;
+	func_start = odm_get_current_time(dm);
+	dm->noise_level.noise_all = 0;
 
-	PHYDM_DBG(p_dm, DBG_ENV_MNTR, ("odm_inband_noise_monitor_ac_series() ==>\n"));
+	PHYDM_DBG(dm, DBG_ENV_MNTR, "%s ==>\n", __func__);
 
 	/* step 1. Disable DIG && Set initial gain. */
-	if (is_pause_dig)
-		odm_pause_dig(p_dm, PHYDM_PAUSE, PHYDM_PAUSE_LEVEL_1, igi_value);
+	if (pause_dig)
+		odm_pause_dig(dm, PHYDM_PAUSE, PHYDM_PAUSE_LEVEL_1, igi);
 
 	/* step 3. Get noise power level */
-	start = odm_get_current_time(p_dm);
+	start = odm_get_current_time(dm);
 
 	/* step 3. Get noise power level */
 	while (1) {
 		/*Set IGI=0x1C */
-		odm_write_dig(p_dm, 0x1C);
+		odm_write_dig(dm, 0x1C);
 		/*stop CK320&CK88 */
-		odm_set_bb_reg(p_dm, 0x8B4, BIT(6), 1);
+		odm_set_bb_reg(dm, R_0x8b4, BIT(6), 1);
 		/*Read path-A */
-		odm_set_bb_reg(p_dm, 0x8FC, MASKDWORD, 0x200); /*set debug port*/
-		value32 = odm_get_bb_reg(p_dm, 0xFA0, MASKDWORD); /*read debug port*/
-
-		rxi_buf_anta = (value32 & 0xFFC00) >> 10; /*rxi_buf_anta=RegFA0[19:10]*/
+		/*set debug port*/
+		odm_set_bb_reg(dm, R_0x8fc, MASKDWORD, 0x200);
+		/*read debug port*/
+		value32 = odm_get_bb_reg(dm, R_0xfa0, MASKDWORD);
+		/*rxi_buf_anta=RegFA0[19:10]*/
+		rxi_buf_anta = (value32 & 0xFFC00) >> 10;
 		rxq_buf_anta = value32 & 0x3FF; /*rxq_buf_anta=RegFA0[19:10]*/
 
 		pd_flag = (boolean)((value32 & BIT(31)) >> 31);
 
 		/*Not in packet detection period or Tx state */
-		if ((!pd_flag) || (rxi_buf_anta != 0x200)) {
+		if (!pd_flag || rxi_buf_anta != 0x200) {
 			/*sign conversion*/
 			rxi_buf_anta = odm_sign_conversion(rxi_buf_anta, 10);
 			rxq_buf_anta = odm_sign_conversion(rxq_buf_anta, 10);
 
-			pwdb_A = odm_pwdb_conversion(rxi_buf_anta * rxi_buf_anta + rxq_buf_anta * rxq_buf_anta, 20, 18); /*S(10,9)*S(10,9)=S(20,18)*/
+			val_s32 = rxi_buf_anta * rxi_buf_anta +
+				  rxq_buf_anta * rxq_buf_anta;
+			/*S(10,9)*S(10,9)=S(20,18)*/
+			pwdb_A = odm_pwdb_conversion(val_s32, 20, 18);
 
-			PHYDM_DBG(p_dm, DBG_ENV_MNTR, ("pwdb_A= %d dB, rxi_buf_anta= 0x%x, rxq_buf_anta= 0x%x\n", pwdb_A, rxi_buf_anta & 0x3FF, rxq_buf_anta & 0x3FF));
+			PHYDM_DBG(dm, DBG_ENV_MNTR,
+				  "pwdb_A= %d dB, rxi_buf_anta= 0x%x, rxq_buf_anta= 0x%x\n",
+				  pwdb_A, rxi_buf_anta & 0x3FF,
+				  rxq_buf_anta & 0x3FF);
 		}
 		/*Start CK320&CK88*/
-		odm_set_bb_reg(p_dm, 0x8B4, BIT(6), 0);
-		/*BB Reset*/
-		odm_write_1byte(p_dm, 0x02, odm_read_1byte(p_dm, 0x02) & (~BIT(0)));
-		odm_write_1byte(p_dm, 0x02, odm_read_1byte(p_dm, 0x02) | BIT(0));
+		odm_set_bb_reg(dm, R_0x8b4, BIT(6), 0);
+		/*@BB Reset*/
+		val_u8 = odm_read_1byte(dm, 0x02) & (~BIT(0));
+		odm_write_1byte(dm, 0x02, val_u8);
+		val_u8 = odm_read_1byte(dm, 0x02) | BIT(0);
+		odm_write_1byte(dm, 0x02, val_u8);
 		/*PMAC Reset*/
-		odm_write_1byte(p_dm, 0xB03, odm_read_1byte(p_dm, 0xB03) & (~BIT(0)));
-		odm_write_1byte(p_dm, 0xB03, odm_read_1byte(p_dm, 0xB03) | BIT(0));
-		/*CCK Reset*/
-		if (odm_read_1byte(p_dm, 0x80B) & BIT(4)) {
-			odm_write_1byte(p_dm, 0x80B, odm_read_1byte(p_dm, 0x80B) & (~BIT(4)));
-			odm_write_1byte(p_dm, 0x80B, odm_read_1byte(p_dm, 0x80B) | BIT(4));
+		val_u8 = odm_read_1byte(dm, 0xB03) & (~BIT(0));
+		odm_write_1byte(dm, 0xB03, val_u8);
+		val_u8 = odm_read_1byte(dm, 0xB03) | BIT(0);
+		odm_write_1byte(dm, 0xB03, val_u8);
+		/*@CCK Reset*/
+		if (odm_read_1byte(dm, 0x80B) & BIT(4)) {
+			val_u8 = odm_read_1byte(dm, 0x80B) & (~BIT(4));
+			odm_write_1byte(dm, 0x80B, val_u8);
+			val_u8 = odm_read_1byte(dm, 0x80B) | BIT(4);
+			odm_write_1byte(dm, 0x80B, val_u8);
 		}
 
 		sval = pwdb_A;
 
-		if ((sval < 0 && sval >= -27) && (valid_cnt < VALID_CNT)){
+		if ((sval < 0 && sval >= -27) && valid_cnt < VALID_CNT) {
 			valid_cnt++;
 			sum += sval;
-			PHYDM_DBG(p_dm, DBG_ENV_MNTR, ("Valid sval = %d\n", sval));
-			PHYDM_DBG(p_dm, DBG_ENV_MNTR, ("Sum of sval = %d,\n", sum));
-			if ((valid_cnt >= VALID_CNT) || (odm_get_progressing_time(p_dm, start) > max_time)) {
+			PHYDM_DBG(dm, DBG_ENV_MNTR, "Valid sval = %d\n", sval);
+			PHYDM_DBG(dm, DBG_ENV_MNTR, "Sum of sval = %d,\n", sum);
+			if (valid_cnt >= VALID_CNT ||
+			    (odm_get_progressing_time(dm, start) > max_time)) {
 				sum /= VALID_CNT;
-				PHYDM_DBG(p_dm, DBG_ENV_MNTR, ("After divided, sum = %d\n", sum));
+				PHYDM_DBG(dm, DBG_ENV_MNTR,
+					  "After divided, sum = %d\n", sum);
 				break;
 			}
 		}
 	}
 
-	/*ADC backoff is 12dB,*/
+	/*@ADC backoff is 12dB,*/
 	/*Ptarget=0x1C-110=-82dBm*/
 	noise = sum + 12 + 0x1C - 110;
 
 	/*Offset*/
 	noise = noise - 3;
-	PHYDM_DBG(p_dm, DBG_ENV_MNTR, ("noise = %d\n", noise));
-	p_dm->noise_level.noise_all = (s16)noise;
+	PHYDM_DBG(dm, DBG_ENV_MNTR, "noise = %d\n", noise);
+	dm->noise_level.noise_all = (s16)noise;
 
 	/* step 4. Recover the Dig*/
-	if (is_pause_dig)
-		odm_pause_dig(p_dm, PHYDM_RESUME, PHYDM_PAUSE_LEVEL_1, igi_value);
+	if (pause_dig)
+		odm_pause_dig(dm, PHYDM_RESUME, PHYDM_PAUSE_LEVEL_1, igi);
 
-	func_end = odm_get_progressing_time(p_dm, func_start);
+	func_end = odm_get_progressing_time(dm, func_start);
 
-	PHYDM_DBG(p_dm, DBG_ENV_MNTR, ("odm_inband_noise_monitor_ac_series() <==\n"));
+	PHYDM_DBG(dm, DBG_ENV_MNTR, "%s <==\n", __func__);
 
-	return p_dm->noise_level.noise_all;
+	return dm->noise_level.noise_all;
 }
+#endif
 
+s16 odm_inband_noise_monitor(void *dm_void, u8 pause_dig, u8 igi,
+			     u32 max_time)
+{
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	s16 val = 0;
 
+	igi = 0x32;
 
-s16
-odm_inband_noise_monitor(
-	void *p_dm_void,
-	u8 is_pause_dig,
-	u8 igi_value,
-	u32 max_time
-	)
-{
-	struct PHY_DM_STRUCT	*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
+	/* since HW ability is about +15~-35,
+	 * we fix IGI = -60 for maximum coverage
+	 */
+	#if (ODM_IC_11AC_SERIES_SUPPORT)
+	if (dm->support_ic_type & ODM_IC_11AC_SERIES)
+		val = odm_inband_noise_monitor_ac(dm, pause_dig, igi, max_time);
+	#endif
 
-	igi_value = 0x32;	/*since HW ability is about +15~-35, we fix IGI = -60 for maximum coverage*/
+	#if (ODM_IC_11N_SERIES_SUPPORT)
+	if (dm->support_ic_type & ODM_IC_11N_SERIES)
+		val = odm_inband_noise_monitor_n(dm, pause_dig, igi, max_time);
+	#endif
 
-	if (p_dm->support_ic_type & ODM_IC_11AC_SERIES)
-		return odm_inband_noise_monitor_ac_series(p_dm, is_pause_dig, igi_value, max_time);
-	else
-		return odm_inband_noise_monitor_n_series(p_dm, is_pause_dig, igi_value, max_time);
+	return val;
 }
 
-void
-phydm_noisy_detection(
-	void *p_dm_void
-)
+void phydm_noisy_detection(void *dm_void)
 {
-	struct PHY_DM_STRUCT	*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	u32  total_fa_cnt, total_cca_cnt;
-	u32  score = 0, i, score_smooth;
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	u32 total_fa_cnt, total_cca_cnt;
+	u32 score = 0, i, score_smooth;
 
-	total_cca_cnt = p_dm->false_alm_cnt.cnt_cca_all;
-	total_fa_cnt  = p_dm->false_alm_cnt.cnt_all;
+	total_cca_cnt = dm->false_alm_cnt.cnt_cca_all;
+	total_fa_cnt = dm->false_alm_cnt.cnt_all;
 
 #if 0
-	if (total_fa_cnt * 16 >= total_cca_cnt * 14)    /*  87.5 */
+	if (total_fa_cnt * 16 >= total_cca_cnt * 14)    /*  @87.5 */
 		;
-	else if (total_fa_cnt * 16 >= total_cca_cnt * 12) /*  75 */
+	else if (total_fa_cnt * 16 >= total_cca_cnt * 12) /*  @75 */
 		;
-	else if (total_fa_cnt * 16 >= total_cca_cnt * 10) /*  56.25 */
+	else if (total_fa_cnt * 16 >= total_cca_cnt * 10) /*  @56.25 */
 		;
-	else if (total_fa_cnt * 16 >= total_cca_cnt * 8) /*  50 */
+	else if (total_fa_cnt * 16 >= total_cca_cnt * 8) /*  @50 */
 		;
-	else if (total_fa_cnt * 16 >= total_cca_cnt * 7) /*  43.75 */
+	else if (total_fa_cnt * 16 >= total_cca_cnt * 7) /*  @43.75 */
 		;
-	else if (total_fa_cnt * 16 >= total_cca_cnt * 6) /*  37.5 */
+	else if (total_fa_cnt * 16 >= total_cca_cnt * 6) /*  @37.5 */
 		;
-	else if (total_fa_cnt * 16 >= total_cca_cnt * 5) /*  31.25% */
+	else if (total_fa_cnt * 16 >= total_cca_cnt * 5) /*  @31.25% */
 		;
-	else if (total_fa_cnt * 16 >= total_cca_cnt * 4) /*  25% */
+	else if (total_fa_cnt * 16 >= total_cca_cnt * 4) /*  @25% */
 		;
-	else if (total_fa_cnt * 16 >= total_cca_cnt * 3) /*  18.75% */
+	else if (total_fa_cnt * 16 >= total_cca_cnt * 3) /*  @18.75% */
 		;
-	else if (total_fa_cnt * 16 >= total_cca_cnt * 2) /*  12.5% */
+	else if (total_fa_cnt * 16 >= total_cca_cnt * 2) /*  @12.5% */
 		;
-	else if (total_fa_cnt * 16 >= total_cca_cnt * 1) /*  6.25% */
+	else if (total_fa_cnt * 16 >= total_cca_cnt * 1) /*  @6.25% */
 		;
 #endif
 	for (i = 0; i <= 16; i++) {
@@ -402,16 +439,19 @@ phydm_noisy_detection(
 	}
 
 	/* noisy_decision_smooth = noisy_decision_smooth>>1 + (score<<3)>>1; */
-	p_dm->noisy_decision_smooth = (p_dm->noisy_decision_smooth >> 1) + (score << 2);
+	dm->noisy_decision_smooth = (dm->noisy_decision_smooth >> 1) +
+				    (score << 2);
 
 	/* Round the noisy_decision_smooth: +"3" comes from (2^3)/2-1 */
-	score_smooth = (total_cca_cnt >= 300) ? ((p_dm->noisy_decision_smooth + 3) >> 3) : 0;
+	if (total_cca_cnt >= 300)
+		score_smooth = (dm->noisy_decision_smooth + 3) >> 3;
+	else
+		score_smooth = 0;
 
-	p_dm->noisy_decision = (score_smooth >= 3) ? 1 : 0;
-	
-	PHYDM_DBG(p_dm, DBG_ENV_MNTR,
-		("[NoisyDetection] CCA_cnt=%d,FA_cnt=%d, noisy_dec_smooth=%d, score=%d, score_smooth=%d, noisy_dec=%d\n",
-		total_cca_cnt, total_fa_cnt, p_dm->noisy_decision_smooth, score, score_smooth, p_dm->noisy_decision));
+	dm->noisy_decision = (score_smooth >= 3) ? 1 : 0;
 
+	PHYDM_DBG(dm, DBG_ENV_MNTR,
+		  "[NoisyDetection] CCA_cnt=%d,FA_cnt=%d, noisy_dec_smooth=%d, score=%d, score_smooth=%d, noisy_dec=%d\n",
+		  total_cca_cnt, total_fa_cnt, dm->noisy_decision_smooth, score,
+		  score_smooth, dm->noisy_decision);
 }
-
diff --git a/rtl8723DS/hal/phydm/phydm_noisemonitor.h b/rtl8723DS/hal/phydm/phydm_noisemonitor.h
index 97a745f..507285a 100755..100644
--- a/rtl8723DS/hal/phydm/phydm_noisemonitor.h
+++ b/rtl8723DS/hal/phydm/phydm_noisemonitor.h
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2007 - 2017 Realtek Corporation.
+ * Copyright(c) 2007 - 2017  Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -8,38 +8,41 @@
  *
  * This program is distributed in the hope that it will be useful, but WITHOUT
  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  * more details.
  *
+ * The full GNU General Public License is included in this distribution in the
+ * file called LICENSE.
+ *
+ * Contact Information:
+ * wlanfae <wlanfae@realtek.com>
+ * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
+ * Hsinchu 300, Taiwan.
+ *
+ * Larry Finger <Larry.Finger@lwfinger.net>
+ *
  *****************************************************************************/
-#ifndef	__ODMNOISEMONITOR_H__
+#ifndef __ODMNOISEMONITOR_H__
 #define __ODMNOISEMONITOR_H__
 
-#define	ODM_MAX_CHANNEL_NUM					38/* 14+24 */
+#define VALID_CNT 5
+
 struct noise_level {
-	u8				value[PHYDM_MAX_RF_PATH];
-	s8				sval[PHYDM_MAX_RF_PATH];
-	s32				sum[PHYDM_MAX_RF_PATH];
-	u8				valid[PHYDM_MAX_RF_PATH];
-	u8				valid_cnt[PHYDM_MAX_RF_PATH];
+	u8 value[PHYDM_MAX_RF_PATH];
+	s8 sval[PHYDM_MAX_RF_PATH];
+	s32 sum[PHYDM_MAX_RF_PATH];
+	u8 valid[PHYDM_MAX_RF_PATH];
+	u8 valid_cnt[PHYDM_MAX_RF_PATH];
 };
 
-
-struct _ODM_NOISE_MONITOR_ {
-	s8			noise[PHYDM_MAX_RF_PATH];
-	s16			noise_all;
+struct odm_noise_monitor {
+	s8 noise[PHYDM_MAX_RF_PATH];
+	s16 noise_all;
 };
 
-s16 odm_inband_noise_monitor(
-	void *p_dm_void,
-	u8 is_pause_dig,
-	u8 igi_value,
-	u32 max_time
-);
+s16 odm_inband_noise_monitor(void *dm_void, u8 is_pause_dig, u8 igi_value,
+			     u32 max_time);
 
-void
-phydm_noisy_detection(
-	void *p_dm_void
-);
+void phydm_noisy_detection(void *dm_void);
 
 #endif
diff --git a/rtl8723DS/hal/phydm/phydm_pathdiv.c b/rtl8723DS/hal/phydm/phydm_pathdiv.c
index 72e4bcb..b3c46d2 100755..100644
--- a/rtl8723DS/hal/phydm/phydm_pathdiv.c
+++ b/rtl8723DS/hal/phydm/phydm_pathdiv.c
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2007 - 2017 Realtek Corporation.
+ * Copyright(c) 2007 - 2017  Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -8,685 +8,921 @@
  *
  * This program is distributed in the hope that it will be useful, but WITHOUT
  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  * more details.
  *
+ * The full GNU General Public License is included in this distribution in the
+ * file called LICENSE.
+ *
+ * Contact Information:
+ * wlanfae <wlanfae@realtek.com>
+ * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
+ * Hsinchu 300, Taiwan.
+ *
+ * Larry Finger <Larry.Finger@lwfinger.net>
+ *
  *****************************************************************************/
 
-/* ************************************************************
+/*************************************************************
  * include files
- * ************************************************************ */
+ ************************************************************/
 #include "mp_precomp.h"
 #include "phydm_precomp.h"
 
-#if (defined(CONFIG_PATH_DIVERSITY))
+#ifdef CONFIG_PATH_DIVERSITY
 #if RTL8814A_SUPPORT
-
-void
-phydm_dtp_fix_tx_path(
-	void	*p_dm_void,
-	u8	path
-)
+void phydm_dtp_fix_tx_path(
+	void *dm_void,
+	u8 path)
 {
-	struct PHY_DM_STRUCT		*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	struct _ODM_PATH_DIVERSITY_		*p_dm_path_div = &p_dm->dm_path_div;
-	u8			i, num_enable_path = 0;
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct _ODM_PATH_DIVERSITY_ *p_div = &dm->dm_path_div;
+	u8 i, num_enable_path = 0;
 
-	if (path == p_dm_path_div->pre_tx_path)
+	if (path == p_div->pre_tx_path)
 		return;
 	else
-		p_dm_path_div->pre_tx_path = path;
+		p_div->pre_tx_path = path;
 
-	odm_set_bb_reg(p_dm, 0x93c, BIT(18) | BIT(19), 3);
+	odm_set_bb_reg(dm, R_0x93c, BIT(18) | BIT(19), 3);
 
 	for (i = 0; i < 4; i++) {
 		if (path & BIT(i))
 			num_enable_path++;
 	}
-	PHYDM_DBG(p_dm, DBG_PATH_DIV, (" number of turn-on path : (( %d ))\n", num_enable_path));
+	PHYDM_DBG(dm, DBG_PATH_DIV, " number of turn-on path : (( %d ))\n",
+		  num_enable_path);
 
 	if (num_enable_path == 1) {
-		odm_set_bb_reg(p_dm, 0x93c, 0xf00000, path);
-
-		if (path == BB_PATH_A) { /* 1-1 */
-			PHYDM_DBG(p_dm, DBG_PATH_DIV, (" Turn on path (( A ))\n"));
-			odm_set_bb_reg(p_dm, 0x93c, BIT(25) | BIT(24), 0);
-		} else 	if (path == BB_PATH_B) { /* 1-2 */
-			PHYDM_DBG(p_dm, DBG_PATH_DIV, (" Turn on path (( B ))\n"));
-			odm_set_bb_reg(p_dm, 0x93c, BIT(27) | BIT(26), 0);
-		} else 	if (path == BB_PATH_C) { /* 1-3 */
-			PHYDM_DBG(p_dm, DBG_PATH_DIV, (" Turn on path (( C ))\n"));
-			odm_set_bb_reg(p_dm, 0x93c, BIT(29) | BIT(28), 0);
-
-		} else 	if (path == BB_PATH_D) { /* 1-4 */
-			PHYDM_DBG(p_dm, DBG_PATH_DIV, (" Turn on path (( D ))\n"));
-			odm_set_bb_reg(p_dm, 0x93c, BIT(31) | BIT(30), 0);
+		odm_set_bb_reg(dm, R_0x93c, 0xf00000, path);
+
+		if (path == BB_PATH_A) { /* @1-1 */
+			PHYDM_DBG(dm, DBG_PATH_DIV, " Turn on path (( A ))\n");
+			odm_set_bb_reg(dm, R_0x93c, BIT(25) | BIT(24), 0);
+		} else if (path == BB_PATH_B) { /* @1-2 */
+			PHYDM_DBG(dm, DBG_PATH_DIV, " Turn on path (( B ))\n");
+			odm_set_bb_reg(dm, R_0x93c, BIT(27) | BIT(26), 0);
+		} else if (path == BB_PATH_C) { /* @1-3 */
+			PHYDM_DBG(dm, DBG_PATH_DIV, " Turn on path (( C ))\n");
+			odm_set_bb_reg(dm, R_0x93c, BIT(29) | BIT(28), 0);
+
+		} else if (path == BB_PATH_D) { /* @1-4 */
+			PHYDM_DBG(dm, DBG_PATH_DIV, " Turn on path (( D ))\n");
+			odm_set_bb_reg(dm, R_0x93c, BIT(31) | BIT(30), 0);
 		}
 
-	} else	if (num_enable_path == 2) {
-		odm_set_bb_reg(p_dm, 0x93c, 0xf00000, path);
-		odm_set_bb_reg(p_dm, 0x940, 0xf0, path);
+	} else if (num_enable_path == 2) {
+		odm_set_bb_reg(dm, R_0x93c, 0xf00000, path);
+		odm_set_bb_reg(dm, R_0x940, 0xf0, path);
 
-		if (path == (BB_PATH_AB)) { /* 2-1 */
-			PHYDM_DBG(p_dm, DBG_PATH_DIV, (" Turn on path (( A B ))\n"));
+		if (path == (BB_PATH_AB)) { /* @2-1 */
+			PHYDM_DBG(dm, DBG_PATH_DIV,
+				  " Turn on path (( A B ))\n");
 			/* set for 1ss */
-			odm_set_bb_reg(p_dm, 0x93c, BIT(25) | BIT(24), 0);
-			odm_set_bb_reg(p_dm, 0x93c, BIT(27) | BIT(26), 1);
+			odm_set_bb_reg(dm, R_0x93c, BIT(25) | BIT(24), 0);
+			odm_set_bb_reg(dm, R_0x93c, BIT(27) | BIT(26), 1);
 			/* set for 2ss */
-			odm_set_bb_reg(p_dm, 0x940, BIT(9) | BIT(8), 0);
-			odm_set_bb_reg(p_dm, 0x940, BIT(11) | BIT(10), 1);
-		} else 	if (path == BB_PATH_AC) { /* 2-2 */
-			PHYDM_DBG(p_dm, DBG_PATH_DIV, (" Turn on path (( A C ))\n"));
+			odm_set_bb_reg(dm, R_0x940, BIT(9) | BIT(8), 0);
+			odm_set_bb_reg(dm, R_0x940, BIT(11) | BIT(10), 1);
+		} else if (path == BB_PATH_AC) { /* @2-2 */
+			PHYDM_DBG(dm, DBG_PATH_DIV,
+				  " Turn on path (( A C ))\n");
 			/* set for 1ss */
-			odm_set_bb_reg(p_dm, 0x93c, BIT(25) | BIT(24), 0);
-			odm_set_bb_reg(p_dm, 0x93c, BIT(29) | BIT(28), 1);
+			odm_set_bb_reg(dm, R_0x93c, BIT(25) | BIT(24), 0);
+			odm_set_bb_reg(dm, R_0x93c, BIT(29) | BIT(28), 1);
 			/* set for 2ss */
-			odm_set_bb_reg(p_dm, 0x940, BIT(9) | BIT(8), 0);
-			odm_set_bb_reg(p_dm, 0x940, BIT(13) | BIT(12), 1);
-		} else 	if (path == BB_PATH_AD) { /* 2-3 */
-			PHYDM_DBG(p_dm, DBG_PATH_DIV, (" Turn on path (( A D ))\n"));
+			odm_set_bb_reg(dm, R_0x940, BIT(9) | BIT(8), 0);
+			odm_set_bb_reg(dm, R_0x940, BIT(13) | BIT(12), 1);
+		} else if (path == BB_PATH_AD) { /* @2-3 */
+			PHYDM_DBG(dm, DBG_PATH_DIV,
+				  " Turn on path (( A D ))\n");
 			/* set for 1ss */
-			odm_set_bb_reg(p_dm, 0x93c, BIT(25) | BIT(24), 0);
-			odm_set_bb_reg(p_dm, 0x93c, BIT(31) | BIT(30), 1);
+			odm_set_bb_reg(dm, R_0x93c, BIT(25) | BIT(24), 0);
+			odm_set_bb_reg(dm, R_0x93c, BIT(31) | BIT(30), 1);
 			/* set for 2ss */
-			odm_set_bb_reg(p_dm, 0x940, BIT(9) | BIT(8), 0);
-			odm_set_bb_reg(p_dm, 0x940, BIT(15) | BIT(14), 1);
-		} else 	if (path == BB_PATH_BC) { /* 2-4 */
-			PHYDM_DBG(p_dm, DBG_PATH_DIV, (" Turn on path (( B C ))\n"));
+			odm_set_bb_reg(dm, R_0x940, BIT(9) | BIT(8), 0);
+			odm_set_bb_reg(dm, R_0x940, BIT(15) | BIT(14), 1);
+		} else if (path == BB_PATH_BC) { /* @2-4 */
+			PHYDM_DBG(dm, DBG_PATH_DIV,
+				  " Turn on path (( B C ))\n");
 			/* set for 1ss */
-			odm_set_bb_reg(p_dm, 0x93c, BIT(27) | BIT(26), 0);
-			odm_set_bb_reg(p_dm, 0x93c, BIT(29) | BIT(28), 1);
+			odm_set_bb_reg(dm, R_0x93c, BIT(27) | BIT(26), 0);
+			odm_set_bb_reg(dm, R_0x93c, BIT(29) | BIT(28), 1);
 			/* set for 2ss */
-			odm_set_bb_reg(p_dm, 0x940, BIT(11) | BIT(10), 0);
-			odm_set_bb_reg(p_dm, 0x940, BIT(13) | BIT(12), 1);
-		} else 	if (path == BB_PATH_BD) { /* 2-5 */
-			PHYDM_DBG(p_dm, DBG_PATH_DIV, (" Turn on path (( B D ))\n"));
+			odm_set_bb_reg(dm, R_0x940, BIT(11) | BIT(10), 0);
+			odm_set_bb_reg(dm, R_0x940, BIT(13) | BIT(12), 1);
+		} else if (path == BB_PATH_BD) { /* @2-5 */
+			PHYDM_DBG(dm, DBG_PATH_DIV,
+				  " Turn on path (( B D ))\n");
 			/* set for 1ss */
-			odm_set_bb_reg(p_dm, 0x93c, BIT(27) | BIT(26), 0);
-			odm_set_bb_reg(p_dm, 0x93c, BIT(31) | BIT(30), 1);
+			odm_set_bb_reg(dm, R_0x93c, BIT(27) | BIT(26), 0);
+			odm_set_bb_reg(dm, R_0x93c, BIT(31) | BIT(30), 1);
 			/* set for 2ss */
-			odm_set_bb_reg(p_dm, 0x940, BIT(11) | BIT(10), 0);
-			odm_set_bb_reg(p_dm, 0x940, BIT(15) | BIT(14), 1);
-		} else 	if (path == BB_PATH_CD) { /* 2-6 */
-			PHYDM_DBG(p_dm, DBG_PATH_DIV, (" Turn on path (( C D ))\n"));
+			odm_set_bb_reg(dm, R_0x940, BIT(11) | BIT(10), 0);
+			odm_set_bb_reg(dm, R_0x940, BIT(15) | BIT(14), 1);
+		} else if (path == BB_PATH_CD) { /* @2-6 */
+			PHYDM_DBG(dm, DBG_PATH_DIV,
+				  " Turn on path (( C D ))\n");
 			/* set for 1ss */
-			odm_set_bb_reg(p_dm, 0x93c, BIT(29) | BIT(28), 0);
-			odm_set_bb_reg(p_dm, 0x93c, BIT(31) | BIT(30), 1);
+			odm_set_bb_reg(dm, R_0x93c, BIT(29) | BIT(28), 0);
+			odm_set_bb_reg(dm, R_0x93c, BIT(31) | BIT(30), 1);
 			/* set for 2ss */
-			odm_set_bb_reg(p_dm, 0x940, BIT(13) | BIT(12), 0);
-			odm_set_bb_reg(p_dm, 0x940, BIT(15) | BIT(14), 1);
+			odm_set_bb_reg(dm, R_0x940, BIT(13) | BIT(12), 0);
+			odm_set_bb_reg(dm, R_0x940, BIT(15) | BIT(14), 1);
 		}
 
-	} else	if (num_enable_path == 3) {
-		odm_set_bb_reg(p_dm, 0x93c, 0xf00000, path);
-		odm_set_bb_reg(p_dm, 0x940, 0xf0, path);
-		odm_set_bb_reg(p_dm, 0x940, 0xf0000, path);
+	} else if (num_enable_path == 3) {
+		odm_set_bb_reg(dm, R_0x93c, 0xf00000, path);
+		odm_set_bb_reg(dm, R_0x940, 0xf0, path);
+		odm_set_bb_reg(dm, R_0x940, 0xf0000, path);
 
-		if (path == BB_PATH_ABC) { /* 3-1 */
-			PHYDM_DBG(p_dm, DBG_PATH_DIV, (" Turn on path (( A B C))\n"));
+		if (path == BB_PATH_ABC) { /* @3-1 */
+			PHYDM_DBG(dm, DBG_PATH_DIV,
+				  " Turn on path (( A B C))\n");
 			/* set for 1ss */
-			odm_set_bb_reg(p_dm, 0x93c, BIT(25) | BIT(24), 0);
-			odm_set_bb_reg(p_dm, 0x93c, BIT(27) | BIT(26), 1);
-			odm_set_bb_reg(p_dm, 0x93c, BIT(29) | BIT(28), 2);
+			odm_set_bb_reg(dm, R_0x93c, BIT(25) | BIT(24), 0);
+			odm_set_bb_reg(dm, R_0x93c, BIT(27) | BIT(26), 1);
+			odm_set_bb_reg(dm, R_0x93c, BIT(29) | BIT(28), 2);
 			/* set for 2ss */
-			odm_set_bb_reg(p_dm, 0x940, BIT(9) | BIT(8), 0);
-			odm_set_bb_reg(p_dm, 0x940, BIT(11) | BIT(10), 1);
-			odm_set_bb_reg(p_dm, 0x940, BIT(13) | BIT(12), 2);
+			odm_set_bb_reg(dm, R_0x940, BIT(9) | BIT(8), 0);
+			odm_set_bb_reg(dm, R_0x940, BIT(11) | BIT(10), 1);
+			odm_set_bb_reg(dm, R_0x940, BIT(13) | BIT(12), 2);
 			/* set for 3ss */
-			odm_set_bb_reg(p_dm, 0x940, BIT(21) | BIT(20), 0);
-			odm_set_bb_reg(p_dm, 0x940, BIT(23) | BIT(22), 1);
-			odm_set_bb_reg(p_dm, 0x940, BIT(25) | BIT(24), 2);
-		} else 	if (path == BB_PATH_ABD) { /* 3-2 */
-			PHYDM_DBG(p_dm, DBG_PATH_DIV, (" Turn on path (( A B D ))\n"));
+			odm_set_bb_reg(dm, R_0x940, BIT(21) | BIT(20), 0);
+			odm_set_bb_reg(dm, R_0x940, BIT(23) | BIT(22), 1);
+			odm_set_bb_reg(dm, R_0x940, BIT(25) | BIT(24), 2);
+		} else if (path == BB_PATH_ABD) { /* @3-2 */
+			PHYDM_DBG(dm, DBG_PATH_DIV,
+				  " Turn on path (( A B D ))\n");
 			/* set for 1ss */
-			odm_set_bb_reg(p_dm, 0x93c, BIT(25) | BIT(24), 0);
-			odm_set_bb_reg(p_dm, 0x93c, BIT(27) | BIT(26), 1);
-			odm_set_bb_reg(p_dm, 0x93c, BIT(31) | BIT(30), 2);
+			odm_set_bb_reg(dm, R_0x93c, BIT(25) | BIT(24), 0);
+			odm_set_bb_reg(dm, R_0x93c, BIT(27) | BIT(26), 1);
+			odm_set_bb_reg(dm, R_0x93c, BIT(31) | BIT(30), 2);
 			/* set for 2ss */
-			odm_set_bb_reg(p_dm, 0x940, BIT(9) | BIT(8), 0);
-			odm_set_bb_reg(p_dm, 0x940, BIT(11) | BIT(10), 1);
-			odm_set_bb_reg(p_dm, 0x940, BIT(15) | BIT(14), 2);
+			odm_set_bb_reg(dm, R_0x940, BIT(9) | BIT(8), 0);
+			odm_set_bb_reg(dm, R_0x940, BIT(11) | BIT(10), 1);
+			odm_set_bb_reg(dm, R_0x940, BIT(15) | BIT(14), 2);
 			/* set for 3ss */
-			odm_set_bb_reg(p_dm, 0x940, BIT(21) | BIT(20), 0);
-			odm_set_bb_reg(p_dm, 0x940, BIT(23) | BIT(22), 1);
-			odm_set_bb_reg(p_dm, 0x940, BIT(27) | BIT(26), 2);
+			odm_set_bb_reg(dm, R_0x940, BIT(21) | BIT(20), 0);
+			odm_set_bb_reg(dm, R_0x940, BIT(23) | BIT(22), 1);
+			odm_set_bb_reg(dm, R_0x940, BIT(27) | BIT(26), 2);
 
-		} else 	if (path == BB_PATH_ACD) { /* 3-3 */
-			PHYDM_DBG(p_dm, DBG_PATH_DIV, (" Turn on path (( A C D ))\n"));
+		} else if (path == BB_PATH_ACD) { /* @3-3 */
+			PHYDM_DBG(dm, DBG_PATH_DIV,
+				  " Turn on path (( A C D ))\n");
 			/* set for 1ss */
-			odm_set_bb_reg(p_dm, 0x93c, BIT(25) | BIT(24), 0);
-			odm_set_bb_reg(p_dm, 0x93c, BIT(29) | BIT(28), 1);
-			odm_set_bb_reg(p_dm, 0x93c, BIT(31) | BIT(30), 2);
+			odm_set_bb_reg(dm, R_0x93c, BIT(25) | BIT(24), 0);
+			odm_set_bb_reg(dm, R_0x93c, BIT(29) | BIT(28), 1);
+			odm_set_bb_reg(dm, R_0x93c, BIT(31) | BIT(30), 2);
 			/* set for 2ss */
-			odm_set_bb_reg(p_dm, 0x940, BIT(9) | BIT(8), 0);
-			odm_set_bb_reg(p_dm, 0x940, BIT(13) | BIT(12), 1);
-			odm_set_bb_reg(p_dm, 0x940, BIT(15) | BIT(14), 2);
+			odm_set_bb_reg(dm, R_0x940, BIT(9) | BIT(8), 0);
+			odm_set_bb_reg(dm, R_0x940, BIT(13) | BIT(12), 1);
+			odm_set_bb_reg(dm, R_0x940, BIT(15) | BIT(14), 2);
 			/* set for 3ss */
-			odm_set_bb_reg(p_dm, 0x940, BIT(21) | BIT(20), 0);
-			odm_set_bb_reg(p_dm, 0x940, BIT(25) | BIT(24), 1);
-			odm_set_bb_reg(p_dm, 0x940, BIT(27) | BIT(26), 2);
-		} else 	if (path == BB_PATH_BCD) { /* 3-4 */
-			PHYDM_DBG(p_dm, DBG_PATH_DIV, (" Turn on path (( B C D))\n"));
+			odm_set_bb_reg(dm, R_0x940, BIT(21) | BIT(20), 0);
+			odm_set_bb_reg(dm, R_0x940, BIT(25) | BIT(24), 1);
+			odm_set_bb_reg(dm, R_0x940, BIT(27) | BIT(26), 2);
+		} else if (path == BB_PATH_BCD) { /* @3-4 */
+			PHYDM_DBG(dm, DBG_PATH_DIV,
+				  " Turn on path (( B C D))\n");
 			/* set for 1ss */
-			odm_set_bb_reg(p_dm, 0x93c, BIT(27) | BIT(26), 0);
-			odm_set_bb_reg(p_dm, 0x93c, BIT(29) | BIT(28), 1);
-			odm_set_bb_reg(p_dm, 0x93c, BIT(31) | BIT(30), 2);
+			odm_set_bb_reg(dm, R_0x93c, BIT(27) | BIT(26), 0);
+			odm_set_bb_reg(dm, R_0x93c, BIT(29) | BIT(28), 1);
+			odm_set_bb_reg(dm, R_0x93c, BIT(31) | BIT(30), 2);
 			/* set for 2ss */
-			odm_set_bb_reg(p_dm, 0x940, BIT(11) | BIT(10), 0);
-			odm_set_bb_reg(p_dm, 0x940, BIT(13) | BIT(12), 1);
-			odm_set_bb_reg(p_dm, 0x940, BIT(15) | BIT(14), 2);
+			odm_set_bb_reg(dm, R_0x940, BIT(11) | BIT(10), 0);
+			odm_set_bb_reg(dm, R_0x940, BIT(13) | BIT(12), 1);
+			odm_set_bb_reg(dm, R_0x940, BIT(15) | BIT(14), 2);
 			/* set for 3ss */
-			odm_set_bb_reg(p_dm, 0x940, BIT(23) | BIT(22), 0);
-			odm_set_bb_reg(p_dm, 0x940, BIT(25) | BIT(24), 1);
-			odm_set_bb_reg(p_dm, 0x940, BIT(27) | BIT(26), 2);
+			odm_set_bb_reg(dm, R_0x940, BIT(23) | BIT(22), 0);
+			odm_set_bb_reg(dm, R_0x940, BIT(25) | BIT(24), 1);
+			odm_set_bb_reg(dm, R_0x940, BIT(27) | BIT(26), 2);
 		}
-	} else	if (num_enable_path == 4)
-		PHYDM_DBG(p_dm, DBG_PATH_DIV, (" Turn on path ((A  B C D))\n"));
-
+	} else if (num_enable_path == 4)
+		PHYDM_DBG(dm, DBG_PATH_DIV, " Turn on path ((A  B C D))\n");
 }
 
-void
-phydm_find_default_path(
-	void	*p_dm_void
-)
+void phydm_find_default_path(
+	void *dm_void)
 {
-	struct PHY_DM_STRUCT		*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	struct _ODM_PATH_DIVERSITY_		*p_dm_path_div = &p_dm->dm_path_div;
-	u32	rssi_avg_a = 0, rssi_avg_b = 0, rssi_avg_c = 0, rssi_avg_d = 0, rssi_avg_bcd = 0;
-	u32	rssi_total_a = 0, rssi_total_b = 0, rssi_total_c = 0, rssi_total_d = 0;
-
-	/* 2 Default path Selection By RSSI */
-
-	rssi_avg_a = (p_dm_path_div->path_a_cnt_all > 0) ? (p_dm_path_div->path_a_sum_all / p_dm_path_div->path_a_cnt_all) : 0 ;
-	rssi_avg_b = (p_dm_path_div->path_b_cnt_all > 0) ? (p_dm_path_div->path_b_sum_all / p_dm_path_div->path_b_cnt_all) : 0 ;
-	rssi_avg_c = (p_dm_path_div->path_c_cnt_all > 0) ? (p_dm_path_div->path_c_sum_all / p_dm_path_div->path_c_cnt_all) : 0 ;
-	rssi_avg_d = (p_dm_path_div->path_d_cnt_all > 0) ? (p_dm_path_div->path_d_sum_all / p_dm_path_div->path_d_cnt_all) : 0 ;
-
-
-	p_dm_path_div->path_a_sum_all = 0;
-	p_dm_path_div->path_a_cnt_all = 0;
-	p_dm_path_div->path_b_sum_all = 0;
-	p_dm_path_div->path_b_cnt_all = 0;
-	p_dm_path_div->path_c_sum_all = 0;
-	p_dm_path_div->path_c_cnt_all = 0;
-	p_dm_path_div->path_d_sum_all = 0;
-	p_dm_path_div->path_d_cnt_all = 0;
-
-	if (p_dm_path_div->use_path_a_as_default_ant == 1) {
-		rssi_avg_bcd = (rssi_avg_b + rssi_avg_c + rssi_avg_d) / 3;
-
-		if ((rssi_avg_a + ANT_DECT_RSSI_TH) > rssi_avg_bcd) {
-			p_dm_path_div->is_path_a_exist = true;
-			p_dm_path_div->default_path = PATH_A;
-		} else
-			p_dm_path_div->is_path_a_exist = false;
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct _ODM_PATH_DIVERSITY_ *p_div = &dm->dm_path_div;
+	u32 rssi_a = 0, rssi_b = 0, rssi_c = 0, rssi_d = 0, rssi_bcd = 0;
+	u32 rssi_total_a = 0, rssi_total_b = 0;
+	u32 rssi_total_c = 0, rssi_total_d = 0;
+
+	/* @2 Default path Selection By RSSI */
+
+	rssi_a = (p_div->path_a_cnt_all > 0) ?
+		 (p_div->path_a_sum_all / p_div->path_a_cnt_all) : 0;
+	rssi_b = (p_div->path_b_cnt_all > 0) ?
+		 (p_div->path_b_sum_all / p_div->path_b_cnt_all) : 0;
+	rssi_c = (p_div->path_c_cnt_all > 0) ?
+		 (p_div->path_c_sum_all / p_div->path_c_cnt_all) : 0;
+	rssi_d = (p_div->path_d_cnt_all > 0) ?
+		 (p_div->path_d_sum_all / p_div->path_d_cnt_all) : 0;
+
+	p_div->path_a_sum_all = 0;
+	p_div->path_a_cnt_all = 0;
+	p_div->path_b_sum_all = 0;
+	p_div->path_b_cnt_all = 0;
+	p_div->path_c_sum_all = 0;
+	p_div->path_c_cnt_all = 0;
+	p_div->path_d_sum_all = 0;
+	p_div->path_d_cnt_all = 0;
+
+	if (p_div->use_path_a_as_default_ant == 1) {
+		rssi_bcd = (rssi_b + rssi_c + rssi_d) / 3;
+
+		if ((rssi_a + ANT_DECT_RSSI_TH) > rssi_bcd) {
+			p_div->is_path_a_exist = true;
+			p_div->default_path = PATH_A;
+		} else {
+			p_div->is_path_a_exist = false;
+		}
 	} else {
-		if ((rssi_avg_a >= rssi_avg_b) && (rssi_avg_a >= rssi_avg_c) && (rssi_avg_a >= rssi_avg_d))
-			p_dm_path_div->default_path = PATH_A;
-		else if ((rssi_avg_b >= rssi_avg_c) && (rssi_avg_b >= rssi_avg_d))
-			p_dm_path_div->default_path = PATH_B;
-		else if (rssi_avg_c >= rssi_avg_d)
-			p_dm_path_div->default_path = PATH_C;
+		if (rssi_a >= rssi_b &&
+		    rssi_a >= rssi_c &&
+		    rssi_a >= rssi_d)
+			p_div->default_path = PATH_A;
+		else if ((rssi_b >= rssi_c) && (rssi_b >= rssi_d))
+			p_div->default_path = PATH_B;
+		else if (rssi_c >= rssi_d)
+			p_div->default_path = PATH_C;
 		else
-			p_dm_path_div->default_path = PATH_D;
+			p_div->default_path = PATH_D;
 	}
-
-
 }
 
-
-void
-phydm_candidate_dtp_update(
-	void	*p_dm_void
-)
+void phydm_candidate_dtp_update(
+	void *dm_void)
 {
-	struct PHY_DM_STRUCT		*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	struct _ODM_PATH_DIVERSITY_		*p_dm_path_div = &p_dm->dm_path_div;
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct _ODM_PATH_DIVERSITY_ *p_div = &dm->dm_path_div;
 
-	p_dm_path_div->num_candidate = 3;
+	p_div->num_candidate = 3;
 
-	if (p_dm_path_div->use_path_a_as_default_ant == 1) {
-		if (p_dm_path_div->num_tx_path == 3) {
-			if (p_dm_path_div->is_path_a_exist) {
-				p_dm_path_div->ant_candidate_1 =  BB_PATH_ABC;
-				p_dm_path_div->ant_candidate_2 =  BB_PATH_ABD;
-				p_dm_path_div->ant_candidate_3 =  BB_PATH_ACD;
+	if (p_div->use_path_a_as_default_ant == 1) {
+		if (p_div->num_tx_path == 3) {
+			if (p_div->is_path_a_exist) {
+				p_div->ant_candidate_1 = BB_PATH_ABC;
+				p_div->ant_candidate_2 = BB_PATH_ABD;
+				p_div->ant_candidate_3 = BB_PATH_ACD;
 			} else { /* use path BCD */
-				p_dm_path_div->num_candidate = 1;
-				phydm_dtp_fix_tx_path(p_dm, BB_PATH_BCD);
+				p_div->num_candidate = 1;
+				phydm_dtp_fix_tx_path(dm, BB_PATH_BCD);
 				return;
 			}
-		} else	if (p_dm_path_div->num_tx_path == 2) {
-			if (p_dm_path_div->is_path_a_exist) {
-				p_dm_path_div->ant_candidate_1 =  BB_PATH_AB;
-				p_dm_path_div->ant_candidate_2 =  BB_PATH_AC;
-				p_dm_path_div->ant_candidate_3 =  BB_PATH_AD;
+		} else if (p_div->num_tx_path == 2) {
+			if (p_div->is_path_a_exist) {
+				p_div->ant_candidate_1 = BB_PATH_AB;
+				p_div->ant_candidate_2 = BB_PATH_AC;
+				p_div->ant_candidate_3 = BB_PATH_AD;
 			} else {
-				p_dm_path_div->ant_candidate_1 =  BB_PATH_BC;
-				p_dm_path_div->ant_candidate_2 =  BB_PATH_BD;
-				p_dm_path_div->ant_candidate_3 =  BB_PATH_CD;
+				p_div->ant_candidate_1 = BB_PATH_BC;
+				p_div->ant_candidate_2 = BB_PATH_BD;
+				p_div->ant_candidate_3 = BB_PATH_CD;
 			}
 		}
 	} else {
-		/* 2 3 TX mode */
-		if (p_dm_path_div->num_tx_path == 3) { /* choose 3 ant form 4 */
-			if (p_dm_path_div->default_path == PATH_A) { /* choose 2 ant form 3 */
-				p_dm_path_div->ant_candidate_1 =  BB_PATH_ABC;
-				p_dm_path_div->ant_candidate_2 =  BB_PATH_ABD;
-				p_dm_path_div->ant_candidate_3 =  BB_PATH_ACD;
-			} else if (p_dm_path_div->default_path == PATH_B) {
-				p_dm_path_div->ant_candidate_1 =  BB_PATH_ABC;
-				p_dm_path_div->ant_candidate_2 =  BB_PATH_ABD;
-				p_dm_path_div->ant_candidate_3 =  BB_PATH_BCD;
-			} else if (p_dm_path_div->default_path == PATH_C) {
-				p_dm_path_div->ant_candidate_1 =  BB_PATH_ABC;
-				p_dm_path_div->ant_candidate_2 =  BB_PATH_ACD;
-				p_dm_path_div->ant_candidate_3 =  BB_PATH_BCD;
-			} else if (p_dm_path_div->default_path == PATH_D) {
-				p_dm_path_div->ant_candidate_1 =  BB_PATH_ABD;
-				p_dm_path_div->ant_candidate_2 =  BB_PATH_ACD;
-				p_dm_path_div->ant_candidate_3 =  BB_PATH_BCD;
+		/* @2 3 TX mode */
+		if (p_div->num_tx_path == 3) { /* @choose 3 ant form 4 */
+			if (p_div->default_path == PATH_A) {
+			/* @choose 2 ant form 3 */
+				p_div->ant_candidate_1 = BB_PATH_ABC;
+				p_div->ant_candidate_2 = BB_PATH_ABD;
+				p_div->ant_candidate_3 = BB_PATH_ACD;
+			} else if (p_div->default_path == PATH_B) {
+				p_div->ant_candidate_1 = BB_PATH_ABC;
+				p_div->ant_candidate_2 = BB_PATH_ABD;
+				p_div->ant_candidate_3 = BB_PATH_BCD;
+			} else if (p_div->default_path == PATH_C) {
+				p_div->ant_candidate_1 = BB_PATH_ABC;
+				p_div->ant_candidate_2 = BB_PATH_ACD;
+				p_div->ant_candidate_3 = BB_PATH_BCD;
+			} else if (p_div->default_path == PATH_D) {
+				p_div->ant_candidate_1 = BB_PATH_ABD;
+				p_div->ant_candidate_2 = BB_PATH_ACD;
+				p_div->ant_candidate_3 = BB_PATH_BCD;
 			}
 		}
 
-		/* 2 2 TX mode */
-		else if (p_dm_path_div->num_tx_path == 2) { /* choose 2 ant form 4 */
-			if (p_dm_path_div->default_path == PATH_A) { /* choose 2 ant form 3 */
-				p_dm_path_div->ant_candidate_1 =  BB_PATH_AB;
-				p_dm_path_div->ant_candidate_2 =  BB_PATH_AC;
-				p_dm_path_div->ant_candidate_3 =  BB_PATH_AD;
-			} else if (p_dm_path_div->default_path == PATH_B) {
-				p_dm_path_div->ant_candidate_1 =  BB_PATH_AB;
-				p_dm_path_div->ant_candidate_2 =  BB_PATH_BC;
-				p_dm_path_div->ant_candidate_3 =  BB_PATH_BD;
-			} else if (p_dm_path_div->default_path == PATH_C) {
-				p_dm_path_div->ant_candidate_1 =  BB_PATH_AC;
-				p_dm_path_div->ant_candidate_2 =  BB_PATH_BC;
-				p_dm_path_div->ant_candidate_3 =  BB_PATH_CD;
-			} else if (p_dm_path_div->default_path == PATH_D) {
-				p_dm_path_div->ant_candidate_1 =  BB_PATH_AD;
-				p_dm_path_div->ant_candidate_2 =  BB_PATH_BD;
-				p_dm_path_div->ant_candidate_3 =  BB_PATH_CD;
+		/* @2 2 TX mode */
+		else if (p_div->num_tx_path == 2) { /* @choose 2 ant form 4 */
+			if (p_div->default_path == PATH_A) {
+			/* @choose 2 ant form 3 */
+				p_div->ant_candidate_1 = BB_PATH_AB;
+				p_div->ant_candidate_2 = BB_PATH_AC;
+				p_div->ant_candidate_3 = BB_PATH_AD;
+			} else if (p_div->default_path == PATH_B) {
+				p_div->ant_candidate_1 = BB_PATH_AB;
+				p_div->ant_candidate_2 = BB_PATH_BC;
+				p_div->ant_candidate_3 = BB_PATH_BD;
+			} else if (p_div->default_path == PATH_C) {
+				p_div->ant_candidate_1 = BB_PATH_AC;
+				p_div->ant_candidate_2 = BB_PATH_BC;
+				p_div->ant_candidate_3 = BB_PATH_CD;
+			} else if (p_div->default_path == PATH_D) {
+				p_div->ant_candidate_1 = BB_PATH_AD;
+				p_div->ant_candidate_2 = BB_PATH_BD;
+				p_div->ant_candidate_3 = BB_PATH_CD;
 			}
 		}
 	}
 }
 
-
-void
-phydm_dynamic_tx_path(
-	void	*p_dm_void
-)
+void phydm_dynamic_tx_path(
+	void *dm_void)
 {
-	struct PHY_DM_STRUCT		*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	struct _ODM_PATH_DIVERSITY_		*p_dm_path_div = &p_dm->dm_path_div;
-
-	struct sta_info	*p_entry;
-	u32	i;
-	u8	num_client = 0;
-	u8	h2c_parameter[6] = {0};
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct _ODM_PATH_DIVERSITY_ *p_div = &dm->dm_path_div;
 
+	struct sta_info *entry;
+	u32 i;
+	u8 num_client = 0;
+	u8 h2c_parameter[6] = {0};
 
-	if (!p_dm->is_linked) { /* is_linked==False */
-		PHYDM_DBG(p_dm, DBG_PATH_DIV, ("DTP_8814 [No Link!!!]\n"));
+	if (!dm->is_linked) { /* @is_linked==False */
+		PHYDM_DBG(dm, DBG_PATH_DIV, "DTP_8814 [No Link!!!]\n");
 
-		if (p_dm_path_div->is_become_linked == true) {
-			PHYDM_DBG(p_dm, DBG_PATH_DIV, (" [Be disconnected]----->\n"));
-			p_dm_path_div->is_become_linked = p_dm->is_linked;
+		if (p_div->is_become_linked) {
+			PHYDM_DBG(dm, DBG_PATH_DIV, "[Be disconnected]---->\n");
+			p_div->is_become_linked = dm->is_linked;
 		}
 		return;
 	} else {
-		if (p_dm_path_div->is_become_linked == false) {
-			PHYDM_DBG(p_dm, DBG_PATH_DIV, (" [Be Linked !!!]----->\n"));
-			p_dm_path_div->is_become_linked = p_dm->is_linked;
+		if (!p_div->is_become_linked) {
+			PHYDM_DBG(dm, DBG_PATH_DIV, " [Be Linked !!!]----->\n");
+			p_div->is_become_linked = dm->is_linked;
 		}
 	}
 
-	/* 2 [period CTRL] */
-	if (p_dm_path_div->dtp_period >= 2)
-		p_dm_path_div->dtp_period = 0;
-	else {
-		/* PHYDM_DBG(p_dm,DBG_PATH_DIV, ("Phydm_Dynamic_Tx_Path_8814A()  Stay = (( %d ))\n",p_dm_path_div->dtp_period)); */
-		p_dm_path_div->dtp_period++;
+	/* @2 [period CTRL] */
+	if (p_div->dtp_period >= 2) {
+		p_div->dtp_period = 0;
+	} else {
+		p_div->dtp_period++;
 		return;
 	}
 
-
-	/* 2 [Fix path] */
-	if (p_dm->path_select != PHYDM_AUTO_PATH)
+	/* @2 [Fix path] */
+	if (dm->path_select != PHYDM_AUTO_PATH)
 		return;
 
-	/* 2 [Check Bfer] */
+/* @2 [Check Bfer] */
 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
-#if (BEAMFORMING_SUPPORT == 1)
+#ifdef PHYDM_BEAMFORMING_SUPPORT
 	{
-		enum beamforming_cap		beamform_cap = (p_dm->beamforming_info.beamform_cap);
+		enum beamforming_cap beamform_cap = (dm->beamforming_info.beamform_cap);
 
-		if (beamform_cap & BEAMFORMER_CAP) { /* BFmer On  &&   Div On->Div Off */
-			if (p_dm_path_div->fix_path_bfer == 0) {
-				PHYDM_DBG(p_dm, DBG_PATH_DIV, ("[ PathDiv : OFF ]   BFmer ==1\n"));
-				p_dm_path_div->fix_path_bfer = 1 ;
+		if (beamform_cap & BEAMFORMER_CAP) { /* @BFmer On  &&   Div On->Div Off */
+			if (p_div->fix_path_bfer == 0) {
+				PHYDM_DBG(dm, DBG_PATH_DIV,
+					  "[ PathDiv : OFF ]   BFmer ==1\n");
+				p_div->fix_path_bfer = 1;
 			}
 			return;
-		} else { /* BFmer Off   &&   Div Off->Div On */
-			if (p_dm_path_div->fix_path_bfer == 1) {
-				PHYDM_DBG(p_dm, DBG_PATH_DIV, ("[ PathDiv : ON ]   BFmer ==0\n"));
-				p_dm_path_div->fix_path_bfer = 0;
+		} else { /* @BFmer Off   &&   Div Off->Div On */
+			if (p_div->fix_path_bfer == 1) {
+				PHYDM_DBG(dm, DBG_PATH_DIV,
+					  "[ PathDiv : ON ]   BFmer ==0\n");
+				p_div->fix_path_bfer = 0;
 			}
 		}
 	}
 #endif
 #endif
 
-	if (p_dm_path_div->use_path_a_as_default_ant == 1) {
-		phydm_find_default_path(p_dm);
-		phydm_candidate_dtp_update(p_dm);
+	if (p_div->use_path_a_as_default_ant == 1) {
+		phydm_find_default_path(dm);
+		phydm_candidate_dtp_update(dm);
 	} else {
-		if (p_dm_path_div->phydm_dtp_state == PHYDM_DTP_INIT) {
-			phydm_find_default_path(p_dm);
-			phydm_candidate_dtp_update(p_dm);
-			p_dm_path_div->phydm_dtp_state = PHYDM_DTP_RUNNING_1;
+		if (p_div->phydm_dtp_state == PHYDM_DTP_INIT) {
+			phydm_find_default_path(dm);
+			phydm_candidate_dtp_update(dm);
+			p_div->phydm_dtp_state = PHYDM_DTP_RUNNING_1;
 		}
 
-		else	if (p_dm_path_div->phydm_dtp_state == PHYDM_DTP_RUNNING_1) {
-			p_dm_path_div->dtp_check_patha_counter++;
+		else if (p_div->phydm_dtp_state == PHYDM_DTP_RUNNING_1) {
+			p_div->dtp_check_patha_counter++;
 
-			if (p_dm_path_div->dtp_check_patha_counter >= NUM_RESET_DTP_PERIOD) {
-				p_dm_path_div->dtp_check_patha_counter = 0;
-				p_dm_path_div->phydm_dtp_state = PHYDM_DTP_INIT;
+			if (p_div->dtp_check_patha_counter >=
+			    NUM_RESET_DTP_PERIOD) {
+				p_div->dtp_check_patha_counter = 0;
+				p_div->phydm_dtp_state = PHYDM_DTP_INIT;
 			}
-			/* 2 Search space update */
+#if 0
+			/* @2 Search space update */
 			else {
-				/* 1.  find the worst candidate */
+				/* @1.  find the worst candidate */
 
 
-				/* 2. repalce the worst candidate */
+				/* @2. repalce the worst candidate */
 			}
+#endif
 		}
 	}
 
-	/* 2 Dynamic path Selection H2C */
+	/* @2 Dynamic path Selection H2C */
 
-	if (p_dm_path_div->num_candidate == 1)
+	if (p_div->num_candidate == 1) {
 		return;
-	else {
-		h2c_parameter[0] =  p_dm_path_div->num_candidate;
-		h2c_parameter[1] =  p_dm_path_div->num_tx_path;
-		h2c_parameter[2] =  p_dm_path_div->ant_candidate_1;
-		h2c_parameter[3] =  p_dm_path_div->ant_candidate_2;
-		h2c_parameter[4] =  p_dm_path_div->ant_candidate_3;
-
-		odm_fill_h2c_cmd(p_dm, PHYDM_H2C_DYNAMIC_TX_PATH, 6, h2c_parameter);
-	}
+	} else {
+		h2c_parameter[0] = p_div->num_candidate;
+		h2c_parameter[1] = p_div->num_tx_path;
+		h2c_parameter[2] = p_div->ant_candidate_1;
+		h2c_parameter[3] = p_div->ant_candidate_2;
+		h2c_parameter[4] = p_div->ant_candidate_3;
 
+		odm_fill_h2c_cmd(dm, PHYDM_H2C_DYNAMIC_TX_PATH, 6, h2c_parameter);
+	}
 }
 
-
-
-void
-phydm_dynamic_tx_path_init(
-	void	*p_dm_void
-)
+void phydm_dynamic_tx_path_init(
+	void *dm_void)
 {
-	struct PHY_DM_STRUCT		*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	struct _ODM_PATH_DIVERSITY_		*p_dm_path_div  = &(p_dm->dm_path_div);
-	struct _ADAPTER		*p_adapter = p_dm->adapter;
-	u8			search_space_2[NUM_CHOOSE2_FROM4] = {BB_PATH_AB, BB_PATH_AC, BB_PATH_AD, BB_PATH_BC, BB_PATH_BD, BB_PATH_CD };
-	u8			search_space_3[NUM_CHOOSE3_FROM4] = {BB_PATH_BCD, BB_PATH_ACD,  BB_PATH_ABD, BB_PATH_ABC};
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct _ODM_PATH_DIVERSITY_ *p_div = &dm->dm_path_div;
+	void *adapter = dm->adapter;
+	u8 search_space_2[NUM_CHOOSE2_FROM4] = {BB_PATH_AB, BB_PATH_AC, BB_PATH_AD, BB_PATH_BC, BB_PATH_BD, BB_PATH_CD};
+	u8 search_space_3[NUM_CHOOSE3_FROM4] = {BB_PATH_BCD, BB_PATH_ACD, BB_PATH_ABD, BB_PATH_ABC};
 
 #if ((DM_ODM_SUPPORT_TYPE == ODM_WIN) && USB_SWITCH_SUPPORT)
-	p_dm_path_div->is_u3_mode = (*p_dm->hub_usb_mode == 2) ? 1 : 0;
-	PHYDM_DBG(p_dm, DBG_PATH_DIV, ("[WIN USB] is_u3_mode = (( %d ))\n", p_dm_path_div->is_u3_mode));
+	p_div->is_u3_mode = (*dm->hub_usb_mode == 2) ? 1 : 0;
+	PHYDM_DBG(dm, DBG_PATH_DIV, "[WIN USB] is_u3_mode = (( %d ))\n",
+		  p_div->is_u3_mode);
 #else
-	p_dm_path_div->is_u3_mode = 1;
+	p_div->is_u3_mode = 1;
 #endif
-	PHYDM_DBG(p_dm, DBG_PATH_DIV, ("Dynamic TX path Init 8814\n"));
-
-	memcpy(&(p_dm_path_div->search_space_2[0]), &(search_space_2[0]), NUM_CHOOSE2_FROM4);
-	memcpy(&(p_dm_path_div->search_space_3[0]), &(search_space_3[0]), NUM_CHOOSE3_FROM4);
+	PHYDM_DBG(dm, DBG_PATH_DIV, "Dynamic TX path Init 8814\n");
 
-	p_dm_path_div->use_path_a_as_default_ant = 1;
-	p_dm_path_div->phydm_dtp_state = PHYDM_DTP_INIT;
-	p_dm->path_select = PHYDM_AUTO_PATH;
-	p_dm_path_div->phydm_path_div_type = PHYDM_4R_PATH_DIV;
+	memcpy(&p_div->search_space_2[0], &search_space_2[0],
+	       NUM_CHOOSE2_FROM4);
+	memcpy(&p_div->search_space_3[0], &search_space_3[0],
+	       NUM_CHOOSE3_FROM4);
 
+	p_div->use_path_a_as_default_ant = 1;
+	p_div->phydm_dtp_state = PHYDM_DTP_INIT;
+	dm->path_select = PHYDM_AUTO_PATH;
+	p_div->phydm_path_div_type = PHYDM_4R_PATH_DIV;
 
-	if (p_dm_path_div->is_u3_mode) {
-		p_dm_path_div->num_tx_path = 3;
-		phydm_dtp_fix_tx_path(p_dm, BB_PATH_BCD);/* 3TX  Set Init TX path*/
+	if (p_div->is_u3_mode) {
+		p_div->num_tx_path = 3;
+		phydm_dtp_fix_tx_path(dm, BB_PATH_BCD); /* @3TX  Set Init TX path*/
 
 	} else {
-		p_dm_path_div->num_tx_path = 2;
-		phydm_dtp_fix_tx_path(p_dm, BB_PATH_BC);/* 2TX // Set Init TX path*/
+		p_div->num_tx_path = 2;
+		phydm_dtp_fix_tx_path(dm, BB_PATH_BC); /* @2TX // Set Init TX path*/
 	}
-
 }
 
-
-void
-phydm_process_rssi_for_path_div(
-	void			*p_dm_void,
-	void			*p_phy_info_void,
-	void			*p_pkt_info_void
-)
+void phydm_process_rssi_for_path_div_8814a(void *dm_void, void *phy_info_void,
+					   void *pkt_info_void)
 {
-	struct PHY_DM_STRUCT			*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	struct phydm_phyinfo_struct		*p_phy_info = (struct phydm_phyinfo_struct *)p_phy_info_void;
-	struct phydm_perpkt_info_struct	*p_pktinfo = (struct phydm_perpkt_info_struct *)p_pkt_info_void;
-	struct _ODM_PATH_DIVERSITY_			*p_dm_path_div  = &(p_dm->dm_path_div);
-
-	if (p_pktinfo->is_packet_to_self || p_pktinfo->is_packet_match_bssid) {
-		if (p_pktinfo->data_rate > ODM_RATE11M) {
-			if (p_dm_path_div->phydm_path_div_type == PHYDM_4R_PATH_DIV) {
-#if RTL8814A_SUPPORT
-				if (p_dm->support_ic_type & ODM_RTL8814A) {
-					p_dm_path_div->path_a_sum_all += p_phy_info->rx_mimo_signal_strength[0];
-					p_dm_path_div->path_a_cnt_all++;
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct phydm_phyinfo_struct *phy_info = NULL;
+	struct phydm_perpkt_info_struct *pktinfo = NULL;
+	struct _ODM_PATH_DIVERSITY_ *p_div = &dm->dm_path_div;
 
-					p_dm_path_div->path_b_sum_all += p_phy_info->rx_mimo_signal_strength[1];
-					p_dm_path_div->path_b_cnt_all++;
+	phy_info = (struct phydm_phyinfo_struct *)phy_info_void;
+	pktinfo = (struct phydm_perpkt_info_struct *)pkt_info_void;
 
-					p_dm_path_div->path_c_sum_all += p_phy_info->rx_mimo_signal_strength[2];
-					p_dm_path_div->path_c_cnt_all++;
+	if (!(pktinfo->is_packet_to_self || pktinfo->is_packet_match_bssid))
+		return;
 
-					p_dm_path_div->path_d_sum_all += p_phy_info->rx_mimo_signal_strength[3];
-					p_dm_path_div->path_d_cnt_all++;
-				}
-#endif
-			} else {
-				p_dm_path_div->path_a_sum[p_pktinfo->station_id] += p_phy_info->rx_mimo_signal_strength[0];
-				p_dm_path_div->path_a_cnt[p_pktinfo->station_id]++;
+	if (pktinfo->data_rate <= ODM_RATE11M)
+		return;
 
-				p_dm_path_div->path_b_sum[p_pktinfo->station_id] += p_phy_info->rx_mimo_signal_strength[1];
-				p_dm_path_div->path_b_cnt[p_pktinfo->station_id]++;
-			}
-		}
-	}
+	if (p_div->phydm_path_div_type == PHYDM_4R_PATH_DIV) {
+		p_div->path_a_sum_all += phy_info->rx_mimo_signal_strength[0];
+		p_div->path_a_cnt_all++;
 
+		p_div->path_b_sum_all += phy_info->rx_mimo_signal_strength[1];
+		p_div->path_b_cnt_all++;
 
-}
+		p_div->path_c_sum_all += phy_info->rx_mimo_signal_strength[2];
+		p_div->path_c_cnt_all++;
 
-#endif /* #if RTL8814A_SUPPORT */
+		p_div->path_d_sum_all += phy_info->rx_mimo_signal_strength[3];
+		p_div->path_d_cnt_all++;
+	}
+}
 
-void
-odm_pathdiv_debug(
-	void		*p_dm_void,
-	u32		*const dm_value,
-	u32		*_used,
-	char		*output,
-	u32		*_out_len
-)
+void phydm_pathdiv_debug_8814a(void *dm_void, char input[][16], u32 *_used,
+			       char *output, u32 *_out_len)
 {
-	struct PHY_DM_STRUCT		*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	struct _ODM_PATH_DIVERSITY_			*p_dm_path_div  = &(p_dm->dm_path_div);
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct _ODM_PATH_DIVERSITY_ *p_div = &dm->dm_path_div;
 	u32 used = *_used;
 	u32 out_len = *_out_len;
+	u32 dm_value[10] = {0};
+	u8 i, input_idx = 0;
+
+	for (i = 0; i < 5; i++) {
+		if (input[i + 1]) {
+			PHYDM_SSCANF(input[i + 1], DCMD_HEX, &dm_value[i]);
+			input_idx++;
+		}
+	}
 
-	p_dm->path_select = (dm_value[0] & 0xf);
-	PHYDM_SNPRINTF((output + used, out_len - used, "Path_select = (( 0x%x ))\n", p_dm->path_select));
+	if (input_idx == 0)
+		return;
 
-	/* 2 [Fix path] */
-	if (p_dm->path_select != PHYDM_AUTO_PATH) {
-		PHYDM_SNPRINTF((output + used, out_len - used, "Trun on path  [%s%s%s%s]\n",
-				((p_dm->path_select) & 0x1) ? "A" : "",
-				((p_dm->path_select) & 0x2) ? "B" : "",
-				((p_dm->path_select) & 0x4) ? "C" : "",
-				((p_dm->path_select) & 0x8) ? "D" : ""));
+	dm->path_select = (u8)(dm_value[0] & 0xf);
+	PDM_SNPF(out_len, used, output + used, out_len - used,
+		 "Path_select = (( 0x%x ))\n", dm->path_select);
 
-		phydm_dtp_fix_tx_path(p_dm, p_dm->path_select);
-	} else
-		PHYDM_SNPRINTF((output + used, out_len - used, "%s\n", "Auto path"));
+	/* @2 [Fix path] */
+	if (dm->path_select != PHYDM_AUTO_PATH) {
+		PDM_SNPF(out_len, used, output + used, out_len - used,
+			 "Turn on path  [%s%s%s%s]\n",
+			 ((dm->path_select) & 0x1) ? "A" : "",
+			 ((dm->path_select) & 0x2) ? "B" : "",
+			 ((dm->path_select) & 0x4) ? "C" : "",
+			 ((dm->path_select) & 0x8) ? "D" : "");
+
+		phydm_dtp_fix_tx_path(dm, dm->path_select);
+	} else {
+		PDM_SNPF(out_len, used, output + used, out_len - used, "%s\n",
+			 "Auto path");
+	}
 
 	*_used = used;
 	*_out_len = out_len;
 }
 
-#endif /*  #if(defined(CONFIG_PATH_DIVERSITY)) */
+#endif /* @#if RTL8814A_SUPPORT */
 
-void
-phydm_c2h_dtp_handler(
-	void	*p_dm_void,
-	u8   *cmd_buf,
-	u8	cmd_len
-)
+#if RTL8812A_SUPPORT
+void phydm_update_tx_path_8812a(void *dm_void, enum bb_path path)
 {
-#if (defined(CONFIG_PATH_DIVERSITY))
-	struct PHY_DM_STRUCT		*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	struct _ODM_PATH_DIVERSITY_		*p_dm_path_div  = &(p_dm->dm_path_div);
-
-	u8  macid = cmd_buf[0];
-	u8  target = cmd_buf[1];
-	u8  nsc_1 = cmd_buf[2];
-	u8  nsc_2 = cmd_buf[3];
-	u8  nsc_3 = cmd_buf[4];
-
-	PHYDM_DBG(p_dm, DBG_PATH_DIV, ("Target_candidate = (( %d ))\n", target));
-	/*
-	if( (nsc_1 >= nsc_2) &&  (nsc_1 >= nsc_3))
-	{
-		phydm_dtp_fix_tx_path(p_dm, p_dm_path_div->ant_candidate_1);
-	}
-	else	if( nsc_2 >= nsc_3)
-	{
-		phydm_dtp_fix_tx_path(p_dm, p_dm_path_div->ant_candidate_2);
-	}
-	else
-	{
-		phydm_dtp_fix_tx_path(p_dm, p_dm_path_div->ant_candidate_3);
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct _ODM_PATH_DIVERSITY_ *p_div = &dm->dm_path_div;
+
+	if (p_div->default_tx_path != path) {
+		PHYDM_DBG(dm, DBG_PATH_DIV, "Need to Update Tx path\n");
+
+		if (path == BB_PATH_A) {
+			/*Tx by Reg*/
+			odm_set_bb_reg(dm, R_0x80c, 0xFFF0, 0x111);
+			/*Resp Tx by Txinfo*/
+			odm_set_bb_reg(dm, R_0x6d8, 0xc0, 1);
+		} else {
+			/*Tx by Reg*/
+			odm_set_bb_reg(dm, R_0x80c, 0xFFF0, 0x222);
+			 /*Resp Tx by Txinfo*/
+			odm_set_bb_reg(dm, R_0x6d8, 0xc0, 2);
+		}
 	}
-	*/
+	p_div->default_tx_path = path;
+
+	PHYDM_DBG(dm, DBG_PATH_DIV, "path=%s\n",
+		  (path == BB_PATH_A) ? "A" : "B");
+}
+
+void phydm_path_diversity_init_8812a(void *dm_void)
+{
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct _ODM_PATH_DIVERSITY_ *p_div = &dm->dm_path_div;
+	u32 i;
+
+	odm_set_bb_reg(dm, R_0x80c, BIT(29), 1); /* Tx path from Reg */
+	odm_set_bb_reg(dm, R_0x80c, 0xFFF0, 0x111); /* Tx by Reg */
+	odm_set_bb_reg(dm, R_0x6d8, BIT(7) | BIT6, 1); /* Resp Tx by Txinfo */
+	phydm_set_tx_path_by_bb_reg(dm, RF_PATH_A);
+
+	for (i = 0; i < ODM_ASSOCIATE_ENTRY_NUM; i++)
+		p_div->path_sel[i] = 1; /* TxInfo default at path-A */
+}
 #endif
+
+#ifdef PHYDM_IC_JGR3_SERIES_SUPPORT
+void phydm_tx_path_diversity_init_jgr3(void *dm_void)
+{
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct _ODM_PATH_DIVERSITY_ *p_div = &dm->dm_path_div;
+	u32 i;
+
+	for (i = 0; i < ODM_ASSOCIATE_ENTRY_NUM; i++)
+		p_div->path_sel[i] = BB_PATH_A; /* TxInfo default at path-A */
 }
 
-void
-odm_path_diversity(
-	void	*p_dm_void
-)
+void phydm_tx_by_mac_or_reg_jgr3(void *dm_void, enum phydm_path_ctrl ctrl)
 {
-#if (defined(CONFIG_PATH_DIVERSITY))
-	struct PHY_DM_STRUCT		*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
 
-	if (!(p_dm->support_ability & ODM_BB_PATH_DIV)) {
-		PHYDM_DBG(p_dm, DBG_PATH_DIV, ("Return: Not Support PathDiv\n"));
-		return;
+	if (ctrl == TX_PATH_BY_REG) {
+		odm_set_bb_reg(dm, R_0x1e24, BIT(16), 0);
+	} else {
+		odm_set_bb_reg(dm, R_0x1e24, BIT(16), 1);
 	}
+}
 
-#if RTL8812A_SUPPORT
+void phydm_set_resp_tx_path_by_fw(void *dm_void, u8 macid, enum bb_path path,
+				  boolean enable)
+{
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct _ODM_PATH_DIVERSITY_ *p_div = &dm->dm_path_div;
+	u8 h2c_para[6] = {0};
+	u8 path_map[4];
+	u8 num_enable_path = 0;
+	u8 n_tx_path_ctrl_map = 0;
+	u8 i = 0, n_sts = 0;
 
-	if (p_dm->support_ic_type & ODM_RTL8812)
-		odm_path_diversity_8812a(p_dm);
-	else
-#endif
+	/*Response TX is controlled in FW ctrl info*/
 
-#if RTL8814A_SUPPORT
-		if (p_dm->support_ic_type & ODM_RTL8814A)
-			phydm_dynamic_tx_path(p_dm);
-		else
-#endif
-		{}
+	PHYDM_DBG(dm, DBG_PATH_DIV, "[%s] =====>\n", __func__);
+
+	if (enable) {
+		n_tx_path_ctrl_map = path;
+
+		for (i = 0; i < 4; i++) {
+			path_map[i] = 0;
+			if (path & BIT(i))
+				num_enable_path++;
+		}
+
+		for (i = 0; i < 4; i++) {
+			if (path & BIT(i)) {
+				path_map[i] = n_sts;
+				n_sts++;
+
+				if (n_sts == num_enable_path)
+					break;
+			}
+		}
+	}
+
+	PHYDM_DBG(dm, DBG_PATH_DIV, "ctrl_map=0x%x Map[D:A]={%d, %d, %d, %d}\n",
+		  n_tx_path_ctrl_map,
+		  path_map[3], path_map[2], path_map[1], path_map[0]);
+
+	h2c_para[0] = macid;
+	h2c_para[1] = n_tx_path_ctrl_map;
+	h2c_para[2] = (path_map[3] << 6) | (path_map[2] << 4) |
+		      (path_map[1] << 2) | path_map[0];
+
+	odm_fill_h2c_cmd(dm, PHYDM_H2C_DYNAMIC_TX_PATH, 6, h2c_para);
+}
 #endif
+
+void phydm_set_tx_path_by_bb_reg(void *dm_void, enum bb_path path)
+{
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct _ODM_PATH_DIVERSITY_ *p_div = &dm->dm_path_div;
+
+	PHYDM_DBG(dm, DBG_PATH_DIV, "[%s] path=%s\n",
+		  __func__, (path == BB_PATH_A) ? "A" : "B");
+
+	switch (dm->support_ic_type) {
+	#if RTL8822C_SUPPORT
+	case ODM_RTL8822C:
+		phydm_config_tx_path_8822c(dm, path);
+		break;
+	#endif
+
+	#if RTL8812A_SUPPORT
+	case ODM_RTL8812:
+		phydm_update_tx_path_8812a(dm, path);
+		break;
+	#endif
+	default:
+		break;
+	}
 }
 
-void
-phydm_path_diversity_init(
-	void	*p_dm_void
-)
+u8 phydm_get_tx_path_txdesc(void *dm_void, u8 macid)
 {
-#if (defined(CONFIG_PATH_DIVERSITY))
-	struct PHY_DM_STRUCT		*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct _ODM_PATH_DIVERSITY_ *p_div = &dm->dm_path_div;
+	u8 rpt_val = 0;
 
-	/*p_dm->support_ability |= ODM_BB_PATH_DIV;*/
+	if (p_div->path_sel[macid] == BB_PATH_A)
+		rpt_val = 1;
+	else if (p_div->path_sel[macid] == BB_PATH_B)
+		rpt_val = 2;
 
-	if (*(p_dm->p_mp_mode) == true)
-		return;
+	return rpt_val;
+}
 
-	if (!(p_dm->support_ability & ODM_BB_PATH_DIV)) {
-		PHYDM_DBG(p_dm, DBG_PATH_DIV, ("Return: Not Support PathDiv\n"));
-		return;
+void phydm_tx_path_diversity_2ss(void *dm_void)
+{
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct _ODM_PATH_DIVERSITY_ *p_div = &dm->dm_path_div;
+	struct cmn_sta_info *sta;
+	enum bb_path default_path = BB_PATH_A, path = BB_PATH_A;
+	u32 rssi_a = 0, rssi_b = 0;
+	u32 local_max_rssi, min_rssi = 0xff;
+	u8 i = 0;
+
+	PHYDM_DBG(dm, DBG_PATH_DIV, "[%s] =======>\n", __func__);
+
+	#ifdef PHYDM_IC_JGR3_SERIES_SUPPORT
+	if (dm->support_ic_type & ODM_IC_JGR3_SERIES) {
+		if (dm->is_one_entry_only)
+			phydm_tx_by_mac_or_reg_jgr3(dm, TX_PATH_BY_REG);
+		else
+			phydm_tx_by_mac_or_reg_jgr3(dm, TX_PATH_BY_DESC);
 	}
+	#endif
 
-#if RTL8812A_SUPPORT
-	if (p_dm->support_ic_type & ODM_RTL8812)
-		odm_path_diversity_init_8812a(p_dm);
-	else
-#endif
+	for (i = 0; i < ODM_ASSOCIATE_ENTRY_NUM; i++) {
+		sta = dm->phydm_sta_info[i];
+		if (is_sta_active(sta))
+			continue;
 
-#if RTL8814A_SUPPORT
-		if (p_dm->support_ic_type & ODM_RTL8814A)
-			phydm_dynamic_tx_path_init(p_dm);
+		/* 2 Caculate RSSI per path */
+		rssi_a = (p_div->path_a_cnt[i]) ?
+			 (p_div->path_a_sum[i] / p_div->path_a_cnt[i]) : 0;
+		rssi_b = (p_div->path_b_cnt[i]) ?
+			 (p_div->path_b_sum[i] / p_div->path_b_cnt[i]) : 0;
+
+		if (rssi_a == rssi_b)
+			path =  p_div->default_tx_path;
 		else
-#endif
-		{}
-#endif
-}
+			path = (rssi_a > rssi_b) ? BB_PATH_A : BB_PATH_B;
+
+		local_max_rssi = (rssi_a > rssi_b) ? rssi_a : rssi_b;
+
+		PHYDM_DBG(dm, DBG_PATH_DIV,
+			  "[%d]PathA sum=%d, cnt=%d, avg_rssi=%d\n",
+			  i, p_div->path_a_sum[i],
+			  p_div->path_a_cnt[i], rssi_a);
+		PHYDM_DBG(dm, DBG_PATH_DIV,
+			  "[%d]PathB sum=%d, cnt=%d, avg_rssi=%d\n",
+			  i, p_div->path_b_sum[i],
+			  p_div->path_b_cnt[i], rssi_b);
+
+		/*Select default Tx path */
+		if (local_max_rssi < min_rssi) {
+			min_rssi = local_max_rssi;
+			default_path = path;
+		}
 
+		if (p_div->path_sel[i] != path) {
+			p_div->path_sel[i] = path;
+			#ifdef PHYDM_IC_JGR3_SERIES_SUPPORT
+			if (dm->support_ic_type & ODM_IC_JGR3_SERIES)
+				phydm_set_resp_tx_path_by_fw(dm, i, path, true);
+			#endif
+		}
 
+		p_div->path_a_cnt[i] = 0;
+		p_div->path_a_sum[i] = 0;
+		p_div->path_b_cnt[i] = 0;
+		p_div->path_b_sum[i] = 0;
+	}
 
-#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
-/*
- * 2011/12/02 MH Copy from MP oursrc for temporarily test.
- *   */
-
-void
-odm_path_div_chk_ant_switch_callback(
-	struct timer_list		*p_timer
-)
-{
+	/* 2 Update default Tx path */
+	if (default_path != p_div->default_tx_path)
+		phydm_set_tx_path_by_bb_reg(dm, default_path);
 }
 
-void
-odm_path_div_chk_ant_switch_workitem_callback(
-	void            *p_context
-)
+void phydm_tx_path_diversity(void *dm_void)
 {
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+
+	if (!(dm->support_ability & ODM_BB_PATH_DIV))
+		return;
+
+	switch (dm->support_ic_type) {
+	#if (RTL8822C_SUPPORT || RTL8812A_SUPPORT)
+	case ODM_RTL8812:
+	case ODM_RTL8822C:
+		phydm_tx_path_diversity_2ss(dm);
+		break;
+	#endif
+
+	#if RTL8814A_SUPPORT
+	case ODM_RTL8814A:
+		phydm_dynamic_tx_path(dm);
+		break;
+	#endif
+	}
 }
 
-void
-odm_cck_tx_path_diversity_callback(
-	struct timer_list		*p_timer
-)
+void phydm_tx_path_diversity_init(void *dm_void)
 {
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+
+	if (!(dm->support_ability & ODM_BB_PATH_DIV))
+		return;
+
+	switch (dm->support_ic_type) {
+	#if RTL8822C_SUPPORT
+	case ODM_RTL8822C:
+	phydm_tx_path_diversity_init_jgr3(dm);
+	break;
+	#endif
+
+	#if RTL8812A_SUPPORT
+	case ODM_RTL8812:
+	phydm_path_diversity_init_8812a(dm);
+	break;
+	#endif
+
+	#if RTL8814A_SUPPORT
+	case ODM_RTL8814A:
+	phydm_dynamic_tx_path_init(dm);
+	break;
+	#endif
+	}
 }
 
-void
-odm_cck_tx_path_diversity_work_item_callback(
-	void            *p_context
-)
+void phydm_process_rssi_for_path_div(void *dm_void, void *phy_info_void,
+				     void *pkt_info_void)
 {
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct phydm_phyinfo_struct *phy_info = NULL;
+	struct phydm_perpkt_info_struct *pktinfo = NULL;
+	struct _ODM_PATH_DIVERSITY_ *p_div = &dm->dm_path_div;
+	u8 id = 0;
+
+	phy_info = (struct phydm_phyinfo_struct *)phy_info_void;
+	pktinfo = (struct phydm_perpkt_info_struct *)pkt_info_void;
+
+	if (!(pktinfo->is_packet_to_self || pktinfo->is_packet_match_bssid))
+		return;
+
+	if (pktinfo->data_rate <= ODM_RATE11M)
+		return;
+
+	id = pktinfo->station_id;
+	p_div->path_a_sum[id] += phy_info->rx_mimo_signal_strength[0];
+	p_div->path_a_cnt[id]++;
+
+	p_div->path_b_sum[id] += phy_info->rx_mimo_signal_strength[1];
+	p_div->path_b_cnt[id]++;
 }
-u8
-odm_sw_ant_div_select_scan_chnl(
-	struct _ADAPTER	*adapter
-)
+
+void phydm_pathdiv_debug(void *dm_void, char input[][16], u32 *_used,
+			 char *output, u32 *_out_len)
 {
-	return	0;
+#ifdef PHYDM_IC_JGR3_SERIES_SUPPORT
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct _ODM_PATH_DIVERSITY_ *p_div = &dm->dm_path_div;
+	u32 used = *_used;
+	u32 out_len = *_out_len;
+	u32 val[10] = {0};
+	u8 i, input_idx = 0;
+
+	if (input_idx == 0)
+		return;
+
+	PHYDM_SSCANF(input[1], DCMD_HEX, &val[0]);
+	PHYDM_SSCANF(input[2], DCMD_HEX, &val[1]);
+
+	if ((strcmp(input[1], "-h") == 0)) {
+		PDM_SNPF(out_len, used, output + used, out_len - used,
+			 "{1:TX Ctrl Sig} {0:BB, 1:MAC}\n");
+		PDM_SNPF(out_len, used, output + used, out_len - used,
+			 "{2:BB Default TX REG} {path}\n");
+		PDM_SNPF(out_len, used, output + used, out_len - used,
+			 "{3:MAC DESC TX} {path} {macid}\n");
+		PDM_SNPF(out_len, used, output + used, out_len - used,
+			 "{4:MAC Resp TX} {path} {macid}\n");
+	} else if (val[0] == 1) {
+		phydm_tx_by_mac_or_reg_jgr3(dm, (enum phydm_path_ctrl)val[1]);
+	} else if (val[0] == 2) {
+		phydm_set_tx_path_by_bb_reg(dm, (enum bb_path)val[1]);
+	} else if (val[0] == 3) {
+		p_div->path_sel[val[2]] = (enum bb_path)val[1];
+	} else if (val[0] == 4) {
+		phydm_set_resp_tx_path_by_fw(dm, (u8)val[2],
+					     (enum bb_path)val[1], true);
+	}
+
+	*_used = used;
+	*_out_len = out_len;
+#endif
 }
-void
-odm_sw_ant_div_construct_scan_chnl(
-	struct _ADAPTER	*adapter,
-	u8		scan_chnl
-)
+
+void phydm_c2h_dtp_handler(void *dm_void, u8 *cmd_buf, u8 cmd_len)
 {
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct _ODM_PATH_DIVERSITY_ *p_div = &dm->dm_path_div;
+
+	u8 macid = cmd_buf[0];
+	u8 target = cmd_buf[1];
+	u8 nsc_1 = cmd_buf[2];
+	u8 nsc_2 = cmd_buf[3];
+	u8 nsc_3 = cmd_buf[4];
+
+	PHYDM_DBG(dm, DBG_PATH_DIV, "Target_candidate = (( %d ))\n", target);
+/*@
+	if( (nsc_1 >= nsc_2) &&  (nsc_1 >= nsc_3))
+	{
+		phydm_dtp_fix_tx_path(dm, p_div->ant_candidate_1);
+	}
+	else	if( nsc_2 >= nsc_3)
+	{
+		phydm_dtp_fix_tx_path(dm, p_div->ant_candidate_2);
+	}
+	else
+	{
+		phydm_dtp_fix_tx_path(dm, p_div->ant_candidate_3);
+	}
+	*/
 }
 
-#endif	/*  #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) */
+#endif /*  @#ifdef CONFIG_PATH_DIVERSITY */
diff --git a/rtl8723DS/hal/phydm/phydm_pathdiv.h b/rtl8723DS/hal/phydm/phydm_pathdiv.h
index 0db7299..132e9cd 100755..100644
--- a/rtl8723DS/hal/phydm/phydm_pathdiv.h
+++ b/rtl8723DS/hal/phydm/phydm_pathdiv.h
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2007 - 2017 Realtek Corporation.
+ * Copyright(c) 2007 - 2017  Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -8,29 +8,39 @@
  *
  * This program is distributed in the hope that it will be useful, but WITHOUT
  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  * more details.
  *
+ * The full GNU General Public License is included in this distribution in the
+ * file called LICENSE.
+ *
+ * Contact Information:
+ * wlanfae <wlanfae@realtek.com>
+ * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
+ * Hsinchu 300, Taiwan.
+ *
+ * Larry Finger <Larry.Finger@lwfinger.net>
+ *
  *****************************************************************************/
 
-#ifndef	__PHYDMPATHDIV_H__
-#define    __PHYDMPATHDIV_H__
-/*#define PATHDIV_VERSION "2.0" //2014.11.04*/
-#define PATHDIV_VERSION	"3.1" /*2015.07.29 by YuChen*/
+#ifndef __PHYDMPATHDIV_H__
+#define __PHYDMPATHDIV_H__
 
-#if (defined(CONFIG_PATH_DIVERSITY))
-#define USE_PATH_A_AS_DEFAULT_ANT   /* for 8814 dynamic TX path selection */
+#ifdef CONFIG_PATH_DIVERSITY
+#define PATHDIV_VERSION "4.0"
 
-#define	NUM_RESET_DTP_PERIOD 5
-#define	ANT_DECT_RSSI_TH 3
+#define USE_PATH_A_AS_DEFAULT_ANT /* @for 8814 dynamic TX path selection */
+
+#define NUM_RESET_DTP_PERIOD 5
+#define ANT_DECT_RSSI_TH 3
 
 #define PATH_A 1
 #define PATH_B 2
 #define PATH_C 3
 #define PATH_D 4
 
-#define PHYDM_AUTO_PATH	0
-#define PHYDM_FIX_PATH		1
+#define PHYDM_AUTO_PATH 0
+#define PHYDM_FIX_PATH 1
 
 #define NUM_CHOOSE2_FROM4 6
 #define NUM_CHOOSE3_FROM4 4
@@ -38,7 +48,6 @@
 enum phydm_dtp_state {
 	PHYDM_DTP_INIT = 1,
 	PHYDM_DTP_RUNNING_1
-
 };
 
 enum phydm_path_div_type {
@@ -46,16 +55,14 @@ enum phydm_path_div_type {
 	PHYDM_4R_PATH_DIV = 2
 };
 
-void
-phydm_process_rssi_for_path_div(
-	void			*p_dm_void,
-	void			*p_phy_info_void,
-	void			*p_pkt_info_void
-);
+enum phydm_path_ctrl {
+	TX_PATH_BY_REG = 0,
+	TX_PATH_BY_DESC = 1
+};
 
 struct _ODM_PATH_DIVERSITY_ {
-	u8	resp_tx_path;
-	u8	path_sel[ODM_ASSOCIATE_ENTRY_NUM];
+	enum bb_path default_tx_path;
+	enum bb_path path_sel[ODM_ASSOCIATE_ENTRY_NUM];
 	u32	path_a_sum[ODM_ASSOCIATE_ENTRY_NUM];
 	u32	path_b_sum[ODM_ASSOCIATE_ENTRY_NUM];
 	u16	path_a_cnt[ODM_ASSOCIATE_ENTRY_NUM];
@@ -90,205 +97,27 @@ struct _ODM_PATH_DIVERSITY_ {
 
 	u8	pre_tx_path;
 	u8	use_path_a_as_default_ant;
-	boolean is_path_a_exist;
+	boolean	is_path_a_exist;
 
 #endif
 };
 
+void phydm_set_tx_path_by_bb_reg(void *dm_void, u8 path);
 
-#endif /* #if(defined(CONFIG_PATH_DIVERSITY)) */
-
-void
-phydm_c2h_dtp_handler(
-	void	*p_dm_void,
-	u8   *cmd_buf,
-	u8	cmd_len
-);
-
-void
-phydm_path_diversity_init(
-	void	*p_dm_void
-);
-
-void
-odm_path_diversity(
-	void	*p_dm_void
-);
-
-void
-odm_pathdiv_debug(
-	void		*p_dm_void,
-	u32		*const dm_value,
-	u32		*_used,
-	char		*output,
-	u32		*_out_len
-);
-
-
-
-/* 1 [OLD IC]-------------------------------------------------------------------------------- */
-
-
-
-
-
-
-#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN))
-
-/* #define   PATHDIV_ENABLE	 1 */
-#define dm_path_div_rssi_check	odm_path_div_chk_per_pkt_rssi
-#define path_div_check_before_link8192c	odm_path_diversity_before_link92c
-
-
-
-
-struct _path_div_parameter_define_ {
-	u32 org_5g_rege30;
-	u32 org_5g_regc14;
-	u32 org_5g_regca0;
-	u32 swt_5g_rege30;
-	u32 swt_5g_regc14;
-	u32 swt_5g_regca0;
-	/* for 2G IQK information */
-	u32 org_2g_regc80;
-	u32 org_2g_regc4c;
-	u32 org_2g_regc94;
-	u32 org_2g_regc14;
-	u32 org_2g_regca0;
-
-	u32 swt_2g_regc80;
-	u32 swt_2g_regc4c;
-	u32 swt_2g_regc94;
-	u32 swt_2g_regc14;
-	u32 swt_2g_regca0;
-};
-
-void
-odm_path_diversity_init_92c(
-	struct _ADAPTER	*adapter
-);
-
-void
-odm_2t_path_diversity_init_92c(
-	struct _ADAPTER	*adapter
-);
-
-void
-odm_1t_path_diversity_init_92c(
-	struct _ADAPTER	*adapter
-);
-
-boolean
-odm_is_connected_92c(
-	struct _ADAPTER	*adapter
-);
-
-boolean
-odm_path_diversity_before_link92c(
-	/* struct _ADAPTER*	adapter */
-	struct PHY_DM_STRUCT		*p_dm
-);
-
-void
-odm_path_diversity_after_link_92c(
-	struct _ADAPTER	*adapter
-);
-
-void
-odm_set_resp_path_92c(
-	struct _ADAPTER	*adapter,
-	u8	default_resp_path
-);
-
-void
-odm_ofdm_tx_path_diversity_92c(
-	struct _ADAPTER	*adapter
-);
-
-void
-odm_cck_tx_path_diversity_92c(
-	struct _ADAPTER	*adapter
-);
-
-void
-odm_reset_path_diversity_92c(
-	struct _ADAPTER	*adapter
-);
-
-void
-odm_cck_tx_path_diversity_callback(
-	struct timer_list		*p_timer
-);
-
-void
-odm_cck_tx_path_diversity_work_item_callback(
-	void            *p_context
-);
-
-void
-odm_path_div_chk_ant_switch_callback(
-	struct timer_list		*p_timer
-);
-
-void
-odm_path_div_chk_ant_switch_workitem_callback(
-	void            *p_context
-);
-
-
-void
-odm_path_div_chk_ant_switch(
-	struct PHY_DM_STRUCT    *p_dm
-);
-
-void
-odm_cck_path_diversity_chk_per_pkt_rssi(
-	struct _ADAPTER		*adapter,
-	boolean			is_def_port,
-	boolean			is_match_bssid,
-	struct _WLAN_STA	*p_entry,
-	PRT_RFD			p_rfd,
-	u8			*p_desc
-);
-
-void
-odm_path_div_chk_per_pkt_rssi(
-	struct _ADAPTER		*adapter,
-	boolean			is_def_port,
-	boolean			is_match_bssid,
-	struct _WLAN_STA	*p_entry,
-	PRT_RFD			p_rfd
-);
-
-void
-odm_path_div_rest_after_link(
-	struct PHY_DM_STRUCT		*p_dm
-);
+u8 phydm_get_tx_path_txdesc(void *dm_void, u8 macid);
 
-void
-odm_fill_tx_path_in_txdesc(
-	struct _ADAPTER	*adapter,
-	PRT_TCB		p_tcb,
-	u8		*p_desc
-);
+void phydm_c2h_dtp_handler(void *dm_void, u8 *cmd_buf, u8 cmd_len);
 
-void
-odm_path_div_init_92d(
-	struct PHY_DM_STRUCT	*p_dm
-);
+void phydm_tx_path_diversity_init(void *dm_void);
 
-u8
-odm_sw_ant_div_select_scan_chnl(
-	struct _ADAPTER	*adapter
-);
+void phydm_tx_path_diversity(void *dm_void);
 
-void
-odm_sw_ant_div_construct_scan_chnl(
-	struct _ADAPTER	*adapter,
-	u8		scan_chnl
-);
+void phydm_process_rssi_for_path_div(void *dm_void, void *phy_info_void,
+				     void *pkt_info_void);
 
-#endif       /* #if(DM_ODM_SUPPORT_TYPE & (ODM_WIN)) */
+void phydm_pathdiv_debug(void *dm_void, char input[][16], u32 *_used,
+			 char *output, u32 *_out_len);
 
+#endif /* @#ifdef CONFIG_PATH_DIVERSITY */
+#endif /* @#ifndef  __PHYDMPATHDIV_H__ */
 
-#endif		 /* #ifndef  __ODMPATHDIV_H__ */
diff --git a/rtl8723DS/hal/phydm/phydm_phystatus.c b/rtl8723DS/hal/phydm/phydm_phystatus.c
index 02f9be7..856354c 100755..100644
--- a/rtl8723DS/hal/phydm/phydm_phystatus.c
+++ b/rtl8723DS/hal/phydm/phydm_phystatus.c
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2007 - 2017 Realtek Corporation.
+ * Copyright(c) 2007 - 2017  Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -8,229 +8,380 @@
  *
  * This program is distributed in the hope that it will be useful, but WITHOUT
  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  * more details.
  *
+ * The full GNU General Public License is included in this distribution in the
+ * file called LICENSE.
+ *
+ * Contact Information:
+ * wlanfae <wlanfae@realtek.com>
+ * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
+ * Hsinchu 300, Taiwan.
+ *
+ * Larry Finger <Larry.Finger@lwfinger.net>
+ *
  *****************************************************************************/
 
-/* ************************************************************
+/*@************************************************************
  * include files
- * ************************************************************ */
+ ************************************************************/
 
 #include "mp_precomp.h"
 #include "phydm_precomp.h"
 
-void
-phydm_rx_statistic_cal(
-	struct PHY_DM_STRUCT				*p_phydm,
-	u8									*p_phy_status,
-	struct phydm_perpkt_info_struct				*p_pktinfo
-)
+#ifdef PHYDM_COMPILE_MU
+u8 phydm_get_gid(struct dm_struct *dm, u8 *phy_status_inf)
 {
-#if (ODM_PHY_STATUS_NEW_TYPE_SUPPORT == 1)
-	struct _phy_status_rpt_jaguar2_type1	*p_phy_sta_rpt = (struct _phy_status_rpt_jaguar2_type1 *)p_phy_status;
+#if (ODM_PHY_STATUS_NEW_TYPE_SUPPORT)
+	struct phy_sts_rpt_jgr2_type1 *rpt_jgr2 = NULL;
 #endif
-	u8									date_rate = (p_pktinfo->data_rate & 0x7f);
-
-	if (date_rate <= ODM_RATE54M) {
+#ifdef PHYSTS_3RD_TYPE_SUPPORT
+	struct phy_sts_rpt_jgr3_type1 *rpt_jgr3 = NULL;
+#endif
+	u8 gid = 0;
 
-		p_phydm->phy_dbg_info.num_qry_legacy_pkt[date_rate]++;
-		/**/
-	} else if (date_rate <= ODM_RATEMCS31) {
+	if (dm->ic_phy_sts_type == PHYDM_PHYSTS_TYPE_1)
+		return 0;
 
-		p_phydm->phy_dbg_info.num_qry_ht_pkt[date_rate - ODM_RATEMCS0]++;
-		p_phydm->phy_dbg_info.ht_pkt_not_zero = true;
+	if ((*phy_status_inf & 0xf) != 1)
+		return 0;
 
+	switch (dm->ic_phy_sts_type) {
+	#if (ODM_PHY_STATUS_NEW_TYPE_SUPPORT)
+	case PHYDM_PHYSTS_TYPE_2:
+		rpt_jgr2 = (struct phy_sts_rpt_jgr2_type1 *)phy_status_inf;
+		gid = rpt_jgr2->gid;
+		break;
+	#endif
+	#ifdef PHYSTS_3RD_TYPE_SUPPORT
+	case PHYDM_PHYSTS_TYPE_3:
+		rpt_jgr3 = (struct phy_sts_rpt_jgr3_type1 *)phy_status_inf;
+		gid = rpt_jgr3->gid;
+		break;
+	#endif
+	default:
+		break;
 	}
-	#if ODM_IC_11AC_SERIES_SUPPORT
-	else if (date_rate <= ODM_RATEVHTSS4MCS9) {
 
-		#if (ODM_PHY_STATUS_NEW_TYPE_SUPPORT == 1)
-		if ((p_phy_sta_rpt->gid != 0) && (p_phy_sta_rpt->gid != 63) && (p_phydm->support_ic_type & ODM_IC_PHY_STATUE_NEW_TYPE)) {
+	return gid;
+}
+#endif
+
+void phydm_rx_statistic_cal(struct dm_struct *dm,
+			    struct phydm_phyinfo_struct *phy_info,
+			    u8 *phy_status_inf,
+			    struct phydm_perpkt_info_struct *pktinfo)
+{
+	struct odm_phy_dbg_info *dbg_i = &dm->phy_dbg_info;
+	u8 rate = (pktinfo->data_rate & 0x7f);
+	u8 bw_idx = phy_info->band_width;
+	u8 offset = 0;
+	u8 gid = 0;
+#if (ODM_PHY_STATUS_NEW_TYPE_SUPPORT || defined(PHYSTS_3RD_TYPE_SUPPORT))
+	u8 val = 0;
+#endif
+	#ifdef PHYDM_COMPILE_MU
+	u8 is_mu_pkt = 0;
+	#endif
+
+	if (rate <= ODM_RATE54M) {
+		dbg_i->num_qry_legacy_pkt[rate]++;
+	} else if (rate <= ODM_RATEMCS31) {
+		dbg_i->ht_pkt_not_zero = true;
+		offset = rate - ODM_RATEMCS0;
+
+		if (offset > (HT_RATE_NUM - 1))
+			offset = HT_RATE_NUM - 1;
 
-			p_phydm->phy_dbg_info.num_qry_mu_vht_pkt[date_rate - ODM_RATEVHTSS1MCS0]++;
-			if (p_pktinfo->ppdu_cnt < 4) {
-				p_phydm->phy_dbg_info.num_of_ppdu[p_pktinfo->ppdu_cnt] = date_rate | BIT(7);
-				p_phydm->phy_dbg_info.gid_num[p_pktinfo->ppdu_cnt] = p_phy_sta_rpt->gid;
+		if (dm->support_ic_type &
+		    (PHYSTS_2ND_TYPE_IC | PHYSTS_3RD_TYPE_IC)) {
+			if (bw_idx == *dm->band_width) {
+				dbg_i->num_qry_ht_pkt[offset]++;
+
+			} else if (bw_idx == CHANNEL_WIDTH_20) {
+				dbg_i->num_qry_pkt_sc_20m[offset]++;
+				dbg_i->low_bw_20_occur = true;
 			}
+		} else {
+			dbg_i->num_qry_ht_pkt[offset]++;
+		}
+	}
+#if (ODM_IC_11AC_SERIES_SUPPORT || defined(PHYSTS_3RD_TYPE_SUPPORT))
+	else if (rate <= ODM_RATEVHTSS4MCS9) {
+		offset = rate - ODM_RATEVHTSS1MCS0;
+
+		if (offset > (VHT_RATE_NUM - 1))
+			offset = VHT_RATE_NUM - 1;
+
+		#ifdef PHYDM_COMPILE_MU
+		gid = phydm_get_gid(dm, phy_status_inf);
+
+		if (gid != 0 && gid != 63)
+			is_mu_pkt = true;
+
+		if (is_mu_pkt) {
+			#if (ODM_PHY_STATUS_NEW_TYPE_SUPPORT ||\
+			     (defined(PHYSTS_3RD_TYPE_SUPPORT)))
+			dbg_i->num_mu_vht_pkt[offset]++;
+			#else
+			dbg_i->num_qry_vht_pkt[offset]++; /*@for debug*/
+			#endif
 		} else
 		#endif
 		{
-			p_phydm->phy_dbg_info.num_qry_vht_pkt[date_rate - ODM_RATEVHTSS1MCS0]++;
-			p_phydm->phy_dbg_info.vht_pkt_not_zero = true;
-			#if (ODM_PHY_STATUS_NEW_TYPE_SUPPORT == 1)
-			if (p_pktinfo->ppdu_cnt < 4) {
-				p_phydm->phy_dbg_info.num_of_ppdu[p_pktinfo->ppdu_cnt] = date_rate;
-				p_phydm->phy_dbg_info.gid_num[p_pktinfo->ppdu_cnt] = p_phy_sta_rpt->gid;
+			dbg_i->vht_pkt_not_zero = true;
+
+			if (dm->support_ic_type &
+			    (PHYSTS_2ND_TYPE_IC | PHYSTS_3RD_TYPE_IC)) {
+				if (bw_idx == *dm->band_width) {
+					dbg_i->num_qry_vht_pkt[offset]++;
+
+				} else if (bw_idx == CHANNEL_WIDTH_20) {
+					dbg_i->num_qry_pkt_sc_20m[offset]++;
+					dbg_i->low_bw_20_occur = true;
+				} else {/*@if (bw_idx == CHANNEL_WIDTH_40)*/
+					dbg_i->num_qry_pkt_sc_40m[offset]++;
+					dbg_i->low_bw_40_occur = true;
+				}
+			} else {
+				dbg_i->num_qry_vht_pkt[offset]++;
 			}
+		}
+
+		#if (ODM_PHY_STATUS_NEW_TYPE_SUPPORT ||\
+		     (defined(PHYSTS_3RD_TYPE_SUPPORT)))
+		if (pktinfo->ppdu_cnt < 4) {
+			val = rate;
+
+			#ifdef PHYDM_COMPILE_MU
+			if (is_mu_pkt)
+				val |= BIT(7);
 			#endif
+
+			dbg_i->num_of_ppdu[pktinfo->ppdu_cnt] = val;
+			dbg_i->gid_num[pktinfo->ppdu_cnt] = gid;
 		}
+		#endif
 	}
-	#endif
+#endif
 }
 
-void
-phydm_reset_phystatus_avg(
-	struct PHY_DM_STRUCT	*p_dm
-)
+void phydm_reset_phystatus_avg(struct dm_struct *dm)
 {
-	struct phydm_phystatus_avg		*p_dbg_avg = &(p_dm->phy_dbg_info.phystatus_statistic_avg);
+	struct phydm_phystatus_avg *dbg_avg = NULL;
 
-	odm_memory_set(p_dm, &(p_dbg_avg->rssi_cck_avg), 0, sizeof(struct phydm_phystatus_avg));
+	dbg_avg = &dm->phy_dbg_info.phystatus_statistic_avg;
+	odm_memory_set(dm, &dbg_avg->rssi_cck_avg, 0,
+		       sizeof(struct phydm_phystatus_avg));
 }
 
-void
-phydm_reset_phystatus_statistic(
-	struct PHY_DM_STRUCT	*p_dm
-)
+void phydm_reset_phystatus_statistic(struct dm_struct *dm)
 {
-	struct phydm_phystatus_statistic		*p_dbg_statistic = &(p_dm->phy_dbg_info.phystatus_statistic_info);
+	struct phydm_phystatus_statistic *dbg_s = NULL;
 
-	odm_memory_set(p_dm, &(p_dbg_statistic->rssi_cck_sum), 0, sizeof(struct phydm_phystatus_statistic));
+	dbg_s = &dm->phy_dbg_info.physts_statistic_info;
+
+	odm_memory_set(dm, &dbg_s->rssi_cck_sum, 0,
+		       sizeof(struct phydm_phystatus_statistic));
 }
 
-void
-phydm_avg_phystatus_index(
-	struct PHY_DM_STRUCT			*p_dm,
-	struct phydm_phyinfo_struct		*p_phy_info,
-	struct phydm_perpkt_info_struct			*p_pktinfo
-)
+void phydm_avg_phystatus_index(void *dm_void,
+			       struct phydm_phyinfo_struct *phy_info,
+			       struct phydm_perpkt_info_struct *pktinfo)
 {
-	u8	rate_ss = phydm_rate_to_num_ss(p_dm, p_pktinfo->data_rate);
-	struct phydm_phystatus_statistic		*p_dbg_statistic = &(p_dm->phy_dbg_info.phystatus_statistic_info);
-
-	if (p_pktinfo->data_rate <= ODM_RATE11M) {
-
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct odm_phy_dbg_info *dbg_i = &dm->phy_dbg_info;
+	struct phydm_phystatus_statistic *dbg_s = &dbg_i->physts_statistic_info;
+	u8 rssi[PHYSTS_PATH_NUM] = {0};
+	u8 evm[PHYSTS_PATH_NUM] = {0};
+	s8 snr[PHYSTS_PATH_NUM] = {0};
+	u32 size = PHYSTS_PATH_NUM; /*size of path=4*/
+	u16 size_th = PHY_HIST_SIZE - 1; /*size of threshold*/
+	u16 val = 0, intvl = 0;
+	u8 i = 0;
+
+	odm_move_memory(dm, rssi, phy_info->rx_mimo_signal_strength, size);
+	odm_move_memory(dm, evm, phy_info->rx_mimo_evm_dbm, size);
+	odm_move_memory(dm, snr, phy_info->rx_snr, size);
+
+	if (pktinfo->data_rate <= ODM_RATE11M) {
 		/*RSSI*/
-		p_dbg_statistic->rssi_cck_sum += p_phy_info->rx_mimo_signal_strength[0];
-		p_dbg_statistic->rssi_cck_cnt++;
-	} else if (p_pktinfo->data_rate <= ODM_RATE54M) {
-
-		/*evm*/
-		p_dbg_statistic->evm_ofdm_sum += p_phy_info->rx_mimo_evm_dbm[0];
+		dbg_s->rssi_cck_sum += rssi[0];
+		dbg_s->rssi_cck_cnt++;
+		return;
+	} else if (pktinfo->data_rate <= ODM_RATE54M) {
+		/*@evm*/
+		dbg_s->evm_ofdm_sum += evm[0];
 
 		/*SNR*/
-		p_dbg_statistic->snr_ofdm_sum += p_phy_info->rx_snr[0];
+		dbg_s->snr_ofdm_sum += snr[0];
 
 		/*RSSI*/
-		p_dbg_statistic->rssi_ofdm_sum += p_phy_info->rx_mimo_signal_strength[0];
-		p_dbg_statistic->rssi_ofdm_cnt++;
-	} else if (rate_ss == 1) {
+		dbg_s->rssi_ofdm_sum += rssi[0];
+		dbg_s->rssi_ofdm_cnt++;
 
-		/*evm*/
-		p_dbg_statistic->evm_1ss_sum += p_phy_info->rx_mimo_evm_dbm[0];
+		val = (u16)evm[0];
+		intvl = phydm_find_intrvl(dm, val, dbg_i->evm_hist_th, size_th);
+		dbg_s->evm_ofdm_hist[intvl]++;
 
-		/*SNR*/
-		p_dbg_statistic->snr_1ss_sum += p_phy_info->rx_snr[0];
+		val = (u16)snr[0];
+		intvl = phydm_find_intrvl(dm, val, dbg_i->snr_hist_th, size_th);
+		dbg_s->snr_ofdm_hist[intvl]++;
 
-		p_dbg_statistic->rssi_1ss_sum += p_phy_info->rx_mimo_signal_strength[0];
-		p_dbg_statistic->rssi_1ss_cnt++;
-	} else if (rate_ss == 2) {
-		#if (defined(PHYDM_COMPILE_ABOVE_2SS))
-		/*evm*/
-		p_dbg_statistic->evm_2ss_sum[0] += p_phy_info->rx_mimo_evm_dbm[0];
-		p_dbg_statistic->evm_2ss_sum[1] += p_phy_info->rx_mimo_evm_dbm[1];
+	} else if (pktinfo->rate_ss == 1) {
+/*@===[1-SS]==================================================================*/
+		/*@evm*/
+		dbg_s->evm_1ss_sum += evm[0];
 
 		/*SNR*/
-		p_dbg_statistic->snr_2ss_sum[0] += p_phy_info->rx_snr[0];
-		p_dbg_statistic->snr_2ss_sum[1] += p_phy_info->rx_snr[1];
+		dbg_s->snr_1ss_sum += snr[0];
 
 		/*RSSI*/
-		p_dbg_statistic->rssi_2ss_sum[0] += p_phy_info->rx_mimo_signal_strength[0];
-		p_dbg_statistic->rssi_2ss_sum[1] += p_phy_info->rx_mimo_signal_strength[1];
-		p_dbg_statistic->rssi_2ss_cnt++;
-		#endif
-	} else if (rate_ss == 3) {
-		#if (defined(PHYDM_COMPILE_ABOVE_3SS))
-		/*evm*/
-		p_dbg_statistic->evm_3ss_sum[0] += p_phy_info->rx_mimo_evm_dbm[0];
-		p_dbg_statistic->evm_3ss_sum[1] += p_phy_info->rx_mimo_evm_dbm[1];
-		p_dbg_statistic->evm_3ss_sum[2] += p_phy_info->rx_mimo_evm_dbm[2];
+		dbg_s->rssi_1ss_sum += rssi[0];
 
-		/*SNR*/
-		p_dbg_statistic->snr_3ss_sum[0] += p_phy_info->rx_snr[0];
-		p_dbg_statistic->snr_3ss_sum[1] += p_phy_info->rx_snr[1];
-		p_dbg_statistic->snr_3ss_sum[2] += p_phy_info->rx_snr[2];
+		/*@EVM Histogram*/
+		val = (u16)evm[0];
+		intvl = phydm_find_intrvl(dm, val, dbg_i->evm_hist_th, size_th);
+		dbg_s->evm_1ss_hist[intvl]++;
 
-		/*RSSI*/
-		p_dbg_statistic->rssi_3ss_sum[0] += p_phy_info->rx_mimo_signal_strength[0];
-		p_dbg_statistic->rssi_3ss_sum[1] += p_phy_info->rx_mimo_signal_strength[1];
-		p_dbg_statistic->rssi_3ss_sum[2] += p_phy_info->rx_mimo_signal_strength[2];
-		p_dbg_statistic->rssi_3ss_cnt++;
+		/*SNR Histogram*/
+		val = (u16)snr[0];
+		intvl = phydm_find_intrvl(dm, val, dbg_i->snr_hist_th, size_th);
+		dbg_s->snr_1ss_hist[intvl]++;
+
+		dbg_s->rssi_1ss_cnt++;
+	} else if (pktinfo->rate_ss == 2) {
+/*@===[2-SS]==================================================================*/
+		#if (defined(PHYDM_COMPILE_ABOVE_2SS))
+		for (i = 0; i < pktinfo->rate_ss; i++) {
+			/*@evm*/
+			dbg_s->evm_2ss_sum[i] += evm[i];
+			/*SNR*/
+			dbg_s->snr_2ss_sum[i] += snr[i];
+			/*RSSI*/
+			dbg_s->rssi_2ss_sum[i] += rssi[i];
+			/*@EVM Histogram*/
+			val = (u16)evm[i];
+			intvl = phydm_find_intrvl(dm, val, dbg_i->evm_hist_th,
+						  size_th);
+			dbg_s->evm_2ss_hist[i][intvl]++;
+
+			/*SNR Histogram*/
+			val = (u16)snr[i];
+			intvl = phydm_find_intrvl(dm, val, dbg_i->snr_hist_th,
+						  size_th);
+			dbg_s->snr_2ss_hist[i][intvl]++;
+		}
+		dbg_s->rssi_2ss_cnt++;
 		#endif
-	} else if (rate_ss == 4) {
+	} else if (pktinfo->rate_ss == 3) {
+/*@===[3-SS]==================================================================*/
+		#if (defined(PHYDM_COMPILE_ABOVE_3SS))
+		for (i = 0; i < pktinfo->rate_ss; i++) {
+			/*@evm*/
+			dbg_s->evm_3ss_sum[i] += evm[i];
+			/*SNR*/
+			dbg_s->snr_3ss_sum[i] += snr[i];
+			/*RSSI*/
+			dbg_s->rssi_3ss_sum[i] += rssi[i];
+			/*@EVM Histogram*/
+			val = (u16)evm[i];
+			intvl = phydm_find_intrvl(dm, val, dbg_i->evm_hist_th,
+						  size_th);
+			dbg_s->evm_3ss_hist[i][intvl]++;
+
+			/*SNR Histogram*/
+			val = (u16)snr[i];
+			intvl = phydm_find_intrvl(dm, val, dbg_i->snr_hist_th,
+						  size_th);
+			dbg_s->snr_3ss_hist[i][intvl]++;
+		}
+		dbg_s->rssi_3ss_cnt++;
+		#endif
+	} else if (pktinfo->rate_ss == 4) {
+/*@===[4-SS]==================================================================*/
 		#if (defined(PHYDM_COMPILE_ABOVE_4SS))
-		/*evm*/
-		p_dbg_statistic->evm_4ss_sum[0] += p_phy_info->rx_mimo_evm_dbm[0];
-		p_dbg_statistic->evm_4ss_sum[1] += p_phy_info->rx_mimo_evm_dbm[1];
-		p_dbg_statistic->evm_4ss_sum[2] += p_phy_info->rx_mimo_evm_dbm[2];
-		p_dbg_statistic->evm_4ss_sum[3] += p_phy_info->rx_mimo_evm_dbm[3];
-
-		/*SNR*/
-		p_dbg_statistic->snr_4ss_sum[0] += p_phy_info->rx_snr[0];
-		p_dbg_statistic->snr_4ss_sum[1] += p_phy_info->rx_snr[1];
-		p_dbg_statistic->snr_4ss_sum[2] += p_phy_info->rx_snr[2];
-		p_dbg_statistic->snr_4ss_sum[3] += p_phy_info->rx_snr[3];
-
-		/*RSSI*/
-		p_dbg_statistic->rssi_4ss_sum[0] += p_phy_info->rx_mimo_signal_strength[0];
-		p_dbg_statistic->rssi_4ss_sum[1] += p_phy_info->rx_mimo_signal_strength[1];
-		p_dbg_statistic->rssi_4ss_sum[2] += p_phy_info->rx_mimo_signal_strength[2];
-		p_dbg_statistic->rssi_4ss_sum[3] += p_phy_info->rx_mimo_signal_strength[3];
-		p_dbg_statistic->rssi_4ss_cnt++;
+		for (i = 0; i < pktinfo->rate_ss; i++) {
+			/*@evm*/
+			dbg_s->evm_4ss_sum[i] += evm[i];
+			/*SNR*/
+			dbg_s->snr_4ss_sum[i] += snr[i];
+			/*RSSI*/
+			dbg_s->rssi_4ss_sum[i] += rssi[i];
+			/*@EVM Histogram*/
+			val = (u16)evm[i];
+			intvl = phydm_find_intrvl(dm, val, dbg_i->evm_hist_th,
+						  size_th);
+			dbg_s->evm_4ss_hist[i][intvl]++;
+
+			/*SNR Histogram*/
+			val = (u16)snr[i];
+			intvl = phydm_find_intrvl(dm, val, dbg_i->snr_hist_th,
+						  size_th);
+			dbg_s->snr_4ss_hist[i][intvl]++;
+		}
+		dbg_s->rssi_4ss_cnt++;
 		#endif
 	}
 }
 
-u8 phydm_get_signal_quality(
-	struct phydm_phyinfo_struct *p_phy_info,
-	struct PHY_DM_STRUCT *p_dm,
-	struct _phy_status_rpt_8192cd *p_phy_sta_rpt
-	)
+void phydm_avg_phystatus_init(void *dm_void)
+{
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct odm_phy_dbg_info *dbg_i = &dm->phy_dbg_info;
+	u16 snr_hist_th[PHY_HIST_SIZE - 1] = {5, 8, 11, 14, 17, 20, 23, 26,
+					      29, 32, 35};
+	u16 evm_hist_th[PHY_HIST_SIZE - 1] = {5, 8, 11, 14, 17, 20, 23, 26,
+					      29, 32, 35};
+	u32 size = (PHY_HIST_SIZE - 1) * 2;
+
+	odm_move_memory(dm, dbg_i->snr_hist_th, snr_hist_th, size);
+	odm_move_memory(dm, dbg_i->evm_hist_th, evm_hist_th, size);
+}
+
+u8 phydm_get_signal_quality(struct phydm_phyinfo_struct *phy_info,
+			    struct dm_struct *dm,
+			    struct phy_status_rpt_8192cd *phy_sts)
 {
-	u8 SQ_rpt;
+	u8 sq_rpt;
 	u8 result = 0;
 
-	if (p_phy_info->rx_pwdb_all > 40 && !p_dm->is_in_hct_test)
+	if (phy_info->rx_pwdb_all > 40 && !dm->is_in_hct_test) {
 		result = 100;
-	else {
-		SQ_rpt = p_phy_sta_rpt->cck_sig_qual_ofdm_pwdb_all;
+	} else {
+		sq_rpt = phy_sts->cck_sig_qual_ofdm_pwdb_all;
 
-		if (SQ_rpt > 64)
+		if (sq_rpt > 64)
 			result = 0;
-		else if (SQ_rpt < 20)
+		else if (sq_rpt < 20)
 			result = 100;
 		else
-			result = ((64 - SQ_rpt) * 100) / 44;
-
+			result = ((64 - sq_rpt) * 100) / 44;
 	}
 
 	return result;
 }
 
-u8
-phydm_query_rx_pwr_percentage(
-	s8		ant_power
-)
+u8 phydm_pwr_2_percent(s8 ant_power)
 {
-	if ((ant_power <= -100) || (ant_power >= 20))
-		return	0;
+	if ((ant_power <= -100) || ant_power >= 20)
+		return 0;
 	else if (ant_power >= 0)
-		return	100;
+		return 100;
 	else
 		return 100 + ant_power;
 }
 
+#if (DM_ODM_SUPPORT_TYPE & ODM_WIN)
 
-s32
-phydm_signal_scale_mapping_92c_series(
-	struct PHY_DM_STRUCT *p_dm,
-	s32 curr_sig
-)
+#if 0 /*(DM_ODM_SUPPORT_TYPE == ODM_CE)*/
+s32 phydm_signal_scale_mapping_92c_series(struct dm_struct *dm, s32 curr_sig)
 {
 	s32 ret_sig = 0;
+
 #if (DEV_BUS_TYPE == RT_PCI_INTERFACE)
-	if (p_dm->support_interface  == ODM_ITRF_PCIE) {
+	if (dm->support_interface == ODM_ITRF_PCIE) {
 		/* step 1. Scale mapping. */
 		if (curr_sig >= 61 && curr_sig <= 100)
 			ret_sig = 90 + ((curr_sig - 60) / 4);
@@ -256,7 +407,8 @@ phydm_signal_scale_mapping_92c_series(
 #endif
 
 #if ((DEV_BUS_TYPE == RT_USB_INTERFACE) || (DEV_BUS_TYPE == RT_SDIO_INTERFACE))
-	if ((p_dm->support_interface  == ODM_ITRF_USB) || (p_dm->support_interface  == ODM_ITRF_SDIO)) {
+	if (dm->support_interface == ODM_ITRF_USB ||
+	    dm->support_interface == ODM_ITRF_SDIO) {
 		if (curr_sig >= 51 && curr_sig <= 100)
 			ret_sig = 100;
 		else if (curr_sig >= 41 && curr_sig <= 50)
@@ -279,204 +431,268 @@ phydm_signal_scale_mapping_92c_series(
 	return ret_sig;
 }
 
-s32
-phydm_signal_scale_mapping(
-	struct PHY_DM_STRUCT *p_dm,
-	s32 curr_sig
-)
+s32 phydm_signal_scale_mapping(struct dm_struct *dm, s32 curr_sig)
 {
 #ifdef CONFIG_SIGNAL_SCALE_MAPPING
-		return phydm_signal_scale_mapping_92c_series(p_dm, curr_sig);
+	return phydm_signal_scale_mapping_92c_series(dm, curr_sig);
 #else
-		return curr_sig;
+	return curr_sig;
+#endif
+}
 #endif
 
+void phydm_process_signal_strength(struct dm_struct *dm,
+				   struct phydm_phyinfo_struct *phy_info,
+				   struct phydm_perpkt_info_struct *pktinfo)
+{
+	u8 avg_rssi = 0, tmp_rssi = 0, best_rssi = 0, second_rssi = 0;
+	u8 ss = 0; /*signal strenth after scale mapping*/
+	u8 pwdb = phy_info->rx_pwdb_all;
+	u8 i;
+
+	/*use the best two RSSI only*/
+	for (i = RF_PATH_A; i < PHYDM_MAX_RF_PATH; i++) {
+		tmp_rssi = phy_info->rx_mimo_signal_strength[i];
+
+		/*@Get the best two RSSI*/
+		if (tmp_rssi > best_rssi && tmp_rssi > second_rssi) {
+			second_rssi = best_rssi;
+			best_rssi = tmp_rssi;
+		} else if (tmp_rssi > second_rssi && tmp_rssi <= best_rssi) {
+			second_rssi = tmp_rssi;
+		}
+	}
+
+	if (best_rssi == 0)
+		return;
+
+	if (pktinfo->rate_ss == 1)
+		avg_rssi = best_rssi;
+	else
+		avg_rssi = (best_rssi + second_rssi) >> 1;
+
+	if (dm->support_ic_type & PHYSTS_3RD_TYPE_IC) {
+	#ifdef PHYSTS_3RD_TYPE_SUPPORT
+		/* Update signal strength to UI,
+		 * and phy_info->rx_pwdb_all is the maximum RSSI of all path
+		 */
+		#if 1 /*(DM_ODM_SUPPORT_TYPE == ODM_WIN)*/
+		ss = SignalScaleProc(dm->adapter, pwdb, false, false);
+		#elif (DM_ODM_SUPPORT_TYPE == ODM_CE)
+		ss = (u8)phydm_signal_scale_mapping(dm, pwdb);
+		#elif (DM_ODM_SUPPORT_TYPE == ODM_IOT)
+		ss = (u8)phydm_signal_scale_mapping(dm, pwdb);
+		#endif
+
+	#endif
+	} else if (dm->support_ic_type & PHYSTS_2ND_TYPE_IC) {
+	#if (ODM_PHY_STATUS_NEW_TYPE_SUPPORT)
+		/* Update signal strength to UI,
+		 * and phy_info->rx_pwdb_all is the maximum RSSI of all path
+		 */
+		#if 1 /*(DM_ODM_SUPPORT_TYPE == ODM_WIN)*/
+		ss = SignalScaleProc(dm->adapter, pwdb, false, false);
+		#elif (DM_ODM_SUPPORT_TYPE == ODM_CE)
+		ss = (u8)phydm_signal_scale_mapping(dm, pwdb);
+		#endif
+
+	#endif
+	} else if (dm->support_ic_type & ODM_IC_11AC_SERIES) {
+	#if ODM_IC_11AC_SERIES_SUPPORT
+		if (pktinfo->is_cck_rate)
+			#if 1/*(DM_ODM_SUPPORT_TYPE == ODM_WIN)*/
+			ss = SignalScaleProc(dm->adapter, pwdb, 0, 1);
+			#else
+			ss = (u8)phydm_signal_scale_mapping(dm, pwdb);
+			#endif
+		else
+			#if 1 /*(DM_ODM_SUPPORT_TYPE == ODM_WIN)*/
+			ss = SignalScaleProc(dm->adapter, avg_rssi, 0, 1);
+			#else
+			ss = (u8)phydm_signal_scale_mapping(dm, avg_rssi);
+			#endif
+	#endif
+	} else if (dm->support_ic_type & ODM_IC_11N_SERIES) {
+	#if ODM_IC_11N_SERIES_SUPPORT
+		if (pktinfo->is_cck_rate)
+			#if 1/*(DM_ODM_SUPPORT_TYPE == ODM_WIN)*/
+			ss = SignalScaleProc(dm->adapter, pwdb, 1, 1);
+			#else
+			ss = (u8)phydm_signal_scale_mapping(dm, pwdb);
+			#endif
+		else
+			#if 1 /*(DM_ODM_SUPPORT_TYPE == ODM_WIN)*/
+			ss = SignalScaleProc(dm->adapter, avg_rssi, 1, 0);
+			#else
+			ss = (u8)phydm_signal_scale_mapping(dm, avg_rssi);
+			#endif
+	#endif
+	}
+	phy_info->signal_strength = ss;
 }
+#endif
 
 #if (DM_ODM_SUPPORT_TYPE & ODM_WIN)
-static u8 phydm_sq_patch_rt_cid_819x_lenovo(
-	struct PHY_DM_STRUCT	*p_dm,
-	u8		is_cck_rate,
-	u8		PWDB_ALL,
-	u8		path,
-	u8		RSSI
-)
+static u8 phydm_sq_patch_lenovo(
+	struct dm_struct *dm,
+	u8 is_cck_rate,
+	u8 pwdb_all,
+	u8 path,
+	u8 RSSI)
 {
-	u8	SQ = 0;
+	u8 sq = 0;
 
 	if (is_cck_rate) {
-
-		if (IS_HARDWARE_TYPE_8192E(p_dm->adapter)) {
-
-			/*  */
-			/* <Roger_Notes> Expected signal strength and bars indication at Lenovo lab. 2013.04.11 */
-			/* 802.11n, 802.11b, 802.11g only at channel 6 */
-			/*  */
-			/*		Attenuation (dB)	OS Signal Bars	RSSI by Xirrus (dBm) */
-			/*			50				5			-49 */
-			/*			55				5			-49 */
-			/*			60				5			-50 */
-			/*			65				5			-51 */
-			/*			70				5			-52 */
-			/*			75				5			-54 */
-			/*			80				5			-55 */
-			/*			85				4			-60 */
-			/*			90				3			-63 */
-			/*			95				3			-65 */
-			/*			100				2			-67 */
-			/*			102				2			-67 */
-			/*			104				1			-70 */
-			/*  */
-
-			if (PWDB_ALL >= 50)
-				SQ = 100;
-			else if (PWDB_ALL >= 35 && PWDB_ALL < 50)
-				SQ = 80;
-			else if (PWDB_ALL >= 31 && PWDB_ALL < 35)
-				SQ = 60;
-			else if (PWDB_ALL >= 22 && PWDB_ALL < 31)
-				SQ = 40;
-			else if (PWDB_ALL >= 18 && PWDB_ALL < 22)
-				SQ = 20;
+		if (dm->support_ic_type & ODM_RTL8192E) {
+/*@
+ * <Roger_Notes>
+ * Expected signal strength and bars indication at Lenovo lab. 2013.04.11
+ * 802.11n, 802.11b, 802.11g only at channel 6
+ *
+ *	Attenuation (dB)	OS Signal Bars	RSSI by Xirrus (dBm)
+ *		50				5			-49
+ *		55				5			-49
+ *		60				5			-50
+ *		65				5			-51
+ *		70				5			-52
+ *		75				5			-54
+ *		80				5			-55
+ *		85				4			-60
+ *		90				3			-63
+ *		95				3			-65
+ *		100				2			-67
+ *		102				2			-67
+ *		104				1			-70
+ */
+			if (pwdb_all >= 50)
+				sq = 100;
+			else if (pwdb_all >= 35 && pwdb_all < 50)
+				sq = 80;
+			else if (pwdb_all >= 31 && pwdb_all < 35)
+				sq = 60;
+			else if (pwdb_all >= 22 && pwdb_all < 31)
+				sq = 40;
+			else if (pwdb_all >= 18 && pwdb_all < 22)
+				sq = 20;
 			else
-				SQ = 10;
+				sq = 10;
 		} else {
-			if (PWDB_ALL >= 50)
-				SQ = 100;
-			else if (PWDB_ALL >= 35 && PWDB_ALL < 50)
-				SQ = 80;
-			else if (PWDB_ALL >= 22 && PWDB_ALL < 35)
-				SQ = 60;
-			else if (PWDB_ALL >= 18 && PWDB_ALL < 22)
-				SQ = 40;
+			if (pwdb_all >= 50)
+				sq = 100;
+			else if (pwdb_all >= 35 && pwdb_all < 50)
+				sq = 80;
+			else if (pwdb_all >= 22 && pwdb_all < 35)
+				sq = 60;
+			else if (pwdb_all >= 18 && pwdb_all < 22)
+				sq = 40;
 			else
-				SQ = 10;
+				sq = 10;
 		}
 
 	} else {
 		/* OFDM rate */
 
-		if (IS_HARDWARE_TYPE_8192E(p_dm->adapter)) {
+		if (dm->support_ic_type & ODM_RTL8192E) {
 			if (RSSI >= 45)
-				SQ = 100;
+				sq = 100;
 			else if (RSSI >= 22 && RSSI < 45)
-				SQ = 80;
+				sq = 80;
 			else if (RSSI >= 18 && RSSI < 22)
-				SQ = 40;
+				sq = 40;
 			else
-				SQ = 20;
+				sq = 20;
 		} else {
 			if (RSSI >= 45)
-				SQ = 100;
+				sq = 100;
 			else if (RSSI >= 22 && RSSI < 45)
-				SQ = 80;
+				sq = 80;
 			else if (RSSI >= 18 && RSSI < 22)
-				SQ = 40;
+				sq = 40;
 			else
-				SQ = 20;
+				sq = 20;
 		}
 	}
-
-	RT_TRACE(COMP_DBG, DBG_TRACE, ("is_cck_rate(%#d), PWDB_ALL(%#d), RSSI(%#d), SQ(%#d)\n", is_cck_rate, PWDB_ALL, RSSI, SQ));
-
-
-	return SQ;
+	return sq;
 }
 
 static u8 phydm_sq_patch_rt_cid_819x_acer(
-	struct PHY_DM_STRUCT	*p_dm,
-	u8		is_cck_rate,
-	u8		PWDB_ALL,
-	u8		path,
-	u8		RSSI
-)
+	struct dm_struct *dm,
+	u8 is_cck_rate,
+	u8 pwdb_all,
+	u8 path,
+	u8 RSSI)
 {
-	u8	SQ = 0;
+	u8 sq = 0;
 
 	if (is_cck_rate) {
-
-		RT_TRACE(COMP_DBG, DBG_WARNING, ("odm_SQ_process_patch_RT_Acer\n"));
-
 #if OS_WIN_FROM_WIN8(OS_VERSION)
-
-		if (PWDB_ALL >= 50)
-			SQ = 100;
-		else if (PWDB_ALL >= 35 && PWDB_ALL < 50)
-			SQ = 80;
-		else if (PWDB_ALL >= 30 && PWDB_ALL < 35)
-			SQ = 60;
-		else if (PWDB_ALL >= 25 && PWDB_ALL < 30)
-			SQ = 40;
-		else if (PWDB_ALL >= 20 && PWDB_ALL < 25)
-			SQ = 20;
+		if (pwdb_all >= 50)
+			sq = 100;
+		else if (pwdb_all >= 35 && pwdb_all < 50)
+			sq = 80;
+		else if (pwdb_all >= 30 && pwdb_all < 35)
+			sq = 60;
+		else if (pwdb_all >= 25 && pwdb_all < 30)
+			sq = 40;
+		else if (pwdb_all >= 20 && pwdb_all < 25)
+			sq = 20;
 		else
-			SQ = 10;
+			sq = 10;
 #else
-		if (PWDB_ALL >= 50)
-			SQ = 100;
-		else if (PWDB_ALL >= 35 && PWDB_ALL < 50)
-			SQ = 80;
-		else if (PWDB_ALL >= 30 && PWDB_ALL < 35)
-			SQ = 60;
-		else if (PWDB_ALL >= 25 && PWDB_ALL < 30)
-			SQ = 40;
-		else if (PWDB_ALL >= 20 && PWDB_ALL < 25)
-			SQ = 20;
+		if (pwdb_all >= 50)
+			sq = 100;
+		else if (pwdb_all >= 35 && pwdb_all < 50)
+			sq = 80;
+		else if (pwdb_all >= 30 && pwdb_all < 35)
+			sq = 60;
+		else if (pwdb_all >= 25 && pwdb_all < 30)
+			sq = 40;
+		else if (pwdb_all >= 20 && pwdb_all < 25)
+			sq = 20;
 		else
-			SQ = 10;
+			sq = 10;
 
-		if (PWDB_ALL == 0) /* Abnormal case, do not indicate the value above 20 on Win7 */
-			SQ = 20;
+		/* @Abnormal case, do not indicate the value above 20 on Win7 */
+		if (pwdb_all == 0)
+			sq = 20;
 #endif
 
-
-
 	} else {
 		/* OFDM rate */
-
-		if (IS_HARDWARE_TYPE_8192E(p_dm->adapter)) {
+		if (dm->support_ic_type & ODM_RTL8192E) {
 			if (RSSI >= 45)
-				SQ = 100;
+				sq = 100;
 			else if (RSSI >= 22 && RSSI < 45)
-				SQ = 80;
+				sq = 80;
 			else if (RSSI >= 18 && RSSI < 22)
-				SQ = 40;
+				sq = 40;
 			else
-				SQ = 20;
+				sq = 20;
 		} else {
 			if (RSSI >= 35)
-				SQ = 100;
+				sq = 100;
 			else if (RSSI >= 30 && RSSI < 35)
-				SQ = 80;
+				sq = 80;
 			else if (RSSI >= 25 && RSSI < 30)
-				SQ = 40;
+				sq = 40;
 			else
-				SQ = 20;
+				sq = 20;
 		}
 	}
-
-	RT_TRACE(COMP_DBG, DBG_LOUD, ("is_cck_rate(%#d), PWDB_ALL(%#d), RSSI(%#d), SQ(%#d)\n", is_cck_rate, PWDB_ALL, RSSI, SQ));
-
-
-	return SQ;
+	return sq;
 }
 #endif
 
 static u8
-phydm_evm_db_to_percentage(
-	s8 value
-)
+phydm_evm_2_percent(s8 value)
 {
-	/*  */
-	/* -33dB~0dB to 0%~99% */
-	/*  */
+	/* @-33dB~0dB to 0%~99% */
 	s8 ret_val;
 
 	ret_val = value;
 	ret_val /= 2;
 
-	/*dbg_print("value=%d\n", value);*/
-	/*ODM_RT_DISP(FRX, RX_PHY_SQ, ("EVMdbToPercentage92C value=%d / %x\n", ret_val, ret_val));*/
+/*@dbg_print("value=%d\n", value);*/
 #ifdef ODM_EVM_ENHANCE_ANTDIV
 	if (ret_val >= 0)
 		ret_val = 0;
@@ -504,1710 +720,2128 @@ phydm_evm_db_to_percentage(
 }
 
 static u8
-phydm_evm_dbm_jaguar_series(
-	s8 value
-)
+phydm_evm_dbm(s8 value)
 {
 	s8 ret_val = value;
 
-	/* -33dB~0dB to 33dB ~ 0dB */
+	/* @-33dB~0dB to 33dB ~ 0dB */
 	if (ret_val == -128)
 		ret_val = 127;
 	else if (ret_val < 0)
 		ret_val = 0 - ret_val;
 
-	ret_val  = ret_val >> 1;
+	ret_val = ret_val >> 1;
 	return (u8)ret_val;
 }
 
 static s16
-phydm_cfo(
-	s8 value
-)
+phydm_cfo(s8 value)
 {
-	s16  ret_val;
+	s16 ret_val;
 
 	if (value < 0) {
 		ret_val = 0 - value;
-		ret_val = (ret_val << 1) + (ret_val >> 1) ;  /* *2.5~=312.5/2^7 */
-		ret_val = ret_val | BIT(12);  /* set bit12 as 1 for negative cfo */
+		ret_val = (ret_val << 1) + (ret_val >> 1); /*@2.5~=312.5/2^7 */
+		ret_val = ret_val | BIT(12); /*set bit12 as 1 for negative cfo*/
 	} else {
 		ret_val = value;
-		ret_val = (ret_val << 1) + (ret_val >> 1) ; /* *2.5~=312.5/2^7 */
+		ret_val = (ret_val << 1) + (ret_val >> 1); /* @*2.5~=312.5/2^7*/
 	}
 	return ret_val;
 }
 
-s8
-phydm_cck_rssi_convert(
-	struct PHY_DM_STRUCT	*p_dm,
-	u16		lna_idx,
-	u8		vga_idx
-)
+s8 phydm_cck_rssi_convert(struct dm_struct *dm, u16 lna_idx, u8 vga_idx)
 {
-	return (p_dm->cck_lna_gain_table[lna_idx] - (vga_idx << 1));
+	/*@phydm_get_cck_rssi_table_from_reg*/
+	return (dm->cck_lna_gain_table[lna_idx] - (vga_idx << 1));
 }
 
-void
-phydm_get_cck_rssi_table_from_reg(
-	struct PHY_DM_STRUCT	*p_dm
-)
+void phydm_get_cck_rssi_table_from_reg(struct dm_struct *dm)
 {
-	u8	used_lna_idx_tmp;
-	u32	reg_0xa80 = 0x7431, reg_0xabc = 0xcbe5edfd; /*example: {-53, -43, -33, -27, -19, -13, -3, 1}*/ /*{0xCB, 0xD5, 0xDF, 0xE5, 0xED, 0xF3, 0xFD, 0x2}*/
-	u8	i;
+	u8 used_lna_idx_tmp;
+	u32 reg_0xa80 = 0x7431, reg_0xabc = 0xcbe5edfd;
+	u32 val = 0;
+	u8 i;
+
+	/*@example: {-53, -43, -33, -27, -19, -13, -3, 1}*/
+	/*@{0xCB, 0xD5, 0xDF, 0xE5, 0xED, 0xF3, 0xFD, 0x2}*/
 
-	PHYDM_DBG(p_dm, ODM_COMP_INIT, ("CCK LNA Gain table init\n"));
+	PHYDM_DBG(dm, ODM_COMP_INIT, "CCK LNA Gain table init\n");
 
-	if (!(p_dm->support_ic_type & (ODM_RTL8197F)))
+	if (!(dm->support_ic_type & (ODM_RTL8197F)))
 		return;
 
-	reg_0xa80 = odm_get_bb_reg(p_dm, 0xa80, 0xFFFF);
-	reg_0xabc = odm_get_bb_reg(p_dm, 0xabc, MASKDWORD);
+	reg_0xa80 = odm_get_bb_reg(dm, R_0xa80, 0xFFFF);
+	reg_0xabc = odm_get_bb_reg(dm, R_0xabc, MASKDWORD);
 
-	PHYDM_DBG(p_dm, ODM_COMP_INIT, ("reg_0xa80 = 0x%x\n", reg_0xa80));
-	PHYDM_DBG(p_dm, ODM_COMP_INIT, ("reg_0xabc = 0x%x\n", reg_0xabc));
+	PHYDM_DBG(dm, ODM_COMP_INIT, "reg_0xa80 = 0x%x\n", reg_0xa80);
+	PHYDM_DBG(dm, ODM_COMP_INIT, "reg_0xabc = 0x%x\n", reg_0xabc);
 
 	for (i = 0; i <= 3; i++) {
-		used_lna_idx_tmp = (u8)((reg_0xa80 >> (4*i)) & 0x7);
-		p_dm->cck_lna_gain_table[used_lna_idx_tmp] = (s8)((reg_0xabc >> (8*i)) & 0xff);
+		used_lna_idx_tmp = (u8)((reg_0xa80 >> (4 * i)) & 0x7);
+		val = (reg_0xabc >> (8 * i)) & 0xff;
+		dm->cck_lna_gain_table[used_lna_idx_tmp] = (s8)val;
 	}
 
-	PHYDM_DBG(p_dm, ODM_COMP_INIT, ("cck_lna_gain_table = {%d,%d,%d,%d,%d,%d,%d,%d}\n",
-		p_dm->cck_lna_gain_table[0],
-		p_dm->cck_lna_gain_table[1],
-		p_dm->cck_lna_gain_table[2],
-		p_dm->cck_lna_gain_table[3],
-		p_dm->cck_lna_gain_table[4],
-		p_dm->cck_lna_gain_table[5],
-		p_dm->cck_lna_gain_table[6],
-		p_dm->cck_lna_gain_table[7]));
-
+	PHYDM_DBG(dm, ODM_COMP_INIT,
+		  "cck_lna_gain_table = {%d,%d,%d,%d,%d,%d,%d,%d}\n",
+		  dm->cck_lna_gain_table[0], dm->cck_lna_gain_table[1],
+		  dm->cck_lna_gain_table[2], dm->cck_lna_gain_table[3],
+		  dm->cck_lna_gain_table[4], dm->cck_lna_gain_table[5],
+		  dm->cck_lna_gain_table[6], dm->cck_lna_gain_table[7]);
 }
 
-u8
-phydm_rate_to_num_ss(
-	struct PHY_DM_STRUCT		*p_dm,
-	u8			data_rate
-)
+s8 phydm_get_cck_rssi(void *dm_void, u8 lna_idx, u8 vga_idx)
 {
-	u8	num_ss = 1;
-
-	if (data_rate  <= ODM_RATE54M)
-		num_ss = 1;
-	else if (data_rate  <= ODM_RATEMCS31)
-		num_ss = ((data_rate  - ODM_RATEMCS0) >> 3) + 1;
-	else if (data_rate  <= ODM_RATEVHTSS1MCS9)
-		num_ss = 1;
-	else if (data_rate  <= ODM_RATEVHTSS2MCS9)
-		num_ss = 2;
-	else if (data_rate  <= ODM_RATEVHTSS3MCS9)
-		num_ss = 3;
-	else if (data_rate  <= ODM_RATEVHTSS4MCS9)
-		num_ss = 4;
-
-	return num_ss;
-}
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	s8 rx_pow = 0;
 
+	switch (dm->support_ic_type) {
+	#if (RTL8197F_SUPPORT == 1)
+	case ODM_RTL8197F:
+		rx_pow = phydm_cck_rssi_convert(dm, lna_idx, vga_idx);
+		break;
+	#endif
 
+	#if (RTL8723D_SUPPORT == 1)
+	case ODM_RTL8723D:
+		rx_pow = phydm_cckrssi_8723d(dm, lna_idx, vga_idx);
+		break;
+	#endif
 
-#if (RTL8703B_SUPPORT == 1)
-s8
-phydm_cck_rssi_8703B(
-	u16	LNA_idx,
-	u8	VGA_idx
-)
-{
-	s8	rx_pwr_all = 0x00;
+	#if (RTL8710B_SUPPORT == 1)
+	case ODM_RTL8710B:
+		rx_pow = phydm_cckrssi_8710b(dm, lna_idx, vga_idx);
+		break;
+	#endif
 
-	switch (LNA_idx) {
-	case 0xf:
-		rx_pwr_all = -48 - (2 * VGA_idx);
+	#if (RTL8721D_SUPPORT == 1)
+	case ODM_RTL8721D:
+		rx_pow = phydm_cckrssi_8721d(dm, lna_idx, vga_idx);
 		break;
-	case 0xb:
-		rx_pwr_all = -42 - (2 * VGA_idx); /*TBD*/
+	#endif
+
+	#if (RTL8192F_SUPPORT == 1)
+	case ODM_RTL8192F:
+		rx_pow = phydm_cckrssi_8192f(dm, lna_idx, vga_idx);
 		break;
-	case 0xa:
-		rx_pwr_all = -36 - (2 * VGA_idx);
+	#endif
+
+	#if (RTL8821C_SUPPORT == 1)
+	case ODM_RTL8821C:
+		rx_pow = phydm_cck_rssi_8821c(dm, lna_idx, vga_idx);
 		break;
-	case 8:
-		rx_pwr_all = -32 - (2 * VGA_idx);
+	#endif
+
+	#if (RTL8195B_SUPPORT == 1)
+	case ODM_RTL8195B:
+		rx_pow = phydm_cck_rssi_8195B(dm, lna_idx, vga_idx);
 		break;
-	case 7:
-		rx_pwr_all = -19 - (2 * VGA_idx);
+	#endif
+
+	#if (RTL8188E_SUPPORT == 1)
+	case ODM_RTL8188E:
+		rx_pow = phydm_cck_rssi_8188e(dm, lna_idx, vga_idx);
 		break;
-	case 4:
-		rx_pwr_all = -6 - (2 * VGA_idx);
+	#endif
+
+	#if (RTL8192E_SUPPORT == 1)
+	case ODM_RTL8192E:
+		rx_pow = phydm_cck_rssi_8192e(dm, lna_idx, vga_idx);
+		break;
+	#endif
+
+	#if (RTL8723B_SUPPORT == 1)
+	case ODM_RTL8723B:
+		rx_pow = phydm_cck_rssi_8723b(dm, lna_idx, vga_idx);
 		break;
-	case 0:
-		rx_pwr_all = -2 - (2 * VGA_idx);
+	#endif
+
+	#if (RTL8703B_SUPPORT == 1)
+	case ODM_RTL8703B:
+		rx_pow = phydm_cck_rssi_8703b(dm, lna_idx, vga_idx);
 		break;
-	default:
-		/*rx_pwr_all = -53+(2*(31-VGA_idx));*/
-		/*dbg_print("wrong LNA index\n");*/
+	#endif
+
+	#if (RTL8188F_SUPPORT == 1)
+	case ODM_RTL8188F:
+		rx_pow = phydm_cck_rssi_8188f(dm, lna_idx, vga_idx);
+		break;
+	#endif
+
+	#if (RTL8195A_SUPPORT == 1)
+	case ODM_RTL8195A:
+		rx_pow = phydm_cck_rssi_8195a(dm, lna_idx, vga_idx);
+		break;
+	#endif
+
+	#if (RTL8812A_SUPPORT == 1)
+	case ODM_RTL8812:
+		rx_pow = phydm_cck_rssi_8812a(dm, lna_idx, vga_idx);
+		break;
+	#endif
+
+	#if (RTL8821A_SUPPORT == 1) || (RTL8881A_SUPPORT == 1)
+	case ODM_RTL8821:
+	case ODM_RTL8881A:
+		rx_pow = phydm_cck_rssi_8821a(dm, lna_idx, vga_idx);
+		break;
+	#endif
+
+	#if (RTL8814A_SUPPORT == 1)
+	case ODM_RTL8814A:
+		rx_pow = phydm_cck_rssi_8814a(dm, lna_idx, vga_idx);
 		break;
+	#endif
 
+	default:
+		break;
 	}
-	return	rx_pwr_all;
+
+	return rx_pow;
 }
-#endif
 
-#if (RTL8195A_SUPPORT == 1)
-s8
-phydm_cck_rssi_8195a(
-	struct PHY_DM_STRUCT	*p_dm,
-	u16		LNA_idx,
-	u8		VGA_idx
-)
+#if (ODM_IC_11N_SERIES_SUPPORT == 1)
+void phydm_phy_sts_n_parsing(struct dm_struct *dm,
+			     struct phydm_phyinfo_struct *phy_info,
+			     u8 *phy_status_inf,
+			     struct phydm_perpkt_info_struct *pktinfo)
 {
-	s8	rx_pwr_all = 0;
-	s8	lna_gain = 0;
-	s8	lna_gain_table_0[8] = {0, -8, -15, -22, -29, -36, -45, -54};
-	s8	lna_gain_table_1[8] = {0, -8, -15, -22, -29, -36, -45, -54};/*use 8195A to calibrate this table. 2016.06.24, Dino*/
+	u8 i = 0;
+	s8 rx_pwr[4], rx_pwr_all = 0;
+	u8 EVM, pwdb_all = 0, pwdb_all_bt = 0;
+	u8 RSSI, total_rssi = 0;
+	u8 rf_rx_num = 0;
+	u8 lna_idx = 0;
+	u8 vga_idx = 0;
+	u8 cck_agc_rpt;
+	s8 evm_tmp = 0;
+	u8 sq = 0;
+	u8 val_tmp = 0;
+	s8 val_s8 = 0;
+	struct phy_status_rpt_8192cd *phy_sts = NULL;
+
+	phy_sts = (struct phy_status_rpt_8192cd *)phy_status_inf;
+
+	if (pktinfo->is_cck_rate) {
+		cck_agc_rpt = phy_sts->cck_agc_rpt_ofdm_cfosho_a;
+
+		/*@3 bit LNA*/
+		lna_idx = ((cck_agc_rpt & 0xE0) >> 5);
+		vga_idx = (cck_agc_rpt & 0x1F);
+
+		#if (RTL8703B_SUPPORT == 1)
+		if (dm->support_ic_type & (ODM_RTL8703B) &&
+		    dm->cck_agc_report_type == 1) {
+			/*@4 bit LNA*/
+			if (phy_sts->cck_rpt_b_ofdm_cfosho_b & BIT(7))
+				val_tmp = 1;
+			else
+				val_tmp = 0;
+			lna_idx = (val_tmp << 3) | lna_idx;
+		}
+		#endif
 
-	if (p_dm->cck_agc_report_type == 0)
-		lna_gain = lna_gain_table_0[LNA_idx];
-	else
-		lna_gain = lna_gain_table_1[LNA_idx];
+		rx_pwr_all = phydm_get_cck_rssi(dm, lna_idx, vga_idx);
 
-	rx_pwr_all = lna_gain - (2 * VGA_idx);
+		PHYDM_DBG(dm, DBG_RSSI_MNTR,
+			  "ext_lna_gain (( %d )), lna_idx: (( 0x%x )), vga_idx: (( 0x%x )), rx_pwr_all: (( %d ))\n",
+			  dm->ext_lna_gain, lna_idx, vga_idx, rx_pwr_all);
 
-	return	rx_pwr_all;
-}
-#endif
+		if (dm->board_type & ODM_BOARD_EXT_LNA)
+			rx_pwr_all -= dm->ext_lna_gain;
 
-#if (RTL8192E_SUPPORT == 1)
-s8
-phydm_cck_rssi_8192e(
-	struct PHY_DM_STRUCT	*p_dm,
-	u16		LNA_idx,
-	u8		VGA_idx
-)
-{
-	s8	rx_pwr_all = 0;
-	s8	lna_gain = 0;
-	s8	lna_gain_table_0[8] = {15, 9, -10, -21, -23, -27, -43, -44};
-	s8	lna_gain_table_1[8] = {24, 18, 13, -4, -11, -18, -31, -36};/*use 8192EU to calibrate this table. 2015.12.15, Dino*/
+		pwdb_all = phydm_pwr_2_percent(rx_pwr_all);
 
-	if (p_dm->cck_agc_report_type == 0)
-		lna_gain = lna_gain_table_0[LNA_idx];
-	else
-		lna_gain = lna_gain_table_1[LNA_idx];
+		if (pktinfo->is_to_self) {
+			dm->cck_lna_idx = lna_idx;
+			dm->cck_vga_idx = vga_idx;
+		}
 
-	rx_pwr_all = lna_gain - (2 * VGA_idx);
+		phy_info->rx_pwdb_all = pwdb_all;
+		phy_info->bt_rx_rssi_percentage = pwdb_all;
+		phy_info->recv_signal_power = rx_pwr_all;
 
-	return	rx_pwr_all;
-}
+		/* @(3) Get Signal Quality (EVM) */
+		#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
+		if (dm->iot_table.win_patch_id == RT_CID_819X_LENOVO)
+			sq = phydm_sq_patch_lenovo(dm, pktinfo->is_cck_rate, pwdb_all, 0, 0);
+		else if (dm->iot_table.win_patch_id == RT_CID_819X_ACER)
+			sq = phydm_sq_patch_rt_cid_819x_acer(dm, pktinfo->is_cck_rate, pwdb_all, 0, 0);
+		else
+		#endif
+			sq = phydm_get_signal_quality(phy_info, dm, phy_sts);
+
+#if 0
+		/* @dbg_print("cck sq = %d\n", sq); */
 #endif
+		phy_info->signal_quality = sq;
+		phy_info->rx_mimo_signal_quality[RF_PATH_A] = sq;
+		phy_info->rx_mimo_signal_quality[RF_PATH_B] = -1;
 
-#if (RTL8188E_SUPPORT == 1)
-s8
-phydm_cck_rssi_8188e(
-	struct PHY_DM_STRUCT	*p_dm,
-	u16		LNA_idx,
-	u8		VGA_idx
-)
-{
-	s8	rx_pwr_all = 0;
-	s8	lna_gain = 0;
-	s8	lna_gain_table_0[8] = {17, -1, -13, -29, -32, -35, -38, -41};/*only use lna0/1/2/3/7*/
-	s8	lna_gain_table_1[8] = {29, 20, 12, 3, -6, -15, -24, -33}; /*only use lna3 /7*/
+		for (i = RF_PATH_A; i < PHYDM_MAX_RF_PATH; i++) {
+			if (i == 0)
+				phy_info->rx_mimo_signal_strength[0] = pwdb_all;
+			else
+				phy_info->rx_mimo_signal_strength[i] = 0;
+		}
+	} else { /* @2 is OFDM rate */
 
-	if (p_dm->cut_version >= ODM_CUT_I) /*SMIC*/
-		lna_gain = lna_gain_table_0[LNA_idx];
-	else	 /*TSMC*/
-		lna_gain = lna_gain_table_1[LNA_idx];
+		/* @(1)Get RSSI for HT rate */
 
-	rx_pwr_all = lna_gain - (2 * VGA_idx);
+		for (i = RF_PATH_A; i < dm->num_rf_path; i++) {
+			if (dm->rf_path_rx_enable & BIT(i))
+				rf_rx_num++;
+
+			val_s8 = phy_sts->path_agc[i].gain & 0x3F;
+			rx_pwr[i] = (val_s8 * 2) - 110;
+
+			if (pktinfo->is_to_self)
+				dm->ofdm_agc_idx[i] = val_s8;
+
+			phy_info->rx_pwr[i] = rx_pwr[i];
+			RSSI = phydm_pwr_2_percent(rx_pwr[i]);
+			total_rssi += RSSI;
+
+			phy_info->rx_mimo_signal_strength[i] = (u8)RSSI;
+
+			/* @Get Rx snr value in DB */
+			val_s8 = (s8)(phy_sts->path_rxsnr[i] / 2);
+			phy_info->rx_snr[i] = val_s8;
+
+			/* Record Signal Strength for next packet */
+
+			#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
+			if (i == RF_PATH_A) {
+				if (dm->iot_table.win_patch_id == RT_CID_819X_LENOVO) {
+					phy_info->signal_quality = phydm_sq_patch_lenovo(dm, pktinfo->is_cck_rate, pwdb_all, i, RSSI);
+				} else if (dm->iot_table.win_patch_id == RT_CID_819X_ACER)
+					phy_info->signal_quality = phydm_sq_patch_rt_cid_819x_acer(dm, pktinfo->is_cck_rate, pwdb_all, 0, RSSI);
+			}
+			#endif
+		}
+
+		/* @(2)PWDB, Average PWDB calculated by hardware (for RA) */
+		val_s8 = phy_sts->cck_sig_qual_ofdm_pwdb_all >> 1;
+		rx_pwr_all = (val_s8  & 0x7f) - 110;
+
+		pwdb_all = phydm_pwr_2_percent(rx_pwr_all);
+		pwdb_all_bt = pwdb_all;
+
+		phy_info->rx_pwdb_all = pwdb_all;
+		phy_info->bt_rx_rssi_percentage = pwdb_all_bt;
+		phy_info->rx_power = rx_pwr_all;
+		phy_info->recv_signal_power = rx_pwr_all;
+
+		/* @(3)EVM of HT rate */
+		for (i = 0; i < pktinfo->rate_ss; i++) {
+		/* @Do not use shift operation like "rx_evmX >>= 1"
+		 * because the compilor of free build environment
+		 * fill most significant bit to "zero" when doing shifting
+		 * operation which may change a negative
+		 * value to positive one, then the dbm value
+		 * (which is supposed to be negative) is not correct anymore.
+		 */
+			EVM = phydm_evm_2_percent(phy_sts->stream_rxevm[i]);
+
+			/*@Fill value in RFD, Get the 1st spatial stream only*/
+			if (i == RF_PATH_A)
+				phy_info->signal_quality = (u8)(EVM & 0xff);
+
+			phy_info->rx_mimo_signal_quality[i] = (u8)(EVM & 0xff);
+
+			if (phy_sts->stream_rxevm[i] < 0)
+				evm_tmp = 0 - phy_sts->stream_rxevm[i];
+
+			if (evm_tmp == 64)
+				evm_tmp = 0;
+
+			phy_info->rx_mimo_evm_dbm[i] = (u8)evm_tmp;
+		}
+		phydm_parsing_cfo(dm, pktinfo,
+				  phy_sts->path_cfotail, pktinfo->rate_ss);
+	}
 
-	return	rx_pwr_all;
+	#ifdef CONFIG_PHYDM_ANTENNA_DIVERSITY
+	dm->dm_fat_table.antsel_rx_keep_0 = phy_sts->ant_sel;
+	dm->dm_fat_table.antsel_rx_keep_1 = phy_sts->ant_sel_b;
+	dm->dm_fat_table.antsel_rx_keep_2 = phy_sts->antsel_rx_keep_2;
+	#endif
 }
 #endif
 
-#if (RTL8821C_SUPPORT == 1)
-s8
-phydm_cck_rssi_8821c(
-	struct PHY_DM_STRUCT	*p_dm,
-	u8		LNA_idx,
-	u8		VGA_idx
-)
+#if ODM_IC_11AC_SERIES_SUPPORT
+
+void phydm_rx_physts_bw_parsing(struct phydm_phyinfo_struct *phy_info,
+				struct phydm_perpkt_info_struct *
+				pktinfo,
+				struct phy_status_rpt_8812 *
+				phy_sts)
 {
-	s8	rx_pwr_all = 0;
-	s8	lna_gain = 0;
-	s8	lna_gain_table_0[8] = {22, 8, -6, -22, -31, -40, -46, -52};/*only use lna2/3/5/7*/
-	s8	lna_gain_table_1[16] = {10, 6, 2, -2, -6, -10, -14, -17,
-		-20, -24, -28, -31, -34, -37, -40, -44}; /*only use lna4/8/C/F*/
-
-	if (p_dm->cck_agc_report_type == 0)
-		lna_gain = lna_gain_table_0[LNA_idx];
-	else
-		lna_gain = lna_gain_table_1[LNA_idx];
+	if (pktinfo->data_rate <= ODM_RATE54M) {
+		switch (phy_sts->r_RFMOD) {
+		case 1:
+			if (phy_sts->sub_chnl == 0)
+				phy_info->band_width = 1;
+			else
+				phy_info->band_width = 0;
+			break;
 
-	rx_pwr_all = lna_gain - (2 * VGA_idx);
+		case 2:
+			if (phy_sts->sub_chnl == 0)
+				phy_info->band_width = 2;
+			else if (phy_sts->sub_chnl == 9 ||
+				 phy_sts->sub_chnl == 10)
+				phy_info->band_width = 1;
+			else
+				phy_info->band_width = 0;
+			break;
 
-	return	rx_pwr_all;
+		default:
+		case 0:
+			phy_info->band_width = 0;
+			break;
+		}
+	}
 }
-#endif
 
-#if (ODM_IC_11N_SERIES_SUPPORT == 1)
-void
-phydm_rx_phy_status92c_series_parsing(
-	struct PHY_DM_STRUCT					*p_dm,
-	struct phydm_phyinfo_struct			*p_phy_info,
-	u8						*p_phy_status,
-	struct phydm_perpkt_info_struct			*p_pktinfo
-)
+void phydm_get_sq(struct dm_struct *dm, struct phydm_phyinfo_struct *phy_info,
+		  u8 is_cck_rate)
 {
-	u8				i, max_spatial_stream;
-	s8				rx_pwr[4], rx_pwr_all = 0;
-	u8				EVM, PWDB_ALL = 0, PWDB_ALL_BT;
-	u8				RSSI, total_rssi = 0;
-	boolean				is_cck_rate = false;
-	u8				rf_rx_num = 0;
-	u8				LNA_idx = 0;
-	u8				VGA_idx = 0;
-	u8				cck_agc_rpt;
-	u8				num_ss;
-	u8				stream_rxevm_tmp = 0;
-	struct _phy_status_rpt_8192cd *p_phy_sta_rpt = (struct _phy_status_rpt_8192cd *)p_phy_status;
+	u8 sq = 0;
+	u8 pwdb_all = phy_info->rx_pwdb_all; /*precentage*/
+	#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
+	u8 rssi = phy_info->rx_mimo_signal_strength[0];
+	#endif
 
-	is_cck_rate = (p_pktinfo->data_rate <= ODM_RATE11M) ? true : false;
-	p_dm->rate_ss = phydm_rate_to_num_ss(p_dm, p_pktinfo->data_rate);
+	#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
+	if (dm->iot_table.win_patch_id == RT_CID_819X_LENOVO) {
+		if (is_cck_rate)
+			sq = phydm_sq_patch_lenovo(dm, 1, pwdb_all, 0, 0);
+		else
+			sq = phydm_sq_patch_lenovo(dm, 0, pwdb_all, 0, rssi);
+	} else
+	#endif
+	{
+		if (is_cck_rate) {
+			if (pwdb_all > 40 && !dm->is_in_hct_test) {
+				sq = 100;
+			} else {
+				if (pwdb_all > 64)
+					sq = 0;
+				else if (pwdb_all < 20)
+					sq = 100;
+				else
+					sq = ((64 - pwdb_all) * 100) / 44;
+			}
+		} else {
+			sq = phy_info->rx_mimo_signal_quality[0];
+		}
+	}
 
-	if (p_pktinfo->is_to_self)
-		p_dm->curr_station_id = p_pktinfo->station_id;
+#if 0
+	/* @dbg_print("cck sq = %d\n", sq); */
+#endif
+	phy_info->signal_quality = sq;
+}
 
-	p_phy_info->rx_mimo_signal_quality[RF_PATH_A] = -1;
-	p_phy_info->rx_mimo_signal_quality[RF_PATH_B] = -1;
+void phydm_rx_physts_1st_type(struct dm_struct *dm,
+			      struct phydm_phyinfo_struct *phy_info,
+			      u8 *phy_status_inf,
+			      struct phydm_perpkt_info_struct *pktinfo)
+{
+	u8 i = 0;
+	s8 rx_pwr_db = 0;
+	u8 val = 0; /*tmp value*/
+	s8 val_s8 = 0; /*tmp value*/
+	u8 rssi = 0; /*pre path RSSI*/
+	u8 rf_rx_num = 0;
+	u8 lna_idx = 0, vga_idx = 0;
+	u8 cck_agc_rpt = 0;
+	struct phy_status_rpt_8812 *phy_sts = NULL;
+	#ifdef CONFIG_PHYDM_ANTENNA_DIVERSITY
+	struct phydm_fat_struct *fat_tab = &dm->dm_fat_table;
+	#endif
 
+	phy_sts = (struct phy_status_rpt_8812 *)phy_status_inf;
+	phydm_rx_physts_bw_parsing(phy_info, pktinfo, phy_sts);
+
+	/* @== [CCK rate] ====================================================*/
+	if (pktinfo->is_cck_rate) {
+		cck_agc_rpt = phy_sts->cfosho[0];
+		lna_idx = (cck_agc_rpt & 0xE0) >> 5;
+		vga_idx = cck_agc_rpt & 0x1F;
+
+		rx_pwr_db = phydm_get_cck_rssi(dm, lna_idx, vga_idx);
+		rssi = phydm_pwr_2_percent(rx_pwr_db);
+
+		if (dm->support_ic_type == ODM_RTL8812 &&
+		    !dm->is_cck_high_power) {
+			if (rssi >= 80) {
+				rssi = ((rssi - 80) << 1) +
+					   ((rssi - 80) >> 1) + 80;
+			} else if ((rssi <= 78) && (rssi >= 20)) {
+				rssi += 3;
+			}
+		}
+		dm->cck_lna_idx = lna_idx;
+		dm->cck_vga_idx = vga_idx;
 
-	if (is_cck_rate) {
-		p_dm->phy_dbg_info.num_qry_phy_status_cck++;
-		cck_agc_rpt = p_phy_sta_rpt->cck_agc_rpt_ofdm_cfosho_a;
+		phy_info->rx_pwdb_all = rssi;
+		phy_info->rx_mimo_signal_strength[0] = rssi;
+	} else {
+	/* @== [OFDM rate] ===================================================*/
+		for (i = RF_PATH_A; i < dm->num_rf_path; i++) {
+			/*@[RSSI]*/
+			if (dm->rf_path_rx_enable & BIT(i))
+				rf_rx_num++;
 
-		if (p_dm->support_ic_type & (ODM_RTL8703B)) {
+			if (i < RF_PATH_C)
+				val = phy_sts->gain_trsw[i];
+			else
+				val = phy_sts->gain_trsw_cd[i - 2];
 
-#if (RTL8703B_SUPPORT == 1)
-			if (p_dm->cck_agc_report_type == 1) {  /*4 bit LNA*/
+			phy_info->rx_pwr[i] = (val & 0x7F) - 110;
+			rssi = phydm_pwr_2_percent(phy_info->rx_pwr[i]);
+			phy_info->rx_mimo_signal_strength[i] = rssi;
 
-				u8 cck_agc_rpt_b = (p_phy_sta_rpt->cck_rpt_b_ofdm_cfosho_b & BIT(7)) ? 1 : 0;
+			/*@[SNR]*/
+			if (i < RF_PATH_C)
+				val_s8 = phy_sts->rxsnr[i];
+			else if (dm->support_ic_type & (ODM_RTL8814A))
+				val_s8 = (s8)phy_sts->csi_current[i - 2];
 
-				LNA_idx = (cck_agc_rpt_b << 3) | ((cck_agc_rpt & 0xE0) >> 5);
-				VGA_idx = (cck_agc_rpt & 0x1F);
+			phy_info->rx_snr[i] = val_s8 >> 1;
 
-				rx_pwr_all = phydm_cck_rssi_8703B(LNA_idx, VGA_idx);
+			/*@[CFO_short  & CFO_tail]*/
+			if (i < RF_PATH_C) {
+				val_s8 = phy_sts->cfosho[i];
+				phy_info->cfo_short[i] = phydm_cfo(val_s8);
+				val_s8 = phy_sts->cfotail[i];
+				phy_info->cfo_tail[i] = phydm_cfo(val_s8);
 			}
-#endif
-		} else { /*3 bit LNA*/
 
-			LNA_idx = ((cck_agc_rpt & 0xE0) >> 5);
-			VGA_idx = (cck_agc_rpt & 0x1F);
+			if (i < RF_PATH_C && pktinfo->is_to_self)
+				dm->ofdm_agc_idx[i] = phy_sts->gain_trsw[i];
+		}
 
-			if (p_dm->support_ic_type & (ODM_RTL8188E)) {
+	/* @== [PWDB] ========================================================*/
 
-#if (RTL8188E_SUPPORT == 1)
-				rx_pwr_all = phydm_cck_rssi_8188e(p_dm, LNA_idx, VGA_idx);
-				/**/
-#endif
-			}
-#if (RTL8192E_SUPPORT == 1)
-			else if (p_dm->support_ic_type & (ODM_RTL8192E)) {
+		/*@(Avg PWDB calculated by hardware*/
+		if (!dm->is_mp_chip) /*@8812, 8821*/
+			val = phy_sts->pwdb_all;
+		else
+			val = phy_sts->pwdb_all >> 1; /*old fomula*/
 
-				rx_pwr_all = phydm_cck_rssi_8192e(p_dm, LNA_idx, VGA_idx);
-				/**/
-			}
-#endif
-#if (RTL8723B_SUPPORT == 1)
-			else if (p_dm->support_ic_type & (ODM_RTL8723B)) {
+		rx_pwr_db = (val & 0x7f) - 110;
+		phy_info->rx_pwdb_all = phydm_pwr_2_percent(rx_pwr_db);
 
-				rx_pwr_all = odm_CCKRSSI_8723B(LNA_idx, VGA_idx);
-				/**/
-			}
-#endif
-#if (RTL8188F_SUPPORT == 1)
-			else if (p_dm->support_ic_type & (ODM_RTL8188F)) {
+		/*@(4)EVM of OFDM rate*/
+		for (i = 0; i < pktinfo->rate_ss; i++) {
+			if (!pktinfo->is_cck_rate &&
+			    pktinfo->data_rate <= ODM_RATE54M) {
+				val_s8 = phy_sts->sigevm;
+			} else if (i < RF_PATH_C) {
+				if (phy_sts->rxevm[i] == -128)
+					phy_sts->rxevm[i] = -25;
 
-				rx_pwr_all = odm_CCKRSSI_8188F(LNA_idx, VGA_idx);
-				/**/
-			}
-#endif
-#if (RTL8195A_SUPPORT == 1)
-			else if (p_dm->support_ic_type & (ODM_RTL8195A)) {
+				val_s8 = phy_sts->rxevm[i];
+			} else {
+				if (phy_sts->rxevm_cd[i - 2] == -128)
+					phy_sts->rxevm_cd[i - 2] = -25;
 
-				rx_pwr_all = phydm_cck_rssi_8195a(LNA_idx, VGA_idx);
-				/**/
+				val_s8 = phy_sts->rxevm_cd[i - 2];
 			}
-#endif
+			/*@[EVM to 0~100%]*/
+			val = phydm_evm_2_percent(val_s8);
+			phy_info->rx_mimo_signal_quality[i] = val;
+			/*@[EVM dBm]*/
+			phy_info->rx_mimo_evm_dbm[i] = phydm_evm_dbm(val_s8);
 		}
+		phydm_parsing_cfo(dm, pktinfo,
+				  phy_sts->cfotail, pktinfo->rate_ss);
+	}
 
-		PHYDM_DBG(p_dm, DBG_RSSI_MNTR, ("ext_lna_gain (( %d )), LNA_idx: (( 0x%x )), VGA_idx: (( 0x%x )), rx_pwr_all: (( %d ))\n",
-			p_dm->ext_lna_gain, LNA_idx, VGA_idx, rx_pwr_all));
+	/* @== [General Info] ================================================*/
 
-		if (p_dm->board_type & ODM_BOARD_EXT_LNA)
-			rx_pwr_all -= p_dm->ext_lna_gain;
+	phy_info->rx_power = rx_pwr_db;
+	phy_info->bt_rx_rssi_percentage = phy_info->rx_pwdb_all;
+	phy_info->recv_signal_power = phy_info->rx_power;
+	phydm_get_sq(dm, phy_info, pktinfo->is_cck_rate);
 
-		PWDB_ALL = phydm_query_rx_pwr_percentage(rx_pwr_all);
+	dm->rx_pwdb_ave = dm->rx_pwdb_ave + phy_info->rx_pwdb_all;
 
-		if (p_pktinfo->is_to_self) {
-			p_dm->cck_lna_idx = LNA_idx;
-			p_dm->cck_vga_idx = VGA_idx;
-		}
-		p_phy_info->rx_pwdb_all = PWDB_ALL;
+	#ifdef CONFIG_PHYDM_ANTENNA_DIVERSITY
+	fat_tab->hw_antsw_occur = phy_sts->hw_antsw_occur;
+	dm->dm_fat_table.antsel_rx_keep_0 = phy_sts->antidx_anta;
+	dm->dm_fat_table.antsel_rx_keep_1 = phy_sts->antidx_antb;
+	dm->dm_fat_table.antsel_rx_keep_2 = phy_sts->antidx_antc;
+	dm->dm_fat_table.antsel_rx_keep_3 = phy_sts->antidx_antd;
+	#endif
+}
 
-#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_CE))
-		p_phy_info->bt_rx_rssi_percentage = PWDB_ALL;
-		p_phy_info->recv_signal_power = rx_pwr_all;
 #endif
-		
-		/* (3) Get Signal Quality (EVM) */
-		
-		
-		{
-			u8	SQ;
-#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
-			if (p_dm->iot_table.win_patch_id == RT_CID_819X_LENOVO)
-				SQ = phydm_sq_patch_rt_cid_819x_lenovo(p_dm, is_cck_rate, PWDB_ALL, 0, 0);
-			else if (p_dm->iot_table.win_patch_id == RT_CID_819X_ACER)
-				SQ = phydm_sq_patch_rt_cid_819x_acer(p_dm, is_cck_rate, PWDB_ALL, 0, 0);
-			else
-#endif
-				SQ = phydm_get_signal_quality(p_phy_info, p_dm, p_phy_sta_rpt);
 
-			/* dbg_print("cck SQ = %d\n", SQ); */
-			p_phy_info->signal_quality = SQ;
-			p_phy_info->rx_mimo_signal_quality[RF_PATH_A] = SQ;
-			p_phy_info->rx_mimo_signal_quality[RF_PATH_B] = -1;
-		}
+void phydm_reset_rssi_for_dm(struct dm_struct *dm, u8 station_id)
+{
+	struct cmn_sta_info *sta;
 
-		for (i = RF_PATH_A; i < ODM_RF_PATH_MAX; i++) {
-			if (i == 0)
-				p_phy_info->rx_mimo_signal_strength[0] = PWDB_ALL;
-			else
-				p_phy_info->rx_mimo_signal_strength[1] = 0;
-		}
-	} else { /* 2 is OFDM rate */
-		p_dm->phy_dbg_info.num_qry_phy_status_ofdm++;
+	sta = dm->phydm_sta_info[station_id];
 
-		/*  */
-		/* (1)Get RSSI for HT rate */
-		/*  */
+	if (!is_sta_active(sta))
+		return;
+	PHYDM_DBG(dm, DBG_RSSI_MNTR, "Reset RSSI for macid = (( %d ))\n",
+		  station_id);
+
+	sta->rssi_stat.rssi_cck = -1;
+	sta->rssi_stat.rssi_ofdm = -1;
+	sta->rssi_stat.rssi = -1;
+	sta->rssi_stat.ofdm_pkt_cnt = 0;
+	sta->rssi_stat.cck_pkt_cnt = 0;
+	sta->rssi_stat.cck_sum_power = 0;
+	sta->rssi_stat.is_send_rssi = RA_RSSI_STATE_INIT;
+	sta->rssi_stat.packet_map = 0;
+	sta->rssi_stat.valid_bit = 0;
+}
 
-		for (i = RF_PATH_A; i < ODM_RF_PATH_MAX; i++) {
-			/* 2008/01/30 MH we will judge RF RX path now. */
-			if (p_dm->rf_path_rx_enable & BIT(i))
-				rf_rx_num++;
-			/* else */
-			/* continue; */
+#if (ODM_IC_11N_SERIES_SUPPORT || ODM_IC_11AC_SERIES_SUPPORT)
 
-			rx_pwr[i] = ((p_phy_sta_rpt->path_agc[i].gain & 0x3F) * 2) - 110;
+s32 phydm_get_rssi_8814_ofdm(struct dm_struct *dm, u8 *rssi_in)
+{
+	s32 rssi_avg;
+	u8 rx_count = 0;
+	u64 rssi_linear = 0;
 
-			if (p_pktinfo->is_to_self) {
-				p_dm->ofdm_agc_idx[i] = (p_phy_sta_rpt->path_agc[i].gain & 0x3F);
-				/**/
-			}
+	if (dm->rx_ant_status & BB_PATH_A) {
+		rx_count++;
+		rssi_linear += phydm_db_2_linear(rssi_in[RF_PATH_A]);
+	}
 
-#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_CE))
-			p_phy_info->rx_pwr[i] = rx_pwr[i];
-#endif
+	if (dm->rx_ant_status & BB_PATH_B) {
+		rx_count++;
+		rssi_linear += phydm_db_2_linear(rssi_in[RF_PATH_B]);
+	}
 
-			/* Translate DBM to percentage. */
-			RSSI = phydm_query_rx_pwr_percentage(rx_pwr[i]);
-			total_rssi += RSSI;
-			/* RT_DISP(FRX, RX_PHY_SS, ("RF-%d RXPWR=%x RSSI=%d\n", i, rx_pwr[i], RSSI)); */
+	if (dm->rx_ant_status & BB_PATH_C) {
+		rx_count++;
+		rssi_linear += phydm_db_2_linear(rssi_in[RF_PATH_C]);
+	}
 
-			p_phy_info->rx_mimo_signal_strength[i] = (u8) RSSI;
+	if (dm->rx_ant_status & BB_PATH_D) {
+		rx_count++;
+		rssi_linear += phydm_db_2_linear(rssi_in[RF_PATH_D]);
+	}
 
-			/* Get Rx snr value in DB */
-			p_phy_info->rx_snr[i] = p_dm->phy_dbg_info.rx_snr_db[i] = (s8)(p_phy_sta_rpt->path_rxsnr[i] / 2);
+	/* @Rounding and removing fractional bits */
+	rssi_linear = (rssi_linear + (1 << (FRAC_BITS - 1))) >> FRAC_BITS;
 
-			/* Record Signal Strength for next packet */
+	/* @Calculate average RSSI */
+	switch (rx_count) {
+	case 2:
+		rssi_linear = DIVIDED_2(rssi_linear);
+		break;
+	case 3:
+		rssi_linear = DIVIDED_3(rssi_linear);
+		break;
+	case 4:
+		rssi_linear = DIVIDED_4(rssi_linear);
+		break;
+	}
+	rssi_avg = odm_convert_to_db(rssi_linear);
 
-#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
-			if (i == RF_PATH_A) {
-				if (p_dm->iot_table.win_patch_id == RT_CID_819X_LENOVO) {
-					p_phy_info->signal_quality = phydm_sq_patch_rt_cid_819x_lenovo(p_dm, is_cck_rate, PWDB_ALL, i, RSSI);
-				} else if (p_dm->iot_table.win_patch_id == RT_CID_819X_ACER)
-					p_phy_info->signal_quality = phydm_sq_patch_rt_cid_819x_acer(p_dm, is_cck_rate, PWDB_ALL, 0, RSSI);
-			}
-#endif
-		}
+	return rssi_avg;
+}
 
+void phydm_process_rssi_for_dm(struct dm_struct *dm,
+			       struct phydm_phyinfo_struct *phy_info,
+			       struct phydm_perpkt_info_struct *pktinfo)
+{
+	s32 rssi_ave = 0; /*@average among all paths*/
+	s8 rssi_all = 0; /*@average value of CCK & OFDM*/
+	s8 rssi_cck_tmp = 0, rssi_ofdm_tmp = 0;
+	u8 i = 0;
+	u8 rssi_max = 0, rssi_min = 0;
+	u32 w1 = 0, w2 = 0; /*weighting*/
+	u8 send_rssi_2_fw = 0;
+	u8 *rssi_tmp = NULL;
+	struct cmn_sta_info *sta = NULL;
+	struct rssi_info *rssi_t = NULL;
+	#ifdef CONFIG_PHYDM_ANTENNA_DIVERSITY
+	#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN))
+	struct phydm_fat_struct *fat_tab = &dm->dm_fat_table;
+	#endif
+	#endif
 
-		/*  */
-		/* (2)PWDB, Average PWDB calculated by hardware (for rate adaptive) */
-		/*  */
-		rx_pwr_all = (((p_phy_sta_rpt->cck_sig_qual_ofdm_pwdb_all) >> 1) & 0x7f) - 110;
+	if (pktinfo->station_id >= ODM_ASSOCIATE_ENTRY_NUM)
+		return;
 
-		PWDB_ALL_BT = PWDB_ALL = phydm_query_rx_pwr_percentage(rx_pwr_all);
+	#ifdef CONFIG_S0S1_SW_ANTENNA_DIVERSITY
+	odm_s0s1_sw_ant_div_by_ctrl_frame_process_rssi(dm, phy_info, pktinfo);
+	#endif
 
+	sta = dm->phydm_sta_info[pktinfo->station_id];
 
-		p_phy_info->rx_pwdb_all = PWDB_ALL;
-		/* PHYDM_DBG(p_dm,DBG_RSSI_MNTR, ("ODM OFDM RSSI=%d\n",p_phy_info->rx_pwdb_all)); */
-#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_CE))
-		p_phy_info->bt_rx_rssi_percentage = PWDB_ALL_BT;
-		p_phy_info->rx_power = rx_pwr_all;
-		p_phy_info->recv_signal_power = rx_pwr_all;
-#endif
+	if (!is_sta_active(sta))
+		return;
 
-#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
-		if (p_dm->iot_table.win_patch_id == RT_CID_819X_LENOVO) {
-			/* do nothing */
-		} else if (p_dm->iot_table.win_patch_id == RT_CID_819X_ACER) {
-			/* do nothing */
-		} else 
-#endif
-		{
-			/* (3)EVM of HT rate */
+	rssi_t = &sta->rssi_stat;
 
-			if (p_pktinfo->data_rate >= ODM_RATEMCS8 && p_pktinfo->data_rate <= ODM_RATEMCS15)
-				max_spatial_stream = 2; /* both spatial stream make sense */
-			else
-				max_spatial_stream = 1; /* only spatial stream 1 makes sense */
+	#ifdef CONFIG_PHYDM_ANTENNA_DIVERSITY
+	#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN))
+	if ((dm->support_ability & ODM_BB_ANT_DIV) &&
+	    fat_tab->enable_ctrl_frame_antdiv) {
+		if (pktinfo->is_packet_match_bssid)
+			dm->data_frame_num++;
 
-			for (i = 0; i < max_spatial_stream; i++) {
-				/* Do not use shift operation like "rx_evmX >>= 1" because the compilor of free build environment */
-				/* fill most significant bit to "zero" when doing shifting operation which may change a negative */
-				/* value to positive one, then the dbm value (which is supposed to be negative)  is not correct anymore. */
-				EVM = phydm_evm_db_to_percentage((p_phy_sta_rpt->stream_rxevm[i]));	/* dbm */
+		if (fat_tab->use_ctrl_frame_antdiv) {
+			if (!pktinfo->is_to_self) /*@data frame + CTRL frame*/
+				return;
+		} else {
+			/*@data frame only*/
+			if (!pktinfo->is_packet_match_bssid)
+				return;
+		}
+	} else
+	#endif
+	#endif
+	{
+		if (!pktinfo->is_packet_match_bssid) /*@data frame only*/
+			return;
+	}
 
-				/* GET_RX_STATUS_DESC_RX_MCS(p_desc), p_drv_info->rxevm[i], "%", EVM)); */
+	if (pktinfo->is_packet_beacon) {
+		dm->phy_dbg_info.num_qry_beacon_pkt++;
+		dm->phy_dbg_info.beacon_phy_rate = pktinfo->data_rate;
+	}
+
+	/* @--------------Statistic for antenna/path diversity--------------- */
+	#if (defined(CONFIG_PHYDM_ANTENNA_DIVERSITY))
+	if (dm->support_ability & ODM_BB_ANT_DIV)
+		odm_process_rssi_for_ant_div(dm, phy_info, pktinfo);
+	#endif
 
-				if (i == RF_PATH_A) /* Fill value in RFD, Get the first spatial stream only */
-					p_phy_info->signal_quality = (u8)(EVM & 0xff);
-				
-				p_phy_info->rx_mimo_signal_quality[i] = (u8)(EVM & 0xff);
+	#if (defined(CONFIG_PATH_DIVERSITY))
+	if (dm->support_ability & ODM_BB_PATH_DIV)
+		phydm_process_rssi_for_path_div(dm, phy_info, pktinfo);
+	#endif
+	/* @----------------------------------------------------------------- */
 
-				if (p_phy_sta_rpt->stream_rxevm[i] < 0)
-					stream_rxevm_tmp = (u8)(0 - (p_phy_sta_rpt->stream_rxevm[i]));
+	rssi_cck_tmp = rssi_t->rssi_cck;
+	rssi_ofdm_tmp = rssi_t->rssi_ofdm;
+	rssi_all = rssi_t->rssi;
 
-				if (stream_rxevm_tmp == 64)
-					stream_rxevm_tmp = 0;
+	if (!(pktinfo->is_packet_to_self || pktinfo->is_packet_beacon))
+		return;
 
-				p_phy_info->rx_mimo_evm_dbm[i] = stream_rxevm_tmp;
+	if (!pktinfo->is_cck_rate) {
+/* @=== [ofdm RSSI] ======================================================== */
+		rssi_tmp = phy_info->rx_mimo_signal_strength;
 
+		#if (RTL8814A_SUPPORT == 1)
+		if (dm->support_ic_type & (ODM_RTL8814A)) {
+			rssi_ave = phydm_get_rssi_8814_ofdm(dm, rssi_tmp);
+		} else
+		#endif
+		{
+			if (rssi_tmp[RF_PATH_B] == 0) {
+				rssi_ave = rssi_tmp[RF_PATH_A];
+			} else {
+				if (rssi_tmp[RF_PATH_A] > rssi_tmp[RF_PATH_B]) {
+					rssi_max = rssi_tmp[RF_PATH_A];
+					rssi_min = rssi_tmp[RF_PATH_B];
+				} else {
+					rssi_max = rssi_tmp[RF_PATH_B];
+					rssi_min = rssi_tmp[RF_PATH_A];
+				}
+				if ((rssi_max - rssi_min) < 3)
+					rssi_ave = rssi_max;
+				else if ((rssi_max - rssi_min) < 6)
+					rssi_ave = rssi_max - 1;
+				else if ((rssi_max - rssi_min) < 10)
+					rssi_ave = rssi_max - 2;
+				else
+					rssi_ave = rssi_max - 3;
 			}
 		}
 
-		num_ss = phydm_rate_to_num_ss(p_dm, p_pktinfo->data_rate);
-		odm_parsing_cfo(p_dm, p_pktinfo, p_phy_sta_rpt->path_cfotail, num_ss);
+		/* OFDM MA RSSI */
+		if (rssi_ofdm_tmp <= 0) { /* @initialize */
+			rssi_ofdm_tmp = (s8)phy_info->rx_pwdb_all;
+		} else {
+			rssi_ofdm_tmp = (s8)WEIGHTING_AVG(rssi_ofdm_tmp,
+							  (1 << RSSI_MA) - 1,
+							  rssi_ave, 1);
+			if (phy_info->rx_pwdb_all > (u32)rssi_ofdm_tmp)
+				rssi_ofdm_tmp++;
+		}
 
+		PHYDM_DBG(dm, DBG_RSSI_MNTR, "rssi_ofdm=%d\n", rssi_ofdm_tmp);
+	} else {
+/* @=== [cck RSSI] ========================================================= */
+		rssi_ave = phy_info->rx_pwdb_all;
+
+		if (rssi_t->cck_pkt_cnt <= 63)
+			rssi_t->cck_pkt_cnt++;
+
+		/* @1 Process CCK RSSI */
+		if (rssi_cck_tmp <= 0) { /* @initialize */
+			rssi_cck_tmp = (s8)phy_info->rx_pwdb_all;
+			rssi_t->cck_sum_power = (u16)phy_info->rx_pwdb_all;
+			rssi_t->cck_pkt_cnt = 1; /*reset*/
+			PHYDM_DBG(dm, DBG_RSSI_MNTR, "[1]CCK_INIT\n");
+		} else if (rssi_t->cck_pkt_cnt <= CCK_RSSI_INIT_COUNT) {
+			rssi_t->cck_sum_power = rssi_t->cck_sum_power +
+						(u16)phy_info->rx_pwdb_all;
+
+			rssi_cck_tmp = rssi_t->cck_sum_power /
+				       rssi_t->cck_pkt_cnt;
+
+			PHYDM_DBG(dm, DBG_RSSI_MNTR,
+				  "[2]SumPow=%d, cck_pkt=%d\n",
+				  rssi_t->cck_sum_power, rssi_t->cck_pkt_cnt);
+		} else {
+			rssi_cck_tmp = (s8)WEIGHTING_AVG(rssi_cck_tmp,
+							 (1 << RSSI_MA) - 1,
+							 phy_info->rx_pwdb_all,
+							 1);
+			if (phy_info->rx_pwdb_all > (u32)rssi_cck_tmp)
+				rssi_cck_tmp++;
+		}
+		PHYDM_DBG(dm, DBG_RSSI_MNTR, "rssi_cck=%d\n", rssi_cck_tmp);
 	}
-#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_CE))
-	/* UI BSS List signal strength(in percentage), make it good looking, from 0~100. */
-	/* It is assigned to the BSS List in GetValueFromBeaconOrProbeRsp(). */
-	if (is_cck_rate) {
-#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
-		/* 2012/01/12 MH Use customeris signal strength from HalComRxdDesc.c/ */
-		p_phy_info->signal_strength = SignalScaleProc(p_dm->adapter, PWDB_ALL, true, true);
-#else
-		p_phy_info->signal_strength = (u8)(phydm_signal_scale_mapping(p_dm, PWDB_ALL));/*PWDB_ALL;*/
-#endif /*#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)*/
+
+/* @=== [ofdm + cck weighting RSSI] ========================================= */
+	if (!pktinfo->is_cck_rate) {
+		if (rssi_t->ofdm_pkt_cnt < 8 && !(rssi_t->packet_map & BIT(7)))
+			rssi_t->ofdm_pkt_cnt++; /*OFDM packet cnt in bitmap*/
+
+		rssi_t->packet_map = (rssi_t->packet_map << 1) | BIT(0);
 	} else {
-		if (rf_rx_num != 0) {
-#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
-			/* 2012/01/12 MH Use customeris signal strength from HalComRxdDesc.c/ */
-			p_phy_info->signal_strength = SignalScaleProc(p_dm->adapter, (total_rssi /= rf_rx_num), true, false);
-#else
-			p_phy_info->signal_strength = (u8)(phydm_signal_scale_mapping(p_dm, total_rssi /= rf_rx_num));
-#endif
+		if (rssi_t->ofdm_pkt_cnt > 0 && rssi_t->packet_map & BIT(7))
+			rssi_t->ofdm_pkt_cnt--;
+
+		rssi_t->packet_map = rssi_t->packet_map << 1;
+	}
+
+	if (rssi_t->ofdm_pkt_cnt == 8) {
+		rssi_all = rssi_ofdm_tmp;
+	} else {
+		if (rssi_t->valid_bit < 8)
+			rssi_t->valid_bit++;
+
+		if (rssi_t->valid_bit == 8) {
+			if (rssi_t->ofdm_pkt_cnt > 4)
+				w1 = 64;
+			else
+				w1 = (u32)(rssi_t->ofdm_pkt_cnt << 4);
+
+			w2 = 64 - w1;
+
+			rssi_all = (s8)((w1 * (u32)rssi_ofdm_tmp +
+					 w2 * (u32)rssi_cck_tmp) >> 6);
+		} else if (rssi_t->valid_bit != 0) { /*@(valid_bit > 8)*/
+			w1 = (u32)rssi_t->ofdm_pkt_cnt;
+			w2 = (u32)(rssi_t->valid_bit - rssi_t->ofdm_pkt_cnt);
+			rssi_all = (s8)WEIGHTING_AVG((u32)rssi_ofdm_tmp, w1,
+						     (u32)rssi_cck_tmp, w2);
+		} else {
+			rssi_all = 0;
 		}
 	}
-#endif /*#if (DM_ODM_SUPPORT_TYPE &  (ODM_WIN|ODM_CE))*/
+	PHYDM_DBG(dm, DBG_RSSI_MNTR, "rssi=%d,w1=%d,w2=%d\n", rssi_all, w1, w2);
+
+	if ((rssi_t->ofdm_pkt_cnt >= 1 || rssi_t->cck_pkt_cnt >= 5) &&
+	    rssi_t->is_send_rssi == RA_RSSI_STATE_INIT) {
+		send_rssi_2_fw = 1;
+		rssi_t->is_send_rssi = RA_RSSI_STATE_SEND;
+	}
 
-	/* dbg_print("is_cck_rate = %d, p_phy_info->rx_pwdb_all = %d, p_phy_sta_rpt->cck_agc_rpt_ofdm_cfosho_a = 0x%x\n", */
-	/* is_cck_rate, p_phy_info->rx_pwdb_all, p_phy_sta_rpt->cck_agc_rpt_ofdm_cfosho_a); */
+	rssi_t->rssi_cck = rssi_cck_tmp;
+	rssi_t->rssi_ofdm = rssi_ofdm_tmp;
+	rssi_t->rssi = rssi_all;
 
-	/* For 92C/92D HW (Hybrid) Antenna Diversity */
-#if (defined(CONFIG_PHYDM_ANTENNA_DIVERSITY))
-	/* For 88E HW Antenna Diversity */
-	p_dm->dm_fat_table.antsel_rx_keep_0 = p_phy_sta_rpt->ant_sel;
-	p_dm->dm_fat_table.antsel_rx_keep_1 = p_phy_sta_rpt->ant_sel_b;
-	p_dm->dm_fat_table.antsel_rx_keep_2 = p_phy_sta_rpt->antsel_rx_keep_2;
-#endif
+	if (send_rssi_2_fw) { /* Trigger init rate by RSSI */
+		if (rssi_t->ofdm_pkt_cnt != 0)
+			rssi_t->rssi = rssi_ofdm_tmp;
 
-	if (p_pktinfo->is_packet_match_bssid) {
-		phydm_avg_phystatus_index(p_dm, p_phy_info, p_pktinfo);
-		phydm_rx_statistic_cal(p_dm, p_phy_status, p_pktinfo);
+		PHYDM_DBG(dm, DBG_RSSI_MNTR,
+			  "[Send to FW] PWDB=%d, ofdm_pkt=%d, cck_pkt=%d\n",
+			  rssi_all, rssi_t->ofdm_pkt_cnt, rssi_t->cck_pkt_cnt);
 	}
 
+#if 0
+	/* @dbg_print("ofdm_pkt=%d, weighting=%d\n", ofdm_pkt_cnt, weighting);*/
+	/* @dbg_print("rssi_ofdm_tmp=%d, rssi_all=%d, rssi_cck_tmp=%d\n", */
+	/*	rssi_ofdm_tmp, rssi_all, rssi_cck_tmp); */
+#endif
 }
 #endif
 
-#if	ODM_IC_11AC_SERIES_SUPPORT
-
-void
-phydm_rx_phy_bw_jaguar_series_parsing(
-	struct phydm_phyinfo_struct			*p_phy_info,
-	struct phydm_perpkt_info_struct			*p_pktinfo,
-	struct _phy_status_rpt_8812		*p_phy_sta_rpt
-)
+#ifdef PHYSTS_3RD_TYPE_SUPPORT
+void phydm_print_phystat_jaguar3(struct dm_struct *dm, u8 *phy_sts,
+				 struct phydm_perpkt_info_struct *pktinfo,
+				 struct phydm_phyinfo_struct *phy_info)
 {
+	struct phy_sts_rpt_jgr3_type0 *rpt0 = NULL;
+	struct phy_sts_rpt_jgr3_type1 *rpt1 = NULL;
+	struct phy_sts_rpt_jgr3_type2_3 *rpt2 = NULL;
+	struct phy_sts_rpt_jgr3_type4 *rpt3 = NULL;
+	struct phy_sts_rpt_jgr3_type5 *rpt4 = NULL;
+	struct odm_phy_dbg_info *dbg = &dm->phy_dbg_info;
+	u8 phy_status_page_num = (*phy_sts & 0xf);
+	u32 phy_status_tmp[PHY_STATUS_JRGUAR3_DW_LEN] = {0};
+	u8 i = 0;
+	u32 size = PHY_STATUS_JRGUAR3_DW_LEN << 2;
+
+	rpt0 = (struct phy_sts_rpt_jgr3_type0 *)phy_sts;
+	rpt1 = (struct phy_sts_rpt_jgr3_type1 *)phy_sts;
+	rpt2 = (struct phy_sts_rpt_jgr3_type2_3 *)phy_sts;
+	rpt3 = (struct phy_sts_rpt_jgr3_type4 *)phy_sts;
+	rpt4 = (struct phy_sts_rpt_jgr3_type5 *)phy_sts;
+
+	odm_move_memory(dm, phy_status_tmp, phy_sts, size);
+	if (!(dm->debug_components & DBG_PHY_STATUS))
+		return;
 
-	if (p_pktinfo->data_rate <= ODM_RATE54M) {
-		switch (p_phy_sta_rpt->r_RFMOD) {
-		case 1:
-			if (p_phy_sta_rpt->sub_chnl == 0)
-				p_phy_info->band_width = 1;
-			else
-				p_phy_info->band_width = 0;
-			break;
+	if (dbg->show_phy_sts_all_pkt == 0) {
+		if (!pktinfo->is_packet_match_bssid)
+			return;
+	}
 
-		case 2:
-			if (p_phy_sta_rpt->sub_chnl == 0)
-				p_phy_info->band_width = 2;
-			else if (p_phy_sta_rpt->sub_chnl == 9 || p_phy_sta_rpt->sub_chnl == 10)
-				p_phy_info->band_width = 1;
-			else
-				p_phy_info->band_width = 0;
-			break;
+	dbg->show_phy_sts_cnt++;
 
-		default:
-		case 0:
-			p_phy_info->band_width = 0;
-			break;
-		}
+	if (dbg->show_phy_sts_max_cnt != SHOW_PHY_STATUS_UNLIMITED) {
+		if (dbg->show_phy_sts_cnt > dbg->show_phy_sts_max_cnt)
+			return;
 	}
 
+	if (phy_status_page_num == 0)
+		pr_debug("Phy Status Rpt: CCK\n");
+	else
+		pr_debug("Phy Status Rpt: OFDM_%d\n", phy_status_page_num);
+
+	pr_debug("StaID=%d, RxRate = 0x%x match_bssid=%d\n",
+		 pktinfo->station_id, pktinfo->data_rate,
+		 pktinfo->is_packet_match_bssid);
+
+	for (i = 0; i < PHY_STATUS_JRGUAR3_DW_LEN; i++)
+		pr_debug("Offset[%d:%d] = 0x%x\n",
+			 ((4 * i) + 3), (4 * i), phy_status_tmp[i]);
+
+	if (phy_status_page_num == 0) { /* @CCK(default) */
+		pr_debug("[0] Pkt_cnt=%d, Channel_msb=%d, Pwdb_a=%d, Gain_a=%d, TRSW=%d, AGC_table_b=%d, AGC_table_c=%d,\n",
+			 rpt0->pkt_cnt, rpt0->channel_msb, rpt0->pwdb_a,
+			 rpt0->gain_a, rpt0->trsw, rpt0->agc_table_b,
+			 rpt0->agc_table_c);
+		pr_debug("[4] Path_Sel_o=%d, Gnt_BT_keep_cnt=%d, HW_AntSW_occur_keep_cck=%d,\n Band=%d, Channel=%d, AGC_table_a=%d, l_RXSC=%d, AGC_table_d=%d\n",
+			 rpt0->path_sel_o, rpt0->gnt_bt_keep_cck,
+			 rpt0->hw_antsw_occur_keep_cck, rpt0->band,
+			 rpt0->channel, rpt0->agc_table_a, rpt0->l_rxsc,
+			 rpt0->agc_table_d);
+		pr_debug("[8] AntIdx={%d, %d, %d, %d}, Length=%d\n",
+			 rpt0->antidx_d, rpt0->antidx_c, rpt0->antidx_b,
+			 rpt0->antidx_a, rpt0->length);
+		pr_debug("[12] MF_off=%d, SQloss=%d, lockbit=%d, raterr=%d, rxrate=%d, lna_h_a=%d, CCK_BB_power_a=%d, lna_l_a=%d, vga_a=%d, sq=%d\n",
+			 rpt0->mf_off, rpt0->sqloss, rpt0->lockbit,
+			 rpt0->raterr, rpt0->rxrate, rpt0->lna_h_a,
+			 rpt0->bb_power_a, rpt0->lna_l_a, rpt0->vga_a,
+			 rpt0->signal_quality);
+		pr_debug("[16] Gain_b=%d, lna_h_b=%d, CCK_BB_power_b=%d, lna_l_b=%d, vga_b=%d, Pwdb_b=%d\n",
+			 rpt0->gain_b, rpt0->lna_h_b, rpt0->bb_power_b,
+			 rpt0->lna_l_b, rpt0->vga_b, rpt0->pwdb_b);
+		pr_debug("[20] Gain_c=%d, lna_h_c=%d, CCK_BB_power_c=%d, lna_l_c=%d, vga_c=%d, Pwdb_c=%d\n",
+			 rpt0->gain_c, rpt0->lna_h_c, rpt0->bb_power_c,
+			 rpt0->lna_l_c, rpt0->vga_c, rpt0->pwdb_c);
+		pr_debug("[24] Gain_d=%d, lna_h_d=%d, CCK_BB_power_d=%d, lna_l_d=%d, vga_d=%d, Pwdb_d=%d\n",
+			 rpt0->gain_c, rpt0->lna_h_c, rpt0->bb_power_c,
+			 rpt0->lna_l_c, rpt0->vga_c, rpt0->pwdb_c);
+	} else if (phy_status_page_num == 1) {
+		pr_debug("[0] pwdb[C:A]={%d, %d, %d}, Channel_pri_msb=%d, Pkt_cnt=%d,\n",
+			 rpt1->pwdb_c, rpt1->pwdb_b, rpt1->pwdb_a,
+			 rpt1->channel_pri_msb, rpt1->pkt_cnt);
+		pr_debug("[4] BF: %d, stbc=%d, ldpc=%d, gnt_bt=%d, band=%d, Ch_pri_lsb=%d, rxsc[ht, l]={%d, %d}, pwdb[D]=%d\n",
+			 rpt1->beamformed, rpt1->stbc, rpt1->ldpc, rpt1->gnt_bt,
+			 rpt1->band, rpt1->channel_pri_lsb, rpt1->ht_rxsc,
+			 rpt1->l_rxsc, rpt1->pwdb_d);
+		pr_debug("[8] AntIdx[D:A]={%d, %d, %d, %d}, HW_AntSW_occur[D:A]={%d, %d, %d, %d}, Channel_sec[msb,lsb]={%d, %d}\n",
+			 rpt1->antidx_d, rpt1->antidx_c,
+			 rpt1->antidx_b, rpt1->antidx_a,
+			 rpt1->hw_antsw_occur_d, rpt1->hw_antsw_occur_c,
+			 rpt1->hw_antsw_occur_b, rpt1->hw_antsw_occur_a,
+			 rpt1->channel_sec_msb, rpt1->channel_sec_lsb);
+		pr_debug("[12] GID=%d, PAID[msb,lsb]={%d,%d}\n",
+			 rpt1->gid, rpt1->paid_msb, rpt1->paid);
+		pr_debug("[16] RX_EVM[D:A]={%d, %d, %d, %d}\n",
+			 rpt1->rxevm[3], rpt1->rxevm[2],
+			 rpt1->rxevm[1], rpt1->rxevm[0]);
+		pr_debug("[20] CFO_tail[D:A]={%d, %d, %d, %d}\n",
+			 rpt1->cfo_tail[3], rpt1->cfo_tail[2],
+			 rpt1->cfo_tail[1], rpt1->cfo_tail[0]);
+		pr_debug("[24] RX_SNR[D:A]={%d, %d, %d, %d}\n\n",
+			 rpt1->rxsnr[3], rpt1->rxsnr[2],
+			 rpt1->rxsnr[1], rpt1->rxsnr[0]);
+	} else if (phy_status_page_num == 2 || phy_status_page_num == 3) {
+		pr_debug("[0] pwdb[C:A]={%d, %d, %d}, Channel_mdb=%d, Pkt_cnt=%d\n",
+			 rpt2->pwdb[2], rpt2->pwdb[1], rpt2->pwdb[0],
+			 rpt2->channel_msb, rpt2->pkt_cnt);
+		pr_debug("[4] BF=%d, STBC=%d, LDPC=%d, Gnt_BT=%d, band=%d, CH_lsb=%d, rxsc[ht, l]={%d, %d}, pwdb_D=%d\n",
+			 rpt2->beamformed, rpt2->stbc, rpt2->ldpc, rpt2->gnt_bt,
+			 rpt2->band, rpt2->channel_lsb,
+			 rpt2->ht_rxsc, rpt2->l_rxsc, rpt2->pwdb[3]);
+		pr_debug("[8] AgcTab[D:A]={%d, %d, %d, %d}, pwed_th=%d, shift_l_map=%d\n",
+			 rpt2->agc_table_d, rpt2->agc_table_c,
+			 rpt2->agc_table_b, rpt2->agc_table_a,
+			 rpt2->pwed_th, rpt2->shift_l_map);
+		pr_debug("[12] AvgNoisePowerdB=%d, mp_gain_c[msb, lsb]={%d, %d}, mp_gain_b[msb, lsb]={%d, %d}, mp_gain_a=%d, cnt_cca2agc_rdy=%d\n",
+			 rpt2->avg_noise_pwr_lsb, rpt2->mp_gain_c_msb,
+			 rpt2->mp_gain_c_lsb, rpt2->mp_gain_b_msb,
+			 rpt2->mp_gain_b_lsb, rpt2->mp_gain_a,
+			 rpt2->cnt_cca2agc_rdy);
+		pr_debug("[16] HT AAGC gain[B:A]={%d, %d}, AAGC step[D:A]={%d, %d, %d, %d}, IsFreqSelectFadimg=%d, mp_gain_d=%d\n",
+			 rpt2->ht_aagc_gain[1], rpt2->ht_aagc_gain[0],
+			 rpt2->aagc_step_d, rpt2->aagc_step_c,
+			 rpt2->aagc_step_b, rpt2->aagc_step_a,
+			 rpt2->is_freq_select_fading, rpt2->mp_gain_d);
+		pr_debug("[20] DAGC gain ant[B:A]={%d, %d}, HT AAGC gain[D:C]={%d, %d}\n",
+			 rpt2->dagc_gain[1], rpt2->dagc_gain[0],
+			 rpt2->ht_aagc_gain[3], rpt2->ht_aagc_gain[2]);
+		pr_debug("[24] AvgNoisePwerdB=%d, syn_count[msb, lsb]={%d, %d}, counter=%d, DAGC gain ant[D:C]={%d, %d}\n",
+			 rpt2->avg_noise_pwr_msb, rpt2->syn_count_msb,
+			 rpt2->syn_count_lsb, rpt2->counter,
+			 rpt2->dagc_gain[3], rpt2->dagc_gain[2]);
+	} else if (phy_status_page_num == 4) { /*type 4*/
+		pr_debug("[0] pwdb[C:A]={%d, %d, %d}, Channel_mdb=%d, Pkt_cnt=%d\n",
+			 rpt3->pwdb[2], rpt3->pwdb[1], rpt3->pwdb[0],
+			 rpt3->channel_msb, rpt3->pkt_cnt);
+		pr_debug("[4] BF=%d, STBC=%d, LDPC=%d, GNT_BT=%d, band=%d, CH_pri=%d, rxsc[ht, l]={%d, %d}, pwdb_D=%d\n",
+			 rpt3->beamformed, rpt3->stbc, rpt3->ldpc, rpt3->gnt_bt,
+			 rpt3->band, rpt3->channel_lsb, rpt3->ht_rxsc,
+			 rpt3->l_rxsc, rpt3->pwdb[3]);
+		pr_debug("[8] AntIdx[D:A]={%d, %d, %d, %d}, HW_AntSW_occur[D:A]={%d, %d, %d, %d}, Training_done[D:A]={%d, %d, %d, %d},\n    BadToneCnt_CN_excess_0=%d, BadToneCnt_min_eign_0=%d\n",
+			 rpt3->antidx_d, rpt3->antidx_c,
+			 rpt3->antidx_b, rpt3->antidx_a,
+			 rpt3->hw_antsw_occur_d, rpt3->hw_antsw_occur_c,
+			 rpt3->hw_antsw_occur_b, rpt3->hw_antsw_occur_a,
+			 rpt3->training_done_d, rpt3->training_done_c,
+			 rpt3->training_done_b, rpt3->training_done_a,
+			 rpt3->bad_tone_cnt_cn_excess_0,
+			 rpt3->bad_tone_cnt_min_eign_0);
+		pr_debug("[12] avg_cond_num_1_msb=%d, avg_cond_num_1_lsb=%d, avg_cond_num_0=%d, bad_tone_cnt_cn_excess_1=%d,\n     bad_tone_cnt_min_eign_1=%d, Tx_pkt_cnt=%d\n",
+			 rpt3->avg_cond_num_1_msb, rpt3->avg_cond_num_1_lsb,
+			 rpt3->avg_cond_num_0, rpt3->bad_tone_cnt_cn_excess_1,
+			 rpt3->bad_tone_cnt_min_eign_1, rpt3->tx_pkt_cnt);
+		pr_debug("[16] Stream RXEVM[D:A]={%d, %d, %d, %d}\n",
+			 rpt3->rxevm[3], rpt3->rxevm[2],
+			 rpt3->rxevm[1], rpt3->rxevm[0]);
+		pr_debug("[20] Eigenvalue[D:A]={%d, %d, %d, %d}\n",
+			 rpt3->eigenvalue[3], rpt3->eigenvalue[2],
+			 rpt3->eigenvalue[1], rpt3->eigenvalue[0]);
+		pr_debug("[24] RX SNR[D:A]={%d, %d, %d, %d}\n",
+			 rpt3->rxsnr[3], rpt3->rxsnr[2],
+			 rpt3->rxsnr[1], rpt3->rxsnr[0]);
+	} else if (phy_status_page_num == 5) { /*type 5*/
+		pr_debug("[0] pwdb[C:A]={%d, %d, %d}, Channel_mdb=%d, Pkt_cnt=%d\n",
+			 rpt4->pwdb[2], rpt4->pwdb[1], rpt4->pwdb[0],
+			 rpt4->channel_msb, rpt4->pkt_cnt);
+		pr_debug("[4] BF=%d, STBC=%d, LDPC=%d, GNT_BT=%d, band=%d, CH_pri=%d, rxsc[ht, l]={%d, %d}, pwdb_D=%d\n",
+			 rpt4->beamformed, rpt4->stbc, rpt4->ldpc, rpt4->gnt_bt,
+			 rpt4->band, rpt4->channel_lsb, rpt4->ht_rxsc,
+			 rpt4->l_rxsc, rpt4->pwdb[3]);
+		pr_debug("[8] AntIdx[D:A]={%d, %d, %d, %d}, HW_AntSW_occur[D:A]={%d, %d, %d, %d}\n",
+			 rpt4->antidx_d, rpt4->antidx_c,
+			 rpt4->antidx_b, rpt4->antidx_a,
+			 rpt4->hw_antsw_occur_d, rpt4->hw_antsw_occur_c,
+			 rpt4->hw_antsw_occur_b, rpt4->hw_antsw_occur_a);
+		pr_debug("[12] Inf_posD[1,0]={%d, %d}, Inf_posC[1,0]={%d, %d}, Inf_posB[1,0]={%d, %d}, Inf_posA[1,0]={%d, %d}, Tx_pkt_cnt=%d\n",
+			 rpt4->inf_pos_1_D_flg, rpt4->inf_pos_0_D_flg,
+			 rpt4->inf_pos_1_C_flg, rpt4->inf_pos_0_C_flg,
+			 rpt4->inf_pos_1_B_flg, rpt4->inf_pos_0_B_flg,
+			 rpt4->inf_pos_1_A_flg, rpt4->inf_pos_0_A_flg,
+			 rpt4->tx_pkt_cnt);
+		pr_debug("[16] Inf_pos_B[1,0]={%d, %d}, Inf_pos_A[1,0]={%d, %d}\n",
+			 rpt4->inf_pos_1_b, rpt4->inf_pos_0_b,
+			 rpt4->inf_pos_1_a, rpt4->inf_pos_0_a);
+		pr_debug("[20] Inf_pos_D[1,0]={%d, %d}, Inf_pos_C[1,0]={%d, %d}\n",
+			 rpt4->inf_pos_1_d, rpt4->inf_pos_0_d,
+			 rpt4->inf_pos_1_c, rpt4->inf_pos_0_c);
+	}
 }
 
-void
-phydm_rx_phy_status_jaguar_series_parsing(
-	struct PHY_DM_STRUCT		*p_dm,
-	struct phydm_phyinfo_struct	*p_phy_info,
-	u8							*p_phy_status,
-	struct phydm_perpkt_info_struct		*p_pktinfo
-)
+void phydm_reset_phy_info_3rd(struct dm_struct *phydm,
+			      struct phydm_phyinfo_struct *phy_info)
 {
-	u8					i, max_spatial_stream;
-	s8					rx_pwr[4], rx_pwr_all = 0;
-	u8					EVM = 0, evm_dbm, PWDB_ALL = 0, PWDB_ALL_BT;
-	u8					RSSI, avg_rssi = 0, best_rssi = 0, second_rssi = 0;
-	u8					is_cck_rate = 0;
-	u8					rf_rx_num = 0;
-	u8					cck_highpwr = 0;
-	u8					LNA_idx, VGA_idx;
-	struct _phy_status_rpt_8812 *p_phy_sta_rpt = (struct _phy_status_rpt_8812 *)p_phy_status;
-	struct phydm_fat_struct					*p_dm_fat_table = &p_dm->dm_fat_table;
-	u8					num_ss;
-
-	phydm_rx_phy_bw_jaguar_series_parsing(p_phy_info, p_pktinfo, p_phy_sta_rpt);
-
-	is_cck_rate = (p_pktinfo->data_rate <= ODM_RATE11M) ? true : false;
-	p_dm->rate_ss = phydm_rate_to_num_ss(p_dm, p_pktinfo->data_rate);
-
-	if (p_pktinfo->is_to_self)
-		p_dm->curr_station_id = p_pktinfo->station_id;
-	else
-		p_dm->curr_station_id = 0xff;
+	phy_info->rx_pwdb_all = 0;
+	phy_info->signal_quality = 0;
+	phy_info->band_width = 0;
+	phy_info->rx_count = 0;
+	odm_memory_set(phydm, phy_info->rx_mimo_signal_quality, 0, 4);
+	odm_memory_set(phydm, phy_info->rx_mimo_signal_strength, 0, 4);
+	odm_memory_set(phydm, phy_info->rx_snr, 0, 4);
+
+	phy_info->rx_power = -110;
+	phy_info->recv_signal_power = -110;
+	phy_info->bt_rx_rssi_percentage = 0;
+	phy_info->signal_strength = 0;
+	phy_info->channel = 0;
+	phy_info->is_mu_packet = 0;
+	phy_info->is_beamformed = 0;
+	phy_info->rxsc = 0;
+	odm_memory_set(phydm, phy_info->rx_pwr, -110, 4);
+	odm_memory_set(phydm, phy_info->cfo_short, 0, 8);
+	odm_memory_set(phydm, phy_info->cfo_tail, 0, 8);
+
+	odm_memory_set(phydm, phy_info->rx_mimo_evm_dbm, 0, 4);
+}
 
-	p_phy_info->rx_mimo_signal_quality[RF_PATH_A] = -1;
-	p_phy_info->rx_mimo_signal_quality[RF_PATH_B] = -1;
-	p_phy_info->rx_mimo_signal_quality[RF_PATH_C] = -1;
-	p_phy_info->rx_mimo_signal_quality[RF_PATH_D] = -1;
+void phydm_per_path_info_3rd(u8 rx_path, s8 pwr, s8 rx_evm, s8 cfo_tail,
+			     s8 rx_snr, struct phydm_phyinfo_struct *phy_info)
+{
+	u8 evm_dbm = 0;
+	u8 evm_percentage = 0;
 
-	if (is_cck_rate) {
-		u8 cck_agc_rpt;
+	/* SNR is S(8,1), EVM is S(8,1), CFO is S(8,7) */
 
-		p_dm->phy_dbg_info.num_qry_phy_status_cck++;
+	if (rx_evm < 0) {
+		/* @Calculate EVM in dBm */
+		evm_dbm = ((u8)(0 - rx_evm) >> 1);
 
-		/*(1)Hardware does not provide RSSI for CCK*/
-		/*(2)PWDB, Average PWDB calculated by hardware (for rate adaptive)*/
+		if (evm_dbm == 64)
+			evm_dbm = 0; /*@if 1SS rate, evm_dbm [2nd stream] =64*/
 
-		/*if(p_hal_data->e_rf_power_state == e_rf_on)*/
-		cck_highpwr = p_dm->is_cck_high_power;
-		/*else*/
-		/*cck_highpwr = false;*/
+		if (evm_dbm != 0) {
+			/* @Convert EVM to 0%~100% percentage */
+			if (evm_dbm >= 34)
+				evm_percentage = 100;
+			else
+				evm_percentage = (evm_dbm << 1) + (evm_dbm);
+		}
+	}
 
-		cck_agc_rpt = p_phy_sta_rpt->cfosho[0];
-		LNA_idx = ((cck_agc_rpt & 0xE0) >> 5);
-		VGA_idx = (cck_agc_rpt & 0x1F);
+	phy_info->rx_pwr[rx_path] = pwr;
 
-		if (p_dm->support_ic_type == ODM_RTL8812) {
-			switch (LNA_idx) {
-			case 7:
-				if (VGA_idx <= 27)
-					rx_pwr_all = -100 + 2 * (27 - VGA_idx); /*VGA_idx = 27~2*/
-				else
-					rx_pwr_all = -100;
-				break;
-			case 6:
-				rx_pwr_all = -48 + 2 * (2 - VGA_idx); /*VGA_idx = 2~0*/
-				break;
-			case 5:
-				rx_pwr_all = -42 + 2 * (7 - VGA_idx); /*VGA_idx = 7~5*/
-				break;
-			case 4:
-				rx_pwr_all = -36 + 2 * (7 - VGA_idx); /*VGA_idx = 7~4*/
-				break;
-			case 3:
-				/*rx_pwr_all = -28 + 2*(7-VGA_idx); VGA_idx = 7~0*/
-				rx_pwr_all = -24 + 2 * (7 - VGA_idx); /*VGA_idx = 7~0*/
-				break;
-			case 2:
-				if (cck_highpwr)
-					rx_pwr_all = -12 + 2 * (5 - VGA_idx); /*VGA_idx = 5~0*/
-				else
-					rx_pwr_all = -6 + 2 * (5 - VGA_idx);
-				break;
-			case 1:
-				rx_pwr_all = 8 - 2 * VGA_idx;
-				break;
-			case 0:
-				rx_pwr_all = 14 - 2 * VGA_idx;
-				break;
-			default:
-				/*dbg_print("CCK Exception default\n");*/
-				break;
-			}
-			rx_pwr_all += 6;
-			PWDB_ALL = phydm_query_rx_pwr_percentage(rx_pwr_all);
-
-			if (cck_highpwr == false) {
-				if (PWDB_ALL >= 80)
-					PWDB_ALL = ((PWDB_ALL - 80) << 1) + ((PWDB_ALL - 80) >> 1) + 80;
-				else if ((PWDB_ALL <= 78) && (PWDB_ALL >= 20))
-					PWDB_ALL += 3;
-				if (PWDB_ALL > 100)
-					PWDB_ALL = 100;
-			}
-		} else if (p_dm->support_ic_type & (ODM_RTL8821 | ODM_RTL8881A)) {
-			s8 pout = -6;
+	/*@CFO(kHz) = CFO_tail * 312.5(kHz) / 2^7 ~= CFO tail * 5/2 (kHz)*/
+	phy_info->cfo_tail[rx_path] = (cfo_tail * 5) >> 1;
+	phy_info->rx_mimo_evm_dbm[rx_path] = evm_dbm;
+	phy_info->rx_mimo_signal_strength[rx_path] = phydm_pwr_2_percent(pwr);
+	phy_info->rx_mimo_signal_quality[rx_path] = evm_percentage;
+	phy_info->rx_snr[rx_path] = rx_snr >> 1;
+}
 
-			switch (LNA_idx) {
-			case 5:
-				rx_pwr_all = pout - 32 - (2 * VGA_idx);
-				break;
-			case 4:
-				rx_pwr_all = pout - 24 - (2 * VGA_idx);
-				break;
-			case 2:
-				rx_pwr_all = pout - 11 - (2 * VGA_idx);
-				break;
-			case 1:
-				rx_pwr_all = pout + 5 - (2 * VGA_idx);
-				break;
-			case 0:
-				rx_pwr_all = pout + 21 - (2 * VGA_idx);
-				break;
-			}
-			PWDB_ALL = phydm_query_rx_pwr_percentage(rx_pwr_all);
-		} else if (p_dm->support_ic_type == ODM_RTL8814A || p_dm->support_ic_type == ODM_RTL8822B) {
-			s8 pout = -6;
-
-			switch (LNA_idx) {
-			/*CCK only use LNA: 2, 3, 5, 7*/
-			case 7:
-				rx_pwr_all = pout - 32 - (2 * VGA_idx);
-				break;
-			case 5:
-				rx_pwr_all = pout - 22 - (2 * VGA_idx);
-				break;
-			case 3:
-				rx_pwr_all = pout - 2 - (2 * VGA_idx);
-				break;
-			case 2:
-				rx_pwr_all = pout + 5 - (2 * VGA_idx);
-				break;
-			/*case 6:*/
-			/*rx_pwr_all = pout -26 - (2*VGA_idx);*/
-			/*break;*/
-			/*case 4:*/
-			/*rx_pwr_all = pout - 8 - (2*VGA_idx);*/
-			/*break;*/
-			/*case 1:*/
-			/*rx_pwr_all = pout + 21 - (2*VGA_idx);*/
-			/*break;*/
-			/*case 0:*/
-			/*rx_pwr_all = pout + 10 - (2*VGA_idx);*/
-			/*	break; */
-			default:
-				/* dbg_print("CCK Exception default\n"); */
-				break;
-			}
-			PWDB_ALL = phydm_query_rx_pwr_percentage(rx_pwr_all);
-		}
+void phydm_common_phy_info_3rd(s8 rx_power, u8 channel, boolean is_beamformed,
+			       boolean is_mu_packet, u8 bandwidth,
+			       u8 signal_quality, u8 rxsc,
+			       struct phydm_phyinfo_struct *phy_info)
+{
+	phy_info->rx_power = rx_power; /* RSSI in dB */
+	phy_info->recv_signal_power = rx_power; /* RSSI in dB */
+	phy_info->channel = channel; /* @channel number */
+	phy_info->is_beamformed = is_beamformed; /* @apply BF */
+	phy_info->is_mu_packet = is_mu_packet; /* @MU packet */
+	phy_info->rxsc = rxsc;
 
-		p_dm->cck_lna_idx = LNA_idx;
-		p_dm->cck_vga_idx = VGA_idx;
-		p_phy_info->rx_pwdb_all = PWDB_ALL;
-		/* if(p_pktinfo->station_id == 0) */
-		/* { */
-		/*	dbg_print("CCK: LNA_idx = %d, VGA_idx = %d, p_phy_info->rx_pwdb_all = %d\n", */
-		/*		LNA_idx, VGA_idx, p_phy_info->rx_pwdb_all); */
-		/* } */
-#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_CE))
-		p_phy_info->bt_rx_rssi_percentage = PWDB_ALL;
-		p_phy_info->recv_signal_power = rx_pwr_all;
-#endif
-		/*(3) Get Signal Quality (EVM)*/
-		/*if (p_pktinfo->is_packet_match_bssid)*/
-		{
-			u8	SQ, SQ_rpt;
+	phy_info->rx_pwdb_all = phydm_pwr_2_percent(rx_power); /*percentage */
+	phy_info->signal_quality = signal_quality; /* signal quality */
+	phy_info->band_width = bandwidth; /* @bandwidth */
 
-#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
-			if (p_dm->iot_table.win_patch_id == RT_CID_819X_LENOVO)
-				SQ = phydm_sq_patch_rt_cid_819x_lenovo(p_dm, is_cck_rate, PWDB_ALL, 0, 0);
-			else 
+#if 0
+	/* @if (pktinfo->is_packet_match_bssid) */
+	{
+		dbg_print("rx_pwdb_all = %d, rx_power = %d, recv_signal_power = %d\n", phy_info->rx_pwdb_all, phy_info->rx_power, phy_info->recv_signal_power);
+		dbg_print("signal_quality = %d\n", phy_info->signal_quality);
+		dbg_print("is_beamformed = %d, is_mu_packet = %d, rx_count = %d\n", phy_info->is_beamformed, phy_info->is_mu_packet, phy_info->rx_count + 1);
+		dbg_print("channel = %d, rxsc = %d, band_width = %d\n", channel, rxsc, bandwidth);
+	}
 #endif
-			if (p_phy_info->rx_pwdb_all > 40 && !p_dm->is_in_hct_test)
-				SQ = 100;
-			else {
-				SQ_rpt = p_phy_sta_rpt->pwdb_all;
-
-				if (SQ_rpt > 64)
-					SQ = 0;
-				else if (SQ_rpt < 20)
-					SQ = 100;
-				else
-					SQ = ((64 - SQ_rpt) * 100) / 44;
-			}
+}
 
-			/* dbg_print("cck SQ = %d\n", SQ); */
-			p_phy_info->signal_quality = SQ;
-			p_phy_info->rx_mimo_signal_quality[RF_PATH_A] = SQ;
-		}
+void phydm_get_physts_jarguar3_0(struct dm_struct *dm, u8 *phy_status_inf,
+				 struct phydm_perpkt_info_struct *pktinfo,
+				 struct phydm_phyinfo_struct *phy_info)
+{
+	/* type 0 is used for cck packet */
+	struct phy_sts_rpt_jgr3_type0 *phy_sts = NULL;
+	struct odm_phy_dbg_info *dbg_i = &dm->phy_dbg_info;
+	u8 sq = 0, i;
+	s8 rx_power[4];
+	s8 rx_pwr_db_max = -120;
+
+	phy_sts = (struct phy_sts_rpt_jgr3_type0 *)phy_status_inf;
+
+	/* Setting the RX power: agc_idx -110 dBm*/
+	rx_power[0] = phy_sts->pwdb_a - 110;
+	rx_power[1] = phy_sts->pwdb_b - 110;
+	rx_power[2] = phy_sts->pwdb_c - 110;
+	rx_power[3] = phy_sts->pwdb_d - 110;
+
+	for (i = RF_PATH_A; i < PHYDM_MAX_RF_PATH; i++) {
+		if (rx_power[i] > rx_pwr_db_max)
+			rx_pwr_db_max = rx_power[0];   /*only one path*/
+	}
+	if (pktinfo->is_to_self) {
+		dm->ofdm_agc_idx[0] = phy_sts->pwdb_a;
+		dm->ofdm_agc_idx[1] = phy_sts->pwdb_b;
+		dm->ofdm_agc_idx[2] = phy_sts->pwdb_c;
+		dm->ofdm_agc_idx[3] = phy_sts->pwdb_d;
+	}
 
-		for (i = RF_PATH_A; i < ODM_RF_PATH_MAX_JAGUAR; i++) {
-			if (i == 0)
-				p_phy_info->rx_mimo_signal_strength[0] = PWDB_ALL;
-			else
-				p_phy_info->rx_mimo_signal_strength[i] = 0;
-		}
+	/* @Calculate Signal Quality*/
+	if (phy_sts->signal_quality >= 64) {
+		sq = 0;
+	} else if (phy_sts->signal_quality <= 20) {
+		sq = 100;
 	} else {
-		/*is OFDM rate*/
-		p_dm_fat_table->hw_antsw_occur = p_phy_sta_rpt->hw_antsw_occur;
+		/* @mapping to 2~99% */
+		sq = 64 - phy_sts->signal_quality;
+		sq = ((sq << 3) + sq) >> 2;
+	}
 
-		p_dm->phy_dbg_info.num_qry_phy_status_ofdm++;
+	/* @Modify CCK PWDB if old AGC */
+	if (!dm->cck_new_agc) {
+		u8 lna_idx[4], vga_idx[4];
+
+		lna_idx[0] = ((phy_sts->lna_h_a << 3) | phy_sts->lna_l_a);
+		vga_idx[0] = phy_sts->vga_a;
+		lna_idx[1] = ((phy_sts->lna_h_b << 3) | phy_sts->lna_l_b);
+		vga_idx[1] = phy_sts->vga_b;
+		lna_idx[2] = ((phy_sts->lna_h_c << 3) | phy_sts->lna_l_c);
+		vga_idx[2] = phy_sts->vga_c;
+		lna_idx[3] = ((phy_sts->lna_h_d << 3) | phy_sts->lna_l_d);
+		vga_idx[3] = phy_sts->vga_d;
+		#if (RTL8198F_SUPPORT)
+			/*phydm_cck_rssi_8198f*/
+		#endif
+	}
 
-		/*(1)Get RSSI for OFDM rate*/
+	/*@CCK no STBC and LDPC*/
+	dbg_i->is_ldpc_pkt = false;
+	dbg_i->is_stbc_pkt = false;
 
-		for (i = RF_PATH_A; i < ODM_RF_PATH_MAX_JAGUAR; i++) {
-			/*2008/01/30 MH we will judge RF RX path now.*/
-			/* dbg_print("p_dm->rf_path_rx_enable = %x\n", p_dm->rf_path_rx_enable); */
-			if (p_dm->rf_path_rx_enable & BIT(i))
-				rf_rx_num++;
-			/* else */
-			/* continue; */
-			/*2012.05.25 LukeLee: Testchip AGC report is wrong, it should be restored back to old formula in MP chip*/
-			/* if((p_dm->support_ic_type & (ODM_RTL8812|ODM_RTL8821)) && (!p_dm->is_mp_chip)) */
-			if (i < RF_PATH_C) {
-				rx_pwr[i] = (p_phy_sta_rpt->gain_trsw[i] & 0x7F) - 110;
+	/* Update Common information */
+	phydm_common_phy_info_3rd(rx_pwr_db_max, phy_sts->channel, false,
+				  false, CHANNEL_WIDTH_20, sq,
+				  phy_sts->l_rxsc, phy_info);
 
-				if (p_pktinfo->is_to_self)
-					p_dm->ofdm_agc_idx[i] = p_phy_sta_rpt->gain_trsw[i];
+	/* Update CCK pwdb */
+	/* Update per-path information */
+	for (i = RF_PATH_A; i < PHYDM_MAX_RF_PATH; i++)
+		phydm_per_path_info_3rd(i, rx_power[i], 0, 0, 0, phy_info);
+
+	#ifdef CONFIG_PHYDM_ANTENNA_DIVERSITY
+	dm->dm_fat_table.antsel_rx_keep_0 = phy_sts->antidx_a;
+	dm->dm_fat_table.antsel_rx_keep_1 = phy_sts->antidx_b;
+	dm->dm_fat_table.antsel_rx_keep_2 = phy_sts->antidx_c;
+	dm->dm_fat_table.antsel_rx_keep_3 = phy_sts->antidx_d;
+	#endif
+}
 
-			} else
-				rx_pwr[i] = (p_phy_sta_rpt->gain_trsw_cd[i - 2] & 0x7F) - 110;
-			/* else */
-			/*rx_pwr[i] = ((p_phy_sta_rpt->gain_trsw[i]& 0x3F)*2) - 110;  OLD FORMULA*/
+void phydm_get_physts_jarguar3_1(struct dm_struct *dm, u8 *phy_status_inf,
+				 struct phydm_perpkt_info_struct *pktinfo,
+				 struct phydm_phyinfo_struct *phy_info)
+{
+	/* type 1 is used for ofdm packet */
+	struct phy_sts_rpt_jgr3_type1 *phy_sts = NULL;
+	struct odm_phy_dbg_info *dbg_i = &dm->phy_dbg_info;
+	s8 rx_pwr_db = -120;
+	s8 rx_path_pwr_db;
+	u8 i, rxsc, bw = CHANNEL_WIDTH_20, rx_cnt = 0;
+	u8 pwdb[4];
+	boolean is_mu;
 
-#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_CE))
-			p_phy_info->rx_pwr[i] = rx_pwr[i];
-#endif
+	phy_sts = (struct phy_sts_rpt_jgr3_type1 *)phy_status_inf;
 
-			/* Translate DBM to percentage. */
-			RSSI = phydm_query_rx_pwr_percentage(rx_pwr[i]);
+	pwdb[0] = phy_sts->pwdb_a;
+	pwdb[1] = phy_sts->pwdb_b;
+	pwdb[2] = phy_sts->pwdb_c;
+	pwdb[3] = phy_sts->pwdb_d;
 
-			/*total_rssi += RSSI;*/
-			/*Get the best two RSSI*/
-			if (RSSI > best_rssi && RSSI > second_rssi) {
-				second_rssi = best_rssi;
-				best_rssi = RSSI;
-			} else if (RSSI > second_rssi && RSSI <= best_rssi)
-				second_rssi = RSSI;
+	/* Update per-path information */
+	for (i = RF_PATH_A; i < PHYDM_MAX_RF_PATH; i++) {
+		if (dm->rx_ant_status & BIT(i)) {
+			rx_cnt++; /* @check the number of the ant */
 
-			/*RT_DISP(FRX, RX_PHY_SS, ("RF-%d RXPWR=%x RSSI=%d\n", i, rx_pwr[i], RSSI));*/
+			if (rx_cnt > dm->num_rf_path)
+				break;
 
-			p_phy_info->rx_mimo_signal_strength[i] = (u8) RSSI;
+			/* Update per-path information
+			 * (RSSI_dB RSSI_percentage EVM SNR CFO sq)
+			 */
+			/* @EVM report is reported by stream, not path */
+			rx_path_pwr_db = pwdb[i] - 110; /* per-path pw (dB)*/
 
+			if (pktinfo->is_to_self)
+				dm->ofdm_agc_idx[i] = pwdb[i];
 
-			/*Get Rx snr value in DB*/
-			if (i < RF_PATH_C)
-				p_phy_info->rx_snr[i] = p_dm->phy_dbg_info.rx_snr_db[i] = p_phy_sta_rpt->rxsnr[i] / 2;
-			else if (p_dm->support_ic_type & (ODM_RTL8814A | ODM_RTL8822B))
-				p_phy_info->rx_snr[i] = p_dm->phy_dbg_info.rx_snr_db[i] = p_phy_sta_rpt->csi_current[i - 2] / 2;
+			phydm_per_path_info_3rd(i, rx_path_pwr_db,
+						phy_sts->rxevm[rx_cnt - 1],
+						phy_sts->cfo_tail[i],
+						phy_sts->rxsnr[i], phy_info);
 
-#if (DM_ODM_SUPPORT_TYPE != ODM_AP)
-			/*(2) CFO_short  & CFO_tail*/
-			if (i < RF_PATH_C) {
-				p_phy_info->cfo_short[i] = phydm_cfo((p_phy_sta_rpt->cfosho[i]));
-				p_phy_info->cfo_tail[i] = phydm_cfo((p_phy_sta_rpt->cfotail[i]));
-			}
-#endif
-			/* Record Signal Strength for next packet */
-#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
-			if (p_pktinfo->is_packet_match_bssid && (i == RF_PATH_A)) {
-				if (p_dm->iot_table.win_patch_id == RT_CID_819X_LENOVO) {
-					p_phy_info->signal_quality = phydm_sq_patch_rt_cid_819x_lenovo(p_dm, is_cck_rate, PWDB_ALL, i, RSSI);
-				}
-			}
-#endif
+			/*@CFO(kHz) = CFO_tail*312.5/2^7 ~= CFO tail*5/2*/
+			dbg_i->cfo_tail[i] = (phy_sts->cfo_tail[i] * 5) >> 1;
+			/* search maximum pwdb */
+			if (rx_path_pwr_db > rx_pwr_db)
+				rx_pwr_db = rx_path_pwr_db;
 		}
+	}
 
-		/*(3)PWDB, Average PWDB calculated by hardware (for rate adaptive)*/
+	/* @mapping RX counter from 1~4 to 0~3 */
+	if (rx_cnt > 0)
+		phy_info->rx_count = rx_cnt - 1;
 
-		/*2012.05.25 LukeLee: Testchip AGC report is wrong, it should be restored back to old formula in MP chip*/
-		if ((p_dm->support_ic_type & (ODM_RTL8812 | ODM_RTL8821 | ODM_RTL8881A)) && (!p_dm->is_mp_chip))
-			rx_pwr_all = (p_phy_sta_rpt->pwdb_all & 0x7f) - 110;
-		else
-			rx_pwr_all = (((p_phy_sta_rpt->pwdb_all) >> 1) & 0x7f) - 110;	 /*OLD FORMULA*/
+	/* @Check if MU packet or not */
+	if (phy_sts->gid != 0 && phy_sts->gid != 63) {
+		is_mu = true;
+		dbg_i->num_qry_mu_pkt++;
+	} else {
+		is_mu = false;
+	}
 
-		PWDB_ALL_BT = PWDB_ALL = phydm_query_rx_pwr_percentage(rx_pwr_all);
+	/* @count BF packet */
+	dbg_i->num_qry_bf_pkt = dbg_i->num_qry_bf_pkt + phy_sts->beamformed;
 
-		p_phy_info->rx_pwdb_all = PWDB_ALL;
-		/*PHYDM_DBG(p_dm,DBG_RSSI_MNTR, ("ODM OFDM RSSI=%d\n",p_phy_info->rx_pwdb_all));*/
-#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_CE))
-		p_phy_info->bt_rx_rssi_percentage = PWDB_ALL_BT;
-		p_phy_info->rx_power = rx_pwr_all;
-		p_phy_info->recv_signal_power = rx_pwr_all;
-#endif
+	/*STBC or LDPC pkt*/
+	dbg_i->is_ldpc_pkt = phy_sts->ldpc;
+	dbg_i->is_stbc_pkt = phy_sts->stbc;
 
-#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
-		if (p_dm->iot_table.win_patch_id == RT_CID_819X_LENOVO) {
-			/*do nothing*/
-		} else 
-#endif
-		{
-			/*(4)EVM of OFDM rate*/
-
-			if ((p_pktinfo->data_rate >= ODM_RATEMCS8) &&
-				(p_pktinfo->data_rate <= ODM_RATEMCS15))
-				max_spatial_stream = 2;
-			else if ((p_pktinfo->data_rate >= ODM_RATEVHTSS2MCS0) &&
-				 (p_pktinfo->data_rate <= ODM_RATEVHTSS2MCS9))
-				max_spatial_stream = 2;
-			else if ((p_pktinfo->data_rate >= ODM_RATEMCS16) &&
-				 (p_pktinfo->data_rate <= ODM_RATEMCS23))
-				max_spatial_stream = 3;
-			else if ((p_pktinfo->data_rate >= ODM_RATEVHTSS3MCS0) &&
-				 (p_pktinfo->data_rate <= ODM_RATEVHTSS3MCS9))
-				max_spatial_stream = 3;
-			else
-				max_spatial_stream = 1;
-
-			/*if (p_pktinfo->is_packet_match_bssid) */
-			{
-				/*dbg_print("p_pktinfo->data_rate = %d\n", p_pktinfo->data_rate);*/
-
-				for (i = 0; i < max_spatial_stream; i++) {
-					/*Do not use shift operation like "rx_evmX >>= 1" because the compilor of free build environment*/
-					/*fill most significant bit to "zero" when doing shifting operation which may change a negative*/
-					/*value to positive one, then the dbm value (which is supposed to be negative)  is not correct anymore.*/
-
-					if (p_pktinfo->data_rate >= ODM_RATE6M && p_pktinfo->data_rate <= ODM_RATE54M) {
-						if (i == RF_PATH_A) {
-							EVM = phydm_evm_db_to_percentage((p_phy_sta_rpt->sigevm));	/*dbm*/
-							EVM += 20;
-							if (EVM > 100)
-								EVM = 100;
-						}
-					} else {
-						if (i < RF_PATH_C) {
-							if (p_phy_sta_rpt->rxevm[i] == -128)
-								p_phy_sta_rpt->rxevm[i] = -25;
-							EVM = phydm_evm_db_to_percentage((p_phy_sta_rpt->rxevm[i]));	/*dbm*/
-						} else {
-							if (p_phy_sta_rpt->rxevm_cd[i - 2] == -128)
-								p_phy_sta_rpt->rxevm_cd[i - 2] = -25;
-							EVM = phydm_evm_db_to_percentage((p_phy_sta_rpt->rxevm_cd[i - 2]));	/*dbm*/
-						}
-					}
-
-					if (i < RF_PATH_C)
-						evm_dbm = phydm_evm_dbm_jaguar_series(p_phy_sta_rpt->rxevm[i]);
-					else
-						evm_dbm = phydm_evm_dbm_jaguar_series(p_phy_sta_rpt->rxevm_cd[i - 2]);
-					/*RT_DISP(FRX, RX_PHY_SQ, ("RXRATE=%x RXEVM=%x EVM=%s%d\n",*/
-					/*p_pktinfo->data_rate, p_phy_sta_rpt->rxevm[i], "%", EVM));*/
-
-					{
-						if (i == RF_PATH_A) {
-							/*Fill value in RFD, Get the first spatial stream only*/
-							p_phy_info->signal_quality = EVM;
-						}
-						p_phy_info->rx_mimo_signal_quality[i] = EVM;
-#if (DM_ODM_SUPPORT_TYPE != ODM_AP)
-						p_phy_info->rx_mimo_evm_dbm[i] = evm_dbm;
-#endif
-					}
-				}
-			}
-		}
+	/* @Check sub-channel */
+	if (pktinfo->data_rate > ODM_RATE11M &&
+	    pktinfo->data_rate < ODM_RATEMCS0)
+		rxsc = phy_sts->l_rxsc; /*@Legacy*/
+	else
+		rxsc = phy_sts->ht_rxsc; /* @HT and VHT */
+
+	/* @Check RX bandwidth */
+	if (rxsc >= 1 && rxsc <= 8)
+		bw = CHANNEL_WIDTH_20;
+	else if ((rxsc >= 9) && (rxsc <= 12))
+		bw = CHANNEL_WIDTH_40;
+	else if (rxsc >= 13)
+		bw = CHANNEL_WIDTH_80;
+	else
+		bw = *dm->band_width;
 
-		num_ss = phydm_rate_to_num_ss(p_dm, p_pktinfo->data_rate);
-		odm_parsing_cfo(p_dm, p_pktinfo, p_phy_sta_rpt->cfotail, num_ss);
+	/* Update packet information */
+	/* RX power choose the path with the maximum power */
+	phydm_common_phy_info_3rd(rx_pwr_db, phy_sts->channel_pri_lsb,
+				  (boolean)phy_sts->beamformed, is_mu,
+				  bw, phy_info->rx_mimo_signal_quality[0],
+				  rxsc, phy_info);
 
-	}
-	/* dbg_print("is_cck_rate= %d, p_phy_info->signal_strength=%d % PWDB_AL=%d rf_rx_num=%d\n", is_cck_rate, p_phy_info->signal_strength, PWDB_ALL, rf_rx_num); */
+	phydm_parsing_cfo(dm, pktinfo, phy_sts->cfo_tail, pktinfo->rate_ss);
 
-#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_CE))
-	/*UI BSS List signal strength(in percentage), make it good looking, from 0~100.*/
-	/*It is assigned to the BSS List in GetValueFromBeaconOrProbeRsp().*/
-	if (is_cck_rate) {
-#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
-		/*2012/01/12 MH Use customeris signal strength from HalComRxdDesc.c/*/
-		p_phy_info->signal_strength = SignalScaleProc(p_dm->adapter, PWDB_ALL, false, true);
-#else
-		p_phy_info->signal_strength = (u8)(phydm_signal_scale_mapping(p_dm, PWDB_ALL));/*PWDB_ALL;*/
-#endif
-	} else {
-		if (rf_rx_num != 0) {
-			/* 2015/01 Sean, use the best two RSSI only, suggested by Ynlin and ChenYu.*/
-			if (rf_rx_num == 1)
-				avg_rssi = best_rssi;
-			else
-				avg_rssi = (best_rssi + second_rssi) / 2;
-#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
-			/* 2012/01/12 MH Use customeris signal strength from HalComRxdDesc.c/*/
-			p_phy_info->signal_strength = SignalScaleProc(p_dm->adapter, avg_rssi, false, false);
-#else
-			p_phy_info->signal_strength = (u8)(phydm_signal_scale_mapping(p_dm, avg_rssi));
+#if (defined(CONFIG_PHYDM_ANTENNA_DIVERSITY))
+	dm->dm_fat_table.antsel_rx_keep_0 = phy_sts->antidx_a;
+	dm->dm_fat_table.antsel_rx_keep_1 = phy_sts->antidx_b;
+	dm->dm_fat_table.antsel_rx_keep_2 = phy_sts->antidx_c;
+	dm->dm_fat_table.antsel_rx_keep_3 = phy_sts->antidx_d;
 #endif
+}
+
+void phydm_get_physts_jarguar3_2_3(struct dm_struct *dm, u8 *phy_status_inf,
+				   struct phydm_perpkt_info_struct *pktinfo,
+				   struct phydm_phyinfo_struct *phy_info)
+{
+	/* type 2 & 3 is used for ofdm packet */
+	struct phy_sts_rpt_jgr3_type2_3 *phy_sts = NULL;
+	struct odm_phy_dbg_info *dbg_i = &dm->phy_dbg_info;
+	s8 rx_pwr_db_max = -120;
+	s8 rx_path_pwr_db = 0;
+	u8 i, rxsc, bw = CHANNEL_WIDTH_20, rx_count = 0;
+
+	phy_sts = (struct phy_sts_rpt_jgr3_type2_3 *)phy_status_inf;
+
+	/* Update per-path information */
+	for (i = RF_PATH_A; i < PHYDM_MAX_RF_PATH; i++) {
+		if (dm->rx_ant_status & BIT(i)) {
+			rx_count++; /* @check the number of the ant */
+
+			if (rx_count > dm->num_rf_path)
+				break;
+
+			/* Update per-path information
+			 * (RSSI_dB RSSI_percentage EVM SNR CFO sq)
+			 */
+			/* @EVM report is reported by stream, not path */
+			rx_path_pwr_db = phy_sts->pwdb[i] - 110; /*@dB*/
+
+			if (pktinfo->is_to_self)
+				dm->ofdm_agc_idx[i] = phy_sts->pwdb[i];
+
+			phydm_per_path_info_3rd(i, rx_path_pwr_db, 0,
+						0, 0, phy_info);
+
+			/* search maximum pwdb */
+			if (rx_path_pwr_db > rx_pwr_db_max)
+				rx_pwr_db_max = rx_path_pwr_db;
 		}
 	}
-#endif
-	p_dm->rx_pwdb_ave = p_dm->rx_pwdb_ave + p_phy_info->rx_pwdb_all;
-
-	p_dm->dm_fat_table.antsel_rx_keep_0 = p_phy_sta_rpt->antidx_anta;
-	p_dm->dm_fat_table.antsel_rx_keep_1 = p_phy_sta_rpt->antidx_antb;
-	p_dm->dm_fat_table.antsel_rx_keep_2 = p_phy_sta_rpt->antidx_antc;
-	p_dm->dm_fat_table.antsel_rx_keep_3 = p_phy_sta_rpt->antidx_antd;
-
-	if (p_pktinfo->is_packet_match_bssid) {
-		phydm_avg_phystatus_index(p_dm, p_phy_info, p_pktinfo);
-		phydm_rx_statistic_cal(p_dm, p_phy_status, p_pktinfo);
-	}
-	/*PHYDM_DBG(p_dm, DBG_ANT_DIV, ("StaID[%d]:  antidx_anta = ((%d)), MatchBSSID =  ((%d))\n", p_pktinfo->station_id, p_phy_sta_rpt->antidx_anta, p_pktinfo->is_packet_match_bssid));*/
-
-
-	/*		dbg_print("p_phy_sta_rpt->antidx_anta = %d, p_phy_sta_rpt->antidx_antb = %d\n",*/
-	/*			p_phy_sta_rpt->antidx_anta, p_phy_sta_rpt->antidx_antb);*/
-	/*		dbg_print("----------------------------\n");*/
-	/*		dbg_print("p_pktinfo->station_id=%d, p_pktinfo->data_rate=0x%x\n",p_pktinfo->station_id, p_pktinfo->data_rate);*/
-	/*		dbg_print("p_phy_sta_rpt->r_RFMOD = %d\n", p_phy_sta_rpt->r_RFMOD);*/
-	/*		dbg_print("p_phy_sta_rpt->gain_trsw[0]=0x%x, p_phy_sta_rpt->gain_trsw[1]=0x%x\n",*/
-	/*				p_phy_sta_rpt->gain_trsw[0],p_phy_sta_rpt->gain_trsw[1]);*/
-	/*		dbg_print("p_phy_sta_rpt->gain_trsw[2]=0x%x, p_phy_sta_rpt->gain_trsw[3]=0x%x\n",*/
-	/*				p_phy_sta_rpt->gain_trsw_cd[0],p_phy_sta_rpt->gain_trsw_cd[1]);*/
-	/*		dbg_print("p_phy_sta_rpt->pwdb_all = 0x%x, p_phy_info->rx_pwdb_all = %d\n", p_phy_sta_rpt->pwdb_all, p_phy_info->rx_pwdb_all);*/
-	/*		dbg_print("p_phy_sta_rpt->cfotail[i] = 0x%x, p_phy_sta_rpt->CFO_tail[i] = 0x%x\n", p_phy_sta_rpt->cfotail[0], p_phy_sta_rpt->cfotail[1]);*/
-	/*		dbg_print("p_phy_sta_rpt->rxevm[0] = %d, p_phy_sta_rpt->rxevm[1] = %d\n", p_phy_sta_rpt->rxevm[0], p_phy_sta_rpt->rxevm[1]);*/
-	/*		dbg_print("p_phy_sta_rpt->rxevm[2] = %d, p_phy_sta_rpt->rxevm[3] = %d\n", p_phy_sta_rpt->rxevm_cd[0], p_phy_sta_rpt->rxevm_cd[1]);*/
-	/*		dbg_print("p_phy_info->rx_mimo_signal_strength[0]=%d, p_phy_info->rx_mimo_signal_strength[1]=%d, rx_pwdb_all=%d\n",*/
-	/*				p_phy_info->rx_mimo_signal_strength[0], p_phy_info->rx_mimo_signal_strength[1], p_phy_info->rx_pwdb_all);*/
-	/*		dbg_print("p_phy_info->rx_mimo_signal_strength[2]=%d, p_phy_info->rx_mimo_signal_strength[3]=%d\n",*/
-	/*				p_phy_info->rx_mimo_signal_strength[2], p_phy_info->rx_mimo_signal_strength[3]);*/
-	/*		dbg_print("ppPhyInfo->rx_mimo_signal_quality[0]=%d, p_phy_info->rx_mimo_signal_quality[1]=%d\n",*/
-	/*				p_phy_info->rx_mimo_signal_quality[0], p_phy_info->rx_mimo_signal_quality[1]);*/
-	/*		dbg_print("ppPhyInfo->rx_mimo_signal_quality[2]=%d, p_phy_info->rx_mimo_signal_quality[3]=%d\n",*/
-	/*				p_phy_info->rx_mimo_signal_quality[2], p_phy_info->rx_mimo_signal_quality[3]);*/
 
-}
+	/* @mapping RX counter from 1~4 to 0~3 */
+	if (rx_count > 0)
+		phy_info->rx_count = rx_count - 1;
 
-#endif
+	/* @count BF packet */
+	dbg_i->num_qry_bf_pkt = dm->phy_dbg_info.num_qry_bf_pkt +
+					  phy_sts->beamformed;
+
+	/*STBC or LDPC pkt*/
+	dbg_i->is_ldpc_pkt = phy_sts->ldpc;
+	dbg_i->is_stbc_pkt = phy_sts->stbc;
+
+	/* @Check sub-channel */
+	if (pktinfo->data_rate > ODM_RATE11M &&
+	    pktinfo->data_rate < ODM_RATEMCS0)
+		rxsc = phy_sts->l_rxsc; /*@Legacy*/
+	else
+		rxsc = phy_sts->ht_rxsc; /* @HT and VHT */
+
+	/* @Check RX bandwidth */
+	if (rxsc >= 1 && rxsc <= 8)
+		bw = CHANNEL_WIDTH_20;
+	else if ((rxsc >= 9) && (rxsc <= 12))
+		bw = CHANNEL_WIDTH_40;
+	else if (rxsc >= 13)
+		bw = CHANNEL_WIDTH_80;
+	else
+		bw = *dm->band_width;
+
+	/* Update packet information */
+	/* RX power choose the path with the maximum power */
+	phydm_common_phy_info_3rd(rx_pwr_db_max, phy_sts->channel_lsb,
+				  (boolean)phy_sts->beamformed,
+				  false, bw, 0, rxsc, phy_info);
+}
 
-void
-phydm_reset_rssi_for_dm(
-	struct PHY_DM_STRUCT	*p_dm,
-	u8		station_id
-)
+void phydm_get_physts_jarguar3_4(struct dm_struct *dm, u8 *phy_status_inf,
+				 struct phydm_perpkt_info_struct *pktinfo,
+				 struct phydm_phyinfo_struct *phy_info)
 {
-	struct cmn_sta_info		*p_sta;
-#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN))
-	struct _ADAPTER		*adapter = p_dm->adapter;
-	HAL_DATA_TYPE	*p_hal_data = GET_HAL_DATA(adapter);
-#endif
-	p_sta = p_dm->p_phydm_sta_info[station_id];
+	/* type 4 is used for ofdm packet */
+	struct phy_sts_rpt_jgr3_type4 *phy_sts = NULL;
+	struct odm_phy_dbg_info *dbg_i = &dm->phy_dbg_info;
+	s8 rx_pwr_db_max = -120;
+	s8 rx_path_pwr_db = 0;
+	u8 i, rxsc, bw = CHANNEL_WIDTH_20, rx_cnt = 0;
 
-	if (!is_sta_active(p_sta)) {
-		/**/
-		return;
-	}
-	PHYDM_DBG(p_dm, DBG_RSSI_MNTR, ("Reset RSSI for macid = (( %d ))\n", station_id));
+	phy_sts = (struct phy_sts_rpt_jgr3_type4 *)phy_status_inf;
 
+	/* Update per-path information */
+	for (i = RF_PATH_A; i < PHYDM_MAX_RF_PATH; i++) {
+		if (dm->rx_ant_status & BIT(i)) {
+			rx_cnt++; /* @check the number of the ant */
+
+			if (rx_cnt > dm->num_rf_path)
+				break;
 
-	p_sta->rssi_stat.rssi_cck = -1;
-	p_sta->rssi_stat.rssi_ofdm = -1;
-	p_sta->rssi_stat.rssi = -1;
-	p_sta->rssi_stat.ofdm_pkt_cnt = 0;
-	p_sta->rssi_stat.cck_pkt_cnt = 0;
-	p_sta->rssi_stat.cck_sum_power = 0;
-	p_sta->rssi_stat.is_send_rssi = RA_RSSI_STATE_INIT;
-	p_sta->rssi_stat.packet_map = 0;
-	p_sta->rssi_stat.valid_bit = 0;
+			/* Update per-path information
+			 * (RSSI_dB RSSI_percentage EVM SNR CFO sq)
+			 */
+			/* @EVM report is reported by stream, not path */
+			rx_path_pwr_db = phy_sts->pwdb[i] - 110; /*@dB*/
 
-	/*in WIN Driver: sta_ID==0->p_entry==NULL -> default port HAL_Data*/
-#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN))
-	p_sta->dm_ctrl = p_sta->dm_ctrl & (~STA_DM_CTRL_ACTIVE);
-	if (station_id == 0) {
+			if (pktinfo->is_to_self)
+				dm->ofdm_agc_idx[i] = phy_sts->pwdb[i];
 
-		p_hal_data->UndecoratedSmoothedPWDB = -1;
-		/**/
+			phydm_per_path_info_3rd(i, rx_path_pwr_db,
+						phy_sts->rxevm[rx_cnt - 1],
+						0, phy_sts->rxsnr[i],
+						phy_info);
+
+			/* search maximum pwdb */
+			if (rx_path_pwr_db > rx_pwr_db_max)
+				rx_pwr_db_max = rx_path_pwr_db;
+		}
 	}
-#endif
 
+	/* @mapping RX counter from 1~4 to 0~3 */
+	if (rx_cnt > 0)
+		phy_info->rx_count = rx_cnt - 1;
+
+	/* @count BF packet */
+	dbg_i->num_qry_bf_pkt = dm->phy_dbg_info.num_qry_bf_pkt +
+					  phy_sts->beamformed;
+
+	/* @STBC or LDPC pkt*/
+	dbg_i->is_ldpc_pkt = phy_sts->ldpc;
+	dbg_i->is_stbc_pkt = phy_sts->stbc;
+
+	/* @Check sub-channel */
+	if (pktinfo->data_rate > ODM_RATE11M &&
+	    pktinfo->data_rate < ODM_RATEMCS0)
+		rxsc = phy_sts->l_rxsc; /*@Legacy*/
+	else
+		rxsc = phy_sts->ht_rxsc; /* @HT and VHT */
+
+	/* @Check RX bandwidth */
+	if (rxsc >= 1 && rxsc <= 8)
+		bw = CHANNEL_WIDTH_20;
+	else if ((rxsc >= 9) && (rxsc <= 12))
+		bw = CHANNEL_WIDTH_40;
+	else if (rxsc >= 13)
+		bw = CHANNEL_WIDTH_80;
+	else
+		bw = *dm->band_width;
+
+	/* @Conditional number */
+	dbg_i->condi_num = (u32)phy_sts->avg_cond_num_0;
+
+	/* Update packet information */
+	/* RX power choose the path with the maximum power */
+	phydm_common_phy_info_3rd(rx_pwr_db_max, phy_sts->channel_lsb,
+				  (boolean)phy_sts->beamformed,
+				  false, bw, 0, rxsc, phy_info);
 }
 
-void
-phydm_process_rssi_for_dm(
-	struct PHY_DM_STRUCT					*p_dm,
-	struct phydm_phyinfo_struct			*p_phy_info,
-	struct phydm_perpkt_info_struct			*p_pktinfo
-)
+void phydm_get_physts_jarguar3_5(struct dm_struct *dm, u8 *phy_status_inf,
+				 struct phydm_perpkt_info_struct *pktinfo,
+				 struct phydm_phyinfo_struct *phy_info)
 {
+	/* type 5 is used for ofdm packet */
+	struct phy_sts_rpt_jgr3_type5 *phy_sts = NULL;
+	struct odm_phy_dbg_info *dbg_i = &dm->phy_dbg_info;
+	s8 rx_pwr_db_max = -120;
+	s8 rx_path_pwr_db = 0;
+	u8 i, rxsc, bw = CHANNEL_WIDTH_20, rx_count = 0;
 
-	s32			rssi_ave;
-	s8			undecorated_smoothed_pwdb, undecorated_smoothed_cck, undecorated_smoothed_ofdm;
-	u8			i, is_cck_rate = 0;
-	u8			RSSI_max, RSSI_min;
-	u32			weighting = 0;
-	u8			send_rssi_2_fw = 0;
-	struct cmn_sta_info		*p_sta;
-#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN))
-	struct phydm_fat_struct			*p_dm_fat_table = &p_dm->dm_fat_table;
-	struct _ADAPTER		*adapter = p_dm->adapter;
-	HAL_DATA_TYPE	*p_hal_data = GET_HAL_DATA(adapter);
-#endif
+	phy_sts = (struct phy_sts_rpt_jgr3_type5 *)phy_status_inf;
 
-	if (p_pktinfo->station_id >= ODM_ASSOCIATE_ENTRY_NUM)
-		return;
+	/* Update per-path information */
+	for (i = RF_PATH_A; i < PHYDM_MAX_RF_PATH; i++) {
+		if (dm->rx_ant_status & BIT(i)) {
+			rx_count++; /* @check the number of the ant */
 
-#ifdef CONFIG_S0S1_SW_ANTENNA_DIVERSITY
-	odm_s0s1_sw_ant_div_by_ctrl_frame_process_rssi(p_dm, p_phy_info, p_pktinfo);
-#endif
+			if (rx_count > dm->num_rf_path)
+				break;
 
-	p_sta = p_dm->p_phydm_sta_info[p_pktinfo->station_id];
+			/* Update per-path information
+			 * (RSSI_dB RSSI_percentage EVM SNR CFO sq)
+			 */
+			/* @EVM report is reported by stream, not path */
+			rx_path_pwr_db = phy_sts->pwdb[i] - 110; /*@dB*/
 
-	if (!is_sta_active(p_sta)) {
-		return;
-		/**/
-	}
+			if (pktinfo->is_to_self)
+				dm->ofdm_agc_idx[i] = phy_sts->pwdb[i];
 
-#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN))
-	if ((p_dm->support_ability & ODM_BB_ANT_DIV) &&
-	    (p_dm_fat_table->enable_ctrl_frame_antdiv)
-	   ) {
-		if (p_pktinfo->is_packet_match_bssid)
-			p_dm->data_frame_num++;
+			phydm_per_path_info_3rd(i, rx_path_pwr_db,
+						0, 0, 0, phy_info);
 
-		if ((p_dm_fat_table->use_ctrl_frame_antdiv)) {
-			if (!p_pktinfo->is_to_self)/*data frame + CTRL frame*/
-				return;
-		} else {
-			if ((!p_pktinfo->is_packet_match_bssid))/*data frame only*/
-				return;
+			/* search maximum pwdb */
+			if (rx_path_pwr_db > rx_pwr_db_max)
+				rx_pwr_db_max = rx_path_pwr_db;
 		}
-	} else
-#endif
-	{
-		if ((!p_pktinfo->is_packet_match_bssid))/*data frame only*/
-			return;
 	}
 
-	if (p_pktinfo->is_packet_beacon)
-		p_dm->phy_dbg_info.num_qry_beacon_pkt++;
-
-	is_cck_rate = (p_pktinfo->data_rate <= ODM_RATE11M) ? true : false;
-	p_dm->rx_rate = p_pktinfo->data_rate;
+	/* @mapping RX counter from 1~4 to 0~3 */
+	if (rx_count > 0)
+		phy_info->rx_count = rx_count - 1;
 
-	/* --------------Statistic for antenna/path diversity------------------ */
-	if (p_dm->support_ability & ODM_BB_ANT_DIV) {
-#if (defined(CONFIG_PHYDM_ANTENNA_DIVERSITY))
-		odm_process_rssi_for_ant_div(p_dm, p_phy_info, p_pktinfo);
-#endif
-	}
-#if (defined(CONFIG_PATH_DIVERSITY))
-	else if (p_dm->support_ability & ODM_BB_PATH_DIV)
-		phydm_process_rssi_for_path_div(p_dm, p_phy_info, p_pktinfo);
-#endif
-	/* -----------------Smart Antenna Debug Message------------------ */
-
-	undecorated_smoothed_cck =  p_sta->rssi_stat.rssi_cck;
-	undecorated_smoothed_ofdm = p_sta->rssi_stat.rssi_ofdm;
-	undecorated_smoothed_pwdb = p_sta->rssi_stat.rssi;
-
-	if (p_pktinfo->is_packet_to_self || p_pktinfo->is_packet_beacon) {
-
-		if (!is_cck_rate) { /* ofdm rate */
-#if (RTL8814A_SUPPORT == 1) || (RTL8822B_SUPPORT == 1)
-			if (p_dm->support_ic_type & (ODM_RTL8814A | ODM_RTL8822B)) {
-				u8 RX_count = 0;
-				u32 RSSI_linear = 0;
-
-				if (p_dm->rx_ant_status & BB_PATH_A) {
-					p_dm->RSSI_A = p_phy_info->rx_mimo_signal_strength[RF_PATH_A];
-					RX_count++;
-					RSSI_linear += odm_convert_to_linear(p_phy_info->rx_mimo_signal_strength[RF_PATH_A]);
-				} else
-					p_dm->RSSI_A = 0;
-
-				if (p_dm->rx_ant_status & BB_PATH_B) {
-					p_dm->RSSI_B = p_phy_info->rx_mimo_signal_strength[RF_PATH_B];
-					RX_count++;
-					RSSI_linear += odm_convert_to_linear(p_phy_info->rx_mimo_signal_strength[RF_PATH_B]);
-				} else
-					p_dm->RSSI_B = 0;
-
-				if (p_dm->rx_ant_status & BB_PATH_C) {
-					p_dm->RSSI_C = p_phy_info->rx_mimo_signal_strength[RF_PATH_C];
-					RX_count++;
-					RSSI_linear += odm_convert_to_linear(p_phy_info->rx_mimo_signal_strength[RF_PATH_C]);
-				} else
-					p_dm->RSSI_C = 0;
-
-				if (p_dm->rx_ant_status & BB_PATH_D) {
-					p_dm->RSSI_D = p_phy_info->rx_mimo_signal_strength[RF_PATH_D];
-					RX_count++;
-					RSSI_linear += odm_convert_to_linear(p_phy_info->rx_mimo_signal_strength[RF_PATH_D]);
-				} else
-					p_dm->RSSI_D = 0;
-
-				/* Calculate average RSSI */
-				switch (RX_count) {
-				case 2:
-					RSSI_linear = (RSSI_linear >> 1);
-					break;
-				case 3:
-					RSSI_linear = ((RSSI_linear) + (RSSI_linear << 1) + (RSSI_linear << 3)) >> 5;	/* RSSI_linear/3 ~ RSSI_linear*11/32 */
-					break;
-				case 4:
-					RSSI_linear = (RSSI_linear >> 2);
-					break;
-				}
-				rssi_ave = odm_convert_to_db(RSSI_linear);
-			} else
-#endif
-			{
-				if (p_phy_info->rx_mimo_signal_strength[RF_PATH_B] == 0) {
-					rssi_ave = p_phy_info->rx_mimo_signal_strength[RF_PATH_A];
-					p_dm->RSSI_A = p_phy_info->rx_mimo_signal_strength[RF_PATH_A];
-					p_dm->RSSI_B = 0;
-				} else {
-					/*dbg_print("p_rfd->status.rx_mimo_signal_strength[0] = %d, p_rfd->status.rx_mimo_signal_strength[1] = %d\n",*/
-					/*p_rfd->status.rx_mimo_signal_strength[0], p_rfd->status.rx_mimo_signal_strength[1]);*/
-					p_dm->RSSI_A =  p_phy_info->rx_mimo_signal_strength[RF_PATH_A];
-					p_dm->RSSI_B = p_phy_info->rx_mimo_signal_strength[RF_PATH_B];
-
-					if (p_phy_info->rx_mimo_signal_strength[RF_PATH_A] > p_phy_info->rx_mimo_signal_strength[RF_PATH_B]) {
-						RSSI_max = p_phy_info->rx_mimo_signal_strength[RF_PATH_A];
-						RSSI_min = p_phy_info->rx_mimo_signal_strength[RF_PATH_B];
-					} else {
-						RSSI_max = p_phy_info->rx_mimo_signal_strength[RF_PATH_B];
-						RSSI_min = p_phy_info->rx_mimo_signal_strength[RF_PATH_A];
-					}
-					if ((RSSI_max - RSSI_min) < 3)
-						rssi_ave = RSSI_max;
-					else if ((RSSI_max - RSSI_min) < 6)
-						rssi_ave = RSSI_max - 1;
-					else if ((RSSI_max - RSSI_min) < 10)
-						rssi_ave = RSSI_max - 2;
-					else
-						rssi_ave = RSSI_max - 3;
-				}
-			}
+	/* @count BF packet */
+	dbg_i->num_qry_bf_pkt = dm->phy_dbg_info.num_qry_bf_pkt +
+					  phy_sts->beamformed;
 
-			/* 1 Process OFDM RSSI */
-			if (undecorated_smoothed_ofdm <= 0) {	/* initialize */
-				undecorated_smoothed_ofdm = (s8)p_phy_info->rx_pwdb_all;
-				PHYDM_DBG(p_dm, DBG_RSSI_MNTR, ("OFDM_INIT: (( %d ))\n", undecorated_smoothed_ofdm));
-			} else {
-				if (p_phy_info->rx_pwdb_all > (u32)undecorated_smoothed_ofdm) {
-					undecorated_smoothed_ofdm =
-						(s8)((((undecorated_smoothed_ofdm)*(RX_SMOOTH_FACTOR - 1)) +
-						(rssi_ave)) / (RX_SMOOTH_FACTOR));
-					undecorated_smoothed_ofdm = undecorated_smoothed_ofdm + 1;
-					PHYDM_DBG(p_dm, DBG_RSSI_MNTR, ("OFDM_1: (( %d ))\n", undecorated_smoothed_ofdm));
-				} else {
-					undecorated_smoothed_ofdm =
-						(s8)((((undecorated_smoothed_ofdm)*(RX_SMOOTH_FACTOR - 1)) +
-						(rssi_ave)) / (RX_SMOOTH_FACTOR));
-					PHYDM_DBG(p_dm, DBG_RSSI_MNTR, ("OFDM_2: (( %d ))\n", undecorated_smoothed_ofdm));
-				}
-			}
-			if (p_sta->rssi_stat.ofdm_pkt_cnt != 64) {
-				i = 63;
-				p_sta->rssi_stat.ofdm_pkt_cnt -= (u8)(((p_sta->rssi_stat.packet_map >> i) & BIT(0)) - 1);
-			}
-			p_sta->rssi_stat.packet_map = (p_sta->rssi_stat.packet_map << 1) | BIT(0);
+	/*STBC or LDPC pkt*/
+	dbg_i->is_ldpc_pkt = phy_sts->ldpc;
+	dbg_i->is_stbc_pkt = phy_sts->stbc;
 
-		} else {
-			rssi_ave = p_phy_info->rx_pwdb_all;
-			p_dm->RSSI_A = (u8) p_phy_info->rx_pwdb_all;
-			p_dm->RSSI_B = 0xFF;
-			p_dm->RSSI_C = 0xFF;
-			p_dm->RSSI_D = 0xFF;
-
-			if (p_sta->rssi_stat.cck_pkt_cnt <= 63)
-				p_sta->rssi_stat.cck_pkt_cnt++;
-
-			/* 1 Process CCK RSSI */
-			if (undecorated_smoothed_cck <= 0) {	/* initialize */
-				undecorated_smoothed_cck = (s8)p_phy_info->rx_pwdb_all;
-				p_sta->rssi_stat.cck_sum_power = (u16)p_phy_info->rx_pwdb_all ; /*reset*/
-				p_sta->rssi_stat.cck_pkt_cnt = 1; /*reset*/
-				PHYDM_DBG(p_dm, DBG_RSSI_MNTR, ("CCK_INIT: (( %d ))\n", undecorated_smoothed_cck));
-			} else if (p_sta->rssi_stat.cck_pkt_cnt <= CCK_RSSI_INIT_COUNT) {
-
-				p_sta->rssi_stat.cck_sum_power = p_sta->rssi_stat.cck_sum_power + (u16)p_phy_info->rx_pwdb_all;
-				undecorated_smoothed_cck = p_sta->rssi_stat.cck_sum_power / p_sta->rssi_stat.cck_pkt_cnt;
-
-				PHYDM_DBG(p_dm, DBG_RSSI_MNTR, ("CCK_0: (( %d )), SumPow = (( %d )), cck_pkt = (( %d ))\n",
-					undecorated_smoothed_cck, p_sta->rssi_stat.cck_sum_power, p_sta->rssi_stat.cck_pkt_cnt));
-			} else {
-				if (p_phy_info->rx_pwdb_all > (u32)undecorated_smoothed_cck) {
-					undecorated_smoothed_cck =
-						(s8)((((undecorated_smoothed_cck)*(RX_SMOOTH_FACTOR - 1)) +
-						(p_phy_info->rx_pwdb_all)) / (RX_SMOOTH_FACTOR));
-					undecorated_smoothed_cck = undecorated_smoothed_cck + 1;
-					PHYDM_DBG(p_dm, DBG_RSSI_MNTR, ("CCK_1: (( %d ))\n", undecorated_smoothed_cck));
-				} else {
-					undecorated_smoothed_cck =
-						(s8)((((undecorated_smoothed_cck)*(RX_SMOOTH_FACTOR - 1)) +
-						(p_phy_info->rx_pwdb_all)) / (RX_SMOOTH_FACTOR));
-					PHYDM_DBG(p_dm, DBG_RSSI_MNTR, ("CCK_2: (( %d ))\n", undecorated_smoothed_cck));
-				}
-			}
-			i = 63;
-			p_sta->rssi_stat.ofdm_pkt_cnt -= (u8)((p_sta->rssi_stat.packet_map >> i) & BIT(0));
-			p_sta->rssi_stat.packet_map = p_sta->rssi_stat.packet_map << 1;
-		}
+	/* @Check sub-channel */
+	if (pktinfo->data_rate > ODM_RATE11M &&
+	    pktinfo->data_rate < ODM_RATEMCS0)
+		rxsc = phy_sts->l_rxsc; /*@Legacy*/
+	else
+		rxsc = phy_sts->ht_rxsc; /* @HT and VHT */
+
+	/* @Check RX bandwidth */
+	if (rxsc >= 1 && rxsc <= 8)
+		bw = CHANNEL_WIDTH_20;
+	else if ((rxsc >= 9) && (rxsc <= 12))
+		bw = CHANNEL_WIDTH_40;
+	else if (rxsc >= 13)
+		bw = CHANNEL_WIDTH_80;
+	else
+		bw = *dm->band_width;
 
-		/* if(p_entry) */
-		{
-			/* 2011.07.28 LukeLee: modified to prevent unstable CCK RSSI */
-			if (p_sta->rssi_stat.ofdm_pkt_cnt == 64) { /* speed up when all packets are OFDM*/
-				undecorated_smoothed_pwdb = undecorated_smoothed_ofdm;
-				PHYDM_DBG(p_dm, DBG_RSSI_MNTR, ("PWDB_0[%d] = (( %d ))\n", p_pktinfo->station_id, undecorated_smoothed_cck));
-			} else {
-				if (p_sta->rssi_stat.valid_bit < 64)
-					p_sta->rssi_stat.valid_bit++;
+	/* Update packet information */
+	/* RX power choose the path with the maximum power */
+	phydm_common_phy_info_3rd(rx_pwr_db_max, phy_sts->channel_lsb,
+				  (boolean)phy_sts->beamformed,
+				  false, bw, 0, rxsc, phy_info);
+}
 
-				if (p_sta->rssi_stat.valid_bit == 64) {
-					weighting = ((p_sta->rssi_stat.ofdm_pkt_cnt) > 4) ? 64 : (p_sta->rssi_stat.ofdm_pkt_cnt << 4);
-					undecorated_smoothed_pwdb = (s8)((weighting * undecorated_smoothed_ofdm + (64 - weighting) * undecorated_smoothed_cck) >> 6);
-					PHYDM_DBG(p_dm, DBG_RSSI_MNTR, ("PWDB_1[%d] = (( %d )), W = (( %d ))\n", p_pktinfo->station_id, undecorated_smoothed_cck, weighting));
-				} else {
-					if (p_sta->rssi_stat.valid_bit != 0)
-						undecorated_smoothed_pwdb =
-						(p_sta->rssi_stat.ofdm_pkt_cnt * undecorated_smoothed_ofdm + (p_sta->rssi_stat.valid_bit - p_sta->rssi_stat.ofdm_pkt_cnt) * undecorated_smoothed_cck) / p_sta->rssi_stat.valid_bit;
-					else
-						undecorated_smoothed_pwdb = 0;
-
-					PHYDM_DBG(p_dm, DBG_RSSI_MNTR, ("PWDB_2[%d] = (( %d )), ofdm_pkt = (( %d )), Valid_Bit = (( %d ))\n",
-						p_pktinfo->station_id, undecorated_smoothed_cck, p_sta->rssi_stat.ofdm_pkt_cnt, p_sta->rssi_stat.valid_bit));
-				}
-			}
+void phydm_process_dm_rssi_3rd_type(struct dm_struct *dm,
+				    struct phydm_phyinfo_struct *phy_info,
+				    struct phydm_perpkt_info_struct *pktinfo)
+{
+	struct cmn_sta_info *sta = NULL;
+	struct rssi_info *rssi_t = NULL;
+	u8 rssi_tmp = 0;
+	u64 rssi_linear = 0;
+	s16 rssi_db = 0;
+	u8 i = 0;
 
+	/*@[Step4]*/
 
-			if ((p_sta->rssi_stat.ofdm_pkt_cnt >= 1 || p_sta->rssi_stat.cck_pkt_cnt >= 5) && (p_sta->rssi_stat.is_send_rssi == RA_RSSI_STATE_INIT)) {
+	if (pktinfo->station_id >= ODM_ASSOCIATE_ENTRY_NUM)
+		return;
 
-				send_rssi_2_fw = 1;
-				p_sta->rssi_stat.is_send_rssi = RA_RSSI_STATE_SEND;
-			}
+	sta = dm->phydm_sta_info[pktinfo->station_id];
 
-			p_sta->rssi_stat.rssi_cck = undecorated_smoothed_cck;
-			p_sta->rssi_stat.rssi_ofdm = undecorated_smoothed_ofdm;
-			p_sta->rssi_stat.rssi = undecorated_smoothed_pwdb;
+	if (!is_sta_active(sta))
+		return;
 
+	if (!pktinfo->is_packet_match_bssid) /*@data frame only*/
+		return;
 
+	if (!(pktinfo->is_packet_to_self) && !(pktinfo->is_packet_beacon))
+		return;
 
-			if (send_rssi_2_fw) { /* Trigger init rate by RSSI */
+	if (pktinfo->is_packet_beacon) {
+		dm->phy_dbg_info.num_qry_beacon_pkt++;
+		dm->phy_dbg_info.beacon_phy_rate = pktinfo->data_rate;
+	}
 
-				if (p_sta->rssi_stat.ofdm_pkt_cnt != 0)
-					p_sta->rssi_stat.rssi = undecorated_smoothed_ofdm;
+	#if (defined(CONFIG_PATH_DIVERSITY))
+	if (dm->support_ability & ODM_BB_PATH_DIV)
+		phydm_process_rssi_for_path_div(dm, phy_info, pktinfo);
+	#endif
 
-				PHYDM_DBG(p_dm, DBG_RSSI_MNTR,
-					("[Send to FW] PWDB = (( %d )), ofdm_pkt = (( %d )), cck_pkt = (( %d ))\n",
-					undecorated_smoothed_pwdb, p_sta->rssi_stat.ofdm_pkt_cnt, p_sta->rssi_stat.cck_pkt_cnt));
+	rssi_t = &sta->rssi_stat;
 
-			}
+	if (pktinfo->is_cck_rate) {
+		rssi_db = phy_info->rx_mimo_signal_strength[0]; /*Path-A*/
+		if (rssi_t->rssi_acc == 0) {
+			rssi_t->rssi_acc = (s16)(rssi_db << RSSI_MA);
+			rssi_t->rssi = (s8)(rssi_db);
+		} else {
+			rssi_t->rssi_acc = MA_ACC(rssi_t->rssi_acc,
+						  rssi_db, RSSI_MA);
+			rssi_t->rssi = (s8)GET_MA_VAL(rssi_t->rssi_acc,
+						      RSSI_MA);
+		}
+		rssi_t->rssi_cck = (s8)rssi_db;
+	} else {
+		for (i = RF_PATH_A; i < PHYDM_MAX_RF_PATH; i++) {
+			rssi_tmp = phy_info->rx_mimo_signal_strength[i];
+			if (rssi_tmp != 0)
+				rssi_linear += phydm_db_2_linear(rssi_tmp);
+		}
+		/* @Rounding and removing fractional bits */
+		rssi_linear = (rssi_linear +
+			       (1 << (FRAC_BITS - 1))) >> FRAC_BITS;
 
+		switch (phy_info->rx_count + 1) {
+		case 2:
+			rssi_linear = DIVIDED_2(rssi_linear);
+			break;
+		case 3:
+			rssi_linear = DIVIDED_3(rssi_linear);
+			break;
+		case 4:
+			rssi_linear = DIVIDED_4(rssi_linear);
+			break;
+		}
+		rssi_db = (s16)odm_convert_to_db(rssi_linear);
 
-			/*in WIN Driver: sta_ID==0->p_entry==NULL -> default port HAL_Data*/
-#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN))
+		if (rssi_t->rssi_acc == 0) {
+			rssi_t->rssi_acc = (s16)(rssi_db << RSSI_MA);
+			rssi_t->rssi = (s8)(rssi_db);
+		} else {
+			rssi_t->rssi_acc = MA_ACC(rssi_t->rssi_acc,
+						  rssi_db, RSSI_MA);
+			rssi_t->rssi = (s8)GET_MA_VAL(rssi_t->rssi_acc,
+						      RSSI_MA);
+		}
+		rssi_t->rssi_ofdm = (s8)rssi_db;
+	}
+}
 
-			if (p_pktinfo->station_id == 0) {
-				/**/
-				p_hal_data->UndecoratedSmoothedPWDB = undecorated_smoothed_pwdb;
-			}
+void phydm_rx_physts_3rd_type(void *dm_void, u8 *phy_sts,
+			      struct phydm_perpkt_info_struct *pktinfo,
+			      struct phydm_phyinfo_struct *phy_info)
+{
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+#ifdef PHYDM_PHYSTAUS_SMP_MODE
+	struct pkt_process_info *pkt_process = &dm->pkt_proc_struct;
 #endif
+	u8 phy_status_type = (*phy_sts & 0xf);
 
-			/* dbg_print("ofdm_pkt=%d, weighting=%d\n", ofdm_pkt_cnt, weighting); */
-			/* dbg_print("undecorated_smoothed_ofdm=%d, undecorated_smoothed_pwdb=%d, undecorated_smoothed_cck=%d\n", */
-			/*	undecorated_smoothed_ofdm, undecorated_smoothed_pwdb, undecorated_smoothed_cck); */
+#ifdef PHYDM_PHYSTAUS_SMP_MODE
+	if (pkt_process->phystatus_smp_mode_en && phy_status_type != 0) {
+		if (pkt_process->pre_ppdu_cnt == pktinfo->ppdu_cnt)
+			return;
+		pkt_process->pre_ppdu_cnt = pktinfo->ppdu_cnt;
+	}
+#endif
 
-		}
+	/*@[Step 2]*/
+	phydm_reset_phy_info_3rd(dm, phy_info); /* @Memory reset */
 
+	/* Phy status parsing */
+	switch (phy_status_type) {
+	case 0: /*@CCK*/
+		phydm_get_physts_jarguar3_0(dm, phy_sts, pktinfo, phy_info);
+		break;
+	case 1:
+		phydm_get_physts_jarguar3_1(dm, phy_sts, pktinfo, phy_info);
+		break;
+	case 2:
+	case 3:
+		phydm_get_physts_jarguar3_2_3(dm, phy_sts, pktinfo, phy_info);
+		break;
+	case 4:
+		phydm_get_physts_jarguar3_4(dm, phy_sts, pktinfo, phy_info);
+		break;
+	case 5:
+		phydm_get_physts_jarguar3_5(dm, phy_sts, pktinfo, phy_info);
+		break;
+	default:
+		break;
 	}
+
+
+	/*@[Step 1]*/
+	phydm_print_phystat_jaguar3(dm, phy_sts, pktinfo, phy_info);
 }
 
-/*
- * Endianness before calling this API
- *   */
+#endif
 
-#if (ODM_PHY_STATUS_NEW_TYPE_SUPPORT == 1)
-/* For 8822B only!! need to move to FW finally */
-/*==============================================*/
+#if (ODM_PHY_STATUS_NEW_TYPE_SUPPORT)
+/* @For 8822B only!! need to move to FW finally */
+/*@==============================================*/
 
 boolean
-phydm_query_is_mu_api(
-	struct PHY_DM_STRUCT					*p_phydm,
-	u8							ppdu_idx,
-	u8							*p_data_rate,
-	u8							*p_gid
-)
+phydm_query_is_mu_api(struct dm_struct *phydm, u8 ppdu_idx, u8 *p_data_rate,
+		      u8 *p_gid)
 {
-	u8	data_rate = 0, gid = 0;
+	u8 data_rate = 0, gid = 0;
 	boolean is_mu = false;
 
-	data_rate = p_phydm->phy_dbg_info.num_of_ppdu[ppdu_idx];
-	gid = p_phydm->phy_dbg_info.gid_num[ppdu_idx];
+	data_rate = phydm->phy_dbg_info.num_of_ppdu[ppdu_idx];
+	gid = phydm->phy_dbg_info.gid_num[ppdu_idx];
 
 	if (data_rate & BIT(7)) {
 		is_mu = true;
 		data_rate = data_rate & ~(BIT(7));
-	} else
+	} else {
 		is_mu = false;
+	}
 
 	*p_data_rate = data_rate;
 	*p_gid = gid;
 
 	return is_mu;
+}
 
+void phydm_reset_phy_info(struct dm_struct *phydm,
+			  struct phydm_phyinfo_struct *phy_info)
+{
+	phy_info->rx_pwdb_all = 0;
+	phy_info->signal_quality = 0;
+	phy_info->band_width = 0;
+	phy_info->rx_count = 0;
+	odm_memory_set(phydm, phy_info->rx_mimo_signal_quality, 0, 4);
+	odm_memory_set(phydm, phy_info->rx_mimo_signal_strength, 0, 4);
+	odm_memory_set(phydm, phy_info->rx_snr, 0, 4);
+
+	phy_info->rx_power = -110;
+	phy_info->recv_signal_power = -110;
+	phy_info->bt_rx_rssi_percentage = 0;
+	phy_info->signal_strength = 0;
+	phy_info->channel = 0;
+	phy_info->is_mu_packet = 0;
+	phy_info->is_beamformed = 0;
+	phy_info->rxsc = 0;
+	odm_memory_set(phydm, phy_info->rx_pwr, -110, 4);
+	odm_memory_set(phydm, phy_info->cfo_short, 0, 8);
+	odm_memory_set(phydm, phy_info->cfo_tail, 0, 8);
+	odm_memory_set(phydm, phy_info->ant_idx, 0, 4);
+
+	odm_memory_set(phydm, phy_info->rx_mimo_evm_dbm, 0, 4);
 }
 
-void
-phydm_reset_phy_info(
-	struct PHY_DM_STRUCT					*p_phydm,
-	struct phydm_phyinfo_struct			*p_phy_info
-)
+void phydm_print_phy_sts_jgr2(struct dm_struct *dm, u8 *phy_status_inf,
+			      struct phydm_perpkt_info_struct *pktinfo,
+			      struct phydm_phyinfo_struct *phy_info)
 {
-	p_phy_info->rx_pwdb_all = 0;
-	p_phy_info->signal_quality = 0;
-	p_phy_info->band_width = 0;
-	p_phy_info->rx_count = 0;
-	odm_memory_set(p_phydm, p_phy_info->rx_mimo_signal_quality, 0, 4);
-	odm_memory_set(p_phydm, p_phy_info->rx_mimo_signal_strength, 0, 4);
-	odm_memory_set(p_phydm, p_phy_info->rx_snr, 0, 4);
-
-	p_phy_info->rx_power = -110;
-	p_phy_info->recv_signal_power = -110;
-	p_phy_info->bt_rx_rssi_percentage = 0;
-	p_phy_info->signal_strength = 0;
-	p_phy_info->channel = 0;
-	p_phy_info->is_mu_packet = 0;
-	p_phy_info->is_beamformed = 0;
-	p_phy_info->rxsc = 0;
-	odm_memory_set(p_phydm, p_phy_info->rx_pwr, -110, 4);
-	/*odm_memory_set(p_phydm, p_phy_info->rx_mimo_evm_dbm, 0, 4);*/
-	odm_memory_set(p_phydm, p_phy_info->cfo_short, 0, 8);
-	odm_memory_set(p_phydm, p_phy_info->cfo_tail, 0, 8);
-
-	odm_memory_set(p_phydm, p_phy_info->rx_mimo_evm_dbm, 0, 4);
+	struct phy_sts_rpt_jgr2_type0 *rpt0 = NULL;
+	struct phy_sts_rpt_jgr2_type1 *rpt = NULL;
+	struct phy_sts_rpt_jgr2_type2 *rpt2 = NULL;
+	struct odm_phy_dbg_info *dbg = &dm->phy_dbg_info;
+	u8 phy_status_page_num = (*phy_status_inf & 0xf);
+	u32 phy_status[PHY_STATUS_JRGUAR2_DW_LEN] = {0};
+	u8 i;
+	u32 size = PHY_STATUS_JRGUAR2_DW_LEN << 2;
+
+	rpt0 = (struct phy_sts_rpt_jgr2_type0 *)phy_status_inf;
+	rpt = (struct phy_sts_rpt_jgr2_type1 *)phy_status_inf;
+	rpt2 = (struct phy_sts_rpt_jgr2_type2 *)phy_status_inf;
+
+	odm_move_memory(dm, phy_status, phy_status_inf, size);
+
+	if (!(dm->debug_components & DBG_PHY_STATUS))
+		return;
+
+	if (dbg->show_phy_sts_all_pkt == 0) {
+		if (!pktinfo->is_packet_match_bssid)
+			return;
+	}
+
+	dbg->show_phy_sts_cnt++;
+	#if 0
+	dbg_print("cnt=%d, max=%d\n",
+		  dbg->show_phy_sts_cnt, dbg->show_phy_sts_max_cnt);
+	#endif
+
+	if (dbg->show_phy_sts_max_cnt != SHOW_PHY_STATUS_UNLIMITED) {
+		if (dbg->show_phy_sts_cnt > dbg->show_phy_sts_max_cnt)
+			return;
+	}
+
+	pr_debug("Phy Status Rpt: OFDM_%d\n", phy_status_page_num);
+	pr_debug("StaID=%d, RxRate = 0x%x match_bssid=%d\n",
+		 pktinfo->station_id, pktinfo->data_rate,
+		 pktinfo->is_packet_match_bssid);
+
+	for (i = 0; i < PHY_STATUS_JRGUAR2_DW_LEN; i++)
+		pr_debug("Offset[%d:%d] = 0x%x\n",
+			 ((4 * i) + 3), (4 * i), phy_status[i]);
+
+	if (phy_status_page_num == 0) {
+		pr_debug("[0] TRSW=%d, MP_gain_idx=%d, pwdb=%d\n",
+			 rpt0->trsw, rpt0->gain, rpt0->pwdb);
+		pr_debug("[4] band=%d, CH=%d, agc_table = %d, rxsc = %d\n",
+			 rpt0->band, rpt0->channel,
+			 rpt0->agc_table, rpt0->rxsc);
+		pr_debug("[8] AntIdx[D:A]={%d, %d, %d, %d}, LSIG_len=%d\n",
+			 rpt0->antidx_d, rpt0->antidx_c, rpt0->antidx_b,
+			 rpt0->antidx_a, rpt0->length);
+		pr_debug("[12] lna_h=%d, bb_pwr=%d, lna_l=%d, vga=%d, sq=%d\n",
+			 rpt0->lna_h, rpt0->bb_power, rpt0->lna_l,
+			 rpt0->vga, rpt0->signal_quality);
+
+	} else if (phy_status_page_num == 1) {
+		pr_debug("[0] pwdb[D:A]={%d, %d, %d, %d}\n",
+			 rpt->pwdb[3], rpt->pwdb[2],
+			 rpt->pwdb[1], rpt->pwdb[0]);
+		pr_debug("[4] BF: %d, ldpc=%d, stbc=%d, g_bt=%d, antsw=%d, band=%d, CH=%d, rxsc[ht, l]={%d, %d}\n",
+			 rpt->beamformed, rpt->ldpc, rpt->stbc, rpt->gnt_bt,
+			 rpt->hw_antsw_occu, rpt->band, rpt->channel,
+			 rpt->ht_rxsc, rpt->l_rxsc);
+		pr_debug("[8] AntIdx[D:A]={%d, %d, %d, %d}, LSIG_len=%d\n",
+			 rpt->antidx_d, rpt->antidx_c, rpt->antidx_b,
+			 rpt->antidx_a, rpt->lsig_length);
+		pr_debug("[12] rf_mode=%d, NBI=%d, Intf_pos=%d, GID=%d, PAID=%d\n",
+			 rpt->rf_mode, rpt->nb_intf_flag,
+			 (rpt->intf_pos + (rpt->intf_pos_msb << 8)), rpt->gid,
+			 (rpt->paid + (rpt->paid_msb << 8)));
+		pr_debug("[16] EVM[D:A]={%d, %d, %d, %d}\n",
+			 rpt->rxevm[3], rpt->rxevm[2],
+			 rpt->rxevm[1], rpt->rxevm[0]);
+		pr_debug("[20] CFO[D:A]={%d, %d, %d, %d}\n",
+			 rpt->cfo_tail[3], rpt->cfo_tail[2], rpt->cfo_tail[1],
+			 rpt->cfo_tail[0]);
+		pr_debug("[24] SNR[D:A]={%d, %d, %d, %d}\n\n",
+			 rpt->rxsnr[3], rpt->rxsnr[2], rpt->rxsnr[1],
+			 rpt->rxsnr[0]);
+
+	} else if (phy_status_page_num == 2) {
+		pr_debug("[0] pwdb[D:A]={%d, %d, %d, %d}\n",
+			 rpt2->pwdb[3], rpt2->pwdb[2], rpt2->pwdb[1],
+			 rpt2->pwdb[0]);
+		pr_debug("[4] BF: %d, ldpc=%d, stbc=%d, g_bt=%d, antsw=%d, band=%d, CH=%d, rxsc[ht,l]={%d, %d}\n",
+			 rpt2->beamformed, rpt2->ldpc, rpt2->stbc, rpt2->gnt_bt,
+			 rpt2->hw_antsw_occu, rpt2->band, rpt2->channel,
+			 rpt2->ht_rxsc, rpt2->l_rxsc);
+		pr_debug("[8] AgcTab[D:A]={%d, %d, %d, %d}, cnt_pw2cca=%d, shift_l_map=%d\n",
+			 rpt2->agc_table_d, rpt2->agc_table_c,
+			 rpt2->agc_table_b, rpt2->agc_table_a,
+			 rpt2->cnt_pw2cca, rpt2->shift_l_map);
+		pr_debug("[12] (TRSW|Gain)[D:A]={%d %d, %d %d, %d %d, %d %d}, cnt_cca2agc_rdy=%d\n",
+			 rpt2->trsw_d, rpt2->gain_d, rpt2->trsw_c, rpt2->gain_c,
+			 rpt2->trsw_b, rpt2->gain_b, rpt2->trsw_a,
+			 rpt2->gain_a, rpt2->cnt_cca2agc_rdy);
+		pr_debug("[16] AAGC step[D:A]={%d, %d, %d, %d} HT AAGC gain[D:A]={%d, %d, %d, %d}\n",
+			 rpt2->aagc_step_d, rpt2->aagc_step_c,
+			 rpt2->aagc_step_b, rpt2->aagc_step_a,
+			 rpt2->ht_aagc_gain[3], rpt2->ht_aagc_gain[2],
+			 rpt2->ht_aagc_gain[1], rpt2->ht_aagc_gain[0]);
+		pr_debug("[20] DAGC gain[D:A]={%d, %d, %d, %d}\n",
+			 rpt2->dagc_gain[3],
+			 rpt2->dagc_gain[2], rpt2->dagc_gain[1],
+			 rpt2->dagc_gain[0]);
+		pr_debug("[24] syn_cnt: %d, Cnt=%d\n\n",
+			 rpt2->syn_count, rpt2->counter);
+	}
 }
 
-void
-phydm_set_per_path_phy_info(
-	u8							rx_path,
-	s8							rx_pwr,
-	s8							rx_evm,
-	s8							cfo_tail,
-	s8							rx_snr,
-	struct phydm_phyinfo_struct	*p_phy_info
-)
+void phydm_set_per_path_phy_info(u8 rx_path, s8 pwr, s8 rx_evm, s8 cfo_tail,
+				 s8 rx_snr, u8 ant_idx,
+				 struct phydm_phyinfo_struct *phy_info)
 {
-	u8			evm_dbm = 0;
-	u8			evm_percentage = 0;
+	u8 evm_dbm = 0;
+	u8 evm_percentage = 0;
 
 	/* SNR is S(8,1), EVM is S(8,1), CFO is S(8,7) */
 
 	if (rx_evm < 0) {
-		/* Calculate EVM in dBm */
+		/* @Calculate EVM in dBm */
 		evm_dbm = ((u8)(0 - rx_evm) >> 1);
 
-		/* Calculate EVM in percentage */
-		if (evm_dbm >= 34)
-			evm_percentage = 100;
-		else
-			evm_percentage = (evm_dbm << 1) + (evm_dbm);
-	}
+		if (evm_dbm == 64)
+			evm_dbm = 0; /*@if 1SS rate, evm_dbm [2nd stream] =64*/
 
-	p_phy_info->rx_pwr[rx_path] = rx_pwr;
+		if (evm_dbm != 0) {
+			/* @Convert EVM to 0%~100% percentage */
+			if (evm_dbm >= 34)
+				evm_percentage = 100;
+			else
+				evm_percentage = (evm_dbm << 1) + (evm_dbm);
+		}
+	}
 
-	/* CFO = CFO_tail * 312.5 / 2^7 ~= CFO tail * 39/512 (kHz)*/
-	p_phy_info->cfo_tail[rx_path] = cfo_tail;
-	p_phy_info->cfo_tail[rx_path] = ((p_phy_info->cfo_tail[rx_path] << 5) + (p_phy_info->cfo_tail[rx_path] << 2) +
-		(p_phy_info->cfo_tail[rx_path] << 1) + (p_phy_info->cfo_tail[rx_path])) >> 9;
+	phy_info->rx_pwr[rx_path] = pwr;
 
-	if (evm_dbm == 64)
-		evm_dbm = 0; /*if 1SS rate, evm_dbm [2nd stream] =64*/
+	/*@CFO(kHz) = CFO_tail * 312.5(kHz) / 2^7 ~= CFO tail * 5/2 (kHz)*/
+	phy_info->cfo_tail[rx_path] = (cfo_tail * 5) >> 1;
+	phy_info->rx_mimo_evm_dbm[rx_path] = evm_dbm;
+	phy_info->rx_mimo_signal_strength[rx_path] = phydm_pwr_2_percent(pwr);
+	phy_info->rx_mimo_signal_quality[rx_path] = evm_percentage;
+	phy_info->rx_snr[rx_path] = rx_snr >> 1;
+	phy_info->ant_idx[rx_path] = ant_idx;
 
-	p_phy_info->rx_mimo_evm_dbm[rx_path] = evm_dbm;
+#if 0
+	if (!pktinfo->is_packet_match_bssid)
+		return;
 
-	p_phy_info->rx_mimo_signal_strength[rx_path] = phydm_query_rx_pwr_percentage(rx_pwr);
-	p_phy_info->rx_mimo_signal_quality[rx_path] = evm_percentage;
-	p_phy_info->rx_snr[rx_path] = rx_snr >> 1;
+	dbg_print("path (%d)--------\n", rx_path);
+	dbg_print("rx_pwr = %d, Signal strength = %d\n",
+		  phy_info->rx_pwr[rx_path],
+		  phy_info->rx_mimo_signal_strength[rx_path]);
+	dbg_print("evm_dbm = %d, Signal quality = %d\n",
+		  phy_info->rx_mimo_evm_dbm[rx_path],
+		  phy_info->rx_mimo_signal_quality[rx_path]);
+	dbg_print("CFO = %d, SNR = %d\n",
+		  phy_info->cfo_tail[rx_path], phy_info->rx_snr[rx_path]);
 
-#if 0
-	/* if (p_pktinfo->is_packet_match_bssid) */
-	{
-		dbg_print("path (%d)--------\n", rx_path);
-		dbg_print("rx_pwr = %d, Signal strength = %d\n", p_phy_info->rx_pwr[rx_path], p_phy_info->rx_mimo_signal_strength[rx_path]);
-		dbg_print("evm_dbm = %d, Signal quality = %d\n", p_phy_info->rx_mimo_evm_dbm[rx_path], p_phy_info->rx_mimo_signal_quality[rx_path]);
-		dbg_print("CFO = %d, SNR = %d\n", p_phy_info->cfo_tail[rx_path], p_phy_info->rx_snr[rx_path]);
-	}
 #endif
 }
 
-void
-phydm_set_common_phy_info(
-	s8							rx_power,
-	u8							channel,
-	boolean							is_beamformed,
-	boolean							is_mu_packet,
-	u8							bandwidth,
-	u8							signal_quality,
-	u8							rxsc,
-	struct phydm_phyinfo_struct				*p_phy_info
-)
+void phydm_set_common_phy_info(s8 rx_power, u8 channel, boolean is_beamformed,
+			       boolean is_mu_packet, u8 bandwidth,
+			       u8 signal_quality, u8 rxsc,
+			       struct phydm_phyinfo_struct *phy_info)
 {
-	p_phy_info->rx_power = rx_power;											/* RSSI in dB */
-	p_phy_info->recv_signal_power = rx_power;										/* RSSI in dB */
-	p_phy_info->channel = channel;												/* channel number */
-	p_phy_info->is_beamformed = is_beamformed;									/* apply BF */
-	p_phy_info->is_mu_packet = is_mu_packet;										/* MU packet */
-	p_phy_info->rxsc = rxsc;
-
-	p_phy_info->rx_pwdb_all = phydm_query_rx_pwr_percentage(rx_power);				/* RSSI in percentage */
-	p_phy_info->signal_quality = signal_quality;										/* signal quality */
-	p_phy_info->band_width = bandwidth;											/* bandwidth */
+	phy_info->rx_power = rx_power; /* RSSI in dB */
+	phy_info->recv_signal_power = rx_power; /* RSSI in dB */
+	phy_info->channel = channel; /* @channel number */
+	phy_info->is_beamformed = is_beamformed; /* @apply BF */
+	phy_info->is_mu_packet = is_mu_packet; /* @MU packet */
+	phy_info->rxsc = rxsc;
+
+	/* RSSI in percentage */
+	phy_info->rx_pwdb_all = phydm_pwr_2_percent(rx_power);
+	phy_info->signal_quality = signal_quality; /* signal quality */
+	phy_info->band_width = bandwidth; /* @bandwidth */
 
 #if 0
-	/* if (p_pktinfo->is_packet_match_bssid) */
-	{
-		dbg_print("rx_pwdb_all = %d, rx_power = %d, recv_signal_power = %d\n", p_phy_info->rx_pwdb_all, p_phy_info->rx_power, p_phy_info->recv_signal_power);
-		dbg_print("signal_quality = %d\n", p_phy_info->signal_quality);
-		dbg_print("is_beamformed = %d, is_mu_packet = %d, rx_count = %d\n", p_phy_info->is_beamformed, p_phy_info->is_mu_packet, p_phy_info->rx_count + 1);
-		dbg_print("channel = %d, rxsc = %d, band_width = %d\n", channel, rxsc, bandwidth);
-	}
+	if (!pktinfo->is_packet_match_bssid)
+		return;
+
+	dbg_print("rx_pwdb_all = %d, rx_power = %d, recv_signal_power = %d\n",
+		  phy_info->rx_pwdb_all, phy_info->rx_power,
+		  phy_info->recv_signal_power);
+	dbg_print("signal_quality = %d\n", phy_info->signal_quality);
+	dbg_print("is_beamformed = %d, is_mu_packet = %d, rx_count = %d\n",
+		  phy_info->is_beamformed, phy_info->is_mu_packet,
+		  phy_info->rx_count + 1);
+	dbg_print("channel = %d, rxsc = %d, band_width = %d\n", channel,
+		  rxsc, bandwidth);
+
 #endif
 }
 
-void
-phydm_get_rx_phy_status_type0(
-	struct PHY_DM_STRUCT		*p_dm,
-	u8							*p_phy_status,
-	struct phydm_perpkt_info_struct		*p_pktinfo,
-	struct phydm_phyinfo_struct	*p_phy_info
-)
+void phydm_get_phy_sts_type0(struct dm_struct *dm, u8 *phy_status_inf,
+			     struct phydm_perpkt_info_struct *pktinfo,
+			     struct phydm_phyinfo_struct *phy_info)
 {
 	/* type 0 is used for cck packet */
-	struct _phy_status_rpt_jaguar2_type0	*p_phy_sta_rpt = (struct _phy_status_rpt_jaguar2_type0 *)p_phy_status;
-	u8							SQ = 0;
-	s8							rx_power = p_phy_sta_rpt->pwdb - 110;
+	struct phy_sts_rpt_jgr2_type0 *phy_sts = NULL;
+	u8 sq = 0;
+	s8 rx_pow = 0;
+	u8 lna_idx = 0, vga_idx = 0;
+	u8 ant_idx;
 
+	phy_sts = (struct phy_sts_rpt_jgr2_type0 *)phy_status_inf;
+	rx_pow = phy_sts->pwdb - 110;
 
-	if (p_dm->support_ic_type & ODM_RTL8723D) {
-#if (RTL8723D_SUPPORT == 1)
-		rx_power = p_phy_sta_rpt->pwdb - 97;
-#endif
-	}
-/*#if (RTL8710B_SUPPORT == 1)*/
-	/*if (p_dm->support_ic_type & ODM_RTL8710B)*/
-		/*rx_power = p_phy_sta_rpt->pwdb - 97;*/
-/*#endif*/
+	/* Fill in per-path antenna index */
+	ant_idx = phy_sts->antidx_a;
 
-#if (RTL8821C_SUPPORT == 1)
-	else if (p_dm->support_ic_type & ODM_RTL8821C) {
-		if (p_phy_sta_rpt->pwdb >= -57)
-			rx_power = p_phy_sta_rpt->pwdb - 100;
+	if (dm->support_ic_type & ODM_RTL8723D) {
+		#if (RTL8723D_SUPPORT)
+		rx_pow = phy_sts->pwdb - 97;
+		#endif
+	}
+	#if (RTL8821C_SUPPORT)
+	else if (dm->support_ic_type & ODM_RTL8821C) {
+		if (phy_sts->pwdb >= -57)
+			rx_pow = phy_sts->pwdb - 100;
 		else
-			rx_power = p_phy_sta_rpt->pwdb - 102;
+			rx_pow = phy_sts->pwdb - 102;
 	}
-#endif
+	#endif
 
-	if (p_pktinfo->is_to_self) {
-		p_dm->ofdm_agc_idx[0] = p_phy_sta_rpt->pwdb;
-		p_dm->ofdm_agc_idx[1] = 0;
-		p_dm->ofdm_agc_idx[2] = 0;
-		p_dm->ofdm_agc_idx[3] = 0;
+	if (pktinfo->is_to_self) {
+		dm->ofdm_agc_idx[0] = phy_sts->pwdb;
+		dm->ofdm_agc_idx[1] = 0;
+		dm->ofdm_agc_idx[2] = 0;
+		dm->ofdm_agc_idx[3] = 0;
 	}
 
-
-	/* Calculate Signal Quality*/
-	if (p_pktinfo->is_packet_match_bssid) {
-		if (p_phy_sta_rpt->signal_quality >= 64)
-			SQ = 0;
-		else if (p_phy_sta_rpt->signal_quality <= 20)
-			SQ = 100;
-		else {
-			/* mapping to 2~99% */
-			SQ = 64 - p_phy_sta_rpt->signal_quality;
-			SQ = ((SQ << 3) + SQ) >> 2;
-		}
+	/* @Calculate Signal Quality*/
+	if (phy_sts->signal_quality >= 64) {
+		sq = 0;
+	} else if (phy_sts->signal_quality <= 20) {
+		sq = 100;
+	} else {
+		/* @mapping to 2~99% */
+		sq = 64 - phy_sts->signal_quality;
+		sq = ((sq << 3) + sq) >> 2;
 	}
 
-	/* Modify CCK PWDB if old AGC */
-	if (p_dm->cck_new_agc == false) {
+	/* @Get RSSI for old CCK AGC */
+	if (!dm->cck_new_agc) {
+		vga_idx = phy_sts->vga;
 
-		#if (RTL8197F_SUPPORT == 1)
-		if (p_dm->support_ic_type & ODM_RTL8197F)
-			rx_power = phydm_cck_rssi_convert(p_dm, p_phy_sta_rpt->lna_l, p_phy_sta_rpt->vga);
-		else
-		#endif
-		{
-			u8	lna_idx, vga_idx;
-
-			lna_idx = ((p_phy_sta_rpt->lna_h << 3) | p_phy_sta_rpt->lna_l);
-			vga_idx = p_phy_sta_rpt->vga;
-
-			#if (RTL8723D_SUPPORT == 1)
-			if (p_dm->support_ic_type & ODM_RTL8723D)
-				rx_power = odm_cckrssi_8723d(lna_idx, vga_idx);
-			#endif
-
-			#if (RTL8710B_SUPPORT == 1)
-			if (p_dm->support_ic_type & ODM_RTL8710B)
-				rx_power = odm_cckrssi_8710b(lna_idx, vga_idx);
-			#endif
-
-			#if (RTL8822B_SUPPORT == 1)
-			/* Need to do !! */
-			/*if (p_dm->support_ic_type & ODM_RTL8822B) */
-			/*rx_power = odm_CCKRSSI_8822B(LNA_idx, VGA_idx);*/
-			#endif
-
-			#if (RTL8821C_SUPPORT == 1)
-				if (p_dm->support_ic_type & ODM_RTL8821C)
-					rx_power = phydm_cck_rssi_8821c(p_dm, lna_idx, vga_idx);
-			#endif
+		if (dm->support_ic_type & ODM_RTL8197F) {
+			/*@3bit LNA*/
+			lna_idx = phy_sts->lna_l;
+		} else {
+			/*@4bit LNA*/
+			lna_idx = (phy_sts->lna_h << 3) | phy_sts->lna_l;
 		}
-
+		rx_pow = phydm_get_cck_rssi(dm, lna_idx, vga_idx);
 	}
 
-	/* Confirm CCK RSSI */
-	#if (RTL8197F_SUPPORT == 1)
-	if (p_dm->support_ic_type & ODM_RTL8197F) {
-		u8	bb_pwr_th_l = 5; /* round( 31*0.15 ) */
-		u8	bb_pwr_th_h = 27; /* round( 31*0.85 ) */
+	/* @Confirm CCK RSSI */
+	#if (RTL8197F_SUPPORT)
+	if (dm->support_ic_type & ODM_RTL8197F) {
+		u8 bb_pwr_th_l = 5; /* round( 31*0.15 ) */
+		u8 bb_pwr_th_h = 27; /* round( 31*0.85 ) */
 
-		if ((p_phy_sta_rpt->bb_power < bb_pwr_th_l) || (p_phy_sta_rpt->bb_power > bb_pwr_th_h))
-			rx_power = 0; /* Error RSSI for CCK ; set 100*/
+		if (phy_sts->bb_power < bb_pwr_th_l ||
+		    phy_sts->bb_power > bb_pwr_th_h)
+			rx_pow = 0; /* @Error RSSI for CCK ; set 100*/
 	}
 	#endif
 
-	/* Update CCK packet counter */
-	p_dm->phy_dbg_info.num_qry_phy_status_cck++;
-
-	/*CCK no STBC and LDPC*/
-	p_dm->phy_dbg_info.is_ldpc_pkt = false;
-	p_dm->phy_dbg_info.is_stbc_pkt = false;
+	/*@CCK no STBC and LDPC*/
+	dm->phy_dbg_info.is_ldpc_pkt = false;
+	dm->phy_dbg_info.is_stbc_pkt = false;
 
 	/* Update Common information */
-	phydm_set_common_phy_info(rx_power, p_phy_sta_rpt->channel, false,
-		  false, CHANNEL_WIDTH_20, SQ, p_phy_sta_rpt->rxsc, p_phy_info);
-
+	phydm_set_common_phy_info(rx_pow, phy_sts->channel, false,
+				  false, CHANNEL_WIDTH_20, sq,
+				  phy_sts->rxsc, phy_info);
 	/* Update CCK pwdb */
-	phydm_set_per_path_phy_info(RF_PATH_A, rx_power, 0, 0, 0, p_phy_info);					/* Update per-path information */
-
-	p_dm->dm_fat_table.antsel_rx_keep_0 = p_phy_sta_rpt->antidx_a;
-	p_dm->dm_fat_table.antsel_rx_keep_1 = p_phy_sta_rpt->antidx_b;
-	p_dm->dm_fat_table.antsel_rx_keep_2 = p_phy_sta_rpt->antidx_c;
-	p_dm->dm_fat_table.antsel_rx_keep_3 = p_phy_sta_rpt->antidx_d;
-#if 0
-	/* if (p_pktinfo->is_packet_match_bssid) */
-	{
-		dbg_print("pwdb = 0x%x, MP gain index = 0x%x, TRSW = 0x%x\n", p_phy_sta_rpt->pwdb, p_phy_sta_rpt->gain, p_phy_sta_rpt->trsw);
-		dbg_print("channel = %d, band = %d, rxsc = %d\n", p_phy_sta_rpt->channel, p_phy_sta_rpt->band, p_phy_sta_rpt->rxsc);
-		dbg_print("agc_table = 0x%x, agc_rpt 0x%x, bb_power = 0x%x\n", p_phy_sta_rpt->agc_table, p_phy_sta_rpt->agc_rpt, p_phy_sta_rpt->bb_power);
-		dbg_print("length = %d, SQ = %d\n", p_phy_sta_rpt->length, p_phy_sta_rpt->signal_quality);
-		dbg_print("antidx a = 0x%x, b = 0x%x, c = 0x%x, d = 0x%x\n", p_phy_sta_rpt->antidx_a, p_phy_sta_rpt->antidx_b, p_phy_sta_rpt->antidx_c, p_phy_sta_rpt->antidx_d);
-		dbg_print("rsvd_0 = 0x%x, rsvd_1 = 0x%x, rsvd_2 = 0x%x\n", p_phy_sta_rpt->rsvd_0, p_phy_sta_rpt->rsvd_1, p_phy_sta_rpt->rsvd_2);
-		dbg_print("rsvd_3 = 0x%x, rsvd_4 = 0x%x, rsvd_5 = 0x%x\n", p_phy_sta_rpt->rsvd_3, p_phy_sta_rpt->rsvd_4, p_phy_sta_rpt->rsvd_5);
-		dbg_print("rsvd_6 = 0x%x, rsvd_7 = 0x%x, rsvd_8 = 0x%x\n", p_phy_sta_rpt->rsvd_6, p_phy_sta_rpt->rsvd_7, p_phy_sta_rpt->rsvd_8);
-	}
-#endif
+	phydm_set_per_path_phy_info(RF_PATH_A, rx_pow, 0, 0, 0, ant_idx,
+				    phy_info);
+
+	#ifdef CONFIG_PHYDM_ANTENNA_DIVERSITY
+	dm->dm_fat_table.antsel_rx_keep_0 = phy_sts->antidx_a;
+	dm->dm_fat_table.antsel_rx_keep_1 = phy_sts->antidx_b;
+	dm->dm_fat_table.antsel_rx_keep_2 = phy_sts->antidx_c;
+	dm->dm_fat_table.antsel_rx_keep_3 = phy_sts->antidx_d;
+	#endif
 }
 
-void
-phydm_get_rx_phy_status_type1(
-	struct PHY_DM_STRUCT		*p_dm,
-	u8							*p_phy_status,
-	struct phydm_perpkt_info_struct		*p_pktinfo,
-	struct phydm_phyinfo_struct	*p_phy_info
-)
+void phydm_get_phy_sts_type1(struct dm_struct *dm, u8 *phy_status_inf,
+			     struct phydm_perpkt_info_struct *pktinfo,
+			     struct phydm_phyinfo_struct *phy_info)
 {
 	/* type 1 is used for ofdm packet */
-
-	struct _phy_status_rpt_jaguar2_type1	*p_phy_sta_rpt = (struct _phy_status_rpt_jaguar2_type1 *)p_phy_status;
-	s8							rx_pwr_db = -120;
-	u8							i, rxsc, bw = CHANNEL_WIDTH_20, rx_count = 0;
-	boolean						is_mu;
-	u8							num_ss;
-
-	/* Update OFDM packet counter */
-	p_dm->phy_dbg_info.num_qry_phy_status_ofdm++;
+	struct phy_sts_rpt_jgr2_type1 *phy_sts = NULL;
+	struct odm_phy_dbg_info *dbg_i = &dm->phy_dbg_info;
+	s8 rx_pwr_db = -120;
+	s8 rx_pwr = 0;
+	u8 i, rxsc, bw = CHANNEL_WIDTH_20, rx_count = 0;
+	boolean is_mu;
+	u8 ant_idx[4];
+
+	phy_sts = (struct phy_sts_rpt_jgr2_type1 *)phy_status_inf;
+
+	/* Fill in per-path antenna index */
+	ant_idx[0] = phy_sts->antidx_a;
+	ant_idx[1] = phy_sts->antidx_b;
+	ant_idx[2] = phy_sts->antidx_c;
+	ant_idx[3] = phy_sts->antidx_d;
 
 	/* Update per-path information */
-	for (i = RF_PATH_A; i < ODM_RF_PATH_MAX_JAGUAR; i++) {
-		if (p_dm->rx_ant_status & BIT(i)) {
-			s8	rx_path_pwr_db;
-
-			/* RX path counter */
-			rx_count++;
-
-			/* Update per-path information (RSSI_dB RSSI_percentage EVM SNR CFO SQ) */
-			/* EVM report is reported by stream, not path */
-			rx_path_pwr_db = p_phy_sta_rpt->pwdb[i] - 110;					/* per-path pwdb in dB domain */
+	for (i = RF_PATH_A; i < PHYDM_MAX_RF_PATH; i++) {
+		if (!(dm->rx_ant_status & BIT(i)))
+			continue;
+		rx_count++;
 
-			if (p_pktinfo->is_to_self)
-				p_dm->ofdm_agc_idx[i] = p_phy_sta_rpt->pwdb[i];
-
-			phydm_set_per_path_phy_info(i, rx_path_pwr_db, p_phy_sta_rpt->rxevm[rx_count - 1],
-				p_phy_sta_rpt->cfo_tail[i], p_phy_sta_rpt->rxsnr[i], p_phy_info);
+		if (rx_count > dm->num_rf_path)
+			break;
 
-			/* search maximum pwdb */
-			if (rx_path_pwr_db > rx_pwr_db)
-				rx_pwr_db = rx_path_pwr_db;
-		}
+		/* Update per-path information
+		 * (RSSI_dB RSSI_percentage EVM SNR CFO sq)
+		 */
+		/* @EVM report is reported by stream, not path */
+		rx_pwr = phy_sts->pwdb[i] - 110; /* per-path pwdb(dB)*/
+
+		if (pktinfo->is_to_self)
+			dm->ofdm_agc_idx[i] = phy_sts->pwdb[i];
+
+		phydm_set_per_path_phy_info(i, rx_pwr,
+					    phy_sts->rxevm[rx_count - 1],
+					    phy_sts->cfo_tail[i],
+					    phy_sts->rxsnr[i],
+					    ant_idx[i], phy_info);
+		/* search maximum pwdb */
+		if (rx_pwr > rx_pwr_db)
+			rx_pwr_db = rx_pwr;
 	}
 
-	/* mapping RX counter from 1~4 to 0~3 */
+	/* @mapping RX counter from 1~4 to 0~3 */
 	if (rx_count > 0)
-		p_phy_info->rx_count = rx_count - 1;
+		phy_info->rx_count = rx_count - 1;
 
-	/* Check if MU packet or not */
-	if ((p_phy_sta_rpt->gid != 0) && (p_phy_sta_rpt->gid != 63)) {
+	/* @Check if MU packet or not */
+	if (phy_sts->gid != 0 && phy_sts->gid != 63) {
 		is_mu = true;
-		p_dm->phy_dbg_info.num_qry_mu_pkt++;
-	} else
+		dbg_i->num_qry_mu_pkt++;
+	} else {
 		is_mu = false;
+	}
 
-	/* count BF packet */
-	p_dm->phy_dbg_info.num_qry_bf_pkt = p_dm->phy_dbg_info.num_qry_bf_pkt + p_phy_sta_rpt->beamformed;
+	/* @count BF packet */
+	dbg_i->num_qry_bf_pkt = dbg_i->num_qry_bf_pkt + phy_sts->beamformed;
 
 	/*STBC or LDPC pkt*/
-	p_dm->phy_dbg_info.is_ldpc_pkt = p_phy_sta_rpt->ldpc;
-	p_dm->phy_dbg_info.is_stbc_pkt = p_phy_sta_rpt->stbc;
+	dbg_i->is_ldpc_pkt = phy_sts->ldpc;
+	dbg_i->is_stbc_pkt = phy_sts->stbc;
 
-	/* Check sub-channel */
-	if ((p_pktinfo->data_rate > ODM_RATE11M) && (p_pktinfo->data_rate < ODM_RATEMCS0))
-		rxsc = p_phy_sta_rpt->l_rxsc;
+	/* @Check sub-channel */
+	if (pktinfo->data_rate > ODM_RATE11M &&
+	    pktinfo->data_rate < ODM_RATEMCS0)
+		rxsc = phy_sts->l_rxsc;
 	else
-		rxsc = p_phy_sta_rpt->ht_rxsc;
+		rxsc = phy_sts->ht_rxsc;
 
-	/* Check RX bandwidth */
-	if (p_dm->support_ic_type & ODM_RTL8822B) {
-		if ((rxsc >= 1) && (rxsc <= 8))
+	/* @Check RX bandwidth */
+	if (dm->support_ic_type & ODM_IC_11AC_SERIES) {
+		if (rxsc >= 1 && rxsc <= 8)
 			bw = CHANNEL_WIDTH_20;
 		else if ((rxsc >= 9) && (rxsc <= 12))
 			bw = CHANNEL_WIDTH_40;
 		else if (rxsc >= 13)
 			bw = CHANNEL_WIDTH_80;
 		else
-			bw = p_phy_sta_rpt->rf_mode;
-	} else if (p_dm->support_ic_type & (ODM_RTL8197F | ODM_RTL8723D | ODM_RTL8710B)) {
-		if (p_phy_sta_rpt->rf_mode == 0)
+			bw = phy_sts->rf_mode;
+
+	} else if (dm->support_ic_type & ODM_IC_11N_SERIES) {
+		if (phy_sts->rf_mode == 0)
 			bw = CHANNEL_WIDTH_20;
 		else if ((rxsc == 1) || (rxsc == 2))
 			bw = CHANNEL_WIDTH_20;
@@ -2216,366 +2850,337 @@ phydm_get_rx_phy_status_type1(
 	}
 
 	/* Update packet information */
-	phydm_set_common_phy_info(rx_pwr_db, p_phy_sta_rpt->channel, (boolean)p_phy_sta_rpt->beamformed,
-		is_mu, bw, p_phy_info->rx_mimo_signal_quality[0], rxsc, p_phy_info);
-
-	num_ss = phydm_rate_to_num_ss(p_dm, p_pktinfo->data_rate);
-
-	odm_parsing_cfo(p_dm, p_pktinfo, p_phy_sta_rpt->cfo_tail, num_ss);
-	p_dm->dm_fat_table.antsel_rx_keep_0 = p_phy_sta_rpt->antidx_a;
-	p_dm->dm_fat_table.antsel_rx_keep_1 = p_phy_sta_rpt->antidx_b;
-	p_dm->dm_fat_table.antsel_rx_keep_2 = p_phy_sta_rpt->antidx_c;
-	p_dm->dm_fat_table.antsel_rx_keep_3 = p_phy_sta_rpt->antidx_d;
-
-	#if 0
-	if (p_pktinfo->is_packet_match_bssid) {
-
-		dbg_print("channel = %d, band = %d, l_rxsc = %d, ht_rxsc = %d, rf_mode = %d\n", p_phy_sta_rpt->channel, p_phy_sta_rpt->band, p_phy_sta_rpt->l_rxsc, p_phy_sta_rpt->ht_rxsc, p_phy_sta_rpt->rf_mode);
-		dbg_print("Antidx A = %d, B = %d, C = %d, D = %d\n", p_phy_sta_rpt->antidx_a, p_phy_sta_rpt->antidx_b, p_phy_sta_rpt->antidx_c, p_phy_sta_rpt->antidx_d);
-		dbg_print("pwdb A: 0x%x, B: 0x%x, C: 0x%x, D: 0x%x\n", p_phy_sta_rpt->pwdb[0], p_phy_sta_rpt->pwdb[1], p_phy_sta_rpt->pwdb[2], p_phy_sta_rpt->pwdb[3]);
-		dbg_print("EVM  A: %d, B: %d, C: %d, D: %d\n", p_phy_sta_rpt->rxevm[0], p_phy_sta_rpt->rxevm[1], p_phy_sta_rpt->rxevm[2], p_phy_sta_rpt->rxevm[3]);
-		dbg_print("SNR  A: %d, B: %d, C: %d, D: %d\n", p_phy_sta_rpt->rxsnr[0], p_phy_sta_rpt->rxsnr[1], p_phy_sta_rpt->rxsnr[2], p_phy_sta_rpt->rxsnr[3]);
-		dbg_print("CFO  A: %d, B: %d, C: %d, D: %d\n", p_phy_sta_rpt->cfo_tail[0], p_phy_sta_rpt->cfo_tail[1], p_phy_sta_rpt->cfo_tail[2], p_phy_sta_rpt->cfo_tail[3]);
-		dbg_print("paid = %d, gid = %d, length = %d\n", (p_phy_sta_rpt->paid + (p_phy_sta_rpt->paid_msb<<8)), p_phy_sta_rpt->gid, p_phy_sta_rpt->lsig_length);
-		dbg_print("ldpc: %d, stbc: %d, bf: %d, gnt_bt: %d, antsw: %d\n", p_phy_sta_rpt->ldpc, p_phy_sta_rpt->stbc, p_phy_sta_rpt->beamformed, p_phy_sta_rpt->gnt_bt, p_phy_sta_rpt->hw_antsw_occu);
-		dbg_print("NBI: %d, pos: %d\n", p_phy_sta_rpt->nb_intf_flag, (p_phy_sta_rpt->intf_pos + (p_phy_sta_rpt->intf_pos_msb<<8)));
-		dbg_print("rsvd_0 = %d, rsvd_1 = %d, rsvd_2 = %d, rsvd_3 = %d, rsvd_4 = %d, rsvd_5 = %d\n", p_phy_sta_rpt->rsvd_0, p_phy_sta_rpt->rsvd_1, p_phy_sta_rpt->rsvd_2, p_phy_sta_rpt->rsvd_3, p_phy_sta_rpt->rsvd_4, p_phy_sta_rpt->rsvd_5);
-
-	}
+	phydm_set_common_phy_info(rx_pwr_db, phy_sts->channel,
+				  (boolean)phy_sts->beamformed, is_mu, bw,
+				  phy_info->rx_mimo_signal_quality[0],
+				  rxsc, phy_info);
+
+	phydm_parsing_cfo(dm, pktinfo, phy_sts->cfo_tail, pktinfo->rate_ss);
+	#ifdef PHYDM_LNA_SAT_CHK_TYPE2
+	phydm_parsing_snr(dm, pktinfo, phy_sts->rxsnr);
+	#endif
 
-	dbg_print("phydm_get_rx_phy_status_type1   p_pktinfo->is_packet_match_bssid = %d\n", p_pktinfo->is_packet_match_bssid);
-	dbg_print("p_pktinfo->data_rate = 0x%x\n", p_pktinfo->data_rate);
+	#if (defined(CONFIG_PHYDM_ANTENNA_DIVERSITY))
+	dm->dm_fat_table.antsel_rx_keep_0 = phy_sts->antidx_a;
+	dm->dm_fat_table.antsel_rx_keep_1 = phy_sts->antidx_b;
+	dm->dm_fat_table.antsel_rx_keep_2 = phy_sts->antidx_c;
+	dm->dm_fat_table.antsel_rx_keep_3 = phy_sts->antidx_d;
 	#endif
 }
 
-void
-phydm_get_rx_phy_status_type2(
-	struct PHY_DM_STRUCT						*p_dm,
-	u8							*p_phy_status,
-	struct phydm_perpkt_info_struct				*p_pktinfo,
-	struct phydm_phyinfo_struct				*p_phy_info
-)
+void phydm_get_phy_sts_type2(struct dm_struct *dm, u8 *phy_status_inf,
+			     struct phydm_perpkt_info_struct *pktinfo,
+			     struct phydm_phyinfo_struct *phy_info)
 {
-	struct _phy_status_rpt_jaguar2_type2	*p_phy_sta_rpt = (struct _phy_status_rpt_jaguar2_type2 *)p_phy_status;
-	s8							rx_pwr_db = -120;
-	u8							i, rxsc, bw = CHANNEL_WIDTH_20, rx_count = 0;
+	struct phy_sts_rpt_jgr2_type2 *phy_sts = NULL;
+	s8 rx_pwr_db_max = -120;
+	s8 rx_pwr = 0;
+	u8 i, rxsc, bw = CHANNEL_WIDTH_20, rx_count = 0;
 
-	/* Update OFDM packet counter */
-	p_dm->phy_dbg_info.num_qry_phy_status_ofdm++;
+	phy_sts = (struct phy_sts_rpt_jgr2_type2 *)phy_status_inf;
 
-	/* Update per-path information */
-	for (i = RF_PATH_A; i < ODM_RF_PATH_MAX_JAGUAR; i++) {
-		if (p_dm->rx_ant_status & BIT(i)) {
-			s8	rx_path_pwr_db;
-
-			/* RX path counter */
-			rx_count++;
-
-			/* Update per-path information (RSSI_dB RSSI_percentage EVM SNR CFO SQ) */
-#if (RTL8197F_SUPPORT == 1)
-			if ((p_dm->support_ic_type & ODM_RTL8197F) && (p_phy_sta_rpt->pwdb[i] == 0x7f)) { /*for 97f workaround*/
-
-				if (i == RF_PATH_A) {
-					rx_path_pwr_db = (p_phy_sta_rpt->gain_a) << 1;
-					rx_path_pwr_db = rx_path_pwr_db - 110;
-				} else if (i == RF_PATH_B) {
-					rx_path_pwr_db = (p_phy_sta_rpt->gain_b) << 1;
-					rx_path_pwr_db = rx_path_pwr_db - 110;
-				} else
-					rx_path_pwr_db = 0;
-			} else
-#endif
-				rx_path_pwr_db = p_phy_sta_rpt->pwdb[i] - 110;					/* per-path pwdb in dB domain */
+	for (i = RF_PATH_A; i < PHYDM_MAX_RF_PATH; i++) {
+		if (!(dm->rx_ant_status & BIT(i)))
+			continue;
+		rx_count++;
 
-			phydm_set_per_path_phy_info(i, rx_path_pwr_db, 0, 0, 0, p_phy_info);
+		if (rx_count > dm->num_rf_path)
+			break;
 
-			/* search maximum pwdb */
-			if (rx_path_pwr_db > rx_pwr_db)
-				rx_pwr_db = rx_path_pwr_db;
-		}
+		/* Update per-path information*/
+		/* RSSI_dB, RSSI_percentage, EVM, SNR, CFO, sq */
+		#if (RTL8197F_SUPPORT)
+		if ((dm->support_ic_type & ODM_RTL8197F) &&
+		    phy_sts->pwdb[i] == 0x7f) { /*@97f workaround*/
+
+			if (i == RF_PATH_A) {
+				rx_pwr = (phy_sts->gain_a) << 1;
+				rx_pwr = rx_pwr - 110;
+			} else if (i == RF_PATH_B) {
+				rx_pwr = (phy_sts->gain_b) << 1;
+				rx_pwr = rx_pwr - 110;
+			} else {
+				rx_pwr = 0;
+			}
+		} else
+		#endif
+			rx_pwr = phy_sts->pwdb[i] - 110; /*@dBm*/
+
+		phydm_set_per_path_phy_info(i, rx_pwr, 0, 0, 0, 0, phy_info);
+
+		if (rx_pwr > rx_pwr_db_max) /* search max pwdb */
+			rx_pwr_db_max = rx_pwr;
 	}
 
-	/* mapping RX counter from 1~4 to 0~3 */
+	/* @mapping RX counter from 1~4 to 0~3 */
 	if (rx_count > 0)
-		p_phy_info->rx_count = rx_count - 1;
+		phy_info->rx_count = rx_count - 1;
 
-	/* Check RX sub-channel */
-	if ((p_pktinfo->data_rate > ODM_RATE11M) && (p_pktinfo->data_rate < ODM_RATEMCS0))
-		rxsc = p_phy_sta_rpt->l_rxsc;
+	/* @Check RX sub-channel */
+	if (pktinfo->data_rate > ODM_RATE11M &&
+	    pktinfo->data_rate < ODM_RATEMCS0)
+		rxsc = phy_sts->l_rxsc;
 	else
-		rxsc = p_phy_sta_rpt->ht_rxsc;
+		rxsc = phy_sts->ht_rxsc;
 
 	/*STBC or LDPC pkt*/
-	p_dm->phy_dbg_info.is_ldpc_pkt = p_phy_sta_rpt->ldpc;
-	p_dm->phy_dbg_info.is_stbc_pkt = p_phy_sta_rpt->stbc;
-
-	/* Check RX bandwidth */
-	/* the BW information of sc=0 is useless, because there is no information of RF mode*/
-
-	if (p_dm->support_ic_type & ODM_RTL8822B) {
-		if ((rxsc >= 1) && (rxsc <= 8))
+	dm->phy_dbg_info.is_ldpc_pkt = phy_sts->ldpc;
+	dm->phy_dbg_info.is_stbc_pkt = phy_sts->stbc;
+
+	/* @Check RX bandwidth */
+	/* @BW information of sc=0 is useless,
+	 *because there is no information of RF mode
+	 */
+	if (dm->support_ic_type & ODM_IC_11AC_SERIES) {
+		if (rxsc >= 1 && rxsc <= 8)
 			bw = CHANNEL_WIDTH_20;
 		else if ((rxsc >= 9) && (rxsc <= 12))
 			bw = CHANNEL_WIDTH_40;
 		else if (rxsc >= 13)
 			bw = CHANNEL_WIDTH_80;
-		else
-			bw = CHANNEL_WIDTH_20;
-	} else if (p_dm->support_ic_type & (ODM_RTL8197F | ODM_RTL8723D | ODM_RTL8710B)) {/* JJ ADD 20161014 */
+
+	} else if (dm->support_ic_type & ODM_IC_11N_SERIES) {
 		if (rxsc == 3)
 			bw = CHANNEL_WIDTH_40;
 		else if ((rxsc == 1) || (rxsc == 2))
 			bw = CHANNEL_WIDTH_20;
-		else
-			bw = CHANNEL_WIDTH_20;
 	}
 
 	/* Update packet information */
-	phydm_set_common_phy_info(rx_pwr_db, p_phy_sta_rpt->channel, (boolean)p_phy_sta_rpt->beamformed,
-				  false, bw, 0, rxsc, p_phy_info);
-
-#if 0
-	/* if (p_pktinfo->is_packet_match_bssid) */
-	{
-		dbg_print("channel = %d, band = %d, l_rxsc = %d, ht_rxsc = %d\n", p_phy_sta_rpt->channel, p_phy_sta_rpt->band, p_phy_sta_rpt->l_rxsc, p_phy_sta_rpt->ht_rxsc);
-		dbg_print("pwdb A: 0x%x, B: 0x%x, C: 0x%x, D: 0x%x\n", p_phy_sta_rpt->pwdb[0], p_phy_sta_rpt->pwdb[1], p_phy_sta_rpt->pwdb[2], p_phy_sta_rpt->pwdb[3]);
-		dbg_print("Agc table A: 0x%x, B: 0x%x, C: 0x%x, D: 0x%x\n", p_phy_sta_rpt->agc_table_a, p_phy_sta_rpt->agc_table_b, p_phy_sta_rpt->agc_table_c, p_phy_sta_rpt->agc_table_d);
-		dbg_print("Gain A: 0x%x, B: 0x%x, C: 0x%x, D: 0x%x\n", p_phy_sta_rpt->gain_a, p_phy_sta_rpt->gain_b, p_phy_sta_rpt->gain_c, p_phy_sta_rpt->gain_d);
-		dbg_print("TRSW A: 0x%x, B: 0x%x, C: 0x%x, D: 0x%x\n", p_phy_sta_rpt->trsw_a, p_phy_sta_rpt->trsw_b, p_phy_sta_rpt->trsw_c, p_phy_sta_rpt->trsw_d);
-		dbg_print("AAGC step A: 0x%x, B: 0x%x, C: 0x%x, D: 0x%x\n", p_phy_sta_rpt->aagc_step_a, p_phy_sta_rpt->aagc_step_b, p_phy_sta_rpt->aagc_step_c, p_phy_sta_rpt->aagc_step_d);
-		dbg_print("HT AAGC gain A: 0x%x, B: 0x%x, C: 0x%x, D: 0x%x\n", p_phy_sta_rpt->ht_aagc_gain[0], p_phy_sta_rpt->ht_aagc_gain[1], p_phy_sta_rpt->ht_aagc_gain[2], p_phy_sta_rpt->ht_aagc_gain[3]);
-		dbg_print("DAGC gain A: 0x%x, B: 0x%x, C: 0x%x, D: 0x%x\n", p_phy_sta_rpt->dagc_gain[0], p_phy_sta_rpt->dagc_gain[1], p_phy_sta_rpt->dagc_gain[2], p_phy_sta_rpt->dagc_gain[3]);
-		dbg_print("ldpc: %d, stbc: %d, bf: %d, gnt_bt: %d, antsw: %d\n", p_phy_sta_rpt->ldpc, p_phy_sta_rpt->stbc, p_phy_sta_rpt->beamformed, p_phy_sta_rpt->gnt_bt, p_phy_sta_rpt->hw_antsw_occu);
-		dbg_print("counter: %d, syn_count: %d\n", p_phy_sta_rpt->counter, p_phy_sta_rpt->syn_count);
-		dbg_print("cnt_cca2agc_rdy: %d, cnt_pw2cca: %d, shift_l_map\n", p_phy_sta_rpt->cnt_cca2agc_rdy, p_phy_sta_rpt->cnt_pw2cca, p_phy_sta_rpt->shift_l_map);
-		dbg_print("rsvd_0 = %d, rsvd_1 = %d, rsvd_2 = %d, rsvd_3 = %d, rsvd_4 = %d, rsvd_5 = %d\n", p_phy_sta_rpt->rsvd_0, p_phy_sta_rpt->rsvd_1, p_phy_sta_rpt->rsvd_2, p_phy_sta_rpt->rsvd_3, p_phy_sta_rpt->rsvd_4);
-		dbg_print("rsvd_5 = %d, rsvd_6 = %d, rsvd_6 = %d\n", p_phy_sta_rpt->rsvd_5, p_phy_sta_rpt->rsvd_6, p_phy_sta_rpt->rsvd_7);
-	}
-#endif
-}
-
-void
-phydm_get_rx_phy_status_type5(
-	u8				*p_phy_status
-)
-{
-	/*
-		dbg_print("DW0: 0x%02x%02x%02x%02x\n", *(p_phy_status + 3), *(p_phy_status + 2), *(p_phy_status + 1), *(p_phy_status + 0));
-		dbg_print("DW1: 0x%02x%02x%02x%02x\n", *(p_phy_status + 7), *(p_phy_status + 6), *(p_phy_status + 5), *(p_phy_status + 4));
-		dbg_print("DW2: 0x%02x%02x%02x%02x\n", *(p_phy_status + 11), *(p_phy_status + 10), *(p_phy_status + 9), *(p_phy_status + 8));
-		dbg_print("DW3: 0x%02x%02x%02x%02x\n", *(p_phy_status + 15), *(p_phy_status + 14), *(p_phy_status + 13), *(p_phy_status + 12));
-		dbg_print("DW4: 0x%02x%02x%02x%02x\n", *(p_phy_status + 19), *(p_phy_status + 18), *(p_phy_status + 17), *(p_phy_status + 16));
-		dbg_print("DW5: 0x%02x%02x%02x%02x\n", *(p_phy_status + 23), *(p_phy_status + 22), *(p_phy_status + 21), *(p_phy_status + 20));
-		dbg_print("DW6: 0x%02x%02x%02x%02x\n", *(p_phy_status + 27), *(p_phy_status + 26), *(p_phy_status + 25), *(p_phy_status + 24));
-	*/
+	phydm_set_common_phy_info(rx_pwr_db_max, phy_sts->channel,
+				  (boolean)phy_sts->beamformed,
+				  false, bw, 0, rxsc, phy_info);
 }
 
-void
-phydm_process_rssi_for_dm_new_type(
-	struct PHY_DM_STRUCT			*p_dm,
-	struct phydm_phyinfo_struct		*p_phy_info,
-	struct phydm_perpkt_info_struct			*p_pktinfo
-)
+void phydm_process_rssi_for_dm_2nd_type(struct dm_struct *dm,
+					struct phydm_phyinfo_struct *phy_info,
+					struct phydm_perpkt_info_struct *pktinfo
+					)
 {
-	s32				undecorated_smoothed_pwdb, accumulate_pwdb;
-	u32				rssi_ave, rssi_linear = 0;
-	u8				i;
-	struct cmn_sta_info	*p_sta;
-	u8				scaling_factor = 4;
-	u8				is_cck_rate = (p_pktinfo->data_rate <= ODM_RATE11M) ? true : false;
-
-	if (p_pktinfo->station_id >= ODM_ASSOCIATE_ENTRY_NUM)
+	struct cmn_sta_info *sta = NULL;
+	struct rssi_info *rssi_t = NULL;
+	u8 rssi_tmp = 0;
+	u64 rssi_linear = 0;
+	s16 rssi_db = 0;
+	u8 i = 0;
+
+	if (pktinfo->station_id >= ODM_ASSOCIATE_ENTRY_NUM)
 		return;
 
-	p_sta = p_dm->p_phydm_sta_info[p_pktinfo->station_id];
+	sta = dm->phydm_sta_info[pktinfo->station_id];
 
-	if (!is_sta_active(p_sta))
+	if (!is_sta_active(sta))
 		return;
 
-	if ((!p_pktinfo->is_packet_match_bssid))/*data frame only*/
+	if (!pktinfo->is_packet_match_bssid) /*@data frame only*/
 		return;
 
-	if (p_pktinfo->is_packet_beacon)
-		p_dm->phy_dbg_info.num_qry_beacon_pkt++;
-
 #if (defined(CONFIG_PHYDM_ANTENNA_DIVERSITY))
-	if (p_dm->support_ability & ODM_BB_ANT_DIV)
-		odm_process_rssi_for_ant_div(p_dm, p_phy_info, p_pktinfo);
+	if (dm->support_ability & ODM_BB_ANT_DIV)
+		odm_process_rssi_for_ant_div(dm, phy_info, pktinfo);
 #endif
 
-#ifdef CONFIG_DYNAMIC_RX_PATH
-	phydm_process_phy_status_for_dynamic_rx_path(p_dm, p_phy_info, p_pktinfo);
+#ifdef CONFIG_ADAPTIVE_SOML
+	phydm_rx_qam_for_soml(dm, pktinfo);
+	phydm_rx_rate_for_soml(dm, pktinfo);
 #endif
 
-	if (p_pktinfo->is_packet_to_self || p_pktinfo->is_packet_beacon) {
-
-		p_dm->rx_rate = p_pktinfo->data_rate;
-		undecorated_smoothed_pwdb = p_sta->rssi_stat.rssi;
-		accumulate_pwdb = p_dm->accumulate_pwdb[p_pktinfo->station_id];
-		p_dm->RSSI_A = p_phy_info->rx_mimo_signal_strength[RF_PATH_A];
-		p_dm->RSSI_B = p_phy_info->rx_mimo_signal_strength[RF_PATH_B];
-		p_dm->RSSI_C = p_phy_info->rx_mimo_signal_strength[RF_PATH_C];
-		p_dm->RSSI_D = p_phy_info->rx_mimo_signal_strength[RF_PATH_D];
-
-		for (i = RF_PATH_A; i < ODM_RF_PATH_MAX_JAGUAR; i++) {
-			if (p_phy_info->rx_mimo_signal_strength[i] != 0)
-				rssi_linear += odm_convert_to_linear(p_phy_info->rx_mimo_signal_strength[i]);
-		}
+	if (!(pktinfo->is_packet_to_self) && !(pktinfo->is_packet_beacon))
+		return;
 
-		switch (p_phy_info->rx_count + 1) {
-		case 2:
-			rssi_linear = (rssi_linear >> 1);
-			break;
-		case 3:
-			rssi_linear = ((rssi_linear) + (rssi_linear << 1) + (rssi_linear << 3)) >> 5;	/* RSSI_linear/3 ~ RSSI_linear*11/32 */
-			break;
-		case 4:
-			rssi_linear = (rssi_linear >> 2);
-			break;
-		}
-		rssi_ave = odm_convert_to_db(rssi_linear);
+	if (pktinfo->is_packet_beacon) {
+		dm->phy_dbg_info.num_qry_beacon_pkt++;
+		dm->phy_dbg_info.beacon_phy_rate = pktinfo->data_rate;
+	}
 
-		if (undecorated_smoothed_pwdb <= 0) {
-			accumulate_pwdb = (p_phy_info->rx_pwdb_all << scaling_factor);
-			undecorated_smoothed_pwdb = p_phy_info->rx_pwdb_all;
-		} else {
-			accumulate_pwdb = accumulate_pwdb - (accumulate_pwdb >> scaling_factor) + rssi_ave;
-			undecorated_smoothed_pwdb = (accumulate_pwdb + (1 << (scaling_factor - 1))) >> scaling_factor;
-		}
+	rssi_t = &sta->rssi_stat;
 
-		p_sta->rssi_stat.rssi = (s8)undecorated_smoothed_pwdb;
+	for (i = RF_PATH_A; i < PHYDM_MAX_RF_PATH; i++) {
+		rssi_tmp = phy_info->rx_mimo_signal_strength[i];
+		if (rssi_tmp != 0)
+			rssi_linear += phydm_db_2_linear(rssi_tmp);
+	}
+	/* @Rounding and removing fractional bits */
+	rssi_linear = (rssi_linear + (1 << (FRAC_BITS - 1))) >> FRAC_BITS;
 
-		if (is_cck_rate)
-			p_sta->rssi_stat.rssi_cck = (s8)rssi_ave;
-		else
-			p_sta->rssi_stat.rssi_ofdm = (s8)rssi_ave;
+	switch (phy_info->rx_count + 1) {
+	case 2:
+		rssi_linear = DIVIDED_2(rssi_linear);
+		break;
+	case 3:
+		rssi_linear = DIVIDED_3(rssi_linear);
+		break;
+	case 4:
+		rssi_linear = DIVIDED_4(rssi_linear);
+		break;
+	}
 
+	rssi_db = (s16)odm_convert_to_db(rssi_linear);
 
-		p_dm->accumulate_pwdb[p_pktinfo->station_id] = accumulate_pwdb;
+	if (rssi_t->rssi_acc == 0) {
+		rssi_t->rssi_acc = (s16)(rssi_db << RSSI_MA);
+		rssi_t->rssi = (s8)(rssi_db);
+	} else {
+		rssi_t->rssi_acc = MA_ACC(rssi_t->rssi_acc, rssi_db, RSSI_MA);
+		rssi_t->rssi = (s8)GET_MA_VAL(rssi_t->rssi_acc, RSSI_MA);
+	}
 
-#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN))
-		if (p_pktinfo->station_id == 0) {
-			HAL_DATA_TYPE	*p_hal_data = GET_HAL_DATA(p_dm->adapter);
+	#if 0
+	PHYDM_DBG(dm, DBG_TMP, "RSSI[%d]{A,B,C,D}={%d, %d, %d, %d} AVG=%d\n",
+		  pktinfo->station_id,
+		  phy_info->rx_mimo_signal_strength[0],
+		  phy_info->rx_mimo_signal_strength[1],
+		  phy_info->rx_mimo_signal_strength[2],
+		  phy_info->rx_mimo_signal_strength[3], rssi_db);
+	PHYDM_DBG(dm, DBG_TMP, "rssi_acc = %d, rssi=%d\n",
+		  rssi_t->rssi_acc, rssi_t->rssi);
+	#endif
 
-			p_hal_data->UndecoratedSmoothedPWDB = undecorated_smoothed_pwdb;
-		}
-#endif
-	}
+	if (pktinfo->is_cck_rate)
+		rssi_t->rssi_cck = (s8)rssi_db;
+	else
+		rssi_t->rssi_ofdm = (s8)rssi_db;
 }
 
-void
-phydm_rx_phy_status_new_type(
-	void							*p_dm_void,
-	u8							*p_phy_status,
-	struct phydm_perpkt_info_struct		*p_pktinfo,
-	struct phydm_phyinfo_struct	*p_phy_info
-)
+void phydm_rx_physts_2nd_type(void *dm_void, u8 *phy_sts,
+			      struct phydm_perpkt_info_struct *pktinfo,
+			      struct phydm_phyinfo_struct *phy_info)
 {
-	struct PHY_DM_STRUCT		*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
 #ifdef PHYDM_PHYSTAUS_SMP_MODE
-	struct pkt_process_info			*p_pkt_process = &(p_dm->pkt_proc_struct);
+	struct pkt_process_info *pkt_process = &dm->pkt_proc_struct;
 #endif
-	u8		phy_status_type = (*p_phy_status & 0xf);
+	u8 page = (*phy_sts & 0xf);
 
 #ifdef PHYDM_PHYSTAUS_SMP_MODE
-	if (p_pkt_process->phystatus_smp_mode_en && phy_status_type != 0) {
-
-		if (p_pkt_process->pre_ppdu_cnt == p_pktinfo->ppdu_cnt)
+	if (pkt_process->phystatus_smp_mode_en && page != 0) {
+		if (pkt_process->pre_ppdu_cnt == pktinfo->ppdu_cnt)
 			return;
 
-		p_pkt_process->pre_ppdu_cnt = p_pktinfo->ppdu_cnt;
+		pkt_process->pre_ppdu_cnt = pktinfo->ppdu_cnt;
 	}
 #endif
 
-	/*dbg_print("phydm_rx_phy_status_new_type================> (page: %d)\n", phy_status_type);*/
-
-	/* Memory reset */
-	phydm_reset_phy_info(p_dm, p_phy_info);
-	p_dm->rate_ss = phydm_rate_to_num_ss(p_dm, p_pktinfo->data_rate);
+	phydm_reset_phy_info(dm, phy_info); /* @Memory reset */
 
 	/* Phy status parsing */
-	switch (phy_status_type) {
-	case 0:	/*CCK*/
-		phydm_get_rx_phy_status_type0(p_dm, p_phy_status, p_pktinfo, p_phy_info);
+	switch (page) {
+	case 0: /*@CCK*/
+		phydm_get_phy_sts_type0(dm, phy_sts, pktinfo, phy_info);
 		break;
 	case 1:
-		phydm_get_rx_phy_status_type1(p_dm, p_phy_status, p_pktinfo, p_phy_info);
+		phydm_get_phy_sts_type1(dm, phy_sts, pktinfo, phy_info);
 		break;
 	case 2:
-		phydm_get_rx_phy_status_type2(p_dm, p_phy_status, p_pktinfo, p_phy_info);
+		phydm_get_phy_sts_type2(dm, phy_sts, pktinfo, phy_info);
 		break;
-#if 0
-	case 5:
-		phydm_get_rx_phy_status_type5(p_phy_status);
-		return;
-#endif
 	default:
-		return;
-	}
-
-	if (p_pktinfo->is_packet_match_bssid) {
-		phydm_avg_phystatus_index(p_dm, p_phy_info, p_pktinfo);
-		phydm_rx_statistic_cal(p_dm, p_phy_status, p_pktinfo);
+		break;
 	}
 
-	/* Update signal strength to UI, and p_phy_info->rx_pwdb_all is the maximum RSSI of all path */
-#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
-	p_phy_info->signal_strength = SignalScaleProc(p_dm->adapter, p_phy_info->rx_pwdb_all, false, false);
-#elif (DM_ODM_SUPPORT_TYPE == ODM_CE)
-	p_phy_info->signal_strength = (u8)(phydm_signal_scale_mapping(p_dm, p_phy_info->rx_pwdb_all));
+#if (RTL8822B_SUPPORT || RTL8821C_SUPPORT || RTL8195B_SUPPORT)
+	if (dm->support_ic_type & (ODM_RTL8822B | ODM_RTL8821C | ODM_RTL8195B))
+		phydm_print_phy_sts_jgr2(dm, phy_sts, pktinfo, phy_info);
 #endif
-
-
-
 }
-/*==============================================*/
+
+/*@==============================================*/
 #endif
 
-void
-odm_phy_status_query(
-	struct PHY_DM_STRUCT		*p_dm,
-	struct phydm_phyinfo_struct	*p_phy_info,
-	u8							*p_phy_status,
-	struct phydm_perpkt_info_struct		*p_pktinfo
-)
+void odm_phy_status_query(struct dm_struct *dm,
+			  struct phydm_phyinfo_struct *phy_info,
+			  u8 *phy_status_inf,
+			  struct phydm_perpkt_info_struct *pktinfo)
 {
+	u8 rate = pktinfo->data_rate;
 
-	if (p_dm->support_ic_type & ODM_IC_PHY_STATUE_NEW_TYPE) {
-		#if (ODM_PHY_STATUS_NEW_TYPE_SUPPORT == 1)
-		phydm_rx_phy_status_new_type(p_dm, p_phy_status, p_pktinfo, p_phy_info);
-		phydm_process_rssi_for_dm_new_type(p_dm, p_phy_info, p_pktinfo);
+	pktinfo->is_cck_rate = (rate <= ODM_RATE11M) ? true : false;
+	pktinfo->rate_ss = phydm_rate_to_num_ss(dm, rate);
+	dm->rate_ss = pktinfo->rate_ss; /*@For AP EVM SW antenna diversity use*/
+
+	if (pktinfo->is_cck_rate)
+		dm->phy_dbg_info.num_qry_phy_status_cck++;
+	else
+		dm->phy_dbg_info.num_qry_phy_status_ofdm++;
+
+	/*Reset phy_info*/
+	odm_memory_set(dm, phy_info->rx_mimo_signal_strength, 0, 4);
+	odm_memory_set(dm, phy_info->rx_mimo_signal_quality, 0, 4);
+	if (dm->support_ic_type & PHYSTS_3RD_TYPE_IC) {
+		#ifdef PHYSTS_3RD_TYPE_SUPPORT
+		phydm_rx_physts_3rd_type(dm, phy_status_inf, pktinfo, phy_info);
+		phydm_process_dm_rssi_3rd_type(dm, phy_info, pktinfo);
+		#endif
+	} else if (dm->support_ic_type & PHYSTS_2ND_TYPE_IC) {
+		#if (ODM_PHY_STATUS_NEW_TYPE_SUPPORT)
+		phydm_rx_physts_2nd_type(dm, phy_status_inf, pktinfo, phy_info);
+		phydm_process_rssi_for_dm_2nd_type(dm, phy_info, pktinfo);
 		#endif
-	} else if (p_dm->support_ic_type & ODM_IC_11AC_SERIES) {
-		#if	ODM_IC_11AC_SERIES_SUPPORT
-		phydm_rx_phy_status_jaguar_series_parsing(p_dm, p_phy_info, p_phy_status, p_pktinfo);
-		phydm_process_rssi_for_dm(p_dm, p_phy_info, p_pktinfo);
+	} else if (dm->support_ic_type & ODM_IC_11AC_SERIES) {
+		#if ODM_IC_11AC_SERIES_SUPPORT
+		phydm_rx_physts_1st_type(dm, phy_info, phy_status_inf, pktinfo);
+		phydm_process_rssi_for_dm(dm, phy_info, pktinfo);
 		#endif
-	} else if (p_dm->support_ic_type & ODM_IC_11N_SERIES) {
-		#if	ODM_IC_11N_SERIES_SUPPORT
-		phydm_rx_phy_status92c_series_parsing(p_dm, p_phy_info, p_phy_status, p_pktinfo);
-		phydm_process_rssi_for_dm(p_dm, p_phy_info, p_pktinfo);
+	} else if (dm->support_ic_type & ODM_IC_11N_SERIES) {
+		#if ODM_IC_11N_SERIES_SUPPORT
+		phydm_phy_sts_n_parsing(dm, phy_info, phy_status_inf, pktinfo);
+		phydm_process_rssi_for_dm(dm, phy_info, pktinfo);
 		#endif
 	}
+	phy_info->signal_strength = phy_info->rx_pwdb_all;
+	#if (DM_ODM_SUPPORT_TYPE & ODM_WIN)
+	phydm_process_signal_strength(dm, phy_info, pktinfo);
+	#endif
+
+	if (pktinfo->is_packet_match_bssid) {
+		dm->curr_station_id = pktinfo->station_id;
+		dm->rx_rate = rate;
+		dm->rssi_a = phy_info->rx_mimo_signal_strength[RF_PATH_A];
+		dm->rssi_b = phy_info->rx_mimo_signal_strength[RF_PATH_B];
+		dm->rssi_c = phy_info->rx_mimo_signal_strength[RF_PATH_C];
+		dm->rssi_d = phy_info->rx_mimo_signal_strength[RF_PATH_D];
+
+		if (rate >= ODM_RATE6M && rate <= ODM_RATE54M)
+			dm->rxsc_l = (s8)phy_info->rxsc;
+		else if (phy_info->band_width == CHANNEL_WIDTH_20)
+			dm->rxsc_20 = (s8)phy_info->rxsc;
+		else if (phy_info->band_width == CHANNEL_WIDTH_40)
+			dm->rxsc_40 = (s8)phy_info->rxsc;
+		else if (phy_info->band_width == CHANNEL_WIDTH_80)
+			dm->rxsc_80 = (s8)phy_info->rxsc;
+
+		phydm_avg_phystatus_index(dm, phy_info, pktinfo);
+		phydm_rx_statistic_cal(dm, phy_info, phy_status_inf, pktinfo);
+	}
 }
 
-void
-phydm_rx_phy_status_init(
-	void			*p_dm_void
-)
+void phydm_rx_phy_status_init(void *dm_void)
 {
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct odm_phy_dbg_info *dbg = &dm->phy_dbg_info;
 #ifdef PHYDM_PHYSTAUS_SMP_MODE
-	struct PHY_DM_STRUCT		*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	struct pkt_process_info			*p_pkt_process = &(p_dm->pkt_proc_struct);
-
-	if (p_dm->support_ic_type == ODM_RTL8822B) {
-
-		p_pkt_process->phystatus_smp_mode_en = 1;
-		p_pkt_process->pre_ppdu_cnt = 0xff;
-
-		odm_set_mac_reg(p_dm, 0x60f, BIT(7), 1); /*phystatus sampling mode enable*/
-
-		odm_set_bb_reg(p_dm, 0x9e4, 0x3ff, 0x0); /*First update timming*/
-		odm_set_bb_reg(p_dm, 0x9e4, 0xfc00, 0x0); /*Update Sampling time*/
+	struct pkt_process_info *pkt_process = &dm->pkt_proc_struct;
+
+	if (dm->support_ic_type & ODM_RTL8822B) {
+		pkt_process->phystatus_smp_mode_en = 1;
+		pkt_process->pre_ppdu_cnt = 0xff;
+		/*phystatus sampling mode enable*/
+		odm_set_mac_reg(dm, R_0x60f, BIT(7), 1);
+		/*@First update timming*/
+		odm_set_bb_reg(dm, R_0x9e4, 0x3ff, 0x0);
+		/*Update Sampling time*/
+		odm_set_bb_reg(dm, R_0x9e4, 0xfc00, 0x0);
+	} else if (dm->support_ic_type & ODM_IC_JGR3_SERIES) {
+		/*@First update timming*/
+		odm_set_bb_reg(dm, R_0x8c0, 0x3ff0, 0x0);
+		/*Update Sampling time*/
+		odm_set_bb_reg(dm, R_0x8c0, 0xfc000, 0x0);
 	}
 #endif
+
+	dbg->show_phy_sts_all_pkt = 0;
+	dbg->show_phy_sts_max_cnt = 1;
+	dbg->show_phy_sts_cnt = 0;
+
+	phydm_avg_phystatus_init(dm);
 }
diff --git a/rtl8723DS/hal/phydm/phydm_phystatus.h b/rtl8723DS/hal/phydm/phydm_phystatus.h
index ce8f6c5..333fa89 100755..100644
--- a/rtl8723DS/hal/phydm/phydm_phystatus.h
+++ b/rtl8723DS/hal/phydm/phydm_phystatus.h
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2007 - 2017 Realtek Corporation.
+ * Copyright(c) 2007 - 2017  Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -8,45 +8,70 @@
  *
  * This program is distributed in the hope that it will be useful, but WITHOUT
  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  * more details.
  *
+ * The full GNU General Public License is included in this distribution in the
+ * file called LICENSE.
+ *
+ * Contact Information:
+ * wlanfae <wlanfae@realtek.com>
+ * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
+ * Hsinchu 300, Taiwan.
+ *
+ * Larry Finger <Larry.Finger@lwfinger.net>
+ *
  *****************************************************************************/
 
+#ifndef __PHYDM_PHYSTATUS_H__
+#define __PHYDM_PHYSTATUS_H__
 
-#ifndef	__PHYDM_PHYSTATUS_H__
-#define	__PHYDM_PHYSTATUS_H__
+/*@--------------------------Define ------------------------------------------*/
+#define CCK_RSSI_INIT_COUNT 5
 
+#define RA_RSSI_STATE_INIT 0
+#define RA_RSSI_STATE_SEND 1
+#define RA_RSSI_STATE_HOLD 2
+
+#if defined(DM_ODM_CE_MAC80211)
+#define CFO_HW_RPT_2_KHZ(val) ({		\
+	s32 cfo_hw_rpt_2_khz_tmp = (val);	\
+	(cfo_hw_rpt_2_khz_tmp << 1) + (cfo_hw_rpt_2_khz_tmp >> 1);	\
+	})
+#else
+#define CFO_HW_RPT_2_KHZ(val) ((val << 1) + (val >> 1))
+#endif
 
-/*--------------------------Define -------------------------------------------*/
-#define	CCK_RSSI_INIT_COUNT 5
+/* @(X* 312.5 Khz)>>7 ~=  X*2.5 Khz= (X<<1 + X>>1)Khz  */
 
-#define	RA_RSSI_STATE_INIT	0
-#define	RA_RSSI_STATE_SEND	1
-#define	RA_RSSI_STATE_HOLD	2
+#define IGI_2_RSSI(igi) (igi - 10)
 
-#define	CFO_HW_RPT_2_MHZ(val) ((val<<1) + (val>>1))
-/* ((X* 3125)  / 10)>>7 = (X*10)>>2 = X*2.5 = X<<1 + X>>1  */
+#define PHY_STATUS_JRGUAR2_DW_LEN 7 /* @7*4 = 28 Byte */
+#define PHY_STATUS_JRGUAR3_DW_LEN 7 /* @7*4 = 28 Byte */
+#define SHOW_PHY_STATUS_UNLIMITED 0
+#define RSSI_MA 4 /*moving average factor for RSSI: 2^4=16 */
 
-/* ************************************************************
+#define PHYSTS_PATH_NUM 4
+
+/*@************************************************************
  * structure and define
- * ************************************************************ */
+ ************************************************************/
 
-__PACK struct _phy_rx_agc_info {
+__PACK struct phy_rx_agc_info {
 #if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE)
-	u8	gain: 7, trsw: 1;
+	u8 gain : 7, trsw : 1;
 #else
-	u8	trsw: 1, gain: 7;
+	u8 trsw : 1, gain : 7;
 #endif
 };
 
-__PACK struct _phy_status_rpt_8192cd {
-	struct _phy_rx_agc_info path_agc[2];
+__PACK struct phy_status_rpt_8192cd {
+	struct phy_rx_agc_info path_agc[2];
 	u8	ch_corr[2];
 	u8	cck_sig_qual_ofdm_pwdb_all;
 	u8	cck_agc_rpt_ofdm_cfosho_a;
 	u8	cck_rpt_b_ofdm_cfosho_b;
-	u8	rsvd_1;/*ch_corr_msb;*/
+	u8	rsvd_1;/*@ch_corr_msb;*/
 	u8	noise_power_db_msb;
 	s8	path_cfotail[2];
 	u8	pcts_mask[2];
@@ -60,610 +85,655 @@ __PACK struct _phy_status_rpt_8192cd {
 	u8	rsvd_3;
 
 #if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE)
-	u8	antsel_rx_keep_2: 1;	/*ex_intf_flg:1;*/
+	u8	antsel_rx_keep_2: 1;	/*@ex_intf_flg:1;*/
 	u8	sgi_en: 1;
 	u8	rxsc: 2;
 	u8	idle_long: 1;
 	u8	r_ant_train_en: 1;
 	u8	ant_sel_b: 1;
 	u8	ant_sel: 1;
-#else	/*_BIG_ENDIAN_	*/
+#else	/*@_BIG_ENDIAN_	*/
 	u8	ant_sel: 1;
 	u8	ant_sel_b: 1;
 	u8	r_ant_train_en: 1;
 	u8	idle_long: 1;
 	u8	rxsc: 2;
 	u8	sgi_en: 1;
-	u8	antsel_rx_keep_2: 1;/*ex_intf_flg:1;*/
+	u8	antsel_rx_keep_2: 1;/*@ex_intf_flg:1;*/
 #endif
 };
 
-struct _phy_status_rpt_8812 {
-	/*	DWORD 0*/
-	u8			gain_trsw[2];							/*path-A and path-B {TRSW, gain[6:0] }*/
-	u8			chl_num_LSB;							/*channel number[7:0]*/
-#if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE)
-	u8			chl_num_MSB: 2;							/*channel number[9:8]*/
-	u8			sub_chnl: 4;								/*sub-channel location[3:0]*/
-	u8			r_RFMOD: 2;								/*RF mode[1:0]*/
-#else	/*_BIG_ENDIAN_	*/
-	u8			r_RFMOD: 2;
-	u8			sub_chnl: 4;
-	u8			chl_num_MSB: 2;
-#endif
-
-	/*	DWORD 1*/
-	u8			pwdb_all;								/*CCK signal quality / OFDM pwdb all*/
-	s8			cfosho[2];		/*DW1 byte 1 DW1 byte2	CCK AGC report and CCK_BB_Power / OFDM path-A and path-B short CFO*/
-#if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE)
-	/*this should be checked again because the definition of 8812 and 8814 is different*/
-	/*	u8			r_cck_rx_enable_pathc:2;					cck rx enable pathc[1:0]*/
-	/*	u8			cck_rx_path:4;							cck rx path[3:0]*/
-	u8			resvd_0: 6;
-	u8			bt_RF_ch_MSB: 2;						/*8812A:2'b0			8814A: bt rf channel keep[7:6]*/
-#else	/*_BIG_ENDIAN_*/
-	u8			bt_RF_ch_MSB: 2;
-	u8			resvd_0: 6;
-#endif
-
-	/*	DWORD 2*/
-#if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE)
-	u8			ant_div_sw_a: 1;							/*8812A: ant_div_sw_a    8814A: 1'b0*/
-	u8			ant_div_sw_b: 1;							/*8812A: ant_div_sw_b    8814A: 1'b0*/
-	u8			bt_RF_ch_LSB: 6;						/*8812A: 6'b0                   8814A: bt rf channel keep[5:0]*/
-#else	/*_BIG_ENDIAN_	*/
-	u8			bt_RF_ch_LSB: 6;
-	u8			ant_div_sw_b: 1;
-	u8			ant_div_sw_a: 1;
-#endif
-	s8			cfotail[2];		   /*DW2 byte 1 DW2 byte 2	path-A and path-B CFO tail*/
-	u8			PCTS_MSK_RPT_0;						/*PCTS mask report[7:0]*/
-	u8			PCTS_MSK_RPT_1;						/*PCTS mask report[15:8]*/
-
-	/*	DWORD 3*/
-	s8			rxevm[2];	         /*DW3 byte 1 DW3 byte 2	stream 1 and stream 2 RX EVM*/
-	s8			rxsnr[2];	         /*DW3 byte 3 DW4 byte 0	path-A and path-B RX SNR*/
-
-	/*	DWORD 4*/
-	u8			PCTS_MSK_RPT_2;						/*PCTS mask report[23:16]*/
-#if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE)
-	u8			PCTS_MSK_RPT_3: 6;						/*PCTS mask report[29:24]*/
-	u8			pcts_rpt_valid: 1;							/*pcts_rpt_valid*/
-	u8			resvd_1: 1;								/*1'b0*/
-#else	/*_BIG_ENDIAN_*/
-	u8			resvd_1: 1;
-	u8			pcts_rpt_valid: 1;
-	u8			PCTS_MSK_RPT_3: 6;
-#endif
-	s8			rxevm_cd[2];	   /*DW 4 byte 3 DW5 byte 0  8812A: 16'b0	8814A: stream 3 and stream 4 RX EVM*/
-
-	/*	DWORD 5*/
-	u8			csi_current[2];	   /*DW5 byte 1 DW5 byte 2	8812A: stream 1 and 2 CSI	8814A:  path-C and path-D RX SNR*/
-	u8			gain_trsw_cd[2];	   /*DW5 byte 3 DW6 byte 0	path-C and path-D {TRSW, gain[6:0] }*/
-
-	/*	DWORD 6*/
-	s8			sigevm;									/*signal field EVM*/
-#if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE)
-	u8			antidx_antc: 3;							/*8812A: 3'b0		8814A: antidx_antc[2:0]*/
-	u8			antidx_antd: 3;							/*8812A: 3'b0		8814A: antidx_antd[2:0]*/
-	u8			dpdt_ctrl_keep: 1;						/*8812A: 1'b0		8814A: dpdt_ctrl_keep*/
-	u8			GNT_BT_keep: 1;							/*8812A: 1'b0		8814A: GNT_BT_keep*/
-#else	/*_BIG_ENDIAN_*/
-	u8			GNT_BT_keep: 1;
-	u8			dpdt_ctrl_keep: 1;
-	u8			antidx_antd: 3;
-	u8			antidx_antc: 3;
-#endif
-#if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE)
-	u8			antidx_anta: 3;							/*antidx_anta[2:0]*/
-	u8			antidx_antb: 3;							/*antidx_antb[2:0]*/
-	u8			hw_antsw_occur: 2;								/*1'b0*/
-#else	/*_BIG_ENDIAN_*/
-	u8			hw_antsw_occur: 2;
-	u8			antidx_antb: 3;
-	u8			antidx_anta: 3;
+struct phy_status_rpt_8812 {
+	/*	@DWORD 0*/
+	u8 gain_trsw[2]; /*path-A and path-B {TRSW, gain[6:0] }*/
+	u8 chl_num_LSB; /*@channel number[7:0]*/
+#if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE)
+	u8 chl_num_MSB : 2; /*@channel number[9:8]*/
+	u8 sub_chnl : 4; /*sub-channel location[3:0]*/
+	u8 r_RFMOD : 2; /*RF mode[1:0]*/
+#else /*@_BIG_ENDIAN_	*/
+	u8 r_RFMOD : 2;
+	u8 sub_chnl : 4;
+	u8 chl_num_MSB : 2;
 #endif
-};
 
+	/*	@DWORD 1*/
+	u8 pwdb_all; /*@CCK signal quality / OFDM pwdb all*/
+	s8 cfosho[2]; /*@CCK AGC report and CCK_BB_Power*/
+		      /*OFDM path-A and path-B short CFO*/
+#if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE)
+	u8 resvd_0 : 6;
+	u8 bt_RF_ch_MSB : 2; /*@8812A:2'b0  8814A: bt rf channel keep[7:6]*/
+#else /*@_BIG_ENDIAN_*/
+	u8 bt_RF_ch_MSB : 2;
+	u8 resvd_0 : 6;
+#endif
+
+/*	@DWORD 2*/
+#if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE)
+	u8 ant_div_sw_a : 1; /*@8812A: ant_div_sw_a    8814A: 1'b0*/
+	u8 ant_div_sw_b : 1; /*@8812A: ant_div_sw_b    8814A: 1'b0*/
+	u8 bt_RF_ch_LSB : 6; /*@8812A: 6'b0     8814A: bt rf channel keep[5:0]*/
+#else /*@_BIG_ENDIAN_	*/
+	u8 bt_RF_ch_LSB : 6;
+	u8 ant_div_sw_b : 1;
+	u8 ant_div_sw_a : 1;
+#endif
+	s8 cfotail[2]; /*@DW2 byte 1 DW2 byte 2	path-A and path-B CFO tail*/
+	u8 PCTS_MSK_RPT_0; /*PCTS mask report[7:0]*/
+	u8 PCTS_MSK_RPT_1; /*PCTS mask report[15:8]*/
+
+	/*	@DWORD 3*/
+	s8 rxevm[2]; /*@DW3 byte 1 DW3 byte 2	stream 1 and stream 2 RX EVM*/
+	s8 rxsnr[2]; /*@DW3 byte 3 DW4 byte 0	path-A and path-B RX SNR*/
+
+	/*	@DWORD 4*/
+	u8 PCTS_MSK_RPT_2; /*PCTS mask report[23:16]*/
+#if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE)
+	u8 PCTS_MSK_RPT_3 : 6; /*PCTS mask report[29:24]*/
+	u8 pcts_rpt_valid : 1; /*pcts_rpt_valid*/
+	u8 resvd_1 : 1; /*@1'b0*/
+#else /*@_BIG_ENDIAN_*/
+	u8 resvd_1 : 1;
+	u8 pcts_rpt_valid : 1;
+	u8 PCTS_MSK_RPT_3 : 6;
+#endif
+	s8 rxevm_cd[2]; /*@8812A: 16'b0*/
+			/*@8814A: stream 3 and stream 4 RX EVM*/
+	/*	@DWORD 5*/
+	u8 csi_current[2]; /*@8812A: stream 1 and 2 CSI*/
+			   /*@8814A:  path-C and path-D RX SNR*/
+	u8 gain_trsw_cd[2]; /*path-C and path-D {TRSW, gain[6:0] }*/
+
+	/*	@DWORD 6*/
+	s8 sigevm; /*signal field EVM*/
+#if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE)
+	u8 antidx_antc : 3;	/*@8812A: 3'b0	8814A: antidx_antc[2:0]*/
+	u8 antidx_antd : 3;	/*@8812A: 3'b0	8814A: antidx_antd[2:0]*/
+	u8 dpdt_ctrl_keep : 1;	/*@8812A: 1'b0	8814A: dpdt_ctrl_keep*/
+	u8 GNT_BT_keep : 1;	/*@8812A: 1'b0	8814A: GNT_BT_keep*/
+#else /*@_BIG_ENDIAN_*/
+	u8 GNT_BT_keep : 1;
+	u8 dpdt_ctrl_keep : 1;
+	u8 antidx_antd : 3;
+	u8 antidx_antc : 3;
+#endif
+#if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE)
+	u8 antidx_anta : 3; /*@antidx_anta[2:0]*/
+	u8 antidx_antb : 3; /*@antidx_antb[2:0]*/
+	u8 hw_antsw_occur : 2; /*@1'b0*/
+#else /*@_BIG_ENDIAN_*/
+	u8 hw_antsw_occur : 2;
+	u8 antidx_antb : 3;
+	u8 antidx_anta : 3;
+#endif
+};
 
 #if (ODM_PHY_STATUS_NEW_TYPE_SUPPORT == 1)
 
-__PACK struct _phy_status_rpt_jaguar2_type0 {
-	/* DW0 */
-	u8		page_num;
-	u8		pwdb;
+__PACK struct phy_sts_rpt_jgr2_type0 {
+	/* @DW0 */
+	u8 page_num;
+	u8 pwdb;
 #if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE)
-	u8		gain: 6;
-	u8		rsvd_0: 1;
-	u8		trsw: 1;
+	u8 gain : 6;
+	u8 rsvd_0 : 1;
+	u8 trsw : 1;
 #else
-	u8		trsw: 1;
-	u8		rsvd_0: 1;
-	u8		gain: 6;
+	u8 trsw : 1;
+	u8 rsvd_0 : 1;
+	u8 gain : 6;
 #endif
-	u8		rsvd_1;
+	u8 rsvd_1;
 
-	/* DW1 */
-	u8		rsvd_2;
+	/* @DW1 */
+	u8 rsvd_2;
 #if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE)
-	u8		rxsc: 4;
-	u8		agc_table: 4;
+	u8 rxsc : 4;
+	u8 agc_table : 4;
 #else
-	u8		agc_table: 4;
-	u8		rxsc: 4;
+	u8 agc_table : 4;
+	u8 rxsc : 4;
 #endif
-	u8		channel;
-	u8		band;
+	u8 channel;
+	u8 band;
 
-	/* DW2 */
-	u16		length;
+	/* @DW2 */
+	u16 length;
 #if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE)
-	u8		antidx_a: 3;
-	u8		antidx_b: 3;
-	u8		rsvd_3: 2;
-	u8		antidx_c: 3;
-	u8		antidx_d: 3;
-	u8		rsvd_4:2;
+	u8 antidx_a : 3;
+	u8 antidx_b : 3;
+	u8 rsvd_3 : 2;
+	u8 antidx_c : 3;
+	u8 antidx_d : 3;
+	u8 rsvd_4 : 2;
 #else
-	u8		rsvd_3: 2;
-	u8		antidx_b: 3;
-	u8		antidx_a: 3;
-	u8		rsvd_4:2;
-	u8		antidx_d: 3;
-	u8		antidx_c: 3;
+	u8 rsvd_3 : 2;
+	u8 antidx_b : 3;
+	u8 antidx_a : 3;
+	u8 rsvd_4 : 2;
+	u8 antidx_d : 3;
+	u8 antidx_c : 3;
 #endif
 
-	/* DW3 */
-	u8		signal_quality;
+	/* @DW3 */
+	u8 signal_quality;
 #if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE)
-	u8		vga:5;
-	u8		lna_l:3;
-	u8		bb_power:6;
-	u8		rsvd_9:1;
-	u8		lna_h:1;
+	u8 vga : 5;
+	u8 lna_l : 3;
+	u8 bb_power : 6;
+	u8 rsvd_9 : 1;
+	u8 lna_h : 1;
 #else
-	u8		lna_l:3;
-	u8		vga:5;
-	u8		lna_h:1;
-	u8		rsvd_9:1;
-	u8		bb_power:6;
+	u8 lna_l : 3;
+	u8 vga : 5;
+	u8 lna_h : 1;
+	u8 rsvd_9 : 1;
+	u8 bb_power : 6;
 #endif
-	u8		rsvd_5;
+	u8 rsvd_5;
 
-	/* DW4 */
-	u32		rsvd_6;
+	/* @DW4 */
+	u32 rsvd_6;
 
-	/* DW5 */
-	u32		rsvd_7;
+	/* @DW5 */
+	u32 rsvd_7;
 
-	/* DW6 */
-	u32		rsvd_8;
+	/* @DW6 */
+	u32 rsvd_8;
 };
 
-__PACK struct _phy_status_rpt_jaguar2_type1 {
-	/* DW0 and DW1 */
-	u8		page_num;
-	u8		pwdb[4];
+__PACK struct phy_sts_rpt_jgr2_type1 {
+	/* @DW0 and DW1 */
+	u8 page_num;
+	u8 pwdb[4];
 #if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE)
-	u8		l_rxsc: 4;
-	u8		ht_rxsc: 4;
+	u8 l_rxsc : 4;
+	u8 ht_rxsc : 4;
 #else
-	u8		ht_rxsc: 4;
-	u8		l_rxsc: 4;
+	u8 ht_rxsc : 4;
+	u8 l_rxsc : 4;
 #endif
-	u8		channel;
+	u8 channel;
 #if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE)
-	u8		band: 2;
-	u8		rsvd_0: 1;
-	u8		hw_antsw_occu: 1;
-	u8		gnt_bt: 1;
-	u8		ldpc: 1;
-	u8		stbc: 1;
-	u8		beamformed: 1;
+	u8 band : 2;
+	u8 rsvd_0 : 1;
+	u8 hw_antsw_occu : 1;
+	u8 gnt_bt : 1;
+	u8 ldpc : 1;
+	u8 stbc : 1;
+	u8 beamformed : 1;
 #else
-	u8		beamformed: 1;
-	u8		stbc: 1;
-	u8		ldpc: 1;
-	u8		gnt_bt: 1;
-	u8		hw_antsw_occu: 1;
-	u8		rsvd_0: 1;
-	u8		band: 2;
+	u8 beamformed : 1;
+	u8 stbc : 1;
+	u8 ldpc : 1;
+	u8 gnt_bt : 1;
+	u8 hw_antsw_occu : 1;
+	u8 rsvd_0 : 1;
+	u8 band : 2;
 #endif
 
-	/* DW2 */
-	u16		lsig_length;
+	/* @DW2 */
+	u16 lsig_length;
 #if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE)
-	u8		antidx_a: 3;
-	u8		antidx_b: 3;
-	u8		rsvd_1: 2;
-	u8		antidx_c: 3;
-	u8		antidx_d: 3;
-	u8		rsvd_2: 2;
+	u8 antidx_a : 3;
+	u8 antidx_b : 3;
+	u8 rsvd_1 : 2;
+	u8 antidx_c : 3;
+	u8 antidx_d : 3;
+	u8 rsvd_2 : 2;
 #else
-	u8		rsvd_1: 2;
-	u8		antidx_b: 3;
-	u8		antidx_a: 3;
-	u8		rsvd_2: 2;
-	u8		antidx_d: 3;
-	u8		antidx_c: 3;
+	u8 rsvd_1 : 2;
+	u8 antidx_b : 3;
+	u8 antidx_a : 3;
+	u8 rsvd_2 : 2;
+	u8 antidx_d : 3;
+	u8 antidx_c : 3;
 #endif
 
-	/* DW3 */
-	u8		paid;
+	/* @DW3 */
+	u8 paid;
 #if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE)
-	u8		paid_msb: 1;
-	u8		gid: 6;
-	u8		rsvd_3: 1;
+	u8 paid_msb : 1;
+	u8 gid : 6;
+	u8 rsvd_3 : 1;
 #else
-	u8		rsvd_3: 1;
-	u8		gid: 6;
-	u8		paid_msb: 1;
+	u8 rsvd_3 : 1;
+	u8 gid : 6;
+	u8 paid_msb : 1;
 #endif
-	u8		intf_pos;
+	u8 intf_pos;
 #if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE)
-	u8		intf_pos_msb: 1;
-	u8		rsvd_4: 2;
-	u8		nb_intf_flag: 1;
-	u8		rf_mode: 2;
-	u8		rsvd_5: 2;
+	u8 intf_pos_msb : 1;
+	u8 rsvd_4 : 2;
+	u8 nb_intf_flag : 1;
+	u8 rf_mode : 2;
+	u8 rsvd_5 : 2;
 #else
-	u8		rsvd_5: 2;
-	u8		rf_mode: 2;
-	u8		nb_intf_flag: 1;
-	u8		rsvd_4: 2;
-	u8		intf_pos_msb: 1;
+	u8 rsvd_5 : 2;
+	u8 rf_mode : 2;
+	u8 nb_intf_flag : 1;
+	u8 rsvd_4 : 2;
+	u8 intf_pos_msb : 1;
 #endif
 
-	/* DW4 */
-	s8		rxevm[4];			/* s(8,1) */
+	/* @DW4 */
+	s8 rxevm[4]; /* s(8,1) */
 
-	/* DW5 */
-	s8		cfo_tail[4];			/* s(8,7) */
+	/* @DW5 */
+	s8 cfo_tail[4]; /* s(8,7) */
 
-	/* DW6 */
-	s8		rxsnr[4];			/* s(8,1) */
+	/* @DW6 */
+	s8 rxsnr[4]; /* s(8,1) */
 };
 
-__PACK struct _phy_status_rpt_jaguar2_type2 {
-	/* DW0 ane DW1 */
-	u8		page_num;
-	u8		pwdb[4];
-#if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE)
-	u8		l_rxsc: 4;
-	u8		ht_rxsc: 4;
-#else
-	u8		ht_rxsc: 4;
-	u8		l_rxsc: 4;
-#endif
-	u8		channel;
-#if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE)
-	u8		band: 2;
-	u8		rsvd_0: 1;
-	u8		hw_antsw_occu: 1;
-	u8		gnt_bt: 1;
-	u8		ldpc: 1;
-	u8		stbc: 1;
-	u8		beamformed: 1;
-#else
-	u8		beamformed: 1;
-	u8		stbc: 1;
-	u8		ldpc: 1;
-	u8		gnt_bt: 1;
-	u8		hw_antsw_occu: 1;
-	u8		rsvd_0: 1;
-	u8		band: 2;
-#endif
-
-	/* DW2 */
-#if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE)
-	u8		shift_l_map: 6;
-	u8		rsvd_1: 2;
-#else
-	u8		rsvd_1: 2;
-	u8		shift_l_map: 6;
-#endif
-	u8		cnt_pw2cca;
-#if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE)
-	u8		agc_table_a: 4;
-	u8		agc_table_b: 4;
-	u8		agc_table_c: 4;
-	u8		agc_table_d: 4;
-#else
-	u8		agc_table_b: 4;
-	u8		agc_table_a: 4;
-	u8		agc_table_d: 4;
-	u8		agc_table_c: 4;
-#endif
-
-	/* DW3 ~ DW6*/
-	u8		cnt_cca2agc_rdy;
-#if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE)
-	u8		gain_a: 6;
-	u8		rsvd_2: 1;
-	u8		trsw_a: 1;
-	u8		gain_b: 6;
-	u8		rsvd_3: 1;
-	u8		trsw_b: 1;
-	u8		gain_c: 6;
-	u8		rsvd_4: 1;
-	u8		trsw_c: 1;
-	u8		gain_d: 6;
-	u8		rsvd_5: 1;
-	u8		trsw_d: 1;
-	u8		aagc_step_a: 2;
-	u8		aagc_step_b: 2;
-	u8		aagc_step_c: 2;
-	u8		aagc_step_d: 2;
-#else
-	u8		trsw_a: 1;
-	u8		rsvd_2: 1;
-	u8		gain_a: 6;
-	u8		trsw_b: 1;
-	u8		rsvd_3: 1;
-	u8		gain_b: 6;
-	u8		trsw_c: 1;
-	u8		rsvd_4: 1;
-	u8		gain_c: 6;
-	u8		trsw_d: 1;
-	u8		rsvd_5: 1;
-	u8		gain_d: 6;
-	u8		aagc_step_d: 2;
-	u8		aagc_step_c: 2;
-	u8		aagc_step_b: 2;
-	u8		aagc_step_a: 2;
-#endif
-	u8		ht_aagc_gain[4];
-	u8		dagc_gain[4];
-#if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE)
-	u8		counter: 6;
-	u8		rsvd_6: 2;
-	u8		syn_count: 5;
-	u8		rsvd_7:3;
-#else
-	u8		rsvd_6: 2;
-	u8		counter: 6;
-	u8		rsvd_7:3;
-	u8		syn_count: 5;
+__PACK struct phy_sts_rpt_jgr2_type2 {
+	/* @DW0 ane DW1 */
+	u8 page_num;
+	u8 pwdb[4];
+#if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE)
+	u8 l_rxsc : 4;
+	u8 ht_rxsc : 4;
+#else
+	u8 ht_rxsc : 4;
+	u8 l_rxsc : 4;
+#endif
+	u8 channel;
+#if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE)
+	u8 band : 2;
+	u8 rsvd_0 : 1;
+	u8 hw_antsw_occu : 1;
+	u8 gnt_bt : 1;
+	u8 ldpc : 1;
+	u8 stbc : 1;
+	u8 beamformed : 1;
+#else
+	u8 beamformed : 1;
+	u8 stbc : 1;
+	u8 ldpc : 1;
+	u8 gnt_bt : 1;
+	u8 hw_antsw_occu : 1;
+	u8 rsvd_0 : 1;
+	u8 band : 2;
+#endif
+
+/* @DW2 */
+#if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE)
+	u8 shift_l_map : 6;
+	u8 rsvd_1 : 2;
+#else
+	u8 rsvd_1 : 2;
+	u8 shift_l_map : 6;
+#endif
+	u8 cnt_pw2cca;
+#if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE)
+	u8 agc_table_a : 4;
+	u8 agc_table_b : 4;
+	u8 agc_table_c : 4;
+	u8 agc_table_d : 4;
+#else
+	u8 agc_table_b : 4;
+	u8 agc_table_a : 4;
+	u8 agc_table_d : 4;
+	u8 agc_table_c : 4;
+#endif
+
+	/* @DW3 ~ DW6*/
+	u8 cnt_cca2agc_rdy;
+#if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE)
+	u8 gain_a : 6;
+	u8 rsvd_2 : 1;
+	u8 trsw_a : 1;
+	u8 gain_b : 6;
+	u8 rsvd_3 : 1;
+	u8 trsw_b : 1;
+	u8 gain_c : 6;
+	u8 rsvd_4 : 1;
+	u8 trsw_c : 1;
+	u8 gain_d : 6;
+	u8 rsvd_5 : 1;
+	u8 trsw_d : 1;
+	u8 aagc_step_a : 2;
+	u8 aagc_step_b : 2;
+	u8 aagc_step_c : 2;
+	u8 aagc_step_d : 2;
+#else
+	u8 trsw_a : 1;
+	u8 rsvd_2 : 1;
+	u8 gain_a : 6;
+	u8 trsw_b : 1;
+	u8 rsvd_3 : 1;
+	u8 gain_b : 6;
+	u8 trsw_c : 1;
+	u8 rsvd_4 : 1;
+	u8 gain_c : 6;
+	u8 trsw_d : 1;
+	u8 rsvd_5 : 1;
+	u8 gain_d : 6;
+	u8 aagc_step_d : 2;
+	u8 aagc_step_c : 2;
+	u8 aagc_step_b : 2;
+	u8 aagc_step_a : 2;
+#endif
+	u8 ht_aagc_gain[4];
+	u8 dagc_gain[4];
+#if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE)
+	u8 counter : 6;
+	u8 rsvd_6 : 2;
+	u8 syn_count : 5;
+	u8 rsvd_7 : 3;
+#else
+	u8 rsvd_6 : 2;
+	u8 counter : 6;
+	u8 rsvd_7 : 3;
+	u8 syn_count : 5;
 #endif
 };
-/*==============================================*/
-#elif (ODM_PHY_STATUS_NEW_TYPE_SUPPORT == 2)
-__PACK struct _phy_status_rpt_jaguar2_type0 {
-	/* DW0 : Offset 0 */
+#endif
+
+/*@==============================================*/
+#ifdef PHYSTS_3RD_TYPE_SUPPORT
+__PACK struct phy_sts_rpt_jgr3_type0 {
+/* @DW0 : Offset 0 */
 #if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE)
-	u8		page_num:4;
-	u8		pkt_cnt:2;
-	u8		channel_msb:2;
+	u8 page_num : 4;
+	u8 pkt_cnt : 2;
+	u8 channel_msb : 2;
 #else
-	u8		channel_msb:2;
-	u8		pkt_cnt:2;
-	u8		page_num:4;
+	u8 channel_msb : 2;
+	u8 pkt_cnt : 2;
+	u8 page_num : 4;
 #endif
-	u8		pwdb_a;
+	u8 pwdb_a;
 #if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE)
-	u8		gain_a: 6;
-	u8		rsvd_0: 1;
-	u8		trsw: 1;
+	u8 gain_a : 6;
+	u8 rsvd_0 : 1;
+	u8 trsw : 1;
 #else
-	u8		trsw: 1;
-	u8		rsvd_0: 1;
-	u8		gain_a: 6;
+	u8 trsw : 1;
+	u8 rsvd_0 : 1;
+	u8 gain_a : 6;
 #endif
 
 #if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE)
-	u8		agc_table_b:4;
-	u8		agc_table_c:4;
+	u8 agc_table_b : 4;
+	u8 agc_table_c : 4;
 #else
-	u8		agc_table_c:4;
-	u8		agc_table_b:4;
+	u8 agc_table_c : 4;
+	u8 agc_table_b : 4;
 #endif
 
-	/* DW1 : Offset 4 */
+/* @DW1 : Offset 4 */
 #if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE)
-	u8		rsvd_1: 4;
-	u8		agc_table_d: 4;
+	u8 rsvd_1 : 4;
+	u8 agc_table_d : 4;
 #else
-	u8		agc_table_d: 4;
-	u8		rsvd_1: 4;
+	u8 agc_table_d : 4;
+	u8 rsvd_1 : 4;
 #endif
 #if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE)
-	u8		l_rxsc: 4;
-	u8		agc_table_a: 4;
+	u8 l_rxsc : 4;
+	u8 agc_table_a : 4;
 #else
-	u8		agc_table_a: 4;
-	u8		l_rxsc: 4;
+	u8 agc_table_a : 4;
+	u8 l_rxsc : 4;
 #endif
-	u8		channel;
+	u8 channel;
 #if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE)
-	u8		band:2;
-	u8		rsvd_2_1: 1;
-	u8		hw_antsw_occur_keep_cck:1;
-	u8		gnt_bt_keep_cck:1;
-	u8		rsvd_2_2:3;
+	u8 band : 2;
+	u8 rsvd_2_1 : 1;
+	u8 hw_antsw_occur_keep_cck : 1;
+	u8 gnt_bt_keep_cck : 1;
+	u8 rsvd_2_2 : 1;
+	u8 path_sel_o : 2;
 #else
-	u8		rsvd_2_2:3;
-	u8		gnt_bt_keep_cck:1;
-	u8		hw_antsw_occur_keep_cck:1;
-	u8		rsvd_2_1: 1;
-	u8		band:2;
+	u8 path_sel_o : 2;
+	u8 rsvd_2_2 : 1;
+	u8 gnt_bt_keep_cck : 1;
+	u8 hw_antsw_occur_keep_cck : 1;
+	u8 rsvd_2_1 : 1;
+	u8 band : 2;
 #endif
 
-	/* DW2 : Offset 8 */
-	u16		length;
+	/* @DW2 : Offset 8 */
+	u16 length;
+#if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE)
+	u8 antidx_a : 4;
+	u8 antidx_b : 4;
+#else
+	u8 antidx_b : 4;
+	u8 antidx_a : 4;
+#endif
 #if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE)
-	u8		antidx_a: 4;
-	u8		antidx_b: 4;
-	u8		antidx_c: 4;
-	u8		antidx_d: 4;
+	u8 antidx_c : 4;
+	u8 antidx_d : 4;
 #else
-	u8		antidx_b: 4;
-	u8		antidx_a: 4;
-	u8		antidx_d: 4;
-	u8		antidx_c: 4;
+	u8 antidx_d : 4;
+	u8 antidx_c : 4;
 #endif
 
-	/* DW3 : Offset 12 */
-	u8		signal_quality;
+	/* @DW3 : Offset 12 */
+	u8 signal_quality;
 #if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE)
-	u8		vga_a:5;
-	u8		lna_l_a:3;
-	u8		bb_power_a:6;
-	u8		rsvd_3_1:1;
-	u8		lna_h_a:1;
+	u8 vga_a : 5;
+	u8 lna_l_a : 3;
 #else
-	u8		lna_l_a:3;
-	u8		vga_a:5;
-	u8		lna_h_a:1;
-	u8		rsvd_3_1:1;
-	u8		bb_power_a:6;
+	u8 lna_l_a : 3;
+	u8 vga_a : 5;
 #endif
-	u8		rsvd_3_2;
+#if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE)
+	u8 bb_power_a : 6;
+	u8 rsvd_3_1 : 1;
+	u8 lna_h_a : 1;
+#else
 
-	/* DW4 : Offset 16 */
-	u8		pwdb_b;
+	u8 lna_h_a : 1;
+	u8 rsvd_3_1 : 1;
+	u8 bb_power_a : 6;
+#endif
 #if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE)
-	u8		vga_b:5;
-	u8		lna_l_b:3;
-	u8		bb_power_b:6;
-	u8		rsvd_4_1:1;
-	u8		lna_h_b:1;
-	u8		gain_b: 6;
-	u8		rsvd_4_2:2;
+	u8 rxrate : 2;
+	u8 raterr : 1;
+	u8 lockbit : 1;
+	u8 sqloss : 1;
+	u8 mf_off : 1;
+	u8 rsvd_3_2 : 2;
 #else
-	u8		lna_l_b:3;
-	u8		vga_b:5;
-	u8		lna_h_b:1;
-	u8		rsvd_4_1:1;
-	u8		bb_power_b:6;
-	u8		rsvd_4_2:2;
-	u8		gain_b: 6;
+	u8 rsvd_3_2 : 2;
+	u8 mf_off : 1;
+	u8 sqloss : 1;
+	u8 lockbit : 1;
+	u8 raterr : 1;
+	u8 rxrate : 2;
 #endif
 
-	/* DW5 : Offset 20 */
-	u8		pwdb_c;
+	/* @DW4 : Offset 16 */
+	u8 pwdb_b;
+#if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE)
+	u8 vga_b : 5;
+	u8 lna_l_b : 3;
+#else
+	u8 lna_l_b : 3;
+	u8 vga_b : 5;
+#endif
+#if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE)
+	u8 bb_power_b : 6;
+	u8 rsvd_4_1 : 1;
+	u8 lna_h_b : 1;
+#else
+	u8 lna_h_b : 1;
+	u8 rsvd_4_1 : 1;
+	u8 bb_power_b : 6;
+#endif
+#if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE)
+	u8 gain_b : 6;
+	u8 rsvd_4_2 : 2;
+#else
+	u8 rsvd_4_2 : 2;
+	u8 gain_b : 6;
+#endif
+
+	/* @DW5 : Offset 20 */
+	u8 pwdb_c;
+#if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE)
+	u8 vga_c : 5;
+	u8 lna_l_c : 3;
+#else
+	u8 lna_l_c : 3;
+	u8 vga_c : 5;
+#endif
+#if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE)
+	u8 bb_power_c : 6;
+	u8 rsvd_5_1 : 1;
+	u8 lna_h_c : 1;
+#else
+	u8 lna_h_c : 1;
+	u8 rsvd_5_1 : 1;
+	u8 bb_power_c : 6;
+#endif
 #if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE)
-	u8		vga_c:5;
-	u8		lna_l_c:3;
-	u8		bb_power_c:6;
-	u8		rsvd_5_1:1;
-	u8		lna_h_c:1;
-	u8		gain_c: 6;
-	u8		rsvd_5_2:2;
+	u8 gain_c : 6;
+	u8 rsvd_5_2 : 2;
 #else
-	u8		lna_l_c:3;
-	u8		vga_c:5;
-	u8		lna_h_c:1;
-	u8		rsvd_5_1:1;
-	u8		bb_power_c:6;
-	u8		rsvd_5_2:2;
-	u8		gain_c: 6;
+	u8 rsvd_5_2 : 2;
+	u8 gain_c : 6;
 #endif
 
-	/* DW6 : Offset 24 */
-	u8		pwdb_d;
+	/* @DW6 : Offset 24 */
+	u8 pwdb_d;
 #if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE)
-	u8		vga_d:5;
-	u8		lna_l_d:3;
-	u8		bb_power_d:6;
-	u8		rsvd_6_1:1;
-	u8		lna_h_d:1;
-	u8		gain_d: 6;
-	u8		rsvd_6_2:2;
+	u8 vga_d : 5;
+	u8 lna_l_d : 3;
 #else
-	u8		lna_l_d:3;
-	u8		vga_d:5;
-	u8		lna_h_d:1;
-	u8		rsvd_6_1:1;
-	u8		bb_power_d:6;
-	u8		rsvd_6_2:2;
-	u8		gain_d: 6;
+	u8 lna_l_d : 3;
+	u8 vga_d : 5;
+#endif
+#if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE)
+	u8 bb_power_d : 6;
+	u8 rsvd_6_1 : 1;
+	u8 lna_h_d : 1;
+#else
+	u8 lna_h_d : 1;
+	u8 rsvd_6_1 : 1;
+	u8 bb_power_d : 6;
+#endif
+#if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE)
+	u8 gain_d : 6;
+	u8 rsvd_6_2 : 2;
+#else
+	u8 rsvd_6_2 : 2;
+	u8 gain_d : 6;
 #endif
 };
 
-__PACK struct _phy_status_rpt_jaguar2_type1 {
-	/* DW0 : Offset 0 */
+__PACK struct phy_sts_rpt_jgr3_type1 {
+/* @DW0 : Offset 0 */
 #if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE)
-	u8		page_num:4;
-	u8		pkt_cnt:2;
-	u8		channel_pri_msb:2;
+	u8 page_num : 4;
+	u8 pkt_cnt : 2;
+	u8 channel_pri_msb : 2;
 #else
-	u8		channel_pri_msb:2;
-	u8		pkt_cnt:2;
-	u8		page_num:4;
+	u8 channel_pri_msb : 2;
+	u8 pkt_cnt : 2;
+	u8 page_num : 4;
 #endif
-	u8		pwdb_a;
-	u8		pwdb_b;
-	u8		pwdb_c;
+	u8 pwdb_a;
+	u8 pwdb_b;
+	u8 pwdb_c;
 
-	/* DW1 : Offset 4 */
-	u8		pwdb_d;
+	/* @DW1 : Offset 4 */
+	u8 pwdb_d;
 #if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE)
-	u8		l_rxsc: 4;
-	u8		ht_rxsc: 4;
+	u8 l_rxsc : 4;
+	u8 ht_rxsc : 4;
 #else
-	u8		ht_rxsc: 4;
-	u8		l_rxsc: 4;
+	u8 ht_rxsc : 4;
+	u8 l_rxsc : 4;
 #endif
-	u8		channel_pri_lsb;
+	u8 channel_pri_lsb;
 #if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE)
-	u8		band: 2;
-	u8		rsvd_0: 2;
-	u8		gnt_bt: 1;
-	u8		ldpc: 1;
-	u8		stbc: 1;
-	u8		beamformed: 1;
+	u8 band : 2;
+	u8 rsvd_0 : 2;
+	u8 gnt_bt : 1;
+	u8 ldpc : 1;
+	u8 stbc : 1;
+	u8 beamformed : 1;
 #else
-	u8		beamformed: 1;
-	u8		stbc: 1;
-	u8		ldpc: 1;
-	u8		gnt_bt: 1;
-	u8		rsvd_0: 2;
-	u8		band: 2;
+	u8 beamformed : 1;
+	u8 stbc : 1;
+	u8 ldpc : 1;
+	u8 gnt_bt : 1;
+	u8 rsvd_0 : 2;
+	u8 band : 2;
 #endif
 
-	/* DW2 : Offset 8 */
-	u8		channel_sec_lsb;
+	/* @DW2 : Offset 8 */
+	u8 channel_sec_lsb;
 #if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE)
-	u8		channel_sec_msb:2;
-	u8		rsvd_1: 2;
-	u8		hw_antsw_occur_a:1;
-	u8		hw_antsw_occur_b:1;
-	u8		hw_antsw_occur_c:1;
-	u8		hw_antsw_occur_d:1;
+	u8 channel_sec_msb : 2;
+	u8 rsvd_1 : 2;
+	u8 hw_antsw_occur_a : 1;
+	u8 hw_antsw_occur_b : 1;
+	u8 hw_antsw_occur_c : 1;
+	u8 hw_antsw_occur_d : 1;
 #else
-	u8		hw_antsw_occur_d:1;
-	u8		hw_antsw_occur_c:1;
-	u8		hw_antsw_occur_b:1;
-	u8		hw_antsw_occur_a:1;
-	u8		rsvd_1: 2;
-	u8		channel_sec_msb:2;
+	u8 hw_antsw_occur_d : 1;
+	u8 hw_antsw_occur_c : 1;
+	u8 hw_antsw_occur_b : 1;
+	u8 hw_antsw_occur_a : 1;
+	u8 rsvd_1 : 2;
+	u8 channel_sec_msb : 2;
 
 #endif
 #if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE)
-	u8		antidx_a: 4;
-	u8		antidx_b: 4;
-	u8		antidx_c: 4;
-	u8		antidx_d: 4;
+	u8 antidx_a : 4;
+	u8 antidx_b : 4;
 #else
-	u8		antidx_b: 4;
-	u8		antidx_a: 4;
-	u8		antidx_d: 4;
-	u8		antidx_c: 4;
+	u8 antidx_b : 4;
+	u8 antidx_a : 4;
+#endif
+#if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE)
+	u8 antidx_c : 4;
+	u8 antidx_d : 4;
+#else
+	u8 antidx_d : 4;
+	u8 antidx_c : 4;
 #endif
 
-	/* DW3 : Offset 12 */
-	u8		paid;
+	/* @DW3 : Offset 12 */
+	u8 paid;
 #if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE)
-	u8		paid_msb: 1;
-	u8		gid: 6;
-	u8		rsvd_3: 1;
+	u8 paid_msb : 1;
+	u8 gid : 6;
+	u8 rsvd_3 : 1;
 #else
-	u8		rsvd_3: 1;
-	u8		gid: 6;
-	u8		paid_msb: 1;
+	u8 rsvd_3 : 1;
+	u8 gid : 6;
+	u8 paid_msb : 1;
 #endif
-	u16		rsvd_4;
-/*
+	u16 rsvd_4;
+#if 0
+	/*@
 	u8		rsvd_4;
 #if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE)
 	u8		rsvd_5: 6;
@@ -673,391 +743,395 @@ __PACK struct _phy_status_rpt_jaguar2_type1 {
 	u8		rsvd_5: 6;
 #endif
 */
-	/* DW4 */
-	s8		rxevm[4];			/* s(8,1) */
+#endif
+	/* @DW4 : Offset 16 */
+	s8 rxevm[4]; /* s(8,1) */
 
-	/* DW5 */
-	s8		cfo_tail[4];			/* s(8,7) */
+	/* @DW5 : Offset 20 */
+	s8 cfo_tail[4]; /* s(8,7) */
 
-	/* DW6 */
-	s8		rxsnr[4];			/* s(8,1) */
+	/* @DW6 : Offset 24 */
+	s8 rxsnr[4]; /* s(8,1) */
 };
-__PACK struct _phy_status_rpt_jaguar2_type2_type3 {
-	/* Type2 is primary channel & type3 is secondary channel */
-	/* DW0 ane DW1 */
+
+__PACK struct phy_sts_rpt_jgr3_type2_3 {
+/* Type2 is primary channel & type3 is secondary channel */
+/* @DW0 and DW1: Offest 0 and Offset 4 */
 #if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE)
-	u8		page_num:4;
-	u8		pkt_cnt:2;
-	u8		channel_msb:2;
+	u8 page_num : 4;
+	u8 pkt_cnt : 2;
+	u8 channel_msb : 2;
 #else
-	u8		channel_msb:2;
-	u8		pkt_cnt:2;
-	u8		page_num:4;
+	u8 channel_msb : 2;
+	u8 pkt_cnt : 2;
+	u8 page_num : 4;
 #endif
-	u8		pwdb[4];
+	u8 pwdb[4];
 #if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE)
-	u8		l_rxsc: 4;
-	u8		ht_rxsc: 4;
+	u8 l_rxsc : 4;
+	u8 ht_rxsc : 4;
 #else
-	u8		ht_rxsc: 4;
-	u8		l_rxsc: 4;
+	u8 ht_rxsc : 4;
+	u8 l_rxsc : 4;
 #endif
-	u8		channel_lsb;
+	u8 channel_lsb;
 #if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE)
-	u8		band: 2;
-	u8		rsvd_0: 1;
-	u8		hw_antsw_occu: 1;
-	u8		gnt_bt: 1;
-	u8		ldpc: 1;
-	u8		stbc: 1;
-	u8		beamformed: 1;
+	u8 band : 2;
+	u8 rsvd_0 : 2;
+	u8 gnt_bt : 1;
+	u8 ldpc : 1;
+	u8 stbc : 1;
+	u8 beamformed : 1;
 #else
-	u8		beamformed: 1;
-	u8		stbc: 1;
-	u8		ldpc: 1;
-	u8		gnt_bt: 1;
-	u8		hw_antsw_occu: 1;
-	u8		rsvd_0: 1;
-	u8		band: 2;
+	u8 beamformed : 1;
+	u8 stbc : 1;
+	u8 ldpc : 1;
+	u8 gnt_bt : 1;
+	u8 rsvd_0 : 2;
+	u8 band : 2;
 #endif
 
-	/* DW2 */
+/* @DW2 : Offset 8 */
+#if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE)
+	u8 shift_l_map : 6;
+	u8 rsvd_1 : 2;
+#else
+	u8 rsvd_1 : 2;
+	u8 shift_l_map : 6;
+#endif
+	s8 pwed_th; /* @dynamic energy threshold S(8,2) */
 #if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE)
-	u8		shift_l_map: 6;
-	u8		rsvd_1: 2;
+	u8 agc_table_a : 4;
+	u8 agc_table_b : 4;
 #else
-	u8		rsvd_1: 2;
-	u8		shift_l_map: 6;
+	u8 agc_table_b : 4;
+	u8 agc_table_a : 4;
 #endif
-	s8		pwed_th;	/* dynamic energy threshold S(8,2) */
 #if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE)
-	u8		agc_table_a: 4;
-	u8		agc_table_b: 4;
-	u8		agc_table_c: 4;
-	u8		agc_table_d: 4;
+	u8 agc_table_c : 4;
+	u8 agc_table_d : 4;
 #else
-	u8		agc_table_b: 4;
-	u8		agc_table_a: 4;
-	u8		agc_table_d: 4;
-	u8		agc_table_c: 4;
+	u8 agc_table_d : 4;
+	u8 agc_table_c : 4;
 #endif
 
-	/* DW3 ~ DW6*/
-	u8		cnt_cca2agc_rdy; /* Time(ns) = cnt_cca2agc_ready*25 */
+	/* @DW3 : Offset 12 */
+	u8 cnt_cca2agc_rdy; /* Time(ns) = cnt_cca2agc_ready*25 */
+#if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE)
+	u8 mp_gain_a : 6;
+	u8 mp_gain_b_lsb : 2;
+#else
+	u8 mp_gain_b_lsb : 2;
+	u8 mp_gain_a : 6;
+#endif
 #if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE)
-	u8		mp_gain_a: 6;
-	u8		mp_gain_b_lsb: 2;
-	u8		mp_gain_b_msb: 4;
-	u8		mp_gain_c_lsb: 4;
-	u8		mp_gain_c_msb: 2;
-	u8		avg_noise_pwr_lsb: 4;
-	u8		rsvd_3:2;
+	u8 mp_gain_b_msb : 4;
+	u8 mp_gain_c_lsb : 4;
+#else
+	u8 mp_gain_c_lsb : 4;
+	u8 mp_gain_b_msb : 4;
+#endif
+#if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE)
+	u8 mp_gain_c_msb : 2;
+	u8 avg_noise_pwr_lsb : 4;
+	u8 rsvd_3 : 2;
 	/* u8		r_rfmod:2; */
-	u8		mp_gain_d: 6;
-	u8		is_freq_select_fading: 1;
-	u8		rsvd_2: 1;
-	u8		aagc_step_a: 2;
-	u8		aagc_step_b: 2;
-	u8		aagc_step_c: 2;
-	u8		aagc_step_d: 2;
-#else
-	u8		mp_gain_b_lsb: 2;
-	u8		mp_gain_a: 6;
-	u8		mp_gain_c_lsb: 4;
-	u8		mp_gain_b_msb: 4;
-	u8		rsvd_3:2;
+#else
 	/* u8		r_rfmod:2; */
-	u8		avg_noise_pwr_lsb: 4;
-	u8		mp_gain_c_msb: 2;
-	u8		rsvd_2: 1;
-	u8		is_freq_select_fading: 1;
-	u8		mp_gain_d: 6;
-	u8		aagc_step_d: 2;
-	u8		aagc_step_c: 2;
-	u8		aagc_step_b: 2;
-	u8		aagc_step_a: 2;
-#endif
-	u8		ht_aagc_gain[4];
-	u8		dagc_gain[4];
-#if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE)
-	u8		counter: 6;
-	u8		syn_count_lsb: 2;
-	u8		syn_count_msb: 3;
-	u8		avg_noise_pwr_msb:5;
-#else
-	u8		syn_count_lsb: 2;
-	u8		counter: 6;
-	u8		avg_noise_pwr_msb:5;
-	u8		syn_count_msb: 3;
+	u8 rsvd_3 : 2;
+	u8 avg_noise_pwr_lsb : 4;
+	u8 mp_gain_c_msb : 2;
+#endif
+	/* @DW4 ~ 5: offset 16 ~20 */
+#if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE)
+	u8 mp_gain_d : 6;
+	u8 is_freq_select_fading : 1;
+	u8 rsvd_2 : 1;
+#else
+	u8 rsvd_2 : 1;
+	u8 is_freq_select_fading : 1;
+	u8 mp_gain_d : 6;
+#endif
+#if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE)
+	u8 aagc_step_a : 2;
+	u8 aagc_step_b : 2;
+	u8 aagc_step_c : 2;
+	u8 aagc_step_d : 2;
+#else
+	u8 aagc_step_d : 2;
+	u8 aagc_step_c : 2;
+	u8 aagc_step_b : 2;
+	u8 aagc_step_a : 2;
+#endif
+	u8 ht_aagc_gain[4];
+	u8 dagc_gain[4];
+#if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE)
+	u8 counter : 6;
+	u8 syn_count_lsb : 2;
+#else
+	u8 syn_count_lsb : 2;
+	u8 counter : 6;
+#endif
+#if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE)
+	u8 syn_count_msb : 3;
+	u8 avg_noise_pwr_msb : 5;
+#else
+	u8 avg_noise_pwr_msb : 5;
+	u8 syn_count_msb : 3;
 #endif
 };
 
-__PACK struct _phy_status_rpt_jaguar2_type4 {
-	/* smart antenna */
-	/* DW0 ane DW1 */
-#if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE)
-	u8		page_num:4;
-	u8		pkt_cnt:2;
-	u8		channel_msb:2;
-#else
-	u8		channel_msb:2;
-	u8		pkt_cnt:2;
-	u8		page_num:4;
-#endif
-	u8		pwdb[4];
-#if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE)
-	u8		l_rxsc: 4;
-	u8		ht_rxsc: 4;
-#else
-	u8		ht_rxsc: 4;
-	u8		l_rxsc: 4;
-#endif
-	u8		channel_lsb;
-#if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE)
-	u8		band: 2;
-	u8		rsvd_0: 1;
-	u8		hw_antsw_occu: 1;
-	u8		gnt_bt: 1;
-	u8		ldpc: 1;
-	u8		stbc: 1;
-	u8		beamformed: 1;
-#else
-	u8		beamformed: 1;
-	u8		stbc: 1;
-	u8		ldpc: 1;
-	u8		gnt_bt: 1;
-	u8		hw_antsw_occu: 1;
-	u8		rsvd_0: 1;
-	u8		band: 2;
-#endif
-
-	/* DW2 ~ DW3 */
-#if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE)
-	u8		bad_tone_cnt_min_eign_0:4;
-	u8		bad_tone_cnt_cn_excess_0:4;
-	u8		training_done_a:1;
-	u8		training_done_b:1;
-	u8		training_done_c:1;
-	u8		training_done_d:1;
-	u8		hw_antsw_occur_a:1;
-	u8		hw_antsw_occur_b:1;
-	u8		hw_antsw_occur_c:1;
-	u8		hw_antsw_occur_d:1;
-	u8		antidx_a: 4;
-	u8		antidx_b: 4;
-	u8		antidx_c: 4;
-	u8		antidx_d: 4;
-#else
-	u8		bad_tone_cnt_cn_excess_0:4;
-	u8		bad_tone_cnt_min_eign_0:4;
-	u8		hw_antsw_occur_d:1;
-	u8		hw_antsw_occur_c:1;
-	u8		hw_antsw_occur_b:1;
-	u8		hw_antsw_occur_a:1;
-	u8		training_done_d:1;
-	u8		training_done_c:1;
-	u8		training_done_b:1;
-	u8		training_done_a:1;
-	u8		antidx_b: 4;
-	u8		antidx_a: 4;
-	u8		antidx_d: 4;
-	u8		antidx_c: 4;
-#endif
-	u8		tx_pkt_cnt;
-#if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE)
-	u8		bad_tone_cnt_min_eign_1:4;
-	u8		bad_tone_cnt_cn_excess_1:4;
-	u8		avg_cond_num_0:7;
-	u8		avg_cond_num_1_lsb:1;
-	u8		avg_cond_num_1_msb:6;
-	u8		rsvd_1:2;
-#else
-	u8		bad_tone_cnt_cn_excess_1:4;
-	u8		bad_tone_cnt_min_eign_1:4;
-	u8		avg_cond_num_1_lsb:1;
-	u8		avg_cond_num_0:7;
-	u8		rsvd_1:2;
-	u8		avg_cond_num_1_msb:6;
-#endif
-
-	/* DW4 */
-	s8		rxevm[4];			/* s(8,1) */
-
-	/* DW5 */
-	u8		eigenvalue[4];			/* eigenvalue or eigenvalue of seg0 (in dB) */
-
-	/* DW6 */
-	s8		rxsnr[4];			/* s(8,1) */
+__PACK struct phy_sts_rpt_jgr3_type4 {
+/* smart antenna */
+/* @DW0 and DW1 : offset 0 and 4  */
+#if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE)
+	u8 page_num : 4;
+	u8 pkt_cnt : 2;
+	u8 channel_msb : 2;
+#else
+	u8 channel_msb : 2;
+	u8 pkt_cnt : 2;
+	u8 page_num : 4;
+#endif
+	u8 pwdb[4];
+#if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE)
+	u8 l_rxsc : 4;
+	u8 ht_rxsc : 4;
+#else
+	u8 ht_rxsc : 4;
+	u8 l_rxsc : 4;
+#endif
+	u8 channel_lsb;
+#if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE)
+	u8 band : 2;
+	u8 rsvd_0 : 2;
+	u8 gnt_bt : 1;
+	u8 ldpc : 1;
+	u8 stbc : 1;
+	u8 beamformed : 1;
+#else
+	u8 beamformed : 1;
+	u8 stbc : 1;
+	u8 ldpc : 1;
+	u8 gnt_bt : 1;
+	u8 rsvd_0 : 1;
+	u8 band : 2;
+#endif
+
+/* @DW2 : offset 8 */
+#if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE)
+	u8 bad_tone_cnt_min_eign_0 : 4;
+	u8 bad_tone_cnt_cn_excess_0 : 4;
+#else
+	u8 bad_tone_cnt_cn_excess_0 : 4;
+	u8 bad_tone_cnt_min_eign_0 : 4;
+#endif
+#if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE)
+	u8 training_done_a : 1;
+	u8 training_done_b : 1;
+	u8 training_done_c : 1;
+	u8 training_done_d : 1;
+	u8 hw_antsw_occur_a : 1;
+	u8 hw_antsw_occur_b : 1;
+	u8 hw_antsw_occur_c : 1;
+	u8 hw_antsw_occur_d : 1;
+#else
+	u8 hw_antsw_occur_d : 1;
+	u8 hw_antsw_occur_c : 1;
+	u8 hw_antsw_occur_b : 1;
+	u8 hw_antsw_occur_a : 1;
+	u8 training_done_d : 1;
+	u8 training_done_c : 1;
+	u8 training_done_b : 1;
+	u8 training_done_a : 1;
+#endif
+#if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE)
+	u8 antidx_a : 4;
+	u8 antidx_b : 4;
+#else
+	u8 antidx_b : 4;
+	u8 antidx_a : 4;
+#endif
+#if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE)
+	u8 antidx_c : 4;
+	u8 antidx_d : 4;
+#else
+	u8 antidx_d : 4;
+	u8 antidx_c : 4;
+#endif
+/* @DW3 : offset 12 */
+	u8 tx_pkt_cnt;
+#if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE)
+	u8 bad_tone_cnt_min_eign_1 : 4;
+	u8 bad_tone_cnt_cn_excess_1 : 4;
+#else
+	u8 bad_tone_cnt_cn_excess_1 : 4;
+	u8 bad_tone_cnt_min_eign_1 : 4;
+#endif
+#if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE)
+	u8 avg_cond_num_0 : 7;
+	u8 avg_cond_num_1_lsb : 1;
+#else
+	u8 avg_cond_num_1_lsb : 1;
+	u8 avg_cond_num_0 : 7;
+#endif
+#if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE)
+	u8 avg_cond_num_1_msb : 6;
+	u8 rsvd_1 : 2;
+#else
+	u8 rsvd_1 : 2;
+	u8 avg_cond_num_1_msb : 6;
+#endif
+
+	/* @DW4 : offset 16 */
+	s8 rxevm[4]; /* s(8,1) */
+
+	/* @DW5 : offset 20 */
+	u8 eigenvalue[4]; /* @eigenvalue or eigenvalue of seg0 (in dB) */
+
+	/* @DW6 : ofset 24 */
+	s8 rxsnr[4]; /* s(8,1) */
 };
 
-__PACK struct _phy_status_rpt_jaguar2_type5 {
-	/* smart antenna */
-	/* DW0 ane DW1 */
-#if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE)
-	u8		page_num:4;
-	u8		pkt_cnt:2;
-	u8		channel_msb:2;
-#else
-	u8		channel_msb:2;
-	u8		pkt_cnt:2;
-	u8		page_num:4;
-#endif
-	u8		pwdb[4];
-#if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE)
-	u8		l_rxsc: 4;
-	u8		ht_rxsc: 4;
-#else
-	u8		ht_rxsc: 4;
-	u8		l_rxsc: 4;
-#endif
-	u8		channel_lsb;
-#if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE)
-	u8		band: 2;
-	u8		rsvd_0: 1;
-	u8		hw_antsw_occu: 1;
-	u8		gnt_bt: 1;
-	u8		ldpc: 1;
-	u8		stbc: 1;
-	u8		beamformed: 1;
-#else
-	u8		beamformed: 1;
-	u8		stbc: 1;
-	u8		ldpc: 1;
-	u8		gnt_bt: 1;
-	u8		hw_antsw_occu: 1;
-	u8		rsvd_0: 1;
-	u8		band: 2;
-#endif
-	/* DW2 ~ DW5 */
-	u8		rsvd_1;
-#if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE)
-	u8		rsvd_2:4;
-	u8		hw_antsw_occur_a:1;
-	u8		hw_antsw_occur_b:1;
-	u8		hw_antsw_occur_c:1;
-	u8		hw_antsw_occur_d:1;
-	u8		antidx_a: 4;
-	u8		antidx_b: 4;
-	u8		antidx_c: 4;
-	u8		antidx_d: 4;
-#else
-	u8		hw_antsw_occur_d:1;
-	u8		hw_antsw_occur_c:1;
-	u8		hw_antsw_occur_b:1;
-	u8		hw_antsw_occur_a:1;
-	u8		rsvd_2:4;
-	u8		antidx_b: 4;
-	u8		antidx_a: 4;
-	u8		antidx_d: 4;
-	u8		antidx_c: 4;
-#endif
-	u8		tx_pkt_cnt;
-#if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE)
-	u8		inf_pos_0_A_flg:1;
-	u8		inf_pos_1_A_flg:1;
-	u8		inf_pos_0_B_flg:1;
-	u8		inf_pos_1_B_flg:1;
-	u8		inf_pos_0_C_flg:1;
-	u8		inf_pos_1_C_flg:1;
-	u8		inf_pos_0_D_flg:1;
-	u8		inf_pos_1_D_flg:1;
-#else
-	u8		inf_pos_1_D_flg:1;
-	u8		inf_pos_0_D_flg:1;
-	u8		inf_pos_1_C_flg:1;
-	u8		inf_pos_0_C_flg:1;
-	u8		inf_pos_1_B_flg:1;
-	u8		inf_pos_0_B_flg:1;
-	u8		inf_pos_1_A_flg:1;
-	u8		inf_pos_0_A_flg:1;
-#endif
-	u8		rsvd_3;
-	u8		rsvd_4;
-	u8		inf_pos_0_a;
-	u8		inf_pos_1_a;
-	u8		inf_pos_0_b;
-	u8		inf_pos_1_b;
-	u8		inf_pos_0_c;
-	u8		inf_pos_1_c;
-	u8		inf_pos_0_d;
-	u8		inf_pos_1_d;
+__PACK struct phy_sts_rpt_jgr3_type5 {
+/* @Debug */
+/* @DW0 ane DW1 : offset 0 and 4 */
+#if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE)
+	u8 page_num : 4;
+	u8 pkt_cnt : 2;
+	u8 channel_msb : 2;
+#else
+	u8 channel_msb : 2;
+	u8 pkt_cnt : 2;
+	u8 page_num : 4;
+#endif
+	u8 pwdb[4];
+#if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE)
+	u8 l_rxsc : 4;
+	u8 ht_rxsc : 4;
+#else
+	u8 ht_rxsc : 4;
+	u8 l_rxsc : 4;
+#endif
+	u8 channel_lsb;
+#if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE)
+	u8 band : 2;
+	u8 rsvd_0 : 2;
+	u8 gnt_bt : 1;
+	u8 ldpc : 1;
+	u8 stbc : 1;
+	u8 beamformed : 1;
+#else
+	u8 beamformed : 1;
+	u8 stbc : 1;
+	u8 ldpc : 1;
+	u8 gnt_bt : 1;
+	u8 rsvd_0 : 2;
+	u8 band : 2;
+#endif
+	/* @DW2 : offset 8 */
+	u8 rsvd_1;
+#if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE)
+	u8 rsvd_2 : 4;
+	u8 hw_antsw_occur_a : 1;
+	u8 hw_antsw_occur_b : 1;
+	u8 hw_antsw_occur_c : 1;
+	u8 hw_antsw_occur_d : 1;
+#else
+	u8 hw_antsw_occur_d : 1;
+	u8 hw_antsw_occur_c : 1;
+	u8 hw_antsw_occur_b : 1;
+	u8 hw_antsw_occur_a : 1;
+	u8 rsvd_2 : 4;
+#endif
+#if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE)
+	u8 antidx_a : 4;
+	u8 antidx_b : 4;
+#else
+	u8 antidx_b : 4;
+	u8 antidx_a : 4;
+#endif
+#if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE)
+	u8 antidx_c : 4;
+	u8 antidx_d : 4;
+#else
+	u8 antidx_d : 4;
+	u8 antidx_c : 4;
+#endif
+	/* @DW3 : offset 12 */
+	u8 tx_pkt_cnt;
+#if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE)
+	u8 inf_pos_0_A_flg : 1;
+	u8 inf_pos_1_A_flg : 1;
+	u8 inf_pos_0_B_flg : 1;
+	u8 inf_pos_1_B_flg : 1;
+	u8 inf_pos_0_C_flg : 1;
+	u8 inf_pos_1_C_flg : 1;
+	u8 inf_pos_0_D_flg : 1;
+	u8 inf_pos_1_D_flg : 1;
+#else
+	u8 inf_pos_1_D_flg : 1;
+	u8 inf_pos_0_D_flg : 1;
+	u8 inf_pos_1_C_flg : 1;
+	u8 inf_pos_0_C_flg : 1;
+	u8 inf_pos_1_B_flg : 1;
+	u8 inf_pos_0_B_flg : 1;
+	u8 inf_pos_1_A_flg : 1;
+	u8 inf_pos_0_A_flg : 1;
+#endif
+	u8 rsvd_3;
+	u8 rsvd_4;
+	/* @DW4 : offset 16 */
+	u8 inf_pos_0_a;
+	u8 inf_pos_1_a;
+	u8 inf_pos_0_b;
+	u8 inf_pos_1_b;
+	/* @DW5 : offset 20 */
+	u8 inf_pos_0_c;
+	u8 inf_pos_1_c;
+	u8 inf_pos_0_d;
+	u8 inf_pos_1_d;
 };
-#endif /*#if (ODM_PHY_STATUS_NEW_TYPE_SUPPORT == 1)*/
+#endif /*@#ifdef PHYSTS_3RD_TYPE_SUPPORT*/
 
 #if (ODM_PHY_STATUS_NEW_TYPE_SUPPORT == 1)
+boolean
+phydm_query_is_mu_api(struct dm_struct *phydm, u8 ppdu_idx, u8 *p_data_rate,
+		      u8 *p_gid);
+#endif
 
-void
-phydm_rx_phy_status_new_type(
-	void						*p_dm_void,
-	u8						*p_phy_status,
-	struct phydm_perpkt_info_struct			*p_pktinfo,
-	struct phydm_phyinfo_struct			*p_phy_info
-);
+#ifdef PHYSTS_3RD_TYPE_SUPPORT
+void phydm_rx_physts_3rd_type(void *dm_void, u8 *phy_sts,
+			      struct phydm_perpkt_info_struct *pktinfo,
+			      struct phydm_phyinfo_struct *phy_info);
+#endif
 
-boolean
-phydm_query_is_mu_api(
-	struct PHY_DM_STRUCT			*p_phydm,
-	u8								ppdu_idx,
-	u8								*p_data_rate,
-	u8								*p_gid
-);
-#endif
-
-void
-phydm_reset_phystatus_avg(
-	struct PHY_DM_STRUCT	*p_dm
-);
-
-void
-phydm_reset_phystatus_statistic(
-	struct PHY_DM_STRUCT	*p_dm
-);
-
-void
-phydm_reset_rssi_for_dm(
-	struct PHY_DM_STRUCT	*p_dm,
-	u8		station_id
-);
-
-void
-phydm_get_cck_rssi_table_from_reg(
-	struct PHY_DM_STRUCT	*p_dm
-);
-
-u8
-phydm_rate_to_num_ss(
-	struct PHY_DM_STRUCT		*p_dm,
-	u8			data_rate
-);
+void phydm_reset_phystatus_avg(struct dm_struct *dm);
+
+void phydm_reset_phystatus_statistic(struct dm_struct *dm);
+
+void phydm_reset_rssi_for_dm(struct dm_struct *dm, u8 station_id);
+
+void phydm_get_cck_rssi_table_from_reg(struct dm_struct *dm);
 
 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
-void
-phydm_normal_driver_rx_sniffer(
-	struct PHY_DM_STRUCT			*p_dm,
-	u8				*p_desc,
-	PRT_RFD_STATUS		p_rt_rfd_status,
-	u8				*p_drv_info,
-	u8				phy_status
-);
-#endif
-
-s32
-phydm_signal_scale_mapping(
-	struct PHY_DM_STRUCT *p_dm,
-	s32 curr_sig
-);
-
-void
-odm_phy_status_query(
-	struct PHY_DM_STRUCT					*p_dm,
-	struct phydm_phyinfo_struct			*p_phy_info,
-	u8						*p_phy_status,
-	struct phydm_perpkt_info_struct			*p_pktinfo
-);
-
-void
-phydm_rx_phy_status_init(
-	void			*p_dm_void
-);
-
-#endif /*#ifndef	__HALHWOUTSRC_H__*/
+void phydm_normal_driver_rx_sniffer(
+	struct dm_struct *dm,
+	u8 *desc,
+	PRT_RFD_STATUS rt_rfd_status,
+	u8 *drv_info,
+	u8 phy_status);
+#endif
+
+#if (DM_ODM_SUPPORT_TYPE == ODM_CE)
+s32 phydm_signal_scale_mapping(struct dm_struct *dm, s32 curr_sig);
+#endif
+
+void odm_phy_status_query(struct dm_struct *dm,
+			  struct phydm_phyinfo_struct *phy_info,
+			  u8 *phy_status_inf,
+			  struct phydm_perpkt_info_struct *pktinfo);
+
+void phydm_rx_phy_status_init(void *dm_void);
+
+#endif /*@#ifndef	__HALHWOUTSRC_H__*/
diff --git a/rtl8723DS/hal/phydm/phydm_pmac_tx_setting.c b/rtl8723DS/hal/phydm/phydm_pmac_tx_setting.c
new file mode 100644
index 0000000..882283c
--- a/dev/null
+++ b/rtl8723DS/hal/phydm/phydm_pmac_tx_setting.c
@@ -0,0 +1,543 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2007 - 2017  Realtek Corporation.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ *
+ * The full GNU General Public License is included in this distribution in the
+ * file called LICENSE.
+ *
+ * Contact Information:
+ * wlanfae <wlanfae@realtek.com>
+ * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
+ * Hsinchu 300, Taiwan.
+ *
+ * Larry Finger <Larry.Finger@lwfinger.net>
+ *
+ *****************************************************************************/
+
+/*@************************************************************
+ * include files
+ ************************************************************/
+
+#include "mp_precomp.h"
+#include "phydm_precomp.h"
+
+#ifdef PHYDM_PMAC_TX_SETTING_SUPPORT
+#ifdef PHYDM_IC_JGR3_SERIES_SUPPORT
+
+void phydm_start_cck_cont_tx_jgr3(void *dm_void,
+				  struct phydm_pmac_info *tx_info)
+{
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct phydm_pmac_tx *pmac_tx = &dm->dm_pmac_tx_table;
+	u8 rate = tx_info->tx_rate; /* @HW rate */
+
+	/* @if CCK block on? */
+	if (!odm_get_bb_reg(dm, R_0x1c3c, BIT(1)))
+		odm_set_bb_reg(dm, R_0x1c3c, BIT(1), 1);
+
+	/* @Turn Off All Test mode */
+	odm_set_bb_reg(dm, R_0x1ca4, 0x7, 0x0);
+
+	odm_set_bb_reg(dm, R_0x1a00, 0x3000, rate);
+	odm_set_bb_reg(dm, R_0x1a00, 0x3, 0x2); /* @transmit mode */
+	odm_set_bb_reg(dm, R_0x1a00, 0x8, 0x1); /* @turn on scramble setting */
+
+	/* @Fix rate selection issue */
+	odm_set_bb_reg(dm, R_0x1a70, 0x4000, 0x1);
+	/* @set RX weighting for path I & Q to 0 */
+	odm_set_bb_reg(dm, R_0x1a14, 0x300, 0x3);
+	/* @set loopback mode */
+	odm_set_bb_reg(dm, R_0x1c3c, 0x10, 0x1);
+
+	pmac_tx->cck_cont_tx = true;
+	pmac_tx->ofdm_cont_tx = false;
+}
+
+void phydm_stop_cck_cont_tx_jgr3(void *dm_void)
+{
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct phydm_pmac_tx *pmac_tx = &dm->dm_pmac_tx_table;
+
+	pmac_tx->cck_cont_tx = false;
+	pmac_tx->ofdm_cont_tx = false;
+
+	odm_set_bb_reg(dm, R_0x1a00, 0x3, 0x0); /* @normal mode */
+	odm_set_bb_reg(dm, R_0x1a00, 0x8, 0x1); /* @turn on scramble setting */
+
+	/* @back to default */
+	odm_set_bb_reg(dm, R_0x1a70, 0x4000, 0x0);
+	odm_set_bb_reg(dm, R_0x1a14, 0x300, 0x0);
+	odm_set_bb_reg(dm, R_0x1c3c, 0x10, 0x0);
+	/* @BB Reset */
+	odm_set_bb_reg(dm, R_0x1d0c, 0x10000, 0x0);
+	odm_set_bb_reg(dm, R_0x1d0c, 0x10000, 0x1);
+}
+
+void phydm_start_ofdm_cont_tx_jgr3(void *dm_void)
+{
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct phydm_pmac_tx *pmac_tx = &dm->dm_pmac_tx_table;
+
+	/* @1. if OFDM block on */
+	if (!odm_get_bb_reg(dm, R_0x1c3c, BIT(0)))
+		odm_set_bb_reg(dm, R_0x1c3c, BIT(0), 1);
+
+	/* @2. set CCK test mode off, set to CCK normal mode */
+	odm_set_bb_reg(dm, R_0x1a00, 0x3, 0);
+
+	/* @3. turn on scramble setting */
+	odm_set_bb_reg(dm, R_0x1a00, 0x8, 1);
+
+	/* @4. Turn On Continue Tx and turn off the other test modes. */
+	odm_set_bb_reg(dm, R_0x1ca4, 0x7, 0x1);
+
+	pmac_tx->cck_cont_tx = false;
+	pmac_tx->ofdm_cont_tx = true;
+}
+
+void phydm_stop_ofdm_cont_tx_jgr3(void *dm_void)
+{
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct phydm_pmac_tx *pmac_tx = &dm->dm_pmac_tx_table;
+
+	pmac_tx->cck_cont_tx = false;
+	pmac_tx->ofdm_cont_tx = false;
+
+	/* @Turn Off All Test mode */
+	odm_set_bb_reg(dm, R_0x1ca4, 0x7, 0x0);
+
+	/* @Delay 10 ms */
+	ODM_delay_ms(10);
+
+	/* @BB Reset */
+	odm_set_bb_reg(dm, R_0x1d0c, 0x10000, 0x0);
+	odm_set_bb_reg(dm, R_0x1d0c, 0x10000, 0x1);
+}
+
+void phydm_set_single_tone_jgr3(void *dm_void, boolean is_single_tone,
+				boolean en_pmac_tx, u8 path)
+{
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct phydm_pmac_tx *pmac_tx = &dm->dm_pmac_tx_table;
+	u8 start = RF_PATH_A, end = RF_PATH_A;
+
+	switch (path) {
+	case RF_PATH_A:
+	case RF_PATH_B:
+	case RF_PATH_C:
+	case RF_PATH_D:
+		start = path;
+		end = path;
+		break;
+	case RF_PATH_AB:
+		start = RF_PATH_A;
+		end = RF_PATH_B;
+		break;
+#if (RTL8814B_SUPPORT || RTL8198F_SUPPORT)
+	case RF_PATH_AC:
+		start = RF_PATH_A;
+		end = RF_PATH_C;
+		break;
+	case RF_PATH_AD:
+		start = RF_PATH_A;
+		end = RF_PATH_D;
+		break;
+	case RF_PATH_BC:
+		start = RF_PATH_B;
+		end = RF_PATH_C;
+		break;
+	case RF_PATH_BD:
+		start = RF_PATH_B;
+		end = RF_PATH_D;
+		break;
+	case RF_PATH_CD:
+		start = RF_PATH_C;
+		end = RF_PATH_D;
+		break;
+	case RF_PATH_ABC:
+		start = RF_PATH_A;
+		end = RF_PATH_C;
+		break;
+	case RF_PATH_ABD:
+		start = RF_PATH_A;
+		end = RF_PATH_D;
+		break;
+	case RF_PATH_ACD:
+		start = RF_PATH_A;
+		end = RF_PATH_D;
+		break;
+	case RF_PATH_BCD:
+		start = RF_PATH_B;
+		end = RF_PATH_D;
+		break;
+	case RF_PATH_ABCD:
+		start = RF_PATH_A;
+		end = RF_PATH_D;
+		break;
+#endif
+	}
+
+	if (is_single_tone) {
+		pmac_tx->tx_scailing = odm_get_bb_reg(dm, R_0x81c, MASKDWORD);
+
+		if (!en_pmac_tx) {
+			phydm_start_ofdm_cont_tx_jgr3(dm);
+			/*SendPSPoll(pAdapter);*/
+		}
+
+		odm_set_bb_reg(dm, R_0x1c68, BIT(24), 0x1); /* @Disable CCA */
+
+		for (start; start <= end; start++) {
+			/* @Tx mode: RF0x00[19:16]=4'b0010 */
+			/* odm_set_rf_reg(dm, start, RF_0x0, 0xF0000, 0x2); */
+			/* @Lowest RF gain index: RF_0x0[4:0] = 0*/
+			odm_set_rf_reg(dm, start, RF_0x0, 0x1F, 0x0);
+			/* @RF LO enabled */
+			odm_set_rf_reg(dm, start, RF_0x58, BIT(1), 0x1);
+		}
+		#if (RTL8814B_SUPPORT == 1)
+		if (dm->support_ic_type & ODM_RTL8814B) {
+			/* @Tx mode: RF0x00[19:16]=4'b0010 */
+			/* config_phydm_write_rf_syn_8814b(dm, RF_SYN0, RF_0x0,
+			 *				0xF0000, 0x2);
+			 */
+			/* @Lowest RF gain index: RF_0x0[4:0] = 0*/
+			config_phydm_write_rf_syn_8814b(dm, RF_SYN0, RF_0x0,
+							0x1F, 0x0);
+			/* @RF LO enabled */
+			config_phydm_write_rf_syn_8814b(dm, RF_SYN0, RF_0x58,
+							BIT(1), 0x1);
+		}
+		#endif
+		odm_set_bb_reg(dm, R_0x81c, 0x001FC000, 0);
+	} else {
+		for (start; start <= end; start++) {
+			/* @RF LO disabled */
+			odm_set_rf_reg(dm, start, RF_0x58, BIT(1), 0x0);
+		}
+		odm_set_bb_reg(dm, R_0x1c68, BIT(24), 0x0); /* @Enable CCA */
+
+		if (!en_pmac_tx)
+			phydm_stop_ofdm_cont_tx_jgr3(dm);
+
+		odm_set_bb_reg(dm, R_0x81c, MASKDWORD, pmac_tx->tx_scailing);
+	}
+}
+
+void phydm_stop_pmac_tx_jgr3(void *dm_void, struct phydm_pmac_info *tx_info)
+{
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct phydm_pmac_tx *pmac_tx = &dm->dm_pmac_tx_table;
+	u32 tmp = 0;
+
+	if (tx_info->mode == CONT_TX) {
+		odm_set_bb_reg(dm, R_0x1e70, 0xf, 2); /* TX Stop */
+		if (pmac_tx->is_cck_rate)
+			phydm_stop_cck_cont_tx_jgr3(dm);
+		else
+			phydm_stop_ofdm_cont_tx_jgr3(dm);
+	} else {
+		if (pmac_tx->is_cck_rate) {
+			tmp = odm_get_bb_reg(dm, R_0x2de4, MASKLWORD);
+			odm_set_bb_reg(dm, R_0x1e64, MASKLWORD, tmp + 50);
+		}
+		odm_set_bb_reg(dm, R_0x1e70, 0xf, 2); /* TX Stop */
+	}
+
+	if (tx_info->mode == OFDM_SINGLE_TONE_TX) {
+		/* Stop HW TX -> Stop Continuous TX -> Stop RF Setting */
+		if (pmac_tx->is_cck_rate)
+			phydm_stop_cck_cont_tx_jgr3(dm);
+		else
+			phydm_stop_ofdm_cont_tx_jgr3(dm);
+
+		phydm_set_single_tone_jgr3(dm, false, true, pmac_tx->path);
+	}
+}
+
+void phydm_set_mac_phy_txinfo_jgr3(void *dm_void,
+				   struct phydm_pmac_info *tx_info)
+{
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct phydm_pmac_tx *pmac_tx = &dm->dm_pmac_tx_table;
+	u32 tmp = 0;
+
+	odm_set_bb_reg(dm, R_0xa58, 0x003F8000, tx_info->tx_rate);
+
+	/* @0x900[1] ndp_sound */
+	odm_set_bb_reg(dm, R_0x900, 0x2, tx_info->ndp_sound);
+	/* @0x900[27:24] txsc [29:28] bw [31:30] m_stbc */
+	tmp = (tx_info->tx_sc) | ((tx_info->bw) << 4) |
+	      ((tx_info->m_stbc - 1) << 6);
+	odm_set_bb_reg(dm, R_0x900, 0xFF000000, tmp);
+
+	if (pmac_tx->is_ofdm_rate) {
+		odm_set_bb_reg(dm, R_0x900, 0x1, 0);
+		odm_set_bb_reg(dm, R_0x900, 0x4, 0);
+	} else if (pmac_tx->is_ht_rate) {
+		odm_set_bb_reg(dm, R_0x900, 0x1, 1);
+		odm_set_bb_reg(dm, R_0x900, 0x4, 0);
+	} else if (pmac_tx->is_vht_rate) {
+		odm_set_bb_reg(dm, R_0x900, 0x1, 0);
+		odm_set_bb_reg(dm, R_0x900, 0x4, 1);
+	}
+
+	tmp = tx_info->packet_period; /* @for TX interval */
+	odm_set_bb_reg(dm, R_0x9b8, 0xffff0000, tmp);
+}
+
+void phydm_set_sig_jgr3(void *dm_void, struct phydm_pmac_info *tx_info)
+{
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct phydm_pmac_tx *pmac_tx = &dm->dm_pmac_tx_table;
+	u32 tmp = 0;
+
+	if (pmac_tx->is_cck_rate)
+		return;
+
+	/* @L-SIG */
+	odm_set_bb_reg(dm, R_0x1eb4, 0xfffff, tx_info->packet_count);
+
+	tmp = BYTE_2_DWORD(0, tx_info->lsig[2], tx_info->lsig[1],
+			   tx_info->lsig[0]);
+	odm_set_bb_reg(dm, R_0x908, 0xffffff, tmp);
+#if 0
+	/* @0x924[7:0] = Data init octet */
+	tmp = tx_info->packet_pattern;
+	odm_set_bb_reg(dm, R_0x924, 0xff, tmp);
+
+	if (tx_info->packet_pattern == RANDOM_BY_PN32)
+		tmp = 0x3;
+	else
+		tmp = 0x0;
+
+	odm_set_bb_reg(dm, R_0x914, 0x60000000, tmp);
+#endif
+	if (pmac_tx->is_ht_rate) {
+	/* @HT SIG */
+		tmp = BYTE_2_DWORD(0, tx_info->ht_sig[2], tx_info->ht_sig[1],
+				   tx_info->ht_sig[0]);
+		odm_set_bb_reg(dm, R_0x90c, 0xffffff, tmp);
+		tmp = BYTE_2_DWORD(0, tx_info->ht_sig[5], tx_info->ht_sig[4],
+				   tx_info->ht_sig[3]);
+		odm_set_bb_reg(dm, R_0x910, 0xffffff, tmp);
+	} else if (pmac_tx->is_vht_rate) {
+	/* @VHT SIG A/B/serv_field/delimiter */
+		tmp = BYTE_2_DWORD(0, tx_info->vht_sig_a[2],
+				   tx_info->vht_sig_a[1],
+				   tx_info->vht_sig_a[0]);
+		odm_set_bb_reg(dm, R_0x90c, 0xffffff, tmp);
+		tmp = BYTE_2_DWORD(0, tx_info->vht_sig_a[5],
+				   tx_info->vht_sig_a[4],
+				   tx_info->vht_sig_a[3]);
+		odm_set_bb_reg(dm, R_0x910, 0xffffff, tmp);
+		tmp = BYTE_2_DWORD(tx_info->vht_sig_b[3], tx_info->vht_sig_b[2],
+				   tx_info->vht_sig_b[1],
+				   tx_info->vht_sig_b[0]);
+		odm_set_bb_reg(dm, R_0x914, 0x1FFFFFFF, tmp);
+
+		tmp = tx_info->vht_sig_b_crc;
+		odm_set_bb_reg(dm, R_0x938, 0xff00, tmp);
+
+		tmp = BYTE_2_DWORD(tx_info->vht_delimiter[3],
+				   tx_info->vht_delimiter[2],
+				   tx_info->vht_delimiter[1],
+				   tx_info->vht_delimiter[0]);
+		odm_set_bb_reg(dm, R_0x940, MASKDWORD, tmp);
+	}
+}
+
+void phydm_set_cck_preamble_hdr_jgr3(void *dm_void,
+				     struct phydm_pmac_info *tx_info)
+{
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct phydm_pmac_tx *pmac_tx = &dm->dm_pmac_tx_table;
+	u32 tmp = 0;
+
+	if (!pmac_tx->is_cck_rate)
+		return;
+
+	tmp = tx_info->packet_count | (tx_info->sfd << 16);
+	odm_set_bb_reg(dm, R_0x1e64, MASKDWORD, tmp);
+	tmp = tx_info->signal_field | (tx_info->service_field << 8) |
+	      (tx_info->length << 16);
+	odm_set_bb_reg(dm, R_0x1e68, MASKDWORD, tmp);
+	tmp = BYTE_2_DWORD(0, 0, tx_info->crc16[1], tx_info->crc16[0]);
+	odm_set_bb_reg(dm, R_0x1e6c, 0xffff, tmp);
+
+	if (tx_info->is_short_preamble)
+		odm_set_bb_reg(dm, R_0x1e6c, BIT(16), 0);
+	else
+		odm_set_bb_reg(dm, R_0x1e6c, BIT(16), 1);
+}
+
+void phydm_set_mode_jgr3(void *dm_void, struct phydm_pmac_info *tx_info,
+			 enum phydm_pmac_mode mode)
+{
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct phydm_pmac_tx *pmac_tx = &dm->dm_pmac_tx_table;
+
+	if (mode == CONT_TX) {
+		tx_info->packet_count = 1;
+
+		if (pmac_tx->is_cck_rate)
+			phydm_start_cck_cont_tx_jgr3(dm, tx_info);
+		else
+			phydm_start_ofdm_cont_tx_jgr3(dm);
+	} else if (mode == OFDM_SINGLE_TONE_TX) {
+		/* Continuous TX -> HW TX -> RF Setting */
+		tx_info->packet_count = 1;
+
+		if (pmac_tx->is_cck_rate)
+			phydm_start_cck_cont_tx_jgr3(dm, tx_info);
+		else
+			phydm_start_ofdm_cont_tx_jgr3(dm);
+	} else if (mode == PKTS_TX) {
+		if (pmac_tx->is_cck_rate && tx_info->packet_count == 0)
+			tx_info->packet_count = 0xffff;
+	}
+}
+
+void phydm_set_pmac_txon_jgr3(void *dm_void, struct phydm_pmac_info *tx_info)
+{
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct phydm_pmac_tx *pmac_tx = &dm->dm_pmac_tx_table;
+
+	odm_set_bb_reg(dm, R_0x1d08, BIT(0), 1); /* Turn on PMAC */
+
+	/* mac scramble seed setting, only in 8198F */
+	#if (RTL8198F_SUPPORT == 1)
+		if (dm->support_ic_type & ODM_RTL8198F)
+			if ~(odm_get_bb_reg(dm, R_0x1d10, BIT(16)))
+			     odm_set_bb_reg(dm, R_0x1d10, BIT(16), 1);
+	#endif
+
+	if (pmac_tx->is_cck_rate) {
+		odm_set_bb_reg(dm, R_0x1e70, 0xf, 8); /* TX CCK ON */
+		odm_set_bb_reg(dm, R_0x1a84, BIT(31), 0);
+	} else {
+		odm_set_bb_reg(dm, R_0x1e70, 0xf, 4); /* TX Ofdm ON */
+	}
+
+	if (tx_info->mode == OFDM_SINGLE_TONE_TX)
+		phydm_set_single_tone_jgr3(dm, true, true, pmac_tx->path);
+}
+
+void phydm_set_pmac_tx_jgr3(void *dm_void, struct phydm_pmac_info *tx_info,
+			    enum rf_path mpt_rf_path)
+{
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct phydm_pmac_tx *pmac_tx = &dm->dm_pmac_tx_table;
+
+	pmac_tx->is_cck_rate = phydm_is_cck_rate(dm, tx_info->tx_rate);
+	pmac_tx->is_ofdm_rate = phydm_is_ofdm_rate(dm, tx_info->tx_rate);
+	pmac_tx->is_ht_rate = phydm_is_ht_rate(dm, tx_info->tx_rate);
+	pmac_tx->is_vht_rate = phydm_is_vht_rate(dm, tx_info->tx_rate);
+	pmac_tx->path = mpt_rf_path;
+
+	if (!tx_info->en_pmac_tx) {
+		phydm_stop_pmac_tx_jgr3(dm, tx_info);
+		return;
+	}
+
+	phydm_set_mode_jgr3(dm, tx_info, tx_info->mode);
+
+	if (pmac_tx->is_cck_rate)
+		phydm_set_cck_preamble_hdr_jgr3(dm, tx_info);
+	else
+		phydm_set_sig_jgr3(dm, tx_info);
+
+	phydm_set_mac_phy_txinfo_jgr3(dm, tx_info);
+	phydm_set_pmac_txon_jgr3(dm, tx_info);
+}
+
+void phydm_set_tmac_tx_jgr3(void *dm_void)
+{
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+
+	/* Turn on TMAC */
+	if (odm_get_bb_reg(dm, R_0x1d08, BIT(0)))
+		odm_set_bb_reg(dm, R_0x1d08, BIT(0), 0);
+
+	/* mac scramble seed setting, only in 8198F */
+	#if (RTL8198F_SUPPORT == 1)
+		if (dm->support_ic_type & ODM_RTL8198F)
+			if (odm_get_bb_reg(dm, R_0x1d10, BIT(16)))
+				odm_set_bb_reg(dm, R_0x1d10, BIT(16), 0);
+	#endif
+
+	/* Turn on TMAC CCK */
+	if ((odm_get_bb_reg(dm, R_0x1a84, BIT(31))) == 0)
+		odm_set_bb_reg(dm, R_0x1a84, BIT(31), 1);
+}
+#endif
+
+void phydm_start_cck_cont_tx(void *dm_void, struct phydm_pmac_info *tx_info)
+{
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+
+	if (dm->support_ic_type & ODM_IC_JGR3_SERIES)
+		phydm_start_cck_cont_tx_jgr3(dm, tx_info);
+}
+
+void phydm_stop_cck_cont_tx(void *dm_void)
+{
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+
+	if (dm->support_ic_type & ODM_IC_JGR3_SERIES)
+		phydm_stop_cck_cont_tx_jgr3(dm);
+}
+
+void phydm_start_ofdm_cont_tx(void *dm_void)
+{
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+
+	if (dm->support_ic_type & ODM_IC_JGR3_SERIES)
+		phydm_start_ofdm_cont_tx_jgr3(dm);
+}
+
+void phydm_stop_ofdm_cont_tx(void *dm_void)
+{
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+
+	if (dm->support_ic_type & ODM_IC_JGR3_SERIES)
+		phydm_stop_ofdm_cont_tx_jgr3(dm);
+}
+
+void phydm_set_single_tone(void *dm_void, boolean is_single_tone,
+			   boolean en_pmac_tx, u8 path)
+{
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+
+	if (dm->support_ic_type & ODM_IC_JGR3_SERIES)
+		phydm_set_single_tone_jgr3(dm, is_single_tone,
+					   en_pmac_tx, path);
+}
+
+void phydm_set_pmac_tx(void *dm_void, struct phydm_pmac_info *tx_info,
+		       enum rf_path mpt_rf_path)
+{
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+
+	if (dm->support_ic_type & ODM_IC_JGR3_SERIES)
+		phydm_set_pmac_tx_jgr3(dm, tx_info, mpt_rf_path);
+}
+
+void phydm_set_tmac_tx(void *dm_void)
+{
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+
+	if (dm->support_ic_type & ODM_IC_JGR3_SERIES)
+		phydm_set_tmac_tx_jgr3(dm);
+}
+
+#endif
diff --git a/rtl8723DS/hal/phydm/phydm_pmac_tx_setting.h b/rtl8723DS/hal/phydm/phydm_pmac_tx_setting.h
new file mode 100644
index 0000000..982733c
--- a/dev/null
+++ b/rtl8723DS/hal/phydm/phydm_pmac_tx_setting.h
@@ -0,0 +1,152 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2007 - 2017  Realtek Corporation.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ *
+ * The full GNU General Public License is included in this distribution in the
+ * file called LICENSE.
+ *
+ * Contact Information:
+ * wlanfae <wlanfae@realtek.com>
+ * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
+ * Hsinchu 300, Taiwan.
+ *
+ * Larry Finger <Larry.Finger@lwfinger.net>
+ *
+ *****************************************************************************/
+
+#ifndef __PHYDM_PMAC_TX_SETTING_H__
+#define __PHYDM_PMAC_TX_SETTING_H__
+
+#define PMAC_TX_SETTING_VERSION "1.0"
+
+/* @1 ============================================================
+ * 1  Definition
+ * 1 ============================================================
+ */
+#define RANDOM_BY_PN32 0x12
+/* @1 ============================================================
+ * 1  structure
+ * 1 ============================================================
+ */
+struct phydm_pmac_info {
+	u8 en_pmac_tx:1; /*@ disable pmac 1: enable pmac */
+	u8 mode:3; /*@ 0: Packet TX 3:Continuous TX */
+	/* @u8 Ntx:4; */
+	u8 tx_rate; /* @should be HW rate*/
+	/* @u8 TX_RATE_HEX; */
+	u8 tx_sc;
+	/* @u8 bSGI:1; */
+	u8 is_short_preamble:1;
+	/* @u8 bSTBC:1; */
+	/* @u8 bLDPC:1; */
+	u8 ndp_sound:1;
+	u8 bw:3; /* @0:20 1:40 2:80Mhz */
+	u8 m_stbc; /* @bSTBC + 1 */
+	u16 packet_period;
+	u32 packet_count;
+	/* @u32 PacketLength; */
+	u8 packet_pattern;
+	u16 sfd;
+	u8 signal_field;
+	u8 service_field;
+	u16 length;
+	u8 crc16[2];
+	u8 lsig[3];
+	u8 ht_sig[6];
+	u8 vht_sig_a[6];
+	u8 vht_sig_b[4];
+	u8 vht_sig_b_crc;
+	u8 vht_delimiter[4];
+	/* @u8 mac_addr[6]; */
+};
+
+struct phydm_pmac_tx {
+	boolean is_cck_rate;
+	boolean is_ofdm_rate;
+	boolean is_ht_rate;
+	boolean is_vht_rate;
+	boolean cck_cont_tx;
+	boolean ofdm_cont_tx;
+	u8 path;
+	u32 tx_scailing;
+};
+
+/* @1 ============================================================
+ * 1  enumeration
+ * 1 ============================================================
+ */
+
+enum phydm_pmac_mode {
+	NONE_TEST,
+	PKTS_TX,
+	PKTS_RX,
+	CONT_TX,
+	OFDM_SINGLE_TONE_TX,
+	CCK_CARRIER_SIPPRESSION_TX
+};
+
+/* @1 ============================================================
+ * 1  function prototype
+ * 1 ============================================================
+ */
+#ifdef PHYDM_IC_JGR3_SERIES_SUPPORT
+void phydm_start_cck_cont_tx_jgr3(void *dm_void,
+				  struct phydm_pmac_info *tx_info);
+
+void phydm_stop_cck_cont_tx_jgr3(void *dm_void);
+
+void phydm_start_ofdm_cont_tx_jgr3(void *dm_void);
+
+void phydm_stop_ofdm_cont_tx_jgr3(void *dm_void);
+
+void phydm_set_single_tone_jgr3(void *dm_void, boolean is_single_tone,
+				boolean en_pmac_tx, u8 path);
+
+void phydm_stop_pmac_tx_jgr3(void *dm_void, struct phydm_pmac_info *tx_info);
+
+void phydm_set_mac_phy_txinfo_jgr3(void *dm_void,
+				   struct phydm_pmac_info *tx_info);
+
+
+void phydm_set_sig_jgr3(void *dm_void, struct phydm_pmac_info *tx_info);
+
+void phydm_set_cck_preamble_hdr_jgr3(void *dm_void,
+				     struct phydm_pmac_info *tx_info);
+
+void phydm_set_mode_jgr3(void *dm_void, struct phydm_pmac_info *tx_info,
+			 enum phydm_pmac_mode mode);
+
+void phydm_set_pmac_txon_jgr3(void *dm_void, struct phydm_pmac_info *tx_info);
+
+void phydm_set_pmac_tx_jgr3(void *dm_void, struct phydm_pmac_info *tx_info,
+			    enum rf_path mpt_rf_path);
+
+void phydm_set_tmac_tx_jgr3(void *dm_void);
+#endif
+
+void phydm_start_cck_cont_tx(void *dm_void, struct phydm_pmac_info *tx_info);
+
+void phydm_stop_cck_cont_tx(void *dm_void);
+
+void phydm_start_ofdm_cont_tx(void *dm_void);
+
+void phydm_stop_ofdm_cont_tx(void *dm_void);
+
+void phydm_set_single_tone(void *dm_void, boolean is_single_tone,
+			   boolean en_pmac_tx, u8 path);
+
+void phydm_set_pmac_tx(void *dm_void, struct phydm_pmac_info *tx_info,
+		       enum rf_path mpt_rf_path);
+
+void phydm_set_tmac_tx(void *dm_void);
+
+#endif
diff --git a/rtl8723DS/hal/phydm/phydm_pow_train.c b/rtl8723DS/hal/phydm/phydm_pow_train.c
index c361e32..56bc241 100755..100644
--- a/rtl8723DS/hal/phydm/phydm_pow_train.c
+++ b/rtl8723DS/hal/phydm/phydm_pow_train.c
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2007 - 2017 Realtek Corporation.
+ * Copyright(c) 2007 - 2017  Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -8,206 +8,164 @@
  *
  * This program is distributed in the hope that it will be useful, but WITHOUT
  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  * more details.
  *
+ * The full GNU General Public License is included in this distribution in the
+ * file called LICENSE.
+ *
+ * Contact Information:
+ * wlanfae <wlanfae@realtek.com>
+ * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
+ * Hsinchu 300, Taiwan.
+ *
+ * Larry Finger <Larry.Finger@lwfinger.net>
+ *
  *****************************************************************************/
 
-/* ************************************************************
+/*************************************************************
  * include files
- * ************************************************************ */
+ ************************************************************/
 
 #include "mp_precomp.h"
 #include "phydm_precomp.h"
 
 #ifdef PHYDM_POWER_TRAINING_SUPPORT
-void
-phydm_reset_pt_para(
-	void			*p_dm_void
-)
+void phydm_reset_pt_para(void *dm_void)
 {
-	struct PHY_DM_STRUCT		*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	struct phydm_pow_train_stuc	*p_pow_train_t = &(p_dm->pow_train_table);
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct phydm_pow_train_stuc *pt_t = &dm->pow_train_table;
 
-	p_pow_train_t->pow_train_score = 0;
-	p_dm->phy_dbg_info.num_qry_phy_status_ofdm = 0;
-	p_dm->phy_dbg_info.num_qry_phy_status_cck = 0;
+	pt_t->pow_train_score = 0;
 }
 
-void
-phydm_update_power_training_state(
-	void			*p_dm_void
-)
+void phydm_update_power_training_state(void *dm_void)
 {
-	struct PHY_DM_STRUCT		*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	struct phydm_pow_train_stuc	*p_pow_train_t = &(p_dm->pow_train_table);
-	struct phydm_fa_struct			*p_fa_cnt = &(p_dm->false_alm_cnt);
-	struct phydm_dig_struct		*p_dig_t = &p_dm->dm_dig_table;
-	u32	pt_score_tmp = 0;
-	u32 crc_ok_cnt;
-	u32 cca_all_cnt;
-
-
-	/*is_disable_power_training is the key to H2C to disable/enable power training*/
-	/*if is_disable_power_training == 1, it will use largest power*/
-	if (!(p_dm->support_ability & ODM_BB_PWR_TRAIN)) {
-		p_dm->is_disable_power_training = true;
-		phydm_reset_pt_para(p_dm);
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct phydm_pow_train_stuc *pt_t = &dm->pow_train_table;
+	struct phydm_fa_struct *fa_cnt = &dm->false_alm_cnt;
+	struct ccx_info *ccx = &dm->dm_ccx_info;
+	u32 pt_score_tmp = ENABLE_PT_SCORE;
+	u32 crc_ok_cnt = 0;
+	u32 cca_cnt = 0;
+
+	/*@is_disable_power_training is the key to H2C to disable/enable PT*/
+	/*@if is_disable_power_training == 1, it will use largest power*/
+	if (!(dm->support_ability & ODM_BB_PWR_TRAIN) || !dm->is_linked) {
+		dm->is_disable_power_training = true;
+		phydm_reset_pt_para(dm);
 		return;
 	}
 
-	PHYDM_DBG(p_dm, DBG_PWR_TRAIN, ("%s ======>\n", __FUNCTION__));
+	PHYDM_DBG(dm, DBG_PWR_TRAIN, "%s ======>\n", __func__);
 
-	if (p_pow_train_t->force_power_training_state == DISABLE_POW_TRAIN) {
-		
-		p_dm->is_disable_power_training = true;
-		phydm_reset_pt_para(p_dm);
-		PHYDM_DBG(p_dm, DBG_PWR_TRAIN, ("Disable PT\n"));
+	if (pt_t->pt_state == DISABLE_POW_TRAIN) {
+		dm->is_disable_power_training = true;
+		phydm_reset_pt_para(dm);
+		PHYDM_DBG(dm, DBG_PWR_TRAIN, "Disable PT\n");
 		return;
 
-	} else if (p_pow_train_t->force_power_training_state == ENABLE_POW_TRAIN) {
-	
-		p_dm->is_disable_power_training = false;
-		phydm_reset_pt_para(p_dm);
-		PHYDM_DBG(p_dm, DBG_PWR_TRAIN, ("Enable PT\n"));
+	} else if (pt_t->pt_state == ENABLE_POW_TRAIN) {
+		dm->is_disable_power_training = false;
+		phydm_reset_pt_para(dm);
+		PHYDM_DBG(dm, DBG_PWR_TRAIN, "Enable PT\n");
 		return;
 
-	} else if (p_pow_train_t->force_power_training_state == DYNAMIC_POW_TRAIN) {
-
-		PHYDM_DBG(p_dm, DBG_PWR_TRAIN, ("Dynamic PT\n"));
-
-		if (!p_dm->is_linked) {
-			p_dm->is_disable_power_training = true;
-			p_pow_train_t->pow_train_score = 0;
-			p_dm->phy_dbg_info.num_qry_phy_status_ofdm = 0;
-			p_dm->phy_dbg_info.num_qry_phy_status_cck = 0;
-
-			PHYDM_DBG(p_dm, DBG_PWR_TRAIN, ("PT is disabled due to no link.\n"));
-			return;
-		}
+	} else if (pt_t->pt_state == DYNAMIC_POW_TRAIN) {
+		PHYDM_DBG(dm, DBG_PWR_TRAIN, "Dynamic PT\n");
 
-		/* First connect */
-		if ((p_dm->is_linked) && (p_dig_t->is_media_connect == false)) {
-			p_pow_train_t->pow_train_score = 0;
-			p_dm->phy_dbg_info.num_qry_phy_status_ofdm = 0;
-			p_dm->phy_dbg_info.num_qry_phy_status_cck = 0;
-			PHYDM_DBG(p_dm, DBG_PWR_TRAIN, ("(PT)First Connect\n"));
+		/* @Compute score */
+		crc_ok_cnt = dm->phy_dbg_info.num_qry_phy_status_ofdm +
+			     dm->phy_dbg_info.num_qry_phy_status_cck;
+		cca_cnt = fa_cnt->cnt_cca_all;
+#if 0
+		if (crc_ok_cnt > cca_cnt) { /*invalid situation*/
+			pt_score_tmp = KEEP_PRE_PT_SCORE;
 			return;
-		}
-
-		/* Compute score */
-		crc_ok_cnt = p_dm->phy_dbg_info.num_qry_phy_status_ofdm + p_dm->phy_dbg_info.num_qry_phy_status_cck;
-		cca_all_cnt = p_fa_cnt->cnt_cca_all;
-
-		if (crc_ok_cnt < cca_all_cnt) {
-			/* crc_ok <= (2/3)*cca */
-			if ((crc_ok_cnt + (crc_ok_cnt >> 1)) <= cca_all_cnt)
-				pt_score_tmp = DISABLE_PT_SCORE;
-
-			/* crc_ok <= (4/5)*cca */
-			else if ((crc_ok_cnt + (crc_ok_cnt >> 2)) <= cca_all_cnt)
-				pt_score_tmp = KEEP_PRE_PT_SCORE;
-
-			/* crc_ok > (4/5)*cca */
-			else
-				pt_score_tmp = ENABLE_PT_SCORE;
+		} else if ((crc_ok_cnt + (crc_ok_cnt >> 1)) <= cca_cnt) {
+		/* @???crc_ok <= (2/3)*cca */
+			pt_score_tmp = DISABLE_PT_SCORE;
+			dm->is_disable_power_training = true;
+		} else if ((crc_ok_cnt + (crc_ok_cnt >> 2)) <= cca_cnt) {
+		/* @???crc_ok <= (4/5)*cca */
+			pt_score_tmp = KEEP_PRE_PT_SCORE;
 		} else {
+		/* @???crc_ok > (4/5)*cca */
 			pt_score_tmp = ENABLE_PT_SCORE;
+			dm->is_disable_power_training = false;
+		}
+#endif
+		if (ccx->nhm_ratio > 10) {
+			pt_score_tmp = DISABLE_PT_SCORE;
+			dm->is_disable_power_training = true;
+		} else if (ccx->nhm_ratio < 5) {
+			pt_score_tmp = ENABLE_PT_SCORE;
+			dm->is_disable_power_training = false;
+		} else {
+			pt_score_tmp = KEEP_PRE_PT_SCORE;
 		}
 
-		PHYDM_DBG(p_dm, DBG_PWR_TRAIN, ("crc_ok_cnt = %d, cnt_cca_all = %d\n",
-				crc_ok_cnt, cca_all_cnt));
+		PHYDM_DBG(dm, DBG_PWR_TRAIN,
+			  "pkt_cnt{ofdm,cck,all} = {%d, %d, %d}, cnt_cca_all=%d\n",
+			  dm->phy_dbg_info.num_qry_phy_status_ofdm,
+			  dm->phy_dbg_info.num_qry_phy_status_cck,
+			  crc_ok_cnt, cca_cnt);
 
-		PHYDM_DBG(p_dm, DBG_PWR_TRAIN, ("num_qry_phy_status_ofdm = %d, num_qry_phy_status_cck = %d\n",
-			p_dm->phy_dbg_info.num_qry_phy_status_ofdm, p_dm->phy_dbg_info.num_qry_phy_status_cck));
-		
-		PHYDM_DBG(p_dm, DBG_PWR_TRAIN, ("pt_score_tmp = %d\n", pt_score_tmp));
-		PHYDM_DBG(p_dm, DBG_PWR_TRAIN, ("pt_score_tmp = 0(DISABLE), 1(KEEP), 2(ENABLE)\n"));
+		PHYDM_DBG(dm, DBG_PWR_TRAIN, "pt_score_tmp=%d\n", pt_score_tmp);
 
 		/* smoothing */
-		p_pow_train_t->pow_train_score = (pt_score_tmp << 4) + (p_pow_train_t->pow_train_score >> 1) + (p_pow_train_t->pow_train_score >> 2);
-		pt_score_tmp = (p_pow_train_t->pow_train_score + 32) >> 6;
-		PHYDM_DBG(p_dm, DBG_PWR_TRAIN, ("pow_train_score = %d, score after smoothing = %d\n",
-				p_pow_train_t->pow_train_score, pt_score_tmp));
-
-		/* mode decision */
-		if (pt_score_tmp == ENABLE_PT_SCORE) {
-			
-			p_dm->is_disable_power_training = false;
-			PHYDM_DBG(p_dm, DBG_PWR_TRAIN, ("Enable power training under dynamic.\n"));
-			
-		} else if (pt_score_tmp == DISABLE_PT_SCORE) {
-		
-			p_dm->is_disable_power_training = true;
-			PHYDM_DBG(p_dm, DBG_PWR_TRAIN, ("Disable PT due to noisy.\n"));
-		}
+		pt_t->pow_train_score = (pt_score_tmp << 4) +
+					(pt_t->pow_train_score >> 1) +
+					(pt_t->pow_train_score >> 2);
 
-		PHYDM_DBG(p_dm, DBG_PWR_TRAIN, ("Final, score = %d, is_disable_power_training = %d\n",
-			pt_score_tmp, p_dm->is_disable_power_training));
+		pt_score_tmp = (pt_t->pow_train_score + 32) >> 6;
 
-		p_dm->phy_dbg_info.num_qry_phy_status_ofdm = 0;
-		p_dm->phy_dbg_info.num_qry_phy_status_cck = 0;
+		PHYDM_DBG(dm, DBG_PWR_TRAIN,
+			  "pow_train_score = %d, score after smoothing = %d, is_disable_PT = %d\n",
+			  pt_t->pow_train_score, pt_score_tmp,
+			  dm->is_disable_power_training);
 	} else {
-	
-		p_dm->is_disable_power_training = true;
-		phydm_reset_pt_para(p_dm);
-
-		PHYDM_DBG(p_dm, DBG_PWR_TRAIN, ("PT is disabled due to unknown pt state.\n"));
-		return;
+		PHYDM_DBG(dm, DBG_PWR_TRAIN, "[%s]warning\n", __func__);
 	}
 }
 
-void
-phydm_pow_train_debug(
-	void		*p_dm_void,
-	char		input[][16],
-	u32		*_used,
-	char		*output,
-	u32		*_out_len,
-	u32		input_num
-)
+void phydm_pow_train_debug(
+	void *dm_void,
+	char input[][16],
+	u32 *_used,
+	char *output,
+	u32 *_out_len)
 {
-	struct PHY_DM_STRUCT	*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	struct phydm_pow_train_stuc	*p_pow_train_t = &(p_dm->pow_train_table);
-	char		help[] = "-h";
-	u32		var1[10] = {0};
-	u32		used = *_used;
-	u32		out_len = *_out_len;
-	u32		i;
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct phydm_pow_train_stuc *pt_t = &dm->pow_train_table;
+	char help[] = "-h";
+	u32 var1[10] = {0};
+	u32 used = *_used;
+	u32 out_len = *_out_len;
+	u32 i;
 
 	if ((strcmp(input[1], help) == 0)) {
-		PHYDM_SNPRINTF((output + used, out_len - used, "0: Dynamic state\n"));
-		PHYDM_SNPRINTF((output + used, out_len - used, "1: Enable PT\n"));
-		PHYDM_SNPRINTF((output + used, out_len - used, "2: Disable PT\n"));
-		
+		PDM_SNPF(out_len, used, output + used, out_len - used,
+			 "{0: Auto PT, 1:enable, 2: disable}\n");
 	} else {
-
 		for (i = 0; i < 10; i++) {
-			if (input[i + 1]) {
+			if (input[i + 1])
 				PHYDM_SSCANF(input[i + 1], DCMD_HEX, &var1[i]);
-			}
 		}
 
-		if (var1[0] == 0) {
-			p_pow_train_t->force_power_training_state = DYNAMIC_POW_TRAIN;
-			PHYDM_SNPRINTF((output + used, out_len - used, "Dynamic state\n"));
-		} else if (var1[0] == 1) {
-			p_pow_train_t->force_power_training_state = ENABLE_POW_TRAIN;
-			PHYDM_SNPRINTF((output + used, out_len - used, "Enable PT\n"));
-		} else if (var1[0] == 2) {
-			p_pow_train_t->force_power_training_state = DISABLE_POW_TRAIN;
-			PHYDM_SNPRINTF((output + used, out_len - used, "Disable PT\n"));
-		} else {
-			PHYDM_SNPRINTF((output + used, out_len - used, "Set Error\n"));
-		}		
+		if (var1[0] == 0)
+			pt_t->pt_state = DYNAMIC_POW_TRAIN;
+		else if (var1[0] == 1)
+			pt_t->pt_state = ENABLE_POW_TRAIN;
+		else if (var1[0] == 2)
+			pt_t->pt_state = DISABLE_POW_TRAIN;
+
+		PDM_SNPF(out_len, used, output + used, out_len - used,
+			 "PT state = %d\n", pt_t->pt_state);
 	}
 
 	*_used = used;
 	*_out_len = out_len;
 }
 
-
 #endif
-
-
-
diff --git a/rtl8723DS/hal/phydm/phydm_pow_train.h b/rtl8723DS/hal/phydm/phydm_pow_train.h
index 8307890..f966607 100755..100644
--- a/rtl8723DS/hal/phydm/phydm_pow_train.h
+++ b/rtl8723DS/hal/phydm/phydm_pow_train.h
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2007 - 2017 Realtek Corporation.
+ * Copyright(c) 2007 - 2017  Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -8,41 +8,51 @@
  *
  * This program is distributed in the hope that it will be useful, but WITHOUT
  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  * more details.
  *
+ * The full GNU General Public License is included in this distribution in the
+ * file called LICENSE.
+ *
+ * Contact Information:
+ * wlanfae <wlanfae@realtek.com>
+ * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
+ * Hsinchu 300, Taiwan.
+ *
+ * Larry Finger <Larry.Finger@lwfinger.net>
+ *
  *****************************************************************************/
 
+#ifndef __PHYDM_POW_TRAIN_H__
+#define __PHYDM_POW_TRAIN_H__
 
-#ifndef	__PHYDM_POW_TRAIN_H__
-#define    __PHYDM_POW_TRAIN_H__
+#define POW_TRAIN_VERSION "1.0" /* @2017.07.0141  Dino, Add phydm_pow_train.h*/
 
-#define POW_TRAIN_VERSION	"1.0"		/* 2017.07.0141  Dino, Add phydm_pow_train.h*/
-
-
-/* 1 ============================================================
+/****************************************************************
+ * 1 ============================================================
  * 1  Definition
- * 1 ============================================================ */
-
+ * 1 ============================================================
+ ***************************************************************/
 
 #ifdef PHYDM_POWER_TRAINING_SUPPORT
-/* 1 ============================================================
+/****************************************************************
+ * 1 ============================================================
  * 1  structure
- * 1 ============================================================ */
-
+ * 1 ============================================================
+ ***************************************************************/
 
 struct phydm_pow_train_stuc {
-
-	u8		force_power_training_state;
-	u32		pow_train_score;
+	u8 pt_state;
+	u32 pow_train_score;
 };
 
-/* 1 ============================================================
+/****************************************************************
+ * 1 ============================================================
  * 1  enumeration
- * 1 ============================================================ */
-
+ * 1 ============================================================
+ ***************************************************************/
 
-enum pow_train_state_e {
+enum pow_train_state {
 	DYNAMIC_POW_TRAIN = 0,
 	ENABLE_POW_TRAIN = 1,
 	DISABLE_POW_TRAIN = 2
@@ -54,24 +64,21 @@ enum power_training_score {
 	ENABLE_PT_SCORE = 2
 };
 
-/* 1 ============================================================
+/****************************************************************
+ * 1 ============================================================
  * 1  function prototype
- * 1 ============================================================ */
-
-void
-phydm_update_power_training_state(
-	void		*p_dm_void
-);
-
-void
-phydm_pow_train_debug(
-	void		*p_dm_void,
-	char		input[][16],
-	u32		*_used,
-	char		*output,
-	u32		*_out_len,
-	u32		input_num
-);
+ * 1 ============================================================
+ ***************************************************************/
+
+void phydm_update_power_training_state(
+	void *dm_void);
+
+void phydm_pow_train_debug(
+	void *dm_void,
+	char input[][16],
+	u32 *_used,
+	char *output,
+	u32 *_out_len);
 
 #endif
 #endif
diff --git a/rtl8723DS/hal/phydm/phydm_pre_define.h b/rtl8723DS/hal/phydm/phydm_pre_define.h
index 17e2285..d8d7313 100755..100644
--- a/rtl8723DS/hal/phydm/phydm_pre_define.h
+++ b/rtl8723DS/hal/phydm/phydm_pre_define.h
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2007 - 2017 Realtek Corporation.
+ * Copyright(c) 2007 - 2017  Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -8,32 +8,43 @@
  *
  * This program is distributed in the hope that it will be useful, but WITHOUT
  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  * more details.
  *
+ * The full GNU General Public License is included in this distribution in the
+ * file called LICENSE.
+ *
+ * Contact Information:
+ * wlanfae <wlanfae@realtek.com>
+ * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
+ * Hsinchu 300, Taiwan.
+ *
+ * Larry Finger <Larry.Finger@lwfinger.net>
+ *
  *****************************************************************************/
 
+#ifndef __PHYDMPREDEFINE_H__
+#define __PHYDMPREDEFINE_H__
 
-#ifndef	__PHYDMPREDEFINE_H__
-#define    __PHYDMPREDEFINE_H__
-
-/* 1 ============================================================
+/****************************************************************
+ * 1 ============================================================
  * 1  Definition
- * 1 ============================================================ */
+ * 1 ============================================================
+ ***************************************************************/
 
-#define PHYDM_CODE_BASE		"PHYDM_V021"
-#define PHYDM_RELEASE_DATE		"20170801"
+#define PHYDM_CODE_BASE			"PHYDM_V033"
+#define PHYDM_RELEASE_DATE		"20180906.0"
 
 /*PHYDM API status*/
-#define	PHYDM_SET_FAIL		0
-#define	PHYDM_SET_SUCCESS	1
-#define	PHYDM_SET_NO_NEED	3
+#define	PHYDM_SET_FAIL			0
+#define	PHYDM_SET_SUCCESS		1
+#define	PHYDM_SET_NO_NEED		3
 
 /*PHYDM Set/Revert*/
-#define	PHYDM_SET				1
+#define	PHYDM_SET			1
 #define	PHYDM_REVERT			2
 
-/* Max path of IC */
+/* @Max path of IC */
 /*N-IC*/
 #define MAX_PATH_NUM_8188E		1
 #define MAX_PATH_NUM_8188F		1
@@ -42,41 +53,61 @@
 #define MAX_PATH_NUM_8723D		1
 #define MAX_PATH_NUM_8703B		1
 #define MAX_PATH_NUM_8192E		2
+#define MAX_PATH_NUM_8192F		2
 #define MAX_PATH_NUM_8197F		2
 #define MAX_PATH_NUM_8198F		4
-/*AC-IC*/
+#define MAX_PATH_NUM_8197G		2
+#define MAX_PATH_NUM_8721D		1
+/*@AC-IC*/
 #define MAX_PATH_NUM_8821A		1
+#define MAX_PATH_NUM_8881A		1
 #define MAX_PATH_NUM_8821C		1
+#define MAX_PATH_NUM_8195B		1
 #define MAX_PATH_NUM_8812A		2
 #define MAX_PATH_NUM_8822B		2
+#define MAX_PATH_NUM_8822C		2
 #define MAX_PATH_NUM_8814A		4
 #define MAX_PATH_NUM_8814B		4
+#define MAX_PATH_NUM_8814C		4
+#define MAX_PATH_NUM_8195B		1
+#define MAX_PATH_NUM_8812F		2
 
-/* Max RF path */
-#define ODM_RF_PATH_MAX 2
-#define ODM_RF_PATH_MAX_JAGUAR 4
+/* @Max RF path */
+#define PHYDM_MAX_RF_PATH_N		2	/*@For old N-series IC*/
 #define PHYDM_MAX_RF_PATH		4
 
 /* number of entry */
 #if (DM_ODM_SUPPORT_TYPE & (ODM_CE))
 	#ifdef DM_ODM_CE_MAC80211
-		/* defined in wifi.h (32+1) */
+		/* @defined in wifi.h (32+1) */
 	#else
-		#define	ASSOCIATE_ENTRY_NUM					MACID_NUM_SW_LIMIT  /* Max size of asoc_entry[].*/
+		#define	ASSOCIATE_ENTRY_NUM	MACID_NUM_SW_LIMIT  /* @Max size of asoc_entry[].*/
 	#endif
-	#define	ODM_ASSOCIATE_ENTRY_NUM				ASSOCIATE_ENTRY_NUM
+	#define	ODM_ASSOCIATE_ENTRY_NUM	ASSOCIATE_ENTRY_NUM
 #elif(DM_ODM_SUPPORT_TYPE & (ODM_AP))
-	#define ASSOCIATE_ENTRY_NUM					NUM_STAT
-	#define	ODM_ASSOCIATE_ENTRY_NUM				(ASSOCIATE_ENTRY_NUM+1)
+	#define ASSOCIATE_ENTRY_NUM	NUM_STAT
+	#define	ODM_ASSOCIATE_ENTRY_NUM	(ASSOCIATE_ENTRY_NUM + 1)
+#elif(DM_ODM_SUPPORT_TYPE & (ODM_IOT))
+	#ifdef CONFIG_CONCURRENT_MODE
+		#define ASSOCIATE_ENTRY_NUM	NUM_STA + 2 /*@2 is for station mod*/
+	#else
+		#define ASSOCIATE_ENTRY_NUM	NUM_STA /*@8 is for max size of asoc_entry[].*/
+	#endif
+	#define	ODM_ASSOCIATE_ENTRY_NUM	ASSOCIATE_ENTRY_NUM
 #else
-	#define ODM_ASSOCIATE_ENTRY_NUM				((ASSOCIATE_ENTRY_NUM*3)+1)
+	#define ODM_ASSOCIATE_ENTRY_NUM	(((ASSOCIATE_ENTRY_NUM + 1) * 3) + 1)
 #endif
 
-#if (DM_ODM_SUPPORT_TYPE == ODM_CE) && defined(DM_ODM_CE_MAC80211)
-	#define RX_SMOOTH_FACTOR	20
-#endif
+/* @-----MGN rate--------------------------------- */
 
-/* -----MGN rate--------------------------------- */
+enum PDM_RATE_TYPE {
+	PDM_1SS			= 1,	/*VHT/HT 1SS*/
+	PDM_2SS			= 2,	/*VHT/HT 2SS*/
+	PDM_3SS			= 3,	/*VHT/HT 3SS*/
+	PDM_4SS			= 4,	/*VHT/HT 4SS*/
+	PDM_CCK			= 11,	/*@B*/
+	PDM_OFDM		= 12	/*@G*/
+};
 
 enum ODM_MGN_RATE {
 	ODM_MGN_1M		= 0x02,
@@ -177,131 +208,123 @@ enum ODM_MGN_RATE {
 #define	ODM_MGN_MCS7_SG		0xc7
 #define	ODM_MGN_MCS8_SG		0xc8
 #define	ODM_MGN_MCS9_SG		0xc9
-#define	ODM_MGN_MCS10_SG		0xca
-#define	ODM_MGN_MCS11_SG		0xcb
-#define	ODM_MGN_MCS12_SG		0xcc
-#define	ODM_MGN_MCS13_SG		0xcd
-#define	ODM_MGN_MCS14_SG		0xce
-#define	ODM_MGN_MCS15_SG		0xcf
-
-/* -----DESC rate--------------------------------- */
+#define	ODM_MGN_MCS10_SG	0xca
+#define	ODM_MGN_MCS11_SG	0xcb
+#define	ODM_MGN_MCS12_SG	0xcc
+#define	ODM_MGN_MCS13_SG	0xcd
+#define	ODM_MGN_MCS14_SG	0xce
+#define	ODM_MGN_MCS15_SG	0xcf
 
-#define ODM_RATEMCS15_SG		0x1c
-#define ODM_RATEMCS32			0x20
+/* @-----DESC rate--------------------------------- */
 
+#define ODM_RATEMCS15_SG	0x1c
+#define ODM_RATEMCS32		0x20
 
 enum phydm_ctrl_info_rate {
-	ODM_RATE1M				= 0x00,
-	ODM_RATE2M				= 0x01,
-	ODM_RATE5_5M			= 0x02,
-	ODM_RATE11M			= 0x03,
+	ODM_RATE1M		= 0x00,
+	ODM_RATE2M		= 0x01,
+	ODM_RATE5_5M		= 0x02,
+	ODM_RATE11M		= 0x03,
 /* OFDM Rates, TxHT = 0 */
-	ODM_RATE6M				= 0x04,
-	ODM_RATE9M				= 0x05,
-	ODM_RATE12M			= 0x06,
-	ODM_RATE18M			= 0x07,
-	ODM_RATE24M			= 0x08,
-	ODM_RATE36M			= 0x09,
-	ODM_RATE48M			= 0x0A,
-	ODM_RATE54M			= 0x0B,
-/* MCS Rates, TxHT = 1 */
-	ODM_RATEMCS0			= 0x0C,
-	ODM_RATEMCS1			= 0x0D,
-	ODM_RATEMCS2			= 0x0E,
-	ODM_RATEMCS3			= 0x0F,
-	ODM_RATEMCS4			= 0x10,
-	ODM_RATEMCS5			= 0x11,
-	ODM_RATEMCS6			= 0x12,
-	ODM_RATEMCS7			= 0x13,
-	ODM_RATEMCS8			= 0x14,
-	ODM_RATEMCS9			= 0x15,
-	ODM_RATEMCS10			= 0x16,
-	ODM_RATEMCS11			= 0x17,
-	ODM_RATEMCS12			= 0x18,
-	ODM_RATEMCS13			= 0x19,
-	ODM_RATEMCS14			= 0x1A,
-	ODM_RATEMCS15			= 0x1B,
-	ODM_RATEMCS16			= 0x1C,
-	ODM_RATEMCS17			= 0x1D,
-	ODM_RATEMCS18			= 0x1E,
-	ODM_RATEMCS19			= 0x1F,
-	ODM_RATEMCS20			= 0x20,
-	ODM_RATEMCS21			= 0x21,
-	ODM_RATEMCS22			= 0x22,
-	ODM_RATEMCS23			= 0x23,
-	ODM_RATEMCS24			= 0x24,
-	ODM_RATEMCS25			= 0x25,
-	ODM_RATEMCS26			= 0x26,
-	ODM_RATEMCS27			= 0x27,
-	ODM_RATEMCS28			= 0x28,
-	ODM_RATEMCS29			= 0x29,
-	ODM_RATEMCS30			= 0x2A,
-	ODM_RATEMCS31			= 0x2B,
-	ODM_RATEVHTSS1MCS0		= 0x2C,
-	ODM_RATEVHTSS1MCS1		= 0x2D,
-	ODM_RATEVHTSS1MCS2		= 0x2E,
-	ODM_RATEVHTSS1MCS3		= 0x2F,
-	ODM_RATEVHTSS1MCS4		= 0x30,
-	ODM_RATEVHTSS1MCS5		= 0x31,
-	ODM_RATEVHTSS1MCS6		= 0x32,
-	ODM_RATEVHTSS1MCS7		= 0x33,
-	ODM_RATEVHTSS1MCS8		= 0x34,
-	ODM_RATEVHTSS1MCS9		= 0x35,
-	ODM_RATEVHTSS2MCS0		= 0x36,
-	ODM_RATEVHTSS2MCS1		= 0x37,
-	ODM_RATEVHTSS2MCS2		= 0x38,
-	ODM_RATEVHTSS2MCS3		= 0x39,
-	ODM_RATEVHTSS2MCS4		= 0x3A,
-	ODM_RATEVHTSS2MCS5		= 0x3B,
-	ODM_RATEVHTSS2MCS6		= 0x3C,
-	ODM_RATEVHTSS2MCS7		= 0x3D,
-	ODM_RATEVHTSS2MCS8		= 0x3E,
-	ODM_RATEVHTSS2MCS9		= 0x3F,
-	ODM_RATEVHTSS3MCS0		= 0x40,
-	ODM_RATEVHTSS3MCS1		= 0x41,
-	ODM_RATEVHTSS3MCS2		= 0x42,
-	ODM_RATEVHTSS3MCS3		= 0x43,
-	ODM_RATEVHTSS3MCS4		= 0x44,
-	ODM_RATEVHTSS3MCS5		= 0x45,
-	ODM_RATEVHTSS3MCS6		= 0x46,
-	ODM_RATEVHTSS3MCS7		= 0x47,
-	ODM_RATEVHTSS3MCS8		= 0x48,
-	ODM_RATEVHTSS3MCS9		= 0x49,
-	ODM_RATEVHTSS4MCS0		= 0x4A,
-	ODM_RATEVHTSS4MCS1		= 0x4B,
-	ODM_RATEVHTSS4MCS2		= 0x4C,
-	ODM_RATEVHTSS4MCS3		= 0x4D,
-	ODM_RATEVHTSS4MCS4		= 0x4E,
-	ODM_RATEVHTSS4MCS5		= 0x4F,
-	ODM_RATEVHTSS4MCS6		= 0x50,
-	ODM_RATEVHTSS4MCS7		= 0x51,
-	ODM_RATEVHTSS4MCS8		= 0x52,
-	ODM_RATEVHTSS4MCS9		= 0x53,
+	ODM_RATE6M		= 0x04,
+	ODM_RATE9M		= 0x05,
+	ODM_RATE12M		= 0x06,
+	ODM_RATE18M		= 0x07,
+	ODM_RATE24M		= 0x08,
+	ODM_RATE36M		= 0x09,
+	ODM_RATE48M		= 0x0A,
+	ODM_RATE54M		= 0x0B,
+/* @MCS Rates, TxHT = 1 */
+	ODM_RATEMCS0		= 0x0C,
+	ODM_RATEMCS1		= 0x0D,
+	ODM_RATEMCS2		= 0x0E,
+	ODM_RATEMCS3		= 0x0F,
+	ODM_RATEMCS4		= 0x10,
+	ODM_RATEMCS5		= 0x11,
+	ODM_RATEMCS6		= 0x12,
+	ODM_RATEMCS7		= 0x13,
+	ODM_RATEMCS8		= 0x14,
+	ODM_RATEMCS9		= 0x15,
+	ODM_RATEMCS10		= 0x16,
+	ODM_RATEMCS11		= 0x17,
+	ODM_RATEMCS12		= 0x18,
+	ODM_RATEMCS13		= 0x19,
+	ODM_RATEMCS14		= 0x1A,
+	ODM_RATEMCS15		= 0x1B,
+	ODM_RATEMCS16		= 0x1C,
+	ODM_RATEMCS17		= 0x1D,
+	ODM_RATEMCS18		= 0x1E,
+	ODM_RATEMCS19		= 0x1F,
+	ODM_RATEMCS20		= 0x20,
+	ODM_RATEMCS21		= 0x21,
+	ODM_RATEMCS22		= 0x22,
+	ODM_RATEMCS23		= 0x23,
+	ODM_RATEMCS24		= 0x24,
+	ODM_RATEMCS25		= 0x25,
+	ODM_RATEMCS26		= 0x26,
+	ODM_RATEMCS27		= 0x27,
+	ODM_RATEMCS28		= 0x28,
+	ODM_RATEMCS29		= 0x29,
+	ODM_RATEMCS30		= 0x2A,
+	ODM_RATEMCS31		= 0x2B,
+	ODM_RATEVHTSS1MCS0	= 0x2C,
+	ODM_RATEVHTSS1MCS1	= 0x2D,
+	ODM_RATEVHTSS1MCS2	= 0x2E,
+	ODM_RATEVHTSS1MCS3	= 0x2F,
+	ODM_RATEVHTSS1MCS4	= 0x30,
+	ODM_RATEVHTSS1MCS5	= 0x31,
+	ODM_RATEVHTSS1MCS6	= 0x32,
+	ODM_RATEVHTSS1MCS7	= 0x33,
+	ODM_RATEVHTSS1MCS8	= 0x34,
+	ODM_RATEVHTSS1MCS9	= 0x35,
+	ODM_RATEVHTSS2MCS0	= 0x36,
+	ODM_RATEVHTSS2MCS1	= 0x37,
+	ODM_RATEVHTSS2MCS2	= 0x38,
+	ODM_RATEVHTSS2MCS3	= 0x39,
+	ODM_RATEVHTSS2MCS4	= 0x3A,
+	ODM_RATEVHTSS2MCS5	= 0x3B,
+	ODM_RATEVHTSS2MCS6	= 0x3C,
+	ODM_RATEVHTSS2MCS7	= 0x3D,
+	ODM_RATEVHTSS2MCS8	= 0x3E,
+	ODM_RATEVHTSS2MCS9	= 0x3F,
+	ODM_RATEVHTSS3MCS0	= 0x40,
+	ODM_RATEVHTSS3MCS1	= 0x41,
+	ODM_RATEVHTSS3MCS2	= 0x42,
+	ODM_RATEVHTSS3MCS3	= 0x43,
+	ODM_RATEVHTSS3MCS4	= 0x44,
+	ODM_RATEVHTSS3MCS5	= 0x45,
+	ODM_RATEVHTSS3MCS6	= 0x46,
+	ODM_RATEVHTSS3MCS7	= 0x47,
+	ODM_RATEVHTSS3MCS8	= 0x48,
+	ODM_RATEVHTSS3MCS9	= 0x49,
+	ODM_RATEVHTSS4MCS0	= 0x4A,
+	ODM_RATEVHTSS4MCS1	= 0x4B,
+	ODM_RATEVHTSS4MCS2	= 0x4C,
+	ODM_RATEVHTSS4MCS3	= 0x4D,
+	ODM_RATEVHTSS4MCS4	= 0x4E,
+	ODM_RATEVHTSS4MCS5	= 0x4F,
+	ODM_RATEVHTSS4MCS6	= 0x50,
+	ODM_RATEVHTSS4MCS7	= 0x51,
+	ODM_RATEVHTSS4MCS8	= 0x52,
+	ODM_RATEVHTSS4MCS9	= 0x53,
 };
 
-#define	CCK_RATE_NUM		4
-#define	OFDM_RATE_NUM	8
-
-#define	LEGACY_RATE_NUM	12
-
-#define	HT_RATE_NUM		32
-#define	VHT_RATE_NUM		40
-
 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
-	#define ODM_NUM_RATE_IDX (ODM_RATEVHTSS4MCS9+1)
+	#define ODM_NUM_RATE_IDX (ODM_RATEVHTSS4MCS9 + 1)
 #else
-	#if (RTL8192E_SUPPORT == 1) || (RTL8197F_SUPPORT == 1)
-		#define ODM_NUM_RATE_IDX (ODM_RATEMCS15+1)
-	#elif (RTL8723B_SUPPORT == 1) || (RTL8188E_SUPPORT == 1) || (RTL8188F_SUPPORT == 1)
-		#define ODM_NUM_RATE_IDX (ODM_RATEMCS7+1)
-	#elif (RTL8821A_SUPPORT == 1) || (RTL8881A_SUPPORT == 1)
-		#define ODM_NUM_RATE_IDX (ODM_RATEVHTSS1MCS9+1)
-	#elif (RTL8812A_SUPPORT == 1)
-		#define ODM_NUM_RATE_IDX (ODM_RATEVHTSS2MCS9+1)
-	#elif (RTL8814A_SUPPORT == 1)
-		#define ODM_NUM_RATE_IDX (ODM_RATEVHTSS3MCS9+1)
+	#if (RTL8192E_SUPPORT || RTL8197F_SUPPORT || RTL8192F_SUPPORT)
+		#define ODM_NUM_RATE_IDX (ODM_RATEMCS15 + 1)
+	#elif (RTL8723B_SUPPORT || RTL8188E_SUPPORT || \
+	       RTL8188F_SUPPORT || RTL8721D_SUPPORT)
+		#define ODM_NUM_RATE_IDX (ODM_RATEMCS7 + 1)
+	#elif (RTL8821A_SUPPORT || RTL8881A_SUPPORT)
+		#define ODM_NUM_RATE_IDX (ODM_RATEVHTSS1MCS9 + 1)
+	#elif (RTL8812A_SUPPORT)
+		#define ODM_NUM_RATE_IDX (ODM_RATEVHTSS2MCS9 + 1)
+	#elif (RTL8814A_SUPPORT)
+		#define ODM_NUM_RATE_IDX (ODM_RATEVHTSS3MCS9 + 1)
 	#else
-		#define ODM_NUM_RATE_IDX (ODM_RATEVHTSS4MCS9+1)
+		#define ODM_NUM_RATE_IDX (ODM_RATEVHTSS4MCS9 + 1)
 	#endif
 #endif
 
@@ -309,21 +332,23 @@ enum phydm_ctrl_info_rate {
 	#define CONFIG_SFW_SUPPORTED
 #endif
 
-/* 1 ============================================================
+/****************************************************************
+ * 1 ============================================================
  * 1  enumeration
- * 1 ============================================================ */
-
+ * 1 ============================================================
+ ***************************************************************/
 
 /*	ODM_CMNINFO_INTERFACE */
-enum odm_interface_e {
+enum odm_interface {
 	ODM_ITRF_PCIE	=	0x1,
 	ODM_ITRF_USB	=	0x2,
 	ODM_ITRF_SDIO	=	0x4,
 	ODM_ITRF_ALL	=	0x7,
 };
 
+/*@========[Run time IC flag] ===================================*/
 
-enum phydm_ic_e {
+enum phydm_ic {
 	ODM_RTL8188E	=	BIT(0),
 	ODM_RTL8812	=	BIT(1),
 	ODM_RTL8821	=	BIT(2),
@@ -342,114 +367,173 @@ enum phydm_ic_e {
 	ODM_RTL8198F	=	BIT(15),
 	ODM_RTL8710B	=	BIT(16),
 	ODM_RTL8192F	=	BIT(17),
-	ODM_RTL8822C	=	BIT(18)
+	ODM_RTL8822C	=	BIT(18),
+	ODM_RTL8195B	=	BIT(19),
+	ODM_RTL8812F	=	BIT(20),
+	ODM_RTL8197G	=	BIT(21),
+	ODM_RTL8721D	=	BIT(22)
 };
 
-/*========[Run time IC flag] ===============================================================================]*/
-
-#define ODM_IC_N_1SS	(ODM_RTL8188E | ODM_RTL8188F | ODM_RTL8723B | ODM_RTL8703B | ODM_RTL8723D | ODM_RTL8195A | ODM_RTL8710B)
-#define ODM_IC_N_2SS	(ODM_RTL8192E | ODM_RTL8197F | ODM_RTL8192F)
-#define ODM_IC_N_3SS	0
-#define ODM_IC_N_4SS	(ODM_RTL8198F)
-
-#define ODM_IC_AC_1SS	(ODM_RTL8881A | ODM_RTL8821 | ODM_RTL8821C)
-#define ODM_IC_AC_2SS	(ODM_RTL8812 | ODM_RTL8822B | ODM_RTL8822C)
-#define ODM_IC_AC_3SS	0
-#define ODM_IC_AC_4SS	(ODM_RTL8814A | ODM_RTL8814B)
-
-/*====the following macro DO NOT need to update when add a new IC======= */
-#define ODM_IC_1SS	(ODM_IC_N_1SS | ODM_IC_AC_1SS)
-#define ODM_IC_2SS	(ODM_IC_N_2SS | ODM_IC_AC_2SS)
-#define ODM_IC_3SS	(ODM_IC_N_3SS | ODM_IC_AC_3SS)
-#define ODM_IC_4SS	(ODM_IC_N_4SS | ODM_IC_AC_4SS)
-
-#define PHYDM_IC_ABOVE_1SS	(ODM_IC_1SS | ODM_IC_2SS | ODM_IC_3SS | ODM_IC_4SS)
+#define ODM_IC_N_1SS		(ODM_RTL8188E | ODM_RTL8188F | ODM_RTL8723B |\
+				 ODM_RTL8703B | ODM_RTL8723D | ODM_RTL8195A |\
+				 ODM_RTL8710B | ODM_RTL8721D)
+#define ODM_IC_N_2SS		(ODM_RTL8192E | ODM_RTL8197F | ODM_RTL8192F)
+#define ODM_IC_N_3SS		0
+#define ODM_IC_N_4SS		0
+
+#define ODM_IC_AC_1SS		(ODM_RTL8881A | ODM_RTL8821 | ODM_RTL8821C |\
+				 ODM_RTL8195B)
+#define ODM_IC_AC_2SS		(ODM_RTL8812 | ODM_RTL8822B)
+#define ODM_IC_AC_3SS		0
+#define ODM_IC_AC_4SS		(ODM_RTL8814A)
+
+#define ODM_IC_JGR3_1SS		0
+#define ODM_IC_JGR3_2SS		(ODM_RTL8822C | ODM_RTL8812F | ODM_RTL8197G)
+#define ODM_IC_JGR3_3SS		0
+#define ODM_IC_JGR3_4SS		(ODM_RTL8198F | ODM_RTL8814B)
+
+/*@====the following macro DO NOT need to update when adding a new IC======= */
+#define ODM_IC_1SS		(ODM_IC_N_1SS | ODM_IC_AC_1SS | ODM_IC_JGR3_1SS)
+#define ODM_IC_2SS		(ODM_IC_N_2SS | ODM_IC_AC_2SS | ODM_IC_JGR3_2SS)
+#define ODM_IC_3SS		(ODM_IC_N_3SS | ODM_IC_AC_3SS | ODM_IC_JGR3_3SS)
+#define ODM_IC_4SS		(ODM_IC_N_4SS | ODM_IC_AC_4SS | ODM_IC_JGR3_4SS)
+
+#define PHYDM_IC_ABOVE_1SS	(ODM_IC_1SS | ODM_IC_2SS | ODM_IC_3SS |\
+				 ODM_IC_4SS)
 #define PHYDM_IC_ABOVE_2SS	(ODM_IC_2SS | ODM_IC_3SS | ODM_IC_4SS)
 #define PHYDM_IC_ABOVE_3SS	(ODM_IC_3SS | ODM_IC_4SS)
 #define PHYDM_IC_ABOVE_4SS	ODM_IC_4SS
 
-#define ODM_IC_11N_SERIES		(ODM_IC_N_1SS | ODM_IC_N_2SS | ODM_IC_N_3SS | ODM_IC_N_4SS)
-#define ODM_IC_11AC_SERIES		(ODM_IC_AC_1SS | ODM_IC_AC_2SS | ODM_IC_AC_3SS | ODM_IC_AC_4SS)
-/*====================================================*/
-
-#define ODM_IC_11AC_1_SERIES		(ODM_RTL8812 | ODM_RTL8821 | ODM_RTL8881A)
-#define ODM_IC_11AC_2_SERIES		(ODM_RTL8814A | ODM_RTL8822B | ODM_RTL8821C)
-
-#define ODM_IC_TXBF_SUPPORT		(ODM_RTL8192E | ODM_RTL8812 | ODM_RTL8821 | ODM_RTL8814A | ODM_RTL8881A | ODM_RTL8822B | ODM_RTL8197F | ODM_RTL8821C)
-
-#define ODM_IC_11N_GAIN_IDX_EDCCA		(ODM_RTL8195A | ODM_RTL8703B | ODM_RTL8188F | ODM_RTL8723D | ODM_RTL8197F | ODM_RTL8710B)
-#define ODM_IC_11AC_GAIN_IDX_EDCCA		(ODM_RTL8814A | ODM_RTL8822B | ODM_RTL8821C)
-#define ODM_IC_GAIN_IDX_EDCCA				(ODM_IC_11N_GAIN_IDX_EDCCA | ODM_IC_11AC_GAIN_IDX_EDCCA)
-
-#define ODM_IC_PHY_STATUE_NEW_TYPE		(ODM_RTL8197F | ODM_RTL8822B | ODM_RTL8723D | ODM_RTL8821C | ODM_RTL8710B)
-
-#define PHYDM_IC_8051_SERIES		(ODM_RTL8881A | ODM_RTL8812 | ODM_RTL8821 | ODM_RTL8192E | ODM_RTL8723B | ODM_RTL8703B | ODM_RTL8188F)
-#define PHYDM_IC_3081_SERIES		(ODM_RTL8814A | ODM_RTL8822B | ODM_RTL8197F | ODM_RTL8821C)
-
-#define PHYDM_IC_SUPPORT_LA_MODE	(ODM_RTL8814A | ODM_RTL8822B | ODM_RTL8197F | ODM_RTL8821C)
-#define PHYDM_IC_SUPPORT_MU_BFEE	(ODM_RTL8822B | ODM_RTL8821C | ODM_RTL8814B)
-#define PHYDM_IC_SUPPORT_MU_BFER	(ODM_RTL8822B | ODM_RTL8814B)
-
+#define ODM_IC_11N_SERIES	(ODM_IC_N_1SS | ODM_IC_N_2SS | ODM_IC_N_3SS |\
+				 ODM_IC_N_4SS)
+#define ODM_IC_11AC_SERIES	(ODM_IC_AC_1SS | ODM_IC_AC_2SS |\
+				 ODM_IC_AC_3SS | ODM_IC_AC_4SS)
+#define ODM_IC_JGR3_SERIES	(ODM_IC_JGR3_1SS | ODM_IC_JGR3_2SS |\
+				 ODM_IC_JGR3_3SS | ODM_IC_JGR3_4SS)
+/*@====================================================*/
+
+#define ODM_IC_11AC_1_SERIES	(ODM_RTL8812 | ODM_RTL8821 | ODM_RTL8881A)
+#define ODM_IC_11AC_2_SERIES	(ODM_RTL8814A | ODM_RTL8822B | ODM_RTL8821C |\
+				 ODM_RTL8195B)
+
+/*@[Phy status type]*/
+#define PHYSTS_2ND_TYPE_IC	(ODM_RTL8197F | ODM_RTL8822B | ODM_RTL8723D |\
+				 ODM_RTL8821C | ODM_RTL8710B | ODM_RTL8195B |\
+				 ODM_RTL8192F | ODM_RTL8721D)
+#define PHYSTS_3RD_TYPE_IC	(ODM_RTL8198F | ODM_RTL8814B | ODM_RTL8822C |\
+				 ODM_RTL8812F | ODM_RTL8197G)
+/*@[FW Type]*/
+#define PHYDM_IC_8051_SERIES	(ODM_RTL8881A | ODM_RTL8812 | ODM_RTL8821 |\
+				 ODM_RTL8192E | ODM_RTL8723B | ODM_RTL8703B |\
+				 ODM_RTL8188F | ODM_RTL8192F | ODM_RTL8721D)
+#define PHYDM_IC_3081_SERIES	(ODM_RTL8814A | ODM_RTL8822B | ODM_RTL8197F |\
+				 ODM_RTL8821C | ODM_RTL8195B | ODM_RTL8198F |\
+				 ODM_RTL8822C | ODM_RTL8812F | ODM_RTL8814B |\
+				 ODM_RTL8197G)
+/*@[LA mode]*/
+#define PHYDM_IC_SUPPORT_LA_MODE (ODM_RTL8814A | ODM_RTL8822B | ODM_RTL8197F |\
+				  ODM_RTL8821C | ODM_RTL8195B | ODM_RTL8198F |\
+				  ODM_RTL8192F | ODM_RTL8822C | ODM_RTL8812F |\
+				  ODM_RTL8195B | ODM_RTL8814B | ODM_RTL8197G)
+/*@[BF]*/
+#define ODM_IC_TXBF_SUPPORT	(ODM_RTL8192E | ODM_RTL8812 | ODM_RTL8821 |\
+				 ODM_RTL8814A | ODM_RTL8881A | ODM_RTL8822B |\
+				 ODM_RTL8197F | ODM_RTL8821C | ODM_RTL8195B |\
+				 ODM_RTL8198F | ODM_RTL8822C | ODM_RTL8812F |\
+				 ODM_RTL8814B | ODM_RTL8197G)
+#define PHYDM_IC_SUPPORT_MU_BFEE (ODM_RTL8822B | ODM_RTL8821C | ODM_RTL8814B |\
+				  ODM_RTL8195B | ODM_RTL8198F | ODM_RTL8822C |\
+				  ODM_RTL8812F)
+#define PHYDM_IC_SUPPORT_MU_BFER (ODM_RTL8822B | ODM_RTL8814B | ODM_RTL8198F |\
+				  ODM_RTL8822C | ODM_RTL8812F)
+
+#define PHYDM_IC_SUPPORT_MU (PHYDM_IC_SUPPORT_MU_BFEE |\
+				PHYDM_IC_SUPPORT_MU_BFER)
+/*@[PHYDM API]*/
+#define CMN_API_SUPPORT_IC (ODM_RTL8822B | ODM_RTL8197F | ODM_RTL8192F |\
+			    ODM_RTL8821C | ODM_RTL8195B | ODM_RTL8822C |\
+			    ODM_RTL8198F | ODM_RTL8812F | ODM_RTL8814B |\
+			    ODM_RTL8197G | ODM_RTL8721D)
+
+/*@========[Compile time IC flag] ========================*/
+/*@========[AC-3/AC/N Support] ===========================*/
+
+#if (RTL8814B_SUPPORT || RTL8198F_SUPPORT || RTL8822C_SUPPORT ||\
+	RTL8812F_SUPPORT || RTL8197G_SUPPORT)
+	#define PHYDM_IC_JGR3_SERIES_SUPPORT
+	#if (RTL8814B_SUPPORT || RTL8822C_SUPPORT || RTL8812F_SUPPORT)
+		#define PHYDM_IC_JGR3_80M_SUPPORT
+	#endif
+#endif
 
-/*========[Compile time IC flag] ===============================================================================]*/
-/*========[AC/N Support] ===========================*/
 #if (DM_ODM_SUPPORT_TYPE == ODM_AP)
 
 	#ifdef RTK_AC_SUPPORT
-	#define ODM_IC_11AC_SERIES_SUPPORT		1
+	#define ODM_IC_11AC_SERIES_SUPPORT	1
 	#else
-	#define ODM_IC_11AC_SERIES_SUPPORT		0
+	#define ODM_IC_11AC_SERIES_SUPPORT	0
 	#endif
 
-	#define ODM_IC_11N_SERIES_SUPPORT			1
+	#define ODM_IC_11N_SERIES_SUPPORT	1
 
 #elif (DM_ODM_SUPPORT_TYPE == ODM_WIN)
 
-	#define ODM_IC_11AC_SERIES_SUPPORT		1
-	#define ODM_IC_11N_SERIES_SUPPORT			1
+	#define ODM_IC_11AC_SERIES_SUPPORT	1
+	#define ODM_IC_11N_SERIES_SUPPORT	1
 
 #elif (DM_ODM_SUPPORT_TYPE == ODM_CE) && defined(DM_ODM_CE_MAC80211)
 
+	#define ODM_IC_11AC_SERIES_SUPPORT	1
+	#define ODM_IC_11N_SERIES_SUPPORT	1
+
+#elif (DM_ODM_SUPPORT_TYPE == ODM_CE) && defined(DM_ODM_CE_MAC80211_V2)
+
 	#define ODM_IC_11AC_SERIES_SUPPORT		1
 	#define ODM_IC_11N_SERIES_SUPPORT			1
 
 #else /*ODM_CE*/
 
-	#if ((RTL8188E_SUPPORT == 1) || \
-	(RTL8723B_SUPPORT == 1) || (RTL8192E_SUPPORT == 1) || (RTL8195A_SUPPORT == 1) || (RTL8703B_SUPPORT == 1) || \
-	(RTL8188F_SUPPORT == 1) || (RTL8723D_SUPPORT == 1) || (RTL8197F_SUPPORT == 1) || (RTL8710B_SUPPORT == 1))
-		#define ODM_IC_11N_SERIES_SUPPORT			1
-		#define ODM_IC_11AC_SERIES_SUPPORT		0
+	#if (RTL8188E_SUPPORT || RTL8723B_SUPPORT || RTL8192E_SUPPORT ||\
+	     RTL8195A_SUPPORT || RTL8703B_SUPPORT || RTL8188F_SUPPORT ||\
+	     RTL8723D_SUPPORT || RTL8197F_SUPPORT || RTL8710B_SUPPORT ||\
+	     RTL8192F_SUPPORT || RTL8721D_SUPPORT)
+		#define ODM_IC_11N_SERIES_SUPPORT	1
+		#define ODM_IC_11AC_SERIES_SUPPORT	0
 	#else
-		#define ODM_IC_11N_SERIES_SUPPORT			0
-		#define ODM_IC_11AC_SERIES_SUPPORT		1
+		#define ODM_IC_11N_SERIES_SUPPORT	0
+		#define ODM_IC_11AC_SERIES_SUPPORT	1
 	#endif
 #endif
 
-/*===IC SS Compile Flag, prepare for code size reduction==============*/
-#if ((RTL8188E_SUPPORT == 1) || (RTL8188F_SUPPORT == 1) || (RTL8723B_SUPPORT == 1) || (RTL8703B_SUPPORT == 1) ||\
-	(RTL8723D_SUPPORT == 1) || (RTL8881A_SUPPORT == 1) || (RTL8821A_SUPPORT == 1) || (RTL8821C_SUPPORT == 1) ||\
-	(RTL8195A_SUPPORT == 1) || (RTL8710B_SUPPORT == 1))
-	
+/*@===IC SS Compile Flag, prepare for code size reduction==============*/
+#if (RTL8188E_SUPPORT || RTL8188F_SUPPORT || RTL8723B_SUPPORT ||\
+	RTL8703B_SUPPORT || RTL8723D_SUPPORT || RTL8881A_SUPPORT ||\
+	RTL8821A_SUPPORT || RTL8821C_SUPPORT || RTL8195A_SUPPORT ||\
+	RTL8710B_SUPPORT || RTL8195B_SUPPORT || RTL8721D_SUPPORT)
+
 	#define PHYDM_COMPILE_IC_1SS
 #endif
 
-#if ((RTL8192E_SUPPORT == 1) || (RTL8197F_SUPPORT == 1) || (RTL8812A_SUPPORT == 1) || (RTL8822B_SUPPORT == 1))
+#if (RTL8192E_SUPPORT || RTL8197F_SUPPORT || RTL8812A_SUPPORT ||\
+	RTL8822B_SUPPORT || RTL8192F_SUPPORT || RTL8822C_SUPPORT ||\
+	RTL8812F_SUPPORT || RTL8197G_SUPPORT)
 	#define PHYDM_COMPILE_IC_2SS
 #endif
 
-/*#define PHYDM_COMPILE_IC_3SS*/
+/*@#define PHYDM_COMPILE_IC_3SS*/
 
-#if ((RTL8814B_SUPPORT == 1) || (RTL8814A_SUPPORT == 1))
+#if ((RTL8814B_SUPPORT) || (RTL8814A_SUPPORT) || (RTL8198F_SUPPORT))
 	#define PHYDM_COMPILE_IC_4SS
 #endif
 
-/*==[ABOVE N-SS COMPILE FLAG]=============================*/
-#if (defined(PHYDM_COMPILE_IC_1SS) || defined(PHYDM_COMPILE_IC_2SS) || defined(PHYDM_COMPILE_IC_3SS) || defined(PHYDM_COMPILE_IC_4SS))
+/*@==[ABOVE N-SS COMPILE FLAG]=================================================*/
+#if (defined(PHYDM_COMPILE_IC_1SS) || defined(PHYDM_COMPILE_IC_2SS) ||\
+	defined(PHYDM_COMPILE_IC_3SS) || defined(PHYDM_COMPILE_IC_4SS))
 	#define PHYDM_COMPILE_ABOVE_1SS
 #endif
 
-#if (defined(PHYDM_COMPILE_IC_2SS) || defined(PHYDM_COMPILE_IC_3SS) || defined(PHYDM_COMPILE_IC_4SS))
+#if (defined(PHYDM_COMPILE_IC_2SS) || defined(PHYDM_COMPILE_IC_3SS) ||\
+	defined(PHYDM_COMPILE_IC_4SS))
 	#define PHYDM_COMPILE_ABOVE_2SS
 #endif
 
@@ -461,241 +545,305 @@ enum phydm_ic_e {
 	#define PHYDM_COMPILE_ABOVE_4SS
 #endif
 
-/*========[New Phy-Status Support] =========================================================================]*/
-#if (RTL8824B_SUPPORT == 1)
-	#define ODM_PHY_STATUS_NEW_TYPE_SUPPORT			2
-#elif ((RTL8197F_SUPPORT == 1) || (RTL8723D_SUPPORT == 1) || (RTL8822B_SUPPORT == 1) || (RTL8821C_SUPPORT == 1) || (RTL8710B_SUPPORT == 1) )
+/*@========[New Phy-Status Support] ========================*/
+#if (RTL8197F_SUPPORT || RTL8723D_SUPPORT || RTL8822B_SUPPORT ||\
+	RTL8821C_SUPPORT || RTL8710B_SUPPORT || RTL8195B_SUPPORT ||\
+	RTL8192F_SUPPORT || RTL8721D_SUPPORT)
 	#define ODM_PHY_STATUS_NEW_TYPE_SUPPORT			1
 #else
 	#define ODM_PHY_STATUS_NEW_TYPE_SUPPORT			0
 #endif
 
-/*==================================================================================================]*/
+#if (RTL8198F_SUPPORT) || (RTL8814B_SUPPORT) || (RTL8822C_SUPPORT) ||\
+	(RTL8812F_SUPPORT) || (RTL8197G_SUPPORT)
+	#define PHYSTS_3RD_TYPE_SUPPORT
+#endif
+
+#if (RTL8198F_SUPPORT || RTL8814B_SUPPORT || RTL8822C_SUPPORT ||\
+	RTL8812F_SUPPORT || RTL8197G_SUPPORT)
+	#define BB_RAM_SUPPORT
+#endif
 
-#if ((RTL8822B_SUPPORT == 1) || (RTL8197F_SUPPORT == 1) || (RTL8821C_SUPPORT == 1))
+#if (RTL8821C_SUPPORT || RTL8822B_SUPPORT || RTL8822C_SUPPORT ||\
+	RTL8812F_SUPPORT || RTL8814B_SUPPORT || RTL8195B_SUPPORT ||\
+	RTL8198F_SUPPORT)
+	#define PHYDM_COMPILE_MU
+#endif
+/*@============================================================================*/
+
+#if (RTL8822B_SUPPORT || RTL8197F_SUPPORT || RTL8821C_SUPPORT ||\
+	RTL8192F_SUPPORT || RTL8195B_SUPPORT || RTL8822C_SUPPORT ||\
+	RTL8198F_SUPPORT || RTL8812F_SUPPORT || RTL8814B_SUPPORT ||\
+	RTL8197G_SUPPORT || RTL8721D_SUPPORT)
 #define PHYDM_COMMON_API_SUPPORT
 #endif
 
+
+#define	CCK_RATE_NUM		4
+#define	OFDM_RATE_NUM		8
+
+#define	LEGACY_RATE_NUM		12
+
+#define	HT_RATE_NUM_4SS		32
+#define	VHT_RATE_NUM_4SS	40
+
+#define	HT_RATE_NUM_3SS		24
+#define	VHT_RATE_NUM_3SS	30
+
+#define	HT_RATE_NUM_2SS		16
+#define	VHT_RATE_NUM_2SS	20
+
+#define	HT_RATE_NUM_1SS		8
+#define	VHT_RATE_NUM_1SS	10
+#if (defined(PHYDM_COMPILE_ABOVE_4SS))
+	#define	HT_RATE_NUM	HT_RATE_NUM_4SS
+	#define	VHT_RATE_NUM	VHT_RATE_NUM_4SS
+#elif (defined(PHYDM_COMPILE_ABOVE_3SS))
+	#define	HT_RATE_NUM	HT_RATE_NUM_3SS
+	#define	VHT_RATE_NUM	VHT_RATE_NUM_3SS
+#elif (defined(PHYDM_COMPILE_ABOVE_2SS))
+	#define	HT_RATE_NUM	HT_RATE_NUM_2SS
+	#define	VHT_RATE_NUM	VHT_RATE_NUM_2SS
+#else
+	#define	HT_RATE_NUM	HT_RATE_NUM_1SS
+	#define	VHT_RATE_NUM	VHT_RATE_NUM_1SS
+#endif
+
+#define	LOW_BW_RATE_NUM		VHT_RATE_NUM
+
+enum phydm_ic_ip {
+	PHYDM_IC_N		= 0,
+	PHYDM_IC_AC		= 1,
+	PHYDM_IC_JGR3		= 2
+};
+
+enum phydm_phy_sts_type {
+	PHYDM_PHYSTS_TYPE_1	= 1,
+	PHYDM_PHYSTS_TYPE_2	= 2,
+	PHYDM_PHYSTS_TYPE_3	= 3
+};
+
 /* ODM_CMNINFO_CUT_VER */
-enum odm_cut_version_e {
-	ODM_CUT_A		=	0,
-	ODM_CUT_B		=	1,
-	ODM_CUT_C		=	2,
-	ODM_CUT_D		=	3,
-	ODM_CUT_E		=	4,
-	ODM_CUT_F		=	5,
-	ODM_CUT_G		=	6,
-	ODM_CUT_H		=	7,
-	ODM_CUT_I		=	8,
-	ODM_CUT_J		=	9,
-	ODM_CUT_K		=	10,
-	ODM_CUT_TEST	=	15,
+enum odm_cut_version {
+	ODM_CUT_A		= 0,
+	ODM_CUT_B		= 1,
+	ODM_CUT_C		= 2,
+	ODM_CUT_D		= 3,
+	ODM_CUT_E		= 4,
+	ODM_CUT_F		= 5,
+	ODM_CUT_G		= 6,
+	ODM_CUT_H		= 7,
+	ODM_CUT_I		= 8,
+	ODM_CUT_J		= 9,
+	ODM_CUT_K		= 10,
+	ODM_CUT_TEST		= 15,
 };
 
 /* ODM_CMNINFO_FAB_VER */
-enum odm_fab_e {
-	ODM_TSMC	=	0,
-	ODM_UMC	=	1,
+enum odm_fab {
+	ODM_TSMC		= 0,
+	ODM_UMC			= 1,
 };
 
 /* ODM_CMNINFO_OP_MODE */
-enum odm_operation_mode_e {
+enum odm_operation_mode {
 	ODM_NO_LINK		= BIT(0),
-	ODM_LINK			= BIT(1),
-	ODM_SCAN			= BIT(2),
-	ODM_POWERSAVE	= BIT(3),
+	ODM_LINK		= BIT(1),
+	ODM_SCAN		= BIT(2),
+	ODM_POWERSAVE		= BIT(3),
 	ODM_AP_MODE		= BIT(4),
-	ODM_CLIENT_MODE	= BIT(5),
+	ODM_CLIENT_MODE		= BIT(5),
 	ODM_AD_HOC		= BIT(6),
-	ODM_WIFI_DIRECT	= BIT(7),
+	ODM_WIFI_DIRECT		= BIT(7),
 	ODM_WIFI_DISPLAY	= BIT(8),
 };
 
 /* ODM_CMNINFO_WM_MODE */
 #if (DM_ODM_SUPPORT_TYPE & (ODM_CE))
-enum odm_wireless_mode_e {
-	ODM_WM_UNKNOW	= 0x0,
-	ODM_WM_B			= BIT(0),
-	ODM_WM_G			= BIT(1),
-	ODM_WM_A			= BIT(2),
+enum odm_wireless_mode {
+	ODM_WM_UNKNOW		= 0x0,
+	ODM_WM_B		= BIT(0),
+	ODM_WM_G		= BIT(1),
+	ODM_WM_A		= BIT(2),
 	ODM_WM_N24G		= BIT(3),
 	ODM_WM_N5G		= BIT(4),
 	ODM_WM_AUTO		= BIT(5),
 	ODM_WM_AC		= BIT(6),
 };
 #else
-enum odm_wireless_mode_e {
-	ODM_WM_UNKNOWN	= 0x00,/*0x0*/
-	ODM_WM_A			= BIT(0), /* 0x1*/
-	ODM_WM_B			= BIT(1), /* 0x2*/
-	ODM_WM_G			= BIT(2),/* 0x4*/
-	ODM_WM_AUTO		= BIT(3),/* 0x8*/
-	ODM_WM_N24G		= BIT(4),/* 0x10*/
-	ODM_WM_N5G		= BIT(5),/* 0x20*/
-	ODM_WM_AC_5G		= BIT(6),/* 0x40*/
-	ODM_WM_AC_24G	= BIT(7),/* 0x80*/
-	ODM_WM_AC_ONLY	= BIT(8),/* 0x100*/
-	ODM_WM_MAX		= BIT(11)/* 0x800*/
+enum odm_wireless_mode {
+	ODM_WM_UNKNOWN		= 0x00,/*@0x0*/
+	ODM_WM_A		= BIT(0), /* @0x1*/
+	ODM_WM_B		= BIT(1), /* @0x2*/
+	ODM_WM_G		= BIT(2),/* @0x4*/
+	ODM_WM_AUTO		= BIT(3),/* @0x8*/
+	ODM_WM_N24G		= BIT(4),/* @0x10*/
+	ODM_WM_N5G		= BIT(5),/* @0x20*/
+	ODM_WM_AC_5G		= BIT(6),/* @0x40*/
+	ODM_WM_AC_24G		= BIT(7),/* @0x80*/
+	ODM_WM_AC_ONLY		= BIT(8),/* @0x100*/
+	ODM_WM_MAX		= BIT(11)/* @0x800*/
 
 };
 #endif
 
 /* ODM_CMNINFO_BAND */
-enum odm_band_type_e {
+enum odm_band_type {
 #if (DM_ODM_SUPPORT_TYPE & (ODM_AP))
-	ODM_BAND_2_4G	= BIT(0),
+	ODM_BAND_2_4G		= BIT(0),
 	ODM_BAND_5G		= BIT(1),
 #else
-	ODM_BAND_2_4G = 0,
+	ODM_BAND_2_4G		= 0,
 	ODM_BAND_5G,
 	ODM_BAND_ON_BOTH,
 	ODM_BANDMAX
 #endif
 };
 
-
 /* ODM_CMNINFO_SEC_CHNL_OFFSET */
-enum phydm_sec_chnl_offset_e {
-
-	PHYDM_DONT_CARE	= 0,
+enum phydm_sec_chnl_offset {
+	PHYDM_DONT_CARE		= 0,
 	PHYDM_BELOW		= 1,
 	PHYDM_ABOVE		= 2
 };
 
 /* ODM_CMNINFO_SEC_MODE */
-enum odm_security_e {
-	ODM_SEC_OPEN			= 0,
+enum odm_security {
+	ODM_SEC_OPEN		= 0,
 	ODM_SEC_WEP40		= 1,
-	ODM_SEC_TKIP			= 2,
+	ODM_SEC_TKIP		= 2,
 	ODM_SEC_RESERVE		= 3,
 	ODM_SEC_AESCCMP		= 4,
 	ODM_SEC_WEP104		= 5,
-	ODM_WEP_WPA_MIXED    = 6, /* WEP + WPA */
-	ODM_SEC_SMS4			= 7,
+	ODM_WEP_WPA_MIXED	= 6, /* WEP + WPA */
+	ODM_SEC_SMS4		= 7,
 };
 
 /* ODM_CMNINFO_CHNL */
 
 /* ODM_CMNINFO_BOARD_TYPE */
-enum odm_board_type_e {
-	ODM_BOARD_DEFAULT 	= 0,	  /* The DEFAULT case. */
-	ODM_BOARD_MINICARD  = BIT(0), /* 0 = non-mini card, 1= mini card. */
-	ODM_BOARD_SLIM      = BIT(1), /* 0 = non-slim card, 1 = slim card */
-	ODM_BOARD_BT        = BIT(2), /* 0 = without BT card, 1 = with BT */
-	ODM_BOARD_EXT_PA    = BIT(3), /* 0 = no 2G ext-PA, 1 = existing 2G ext-PA */
-	ODM_BOARD_EXT_LNA   = BIT(4), /* 0 = no 2G ext-LNA, 1 = existing 2G ext-LNA */
-	ODM_BOARD_EXT_TRSW  = BIT(5), /* 0 = no ext-TRSW, 1 = existing ext-TRSW */
-	ODM_BOARD_EXT_PA_5G	= BIT(6), /* 0 = no 5G ext-PA, 1 = existing 5G ext-PA */
-	ODM_BOARD_EXT_LNA_5G = BIT(7), /* 0 = no 5G ext-LNA, 1 = existing 5G ext-LNA */
+enum odm_board_type {
+	ODM_BOARD_DEFAULT	= 0,	  /* The DEFAULT case. */
+	ODM_BOARD_MINICARD	= BIT(0), /* @0 = non-mini card, 1= mini card. */
+	ODM_BOARD_SLIM		= BIT(1), /* @0 = non-slim card, 1 = slim card */
+	ODM_BOARD_BT		= BIT(2), /* @0 = without BT card, 1 = with BT */
+	ODM_BOARD_EXT_PA	= BIT(3), /* @0 = no 2G ext-PA, 1 = existing 2G ext-PA */
+	ODM_BOARD_EXT_LNA	= BIT(4), /* @0 = no 2G ext-LNA, 1 = existing 2G ext-LNA */
+	ODM_BOARD_EXT_TRSW	= BIT(5), /* @0 = no ext-TRSW, 1 = existing ext-TRSW */
+	ODM_BOARD_EXT_PA_5G	= BIT(6), /* @0 = no 5G ext-PA, 1 = existing 5G ext-PA */
+	ODM_BOARD_EXT_LNA_5G	= BIT(7), /* @0 = no 5G ext-LNA, 1 = existing 5G ext-LNA */
 };
 
-enum odm_package_type_e {
-	ODM_PACKAGE_DEFAULT	 = 0,
-	ODM_PACKAGE_QFN68        = BIT(0),
-	ODM_PACKAGE_TFBGA90      = BIT(1),
-	ODM_PACKAGE_TFBGA79      = BIT(2),
+enum odm_package_type {
+	ODM_PACKAGE_DEFAULT	= 0,
+	ODM_PACKAGE_QFN68	= BIT(0),
+	ODM_PACKAGE_TFBGA90	= BIT(1),
+	ODM_PACKAGE_TFBGA79	= BIT(2),
 };
 
-enum odm_type_gpa_e {
-	TYPE_GPA0 = 0x0000,
-	TYPE_GPA1 = 0x0055,
-	TYPE_GPA2 = 0x00AA,
-	TYPE_GPA3 = 0x00FF,
-	TYPE_GPA4 = 0x5500,
-	TYPE_GPA5 = 0x5555,
-	TYPE_GPA6 = 0x55AA,
-	TYPE_GPA7 = 0x55FF,
-	TYPE_GPA8 = 0xAA00,
-	TYPE_GPA9 = 0xAA55,
-	TYPE_GPA10 = 0xAAAA,
-	TYPE_GPA11 = 0xAAFF,
-	TYPE_GPA12 = 0xFF00,
-	TYPE_GPA13 = 0xFF55,
-	TYPE_GPA14 = 0xFFAA,
-	TYPE_GPA15 = 0xFFFF,
+enum odm_type_gpa {
+	TYPE_GPA0		= 0x0000,
+	TYPE_GPA1		= 0x0055,
+	TYPE_GPA2		= 0x00AA,
+	TYPE_GPA3		= 0x00FF,
+	TYPE_GPA4		= 0x5500,
+	TYPE_GPA5		= 0x5555,
+	TYPE_GPA6		= 0x55AA,
+	TYPE_GPA7		= 0x55FF,
+	TYPE_GPA8		= 0xAA00,
+	TYPE_GPA9		= 0xAA55,
+	TYPE_GPA10		= 0xAAAA,
+	TYPE_GPA11		= 0xAAFF,
+	TYPE_GPA12		= 0xFF00,
+	TYPE_GPA13		= 0xFF55,
+	TYPE_GPA14		= 0xFFAA,
+	TYPE_GPA15		= 0xFFFF,
 };
 
-enum odm_type_apa_e {
-	TYPE_APA0 = 0x0000,
-	TYPE_APA1 = 0x0055,
-	TYPE_APA2 = 0x00AA,
-	TYPE_APA3 = 0x00FF,
-	TYPE_APA4 = 0x5500,
-	TYPE_APA5 = 0x5555,
-	TYPE_APA6 = 0x55AA,
-	TYPE_APA7 = 0x55FF,
-	TYPE_APA8 = 0xAA00,
-	TYPE_APA9 = 0xAA55,
-	TYPE_APA10 = 0xAAAA,
-	TYPE_APA11 = 0xAAFF,
-	TYPE_APA12 = 0xFF00,
-	TYPE_APA13 = 0xFF55,
-	TYPE_APA14 = 0xFFAA,
-	TYPE_APA15 = 0xFFFF,
+enum odm_type_apa {
+	TYPE_APA0		= 0x0000,
+	TYPE_APA1		= 0x0055,
+	TYPE_APA2		= 0x00AA,
+	TYPE_APA3		= 0x00FF,
+	TYPE_APA4		= 0x5500,
+	TYPE_APA5		= 0x5555,
+	TYPE_APA6		= 0x55AA,
+	TYPE_APA7		= 0x55FF,
+	TYPE_APA8		= 0xAA00,
+	TYPE_APA9		= 0xAA55,
+	TYPE_APA10		= 0xAAAA,
+	TYPE_APA11		= 0xAAFF,
+	TYPE_APA12		= 0xFF00,
+	TYPE_APA13		= 0xFF55,
+	TYPE_APA14		= 0xFFAA,
+	TYPE_APA15		= 0xFFFF,
 };
 
-enum odm_type_glna_e {
-	TYPE_GLNA0 = 0x0000,
-	TYPE_GLNA1 = 0x0055,
-	TYPE_GLNA2 = 0x00AA,
-	TYPE_GLNA3 = 0x00FF,
-	TYPE_GLNA4 = 0x5500,
-	TYPE_GLNA5 = 0x5555,
-	TYPE_GLNA6 = 0x55AA,
-	TYPE_GLNA7 = 0x55FF,
-	TYPE_GLNA8 = 0xAA00,
-	TYPE_GLNA9 = 0xAA55,
-	TYPE_GLNA10 = 0xAAAA,
-	TYPE_GLNA11 = 0xAAFF,
-	TYPE_GLNA12 = 0xFF00,
-	TYPE_GLNA13 = 0xFF55,
-	TYPE_GLNA14 = 0xFFAA,
-	TYPE_GLNA15 = 0xFFFF,
+enum odm_type_glna {
+	TYPE_GLNA0		= 0x0000,
+	TYPE_GLNA1		= 0x0055,
+	TYPE_GLNA2		= 0x00AA,
+	TYPE_GLNA3		= 0x00FF,
+	TYPE_GLNA4		= 0x5500,
+	TYPE_GLNA5		= 0x5555,
+	TYPE_GLNA6		= 0x55AA,
+	TYPE_GLNA7		= 0x55FF,
+	TYPE_GLNA8		= 0xAA00,
+	TYPE_GLNA9		= 0xAA55,
+	TYPE_GLNA10		= 0xAAAA,
+	TYPE_GLNA11		= 0xAAFF,
+	TYPE_GLNA12		= 0xFF00,
+	TYPE_GLNA13		= 0xFF55,
+	TYPE_GLNA14		= 0xFFAA,
+	TYPE_GLNA15		= 0xFFFF,
 };
 
-enum odm_type_alna_e {
-	TYPE_ALNA0 = 0x0000,
-	TYPE_ALNA1 = 0x0055,
-	TYPE_ALNA2 = 0x00AA,
-	TYPE_ALNA3 = 0x00FF,
-	TYPE_ALNA4 = 0x5500,
-	TYPE_ALNA5 = 0x5555,
-	TYPE_ALNA6 = 0x55AA,
-	TYPE_ALNA7 = 0x55FF,
-	TYPE_ALNA8 = 0xAA00,
-	TYPE_ALNA9 = 0xAA55,
-	TYPE_ALNA10 = 0xAAAA,
-	TYPE_ALNA11 = 0xAAFF,
-	TYPE_ALNA12 = 0xFF00,
-	TYPE_ALNA13 = 0xFF55,
-	TYPE_ALNA14 = 0xFFAA,
-	TYPE_ALNA15 = 0xFFFF,
+enum odm_type_alna {
+	TYPE_ALNA0		= 0x0000,
+	TYPE_ALNA1		= 0x0055,
+	TYPE_ALNA2		= 0x00AA,
+	TYPE_ALNA3		= 0x00FF,
+	TYPE_ALNA4		= 0x5500,
+	TYPE_ALNA5		= 0x5555,
+	TYPE_ALNA6		= 0x55AA,
+	TYPE_ALNA7		= 0x55FF,
+	TYPE_ALNA8		= 0xAA00,
+	TYPE_ALNA9		= 0xAA55,
+	TYPE_ALNA10		= 0xAAAA,
+	TYPE_ALNA11		= 0xAAFF,
+	TYPE_ALNA12		= 0xFF00,
+	TYPE_ALNA13		= 0xFF55,
+	TYPE_ALNA14		= 0xFFAA,
+	TYPE_ALNA15		= 0xFFFF,
 };
 
 #define	PAUSE_FAIL		0
-#define	PAUSE_SUCCESS	1
+#define	PAUSE_SUCCESS		1
 
-enum odm_parameter_init_e {
-	ODM_PRE_SETTING = 0,
-	ODM_POST_SETTING = 1,
+enum odm_parameter_init {
+	ODM_PRE_SETTING		= 0,
+	ODM_POST_SETTING	= 1,
 	ODM_INIT_FW_SETTING
 };
 
-
 enum phydm_pause_type {
-	PHYDM_PAUSE = 1,			/*Pause & Set new value*/
-	PHYDM_PAUSE_NO_SET = 2,	/*Pause & Stay in current value*/
-	PHYDM_RESUME = 3
+	PHYDM_PAUSE		= 1,	/*Pause & Set new value*/
+	PHYDM_PAUSE_NO_SET	= 2,	/*Pause & Stay in current value*/
+	PHYDM_RESUME		= 3
 };
 
 enum phydm_pause_level {
-	PHYDM_PAUSE_RELEASE = -1,
-	PHYDM_PAUSE_LEVEL_0 = 0,	/* Low Priority function */
-	PHYDM_PAUSE_LEVEL_1 = 1,	/* Middle Priority function */
-	PHYDM_PAUSE_LEVEL_2 = 2,	/* High priority function (ex: Check hang function) */
-	PHYDM_PAUSE_LEVEL_3 = 3,	/* Debug function (the highest priority) */
-	PHYDM_PAUSE_MAX_NUM = 4
+	PHYDM_PAUSE_RELEASE	= -1,
+	PHYDM_PAUSE_LEVEL_0	= 0,	/* @Low Priority function */
+	PHYDM_PAUSE_LEVEL_1	= 1,	/* @Middle Priority function */
+	PHYDM_PAUSE_LEVEL_2	= 2,	/* @High priority function (ex: Check hang function) */
+	PHYDM_PAUSE_LEVEL_3	= 3,	/* @Debug function (the highest priority) */
+	PHYDM_PAUSE_MAX_NUM	= 4
 };
 
+enum phydm_dis_hw_fun {
+	HW_FUN_DIS		= 0,	/*@Disable a cetain HW function & backup the original value*/
+	HW_FUN_RESUME		= 1	/*Revert */
+};
 
 #endif
diff --git a/rtl8723DS/hal/phydm/phydm_precomp.h b/rtl8723DS/hal/phydm/phydm_precomp.h
index 3040f66..78b8945 100755..100644
--- a/rtl8723DS/hal/phydm/phydm_precomp.h
+++ b/rtl8723DS/hal/phydm/phydm_precomp.h
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2007 - 2017 Realtek Corporation.
+ * Copyright(c) 2007 - 2017  Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -8,25 +8,34 @@
  *
  * This program is distributed in the hope that it will be useful, but WITHOUT
  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  * more details.
  *
+ * The full GNU General Public License is included in this distribution in the
+ * file called LICENSE.
+ *
+ * Contact Information:
+ * wlanfae <wlanfae@realtek.com>
+ * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
+ * Hsinchu 300, Taiwan.
+ *
+ * Larry Finger <Larry.Finger@lwfinger.net>
+ *
  *****************************************************************************/
 
-#ifndef	__ODM_PRECOMP_H__
+#ifndef __ODM_PRECOMP_H__
 #define __ODM_PRECOMP_H__
 
 #include "phydm_types.h"
-#include "phydm_features.h"
 #include "halrf/halrf_features.h"
 
 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
-	#include "Precomp.h"		/* We need to include mp_precomp.h due to batch file setting. */
+	#include "Precomp.h"		/* @We need to include mp_precomp.h due to batch file setting. */
 #else
 	#define		TEST_FALG___		1
 #endif
 
-/* 2 Config Flags and Structs - defined by each ODM type */
+/* @2 Config Flags and Structs - defined by each ODM type */
 
 #if (DM_ODM_SUPPORT_TYPE == ODM_AP)
 	#include "../8192cd_cfg.h"
@@ -34,6 +43,7 @@
 
 	#include "../8192cd.h"
 	#include "../8192cd_util.h"
+	#include "../8192cd_hw.h"
 	#ifdef _BIG_ENDIAN_
 		#define	ODM_ENDIAN_TYPE				ODM_ENDIAN_BIG
 	#else
@@ -47,6 +57,10 @@
 	#ifdef DM_ODM_CE_MAC80211
 		#include "../wifi.h"
 		#include "rtl_phydm.h"
+	#elif defined(DM_ODM_CE_MAC80211_V2)
+		#include "../main.h"
+		#include "../hw.h"
+		#include "../fw.h"
 	#endif
 	#define __PACK
 	#define __WLAN_ATTRIB_PACK__
@@ -55,9 +69,14 @@
 	#define	ODM_ENDIAN_TYPE				ODM_ENDIAN_LITTLE
 	#define __PACK
 	#define __WLAN_ATTRIB_PACK__
+#elif (DM_ODM_SUPPORT_TYPE == ODM_IOT)
+	#include <drv_types.h>
+	#include <wifi.h>
+	#define	ODM_ENDIAN_TYPE				ODM_ENDIAN_LITTLE
+	#define __PACK
 #endif
 
-/* 2 OutSrc Header Files */
+/* @2 OutSrc Header Files */
 
 #include "phydm.h"
 #include "phydm_hwconfig.h"
@@ -67,49 +86,41 @@
 #include "phydm_regdefine11n.h"
 #include "phydm_interface.h"
 #include "phydm_reg.h"
+#include "halrf/halrf_debug.h"
 
-#if (DM_ODM_SUPPORT_TYPE & ODM_CE) && !defined(DM_ODM_CE_MAC80211)
+#if (DM_ODM_SUPPORT_TYPE & ODM_CE) && \
+	(!defined(DM_ODM_CE_MAC80211) && !defined(DM_ODM_CE_MAC80211_V2))
 
-void
-phy_set_tx_power_limit(
-	struct PHY_DM_STRUCT	*p_dm,
-	u8	*regulation,
-	u8	*band,
-	u8	*bandwidth,
-	u8	*rate_section,
-	u8	*rf_path,
-	u8	*channel,
-	u8	*power_limit
-);
+void phy_set_tx_power_limit(
+	struct dm_struct *dm,
+	u8 *regulation,
+	u8 *band,
+	u8 *bandwidth,
+	u8 *rate_section,
+	u8 *rf_path,
+	u8 *channel,
+	u8 *power_limit);
 
 enum hal_status
 rtw_phydm_fw_iqk(
-	struct PHY_DM_STRUCT	*p_dm,
+	struct dm_struct *dm,
 	u8 clear,
-	u8 segment
-);
+	u8 segment);
 
 enum hal_status
 rtw_phydm_cfg_phy_para(
-	struct PHY_DM_STRUCT	*p_dm,
+	struct dm_struct *dm,
 	enum phydm_halmac_param config_type,
 	u32 offset,
 	u32 data,
 	u32 mask,
 	enum rf_path e_rf_path,
-	u32 delay_time
-);
+	u32 delay_time);
 
 #endif
 
-#if (DM_ODM_SUPPORT_TYPE & ODM_AP)
-	#define RTL8703B_SUPPORT		0
-	#define RTL8188F_SUPPORT		0
-	#define RTL8723D_SUPPORT		0
-#endif
-
-/* JJ ADD 20161014 */
-#if (DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_IOT))
+/* @Judy ADD 20180125 */
+#if (DM_ODM_SUPPORT_TYPE & (ODM_AP | ODM_IOT))
 #define RTL8710B_SUPPORT		0
 #endif
 
@@ -122,8 +133,16 @@ rtw_phydm_cfg_phy_para(
 	#endif
 #endif
 
+#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_CE))
+#define RTL8197F_SUPPORT 0	/*@Just for PHYDM API development*/
+#define	RTL8195B_SUPPORT 0	/*@Just for PHYDM API development*/
+#define	RTL8198F_SUPPORT 0	/*@Just for PHYDM API development*/
+#define	RTL8812F_SUPPORT 0	/*@Just for PHYDM API development*/
+#define	RTL8197G_SUPPORT 0	/*@Just for PHYDM API development*/
+#endif
+
 #if (RTL8188E_SUPPORT == 1)
-	#include "rtl8188e/hal8188erateadaptive.h" /* for  RA,Power training */
+	#include "rtl8188e/hal8188erateadaptive.h" /* @for  RA,Power training */
 	#include "rtl8188e/halhwimg8188e_mac.h"
 	#include "rtl8188e/halhwimg8188e_rf.h"
 	#include "rtl8188e/halhwimg8188e_bb.h"
@@ -141,19 +160,19 @@ rtw_phydm_cfg_phy_para(
 	#if (DM_ODM_SUPPORT_TYPE == ODM_AP)
 		#include "halrf/rtl8188e/halrf_8188e_ap.h"
 	#endif
-#endif /* 88E END */
+#endif /* @88E END */
 
 #if (RTL8192E_SUPPORT == 1)
 
 	#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
-		#include "halrf/rtl8192e/halrf_8192e_win.h" /*FOR_8192E_IQK*/
+		#include "halrf/rtl8192e/halrf_8192e_win.h" /*@FOR_8192E_IQK*/
 	#elif (DM_ODM_SUPPORT_TYPE == ODM_AP)
-		#include "halrf/rtl8192e/halrf_8192e_ap.h" /*FOR_8192E_IQK*/
+		#include "halrf/rtl8192e/halrf_8192e_ap.h" /*@FOR_8192E_IQK*/
 	#elif (DM_ODM_SUPPORT_TYPE == ODM_CE)
-		#include "halrf/rtl8192e/halrf_8192e_ce.h" /*FOR_8192E_IQK*/
+		#include "halrf/rtl8192e/halrf_8192e_ce.h" /*@FOR_8192E_IQK*/
 	#endif
 
-	#include "rtl8192e/phydm_rtl8192e.h" /* FOR_8192E_IQK */
+	#include "rtl8192e/phydm_rtl8192e.h" /* @FOR_8192E_IQK */
 	#include "rtl8192e/version_rtl8192e.h"
 	#if (DM_ODM_SUPPORT_TYPE != ODM_AP)
 		#include "rtl8192e/halhwimg8192e_bb.h"
@@ -165,7 +184,7 @@ rtw_phydm_cfg_phy_para(
 	#if (DM_ODM_SUPPORT_TYPE == ODM_CE)
 		#include "rtl8192e_hal.h"
 	#endif
-#endif /* 92E END */
+#endif /* @92E END */
 
 #if (RTL8812A_SUPPORT == 1)
 
@@ -177,21 +196,21 @@ rtw_phydm_cfg_phy_para(
 		#include "halrf/rtl8812a/halrf_8812a_ce.h"
 	#endif
 
-	/* #include "halrf/rtl8812a/halrf_8812a.h"  */ /* FOR_8812_IQK */
+	/* @#include "halrf/rtl8812a/halrf_8812a.h"  */ /* @FOR_8812_IQK */
 	#if (DM_ODM_SUPPORT_TYPE != ODM_AP)
 		#include "rtl8812a/halhwimg8812a_bb.h"
 		#include "rtl8812a/halhwimg8812a_mac.h"
 		#include "rtl8812a/halhwimg8812a_rf.h"
 		#include "rtl8812a/phydm_regconfig8812a.h"
-		#include "rtl8812a/phydm_rtl8812a.h"
 	#endif
+	#include "rtl8812a/phydm_rtl8812a.h"
 
 	#if (DM_ODM_SUPPORT_TYPE == ODM_CE)
 		#include "rtl8812a_hal.h"
 	#endif
 	#include "rtl8812a/version_rtl8812a.h"
 
-#endif /* 8812 END */
+#endif /* @8812 END */
 
 #if (RTL8814A_SUPPORT == 1)
 
@@ -212,9 +231,9 @@ rtw_phydm_cfg_phy_para(
 		#include "rtl8814a_hal.h"
 		#include "halrf/rtl8814a/halrf_iqk_8814a.h"
 	#endif
-#endif /* 8814 END */
+#endif /* @8814 END */
 
-#if (RTL8881A_SUPPORT == 1)/* FOR_8881_IQK */
+#if (RTL8881A_SUPPORT == 1)/* @FOR_8881_IQK */
 	#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
 		#include "halrf/rtl8821a/halrf_iqk_8821a_win.h"
 	#elif (DM_ODM_SUPPORT_TYPE == ODM_CE)
@@ -222,10 +241,10 @@ rtw_phydm_cfg_phy_para(
 	#else
 		#include "halrf/rtl8821a/halrf_iqk_8821a_ap.h"
 	#endif
-	/* #include "rtl8881a/HalHWImg8881A_BB.h" */
-	/* #include "rtl8881a/HalHWImg8881A_MAC.h" */
-	/* #include "rtl8881a/HalHWImg8881A_RF.h" */
-	/* #include "rtl8881a/odm_RegConfig8881A.h" */
+	/* @#include "rtl8881a/HalHWImg8881A_BB.h" */
+	/* @#include "rtl8881a/HalHWImg8881A_MAC.h" */
+	/* @#include "rtl8881a/HalHWImg8881A_RF.h" */
+	/* @#include "rtl8881a/odm_RegConfig8881A.h" */
 #endif
 
 #if (RTL8723B_SUPPORT == 1)
@@ -258,8 +277,8 @@ rtw_phydm_cfg_phy_para(
 		#include "halrf/rtl8821a/halrf_8821a_win.h"
 	#elif (DM_ODM_SUPPORT_TYPE == ODM_CE)
 		#include "halrf/rtl8821a/halrf_8821a_ce.h"
-		#include "halrf/rtl8821a/halrf_iqk_8821a_ce.h"/*for IQK*/
-		#include "halrf/rtl8812a/halrf_8812a_ce.h"/*for IQK,LCK,Power-tracking*/
+		#include "halrf/rtl8821a/halrf_iqk_8821a_ce.h"/*@for IQK*/
+		#include "halrf/rtl8812a/halrf_8812a_ce.h"/*@for IQK,LCK,Power-tracking*/
 		#include "rtl8812a_hal.h"
 	#else
 	#endif
@@ -267,27 +286,8 @@ rtw_phydm_cfg_phy_para(
 
 #if (DM_ODM_SUPPORT_TYPE == ODM_CE) && defined(DM_ODM_CE_MAC80211)
 #include "../halmac/halmac_reg2.h"
-
-#define	LDPC_HT_ENABLE_RX			BIT(0)
-#define	LDPC_HT_ENABLE_TX			BIT(1)
-#define	LDPC_HT_TEST_TX_ENABLE			BIT(2)
-#define	LDPC_HT_CAP_TX				BIT(3)
-
-#define	STBC_HT_ENABLE_RX			BIT(0)
-#define	STBC_HT_ENABLE_TX			BIT(1)
-#define	STBC_HT_TEST_TX_ENABLE			BIT(2)
-#define	STBC_HT_CAP_TX				BIT(3)
-
-
-#define	LDPC_VHT_ENABLE_RX			BIT(0)
-#define	LDPC_VHT_ENABLE_TX			BIT(1)
-#define	LDPC_VHT_TEST_TX_ENABLE			BIT(2)
-#define	LDPC_VHT_CAP_TX				BIT(3)
-
-#define	STBC_VHT_ENABLE_RX			BIT(0)
-#define	STBC_VHT_ENABLE_TX			BIT(1)
-#define	STBC_VHT_TEST_TX_ENABLE			BIT(2)
-#define	STBC_VHT_CAP_TX				BIT(3)
+#elif (DM_ODM_SUPPORT_TYPE == ODM_CE) && defined(DM_ODM_CE_MAC80211_V2)
+#include "../halmac/halmac_reg2.h"
 #endif
 
 
@@ -305,9 +305,11 @@ rtw_phydm_cfg_phy_para(
 	#elif (DM_ODM_SUPPORT_TYPE == ODM_CE)
 		#ifdef DM_ODM_CE_MAC80211
 			#include "../halmac/halmac_reg_8822b.h"
+		#elif defined(DM_ODM_CE_MAC80211_V2)
+			#include "../halmac/halmac_reg_8822b.h"
 		#else
-			#include <hal_data.h>		/* struct HAL_DATA_TYPE */
-			#include <rtl8822b_hal.h>	/* RX_SMOOTH_FACTOR, reg definition and etc.*/
+			#include <hal_data.h>		/* @struct HAL_DATA_TYPE */
+			#include <rtl8822b_hal.h>	/* @RX_SMOOTH_FACTOR, reg definition and etc.*/
 		#endif
 	#elif (DM_ODM_SUPPORT_TYPE == ODM_AP)
 	#endif
@@ -315,6 +317,7 @@ rtw_phydm_cfg_phy_para(
 #endif
 
 #if (RTL8703B_SUPPORT == 1)
+	#include "rtl8703b/phydm_rtl8703b.h"
 	#include "rtl8703b/phydm_regconfig8703b.h"
 	#include "rtl8703b/halhwimg8703b_mac.h"
 	#include "rtl8703b/halhwimg8703b_rf.h"
@@ -333,7 +336,7 @@ rtw_phydm_cfg_phy_para(
 	#include "rtl8188f/hal8188freg.h"
 	#include "rtl8188f/phydm_rtl8188f.h"
 	#include "rtl8188f/phydm_regconfig8188f.h"
-	#include "halrf/rtl8188f/halrf_8188f.h" /* for IQK,LCK,Power-tracking */
+	#include "halrf/rtl8188f/halrf_8188f.h" /*@for IQK,LCK,Power-tracking*/
 	#include "rtl8188f/version_rtl8188f.h"
 	#if (DM_ODM_SUPPORT_TYPE == ODM_CE)
 		#include "rtl8188f_hal.h"
@@ -353,11 +356,13 @@ rtw_phydm_cfg_phy_para(
 		#include "rtl8723d/version_rtl8723d.h"
 	#endif
 	#if (DM_ODM_SUPPORT_TYPE == ODM_CE)
+		#ifdef DM_ODM_CE_MAC80211
+		#else
 		#include "rtl8723d_hal.h"
+		#endif
 	#endif
-#endif /* 8723D End */
+#endif /* @8723D End */
 
-/* JJ ADD 20161014 */
 #if (RTL8710B_SUPPORT == 1)
 	#if (DM_ODM_SUPPORT_TYPE != ODM_AP)
 
@@ -373,7 +378,7 @@ rtw_phydm_cfg_phy_para(
 	#if (DM_ODM_SUPPORT_TYPE == ODM_CE)
 		#include "rtl8710b_hal.h"
 	#endif
-#endif /* 8710B End */
+#endif /* @8710B End */
 
 #if (RTL8197F_SUPPORT == 1)
 	#include "rtl8197f/halhwimg8197f_mac.h"
@@ -385,6 +390,7 @@ rtw_phydm_cfg_phy_para(
 	#include "rtl8197f/phydm_regconfig8197f.h"
 	#include "halrf/rtl8197f/halrf_8197f.h"
 	#include "halrf/rtl8197f/halrf_iqk_8197f.h"
+	#include "halrf/rtl8197f/halrf_dpk_8197f.h"
 #endif
 
 #if (RTL8821C_SUPPORT == 1)
@@ -396,8 +402,113 @@ rtw_phydm_cfg_phy_para(
 	#include "halrf/rtl8821c/halrf_8821c.h"
 	#include "rtl8821c/version_rtl8821c.h"
 	#if (DM_ODM_SUPPORT_TYPE == ODM_CE)
+		#ifdef DM_ODM_CE_MAC80211
+		#include "../halmac/halmac_reg_8821c.h"
+		#else
 		#include "rtl8821c_hal.h"
+		#endif
 	#endif
 #endif
 
-#endif /* __ODM_PRECOMP_H__ */
+#if (RTL8192F_SUPPORT == 1)
+	#if (DM_ODM_SUPPORT_TYPE == ODM_CE)
+		#include "rtl8192f_hal.h"/*need to before rf.h*/
+	#endif
+	#include "rtl8192f/halhwimg8192f_mac.h"
+	#include "rtl8192f/halhwimg8192f_rf.h"
+	#include "rtl8192f/halhwimg8192f_bb.h"
+	#include "rtl8192f/phydm_hal_api8192f.h"
+	#include "rtl8192f/version_rtl8192f.h"
+	#include "rtl8192f/phydm_rtl8192f.h"
+	#include "rtl8192f/phydm_regconfig8192f.h"
+	#include "halrf/rtl8192f/halrf_8192f.h"
+	#if (DM_ODM_SUPPORT_TYPE == ODM_AP)
+		#include "halrf/rtl8192f/halrf_dpk_8192f.h"
+	#endif
+#endif
+
+#if (RTL8721D_SUPPORT == 1)
+	#include "halrf/rtl8721d/halrf_8721d.h"
+	#include "rtl8721d/phydm_hal_api8721d.h"
+	#include "rtl8721d/phydm_regconfig8721d.h"
+	#include "rtl8721d/halhwimg8721d_mac.h"
+	#include "rtl8721d/halhwimg8721d_rf.h"
+	#include "rtl8721d/halhwimg8721d_bb.h"
+	#include "rtl8721d/version_rtl8721d.h"
+	#include "rtl8721d/phydm_rtl8721d.h"
+	#include "rtl8721d/hal8721dreg.h"
+	#include <hal_data.h>
+	#if 0
+	#if (DM_ODM_SUPPORT_TYPE == ODM_AP)
+		#include "halrf/rtl8721d/halrf_dpk_8721d.h"
+	#endif
+	#if (DM_ODM_SUPPORT_TYPE == ODM_CE)
+		#include "rtl8721d_hal.h"
+	#endif
+	#endif
+#endif
+#if (RTL8195B_SUPPORT == 1)
+	#include "halrf/rtl8195b/halrf_8195b.h"
+	#include "rtl8195b/phydm_hal_api8195b.h"
+	#include "rtl8195b/phydm_regconfig8195b.h"
+	#include "rtl8195b/halhwimg8195b_mac.h"
+	#include "rtl8195b/halhwimg8195b_rf.h"
+	#include "rtl8195b/halhwimg8195b_bb.h"
+	#include "rtl8195b/version_rtl8195b.h"
+	#include <hal_data.h> /*@HAL_DATA_TYPE*/
+#endif
+
+#if (RTL8198F_SUPPORT == 1)
+	#include "rtl8198f/phydm_regconfig8198f.h"
+	#include "rtl8198f/phydm_hal_api8198f.h"
+	#include "rtl8198f/halhwimg8198f_mac.h"
+	#include "rtl8198f/halhwimg8198f_rf.h"
+	#include "rtl8198f/halhwimg8198f_bb.h"
+	#include "rtl8198f/version_rtl8198f.h"
+	#include "halrf/rtl8198f/halrf_8198f.h"
+	#include "halrf/rtl8198f/halrf_iqk_8198f.h"
+#endif
+
+#if (RTL8822C_SUPPORT)
+	#include "rtl8822c/halhwimg8822c_mac.h"
+	#include "rtl8822c/halhwimg8822c_rf.h"
+	#include "rtl8822c/halhwimg8822c_bb.h"
+	#include "rtl8822c/phydm_regconfig8822c.h"
+	#include "halrf/rtl8822c/halrf_8822c.h"
+	#include "rtl8822c/phydm_hal_api8822c.h"
+	#include "rtl8822c/version_rtl8822c.h"
+	#if (DM_ODM_SUPPORT_TYPE == ODM_CE)
+	/* @struct HAL_DATA_TYPE */
+	#include <hal_data.h>
+	/* @RX_SMOOTH_FACTOR, reg definition and etc.*/
+	#include <rtl8822c_hal.h>
+	#endif
+#endif
+#if (RTL8814B_SUPPORT == 1)
+	#include "rtl8814b/halhwimg8814b_mac.h"
+	#include "rtl8814b/halhwimg8814b_rf.h"
+	#include "rtl8814b/halhwimg8814b_bb.h"
+	#include "rtl8814b/phydm_regconfig8814b.h"
+	#include "halrf/rtl8814b/halrf_8814b.h"
+	#include "rtl8814b/phydm_hal_api8814b.h"
+	#include "rtl8814b/version_rtl8814b.h"
+#endif
+#if (RTL8812F_SUPPORT)
+	#include "rtl8812f/halhwimg8812f_mac.h"
+	#include "rtl8812f/halhwimg8812f_rf.h"
+	#include "rtl8812f/halhwimg8812f_bb.h"
+	#include "rtl8812f/phydm_regconfig8812f.h"
+	#include "halrf/rtl8812f/halrf_8812f.h"
+	#include "rtl8812f/phydm_hal_api8812f.h"
+	#include "rtl8812f/version_rtl8812f.h"
+#endif
+#if (RTL8197G_SUPPORT)
+	#include "rtl8197g/halhwimg8197g_mac.h"
+	#include "rtl8197g/halhwimg8197g_rf.h"
+	#include "rtl8197g/halhwimg8197g_bb.h"
+	#include "rtl8197g/phydm_regconfig8197g.h"
+	#include "halrf/rtl8197g/halrf_8197g.h"
+	#include "rtl8197g/phydm_hal_api8197g.h"
+	#include "rtl8197g/version_rtl8197g.h"
+#endif
+#endif /* @__ODM_PRECOMP_H__ */
diff --git a/rtl8723DS/hal/phydm/phydm_primary_cca.c b/rtl8723DS/hal/phydm/phydm_primary_cca.c
index 991e65b..dec6c53 100755..100644
--- a/rtl8723DS/hal/phydm/phydm_primary_cca.c
+++ b/rtl8723DS/hal/phydm/phydm_primary_cca.c
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2007 - 2017 Realtek Corporation.
+ * Copyright(c) 2007 - 2017  Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -8,727 +8,166 @@
  *
  * This program is distributed in the hope that it will be useful, but WITHOUT
  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  * more details.
  *
+ * The full GNU General Public License is included in this distribution in the
+ * file called LICENSE.
+ *
+ * Contact Information:
+ * wlanfae <wlanfae@realtek.com>
+ * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
+ * Hsinchu 300, Taiwan.
+ *
+ * Larry Finger <Larry.Finger@lwfinger.net>
+ *
  *****************************************************************************/
 
-/* ************************************************************
+/*************************************************************
  * include files
- * ************************************************************ */
+ ************************************************************/
 #include "mp_precomp.h"
 #include "phydm_precomp.h"
 #ifdef PHYDM_PRIMARY_CCA
 
-void
-phydm_write_dynamic_cca(
-	void			*p_dm_void,
-	u8			curr_mf_state
-	
-)
-{
-	struct PHY_DM_STRUCT		*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	struct phydm_pricca_struct	*primary_cca = &(p_dm->dm_pri_cca);
-
-	if (primary_cca->mf_state != curr_mf_state) {
-
-		if (p_dm->support_ic_type & ODM_IC_11N_SERIES) {
-			
-			if (curr_mf_state == MF_USC_LSC) {
-				odm_set_bb_reg(p_dm, 0xc6c, BIT(8) | BIT(7), MF_USC_LSC);
-				odm_set_bb_reg(p_dm, 0xc84, 0xf0000000, primary_cca->cca_th_40m_bkp); /*40M OFDM MF CCA threshold*/
-			} else {
-				odm_set_bb_reg(p_dm, 0xc6c, BIT(8) | BIT(7), curr_mf_state);
-				odm_set_bb_reg(p_dm, 0xc84, 0xf0000000, 0); /*40M OFDM MF CCA threshold*/
-			}
-		}
-		
-		primary_cca->mf_state = curr_mf_state;
-		PHYDM_DBG(p_dm, DBG_PRI_CCA,
-			("Set CCA at ((%s SB)), 0xc6c[8:7]=((%d))\n", ((curr_mf_state == MF_USC_LSC)?"D":((curr_mf_state == MF_LSC)?"L":"U")), curr_mf_state));
-	}
-}
-
-void
-phydm_primary_cca_reset(
-	void			*p_dm_void
-)
-{
-	struct PHY_DM_STRUCT		*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	struct phydm_pricca_struct	*primary_cca = &(p_dm->dm_pri_cca);
+void phydm_write_dynamic_cca(
+	void *dm_void,
+	u8 curr_mf_state
 
-	PHYDM_DBG(p_dm, DBG_PRI_CCA, ("[PriCCA] Reset\n"));
-	primary_cca->mf_state = 0xff;
-	primary_cca->pre_bw = (enum channel_width)0xff;
-	phydm_write_dynamic_cca(p_dm, MF_USC_LSC);
-}
-
-void
-phydm_primary_cca_11n(
-	void			*p_dm_void
-)
+	)
 {
-	struct PHY_DM_STRUCT		*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	struct phydm_pricca_struct	*p_primary_cca = &(p_dm->dm_pri_cca);
-	enum channel_width	curr_bw = (enum channel_width)(*(p_dm->p_band_width));
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct phydm_pricca_struct *pri_cca = &dm->dm_pri_cca;
 
-	if (!(p_dm->support_ability & ODM_BB_PRIMARY_CCA))
+	if (pri_cca->mf_state == curr_mf_state)
 		return;
-	
-	if (!p_dm->is_linked) { /* is_linked==False */
-		PHYDM_DBG(p_dm, DBG_PRI_CCA, ("[PriCCA][No Link!!!]\n"));
 
-		if (p_primary_cca->pri_cca_is_become_linked == true) {
-			phydm_primary_cca_reset(p_dm);
-			p_primary_cca->pri_cca_is_become_linked = p_dm->is_linked;
-		}
-		return;
-		
-	} else {
-		if (p_primary_cca->pri_cca_is_become_linked == false) {
-			PHYDM_DBG(p_dm, DBG_PRI_CCA, ("[PriCCA][Linked !!!]\n"));
-			p_primary_cca->pri_cca_is_become_linked = p_dm->is_linked;
-		}
-	}
-	
-	if (curr_bw != p_primary_cca->pre_bw) {
-
-		PHYDM_DBG(p_dm, DBG_PRI_CCA, ("[Primary CCA] start ==>\n"));
-		p_primary_cca->pre_bw = curr_bw;
-
-		if (curr_bw == CHANNEL_WIDTH_40) {
-			
-			if ((*(p_dm->p_sec_ch_offset)) == SECOND_CH_AT_LSB) {/* Primary CH @ upper sideband*/
-				
-				PHYDM_DBG(p_dm, DBG_PRI_CCA, ("BW40M, Primary CH at USB\n"));
-				phydm_write_dynamic_cca(p_dm, MF_USC);
-				
-			} else {	/*Primary CH @ lower sideband*/
-				
-				PHYDM_DBG(p_dm, DBG_PRI_CCA, ("BW40M, Primary CH at LSB\n"));
-				phydm_write_dynamic_cca(p_dm, MF_LSC);
-			}
+	if (dm->support_ic_type & ODM_IC_11N_SERIES) {
+		if (curr_mf_state == MF_USC_LSC) {
+			odm_set_bb_reg(dm, R_0xc6c, 0x180, MF_USC_LSC);
+			/*@40M OFDM MF CCA threshold*/
+			odm_set_bb_reg(dm, R_0xc84, 0xf0000000,
+				       pri_cca->cca_th_40m_bkp);
 		} else {
-		
-			PHYDM_DBG(p_dm, DBG_PRI_CCA, ("Not BW40M, USB + LSB\n"));
-			phydm_primary_cca_reset(p_dm);
+			odm_set_bb_reg(dm, R_0xc6c, 0x180, curr_mf_state);
+			/*@40M OFDM MF CCA threshold*/
+			odm_set_bb_reg(dm, R_0xc84, 0xf0000000, 0);
 		}
 	}
+
+	pri_cca->mf_state = curr_mf_state;
+	PHYDM_DBG(dm, DBG_PRI_CCA, "Set CCA at ((%s SB)), 0xc6c[8:7]=((%d))\n",
+		  ((curr_mf_state == MF_USC_LSC) ? "D" :
+		  ((curr_mf_state == MF_LSC) ? "L" : "U")), curr_mf_state);
 }
 
-#if 0
-#if (RTL8188E_SUPPORT == 1)
-void
-odm_dynamic_primary_cca_8188e(
-	void			*p_dm_void
-)
+void phydm_primary_cca_reset(
+	void *dm_void)
 {
-	struct PHY_DM_STRUCT		*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	struct sta_info	*p_entry;
-	struct cmn_sta_info	*p_sta;
-	struct phydm_fa_struct		*false_alm_cnt = (struct phydm_fa_struct *)phydm_get_structure(p_dm, PHYDM_FALSEALMCNT);
-	struct phydm_pricca_struct		*primary_cca = &(p_dm->dm_pri_cca);
-	boolean		client_40mhz = false, client_tmp = false;      /* connected client BW */
-	boolean		is_connected = false;		/* connected or not */
-	u8	client_40mhz_pre = 0;
-	u32	counter = 0;
-	u8	delay = 1;
-	u64		cur_tx_ok_cnt;
-	u64		cur_rx_ok_cnt;
-	u8		sec_ch_offset = *(p_dm->p_sec_ch_offset);
-	u8		i;
-
-	if (!p_dm->is_linked)
-		return;
-
-	if (!(p_dm->support_ability & ODM_BB_PRIMARY_CCA))
-		return;
-
-	if (*(p_dm->p_band_width) == CHANNEL_WIDTH_20) {	/*curr bw*/
-		odm_set_bb_reg(p_dm, 0xc6c, BIT(8) | BIT(7), 0);
-		return;
-	}
-
-	#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) || (DM_ODM_SUPPORT_TYPE == ODM_CE)
-		sec_ch_offset = sec_ch_offset % 2 + 1; /* NIC's definition is reverse to AP   1:secondary below,  2: secondary above */
-	#endif
-	
-	PHYDM_DBG(p_dm, DBG_PRI_CCA, ("Second CH Offset = %d\n", sec_ch_offset));
-
-	/* 3 Check Current WLAN Traffic */
-	cur_tx_ok_cnt = p_dm->tx_tp;
-	cur_rx_ok_cnt = p_dm->rx_tp;
-
-	/* ==================Debug Message==================== */
-	PHYDM_DBG(p_dm, DBG_PRI_CCA, ("TP = %llu\n", cur_tx_ok_cnt + cur_rx_ok_cnt));
-	PHYDM_DBG(p_dm, DBG_PRI_CCA, ("is_BW40 = %d\n", *(p_dm->p_band_width)));
-	PHYDM_DBG(p_dm, DBG_PRI_CCA, ("BW_LSC = %d\n", false_alm_cnt->cnt_bw_lsc));
-	PHYDM_DBG(p_dm, DBG_PRI_CCA, ("BW_USC = %d\n", false_alm_cnt->cnt_bw_usc));
-	PHYDM_DBG(p_dm, DBG_PRI_CCA, ("CCA OFDM = %d\n", false_alm_cnt->cnt_ofdm_cca));
-	PHYDM_DBG(p_dm, DBG_PRI_CCA, ("CCA CCK = %d\n", false_alm_cnt->cnt_cck_cca));
-	PHYDM_DBG(p_dm, DBG_PRI_CCA, ("OFDM FA = %d\n", false_alm_cnt->cnt_ofdm_fail));
-	PHYDM_DBG(p_dm, DBG_PRI_CCA, ("CCK FA = %d\n", false_alm_cnt->cnt_cck_fail));
-	/* ================================================ */
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct phydm_pricca_struct *pri_cca = &dm->dm_pri_cca;
 
-#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
-	if (ACTING_AS_AP(p_dm->adapter))   /* primary cca process only do at AP mode */
-#endif
-	{
-
-#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
-		PHYDM_DBG(p_dm, DBG_PRI_CCA, ("ACTING as AP mode=%d\n", ACTING_AS_AP(p_dm->adapter)));
-		/* 3 To get entry's connection and BW infomation status. */
-		for (i = 0; i < ASSOCIATE_ENTRY_NUM; i++) {
-			if (IsAPModeExist(p_dm->adapter) && GetFirstExtAdapter(p_dm->adapter) != NULL)
-				p_entry = AsocEntry_EnumStation(GetFirstExtAdapter(p_dm->adapter), i);
-			else
-				p_entry = AsocEntry_EnumStation(GetDefaultAdapter(p_dm->adapter), i);
-			if (p_entry != NULL) {
-				client_tmp = p_entry->BandWidth;   /* client BW */
-				PHYDM_DBG(p_dm, DBG_PRI_CCA, ("Client_BW=%d\n", client_tmp));
-				if (client_tmp > client_40mhz)
-					client_40mhz = client_tmp;     /* 40M/20M coexist => 40M priority is High */
-
-				if (p_entry->bAssociated) {
-					is_connected = true;  /* client is connected or not */
-					break;
-				}
-			} else
-				break;
-		}
-#elif (DM_ODM_SUPPORT_TYPE == ODM_AP)
-		/* 3 To get entry's connection and BW infomation status. */
-
-		for (i = 0; i < ODM_ASSOCIATE_ENTRY_NUM; i++) {
-			p_sta = p_dm->p_phydm_sta_info[i];
-			if (is_sta_active(p_sta)) {
-				client_tmp = p_sta->bw_mode;
-				if (client_tmp > client_40mhz)
-					client_40mhz = client_tmp;     /* 40M/20M coexist => 40M priority is High */
-
-				is_connected = true;
-			}
-		}
-#endif
-		PHYDM_DBG(p_dm, DBG_PRI_CCA, ("is_connected=%d\n", is_connected));
-		PHYDM_DBG(p_dm, DBG_PRI_CCA, ("Is Client 40MHz=%d\n", client_40mhz));
-		/* 1 Monitor whether the interference exists or not */
-		if (primary_cca->monitor_flag == 1) {
-			if (sec_ch_offset == 1) {    /* secondary channel is below the primary channel */
-				if ((false_alm_cnt->cnt_ofdm_cca > 500) && (false_alm_cnt->cnt_bw_lsc > false_alm_cnt->cnt_bw_usc + 500)) {
-					if (false_alm_cnt->cnt_ofdm_fail > false_alm_cnt->cnt_ofdm_cca >> 1) {
-						primary_cca->intf_type = 1;
-						primary_cca->pri_cca_flag = 1;
-						odm_set_bb_reg(p_dm, 0xc6c, BIT(8) | BIT7, 2); /* USC MF */
-						if (primary_cca->dup_rts_flag == 1)
-							primary_cca->dup_rts_flag = 0;
-					} else {
-						primary_cca->intf_type = 2;
-						if (primary_cca->dup_rts_flag == 0)
-							primary_cca->dup_rts_flag = 1;
-					}
-
-				} else { /* interferecne disappear */
-					primary_cca->dup_rts_flag = 0;
-					primary_cca->intf_flag = 0;
-					primary_cca->intf_type = 0;
-				}
-			} else if (sec_ch_offset == 2) { /* secondary channel is above the primary channel */
-				if ((false_alm_cnt->cnt_ofdm_cca > 500) && (false_alm_cnt->cnt_bw_usc > false_alm_cnt->cnt_bw_lsc + 500)) {
-					if (false_alm_cnt->cnt_ofdm_fail > false_alm_cnt->cnt_ofdm_cca >> 1) {
-						primary_cca->intf_type = 1;
-						primary_cca->pri_cca_flag = 1;
-						odm_set_bb_reg(p_dm, 0xc6c, BIT(8) | BIT7, 1); /* LSC MF */
-						if (primary_cca->dup_rts_flag == 1)
-							primary_cca->dup_rts_flag = 0;
-					} else {
-						primary_cca->intf_type = 2;
-						if (primary_cca->dup_rts_flag == 0)
-							primary_cca->dup_rts_flag = 1;
-					}
-
-				} else { /* interferecne disappear */
-					primary_cca->dup_rts_flag = 0;
-					primary_cca->intf_flag = 0;
-					primary_cca->intf_type = 0;
-				}
-
-
-			}
-			primary_cca->monitor_flag = 0;
-		}
-
-		/* 1 Dynamic Primary CCA Main Function */
-		if (primary_cca->monitor_flag == 0) {
-			if (*(p_dm->p_band_width) == CHANNEL_WIDTH_40) {		/* if RFBW==40M mode which require to process primary cca */
-				/* 2 STA is NOT Connected */
-				if (!is_connected) {
-					PHYDM_DBG(p_dm, DBG_PRI_CCA, ("STA NOT Connected!!!!\n"));
-
-					if (primary_cca->pri_cca_flag == 1) {	/* reset primary cca when STA is disconnected */
-						primary_cca->pri_cca_flag = 0;
-						odm_set_bb_reg(p_dm, 0xc6c, BIT(8) | BIT(7), 0);
-					}
-					if (primary_cca->dup_rts_flag == 1)		/* reset Duplicate RTS when STA is disconnected */
-						primary_cca->dup_rts_flag = 0;
-
-					if (sec_ch_offset == 1) { /* secondary channel is below the primary channel */
-						if ((false_alm_cnt->cnt_ofdm_cca > 800) && (false_alm_cnt->cnt_bw_lsc * 5 > false_alm_cnt->cnt_bw_usc * 9)) {
-							primary_cca->intf_flag = 1;    /* secondary channel interference is detected!!! */
-							if (false_alm_cnt->cnt_ofdm_fail > false_alm_cnt->cnt_ofdm_cca >> 1)
-								primary_cca->intf_type = 1;   	/* interference is shift */
-							else
-								primary_cca->intf_type = 2;   	/* interference is in-band */
-						} else {
-							primary_cca->intf_flag = 0;
-							primary_cca->intf_type = 0;
-						}
-					} else if (sec_ch_offset == 2) { /* secondary channel is above the primary channel */
-						if ((false_alm_cnt->cnt_ofdm_cca > 800) && (false_alm_cnt->cnt_bw_usc * 5 > false_alm_cnt->cnt_bw_lsc * 9)) {
-							primary_cca->intf_flag = 1;    /* secondary channel interference is detected!!! */
-							if (false_alm_cnt->cnt_ofdm_fail > false_alm_cnt->cnt_ofdm_cca >> 1)
-								primary_cca->intf_type = 1;   	/* interference is shift */
-							else
-								primary_cca->intf_type = 2;   	/* interference is in-band */
-						} else {
-							primary_cca->intf_flag = 0;
-							primary_cca->intf_type = 0;
-						}
-					}
-					PHYDM_DBG(p_dm, DBG_PRI_CCA, ("primary_cca=%d\n", primary_cca->pri_cca_flag));
-					PHYDM_DBG(p_dm, DBG_PRI_CCA, ("Intf_Type=%d\n", primary_cca->intf_type));
-				}
-				/* 2 STA is Connected */
-				else {
-					if (client_40mhz == 0)		/* 3 */ { /* client BW = 20MHz */
-						if (primary_cca->pri_cca_flag == 0) {
-							primary_cca->pri_cca_flag = 1;
-							if (sec_ch_offset == 1)
-								odm_set_bb_reg(p_dm, 0xc6c, BIT(8) | BIT(7), 2);
-							else if (sec_ch_offset == 2)
-								odm_set_bb_reg(p_dm, 0xc6c, BIT(8) | BIT(7), 1);
-						}
-						PHYDM_DBG(p_dm, DBG_PRI_CCA, ("STA Connected 20M!!! primary_cca=%d\n", primary_cca->pri_cca_flag));
-					} else		/* 3 */ { /* client BW = 40MHz */
-						if (primary_cca->intf_flag == 1) { /* interference is detected!! */
-							if (primary_cca->intf_type == 1) {
-								if (primary_cca->pri_cca_flag != 1) {
-									primary_cca->pri_cca_flag = 1;
-									if (sec_ch_offset == 1)
-										odm_set_bb_reg(p_dm, 0xc6c, BIT(8) | BIT(7), 2);
-									else if (sec_ch_offset == 2)
-										odm_set_bb_reg(p_dm, 0xc6c, BIT(8) | BIT(7), 1);
-								}
-							} else if (primary_cca->intf_type == 2) {
-								if (primary_cca->dup_rts_flag != 1)
-									primary_cca->dup_rts_flag = 1;
-							}
-						} else { /* if intf_flag==0 */
-							if ((cur_tx_ok_cnt + cur_rx_ok_cnt) < 1) { /* idle mode or TP traffic is very low */
-								if (sec_ch_offset == 1) {
-									if ((false_alm_cnt->cnt_ofdm_cca > 800) && (false_alm_cnt->cnt_bw_lsc * 5 > false_alm_cnt->cnt_bw_usc * 9)) {
-										primary_cca->intf_flag = 1;
-										if (false_alm_cnt->cnt_ofdm_fail > false_alm_cnt->cnt_ofdm_cca >> 1)
-											primary_cca->intf_type = 1;   	/* interference is shift */
-										else
-											primary_cca->intf_type = 2;   	/* interference is in-band */
-									}
-								} else if (sec_ch_offset == 2) {
-									if ((false_alm_cnt->cnt_ofdm_cca > 800) && (false_alm_cnt->cnt_bw_usc * 5 > false_alm_cnt->cnt_bw_lsc * 9)) {
-										primary_cca->intf_flag = 1;
-										if (false_alm_cnt->cnt_ofdm_fail > false_alm_cnt->cnt_ofdm_cca >> 1)
-											primary_cca->intf_type = 1;   	/* interference is shift */
-										else
-											primary_cca->intf_type = 2;   	/* interference is in-band */
-									}
-
-								}
-							} else { /* TP Traffic is High */
-								if (sec_ch_offset == 1) {
-									if (false_alm_cnt->cnt_bw_lsc > (false_alm_cnt->cnt_bw_usc + 500)) {
-										if (delay == 0) { /* add delay to avoid interference occurring abruptly, jump one time */
-											primary_cca->intf_flag = 1;
-											if (false_alm_cnt->cnt_ofdm_fail > false_alm_cnt->cnt_ofdm_cca >> 1)
-												primary_cca->intf_type = 1;   	/* interference is shift */
-											else
-												primary_cca->intf_type = 2;   	/* interference is in-band */
-											delay = 1;
-										} else
-											delay = 0;
-									}
-								} else if (sec_ch_offset == 2) {
-									if (false_alm_cnt->cnt_bw_usc > (false_alm_cnt->cnt_bw_lsc + 500)) {
-										if (delay == 0) { /* add delay to avoid interference occurring abruptly */
-											primary_cca->intf_flag = 1;
-											if (false_alm_cnt->cnt_ofdm_fail > false_alm_cnt->cnt_ofdm_cca >> 1)
-												primary_cca->intf_type = 1;   	/* interference is shift */
-											else
-												primary_cca->intf_type = 2;   	/* interference is in-band */
-											delay = 1;
-										} else
-											delay = 0;
-									}
-								}
-							}
-						}
-						PHYDM_DBG(p_dm, DBG_PRI_CCA, ("Primary CCA=%d\n", primary_cca->pri_cca_flag));
-						PHYDM_DBG(p_dm, DBG_PRI_CCA, ("Duplicate RTS=%d\n", primary_cca->dup_rts_flag));
-					}
-
-				} /* end of connected */
-			}
-		}
-		/* 1 Dynamic Primary CCA Monitor counter */
-		if ((primary_cca->pri_cca_flag == 1) || (primary_cca->dup_rts_flag == 1)) {
-			if (client_40mhz == 0) {  /* client=20M no need to monitor primary cca flag */
-				client_40mhz_pre = client_40mhz;
-				return;
-			}
-			counter++;
-			PHYDM_DBG(p_dm, DBG_PRI_CCA, ("counter=%d\n", counter));
-			if ((counter == 30) || ((client_40mhz - client_40mhz_pre) == 1)) { /* Every 60 sec to monitor one time */
-				primary_cca->monitor_flag = 1;     /* monitor flag is triggered!!!!! */
-				if (primary_cca->pri_cca_flag == 1) {
-					primary_cca->pri_cca_flag = 0;
-					odm_set_bb_reg(p_dm, 0xc6c, BIT(8) | BIT(7), 0);
-				}
-				counter = 0;
-			}
-		}
-	}
-
-	client_40mhz_pre = client_40mhz;
+	PHYDM_DBG(dm, DBG_PRI_CCA, "[PriCCA] Reset\n");
+	pri_cca->mf_state = 0xff;
+	pri_cca->pre_bw = (enum channel_width)0xff;
+	phydm_write_dynamic_cca(dm, MF_USC_LSC);
 }
-#endif
-
-#if (RTL8192E_SUPPORT == 1)
 
-#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
-
-void
-odm_dynamic_primary_cca_mp_8192e(
-	void			*p_dm_void
-)
+void phydm_primary_cca_11n(
+	void *dm_void)
 {
-	struct PHY_DM_STRUCT		*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	struct _ADAPTER	*p_adapter = p_dm->adapter;
-	HAL_DATA_TYPE	*p_hal_data = GET_HAL_DATA(p_adapter);
-	struct phydm_fa_struct		*false_alm_cnt = &(p_dm->false_alm_cnt);
-	struct phydm_pricca_struct		*primary_cca = &(p_dm->dm_pri_cca);
-	u64			OFDM_CCA, OFDM_FA, bw_usc_cnt, bw_lsc_cnt;
-	u8			sec_ch_offset;
-	static u8		count_down = PRI_CCA_MONITOR_TIME;
-
-	if (!p_dm->is_linked)
-		return;
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct phydm_pricca_struct *pri_cca = &dm->dm_pri_cca;
+	enum channel_width curr_bw = (enum channel_width)*dm->band_width;
 
-	if (!(p_dm->support_ability & ODM_BB_PRIMARY_CCA))
+	if (!(dm->support_ability & ODM_BB_PRIMARY_CCA))
 		return;
 
-	OFDM_CCA = false_alm_cnt->cnt_ofdm_cca;
-	OFDM_FA = false_alm_cnt->cnt_ofdm_fail;
-	bw_usc_cnt = false_alm_cnt->cnt_bw_usc;
-	bw_lsc_cnt = false_alm_cnt->cnt_bw_lsc;
-	PHYDM_DBG(p_dm, DBG_PRI_CCA, ("92E: OFDM CCA=%d\n", OFDM_CCA));
-	PHYDM_DBG(p_dm, DBG_PRI_CCA, ("92E: OFDM FA=%d\n", OFDM_FA));
-	PHYDM_DBG(p_dm, DBG_PRI_CCA, ("92E: BW_USC=%d\n", bw_usc_cnt));
-	PHYDM_DBG(p_dm, DBG_PRI_CCA, ("92E: BW_LSC=%d\n", bw_lsc_cnt));
-	sec_ch_offset = *(p_dm->p_sec_ch_offset);		/* NIC: 2: sec is below,  1: sec is above */
-
-	
-	if (IsAPModeExist(p_adapter)) {
-		phydm_write_dynamic_cca(p_dm, MF_USC_LSC);
-		return;
-	}
-
-	if (*(p_dm->p_band_width) != CHANNEL_WIDTH_40)
-		return;
-
-	PHYDM_DBG(p_dm, DBG_PRI_CCA, ("92E: Cont Down= %d\n", count_down));
-	PHYDM_DBG(p_dm, DBG_PRI_CCA, ("92E: Primary_CCA_flag=%d\n", primary_cca->pri_cca_flag));
-	PHYDM_DBG(p_dm, DBG_PRI_CCA, ("92E: Intf_Type=%d\n", primary_cca->intf_type));
-	PHYDM_DBG(p_dm, DBG_PRI_CCA, ("92E: Intf_flag=%d\n", primary_cca->intf_flag));
-	PHYDM_DBG(p_dm, DBG_PRI_CCA, ("92E: Duplicate RTS Flag=%d\n", primary_cca->dup_rts_flag));
-
-	if (primary_cca->pri_cca_flag == 0) {
-
-		if (sec_ch_offset == SECOND_CH_AT_LSB) {  /* Primary channel is above   NOTE: duplicate CTS can remove this condition */
-
-			if ((OFDM_CCA > OFDMCCA_TH) && (bw_lsc_cnt > (bw_usc_cnt + bw_ind_bias))
-			    && (OFDM_FA > (OFDM_CCA >> 1))) {
-
-				primary_cca->intf_type = 1;
-				primary_cca->intf_flag = 1;
-				phydm_write_dynamic_cca(p_dm, MF_USC);
-				primary_cca->pri_cca_flag = 1;
-			} else if ((OFDM_CCA > OFDMCCA_TH) && (bw_lsc_cnt > (bw_usc_cnt + bw_ind_bias))
-				&& (OFDM_FA < (OFDM_CCA >> 1))) {
-
-				primary_cca->intf_type = 2;
-				primary_cca->intf_flag = 1;
-				phydm_write_dynamic_cca(p_dm, MF_USC);
-				primary_cca->pri_cca_flag = 1;
-				primary_cca->dup_rts_flag = 1;
-				p_hal_data->RTSEN = 1;
-			} else {
-
-				primary_cca->intf_type = 0;
-				primary_cca->intf_flag = 0;
-				phydm_write_dynamic_cca(p_dm, MF_USC_LSC);
-				p_hal_data->RTSEN = 0;
-				primary_cca->dup_rts_flag = 0;
-			}
-
-		} else if (sec_ch_offset == SECOND_CH_AT_USB) {
-
-			if ((OFDM_CCA > OFDMCCA_TH) && (bw_usc_cnt > (bw_lsc_cnt + bw_ind_bias))
-			    && (OFDM_FA > (OFDM_CCA >> 1))) {
-
-				primary_cca->intf_type = 1;
-				primary_cca->intf_flag = 1;
-				phydm_write_dynamic_cca(p_dm, MF_LSC);
-				primary_cca->pri_cca_flag = 1;
-			} else if ((OFDM_CCA > OFDMCCA_TH) && (bw_usc_cnt > (bw_lsc_cnt + bw_ind_bias))
-				&& (OFDM_FA < (OFDM_CCA >> 1))) {
-
-				primary_cca->intf_type = 2;
-				primary_cca->intf_flag = 1;
-				phydm_write_dynamic_cca(p_dm, MF_LSC);
-				primary_cca->pri_cca_flag = 1;
-				primary_cca->dup_rts_flag = 1;
-				p_hal_data->RTSEN = 1;
-			} else {
-
-				primary_cca->intf_type = 0;
-				primary_cca->intf_flag = 0;
-				phydm_write_dynamic_cca(p_dm, MF_USC_LSC);
-				p_hal_data->RTSEN = 0;
-				primary_cca->dup_rts_flag = 0;
-			}
+	if (!dm->is_linked) {
+		PHYDM_DBG(dm, DBG_PRI_CCA, "[PriCCA][No Link!!!]\n");
 
+		if (pri_cca->pri_cca_is_become_linked) {
+			phydm_primary_cca_reset(dm);
+			pri_cca->pri_cca_is_become_linked = dm->is_linked;
 		}
-
-	} else {	/* primary_cca->pri_cca_flag==1 */
-
-		count_down--;
-		if (count_down == 0) {
-			count_down = PRI_CCA_MONITOR_TIME;
-			primary_cca->pri_cca_flag = 0;
-			phydm_write_dynamic_cca(p_dm, MF_USC_LSC);   /* default */
-			p_hal_data->RTSEN = 0;
-			primary_cca->dup_rts_flag = 0;
-			primary_cca->intf_type = 0;
-			primary_cca->intf_flag = 0;
-		}
-
-	}
-}
-
-#elif (DM_ODM_SUPPORT_TYPE == ODM_AP)
-
-void
-odm_intf_detection(
-	void			*p_dm_void
-)
-{
-	struct PHY_DM_STRUCT		*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	struct phydm_fa_struct		*false_alm_cnt = &(p_dm->false_alm_cnt);
-	struct phydm_pricca_struct			*primary_cca = &(p_dm->dm_pri_cca);
-
-	if ((false_alm_cnt->cnt_ofdm_cca > OFDMCCA_TH)
-	    && (false_alm_cnt->cnt_bw_lsc > (false_alm_cnt->cnt_bw_usc + bw_ind_bias))) {
-
-		primary_cca->intf_flag = 1;
-		primary_cca->CH_offset = 1;  /* 1:LSC, 2:USC */
-		if (false_alm_cnt->cnt_ofdm_fail > (false_alm_cnt->cnt_ofdm_cca >> 1))
-			primary_cca->intf_type = 1;
-		else
-			primary_cca->intf_type = 2;
-	} else if ((false_alm_cnt->cnt_ofdm_cca > OFDMCCA_TH)
-		&& (false_alm_cnt->cnt_bw_usc > (false_alm_cnt->cnt_bw_lsc + bw_ind_bias))) {
-
-		primary_cca->intf_flag = 1;
-		primary_cca->CH_offset = 2;  /* 1:LSC, 2:USC */
-		if (false_alm_cnt->cnt_ofdm_fail > (false_alm_cnt->cnt_ofdm_cca >> 1))
-			primary_cca->intf_type = 1;
-		else
-			primary_cca->intf_type = 2;
-	} else {
-		primary_cca->intf_flag = 0;
-		primary_cca->intf_type = 0;
-		primary_cca->CH_offset = 0;
-	}
-
-}
-
-void
-odm_dynamic_primary_cca_ap_8192e(
-	void			*p_dm_void
-)
-{
-	struct PHY_DM_STRUCT		*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	struct phydm_pricca_struct		*primary_cca = &(p_dm->dm_pri_cca);
-	u8		i;
-	static u32	count_down = PRI_CCA_MONITOR_TIME;
-	u8		STA_BW = false, STA_BW_pre = false, STA_BW_TMP = false;
-	boolean		is_connected = false;
-	u8		sec_ch_offset;
-	u8		cur_mf_state;
-	struct cmn_sta_info	*p_entry;
-
-	if (!p_dm->is_linked)
 		return;
-
-	if (!(p_dm->support_ability & ODM_BB_PRIMARY_CCA))
-		return;
-
-	sec_ch_offset = *(p_dm->p_sec_ch_offset);		/* AP: 1: sec is below,  2: sec is above */
-
-	for (i = 0; i < ODM_ASSOCIATE_ENTRY_NUM; i++) {
-		p_entry = p_dm->p_phydm_sta_info[i];
-		if (is_sta_active(p_entry)) {
-
-			STA_BW_TMP = p_entry->bw_mode;
-			if (STA_BW_TMP > STA_BW)
-				STA_BW = STA_BW_TMP;
-			is_connected = true;
+	} else {
+		if (!pri_cca->pri_cca_is_become_linked) {
+			PHYDM_DBG(dm, DBG_PRI_CCA, "[PriCCA][Linked !!!]\n");
+			pri_cca->pri_cca_is_become_linked = dm->is_linked;
 		}
 	}
 
-	if (*(p_dm->p_band_width) == CHANNEL_WIDTH_40) {
-		
-		if (primary_cca->pri_cca_flag == 0) {
-			if (is_connected) {
-				if (STA_BW == CHANNEL_WIDTH_20) { /* 2 STA BW=20M */
-					primary_cca->pri_cca_flag = 1;
-					if (sec_ch_offset == 1) {
-						cur_mf_state = MF_USC;
-						phydm_write_dynamic_cca(p_dm, cur_mf_state);
-					} else if (sec_ch_offset == 2) {
-						cur_mf_state = MF_USC;
-						phydm_write_dynamic_cca(p_dm, cur_mf_state);
-					}
-				} else {     			/* 2  STA BW=40M */
-					if (primary_cca->intf_flag == 0)
-						odm_intf_detection(p_dm);
-					else {	/* intf_flag = 1 */
-						if (primary_cca->intf_type == 1) {
-							if (primary_cca->CH_offset == 1) {
-								cur_mf_state = MF_USC;
-								if (sec_ch_offset == 1)  /* AP,  1: primary is above  2: primary is below */
-									phydm_write_dynamic_cca(p_dm, cur_mf_state);
-							} else if (primary_cca->CH_offset == 2) {
-								cur_mf_state = MF_LSC;
-								if (sec_ch_offset == 2)
-									phydm_write_dynamic_cca(p_dm, cur_mf_state);
-							}
-						} else if (primary_cca->intf_type == 2)
-							PHYDM_DBG(p_dm, DBG_PRI_CCA, ("92E: primary_cca->intf_type = 2\n"));
-					}
-				}
-
-			} else		/* disconnected  interference detection */
-				odm_intf_detection(p_dm); /* end of disconnected */
+	if (curr_bw != pri_cca->pre_bw) {
+		PHYDM_DBG(dm, DBG_PRI_CCA, "[Primary CCA] start ==>\n");
+		pri_cca->pre_bw = curr_bw;
 
-
-		} else {	/* primary_cca->pri_cca_flag == 1 */
-
-			if (STA_BW == 0) {
-				STA_BW_pre = STA_BW;
-				return;
-			}
-
-			count_down--;
-			if ((count_down == 0) || ((STA_BW & STA_BW_pre) != 1)) {
-				count_down = PRI_CCA_MONITOR_TIME;
-				primary_cca->pri_cca_flag = 0;
-				primary_cca->intf_type = 0;
-				primary_cca->intf_flag = 0;
-				cur_mf_state = MF_USC_LSC;
-				phydm_write_dynamic_cca(p_dm, cur_mf_state); /* default */
+		if (curr_bw == CHANNEL_WIDTH_40) {
+			if (*dm->sec_ch_offset == SECOND_CH_AT_LSB) {
+			/* Primary CH @ upper sideband*/
+				PHYDM_DBG(dm, DBG_PRI_CCA,
+					  "BW40M, Primary CH at USB\n");
+				phydm_write_dynamic_cca(dm, MF_USC);
+			} else {
+			/*Primary CH @ lower sideband*/
+				PHYDM_DBG(dm, DBG_PRI_CCA,
+					  "BW40M, Primary CH at LSB\n");
+				phydm_write_dynamic_cca(dm, MF_LSC);
 			}
+		} else {
+			PHYDM_DBG(dm, DBG_PRI_CCA, "Not BW40M, USB + LSB\n");
+			phydm_primary_cca_reset(dm);
 		}
-		STA_BW_pre = STA_BW;
-
-	} else {
-		/* 2 Reset */
-		phydm_primary_cca_init(p_dm);
-		cur_mf_state = MF_USC_LSC;
-		phydm_write_dynamic_cca(p_dm, cur_mf_state);
-		count_down = PRI_CCA_MONITOR_TIME;
 	}
-
 }
-#endif
-
-
-#endif /* RTL8192E_SUPPORT == 1 */
-#endif
-
-
-#endif
 
 boolean
-odm_dynamic_primary_cca_dup_rts(
-	void			*p_dm_void
-)
+odm_dynamic_primary_cca_dup_rts(void *dm_void)
 {
-#ifdef PHYDM_PRIMARY_CCA
-	struct PHY_DM_STRUCT		*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	struct phydm_pricca_struct		*primary_cca = &(p_dm->dm_pri_cca);
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct phydm_pricca_struct *pri_cca = &dm->dm_pri_cca;
 
-	return	primary_cca->dup_rts_flag;
-#else
-	return	0;	
-#endif
+	return pri_cca->dup_rts_flag;
 }
 
-void
-phydm_primary_cca_init(
-	void			*p_dm_void
-)
+void phydm_primary_cca_init(void *dm_void)
 {
-#ifdef PHYDM_PRIMARY_CCA
-	struct PHY_DM_STRUCT		*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	struct phydm_pricca_struct		*primary_cca = &(p_dm->dm_pri_cca);
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct phydm_pricca_struct *pri_cca = &dm->dm_pri_cca;
+
+	if (!(dm->support_ability & ODM_BB_PRIMARY_CCA))
+		return;
 
-	if (!(p_dm->support_ability & ODM_BB_PRIMARY_CCA))
+	if (!(dm->support_ic_type & ODM_IC_11N_SERIES))
 		return;
 
-	PHYDM_DBG(p_dm, DBG_PRI_CCA, ("[PriCCA] Init ==>\n"));
-	#if (RTL8188E_SUPPORT == 1) || (RTL8192E_SUPPORT == 1)
-	primary_cca->dup_rts_flag = 0;
-	primary_cca->intf_flag = 0;
-	primary_cca->intf_type = 0;
-	primary_cca->monitor_flag = 0;
-	primary_cca->pri_cca_flag = 0;
-	primary_cca->ch_offset = 0;
-	#endif
-	primary_cca->mf_state = 0xff;
-	primary_cca->pre_bw = (enum channel_width)0xff;
-	
-	if (p_dm->support_ic_type & ODM_IC_11N_SERIES)
-		primary_cca->cca_th_40m_bkp = (u8)odm_get_bb_reg(p_dm, 0xc84, 0xf0000000);
+	PHYDM_DBG(dm, DBG_PRI_CCA, "[PriCCA] Init ==>\n");
+#if (RTL8188E_SUPPORT == 1) || (RTL8192E_SUPPORT == 1)
+	pri_cca->dup_rts_flag = 0;
+	pri_cca->intf_flag = 0;
+	pri_cca->intf_type = 0;
+	pri_cca->monitor_flag = 0;
+	pri_cca->pri_cca_flag = 0;
+	pri_cca->ch_offset = 0;
 #endif
+	pri_cca->mf_state = 0xff;
+	pri_cca->pre_bw = (enum channel_width)0xff;
+	pri_cca->cca_th_40m_bkp = (u8)odm_get_bb_reg(dm, R_0xc84, 0xf0000000);
 }
 
-void
-phydm_primary_cca(
-	void			*p_dm_void
-)
+void phydm_primary_cca(void *dm_void)
 {
 #ifdef PHYDM_PRIMARY_CCA
-	struct PHY_DM_STRUCT		*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
 
-	if (!(p_dm->support_ic_type & ODM_IC_11N_SERIES))
+	if (!(dm->support_ic_type & ODM_IC_11N_SERIES))
 		return;
 
-	if (!(p_dm->support_ability & ODM_BB_PRIMARY_CCA))
+	if (!(dm->support_ability & ODM_BB_PRIMARY_CCA))
 		return;
 
-	phydm_primary_cca_11n(p_dm);
+	phydm_primary_cca_11n(dm);
 
 #endif
 }
-
-
+#endif
diff --git a/rtl8723DS/hal/phydm/phydm_primary_cca.h b/rtl8723DS/hal/phydm/phydm_primary_cca.h
index 6d41eec..9a64750 100755..100644
--- a/rtl8723DS/hal/phydm/phydm_primary_cca.h
+++ b/rtl8723DS/hal/phydm/phydm_primary_cca.h
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2007 - 2017 Realtek Corporation.
+ * Copyright(c) 2007 - 2017  Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -8,48 +8,56 @@
  *
  * This program is distributed in the hope that it will be useful, but WITHOUT
  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  * more details.
  *
+ * The full GNU General Public License is included in this distribution in the
+ * file called LICENSE.
+ *
+ * Contact Information:
+ * wlanfae <wlanfae@realtek.com>
+ * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
+ * Hsinchu 300, Taiwan.
+ *
+ * Larry Finger <Larry.Finger@lwfinger.net>
+ *
  *****************************************************************************/
 
-#ifndef	__PHYDM_PRIMARYCCA_H__
-#define	__PHYDM_PRIMARYCCA_H__
+#ifndef __PHYDM_PRIMARYCCA_H__
+#define __PHYDM_PRIMARYCCA_H__
 
-#define PRIMARYCCA_VERSION	"1.0"  /*2017.03.23, Dino*/
+#ifdef PHYDM_PRIMARY_CCA
+#define PRIMARYCCA_VERSION "2.0"
 
-/*============================================================*/
-/*Definition */
-/*============================================================*/
+/*@============================================================*/
+/*@Definition */
+/*@============================================================*/
 
 #if (DM_ODM_SUPPORT_TYPE == ODM_CE)
-#define	SECOND_CH_AT_LSB	2	/*primary CH @ MSB,  SD4: HAL_PRIME_CHNL_OFFSET_UPPER*/
-#define	SECOND_CH_AT_USB	1	/*primary CH @ LSB,   SD4: HAL_PRIME_CHNL_OFFSET_LOWER*/
+#define	SECOND_CH_AT_LSB	2	/*@primary CH @ MSB,  SD4: HAL_PRIME_CHNL_OFFSET_UPPER*/
+#define	SECOND_CH_AT_USB	1	/*@primary CH @ LSB,   SD4: HAL_PRIME_CHNL_OFFSET_LOWER*/
 #elif (DM_ODM_SUPPORT_TYPE == ODM_WIN)
-#define	SECOND_CH_AT_LSB	2	/*primary CH @ MSB,  SD7: HAL_PRIME_CHNL_OFFSET_UPPER*/
-#define	SECOND_CH_AT_USB	1	/*primary CH @ LSB,   SD7: HAL_PRIME_CHNL_OFFSET_LOWER*/
+#define	SECOND_CH_AT_LSB	2	/*@primary CH @ MSB,  SD7: HAL_PRIME_CHNL_OFFSET_UPPER*/
+#define	SECOND_CH_AT_USB	1	/*@primary CH @ LSB,   SD7: HAL_PRIME_CHNL_OFFSET_LOWER*/
 #else /*if (DM_ODM_SUPPORT_TYPE == ODM_AP)*/
-#define	SECOND_CH_AT_LSB	1	/*primary CH @ MSB,  SD8: HT_2NDCH_OFFSET_BELOW*/
-#define	SECOND_CH_AT_USB	2	/*primary CH @ LSB,   SD8: HT_2NDCH_OFFSET_ABOVE*/
+#define	SECOND_CH_AT_LSB	1	/*@primary CH @ MSB,  SD8: HT_2NDCH_OFFSET_BELOW*/
+#define	SECOND_CH_AT_USB	2	/*@primary CH @ LSB,   SD8: HT_2NDCH_OFFSET_ABOVE*/
 #endif
 
-#define	OFDMCCA_TH	500
+#define	OFDMCCA_TH		500
 #define	bw_ind_bias		500
 #define	PRI_CCA_MONITOR_TIME	30
 
-#ifdef PHYDM_PRIMARY_CCA
-
-/*============================================================*/
+/*@============================================================*/
 /*structure and define*/
-/*============================================================*/
-enum	primary_cca_ch_position {  /*N-series REG0xc6c[8:7]*/
-	MF_USC_LSC = 0,
-	MF_LSC = 1,
-	MF_USC = 2
+/*@============================================================*/
+enum primary_cca_ch_position { /*N-series REG0xc6c[8:7]*/
+	MF_USC_LSC	= 0,
+	MF_LSC		= 1,
+	MF_USC		= 2
 };
 
 struct phydm_pricca_struct {
-
 	#if (RTL8188E_SUPPORT == 1) || (RTL8192E_SUPPORT == 1)
 	u8	pri_cca_flag;
 	u8	intf_flag;
@@ -58,60 +66,22 @@ struct phydm_pricca_struct {
 	u8	ch_offset;
 	#endif
 	u8	dup_rts_flag;
-	u8	cca_th_40m_bkp; /*c84[31:28]*/
+	u8	cca_th_40m_bkp; /*@c84[31:28]*/
 	enum channel_width	pre_bw;
 	u8	pri_cca_is_become_linked;
 	u8	mf_state;
 };
 
-/*============================================================*/
-/*function prototype*/
-/*============================================================*/
-
-#if 0
-#if (RTL8192E_SUPPORT == 1)
-#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
-
-void
-odm_dynamic_primary_cca_mp_8192e(
-	void			*p_dm_void
-);
-
-#elif (DM_ODM_SUPPORT_TYPE == ODM_AP)
-
-void
-odm_dynamic_primary_cca_ap_8192e(
-	void			*p_dm_void
-);
-#endif
-#endif
-
-#if (RTL8188E_SUPPORT == 1)
-
-void
-odm_dynamic_primary_cca_8188e(
-	void			*p_dm_void
-);
-#endif
-#endif
-
-#endif /*#ifdef PHYDM_PRIMARY_CCA*/
-
-
-boolean
-odm_dynamic_primary_cca_dup_rts(
-	void			*p_dm_void
-);
+/*@============================================================*/
+/*@function prototype*/
+/*@============================================================*/
+void phydm_write_dynamic_cca(void *dm_void, u8 curr_mf_state);
 
-void
-phydm_primary_cca_init(
-	void			*p_dm_void
-);
+boolean odm_dynamic_primary_cca_dup_rts(void *dm_void);
 
-void
-phydm_primary_cca(
-	void			*p_dm_void
-);
+void phydm_primary_cca_init(void *dm_void);
 
+void phydm_primary_cca(void *dm_void);
+#endif /*@#ifdef PHYDM_PRIMARY_CCA*/
+#endif /*@#ifndef	__PHYDM_PRIMARYCCA_H__*/
 
-#endif /*#ifndef	__PHYDM_PRIMARYCCA_H__*/
diff --git a/rtl8723DS/hal/phydm/phydm_psd.c b/rtl8723DS/hal/phydm/phydm_psd.c
index 7ff50f2..458677b 100755..100644
--- a/rtl8723DS/hal/phydm/phydm_psd.c
+++ b/rtl8723DS/hal/phydm/phydm_psd.c
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2007 - 2017 Realtek Corporation.
+ * Copyright(c) 2007 - 2017  Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -8,243 +8,295 @@
  *
  * This program is distributed in the hope that it will be useful, but WITHOUT
  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  * more details.
  *
+ * The full GNU General Public License is included in this distribution in the
+ * file called LICENSE.
+ *
+ * Contact Information:
+ * wlanfae <wlanfae@realtek.com>
+ * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
+ * Hsinchu 300, Taiwan.
+ *
+ * Larry Finger <Larry.Finger@lwfinger.net>
+ *
  *****************************************************************************/
 
-//============================================================
-// include files
-//============================================================
+/******************************************************************************
+ * include files
+ *****************************************************************************/
 #include "mp_precomp.h"
 #include "phydm_precomp.h"
 
 #ifdef CONFIG_PSD_TOOL
-
-u32
-phydm_get_psd_data(
-	void			*p_dm_void,
-	u32			psd_tone_idx,
-	u32			igi
-	)
+u32 phydm_get_psd_data(void *dm_void, u32 psd_tone_idx, u32 igi)
 {
-	struct	PHY_DM_STRUCT	*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	struct	_PHYDM_PSD_	*p_dm_psd_table = &(p_dm->dm_psd_table);
-	u32		psd_report = 0;
-	
-	odm_set_bb_reg(p_dm, p_dm_psd_table->psd_reg, 0x3ff, psd_tone_idx);
-	
-	odm_set_bb_reg(p_dm, p_dm_psd_table->psd_reg, BIT(22), 1); /*PSD trigger start*/
-	ODM_delay_us(10);
-	odm_set_bb_reg(p_dm, p_dm_psd_table->psd_reg, BIT(22), 0); /*PSD trigger stop*/
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct psd_info *dm_psd_table = &dm->dm_psd_table;
+	u32 psd_report = 0;
+
+	if (dm->support_ic_type & ODM_IC_JGR3_SERIES) {
+		odm_set_bb_reg(dm, R_0x1e8c, 0x3ff, psd_tone_idx & 0x3ff);
+		odm_set_bb_reg(dm, R_0x1e88, BIT(27) | BIT(26),
+			       psd_tone_idx >> 10);
+		/*PSD trigger start*/
+		odm_set_bb_reg(dm, dm_psd_table->psd_reg, BIT(18), 1);
+		ODM_delay_us(10);
+		/*PSD trigger stop*/
+		odm_set_bb_reg(dm, dm_psd_table->psd_reg, BIT(18), 0);
+	} else if (dm->support_ic_type == ODM_RTL8721D) {
+		odm_set_bb_reg(dm, dm_psd_table->psd_reg, 0xfff, psd_tone_idx);
+		odm_set_bb_reg(dm, dm_psd_table->psd_reg, BIT(28), 1);
+		/*PSD trigger start*/
+		ODM_delay_us(10);
+		odm_set_bb_reg(dm, dm_psd_table->psd_reg, BIT(28), 0);
+		/*PSD trigger stop*/
+
+		psd_report = odm_get_bb_reg(dm, dm_psd_table->psd_report_reg,
+					    0xffffff);
+		psd_report = psd_report >> 5;
+	} else {
+		odm_set_bb_reg(dm, dm_psd_table->psd_reg, 0x3ff, psd_tone_idx);
+		/*PSD trigger start*/
+		odm_set_bb_reg(dm, dm_psd_table->psd_reg, BIT(22), 1);
+		ODM_delay_us(10);
+		/*PSD trigger stop*/
+		odm_set_bb_reg(dm, dm_psd_table->psd_reg, BIT(22), 0);
+	}
 
-	psd_report = odm_get_bb_reg(p_dm, p_dm_psd_table->psd_report_reg, 0xffff);
-	psd_report = odm_convert_to_db(psd_report) + igi;
+	if (dm->support_ic_type & ODM_RTL8821C) {
+		psd_report = odm_get_bb_reg(dm, dm_psd_table->psd_report_reg,
+					    0xffffff);
+		psd_report = psd_report >> 5;
+	} else if (dm->support_ic_type & ODM_IC_JGR3_SERIES) {
+		psd_report = odm_get_bb_reg(dm, dm_psd_table->psd_report_reg,
+					    0xffffff);
+	} else {
+		psd_report = odm_get_bb_reg(dm, dm_psd_table->psd_report_reg,
+					    0xffff);
+	}
+	psd_report = odm_convert_to_db((u64)psd_report) + igi;
 
 	return psd_report;
 }
 
-u8		psd_result_cali_tone_8821[7]= {21, 28, 33, 93, 98, 105, 127};
-u8		psd_result_cali_val_8821[7] = {67,69,71,72,71,69,67};	
+u8 psd_result_cali_tone_8821[7] = {21, 28, 33, 93, 98, 105, 127};
+u8 psd_result_cali_val_8821[7] = {67, 69, 71, 72, 71, 69, 67};
 
-void
-phydm_psd(
-	void		*p_dm_void,
-	u32		igi,
-	u16		start_point,
-	u16		stop_point
-	)
+u8 phydm_psd(void *dm_void, u32 igi, u16 start_point, u16 stop_point)
 {
-	struct	PHY_DM_STRUCT	*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	struct	_PHYDM_PSD_	*p_dm_psd_table = &(p_dm->dm_psd_table);
-	u32		i = 0, mod_tone_idx;
-	u32		t = 0;
-	u16		fft_max_half_bw;
-	u32		psd_igi_a_reg;
-	u32		psd_igi_b_reg;
-	u16		psd_fc_channel = p_dm_psd_table->psd_fc_channel;
-	u8		ag_rf_mode_reg = 0;
-	u8		rf_reg18_9_8 = 0;
-	u32		psd_result_tmp = 0;
-	u8		psd_result = 0;
-	u8		psd_result_cali_tone[7] = {0};
-	u8		psd_result_cali_val[7] = {0};
-	u8		noise_table_idx = 0;
-	u8		set_result;
-
-	if (p_dm->support_ic_type == ODM_RTL8821) {
-		odm_move_memory(p_dm, psd_result_cali_tone, psd_result_cali_tone_8821, 7);
-		odm_move_memory(p_dm, psd_result_cali_val, psd_result_cali_val_8821, 7);
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct psd_info *dm_psd_table = &dm->dm_psd_table;
+	u32 i = 0, mod_tone_idx = 0;
+	u32 t = 0;
+	u16 fft_max_half_bw = 0;
+	u16 psd_fc_channel = dm_psd_table->psd_fc_channel;
+	u8 ag_rf_mode_reg = 0;
+	u8 is_5G = 0;
+	u32 psd_result_tmp = 0;
+	u8 psd_result = 0;
+	u8 psd_result_cali_tone[7] = {0};
+	u8 psd_result_cali_val[7] = {0};
+	u8 noise_idx = 0;
+	u8 set_result = 0;
+	u32 igi_tmp = 0x6e;
+
+	if (dm->support_ic_type == ODM_RTL8821) {
+		odm_move_memory(dm, psd_result_cali_tone,
+				psd_result_cali_tone_8821, 7);
+		odm_move_memory(dm, psd_result_cali_val,
+				psd_result_cali_val_8821, 7);
 	}
-	
-	p_dm_psd_table->psd_in_progress = 1;
-
-	/*[Stop DIG]*/
-	p_dm->support_ability &= ~(ODM_BB_DIG);
-	p_dm->support_ability &= ~(ODM_BB_FA_CNT);
 
+	dm_psd_table->psd_in_progress = 1;
 
+	PHYDM_DBG(dm, ODM_COMP_API, "PSD Start =>\n");
 
-	PHYDM_DBG(p_dm, ODM_COMP_API, ("PSD Start =>\n"));
-
-	if (p_dm->support_ic_type & ODM_IC_11AC_SERIES) {
-		psd_igi_a_reg = 0xc50;
-		psd_igi_b_reg = 0xe50;
-	} else {
-		psd_igi_a_reg = 0xc50;
-		psd_igi_b_reg = 0xc58;
+	/* @[Stop DIG]*/
+	/* @IGI target at 0dBm & make it can't CCA*/
+	if (phydm_pause_func(dm, F00_DIG, PHYDM_PAUSE, PHYDM_PAUSE_LEVEL_3, 1,
+			     &igi_tmp) == PAUSE_FAIL) {
+		return PHYDM_SET_FAIL;
 	}
-	
-	/*[back up IGI]*/
-	p_dm_psd_table->initial_gain_backup = odm_get_bb_reg(p_dm, psd_igi_a_reg, 0xff);
-	odm_set_bb_reg(p_dm, psd_igi_a_reg, 0xff, 0x6e); /*IGI target at 0dBm & make it can't CCA*/
-	odm_set_bb_reg(p_dm, psd_igi_b_reg, 0xff, 0x6e); /*IGI target at 0dBm & make it can't CCA*/
+
 	ODM_delay_us(10);
-	
-	if (phydm_stop_ic_trx(p_dm, PHYDM_SET) == PHYDM_SET_FAIL) {
-		PHYDM_DBG(p_dm, ODM_COMP_API, ("STOP_TRX_FAIL\n"));
-		return;
+
+	if (phydm_stop_ic_trx(dm, PHYDM_SET) == PHYDM_SET_FAIL) {
+		phydm_pause_func(dm, F00_DIG, PHYDM_RESUME, PHYDM_PAUSE_LEVEL_3,
+				 1, &igi_tmp);
+		return PHYDM_SET_FAIL;
 	}
 
-	/*[Set IGI]*/
-	odm_set_bb_reg(p_dm, psd_igi_a_reg, 0xff, igi);
-	odm_set_bb_reg(p_dm, psd_igi_b_reg, 0xff, igi);
-	
-	/*[Backup RF Reg]*/
-	p_dm_psd_table->rf_0x18_bkp = odm_get_rf_reg(p_dm, RF_PATH_A, 0x18, RFREGOFFSETMASK);
-	p_dm_psd_table->rf_0x18_bkp_b = odm_get_rf_reg(p_dm, RF_PATH_B, 0x18, RFREGOFFSETMASK);
+	/* @[Set IGI]*/
+	phydm_write_dig_reg(dm, (u8)igi);
+
+	/* @[Backup RF Reg]*/
+	dm_psd_table->rf_0x18_bkp = odm_get_rf_reg(dm, RF_PATH_A, RF_0x18,
+						   RFREG_MASK);
+	dm_psd_table->rf_0x18_bkp_b = odm_get_rf_reg(dm, RF_PATH_B, RF_0x18,
+						     RFREG_MASK);
 
 	if (psd_fc_channel > 14) {
-		
-		rf_reg18_9_8 = 1;
-		
-		if (36 <= psd_fc_channel && psd_fc_channel <= 64) 
-			ag_rf_mode_reg = 0x1;
-		else if (100 <= psd_fc_channel && psd_fc_channel <= 140) 
-			ag_rf_mode_reg = 0x3; 
-		else if (140 < psd_fc_channel) 
-			ag_rf_mode_reg = 0x5; 
+		is_5G = 1;
+		if (dm->support_ic_type & (ODM_RTL8822C | ODM_RTL8812F)) {
+			if (psd_fc_channel < 80)
+				ag_rf_mode_reg = 0x1;
+			else if (psd_fc_channel >= 80 && psd_fc_channel <= 140)
+				ag_rf_mode_reg = 0x3;
+			else if (psd_fc_channel > 140)
+				ag_rf_mode_reg = 0x5;
+		} else if (dm->support_ic_type == ODM_RTL8721D) {
+			if (psd_fc_channel >= 36 && psd_fc_channel <= 64)
+				ag_rf_mode_reg = 0x1;
+			else if (psd_fc_channel >= 100 && psd_fc_channel <= 140)
+				ag_rf_mode_reg = 0x5;
+			else if (psd_fc_channel > 140)
+				ag_rf_mode_reg = 0x9;
+		} else {
+			if (psd_fc_channel >= 36 && psd_fc_channel <= 64)
+				ag_rf_mode_reg = 0x1;
+			else if (psd_fc_channel >= 100 && psd_fc_channel <= 140)
+				ag_rf_mode_reg = 0x3;
+			else if (psd_fc_channel > 140)
+				ag_rf_mode_reg = 0x5;
+		}
+	}
+
+	/* Set RF fc*/
+	odm_set_rf_reg(dm, RF_PATH_A, RF_0x18, 0xff, psd_fc_channel);
+	odm_set_rf_reg(dm, RF_PATH_B, RF_0x18, 0xff, psd_fc_channel);
+	odm_set_rf_reg(dm, RF_PATH_A, RF_0x18, 0x300, is_5G);
+	odm_set_rf_reg(dm, RF_PATH_B, RF_0x18, 0x300, is_5G);
+	if (dm->support_ic_type & (ODM_RTL8822C | ODM_RTL8812F)) {
+		/* @2b'11: 20MHz, 2b'10: 40MHz, 2b'01: 80MHz */
+		odm_set_rf_reg(dm, RF_PATH_A, RF_0x18, 0x3000,
+			       dm_psd_table->psd_bw_rf_reg);
+		odm_set_rf_reg(dm, RF_PATH_B, RF_0x18, 0x3000,
+			       dm_psd_table->psd_bw_rf_reg);
+		/* Set RF ag fc mode*/
+		odm_set_rf_reg(dm, RF_PATH_A, RF_0x18, 0x70000,
+			       ag_rf_mode_reg);
+		odm_set_rf_reg(dm, RF_PATH_B, RF_0x18, 0x70000,
+			       ag_rf_mode_reg);
+	} else {
+		/* @2b'11: 20MHz, 2b'10: 40MHz, 2b'01: 80MHz */
+		if (dm->support_ic_type == ODM_RTL8721D) {
+			odm_set_rf_reg(dm, RF_PATH_A, RF_0x18, 0x1c00,
+				       dm_psd_table->psd_bw_rf_reg);
+		} else {
+			odm_set_rf_reg(dm, RF_PATH_A, RF_0x18, 0xc00,
+				       dm_psd_table->psd_bw_rf_reg);
+		}
+			odm_set_rf_reg(dm, RF_PATH_B, RF_0x18, 0xc00,
+				       dm_psd_table->psd_bw_rf_reg);
+			/* Set RF ag fc mode*/
+			odm_set_rf_reg(dm, RF_PATH_A, RF_0x18, 0xf0000,
+				       ag_rf_mode_reg);
+			odm_set_rf_reg(dm, RF_PATH_B, RF_0x18, 0xf0000,
+				       ag_rf_mode_reg);
 	}
+	if (dm->support_ic_type & ODM_IC_JGR3_SERIES)
+		PHYDM_DBG(dm, ODM_COMP_API, "0x1d70=((0x%x))\n",
+			  odm_get_bb_reg(dm, R_0x1d70, MASKDWORD));
+	else
+		PHYDM_DBG(dm, ODM_COMP_API, "0xc50=((0x%x))\n",
+			  odm_get_bb_reg(dm, R_0xc50, MASKDWORD));
+
+	PHYDM_DBG(dm, ODM_COMP_API, "RF0x18=((0x%x))\n",
+		  odm_get_rf_reg(dm, RF_PATH_A, RF_0x18, RFREG_MASK));
+
+	/* @[Stop 3-wires]*/
+	phydm_stop_3_wire(dm, PHYDM_SET);
 
-	/* RF path-a */
-	odm_set_rf_reg(p_dm, RF_PATH_A, 0x18, 0xff, psd_fc_channel);     /* Set RF fc*/
-	odm_set_rf_reg(p_dm, RF_PATH_A, 0x18, 0x300, rf_reg18_9_8);
-	odm_set_rf_reg(p_dm, RF_PATH_A, 0x18, 0xc00, p_dm_psd_table->psd_bw_rf_reg);     /*2b'11: 20MHz, 2b'10: 40MHz, 2b'01: 80MHz */
-	odm_set_rf_reg(p_dm, RF_PATH_A, 0x18, 0xf0000, ag_rf_mode_reg);     /* Set RF ag fc mode*/
-
-	/* RF path-b */
-	odm_set_rf_reg(p_dm, RF_PATH_B, 0x18, 0xff, psd_fc_channel);     /* Set RF fc*/
-	odm_set_rf_reg(p_dm, RF_PATH_B, 0x18, 0x300, rf_reg18_9_8);
-	odm_set_rf_reg(p_dm, RF_PATH_B, 0x18, 0xc00, p_dm_psd_table->psd_bw_rf_reg);     /*2b'11: 20MHz, 2b'10: 40MHz, 2b'01: 80MHz */
-	odm_set_rf_reg(p_dm, RF_PATH_B, 0x18, 0xf0000, ag_rf_mode_reg);     /* Set RF ag fc mode*/
-
-	PHYDM_DBG(p_dm, ODM_COMP_API, ("0xc50=((0x%x))\n", odm_get_bb_reg(p_dm, 0xc50, MASKDWORD)));
-	/*PHYDM_DBG(p_dm, ODM_COMP_API, ("RF0x0=((0x%x))\n", odm_get_rf_reg(p_dm, RF_PATH_A, 0x0, RFREGOFFSETMASK)));*/
-	PHYDM_DBG(p_dm, ODM_COMP_API, ("RF0x18=((0x%x))\n", odm_get_rf_reg(p_dm, RF_PATH_A, 0x18, RFREGOFFSETMASK)));
-	
-	/*[Stop 3-wires]*/
-	phydm_stop_3_wire(p_dm, PHYDM_SET);
-	
 	ODM_delay_us(10);
 
-	if (stop_point > (p_dm_psd_table->fft_smp_point-1))
-		stop_point = (p_dm_psd_table->fft_smp_point-1);	
+	if (stop_point > (dm_psd_table->fft_smp_point - 1))
+		stop_point = (dm_psd_table->fft_smp_point - 1);
 
-	if (start_point > (p_dm_psd_table->fft_smp_point-1))
-		start_point = (p_dm_psd_table->fft_smp_point-1);
+	if (start_point > (dm_psd_table->fft_smp_point - 1))
+		start_point = (dm_psd_table->fft_smp_point - 1);
 
 	if (start_point > stop_point)
 		stop_point = start_point;
 
+	for (i = start_point; i <= stop_point; i++) {
+		fft_max_half_bw = (dm_psd_table->fft_smp_point) >> 1;
 
-	for (i = start_point; i <= stop_point; i++ ) {
-
-		fft_max_half_bw = (p_dm_psd_table->fft_smp_point)>>1;
-
-		if (i < fft_max_half_bw) {
+		if (i < fft_max_half_bw)
 			mod_tone_idx = i + fft_max_half_bw;
-		} else {
+		else
 			mod_tone_idx = i - fft_max_half_bw;
-		}
-		
-		psd_result_tmp = 0;
-		for (t = 0; t < p_dm_psd_table->sw_avg_time; t++) {
-			psd_result_tmp += phydm_get_psd_data(p_dm, mod_tone_idx, igi);
-			/**/
-		}
-		psd_result = (u8)((psd_result_tmp/p_dm_psd_table->sw_avg_time)) - p_dm_psd_table->psd_pwr_common_offset;
-
-		if( p_dm_psd_table->fft_smp_point == 128 && (p_dm_psd_table->noise_k_en)) {
-
-			if (i > psd_result_cali_tone[noise_table_idx]) {
-				noise_table_idx ++;
-			}
 
-			if (noise_table_idx > 6)
-				noise_table_idx = 6;
-
-			if (psd_result >= psd_result_cali_val[noise_table_idx])
-				psd_result = psd_result - psd_result_cali_val[noise_table_idx];
+		psd_result_tmp = 0;
+		for (t = 0; t < dm_psd_table->sw_avg_time; t++)
+			psd_result_tmp += phydm_get_psd_data(dm, mod_tone_idx,
+							     igi);
+		psd_result =
+			(u8)((psd_result_tmp / dm_psd_table->sw_avg_time)) -
+			dm_psd_table->psd_pwr_common_offset;
+
+		if (dm_psd_table->fft_smp_point == 128 &&
+		    dm_psd_table->noise_k_en) {
+			if (i > psd_result_cali_tone[noise_idx])
+				noise_idx++;
+
+			if (noise_idx > 6)
+				noise_idx = 6;
+
+			if (psd_result >= psd_result_cali_val[noise_idx])
+				psd_result = psd_result -
+					     psd_result_cali_val[noise_idx];
 			else
 				psd_result = 0;
-			
 
-			p_dm_psd_table->psd_result[i] = psd_result;
+			dm_psd_table->psd_result[i] = psd_result;
 		}
-		
-		PHYDM_DBG(p_dm, ODM_COMP_API, ("[%d] N_cali = %d, PSD = %d\n", mod_tone_idx, psd_result_cali_val[noise_table_idx],  psd_result));
 
+		PHYDM_DBG(dm, ODM_COMP_API, "[%d] N_cali = %d, PSD = %d\n",
+			  mod_tone_idx, psd_result_cali_val[noise_idx],
+			  psd_result);
 	}
 
-	/*[Start 3-wires]*/
-	phydm_stop_3_wire(p_dm, PHYDM_REVERT);
-	
+	/*@[Start 3-wires]*/
+	phydm_stop_3_wire(dm, PHYDM_REVERT);
+
 	ODM_delay_us(10);
 
-	/*[Revert Reg]*/
-	set_result = phydm_stop_ic_trx(p_dm, PHYDM_REVERT);
-	
-	odm_set_bb_reg(p_dm, psd_igi_a_reg, 0xff, p_dm_psd_table->initial_gain_backup);
-	odm_set_bb_reg(p_dm, psd_igi_b_reg, 0xff, p_dm_psd_table->initial_gain_backup);
-	
-	odm_set_rf_reg(p_dm, RF_PATH_A, 0x18, RFREGOFFSETMASK, p_dm_psd_table->rf_0x18_bkp);
-	odm_set_rf_reg(p_dm, RF_PATH_B, 0x18, RFREGOFFSETMASK, p_dm_psd_table->rf_0x18_bkp_b);
-	
-	PHYDM_DBG(p_dm, ODM_COMP_API, ("PSD finished\n\n"));
-	
-	p_dm->support_ability |= ODM_BB_DIG;
-	p_dm->support_ability |= ODM_BB_FA_CNT;
-	p_dm_psd_table->psd_in_progress = 0;
-	
+	/*@[Revert Reg]*/
+	set_result = phydm_stop_ic_trx(dm, PHYDM_REVERT);
+
+	odm_set_rf_reg(dm, RF_PATH_A, RF_0x18, RFREG_MASK,
+		       dm_psd_table->rf_0x18_bkp);
+	odm_set_rf_reg(dm, RF_PATH_B, RF_0x18, RFREG_MASK,
+		       dm_psd_table->rf_0x18_bkp_b);
 
+	PHYDM_DBG(dm, ODM_COMP_API, "PSD finished\n\n");
+
+	phydm_pause_func(dm, F00_DIG, PHYDM_RESUME, PHYDM_PAUSE_LEVEL_3, 1,
+			 &igi_tmp);
+	dm_psd_table->psd_in_progress = 0;
+
+	return PHYDM_SET_SUCCESS;
 }
 
-void
-phydm_psd_para_setting(
-	void		*p_dm_void,
-	u8		sw_avg_time,
-	u8		hw_avg_time,	
-	u8		i_q_setting,
-	u16		fft_smp_point,
-	u8		ant_sel,
-	u8		psd_input,
-	u8		channel,
-	u8		noise_k_en
-	)
+void phydm_psd_para_setting(void *dm_void, u8 sw_avg_time, u8 hw_avg_time,
+			    u8 i_q_setting, u16 fft_smp_point, u8 ant_sel,
+			    u8 psd_input, u8 channel, u8 noise_k_en)
 {
-	struct	PHY_DM_STRUCT	*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	struct	_PHYDM_PSD_	*p_dm_psd_table = &(p_dm->dm_psd_table);
-	u8		fft_smp_point_idx = 0;
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct psd_info *dm_psd_table = &dm->dm_psd_table;
+	u8 fft_smp_point_idx = 0;
 
-	p_dm_psd_table->fft_smp_point = fft_smp_point;
+	dm_psd_table->fft_smp_point = fft_smp_point;
 
 	if (sw_avg_time == 0)
 		sw_avg_time = 1;
-	
-	p_dm_psd_table->sw_avg_time = sw_avg_time;
-	p_dm_psd_table->psd_fc_channel = channel;
-	p_dm_psd_table->noise_k_en = noise_k_en;
-		
+
+	dm_psd_table->sw_avg_time = sw_avg_time;
+	dm_psd_table->psd_fc_channel = channel;
+	dm_psd_table->noise_k_en = noise_k_en;
+
 	if (fft_smp_point == 128)
 		fft_smp_point_idx = 0;
 	else if (fft_smp_point == 256)
@@ -253,141 +305,155 @@ phydm_psd_para_setting(
 		fft_smp_point_idx = 2;
 	else if (fft_smp_point == 1024)
 		fft_smp_point_idx = 3;
-		
-	if (p_dm->support_ic_type & ODM_IC_11AC_SERIES) {
-		
-		odm_set_bb_reg(p_dm, 0x910, BIT(11) | BIT(10), i_q_setting);
-		odm_set_bb_reg(p_dm, 0x910, BIT(13) | BIT(12), hw_avg_time);
-		odm_set_bb_reg(p_dm, 0x910, BIT(15) | BIT(14), fft_smp_point_idx);
-		odm_set_bb_reg(p_dm, 0x910, BIT(17) | BIT(16), ant_sel);
-		odm_set_bb_reg(p_dm, 0x910, BIT(23), psd_input);
 
-	} else {
+	if (dm->support_ic_type & ODM_IC_JGR3_SERIES) {
+		odm_set_bb_reg(dm, R_0x1e8c, BIT(11) | BIT(10), i_q_setting);
+		odm_set_bb_reg(dm, R_0x1e8c, BIT(13) | BIT(12), hw_avg_time);
 
+		if (fft_smp_point == 4096) {
+			odm_set_bb_reg(dm, R_0x1e88, BIT(31) | BIT(30), 0x2);
+		} else if (fft_smp_point == 2048) {
+			odm_set_bb_reg(dm, R_0x1e88, BIT(31) | BIT(30), 0x1);
+		} else {
+			odm_set_bb_reg(dm, R_0x1e88, BIT(31) | BIT(30), 0x0);
+			odm_set_bb_reg(dm, R_0x1e8c, BIT(15) | BIT(14),
+				       fft_smp_point_idx);
+		}
+		odm_set_bb_reg(dm, R_0x1e8c, BIT(17) | BIT(16), ant_sel);
+		odm_set_bb_reg(dm, R_0x1e8c, BIT(23) | BIT(22), psd_input);
+	} else if (dm->support_ic_type & ODM_IC_11AC_SERIES) {
+		odm_set_bb_reg(dm, R_0x910, BIT(11) | BIT(10), i_q_setting);
+		odm_set_bb_reg(dm, R_0x910, BIT(13) | BIT(12), hw_avg_time);
+		odm_set_bb_reg(dm, R_0x910, BIT(15) | BIT(14),
+			       fft_smp_point_idx);
+		odm_set_bb_reg(dm, R_0x910, BIT(17) | BIT(16), ant_sel);
+		odm_set_bb_reg(dm, R_0x910, BIT(23), psd_input);
+	} else if (dm->support_ic_type == ODM_RTL8721D) {
+		odm_set_bb_reg(dm, 0x808, BIT(19) | BIT(18), i_q_setting);
+		odm_set_bb_reg(dm, 0x808, BIT(21) | BIT(20), hw_avg_time);
+		odm_set_bb_reg(dm, 0x808, BIT(23) | BIT(22), fft_smp_point_idx);
+		odm_set_bb_reg(dm, 0x804, BIT(5) | BIT(4), ant_sel);
+		odm_set_bb_reg(dm, 0x80C, BIT(23), psd_input);
+
+#if 0
+	} else {	/*ODM_IC_11N_SERIES*/
+#endif
 	}
-
-	/*bw = (*p_dm->p_band_width); //ODM_BW20M */
-	/*channel = *(p_dm->p_channel);*/
-	
-	
-
-
+	/*@bw = (*dm->band_width); //ODM_BW20M */
+	/*@channel = *(dm->channel);*/
 }
 
-void
-phydm_psd_init(
-	void		*p_dm_void
-	)
+void phydm_psd_init(void *dm_void)
 {
-	struct PHY_DM_STRUCT	*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	struct	_PHYDM_PSD_	*p_dm_psd_table = &(p_dm->dm_psd_table);
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct psd_info *dm_psd_table = &dm->dm_psd_table;
+
+	PHYDM_DBG(dm, ODM_COMP_API, "PSD para init\n");
 
-	PHYDM_DBG(p_dm, ODM_COMP_API, ("PSD para init\n"));
+	dm_psd_table->psd_in_progress = false;
 
-	p_dm_psd_table->psd_in_progress = false;
-	
-	if (p_dm->support_ic_type & ODM_IC_11AC_SERIES) {
-		
-		p_dm_psd_table->psd_reg = 0x910;
-		p_dm_psd_table->psd_report_reg = 0xF44;
+	if (dm->support_ic_type & ODM_IC_JGR3_SERIES) {
+		dm_psd_table->psd_reg = R_0x1e8c;
+		dm_psd_table->psd_report_reg = R_0x2d90;
 
+		/*@2b'11: 20MHz, 2b'10: 40MHz, 2b'01: 80MHz */
+		dm_psd_table->psd_bw_rf_reg = 1;
+	} else if (dm->support_ic_type & ODM_IC_11AC_SERIES) {
+		dm_psd_table->psd_reg = R_0x910;
+		dm_psd_table->psd_report_reg = R_0xf44;
+
+		/*@2b'11: 20MHz, 2b'10: 40MHz, 2b'01: 80MHz */
 		if (ODM_IC_11AC_2_SERIES)
-			p_dm_psd_table->psd_bw_rf_reg = 1;	/*2b'11: 20MHz, 2b'10: 40MHz, 2b'01: 80MHz */
+			dm_psd_table->psd_bw_rf_reg = 1;
 		else
-			p_dm_psd_table->psd_bw_rf_reg = 2;	/*2b'11: 20MHz, 2b'10: 40MHz, 2b'01: 80MHz */
-		
+			dm_psd_table->psd_bw_rf_reg = 2;
 	} else {
-	
-		p_dm_psd_table->psd_reg = 0x808;
-		p_dm_psd_table->psd_report_reg = 0x8B4;
-		p_dm_psd_table->psd_bw_rf_reg = 2; /*2b'11: 20MHz, 2b'10: 40MHz, 2b'01: 80MHz */
+		dm_psd_table->psd_reg = R_0x808;
+		dm_psd_table->psd_report_reg = R_0x8b4;
+		/*@2b'11: 20MHz, 2b'10: 40MHz, 2b'01: 80MHz */
+		dm_psd_table->psd_bw_rf_reg = 2;
 	}
 
-	if (p_dm->support_ic_type == ODM_RTL8812)
-		p_dm_psd_table->psd_pwr_common_offset = 0;
-	else if (p_dm->support_ic_type == ODM_RTL8821)
-		p_dm_psd_table->psd_pwr_common_offset = 0;
-	else
-		p_dm_psd_table->psd_pwr_common_offset = 0;
-	
-	phydm_psd_para_setting(p_dm, 1, 2, 3, 128, 0, 0, 7, 0);
-	/*phydm_psd(p_dm, 0x3c, 0, 127);*/			/* target at -50dBm */
-
+	dm_psd_table->psd_pwr_common_offset = 0;
 
+	phydm_psd_para_setting(dm, 1, 2, 3, 128, 0, 0, 7, 0);
+#if 0
+	/*phydm_psd(dm, 0x3c, 0, 127);*/ /* target at -50dBm */
+#endif
 }
 
-void
-phydm_psd_debug(
-	void		*p_dm_void,
-	char		input[][16],
-	u32		*_used,
-	char		*output,
-	u32		*_out_len,
-	u32		input_num
-)
+void phydm_psd_debug(void *dm_void, char input[][16], u32 *_used,
+		     char *output, u32 *_out_len)
 {
-	struct PHY_DM_STRUCT	*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	char		help[] = "-h";
-	u32		var1[10] = {0};
-	u32		used = *_used;
-	u32		out_len = *_out_len;
-	u8		i;
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	char help[] = "-h";
+	u32 var1[10] = {0};
+	u32 used = *_used;
+	u32 out_len = *_out_len;
+	u8 i = 0;
 
 	if ((strcmp(input[1], help) == 0)) {
-		PHYDM_SNPRINTF((output + used, out_len - used, "{0} {sw_avg} {hw_avg 0:3} {1:I,2:Q,3:IQ} {fft_point: 128*(1:4)} {path_sel 0~3} {0:ADC, 1:RXIQC} {CH} {noise_k}\n"));
-		PHYDM_SNPRINTF((output + used, out_len - used, "{1} {IGI(hex)} {start_point} {stop_point}\n"));
+		#ifdef PHYDM_IC_JGR3_SERIES_SUPPORT
+		if (dm->support_ic_type & ODM_IC_JGR3_SERIES)
+			PDM_SNPF(out_len, used, output + used, out_len - used,
+				 "{0} {sw_avg} {hw_avg 0:3} {1:I,2:Q,3:IQ} {fft_point: 128*(1:4) 2048 4096}\n{path_sel 0~3} {0:ADC, 1:rxdata_fir_in, 2:rx_nbi_nf_stage2} {CH} {noise_k}\n\n");
+		else
+		#endif
+			PDM_SNPF(out_len, used, output + used, out_len - used,
+				 "{0} {sw_avg} {hw_avg 0:3} {1:I,2:Q,3:IQ} {fft_point: 128*(1:4)} {path_sel 0~3} {0:ADC, 1:RXIQC} {CH} {noise_k}\n");
 
-	} else {
-	
-
-		PHYDM_SSCANF(input[1], DCMD_DECIMAL, &var1[0]);
-
-		if (var1[0] == 0) {
-
-			for (i = 1; i < 10; i++) {
-				if (input[i + 1]) {
-					PHYDM_SSCANF(input[i + 1], DCMD_DECIMAL, &var1[i]);
-				}
-			}
-			
-			PHYDM_SNPRINTF((output + used, out_len - used, "sw_avg_time=((%d)), hw_avg_time=((%d)), IQ=((%d)), fft=((%d)), path=((%d)), input =((%d)) ch=((%d)), noise_k=((%d))\n", 
-				var1[1], var1[2], var1[3], var1[4], var1[5], var1[6], (u8)var1[7], (u8)var1[8]));
-			phydm_psd_para_setting(p_dm, (u8)var1[1], (u8)var1[2], (u8)var1[3], (u16)var1[4], (u8)var1[5], (u8)var1[6], (u8)var1[7], (u8)var1[8]);
-			
-		} else if (var1[0] == 1) {
-
-			PHYDM_SSCANF(input[2], DCMD_HEX, &var1[1]);
-			PHYDM_SSCANF(input[3], DCMD_DECIMAL, &var1[2]);
-			PHYDM_SSCANF(input[4], DCMD_DECIMAL, &var1[3]);
-			PHYDM_SNPRINTF((output + used, out_len - used, "IGI=((0x%x)), start_point=((%d)), stop_point=((%d))\n", var1[1], var1[2], var1[3]));
-			p_dm->debug_components |= ODM_COMP_API;
-			phydm_psd(p_dm, var1[1], (u16)var1[2], (u16)var1[3]);
-			p_dm->debug_components &= (~ODM_COMP_API);
-		}
+		PDM_SNPF(out_len, used, output + used, out_len - used,
+			 "{1} {IGI(hex)} {start_point} {stop_point}\n");
+		goto out;
+	}
 
+	PHYDM_SSCANF(input[1], DCMD_DECIMAL, &var1[0]);
+
+	if (var1[0] == 0) {
+		for (i = 1; i < 10; i++) {
+			if (input[i + 1])
+				PHYDM_SSCANF(input[i + 1], DCMD_DECIMAL,
+					     &var1[i]);
+		}
+		PDM_SNPF(out_len, used, output + used, out_len - used,
+			 "sw_avg_time=((%d)), hw_avg_time=((%d)), IQ=((%d)), fft=((%d)), path=((%d)), input =((%d)) ch=((%d)), noise_k=((%d))\n",
+			 var1[1], var1[2], var1[3], var1[4], var1[5],
+			 var1[6], (u8)var1[7], (u8)var1[8]);
+		phydm_psd_para_setting(dm, (u8)var1[1], (u8)var1[2],
+				       (u8)var1[3], (u16)var1[4],
+				       (u8)var1[5], (u8)var1[6],
+				       (u8)var1[7], (u8)var1[8]);
+
+	} else if (var1[0] == 1) {
+		PHYDM_SSCANF(input[2], DCMD_HEX, &var1[1]);
+		PHYDM_SSCANF(input[3], DCMD_DECIMAL, &var1[2]);
+		PHYDM_SSCANF(input[4], DCMD_DECIMAL, &var1[3]);
+		PDM_SNPF(out_len, used, output + used, out_len - used,
+			 "IGI=((0x%x)), start_point=((%d)), stop_point=((%d))\n",
+			 var1[1], var1[2], var1[3]);
+		dm->debug_components |= ODM_COMP_API;
+		if (phydm_psd(dm, var1[1], (u16)var1[2], (u16)var1[3]) ==
+		    PHYDM_SET_FAIL)
+			PDM_SNPF(out_len, used, output + used, out_len - used,
+				 "PSD_SET_FAIL\n");
+		dm->debug_components &= ~(ODM_COMP_API);
 	}
 
+out:
 	*_used = used;
 	*_out_len = out_len;
-	
 }
 
-u8
-phydm_get_psd_result_table(
-	void		*p_dm_void,
-	int 		index
-	)
+u8 phydm_get_psd_result_table(void *dm_void, int index)
 {
-	struct	PHY_DM_STRUCT	*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	struct	_PHYDM_PSD_	*p_dm_psd_table = &(p_dm->dm_psd_table);
-	u8 		temp_result = 0;
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct psd_info *dm_psd_table = &dm->dm_psd_table;
+	u8 result = 0;
 
-	if(index<128)
-		temp_result = p_dm_psd_table->psd_result[index];
+	if (index < 128)
+		result = dm_psd_table->psd_result[index];
 
-	return temp_result;
-	
+	return result;
 }
 
 #endif
-
diff --git a/rtl8723DS/hal/phydm/phydm_psd.h b/rtl8723DS/hal/phydm/phydm_psd.h
index 0bde88a..635a887 100755..100644
--- a/rtl8723DS/hal/phydm/phydm_psd.h
+++ b/rtl8723DS/hal/phydm/phydm_psd.h
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2007 - 2017 Realtek Corporation.
+ * Copyright(c) 2007 - 2017  Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -8,29 +8,37 @@
  *
  * This program is distributed in the hope that it will be useful, but WITHOUT
  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  * more details.
  *
+ * The full GNU General Public License is included in this distribution in the
+ * file called LICENSE.
+ *
+ * Contact Information:
+ * wlanfae <wlanfae@realtek.com>
+ * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
+ * Hsinchu 300, Taiwan.
+ *
+ * Larry Finger <Larry.Finger@lwfinger.net>
+ *
  *****************************************************************************/
 
-#ifndef	__PHYDMPSD_H__
-#define    __PHYDMPSD_H__
+#ifndef __PHYDMPSD_H__
+#define __PHYDMPSD_H__
 
-/*#define PSD_VERSION	"1.0"*/  /*2016.09.22  Dino*/
-#define PSD_VERSION	"1.1"  /*2016.10.07  Dino, Add Option for PSD Tone index Selection */
+/*@#define PSD_VERSION	"1.0"*/ /*@2016.09.22  Dino*/
+#define PSD_VERSION "1.1" /*@2016.10.07  Dino, Add Option for PSD Tone index Selection */
 
 #ifdef CONFIG_PSD_TOOL
 
 
-struct _PHYDM_PSD_ {
-
+struct psd_info {
 	u8	psd_in_progress;
 	u32	psd_reg;
 	u32	psd_report_reg;
 	u8	psd_pwr_common_offset;
 	u16	sw_avg_time;
 	u16	fft_smp_point;
-	u32	initial_gain_backup;
 	u32	rf_0x18_bkp;
 	u32	rf_0x18_bkp_b;
 	u16	psd_fc_channel;
@@ -39,55 +47,20 @@ struct _PHYDM_PSD_ {
 	u8	noise_k_en;
 };
 
-u32
-phydm_get_psd_data(
-	void			*p_dm_void,
-	u32			psd_tone_idx,
-	u32			igi
-);
+u32 phydm_get_psd_data(void *dm_void, u32 psd_tone_idx, u32 igi);
 
-void
-phydm_psd_debug(
-	void		*p_dm_void,
-	char		input[][16],
-	u32		*_used,
-	char		*output,
-	u32		*_out_len,
-	u32		input_num
-);
+void phydm_psd_debug(void *dm_void, char input[][16], u32 *_used,
+		     char *output, u32 *_out_len);
 
-void
-phydm_psd(
-	void		*p_dm_void,
-	u32		igi,
-	u16		start_point,
-	u16		stop_point
-);
+u8 phydm_psd(void *dm_void, u32 igi, u16 start_point, u16 stop_point);
 
-void
-phydm_psd_para_setting(
-	void		*p_dm_void,
-	u8		sw_avg_time,
-	u8		hw_avg_time,
-	u8		i_q_setting,
-	u16		fft_smp_point,
-	u8		ant_sel,
-	u8		psd_input,
-	u8		channel,
-	u8		noise_k_en
-);
+void phydm_psd_para_setting(void *dm_void, u8 sw_avg_time, u8 hw_avg_time,
+			    u8 i_q_setting, u16 fft_smp_point, u8 ant_sel,
+			    u8 psd_input, u8 channel, u8 noise_k_en);
 
-void
-phydm_psd_init(
-	void		*p_dm_void
-);
+void phydm_psd_init(void *dm_void);
 
-u8
-phydm_get_psd_result_table(
-	void		*p_dm_void,
-	int		index
-);
+u8 phydm_get_psd_result_table(void *dm_void, int index);
 
 #endif
 #endif
-
diff --git a/rtl8723DS/hal/phydm/phydm_rainfo.c b/rtl8723DS/hal/phydm/phydm_rainfo.c
index 9b953b7..077585d 100755..100644
--- a/rtl8723DS/hal/phydm/phydm_rainfo.c
+++ b/rtl8723DS/hal/phydm/phydm_rainfo.c
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2007 - 2017 Realtek Corporation.
+ * Copyright(c) 2007 - 2017  Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -8,980 +8,1078 @@
  *
  * This program is distributed in the hope that it will be useful, but WITHOUT
  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  * more details.
  *
+ * The full GNU General Public License is included in this distribution in the
+ * file called LICENSE.
+ *
+ * Contact Information:
+ * wlanfae <wlanfae@realtek.com>
+ * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
+ * Hsinchu 300, Taiwan.
+ *
+ * Larry Finger <Larry.Finger@lwfinger.net>
+ *
  *****************************************************************************/
 
-/* ************************************************************
+/*@************************************************************
  * include files
- * ************************************************************ */
+ ************************************************************/
 #include "mp_precomp.h"
 #include "phydm_precomp.h"
 
-void
-phydm_h2C_debug(
-	void		*p_dm_void,
-	u32		*const dm_value,
-	u32		*_used,
-	char		*output,
-	u32		*_out_len
-)
+boolean phydm_is_vht_rate(void *dm_void, u8 rate)
 {
-	struct PHY_DM_STRUCT		*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	u8			h2c_parameter[H2C_MAX_LENGTH] = {0};
-	u8			phydm_h2c_id = (u8)dm_value[0];
-	u8			i;
-	u32			used = *_used;
-	u32			out_len = *_out_len;
-
-	PHYDM_SNPRINTF((output + used, out_len - used, "Phydm Send H2C_ID (( 0x%x))\n", phydm_h2c_id));
-	for (i = 0; i < H2C_MAX_LENGTH; i++) {
+	return ((rate & 0x7f) >= ODM_RATEVHTSS1MCS0) ? true : false;
+}
+
+boolean phydm_is_ht_rate(void *dm_void, u8 rate)
+{
+	return (((rate & 0x7f) >= ODM_RATEMCS0) &&
+		((rate & 0x7f) <= ODM_RATEMCS31)) ? true : false;
+}
+
+boolean phydm_is_ofdm_rate(void *dm_void, u8 rate)
+{
+	return (((rate & 0x7f) >= ODM_RATE6M) &&
+		((rate & 0x7f) <= ODM_RATE54M)) ? true : false;
+}
+
+boolean phydm_is_cck_rate(void *dm_void, u8 rate)
+{
+	return ((rate & 0x7f) <= ODM_RATE11M) ? true : false;
+}
+
+u8 phydm_rate_2_rate_digit(void *dm_void, u8 rate)
+{
+	u8 legacy_table[12] = {1, 2, 5, 11, 6, 9, 12, 18, 24, 36, 48, 54};
+	u8 rate_idx = rate & 0x7f; /*remove bit7 SGI*/
+	u8 rate_digit = 0;
+
+	if (rate_idx >= ODM_RATEVHTSS1MCS0)
+		rate_digit = (rate_idx - ODM_RATEVHTSS1MCS0) % 10;
+	else if (rate_idx >= ODM_RATEMCS0)
+		rate_digit = (rate_idx - ODM_RATEMCS0);
+	else if (rate_idx <= ODM_RATE54M)
+		rate_digit = legacy_table[rate_idx];
+
+	return rate_digit;
+}
+
+u8 phydm_rate_type_2_num_ss(void *dm_void, enum PDM_RATE_TYPE type)
+{
+	u8 num_ss = 1;
 
+	switch (type) {
+	case PDM_CCK:
+	case PDM_OFDM:
+	case PDM_1SS:
+		num_ss = 1;
+		break;
+	case PDM_2SS:
+		num_ss = 2;
+		break;
+	case PDM_3SS:
+		num_ss = 3;
+		break;
+	case PDM_4SS:
+		num_ss = 4;
+		break;
+	default:
+		break;
+	}
+
+	return num_ss;
+}
+
+u8 phydm_rate_to_num_ss(void *dm_void, u8 data_rate)
+{
+	u8 num_ss = 1;
+
+	if (data_rate <= ODM_RATE54M)
+		num_ss = 1;
+	else if (data_rate <= ODM_RATEMCS31)
+		num_ss = ((data_rate - ODM_RATEMCS0) >> 3) + 1;
+	else if (data_rate <= ODM_RATEVHTSS1MCS9)
+		num_ss = 1;
+	else if (data_rate <= ODM_RATEVHTSS2MCS9)
+		num_ss = 2;
+	else if (data_rate <= ODM_RATEVHTSS3MCS9)
+		num_ss = 3;
+	else if (data_rate <= ODM_RATEVHTSS4MCS9)
+		num_ss = 4;
+
+	return num_ss;
+}
+
+void phydm_h2C_debug(void *dm_void, char input[][16], u32 *_used,
+		     char *output, u32 *_out_len)
+{
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	u32 used = *_used;
+	u32 out_len = *_out_len;
+	u32 dm_value[10] = {0};
+	u8 i = 0, input_idx = 0;
+	u8 h2c_parameter[H2C_MAX_LENGTH] = {0};
+	u8 phydm_h2c_id = 0;
+
+	for (i = 0; i < 8; i++) {
+		if (input[i + 1]) {
+			PHYDM_SSCANF(input[i + 1], DCMD_HEX, &dm_value[i]);
+			input_idx++;
+		}
+	}
+
+	if (input_idx == 0)
+		return;
+
+	phydm_h2c_id = (u8)dm_value[0];
+
+	PDM_SNPF(out_len, used, output + used, out_len - used,
+		 "Phydm Send H2C_ID (( 0x%x))\n", phydm_h2c_id);
+
+	for (i = 0; i < H2C_MAX_LENGTH; i++) {
 		h2c_parameter[i] = (u8)dm_value[i + 1];
-		PHYDM_SNPRINTF((output + used, out_len - used, "H2C: Byte[%d] = ((0x%x))\n", i, h2c_parameter[i]));
+		PDM_SNPF(out_len, used, output + used, out_len - used,
+			 "H2C: Byte[%d] = ((0x%x))\n", i, h2c_parameter[i]);
 	}
 
-	odm_fill_h2c_cmd(p_dm, phydm_h2c_id, H2C_MAX_LENGTH, h2c_parameter);
-	
+	odm_fill_h2c_cmd(dm, phydm_h2c_id, H2C_MAX_LENGTH, h2c_parameter);
+
 	*_used = used;
 	*_out_len = out_len;
 }
 
-void
-phydm_fw_fix_rate(
-	void		*p_dm_void,
-	u8		en, 
-	u8		macid, 
-	u8		bw, 
-	u8		rate
-	
-)
+void phydm_fw_fix_rate(void *dm_void, u8 en, u8 macid, u8 bw, u8 rate)
 {
-	struct PHY_DM_STRUCT		*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	u32	reg_u32_tmp;
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	u32 reg_u32_tmp;
 
-	if (p_dm->support_ic_type & PHYDM_IC_8051_SERIES) {
-		
+	if (dm->support_ic_type & PHYDM_IC_8051_SERIES) {
 		reg_u32_tmp = (bw << 24) | (rate << 16) | (macid << 8) | en;
-		odm_set_bb_reg(p_dm, 0x4a0, MASKDWORD, reg_u32_tmp);
-			
+		odm_set_bb_reg(dm, R_0x4a0, MASKDWORD, reg_u32_tmp);
+
 	} else {
-	
 		if (en == 1)
-			reg_u32_tmp = (0x60 << 24) | (macid << 16) | (bw << 8) | rate;
+			reg_u32_tmp = BYTE_2_DWORD(0x60, macid, bw, rate);
 		else
 			reg_u32_tmp = 0x40000000;
-			
-		odm_set_bb_reg(p_dm, 0x450, MASKDWORD, reg_u32_tmp);
+		if (dm->support_ic_type & ODM_RTL8814B)
+			odm_set_bb_reg(dm, R_0x448, MASKDWORD, reg_u32_tmp);
+		else
+			odm_set_bb_reg(dm, R_0x450, MASKDWORD, reg_u32_tmp);
 	}
 	if (en == 1) {
-		PHYDM_DBG(p_dm, ODM_COMP_API, ("FW fix TX rate[id =%d], %dM, Rate(%d)=", macid, (20 << bw), rate));
-		phydm_print_rate(p_dm, rate, ODM_COMP_API);
+		PHYDM_DBG(dm, ODM_COMP_API,
+			  "FW fix TX rate[id =%d], %dM, Rate(%d)=", macid,
+			  (20 << bw), rate);
+		phydm_print_rate(dm, rate, ODM_COMP_API);
 	} else {
-		PHYDM_DBG(p_dm, ODM_COMP_API, ("Auto Rate\n"));
+		PHYDM_DBG(dm, ODM_COMP_API, "Auto Rate\n");
 	}
 }
 
-void
-phydm_ra_debug(
-	void		*p_dm_void,
-	char		input[][16],
-	u32		*_used,
-	char		*output,
-	u32		*_out_len
-)
+void phydm_ra_debug(void *dm_void, char input[][16], u32 *_used, char *output,
+		    u32 *_out_len)
 {
-	struct PHY_DM_STRUCT		*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	struct _rate_adaptive_table_			*p_ra_table = &p_dm->dm_ra_table;
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct ra_table *ra_tab = &dm->dm_ra_table;
 	u32 used = *_used;
 	u32 out_len = *_out_len;
-	char	help[] = "-h";
-	u32	var1[5] = {0};
-	u8	i = 0;
-	u32	reg_u32_tmp;
+	char help[] = "-h";
+	u32 var[5] = {0};
+	u8 macid = 0, bw = 0, rate = 0;
+	u8 i = 0;
 
 	for (i = 0; i < 5; i++) {
 		if (input[i + 1])
-			PHYDM_SSCANF(input[i + 1], DCMD_DECIMAL, &var1[i]);
+			PHYDM_SSCANF(input[i + 1], DCMD_DECIMAL, &var[i]);
 	}
-	
+
 	if ((strcmp(input[1], help) == 0)) {
-		PHYDM_SNPRINTF((output + used, out_len - used, "{1} {0:-,1:+} {ofst}: set offset\n"));
-		PHYDM_SNPRINTF((output + used, out_len - used, "{1} {100}: show offset\n"));
-		PHYDM_SNPRINTF((output + used, out_len - used, "{2} {en} {macid} {bw} {rate}: fw fix rate\n"));
-		
-	} else if (var1[0] == 1) { /*Adjust PCR offset*/
-
-		if (var1[1] == 100) {
-			PHYDM_SNPRINTF((output + used, out_len - used, "[Get] RA_ofst=((%s%d))\n", 
-				((p_ra_table->RA_threshold_offset == 0) ? " " : ((p_ra_table->RA_offset_direction) ? "+" : "-")), p_ra_table->RA_threshold_offset));
-
-		} else if (var1[1] == 0) {
-			p_ra_table->RA_offset_direction = 0;
-			p_ra_table->RA_threshold_offset = (u8)var1[2];
-			PHYDM_SNPRINTF((output + used, out_len - used, "[Set] RA_ofst=((-%d))\n", p_ra_table->RA_threshold_offset));
-		} else if (var1[1] == 1) {
-			p_ra_table->RA_offset_direction = 1;
-			p_ra_table->RA_threshold_offset = (u8)var1[2];
-			PHYDM_SNPRINTF((output + used, out_len - used, "[Set] RA_ofst=((+%d))\n", p_ra_table->RA_threshold_offset));
+		PDM_SNPF(out_len, used, output + used, out_len - used,
+			 "{1} {0:-,1:+} {ofst}: set offset\n");
+		PDM_SNPF(out_len, used, output + used, out_len - used,
+			 "{1} {100}: show offset\n");
+		PDM_SNPF(out_len, used, output + used, out_len - used,
+			 "{2} {en} {macid} {bw} {rate}: fw fix rate\n");
+
+	} else if (var[0] == 1) { /*@Adjust PCR offset*/
+
+		if (var[1] == 100) {
+			PDM_SNPF(out_len, used, output + used, out_len - used,
+				 "[Get] RA_ofst=((%s%d))\n",
+				 ((ra_tab->ra_ofst_direc) ? "+" : "-"),
+				 ra_tab->ra_th_ofst);
+
+		} else if (var[1] == 0) {
+			ra_tab->ra_ofst_direc = 0;
+			ra_tab->ra_th_ofst = (u8)var[2];
+			PDM_SNPF(out_len, used, output + used, out_len - used,
+				 "[Set] RA_ofst=((-%d))\n", ra_tab->ra_th_ofst);
+		} else if (var[1] == 1) {
+			ra_tab->ra_ofst_direc = 1;
+			ra_tab->ra_th_ofst = (u8)var[2];
+			PDM_SNPF(out_len, used, output + used, out_len - used,
+				 "[Set] RA_ofst=((+%d))\n", ra_tab->ra_th_ofst);
 		}
-		
-	} else if (var1[0] == 2) { /*FW fix rate*/
-
-		PHYDM_SNPRINTF((output + used, out_len - used, 
-			"[FW fix TX Rate] {en, macid,bw,rate}={%d, %d, %d, 0x%x}", var1[1], var1[2], var1[3], var1[4]));
-		
-		phydm_fw_fix_rate(p_dm, (u8)var1[1], (u8)var1[2], (u8)var1[3], (u8)var1[4]);
-		
+
+	} else if (var[0] == 2) { /*@FW fix rate*/
+		macid = (u8)var[2];
+		bw = (u8)var[3];
+		rate = (u8)var[4];
+
+		PDM_SNPF(out_len, used, output + used, out_len - used,
+			 "[FW fix TX Rate] {en, macid,bw,rate}={%d, %d, %d, 0x%x}",
+			 var[1], macid, bw, rate);
+
+		phydm_fw_fix_rate(dm, (u8)var[1], macid, bw, rate);
+
 	} else {
-		PHYDM_SNPRINTF((output + used, out_len - used, "[Set] Error\n"));
-		/**/
+		PDM_SNPF(out_len, used, output + used, out_len - used,
+			 "[Set] Error\n");
 	}
 	*_used = used;
 	*_out_len = out_len;
 }
 
-
-
-void
-odm_c2h_ra_para_report_handler(
-	void	*p_dm_void,
-	u8	*cmd_buf,
-	u8	cmd_len
-)
+void odm_c2h_ra_para_report_handler(void *dm_void, u8 *cmd_buf, u8 cmd_len)
 {
-	struct PHY_DM_STRUCT		*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-#if (defined(CONFIG_RA_DBG_CMD))
-	struct _rate_adaptive_table_			*p_ra_table = &p_dm->dm_ra_table;
-#endif
-
-	u8	para_idx = cmd_buf[0]; /*Retry Penalty, NH, NL*/
-#if (defined(CONFIG_RA_DBG_CMD))
-	u8	rate_type_start = cmd_buf[1];
-	u8	rate_type_length = cmd_len - 2;
-#endif
-	u8	i;
-
-
-	PHYDM_DBG(p_dm, DBG_RA, ("[ From FW C2H RA Para ]  cmd_buf[0]= (( %d ))\n", cmd_buf[0]));
-
-#if (defined(CONFIG_RA_DBG_CMD))
-	if (para_idx == RADBG_RTY_PENALTY) {
-		PHYDM_DBG(p_dm, DBG_RA, (" |rate index|   |RTY Penality index|\n"));
-
-		for (i = 0 ; i < (rate_type_length) ; i++) {
-			if (p_ra_table->is_ra_dbg_init)
-				p_ra_table->RTY_P_default[rate_type_start + i] = cmd_buf[2 + i];
-
-			p_ra_table->RTY_P[rate_type_start + i] = cmd_buf[2 + i];
-			PHYDM_DBG(p_dm, DBG_RA, ("%8d  %15d\n", (rate_type_start + i), p_ra_table->RTY_P[rate_type_start + i]));
-		}
-
-	} else	if (para_idx == RADBG_N_HIGH) {
-		/**/
-		PHYDM_DBG(p_dm, DBG_RA, (" |rate index|    |N-High|\n"));
-
-
-	} else if (para_idx == RADBG_N_LOW) {
-		PHYDM_DBG(p_dm, DBG_RA, (" |rate index|   |N-Low|\n"));
-		/**/
-	} else if (para_idx == RADBG_RATE_UP_RTY_RATIO) {
-		PHYDM_DBG(p_dm, DBG_RA, (" |rate index|   |rate Up RTY Ratio|\n"));
-
-		for (i = 0; i < (rate_type_length); i++) {
-			if (p_ra_table->is_ra_dbg_init)
-				p_ra_table->RATE_UP_RTY_RATIO_default[rate_type_start + i] = cmd_buf[2 + i];
-
-			p_ra_table->RATE_UP_RTY_RATIO[rate_type_start + i] = cmd_buf[2 + i];
-			PHYDM_DBG(p_dm, DBG_RA, ("%8d  %15d\n", (rate_type_start + i), p_ra_table->RATE_UP_RTY_RATIO[rate_type_start + i]));
-		}
-	} else	 if (para_idx == RADBG_RATE_DOWN_RTY_RATIO) {
-		PHYDM_DBG(p_dm, DBG_RA, (" |rate index|   |rate Down RTY Ratio|\n"));
-
-		for (i = 0; i < (rate_type_length); i++) {
-			if (p_ra_table->is_ra_dbg_init)
-				p_ra_table->RATE_DOWN_RTY_RATIO_default[rate_type_start + i] = cmd_buf[2 + i];
-
-			p_ra_table->RATE_DOWN_RTY_RATIO[rate_type_start + i] = cmd_buf[2 + i];
-			PHYDM_DBG(p_dm, DBG_RA, ("%8d  %15d\n", (rate_type_start + i), p_ra_table->RATE_DOWN_RTY_RATIO[rate_type_start + i]));
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	u8 mode = cmd_buf[0]; /*Retry Penalty, NH, NL*/
+	u8 i;
+
+	PHYDM_DBG(dm, DBG_FW_TRACE, "[%s] [mode: %d]----------------------->\n",
+		  __func__, mode);
+
+	if (mode == RADBG_DEBUG_MONITOR1) {
+		if (dm->support_ic_type & PHYDM_IC_3081_SERIES) {
+			PHYDM_DBG(dm, DBG_FW_TRACE, "%5s  %d\n", "RSSI =",
+				  cmd_buf[1]);
+			PHYDM_DBG(dm, DBG_FW_TRACE, "%5s  0x%x\n", "rate =",
+				  cmd_buf[2] & 0x7f);
+			PHYDM_DBG(dm, DBG_FW_TRACE, "%5s  %d\n", "SGI =",
+				  (cmd_buf[2] & 0x80) >> 7);
+			PHYDM_DBG(dm, DBG_FW_TRACE, "%5s  %d\n", "BW =",
+				  cmd_buf[3]);
+			PHYDM_DBG(dm, DBG_FW_TRACE, "%5s  %d\n", "BW_max =",
+				  cmd_buf[4]);
+			PHYDM_DBG(dm, DBG_FW_TRACE, "%5s  0x%x\n",
+				  "multi_rate0 =", cmd_buf[5]);
+			PHYDM_DBG(dm, DBG_FW_TRACE, "%5s  0x%x\n",
+				  "multi_rate1 =", cmd_buf[6]);
+			PHYDM_DBG(dm, DBG_FW_TRACE, "%5s  %d\n", "DISRA =",
+				  cmd_buf[7]);
+			PHYDM_DBG(dm, DBG_FW_TRACE, "%5s  %d\n", "VHT_EN =",
+				  cmd_buf[8]);
+			PHYDM_DBG(dm, DBG_FW_TRACE, "%5s  %d\n",
+				  "SGI_support =", cmd_buf[9]);
+			PHYDM_DBG(dm, DBG_FW_TRACE, "%5s  %d\n", "try_ness =",
+				  cmd_buf[10]);
+			PHYDM_DBG(dm, DBG_FW_TRACE, "%5s  0x%x\n", "pre_rate =",
+				  cmd_buf[11]);
+		} else {
+			PHYDM_DBG(dm, DBG_FW_TRACE, "%5s  %d\n", "RSSI =",
+				  cmd_buf[1]);
+			PHYDM_DBG(dm, DBG_FW_TRACE, "%5s  %x\n", "BW =",
+				  cmd_buf[2]);
+			PHYDM_DBG(dm, DBG_FW_TRACE, "%5s  %d\n", "DISRA =",
+				  cmd_buf[3]);
+			PHYDM_DBG(dm, DBG_FW_TRACE, "%5s  %d\n", "VHT_EN =",
+				  cmd_buf[4]);
+			PHYDM_DBG(dm, DBG_FW_TRACE, "%5s  %d\n",
+				  "Hightest rate =", cmd_buf[5]);
+			PHYDM_DBG(dm, DBG_FW_TRACE, "%5s  0x%x\n",
+				  "Lowest rate =", cmd_buf[6]);
+			PHYDM_DBG(dm, DBG_FW_TRACE, "%5s  0x%x\n",
+				  "SGI_support =", cmd_buf[7]);
+			PHYDM_DBG(dm, DBG_FW_TRACE, "%5s  %d\n", "Rate_ID =",
+				  cmd_buf[8]);
 		}
-	} else
-#endif
-		if (para_idx == RADBG_DEBUG_MONITOR1) {
-			PHYDM_DBG(p_dm, DBG_FW_TRACE, ("-------------------------------\n"));
-			if (p_dm->support_ic_type & PHYDM_IC_3081_SERIES) {
-
-				PHYDM_DBG(p_dm, DBG_FW_TRACE, ("%5s  %d\n", "RSSI =", cmd_buf[1]));
-				PHYDM_DBG(p_dm, DBG_FW_TRACE, ("%5s  0x%x\n", "rate =", cmd_buf[2] & 0x7f));
-				PHYDM_DBG(p_dm, DBG_FW_TRACE, ("%5s  %d\n", "SGI =", (cmd_buf[2] & 0x80) >> 7));
-				PHYDM_DBG(p_dm, DBG_FW_TRACE, ("%5s  %d\n", "BW =", cmd_buf[3]));
-				PHYDM_DBG(p_dm, DBG_FW_TRACE, ("%5s  %d\n", "BW_max =", cmd_buf[4]));
-				PHYDM_DBG(p_dm, DBG_FW_TRACE, ("%5s  0x%x\n", "multi_rate0 =", cmd_buf[5]));
-				PHYDM_DBG(p_dm, DBG_FW_TRACE, ("%5s  0x%x\n", "multi_rate1 =", cmd_buf[6]));
-				PHYDM_DBG(p_dm, DBG_FW_TRACE, ("%5s  %d\n", "DISRA =",	cmd_buf[7]));
-				PHYDM_DBG(p_dm, DBG_FW_TRACE, ("%5s  %d\n", "VHT_EN =", cmd_buf[8]));
-				PHYDM_DBG(p_dm, DBG_FW_TRACE, ("%5s  %d\n", "SGI_support =",	cmd_buf[9]));
-				PHYDM_DBG(p_dm, DBG_FW_TRACE, ("%5s  %d\n", "try_ness =", cmd_buf[10]));
-				PHYDM_DBG(p_dm, DBG_FW_TRACE, ("%5s  0x%x\n", "pre_rate =", cmd_buf[11]));
-			} else {
-				PHYDM_DBG(p_dm, DBG_FW_TRACE, ("%5s  %d\n", "RSSI =", cmd_buf[1]));
-				PHYDM_DBG(p_dm, DBG_FW_TRACE, ("%5s  %x\n", "BW =", cmd_buf[2]));
-				PHYDM_DBG(p_dm, DBG_FW_TRACE, ("%5s  %d\n", "DISRA =", cmd_buf[3]));
-				PHYDM_DBG(p_dm, DBG_FW_TRACE, ("%5s  %d\n", "VHT_EN =", cmd_buf[4]));
-				PHYDM_DBG(p_dm, DBG_FW_TRACE, ("%5s  %d\n", "Hightest rate =", cmd_buf[5]));
-				PHYDM_DBG(p_dm, DBG_FW_TRACE, ("%5s  0x%x\n", "Lowest rate =", cmd_buf[6]));
-				PHYDM_DBG(p_dm, DBG_FW_TRACE, ("%5s  0x%x\n", "SGI_support =", cmd_buf[7]));
-				PHYDM_DBG(p_dm, DBG_FW_TRACE, ("%5s  %d\n", "Rate_ID =",	cmd_buf[8]));
-			}
-			PHYDM_DBG(p_dm, DBG_FW_TRACE, ("-------------------------------\n"));
-		} else	 if (para_idx == RADBG_DEBUG_MONITOR2) {
-			PHYDM_DBG(p_dm, DBG_FW_TRACE, ("-------------------------------\n"));
-			if (p_dm->support_ic_type & PHYDM_IC_3081_SERIES) {
-				PHYDM_DBG(p_dm, DBG_FW_TRACE, ("%5s  %d\n", "rate_id =", cmd_buf[1]));
-				PHYDM_DBG(p_dm, DBG_FW_TRACE, ("%5s  0x%x\n", "highest_rate =", cmd_buf[2]));
-				PHYDM_DBG(p_dm, DBG_FW_TRACE, ("%5s  0x%x\n", "lowest_rate =", cmd_buf[3]));
-
-				for (i = 4; i <= 11; i++)
-					PHYDM_DBG(p_dm, DBG_FW_TRACE, ("RAMASK =  0x%x\n", cmd_buf[i]));
-			} else {
-				PHYDM_DBG(p_dm, DBG_FW_TRACE, ("%5s  %x%x  %x%x  %x%x  %x%x\n", "RA Mask:",
-					cmd_buf[8], cmd_buf[7], cmd_buf[6], cmd_buf[5], cmd_buf[4], cmd_buf[3], cmd_buf[2], cmd_buf[1]));
-			}
-			PHYDM_DBG(p_dm, DBG_FW_TRACE, ("-------------------------------\n"));
-		} else	 if (para_idx == RADBG_DEBUG_MONITOR3) {
-
-			for (i = 0; i < (cmd_len - 1); i++)
-				PHYDM_DBG(p_dm, DBG_FW_TRACE, ("content[%d] = %d\n", i, cmd_buf[1 + i]));
-		} else	 if (para_idx == RADBG_DEBUG_MONITOR4)
-			PHYDM_DBG(p_dm, DBG_FW_TRACE, ("%5s  {%d.%d}\n", "RA version =", cmd_buf[1], cmd_buf[2]));
-		else if (para_idx == RADBG_DEBUG_MONITOR5) {
-			PHYDM_DBG(p_dm, DBG_FW_TRACE, ("%5s  0x%x\n", "Current rate =", cmd_buf[1]));
-			PHYDM_DBG(p_dm, DBG_FW_TRACE, ("%5s  %d\n", "Retry ratio =", cmd_buf[2]));
-			PHYDM_DBG(p_dm, DBG_FW_TRACE, ("%5s  %d\n", "rate down ratio =", cmd_buf[3]));
-			PHYDM_DBG(p_dm, DBG_FW_TRACE, ("%5s  0x%x\n", "highest rate =", cmd_buf[4]));
-			PHYDM_DBG(p_dm, DBG_FW_TRACE, ("%5s  {0x%x 0x%x}\n", "Muti-try =", cmd_buf[5], cmd_buf[6]));
-			PHYDM_DBG(p_dm, DBG_FW_TRACE, ("%5s  0x%x%x%x%x%x\n", "RA mask =", cmd_buf[11], cmd_buf[10], cmd_buf[9], cmd_buf[8], cmd_buf[7]));
+	} else if (mode == RADBG_DEBUG_MONITOR2) {
+		if (dm->support_ic_type & PHYDM_IC_3081_SERIES) {
+			PHYDM_DBG(dm, DBG_FW_TRACE, "%5s  %d\n", "rate_id =",
+				  cmd_buf[1]);
+			PHYDM_DBG(dm, DBG_FW_TRACE, "%5s  0x%x\n",
+				  "highest_rate =", cmd_buf[2]);
+			PHYDM_DBG(dm, DBG_FW_TRACE, "%5s  0x%x\n",
+				  "lowest_rate =", cmd_buf[3]);
+
+			for (i = 4; i <= 11; i++)
+				PHYDM_DBG(dm, DBG_FW_TRACE, "RAMASK =  0x%x\n",
+					  cmd_buf[i]);
+		} else {
+			PHYDM_DBG(dm, DBG_FW_TRACE,
+				  "%5s  %x%x  %x%x  %x%x  %x%x\n", "RA Mask:",
+				  cmd_buf[8], cmd_buf[7], cmd_buf[6],
+				  cmd_buf[5], cmd_buf[4], cmd_buf[3],
+				  cmd_buf[2], cmd_buf[1]);
 		}
+	} else if (mode == RADBG_DEBUG_MONITOR3) {
+		for (i = 0; i < (cmd_len - 1); i++)
+			PHYDM_DBG(dm, DBG_FW_TRACE, "content[%d] = %d\n", i,
+				  cmd_buf[1 + i]);
+	} else if (mode == RADBG_DEBUG_MONITOR4)
+		PHYDM_DBG(dm, DBG_FW_TRACE, "%5s  {%d.%d}\n", "RA version =",
+			  cmd_buf[1], cmd_buf[2]);
+	else if (mode == RADBG_DEBUG_MONITOR5) {
+		PHYDM_DBG(dm, DBG_FW_TRACE, "%5s  0x%x\n", "Current rate =",
+			  cmd_buf[1]);
+		PHYDM_DBG(dm, DBG_FW_TRACE, "%5s  %d\n", "Retry ratio =",
+			  cmd_buf[2]);
+		PHYDM_DBG(dm, DBG_FW_TRACE, "%5s  %d\n", "rate down ratio =",
+			  cmd_buf[3]);
+		PHYDM_DBG(dm, DBG_FW_TRACE, "%5s  0x%x\n", "highest rate =",
+			  cmd_buf[4]);
+		PHYDM_DBG(dm, DBG_FW_TRACE, "%5s  {0x%x 0x%x}\n", "Muti-try =",
+			  cmd_buf[5], cmd_buf[6]);
+		PHYDM_DBG(dm, DBG_FW_TRACE, "%5s  0x%x%x%x%x%x\n", "RA mask =",
+			  cmd_buf[11], cmd_buf[10], cmd_buf[9], cmd_buf[8],
+			  cmd_buf[7]);
+	}
+	PHYDM_DBG(dm, DBG_FW_TRACE, "-------------------------------\n");
 }
 
-void
-phydm_ra_dynamic_retry_count(
-	void	*p_dm_void
-)
+void phydm_ra_dynamic_retry_count(void *dm_void)
 {
-	struct PHY_DM_STRUCT		*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
 
-	if (!(p_dm->support_ability & ODM_BB_DYNAMIC_ARFR))
+	if (!(dm->support_ability & ODM_BB_DYNAMIC_ARFR))
 		return;
 
-	/*PHYDM_DBG(p_dm, DBG_RA, ("p_dm->pre_b_noisy = %d\n", p_dm->pre_b_noisy ));*/
-	if (p_dm->pre_b_noisy != p_dm->noisy_decision) {
-
-		if (p_dm->noisy_decision) {
-			PHYDM_DBG(p_dm, DBG_RA, ("Noisy Env. RA fallback\n"));
-			odm_set_mac_reg(p_dm, 0x430, MASKDWORD, 0x0);
-			odm_set_mac_reg(p_dm, 0x434, MASKDWORD, 0x04030201);
+#if 0
+	/*PHYDM_DBG(dm, DBG_RA, "dm->pre_b_noisy = %d\n", dm->pre_b_noisy );*/
+#endif
+	if (dm->pre_b_noisy != dm->noisy_decision) {
+		if (dm->noisy_decision) {
+			PHYDM_DBG(dm, DBG_DYN_ARFR, "Noisy Env. RA fallback\n");
+			odm_set_mac_reg(dm, R_0x430, MASKDWORD, 0x0);
+			odm_set_mac_reg(dm, R_0x434, MASKDWORD, 0x04030201);
 		} else {
-			PHYDM_DBG(p_dm, DBG_RA, ("Clean Env. RA fallback\n"));
-			odm_set_mac_reg(p_dm, 0x430, MASKDWORD, 0x01000000);
-			odm_set_mac_reg(p_dm, 0x434, MASKDWORD, 0x06050402);
+			PHYDM_DBG(dm, DBG_DYN_ARFR, "Clean Env. RA fallback\n");
+			odm_set_mac_reg(dm, R_0x430, MASKDWORD, 0x01000000);
+			odm_set_mac_reg(dm, R_0x434, MASKDWORD, 0x06050402);
 		}
-		p_dm->pre_b_noisy = p_dm->noisy_decision;
+		dm->pre_b_noisy = dm->noisy_decision;
 	}
 }
 
-void
-phydm_print_rate(
-	void	*p_dm_void,
-	u8	rate,
-	u32	dbg_component
-)
+void phydm_print_rate(void *dm_void, u8 rate, u32 dbg_component)
 {
-	struct PHY_DM_STRUCT	*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	u8		legacy_table[12] = {1, 2, 5, 11, 6, 9, 12, 18, 24, 36, 48, 54};
-	u8		rate_idx = rate & 0x7f; /*remove bit7 SGI*/
-	u8		vht_en = (rate_idx >= ODM_RATEVHTSS1MCS0) ? 1 : 0;
-	u8		b_sgi = (rate & 0x80) >> 7;
-
-	PHYDM_DBG_F(p_dm, dbg_component, ("( %s%s%s%s%d%s%s)\n",
-		((rate_idx >= ODM_RATEVHTSS1MCS0) && (rate_idx <= ODM_RATEVHTSS1MCS9)) ? "VHT 1ss  " : "",
-		((rate_idx >= ODM_RATEVHTSS2MCS0) && (rate_idx <= ODM_RATEVHTSS2MCS9)) ? "VHT 2ss " : "",
-		((rate_idx >= ODM_RATEVHTSS3MCS0) && (rate_idx <= ODM_RATEVHTSS3MCS9)) ? "VHT 3ss " : "",
-			(rate_idx >= ODM_RATEMCS0) ? "MCS " : "",
-		(vht_en) ? ((rate_idx - ODM_RATEVHTSS1MCS0) % 10) : ((rate_idx >= ODM_RATEMCS0) ? (rate_idx - ODM_RATEMCS0) : ((rate_idx <= ODM_RATE54M) ? legacy_table[rate_idx] : 0)),
-			(b_sgi) ? "-S" : "  ",
-			(rate_idx >= ODM_RATEMCS0) ? "" : "M"));
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	u8 rate_idx = rate & 0x7f; /*remove bit7 SGI*/
+	boolean vht_en = phydm_is_vht_rate(dm, rate_idx);
+	u8 b_sgi = (rate & 0x80) >> 7;
+	u8 rate_ss = phydm_rate_to_num_ss(dm, rate_idx);
+	u8 rate_digit = phydm_rate_2_rate_digit(dm, rate_idx);
+
+	PHYDM_DBG_F(dm, dbg_component, "( %s%s%s%s%s%d%s%s)\n",
+		    (vht_en && (rate_ss == 1)) ? "VHT 1ss " : "",
+		    (vht_en && (rate_ss == 2)) ? "VHT 2ss " : "",
+		    (vht_en && (rate_ss == 3)) ? "VHT 3ss " : "",
+		    (vht_en && (rate_ss == 4)) ? "VHT 4ss " : "",
+		    (rate_idx >= ODM_RATEMCS0) ? "MCS " : "",
+		    rate_digit,
+		    (b_sgi) ? "-S" : " ",
+		    (rate_idx >= ODM_RATEMCS0) ? "" : "M");
 }
 
-void
-phydm_c2h_ra_report_handler(
-	void	*p_dm_void,
-	u8   *cmd_buf,
-	u8   cmd_len
-)
+void phydm_print_rate_2_buff(void *dm_void, u8 rate, char *buf, u16 buf_size)
 {
-	struct PHY_DM_STRUCT	*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	struct _rate_adaptive_table_		*p_ra_table = &p_dm->dm_ra_table;
-	u8	macid = cmd_buf[1];
-	u8	rate = cmd_buf[0];
-	u8	rate_idx = rate & 0x7f; /*remove bit7 SGI*/
-	u8	rate_order;
-	struct cmn_sta_info			*p_sta = p_dm->p_phydm_sta_info[macid];
-
-	if (cmd_len >=6) {
-		p_ra_table->ra_ratio[macid] = cmd_buf[6];
-		PHYDM_DBG(p_dm, DBG_RA, ("RA retry ratio: [%d]:", p_ra_table->ra_ratio[macid]));
-			/**/
-	} else if (cmd_len >= 4) {
-		if (cmd_buf[3] == 0) {
-			PHYDM_DBG(p_dm, DBG_RA, ("TX Init-rate Update[%d]:", macid));
-			/**/
-		} else if (cmd_buf[3] == 0xff) {
-			PHYDM_DBG(p_dm, DBG_RA, ("FW Level: Fix rate[%d]:", macid));
-			/**/
-		} else if (cmd_buf[3] == 1) {
-			PHYDM_DBG(p_dm, DBG_RA, ("Try Success[%d]:", macid));
-			/**/
-		} else if (cmd_buf[3] == 2) {
-			PHYDM_DBG(p_dm, DBG_RA, ("Try Fail & Try Again[%d]:", macid));
-			/**/
-		} else if (cmd_buf[3] == 3) {
-			PHYDM_DBG(p_dm, DBG_RA, ("rate Back[%d]:", macid));
-			/**/
-		} else if (cmd_buf[3] == 4) {
-			PHYDM_DBG(p_dm, DBG_RA, ("start rate by RSSI[%d]:", macid));
-			/**/
-		} else if (cmd_buf[3] == 5) {
-			PHYDM_DBG(p_dm, DBG_RA, ("Try rate[%d]:", macid));
-			/**/
-		}
-	} else {
-		PHYDM_DBG(p_dm, DBG_RA, ("Tx rate Update[%d]:", macid));
-		/**/
-	}
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	u8 rate_idx = rate & 0x7f; /*remove bit7 SGI*/
+	boolean vht_en = phydm_is_vht_rate(dm, rate_idx);
+	u8 b_sgi = (rate & 0x80) >> 7;
+	u8 rate_ss = phydm_rate_to_num_ss(dm, rate_idx);
+	u8 rate_digit = phydm_rate_2_rate_digit(dm, rate_idx);
+
+	PHYDM_SNPRINTF(buf, buf_size, "( %s%s%s%s%d%s%s)",
+		       (vht_en && (rate_ss == 1)) ? "VHT 1ss " : "",
+		       (vht_en && (rate_ss == 2)) ? "VHT 2ss " : "",
+		       (vht_en && (rate_ss == 3)) ? "VHT 3ss " : "",
+		       (rate_idx >= ODM_RATEMCS0) ? "MCS " : "",
+		       rate_digit,
+		       (b_sgi) ? "-S" : " ",
+		       (rate_idx >= ODM_RATEMCS0) ? "" : "M");
+}
+
+void phydm_c2h_ra_report_handler(void *dm_void, u8 *cmd_buf, u8 cmd_len)
+{
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct ra_table *ra_tab = &dm->dm_ra_table;
+	struct cmn_sta_info *sta = NULL;
+	u8 macid = cmd_buf[1];
+	u8 rate = cmd_buf[0];
+	u8 ra_ratio = 0xff;
+	u8 curr_bw = 0xff;
+	u8 rate_idx = rate & 0x7f; /*remove bit7 SGI*/
+	u8 rate_order;
+	u8 gid_index = 0;
+	char dbg_buf[PHYDM_SNPRINT_SIZE] = {0};
+
+	#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
+	sta = dm->phydm_sta_info[dm->phydm_macid_table[macid]];
+	#else
+	sta = dm->phydm_sta_info[macid];
+	#endif
+
+	if (cmd_len >= 7) {
+		ra_ratio = cmd_buf[5];
+		curr_bw = cmd_buf[6];
+		PHYDM_DBG(dm, DBG_RA, "[%d] PER=%d\n", macid, ra_ratio);
+	}
+
+	if (cmd_buf[3] != 0) {
+		if (cmd_buf[3] == 0xff)
+			PHYDM_DBG(dm, DBG_RA, "FW Fix Rate\n");
+		else if (cmd_buf[3] == 1)
+			PHYDM_DBG(dm, DBG_RA, "Try Success\n");
+		else if (cmd_buf[3] == 2)
+			PHYDM_DBG(dm, DBG_RA, "Try Fail & Again\n");
+		else if (cmd_buf[3] == 3)
+			PHYDM_DBG(dm, DBG_RA, "Rate Back\n");
+		else if (cmd_buf[3] == 4)
+			PHYDM_DBG(dm, DBG_RA, "Start rate by RSSI\n");
+		else if (cmd_buf[3] == 5)
+			PHYDM_DBG(dm, DBG_RA, "Try rate\n");
+	}
+	phydm_print_rate_2_buff(dm, rate, dbg_buf, PHYDM_SNPRINT_SIZE);
+	PHYDM_DBG(dm, DBG_RA, "Tx Rate=%s (%d)", dbg_buf, rate);
 
-	/*phydm_print_rate(p_dm, pre_rate_idx, DBG_RA);*/
-	/*PHYDM_DBG(p_dm, DBG_RA, (">\n",macid );*/
-	phydm_print_rate(p_dm, rate, DBG_RA);
 	if (macid >= 128) {
-		u8 gid_index = macid - 128;
-		p_ra_table->mu1_rate[gid_index] = rate;
+		gid_index = macid - 128;
+		ra_tab->mu1_rate[gid_index] = rate;
 	}
-	
-	/*p_ra_table->link_tx_rate[macid] = rate;*/
-		
-	if (is_sta_active(p_sta)) {
-		p_sta->ra_info.curr_tx_rate = rate;
-		/**/
+
+	/*@ra_tab->link_tx_rate[macid] = rate;*/
+
+	if (is_sta_active(sta)) {
+		sta->ra_info.curr_tx_rate = rate;
+		sta->ra_info.curr_tx_bw = (enum channel_width)curr_bw;
+		sta->ra_info.curr_retry_ratio = ra_ratio;
 	}
 
 	/*trigger power training*/
 #if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_CE))
 
-	rate_order = phydm_rate_order_compute(p_dm, rate_idx);
+	rate_order = phydm_rate_order_compute(dm, rate_idx);
 
-	if ((p_dm->is_one_entry_only) ||
-		((rate_order > p_ra_table->highest_client_tx_order) && (p_ra_table->power_tracking_flag == 1))
-		) {
-		halrf_update_pwr_track(p_dm, rate_idx);
-		p_ra_table->power_tracking_flag = 0;
+	if (dm->is_one_entry_only ||
+	    (rate_order > ra_tab->highest_client_tx_order &&
+	    ra_tab->power_tracking_flag == 1)) {
+		halrf_update_pwr_track(dm, rate_idx);
+		ra_tab->power_tracking_flag = 0;
 	}
 
 #endif
 
-	/*trigger dynamic rate ID*/
-/*#if (defined(CONFIG_RA_DYNAMIC_RATE_ID))*/	/*dino will refine here later*/
 #if 0
-	if (p_dm->support_ic_type & (ODM_RTL8812 | ODM_RTL8192E))
-		phydm_update_rate_id(p_dm, rate, macid);
+	/*trigger dynamic rate ID*/
+	if (dm->support_ic_type & (ODM_RTL8812 | ODM_RTL8192E))
+		phydm_update_rate_id(dm, rate, macid);
 #endif
-
 }
 
-void
-odm_ra_post_action_on_assoc(
-	void	*p_dm_void
-)
+void odm_ra_post_action_on_assoc(void *dm_void)
 {
 #if 0
-	struct PHY_DM_STRUCT	*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
+	struct dm_struct	*dm = (struct dm_struct *)dm_void;
 
-	p_dm->h2c_rarpt_connect = 1;
-	phydm_rssi_monitor_check(p_dm);
-	p_dm->h2c_rarpt_connect = 0;
+	dm->h2c_rarpt_connect = 1;
+	phydm_rssi_monitor_check(dm);
+	dm->h2c_rarpt_connect = 0;
 #endif
 }
 
-void
-phydm_modify_RA_PCR_threshold(
-	void		*p_dm_void,
-	u8		RA_offset_direction,
-	u8		RA_threshold_offset
-
-)
+void phydm_modify_RA_PCR_threshold(void *dm_void, u8 ra_ofst_direc,
+				   u8 ra_th_ofst)
 {
-	struct PHY_DM_STRUCT		*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	struct _rate_adaptive_table_			*p_ra_table = &p_dm->dm_ra_table;
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct ra_table *ra_tab = &dm->dm_ra_table;
 
-	p_ra_table->RA_offset_direction = RA_offset_direction;
-	p_ra_table->RA_threshold_offset = RA_threshold_offset;
-	PHYDM_DBG(p_dm, DBG_RA, ("Set RA_threshold_offset = (( %s%d ))\n", ((RA_threshold_offset == 0) ? " " : ((RA_offset_direction) ? "+" : "-")), RA_threshold_offset));
+	ra_tab->ra_ofst_direc = ra_ofst_direc;
+	ra_tab->ra_th_ofst = ra_th_ofst;
+	PHYDM_DBG(dm, DBG_RA_MASK, "Set ra_th_offset=(( %s%d ))\n",
+		  ((ra_ofst_direc) ? "+" : "-"), ra_th_ofst);
 }
 
-#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
+#if (DM_ODM_SUPPORT_TYPE == ODM_AP)
 
-void
-odm_refresh_rate_adaptive_mask_mp(
-	void		*p_dm_void
-)
+void phydm_gen_ramask_h2c_AP(
+	void *dm_void,
+	struct rtl8192cd_priv *priv,
+	struct sta_info *entry,
+	u8 rssi_level)
 {
-	struct PHY_DM_STRUCT				*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	struct _rate_adaptive_table_					*p_ra_table = &p_dm->dm_ra_table;
-	struct _ADAPTER				*p_adapter	 =  p_dm->adapter;
-	struct _ADAPTER				*p_target_adapter = NULL;
-	HAL_DATA_TYPE			*p_hal_data = GET_HAL_DATA(p_adapter);
-	PMGNT_INFO				p_mgnt_info = GetDefaultMgntInfo(p_adapter);
-	struct _ADAPTER			*p_loop_adapter = GetDefaultAdapter(p_adapter);
-	PMGNT_INFO					p_loop_mgnt_info = &(p_loop_adapter->MgntInfo);
-	HAL_DATA_TYPE				*p_loop_hal_data = GET_HAL_DATA(p_loop_adapter);
-	
-	u32		i;
-	struct sta_info *p_entry;
-	u8		ratr_state_new;
-
-	PHYDM_DBG(p_dm, DBG_RA_MASK, ("%s ======>\n", __func__));
-
-	if (p_adapter->bDriverStopped) {
-		PHYDM_DBG(p_dm, DBG_RA_MASK, ("driver is going to unload\n"));
-		return;
-	}
-
-	if (!p_hal_data->bUseRAMask) {
-		PHYDM_DBG(p_dm, DBG_RA_MASK, ("driver does not control rate adaptive mask\n"));
-		return;
-	}
-
-	/* if default port is connected, update RA table for default port (infrastructure mode only) */
-	/* Need to consider other ports for P2P cases*/
-
-	while(p_loop_adapter){
-
-		p_loop_mgnt_info = &(p_loop_adapter->MgntInfo);
-		p_loop_hal_data = GET_HAL_DATA(p_loop_adapter);
-	
-		if (p_loop_mgnt_info->mAssoc && (!ACTING_AS_AP(p_loop_adapter))) {
-			odm_refresh_ldpc_rts_mp(p_loop_adapter, p_dm, p_loop_mgnt_info->mMacId, p_loop_mgnt_info->IOTPeer, p_loop_hal_data->UndecoratedSmoothedPWDB);
-		/*PHYDM_DBG(p_dm, DBG_RA_MASK, ("Infrasture mode\n"));*/
-
-			ratr_state_new = phydm_rssi_lv_dec(p_dm, p_loop_hal_data->UndecoratedSmoothedPWDB, p_loop_mgnt_info->Ratr_State);
-
-			if ((p_loop_mgnt_info->Ratr_State != ratr_state_new) || (p_ra_table->up_ramask_cnt >= FORCED_UPDATE_RAMASK_PERIOD)) {
-
-				p_ra_table->up_ramask_cnt = 0;
-				PHYDM_PRINT_ADDR(p_dm, DBG_RA_MASK, ("Target AP addr :"), p_loop_mgnt_info->Bssid);
-				PHYDM_DBG(p_dm, DBG_RA_MASK, ("Update RA Level: ((%x)) -> ((%x)),  RSSI = ((%d))\n\n",
-					p_mgnt_info->Ratr_State, ratr_state_new, p_loop_hal_data->UndecoratedSmoothedPWDB));
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
 
-				p_loop_mgnt_info->Ratr_State = ratr_state_new;
-				p_adapter->HalFunc.UpdateHalRAMaskHandler(p_loop_adapter, p_loop_mgnt_info->mMacId, NULL, ratr_state_new);
-			} else {
-				PHYDM_DBG(p_dm, DBG_RA_MASK, ("Stay in RA level  = (( %d ))\n\n", ratr_state_new));
-				/**/
-			}
-		}
-
-		p_loop_adapter = GetNextExtAdapter(p_loop_adapter);
+	if (dm->support_ic_type == ODM_RTL8812) {
+		#if (RTL8812A_SUPPORT == 1)
+		UpdateHalRAMask8812(priv, entry, rssi_level);
+		#endif
+	} else if (dm->support_ic_type == ODM_RTL8188E) {
+		#if (RTL8188E_SUPPORT == 1)
+		#ifdef TXREPORT
+		add_RATid(priv, entry);
+		#endif
+		#endif
+	} else {
+		#ifdef CONFIG_WLAN_HAL
+		GET_HAL_INTERFACE(priv)->UpdateHalRAMaskHandler(priv, entry, rssi_level);
+		#endif
 	}
+}
 
-	/*  */
-	/* The following part configure AP/VWifi/IBSS rate adaptive mask. */
-	/*  */
-
-	if (p_mgnt_info->mIbss)	/* Target: AP/IBSS peer. */
-		p_target_adapter = GetDefaultAdapter(p_adapter);
-	else
-		p_target_adapter = GetFirstAPAdapter(p_adapter);
+void phydm_update_hal_ra_mask(
+	void *dm_void,
+	u32 wireless_mode,
+	u8 rf_type,
+	u8 bw,
+	u8 mimo_ps_enable,
+	u8 disable_cck_rate,
+	u32 *ratr_bitmap_msb_in,
+	u32 *ratr_bitmap_lsb_in,
+	u8 tx_rate_level)
+{
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	u32 ratr_bitmap = *ratr_bitmap_lsb_in;
+	u32 ratr_bitmap_msb = *ratr_bitmap_msb_in;
 
-	/* if extension port (softap) is started, updaet RA table for more than one clients associate */
-	if (p_target_adapter != NULL) {
-		for (i = 0; i < ODM_ASSOCIATE_ENTRY_NUM; i++) {
+#if 0
+	/*PHYDM_DBG(dm, DBG_RA_MASK, "phydm_rf_type = (( %x )), rf_type = (( %x ))\n", phydm_rf_type, rf_type);*/
+#endif
+	PHYDM_DBG(dm, DBG_RA_MASK,
+		  "Platfoem original RA Mask = (( 0x %x | %x ))\n",
+		  ratr_bitmap_msb, ratr_bitmap);
 
-			p_entry = AsocEntry_EnumStation(p_target_adapter, i);
+	switch (wireless_mode) {
+	case PHYDM_WIRELESS_MODE_B: {
+		ratr_bitmap &= 0x0000000f;
+	} break;
 
-			if (is_sta_active((&GET_STA_INFO(p_entry)))) {
+	case PHYDM_WIRELESS_MODE_G: {
+		ratr_bitmap &= 0x00000ff5;
+	} break;
 
-				odm_refresh_ldpc_rts_mp(p_target_adapter, p_dm, GET_STA_INFO(p_entry).mac_id, p_entry->IOTPeer, GET_STA_INFO(p_entry).rssi_stat.rssi);
+	case PHYDM_WIRELESS_MODE_A: {
+		ratr_bitmap &= 0x00000ff0;
+	} break;
 
-				ratr_state_new = phydm_rssi_lv_dec(p_dm, GET_STA_INFO(p_entry).rssi_stat.rssi, GET_STA_INFO(p_entry).ra_info.rssi_level);
+	case PHYDM_WIRELESS_MODE_N_24G:
+	case PHYDM_WIRELESS_MODE_N_5G: {
+		if (mimo_ps_enable)
+			rf_type = RF_1T1R;
 
-				if ((GET_STA_INFO(p_entry).ra_info.rssi_level != ratr_state_new) || (p_ra_table->up_ramask_cnt >= FORCED_UPDATE_RAMASK_PERIOD)) {
+		if (rf_type == RF_1T1R) {
+			if (bw == CHANNEL_WIDTH_40)
+				ratr_bitmap &= 0x000ff015;
+			else
+				ratr_bitmap &= 0x000ff005;
+		} else if (rf_type == RF_2T2R || rf_type == RF_2T4R || rf_type == RF_2T3R) {
+			if (bw == CHANNEL_WIDTH_40)
+				ratr_bitmap &= 0x0ffff015;
+			else
+				ratr_bitmap &= 0x0ffff005;
+		} else { /*@3T*/
 
-					p_ra_table->up_ramask_cnt = 0;
-					PHYDM_PRINT_ADDR(p_dm, DBG_RA_MASK, ("Target AP addr :"), GET_STA_INFO(p_entry).mac_addr);
-					PHYDM_DBG(p_dm, DBG_RA_MASK, ("Update Tx RA Level: ((%x)) -> ((%x)),  RSSI = ((%d))\n",
-						GET_STA_INFO(p_entry).ra_info.rssi_level, ratr_state_new,  GET_STA_INFO(p_entry).rssi_stat.rssi));
+			ratr_bitmap &= 0xfffff015;
+			ratr_bitmap_msb &= 0xf;
+		}
+	} break;
 
-					GET_STA_INFO(p_entry).ra_info.rssi_level = ratr_state_new;
-					p_adapter->HalFunc.UpdateHalRAMaskHandler(p_target_adapter, GET_STA_INFO(p_entry).mac_id, p_entry, ratr_state_new);
-				} else {
-					PHYDM_DBG(p_dm, DBG_RA_MASK, ("Stay in RA level  = (( %d ))\n\n", ratr_state_new));
-					/**/
-				}
+	case PHYDM_WIRELESS_MODE_AC_24G: {
+		if (rf_type == RF_1T1R) {
+			ratr_bitmap &= 0x003ff015;
+		} else if (rf_type == RF_2T2R || rf_type == RF_2T4R || rf_type == RF_2T3R) {
+			ratr_bitmap &= 0xfffff015;
+		} else { /*@3T*/
 
-			}
+			ratr_bitmap &= 0xfffff010;
+			ratr_bitmap_msb &= 0x3ff;
 		}
-	}
-}
 
-#elif (DM_ODM_SUPPORT_TYPE == ODM_AP)
+		if (bw == CHANNEL_WIDTH_20) { /*@AC 20MHz not support MCS9*/
+			ratr_bitmap &= 0x7fdfffff;
+			ratr_bitmap_msb &= 0x1ff;
+		}
+	} break;
 
-void
-odm_refresh_rate_adaptive_mask_ap(
-	void	*p_dm_void
-)
-{
-	struct PHY_DM_STRUCT		*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	struct _rate_adaptive_table_			*p_ra_table = &p_dm->dm_ra_table;
-	struct rtl8192cd_priv *priv = p_dm->priv;
-	struct aid_obj *aidarray;
-	u32		i;
-	struct sta_info *p_entry;
-	struct cmn_sta_info	*p_sta;
-	u8		ratr_state_new;
-
-	if (priv->up_time % 2)
-		return;
+	case PHYDM_WIRELESS_MODE_AC_5G: {
+		if (rf_type == RF_1T1R) {
+			ratr_bitmap &= 0x003ff010;
+		} else if (rf_type == RF_2T2R || rf_type == RF_2T4R || rf_type == RF_2T3R) {
+			ratr_bitmap &= 0xfffff010;
+		} else { /*@3T*/
 
-	for (i = 0; i < ODM_ASSOCIATE_ENTRY_NUM; i++) {
-		p_entry = p_dm->p_odm_sta_info[i];
-		p_sta = p_dm->p_phydm_sta_info[i];
+			ratr_bitmap &= 0xfffff010;
+			ratr_bitmap_msb &= 0x3ff;
+		}
 
-		if (is_sta_active(p_sta)) {
+		if (bw == CHANNEL_WIDTH_20) { /*@AC 20MHz not support MCS9*/
+			ratr_bitmap &= 0x7fdfffff;
+			ratr_bitmap_msb &= 0x1ff;
+		}
+	} break;
 
-			#if defined(UNIVERSAL_REPEATER) || defined(MBSSID)
-			aidarray = container_of(p_entry, struct aid_obj, station);
-			priv = aidarray->priv;
-			#endif
+	default:
+		break;
+	}
 
-			if (!priv->pmib->dot11StationConfigEntry.autoRate)
-				continue;
+	if (wireless_mode != PHYDM_WIRELESS_MODE_B) {
+		if (tx_rate_level == 0)
+			ratr_bitmap &= 0xffffffff;
+		else if (tx_rate_level == 1)
+			ratr_bitmap &= 0xfffffff0;
+		else if (tx_rate_level == 2)
+			ratr_bitmap &= 0xffffefe0;
+		else if (tx_rate_level == 3)
+			ratr_bitmap &= 0xffffcfc0;
+		else if (tx_rate_level == 4)
+			ratr_bitmap &= 0xffff8f80;
+		else if (tx_rate_level >= 5)
+			ratr_bitmap &= 0xffff0f00;
+	}
 
-			ratr_state_new = phydm_rssi_lv_dec(p_dm, (u32)p_sta->rssi_stat.rssi, p_sta->ra_info.rssi_level);
+	if (disable_cck_rate)
+		ratr_bitmap &= 0xfffffff0;
 
-			if ((p_sta->ra_info.rssi_level != ratr_state_new) || (p_ra_table->up_ramask_cnt >= FORCED_UPDATE_RAMASK_PERIOD)) {
+	PHYDM_DBG(dm, DBG_RA_MASK,
+		  "wireless_mode= (( 0x%x )), rf_type = (( 0x%x )), BW = (( 0x%x )), MimoPs_en = (( %d )), tx_rate_level= (( 0x%x ))\n",
+		  wireless_mode, rf_type, bw, mimo_ps_enable, tx_rate_level);
 
-				p_ra_table->up_ramask_cnt = 0;
-				PHYDM_PRINT_ADDR(p_dm, DBG_RA_MASK, ("Target AP addr :"), p_sta->mac_addr);
-				PHYDM_DBG(p_dm, DBG_RA_MASK, ("Update Tx RA Level: ((%x)) -> ((%x)),  RSSI = ((%d))\n", p_sta->ra_info.rssi_level, ratr_state_new, p_sta->rssi_stat.rssi));
+#if 0
+	/*PHYDM_DBG(dm, DBG_RA_MASK, "111 Phydm modified RA Mask = (( 0x %x | %x ))\n", ratr_bitmap_msb, ratr_bitmap);*/
+#endif
 
-				p_sta->ra_info.rssi_level = ratr_state_new;
-				phydm_gen_ramask_h2c_AP(p_dm, priv, p_entry, p_sta->ra_info.rssi_level);
-			} else {
-				PHYDM_DBG(p_dm, DBG_RA_MASK, ("Stay in RA level  = (( %d ))\n\n", ratr_state_new));
-				/**/
-			}
-		}
-	}
+	*ratr_bitmap_lsb_in = ratr_bitmap;
+	*ratr_bitmap_msb_in = ratr_bitmap_msb;
+	PHYDM_DBG(dm, DBG_RA_MASK,
+		  "Phydm modified RA Mask = (( 0x %x | %x ))\n",
+		  *ratr_bitmap_msb_in, *ratr_bitmap_lsb_in);
 }
+
 #endif
 
-void
-phydm_rate_adaptive_mask_init(
-	void	*p_dm_void
-)
+void phydm_rate_adaptive_mask_init(void *dm_void)
 {
-	struct PHY_DM_STRUCT		*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	struct _rate_adaptive_table_	*p_ra_t = &p_dm->dm_ra_table;
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct ra_table *ra_t = &dm->dm_ra_table;
 
 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
-	PMGNT_INFO		p_mgnt_info = &p_dm->adapter->MgntInfo;
-	HAL_DATA_TYPE	*p_hal_data = GET_HAL_DATA(p_dm->adapter);
+	PADAPTER adapter = dm->adapter;
+	PMGNT_INFO mgnt_info = &(adapter->MgntInfo);
+	HAL_DATA_TYPE *hal_data = GET_HAL_DATA(((PADAPTER)dm->adapter));
 
-	p_mgnt_info->Ratr_State = DM_RATR_STA_INIT;
-
-	if (p_mgnt_info->DM_Type == dm_type_by_driver)
-		p_hal_data->bUseRAMask = true;
+	if (mgnt_info->DM_Type == dm_type_by_driver)
+		hal_data->bUseRAMask = true;
 	else
-		p_hal_data->bUseRAMask = false;
+		hal_data->bUseRAMask = false;
 
 #endif
 
-	p_ra_t->ldpc_thres = 35;
-	p_ra_t->up_ramask_cnt = 0;
-	p_ra_t->up_ramask_cnt_tmp = 0;
-
+	ra_t->ldpc_thres = 35;
+	ra_t->up_ramask_cnt = 0;
+	ra_t->up_ramask_cnt_tmp = 0;
 }
 
-void
-phydm_refresh_rate_adaptive_mask(
-	void	*p_dm_void
-)
+void phydm_refresh_rate_adaptive_mask(void *dm_void)
 {
-	struct PHY_DM_STRUCT		*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	struct _rate_adaptive_table_	*p_ra_t = &p_dm->dm_ra_table;
-
-	PHYDM_DBG(p_dm, DBG_RA_MASK, ("%s ======>\n", __func__));
-
-	if (!(p_dm->support_ability & ODM_BB_RA_MASK)) {
-		PHYDM_DBG(p_dm, DBG_RA_MASK, ("Return: Not support\n"));
-		return;
-	}
+/*@Will be removed*/
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
 
-	if (!p_dm->is_linked)
-		return;
-
-	p_ra_t->up_ramask_cnt++;
-	/*p_ra_t->up_ramask_cnt_tmp++;*/
-	
-
-#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
-
-	odm_refresh_rate_adaptive_mask_mp(p_dm);
-
-#elif (DM_ODM_SUPPORT_TYPE & ODM_AP)
-
-	odm_refresh_rate_adaptive_mask_ap(p_dm);
-
-#else /*(DM_ODM_SUPPORT_TYPE == ODM_CE)*/
-
-	phydm_ra_mask_watchdog(p_dm);
-
-#endif
-	
+	phydm_ra_mask_watchdog(dm);
 }
 
-void
-phydm_show_sta_info(
-	void		*p_dm_void,
-	char		input[][16],
-	u32		*_used,
-	char		*output,
-	u32		*_out_len,
-	u32		input_num
-)
+void phydm_show_sta_info(void *dm_void, char input[][16], u32 *_used,
+			 char *output, u32 *_out_len)
 {
-	struct PHY_DM_STRUCT	*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	struct cmn_sta_info		*p_sta = NULL;
-	struct ra_sta_info			*p_ra = NULL;
-	#ifdef CONFIG_BEAMFORMING
-	struct bf_cmn_info		*p_bf = NULL;
-	#endif
-	char		help[] = "-h";
-	u32		var1[10] = {0};
-	u32		used = *_used;
-	u32		out_len = *_out_len;
-	u32		i, macid_start, macid_end;
-	u8		tatal_sta_num = 0;
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct cmn_sta_info *sta = NULL;
+	struct ra_sta_info *ra = NULL;
+#ifdef CONFIG_BEAMFORMING
+	struct bf_cmn_info *bf = NULL;
+#endif
+	char help[] = "-h";
+	u32 var[10] = {0};
+	u32 used = *_used;
+	u32 out_len = *_out_len;
+	u32 i, sta_idx_start, sta_idx_end;
+	u8 tatal_sta_num = 0;
 
-	PHYDM_SSCANF(input[1], DCMD_DECIMAL, &var1[0]);
+	PHYDM_SSCANF(input[1], DCMD_DECIMAL, &var[0]);
 
 	if ((strcmp(input[1], help) == 0)) {
-		PHYDM_SNPRINTF((output + used, out_len - used, "All STA: {1}\n"));
-		PHYDM_SNPRINTF((output + used, out_len - used, "STA[macid]: {2} {macid}\n"));
+		PDM_SNPF(out_len, used, output + used, out_len - used,
+			 "All STA: {1}\n");
+		PDM_SNPF(out_len, used, output + used, out_len - used,
+			 "STA[macid]: {2} {macid}\n");
 		return;
-	} else if (var1[0] == 1) {
-		macid_start = 0;
-		macid_end = ODM_ASSOCIATE_ENTRY_NUM;
-	} else if (var1[0] == 2) {
-		macid_start = var1[1];
-		macid_end = var1[1];
+	} else if (var[0] == 1) {
+		sta_idx_start = 0;
+		sta_idx_end = ODM_ASSOCIATE_ENTRY_NUM;
+	} else if (var[0] == 2) {
+		sta_idx_start = var[1];
+		sta_idx_end = var[1];
 	} else {
-		PHYDM_SNPRINTF((output + used, out_len - used, "Warning input value!\n"));
+		PDM_SNPF(out_len, used, output + used, out_len - used,
+			 "Warning input value!\n");
 		return;
 	}
-		
-	for (i = macid_start; i < macid_end; i++) {
-		
-		p_sta = p_dm->p_phydm_sta_info[i];
 
+	for (i = sta_idx_start; i < sta_idx_end; i++) {
+		sta = dm->phydm_sta_info[i];
 
-		if (!is_sta_active(p_sta))
+		if (!is_sta_active(sta))
 			continue;
 
-		p_ra = &(p_sta->ra_info);
+		ra = &sta->ra_info;
 		#ifdef CONFIG_BEAMFORMING
-		p_bf = &(p_sta->bf_info);
+		bf = &sta->bf_info;
 		#endif
 
 		tatal_sta_num++;
 
-		PHYDM_SNPRINTF((output + used, out_len - used, "==[MACID: %d]============>\n", p_sta->mac_id));
-		PHYDM_SNPRINTF((output + used, out_len - used, "AID:%d\n", p_sta->aid));
-		PHYDM_SNPRINTF((output + used, out_len - used, "ADDR:%x-%x-%x-%x-%x-%x\n", 
-		p_sta->mac_addr[5], p_sta->mac_addr[4], p_sta->mac_addr[3], p_sta->mac_addr[2], p_sta->mac_addr[1], p_sta->mac_addr[0]));
-		PHYDM_SNPRINTF((output + used, out_len - used, "DM_ctrl:0x%x\n", p_sta->dm_ctrl));
-		PHYDM_SNPRINTF((output + used, out_len - used, "BW:%d, MIMO_Type:0x%x\n", p_sta->bw_mode, p_sta->mimo_type));
-		PHYDM_SNPRINTF((output + used, out_len - used, "STBC_en:%d, LDPC_en=%d\n", p_sta->stbc_en, p_sta->ldpc_en));
-
-		/*[RSSI Info]*/
-		PHYDM_SNPRINTF((output + used, out_len - used, "RSSI{All, OFDM, CCK}={%d, %d, %d}\n", 
-			p_sta->rssi_stat.rssi, p_sta->rssi_stat.rssi_ofdm, p_sta->rssi_stat.rssi_cck));
-
-		/*[RA Info]*/
-		PHYDM_SNPRINTF((output + used, out_len - used, "Rate_ID:%d, RSSI_LV:%d, ra_bw:%d, SGI_en:%d\n", 
-			p_ra->rate_id, p_ra->rssi_level, p_ra->ra_bw_mode, p_ra->is_support_sgi));
-
-		PHYDM_SNPRINTF((output + used, out_len - used, "VHT_en:%d, Wireless_set=0x%x, sm_ps=%d\n", 
-			p_ra->is_vht_enable, p_sta->support_wireless_set, p_sta->sm_ps));
-
-		PHYDM_SNPRINTF((output + used, out_len - used, "Dis{RA, PT}={%d, %d}, TxRx:%d, Noisy:%d\n", 
-			p_ra->disable_ra, p_ra->disable_pt, p_ra->txrx_state, p_ra->is_noisy));
-		
-		PHYDM_SNPRINTF((output + used, out_len - used, "TX{Rate, BW}={%d, %d}, RTY:%d\n", 
-			p_ra->curr_tx_rate, p_ra->curr_tx_bw, p_ra->curr_retry_ratio));
-	
-		PHYDM_SNPRINTF((output + used, out_len - used, "RA_MAsk:0x%llx\n", p_ra->ramask));
-		
-		/*[TP]*/
-		PHYDM_SNPRINTF((output + used, out_len - used, "TP{TX,RX}={%d, %d}\n", 
-			p_sta->tx_moving_average_tp, p_sta->rx_moving_average_tp));
-
-		#ifdef CONFIG_BEAMFORMING
-		/*[Beamforming]*/
-		PHYDM_SNPRINTF((output + used, out_len - used, "CAP{HT,VHT}={0x%x, 0x%x}\n", 
-			p_bf->ht_beamform_cap, p_bf->vht_beamform_cap));
-		PHYDM_SNPRINTF((output + used, out_len - used, "{p_aid,g_id}={0x%x, 0x%x}\n\n", 
-			p_bf->p_aid, p_bf->g_id));
-		#endif
+		PDM_SNPF(out_len, used, output + used, out_len - used,
+			 "==[sta_idx: %d][MACID: %d]============>\n", i,
+			 sta->mac_id);
+		PDM_SNPF(out_len, used, output + used, out_len - used,
+			 "AID:%d\n", sta->aid);
+		PDM_SNPF(out_len, used, output + used, out_len - used,
+			 "ADDR:%x-%x-%x-%x-%x-%x\n", sta->mac_addr[5],
+			 sta->mac_addr[4], sta->mac_addr[3], sta->mac_addr[2],
+			 sta->mac_addr[1], sta->mac_addr[0]);
+		PDM_SNPF(out_len, used, output + used, out_len - used,
+			 "DM_ctrl:0x%x\n", sta->dm_ctrl);
+		PDM_SNPF(out_len, used, output + used, out_len - used,
+			 "BW:%d, MIMO_Type:0x%x\n", sta->bw_mode,
+			 sta->mimo_type);
+		PDM_SNPF(out_len, used, output + used, out_len - used,
+			 "STBC_en:%d, LDPC_en=%d\n", sta->stbc_en,
+			 sta->ldpc_en);
+
+		/*@[RSSI Info]*/
+		PDM_SNPF(out_len, used, output + used, out_len - used,
+			 "RSSI{All, OFDM, CCK}={%d, %d, %d}\n",
+			 sta->rssi_stat.rssi, sta->rssi_stat.rssi_ofdm,
+			 sta->rssi_stat.rssi_cck);
+
+		/*@[RA Info]*/
+		PDM_SNPF(out_len, used, output + used, out_len - used,
+			 "Rate_ID:%d, RSSI_LV:%d, ra_bw:%d, SGI_en:%d\n",
+			 ra->rate_id, ra->rssi_level, ra->ra_bw_mode,
+			 ra->is_support_sgi);
+
+		PDM_SNPF(out_len, used, output + used, out_len - used,
+			 "VHT_en:%d, Wireless_set=0x%x, sm_ps=%d\n",
+			 ra->is_vht_enable, sta->support_wireless_set,
+			 sta->sm_ps);
+
+		PDM_SNPF(out_len, used, output + used, out_len - used,
+			 "Dis{RA, PT}={%d, %d}, TxRx:%d, Noisy:%d\n",
+			 ra->disable_ra, ra->disable_pt, ra->txrx_state,
+			 ra->is_noisy);
+
+		PDM_SNPF(out_len, used, output + used, out_len - used,
+			 "TX{Rate, BW}={0x%x, %d}, RTY:%d\n", ra->curr_tx_rate,
+			 ra->curr_tx_bw, ra->curr_retry_ratio);
+
+		PDM_SNPF(out_len, used, output + used, out_len - used,
+			 "RA_Mask:0x%llx\n", ra->ramask);
+
+		/*@[TP]*/
+		PDM_SNPF(out_len, used, output + used, out_len - used,
+			 "TP{TX,RX}={%d, %d}\n", sta->tx_moving_average_tp,
+			 sta->rx_moving_average_tp);
+
+#ifdef CONFIG_BEAMFORMING
+		/*@[Beamforming]*/
+		PDM_SNPF(out_len, used, output + used, out_len - used,
+			 "BF CAP{HT,VHT}={0x%x, 0x%x}\n", bf->ht_beamform_cap,
+			 bf->vht_beamform_cap);
+		PDM_SNPF(out_len, used, output + used, out_len - used,
+			 "BF {p_aid,g_id}={0x%x, 0x%x}\n\n", bf->p_aid,
+			 bf->g_id);
+#endif
 	}
 
 	if (tatal_sta_num == 0) {
-		PHYDM_SNPRINTF((output + used, out_len - used, "No Linked STA\n"));
+		PDM_SNPF(out_len, used, output + used, out_len - used,
+			 "No Linked STA\n");
 	}
-	
+
 	*_used = used;
 	*_out_len = out_len;
 }
 
-#ifdef	PHYDM_3RD_REFORM_RA_MASK
-
-u8
-phydm_get_tx_stream_num(
-	void		*p_dm_void,
-	enum 	rf_type	mimo_type
-	
-)
+u8 phydm_get_tx_stream_num(void *dm_void, enum rf_type type)
 {
-	struct PHY_DM_STRUCT	*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	u8	tx_num = 1;
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	u8 tx_num = 1;
 
-	if (mimo_type == RF_1T1R || mimo_type == RF_1T2R)
+	if (type == RF_1T1R || type == RF_1T2R)
 		tx_num = 1;
-	else if (mimo_type == RF_2T2R || mimo_type == RF_2T3R  || mimo_type == RF_2T4R)
+	else if (type == RF_2T2R || type == RF_2T3R || type == RF_2T4R)
 		tx_num = 2;
-	else if (mimo_type == RF_3T3R || mimo_type == RF_3T4R)
+	else if (type == RF_3T3R || type == RF_3T4R)
 		tx_num = 3;
-	else if (mimo_type == RF_4T4R)
+	else if (type == RF_4T4R)
 		tx_num = 4;
-	else {
-		PHYDM_DBG(p_dm, DBG_RA, ("[Warrning] no mimo_type is found\n"));
-	}
+	else
+		PHYDM_DBG(dm, DBG_RA, "[Warrning] no mimo_type is found\n");
+
 	return tx_num;
 }
 
-u64
-phydm_get_bb_mod_ra_mask(
-	void		*p_dm_void,
-	u8		macid
-)
+u64 phydm_get_bb_mod_ra_mask(void *dm_void, u8 sta_idx)
 {
-	struct PHY_DM_STRUCT	*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	struct cmn_sta_info		*p_sta = p_dm->p_phydm_sta_info[macid];
-	struct ra_sta_info			*p_ra = NULL;
-	enum channel_width		bw = 0;
-	enum wireless_set			wireless_mode = 0;
-	u8		tx_stream_num = 1;
-	u8		rssi_lv = 0;
-	u64		ra_mask_bitmap = 0;
-	
-	if (is_sta_active(p_sta)) {
-		
-		p_ra = &(p_sta->ra_info);
-		bw = p_ra->ra_bw_mode;
-		wireless_mode = p_sta->support_wireless_set;
-		tx_stream_num = phydm_get_tx_stream_num(p_dm, p_sta->mimo_type);
-		rssi_lv = p_ra->rssi_level;
-		ra_mask_bitmap = p_ra->ramask;
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct cmn_sta_info *sta = dm->phydm_sta_info[sta_idx];
+	struct ra_sta_info *ra = NULL;
+	enum channel_width bw = 0;
+	enum wireless_set wrls_mode = 0;
+	u8 tx_stream_num = 1;
+	u8 rssi_lv = 0;
+	u64 ra_mask_bitmap = 0;
+
+	if (is_sta_active(sta)) {
+		ra = &sta->ra_info;
+		bw = ra->ra_bw_mode;
+		wrls_mode = sta->support_wireless_set;
+		tx_stream_num = phydm_get_tx_stream_num(dm, sta->mimo_type);
+		rssi_lv = ra->rssi_level;
+		ra_mask_bitmap = ra->ramask;
 	} else {
-		PHYDM_DBG(p_dm, DBG_RA, ("[Warning] %s invalid sta_info\n", __func__));
+		PHYDM_DBG(dm, DBG_RA, "[Warning] %s invalid STA\n", __func__);
 		return 0;
 	}
 
-	PHYDM_DBG(p_dm, DBG_RA, ("macid=%d ori_RA_Mask= 0x%llx\n", macid, ra_mask_bitmap));
-	PHYDM_DBG(p_dm, DBG_RA, ("wireless_mode=0x%x, tx_stream_num=%d, BW=%d, MimoPs=%d, rssi_lv=%d\n",
-		wireless_mode, tx_stream_num, bw, p_sta->sm_ps, rssi_lv));
-	
-	if (p_sta->sm_ps == SM_PS_STATIC) /*mimo_ps_enable*/
-		tx_stream_num = 1;
+	PHYDM_DBG(dm, DBG_RA, "macid=%d ori_RA_Mask= 0x%llx\n", sta->mac_id,
+		  ra_mask_bitmap);
+	PHYDM_DBG(dm, DBG_RA,
+		  "wireless_mode=0x%x, tx_ss=%d, BW=%d, MimoPs=%d, rssi_lv=%d\n",
+		  wrls_mode, tx_stream_num, bw, sta->sm_ps, rssi_lv);
 
+	if (sta->sm_ps == SM_PS_STATIC) /*@mimo_ps_enable*/
+		tx_stream_num = 1;
 
-	/*[Modify RA Mask by Wireless Mode]*/
+	/*@[Modify RA Mask by Wireless Mode]*/
 
-	if (wireless_mode == WIRELESS_CCK)								/*B mode*/
+	if (wrls_mode == WIRELESS_CCK) { /*@B mode*/
 		ra_mask_bitmap &= 0x0000000f;
-	else if (wireless_mode == WIRELESS_OFDM)							/*G mode*/
+	} else if (wrls_mode == WIRELESS_OFDM) { /*@G mode*/
 		ra_mask_bitmap &= 0x00000ff0;
-	else if (wireless_mode == (WIRELESS_CCK | WIRELESS_OFDM))			/*BG mode*/
+	} else if (wrls_mode == (WIRELESS_CCK | WIRELESS_OFDM)) { /*@BG mode*/
 		ra_mask_bitmap &= 0x00000ff5;
-	else if (wireless_mode == (WIRELESS_CCK | WIRELESS_OFDM | WIRELESS_HT)) {
-																	/*N_2G*/
+	} else if (wrls_mode == (WIRELESS_CCK | WIRELESS_OFDM | WIRELESS_HT)) {
+		/*N_2G*/
 		if (tx_stream_num == 1) {
 			if (bw == CHANNEL_WIDTH_40)
 				ra_mask_bitmap &= 0x000ff015;
 			else
 				ra_mask_bitmap &= 0x000ff005;
 		} else if (tx_stream_num == 2) {
-
 			if (bw == CHANNEL_WIDTH_40)
 				ra_mask_bitmap &= 0x0ffff015;
 			else
 				ra_mask_bitmap &= 0x0ffff005;
-		} else if (tx_stream_num == 3)
+		} else if (tx_stream_num == 3) {
 			ra_mask_bitmap &= 0xffffff015;
-	} else if (wireless_mode ==  (WIRELESS_OFDM | WIRELESS_HT)) {		/*N_5G*/
-	
+		} else {
+			ra_mask_bitmap &= 0xffffffff015;
+		}
+	} else if (wrls_mode == (WIRELESS_OFDM | WIRELESS_HT)) { /*N_5G*/
+
 		if (tx_stream_num == 1) {
 			if (bw == CHANNEL_WIDTH_40)
 				ra_mask_bitmap &= 0x000ff030;
 			else
 				ra_mask_bitmap &= 0x000ff010;
 		} else if (tx_stream_num == 2) {
-
 			if (bw == CHANNEL_WIDTH_40)
 				ra_mask_bitmap &= 0x0ffff030;
 			else
 				ra_mask_bitmap &= 0x0ffff010;
-		} else if (tx_stream_num == 3)
+		} else if (tx_stream_num == 3) {
 			ra_mask_bitmap &= 0xffffff010;
-	} else if (wireless_mode ==  (WIRELESS_CCK |WIRELESS_OFDM | WIRELESS_VHT)) {
-																	/*AC_2G*/
+		} else {
+			ra_mask_bitmap &= 0xffffffff010;
+		}
+	} else if (wrls_mode == (WIRELESS_CCK | WIRELESS_OFDM | WIRELESS_VHT)) {
+		/*@AC_2G*/
 		if (tx_stream_num == 1)
 			ra_mask_bitmap &= 0x003ff015;
 		else if (tx_stream_num == 2)
 			ra_mask_bitmap &= 0xfffff015;
 		else if (tx_stream_num == 3)
-			ra_mask_bitmap &= 0x3fffffff010;
-		
-
-		if (bw == CHANNEL_WIDTH_20) {/* AC 20MHz doesn't support MCS9 */
-			ra_mask_bitmap &= 0x1ff7fdfffff;
+			ra_mask_bitmap &= 0x3fffffff015;
+		else /*@AC_4SS 2G*/
+			ra_mask_bitmap &= 0x000ffffffffff015;
+		if (bw == CHANNEL_WIDTH_20) {
+		/* @AC 20MHz doesn't support MCS9 except 3SS & 6SS*/
+			ra_mask_bitmap &= 0x0007ffff7fdff015;
+		} else if (bw == CHANNEL_WIDTH_80) {
+		/* @AC 80MHz doesn't support 3SS MCS6*/
+			ra_mask_bitmap &= 0x000fffbffffff015;
 		}
-	} else if (wireless_mode ==  (WIRELESS_OFDM | WIRELESS_VHT)) {		/*AC_5G*/
-	
+	} else if (wrls_mode == (WIRELESS_OFDM | WIRELESS_VHT)) { /*@AC_5G*/
+
 		if (tx_stream_num == 1)
 			ra_mask_bitmap &= 0x003ff010;
 		else if (tx_stream_num == 2)
 			ra_mask_bitmap &= 0xfffff010;
-		else  if (tx_stream_num == 3)
+		else if (tx_stream_num == 3)
 			ra_mask_bitmap &= 0x3fffffff010;
-
-		if (bw == CHANNEL_WIDTH_20) /* AC 20MHz doesn't support MCS9 */
-			ra_mask_bitmap &= 0x1ff7fdfffff;
+		else /*@AC_4SS 5G*/
+			ra_mask_bitmap &= 0x000ffffffffff010;
+
+		if (bw == CHANNEL_WIDTH_20) {
+		/* @AC 20MHz doesn't support MCS9 except 3SS & 6SS*/
+			ra_mask_bitmap &= 0x0007ffff7fdff010;
+		} else if (bw == CHANNEL_WIDTH_80) {
+		/* @AC 80MHz doesn't support 3SS MCS6*/
+			ra_mask_bitmap &= 0x000fffbffffff010;
+		}
 	} else {
-		PHYDM_DBG(p_dm, DBG_RA, ("[Warrning] No RA mask is found\n"));
-		/**/
+		PHYDM_DBG(dm, DBG_RA, "[Warrning] RA mask is Not found\n");
 	}
-	
-	PHYDM_DBG(p_dm, DBG_RA, ("Mod by mode=0x%llx\n", ra_mask_bitmap));
 
-	
-	/*[Modify RA Mask by RSSI level]*/
-	if (wireless_mode != WIRELESS_CCK) {
+	PHYDM_DBG(dm, DBG_RA, "Mod by mode=0x%llx\n", ra_mask_bitmap);
 
+	/*@[Modify RA Mask by RSSI level]*/
+	if (wrls_mode != WIRELESS_CCK) {
 		if (rssi_lv == 0)
-			ra_mask_bitmap &=  0xffffffff;
+			ra_mask_bitmap &= 0xffffffffffffffff;
 		else if (rssi_lv == 1)
-			ra_mask_bitmap &=  0xfffffff0;
+			ra_mask_bitmap &= 0xfffffffffffffff0;
 		else if (rssi_lv == 2)
-			ra_mask_bitmap &=  0xffffefe0;
+			ra_mask_bitmap &= 0xffffffffffffefe0;
 		else if (rssi_lv == 3)
-			ra_mask_bitmap &=  0xffffcfc0;
+			ra_mask_bitmap &= 0xffffffffffffcfc0;
 		else if (rssi_lv == 4)
-			ra_mask_bitmap &=  0xffff8f80;
+			ra_mask_bitmap &= 0xffffffffffff8f80;
 		else if (rssi_lv >= 5)
-			ra_mask_bitmap &=  0xffff0f00;
-
+			ra_mask_bitmap &= 0xffffffffffff0f00;
 	}
-	PHYDM_DBG(p_dm, DBG_RA, ("Mod by RSSI=0x%llx\n", ra_mask_bitmap));
+	PHYDM_DBG(dm, DBG_RA, "Mod by RSSI=0x%llx\n", ra_mask_bitmap);
 
 	return ra_mask_bitmap;
 }
 
-u8
-phydm_get_rate_id(
-	void			*p_dm_void,
-	u8			macid
-)
+u8 phydm_get_rate_from_rssi_lv(void *dm_void, u8 sta_idx)
+{
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct cmn_sta_info *sta = dm->phydm_sta_info[sta_idx];
+	struct ra_sta_info *ra = NULL;
+	enum wireless_set wrls_set = 0;
+	u8 rssi_lv = 0;
+	u8 rate_idx = 0;
+	u8 rate_ofst = 0;
+
+	if (is_sta_active(sta)) {
+		ra = &sta->ra_info;
+		wrls_set = sta->support_wireless_set;
+		rssi_lv = ra->rssi_level;
+	} else {
+		pr_debug("[Warning] %s: invalid STA\n", __func__);
+		return 0;
+	}
+
+	PHYDM_DBG(dm, DBG_RA, "[%s]macid=%d, wireless_set=0x%x, rssi_lv=%d\n",
+		  __func__, sta->mac_id, wrls_set, rssi_lv);
+
+	rate_ofst = (rssi_lv <= 1) ? 0 : (rssi_lv - 1);
+
+	if (wrls_set & WIRELESS_VHT) {
+		rate_idx = ODM_RATEVHTSS1MCS0 + rate_ofst;
+	} else if (wrls_set & WIRELESS_HT) {
+		rate_idx = ODM_RATEMCS0 + rate_ofst;
+	} else if (wrls_set & WIRELESS_OFDM) {
+		rate_idx = ODM_RATE6M + rate_ofst;
+	} else {
+		rate_idx = ODM_RATE1M + rate_ofst;
+
+		if (rate_idx > ODM_RATE11M)
+			rate_idx = ODM_RATE11M;
+	}
+	return rate_idx;
+}
+
+u8 phydm_get_rate_id(void *dm_void, u8 sta_idx)
 {
-	struct PHY_DM_STRUCT	*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	struct cmn_sta_info		*p_sta = p_dm->p_phydm_sta_info[macid];
-	struct ra_sta_info			*p_ra =NULL;
-	enum channel_width		bw = 0;
-	enum wireless_set			wireless_mode = 0;
-	u8	tx_stream_num = 1;
-	u8	rate_id_idx = PHYDM_BGN_20M_1SS;
-
-	if (is_sta_active(p_sta)) {
-		
-		p_ra = &(p_sta->ra_info);
-		bw = p_ra->ra_bw_mode;
-		wireless_mode = p_sta->support_wireless_set;
-		tx_stream_num = phydm_get_tx_stream_num(p_dm, p_sta->mimo_type);
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct cmn_sta_info *sta = dm->phydm_sta_info[sta_idx];
+	struct ra_sta_info *ra = NULL;
+	enum channel_width bw = 0;
+	enum wireless_set wrls_mode = 0;
+	u8 tx_stream_num = 1;
+	u8 rate_id_idx = PHYDM_BGN_20M_1SS;
+
+	if (is_sta_active(sta)) {
+		ra = &sta->ra_info;
+		bw = ra->ra_bw_mode;
+		wrls_mode = sta->support_wireless_set;
+		tx_stream_num = phydm_get_tx_stream_num(dm, sta->mimo_type);
 
 	} else {
-		PHYDM_DBG(p_dm, DBG_RA, ("[Warning] %s: invalid sta_info\n", __func__));
+		PHYDM_DBG(dm, DBG_RA, "[Warning] %s: invalid STA\n", __func__);
 		return 0;
 	}
 
-	PHYDM_DBG(p_dm, DBG_RA, ("macid=%d, wireless_set=0x%x, tx_stream_num=%d, BW=0x%x\n",
-			macid, wireless_mode, tx_stream_num, bw));
+	PHYDM_DBG(dm, DBG_RA, "macid=%d,wireless_set=0x%x,tx_SS_num=%d,BW=%d\n",
+		  sta->mac_id, wrls_mode, tx_stream_num, bw);
 
-	if (wireless_mode == WIRELESS_CCK)								/*B mode*/
+	if (wrls_mode == WIRELESS_CCK) {
+	/*@B mode*/
 		rate_id_idx = PHYDM_B_20M;
-	else if (wireless_mode ==  WIRELESS_OFDM)						/*G mode*/
+	} else if (wrls_mode == WIRELESS_OFDM) {
+	/*@G mode*/
 		rate_id_idx = PHYDM_G;
-	else if (wireless_mode ==  (WIRELESS_CCK | WIRELESS_OFDM))			/*BG mode*/
+	} else if (wrls_mode == (WIRELESS_CCK | WIRELESS_OFDM)) {
+	/*@BG mode*/
 		rate_id_idx = PHYDM_BG;
-	else if (wireless_mode ==  (WIRELESS_OFDM | WIRELESS_HT)) {		/*GN mode*/
-	
+	} else if (wrls_mode == (WIRELESS_OFDM | WIRELESS_HT)) {
+	/*@GN mode*/
 		if (tx_stream_num == 1)
 			rate_id_idx = PHYDM_GN_N1SS;
 		else if (tx_stream_num == 2)
 			rate_id_idx = PHYDM_GN_N2SS;
 		else if (tx_stream_num == 3)
 			rate_id_idx = PHYDM_ARFR5_N_3SS;
-	} else if (wireless_mode == (WIRELESS_CCK | WIRELESS_OFDM | WIRELESS_HT)) {	/*BGN mode*/
-	
-
+	} else if (wrls_mode == (WIRELESS_CCK | WIRELESS_OFDM | WIRELESS_HT)) {
+	 /*@BGN mode*/
 		if (bw == CHANNEL_WIDTH_40) {
-
 			if (tx_stream_num == 1)
 				rate_id_idx = PHYDM_BGN_40M_1SS;
 			else if (tx_stream_num == 2)
 				rate_id_idx = PHYDM_BGN_40M_2SS;
 			else if (tx_stream_num == 3)
 				rate_id_idx = PHYDM_ARFR5_N_3SS;
+			else if (tx_stream_num == 4)
+				rate_id_idx = PHYDM_ARFR7_N_4SS;
 
 		} else {
-
 			if (tx_stream_num == 1)
 				rate_id_idx = PHYDM_BGN_20M_1SS;
 			else if (tx_stream_num == 2)
 				rate_id_idx = PHYDM_BGN_20M_2SS;
 			else if (tx_stream_num == 3)
 				rate_id_idx = PHYDM_ARFR5_N_3SS;
+			else if (tx_stream_num == 4)
+				rate_id_idx = PHYDM_ARFR7_N_4SS;
 		}
-	} else if (wireless_mode == (WIRELESS_OFDM | WIRELESS_VHT)) {	/*AC mode*/
-	
+	} else if (wrls_mode == (WIRELESS_OFDM | WIRELESS_VHT)) {
+	/*@AC mode*/
 		if (tx_stream_num == 1)
 			rate_id_idx = PHYDM_ARFR1_AC_1SS;
 		else if (tx_stream_num == 2)
 			rate_id_idx = PHYDM_ARFR0_AC_2SS;
 		else if (tx_stream_num == 3)
 			rate_id_idx = PHYDM_ARFR4_AC_3SS;
-	} else if (wireless_mode == (WIRELESS_CCK | WIRELESS_OFDM | WIRELESS_VHT)) {	/*AC 2.4G mode*/
-	
+		else if (tx_stream_num == 4)
+			rate_id_idx = PHYDM_ARFR6_AC_4SS;
+	} else if (wrls_mode == (WIRELESS_CCK | WIRELESS_OFDM | WIRELESS_VHT)) {
+	/*@AC 2.4G mode*/
 		if (bw >= CHANNEL_WIDTH_80) {
 			if (tx_stream_num == 1)
 				rate_id_idx = PHYDM_ARFR1_AC_1SS;
@@ -989,348 +1087,393 @@ phydm_get_rate_id(
 				rate_id_idx = PHYDM_ARFR0_AC_2SS;
 			else if (tx_stream_num == 3)
 				rate_id_idx = PHYDM_ARFR4_AC_3SS;
+			else if (tx_stream_num == 4)
+				rate_id_idx = PHYDM_ARFR6_AC_4SS;
 		} else {
-
 			if (tx_stream_num == 1)
 				rate_id_idx = PHYDM_ARFR2_AC_2G_1SS;
 			else if (tx_stream_num == 2)
 				rate_id_idx = PHYDM_ARFR3_AC_2G_2SS;
 			else if (tx_stream_num == 3)
 				rate_id_idx = PHYDM_ARFR4_AC_3SS;
+			else if (tx_stream_num == 4)
+				rate_id_idx = PHYDM_ARFR6_AC_4SS;
 		}
 	} else {
-		PHYDM_DBG(p_dm, DBG_RA, ("[Warrning] No rate_id is found\n"));
+		PHYDM_DBG(dm, DBG_RA, "[Warrning] No rate_id is found\n");
 		rate_id_idx = 0;
 	}
-	
-	PHYDM_DBG(p_dm, DBG_RA, ("Rate_ID=((0x%x))\n", rate_id_idx));
+
+	PHYDM_DBG(dm, DBG_RA, "Rate_ID=((0x%x))\n", rate_id_idx);
 
 	return rate_id_idx;
 }
 
-void
-phydm_ra_h2c(
-	void	*p_dm_void,
-	u8	macid,
-	u8	dis_ra,
-	u8	dis_pt,
-	u8	no_update_bw,
-	u8	init_ra_lv,
-	u64	ra_mask
-)
+void phydm_ra_h2c(void *dm_void, u8 sta_idx, u8 dis_ra, u8 dis_pt,
+		  u8 no_update_bw, u8 init_ra_lv, u64 ra_mask)
 {
-	struct PHY_DM_STRUCT		*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	struct cmn_sta_info			*p_sta = p_dm->p_phydm_sta_info[macid];
-	struct ra_sta_info				*p_ra = NULL;
-	u8		h2c_val[H2C_MAX_LENGTH] = {0};
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct cmn_sta_info *sta = dm->phydm_sta_info[sta_idx];
+	struct ra_sta_info *ra = NULL;
+	u8 h2c_val[H2C_MAX_LENGTH] = {0};
 
-	if (is_sta_active(p_sta)) {
-		p_ra = &(p_sta->ra_info);
+	if (is_sta_active(sta)) {
+		ra = &sta->ra_info;
 	} else {
-		PHYDM_DBG(p_dm, DBG_RA, ("[Warning] %s invalid sta_info\n", __func__));
+		PHYDM_DBG(dm, DBG_RA, "[Warning] %s invalid sta_info\n",
+			  __func__);
 		return;
 	}
-	
-	PHYDM_DBG(p_dm, DBG_RA, ("%s ======>\n", __func__));
-	PHYDM_DBG(p_dm, DBG_RA, ("MACID=%d\n", p_sta->mac_id));
 
-	if (p_dm->is_disable_power_training == true)
+	PHYDM_DBG(dm, DBG_RA, "%s ======>\n", __func__);
+	PHYDM_DBG(dm, DBG_RA, "MACID=%d\n", sta->mac_id);
+
+	if (dm->is_disable_power_training)
 		dis_pt = true;
-	else if (p_dm->is_disable_power_training == false)
+	else if (!dm->is_disable_power_training)
 		dis_pt = false;
 
-	h2c_val[0] = p_sta->mac_id;
-	h2c_val[1] = (p_ra->rate_id & 0x1f) | ((init_ra_lv & 0x3) << 5) | (p_ra->is_support_sgi << 7);
-	h2c_val[2] = (u8)((p_ra->ra_bw_mode) | (((p_sta->ldpc_en) ? 1 : 0) << 2) | 
-					((no_update_bw & 0x1) << 3) | (p_ra->is_vht_enable << 4) | 
-					((dis_pt & 0x1) << 6) | ((dis_ra & 0x1) << 7));
-	
+	h2c_val[0] = sta->mac_id;
+	h2c_val[1] = (ra->rate_id & 0x1f) | ((init_ra_lv & 0x3) << 5) |
+		     (ra->is_support_sgi << 7);
+	h2c_val[2] = (u8)((ra->ra_bw_mode) | (((sta->ldpc_en) ? 1 : 0) << 2) |
+			  ((no_update_bw & 0x1) << 3) |
+			  (ra->is_vht_enable << 4) |
+			  ((dis_pt & 0x1) << 6) | ((dis_ra & 0x1) << 7));
+
 	h2c_val[3] = (u8)(ra_mask & 0xff);
 	h2c_val[4] = (u8)((ra_mask & 0xff00) >> 8);
 	h2c_val[5] = (u8)((ra_mask & 0xff0000) >> 16);
 	h2c_val[6] = (u8)((ra_mask & 0xff000000) >> 24);
 
-	PHYDM_DBG(p_dm, DBG_RA, ("PHYDM h2c[0x40]=0x%x %x %x %x %x %x %x\n",
-		h2c_val[6], h2c_val[5], h2c_val[4], h2c_val[3], h2c_val[2], h2c_val[1], h2c_val[0]));
+	PHYDM_DBG(dm, DBG_RA, "PHYDM h2c[0x40]=0x%x %x %x %x %x %x %x\n",
+		  h2c_val[6], h2c_val[5], h2c_val[4], h2c_val[3], h2c_val[2],
+		  h2c_val[1], h2c_val[0]);
 
-	odm_fill_h2c_cmd(p_dm, PHYDM_H2C_RA_MASK, H2C_MAX_LENGTH, h2c_val);
+	odm_fill_h2c_cmd(dm, PHYDM_H2C_RA_MASK, H2C_MAX_LENGTH, h2c_val);
 
 	#if (defined(PHYDM_COMPILE_ABOVE_3SS))
-	if (p_dm->support_ic_type & (PHYDM_IC_ABOVE_3SS)) {
-		
+	if (dm->support_ic_type & (PHYDM_IC_ABOVE_3SS)) {
 		h2c_val[3] = (u8)((ra_mask >> 32) & 0x000000ff);
 		h2c_val[4] = (u8)(((ra_mask >> 32) & 0x0000ff00) >> 8);
 		h2c_val[5] = (u8)(((ra_mask >> 32) & 0x00ff0000) >> 16);
 		h2c_val[6] = (u8)(((ra_mask >> 32) & 0xff000000) >> 24);
 
-		PHYDM_DBG(p_dm, DBG_RA, ("PHYDM h2c[0x46]=0x%x %x %x %x %x %x %x\n",
-		h2c_val[6], h2c_val[5], h2c_val[4], h2c_val[3], h2c_val[2], h2c_val[1], h2c_val[0]));
-		
-		odm_fill_h2c_cmd(p_dm, PHYDM_RA_MASK_ABOVE_3SS, 5, h2c_val);
+		PHYDM_DBG(dm, DBG_RA, "h2c[0x46]=0x%x %x %x %x %x %x %x\n",
+			  h2c_val[6], h2c_val[5], h2c_val[4], h2c_val[3],
+			  h2c_val[2], h2c_val[1], h2c_val[0]);
+
+		odm_fill_h2c_cmd(dm, PHYDM_RA_MASK_ABOVE_3SS,
+				 H2C_MAX_LENGTH, h2c_val);
 	}
 	#endif
 }
 
-void
-phydm_ra_registed(
-	void	*p_dm_void,
-	u8	macid,
-	u8	rssi_from_assoc
-)
+void phydm_ra_registed(void *dm_void, u8 sta_idx,
+		       /*@index of sta_info array, not MACID*/
+		       u8 rssi_from_assoc)
 {
-	struct PHY_DM_STRUCT		*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	struct _rate_adaptive_table_	*p_ra_t = &p_dm->dm_ra_table;
-	struct cmn_sta_info			*p_sta = p_dm->p_phydm_sta_info[macid];
-	struct ra_sta_info				*p_ra = NULL;
-	u8	init_ra_lv;
-	u64	ra_mask;
-
-	if (is_sta_active(p_sta)) {
-		p_ra = &(p_sta->ra_info);
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct ra_table *ra_t = &dm->dm_ra_table;
+	struct cmn_sta_info *sta = dm->phydm_sta_info[sta_idx];
+	struct ra_sta_info *ra = NULL;
+	u8 init_ra_lv = 0;
+	u64 ra_mask = 0;
+	/*@SD7 STA_idx != macid*/
+	/*@SD4,8 STA_idx == macid, */
+
+	PHYDM_DBG(dm, DBG_RA_MASK, "%s ======>\n", __func__);
+
+	if (is_sta_active(sta)) {
+		ra = &sta->ra_info;
+		PHYDM_DBG(dm, DBG_RA_MASK, "sta_idx=%d, macid=%d\n", sta_idx,
+			  sta->mac_id);
 	} else {
-		PHYDM_DBG(p_dm, DBG_RA, ("[Warning] %s invalid sta_info\n", __func__));
+		PHYDM_DBG(dm, DBG_RA_MASK, "[Warning] %s invalid STA\n",
+			  __func__);
+		PHYDM_DBG(dm, DBG_RA_MASK, "sta_idx=%d\n", sta_idx);
 		return;
 	}
 
-	PHYDM_DBG(p_dm, DBG_RA, ("%s ======>\n", __func__));
-	PHYDM_DBG(p_dm, DBG_RA, ("MACID=%d\n", p_sta->mac_id));
-
-
 	#if (RTL8188E_SUPPORT == 1) && (RATE_ADAPTIVE_SUPPORT == 1)
-	if (p_dm->support_ic_type == ODM_RTL8188E)
-		phydm_get_rate_id_88e(p_dm, macid);
+	if (dm->support_ic_type == ODM_RTL8188E)
+		ra->rate_id = phydm_get_rate_id_88e(dm, sta_idx);
 	else
 	#endif
 	{
-		p_ra->rate_id = phydm_get_rate_id(p_dm, macid);
+		ra->rate_id = phydm_get_rate_id(dm, sta_idx);
 	}
-	
-	/*p_ra->is_vht_enable = (p_sta->support_wireless_set | WIRELESS_VHT) ? 1 : 0;*/
-	/*p_ra->disable_ra = 0;*/
-	/*p_ra->disable_pt = 0;*/
-	ra_mask = phydm_get_bb_mod_ra_mask(p_dm, macid);
 
+	ra_mask = phydm_get_bb_mod_ra_mask(dm, sta_idx);
+
+	PHYDM_DBG(dm, DBG_RA_MASK, "rssi_assoc=%d\n", rssi_from_assoc);
 
 	if (rssi_from_assoc > 40)
-		init_ra_lv = 3;
+		init_ra_lv = 1;
 	else if (rssi_from_assoc > 20)
 		init_ra_lv = 2;
+	else if (rssi_from_assoc > 1)
+		init_ra_lv = 3;
 	else
-		init_ra_lv = 1;
+		init_ra_lv = 0;
 
-	if (p_ra_t->record_ra_info)
-		p_ra_t->record_ra_info(p_dm, macid, p_sta, ra_mask);
+	if (ra_t->record_ra_info)
+		ra_t->record_ra_info(dm, sta_idx, sta, ra_mask);
 
 	#if (RTL8188E_SUPPORT == 1) && (RATE_ADAPTIVE_SUPPORT == 1)
-	if (p_dm->support_ic_type == ODM_RTL8188E)
-		/*Driver RA*/
-		odm_ra_update_rate_info_8188e(p_dm, macid, p_ra->rate_id, (u32)ra_mask, p_ra->is_support_sgi);
+	if (dm->support_ic_type == ODM_RTL8188E)
+		/*@Driver RA*/
+		phydm_ra_update_8188e(dm, sta_idx, ra->rate_id,
+				      (u32)ra_mask, ra->is_support_sgi);
 	else
 	#endif
 	{
-		/*FW RA*/
-		phydm_ra_h2c(p_dm, macid, p_ra->disable_ra, p_ra->disable_pt, 0, init_ra_lv, ra_mask);
+		/*@FW RA*/
+		phydm_ra_h2c(dm, sta_idx, ra->disable_ra, ra->disable_pt, 0,
+			     init_ra_lv, ra_mask);
 	}
-
-	
-
 }
 
-void
-phydm_ra_offline(
-	void	*p_dm_void,
-	u8	macid
-)
+void phydm_ra_offline(void *dm_void, u8 sta_idx)
 {
-	struct PHY_DM_STRUCT		*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	struct _rate_adaptive_table_	*p_ra_t = &p_dm->dm_ra_table;
-	struct cmn_sta_info			*p_sta = p_dm->p_phydm_sta_info[macid];
-	struct ra_sta_info				*p_ra = NULL;
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct ra_table *ra_t = &dm->dm_ra_table;
+	struct cmn_sta_info *sta = dm->phydm_sta_info[sta_idx];
+	struct ra_sta_info *ra = NULL;
 
-	if (is_sta_active(p_sta)) {
-		p_ra = &(p_sta->ra_info);
+	if (is_sta_active(sta)) {
+		ra = &sta->ra_info;
 	} else {
-		PHYDM_DBG(p_dm, DBG_RA, ("[Warning] %s invalid sta_info\n", __func__));
+		PHYDM_DBG(dm, DBG_RA, "[Warning] %s invalid STA\n", __func__);
 		return;
 	}
 
-	PHYDM_DBG(p_dm, DBG_RA, ("%s ======>\n", __func__));
-	PHYDM_DBG(p_dm, DBG_RA, ("MACID=%d\n", p_sta->mac_id));
+	PHYDM_DBG(dm, DBG_RA, "%s ======>\n", __func__);
+	PHYDM_DBG(dm, DBG_RA, "MACID=%d\n", sta->mac_id);
 
-	odm_memory_set(p_dm, &(p_ra->rate_id), 0, sizeof(struct ra_sta_info));
-	p_ra->disable_ra = 1;
-	p_ra->disable_pt = 1;
+	odm_memory_set(dm, &ra->rate_id, 0, sizeof(struct ra_sta_info));
+	ra->disable_ra = 1;
+	ra->disable_pt = 1;
 
-	if (p_ra_t->record_ra_info)
-		p_ra_t->record_ra_info(p_dm, macid, p_sta, 0);
+	if (ra_t->record_ra_info)
+		ra_t->record_ra_info(dm, sta->mac_id, sta, 0);
 
-	if (p_dm->support_ic_type != ODM_RTL8188E)
-		phydm_ra_h2c(p_dm, macid, p_ra->disable_ra, p_ra->disable_pt, 0, 0, 0);
+	if (dm->support_ic_type != ODM_RTL8188E)
+		phydm_ra_h2c(dm, sta->mac_id, 1, 1, 0, 0, 0);
 }
 
-void
-phydm_ra_mask_watchdog(
-	void	*p_dm_void
-)
+void phydm_ra_mask_watchdog(void *dm_void)
 {
-	struct PHY_DM_STRUCT		*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	struct _rate_adaptive_table_	*p_ra_t = &p_dm->dm_ra_table;
-	struct cmn_sta_info			*p_sta = NULL;
-	struct ra_sta_info				*p_ra = NULL;
-	u8		macid;
-	u64		ra_mask;
-	u8		rssi_lv_new;
-
-	if (!(p_dm->support_ability & ODM_BB_RA_MASK))
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct ra_table *ra_t = &dm->dm_ra_table;
+	struct cmn_sta_info *sta = NULL;
+	struct ra_sta_info *ra = NULL;
+	u8 sta_idx;
+	u64 ra_mask;
+	u8 rssi_lv_new;
+	u8 rssi = 0;
+
+	if (!(dm->support_ability & ODM_BB_RA_MASK))
 		return;
-	
-	if (((!p_dm->is_linked)) || (p_dm->phydm_sys_up_time % 2) == 1)
+
+	if (!dm->is_linked || (dm->phydm_sys_up_time % 2) == 1)
 		return;
 
-	PHYDM_DBG(p_dm, DBG_RA_MASK, ("%s ======>\n", __func__));
-	
-	p_ra_t->up_ramask_cnt++;
+	PHYDM_DBG(dm, DBG_RA_MASK, "%s ======>\n", __func__);
 
-	for (macid = 0; macid < ODM_ASSOCIATE_ENTRY_NUM; macid++) {
-		
-		p_sta = p_dm->p_phydm_sta_info[macid];
-		
-		if (!is_sta_active(p_sta))
+	ra_t->up_ramask_cnt++;
+
+	for (sta_idx = 0; sta_idx < ODM_ASSOCIATE_ENTRY_NUM; sta_idx++) {
+		sta = dm->phydm_sta_info[sta_idx];
+
+		if (!is_sta_active(sta))
 			continue;
 
-		p_ra = &(p_sta->ra_info);
+		ra = &sta->ra_info;
 
-		if (p_ra->disable_ra)
+		if (ra->disable_ra)
 			continue;
 
+		PHYDM_DBG(dm, DBG_RA_MASK, "sta_idx=%d, macid=%d\n", sta_idx,
+			  sta->mac_id);
+
+		rssi = (u8)(sta->rssi_stat.rssi);
 
-		/*to be modified*/
+		/*@to be modified*/
 		#if ((RTL8812A_SUPPORT == 1) || (RTL8821A_SUPPORT == 1))
-		if ((p_dm->support_ic_type == ODM_RTL8812) ||
-			((p_dm->support_ic_type == ODM_RTL8821) && (p_dm->cut_version == ODM_CUT_A))
+		if (dm->support_ic_type == ODM_RTL8812 ||
+			(dm->support_ic_type == ODM_RTL8821 &&
+			 dm->cut_version == ODM_CUT_A)
 			) {
-			
-			if (p_sta->rssi_stat.rssi < p_ra_t->ldpc_thres) {
-				
+			if (rssi < ra_t->ldpc_thres) {
+				/*@LDPC TX enable*/
 				#if (DM_ODM_SUPPORT_TYPE == ODM_CE)
-				set_ra_ldpc_8812(p_sta, true);		/*LDPC TX enable*/
+				set_ra_ldpc_8812(sta, true);
+				#elif (DM_ODM_SUPPORT_TYPE == ODM_WIN)
+				MgntSet_TX_LDPC(sta->mac_id, true);
+				#elif (DM_ODM_SUPPORT_TYPE == ODM_AP)
+				/*to be added*/
 				#endif
-				PHYDM_DBG(p_dm, DBG_RA_MASK, ("RSSI=%d, ldpc_en =TRUE\n", p_sta->rssi_stat.rssi));
-				
-			} else if (p_sta->rssi_stat.rssi > (p_ra_t->ldpc_thres + 3)) {
+				PHYDM_DBG(dm, DBG_RA_MASK,
+					  "RSSI=%d, ldpc_en =TRUE\n", rssi);
 
+			} else if (rssi > (ra_t->ldpc_thres + 3)) {
+				/*@LDPC TX disable*/
 				#if (DM_ODM_SUPPORT_TYPE == ODM_CE)
-				set_ra_ldpc_8812(p_sta, false);	/*LDPC TX disable*/
+				set_ra_ldpc_8812(sta, false);
+				#elif (DM_ODM_SUPPORT_TYPE == ODM_WIN)
+				MgntSet_TX_LDPC(sta->mac_id, false);
+				#elif (DM_ODM_SUPPORT_TYPE == ODM_AP)
+				/*to be added*/
 				#endif
-				PHYDM_DBG(p_dm, DBG_RA_MASK, ("RSSI=%d, ldpc_en =FALSE\n", p_sta->rssi_stat.rssi));
-			}	
+				PHYDM_DBG(dm, DBG_RA_MASK,
+					  "RSSI=%d, ldpc_en =FALSE\n", rssi);
+			}
 		}
 		#endif
 
-		rssi_lv_new = phydm_rssi_lv_dec(p_dm, (u32)p_sta->rssi_stat.rssi, p_ra->rssi_level);
+		rssi_lv_new = phydm_rssi_lv_dec(dm, (u32)rssi, ra->rssi_level);
 
-		if ((p_ra->rssi_level != rssi_lv_new) || 
-			(p_ra_t->up_ramask_cnt >= FORCED_UPDATE_RAMASK_PERIOD)) {
+		if (ra->rssi_level != rssi_lv_new ||
+		    ra_t->up_ramask_cnt >= FORCED_UPDATE_RAMASK_PERIOD) {
+			PHYDM_DBG(dm, DBG_RA_MASK, "RSSI LV:((%d))->((%d))\n",
+				  ra->rssi_level, rssi_lv_new);
 
-			PHYDM_DBG(p_dm, DBG_RA_MASK, ("RSSI LV:((%d))->((%d))\n", p_ra->rssi_level, rssi_lv_new));
-			
-			p_ra->rssi_level = rssi_lv_new;
-			p_ra_t->up_ramask_cnt = 0;
-			
-			ra_mask = phydm_get_bb_mod_ra_mask(p_dm, macid);
+			ra->rssi_level = rssi_lv_new;
+			ra_t->up_ramask_cnt = 0;
 
-			if (p_ra_t->record_ra_info)
-				p_ra_t->record_ra_info(p_dm, macid, p_sta, ra_mask);
+			ra_mask = phydm_get_bb_mod_ra_mask(dm, sta_idx);
 
-			#if (RTL8188E_SUPPORT == 1) && (RATE_ADAPTIVE_SUPPORT == 1)
-			if (p_dm->support_ic_type == ODM_RTL8188E)
-				/*Driver RA*/
-				odm_ra_update_rate_info_8188e(p_dm, macid, p_ra->rate_id, (u32)ra_mask, p_ra->is_support_sgi);
+			if (ra_t->record_ra_info)
+				ra_t->record_ra_info(dm, sta_idx, sta, ra_mask);
+
+			#if (RTL8188E_SUPPORT) && (RATE_ADAPTIVE_SUPPORT)
+			if (dm->support_ic_type == ODM_RTL8188E)
+				/*@Driver RA*/
+				phydm_ra_update_8188e(dm, sta_idx, ra->rate_id,
+						      (u32)ra_mask,
+						      ra->is_support_sgi);
 			else
 			#endif
 			{
-				/*FW RA*/
-				phydm_ra_h2c(p_dm, macid, p_ra->disable_ra, p_ra->disable_pt, 1, 0, ra_mask);
+				/*@FW RA*/
+				phydm_ra_h2c(dm, sta_idx, ra->disable_ra,
+					     ra->disable_pt, 1, 0, ra_mask);
 			}
 		}
 	}
-
 }
-#endif
 
-u8
-phydm_vht_en_mapping(
-	void			*p_dm_void,
-	u32			wireless_mode
-)
+u8 phydm_vht_en_mapping(void *dm_void, u32 wireless_mode)
 {
-	struct PHY_DM_STRUCT		*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	u8			vht_en_out = 0;
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	u8 vht_en_out = 0;
 
-	if ((wireless_mode == PHYDM_WIRELESS_MODE_AC_5G) ||
-	    (wireless_mode == PHYDM_WIRELESS_MODE_AC_24G) ||
-	    (wireless_mode == PHYDM_WIRELESS_MODE_AC_ONLY)
-	   ) {
+	if (wireless_mode == PHYDM_WIRELESS_MODE_AC_5G ||
+	    wireless_mode == PHYDM_WIRELESS_MODE_AC_24G ||
+	    wireless_mode == PHYDM_WIRELESS_MODE_AC_ONLY)
 		vht_en_out = 1;
-		/**/
-	}
 
-	PHYDM_DBG(p_dm, DBG_RA, ("wireless_mode= (( 0x%x )), VHT_EN= (( %d ))\n", wireless_mode, vht_en_out));
+	PHYDM_DBG(dm, DBG_RA, "wireless_mode= (( 0x%x )), VHT_EN= (( %d ))\n",
+		  wireless_mode, vht_en_out);
 	return vht_en_out;
 }
 
-u8
-phydm_rate_id_mapping(
-	void			*p_dm_void,
-	u32			wireless_mode,
-	u8			rf_type,
-	u8			bw
-)
+u8 phydm_rftype2rateid_2g_n20(void *dm_void, u8 rf_type)
 {
-	struct PHY_DM_STRUCT		*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	u8			rate_id_idx = 0;
-
-	PHYDM_DBG(p_dm, DBG_RA, ("wireless_mode= (( 0x%x )), rf_type = (( 0x%x )), BW = (( 0x%x ))\n",
-			wireless_mode, rf_type, bw));
-
+	u8 rate_id_idx = 0;
+
+	if (rf_type == RF_1T1R)
+		rate_id_idx = PHYDM_BGN_20M_1SS;
+	else if (rf_type == RF_2T2R)
+		rate_id_idx = PHYDM_BGN_20M_2SS;
+	else if (rf_type == RF_3T3R)
+		rate_id_idx = PHYDM_ARFR5_N_3SS;
+	else
+		rate_id_idx = PHYDM_ARFR7_N_4SS;
+	return rate_id_idx;
+}
 
-	switch (wireless_mode) {
+u8 phydm_rftype2rateid_2g_n40(void *dm_void, u8 rf_type)
+{
+	u8 rate_id_idx = 0;
+
+	if (rf_type == RF_1T1R)
+		rate_id_idx = PHYDM_BGN_40M_1SS;
+	else if (rf_type == RF_2T2R)
+		rate_id_idx = PHYDM_BGN_40M_2SS;
+	else if (rf_type == RF_3T3R)
+		rate_id_idx = PHYDM_ARFR5_N_3SS;
+	else
+		rate_id_idx = PHYDM_ARFR7_N_4SS;
+	return rate_id_idx;
+}
 
-	case PHYDM_WIRELESS_MODE_N_24G:
-	{
+u8 phydm_rftype2rateid_5g_n(void *dm_void, u8 rf_type)
+{
+	u8 rate_id_idx = 0;
+
+	if (rf_type == RF_1T1R)
+		rate_id_idx = PHYDM_GN_N1SS;
+	else if (rf_type == RF_2T2R)
+		rate_id_idx = PHYDM_GN_N2SS;
+	else if (rf_type == RF_3T3R)
+		rate_id_idx = PHYDM_ARFR5_N_3SS;
+	else
+		rate_id_idx = PHYDM_ARFR7_N_4SS;
+	return rate_id_idx;
+}
 
-		if (bw == CHANNEL_WIDTH_40) {
+u8 phydm_rftype2rateid_ac80(void *dm_void, u8 rf_type)
+{
+	u8 rate_id_idx = 0;
+
+	if (rf_type == RF_1T1R)
+		rate_id_idx = PHYDM_ARFR1_AC_1SS;
+	else if (rf_type == RF_2T2R)
+		rate_id_idx = PHYDM_ARFR0_AC_2SS;
+	else if (rf_type == RF_3T3R)
+		rate_id_idx = PHYDM_ARFR4_AC_3SS;
+	else
+		rate_id_idx = PHYDM_ARFR6_AC_4SS;
+	return rate_id_idx;
+}
 
-			if (rf_type == RF_1T1R)
-				rate_id_idx = PHYDM_BGN_40M_1SS;
-			else if (rf_type == RF_2T2R)
-				rate_id_idx = PHYDM_BGN_40M_2SS;
-			else
-				rate_id_idx = PHYDM_ARFR5_N_3SS;
+u8 phydm_rftype2rateid_ac40(void *dm_void, u8 rf_type)
+{
+	u8 rate_id_idx = 0;
+
+	if (rf_type == RF_1T1R)
+		rate_id_idx = PHYDM_ARFR2_AC_2G_1SS;
+	else if (rf_type == RF_2T2R)
+		rate_id_idx = PHYDM_ARFR3_AC_2G_2SS;
+	else if (rf_type == RF_3T3R)
+		rate_id_idx = PHYDM_ARFR4_AC_3SS;
+	else
+		rate_id_idx = PHYDM_ARFR6_AC_4SS;
+	return rate_id_idx;
+}
 
-		} else {
+u8 phydm_rate_id_mapping(void *dm_void, u32 wireless_mode, u8 rf_type, u8 bw)
+{
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	u8 rate_id_idx = 0;
 
-			if (rf_type == RF_1T1R)
-				rate_id_idx = PHYDM_BGN_20M_1SS;
-			else if (rf_type == RF_2T2R)
-				rate_id_idx = PHYDM_BGN_20M_2SS;
-			else
-				rate_id_idx = PHYDM_ARFR5_N_3SS;
-		}
-	}
-	break;
+	PHYDM_DBG(dm, DBG_RA,
+		  "wireless_mode= (( 0x%x )), rf_type = (( 0x%x )), BW = (( 0x%x ))\n",
+		  wireless_mode, rf_type, bw);
 
-	case PHYDM_WIRELESS_MODE_N_5G:
-	{
-		if (rf_type == RF_1T1R)
-			rate_id_idx = PHYDM_GN_N1SS;
-		else if (rf_type == RF_2T2R)
-			rate_id_idx = PHYDM_GN_N2SS;
+	switch (wireless_mode) {
+	case PHYDM_WIRELESS_MODE_N_24G:
+		if (bw == CHANNEL_WIDTH_40)
+			rate_id_idx = phydm_rftype2rateid_2g_n40(dm, rf_type);
 		else
-			rate_id_idx = PHYDM_ARFR5_N_3SS;
-	}
+			rate_id_idx = phydm_rftype2rateid_2g_n20(dm, rf_type);
+		break;
 
-	break;
+	case PHYDM_WIRELESS_MODE_N_5G:
+		rate_id_idx = phydm_rftype2rateid_5g_n(dm, rf_type);
+		break;
 
 	case PHYDM_WIRELESS_MODE_G:
 		rate_id_idx = PHYDM_BG;
@@ -1344,376 +1487,254 @@ phydm_rate_id_mapping(
 		rate_id_idx = PHYDM_B_20M;
 		break;
 
-
 	case PHYDM_WIRELESS_MODE_AC_5G:
 	case PHYDM_WIRELESS_MODE_AC_ONLY:
-	{
-		if (rf_type == RF_1T1R)
-			rate_id_idx = PHYDM_ARFR1_AC_1SS;
-		else if (rf_type == RF_2T2R)
-			rate_id_idx = PHYDM_ARFR0_AC_2SS;
-		else
-			rate_id_idx = PHYDM_ARFR4_AC_3SS;
-	}
-	break;
+		rate_id_idx = phydm_rftype2rateid_ac80(dm, rf_type);
+		break;
 
 	case PHYDM_WIRELESS_MODE_AC_24G:
-	{
-		/*Becareful to set "Lowest rate" while using PHYDM_ARFR4_AC_3SS in 2.4G/5G*/
-		if (bw >= CHANNEL_WIDTH_80) {
-			if (rf_type == RF_1T1R)
-				rate_id_idx = PHYDM_ARFR1_AC_1SS;
-			else if (rf_type == RF_2T2R)
-				rate_id_idx = PHYDM_ARFR0_AC_2SS;
-			else
-				rate_id_idx = PHYDM_ARFR4_AC_3SS;
-		} else {
-
-			if (rf_type == RF_1T1R)
-				rate_id_idx = PHYDM_ARFR2_AC_2G_1SS;
-			else if (rf_type == RF_2T2R)
-				rate_id_idx = PHYDM_ARFR3_AC_2G_2SS;
-			else
-				rate_id_idx = PHYDM_ARFR4_AC_3SS;
-		}
-	}
-	break;
+/*@Becareful to set "Lowest rate" while using PHYDM_ARFR4_AC_3SS in 2.4G/5G*/
+		if (bw >= CHANNEL_WIDTH_80)
+			rate_id_idx = phydm_rftype2rateid_ac80(dm, rf_type);
+		else
+			rate_id_idx = phydm_rftype2rateid_ac40(dm, rf_type);
+		break;
 
 	default:
 		rate_id_idx = 0;
 		break;
 	}
 
-	PHYDM_DBG(p_dm, DBG_RA, ("RA rate ID = (( 0x%x ))\n", rate_id_idx));
+	PHYDM_DBG(dm, DBG_RA, "RA rate ID = (( 0x%x ))\n", rate_id_idx);
 
 	return rate_id_idx;
 }
 
-void
-phydm_update_hal_ra_mask(
-	void			*p_dm_void,
-	u32			wireless_mode,
-	u8			rf_type,
-	u8			bw,
-	u8			mimo_ps_enable,
-	u8			disable_cck_rate,
-	u32			*ratr_bitmap_msb_in,
-	u32			*ratr_bitmap_lsb_in,
-	u8			tx_rate_level
-)
-{
-	struct PHY_DM_STRUCT		*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	u32			ratr_bitmap = *ratr_bitmap_lsb_in, ratr_bitmap_msb = *ratr_bitmap_msb_in;
-
-	/*PHYDM_DBG(p_dm, DBG_RA_MASK, ("phydm_rf_type = (( %x )), rf_type = (( %x ))\n", phydm_rf_type, rf_type));*/
-	PHYDM_DBG(p_dm, DBG_RA_MASK, ("Platfoem original RA Mask = (( 0x %x | %x ))\n", ratr_bitmap_msb, ratr_bitmap));
-
-	switch (wireless_mode) {
-
-	case PHYDM_WIRELESS_MODE_B:
-	{
-		ratr_bitmap &= 0x0000000f;
-	}
-	break;
-
-	case PHYDM_WIRELESS_MODE_G:
-	{
-		ratr_bitmap &= 0x00000ff5;
-	}
-	break;
-
-	case PHYDM_WIRELESS_MODE_A:
-	{
-		ratr_bitmap &= 0x00000ff0;
-	}
-	break;
-
-	case PHYDM_WIRELESS_MODE_N_24G:
-	case PHYDM_WIRELESS_MODE_N_5G:
-	{
-		if (mimo_ps_enable)
-			rf_type = RF_1T1R;
-
-		if (rf_type == RF_1T1R) {
-
-			if (bw == CHANNEL_WIDTH_40)
-				ratr_bitmap &= 0x000ff015;
-			else
-				ratr_bitmap &= 0x000ff005;
-		} else if (rf_type == RF_2T2R || rf_type == RF_2T4R || rf_type == RF_2T3R) {
-
-			if (bw == CHANNEL_WIDTH_40)
-				ratr_bitmap &= 0x0ffff015;
-			else
-				ratr_bitmap &= 0x0ffff005;
-		} else { /*3T*/
-
-			ratr_bitmap &= 0xfffff015;
-			ratr_bitmap_msb &= 0xf;
-		}
-	}
-	break;
-
-	case PHYDM_WIRELESS_MODE_AC_24G:
-	{
-		if (rf_type == RF_1T1R)
-			ratr_bitmap &= 0x003ff015;
-		else if (rf_type == RF_2T2R || rf_type == RF_2T4R || rf_type == RF_2T3R)
-			ratr_bitmap &= 0xfffff015;
-		else {/*3T*/
-
-			ratr_bitmap &= 0xfffff010;
-			ratr_bitmap_msb &= 0x3ff;
-		}
-
-		if (bw == CHANNEL_WIDTH_20) {/* AC 20MHz doesn't support MCS9 */
-			ratr_bitmap &= 0x7fdfffff;
-			ratr_bitmap_msb &= 0x1ff;
-		}
-	}
-	break;
-
-	case PHYDM_WIRELESS_MODE_AC_5G:
-	{
-		if (rf_type == RF_1T1R)
-			ratr_bitmap &= 0x003ff010;
-		else if (rf_type == RF_2T2R || rf_type == RF_2T4R || rf_type == RF_2T3R)
-			ratr_bitmap &= 0xfffff010;
-		else {/*3T*/
-
-			ratr_bitmap &= 0xfffff010;
-			ratr_bitmap_msb &= 0x3ff;
-		}
-
-		if (bw == CHANNEL_WIDTH_20) {/* AC 20MHz doesn't support MCS9 */
-			ratr_bitmap &= 0x7fdfffff;
-			ratr_bitmap_msb &= 0x1ff;
-		}
-	}
-	break;
-
-	default:
-		break;
-	}
-
-	if (wireless_mode != PHYDM_WIRELESS_MODE_B) {
-
-		if (tx_rate_level == 0)
-			ratr_bitmap &=  0xffffffff;
-		else if (tx_rate_level == 1)
-			ratr_bitmap &=  0xfffffff0;
-		else if (tx_rate_level == 2)
-			ratr_bitmap &=  0xffffefe0;
-		else if (tx_rate_level == 3)
-			ratr_bitmap &=  0xffffcfc0;
-		else if (tx_rate_level == 4)
-			ratr_bitmap &=  0xffff8f80;
-		else if (tx_rate_level >= 5)
-			ratr_bitmap &=  0xffff0f00;
-
-	}
-
-	if (disable_cck_rate)
-		ratr_bitmap &= 0xfffffff0;
-
-	PHYDM_DBG(p_dm, DBG_RA_MASK, ("wireless_mode= (( 0x%x )), rf_type = (( 0x%x )), BW = (( 0x%x )), MimoPs_en = (( %d )), tx_rate_level= (( 0x%x ))\n",
-		wireless_mode, rf_type, bw, mimo_ps_enable, tx_rate_level));
-
-	/*PHYDM_DBG(p_dm, DBG_RA_MASK, ("111 Phydm modified RA Mask = (( 0x %x | %x ))\n", ratr_bitmap_msb, ratr_bitmap));*/
-
-	*ratr_bitmap_lsb_in = ratr_bitmap;
-	*ratr_bitmap_msb_in = ratr_bitmap_msb;
-	PHYDM_DBG(p_dm, DBG_RA_MASK, ("Phydm modified RA Mask = (( 0x %x | %x ))\n", *ratr_bitmap_msb_in, *ratr_bitmap_lsb_in));
-
-}
-
-u8
-phydm_rssi_lv_dec(
-	void			*p_dm_void,
-	u32			rssi,
-	u8			ratr_state
-)
+u8 phydm_rssi_lv_dec(void *dm_void, u32 rssi, u8 ratr_state)
 {
-	struct PHY_DM_STRUCT	*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	u8	rssi_lv_table[RA_FLOOR_TABLE_SIZE] = {20, 34, 38, 42, 46, 50, 100}; /*MCS0 ~ MCS4 , VHT1SS MCS0 ~ MCS4 , G 6M~24M*/
-	u8	new_rssi_lv = 0;
-	u8	i;
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	/*@MCS0 ~ MCS4 , VHT1SS MCS0 ~ MCS4 , G 6M~24M*/
+	u8 rssi_lv_t[RA_FLOOR_TABLE_SIZE] = {20, 34, 38, 42, 46, 50, 100};
+	u8 new_rssi_lv = 0;
+	u8 i;
 
-	PHYDM_DBG(p_dm, DBG_RA_MASK, ("curr RA level=(%d), Table_ori=[%d, %d, %d, %d, %d, %d]\n",
-		ratr_state, rssi_lv_table[0], rssi_lv_table[1], rssi_lv_table[2], rssi_lv_table[3], rssi_lv_table[4], rssi_lv_table[5]));
+	PHYDM_DBG(dm, DBG_RA_MASK,
+		  "curr RA level=(%d), Table_ori=[%d, %d, %d, %d, %d, %d]\n",
+		  ratr_state, rssi_lv_t[0], rssi_lv_t[1], rssi_lv_t[2],
+		  rssi_lv_t[3], rssi_lv_t[4], rssi_lv_t[5]);
 
 	for (i = 0; i < RA_FLOOR_TABLE_SIZE; i++) {
-
 		if (i >= (ratr_state))
-			rssi_lv_table[i] += RA_FLOOR_UP_GAP;
+			rssi_lv_t[i] += RA_FLOOR_UP_GAP;
 	}
 
-	PHYDM_DBG(p_dm, DBG_RA_MASK, ("RSSI=(%d), Table_mod=[%d, %d, %d, %d, %d, %d]\n",
-		rssi, rssi_lv_table[0], rssi_lv_table[1], rssi_lv_table[2], rssi_lv_table[3], rssi_lv_table[4], rssi_lv_table[5]));
+	PHYDM_DBG(dm, DBG_RA_MASK,
+		  "RSSI=(%d), Table_mod=[%d, %d, %d, %d, %d, %d]\n", rssi,
+		  rssi_lv_t[0], rssi_lv_t[1], rssi_lv_t[2], rssi_lv_t[3],
+		  rssi_lv_t[4], rssi_lv_t[5]);
 
 	for (i = 0; i < RA_FLOOR_TABLE_SIZE; i++) {
-
-		if (rssi < rssi_lv_table[i]) {
+		if (rssi < rssi_lv_t[i]) {
 			new_rssi_lv = i;
 			break;
 		}
 	}
-	return	new_rssi_lv;
+	return new_rssi_lv;
 }
 
-u8
-phydm_rate_order_compute(
-	void	*p_dm_void,
-	u8	rate_idx
-)
+u8 phydm_rate_order_compute(void *dm_void, u8 rate_idx)
 {
-	u8		rate_order = 0;
-
-	if (rate_idx >= ODM_RATEVHTSS4MCS0) {
+	u8 rate_order = 0;
 
+	if (rate_idx >= ODM_RATEVHTSS4MCS0)
 		rate_idx -= ODM_RATEVHTSS4MCS0;
-		/**/
-	} else if (rate_idx >= ODM_RATEVHTSS3MCS0) {
-
+	else if (rate_idx >= ODM_RATEVHTSS3MCS0)
 		rate_idx -= ODM_RATEVHTSS3MCS0;
-		/**/
-	} else if (rate_idx >= ODM_RATEVHTSS2MCS0) {
-
+	else if (rate_idx >= ODM_RATEVHTSS2MCS0)
 		rate_idx -= ODM_RATEVHTSS2MCS0;
-		/**/
-	} else if (rate_idx >= ODM_RATEVHTSS1MCS0) {
-
+	else if (rate_idx >= ODM_RATEVHTSS1MCS0)
 		rate_idx -= ODM_RATEVHTSS1MCS0;
-		/**/
-	} else if (rate_idx >= ODM_RATEMCS24) {
-
+	else if (rate_idx >= ODM_RATEMCS24)
 		rate_idx -= ODM_RATEMCS24;
-		/**/
-	} else if (rate_idx >= ODM_RATEMCS16) {
-
+	else if (rate_idx >= ODM_RATEMCS16)
 		rate_idx -= ODM_RATEMCS16;
-		/**/
-	} else if (rate_idx >= ODM_RATEMCS8) {
-
+	else if (rate_idx >= ODM_RATEMCS8)
 		rate_idx -= ODM_RATEMCS8;
-		/**/
-	}
 	rate_order = rate_idx;
 
 	return rate_order;
+}
 
+#if (DM_ODM_SUPPORT_TYPE == ODM_CE)
+u8 phydm_rate2ss(void *dm_void, u8 rate_idx)
+{
+	u8 ret = 0xff;
+	u8 i, j;
+	u8 search_idx;
+	u32 ss_mapping_tab[4][3] = {{0x00000000, 0x003ff000, 0x000ff000},
+				    {0x00000000, 0xffc00000, 0x0ff00000},
+				    {0x000003ff, 0x0000000f, 0xf0000000},
+				    {0x000ffc00, 0x00000ff0, 0x00000000} };
+	if (rate_idx < 32) {
+		search_idx = rate_idx;
+		j = 0;
+	} else if (rate_idx < 64) {
+		search_idx = rate_idx - 32;
+		j = 1;
+	} else {
+		search_idx = rate_idx - 64;
+		j = 2;
+	}
+	for (i = 0; i < 4; i++)
+		if (ss_mapping_tab[i][j] & BIT(search_idx))
+			ret = i;
+	return ret;
 }
 
-void
-phydm_ra_common_info_update(
-	void	*p_dm_void
-)
+u8 phydm_rate2plcp(void *dm_void, u8 rate_idx)
 {
-	struct PHY_DM_STRUCT	*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	struct _rate_adaptive_table_		*p_ra_table = &p_dm->dm_ra_table;
-	struct cmn_sta_info			*p_sta = NULL;
-	u16		macid;
-	u8		rate_order_tmp;
-	u8		cnt = 0;
-
-	p_ra_table->highest_client_tx_order = 0;
-	p_ra_table->power_tracking_flag = 1;
-
-	if (p_dm->number_linked_client != 0) {
-		for (macid = 0; macid < ODM_ASSOCIATE_ENTRY_NUM; macid++) {
-
-			p_sta = p_dm->p_phydm_sta_info[macid];
-			
-			if (is_sta_active(p_sta)) {
-			
-				rate_order_tmp = phydm_rate_order_compute(p_dm, (p_sta->ra_info.curr_tx_rate & 0x7f));
-
-				if (rate_order_tmp >= (p_ra_table->highest_client_tx_order)) {
-					p_ra_table->highest_client_tx_order = rate_order_tmp;
-					p_ra_table->highest_client_tx_rate_order = macid;
-				}
+	u8 rate2ss = 0;
+	u8 ltftime = 0;
+	u8 plcptime = 0xff;
+
+	if (rate_idx < ODM_RATE6M) {
+		plcptime = 192;
+		/* @CCK PLCP = 192us (long preamble) */
+	} else if (rate_idx < ODM_RATEMCS0) {
+		plcptime = 20;
+		/* @LegOFDM PLCP = 20us */
+	} else {
+		if (rate_idx < ODM_RATEVHTSS1MCS0)
+			plcptime = 32;
+		/* @HT mode PLCP = 20us + 12us + 4us x Nss */
+		else
+			plcptime = 36;
+		/* VHT mode PLCP = 20us + 16us + 4us x Nss */
+		rate2ss = phydm_rate2ss(dm_void, rate_idx);
+		if (rate2ss != 0xff)
+			ltftime = (rate2ss + 1) * 4;
+		else
+			return 0xff;
 
-				cnt++;
+		plcptime += ltftime;
+	}
+	return plcptime;
+}
 
-				if (cnt == p_dm->number_linked_client)
-					break;
-			}
+u8 phydm_get_plcp(void *dm_void, u16 macid)
+{
+	u8 plcp_time = 0;
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct cmn_sta_info *sta = NULL;
+	struct ra_sta_info *ra = NULL;
+
+	sta = dm->phydm_sta_info[macid];
+	ra = &sta->ra_info;
+	plcp_time = phydm_rate2plcp(dm, ra->curr_tx_rate);
+	return plcp_time;
+}
+#endif
+
+void phydm_ra_common_info_update(void *dm_void)
+{
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct ra_table *ra_tab = &dm->dm_ra_table;
+	struct cmn_sta_info *sta = NULL;
+	u16 macid;
+	u8 rate_order_tmp;
+	u8 rate_idx = 0;
+	u8 cnt = 0;
+
+	ra_tab->highest_client_tx_order = 0;
+	ra_tab->power_tracking_flag = 1;
+
+	if (!dm->number_linked_client)
+		return;
+
+	for (macid = 0; macid < ODM_ASSOCIATE_ENTRY_NUM; macid++) {
+		sta = dm->phydm_sta_info[macid];
+
+		if (!is_sta_active(sta))
+			continue;
+
+		rate_idx = sta->ra_info.curr_tx_rate & 0x7f;
+		rate_order_tmp = phydm_rate_order_compute(dm, rate_idx);
+
+		if (rate_order_tmp >= ra_tab->highest_client_tx_order) {
+			ra_tab->highest_client_tx_order = rate_order_tmp;
+			ra_tab->highest_client_tx_rate_order = macid;
 		}
-		PHYDM_DBG(p_dm, DBG_RA, ("MACID[%d], Highest Tx order Update for power traking: %d\n", (p_ra_table->highest_client_tx_rate_order), (p_ra_table->highest_client_tx_order)));
+
+		cnt++;
+
+		if (cnt == dm->number_linked_client)
+			break;
 	}
+	PHYDM_DBG(dm, DBG_RA,
+		  "MACID[%d], Highest Tx order Update for power traking: %d\n",
+		  ra_tab->highest_client_tx_rate_order,
+		  ra_tab->highest_client_tx_order);
 }
 
-void
-phydm_ra_info_watchdog(
-	void	*p_dm_void
-)
+void phydm_ra_info_watchdog(void *dm_void)
 {
-	struct PHY_DM_STRUCT	*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
 
-	phydm_ra_common_info_update(p_dm);
-	#if (defined(CONFIG_RA_DYNAMIC_RTY_LIMIT))
-	phydm_ra_dynamic_retry_limit(p_dm);
-	#endif
-	phydm_ra_dynamic_retry_count(p_dm);
-	phydm_refresh_rate_adaptive_mask(p_dm);
+	phydm_ra_common_info_update(dm);
+	phydm_ra_dynamic_retry_count(dm);
+	phydm_ra_mask_watchdog(dm);
 
-	#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
-	odm_refresh_basic_rate_mask(p_dm);
-	#endif
+#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
+	odm_refresh_basic_rate_mask(dm);
+#endif
 }
 
-void
-phydm_ra_info_init(
-	void	*p_dm_void
-)
+void phydm_ra_info_init(void *dm_void)
 {
-	struct PHY_DM_STRUCT	*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	struct _rate_adaptive_table_		*p_ra_table = &p_dm->dm_ra_table;
-
-	p_ra_table->highest_client_tx_rate_order = 0;
-	p_ra_table->highest_client_tx_order = 0;
-	p_ra_table->RA_threshold_offset = 0;
-	p_ra_table->RA_offset_direction = 0;
-	
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct ra_table *ra_tab = &dm->dm_ra_table;
+
+	ra_tab->highest_client_tx_rate_order = 0;
+	ra_tab->highest_client_tx_order = 0;
+	ra_tab->ra_th_ofst = 0;
+	ra_tab->ra_ofst_direc = 0;
+
 #if (RTL8822B_SUPPORT == 1)
-	if (p_dm->support_ic_type == ODM_RTL8822B) {
-		u32	ret_value;
+	if (dm->support_ic_type == ODM_RTL8822B) {
+		u32 ret_value;
 
-		ret_value = odm_get_bb_reg(p_dm, 0x4c8, MASKBYTE2);
-		odm_set_bb_reg(p_dm, 0x4cc, MASKBYTE3, (ret_value - 1));
+		ret_value = odm_get_bb_reg(dm, R_0x4c8, MASKBYTE2);
+		odm_set_bb_reg(dm, R_0x4cc, MASKBYTE3, (ret_value - 1));
 	}
 #endif
-	
-	#ifdef CONFIG_RA_DYNAMIC_RTY_LIMIT
-	phydm_ra_dynamic_retry_limit_init(p_dm);
-	#endif
 
-	#ifdef CONFIG_RA_DYNAMIC_RATE_ID
-	phydm_ra_dynamic_rate_id_init(p_dm);
+	#if 0 /*@CONFIG_RA_DYNAMIC_RTY_LIMIT*/
+	phydm_ra_dynamic_retry_limit_init(dm);
 	#endif
 
-	#ifdef CONFIG_RA_DBG_CMD
-	odm_ra_para_adjust_init(p_dm);
+	#if 0 /*@CONFIG_RA_DYNAMIC_RATE_ID*/
+	phydm_ra_dynamic_rate_id_init(dm);
 	#endif
 
-	phydm_rate_adaptive_mask_init(p_dm);
-	
+	phydm_rate_adaptive_mask_init(dm);
 }
 
-u8
-odm_find_rts_rate(
-	void			*p_dm_void,
-	u8			tx_rate,
-	boolean		is_erp_protect
-)
+u8 odm_find_rts_rate(void *dm_void, u8 tx_rate, boolean is_erp_protect)
 {
-	struct PHY_DM_STRUCT		*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	u8	rts_ini_rate = ODM_RATE6M;
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	u8 rts_ini_rate = ODM_RATE6M;
 
-	if (is_erp_protect) /* use CCK rate as RTS*/
+	if (is_erp_protect) { /* use CCK rate as RTS*/
 		rts_ini_rate = ODM_RATE1M;
-	else {
+	} else {
 		switch (tx_rate) {
+		case ODM_RATEVHTSS4MCS9:
+		case ODM_RATEVHTSS4MCS8:
+		case ODM_RATEVHTSS4MCS7:
+		case ODM_RATEVHTSS4MCS6:
+		case ODM_RATEVHTSS4MCS5:
+		case ODM_RATEVHTSS4MCS4:
+		case ODM_RATEVHTSS4MCS3:
 		case ODM_RATEVHTSS3MCS9:
 		case ODM_RATEVHTSS3MCS8:
 		case ODM_RATEVHTSS3MCS7:
@@ -1735,6 +1756,16 @@ odm_find_rts_rate(
 		case ODM_RATEVHTSS1MCS5:
 		case ODM_RATEVHTSS1MCS4:
 		case ODM_RATEVHTSS1MCS3:
+		case ODM_RATEMCS31:
+		case ODM_RATEMCS30:
+		case ODM_RATEMCS29:
+		case ODM_RATEMCS28:
+		case ODM_RATEMCS27:
+		case ODM_RATEMCS23:
+		case ODM_RATEMCS22:
+		case ODM_RATEMCS21:
+		case ODM_RATEMCS20:
+		case ODM_RATEMCS19:
 		case ODM_RATEMCS15:
 		case ODM_RATEMCS14:
 		case ODM_RATEMCS13:
@@ -1751,12 +1782,18 @@ odm_find_rts_rate(
 		case ODM_RATE24M:
 			rts_ini_rate = ODM_RATE24M;
 			break;
+		case ODM_RATEVHTSS4MCS2:
+		case ODM_RATEVHTSS4MCS1:
 		case ODM_RATEVHTSS3MCS2:
 		case ODM_RATEVHTSS3MCS1:
 		case ODM_RATEVHTSS2MCS2:
 		case ODM_RATEVHTSS2MCS1:
 		case ODM_RATEVHTSS1MCS2:
 		case ODM_RATEVHTSS1MCS1:
+		case ODM_RATEMCS26:
+		case ODM_RATEMCS25:
+		case ODM_RATEMCS18:
+		case ODM_RATEMCS17:
 		case ODM_RATEMCS10:
 		case ODM_RATEMCS9:
 		case ODM_RATEMCS2:
@@ -1765,9 +1802,12 @@ odm_find_rts_rate(
 		case ODM_RATE12M:
 			rts_ini_rate = ODM_RATE12M;
 			break;
+		case ODM_RATEVHTSS4MCS0:
 		case ODM_RATEVHTSS3MCS0:
 		case ODM_RATEVHTSS2MCS0:
 		case ODM_RATEVHTSS1MCS0:
+		case ODM_RATEMCS24:
+		case ODM_RATEMCS16:
 		case ODM_RATEMCS8:
 		case ODM_RATEMCS0:
 		case ODM_RATE9M:
@@ -1786,557 +1826,260 @@ odm_find_rts_rate(
 		}
 	}
 
-	if (*p_dm->p_band_type == ODM_BAND_5G) {
+	if (*dm->band_type == ODM_BAND_5G) {
 		if (rts_ini_rate < ODM_RATE6M)
 			rts_ini_rate = ODM_RATE6M;
 	}
 	return rts_ini_rate;
-
 }
 
 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
 
-void
-odm_refresh_basic_rate_mask(
-	void	*p_dm_void
-)
+void odm_refresh_basic_rate_mask(
+	void *dm_void)
 {
-	struct PHY_DM_STRUCT		*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	struct _ADAPTER		*adapter	 =  p_dm->adapter;
-	static u8		stage = 0;
-	u8			cur_stage = 0;
-	OCTET_STRING	os_rate_set;
-	PMGNT_INFO		p_mgnt_info = GetDefaultMgntInfo(adapter);
-	u8			rate_set[5] = {MGN_1M, MGN_2M, MGN_5_5M, MGN_11M, MGN_6M};
-
-	if (p_dm->support_ic_type != ODM_RTL8812 && p_dm->support_ic_type != ODM_RTL8821)
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	void *adapter = dm->adapter;
+	static u8 stage = 0;
+	u8 cur_stage = 0;
+	OCTET_STRING os_rate_set;
+	PMGNT_INFO mgnt_info = GetDefaultMgntInfo(((PADAPTER)adapter));
+	u8 rate_set[5] = {MGN_1M, MGN_2M, MGN_5_5M, MGN_11M, MGN_6M};
+
+	if (dm->support_ic_type != ODM_RTL8812 && dm->support_ic_type != ODM_RTL8821)
 		return;
 
-	if (p_dm->is_linked == false)	/* unlink Default port information */
+	if (dm->is_linked == false) /* unlink Default port information */
 		cur_stage = 0;
-	else if (p_dm->rssi_min < 40)	/* link RSSI  < 40% */
+	else if (dm->rssi_min < 40) /* @link RSSI  < 40% */
 		cur_stage = 1;
-	else if (p_dm->rssi_min > 45)	/* link RSSI > 45% */
+	else if (dm->rssi_min > 45) /* @link RSSI > 45% */
 		cur_stage = 3;
 	else
-		cur_stage = 2;					/* link  25% <= RSSI <= 30% */
+		cur_stage = 2; /* @link  25% <= RSSI <= 30% */
 
 	if (cur_stage != stage) {
 		if (cur_stage == 1) {
 			FillOctetString(os_rate_set, rate_set, 5);
-			FilterSupportRate(p_mgnt_info->mBrates, &os_rate_set, false);
-			phydm_set_hw_reg_handler_interface(p_dm, HW_VAR_BASIC_RATE, (u8 *)&os_rate_set);
+			FilterSupportRate(mgnt_info->mBrates, &os_rate_set, false);
+			phydm_set_hw_reg_handler_interface(dm, HW_VAR_BASIC_RATE, (u8 *)&os_rate_set);
 		} else if (cur_stage == 3 && (stage == 1 || stage == 2))
-			phydm_set_hw_reg_handler_interface(p_dm, HW_VAR_BASIC_RATE, (u8 *)(&p_mgnt_info->mBrates));
+			phydm_set_hw_reg_handler_interface(dm, HW_VAR_BASIC_RATE, (u8 *)(&mgnt_info->mBrates));
 	}
 
 	stage = cur_stage;
 }
 
-void
-odm_refresh_ldpc_rts_mp(
-	struct _ADAPTER			*p_adapter,
-	struct PHY_DM_STRUCT			*p_dm,
-	u8				m_mac_id,
-	u8				iot_peer,
-	s32				undecorated_smoothed_pwdb
-)
-{
-	boolean					is_ctl_ldpc = false;
-	struct _rate_adaptive_table_	*p_ra_t = &p_dm->dm_ra_table;
-
-	if (p_dm->support_ic_type != ODM_RTL8821 && p_dm->support_ic_type != ODM_RTL8812)
-		return;
-
-	if ((p_dm->support_ic_type == ODM_RTL8821) && (p_dm->cut_version == ODM_CUT_A))
-		is_ctl_ldpc = true;
-	else if (p_dm->support_ic_type == ODM_RTL8812 &&
-		 iot_peer == HT_IOT_PEER_REALTEK_JAGUAR_CCUTAP)
-		is_ctl_ldpc = true;
-
-	if (is_ctl_ldpc) {
-		if (undecorated_smoothed_pwdb < (p_ra_t->ldpc_thres - 5))
-			MgntSet_TX_LDPC(p_adapter, m_mac_id, true);
-		else if (undecorated_smoothed_pwdb > p_ra_t->ldpc_thres)
-			MgntSet_TX_LDPC(p_adapter, m_mac_id, false);
-	}
-}
-
-void
-odm_rate_adaptive_state_ap_init(
-	void		*PADAPTER_VOID,
-	struct cmn_sta_info*p_entry
-)
-{
-	struct _ADAPTER		*adapter = (struct _ADAPTER *)PADAPTER_VOID;
-	p_entry->ra_info.rssi_level = DM_RATR_STA_INIT;
-}
-
-#elif (DM_ODM_SUPPORT_TYPE & ODM_AP)
-
-void
-phydm_gen_ramask_h2c_AP(
-	void			*p_dm_void,
-	struct rtl8192cd_priv *priv,
-	struct sta_info *p_entry,
-	u8			rssi_level
-)
-{
-	struct PHY_DM_STRUCT	*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-
-	if (p_dm->support_ic_type == ODM_RTL8812) {
-
-		#if (RTL8812A_SUPPORT == 1)
-		UpdateHalRAMask8812(priv, p_entry, rssi_level);
-		/**/
-		#endif
-	} else if (p_dm->support_ic_type == ODM_RTL8188E) {
-
-		#if (RTL8188E_SUPPORT == 1)
-		#ifdef TXREPORT
-		add_RATid(priv, p_entry);
-		/**/
-		#endif
-		#endif
-	} else {
-		#ifdef CONFIG_WLAN_HAL
-		GET_HAL_INTERFACE(priv)->UpdateHalRAMaskHandler(priv, p_entry, rssi_level);
-		#endif
-	} 
-}
-
 #endif
 
-#if (defined(CONFIG_RA_DYNAMIC_RTY_LIMIT))
+#if 0 /*@CONFIG_RA_DYNAMIC_RTY_LIMIT*/
 
-void
-phydm_retry_limit_table_bound(
-	void	*p_dm_void,
-	u8	*retry_limit,
-	u8	offset
-)
+void phydm_retry_limit_table_bound(
+	void *dm_void,
+	u8 *retry_limit,
+	u8 offset)
 {
-	struct PHY_DM_STRUCT		*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	struct _rate_adaptive_table_		*p_ra_table = &p_dm->dm_ra_table;
-
-	if (*retry_limit >  offset) {
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct ra_table *ra_tab = &dm->dm_ra_table;
 
+	if (*retry_limit > offset) {
 		*retry_limit -= offset;
 
-		if (*retry_limit < p_ra_table->retrylimit_low)
-			*retry_limit = p_ra_table->retrylimit_low;
-		else if (*retry_limit > p_ra_table->retrylimit_high)
-			*retry_limit = p_ra_table->retrylimit_high;
+		if (*retry_limit < ra_tab->retrylimit_low)
+			*retry_limit = ra_tab->retrylimit_low;
+		else if (*retry_limit > ra_tab->retrylimit_high)
+			*retry_limit = ra_tab->retrylimit_high;
 	} else
-		*retry_limit = p_ra_table->retrylimit_low;
+		*retry_limit = ra_tab->retrylimit_low;
 }
 
-void
-phydm_reset_retry_limit_table(
-	void	*p_dm_void
-)
+void phydm_reset_retry_limit_table(
+	void *dm_void)
 {
-	struct PHY_DM_STRUCT		*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	struct _rate_adaptive_table_		*p_ra_table = &p_dm->dm_ra_table;
-	u8			i;
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct ra_table *ra_t = &dm->dm_ra_table;
+	u8 i;
 
 	u8 per_rate_retrylimit_table_20M[ODM_RATEMCS15 + 1] = {
-		1, 1, 2, 4,					/*CCK*/
-		2, 2, 4, 6, 8, 12, 16, 18,		/*OFDM*/
-		2, 4, 6, 8, 12, 18, 20, 22,		/*20M HT-1SS*/
-		2, 4, 6, 8, 12, 18, 20, 22		/*20M HT-2SS*/
+		1, 1, 2, 4, /*@CCK*/
+		2, 2, 4, 6, 8, 12, 16, 18, /*OFDM*/
+		2, 4, 6, 8, 12, 18, 20, 22, /*@20M HT-1SS*/
+		2, 4, 6, 8, 12, 18, 20, 22 /*@20M HT-2SS*/
 	};
 	u8 per_rate_retrylimit_table_40M[ODM_RATEMCS15 + 1] = {
-		1, 1, 2, 4,					/*CCK*/
-		2, 2, 4, 6, 8, 12, 16, 18,		/*OFDM*/
-		4, 8, 12, 16, 24, 32, 32, 32,		/*40M HT-1SS*/
-		4, 8, 12, 16, 24, 32, 32, 32		/*40M HT-2SS*/
+		1, 1, 2, 4, /*@CCK*/
+		2, 2, 4, 6, 8, 12, 16, 18, /*OFDM*/
+		4, 8, 12, 16, 24, 32, 32, 32, /*@40M HT-1SS*/
+		4, 8, 12, 16, 24, 32, 32, 32 /*@40M HT-2SS*/
 	};
 
-	memcpy(&(p_ra_table->per_rate_retrylimit_20M[0]), &(per_rate_retrylimit_table_20M[0]), ODM_NUM_RATE_IDX);
-	memcpy(&(p_ra_table->per_rate_retrylimit_40M[0]), &(per_rate_retrylimit_table_40M[0]), ODM_NUM_RATE_IDX);
+	memcpy(&ra_t->per_rate_retrylimit_20M[0],
+	       &per_rate_retrylimit_table_20M[0], ODM_NUM_RATE_IDX);
+	memcpy(&ra_t->per_rate_retrylimit_40M[0],
+	       &per_rate_retrylimit_table_40M[0], ODM_NUM_RATE_IDX);
 
 	for (i = 0; i < ODM_NUM_RATE_IDX; i++) {
-		phydm_retry_limit_table_bound(p_dm, &(p_ra_table->per_rate_retrylimit_20M[i]), 0);
-		phydm_retry_limit_table_bound(p_dm, &(p_ra_table->per_rate_retrylimit_40M[i]), 0);
+		phydm_retry_limit_table_bound(dm,
+					      &ra_t->per_rate_retrylimit_20M[i],
+					      0);
+		phydm_retry_limit_table_bound(dm,
+					      &ra_t->per_rate_retrylimit_40M[i],
+					      0);
 	}
 }
 
-void
-phydm_ra_dynamic_retry_limit_init(
-	void	*p_dm_void
-)
+void phydm_ra_dynamic_retry_limit_init(
+	void *dm_void)
 {
-	struct PHY_DM_STRUCT		*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	struct _rate_adaptive_table_			*p_ra_table = &p_dm->dm_ra_table;
-
-	p_ra_table->retry_descend_num = RA_RETRY_DESCEND_NUM;
-	p_ra_table->retrylimit_low = RA_RETRY_LIMIT_LOW;
-	p_ra_table->retrylimit_high = RA_RETRY_LIMIT_HIGH;
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct ra_table *ra_tab = &dm->dm_ra_table;
 
-	phydm_reset_retry_limit_table(p_dm);
+	ra_tab->retry_descend_num = RA_RETRY_DESCEND_NUM;
+	ra_tab->retrylimit_low = RA_RETRY_LIMIT_LOW;
+	ra_tab->retrylimit_high = RA_RETRY_LIMIT_HIGH;
 
+	phydm_reset_retry_limit_table(dm);
 }
 
-void
-phydm_ra_dynamic_retry_limit(
-	void	*p_dm_void
-)
+void phydm_ra_dynamic_retry_limit(
+	void *dm_void)
 {
-
-	struct PHY_DM_STRUCT		*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	struct _rate_adaptive_table_		*p_ra_table = &p_dm->dm_ra_table;
-	u8	i, retry_offset;
-	u32	ma_rx_tp;
-
-
-	if (p_dm->pre_number_active_client == p_dm->number_active_client) {
-
-		PHYDM_DBG(p_dm, DBG_RA, (" pre_number_active_client ==  number_active_client\n"));
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct ra_table *ra_tab = &dm->dm_ra_table;
+	u8 i, retry_offset;
+	u32 ma_rx_tp;
+
+	if (dm->pre_number_active_client == dm->number_active_client) {
+		PHYDM_DBG(dm, DBG_RA,
+			  "pre_number_active_client ==  number_active_client\n");
 		return;
 
 	} else {
-		if (p_dm->number_active_client == 1) {
-			phydm_reset_retry_limit_table(p_dm);
-			PHYDM_DBG(p_dm, DBG_RA, ("one client only->reset to default value\n"));
+		if (dm->number_active_client == 1) {
+			phydm_reset_retry_limit_table(dm);
+			PHYDM_DBG(dm, DBG_RA,
+				  "one client only->reset to default value\n");
 		} else {
-
-			retry_offset = p_dm->number_active_client * p_ra_table->retry_descend_num;
+			retry_offset = dm->number_active_client * ra_tab->retry_descend_num;
 
 			for (i = 0; i < ODM_NUM_RATE_IDX; i++) {
-
-				phydm_retry_limit_table_bound(p_dm, &(p_ra_table->per_rate_retrylimit_20M[i]), retry_offset);
-				phydm_retry_limit_table_bound(p_dm, &(p_ra_table->per_rate_retrylimit_40M[i]), retry_offset);
+				phydm_retry_limit_table_bound(dm,
+							      &ra_tab->per_rate_retrylimit_20M[i],
+							      retry_offset);
+				phydm_retry_limit_table_bound(dm,
+							      &ra_tab->per_rate_retrylimit_40M[i],
+							      retry_offset);
 			}
 		}
 	}
 }
 #endif
 
-#if (defined(CONFIG_RA_DYNAMIC_RATE_ID))
-void
-phydm_ra_dynamic_rate_id_on_assoc(
-	void	*p_dm_void,
-	u8	wireless_mode,
-	u8	init_rate_id
-)
+#if 0 /*@CONFIG_RA_DYNAMIC_RATE_ID*/
+void phydm_ra_dynamic_rate_id_on_assoc(
+	void *dm_void,
+	u8 wireless_mode,
+	u8 init_rate_id)
 {
-	struct PHY_DM_STRUCT	*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-
-	PHYDM_DBG(p_dm, DBG_RA, ("[ON ASSOC] rf_mode = ((0x%x)), wireless_mode = ((0x%x)), init_rate_id = ((0x%x))\n", p_dm->rf_type, wireless_mode, init_rate_id));
-
-	if ((p_dm->rf_type == RF_2T2R) || (p_dm->rf_type == RF_2T3R) || (p_dm->rf_type == RF_2T4R)) {
-
-		if ((p_dm->support_ic_type & (ODM_RTL8812 | ODM_RTL8192E)) &&
-		    (wireless_mode & (ODM_WM_N24G | ODM_WM_N5G))
-		   ) {
-			PHYDM_DBG(p_dm, DBG_RA, ("[ON ASSOC] set N-2SS ARFR5 table\n"));
-			odm_set_mac_reg(p_dm, 0x4a4, MASKDWORD, 0xfc1ffff);	/*N-2SS, ARFR5, rate_id = 0xe*/
-			odm_set_mac_reg(p_dm, 0x4a8, MASKDWORD, 0x0);		/*N-2SS, ARFR5, rate_id = 0xe*/
-		} else if ((p_dm->support_ic_type & (ODM_RTL8812)) &&
-			(wireless_mode & (ODM_WM_AC_5G | ODM_WM_AC_24G | ODM_WM_AC_ONLY))
-			  ) {
-			PHYDM_DBG(p_dm, DBG_RA, ("[ON ASSOC] set AC-2SS ARFR0 table\n"));
-			odm_set_mac_reg(p_dm, 0x444, MASKDWORD, 0x0fff);	/*AC-2SS, ARFR0, rate_id = 0x9*/
-			odm_set_mac_reg(p_dm, 0x448, MASKDWORD, 0xff01f000);		/*AC-2SS, ARFR0, rate_id = 0x9*/
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+
+	PHYDM_DBG(dm, DBG_RA,
+		  "[ON ASSOC] rf_mode = ((0x%x)), wireless_mode = ((0x%x)), init_rate_id = ((0x%x))\n",
+		  dm->rf_type, wireless_mode, init_rate_id);
+
+	if (dm->rf_type == RF_2T2R || dm->rf_type == RF_2T3R || dm->rf_type == RF_2T4R) {
+		if ((dm->support_ic_type & (ODM_RTL8812 | ODM_RTL8192E)) &&
+		    (wireless_mode & (ODM_WM_N24G | ODM_WM_N5G))) {
+			PHYDM_DBG(dm, DBG_RA,
+				  "[ON ASSOC] set N-2SS ARFR5 table\n");
+			odm_set_mac_reg(dm, R_0x4a4, MASKDWORD, 0xfc1ffff); /*N-2SS, ARFR5, rate_id = 0xe*/
+			odm_set_mac_reg(dm, R_0x4a8, MASKDWORD, 0x0); /*N-2SS, ARFR5, rate_id = 0xe*/
+		} else if ((dm->support_ic_type & (ODM_RTL8812)) &&
+			   (wireless_mode & (ODM_WM_AC_5G | ODM_WM_AC_24G | ODM_WM_AC_ONLY))) {
+			PHYDM_DBG(dm, DBG_RA,
+				  "[ON ASSOC] set AC-2SS ARFR0 table\n");
+			odm_set_mac_reg(dm, R_0x444, MASKDWORD, 0x0fff); /*@AC-2SS, ARFR0, rate_id = 0x9*/
+			odm_set_mac_reg(dm, R_0x448, MASKDWORD, 0xff01f000); /*@AC-2SS, ARFR0, rate_id = 0x9*/
 		}
 	}
-
 }
 
-void
-phydm_ra_dynamic_rate_id_init(
-	void	*p_dm_void
-)
+void phydm_ra_dynamic_rate_id_init(
+	void *dm_void)
 {
-	struct PHY_DM_STRUCT	*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
 
-	if (p_dm->support_ic_type & (ODM_RTL8812 | ODM_RTL8192E)) {
+	if (dm->support_ic_type & (ODM_RTL8812 | ODM_RTL8192E)) {
+		odm_set_mac_reg(dm, R_0x4a4, MASKDWORD, 0xfc1ffff); /*N-2SS, ARFR5, rate_id = 0xe*/
+		odm_set_mac_reg(dm, R_0x4a8, MASKDWORD, 0x0); /*N-2SS, ARFR5, rate_id = 0xe*/
 
-		odm_set_mac_reg(p_dm, 0x4a4, MASKDWORD, 0xfc1ffff);	/*N-2SS, ARFR5, rate_id = 0xe*/
-		odm_set_mac_reg(p_dm, 0x4a8, MASKDWORD, 0x0);		/*N-2SS, ARFR5, rate_id = 0xe*/
-
-		odm_set_mac_reg(p_dm, 0x444, MASKDWORD, 0x0fff);		/*AC-2SS, ARFR0, rate_id = 0x9*/
-		odm_set_mac_reg(p_dm, 0x448, MASKDWORD, 0xff01f000);	/*AC-2SS, ARFR0, rate_id = 0x9*/
+		odm_set_mac_reg(dm, R_0x444, MASKDWORD, 0x0fff); /*@AC-2SS, ARFR0, rate_id = 0x9*/
+		odm_set_mac_reg(dm, R_0x448, MASKDWORD, 0xff01f000); /*@AC-2SS, ARFR0, rate_id = 0x9*/
 	}
 }
 
-void
-phydm_update_rate_id(
-	void	*p_dm_void,
-	u8	rate,
-	u8	platform_macid
-)
+void phydm_update_rate_id(
+	void *dm_void,
+	u8 rate,
+	u8 platform_macid)
 {
 #if 0
 
-	struct PHY_DM_STRUCT	*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	struct _rate_adaptive_table_		*p_ra_table = &p_dm->dm_ra_table;
+	struct dm_struct	*dm = (struct dm_struct *)dm_void;
+	struct ra_table		*ra_tab = &dm->dm_ra_table;
 	u8		current_tx_ss;
 	u8		rate_idx = rate & 0x7f; /*remove bit7 SGI*/
-	u8		wireless_mode;
+	enum wireless_set wireless_set;
 	u8		phydm_macid;
-	struct sta_info	*p_entry;
-	struct cmn_sta_info	*p_sta;
-
+	struct cmn_sta_info	*sta;
 
-#if	0
+#if 0
 	if (rate_idx >= ODM_RATEVHTSS2MCS0) {
-		PHYDM_DBG(p_dm, DBG_RA, ("rate[%d]: (( VHT2SS-MCS%d ))\n", platform_macid, (rate_idx - ODM_RATEVHTSS2MCS0)));
-		/*dummy for SD4 check patch*/
+		PHYDM_DBG(dm, DBG_RA, "rate[%d]: (( VHT2SS-MCS%d ))\n",
+			  platform_macid, (rate_idx - ODM_RATEVHTSS2MCS0));
+		/*@dummy for SD4 check patch*/
 	} else if (rate_idx >= ODM_RATEVHTSS1MCS0) {
-		PHYDM_DBG(p_dm, DBG_RA, ("rate[%d]: (( VHT1SS-MCS%d ))\n", platform_macid, (rate_idx - ODM_RATEVHTSS1MCS0)));
-		/*dummy for SD4 check patch*/
+		PHYDM_DBG(dm, DBG_RA, "rate[%d]: (( VHT1SS-MCS%d ))\n",
+			  platform_macid, (rate_idx - ODM_RATEVHTSS1MCS0));
+		/*@dummy for SD4 check patch*/
 	} else if (rate_idx >= ODM_RATEMCS0) {
-		PHYDM_DBG(p_dm, DBG_RA, ("rate[%d]: (( HT-MCS%d ))\n", platform_macid, (rate_idx - ODM_RATEMCS0)));
-		/*dummy for SD4 check patch*/
+		PHYDM_DBG(dm, DBG_RA, "rate[%d]: (( HT-MCS%d ))\n",
+			  platform_macid, (rate_idx - ODM_RATEMCS0));
+		/*@dummy for SD4 check patch*/
 	} else {
-		PHYDM_DBG(p_dm, DBG_RA, ("rate[%d]: (( HT-MCS%d ))\n", platform_macid, rate_idx));
-		/*dummy for SD4 check patch*/
+		PHYDM_DBG(dm, DBG_RA, "rate[%d]: (( HT-MCS%d ))\n",
+			  platform_macid, rate_idx);
+		/*@dummy for SD4 check patch*/
 	}
 #endif
 
-	phydm_macid = p_dm->phydm_macid_table[platform_macid];
-	p_entry = p_dm->p_odm_sta_info[phydm_macid];
-	p_sta = p_dm->p_phydm_sta_info[phydm_macid];
-
-	if (is_sta_active(p_sta)) {
-		wireless_mode = p_entry->wireless_mode;
+	phydm_macid = dm->phydm_macid_table[platform_macid];
+	sta = dm->phydm_sta_info[phydm_macid];
 
-		if ((p_dm->rf_type  == RF_2T2R) || (p_dm->rf_type  == RF_2T3R) || (p_dm->rf_type  == RF_2T4R)) {
+	if (is_sta_active(sta)) {
+		wireless_set = sta->support_wireless_set;
 
-			if (wireless_mode & (ODM_WM_N24G | ODM_WM_N5G)) { /*N mode*/
-				if (rate_idx >= ODM_RATEMCS8 && rate_idx <= ODM_RATEMCS15) { /*2SS mode*/
+		if (dm->rf_type == RF_2T2R || dm->rf_type == RF_2T3R || dm->rf_type == RF_2T4R) {
+			if (wireless_set & WIRELESS_HT) { /*N mode*/
+				if (rate_idx >= ODM_RATEMCS8 && rate_idx <= ODM_RATEMCS15) { /*@2SS mode*/
 
-					p_sta->ra_info.rate_id  = ARFR_5_RATE_ID;
-					PHYDM_DBG(p_dm, DBG_RA, ("ARFR_5\n"));
+					sta->ra_info.rate_id  = ARFR_5_RATE_ID;
+					PHYDM_DBG(dm, DBG_RA, "ARFR_5\n");
 				}
-			} else if (wireless_mode & (ODM_WM_AC_5G | ODM_WM_AC_24G | ODM_WM_AC_ONLY)) {/*AC mode*/
-				if (rate_idx >= ODM_RATEVHTSS2MCS0 && rate_idx <= ODM_RATEVHTSS2MCS9) {/*2SS mode*/
+			} else if (wireless_set & WIRELESS_VHT) {/*@AC mode*/
+				if (rate_idx >= ODM_RATEVHTSS2MCS0 && rate_idx <= ODM_RATEVHTSS2MCS9) {/*@2SS mode*/
 
-					p_sta->ra_info.rate_id  = ARFR_0_RATE_ID;
-					PHYDM_DBG(p_dm, DBG_RA, ("ARFR_0\n"));
+					sta->ra_info.rate_id  = ARFR_0_RATE_ID;
+					PHYDM_DBG(dm, DBG_RA, "ARFR_0\n");
 				}
 			} else
-				p_sta->ra_info.rate_id  = ARFR_0_RATE_ID;
-
-			PHYDM_DBG(p_dm, DBG_RA, ("UPdate_RateID[%d]: (( 0x%x ))\n", platform_macid, p_sta->ra_info.rate_id));
-		}
-	}
-#endif
-}
-
-#endif
-
-#if (defined(CONFIG_RA_DBG_CMD))
-void
-odm_ra_para_adjust_send_h2c(
-	void	*p_dm_void
-)
-{
+				sta->ra_info.rate_id  = ARFR_0_RATE_ID;
 
-	struct PHY_DM_STRUCT		*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	struct _rate_adaptive_table_			*p_ra_table = &p_dm->dm_ra_table;
-	u8			h2c_parameter[6] = {0};
-
-	h2c_parameter[0] = RA_FIRST_MACID;
-
-	if (p_ra_table->ra_para_feedback_req) { /*h2c_parameter[5]=1 ; ask FW for all RA parameters*/
-		PHYDM_DBG(p_dm, DBG_RA, ("[H2C] Ask FW for RA parameter\n"));
-		h2c_parameter[5] |= BIT(1); /*ask FW to report RA parameters*/
-		h2c_parameter[1] = p_ra_table->para_idx; /*p_ra_table->para_idx;*/
-		p_ra_table->ra_para_feedback_req = 0;
-	} else {
-		PHYDM_DBG(p_dm, DBG_RA, ("[H2C] Send H2C to FW for modifying RA parameter\n"));
-
-		h2c_parameter[1] =  p_ra_table->para_idx;
-		h2c_parameter[2] =  p_ra_table->rate_idx;
-		/* [8 bit]*/
-		if (p_ra_table->para_idx == RADBG_RTY_PENALTY || p_ra_table->para_idx == RADBG_RATE_UP_RTY_RATIO || p_ra_table->para_idx == RADBG_RATE_DOWN_RTY_RATIO) {
-			h2c_parameter[3] = p_ra_table->value;
-			h2c_parameter[4] = 0;
+			PHYDM_DBG(dm, DBG_RA, "UPdate_RateID[%d]: (( 0x%x ))\n",
+				  platform_macid, sta->ra_info.rate_id);
 		}
-		/* [16 bit]*/
-		else {
-			h2c_parameter[3] = (u8)(((p_ra_table->value_16) & 0xf0) >> 4); /*byte1*/
-			h2c_parameter[4] = (u8)((p_ra_table->value_16) & 0x0f);	/*byte0*/
-		}
-	}
-	PHYDM_DBG(p_dm, DBG_RA, (" h2c_parameter[1] = 0x%x\n", h2c_parameter[1]));
-	PHYDM_DBG(p_dm, DBG_RA, (" h2c_parameter[2] = 0x%x\n", h2c_parameter[2]));
-	PHYDM_DBG(p_dm, DBG_RA, (" h2c_parameter[3] = 0x%x\n", h2c_parameter[3]));
-	PHYDM_DBG(p_dm, DBG_RA, (" h2c_parameter[4] = 0x%x\n", h2c_parameter[4]));
-	PHYDM_DBG(p_dm, DBG_RA, (" h2c_parameter[5] = 0x%x\n", h2c_parameter[5]));
-
-	odm_fill_h2c_cmd(p_dm, ODM_H2C_RA_PARA_ADJUST, 6, h2c_parameter);
-
-}
-
-
-void
-odm_ra_para_adjust(
-	void		*p_dm_void
-)
-{
-	struct PHY_DM_STRUCT		*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	struct _rate_adaptive_table_			*p_ra_table = &p_dm->dm_ra_table;
-	u8			rate_idx = p_ra_table->rate_idx;
-	u8			value = p_ra_table->value;
-	u8			pre_value = 0xff;
-
-	if (p_ra_table->para_idx == RADBG_RTY_PENALTY) {
-		pre_value = p_ra_table->RTY_P[rate_idx];
-		p_ra_table->RTY_P[rate_idx] = value;
-		p_ra_table->RTY_P_modify_note[rate_idx] = 1;
-	} else if (p_ra_table->para_idx == RADBG_N_HIGH) {
-
-	} else if (p_ra_table->para_idx == RADBG_N_LOW) {
-
-	} else if (p_ra_table->para_idx == RADBG_RATE_UP_RTY_RATIO) {
-		pre_value = p_ra_table->RATE_UP_RTY_RATIO[rate_idx];
-		p_ra_table->RATE_UP_RTY_RATIO[rate_idx] = value;
-		p_ra_table->RATE_UP_RTY_RATIO_modify_note[rate_idx] = 1;
-	} else if (p_ra_table->para_idx == RADBG_RATE_DOWN_RTY_RATIO) {
-		pre_value = p_ra_table->RATE_DOWN_RTY_RATIO[rate_idx];
-		p_ra_table->RATE_DOWN_RTY_RATIO[rate_idx] = value;
-		p_ra_table->RATE_DOWN_RTY_RATIO_modify_note[rate_idx] = 1;
 	}
-	PHYDM_DBG(p_dm, DBG_RA, ("Change RA Papa[%d], rate[ %d ],   ((%d))  ->  ((%d))\n", p_ra_table->para_idx, rate_idx, pre_value, value));
-	odm_ra_para_adjust_send_h2c(p_dm);
-}
-
-void
-phydm_ra_print_msg(
-	void		*p_dm_void,
-	u8		*value,
-	u8		*value_default,
-	u8		*modify_note
-)
-{
-	struct PHY_DM_STRUCT		*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	struct _rate_adaptive_table_			*p_ra_table = &p_dm->dm_ra_table;
-	u32 i;
-
-	PHYDM_DBG(p_dm, DBG_RA, (" |rate index| |Current-value| |Default-value| |Modify?|\n"));
-	for (i = 0 ; i <= (p_ra_table->rate_length); i++) {
-#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN))
-		PHYDM_DBG(p_dm, DBG_RA, ("     [ %d ]  %20d  %25d  %20s\n", i, value[i], value_default[i], ((modify_note[i] == 1) ? "V" : " .  ")));
-#else
-		PHYDM_DBG(p_dm, DBG_RA, ("     [ %d ]  %10d  %14d  %14s\n", i, value[i], value_default[i], ((modify_note[i] == 1) ? "V" : " .  ")));
 #endif
-	}
-
-}
-
-void
-odm_RA_debug(
-	void		*p_dm_void,
-	u32		*const dm_value
-)
-{
-	struct PHY_DM_STRUCT		*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	struct _rate_adaptive_table_			*p_ra_table = &p_dm->dm_ra_table;
-
-	p_ra_table->is_ra_dbg_init = false;
-
-	if (dm_value[0] == 100) { /*1 Print RA Parameters*/
-		u8	default_pointer_value;
-		u8	*pvalue;
-		u8	*pvalue_default;
-		u8	*pmodify_note;
-
-		pvalue = pvalue_default = pmodify_note = &default_pointer_value;
-
-		PHYDM_DBG(p_dm, DBG_RA, ("\n------------------------------------------------------------------------------------\n"));
-
-		if (dm_value[1] == RADBG_RTY_PENALTY) { /* [1]*/
-			PHYDM_DBG(p_dm, DBG_RA, (" [1] RTY_PENALTY\n"));
-			pvalue		=	&(p_ra_table->RTY_P[0]);
-			pvalue_default	=	&(p_ra_table->RTY_P_default[0]);
-			pmodify_note	=	(u8 *)&(p_ra_table->RTY_P_modify_note[0]);
-		} else if (dm_value[1] == RADBG_N_HIGH)   /* [2]*/
-			PHYDM_DBG(p_dm, DBG_RA, (" [2] N_HIGH\n"));
-
-		else if (dm_value[1] == RADBG_N_LOW)   /*[3]*/
-			PHYDM_DBG(p_dm, DBG_RA, (" [3] N_LOW\n"));
-
-		else if (dm_value[1] == RADBG_RATE_UP_RTY_RATIO) { /* [8]*/
-			PHYDM_DBG(p_dm, DBG_RA, (" [8] RATE_UP_RTY_RATIO\n"));
-			pvalue		=	&(p_ra_table->RATE_UP_RTY_RATIO[0]);
-			pvalue_default	=	&(p_ra_table->RATE_UP_RTY_RATIO_default[0]);
-			pmodify_note	=	(u8 *)&(p_ra_table->RATE_UP_RTY_RATIO_modify_note[0]);
-		} else if (dm_value[1] == RADBG_RATE_DOWN_RTY_RATIO) { /* [9]*/
-			PHYDM_DBG(p_dm, DBG_RA, (" [9] RATE_DOWN_RTY_RATIO\n"));
-			pvalue		=	&(p_ra_table->RATE_DOWN_RTY_RATIO[0]);
-			pvalue_default	=	&(p_ra_table->RATE_DOWN_RTY_RATIO_default[0]);
-			pmodify_note	=	(u8 *)&(p_ra_table->RATE_DOWN_RTY_RATIO_modify_note[0]);
-		}
-
-		phydm_ra_print_msg(p_dm, pvalue, pvalue_default, pmodify_note);
-		PHYDM_DBG(p_dm, DBG_RA, ("\n------------------------------------------------------------------------------------\n\n"));
-
-	} else if (dm_value[0] == 101) {
-		p_ra_table->para_idx = (u8)dm_value[1];
-
-		p_ra_table->ra_para_feedback_req = 1;
-		odm_ra_para_adjust_send_h2c(p_dm);
-	} else {
-		p_ra_table->para_idx = (u8)dm_value[0];
-		p_ra_table->rate_idx  = (u8)dm_value[1];
-		p_ra_table->value = (u8)dm_value[2];
-
-		odm_ra_para_adjust(p_dm);
-	}
 }
 
-void
-odm_ra_para_adjust_init(
-	void		*p_dm_void
-)
-{
-	struct PHY_DM_STRUCT		*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	struct _rate_adaptive_table_			*p_ra_table = &p_dm->dm_ra_table;
-	u8			i;
-	u8			ra_para_pool_u8[3] = { RADBG_RTY_PENALTY,  RADBG_RATE_UP_RTY_RATIO, RADBG_RATE_DOWN_RTY_RATIO};
-	u8			rate_size_ht_1ss = 20, rate_size_ht_2ss = 28, rate_size_ht_3ss = 36;	 /*4+8+8+8+8 =36*/
-	u8			rate_size_vht_1ss = 10, rate_size_vht_2ss = 20, rate_size_vht_3ss = 30;	 /*10 + 10 +10 =30*/
-#if 0
-	/* RTY_PENALTY		=	1,   u8 */
-	/* N_HIGH 				=	2, */
-	/* N_LOW				=	3, */
-	/* RATE_UP_TABLE		=	4, */
-	/* RATE_DOWN_TABLE	=	5, */
-	/* TRYING_NECESSARY	=	6, */
-	/* DROPING_NECESSARY =	7, */
-	/* RATE_UP_RTY_RATIO	=	8,  u8 */
-	/* RATE_DOWN_RTY_RATIO=	9,  u8 */
-	/* ALL_PARA		=	0xff */
-
 #endif
-	PHYDM_DBG(p_dm, DBG_RA, ("odm_ra_para_adjust_init\n"));
-
-/* JJ ADD 20161014 */
-	if (p_dm->support_ic_type & (ODM_RTL8188F | ODM_RTL8195A | ODM_RTL8703B | ODM_RTL8723B | ODM_RTL8188E | ODM_RTL8723D | ODM_RTL8710B))
-		p_ra_table->rate_length = rate_size_ht_1ss;
-	else if (p_dm->support_ic_type & (ODM_RTL8192E | ODM_RTL8197F))
-		p_ra_table->rate_length = rate_size_ht_2ss;
-	else if (p_dm->support_ic_type & (ODM_RTL8821 | ODM_RTL8881A | ODM_RTL8821C))
-		p_ra_table->rate_length = rate_size_ht_1ss + rate_size_vht_1ss;
-	else if (p_dm->support_ic_type & (ODM_RTL8812 | ODM_RTL8822B))
-		p_ra_table->rate_length = rate_size_ht_2ss + rate_size_vht_2ss;
-	else if (p_dm->support_ic_type == ODM_RTL8814A)
-		p_ra_table->rate_length = rate_size_ht_3ss + rate_size_vht_3ss;
-	else
-		p_ra_table->rate_length = rate_size_ht_1ss;
-
-	p_ra_table->is_ra_dbg_init = true;
-	for (i = 0; i < 3; i++) {
-		p_ra_table->ra_para_feedback_req = 1;
-		p_ra_table->para_idx	=	ra_para_pool_u8[i];
-		odm_ra_para_adjust_send_h2c(p_dm);
-	}
-}
-
-#endif /*#if (defined(CONFIG_RA_DBG_CMD))*/
-
-
diff --git a/rtl8723DS/hal/phydm/phydm_rainfo.h b/rtl8723DS/hal/phydm/phydm_rainfo.h
index ba8008b..a840880 100755..100644
--- a/rtl8723DS/hal/phydm/phydm_rainfo.h
+++ b/rtl8723DS/hal/phydm/phydm_rainfo.h
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2007 - 2017 Realtek Corporation.
+ * Copyright(c) 2007 - 2017  Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -8,28 +8,29 @@
  *
  * This program is distributed in the hope that it will be useful, but WITHOUT
  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  * more details.
  *
+ * The full GNU General Public License is included in this distribution in the
+ * file called LICENSE.
+ *
+ * Contact Information:
+ * wlanfae <wlanfae@realtek.com>
+ * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
+ * Hsinchu 300, Taiwan.
+ *
+ * Larry Finger <Larry.Finger@lwfinger.net>
+ *
  *****************************************************************************/
 
-#ifndef	__PHYDMRAINFO_H__
-#define    __PHYDMRAINFO_H__
+#ifndef __PHYDMRAINFO_H__
+#define __PHYDMRAINFO_H__
 
-/*#define RAINFO_VERSION	"2.0"*/  /*2014.11.04*/
-/*#define RAINFO_VERSION	"3.0"*/  /*2015.01.13 Dino*/
-/*#define RAINFO_VERSION	"3.1"*/  /*2015.01.14 Dino*/
-/*#define RAINFO_VERSION	"3.3"*/  /*2015.07.29 YuChen*/
-/*#define RAINFO_VERSION	"3.4"*/  /*2015.12.15 Stanley*/
-/*#define RAINFO_VERSION	"4.0"*/  /*2016.03.24 Dino, Add more RA mask state and Phydm-lize partial ra mask function  */
-/*#define RAINFO_VERSION	"4.1"*/  /*2016.04.20 Dino, Add new function to adjust PCR RA threshold  */
-/*#define RAINFO_VERSION	"4.2"*/  /*2016.05.17 Dino, Add H2C debug cmd  */
-/*#define RAINFO_VERSION	"4.3"*/  /*2016.07.11 Dino, Fix RA hang in CCK 1M problem  */
-#define RAINFO_VERSION	"5.0"  /*2017.04.20 Dino, the 3rd PHYDM reform*/
+#define RAINFO_VERSION "8.0"
 
 #define	FORCED_UPDATE_RAMASK_PERIOD	5
 
-#define	H2C_MAX_LENGTH	7
+#define	H2C_MAX_LENGTH		7
 
 #define	RA_FLOOR_UP_GAP		3
 #define	RA_FLOOR_TABLE_SIZE	7
@@ -40,49 +41,38 @@
 #define	RA_RETRY_LIMIT_HIGH	32
 
 #if (DM_ODM_SUPPORT_TYPE == ODM_AP)
-	#define		RA_FIRST_MACID	1
-#elif (DM_ODM_SUPPORT_TYPE == ODM_WIN)
-	#define	RA_FIRST_MACID	0
-	#define	WIN_DEFAULT_PORT_MACID	0
-	#define	WIN_BT_PORT_MACID	2
-#else /*if (DM_ODM_SUPPORT_TYPE == ODM_CE)*/
-	#define		RA_FIRST_MACID	0
+	#define	FIRST_MACID	1
+#else
+	#define	FIRST_MACID	0
 #endif
 
-#if (DM_ODM_SUPPORT_TYPE & ODM_WIN)
-#define AP_InitRateAdaptiveState		odm_rate_adaptive_state_ap_init
-#endif
-
-
-#define		DM_RATR_STA_INIT			0
-#define		DM_RATR_STA_HIGH			1
-#define		DM_RATR_STA_MIDDLE		2
-#define		DM_RATR_STA_LOW			3
-#define		DM_RATR_STA_ULTRA_LOW	4
-
-enum phydm_ra_dbg_para_e {
-	RADBG_PCR_TH_OFFSET		=	0,
-	RADBG_RTY_PENALTY		=	1,
-	RADBG_N_HIGH				=	2,
-	RADBG_N_LOW				=	3,
-	RADBG_TRATE_UP_TABLE		=	4,
-	RADBG_TRATE_DOWN_TABLE	=	5,
-	RADBG_TRYING_NECESSARY	=	6,
-	RADBG_TDROPING_NECESSARY =	7,
-	RADBG_RATE_UP_RTY_RATIO	=	8,
-	RADBG_RATE_DOWN_RTY_RATIO =	9, /* u8 */
-
-	RADBG_DEBUG_MONITOR1 = 0xc,
-	RADBG_DEBUG_MONITOR2 = 0xd,
-	RADBG_DEBUG_MONITOR3 = 0xe,
-	RADBG_DEBUG_MONITOR4 = 0xf,
-	RADBG_DEBUG_MONITOR5 = 0x10,
+/* @1 ============================================================
+ * 1 enumrate
+ * 1 ============================================================
+ */
+
+enum phydm_ra_dbg_para {
+	RADBG_PCR_TH_OFFSET	= 0,
+	RADBG_RTY_PENALTY	= 1,
+	RADBG_N_HIGH		= 2,
+	RADBG_N_LOW		= 3,
+	RADBG_TRATE_UP_TABLE	= 4,
+	RADBG_TRATE_DOWN_TABLE	= 5,
+	RADBG_TRYING_NECESSARY	= 6,
+	RADBG_TDROPING_NECESSARY = 7,
+	RADBG_RATE_UP_RTY_RATIO	= 8,
+	RADBG_RATE_DOWN_RTY_RATIO = 9, /* u8 */
+
+	RADBG_DEBUG_MONITOR1	= 0xc,
+	RADBG_DEBUG_MONITOR2	= 0xd,
+	RADBG_DEBUG_MONITOR3	= 0xe,
+	RADBG_DEBUG_MONITOR4	= 0xf,
+	RADBG_DEBUG_MONITOR5	= 0x10,
 	NUM_RA_PARA
 };
 
-enum phydm_wireless_mode_e {
-
-	PHYDM_WIRELESS_MODE_UNKNOWN = 0x00,
+enum phydm_wireless_mode {
+	PHYDM_WIRELESS_MODE_UNKNOWN	= 0x00,
 	PHYDM_WIRELESS_MODE_A		= 0x01,
 	PHYDM_WIRELESS_MODE_B		= 0x02,
 	PHYDM_WIRELESS_MODE_G		= 0x04,
@@ -96,361 +86,191 @@ enum phydm_wireless_mode_e {
 	PHYDM_WIRELESS_MODE_ALL		= 0xFFFF
 };
 
-enum phydm_rateid_idx_e {
-
+enum phydm_rateid_idx {
 	PHYDM_BGN_40M_2SS	= 0,
 	PHYDM_BGN_40M_1SS	= 1,
 	PHYDM_BGN_20M_2SS	= 2,
 	PHYDM_BGN_20M_1SS	= 3,
-	PHYDM_GN_N2SS			= 4,
-	PHYDM_GN_N1SS			= 5,
-	PHYDM_BG				= 6,
-	PHYDM_G				= 7,
-	PHYDM_B_20M			= 8,
+	PHYDM_GN_N2SS		= 4,
+	PHYDM_GN_N1SS		= 5,
+	PHYDM_BG		= 6,
+	PHYDM_G			= 7,
+	PHYDM_B_20M		= 8,
 	PHYDM_ARFR0_AC_2SS	= 9,
 	PHYDM_ARFR1_AC_1SS	= 10,
 	PHYDM_ARFR2_AC_2G_1SS	= 11,
 	PHYDM_ARFR3_AC_2G_2SS	= 12,
 	PHYDM_ARFR4_AC_3SS	= 13,
-	PHYDM_ARFR5_N_3SS		= 14
+	PHYDM_ARFR5_N_3SS	= 14,
+	PHYDM_ARFR7_N_4SS	= 15,
+	PHYDM_ARFR6_AC_4SS	= 16
+};
+
+#if (RATE_ADAPTIVE_SUPPORT == 1)/* @88E RA */
+
+struct _phydm_txstatistic_ {
+	u32	hw_total_tx;
+	u32	hw_tx_success;
+	u32	hw_tx_rty;
+	u32	hw_tx_drop;
 };
 
-#if (RATE_ADAPTIVE_SUPPORT == 1)/* 88E RA */
+/* @1 ============================================================
+ * 1  structure
+ * 1 ============================================================
+ */
 struct _odm_ra_info_ {
-	u8 rate_id;
-	u32 rate_mask;
-	u32 ra_use_rate;
-	u8 rate_sgi;
-	u8 rssi_sta_ra;
-	u8 pre_rssi_sta_ra;
-	u8 sgi_enable;
-	u8 decision_rate;
-	u8 pre_rate;
-	u8 highest_rate;
-	u8 lowest_rate;
-	u32 nsc_up;
-	u32 nsc_down;
-	u16 RTY[5];
-	u32 TOTAL;
-	u16 DROP;
-	u8 active;
-	u16 rpt_time;
-	u8 ra_waiting_counter;
-	u8 ra_pending_counter;
-	u8 ra_drop_after_down;
+	u8	rate_id;
+	u32	rate_mask;
+	u32	ra_use_rate;
+	u8	rate_sgi;
+	u8	rssi_sta_ra;
+	u8	pre_rssi_sta_ra;
+	u8	sgi_enable;
+	u8	decision_rate;
+	u8	pre_rate;
+	u8	highest_rate;
+	u8	lowest_rate;
+	u32	nsc_up;
+	u32	nsc_down;
+	u16	RTY[5];
+	u32	TOTAL;
+	u16	DROP;
+	u8	active;
+	u16	rpt_time;
+	u8	ra_waiting_counter;
+	u8	ra_pending_counter;
+	u8	ra_drop_after_down;
 #if 1 /* POWER_TRAINING_ACTIVE == 1 */ /* For compile  pass only~! */
-	u8 pt_active;  /* on or off */
-	u8 pt_try_state;  /* 0 trying state, 1 for decision state */
-	u8 pt_stage;  /* 0~6 */
-	u8 pt_stop_count; /* Stop PT counter */
-	u8 pt_pre_rate;  /* if rate change do PT */
-	u8 pt_pre_rssi; /* if RSSI change 5% do PT */
-	u8 pt_mode_ss;  /* decide whitch rate should do PT */
-	u8 ra_stage;  /* StageRA, decide how many times RA will be done between PT */
-	u8 pt_smooth_factor;
+	u8	pt_active;	/* on or off */
+	u8	pt_try_state;	/* @0 trying state, 1 for decision state */
+	u8	pt_stage;	/* @0~6 */
+	u8	pt_stop_count;	/* Stop PT counter */
+	u8	pt_pre_rate;	/* @if rate change do PT */
+	u8	pt_pre_rssi;	/* @if RSSI change 5% do PT */
+	u8	pt_mode_ss;	/* @decide whitch rate should do PT */
+	u8	ra_stage;	/* @StageRA, decide how many times RA will be done between PT */
+	u8	pt_smooth_factor;
 #endif
 #if (DM_ODM_SUPPORT_TYPE == ODM_AP) &&	((DEV_BUS_TYPE == RT_USB_INTERFACE) || (DEV_BUS_TYPE == RT_SDIO_INTERFACE))
-	u8 rate_down_counter;
-	u8 rate_up_counter;
-	u8 rate_direction;
-	u8 bounding_type;
-	u8 bounding_counter;
-	u8 bounding_learning_time;
-	u8 rate_down_start_time;
+	u8	rate_down_counter;
+	u8	rate_up_counter;
+	u8	rate_direction;
+	u8	bounding_type;
+	u8	bounding_counter;
+	u8	bounding_learning_time;
+	u8	rate_down_start_time;
 #endif
 };
 #endif
 
 
-struct _rate_adaptive_table_ {
-	u8		firstconnect;
-#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
-	boolean		PT_collision_pre;
-#endif
-
-#if (defined(CONFIG_RA_DBG_CMD))
-	boolean		is_ra_dbg_init;
-
-	u8	RTY_P[ODM_NUM_RATE_IDX];
-	u8	RTY_P_default[ODM_NUM_RATE_IDX];
-	boolean	RTY_P_modify_note[ODM_NUM_RATE_IDX];
-
-	u8	RATE_UP_RTY_RATIO[ODM_NUM_RATE_IDX];
-	u8	RATE_UP_RTY_RATIO_default[ODM_NUM_RATE_IDX];
-	boolean	RATE_UP_RTY_RATIO_modify_note[ODM_NUM_RATE_IDX];
-
-	u8	RATE_DOWN_RTY_RATIO[ODM_NUM_RATE_IDX];
-	u8	RATE_DOWN_RTY_RATIO_default[ODM_NUM_RATE_IDX];
-	boolean	RATE_DOWN_RTY_RATIO_modify_note[ODM_NUM_RATE_IDX];
-
-	boolean ra_para_feedback_req;
-
-	u8   para_idx;
-	u8	rate_idx;
-	u8	value;
-	u16	value_16;
-	u8	rate_length;
-#endif
-	/*u8	link_tx_rate[ODM_ASSOCIATE_ENTRY_NUM];*/
-	u8	ra_ratio[ODM_ASSOCIATE_ENTRY_NUM];
+struct ra_table {
+	u8	firstconnect;
+	/*@u8	link_tx_rate[ODM_ASSOCIATE_ENTRY_NUM];*/
 	u8	mu1_rate[30];
 	u8	highest_client_tx_order;
 	u16	highest_client_tx_rate_order;
 	u8	power_tracking_flag;
-	u8	RA_threshold_offset;
-	u8	RA_offset_direction;
-	u8	up_ramask_cnt; /*force update_ra_mask counter*/
-	u8	up_ramask_cnt_tmp; /*Just for debug, should be removed latter*/
-
-#if (defined(CONFIG_RA_DYNAMIC_RTY_LIMIT))
+	u8	ra_th_ofst; /*RA_threshold_offset*/
+	u8	ra_ofst_direc; /*RA_offset_direction*/
+	u8	up_ramask_cnt; /*@force update_ra_mask counter*/
+	u8	up_ramask_cnt_tmp; /*@Just for debug, should be removed latter*/
+#if 0	/*@CONFIG_RA_DYNAMIC_RTY_LIMIT*/
 	u8	per_rate_retrylimit_20M[ODM_NUM_RATE_IDX];
 	u8	per_rate_retrylimit_40M[ODM_NUM_RATE_IDX];
 	u8	retry_descend_num;
 	u8	retrylimit_low;
 	u8	retrylimit_high;
 #endif
-	u8	ldpc_thres;			/* if RSSI > ldpc_thres => switch from LPDC to BCC */
-
-	void (*record_ra_info)(void *p_dm_void, u8 macid, struct cmn_sta_info *p_sta, u64 ra_mask);
+	u8	ldpc_thres; /* @if RSSI > ldpc_th => switch from LPDC to BCC */
+	void (*record_ra_info)(void *dm_void, u8 macid,
+			       struct cmn_sta_info *sta, u64 ra_mask);
 };
 
-void
-phydm_h2C_debug(
-	void		*p_dm_void,
-	u32		*const dm_value,
-	u32		*_used,
-	char			*output,
-	u32		*_out_len
-);
+/* @1 ============================================================
+ * 1  Function Prototype
+ * 1 ============================================================
+ */
+boolean phydm_is_cck_rate(void *dm_void, u8 rate);
 
-#if (defined(CONFIG_RA_DBG_CMD))
+boolean phydm_is_ofdm_rate(void *dm_void, u8 rate);
 
-void
-odm_RA_debug(
-	void		*p_dm_void,
-	u32		*const dm_value
-);
+boolean phydm_is_ht_rate(void *dm_void, u8 rate);
 
-void
-odm_ra_para_adjust_init(
-	void		*p_dm_void
-);
+boolean phydm_is_vht_rate(void *dm_void, u8 rate);
 
-#endif
+u8 phydm_rate_type_2_num_ss(void *dm_void, enum PDM_RATE_TYPE type);
 
-void
-phydm_ra_debug(
-	void		*p_dm_void,
-	char		input[][16],
-	u32		*_used,
-	char		*output,
-	u32		*_out_len
-);
-
-void
-odm_c2h_ra_para_report_handler(
-	void	*p_dm_void,
-	u8	*cmd_buf,
-	u8	cmd_len
-);
-
-void
-odm_ra_para_adjust(
-	void		*p_dm_void
-);
-
-void
-phydm_ra_dynamic_retry_count(
-	void	*p_dm_void
-);
-
-void
-phydm_ra_dynamic_retry_limit(
-	void	*p_dm_void
-);
-
-void
-phydm_print_rate(
-	void	*p_dm_void,
-	u8	rate,
-	u32	dbg_component
-);
-
-void
-phydm_c2h_ra_report_handler(
-	void	*p_dm_void,
-	u8   *cmd_buf,
-	u8   cmd_len
-);
-
-u8
-phydm_rate_order_compute(
-	void	*p_dm_void,
-	u8	rate_idx
-);
-
-void
-phydm_ra_info_watchdog(
-	void	*p_dm_void
-);
-
-void
-phydm_ra_info_init(
-	void	*p_dm_void
-);
-
-void
-phydm_modify_RA_PCR_threshold(
-	void		*p_dm_void,
-	u8		RA_offset_direction,
-	u8		RA_threshold_offset
-);
-
-u8
-phydm_vht_en_mapping(
-	void			*p_dm_void,
-	u32			wireless_mode
-);
-
-u8
-phydm_rate_id_mapping(
-	void			*p_dm_void,
-	u32			wireless_mode,
-	u8			rf_type,
-	u8			bw
-);
-
-void
-phydm_update_hal_ra_mask(
-	void			*p_dm_void,
-	u32			wireless_mode,
-	u8			rf_type,
-	u8			BW,
-	u8			mimo_ps_enable,
-	u8			disable_cck_rate,
-	u32			*ratr_bitmap_msb_in,
-	u32			*ratr_bitmap_in,
-	u8			tx_rate_level
-);
-
-void
-phydm_refresh_rate_adaptive_mask(
-	void		*p_dm_void
-);
-
-u8
-phydm_rssi_lv_dec(
-	void			*p_dm_void,
-	u32			rssi,
-	u8			ratr_state
-);
-
-void
-odm_ra_post_action_on_assoc(
-	void	*p_dm
-);
-
-u8
-odm_find_rts_rate(
-	void		*p_dm_void,
-	u8			tx_rate,
-	boolean			is_erp_protect
-);
-
-void
-phydm_show_sta_info(
-	void		*p_dm_void,
-	char		input[][16],
-	u32		*_used,
-	char		*output,
-	u32		*_out_len,
-	u32		input_num
-);
-
-#ifdef	PHYDM_3RD_REFORM_RA_MASK
-
-void
-phydm_ra_registed(
-	void	*p_dm_void,
-	u8	macid,
-	u8	rssi_from_assoc
-);
-
-void
-phydm_ra_offline(
-	void	*p_dm_void,
-	u8	macid
-);
-
-
-void
-phydm_ra_mask_watchdog(
-	void	*p_dm_void
-);
+u8 phydm_rate_to_num_ss(void *dm_void, u8 data_rate);
 
-#endif
+void phydm_h2C_debug(void *dm_void, char input[][16], u32 *_used,
+		     char *output, u32 *_out_len);
 
+void phydm_ra_debug(void *dm_void, char input[][16], u32 *_used, char *output,
+		    u32 *_out_len);
 
-#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
+void odm_c2h_ra_para_report_handler(void *dm_void, u8 *cmd_buf, u8 cmd_len);
+
+void phydm_ra_dynamic_retry_count(void *dm_void);
+
+
+void phydm_print_rate(void *dm_void, u8 rate, u32 dbg_component);
+
+void phydm_print_rate_2_buff(void *dm_void, u8 rate, char *buf, u16 buf_size);
+
+void phydm_c2h_ra_report_handler(void *dm_void, u8 *cmd_buf, u8 cmd_len);
 
-void
-odm_refresh_basic_rate_mask(
-	void		*p_dm_void
-);
-
-void
-odm_update_init_rate_work_item_callback(
-	void	*p_context
-);
-
-void
-odm_refresh_ldpc_rts_mp(
-	struct _ADAPTER			*p_adapter,
-	struct PHY_DM_STRUCT			*p_dm,
-	u8				m_mac_id,
-	u8				iot_peer,
-	s32				undecorated_smoothed_pwdb
-);
-
-void
-odm_rate_adaptive_state_ap_init(
-	void			*PADAPTER_VOID,
-	struct cmn_sta_info	*p_entry
-);
-
-#elif (DM_ODM_SUPPORT_TYPE & (ODM_AP))
-
-void
-phydm_gen_ramask_h2c_AP(
-	void			*p_dm_void,
-	struct rtl8192cd_priv *priv,
-	struct sta_info *p_entry,
-	u8			rssi_level
-);
-
-#endif/*#if (DM_ODM_SUPPORT_TYPE & (ODM_AP))*/
-
-
-#if (defined(CONFIG_RA_DYNAMIC_RATE_ID))
-void
-phydm_ra_dynamic_rate_id_on_assoc(
-	void	*p_dm_void,
-	u8	wireless_mode,
-	u8	init_rate_id
-);
-
-void
-phydm_ra_dynamic_rate_id_init(
-	void	*p_dm_void
-);
-
-void
-phydm_update_rate_id(
-	void	*p_dm_void,
-	u8	rate,
-	u8	platform_macid
-);
+u8 phydm_rate_order_compute(void *dm_void, u8 rate_idx);
+
+void phydm_ra_info_watchdog(void *dm_void);
+
+void phydm_ra_info_init(void *dm_void);
+
+void phydm_modify_RA_PCR_threshold(void *dm_void, u8 ra_ofst_direc,
+				   u8 ra_th_ofst);
+
+u8 phydm_vht_en_mapping(void *dm_void, u32 wireless_mode);
+
+u8 phydm_rate_id_mapping(void *dm_void, u32 wireless_mode, u8 rf_type, u8 bw);
+#if (DM_ODM_SUPPORT_TYPE == ODM_AP)
+void phydm_update_hal_ra_mask(
+	void *dm_void,
+	u32 wireless_mode,
+	u8 rf_type,
+	u8 BW,
+	u8 mimo_ps_enable,
+	u8 disable_cck_rate,
+	u32 *ratr_bitmap_msb_in,
+	u32 *ratr_bitmap_in,
+	u8 tx_rate_level);
+#endif
 
+#if (DM_ODM_SUPPORT_TYPE == ODM_CE)
+u8 phydm_get_plcp(void *dm_void, u16 macid);
 #endif
 
-#endif /*#ifndef	__ODMRAINFO_H__*/
+void phydm_refresh_rate_adaptive_mask(void *dm_void);
+
+u8 phydm_rssi_lv_dec(void *dm_void, u32 rssi, u8 ratr_state);
+
+void odm_ra_post_action_on_assoc(void *dm);
+
+u8 odm_find_rts_rate(void *dm_void, u8 tx_rate, boolean is_erp_protect);
+
+void phydm_show_sta_info(void *dm_void, char input[][16], u32 *_used,
+			 char *output, u32 *_out_len);
+
+u8 phydm_get_rate_from_rssi_lv(void *dm_void, u8 sta_idx);
+
+void phydm_ra_registed(void *dm_void, u8 macid, u8 rssi_from_assoc);
+
+void phydm_ra_offline(void *dm_void, u8 macid);
+
+void phydm_ra_mask_watchdog(void *dm_void);
+
+#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
+void odm_refresh_basic_rate_mask(
+	void *dm_void);
+#endif
+#endif /*@#ifndef __PHYDMRAINFO_H__*/
diff --git a/rtl8723DS/hal/phydm/phydm_reg.h b/rtl8723DS/hal/phydm/phydm_reg.h
index 9bb5dde..3103224 100755..100644
--- a/rtl8723DS/hal/phydm/phydm_reg.h
+++ b/rtl8723DS/hal/phydm/phydm_reg.h
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2007 - 2017 Realtek Corporation.
+ * Copyright(c) 2007 - 2017  Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -8,11 +8,21 @@
  *
  * This program is distributed in the hope that it will be useful, but WITHOUT
  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  * more details.
  *
+ * The full GNU General Public License is included in this distribution in the
+ * file called LICENSE.
+ *
+ * Contact Information:
+ * wlanfae <wlanfae@realtek.com>
+ * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
+ * Hsinchu 300, Taiwan.
+ *
+ * Larry Finger <Larry.Finger@lwfinger.net>
+ *
  *****************************************************************************/
-/* ************************************************************
+/*************************************************************
  * File Name: odm_reg.h
  *
  * Description:
@@ -20,17 +30,18 @@
  * This file is for general register definition.
  *
  *
- * ************************************************************ */
-#ifndef	__HAL_ODM_REG_H__
+ ************************************************************/
+#ifndef __HAL_ODM_REG_H__
 #define __HAL_ODM_REG_H__
 
-/*
+/*@
  * Register Definition
- *   */
+ *
+ */
 
-/* MAC REG */
-#define	ODM_BB_RESET					0x002
-#define	ODM_DUMMY						0x4fe
+/* @MAC REG */
+#define	ODM_BB_RESET				0x002
+#define	ODM_DUMMY				0x4fe
 #define	RF_T_METER_OLD				0x24
 #define	RF_T_METER_NEW				0x42
 
@@ -38,159 +49,159 @@
 #define	ODM_EDCA_VI_PARAM			0x504
 #define	ODM_EDCA_BE_PARAM			0x508
 #define	ODM_EDCA_BK_PARAM			0x50C
-#define	ODM_TXPAUSE					0x522
+#define	ODM_TXPAUSE				0x522
 
-/* LTE_COEX */
+/* @LTE_COEX */
 #define REG_LTECOEX_CTRL			0x07C0
-#define REG_LTECOEX_WRITE_DATA		0x07C4
-#define REG_LTECOEX_READ_DATA		0x07C8
-#define REG_LTECOEX_PATH_CONTROL	0x70
+#define REG_LTECOEX_WRITE_DATA			0x07C4
+#define REG_LTECOEX_READ_DATA			0x07C8
+#define REG_LTECOEX_PATH_CONTROL		0x70
 
-/* BB REG */
+/* @BB REG */
 #define	ODM_FPGA_PHY0_PAGE8			0x800
 #define	ODM_PSD_SETTING				0x808
 #define	ODM_AFE_SETTING				0x818
-#define	ODM_TXAGC_B_6_18				0x830
+#define	ODM_TXAGC_B_6_18			0x830
 #define	ODM_TXAGC_B_24_54			0x834
 #define	ODM_TXAGC_B_MCS32_5			0x838
-#define	ODM_TXAGC_B_MCS0_MCS3		0x83c
-#define	ODM_TXAGC_B_MCS4_MCS7		0x848
-#define	ODM_TXAGC_B_MCS8_MCS11		0x84c
+#define	ODM_TXAGC_B_MCS0_MCS3			0x83c
+#define	ODM_TXAGC_B_MCS4_MCS7			0x848
+#define	ODM_TXAGC_B_MCS8_MCS11			0x84c
 #define	ODM_ANALOG_REGISTER			0x85c
-#define	ODM_RF_INTERFACE_OUTPUT		0x860
-#define	ODM_TXAGC_B_MCS12_MCS15	0x868
-#define	ODM_TXAGC_B_11_A_2_11		0x86c
+#define	ODM_RF_INTERFACE_OUTPUT			0x860
+#define	ODM_TXAGC_B_MCS12_MCS15			0x868
+#define	ODM_TXAGC_B_11_A_2_11			0x86c
 #define	ODM_AD_DA_LSB_MASK			0x874
 #define	ODM_ENABLE_3_WIRE			0x88c
 #define	ODM_PSD_REPORT				0x8b4
-#define	ODM_R_ANT_SELECT				0x90c
+#define	ODM_R_ANT_SELECT			0x90c
 #define	ODM_CCK_ANT_SELECT			0xa07
 #define	ODM_CCK_PD_THRESH			0xa0a
 #define	ODM_CCK_RF_REG1				0xa11
 #define	ODM_CCK_MATCH_FILTER			0xa20
-#define	ODM_CCK_RAKE_MAC				0xa2e
+#define	ODM_CCK_RAKE_MAC			0xa2e
 #define	ODM_CCK_CNT_RESET			0xa2d
 #define	ODM_CCK_TX_DIVERSITY			0xa2f
 #define	ODM_CCK_FA_CNT_MSB			0xa5b
 #define	ODM_CCK_FA_CNT_LSB			0xa5c
-#define	ODM_CCK_NEW_FUNCTION		0xa75
-#define	ODM_OFDM_PHY0_PAGE_C		0xc00
+#define	ODM_CCK_NEW_FUNCTION			0xa75
+#define	ODM_OFDM_PHY0_PAGE_C			0xc00
 #define	ODM_OFDM_RX_ANT				0xc04
-#define	ODM_R_A_RXIQI					0xc14
+#define	ODM_R_A_RXIQI				0xc14
 #define	ODM_R_A_AGC_CORE1			0xc50
 #define	ODM_R_A_AGC_CORE2			0xc54
 #define	ODM_R_B_AGC_CORE1			0xc58
-#define	ODM_R_AGC_PAR					0xc70
+#define	ODM_R_AGC_PAR				0xc70
 #define	ODM_R_HTSTF_AGC_PAR			0xc7c
-#define	ODM_TX_PWR_TRAINING_A		0xc90
-#define	ODM_TX_PWR_TRAINING_B		0xc98
-#define	ODM_OFDM_FA_CNT1				0xcf0
-#define	ODM_OFDM_PHY0_PAGE_D		0xd00
-#define	ODM_OFDM_FA_CNT2				0xda0
-#define	ODM_OFDM_FA_CNT3				0xda4
-#define	ODM_OFDM_FA_CNT4				0xda8
-#define	ODM_TXAGC_A_6_18				0xe00
+#define	ODM_TX_PWR_TRAINING_A			0xc90
+#define	ODM_TX_PWR_TRAINING_B			0xc98
+#define	ODM_OFDM_FA_CNT1			0xcf0
+#define	ODM_OFDM_PHY0_PAGE_D			0xd00
+#define	ODM_OFDM_FA_CNT2			0xda0
+#define	ODM_OFDM_FA_CNT3			0xda4
+#define	ODM_OFDM_FA_CNT4			0xda8
+#define	ODM_TXAGC_A_6_18			0xe00
 #define	ODM_TXAGC_A_24_54			0xe04
 #define	ODM_TXAGC_A_1_MCS32			0xe08
-#define	ODM_TXAGC_A_MCS0_MCS3		0xe10
-#define	ODM_TXAGC_A_MCS4_MCS7		0xe14
-#define	ODM_TXAGC_A_MCS8_MCS11		0xe18
-#define	ODM_TXAGC_A_MCS12_MCS15		0xe1c
+#define	ODM_TXAGC_A_MCS0_MCS3			0xe10
+#define	ODM_TXAGC_A_MCS4_MCS7			0xe14
+#define	ODM_TXAGC_A_MCS8_MCS11			0xe18
+#define	ODM_TXAGC_A_MCS12_MCS15			0xe1c
 
 /* RF REG */
-#define	ODM_GAIN_SETTING				0x00
-#define	ODM_CHANNEL					0x18
+#define	ODM_GAIN_SETTING			0x00
+#define	ODM_CHANNEL				0x18
 #define	ODM_RF_T_METER				0x24
 #define	ODM_RF_T_METER_92D			0x42
 #define	ODM_RF_T_METER_88E			0x42
 #define	ODM_RF_T_METER_92E			0x42
 #define	ODM_RF_T_METER_8812			0x42
-#define	REG_RF_TX_GAIN_OFFSET				0x55
+#define	REG_RF_TX_GAIN_OFFSET			0x55
 
-/* ant Detect Reg */
-#define	ODM_DPDT						0x300
+/* @ant Detect Reg */
+#define	ODM_DPDT				0x300
 
 /* PSD Init */
-#define	ODM_PSDREG					0x808
+#define	ODM_PSDREG				0x808
 
-/* 92D path Div */
-#define	PATHDIV_REG					0xB30
-#define	PATHDIV_TRI					0xBA0
+/* @92D path Div */
+#define	PATHDIV_REG				0xB30
+#define	PATHDIV_TRI				0xBA0
 
 
-/*
+/*@
  * Bitmap Definition
- *   */
+ */
 #if (DM_ODM_SUPPORT_TYPE & (ODM_AP))
 	/* TX AGC */
-	#define		REG_TX_AGC_A_CCK_11_CCK_1_JAGUAR	0xc20
-	#define		REG_TX_AGC_A_OFDM18_OFDM6_JAGUAR	0xc24
-	#define		REG_TX_AGC_A_OFDM54_OFDM24_JAGUAR	0xc28
-	#define		REG_TX_AGC_A_MCS3_MCS0_JAGUAR	0xc2c
-	#define		REG_TX_AGC_A_MCS7_MCS4_JAGUAR	0xc30
-	#define		REG_TX_AGC_A_MCS11_MCS8_JAGUAR	0xc34
-	#define		REG_TX_AGC_A_MCS15_MCS12_JAGUAR	0xc38
+	#define		REG_TX_AGC_A_CCK_11_CCK_1_JAGUAR		0xc20
+	#define		REG_TX_AGC_A_OFDM18_OFDM6_JAGUAR		0xc24
+	#define		REG_TX_AGC_A_OFDM54_OFDM24_JAGUAR		0xc28
+	#define		REG_TX_AGC_A_MCS3_MCS0_JAGUAR			0xc2c
+	#define		REG_TX_AGC_A_MCS7_MCS4_JAGUAR			0xc30
+	#define		REG_TX_AGC_A_MCS11_MCS8_JAGUAR			0xc34
+	#define		REG_TX_AGC_A_MCS15_MCS12_JAGUAR			0xc38
 	#define		REG_TX_AGC_A_NSS1_INDEX3_NSS1_INDEX0_JAGUAR	0xc3c
 	#define		REG_TX_AGC_A_NSS1_INDEX7_NSS1_INDEX4_JAGUAR	0xc40
 	#define		REG_TX_AGC_A_NSS2_INDEX1_NSS1_INDEX8_JAGUAR	0xc44
 	#define		REG_TX_AGC_A_NSS2_INDEX5_NSS2_INDEX2_JAGUAR	0xc48
 	#define		REG_TX_AGC_A_NSS2_INDEX9_NSS2_INDEX6_JAGUAR	0xc4c
 	#if defined(CONFIG_WLAN_HAL_8814AE)
-		#define		REG_TX_AGC_A_MCS19_MCS16_JAGUAR	0xcd8
-		#define		REG_TX_AGC_A_MCS23_MCS20_JAGUAR	0xcdc
+		#define		REG_TX_AGC_A_MCS19_MCS16_JAGUAR		0xcd8
+		#define		REG_TX_AGC_A_MCS23_MCS20_JAGUAR		0xcdc
 		#define		REG_TX_AGC_A_NSS3_INDEX3_NSS3_INDEX0_JAGUAR	0xce0
 		#define		REG_TX_AGC_A_NSS3_INDEX7_NSS3_INDEX4_JAGUAR	0xce4
 		#define		REG_TX_AGC_A_NSS3_INDEX9_NSS3_INDEX8_JAGUAR	0xce8
 	#endif
-	#define		REG_TX_AGC_B_CCK_11_CCK_1_JAGUAR	0xe20
-	#define		REG_TX_AGC_B_OFDM18_OFDM6_JAGUAR	0xe24
-	#define		REG_TX_AGC_B_OFDM54_OFDM24_JAGUAR	0xe28
-	#define		REG_TX_AGC_B_MCS3_MCS0_JAGUAR	0xe2c
-	#define		REG_TX_AGC_B_MCS7_MCS4_JAGUAR	0xe30
-	#define		REG_TX_AGC_B_MCS11_MCS8_JAGUAR	0xe34
-	#define		REG_TX_AGC_B_MCS15_MCS12_JAGUAR	0xe38
+	#define		REG_TX_AGC_B_CCK_11_CCK_1_JAGUAR		0xe20
+	#define		REG_TX_AGC_B_OFDM18_OFDM6_JAGUAR		0xe24
+	#define		REG_TX_AGC_B_OFDM54_OFDM24_JAGUAR		0xe28
+	#define		REG_TX_AGC_B_MCS3_MCS0_JAGUAR			0xe2c
+	#define		REG_TX_AGC_B_MCS7_MCS4_JAGUAR			0xe30
+	#define		REG_TX_AGC_B_MCS11_MCS8_JAGUAR			0xe34
+	#define		REG_TX_AGC_B_MCS15_MCS12_JAGUAR			0xe38
 	#define		REG_TX_AGC_B_NSS1_INDEX3_NSS1_INDEX0_JAGUAR	0xe3c
 	#define		REG_TX_AGC_B_NSS1_INDEX7_NSS1_INDEX4_JAGUAR	0xe40
 	#define		REG_TX_AGC_B_NSS2_INDEX1_NSS1_INDEX8_JAGUAR	0xe44
 	#define		REG_TX_AGC_B_NSS2_INDEX5_NSS2_INDEX2_JAGUAR	0xe48
 	#define		REG_TX_AGC_B_NSS2_INDEX9_NSS2_INDEX6_JAGUAR	0xe4c
 	#if defined(CONFIG_WLAN_HAL_8814AE)
-		#define		REG_TX_AGC_B_MCS19_MCS16_JAGUAR	0xed8
-		#define		REG_TX_AGC_B_MCS23_MCS20_JAGUAR	0xedc
+		#define		REG_TX_AGC_B_MCS19_MCS16_JAGUAR		0xed8
+		#define		REG_TX_AGC_B_MCS23_MCS20_JAGUAR		0xedc
 		#define		REG_TX_AGC_B_NSS3_INDEX3_NSS3_INDEX0_JAGUAR	0xee0
 		#define		REG_TX_AGC_B_NSS3_INDEX7_NSS3_INDEX4_JAGUAR	0xee4
 		#define		REG_TX_AGC_B_NSS3_INDEX9_NSS3_INDEX8_JAGUAR	0xee8
 		#define		REG_TX_AGC_C_CCK_11_CCK_1_JAGUAR	0x1820
 		#define		REG_TX_AGC_C_OFDM18_OFDM6_JAGUAR	0x1824
 		#define		REG_TX_AGC_C_OFDM54_OFDM24_JAGUAR	0x1828
-		#define		REG_TX_AGC_C_MCS3_MCS0_JAGUAR	0x182c
-		#define		REG_TX_AGC_C_MCS7_MCS4_JAGUAR	0x1830
-		#define		REG_TX_AGC_C_MCS11_MCS8_JAGUAR	0x1834
-		#define		REG_TX_AGC_C_MCS15_MCS12_JAGUAR	0x1838
+		#define		REG_TX_AGC_C_MCS3_MCS0_JAGUAR		0x182c
+		#define		REG_TX_AGC_C_MCS7_MCS4_JAGUAR		0x1830
+		#define		REG_TX_AGC_C_MCS11_MCS8_JAGUAR		0x1834
+		#define		REG_TX_AGC_C_MCS15_MCS12_JAGUAR		0x1838
 		#define		REG_TX_AGC_C_NSS1_INDEX3_NSS1_INDEX0_JAGUAR	0x183c
 		#define		REG_TX_AGC_C_NSS1_INDEX7_NSS1_INDEX4_JAGUAR	0x1840
 		#define		REG_TX_AGC_C_NSS2_INDEX1_NSS1_INDEX8_JAGUAR	0x1844
 		#define		REG_TX_AGC_C_NSS2_INDEX5_NSS2_INDEX2_JAGUAR	0x1848
 		#define		REG_TX_AGC_C_NSS2_INDEX9_NSS2_INDEX6_JAGUAR	0x184c
-		#define		REG_TX_AGC_C_MCS19_MCS16_JAGUAR	0x18d8
-		#define		REG_TX_AGC_C_MCS23_MCS20_JAGUAR	0x18dc
+		#define		REG_TX_AGC_C_MCS19_MCS16_JAGUAR		0x18d8
+		#define		REG_TX_AGC_C_MCS23_MCS20_JAGUAR		0x18dc
 		#define		REG_TX_AGC_C_NSS3_INDEX3_NSS3_INDEX0_JAGUAR	0x18e0
 		#define		REG_TX_AGC_C_NSS3_INDEX7_NSS3_INDEX4_JAGUAR	0x18e4
 		#define		REG_TX_AGC_C_NSS3_INDEX9_NSS3_INDEX8_JAGUAR	0x18e8
 		#define		REG_TX_AGC_D_CCK_11_CCK_1_JAGUAR	0x1a20
 		#define		REG_TX_AGC_D_OFDM18_OFDM6_JAGUAR	0x1a24
 		#define		REG_TX_AGC_D_OFDM54_OFDM24_JAGUAR	0x1a28
-		#define		REG_TX_AGC_D_MCS3_MCS0_JAGUAR	0x1a2c
-		#define		REG_TX_AGC_D_MCS7_MCS4_JAGUAR	0x1a30
-		#define		REG_TX_AGC_D_MCS11_MCS8_JAGUAR	0x1a34
-		#define		REG_TX_AGC_D_MCS15_MCS12_JAGUAR	0x1a38
+		#define		REG_TX_AGC_D_MCS3_MCS0_JAGUAR		0x1a2c
+		#define		REG_TX_AGC_D_MCS7_MCS4_JAGUAR		0x1a30
+		#define		REG_TX_AGC_D_MCS11_MCS8_JAGUAR		0x1a34
+		#define		REG_TX_AGC_D_MCS15_MCS12_JAGUAR		0x1a38
 		#define		REG_TX_AGC_D_NSS1_INDEX3_NSS1_INDEX0_JAGUAR	0x1a3c
 		#define		REG_TX_AGC_D_NSS1_INDEX7_NSS1_INDEX4_JAGUAR	0x1a40
 		#define		REG_TX_AGC_D_NSS2_INDEX1_NSS1_INDEX8_JAGUAR	0x1a44
 		#define		REG_TX_AGC_D_NSS2_INDEX5_NSS2_INDEX2_JAGUAR	0x1a48
 		#define		REG_TX_AGC_D_NSS2_INDEX9_NSS2_INDEX6_JAGUAR	0x1a4c
-		#define		REG_TX_AGC_D_MCS19_MCS16_JAGUAR	0x1ad8
-		#define		REG_TX_AGC_D_MCS23_MCS20_JAGUAR	0x1adc
+		#define		REG_TX_AGC_D_MCS19_MCS16_JAGUAR		0x1ad8
+		#define		REG_TX_AGC_D_MCS23_MCS20_JAGUAR		0x1adc
 		#define		REG_TX_AGC_D_NSS3_INDEX3_NSS3_INDEX0_JAGUAR	0x1ae0
 		#define		REG_TX_AGC_D_NSS3_INDEX7_NSS3_INDEX4_JAGUAR	0x1ae4
 		#define		REG_TX_AGC_D_NSS3_INDEX9_NSS3_INDEX8_JAGUAR	0x1ae8
@@ -200,25 +211,31 @@
 	#define		is_tx_agc_byte1_jaguar	0xff00
 	#define		is_tx_agc_byte2_jaguar	0xff0000
 	#define		is_tx_agc_byte3_jaguar	0xff000000
+	#if defined(CONFIG_WLAN_HAL_8198F) || defined(CONFIG_WLAN_HAL_8822CE)
+		#define REG_TX_AGC_CCK_11_CCK_1_JAGUAR3		0x3a00
+		#define REG_TX_AGC_OFDM_18_CCK_6_JAGUAR3	0x3a04
+		#define	REG_TX_AGC_OFDM_54_CCK_24_JAGUAR3	0x3a08
+		#define	REG_TX_AGC_MCS3_0_JAGUAR3		0x3a0c
+		#define	REG_TX_AGC_MCS7_4_JAGUAR3		0x3a10
+		#define	REG_TX_AGC_MCS11_8_JAGUAR3		0x3a14
+		#define	REG_TX_AGC_MCS15_12_JAGUAR3		0x3a18
+		#define	REG_TX_AGC_MCS19_16_JAGUAR3		0x3a1c
+		#define	REG_TX_AGC_MCS23_20_JAGUAR3		0x3a20
+		#define	REG_TX_AGC_MCS27_24_JAGUAR3		0x3a24
+		#define	REG_TX_AGC_MCS31_28_JAGUAR3		0x3a28
+		#define	REG_TX_AGC_VHT_Nss1_MCS3_0_JAGUAR3	0x3a2c
+		#define	REG_TX_AGC_VHT_Nss1_MCS7_4_JAGUAR3	0x3a30
+		#define	REG_TX_AGC_VHT_NSS2_MCS1_NSS1_MCS8_JAGUAR3	0x3a34
+		#define	REG_TX_AGC_VHT_Nss2_MCS5_2_JAGUAR3	0x3a38
+		#define	REG_TX_AGC_VHT_Nss2_MCS9_6_JAGUAR3	0x3a3c
+		#define	REG_TX_AGC_VHT_Nss3_MCS3_0_JAGUAR3	0x3a40
+		#define	REG_TX_AGC_VHT_Nss3_MCS7_4_JAGUAR3	0x3a44
+		#define	REG_TX_AGC_VHT_Nss4_MCS1_Nss3_MCS8_JAGUAR3	0x3a48
+		#define	REG_TX_AGC_VHT_Nss4_MCS5_2_JAGUAR3	0x3a4c
+		#define	REG_TX_AGC_VHT_Nss4_MCS9_6_JAGUAR3	0x3a50
+	#endif
 #endif
 
 #define	BIT_FA_RESET					BIT(0)
 
-#if (DM_ODM_SUPPORT_TYPE == ODM_CE) && defined(DM_ODM_CE_MAC80211)
-	#define REG_OFDM_0_XA_TX_IQ_IMBALANCE	0xC80
-	#define REG_OFDM_0_ECCA_THRESHOLD	0xC4C
-	#define REG_FPGA0_XB_LSSI_READ_BACK	0x8A4
-	#define REG_FPGA0_TX_GAIN_STAGE		0x80C
-	#define REG_OFDM_0_XA_AGC_CORE1		0xC50
-	#define REG_OFDM_0_XB_AGC_CORE1		0xC58
-	#define REG_A_TX_SCALE_JAGUAR		0xC1C
-	#define REG_B_TX_SCALE_JAGUAR		0xE1C
-
-	#define REG_AFE_XTAL_CTRL		0x0024
-	#define REG_AFE_PLL_CTRL		0x0028
-	#define REG_MAC_PHY_CTRL		0x002C
-
-	#define RF_CHNLBW			0x18
-#endif
-
 #endif
diff --git a/rtl8723DS/hal/phydm/phydm_regdefine11ac.h b/rtl8723DS/hal/phydm/phydm_regdefine11ac.h
index 40a9b7f..7824ac2 100755..100644
--- a/rtl8723DS/hal/phydm/phydm_regdefine11ac.h
+++ b/rtl8723DS/hal/phydm/phydm_regdefine11ac.h
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2007 - 2017 Realtek Corporation.
+ * Copyright(c) 2007 - 2017  Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -8,81 +8,102 @@
  *
  * This program is distributed in the hope that it will be useful, but WITHOUT
  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  * more details.
  *
+ * The full GNU General Public License is included in this distribution in the
+ * file called LICENSE.
+ *
+ * Contact Information:
+ * wlanfae <wlanfae@realtek.com>
+ * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
+ * Hsinchu 300, Taiwan.
+ *
+ * Larry Finger <Larry.Finger@lwfinger.net>
+ *
  *****************************************************************************/
 
-#ifndef	__ODM_REGDEFINE11AC_H__
+#ifndef __ODM_REGDEFINE11AC_H__
 #define __ODM_REGDEFINE11AC_H__
 
-/* 2 RF REG LIST */
+/* @2 RF REG LIST */
 
 
 
-/* 2 BB REG LIST
- * PAGE 8 */
-#define	ODM_REG_CCK_RPT_FORMAT_11AC	0x804
+/* @2 BB REG LIST */
+/* PAGE 8 */
+#define	ODM_REG_CCK_RPT_FORMAT_11AC		0x804
 #define	ODM_REG_BB_RX_PATH_11AC			0x808
 #define	ODM_REG_BB_TX_PATH_11AC			0x80c
-#define	ODM_REG_BB_ATC_11AC				0x860
-#define	ODM_REG_EDCCA_POWER_CAL		0x8dc
+#define	ODM_REG_BB_ATC_11AC			0x860
+#define	ODM_REG_EDCCA_POWER_CAL			0x8dc
 #define	ODM_REG_DBG_RPT_11AC			0x8fc
 /* PAGE 9 */
 #define	ODM_REG_EDCCA_DOWN_OPT			0x900
 #define	ODM_REG_ACBB_EDCCA_ENHANCE		0x944
-#define	odm_adc_trigger_jaguar2			0x95C	/*ADC sample mode*/
+#define	odm_adc_trigger_jaguar2			0x95C	/*@ADC sample mode*/
 #define	ODM_REG_OFDM_FA_RST_11AC		0x9A4
 #define	ODM_REG_CCX_PERIOD_11AC			0x990
 #define	ODM_REG_NHM_TH9_TH10_11AC		0x994
-#define	ODM_REG_CLM_11AC					0x994
-#define	ODM_REG_NHM_TH3_TO_TH0_11AC	0x998
-#define	ODM_REG_NHM_TH7_TO_TH4_11AC	0x99c
+#define	ODM_REG_CLM_11AC			0x994
+#define	ODM_REG_NHM_TH3_TO_TH0_11AC		0x998
+#define	ODM_REG_NHM_TH7_TO_TH4_11AC		0x99c
 #define	ODM_REG_NHM_TH8_11AC			0x9a0
 #define	ODM_REG_NHM_9E8_11AC			0x9e8
 #define	ODM_REG_CSI_CONTENT_VALUE		0x9b4
 /* PAGE A */
 #define	ODM_REG_CCK_CCA_11AC			0xA0A
 #define	ODM_REG_CCK_FA_RST_11AC			0xA2C
-#define	ODM_REG_CCK_FA_11AC				0xA5C
+#define	ODM_REG_CCK_FA_11AC			0xA5C
 /* PAGE B */
-#define	ODM_REG_RST_RPT_11AC				0xB58
+#define	ODM_REG_RST_RPT_11AC			0xB58
 /* PAGE C */
-#define	ODM_REG_TRMUX_11AC				0xC08
-#define	ODM_REG_IGI_A_11AC				0xC50
+#define	ODM_REG_TRMUX_11AC			0xC08
+#define	ODM_REG_IGI_A_11AC			0xC50
 /* PAGE E */
-#define	ODM_REG_IGI_B_11AC				0xE50
-#define	ODM_REG_TRMUX_11AC_B			0xE08
+#define	ODM_REG_IGI_B_11AC			0xE50
+#define	ODM_REG_ANT_11AC_B			0xE08
 /* PAGE F */
 #define	ODM_REG_CCK_CRC32_CNT_11AC		0xF04
 #define	ODM_REG_CCK_CCA_CNT_11AC		0xF08
 #define	ODM_REG_VHT_CRC32_CNT_11AC		0xF0c
 #define	ODM_REG_HT_CRC32_CNT_11AC		0xF10
-#define	ODM_REG_OFDM_CRC32_CNT_11AC	0xF14
+#define	ODM_REG_OFDM_CRC32_CNT_11AC		0xF14
 #define	ODM_REG_OFDM_FA_11AC			0xF48
-#define	ODM_REG_RPT_11AC					0xfa0
+#define	ODM_REG_OFDM_FA_TYPE1_11AC		0xFCC
+#define	ODM_REG_OFDM_FA_TYPE2_11AC		0xFD0
+#define	ODM_REG_OFDM_FA_TYPE3_11AC		0xFBC
+#define	ODM_REG_OFDM_FA_TYPE4_11AC		0xFC0
+#define	ODM_REG_OFDM_FA_TYPE5_11AC		0xFC4
+#define	ODM_REG_OFDM_FA_TYPE6_11AC		0xFC8
+#define	ODM_REG_RPT_11AC			0xfa0
 #define	ODM_REG_CLM_RESULT_11AC			0xfa4
 #define	ODM_REG_NHM_CNT_11AC			0xfa8
-#define ODM_REG_NHM_DUR_READY_11AC      0xfb4
+#define ODM_REG_NHM_DUR_READY_11AC		0xfb4
 
-#define	ODM_REG_NHM_CNT7_TO_CNT4_11AC   0xfac
-#define	ODM_REG_NHM_CNT11_TO_CNT8_11AC  0xfb0
-#define	ODM_REG_OFDM_FA_TYPE2_11AC		0xFD0
+#define	ODM_REG_NHM_CNT7_TO_CNT4_11AC		0xfac
+#define	ODM_REG_NHM_CNT11_TO_CNT8_11AC		0xfb0
 /* PAGE 18 */
-#define	ODM_REG_IGI_C_11AC				0x1850
+#define	ODM_REG_IGI_C_11AC			0x1850
 /* PAGE 1A */
-#define	ODM_REG_IGI_D_11AC				0x1A50
+#define	ODM_REG_IGI_D_11AC			0x1A50
+
+/* PAGE 1D */
+#define	ODM_REG_IGI_11AC3			0x1D70
 
-/* 2 MAC REG LIST */
-#define	ODM_REG_RESP_TX_11AC				0x6D8
+/* @2 MAC REG LIST */
+#define	ODM_REG_RESP_TX_11AC			0x6D8
 
 
 
-/* DIG Related */
-#define	ODM_BIT_IGI_11AC					0x0000007F
+/* @DIG Related */
+#define	ODM_BIT_IGI_11AC			0x0000007F
+#define	ODM_BIT_IGI_B_11AC3			0x00007F00
+#define	ODM_BIT_IGI_C_11AC3			0x007F0000
+#define	ODM_BIT_IGI_D_11AC3			0x7F000000
 #define	ODM_BIT_CCK_RPT_FORMAT_11AC		BIT(16)
 #define	ODM_BIT_BB_RX_PATH_11AC			0xF
 #define	ODM_BIT_BB_TX_PATH_11AC			0xF
-#define	ODM_BIT_BB_ATC_11AC				BIT(14)
+#define	ODM_BIT_BB_ATC_11AC			BIT(14)
 
 #endif
diff --git a/rtl8723DS/hal/phydm/phydm_regdefine11n.h b/rtl8723DS/hal/phydm/phydm_regdefine11n.h
index 5c24a27..e36f37d 100755..100644
--- a/rtl8723DS/hal/phydm/phydm_regdefine11n.h
+++ b/rtl8723DS/hal/phydm/phydm_regdefine11n.h
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2007 - 2017 Realtek Corporation.
+ * Copyright(c) 2007 - 2017  Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -8,91 +8,101 @@
  *
  * This program is distributed in the hope that it will be useful, but WITHOUT
  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  * more details.
  *
+ * The full GNU General Public License is included in this distribution in the
+ * file called LICENSE.
+ *
+ * Contact Information:
+ * wlanfae <wlanfae@realtek.com>
+ * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
+ * Hsinchu 300, Taiwan.
+ *
+ * Larry Finger <Larry.Finger@lwfinger.net>
+ *
  *****************************************************************************/
 
-#ifndef	__ODM_REGDEFINE11N_H__
+#ifndef __ODM_REGDEFINE11N_H__
 #define __ODM_REGDEFINE11N_H__
 
-
-/* 2 RF REG LIST */
-#define	ODM_REG_RF_MODE_11N				0x00
-#define	ODM_REG_RF_0B_11N				0x0B
-#define	ODM_REG_CHNBW_11N				0x18
-#define	ODM_REG_T_METER_11N				0x24
-#define	ODM_REG_RF_25_11N				0x25
-#define	ODM_REG_RF_26_11N				0x26
-#define	ODM_REG_RF_27_11N				0x27
-#define	ODM_REG_RF_2B_11N				0x2B
-#define	ODM_REG_RF_2C_11N				0x2C
-#define	ODM_REG_RXRF_A3_11N				0x3C
+/* @2 RF REG LIST */
+#define	ODM_REG_RF_MODE_11N			0x00
+#define	ODM_REG_RF_0B_11N			0x0B
+#define	ODM_REG_CHNBW_11N			0x18
+#define	ODM_REG_T_METER_11N			0x24
+#define	ODM_REG_RF_25_11N			0x25
+#define	ODM_REG_RF_26_11N			0x26
+#define	ODM_REG_RF_27_11N			0x27
+#define	ODM_REG_RF_2B_11N			0x2B
+#define	ODM_REG_RF_2C_11N			0x2C
+#define	ODM_REG_RXRF_A3_11N			0x3C
 #define	ODM_REG_T_METER_92D_11N			0x42
 #define	ODM_REG_T_METER_88E_11N			0x42
 
 
 
-/* 2 BB REG LIST
- * PAGE 8 */
-#define	ODM_REG_BB_CTRL_11N				0x800
-#define	ODM_REG_RF_PIN_11N				0x804
-#define	ODM_REG_PSD_CTRL_11N				0x808
+/* @2 BB REG LIST
+ * PAGE 8
+ */
+#define	ODM_REG_BB_CTRL_11N			0x800
+#define	ODM_REG_RF_PIN_11N			0x804
+#define	ODM_REG_PSD_CTRL_11N			0x808
 #define	ODM_REG_TX_ANT_CTRL_11N			0x80C
 #define	ODM_REG_BB_PWR_SAV5_11N			0x818
 #define	ODM_REG_CCK_RPT_FORMAT_11N		0x824
-#define	ODM_REG_CCK_RPT_FORMAT_11N_B	0x82C
-#define	ODM_REG_RX_DEFUALT_A_11N		0x858
-#define	ODM_REG_RX_DEFUALT_B_11N		0x85A
+#define	ODM_REG_CCK_RPT_FORMAT_11N_B		0x82C
+#define	ODM_REG_RX_DEFAULT_A_11N		0x858
+#define	ODM_REG_RX_DEFAULT_B_11N		0x85A
 #define	ODM_REG_BB_PWR_SAV3_11N			0x85C
 #define	ODM_REG_ANTSEL_CTRL_11N			0x860
 #define	ODM_REG_RX_ANT_CTRL_11N			0x864
-#define	ODM_REG_PIN_CTRL_11N				0x870
+#define	ODM_REG_PIN_CTRL_11N			0x870
 #define	ODM_REG_BB_PWR_SAV1_11N			0x874
 #define	ODM_REG_ANTSEL_PATH_11N			0x878
 #define	ODM_REG_BB_3WIRE_11N			0x88C
-#define	ODM_REG_SC_CNT_11N				0x8C4
-#define	ODM_REG_PSD_DATA_11N				0x8B4
+#define	ODM_REG_SC_CNT_11N			0x8C4
+#define	ODM_REG_PSD_DATA_11N			0x8B4
 #define	ODM_REG_CCX_PERIOD_11N			0x894
 #define	ODM_REG_NHM_TH9_TH10_11N		0x890
-#define	ODM_REG_CLM_11N					0x890
+#define	ODM_REG_CLM_11N				0x890
 #define	ODM_REG_NHM_TH3_TO_TH0_11N		0x898
 #define	ODM_REG_NHM_TH7_TO_TH4_11N		0x89c
-#define ODM_REG_NHM_TH8_11N				0xe28
+#define ODM_REG_NHM_TH8_11N			0xe28
 #define	ODM_REG_CLM_READY_11N			0x8b4
 #define	ODM_REG_CLM_RESULT_11N			0x8d0
-#define	ODM_REG_NHM_CNT_11N				0x8d8
+#define	ODM_REG_NHM_CNT_11N			0x8d8
 
-/* For struct _ACS_, Jeffery, 2014-12-26 */
+/* @For struct acs_info, Jeffery, 2014-12-26 */
 #define	ODM_REG_NHM_CNT7_TO_CNT4_11N		0x8dc
 #define	ODM_REG_NHM_CNT9_TO_CNT8_11N		0x8d0
-#define	ODM_REG_NHM_CNT10_TO_CNT11_11N	0x8d4
+#define	ODM_REG_NHM_CNT10_TO_CNT11_11N		0x8d4
 
 /* PAGE 9 */
 #define	ODM_REG_BB_CTRL_PAGE9_11N		0x900
-#define	ODM_REG_DBG_RPT_11N				0x908
+#define	ODM_REG_DBG_RPT_11N			0x908
 #define	ODM_REG_BB_TX_PATH_11N			0x90c
 #define	ODM_REG_ANT_MAPPING1_11N		0x914
 #define	ODM_REG_ANT_MAPPING2_11N		0x918
-#define	ODM_REG_EDCCA_DOWN_OPT_11N	0x948
+#define	ODM_REG_EDCCA_DOWN_OPT_11N		0x948
 #define	ODM_REG_RX_DFIR_MOD_97F			0x948
-#define	ODM_REG_SOML_97F					0x998
+#define	ODM_REG_SOML_97F			0x998
 
 /* PAGE A */
-#define	ODM_REG_CCK_ANTDIV_PARA1_11N	0xA00
+#define	ODM_REG_CCK_ANTDIV_PARA1_11N		0xA00
 #define	ODM_REG_CCK_ANT_SEL_11N			0xA04
-#define	ODM_REG_CCK_CCA_11N				0xA0A
-#define	ODM_REG_CCK_ANTDIV_PARA2_11N	0xA0C
-#define	ODM_REG_CCK_ANTDIV_PARA3_11N	0xA10
-#define	ODM_REG_CCK_ANTDIV_PARA4_11N	0xA14
-#define	ODM_REG_CCK_FILTER_PARA1_11N	0xA22
-#define	ODM_REG_CCK_FILTER_PARA2_11N	0xA23
-#define	ODM_REG_CCK_FILTER_PARA3_11N	0xA24
-#define	ODM_REG_CCK_FILTER_PARA4_11N	0xA25
-#define	ODM_REG_CCK_FILTER_PARA5_11N	0xA26
-#define	ODM_REG_CCK_FILTER_PARA6_11N	0xA27
-#define	ODM_REG_CCK_FILTER_PARA7_11N	0xA28
-#define	ODM_REG_CCK_FILTER_PARA8_11N	0xA29
+#define	ODM_REG_CCK_CCA_11N			0xA0A
+#define	ODM_REG_CCK_ANTDIV_PARA2_11N		0xA0C
+#define	ODM_REG_CCK_ANTDIV_PARA3_11N		0xA10
+#define	ODM_REG_CCK_ANTDIV_PARA4_11N		0xA14
+#define	ODM_REG_CCK_FILTER_PARA1_11N		0xA22
+#define	ODM_REG_CCK_FILTER_PARA2_11N		0xA23
+#define	ODM_REG_CCK_FILTER_PARA3_11N		0xA24
+#define	ODM_REG_CCK_FILTER_PARA4_11N		0xA25
+#define	ODM_REG_CCK_FILTER_PARA5_11N		0xA26
+#define	ODM_REG_CCK_FILTER_PARA6_11N		0xA27
+#define	ODM_REG_CCK_FILTER_PARA7_11N		0xA28
+#define	ODM_REG_CCK_FILTER_PARA8_11N		0xA29
 #define	ODM_REG_CCK_FA_RST_11N			0xA2C
 #define	ODM_REG_CCK_FA_MSB_11N			0xA58
 #define	ODM_REG_CCK_FA_LSB_11N			0xA5C
@@ -103,60 +113,60 @@
 #define	ODM_REG_PATH_SWITCH_11N			0xB30
 #define	ODM_REG_RSSI_CTRL_11N			0xB38
 #define	ODM_REG_CONFIG_ANTA_11N			0xB68
-#define	ODM_REG_RSSI_BT_11N				0xB9C
-#define	ODM_REG_RXCK_RFMOD				0xBB0
+#define	ODM_REG_RSSI_BT_11N			0xB9C
+#define	ODM_REG_RXCK_RFMOD			0xBB0
 #define	ODM_REG_EDCCA_DCNF_97F			0xBC0
 
 /* PAGE C */
 #define	ODM_REG_OFDM_FA_HOLDC_11N		0xC00
 #define	ODM_REG_BB_RX_PATH_11N			0xC04
-#define	ODM_REG_TRMUX_11N				0xC08
+#define	ODM_REG_TRMUX_11N			0xC08
 #define	ODM_REG_OFDM_FA_RSTC_11N		0xC0C
-#define	ODM_REG_DOWNSAM_FACTOR_11N	0xC10
+#define	ODM_REG_DOWNSAM_FACTOR_11N		0xC10
 #define	ODM_REG_RXIQI_MATRIX_11N		0xC14
-#define	ODM_REG_TXIQK_MATRIX_LSB1_11N	0xC4C
-#define	ODM_REG_IGI_A_11N				0xC50
+#define	ODM_REG_TXIQK_MATRIX_LSB1_11N		0xC4C
+#define	ODM_REG_IGI_A_11N			0xC50
 #define	ODM_REG_ANTDIV_PARA2_11N		0xC54
-#define	ODM_REG_IGI_B_11N					0xC58
+#define	ODM_REG_IGI_B_11N			0xC58
 #define	ODM_REG_ANTDIV_PARA3_11N		0xC5C
-#define   ODM_REG_L1SBD_PD_CH_11N			0XC6C
-#define	ODM_REG_BB_PWR_SAV2_11N		0xC70
+#define   ODM_REG_L1SBD_PD_CH_11N		0XC6C
+#define	ODM_REG_BB_PWR_SAV2_11N			0xC70
 #define	ODM_REG_BB_AGC_SET_2_11N		0xc74
-#define	ODM_REG_RX_OFF_11N				0xC7C
+#define	ODM_REG_RX_OFF_11N			0xC7C
 #define	ODM_REG_TXIQK_MATRIXA_11N		0xC80
 #define	ODM_REG_TXIQK_MATRIXB_11N		0xC88
-#define	ODM_REG_TXIQK_MATRIXA_LSB2_11N	0xC94
-#define	ODM_REG_TXIQK_MATRIXB_LSB2_11N	0xC9C
-#define	ODM_REG_RXIQK_MATRIX_LSB_11N	0xCA0
+#define	ODM_REG_TXIQK_MATRIXA_LSB2_11N		0xC94
+#define	ODM_REG_TXIQK_MATRIXB_LSB2_11N		0xC9C
+#define	ODM_REG_RXIQK_MATRIX_LSB_11N		0xCA0
 #define	ODM_REG_ANTDIV_PARA1_11N		0xCA4
-#define	ODM_REG_SMALL_BANDWIDTH_11N	0xCE4
+#define	ODM_REG_SMALL_BANDWIDTH_11N		0xCE4
 #define	ODM_REG_OFDM_FA_TYPE1_11N		0xCF0
 /* PAGE D */
 #define	ODM_REG_OFDM_FA_RSTD_11N		0xD00
 #define	ODM_REG_BB_RX_ANT_11N			0xD04
-#define	ODM_REG_BB_ATC_11N				0xD2C
+#define	ODM_REG_BB_ATC_11N			0xD2C
 #define	ODM_REG_OFDM_FA_TYPE2_11N		0xDA0
 #define	ODM_REG_OFDM_FA_TYPE3_11N		0xDA4
 #define	ODM_REG_OFDM_FA_TYPE4_11N		0xDA8
-#define	ODM_REG_RPT_11N					0xDF4
+#define	ODM_REG_RPT_11N				0xDF4
 /* PAGE E */
 #define	ODM_REG_TXAGC_A_6_18_11N		0xE00
 #define	ODM_REG_TXAGC_A_24_54_11N		0xE04
-#define	ODM_REG_TXAGC_A_1_MCS32_11N	0xE08
+#define	ODM_REG_TXAGC_A_1_MCS32_11N		0xE08
 #define	ODM_REG_TXAGC_A_MCS0_3_11N		0xE10
 #define	ODM_REG_TXAGC_A_MCS4_7_11N		0xE14
-#define	ODM_REG_TXAGC_A_MCS8_11_11N	0xE18
-#define	ODM_REG_TXAGC_A_MCS12_15_11N	0xE1C
+#define	ODM_REG_TXAGC_A_MCS8_11_11N		0xE18
+#define	ODM_REG_TXAGC_A_MCS12_15_11N		0xE1C
 #define	ODM_REG_EDCCA_DCNF_11N			0xE24
-#define	ODM_REG_TAP_UPD_97F				0xE24
+#define	ODM_REG_TAP_UPD_97F			0xE24
 #define	ODM_REG_FPGA0_IQK_11N			0xE28
-#define	ODM_REG_PAGE_B1_97F				0xE28
+#define	ODM_REG_PAGE_B1_97F			0xE28
 #define	ODM_REG_TXIQK_TONE_A_11N		0xE30
 #define	ODM_REG_RXIQK_TONE_A_11N		0xE34
 #define	ODM_REG_TXIQK_PI_A_11N			0xE38
 #define	ODM_REG_RXIQK_PI_A_11N			0xE3C
-#define	ODM_REG_TXIQK_11N				0xE40
-#define	ODM_REG_RXIQK_11N				0xE44
+#define	ODM_REG_TXIQK_11N			0xE40
+#define	ODM_REG_RXIQK_11N			0xE44
 #define	ODM_REG_IQK_AGC_PTS_11N			0xE48
 #define	ODM_REG_IQK_AGC_RSP_11N			0xE4C
 #define	ODM_REG_BLUETOOTH_11N			0xE6C
@@ -165,45 +175,45 @@
 #define	ODM_REG_TX_CCK_BBON_11N			0xE78
 #define	ODM_REG_OFDM_RFON_11N			0xE7C
 #define	ODM_REG_OFDM_BBON_11N			0xE80
-#define	ODM_REG_TX2RX_11N				0xE84
-#define	ODM_REG_TX2TX_11N				0xE88
-#define	ODM_REG_RX_CCK_11N				0xE8C
-#define	ODM_REG_RX_OFDM_11N				0xED0
+#define	ODM_REG_TX2RX_11N			0xE84
+#define	ODM_REG_TX2TX_11N			0xE88
+#define	ODM_REG_RX_CCK_11N			0xE8C
+#define	ODM_REG_RX_OFDM_11N			0xED0
 #define	ODM_REG_RX_WAIT_RIFS_11N		0xED4
-#define	ODM_REG_RX2RX_11N				0xED8
-#define	ODM_REG_STANDBY_11N				0xEDC
-#define	ODM_REG_SLEEP_11N				0xEE0
+#define	ODM_REG_RX2RX_11N			0xED8
+#define	ODM_REG_STANDBY_11N			0xEDC
+#define	ODM_REG_SLEEP_11N			0xEE0
 #define	ODM_REG_PMPD_ANAEN_11N			0xEEC
 /* PAGE F */
 #define	ODM_REG_PAGE_F_RST_11N			0xF14
-#define	ODM_REG_IGI_C_11N					0xF84
-#define	ODM_REG_IGI_D_11N				0xF88
-#define	ODM_REG_CCK_CRC32_ERROR_CNT_11N	0xF84
+#define	ODM_REG_IGI_C_11N			0xF84
+#define	ODM_REG_IGI_D_11N			0xF88
+#define	ODM_REG_CCK_CRC32_ERROR_CNT_11N		0xF84
 #define	ODM_REG_CCK_CRC32_OK_CNT_11N		0xF88
 #define	ODM_REG_HT_CRC32_CNT_11N		0xF90
 #define	ODM_REG_OFDM_CRC32_CNT_11N		0xF94
-#define	ODM_REG_HT_CRC32_CNT_11N_AGG	0xFB8
+#define	ODM_REG_HT_CRC32_CNT_11N_AGG		0xFB8
 
-/* 2 MAC REG LIST */
-#define	ODM_REG_BB_RST_11N				0x02
+/* @2 MAC REG LIST */
+#define	ODM_REG_BB_RST_11N			0x02
 #define	ODM_REG_ANTSEL_PIN_11N			0x4C
 #define	ODM_REG_EARLY_MODE_11N			0x4D0
 #define	ODM_REG_RSSI_MONITOR_11N		0x4FE
-#define	ODM_REG_EDCA_VO_11N				0x500
-#define	ODM_REG_EDCA_VI_11N				0x504
-#define	ODM_REG_EDCA_BE_11N				0x508
-#define	ODM_REG_EDCA_BK_11N				0x50C
-#define	ODM_REG_TXPAUSE_11N				0x522
-#define	ODM_REG_RESP_TX_11N				0x6D8
-#define	ODM_REG_ANT_TRAIN_PARA1_11N	0x7b0
-#define	ODM_REG_ANT_TRAIN_PARA2_11N	0x7b4
+#define	ODM_REG_EDCA_VO_11N			0x500
+#define	ODM_REG_EDCA_VI_11N			0x504
+#define	ODM_REG_EDCA_BE_11N			0x508
+#define	ODM_REG_EDCA_BK_11N			0x50C
+#define	ODM_REG_TXPAUSE_11N			0x522
+#define	ODM_REG_RESP_TX_11N			0x6D8
+#define	ODM_REG_ANT_TRAIN_PARA1_11N		0x7b0
+#define	ODM_REG_ANT_TRAIN_PARA2_11N		0x7b4
 
 
-/* DIG Related */
-#define	ODM_BIT_IGI_11N					0x0000007F
+/* @DIG Related */
+#define	ODM_BIT_IGI_11N				0x0000007F
 #define	ODM_BIT_CCK_RPT_FORMAT_11N		BIT(9)
 #define	ODM_BIT_BB_RX_PATH_11N			0xF
 #define	ODM_BIT_BB_TX_PATH_11N			0xF
-#define	ODM_BIT_BB_ATC_11N				BIT(11)
-
+#define	ODM_BIT_BB_ATC_11N			BIT(11)
 #endif
+
diff --git a/rtl8723DS/hal/phydm/phydm_regtable.h b/rtl8723DS/hal/phydm/phydm_regtable.h
new file mode 100644
index 0000000..cf2226c
--- a/dev/null
+++ b/rtl8723DS/hal/phydm/phydm_regtable.h
@@ -0,0 +1,849 @@
+#define R_0x0 0x0
+#define R_0x00 0x00
+#define R_0x0106 0x0106
+#define R_0x0140 0x0140
+#define R_0x0144 0x0144
+#define R_0x0148 0x0148
+#define R_0x040 0x040
+#define R_0x10 0x10
+#define R_0x100 0x100
+#define R_0x1038 0x1038
+#define R_0x103c 0x103c
+#define R_0x1040 0x1040
+#define R_0x1048 0x1048
+#define R_0x1080 0x1080
+#define R_0x14c0 0x14c0
+#define R_0x14c4 0x14c4
+#define R_0x14c8 0x14c8
+#define R_0x14cc 0x14cc
+#define R_0x1518 0x1518
+#define R_0x1684 0x1684
+#define R_0x1688 0x1688
+#define R_0x168c 0x168c
+#define R_0x1700 0x1700
+#define R_0x1704 0x1704
+#define R_0x1800 0x1800
+#define R_0x180c 0x180c
+#define R_0x1830 0x1830
+#define R_0x1834 0x1834
+#define R_0x1838 0x1838
+#define R_0x183c 0x183c
+#define R_0x1840 0x1840
+#define R_0x1844 0x1844
+#define R_0x1848 0x1848
+#define R_0x1860 0x1860
+#define R_0x1864 0x1864
+#define R_0x186c 0x186c
+#define R_0x1870 0x1870
+#define R_0x1884 0x1884
+#define R_0x188c 0x188c
+#define R_0x1894 0x1894
+#define R_0x189c 0x189c
+#define R_0x18a0 0x18a0
+#define R_0x18a4 0x18a4
+#define R_0x18a8 0x18a8
+#define R_0x18ac 0x18ac
+#define R_0x18e0 0x18e0
+#define R_0x18e8 0x18e8
+#define R_0x18ec 0x18ec
+#define R_0x18f0 0x18f0
+#define R_0x18f8 0x18f8
+#define R_0x18fc 0x18fc
+#define R_0x1900 0x1900
+#define R_0x1904 0x1904
+#define R_0x1908 0x1908
+#define R_0x1918 0x1918
+#define R_0x191c 0x191c
+#define R_0x1928 0x1928
+#define R_0x1940 0x1940
+#define R_0x1944 0x1944
+#define R_0x1950 0x1950
+#define R_0x1954 0x1954
+#define R_0x195c 0x195c
+#define R_0x1970 0x1970
+#define R_0x1984 0x1984
+#define R_0x1988 0x1988
+#define R_0x198c 0x198c
+#define R_0x1990 0x1990
+#define R_0x1991 0x1991
+#define R_0x1998 0x1998
+#define R_0x19a8 0x19a8
+#define R_0x19d4 0x19d4
+#define R_0x19d8 0x19d8
+#define R_0x19e0 0x19e0
+#define R_0x19f0 0x19f0
+#define R_0x19f8 0x19f8
+#define R_0x1a00 0x1a00
+#define R_0x1a04 0x1a04
+#define R_0x1a14 0x1a14
+#define R_0x1a20 0x1a20
+#define R_0x1a24 0x1a24
+#define R_0x1a28 0x1a28
+#define R_0x1a2c 0x1a2c
+#define R_0x1a5c 0x1a5c
+#define R_0x1a70 0x1a70
+#define R_0x1a80 0x1a80
+#define R_0x1a84 0x1a84
+#define R_0x1a8c 0x1a8c
+#define R_0x1a94 0x1a94
+#define R_0x1a98 0x1a98
+#define R_0x1a9c 0x1a9c
+#define R_0x1aa0 0x1aa0
+#define R_0x1aac 0x1aac
+#define R_0x1ab0 0x1ab0
+#define R_0x1abc 0x1abc
+#define R_0x1ac0 0x1ac0
+#define R_0x1ac8 0x1ac8
+#define R_0x1acc 0x1acc
+#define R_0x1ad0 0x1ad0
+#define R_0x1ad4 0x1ad4
+#define R_0x1b00 0x1b00
+#define R_0x1b04 0x1b04
+#define R_0x1b08 0x1b08
+#define R_0x1b0c 0x1b0c
+#define R_0x1b20 0x1b20
+#define R_0x1b2c 0x1b2c
+#define R_0x1b34 0x1b34
+#define R_0x1b38 0x1b38
+#define R_0x1b3c 0x1b3c
+#define R_0x1b40 0x1b40
+#define R_0x1b44 0x1b44
+#define R_0x1b48 0x1b48
+#define R_0x1b4c 0x1b4c
+#define R_0x1b50 0x1b50
+#define R_0x1b54 0x1b54
+#define R_0x1b58 0x1b58
+#define R_0x1b5c 0x1b5c
+#define R_0x1b60 0x1b60
+#define R_0x1b64 0x1b64
+#define R_0x1b67 0x1b67
+#define R_0x1b68 0x1b68
+#define R_0x1b6c 0x1b6c
+#define R_0x1b70 0x1b70
+#define R_0x1b74 0x1b74
+#define R_0x1b78 0x1b78
+#define R_0x1b7c 0x1b7c
+#define R_0x1b80 0x1b80
+#define R_0x1b8c 0x1b8c
+#define R_0x1b90 0x1b90
+#define R_0x1b92 0x1b92
+#define R_0x1b94 0x1b94
+#define R_0x1b98 0x1b98
+#define R_0x1b9c 0x1b9c
+#define R_0x1ba0 0x1ba0
+#define R_0x1ba4 0x1ba4
+#define R_0x1ba8 0x1ba8
+#define R_0x1bac 0x1bac
+#define R_0x1bb0 0x1bb0
+#define R_0x1bb4 0x1bb4
+#define R_0x1bb8 0x1bb8
+#define R_0x1bbc 0x1bbc
+#define R_0x1bc8 0x1bc8
+#define R_0x1bcc 0x1bcc
+#define R_0x1bd0 0x1bd0
+#define R_0x1bd4 0x1bd4
+#define R_0x1bd8 0x1bd8
+#define R_0x1bdc 0x1bdc
+#define R_0x1bf0 0x1bf0
+#define R_0x1bfc 0x1bfc
+#define R_0x1c20 0x1c20
+#define R_0x1c24 0x1c24
+#define R_0x1c28 0x1c28
+#define R_0x1c2c 0x1c2c
+#define R_0x1c30 0x1c30
+#define R_0x1c38 0x1c38
+#define R_0x1c3c 0x1c3c
+#define R_0x1c64 0x1c64
+#define R_0x1c68 0x1c68
+#define R_0x1c74 0x1c74
+#define R_0x1c78 0x1c78
+#define R_0x1c7c 0x1c7c
+#define R_0x1c80 0x1c80
+#define R_0x1c90 0x1c90
+#define R_0x1c94 0x1c94
+#define R_0x1c98 0x1c98
+#define R_0x1c9c 0x1c9c
+#define R_0x1ca0 0x1ca0
+#define R_0x1ca4 0x1ca4
+#define R_0x1cb8 0x1cb8
+#define R_0x1cd0 0x1cd0
+#define R_0x1ce4 0x1ce4
+#define R_0x1ce8 0x1ce8
+#define R_0x1cec 0x1cec
+#define R_0x1cf0 0x1cf0
+#define R_0x1cf4 0x1cf4
+#define R_0x1cf8 0x1cf8
+#define R_0x1d04 0x1d04
+#define R_0x1d08 0x1d08
+#define R_0x1d0c 0x1d0c
+#define R_0x1d10 0x1d10
+#define R_0x1d2c 0x1d2c
+#define R_0x1d30 0x1d30
+#define R_0x1d44 0x1d44
+#define R_0x1d48 0x1d48
+#define R_0x1d58 0x1d58
+#define R_0x1d60 0x1d60
+#define R_0x1d6c 0x1d6c
+#define R_0x1d70 0x1d70
+#define R_0x1d94 0x1d94
+#define R_0x1d9c 0x1d9c
+#define R_0x1da4 0x1da4
+#define R_0x1da8 0x1da8
+#define R_0x1e14 0x1e14
+#define R_0x1e18 0x1e18
+#define R_0x1e24 0x1e24
+#define R_0x1e2c 0x1e2c
+#define R_0x1e30 0x1e30
+#define R_0x1e40 0x1e40
+#define R_0x1e44 0x1e44
+#define R_0x1e48 0x1e48
+#define R_0x1e5c 0x1e5c
+#define R_0x1e60 0x1e60
+#define R_0x1e64 0x1e64
+#define R_0x1e68 0x1e68
+#define R_0x1e6c 0x1e6c
+#define R_0x1e70 0x1e70
+#define R_0x1e7c 0x1e7c
+#define R_0x1e88 0x1e88
+#define R_0x1e8c 0x1e8c
+#define R_0x1ea4 0x1ea4
+#define R_0x1eb4 0x1eb4
+#define R_0x1ee8 0x1ee8
+#define R_0x1eec 0x1eec
+#define R_0x1ef0 0x1ef0
+#define R_0x24 0x24
+#define R_0x28 0x28
+#define R_0x2c 0x2c
+#define R_0x2c04 0x2c04
+#define R_0x2c08 0x2c08
+#define R_0x2c0c 0x2c0c
+#define R_0x2c10 0x2c10
+#define R_0x2c14 0x2c14
+#define R_0x2c20 0x2c20
+#define R_0x2c2c 0x2c2c
+#define R_0x2c30 0x2c30
+#define R_0x2c34 0x2c34
+#define R_0x2d00 0x2d00
+#define R_0x2d04 0x2d04
+#define R_0x2d08 0x2d08
+#define R_0x2d0c 0x2d0c
+#define R_0x2d10 0x2d10
+#define R_0x2d20 0x2d20
+#define R_0x2d38 0x2d38
+#define R_0x2d40 0x2d40
+#define R_0x2d44 0x2d44
+#define R_0x2d48 0x2d48
+#define R_0x2d4c 0x2d4c
+#define R_0x2d88 0x2d88
+#define R_0x2d90 0x2d90
+#define R_0x2d9c 0x2d9c
+#define R_0x2db4 0x2db4
+#define R_0x2db8 0x2db8
+#define R_0x2dbc 0x2dbc
+#define R_0x2de0 0x2de0
+#define R_0x2de4 0x2de4
+#define R_0x2de8 0x2de8
+#define R_0x2e00 0x2e00
+#define R_0x2e20 0x2e20
+#define R_0x300 0x300
+#define R_0x38 0x38
+#define R_0x3a00 0x3a00
+#define R_0x3a04 0x3a04
+#define R_0x3a08 0x3a08
+#define R_0x3a0c 0x3a0c
+#define R_0x3a10 0x3a10
+#define R_0x3a14 0x3a14
+#define R_0x3a18 0x3a18
+#define R_0x3a1c 0x3a1c
+#define R_0x3a20 0x3a20
+#define R_0x3a24 0x3a24
+#define R_0x3a28 0x3a28
+#define R_0x3a2c 0x3a2c
+#define R_0x3a30 0x3a30
+#define R_0x3a34 0x3a34
+#define R_0x3a38 0x3a38
+#define R_0x3a3c 0x3a3c
+#define R_0x3a40 0x3a40
+#define R_0x3a44 0x3a44
+#define R_0x3a48 0x3a48
+#define R_0x3a4c 0x3a4c
+#define R_0x3a50 0x3a50               
+#define R_0x3a54 0x3a54
+#define R_0x3a58 0x3a58
+#define R_0x3a5c 0x3a5c
+#define R_0x3a60 0x3a60
+#define R_0x3a64 0x3a64
+#define R_0x3a68 0x3a68
+#define R_0x3a6c 0x3a6c
+#define R_0x3a70 0x3a70
+#define R_0x3a74 0x3a74
+#define R_0x3a78 0x3a78
+#define R_0x3a7c 0x3a7c
+#define R_0x3a80 0x3a80
+#define R_0x3a84 0x3a84
+#define R_0x3a88 0x3a88
+#define R_0x3a8c 0x3a8c
+#define R_0x3a90 0x3a90
+#define R_0x3a94 0x3a94
+#define R_0x3a98 0x3a98
+#define R_0x3a9c 0x3a9c
+#define R_0x3aa0 0x3aa0
+#define R_0x3aa4 0x3aa4
+#define R_0x40 0x40
+#define R_0x4000 0x4000
+#define R_0x4008 0x4008
+#define R_0x4018 0x4018
+#define R_0x401c 0x401c
+#define R_0x4028 0x4028
+#define R_0x4040 0x4040
+#define R_0x4044 0x4044
+#define R_0x4100 0x4100
+#define R_0x410c 0x410c
+#define R_0x4130 0x4130
+#define R_0x4134 0x4134
+#define R_0x4138 0x4138
+#define R_0x413c 0x413c
+#define R_0x4140 0x4140
+#define R_0x4144 0x4144
+#define R_0x4148 0x4148
+#define R_0x4160 0x4160
+#define R_0x4164 0x4164
+#define R_0x416c 0x416c
+#define R_0x419c 0x419c
+#define R_0x41a0 0x41a0
+#define R_0x41a4 0x41a4
+#define R_0x41a8 0x41a8
+#define R_0x41ac 0x41ac
+#define R_0x41e0 0x41e0
+#define R_0x41ec 0x41ec
+#define R_0x41f0 0x41f0
+#define R_0x41f8 0x41f8
+#define R_0x41fc 0x41fc
+#define R_0x42 0x42
+#define R_0x430 0x430
+#define R_0x434 0x434
+#define R_0x44 0x44
+#define R_0x444 0x444
+#define R_0x448 0x448
+#define R_0x450 0x450
+#define R_0x454 0x454
+#define R_0x49c 0x49c
+#define R_0x4a0 0x4a0
+#define R_0x4a4 0x4a4
+#define R_0x4a8 0x4a8
+#define R_0x4c 0x4c
+#define R_0x4c8 0x4c8
+#define R_0x4cc 0x4cc
+#define R_0x5000 0x5000
+#define R_0x5008 0x5008
+#define R_0x5018 0x5018
+#define R_0x501c 0x501c
+#define R_0x5028 0x5028
+#define R_0x5040 0x5040
+#define R_0x5044 0x5044
+#define R_0x5100 0x5100
+#define R_0x5108 0x5108
+#define R_0x5118 0x5118
+#define R_0x511c 0x511c
+#define R_0x5128 0x5128
+#define R_0x5140 0x5140
+#define R_0x5144 0x5144
+#define R_0x520 0x520
+#define R_0x5200 0x5200
+#define R_0x520c 0x520c
+#define R_0x522 0x522
+#define R_0x5230 0x5230
+#define R_0x5238 0x5238
+#define R_0x523c 0x523c
+#define R_0x5240 0x5240
+#define R_0x5244 0x5244
+#define R_0x5248 0x5248
+#define R_0x526c 0x526c
+#define R_0x52a0 0x52a0
+#define R_0x52a4 0x52a4
+#define R_0x52ac 0x52ac
+#define R_0x5300 0x5300
+#define R_0x530c 0x530c
+#define R_0x5330 0x5330
+#define R_0x5338 0x5338
+#define R_0x533c 0x533c
+#define R_0x5340 0x5340
+#define R_0x5344 0x5344
+#define R_0x5348 0x5348
+#define R_0x536c 0x536c
+#define R_0x53a0 0x53a0
+#define R_0x53a4 0x53a4
+#define R_0x53ac 0x53ac
+#define R_0x550 0x550
+#define R_0x551 0x551
+#define R_0x568 0x568
+#define R_0x588 0x588
+#define R_0x60 0x60
+#define R_0x604 0x604
+#define R_0x608 0x608
+#define R_0x60f 0x60f
+#define R_0x64 0x64
+#define R_0x66 0x66
+#define R_0x660 0x660
+#define R_0x668 0x668
+#define R_0x688 0x688
+#define R_0x6a0 0x6a0
+#define R_0x6d8 0x6d8
+#define R_0x6dc 0x6dc
+#define R_0x70 0x70
+#define R_0x74 0x74
+#define R_0x700 0x700
+#define R_0x764 0x764
+#define R_0x7b0 0x7b0
+#define R_0x7b4 0x7b4
+#define R_0x7c0 0x7c0
+#define R_0x7c4 0x7c4
+#define R_0x7c8 0x7c8
+#define R_0x7cc 0x7cc
+#define R_0x7f0 0x7f0
+#define R_0x7f4 0x7f4
+#define R_0x7f8 0x7f8
+#define R_0x7fc 0x7fc
+#define R_0x800 0x800
+#define R_0x804 0x804
+#define R_0x808 0x808
+#define R_0x80c 0x80c
+#define R_0x810 0x810
+#define R_0x814 0x814
+#define R_0x818 0x818
+#define R_0x81c 0x81c
+#define R_0x820 0x820
+#define R_0x824 0x824
+#define R_0x828 0x828
+#define R_0x82c 0x82c
+#define R_0x830 0x830
+#define R_0x834 0x834
+#define R_0x838 0x838
+#define R_0x83c 0x83c
+#define R_0x840 0x840
+#define R_0x844 0x840
+#define R_0x848 0x848
+#define R_0x84c 0x84c
+#define R_0x850 0x850
+#define R_0x854 0x854
+#define R_0x858 0x858
+#define R_0x85c 0x85c
+#define R_0x860 0x860
+#define R_0x864 0x864
+#define R_0x868 0x868
+#define R_0x86c 0x86c
+#define R_0x870 0x870
+#define R_0x874 0x874
+#define R_0x878 0x878
+#define R_0x87c 0x87c
+#define R_0x880 0x880
+#define R_0x884 0x884
+#define R_0x888 0x888
+#define R_0x88c 0x88c
+#define R_0x890 0x890
+#define R_0x894 0x894
+#define R_0x898 0x898
+#define R_0x89c 0x89c
+#define R_0x8a0 0x8a0
+#define R_0x8a4 0x8a4
+#define R_0x8ac 0x8ac
+#define R_0x8b4 0x8b4
+#define R_0x8c0 0x8c0
+#define R_0x8c4 0x8c4
+#define R_0x8c8 0x8c8
+#define R_0x8cc 0x8cc
+#define R_0x8d0 0x8d0
+#define R_0x8d4 0x8d4
+#define R_0x8d8 0x8d8
+#define R_0x8dc 0x8dc
+#define R_0x8f0 0x8f0
+#define R_0x8f8 0x8f8
+#define R_0x8fc 0x8fc
+#define R_0x900 0x900
+#define R_0x908 0x908
+#define R_0x90c 0x90c
+#define R_0x910 0x910
+#define R_0x914 0x914
+#define R_0x918 0x918
+#define R_0x91c 0x91c
+#define R_0x920 0x920
+#define R_0x924 0x924
+#define R_0x92c 0x92c
+#define R_0x930 0x930
+#define R_0x934 0x934
+#define R_0x938 0x938
+#define R_0x93c 0x93c
+#define R_0x940 0x940
+#define R_0x944 0x944
+#define R_0x948 0x948
+#define R_0x94c 0x94c
+#define R_0x950 0x950
+#define R_0x954 0x954
+#define R_0x958 0x958
+#define R_0x95c 0x95c
+#define R_0x960 0x960
+#define R_0x964 0x964
+#define R_0x968 0x968
+#define R_0x970 0x970
+#define R_0x974 0x974
+#define R_0x978 0x978
+#define R_0x97c 0x97c
+#define R_0x98c 0x98c
+#define R_0x990 0x990
+#define R_0x994 0x994
+#define R_0x998 0x998
+#define R_0x99c 0x99c
+#define R_0x9a0 0x9a0
+#define R_0x9a4 0x9a4
+#define R_0x9ac 0x9ac
+#define R_0x9b0 0x9b0
+#define R_0x9b4 0x9b4
+#define R_0x9b8 0x9b8
+#define R_0x9cc 0x9cc
+#define R_0x9d0 0x9d0
+#define R_0x9e4 0x9e4
+#define R_0xa0 0xa0
+#define R_0xa00 0xa00
+#define R_0xa04 0xa04
+#define R_0xa08 0xa08
+#define R_0xa0a 0xa0a
+#define R_0xa0c 0xa0c
+#define R_0xa10 0xa10
+#define R_0xa14 0xa14
+#define R_0xa20 0xa20
+#define R_0xa24 0xa24
+#define R_0xa28 0xa28
+#define R_0xa2c 0xa2c
+#define R_0xa40 0xa40
+#define R_0xa44 0xa44
+#define R_0xa48 0xa48
+#define R_0xa4c 0xa4c
+#define R_0xa50 0xa50
+#define R_0xa54 0xa54
+#define R_0xa58 0xa58
+#define R_0xa68 0xa68
+#define R_0xa70 0xa70
+#define R_0xa74 0xa74
+#define R_0xa78 0xa78
+#define R_0xa8 0xa8
+#define R_0xa80 0xa80
+#define R_0xa84 0xa84
+#define R_0xa98 0xa98
+#define R_0xa9c 0xa9c
+#define R_0xaa8 0xaa8
+#define R_0xaac 0xaac
+#define R_0xab4 0xab4
+#define R_0xabc 0xabc
+#define R_0xac8 0xac8
+#define R_0xacc 0xacc
+#define R_0xad0 0xad0
+#define R_0xb0 0xb0
+#define R_0xb00 0xb00
+#define R_0xb04 0xb04
+#define R_0xb07 0xb07
+#define R_0xb08 0xb08
+#define R_0xb0c 0xb0c
+#define R_0xb10 0xb10
+#define R_0xb14 0xb14
+#define R_0xb18 0xb18
+#define R_0xb1c 0xb1c
+#define R_0xb20 0xb20
+#define R_0xb24 0xb24
+#define R_0xb28 0xb28
+#define R_0xb2b 0xb2b
+#define R_0xb2c 0xb2c
+#define R_0xb30 0xb30
+#define R_0xb34 0xb34
+#define R_0xb38 0xb38
+#define R_0xb3c 0xb3c
+#define R_0xb40 0xb40
+#define R_0xb44 0xb44
+#define R_0xb48 0xb48
+#define R_0xb54 0xb54
+#define R_0xb58 0xb58
+#define R_0xb60 0xb60
+#define R_0xb64 0xb64
+#define R_0xb68 0xb68
+#define R_0xb6a 0xb6a
+#define R_0xb6c 0xb6c
+#define R_0xb6e 0xb6e
+#define R_0xb70 0xb70
+#define R_0xb74 0xb74
+#define R_0xb77 0xb77
+#define R_0xb78 0xb78
+#define R_0xb7c 0xb7c
+#define R_0xb80 0xb80
+#define R_0xb84 0xb84
+#define R_0xb88 0xb88
+#define R_0xb8c 0xb8c
+#define R_0xb90 0xb90
+#define R_0xb94 0xb94
+#define R_0xb98 0xb98
+#define R_0xb9b 0xb9b
+#define R_0xb9c 0xb9c
+#define R_0xba0 0xba0
+#define R_0xba4 0xba4
+#define R_0xba8 0xba8
+#define R_0xbac 0xbac
+#define R_0xbad 0xbad
+#define R_0xbc0 0xbc0
+#define R_0xbc4 0xbc4
+#define R_0xbc8 0xbc8
+#define R_0xbcc 0xbcc
+#define R_0xbd8 0xbd8
+#define R_0xbdc 0xbdc
+#define R_0xbe0 0xbe0
+#define R_0xbe4 0xbe4
+#define R_0xbe8 0xbe8
+#define R_0xbec 0xbec
+#define R_0xbf0 0xbf0
+#define R_0xbf4 0xbf4
+#define R_0xbf8 0xbf8
+#define R_0xc00 0xc00
+#define R_0xc04 0xc04
+#define R_0xc08 0xc08
+#define R_0xc0c 0xc0c
+#define R_0xc10 0xc10
+#define R_0xc14 0xc14
+#define R_0xc18 0xc18
+#define R_0xc1c 0xc1c
+#define R_0xc20 0xc20
+#define R_0xc24 0xc24
+#define R_0xc30 0xc30
+#define R_0xc38 0xc38
+#define R_0xc3c 0xc3c
+#define R_0xc40 0xc40
+#define R_0xc44 0xc44
+#define R_0xc4c 0xc4c
+#define R_0xc50 0xc50
+#define R_0xc54 0xc54
+#define R_0xc58 0xc58
+#define R_0xc5c 0xc5c
+#define R_0xc6c 0xc6c
+#define R_0xc70 0xc70
+#define R_0xc74 0xc74
+#define R_0xc78 0xc78
+#define R_0xc7c 0xc7c
+#define R_0xc80 0xc80
+#define R_0xc84 0xc84
+#define R_0xc88 0xc88
+#define R_0xc8c 0xc8c
+#define R_0xc90 0xc90
+#define R_0xc94 0xc94
+#define R_0xc9c 0xc9c
+#define R_0xca0 0xca0
+#define R_0xca4 0xca4
+#define R_0xca8 0xca8
+#define R_0xcac 0xcac
+#define R_0xcb0 0xcb0
+#define R_0xcb4 0xcb4
+#define R_0xcb8 0xcb8
+#define R_0xcbc 0xcbc
+#define R_0xcbd 0xcbd
+#define R_0xcbe 0xcbe
+#define R_0xcc4 0xcc4
+#define R_0xcc8 0xcc8
+#define R_0xccc 0xccc
+#define R_0xcd0 0xcd0
+#define R_0xcd4 0xcd4
+#define R_0xcd8 0xcd8
+#define R_0xce0 0xce0
+#define R_0xce4 0xce4
+#define R_0xce8 0xce8
+#define R_0xd00 0xd00
+#define R_0xd04 0xd04
+#define R_0xd08 0xd08
+#define R_0xd0c 0xd0c
+#define R_0xd10 0xd10
+#define R_0xd14 0xd14
+#define R_0xd2c 0xd2c
+#define R_0xd30 0xd30
+#define R_0xd40 0xd40
+#define R_0xd44 0xd44
+#define R_0xd48 0xd48
+#define R_0xd4c 0xd4c
+#define R_0xd50 0xd50
+#define R_0xd54 0xd54
+#define R_0xd5c 0xd5c
+#define R_0xd6c 0xd6c
+#define R_0xd7c 0xd7c
+#define R_0xd80 0xd80
+#define R_0xd84 0xd84
+#define R_0xd8c 0xd8c
+#define R_0xd90 0xd90
+#define R_0xd94 0xd94
+#define R_0xdac 0xdac
+#define R_0xdb0 0xdb0
+#define R_0xdb4 0xdb4
+#define R_0xdb8 0xdb8
+#define R_0xdbc 0xdbc
+#define R_0xdcc 0xdcc
+#define R_0xdd0 0xdd0
+#define R_0xdd4 0xdd4
+#define R_0xdd8 0xdd8
+#define R_0xde0 0xde0
+#define R_0xdec 0xdec
+#define R_0xdf4 0xdf4
+#define R_0xe00 0xe00
+#define R_0xe04 0xe04
+#define R_0xe08 0xe08
+#define R_0xe10 0xe10
+#define R_0xe14 0xe14
+#define R_0xe18 0xe18
+#define R_0xe1c 0xe1c
+#define R_0xe20 0xe20
+#define R_0xe24 0xe24
+#define R_0xe28 0xe28
+#define R_0xe30 0xe30
+#define R_0xe34 0xe34
+#define R_0xe38 0xe38
+#define R_0xe3c 0xe3c
+#define R_0xe40 0xe40
+#define R_0xe44 0xe44
+#define R_0xe48 0xe48
+#define R_0xe4c 0xe4c
+#define R_0xe50 0xe50
+#define R_0xe54 0xe54
+#define R_0xe5c 0xe5c
+#define R_0xe64 0xe64
+#define R_0xe6c 0xe6c
+#define R_0xe70 0xe70
+#define R_0xe74 0xe74
+#define R_0xe78 0xe78
+#define R_0xe7c 0xe7c
+#define R_0xe80 0xe80
+#define R_0xe84 0xe84
+#define R_0xe88 0xe88
+#define R_0xe8c 0xe8c
+#define R_0xe90 0xe90
+#define R_0xe94 0xe94
+#define R_0xe98 0xe98
+#define R_0xe9c 0xe9c
+#define R_0xea0 0xea0
+#define R_0xea4 0xea4
+#define R_0xea8 0xea8
+#define R_0xeac 0xeac
+#define R_0xeb0 0xeb0
+#define R_0xeb4 0xeb4
+#define R_0xeb8 0xeb8
+#define R_0xebc 0xebc
+#define R_0xec0 0xec0
+#define R_0xec4 0xec4
+#define R_0xec8 0xec8
+#define R_0xecc 0xecc
+#define R_0xed0 0xed0
+#define R_0xed4 0xed4
+#define R_0xed8 0xed8
+#define R_0xedc 0xedc
+#define R_0xee0 0xee0
+#define R_0xee8 0xee8
+#define R_0xeec 0xeec
+#define R_0xf0 0xf0
+#define R_0xf00 0xf00
+#define R_0xf04 0xf04
+#define R_0xf08 0xf08
+#define R_0xf0c 0xf0c
+#define R_0xf10 0xf10
+#define R_0xf14 0xf14
+#define R_0xf20 0xf20
+#define R_0xf2c 0xf2c
+#define R_0xf30 0xf30
+#define R_0xf34 0xf34
+#define R_0xf4 0xf4
+#define R_0xf44 0xf44
+#define R_0xf48 0xf48
+#define R_0xf4c 0xf4c
+#define R_0xf50 0xf50
+#define R_0xf54 0xf54
+#define R_0xf58 0xf58
+#define R_0xf5c 0xf5c
+#define R_0xf70 0xf70
+#define R_0xf74 0xf74
+#define R_0xf80 0xf80
+#define R_0xf84 0xf84
+#define R_0xf87 0xf87
+#define R_0xf88 0xf88
+#define R_0xf8c 0xf8c
+#define R_0xf90 0xf90
+#define R_0xf94 0xf94
+#define R_0xf98 0xf98
+#define R_0xfa0 0xfa0
+#define R_0xfa4 0xfa4
+#define R_0xfa8 0xfa8
+#define R_0xfac 0xfac
+#define R_0xfb0 0xfb0
+#define R_0xfb4 0xfb4
+#define R_0xfb8 0xfb8
+#define R_0xfbc 0xfbc
+#define R_0xfc0 0xfc0
+#define R_0xfc4 0xfc4
+#define R_0xfc8 0xfc8
+#define R_0xfcc 0xfcc
+#define R_0xfd0 0xfd0
+#define R_0xff0 0xff0
+#define RF_0x0 0x0
+#define RF_0x00 0x00
+#define RF_0x08 0x08
+#define RF_0x0c 0x0c
+#define RF_0x0d 0x0d
+#define RF_0x1 0x1
+#define RF_0x18 0x18
+#define RF_0x1a 0x1a
+#define RF_0x1bf0 0x1bf0
+#define RF_0x2 0x2
+#define RF_0x3 0x3
+#define RF_0x30 0x30
+#define RF_0x31 0x31
+#define RF_0x32 0x32
+#define RF_0x33 0x33
+#define RF_0x35 0x35
+#define RF_0x3e 0x3e
+#define RF_0x3f 0x3f
+#define RF_0x4 0x4
+#define RF_0x42 0x42
+#define RF_0x43 0x43
+#define RF_0x51 0x51
+#define RF_0x52 0x52
+#define RF_0x54 0x54
+#define RF_0x55 0x55
+#define RF_0x56 0x56
+#define RF_0x58 0x58
+#define RF_0x5c 0x5c
+#define RF_0x61 0x61
+#define RF_0x63 0x63
+#define RF_0x64 0x64
+#define RF_0x65 0x65
+#define RF_0x66 0x66
+#define RF_0x67 0x67
+#define RF_0x75 0x75
+#define RF_0x76 0x76
+#define RF_0x78 0x78
+#define RF_0x7f 0x7f
+#define RF_0x8 0x8
+#define RF_0x80 0x80
+#define RF_0x81 0x81
+#define RF_0x86 0x86
+#define RF_0x87 0x87
+#define RF_0x8a 0x8a
+#define RF_0x8d 0x8d
+#define RF_0x8f 0x8f
+#define RF_0xa9 0xa9
+#define RF_0xae 0xae
+#define RF_0xb0 0xb0
+#define RF_0xb3 0xb3
+#define RF_0xb4 0xb4
+#define RF_0xb8 0xb8
+#define RF_0xbc 0xbc
+#define RF_0xbe 0xbe
+#define RF_0xc4 0xc4
+#define RF_0xc9 0xc9
+#define RF_0xca 0xca
+#define RF_0xcc 0xcc
+#define RF_0xd 0xd
+#define RF_0xdd 0xdd
+#define RF_0xde 0xde
+#define RF_0xdf 0xdf
+#define RF_0xed 0xed
+#define RF_0xee 0xee
+#define RF_0xef 0xef
+#define RF_0xf5 0xf5
diff --git a/rtl8723DS/hal/phydm/phydm_rssi_monitor.c b/rtl8723DS/hal/phydm/phydm_rssi_monitor.c
index 1a1f6b0..0d5e417 100755..100644
--- a/rtl8723DS/hal/phydm/phydm_rssi_monitor.c
+++ b/rtl8723DS/hal/phydm/phydm_rssi_monitor.c
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2007 - 2017 Realtek Corporation.
+ * Copyright(c) 2007 - 2017  Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -8,452 +8,163 @@
  *
  * This program is distributed in the hope that it will be useful, but WITHOUT
  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  * more details.
  *
+ * The full GNU General Public License is included in this distribution in the
+ * file called LICENSE.
+ *
+ * Contact Information:
+ * wlanfae <wlanfae@realtek.com>
+ * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
+ * Hsinchu 300, Taiwan.
+ *
+ * Larry Finger <Larry.Finger@lwfinger.net>
+ *
  *****************************************************************************/
 
-/* ************************************************************
+/*@************************************************************
  * include files
- * ************************************************************ */
+ ************************************************************/
 
 #include "mp_precomp.h"
 #include "phydm_precomp.h"
- 
+
 #ifdef PHYDM_SUPPORT_RSSI_MONITOR
 
-#ifdef PHYDM_3RD_REFORM_RSSI_MONOTOR
-void
-phydm_rssi_monitor_h2c(
-	void	*p_dm_void,
-	u8	macid
-)
+void phydm_rssi_monitor_h2c(void *dm_void, u8 macid)
 {
-	struct PHY_DM_STRUCT		*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	struct _rate_adaptive_table_	*p_ra_t = &p_dm->dm_ra_table;
-	struct cmn_sta_info			*p_sta = p_dm->p_phydm_sta_info[macid];
-	struct ra_sta_info				*p_ra = NULL;
-	u8		h2c_val[H2C_MAX_LENGTH] = {0};
-	u8		stbc_en, ldpc_en;
-	u8		bf_en = 0;
-	u8		is_rx, is_tx;
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct ra_table *ra_t = &dm->dm_ra_table;
+	struct cmn_sta_info *sta = dm->phydm_sta_info[macid];
+	struct ra_sta_info *ra = NULL;
+	#ifdef CONFIG_BEAMFORMING
+	struct bf_cmn_info *bf = NULL;
+	#endif
+	u8 h2c[H2C_MAX_LENGTH] = {0};
+	u8 stbc_en, ldpc_en;
+	u8 bf_en = 0;
+	u8 is_rx, is_tx;
 
-	if (is_sta_active(p_sta)) {
-		p_ra = &(p_sta->ra_info);
+	if (is_sta_active(sta)) {
+		ra = &sta->ra_info;
 	} else {
-		PHYDM_DBG(p_dm, DBG_RSSI_MNTR, ("[Warning] %s invalid sta_info\n", __func__));
+		PHYDM_DBG(dm, DBG_RSSI_MNTR, "[Warning] %s\n", __func__);
 		return;
 	}
-	
-	PHYDM_DBG(p_dm, DBG_RSSI_MNTR, ("%s ======>\n", __func__));
-	PHYDM_DBG(p_dm, DBG_RSSI_MNTR, ("MACID=%d\n", p_sta->mac_id));
 
-	is_rx = (p_ra->txrx_state == RX_STATE) ? 1 : 0;
-	is_tx = (p_ra->txrx_state == TX_STATE) ? 1 : 0;
-	stbc_en = (p_sta->stbc_en) ? 1 : 0;
-	ldpc_en = (p_sta->ldpc_en) ? 1 : 0;
+	PHYDM_DBG(dm, DBG_RSSI_MNTR, "%s ======>\n", __func__);
+	PHYDM_DBG(dm, DBG_RSSI_MNTR, "MACID=%d\n", sta->mac_id);
+
+	is_rx = (ra->txrx_state == RX_STATE) ? 1 : 0;
+	is_tx = (ra->txrx_state == TX_STATE) ? 1 : 0;
+	stbc_en = (sta->stbc_en) ? 1 : 0;
+	ldpc_en = (sta->ldpc_en) ? 1 : 0;
 
 	#ifdef CONFIG_BEAMFORMING
-	if ((p_sta->bf_info.ht_beamform_cap & BEAMFORMING_HT_BEAMFORMEE_ENABLE) ||
-		(p_sta->bf_info.vht_beamform_cap & BEAMFORMING_VHT_BEAMFORMEE_ENABLE)) {
+	bf = &sta->bf_info;
+
+	if ((bf->ht_beamform_cap & BEAMFORMING_HT_BEAMFORMEE_ENABLE) ||
+	    (bf->vht_beamform_cap & BEAMFORMING_VHT_BEAMFORMEE_ENABLE))
 		bf_en = 1;
-	}
 	#endif
 
-	if (p_ra_t->RA_threshold_offset != 0) {
-		PHYDM_DBG(p_dm, DBG_RSSI_MNTR, ("RA_th_ofst = (( %s%d ))\n",
-			((p_ra_t->RA_offset_direction) ? "+" : "-"), p_ra_t->RA_threshold_offset));
-	}
-
-	h2c_val[0] = p_sta->mac_id;
-	h2c_val[1] = 0;
-	h2c_val[2] = p_sta->rssi_stat.rssi;
-	h2c_val[3] = is_rx | (stbc_en << 1) | ((p_dm->noisy_decision & 0x1) << 2) |  (bf_en << 6);
-	h2c_val[4] = (p_ra_t->RA_threshold_offset & 0x7f) | ((p_ra_t->RA_offset_direction & 0x1) << 7);
-	h2c_val[5] = 0;
-	h2c_val[6] = 0;
-
-	PHYDM_DBG(p_dm, DBG_RSSI_MNTR, ("PHYDM h2c[0x42]=0x%x %x %x %x %x %x %x\n",
-		h2c_val[6], h2c_val[5], h2c_val[4], h2c_val[3], h2c_val[2], h2c_val[1], h2c_val[0]));
-
-	#if (RTL8188E_SUPPORT == 1)
-	if (p_dm->support_ic_type == ODM_RTL8188E)
-		odm_ra_set_rssi_8188e(p_dm, (u8)(p_sta->mac_id & 0xFF), p_sta->rssi_stat.rssi & 0x7F);
+	PHYDM_DBG(dm, DBG_RSSI_MNTR, "RA_th_ofst=(( %s%d ))\n",
+		  ((ra_t->ra_ofst_direc) ? "+" : "-"), ra_t->ra_th_ofst);
+
+	h2c[0] = sta->mac_id;
+	h2c[1] = 0;
+	h2c[2] = sta->rssi_stat.rssi;
+	h2c[3] = is_rx | (stbc_en << 1) |
+		     ((dm->noisy_decision & 0x1) << 2) | (bf_en << 6);
+	h2c[4] = (ra_t->ra_th_ofst & 0x7f) |
+		     ((ra_t->ra_ofst_direc & 0x1) << 7);
+	h2c[5] = 0;
+	h2c[6] = 0;
+
+	PHYDM_DBG(dm, DBG_RSSI_MNTR, "PHYDM h2c[0x42]=0x%x %x %x %x %x %x %x\n",
+		  h2c[6], h2c[5], h2c[4], h2c[3], h2c[2], h2c[1], h2c[0]);
+
+	#if (RTL8188E_SUPPORT)
+	if (dm->support_ic_type == ODM_RTL8188E)
+		odm_ra_set_rssi_8188e(dm, sta->mac_id, sta->rssi_stat.rssi);
 	else
-	#endif 
+	#endif
 	{
-		odm_fill_h2c_cmd(p_dm, ODM_H2C_RSSI_REPORT, H2C_MAX_LENGTH, h2c_val);
+		odm_fill_h2c_cmd(dm, ODM_H2C_RSSI_REPORT, H2C_MAX_LENGTH, h2c);
 	}
 }
 
-void
-phydm_calculate_rssi_min_max(
-	void		*p_dm_void
-)
+void phydm_calculate_rssi_min_max(void *dm_void)
 {
-	struct PHY_DM_STRUCT	*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	struct cmn_sta_info		*p_sta;
-	s8	rssi_max_tmp = 0, rssi_min_tmp = 100;
-	u8	i;
-	u8	sta_cnt = 0;
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct cmn_sta_info *sta;
+	s8 rssi_max_tmp = 0, rssi_min_tmp = 100;
+	u8 i;
+	u8 sta_cnt = 0;
 
-	if (!p_dm->is_linked)
+	if (!dm->is_linked)
 		return;
 
-	PHYDM_DBG(p_dm, DBG_RSSI_MNTR, ("%s ======>\n", __func__));
+	PHYDM_DBG(dm, DBG_RSSI_MNTR, "%s ======>\n", __func__);
 
 	for (i = 0; i < ODM_ASSOCIATE_ENTRY_NUM; i++) {
-		p_sta = p_dm->p_phydm_sta_info[i];
-		if (is_sta_active(p_sta)) {
-
+		sta = dm->phydm_sta_info[i];
+		if (is_sta_active(sta)) {
 			sta_cnt++;
 
-			if (p_sta->rssi_stat.rssi < rssi_min_tmp)
-				rssi_min_tmp = p_sta->rssi_stat.rssi;
-
-			if (p_sta->rssi_stat.rssi > rssi_max_tmp)
-				rssi_max_tmp = p_sta->rssi_stat.rssi;
-
-			/*[Send RSSI to FW]*/
-			if (p_sta->ra_info.disable_ra == false)
-				phydm_rssi_monitor_h2c(p_dm, i);
-
-			if (sta_cnt == p_dm->number_linked_client)
-				break;
-		}
-	}
-
-	p_dm->rssi_max = (u8)rssi_max_tmp;
-	p_dm->rssi_min = (u8)rssi_min_tmp;
-
-}
-#endif
-
-
-#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
-
-s32
-phydm_find_minimum_rssi(
-	struct PHY_DM_STRUCT	*p_dm,
-	struct _ADAPTER			*p_adapter,
-	boolean					*p_is_link_temp
-
-)
-{
-	HAL_DATA_TYPE	*p_hal_data = GET_HAL_DATA(p_adapter);
-	PMGNT_INFO		p_mgnt_info = &(p_adapter->MgntInfo);
-	boolean			act_as_ap = ACTING_AS_AP(p_adapter);
-
-	/* 1.Determine the minimum RSSI */
-	if ((!p_mgnt_info->bMediaConnect) ||
-	    (act_as_ap && (p_hal_data->EntryMinUndecoratedSmoothedPWDB == 0))) {/* We should check AP mode and Entry info.into consideration, revised by Roger, 2013.10.18*/
-
-		p_hal_data->MinUndecoratedPWDBForDM = 0;
-		*p_is_link_temp = false;
-
-	} else
-		*p_is_link_temp = true;
-
-
-	if (p_mgnt_info->bMediaConnect) {	/* Default port*/
-
-		if (act_as_ap || p_mgnt_info->mIbss) {
-			p_hal_data->MinUndecoratedPWDBForDM = p_hal_data->EntryMinUndecoratedSmoothedPWDB;
-			/**/
-		} else {
-			p_hal_data->MinUndecoratedPWDBForDM = p_hal_data->UndecoratedSmoothedPWDB;
-			/**/
-		}
-	} else { /* associated entry pwdb*/
-		p_hal_data->MinUndecoratedPWDBForDM = p_hal_data->EntryMinUndecoratedSmoothedPWDB;
-		/**/
-	}
-
-	return p_hal_data->MinUndecoratedPWDBForDM;
-}
-
-void
-odm_rssi_monitor_check_mp(
-	void	*p_dm_void
-)
-{
-	struct PHY_DM_STRUCT		*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	struct _rate_adaptive_table_			*p_ra_table = &p_dm->dm_ra_table;
-	u8			h2c_parameter[H2C_0X42_LENGTH] = {0};
-	u32			i;
-	boolean			is_ext_ra_info = true;
-	u8			cmdlen = H2C_0X42_LENGTH;
-	u8			tx_bf_en = 0, stbc_en = 0;
-
-	struct _ADAPTER		*adapter = p_dm->adapter;
-	HAL_DATA_TYPE	*p_hal_data = GET_HAL_DATA(adapter);
-	struct sta_info		*p_entry = NULL;
-	s32			tmp_entry_max_pwdb = 0, tmp_entry_min_pwdb = 0xff;
-	PMGNT_INFO		p_mgnt_info = &adapter->MgntInfo;
-	PMGNT_INFO		p_default_mgnt_info = &adapter->MgntInfo;
-	u64			cur_tx_ok_cnt = 0, cur_rx_ok_cnt = 0;
-#if (BEAMFORMING_SUPPORT == 1)
-#ifndef BEAMFORMING_VERSION_1
-	enum beamforming_cap beamform_cap = BEAMFORMING_CAP_NONE;
-#endif
-#endif
-	struct _ADAPTER	*p_loop_adapter = GetDefaultAdapter(adapter);
-
-	if (p_dm->support_ic_type == ODM_RTL8188E) {
-		is_ext_ra_info = false;
-		cmdlen = 3;
-	}
-
-	while (p_loop_adapter) {
-
-		if (p_loop_adapter != NULL) {
-			p_mgnt_info = &p_loop_adapter->MgntInfo;
-			cur_tx_ok_cnt = p_loop_adapter->TxStats.NumTxBytesUnicast - p_mgnt_info->lastTxOkCnt;
-			cur_rx_ok_cnt = p_loop_adapter->RxStats.NumRxBytesUnicast - p_mgnt_info->lastRxOkCnt;
-			p_mgnt_info->lastTxOkCnt = cur_tx_ok_cnt;
-			p_mgnt_info->lastRxOkCnt = cur_rx_ok_cnt;
-		}
-
-		for (i = 0; i < ASSOCIATE_ENTRY_NUM; i++) {
-
-			if (IsAPModeExist(p_loop_adapter)) {
-				if (GetFirstExtAdapter(p_loop_adapter) != NULL &&
-				    GetFirstExtAdapter(p_loop_adapter) == p_loop_adapter)
-				p_entry = AsocEntry_EnumStation(p_loop_adapter, i);
-				else if (GetFirstGOPort(p_loop_adapter) != NULL &&
-					 IsFirstGoAdapter(p_loop_adapter))
-				p_entry = AsocEntry_EnumStation(p_loop_adapter, i);
-			} else {
-				if (GetDefaultAdapter(p_loop_adapter) == p_loop_adapter)
-					p_entry = AsocEntry_EnumStation(p_loop_adapter, i);
+			if (sta->rssi_stat.rssi < rssi_min_tmp) {
+				rssi_min_tmp = sta->rssi_stat.rssi;
+				dm->rssi_min_macid = i;
 			}
 
-			if (p_entry != NULL) {
-				if (p_entry->bAssociated) {
-
-					RT_DISP_ADDR(FDM, DM_PWDB, ("p_entry->mac_addr ="), GET_STA_INFO(p_entry).mac_addr);
-					RT_DISP(FDM, DM_PWDB, ("p_entry->rssi = 0x%x(%d)\n",
-						GET_STA_INFO(p_entry).rssi_stat.rssi, GET_STA_INFO(p_entry).rssi_stat.rssi));
-
-					/* 2 BF_en */
-#if (BEAMFORMING_SUPPORT == 1)
-#ifndef BEAMFORMING_VERSION_1
-					beamform_cap = phydm_beamforming_get_entry_beam_cap_by_mac_id(p_dm, GET_STA_INFO(p_entry).mac_id);
-					if (beamform_cap & (BEAMFORMER_CAP_HT_EXPLICIT | BEAMFORMER_CAP_VHT_SU))
-						tx_bf_en = 1;
-#else
-					if (Beamform_GetSupportBeamformerCap(GetDefaultAdapter(adapter), p_entry))
-						tx_bf_en = 1;
-#endif
-#endif
-					/* 2 STBC_en */
-					if ((IS_WIRELESS_MODE_AC(adapter) && TEST_FLAG(p_entry->VHTInfo.STBC, STBC_VHT_ENABLE_TX)) ||
-						TEST_FLAG(p_entry->HTInfo.STBC, STBC_HT_ENABLE_TX))
-						stbc_en = 1;
-
-					if (GET_STA_INFO(p_entry).rssi_stat.rssi < tmp_entry_min_pwdb)
-						tmp_entry_min_pwdb = GET_STA_INFO(p_entry).rssi_stat.rssi;
-					if (GET_STA_INFO(p_entry).rssi_stat.rssi > tmp_entry_max_pwdb)
-						tmp_entry_max_pwdb = GET_STA_INFO(p_entry).rssi_stat.rssi;
-
-					h2c_parameter[4] = (p_ra_table->RA_threshold_offset & 0x7f) | (p_ra_table->RA_offset_direction << 7);
-					PHYDM_DBG(p_dm, DBG_RSSI_MNTR, ("RA_threshold_offset = (( %s%d ))\n", ((p_ra_table->RA_threshold_offset == 0) ? " " : ((p_ra_table->RA_offset_direction) ? "+" : "-")), p_ra_table->RA_threshold_offset));
-
-					if (is_ext_ra_info) {
-						if (cur_rx_ok_cnt > (cur_tx_ok_cnt * 6))
-							h2c_parameter[3] |= RAINFO_BE_RX_STATE;
-
-						if (tx_bf_en)
-							h2c_parameter[3] |= RAINFO_BF_STATE;
-						else {
-							if (stbc_en)
-								h2c_parameter[3] |= RAINFO_STBC_STATE;
-						}
-
-						if (p_dm->noisy_decision)
-							h2c_parameter[3] |= RAINFO_NOISY_STATE;
-						else
-							h2c_parameter[3] &= (~RAINFO_NOISY_STATE);
-
-						if (p_dm->h2c_rarpt_connect) {
-							h2c_parameter[3] |= RAINFO_INIT_RSSI_RATE_STATE;
-							PHYDM_DBG(p_dm, DBG_RSSI_MNTR, ("h2c_rarpt_connect = (( %d ))\n", p_dm->h2c_rarpt_connect));
-						}
-
-					}
-
-					h2c_parameter[2] = (u8)(GET_STA_INFO(p_entry).rssi_stat.rssi & 0xFF);
-					/* h2c_parameter[1] = 0x20;*/ /* fw v12 cmdid 5:use max macid ,for nic ,default macid is 0 ,max macid is 1 */
-					h2c_parameter[0] = (GET_STA_INFO(p_entry).mac_id);
-
-					odm_fill_h2c_cmd(p_dm, ODM_H2C_RSSI_REPORT, cmdlen, h2c_parameter);
-				}
-			} else
-				break;
-		}
-
-		p_loop_adapter = GetNextExtAdapter(p_loop_adapter);
-	}
-
-
-	/*Default port*/
-	if (tmp_entry_max_pwdb != 0) {	/* If associated entry is found */
-		p_hal_data->EntryMaxUndecoratedSmoothedPWDB = tmp_entry_max_pwdb;
-		RT_DISP(FDM, DM_PWDB, ("EntryMaxPWDB = 0x%x(%d)\n",	tmp_entry_max_pwdb, tmp_entry_max_pwdb));
-	} else
-		p_hal_data->EntryMaxUndecoratedSmoothedPWDB = 0;
-
-	if (tmp_entry_min_pwdb != 0xff) { /* If associated entry is found */
-		p_hal_data->EntryMinUndecoratedSmoothedPWDB = tmp_entry_min_pwdb;
-		RT_DISP(FDM, DM_PWDB, ("EntryMinPWDB = 0x%x(%d)\n", tmp_entry_min_pwdb, tmp_entry_min_pwdb));
-
-	} else
-		p_hal_data->EntryMinUndecoratedSmoothedPWDB = 0;
-
-	/* Default porti sent RSSI to FW */
-	if (p_hal_data->bUseRAMask) {
-		PHYDM_DBG(p_dm, DBG_RSSI_MNTR, ("1 RA First Link, RSSI[%d] = ((%d)) , ra_rpt_linked = ((%d))\n",
-			WIN_DEFAULT_PORT_MACID, p_hal_data->UndecoratedSmoothedPWDB, p_hal_data->ra_rpt_linked));
-		if (p_hal_data->UndecoratedSmoothedPWDB > 0) {
-
-			PRT_HIGH_THROUGHPUT			p_ht_info = GET_HT_INFO(p_default_mgnt_info);
-			PRT_VERY_HIGH_THROUGHPUT	p_vht_info = GET_VHT_INFO(p_default_mgnt_info);
-
-			/* BF_en*/
-#if (BEAMFORMING_SUPPORT == 1)
-#ifndef BEAMFORMING_VERSION_1
-			beamform_cap = phydm_beamforming_get_entry_beam_cap_by_mac_id(p_dm, p_default_mgnt_info->m_mac_id);
-
-			if (beamform_cap & (BEAMFORMER_CAP_HT_EXPLICIT | BEAMFORMER_CAP_VHT_SU))
-				tx_bf_en = 1;
-#else
-			if (Beamform_GetSupportBeamformerCap(GetDefaultAdapter(adapter), NULL))
-				tx_bf_en = 1;
-#endif
-#endif
-
-			/* STBC_en*/
-			if ((IS_WIRELESS_MODE_AC(adapter) && TEST_FLAG(p_vht_info->VhtCurStbc, STBC_VHT_ENABLE_TX)) ||
-			    TEST_FLAG(p_ht_info->HtCurStbc, STBC_HT_ENABLE_TX))
-				stbc_en = 1;
-
-			h2c_parameter[4] = (p_ra_table->RA_threshold_offset & 0x7f) | (p_ra_table->RA_offset_direction << 7);
-			PHYDM_DBG(p_dm, DBG_RSSI_MNTR, ("RA_threshold_offset = (( %s%d ))\n", ((p_ra_table->RA_threshold_offset == 0) ? " " : ((p_ra_table->RA_offset_direction) ? "+" : "-")), p_ra_table->RA_threshold_offset));
-
-			if (is_ext_ra_info) {
-				if (tx_bf_en)
-					h2c_parameter[3] |= RAINFO_BF_STATE;
-				else {
-					if (stbc_en)
-						h2c_parameter[3] |= RAINFO_STBC_STATE;
-				}
-
-				if (p_dm->h2c_rarpt_connect) {
-					h2c_parameter[3] |= RAINFO_INIT_RSSI_RATE_STATE;
-					PHYDM_DBG(p_dm, DBG_RSSI_MNTR, ("h2c_rarpt_connect = (( %d ))\n", p_dm->h2c_rarpt_connect));
-				}
-
-
-				if (p_dm->noisy_decision == 1) {
-					h2c_parameter[3] |= RAINFO_NOISY_STATE;
-					PHYDM_DBG(p_dm, DBG_RSSI_MNTR, ("[RSSIMonitorCheckMP] Send H2C to FW\n"));
-				} else
-					h2c_parameter[3] &= (~RAINFO_NOISY_STATE);
-
-				PHYDM_DBG(p_dm, DBG_RSSI_MNTR, ("[RSSIMonitorCheckMP] h2c_parameter=%x\n", h2c_parameter[3]));
+			if (sta->rssi_stat.rssi > rssi_max_tmp) {
+				rssi_max_tmp = sta->rssi_stat.rssi;
+				dm->rssi_max_macid = i;
 			}
 
-			h2c_parameter[2] = (u8)(p_hal_data->UndecoratedSmoothedPWDB & 0xFF);
-			/*h2c_parameter[1] = 0x20;*/	/* fw v12 cmdid 5:use max macid ,for nic ,default macid is 0 ,max macid is 1*/
-			h2c_parameter[0] = WIN_DEFAULT_PORT_MACID;		/* fw v12 cmdid 5:use max macid ,for nic ,default macid is 0 ,max macid is 1*/
-
-			odm_fill_h2c_cmd(p_dm, ODM_H2C_RSSI_REPORT, cmdlen, h2c_parameter);
-		}
-	
-	} else
-		PlatformEFIOWrite1Byte(adapter, 0x4fe, (u8)p_hal_data->UndecoratedSmoothedPWDB);
-
-	{
-		struct _ADAPTER *p_loop_adapter = GetDefaultAdapter(adapter);
-		boolean		default_pointer_value, *p_is_link_temp = &default_pointer_value;
-		s32	global_rssi_min = 0xFF, local_rssi_min;
-		boolean		is_link = false;
-
-		while (p_loop_adapter) {
-			local_rssi_min = phydm_find_minimum_rssi(p_dm, p_loop_adapter, p_is_link_temp);
-			/* dbg_print("p_hal_data->is_linked=%d, local_rssi_min=%d\n", p_hal_data->is_linked, local_rssi_min); */
-
-			if (*p_is_link_temp)
-				is_link = true;
+			/*@[Send RSSI to FW]*/
+			if (!sta->ra_info.disable_ra)
+				phydm_rssi_monitor_h2c(dm, i);
 
-			if ((local_rssi_min < global_rssi_min) && (*p_is_link_temp))
-				global_rssi_min = local_rssi_min;
-
-			p_loop_adapter = GetNextExtAdapter(p_loop_adapter);
+			if (sta_cnt == dm->number_linked_client)
+				break;
 		}
-
-		p_hal_data->bLinked = is_link;
-
-		p_dm->is_linked = is_link;
-		p_dm->rssi_min = (u8)((is_link) ? global_rssi_min : 0);
-
 	}
+	dm->pre_rssi_min = dm->rssi_min;
 
-
+	dm->rssi_max = (u8)rssi_max_tmp;
+	dm->rssi_min = (u8)rssi_min_tmp;
 }
 
-#endif
-
-void
-phydm_rssi_monitor_check(
-	void		*p_dm_void
-)
+void phydm_rssi_monitor_check(void *dm_void)
 {
-	struct PHY_DM_STRUCT		*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
 
-	if (!(p_dm->support_ability & ODM_BB_RSSI_MONITOR))
+	if (!(dm->support_ability & ODM_BB_RSSI_MONITOR))
 		return;
 
-	if ((p_dm->phydm_sys_up_time % 2) == 1) /*for AP watchdog period = 1 sec*/
+	/*@for AP watchdog period = 1 sec*/
+	if ((dm->phydm_sys_up_time % 2) == 1)
 		return;
 
-	PHYDM_DBG(p_dm, DBG_RSSI_MNTR, ("%s ======>\n", __func__));
+	PHYDM_DBG(dm, DBG_RSSI_MNTR, "%s ======>\n", __func__);
 
-#ifdef PHYDM_3RD_REFORM_RSSI_MONOTOR
-	phydm_calculate_rssi_min_max(p_dm);
-#else
-	#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
-	odm_rssi_monitor_check_mp(p_dm);
-	#endif
-#endif
-
-	PHYDM_DBG(p_dm, DBG_RSSI_MNTR, ("RSSI {max, min} = {%d, %d}\n",
-		p_dm->rssi_max, p_dm->rssi_min));
+	phydm_calculate_rssi_min_max(dm);
 
+	PHYDM_DBG(dm, DBG_RSSI_MNTR, "RSSI {max, min} = {%d, %d}\n",
+		  dm->rssi_max, dm->rssi_min);
 }
 
-void
-phydm_rssi_monitor_init(
-	void		*p_dm_void
-)
+void phydm_rssi_monitor_init(void *dm_void)
 {
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct ra_table *ra_tab = &dm->dm_ra_table;
 
-	struct PHY_DM_STRUCT		*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	struct _rate_adaptive_table_	*p_ra_table = &p_dm->dm_ra_table;
-#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN))
-	struct _ADAPTER		*adapter = p_dm->adapter;
-	HAL_DATA_TYPE		*p_hal_data = GET_HAL_DATA(adapter);
-
-	p_ra_table->PT_collision_pre = true;	/*used in odm_dynamic_arfb_select(WIN only)*/
-
-	p_hal_data->UndecoratedSmoothedPWDB = -1;
-	p_hal_data->ra_rpt_linked = false;
-#endif
-
-	p_ra_table->firstconnect = false;
-	p_dm->rssi_max = 0;
-	p_dm->rssi_min = 0;
-
+	ra_tab->firstconnect = false;
+	dm->pre_rssi_min = 0;
+	dm->rssi_max = 0;
+	dm->rssi_min = 0;
 }
 
 #endif
diff --git a/rtl8723DS/hal/phydm/phydm_rssi_monitor.h b/rtl8723DS/hal/phydm/phydm_rssi_monitor.h
index 9aef3cc..ac997e3 100755..100644
--- a/rtl8723DS/hal/phydm/phydm_rssi_monitor.h
+++ b/rtl8723DS/hal/phydm/phydm_rssi_monitor.h
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2007 - 2017 Realtek Corporation.
+ * Copyright(c) 2007 - 2017  Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -8,58 +8,48 @@
  *
  * This program is distributed in the hope that it will be useful, but WITHOUT
  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  * more details.
  *
+ * The full GNU General Public License is included in this distribution in the
+ * file called LICENSE.
+ *
+ * Contact Information:
+ * wlanfae <wlanfae@realtek.com>
+ * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
+ * Hsinchu 300, Taiwan.
+ *
+ * Larry Finger <Larry.Finger@lwfinger.net>
+ *
  *****************************************************************************/
 
+#ifndef __PHYDM_RSSI_MONITOR_H__
+#define __PHYDM_RSSI_MONITOR_H__
 
-#ifndef	__PHYDM_RSSI_MONITOR_H__
-#define    __PHYDM_RSSI_MONITOR_H__
+#define RSSI_MONITOR_VERSION "2.0"
 
-#define RSSI_MONITOR_VERSION	"1.0"		/* 2017.05.011  Dino, Add phydm_rssi_monitor.h*/
-
-
-/* 1 ============================================================
+/* @1 ============================================================
  * 1  Definition
- * 1 ============================================================ */
-
-#define	H2C_0X42_LENGTH	5
+ * 1 ============================================================
+ */
 
-#define RAINFO_BE_RX_STATE				BIT(0)	/* 1:RX*/ /* ULDL */
-#define RAINFO_STBC_STATE				BIT(1)
-#define RAINFO_NOISY_STATE 			BIT(2)	/* set by Noisy_Detection */
-/*#define RAINFO_SHURTCUT_STATE			BIT(3)*/
-/*#define RAINFO_SHURTCUT_FLAG			BIT(4)*/
-#define RAINFO_INIT_RSSI_RATE_STATE	BIT(5)
-#define RAINFO_BF_STATE				BIT(6)
-#define RAINFO_BE_TX_STATE 			BIT(7)	/* 1:TX */
-
-/* 1 ============================================================
+/* @1 ============================================================
  * 1  structure
- * 1 ============================================================ */
-
-
+ * 1 ============================================================
+ */
 
-
-/* 1 ============================================================
+/* @1 ============================================================
  * 1  enumeration
- * 1 ============================================================ */
-
-
+ * 1 ============================================================
+ */
 
-/* 1 ============================================================
+/* @1 ============================================================
  * 1  function prototype
- * 1 ============================================================ */
+ * 1 ============================================================
+ */
 
-void
-phydm_rssi_monitor_check(
-	void		*p_dm_void
-);
+void phydm_rssi_monitor_check(void *dm_void);
 
-void
-phydm_rssi_monitor_init(
-	void		*p_dm_void
-);
+void phydm_rssi_monitor_init(void *dm_void);
 
 #endif
diff --git a/rtl8723DS/hal/phydm/phydm_smt_ant.c b/rtl8723DS/hal/phydm/phydm_smt_ant.c
index ec8a9a8..8e805b3 100755..100644
--- a/rtl8723DS/hal/phydm/phydm_smt_ant.c
+++ b/rtl8723DS/hal/phydm/phydm_smt_ant.c
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2007 - 2017 Realtek Corporation.
+ * Copyright(c) 2007 - 2017  Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -8,9 +8,19 @@
  *
  * This program is distributed in the hope that it will be useful, but WITHOUT
  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  * more details.
  *
+ * The full GNU General Public License is included in this distribution in the
+ * file called LICENSE.
+ *
+ * Contact Information:
+ * wlanfae <wlanfae@realtek.com>
+ * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
+ * Hsinchu 300, Taiwan.
+ *
+ * Larry Finger <Larry.Finger@lwfinger.net>
+ *
  *****************************************************************************/
 
 /* ************************************************************
@@ -20,286 +30,305 @@
 #include "mp_precomp.h"
 #include "phydm_precomp.h"
 
-/* ******************************************************
+/*******************************************************
  * when antenna test utility is on or some testing need to disable antenna diversity
  * call this function to disable all ODM related mechanisms which will switch antenna.
- * ****************************************************** */
+ ******************************************************/
 #if (defined(CONFIG_SMART_ANTENNA))
+
+#ifdef PHYDM_IC_JGR3_SERIES_SUPPORT
+#if (RTL8198F_SUPPORT == 1)
+void phydm_smt_ant_init_98f(void *dm_void)
+{
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	u32 val = 0;
+
+	#if 0
+	odm_set_bb_reg(dm, R_0x1da4, 0x3c, 4); /*6.25*4 = 25ms*/
+	odm_set_bb_reg(dm, R_0x1da4, BIT(6), 1);
+	odm_set_bb_reg(dm, R_0x1da4, BIT(7), 1);
+	#endif
+}
+#endif
+#endif
+
 #if (defined(CONFIG_CUMITEK_SMART_ANTENNA))
-void
-phydm_cumitek_smt_ant_mapping_table_8822b(
-	void		*p_dm_void,
-	u8		*table_path_a,
-	u8		*table_path_b
-)
+void phydm_cumitek_smt_ant_mapping_table_8822b(
+	void *dm_void,
+	u8 *table_path_a,
+	u8 *table_path_b)
 {
-	struct	PHY_DM_STRUCT		*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	u32		path_a_0to3_idx = 0;
-	u32		path_b_0to3_idx = 0;
-	u32		path_a_4to7_idx = 0;
-	u32		path_b_4to7_idx = 0;
-	
-	path_a_0to3_idx = ((table_path_a[3] & 0xf) << 24) | ((table_path_a[2] & 0xf) << 16) 
-						| ((table_path_a[1] & 0xf) << 8) | (table_path_a[0] & 0xf);
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	u32 path_a_0to3_idx = 0;
+	u32 path_b_0to3_idx = 0;
+	u32 path_a_4to7_idx = 0;
+	u32 path_b_4to7_idx = 0;
 
-	path_b_0to3_idx = ((table_path_b[3] & 0xf) << 28) | ((table_path_b[2] & 0xf) << 20) 
-						| ((table_path_b[1] & 0xf) << 12) | ((table_path_b[0] & 0xf) << 4);
+	path_a_0to3_idx = ((table_path_a[3] & 0xf) << 24) | ((table_path_a[2] & 0xf) << 16) | ((table_path_a[1] & 0xf) << 8) | (table_path_a[0] & 0xf);
 
-	path_a_4to7_idx = ((table_path_a[7] & 0xf) << 24) | ((table_path_a[6] & 0xf) << 16) 
-						| ((table_path_a[5] & 0xf) << 8) | (table_path_a[4] & 0xf);
+	path_b_0to3_idx = ((table_path_b[3] & 0xf) << 28) | ((table_path_b[2] & 0xf) << 20) | ((table_path_b[1] & 0xf) << 12) | ((table_path_b[0] & 0xf) << 4);
 
-	path_b_4to7_idx = ((table_path_b[7] & 0xf) << 28) | ((table_path_b[6] & 0xf) << 20) 
-						| ((table_path_b[5] & 0xf) << 12) | ((table_path_b[4] & 0xf) << 4);
+	path_a_4to7_idx = ((table_path_a[7] & 0xf) << 24) | ((table_path_a[6] & 0xf) << 16) | ((table_path_a[5] & 0xf) << 8) | (table_path_a[4] & 0xf);
 
+	path_b_4to7_idx = ((table_path_b[7] & 0xf) << 28) | ((table_path_b[6] & 0xf) << 20) | ((table_path_b[5] & 0xf) << 12) | ((table_path_b[4] & 0xf) << 4);
 
-	/*PHYDM_DBG(p_dm, DBG_SMT_ANT, ("mapping table{A, B} = {0x%x, 0x%x}\n", path_a_0to3_idx, path_b_0to3_idx));*/
+#if 0
+	/*PHYDM_DBG(dm, DBG_SMT_ANT, "mapping table{A, B} = {0x%x, 0x%x}\n", path_a_0to3_idx, path_b_0to3_idx);*/
+#endif
 
 	/*pathA*/
-	odm_set_bb_reg(p_dm, 0xca4, MASKDWORD, path_a_0to3_idx); /*ant map 1*/
-	odm_set_bb_reg(p_dm, 0xca8, MASKDWORD, path_a_4to7_idx); /*ant map 2*/
+	odm_set_bb_reg(dm, R_0xca4, MASKDWORD, path_a_0to3_idx); /*@ant map 1*/
+	odm_set_bb_reg(dm, R_0xca8, MASKDWORD, path_a_4to7_idx); /*@ant map 2*/
 
 	/*pathB*/
-	odm_set_bb_reg(p_dm, 0xea4, MASKDWORD, path_b_0to3_idx); /*ant map 1*/
-	odm_set_bb_reg(p_dm, 0xea8, MASKDWORD, path_b_4to7_idx); /*ant map 2*/
-
+	odm_set_bb_reg(dm, R_0xea4, MASKDWORD, path_b_0to3_idx); /*@ant map 1*/
+	odm_set_bb_reg(dm, R_0xea8, MASKDWORD, path_b_4to7_idx); /*@ant map 2*/
 }
 
-
-void
-phydm_cumitek_smt_ant_init_8822b(
-	void		*p_dm_void
-)
+void phydm_cumitek_smt_ant_init_8822b(
+	void *dm_void)
 {
-	struct	PHY_DM_STRUCT		*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	struct	smt_ant				*p_smtant_table = &(p_dm->smtant_table);
-	struct	smt_ant_cumitek		*p_cumi_smtant_table = &(p_dm->smtant_table.cumi_smtant_table);
-	u32		value32;
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct smt_ant *smtant_table = &dm->smtant_table;
+	struct smt_ant_cumitek *cumi_smtant_table = &dm->smtant_table.cumi_smtant_table;
+	u32 value32;
 
-	PHYDM_DBG(p_dm, DBG_SMT_ANT, ("[8822B Cumitek SmtAnt Int]\n"));
+	PHYDM_DBG(dm, DBG_SMT_ANT, "[8822B Cumitek SmtAnt Int]\n");
+
+	/*@========= MAC GPIO setting =================================*/
 
-	/*========= MAC GPIO setting =================================*/
-	
 	/* Pin, pin_name, RFE_CTRL_NUM*/
-	
-	/* A0, 55, 5G_TRSW, 3*/
-	/* A1, 52, 5G_TRSW, 0*/
-	/* A2, 25, 5G_TRSW, 8*/
-	
-	/* B0, 16, 5G_TRSW, 4*/
-	/* B1, 13, 5G_TRSW, 11*/
-	/* B2, 24, 5G_TRSW, 9*/
 
-	/*for RFE_CTRL 8 & 9*/
-	odm_set_mac_reg(p_dm, 0x4c, BIT(24) | BIT(23), 2);
-	odm_set_mac_reg(p_dm, 0x44, BIT(27) | BIT(26), 0);
+	/* @A0, 55, 5G_TRSW, 3*/
+	/* @A1, 52, 5G_TRSW, 0*/
+	/* @A2, 25, 5G_TRSW, 8*/
 
-	/*for RFE_CTRL 0*/
-	odm_set_mac_reg(p_dm, 0x4c, BIT(25), 0);
-	odm_set_mac_reg(p_dm, 0x64, BIT(29), 1);
+	/* @B0, 16, 5G_TRSW, 4*/
+	/* @B1, 13, 5G_TRSW, 11*/
+	/* @B2, 24, 5G_TRSW, 9*/
 
-	/*for RFE_CTRL 2 & 3*/
-	odm_set_mac_reg(p_dm, 0x4c, BIT(26), 0);
-	odm_set_mac_reg(p_dm, 0x64, BIT(28), 1);
+	/*@for RFE_CTRL 8 & 9*/
+	odm_set_mac_reg(dm, R_0x4c, BIT(24) | BIT(23), 2);
+	odm_set_mac_reg(dm, R_0x44, BIT(27) | BIT(26), 0);
 
-	/*for RFE_CTRL 11*/
-	odm_set_mac_reg(p_dm, 0x40, BIT(3), 1);
+	/*@for RFE_CTRL 0*/
+	odm_set_mac_reg(dm, R_0x4c, BIT(25), 0);
+	odm_set_mac_reg(dm, R_0x64, BIT(29), 1);
 
+	/*@for RFE_CTRL 2 & 3*/
+	odm_set_mac_reg(dm, R_0x4c, BIT(26), 0);
+	odm_set_mac_reg(dm, R_0x64, BIT(28), 1);
 
-	/*0x604[25]=1 : 2bit mode for pathA&B&C&D*/
-	/*0x604[25]=0 : 3bit mode for pathA&B*/
-	p_smtant_table->tx_desc_mode = 0;
-	odm_set_mac_reg(p_dm, 0x604, BIT(25), (u32)p_smtant_table->tx_desc_mode);
+	/*@for RFE_CTRL 11*/
+	odm_set_mac_reg(dm, R_0x40, BIT(3), 1);
 
-	/*========= BB RFE setting =================================*/
-	#if 0
+	/*@0x604[25]=1 : 2bit mode for pathA&B&C&D*/
+	/*@0x604[25]=0 : 3bit mode for pathA&B*/
+	smtant_table->tx_desc_mode = 0;
+	odm_set_mac_reg(dm, R_0x604, BIT(25), (u32)smtant_table->tx_desc_mode);
+
+	/*@========= BB RFE setting =================================*/
+#if 0
 	/*path A*/
-	odm_set_bb_reg(p_dm, 0x1990, BIT(3), 0);		/*RFE_CTRL_3*/ /*A_0*/
-	odm_set_bb_reg(p_dm, 0xcbc, BIT(3), 0);		/*inv*/
-	odm_set_bb_reg(p_dm, 0xcb0, 0xf000, 8);
-
-	odm_set_bb_reg(p_dm, 0x1990, BIT(1), 0);		/*RFE_CTRL_0*/ /*A_1*/
-	odm_set_bb_reg(p_dm, 0xcbc, BIT(0), 0);		/*inv*/
-	odm_set_bb_reg(p_dm, 0xcb0, 0xf, 0x9);
-	
-	odm_set_bb_reg(p_dm, 0x1990, BIT(8), 0);		/*RFE_CTRL_8*/ /*A_2*/
-	odm_set_bb_reg(p_dm, 0xcbc, BIT(8), 0);		/*inv*/
-	odm_set_bb_reg(p_dm, 0xcb4, 0xf, 0xa);
-	
+	odm_set_bb_reg(dm, R_0x1990, BIT(3), 0);		/*RFE_CTRL_3*/ /*A_0*/
+	odm_set_bb_reg(dm, R_0xcbc, BIT(3), 0);		/*@inv*/
+	odm_set_bb_reg(dm, R_0xcb0, 0xf000, 8);
+
+	odm_set_bb_reg(dm, R_0x1990, BIT(0), 0);		/*RFE_CTRL_0*/ /*A_1*/
+	odm_set_bb_reg(dm, R_0xcbc, BIT(0), 0);		/*@inv*/
+	odm_set_bb_reg(dm, R_0xcb0, 0xf, 0x9);
+
+	odm_set_bb_reg(dm, R_0x1990, BIT(8), 0);		/*RFE_CTRL_8*/ /*A_2*/
+	odm_set_bb_reg(dm, R_0xcbc, BIT(8), 0);		/*@inv*/
+	odm_set_bb_reg(dm, R_0xcb4, 0xf, 0xa);
+
 
 	/*path B*/
-	odm_set_bb_reg(p_dm, 0x1990, BIT(4), 1);		/*RFE_CTRL_4*/	/*B_0*/
-	odm_set_bb_reg(p_dm, 0xdbc, BIT(4), 0);		/*inv*/
-	odm_set_bb_reg(p_dm, 0xdb0, 0xf0000, 0xb);
-	
-	odm_set_bb_reg(p_dm, 0x1990, BIT(11), 1);	/*RFE_CTRL_11*/	/*B_1*/
-	odm_set_bb_reg(p_dm, 0xdbc, BIT(11), 0);		/*inv*/
-	odm_set_bb_reg(p_dm, 0xdb4, 0xf000, 0xc);
-	
-	odm_set_bb_reg(p_dm, 0x1990, BIT(9), 1);		/*RFE_CTRL_9*/	/*B_2*/
-	odm_set_bb_reg(p_dm, 0xdbc, BIT(9), 0);		/*inv*/
-	odm_set_bb_reg(p_dm, 0xdb4, 0xf0, 0xd);
-	#endif
-	/*========= BB SmtAnt setting =================================*/
-	odm_set_mac_reg(p_dm, 0x668, BIT(3), 1);
-	odm_set_bb_reg(p_dm, 0x804, BIT(4), 0); /*lathch antsel*/
-	odm_set_bb_reg(p_dm, 0x818, 0xf00000, 0); /*keep tx by rx*/
-	odm_set_bb_reg(p_dm, 0x900, BIT(19), 0); /*fast train*/
-	odm_set_bb_reg(p_dm, 0x900, BIT(18), 1); /*1: by TXDESC*/
+	odm_set_bb_reg(dm, R_0x1990, BIT(4), 1);		/*RFE_CTRL_4*/	/*B_0*/
+	odm_set_bb_reg(dm, R_0xdbc, BIT(4), 0);		/*@inv*/
+	odm_set_bb_reg(dm, R_0xdb0, 0xf0000, 0xb);
+
+	odm_set_bb_reg(dm, R_0x1990, BIT(11), 1);	/*RFE_CTRL_11*/	/*B_1*/
+	odm_set_bb_reg(dm, R_0xdbc, BIT(11), 0);		/*@inv*/
+	odm_set_bb_reg(dm, R_0xdb4, 0xf000, 0xc);
+
+	odm_set_bb_reg(dm, R_0x1990, BIT(9), 1);		/*RFE_CTRL_9*/	/*B_2*/
+	odm_set_bb_reg(dm, R_0xdbc, BIT(9), 0);		/*@inv*/
+	odm_set_bb_reg(dm, R_0xdb4, 0xf0, 0xd);
+#endif
+	/*@========= BB SmtAnt setting =================================*/
+	odm_set_mac_reg(dm, R_0x6d8, BIT(22) | BIT(21), 2); /*resp tx by register*/
+	odm_set_mac_reg(dm, R_0x668, BIT(3), 1);
+	odm_set_bb_reg(dm, R_0x804, BIT(4), 0); /*@lathch antsel*/
+	odm_set_bb_reg(dm, R_0x818, 0xf00000, 0); /*@keep tx by rx*/
+	odm_set_bb_reg(dm, R_0x900, BIT(19), 0); /*@fast train*/
+	odm_set_bb_reg(dm, R_0x900, BIT(18), 1); /*@1: by TXDESC*/
 
 	/*pathA*/
-	odm_set_bb_reg(p_dm, 0xca4, MASKDWORD, 0x03020100); /*ant map 1*/
-	odm_set_bb_reg(p_dm, 0xca8, MASKDWORD, 0x07060504); /*ant map 2*/
-	odm_set_bb_reg(p_dm, 0xcac, BIT(9), 0); /*keep antsel map by GNT_BT*/
+	odm_set_bb_reg(dm, R_0xca4, MASKDWORD, 0x03020100); /*@ant map 1*/
+	odm_set_bb_reg(dm, R_0xca8, MASKDWORD, 0x07060504); /*@ant map 2*/
+	odm_set_bb_reg(dm, R_0xcac, BIT(9), 0); /*@keep antsel map by GNT_BT*/
 
 	/*pathB*/
-	odm_set_bb_reg(p_dm, 0xea4, MASKDWORD, 0x30201000); /*ant map 1*/
-	odm_set_bb_reg(p_dm, 0xea8, MASKDWORD, 0x70605040); /*ant map 2*/
-	odm_set_bb_reg(p_dm, 0xeac, BIT(9), 0); /*keep antsel map by GNT_BT*/
+	odm_set_bb_reg(dm, R_0xea4, MASKDWORD, 0x30201000); /*@ant map 1*/
+	odm_set_bb_reg(dm, R_0xea8, MASKDWORD, 0x70605040); /*@ant map 2*/
+	odm_set_bb_reg(dm, R_0xeac, BIT(9), 0); /*@keep antsel map by GNT_BT*/
 }
 
-void
-phydm_cumitek_smt_ant_init_8197f(
-	void		*p_dm_void
-)
+void phydm_cumitek_smt_ant_init_8197f(
+	void *dm_void)
 {
-	struct	PHY_DM_STRUCT	*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	struct	smt_ant			*p_smtant_table = &(p_dm->smtant_table);
-	struct	smt_ant_cumitek	*p_cumi_smtant_table = &(p_dm->smtant_table.cumi_smtant_table);
-	u32		value32;
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct smt_ant *smtant_table = &dm->smtant_table;
+	struct smt_ant_cumitek *cumi_smtant_table = &dm->smtant_table.cumi_smtant_table;
+	u32 value32;
 
-	PHYDM_DBG(p_dm, DBG_SMT_ANT, ("[8197F Cumitek SmtAnt Int]\n"));
+	PHYDM_DBG(dm, DBG_SMT_ANT, "[8197F Cumitek SmtAnt Int]\n");
 
-	/*GPIO setting*/
+	/*@GPIO setting*/
+}
 
+void phydm_cumitek_smt_ant_init_8192f(
+	void *dm_void)
+{
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct smt_ant *smtant_table = &dm->smtant_table;
+	struct smt_ant_cumitek *cumi_smtant_table = &dm->smtant_table.cumi_smtant_table;
+	u32 value32;
+	PHYDM_DBG(dm, DBG_SMT_ANT, "[8192F Cumitek SmtAnt Int]\n");
 
+	/*@GPIO setting*/
 }
 
-void
-phydm_cumitek_smt_tx_ant_update(
-	void		*p_dm_void,
-	u8		tx_ant_idx_path_a,
-	u8		tx_ant_idx_path_b,
-	u32		mac_id
-)
+void phydm_cumitek_smt_tx_ant_update(
+	void *dm_void,
+	u8 tx_ant_idx_path_a,
+	u8 tx_ant_idx_path_b,
+	u32 mac_id)
 {
-	struct	PHY_DM_STRUCT	*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	struct	smt_ant			*p_smtant_table = &(p_dm->smtant_table);
-	struct	smt_ant_cumitek	*p_cumi_smtant_table = &(p_dm->smtant_table.cumi_smtant_table);
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct smt_ant *smtant_table = &dm->smtant_table;
+	struct smt_ant_cumitek *cumi_smtant_table = &dm->smtant_table.cumi_smtant_table;
 
-	PHYDM_DBG(p_dm, DBG_ANT_DIV, ("[Cumitek] Set TX-ANT[%d] = (( A:0x%x ,  B:0x%x ))\n",
-		mac_id, tx_ant_idx_path_a, tx_ant_idx_path_b));
+	PHYDM_DBG(dm, DBG_ANT_DIV,
+		  "[Cumitek] Set TX-ANT[%d] = (( A:0x%x ,  B:0x%x ))\n", mac_id,
+		  tx_ant_idx_path_a, tx_ant_idx_path_b);
 
 	/*path-A*/
-	p_cumi_smtant_table->tx_ant_idx[0][mac_id] = tx_ant_idx_path_a; /*fill this value into TXDESC*/
-	
-	/*path-B*/	
-	p_cumi_smtant_table->tx_ant_idx[1][mac_id] = tx_ant_idx_path_b; /*fill this value into TXDESC*/
+	cumi_smtant_table->tx_ant_idx[0][mac_id] = tx_ant_idx_path_a; /*@fill this value into TXDESC*/
+
+	/*path-B*/
+	cumi_smtant_table->tx_ant_idx[1][mac_id] = tx_ant_idx_path_b; /*@fill this value into TXDESC*/
 }
 
-void
-phydm_cumitek_smt_rx_default_ant_update(
-	void		*p_dm_void,
-	u8		rx_ant_idx_path_a,
-	u8		rx_ant_idx_path_b
-)
+void phydm_cumitek_smt_rx_default_ant_update(
+	void *dm_void,
+	u8 rx_ant_idx_path_a,
+	u8 rx_ant_idx_path_b)
 {
-	struct	PHY_DM_STRUCT	*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	struct	smt_ant			*p_smtant_table = &(p_dm->smtant_table);
-	struct	smt_ant_cumitek	*p_cumi_smtant_table = &(p_dm->smtant_table.cumi_smtant_table);
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct smt_ant *smtant_table = &dm->smtant_table;
+	struct smt_ant_cumitek *cumi_smtant_table = &dm->smtant_table.cumi_smtant_table;
 
-	PHYDM_DBG(p_dm, DBG_ANT_DIV, ("[Cumitek] Set RX-ANT = (( A:0x%x, B:0x%x ))\n",
-		rx_ant_idx_path_a, rx_ant_idx_path_b));
+	PHYDM_DBG(dm, DBG_ANT_DIV,
+		  "[Cumitek] Set RX-ANT = (( A:0x%x, B:0x%x ))\n",
+		  rx_ant_idx_path_a, rx_ant_idx_path_b);
 
 	/*path-A*/
-	if (p_cumi_smtant_table->rx_default_ant_idx[0] != rx_ant_idx_path_a) {
-		
+	if (cumi_smtant_table->rx_default_ant_idx[0] != rx_ant_idx_path_a) {
 		#if (RTL8822B_SUPPORT == 1)
-		if (p_dm->support_ic_type == ODM_RTL8822B) {
-			
-			odm_set_bb_reg(p_dm, 0xc08, BIT(21) | BIT(20) | BIT(19), rx_ant_idx_path_a); /*default RX antenna*/
-			odm_set_mac_reg(p_dm, 0x6d8, BIT(2) | BIT(1) | BIT(0), rx_ant_idx_path_a); /*default response TX antenna*/
+		if (dm->support_ic_type == ODM_RTL8822B) {
+			odm_set_bb_reg(dm, R_0xc08, BIT(21) | BIT(20) | BIT(19), rx_ant_idx_path_a); /*@default RX antenna*/
+			odm_set_mac_reg(dm, R_0x6d8, BIT(2) | BIT(1) | BIT(0), rx_ant_idx_path_a); /*@default response TX antenna*/
 		}
 		#endif
-		
-		#if (RTL8197F_SUPPORT == 1)
-		if (p_dm->support_ic_type == ODM_RTL8197F) {
 
+		#if (RTL8197F_SUPPORT == 1)
+		if (dm->support_ic_type == ODM_RTL8197F) {
 		}
 		#endif
 
-		p_cumi_smtant_table->rx_default_ant_idx[0] = rx_ant_idx_path_a;
+		/*@jj add 20170822*/
+		#if (RTL8192F_SUPPORT == 1)
+		if (dm->support_ic_type == ODM_RTL8192F) {
+		}
+		#endif
+		cumi_smtant_table->rx_default_ant_idx[0] = rx_ant_idx_path_a;
 	}
 
 	/*path-B*/
-	if (p_cumi_smtant_table->rx_default_ant_idx[1] != rx_ant_idx_path_b) {
-		
+	if (cumi_smtant_table->rx_default_ant_idx[1] != rx_ant_idx_path_b) {
 		#if (RTL8822B_SUPPORT == 1)
-		if (p_dm->support_ic_type == ODM_RTL8822B) {
-			
-			odm_set_bb_reg(p_dm, 0xe08, BIT(21) | BIT(20) | BIT(19), rx_ant_idx_path_b); /*default antenna*/
-			odm_set_mac_reg(p_dm, 0x6d8, BIT(5) | BIT(4) | BIT(3), rx_ant_idx_path_b); /*default response TX antenna*/
+		if (dm->support_ic_type == ODM_RTL8822B) {
+			odm_set_bb_reg(dm, R_0xe08, BIT(21) | BIT(20) | BIT(19), rx_ant_idx_path_b); /*@default antenna*/
+			odm_set_mac_reg(dm, R_0x6d8, BIT(5) | BIT(4) | BIT(3), rx_ant_idx_path_b); /*@default response TX antenna*/
 		}
 		#endif
-		
-		#if (RTL8197F_SUPPORT == 1)
-		if (p_dm->support_ic_type == ODM_RTL8197F) {
 
+		#if (RTL8197F_SUPPORT == 1)
+		if (dm->support_ic_type == ODM_RTL8197F) {
 		}
 		#endif
 
-		p_cumi_smtant_table->rx_default_ant_idx[1] = rx_ant_idx_path_b;
+		/*@jj add 20170822*/
+		#if (RTL8192F_SUPPORT == 1)
+		if (dm->support_ic_type == ODM_RTL8192F) {
+		}
+		#endif
+		cumi_smtant_table->rx_default_ant_idx[1] = rx_ant_idx_path_b;
 	}
-	
 }
 
-void
-phydm_cumitek_smt_ant_debug(
-	void		*p_dm_void,
-	char		input[][16],
-	u32		*_used,
-	char		*output,
-	u32		*_out_len,
-	u32		input_num
-)
+void phydm_cumitek_smt_ant_debug(
+	void *dm_void,
+	char input[][16],
+	u32 *_used,
+	char *output,
+	u32 *_out_len)
 {
-	struct PHY_DM_STRUCT		*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	struct	smt_ant			*p_smtant_table = &(p_dm->smtant_table);
-	struct	smt_ant_cumitek	*p_cumi_smtant_table = &(p_dm->smtant_table.cumi_smtant_table);
-	u32			used = *_used;
-	u32			out_len = *_out_len;
-	char			help[] = "-h";
-	u32			dm_value[10] = {0};
-	u8			i;
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct smt_ant *smtant_table = &dm->smtant_table;
+	struct smt_ant_cumitek *cumi_smtant_table = &dm->smtant_table.cumi_smtant_table;
+	u32 used = *_used;
+	u32 out_len = *_out_len;
+	char help[] = "-h";
+	u32 dm_value[10] = {0};
+	u8 i;
 
 	PHYDM_SSCANF(input[1], DCMD_DECIMAL, &dm_value[0]);
 
 	if (strcmp(input[1], help) == 0) {
-		PHYDM_SNPRINTF((output + used, out_len - used, "{1} {PathA rx_ant_idx} {pathB rx_ant_idx}\n"));
-		PHYDM_SNPRINTF((output + used, out_len - used, "{2} {PathA tx_ant_idx} {pathB tx_ant_idx} {macid}\n"));
-		PHYDM_SNPRINTF((output + used, out_len - used, "{3} {PathA mapping table} {PathB mapping table}\n"));
-		PHYDM_SNPRINTF((output + used, out_len - used, "{4} {txdesc_mode 0:3bit, 1:2bit}\n"));
+		PDM_SNPF(out_len, used, output + used, out_len - used,
+			 "{1} {PathA rx_ant_idx} {pathB rx_ant_idx}\n");
+		PDM_SNPF(out_len, used, output + used, out_len - used,
+			 "{2} {PathA tx_ant_idx} {pathB tx_ant_idx} {macid}\n");
+		PDM_SNPF(out_len, used, output + used, out_len - used,
+			 "{3} {PathA mapping table} {PathB mapping table}\n");
+		PDM_SNPF(out_len, used, output + used, out_len - used,
+			 "{4} {txdesc_mode 0:3bit, 1:2bit}\n");
+
+	} else if (dm_value[0] == 1) { /*@fix rx_idle pattern*/
 
-	} else if (dm_value[0] == 1) { /*fix rx_idle pattern*/
-	
 		PHYDM_SSCANF(input[2], DCMD_DECIMAL, &dm_value[1]);
 		PHYDM_SSCANF(input[3], DCMD_DECIMAL, &dm_value[2]);
 
-		phydm_cumitek_smt_rx_default_ant_update(p_dm, (u8)dm_value[1], (u8)dm_value[2]);
-		PHYDM_SNPRINTF((output + used, out_len - used, "RX Ant{A, B}={%d, %d}\n", dm_value[1], dm_value[2]));
-		
-	} else if (dm_value[0] == 2) { /*fix tx pattern*/ 
+		phydm_cumitek_smt_rx_default_ant_update(dm, (u8)dm_value[1], (u8)dm_value[2]);
+		PDM_SNPF(out_len, used, output + used, out_len - used,
+			 "RX Ant{A, B}={%d, %d}\n", dm_value[1], dm_value[2]);
 
+	} else if (dm_value[0] == 2) { /*@fix tx pattern*/
 
 		for (i = 1; i < 4; i++) {
 			if (input[i + 1])
 				PHYDM_SSCANF(input[i + 1], DCMD_DECIMAL, &dm_value[i]);
 		}
 
-		PHYDM_SNPRINTF((output + used, out_len - used, "STA[%d] TX Ant{A, B}={%d, %d}\n",dm_value[3], dm_value[1], dm_value[2]));
-		phydm_cumitek_smt_tx_ant_update(p_dm, (u8)dm_value[1], (u8)dm_value[2], (u8)dm_value[3]);
+		PDM_SNPF(out_len, used, output + used, out_len - used,
+			 "STA[%d] TX Ant{A, B}={%d, %d}\n", dm_value[3],
+			 dm_value[1], dm_value[2]);
+		phydm_cumitek_smt_tx_ant_update(dm, (u8)dm_value[1], (u8)dm_value[2], (u8)dm_value[3]);
 
 	} else if (dm_value[0] == 3) {
-
 		u8 table_path_a[8] = {0};
 		u8 table_path_b[8] = {0};
 
@@ -308,23 +337,31 @@ phydm_cumitek_smt_ant_debug(
 				PHYDM_SSCANF(input[i + 1], DCMD_HEX, &dm_value[i]);
 		}
 
-		PHYDM_SNPRINTF((output + used, out_len - used, "Set Path-AB mapping table={%d, %d}\n", dm_value[1], dm_value[2]));
+		PDM_SNPF(out_len, used, output + used, out_len - used,
+			 "Set Path-AB mapping table={%d, %d}\n", dm_value[1],
+			 dm_value[2]);
 
-		for (i = 0; i <8; i++) {
+		for (i = 0; i < 8; i++) {
 			table_path_a[i] = (u8)((dm_value[1] >> (4 * i)) & 0xf);
 			table_path_b[i] = (u8)((dm_value[2] >> (4 * i)) & 0xf);
 		}
 
-		PHYDM_SNPRINTF((output + used, out_len - used, "Ant_Table_A[7:0]={0x%x, 0x%x, 0x%x, 0x%x, 0x%x, 0x%x, 0x%x, 0x%x}\n", 
-			table_path_a[7], table_path_a[6], table_path_a[5], table_path_a[4], table_path_a[3], table_path_a[2], table_path_a[1], table_path_a[0]));
-		PHYDM_SNPRINTF((output + used, out_len - used, "Ant_Table_B[7:0]={0x%x, 0x%x, 0x%x, 0x%x, 0x%x, 0x%x, 0x%x, 0x%x}\n", 
-			table_path_b[7], table_path_b[6], table_path_b[5], table_path_b[4], table_path_b[3], table_path_b[2], table_path_b[1], table_path_b[0]));
+		PDM_SNPF(out_len, used, output + used, out_len - used,
+			 "Ant_Table_A[7:0]={0x%x, 0x%x, 0x%x, 0x%x, 0x%x, 0x%x, 0x%x, 0x%x}\n",
+			 table_path_a[7], table_path_a[6], table_path_a[5],
+			 table_path_a[4], table_path_a[3], table_path_a[2],
+			 table_path_a[1], table_path_a[0]);
+		PDM_SNPF(out_len, used, output + used, out_len - used,
+			 "Ant_Table_B[7:0]={0x%x, 0x%x, 0x%x, 0x%x, 0x%x, 0x%x, 0x%x, 0x%x}\n",
+			 table_path_b[7], table_path_b[6], table_path_b[5],
+			 table_path_b[4], table_path_b[3], table_path_b[2],
+			 table_path_b[1], table_path_b[0]);
 
-		phydm_cumitek_smt_ant_mapping_table_8822b(p_dm, &(table_path_a[0]), &(table_path_b[0]));
-	}else if (dm_value[0] == 4) {
+		phydm_cumitek_smt_ant_mapping_table_8822b(dm, &table_path_a[0], &table_path_b[0]);
 
-		p_smtant_table->tx_desc_mode = (u8)dm_value[1];
-		odm_set_mac_reg(p_dm, 0x604, BIT(25), (u32)p_smtant_table->tx_desc_mode);
+	} else if (dm_value[0] == 4) {
+		smtant_table->tx_desc_mode = (u8)dm_value[1];
+		odm_set_mac_reg(dm, R_0x604, BIT(25), (u32)smtant_table->tx_desc_mode);
 	}
 	*_used = used;
 	*_out_len = out_len;
@@ -336,248 +373,240 @@ phydm_cumitek_smt_ant_debug(
 #ifdef CONFIG_HL_SMART_ANTENNA_TYPE2
 
 #if (RTL8822B_SUPPORT == 1)
-void
-phydm_hl_smart_ant_type2_init_8822b(
-	void		*p_dm_void
-)
+void phydm_hl_smart_ant_type2_init_8822b(
+	void *dm_void)
 {
-	struct PHY_DM_STRUCT				*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	struct smt_ant_honbo	*pdm_sat_table = &(p_dm->dm_sat_table);
-	struct phydm_fat_struct		*p_dm_fat_table = &p_dm->dm_fat_table;
-	u8	j;
-	u8	rfu_codeword_table_init_2g[SUPPORT_BEAM_SET_PATTERN_NUM][MAX_PATH_NUM_8822B] = {
-			{1, 1},/*0*/
-			{1, 2},
-			{2, 1},
-			{2, 2},
-			{4, 0},
-			{5, 0},
-			{6, 0},
-			{7, 0},
-			{8, 0},/*8*/
-			{9, 0},
-			{0xa, 0},
-			{0xb, 0},
-			{0xc, 0},
-			{0xd, 0},
-			{0xe, 0},
-			{0xf, 0}
-		}; 
-	u8	rfu_codeword_table_init_5g[SUPPORT_BEAM_SET_PATTERN_NUM][MAX_PATH_NUM_8822B] ={
-		#if 1
-			{9, 1},/*0*/
-			{9, 9},
-			{1, 9},
-			{9, 6},
-			{2, 1},
-			{2, 9},
-			{9, 2},
-			{2, 2},/*8*/
-			{6, 1},
-			{6, 9},
-			{2, 9},
-			{2, 2},
-			{6, 2},
-			{6, 6},
-			{2, 6},
-			{1, 1}
-		#else
-			{1, 1},/*0*/
-			{9, 1},
-			{9, 9},
-			{1, 9},
-			{1, 2},
-			{9, 2},
-			{9, 6},
-			{1, 6},
-			{2, 1},/*8*/
-			{6, 1},
-			{6, 9},
-			{2, 9},
-			{2, 2},
-			{6, 2},
-			{6, 6},
-			{2, 6}
-		#endif
-		}; 		
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct smt_ant_honbo *sat_tab = &dm->dm_sat_table;
+	struct phydm_fat_struct *fat_tab = &dm->dm_fat_table;
+	u8 j;
+	u8 rfu_codeword_table_init_2g[SUPPORT_BEAM_SET_PATTERN_NUM][MAX_PATH_NUM_8822B] = {
+		{1, 1}, /*@0*/
+		{1, 2},
+		{2, 1},
+		{2, 2},
+		{4, 0},
+		{5, 0},
+		{6, 0},
+		{7, 0},
+		{8, 0}, /*@8*/
+		{9, 0},
+		{0xa, 0},
+		{0xb, 0},
+		{0xc, 0},
+		{0xd, 0},
+		{0xe, 0},
+		{0xf, 0}};
+	u8 rfu_codeword_table_init_5g[SUPPORT_BEAM_SET_PATTERN_NUM][MAX_PATH_NUM_8822B] = {
+#if 1
+		{9, 1}, /*@0*/
+		{9, 9},
+		{1, 9},
+		{9, 6},
+		{2, 1},
+		{2, 9},
+		{9, 2},
+		{2, 2}, /*@8*/
+		{6, 1},
+		{6, 9},
+		{2, 9},
+		{2, 2},
+		{6, 2},
+		{6, 6},
+		{2, 6},
+		{1, 1}
+#else
+		{1, 1}, /*@0*/
+		{9, 1},
+		{9, 9},
+		{1, 9},
+		{1, 2},
+		{9, 2},
+		{9, 6},
+		{1, 6},
+		{2, 1}, /*@8*/
+		{6, 1},
+		{6, 9},
+		{2, 9},
+		{2, 2},
+		{6, 2},
+		{6, 6},
+		{2, 6}
+#endif
+	};
 
-	PHYDM_DBG(p_dm, DBG_ANT_DIV, ("***RTK 8822B SmartAnt_Init: Hong-Bo SmrtAnt Type2]\n"));
+	PHYDM_DBG(dm, DBG_ANT_DIV,
+		  "***RTK 8822B SmartAnt_Init: Hong-Bo SmrtAnt Type2]\n");
 
-	/* ---------------------------------------- */
-	/* GPIO 0-1 for Beam control */
+	/* @---------------------------------------- */
+	/* @GPIO 0-1 for Beam control */
 	/* reg0x66[2:0]=0 */
 	/* reg0x44[25:24] = 0 */
 	/* reg0x44[23:16]  enable_output for P_GPIO[7:0] */
 	/* reg0x44[15:8]  output_value for P_GPIO[7:0] */
 	/* reg0x40[1:0] = 0  GPIO function */
-	/* ------------------------------------------ */
-
-	odm_move_memory(p_dm, pdm_sat_table->rfu_codeword_table_2g, rfu_codeword_table_init_2g, (SUPPORT_BEAM_SET_PATTERN_NUM * MAX_PATH_NUM_8822B));
-	odm_move_memory(p_dm, pdm_sat_table->rfu_codeword_table_5g, rfu_codeword_table_init_5g, (SUPPORT_BEAM_SET_PATTERN_NUM * MAX_PATH_NUM_8822B));
-
-	/*GPIO setting*/
-	odm_set_mac_reg(p_dm, 0x64, (BIT(18) | BIT(17) | BIT(16)), 0);
-	odm_set_mac_reg(p_dm, 0x44, BIT(25) | BIT(24), 0);	/*config P_GPIO[3:2] to data port*/
-	odm_set_mac_reg(p_dm, 0x44, BIT(17) | BIT(16), 0x3);	/*enable_output for P_GPIO[3:2]*/
-	/*odm_set_mac_reg(p_dm, 0x44, BIT(9)|BIT(8), 0);*/ /*P_GPIO[3:2] output value*/
-	odm_set_mac_reg(p_dm, 0x40, BIT(1) | BIT(0), 0);		/*GPIO function*/
-
-	/*Hong_lin smart antenna HW setting*/
-	pdm_sat_table->rfu_protocol_type = 2;
-	pdm_sat_table->rfu_protocol_delay_time = 45;
-	
-	pdm_sat_table->rfu_codeword_total_bit_num  = 16;/*max=32bit*/
-	pdm_sat_table->rfu_each_ant_bit_num = 4;
-	
-	pdm_sat_table->total_beam_set_num = 4;
-	pdm_sat_table->total_beam_set_num_2g = 4;
-	pdm_sat_table->total_beam_set_num_5g = 8;
+	/* @------------------------------------------ */
 
-#if DEV_BUS_TYPE == RT_SDIO_INTERFACE
-	pdm_sat_table->latch_time = 100; /*mu sec*/
-#elif DEV_BUS_TYPE == RT_USB_INTERFACE
-	pdm_sat_table->latch_time = 100; /*mu sec*/
+	odm_move_memory(dm, sat_tab->rfu_codeword_table_2g, rfu_codeword_table_init_2g, (SUPPORT_BEAM_SET_PATTERN_NUM * MAX_PATH_NUM_8822B));
+	odm_move_memory(dm, sat_tab->rfu_codeword_table_5g, rfu_codeword_table_init_5g, (SUPPORT_BEAM_SET_PATTERN_NUM * MAX_PATH_NUM_8822B));
+
+	/*@GPIO setting*/
+	odm_set_mac_reg(dm, R_0x64, (BIT(18) | BIT(17) | BIT(16)), 0);
+	odm_set_mac_reg(dm, R_0x44, BIT(25) | BIT(24), 0); /*@config P_GPIO[3:2] to data port*/
+	odm_set_mac_reg(dm, R_0x44, BIT(17) | BIT(16), 0x3); /*@enable_output for P_GPIO[3:2]*/
+#if 0
+	/*odm_set_mac_reg(dm, R_0x44, BIT(9)|BIT(8), 0);*/ /*P_GPIO[3:2] output value*/
 #endif
-	pdm_sat_table->pkt_skip_statistic_en = 0;
+	odm_set_mac_reg(dm, R_0x40, BIT(1) | BIT(0), 0); /*@GPIO function*/
 
-	pdm_sat_table->ant_num = 2;
-	pdm_sat_table->ant_num_total = MAX_PATH_NUM_8822B;
-	pdm_sat_table->first_train_ant = MAIN_ANT;
+	/*@Hong_lin smart antenna HW setting*/
+	sat_tab->rfu_protocol_type = 2;
+	sat_tab->rfu_protocol_delay_time = 45;
 
+	sat_tab->rfu_codeword_total_bit_num = 16; /*@max=32bit*/
+	sat_tab->rfu_each_ant_bit_num = 4;
 
+	sat_tab->total_beam_set_num = 4;
+	sat_tab->total_beam_set_num_2g = 4;
+	sat_tab->total_beam_set_num_5g = 8;
 
-	pdm_sat_table->fix_beam_pattern_en  = 0;
-	pdm_sat_table->decision_holding_period = 0;
+#if DEV_BUS_TYPE == RT_SDIO_INTERFACE
+	if (dm->support_interface == ODM_ITRF_SDIO)
+		sat_tab->latch_time = 100; /*@mu sec*/
+#endif
+#if DEV_BUS_TYPE == RT_USB_INTERFACE
+	if (dm->support_interface == ODM_ITRF_USB)
+		sat_tab->latch_time = 100; /*@mu sec*/
+#endif
+	sat_tab->pkt_skip_statistic_en = 0;
+
+	sat_tab->ant_num = 2;
+	sat_tab->ant_num_total = MAX_PATH_NUM_8822B;
+	sat_tab->first_train_ant = MAIN_ANT;
+
+	sat_tab->fix_beam_pattern_en = 0;
+	sat_tab->decision_holding_period = 0;
 
-	/*beam training setting*/
-	pdm_sat_table->pkt_counter = 0;
-	pdm_sat_table->per_beam_training_pkt_num = 10;
+	/*@beam training setting*/
+	sat_tab->pkt_counter = 0;
+	sat_tab->per_beam_training_pkt_num = 10;
 
 	/*set default beam*/
-	pdm_sat_table->fast_training_beam_num = 0;
-	pdm_sat_table->pre_fast_training_beam_num = pdm_sat_table->fast_training_beam_num;
+	sat_tab->fast_training_beam_num = 0;
+	sat_tab->pre_fast_training_beam_num = sat_tab->fast_training_beam_num;
 
 	for (j = 0; j < SUPPORT_BEAM_SET_PATTERN_NUM; j++) {
-		
-		pdm_sat_table->beam_set_avg_rssi_pre[j] = 0;
-		pdm_sat_table->beam_set_train_val_diff[j] = 0;
-		pdm_sat_table->beam_set_train_cnt[j] = 0;
+		sat_tab->beam_set_avg_rssi_pre[j] = 0;
+		sat_tab->beam_set_train_val_diff[j] = 0;
+		sat_tab->beam_set_train_cnt[j] = 0;
 	}
-	phydm_set_rfu_beam_pattern_type2(p_dm);
-	p_dm_fat_table->fat_state = FAT_BEFORE_LINK_STATE;
-	
+	phydm_set_rfu_beam_pattern_type2(dm);
+	fat_tab->fat_state = FAT_BEFORE_LINK_STATE;
 }
 #endif
 
-
-u32
-phydm_construct_hb_rfu_codeword_type2(
-	void		*p_dm_void,
-	u32		beam_set_idx
-)
+u32 phydm_construct_hb_rfu_codeword_type2(
+	void *dm_void,
+	u32 beam_set_idx)
 {
-	struct PHY_DM_STRUCT	*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	struct smt_ant_honbo		*pdm_sat_table = &(p_dm->dm_sat_table);
-	u32		sync_codeword = 0x7f;
-	u32		codeword = 0;
-	u32		data_tmp = 0;
-	u32		i;
-
-	for (i = 0; i < pdm_sat_table->ant_num_total; i++) {
-
-		if (*p_dm->p_band_type == ODM_BAND_5G)
-			data_tmp = pdm_sat_table->rfu_codeword_table_5g[beam_set_idx][i];
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct smt_ant_honbo *sat_tab = &dm->dm_sat_table;
+	u32 sync_codeword = 0x7f;
+	u32 codeword = 0;
+	u32 data_tmp = 0;
+	u32 i;
+
+	for (i = 0; i < sat_tab->ant_num_total; i++) {
+		if (*dm->band_type == ODM_BAND_5G)
+			data_tmp = sat_tab->rfu_codeword_table_5g[beam_set_idx][i];
 		else
-			data_tmp = pdm_sat_table->rfu_codeword_table_2g[beam_set_idx][i];
-			
-		codeword |= (data_tmp << (i * pdm_sat_table->rfu_each_ant_bit_num));
+			data_tmp = sat_tab->rfu_codeword_table_2g[beam_set_idx][i];
+
+		codeword |= (data_tmp << (i * sat_tab->rfu_each_ant_bit_num));
 	}
 
-	codeword = (codeword<<8) | sync_codeword;
-	
+	codeword = (codeword << 8) | sync_codeword;
+
 	return codeword;
 }
 
-void
-phydm_update_beam_pattern_type2(
-	void		*p_dm_void,
-	u32		codeword,
-	u32		codeword_length
-)
+void phydm_update_beam_pattern_type2(
+	void *dm_void,
+	u32 codeword,
+	u32 codeword_length)
 {
-	struct PHY_DM_STRUCT		*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	struct smt_ant_honbo			*pdm_sat_table = &(p_dm->dm_sat_table);
-	u8			i;
-	boolean			beam_ctrl_signal;
-	u32			one = 0x1;
-	u32			reg44_tmp_p, reg44_tmp_n, reg44_ori;
-	u8			devide_num = 4;
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct smt_ant_honbo *sat_tab = &dm->dm_sat_table;
+	u8 i;
+	boolean beam_ctrl_signal;
+	u32 one = 0x1;
+	u32 reg44_tmp_p, reg44_tmp_n, reg44_ori;
+	u8 devide_num = 4;
 
-	PHYDM_DBG(p_dm, DBG_ANT_DIV, ("Set codeword = ((0x%x))\n", codeword));
+	PHYDM_DBG(dm, DBG_ANT_DIV, "Set codeword = ((0x%x))\n", codeword);
 
-	reg44_ori = odm_get_mac_reg(p_dm, 0x44, MASKDWORD);
+	reg44_ori = odm_get_mac_reg(dm, R_0x44, MASKDWORD);
 	reg44_tmp_p = reg44_ori;
-	/*PHYDM_DBG(p_dm, DBG_ANT_DIV, ("reg44_ori =0x%x\n", reg44_ori));*/
+#if 0
+	/*PHYDM_DBG(dm, DBG_ANT_DIV, "reg44_ori =0x%x\n", reg44_ori);*/
+#endif
 
-	/*devide_num = (pdm_sat_table->rfu_protocol_type == 2) ? 8 : 4;*/
+	/*@devide_num = (sat_tab->rfu_protocol_type == 2) ? 8 : 4;*/
 
 	for (i = 0; i <= (codeword_length - 1); i++) {
 		beam_ctrl_signal = (boolean)((codeword & BIT(i)) >> i);
-		
+
 		#if 1
-		if (p_dm->debug_components & DBG_ANT_DIV) {
-
-			if (i == (codeword_length - 1)) {
-				dbg_print("%d ]\n", beam_ctrl_signal);
-				/**/
-			} else if (i == 0) {
-				dbg_print("Start sending codeword[1:%d] ---> [ %d ", codeword_length, beam_ctrl_signal);
-				/**/
-			} else if ((i % devide_num) == (devide_num-1)) {
-				dbg_print("%d  |  ", beam_ctrl_signal);
-				/**/
-			} else {
-				dbg_print("%d ", beam_ctrl_signal);
-				/**/
-			}
+		if (dm->debug_components & DBG_ANT_DIV) {
+			if (i == (codeword_length - 1))
+				pr_debug("%d ]\n", beam_ctrl_signal);
+			else if (i == 0)
+				pr_debug("Start sending codeword[1:%d] ---> [ %d ", codeword_length, beam_ctrl_signal);
+			else if ((i % devide_num) == (devide_num - 1))
+				pr_debug("%d  |  ", beam_ctrl_signal);
+			else
+				pr_debug("%d ", beam_ctrl_signal);
 		}
 		#endif
-		
-		if (p_dm->support_ic_type == ODM_RTL8821) {
+
+		if (dm->support_ic_type == ODM_RTL8821) {
 			#if (RTL8821A_SUPPORT == 1)
-			reg44_tmp_p = reg44_ori & (~(BIT(11) | BIT(10))); /*clean bit 10 & 11*/
+			reg44_tmp_p = reg44_ori & (~(BIT(11) | BIT(10))); /*@clean bit 10 & 11*/
 			reg44_tmp_p |= ((1 << 11) | (beam_ctrl_signal << 10));
 			reg44_tmp_n = reg44_ori & (~(BIT(11) | BIT(10)));
 
-			/*PHYDM_DBG(p_dm, DBG_ANT_DIV, ("reg44_tmp_p =(( 0x%x )), reg44_tmp_n = (( 0x%x ))\n", reg44_tmp_p, reg44_tmp_n));*/
-			odm_set_mac_reg(p_dm, 0x44, MASKDWORD, reg44_tmp_p);
-			odm_set_mac_reg(p_dm, 0x44, MASKDWORD, reg44_tmp_n);
+#if 0
+			/*PHYDM_DBG(dm, DBG_ANT_DIV, "reg44_tmp_p =(( 0x%x )), reg44_tmp_n = (( 0x%x ))\n", reg44_tmp_p, reg44_tmp_n);*/
+#endif
+			odm_set_mac_reg(dm, R_0x44, MASKDWORD, reg44_tmp_p);
+			odm_set_mac_reg(dm, R_0x44, MASKDWORD, reg44_tmp_n);
 			#endif
 		}
 		#if (RTL8822B_SUPPORT == 1)
-		else if (p_dm->support_ic_type == ODM_RTL8822B) {
+		else if (dm->support_ic_type == ODM_RTL8822B) {
+			if (sat_tab->rfu_protocol_type == 2) {
+				reg44_tmp_p = reg44_tmp_p & ~(BIT(8)); /*@clean bit 8*/
+				reg44_tmp_p = reg44_tmp_p ^ BIT(9); /*@get new clk high/low, exclusive-or*/
 
-			if (pdm_sat_table->rfu_protocol_type == 2) {
+				reg44_tmp_p |= (beam_ctrl_signal << 8);
 
-				reg44_tmp_p = reg44_tmp_p & ~(BIT(8)); /*clean bit 8*/
-				reg44_tmp_p = reg44_tmp_p ^ BIT(9); /*get new clk high/low, exclusive-or*/
+				odm_set_mac_reg(dm, R_0x44, MASKDWORD, reg44_tmp_p);
+				ODM_delay_us(sat_tab->rfu_protocol_delay_time);
+#if 0
+				/*PHYDM_DBG(dm, DBG_ANT_DIV, "reg44 =(( 0x%x )), reg44[9:8] = ((%x)), beam_ctrl_signal =((%x))\n", reg44_tmp_p, ((reg44_tmp_p & 0x300)>>8), beam_ctrl_signal);*/
+#endif
 
-	
-				reg44_tmp_p |= (beam_ctrl_signal << 8);
-				
-				odm_set_mac_reg(p_dm, 0x44, MASKDWORD, reg44_tmp_p);
-				ODM_delay_us(pdm_sat_table->rfu_protocol_delay_time);
-				/*PHYDM_DBG(p_dm, DBG_ANT_DIV, ("reg44 =(( 0x%x )), reg44[9:8] = ((%x)), beam_ctrl_signal =((%x))\n", reg44_tmp_p, ((reg44_tmp_p & 0x300)>>8), beam_ctrl_signal));*/
-				
 			} else {
-				reg44_tmp_p = reg44_ori & (~(BIT(9) | BIT(8))); /*clean bit 9 & 8*/
+				reg44_tmp_p = reg44_ori & (~(BIT(9) | BIT(8))); /*@clean bit 9 & 8*/
 				reg44_tmp_p |= ((1 << 9) | (beam_ctrl_signal << 8));
 				reg44_tmp_n = reg44_ori & (~(BIT(9) | BIT(8)));
 
-				/*PHYDM_DBG(p_dm, DBG_ANT_DIV, ("reg44_tmp_p =(( 0x%x )), reg44_tmp_n = (( 0x%x ))\n", reg44_tmp_p, reg44_tmp_n)); */
-				odm_set_mac_reg(p_dm, 0x44, MASKDWORD, reg44_tmp_p);
+#if 0
+				/*PHYDM_DBG(dm, DBG_ANT_DIV, "reg44_tmp_p =(( 0x%x )), reg44_tmp_n = (( 0x%x ))\n", reg44_tmp_p, reg44_tmp_n); */
+#endif
+				odm_set_mac_reg(dm, R_0x44, MASKDWORD, reg44_tmp_p);
 				ODM_delay_us(10);
-				odm_set_mac_reg(p_dm, 0x44, MASKDWORD, reg44_tmp_n);
+				odm_set_mac_reg(dm, R_0x44, MASKDWORD, reg44_tmp_n);
 				ODM_delay_us(10);
 			}
 		}
@@ -585,50 +614,52 @@ phydm_update_beam_pattern_type2(
 	}
 }
 
-void
-phydm_update_rx_idle_beam_type2(
-	void		*p_dm_void
-)
+void phydm_update_rx_idle_beam_type2(
+	void *dm_void)
 {
-	struct PHY_DM_STRUCT				*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	struct phydm_fat_struct		*p_dm_fat_table = &p_dm->dm_fat_table;
-	struct smt_ant_honbo	*pdm_sat_table = &(p_dm->dm_sat_table);
-	u32			i;
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct phydm_fat_struct *fat_tab = &dm->dm_fat_table;
+	struct smt_ant_honbo *sat_tab = &dm->dm_sat_table;
+	u32 i;
 
-	pdm_sat_table->update_beam_codeword = phydm_construct_hb_rfu_codeword_type2(p_dm, pdm_sat_table->rx_idle_beam_set_idx);
-	PHYDM_DBG(p_dm, DBG_ANT_DIV, ("[ Update Rx-Idle-Beam ] BeamSet idx = ((%d))\n", pdm_sat_table->rx_idle_beam_set_idx));
+	sat_tab->update_beam_codeword = phydm_construct_hb_rfu_codeword_type2(dm, sat_tab->rx_idle_beam_set_idx);
+	PHYDM_DBG(dm, DBG_ANT_DIV,
+		  "[ Update Rx-Idle-Beam ] BeamSet idx = ((%d))\n",
+		  sat_tab->rx_idle_beam_set_idx);
 
 #if DEV_BUS_TYPE == RT_PCI_INTERFACE
-	phydm_update_beam_pattern_type2(p_dm, pdm_sat_table->update_beam_codeword, pdm_sat_table->rfu_codeword_total_bit_num);
-#else
-	odm_schedule_work_item(&pdm_sat_table->hl_smart_antenna_workitem);
+	if (dm->support_interface == ODM_ITRF_PCIE)
+		phydm_update_beam_pattern_type2(dm, sat_tab->update_beam_codeword, sat_tab->rfu_codeword_total_bit_num);
+#endif
+#if DEV_BUS_TYPE == RT_USB_INTERFACE || DEV_BUS_TYPE == RT_SDIO_INTERFACE
+	if (dm->support_interface == ODM_ITRF_USB || dm->support_interface == ODM_ITRF_SDIO)
+		odm_schedule_work_item(&sat_tab->hl_smart_antenna_workitem);
+#if 0
 	/*odm_stall_execution(1);*/
 #endif
+#endif
 
-	pdm_sat_table->pre_codeword = pdm_sat_table->update_beam_codeword;
+	sat_tab->pre_codeword = sat_tab->update_beam_codeword;
 }
 
-
-void
-phydm_hl_smart_ant_debug_type2(
-	void		*p_dm_void,
-	char		input[][16],
-	u32		*_used,
-	char		*output,
-	u32		*_out_len,
-	u32		input_num
+void phydm_hl_smt_ant_dbg_type2(
+	void *dm_void,
+	char input[][16],
+	u32 *_used,
+	char *output,
+	u32 *_out_len
 )
 {
-	struct PHY_DM_STRUCT		*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	struct smt_ant_honbo			*pdm_sat_table = &(p_dm->dm_sat_table);
-	u32			used = *_used;
-	u32			out_len = *_out_len;
-	u32			one = 0x1;
-	u32			codeword_length = pdm_sat_table->rfu_codeword_total_bit_num;
-	u32			beam_ctrl_signal, i;
-	u8			devide_num = 4;
-	char			help[] = "-h";
-	u32			dm_value[10] = {0};
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct smt_ant_honbo *sat_tab = &dm->dm_sat_table;
+	u32 used = *_used;
+	u32 out_len = *_out_len;
+	u32 one = 0x1;
+	u32 codeword_length = sat_tab->rfu_codeword_total_bit_num;
+	u32 beam_ctrl_signal, i;
+	u8 devide_num = 4;
+	char help[] = "-h";
+	u32 dm_value[10] = {0};
 
 	PHYDM_SSCANF(input[1], DCMD_DECIMAL, &dm_value[0]);
 	PHYDM_SSCANF(input[2], DCMD_DECIMAL, &dm_value[1]);
@@ -636,295 +667,350 @@ phydm_hl_smart_ant_debug_type2(
 	PHYDM_SSCANF(input[4], DCMD_DECIMAL, &dm_value[3]);
 	PHYDM_SSCANF(input[5], DCMD_DECIMAL, &dm_value[4]);
 
-
 	if (strcmp(input[1], help) == 0) {
-		PHYDM_SNPRINTF((output + used, out_len - used, " 1 {fix_en} {codeword(Hex)}\n"));
-		PHYDM_SNPRINTF((output + used, out_len - used, " 3 {Fix_training_num_en} {Per_beam_training_pkt_num} {Decision_holding_period}\n"));
-		PHYDM_SNPRINTF((output + used, out_len - used, " 5 {0:show, 1:2G, 2:5G} {beam_num} {idxA(Hex)} {idxB(Hex)}\n"));
-		PHYDM_SNPRINTF((output + used, out_len - used, " 7 {0:show, 1:2G, 2:5G} {total_beam_set_num}\n"));
-		PHYDM_SNPRINTF((output + used, out_len - used, " 8 {0:show, 1:set} {RFU delay time(us)}\n"));
-
-	} else if (dm_value[0] == 1) { /*fix beam pattern*/
+		PDM_SNPF(out_len, used, output + used, out_len - used,
+			 " 1 {fix_en} {codeword(Hex)}\n");
+		PDM_SNPF(out_len, used, output + used, out_len - used,
+			 " 3 {Fix_training_num_en} {Per_beam_training_pkt_num} {Decision_holding_period}\n");
+		PDM_SNPF(out_len, used, output + used, out_len - used,
+			 " 5 {0:show, 1:2G, 2:5G} {beam_num} {idxA(Hex)} {idxB(Hex)}\n");
+		PDM_SNPF(out_len, used, output + used, out_len - used,
+			 " 7 {0:show, 1:2G, 2:5G} {total_beam_set_num}\n");
+		PDM_SNPF(out_len, used, output + used, out_len - used,
+			 " 8 {0:show, 1:set} {RFU delay time(us)}\n");
+
+	} else if (dm_value[0] == 1) { /*@fix beam pattern*/
+
+		sat_tab->fix_beam_pattern_en = dm_value[1];
+
+		if (sat_tab->fix_beam_pattern_en == 1) {
+			PHYDM_SSCANF(input[3], DCMD_HEX, &dm_value[2]);
+			sat_tab->fix_beam_pattern_codeword = dm_value[2];
 
-		pdm_sat_table->fix_beam_pattern_en = dm_value[1];
+			if (sat_tab->fix_beam_pattern_codeword > (one << codeword_length)) {
+				PHYDM_DBG(dm, DBG_ANT_DIV,
+					  "[ SmartAnt ] Codeword overflow, Current codeword is ((0x%x)), and should be less than ((%d))bit\n",
+					  sat_tab->fix_beam_pattern_codeword,
+					  codeword_length);
 
-		if (pdm_sat_table->fix_beam_pattern_en == 1) {
+				(sat_tab->fix_beam_pattern_codeword) &= 0xffffff;
 
-			PHYDM_SSCANF(input[3], DCMD_HEX, &dm_value[2]);
-			pdm_sat_table->fix_beam_pattern_codeword = dm_value[2];
+				PHYDM_DBG(dm, DBG_ANT_DIV,
+					  "[ SmartAnt ] Auto modify to (0x%x)\n",
+					  sat_tab->fix_beam_pattern_codeword);
+			}
 
-			if (pdm_sat_table->fix_beam_pattern_codeword  > (one << codeword_length)) {
+			sat_tab->update_beam_codeword = sat_tab->fix_beam_pattern_codeword;
 
-				PHYDM_DBG(p_dm, DBG_ANT_DIV, ("[ SmartAnt ] Codeword overflow, Current codeword is ((0x%x)), and should be less than ((%d))bit\n",
-					pdm_sat_table->fix_beam_pattern_codeword, codeword_length));
-				
-				(pdm_sat_table->fix_beam_pattern_codeword) &= 0xffffff;
-				
-				PHYDM_DBG(p_dm, DBG_ANT_DIV, ("[ SmartAnt ] Auto modify to (0x%x)\n", pdm_sat_table->fix_beam_pattern_codeword));
-			}
+			/*@---------------------------------------------------------*/
+			PDM_SNPF(out_len, used, output + used, out_len - used,
+				 "Fix Beam Pattern\n");
 
-			pdm_sat_table->update_beam_codeword = pdm_sat_table->fix_beam_pattern_codeword;
+			/*@devide_num = (sat_tab->rfu_protocol_type == 2) ? 8 : 4;*/
 
-			/*---------------------------------------------------------*/
-			PHYDM_SNPRINTF((output + used, out_len - used, "Fix Beam Pattern\n"));
-			
-			/*devide_num = (pdm_sat_table->rfu_protocol_type == 2) ? 8 : 4;*/
-			
 			for (i = 0; i <= (codeword_length - 1); i++) {
-				beam_ctrl_signal = (boolean)((pdm_sat_table->update_beam_codeword & BIT(i)) >> i);
-
-				if (i == (codeword_length - 1)) {
-					PHYDM_SNPRINTF((output + used, out_len - used, "%d]\n", beam_ctrl_signal));
-					/**/
-				} else if (i == 0) {
-					PHYDM_SNPRINTF((output + used, out_len - used, "Send Codeword[1:%d] to RFU -> [%d", pdm_sat_table->rfu_codeword_total_bit_num, beam_ctrl_signal));
-					/**/
-				} else if ((i % devide_num) == (devide_num-1)) {
-					PHYDM_SNPRINTF((output + used, out_len - used, "%d|", beam_ctrl_signal));
-					/**/
-				} else {
-					PHYDM_SNPRINTF((output + used, out_len - used, "%d", beam_ctrl_signal));
-					/**/
-				}
+				beam_ctrl_signal = (boolean)((sat_tab->update_beam_codeword & BIT(i)) >> i);
+
+				if (i == (codeword_length - 1))
+					PDM_SNPF(out_len, used,
+						 output + used,
+						 out_len - used,
+						 "%d]\n",
+						 beam_ctrl_signal);
+				else if (i == 0)
+					PDM_SNPF(out_len, used,
+						 output + used,
+						 out_len - used,
+						 "Send Codeword[1:%d] to RFU -> [%d",
+						 sat_tab->rfu_codeword_total_bit_num,
+						 beam_ctrl_signal);
+				else if ((i % devide_num) == (devide_num - 1))
+					PDM_SNPF(out_len, used,
+						 output + used,
+						 out_len - used, "%d|",
+						 beam_ctrl_signal);
+				else
+					PDM_SNPF(out_len, used,
+						 output + used,
+						 out_len - used, "%d",
+						 beam_ctrl_signal);
 			}
-			/*---------------------------------------------------------*/
-
+/*@---------------------------------------------------------*/
 
-			#if DEV_BUS_TYPE == RT_PCI_INTERFACE
-			phydm_update_beam_pattern_type2(p_dm, pdm_sat_table->update_beam_codeword, pdm_sat_table->rfu_codeword_total_bit_num);
-			#else
-			odm_schedule_work_item(&pdm_sat_table->hl_smart_antenna_workitem);
+#if DEV_BUS_TYPE == RT_PCI_INTERFACE
+			if (dm->support_interface == ODM_ITRF_PCIE)
+				phydm_update_beam_pattern_type2(dm, sat_tab->update_beam_codeword, sat_tab->rfu_codeword_total_bit_num);
+#endif
+#if DEV_BUS_TYPE == RT_USB_INTERFACE || DEV_BUS_TYPE == RT_SDIO_INTERFACE
+			if (dm->support_interface == ODM_ITRF_USB || dm->support_interface == ODM_ITRF_SDIO)
+			odm_schedule_work_item(&sat_tab->hl_smart_antenna_workitem);
+#if 0
 			/*odm_stall_execution(1);*/
-			#endif
-		} else if (pdm_sat_table->fix_beam_pattern_en == 0)
-			PHYDM_SNPRINTF((output + used, out_len - used, "[ SmartAnt ] Smart Antenna: Enable\n"));
+#endif
+#endif
+		} else if (sat_tab->fix_beam_pattern_en == 0)
+			PDM_SNPF(out_len, used, output + used, out_len - used,
+				 "[ SmartAnt ] Smart Antenna: Enable\n");
 
 	} else if (dm_value[0] == 2) { /*set latch time*/
 
-		pdm_sat_table->latch_time = dm_value[1];
-		PHYDM_DBG(p_dm, DBG_ANT_DIV, ("[ SmartAnt ]  latch_time =0x%x\n", pdm_sat_table->latch_time));
+		sat_tab->latch_time = dm_value[1];
+		PHYDM_DBG(dm, DBG_ANT_DIV, "[ SmartAnt ]  latch_time =0x%x\n",
+			  sat_tab->latch_time);
 	} else if (dm_value[0] == 3) {
+		sat_tab->fix_training_num_en = dm_value[1];
 
-		pdm_sat_table->fix_training_num_en = dm_value[1];
-
-		if (pdm_sat_table->fix_training_num_en == 1) {
-			pdm_sat_table->per_beam_training_pkt_num = (u8)dm_value[2];
-			pdm_sat_table->decision_holding_period = (u8)dm_value[3];
+		if (sat_tab->fix_training_num_en == 1) {
+			sat_tab->per_beam_training_pkt_num = (u8)dm_value[2];
+			sat_tab->decision_holding_period = (u8)dm_value[3];
 
-			PHYDM_SNPRINTF((output + used, out_len - used, "[SmtAnt] Fix_train_en = (( %d )), train_pkt_num = (( %d )), holding_period = (( %d )),\n",
-				pdm_sat_table->fix_training_num_en, pdm_sat_table->per_beam_training_pkt_num, pdm_sat_table->decision_holding_period));
+			PDM_SNPF(out_len, used, output + used, out_len - used,
+				 "[SmtAnt] Fix_train_en = (( %d )), train_pkt_num = (( %d )), holding_period = (( %d )),\n",
+				 sat_tab->fix_training_num_en,
+				 sat_tab->per_beam_training_pkt_num,
+				 sat_tab->decision_holding_period);
 
-		} else if (pdm_sat_table->fix_training_num_en == 0) {
-			PHYDM_SNPRINTF((output + used, out_len - used, "[ SmartAnt ]  AUTO per_beam_training_pkt_num\n"));
-			/**/
+		} else if (sat_tab->fix_training_num_en == 0) {
+			PDM_SNPF(out_len, used, output + used, out_len - used,
+				 "[ SmartAnt ]  AUTO per_beam_training_pkt_num\n");
 		}
 	} else if (dm_value[0] == 4) {
 		#if 0
 		if (dm_value[1] == 1) {
-			pdm_sat_table->ant_num = 1;
-			pdm_sat_table->first_train_ant = MAIN_ANT;
+			sat_tab->ant_num = 1;
+			sat_tab->first_train_ant = MAIN_ANT;
 
 		} else if (dm_value[1] == 2) {
-			pdm_sat_table->ant_num = 1;
-			pdm_sat_table->first_train_ant = AUX_ANT;
+			sat_tab->ant_num = 1;
+			sat_tab->first_train_ant = AUX_ANT;
 
 		} else if (dm_value[1] == 3) {
-			pdm_sat_table->ant_num = 2;
-			pdm_sat_table->first_train_ant = MAIN_ANT;
+			sat_tab->ant_num = 2;
+			sat_tab->first_train_ant = MAIN_ANT;
 		}
 
-		PHYDM_SNPRINTF((output + used, out_len - used, "[ SmartAnt ]  Set ant Num = (( %d )), first_train_ant = (( %d ))\n",
-			pdm_sat_table->ant_num, (pdm_sat_table->first_train_ant - 1)));
+		PDM_SNPF((output + used, out_len - used,
+			 "[ SmartAnt ]  Set ant Num = (( %d )), first_train_ant = (( %d ))\n",
+			 sat_tab->ant_num, (sat_tab->first_train_ant - 1)));
 		#endif
-	} else if (dm_value[0] == 5) {	/*set beam set table*/
+	} else if (dm_value[0] == 5) { /*set beam set table*/
 
 		PHYDM_SSCANF(input[4], DCMD_HEX, &dm_value[3]);
 		PHYDM_SSCANF(input[5], DCMD_HEX, &dm_value[4]);
 
-		if (dm_value[1] == 1) { /*2G*/
+		if (dm_value[1] == 1) { /*@2G*/
 			if (dm_value[2] < SUPPORT_BEAM_SET_PATTERN_NUM) {
-				pdm_sat_table->rfu_codeword_table_2g[dm_value[2] ][0] = (u8)dm_value[3];
-				pdm_sat_table->rfu_codeword_table_2g[dm_value[2] ][1] = (u8)dm_value[4];
-				PHYDM_SNPRINTF((output + used, out_len - used, "[SmtAnt] Set 2G Table[%d] = [A:0x%x, B:0x%x]\n",dm_value[2], dm_value[3], dm_value[4]));
+				sat_tab->rfu_codeword_table_2g[dm_value[2]][0] = (u8)dm_value[3];
+				sat_tab->rfu_codeword_table_2g[dm_value[2]][1] = (u8)dm_value[4];
+				PDM_SNPF(out_len, used, output + used,
+					 out_len - used,
+					 "[SmtAnt] Set 2G Table[%d] = [A:0x%x, B:0x%x]\n",
+					 dm_value[2], dm_value[3], dm_value[4]);
 			}
-			
-		} else if (dm_value[1] == 2) { /*5G*/
+
+		} else if (dm_value[1] == 2) { /*@5G*/
 			if (dm_value[2] < SUPPORT_BEAM_SET_PATTERN_NUM) {
-				pdm_sat_table->rfu_codeword_table_5g[dm_value[2] ][0] = (u8)dm_value[3];
-				pdm_sat_table->rfu_codeword_table_5g[dm_value[2] ][1] = (u8)dm_value[4];
-				PHYDM_SNPRINTF((output + used, out_len - used, "[SmtAnt] Set5G Table[%d] = [A:0x%x, B:0x%x]\n",dm_value[2], dm_value[3], dm_value[4]));
+				sat_tab->rfu_codeword_table_5g[dm_value[2]][0] = (u8)dm_value[3];
+				sat_tab->rfu_codeword_table_5g[dm_value[2]][1] = (u8)dm_value[4];
+				PDM_SNPF(out_len, used, output + used,
+					 out_len - used,
+					 "[SmtAnt] Set5G Table[%d] = [A:0x%x, B:0x%x]\n",
+					 dm_value[2], dm_value[3], dm_value[4]);
 			}
-		} else  if (dm_value[1] == 0) {
-			PHYDM_SNPRINTF((output + used, out_len - used, "[SmtAnt] 2G Beam Table==============>\n"));
-			for (i = 0; i < pdm_sat_table->total_beam_set_num_2g; i++) {
-				PHYDM_SNPRINTF((output + used, out_len - used, "2G Table[%d] = [A:0x%x, B:0x%x]\n",
-					i, pdm_sat_table->rfu_codeword_table_2g[i][0], pdm_sat_table->rfu_codeword_table_2g[i][1]));
+		} else if (dm_value[1] == 0) {
+			PDM_SNPF(out_len, used, output + used, out_len - used,
+				 "[SmtAnt] 2G Beam Table==============>\n");
+			for (i = 0; i < sat_tab->total_beam_set_num_2g; i++) {
+				PDM_SNPF(out_len, used, output + used,
+					 out_len - used,
+					 "2G Table[%d] = [A:0x%x, B:0x%x]\n", i,
+					 sat_tab->rfu_codeword_table_2g[i][0],
+					 sat_tab->rfu_codeword_table_2g[i][1]);
 			}
-			PHYDM_SNPRINTF((output + used, out_len - used, "[SmtAnt] 5G Beam Table==============>\n"));
-			for (i = 0; i < pdm_sat_table->total_beam_set_num_5g; i++) {
-				PHYDM_SNPRINTF((output + used, out_len - used, "5G Table[%d] = [A:0x%x, B:0x%x]\n",
-					i, pdm_sat_table->rfu_codeword_table_5g[i][0], pdm_sat_table->rfu_codeword_table_5g[i][1]));
+			PDM_SNPF(out_len, used, output + used, out_len - used,
+				 "[SmtAnt] 5G Beam Table==============>\n");
+			for (i = 0; i < sat_tab->total_beam_set_num_5g; i++) {
+				PDM_SNPF(out_len, used, output + used,
+					 out_len - used,
+					 "5G Table[%d] = [A:0x%x, B:0x%x]\n", i,
+					 sat_tab->rfu_codeword_table_5g[i][0],
+					 sat_tab->rfu_codeword_table_5g[i][1]);
 			}
 		}
 
 	} else if (dm_value[0] == 6) {
-		#if 0
+#if 0
 		if (dm_value[1] == 0) {
 			if (dm_value[2] < SUPPORT_BEAM_SET_PATTERN_NUM) {
-				pdm_sat_table->rfu_codeword_table_5g[dm_value[2] ][0] = (u8)dm_value[3];
-				pdm_sat_table->rfu_codeword_table_5g[dm_value[2] ][1] = (u8)dm_value[4];
-				PHYDM_SNPRINTF((output + used, out_len - used, "[SmtAnt] Set5G Table[%d] = [A:0x%x, B:0x%x]\n",dm_value[2], dm_value[3], dm_value[4]));
+				sat_tab->rfu_codeword_table_5g[dm_value[2] ][0] = (u8)dm_value[3];
+				sat_tab->rfu_codeword_table_5g[dm_value[2] ][1] = (u8)dm_value[4];
+				PDM_SNPF((output + used, out_len - used,
+					 "[SmtAnt] Set5G Table[%d] = [A:0x%x, B:0x%x]\n",
+					 dm_value[2], dm_value[3],
+					 dm_value[4]));
 			}
 		} else {
-			for (i = 0; i < pdm_sat_table->total_beam_set_num_5g; i++) {
-				PHYDM_SNPRINTF((output + used, out_len - used, "[SmtAnt] Read 5G Table[%d] = [A:0x%x, B:0x%x]\n",
-					i, pdm_sat_table->rfu_codeword_table_5g[i][0], pdm_sat_table->rfu_codeword_table_5g[i][1]));
+			for (i = 0; i < sat_tab->total_beam_set_num_5g; i++) {
+				PDM_SNPF((output + used, out_len - used,
+					 "[SmtAnt] Read 5G Table[%d] = [A:0x%x, B:0x%x]\n",
+					 i,
+					 sat_tab->rfu_codeword_table_5g[i][0],
+					 sat_tab->rfu_codeword_table_5g[i][1]));
 			}
 		}
-		#endif
+#endif
 	} else if (dm_value[0] == 7) {
-
 		if (dm_value[1] == 1) {
-
-			pdm_sat_table->total_beam_set_num_2g = (u8)(dm_value[2]);
-			PHYDM_SNPRINTF((output + used, out_len - used, "[ SmartAnt ] total_beam_set_num_2g = ((%d))\n", pdm_sat_table->total_beam_set_num_2g));
+			sat_tab->total_beam_set_num_2g = (u8)(dm_value[2]);
+			PDM_SNPF(out_len, used, output + used, out_len - used,
+				 "[ SmartAnt ] total_beam_set_num_2g = ((%d))\n",
+				 sat_tab->total_beam_set_num_2g);
 
 		} else if (dm_value[1] == 2) {
-
-			pdm_sat_table->total_beam_set_num_5g = (u8)(dm_value[2]);
-			PHYDM_SNPRINTF((output + used, out_len - used, "[ SmartAnt ] total_beam_set_num_5g = ((%d))\n", pdm_sat_table->total_beam_set_num_5g));
+			sat_tab->total_beam_set_num_5g = (u8)(dm_value[2]);
+			PDM_SNPF(out_len, used, output + used, out_len - used,
+				 "[ SmartAnt ] total_beam_set_num_5g = ((%d))\n",
+				 sat_tab->total_beam_set_num_5g);
 		} else if (dm_value[1] == 0) {
-			PHYDM_SNPRINTF((output + used, out_len - used, "[ SmartAnt ] Show total_beam_set_num{2g,5g} = {%d,%d}\n", 
-				pdm_sat_table->total_beam_set_num_2g, pdm_sat_table->total_beam_set_num_5g));
+			PDM_SNPF(out_len, used, output + used, out_len - used,
+				 "[ SmartAnt ] Show total_beam_set_num{2g,5g} = {%d,%d}\n",
+				 sat_tab->total_beam_set_num_2g,
+				 sat_tab->total_beam_set_num_5g);
 		}
 
 	} else if (dm_value[0] == 8) {
-
-			if (dm_value[1] == 1) {
-				pdm_sat_table->rfu_protocol_delay_time = (u16)(dm_value[2]);
-				PHYDM_SNPRINTF((output + used, out_len - used, "[SmtAnt] Set rfu_protocol_delay_time = ((%d))\n", pdm_sat_table->rfu_protocol_delay_time));
-			} else if (dm_value[1] == 0) {
-				PHYDM_SNPRINTF((output + used, out_len - used, "[SmtAnt] Read rfu_protocol_delay_time = ((%d))\n", pdm_sat_table->rfu_protocol_delay_time));
-			}
+		if (dm_value[1] == 1) {
+			sat_tab->rfu_protocol_delay_time = (u16)(dm_value[2]);
+			PDM_SNPF(out_len, used, output + used, out_len - used,
+				 "[SmtAnt] Set rfu_protocol_delay_time = ((%d))\n",
+				 sat_tab->rfu_protocol_delay_time);
+		} else if (dm_value[1] == 0) {
+			PDM_SNPF(out_len, used, output + used, out_len - used,
+				 "[SmtAnt] Read rfu_protocol_delay_time = ((%d))\n",
+				 sat_tab->rfu_protocol_delay_time);
+		}
 	}
 
 	*_used = used;
 	*_out_len = out_len;
 }
 
-void
-phydm_set_rfu_beam_pattern_type2(
-	void		*p_dm_void
-)
+void phydm_set_rfu_beam_pattern_type2(
+	void *dm_void)
 {
-	struct PHY_DM_STRUCT				*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	struct smt_ant_honbo	*pdm_sat_table = &(p_dm->dm_sat_table);
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct smt_ant_honbo *sat_tab = &dm->dm_sat_table;
 
-	if (p_dm->ant_div_type != HL_SW_SMART_ANT_TYPE2)
+	if (dm->ant_div_type != HL_SW_SMART_ANT_TYPE2)
 		return;
 
-	PHYDM_DBG(p_dm, DBG_ANT_DIV, ("Training beam_set index = (( 0x%x ))\n", pdm_sat_table->fast_training_beam_num));
-	pdm_sat_table->update_beam_codeword = phydm_construct_hb_rfu_codeword_type2(p_dm, pdm_sat_table->fast_training_beam_num);
+	PHYDM_DBG(dm, DBG_ANT_DIV, "Training beam_set index = (( 0x%x ))\n",
+		  sat_tab->fast_training_beam_num);
+	sat_tab->update_beam_codeword = phydm_construct_hb_rfu_codeword_type2(dm, sat_tab->fast_training_beam_num);
 
 	#if DEV_BUS_TYPE == RT_PCI_INTERFACE
-	phydm_update_beam_pattern_type2(p_dm, pdm_sat_table->update_beam_codeword, pdm_sat_table->rfu_codeword_total_bit_num);
-	#else
-	odm_schedule_work_item(&pdm_sat_table->hl_smart_antenna_workitem);
+	if (dm->support_interface == ODM_ITRF_PCIE)
+		phydm_update_beam_pattern_type2(dm, sat_tab->update_beam_codeword, sat_tab->rfu_codeword_total_bit_num);
+	#endif
+	#if DEV_BUS_TYPE == RT_USB_INTERFACE || DEV_BUS_TYPE == RT_SDIO_INTERFACE
+	if (dm->support_interface == ODM_ITRF_USB || dm->support_interface == ODM_ITRF_SDIO)
+		odm_schedule_work_item(&sat_tab->hl_smart_antenna_workitem);
+#if 0
 	/*odm_stall_execution(1);*/
+#endif
 	#endif
 }
 
-void
-phydm_fast_ant_training_hl_smart_antenna_type2(
-	void		*p_dm_void
-)
+void phydm_fast_ant_training_hl_smart_antenna_type2(
+	void *dm_void)
 {
-	struct PHY_DM_STRUCT				*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	struct smt_ant_honbo	*pdm_sat_table = &(p_dm->dm_sat_table);
-	struct phydm_fat_struct		*p_dm_fat_table	 = &(p_dm->dm_fat_table);
-	struct _sw_antenna_switch_				*p_dm_swat_table = &p_dm->dm_swat_table;
-	u32		codeword = 0;
-	u8		i = 0, j=0;
-	u8		avg_rssi_tmp;
-	u8		avg_rssi_tmp_ma;
-	u8		max_beam_ant_rssi = 0;
-	u8		rssi_target_beam = 0, target_beam_max_rssi = 0;
-	u8		evm1ss_target_beam = 0, evm2ss_target_beam = 0;
-	u32		target_beam_max_evm1ss = 0, target_beam_max_evm2ss = 0;
-	u32		beam_tmp;
-	u8		per_beam_val_diff_tmp = 0, training_pkt_num_offset;
-	u32		avg_evm2ss[2] = {0}, avg_evm2ss_sum = 0;
-	u32		avg_evm1ss = 0;
-	u32		beam_path_evm_2ss_cnt_all = 0; /*sum of all 2SS-pattern cnt*/
-	u32		beam_path_evm_1ss_cnt_all = 0; /*sum of all 1SS-pattern cnt*/
-	u8		decision_type;
-
-	if (!p_dm->is_linked) {
-		PHYDM_DBG(p_dm, DBG_ANT_DIV, ("[No Link!!!]\n"));
-
-		if (p_dm_fat_table->is_become_linked == true) {
-
-			pdm_sat_table->decision_holding_period = 0;
-			PHYDM_DBG(p_dm, DBG_ANT_DIV, ("Link->no Link\n"));
-			p_dm_fat_table->fat_state = FAT_BEFORE_LINK_STATE;
-			PHYDM_DBG(p_dm, DBG_ANT_DIV, ("change to (( %d )) FAT_state\n", p_dm_fat_table->fat_state));
-			p_dm_fat_table->is_become_linked = p_dm->is_linked;
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct smt_ant_honbo *sat_tab = &dm->dm_sat_table;
+	struct phydm_fat_struct *fat_tab = &dm->dm_fat_table;
+	struct sw_antenna_switch *dm_swat_table = &dm->dm_swat_table;
+	u32 codeword = 0;
+	u8 i = 0, j = 0;
+	u8 avg_rssi_tmp;
+	u8 avg_rssi_tmp_ma;
+	u8 max_beam_ant_rssi = 0;
+	u8 rssi_target_beam = 0, target_beam_max_rssi = 0;
+	u8 evm1ss_target_beam = 0, evm2ss_target_beam = 0;
+	u32 target_beam_max_evm1ss = 0, target_beam_max_evm2ss = 0;
+	u32 beam_tmp;
+	u8 per_beam_val_diff_tmp = 0, training_pkt_num_offset;
+	u32 avg_evm2ss[2] = {0}, avg_evm2ss_sum = 0;
+	u32 avg_evm1ss = 0;
+	u32 beam_path_evm_2ss_cnt_all = 0; /*sum of all 2SS-pattern cnt*/
+	u32 beam_path_evm_1ss_cnt_all = 0; /*sum of all 1SS-pattern cnt*/
+	u8 decision_type;
+
+	if (!dm->is_linked) {
+		PHYDM_DBG(dm, DBG_ANT_DIV, "[No Link!!!]\n");
+
+		if (fat_tab->is_become_linked == true) {
+			sat_tab->decision_holding_period = 0;
+			PHYDM_DBG(dm, DBG_ANT_DIV, "Link->no Link\n");
+			fat_tab->fat_state = FAT_BEFORE_LINK_STATE;
+			PHYDM_DBG(dm, DBG_ANT_DIV,
+				  "change to (( %d )) FAT_state\n",
+				  fat_tab->fat_state);
+			fat_tab->is_become_linked = dm->is_linked;
 		}
 		return;
 
 	} else {
-		if (p_dm_fat_table->is_become_linked == false) {
+		if (fat_tab->is_become_linked == false) {
+			PHYDM_DBG(dm, DBG_ANT_DIV, "[Linked !!!]\n");
 
-			PHYDM_DBG(p_dm, DBG_ANT_DIV, ("[Linked !!!]\n"));
+			fat_tab->fat_state = FAT_PREPARE_STATE;
+			PHYDM_DBG(dm, DBG_ANT_DIV,
+				  "change to (( %d )) FAT_state\n",
+				  fat_tab->fat_state);
 
-			p_dm_fat_table->fat_state = FAT_PREPARE_STATE;
-			PHYDM_DBG(p_dm, DBG_ANT_DIV, ("change to (( %d )) FAT_state\n", p_dm_fat_table->fat_state));
+			/*sat_tab->fast_training_beam_num = 0;*/
+			/*phydm_set_rfu_beam_pattern_type2(dm);*/
 
-			/*pdm_sat_table->fast_training_beam_num = 0;*/
-			/*phydm_set_rfu_beam_pattern_type2(p_dm);*/
-
-			p_dm_fat_table->is_become_linked = p_dm->is_linked;
+			fat_tab->is_become_linked = dm->is_linked;
 		}
 	}
 
+#if 0
+	/*PHYDM_DBG(dm, DBG_ANT_DIV, "HL Smart ant Training: state (( %d ))\n", fat_tab->fat_state);*/
+#endif
 
-	/*PHYDM_DBG(p_dm, DBG_ANT_DIV, ("HL Smart ant Training: state (( %d ))\n", p_dm_fat_table->fat_state));*/
-
-	/* [DECISION STATE] */
-	/*=======================================================================================*/
-	if (p_dm_fat_table->fat_state == FAT_DECISION_STATE) {
-
-		PHYDM_DBG(p_dm, DBG_ANT_DIV, ("[ 3. In Decision state]\n"));
-
-		/*compute target beam in each antenna*/
+	/* @[DECISION STATE] */
+	/*@=======================================================================================*/
+	if (fat_tab->fat_state == FAT_DECISION_STATE) {
+		PHYDM_DBG(dm, DBG_ANT_DIV, "[ 3. In Decision state]\n");
 
-		for (j = 0; j < (pdm_sat_table->total_beam_set_num); j++) {
+		/*@compute target beam in each antenna*/
 
-			/*[Decision1: RSSI]-------------------------------------------------------------------*/
-			if (pdm_sat_table->statistic_pkt_cnt[j] == 0) {	/*if new RSSI = 0 -> MA_RSSI-=2*/
-				avg_rssi_tmp = pdm_sat_table->beam_set_avg_rssi_pre[j];
+		for (j = 0; j < (sat_tab->total_beam_set_num); j++) {
+			/*@[Decision1: RSSI]-------------------------------------------------------------------*/
+			if (sat_tab->statistic_pkt_cnt[j] == 0) { /*@if new RSSI = 0 -> MA_RSSI-=2*/
+				avg_rssi_tmp = sat_tab->beam_set_avg_rssi_pre[j];
 				avg_rssi_tmp = (avg_rssi_tmp >= 2) ? (avg_rssi_tmp - 2) : avg_rssi_tmp;
 				avg_rssi_tmp_ma = avg_rssi_tmp;
 			} else {
-				avg_rssi_tmp = (u8)((pdm_sat_table->beam_set_rssi_avg_sum[j]) / (pdm_sat_table->statistic_pkt_cnt[j]));
-				avg_rssi_tmp_ma = (avg_rssi_tmp + pdm_sat_table->beam_set_avg_rssi_pre[j]) >> 1;
+				avg_rssi_tmp = (u8)((sat_tab->beam_set_rssi_avg_sum[j]) / (sat_tab->statistic_pkt_cnt[j]));
+				avg_rssi_tmp_ma = (avg_rssi_tmp + sat_tab->beam_set_avg_rssi_pre[j]) >> 1;
 			}
 
-			pdm_sat_table->beam_set_avg_rssi_pre[j] = avg_rssi_tmp;
+			sat_tab->beam_set_avg_rssi_pre[j] = avg_rssi_tmp;
 
 			if (avg_rssi_tmp > target_beam_max_rssi) {
 				rssi_target_beam = j;
 				target_beam_max_rssi = avg_rssi_tmp;
 			}
 
-			/*[Decision2: EVM 2ss]-------------------------------------------------------------------*/
-			if (pdm_sat_table->beam_path_evm_2ss_cnt[j] != 0) {
-				avg_evm2ss[0] =  pdm_sat_table->beam_path_evm_2ss_sum[j][0] / pdm_sat_table->beam_path_evm_2ss_cnt[j];
-				avg_evm2ss[1] =  pdm_sat_table->beam_path_evm_2ss_sum[j][1] / pdm_sat_table->beam_path_evm_2ss_cnt[j];
+			/*@[Decision2: EVM 2ss]-------------------------------------------------------------------*/
+			if (sat_tab->beam_path_evm_2ss_cnt[j] != 0) {
+				avg_evm2ss[0] = sat_tab->beam_path_evm_2ss_sum[j][0] / sat_tab->beam_path_evm_2ss_cnt[j];
+				avg_evm2ss[1] = sat_tab->beam_path_evm_2ss_sum[j][1] / sat_tab->beam_path_evm_2ss_cnt[j];
 				avg_evm2ss_sum = avg_evm2ss[0] + avg_evm2ss[1];
-				beam_path_evm_2ss_cnt_all += pdm_sat_table->beam_path_evm_2ss_cnt[j];
+				beam_path_evm_2ss_cnt_all += sat_tab->beam_path_evm_2ss_cnt[j];
 
-				pdm_sat_table->beam_set_avg_evm_2ss_pre[j] = (u8)avg_evm2ss_sum;
+				sat_tab->beam_set_avg_evm_2ss_pre[j] = (u8)avg_evm2ss_sum;
 			}
 
 			if (avg_evm2ss_sum > target_beam_max_evm2ss) {
@@ -932,578 +1018,590 @@ phydm_fast_ant_training_hl_smart_antenna_type2(
 				target_beam_max_evm2ss = avg_evm2ss_sum;
 			}
 
-			/*[Decision3: EVM 1ss]-------------------------------------------------------------------*/
-			if (pdm_sat_table->beam_path_evm_1ss_cnt[j] != 0) {
-				avg_evm1ss =  pdm_sat_table->beam_path_evm_1ss_sum[j] / pdm_sat_table->beam_path_evm_1ss_cnt[j];
-				beam_path_evm_1ss_cnt_all += pdm_sat_table->beam_path_evm_1ss_cnt[j];
+			/*@[Decision3: EVM 1ss]-------------------------------------------------------------------*/
+			if (sat_tab->beam_path_evm_1ss_cnt[j] != 0) {
+				avg_evm1ss = sat_tab->beam_path_evm_1ss_sum[j] / sat_tab->beam_path_evm_1ss_cnt[j];
+				beam_path_evm_1ss_cnt_all += sat_tab->beam_path_evm_1ss_cnt[j];
 
-				pdm_sat_table->beam_set_avg_evm_1ss_pre[j] = (u8)avg_evm1ss;
+				sat_tab->beam_set_avg_evm_1ss_pre[j] = (u8)avg_evm1ss;
 			}
-				
+
 			if (avg_evm1ss > target_beam_max_evm1ss) {
 				evm1ss_target_beam = j;
 				target_beam_max_evm1ss = avg_evm1ss;
 			}
 
-			PHYDM_DBG(p_dm, DBG_ANT_DIV, ("Beam[%d] Pkt_cnt=(( %d )), avg{MA,rssi}={%d, %d}, EVM1={%d}, EVM2={%d, %d, %d}\n",
-				j, pdm_sat_table->statistic_pkt_cnt[j], avg_rssi_tmp_ma, avg_rssi_tmp, avg_evm1ss, avg_evm2ss[0], avg_evm2ss[1], avg_evm2ss_sum));
+			PHYDM_DBG(dm, DBG_ANT_DIV,
+				  "Beam[%d] Pkt_cnt=(( %d )), avg{MA,rssi}={%d, %d}, EVM1={%d}, EVM2={%d, %d, %d}\n",
+				  j, sat_tab->statistic_pkt_cnt[j],
+				  avg_rssi_tmp_ma, avg_rssi_tmp, avg_evm1ss,
+				  avg_evm2ss[0], avg_evm2ss[1], avg_evm2ss_sum);
 
 			/*reset counter value*/
-			pdm_sat_table->beam_set_rssi_avg_sum[j] = 0;
-			pdm_sat_table->beam_path_rssi_sum[j][0] = 0;
-			pdm_sat_table->beam_path_rssi_sum[j][1] = 0;
-			pdm_sat_table->statistic_pkt_cnt[j] = 0;
-			
-			pdm_sat_table->beam_path_evm_2ss_sum[j][0] = 0;
-			pdm_sat_table->beam_path_evm_2ss_sum[j][1] = 0;
-			pdm_sat_table->beam_path_evm_2ss_cnt[j] = 0;
-			
-			pdm_sat_table->beam_path_evm_1ss_sum[j] = 0;
-			pdm_sat_table->beam_path_evm_1ss_cnt[j] = 0;
+			sat_tab->beam_set_rssi_avg_sum[j] = 0;
+			sat_tab->beam_path_rssi_sum[j][0] = 0;
+			sat_tab->beam_path_rssi_sum[j][1] = 0;
+			sat_tab->statistic_pkt_cnt[j] = 0;
+
+			sat_tab->beam_path_evm_2ss_sum[j][0] = 0;
+			sat_tab->beam_path_evm_2ss_sum[j][1] = 0;
+			sat_tab->beam_path_evm_2ss_cnt[j] = 0;
+
+			sat_tab->beam_path_evm_1ss_sum[j] = 0;
+			sat_tab->beam_path_evm_1ss_cnt[j] = 0;
 		}
-		
-		/*[Joint Decision]-------------------------------------------------------------------*/
-		PHYDM_DBG(p_dm, DBG_ANT_DIV, ("--->1.[RSSI]      Target Beam(( %d )) RSSI_max=((%d))\n", rssi_target_beam, target_beam_max_rssi));
-		PHYDM_DBG(p_dm, DBG_ANT_DIV, ("--->2.[Evm2SS] Target Beam(( %d )) EVM2SS_max=((%d))\n", evm2ss_target_beam, target_beam_max_evm2ss));
-		PHYDM_DBG(p_dm, DBG_ANT_DIV, ("--->3.[Evm1SS] Target Beam(( %d )) EVM1SS_max=((%d))\n", evm1ss_target_beam, target_beam_max_evm1ss));
+
+		/*@[Joint Decision]-------------------------------------------------------------------*/
+		PHYDM_DBG(dm, DBG_ANT_DIV,
+			  "--->1.[RSSI]      Target Beam(( %d )) RSSI_max=((%d))\n",
+			  rssi_target_beam, target_beam_max_rssi);
+		PHYDM_DBG(dm, DBG_ANT_DIV,
+			  "--->2.[Evm2SS] Target Beam(( %d )) EVM2SS_max=((%d))\n",
+			  evm2ss_target_beam, target_beam_max_evm2ss);
+		PHYDM_DBG(dm, DBG_ANT_DIV,
+			  "--->3.[Evm1SS] Target Beam(( %d )) EVM1SS_max=((%d))\n",
+			  evm1ss_target_beam, target_beam_max_evm1ss);
 
 		if (target_beam_max_rssi <= 10) {
-			pdm_sat_table->rx_idle_beam_set_idx = rssi_target_beam;
+			sat_tab->rx_idle_beam_set_idx = rssi_target_beam;
 			decision_type = 1;
 		} else {
 			if (beam_path_evm_2ss_cnt_all != 0) {
-				pdm_sat_table->rx_idle_beam_set_idx = evm2ss_target_beam;
+				sat_tab->rx_idle_beam_set_idx = evm2ss_target_beam;
 				decision_type = 2;
 			} else if (beam_path_evm_1ss_cnt_all != 0) {
-				pdm_sat_table->rx_idle_beam_set_idx = evm1ss_target_beam;
+				sat_tab->rx_idle_beam_set_idx = evm1ss_target_beam;
 				decision_type = 3;
 			} else {
-				pdm_sat_table->rx_idle_beam_set_idx = rssi_target_beam;
+				sat_tab->rx_idle_beam_set_idx = rssi_target_beam;
 				decision_type = 1;
 			}
 		}
 
-		PHYDM_DBG(p_dm, DBG_ANT_DIV, ("---> Decision_type=((%d)), Final Target Beam(( %d ))\n", decision_type, pdm_sat_table->rx_idle_beam_set_idx));
-
-		/*Calculate packet counter offset*/
-		for (j = 0; j < (pdm_sat_table->total_beam_set_num); j++) {
+		PHYDM_DBG(dm, DBG_ANT_DIV,
+			  "---> Decision_type=((%d)), Final Target Beam(( %d ))\n",
+			  decision_type, sat_tab->rx_idle_beam_set_idx);
 
+		/*@Calculate packet counter offset*/
+		for (j = 0; j < (sat_tab->total_beam_set_num); j++) {
 			if (decision_type == 1) {
-				per_beam_val_diff_tmp = target_beam_max_rssi - pdm_sat_table->beam_set_avg_rssi_pre[j];
-				
+				per_beam_val_diff_tmp = target_beam_max_rssi - sat_tab->beam_set_avg_rssi_pre[j];
+
 			} else if (decision_type == 2) {
-				per_beam_val_diff_tmp = ((u8)target_beam_max_evm2ss - pdm_sat_table->beam_set_avg_evm_2ss_pre[j]) >> 1;
+				per_beam_val_diff_tmp = ((u8)target_beam_max_evm2ss - sat_tab->beam_set_avg_evm_2ss_pre[j]) >> 1;
 			} else if (decision_type == 3) {
-				per_beam_val_diff_tmp = (u8)target_beam_max_evm1ss - pdm_sat_table->beam_set_avg_evm_1ss_pre[j];
+				per_beam_val_diff_tmp = (u8)target_beam_max_evm1ss - sat_tab->beam_set_avg_evm_1ss_pre[j];
 			}
-			pdm_sat_table->beam_set_train_val_diff[j] = per_beam_val_diff_tmp;
-			PHYDM_DBG(p_dm, DBG_ANT_DIV, ("Beam_Set[%d]: diff= ((%d))\n", j, per_beam_val_diff_tmp));
+			sat_tab->beam_set_train_val_diff[j] = per_beam_val_diff_tmp;
+			PHYDM_DBG(dm, DBG_ANT_DIV,
+				  "Beam_Set[%d]: diff= ((%d))\n", j,
+				  per_beam_val_diff_tmp);
 		}
 
 		/*set beam in each antenna*/
-		phydm_update_rx_idle_beam_type2(p_dm);
-		p_dm_fat_table->fat_state = FAT_PREPARE_STATE;
-
+		phydm_update_rx_idle_beam_type2(dm);
+		fat_tab->fat_state = FAT_PREPARE_STATE;
 	}
-	/* [TRAINING STATE] */
-	else if (p_dm_fat_table->fat_state == FAT_TRAINING_STATE) {
-		PHYDM_DBG(p_dm, DBG_ANT_DIV, ("[ 2. In Training state]\n"));
+	/* @[TRAINING STATE] */
+	else if (fat_tab->fat_state == FAT_TRAINING_STATE) {
+		PHYDM_DBG(dm, DBG_ANT_DIV, "[ 2. In Training state]\n");
 
-		PHYDM_DBG(p_dm, DBG_ANT_DIV, ("curr_beam_idx = (( %d )), pre_beam_idx = (( %d ))\n",
-			pdm_sat_table->fast_training_beam_num, pdm_sat_table->pre_fast_training_beam_num));
+		PHYDM_DBG(dm, DBG_ANT_DIV,
+			  "curr_beam_idx = (( %d )), pre_beam_idx = (( %d ))\n",
+			  sat_tab->fast_training_beam_num,
+			  sat_tab->pre_fast_training_beam_num);
 
-		if (pdm_sat_table->fast_training_beam_num > pdm_sat_table->pre_fast_training_beam_num)
+		if (sat_tab->fast_training_beam_num > sat_tab->pre_fast_training_beam_num)
 
-			pdm_sat_table->force_update_beam_en = 0;
+			sat_tab->force_update_beam_en = 0;
 
 		else {
+			sat_tab->force_update_beam_en = 1;
 
-			pdm_sat_table->force_update_beam_en = 1;
-
-			pdm_sat_table->pkt_counter = 0;
-			beam_tmp = pdm_sat_table->fast_training_beam_num;
-			if (pdm_sat_table->fast_training_beam_num >= ((u32)pdm_sat_table->total_beam_set_num - 1)) {
-
-				PHYDM_DBG(p_dm, DBG_ANT_DIV, ("[Timeout Update]  Beam_num (( %d )) -> (( decision ))\n", pdm_sat_table->fast_training_beam_num));
-				p_dm_fat_table->fat_state = FAT_DECISION_STATE;
-				phydm_fast_ant_training_hl_smart_antenna_type2(p_dm);
+			sat_tab->pkt_counter = 0;
+			beam_tmp = sat_tab->fast_training_beam_num;
+			if (sat_tab->fast_training_beam_num >= ((u32)sat_tab->total_beam_set_num - 1)) {
+				PHYDM_DBG(dm, DBG_ANT_DIV,
+					  "[Timeout Update]  Beam_num (( %d )) -> (( decision ))\n",
+					  sat_tab->fast_training_beam_num);
+				fat_tab->fat_state = FAT_DECISION_STATE;
+				phydm_fast_ant_training_hl_smart_antenna_type2(dm);
 
 			} else {
-				pdm_sat_table->fast_training_beam_num++;
-
-				PHYDM_DBG(p_dm, DBG_ANT_DIV, ("[Timeout Update]  Beam_num (( %d )) -> (( %d ))\n", beam_tmp, pdm_sat_table->fast_training_beam_num));
-				phydm_set_rfu_beam_pattern_type2(p_dm);
-				p_dm_fat_table->fat_state = FAT_TRAINING_STATE;
-
+				sat_tab->fast_training_beam_num++;
+
+				PHYDM_DBG(dm, DBG_ANT_DIV,
+					  "[Timeout Update]  Beam_num (( %d )) -> (( %d ))\n",
+					  beam_tmp,
+					  sat_tab->fast_training_beam_num);
+				phydm_set_rfu_beam_pattern_type2(dm);
+				fat_tab->fat_state = FAT_TRAINING_STATE;
 			}
 		}
-		pdm_sat_table->pre_fast_training_beam_num = pdm_sat_table->fast_training_beam_num;
-		PHYDM_DBG(p_dm, DBG_ANT_DIV, ("Update Pre_Beam =(( %d ))\n", pdm_sat_table->pre_fast_training_beam_num));
+		sat_tab->pre_fast_training_beam_num = sat_tab->fast_training_beam_num;
+		PHYDM_DBG(dm, DBG_ANT_DIV, "Update Pre_Beam =(( %d ))\n",
+			  sat_tab->pre_fast_training_beam_num);
 	}
-	/*  [Prepare state] */
-	/*=======================================================================================*/
-	else if (p_dm_fat_table->fat_state == FAT_PREPARE_STATE) {
-
-		PHYDM_DBG(p_dm, DBG_ANT_DIV, ("\n\n[ 1. In Prepare state]\n"));
-
-		if (p_dm->pre_traffic_load == (p_dm->traffic_load)) {
-			if (pdm_sat_table->decision_holding_period != 0) {
-				PHYDM_DBG(p_dm, DBG_ANT_DIV, ("Holding_period = (( %d )), return!!!\n", pdm_sat_table->decision_holding_period));
-				pdm_sat_table->decision_holding_period--;
+	/*  @[Prepare state] */
+	/*@=======================================================================================*/
+	else if (fat_tab->fat_state == FAT_PREPARE_STATE) {
+		PHYDM_DBG(dm, DBG_ANT_DIV, "\n\n[ 1. In Prepare state]\n");
+
+		if (dm->pre_traffic_load == dm->traffic_load) {
+			if (sat_tab->decision_holding_period != 0) {
+				PHYDM_DBG(dm, DBG_ANT_DIV,
+					  "Holding_period = (( %d )), return!!!\n",
+					  sat_tab->decision_holding_period);
+				sat_tab->decision_holding_period--;
 				return;
 			}
 		}
 
 		/* Set training packet number*/
-		if (pdm_sat_table->fix_training_num_en == 0) {
-
-			switch (p_dm->traffic_load) {
-
+		if (sat_tab->fix_training_num_en == 0) {
+			switch (dm->traffic_load) {
 			case TRAFFIC_HIGH:
-				pdm_sat_table->per_beam_training_pkt_num = 8;
-				pdm_sat_table->decision_holding_period = 2;
+				sat_tab->per_beam_training_pkt_num = 8;
+				sat_tab->decision_holding_period = 2;
 				break;
 			case TRAFFIC_MID:
-				pdm_sat_table->per_beam_training_pkt_num = 6;
-				pdm_sat_table->decision_holding_period = 3;
+				sat_tab->per_beam_training_pkt_num = 6;
+				sat_tab->decision_holding_period = 3;
 				break;
 			case TRAFFIC_LOW:
-				pdm_sat_table->per_beam_training_pkt_num = 3; /*ping 60000*/
-				pdm_sat_table->decision_holding_period = 4;
+				sat_tab->per_beam_training_pkt_num = 3; /*ping 60000*/
+				sat_tab->decision_holding_period = 4;
 				break;
 			case TRAFFIC_ULTRA_LOW:
-				pdm_sat_table->per_beam_training_pkt_num = 1;
-				pdm_sat_table->decision_holding_period = 6;
+				sat_tab->per_beam_training_pkt_num = 1;
+				sat_tab->decision_holding_period = 6;
 				break;
 			default:
 				break;
 			}
 		}
-		
-		PHYDM_DBG(p_dm, DBG_ANT_DIV, ("TrafficLoad = (( %d )), Fix_beam = (( %d )), per_beam_training_pkt_num = (( %d )), decision_holding_period = ((%d))\n",
-			p_dm->traffic_load, pdm_sat_table->fix_training_num_en, pdm_sat_table->per_beam_training_pkt_num, pdm_sat_table->decision_holding_period));
-
-		/*Beam_set number*/
-		if (*p_dm->p_band_type == ODM_BAND_5G) {
-			pdm_sat_table->total_beam_set_num = pdm_sat_table->total_beam_set_num_5g;
-			PHYDM_DBG(p_dm, DBG_ANT_DIV, ("5G beam_set num = ((%d))\n", pdm_sat_table->total_beam_set_num));
+
+		PHYDM_DBG(dm, DBG_ANT_DIV,
+			  "TrafficLoad = (( %d )), Fix_beam = (( %d )), per_beam_training_pkt_num = (( %d )), decision_holding_period = ((%d))\n",
+			  dm->traffic_load, sat_tab->fix_training_num_en,
+			  sat_tab->per_beam_training_pkt_num,
+			  sat_tab->decision_holding_period);
+
+		/*@Beam_set number*/
+		if (*dm->band_type == ODM_BAND_5G) {
+			sat_tab->total_beam_set_num = sat_tab->total_beam_set_num_5g;
+			PHYDM_DBG(dm, DBG_ANT_DIV, "5G beam_set num = ((%d))\n",
+				  sat_tab->total_beam_set_num);
 		} else {
-			pdm_sat_table->total_beam_set_num = pdm_sat_table->total_beam_set_num_2g;
-			PHYDM_DBG(p_dm, DBG_ANT_DIV, ("2G beam_set num = ((%d))\n", pdm_sat_table->total_beam_set_num));
+			sat_tab->total_beam_set_num = sat_tab->total_beam_set_num_2g;
+			PHYDM_DBG(dm, DBG_ANT_DIV, "2G beam_set num = ((%d))\n",
+				  sat_tab->total_beam_set_num);
 		}
 
-		for (j = 0; j < (pdm_sat_table->total_beam_set_num); j++) {
-
-			training_pkt_num_offset = pdm_sat_table->beam_set_train_val_diff[j];
+		for (j = 0; j < (sat_tab->total_beam_set_num); j++) {
+			training_pkt_num_offset = sat_tab->beam_set_train_val_diff[j];
 
-			if ((pdm_sat_table->per_beam_training_pkt_num) > training_pkt_num_offset)
-				pdm_sat_table->beam_set_train_cnt[j] = pdm_sat_table->per_beam_training_pkt_num - training_pkt_num_offset;
+			if (sat_tab->per_beam_training_pkt_num > training_pkt_num_offset)
+				sat_tab->beam_set_train_cnt[j] = sat_tab->per_beam_training_pkt_num - training_pkt_num_offset;
 			else
-				pdm_sat_table->beam_set_train_cnt[j] = 1;
+				sat_tab->beam_set_train_cnt[j] = 1;
 
-			PHYDM_DBG(p_dm, DBG_ANT_DIV, ("Beam_Set[ %d ] training_pkt_offset = ((%d)), training_pkt_num = ((%d))\n",
-				j, pdm_sat_table->beam_set_train_val_diff[j], pdm_sat_table->beam_set_train_cnt[j]));
+			PHYDM_DBG(dm, DBG_ANT_DIV,
+				  "Beam_Set[ %d ] training_pkt_offset = ((%d)), training_pkt_num = ((%d))\n",
+				  j, sat_tab->beam_set_train_val_diff[j],
+				  sat_tab->beam_set_train_cnt[j]);
 		}
-		
-		pdm_sat_table->pre_beacon_counter = pdm_sat_table->beacon_counter;
-		pdm_sat_table->update_beam_idx = 0;
-		pdm_sat_table->pkt_counter = 0;
-		
-		pdm_sat_table->fast_training_beam_num = 0;
-		phydm_set_rfu_beam_pattern_type2(p_dm);
-		pdm_sat_table->pre_fast_training_beam_num = pdm_sat_table->fast_training_beam_num;
-		p_dm_fat_table->fat_state = FAT_TRAINING_STATE;
-	}
 
+		sat_tab->pre_beacon_counter = sat_tab->beacon_counter;
+		sat_tab->update_beam_idx = 0;
+		sat_tab->pkt_counter = 0;
+
+		sat_tab->fast_training_beam_num = 0;
+		phydm_set_rfu_beam_pattern_type2(dm);
+		sat_tab->pre_fast_training_beam_num = sat_tab->fast_training_beam_num;
+		fat_tab->fat_state = FAT_TRAINING_STATE;
+	}
 }
 
 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
 
-void
-phydm_beam_switch_workitem_callback(
-	void	*p_context
-)
+void phydm_beam_switch_workitem_callback(
+	void *context)
 {
-	struct _ADAPTER		*p_adapter = (struct _ADAPTER *)p_context;
-	HAL_DATA_TYPE	*p_hal_data = GET_HAL_DATA(p_adapter);
-	struct PHY_DM_STRUCT		*p_dm = &p_hal_data->DM_OutSrc;
-	struct smt_ant_honbo			*pdm_sat_table = &(p_dm->dm_sat_table);
+	void *adapter = (void *)context;
+	HAL_DATA_TYPE *hal_data = GET_HAL_DATA(((PADAPTER)adapter));
+	struct dm_struct *dm = &hal_data->DM_OutSrc;
+	struct smt_ant_honbo *sat_tab = &dm->dm_sat_table;
 
 #if DEV_BUS_TYPE != RT_PCI_INTERFACE
-	pdm_sat_table->pkt_skip_statistic_en = 1;
+	sat_tab->pkt_skip_statistic_en = 1;
 #endif
-	PHYDM_DBG(p_dm, DBG_ANT_DIV, ("[ SmartAnt ] Beam Switch Workitem Callback, pkt_skip_statistic_en = (( %d ))\n", pdm_sat_table->pkt_skip_statistic_en));
+	PHYDM_DBG(dm, DBG_ANT_DIV,
+		  "[ SmartAnt ] Beam Switch Workitem Callback, pkt_skip_statistic_en = (( %d ))\n",
+		  sat_tab->pkt_skip_statistic_en);
 
-	phydm_update_beam_pattern_type2(p_dm, pdm_sat_table->update_beam_codeword, pdm_sat_table->rfu_codeword_total_bit_num);
+	phydm_update_beam_pattern_type2(dm, sat_tab->update_beam_codeword, sat_tab->rfu_codeword_total_bit_num);
 
 #if DEV_BUS_TYPE != RT_PCI_INTERFACE
-	/*odm_stall_execution(pdm_sat_table->latch_time);*/
-	pdm_sat_table->pkt_skip_statistic_en = 0;
+#if 0
+	/*odm_stall_execution(sat_tab->latch_time);*/
+#endif
+	sat_tab->pkt_skip_statistic_en = 0;
 #endif
-	PHYDM_DBG(p_dm, DBG_ANT_DIV, ("pkt_skip_statistic_en = (( %d )), latch_time = (( %d ))\n", pdm_sat_table->pkt_skip_statistic_en, pdm_sat_table->latch_time));
+	PHYDM_DBG(dm, DBG_ANT_DIV,
+		  "pkt_skip_statistic_en = (( %d )), latch_time = (( %d ))\n",
+		  sat_tab->pkt_skip_statistic_en, sat_tab->latch_time);
 }
 
-void
-phydm_beam_decision_workitem_callback(
-	void	*p_context
-)
+void phydm_beam_decision_workitem_callback(
+	void *context)
 {
-	struct _ADAPTER		*p_adapter = (struct _ADAPTER *)p_context;
-	HAL_DATA_TYPE	*p_hal_data = GET_HAL_DATA(p_adapter);
-	struct PHY_DM_STRUCT		*p_dm = &p_hal_data->DM_OutSrc;
+	void *adapter = (void *)context;
+	HAL_DATA_TYPE *hal_data = GET_HAL_DATA(((PADAPTER)adapter));
+	struct dm_struct *dm = &hal_data->DM_OutSrc;
 
-	PHYDM_DBG(p_dm, DBG_ANT_DIV, ("[ SmartAnt ] Beam decision Workitem Callback\n"));
-	phydm_fast_ant_training_hl_smart_antenna_type2(p_dm);
+	PHYDM_DBG(dm, DBG_ANT_DIV,
+		  "[ SmartAnt ] Beam decision Workitem Callback\n");
+	phydm_fast_ant_training_hl_smart_antenna_type2(dm);
 }
 #endif
 
-void
-phydm_process_rssi_for_hb_smtant_type2(
-	void		*p_dm_void,
-	void		*p_phy_info_void,
-	void		*p_pkt_info_void,
-	u8		rssi_avg	
-)
+void phydm_process_rssi_for_hb_smtant_type2(
+	void *dm_void,
+	void *phy_info_void,
+	void *pkt_info_void,
+	u8 rssi_avg)
 {
-	struct PHY_DM_STRUCT				*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	struct phydm_phyinfo_struct			*p_phy_info = (struct phydm_phyinfo_struct *)p_phy_info_void;
-	struct phydm_perpkt_info_struct				*p_pktinfo = (struct phydm_perpkt_info_struct *)p_pkt_info_void;
-	struct phydm_fat_struct		*p_dm_fat_table = &p_dm->dm_fat_table;
-	struct smt_ant_honbo	*pdm_sat_table = &(p_dm->dm_sat_table);
-	u8		train_pkt_number;
-	u32		beam_tmp;
-	u8		is_cck_rate;
-	u8		rx_power_ant0 = p_phy_info->rx_mimo_signal_strength[0];
-	u8		rx_power_ant1 = p_phy_info->rx_mimo_signal_strength[1];
-	u8		rx_evm_ant0 = p_phy_info->rx_mimo_evm_dbm[0];
-	u8		rx_evm_ant1 = p_phy_info->rx_mimo_evm_dbm[1];
-	u8		rate_ss = phydm_rate_to_num_ss(p_dm, p_pktinfo->data_rate);
-
-	is_cck_rate = (p_pktinfo->data_rate <= ODM_RATE11M) ? true : false;
-
-
-	/*[Beacon]*/
-	if (p_pktinfo->is_packet_beacon) {
-
-		pdm_sat_table->beacon_counter++;
-		PHYDM_DBG(p_dm, DBG_ANT_DIV, ("MatchBSSID_beacon_counter = ((%d))\n", pdm_sat_table->beacon_counter));
-
-		if (pdm_sat_table->beacon_counter >= pdm_sat_table->pre_beacon_counter + 2) {
-
-			pdm_sat_table->update_beam_idx++;
-			PHYDM_DBG(p_dm, DBG_ANT_DIV, ("pre_beacon_counter = ((%d)), pkt_counter = ((%d)), update_beam_idx = ((%d))\n",
-				pdm_sat_table->pre_beacon_counter, pdm_sat_table->pkt_counter, pdm_sat_table->update_beam_idx));
-			
-			pdm_sat_table->pre_beacon_counter = pdm_sat_table->beacon_counter;
-			pdm_sat_table->pkt_counter = 0;
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct phydm_phyinfo_struct *phy_info = (struct phydm_phyinfo_struct *)phy_info_void;
+	struct phydm_perpkt_info_struct *pktinfo = (struct phydm_perpkt_info_struct *)pkt_info_void;
+	struct phydm_fat_struct *fat_tab = &dm->dm_fat_table;
+	struct smt_ant_honbo *sat_tab = &dm->dm_sat_table;
+	u8 train_pkt_number;
+	u32 beam_tmp;
+	u8 rx_power_ant0 = phy_info->rx_mimo_signal_strength[0];
+	u8 rx_power_ant1 = phy_info->rx_mimo_signal_strength[1];
+	u8 rx_evm_ant0 = phy_info->rx_mimo_evm_dbm[0];
+	u8 rx_evm_ant1 = phy_info->rx_mimo_evm_dbm[1];
+
+	/*@[Beacon]*/
+	if (pktinfo->is_packet_beacon) {
+		sat_tab->beacon_counter++;
+		PHYDM_DBG(dm, DBG_ANT_DIV,
+			  "MatchBSSID_beacon_counter = ((%d))\n",
+			  sat_tab->beacon_counter);
+
+		if (sat_tab->beacon_counter >= sat_tab->pre_beacon_counter + 2) {
+			sat_tab->update_beam_idx++;
+			PHYDM_DBG(dm, DBG_ANT_DIV,
+				  "pre_beacon_counter = ((%d)), pkt_counter = ((%d)), update_beam_idx = ((%d))\n",
+				  sat_tab->pre_beacon_counter,
+				  sat_tab->pkt_counter,
+				  sat_tab->update_beam_idx);
+
+			sat_tab->pre_beacon_counter = sat_tab->beacon_counter;
+			sat_tab->pkt_counter = 0;
 		}
 	}
-	/*[data]*/
-	else if (p_pktinfo->is_packet_to_self) {
-
-		if (pdm_sat_table->pkt_skip_statistic_en == 0) {
-
-			PHYDM_DBG(p_dm, DBG_ANT_DIV, ("ID[%d] pkt_cnt=((%d)): Beam_set = ((%d)), RSSI{A,B,avg} = {%d, %d, %d}\n",
-				p_pktinfo->station_id, pdm_sat_table->pkt_counter,  pdm_sat_table->fast_training_beam_num, rx_power_ant0, rx_power_ant1, rssi_avg));
-
-			PHYDM_DBG(p_dm, DBG_ANT_DIV, ("Rate_ss = ((%d)), EVM{A,B} = {%d, %d}, RX Rate =", rate_ss,  rx_evm_ant0, rx_evm_ant1));
-			phydm_print_rate(p_dm, p_dm->rx_rate, DBG_ANT_DIV);
+	/*@[data]*/
+	else if (pktinfo->is_packet_to_self) {
+		if (sat_tab->pkt_skip_statistic_en == 0) {
+			PHYDM_DBG(dm, DBG_ANT_DIV,
+				  "ID[%d] pkt_cnt=((%d)): Beam_set = ((%d)), RSSI{A,B,avg} = {%d, %d, %d}\n",
+				  pktinfo->station_id, sat_tab->pkt_counter,
+				  sat_tab->fast_training_beam_num,
+				  rx_power_ant0, rx_power_ant1, rssi_avg);
+
+			PHYDM_DBG(dm, DBG_ANT_DIV,
+				  "Rate_ss = ((%d)), EVM{A,B} = {%d, %d}, RX Rate =",
+				  pktinfo->rate_ss, rx_evm_ant0, rx_evm_ant1);
+			phydm_print_rate(dm, dm->rx_rate, DBG_ANT_DIV);
+
+			if (sat_tab->pkt_counter >= 1) /*packet skip count*/
+			{
+				sat_tab->beam_set_rssi_avg_sum[sat_tab->fast_training_beam_num] += rssi_avg;
+				sat_tab->statistic_pkt_cnt[sat_tab->fast_training_beam_num]++;
 
+				sat_tab->beam_path_rssi_sum[sat_tab->fast_training_beam_num][0] += rx_power_ant0;
+				sat_tab->beam_path_rssi_sum[sat_tab->fast_training_beam_num][1] += rx_power_ant1;
 
-			if (pdm_sat_table->pkt_counter >= 1)  /*packet skip count*/
-			{
-				pdm_sat_table->beam_set_rssi_avg_sum[pdm_sat_table->fast_training_beam_num] += rssi_avg;
-				pdm_sat_table->statistic_pkt_cnt[pdm_sat_table->fast_training_beam_num]++;
-				
-				pdm_sat_table->beam_path_rssi_sum[pdm_sat_table->fast_training_beam_num][0] += rx_power_ant0;
-				pdm_sat_table->beam_path_rssi_sum[pdm_sat_table->fast_training_beam_num][1] += rx_power_ant1;
-
-				if (rate_ss == 2) {
-					pdm_sat_table->beam_path_evm_2ss_sum[pdm_sat_table->fast_training_beam_num][0] += rx_evm_ant0;
-					pdm_sat_table->beam_path_evm_2ss_sum[pdm_sat_table->fast_training_beam_num][1] += rx_evm_ant1;
-					pdm_sat_table->beam_path_evm_2ss_cnt[pdm_sat_table->fast_training_beam_num]++;
+				if (pktinfo->rate_ss == 2) {
+					sat_tab->beam_path_evm_2ss_sum[sat_tab->fast_training_beam_num][0] += rx_evm_ant0;
+					sat_tab->beam_path_evm_2ss_sum[sat_tab->fast_training_beam_num][1] += rx_evm_ant1;
+					sat_tab->beam_path_evm_2ss_cnt[sat_tab->fast_training_beam_num]++;
 				} else {
-					pdm_sat_table->beam_path_evm_1ss_sum[pdm_sat_table->fast_training_beam_num] += rx_evm_ant0;
-					pdm_sat_table->beam_path_evm_1ss_cnt[pdm_sat_table->fast_training_beam_num]++;
+					sat_tab->beam_path_evm_1ss_sum[sat_tab->fast_training_beam_num] += rx_evm_ant0;
+					sat_tab->beam_path_evm_1ss_cnt[sat_tab->fast_training_beam_num]++;
 				}
 			}
-			
-			pdm_sat_table->pkt_counter++;
 
-			train_pkt_number = pdm_sat_table->beam_set_train_cnt[pdm_sat_table->fast_training_beam_num];
+			sat_tab->pkt_counter++;
+
+			train_pkt_number = sat_tab->beam_set_train_cnt[sat_tab->fast_training_beam_num];
 
-			if (pdm_sat_table->pkt_counter >= train_pkt_number) {
+			if (sat_tab->pkt_counter >= train_pkt_number) {
+				sat_tab->update_beam_idx++;
+				PHYDM_DBG(dm, DBG_ANT_DIV,
+					  "pre_beacon_counter = ((%d)), Update_new_beam = ((%d))\n",
+					  sat_tab->pre_beacon_counter,
+					  sat_tab->update_beam_idx);
 
-				pdm_sat_table->update_beam_idx++;
-				PHYDM_DBG(p_dm, DBG_ANT_DIV, ("pre_beacon_counter = ((%d)), Update_new_beam = ((%d))\n",
-					pdm_sat_table->pre_beacon_counter, pdm_sat_table->update_beam_idx));
-				
-				pdm_sat_table->pre_beacon_counter = pdm_sat_table->beacon_counter;
-				pdm_sat_table->pkt_counter = 0;
+				sat_tab->pre_beacon_counter = sat_tab->beacon_counter;
+				sat_tab->pkt_counter = 0;
 			}
 		}
 	}
 
-	if (pdm_sat_table->update_beam_idx > 0) {
-		
-		pdm_sat_table->update_beam_idx = 0;
+	if (sat_tab->update_beam_idx > 0) {
+		sat_tab->update_beam_idx = 0;
 
-		if (pdm_sat_table->fast_training_beam_num >= ((u32)pdm_sat_table->total_beam_set_num - 1)) {
-
-			p_dm_fat_table->fat_state = FAT_DECISION_STATE;
+		if (sat_tab->fast_training_beam_num >= ((u32)sat_tab->total_beam_set_num - 1)) {
+			fat_tab->fat_state = FAT_DECISION_STATE;
 
 			#if DEV_BUS_TYPE == RT_PCI_INTERFACE
-			phydm_fast_ant_training_hl_smart_antenna_type2(p_dm); /*go to make decision*/
-			#else
-			odm_schedule_work_item(&pdm_sat_table->hl_smart_antenna_decision_workitem);
+			if (dm->support_interface == ODM_ITRF_PCIE)
+				phydm_fast_ant_training_hl_smart_antenna_type2(dm); /*@go to make decision*/
+			#endif
+			#if DEV_BUS_TYPE == RT_USB_INTERFACE || DEV_BUS_TYPE == RT_SDIO_INTERFACE
+			if (dm->support_interface == ODM_ITRF_USB || dm->support_interface == ODM_ITRF_SDIO)
+				odm_schedule_work_item(&sat_tab->hl_smart_antenna_decision_workitem);
 			#endif
-
 
 		} else {
-			beam_tmp = pdm_sat_table->fast_training_beam_num;
-			pdm_sat_table->fast_training_beam_num++;
-			PHYDM_DBG(p_dm, DBG_ANT_DIV, ("Update Beam_num (( %d )) -> (( %d ))\n", beam_tmp, pdm_sat_table->fast_training_beam_num));
-			phydm_set_rfu_beam_pattern_type2(p_dm);
-			pdm_sat_table->pre_fast_training_beam_num = pdm_sat_table->fast_training_beam_num;
-
-			p_dm_fat_table->fat_state = FAT_TRAINING_STATE;
+			beam_tmp = sat_tab->fast_training_beam_num;
+			sat_tab->fast_training_beam_num++;
+			PHYDM_DBG(dm, DBG_ANT_DIV,
+				  "Update Beam_num (( %d )) -> (( %d ))\n",
+				  beam_tmp, sat_tab->fast_training_beam_num);
+			phydm_set_rfu_beam_pattern_type2(dm);
+			sat_tab->pre_fast_training_beam_num = sat_tab->fast_training_beam_num;
+
+			fat_tab->fat_state = FAT_TRAINING_STATE;
 		}
 	}
-	
 }
 #endif
 
 #if (defined(CONFIG_HL_SMART_ANTENNA_TYPE1))
 
-void
-phydm_hl_smart_ant_type1_init_8821a(
-	void		*p_dm_void
-)
+void phydm_hl_smart_ant_type1_init_8821a(
+	void *dm_void)
 {
-	struct PHY_DM_STRUCT		*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	struct smt_ant_honbo			*pdm_sat_table = &(p_dm->dm_sat_table);
-	struct phydm_fat_struct			*p_dm_fat_table = &p_dm->dm_fat_table;
-	u32			value32;
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct smt_ant_honbo *sat_tab = &dm->dm_sat_table;
+	struct phydm_fat_struct *fat_tab = &dm->dm_fat_table;
+	u32 value32;
 
-	PHYDM_DBG(p_dm, DBG_ANT_DIV, ("***8821A SmartAnt_Init => ant_div_type=[Hong-Lin Smart ant Type1]\n"));
+	PHYDM_DBG(dm, DBG_ANT_DIV,
+		  "***8821A SmartAnt_Init => ant_div_type=[Hong-Lin Smart ant Type1]\n");
 
 #if 0
-	/* ---------------------------------------- */
-	/* GPIO 2-3 for Beam control */
+	/* @---------------------------------------- */
+	/* @GPIO 2-3 for Beam control */
 	/* reg0x66[2]=0 */
 	/* reg0x44[27:26] = 0 */
 	/* reg0x44[23:16]  enable_output for P_GPIO[7:0] */
 	/* reg0x44[15:8]  output_value for P_GPIO[7:0] */
 	/* reg0x40[1:0] = 0  GPIO function */
-	/* ------------------------------------------ */
+	/* @------------------------------------------ */
 #endif
 
-	/*GPIO setting*/
-	odm_set_mac_reg(p_dm, 0x64, BIT(18), 0);
-	odm_set_mac_reg(p_dm, 0x44, BIT(27) | BIT(26), 0);
-	odm_set_mac_reg(p_dm, 0x44, BIT(19) | BIT(18), 0x3);	/*enable_output for P_GPIO[3:2]*/
-	/*odm_set_mac_reg(p_dm, 0x44, BIT(11)|BIT(10), 0);*/ /*output value*/
-	odm_set_mac_reg(p_dm, 0x40, BIT(1) | BIT(0), 0);		/*GPIO function*/
+	/*@GPIO setting*/
+	odm_set_mac_reg(dm, R_0x64, BIT(18), 0);
+	odm_set_mac_reg(dm, R_0x44, BIT(27) | BIT(26), 0);
+	odm_set_mac_reg(dm, R_0x44, BIT(19) | BIT(18), 0x3); /*@enable_output for P_GPIO[3:2]*/
+#if 0
+	/*odm_set_mac_reg(dm, R_0x44, BIT(11)|BIT(10), 0);*/ /*output value*/
+#endif
+	odm_set_mac_reg(dm, R_0x40, BIT(1) | BIT(0), 0); /*@GPIO function*/
 
-	/*Hong_lin smart antenna HW setting*/
-	pdm_sat_table->rfu_codeword_total_bit_num  = 24;/*max=32*/
-	pdm_sat_table->rfu_each_ant_bit_num = 4;
-	pdm_sat_table->beam_patten_num_each_ant = 4;
+	/*@Hong_lin smart antenna HW setting*/
+	sat_tab->rfu_codeword_total_bit_num = 24; /*@max=32*/
+	sat_tab->rfu_each_ant_bit_num = 4;
+	sat_tab->beam_patten_num_each_ant = 4;
 
 #if DEV_BUS_TYPE == RT_SDIO_INTERFACE
-	pdm_sat_table->latch_time = 100; /*mu sec*/
+	sat_tab->latch_time = 100; /*@mu sec*/
 #elif DEV_BUS_TYPE == RT_USB_INTERFACE
-	pdm_sat_table->latch_time = 100; /*mu sec*/
+	sat_tab->latch_time = 100; /*@mu sec*/
 #endif
-	pdm_sat_table->pkt_skip_statistic_en = 0;
+	sat_tab->pkt_skip_statistic_en = 0;
 
-	pdm_sat_table->ant_num = 1;/*max=8*/
-	pdm_sat_table->ant_num_total = NUM_ANTENNA_8821A;
-	pdm_sat_table->first_train_ant = MAIN_ANT;
+	sat_tab->ant_num = 1; /*@max=8*/
+	sat_tab->ant_num_total = NUM_ANTENNA_8821A;
+	sat_tab->first_train_ant = MAIN_ANT;
 
-	pdm_sat_table->rfu_codeword_table[0] = 0x0;
-	pdm_sat_table->rfu_codeword_table[1] = 0x4;
-	pdm_sat_table->rfu_codeword_table[2] = 0x8;
-	pdm_sat_table->rfu_codeword_table[3] = 0xc;
+	sat_tab->rfu_codeword_table[0] = 0x0;
+	sat_tab->rfu_codeword_table[1] = 0x4;
+	sat_tab->rfu_codeword_table[2] = 0x8;
+	sat_tab->rfu_codeword_table[3] = 0xc;
 
-	pdm_sat_table->rfu_codeword_table_5g[0] = 0x1;
-	pdm_sat_table->rfu_codeword_table_5g[1] = 0x2;
-	pdm_sat_table->rfu_codeword_table_5g[2] = 0x4;
-	pdm_sat_table->rfu_codeword_table_5g[3] = 0x8;
+	sat_tab->rfu_codeword_table_5g[0] = 0x1;
+	sat_tab->rfu_codeword_table_5g[1] = 0x2;
+	sat_tab->rfu_codeword_table_5g[2] = 0x4;
+	sat_tab->rfu_codeword_table_5g[3] = 0x8;
 
-	pdm_sat_table->fix_beam_pattern_en  = 0;
-	pdm_sat_table->decision_holding_period = 0;
+	sat_tab->fix_beam_pattern_en = 0;
+	sat_tab->decision_holding_period = 0;
 
-	/*beam training setting*/
-	pdm_sat_table->pkt_counter = 0;
-	pdm_sat_table->per_beam_training_pkt_num = 10;
+	/*@beam training setting*/
+	sat_tab->pkt_counter = 0;
+	sat_tab->per_beam_training_pkt_num = 10;
 
 	/*set default beam*/
-	pdm_sat_table->fast_training_beam_num = 0;
-	pdm_sat_table->pre_fast_training_beam_num = pdm_sat_table->fast_training_beam_num;
-	phydm_set_all_ant_same_beam_num(p_dm);
+	sat_tab->fast_training_beam_num = 0;
+	sat_tab->pre_fast_training_beam_num = sat_tab->fast_training_beam_num;
+	phydm_set_all_ant_same_beam_num(dm);
 
-	p_dm_fat_table->fat_state = FAT_BEFORE_LINK_STATE;
+	fat_tab->fat_state = FAT_BEFORE_LINK_STATE;
 
-	odm_set_bb_reg(p_dm, 0xCA4, MASKDWORD, 0x01000100);
-	odm_set_bb_reg(p_dm, 0xCA8, MASKDWORD, 0x01000100);
+	odm_set_bb_reg(dm, R_0xca4, MASKDWORD, 0x01000100);
+	odm_set_bb_reg(dm, R_0xca8, MASKDWORD, 0x01000100);
 
-	/*[BB] FAT setting*/
-	odm_set_bb_reg(p_dm, 0xc08, BIT(18) | BIT(17) | BIT(16), pdm_sat_table->ant_num);
-	odm_set_bb_reg(p_dm, 0xc08, BIT(31), 0); /*increase ant num every FAT period 0:+1, 1+2*/
-	odm_set_bb_reg(p_dm, 0x8c4, BIT(2) | BIT(1), 1); /*change cca antenna timming threshold if no CCA occurred: 0:200ms / 1:100ms / 2:no use / 3: 300*/
-	odm_set_bb_reg(p_dm, 0x8c4, BIT(0), 1); /*FAT_watchdog_en*/
+	/*@[BB] FAT setting*/
+	odm_set_bb_reg(dm, R_0xc08, BIT(18) | BIT(17) | BIT(16), sat_tab->ant_num);
+	odm_set_bb_reg(dm, R_0xc08, BIT(31), 0); /*@increase ant num every FAT period 0:+1, 1+2*/
+	odm_set_bb_reg(dm, R_0x8c4, BIT(2) | BIT(1), 1); /*@change cca antenna timming threshold if no CCA occurred: 0:200ms / 1:100ms / 2:no use / 3: 300*/
+	odm_set_bb_reg(dm, R_0x8c4, BIT(0), 1); /*@FAT_watchdog_en*/
 
-	value32 = odm_get_mac_reg(p_dm,  0x7B4, MASKDWORD);
-	odm_set_mac_reg(p_dm, 0x7b4, MASKDWORD, value32 | (BIT(16) | BIT(17)));	/*Reg7B4[16]=1 enable antenna training */
+	value32 = odm_get_mac_reg(dm, R_0x7b4, MASKDWORD);
+	odm_set_mac_reg(dm, R_0x7b4, MASKDWORD, value32 | (BIT(16) | BIT(17))); /*Reg7B4[16]=1 enable antenna training */
 	/*Reg7B4[17]=1 enable  match MAC addr*/
-	odm_set_mac_reg(p_dm, 0x7b4, 0xFFFF, 0);/*Match MAC ADDR*/
-	odm_set_mac_reg(p_dm, 0x7b0, MASKDWORD, 0);
-
+	odm_set_mac_reg(dm, R_0x7b4, 0xFFFF, 0); /*@Match MAC ADDR*/
+	odm_set_mac_reg(dm, R_0x7b0, MASKDWORD, 0);
 }
 
-u32
-phydm_construct_hl_beam_codeword(
-	void		*p_dm_void,
-	u32		*beam_pattern_idx,
-	u32		ant_num
-)
+u32 phydm_construct_hl_beam_codeword(
+	void *dm_void,
+	u32 *beam_pattern_idx,
+	u32 ant_num)
 {
-	struct PHY_DM_STRUCT	*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	struct smt_ant_honbo		*pdm_sat_table = &(p_dm->dm_sat_table);
-	u32		codeword = 0;
-	u32		data_tmp;
-	u32		i;
-	u32		break_counter = 0;
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct smt_ant_honbo *sat_tab = &dm->dm_sat_table;
+	u32 codeword = 0;
+	u32 data_tmp;
+	u32 i;
+	u32 break_counter = 0;
 
 	if (ant_num < 8) {
-		for (i = 0; i < (pdm_sat_table->ant_num_total); i++) {
-			/*PHYDM_DBG(p_dm,DBG_ANT_DIV, ("beam_pattern_num[%x] = %x\n",i,beam_pattern_num[i] ));*/
-			if ((i < (pdm_sat_table->first_train_ant - 1)) || (break_counter >= (pdm_sat_table->ant_num))) {
+		for (i = 0; i < (sat_tab->ant_num_total); i++) {
+#if 0
+			/*PHYDM_DBG(dm,DBG_ANT_DIV, "beam_pattern_num[%x] = %x\n",i,beam_pattern_num[i] );*/
+#endif
+			if ((i < (sat_tab->first_train_ant - 1)) || break_counter >= sat_tab->ant_num) {
 				data_tmp = 0;
-				/**/
 			} else {
-
 				break_counter++;
 
 				if (beam_pattern_idx[i] == 0) {
-
-					if (*p_dm->p_band_type == ODM_BAND_5G)
-						data_tmp = pdm_sat_table->rfu_codeword_table_5g[0];
+					if (*dm->band_type == ODM_BAND_5G)
+						data_tmp = sat_tab->rfu_codeword_table_5g[0];
 					else
-						data_tmp = pdm_sat_table->rfu_codeword_table[0];
+						data_tmp = sat_tab->rfu_codeword_table[0];
 
 				} else if (beam_pattern_idx[i] == 1) {
-
-
-					if (*p_dm->p_band_type == ODM_BAND_5G)
-						data_tmp = pdm_sat_table->rfu_codeword_table_5g[1];
+					if (*dm->band_type == ODM_BAND_5G)
+						data_tmp = sat_tab->rfu_codeword_table_5g[1];
 					else
-						data_tmp = pdm_sat_table->rfu_codeword_table[1];
+						data_tmp = sat_tab->rfu_codeword_table[1];
 
 				} else if (beam_pattern_idx[i] == 2) {
-
-					if (*p_dm->p_band_type == ODM_BAND_5G)
-						data_tmp = pdm_sat_table->rfu_codeword_table_5g[2];
+					if (*dm->band_type == ODM_BAND_5G)
+						data_tmp = sat_tab->rfu_codeword_table_5g[2];
 					else
-						data_tmp = pdm_sat_table->rfu_codeword_table[2];
+						data_tmp = sat_tab->rfu_codeword_table[2];
 
 				} else if (beam_pattern_idx[i] == 3) {
-
-					if (*p_dm->p_band_type == ODM_BAND_5G)
-						data_tmp = pdm_sat_table->rfu_codeword_table_5g[3];
+					if (*dm->band_type == ODM_BAND_5G)
+						data_tmp = sat_tab->rfu_codeword_table_5g[3];
 					else
-						data_tmp = pdm_sat_table->rfu_codeword_table[3];
+						data_tmp = sat_tab->rfu_codeword_table[3];
 				}
 			}
 
-
 			codeword |= (data_tmp << (i * 4));
-
 		}
 	}
 
 	return codeword;
 }
 
-void
-phydm_update_beam_pattern(
-	void		*p_dm_void,
-	u32		codeword,
-	u32		codeword_length
-)
+void phydm_update_beam_pattern(
+	void *dm_void,
+	u32 codeword,
+	u32 codeword_length)
 {
-	struct PHY_DM_STRUCT		*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	struct smt_ant_honbo			*pdm_sat_table = &(p_dm->dm_sat_table);
-	u8			i;
-	boolean			beam_ctrl_signal;
-	u32			one = 0x1;
-	u32			reg44_tmp_p, reg44_tmp_n, reg44_ori;
-	u8			devide_num = 4;
-
-	PHYDM_DBG(p_dm, DBG_ANT_DIV, ("[ SmartAnt ] Set Beam Pattern =0x%x\n", codeword));
-
-	reg44_ori = odm_get_mac_reg(p_dm, 0x44, MASKDWORD);
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct smt_ant_honbo *sat_tab = &dm->dm_sat_table;
+	u8 i;
+	boolean beam_ctrl_signal;
+	u32 one = 0x1;
+	u32 reg44_tmp_p, reg44_tmp_n, reg44_ori;
+	u8 devide_num = 4;
+
+	PHYDM_DBG(dm, DBG_ANT_DIV, "[ SmartAnt ] Set Beam Pattern =0x%x\n",
+		  codeword);
+
+	reg44_ori = odm_get_mac_reg(dm, R_0x44, MASKDWORD);
 	reg44_tmp_p = reg44_ori;
-	/*PHYDM_DBG(p_dm, DBG_ANT_DIV, ("reg44_ori =0x%x\n", reg44_ori));*/
+#if 0
+	/*PHYDM_DBG(dm, DBG_ANT_DIV, "reg44_ori =0x%x\n", reg44_ori);*/
+#endif
 
-	devide_num = (pdm_sat_table->rfu_protocol_type == 2) ? 6 : 4;
+	devide_num = (sat_tab->rfu_protocol_type == 2) ? 6 : 4;
 
 	for (i = 0; i <= (codeword_length - 1); i++) {
 		beam_ctrl_signal = (boolean)((codeword & BIT(i)) >> i);
 
-		if (p_dm->debug_components & DBG_ANT_DIV) {
-
-			if (i == (codeword_length - 1)) {
-				dbg_print("%d ]\n", beam_ctrl_signal);
-				/**/
-			} else if (i == 0) {
-				dbg_print("Send codeword[1:%d] ---> [ %d ", codeword_length, beam_ctrl_signal);
-				/**/
-			} else if ((i % devide_num) == (devide_num-1)) {
-				dbg_print("%d  |  ", beam_ctrl_signal);
-				/**/
-			} else {
-				dbg_print("%d ", beam_ctrl_signal);
-				/**/
-			}
+		if (dm->debug_components & DBG_ANT_DIV) {
+			if (i == (codeword_length - 1))
+				pr_debug("%d ]\n", beam_ctrl_signal);
+			else if (i == 0)
+				pr_debug("Send codeword[1:%d] ---> [ %d ", codeword_length, beam_ctrl_signal);
+			else if ((i % devide_num) == (devide_num - 1))
+				pr_debug("%d  |  ", beam_ctrl_signal);
+			else
+				pr_debug("%d ", beam_ctrl_signal);
 		}
 
-		if (p_dm->support_ic_type == ODM_RTL8821) {
+		if (dm->support_ic_type == ODM_RTL8821) {
 			#if (RTL8821A_SUPPORT == 1)
-			reg44_tmp_p = reg44_ori & (~(BIT(11) | BIT(10))); /*clean bit 10 & 11*/
+			reg44_tmp_p = reg44_ori & (~(BIT(11) | BIT(10))); /*@clean bit 10 & 11*/
 			reg44_tmp_p |= ((1 << 11) | (beam_ctrl_signal << 10));
 			reg44_tmp_n = reg44_ori & (~(BIT(11) | BIT(10)));
 
-			/*PHYDM_DBG(p_dm, DBG_ANT_DIV, ("reg44_tmp_p =(( 0x%x )), reg44_tmp_n = (( 0x%x ))\n", reg44_tmp_p, reg44_tmp_n));*/
-			odm_set_mac_reg(p_dm, 0x44, MASKDWORD, reg44_tmp_p);
-			odm_set_mac_reg(p_dm, 0x44, MASKDWORD, reg44_tmp_n);
+#if 0
+			/*PHYDM_DBG(dm, DBG_ANT_DIV, "reg44_tmp_p =(( 0x%x )), reg44_tmp_n = (( 0x%x ))\n", reg44_tmp_p, reg44_tmp_n);*/
+#endif
+			odm_set_mac_reg(dm, R_0x44, MASKDWORD, reg44_tmp_p);
+			odm_set_mac_reg(dm, R_0x44, MASKDWORD, reg44_tmp_n);
 			#endif
 		}
 		#if (RTL8822B_SUPPORT == 1)
-		else if (p_dm->support_ic_type == ODM_RTL8822B) {
-
-			if (pdm_sat_table->rfu_protocol_type == 2) {
-
-				reg44_tmp_p = reg44_tmp_p & ~(BIT(8)); /*clean bit 8*/
-				reg44_tmp_p = reg44_tmp_p ^ BIT(9); /*get new clk high/low, exclusive-or*/
+		else if (dm->support_ic_type == ODM_RTL8822B) {
+			if (sat_tab->rfu_protocol_type == 2) {
+				reg44_tmp_p = reg44_tmp_p & ~(BIT(8)); /*@clean bit 8*/
+				reg44_tmp_p = reg44_tmp_p ^ BIT(9); /*@get new clk high/low, exclusive-or*/
 
-	
 				reg44_tmp_p |= (beam_ctrl_signal << 8);
-				
-				odm_set_mac_reg(p_dm, 0x44, MASKDWORD, reg44_tmp_p);
+
+				odm_set_mac_reg(dm, R_0x44, MASKDWORD, reg44_tmp_p);
 				ODM_delay_us(10);
-				/*PHYDM_DBG(p_dm, DBG_ANT_DIV, ("reg44 =(( 0x%x )), reg44[9:8] = ((%x)), beam_ctrl_signal =((%x))\n", reg44_tmp_p, ((reg44_tmp_p & 0x300)>>8), beam_ctrl_signal));*/
-				
+#if 0
+				/*PHYDM_DBG(dm, DBG_ANT_DIV, "reg44 =(( 0x%x )), reg44[9:8] = ((%x)), beam_ctrl_signal =((%x))\n", reg44_tmp_p, ((reg44_tmp_p & 0x300)>>8), beam_ctrl_signal);*/
+#endif
+
 			} else {
-				reg44_tmp_p = reg44_ori & (~(BIT(9) | BIT(8))); /*clean bit 9 & 8*/
+				reg44_tmp_p = reg44_ori & (~(BIT(9) | BIT(8))); /*@clean bit 9 & 8*/
 				reg44_tmp_p |= ((1 << 9) | (beam_ctrl_signal << 8));
 				reg44_tmp_n = reg44_ori & (~(BIT(9) | BIT(8)));
 
-				/*PHYDM_DBG(p_dm, DBG_ANT_DIV, ("reg44_tmp_p =(( 0x%x )), reg44_tmp_n = (( 0x%x ))\n", reg44_tmp_p, reg44_tmp_n)); */
-				odm_set_mac_reg(p_dm, 0x44, MASKDWORD, reg44_tmp_p);
+#if 0
+				/*PHYDM_DBG(dm, DBG_ANT_DIV, "reg44_tmp_p =(( 0x%x )), reg44_tmp_n = (( 0x%x ))\n", reg44_tmp_p, reg44_tmp_n); */
+#endif
+				odm_set_mac_reg(dm, R_0x44, MASKDWORD, reg44_tmp_p);
 				ODM_delay_us(10);
-				odm_set_mac_reg(p_dm, 0x44, MASKDWORD, reg44_tmp_n);
+				odm_set_mac_reg(dm, R_0x44, MASKDWORD, reg44_tmp_n);
 				ODM_delay_us(10);
 			}
 		}
@@ -1511,301 +1609,335 @@ phydm_update_beam_pattern(
 	}
 }
 
-void
-phydm_update_rx_idle_beam(
-	void		*p_dm_void
-)
+void phydm_update_rx_idle_beam(
+	void *dm_void)
 {
-	struct PHY_DM_STRUCT		*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	struct phydm_fat_struct			*p_dm_fat_table = &p_dm->dm_fat_table;
-	struct smt_ant_honbo			*pdm_sat_table = &(p_dm->dm_sat_table);
-	u32			i;
-
-	pdm_sat_table->update_beam_codeword = phydm_construct_hl_beam_codeword(p_dm, &(pdm_sat_table->rx_idle_beam[0]), pdm_sat_table->ant_num);
-	PHYDM_DBG(p_dm, DBG_ANT_DIV, ("Set target beam_pattern codeword = (( 0x%x ))\n", pdm_sat_table->update_beam_codeword));
-
-	for (i = 0; i < (pdm_sat_table->ant_num); i++) {
-		PHYDM_DBG(p_dm, DBG_ANT_DIV, ("[ Update Rx-Idle-Beam ] RxIdleBeam[%d] =%d\n", i, pdm_sat_table->rx_idle_beam[i]));
-		/**/
-	}
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct phydm_fat_struct *fat_tab = &dm->dm_fat_table;
+	struct smt_ant_honbo *sat_tab = &dm->dm_sat_table;
+	u32 i;
+
+	sat_tab->update_beam_codeword = phydm_construct_hl_beam_codeword(dm,
+									 &sat_tab->rx_idle_beam[0],
+									 sat_tab->ant_num);
+	PHYDM_DBG(dm, DBG_ANT_DIV,
+		  "Set target beam_pattern codeword = (( 0x%x ))\n",
+		  sat_tab->update_beam_codeword);
+
+	for (i = 0; i < (sat_tab->ant_num); i++)
+		PHYDM_DBG(dm, DBG_ANT_DIV,
+			  "[ Update Rx-Idle-Beam ] RxIdleBeam[%d] =%d\n", i,
+			  sat_tab->rx_idle_beam[i]);
 
 #if DEV_BUS_TYPE == RT_PCI_INTERFACE
-	phydm_update_beam_pattern(p_dm, pdm_sat_table->update_beam_codeword, pdm_sat_table->rfu_codeword_total_bit_num);
-#else
-	odm_schedule_work_item(&pdm_sat_table->hl_smart_antenna_workitem);
+	if (dm->support_interface == ODM_ITRF_PCIE)
+		phydm_update_beam_pattern(dm, sat_tab->update_beam_codeword, sat_tab->rfu_codeword_total_bit_num);
+#endif
+#if DEV_BUS_TYPE == RT_USB_INTERFACE || DEV_BUS_TYPE == RT_SDIO_INTERFACE
+	if (dm->support_interface == ODM_ITRF_USB || dm->support_interface == ODM_ITRF_SDIO)
+		odm_schedule_work_item(&sat_tab->hl_smart_antenna_workitem);
+#if 0
 	/*odm_stall_execution(1);*/
 #endif
+#endif
 
-	pdm_sat_table->pre_codeword = pdm_sat_table->update_beam_codeword;
+	sat_tab->pre_codeword = sat_tab->update_beam_codeword;
 }
 
-void
-phydm_hl_smart_ant_debug(
-	void		*p_dm_void,
-	char		input[][16],
-	u32		*_used,
-	char		*output,
-	u32		*_out_len,
-	u32		input_num
-)
+void phydm_hl_smart_ant_debug(
+	void *dm_void,
+	char input[][16],
+	u32 *_used,
+	char *output,
+	u32 *_out_len)
 {
-	struct PHY_DM_STRUCT		*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	struct smt_ant_honbo			*pdm_sat_table = &(p_dm->dm_sat_table);
-	u32			used = *_used;
-	u32			out_len = *_out_len;
-	u32			one = 0x1;
-	u32			codeword_length = pdm_sat_table->rfu_codeword_total_bit_num;
-	u32			beam_ctrl_signal, i;
-	u8			devide_num = 4;
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct smt_ant_honbo *sat_tab = &dm->dm_sat_table;
+	u32 used = *_used;
+	u32 out_len = *_out_len;
+	u32 one = 0x1;
+	u32 codeword_length = sat_tab->rfu_codeword_total_bit_num;
+	u32 beam_ctrl_signal, i;
+	u8 devide_num = 4;
 
-	if (dm_value[0] == 1) { /*fix beam pattern*/
+	if (dm_value[0] == 1) { /*@fix beam pattern*/
 
-		pdm_sat_table->fix_beam_pattern_en = dm_value[1];
+		sat_tab->fix_beam_pattern_en = dm_value[1];
 
-		if (pdm_sat_table->fix_beam_pattern_en == 1) {
+		if (sat_tab->fix_beam_pattern_en == 1) {
+			sat_tab->fix_beam_pattern_codeword = dm_value[2];
 
-			pdm_sat_table->fix_beam_pattern_codeword = dm_value[2];
+			if (sat_tab->fix_beam_pattern_codeword > (one << codeword_length)) {
+				PHYDM_DBG(dm, DBG_ANT_DIV,
+					  "[ SmartAnt ] Codeword overflow, Current codeword is ((0x%x)), and should be less than ((%d))bit\n",
+					  sat_tab->fix_beam_pattern_codeword,
+					  codeword_length);
 
-			if (pdm_sat_table->fix_beam_pattern_codeword  > (one << codeword_length)) {
+				(sat_tab->fix_beam_pattern_codeword) &= 0xffffff;
 
-				PHYDM_DBG(p_dm, DBG_ANT_DIV, ("[ SmartAnt ] Codeword overflow, Current codeword is ((0x%x)), and should be less than ((%d))bit\n",
-					pdm_sat_table->fix_beam_pattern_codeword, codeword_length));
-				
-				(pdm_sat_table->fix_beam_pattern_codeword) &= 0xffffff;
-				
-				PHYDM_DBG(p_dm, DBG_ANT_DIV, ("[ SmartAnt ] Auto modify to (0x%x)\n", pdm_sat_table->fix_beam_pattern_codeword));
+				PHYDM_DBG(dm, DBG_ANT_DIV,
+					  "[ SmartAnt ] Auto modify to (0x%x)\n",
+					  sat_tab->fix_beam_pattern_codeword);
 			}
 
-			pdm_sat_table->update_beam_codeword = pdm_sat_table->fix_beam_pattern_codeword;
+			sat_tab->update_beam_codeword = sat_tab->fix_beam_pattern_codeword;
+
+			/*@---------------------------------------------------------*/
+			PDM_SNPF(out_len, used, output + used, out_len - used,
+				 "Fix Beam Pattern\n");
+
+			devide_num = (sat_tab->rfu_protocol_type == 2) ? 6 : 4;
 
-			/*---------------------------------------------------------*/
-			PHYDM_SNPRINTF((output + used, out_len - used, "Fix Beam Pattern\n"));
-			
-			devide_num = (pdm_sat_table->rfu_protocol_type == 2) ? 6 : 4;
-			
 			for (i = 0; i <= (codeword_length - 1); i++) {
-				beam_ctrl_signal = (boolean)((pdm_sat_table->update_beam_codeword & BIT(i)) >> i);
-
-				if (i == (codeword_length - 1)) {
-					PHYDM_SNPRINTF((output + used, out_len - used, "%d]\n", beam_ctrl_signal));
-					/**/
-				} else if (i == 0) {
-					PHYDM_SNPRINTF((output + used, out_len - used, "Send Codeword[1:24] to RFU -> [%d", beam_ctrl_signal));
-					/**/
-				} else if ((i % devide_num) == (devide_num-1)) {
-					PHYDM_SNPRINTF((output + used, out_len - used, "%d|", beam_ctrl_signal));
-					/**/
-				} else {
-					PHYDM_SNPRINTF((output + used, out_len - used, "%d", beam_ctrl_signal));
-					/**/
-				}
+				beam_ctrl_signal = (boolean)((sat_tab->update_beam_codeword & BIT(i)) >> i);
+
+				if (i == (codeword_length - 1))
+					PDM_SNPF(out_len, used,
+						 output + used,
+						 out_len - used,
+						 "%d]\n",
+						 beam_ctrl_signal);
+				else if (i == 0)
+					PDM_SNPF(out_len, used,
+						 output + used,
+						 out_len - used,
+						 "Send Codeword[1:24] to RFU -> [%d",
+						 beam_ctrl_signal);
+				else if ((i % devide_num) == (devide_num - 1))
+					PDM_SNPF(out_len, used,
+						 output + used,
+						 out_len - used, "%d|",
+						 beam_ctrl_signal);
+				else
+					PDM_SNPF(out_len, used,
+						 output + used,
+						 out_len - used, "%d",
+						 beam_ctrl_signal);
 			}
-			/*---------------------------------------------------------*/
+/*@---------------------------------------------------------*/
 
-
-#if DEV_BUS_TYPE == RT_PCI_INTERFACE
-			phydm_update_beam_pattern(p_dm, pdm_sat_table->update_beam_codeword, pdm_sat_table->rfu_codeword_total_bit_num);
-#else
-			odm_schedule_work_item(&pdm_sat_table->hl_smart_antenna_workitem);
+			#if DEV_BUS_TYPE == RT_PCI_INTERFACE
+			if (dm->support_interface == ODM_ITRF_PCIE)
+				phydm_update_beam_pattern(dm, sat_tab->update_beam_codeword, sat_tab->rfu_codeword_total_bit_num);
+			#endif
+			#if DEV_BUS_TYPE == RT_USB_INTERFACE || DEV_BUS_TYPE == RT_SDIO_INTERFACE
+			if (dm->support_interface == ODM_ITRF_USB || dm->support_interface == ODM_ITRF_SDIO)
+				odm_schedule_work_item(&sat_tab->hl_smart_antenna_workitem);
+#if 0
 			/*odm_stall_execution(1);*/
 #endif
-		} else if (pdm_sat_table->fix_beam_pattern_en == 0)
-			PHYDM_SNPRINTF((output + used, out_len - used, "[ SmartAnt ] Smart Antenna: Enable\n"));
+			#endif
+		} else if (sat_tab->fix_beam_pattern_en == 0)
+			PDM_SNPF(out_len, used, output + used, out_len - used,
+				 "[ SmartAnt ] Smart Antenna: Enable\n");
 
 	} else if (dm_value[0] == 2) { /*set latch time*/
 
-		pdm_sat_table->latch_time = dm_value[1];
-		PHYDM_DBG(p_dm, DBG_ANT_DIV, ("[ SmartAnt ]  latch_time =0x%x\n", pdm_sat_table->latch_time));
+		sat_tab->latch_time = dm_value[1];
+		PHYDM_DBG(dm, DBG_ANT_DIV, "[ SmartAnt ]  latch_time =0x%x\n",
+			  sat_tab->latch_time);
 	} else if (dm_value[0] == 3) {
+		sat_tab->fix_training_num_en = dm_value[1];
 
-		pdm_sat_table->fix_training_num_en = dm_value[1];
-
-		if (pdm_sat_table->fix_training_num_en == 1) {
-			pdm_sat_table->per_beam_training_pkt_num = (u8)dm_value[2];
-			pdm_sat_table->decision_holding_period = (u8)dm_value[3];
+		if (sat_tab->fix_training_num_en == 1) {
+			sat_tab->per_beam_training_pkt_num = (u8)dm_value[2];
+			sat_tab->decision_holding_period = (u8)dm_value[3];
 
-			PHYDM_SNPRINTF((output + used, out_len - used, "[SmartAnt][Dbg] Fix_train_en = (( %d )), train_pkt_num = (( %d )), holding_period = (( %d )),\n",
-				pdm_sat_table->fix_training_num_en, pdm_sat_table->per_beam_training_pkt_num, pdm_sat_table->decision_holding_period));
+			PDM_SNPF(out_len, used, output + used, out_len - used,
+				 "[SmartAnt][Dbg] Fix_train_en = (( %d )), train_pkt_num = (( %d )), holding_period = (( %d )),\n",
+				 sat_tab->fix_training_num_en,
+				 sat_tab->per_beam_training_pkt_num,
+				 sat_tab->decision_holding_period);
 
-		} else if (pdm_sat_table->fix_training_num_en == 0) {
-			PHYDM_SNPRINTF((output + used, out_len - used, "[ SmartAnt ]  AUTO per_beam_training_pkt_num\n"));
-			/**/
+		} else if (sat_tab->fix_training_num_en == 0) {
+			PDM_SNPF(out_len, used, output + used, out_len - used,
+				 "[ SmartAnt ]  AUTO per_beam_training_pkt_num\n");
 		}
 	} else if (dm_value[0] == 4) {
-
 		if (dm_value[1] == 1) {
-			pdm_sat_table->ant_num = 1;
-			pdm_sat_table->first_train_ant = MAIN_ANT;
+			sat_tab->ant_num = 1;
+			sat_tab->first_train_ant = MAIN_ANT;
 
 		} else if (dm_value[1] == 2) {
-			pdm_sat_table->ant_num = 1;
-			pdm_sat_table->first_train_ant = AUX_ANT;
+			sat_tab->ant_num = 1;
+			sat_tab->first_train_ant = AUX_ANT;
 
 		} else if (dm_value[1] == 3) {
-			pdm_sat_table->ant_num = 2;
-			pdm_sat_table->first_train_ant = MAIN_ANT;
+			sat_tab->ant_num = 2;
+			sat_tab->first_train_ant = MAIN_ANT;
 		}
 
-		PHYDM_SNPRINTF((output + used, out_len - used, "[ SmartAnt ]  Set ant Num = (( %d )), first_train_ant = (( %d ))\n",
-			pdm_sat_table->ant_num, (pdm_sat_table->first_train_ant - 1)));
+		PDM_SNPF(out_len, used, output + used, out_len - used,
+			 "[ SmartAnt ]  Set ant Num = (( %d )), first_train_ant = (( %d ))\n",
+			 sat_tab->ant_num, (sat_tab->first_train_ant - 1));
 	} else if (dm_value[0] == 5) {
-
 		if (dm_value[1] <= 3) {
-			pdm_sat_table->rfu_codeword_table[dm_value[1]] = dm_value[2];
-			PHYDM_SNPRINTF((output + used, out_len - used, "[ SmartAnt ] Set Beam_2G: (( %d )), RFU codeword table = (( 0x%x ))\n",
-					dm_value[1], dm_value[2]));
+			sat_tab->rfu_codeword_table[dm_value[1]] = dm_value[2];
+			PDM_SNPF(out_len, used, output + used, out_len - used,
+				 "[ SmartAnt ] Set Beam_2G: (( %d )), RFU codeword table = (( 0x%x ))\n",
+				 dm_value[1], dm_value[2]);
 		} else {
 			for (i = 0; i < 4; i++) {
-				PHYDM_SNPRINTF((output + used, out_len - used, "[ SmartAnt ] Show Beam_2G: (( %d )), RFU codeword table = (( 0x%x ))\n",
-					i, pdm_sat_table->rfu_codeword_table[i]));
+				PDM_SNPF(out_len, used, output + used,
+					 out_len - used,
+					 "[ SmartAnt ] Show Beam_2G: (( %d )), RFU codeword table = (( 0x%x ))\n",
+					 i, sat_tab->rfu_codeword_table[i]);
 			}
 		}
 	} else if (dm_value[0] == 6) {
-
 		if (dm_value[1] <= 3) {
-			pdm_sat_table->rfu_codeword_table_5g[dm_value[1]] = dm_value[2];
-			PHYDM_SNPRINTF((output + used, out_len - used, "[ SmartAnt ] Set Beam_5G: (( %d )), RFU codeword table = (( 0x%x ))\n",
-					dm_value[1], dm_value[2]));
+			sat_tab->rfu_codeword_table_5g[dm_value[1]] = dm_value[2];
+			PDM_SNPF(out_len, used, output + used, out_len - used,
+				 "[ SmartAnt ] Set Beam_5G: (( %d )), RFU codeword table = (( 0x%x ))\n",
+				 dm_value[1], dm_value[2]);
 		} else {
 			for (i = 0; i < 4; i++) {
-				PHYDM_SNPRINTF((output + used, out_len - used, "[ SmartAnt ] Show Beam_5G: (( %d )), RFU codeword table = (( 0x%x ))\n",
-					i, pdm_sat_table->rfu_codeword_table_5g[i]));
+				PDM_SNPF(out_len, used, output + used,
+					 out_len - used,
+					 "[ SmartAnt ] Show Beam_5G: (( %d )), RFU codeword table = (( 0x%x ))\n",
+					 i, sat_tab->rfu_codeword_table_5g[i]);
 			}
 		}
 	} else if (dm_value[0] == 7) {
-
 		if (dm_value[1] <= 4) {
-
-			pdm_sat_table->beam_patten_num_each_ant = dm_value[1];
-			PHYDM_SNPRINTF((output + used, out_len - used, "[ SmartAnt ] Set Beam number = (( %d ))\n",
-				pdm_sat_table->beam_patten_num_each_ant));
+			sat_tab->beam_patten_num_each_ant = dm_value[1];
+			PDM_SNPF(out_len, used, output + used, out_len - used,
+				 "[ SmartAnt ] Set Beam number = (( %d ))\n",
+				 sat_tab->beam_patten_num_each_ant);
 		} else {
-
-			PHYDM_SNPRINTF((output + used, out_len - used, "[ SmartAnt ] Show Beam number = (( %d ))\n",
-				pdm_sat_table->beam_patten_num_each_ant));
+			PDM_SNPF(out_len, used, output + used, out_len - used,
+				 "[ SmartAnt ] Show Beam number = (( %d ))\n",
+				 sat_tab->beam_patten_num_each_ant);
 		}
 	}
 	*_used = used;
 	*_out_len = out_len;
 }
 
-
-void
-phydm_set_all_ant_same_beam_num(
-	void		*p_dm_void
-)
+void phydm_set_all_ant_same_beam_num(
+	void *dm_void)
 {
-	struct PHY_DM_STRUCT		*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	struct smt_ant_honbo			*pdm_sat_table = &(p_dm->dm_sat_table);
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct smt_ant_honbo *sat_tab = &dm->dm_sat_table;
 
-	if (p_dm->ant_div_type == HL_SW_SMART_ANT_TYPE1) { /*2ant for 8821A*/
+	if (dm->ant_div_type == HL_SW_SMART_ANT_TYPE1) { /*@2ant for 8821A*/
 
-		pdm_sat_table->rx_idle_beam[0] = pdm_sat_table->fast_training_beam_num;
-		pdm_sat_table->rx_idle_beam[1] = pdm_sat_table->fast_training_beam_num;
+		sat_tab->rx_idle_beam[0] = sat_tab->fast_training_beam_num;
+		sat_tab->rx_idle_beam[1] = sat_tab->fast_training_beam_num;
 	}
 
-	pdm_sat_table->update_beam_codeword = phydm_construct_hl_beam_codeword(p_dm, &(pdm_sat_table->rx_idle_beam[0]), pdm_sat_table->ant_num);
+	sat_tab->update_beam_codeword = phydm_construct_hl_beam_codeword(dm,
+									 &sat_tab->rx_idle_beam[0],
+									 sat_tab->ant_num);
 
-	PHYDM_DBG(p_dm, DBG_ANT_DIV, ("[ SmartAnt ] Set all ant beam_pattern: codeword = (( 0x%x ))\n", pdm_sat_table->update_beam_codeword));
+	PHYDM_DBG(dm, DBG_ANT_DIV,
+		  "[ SmartAnt ] Set all ant beam_pattern: codeword = (( 0x%x ))\n",
+		  sat_tab->update_beam_codeword);
 
 #if DEV_BUS_TYPE == RT_PCI_INTERFACE
-	phydm_update_beam_pattern(p_dm, pdm_sat_table->update_beam_codeword, pdm_sat_table->rfu_codeword_total_bit_num);
-#else
-	odm_schedule_work_item(&pdm_sat_table->hl_smart_antenna_workitem);
-	/*odm_stall_execution(1);*/
+	if (dm->support_interface == ODM_ITRF_PCIE)
+		phydm_update_beam_pattern(dm, sat_tab->update_beam_codeword, sat_tab->rfu_codeword_total_bit_num);
+#endif
+#if DEV_BUS_TYPE == RT_USB_INTERFACE || DEV_BUS_TYPE == RT_SDIO_INTERFACE
+	if (dm->support_interface == ODM_ITRF_USB || dm->support_interface == ODM_ITRF_SDIO)
+		odm_schedule_work_item(&sat_tab->hl_smart_antenna_workitem);
+/*odm_stall_execution(1);*/
 #endif
 }
 
-void
-odm_fast_ant_training_hl_smart_antenna_type1(
-	void		*p_dm_void
-)
+void odm_fast_ant_training_hl_smart_antenna_type1(
+	void *dm_void)
 {
-	struct PHY_DM_STRUCT	*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	struct smt_ant_honbo		*pdm_sat_table = &(p_dm->dm_sat_table);
-	struct phydm_fat_struct		*p_dm_fat_table	 = &(p_dm->dm_fat_table);
-	struct _sw_antenna_switch_		*p_dm_swat_table = &p_dm->dm_swat_table;
-	u32		codeword = 0, i, j;
-	u32		target_ant;
-	u32		avg_rssi_tmp, avg_rssi_tmp_ma;
-	u32		target_ant_beam_max_rssi[SUPPORT_RF_PATH_NUM] = {0};
-	u32		max_beam_ant_rssi = 0;
-	u32		target_ant_beam[SUPPORT_RF_PATH_NUM] = {0};
-	u32		beam_tmp;
-	u8		next_ant;
-	u32		rssi_sorting_seq[SUPPORT_BEAM_PATTERN_NUM] = {0};
-	u32		rank_idx_seq[SUPPORT_BEAM_PATTERN_NUM] = {0};
-	u32		rank_idx_out[SUPPORT_BEAM_PATTERN_NUM] = {0};
-	u8		per_beam_rssi_diff_tmp = 0, training_pkt_num_offset;
-	u32		break_counter = 0;
-	u32		used_ant;
-
-
-	if (!p_dm->is_linked) {
-		PHYDM_DBG(p_dm, DBG_ANT_DIV, ("[No Link!!!]\n"));
-
-		if (p_dm_fat_table->is_become_linked == true) {
-
-			PHYDM_DBG(p_dm, DBG_ANT_DIV, ("Link->no Link\n"));
-			p_dm_fat_table->fat_state = FAT_BEFORE_LINK_STATE;
-			odm_ant_div_on_off(p_dm, ANTDIV_OFF);
-			odm_tx_by_tx_desc_or_reg(p_dm, TX_BY_REG);
-			PHYDM_DBG(p_dm, DBG_ANT_DIV, ("change to (( %d )) FAT_state\n", p_dm_fat_table->fat_state));
-
-			p_dm_fat_table->is_become_linked = p_dm->is_linked;
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct smt_ant_honbo *sat_tab = &dm->dm_sat_table;
+	struct phydm_fat_struct *fat_tab = &dm->dm_fat_table;
+	struct sw_antenna_switch *dm_swat_table = &dm->dm_swat_table;
+	u32 codeword = 0, i, j;
+	u32 target_ant;
+	u32 avg_rssi_tmp, avg_rssi_tmp_ma;
+	u32 target_ant_beam_max_rssi[SUPPORT_RF_PATH_NUM] = {0};
+	u32 max_beam_ant_rssi = 0;
+	u32 target_ant_beam[SUPPORT_RF_PATH_NUM] = {0};
+	u32 beam_tmp;
+	u8 next_ant;
+	u32 rssi_sorting_seq[SUPPORT_BEAM_PATTERN_NUM] = {0};
+	u32 rank_idx_seq[SUPPORT_BEAM_PATTERN_NUM] = {0};
+	u32 rank_idx_out[SUPPORT_BEAM_PATTERN_NUM] = {0};
+	u8 per_beam_rssi_diff_tmp = 0, training_pkt_num_offset;
+	u32 break_counter = 0;
+	u32 used_ant;
+
+	if (!dm->is_linked) {
+		PHYDM_DBG(dm, DBG_ANT_DIV, "[No Link!!!]\n");
+
+		if (fat_tab->is_become_linked == true) {
+			PHYDM_DBG(dm, DBG_ANT_DIV, "Link->no Link\n");
+			fat_tab->fat_state = FAT_BEFORE_LINK_STATE;
+			odm_ant_div_on_off(dm, ANTDIV_OFF, ANT_PATH_A);
+			odm_tx_by_tx_desc_or_reg(dm, TX_BY_REG);
+			PHYDM_DBG(dm, DBG_ANT_DIV,
+				  "change to (( %d )) FAT_state\n",
+				  fat_tab->fat_state);
+
+			fat_tab->is_become_linked = dm->is_linked;
 		}
 		return;
 
 	} else {
-		if (p_dm_fat_table->is_become_linked == false) {
-
-			PHYDM_DBG(p_dm, DBG_ANT_DIV, ("[Linked !!!]\n"));
+		if (fat_tab->is_become_linked == false) {
+			PHYDM_DBG(dm, DBG_ANT_DIV, "[Linked !!!]\n");
 
-			p_dm_fat_table->fat_state = FAT_PREPARE_STATE;
-			PHYDM_DBG(p_dm, DBG_ANT_DIV, ("change to (( %d )) FAT_state\n", p_dm_fat_table->fat_state));
+			fat_tab->fat_state = FAT_PREPARE_STATE;
+			PHYDM_DBG(dm, DBG_ANT_DIV,
+				  "change to (( %d )) FAT_state\n",
+				  fat_tab->fat_state);
 
-			/*pdm_sat_table->fast_training_beam_num = 0;*/
-			/*phydm_set_all_ant_same_beam_num(p_dm);*/
+#if 0
+			/*sat_tab->fast_training_beam_num = 0;*/
+			/*phydm_set_all_ant_same_beam_num(dm);*/
+#endif
 
-			p_dm_fat_table->is_become_linked = p_dm->is_linked;
+			fat_tab->is_become_linked = dm->is_linked;
 		}
 	}
 
-	if (*(p_dm_fat_table->p_force_tx_ant_by_desc) == false) {
-		if (p_dm->is_one_entry_only == true)
-			odm_tx_by_tx_desc_or_reg(p_dm, TX_BY_REG);
+	if (!(*fat_tab->p_force_tx_by_desc)) {
+		if (dm->is_one_entry_only == true)
+			odm_tx_by_tx_desc_or_reg(dm, TX_BY_REG);
 		else
-			odm_tx_by_tx_desc_or_reg(p_dm, TX_BY_DESC);
+			odm_tx_by_tx_desc_or_reg(dm, TX_BY_DESC);
 	}
 
-	/*PHYDM_DBG(p_dm, DBG_ANT_DIV, ("HL Smart ant Training: state (( %d ))\n", p_dm_fat_table->fat_state));*/
-
-	/* [DECISION STATE] */
-	/*=======================================================================================*/
-	if (p_dm_fat_table->fat_state == FAT_DECISION_STATE) {
+#if 0
+	/*PHYDM_DBG(dm, DBG_ANT_DIV, "HL Smart ant Training: state (( %d ))\n", fat_tab->fat_state);*/
+#endif
 
-		PHYDM_DBG(p_dm, DBG_ANT_DIV, ("[ 3. In Decision state]\n"));
-		phydm_fast_training_enable(p_dm, FAT_OFF);
+	/* @[DECISION STATE] */
+	/*@=======================================================================================*/
+	if (fat_tab->fat_state == FAT_DECISION_STATE) {
+		PHYDM_DBG(dm, DBG_ANT_DIV, "[ 3. In Decision state]\n");
+		phydm_fast_training_enable(dm, FAT_OFF);
 
 		break_counter = 0;
-		/*compute target beam in each antenna*/
-		for (i = (pdm_sat_table->first_train_ant - 1); i < pdm_sat_table->ant_num_total; i++) {
-			for (j = 0; j < (pdm_sat_table->beam_patten_num_each_ant); j++) {
-
-				if (pdm_sat_table->pkt_rssi_cnt[i][j] == 0) {
-					avg_rssi_tmp = pdm_sat_table->pkt_rssi_pre[i][j];
+		/*@compute target beam in each antenna*/
+		for (i = (sat_tab->first_train_ant - 1); i < sat_tab->ant_num_total; i++) {
+			for (j = 0; j < (sat_tab->beam_patten_num_each_ant); j++) {
+				if (sat_tab->pkt_rssi_cnt[i][j] == 0) {
+					avg_rssi_tmp = sat_tab->pkt_rssi_pre[i][j];
 					avg_rssi_tmp = (avg_rssi_tmp >= 2) ? (avg_rssi_tmp - 2) : avg_rssi_tmp;
 					avg_rssi_tmp_ma = avg_rssi_tmp;
 				} else {
-					avg_rssi_tmp = (pdm_sat_table->pkt_rssi_sum[i][j]) / (pdm_sat_table->pkt_rssi_cnt[i][j]);
-					avg_rssi_tmp_ma = (avg_rssi_tmp + pdm_sat_table->pkt_rssi_pre[i][j]) >> 1;
+					avg_rssi_tmp = (sat_tab->pkt_rssi_sum[i][j]) / (sat_tab->pkt_rssi_cnt[i][j]);
+					avg_rssi_tmp_ma = (avg_rssi_tmp + sat_tab->pkt_rssi_pre[i][j]) >> 1;
 				}
 
 				rssi_sorting_seq[j] = avg_rssi_tmp;
-				pdm_sat_table->pkt_rssi_pre[i][j] = avg_rssi_tmp;
+				sat_tab->pkt_rssi_pre[i][j] = avg_rssi_tmp;
 
-				PHYDM_DBG(p_dm, DBG_ANT_DIV, ("ant[%d], Beam[%d]: pkt_cnt=(( %d )), avg_rssi_MA=(( %d )), avg_rssi=(( %d ))\n",
-					i, j, pdm_sat_table->pkt_rssi_cnt[i][j], avg_rssi_tmp_ma, avg_rssi_tmp));
+				PHYDM_DBG(dm, DBG_ANT_DIV,
+					  "ant[%d], Beam[%d]: pkt_cnt=(( %d )), avg_rssi_MA=(( %d )), avg_rssi=(( %d ))\n",
+					  i, j, sat_tab->pkt_rssi_cnt[i][j],
+					  avg_rssi_tmp_ma, avg_rssi_tmp);
 
 				if (avg_rssi_tmp > target_ant_beam_max_rssi[i]) {
 					target_ant_beam[i] = j;
@@ -1813,51 +1945,56 @@ odm_fast_ant_training_hl_smart_antenna_type1(
 				}
 
 				/*reset counter value*/
-				pdm_sat_table->pkt_rssi_sum[i][j] = 0;
-				pdm_sat_table->pkt_rssi_cnt[i][j] = 0;
-
+				sat_tab->pkt_rssi_sum[i][j] = 0;
+				sat_tab->pkt_rssi_cnt[i][j] = 0;
 			}
-			pdm_sat_table->rx_idle_beam[i] = target_ant_beam[i];
-			PHYDM_DBG(p_dm, DBG_ANT_DIV, ("---------> Target of ant[%d]: Beam_num-(( %d )) RSSI= ((%d))\n",
-				i,  target_ant_beam[i], target_ant_beam_max_rssi[i]));
+			sat_tab->rx_idle_beam[i] = target_ant_beam[i];
+			PHYDM_DBG(dm, DBG_ANT_DIV,
+				  "---------> Target of ant[%d]: Beam_num-(( %d )) RSSI= ((%d))\n",
+				  i, target_ant_beam[i],
+				  target_ant_beam_max_rssi[i]);
 
+#if 0
 			/*sorting*/
-			/*
-			PHYDM_DBG(p_dm, DBG_ANT_DIV, ("[Pre]rssi_sorting_seq = [%d, %d, %d, %d]\n", rssi_sorting_seq[0], rssi_sorting_seq[1], rssi_sorting_seq[2], rssi_sorting_seq[3]));
+			/*@
+			PHYDM_DBG(dm, DBG_ANT_DIV, "[Pre]rssi_sorting_seq = [%d, %d, %d, %d]\n", rssi_sorting_seq[0], rssi_sorting_seq[1], rssi_sorting_seq[2], rssi_sorting_seq[3]);
 			*/
 
-			/*phydm_seq_sorting(p_dm, &rssi_sorting_seq[0], &rank_idx_seq[0], &rank_idx_out[0], SUPPORT_BEAM_PATTERN_NUM);*/
+			/*phydm_seq_sorting(dm, &rssi_sorting_seq[0], &rank_idx_seq[0], &rank_idx_out[0], SUPPORT_BEAM_PATTERN_NUM);*/
 
-			/*
-			PHYDM_DBG(p_dm, DBG_ANT_DIV, ("[Post]rssi_sorting_seq = [%d, %d, %d, %d]\n", rssi_sorting_seq[0], rssi_sorting_seq[1], rssi_sorting_seq[2], rssi_sorting_seq[3]));
-			PHYDM_DBG(p_dm, DBG_ANT_DIV, ("[Post]rank_idx_seq = [%d, %d, %d, %d]\n", rank_idx_seq[0], rank_idx_seq[1], rank_idx_seq[2], rank_idx_seq[3]));
-			PHYDM_DBG(p_dm, DBG_ANT_DIV, ("[Post]rank_idx_out = [%d, %d, %d, %d]\n", rank_idx_out[0], rank_idx_out[1], rank_idx_out[2], rank_idx_out[3]));
+			/*@
+			PHYDM_DBG(dm, DBG_ANT_DIV, "[Post]rssi_sorting_seq = [%d, %d, %d, %d]\n", rssi_sorting_seq[0], rssi_sorting_seq[1], rssi_sorting_seq[2], rssi_sorting_seq[3]);
+			PHYDM_DBG(dm, DBG_ANT_DIV, "[Post]rank_idx_seq = [%d, %d, %d, %d]\n", rank_idx_seq[0], rank_idx_seq[1], rank_idx_seq[2], rank_idx_seq[3]);
+			PHYDM_DBG(dm, DBG_ANT_DIV, "[Post]rank_idx_out = [%d, %d, %d, %d]\n", rank_idx_out[0], rank_idx_out[1], rank_idx_out[2], rank_idx_out[3]);
 			*/
+#endif
 
 			if (target_ant_beam_max_rssi[i] > max_beam_ant_rssi) {
 				target_ant = i;
 				max_beam_ant_rssi = target_ant_beam_max_rssi[i];
-				/*PHYDM_DBG(p_dm, DBG_ANT_DIV, ("Target of ant = (( %d )) max_beam_ant_rssi = (( %d ))\n",
-					target_ant,  max_beam_ant_rssi));*/
+#if
+				/*PHYDM_DBG(dm, DBG_ANT_DIV, "Target of ant = (( %d )) max_beam_ant_rssi = (( %d ))\n",
+					target_ant,  max_beam_ant_rssi);*/
+#endif
 			}
 			break_counter++;
-			if (break_counter >= (pdm_sat_table->ant_num))
+			if (break_counter >= sat_tab->ant_num)
 				break;
 		}
 
 #ifdef CONFIG_FAT_PATCH
 		break_counter = 0;
-		for (i = (pdm_sat_table->first_train_ant - 1); i < pdm_sat_table->ant_num_total; i++) {
-			for (j = 0; j < (pdm_sat_table->beam_patten_num_each_ant); j++) {
-
-				per_beam_rssi_diff_tmp = (u8)(max_beam_ant_rssi - pdm_sat_table->pkt_rssi_pre[i][j]);
-				pdm_sat_table->beam_train_rssi_diff[i][j] = per_beam_rssi_diff_tmp;
-
-				PHYDM_DBG(p_dm, DBG_ANT_DIV, ("ant[%d], Beam[%d]: RSSI_diff= ((%d))\n",
-						i,  j, per_beam_rssi_diff_tmp));
+		for (i = (sat_tab->first_train_ant - 1); i < sat_tab->ant_num_total; i++) {
+			for (j = 0; j < (sat_tab->beam_patten_num_each_ant); j++) {
+				per_beam_rssi_diff_tmp = (u8)(max_beam_ant_rssi - sat_tab->pkt_rssi_pre[i][j]);
+				sat_tab->beam_train_rssi_diff[i][j] = per_beam_rssi_diff_tmp;
+
+				PHYDM_DBG(dm, DBG_ANT_DIV,
+					  "ant[%d], Beam[%d]: RSSI_diff= ((%d))\n",
+					  i, j, per_beam_rssi_diff_tmp);
 			}
 			break_counter++;
-			if (break_counter >= (pdm_sat_table->ant_num))
+			if (break_counter >= sat_tab->ant_num)
 				break;
 		}
 #endif
@@ -1867,288 +2004,274 @@ odm_fast_ant_training_hl_smart_antenna_type1(
 		else if (target_ant == 1)
 			target_ant = AUX_ANT;
 
-		if (pdm_sat_table->ant_num > 1) {
-			/* [ update RX ant ]*/
-			odm_update_rx_idle_ant(p_dm, (u8)target_ant);
+		if (sat_tab->ant_num > 1) {
+			/* @[ update RX ant ]*/
+			odm_update_rx_idle_ant(dm, (u8)target_ant);
 
-			/* [ update TX ant ]*/
-			odm_update_tx_ant(p_dm, (u8)target_ant, (p_dm_fat_table->train_idx));
+			/* @[ update TX ant ]*/
+			odm_update_tx_ant(dm, (u8)target_ant, (fat_tab->train_idx));
 		}
 
 		/*set beam in each antenna*/
-		phydm_update_rx_idle_beam(p_dm);
+		phydm_update_rx_idle_beam(dm);
 
-		odm_ant_div_on_off(p_dm, ANTDIV_ON);
-		p_dm_fat_table->fat_state = FAT_PREPARE_STATE;
+		odm_ant_div_on_off(dm, ANTDIV_ON, ANT_PATH_A);
+		fat_tab->fat_state = FAT_PREPARE_STATE;
 		return;
-
 	}
-	/* [TRAINING STATE] */
-	else if (p_dm_fat_table->fat_state == FAT_TRAINING_STATE) {
-		PHYDM_DBG(p_dm, DBG_ANT_DIV, ("[ 2. In Training state]\n"));
+	/* @[TRAINING STATE] */
+	else if (fat_tab->fat_state == FAT_TRAINING_STATE) {
+		PHYDM_DBG(dm, DBG_ANT_DIV, "[ 2. In Training state]\n");
 
-		PHYDM_DBG(p_dm, DBG_ANT_DIV, ("fat_beam_n = (( %d )), pre_fat_beam_n = (( %d ))\n",
-			pdm_sat_table->fast_training_beam_num, pdm_sat_table->pre_fast_training_beam_num));
+		PHYDM_DBG(dm, DBG_ANT_DIV,
+			  "fat_beam_n = (( %d )), pre_fat_beam_n = (( %d ))\n",
+			  sat_tab->fast_training_beam_num,
+			  sat_tab->pre_fast_training_beam_num);
 
-		if (pdm_sat_table->fast_training_beam_num > pdm_sat_table->pre_fast_training_beam_num)
+		if (sat_tab->fast_training_beam_num > sat_tab->pre_fast_training_beam_num)
 
-			pdm_sat_table->force_update_beam_en = 0;
+			sat_tab->force_update_beam_en = 0;
 
 		else {
+			sat_tab->force_update_beam_en = 1;
 
-			pdm_sat_table->force_update_beam_en = 1;
-
-			pdm_sat_table->pkt_counter = 0;
-			beam_tmp = pdm_sat_table->fast_training_beam_num;
-			if (pdm_sat_table->fast_training_beam_num >= (pdm_sat_table->beam_patten_num_each_ant - 1)) {
-
-				PHYDM_DBG(p_dm, DBG_ANT_DIV, ("[Timeout Update]  Beam_num (( %d )) -> (( decision ))\n", pdm_sat_table->fast_training_beam_num));
-				p_dm_fat_table->fat_state = FAT_DECISION_STATE;
-				odm_fast_ant_training_hl_smart_antenna_type1(p_dm);
+			sat_tab->pkt_counter = 0;
+			beam_tmp = sat_tab->fast_training_beam_num;
+			if (sat_tab->fast_training_beam_num >= (sat_tab->beam_patten_num_each_ant - 1)) {
+				PHYDM_DBG(dm, DBG_ANT_DIV,
+					  "[Timeout Update]  Beam_num (( %d )) -> (( decision ))\n",
+					  sat_tab->fast_training_beam_num);
+				fat_tab->fat_state = FAT_DECISION_STATE;
+				odm_fast_ant_training_hl_smart_antenna_type1(dm);
 
 			} else {
-				pdm_sat_table->fast_training_beam_num++;
-
-				PHYDM_DBG(p_dm, DBG_ANT_DIV, ("[Timeout Update]  Beam_num (( %d )) -> (( %d ))\n", beam_tmp, pdm_sat_table->fast_training_beam_num));
-				phydm_set_all_ant_same_beam_num(p_dm);
-				p_dm_fat_table->fat_state = FAT_TRAINING_STATE;
-
+				sat_tab->fast_training_beam_num++;
+
+				PHYDM_DBG(dm, DBG_ANT_DIV,
+					  "[Timeout Update]  Beam_num (( %d )) -> (( %d ))\n",
+					  beam_tmp,
+					  sat_tab->fast_training_beam_num);
+				phydm_set_all_ant_same_beam_num(dm);
+				fat_tab->fat_state = FAT_TRAINING_STATE;
 			}
 		}
-		pdm_sat_table->pre_fast_training_beam_num = pdm_sat_table->fast_training_beam_num;
-		PHYDM_DBG(p_dm, DBG_ANT_DIV, ("[prepare state] Update Pre_Beam =(( %d ))\n", pdm_sat_table->pre_fast_training_beam_num));
+		sat_tab->pre_fast_training_beam_num = sat_tab->fast_training_beam_num;
+		PHYDM_DBG(dm, DBG_ANT_DIV,
+			  "[prepare state] Update Pre_Beam =(( %d ))\n",
+			  sat_tab->pre_fast_training_beam_num);
 	}
-	/*  [Prepare state] */
-	/*=======================================================================================*/
-	else if (p_dm_fat_table->fat_state == FAT_PREPARE_STATE) {
-
-		PHYDM_DBG(p_dm, DBG_ANT_DIV, ("\n\n[ 1. In Prepare state]\n"));
-
-		if (p_dm->pre_traffic_load == (p_dm->traffic_load)) {
-			if (pdm_sat_table->decision_holding_period != 0) {
-				PHYDM_DBG(p_dm, DBG_ANT_DIV, ("Holding_period = (( %d )), return!!!\n", pdm_sat_table->decision_holding_period));
-				pdm_sat_table->decision_holding_period--;
+	/*  @[Prepare state] */
+	/*@=======================================================================================*/
+	else if (fat_tab->fat_state == FAT_PREPARE_STATE) {
+		PHYDM_DBG(dm, DBG_ANT_DIV, "\n\n[ 1. In Prepare state]\n");
+
+		if (dm->pre_traffic_load == dm->traffic_load) {
+			if (sat_tab->decision_holding_period != 0) {
+				PHYDM_DBG(dm, DBG_ANT_DIV,
+					  "Holding_period = (( %d )), return!!!\n",
+					  sat_tab->decision_holding_period);
+				sat_tab->decision_holding_period--;
 				return;
 			}
 		}
 
-
 		/* Set training packet number*/
-		if (pdm_sat_table->fix_training_num_en == 0) {
-
-			switch (p_dm->traffic_load) {
-
+		if (sat_tab->fix_training_num_en == 0) {
+			switch (dm->traffic_load) {
 			case TRAFFIC_HIGH:
-				pdm_sat_table->per_beam_training_pkt_num = 8;
-				pdm_sat_table->decision_holding_period = 2;
+				sat_tab->per_beam_training_pkt_num = 8;
+				sat_tab->decision_holding_period = 2;
 				break;
 			case TRAFFIC_MID:
-				pdm_sat_table->per_beam_training_pkt_num = 6;
-				pdm_sat_table->decision_holding_period = 3;
+				sat_tab->per_beam_training_pkt_num = 6;
+				sat_tab->decision_holding_period = 3;
 				break;
 			case TRAFFIC_LOW:
-				pdm_sat_table->per_beam_training_pkt_num = 3; /*ping 60000*/
-				pdm_sat_table->decision_holding_period = 4;
+				sat_tab->per_beam_training_pkt_num = 3; /*ping 60000*/
+				sat_tab->decision_holding_period = 4;
 				break;
 			case TRAFFIC_ULTRA_LOW:
-				pdm_sat_table->per_beam_training_pkt_num = 1;
-				pdm_sat_table->decision_holding_period = 6;
+				sat_tab->per_beam_training_pkt_num = 1;
+				sat_tab->decision_holding_period = 6;
 				break;
 			default:
 				break;
 			}
 		}
-		PHYDM_DBG(p_dm, DBG_ANT_DIV, ("Fix_training_en = (( %d )), training_pkt_num_base = (( %d )), holding_period = ((%d))\n",
-			pdm_sat_table->fix_training_num_en, pdm_sat_table->per_beam_training_pkt_num, pdm_sat_table->decision_holding_period));
-
+		PHYDM_DBG(dm, DBG_ANT_DIV,
+			  "Fix_training_en = (( %d )), training_pkt_num_base = (( %d )), holding_period = ((%d))\n",
+			  sat_tab->fix_training_num_en,
+			  sat_tab->per_beam_training_pkt_num,
+			  sat_tab->decision_holding_period);
 
 #ifdef CONFIG_FAT_PATCH
 		break_counter = 0;
-		for (i = (pdm_sat_table->first_train_ant - 1); i < pdm_sat_table->ant_num_total; i++) {
-			for (j = 0; j < (pdm_sat_table->beam_patten_num_each_ant); j++) {
-
-				per_beam_rssi_diff_tmp = pdm_sat_table->beam_train_rssi_diff[i][j];
+		for (i = (sat_tab->first_train_ant - 1); i < sat_tab->ant_num_total; i++) {
+			for (j = 0; j < (sat_tab->beam_patten_num_each_ant); j++) {
+				per_beam_rssi_diff_tmp = sat_tab->beam_train_rssi_diff[i][j];
 				training_pkt_num_offset = per_beam_rssi_diff_tmp;
 
-				if ((pdm_sat_table->per_beam_training_pkt_num) > training_pkt_num_offset)
-					pdm_sat_table->beam_train_cnt[i][j] = pdm_sat_table->per_beam_training_pkt_num - training_pkt_num_offset;
+				if (sat_tab->per_beam_training_pkt_num > training_pkt_num_offset)
+					sat_tab->beam_train_cnt[i][j] = sat_tab->per_beam_training_pkt_num - training_pkt_num_offset;
 				else
-					pdm_sat_table->beam_train_cnt[i][j] = 1;
-
+					sat_tab->beam_train_cnt[i][j] = 1;
 
-				PHYDM_DBG(p_dm, DBG_ANT_DIV, ("ant[%d]: Beam_num-(( %d ))  training_pkt_num = ((%d))\n",
-					i,  j, pdm_sat_table->beam_train_cnt[i][j]));
+				PHYDM_DBG(dm, DBG_ANT_DIV,
+					  "ant[%d]: Beam_num-(( %d ))  training_pkt_num = ((%d))\n",
+					  i, j, sat_tab->beam_train_cnt[i][j]);
 			}
 			break_counter++;
-			if (break_counter >= (pdm_sat_table->ant_num))
+			if (break_counter >= sat_tab->ant_num)
 				break;
 		}
 
+		phydm_fast_training_enable(dm, FAT_OFF);
+		sat_tab->pre_beacon_counter = sat_tab->beacon_counter;
+		sat_tab->update_beam_idx = 0;
 
-		phydm_fast_training_enable(p_dm, FAT_OFF);
-		pdm_sat_table->pre_beacon_counter = pdm_sat_table->beacon_counter;
-		pdm_sat_table->update_beam_idx = 0;
-
-		if (*p_dm->p_band_type == ODM_BAND_5G) {
-			PHYDM_DBG(p_dm, DBG_ANT_DIV, ("Set 5G ant\n"));
-			/*used_ant = (pdm_sat_table->first_train_ant == MAIN_ANT) ? AUX_ANT : MAIN_ANT;*/
-			used_ant = pdm_sat_table->first_train_ant;
+		if (*dm->band_type == ODM_BAND_5G) {
+			PHYDM_DBG(dm, DBG_ANT_DIV, "Set 5G ant\n");
+			/*used_ant = (sat_tab->first_train_ant == MAIN_ANT) ? AUX_ANT : MAIN_ANT;*/
+			used_ant = sat_tab->first_train_ant;
 		} else {
-			PHYDM_DBG(p_dm, DBG_ANT_DIV, ("Set 2.4G ant\n"));
-			used_ant = pdm_sat_table->first_train_ant;
+			PHYDM_DBG(dm, DBG_ANT_DIV, "Set 2.4G ant\n");
+			used_ant = sat_tab->first_train_ant;
 		}
 
-		odm_update_rx_idle_ant(p_dm, (u8)used_ant);
+		odm_update_rx_idle_ant(dm, (u8)used_ant);
 
 #else
 		/* Set training MAC addr. of target */
-		odm_set_next_mac_addr_target(p_dm);
-		phydm_fast_training_enable(p_dm, FAT_ON);
+		odm_set_next_mac_addr_target(dm);
+		phydm_fast_training_enable(dm, FAT_ON);
 #endif
 
-		odm_ant_div_on_off(p_dm, ANTDIV_OFF);
-		pdm_sat_table->pkt_counter = 0;
-		pdm_sat_table->fast_training_beam_num = 0;
-		phydm_set_all_ant_same_beam_num(p_dm);
-		pdm_sat_table->pre_fast_training_beam_num = pdm_sat_table->fast_training_beam_num;
-		p_dm_fat_table->fat_state = FAT_TRAINING_STATE;
+		odm_ant_div_on_off(dm, ANTDIV_OFF, ANT_PATH_A);
+		sat_tab->pkt_counter = 0;
+		sat_tab->fast_training_beam_num = 0;
+		phydm_set_all_ant_same_beam_num(dm);
+		sat_tab->pre_fast_training_beam_num = sat_tab->fast_training_beam_num;
+		fat_tab->fat_state = FAT_TRAINING_STATE;
 	}
-
 }
 
 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
 
-void
-phydm_beam_switch_workitem_callback(
-	void	*p_context
-)
+void phydm_beam_switch_workitem_callback(
+	void *context)
 {
-	struct _ADAPTER		*p_adapter = (struct _ADAPTER *)p_context;
-	HAL_DATA_TYPE	*p_hal_data = GET_HAL_DATA(p_adapter);
-	struct PHY_DM_STRUCT		*p_dm = &p_hal_data->DM_OutSrc;
-	struct smt_ant_honbo			*pdm_sat_table = &(p_dm->dm_sat_table);
+	void *adapter = (void *)context;
+	HAL_DATA_TYPE *hal_data = GET_HAL_DATA(((PADAPTER)adapter));
+	struct dm_struct *dm = &hal_data->DM_OutSrc;
+	struct smt_ant_honbo *sat_tab = &dm->dm_sat_table;
 
 #if DEV_BUS_TYPE != RT_PCI_INTERFACE
-	pdm_sat_table->pkt_skip_statistic_en = 1;
+	sat_tab->pkt_skip_statistic_en = 1;
 #endif
-	PHYDM_DBG(p_dm, DBG_ANT_DIV, ("[ SmartAnt ] Beam Switch Workitem Callback, pkt_skip_statistic_en = (( %d ))\n", pdm_sat_table->pkt_skip_statistic_en));
+	PHYDM_DBG(dm, DBG_ANT_DIV,
+		  "[ SmartAnt ] Beam Switch Workitem Callback, pkt_skip_statistic_en = (( %d ))\n",
+		  sat_tab->pkt_skip_statistic_en);
 
-	phydm_update_beam_pattern(p_dm, pdm_sat_table->update_beam_codeword, pdm_sat_table->rfu_codeword_total_bit_num);
+	phydm_update_beam_pattern(dm, sat_tab->update_beam_codeword, sat_tab->rfu_codeword_total_bit_num);
 
 #if DEV_BUS_TYPE != RT_PCI_INTERFACE
-	/*odm_stall_execution(pdm_sat_table->latch_time);*/
-	pdm_sat_table->pkt_skip_statistic_en = 0;
+#if 0
+	/*odm_stall_execution(sat_tab->latch_time);*/
+#endif
+	sat_tab->pkt_skip_statistic_en = 0;
 #endif
-	PHYDM_DBG(p_dm, DBG_ANT_DIV, ("pkt_skip_statistic_en = (( %d )), latch_time = (( %d ))\n", pdm_sat_table->pkt_skip_statistic_en, pdm_sat_table->latch_time));
+	PHYDM_DBG(dm, DBG_ANT_DIV,
+		  "pkt_skip_statistic_en = (( %d )), latch_time = (( %d ))\n",
+		  sat_tab->pkt_skip_statistic_en, sat_tab->latch_time);
 }
 
-void
-phydm_beam_decision_workitem_callback(
-	void	*p_context
-)
+void phydm_beam_decision_workitem_callback(
+	void *context)
 {
-	struct _ADAPTER		*p_adapter = (struct _ADAPTER *)p_context;
-	HAL_DATA_TYPE	*p_hal_data = GET_HAL_DATA(p_adapter);
-	struct PHY_DM_STRUCT		*p_dm = &p_hal_data->DM_OutSrc;
+	void *adapter = (void *)context;
+	HAL_DATA_TYPE *hal_data = GET_HAL_DATA(((PADAPTER)adapter));
+	struct dm_struct *dm = &hal_data->DM_OutSrc;
 
-	PHYDM_DBG(p_dm, DBG_ANT_DIV, ("[ SmartAnt ] Beam decision Workitem Callback\n"));
-	odm_fast_ant_training_hl_smart_antenna_type1(p_dm);
+	PHYDM_DBG(dm, DBG_ANT_DIV,
+		  "[ SmartAnt ] Beam decision Workitem Callback\n");
+	odm_fast_ant_training_hl_smart_antenna_type1(dm);
 }
 #endif
 
+#endif /*@#ifdef CONFIG_HL_SMART_ANTENNA_TYPE1*/
 
-#endif /*#ifdef CONFIG_HL_SMART_ANTENNA_TYPE1*/
+#endif /*@#ifdef CONFIG_HL_SMART_ANTENNA*/
 
+void phydm_smt_ant_config(
+	void *dm_void)
+{
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct smt_ant *smtant_table = &dm->smtant_table;
 
-#endif/*#ifdef CONFIG_HL_SMART_ANTENNA*/
+#if (defined(CONFIG_CUMITEK_SMART_ANTENNA))
 
+	dm->support_ability |= ODM_BB_SMT_ANT;
+	smtant_table->smt_ant_vendor = SMTANT_CUMITEK;
+	smtant_table->smt_ant_type = 1;
+#if (RTL8822B_SUPPORT == 1)
+	dm->rfe_type = SMTANT_TMP_RFE_TYPE;
+#endif
+#elif (defined(CONFIG_HL_SMART_ANTENNA))
 
+	dm->support_ability |= ODM_BB_SMT_ANT;
+	smtant_table->smt_ant_vendor = SMTANT_HON_BO;
 
-void
-phydm_smt_ant_config(
-	void		*p_dm_void
-)
-{
-	struct	PHY_DM_STRUCT		*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	struct	smt_ant				*p_smtant_table = &(p_dm->smtant_table);
-
-	#if (defined(CONFIG_CUMITEK_SMART_ANTENNA))
-	
-		p_dm->support_ability |= ODM_BB_SMT_ANT;
-		p_smtant_table->smt_ant_vendor = SMTANT_CUMITEK;
-		p_smtant_table->smt_ant_type = 1;
-		#if (RTL8822B_SUPPORT == 1)
-		p_dm->rfe_type = SMTANT_TMP_RFE_TYPE;
-		#endif
-	#elif (defined(CONFIG_HL_SMART_ANTENNA))
-	
-		p_dm->support_ability |= ODM_BB_SMT_ANT;
-		p_smtant_table->smt_ant_vendor = SMTANT_HON_BO;
-		
-		#ifdef CONFIG_HL_SMART_ANTENNA_TYPE1
-		p_smtant_table->smt_ant_type = 1;
-		#endif
-		
-		#ifdef CONFIG_HL_SMART_ANTENNA_TYPE2
-		p_smtant_table->smt_ant_type = 2;
-		#endif
-	#endif
+#ifdef CONFIG_HL_SMART_ANTENNA_TYPE1
+	smtant_table->smt_ant_type = 1;
+#endif
 
-	PHYDM_DBG(p_dm, DBG_SMT_ANT, ("[SmtAnt Config] Vendor=((%d)), Smt_ant_type =((%d))\n",
-		p_smtant_table->smt_ant_vendor, p_smtant_table->smt_ant_type));
-}
+#ifdef CONFIG_HL_SMART_ANTENNA_TYPE2
+	smtant_table->smt_ant_type = 2;
+#endif
 #endif
 
+	PHYDM_DBG(dm, DBG_SMT_ANT,
+		  "[SmtAnt Config] Vendor=((%d)), Smt_ant_type =((%d))\n",
+		  smtant_table->smt_ant_vendor, smtant_table->smt_ant_type);
+}
 
-void
-phydm_smt_ant_init(
-	void		*p_dm_void
-)
+void phydm_smt_ant_init(void *dm_void)
 {
-#if (defined(CONFIG_SMART_ANTENNA))
-	struct	PHY_DM_STRUCT		*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	struct	smt_ant				*p_smtant_table = &(p_dm->smtant_table);
-	
-	phydm_smt_ant_config(p_dm);
-	
-
-	if (p_smtant_table->smt_ant_vendor == SMTANT_CUMITEK) {
-		
-		#if (defined(CONFIG_CUMITEK_SMART_ANTENNA))
-		#if (RTL8822B_SUPPORT == 1)
-		if (p_dm->support_ic_type == ODM_RTL8822B) {
-			phydm_cumitek_smt_ant_init_8822b(p_dm);
-			/**/
-		}
-		#endif
-		
-		#if (RTL8197F_SUPPORT == 1)
-		if (p_dm->support_ic_type == ODM_RTL8197F) {
-			phydm_cumitek_smt_ant_init_8197f(p_dm);
-			/**/
-		}
-		#endif
-		#endif /*#if (defined(CONFIG_CUMITEK_SMART_ANTENNA))*/
-		
-	} else if (p_smtant_table->smt_ant_vendor == SMTANT_HON_BO) {
-
-		#if (defined(CONFIG_HL_SMART_ANTENNA))
-		#ifdef CONFIG_HL_SMART_ANTENNA_TYPE1
-		if (p_dm->support_ic_type == ODM_RTL8821) {
-			phydm_hl_smart_ant_type1_init_8821a(p_dm);
-			/**/
-		}
-		#endif
-		
-		#ifdef CONFIG_HL_SMART_ANTENNA_TYPE2
-		if (p_dm->support_ic_type == ODM_RTL8822B) {
-			phydm_hl_smart_ant_type2_init_8822b(p_dm);
-			/**/
-		}
-		#endif
-		#endif/*#if (defined(CONFIG_HL_SMART_ANTENNA))*/
-	}
-#endif	
-}
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct smt_ant *smtant_table = &dm->smtant_table;
+
+	phydm_smt_ant_config(dm);
 
+	if (smtant_table->smt_ant_vendor == SMTANT_CUMITEK) {
+#if (defined(CONFIG_CUMITEK_SMART_ANTENNA))
+#if (RTL8822B_SUPPORT == 1)
+		if (dm->support_ic_type == ODM_RTL8822B)
+			phydm_cumitek_smt_ant_init_8822b(dm);
+#endif
 
+#if (RTL8197F_SUPPORT == 1)
+		if (dm->support_ic_type == ODM_RTL8197F)
+			phydm_cumitek_smt_ant_init_8197f(dm);
+#endif
+/*@jj add 20170822*/
+#if (RTL8192F_SUPPORT == 1)
+		if (dm->support_ic_type == ODM_RTL8192F)
+			phydm_cumitek_smt_ant_init_8192f(dm);
+#endif
+#endif /*@#if (defined(CONFIG_CUMITEK_SMART_ANTENNA))*/
+
+	} else if (smtant_table->smt_ant_vendor == SMTANT_HON_BO) {
+#if (defined(CONFIG_HL_SMART_ANTENNA))
+#ifdef CONFIG_HL_SMART_ANTENNA_TYPE1
+		if (dm->support_ic_type == ODM_RTL8821)
+			phydm_hl_smart_ant_type1_init_8821a(dm);
+#endif
+
+#ifdef CONFIG_HL_SMART_ANTENNA_TYPE2
+		if (dm->support_ic_type == ODM_RTL8822B)
+			phydm_hl_smart_ant_type2_init_8822b(dm);
+#endif
+#endif /*@#if (defined(CONFIG_HL_SMART_ANTENNA))*/
+	}
+}
+#endif
diff --git a/rtl8723DS/hal/phydm/phydm_smt_ant.h b/rtl8723DS/hal/phydm/phydm_smt_ant.h
index 98f6717..3a408c4 100755..100644
--- a/rtl8723DS/hal/phydm/phydm_smt_ant.h
+++ b/rtl8723DS/hal/phydm/phydm_smt_ant.h
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2007 - 2017 Realtek Corporation.
+ * Copyright(c) 2007 - 2017  Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -8,17 +8,27 @@
  *
  * This program is distributed in the hope that it will be useful, but WITHOUT
  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  * more details.
  *
+ * The full GNU General Public License is included in this distribution in the
+ * file called LICENSE.
+ *
+ * Contact Information:
+ * wlanfae <wlanfae@realtek.com>
+ * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
+ * Hsinchu 300, Taiwan.
+ *
+ * Larry Finger <Larry.Finger@lwfinger.net>
+ *
  *****************************************************************************/
 
-#ifndef	__PHYDMSMTANT_H__
-#define    __PHYDMSMTANT_H__
+#ifndef __PHYDMSMTANT_H__
+#define __PHYDMSMTANT_H__
 
-/*#define SMT_ANT_VERSION	"1.1"*/ /*2017.03.13*/
-/*#define SMT_ANT_VERSION	"1.2"*/ /*2017.03.28*/
-#define SMT_ANT_VERSION	"2.0" /* Add Cumitek SmtAnt 2017.05.25*/
+/*@#define SMT_ANT_VERSION	"1.1"*/ /*@2017.03.13*/
+/*@#define SMT_ANT_VERSION	"1.2"*/ /*@2017.03.28*/
+#define SMT_ANT_VERSION "2.0" /* @Add Cumitek SmtAnt 2017.05.25*/
 
 #define	SMTANT_RTK		1
 #define	SMTANT_HON_BO	2
@@ -26,11 +36,10 @@
 
 #if (defined(CONFIG_SMART_ANTENNA))
 
-
 #if (defined(CONFIG_CUMITEK_SMART_ANTENNA))
 struct smt_ant_cumitek {
-	u8	tx_ant_idx[2][ODM_ASSOCIATE_ENTRY_NUM]; /*[pathA~B] [MACID 0~128]*/
-	u8	rx_default_ant_idx[2]; /*[pathA~B]*/
+	u8	tx_ant_idx[2][ODM_ASSOCIATE_ENTRY_NUM]; /*@[pathA~B] [MACID 0~128]*/
+	u8	rx_default_ant_idx[2]; /*@[pathA~B]*/
 };
 #endif
 
@@ -44,34 +53,34 @@ struct smt_ant_honbo {
 	u32	update_beam_codeword;
 	u32	ant_num; /*number of "used" smart beam antenna*/
 	u32	ant_num_total;/*number of "total" smart beam antenna*/
-	u32	first_train_ant; /*decide witch antenna to train first*/
+	u32	first_train_ant; /*@decide witch antenna to train first*/
 
 	#ifdef CONFIG_HL_SMART_ANTENNA_TYPE1
-	u32	pkt_rssi_pre[SUPPORT_RF_PATH_NUM][SUPPORT_BEAM_PATTERN_NUM];/*rssi of each path with a certain beam pattern*/
+	u32	pkt_rssi_pre[SUPPORT_RF_PATH_NUM][SUPPORT_BEAM_PATTERN_NUM];/*@rssi of each path with a certain beam pattern*/
 	u8	beam_train_rssi_diff[SUPPORT_RF_PATH_NUM][SUPPORT_BEAM_PATTERN_NUM];
 	u8	beam_train_cnt[SUPPORT_RF_PATH_NUM][SUPPORT_BEAM_PATTERN_NUM];
-	u32	rfu_codeword_table[4]; /*2G beam truth table*/
-	u32	rfu_codeword_table_5g[4]; /*5G beam truth table*/
-	u32	beam_patten_num_each_ant;/*number of  beam can be switched in each antenna*/
+	u32	rfu_codeword_table[4]; /*@2G beam truth table*/
+	u32	rfu_codeword_table_5g[4]; /*@5G beam truth table*/
+	u32	beam_patten_num_each_ant;/*@number of  beam can be switched in each antenna*/
 	u32	rx_idle_beam[SUPPORT_RF_PATH_NUM];
 	u32	pkt_rssi_sum[8][SUPPORT_BEAM_PATTERN_NUM];
 	u32	pkt_rssi_cnt[8][SUPPORT_BEAM_PATTERN_NUM];
 	#endif
-	
-	u32	fast_training_beam_num;/*current training beam_set index*/
+
+	u32	fast_training_beam_num;/*@current training beam_set index*/
 	u32	pre_fast_training_beam_num;/*pre training beam_set index*/
-	u32	rfu_codeword_total_bit_num; /* total bit number of RFU protocol*/
-	u32	rfu_each_ant_bit_num; /* bit number of RFU protocol for each ant*/
+	u32	rfu_codeword_total_bit_num; /* @total bit number of RFU protocol*/
+	u32	rfu_each_ant_bit_num; /* @bit number of RFU protocol for each ant*/
 	u8	per_beam_training_pkt_num;
 	u8	decision_holding_period;
-	
-	
+
+
 	u32	pre_codeword;
 	boolean	force_update_beam_en;
 	u32	beacon_counter;
 	u32	pre_beacon_counter;
-	u8	pkt_counter;		/*packet number that each beam-set should be colected in training state*/
-	u8	update_beam_idx;	/*the index announce that the beam can be updated*/
+	u8	pkt_counter;		/*@packet number that each beam-set should be colected in training state*/
+	u8	update_beam_idx;	/*@the index announce that the beam can be updated*/
 	u8	rfu_protocol_type;
 	u16	rfu_protocol_delay_time;
 
@@ -82,158 +91,120 @@ struct smt_ant_honbo {
 
 
 	#ifdef CONFIG_HL_SMART_ANTENNA_TYPE2
-	u8	beam_set_avg_rssi_pre[SUPPORT_BEAM_SET_PATTERN_NUM];		/*avg pre_rssi of each beam set*/
-	u8	beam_set_train_val_diff[SUPPORT_BEAM_SET_PATTERN_NUM];	/*rssi of a beam pattern set, ex: a set = {ant1_beam=1, ant2_beam=3}*/
-	u8	beam_set_train_cnt[SUPPORT_BEAM_SET_PATTERN_NUM];			/*training pkt num of each beam set*/
-	u32	beam_set_rssi_avg_sum[SUPPORT_BEAM_SET_PATTERN_NUM];			/*RSSI_sum of avg(pathA,pathB) for each beam-set)*/
-	u32	beam_path_rssi_sum[SUPPORT_BEAM_SET_PATTERN_NUM][MAX_PATH_NUM_8822B];/*RSSI_sum of each path for each beam-set)*/
-
-	u8	beam_set_avg_evm_2ss_pre[SUPPORT_BEAM_SET_PATTERN_NUM];	
-	u32	beam_path_evm_2ss_sum[SUPPORT_BEAM_SET_PATTERN_NUM][MAX_PATH_NUM_8822B];/*2SS evm_sum of each path for each beam-set)*/
+	u8	beam_set_avg_rssi_pre[SUPPORT_BEAM_SET_PATTERN_NUM];		/*@avg pre_rssi of each beam set*/
+	u8	beam_set_train_val_diff[SUPPORT_BEAM_SET_PATTERN_NUM];	/*@rssi of a beam pattern set, ex: a set = {ant1_beam=1, ant2_beam=3}*/
+	u8	beam_set_train_cnt[SUPPORT_BEAM_SET_PATTERN_NUM];			/*@training pkt num of each beam set*/
+	u32	beam_set_rssi_avg_sum[SUPPORT_BEAM_SET_PATTERN_NUM];			/*@RSSI_sum of avg(pathA,pathB) for each beam-set)*/
+	u32	beam_path_rssi_sum[SUPPORT_BEAM_SET_PATTERN_NUM][MAX_PATH_NUM_8822B];/*@RSSI_sum of each path for each beam-set)*/
+
+	u8	beam_set_avg_evm_2ss_pre[SUPPORT_BEAM_SET_PATTERN_NUM];
+	u32	beam_path_evm_2ss_sum[SUPPORT_BEAM_SET_PATTERN_NUM][MAX_PATH_NUM_8822B];/*@2SS evm_sum of each path for each beam-set)*/
 	u32	beam_path_evm_2ss_cnt[SUPPORT_BEAM_SET_PATTERN_NUM];
 
 	u8	beam_set_avg_evm_1ss_pre[SUPPORT_BEAM_SET_PATTERN_NUM];
-	u32	beam_path_evm_1ss_sum[SUPPORT_BEAM_SET_PATTERN_NUM];/*1SS evm_sum of each path for each beam-set)*/
+	u32	beam_path_evm_1ss_sum[SUPPORT_BEAM_SET_PATTERN_NUM];/*@1SS evm_sum of each path for each beam-set)*/
 	u32	beam_path_evm_1ss_cnt[SUPPORT_BEAM_SET_PATTERN_NUM];
-	
-	u32	statistic_pkt_cnt[SUPPORT_BEAM_SET_PATTERN_NUM];				/*statistic_pkt_cnt for SmtAnt make decision*/
-	
-	u8	total_beam_set_num;	/*number of  beam set can be switched*/
-	u8	total_beam_set_num_2g;/*number of  beam set can be switched in 2G*/
-	u8	total_beam_set_num_5g;/*number of  beam set can be switched in 5G*/
-
-	u8	rfu_codeword_table_2g[SUPPORT_BEAM_SET_PATTERN_NUM][MAX_PATH_NUM_8822B]; /*2G beam truth table*/
-	u8	rfu_codeword_table_5g[SUPPORT_BEAM_SET_PATTERN_NUM][MAX_PATH_NUM_8822B]; /*5G beam truth table*/
+
+	u32	statistic_pkt_cnt[SUPPORT_BEAM_SET_PATTERN_NUM];				/*@statistic_pkt_cnt for SmtAnt make decision*/
+
+	u8	total_beam_set_num;	/*@number of  beam set can be switched*/
+	u8	total_beam_set_num_2g;/*@number of  beam set can be switched in 2G*/
+	u8	total_beam_set_num_5g;/*@number of  beam set can be switched in 5G*/
+
+	u8	rfu_codeword_table_2g[SUPPORT_BEAM_SET_PATTERN_NUM][MAX_PATH_NUM_8822B]; /*@2G beam truth table*/
+	u8	rfu_codeword_table_5g[SUPPORT_BEAM_SET_PATTERN_NUM][MAX_PATH_NUM_8822B]; /*@5G beam truth table*/
 	u8	rx_idle_beam_set_idx;	/*the filanl decsion result*/
 	#endif
-	
+
 
 };
-#endif /*#if (defined(CONFIG_HL_SMART_ANTENNA))*/
+#endif /*@#if (defined(CONFIG_HL_SMART_ANTENNA))*/
 
 struct smt_ant {
 	u8	smt_ant_vendor;
 	u8	smt_ant_type;
-	u8	tx_desc_mode; /*0:3 bit mode, 1:2 bit mode*/
+	u8	tx_desc_mode; /*@0:3 bit mode, 1:2 bit mode*/
 	#if (defined(CONFIG_CUMITEK_SMART_ANTENNA))
 	struct	smt_ant_cumitek	cumi_smtant_table;
 	#endif
 };
 
 #if (defined(CONFIG_CUMITEK_SMART_ANTENNA))
-void
-phydm_cumitek_smt_tx_ant_update(
-	void		*p_dm_void,
-	u8		tx_ant_idx_path_a,
-	u8		tx_ant_idx_path_b,
-	u32		mac_id
-);
-
-void
-phydm_cumitek_smt_rx_default_ant_update(
-	void		*p_dm_void,
-	u8		rx_ant_idx_path_a,
-	u8		rx_ant_idx_path_b
-);
-
-void
-phydm_cumitek_smt_ant_debug(
-	void		*p_dm_void,
-	char		input[][16],
-	u32		*_used,
-	char		*output,
-	u32		*_out_len,
-	u32		input_num
-);
+void phydm_cumitek_smt_tx_ant_update(
+	void *dm_void,
+	u8 tx_ant_idx_path_a,
+	u8 tx_ant_idx_path_b,
+	u32 mac_id);
+
+void phydm_cumitek_smt_rx_default_ant_update(
+	void *dm_void,
+	u8 rx_ant_idx_path_a,
+	u8 rx_ant_idx_path_b);
+
+void phydm_cumitek_smt_ant_debug(
+	void *dm_void,
+	char input[][16],
+	u32 *_used,
+	char *output,
+	u32 *_out_len);
 
 #endif
 
-
 #if (defined(CONFIG_HL_SMART_ANTENNA))
 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
-void
-phydm_beam_switch_workitem_callback(
-	void	*p_context
-);
+void phydm_beam_switch_workitem_callback(
+	void *context);
+
+void phydm_beam_decision_workitem_callback(
+	void *context);
+#endif /*@#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)*/
 
-void
-phydm_beam_decision_workitem_callback(
-	void	*p_context
-);
-#endif /*#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)*/
+#ifdef CONFIG_HL_SMART_ANTENNA_TYPE2
+void phydm_hl_smart_ant_type2_init_8822b(
+	void *dm_void);
 
+void phydm_update_beam_pattern_type2(
+	void *dm_void,
+	u32 codeword,
+	u32 codeword_length);
 
+void phydm_set_rfu_beam_pattern_type2(
+	void *dm_void);
 
-#ifdef CONFIG_HL_SMART_ANTENNA_TYPE2
-void
-phydm_hl_smart_ant_type2_init_8822b(
-	void		*p_dm_void
-);
-
-void
-phydm_update_beam_pattern_type2(
-	void		*p_dm_void,
-	u32		codeword,
-	u32		codeword_length
-);
-
-void
-phydm_set_rfu_beam_pattern_type2(
-	void		*p_dm_void
-);
-
-void
-phydm_hl_smart_ant_debug_type2(
-	void		*p_dm_void,
-	char		input[][16],
-	u32		*_used,
-	char		*output,
-	u32		*_out_len,
-	u32		input_num
-);
-
-void
-phydm_process_rssi_for_hb_smtant_type2(
-	void		*p_dm_void,
-	void		*p_phy_info_void,
-	void		*p_pkt_info_void,
-	u8		rssi_avg	
-);
-
-#endif/*#if (defined(CONFIG_HL_SMART_ANTENNA_TYPE2))*/
+void phydm_hl_smt_ant_dbg_type2(
+	void *dm_void,
+	char input[][16],
+	u32 *_used,
+	char *output,
+	u32 *_out_len);
 
+void phydm_process_rssi_for_hb_smtant_type2(
+	void *dm_void,
+	void *phy_info_void,
+	void *pkt_info_void,
+	u8 rssi_avg);
 
-#if (defined(CONFIG_HL_SMART_ANTENNA_TYPE1))
+#endif /*@#if (defined(CONFIG_HL_SMART_ANTENNA_TYPE2))*/
 
-void
-phydm_update_beam_pattern(
-	void		*p_dm_void,
-	u32		codeword,
-	u32		codeword_length
-);
-
-void
-phydm_set_all_ant_same_beam_num(
-	void		*p_dm_void
-);
-
-void
-phydm_hl_smart_ant_debug(
-	void		*p_dm_void,
-	char		input[][16],
-	u32		*_used,
-	char		*output,
-	u32		*_out_len,
-	u32		input_num
-);
-
-#endif/*#if (defined(CONFIG_HL_SMART_ANTENNA_TYPE1))*/
-#endif/*#if (defined(CONFIG_HL_SMART_ANTENNA))*/
-#endif/*#if (defined(CONFIG_SMART_ANTENNA))*/
-
-void
-phydm_smt_ant_init(
-	void		*p_dm_void
-);
+#if (defined(CONFIG_HL_SMART_ANTENNA_TYPE1))
 
+void phydm_update_beam_pattern(
+	void *dm_void,
+	u32 codeword,
+	u32 codeword_length);
+
+void phydm_set_all_ant_same_beam_num(
+	void *dm_void);
+
+void phydm_hl_smart_ant_debug(
+	void *dm_void,
+	char input[][16],
+	u32 *_used,
+	char *output,
+	u32 *_out_len);
+
+#endif /*@#if (defined(CONFIG_HL_SMART_ANTENNA_TYPE1))*/
+#endif /*@#if (defined(CONFIG_HL_SMART_ANTENNA))*/
+void phydm_smt_ant_init(void *dm_void);
+#endif /*@#if (defined(CONFIG_SMART_ANTENNA))*/
 #endif
\ No newline at end of file
diff --git a/rtl8723DS/hal/phydm/phydm_soml.c b/rtl8723DS/hal/phydm/phydm_soml.c
index 3292596..35507e3 100755..100644
--- a/rtl8723DS/hal/phydm/phydm_soml.c
+++ b/rtl8723DS/hal/phydm/phydm_soml.c
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2007 - 2017 Realtek Corporation.
+ * Copyright(c) 2007 - 2017  Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -8,597 +8,1104 @@
  *
  * This program is distributed in the hope that it will be useful, but WITHOUT
  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  * more details.
  *
+ * The full GNU General Public License is included in this distribution in the
+ * file called LICENSE.
+ *
+ * Contact Information:
+ * wlanfae <wlanfae@realtek.com>
+ * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
+ * Hsinchu 300, Taiwan.
+ *
+ * Larry Finger <Larry.Finger@lwfinger.net>
+ *
  *****************************************************************************/
 
-/* ************************************************************
+/*************************************************************
  * include files
- * ************************************************************ */
+ ************************************************************/
 
 #include "mp_precomp.h"
 #include "phydm_precomp.h"
 
-#ifdef NEVER
-void
-phydm_dynamicsoftmletting(
-	struct PHY_DM_STRUCT		*p_dm
-)
-{
+#ifdef CONFIG_ADAPTIVE_SOML
 
+void phydm_dynamicsoftmletting(void *dm_void)
+{
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
 	u32 ret_val;
 
 #if (RTL8822B_SUPPORT == 1)
-	if (*(p_dm->p_mp_mode) == false) {
-		if (p_dm->support_ic_type & ODM_RTL8822B) {
-
-			if ((!p_dm->is_linked)|(p_dm->iot_table.is_linked_cmw500))
+	if (!*dm->mp_mode) {
+		if (dm->support_ic_type & ODM_RTL8822B) {
+			if (!dm->is_linked | dm->iot_table.is_linked_cmw500)
 				return;
 
-			if (true == p_dm->bsomlenabled) {
-				PHYDM_DBG(p_dm, ODM_COMP_API, ("PHYDM_DynamicSoftMLSetting(): SoML has been enable, skip dynamic SoML switch\n"));
-				return; 		
+			if (dm->bsomlenabled) {
+				PHYDM_DBG(dm, ODM_COMP_API,
+					  "PHYDM_DynamicSoftMLSetting(): SoML has been enable, skip dynamic SoML switch\n");
+				return;
 			}
 
-			ret_val = odm_get_bb_reg(p_dm, 0xf8c, MASKBYTE0);
-			PHYDM_DBG(p_dm, ODM_COMP_API, ("PHYDM_DynamicSoftMLSetting(): Read 0xF8C = 0x%08X\n", ret_val));
+			ret_val = odm_get_bb_reg(dm, R_0xf8c, MASKBYTE0);
+			PHYDM_DBG(dm, ODM_COMP_API,
+				  "PHYDM_DynamicSoftMLSetting(): Read 0xF8C = 0x%08X\n",
+				  ret_val);
 
 			if (ret_val < 0x16) {
-				PHYDM_DBG(p_dm, ODM_COMP_API, ("PHYDM_DynamicSoftMLSetting(): 0xF8C(== 0x%08X) < 0x16, enable SoML\n", ret_val));
-				phydm_somlrxhp_setting(p_dm, true);
-				/*odm_set_bb_reg(p_dm, 0x19a8, MASKDWORD, 0xc10a0000);*/
-				p_dm->bsomlenabled = true;
+				PHYDM_DBG(dm, ODM_COMP_API,
+					  "PHYDM_DynamicSoftMLSetting(): 0xF8C(== 0x%08X) < 0x16, enable SoML\n",
+					  ret_val);
+				phydm_somlrxhp_setting(dm, true);
+#if 0
+			/*odm_set_bb_reg(dm, R_0x19a8, MASKDWORD, 0xc10a0000);*/
+#endif
+				dm->bsomlenabled = true;
 			}
 		}
 	}
 #endif
-
 }
-#endif
 
-#ifdef CONFIG_ADAPTIVE_SOML
-void
-phydm_soml_on_off(
-	void		*p_dm_void,
-	u8		swch
-)
+void phydm_soml_on_off(void *dm_void, u8 swch)
 {
-	struct PHY_DM_STRUCT		*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	struct adaptive_soml	*p_dm_soml_table = &(p_dm->dm_soml_table);
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct adaptive_soml *soml_tab = &dm->dm_soml_table;
 
 	if (swch == SOML_ON) {
+		PHYDM_DBG(dm, DBG_ADPTV_SOML, "(( Turn on )) SOML\n");
 
-		PHYDM_DBG(p_dm, DBG_ADPTV_SOML, ("(( Turn on )) SOML\n"));
-
-		if (p_dm->support_ic_type == ODM_RTL8822B)
-			phydm_somlrxhp_setting(p_dm, true);
-		else if (p_dm->support_ic_type == ODM_RTL8197F)
-			odm_set_bb_reg(p_dm, 0x998, BIT(6), swch);
+		if (dm->support_ic_type & (ODM_RTL8197F | ODM_RTL8192F))
+			odm_set_bb_reg(dm, R_0x998, BIT(6), swch);
+#if (RTL8822B_SUPPORT == 1)
+		else if (dm->support_ic_type == ODM_RTL8822B)
+			phydm_somlrxhp_setting(dm, true);
+#endif
 
 	} else if (swch == SOML_OFF) {
+		PHYDM_DBG(dm, DBG_ADPTV_SOML, "(( Turn off )) SOML\n");
 
-		PHYDM_DBG(p_dm, DBG_ADPTV_SOML, ("(( Turn off )) SOML\n"));
-
-		if (p_dm->support_ic_type == ODM_RTL8822B)
-			phydm_somlrxhp_setting(p_dm, false);
-		else if (p_dm->support_ic_type == ODM_RTL8197F)
-			odm_set_bb_reg(p_dm, 0x998, BIT(6), swch);
+		if (dm->support_ic_type & (ODM_RTL8197F | ODM_RTL8192F))
+			odm_set_bb_reg(dm, R_0x998, BIT(6), swch);
+#if (RTL8822B_SUPPORT == 1)
+		else if (dm->support_ic_type == ODM_RTL8822B)
+			phydm_somlrxhp_setting(dm, false);
+#endif
 	}
-	p_dm_soml_table->soml_on_off = swch;
+	soml_tab->soml_on_off = swch;
 }
 
 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
-void
-phydm_adaptive_soml_callback(
-	struct timer_list		*p_timer
-)
-{
-	struct _ADAPTER		*adapter = (struct _ADAPTER *)p_timer->Adapter;
-	HAL_DATA_TYPE	*p_hal_data = GET_HAL_DATA(adapter);
-	struct PHY_DM_STRUCT		*p_dm = &(p_hal_data->DM_OutSrc);
-	struct adaptive_soml	*p_dm_soml_table = &(p_dm->dm_soml_table);
-
-#if DEV_BUS_TYPE == RT_PCI_INTERFACE
-#if USE_WORKITEM
-	odm_schedule_work_item(&(p_dm_soml_table->phydm_adaptive_soml_workitem));
-#else
+void phydm_adaptive_soml_callback(struct phydm_timer_list *timer)
+{
+	void *adapter = (void *)timer->Adapter;
+	HAL_DATA_TYPE *hal_data = GET_HAL_DATA(((PADAPTER)adapter));
+	struct dm_struct *dm = &hal_data->DM_OutSrc;
+	struct adaptive_soml *soml_tab = &dm->dm_soml_table;
+
+	#if DEV_BUS_TYPE == RT_PCI_INTERFACE
+	#if USE_WORKITEM
+	odm_schedule_work_item(&soml_tab->phydm_adaptive_soml_workitem);
+	#else
 	{
-		/*dbg_print("phydm_adaptive_soml-phydm_adaptive_soml_callback\n");*/
-		phydm_adsl(p_dm);
-	}
-#endif
-#else
-	odm_schedule_work_item(&(p_dm_soml_table->phydm_adaptive_soml_workitem));
+#if 0
+		/*@dbg_print("%s\n",__func__);*/
 #endif
+		phydm_adsl(dm);
+	}
+	#endif
+	#else
+	odm_schedule_work_item(&soml_tab->phydm_adaptive_soml_workitem);
+	#endif
 }
 
-void
-phydm_adaptive_soml_workitem_callback(
-	void		*p_context
-)
+void phydm_adaptive_soml_workitem_callback(void *context)
 {
 #ifdef CONFIG_ADAPTIVE_SOML
-	struct _ADAPTER		*p_adapter = (struct _ADAPTER *)p_context;
-	HAL_DATA_TYPE	*p_hal_data = GET_HAL_DATA(p_adapter);
-	struct PHY_DM_STRUCT		*p_dm = &(p_hal_data->DM_OutSrc);
+	void *adapter = (void *)context;
+	HAL_DATA_TYPE *hal_data = GET_HAL_DATA(((PADAPTER)adapter));
+	struct dm_struct *dm = &hal_data->DM_OutSrc;
 
-	/*dbg_print("phydm_adaptive_soml-phydm_adaptive_soml_workitem_callback\n");*/
-	phydm_adsl(p_dm);
+#if 0
+	/*@dbg_print("%s\n",__func__);*/
+#endif
+	phydm_adsl(dm);
 #endif
 }
 
 #elif (DM_ODM_SUPPORT_TYPE == ODM_CE)
-void
-phydm_adaptive_soml_callback(
-	void	*dm_void
-)
+void phydm_adaptive_soml_callback(void *dm_void)
 {
-	struct PHY_DM_STRUCT	*dm = (struct PHY_DM_STRUCT *)dm_void;
-	void	*padapter = dm->adapter;
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	void *padapter = dm->adapter;
 
-	if (*dm->p_is_net_closed)
+	if (*dm->is_net_closed == true)
 		return;
-	if (dm->support_interface == ODM_ITRF_PCIE) {
+	if (dm->support_interface == ODM_ITRF_PCIE)
 		phydm_adsl(dm);
-	} else {
-		/* Can't do I/O in timer callback*/
-		rtw_run_in_thread_cmd(padapter, phydm_adaptive_soml_workitem_callback, padapter);
+	else {
+		/* @Can't do I/O in timer callback*/
+		phydm_run_in_thread_cmd(dm,
+					phydm_adaptive_soml_workitem_callback,
+					dm);
 	}
 }
 
-void
-phydm_adaptive_soml_workitem_callback(
-	void	*context
-)
+void phydm_adaptive_soml_workitem_callback(void *context)
 {
-	void *adapter = (void *)context;
-	HAL_DATA_TYPE	*hal_data = GET_HAL_DATA(((PADAPTER)adapter));
-	struct PHY_DM_STRUCT		*dm = &hal_data->odmpriv;
+	struct dm_struct *dm = (void *)context;
 
-	/*dbg_print("phydm_adaptive_soml-phydm_adaptive_soml_workitem_callback\n");*/
+#if 0
+	/*@dbg_print("%s\n",__func__);*/
+#endif
 	phydm_adsl(dm);
 }
+
 #else
+void phydm_adaptive_soml_callback(void *dm_void)
+{
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+
+	PHYDM_DBG(dm, DBG_ADPTV_SOML, "******SOML_Callback******\n");
+	phydm_adsl(dm);
+}
+#endif
+
+void phydm_rx_rate_for_soml(void *dm_void, void *pkt_info_void)
+{
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct adaptive_soml *soml_tab = &dm->dm_soml_table;
+	struct phydm_perpkt_info_struct *pktinfo = NULL;
+	u8 data_rate;
+
+	pktinfo = (struct phydm_perpkt_info_struct *)pkt_info_void;
+	data_rate = (pktinfo->data_rate & 0x7f);
+
+	if (pktinfo->data_rate >= ODM_RATEMCS0 &&
+	    pktinfo->data_rate <= ODM_RATEMCS31)
+		soml_tab->ht_cnt[data_rate - ODM_RATEMCS0]++;
+	else if ((pktinfo->data_rate >= ODM_RATEVHTSS1MCS0) &&
+		 (pktinfo->data_rate <= ODM_RATEVHTSS4MCS9))
+		soml_tab->vht_cnt[data_rate - ODM_RATEVHTSS1MCS0]++;
+}
+
+void phydm_rx_qam_for_soml(void *dm_void, void *pkt_info_void)
+{
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct adaptive_soml *soml_tab = &dm->dm_soml_table;
+	struct phydm_perpkt_info_struct *pktinfo = NULL;
+	u8 date_rate;
+
+	pktinfo = (struct phydm_perpkt_info_struct *)pkt_info_void;
+	date_rate = (pktinfo->data_rate & 0x7f);
+	if (soml_tab->soml_state_cnt < (soml_tab->soml_train_num << 1)) {
+		if (soml_tab->soml_on_off == SOML_ON) {
+			return;
+		} else if (soml_tab->soml_on_off == SOML_OFF) {
+			if (date_rate >= ODM_RATEMCS8 &&
+			    date_rate <= ODM_RATEMCS10)
+				soml_tab->num_ht_qam[BPSK_QPSK]++;
+
+			else if ((date_rate >= ODM_RATEMCS11) &&
+				 (date_rate <= ODM_RATEMCS12))
+				soml_tab->num_ht_qam[QAM16]++;
+
+			else if ((date_rate >= ODM_RATEMCS13) &&
+				 (date_rate <= ODM_RATEMCS15))
+				soml_tab->num_ht_qam[QAM64]++;
+
+			else if ((date_rate >= ODM_RATEVHTSS2MCS0) &&
+				 (date_rate <= ODM_RATEVHTSS2MCS2))
+				soml_tab->num_vht_qam[BPSK_QPSK]++;
+
+			else if ((date_rate >= ODM_RATEVHTSS2MCS3) &&
+				 (date_rate <= ODM_RATEVHTSS2MCS4))
+				soml_tab->num_vht_qam[QAM16]++;
+
+			else if ((date_rate >= ODM_RATEVHTSS2MCS5) &&
+				 (date_rate <= ODM_RATEVHTSS2MCS5))
+				soml_tab->num_vht_qam[QAM64]++;
+
+			else if ((date_rate >= ODM_RATEVHTSS2MCS8) &&
+				 (date_rate <= ODM_RATEVHTSS2MCS9))
+				soml_tab->num_vht_qam[QAM256]++;
+		}
+	}
+}
 
-void
-phydm_adaptive_soml_callback(
-	void		*p_dm_void
-)
+void phydm_soml_reset_rx_rate(void *dm_void)
 {
-	struct PHY_DM_STRUCT		*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct adaptive_soml *soml_tab = &dm->dm_soml_table;
+	u8 order;
 
-	PHYDM_DBG(p_dm, DBG_ADPTV_SOML, ("******SOML_Callback******\n"));
-	phydm_adsl(p_dm);
+	for (order = 0; order < HT_RATE_IDX; order++) {
+		soml_tab->ht_cnt[order] = 0;
+		soml_tab->pre_ht_cnt[order] = 0;
+	}
 
+	for (order = 0; order < VHT_RATE_IDX; order++) {
+		soml_tab->vht_cnt[order] = 0;
+		soml_tab->pre_vht_cnt[order] = 0;
+	}
 }
 
-#endif
+void phydm_soml_reset_qam(void *dm_void)
+{
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct adaptive_soml *soml_tab = &dm->dm_soml_table;
+	u8 order;
 
+	for (order = 0; order < HT_ORDER_TYPE; order++)
+		soml_tab->num_ht_qam[order] = 0;
 
+	for (order = 0; order < VHT_ORDER_TYPE; order++)
+		soml_tab->num_vht_qam[order] = 0;
+}
 
+void phydm_soml_cfo_process(void *dm_void, s32 *diff_a, s32 *diff_b)
+{
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	u32 value32, value32_1, value32_2, value32_3;
+	s32 cfo_acq_a, cfo_acq_b, cfo_end_a, cfo_end_b;
+
+	value32 = odm_get_bb_reg(dm, R_0xd10, MASKDWORD);
+	value32_1 = odm_get_bb_reg(dm, R_0xd14, MASKDWORD);
+	value32_2 = odm_get_bb_reg(dm, R_0xd50, MASKDWORD);
+	value32_3 = odm_get_bb_reg(dm, R_0xd54, MASKDWORD);
+
+	cfo_acq_a = (s32)((value32 & 0x1fff0000) >> 16);
+	cfo_end_a = (s32)((value32_1 & 0x1fff0000) >> 16);
+	cfo_acq_b = (s32)((value32_2 & 0x1fff0000) >> 16);
+	cfo_end_b = (s32)((value32_3 & 0x1fff0000) >> 16);
+
+	*diff_a = ((cfo_acq_a >= cfo_end_a) ? (cfo_acq_a - cfo_end_a) :
+		  (cfo_end_a - cfo_acq_a));
+	*diff_b = ((cfo_acq_b >= cfo_end_b) ? (cfo_acq_b - cfo_end_b) :
+		  (cfo_end_b - cfo_acq_b));
+
+	*diff_a = ((*diff_a * 312) + (*diff_a >> 1)) >> 12; /* @312.5/2^12 */
+	*diff_b = ((*diff_b * 312) + (*diff_b >> 1)) >> 12; /* @312.5/2^12 */
+}
 
-void
-phydm_soml_debug(
-	void		*p_dm_void,
-	u32		*const dm_value,
-	u32		*_used,
-	char		*output,
-	u32		*_out_len
-)
+void phydm_soml_debug(void *dm_void, char input[][16], u32 *_used,
+		      char *output, u32 *_out_len)
 {
-	struct PHY_DM_STRUCT		*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	struct adaptive_soml	*p_dm_soml_table = &(p_dm->dm_soml_table);
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct adaptive_soml *soml_tab = &dm->dm_soml_table;
 	u32 used = *_used;
 	u32 out_len = *_out_len;
+	u32 dm_value[10] = {0};
+	u8 i = 0, input_idx = 0;
+
+	for (i = 0; i < 5; i++) {
+		if (input[i + 1]) {
+			PHYDM_SSCANF(input[i + 1], DCMD_DECIMAL, &dm_value[i]);
+			input_idx++;
+		}
+	}
+
+	if (input_idx == 0)
+		return;
 
 	if (dm_value[0] == 1) { /*Turn on/off SOML*/
-		p_dm_soml_table->soml_select = (u8)dm_value[1];
+		soml_tab->soml_select = (u8)dm_value[1];
 
 	} else if (dm_value[0] == 2) { /*training number for SOML*/
 
-		p_dm_soml_table->soml_train_num = (u8)dm_value[1];
-		PHYDM_SNPRINTF((output + used, out_len - used, "soml_train_num = ((%d))\n", p_dm_soml_table->soml_train_num));
+		soml_tab->soml_train_num = (u8)dm_value[1];
+		PDM_SNPF(out_len, used, output + used, out_len - used,
+			 "soml_train_num = ((%d))\n",
+			 soml_tab->soml_train_num);
 	} else if (dm_value[0] == 3) { /*training interval for SOML*/
 
-		p_dm_soml_table->soml_intvl = (u8)dm_value[1];
-		PHYDM_SNPRINTF((output + used, out_len - used, "soml_intvl = ((%d))\n", p_dm_soml_table->soml_intvl));
-	} else if (dm_value[0] == 4) { /*function period for SOML*/
-
-		p_dm_soml_table->soml_period = (u8)dm_value[1];
-		PHYDM_SNPRINTF((output + used, out_len - used, "soml_period = ((%d))\n", p_dm_soml_table->soml_period));
-	} else if (dm_value[0] == 5) { /*delay_time for SOML*/
-
-		p_dm_soml_table->soml_delay_time = (u8)dm_value[1];
-		PHYDM_SNPRINTF((output + used, out_len - used, "soml_delay_time = ((%d))\n", p_dm_soml_table->soml_delay_time));
-	} else if (dm_value[0] == 100) { /*show parameters*/
-
-		PHYDM_SNPRINTF((output + used, out_len - used, "soml_train_num = ((%d))\n", p_dm_soml_table->soml_train_num));
-		PHYDM_SNPRINTF((output + used, out_len - used, "soml_intvl = ((%d))\n", p_dm_soml_table->soml_intvl));
-		PHYDM_SNPRINTF((output + used, out_len - used, "soml_period = ((%d))\n", p_dm_soml_table->soml_period));
-		PHYDM_SNPRINTF((output + used, out_len - used, "soml_delay_time = ((%d))\n", p_dm_soml_table->soml_delay_time));
+		soml_tab->soml_intvl = (u8)dm_value[1];
+		PDM_SNPF(out_len, used, output + used, out_len - used,
+			 "soml_intvl = ((%d))\n", soml_tab->soml_intvl);
+	} else if (dm_value[0] == 4) { /*@function period for SOML*/
+
+		soml_tab->soml_period = (u8)dm_value[1];
+		PDM_SNPF(out_len, used, output + used, out_len - used,
+			 "soml_period = ((%d))\n", soml_tab->soml_period);
+	} else if (dm_value[0] == 5) { /*@delay_time for SOML*/
+
+		soml_tab->soml_delay_time = (u8)dm_value[1];
+		PDM_SNPF(out_len, used, output + used, out_len - used,
+			 "soml_delay_time = ((%d))\n",
+			 soml_tab->soml_delay_time);
+	} else if (dm_value[0] == 6) { /* @for SOML Rx QAM distribution th*/
+		if (dm_value[1] == 256) {
+			soml_tab->qam256_dist_th = (u8)dm_value[2];
+			PDM_SNPF(out_len, used, output + used, out_len - used,
+				 "qam256_dist_th = ((%d))\n",
+				 soml_tab->qam256_dist_th);
+		} else if (dm_value[1] == 64) {
+			soml_tab->qam64_dist_th = (u8)dm_value[2];
+			PDM_SNPF(out_len, used, output + used, out_len - used,
+				 "qam64_dist_th = ((%d))\n",
+				 soml_tab->qam64_dist_th);
+		} else if (dm_value[1] == 16) {
+			soml_tab->qam16_dist_th = (u8)dm_value[2];
+			PDM_SNPF(out_len, used, output + used, out_len - used,
+				 "qam16_dist_th = ((%d))\n",
+				 soml_tab->qam16_dist_th);
+		} else if (dm_value[1] == 4) {
+			soml_tab->bpsk_qpsk_dist_th = (u8)dm_value[2];
+			PDM_SNPF(out_len, used, output + used, out_len - used,
+				 "bpsk_qpsk_dist_th = ((%d))\n",
+				 soml_tab->bpsk_qpsk_dist_th);
+		}
+	} else if (dm_value[0] == 7) { /* @for SOML cfo th*/
+		if (dm_value[1] == 256) {
+			soml_tab->cfo_qam256_th = (u8)dm_value[2];
+			PDM_SNPF(out_len, used, output + used, out_len - used,
+				 "cfo_qam256_th = ((%d KHz))\n",
+				 soml_tab->cfo_qam256_th);
+		} else if (dm_value[1] == 64) {
+			soml_tab->cfo_qam64_th = (u8)dm_value[2];
+			PDM_SNPF(out_len, used, output + used, out_len - used,
+				 "cfo_qam64_th = ((%d KHz))\n",
+				 soml_tab->cfo_qam64_th);
+		} else if (dm_value[1] == 16) {
+			soml_tab->cfo_qam16_th = (u8)dm_value[2];
+			PDM_SNPF(out_len, used, output + used, out_len - used,
+				 "cfo_qam16_th = ((%d KHz))\n",
+				 soml_tab->cfo_qam16_th);
+		} else if (dm_value[1] == 4) {
+			soml_tab->cfo_qpsk_th = (u8)dm_value[2];
+			PDM_SNPF(out_len, used, output + used, out_len - used,
+				 "cfo_qpsk_th = ((%d KHz))\n",
+				 soml_tab->cfo_qpsk_th);
+		}
+	} else if (dm_value[0] == 100) {
+		/*show parameters*/
+		PDM_SNPF(out_len, used, output + used, out_len - used,
+			 "soml_select = ((%d))\n", soml_tab->soml_select);
+		PDM_SNPF(out_len, used, output + used, out_len - used,
+			 "soml_train_num = ((%d))\n",
+			 soml_tab->soml_train_num);
+		PDM_SNPF(out_len, used, output + used, out_len - used,
+			 "soml_intvl = ((%d))\n", soml_tab->soml_intvl);
+		PDM_SNPF(out_len, used, output + used, out_len - used,
+			 "soml_period = ((%d))\n", soml_tab->soml_period);
+		PDM_SNPF(out_len, used, output + used, out_len - used,
+			 "soml_delay_time = ((%d))\n\n",
+			 soml_tab->soml_delay_time);
+		PDM_SNPF(out_len, used, output + used, out_len - used,
+			 "qam256_dist_th = ((%d)),  qam64_dist_th = ((%d)), ",
+			 soml_tab->qam256_dist_th,
+			 soml_tab->qam64_dist_th);
+		PDM_SNPF(out_len, used, output + used, out_len - used,
+			 "qam16_dist_th = ((%d)),  bpsk_qpsk_dist_th = ((%d))\n",
+			 soml_tab->qam16_dist_th,
+			 soml_tab->bpsk_qpsk_dist_th);
+		PDM_SNPF(out_len, used, output + used, out_len - used,
+			 "cfo_qam256_th = ((%d KHz)),  cfo_qam64_th = ((%d KHz)), ",
+			 soml_tab->cfo_qam256_th,
+			 soml_tab->cfo_qam64_th);
+		PDM_SNPF(out_len, used, output + used, out_len - used,
+			 "cfo_qam16_th = ((%d KHz)),  cfo_qpsk_th  = ((%d KHz))\n",
+			 soml_tab->cfo_qam16_th,
+			 soml_tab->cfo_qpsk_th);
 	}
 	*_used = used;
 	*_out_len = out_len;
 }
 
-void
-phydm_soml_statistics(
-	void		*p_dm_void,
-	u8		on_off_state
+void phydm_soml_stats_ht_on(void *dm_void)
+{
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct adaptive_soml *soml_tab = &dm->dm_soml_table;
+	u8 i, mcs0;
+	u16 num_bytes_diff, num_rate_diff;
+
+	mcs0 = ODM_RATEMCS0;
+	for (i = mcs0; i <= ODM_RATEMCS15; i++) {
+		num_rate_diff = soml_tab->ht_cnt[i - mcs0] -
+				soml_tab->pre_ht_cnt[i - mcs0];
+		soml_tab->ht_cnt_on[i - mcs0] += num_rate_diff;
+		soml_tab->pre_ht_cnt[i - mcs0] = soml_tab->ht_cnt[i - mcs0];
+		num_bytes_diff = soml_tab->ht_byte[i - mcs0] -
+				 soml_tab->pre_ht_byte[i - mcs0];
+		soml_tab->ht_byte_on[i - mcs0] += num_bytes_diff;
+		soml_tab->pre_ht_byte[i - mcs0] = soml_tab->ht_byte[i - mcs0];
+	}
+}
 
-)
+void phydm_soml_stats_ht_off(void *dm_void)
 {
-	struct PHY_DM_STRUCT		*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	struct adaptive_soml	*p_dm_soml_table = &(p_dm->dm_soml_table);
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct adaptive_soml *soml_tab = &dm->dm_soml_table;
+	u8 i, mcs0;
+	u16 num_bytes_diff, num_rate_diff;
+
+	mcs0 = ODM_RATEMCS0;
+	for (i = mcs0; i <= ODM_RATEMCS15; i++) {
+		num_rate_diff = soml_tab->ht_cnt[i - mcs0] -
+				soml_tab->pre_ht_cnt[i - mcs0];
+		soml_tab->ht_cnt_off[i - mcs0] += num_rate_diff;
+		soml_tab->pre_ht_cnt[i - mcs0] = soml_tab->ht_cnt[i - mcs0];
+		num_bytes_diff = soml_tab->ht_byte[i - mcs0] -
+				 soml_tab->pre_ht_byte[i - mcs0];
+		soml_tab->ht_byte_off[i - mcs0] += num_bytes_diff;
+		soml_tab->pre_ht_byte[i - mcs0] = soml_tab->ht_byte[i - mcs0];
+	}
+}
 
-	u8	i;
-	u32	num_bytes_diff;
+void phydm_soml_stats_vht_on(void *dm_void)
+{
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct adaptive_soml *soml_tab = &dm->dm_soml_table;
+	u8 j, vht0;
+	u16 num_bytes_diff, num_rate_diff;
+
+	vht0 = ODM_RATEVHTSS1MCS0;
+	for (j = vht0; j <= ODM_RATEVHTSS2MCS9; j++) {
+		num_rate_diff = soml_tab->vht_cnt[j - vht0] -
+				soml_tab->pre_vht_cnt[j - vht0];
+		soml_tab->vht_cnt_on[j - vht0] += num_rate_diff;
+		soml_tab->pre_vht_cnt[j - vht0] = soml_tab->vht_cnt[j - vht0];
+		num_bytes_diff = soml_tab->vht_byte[j - vht0] -
+				 soml_tab->pre_vht_byte[j - vht0];
+		soml_tab->vht_byte_on[j - vht0] += num_bytes_diff;
+		soml_tab->pre_vht_byte[j - vht0] = soml_tab->vht_byte[j - vht0];
+	}
+}
+
+void phydm_soml_stats_vht_off(void *dm_void)
+{
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct adaptive_soml *soml_tab = &dm->dm_soml_table;
+	u8 j, vht0;
+	u16 num_bytes_diff, num_rate_diff;
+
+	vht0 = ODM_RATEVHTSS1MCS0;
+	for (j = vht0; j <= ODM_RATEVHTSS2MCS9; j++) {
+		num_rate_diff = soml_tab->vht_cnt[j - vht0] -
+				soml_tab->pre_vht_cnt[j - vht0];
+		soml_tab->vht_cnt_off[j - vht0] += num_rate_diff;
+		soml_tab->pre_vht_cnt[j - vht0] = soml_tab->vht_cnt[j - vht0];
+		num_bytes_diff = soml_tab->vht_byte[j - vht0] -
+				 soml_tab->pre_vht_byte[j - vht0];
+		soml_tab->vht_byte_off[j - vht0] += num_bytes_diff;
+		soml_tab->pre_vht_byte[j - vht0] = soml_tab->vht_byte[j - vht0];
+	}
+}
+
+void phydm_soml_statistics(void *dm_void, u8 on_off_state)
+{
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct adaptive_soml *soml_tab = &dm->dm_soml_table;
 
 	if (on_off_state == SOML_ON) {
-		if (*p_dm->p_channel <= 14) {
-			for (i = ODM_RATEMCS0; i <= ODM_RATEMCS15; i++) {
-				num_bytes_diff = p_dm_soml_table->num_ht_bytes[i] - p_dm_soml_table->pre_num_ht_bytes[i];
-				p_dm_soml_table->num_ht_bytes_on[i] += num_bytes_diff;
-				p_dm_soml_table->pre_num_ht_bytes[i] = p_dm_soml_table->num_ht_bytes[i];
-			}
-		}
-		if (p_dm->support_ic_type == ODM_RTL8822B) {
-			for (i = ODM_RATEVHTSS1MCS0; i <= ODM_RATEVHTSS2MCS9; i++) {
-				num_bytes_diff = p_dm_soml_table->num_vht_bytes[i] - p_dm_soml_table->pre_num_vht_bytes[i];
-				p_dm_soml_table->num_vht_bytes_on[i] += num_bytes_diff;
-				p_dm_soml_table->pre_num_vht_bytes[i] = p_dm_soml_table->num_vht_bytes[i];
-			}
-		}
+		if (*dm->channel <= 14)
+			phydm_soml_stats_ht_on(dm);
+		if (dm->support_ic_type == ODM_RTL8822B)
+			phydm_soml_stats_vht_on(dm);
 	} else if (on_off_state == SOML_OFF) {
-		if (*p_dm->p_channel <= 14) {
-			for (i = ODM_RATEMCS0; i <= ODM_RATEMCS15; i++) {
-				num_bytes_diff = p_dm_soml_table->num_ht_bytes[i] - p_dm_soml_table->pre_num_ht_bytes[i];
-				p_dm_soml_table->num_ht_bytes_off[i] += num_bytes_diff;
-				p_dm_soml_table->pre_num_ht_bytes[i] = p_dm_soml_table->num_ht_bytes[i];
-			}
-		}
-		if (p_dm->support_ic_type == ODM_RTL8822B) {
-			for (i = ODM_RATEVHTSS1MCS0; i <= ODM_RATEVHTSS2MCS9; i++) {
-				num_bytes_diff = p_dm_soml_table->num_vht_bytes[i] - p_dm_soml_table->pre_num_vht_bytes[i];
-				p_dm_soml_table->num_vht_bytes_off[i] += num_bytes_diff;
-				p_dm_soml_table->pre_num_vht_bytes[i] = p_dm_soml_table->num_vht_bytes[i];
-			}
-		}
+		if (*dm->channel <= 14)
+			phydm_soml_stats_ht_off(dm);
+		if (dm->support_ic_type == ODM_RTL8822B)
+			phydm_soml_stats_vht_off(dm);
 	}
 }
 
-void
-phydm_adsl(
-	void		*p_dm_void
-)
+void phydm_adsl_init_state(void *dm_void)
 {
-	struct PHY_DM_STRUCT		*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	struct adaptive_soml		*p_dm_soml_table = &(p_dm->dm_soml_table);
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct adaptive_soml *soml_tab = &dm->dm_soml_table;
+
+	u8 next_on_off;
+	u16 ht_reset[HT_RATE_IDX] = {0}, vht_reset[VHT_RATE_IDX] = {0};
+	u8 size = sizeof(ht_reset[0]);
+
+	phydm_soml_reset_rx_rate(dm);
+	odm_move_memory(dm, soml_tab->ht_byte, ht_reset,
+			HT_RATE_IDX * size);
+	odm_move_memory(dm, soml_tab->ht_byte_on, ht_reset,
+			HT_RATE_IDX * size);
+	odm_move_memory(dm, soml_tab->ht_byte_off, ht_reset,
+			HT_RATE_IDX * size);
+	odm_move_memory(dm, soml_tab->vht_byte, vht_reset,
+			VHT_RATE_IDX * size);
+	odm_move_memory(dm, soml_tab->vht_byte_on, vht_reset,
+			VHT_RATE_IDX * size);
+	odm_move_memory(dm, soml_tab->vht_byte_off, vht_reset,
+			VHT_RATE_IDX * size);
+	if (dm->support_ic_type == ODM_RTL8822B) {
+		soml_tab->cfo_cnt++;
+		phydm_soml_cfo_process(dm,
+				       &soml_tab->cfo_diff_a,
+				       &soml_tab->cfo_diff_b);
+		PHYDM_DBG(dm, DBG_ADPTV_SOML,
+			  "[ (%d) cfo_diff_a = %d KHz; cfo_diff_b = %d KHz ]\n",
+			  soml_tab->cfo_cnt, soml_tab->cfo_diff_a,
+			  soml_tab->cfo_diff_b);
+		soml_tab->cfo_diff_sum_a += soml_tab->cfo_diff_a;
+		soml_tab->cfo_diff_sum_b += soml_tab->cfo_diff_b;
+	}
+
+	soml_tab->is_soml_method_enable = 1;
+	soml_tab->soml_state_cnt++;
+	next_on_off = (soml_tab->soml_on_off == SOML_ON) ? SOML_ON : SOML_OFF;
+	phydm_soml_on_off(dm, next_on_off);
+	odm_set_timer(dm, &soml_tab->phydm_adaptive_soml_timer,
+		      soml_tab->soml_delay_time); /*@ms*/
+}
 
-	u8	i;
-	u8	next_on_off;
-	u8	rate_num = 1, rate_ss_shift = 0;
-	u32	byte_total_on = 0, byte_total_off = 0;
-	u32	ht_reset[HT_RATE_IDX] = {0}, vht_reset[VHT_RATE_IDX] = {0};
-	u8	size = sizeof(ht_reset[0]);
+void phydm_adsl_odd_state(void *dm_void)
+{
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct adaptive_soml *soml_tab = &dm->dm_soml_table;
+	u16 ht_reset[HT_RATE_IDX] = {0}, vht_reset[VHT_RATE_IDX] = {0};
+	u8 size = sizeof(ht_reset[0]);
+
+	soml_tab->soml_state_cnt++;
+	odm_move_memory(dm, soml_tab->pre_ht_cnt, soml_tab->ht_cnt,
+			HT_RATE_IDX * size);
+	odm_move_memory(dm, soml_tab->pre_vht_cnt, soml_tab->vht_cnt,
+			VHT_RATE_IDX * size);
+	odm_move_memory(dm, soml_tab->pre_ht_byte, soml_tab->ht_byte,
+			HT_RATE_IDX * size);
+	odm_move_memory(dm, soml_tab->pre_vht_byte, soml_tab->vht_byte,
+			VHT_RATE_IDX * size);
+
+	if (dm->support_ic_type == ODM_RTL8822B) {
+		soml_tab->cfo_cnt++;
+		phydm_soml_cfo_process(dm,
+				       &soml_tab->cfo_diff_a,
+				       &soml_tab->cfo_diff_b);
+		PHYDM_DBG(dm, DBG_ADPTV_SOML,
+			  "[ (%d) cfo_diff_a = %d KHz; cfo_diff_b = %d KHz ]\n",
+			  soml_tab->cfo_cnt, soml_tab->cfo_diff_a,
+			  soml_tab->cfo_diff_b);
+		soml_tab->cfo_diff_sum_a += soml_tab->cfo_diff_a;
+		soml_tab->cfo_diff_sum_b += soml_tab->cfo_diff_b;
+	}
+	odm_set_timer(dm, &soml_tab->phydm_adaptive_soml_timer,
+		      soml_tab->soml_intvl); /*@ms*/
+}
+
+void phydm_adsl_even_state(void *dm_void)
+{
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct adaptive_soml *soml_tab = &dm->dm_soml_table;
+	u8 next_on_off;
+
+	if (dm->support_ic_type == ODM_RTL8822B) {
+		soml_tab->cfo_cnt++;
+		phydm_soml_cfo_process(dm,
+				       &soml_tab->cfo_diff_a,
+				       &soml_tab->cfo_diff_b);
+		PHYDM_DBG(dm, DBG_ADPTV_SOML,
+			  "[ (%d) cfo_diff_a = %d KHz; cfo_diff_b = %d KHz ]\n",
+			  soml_tab->cfo_cnt, soml_tab->cfo_diff_a,
+			  soml_tab->cfo_diff_b);
+		soml_tab->cfo_diff_sum_a += soml_tab->cfo_diff_a;
+		soml_tab->cfo_diff_sum_b += soml_tab->cfo_diff_b;
+	}
+	soml_tab->soml_state_cnt++;
+	phydm_soml_statistics(dm, soml_tab->soml_on_off);
+	next_on_off = (soml_tab->soml_on_off == SOML_ON) ? SOML_OFF : SOML_ON;
+	phydm_soml_on_off(dm, next_on_off);
+	odm_set_timer(dm, &soml_tab->phydm_adaptive_soml_timer,
+		      soml_tab->soml_delay_time); /*@ms*/
+}
 
-	if (p_dm->support_ic_type & ODM_IC_4SS)
+void phydm_adsl_decision_state(void *dm_void)
+{
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct adaptive_soml *soml_tab = &dm->dm_soml_table;
+	u8 i;
+	u8 next_on_off, mcs0 = ODM_RATEMCS0, vht0 = ODM_RATEVHTSS1MCS0;
+	u8 rate_num = 1, rate_ss_shift = 0;
+	u16 num_total_qam = 0;
+	u32 ht_total_cnt_on = 0, ht_total_cnt_off = 0;
+	u32 total_ht_rate_on = 0, total_ht_rate_off = 0;
+	u32 vht_total_cnt_on = 0, vht_total_cnt_off = 0;
+	u32 total_vht_rate_on = 0, total_vht_rate_off = 0;
+	u32 rate_per_pkt_on = 0, rate_per_pkt_off = 0;
+	s32 cfo_diff_avg_a, cfo_diff_avg_b;
+	u16 vht_phy_rate_table[] = {
+		/*@20M*/
+		6, 13, 19, 26, 39, 52, 58, 65, 78, 90, /*@1SS MCS0~9*/
+		13, 26, 39, 52, 78, 104, 117, 130, 156, 180 /*@2SSMCS0~9*/
+	};
+
+	if (dm->support_ic_type & ODM_IC_4SS)
 		rate_num = 4;
-	else if (p_dm->support_ic_type & ODM_IC_3SS)
+	else if (dm->support_ic_type & ODM_IC_3SS)
 		rate_num = 3;
-	else if (p_dm->support_ic_type & ODM_IC_2SS)
+	else if (dm->support_ic_type & ODM_IC_2SS)
 		rate_num = 2;
+	PHYDM_DBG(dm, DBG_ADPTV_SOML, "[Decisoin state ]\n");
+	phydm_soml_statistics(dm, soml_tab->soml_on_off);
+	if (*dm->channel <= 14) {
+		/* @[Search 1st and 2nd rate by counter] */
+		for (i = 0; i < rate_num; i++) {
+			rate_ss_shift = (i << 3);
+			PHYDM_DBG(dm, DBG_ADPTV_SOML,
+				  "*ht_cnt_on  HT MCS[%d :%d ] = {%d, %d, %d, %d, %d, %d, %d, %d}\n",
+				  (rate_ss_shift), (rate_ss_shift + 7),
+				  soml_tab->ht_cnt_on[rate_ss_shift + 0],
+				  soml_tab->ht_cnt_on[rate_ss_shift + 1],
+				  soml_tab->ht_cnt_on[rate_ss_shift + 2],
+				  soml_tab->ht_cnt_on[rate_ss_shift + 3],
+				  soml_tab->ht_cnt_on[rate_ss_shift + 4],
+				  soml_tab->ht_cnt_on[rate_ss_shift + 5],
+				  soml_tab->ht_cnt_on[rate_ss_shift + 6],
+				  soml_tab->ht_cnt_on[rate_ss_shift + 7]);
+		}
 
-	if (!(p_dm->support_ic_type & ODM_ADAPTIVE_SOML_SUPPORT_IC))
-		return;
-		
-	PHYDM_DBG(p_dm, DBG_ADPTV_SOML, ("rssi_min =%d\n", p_dm->rssi_min));
-	PHYDM_DBG(p_dm, DBG_ADPTV_SOML, ("soml_state_cnt =((%d))\n", p_dm_soml_table->soml_state_cnt));
-	/*Traning state: 0(alt) 1(ori) 2(alt) 3(ori)============================================================*/
-	if (p_dm_soml_table->soml_state_cnt < (p_dm_soml_table->soml_train_num << 1)) {
-
-		if (p_dm_soml_table->soml_state_cnt == 0) {
-
-			odm_move_memory(p_dm, p_dm_soml_table->num_ht_bytes, ht_reset, HT_RATE_IDX * size);
-			odm_move_memory(p_dm, p_dm_soml_table->num_ht_bytes_on, ht_reset, HT_RATE_IDX * size);
-			odm_move_memory(p_dm, p_dm_soml_table->num_ht_bytes_off, ht_reset, HT_RATE_IDX * size);
-			odm_move_memory(p_dm, p_dm_soml_table->num_vht_bytes, vht_reset, VHT_RATE_IDX * size);
-			odm_move_memory(p_dm, p_dm_soml_table->num_vht_bytes_on, vht_reset, VHT_RATE_IDX * size);
-			odm_move_memory(p_dm, p_dm_soml_table->num_vht_bytes_off, vht_reset, VHT_RATE_IDX * size);
-
-			p_dm_soml_table->is_soml_method_enable = 1;
-			p_dm_soml_table->soml_state_cnt++;
-			next_on_off = (p_dm_soml_table->soml_on_off == SOML_ON) ? SOML_ON : SOML_OFF;
-			phydm_soml_on_off(p_dm, next_on_off);
-			odm_set_timer(p_dm, &p_dm_soml_table->phydm_adaptive_soml_timer, p_dm_soml_table->soml_delay_time); /*ms*/
-		} else if ((p_dm_soml_table->soml_state_cnt % 2) != 0) {
-
-			p_dm_soml_table->soml_state_cnt++;
-			odm_move_memory(p_dm, p_dm_soml_table->pre_num_ht_bytes, p_dm_soml_table->num_ht_bytes, HT_RATE_IDX * size);
-			odm_move_memory(p_dm, p_dm_soml_table->pre_num_vht_bytes, p_dm_soml_table->num_vht_bytes, VHT_RATE_IDX * size);
-			odm_set_timer(p_dm, &p_dm_soml_table->phydm_adaptive_soml_timer, p_dm_soml_table->soml_intvl); /*ms*/
-		} else if ((p_dm_soml_table->soml_state_cnt % 2) == 0) {
-
-			p_dm_soml_table->soml_state_cnt++;
-			phydm_soml_statistics(p_dm, p_dm_soml_table->soml_on_off);
-			next_on_off = (p_dm_soml_table->soml_on_off == SOML_ON) ? SOML_OFF : SOML_ON;
-			phydm_soml_on_off(p_dm, next_on_off);
-			odm_set_timer(p_dm, &p_dm_soml_table->phydm_adaptive_soml_timer, p_dm_soml_table->soml_delay_time); /*ms*/
+		for (i = 0; i < rate_num; i++) {
+			rate_ss_shift = (i << 3);
+			PHYDM_DBG(dm, DBG_ADPTV_SOML,
+				  "*ht_byte_off  HT MCS[%d :%d ] = {%d, %d, %d, %d, %d, %d, %d, %d}\n",
+				  (rate_ss_shift), (rate_ss_shift + 7),
+				  soml_tab->ht_cnt_off[rate_ss_shift + 0],
+				  soml_tab->ht_cnt_off[rate_ss_shift + 1],
+				  soml_tab->ht_cnt_off[rate_ss_shift + 2],
+				  soml_tab->ht_cnt_off[rate_ss_shift + 3],
+				  soml_tab->ht_cnt_off[rate_ss_shift + 4],
+				  soml_tab->ht_cnt_off[rate_ss_shift + 5],
+				  soml_tab->ht_cnt_off[rate_ss_shift + 6],
+				  soml_tab->ht_cnt_off[rate_ss_shift + 7]);
+		}
+
+		for (i = ODM_RATEMCS8; i <= ODM_RATEMCS15; i++) {
+			ht_total_cnt_on += soml_tab->ht_cnt_on[i - mcs0];
+			ht_total_cnt_off += soml_tab->ht_cnt_off[i - mcs0];
+			total_ht_rate_on += (soml_tab->ht_cnt_on[i - mcs0] *
+					    (phy_rate_table[i] >> 1));
+			total_ht_rate_off += (soml_tab->ht_cnt_off[i - mcs0] *
+					     (phy_rate_table[i] >> 1));
 		}
+		total_ht_rate_on = total_ht_rate_on << 3;
+		total_ht_rate_off = total_ht_rate_off << 3;
+		rate_per_pkt_on = (ht_total_cnt_on != 0) ?
+				  (total_ht_rate_on / ht_total_cnt_on) : 0;
+		rate_per_pkt_off = (ht_total_cnt_off != 0) ?
+				   (total_ht_rate_off / ht_total_cnt_off) : 0;
 	}
-	/*Decision state: ==============================================================*/
-	else {
 
-		p_dm_soml_table->soml_state_cnt = 0;
-		phydm_soml_statistics(p_dm, p_dm_soml_table->soml_on_off);
-
-		/* [Search 1st and 2ed rate by counter] */
-		if (*p_dm->p_channel <= 14) {
-
-			for (i = 0; i < rate_num; i++) {
-				rate_ss_shift = (i << 3);
-				PHYDM_DBG(p_dm, DBG_ADPTV_SOML, ("*num_ht_bytes_on  HT MCS[%d :%d ] = {%d, %d, %d, %d, %d, %d, %d, %d}\n",
-					  (rate_ss_shift), 
-					  (rate_ss_shift + 7),
-					  p_dm_soml_table->num_ht_bytes_on[rate_ss_shift + 0], p_dm_soml_table->num_ht_bytes_on[rate_ss_shift + 1],
-					  p_dm_soml_table->num_ht_bytes_on[rate_ss_shift + 2], p_dm_soml_table->num_ht_bytes_on[rate_ss_shift + 3],
-					  p_dm_soml_table->num_ht_bytes_on[rate_ss_shift + 4], p_dm_soml_table->num_ht_bytes_on[rate_ss_shift + 5],
-					  p_dm_soml_table->num_ht_bytes_on[rate_ss_shift + 6], p_dm_soml_table->num_ht_bytes_on[rate_ss_shift + 7]));
-			}
+	if (dm->support_ic_type == ODM_RTL8822B) {
+		cfo_diff_avg_a = soml_tab->cfo_diff_sum_a / soml_tab->cfo_cnt;
+		cfo_diff_avg_b = soml_tab->cfo_diff_sum_b / soml_tab->cfo_cnt;
+		soml_tab->cfo_diff_avg_a = (soml_tab->cfo_cnt != 0) ?
+					   cfo_diff_avg_a : 0;
+		soml_tab->cfo_diff_avg_b = (soml_tab->cfo_cnt != 0) ?
+					   cfo_diff_avg_b : 0;
+		PHYDM_DBG(dm, DBG_ADPTV_SOML,
+			  "[ cfo_diff_avg_a = %d KHz; cfo_diff_avg_b = %d KHz]\n",
+			  soml_tab->cfo_diff_avg_a,
+			  soml_tab->cfo_diff_avg_b);
+		for (i = 0; i < VHT_ORDER_TYPE; i++)
+			num_total_qam += soml_tab->num_vht_qam[i];
+
+		PHYDM_DBG(dm, DBG_ADPTV_SOML,
+			  "[ ((2SS)) BPSK_QPSK_count = %d ; 16QAM_count = %d ; 64QAM_count = %d ; 256QAM_count = %d ; num_total_qam = %d]\n",
+			  soml_tab->num_vht_qam[BPSK_QPSK],
+			  soml_tab->num_vht_qam[QAM16],
+			  soml_tab->num_vht_qam[QAM64],
+			  soml_tab->num_vht_qam[QAM256],
+			  num_total_qam);
+		if (((soml_tab->num_vht_qam[QAM256] * 100) >
+		    (num_total_qam * soml_tab->qam256_dist_th)) &&
+		    cfo_diff_avg_a > soml_tab->cfo_qam256_th &&
+		    cfo_diff_avg_b > soml_tab->cfo_qam256_th) {
+			PHYDM_DBG(dm, DBG_ADPTV_SOML,
+				  "[  QAM256_ratio > %d ; cfo_diff_avg_a > %d KHz ==> SOML_OFF]\n",
+				  soml_tab->qam256_dist_th,
+				  soml_tab->cfo_qam256_th);
+			PHYDM_DBG(dm, DBG_ADPTV_SOML, "[ Final decisoin ] : ");
+			phydm_soml_on_off(dm, SOML_OFF);
+			return;
+		} else if (((soml_tab->num_vht_qam[QAM64] * 100) >
+			   (num_total_qam * soml_tab->qam64_dist_th)) &&
+			   (cfo_diff_avg_a > soml_tab->cfo_qam64_th) &&
+			   (cfo_diff_avg_b > soml_tab->cfo_qam64_th)) {
+			PHYDM_DBG(dm, DBG_ADPTV_SOML,
+				  "[  QAM64_ratio > %d ; cfo_diff_avg_a > %d KHz ==> SOML_OFF]\n",
+				  soml_tab->qam64_dist_th,
+				  soml_tab->cfo_qam64_th);
+			PHYDM_DBG(dm, DBG_ADPTV_SOML, "[ Final decisoin ] : ");
+			phydm_soml_on_off(dm, SOML_OFF);
+			return;
+		} else if (((soml_tab->num_vht_qam[QAM16] * 100) >
+			   (num_total_qam * soml_tab->qam16_dist_th)) &&
+			   (cfo_diff_avg_a > soml_tab->cfo_qam16_th) &&
+			   (cfo_diff_avg_b > soml_tab->cfo_qam16_th)) {
+			PHYDM_DBG(dm, DBG_ADPTV_SOML,
+				  "[  QAM16_ratio > %d ; cfo_diff_avg_a > %d KHz ==> SOML_OFF]\n",
+				  soml_tab->qam16_dist_th,
+				  soml_tab->cfo_qam16_th);
+			PHYDM_DBG(dm, DBG_ADPTV_SOML, "[ Final decisoin ] : ");
+			phydm_soml_on_off(dm, SOML_OFF);
+			return;
+		} else if (((soml_tab->num_vht_qam[BPSK_QPSK] * 100) >
+			   (num_total_qam * soml_tab->bpsk_qpsk_dist_th)) &&
+			   (cfo_diff_avg_a > soml_tab->cfo_qpsk_th) &&
+			   (cfo_diff_avg_b > soml_tab->cfo_qpsk_th)) {
+			PHYDM_DBG(dm, DBG_ADPTV_SOML,
+				  "[  BPSK_QPSK_ratio > %d ; cfo_diff_avg_a > %d KHz ==> SOML_OFF]\n",
+				  soml_tab->bpsk_qpsk_dist_th,
+				  soml_tab->cfo_qpsk_th);
+			PHYDM_DBG(dm, DBG_ADPTV_SOML, "[ Final decisoin ] : ");
+			phydm_soml_on_off(dm, SOML_OFF);
+			return;
+		}
 
-			for (i = 0; i < rate_num; i++) {
-				rate_ss_shift = (i << 3);
-				PHYDM_DBG(p_dm, DBG_ADPTV_SOML, ("*num_ht_bytes_off  HT MCS[%d :%d ] = {%d, %d, %d, %d, %d, %d, %d, %d}\n",
-					  (rate_ss_shift), (rate_ss_shift + 7),
-					  p_dm_soml_table->num_ht_bytes_off[rate_ss_shift + 0], p_dm_soml_table->num_ht_bytes_off[rate_ss_shift + 1],
-					  p_dm_soml_table->num_ht_bytes_off[rate_ss_shift + 2], p_dm_soml_table->num_ht_bytes_off[rate_ss_shift + 3],
-					  p_dm_soml_table->num_ht_bytes_off[rate_ss_shift + 4], p_dm_soml_table->num_ht_bytes_off[rate_ss_shift + 5],
-					  p_dm_soml_table->num_ht_bytes_off[rate_ss_shift + 6], p_dm_soml_table->num_ht_bytes_off[rate_ss_shift + 7]));
-			}
+		for (i = 0; i < rate_num; i++) {
+			rate_ss_shift = 10 * i;
+			PHYDM_DBG(dm, DBG_ADPTV_SOML,
+				  "[  vht_cnt_on  VHT-%d ss MCS[0:9] = {%d, %d, %d, %d, %d, %d, %d, %d, %d, %d} ]\n",
+				  (i + 1),
+				  soml_tab->vht_cnt_on[rate_ss_shift + 0],
+				  soml_tab->vht_cnt_on[rate_ss_shift + 1],
+				  soml_tab->vht_cnt_on[rate_ss_shift + 2],
+				  soml_tab->vht_cnt_on[rate_ss_shift + 3],
+				  soml_tab->vht_cnt_on[rate_ss_shift + 4],
+				  soml_tab->vht_cnt_on[rate_ss_shift + 5],
+				  soml_tab->vht_cnt_on[rate_ss_shift + 6],
+				  soml_tab->vht_cnt_on[rate_ss_shift + 7],
+				  soml_tab->vht_cnt_on[rate_ss_shift + 8],
+				  soml_tab->vht_cnt_on[rate_ss_shift + 9]);
+		}
 
-			for (i = ODM_RATEMCS8; i <= ODM_RATEMCS15; i++) {
+		for (i = 0; i < rate_num; i++) {
+			rate_ss_shift = 10 * i;
+			PHYDM_DBG(dm, DBG_ADPTV_SOML,
+				  "[  vht_cnt_off  VHT-%d ss MCS[0:9] = {%d, %d, %d, %d, %d, %d, %d, %d, %d, %d} ]\n",
+				  (i + 1),
+				  soml_tab->vht_cnt_off[rate_ss_shift + 0],
+				  soml_tab->vht_cnt_off[rate_ss_shift + 1],
+				  soml_tab->vht_cnt_off[rate_ss_shift + 2],
+				  soml_tab->vht_cnt_off[rate_ss_shift + 3],
+				  soml_tab->vht_cnt_off[rate_ss_shift + 4],
+				  soml_tab->vht_cnt_off[rate_ss_shift + 5],
+				  soml_tab->vht_cnt_off[rate_ss_shift + 6],
+				  soml_tab->vht_cnt_off[rate_ss_shift + 7],
+				  soml_tab->vht_cnt_off[rate_ss_shift + 8],
+				  soml_tab->vht_cnt_off[rate_ss_shift + 9]);
+		}
 
-				byte_total_on += p_dm_soml_table->num_vht_bytes_on[i - ODM_RATEMCS0];
-				byte_total_off += p_dm_soml_table->num_vht_bytes_off[i - ODM_RATEMCS0];
-			}
+		for (i = ODM_RATEVHTSS2MCS0; i <= ODM_RATEVHTSS2MCS9; i++) {
+			vht_total_cnt_on += soml_tab->vht_cnt_on[i - vht0];
+			vht_total_cnt_off += soml_tab->vht_cnt_off[i - vht0];
+			total_vht_rate_on += (soml_tab->vht_cnt_on[i - vht0] *
+					     (vht_phy_rate_table[i - vht0] >> 1
+					     ));
+			total_vht_rate_off += (soml_tab->vht_cnt_off[i - vht0] *
+					      (vht_phy_rate_table[i - vht0] >> 1
+					      ));
+		}
+		total_vht_rate_on = total_vht_rate_on << 3;
+		total_vht_rate_off = total_vht_rate_off << 3;
+		rate_per_pkt_on = (vht_total_cnt_on != 0) ?
+				  (total_vht_rate_on / vht_total_cnt_on) : 0;
+		rate_per_pkt_off = (vht_total_cnt_off != 0) ?
+				   (total_vht_rate_off / vht_total_cnt_off) : 0;
+	}
 
-		} else if (p_dm->support_ic_type == ODM_RTL8822B) {
-
-			for (i = 0; i < rate_num; i++) {
-				rate_ss_shift = 10 * i;
-				PHYDM_DBG(p_dm, DBG_ADPTV_SOML, ("* num_vht_bytes_on  VHT-%d ss MCS[0:9] = {%d, %d, %d, %d, %d, %d, %d, %d, %d, %d}\n",
-					 (i + 1),
-					  p_dm_soml_table->num_vht_bytes_on[rate_ss_shift + 0], p_dm_soml_table->num_vht_bytes_on[rate_ss_shift + 1],
-					  p_dm_soml_table->num_vht_bytes_on[rate_ss_shift + 2], p_dm_soml_table->num_vht_bytes_on[rate_ss_shift + 3],
-					  p_dm_soml_table->num_vht_bytes_on[rate_ss_shift + 4], p_dm_soml_table->num_vht_bytes_on[rate_ss_shift + 5],
-					  p_dm_soml_table->num_vht_bytes_on[rate_ss_shift + 6], p_dm_soml_table->num_vht_bytes_on[rate_ss_shift + 7],
-					  p_dm_soml_table->num_vht_bytes_on[rate_ss_shift + 8], p_dm_soml_table->num_vht_bytes_on[rate_ss_shift + 9]));
-			}
+	/* @[Decision] */
+	PHYDM_DBG(dm, DBG_ADPTV_SOML,
+		  "[  rate_per_pkt_on = %d ; rate_per_pkt_off = %d ]\n",
+		  rate_per_pkt_on, rate_per_pkt_off);
+	if (rate_per_pkt_on > rate_per_pkt_off) {
+		next_on_off = SOML_ON;
+		PHYDM_DBG(dm, DBG_ADPTV_SOML,
+			  "[ rate_per_pkt_on > rate_per_pkt_off ==> SOML_ON ]\n");
+	} else if (rate_per_pkt_on < rate_per_pkt_off) {
+		next_on_off = SOML_OFF;
+		PHYDM_DBG(dm, DBG_ADPTV_SOML,
+			  "[ rate_per_pkt_on < rate_per_pkt_off ==> SOML_OFF ]\n");
+	} else {
+		PHYDM_DBG(dm, DBG_ADPTV_SOML,
+			  "[ stay at soml_last_state ]\n");
+		next_on_off = soml_tab->soml_last_state;
+	}
 
-			for (i = 0; i < rate_num; i++) {
-				rate_ss_shift = 10 * i;
-				PHYDM_DBG(p_dm, DBG_ADPTV_SOML, ("* num_vht_bytes_off  VHT-%d ss MCS[0:9] = {%d, %d, %d, %d, %d, %d, %d, %d, %d, %d}\n",
-					 (i + 1),
-					  p_dm_soml_table->num_vht_bytes_off[rate_ss_shift + 0], p_dm_soml_table->num_vht_bytes_off[rate_ss_shift + 1],
-					  p_dm_soml_table->num_vht_bytes_off[rate_ss_shift + 2], p_dm_soml_table->num_vht_bytes_off[rate_ss_shift + 3],
-					  p_dm_soml_table->num_vht_bytes_off[rate_ss_shift + 4], p_dm_soml_table->num_vht_bytes_off[rate_ss_shift + 5],
-					  p_dm_soml_table->num_vht_bytes_off[rate_ss_shift + 6], p_dm_soml_table->num_vht_bytes_off[rate_ss_shift + 7],
-					  p_dm_soml_table->num_vht_bytes_off[rate_ss_shift + 8], p_dm_soml_table->num_vht_bytes_off[rate_ss_shift + 9]));
-			}
-			for (i = ODM_RATEVHTSS2MCS0; i <= ODM_RATEVHTSS2MCS9; i++) {
-				byte_total_on += p_dm_soml_table->num_vht_bytes_on[i - ODM_RATEVHTSS1MCS0];
-				byte_total_off += p_dm_soml_table->num_vht_bytes_off[i - ODM_RATEVHTSS1MCS0];
-			}
-		}
+	PHYDM_DBG(dm, DBG_ADPTV_SOML, "[ Final decisoin ] : ");
+	phydm_soml_on_off(dm, next_on_off);
+	soml_tab->soml_last_state = next_on_off;
+}
 
-		/* [Decision] */
-		PHYDM_DBG(p_dm, DBG_ADPTV_SOML, ("[  byte_total_on = %d ; byte_total_off = %d ]\n", byte_total_on, byte_total_off));
-		PHYDM_DBG(p_dm, DBG_ADPTV_SOML, ("[Decisoin state ]\n"));
-		if (byte_total_on > byte_total_off) {
-			next_on_off = SOML_ON;
-			PHYDM_DBG(p_dm, DBG_ADPTV_SOML, ("[ byte_total_on > byte_total_off ==> SOML_ON ]\n"));
-		} else if (byte_total_on < byte_total_off) {
-			next_on_off = SOML_OFF;
-			PHYDM_DBG(p_dm, DBG_ADPTV_SOML, ("[ byte_total_on < byte_total_off ==> SOML_OFF ]\n"));
+void phydm_adsl(void *dm_void)
+{
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct adaptive_soml *soml_tab = &dm->dm_soml_table;
+
+	if (dm->support_ic_type & PHYDM_ADAPTIVE_SOML_IC) {
+		PHYDM_DBG(dm, DBG_ADPTV_SOML, "soml_state_cnt =((%d))\n",
+			  soml_tab->soml_state_cnt);
+		/*Traning state: 0(alt) 1(ori) 2(alt) 3(ori)===============*/
+		if (soml_tab->soml_state_cnt <
+		    (soml_tab->soml_train_num << 1)) {
+			if (soml_tab->soml_state_cnt == 0)
+				phydm_adsl_init_state(dm);
+			else if ((soml_tab->soml_state_cnt % 2) != 0)
+				phydm_adsl_odd_state(dm);
+			else if ((soml_tab->soml_state_cnt % 2) == 0)
+				phydm_adsl_even_state(dm);
 		} else {
-			PHYDM_DBG(p_dm, DBG_ADPTV_SOML, ("[ stay at soml_last_state ]\n"));
-			next_on_off = p_dm_soml_table->soml_last_state;
+			phydm_adsl_decision_state(dm);
 		}
+	}
+}
+
+void phydm_adaptive_soml_reset(void *dm_void)
+{
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct adaptive_soml *soml_tab = &dm->dm_soml_table;
 
-		PHYDM_DBG(p_dm, DBG_ADPTV_SOML, ("[ Final decisoin ] : "));
-		phydm_soml_on_off(p_dm, next_on_off);
-		p_dm_soml_table->soml_last_state = next_on_off;
+	soml_tab->soml_state_cnt = 0;
+	soml_tab->is_soml_method_enable = 0;
+	soml_tab->soml_counter = 0;
+}
+
+void phydm_set_adsl_val(void *dm_void, u32 *val_buf, u8 val_len)
+{
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+
+	if (val_len != 1) {
+		PHYDM_DBG(dm, ODM_COMP_API, "[Error][ADSL]Need val_len=1\n");
+		return;
 	}
 
+	phydm_soml_on_off(dm, (u8)val_buf[1]);
 }
 
-void
-phydm_adaptive_soml_reset(
-	void		*p_dm_void
-)
+void phydm_soml_bytes_acq(void *dm_void, u8 rate_id, u32 length)
 {
-	struct PHY_DM_STRUCT		*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	struct adaptive_soml	*p_dm_soml_table = &p_dm->dm_soml_table;
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct adaptive_soml *soml_tab = &dm->dm_soml_table;
+
+	if (rate_id >= ODM_RATEMCS0 && rate_id <= ODM_RATEMCS31)
+		soml_tab->ht_byte[rate_id - ODM_RATEMCS0] += (u16)length;
+	else if (rate_id >= ODM_RATEVHTSS1MCS0 && rate_id <= ODM_RATEVHTSS4MCS9)
+		soml_tab->vht_byte[rate_id - ODM_RATEVHTSS1MCS0] += (u16)length;
 
-	p_dm_soml_table->soml_state_cnt = 0;
-	p_dm_soml_table->is_soml_method_enable = 0;
-	p_dm_soml_table->soml_counter = 0;
 }
 
-#endif /* end of CONFIG_ADAPTIVE_SOML*/
-void
-phydm_soml_bytes_acq(
-	void		*dm_void,
-	u8		rate_id,
-	u32		length
-)
+#if defined(CONFIG_RTL_TRIBAND_SUPPORT) && defined(CONFIG_USB_HCI)
+#define INIT_TIMER_EVENT_ENTRY(_entry, _func, _data) \
+	do { \
+		_rtw_init_listhead(&(_entry)->list); \
+		(_entry)->data = (_data); \
+		(_entry)->function = (_func); \
+	} while (0)
+
+static void pre_phydm_adaptive_soml_callback(unsigned long task_dm)
 {
-#ifdef CONFIG_ADAPTIVE_SOML
-	struct PHY_DM_STRUCT		*dm = (struct PHY_DM_STRUCT *)dm_void;
-	struct adaptive_soml	*dm_soml_table = &dm->dm_soml_table;
+	struct dm_struct *dm = (struct dm_struct *)task_dm;
+	struct rtl8192cd_priv *priv = dm->priv;
+	struct priv_shared_info *pshare = priv->pshare;
+
+	if (pshare->bDriverStopped || pshare->bSurpriseRemoved) {
+		printk("[%s] bDriverStopped(%d) OR bSurpriseRemoved(%d)\n",
+		       __FUNCTION__, pshare->bDriverStopped,
+		       pshare->bSurpriseRemoved);
+		return;
+	}
 
-	if ((rate_id >= ODM_RATEMCS0) && (rate_id <= ODM_RATEMCS31))
-		dm_soml_table->num_ht_bytes[rate_id - ODM_RATEMCS0] += length;
-	else if ((rate_id >= ODM_RATEVHTSS1MCS0) && (rate_id <= ODM_RATEVHTSS4MCS9))
-		dm_soml_table->num_vht_bytes[rate_id - ODM_RATEVHTSS1MCS0] += length;
+	rtw_enqueue_timer_event(priv, &pshare->adaptive_soml_event,
+				ENQUEUE_TO_TAIL);
+}
 
-#endif
+void phydm_adaptive_soml_timers_usb(void *dm_void, u8 state)
+{
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct adaptive_soml *soml_tab = &dm->dm_soml_table;
+	struct rtl8192cd_priv *priv = dm->priv;
+
+	if (state == INIT_SOML_TIMMER) {
+		init_timer(&soml_tab->phydm_adaptive_soml_timer);
+		soml_tab->phydm_adaptive_soml_timer.data = (unsigned long)dm;
+		soml_tab->phydm_adaptive_soml_timer.function = pre_phydm_adaptive_soml_callback;
+		INIT_TIMER_EVENT_ENTRY(&priv->pshare->adaptive_soml_event,
+				       phydm_adaptive_soml_callback,
+				       (unsigned long)dm);
+	} else if (state == CANCEL_SOML_TIMMER) {
+		odm_cancel_timer(dm, &soml_tab->phydm_adaptive_soml_timer);
+	} else if (state == RELEASE_SOML_TIMMER) {
+		odm_release_timer(dm, &soml_tab->phydm_adaptive_soml_timer);
+	}
 }
+#endif /* defined(CONFIG_RTL_TRIBAND_SUPPORT) && defined(CONFIG_USB_HCI) */
 
-void
-phydm_adaptive_soml_timers(
-	void		*p_dm_void,
-	u8		state
-)
+void phydm_adaptive_soml_timers(void *dm_void, u8 state)
 {
-#ifdef CONFIG_ADAPTIVE_SOML
-	struct PHY_DM_STRUCT		*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	struct adaptive_soml	*p_dm_soml_table = &p_dm->dm_soml_table;
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct adaptive_soml *soml_tab = &dm->dm_soml_table;
 
+#if defined(CONFIG_RTL_TRIBAND_SUPPORT) && defined(CONFIG_USB_HCI)
+	struct rtl8192cd_priv *priv = dm->priv;
+
+	if (priv->hci_type == RTL_HCI_USB) {
+		phydm_adaptive_soml_timers_usb(dm_void, state);
+	} else
+#endif /* defined(CONFIG_RTL_TRIBAND_SUPPORT) && defined(CONFIG_USB_HCI) */
+	{
 	if (state == INIT_SOML_TIMMER) {
-		odm_initialize_timer(p_dm, &p_dm_soml_table->phydm_adaptive_soml_timer,
-			(void *)phydm_adaptive_soml_callback, NULL, "phydm_adaptive_soml_timer");
+		odm_initialize_timer(dm, &soml_tab->phydm_adaptive_soml_timer,
+				     (void *)phydm_adaptive_soml_callback, NULL,
+				     "phydm_adaptive_soml_timer");
 	} else if (state == CANCEL_SOML_TIMMER) {
-		odm_cancel_timer(p_dm, &p_dm_soml_table->phydm_adaptive_soml_timer);
+		odm_cancel_timer(dm, &soml_tab->phydm_adaptive_soml_timer);
 	} else if (state == RELEASE_SOML_TIMMER) {
-		odm_release_timer(p_dm, &p_dm_soml_table->phydm_adaptive_soml_timer);
+		odm_release_timer(dm, &soml_tab->phydm_adaptive_soml_timer);
+	}
 	}
-#endif
 }
 
-void
-phydm_adaptive_soml_init(
-	void		*p_dm_void
-)
+void phydm_adaptive_soml_init(void *dm_void)
 {
-#ifdef CONFIG_ADAPTIVE_SOML
-	struct PHY_DM_STRUCT		*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	struct adaptive_soml	*p_dm_soml_table = &p_dm->dm_soml_table;
-
-	PHYDM_DBG(p_dm, DBG_ADPTV_SOML, ("phydm_adaptive_soml_init\n"));
-
-	p_dm_soml_table->soml_state_cnt = 0;
-	p_dm_soml_table->soml_delay_time = 40;
-	p_dm_soml_table->soml_intvl = 150;
-	p_dm_soml_table->soml_train_num = 4;
-	p_dm_soml_table->is_soml_method_enable = 0;
-	p_dm_soml_table->soml_counter = 0;
-	p_dm_soml_table->soml_period = 4;
-	p_dm_soml_table->soml_select = 0;
-	if (p_dm->support_ic_type & (ODM_RTL8197F | ODM_RTL8192F))
-		odm_set_bb_reg(p_dm, 0x988, BIT(25), 1);
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct adaptive_soml *soml_tab = &dm->dm_soml_table;
+#if 0
+	if (!(dm->support_ability & ODM_BB_ADAPTIVE_SOML)) {
+		PHYDM_DBG(dm, DBG_ADPTV_SOML,
+			  "[Return]   Not Support Adaptive SOML\n");
+		return;
+	}
 #endif
+	PHYDM_DBG(dm, DBG_ADPTV_SOML, "%s\n", __func__);
+
+	soml_tab->soml_state_cnt = 0;
+	soml_tab->soml_delay_time = 40;
+	soml_tab->soml_intvl = 150;
+	soml_tab->soml_train_num = 4;
+	soml_tab->is_soml_method_enable = 0;
+	soml_tab->soml_counter = 0;
+#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_CE))
+	soml_tab->soml_period = 1;
+#else
+	soml_tab->soml_period = 4;
+#endif
+	soml_tab->soml_select = 0;
+	soml_tab->cfo_cnt = 0;
+	soml_tab->cfo_diff_sum_a = 0;
+	soml_tab->cfo_diff_sum_b = 0;
+
+	soml_tab->cfo_qpsk_th = 94;
+	soml_tab->cfo_qam16_th = 38;
+	soml_tab->cfo_qam64_th = 17;
+	soml_tab->cfo_qam256_th = 7;
+
+	soml_tab->bpsk_qpsk_dist_th = 20;
+	soml_tab->qam16_dist_th = 20;
+	soml_tab->qam64_dist_th = 20;
+	soml_tab->qam256_dist_th = 20;
+
+	if (dm->support_ic_type & (ODM_RTL8197F | ODM_RTL8192F))
+		odm_set_bb_reg(dm, 0x988, BIT(25), 1);
 }
 
-void
-phydm_adaptive_soml(
-	void		*p_dm_void
-)
+void phydm_adaptive_soml(void *dm_void)
 {
-#ifdef CONFIG_ADAPTIVE_SOML
-	struct PHY_DM_STRUCT		*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	struct adaptive_soml	*p_dm_soml_table = &p_dm->dm_soml_table;
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct adaptive_soml *soml_tab = &dm->dm_soml_table;
 
-	if (!(p_dm->support_ability & ODM_BB_ADAPTIVE_SOML)) {
-		PHYDM_DBG(p_dm, DBG_ADPTV_SOML,
-			("[Return!!!]   Not Support Adaptive SOML Function\n"));
+	if (!(dm->support_ability & ODM_BB_ADAPTIVE_SOML)) {
+		PHYDM_DBG(dm, DBG_ADPTV_SOML,
+			  "[Return!!!] Not Support Adaptive SOML Function\n");
 		return;
 	}
 
-	if (p_dm_soml_table->soml_counter <  p_dm_soml_table->soml_period) {
-		p_dm_soml_table->soml_counter++;
+	if (dm->pause_ability & ODM_BB_ADAPTIVE_SOML) {
+		PHYDM_DBG(dm, DBG_ADPTV_SOML, "Return: Pause ADSL in LV=%d\n",
+			  dm->pause_lv_table.lv_adsl);
 		return;
 	}
-	p_dm_soml_table->soml_counter = 0;
 
-
-	if (p_dm_soml_table->soml_select == 0) {
-		PHYDM_DBG(p_dm, DBG_ADPTV_SOML, ("[Adaptive SOML Training !!!]\n"));
-	} else if (p_dm_soml_table->soml_select == 1) {
-		PHYDM_DBG(p_dm, DBG_ADPTV_SOML, ("[Turn on SOML !!!] Exit from Adaptive SOML Training\n"));
-		phydm_soml_on_off(p_dm, SOML_ON);
+	if (soml_tab->soml_counter < soml_tab->soml_period) {
+		soml_tab->soml_counter++;
+		return;
+	}
+	soml_tab->soml_counter = 0;
+	soml_tab->soml_state_cnt = 0;
+	soml_tab->cfo_cnt = 0;
+	soml_tab->cfo_diff_sum_a = 0;
+	soml_tab->cfo_diff_sum_b = 0;
+
+	phydm_soml_reset_qam(dm);
+
+	if (soml_tab->soml_select == 0) {
+		PHYDM_DBG(dm, DBG_ADPTV_SOML,
+			  "[ Adaptive SOML Training !!!]\n");
+	} else if (soml_tab->soml_select == 1) {
+		PHYDM_DBG(dm, DBG_ADPTV_SOML, "[ Stop Adaptive SOML !!!]\n");
+		phydm_soml_on_off(dm, SOML_ON);
 		return;
-	} else if (p_dm_soml_table->soml_select == 2) {
-		PHYDM_DBG(p_dm, DBG_ADPTV_SOML, ("[Turn off SOML !!!] Exit from Adaptive SOML Training\n"));
-		phydm_soml_on_off(p_dm, SOML_OFF);
+	} else if (soml_tab->soml_select == 2) {
+		PHYDM_DBG(dm, DBG_ADPTV_SOML, "[ Stop Adaptive SOML !!!]\n");
+		phydm_soml_on_off(dm, SOML_OFF);
 		return;
 	}
-	if (p_dm->support_ic_type & ODM_ADAPTIVE_SOML_SUPPORT_IC)
-		phydm_adsl(p_dm);
 
-#endif
+	if (dm->support_ic_type & PHYDM_ADAPTIVE_SOML_IC)
+		phydm_adsl(dm);
 }
 
-void
-phydm_enable_adaptive_soml(
-	void		*dm_void
-)
+void phydm_enable_adaptive_soml(void *dm_void)
 {
-#ifdef CONFIG_ADAPTIVE_SOML
-	struct PHY_DM_STRUCT		*dm = (struct PHY_DM_STRUCT *)dm_void;
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
 
-	PHYDM_DBG(dm, DBG_ADPTV_SOML, ("[%s][Return!!!]  enable Adaptive SOML\n\n", __func__));
+	PHYDM_DBG(dm, DBG_ADPTV_SOML, "[%s]\n", __func__);
 	dm->support_ability |= ODM_BB_ADAPTIVE_SOML;
 	phydm_soml_on_off(dm, SOML_ON);
-#endif
 }
 
-void
-phydm_stop_adaptive_soml(
-	void		*dm_void
-)
+void phydm_stop_adaptive_soml(void *dm_void)
 {
-#ifdef CONFIG_ADAPTIVE_SOML
-	struct PHY_DM_STRUCT		*dm = (struct PHY_DM_STRUCT *)dm_void;
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
 
-	PHYDM_DBG(dm, DBG_ADPTV_SOML, ("[%s][Return!!!]  Stop Adaptive SOML\n\n", __func__));
+	PHYDM_DBG(dm, DBG_ADPTV_SOML, "[%s]\n", __func__);
 	dm->support_ability &= ~ODM_BB_ADAPTIVE_SOML;
 	phydm_soml_on_off(dm, SOML_ON);
-
-#endif
 }
 
-void
-phydm_adaptive_soml_para_set(
-	void		*dm_void,
-	u8		train_num,
-	u8		intvl,
-	u8		period,
-	u8		delay_time
-)
+void phydm_adaptive_soml_para_set(void *dm_void, u8 train_num, u8 intvl,
+				  u8 period, u8 delay_time)
 {
-#ifdef CONFIG_ADAPTIVE_SOML
-	struct PHY_DM_STRUCT		*dm = (struct PHY_DM_STRUCT *)dm_void;
-	struct adaptive_soml	*dm_soml_table = &dm->dm_soml_table;
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct adaptive_soml *soml_tab = &dm->dm_soml_table;
 
-	dm_soml_table->soml_train_num = train_num;
-	dm_soml_table->soml_intvl = intvl;
-	dm_soml_table->soml_period = period;
-	dm_soml_table->soml_delay_time = delay_time;
-#endif
+	soml_tab->soml_train_num = train_num;
+	soml_tab->soml_intvl = intvl;
+	soml_tab->soml_period = period;
+	soml_tab->soml_delay_time = delay_time;
 }
+#endif /* @end of CONFIG_ADAPTIVE_SOML*/
 
-void
-phydm_init_soft_ml_setting(
-	void		*p_dm_void
-)
+void phydm_init_soft_ml_setting(void *dm_void)
 {
-	struct PHY_DM_STRUCT		*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	u32 soml_mask = BIT(31) | BIT(30) | BIT(29) | BIT(28);
+
 #if (RTL8822B_SUPPORT == 1)
-	if (*(p_dm->p_mp_mode) == false) {
-		if (p_dm->support_ic_type & ODM_RTL8822B)
-			/*odm_set_bb_reg(p_dm, 0x19a8, MASKDWORD, 0xd10a0000);*/
-			phydm_somlrxhp_setting(p_dm, true);
-			p_dm->bsomlenabled = true;
+	if (!*dm->mp_mode) {
+		if (dm->support_ic_type & ODM_RTL8822B) {
+#if 0
+			/*odm_set_bb_reg(dm, R_0x19a8, MASKDWORD, 0xd10a0000);*/
+#endif
+			phydm_somlrxhp_setting(dm, true);
+			dm->bsomlenabled = true;
+		}
 	}
 #endif
 #if (RTL8821C_SUPPORT == 1)
-	if (*(p_dm->p_mp_mode) == false) {
-		if (p_dm->support_ic_type & ODM_RTL8821C)
-			odm_set_bb_reg(p_dm, 0x19a8, BIT(31)|BIT(30)|BIT(29)|BIT(28), 0xd);
+	if (!*dm->mp_mode) {
+		if (dm->support_ic_type & ODM_RTL8821C)
+			odm_set_bb_reg(dm, R_0x19a8, soml_mask, 0xd);
+	}
+#endif
+#if (RTL8195B_SUPPORT == 1)
+	if (!*dm->mp_mode) {
+		if (dm->support_ic_type & ODM_RTL8195B)
+			odm_set_bb_reg(dm, R_0x19a8, soml_mask, 0xd);
 	}
 #endif
 }
-
diff --git a/rtl8723DS/hal/phydm/phydm_soml.h b/rtl8723DS/hal/phydm/phydm_soml.h
index dcbf362..2d5fbc3 100755..100644
--- a/rtl8723DS/hal/phydm/phydm_soml.h
+++ b/rtl8723DS/hal/phydm/phydm_soml.h
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2007 - 2017 Realtek Corporation.
+ * Copyright(c) 2007 - 2017  Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -8,34 +8,64 @@
  *
  * This program is distributed in the hope that it will be useful, but WITHOUT
  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  * more details.
  *
+ * The full GNU General Public License is included in this distribution in the
+ * file called LICENSE.
+ *
+ * Contact Information:
+ * wlanfae <wlanfae@realtek.com>
+ * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
+ * Hsinchu 300, Taiwan.
+ *
+ * Larry Finger <Larry.Finger@lwfinger.net>
+ *
  *****************************************************************************/
-#ifndef	__PHYDMSOML_H__
-#define    __PHYDMSOML_H__
+#ifndef __PHYDMSOML_H__
+#define __PHYDMSOML_H__
 
-#define ADAPTIVE_SOML_VERSION	"1.0"
+/*@#define ADAPTIVE_SOML_VERSION	"1.0" Byte counter version*/
+#define ADAPTIVE_SOML_VERSION "2.0" /*@add avg. phy rate decision 20180126*/
 
-#define ODM_ADAPTIVE_SOML_SUPPORT_IC	(ODM_RTL8822B | ODM_RTL8197F)
+#define PHYDM_ADAPTIVE_SOML_IC	(ODM_RTL8822B | ODM_RTL8197F | ODM_RTL8192F)
+/*@jj add 20170822*/
 
 #define INIT_SOML_TIMMER			0
-#define CANCEL_SOML_TIMMER		1
+#define CANCEL_SOML_TIMMER			1
 #define RELEASE_SOML_TIMMER		2
 
 #define SOML_RSSI_TH_HIGH	25
 #define SOML_RSSI_TH_LOW	20
 
-#define HT_RATE_IDX			32
-#define VHT_RATE_IDX		40
+#define HT_RATE_IDX			16
+#define VHT_RATE_IDX		20
+
+#define HT_ORDER_TYPE		3
+#define VHT_ORDER_TYPE		4
+
+#if 0
+#define CFO_QPSK_TH			20
+#define CFO_QAM16_TH		20
+#define CFO_QAM64_TH		20
+#define CFO_QAM256_TH		20
+
+#define BPSK_QPSK_DIST		20
+#define QAM16_DIST			30
+#define QAM64_DIST			30
+#define QAM256_DIST			20
+#endif
+#define HT_TYPE		1
+#define VHT_TYPE		2
 
 #define SOML_ON		1
-#define SOML_OFF	0
+#define SOML_OFF		0
 
 #ifdef CONFIG_ADAPTIVE_SOML
 
 struct adaptive_soml {
-	boolean		is_soml_method_enable;
+	u8			rvrt_val;
+	boolean			is_soml_method_enable;
 	u8			soml_on_off;
 	u8			soml_state_cnt;
 	u8			soml_delay_time;
@@ -45,139 +75,111 @@ struct adaptive_soml {
 	u8			soml_period;
 	u8			soml_select;
 	u8			soml_last_state;
-	u32			num_ht_bytes[HT_RATE_IDX];
-	u32			pre_num_ht_bytes[HT_RATE_IDX];
-	u32			num_ht_bytes_on[HT_RATE_IDX];
-	u32			num_ht_bytes_off[HT_RATE_IDX];
-	u32			num_vht_bytes[VHT_RATE_IDX];
-	u32			pre_num_vht_bytes[VHT_RATE_IDX];
-	u32			num_vht_bytes_on[VHT_RATE_IDX];
-	u32			num_vht_bytes_off[VHT_RATE_IDX];
+	u8			cfo_qpsk_th;
+	u8			cfo_qam16_th;
+	u8			cfo_qam64_th;
+	u8			cfo_qam256_th;
+	u8			bpsk_qpsk_dist_th;
+	u8			qam16_dist_th;
+	u8			qam64_dist_th;
+	u8			qam256_dist_th;
+	u8			cfo_cnt;
+	s32			cfo_diff_a;
+	s32			cfo_diff_b;
+	s32			cfo_diff_sum_a;
+	s32			cfo_diff_sum_b;
+	s32			cfo_diff_avg_a;
+	s32			cfo_diff_avg_b;
+	u16			ht_cnt[HT_RATE_IDX];
+	u16			pre_ht_cnt[HT_RATE_IDX];
+	u16			ht_cnt_on[HT_RATE_IDX];
+	u16			ht_cnt_off[HT_RATE_IDX];
+
+	u16			vht_cnt[VHT_RATE_IDX];
+	u16			pre_vht_cnt[VHT_RATE_IDX];
+	u16			vht_cnt_on[VHT_RATE_IDX];
+	u16			vht_cnt_off[VHT_RATE_IDX];
+
+	u16			num_ht_qam[HT_ORDER_TYPE];
+	u16			ht_byte[HT_RATE_IDX];
+	u16			pre_ht_byte[HT_RATE_IDX];
+	u16			ht_byte_on[HT_RATE_IDX];
+	u16			ht_byte_off[HT_RATE_IDX];
+	u16			num_vht_qam[VHT_ORDER_TYPE];
+	u16			vht_byte[VHT_RATE_IDX];
+	u16			pre_vht_byte[VHT_RATE_IDX];
+	u16			vht_byte_on[VHT_RATE_IDX];
+	u16			vht_byte_off[VHT_RATE_IDX];
 
 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
 #if USE_WORKITEM
 	RT_WORK_ITEM	phydm_adaptive_soml_workitem;
 #endif
 #endif
-	struct timer_list		phydm_adaptive_soml_timer;
+	struct phydm_timer_list		phydm_adaptive_soml_timer;
+
+};
+
+enum qam_order {
+	BPSK_QPSK	= 0,
+	QAM16		= 1,
+	QAM64		= 2,
+	QAM256		= 3
 };
 
-void
-phydm_soml_on_off(
-	void		*p_dm_void,
-	u8		swch
-);
+void phydm_dynamicsoftmletting(void *dm_void);
+
+void phydm_soml_on_off(void *dm_void, u8 swch);
 
 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
-void
-phydm_adaptive_soml_callback(
-	struct timer_list		*p_timer
-);
+void phydm_adaptive_soml_callback(struct phydm_timer_list *timer);
 
-void
-phydm_adaptive_soml_workitem_callback(
-	void		*p_context
-);
+void phydm_adaptive_soml_workitem_callback(void *context);
 
 #elif (DM_ODM_SUPPORT_TYPE == ODM_CE)
-void
-phydm_adaptive_soml_callback(
-	void		*dm_void
-);
+void phydm_adaptive_soml_callback(void *dm_void);
 
-void
-phydm_adaptive_soml_workitem_callback(
-	void		*context
-);
+void phydm_adaptive_soml_workitem_callback(void *context);
 
 #else
+void phydm_adaptive_soml_callback(void *dm_void);
+#endif
 
-void
-phydm_adaptive_soml_callback(
-	void		*p_dm_void
-);
+void phydm_rx_rate_for_soml(void *dm_void, void *pkt_info_void);
 
-#endif
+void phydm_rx_qam_for_soml(void *dm_void, void *pkt_info_void);
 
-void
-phydm_soml_debug(
-	void		*p_dm_void,
-	u32		*const dm_value,
-	u32		*_used,
-	char			*output,
-	u32		*_out_len
-);
+void phydm_soml_reset_rx_rate(void *dm_void);
 
-void
-phydm_soml_statistics(
-	void		*p_dm_void,
-	u8		on_off_state
+void phydm_soml_reset_qam(void *dm_void);
 
-);
+void phydm_soml_cfo_process(void *dm_void, s32 *diff_a, s32 *diff_b);
 
-void
-phydm_adsl(
-	void		*p_dm_void
-);
+void phydm_soml_debug(void *dm_void, char input[][16], u32 *_used,
+		      char *output, u32 *_out_len);
 
-void
-phydm_adaptive_soml_reset(
-	void		*p_dm_void
-);
+void phydm_soml_statistics(void *dm_void, u8 on_off_state);
 
-#endif
-#ifdef NEVER
-void
-phydm_dynamicsoftmletting(
-	struct PHY_DM_STRUCT		*p_dm
-);
-#endif
+void phydm_adsl(void *dm_void);
+
+void phydm_adaptive_soml_reset(void *dm_void);
+
+void phydm_set_adsl_val(void *dm_void, u32 *val_buf, u8 val_len);
+
+void phydm_soml_bytes_acq(void *dm_void, u8 rate_id, u32 length);
 
-void
-phydm_soml_bytes_acq(
-	void		*dm_void,
-	u8		rate_id,
-	u32		length
-);
-
-void
-phydm_adaptive_soml_timers(
-	void		*p_dm_void,
-	u8		state
-);
-
-void
-phydm_adaptive_soml_init(
-	void		*p_dm_void
-);
-
-void
-phydm_adaptive_soml(
-	void		*p_dm_void
-);
-
-void
-phydm_enable_adaptive_soml(
-	void		*dm_void
-);
-
-void
-phydm_stop_adaptive_soml(
-	void		*dm_void
-);
-
-void
-phydm_adaptive_soml_para_set(
-	void		*dm_void,
-	u8		train_num,
-	u8		intvl,
-	u8		period,
-	u8		delay_time
-);
-
-void
-phydm_init_soft_ml_setting(
-	void		*p_dm_void
-);
-
-#endif /*#ifndef	__PHYDMSOML_H__*/
+void phydm_adaptive_soml_timers(void *dm_void, u8 state);
+
+void phydm_adaptive_soml_init(void *dm_void);
+
+void phydm_adaptive_soml(void *dm_void);
+
+void phydm_enable_adaptive_soml(void *dm_void);
+
+void phydm_stop_adaptive_soml(void *dm_void);
+
+void phydm_adaptive_soml_para_set(void *dm_void, u8 train_num, u8 intvl,
+				  u8 period, u8 delay_time);
+#endif
+void phydm_init_soft_ml_setting(void *dm_void);
+#endif /*@#ifndef	__PHYDMSOML_H__*/
diff --git a/rtl8723DS/hal/phydm/phydm_types.h b/rtl8723DS/hal/phydm/phydm_types.h
index 2565cf3..a13f506 100755..100644
--- a/rtl8723DS/hal/phydm/phydm_types.h
+++ b/rtl8723DS/hal/phydm/phydm_types.h
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2007 - 2017 Realtek Corporation.
+ * Copyright(c) 2007 - 2017  Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -8,51 +8,73 @@
  *
  * This program is distributed in the hope that it will be useful, but WITHOUT
  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  * more details.
  *
+ * The full GNU General Public License is included in this distribution in the
+ * file called LICENSE.
+ *
+ * Contact Information:
+ * wlanfae <wlanfae@realtek.com>
+ * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
+ * Hsinchu 300, Taiwan.
+ *
+ * Larry Finger <Larry.Finger@lwfinger.net>
+ *
  *****************************************************************************/
 #ifndef __ODM_TYPES_H__
 #define __ODM_TYPES_H__
 
-
 /*Define Different SW team support*/
 #define	ODM_AP			0x01	/*BIT(0)*/
 #define	ODM_CE			0x04	/*BIT(2)*/
 #define	ODM_WIN		0x08	/*BIT(3)*/
-#define	ODM_ADSL		0x10	/*BIT(4)*/		/*already combine with ODM_AP, and is nouse now*/
+#define	ODM_ADSL		0x10
+/*BIT(4)*/		/*already combine with ODM_AP, and is nouse now*/
 #define	ODM_IOT		0x20	/*BIT(5)*/
 
 /*For FW API*/
 #define	__iram_odm_func__
+#define	__odm_func__
+#define	__odm_func_aon__
 
 /*Deifne HW endian support*/
 #define	ODM_ENDIAN_BIG	0
 #define	ODM_ENDIAN_LITTLE	1
 
 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
-	#define GET_PDM_ODM(__padapter)	((struct PHY_DM_STRUCT*)(&((GET_HAL_DATA(__padapter))->DM_OutSrc)))
+	#define GET_PDM_ODM(__padapter)	((struct dm_struct*)(&(GET_HAL_DATA(__padapter))->DM_OutSrc))
 #elif (DM_ODM_SUPPORT_TYPE == ODM_CE)
-	#define GET_PDM_ODM(__padapter)	((struct PHY_DM_STRUCT*)(&((GET_HAL_DATA(__padapter))->odmpriv)))
+	#define GET_PDM_ODM(__padapter)	((struct dm_struct *)(&(GET_HAL_DATA(__padapter))->odmpriv))
 #elif (DM_ODM_SUPPORT_TYPE == ODM_AP)
-	#define GET_PDM_ODM(__padapter)	((struct PHY_DM_STRUCT*)(&(__padapter->pshare->_dmODM)))
+	#define GET_PDM_ODM(__padapter)	((struct dm_struct*)(&__padapter->pshare->_dmODM))
 #endif
 
 #if (DM_ODM_SUPPORT_TYPE != ODM_WIN)
-	#define	RT_PCI_INTERFACE				1
-	#define	RT_USB_INTERFACE				2
-	#define	RT_SDIO_INTERFACE				3
+	#if defined(CONFIG_RTL_TRIBAND_SUPPORT) && defined(CONFIG_USB_HCI)
+	/* enable PCI & USB HCI at the same time */
+  	#define RT_PCI_USB_INTERFACE			1
+  	#define	RT_PCI_INTERFACE			RT_PCI_USB_INTERFACE
+	#define RT_USB_INTERFACE			RT_PCI_USB_INTERFACE
+	#define	RT_SDIO_INTERFACE			3
+  	#else
+	#define	RT_PCI_INTERFACE			1
+	#define	RT_USB_INTERFACE			2
+	#define	RT_SDIO_INTERFACE			3
+	#endif
 #endif
 
 enum hal_status {
 	HAL_STATUS_SUCCESS,
 	HAL_STATUS_FAILURE,
-	/*RT_STATUS_PENDING,
+#if 0
+	RT_STATUS_PENDING,
 	RT_STATUS_RESOURCE,
 	RT_STATUS_INVALID_CONTEXT,
 	RT_STATUS_INVALID_PARAMETER,
 	RT_STATUS_NOT_SUPPORT,
-	RT_STATUS_OS_API_FAILED,*/
+	RT_STATUS_OS_API_FAILED,
+#endif
 };
 
 #if (DM_ODM_SUPPORT_TYPE != ODM_WIN)
@@ -60,8 +82,8 @@ enum hal_status {
 #define		VISTA_USB_RX_REVISE			0
 
 /*
- * Declare for ODM spin lock defintion temporarily fro compile pass.
- *   */
+ * Declare for ODM spin lock definition temporarily fro compile pass.
+ */
 enum rt_spinlock_type {
 	RT_TX_SPINLOCK = 1,
 	RT_RX_SPINLOCK = 2,
@@ -73,16 +95,19 @@ enum rt_spinlock_type {
 	RT_CHNLOP_SPINLOCK = 9,
 	RT_RF_OPERATE_SPINLOCK = 10,
 	RT_INITIAL_SPINLOCK = 11,
-	RT_RF_STATE_SPINLOCK = 12, /* For RF state. Added by Bruce, 2007-10-30. */
+	RT_RF_STATE_SPINLOCK = 12,
+	/* For RF state. Added by Bruce, 2007-10-30. */
 #if VISTA_USB_RX_REVISE
 	RT_USBRX_CONTEXT_SPINLOCK = 13,
-	RT_USBRX_POSTPROC_SPINLOCK = 14, /* protect data of adapter->IndicateW/ IndicateR */
+	RT_USBRX_POSTPROC_SPINLOCK = 14,
+	/* protect data of adapter->IndicateW/ IndicateR */
 #endif
 	/* Shall we define Ndis 6.2 SpinLock Here ? */
 	RT_PORT_SPINLOCK = 16,
 	RT_VNIC_SPINLOCK = 17,
 	RT_HVL_SPINLOCK = 18,
-	RT_H2C_SPINLOCK = 20, /* For H2C cmd. Added by tynli. 2009.11.09. */
+	RT_H2C_SPINLOCK = 20,
+	/* For H2C cmd. Added by tynli. 2009.11.09. */
 
 	rt_bt_data_spinlock = 25,
 
@@ -131,15 +156,19 @@ enum rt_spinlock_type {
 	#define	u64		u8Byte
 	#define	s64		s8Byte
 
-	#define	timer_list	_RT_TIMER
-	
+	#define	phydm_timer_list	_RT_TIMER
+
 
 #elif (DM_ODM_SUPPORT_TYPE == ODM_AP)
 	#include "../typedef.h"
 
 	#ifdef CONFIG_PCI_HCI
+	#if defined(CONFIG_RTL_TRIBAND_SUPPORT) && defined(CONFIG_USB_HCI)
+		#define DEV_BUS_TYPE		RT_PCI_USB_INTERFACE
+	#else
 		#define DEV_BUS_TYPE		RT_PCI_INTERFACE
 	#endif
+	#endif
 
 	#if (defined(TESTCHIP_SUPPORT))
 		#define	PHYDM_TESTCHIP_SUPPORT 1
@@ -150,6 +179,8 @@ enum rt_spinlock_type {
 	#define	sta_info stat_info
 	#define	boolean	bool
 
+	#define	phydm_timer_list	timer_list
+
 #elif (DM_ODM_SUPPORT_TYPE == ODM_CE) && defined(DM_ODM_CE_MAC80211)
 
 	#include <asm/byteorder.h>
@@ -171,21 +202,6 @@ enum rt_spinlock_type {
 	#define	RTL8881A_SUPPORT	0
 	#define	PHYDM_TESTCHIP_SUPPORT 0
 
-	/* support list */
-	#define RTL8188E_SUPPORT				0
-	#define RTL8812A_SUPPORT				0
-	#define RTL8821A_SUPPORT				0
-	#define RTL8723B_SUPPORT				0
-	#define RTL8723D_SUPPORT				0
-	#define RTL8192E_SUPPORT				0
-	#define RTL8814A_SUPPORT				0
-	#define RTL8195A_SUPPORT				0
-	#define RTL8197F_SUPPORT				0
-	#define RTL8703B_SUPPORT				0
-	#define RTL8188F_SUPPORT				0
-	#define RTL8822B_SUPPORT				1
-	#define RTL8821B_SUPPORT				0
-	#define RTL8821C_SUPPORT				0
 
 	#define RATE_ADAPTIVE_SUPPORT			0
 	#define POWER_TRAINING_ACTIVE			0
@@ -193,6 +209,8 @@ enum rt_spinlock_type {
 	#define sta_info	rtl_sta_info
 	#define	boolean		bool
 
+	#define	phydm_timer_list	timer_list
+
 #elif (DM_ODM_SUPPORT_TYPE == ODM_CE)
 	#include <drv_types.h>
 
@@ -209,15 +227,15 @@ enum rt_spinlock_type {
 
 	#if defined(CONFIG_LITTLE_ENDIAN)
 		#define	ODM_ENDIAN_TYPE			ODM_ENDIAN_LITTLE
-	#elif defined (CONFIG_BIG_ENDIAN)
+	#elif defined(CONFIG_BIG_ENDIAN)
 		#define	ODM_ENDIAN_TYPE			ODM_ENDIAN_BIG
 	#endif
 
 	#define	boolean	bool
 
-	#define SET_TX_DESC_ANTSEL_A_88E(__ptx_desc, __value) SET_BITS_TO_LE_4BYTE(__ptx_desc+8, 24, 1, __value)
-	#define SET_TX_DESC_ANTSEL_B_88E(__ptx_desc, __value) SET_BITS_TO_LE_4BYTE(__ptx_desc+8, 25, 1, __value)
-	#define SET_TX_DESC_ANTSEL_C_88E(__ptx_desc, __value) SET_BITS_TO_LE_4BYTE(__ptx_desc+28, 29, 1, __value)
+	#define SET_TX_DESC_ANTSEL_A_88E(__ptx_desc, __value) SET_BITS_TO_LE_4BYTE(__ptx_desc + 8, 24, 1, __value)
+	#define SET_TX_DESC_ANTSEL_B_88E(__ptx_desc, __value) SET_BITS_TO_LE_4BYTE(__ptx_desc + 8, 25, 1, __value)
+	#define SET_TX_DESC_ANTSEL_C_88E(__ptx_desc, __value) SET_BITS_TO_LE_4BYTE(__ptx_desc + 28, 29, 1, __value)
 
 	/* define useless flag to avoid compile warning */
 	#define	USE_WORKITEM 0
@@ -230,9 +248,57 @@ enum rt_spinlock_type {
 	#else
 		#define	PHYDM_TESTCHIP_SUPPORT 0
 	#endif
+
+	#define	phydm_timer_list	rtw_timer_list
+
+#elif (DM_ODM_SUPPORT_TYPE == ODM_IOT)
+	#define	boolean	bool
+	#define true	_TRUE
+	#define false	_FALSE
+
+	// for power limit table
+	enum odm_pw_lmt_regulation_type {
+		PW_LMT_REGU_NULL = 0,
+		PW_LMT_REGU_FCC = 1,
+		PW_LMT_REGU_ETSI = 2,
+		PW_LMT_REGU_MKK = 3,
+		PW_LMT_REGU_WW13 = 4
+	};
+
+	enum odm_pw_lmt_band_type {
+		PW_LMT_BAND_NULL = 0,
+		PW_LMT_BAND_2_4G = 1,
+		PW_LMT_BAND_5G = 2
+	};
+
+	enum odm_pw_lmt_bandwidth_type {
+		PW_LMT_BW_NULL = 0,
+		PW_LMT_BW_20M = 1,
+		PW_LMT_BW_40M = 2,
+		PW_LMT_BW_80M = 3
+	};
+
+	enum odm_pw_lmt_ratesection_type {
+		PW_LMT_RS_NULL = 0,
+		PW_LMT_RS_CCK = 1,
+		PW_LMT_RS_OFDM = 2,
+		PW_LMT_RS_HT = 3,
+		PW_LMT_RS_VHT = 4
+	};
+
+	enum odm_pw_lmt_rfpath_type {
+		PW_LMT_PH_NULL = 0,
+		PW_LMT_PH_1T = 1,
+		PW_LMT_PH_2T = 2,
+		PW_LMT_PH_3T = 3,
+		PW_LMT_PH_4T = 4
+	};
+
+	#define	phydm_timer_list	timer_list
+
 #endif
 
-#define READ_NEXT_PAIR(v1, v2, i) do { if (i+2 >= array_len) break; i += 2; v1 = array[i]; v2 = array[i+1]; } while (0)
+#define READ_NEXT_PAIR(v1, v2, i) do { if (i + 2 >= array_len) break; i += 2; v1 = array[i]; v2 = array[i + 1]; } while (0)
 #define COND_ELSE  2
 #define COND_ENDIF 3
 
@@ -243,18 +309,22 @@ enum rt_spinlock_type {
 #define	MASKHWORD		0xffff0000
 #define	MASKLWORD		0x0000ffff
 #define	MASKDWORD		0xffffffff
+
 #define	MASK7BITS		0x7f
 #define	MASK12BITS		0xfff
 #define	MASKH4BITS		0xf0000000
 #define	MASK20BITS		0xfffff
+#define	MASK24BITS		0xffffff
 #define	MASKOFDM_D		0xffc00000
 #define	MASKCCK			0x3f3f3f3f
-#define RFREGOFFSETMASK	0xfffff
+
+#define RFREGOFFSETMASK		0xfffff
+#define RFREG_MASK		0xfffff
+
 #define MASKH3BYTES		0xffffff00
 #define MASKL3BYTES		0x00ffffff
-#define MASKBYTE2HIGHNIBBLE		0x00f00000
-#define MASKBYTE3LOWNIBBLE		0x0f000000
-#define	MASKL3BYTES			0x00ffffff
-#define RFREGOFFSETMASK	0xfffff
+#define MASKBYTE2HIGHNIBBLE	0x00f00000
+#define MASKBYTE3LOWNIBBLE	0x0f000000
+#define	MASKL3BYTES		0x00ffffff
 
 #endif /* __ODM_TYPES_H__ */
diff --git a/rtl8723DS/hal/phydm/rtl8723d/hal8723dreg.h b/rtl8723DS/hal/phydm/rtl8723d/hal8723dreg.h
index 11e8a64..437fb4a 100755..100644
--- a/rtl8723DS/hal/phydm/rtl8723d/hal8723dreg.h
+++ b/rtl8723DS/hal/phydm/rtl8723d/hal8723dreg.h
@@ -32,306 +32,306 @@
 #ifndef __INC_HAL8723DREG_H
 #define __INC_HAL8723DREG_H
 
-
-
-/* ************************************************************
+/*************************************************************
  *
- * ************************************************************ */
+ ************************************************************/
 
 /* -----------------------------------------------------
  *
  *	0x0000h ~ 0x00FFh	System Configuration
  *
- * ----------------------------------------------------- */
-#define REG_SYS_ISO_CTRL_8723D			0x0000	/* 2 Byte */
-#define REG_SYS_FUNC_EN_8723D			0x0002	/* 2 Byte */
-#define REG_SYS_PW_CTRL_8723D			0x0004	/* 4 Byte */
-#define REG_SYS_CLKR_8723D				0x0008	/* 2 Byte */
-#define REG_SYS_EEPROM_CTRL_8723D		0x000A	/* 2 Byte */
-#define REG_EE_VPD_8723D				0x000C	/* 2 Byte */
-#define REG_SYS_SWR_CTRL1_8723D			0x0010	/* 1 Byte */
-#define REG_SYS_SWR_CTRL2_8723D			0x0014	/* 1 Byte */
-#define REG_SYS_SWR_CTRL3_8723D			0x0018	/* 4 Byte */
-#define REG_RSV_CTRL_8723D				0x001C	/* 3 Byte */
-#define REG_RF_CTRL_8723D				0x001F	/* 1 Byte */
-#define REG_AFE_CTRL1_8723D				0x0024	/* 4 Byte */
-#define REG_AFE_CTRL2_8723D				0x0028	/* 4 Byte */
-#define REG_AFE_CTRL3_8723D				0x002c	/* 4 Byte */
-#define REG_EFUSE_CTRL_8723D			0x0030
-#define REG_LDO_EFUSE_CTRL_8723D		0x0034
-#define REG_PWR_DATA_8723D				0x0038
-#define REG_CAL_TIMER_8723D				0x003C
-#define REG_ACLK_MON_8723D				0x003E
-#define REG_GPIO_MUXCFG_8723D			0x0040
-#define REG_GPIO_IO_SEL_8723D			0x0042
-#define REG_MAC_PINMUX_CFG_8723D		0x0043 /* ?????? */
-#define REG_GPIO_PIN_CTRL_8723D			0x0044
-#define REG_GPIO_INTM_8723D				0x0048
-#define BIT_REG_LED_CFG_8723D			0x004C
-#define REG_LEDCFG2_8723D				0x004E /* ?????? */
-#define REG_FSIMR_8723D					0x0050
-#define REG_FSISR_8723D					0x0054
-#define REG_HSIMR_8723D					0x0058
-#define REG_HSISR_8723D					0x005c
-#define REG_GPIO_EXT_CTRL_8723D			0x0060
-#define REG_MULTI_FUNC_CTRL_8723D		0x0068
-#define REG_GPIO_STATUS_8723D			0x006C
-#define REG_SDIO_CTRL_8723D				0x0070
-#define REG_HCI_OPT_CTRL_8723D			0x0074
-#define REG_AFE_CTRL4_8723D				0x0078
-#define REG_LDO_SWR_CTRL_8723D			0x007C
-#define REG_8051FW_CTRL_8723D			0x0080
-#define REG_FW_DBG_STATUS_8723D			0x0088
-#define REG_FW_DBG_CTRL_8723D			0x008F
-#define REG_WLLPS_CTRL_8723D			0x0090
-#define REG_HIMR0_8723D					0x00B0
-#define REG_HISR0_8723D					0x00B4
-#define REG_HIMR1_8723D					0x00B8
-#define REG_HISR1_8723D					0x00BC
-#define REG_PMC_DBG_CTRL2_8723D         0x00CC
-#define	REG_EFUSE_BURN_GNT_8723D		0x00CF
-#define REG_XTAL_AAC_8723D				0x00EC
-#define REG_SYS_CFG1_8723D				0x00F0
-#define REG_SYS_CFG2_8723D				0x00FC
-#define REG_ROM_VERSION					0x00FD
+ * -----------------------------------------------------
+ */
+#define REG_SYS_ISO_CTRL_8723D 0x0000 /* 2 Byte */
+#define REG_SYS_FUNC_EN_8723D 0x0002 /* 2 Byte */
+#define REG_SYS_PW_CTRL_8723D 0x0004 /* 4 Byte */
+#define REG_SYS_CLKR_8723D 0x0008 /* 2 Byte */
+#define REG_SYS_EEPROM_CTRL_8723D 0x000A /* 2 Byte */
+#define REG_EE_VPD_8723D 0x000C /* 2 Byte */
+#define REG_SYS_SWR_CTRL1_8723D 0x0010 /* 1 Byte */
+#define REG_SYS_SWR_CTRL2_8723D 0x0014 /* 1 Byte */
+#define REG_SYS_SWR_CTRL3_8723D 0x0018 /* 4 Byte */
+#define REG_RSV_CTRL_8723D 0x001C /* 3 Byte */
+#define REG_RF_CTRL_8723D 0x001F /* 1 Byte */
+#define REG_AFE_CTRL1_8723D 0x0024 /* 4 Byte */
+#define REG_AFE_CTRL2_8723D 0x0028 /* 4 Byte */
+#define REG_AFE_CTRL3_8723D 0x002c /* 4 Byte */
+#define REG_EFUSE_CTRL_8723D 0x0030
+#define REG_LDO_EFUSE_CTRL_8723D 0x0034
+#define REG_PWR_DATA_8723D 0x0038
+#define REG_CAL_TIMER_8723D 0x003C
+#define REG_ACLK_MON_8723D 0x003E
+#define REG_GPIO_MUXCFG_8723D 0x0040
+#define REG_GPIO_IO_SEL_8723D 0x0042
+#define REG_MAC_PINMUX_CFG_8723D 0x0043 /* ?????? */
+#define REG_GPIO_PIN_CTRL_8723D 0x0044
+#define REG_GPIO_INTM_8723D 0x0048
+#define BIT_REG_LED_CFG_8723D 0x004C
+#define REG_LEDCFG2_8723D 0x004E /* ?????? */
+#define REG_FSIMR_8723D 0x0050
+#define REG_FSISR_8723D 0x0054
+#define REG_HSIMR_8723D 0x0058
+#define REG_HSISR_8723D 0x005c
+#define REG_GPIO_EXT_CTRL_8723D 0x0060
+#define REG_MULTI_FUNC_CTRL_8723D 0x0068
+#define REG_GPIO_STATUS_8723D 0x006C
+#define REG_SDIO_CTRL_8723D 0x0070
+#define REG_HCI_OPT_CTRL_8723D 0x0074
+#define REG_AFE_CTRL4_8723D 0x0078
+#define REG_LDO_SWR_CTRL_8723D 0x007C
+#define REG_8051FW_CTRL_8723D 0x0080
+#define REG_FW_DBG_STATUS_8723D 0x0088
+#define REG_FW_DBG_CTRL_8723D 0x008F
+#define REG_WLLPS_CTRL_8723D 0x0090
+#define REG_HIMR0_8723D 0x00B0
+#define REG_HISR0_8723D 0x00B4
+#define REG_HIMR1_8723D 0x00B8
+#define REG_HISR1_8723D 0x00BC
+#define REG_PMC_DBG_CTRL2_8723D 0x00CC
+#define REG_EFUSE_BURN_GNT_8723D 0x00CF
+#define REG_XTAL_AAC_8723D 0x00EC
+#define REG_SYS_CFG1_8723D 0x00F0
+#define REG_SYS_CFG2_8723D 0x00FC
+#define REG_ROM_VERSION 0x00FD
 
 /* -----------------------------------------------------
  *
  *	0x0100h ~ 0x01FFh	MACTOP General Configuration
  *
- * ----------------------------------------------------- */
-#define REG_CR_8723D					0x0100
-#define REG_PBP_8723D					0x0104 /* ?????? */
-#define REG_PKT_BUFF_ACCESS_CTRL_8723D	0x0106 /* ?????? */
-#define REG_TRXDMA_CTRL_8723D			0x010C
-#define REG_TRXFF_BNDY_8723D			0x0114
-#define REG_RXFF_PTR_8723D				0x011C
-#define REG_CPWM_8723D					0x012C
-#define REG_FWIMR_8723D					0x0130
-#define REG_FWISR_8723D					0x0134
-#define REG_FTIMR_8723D					0x0138
-#define REG_PKTBUF_DBG_CTRL_8723D		0x0140
-#define REG_RXPKTBUF_CTRL_8723D			0x0142 /* ?????? */
-#define REG_PKTBUF_DBG_DATA_L_8723D		0x0144
-#define REG_PKTBUF_DBG_DATA_H_8723D		0x0148
-
-#define REG_TC0_CTRL_8723D				0x0150
-#define REG_TC1_CTRL_8723D				0x0154
-#define REG_TC2_CTRL_8723D				0x0158
-#define REG_TC3_CTRL_8723D				0x015C
-#define REG_TC4_CTRL_8723D				0x0160
-#define REG_TCUNIT_BASE_8723D			0x0164
-#define REG_RSVD3_8723D				0x0168 /* ????? */
-
-#define REG_C2HEVT_MSG_NORMAL_8723D		0x01A0 /* ?????? */
-#define REG_C2HEVT_CMD_SEQ_88XX			0x01A1 /* ?????? */
-#define reg_c2h_evt_cmd_content_88xx		0x01A2 /* ?????? */
-#define REG_C2HEVT_CMD_LEN_88XX			0x01AE /* ?????? */
-#define REG_C2HEVT_CLEAR_8723D			0x01AF /* ?????? */
-#define REG_MCUTST_1_8723D				0x01C0
-#define REG_MCUTST_2_8723D				0x01C4
-#define REG_MCUTST_WOWLAN_8723D			0x01C7 /* ?????? */
-#define REG_FMETHR_8723D				0x01C8
-#define REG_HMETFR_8723D				0x01CC
-#define REG_HMEBOX_0_8723D				0x01D0
-#define REG_HMEBOX_1_8723D				0x01D4
-#define REG_HMEBOX_2_8723D				0x01D8
-#define REG_HMEBOX_3_8723D				0x01DC
-#define REG_LLT_INIT_8723D				0x01E0
-#define REG_HMEBOX_EXT0_8723D			0x01F0 /* ?????? */
-#define REG_HMEBOX_EXT1_8723D			0x01F4 /* ?????? */
-#define REG_HMEBOX_EXT2_8723D			0x01F8 /* ?????? */
-#define REG_HMEBOX_EXT3_8723D			0x01FC /* ?????? */
+ * -----------------------------------------------------
+ */
+#define REG_CR_8723D 0x0100
+#define REG_PBP_8723D 0x0104 /* ?????? */
+#define REG_PKT_BUFF_ACCESS_CTRL_8723D 0x0106 /* ?????? */
+#define REG_TRXDMA_CTRL_8723D 0x010C
+#define REG_TRXFF_BNDY_8723D 0x0114
+#define REG_RXFF_PTR_8723D 0x011C
+#define REG_CPWM_8723D 0x012C
+#define REG_FWIMR_8723D 0x0130
+#define REG_FWISR_8723D 0x0134
+#define REG_FTIMR_8723D 0x0138
+#define REG_PKTBUF_DBG_CTRL_8723D 0x0140
+#define REG_RXPKTBUF_CTRL_8723D 0x0142 /* ?????? */
+#define REG_PKTBUF_DBG_DATA_L_8723D 0x0144
+#define REG_PKTBUF_DBG_DATA_H_8723D 0x0148
+
+#define REG_TC0_CTRL_8723D 0x0150
+#define REG_TC1_CTRL_8723D 0x0154
+#define REG_TC2_CTRL_8723D 0x0158
+#define REG_TC3_CTRL_8723D 0x015C
+#define REG_TC4_CTRL_8723D 0x0160
+#define REG_TCUNIT_BASE_8723D 0x0164
+#define REG_RSVD3_8723D 0x0168 /* ????? */
+
+#define REG_C2HEVT_MSG_NORMAL_8723D 0x01A0 /* ?????? */
+#define REG_C2HEVT_CMD_SEQ_88XX 0x01A1 /* ?????? */
+#define reg_c2h_evt_cmd_content_88xx 0x01A2 /* ?????? */
+#define REG_C2HEVT_CMD_LEN_88XX 0x01AE /* ?????? */
+#define REG_C2HEVT_CLEAR_8723D 0x01AF /* ?????? */
+#define REG_MCUTST_1_8723D 0x01C0
+#define REG_MCUTST_2_8723D 0x01C4
+#define REG_MCUTST_WOWLAN_8723D 0x01C7 /* ?????? */
+#define REG_FMETHR_8723D 0x01C8
+#define REG_HMETFR_8723D 0x01CC
+#define REG_HMEBOX_0_8723D 0x01D0
+#define REG_HMEBOX_1_8723D 0x01D4
+#define REG_HMEBOX_2_8723D 0x01D8
+#define REG_HMEBOX_3_8723D 0x01DC
+#define REG_LLT_INIT_8723D 0x01E0
+#define REG_HMEBOX_EXT0_8723D 0x01F0 /* ?????? */
+#define REG_HMEBOX_EXT1_8723D 0x01F4 /* ?????? */
+#define REG_HMEBOX_EXT2_8723D 0x01F8 /* ?????? */
+#define REG_HMEBOX_EXT3_8723D 0x01FC /* ?????? */
 
 /* -----------------------------------------------------
  *
  *	0x0200h ~ 0x027Fh	TXDMA Configuration
  *
- * ----------------------------------------------------- */
-#define REG_RQPN_8723D					0x0200
-#define REG_FIFOPAGE_8723D				0x0204
-#define REG_TDECTRL_8723D			0x0208
-#define REG_TXDMA_OFFSET_CHK_8723D		0x020C
-#define REG_TXDMA_STATUS_8723D			0x0210
-#define REG_RQPN_NPQ_8723D				0x0214
-#define REG_AUTO_LLT_8723D				0x0224
-#define REG_DWBCN1_CTRL_8723D			0x0228
-
+ * -----------------------------------------------------
+ */
+#define REG_RQPN_8723D 0x0200
+#define REG_FIFOPAGE_8723D 0x0204
+#define REG_TDECTRL_8723D 0x0208
+#define REG_TXDMA_OFFSET_CHK_8723D 0x020C
+#define REG_TXDMA_STATUS_8723D 0x0210
+#define REG_RQPN_NPQ_8723D 0x0214
+#define REG_AUTO_LLT_8723D 0x0224
+#define REG_DWBCN1_CTRL_8723D 0x0228
 
 /* -----------------------------------------------------
  *
  *	0x0280h ~ 0x02FFh	RXDMA Configuration
  *
- * ----------------------------------------------------- */
-#define REG_RXDMA_AGG_PG_TH_8723D		0x0280
-#define REG_RXPKT_NUM_8723D				0x0284 /* The number of packets in RXPKTBUF. */
-#define REG_RXDMA_CONTROL_8723D			0x0286 /* ?????? Control the RX DMA. */
-#define REG_RXDMA_STATUS_8723D			0x0288
-#define REG_RXDMA_PRO_8723D				0x0290 /* ?????? */
-#define REG_EARLY_MODE_CONTROL_8723D	0x02BC /* ?????? */
-#define REG_RSVD5_8723D					0x02F0 /* ?????? */
-
+ * -----------------------------------------------------
+ */
+#define REG_RXDMA_AGG_PG_TH_8723D 0x0280
+#define REG_RXPKT_NUM_8723D 0x0284 /* The number of packets in RXPKTBUF. */
+#define REG_RXDMA_CONTROL_8723D 0x0286 /* ?????? Control the RX DMA. */
+#define REG_RXDMA_STATUS_8723D 0x0288
+#define REG_RXDMA_PRO_8723D 0x0290 /* ?????? */
+#define REG_EARLY_MODE_CONTROL_8723D 0x02BC /* ?????? */
+#define REG_RSVD5_8723D 0x02F0 /* ?????? */
 
 /* -----------------------------------------------------
  *
  *	0x0300h ~ 0x03FFh	PCIe
  *
- * ----------------------------------------------------- */
-#define	REG_PCIE_CTRL_REG_8723D			0x0300
-#define	REG_INT_MIG_8723D				0x0304	/* Interrupt Migration */
-#define	REG_BCNQ_TXBD_DESA_8723D		0x0308	/* TX Beacon Descriptor Address */
-#define	REG_MGQ_TXBD_DESA_8723D			0x0310	/* TX Manage Queue Descriptor Address */
-#define	REG_VOQ_TXBD_DESA_8723D			0x0318	/* TX VO Queue Descriptor Address */
-#define	REG_VIQ_TXBD_DESA_8723D			0x0320	/* TX VI Queue Descriptor Address */
-#define	REG_BEQ_TXBD_DESA_8723D			0x0328	/* TX BE Queue Descriptor Address */
-#define	REG_BKQ_TXBD_DESA_8723D			0x0330	/* TX BK Queue Descriptor Address */
-#define	REG_RXQ_RXBD_DESA_8723D			0x0338	/* RX Queue	Descriptor Address */
-#define REG_HI0Q_TXBD_DESA_8723D		0x0340
-#define REG_HI1Q_TXBD_DESA_8723D		0x0348
-#define REG_HI2Q_TXBD_DESA_8723D		0x0350
-#define REG_HI3Q_TXBD_DESA_8723D		0x0358
-#define REG_HI4Q_TXBD_DESA_8723D		0x0360
-#define REG_HI5Q_TXBD_DESA_8723D		0x0368
-#define REG_HI6Q_TXBD_DESA_8723D		0x0370
-#define REG_HI7Q_TXBD_DESA_8723D		0x0378
-#define	REG_MGQ_TXBD_NUM_8723D			0x0380
-#define	REG_RX_RXBD_NUM_8723D			0x0382
-#define	REG_VOQ_TXBD_NUM_8723D			0x0384
-#define	REG_VIQ_TXBD_NUM_8723D			0x0386
-#define	REG_BEQ_TXBD_NUM_8723D			0x0388
-#define	REG_BKQ_TXBD_NUM_8723D			0x038A
-#define	REG_HI0Q_TXBD_NUM_8723D			0x038C
-#define	REG_HI1Q_TXBD_NUM_8723D			0x038E
-#define	REG_HI2Q_TXBD_NUM_8723D			0x0390
-#define	REG_HI3Q_TXBD_NUM_8723D			0x0392
-#define	REG_HI4Q_TXBD_NUM_8723D			0x0394
-#define	REG_HI5Q_TXBD_NUM_8723D			0x0396
-#define	REG_HI6Q_TXBD_NUM_8723D			0x0398
-#define	REG_HI7Q_TXBD_NUM_8723D			0x039A
-#define	REG_TSFTIMER_HCI_8723D			0x039C
+ * -----------------------------------------------------
+ */
+#define REG_PCIE_CTRL_REG_8723D 0x0300
+#define REG_INT_MIG_8723D 0x0304 /* Interrupt Migration */
+#define REG_BCNQ_TXBD_DESA_8723D 0x0308 /* TX Beacon Descriptor Address */
+#define REG_MGQ_TXBD_DESA_8723D 0x0310 /* TX Manage Queue Descriptor Address */
+#define REG_VOQ_TXBD_DESA_8723D 0x0318 /* TX VO Queue Descriptor Address */
+#define REG_VIQ_TXBD_DESA_8723D 0x0320 /* TX VI Queue Descriptor Address */
+#define REG_BEQ_TXBD_DESA_8723D 0x0328 /* TX BE Queue Descriptor Address */
+#define REG_BKQ_TXBD_DESA_8723D 0x0330 /* TX BK Queue Descriptor Address */
+#define REG_RXQ_RXBD_DESA_8723D 0x0338 /* RX Queue	Descriptor Address */
+#define REG_HI0Q_TXBD_DESA_8723D 0x0340
+#define REG_HI1Q_TXBD_DESA_8723D 0x0348
+#define REG_HI2Q_TXBD_DESA_8723D 0x0350
+#define REG_HI3Q_TXBD_DESA_8723D 0x0358
+#define REG_HI4Q_TXBD_DESA_8723D 0x0360
+#define REG_HI5Q_TXBD_DESA_8723D 0x0368
+#define REG_HI6Q_TXBD_DESA_8723D 0x0370
+#define REG_HI7Q_TXBD_DESA_8723D 0x0378
+#define REG_MGQ_TXBD_NUM_8723D 0x0380
+#define REG_RX_RXBD_NUM_8723D 0x0382
+#define REG_VOQ_TXBD_NUM_8723D 0x0384
+#define REG_VIQ_TXBD_NUM_8723D 0x0386
+#define REG_BEQ_TXBD_NUM_8723D 0x0388
+#define REG_BKQ_TXBD_NUM_8723D 0x038A
+#define REG_HI0Q_TXBD_NUM_8723D 0x038C
+#define REG_HI1Q_TXBD_NUM_8723D 0x038E
+#define REG_HI2Q_TXBD_NUM_8723D 0x0390
+#define REG_HI3Q_TXBD_NUM_8723D 0x0392
+#define REG_HI4Q_TXBD_NUM_8723D 0x0394
+#define REG_HI5Q_TXBD_NUM_8723D 0x0396
+#define REG_HI6Q_TXBD_NUM_8723D 0x0398
+#define REG_HI7Q_TXBD_NUM_8723D 0x039A
+#define REG_TSFTIMER_HCI_8723D 0x039C
 
 /* Read Write Point */
-#define	REG_VOQ_TXBD_IDX_8723D			0x03A0
-#define	REG_VIQ_TXBD_IDX_8723D			0x03A4
-#define	REG_BEQ_TXBD_IDX_8723D			0x03A8
-#define	REG_BKQ_TXBD_IDX_8723D			0x03AC
-#define	REG_MGQ_TXBD_IDX_8723D			0x03B0
-#define	REG_RXQ_TXBD_IDX_8723D			0x03B4
-#define	REG_HI0Q_TXBD_IDX_8723D			0x03B8
-#define	REG_HI1Q_TXBD_IDX_8723D			0x03BC
-#define	REG_HI2Q_TXBD_IDX_8723D			0x03C0
-#define	REG_HI3Q_TXBD_IDX_8723D			0x03C4
-#define	REG_HI4Q_TXBD_IDX_8723D			0x03C8
-#define	REG_HI5Q_TXBD_IDX_8723D			0x03CC
-#define	REG_HI6Q_TXBD_IDX_8723D			0x03D0
-#define	REG_HI7Q_TXBD_IDX_8723D			0x03D4
-
-#define	REG_PCIE_HCPWM_8723DE			0x03D8 /* ?????? */
-#define	REG_PCIE_HRPWM_8723DE			0x03DC	/* PCIe RPWM */ /* ?????? */
-#define	REG_DBI_WDATA_V1_8723D			0x03E8
-#define	REG_DBI_RDATA_V1_8723D			0x03EC
-#define	REG_DBI_FLAG_V1_8723D			0x03F0
-#define REG_MDIO_V1_8723D				0x03F4
-#define REG_PCIE_MIX_CFG_8723D			0x03F8
-#define REG_HCI_MIX_CFG_8723D			0x03FC
+#define REG_VOQ_TXBD_IDX_8723D 0x03A0
+#define REG_VIQ_TXBD_IDX_8723D 0x03A4
+#define REG_BEQ_TXBD_IDX_8723D 0x03A8
+#define REG_BKQ_TXBD_IDX_8723D 0x03AC
+#define REG_MGQ_TXBD_IDX_8723D 0x03B0
+#define REG_RXQ_TXBD_IDX_8723D 0x03B4
+#define REG_HI0Q_TXBD_IDX_8723D 0x03B8
+#define REG_HI1Q_TXBD_IDX_8723D 0x03BC
+#define REG_HI2Q_TXBD_IDX_8723D 0x03C0
+#define REG_HI3Q_TXBD_IDX_8723D 0x03C4
+#define REG_HI4Q_TXBD_IDX_8723D 0x03C8
+#define REG_HI5Q_TXBD_IDX_8723D 0x03CC
+#define REG_HI6Q_TXBD_IDX_8723D 0x03D0
+#define REG_HI7Q_TXBD_IDX_8723D 0x03D4
+
+#define REG_PCIE_HCPWM_8723DE 0x03D8 /* ?????? */
+#define REG_PCIE_HRPWM_8723DE 0x03DC /* PCIe RPWM */ /* ?????? */
+#define REG_DBI_WDATA_V1_8723D 0x03E8
+#define REG_DBI_RDATA_V1_8723D 0x03EC
+#define REG_DBI_FLAG_V1_8723D 0x03F0
+#define REG_MDIO_V1_8723D 0x03F4
+#define REG_PCIE_MIX_CFG_8723D 0x03F8
+#define REG_HCI_MIX_CFG_8723D 0x03FC
 
 /* -----------------------------------------------------
  *
  *	0x0400h ~ 0x047Fh	Protocol Configuration
  *
- * ----------------------------------------------------- */
-#define REG_TXPKT_EMPTY_8723D				0x041A
-#define REG_PTCL_POLL_MGN_8723D				0x041F
-#define REG_FWHW_TXQ_CTRL_8723D				0x0420
-#define REG_HWSEQ_CTRL_8723D				0x0423
-#define REG_BCNQ_BDNY_8723D					0x0424
-#define REG_MGQ_BDNY_8723D					0x0425
-#define REG_LIFETIME_EN_8723D				0x0426
-#define REG_FW_FREE_TAIL_8723D				0x0427
-#define REG_SPEC_SIFS_8723D					0x0428
-#define REG_RETRY_LIMIT_8723D				0x042A
-#define REG_TXBF_CTRL_8723D					0x042C
-#define REG_DARFRC_8723D					0x0430
-#define REG_RARFRC_8723D					0x0438
-#define REG_RRSR_8723D						0x0440
-#define REG_ARFR0_8723D						0x0444
-#define REG_ARFR1_8723D						0x044C
-#define REG_CCK_CHECK_8723D					0x0454
-#define REG_BCNQ2_BDNY_8723D				0x0455
-#define REG_AMPDU_MAX_TIME_8723D			0x0456
-#define REG_BCNQ1_BDNY_8723D				0x0457
-#define REG_AMPDU_MAX_LENGTH_8723D			0x0458
-#define REG_WMAC_LBK_BUF_HD_8723D			0x045D
-#define REG_NDPA_OPT_CTRL_8723D				0x045F
-#define REG_FAST_EDCA_CTRL_8723D			0x0460
-#define REG_RD_RESP_PKT_TH_8723D			0x0463
-#define REG_DATA_SC_8723D					0x0483
-#define REG_TXRPT_START_OFFSET				0x04AC
-#define REG_POWER_STAGE1_8723D				0x04B4
-#define REG_PTCL_SDF_STATUS_8723D			0x04BB
-#define REG_SW_AMPDU_BURST_MODE_CTRL_8723D	0x04BC
-#define REG_EVTQ_BNDY_8723D					0x04BF
-#define REG_PKT_LIFE_TIME_8723D				0x04C0
-#define REG_PKT_BE_BK_LIFE_TIME_8723D		0x04C2 /* ?????? */
-
-#define REG_STBC_SETTING_8723D				0x04C4
-#define REG_HT_SINGLE_AMPDU_8723D			0x04C7
-#define REG_PROT_MODE_CTRL_8723D			0x04C8
-#define REG_MAX_AGGR_NUM_8723D				0x04CA
-#define REG_RTS_MAX_AGGR_NUM_8723D			0x04CB
-#define REG_BAR_MODE_CTRL_8723D				0x04CC
-#define REG_RA_TRY_RATE_AGG_LMT_8723D		0x04CF
-#define REG_MACID_SLEEP2_8723D				0x04D0
-#define REG_PTCL_HWSSN0_8723D				0x04D8
-#define REG_TXPKTBUF_WMAC_LBK_BF_HD_8723D	0x045D /* ?????? */
-
+ * -----------------------------------------------------
+ */
+#define REG_TXPKT_EMPTY_8723D 0x041A
+#define REG_PTCL_POLL_MGN_8723D 0x041F
+#define REG_FWHW_TXQ_CTRL_8723D 0x0420
+#define REG_HWSEQ_CTRL_8723D 0x0423
+#define REG_BCNQ_BDNY_8723D 0x0424
+#define REG_MGQ_BDNY_8723D 0x0425
+#define REG_LIFETIME_EN_8723D 0x0426
+#define REG_FW_FREE_TAIL_8723D 0x0427
+#define REG_SPEC_SIFS_8723D 0x0428
+#define REG_RETRY_LIMIT_8723D 0x042A
+#define REG_TXBF_CTRL_8723D 0x042C
+#define REG_DARFRC_8723D 0x0430
+#define REG_RARFRC_8723D 0x0438
+#define REG_RRSR_8723D 0x0440
+#define REG_ARFR0_8723D 0x0444
+#define REG_ARFR1_8723D 0x044C
+#define REG_CCK_CHECK_8723D 0x0454
+#define REG_BCNQ2_BDNY_8723D 0x0455
+#define REG_AMPDU_MAX_TIME_8723D 0x0456
+#define REG_BCNQ1_BDNY_8723D 0x0457
+#define REG_AMPDU_MAX_LENGTH_8723D 0x0458
+#define REG_WMAC_LBK_BUF_HD_8723D 0x045D
+#define REG_NDPA_OPT_CTRL_8723D 0x045F
+#define REG_FAST_EDCA_CTRL_8723D 0x0460
+#define REG_RD_RESP_PKT_TH_8723D 0x0463
+#define REG_DATA_SC_8723D 0x0483
+#define REG_TXRPT_START_OFFSET 0x04AC
+#define REG_POWER_STAGE1_8723D 0x04B4
+#define REG_PTCL_SDF_STATUS_8723D 0x04BB
+#define REG_SW_AMPDU_BURST_MODE_CTRL_8723D 0x04BC
+#define REG_EVTQ_BNDY_8723D 0x04BF
+#define REG_PKT_LIFE_TIME_8723D 0x04C0
+#define REG_PKT_BE_BK_LIFE_TIME_8723D 0x04C2 /* ?????? */
+
+#define REG_STBC_SETTING_8723D 0x04C4
+#define REG_HT_SINGLE_AMPDU_8723D 0x04C7
+#define REG_PROT_MODE_CTRL_8723D 0x04C8
+#define REG_MAX_AGGR_NUM_8723D 0x04CA
+#define REG_RTS_MAX_AGGR_NUM_8723D 0x04CB
+#define REG_BAR_MODE_CTRL_8723D 0x04CC
+#define REG_RA_TRY_RATE_AGG_LMT_8723D 0x04CF
+#define REG_MACID_SLEEP2_8723D 0x04D0
+#define REG_PTCL_HWSSN0_8723D 0x04D8
+#define REG_TXPKTBUF_WMAC_LBK_BF_HD_8723D 0x045D /* ?????? */
 
 /************* 0x1480~0x14A7 is for NAN ***************/
 /* Own Master Rank, 8Bytes */
-#define	REG_NAN_INTERFACE_ADDR_8723D		0x2480	/* 6 bytes */
-#define	REG_NAN_RANDOM_FACTOR_8723D			0x2486	/* 1 byte */
-#define	REG_NAN_MASTER_PREF_8723D			0x2487	/* 1 byte */
+#define REG_NAN_INTERFACE_ADDR_8723D 0x2480 /* 6 bytes */
+#define REG_NAN_RANDOM_FACTOR_8723D 0x2486 /* 1 byte */
+#define REG_NAN_MASTER_PREF_8723D 0x2487 /* 1 byte */
 
 /* 0x5dc[25:24] NAN role */
 
 /* Current Anchor Master Record */
-#define	REG_NAN_CAMR_L_8723D				0x2488	/* 4 bytes */
-#define	REG_NAN_CAMR_H_8723D				0x248C	/* 4 byte
- * #define REG_HOP_CNT_8723D					0x05DC */
-#define	REG_NAN_CAMR_AMBTT_8723D			0x2490	/* 4 bytes */
+#define REG_NAN_CAMR_L_8723D 0x2488 /* 4 bytes */
+#define REG_NAN_CAMR_H_8723D 0x248C /* 4 byte */
+#define REG_NAN_CAMR_AMBTT_8723D 0x2490 /* 4 bytes */
 
 /* Last Anchor Master Record */
-#define	REG_NAN_LAMR_L_8723D				0x2494	/* 4 bytes */
-#define	REG_NAN_LAMR_H_8723D				0x2498	/* 4 byte */
-#define	REG_NAN_LAMR_AMBTT_8723D			0x249C	/* 4 bytes */
+#define REG_NAN_LAMR_L_8723D 0x2494 /* 4 bytes */
+#define REG_NAN_LAMR_H_8723D 0x2498 /* 4 byte */
+#define REG_NAN_LAMR_AMBTT_8723D 0x249C /* 4 bytes */
 
 /* TSF Synced:bit 0
- * Anchor Master: bit 7 */
-#define REG_NAN_STATUS_8723D				0x24A0	/* BIT0
- ***************************************************/
-
+ * Anchor Master: bit 7
+ */
+#define REG_NAN_STATUS_8723D 0x24A0 /* BIT0 */
 
 /* -----------------------------------------------------
  *
  *	0x0500h ~ 0x05FFh	EDCA Configuration
  *
  * -----------------------------------------------------
- * gogogo */
-#define REG_EDCA_VO_PARAM_8723D			0x0500
-#define REG_EDCA_VI_PARAM_8723D			0x0504
-#define REG_EDCA_BE_PARAM_8723D			0x0508
-#define REG_EDCA_BK_PARAM_8723D			0x050C
-#define REG_BCNTCFG_8723D				0x0510
-#define REG_PIFS_8723D					0x0512
-#define REG_RDG_PIFS_8723D				0x0513
-#define REG_SIFS_CTX_8723D				0x0514
-#define REG_SIFS_TRX_8723D				0x0516
-#define REG_AGGR_BREAK_TIME_8723D		0x051A
-#define REG_SLOT_8723D					0x051B
-#define REG_TX_PTCL_CTRL_8723D			0x0520
-#define REG_TXPAUSE_8723D				0x0522
-#define REG_DIS_TXREQ_CLR_8723D			0x0523
-#define REG_RD_CTRL_8723D				0x0524
+ * gogogo
+ */
+#define REG_EDCA_VO_PARAM_8723D 0x0500
+#define REG_EDCA_VI_PARAM_8723D 0x0504
+#define REG_EDCA_BE_PARAM_8723D 0x0508
+#define REG_EDCA_BK_PARAM_8723D 0x050C
+#define REG_BCNTCFG_8723D 0x0510
+#define REG_PIFS_8723D 0x0512
+#define REG_RDG_PIFS_8723D 0x0513
+#define REG_SIFS_CTX_8723D 0x0514
+#define REG_SIFS_TRX_8723D 0x0516
+#define REG_AGGR_BREAK_TIME_8723D 0x051A
+#define REG_SLOT_8723D 0x051B
+#define REG_TX_PTCL_CTRL_8723D 0x0520
+#define REG_TXPAUSE_8723D 0x0522
+#define REG_DIS_TXREQ_CLR_8723D 0x0523
+#define REG_RD_CTRL_8723D 0x0524
 /*
  * Format for offset 540h-542h:
  *	[3:0]:   TBTT prohibit setup in unit of 32us. The time for HW getting beacon content before TBTT.
@@ -346,213 +346,216 @@
  * TBTT
  * Note: We cannot update beacon content to HW or send any AC packets during the time between Setup and Hold.
  * Described by Designer Tim and Bruce, 2011-01-14.
- *   */
-#define REG_TBTT_PROHIBIT_8723D			0x0540
-#define REG_RD_NAV_NXT_8723D			0x0544
-#define REG_NAV_PROT_LEN_8723D			0x0546
-#define REG_BCN_CTRL_8723D				0x0550
-#define REG_EDCA_BCNCTRL1_IOREG_8723D	0x0551
-#define REG_MBID_NUM_8723D				0x0552
-#define REG_DUAL_TSF_RST_8723D			0x0553
-#define REG_BCN_INTERVAL_8723D			0x0554
-#define REG_DRVERLYINT_8723D			0x0558
-#define REG_BCNDMATIM_8723D				0x0559
-#define REG_ATIMWND_8723D				0x055A
-#define REG_USTIME_TSF_8723D			0x055C
-#define REG_BCN_MAX_ERR_8723D			0x055D
-#define REG_RXTSF_OFFSET_CCK_8723D		0x055E
-#define REG_RXTSF_OFFSET_OFDM_8723D		0x055F
-#define REG_TSFTR_8723D					0x0560
-#define REG_CTWND_8723D					0x0572
-#define REG_SECONDARY_CCA_CTRL_8723D	0x0577 /* ?????? */
-#define	REG_TSFTR2_8723D				0x0578
-#define REG_PSTIMER_8723D				0x0580
-#define REG_TIMER0_8723D				0x0584
-#define REG_TIMER1_8723D				0x0588
-#define	REG_SCH_MULTI_BCN_8723D			0x05B2
-#define REG_SCH_CURRENT_BCN_8723D		0x05B3
-#define REG_ACMHWCTRL_8723D				0x05C0
-#define REG_SCH_SDFX_EARLY_8723D		0x05CF
-#define REG_SCH_PORT2_EARLY_8723D		0x05D0
-#define REG_SCH_TSFT_DIFF_8723D			0x05D2
-#define REG_EDCA_BCNCTRL2_IOREG_8723D	0x05D4
-#define REG_EDCA_DRVERLYINT1_IOREG_8723D	0x05D4
-#define REG_EDCA_BCNSPACE3_IOREG_8723D	0x05D8
-#define REG_EDCA_BCNSPACE4_IOREG_8723D	0x05DA
-#define REG_HOP_CNT_8723D				0x05DC
-#define REG_SCH_M_DW_8723D				0x05DD
-#define REG_SCH_M_SLOT_8723D			0x05DE
-#define REG_SCH_EARLY_DWEND_8723D		0x05DF
-#define REG_SCH_TXCMD_8723D				0x05F8
+ *
+ */
+#define REG_TBTT_PROHIBIT_8723D 0x0540
+#define REG_RD_NAV_NXT_8723D 0x0544
+#define REG_NAV_PROT_LEN_8723D 0x0546
+#define REG_BCN_CTRL_8723D 0x0550
+#define REG_EDCA_BCNCTRL1_IOREG_8723D 0x0551
+#define REG_MBID_NUM_8723D 0x0552
+#define REG_DUAL_TSF_RST_8723D 0x0553
+#define REG_BCN_INTERVAL_8723D 0x0554
+#define REG_DRVERLYINT_8723D 0x0558
+#define REG_BCNDMATIM_8723D 0x0559
+#define REG_ATIMWND_8723D 0x055A
+#define REG_USTIME_TSF_8723D 0x055C
+#define REG_BCN_MAX_ERR_8723D 0x055D
+#define REG_RXTSF_OFFSET_CCK_8723D 0x055E
+#define REG_RXTSF_OFFSET_OFDM_8723D 0x055F
+#define REG_TSFTR_8723D 0x0560
+#define REG_CTWND_8723D 0x0572
+#define REG_SECONDARY_CCA_CTRL_8723D 0x0577 /* ?????? */
+#define REG_TSFTR2_8723D 0x0578
+#define REG_PSTIMER_8723D 0x0580
+#define REG_TIMER0_8723D 0x0584
+#define REG_TIMER1_8723D 0x0588
+#define REG_SCH_MULTI_BCN_8723D 0x05B2
+#define REG_SCH_CURRENT_BCN_8723D 0x05B3
+#define REG_ACMHWCTRL_8723D 0x05C0
+#define REG_SCH_SDFX_EARLY_8723D 0x05CF
+#define REG_SCH_PORT2_EARLY_8723D 0x05D0
+#define REG_SCH_TSFT_DIFF_8723D 0x05D2
+#define REG_EDCA_BCNCTRL2_IOREG_8723D 0x05D4
+#define REG_EDCA_DRVERLYINT1_IOREG_8723D 0x05D4
+#define REG_EDCA_BCNSPACE3_IOREG_8723D 0x05D8
+#define REG_EDCA_BCNSPACE4_IOREG_8723D 0x05DA
+#define REG_HOP_CNT_8723D 0x05DC
+#define REG_SCH_M_DW_8723D 0x05DD
+#define REG_SCH_M_SLOT_8723D 0x05DE
+#define REG_SCH_EARLY_DWEND_8723D 0x05DF
+#define REG_SCH_TXCMD_8723D 0x05F8
 
 /* -----------------------------------------------------
  *
  *	0x0600h ~ 0x07FFh	WMAC Configuration
  *
  * -----------------------------------------------------
- * gogogo */
-#define REG_MAC_CR_8723D				0x0600
-#define REG_TCR_8723D					0x0604
-#define REG_RCR_8723D					0x0608
-#define REG_RX_PKT_LIMIT_8723D			0x060C
-#define REG_RX_DLK_TIME_8723D			0x060D
-#define REG_RX_DRVINFO_SZ_8723D			0x060F
-
-#define REG_MACID_8723D					0x0610
-#define REG_BSSID_8723D					0x0618
-#define REG_MAR_8723D					0x0620
-#define REG_MBIDCAMCFG_8723D			0x0628
-
-#define REG_USTIME_EDCA_8723D			0x0638
-#define REG_MAC_SPEC_SIFS_8723D			0x063A
-#define REG_RESP_SIFP_CCK_8723D			0x063C
-#define REG_RESP_SIFS_OFDM_8723D		0x063E
-#define REG_ACKTO_8723D					0x0640
-#define REG_CTS2TO_8723D				0x0641
-#define REG_EIFS_8723D					0x0642
-
-#define REG_NAV_UPPER_8723D				0x0652	/* ?????? */
-#define REG_TRXPTCL_CTL_8723D			0x0668
+ * gogogo
+ */
+#define REG_MAC_CR_8723D 0x0600
+#define REG_TCR_8723D 0x0604
+#define REG_RCR_8723D 0x0608
+#define REG_RX_PKT_LIMIT_8723D 0x060C
+#define REG_RX_DLK_TIME_8723D 0x060D
+#define REG_RX_DRVINFO_SZ_8723D 0x060F
+
+#define REG_MACID_8723D 0x0610
+#define REG_BSSID_8723D 0x0618
+#define REG_MAR_8723D 0x0620
+#define REG_MBIDCAMCFG_8723D 0x0628
+
+#define REG_USTIME_EDCA_8723D 0x0638
+#define REG_MAC_SPEC_SIFS_8723D 0x063A
+#define REG_RESP_SIFP_CCK_8723D 0x063C
+#define REG_RESP_SIFS_OFDM_8723D 0x063E
+#define REG_ACKTO_8723D 0x0640
+#define REG_CTS2TO_8723D 0x0641
+#define REG_EIFS_8723D 0x0642
+
+#define REG_NAV_UPPER_8723D 0x0652 /* ?????? */
+#define REG_TRXPTCL_CTL_8723D 0x0668
 
 /* security */
-#define REG_CAMCMD_8723D				0x0670
-#define REG_CAMWRITE_8723D				0x0674
-#define REG_CAMREAD_8723D				0x0678
-#define REG_CAMDBG_8723D				0x067C
-#define REG_SECCFG_8723D				0x0680
+#define REG_CAMCMD_8723D 0x0670
+#define REG_CAMWRITE_8723D 0x0674
+#define REG_CAMREAD_8723D 0x0678
+#define REG_CAMDBG_8723D 0x067C
+#define REG_SECCFG_8723D 0x0680
 
 /* Power */
-#define REG_WOW_CTRL_8723D				0x0690
-#define REG_PS_RX_INFO_8723D			0x0692
-#define REG_UAPSD_TID_8723D				0x0693
-#define REG_WKFMCAM_NUM_8723D			0x0698
-#define REG_RXFLTMAP0_8723D				0x06A0
-#define REG_RXFLTMAP1_8723D				0x06A2
-#define REG_RXFLTMAP2_8723D				0x06A4
-#define REG_BCN_PSR_RPT_8723D			0x06A8
-#define REG_BT_COEX_TABLE_8723D			0x06C0
-#define REG_ASSOCIATED_BFMER0_INFO_8723D	0x06E4
-#define REG_ASSOCIATED_BFMER1_INFO_8723D	0x06EC
-#define REG_CSI_RPT_PARAM_BW20_8723D	0x06F4
-#define REG_CSI_RPT_PARAM_BW40_8723D	0x06F8
-#define REG_CSI_RPT_PARAM_BW80_8723D	0x06FC
+#define REG_WOW_CTRL_8723D 0x0690
+#define REG_PS_RX_INFO_8723D 0x0692
+#define REG_UAPSD_TID_8723D 0x0693
+#define REG_WKFMCAM_NUM_8723D 0x0698
+#define REG_RXFLTMAP0_8723D 0x06A0
+#define REG_RXFLTMAP1_8723D 0x06A2
+#define REG_RXFLTMAP2_8723D 0x06A4
+#define REG_BCN_PSR_RPT_8723D 0x06A8
+#define REG_BT_COEX_TABLE_8723D 0x06C0
+#define REG_ASSOCIATED_BFMER0_INFO_8723D 0x06E4
+#define REG_ASSOCIATED_BFMER1_INFO_8723D 0x06EC
+#define REG_CSI_RPT_PARAM_BW20_8723D 0x06F4
+#define REG_CSI_RPT_PARAM_BW40_8723D 0x06F8
+#define REG_CSI_RPT_PARAM_BW80_8723D 0x06FC
 
 /* Hardware Port 2 */
-#define REG_MACID1_8723D				0x0700
-#define REG_BSSID1_8723D				0x0708
-#define REG_ASSOCIATED_BFMEE_SEL_8723D	0x0714
-#define REG_SND_PTCL_CTRL_8723D			0x0718
+#define REG_MACID1_8723D 0x0700
+#define REG_BSSID1_8723D 0x0708
+#define REG_ASSOCIATED_BFMEE_SEL_8723D 0x0714
+#define REG_SND_PTCL_CTRL_8723D 0x0718
 
 /* -----------------------------------------------------
  *
  *	Redifine 8192C register definition for compatibility
  *
- * ----------------------------------------------------- */
+ * -----------------------------------------------------
+ */
 
 /* TODO: use these definition when using REG_xxx naming rule.
- * NOTE: DO NOT Remove these definition. Use later. */
-#define	EFUSE_CTRL_8723D					REG_EFUSE_CTRL_8723D		/* E-Fuse Control. */
-#define	EFUSE_TEST_8723D					REG_LDO_EFUSE_CTRL_8723D		/* E-Fuse Test. */
-#define	MSR_8723D							(REG_CR_8723D + 2)		/* Media status register */
-#define	ISR_8723D							REG_HISR0_8723D
-#define	TSFR_8723D							REG_TSFTR_8723D			/* Timing Sync Function Timer Register. */
+ * NOTE: DO NOT Remove these definition. Use later.
+ */
+#define EFUSE_CTRL_8723D REG_EFUSE_CTRL_8723D /* E-Fuse Control. */
+#define EFUSE_TEST_8723D REG_LDO_EFUSE_CTRL_8723D /* E-Fuse Test. */
+#define MSR_8723D (REG_CR_8723D + 2) /* Media status register */
+#define ISR_8723D REG_HISR0_8723D
+#define TSFR_8723D REG_TSFTR_8723D /* Timing Sync Function Timer Register. */
 
 /* Redifine MACID register, to compatible prior ICs. */
-#define	IDR0_8723D							REG_MACID_8723D			/* MAC ID Register, Offset 0x0050-0x0053 */
-#define	IDR4_8723D							(REG_MACID_8723D + 4)	/* MAC ID Register, Offset 0x0054-0x0055 */
-
+#define IDR0_8723D REG_MACID_8723D /* MAC ID Register, Offset 0x0050-0x0053 */
+#define IDR4_8723D (REG_MACID_8723D + 4) /* MAC ID Register, Offset 0x0054-0x0055 */
 
 /*
  * 9. security Control Registers	(Offset: )
- *   */
-#define	RWCAM_8723D						REG_CAMCMD_8723D		/* 8190 data Sheet is called CAMcmd */
-#define	WCAMI_8723D						REG_CAMWRITE_8723D		/* Software write CAM input content */
-#define	RCAMO_8723D						REG_CAMREAD_8723D		/* Software read/write CAM config */
-#define	CAMDBG_8723D						REG_CAMDBG_8723D
-#define	SECR_8723D							REG_SECCFG_8723D		/* security Configuration Register */
-
+ *
+ */
+#define RWCAM_8723D REG_CAMCMD_8723D /* 8190 data Sheet is called CAMcmd */
+#define WCAMI_8723D REG_CAMWRITE_8723D /* Software write CAM input content */
+#define RCAMO_8723D REG_CAMREAD_8723D /* Software read/write CAM config */
+#define CAMDBG_8723D REG_CAMDBG_8723D
+#define SECR_8723D REG_SECCFG_8723D /* security Configuration Register */
 
 /* ----------------------------------------------------------------------------
  * 8195 IMR/ISR bits						(offset 0xB0,  8bits)
- * ---------------------------------------------------------------------------- */
-#define	IMR_DISABLED_8723D					0
+ * ----------------------------------------------------------------------------
+ */
+#define IMR_DISABLED_8723D 0
 /* IMR DW0(0x00B0-00B3) Bit 0-31 */
-#define	IMR_TIMER2_8723D					BIT(31)		/* Timeout interrupt 2 */
-#define	IMR_TIMER1_8723D					BIT(30)		/* Timeout interrupt 1 */
-#define	IMR_PSTIMEOUT_8723D				BIT(29)		/* Power Save Time Out Interrupt */
-#define	IMR_GTINT4_8723D					BIT(28)		/* When GTIMER4 expires, this bit is set to 1 */
-#define	IMR_GTINT3_8723D					BIT(27)		/* When GTIMER3 expires, this bit is set to 1 */
-#define	IMR_TXBCN0ERR_8723D				BIT(26)		/* Transmit Beacon0 Error */
-#define	IMR_TXBCN0OK_8723D				BIT(25)		/* Transmit Beacon0 OK */
-#define	IMR_TSF_BIT32_TOGGLE_8723D		BIT(24)		/* TSF Timer BIT32 toggle indication interrupt */
-#define	IMR_BCNDMAINT0_8723D				BIT(20)		/* Beacon DMA Interrupt 0 */
-#define	IMR_BCNDERR0_8723D				BIT(16)		/* Beacon Queue DMA OK0 */
-#define	IMR_HSISR_IND_ON_INT_8723D		BIT(15)		/* HSISR Indicator (HSIMR & HSISR is true, this bit is set to 1) */
-#define	IMR_BCNDMAINT_E_8723D			BIT(14)		/* Beacon DMA Interrupt Extension for Win7 */
-#define	IMR_ATIMEND_8723D				BIT(12)		/* CTWidnow End or ATIM Window End */
-#define	IMR_C2HCMD_8723D					BIT(10)		/* CPU to Host Command INT status, Write 1 clear */
-#define	IMR_CPWM2_8723D					BIT(9)			/* CPU power mode exchange INT status, Write 1 clear */
-#define	IMR_CPWM_8723D					BIT(8)			/* CPU power mode exchange INT status, Write 1 clear */
-#define	IMR_HIGHDOK_8723D				BIT(7)			/* High Queue DMA OK */
-#define	IMR_MGNTDOK_8723D				BIT(6)			/* Management Queue DMA OK */
-#define	IMR_BKDOK_8723D					BIT(5)			/* AC_BK DMA OK */
-#define	IMR_BEDOK_8723D					BIT(4)			/* AC_BE DMA OK */
-#define	IMR_VIDOK_8723D					BIT(3)			/* AC_VI DMA OK */
-#define	IMR_VODOK_8723D					BIT(2)			/* AC_VO DMA OK */
-#define	IMR_RDU_8723D					BIT(1)			/* Rx Descriptor Unavailable */
-#define	IMR_ROK_8723D					BIT(0)			/* Receive DMA OK */
+#define IMR_TIMER2_8723D BIT(31) /* Timeout interrupt 2 */
+#define IMR_TIMER1_8723D BIT(30) /* Timeout interrupt 1 */
+#define IMR_PSTIMEOUT_8723D BIT(29) /* Power Save Time Out Interrupt */
+#define IMR_GTINT4_8723D BIT(28) /* When GTIMER4 expires, this bit is set to 1 */
+#define IMR_GTINT3_8723D BIT(27) /* When GTIMER3 expires, this bit is set to 1 */
+#define IMR_TXBCN0ERR_8723D BIT(26) /* Transmit Beacon0 Error */
+#define IMR_TXBCN0OK_8723D BIT(25) /* Transmit Beacon0 OK */
+#define IMR_TSF_BIT32_TOGGLE_8723D BIT(24) /* TSF Timer BIT32 toggle indication interrupt */
+#define IMR_BCNDMAINT0_8723D BIT(20) /* Beacon DMA Interrupt 0 */
+#define IMR_BCNDERR0_8723D BIT(16) /* Beacon Queue DMA OK0 */
+#define IMR_HSISR_IND_ON_INT_8723D BIT(15) /* HSISR Indicator (HSIMR & HSISR is true, this bit is set to 1) */
+#define IMR_BCNDMAINT_E_8723D BIT(14) /* Beacon DMA Interrupt Extension for Win7 */
+#define IMR_ATIMEND_8723D BIT(12) /* CTWidnow End or ATIM Window End */
+#define IMR_C2HCMD_8723D BIT(10) /* CPU to Host Command INT status, Write 1 clear */
+#define IMR_CPWM2_8723D BIT(9) /* CPU power mode exchange INT status, Write 1 clear */
+#define IMR_CPWM_8723D BIT(8) /* CPU power mode exchange INT status, Write 1 clear */
+#define IMR_HIGHDOK_8723D BIT(7) /* High Queue DMA OK */
+#define IMR_MGNTDOK_8723D BIT(6) /* Management Queue DMA OK */
+#define IMR_BKDOK_8723D BIT(5) /* AC_BK DMA OK */
+#define IMR_BEDOK_8723D BIT(4) /* AC_BE DMA OK */
+#define IMR_VIDOK_8723D BIT(3) /* AC_VI DMA OK */
+#define IMR_VODOK_8723D BIT(2) /* AC_VO DMA OK */
+#define IMR_RDU_8723D BIT(1) /* Rx Descriptor Unavailable */
+#define IMR_ROK_8723D BIT(0) /* Receive DMA OK */
 
 /* IMR DW1(0x00B4-00B7) Bit 0-31 */
-#define	IMR_BCNDMAINT7_8723D				BIT(27)		/* Beacon DMA Interrupt 7 */
-#define	IMR_BCNDMAINT6_8723D				BIT(26)		/* Beacon DMA Interrupt 6 */
-#define	IMR_BCNDMAINT5_8723D				BIT(25)		/* Beacon DMA Interrupt 5 */
-#define	IMR_BCNDMAINT4_8723D				BIT(24)		/* Beacon DMA Interrupt 4 */
-#define	IMR_BCNDMAINT3_8723D				BIT(23)		/* Beacon DMA Interrupt 3 */
-#define	IMR_BCNDMAINT2_8723D				BIT(22)		/* Beacon DMA Interrupt 2 */
-#define	IMR_BCNDMAINT1_8723D				BIT(21)		/* Beacon DMA Interrupt 1 */
-#define	IMR_BCNDOK7_8723D					BIT(20)		/* Beacon Queue DMA OK Interrup 7 */
-#define	IMR_BCNDOK6_8723D					BIT(19)		/* Beacon Queue DMA OK Interrup 6 */
-#define	IMR_BCNDOK5_8723D					BIT(18)		/* Beacon Queue DMA OK Interrup 5 */
-#define	IMR_BCNDOK4_8723D					BIT(17)		/* Beacon Queue DMA OK Interrup 4 */
-#define	IMR_BCNDOK3_8723D					BIT(16)		/* Beacon Queue DMA OK Interrup 3 */
-#define	IMR_BCNDOK2_8723D					BIT(15)		/* Beacon Queue DMA OK Interrup 2 */
-#define	IMR_BCNDOK1_8723D					BIT(14)		/* Beacon Queue DMA OK Interrup 1 */
-#define	IMR_ATIMEND_E_8723D				BIT(13)		/* ATIM Window End Extension for Win7 */
-#define	IMR_TXERR_8723D					BIT(11)		/* Tx Error Flag Interrupt status, write 1 clear. */
-#define	IMR_RXERR_8723D					BIT(10)		/* Rx Error Flag INT status, Write 1 clear */
-#define	IMR_TXFOVW_8723D					BIT(9)			/* Transmit FIFO Overflow */
-#define	IMR_RXFOVW_8723D					BIT(8)			/* Receive FIFO Overflow */
-
-
-
-#define	IMR_MCUERR_8723D						BIT(28)		/* Beacon DMA Interrupt 7 */
-
+#define IMR_BCNDMAINT7_8723D BIT(27) /* Beacon DMA Interrupt 7 */
+#define IMR_BCNDMAINT6_8723D BIT(26) /* Beacon DMA Interrupt 6 */
+#define IMR_BCNDMAINT5_8723D BIT(25) /* Beacon DMA Interrupt 5 */
+#define IMR_BCNDMAINT4_8723D BIT(24) /* Beacon DMA Interrupt 4 */
+#define IMR_BCNDMAINT3_8723D BIT(23) /* Beacon DMA Interrupt 3 */
+#define IMR_BCNDMAINT2_8723D BIT(22) /* Beacon DMA Interrupt 2 */
+#define IMR_BCNDMAINT1_8723D BIT(21) /* Beacon DMA Interrupt 1 */
+#define IMR_BCNDOK7_8723D BIT(20) /* Beacon Queue DMA OK Interrupt 7 */
+#define IMR_BCNDOK6_8723D BIT(19) /* Beacon Queue DMA OK Interrupt 6 */
+#define IMR_BCNDOK5_8723D BIT(18) /* Beacon Queue DMA OK Interrupt 5 */
+#define IMR_BCNDOK4_8723D BIT(17) /* Beacon Queue DMA OK Interrupt 4 */
+#define IMR_BCNDOK3_8723D BIT(16) /* Beacon Queue DMA OK Interrupt 3 */
+#define IMR_BCNDOK2_8723D BIT(15) /* Beacon Queue DMA OK Interrupt 2 */
+#define IMR_BCNDOK1_8723D BIT(14) /* Beacon Queue DMA OK Interrupt 1 */
+#define IMR_ATIMEND_E_8723D BIT(13) /* ATIM Window End Extension for Win7 */
+#define IMR_TXERR_8723D BIT(11) /* Tx Error Flag Interrupt status, write 1 clear. */
+#define IMR_RXERR_8723D BIT(10) /* Rx Error Flag INT status, Write 1 clear */
+#define IMR_TXFOVW_8723D BIT(9) /* Transmit FIFO Overflow */
+#define IMR_RXFOVW_8723D BIT(8) /* Receive FIFO Overflow */
+
+#define IMR_MCUERR_8723D BIT(28) /* Beacon DMA Interrupt 7 */
 
 /*===================================================================
-=====================================================================
-Here the register defines are for 92C. When the define is as same with 92C,
-we will use the 92C's define for the consistency
-So the following defines for 92C is not entire!!!!!!
-=====================================================================
-=====================================================================*/
+ *=====================================================================
+ *Here the register defines are for 92C. When the define is as same with 92C,
+ *we will use the 92C's define for the consistency
+ *So the following defines for 92C is not entire!!!!!!
+ *=====================================================================
+ *=====================================================================
+ */
 /*
-Based on Datasheet V33---090401
-Register Summary
-Current IOREG MAP
-0x0000h ~ 0x00FFh   System Configuration (256 Bytes)
-0x0100h ~ 0x01FFh   MACTOP General Configuration (256 Bytes)
-0x0200h ~ 0x027Fh   TXDMA Configuration (128 Bytes)
-0x0280h ~ 0x02FFh   RXDMA Configuration (128 Bytes)
-0x0300h ~ 0x03FFh   PCIE EMAC Reserved Region (256 Bytes)
-0x0400h ~ 0x04FFh   Protocol Configuration (256 Bytes)
-0x0500h ~ 0x05FFh   EDCA Configuration (256 Bytes)
-0x0600h ~ 0x07FFh   WMAC Configuration (512 Bytes)
-0x2000h ~ 0x3FFFh   8051 FW Download Region (8196 Bytes)
-*/
+ * Based on Datasheet V33---090401
+ * Register Summary
+ * Current IOREG MAP
+ * 0x0000h ~ 0x00FFh   System Configuration (256 Bytes)
+ * 0x0100h ~ 0x01FFh   MACTOP General Configuration (256 Bytes)
+ * 0x0200h ~ 0x027Fh   TXDMA Configuration (128 Bytes)
+ * 0x0280h ~ 0x02FFh   RXDMA Configuration (128 Bytes)
+ * 0x0300h ~ 0x03FFh   PCIE EMAC Reserved Region (256 Bytes)
+ * 0x0400h ~ 0x04FFh   Protocol Configuration (256 Bytes)
+ * 0x0500h ~ 0x05FFh   EDCA Configuration (256 Bytes)
+ * 0x0600h ~ 0x07FFh   WMAC Configuration (512 Bytes)
+ * 0x2000h ~ 0x3FFFh   8051 FW Download Region (8196 Bytes)
+ */
 /* ----------------------------------------------------------------------------
  *		 8195 (TXPAUSE) transmission pause	(Offset 0x522, 8 bits)
  * ----------------------------------------------------------------------------
- *
+ */
+#if 0
 #define		StopBecon			BIT(6)
 #define		StopHigh				BIT(5)
 #define		StopMgt				BIT(4)
@@ -560,8 +563,7 @@ Current IOREG MAP
 #define		StopVI				BIT(2)
 #define		StopBE				BIT(1)
 #define		StopBK				BIT(0)
-*/
-
+#endif
 
 
 /* ****************************************************************************
@@ -571,372 +573,375 @@ Current IOREG MAP
  *
  *	0x0000h ~ 0x00FFh	System Configuration
  *
- * ----------------------------------------------------- */
+ * -----------------------------------------------------
+ */
 #if 0
 	/* 2 SYS_ISO_CTRL */
-	#define ISO_MD2PP						BIT(0)
-	#define ISO_UA2USB					BIT(1)
-	#define ISO_UD2CORE					BIT(2)
-	#define ISO_PA2PCIE					BIT(3)
-	#define ISO_PD2CORE					BIT(4)
-	#define ISO_IP2MAC					BIT(5)
-	#define ISO_DIOP						BIT(6)
-	#define ISO_DIOE						BIT(7)
-	#define ISO_EB2CORE					BIT(8)
-	#define ISO_DIOR						BIT(9)
-	#define PWC_EV12V						BIT(15)
+#define ISO_MD2PP BIT(0)
+#define ISO_UA2USB BIT(1)
+#define ISO_UD2CORE BIT(2)
+#define ISO_PA2PCIE BIT(3)
+#define ISO_PD2CORE BIT(4)
+#define ISO_IP2MAC BIT(5)
+#define ISO_DIOP BIT(6)
+#define ISO_DIOE BIT(7)
+#define ISO_EB2CORE BIT(8)
+#define ISO_DIOR BIT(9)
+#define PWC_EV12V BIT(15)
 
 
 	/* 2 SYS_FUNC_EN */
-	#define FEN_BBRSTB					BIT(0)
-	#define FEN_BB_GLB_RSTn				BIT(1)
-	#define FEN_USBA						BIT(2)
-	#define FEN_UPLL						BIT(3)
-	#define FEN_USBD						BIT(4)
-	#define FEN_DIO_PCIE					BIT(5)
-	#define FEN_PCIEA						BIT(6)
-	#define FEN_PPLL						BIT(7)
-	#define FEN_PCIED						BIT(8)
-	#define FEN_DIOE						BIT(9)
-	#define FEN_CPUEN						BIT(10)
-	#define FEN_DCORE						BIT(11)
-	#define FEN_ELDR						BIT(12)
-	#define FEN_DIO_RF					BIT(13)
-	#define FEN_HWPDN					BIT(14)
-	#define FEN_MREGEN					BIT(15)
+#define FEN_BBRSTB BIT(0)
+#define FEN_BB_GLB_RSTn BIT(1)
+#define FEN_USBA BIT(2)
+#define FEN_UPLL BIT(3)
+#define FEN_USBD BIT(4)
+#define FEN_DIO_PCIE BIT(5)
+#define FEN_PCIEA BIT(6)
+#define FEN_PPLL BIT(7)
+#define FEN_PCIED BIT(8)
+#define FEN_DIOE BIT(9)
+#define FEN_CPUEN BIT(10)
+#define FEN_DCORE BIT(11)
+#define FEN_ELDR BIT(12)
+#define FEN_DIO_RF BIT(13)
+#define FEN_HWPDN BIT(14)
+#define FEN_MREGEN BIT(15)
 
 	/* 2 APS_FSMCO */
-	#define PFM_LDALL						BIT(0)
-	#define PFM_ALDN						BIT(1)
-	#define PFM_LDKP						BIT(2)
-	#define PFM_WOWL					BIT(3)
-	#define EnPDN							BIT(4)
-	#define PDN_PL						BIT(5)
-	#define APFM_ONMAC					BIT(8)
-	#define APFM_OFF						BIT(9)
-	#define APFM_RSM						BIT(10)
-	#define AFSM_HSUS						BIT(11)
-	#define AFSM_PCIE						BIT(12)
-	#define APDM_MAC					BIT(13)
-	#define APDM_HOST					BIT(14)
-	#define APDM_HPDN					BIT(15)
-	#define RDY_MACON					BIT(16)
-	#define SUS_HOST						BIT(17)
-	#define ROP_ALD						BIT(20)
-	#define ROP_PWR						BIT(21)
-	#define ROP_SPS						BIT(22)
-	#define SOP_MRST						BIT(25)
-	#define SOP_FUSE						BIT(26)
-	#define SOP_ABG						BIT(27)
-	#define SOP_AMB						BIT(28)
-	#define SOP_RCK						BIT(29)
-	#define SOP_A8M						BIT(30)
-	#define XOP_BTCK						BIT(31)
+#define PFM_LDALL BIT(0)
+#define PFM_ALDN BIT(1)
+#define PFM_LDKP BIT(2)
+#define PFM_WOWL BIT(3)
+#define EnPDN BIT(4)
+#define PDN_PL BIT(5)
+#define APFM_ONMAC BIT(8)
+#define APFM_OFF BIT(9)
+#define APFM_RSM BIT(10)
+#define AFSM_HSUS BIT(11)
+#define AFSM_PCIE BIT(12)
+#define APDM_MAC BIT(13)
+#define APDM_HOST BIT(14)
+#define APDM_HPDN BIT(15)
+#define RDY_MACON BIT(16)
+#define SUS_HOST BIT(17)
+#define ROP_ALD BIT(20)
+#define ROP_PWR BIT(21)
+#define ROP_SPS BIT(22)
+#define SOP_MRST BIT(25)
+#define SOP_FUSE BIT(26)
+#define SOP_ABG BIT(27)
+#define SOP_AMB BIT(28)
+#define SOP_RCK BIT(29)
+#define SOP_A8M BIT(30)
+#define XOP_BTCK BIT(31)
 
 	/* 2 SYS_CLKR */
-	#define ANAD16V_EN					BIT(0)
-	#define ANA8M						BIT(1)
-	#define MACSLP						BIT(4)
-	#define LOADER_CLK_EN					BIT(5)
+#define ANAD16V_EN BIT(0)
+#define ANA8M BIT(1)
+#define MACSLP BIT(4)
+#define LOADER_CLK_EN BIT(5)
 
 
 	/* 2 9346CR */
 
-	#define		BOOT_FROM_EEPROM		BIT(4)
-	#define		EEPROM_EN				BIT(5)
+#define BOOT_FROM_EEPROM BIT(4)
+#define EEPROM_EN BIT(5)
 
 
 	/* 2 RF_CTRL */
-	#define RF_EN						BIT(0)
-	#define RF_RSTB					BIT(1)
-	#define RF_SDMRSTB				BIT(2)
+#define RF_EN BIT(0)
+#define RF_RSTB BIT(1)
+#define RF_SDMRSTB BIT(2)
 
 	/* 2 LDOV12D_CTRL */
-	#define LDV12_EN					BIT(0)
-	#define LDV12_SDBY				BIT(1)
-	#define LPLDO_HSM					BIT(2)
-	#define LPLDO_LSM_DIS				BIT(3)
-	#define _LDV12_VADJ(x)				(((x) & 0xF) << 4)
+#define LDV12_EN BIT(0)
+#define LDV12_SDBY BIT(1)
+#define LPLDO_HSM BIT(2)
+#define LPLDO_LSM_DIS BIT(3)
+#define _LDV12_VADJ(x) (((x) & 0xF) << 4)
 
 
 	/* 2 EFUSE_TEST (For RTL8723 partially) */
-	#define EF_TRPT						BIT(7)
-	#define EF_CELL_SEL						(BIT(8) | BIT(9)) /*  00: Wifi Efuse, 01: BT Efuse0, 10: BT Efuse1, 11: BT Efuse2 */
-	#define LDOE25_EN						BIT(31)
-	#define EFUSE_SEL(x)					(((x) & 0x3) << 8)
-	#define EFUSE_SEL_MASK				0x300
-	#define EFUSE_WIFI_SEL_0				0x0
-	#define EFUSE_BT_SEL_0					0x1
-	#define EFUSE_BT_SEL_1					0x2
-	#define EFUSE_BT_SEL_2					0x3
+#define EF_TRPT BIT(7)
+#define EF_CELL_SEL (BIT(8) | BIT(9))  /*  00: Wifi Efuse, 01: BT Efuse0, 10: BT Efuse1, 11: BT Efuse2 */
+#define LDOE25_EN BIT(31)
+#define EFUSE_SEL(x) (((x) & 0x3) << 8)
+#define EFUSE_SEL_MASK 0x300
+#define EFUSE_WIFI_SEL_0 0x0
+#define EFUSE_BT_SEL_0 0x1
+#define EFUSE_BT_SEL_1 0x2
+#define EFUSE_BT_SEL_2 0x3
 
 
 	/* 2 8051FWDL */
 	/* 2 MCUFWDL */
-	#define MCUFWDL_EN					BIT(0)
-	#define MCUFWDL_RDY					BIT(1)
-	#define FWDL_ChkSum_rpt				BIT(2)
-	#define MACINI_RDY					BIT(3)
-	#define BBINI_RDY						BIT(4)
-	#define RFINI_RDY						BIT(5)
-	#define WINTINI_RDY					BIT(6)
-	#define RAM_DL_SEL					BIT(7)
-	#define ROM_DLEN						BIT(19)
-	#define CPRST							BIT(23)
+#define MCUFWDL_EN BIT(0)
+#define MCUFWDL_RDY BIT(1)
+#define FWDL_ChkSum_rpt BIT(2)
+#define MACINI_RDY BIT(3)
+#define BBINI_RDY BIT(4)
+#define RFINI_RDY BIT(5)
+#define WINTINI_RDY BIT(6)
+#define RAM_DL_SEL BIT(7)
+#define ROM_DLEN BIT(19)
+#define CPRST BIT(23)
 
 
 
 	/* 2 REG_SYS_CFG */
-	#define XCLK_VLD						BIT(0)
-	#define ACLK_VLD						BIT(1)
-	#define UCLK_VLD						BIT(2)
-	#define PCLK_VLD						BIT(3)
-	#define PCIRSTB						BIT(4)
-	#define V15_VLD						BIT(5)
-	#define TRP_B15V_EN					BIT(7)
-	#define SIC_IDLE						BIT(8)
-	#define BD_MAC2						BIT(9)
-	#define BD_MAC1						BIT(10)
-	#define IC_MACPHY_MODE				BIT(11)
-	#define CHIP_VER						(BIT(12) | BIT(13) | BIT(14) | BIT(15))
-	#define BT_FUNC						BIT(16)
-	#define VENDOR_ID						BIT(19)
-	#define PAD_HWPD_IDN					BIT(22)
-	#define TRP_VAUX_EN					BIT(23)	/*  RTL ID */
-	#define TRP_BT_EN						BIT(24)
-	#define BD_PKG_SEL					BIT(25)
-	#define BD_HCI_SEL						BIT(26)
-	#define TYPE_ID						BIT(27)
-
-	#define CHIP_VER_RTL_MASK				0xF000	/* Bit 12 ~ 15 */
-	#define CHIP_VER_RTL_SHIFT				12
+#define XCLK_VLD BIT(0)
+#define ACLK_VLD BIT(1)
+#define UCLK_VLD BIT(2)
+#define PCLK_VLD BIT(3)
+#define PCIRSTB BIT(4)
+#define V15_VLD BIT(5)
+#define TRP_B15V_EN BIT(7)
+#define SIC_IDLE BIT(8)
+#define BD_MAC2 BIT(9)
+#define BD_MAC1 BIT(10)
+#define IC_MACPHY_MODE BIT(11)
+#define CHIP_VER (BIT(12) | BIT(13) | BIT(14) | BIT(15))
+#define BT_FUNC BIT(16)
+#define VENDOR_ID BIT(19)
+#define PAD_HWPD_IDN BIT(22)
+#define TRP_VAUX_EN BIT(23)	 /*  RTL ID */
+#define TRP_BT_EN BIT(24)
+#define BD_PKG_SEL BIT(25)
+#define BD_HCI_SEL BIT(26)
+#define TYPE_ID BIT(27)
+
+#define CHIP_VER_RTL_MASK 0xF000	 /* Bit 12 ~ 15 */
+#define CHIP_VER_RTL_SHIFT 12
 
 #endif
 /* -----------------------------------------------------
  *
  *	0x0100h ~ 0x01FFh	MACTOP General Configuration
  *
- * ----------------------------------------------------- */
+ * -----------------------------------------------------
+ */
 #if 0
 
 	/* 2 Function Enable Registers */
 	/* 2 CR 0x0100-0x0103 */
 
-
-	#define HCI_TXDMA_EN					BIT(0)
-	#define HCI_RXDMA_EN					BIT(1)
-	#define TXDMA_EN						BIT(2)
-	#define RXDMA_EN						BIT(3)
-	#define PROTOCOL_EN					BIT(4)
-	#define SCHEDULE_EN					BIT(5)
-	#define MACTXEN						BIT(6)
-	#define MACRXEN						BIT(7)
-	#define ENSWBCN						BIT(8)
-	#define ENSEC							BIT(9)
-	#define CALTMR_EN					BIT(10)	/*  32k CAL TMR enable */
+#define HCI_TXDMA_EN BIT(0)
+#define HCI_RXDMA_EN BIT(1)
+#define TXDMA_EN BIT(2)
+#define RXDMA_EN BIT(3)
+#define PROTOCOL_EN BIT(4)
+#define SCHEDULE_EN BIT(5)
+#define MACTXEN BIT(6)
+#define MACRXEN BIT(7)
+#define ENSWBCN BIT(8)
+#define ENSEC BIT(9)
+#define CALTMR_EN BIT(10)	 /*  32k CAL TMR enable */
 
 	/*  Network type */
-	#define _NETTYPE(x)					(((x) & 0x3) << 16)
-	#define MASK_NETTYPE					0x30000
-	#define NT_NO_LINK					0x0
-	#define NT_LINK_AD_HOC				0x1
-	#define NT_LINK_AP						0x2
-	#define NT_AS_AP						0x3
+#define _NETTYPE(x) (((x) & 0x3) << 16)
+#define MASK_NETTYPE 0x30000
+#define NT_NO_LINK 0x0
+#define NT_LINK_AD_HOC 0x1
+#define NT_LINK_AP 0x2
+#define NT_AS_AP 0x3
 
 
 	/* 2 PBP - Page Size Register 0x0104 */
-	#define GET_RX_PAGE_SIZE(value)			((value) & 0xF)
-	#define GET_TX_PAGE_SIZE(value)			(((value) & 0xF0) >> 4)
-	#define _PSRX_MASK					0xF
-	#define _PSTX_MASK					0xF0
-	#define _PSRX(x)						(x)
-	#define _PSTX(x)						((x) << 4)
+#define GET_RX_PAGE_SIZE(value) ((value) & 0xF)
+#define GET_TX_PAGE_SIZE(value) (((value) & 0xF0) >> 4)
+#define _PSRX_MASK 0xF
+#define _PSTX_MASK 0xF0
+#define _PSRX(x) (x)
+#define _PSTX(x) ((x) << 4)
 
-	#define PBP_64						0x0
-	#define PBP_128						0x1
-	#define PBP_256						0x2
-	#define PBP_512						0x3
-	#define PBP_1024						0x4
+#define PBP_64 0x0
+#define PBP_128 0x1
+#define PBP_256 0x2
+#define PBP_512 0x3
+#define PBP_1024 0x4
 
 
 	/* 2 TX/RXDMA 0x010C */
-	#define RXDMA_ARBBW_EN				BIT(0)
-	#define RXSHFT_EN						BIT(1)
-	#define RXDMA_AGG_EN					BIT(2)
-	#define QS_VO_QUEUE					BIT(8)
-	#define QS_VI_QUEUE					BIT(9)
-	#define QS_BE_QUEUE					BIT(10)
-	#define QS_BK_QUEUE					BIT(11)
-	#define QS_MANAGER_QUEUE			BIT(12)
-	#define QS_HIGH_QUEUE					BIT(13)
-
-	#define HQSEL_VOQ						BIT(0)
-	#define HQSEL_VIQ						BIT(1)
-	#define HQSEL_BEQ						BIT(2)
-	#define HQSEL_BKQ						BIT(3)
-	#define HQSEL_MGTQ					BIT(4)
-	#define HQSEL_HIQ						BIT(5)
+#define RXDMA_ARBBW_EN BIT(0)
+#define RXSHFT_EN BIT(1)
+#define RXDMA_AGG_EN BIT(2)
+#define QS_VO_QUEUE BIT(8)
+#define QS_VI_QUEUE BIT(9)
+#define QS_BE_QUEUE BIT(10)
+#define QS_BK_QUEUE BIT(11)
+#define QS_MANAGER_QUEUE BIT(12)
+#define QS_HIGH_QUEUE BIT(13)
+
+#define HQSEL_VOQ BIT(0)
+#define HQSEL_VIQ BIT(1)
+#define HQSEL_BEQ BIT(2)
+#define HQSEL_BKQ BIT(3)
+#define HQSEL_MGTQ BIT(4)
+#define HQSEL_HIQ BIT(5)
 
 	/*  For normal driver, 0x10C */
-	#define _TXDMA_HIQ_MAP(x)			(((x) & 0x3) << 14)
-	#define _TXDMA_MGQ_MAP(x)			(((x) & 0x3) << 12)
-	#define _TXDMA_BKQ_MAP(x)			(((x) & 0x3) << 10)
-	#define _TXDMA_BEQ_MAP(x)			(((x) & 0x3) << 8)
-	#define _TXDMA_VIQ_MAP(x)			(((x) & 0x3) << 6)
-	#define _TXDMA_VOQ_MAP(x)			(((x) & 0x3) << 4)
+#define _TXDMA_HIQ_MAP(x) (((x) & 0x3) << 14)
+#define _TXDMA_MGQ_MAP(x) (((x) & 0x3) << 12)
+#define _TXDMA_BKQ_MAP(x) (((x) & 0x3) << 10)
+#define _TXDMA_BEQ_MAP(x) (((x) & 0x3) << 8)
+#define _TXDMA_VIQ_MAP(x) (((x) & 0x3) << 6)
+#define _TXDMA_VOQ_MAP(x) (((x) & 0x3) << 4)
 
-	#define QUEUE_LOW					1
-	#define QUEUE_NORMAL				2
-	#define QUEUE_HIGH					3
+#define QUEUE_LOW 1
+#define QUEUE_NORMAL 2
+#define QUEUE_HIGH 3
 
 
 	/* 2 REG_C2HEVT_CLEAR 0x01AF */
-	#define	C2H_EVT_HOST_CLOSE			0x00	/*  Set by driver and notify FW that the driver has read the C2H command message */
-	#define	C2H_EVT_FW_CLOSE			0xFF		/*  Set by FW indicating that FW had set the C2H command message and it's not yet read by driver. */
+#define C2H_EVT_HOST_CLOSE 0x00	 /*  Set by driver and notify FW that the driver has read the C2H command message */
+#define C2H_EVT_FW_CLOSE 0xFF		 /*  Set by FW indicating that FW had set the C2H command message and it's not yet read by driver. */
 
 
 
 	/* 2 LLT_INIT 0x01E0 */
-	#define _LLT_NO_ACTIVE					0x0
-	#define _LLT_WRITE_ACCESS				0x1
-	#define _LLT_READ_ACCESS				0x2
+#define _LLT_NO_ACTIVE 0x0
+#define _LLT_WRITE_ACCESS 0x1
+#define _LLT_READ_ACCESS 0x2
 
-	#define _LLT_INIT_DATA(x)				((x) & 0xFF)
-	#define _LLT_INIT_ADDR(x)				(((x) & 0xFF) << 8)
-	#define _LLT_OP(x)						(((x) & 0x3) << 30)
-	#define _LLT_OP_VALUE(x)				(((x) >> 30) & 0x3)
+#define _LLT_INIT_DATA(x) ((x) & 0xFF)
+#define _LLT_INIT_ADDR(x) (((x) & 0xFF) << 8)
+#define _LLT_OP(x) (((x) & 0x3) << 30)
+#define _LLT_OP_VALUE(x) (((x) >> 30) & 0x3)
 
 #endif
 /* -----------------------------------------------------
  *
  *	0x0200h ~ 0x027Fh	TXDMA Configuration
  *
- * ----------------------------------------------------- */
+ * -----------------------------------------------------
+ */
 #if 0
 	/* 2 TDECTL 0x0208 */
-	#define BLK_DESC_NUM_SHIFT			4
-	#define BLK_DESC_NUM_MASK			0xF
+#define BLK_DESC_NUM_SHIFT 4
+#define BLK_DESC_NUM_MASK 0xF
 
 
 	/* 2 TXDMA_OFFSET_CHK 0x020C */
-	#define DROP_DATA_EN				BIT(9)
+#define DROP_DATA_EN BIT(9)
 #endif
 /* -----------------------------------------------------
  *
  *	0x0280h ~ 0x028Bh	RX DMA Configuration
  *
- * ----------------------------------------------------- */
+ * -----------------------------------------------------
+ */
 #if 0
 	/* 2 REG_RXDMA_CONTROL, 0x0286h */
 
 	/*  Write only. When this bit is set, RXDMA will decrease RX PKT counter by one. Before */
 	/*  this bit is polled, FW shall update RXFF_RD_PTR first. This register is write pulse and auto clear. */
-	#define	RXPKT_RELEASE_POLL			BIT(0)
+#define RXPKT_RELEASE_POLL BIT(0)
 	/*  Read only. When RXMA finishes on-going DMA operation, RXMDA will report idle state in */
 	/*  this bit. FW can start releasing packets after RXDMA entering idle mode. */
-	#define	RXDMA_IDLE					BIT(1)
+#define RXDMA_IDLE BIT(1)
 	/*  When this bit is set, RXDMA will enter this mode after on-going RXDMA packet to host */
 	/*  completed, and stop DMA packet to host. RXDMA will then report Default: 0; */
-	#define	RW_RELEASE_EN				BIT(2)
+#define RW_RELEASE_EN BIT(2)
 #endif
 /* -----------------------------------------------------
  *
  *	0x0400h ~ 0x047Fh	Protocol Configuration
  *
- * ----------------------------------------------------- */
+ * -----------------------------------------------------
+ */
 #if 0
 	/* 2 FWHW_TXQ_CTRL 0x0420 */
-	#define EN_AMPDU_RTY_NEW			BIT(7)
+#define EN_AMPDU_RTY_NEW BIT(7)
 
 
 	/* 2 REG_LIFECTRL_CTRL 0x0426 */
-	#define	HAL92C_EN_PKT_LIFE_TIME_BK		BIT(3)
-	#define	HAL92C_EN_PKT_LIFE_TIME_BE		BIT(2)
-	#define	HAL92C_EN_PKT_LIFE_TIME_VI		BIT(1)
-	#define	HAL92C_EN_PKT_LIFE_TIME_VO		BIT(0)
+#define HAL92C_EN_PKT_LIFE_TIME_BK BIT(3)
+#define HAL92C_EN_PKT_LIFE_TIME_BE BIT(2)
+#define HAL92C_EN_PKT_LIFE_TIME_VI BIT(1)
+#define HAL92C_EN_PKT_LIFE_TIME_VO BIT(0)
 
-	#define	HAL92C_MSDU_LIFE_TIME_UNIT		128		/*  in us, said by Tim. */
+#define HAL92C_MSDU_LIFE_TIME_UNIT 128		 /*  in us, said by Tim. */
 
 
 	/* 2 SPEC SIFS 0x0428 */
-	#define _SPEC_SIFS_CCK(x)				((x) & 0xFF)
-	#define _SPEC_SIFS_OFDM(x)				(((x) & 0xFF) << 8)
+#define _SPEC_SIFS_CCK(x) ((x) & 0xFF)
+#define _SPEC_SIFS_OFDM(x) (((x) & 0xFF) << 8)
 
 	/* 2 RL 0x042A */
-	#define	RETRY_LIMIT_SHORT_SHIFT		8
-	#define	RETRY_LIMIT_LONG_SHIFT		0
+#define RETRY_LIMIT_SHORT_SHIFT 8
+#define RETRY_LIMIT_LONG_SHIFT 0
 
-	#define _LRL(x)							((x) & 0x3F)
-	#define _SRL(x)							(((x) & 0x3F) << 8)
+#define _LRL(x) ((x) & 0x3F)
+#define _SRL(x) (((x) & 0x3F) << 8)
 #endif
 
 /* -----------------------------------------------------
  *
  *	0x0500h ~ 0x05FFh	EDCA Configuration
  *
- * ----------------------------------------------------- */
+ * -----------------------------------------------------
+ */
 #if 0
 	/* 2 EDCA setting 0x050C */
-	#define AC_PARAM_TXOP_LIMIT_OFFSET		16
-	#define AC_PARAM_ECW_MAX_OFFSET		12
-	#define AC_PARAM_ECW_MIN_OFFSET		8
-	#define AC_PARAM_AIFS_OFFSET			0
+#define AC_PARAM_TXOP_LIMIT_OFFSET 16
+#define AC_PARAM_ECW_MAX_OFFSET 12
+#define AC_PARAM_ECW_MIN_OFFSET 8
+#define AC_PARAM_AIFS_OFFSET 0
 
 
 	/* 2 BCN_CTRL 0x0550 */
-	#define EN_TXBCN_RPT						BIT(2)
-	#define EN_BCN_FUNCTION					BIT(3)
+#define EN_TXBCN_RPT BIT(2)
+#define EN_BCN_FUNCTION BIT(3)
 
 	/* 2 TxPause 0x0522 */
-	#define STOP_BCNQ						BIT(6)
+#define STOP_BCNQ BIT(6)
 #endif
 
-
 /* 2 ACMHWCTRL 0x05C0 */
-#define	acm_hw_hw_en_8723d				BIT(0)
-#define	acm_hw_voq_en_8723d				BIT(1)
-#define	acm_hw_viq_en_8723d				BIT(2)
-#define	acm_hw_beq_en_8723d				BIT(3)
-#define	acm_hw_voq_status_8723d			BIT(5)
-#define	acm_hw_viq_status_8723d			BIT(6)
-#define	acm_hw_beq_status_8723d			BIT(7)
-
-
+#define acm_hw_hw_en_8723d BIT(0)
+#define acm_hw_voq_en_8723d BIT(1)
+#define acm_hw_viq_en_8723d BIT(2)
+#define acm_hw_beq_en_8723d BIT(3)
+#define acm_hw_voq_status_8723d BIT(5)
+#define acm_hw_viq_status_8723d BIT(6)
+#define acm_hw_beq_status_8723d BIT(7)
 
 /* -----------------------------------------------------
  *
  *	0x0600h ~ 0x07FFh	WMAC Configuration
  *
- * ----------------------------------------------------- */
+ * -----------------------------------------------------
+ */
 #if 0
 
 	/* 2 TCR 0x0604 */
-	#define DIS_GCLK							BIT(1)
-	#define PAD_SEL							BIT(2)
-	#define PWR_ST							BIT(6)
-	#define PWRBIT_OW_EN					BIT(7)
-	#define ACRC								BIT(8)
-	#define CFENDFORM						BIT(9)
-	#define ICV								BIT(10)
+#define DIS_GCLK BIT(1)
+#define PAD_SEL BIT(2)
+#define PWR_ST BIT(6)
+#define PWRBIT_OW_EN BIT(7)
+#define ACRC BIT(8)
+#define CFENDFORM BIT(9)
+#define ICV BIT(10)
 #endif
 
 /* ----------------------------------------------------------------------------
  * 8195 (RCR) Receive Configuration Register	(Offset 0x608, 32 bits)
- * ---------------------------------------------------------------------------- */
+ * ----------------------------------------------------------------------------
+ */
 #if 0
-	#define	RCR_APPFCS					BIT(31)		/*  WMAC append FCS after pauload */
-	#define	RCR_APP_MIC					BIT(30)		/*  MACRX will retain the MIC at the bottom of the packet. */
-	#define	RCR_APP_ICV					BIT(29)       /*  MACRX will retain the ICV at the bottom of the packet. */
-	#define	RCR_APP_PHYST_RXFF			BIT(28)       /*  HY status is appended before RX packet in RXFF */
-	#define	RCR_APP_BA_SSN				BIT(27)		/*  SSN of previous TXBA is appended as after original RXDESC as the 4-th DW of RXDESC. */
-	#define	RCR_RSVD_BIT(26)				BIT26		/*  Reserved */
+#define RCR_APPFCS BIT(31)		 /*  WMAC append FCS after pauload */
+#define RCR_APP_MIC BIT(30)		 /*  MACRX will retain the MIC at the bottom of the packet. */
+#define RCR_APP_ICV BIT(29)        /*  MACRX will retain the ICV at the bottom of the packet. */
+#define RCR_APP_PHYST_RXFF BIT(28)        /*  HY status is appended before RX packet in RXFF */
+#define RCR_APP_BA_SSN BIT(27)		 /*  SSN of previous TXBA is appended as after original RXDESC as the 4-th DW of RXDESC. */
+#define RCR_RSVD_BIT(26) BIT26		 /*  Reserved */
 #endif
-#define	RCR_TCPOFLD_EN				BIT(25)		/* Enable TCP checksum offload */
+#define RCR_TCPOFLD_EN BIT(25) /* Enable TCP checksum offload */
 #if 0
-	#define	RCR_ENMBID					BIT(24)		/*  Enable Multiple BssId. Only response ACK to the packets whose DID(A1) matching to the addresses in the MBSSID CAM Entries. */
-	#define	RCR_LSIGEN					BIT(23)		/*  Enable LSIG TXOP Protection function. Search KEYCAM for each rx packet to check if LSIGEN bit is set. */
-	#define	RCR_MFBEN					BIT(22)		/*  Enable immediate MCS Feedback function. When Rx packet with MRQ = 1'b1, then search KEYCAM to find sender's MCS Feedback function and send response. */
+#define RCR_ENMBID BIT(24)		 /*  Enable Multiple BssId. Only response ACK to the packets whose DID(A1) matching to the addresses in the MBSSID CAM Entries. */
+#define RCR_LSIGEN BIT(23)		 /*  Enable LSIG TXOP Protection function. Search KEYCAM for each rx packet to check if LSIGEN bit is set. */
+#define RCR_MFBEN BIT(22)		 /*  Enable immediate MCS Feedback function. When Rx packet with MRQ = 1'b1, then search KEYCAM to find sender's MCS Feedback function and send response. */
 #endif
 
-
 #endif /*  #ifndef __INC_HAL8723DREG_H */
diff --git a/rtl8723DS/hal/phydm/rtl8723d/halhwimg8723d_bb.c b/rtl8723DS/hal/phydm/rtl8723d/halhwimg8723d_bb.c
index ea40771..ec4d96f 100755..100644
--- a/rtl8723DS/hal/phydm/rtl8723d/halhwimg8723d_bb.c
+++ b/rtl8723DS/hal/phydm/rtl8723d/halhwimg8723d_bb.c
@@ -20,54 +20,58 @@
 #if (RTL8723D_SUPPORT == 1)
 static boolean
 check_positive(
-	struct PHY_DM_STRUCT *p_dm,
+	struct dm_struct *dm,
 	const u32	condition1,
 	const u32	condition2,
 	const u32	condition3,
 	const u32	condition4
 )
 {
-	u8	_board_type = ((p_dm->board_type & BIT(4)) >> 4) << 0 | /* _GLNA*/
-			((p_dm->board_type & BIT(3)) >> 3) << 1 | /* _GPA*/
-			((p_dm->board_type & BIT(7)) >> 7) << 2 | /* _ALNA*/
-			((p_dm->board_type & BIT(6)) >> 6) << 3 | /* _APA */
-			((p_dm->board_type & BIT(2)) >> 2) << 4 | /* _BT*/
-			((p_dm->board_type & BIT(1)) >> 1) << 5 | /* _NGFF*/
-			((p_dm->board_type & BIT(5)) >> 5) << 6;  /* _TRSWT*/
+	u8	_board_type = ((dm->board_type & BIT(4)) >> 4) << 0 | /* _GLNA*/
+			((dm->board_type & BIT(3)) >> 3) << 1 | /* _GPA*/
+			((dm->board_type & BIT(7)) >> 7) << 2 | /* _ALNA*/
+			((dm->board_type & BIT(6)) >> 6) << 3 | /* _APA */
+			((dm->board_type & BIT(2)) >> 2) << 4 | /* _BT*/
+			((dm->board_type & BIT(1)) >> 1) << 5 | /* _NGFF*/
+			((dm->board_type & BIT(5)) >> 5) << 6;  /* _TRSWT*/
 
 	u32	cond1 = condition1, cond2 = condition2, cond3 = condition3, cond4 = condition4;
 
-	u8	cut_version_for_para = (p_dm->cut_version ==  ODM_CUT_A) ? 15 : p_dm->cut_version;
-	u8	pkg_type_for_para = (p_dm->package_type == 0) ? 15 : p_dm->package_type;
+	u8	cut_version_for_para = (dm->cut_version ==  ODM_CUT_A) ? 15 : dm->cut_version;
+	u8	pkg_type_for_para = (dm->package_type == 0) ? 15 : dm->package_type;
 
 	u32	driver1 = cut_version_for_para << 24 |
-			(p_dm->support_interface & 0xF0) << 16 |
-			p_dm->support_platform << 16 |
+			(dm->support_interface & 0xF0) << 16 |
+			dm->support_platform << 16 |
 			pkg_type_for_para << 12 |
-			(p_dm->support_interface & 0x0F) << 8  |
+			(dm->support_interface & 0x0F) << 8  |
 			_board_type;
 
-	u32	driver2 = (p_dm->type_glna & 0xFF) <<  0 |
-			(p_dm->type_gpa & 0xFF)  <<  8 |
-			(p_dm->type_alna & 0xFF) << 16 |
-			(p_dm->type_apa & 0xFF)  << 24;
+	u32	driver2 = (dm->type_glna & 0xFF) <<  0 |
+			(dm->type_gpa & 0xFF)  <<  8 |
+			(dm->type_alna & 0xFF) << 16 |
+			(dm->type_apa & 0xFF)  << 24;
 
 	u32	driver3 = 0;
 
-	u32	driver4 = (p_dm->type_glna & 0xFF00) >>  8 |
-			(p_dm->type_gpa & 0xFF00) |
-			(p_dm->type_alna & 0xFF00) << 8 |
-			(p_dm->type_apa & 0xFF00)  << 16;
+	u32	driver4 = (dm->type_glna & 0xFF00) >>  8 |
+			(dm->type_gpa & 0xFF00) |
+			(dm->type_alna & 0xFF00) << 8 |
+			(dm->type_apa & 0xFF00)  << 16;
 
-	PHYDM_DBG(p_dm, ODM_COMP_INIT,
-	("===> check_positive (cond1, cond2, cond3, cond4) = (0x%X 0x%X 0x%X 0x%X)\n", cond1, cond2, cond3, cond4));
-	PHYDM_DBG(p_dm, ODM_COMP_INIT,
-	("===> check_positive (driver1, driver2, driver3, driver4) = (0x%X 0x%X 0x%X 0x%X)\n", driver1, driver2, driver3, driver4));
+	PHYDM_DBG(dm, ODM_COMP_INIT,
+		  "===> %s (cond1, cond2, cond3, cond4) = (0x%X 0x%X 0x%X 0x%X)\n",
+		  __func__, cond1, cond2, cond3, cond4);
+	PHYDM_DBG(dm, ODM_COMP_INIT,
+		  "===> %s (driver1, driver2, driver3, driver4) = (0x%X 0x%X 0x%X 0x%X)\n",
+		  __func__, driver1, driver2, driver3, driver4);
 
-	PHYDM_DBG(p_dm, ODM_COMP_INIT,
-	("	(Platform, Interface) = (0x%X, 0x%X)\n", p_dm->support_platform, p_dm->support_interface));
-	PHYDM_DBG(p_dm, ODM_COMP_INIT,
-	("	(Board, Package) = (0x%X, 0x%X)\n", p_dm->board_type, p_dm->package_type));
+	PHYDM_DBG(dm, ODM_COMP_INIT,
+		  "	(Platform, Interface) = (0x%X, 0x%X)\n",
+		  dm->support_platform, dm->support_interface);
+	PHYDM_DBG(dm, ODM_COMP_INIT,
+		  "	(Board, Package) = (0x%X, 0x%X)\n", dm->board_type,
+		  dm->package_type);
 
 
 	/*============== value Defined Check ===============*/
@@ -108,7 +112,7 @@ check_positive(
 }
 static boolean
 check_negative(
-	struct PHY_DM_STRUCT *p_dm,
+	struct dm_struct *dm,
 	const u32	condition1,
 	const u32	condition2
 )
@@ -511,19 +515,17 @@ u32 array_mp_8723d_agc_tab[] = {
 };
 
 void
-odm_read_and_config_mp_8723d_agc_tab(
-	struct	PHY_DM_STRUCT *p_dm
-)
+odm_read_and_config_mp_8723d_agc_tab(struct dm_struct *dm)
 {
 	u32	i = 0;
 	u8	c_cond;
 	boolean	is_matched = true, is_skipped = false;
-	u32	array_len = sizeof(array_mp_8723d_agc_tab)/sizeof(u32);
+	u32	array_len = sizeof(array_mp_8723d_agc_tab) / sizeof(u32);
 	u32	*array = array_mp_8723d_agc_tab;
 
 	u32	v1 = 0, v2 = 0, pre_v1 = 0, pre_v2 = 0;
 
-	PHYDM_DBG(p_dm, ODM_COMP_INIT, ("===> odm_read_and_config_mp_8723d_agc_tab\n"));
+	PHYDM_DBG(dm, ODM_COMP_INIT, "===> %s\n", __func__);
 
 	while ((i + 1) < array_len) {
 		v1 = array[i];
@@ -531,22 +533,22 @@ odm_read_and_config_mp_8723d_agc_tab(
 
 		if (v1 & (BIT(31) | BIT(30))) {/*positive & negative condition*/
 			if (v1 & BIT(31)) {/* positive condition*/
-				c_cond  = (u8)((v1 & (BIT(29)|BIT(28))) >> 28);
+				c_cond  = (u8)((v1 & (BIT(29) | BIT(28))) >> 28);
 				if (c_cond == COND_ENDIF) {/*end*/
 					is_matched = true;
 					is_skipped = false;
-					PHYDM_DBG(p_dm, ODM_COMP_INIT, ("ENDIF\n"));
+					PHYDM_DBG(dm, ODM_COMP_INIT, "ENDIF\n");
 				} else if (c_cond == COND_ELSE) { /*else*/
-					is_matched = is_skipped?false:true;
-					PHYDM_DBG(p_dm, ODM_COMP_INIT, ("ELSE\n"));
+					is_matched = is_skipped ? false : true;
+					PHYDM_DBG(dm, ODM_COMP_INIT, "ELSE\n");
 				} else {/*if , else if*/
 					pre_v1 = v1;
 					pre_v2 = v2;
-					PHYDM_DBG(p_dm, ODM_COMP_INIT, ("IF or ELSE IF\n"));
+					PHYDM_DBG(dm, ODM_COMP_INIT, "IF or ELSE IF\n");
 				}
 			} else if (v1 & BIT(30)) { /*negative condition*/
 				if (is_skipped == false) {
-					if (check_positive(p_dm, pre_v1, pre_v2, v1, v2)) {
+					if (check_positive(dm, pre_v1, pre_v2, v1, v2)) {
 						is_matched = true;
 						is_skipped = true;
 					} else {
@@ -558,7 +560,7 @@ odm_read_and_config_mp_8723d_agc_tab(
 			}
 		} else {
 			if (is_matched)
-				odm_config_bb_agc_8723d(p_dm, v1, MASKDWORD, v2);
+				odm_config_bb_agc_8723d(dm, v1, MASKDWORD, v2);
 		}
 		i = i + 2;
 	}
@@ -802,19 +804,17 @@ u32 array_mp_8723d_phy_reg[] = {
 };
 
 void
-odm_read_and_config_mp_8723d_phy_reg(
-	struct	PHY_DM_STRUCT *p_dm
-)
+odm_read_and_config_mp_8723d_phy_reg(struct dm_struct *dm)
 {
 	u32	i = 0;
 	u8	c_cond;
 	boolean	is_matched = true, is_skipped = false;
-	u32	array_len = sizeof(array_mp_8723d_phy_reg)/sizeof(u32);
+	u32	array_len = sizeof(array_mp_8723d_phy_reg) / sizeof(u32);
 	u32	*array = array_mp_8723d_phy_reg;
 
 	u32	v1 = 0, v2 = 0, pre_v1 = 0, pre_v2 = 0;
 
-	PHYDM_DBG(p_dm, ODM_COMP_INIT, ("===> odm_read_and_config_mp_8723d_phy_reg\n"));
+	PHYDM_DBG(dm, ODM_COMP_INIT, "===> %s\n", __func__);
 
 	while ((i + 1) < array_len) {
 		v1 = array[i];
@@ -822,22 +822,22 @@ odm_read_and_config_mp_8723d_phy_reg(
 
 		if (v1 & (BIT(31) | BIT(30))) {/*positive & negative condition*/
 			if (v1 & BIT(31)) {/* positive condition*/
-				c_cond  = (u8)((v1 & (BIT(29)|BIT(28))) >> 28);
+				c_cond  = (u8)((v1 & (BIT(29) | BIT(28))) >> 28);
 				if (c_cond == COND_ENDIF) {/*end*/
 					is_matched = true;
 					is_skipped = false;
-					PHYDM_DBG(p_dm, ODM_COMP_INIT, ("ENDIF\n"));
+					PHYDM_DBG(dm, ODM_COMP_INIT, "ENDIF\n");
 				} else if (c_cond == COND_ELSE) { /*else*/
-					is_matched = is_skipped?false:true;
-					PHYDM_DBG(p_dm, ODM_COMP_INIT, ("ELSE\n"));
+					is_matched = is_skipped ? false : true;
+					PHYDM_DBG(dm, ODM_COMP_INIT, "ELSE\n");
 				} else {/*if , else if*/
 					pre_v1 = v1;
 					pre_v2 = v2;
-					PHYDM_DBG(p_dm, ODM_COMP_INIT, ("IF or ELSE IF\n"));
+					PHYDM_DBG(dm, ODM_COMP_INIT, "IF or ELSE IF\n");
 				}
 			} else if (v1 & BIT(30)) { /*negative condition*/
 				if (is_skipped == false) {
-					if (check_positive(p_dm, pre_v1, pre_v2, v1, v2)) {
+					if (check_positive(dm, pre_v1, pre_v2, v1, v2)) {
 						is_matched = true;
 						is_skipped = true;
 					} else {
@@ -849,7 +849,7 @@ odm_read_and_config_mp_8723d_phy_reg(
 			}
 		} else {
 			if (is_matched)
-				odm_config_bb_phy_8723d(p_dm, v1, MASKDWORD, v2);
+				odm_config_bb_phy_8723d(dm, v1, MASKDWORD, v2);
 		}
 		i = i + 2;
 	}
@@ -875,40 +875,38 @@ u32 array_mp_8723d_phy_reg_pg[] = {
 };
 
 void
-odm_read_and_config_mp_8723d_phy_reg_pg(
-	struct PHY_DM_STRUCT	*p_dm
-)
+odm_read_and_config_mp_8723d_phy_reg_pg(struct dm_struct *dm)
 {
 	u32	i = 0;
-	u32	array_len = sizeof(array_mp_8723d_phy_reg_pg)/sizeof(u32);
+	u32	array_len = sizeof(array_mp_8723d_phy_reg_pg) / sizeof(u32);
 	u32	*array = array_mp_8723d_phy_reg_pg;
 
 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
-	struct _ADAPTER	*adapter = p_dm->adapter;
-	HAL_DATA_TYPE	*p_hal_data = GET_HAL_DATA(adapter);
+	void	*adapter = dm->adapter;
+	HAL_DATA_TYPE	*hal_data = GET_HAL_DATA(((PADAPTER)adapter));
 
-	PlatformZeroMemory(p_hal_data->BufOfLinesPwrByRate, MAX_LINES_HWCONFIG_TXT*MAX_BYTES_LINE_HWCONFIG_TXT);
-	p_hal_data->nLinesReadPwrByRate = array_len/6;
+	PlatformZeroMemory(hal_data->BufOfLinesPwrByRate, MAX_LINES_HWCONFIG_TXT * MAX_BYTES_LINE_HWCONFIG_TXT);
+	hal_data->nLinesReadPwrByRate = array_len / 6;
 #endif
 
-	PHYDM_DBG(p_dm, ODM_COMP_INIT, ("===> odm_read_and_config_mp_8723d_phy_reg_pg\n"));
+	PHYDM_DBG(dm, ODM_COMP_INIT, "===> %s\n", __func__);
 
-	p_dm->phy_reg_pg_version = 1;
-	p_dm->phy_reg_pg_value_type = PHY_REG_PG_EXACT_VALUE;
+	dm->phy_reg_pg_version = 1;
+	dm->phy_reg_pg_value_type = PHY_REG_PG_EXACT_VALUE;
 
 	for (i = 0; i < array_len; i += 6) {
 		u32	v1 = array[i];
-		u32	v2 = array[i+1];
-		u32	v3 = array[i+2];
-		u32	v4 = array[i+3];
-		u32	v5 = array[i+4];
-		u32	v6 = array[i+5];
+		u32	v2 = array[i + 1];
+		u32	v3 = array[i + 2];
+		u32	v4 = array[i + 3];
+		u32	v5 = array[i + 4];
+		u32	v6 = array[i + 5];
 
-		odm_config_bb_phy_reg_pg_8723d(p_dm, v1, v2, v3, v4, v5, v6);
+		odm_config_bb_phy_reg_pg_8723d(dm, v1, v2, v3, v4, v5, v6);
 
 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
-	rsprintf((char *)p_hal_data->BufOfLinesPwrByRate[i/6], 100, "%s, %s, %s, 0x%X, 0x%08X, 0x%08X,",
-		(v1 == 0?"2.4G":"  5G"), (v2 == 0?"A":"B"), (v3 == 0?"1Tx":"2Tx"), v4, v5, v6);
+	rsprintf((char *)hal_data->BufOfLinesPwrByRate[i / 6], 100, "%s, %s, %s, 0x%X, 0x%08X, 0x%08X,",
+		(v1 == 0 ? "2.4G" : "  5G"), (v2 == 0 ? "A" : "B"), (v3 == 0 ? "1Tx" : "2Tx"), v4, v5, v6);
 #endif
 	}
 }
diff --git a/rtl8723DS/hal/phydm/rtl8723d/halhwimg8723d_bb.h b/rtl8723DS/hal/phydm/rtl8723d/halhwimg8723d_bb.h
index 44aea06..29322d6 100755..100644
--- a/rtl8723DS/hal/phydm/rtl8723d/halhwimg8723d_bb.h
+++ b/rtl8723DS/hal/phydm/rtl8723d/halhwimg8723d_bb.h
@@ -24,29 +24,26 @@
 ******************************************************************************/
 
 void
-odm_read_and_config_mp_8723d_agc_tab(/* tc: Test Chip, mp: mp Chip*/
-	struct	PHY_DM_STRUCT *p_dm
-);
-u32	odm_get_version_mp_8723d_agc_tab(void);
+odm_read_and_config_mp_8723d_agc_tab( /* tc: Test Chip, mp: mp Chip*/
+				     struct dm_struct *dm);
+u32 odm_get_version_mp_8723d_agc_tab(void);
 
 /******************************************************************************
 *                           phy_reg.TXT
 ******************************************************************************/
 
 void
-odm_read_and_config_mp_8723d_phy_reg(/* tc: Test Chip, mp: mp Chip*/
-	struct	PHY_DM_STRUCT *p_dm
-);
-u32	odm_get_version_mp_8723d_phy_reg(void);
+odm_read_and_config_mp_8723d_phy_reg( /* tc: Test Chip, mp: mp Chip*/
+				     struct dm_struct *dm);
+u32 odm_get_version_mp_8723d_phy_reg(void);
 
 /******************************************************************************
 *                           phy_reg_pg.TXT
 ******************************************************************************/
 
 void
-odm_read_and_config_mp_8723d_phy_reg_pg(/* tc: Test Chip, mp: mp Chip*/
-	struct	PHY_DM_STRUCT *p_dm
-);
+odm_read_and_config_mp_8723d_phy_reg_pg( /* tc: Test Chip, mp: mp Chip*/
+					struct dm_struct *dm);
 u32	odm_get_version_mp_8723d_phy_reg_pg(void);
 
 #endif
diff --git a/rtl8723DS/hal/phydm/rtl8723d/halhwimg8723d_mac.c b/rtl8723DS/hal/phydm/rtl8723d/halhwimg8723d_mac.c
index 6b79876..fe8ff3c 100755..100644
--- a/rtl8723DS/hal/phydm/rtl8723d/halhwimg8723d_mac.c
+++ b/rtl8723DS/hal/phydm/rtl8723d/halhwimg8723d_mac.c
@@ -20,54 +20,58 @@
 #if (RTL8723D_SUPPORT == 1)
 static boolean
 check_positive(
-	struct PHY_DM_STRUCT *p_dm,
+	struct dm_struct *dm,
 	const u32	condition1,
 	const u32	condition2,
 	const u32	condition3,
 	const u32	condition4
 )
 {
-	u8	_board_type = ((p_dm->board_type & BIT(4)) >> 4) << 0 | /* _GLNA*/
-			((p_dm->board_type & BIT(3)) >> 3) << 1 | /* _GPA*/
-			((p_dm->board_type & BIT(7)) >> 7) << 2 | /* _ALNA*/
-			((p_dm->board_type & BIT(6)) >> 6) << 3 | /* _APA */
-			((p_dm->board_type & BIT(2)) >> 2) << 4 | /* _BT*/
-			((p_dm->board_type & BIT(1)) >> 1) << 5 | /* _NGFF*/
-			((p_dm->board_type & BIT(5)) >> 5) << 6;  /* _TRSWT*/
+	u8	_board_type = ((dm->board_type & BIT(4)) >> 4) << 0 | /* _GLNA*/
+			((dm->board_type & BIT(3)) >> 3) << 1 | /* _GPA*/
+			((dm->board_type & BIT(7)) >> 7) << 2 | /* _ALNA*/
+			((dm->board_type & BIT(6)) >> 6) << 3 | /* _APA */
+			((dm->board_type & BIT(2)) >> 2) << 4 | /* _BT*/
+			((dm->board_type & BIT(1)) >> 1) << 5 | /* _NGFF*/
+			((dm->board_type & BIT(5)) >> 5) << 6;  /* _TRSWT*/
 
 	u32	cond1 = condition1, cond2 = condition2, cond3 = condition3, cond4 = condition4;
 
-	u8	cut_version_for_para = (p_dm->cut_version ==  ODM_CUT_A) ? 15 : p_dm->cut_version;
-	u8	pkg_type_for_para = (p_dm->package_type == 0) ? 15 : p_dm->package_type;
+	u8	cut_version_for_para = (dm->cut_version ==  ODM_CUT_A) ? 15 : dm->cut_version;
+	u8	pkg_type_for_para = (dm->package_type == 0) ? 15 : dm->package_type;
 
 	u32	driver1 = cut_version_for_para << 24 |
-			(p_dm->support_interface & 0xF0) << 16 |
-			p_dm->support_platform << 16 |
+			(dm->support_interface & 0xF0) << 16 |
+			dm->support_platform << 16 |
 			pkg_type_for_para << 12 |
-			(p_dm->support_interface & 0x0F) << 8  |
+			(dm->support_interface & 0x0F) << 8  |
 			_board_type;
 
-	u32	driver2 = (p_dm->type_glna & 0xFF) <<  0 |
-			(p_dm->type_gpa & 0xFF)  <<  8 |
-			(p_dm->type_alna & 0xFF) << 16 |
-			(p_dm->type_apa & 0xFF)  << 24;
+	u32	driver2 = (dm->type_glna & 0xFF) <<  0 |
+			(dm->type_gpa & 0xFF)  <<  8 |
+			(dm->type_alna & 0xFF) << 16 |
+			(dm->type_apa & 0xFF)  << 24;
 
 	u32	driver3 = 0;
 
-	u32	driver4 = (p_dm->type_glna & 0xFF00) >>  8 |
-			(p_dm->type_gpa & 0xFF00) |
-			(p_dm->type_alna & 0xFF00) << 8 |
-			(p_dm->type_apa & 0xFF00)  << 16;
+	u32	driver4 = (dm->type_glna & 0xFF00) >>  8 |
+			(dm->type_gpa & 0xFF00) |
+			(dm->type_alna & 0xFF00) << 8 |
+			(dm->type_apa & 0xFF00)  << 16;
 
-	PHYDM_DBG(p_dm, ODM_COMP_INIT,
-	("===> check_positive (cond1, cond2, cond3, cond4) = (0x%X 0x%X 0x%X 0x%X)\n", cond1, cond2, cond3, cond4));
-	PHYDM_DBG(p_dm, ODM_COMP_INIT,
-	("===> check_positive (driver1, driver2, driver3, driver4) = (0x%X 0x%X 0x%X 0x%X)\n", driver1, driver2, driver3, driver4));
+	PHYDM_DBG(dm, ODM_COMP_INIT,
+		  "===> %s (cond1, cond2, cond3, cond4) = (0x%X 0x%X 0x%X 0x%X)\n",
+		  __func__, cond1, cond2, cond3, cond4);
+	PHYDM_DBG(dm, ODM_COMP_INIT,
+		  "===> %s (driver1, driver2, driver3, driver4) = (0x%X 0x%X 0x%X 0x%X)\n",
+		  __func__, driver1, driver2, driver3, driver4);
 
-	PHYDM_DBG(p_dm, ODM_COMP_INIT,
-	("	(Platform, Interface) = (0x%X, 0x%X)\n", p_dm->support_platform, p_dm->support_interface));
-	PHYDM_DBG(p_dm, ODM_COMP_INIT,
-	("	(Board, Package) = (0x%X, 0x%X)\n", p_dm->board_type, p_dm->package_type));
+	PHYDM_DBG(dm, ODM_COMP_INIT,
+		  "	(Platform, Interface) = (0x%X, 0x%X)\n",
+		  dm->support_platform, dm->support_interface);
+	PHYDM_DBG(dm, ODM_COMP_INIT,
+		  "	(Board, Package) = (0x%X, 0x%X)\n", dm->board_type,
+		  dm->package_type);
 
 
 	/*============== value Defined Check ===============*/
@@ -108,7 +112,7 @@ check_positive(
 }
 static boolean
 check_negative(
-	struct PHY_DM_STRUCT *p_dm,
+	struct dm_struct *dm,
 	const u32	condition1,
 	const u32	condition2
 )
@@ -238,19 +242,17 @@ u32 array_mp_8723d_mac_reg[] = {
 };
 
 void
-odm_read_and_config_mp_8723d_mac_reg(
-	struct	PHY_DM_STRUCT *p_dm
-)
+odm_read_and_config_mp_8723d_mac_reg(struct dm_struct *dm)
 {
 	u32	i = 0;
 	u8	c_cond;
 	boolean	is_matched = true, is_skipped = false;
-	u32	array_len = sizeof(array_mp_8723d_mac_reg)/sizeof(u32);
+	u32	array_len = sizeof(array_mp_8723d_mac_reg) / sizeof(u32);
 	u32	*array = array_mp_8723d_mac_reg;
 
 	u32	v1 = 0, v2 = 0, pre_v1 = 0, pre_v2 = 0;
 
-	PHYDM_DBG(p_dm, ODM_COMP_INIT, ("===> odm_read_and_config_mp_8723d_mac_reg\n"));
+	PHYDM_DBG(dm, ODM_COMP_INIT, "===> %s\n", __func__);
 
 	while ((i + 1) < array_len) {
 		v1 = array[i];
@@ -258,22 +260,22 @@ odm_read_and_config_mp_8723d_mac_reg(
 
 		if (v1 & (BIT(31) | BIT(30))) {/*positive & negative condition*/
 			if (v1 & BIT(31)) {/* positive condition*/
-				c_cond  = (u8)((v1 & (BIT(29)|BIT(28))) >> 28);
+				c_cond  = (u8)((v1 & (BIT(29) | BIT(28))) >> 28);
 				if (c_cond == COND_ENDIF) {/*end*/
 					is_matched = true;
 					is_skipped = false;
-					PHYDM_DBG(p_dm, ODM_COMP_INIT, ("ENDIF\n"));
+					PHYDM_DBG(dm, ODM_COMP_INIT, "ENDIF\n");
 				} else if (c_cond == COND_ELSE) { /*else*/
-					is_matched = is_skipped?false:true;
-					PHYDM_DBG(p_dm, ODM_COMP_INIT, ("ELSE\n"));
+					is_matched = is_skipped ? false : true;
+					PHYDM_DBG(dm, ODM_COMP_INIT, "ELSE\n");
 				} else {/*if , else if*/
 					pre_v1 = v1;
 					pre_v2 = v2;
-					PHYDM_DBG(p_dm, ODM_COMP_INIT, ("IF or ELSE IF\n"));
+					PHYDM_DBG(dm, ODM_COMP_INIT, "IF or ELSE IF\n");
 				}
 			} else if (v1 & BIT(30)) { /*negative condition*/
 				if (is_skipped == false) {
-					if (check_positive(p_dm, pre_v1, pre_v2, v1, v2)) {
+					if (check_positive(dm, pre_v1, pre_v2, v1, v2)) {
 						is_matched = true;
 						is_skipped = true;
 					} else {
@@ -285,7 +287,7 @@ odm_read_and_config_mp_8723d_mac_reg(
 			}
 		} else {
 			if (is_matched)
-				odm_config_mac_8723d(p_dm, v1, (u8)v2);
+				odm_config_mac_8723d(dm, v1, (u8)v2);
 		}
 		i = i + 2;
 	}
diff --git a/rtl8723DS/hal/phydm/rtl8723d/halhwimg8723d_mac.h b/rtl8723DS/hal/phydm/rtl8723d/halhwimg8723d_mac.h
index 99236a7..576d12d 100755..100644
--- a/rtl8723DS/hal/phydm/rtl8723d/halhwimg8723d_mac.h
+++ b/rtl8723DS/hal/phydm/rtl8723d/halhwimg8723d_mac.h
@@ -24,10 +24,9 @@
 ******************************************************************************/
 
 void
-odm_read_and_config_mp_8723d_mac_reg(/* tc: Test Chip, mp: mp Chip*/
-	struct	PHY_DM_STRUCT *p_dm
-);
-u32	odm_get_version_mp_8723d_mac_reg(void);
+odm_read_and_config_mp_8723d_mac_reg( /* tc: Test Chip, mp: mp Chip*/
+				     struct dm_struct *dm);
+u32 odm_get_version_mp_8723d_mac_reg(void);
 
 #endif
 #endif /* end of HWIMG_SUPPORT*/
diff --git a/rtl8723DS/hal/phydm/rtl8723d/halhwimg8723d_rf.c b/rtl8723DS/hal/phydm/rtl8723d/halhwimg8723d_rf.c
index 47f6fc2..fbfd1e3 100755..100644
--- a/rtl8723DS/hal/phydm/rtl8723d/halhwimg8723d_rf.c
+++ b/rtl8723DS/hal/phydm/rtl8723d/halhwimg8723d_rf.c
@@ -20,54 +20,58 @@
 #if (RTL8723D_SUPPORT == 1)
 static boolean
 check_positive(
-	struct PHY_DM_STRUCT *p_dm,
+	struct dm_struct *dm,
 	const u32	condition1,
 	const u32	condition2,
 	const u32	condition3,
 	const u32	condition4
 )
 {
-	u8	_board_type = ((p_dm->board_type & BIT(4)) >> 4) << 0 | /* _GLNA*/
-			((p_dm->board_type & BIT(3)) >> 3) << 1 | /* _GPA*/
-			((p_dm->board_type & BIT(7)) >> 7) << 2 | /* _ALNA*/
-			((p_dm->board_type & BIT(6)) >> 6) << 3 | /* _APA */
-			((p_dm->board_type & BIT(2)) >> 2) << 4 | /* _BT*/
-			((p_dm->board_type & BIT(1)) >> 1) << 5 | /* _NGFF*/
-			((p_dm->board_type & BIT(5)) >> 5) << 6;  /* _TRSWT*/
+	u8	_board_type = ((dm->board_type & BIT(4)) >> 4) << 0 | /* _GLNA*/
+			((dm->board_type & BIT(3)) >> 3) << 1 | /* _GPA*/
+			((dm->board_type & BIT(7)) >> 7) << 2 | /* _ALNA*/
+			((dm->board_type & BIT(6)) >> 6) << 3 | /* _APA */
+			((dm->board_type & BIT(2)) >> 2) << 4 | /* _BT*/
+			((dm->board_type & BIT(1)) >> 1) << 5 | /* _NGFF*/
+			((dm->board_type & BIT(5)) >> 5) << 6;  /* _TRSWT*/
 
 	u32	cond1 = condition1, cond2 = condition2, cond3 = condition3, cond4 = condition4;
 
-	u8	cut_version_for_para = (p_dm->cut_version ==  ODM_CUT_A) ? 15 : p_dm->cut_version;
-	u8	pkg_type_for_para = (p_dm->package_type == 0) ? 15 : p_dm->package_type;
+	u8	cut_version_for_para = (dm->cut_version ==  ODM_CUT_A) ? 15 : dm->cut_version;
+	u8	pkg_type_for_para = (dm->package_type == 0) ? 15 : dm->package_type;
 
 	u32	driver1 = cut_version_for_para << 24 |
-			(p_dm->support_interface & 0xF0) << 16 |
-			p_dm->support_platform << 16 |
+			(dm->support_interface & 0xF0) << 16 |
+			dm->support_platform << 16 |
 			pkg_type_for_para << 12 |
-			(p_dm->support_interface & 0x0F) << 8  |
+			(dm->support_interface & 0x0F) << 8  |
 			_board_type;
 
-	u32	driver2 = (p_dm->type_glna & 0xFF) <<  0 |
-			(p_dm->type_gpa & 0xFF)  <<  8 |
-			(p_dm->type_alna & 0xFF) << 16 |
-			(p_dm->type_apa & 0xFF)  << 24;
+	u32	driver2 = (dm->type_glna & 0xFF) <<  0 |
+			(dm->type_gpa & 0xFF)  <<  8 |
+			(dm->type_alna & 0xFF) << 16 |
+			(dm->type_apa & 0xFF)  << 24;
 
 	u32	driver3 = 0;
 
-	u32	driver4 = (p_dm->type_glna & 0xFF00) >>  8 |
-			(p_dm->type_gpa & 0xFF00) |
-			(p_dm->type_alna & 0xFF00) << 8 |
-			(p_dm->type_apa & 0xFF00)  << 16;
+	u32	driver4 = (dm->type_glna & 0xFF00) >>  8 |
+			(dm->type_gpa & 0xFF00) |
+			(dm->type_alna & 0xFF00) << 8 |
+			(dm->type_apa & 0xFF00)  << 16;
 
-	PHYDM_DBG(p_dm, ODM_COMP_INIT,
-	("===> check_positive (cond1, cond2, cond3, cond4) = (0x%X 0x%X 0x%X 0x%X)\n", cond1, cond2, cond3, cond4));
-	PHYDM_DBG(p_dm, ODM_COMP_INIT,
-	("===> check_positive (driver1, driver2, driver3, driver4) = (0x%X 0x%X 0x%X 0x%X)\n", driver1, driver2, driver3, driver4));
+	PHYDM_DBG(dm, ODM_COMP_INIT,
+		  "===> %s (cond1, cond2, cond3, cond4) = (0x%X 0x%X 0x%X 0x%X)\n",
+		  __func__, cond1, cond2, cond3, cond4);
+	PHYDM_DBG(dm, ODM_COMP_INIT,
+		  "===> %s (driver1, driver2, driver3, driver4) = (0x%X 0x%X 0x%X 0x%X)\n",
+		  __func__, driver1, driver2, driver3, driver4);
 
-	PHYDM_DBG(p_dm, ODM_COMP_INIT,
-	("	(Platform, Interface) = (0x%X, 0x%X)\n", p_dm->support_platform, p_dm->support_interface));
-	PHYDM_DBG(p_dm, ODM_COMP_INIT,
-	("	(Board, Package) = (0x%X, 0x%X)\n", p_dm->board_type, p_dm->package_type));
+	PHYDM_DBG(dm, ODM_COMP_INIT,
+		  "	(Platform, Interface) = (0x%X, 0x%X)\n",
+		  dm->support_platform, dm->support_interface);
+	PHYDM_DBG(dm, ODM_COMP_INIT,
+		  "	(Board, Package) = (0x%X, 0x%X)\n", dm->board_type,
+		  dm->package_type);
 
 
 	/*============== value Defined Check ===============*/
@@ -108,7 +112,7 @@ check_positive(
 }
 static boolean
 check_negative(
-	struct PHY_DM_STRUCT *p_dm,
+	struct dm_struct *dm,
 	const u32	condition1,
 	const u32	condition2
 )
@@ -304,19 +308,17 @@ u32 array_mp_8723d_radioa[] = {
 };
 
 void
-odm_read_and_config_mp_8723d_radioa(
-	struct	PHY_DM_STRUCT *p_dm
-)
+odm_read_and_config_mp_8723d_radioa(struct dm_struct *dm)
 {
 	u32	i = 0;
 	u8	c_cond;
 	boolean	is_matched = true, is_skipped = false;
-	u32	array_len = sizeof(array_mp_8723d_radioa)/sizeof(u32);
+	u32	array_len = sizeof(array_mp_8723d_radioa) / sizeof(u32);
 	u32	*array = array_mp_8723d_radioa;
 
 	u32	v1 = 0, v2 = 0, pre_v1 = 0, pre_v2 = 0;
 
-	PHYDM_DBG(p_dm, ODM_COMP_INIT, ("===> odm_read_and_config_mp_8723d_radioa\n"));
+	PHYDM_DBG(dm, ODM_COMP_INIT, "===> %s\n", __func__);
 
 	while ((i + 1) < array_len) {
 		v1 = array[i];
@@ -324,22 +326,22 @@ odm_read_and_config_mp_8723d_radioa(
 
 		if (v1 & (BIT(31) | BIT(30))) {/*positive & negative condition*/
 			if (v1 & BIT(31)) {/* positive condition*/
-				c_cond  = (u8)((v1 & (BIT(29)|BIT(28))) >> 28);
+				c_cond  = (u8)((v1 & (BIT(29) | BIT(28))) >> 28);
 				if (c_cond == COND_ENDIF) {/*end*/
 					is_matched = true;
 					is_skipped = false;
-					PHYDM_DBG(p_dm, ODM_COMP_INIT, ("ENDIF\n"));
+					PHYDM_DBG(dm, ODM_COMP_INIT, "ENDIF\n");
 				} else if (c_cond == COND_ELSE) { /*else*/
-					is_matched = is_skipped?false:true;
-					PHYDM_DBG(p_dm, ODM_COMP_INIT, ("ELSE\n"));
+					is_matched = is_skipped ? false : true;
+					PHYDM_DBG(dm, ODM_COMP_INIT, "ELSE\n");
 				} else {/*if , else if*/
 					pre_v1 = v1;
 					pre_v2 = v2;
-					PHYDM_DBG(p_dm, ODM_COMP_INIT, ("IF or ELSE IF\n"));
+					PHYDM_DBG(dm, ODM_COMP_INIT, "IF or ELSE IF\n");
 				}
 			} else if (v1 & BIT(30)) { /*negative condition*/
 				if (is_skipped == false) {
-					if (check_positive(p_dm, pre_v1, pre_v2, v1, v2)) {
+					if (check_positive(dm, pre_v1, pre_v2, v1, v2)) {
 						is_matched = true;
 						is_skipped = true;
 					} else {
@@ -351,7 +353,7 @@ odm_read_and_config_mp_8723d_radioa(
 			}
 		} else {
 			if (is_matched)
-				odm_config_rf_radio_a_8723d(p_dm, v1, v2);
+				odm_config_rf_radio_a_8723d(dm, v1, v2);
 		}
 		i = i + 2;
 	}
@@ -399,30 +401,28 @@ u8 g_delta_swing_table_idx_mp_2g_cck_a_p_txpowertrack_pcie_8723d[] = {0, 0, 1, 1
 #endif
 
 void
-odm_read_and_config_mp_8723d_txpowertrack_pcie(
-	struct PHY_DM_STRUCT	 *p_dm
-)
+odm_read_and_config_mp_8723d_txpowertrack_pcie(struct dm_struct *dm)
 {
 #if DEV_BUS_TYPE == RT_PCI_INTERFACE
-	struct odm_rf_calibration_structure  *p_rf_calibrate_info = &(p_dm->rf_calibrate_info);
+	struct dm_rf_calibration_struct  *cali_info = &(dm->rf_calibrate_info);
 
-	PHYDM_DBG(p_dm, ODM_COMP_INIT, ("===> ODM_ReadAndConfig_MP_mp_8723d\n"));
+	PHYDM_DBG(dm, ODM_COMP_INIT, "===> ODM_ReadAndConfig_MP_mp_8723d\n");
 
 
-	odm_move_memory(p_dm, p_rf_calibrate_info->delta_swing_table_idx_2ga_p, g_delta_swing_table_idx_mp_2ga_p_txpowertrack_pcie_8723d, DELTA_SWINGIDX_SIZE);
-	odm_move_memory(p_dm, p_rf_calibrate_info->delta_swing_table_idx_2ga_n, g_delta_swing_table_idx_mp_2ga_n_txpowertrack_pcie_8723d, DELTA_SWINGIDX_SIZE);
-	odm_move_memory(p_dm, p_rf_calibrate_info->delta_swing_table_idx_2gb_p, g_delta_swing_table_idx_mp_2gb_p_txpowertrack_pcie_8723d, DELTA_SWINGIDX_SIZE);
-	odm_move_memory(p_dm, p_rf_calibrate_info->delta_swing_table_idx_2gb_n, g_delta_swing_table_idx_mp_2gb_n_txpowertrack_pcie_8723d, DELTA_SWINGIDX_SIZE);
+	odm_move_memory(dm, cali_info->delta_swing_table_idx_2ga_p, g_delta_swing_table_idx_mp_2ga_p_txpowertrack_pcie_8723d, DELTA_SWINGIDX_SIZE);
+	odm_move_memory(dm, cali_info->delta_swing_table_idx_2ga_n, g_delta_swing_table_idx_mp_2ga_n_txpowertrack_pcie_8723d, DELTA_SWINGIDX_SIZE);
+	odm_move_memory(dm, cali_info->delta_swing_table_idx_2gb_p, g_delta_swing_table_idx_mp_2gb_p_txpowertrack_pcie_8723d, DELTA_SWINGIDX_SIZE);
+	odm_move_memory(dm, cali_info->delta_swing_table_idx_2gb_n, g_delta_swing_table_idx_mp_2gb_n_txpowertrack_pcie_8723d, DELTA_SWINGIDX_SIZE);
 
-	odm_move_memory(p_dm, p_rf_calibrate_info->delta_swing_table_idx_2g_cck_a_p, g_delta_swing_table_idx_mp_2g_cck_a_p_txpowertrack_pcie_8723d, DELTA_SWINGIDX_SIZE);
-	odm_move_memory(p_dm, p_rf_calibrate_info->delta_swing_table_idx_2g_cck_a_n, g_delta_swing_table_idx_mp_2g_cck_a_n_txpowertrack_pcie_8723d, DELTA_SWINGIDX_SIZE);
-	odm_move_memory(p_dm, p_rf_calibrate_info->delta_swing_table_idx_2g_cck_b_p, g_delta_swing_table_idx_mp_2g_cck_b_p_txpowertrack_pcie_8723d, DELTA_SWINGIDX_SIZE);
-	odm_move_memory(p_dm, p_rf_calibrate_info->delta_swing_table_idx_2g_cck_b_n, g_delta_swing_table_idx_mp_2g_cck_b_n_txpowertrack_pcie_8723d, DELTA_SWINGIDX_SIZE);
+	odm_move_memory(dm, cali_info->delta_swing_table_idx_2g_cck_a_p, g_delta_swing_table_idx_mp_2g_cck_a_p_txpowertrack_pcie_8723d, DELTA_SWINGIDX_SIZE);
+	odm_move_memory(dm, cali_info->delta_swing_table_idx_2g_cck_a_n, g_delta_swing_table_idx_mp_2g_cck_a_n_txpowertrack_pcie_8723d, DELTA_SWINGIDX_SIZE);
+	odm_move_memory(dm, cali_info->delta_swing_table_idx_2g_cck_b_p, g_delta_swing_table_idx_mp_2g_cck_b_p_txpowertrack_pcie_8723d, DELTA_SWINGIDX_SIZE);
+	odm_move_memory(dm, cali_info->delta_swing_table_idx_2g_cck_b_n, g_delta_swing_table_idx_mp_2g_cck_b_n_txpowertrack_pcie_8723d, DELTA_SWINGIDX_SIZE);
 
-	odm_move_memory(p_dm, p_rf_calibrate_info->delta_swing_table_idx_5ga_p, g_delta_swing_table_idx_mp_5ga_p_txpowertrack_pcie_8723d, DELTA_SWINGIDX_SIZE*3);
-	odm_move_memory(p_dm, p_rf_calibrate_info->delta_swing_table_idx_5ga_n, g_delta_swing_table_idx_mp_5ga_n_txpowertrack_pcie_8723d, DELTA_SWINGIDX_SIZE*3);
-	odm_move_memory(p_dm, p_rf_calibrate_info->delta_swing_table_idx_5gb_p, g_delta_swing_table_idx_mp_5gb_p_txpowertrack_pcie_8723d, DELTA_SWINGIDX_SIZE*3);
-	odm_move_memory(p_dm, p_rf_calibrate_info->delta_swing_table_idx_5gb_n, g_delta_swing_table_idx_mp_5gb_n_txpowertrack_pcie_8723d, DELTA_SWINGIDX_SIZE*3);
+	odm_move_memory(dm, cali_info->delta_swing_table_idx_5ga_p, g_delta_swing_table_idx_mp_5ga_p_txpowertrack_pcie_8723d, DELTA_SWINGIDX_SIZE * 3);
+	odm_move_memory(dm, cali_info->delta_swing_table_idx_5ga_n, g_delta_swing_table_idx_mp_5ga_n_txpowertrack_pcie_8723d, DELTA_SWINGIDX_SIZE * 3);
+	odm_move_memory(dm, cali_info->delta_swing_table_idx_5gb_p, g_delta_swing_table_idx_mp_5gb_p_txpowertrack_pcie_8723d, DELTA_SWINGIDX_SIZE * 3);
+	odm_move_memory(dm, cali_info->delta_swing_table_idx_5gb_n, g_delta_swing_table_idx_mp_5gb_n_txpowertrack_pcie_8723d, DELTA_SWINGIDX_SIZE * 3);
 #endif
 }
 
@@ -462,30 +462,28 @@ u8 g_delta_swing_table_idx_mp_2g_cck_a_p_txpowertrack_sdio_8723d[] = {0, 0, 1, 1
 #endif
 
 void
-odm_read_and_config_mp_8723d_txpowertrack_sdio(
-	struct PHY_DM_STRUCT	 *p_dm
-)
+odm_read_and_config_mp_8723d_txpowertrack_sdio(struct dm_struct *dm)
 {
 #if DEV_BUS_TYPE == RT_SDIO_INTERFACE
-	struct odm_rf_calibration_structure  *p_rf_calibrate_info = &(p_dm->rf_calibrate_info);
+	struct dm_rf_calibration_struct  *cali_info = &(dm->rf_calibrate_info);
 
-	PHYDM_DBG(p_dm, ODM_COMP_INIT, ("===> ODM_ReadAndConfig_MP_mp_8723d\n"));
+	PHYDM_DBG(dm, ODM_COMP_INIT, "===> ODM_ReadAndConfig_MP_mp_8723d\n");
 
 
-	odm_move_memory(p_dm, p_rf_calibrate_info->delta_swing_table_idx_2ga_p, g_delta_swing_table_idx_mp_2ga_p_txpowertrack_sdio_8723d, DELTA_SWINGIDX_SIZE);
-	odm_move_memory(p_dm, p_rf_calibrate_info->delta_swing_table_idx_2ga_n, g_delta_swing_table_idx_mp_2ga_n_txpowertrack_sdio_8723d, DELTA_SWINGIDX_SIZE);
-	odm_move_memory(p_dm, p_rf_calibrate_info->delta_swing_table_idx_2gb_p, g_delta_swing_table_idx_mp_2gb_p_txpowertrack_sdio_8723d, DELTA_SWINGIDX_SIZE);
-	odm_move_memory(p_dm, p_rf_calibrate_info->delta_swing_table_idx_2gb_n, g_delta_swing_table_idx_mp_2gb_n_txpowertrack_sdio_8723d, DELTA_SWINGIDX_SIZE);
+	odm_move_memory(dm, cali_info->delta_swing_table_idx_2ga_p, g_delta_swing_table_idx_mp_2ga_p_txpowertrack_sdio_8723d, DELTA_SWINGIDX_SIZE);
+	odm_move_memory(dm, cali_info->delta_swing_table_idx_2ga_n, g_delta_swing_table_idx_mp_2ga_n_txpowertrack_sdio_8723d, DELTA_SWINGIDX_SIZE);
+	odm_move_memory(dm, cali_info->delta_swing_table_idx_2gb_p, g_delta_swing_table_idx_mp_2gb_p_txpowertrack_sdio_8723d, DELTA_SWINGIDX_SIZE);
+	odm_move_memory(dm, cali_info->delta_swing_table_idx_2gb_n, g_delta_swing_table_idx_mp_2gb_n_txpowertrack_sdio_8723d, DELTA_SWINGIDX_SIZE);
 
-	odm_move_memory(p_dm, p_rf_calibrate_info->delta_swing_table_idx_2g_cck_a_p, g_delta_swing_table_idx_mp_2g_cck_a_p_txpowertrack_sdio_8723d, DELTA_SWINGIDX_SIZE);
-	odm_move_memory(p_dm, p_rf_calibrate_info->delta_swing_table_idx_2g_cck_a_n, g_delta_swing_table_idx_mp_2g_cck_a_n_txpowertrack_sdio_8723d, DELTA_SWINGIDX_SIZE);
-	odm_move_memory(p_dm, p_rf_calibrate_info->delta_swing_table_idx_2g_cck_b_p, g_delta_swing_table_idx_mp_2g_cck_b_p_txpowertrack_sdio_8723d, DELTA_SWINGIDX_SIZE);
-	odm_move_memory(p_dm, p_rf_calibrate_info->delta_swing_table_idx_2g_cck_b_n, g_delta_swing_table_idx_mp_2g_cck_b_n_txpowertrack_sdio_8723d, DELTA_SWINGIDX_SIZE);
+	odm_move_memory(dm, cali_info->delta_swing_table_idx_2g_cck_a_p, g_delta_swing_table_idx_mp_2g_cck_a_p_txpowertrack_sdio_8723d, DELTA_SWINGIDX_SIZE);
+	odm_move_memory(dm, cali_info->delta_swing_table_idx_2g_cck_a_n, g_delta_swing_table_idx_mp_2g_cck_a_n_txpowertrack_sdio_8723d, DELTA_SWINGIDX_SIZE);
+	odm_move_memory(dm, cali_info->delta_swing_table_idx_2g_cck_b_p, g_delta_swing_table_idx_mp_2g_cck_b_p_txpowertrack_sdio_8723d, DELTA_SWINGIDX_SIZE);
+	odm_move_memory(dm, cali_info->delta_swing_table_idx_2g_cck_b_n, g_delta_swing_table_idx_mp_2g_cck_b_n_txpowertrack_sdio_8723d, DELTA_SWINGIDX_SIZE);
 
-	odm_move_memory(p_dm, p_rf_calibrate_info->delta_swing_table_idx_5ga_p, g_delta_swing_table_idx_mp_5ga_p_txpowertrack_sdio_8723d, DELTA_SWINGIDX_SIZE*3);
-	odm_move_memory(p_dm, p_rf_calibrate_info->delta_swing_table_idx_5ga_n, g_delta_swing_table_idx_mp_5ga_n_txpowertrack_sdio_8723d, DELTA_SWINGIDX_SIZE*3);
-	odm_move_memory(p_dm, p_rf_calibrate_info->delta_swing_table_idx_5gb_p, g_delta_swing_table_idx_mp_5gb_p_txpowertrack_sdio_8723d, DELTA_SWINGIDX_SIZE*3);
-	odm_move_memory(p_dm, p_rf_calibrate_info->delta_swing_table_idx_5gb_n, g_delta_swing_table_idx_mp_5gb_n_txpowertrack_sdio_8723d, DELTA_SWINGIDX_SIZE*3);
+	odm_move_memory(dm, cali_info->delta_swing_table_idx_5ga_p, g_delta_swing_table_idx_mp_5ga_p_txpowertrack_sdio_8723d, DELTA_SWINGIDX_SIZE * 3);
+	odm_move_memory(dm, cali_info->delta_swing_table_idx_5ga_n, g_delta_swing_table_idx_mp_5ga_n_txpowertrack_sdio_8723d, DELTA_SWINGIDX_SIZE * 3);
+	odm_move_memory(dm, cali_info->delta_swing_table_idx_5gb_p, g_delta_swing_table_idx_mp_5gb_p_txpowertrack_sdio_8723d, DELTA_SWINGIDX_SIZE * 3);
+	odm_move_memory(dm, cali_info->delta_swing_table_idx_5gb_n, g_delta_swing_table_idx_mp_5gb_n_txpowertrack_sdio_8723d, DELTA_SWINGIDX_SIZE * 3);
 #endif
 }
 
@@ -525,30 +523,28 @@ u8 g_delta_swing_table_idx_mp_2g_cck_a_p_txpowertrack_usb_8723d[] = {0, 0, 1, 1,
 #endif
 
 void
-odm_read_and_config_mp_8723d_txpowertrack_usb(
-	struct PHY_DM_STRUCT	 *p_dm
-)
+odm_read_and_config_mp_8723d_txpowertrack_usb(struct dm_struct *dm)
 {
 #if DEV_BUS_TYPE == RT_USB_INTERFACE
-	struct odm_rf_calibration_structure  *p_rf_calibrate_info = &(p_dm->rf_calibrate_info);
+	struct dm_rf_calibration_struct  *cali_info = &(dm->rf_calibrate_info);
 
-	PHYDM_DBG(p_dm, ODM_COMP_INIT, ("===> ODM_ReadAndConfig_MP_mp_8723d\n"));
+	PHYDM_DBG(dm, ODM_COMP_INIT, "===> ODM_ReadAndConfig_MP_mp_8723d\n");
 
 
-	odm_move_memory(p_dm, p_rf_calibrate_info->delta_swing_table_idx_2ga_p, g_delta_swing_table_idx_mp_2ga_p_txpowertrack_usb_8723d, DELTA_SWINGIDX_SIZE);
-	odm_move_memory(p_dm, p_rf_calibrate_info->delta_swing_table_idx_2ga_n, g_delta_swing_table_idx_mp_2ga_n_txpowertrack_usb_8723d, DELTA_SWINGIDX_SIZE);
-	odm_move_memory(p_dm, p_rf_calibrate_info->delta_swing_table_idx_2gb_p, g_delta_swing_table_idx_mp_2gb_p_txpowertrack_usb_8723d, DELTA_SWINGIDX_SIZE);
-	odm_move_memory(p_dm, p_rf_calibrate_info->delta_swing_table_idx_2gb_n, g_delta_swing_table_idx_mp_2gb_n_txpowertrack_usb_8723d, DELTA_SWINGIDX_SIZE);
+	odm_move_memory(dm, cali_info->delta_swing_table_idx_2ga_p, g_delta_swing_table_idx_mp_2ga_p_txpowertrack_usb_8723d, DELTA_SWINGIDX_SIZE);
+	odm_move_memory(dm, cali_info->delta_swing_table_idx_2ga_n, g_delta_swing_table_idx_mp_2ga_n_txpowertrack_usb_8723d, DELTA_SWINGIDX_SIZE);
+	odm_move_memory(dm, cali_info->delta_swing_table_idx_2gb_p, g_delta_swing_table_idx_mp_2gb_p_txpowertrack_usb_8723d, DELTA_SWINGIDX_SIZE);
+	odm_move_memory(dm, cali_info->delta_swing_table_idx_2gb_n, g_delta_swing_table_idx_mp_2gb_n_txpowertrack_usb_8723d, DELTA_SWINGIDX_SIZE);
 
-	odm_move_memory(p_dm, p_rf_calibrate_info->delta_swing_table_idx_2g_cck_a_p, g_delta_swing_table_idx_mp_2g_cck_a_p_txpowertrack_usb_8723d, DELTA_SWINGIDX_SIZE);
-	odm_move_memory(p_dm, p_rf_calibrate_info->delta_swing_table_idx_2g_cck_a_n, g_delta_swing_table_idx_mp_2g_cck_a_n_txpowertrack_usb_8723d, DELTA_SWINGIDX_SIZE);
-	odm_move_memory(p_dm, p_rf_calibrate_info->delta_swing_table_idx_2g_cck_b_p, g_delta_swing_table_idx_mp_2g_cck_b_p_txpowertrack_usb_8723d, DELTA_SWINGIDX_SIZE);
-	odm_move_memory(p_dm, p_rf_calibrate_info->delta_swing_table_idx_2g_cck_b_n, g_delta_swing_table_idx_mp_2g_cck_b_n_txpowertrack_usb_8723d, DELTA_SWINGIDX_SIZE);
+	odm_move_memory(dm, cali_info->delta_swing_table_idx_2g_cck_a_p, g_delta_swing_table_idx_mp_2g_cck_a_p_txpowertrack_usb_8723d, DELTA_SWINGIDX_SIZE);
+	odm_move_memory(dm, cali_info->delta_swing_table_idx_2g_cck_a_n, g_delta_swing_table_idx_mp_2g_cck_a_n_txpowertrack_usb_8723d, DELTA_SWINGIDX_SIZE);
+	odm_move_memory(dm, cali_info->delta_swing_table_idx_2g_cck_b_p, g_delta_swing_table_idx_mp_2g_cck_b_p_txpowertrack_usb_8723d, DELTA_SWINGIDX_SIZE);
+	odm_move_memory(dm, cali_info->delta_swing_table_idx_2g_cck_b_n, g_delta_swing_table_idx_mp_2g_cck_b_n_txpowertrack_usb_8723d, DELTA_SWINGIDX_SIZE);
 
-	odm_move_memory(p_dm, p_rf_calibrate_info->delta_swing_table_idx_5ga_p, g_delta_swing_table_idx_mp_5ga_p_txpowertrack_usb_8723d, DELTA_SWINGIDX_SIZE*3);
-	odm_move_memory(p_dm, p_rf_calibrate_info->delta_swing_table_idx_5ga_n, g_delta_swing_table_idx_mp_5ga_n_txpowertrack_usb_8723d, DELTA_SWINGIDX_SIZE*3);
-	odm_move_memory(p_dm, p_rf_calibrate_info->delta_swing_table_idx_5gb_p, g_delta_swing_table_idx_mp_5gb_p_txpowertrack_usb_8723d, DELTA_SWINGIDX_SIZE*3);
-	odm_move_memory(p_dm, p_rf_calibrate_info->delta_swing_table_idx_5gb_n, g_delta_swing_table_idx_mp_5gb_n_txpowertrack_usb_8723d, DELTA_SWINGIDX_SIZE*3);
+	odm_move_memory(dm, cali_info->delta_swing_table_idx_5ga_p, g_delta_swing_table_idx_mp_5ga_p_txpowertrack_usb_8723d, DELTA_SWINGIDX_SIZE * 3);
+	odm_move_memory(dm, cali_info->delta_swing_table_idx_5ga_n, g_delta_swing_table_idx_mp_5ga_n_txpowertrack_usb_8723d, DELTA_SWINGIDX_SIZE * 3);
+	odm_move_memory(dm, cali_info->delta_swing_table_idx_5gb_p, g_delta_swing_table_idx_mp_5gb_p_txpowertrack_usb_8723d, DELTA_SWINGIDX_SIZE * 3);
+	odm_move_memory(dm, cali_info->delta_swing_table_idx_5gb_n, g_delta_swing_table_idx_mp_5gb_n_txpowertrack_usb_8723d, DELTA_SWINGIDX_SIZE * 3);
 #endif
 }
 
@@ -1124,55 +1120,52 @@ const char *array_mp_8723d_txpwr_lmt[] = {
 };
 
 void
-odm_read_and_config_mp_8723d_txpwr_lmt(
-	struct PHY_DM_STRUCT	*p_dm
-)
+odm_read_and_config_mp_8723d_txpwr_lmt(struct dm_struct *dm)
 {
 	u32	i = 0;
 #if (DM_ODM_SUPPORT_TYPE == ODM_IOT)
-	u32	array_len = sizeof(array_mp_8723d_txpwr_lmt)/sizeof(u8);
+	u32	array_len = sizeof(array_mp_8723d_txpwr_lmt) / sizeof(u8);
 	u8	*array = (u8 *)array_mp_8723d_txpwr_lmt;
 #else
-	u32	array_len = sizeof(array_mp_8723d_txpwr_lmt)/sizeof(u8 *);
+	u32	array_len = sizeof(array_mp_8723d_txpwr_lmt) / sizeof(u8 *);
 	u8	**array = (u8 **)array_mp_8723d_txpwr_lmt;
 #endif
 
 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
-	struct _ADAPTER	*adapter = p_dm->adapter;
-	HAL_DATA_TYPE	*p_hal_data = GET_HAL_DATA(adapter);
+	void	*adapter = dm->adapter;
+	HAL_DATA_TYPE	*hal_data = GET_HAL_DATA(((PADAPTER)adapter));
 
-	PlatformZeroMemory(p_hal_data->BufOfLinesPwrLmt, MAX_LINES_HWCONFIG_TXT*MAX_BYTES_LINE_HWCONFIG_TXT);
-	p_hal_data->nLinesReadPwrLmt = array_len/7;
+	PlatformZeroMemory(hal_data->BufOfLinesPwrLmt, MAX_LINES_HWCONFIG_TXT * MAX_BYTES_LINE_HWCONFIG_TXT);
+	hal_data->nLinesReadPwrLmt = array_len / 7;
 #endif
 
-	PHYDM_DBG(p_dm, ODM_COMP_INIT, ("===> odm_read_and_config_mp_8723d_txpwr_lmt\n"));
+	PHYDM_DBG(dm, ODM_COMP_INIT, "===> %s\n", __func__);
 
 	for (i = 0; i < array_len; i += 7) {
 #if (DM_ODM_SUPPORT_TYPE == ODM_IOT)
 		u8	regulation = array[i];
-		u8	band = array[i+1];
-		u8	bandwidth = array[i+2];
-		u8	rate = array[i+3];
-		u8	rf_path = array[i+4];
-		u8	chnl = array[i+5];
-		u8	val = array[i+6];
+		u8	band = array[i + 1];
+		u8	bandwidth = array[i + 2];
+		u8	rate = array[i + 3];
+		u8	rf_path = array[i + 4];
+		u8	chnl = array[i + 5];
+		u8	val = array[i + 6];
 #else
 		u8	*regulation = array[i];
-		u8	*band = array[i+1];
-		u8	*bandwidth = array[i+2];
-		u8	*rate = array[i+3];
-		u8	*rf_path = array[i+4];
-		u8	*chnl = array[i+5];
-		u8	*val = array[i+6];
+		u8	*band = array[i + 1];
+		u8	*bandwidth = array[i + 2];
+		u8	*rate = array[i + 3];
+		u8	*rf_path = array[i + 4];
+		u8	*chnl = array[i + 5];
+		u8	*val = array[i + 6];
 #endif
 
-		odm_config_bb_txpwr_lmt_8723d(p_dm, regulation, band, bandwidth, rate, rf_path, chnl, val);
+		odm_config_bb_txpwr_lmt_8723d(dm, regulation, band, bandwidth, rate, rf_path, chnl, val);
 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
-		rsprintf((char *)p_hal_data->BufOfLinesPwrLmt[i/7], 100, "\"%s\", \"%s\", \"%s\", \"%s\", \"%s\", \"%s\", \"%s\",",
+		rsprintf((char *)hal_data->BufOfLinesPwrLmt[i / 7], 100, "\"%s\", \"%s\", \"%s\", \"%s\", \"%s\", \"%s\", \"%s\",",
 		regulation, band, bandwidth, rate, rf_path, chnl, val);
 #endif
 	}
-
 }
 
 /******************************************************************************
@@ -1183,17 +1176,15 @@ s8 g_delta_swing_table_xtal_mp_n_txxtaltrack_8723d[]    = {0, 0, 0, 0, 0, 0, 0,
 s8 g_delta_swing_table_xtal_mp_p_txxtaltrack_8723d[]    = {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, -10, -12, -14, -16, -16, -16, -16, -16, -16, -16, -16, -16, -16, -16};
 
 void
-odm_read_and_config_mp_8723d_txxtaltrack(
-	struct	PHY_DM_STRUCT *p_dm
-)
+odm_read_and_config_mp_8723d_txxtaltrack(struct dm_struct *dm)
 {
-	struct odm_rf_calibration_structure	*p_rf_calibrate_info = &(p_dm->rf_calibrate_info);
+	struct dm_rf_calibration_struct	*cali_info = &(dm->rf_calibrate_info);
 
-	PHYDM_DBG(p_dm, ODM_COMP_INIT, ("===> ODM_ReadAndConfig_MP_mp_8723d\n"));
+	PHYDM_DBG(dm, ODM_COMP_INIT, "===> ODM_ReadAndConfig_MP_mp_8723d\n");
 
 
-	odm_move_memory(p_dm, p_rf_calibrate_info->delta_swing_table_xtal_p, g_delta_swing_table_xtal_mp_p_txxtaltrack_8723d, DELTA_SWINGIDX_SIZE);
-	odm_move_memory(p_dm, p_rf_calibrate_info->delta_swing_table_xtal_n, g_delta_swing_table_xtal_mp_n_txxtaltrack_8723d, DELTA_SWINGIDX_SIZE);
+	odm_move_memory(dm, cali_info->delta_swing_table_xtal_p, g_delta_swing_table_xtal_mp_p_txxtaltrack_8723d, DELTA_SWINGIDX_SIZE);
+	odm_move_memory(dm, cali_info->delta_swing_table_xtal_n, g_delta_swing_table_xtal_mp_n_txxtaltrack_8723d, DELTA_SWINGIDX_SIZE);
 }
 
 #endif /* end of HWIMG_SUPPORT*/
diff --git a/rtl8723DS/hal/phydm/rtl8723d/halhwimg8723d_rf.h b/rtl8723DS/hal/phydm/rtl8723d/halhwimg8723d_rf.h
index b97529b..956f146 100755..100644
--- a/rtl8723DS/hal/phydm/rtl8723d/halhwimg8723d_rf.h
+++ b/rtl8723DS/hal/phydm/rtl8723d/halhwimg8723d_rf.h
@@ -24,19 +24,17 @@
 ******************************************************************************/
 
 void
-odm_read_and_config_mp_8723d_radioa(/* tc: Test Chip, mp: mp Chip*/
-	struct	PHY_DM_STRUCT *p_dm
-);
-u32	odm_get_version_mp_8723d_radioa(void);
+odm_read_and_config_mp_8723d_radioa( /* tc: Test Chip, mp: mp Chip*/
+				    struct dm_struct *dm);
+u32 odm_get_version_mp_8723d_radioa(void);
 
 /******************************************************************************
 *                           txpowertrack_pcie.TXT
 ******************************************************************************/
 
 void
-odm_read_and_config_mp_8723d_txpowertrack_pcie(/* tc: Test Chip, mp: mp Chip*/
-	struct	PHY_DM_STRUCT *p_dm
-);
+odm_read_and_config_mp_8723d_txpowertrack_pcie( /* tc: Test Chip, mp: mp Chip*/
+					       struct dm_struct *dm);
 u32	odm_get_version_mp_8723d_txpowertrack_pcie(void);
 
 /******************************************************************************
@@ -44,9 +42,8 @@ u32	odm_get_version_mp_8723d_txpowertrack_pcie(void);
 ******************************************************************************/
 
 void
-odm_read_and_config_mp_8723d_txpowertrack_sdio(/* tc: Test Chip, mp: mp Chip*/
-	struct	PHY_DM_STRUCT *p_dm
-);
+odm_read_and_config_mp_8723d_txpowertrack_sdio( /* tc: Test Chip, mp: mp Chip*/
+					       struct dm_struct *dm);
 u32	odm_get_version_mp_8723d_txpowertrack_sdio(void);
 
 /******************************************************************************
@@ -54,9 +51,8 @@ u32	odm_get_version_mp_8723d_txpowertrack_sdio(void);
 ******************************************************************************/
 
 void
-odm_read_and_config_mp_8723d_txpowertrack_usb(/* tc: Test Chip, mp: mp Chip*/
-	struct	PHY_DM_STRUCT *p_dm
-);
+odm_read_and_config_mp_8723d_txpowertrack_usb( /* tc: Test Chip, mp: mp Chip*/
+					      struct dm_struct *dm);
 u32	odm_get_version_mp_8723d_txpowertrack_usb(void);
 
 /******************************************************************************
@@ -64,9 +60,8 @@ u32	odm_get_version_mp_8723d_txpowertrack_usb(void);
 ******************************************************************************/
 
 void
-odm_read_and_config_mp_8723d_txpwr_lmt(/* tc: Test Chip, mp: mp Chip*/
-	struct	PHY_DM_STRUCT *p_dm
-);
+odm_read_and_config_mp_8723d_txpwr_lmt( /* tc: Test Chip, mp: mp Chip*/
+				       struct dm_struct *dm);
 u32	odm_get_version_mp_8723d_txpwr_lmt(void);
 
 /******************************************************************************
@@ -74,9 +69,8 @@ u32	odm_get_version_mp_8723d_txpwr_lmt(void);
 ******************************************************************************/
 
 void
-odm_read_and_config_mp_8723d_txxtaltrack(/* tc: Test Chip, mp: mp Chip*/
-	struct	PHY_DM_STRUCT *p_dm
-);
+odm_read_and_config_mp_8723d_txxtaltrack( /* tc: Test Chip, mp: mp Chip*/
+					 struct dm_struct *dm);
 u32	odm_get_version_mp_8723d_txxtaltrack(void);
 
 #endif
diff --git a/rtl8723DS/hal/phydm/rtl8723d/phydm_regconfig8723d.c b/rtl8723DS/hal/phydm/rtl8723d/phydm_regconfig8723d.c
index 0587e60..4f11f8a 100755..100644
--- a/rtl8723DS/hal/phydm/rtl8723d/phydm_regconfig8723d.c
+++ b/rtl8723DS/hal/phydm/rtl8723d/phydm_regconfig8723d.c
@@ -18,14 +18,8 @@
 
 #if (RTL8723D_SUPPORT == 1)
 
-void
-odm_config_rf_reg_8723d(
-	struct PHY_DM_STRUCT				*p_dm,
-	u32					addr,
-	u32					data,
-	enum rf_path     RF_PATH,
-	u32				    reg_addr
-)
+void odm_config_rf_reg_8723d(struct dm_struct *dm, u32 addr, u32 data,
+			     enum rf_path RF_PATH, u32 reg_addr)
 {
 	if (addr == 0xfe || addr == 0xffe) {
 #ifdef CONFIG_LONG_DELAY_ISSUE
@@ -34,80 +28,58 @@ odm_config_rf_reg_8723d(
 		ODM_delay_ms(50);
 #endif
 	} else {
-		odm_set_rf_reg(p_dm, RF_PATH, reg_addr, RFREGOFFSETMASK, data);
+		odm_set_rf_reg(dm, RF_PATH, reg_addr, RFREGOFFSETMASK, data);
 		/* Add 1us delay between BB/RF register setting. */
 		ODM_delay_us(1);
 	}
 }
 
-
-void
-odm_config_rf_radio_a_8723d(
-	struct PHY_DM_STRUCT				*p_dm,
-	u32					addr,
-	u32					data
-)
+void odm_config_rf_radio_a_8723d(struct dm_struct *dm, u32 addr, u32 data)
 {
-	u32  content = 0x1000; /* RF_Content: radioa_txt */
-	u32	maskfor_phy_set = (u32)(content & 0xE000);
+	u32 content = 0x1000; /* RF_Content: radioa_txt */
+	u32 maskfor_phy_set = (u32)(content & 0xE000);
 
-	odm_config_rf_reg_8723d(p_dm, addr, data, RF_PATH_A, addr | maskfor_phy_set);
+	odm_config_rf_reg_8723d(dm, addr, data, RF_PATH_A, addr | maskfor_phy_set);
 
-	PHYDM_DBG(p_dm, ODM_COMP_INIT, ("===> odm_config_rf_with_header_file: [RadioA] %08X %08X\n", addr, data));
+	PHYDM_DBG(dm, ODM_COMP_INIT,
+		  "===> odm_config_rf_with_header_file: [RadioA] %08X %08X\n",
+		  addr, data);
 }
 
-void
-odm_config_rf_radio_b_8723d(
-	struct PHY_DM_STRUCT				*p_dm,
-	u32					addr,
-	u32					data
-)
+void odm_config_rf_radio_b_8723d(struct dm_struct *dm, u32 addr, u32 data)
 {
-	u32  content = 0x1001; /* RF_Content: radiob_txt */
-	u32	maskfor_phy_set = (u32)(content & 0xE000);
-
-	odm_config_rf_reg_8723d(p_dm, addr, data, RF_PATH_B, addr | maskfor_phy_set);
+	u32 content = 0x1001; /* RF_Content: radiob_txt */
+	u32 maskfor_phy_set = (u32)(content & 0xE000);
 
-	PHYDM_DBG(p_dm, ODM_COMP_INIT, ("===> odm_config_rf_with_header_file: [RadioB] %08X %08X\n", addr, data));
+	odm_config_rf_reg_8723d(dm, addr, data, RF_PATH_B, addr | maskfor_phy_set);
 
+	PHYDM_DBG(dm, ODM_COMP_INIT,
+		  "===> odm_config_rf_with_header_file: [RadioB] %08X %08X\n",
+		  addr, data);
 }
 
-void
-odm_config_mac_8723d(
-	struct PHY_DM_STRUCT	*p_dm,
-	u32		addr,
-	u8		data
-)
+void odm_config_mac_8723d(struct dm_struct *dm, u32 addr, u8 data)
 {
-	odm_write_1byte(p_dm, addr, data);
-	PHYDM_DBG(p_dm, ODM_COMP_INIT, ("===> odm_config_mac_with_header_file: [MAC_REG] %08X %08X\n", addr, data));
+	odm_write_1byte(dm, addr, data);
+	PHYDM_DBG(dm, ODM_COMP_INIT,
+		  "===> odm_config_mac_with_header_file: [MAC_REG] %08X %08X\n",
+		  addr, data);
 }
 
-void
-odm_config_bb_agc_8723d(
-	struct PHY_DM_STRUCT	*p_dm,
-	u32		addr,
-	u32		bitmask,
-	u32		data
-)
+void odm_config_bb_agc_8723d(struct dm_struct *dm, u32 addr, u32 bitmask,
+			     u32 data)
 {
-	odm_set_bb_reg(p_dm, addr, bitmask, data);
+	odm_set_bb_reg(dm, addr, bitmask, data);
 	/* Add 1us delay between BB/RF register setting. */
 	ODM_delay_us(1);
 
-	PHYDM_DBG(p_dm, ODM_COMP_INIT, ("===> odm_config_bb_with_header_file: [AGC_TAB] %08X %08X\n", addr, data));
+	PHYDM_DBG(dm, ODM_COMP_INIT,
+		  "===> odm_config_bb_with_header_file: [AGC_TAB] %08X %08X\n",
+		  addr, data);
 }
 
-void
-odm_config_bb_phy_reg_pg_8723d(
-	struct PHY_DM_STRUCT	*p_dm,
-	u32		band,
-	u32		rf_path,
-	u32		tx_num,
-	u32		addr,
-	u32		bitmask,
-	u32		data
-)
+void odm_config_bb_phy_reg_pg_8723d(struct dm_struct *dm, u32 band, u32 rf_path,
+				    u32 tx_num, u32 addr, u32 bitmask, u32 data)
 {
 	if (addr == 0xfe || addr == 0xffe)
 #ifdef CONFIG_LONG_DELAY_ISSUE
@@ -115,23 +87,20 @@ odm_config_bb_phy_reg_pg_8723d(
 #else
 		ODM_delay_ms(50);
 #endif
-	else {
 #if (DM_ODM_SUPPORT_TYPE & ODM_CE)
-		phy_store_tx_power_by_rate(p_dm->adapter, band, rf_path, tx_num, addr, bitmask, data);
+	else
+		phy_store_tx_power_by_rate(dm->adapter, band, rf_path, tx_num, addr, bitmask, data);
 #elif (DM_ODM_SUPPORT_TYPE & ODM_WIN)
-		PHY_StoreTxPowerByRate(p_dm->adapter, band, rf_path, tx_num, addr, bitmask, data);
+	else
+		PHY_StoreTxPowerByRate(dm->adapter, band, rf_path, tx_num, addr, bitmask, data);
 #endif
-	}
-	PHYDM_DBG(p_dm, ODM_COMP_INIT, ("===> odm_config_bb_with_header_file: [PHY_REG] %08X %08X %08X\n", addr, bitmask, data));
+	PHYDM_DBG(dm, ODM_COMP_INIT,
+		  "===> odm_config_bb_with_header_file: [PHY_REG] %08X %08X %08X\n",
+		  addr, bitmask, data);
 }
 
-void
-odm_config_bb_phy_8723d(
-	struct PHY_DM_STRUCT	*p_dm,
-	u32		addr,
-	u32		bitmask,
-	u32		data
-)
+void odm_config_bb_phy_8723d(struct dm_struct *dm, u32 addr, u32 bitmask,
+			     u32 data)
 {
 	/*dbg_print("odm_config_bb_phy_8723d(), addr = 0x%x, data = 0x%x\n", addr, data);*/
 	if (addr == 0xfe)
@@ -151,31 +120,25 @@ odm_config_bb_phy_8723d(
 	else if (addr == 0xf9)
 		ODM_delay_us(1);
 	else
-		odm_set_bb_reg(p_dm, addr, bitmask, data);
+		odm_set_bb_reg(dm, addr, bitmask, data);
 
 	/* Add 1us delay between BB/RF register setting. */
 	ODM_delay_us(1);
-	PHYDM_DBG(p_dm, ODM_COMP_INIT, ("===> odm_config_bb_with_header_file: [PHY_REG] %08X %08X\n", addr, data));
+	PHYDM_DBG(dm, ODM_COMP_INIT,
+		  "===> odm_config_bb_with_header_file: [PHY_REG] %08X %08X\n",
+		  addr, data);
 }
 
-void
-odm_config_bb_txpwr_lmt_8723d(
-	struct PHY_DM_STRUCT	*p_dm,
-	u8		*regulation,
-	u8		*band,
-	u8		*bandwidth,
-	u8		*rate_section,
-	u8		*rf_path,
-	u8	*channel,
-	u8		*power_limit
-)
+void odm_config_bb_txpwr_lmt_8723d(struct dm_struct *dm, u8 *regulation,
+				   u8 *band, u8 *bandwidth, u8 *rate_section,
+				   u8 *rf_path, u8 *channel, u8 *power_limit)
 {
 #if (DM_ODM_SUPPORT_TYPE & ODM_CE)
-	phy_set_tx_power_limit(p_dm, regulation, band,
-		       bandwidth, rate_section, rf_path, channel, power_limit);
+	phy_set_tx_power_limit(dm, regulation, band,
+			       bandwidth, rate_section, rf_path, channel, power_limit);
 #elif (DM_ODM_SUPPORT_TYPE & ODM_WIN)
-	PHY_SetTxPowerLimit(p_dm, regulation, band,
-		       bandwidth, rate_section, rf_path, channel, power_limit);
+	PHY_SetTxPowerLimit(dm, regulation, band,
+			    bandwidth, rate_section, rf_path, channel, power_limit);
 #endif
 }
 
diff --git a/rtl8723DS/hal/phydm/rtl8723d/phydm_regconfig8723d.h b/rtl8723DS/hal/phydm/rtl8723d/phydm_regconfig8723d.h
index a0874c4..f4237c9 100755..100644
--- a/rtl8723DS/hal/phydm/rtl8723d/phydm_regconfig8723d.h
+++ b/rtl8723DS/hal/phydm/rtl8723d/phydm_regconfig8723d.h
@@ -17,75 +17,28 @@
 
 #if (RTL8723D_SUPPORT == 1)
 
-void
-odm_config_rf_reg_8723d(
-	struct PHY_DM_STRUCT				*p_dm,
-	u32					addr,
-	u32					data,
-	enum rf_path     RF_PATH,
-	u32				    reg_addr
-);
+void odm_config_rf_reg_8723d(struct dm_struct *dm, u32 addr, u32 data,
+			     enum rf_path RF_PATH, u32 reg_addr);
 
-void
-odm_config_rf_radio_a_8723d(
-	struct PHY_DM_STRUCT				*p_dm,
-	u32					addr,
-	u32					data
-);
+void odm_config_rf_radio_a_8723d(struct dm_struct *dm, u32 addr, u32 data);
 
-void
-odm_config_rf_radio_b_8723d(
-	struct PHY_DM_STRUCT				*p_dm,
-	u32					addr,
-	u32					data
-);
+void odm_config_rf_radio_b_8723d(struct dm_struct *dm, u32 addr, u32 data);
 
-void
-odm_config_mac_8723d(
-	struct PHY_DM_STRUCT	*p_dm,
-	u32		addr,
-	u8		data
-);
+void odm_config_mac_8723d(struct dm_struct *dm, u32 addr, u8 data);
 
-void
-odm_config_bb_agc_8723d(
-	struct PHY_DM_STRUCT	*p_dm,
-	u32		addr,
-	u32		bitmask,
-	u32		data
-);
+void odm_config_bb_agc_8723d(struct dm_struct *dm, u32 addr, u32 bitmask,
+			     u32 data);
 
-void
-odm_config_bb_phy_reg_pg_8723d(
-	struct PHY_DM_STRUCT	*p_dm,
-	u32		band,
-	u32		rf_path,
-	u32		tx_num,
-	u32		addr,
-	u32		bitmask,
-	u32		data
-);
+void odm_config_bb_phy_reg_pg_8723d(struct dm_struct *dm, u32 band, u32 rf_path,
+				    u32 tx_num, u32 addr, u32 bitmask,
+				    u32 data);
 
-void
-odm_config_bb_phy_8723d(
-	struct PHY_DM_STRUCT	*p_dm,
-	u32		addr,
-	u32		bitmask,
-	u32		data
-);
-
-void
-odm_config_bb_txpwr_lmt_8723d(
-	struct PHY_DM_STRUCT	*p_dm,
-	u8	*regulation,
-	u8	*band,
-	u8	*bandwidth,
-	u8	*rate_section,
-	u8	*rf_path,
-	u8	*channel,
-	u8	*power_limit
-);
+void odm_config_bb_phy_8723d(struct dm_struct *dm, u32 addr, u32 bitmask,
+			     u32 data);
 
+void odm_config_bb_txpwr_lmt_8723d(struct dm_struct *dm, u8 *regulation,
+				   u8 *band, u8 *bandwidth, u8 *rate_section,
+				   u8 *rf_path, u8 *channel, u8 *power_limit);
 
 #endif
 #endif /* end of SUPPORT */
diff --git a/rtl8723DS/hal/phydm/rtl8723d/phydm_rtl8723d.c b/rtl8723DS/hal/phydm/rtl8723d/phydm_rtl8723d.c
index fc4e42e..fb9a402 100755..100644
--- a/rtl8723DS/hal/phydm/rtl8723d/phydm_rtl8723d.c
+++ b/rtl8723DS/hal/phydm/rtl8723d/phydm_rtl8723d.c
@@ -13,25 +13,21 @@
  *
  *****************************************************************************/
 
-/*============================================================
- include files
-============================================================*/
+/* ============================================================
+ *  include files
+ * ============================================================
+ */
 
 #include "mp_precomp.h"
 #include "../phydm_precomp.h"
 
 #if (RTL8723D_SUPPORT == 1)
 
-s8
-odm_cckrssi_8723d(
-	u8	lna_idx,
-	u8	vga_idx
-)
+s8 phydm_cckrssi_8723d(struct dm_struct *dm, u8 lna_idx, u8 vga_idx)
 {
-	s8	rx_pwr_all = 0x00;
+	s8 rx_pwr_all = 0x00;
 
 	switch (lna_idx) {
-
 	case 0xf:
 		rx_pwr_all = -46 - (2 * vga_idx);
 		break;
@@ -49,7 +45,6 @@ odm_cckrssi_8723d(
 	}
 
 	return rx_pwr_all;
-
 }
 
 #endif
diff --git a/rtl8723DS/hal/phydm/rtl8723d/phydm_rtl8723d.h b/rtl8723DS/hal/phydm/rtl8723d/phydm_rtl8723d.h
index 6c8eedd..b593175 100755..100644
--- a/rtl8723DS/hal/phydm/rtl8723d/phydm_rtl8723d.h
+++ b/rtl8723DS/hal/phydm/rtl8723d/phydm_rtl8723d.h
@@ -12,16 +12,12 @@
  * more details.
  *
  *****************************************************************************/
-#ifndef	__ODM_RTL8723D_H__
+#ifndef __ODM_RTL8723D_H__
 #define __ODM_RTL8723D_H__
 
 #if (RTL8723D_SUPPORT == 1)
 
-s8
-odm_cckrssi_8723d(
-	u8	lna_idx,
-	u8	vga_idx
-);
+s8 phydm_cckrssi_8723d(struct dm_struct *dm, u8 lna_idx, u8 vga_idx);
 
 #endif
 
diff --git a/rtl8723DS/hal/phydm/rtl8723d/version_rtl8723d.h b/rtl8723DS/hal/phydm/rtl8723d/version_rtl8723d.h
index 0e08a04..0e08a04 100755..100644
--- a/rtl8723DS/hal/phydm/rtl8723d/version_rtl8723d.h
+++ b/rtl8723DS/hal/phydm/rtl8723d/version_rtl8723d.h
diff --git a/rtl8723DS/hal/phydm/sd4_phydm_2_kernel.mk b/rtl8723DS/hal/phydm/sd4_phydm_2_kernel.mk
new file mode 100644
index 0000000..f11c6ac
--- a/dev/null
+++ b/rtl8723DS/hal/phydm/sd4_phydm_2_kernel.mk
@@ -0,0 +1,188 @@
+EXTRA_CFLAGS += -I$(src)/hal/phydm
+
+_PHYDM_FILES := hal/phydm/phydm_debug.o	\
+								hal/phydm/phydm_interface.o\
+								hal/phydm/phydm_phystatus.o\
+								hal/phydm/phydm_hwconfig.o\
+								hal/phydm/phydm.o\
+								hal/phydm/phydm_dig.o\
+								hal/phydm/phydm_rainfo.o\
+								hal/phydm/phydm_adaptivity.o\
+								hal/phydm/phydm_cfotracking.o\
+								hal/phydm/phydm_noisemonitor.o\
+								hal/phydm/phydm_beamforming.o\
+								hal/phydm/phydm_dfs.o\
+								hal/phydm/txbf/halcomtxbf.o\
+								hal/phydm/txbf/haltxbfinterface.o\
+								hal/phydm/txbf/phydm_hal_txbf_api.o\
+								hal/phydm/phydm_ccx.o\
+								hal/phydm/phydm_cck_pd.o\
+								hal/phydm/phydm_rssi_monitor.o\
+								hal/phydm/phydm_math_lib.o\
+								hal/phydm/phydm_api.o\
+								hal/phydm/halrf/halrf.o\
+								hal/phydm/halrf/halrf_debug.o\
+								hal/phydm/halrf/halphyrf_ce.o\
+								hal/phydm/halrf/halrf_powertracking_ce.o\
+								hal/phydm/halrf/halrf_powertracking.o\
+								hal/phydm/halrf/halrf_kfree.o
+
+ifeq ($(CONFIG_RTL8188E), y)
+RTL871X = rtl8188e
+_PHYDM_FILES += hal/phydm/$(RTL871X)/halhwimg8188e_mac.o\
+								hal/phydm/$(RTL871X)/halhwimg8188e_bb.o\
+								hal/phydm/$(RTL871X)/halhwimg8188e_rf.o\
+								hal/phydm/halrf/$(RTL871X)/halrf_8188e_ce.o\
+								hal/phydm/$(RTL871X)/phydm_regconfig8188e.o\
+								hal/phydm/$(RTL871X)/hal8188erateadaptive.o\
+								hal/phydm/$(RTL871X)/phydm_rtl8188e.o
+endif
+
+ifeq ($(CONFIG_RTL8192E), y)
+RTL871X = rtl8192e
+_PHYDM_FILES += hal/phydm/$(RTL871X)/halhwimg8192e_mac.o\
+								hal/phydm/$(RTL871X)/halhwimg8192e_bb.o\
+								hal/phydm/$(RTL871X)/halhwimg8192e_rf.o\
+								hal/phydm/halrf/$(RTL871X)/halrf_8192e_ce.o\
+								hal/phydm/$(RTL871X)/phydm_regconfig8192e.o\
+								hal/phydm/$(RTL871X)/phydm_rtl8192e.o
+endif
+
+
+ifeq ($(CONFIG_RTL8812A), y)
+RTL871X = rtl8812a
+_PHYDM_FILES += hal/phydm/$(RTL871X)/halhwimg8812a_mac.o\
+								hal/phydm/$(RTL871X)/halhwimg8812a_bb.o\
+								hal/phydm/$(RTL871X)/halhwimg8812a_rf.o\
+								hal/phydm/halrf/$(RTL871X)/halrf_8812a_ce.o\
+								hal/phydm/$(RTL871X)/phydm_regconfig8812a.o\
+								hal/phydm/$(RTL871X)/phydm_rtl8812a.o\
+								hal/phydm/txbf/haltxbfjaguar.o
+endif
+
+ifeq ($(CONFIG_RTL8821A), y)
+RTL871X = rtl8821a
+_PHYDM_FILES += hal/phydm/rtl8821a/halhwimg8821a_mac.o\
+								hal/phydm/rtl8821a/halhwimg8821a_bb.o\
+								hal/phydm/rtl8821a/halhwimg8821a_rf.o\
+								hal/phydm/halrf/rtl8812a/halrf_8812a_ce.o\
+								hal/phydm/halrf/rtl8821a/halrf_8821a_ce.o\
+								hal/phydm/rtl8821a/phydm_regconfig8821a.o\
+								hal/phydm/rtl8821a/phydm_rtl8821a.o\
+								hal/phydm/halrf/rtl8821a/halrf_iqk_8821a_ce.o\
+								hal/phydm/txbf/haltxbfjaguar.o
+endif
+
+
+ifeq ($(CONFIG_RTL8723B), y)
+RTL871X = rtl8723b
+_PHYDM_FILES += hal/phydm/$(RTL871X)/halhwimg8723b_bb.o\
+								hal/phydm/$(RTL871X)/halhwimg8723b_mac.o\
+								hal/phydm/$(RTL871X)/halhwimg8723b_rf.o\
+								hal/phydm/$(RTL871X)/halhwimg8723b_mp.o\
+								hal/phydm/$(RTL871X)/phydm_regconfig8723b.o\
+								hal/phydm/halrf/$(RTL871X)/halrf_8723b_ce.o\
+								hal/phydm/$(RTL871X)/phydm_rtl8723b.o
+endif
+
+
+ifeq ($(CONFIG_RTL8814A), y)
+RTL871X = rtl8814a
+_PHYDM_FILES += hal/phydm/$(RTL871X)/halhwimg8814a_bb.o\
+								hal/phydm/$(RTL871X)/halhwimg8814a_mac.o\
+								hal/phydm/$(RTL871X)/halhwimg8814a_rf.o\
+								hal/phydm/halrf/$(RTL871X)/halrf_iqk_8814a.o\
+								hal/phydm/$(RTL871X)/phydm_regconfig8814a.o\
+								hal/phydm/halrf/$(RTL871X)/halrf_8814a_ce.o\
+								hal/phydm/$(RTL871X)/phydm_rtl8814a.o\
+								hal/phydm/txbf/haltxbf8814a.o
+endif
+
+
+ifeq ($(CONFIG_RTL8723C), y)
+RTL871X = rtl8703b
+_PHYDM_FILES += hal/phydm/$(RTL871X)/halhwimg8703b_bb.o\
+								hal/phydm/$(RTL871X)/halhwimg8703b_mac.o\
+								hal/phydm/$(RTL871X)/halhwimg8703b_rf.o\
+								hal/phydm/$(RTL871X)/phydm_regconfig8703b.o\
+								hal/phydm/$(RTL871X)/phydm_rtl8703b.o\
+								hal/phydm/halrf/$(RTL871X)/halrf_8703b.o
+endif
+
+ifeq ($(CONFIG_RTL8723D), y)
+RTL871X = rtl8723d
+_PHYDM_FILES += hal/phydm/$(RTL871X)/halhwimg8723d_bb.o\
+								hal/phydm/$(RTL871X)/halhwimg8723d_mac.o\
+								hal/phydm/$(RTL871X)/halhwimg8723d_rf.o\
+								hal/phydm/$(RTL871X)/phydm_regconfig8723d.o\
+								hal/phydm/$(RTL871X)/phydm_rtl8723d.o\
+								hal/phydm/halrf/$(RTL871X)/halrf_8723d.o
+endif
+
+
+ifeq ($(CONFIG_RTL8710B), y)
+RTL871X = rtl8710b
+_PHYDM_FILES += hal/phydm/$(RTL871X)/halhwimg8710b_bb.o\
+								hal/phydm/$(RTL871X)/halhwimg8710b_mac.o\
+								hal/phydm/$(RTL871X)/halhwimg8710b_rf.o\
+								hal/phydm/$(RTL871X)/phydm_regconfig8710b.o\
+								hal/phydm/$(RTL871X)/phydm_rtl8710b.o\
+								hal/phydm/halrf/$(RTL871X)/halrf_8710b.o
+endif
+
+
+ifeq ($(CONFIG_RTL8188F), y)
+RTL871X = rtl8188f
+_PHYDM_FILES += hal/phydm/$(RTL871X)/halhwimg8188f_bb.o\
+								hal/phydm/$(RTL871X)/halhwimg8188f_mac.o\
+								hal/phydm/$(RTL871X)/halhwimg8188f_rf.o\
+								hal/phydm/$(RTL871X)/phydm_regconfig8188f.o\
+								hal/phydm/halrf/$(RTL871X)/halrf_8188f.o \
+								hal/phydm/$(RTL871X)/phydm_rtl8188f.o
+endif
+
+ifeq ($(CONFIG_RTL8822B), y)
+RTL871X = rtl8822b
+_PHYDM_FILES +=	hal/phydm/$(RTL871X)/halhwimg8822b_bb.o \
+								hal/phydm/$(RTL871X)/halhwimg8822b_mac.o \
+								hal/phydm/$(RTL871X)/halhwimg8822b_rf.o \
+								hal/phydm/halrf/$(RTL871X)/halrf_8822b.o \
+								hal/phydm/$(RTL871X)/phydm_hal_api8822b.o \
+								hal/phydm/halrf/$(RTL871X)/halrf_iqk_8822b.o \
+								hal/phydm/halrf/$(RTL871X)/halrf_rfk_init_8822b.o \
+								hal/phydm/$(RTL871X)/phydm_regconfig8822b.o \
+								hal/phydm/$(RTL871X)/phydm_rtl8822b.o
+
+_PHYDM_FILES +=	hal/phydm/txbf/haltxbf8822b.o
+endif
+
+
+ifeq ($(CONFIG_RTL8821C), y)
+RTL871X = rtl8821c
+_PHYDM_FILES +=	hal/phydm/$(RTL871X)/halhwimg8821c_bb.o \
+								hal/phydm/$(RTL871X)/halhwimg8821c_mac.o \
+								hal/phydm/$(RTL871X)/halhwimg8821c_rf.o \
+								hal/phydm/$(RTL871X)/phydm_hal_api8821c.o \
+								hal/phydm/$(RTL871X)/phydm_regconfig8821c.o\
+								hal/phydm/halrf/$(RTL871X)/halrf_8821c.o\
+								hal/phydm/halrf/$(RTL871X)/halrf_iqk_8821c.o
+endif
+ifeq ($(CONFIG_RTL8192F), y)
+RTL871X = rtl8192f
+_PHYDM_FILES += hal/phydm/$(RTL871X)/halhwimg8192f_bb.o\
+								hal/phydm/$(RTL871X)/halhwimg8192f_mac.o\
+								hal/phydm/$(RTL871X)/halhwimg8192f_rf.o\
+								hal/phydm/$(RTL871X)/phydm_hal_api8192f.o\
+								hal/phydm/$(RTL871X)/phydm_regconfig8192f.o\
+								hal/phydm/$(RTL871X)/phydm_rtl8192f.o\
+								hal/phydm/halrf/$(RTL871X)/halrf_8192f.o
+endif
+
+ifeq ($(CONFIG_RTL8198F), y)
+RTL871X = rtl8198f
+_PHYDM_FILES += hal/phydm/$(RTL871X)/halhwimg8198f_bb.o\
+								hal/phydm/$(RTL871X)/halhwimg8198f_mac.o\
+								hal/phydm/$(RTL871X)/halhwimg8198f_rf.o\
+								hal/phydm/$(RTL871X)/phydm_hal_api8198f.o\
+								hal/phydm/$(RTL871X)/phydm_regconfig8198f.o
+endif
diff --git a/rtl8723DS/hal/phydm/txbf/halcomtxbf.c b/rtl8723DS/hal/phydm/txbf/halcomtxbf.c
index f0e3164..ae45a5b 100755..100644
--- a/rtl8723DS/hal/phydm/txbf/halcomtxbf.c
+++ b/rtl8723DS/hal/phydm/txbf/halcomtxbf.c
@@ -12,478 +12,437 @@
  * more details.
  *
  *****************************************************************************/
-/* ************************************************************
+/*@************************************************************
  * Description:
  *
  * This file is for TXBF mechanism
  *
- * ************************************************************ */
+ ************************************************************/
 #include "mp_precomp.h"
 #include "../phydm_precomp.h"
 
-#if (BEAMFORMING_SUPPORT == 1)
-/*Beamforming halcomtxbf API create by YuChen 2015/05*/
+#ifdef PHYDM_BEAMFORMING_SUPPORT
+/*@Beamforming halcomtxbf API create by YuChen 2015/05*/
 
-void
-hal_com_txbf_beamform_init(
-	void			*p_dm_void
-)
+void hal_com_txbf_beamform_init(
+	void *dm_void)
 {
-	struct PHY_DM_STRUCT	*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	boolean		is_iqgen_setting_ok = false;
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	boolean is_iqgen_setting_ok = false;
 
-	if (p_dm->support_ic_type & ODM_RTL8814A) {
-		is_iqgen_setting_ok = phydm_beamforming_set_iqgen_8814A(p_dm);
-		PHYDM_DBG(p_dm, DBG_TXBF, ("[%s] is_iqgen_setting_ok = %d\n", __func__, is_iqgen_setting_ok));
+	if (dm->support_ic_type & ODM_RTL8814A) {
+		is_iqgen_setting_ok = phydm_beamforming_set_iqgen_8814A(dm);
+		PHYDM_DBG(dm, DBG_TXBF, "[%s] is_iqgen_setting_ok = %d\n",
+			  __func__, is_iqgen_setting_ok);
 	}
 }
 
-/*Only used for MU BFer Entry when get GID management frame (self is as MU STA)*/
-void
-hal_com_txbf_config_gtab(
-	void			*p_dm_void
-)
+/*Only used for MU BFer Entry when get GID management frame (self as MU STA)*/
+void hal_com_txbf_config_gtab(
+	void *dm_void)
 {
-	struct PHY_DM_STRUCT	*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
 
-	if (p_dm->support_ic_type & ODM_RTL8822B)
-		hal_txbf_8822b_config_gtab(p_dm);
+	if (dm->support_ic_type & ODM_RTL8822B)
+		hal_txbf_8822b_config_gtab(dm);
 }
 
-void
-phydm_beamform_set_sounding_enter(
-	void			*p_dm_void
-)
+void phydm_beamform_set_sounding_enter(
+	void *dm_void)
 {
-	struct PHY_DM_STRUCT	*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
-	struct _HAL_TXBF_INFO	*p_txbf_info = &p_dm->beamforming_info.txbf_info;
+	struct _HAL_TXBF_INFO *p_txbf_info = &dm->beamforming_info.txbf_info;
 
-	if (odm_is_work_item_scheduled(&(p_txbf_info->txbf_enter_work_item)) == false)
-		odm_schedule_work_item(&(p_txbf_info->txbf_enter_work_item));
+	if (!odm_is_work_item_scheduled(&p_txbf_info->txbf_enter_work_item))
+		odm_schedule_work_item(&p_txbf_info->txbf_enter_work_item);
 #else
-	hal_com_txbf_enter_work_item_callback(p_dm);
+	hal_com_txbf_enter_work_item_callback(dm);
 #endif
 }
 
-void
-phydm_beamform_set_sounding_leave(
-	void			*p_dm_void
-)
+void phydm_beamform_set_sounding_leave(
+	void *dm_void)
 {
-	struct PHY_DM_STRUCT	*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
-	struct _HAL_TXBF_INFO	*p_txbf_info = &p_dm->beamforming_info.txbf_info;
+	struct _HAL_TXBF_INFO *p_txbf_info = &dm->beamforming_info.txbf_info;
 
-	if (odm_is_work_item_scheduled(&(p_txbf_info->txbf_leave_work_item)) == false)
-		odm_schedule_work_item(&(p_txbf_info->txbf_leave_work_item));
+	if (!odm_is_work_item_scheduled(&p_txbf_info->txbf_leave_work_item))
+		odm_schedule_work_item(&p_txbf_info->txbf_leave_work_item);
 #else
-	hal_com_txbf_leave_work_item_callback(p_dm);
+	hal_com_txbf_leave_work_item_callback(dm);
 #endif
 }
 
-void
-phydm_beamform_set_sounding_rate(
-	void			*p_dm_void
-)
+void phydm_beamform_set_sounding_rate(
+	void *dm_void)
 {
-	struct PHY_DM_STRUCT	*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
-	struct _HAL_TXBF_INFO	*p_txbf_info = &p_dm->beamforming_info.txbf_info;
+	struct _HAL_TXBF_INFO *p_txbf_info = &dm->beamforming_info.txbf_info;
 
-	if (odm_is_work_item_scheduled(&(p_txbf_info->txbf_rate_work_item)) == false)
-		odm_schedule_work_item(&(p_txbf_info->txbf_rate_work_item));
+	if (!odm_is_work_item_scheduled(&p_txbf_info->txbf_rate_work_item))
+		odm_schedule_work_item(&p_txbf_info->txbf_rate_work_item);
 #else
-	hal_com_txbf_rate_work_item_callback(p_dm);
+	hal_com_txbf_rate_work_item_callback(dm);
 #endif
 }
 
-void
-phydm_beamform_set_sounding_status(
-	void			*p_dm_void
-)
+void phydm_beamform_set_sounding_status(
+	void *dm_void)
 {
-	struct PHY_DM_STRUCT	*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
-	struct _HAL_TXBF_INFO	*p_txbf_info = &p_dm->beamforming_info.txbf_info;
+	struct _HAL_TXBF_INFO *p_txbf_info = &dm->beamforming_info.txbf_info;
 
-	if (odm_is_work_item_scheduled(&(p_txbf_info->txbf_status_work_item)) == false)
-		odm_schedule_work_item(&(p_txbf_info->txbf_status_work_item));
+	if (!odm_is_work_item_scheduled(&p_txbf_info->txbf_status_work_item))
+		odm_schedule_work_item(&p_txbf_info->txbf_status_work_item);
 #else
-	hal_com_txbf_status_work_item_callback(p_dm);
+	hal_com_txbf_status_work_item_callback(dm);
 #endif
 }
 
-void
-phydm_beamform_set_sounding_fw_ndpa(
-	void			*p_dm_void
-)
+void phydm_beamform_set_sounding_fw_ndpa(
+	void *dm_void)
 {
-	struct PHY_DM_STRUCT	*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
-	struct _HAL_TXBF_INFO	*p_txbf_info = &p_dm->beamforming_info.txbf_info;
+	struct _HAL_TXBF_INFO *p_txbf_info = &dm->beamforming_info.txbf_info;
 
-	if (*p_dm->p_is_fw_dw_rsvd_page_in_progress)
-		odm_set_timer(p_dm, &(p_txbf_info->txbf_fw_ndpa_timer), 5);
+	if (*dm->is_fw_dw_rsvd_page_in_progress)
+		odm_set_timer(dm, &p_txbf_info->txbf_fw_ndpa_timer, 5);
 	else
-		odm_schedule_work_item(&(p_txbf_info->txbf_fw_ndpa_work_item));
+		odm_schedule_work_item(&p_txbf_info->txbf_fw_ndpa_work_item);
 #else
-	hal_com_txbf_fw_ndpa_work_item_callback(p_dm);
+	hal_com_txbf_fw_ndpa_work_item_callback(dm);
 #endif
 }
 
-void
-phydm_beamform_set_sounding_clk(
-	void			*p_dm_void
-)
+void phydm_beamform_set_sounding_clk(
+	void *dm_void)
 {
-	struct PHY_DM_STRUCT	*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
-	struct _HAL_TXBF_INFO	*p_txbf_info = &p_dm->beamforming_info.txbf_info;
+	struct _HAL_TXBF_INFO *p_txbf_info = &dm->beamforming_info.txbf_info;
 
-	if (odm_is_work_item_scheduled(&(p_txbf_info->txbf_clk_work_item)) == false)
-		odm_schedule_work_item(&(p_txbf_info->txbf_clk_work_item));
+	if (!odm_is_work_item_scheduled(&p_txbf_info->txbf_clk_work_item))
+		odm_schedule_work_item(&p_txbf_info->txbf_clk_work_item);
 #elif (DM_ODM_SUPPORT_TYPE == ODM_CE)
-	struct _ADAPTER	*padapter = p_dm->adapter;
-
-	rtw_run_in_thread_cmd(padapter, hal_com_txbf_clk_work_item_callback, p_dm);
+	phydm_run_in_thread_cmd(dm, hal_com_txbf_clk_work_item_callback, dm);
 #else
-	hal_com_txbf_clk_work_item_callback(p_dm);
+	hal_com_txbf_clk_work_item_callback(dm);
 #endif
 }
 
-void
-phydm_beamform_set_reset_tx_path(
-	void			*p_dm_void
-)
+void phydm_beamform_set_reset_tx_path(
+	void *dm_void)
 {
-	struct PHY_DM_STRUCT	*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
-	struct _HAL_TXBF_INFO	*p_txbf_info = &p_dm->beamforming_info.txbf_info;
+	struct _HAL_TXBF_INFO *p_txbf_info = &dm->beamforming_info.txbf_info;
+	struct _RT_WORK_ITEM *pwi = &p_txbf_info->txbf_reset_tx_path_work_item;
 
-	if (odm_is_work_item_scheduled(&(p_txbf_info->txbf_reset_tx_path_work_item)) == false)
-		odm_schedule_work_item(&(p_txbf_info->txbf_reset_tx_path_work_item));
+	if (!odm_is_work_item_scheduled(pwi))
+		odm_schedule_work_item(pwi);
 #else
-	hal_com_txbf_reset_tx_path_work_item_callback(p_dm);
+	hal_com_txbf_reset_tx_path_work_item_callback(dm);
 #endif
 }
 
-void
-phydm_beamform_set_get_tx_rate(
-	void			*p_dm_void
-)
+void phydm_beamform_set_get_tx_rate(
+	void *dm_void)
 {
-	struct PHY_DM_STRUCT	*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
-	struct _HAL_TXBF_INFO	*p_txbf_info = &p_dm->beamforming_info.txbf_info;
+	struct _HAL_TXBF_INFO *p_txbf_info = &dm->beamforming_info.txbf_info;
+	struct _RT_WORK_ITEM *pwi = &p_txbf_info->txbf_get_tx_rate_work_item;
 
-	if (odm_is_work_item_scheduled(&(p_txbf_info->txbf_get_tx_rate_work_item)) == false)
-		odm_schedule_work_item(&(p_txbf_info->txbf_get_tx_rate_work_item));
+	if (!odm_is_work_item_scheduled(pwi))
+		odm_schedule_work_item(pwi);
 #else
-	hal_com_txbf_get_tx_rate_work_item_callback(p_dm);
+	hal_com_txbf_get_tx_rate_work_item_callback(dm);
 #endif
 }
 
-void
-hal_com_txbf_enter_work_item_callback(
+void hal_com_txbf_enter_work_item_callback(
 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
-	struct _ADAPTER		*adapter
+	void *adapter
 #else
-	void			*p_dm_void
+	void *dm_void
 #endif
-)
+	)
 {
 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
-	PHAL_DATA_TYPE	p_hal_data = GET_HAL_DATA(adapter);
-	struct PHY_DM_STRUCT		*p_dm = &p_hal_data->DM_OutSrc;
+	PHAL_DATA_TYPE hal_data = GET_HAL_DATA(((PADAPTER)adapter));
+	struct dm_struct *dm = &hal_data->DM_OutSrc;
 #else
-	struct PHY_DM_STRUCT	*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
 #endif
-	struct _HAL_TXBF_INFO	*p_txbf_info = &p_dm->beamforming_info.txbf_info;
-	u8			idx = p_txbf_info->txbf_idx;
-
-	PHYDM_DBG(p_dm, DBG_TXBF, ("[%s] Start!\n", __func__));
-
-	if (p_dm->support_ic_type & (ODM_RTL8812 | ODM_RTL8821))
-		hal_txbf_jaguar_enter(p_dm, idx);
-	else if (p_dm->support_ic_type & ODM_RTL8192E)
-		hal_txbf_8192e_enter(p_dm, idx);
-	else if (p_dm->support_ic_type & ODM_RTL8814A)
-		hal_txbf_8814a_enter(p_dm, idx);
-	else if (p_dm->support_ic_type & ODM_RTL8822B)
-		hal_txbf_8822b_enter(p_dm, idx);
+	struct _HAL_TXBF_INFO *p_txbf_info = &dm->beamforming_info.txbf_info;
+	u8 idx = p_txbf_info->txbf_idx;
+
+	PHYDM_DBG(dm, DBG_TXBF, "[%s] Start!\n", __func__);
+
+	if (dm->support_ic_type & (ODM_RTL8812 | ODM_RTL8821))
+		hal_txbf_jaguar_enter(dm, idx);
+	else if (dm->support_ic_type & ODM_RTL8192E)
+		hal_txbf_8192e_enter(dm, idx);
+	else if (dm->support_ic_type & ODM_RTL8814A)
+		hal_txbf_8814a_enter(dm, idx);
+	else if (dm->support_ic_type & ODM_RTL8822B)
+		hal_txbf_8822b_enter(dm, idx);
 }
 
-void
-hal_com_txbf_leave_work_item_callback(
+void hal_com_txbf_leave_work_item_callback(
 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
-	struct _ADAPTER		*adapter
+	void *adapter
 #else
-	void			*p_dm_void
+	void *dm_void
 #endif
-)
+	)
 {
 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
-	PHAL_DATA_TYPE	p_hal_data = GET_HAL_DATA(adapter);
-	struct PHY_DM_STRUCT		*p_dm = &p_hal_data->DM_OutSrc;
+	PHAL_DATA_TYPE hal_data = GET_HAL_DATA(((PADAPTER)adapter));
+	struct dm_struct *dm = &hal_data->DM_OutSrc;
 #else
-	struct PHY_DM_STRUCT	*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
 #endif
-	struct _HAL_TXBF_INFO	*p_txbf_info = &p_dm->beamforming_info.txbf_info;
+	struct _HAL_TXBF_INFO *p_txbf_info = &dm->beamforming_info.txbf_info;
 
-	u8			idx = p_txbf_info->txbf_idx;
+	u8 idx = p_txbf_info->txbf_idx;
 
-	PHYDM_DBG(p_dm, DBG_TXBF, ("[%s] Start!\n", __func__));
+	PHYDM_DBG(dm, DBG_TXBF, "[%s] Start!\n", __func__);
 
-	if (p_dm->support_ic_type & (ODM_RTL8812 | ODM_RTL8821))
-		hal_txbf_jaguar_leave(p_dm, idx);
-	else if (p_dm->support_ic_type & ODM_RTL8192E)
-		hal_txbf_8192e_leave(p_dm, idx);
-	else if (p_dm->support_ic_type & ODM_RTL8814A)
-		hal_txbf_8814a_leave(p_dm, idx);
-	else if (p_dm->support_ic_type & ODM_RTL8822B)
-		hal_txbf_8822b_leave(p_dm, idx);
+	if (dm->support_ic_type & (ODM_RTL8812 | ODM_RTL8821))
+		hal_txbf_jaguar_leave(dm, idx);
+	else if (dm->support_ic_type & ODM_RTL8192E)
+		hal_txbf_8192e_leave(dm, idx);
+	else if (dm->support_ic_type & ODM_RTL8814A)
+		hal_txbf_8814a_leave(dm, idx);
+	else if (dm->support_ic_type & ODM_RTL8822B)
+		hal_txbf_8822b_leave(dm, idx);
 }
 
-
-void
-hal_com_txbf_fw_ndpa_work_item_callback(
+void hal_com_txbf_fw_ndpa_work_item_callback(
 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
-	struct _ADAPTER		*adapter
+	void *adapter
 #else
-	void			*p_dm_void
+	void *dm_void
 #endif
-)
+	)
 {
 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
-	PHAL_DATA_TYPE	p_hal_data = GET_HAL_DATA(adapter);
-	struct PHY_DM_STRUCT		*p_dm = &p_hal_data->DM_OutSrc;
+	PHAL_DATA_TYPE hal_data = GET_HAL_DATA(((PADAPTER)adapter));
+	struct dm_struct *dm = &hal_data->DM_OutSrc;
 #else
-	struct PHY_DM_STRUCT	*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
 #endif
-	struct _HAL_TXBF_INFO	*p_txbf_info = &p_dm->beamforming_info.txbf_info;
-	u8	idx = p_txbf_info->ndpa_idx;
-
-	PHYDM_DBG(p_dm, DBG_TXBF, ("[%s] Start!\n", __func__));
-
-	if (p_dm->support_ic_type & (ODM_RTL8812 | ODM_RTL8821))
-		hal_txbf_jaguar_fw_txbf(p_dm, idx);
-	else if (p_dm->support_ic_type & ODM_RTL8192E)
-		hal_txbf_8192e_fw_tx_bf(p_dm, idx);
-	else if (p_dm->support_ic_type & ODM_RTL8814A)
-		hal_txbf_8814a_fw_txbf(p_dm, idx);
-	else if (p_dm->support_ic_type & ODM_RTL8822B)
-		hal_txbf_8822b_fw_txbf(p_dm, idx);
+	struct _HAL_TXBF_INFO *p_txbf_info = &dm->beamforming_info.txbf_info;
+	u8 idx = p_txbf_info->ndpa_idx;
+
+	PHYDM_DBG(dm, DBG_TXBF, "[%s] Start!\n", __func__);
+
+	if (dm->support_ic_type & (ODM_RTL8812 | ODM_RTL8821))
+		hal_txbf_jaguar_fw_txbf(dm, idx);
+	else if (dm->support_ic_type & ODM_RTL8192E)
+		hal_txbf_8192e_fw_tx_bf(dm, idx);
+	else if (dm->support_ic_type & ODM_RTL8814A)
+		hal_txbf_8814a_fw_txbf(dm, idx);
+	else if (dm->support_ic_type & ODM_RTL8822B)
+		hal_txbf_8822b_fw_txbf(dm, idx);
 }
 
-void
-hal_com_txbf_clk_work_item_callback(
+void hal_com_txbf_clk_work_item_callback(
 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
-	struct _ADAPTER		*adapter
+	void *adapter
 #else
-	void			*p_dm_void
+	void *dm_void
 #endif
-)
+	)
 {
 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
-	PHAL_DATA_TYPE	p_hal_data = GET_HAL_DATA(adapter);
-	struct PHY_DM_STRUCT		*p_dm = &p_hal_data->DM_OutSrc;
+	PHAL_DATA_TYPE hal_data = GET_HAL_DATA(((PADAPTER)adapter));
+	struct dm_struct *dm = &hal_data->DM_OutSrc;
 #else
-	struct PHY_DM_STRUCT	*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
 #endif
 
-	PHYDM_DBG(p_dm, DBG_TXBF, ("[%s] Start!\n", __func__));
+	PHYDM_DBG(dm, DBG_TXBF, "[%s] Start!\n", __func__);
 
-	if (p_dm->support_ic_type & ODM_RTL8812)
-		hal_txbf_jaguar_clk_8812a(p_dm);
+	if (dm->support_ic_type & ODM_RTL8812)
+		hal_txbf_jaguar_clk_8812a(dm);
 }
 
-
-
-void
-hal_com_txbf_rate_work_item_callback(
+void hal_com_txbf_rate_work_item_callback(
 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
-	struct _ADAPTER		*adapter
+	void *adapter
 #else
-	void			*p_dm_void
+	void *dm_void
 #endif
-)
+	)
 {
 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
-	PHAL_DATA_TYPE	p_hal_data = GET_HAL_DATA(adapter);
-	struct PHY_DM_STRUCT		*p_dm = &p_hal_data->DM_OutSrc;
+	PHAL_DATA_TYPE hal_data = GET_HAL_DATA(((PADAPTER)adapter));
+	struct dm_struct *dm = &hal_data->DM_OutSrc;
 #else
-	struct PHY_DM_STRUCT	*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
 #endif
-	struct _HAL_TXBF_INFO	*p_txbf_info = &p_dm->beamforming_info.txbf_info;
-	u8			BW = p_txbf_info->BW;
-	u8			rate = p_txbf_info->rate;
-
-	PHYDM_DBG(p_dm, DBG_TXBF, ("[%s] Start!\n", __func__));
-
-	if (p_dm->support_ic_type & ODM_RTL8812)
-		hal_txbf_8812a_set_ndpa_rate(p_dm, BW, rate);
-	else if (p_dm->support_ic_type & ODM_RTL8192E)
-		hal_txbf_8192e_set_ndpa_rate(p_dm, BW, rate);
-	else if (p_dm->support_ic_type & ODM_RTL8814A)
-		hal_txbf_8814a_set_ndpa_rate(p_dm, BW, rate);
-
+	struct _HAL_TXBF_INFO *p_txbf_info = &dm->beamforming_info.txbf_info;
+	u8 BW = p_txbf_info->BW;
+	u8 rate = p_txbf_info->rate;
+
+	PHYDM_DBG(dm, DBG_TXBF, "[%s] Start!\n", __func__);
+
+	if (dm->support_ic_type & ODM_RTL8812)
+		hal_txbf_8812a_set_ndpa_rate(dm, BW, rate);
+	else if (dm->support_ic_type & ODM_RTL8192E)
+		hal_txbf_8192e_set_ndpa_rate(dm, BW, rate);
+	else if (dm->support_ic_type & ODM_RTL8814A)
+		hal_txbf_8814a_set_ndpa_rate(dm, BW, rate);
 }
 
-
 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
-void
-hal_com_txbf_fw_ndpa_timer_callback(
-	struct timer_list		*p_timer
-)
+void hal_com_txbf_fw_ndpa_timer_callback(
+	struct phydm_timer_list *timer)
 {
+	void *adapter = (void *)timer->Adapter;
+	PHAL_DATA_TYPE hal_data = GET_HAL_DATA(((PADAPTER)adapter));
+	struct dm_struct *dm = &hal_data->DM_OutSrc;
 
-	struct _ADAPTER		*adapter = (struct _ADAPTER *)p_timer->Adapter;
-	PHAL_DATA_TYPE	p_hal_data = GET_HAL_DATA(adapter);
-	struct PHY_DM_STRUCT		*p_dm = &p_hal_data->DM_OutSrc;
+	struct _HAL_TXBF_INFO *p_txbf_info = &dm->beamforming_info.txbf_info;
 
-	struct _HAL_TXBF_INFO	*p_txbf_info = &p_dm->beamforming_info.txbf_info;
+	PHYDM_DBG(dm, DBG_TXBF, "[%s] Start!\n", __func__);
 
-
-	PHYDM_DBG(p_dm, DBG_TXBF, ("[%s] Start!\n", __func__));
-
-	if (*p_dm->p_is_fw_dw_rsvd_page_in_progress)
-		odm_set_timer(p_dm, &(p_txbf_info->txbf_fw_ndpa_timer), 5);
+	if (*dm->is_fw_dw_rsvd_page_in_progress)
+		odm_set_timer(dm, &(p_txbf_info->txbf_fw_ndpa_timer), 5);
 	else
 		odm_schedule_work_item(&(p_txbf_info->txbf_fw_ndpa_work_item));
 }
 #endif
 
-
-void
-hal_com_txbf_status_work_item_callback(
+void hal_com_txbf_status_work_item_callback(
 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
-	struct _ADAPTER		*adapter
+	void *adapter
 #else
-	void			*p_dm_void
+	void *dm_void
 #endif
-)
+	)
 {
 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
-	PHAL_DATA_TYPE	p_hal_data = GET_HAL_DATA(adapter);
-	struct PHY_DM_STRUCT		*p_dm = &p_hal_data->DM_OutSrc;
+	PHAL_DATA_TYPE hal_data = GET_HAL_DATA(((PADAPTER)adapter));
+	struct dm_struct *dm = &hal_data->DM_OutSrc;
 #else
-	struct PHY_DM_STRUCT	*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
 #endif
-	struct _HAL_TXBF_INFO	*p_txbf_info = &p_dm->beamforming_info.txbf_info;
+	struct _HAL_TXBF_INFO *p_txbf_info = &dm->beamforming_info.txbf_info;
 
-	u8			idx = p_txbf_info->txbf_idx;
+	u8 idx = p_txbf_info->txbf_idx;
 
-	PHYDM_DBG(p_dm, DBG_TXBF, ("[%s] Start!\n", __func__));
+	PHYDM_DBG(dm, DBG_TXBF, "[%s] Start!\n", __func__);
 
-	if (p_dm->support_ic_type & (ODM_RTL8812 | ODM_RTL8821))
-		hal_txbf_jaguar_status(p_dm, idx);
-	else if (p_dm->support_ic_type & ODM_RTL8192E)
-		hal_txbf_8192e_status(p_dm, idx);
-	else if (p_dm->support_ic_type & ODM_RTL8814A)
-		hal_txbf_8814a_status(p_dm, idx);
-	else if (p_dm->support_ic_type & ODM_RTL8822B)
-		hal_txbf_8822b_status(p_dm, idx);
+	if (dm->support_ic_type & (ODM_RTL8812 | ODM_RTL8821))
+		hal_txbf_jaguar_status(dm, idx);
+	else if (dm->support_ic_type & ODM_RTL8192E)
+		hal_txbf_8192e_status(dm, idx);
+	else if (dm->support_ic_type & ODM_RTL8814A)
+		hal_txbf_8814a_status(dm, idx);
+	else if (dm->support_ic_type & ODM_RTL8822B)
+		hal_txbf_8822b_status(dm, idx);
 }
 
-void
-hal_com_txbf_reset_tx_path_work_item_callback(
+void hal_com_txbf_reset_tx_path_work_item_callback(
 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
-	struct _ADAPTER		*adapter
+	void *adapter
 #else
-	void			*p_dm_void
+	void *dm_void
 #endif
-)
+	)
 {
 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
-	PHAL_DATA_TYPE	p_hal_data = GET_HAL_DATA(adapter);
-	struct PHY_DM_STRUCT		*p_dm = &p_hal_data->DM_OutSrc;
+	PHAL_DATA_TYPE hal_data = GET_HAL_DATA(((PADAPTER)adapter));
+	struct dm_struct *dm = &hal_data->DM_OutSrc;
 #else
-	struct PHY_DM_STRUCT	*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
 #endif
-	struct _HAL_TXBF_INFO	*p_txbf_info = &p_dm->beamforming_info.txbf_info;
-
-	u8			idx = p_txbf_info->txbf_idx;
+	struct _HAL_TXBF_INFO *p_txbf_info = &dm->beamforming_info.txbf_info;
 
-	if (p_dm->support_ic_type & ODM_RTL8814A)
-		hal_txbf_8814a_reset_tx_path(p_dm, idx);
+	u8 idx = p_txbf_info->txbf_idx;
 
+	if (dm->support_ic_type & ODM_RTL8814A)
+		hal_txbf_8814a_reset_tx_path(dm, idx);
 }
 
-void
-hal_com_txbf_get_tx_rate_work_item_callback(
+void hal_com_txbf_get_tx_rate_work_item_callback(
 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
-	struct _ADAPTER		*adapter
+	void *adapter
 #else
-	void			*p_dm_void
+	void *dm_void
 #endif
-)
+	)
 {
 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
-	PHAL_DATA_TYPE	p_hal_data = GET_HAL_DATA(adapter);
-	struct PHY_DM_STRUCT		*p_dm = &p_hal_data->DM_OutSrc;
+	PHAL_DATA_TYPE hal_data = GET_HAL_DATA(((PADAPTER)adapter));
+	struct dm_struct *dm = &hal_data->DM_OutSrc;
 #else
-	struct PHY_DM_STRUCT	*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
 #endif
 
-	if (p_dm->support_ic_type & ODM_RTL8814A)
-		hal_txbf_8814a_get_tx_rate(p_dm);
+	if (dm->support_ic_type & ODM_RTL8814A)
+		hal_txbf_8814a_get_tx_rate(dm);
 }
 
-
 boolean
 hal_com_txbf_set(
-	void			*p_dm_void,
-	u8			set_type,
-	void			*p_in_buf
-)
+	void *dm_void,
+	u8 set_type,
+	void *p_in_buf)
 {
-	struct PHY_DM_STRUCT	*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	u8			*p_u1_tmp = (u8 *)p_in_buf;
-	struct _HAL_TXBF_INFO	*p_txbf_info = &p_dm->beamforming_info.txbf_info;
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	u8 *p_u1_tmp = (u8 *)p_in_buf;
+	struct _HAL_TXBF_INFO *p_txbf_info = &dm->beamforming_info.txbf_info;
 
-	PHYDM_DBG(p_dm, DBG_TXBF, ("[%s] set_type = 0x%X\n", __func__, set_type));
+	PHYDM_DBG(dm, DBG_TXBF, "[%s] set_type = 0x%X\n", __func__, set_type);
 
 	switch (set_type) {
 	case TXBF_SET_SOUNDING_ENTER:
 		p_txbf_info->txbf_idx = *p_u1_tmp;
-		phydm_beamform_set_sounding_enter(p_dm);
+		phydm_beamform_set_sounding_enter(dm);
 		break;
 
 	case TXBF_SET_SOUNDING_LEAVE:
 		p_txbf_info->txbf_idx = *p_u1_tmp;
-		phydm_beamform_set_sounding_leave(p_dm);
+		phydm_beamform_set_sounding_leave(dm);
 		break;
 
 	case TXBF_SET_SOUNDING_RATE:
 		p_txbf_info->BW = p_u1_tmp[0];
 		p_txbf_info->rate = p_u1_tmp[1];
-		phydm_beamform_set_sounding_rate(p_dm);
+		phydm_beamform_set_sounding_rate(dm);
 		break;
 
 	case TXBF_SET_SOUNDING_STATUS:
 		p_txbf_info->txbf_idx = *p_u1_tmp;
-		phydm_beamform_set_sounding_status(p_dm);
+		phydm_beamform_set_sounding_status(dm);
 		break;
 
 	case TXBF_SET_SOUNDING_FW_NDPA:
 		p_txbf_info->ndpa_idx = *p_u1_tmp;
-		phydm_beamform_set_sounding_fw_ndpa(p_dm);
+		phydm_beamform_set_sounding_fw_ndpa(dm);
 		break;
 
 	case TXBF_SET_SOUNDING_CLK:
-		phydm_beamform_set_sounding_clk(p_dm);
+		phydm_beamform_set_sounding_clk(dm);
 		break;
 
 	case TXBF_SET_TX_PATH_RESET:
 		p_txbf_info->txbf_idx = *p_u1_tmp;
-		phydm_beamform_set_reset_tx_path(p_dm);
+		phydm_beamform_set_reset_tx_path(dm);
 		break;
 
 	case TXBF_SET_GET_TX_RATE:
-		phydm_beamform_set_get_tx_rate(p_dm);
+		phydm_beamform_set_get_tx_rate(dm);
 		break;
-
 	}
 
 	return true;
@@ -492,52 +451,62 @@ hal_com_txbf_set(
 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
 boolean
 hal_com_txbf_get(
-	struct _ADAPTER		*adapter,
-	u8			get_type,
-	void			*p_out_buf
-)
+	void *adapter,
+	u8 get_type,
+	void *p_out_buf)
 {
-	PHAL_DATA_TYPE		p_hal_data = GET_HAL_DATA(adapter);
-	struct PHY_DM_STRUCT			*p_dm = &p_hal_data->DM_OutSrc;
-	boolean			*p_boolean = (boolean *)p_out_buf;
+	PHAL_DATA_TYPE hal_data = GET_HAL_DATA(((PADAPTER)adapter));
+	struct dm_struct *dm = &hal_data->DM_OutSrc;
+	boolean *p_boolean = (boolean *)p_out_buf;
 
-	PHYDM_DBG(p_dm, DBG_TXBF, ("[%s] Start!\n", __func__));
+	PHYDM_DBG(dm, DBG_TXBF, "[%s] Start!\n", __func__);
 
 	if (get_type == TXBF_GET_EXPLICIT_BEAMFORMEE) {
 		if (IS_HARDWARE_TYPE_OLDER_THAN_8812A(adapter))
 			*p_boolean = false;
-		else if (/*IS_HARDWARE_TYPE_8822B(adapter)	||*/
-			IS_HARDWARE_TYPE_8821B(adapter)	||
-			IS_HARDWARE_TYPE_8192E(adapter)	||
-			IS_HARDWARE_TYPE_JAGUAR(adapter) || IS_HARDWARE_TYPE_JAGUAR_AND_JAGUAR2(adapter))
+		else if (/*@IS_HARDWARE_TYPE_8822B(adapter)	||*/
+			 IS_HARDWARE_TYPE_8821B(adapter) ||
+			 IS_HARDWARE_TYPE_8192E(adapter) ||
+			 IS_HARDWARE_TYPE_8192F(adapter) ||
+			 IS_HARDWARE_TYPE_JAGUAR(adapter) ||
+			 IS_HARDWARE_TYPE_JAGUAR_AND_JAGUAR2(adapter) ||
+			 IS_HARDWARE_TYPE_JAGUAR3(adapter))
 			*p_boolean = true;
 		else
 			*p_boolean = false;
 	} else if (get_type == TXBF_GET_EXPLICIT_BEAMFORMER) {
 		if (IS_HARDWARE_TYPE_OLDER_THAN_8812A(adapter))
 			*p_boolean = false;
-		else	if (/*IS_HARDWARE_TYPE_8822B(adapter)	||*/
-			IS_HARDWARE_TYPE_8821B(adapter)	||
-			IS_HARDWARE_TYPE_8192E(adapter)	||
-			IS_HARDWARE_TYPE_JAGUAR(adapter) || IS_HARDWARE_TYPE_JAGUAR_AND_JAGUAR2(adapter)) {
-			if (p_hal_data->RF_Type == RF_2T2R || p_hal_data->RF_Type == RF_3T3R)
+		else if (/*@IS_HARDWARE_TYPE_8822B(adapter)	||*/
+			 IS_HARDWARE_TYPE_8821B(adapter) ||
+			 IS_HARDWARE_TYPE_8192E(adapter) ||
+			 IS_HARDWARE_TYPE_8192F(adapter) ||
+			 IS_HARDWARE_TYPE_JAGUAR(adapter) ||
+			 IS_HARDWARE_TYPE_JAGUAR_AND_JAGUAR2(adapter) ||
+			 IS_HARDWARE_TYPE_JAGUAR3(adapter)) {
+			if (hal_data->RF_Type == RF_2T2R ||
+			    hal_data->RF_Type == RF_3T3R ||
+			    hal_data->RF_Type == RF_4T4R)
 				*p_boolean = true;
 			else
 				*p_boolean = false;
 		} else
 			*p_boolean = false;
 	} else if (get_type == TXBF_GET_MU_MIMO_STA) {
-#if ((RTL8822B_SUPPORT == 1) || (RTL8821C_SUPPORT == 1))
-		if (IS_HARDWARE_TYPE_8822B(adapter) || IS_HARDWARE_TYPE_8821C(adapter))
+#if ((RTL8822B_SUPPORT == 1) || (RTL8821C_SUPPORT == 1) ||\
+	(RTL8822C_SUPPORT == 1))
+		if (IS_HARDWARE_TYPE_8822B(adapter) ||
+		    IS_HARDWARE_TYPE_8821C(adapter) ||
+		    IS_HARDWARE_TYPE_JAGUAR3(adapter))
 			*p_boolean = true;
 		else
 #endif
 			*p_boolean = false;
 
-
 	} else if (get_type == TXBF_GET_MU_MIMO_AP) {
-#if (RTL8822B_SUPPORT == 1)
-		if (IS_HARDWARE_TYPE_8822B(adapter))
+#if ((RTL8822B_SUPPORT == 1) || (RTL8822C_SUPPORT == 1))
+		if (IS_HARDWARE_TYPE_8822B(adapter) ||
+		    IS_HARDWARE_TYPE_JAGUAR3(adapter))
 			*p_boolean = true;
 		else
 #endif
@@ -548,5 +517,4 @@ hal_com_txbf_get(
 }
 #endif
 
-
 #endif
diff --git a/rtl8723DS/hal/phydm/txbf/halcomtxbf.h b/rtl8723DS/hal/phydm/txbf/halcomtxbf.h
index 0d95b69..5ad3033 100755..100644
--- a/rtl8723DS/hal/phydm/txbf/halcomtxbf.h
+++ b/rtl8723DS/hal/phydm/txbf/halcomtxbf.h
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2016 - 2017 Realtek Corporation.
+ * Copyright(c) 2007 - 2017  Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -8,28 +8,38 @@
  *
  * This program is distributed in the hope that it will be useful, but WITHOUT
  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  * more details.
  *
+ * The full GNU General Public License is included in this distribution in the
+ * file called LICENSE.
+ *
+ * Contact Information:
+ * wlanfae <wlanfae@realtek.com>
+ * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
+ * Hsinchu 300, Taiwan.
+ *
+ * Larry Finger <Larry.Finger@lwfinger.net>
+ *
  *****************************************************************************/
 #ifndef __HAL_COM_TXBF_H__
 #define __HAL_COM_TXBF_H__
 
-/*
+#if 0
 typedef	bool
 (*TXBF_GET)(
-	void*			p_adapter,
+	void*			adapter,
 	u8			get_type,
 	void*			p_out_buf
 	);
 
 typedef	bool
 (*TXBF_SET)(
-	void*			p_adapter,
+	void*			adapter,
 	u8			set_type,
 	void*			p_in_buf
 	);
-*/
+#endif
 
 enum txbf_set_type {
 	TXBF_SET_SOUNDING_ENTER,
@@ -42,7 +52,6 @@ enum txbf_set_type {
 	TXBF_SET_GET_TX_RATE
 };
 
-
 enum txbf_get_type {
 	TXBF_GET_EXPLICIT_BEAMFORMEE,
 	TXBF_GET_EXPLICIT_BEAMFORMER,
@@ -50,144 +59,125 @@ enum txbf_get_type {
 	TXBF_GET_MU_MIMO_AP
 };
 
-
-
-/* 2 HAL TXBF related */
+/* @2 HAL TXBF related */
 struct _HAL_TXBF_INFO {
-	u8				txbf_idx;
-	u8				ndpa_idx;
-	u8				BW;
-	u8				rate;
+	u8 txbf_idx;
+	u8 ndpa_idx;
+	u8 BW;
+	u8 rate;
 
-	struct timer_list			txbf_fw_ndpa_timer;
+	struct phydm_timer_list txbf_fw_ndpa_timer;
 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
-	RT_WORK_ITEM		txbf_enter_work_item;
-	RT_WORK_ITEM		txbf_leave_work_item;
-	RT_WORK_ITEM		txbf_fw_ndpa_work_item;
-	RT_WORK_ITEM		txbf_clk_work_item;
-	RT_WORK_ITEM		txbf_status_work_item;
-	RT_WORK_ITEM		txbf_rate_work_item;
-	RT_WORK_ITEM		txbf_reset_tx_path_work_item;
-	RT_WORK_ITEM		txbf_get_tx_rate_work_item;
+	RT_WORK_ITEM txbf_enter_work_item;
+	RT_WORK_ITEM txbf_leave_work_item;
+	RT_WORK_ITEM txbf_fw_ndpa_work_item;
+	RT_WORK_ITEM txbf_clk_work_item;
+	RT_WORK_ITEM txbf_status_work_item;
+	RT_WORK_ITEM txbf_rate_work_item;
+	RT_WORK_ITEM txbf_reset_tx_path_work_item;
+	RT_WORK_ITEM txbf_get_tx_rate_work_item;
 #endif
-
 };
 
-#if (BEAMFORMING_SUPPORT == 1)
+#ifdef PHYDM_BEAMFORMING_SUPPORT
 
-void
-hal_com_txbf_beamform_init(
-	void			*p_dm_void
-);
+void hal_com_txbf_beamform_init(
+	void *dm_void);
 
-void
-hal_com_txbf_config_gtab(
-	void			*p_dm_void
-);
+void hal_com_txbf_config_gtab(
+	void *dm_void);
 
-void
-hal_com_txbf_enter_work_item_callback(
+void hal_com_txbf_enter_work_item_callback(
 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
-	struct _ADAPTER		*adapter
+	void *adapter
 #else
-	void			*p_dm_void
+	void *dm_void
 #endif
-);
+	);
 
-void
-hal_com_txbf_leave_work_item_callback(
+void hal_com_txbf_leave_work_item_callback(
 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
-	struct _ADAPTER		*adapter
+	void *adapter
 #else
-	void			*p_dm_void
+	void *dm_void
 #endif
-);
+	);
 
-void
-hal_com_txbf_fw_ndpa_work_item_callback(
+void hal_com_txbf_fw_ndpa_work_item_callback(
 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
-	struct _ADAPTER		*adapter
+	void *adapter
 #else
-	void			*p_dm_void
+	void *dm_void
 #endif
-);
+	);
 
-void
-hal_com_txbf_clk_work_item_callback(
+void hal_com_txbf_clk_work_item_callback(
 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
-	struct _ADAPTER		*adapter
+	void *adapter
 #else
-	void			*p_dm_void
+	void *dm_void
 #endif
-);
+	);
 
-void
-hal_com_txbf_reset_tx_path_work_item_callback(
+void hal_com_txbf_reset_tx_path_work_item_callback(
 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
-	struct _ADAPTER		*adapter
+	void *adapter
 #else
-	void			*p_dm_void
+	void *dm_void
 #endif
-);
+	);
 
-void
-hal_com_txbf_get_tx_rate_work_item_callback(
+void hal_com_txbf_get_tx_rate_work_item_callback(
 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
-	struct _ADAPTER		*adapter
+	void *adapter
 #else
-	void			*p_dm_void
+	void *dm_void
 #endif
-);
+	);
 
-void
-hal_com_txbf_rate_work_item_callback(
+void hal_com_txbf_rate_work_item_callback(
 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
-	struct _ADAPTER		*adapter
+	void *adapter
 #else
-	void			*p_dm_void
+	void *dm_void
 #endif
-);
+	);
 
-void
-hal_com_txbf_fw_ndpa_timer_callback(
-	struct timer_list		*p_timer
-);
+void hal_com_txbf_fw_ndpa_timer_callback(
+	struct phydm_timer_list *timer);
 
-void
-hal_com_txbf_status_work_item_callback(
+void hal_com_txbf_status_work_item_callback(
 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
-	struct _ADAPTER		*adapter
+	void *adapter
 #else
-	void			*p_dm_void
+	void *dm_void
 #endif
-);
+	);
 
 boolean
 hal_com_txbf_set(
-	void			*p_dm_void,
-	u8			set_type,
-	void			*p_in_buf
-);
+	void *dm_void,
+	u8 set_type,
+	void *p_in_buf);
 
 boolean
 hal_com_txbf_get(
-	struct _ADAPTER		*adapter,
-	u8			get_type,
-	void			*p_out_buf
-);
+	void *adapter,
+	u8 get_type,
+	void *p_out_buf);
 
 #else
-#define hal_com_txbf_beamform_init(p_dm_void)					NULL
-#define hal_com_txbf_config_gtab(p_dm_void)				NULL
-#define hal_com_txbf_enter_work_item_callback(_adapter)		NULL
-#define hal_com_txbf_leave_work_item_callback(_adapter)		NULL
-#define hal_com_txbf_fw_ndpa_work_item_callback(_adapter)		NULL
-#define hal_com_txbf_clk_work_item_callback(_adapter)			NULL
-#define hal_com_txbf_rate_work_item_callback(_adapter)		NULL
-#define hal_com_txbf_fw_ndpa_timer_callback(_adapter)		NULL
-#define hal_com_txbf_status_work_item_callback(_adapter)		NULL
+#define hal_com_txbf_beamform_init(dm_void) NULL
+#define hal_com_txbf_config_gtab(dm_void) NULL
+#define hal_com_txbf_enter_work_item_callback(_adapter) NULL
+#define hal_com_txbf_leave_work_item_callback(_adapter) NULL
+#define hal_com_txbf_fw_ndpa_work_item_callback(_adapter) NULL
+#define hal_com_txbf_clk_work_item_callback(_adapter) NULL
+#define hal_com_txbf_rate_work_item_callback(_adapter) NULL
+#define hal_com_txbf_fw_ndpa_timer_callback(_adapter) NULL
+#define hal_com_txbf_status_work_item_callback(_adapter) NULL
 #define hal_com_txbf_get(_adapter, _get_type, _pout_buf)
 
 #endif
 
-#endif	/*  #ifndef __HAL_COM_TXBF_H__ */
+#endif /*  @#ifndef __HAL_COM_TXBF_H__ */
diff --git a/rtl8723DS/hal/phydm/txbf/haltxbf8192e.c b/rtl8723DS/hal/phydm/txbf/haltxbf8192e.c
index e82a99b..daac3e5 100755..100644
--- a/rtl8723DS/hal/phydm/txbf/haltxbf8192e.c
+++ b/rtl8723DS/hal/phydm/txbf/haltxbf8192e.c
@@ -12,104 +12,95 @@
  * more details.
  *
  *****************************************************************************/
-/* ************************************************************
+/*************************************************************
  * Description:
  *
  * This file is for 8192E TXBF mechanism
  *
- * ************************************************************ */
+ ************************************************************/
 #include "mp_precomp.h"
 #include "../phydm_precomp.h"
 
-#if (BEAMFORMING_SUPPORT == 1)
+#ifdef PHYDM_BEAMFORMING_SUPPORT
 #if (RTL8192E_SUPPORT == 1)
 
-void
-hal_txbf_8192e_set_ndpa_rate(
-	void			*p_dm_void,
-	u8	BW,
-	u8	rate
-)
+void hal_txbf_8192e_set_ndpa_rate(
+	void *dm_void,
+	u8 BW,
+	u8 rate)
 {
-	struct PHY_DM_STRUCT	*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-
-	odm_write_1byte(p_dm, REG_NDPA_OPT_CTRL_8192E, (rate << 2 | BW));
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
 
+	odm_write_1byte(dm, REG_NDPA_OPT_CTRL_8192E, (rate << 2 | BW));
 }
 
-void
-hal_txbf_8192e_rf_mode(
-	void			*p_dm_void,
-	struct _RT_BEAMFORMING_INFO	*p_beam_info
-)
+void hal_txbf_8192e_rf_mode(
+	void *dm_void,
+	struct _RT_BEAMFORMING_INFO *beam_info)
 {
-	struct PHY_DM_STRUCT	*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
 
-	PHYDM_DBG(p_dm, DBG_TXBF, ("[%s] Start!\n", __func__));
+	PHYDM_DBG(dm, DBG_TXBF, "[%s] Start!\n", __func__);
 
-	if (p_dm->rf_type == RF_1T1R)
+	if (dm->rf_type == RF_1T1R)
 		return;
 
-	odm_set_rf_reg(p_dm, RF_PATH_A, RF_WE_LUT, 0x80000, 0x1); /*RF mode table write enable*/
-	odm_set_rf_reg(p_dm, RF_PATH_B, RF_WE_LUT, 0x80000, 0x1); /*RF mode table write enable*/
+	odm_set_rf_reg(dm, RF_PATH_A, RF_WE_LUT, 0x80000, 0x1); /*RF mode table write enable*/
+	odm_set_rf_reg(dm, RF_PATH_B, RF_WE_LUT, 0x80000, 0x1); /*RF mode table write enable*/
 
-	if (p_beam_info->beamformee_su_cnt > 0) {
+	if (beam_info->beamformee_su_cnt > 0) {
 		/*Path_A*/
-		odm_set_rf_reg(p_dm, RF_PATH_A, 0x30, 0xfffff, 0x18000);	/*Select RX mode  0x30=0x18000*/
-		odm_set_rf_reg(p_dm, RF_PATH_A, 0x31, 0xfffff, 0x0000f);	/*Set Table data*/
-		odm_set_rf_reg(p_dm, RF_PATH_A, 0x32, 0xfffff, 0x77fc2);	/*Enable TXIQGEN in RX mode*/
+		odm_set_rf_reg(dm, RF_PATH_A, RF_0x30, 0xfffff, 0x18000); /*Select RX mode  0x30=0x18000*/
+		odm_set_rf_reg(dm, RF_PATH_A, RF_0x31, 0xfffff, 0x0000f); /*Set Table data*/
+		odm_set_rf_reg(dm, RF_PATH_A, RF_0x32, 0xfffff, 0x77fc2); /*@Enable TXIQGEN in RX mode*/
 		/*Path_B*/
-		odm_set_rf_reg(p_dm, RF_PATH_B, 0x30, 0xfffff, 0x18000);	/*Select RX mode*/
-		odm_set_rf_reg(p_dm, RF_PATH_B, 0x31, 0xfffff, 0x0000f);	/*Set Table data*/
-		odm_set_rf_reg(p_dm, RF_PATH_B, 0x32, 0xfffff, 0x77fc2);	/*Enable TXIQGEN in RX mode*/
+		odm_set_rf_reg(dm, RF_PATH_B, RF_0x30, 0xfffff, 0x18000); /*Select RX mode*/
+		odm_set_rf_reg(dm, RF_PATH_B, RF_0x31, 0xfffff, 0x0000f); /*Set Table data*/
+		odm_set_rf_reg(dm, RF_PATH_B, RF_0x32, 0xfffff, 0x77fc2); /*@Enable TXIQGEN in RX mode*/
 	} else {
 		/*Path_A*/
-		odm_set_rf_reg(p_dm, RF_PATH_A, 0x30, 0xfffff, 0x18000);	/*Select RX mode*/
-		odm_set_rf_reg(p_dm, RF_PATH_A, 0x31, 0xfffff, 0x0000f);	/*Set Table data*/
-		odm_set_rf_reg(p_dm, RF_PATH_A, 0x32, 0xfffff, 0x77f82);	/*Disable TXIQGEN in RX mode*/
+		odm_set_rf_reg(dm, RF_PATH_A, RF_0x30, 0xfffff, 0x18000); /*Select RX mode*/
+		odm_set_rf_reg(dm, RF_PATH_A, RF_0x31, 0xfffff, 0x0000f); /*Set Table data*/
+		odm_set_rf_reg(dm, RF_PATH_A, RF_0x32, 0xfffff, 0x77f82); /*@Disable TXIQGEN in RX mode*/
 		/*Path_B*/
-		odm_set_rf_reg(p_dm, RF_PATH_B, 0x30, 0xfffff, 0x18000);	/*Select RX mode*/
-		odm_set_rf_reg(p_dm, RF_PATH_B, 0x31, 0xfffff, 0x0000f);	/*Set Table data*/
-		odm_set_rf_reg(p_dm, RF_PATH_B, 0x32, 0xfffff, 0x77f82);	/*Disable TXIQGEN in RX mode*/
+		odm_set_rf_reg(dm, RF_PATH_B, RF_0x30, 0xfffff, 0x18000); /*Select RX mode*/
+		odm_set_rf_reg(dm, RF_PATH_B, RF_0x31, 0xfffff, 0x0000f); /*Set Table data*/
+		odm_set_rf_reg(dm, RF_PATH_B, RF_0x32, 0xfffff, 0x77f82); /*@Disable TXIQGEN in RX mode*/
 	}
 
-	odm_set_rf_reg(p_dm, RF_PATH_A, RF_WE_LUT, 0x80000, 0x0);	/*RF mode table write disable*/
-	odm_set_rf_reg(p_dm, RF_PATH_B, RF_WE_LUT, 0x80000, 0x0);	/*RF mode table write disable*/
+	odm_set_rf_reg(dm, RF_PATH_A, RF_WE_LUT, 0x80000, 0x0); /*RF mode table write disable*/
+	odm_set_rf_reg(dm, RF_PATH_B, RF_WE_LUT, 0x80000, 0x0); /*RF mode table write disable*/
 
-	if (p_beam_info->beamformee_su_cnt > 0) {
-		odm_set_bb_reg(p_dm, 0x90c, MASKDWORD, 0x83321333);
-		odm_set_bb_reg(p_dm, 0xa04, MASKBYTE3, 0xc1);
+	if (beam_info->beamformee_su_cnt > 0) {
+		odm_set_bb_reg(dm, R_0x90c, MASKDWORD, 0x83321333);
+		odm_set_bb_reg(dm, R_0xa04, MASKBYTE3, 0xc1);
 	} else
-		odm_set_bb_reg(p_dm, 0x90c, MASKDWORD, 0x81121313);
+		odm_set_bb_reg(dm, R_0x90c, MASKDWORD, 0x81121313);
 }
 
-
-
-void
-hal_txbf_8192e_fw_txbf_cmd(
-	void			*p_dm_void
-)
+void hal_txbf_8192e_fw_txbf_cmd(
+	void *dm_void)
 {
-	struct PHY_DM_STRUCT	*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	u8	idx, period0 = 0, period1 = 0;
-	u8	PageNum0 = 0xFF, PageNum1 = 0xFF;
-	u8	u1_tx_bf_parm[3] = {0};
-	struct _RT_BEAMFORMING_INFO	*p_beam_info = &p_dm->beamforming_info;
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	u8 idx, period0 = 0, period1 = 0;
+	u8 PageNum0 = 0xFF, PageNum1 = 0xFF;
+	u8 u1_tx_bf_parm[3] = {0};
+	struct _RT_BEAMFORMING_INFO *beam_info = &dm->beamforming_info;
 
 	for (idx = 0; idx < BEAMFORMEE_ENTRY_NUM; idx++) {
-		if (p_beam_info->beamformee_entry[idx].beamform_entry_state == BEAMFORMING_ENTRY_STATE_PROGRESSED) {
+		if (beam_info->beamformee_entry[idx].beamform_entry_state == BEAMFORMING_ENTRY_STATE_PROGRESSED) {
 			if (idx == 0) {
-				if (p_beam_info->beamformee_entry[idx].is_sound)
+				if (beam_info->beamformee_entry[idx].is_sound)
 					PageNum0 = 0xFE;
 				else
 					PageNum0 = 0xFF; /* stop sounding */
-				period0 = (u8)(p_beam_info->beamformee_entry[idx].sound_period);
+				period0 = (u8)(beam_info->beamformee_entry[idx].sound_period);
 			} else if (idx == 1) {
-				if (p_beam_info->beamformee_entry[idx].is_sound)
+				if (beam_info->beamformee_entry[idx].is_sound)
 					PageNum1 = 0xFE;
 				else
 					PageNum1 = 0xFF; /* stop sounding */
-				period1 = (u8)(p_beam_info->beamformee_entry[idx].sound_period);
+				period1 = (u8)(beam_info->beamformee_entry[idx].sound_period);
 			}
 		}
 	}
@@ -117,242 +108,235 @@ hal_txbf_8192e_fw_txbf_cmd(
 	u1_tx_bf_parm[0] = PageNum0;
 	u1_tx_bf_parm[1] = PageNum1;
 	u1_tx_bf_parm[2] = (period1 << 4) | period0;
-	odm_fill_h2c_cmd(p_dm, PHYDM_H2C_TXBF, 3, u1_tx_bf_parm);
+	odm_fill_h2c_cmd(dm, PHYDM_H2C_TXBF, 3, u1_tx_bf_parm);
 
-	PHYDM_DBG(p_dm, DBG_TXBF,
-		("[%s] PageNum0 = %d period0 = %d, PageNum1 = %d period1 %d\n", __func__, PageNum0, period0, PageNum1, period1));
+	PHYDM_DBG(dm, DBG_TXBF,
+		  "[%s] PageNum0 = %d period0 = %d, PageNum1 = %d period1 %d\n",
+		  __func__, PageNum0, period0, PageNum1, period1);
 }
 
-
-void
-hal_txbf_8192e_download_ndpa(
-	void			*p_dm_void,
-	u8				idx
-)
+void hal_txbf_8192e_download_ndpa(
+	void *dm_void,
+	u8 idx)
 {
-	struct PHY_DM_STRUCT	*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	u8			u1b_tmp = 0, tmp_reg422 = 0, head_page;
-	u8			bcn_valid_reg = 0, count = 0, dl_bcn_count = 0;
-	boolean			is_send_beacon = false;
-	u8			tx_page_bndy = LAST_ENTRY_OF_TX_PKT_BUFFER_8812;
-	/*default reseved 1 page for the IC type which is undefined.*/
-	struct _RT_BEAMFORMING_INFO	*p_beam_info = &p_dm->beamforming_info;
-	struct _RT_BEAMFORMEE_ENTRY	*p_beam_entry = p_beam_info->beamformee_entry + idx;
-
-	PHYDM_DBG(p_dm, DBG_TXBF, ("[%s] Start!\n", __func__));
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	u8 u1b_tmp = 0, tmp_reg422 = 0, head_page;
+	u8 bcn_valid_reg = 0, count = 0, dl_bcn_count = 0;
+	boolean is_send_beacon = false;
+	u8 tx_page_bndy = LAST_ENTRY_OF_TX_PKT_BUFFER_8812;
+	/*@default reseved 1 page for the IC type which is undefined.*/
+	struct _RT_BEAMFORMING_INFO *beam_info = &dm->beamforming_info;
+	struct _RT_BEAMFORMEE_ENTRY *p_beam_entry = beam_info->beamformee_entry + idx;
+
+	PHYDM_DBG(dm, DBG_TXBF, "[%s] Start!\n", __func__);
 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
-	*p_dm->p_is_fw_dw_rsvd_page_in_progress = true;
+	*dm->is_fw_dw_rsvd_page_in_progress = true;
 #endif
 	if (idx == 0)
 		head_page = 0xFE;
 	else
 		head_page = 0xFE;
 
-	phydm_get_hal_def_var_handler_interface(p_dm, HAL_DEF_TX_PAGE_BOUNDARY, (u8 *)&tx_page_bndy);
+	phydm_get_hal_def_var_handler_interface(dm, HAL_DEF_TX_PAGE_BOUNDARY, (u8 *)&tx_page_bndy);
 
 	/*Set REG_CR bit 8. DMA beacon by SW.*/
-	u1b_tmp = odm_read_1byte(p_dm, REG_CR_8192E+1);
-	odm_write_1byte(p_dm,  REG_CR_8192E+1, (u1b_tmp | BIT(0)));
+	u1b_tmp = odm_read_1byte(dm, REG_CR_8192E + 1);
+	odm_write_1byte(dm, REG_CR_8192E + 1, (u1b_tmp | BIT(0)));
 
 	/*Set FWHW_TXQ_CTRL 0x422[6]=0 to tell Hw the packet is not a real beacon frame.*/
-	tmp_reg422 = odm_read_1byte(p_dm, REG_FWHW_TXQ_CTRL_8192E+2);
-	odm_write_1byte(p_dm, REG_FWHW_TXQ_CTRL_8192E+2,  tmp_reg422 & (~BIT(6)));
+	tmp_reg422 = odm_read_1byte(dm, REG_FWHW_TXQ_CTRL_8192E + 2);
+	odm_write_1byte(dm, REG_FWHW_TXQ_CTRL_8192E + 2, tmp_reg422 & (~BIT(6)));
 
 	if (tmp_reg422 & BIT(6)) {
-		PHYDM_DBG(p_dm, DBG_TXBF, ("%s There is an adapter is sending beacon.\n", __func__));
+		PHYDM_DBG(dm, DBG_TXBF,
+			  "%s There is an adapter is sending beacon.\n",
+			  __func__);
 		is_send_beacon = true;
 	}
 
 	/*TDECTRL[15:8] 0x209[7:0] = 0xFE/0xFD	NDPA Head for TXDMA*/
-	odm_write_1byte(p_dm, REG_DWBCN0_CTRL_8192E+1, head_page);
+	odm_write_1byte(dm, REG_DWBCN0_CTRL_8192E + 1, head_page);
 
 	do {
-		/*Clear beacon valid check bit.*/
-		bcn_valid_reg = odm_read_1byte(p_dm, REG_DWBCN0_CTRL_8192E+2);
-		odm_write_1byte(p_dm, REG_DWBCN0_CTRL_8192E+2, (bcn_valid_reg | BIT(0)));
+		/*@Clear beacon valid check bit.*/
+		bcn_valid_reg = odm_read_1byte(dm, REG_DWBCN0_CTRL_8192E + 2);
+		odm_write_1byte(dm, REG_DWBCN0_CTRL_8192E + 2, (bcn_valid_reg | BIT(0)));
 
-		/* download NDPA rsvd page. */
-		beamforming_send_ht_ndpa_packet(p_dm, p_beam_entry->mac_addr, p_beam_entry->sound_bw, BEACON_QUEUE);
+		/* @download NDPA rsvd page. */
+		beamforming_send_ht_ndpa_packet(dm, p_beam_entry->mac_addr, p_beam_entry->sound_bw, BEACON_QUEUE);
 
 #if (DEV_BUS_TYPE == RT_PCI_INTERFACE)
-		u1b_tmp = odm_read_1byte(p_dm, REG_MGQ_TXBD_NUM_8192E+3);
-		count = 0;
-		while ((count < 20) && (u1b_tmp & BIT(4))) {
-			count++;
-			ODM_delay_us(10);
-			u1b_tmp = odm_read_1byte(p_dm, REG_MGQ_TXBD_NUM_8192E+3);
+		if (dm->support_interface == ODM_ITRF_PCIE) {
+			u1b_tmp = odm_read_1byte(dm, REG_MGQ_TXBD_NUM_8192E + 3);
+			count = 0;
+			while ((count < 20) && (u1b_tmp & BIT(4))) {
+				count++;
+				ODM_delay_us(10);
+				u1b_tmp = odm_read_1byte(dm, REG_MGQ_TXBD_NUM_8192E + 3);
+			}
+			odm_write_1byte(dm, REG_MGQ_TXBD_NUM_8192E + 3, u1b_tmp | BIT(4));
 		}
-		odm_write_1byte(p_dm, REG_MGQ_TXBD_NUM_8192E+3, u1b_tmp | BIT(4));
 #endif
 
-		/*check rsvd page download OK.*/
-		bcn_valid_reg = odm_read_1byte(p_dm, REG_DWBCN0_CTRL_8192E+2);
+		/*@check rsvd page download OK.*/
+		bcn_valid_reg = odm_read_1byte(dm, REG_DWBCN0_CTRL_8192E + 2);
 		count = 0;
 		while (!(bcn_valid_reg & BIT(0)) && count < 20) {
 			count++;
 			ODM_delay_us(10);
-			bcn_valid_reg = odm_read_1byte(p_dm, REG_DWBCN0_CTRL_8192E+2);
+			bcn_valid_reg = odm_read_1byte(dm, REG_DWBCN0_CTRL_8192E + 2);
 		}
 		dl_bcn_count++;
 	} while (!(bcn_valid_reg & BIT(0)) && dl_bcn_count < 5);
 
 	if (!(bcn_valid_reg & BIT(0)))
-		PHYDM_DBG(p_dm, DBG_TXBF, ("%s Download RSVD page failed!\n", __func__));
+		PHYDM_DBG(dm, DBG_TXBF, "%s Download RSVD page failed!\n",
+			  __func__);
 
 	/*TDECTRL[15:8] 0x209[7:0] = 0xF9	Beacon Head for TXDMA*/
-	odm_write_1byte(p_dm, REG_DWBCN0_CTRL_8192E+1, tx_page_bndy);
+	odm_write_1byte(dm, REG_DWBCN0_CTRL_8192E + 1, tx_page_bndy);
 
 	/*To make sure that if there exists an adapter which would like to send beacon.*/
-	/*If exists, the origianl value of 0x422[6] will be 1, we should check this to*/
+	/*@If exists, the origianl value of 0x422[6] will be 1, we should check this to*/
 	/*prevent from setting 0x422[6] to 0 after download reserved page, or it will cause*/
 	/*the beacon cannot be sent by HW.*/
-	/*2010.06.23. Added by tynli.*/
+	/*@2010.06.23. Added by tynli.*/
 	if (is_send_beacon)
-		odm_write_1byte(p_dm, REG_FWHW_TXQ_CTRL_8192E+2, tmp_reg422);
+		odm_write_1byte(dm, REG_FWHW_TXQ_CTRL_8192E + 2, tmp_reg422);
 
-	/*Do not enable HW DMA BCN or it will cause Pcie interface hang by timing issue. 2011.11.24. by tynli.*/
-	/*Clear CR[8] or beacon packet will not be send to TxBuf anymore.*/
-	u1b_tmp = odm_read_1byte(p_dm, REG_CR_8192E+1);
-	odm_write_1byte(p_dm, REG_CR_8192E+1, (u1b_tmp & (~BIT(0))));
+	/*@Do not enable HW DMA BCN or it will cause Pcie interface hang by timing issue. 2011.11.24. by tynli.*/
+	/*@Clear CR[8] or beacon packet will not be send to TxBuf anymore.*/
+	u1b_tmp = odm_read_1byte(dm, REG_CR_8192E + 1);
+	odm_write_1byte(dm, REG_CR_8192E + 1, (u1b_tmp & (~BIT(0))));
 
 	p_beam_entry->beamform_entry_state = BEAMFORMING_ENTRY_STATE_PROGRESSED;
 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
-	*p_dm->p_is_fw_dw_rsvd_page_in_progress = false;
+	*dm->is_fw_dw_rsvd_page_in_progress = false;
 #endif
 }
 
-
-void
-hal_txbf_8192e_enter(
-	void			*p_dm_void,
-	u8				bfer_bfee_idx
-)
+void hal_txbf_8192e_enter(
+	void *dm_void,
+	u8 bfer_bfee_idx)
 {
-	struct PHY_DM_STRUCT	*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	u8					i = 0;
-	u8					bfer_idx = (bfer_bfee_idx & 0xF0) >> 4;
-	u8					bfee_idx = (bfer_bfee_idx & 0xF);
-	u32					csi_param;
-	struct _RT_BEAMFORMING_INFO	*p_beamforming_info = &p_dm->beamforming_info;
-	struct _RT_BEAMFORMEE_ENTRY	beamformee_entry;
-	struct _RT_BEAMFORMER_ENTRY	beamformer_entry;
-	u16					sta_id = 0;
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	u8 i = 0;
+	u8 bfer_idx = (bfer_bfee_idx & 0xF0) >> 4;
+	u8 bfee_idx = (bfer_bfee_idx & 0xF);
+	u32 csi_param;
+	struct _RT_BEAMFORMING_INFO *beamforming_info = &dm->beamforming_info;
+	struct _RT_BEAMFORMEE_ENTRY beamformee_entry;
+	struct _RT_BEAMFORMER_ENTRY beamformer_entry;
+	u16 sta_id = 0;
 
-	PHYDM_DBG(p_dm, DBG_TXBF, ("[%s] Start!\n", __func__));
+	PHYDM_DBG(dm, DBG_TXBF, "[%s] Start!\n", __func__);
 
-	hal_txbf_8192e_rf_mode(p_dm, p_beamforming_info);
+	hal_txbf_8192e_rf_mode(dm, beamforming_info);
 
-	if (p_dm->rf_type == RF_2T2R)
-		odm_write_4byte(p_dm, 0xd80, 0x00000000);		/*nc =2*/
+	if (dm->rf_type == RF_2T2R)
+		odm_write_4byte(dm, 0xd80, 0x00000000); /*nc =2*/
 
-	if ((p_beamforming_info->beamformer_su_cnt > 0) && (bfer_idx < BEAMFORMER_ENTRY_NUM)) {
-		beamformer_entry = p_beamforming_info->beamformer_entry[bfer_idx];
+	if (beamforming_info->beamformer_su_cnt > 0 && bfer_idx < BEAMFORMER_ENTRY_NUM) {
+		beamformer_entry = beamforming_info->beamformer_entry[bfer_idx];
 
 		/*Sounding protocol control*/
-		odm_write_1byte(p_dm, REG_SND_PTCL_CTRL_8192E, 0xCB);
+		odm_write_1byte(dm, REG_SND_PTCL_CTRL_8192E, 0xCB);
 
-		/*MAC address/Partial AID of Beamformer*/
+		/*@MAC address/Partial AID of Beamformer*/
 		if (bfer_idx == 0) {
-			for (i = 0; i < 6 ; i++)
-				odm_write_1byte(p_dm, (REG_ASSOCIATED_BFMER0_INFO_8192E+i), beamformer_entry.mac_addr[i]);
+			for (i = 0; i < 6; i++)
+				odm_write_1byte(dm, (REG_ASSOCIATED_BFMER0_INFO_8192E + i), beamformer_entry.mac_addr[i]);
 		} else {
-			for (i = 0; i < 6 ; i++)
-				odm_write_1byte(p_dm, (REG_ASSOCIATED_BFMER1_INFO_8192E+i), beamformer_entry.mac_addr[i]);
+			for (i = 0; i < 6; i++)
+				odm_write_1byte(dm, (REG_ASSOCIATED_BFMER1_INFO_8192E + i), beamformer_entry.mac_addr[i]);
 		}
 
-		/*CSI report parameters of Beamformer Default use nc = 2*/
+		/*@CSI report parameters of Beamformer Default use nc = 2*/
 		csi_param = 0x03090309;
 
-		odm_write_4byte(p_dm, REG_CSI_RPT_PARAM_BW20_8192E, csi_param);
-		odm_write_4byte(p_dm, REG_CSI_RPT_PARAM_BW40_8192E, csi_param);
-		odm_write_4byte(p_dm, REG_CSI_RPT_PARAM_BW80_8192E, csi_param);
+		odm_write_4byte(dm, REG_CSI_RPT_PARAM_BW20_8192E, csi_param);
+		odm_write_4byte(dm, REG_CSI_RPT_PARAM_BW40_8192E, csi_param);
+		odm_write_4byte(dm, REG_CSI_RPT_PARAM_BW80_8192E, csi_param);
 
 		/*Timeout value for MAC to leave NDP_RX_standby_state (60 us, Test chip) (80 us,  MP chip)*/
-		odm_write_1byte(p_dm, REG_SND_PTCL_CTRL_8192E+3, 0x50);
-
+		odm_write_1byte(dm, REG_SND_PTCL_CTRL_8192E + 3, 0x50);
 	}
 
-	if ((p_beamforming_info->beamformee_su_cnt > 0) && (bfee_idx < BEAMFORMEE_ENTRY_NUM)) {
-		beamformee_entry = p_beamforming_info->beamformee_entry[bfee_idx];
+	if (beamforming_info->beamformee_su_cnt > 0 && bfee_idx < BEAMFORMEE_ENTRY_NUM) {
+		beamformee_entry = beamforming_info->beamformee_entry[bfee_idx];
 
-		if (phydm_acting_determine(p_dm, phydm_acting_as_ibss))
+		if (phydm_acting_determine(dm, phydm_acting_as_ibss))
 			sta_id = beamformee_entry.mac_id;
 		else
 			sta_id = beamformee_entry.p_aid;
 
-		PHYDM_DBG(p_dm, DBG_TXBF, ("[%s], sta_id=0x%X\n", __func__, sta_id));
+		PHYDM_DBG(dm, DBG_TXBF, "[%s], sta_id=0x%X\n", __func__,
+			  sta_id);
 
 		/*P_AID of Beamformee & enable NDPA transmission & enable NDPA interrupt*/
 		if (bfee_idx == 0) {
-			odm_write_2byte(p_dm, REG_TXBF_CTRL_8192E, sta_id);
-			odm_write_1byte(p_dm, REG_TXBF_CTRL_8192E+3, odm_read_1byte(p_dm, REG_TXBF_CTRL_8192E+3) | BIT(4) | BIT(6) | BIT(7));
+			odm_write_2byte(dm, REG_TXBF_CTRL_8192E, sta_id);
+			odm_write_1byte(dm, REG_TXBF_CTRL_8192E + 3, odm_read_1byte(dm, REG_TXBF_CTRL_8192E + 3) | BIT(4) | BIT(6) | BIT(7));
 		} else
-			odm_write_2byte(p_dm, REG_TXBF_CTRL_8192E+2, sta_id | BIT(12) | BIT(14) | BIT(15));
+			odm_write_2byte(dm, REG_TXBF_CTRL_8192E + 2, sta_id | BIT(12) | BIT(14) | BIT(15));
 
-		/*CSI report parameters of Beamformee*/
+		/*@CSI report parameters of Beamformee*/
 		if (bfee_idx == 0) {
-			/*Get BIT24 & BIT25*/
-			u8 tmp = odm_read_1byte(p_dm, REG_ASSOCIATED_BFMEE_SEL_8192E+3) & 0x3;
+			/*@Get BIT24 & BIT25*/
+			u8 tmp = odm_read_1byte(dm, REG_ASSOCIATED_BFMEE_SEL_8192E + 3) & 0x3;
 
-			odm_write_1byte(p_dm, REG_ASSOCIATED_BFMEE_SEL_8192E+3, tmp | 0x60);
-			odm_write_2byte(p_dm, REG_ASSOCIATED_BFMEE_SEL_8192E, sta_id | BIT(9));
+			odm_write_1byte(dm, REG_ASSOCIATED_BFMEE_SEL_8192E + 3, tmp | 0x60);
+			odm_write_2byte(dm, REG_ASSOCIATED_BFMEE_SEL_8192E, sta_id | BIT(9));
 		} else {
 			/*Set BIT25*/
-			odm_write_2byte(p_dm, REG_ASSOCIATED_BFMEE_SEL_8192E+2, sta_id | 0xE200);
+			odm_write_2byte(dm, REG_ASSOCIATED_BFMEE_SEL_8192E + 2, sta_id | 0xE200);
 		}
-		phydm_beamforming_notify(p_dm);
-
+		phydm_beamforming_notify(dm);
 	}
 }
 
-
-void
-hal_txbf_8192e_leave(
-	void			*p_dm_void,
-	u8				idx
-)
+void hal_txbf_8192e_leave(
+	void *dm_void,
+	u8 idx)
 {
-	struct PHY_DM_STRUCT	*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	struct _RT_BEAMFORMING_INFO	*p_beam_info = &p_dm->beamforming_info;
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct _RT_BEAMFORMING_INFO *beam_info = &dm->beamforming_info;
 
-	hal_txbf_8192e_rf_mode(p_dm, p_beam_info);
+	hal_txbf_8192e_rf_mode(dm, beam_info);
 
-	/*	Clear P_AID of Beamformee
+	/*	@Clear P_AID of Beamformee
 	*	Clear MAC addresss of Beamformer
 	*	Clear Associated Bfmee Sel
 	*/
-	if (p_beam_info->beamform_cap == BEAMFORMING_CAP_NONE)
-		odm_write_1byte(p_dm, REG_SND_PTCL_CTRL_8192E, 0xC8);
+	if (beam_info->beamform_cap == BEAMFORMING_CAP_NONE)
+		odm_write_1byte(dm, REG_SND_PTCL_CTRL_8192E, 0xC8);
 
 	if (idx == 0) {
-		odm_write_2byte(p_dm, REG_TXBF_CTRL_8192E, 0);
-		odm_write_4byte(p_dm, REG_ASSOCIATED_BFMER0_INFO_8192E, 0);
-		odm_write_2byte(p_dm, REG_ASSOCIATED_BFMER0_INFO_8192E+4, 0);
-		odm_write_2byte(p_dm, REG_ASSOCIATED_BFMEE_SEL_8192E, 0);
+		odm_write_2byte(dm, REG_TXBF_CTRL_8192E, 0);
+		odm_write_4byte(dm, REG_ASSOCIATED_BFMER0_INFO_8192E, 0);
+		odm_write_2byte(dm, REG_ASSOCIATED_BFMER0_INFO_8192E + 4, 0);
+		odm_write_2byte(dm, REG_ASSOCIATED_BFMEE_SEL_8192E, 0);
 	} else {
-		odm_write_2byte(p_dm, REG_TXBF_CTRL_8192E+2, odm_read_1byte(p_dm, REG_TXBF_CTRL_8192E+2) & 0xF000);
-		odm_write_4byte(p_dm, REG_ASSOCIATED_BFMER1_INFO_8192E, 0);
-		odm_write_2byte(p_dm, REG_ASSOCIATED_BFMER1_INFO_8192E+4, 0);
-		odm_write_2byte(p_dm, REG_ASSOCIATED_BFMEE_SEL_8192E+2, odm_read_2byte(p_dm, REG_ASSOCIATED_BFMEE_SEL_8192E+2) & 0x60);
+		odm_write_2byte(dm, REG_TXBF_CTRL_8192E + 2, odm_read_1byte(dm, REG_TXBF_CTRL_8192E + 2) & 0xF000);
+		odm_write_4byte(dm, REG_ASSOCIATED_BFMER1_INFO_8192E, 0);
+		odm_write_2byte(dm, REG_ASSOCIATED_BFMER1_INFO_8192E + 4, 0);
+		odm_write_2byte(dm, REG_ASSOCIATED_BFMEE_SEL_8192E + 2, odm_read_2byte(dm, REG_ASSOCIATED_BFMEE_SEL_8192E + 2) & 0x60);
 	}
 
-	PHYDM_DBG(p_dm, DBG_TXBF, ("[%s] idx %d\n", __func__, idx));
+	PHYDM_DBG(dm, DBG_TXBF, "[%s] idx %d\n", __func__, idx);
 }
 
-
-void
-hal_txbf_8192e_status(
-	void			*p_dm_void,
-	u8				idx
-)
+void hal_txbf_8192e_status(
+	void *dm_void,
+	u8 idx)
 {
-	struct PHY_DM_STRUCT	*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	u16					beam_ctrl_val;
-	u32					beam_ctrl_reg;
-	struct _RT_BEAMFORMING_INFO	*p_beam_info =  &p_dm->beamforming_info;
-	struct _RT_BEAMFORMEE_ENTRY	beamform_entry = p_beam_info->beamformee_entry[idx];
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	u16 beam_ctrl_val;
+	u32 beam_ctrl_reg;
+	struct _RT_BEAMFORMING_INFO *beam_info = &dm->beamforming_info;
+	struct _RT_BEAMFORMEE_ENTRY beamform_entry = beam_info->beamformee_entry[idx];
 
-	if (phydm_acting_determine(p_dm, phydm_acting_as_ibss))
+	if (phydm_acting_determine(dm, phydm_acting_as_ibss))
 		beam_ctrl_val = beamform_entry.mac_id;
 	else
 		beam_ctrl_val = beamform_entry.p_aid;
@@ -360,11 +344,11 @@ hal_txbf_8192e_status(
 	if (idx == 0)
 		beam_ctrl_reg = REG_TXBF_CTRL_8192E;
 	else {
-		beam_ctrl_reg = REG_TXBF_CTRL_8192E+2;
+		beam_ctrl_reg = REG_TXBF_CTRL_8192E + 2;
 		beam_ctrl_val |= BIT(12) | BIT(14) | BIT(15);
 	}
 
-	if ((beamform_entry.beamform_entry_state == BEAMFORMING_ENTRY_STATE_PROGRESSED) && (p_beam_info->apply_v_matrix == true)) {
+	if (beamform_entry.beamform_entry_state == BEAMFORMING_ENTRY_STATE_PROGRESSED && beam_info->apply_v_matrix == true) {
 		if (beamform_entry.sound_bw == CHANNEL_WIDTH_20)
 			beam_ctrl_val |= BIT(9);
 		else if (beamform_entry.sound_bw == CHANNEL_WIDTH_40)
@@ -372,30 +356,29 @@ hal_txbf_8192e_status(
 	} else
 		beam_ctrl_val &= ~(BIT(9) | BIT(10) | BIT(11));
 
-	odm_write_2byte(p_dm, beam_ctrl_reg, beam_ctrl_val);
+	odm_write_2byte(dm, beam_ctrl_reg, beam_ctrl_val);
 
-	PHYDM_DBG(p_dm, DBG_TXBF, ("[%s] idx %d beam_ctrl_reg %x beam_ctrl_val %x\n", __func__, idx, beam_ctrl_reg, beam_ctrl_val));
+	PHYDM_DBG(dm, DBG_TXBF,
+		  "[%s] idx %d beam_ctrl_reg %x beam_ctrl_val %x\n", __func__,
+		  idx, beam_ctrl_reg, beam_ctrl_val);
 }
 
-
-void
-hal_txbf_8192e_fw_tx_bf(
-	void			*p_dm_void,
-	u8				idx
-)
+void hal_txbf_8192e_fw_tx_bf(
+	void *dm_void,
+	u8 idx)
 {
-	struct PHY_DM_STRUCT	*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	struct _RT_BEAMFORMING_INFO	*p_beam_info = &p_dm->beamforming_info;
-	struct _RT_BEAMFORMEE_ENTRY	*p_beam_entry = p_beam_info->beamformee_entry + idx;
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct _RT_BEAMFORMING_INFO *beam_info = &dm->beamforming_info;
+	struct _RT_BEAMFORMEE_ENTRY *p_beam_entry = beam_info->beamformee_entry + idx;
 
-	PHYDM_DBG(p_dm, DBG_TXBF, ("[%s] Start!\n", __func__));
+	PHYDM_DBG(dm, DBG_TXBF, "[%s] Start!\n", __func__);
 
 	if (p_beam_entry->beamform_entry_state == BEAMFORMING_ENTRY_STATE_PROGRESSING)
-		hal_txbf_8192e_download_ndpa(p_dm, idx);
+		hal_txbf_8192e_download_ndpa(dm, idx);
 
-	hal_txbf_8192e_fw_txbf_cmd(p_dm);
+	hal_txbf_8192e_fw_txbf_cmd(dm);
 }
 
-#endif	/* #if (RTL8192E_SUPPORT == 1)*/
+#endif /* @#if (RTL8192E_SUPPORT == 1)*/
 
 #endif
diff --git a/rtl8723DS/hal/phydm/txbf/haltxbf8192e.h b/rtl8723DS/hal/phydm/txbf/haltxbf8192e.h
index 636e0d5..9b0c832 100755..100644
--- a/rtl8723DS/hal/phydm/txbf/haltxbf8192e.h
+++ b/rtl8723DS/hal/phydm/txbf/haltxbf8192e.h
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2016 - 2017 Realtek Corporation.
+ * Copyright(c) 2007 - 2017  Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -8,66 +8,63 @@
  *
  * This program is distributed in the hope that it will be useful, but WITHOUT
  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  * more details.
  *
+ * The full GNU General Public License is included in this distribution in the
+ * file called LICENSE.
+ *
+ * Contact Information:
+ * wlanfae <wlanfae@realtek.com>
+ * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
+ * Hsinchu 300, Taiwan.
+ *
+ * Larry Finger <Larry.Finger@lwfinger.net>
+ *
  *****************************************************************************/
 #ifndef __HAL_TXBF_8192E_H__
 #define __HAL_TXBF_8192E_H__
 
 #if (RTL8192E_SUPPORT == 1)
-#if (BEAMFORMING_SUPPORT == 1)
-
-void
-hal_txbf_8192e_set_ndpa_rate(
-	void			*p_dm_void,
-	u8	BW,
-	u8	rate
-);
-
-void
-hal_txbf_8192e_enter(
-	void			*p_dm_void,
-	u8				idx
-);
-
+#ifdef PHYDM_BEAMFORMING_SUPPORT
 
-void
-hal_txbf_8192e_leave(
-	void			*p_dm_void,
-	u8				idx
-);
+void hal_txbf_8192e_set_ndpa_rate(
+	void *dm_void,
+	u8 BW,
+	u8 rate);
 
+void hal_txbf_8192e_enter(
+	void *dm_void,
+	u8 idx);
 
-void
-hal_txbf_8192e_status(
-	void			*p_dm_void,
-	u8				idx
-);
+void hal_txbf_8192e_leave(
+	void *dm_void,
+	u8 idx);
 
+void hal_txbf_8192e_status(
+	void *dm_void,
+	u8 idx);
 
-void
-hal_txbf_8192e_fw_tx_bf(
-	void			*p_dm_void,
-	u8				idx
-);
+void hal_txbf_8192e_fw_tx_bf(
+	void *dm_void,
+	u8 idx);
 #else
 
-#define hal_txbf_8192e_set_ndpa_rate(p_dm_void, BW, rate)
-#define hal_txbf_8192e_enter(p_dm_void, idx)
-#define hal_txbf_8192e_leave(p_dm_void, idx)
-#define hal_txbf_8192e_status(p_dm_void, idx)
-#define hal_txbf_8192e_fw_tx_bf(p_dm_void, idx)
+#define hal_txbf_8192e_set_ndpa_rate(dm_void, BW, rate)
+#define hal_txbf_8192e_enter(dm_void, idx)
+#define hal_txbf_8192e_leave(dm_void, idx)
+#define hal_txbf_8192e_status(dm_void, idx)
+#define hal_txbf_8192e_fw_tx_bf(dm_void, idx)
 
 #endif
 
 #else
 
-#define hal_txbf_8192e_set_ndpa_rate(p_dm_void, BW, rate)
-#define hal_txbf_8192e_enter(p_dm_void, idx)
-#define hal_txbf_8192e_leave(p_dm_void, idx)
-#define hal_txbf_8192e_status(p_dm_void, idx)
-#define hal_txbf_8192e_fw_tx_bf(p_dm_void, idx)
+#define hal_txbf_8192e_set_ndpa_rate(dm_void, BW, rate)
+#define hal_txbf_8192e_enter(dm_void, idx)
+#define hal_txbf_8192e_leave(dm_void, idx)
+#define hal_txbf_8192e_status(dm_void, idx)
+#define hal_txbf_8192e_fw_tx_bf(dm_void, idx)
 
 #endif
 
diff --git a/rtl8723DS/hal/phydm/txbf/haltxbf8814a.c b/rtl8723DS/hal/phydm/txbf/haltxbf8814a.c
index 9cfb015..7ad6ca9 100755..100644
--- a/rtl8723DS/hal/phydm/txbf/haltxbf8814a.c
+++ b/rtl8723DS/hal/phydm/txbf/haltxbf8814a.c
@@ -22,75 +22,64 @@
 #include "mp_precomp.h"
 #include "../phydm_precomp.h"
 
-#if (BEAMFORMING_SUPPORT == 1)
+#ifdef PHYDM_BEAMFORMING_SUPPORT
 #if (RTL8814A_SUPPORT == 1)
 
 boolean
-phydm_beamforming_set_iqgen_8814A(
-	void			*p_dm_void
-)
+phydm_beamforming_set_iqgen_8814A(void *dm_void)
 {
-	struct PHY_DM_STRUCT	*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
 	u8 i = 0;
 	u16 counter = 0;
 	u32 rf_mode[4];
 
-	for (i = RF_PATH_A ; i < MAX_RF_PATH ; i++)
-		odm_set_rf_reg(p_dm, i, RF_WE_LUT, 0x80000, 0x1);	/*RF mode table write enable*/
+	for (i = RF_PATH_A; i < MAX_RF_PATH; i++)
+		odm_set_rf_reg(dm, i, RF_WE_LUT, 0x80000, 0x1); /*RF mode table write enable*/
 
 	while (1) {
 		counter++;
 		for (i = RF_PATH_A; i < MAX_RF_PATH; i++)
-			odm_set_rf_reg(p_dm, i, RF_RCK_OS, 0xfffff, 0x18000);	/*Select Rx mode*/
+			odm_set_rf_reg(dm, i, RF_RCK_OS, 0xfffff, 0x18000); /*Select Rx mode*/
 
 		ODM_delay_us(2);
 
 		for (i = RF_PATH_A; i < MAX_RF_PATH; i++)
-			rf_mode[i] = odm_get_rf_reg(p_dm, i, RF_RCK_OS, 0xfffff);
+			rf_mode[i] = odm_get_rf_reg(dm, i, RF_RCK_OS, 0xfffff);
 
-		if ((rf_mode[0] == 0x18000) && (rf_mode[1] == 0x18000) && (rf_mode[2] == 0x18000) && (rf_mode[3] == 0x18000))
+		if (rf_mode[0] == 0x18000 && rf_mode[1] == 0x18000 && rf_mode[2] == 0x18000 && rf_mode[3] == 0x18000)
 			break;
 		else if (counter == 100) {
-			PHYDM_DBG(p_dm, DBG_TXBF, ("iqgen setting fail:8814A\n"));
+			PHYDM_DBG(dm, DBG_TXBF, "iqgen setting fail:8814A\n");
 			return false;
 		}
 	}
 
-	for (i = RF_PATH_A ; i < MAX_RF_PATH ; i++) {
-		odm_set_rf_reg(p_dm, i, RF_TXPA_G1, 0xfffff, 0xBE77F); /*Set Table data*/
-		odm_set_rf_reg(p_dm, i, RF_TXPA_G2, 0xfffff, 0x226BF); /*Enable TXIQGEN in Rx mode*/
+	for (i = RF_PATH_A; i < MAX_RF_PATH; i++) {
+		odm_set_rf_reg(dm, i, RF_TXPA_G1, 0xfffff, 0xBE77F); /*Set Table data*/
+		odm_set_rf_reg(dm, i, RF_TXPA_G2, 0xfffff, 0x226BF); /*@Enable TXIQGEN in Rx mode*/
 	}
-	odm_set_rf_reg(p_dm, RF_PATH_A, RF_TXPA_G2, 0xfffff, 0xE26BF); /*Enable TXIQGEN in Rx mode*/
+	odm_set_rf_reg(dm, RF_PATH_A, RF_TXPA_G2, 0xfffff, 0xE26BF); /*@Enable TXIQGEN in Rx mode*/
 
 	for (i = RF_PATH_A; i < MAX_RF_PATH; i++)
-		odm_set_rf_reg(p_dm, i, RF_WE_LUT, 0x80000, 0x0);	/*RF mode table write disable*/
+		odm_set_rf_reg(dm, i, RF_WE_LUT, 0x80000, 0x0); /*RF mode table write disable*/
 
 	return true;
-
 }
 
-
-
-void
-hal_txbf_8814a_set_ndpa_rate(
-	void			*p_dm_void,
-	u8	BW,
-	u8	rate
-)
+void hal_txbf_8814a_set_ndpa_rate(void *dm_void, u8 BW, u8 rate)
 {
-	struct PHY_DM_STRUCT	*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-
-	odm_write_1byte(p_dm, REG_NDPA_OPT_CTRL_8814A, BW);
-	odm_write_1byte(p_dm, REG_NDPA_RATE_8814A, (u8) rate);
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
 
+	odm_write_1byte(dm, REG_NDPA_OPT_CTRL_8814A, BW);
+	odm_write_1byte(dm, REG_NDPA_RATE_8814A, (u8)rate);
 }
 #if 0
-#define PHYDM_MEMORY_MAP_BUF_READ	0x8000
-#define PHYDM_CTRL_INFO_PAGE			0x660
+#define PHYDM_MEMORY_MAP_BUF_READ 0x8000
+#define PHYDM_CTRL_INFO_PAGE 0x660
 
 void
 phydm_data_rate_8814a(
-	struct PHY_DM_STRUCT			*p_dm,
+	struct dm_struct			*dm,
 	u8				mac_id,
 	u32				*data,
 	u8				data_len
@@ -99,89 +88,83 @@ phydm_data_rate_8814a(
 	u8	i = 0;
 	u16	x_read_data_addr = 0;
 
-	odm_write_2byte(p_dm, REG_PKTBUF_DBG_CTRL_8814A, PHYDM_CTRL_INFO_PAGE);
-	x_read_data_addr = PHYDM_MEMORY_MAP_BUF_READ + mac_id * 32; /*Ctrl Info: 32Bytes for each macid(n)*/
+	odm_write_2byte(dm, REG_PKTBUF_DBG_CTRL_8814A, PHYDM_CTRL_INFO_PAGE);
+	x_read_data_addr = PHYDM_MEMORY_MAP_BUF_READ + mac_id * 32; /*@Ctrl Info: 32Bytes for each macid(n)*/
 
-	if ((x_read_data_addr < PHYDM_MEMORY_MAP_BUF_READ) || (x_read_data_addr > 0x8FFF)) {
-		PHYDM_DBG(p_dm, DBG_TXBF, ("x_read_data_addr(0x%x) is not correct!\n", x_read_data_addr));
+	if (x_read_data_addr < PHYDM_MEMORY_MAP_BUF_READ || x_read_data_addr > 0x8FFF) {
+		PHYDM_DBG(dm, DBG_TXBF,
+			  "x_read_data_addr(0x%x) is not correct!\n",
+			  x_read_data_addr);
 		return;
 	}
 
 	/* Read data */
 	for (i = 0; i < data_len; i++)
-		*(data + i) = odm_read_2byte(p_dm, x_read_data_addr + i);
-
+		*(data + i) = odm_read_2byte(dm, x_read_data_addr + i);
 }
 #endif
 
-void
-hal_txbf_8814a_get_tx_rate(
-	void			*p_dm_void
-)
+void hal_txbf_8814a_get_tx_rate(void *dm_void)
 {
-	struct PHY_DM_STRUCT	*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	struct _RT_BEAMFORMING_INFO	*p_beam_info = &p_dm->beamforming_info;
-	struct _RT_BEAMFORMEE_ENTRY	*p_entry;
-	struct _rate_adaptive_table_	*p_ra_table = &p_dm->dm_ra_table;
-	struct cmn_sta_info			*p_sta = NULL;
-	u8	data_rate = 0xFF;
-	u8	macid = 0;
-
-	p_entry = &(p_beam_info->beamformee_entry[p_beam_info->beamformee_cur_idx]);
-	macid = (u8)p_entry->mac_id;
-
-	p_sta = p_dm->p_phydm_sta_info[macid];
-	
-	if (is_sta_active(p_sta)) {
-		
-		data_rate = (p_sta->ra_info.curr_tx_rate) & 0x7f;	/*Bit7 indicates SGI*/
-		p_beam_info->tx_bf_data_rate = data_rate;
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct _RT_BEAMFORMING_INFO *beam_info = &dm->beamforming_info;
+	struct _RT_BEAMFORMEE_ENTRY *entry;
+	struct ra_table *ra_tab = &dm->dm_ra_table;
+	struct cmn_sta_info *sta = NULL;
+	u8 data_rate = 0xFF;
+	u8 macid = 0;
+
+	entry = &(beam_info->beamformee_entry[beam_info->beamformee_cur_idx]);
+	macid = (u8)entry->mac_id;
+
+	sta = dm->phydm_sta_info[macid];
+
+	if (is_sta_active(sta)) {
+		data_rate = (sta->ra_info.curr_tx_rate) & 0x7f; /*@Bit7 indicates SGI*/
+		beam_info->tx_bf_data_rate = data_rate;
 	}
 
-	PHYDM_DBG(p_dm, DBG_TXBF, ("[%s] p_dm->tx_bf_data_rate = 0x%x\n", __func__, p_beam_info->tx_bf_data_rate));
+	PHYDM_DBG(dm, DBG_TXBF, "[%s] dm->tx_bf_data_rate = 0x%x\n", __func__,
+		  beam_info->tx_bf_data_rate);
 }
 
-void
-hal_txbf_8814a_reset_tx_path(
-	void			*p_dm_void,
-	u8				idx
-)
+void hal_txbf_8814a_reset_tx_path(void *dm_void, u8 idx)
 {
-	struct PHY_DM_STRUCT	*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
 #if DEV_BUS_TYPE == RT_USB_INTERFACE
-	struct _RT_BEAMFORMING_INFO	*p_beamforming_info = &p_dm->beamforming_info;
-	struct _RT_BEAMFORMEE_ENTRY	beamformee_entry;
-	u8	nr_index = 0, tx_ss = 0;
+	struct _RT_BEAMFORMING_INFO *beamforming_info = &dm->beamforming_info;
+	struct _RT_BEAMFORMEE_ENTRY beamformee_entry;
+	u8 nr_index = 0, tx_ss = 0;
 
 	if (idx < BEAMFORMEE_ENTRY_NUM)
-		beamformee_entry = p_beamforming_info->beamformee_entry[idx];
+		beamformee_entry = beamforming_info->beamformee_entry[idx];
 	else
 		return;
 
-	if ((p_beamforming_info->last_usb_hub) != (*p_dm->hub_usb_mode)) {
-		nr_index = tx_bf_nr(hal_txbf_8814a_get_ntx(p_dm), beamformee_entry.comp_steering_num_of_bfer);
+	if (beamforming_info->last_usb_hub != (*dm->hub_usb_mode)) {
+		nr_index = tx_bf_nr(hal_txbf_8814a_get_ntx(dm), beamformee_entry.comp_steering_num_of_bfer);
 
-		if (*p_dm->hub_usb_mode == 2) {
-			if (p_dm->rf_type == RF_4T4R)
+		if (*dm->hub_usb_mode == 2) {
+			if (dm->rf_type == RF_4T4R)
 				tx_ss = 0xf;
-			else if (p_dm->rf_type == RF_3T3R)
+			else if (dm->rf_type == RF_3T3R)
 				tx_ss = 0xe;
 			else
 				tx_ss = 0x6;
-		} else if (*p_dm->hub_usb_mode == 1)	/*USB 2.0 always 2Tx*/
+		} else if (*dm->hub_usb_mode == 1) /*USB 2.0 always 2Tx*/
 			tx_ss = 0x6;
 		else
 			tx_ss = 0x6;
 
 		if (tx_ss == 0xf) {
-			odm_set_bb_reg(p_dm, REG_BB_TX_PATH_SEL_1_8814A, MASKBYTE3 | MASKBYTE2HIGHNIBBLE, 0x93f);
-			odm_set_bb_reg(p_dm, REG_BB_TX_PATH_SEL_1_8814A, MASKDWORD, 0x93f93f0);
+			odm_set_bb_reg(dm, REG_BB_TX_PATH_SEL_1_8814A, MASKBYTE3 | MASKBYTE2HIGHNIBBLE, 0x93f);
+			odm_set_bb_reg(dm, REG_BB_TX_PATH_SEL_1_8814A, MASKDWORD, 0x93f93f0);
 		} else if (tx_ss == 0xe) {
-			odm_set_bb_reg(p_dm, REG_BB_TX_PATH_SEL_1_8814A, MASKBYTE3 | MASKBYTE2HIGHNIBBLE, 0x93e);
-			odm_set_bb_reg(p_dm, REG_BB_TX_PATH_SEL_2_8814A, MASKDWORD, 0x93e93e0);
+			odm_set_bb_reg(dm, REG_BB_TX_PATH_SEL_1_8814A, MASKBYTE3 | MASKBYTE2HIGHNIBBLE, 0x93e);
+			odm_set_bb_reg(dm, REG_BB_TX_PATH_SEL_2_8814A, MASKDWORD, 0x93e93e0);
 		} else if (tx_ss == 0x6) {
-			odm_set_bb_reg(p_dm, REG_BB_TX_PATH_SEL_1_8814A, MASKBYTE3 | MASKBYTE2HIGHNIBBLE, 0x936);
-			odm_set_bb_reg(p_dm, REG_BB_TX_PATH_SEL_2_8814A, MASKLWORD, 0x9360);
+			odm_set_bb_reg(dm, REG_BB_TX_PATH_SEL_1_8814A, MASKBYTE3 | MASKBYTE2HIGHNIBBLE, 0x936);
+			odm_set_bb_reg(dm, REG_BB_TX_PATH_SEL_2_8814A, MASKLWORD, 0x9360);
 		}
 
 		if (idx == 0) {
@@ -189,169 +172,159 @@ hal_txbf_8814a_reset_tx_path(
 			case 0:
 				break;
 
-			case 1:			/*Nsts = 2	BC*/
-				odm_set_bb_reg(p_dm, REG_BB_TXBF_ANT_SET_BF0_8814A, MASKBYTE3LOWNIBBLE | MASKL3BYTES, 0x9366);		/*tx2path, BC*/
+			case 1: /*Nsts = 2	BC*/
+				odm_set_bb_reg(dm, REG_BB_TXBF_ANT_SET_BF0_8814A, MASKBYTE3LOWNIBBLE | MASKL3BYTES, 0x9366); /*tx2path, BC*/
 				break;
 
-			case 2:			/*Nsts = 3	BCD*/
-				odm_set_bb_reg(p_dm, REG_BB_TXBF_ANT_SET_BF0_8814A, MASKBYTE3LOWNIBBLE | MASKL3BYTES, 0x93e93ee);	/*tx3path, BCD*/
+			case 2: /*Nsts = 3	BCD*/
+				odm_set_bb_reg(dm, REG_BB_TXBF_ANT_SET_BF0_8814A, MASKBYTE3LOWNIBBLE | MASKL3BYTES, 0x93e93ee); /*tx3path, BCD*/
 				break;
 
-			default:			/*nr>3, same as Case 3*/
-				odm_set_bb_reg(p_dm, REG_BB_TXBF_ANT_SET_BF0_8814A, MASKBYTE3LOWNIBBLE | MASKL3BYTES, 0x93f93ff);	/*tx4path, ABCD*/
+			default: /*nr>3, same as Case 3*/
+				odm_set_bb_reg(dm, REG_BB_TXBF_ANT_SET_BF0_8814A, MASKBYTE3LOWNIBBLE | MASKL3BYTES, 0x93f93ff); /*tx4path, ABCD*/
 				break;
 			}
-		} else	{
+		} else {
 			switch (nr_index) {
 			case 0:
 				break;
 
-			case 1:			/*Nsts = 2	BC*/
-				odm_set_bb_reg(p_dm, REG_BB_TXBF_ANT_SET_BF1_8814A, MASKBYTE3LOWNIBBLE | MASKL3BYTES, 0x9366);		/*tx2path, BC*/
+			case 1: /*Nsts = 2	BC*/
+				odm_set_bb_reg(dm, REG_BB_TXBF_ANT_SET_BF1_8814A, MASKBYTE3LOWNIBBLE | MASKL3BYTES, 0x9366); /*tx2path, BC*/
 				break;
 
-			case 2:			/*Nsts = 3	BCD*/
-				odm_set_bb_reg(p_dm, REG_BB_TXBF_ANT_SET_BF1_8814A, MASKBYTE3LOWNIBBLE | MASKL3BYTES, 0x93e93ee);	/*tx3path, BCD*/
+			case 2: /*Nsts = 3	BCD*/
+				odm_set_bb_reg(dm, REG_BB_TXBF_ANT_SET_BF1_8814A, MASKBYTE3LOWNIBBLE | MASKL3BYTES, 0x93e93ee); /*tx3path, BCD*/
 				break;
 
-			default:			/*nr>3, same as Case 3*/
-				odm_set_bb_reg(p_dm, REG_BB_TXBF_ANT_SET_BF1_8814A, MASKBYTE3LOWNIBBLE | MASKL3BYTES, 0x93f93ff);	/*tx4path, ABCD*/
+			default: /*nr>3, same as Case 3*/
+				odm_set_bb_reg(dm, REG_BB_TXBF_ANT_SET_BF1_8814A, MASKBYTE3LOWNIBBLE | MASKL3BYTES, 0x93f93ff); /*tx4path, ABCD*/
 				break;
 			}
 		}
 
-		p_beamforming_info->last_usb_hub = *p_dm->hub_usb_mode;
+		beamforming_info->last_usb_hub = *dm->hub_usb_mode;
 	} else
 		return;
 #endif
 }
 
-
-u8
-hal_txbf_8814a_get_ntx(
-	void			*p_dm_void
-)
+u8 hal_txbf_8814a_get_ntx(void *dm_void)
 {
-	struct PHY_DM_STRUCT	*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	u8		ntx = 0, tx_ss = 3;
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	u8 ntx = 0, tx_ss = 3;
 
 #if DEV_BUS_TYPE == RT_USB_INTERFACE
-	tx_ss = *p_dm->hub_usb_mode;
+	tx_ss = *dm->hub_usb_mode;
 #endif
 	if (tx_ss == 3 || tx_ss == 2) {
-		if (p_dm->rf_type == RF_4T4R)
+		if (dm->rf_type == RF_4T4R)
 			ntx = 3;
-		else if (p_dm->rf_type == RF_3T3R)
+		else if (dm->rf_type == RF_3T3R)
 			ntx = 2;
 		else
 			ntx = 1;
-	} else if (tx_ss == 1)	/*USB 2.0 always 2Tx*/
+	} else if (tx_ss == 1) /*USB 2.0 always 2Tx*/
 		ntx = 1;
 	else
 		ntx = 1;
 
-	PHYDM_DBG(p_dm, DBG_TXBF, ("[%s] ntx = %d\n", __func__, ntx));
+	PHYDM_DBG(dm, DBG_TXBF, "[%s] ntx = %d\n", __func__, ntx);
 	return ntx;
 }
 
-u8
-hal_txbf_8814a_get_nrx(
-	void			*p_dm_void
-)
+u8 hal_txbf_8814a_get_nrx(void *dm_void)
 {
-	struct PHY_DM_STRUCT	*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	u8			nrx = 0;
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	u8 nrx = 0;
 
-	if (p_dm->rf_type == RF_4T4R)
+	if (dm->rf_type == RF_4T4R)
 		nrx = 3;
-	else if (p_dm->rf_type == RF_3T3R)
+	else if (dm->rf_type == RF_3T3R)
 		nrx = 2;
-	else if (p_dm->rf_type == RF_2T2R)
+	else if (dm->rf_type == RF_2T2R)
 		nrx = 1;
-	else if (p_dm->rf_type == RF_2T3R)
+	else if (dm->rf_type == RF_2T3R)
 		nrx = 2;
-	else if (p_dm->rf_type == RF_2T4R)
+	else if (dm->rf_type == RF_2T4R)
 		nrx = 3;
-	else if (p_dm->rf_type == RF_1T1R)
+	else if (dm->rf_type == RF_1T1R)
 		nrx = 0;
-	else if (p_dm->rf_type == RF_1T2R)
+	else if (dm->rf_type == RF_1T2R)
 		nrx = 1;
 	else
 		nrx = 0;
 
-	PHYDM_DBG(p_dm, DBG_TXBF, ("[%s] nrx = %d\n", __func__, nrx));
+	PHYDM_DBG(dm, DBG_TXBF, "[%s] nrx = %d\n", __func__, nrx);
 	return nrx;
 }
 
-void
-hal_txbf_8814a_rf_mode(
-	void			*p_dm_void,
-	struct _RT_BEAMFORMING_INFO	*p_beamforming_info,
-	u8					idx
-)
+void hal_txbf_8814a_rf_mode(void *dm_void,
+			    struct _RT_BEAMFORMING_INFO *beamforming_info,
+			    u8 idx)
 {
-	struct PHY_DM_STRUCT	*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	u8				nr_index = 0;
-	u8				tx_ss = 3;		/*default use 3 Tx*/
-	struct _RT_BEAMFORMEE_ENTRY	beamformee_entry;
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	u8 nr_index = 0;
+	u8 tx_ss = 3; /*@default use 3 Tx*/
+	struct _RT_BEAMFORMEE_ENTRY beamformee_entry;
 
 	if (idx < BEAMFORMEE_ENTRY_NUM)
-		beamformee_entry = p_beamforming_info->beamformee_entry[idx];
+		beamformee_entry = beamforming_info->beamformee_entry[idx];
 	else
 		return;
 
-	nr_index = tx_bf_nr(hal_txbf_8814a_get_ntx(p_dm), beamformee_entry.comp_steering_num_of_bfer);
+	nr_index = tx_bf_nr(hal_txbf_8814a_get_ntx(dm), beamformee_entry.comp_steering_num_of_bfer);
 
-	if (p_dm->rf_type == RF_1T1R)
+	if (dm->rf_type == RF_1T1R)
 		return;
 
-	if (p_beamforming_info->beamformee_su_cnt > 0) {
+	if (beamforming_info->beamformee_su_cnt > 0) {
 #if DEV_BUS_TYPE == RT_USB_INTERFACE
-		p_beamforming_info->last_usb_hub = *p_dm->hub_usb_mode;
-		tx_ss = *p_dm->hub_usb_mode;
+		beamforming_info->last_usb_hub = *dm->hub_usb_mode;
+		tx_ss = *dm->hub_usb_mode;
 #endif
 		if (tx_ss == 3 || tx_ss == 2) {
-			if (p_dm->rf_type == RF_4T4R)
+			if (dm->rf_type == RF_4T4R)
 				tx_ss = 0xf;
-			else if (p_dm->rf_type == RF_3T3R)
+			else if (dm->rf_type == RF_3T3R)
 				tx_ss = 0xe;
 			else
 				tx_ss = 0x6;
-		} else if (tx_ss == 1)	/*USB 2.0 always 2Tx*/
+		} else if (tx_ss == 1) /*USB 2.0 always 2Tx*/
 			tx_ss = 0x6;
 		else
 			tx_ss = 0x6;
 
 		if (tx_ss == 0xf) {
-			odm_set_bb_reg(p_dm, REG_BB_TX_PATH_SEL_1_8814A, MASKBYTE3 | MASKBYTE2HIGHNIBBLE, 0x93f);
-			odm_set_bb_reg(p_dm, REG_BB_TX_PATH_SEL_1_8814A, MASKDWORD, 0x93f93f0);
+			odm_set_bb_reg(dm, REG_BB_TX_PATH_SEL_1_8814A, MASKBYTE3 | MASKBYTE2HIGHNIBBLE, 0x93f);
+			odm_set_bb_reg(dm, REG_BB_TX_PATH_SEL_1_8814A, MASKDWORD, 0x93f93f0);
 		} else if (tx_ss == 0xe) {
-			odm_set_bb_reg(p_dm, REG_BB_TX_PATH_SEL_1_8814A, MASKBYTE3 | MASKBYTE2HIGHNIBBLE, 0x93e);
-			odm_set_bb_reg(p_dm, REG_BB_TX_PATH_SEL_2_8814A, MASKDWORD, 0x93e93e0);
+			odm_set_bb_reg(dm, REG_BB_TX_PATH_SEL_1_8814A, MASKBYTE3 | MASKBYTE2HIGHNIBBLE, 0x93e);
+			odm_set_bb_reg(dm, REG_BB_TX_PATH_SEL_2_8814A, MASKDWORD, 0x93e93e0);
 		} else if (tx_ss == 0x6) {
-			odm_set_bb_reg(p_dm, REG_BB_TX_PATH_SEL_1_8814A, MASKBYTE3 | MASKBYTE2HIGHNIBBLE, 0x936);
-			odm_set_bb_reg(p_dm, REG_BB_TX_PATH_SEL_2_8814A, MASKLWORD, 0x9360);
+			odm_set_bb_reg(dm, REG_BB_TX_PATH_SEL_1_8814A, MASKBYTE3 | MASKBYTE2HIGHNIBBLE, 0x936);
+			odm_set_bb_reg(dm, REG_BB_TX_PATH_SEL_2_8814A, MASKLWORD, 0x9360);
 		}
 
-		/*for 8814 19ac(idx 1), 19b4(idx 0), different Tx ant setting*/
-		odm_set_bb_reg(p_dm, REG_BB_TXBF_ANT_SET_BF1_8814A, BIT(28) | BIT29, 0x2);			/*enable BB TxBF ant mapping register*/
-		odm_set_bb_reg(p_dm, REG_BB_TXBF_ANT_SET_BF1_8814A, BIT30, 0x1);			/*if Nsts > Nc don't apply V matrix*/
+		/*@for 8814 19ac(idx 1), 19b4(idx 0), different Tx ant setting*/
+		odm_set_bb_reg(dm, REG_BB_TXBF_ANT_SET_BF1_8814A, BIT(28) | BIT29, 0x2); /*@enable BB TxBF ant mapping register*/
+		odm_set_bb_reg(dm, REG_BB_TXBF_ANT_SET_BF1_8814A, BIT30, 0x1); /*@if Nsts > Nc don't apply V matrix*/
 
 		if (idx == 0) {
 			switch (nr_index) {
 			case 0:
 				break;
 
-			case 1:			/*Nsts = 2	BC*/
-				odm_set_bb_reg(p_dm, REG_BB_TXBF_ANT_SET_BF0_8814A, MASKBYTE3LOWNIBBLE | MASKL3BYTES, 0x9366);		/*tx2path, BC*/
+			case 1: /*Nsts = 2	BC*/
+				odm_set_bb_reg(dm, REG_BB_TXBF_ANT_SET_BF0_8814A, MASKBYTE3LOWNIBBLE | MASKL3BYTES, 0x9366); /*tx2path, BC*/
 				break;
 
-			case 2:			/*Nsts = 3	BCD*/
-				odm_set_bb_reg(p_dm, REG_BB_TXBF_ANT_SET_BF0_8814A, MASKBYTE3LOWNIBBLE | MASKL3BYTES, 0x93e93ee);	/*tx3path, BCD*/
+			case 2: /*Nsts = 3	BCD*/
+				odm_set_bb_reg(dm, REG_BB_TXBF_ANT_SET_BF0_8814A, MASKBYTE3LOWNIBBLE | MASKL3BYTES, 0x93e93ee); /*tx3path, BCD*/
 				break;
 
-			default:			/*nr>3, same as Case 3*/
-				odm_set_bb_reg(p_dm, REG_BB_TXBF_ANT_SET_BF0_8814A, MASKBYTE3LOWNIBBLE | MASKL3BYTES, 0x93f93ff);	/*tx4path, ABCD*/
+			default: /*nr>3, same as Case 3*/
+				odm_set_bb_reg(dm, REG_BB_TXBF_ANT_SET_BF0_8814A, MASKBYTE3LOWNIBBLE | MASKL3BYTES, 0x93f93ff); /*tx4path, ABCD*/
 
 				break;
 			}
@@ -360,132 +333,135 @@ hal_txbf_8814a_rf_mode(
 			case 0:
 				break;
 
-			case 1:			/*Nsts = 2	BC*/
-				odm_set_bb_reg(p_dm, REG_BB_TXBF_ANT_SET_BF1_8814A, MASKBYTE3LOWNIBBLE | MASKL3BYTES, 0x9366);		/*tx2path, BC*/
+			case 1: /*Nsts = 2	BC*/
+				odm_set_bb_reg(dm, REG_BB_TXBF_ANT_SET_BF1_8814A, MASKBYTE3LOWNIBBLE | MASKL3BYTES, 0x9366); /*tx2path, BC*/
 				break;
 
-			case 2:			/*Nsts = 3	BCD*/
-				odm_set_bb_reg(p_dm, REG_BB_TXBF_ANT_SET_BF1_8814A, MASKBYTE3LOWNIBBLE | MASKL3BYTES, 0x93e93ee);	/*tx3path, BCD*/
+			case 2: /*Nsts = 3	BCD*/
+				odm_set_bb_reg(dm, REG_BB_TXBF_ANT_SET_BF1_8814A, MASKBYTE3LOWNIBBLE | MASKL3BYTES, 0x93e93ee); /*tx3path, BCD*/
 				break;
 
-			default:			/*nr>3, same as Case 3*/
-				odm_set_bb_reg(p_dm, REG_BB_TXBF_ANT_SET_BF1_8814A, MASKBYTE3LOWNIBBLE | MASKL3BYTES, 0x93f93ff);	/*tx4path, ABCD*/
+			default: /*nr>3, same as Case 3*/
+				odm_set_bb_reg(dm, REG_BB_TXBF_ANT_SET_BF1_8814A, MASKBYTE3LOWNIBBLE | MASKL3BYTES, 0x93f93ff); /*tx4path, ABCD*/
 				break;
 			}
 		}
 	}
 
-	if ((p_beamforming_info->beamformee_su_cnt == 0) && (p_beamforming_info->beamformer_su_cnt == 0)) {
-		odm_set_bb_reg(p_dm, REG_BB_TX_PATH_SEL_1_8814A, MASKBYTE3 | MASKBYTE2HIGHNIBBLE, 0x932);	/*set tx_path selection for 8814a BFer bug refine*/
-		odm_set_bb_reg(p_dm, REG_BB_TX_PATH_SEL_2_8814A, MASKDWORD, 0x93e9360);
+	if (beamforming_info->beamformee_su_cnt == 0 && beamforming_info->beamformer_su_cnt == 0) {
+		odm_set_bb_reg(dm, REG_BB_TX_PATH_SEL_1_8814A, MASKBYTE3 | MASKBYTE2HIGHNIBBLE, 0x932); /*set tx_path selection for 8814a BFer bug refine*/
+		odm_set_bb_reg(dm, REG_BB_TX_PATH_SEL_2_8814A, MASKDWORD, 0x93e9360);
 	}
 }
 #if 0
 void
 hal_txbf_8814a_download_ndpa(
-	void			*p_dm_void,
+	void			*dm_void,
 	u8				idx
 )
 {
-	struct PHY_DM_STRUCT	*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
+	struct dm_struct	*dm = (struct dm_struct *)dm_void;
 	u8			u1b_tmp = 0, tmp_reg422 = 0;
 	u8			bcn_valid_reg = 0, count = 0, dl_bcn_count = 0;
 	u16			head_page = 0x7FE;
 	boolean			is_send_beacon = false;
-	u16			tx_page_bndy = LAST_ENTRY_OF_TX_PKT_BUFFER_8814A; /*default reseved 1 page for the IC type which is undefined.*/
-	struct _RT_BEAMFORMING_INFO	*p_beam_info = &p_dm->beamforming_info;
-	struct _RT_BEAMFORMEE_ENTRY	*p_beam_entry = p_beam_info->beamformee_entry + idx;
-	struct _ADAPTER		*adapter = p_dm->adapter;
+	u16			tx_page_bndy = LAST_ENTRY_OF_TX_PKT_BUFFER_8814A; /*@default reseved 1 page for the IC type which is undefined.*/
+	struct _RT_BEAMFORMING_INFO	*beam_info = &dm->beamforming_info;
+	struct _RT_BEAMFORMEE_ENTRY	*p_beam_entry = beam_info->beamformee_entry + idx;
+	void		*adapter = dm->adapter;
 
 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
-	*p_dm->p_is_fw_dw_rsvd_page_in_progress = true;
+	*dm->is_fw_dw_rsvd_page_in_progress = true;
 #endif
-	PHYDM_DBG(p_dm, DBG_TXBF, ("[%s] Start!\n", __func__));
+	PHYDM_DBG(dm, DBG_TXBF, "[%s] Start!\n", __func__);
 
-	phydm_get_hal_def_var_handler_interface(p_dm, HAL_DEF_TX_PAGE_BOUNDARY, (u16 *)&tx_page_bndy);
+	phydm_get_hal_def_var_handler_interface(dm, HAL_DEF_TX_PAGE_BOUNDARY, (u16 *)&tx_page_bndy);
 
 	/*Set REG_CR bit 8. DMA beacon by SW.*/
-	u1b_tmp = odm_read_1byte(p_dm, REG_CR_8814A + 1);
-	odm_write_1byte(p_dm,  REG_CR_8814A + 1, (u1b_tmp | BIT(0)));
+	u1b_tmp = odm_read_1byte(dm, REG_CR_8814A + 1);
+	odm_write_1byte(dm,  REG_CR_8814A + 1, (u1b_tmp | BIT(0)));
 
 
 	/*Set FWHW_TXQ_CTRL 0x422[6]=0 to tell Hw the packet is not a real beacon frame.*/
-	tmp_reg422 = odm_read_1byte(p_dm, REG_FWHW_TXQ_CTRL_8814A + 2);
-	odm_write_1byte(p_dm, REG_FWHW_TXQ_CTRL_8814A + 2,  tmp_reg422 & (~BIT(6)));
+	tmp_reg422 = odm_read_1byte(dm, REG_FWHW_TXQ_CTRL_8814A + 2);
+	odm_write_1byte(dm, REG_FWHW_TXQ_CTRL_8814A + 2,  tmp_reg422 & (~BIT(6)));
 
 	if (tmp_reg422 & BIT(6)) {
-		PHYDM_DBG(p_dm, DBG_TXBF, ("%s: There is an adapter is sending beacon.\n", __func__));
+		PHYDM_DBG(dm, DBG_TXBF,
+			  "%s: There is an adapter is sending beacon.\n",
+			  __func__);
 		is_send_beacon = true;
 	}
 
-	/*0x204[11:0]	Beacon Head for TXDMA*/
-	odm_write_2byte(p_dm, REG_FIFOPAGE_CTRL_2_8814A, head_page);
+	/*@0x204[11:0]	Beacon Head for TXDMA*/
+	odm_write_2byte(dm, REG_FIFOPAGE_CTRL_2_8814A, head_page);
 
 	do {
-		/*Clear beacon valid check bit.*/
-		bcn_valid_reg = odm_read_1byte(p_dm, REG_FIFOPAGE_CTRL_2_8814A + 1);
-		odm_write_1byte(p_dm, REG_FIFOPAGE_CTRL_2_8814A + 1, (bcn_valid_reg | BIT(7)));
+		/*@Clear beacon valid check bit.*/
+		bcn_valid_reg = odm_read_1byte(dm, REG_FIFOPAGE_CTRL_2_8814A + 1);
+		odm_write_1byte(dm, REG_FIFOPAGE_CTRL_2_8814A + 1, (bcn_valid_reg | BIT(7)));
 
-		/*download NDPA rsvd page.*/
+		/*@download NDPA rsvd page.*/
 		if (p_beam_entry->beamform_entry_cap & BEAMFORMER_CAP_VHT_SU)
-			beamforming_send_vht_ndpa_packet(p_dm, p_beam_entry->mac_addr, p_beam_entry->AID, p_beam_entry->sound_bw, BEACON_QUEUE);
+			beamforming_send_vht_ndpa_packet(dm, p_beam_entry->mac_addr, p_beam_entry->AID, p_beam_entry->sound_bw, BEACON_QUEUE);
 		else
-			beamforming_send_ht_ndpa_packet(p_dm, p_beam_entry->mac_addr, p_beam_entry->sound_bw, BEACON_QUEUE);
+			beamforming_send_ht_ndpa_packet(dm, p_beam_entry->mac_addr, p_beam_entry->sound_bw, BEACON_QUEUE);
 
-		/*check rsvd page download OK.*/
-		bcn_valid_reg = odm_read_1byte(p_dm, REG_FIFOPAGE_CTRL_2_8814A + 1);
+		/*@check rsvd page download OK.*/
+		bcn_valid_reg = odm_read_1byte(dm, REG_FIFOPAGE_CTRL_2_8814A + 1);
 		count = 0;
 		while (!(bcn_valid_reg & BIT(7)) && count < 20) {
 			count++;
 			ODM_delay_ms(10);
-			bcn_valid_reg = odm_read_1byte(p_dm, REG_FIFOPAGE_CTRL_2_8814A + 2);
+			bcn_valid_reg = odm_read_1byte(dm, REG_FIFOPAGE_CTRL_2_8814A + 2);
 		}
 		dl_bcn_count++;
 	} while (!(bcn_valid_reg & BIT(7)) && dl_bcn_count < 5);
 
 	if (!(bcn_valid_reg & BIT(7)))
-		PHYDM_DBG(p_dm, DBG_TXBF, ("%s Download RSVD page failed!\n", __func__));
+		PHYDM_DBG(dm, DBG_TXBF, "%s Download RSVD page failed!\n",
+			  __func__);
 
-	/*0x204[11:0]	Beacon Head for TXDMA*/
-	odm_write_2byte(p_dm, REG_FIFOPAGE_CTRL_2_8814A, tx_page_bndy);
+	/*@0x204[11:0]	Beacon Head for TXDMA*/
+	odm_write_2byte(dm, REG_FIFOPAGE_CTRL_2_8814A, tx_page_bndy);
 
 	/*To make sure that if there exists an adapter which would like to send beacon.*/
-	/*If exists, the origianl value of 0x422[6] will be 1, we should check this to*/
+	/*@If exists, the origianl value of 0x422[6] will be 1, we should check this to*/
 	/*prevent from setting 0x422[6] to 0 after download reserved page, or it will cause */
 	/*the beacon cannot be sent by HW.*/
-	/*2010.06.23. Added by tynli.*/
+	/*@2010.06.23. Added by tynli.*/
 	if (is_send_beacon)
-		odm_write_1byte(p_dm, REG_FWHW_TXQ_CTRL_8814A + 2, tmp_reg422);
+		odm_write_1byte(dm, REG_FWHW_TXQ_CTRL_8814A + 2, tmp_reg422);
 
-	/*Do not enable HW DMA BCN or it will cause Pcie interface hang by timing issue. 2011.11.24. by tynli.*/
-	/*Clear CR[8] or beacon packet will not be send to TxBuf anymore.*/
-	u1b_tmp = odm_read_1byte(p_dm, REG_CR_8814A + 1);
-	odm_write_1byte(p_dm, REG_CR_8814A + 1, (u1b_tmp & (~BIT(0))));
+	/*@Do not enable HW DMA BCN or it will cause Pcie interface hang by timing issue. 2011.11.24. by tynli.*/
+	/*@Clear CR[8] or beacon packet will not be send to TxBuf anymore.*/
+	u1b_tmp = odm_read_1byte(dm, REG_CR_8814A + 1);
+	odm_write_1byte(dm, REG_CR_8814A + 1, (u1b_tmp & (~BIT(0))));
 
 	p_beam_entry->beamform_entry_state = BEAMFORMING_ENTRY_STATE_PROGRESSED;
 
 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
-	*p_dm->p_is_fw_dw_rsvd_page_in_progress = false;
+	*dm->is_fw_dw_rsvd_page_in_progress = false;
 #endif
 }
 
 void
 hal_txbf_8814a_fw_txbf_cmd(
-	void			*p_dm_void
+	void			*dm_void
 )
 {
-	struct PHY_DM_STRUCT	*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
+	struct dm_struct	*dm = (struct dm_struct *)dm_void;
 	u8	idx, period = 0;
 	u8	PageNum0 = 0xFF, PageNum1 = 0xFF;
 	u8	u1_tx_bf_parm[3] = {0};
-	struct _RT_BEAMFORMING_INFO *p_beam_info = &p_dm->beamforming_info;
+	struct _RT_BEAMFORMING_INFO *beam_info = &dm->beamforming_info;
 
 	for (idx = 0; idx < BEAMFORMEE_ENTRY_NUM; idx++) {
-		if (p_beam_info->beamformee_entry[idx].is_used && p_beam_info->beamformee_entry[idx].beamform_entry_state == BEAMFORMING_ENTRY_STATE_PROGRESSED) {
-			if (p_beam_info->beamformee_entry[idx].is_sound) {
+		if (beam_info->beamformee_entry[idx].is_used && beam_info->beamformee_entry[idx].beamform_entry_state == BEAMFORMING_ENTRY_STATE_PROGRESSED) {
+			if (beam_info->beamformee_entry[idx].is_sound) {
 				PageNum0 = 0xFE;
 				PageNum1 = 0x07;
-				period = (u8)(p_beam_info->beamformee_entry[idx].sound_period);
+				period = (u8)(beam_info->beamformee_entry[idx].sound_period);
 			} else if (PageNum0 == 0xFF) {
 				PageNum0 = 0xFF; /*stop sounding*/
 				PageNum1 = 0x0F;
@@ -496,52 +472,50 @@ hal_txbf_8814a_fw_txbf_cmd(
 	u1_tx_bf_parm[0] = PageNum0;
 	u1_tx_bf_parm[1] = PageNum1;
 	u1_tx_bf_parm[2] = period;
-	odm_fill_h2c_cmd(p_dm, PHYDM_H2C_TXBF, 3, u1_tx_bf_parm);
+	odm_fill_h2c_cmd(dm, PHYDM_H2C_TXBF, 3, u1_tx_bf_parm);
 
-	PHYDM_DBG(p_dm, DBG_TXBF,
-		("[%s] PageNum0 = %d, PageNum1 = %d period = %d\n", __func__, PageNum0, PageNum1, period));
+	PHYDM_DBG(dm, DBG_TXBF,
+		  "[%s] PageNum0 = %d, PageNum1 = %d period = %d\n", __func__,
+		  PageNum0, PageNum1, period);
 }
 #endif
-void
-hal_txbf_8814a_enter(
-	void			*p_dm_void,
-	u8				bfer_bfee_idx
-)
+void hal_txbf_8814a_enter(void *dm_void, u8 bfer_bfee_idx)
 {
-	struct PHY_DM_STRUCT	*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	u8					i = 0;
-	u8					bfer_idx = (bfer_bfee_idx & 0xF0) >> 4;
-	u8					bfee_idx = (bfer_bfee_idx & 0xF);
-	struct _RT_BEAMFORMING_INFO	*p_beamforming_info = &p_dm->beamforming_info;
-	struct _RT_BEAMFORMEE_ENTRY	beamformee_entry;
-	struct _RT_BEAMFORMER_ENTRY	beamformer_entry;
-	u16					sta_id = 0, csi_param = 0;
-	u8					nc_index = 0, nr_index = 0, grouping = 0, codebookinfo = 0, coefficientsize = 0;
-
-	PHYDM_DBG(p_dm, DBG_TXBF, ("[%s] bfer_idx=%d, bfee_idx=%d\n", __func__, bfer_idx, bfee_idx));
-	odm_set_mac_reg(p_dm, REG_SND_PTCL_CTRL_8814A, MASKBYTE1 | MASKBYTE2, 0x0202);
-
-	if ((p_beamforming_info->beamformer_su_cnt > 0) && (bfer_idx < BEAMFORMER_ENTRY_NUM)) {
-		beamformer_entry = p_beamforming_info->beamformer_entry[bfer_idx];
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	u8 i = 0;
+	u8 bfer_idx = (bfer_bfee_idx & 0xF0) >> 4;
+	u8 bfee_idx = (bfer_bfee_idx & 0xF);
+	struct _RT_BEAMFORMING_INFO *beamforming_info = &dm->beamforming_info;
+	struct _RT_BEAMFORMEE_ENTRY beamformee_entry;
+	struct _RT_BEAMFORMER_ENTRY beamformer_entry;
+	u16 sta_id = 0, csi_param = 0;
+	u8 nc_index = 0, nr_index = 0, grouping = 0, codebookinfo = 0, coefficientsize = 0;
+
+	PHYDM_DBG(dm, DBG_TXBF, "[%s] bfer_idx=%d, bfee_idx=%d\n", __func__,
+		  bfer_idx, bfee_idx);
+	odm_set_mac_reg(dm, REG_SND_PTCL_CTRL_8814A, MASKBYTE1 | MASKBYTE2, 0x0202);
+
+	if (beamforming_info->beamformer_su_cnt > 0 && bfer_idx < BEAMFORMER_ENTRY_NUM) {
+		beamformer_entry = beamforming_info->beamformer_entry[bfer_idx];
 		/*Sounding protocol control*/
-		odm_write_1byte(p_dm, REG_SND_PTCL_CTRL_8814A, 0xDB);
+		odm_write_1byte(dm, REG_SND_PTCL_CTRL_8814A, 0xDB);
 
-		/*MAC address/Partial AID of Beamformer*/
+		/*@MAC address/Partial AID of Beamformer*/
 		if (bfer_idx == 0) {
-			for (i = 0; i < 6 ; i++)
-				odm_write_1byte(p_dm, (REG_ASSOCIATED_BFMER0_INFO_8814A + i), beamformer_entry.mac_addr[i]);
+			for (i = 0; i < 6; i++)
+				odm_write_1byte(dm, (REG_ASSOCIATED_BFMER0_INFO_8814A + i), beamformer_entry.mac_addr[i]);
 		} else {
-			for (i = 0; i < 6 ; i++)
-				odm_write_1byte(p_dm, (REG_ASSOCIATED_BFMER1_INFO_8814A + i), beamformer_entry.mac_addr[i]);
+			for (i = 0; i < 6; i++)
+				odm_write_1byte(dm, (REG_ASSOCIATED_BFMER1_INFO_8814A + i), beamformer_entry.mac_addr[i]);
 		}
 
-		/*CSI report parameters of Beamformer*/
-		nc_index = hal_txbf_8814a_get_nrx(p_dm);	/*for 8814A nrx = 3(4 ant), min=0(1 ant)*/
-		nr_index = beamformer_entry.num_of_sounding_dim;	/*0x718[7] = 1 use Nsts, 0x718[7] = 0 use reg setting. as Bfee, we use Nsts, so nr_index don't care*/
+		/*@CSI report parameters of Beamformer*/
+		nc_index = hal_txbf_8814a_get_nrx(dm); /*@for 8814A nrx = 3(4 ant), min=0(1 ant)*/
+		nr_index = beamformer_entry.num_of_sounding_dim; /*@0x718[7] = 1 use Nsts, 0x718[7] = 0 use reg setting. as Bfee, we use Nsts, so nr_index don't care*/
 
 		grouping = 0;
 
-		/*for ac = 1, for n = 3*/
+		/*@for ac = 1, for n = 3*/
 		if (beamformer_entry.beamform_entry_cap & BEAMFORMEE_CAP_VHT_SU)
 			codebookinfo = 1;
 		else if (beamformer_entry.beamform_entry_cap & BEAMFORMEE_CAP_HT_EXPLICIT)
@@ -552,118 +526,108 @@ hal_txbf_8814a_enter(
 		csi_param = (u16)((coefficientsize << 10) | (codebookinfo << 8) | (grouping << 6) | (nr_index << 3) | (nc_index));
 
 		if (bfer_idx == 0)
-			odm_write_2byte(p_dm, REG_CSI_RPT_PARAM_BW20_8814A, csi_param);
+			odm_write_2byte(dm, REG_CSI_RPT_PARAM_BW20_8814A, csi_param);
 		else
-			odm_write_2byte(p_dm, REG_CSI_RPT_PARAM_BW20_8814A + 2, csi_param);
+			odm_write_2byte(dm, REG_CSI_RPT_PARAM_BW20_8814A + 2, csi_param);
 		/*ndp_rx_standby_timer, 8814 need > 0x56, suggest from Dvaid*/
-		odm_write_1byte(p_dm, REG_SND_PTCL_CTRL_8814A + 3, 0x40);
-
+		odm_write_1byte(dm, REG_SND_PTCL_CTRL_8814A + 3, 0x40);
 	}
 
-	if ((p_beamforming_info->beamformee_su_cnt > 0) && (bfee_idx < BEAMFORMEE_ENTRY_NUM)) {
-		beamformee_entry = p_beamforming_info->beamformee_entry[bfee_idx];
+	if (beamforming_info->beamformee_su_cnt > 0 && bfee_idx < BEAMFORMEE_ENTRY_NUM) {
+		beamformee_entry = beamforming_info->beamformee_entry[bfee_idx];
 
-		hal_txbf_8814a_rf_mode(p_dm, p_beamforming_info, bfee_idx);
+		hal_txbf_8814a_rf_mode(dm, beamforming_info, bfee_idx);
 
-		if (phydm_acting_determine(p_dm, phydm_acting_as_ibss))
+		if (phydm_acting_determine(dm, phydm_acting_as_ibss))
 			sta_id = beamformee_entry.mac_id;
 		else
 			sta_id = beamformee_entry.p_aid;
 
 		/*P_AID of Beamformee & enable NDPA transmission & enable NDPA interrupt*/
 		if (bfee_idx == 0) {
-			odm_write_2byte(p_dm, REG_TXBF_CTRL_8814A, sta_id);
-			odm_write_1byte(p_dm, REG_TXBF_CTRL_8814A + 3, odm_read_1byte(p_dm, REG_TXBF_CTRL_8814A + 3) | BIT(4) | BIT(6) | BIT(7));
+			odm_write_2byte(dm, REG_TXBF_CTRL_8814A, sta_id);
+			odm_write_1byte(dm, REG_TXBF_CTRL_8814A + 3, odm_read_1byte(dm, REG_TXBF_CTRL_8814A + 3) | BIT(4) | BIT(6) | BIT(7));
 		} else
-			odm_write_2byte(p_dm, REG_TXBF_CTRL_8814A + 2, sta_id | BIT(14) | BIT(15) | BIT(12));
+			odm_write_2byte(dm, REG_TXBF_CTRL_8814A + 2, sta_id | BIT(14) | BIT(15) | BIT(12));
 
-		/*CSI report parameters of Beamformee*/
+		/*@CSI report parameters of Beamformee*/
 		if (bfee_idx == 0) {
-			/*Get BIT24 & BIT25*/
-			u8	tmp = odm_read_1byte(p_dm, REG_ASSOCIATED_BFMEE_SEL_8814A + 3) & 0x3;
+			/*@Get BIT24 & BIT25*/
+			u8 tmp = odm_read_1byte(dm, REG_ASSOCIATED_BFMEE_SEL_8814A + 3) & 0x3;
 
-			odm_write_1byte(p_dm, REG_ASSOCIATED_BFMEE_SEL_8814A + 3, tmp | 0x60);
-			odm_write_2byte(p_dm, REG_ASSOCIATED_BFMEE_SEL_8814A, sta_id | BIT(9));
+			odm_write_1byte(dm, REG_ASSOCIATED_BFMEE_SEL_8814A + 3, tmp | 0x60);
+			odm_write_2byte(dm, REG_ASSOCIATED_BFMEE_SEL_8814A, sta_id | BIT(9));
 		} else
-			odm_write_2byte(p_dm, REG_ASSOCIATED_BFMEE_SEL_8814A + 2, sta_id | 0xE200);	/*Set BIT25*/
+			odm_write_2byte(dm, REG_ASSOCIATED_BFMEE_SEL_8814A + 2, sta_id | 0xE200); /*Set BIT25*/
 
-		phydm_beamforming_notify(p_dm);
+		phydm_beamforming_notify(dm);
 	}
-
 }
 
-
-void
-hal_txbf_8814a_leave(
-	void			*p_dm_void,
-	u8				idx
-)
+void hal_txbf_8814a_leave(void *dm_void, u8 idx)
 {
-	struct PHY_DM_STRUCT	*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	struct _RT_BEAMFORMING_INFO	*p_beamforming_info = &p_dm->beamforming_info;
-	struct _RT_BEAMFORMER_ENTRY	beamformer_entry;
-	struct _RT_BEAMFORMEE_ENTRY	beamformee_entry;
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct _RT_BEAMFORMING_INFO *beamforming_info = &dm->beamforming_info;
+	struct _RT_BEAMFORMER_ENTRY beamformer_entry;
+	struct _RT_BEAMFORMEE_ENTRY beamformee_entry;
 
 	if (idx < BEAMFORMER_ENTRY_NUM) {
-		beamformer_entry = p_beamforming_info->beamformer_entry[idx];
-		beamformee_entry = p_beamforming_info->beamformee_entry[idx];
+		beamformer_entry = beamforming_info->beamformer_entry[idx];
+		beamformee_entry = beamforming_info->beamformee_entry[idx];
 	} else
 		return;
 
-	/*Clear P_AID of Beamformee*/
-	/*Clear MAC address of Beamformer*/
-	/*Clear Associated Bfmee Sel*/
+	/*@Clear P_AID of Beamformee*/
+	/*@Clear MAC address of Beamformer*/
+	/*@Clear Associated Bfmee Sel*/
 
 	if (beamformer_entry.beamform_entry_cap == BEAMFORMING_CAP_NONE) {
-		odm_write_1byte(p_dm, REG_SND_PTCL_CTRL_8814A, 0xD8);
+		odm_write_1byte(dm, REG_SND_PTCL_CTRL_8814A, 0xD8);
 		if (idx == 0) {
-			odm_write_4byte(p_dm, REG_ASSOCIATED_BFMER0_INFO_8814A, 0);
-			odm_write_2byte(p_dm, REG_ASSOCIATED_BFMER0_INFO_8814A + 4, 0);
-			odm_write_2byte(p_dm, REG_CSI_RPT_PARAM_BW20_8814A, 0);
+			odm_write_4byte(dm, REG_ASSOCIATED_BFMER0_INFO_8814A, 0);
+			odm_write_2byte(dm, REG_ASSOCIATED_BFMER0_INFO_8814A + 4, 0);
+			odm_write_2byte(dm, REG_CSI_RPT_PARAM_BW20_8814A, 0);
 		} else {
-			odm_write_4byte(p_dm, REG_ASSOCIATED_BFMER1_INFO_8814A, 0);
-			odm_write_2byte(p_dm, REG_ASSOCIATED_BFMER1_INFO_8814A + 4, 0);
-			odm_write_2byte(p_dm, REG_CSI_RPT_PARAM_BW20_8814A + 2, 0);
+			odm_write_4byte(dm, REG_ASSOCIATED_BFMER1_INFO_8814A, 0);
+			odm_write_2byte(dm, REG_ASSOCIATED_BFMER1_INFO_8814A + 4, 0);
+			odm_write_2byte(dm, REG_CSI_RPT_PARAM_BW20_8814A + 2, 0);
 		}
 	}
 
 	if (beamformee_entry.beamform_entry_cap == BEAMFORMING_CAP_NONE) {
-		hal_txbf_8814a_rf_mode(p_dm, p_beamforming_info, idx);
+		hal_txbf_8814a_rf_mode(dm, beamforming_info, idx);
 		if (idx == 0) {
-			odm_write_2byte(p_dm, REG_TXBF_CTRL_8814A, 0x0);
-			odm_write_1byte(p_dm, REG_TXBF_CTRL_8814A + 3, odm_read_1byte(p_dm, REG_TXBF_CTRL_8814A + 3) | BIT(4) | BIT(6) | BIT(7));
-			odm_write_2byte(p_dm, REG_ASSOCIATED_BFMEE_SEL_8814A, 0);
+			odm_write_2byte(dm, REG_TXBF_CTRL_8814A, 0x0);
+			odm_write_1byte(dm, REG_TXBF_CTRL_8814A + 3, odm_read_1byte(dm, REG_TXBF_CTRL_8814A + 3) | BIT(4) | BIT(6) | BIT(7));
+			odm_write_2byte(dm, REG_ASSOCIATED_BFMEE_SEL_8814A, 0);
 		} else {
-			odm_write_2byte(p_dm, REG_TXBF_CTRL_8814A + 2, 0x0 | BIT(14) | BIT(15) | BIT(12));
+			odm_write_2byte(dm, REG_TXBF_CTRL_8814A + 2, 0x0 | BIT(14) | BIT(15) | BIT(12));
 
-			odm_write_2byte(p_dm, REG_ASSOCIATED_BFMEE_SEL_8814A + 2, odm_read_2byte(p_dm, REG_ASSOCIATED_BFMEE_SEL_8814A + 2) & 0x60);
+			odm_write_2byte(dm, REG_ASSOCIATED_BFMEE_SEL_8814A + 2, odm_read_2byte(dm, REG_ASSOCIATED_BFMEE_SEL_8814A + 2) & 0x60);
 		}
 	}
 }
 
-void
-hal_txbf_8814a_status(
-	void			*p_dm_void,
-	u8				idx
-)
+void hal_txbf_8814a_status(void *dm_void, u8 idx)
 {
-	struct PHY_DM_STRUCT	*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	u16					beam_ctrl_val, tmp_val;
-	u32					beam_ctrl_reg;
-	struct _RT_BEAMFORMING_INFO	*p_beamforming_info = &p_dm->beamforming_info;
-	struct _RT_BEAMFORMEE_ENTRY	beamform_entry;
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	u16 beam_ctrl_val, tmp_val;
+	u32 beam_ctrl_reg;
+	struct _RT_BEAMFORMING_INFO *beamforming_info = &dm->beamforming_info;
+	struct _RT_BEAMFORMEE_ENTRY beamform_entry;
 
 	if (idx < BEAMFORMEE_ENTRY_NUM)
-		beamform_entry = p_beamforming_info->beamformee_entry[idx];
+		beamform_entry = beamforming_info->beamformee_entry[idx];
 	else
 		return;
 
-	if (phydm_acting_determine(p_dm, phydm_acting_as_ibss))
+	if (phydm_acting_determine(dm, phydm_acting_as_ibss))
 		beam_ctrl_val = beamform_entry.mac_id;
 	else
 		beam_ctrl_val = beamform_entry.p_aid;
 
-	PHYDM_DBG(p_dm, DBG_TXBF, ("@%s, beamform_entry.beamform_entry_state = %d", __func__, beamform_entry.beamform_entry_state));
+	PHYDM_DBG(dm, DBG_TXBF, "@%s, beamform_entry.beamform_entry_state = %d",
+		  __func__, beamform_entry.beamform_entry_state);
 
 	if (idx == 0)
 		beam_ctrl_reg = REG_TXBF_CTRL_8814A;
@@ -672,7 +636,7 @@ hal_txbf_8814a_status(
 		beam_ctrl_val |= BIT(12) | BIT(14) | BIT(15);
 	}
 
-	if ((beamform_entry.beamform_entry_state == BEAMFORMING_ENTRY_STATE_PROGRESSED) && (p_beamforming_info->apply_v_matrix == true)) {
+	if (beamform_entry.beamform_entry_state == BEAMFORMING_ENTRY_STATE_PROGRESSED && beamforming_info->apply_v_matrix == true) {
 		if (beamform_entry.sound_bw == CHANNEL_WIDTH_20)
 			beam_ctrl_val |= BIT(9);
 		else if (beamform_entry.sound_bw == CHANNEL_WIDTH_40)
@@ -680,41 +644,32 @@ hal_txbf_8814a_status(
 		else if (beamform_entry.sound_bw == CHANNEL_WIDTH_80)
 			beam_ctrl_val |= (BIT(9) | BIT(10) | BIT(11));
 	} else {
-		PHYDM_DBG(p_dm, DBG_TXBF, ("@%s, Don't apply Vmatrix",  __func__));
+		PHYDM_DBG(dm, DBG_TXBF, "@%s, Don't apply Vmatrix", __func__);
 		beam_ctrl_val &= ~(BIT(9) | BIT(10) | BIT(11));
 	}
 
-	odm_write_2byte(p_dm, beam_ctrl_reg, beam_ctrl_val);
-	/*disable NDP packet use beamforming */
-	tmp_val = odm_read_2byte(p_dm, REG_TXBF_CTRL_8814A);
-	odm_write_2byte(p_dm, REG_TXBF_CTRL_8814A, tmp_val | BIT(15));
-
+	odm_write_2byte(dm, beam_ctrl_reg, beam_ctrl_val);
+	/*@disable NDP packet use beamforming */
+	tmp_val = odm_read_2byte(dm, REG_TXBF_CTRL_8814A);
+	odm_write_2byte(dm, REG_TXBF_CTRL_8814A, tmp_val | BIT(15));
 }
 
-
-
-
-
-void
-hal_txbf_8814a_fw_txbf(
-	void			*p_dm_void,
-	u8				idx
-)
+void hal_txbf_8814a_fw_txbf(void *dm_void, u8 idx)
 {
 #if 0
-	struct PHY_DM_STRUCT	*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	struct _RT_BEAMFORMING_INFO	*p_beam_info = &p_dm->beamforming_info;
-	struct _RT_BEAMFORMEE_ENTRY	*p_beam_entry = p_beam_info->beamformee_entry + idx;
+	struct dm_struct	*dm = (struct dm_struct *)dm_void;
+	struct _RT_BEAMFORMING_INFO	*beam_info = &dm->beamforming_info;
+	struct _RT_BEAMFORMEE_ENTRY	*p_beam_entry = beam_info->beamformee_entry + idx;
 
-	PHYDM_DBG(p_dm, DBG_TXBF, ("[%s] Start!\n", __func__));
+	PHYDM_DBG(dm, DBG_TXBF, "[%s] Start!\n", __func__);
 
 	if (p_beam_entry->beamform_entry_state == BEAMFORMING_ENTRY_STATE_PROGRESSING)
-		hal_txbf_8814a_download_ndpa(p_dm, idx);
+		hal_txbf_8814a_download_ndpa(dm, idx);
 
-	hal_txbf_8814a_fw_txbf_cmd(p_dm);
+	hal_txbf_8814a_fw_txbf_cmd(dm);
 #endif
 }
 
-#endif	/* (RTL8814A_SUPPORT == 1)*/
+#endif /* @(RTL8814A_SUPPORT == 1)*/
 
 #endif
diff --git a/rtl8723DS/hal/phydm/txbf/haltxbf8814a.h b/rtl8723DS/hal/phydm/txbf/haltxbf8814a.h
index b070564..61b33bb 100755..100644
--- a/rtl8723DS/hal/phydm/txbf/haltxbf8814a.h
+++ b/rtl8723DS/hal/phydm/txbf/haltxbf8814a.h
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2016 - 2017 Realtek Corporation.
+ * Copyright(c) 2007 - 2017  Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -8,96 +8,70 @@
  *
  * This program is distributed in the hope that it will be useful, but WITHOUT
  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  * more details.
  *
+ * The full GNU General Public License is included in this distribution in the
+ * file called LICENSE.
+ *
+ * Contact Information:
+ * wlanfae <wlanfae@realtek.com>
+ * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
+ * Hsinchu 300, Taiwan.
+ *
+ * Larry Finger <Larry.Finger@lwfinger.net>
+ *
  *****************************************************************************/
 #ifndef __HAL_TXBF_8814A_H__
 #define __HAL_TXBF_8814A_H__
 
 #if (RTL8814A_SUPPORT == 1)
-#if (BEAMFORMING_SUPPORT == 1)
+#ifdef PHYDM_BEAMFORMING_SUPPORT
 
 boolean
-phydm_beamforming_set_iqgen_8814A(
-	void			*p_dm_void
-);
-
-void
-hal_txbf_8814a_set_ndpa_rate(
-	void			*p_dm_void,
-	u8	BW,
-	u8	rate
-);
-
-u8
-hal_txbf_8814a_get_ntx(
-	void			*p_dm_void
-);
-
-void
-hal_txbf_8814a_enter(
-	void			*p_dm_void,
-	u8				idx
-);
-
-
-void
-hal_txbf_8814a_leave(
-	void			*p_dm_void,
-	u8				idx
-);
-
-
-void
-hal_txbf_8814a_status(
-	void			*p_dm_void,
-	u8				idx
-);
-
-void
-hal_txbf_8814a_reset_tx_path(
-	void			*p_dm_void,
-	u8				idx
-);
-
-
-void
-hal_txbf_8814a_get_tx_rate(
-	void			*p_dm_void
-);
-
-void
-hal_txbf_8814a_fw_txbf(
-	void			*p_dm_void,
-	u8				idx
-);
+phydm_beamforming_set_iqgen_8814A(void *dm_void);
+
+void hal_txbf_8814a_set_ndpa_rate(void *dm_void, u8 BW, u8 rate);
+
+u8 hal_txbf_8814a_get_ntx(void *dm_void);
+
+void hal_txbf_8814a_enter(void *dm_void, u8 idx);
+
+void hal_txbf_8814a_leave(void *dm_void, u8 idx);
+
+void hal_txbf_8814a_status(void *dm_void, u8 idx);
+
+void hal_txbf_8814a_reset_tx_path(void *dm_void, u8 idx);
+
+void hal_txbf_8814a_get_tx_rate(void *dm_void);
+
+void hal_txbf_8814a_fw_txbf(void *dm_void, u8 idx);
 
 #else
 
-#define hal_txbf_8814a_set_ndpa_rate(p_dm_void,	BW,	rate)
-#define hal_txbf_8814a_get_ntx(p_dm_void) 0
-#define hal_txbf_8814a_enter(p_dm_void, idx)
-#define hal_txbf_8814a_leave(p_dm_void, idx)
-#define hal_txbf_8814a_status(p_dm_void, idx)
-#define hal_txbf_8814a_reset_tx_path(p_dm_void,	idx)
-#define hal_txbf_8814a_get_tx_rate(p_dm_void)
-#define hal_txbf_8814a_fw_txbf(p_dm_void,	idx)
-#define phydm_beamforming_set_iqgen_8814A(p_dm_void)	0
+#define hal_txbf_8814a_set_ndpa_rate(dm_void, BW, rate)
+#define hal_txbf_8814a_get_ntx(dm_void) 0
+#define hal_txbf_8814a_enter(dm_void, idx)
+#define hal_txbf_8814a_leave(dm_void, idx)
+#define hal_txbf_8814a_status(dm_void, idx)
+#define hal_txbf_8814a_reset_tx_path(dm_void, idx)
+#define hal_txbf_8814a_get_tx_rate(dm_void)
+#define hal_txbf_8814a_fw_txbf(dm_void, idx)
+#define phydm_beamforming_set_iqgen_8814A(dm_void) 0
 
 #endif
 
 #else
 
-#define hal_txbf_8814a_set_ndpa_rate(p_dm_void,	BW,	rate)
-#define hal_txbf_8814a_get_ntx(p_dm_void) 0
-#define hal_txbf_8814a_enter(p_dm_void, idx)
-#define hal_txbf_8814a_leave(p_dm_void, idx)
-#define hal_txbf_8814a_status(p_dm_void, idx)
-#define hal_txbf_8814a_reset_tx_path(p_dm_void,	idx)
-#define hal_txbf_8814a_get_tx_rate(p_dm_void)
-#define hal_txbf_8814a_fw_txbf(p_dm_void,	idx)
-#define phydm_beamforming_set_iqgen_8814A(p_dm_void)	0
+#define hal_txbf_8814a_set_ndpa_rate(dm_void, BW, rate)
+#define hal_txbf_8814a_get_ntx(dm_void) 0
+#define hal_txbf_8814a_enter(dm_void, idx)
+#define hal_txbf_8814a_leave(dm_void, idx)
+#define hal_txbf_8814a_status(dm_void, idx)
+#define hal_txbf_8814a_reset_tx_path(dm_void, idx)
+#define hal_txbf_8814a_get_tx_rate(dm_void)
+#define hal_txbf_8814a_fw_txbf(dm_void, idx)
+#define phydm_beamforming_set_iqgen_8814A(dm_void) 0
 #endif
 
 #endif
diff --git a/rtl8723DS/hal/phydm/txbf/haltxbf8822b.c b/rtl8723DS/hal/phydm/txbf/haltxbf8822b.c
index e7d75a4..f25912a 100755..100644
--- a/rtl8723DS/hal/phydm/txbf/haltxbf8822b.c
+++ b/rtl8723DS/hal/phydm/txbf/haltxbf8822b.c
@@ -12,163 +12,154 @@
  * more details.
  *
  *****************************************************************************/
-/*============================================================*/
-/* Description:                                              */
-/*                                                           */
+/*@============================================================*/
+/* @Description:                                              */
+/*                                                           @*/
 /* This file is for 8814A TXBF mechanism                     */
-/*                                                           */
-/*============================================================*/
+/*                                                           @*/
+/*@============================================================*/
 
 #include "mp_precomp.h"
 #include "phydm_precomp.h"
 
 #if (RTL8822B_SUPPORT == 1)
-#if (BEAMFORMING_SUPPORT == 1)
+#ifdef PHYDM_BEAMFORMING_SUPPORT
 
-u8
-hal_txbf_8822b_get_ntx(
-	void			*p_dm_void
-)
+u8 hal_txbf_8822b_get_ntx(
+	void *dm_void)
 {
-	struct PHY_DM_STRUCT	*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	u8			ntx = 0;
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	u8 ntx = 0;
 
 #if DEV_BUS_TYPE == RT_USB_INTERFACE
-	if (p_dm->support_interface == ODM_ITRF_USB) {
-		if (*p_dm->hub_usb_mode == 2) {/*USB3.0*/
-			if (p_dm->rf_type == RF_4T4R)
+	if (dm->support_interface == ODM_ITRF_USB) {
+		if (*dm->hub_usb_mode == 2) { /*USB3.0*/
+			if (dm->rf_type == RF_4T4R)
 				ntx = 3;
-			else if (p_dm->rf_type == RF_3T3R)
+			else if (dm->rf_type == RF_3T3R)
 				ntx = 2;
 			else
 				ntx = 1;
-		} else if (*p_dm->hub_usb_mode == 1)	/*USB 2.0 always 2Tx*/
+		} else if (*dm->hub_usb_mode == 1) /*USB 2.0 always 2Tx*/
 			ntx = 1;
 		else
 			ntx = 1;
 	} else
 #endif
 	{
-		if (p_dm->rf_type == RF_4T4R)
+		if (dm->rf_type == RF_4T4R)
 			ntx = 3;
-		else if (p_dm->rf_type == RF_3T3R)
+		else if (dm->rf_type == RF_3T3R)
 			ntx = 2;
 		else
 			ntx = 1;
 	}
 
 	return ntx;
-
 }
 
-u8
-hal_txbf_8822b_get_nrx(
-	void			*p_dm_void
-)
+u8 hal_txbf_8822b_get_nrx(
+	void *dm_void)
 {
-	struct PHY_DM_STRUCT	*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	u8			nrx = 0;
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	u8 nrx = 0;
 
-	if (p_dm->rf_type == RF_4T4R)
+	if (dm->rf_type == RF_4T4R)
 		nrx = 3;
-	else if (p_dm->rf_type == RF_3T3R)
+	else if (dm->rf_type == RF_3T3R)
 		nrx = 2;
-	else if (p_dm->rf_type == RF_2T2R)
+	else if (dm->rf_type == RF_2T2R)
 		nrx = 1;
-	else if (p_dm->rf_type == RF_2T3R)
+	else if (dm->rf_type == RF_2T3R)
 		nrx = 2;
-	else if (p_dm->rf_type == RF_2T4R)
+	else if (dm->rf_type == RF_2T4R)
 		nrx = 3;
-	else if (p_dm->rf_type == RF_1T1R)
+	else if (dm->rf_type == RF_1T1R)
 		nrx = 0;
-	else if (p_dm->rf_type == RF_1T2R)
+	else if (dm->rf_type == RF_1T2R)
 		nrx = 1;
 	else
 		nrx = 0;
 
 	return nrx;
-
 }
 
 /***************SU & MU BFee Entry********************/
-void
-hal_txbf_8822b_rf_mode(
-	void			*p_dm_void,
-	struct _RT_BEAMFORMING_INFO	*p_beamforming_info,
-	u8					idx
-)
+void hal_txbf_8822b_rf_mode(
+	void *dm_void,
+	struct _RT_BEAMFORMING_INFO *beamforming_info,
+	u8 idx)
 {
 #if 0
-	struct PHY_DM_STRUCT	*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
+	struct dm_struct	*dm = (struct dm_struct *)dm_void;
 	u8				i, nr_index = 0;
 	boolean				is_self_beamformer = false;
 	boolean				is_self_beamformee = false;
 	struct _RT_BEAMFORMEE_ENTRY	beamformee_entry;
 
 	if (idx < BEAMFORMEE_ENTRY_NUM)
-		beamformee_entry = p_beamforming_info->beamformee_entry[idx];
+		beamformee_entry = beamforming_info->beamformee_entry[idx];
 	else
 		return;
 
-	if (p_dm->rf_type == RF_1T1R)
+	if (dm->rf_type == RF_1T1R)
 		return;
 
 	for (i = RF_PATH_A; i < RF_PATH_B; i++) {
-		odm_set_rf_reg(p_dm, (enum rf_path)i, rf_welut_jaguar, 0x80000, 0x1);
+		odm_set_rf_reg(dm, (enum rf_path)i, rf_welut_jaguar, 0x80000, 0x1);
 		/*RF mode table write enable*/
 	}
 
-	if ((p_beamforming_info->beamformee_su_cnt > 0) || (p_beamforming_info->beamformee_mu_cnt > 0)) {
+	if (beamforming_info->beamformee_su_cnt > 0 || beamforming_info->beamformee_mu_cnt > 0) {
 		for (i = RF_PATH_A; i < RF_PATH_B; i++) {
-			odm_set_rf_reg(p_dm, (enum rf_path)i, rf_mode_table_addr, 0xfffff, 0x18000);
+			odm_set_rf_reg(dm, (enum rf_path)i, rf_mode_table_addr, 0xfffff, 0x18000);
 			/*Select RX mode*/
-			odm_set_rf_reg(p_dm, (enum rf_path)i, rf_mode_table_data0, 0xfffff, 0xBE77F);
+			odm_set_rf_reg(dm, (enum rf_path)i, rf_mode_table_data0, 0xfffff, 0xBE77F);
 			/*Set Table data*/
-			odm_set_rf_reg(p_dm, (enum rf_path)i, rf_mode_table_data1, 0xfffff, 0x226BF);
-			/*Enable TXIQGEN in RX mode*/
+			odm_set_rf_reg(dm, (enum rf_path)i, rf_mode_table_data1, 0xfffff, 0x226BF);
+			/*@Enable TXIQGEN in RX mode*/
 		}
-		odm_set_rf_reg(p_dm, RF_PATH_A, rf_mode_table_data1, 0xfffff, 0xE26BF);
-		/*Enable TXIQGEN in RX mode*/
+		odm_set_rf_reg(dm, RF_PATH_A, rf_mode_table_data1, 0xfffff, 0xE26BF);
+		/*@Enable TXIQGEN in RX mode*/
 	}
 
 	for (i = RF_PATH_A; i < RF_PATH_B; i++) {
-		odm_set_rf_reg(p_dm, (enum rf_path)i, rf_welut_jaguar, 0x80000, 0x0);
+		odm_set_rf_reg(dm, (enum rf_path)i, rf_welut_jaguar, 0x80000, 0x0);
 		/*RF mode table write disable*/
 	}
 
-	if (p_beamforming_info->beamformee_su_cnt > 0) {
-
-		/*for 8814 19ac(idx 1), 19b4(idx 0), different Tx ant setting*/
-		odm_set_bb_reg(p_dm, REG_BB_TXBF_ANT_SET_BF1_8822B, BIT(28) | BIT29, 0x2);			/*enable BB TxBF ant mapping register*/
+	if (beamforming_info->beamformee_su_cnt > 0) {
+		/*@for 8814 19ac(idx 1), 19b4(idx 0), different Tx ant setting*/
+		odm_set_bb_reg(dm, REG_BB_TXBF_ANT_SET_BF1_8822B, BIT(28) | BIT29, 0x2);			/*@enable BB TxBF ant mapping register*/
 
 		if (idx == 0) {
 			/*Nsts = 2	AB*/
-			odm_set_bb_reg(p_dm, REG_BB_TXBF_ANT_SET_BF0_8822B, 0xffff, 0x0433);
-			odm_set_bb_reg(p_dm, REG_BB_TX_PATH_SEL_1_8822B, 0xfff00000, 0x043);
-			/*odm_set_bb_reg(p_dm, REG_BB_TX_PATH_SEL_2, MASKLWORD, 0x430);*/
-
-		} else {/*IDX =1*/
-			odm_set_bb_reg(p_dm, REG_BB_TXBF_ANT_SET_BF1_8822B, 0xffff, 0x0433);
-			odm_set_bb_reg(p_dm, REG_BB_TX_PATH_SEL_1_8822B, 0xfff00000, 0x043);
-			/*odm_set_bb_reg(p_dm, REG_BB_TX_PATH_SEL_2, MASKLWORD, 0x430;*/
+			odm_set_bb_reg(dm, REG_BB_TXBF_ANT_SET_BF0_8822B, 0xffff, 0x0433);
+			odm_set_bb_reg(dm, REG_BB_TX_PATH_SEL_1_8822B, 0xfff00000, 0x043);
+			/*odm_set_bb_reg(dm, REG_BB_TX_PATH_SEL_2, MASKLWORD, 0x430);*/
+
+		} else {/*@IDX =1*/
+			odm_set_bb_reg(dm, REG_BB_TXBF_ANT_SET_BF1_8822B, 0xffff, 0x0433);
+			odm_set_bb_reg(dm, REG_BB_TX_PATH_SEL_1_8822B, 0xfff00000, 0x043);
+			/*odm_set_bb_reg(dm, REG_BB_TX_PATH_SEL_2, MASKLWORD, 0x430;*/
 		}
 	} else {
-		odm_set_bb_reg(p_dm, REG_BB_TX_PATH_SEL_1_8822B, 0xfff00000, 0x1); /*1SS by path-A*/
-		odm_set_bb_reg(p_dm, REG_BB_TX_PATH_SEL_2_8822B, MASKLWORD, 0x430); /*2SS by path-A,B*/
+		odm_set_bb_reg(dm, REG_BB_TX_PATH_SEL_1_8822B, 0xfff00000, 0x1); /*@1SS by path-A*/
+		odm_set_bb_reg(dm, REG_BB_TX_PATH_SEL_2_8822B, MASKLWORD, 0x430); /*@2SS by path-A,B*/
 	}
 
-	if (p_beamforming_info->beamformee_mu_cnt > 0) {
-		/*MU STAs share the common setting*/
-		odm_set_bb_reg(p_dm, REG_BB_TXBF_ANT_SET_BF1_8822B, BIT(31), 1);
-		odm_set_bb_reg(p_dm, REG_BB_TXBF_ANT_SET_BF1_8822B, 0xffff, 0x0433);
-		odm_set_bb_reg(p_dm, REG_BB_TX_PATH_SEL_1_8822B, 0xfff00000, 0x043);
+	if (beamforming_info->beamformee_mu_cnt > 0) {
+		/*@MU STAs share the common setting*/
+		odm_set_bb_reg(dm, REG_BB_TXBF_ANT_SET_BF1_8822B, BIT(31), 1);
+		odm_set_bb_reg(dm, REG_BB_TXBF_ANT_SET_BF1_8822B, 0xffff, 0x0433);
+		odm_set_bb_reg(dm, REG_BB_TX_PATH_SEL_1_8822B, 0xfff00000, 0x043);
 	}
 #endif
 }
 #if 0
 void
 hal_txbf_8822b_download_ndpa(
-	struct _ADAPTER			*adapter,
+	void			*adapter,
 	u8				idx
 )
 {
@@ -176,13 +167,13 @@ hal_txbf_8822b_download_ndpa(
 	u8			bcn_valid_reg = 0, count = 0, dl_bcn_count = 0;
 	u16			head_page = 0x7FE;
 	boolean			is_send_beacon = false;
-	HAL_DATA_TYPE	*p_hal_data = GET_HAL_DATA(adapter);
-	u16			tx_page_bndy = LAST_ENTRY_OF_TX_PKT_BUFFER_8814A; /*default reseved 1 page for the IC type which is undefined.*/
-	struct _RT_BEAMFORMING_INFO	*p_beam_info = GET_BEAMFORM_INFO(adapter);
-	struct _RT_BEAMFORMEE_ENTRY	*p_beam_entry = p_beam_info->beamformee_entry + idx;
+	HAL_DATA_TYPE	*hal_data = GET_HAL_DATA(adapter);
+	u16			tx_page_bndy = LAST_ENTRY_OF_TX_PKT_BUFFER_8814A; /*@default reseved 1 page for the IC type which is undefined.*/
+	struct _RT_BEAMFORMING_INFO	*beam_info = GET_BEAMFORM_INFO(adapter);
+	struct _RT_BEAMFORMEE_ENTRY	*p_beam_entry = beam_info->beamformee_entry + idx;
 
-	p_hal_data->is_fw_dw_rsvd_page_in_progress = true;
-	phydm_get_hal_def_var_handler_interface(p_dm, HAL_DEF_TX_PAGE_BOUNDARY, (u16 *)&tx_page_bndy);
+	hal_data->is_fw_dw_rsvd_page_in_progress = true;
+	phydm_get_hal_def_var_handler_interface(dm, HAL_DEF_TX_PAGE_BOUNDARY, (u16 *)&tx_page_bndy);
 
 	/*Set REG_CR bit 8. DMA beacon by SW.*/
 	u1b_tmp = platform_efio_read_1byte(adapter, REG_CR_8814A + 1);
@@ -198,21 +189,21 @@ hal_txbf_8822b_download_ndpa(
 		is_send_beacon = true;
 	}
 
-	/*0x204[11:0]	Beacon Head for TXDMA*/
+	/*@0x204[11:0]	Beacon Head for TXDMA*/
 	platform_efio_write_2byte(adapter, REG_FIFOPAGE_CTRL_2_8814A, head_page);
 
 	do {
-		/*Clear beacon valid check bit.*/
+		/*@Clear beacon valid check bit.*/
 		bcn_valid_reg = platform_efio_read_1byte(adapter, REG_FIFOPAGE_CTRL_2_8814A + 1);
 		platform_efio_write_1byte(adapter, REG_FIFOPAGE_CTRL_2_8814A + 1, (bcn_valid_reg | BIT(7)));
 
-		/*download NDPA rsvd page.*/
+		/*@download NDPA rsvd page.*/
 		if (p_beam_entry->beamform_entry_cap & BEAMFORMER_CAP_VHT_SU)
-			beamforming_send_vht_ndpa_packet(p_dm, p_beam_entry->mac_addr, p_beam_entry->AID, p_beam_entry->sound_bw, BEACON_QUEUE);
+			beamforming_send_vht_ndpa_packet(dm, p_beam_entry->mac_addr, p_beam_entry->AID, p_beam_entry->sound_bw, BEACON_QUEUE);
 		else
-			beamforming_send_ht_ndpa_packet(p_dm, p_beam_entry->mac_addr, p_beam_entry->sound_bw, BEACON_QUEUE);
+			beamforming_send_ht_ndpa_packet(dm, p_beam_entry->mac_addr, p_beam_entry->sound_bw, BEACON_QUEUE);
 
-		/*check rsvd page download OK.*/
+		/*@check rsvd page download OK.*/
 		bcn_valid_reg = platform_efio_read_1byte(adapter, REG_FIFOPAGE_CTRL_2_8814A + 1);
 		count = 0;
 		while (!(bcn_valid_reg & BIT(7)) && count < 20) {
@@ -226,45 +217,45 @@ hal_txbf_8822b_download_ndpa(
 	if (!(bcn_valid_reg & BIT(0)))
 		RT_DISP(FBEAM, FBEAM_ERROR, ("%s Download RSVD page failed!\n", __func__));
 
-	/*0x204[11:0]	Beacon Head for TXDMA*/
+	/*@0x204[11:0]	Beacon Head for TXDMA*/
 	platform_efio_write_2byte(adapter, REG_FIFOPAGE_CTRL_2_8814A, tx_page_bndy);
 
 	/*To make sure that if there exists an adapter which would like to send beacon.*/
-	/*If exists, the origianl value of 0x422[6] will be 1, we should check this to*/
+	/*@If exists, the origianl value of 0x422[6] will be 1, we should check this to*/
 	/*prevent from setting 0x422[6] to 0 after download reserved page, or it will cause */
 	/*the beacon cannot be sent by HW.*/
-	/*2010.06.23. Added by tynli.*/
+	/*@2010.06.23. Added by tynli.*/
 	if (is_send_beacon)
 		platform_efio_write_1byte(adapter, REG_FWHW_TXQ_CTRL_8814A + 2, tmp_reg422);
 
-	/*Do not enable HW DMA BCN or it will cause Pcie interface hang by timing issue. 2011.11.24. by tynli.*/
-	/*Clear CR[8] or beacon packet will not be send to TxBuf anymore.*/
+	/*@Do not enable HW DMA BCN or it will cause Pcie interface hang by timing issue. 2011.11.24. by tynli.*/
+	/*@Clear CR[8] or beacon packet will not be send to TxBuf anymore.*/
 	u1b_tmp = platform_efio_read_1byte(adapter, REG_CR_8814A + 1);
 	platform_efio_write_1byte(adapter, REG_CR_8814A + 1, (u1b_tmp & (~BIT(0))));
 
 	p_beam_entry->beamform_entry_state = BEAMFORMING_ENTRY_STATE_PROGRESSED;
 
-	p_hal_data->is_fw_dw_rsvd_page_in_progress = false;
+	hal_data->is_fw_dw_rsvd_page_in_progress = false;
 }
 
 void
 hal_txbf_8822b_fw_txbf_cmd(
-	struct _ADAPTER	*adapter
+	void	*adapter
 )
 {
 	u8	idx, period = 0;
 	u8	PageNum0 = 0xFF, PageNum1 = 0xFF;
 	u8	u1_tx_bf_parm[3] = {0};
 
-	PMGNT_INFO				p_mgnt_info = &(adapter->MgntInfo);
-	struct _RT_BEAMFORMING_INFO	*p_beam_info = GET_BEAMFORM_INFO(adapter);
+	PMGNT_INFO				mgnt_info = &(adapter->MgntInfo);
+	struct _RT_BEAMFORMING_INFO	*beam_info = GET_BEAMFORM_INFO(adapter);
 
 	for (idx = 0; idx < BEAMFORMEE_ENTRY_NUM; idx++) {
-		if (p_beam_info->beamformee_entry[idx].is_used && p_beam_info->beamformee_entry[idx].beamform_entry_state == BEAMFORMING_ENTRY_STATE_PROGRESSED) {
-			if (p_beam_info->beamformee_entry[idx].is_sound) {
+		if (beam_info->beamformee_entry[idx].is_used && beam_info->beamformee_entry[idx].beamform_entry_state == BEAMFORMING_ENTRY_STATE_PROGRESSED) {
+			if (beam_info->beamformee_entry[idx].is_sound) {
 				PageNum0 = 0xFE;
 				PageNum1 = 0x07;
-				period = (u8)(p_beam_info->beamformee_entry[idx].sound_period);
+				period = (u8)(beam_info->beamformee_entry[idx].sound_period);
 			} else if (PageNum0 == 0xFF) {
 				PageNum0 = 0xFF; /*stop sounding*/
 				PageNum1 = 0x0F;
@@ -284,108 +275,107 @@ hal_txbf_8822b_fw_txbf_cmd(
 #if 0
 void
 hal_txbf_8822b_init(
-	void			*p_dm_void
+	void			*dm_void
 )
 {
-	struct PHY_DM_STRUCT	*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
+	struct dm_struct	*dm = (struct dm_struct *)dm_void;
 	u8		u1b_tmp;
-	struct _RT_BEAMFORMING_INFO		*p_beamforming_info = &p_dm->beamforming_info;
-	struct _ADAPTER				*adapter = p_dm->adapter;
+	struct _RT_BEAMFORMING_INFO		*beamforming_info = &dm->beamforming_info;
+	void				*adapter = dm->adapter;
 
-	odm_set_bb_reg(p_dm, 0x14c0, BIT(16), 1); /*Enable P1 aggr new packet according to P0 transfer time*/
-	odm_set_bb_reg(p_dm, 0x14c0, BIT(15) | BIT14 | BIT13 | BIT12, 10); /*MU Retry Limit*/
-	odm_set_bb_reg(p_dm, 0x14c0, BIT(7), 0); /*Disable Tx MU-MIMO until sounding done*/
-	odm_set_bb_reg(p_dm, 0x14c0, 0x3F, 0); /* Clear validity of MU STAs */
-	odm_write_1byte(p_dm, 0x167c, 0x70); /*MU-MIMO Option as default value*/
-	odm_write_2byte(p_dm, 0x1680, 0); /*MU-MIMO Control as default value*/
+	odm_set_bb_reg(dm, R_0x14c0, BIT(16), 1); /*@Enable P1 aggr new packet according to P0 transfer time*/
+	odm_set_bb_reg(dm, R_0x14c0, BIT(15) | BIT14 | BIT13 | BIT12, 10); /*@MU Retry Limit*/
+	odm_set_bb_reg(dm, R_0x14c0, BIT(7), 0); /*@Disable Tx MU-MIMO until sounding done*/
+	odm_set_bb_reg(dm, R_0x14c0, 0x3F, 0); /* @Clear validity of MU STAs */
+	odm_write_1byte(dm, 0x167c, 0x70); /*@MU-MIMO Option as default value*/
+	odm_write_2byte(dm, 0x1680, 0); /*@MU-MIMO Control as default value*/
 
 	/* Set MU NDPA rate & BW source */
-	/* 0x42C[30] = 1 (0: from Tx desc, 1: from 0x45F) */
-	u1b_tmp = odm_read_1byte(p_dm, 0x42C);
-	odm_write_1byte(p_dm, REG_TXBF_CTRL_8822B, (u1b_tmp | BIT(6)));
-	/* 0x45F[7:0] = 0x10 (rate=OFDM_6M, BW20) */
-	odm_write_1byte(p_dm, REG_NDPA_OPT_CTRL_8822B, 0x10);
+	/* @0x42C[30] = 1 (0: from Tx desc, 1: from 0x45F) */
+	u1b_tmp = odm_read_1byte(dm, 0x42C);
+	odm_write_1byte(dm, REG_TXBF_CTRL_8822B, (u1b_tmp | BIT(6)));
+	/* @0x45F[7:0] = 0x10 (rate=OFDM_6M, BW20) */
+	odm_write_1byte(dm, REG_NDPA_OPT_CTRL_8822B, 0x10);
 
 	/*Temp Settings*/
-	odm_set_bb_reg(p_dm, 0x6DC, 0x3F000000, 4); /*STA2's CSI rate is fixed at 6M*/
-	odm_set_bb_reg(p_dm, 0x1C94, MASKDWORD, 0xAFFFAFFF); /*Grouping bitmap parameters*/
+	odm_set_bb_reg(dm, R_0x6dc, 0x3F000000, 4); /*STA2's CSI rate is fixed at 6M*/
+	odm_set_bb_reg(dm, R_0x1c94, MASKDWORD, 0xAFFFAFFF); /*@Grouping bitmap parameters*/
 
-	/* Init HW variable */
-	p_beamforming_info->reg_mu_tx_ctrl = odm_read_4byte(p_dm, 0x14c0);
+	/* @Init HW variable */
+	beamforming_info->reg_mu_tx_ctrl = odm_read_4byte(dm, 0x14c0);
 
-	if (p_dm->rf_type == RF_2T2R) { /*2T2R*/
-		PHYDM_DBG(p_dm, DBG_TXBF, ("%s: rf_type is 2T2R\n", __func__));
-		config_phydm_trx_mode_8822b(p_dm, (enum bb_path)3, (enum bb_path)3, true);/*Tx2path*/
+	if (dm->rf_type == RF_2T2R) { /*@2T2R*/
+		PHYDM_DBG(dm, DBG_TXBF, "%s: rf_type is 2T2R\n", __func__);
+		config_phydm_trx_mode_8822b(dm, (enum bb_path)3, (enum bb_path)3, true);/*Tx2path*/
 	}
 
 #if (OMNIPEEK_SNIFFER_ENABLED == 1)
-	/* Config HW to receive packet on the user position from registry for sniffer mode. */
-	/* odm_set_bb_reg(p_dm, 0xB00, BIT(9), 1);*/ /* For A-cut only. RegB00[9] = 1 (enable PMAC Rx) */
-	odm_set_bb_reg(p_dm, 0xB54, BIT(30), 1); /* RegB54[30] = 1 (force user position) */
-	odm_set_bb_reg(p_dm, 0xB54, (BIT(29) | BIT28), adapter->MgntInfo.sniff_user_position); /* RegB54[29:28] = user position (0~3) */
-	PHYDM_DBG(p_dm, DBG_TXBF, ("Set adapter->MgntInfo.sniff_user_position=%#X\n", adapter->MgntInfo.sniff_user_position));
+	/* @Config HW to receive packet on the user position from registry for sniffer mode. */
+	/* odm_set_bb_reg(dm, R_0xb00, BIT(9), 1);*/ /* For A-cut only. RegB00[9] = 1 (enable PMAC Rx) */
+	odm_set_bb_reg(dm, R_0xb54, BIT(30), 1); /* RegB54[30] = 1 (force user position) */
+	odm_set_bb_reg(dm, R_0xb54, (BIT(29) | BIT28), adapter->MgntInfo.sniff_user_position); /* RegB54[29:28] = user position (0~3) */
+	PHYDM_DBG(dm, DBG_TXBF,
+		  "Set adapter->MgntInfo.sniff_user_position=%#X\n",
+		  adapter->MgntInfo.sniff_user_position);
 #endif
 }
 #endif
 
-void
-hal_txbf_8822b_enter(
-	void			*p_dm_void,
-	u8				bfer_bfee_idx
-)
+void hal_txbf_8822b_enter(
+	void *dm_void,
+	u8 bfer_bfee_idx)
 {
-	struct PHY_DM_STRUCT	*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	u8					i = 0;
-	u8					bfer_idx = (bfer_bfee_idx & 0xF0) >> 4;
-	u8					bfee_idx = (bfer_bfee_idx & 0xF);
-	u16					csi_param = 0;
-	struct _RT_BEAMFORMING_INFO		*p_beamforming_info = &p_dm->beamforming_info;
-	struct _RT_BEAMFORMEE_ENTRY	*p_beamformee_entry;
-	struct _RT_BEAMFORMER_ENTRY	*p_beamformer_entry;
-	u16					value16, sta_id = 0;
-	u8					nc_index = 0, nr_index = 0, grouping = 0, codebookinfo = 0, coefficientsize = 0;
-	u32					gid_valid, user_position_l, user_position_h;
-	u32					mu_reg[6] = {0x1684, 0x1686, 0x1688, 0x168a, 0x168c, 0x168e};
-	u8					u1b_tmp;
-	u32					u4b_tmp;
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	u8 i = 0;
+	u8 bfer_idx = (bfer_bfee_idx & 0xF0) >> 4;
+	u8 bfee_idx = (bfer_bfee_idx & 0xF);
+	u16 csi_param = 0;
+	struct _RT_BEAMFORMING_INFO *beamforming_info = &dm->beamforming_info;
+	struct _RT_BEAMFORMEE_ENTRY *p_beamformee_entry;
+	struct _RT_BEAMFORMER_ENTRY *beamformer_entry;
+	u16 value16, sta_id = 0;
+	u8 nc_index = 0, nr_index = 0, grouping = 0, codebookinfo = 0, coefficientsize = 0;
+	u32 gid_valid, user_position_l, user_position_h;
+	u32 mu_reg[6] = {0x1684, 0x1686, 0x1688, 0x168a, 0x168c, 0x168e};
+	u8 u1b_tmp;
+	u32 u4b_tmp;
 
 	RT_DISP(FBEAM, FBEAM_FUN, ("%s: bfer_bfee_idx=%d, bfer_idx=%d, bfee_idx=%d\n", __func__, bfer_bfee_idx, bfer_idx, bfee_idx));
 
 	/*************SU BFer Entry Init*************/
-	if ((p_beamforming_info->beamformer_su_cnt > 0) && (bfer_idx < BEAMFORMER_ENTRY_NUM)) {
-		p_beamformer_entry = &p_beamforming_info->beamformer_entry[bfer_idx];
-		p_beamformer_entry->is_mu_ap = false;
+	if (beamforming_info->beamformer_su_cnt > 0 && bfer_idx < BEAMFORMER_ENTRY_NUM) {
+		beamformer_entry = &beamforming_info->beamformer_entry[bfer_idx];
+		beamformer_entry->is_mu_ap = false;
 		/*Sounding protocol control*/
-		odm_write_1byte(p_dm, REG_SND_PTCL_CTRL_8822B, 0xDB);
-
+		odm_write_1byte(dm, REG_SND_PTCL_CTRL_8822B, 0xDB);
 
 		for (i = 0; i < MAX_BEAMFORMER_SU; i++) {
-			if ((p_beamforming_info->beamformer_su_reg_maping & BIT(i)) == 0) {
-				p_beamforming_info->beamformer_su_reg_maping |= BIT(i);
-				p_beamformer_entry->su_reg_index = i;
+			if ((beamforming_info->beamformer_su_reg_maping & BIT(i)) == 0) {
+				beamforming_info->beamformer_su_reg_maping |= BIT(i);
+				beamformer_entry->su_reg_index = i;
 				break;
 			}
 		}
 
-		/*MAC address/Partial AID of Beamformer*/
-		if (p_beamformer_entry->su_reg_index == 0) {
-			for (i = 0; i < 6 ; i++)
-				odm_write_1byte(p_dm, (REG_ASSOCIATED_BFMER0_INFO_8822B + i), p_beamformer_entry->mac_addr[i]);
+		/*@MAC address/Partial AID of Beamformer*/
+		if (beamformer_entry->su_reg_index == 0) {
+			for (i = 0; i < 6; i++)
+				odm_write_1byte(dm, (REG_ASSOCIATED_BFMER0_INFO_8822B + i), beamformer_entry->mac_addr[i]);
 		} else {
-			for (i = 0; i < 6 ; i++)
-				odm_write_1byte(p_dm, (REG_ASSOCIATED_BFMER1_INFO_8822B + i), p_beamformer_entry->mac_addr[i]);
+			for (i = 0; i < 6; i++)
+				odm_write_1byte(dm, (REG_ASSOCIATED_BFMER1_INFO_8822B + i), beamformer_entry->mac_addr[i]);
 		}
 
-		/*CSI report parameters of Beamformer*/
-		nc_index = hal_txbf_8822b_get_nrx(p_dm);	/*for 8814A nrx = 3(4 ant), min=0(1 ant)*/
-		nr_index = p_beamformer_entry->num_of_sounding_dim;	/*0x718[7] = 1 use Nsts, 0x718[7] = 0 use reg setting. as Bfee, we use Nsts, so nr_index don't care*/
+		/*@CSI report parameters of Beamformer*/
+		nc_index = hal_txbf_8822b_get_nrx(dm); /*@for 8814A nrx = 3(4 ant), min=0(1 ant)*/
+		nr_index = beamformer_entry->num_of_sounding_dim; /*@0x718[7] = 1 use Nsts, 0x718[7] = 0 use reg setting. as Bfee, we use Nsts, so nr_index don't care*/
 
 		grouping = 0;
 
-		/*for ac = 1, for n = 3*/
-		if (p_beamformer_entry->beamform_entry_cap & BEAMFORMEE_CAP_VHT_SU)
+		/*@for ac = 1, for n = 3*/
+		if (beamformer_entry->beamform_entry_cap & BEAMFORMEE_CAP_VHT_SU)
 			codebookinfo = 1;
-		else if (p_beamformer_entry->beamform_entry_cap & BEAMFORMEE_CAP_HT_EXPLICIT)
+		else if (beamformer_entry->beamform_entry_cap & BEAMFORMEE_CAP_HT_EXPLICIT)
 			codebookinfo = 3;
 
 		coefficientsize = 3;
@@ -393,28 +383,27 @@ hal_txbf_8822b_enter(
 		csi_param = (u16)((coefficientsize << 10) | (codebookinfo << 8) | (grouping << 6) | (nr_index << 3) | (nc_index));
 
 		if (bfer_idx == 0)
-			odm_write_2byte(p_dm, REG_TX_CSI_RPT_PARAM_BW20_8822B, csi_param);
+			odm_write_2byte(dm, REG_TX_CSI_RPT_PARAM_BW20_8822B, csi_param);
 		else
-			odm_write_2byte(p_dm, REG_TX_CSI_RPT_PARAM_BW20_8822B + 2, csi_param);
+			odm_write_2byte(dm, REG_TX_CSI_RPT_PARAM_BW20_8822B + 2, csi_param);
 		/*ndp_rx_standby_timer, 8814 need > 0x56, suggest from Dvaid*/
-		odm_write_1byte(p_dm, REG_SND_PTCL_CTRL_8822B + 3, 0x70);
-
+		odm_write_1byte(dm, REG_SND_PTCL_CTRL_8822B + 3, 0x70);
 	}
 
 	/*************SU BFee Entry Init*************/
-	if ((p_beamforming_info->beamformee_su_cnt > 0) && (bfee_idx < BEAMFORMEE_ENTRY_NUM)) {
-		p_beamformee_entry = &p_beamforming_info->beamformee_entry[bfee_idx];
+	if (beamforming_info->beamformee_su_cnt > 0 && bfee_idx < BEAMFORMEE_ENTRY_NUM) {
+		p_beamformee_entry = &beamforming_info->beamformee_entry[bfee_idx];
 		p_beamformee_entry->is_mu_sta = false;
-		hal_txbf_8822b_rf_mode(p_dm, p_beamforming_info, bfee_idx);
+		hal_txbf_8822b_rf_mode(dm, beamforming_info, bfee_idx);
 
-		if (phydm_acting_determine(p_dm, phydm_acting_as_ibss))
+		if (phydm_acting_determine(dm, phydm_acting_as_ibss))
 			sta_id = p_beamformee_entry->mac_id;
 		else
 			sta_id = p_beamformee_entry->p_aid;
 
 		for (i = 0; i < MAX_BEAMFORMEE_SU; i++) {
-			if ((p_beamforming_info->beamformee_su_reg_maping & BIT(i)) == 0) {
-				p_beamforming_info->beamformee_su_reg_maping |= BIT(i);
+			if ((beamforming_info->beamformee_su_reg_maping & BIT(i)) == 0) {
+				beamforming_info->beamformee_su_reg_maping |= BIT(i);
 				p_beamformee_entry->su_reg_index = i;
 				break;
 			}
@@ -422,83 +411,82 @@ hal_txbf_8822b_enter(
 
 		/*P_AID of Beamformee & enable NDPA transmission & enable NDPA interrupt*/
 		if (p_beamformee_entry->su_reg_index == 0) {
-			odm_write_2byte(p_dm, REG_TXBF_CTRL_8822B, sta_id);
-			odm_write_1byte(p_dm, REG_TXBF_CTRL_8822B + 3, odm_read_1byte(p_dm, REG_TXBF_CTRL_8822B + 3) | BIT(4) | BIT(6) | BIT(7));
+			odm_write_2byte(dm, REG_TXBF_CTRL_8822B, sta_id);
+			odm_write_1byte(dm, REG_TXBF_CTRL_8822B + 3, odm_read_1byte(dm, REG_TXBF_CTRL_8822B + 3) | BIT(4) | BIT(6) | BIT(7));
 		} else
-			odm_write_2byte(p_dm, REG_TXBF_CTRL_8822B + 2, sta_id | BIT(14) | BIT(15) | BIT(12));
+			odm_write_2byte(dm, REG_TXBF_CTRL_8822B + 2, sta_id | BIT(14) | BIT(15) | BIT(12));
 
-		/*CSI report parameters of Beamformee*/
+		/*@CSI report parameters of Beamformee*/
 		if (p_beamformee_entry->su_reg_index == 0) {
-			/*Get BIT24 & BIT25*/
-			u8	tmp = odm_read_1byte(p_dm, REG_ASSOCIATED_BFMEE_SEL_8822B + 3) & 0x3;
+			/*@Get BIT24 & BIT25*/
+			u8 tmp = odm_read_1byte(dm, REG_ASSOCIATED_BFMEE_SEL_8822B + 3) & 0x3;
 
-			odm_write_1byte(p_dm, REG_ASSOCIATED_BFMEE_SEL_8822B + 3, tmp | 0x60);
-			odm_write_2byte(p_dm, REG_ASSOCIATED_BFMEE_SEL_8822B, sta_id | BIT(9));
+			odm_write_1byte(dm, REG_ASSOCIATED_BFMEE_SEL_8822B + 3, tmp | 0x60);
+			odm_write_2byte(dm, REG_ASSOCIATED_BFMEE_SEL_8822B, sta_id | BIT(9));
 		} else
-			odm_write_2byte(p_dm, REG_ASSOCIATED_BFMEE_SEL_8822B + 2, sta_id | 0xE200);	/*Set BIT25*/
+			odm_write_2byte(dm, REG_ASSOCIATED_BFMEE_SEL_8822B + 2, sta_id | 0xE200); /*Set BIT25*/
 
-		phydm_beamforming_notify(p_dm);
+		phydm_beamforming_notify(dm);
 	}
 
 	/*************MU BFer Entry Init*************/
-	if ((p_beamforming_info->beamformer_mu_cnt > 0) && (bfer_idx < BEAMFORMER_ENTRY_NUM)) {
-		p_beamformer_entry = &p_beamforming_info->beamformer_entry[bfer_idx];
-		p_beamforming_info->mu_ap_index = bfer_idx;
-		p_beamformer_entry->is_mu_ap = true;
+	if (beamforming_info->beamformer_mu_cnt > 0 && bfer_idx < BEAMFORMER_ENTRY_NUM) {
+		beamformer_entry = &beamforming_info->beamformer_entry[bfer_idx];
+		beamforming_info->mu_ap_index = bfer_idx;
+		beamformer_entry->is_mu_ap = true;
 		for (i = 0; i < 8; i++)
-			p_beamformer_entry->gid_valid[i] = 0;
+			beamformer_entry->gid_valid[i] = 0;
 		for (i = 0; i < 16; i++)
-			p_beamformer_entry->user_position[i] = 0;
+			beamformer_entry->user_position[i] = 0;
 
 		/*Sounding protocol control*/
-		odm_write_1byte(p_dm, REG_SND_PTCL_CTRL_8822B, 0xDB);
+		odm_write_1byte(dm, REG_SND_PTCL_CTRL_8822B, 0xDB);
 
-		/* MAC address */
-		for (i = 0; i < 6 ; i++)
-			odm_write_1byte(p_dm, (REG_ASSOCIATED_BFMER0_INFO_8822B + i), p_beamformer_entry->mac_addr[i]);
+		/* @MAC address */
+		for (i = 0; i < 6; i++)
+			odm_write_1byte(dm, (REG_ASSOCIATED_BFMER0_INFO_8822B + i), beamformer_entry->mac_addr[i]);
 
 		/* Set partial AID */
-		odm_write_2byte(p_dm, (REG_ASSOCIATED_BFMER0_INFO_8822B + 6), p_beamformer_entry->p_aid);
+		odm_write_2byte(dm, (REG_ASSOCIATED_BFMER0_INFO_8822B + 6), beamformer_entry->p_aid);
 
-		/* Fill our AID to 0x1680[11:0] and [13:12] = 2b'00, BF report segment select to 3895 bytes*/
-		u1b_tmp = odm_read_1byte(p_dm, 0x1680);
-		u1b_tmp = (p_beamformer_entry->p_aid) & 0xFFF;
-		odm_write_1byte(p_dm, 0x1680, u1b_tmp);
+		/* @Fill our AID to 0x1680[11:0] and [13:12] = 2b'00, BF report segment select to 3895 bytes*/
+		u1b_tmp = odm_read_1byte(dm, 0x1680);
+		u1b_tmp = (beamformer_entry->p_aid) & 0xFFF;
+		odm_write_1byte(dm, 0x1680, u1b_tmp);
 
 		/* Set 80us for leaving ndp_rx_standby_state */
-		odm_write_1byte(p_dm, 0x71B, 0x50);
+		odm_write_1byte(dm, 0x71B, 0x50);
 
 		/* Set 0x6A0[14] = 1 to accept action_no_ack */
-		u1b_tmp = odm_read_1byte(p_dm, REG_RXFLTMAP0_8822B + 1);
+		u1b_tmp = odm_read_1byte(dm, REG_RXFLTMAP0_8822B + 1);
 		u1b_tmp |= 0x40;
-		odm_write_1byte(p_dm, REG_RXFLTMAP0_8822B + 1, u1b_tmp);
+		odm_write_1byte(dm, REG_RXFLTMAP0_8822B + 1, u1b_tmp);
 		/* Set 0x6A2[5:4] = 1 to NDPA and BF report poll */
-		u1b_tmp = odm_read_1byte(p_dm, REG_RXFLTMAP1_8822B);
+		u1b_tmp = odm_read_1byte(dm, REG_RXFLTMAP1_8822B);
 		u1b_tmp |= 0x30;
-		odm_write_1byte(p_dm, REG_RXFLTMAP1_8822B, u1b_tmp);
+		odm_write_1byte(dm, REG_RXFLTMAP1_8822B, u1b_tmp);
 
-		/*CSI report parameters of Beamformer*/
-		nc_index = hal_txbf_8822b_get_nrx(p_dm);	/* Depend on RF type */
-		nr_index = 1;	/*0x718[7] = 1 use Nsts, 0x718[7] = 0 use reg setting. as Bfee, we use Nsts, so nr_index don't care*/
+		/*@CSI report parameters of Beamformer*/
+		nc_index = hal_txbf_8822b_get_nrx(dm); /* @Depend on RF type */
+		nr_index = 1; /*@0x718[7] = 1 use Nsts, 0x718[7] = 0 use reg setting. as Bfee, we use Nsts, so nr_index don't care*/
 		grouping = 0; /*no grouping*/
-		codebookinfo = 1; /*7 bit for psi, 9 bit for phi*/
+		codebookinfo = 1; /*@7 bit for psi, 9 bit for phi*/
 		coefficientsize = 0; /*This is nothing really matter*/
 		csi_param = (u16)((coefficientsize << 10) | (codebookinfo << 8) | (grouping << 6) | (nr_index << 3) | (nc_index));
-		odm_write_2byte(p_dm, 0x6F4, csi_param);
-
-		/*for B-cut*/
-		odm_set_bb_reg(p_dm, 0x6A0, BIT(20), 0);
-		odm_set_bb_reg(p_dm, 0x688, BIT(20), 0);
+		odm_write_2byte(dm, 0x6F4, csi_param);
 
+		/*@for B-cut*/
+		odm_set_bb_reg(dm, R_0x6a0, BIT(20), 0);
+		odm_set_bb_reg(dm, R_0x688, BIT(20), 0);
 	}
 
 	/*************MU BFee Entry Init*************/
-	if ((p_beamforming_info->beamformee_mu_cnt > 0) && (bfee_idx < BEAMFORMEE_ENTRY_NUM)) {
-		p_beamformee_entry = &p_beamforming_info->beamformee_entry[bfee_idx];
+	if (beamforming_info->beamformee_mu_cnt > 0 && bfee_idx < BEAMFORMEE_ENTRY_NUM) {
+		p_beamformee_entry = &beamforming_info->beamformee_entry[bfee_idx];
 		p_beamformee_entry->is_mu_sta = true;
 		for (i = 0; i < MAX_BEAMFORMEE_MU; i++) {
-			if ((p_beamforming_info->beamformee_mu_reg_maping & BIT(i)) == 0) {
-				p_beamforming_info->beamformee_mu_reg_maping |= BIT(i);
+			if ((beamforming_info->beamformee_mu_reg_maping & BIT(i)) == 0) {
+				beamforming_info->beamformee_mu_reg_maping |= BIT(i);
 				p_beamformee_entry->mu_reg_index = i;
 				break;
 			}
@@ -561,173 +549,170 @@ hal_txbf_8822b_enter(
 		}
 
 		/*Sounding protocol control*/
-		odm_write_1byte(p_dm, REG_SND_PTCL_CTRL_8822B, 0xDB);
+		odm_write_1byte(dm, REG_SND_PTCL_CTRL_8822B, 0xDB);
 
 		/*select MU STA table*/
-		p_beamforming_info->reg_mu_tx_ctrl &= ~(BIT(8) | BIT(9) | BIT(10));
-		p_beamforming_info->reg_mu_tx_ctrl |= (p_beamformee_entry->mu_reg_index << 8) & (BIT(8) | BIT(9) | BIT(10));
-		odm_write_4byte(p_dm, 0x14c0, p_beamforming_info->reg_mu_tx_ctrl);
+		beamforming_info->reg_mu_tx_ctrl &= ~(BIT(8) | BIT(9) | BIT(10));
+		beamforming_info->reg_mu_tx_ctrl |= (p_beamformee_entry->mu_reg_index << 8) & (BIT(8) | BIT(9) | BIT(10));
+		odm_write_4byte(dm, 0x14c0, beamforming_info->reg_mu_tx_ctrl);
 
-		odm_set_bb_reg(p_dm, 0x14c4, MASKDWORD, 0); /*Reset gid_valid table*/
-		odm_set_bb_reg(p_dm, 0x14c8, MASKDWORD, user_position_l);
-		odm_set_bb_reg(p_dm, 0x14cc, MASKDWORD, user_position_h);
+		odm_set_bb_reg(dm, R_0x14c4, MASKDWORD, 0); /*Reset gid_valid table*/
+		odm_set_bb_reg(dm, R_0x14c8, MASKDWORD, user_position_l);
+		odm_set_bb_reg(dm, R_0x14cc, MASKDWORD, user_position_h);
 
 		/*set validity of MU STAs*/
-		p_beamforming_info->reg_mu_tx_ctrl &= 0xFFFFFFC0;
-		p_beamforming_info->reg_mu_tx_ctrl |= p_beamforming_info->beamformee_mu_reg_maping & 0x3F;
-		odm_write_4byte(p_dm, 0x14c0, p_beamforming_info->reg_mu_tx_ctrl);
-
-		PHYDM_DBG(p_dm, DBG_TXBF, ("@%s, reg_mu_tx_ctrl = 0x%x, user_position_l = 0x%x, user_position_h = 0x%x\n",
-			__func__, p_beamforming_info->reg_mu_tx_ctrl, user_position_l, user_position_h));
-
-		value16 = odm_read_2byte(p_dm, mu_reg[p_beamformee_entry->mu_reg_index]);
-		value16 &= 0xFE00; /*Clear PAID*/
-		value16 |= BIT(9); /*Enable MU BFee*/
+		beamforming_info->reg_mu_tx_ctrl &= 0xFFFFFFC0;
+		beamforming_info->reg_mu_tx_ctrl |= beamforming_info->beamformee_mu_reg_maping & 0x3F;
+		odm_write_4byte(dm, 0x14c0, beamforming_info->reg_mu_tx_ctrl);
+
+		PHYDM_DBG(dm, DBG_TXBF,
+			  "@%s, reg_mu_tx_ctrl = 0x%x, user_position_l = 0x%x, user_position_h = 0x%x\n",
+			  __func__, beamforming_info->reg_mu_tx_ctrl,
+			  user_position_l, user_position_h);
+
+		value16 = odm_read_2byte(dm, mu_reg[p_beamformee_entry->mu_reg_index]);
+		value16 &= 0xFE00; /*@Clear PAID*/
+		value16 |= BIT(9); /*@Enable MU BFee*/
 		value16 |= p_beamformee_entry->p_aid;
-		odm_write_2byte(p_dm, mu_reg[p_beamformee_entry->mu_reg_index], value16);
+		odm_write_2byte(dm, mu_reg[p_beamformee_entry->mu_reg_index], value16);
 
-		/* 0x42C[30] = 1 (0: from Tx desc, 1: from 0x45F) */
-		u1b_tmp = odm_read_1byte(p_dm, REG_TXBF_CTRL_8822B + 3);
+		/* @0x42C[30] = 1 (0: from Tx desc, 1: from 0x45F) */
+		u1b_tmp = odm_read_1byte(dm, REG_TXBF_CTRL_8822B + 3);
 		u1b_tmp |= 0xD0; /* Set bit 28, 30, 31 to 3b'111*/
-		odm_write_1byte(p_dm, REG_TXBF_CTRL_8822B + 3, u1b_tmp);
+		odm_write_1byte(dm, REG_TXBF_CTRL_8822B + 3, u1b_tmp);
 		/* Set NDPA to 6M*/
-		odm_write_1byte(p_dm, REG_NDPA_RATE_8822B, 0x4);
+		odm_write_1byte(dm, REG_NDPA_RATE_8822B, 0x4);
 
-		u1b_tmp = odm_read_1byte(p_dm, REG_NDPA_OPT_CTRL_8822B);
-		u1b_tmp &= 0xFC; /* Clear bit 0, 1*/
-		odm_write_1byte(p_dm, REG_NDPA_OPT_CTRL_8822B, u1b_tmp);
+		u1b_tmp = odm_read_1byte(dm, REG_NDPA_OPT_CTRL_8822B);
+		u1b_tmp &= 0xFC; /* @Clear bit 0, 1*/
+		odm_write_1byte(dm, REG_NDPA_OPT_CTRL_8822B, u1b_tmp);
 
-		u4b_tmp = odm_read_4byte(p_dm, REG_SND_PTCL_CTRL_8822B);
+		u4b_tmp = odm_read_4byte(dm, REG_SND_PTCL_CTRL_8822B);
 		u4b_tmp = ((u4b_tmp & 0xFF0000FF) | 0x020200); /* Set [23:8] to 0x0202*/
-		odm_write_4byte(p_dm, REG_SND_PTCL_CTRL_8822B, u4b_tmp);
+		odm_write_4byte(dm, REG_SND_PTCL_CTRL_8822B, u4b_tmp);
 
 		/* Set 0x6A0[14] = 1 to accept action_no_ack */
-		u1b_tmp = odm_read_1byte(p_dm, REG_RXFLTMAP0_8822B + 1);
+		u1b_tmp = odm_read_1byte(dm, REG_RXFLTMAP0_8822B + 1);
 		u1b_tmp |= 0x40;
-		odm_write_1byte(p_dm, REG_RXFLTMAP0_8822B + 1, u1b_tmp);
-		/* End of MAC registers setting */
+		odm_write_1byte(dm, REG_RXFLTMAP0_8822B + 1, u1b_tmp);
+		/* @End of MAC registers setting */
 
-		hal_txbf_8822b_rf_mode(p_dm, p_beamforming_info, bfee_idx);
+		hal_txbf_8822b_rf_mode(dm, beamforming_info, bfee_idx);
 #if (SUPPORT_MU_BF == 1)
 		/*Special for plugfest*/
 		delay_ms(50); /* wait for 4-way handshake ending*/
-		send_sw_vht_gid_mgnt_frame(p_dm, p_beamformee_entry->mac_addr, bfee_idx);
+		send_sw_vht_gid_mgnt_frame(dm, p_beamformee_entry->mac_addr, bfee_idx);
 #endif
 
-		phydm_beamforming_notify(p_dm);
+		phydm_beamforming_notify(dm);
 #if 1
 		{
 			u32 ctrl_info_offset, index;
 			/*Set Ctrl Info*/
-			odm_write_2byte(p_dm, 0x140, 0x660);
+			odm_write_2byte(dm, 0x140, 0x660);
 			ctrl_info_offset = 0x8000 + 32 * p_beamformee_entry->mac_id;
 			/*Reset Ctrl Info*/
 			for (index = 0; index < 8; index++)
-				odm_write_4byte(p_dm, ctrl_info_offset + index * 4, 0);
+				odm_write_4byte(dm, ctrl_info_offset + index * 4, 0);
 
-			odm_write_4byte(p_dm, ctrl_info_offset, (p_beamformee_entry->mu_reg_index + 1) << 16);
-			odm_write_1byte(p_dm, 0x81, 0x80); /*RPTBUF ready*/
+			odm_write_4byte(dm, ctrl_info_offset, (p_beamformee_entry->mu_reg_index + 1) << 16);
+			odm_write_1byte(dm, 0x81, 0x80); /*RPTBUF ready*/
 
-			PHYDM_DBG(p_dm, DBG_TXBF, ("@%s, mac_id = %d, ctrl_info_offset = 0x%x, mu_reg_index = %x\n",
-				__func__, p_beamformee_entry->mac_id, ctrl_info_offset, p_beamformee_entry->mu_reg_index));
+			PHYDM_DBG(dm, DBG_TXBF,
+				  "@%s, mac_id = %d, ctrl_info_offset = 0x%x, mu_reg_index = %x\n",
+				  __func__, p_beamformee_entry->mac_id,
+				  ctrl_info_offset,
+				  p_beamformee_entry->mu_reg_index);
 		}
 #endif
 	}
-
 }
 
-
-void
-hal_txbf_8822b_leave(
-	void			*p_dm_void,
-	u8				idx
-)
+void hal_txbf_8822b_leave(
+	void *dm_void,
+	u8 idx)
 {
-	struct PHY_DM_STRUCT	*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	struct _RT_BEAMFORMING_INFO	*p_beamforming_info = &p_dm->beamforming_info;
-	struct _RT_BEAMFORMER_ENTRY	*p_beamformer_entry;
-	struct _RT_BEAMFORMEE_ENTRY	*p_beamformee_entry;
-	u32					mu_reg[6] = {0x1684, 0x1686, 0x1688, 0x168a, 0x168c, 0x168e};
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct _RT_BEAMFORMING_INFO *beamforming_info = &dm->beamforming_info;
+	struct _RT_BEAMFORMER_ENTRY *beamformer_entry;
+	struct _RT_BEAMFORMEE_ENTRY *p_beamformee_entry;
+	u32 mu_reg[6] = {0x1684, 0x1686, 0x1688, 0x168a, 0x168c, 0x168e};
 
 	if (idx < BEAMFORMER_ENTRY_NUM) {
-		p_beamformer_entry = &p_beamforming_info->beamformer_entry[idx];
-		p_beamformee_entry = &p_beamforming_info->beamformee_entry[idx];
+		beamformer_entry = &beamforming_info->beamformer_entry[idx];
+		p_beamformee_entry = &beamforming_info->beamformee_entry[idx];
 	} else
 		return;
 
-	/*Clear P_AID of Beamformee*/
-	/*Clear MAC address of Beamformer*/
-	/*Clear Associated Bfmee Sel*/
-
-	if (p_beamformer_entry->beamform_entry_cap == BEAMFORMING_CAP_NONE) {
-		odm_write_1byte(p_dm, REG_SND_PTCL_CTRL_8822B, 0xD8);
-		if (p_beamformer_entry->is_mu_ap == 0) { /*SU BFer */
-			if (p_beamformer_entry->su_reg_index == 0) {
-				odm_write_4byte(p_dm, REG_ASSOCIATED_BFMER0_INFO_8822B, 0);
-				odm_write_2byte(p_dm, REG_ASSOCIATED_BFMER0_INFO_8822B + 4, 0);
-				odm_write_2byte(p_dm, REG_TX_CSI_RPT_PARAM_BW20_8822B, 0);
+	/*@Clear P_AID of Beamformee*/
+	/*@Clear MAC address of Beamformer*/
+	/*@Clear Associated Bfmee Sel*/
+
+	if (beamformer_entry->beamform_entry_cap == BEAMFORMING_CAP_NONE) {
+		odm_write_1byte(dm, REG_SND_PTCL_CTRL_8822B, 0xD8);
+		if (beamformer_entry->is_mu_ap == 0) { /*SU BFer */
+			if (beamformer_entry->su_reg_index == 0) {
+				odm_write_4byte(dm, REG_ASSOCIATED_BFMER0_INFO_8822B, 0);
+				odm_write_2byte(dm, REG_ASSOCIATED_BFMER0_INFO_8822B + 4, 0);
+				odm_write_2byte(dm, REG_TX_CSI_RPT_PARAM_BW20_8822B, 0);
 			} else {
-				odm_write_4byte(p_dm, REG_ASSOCIATED_BFMER1_INFO_8822B, 0);
-				odm_write_2byte(p_dm, REG_ASSOCIATED_BFMER1_INFO_8822B + 4, 0);
-				odm_write_2byte(p_dm, REG_TX_CSI_RPT_PARAM_BW20_8822B + 2, 0);
+				odm_write_4byte(dm, REG_ASSOCIATED_BFMER1_INFO_8822B, 0);
+				odm_write_2byte(dm, REG_ASSOCIATED_BFMER1_INFO_8822B + 4, 0);
+				odm_write_2byte(dm, REG_TX_CSI_RPT_PARAM_BW20_8822B + 2, 0);
 			}
-			p_beamforming_info->beamformer_su_reg_maping &= ~(BIT(p_beamformer_entry->su_reg_index));
-			p_beamformer_entry->su_reg_index = 0xFF;
-		} else { /*MU BFer */
+			beamforming_info->beamformer_su_reg_maping &= ~(BIT(beamformer_entry->su_reg_index));
+			beamformer_entry->su_reg_index = 0xFF;
+		} else { /*@MU BFer */
 			/*set validity of MU STA0 and MU STA1*/
-			p_beamforming_info->reg_mu_tx_ctrl &= 0xFFFFFFC0;
-			odm_write_4byte(p_dm, 0x14c0, p_beamforming_info->reg_mu_tx_ctrl);
+			beamforming_info->reg_mu_tx_ctrl &= 0xFFFFFFC0;
+			odm_write_4byte(dm, 0x14c0, beamforming_info->reg_mu_tx_ctrl);
 
-			odm_memory_set(p_dm, p_beamformer_entry->gid_valid, 0, 8);
-			odm_memory_set(p_dm, p_beamformer_entry->user_position, 0, 16);
-			p_beamformer_entry->is_mu_ap = false;
+			odm_memory_set(dm, beamformer_entry->gid_valid, 0, 8);
+			odm_memory_set(dm, beamformer_entry->user_position, 0, 16);
+			beamformer_entry->is_mu_ap = false;
 		}
 	}
 
 	if (p_beamformee_entry->beamform_entry_cap == BEAMFORMING_CAP_NONE) {
-		hal_txbf_8822b_rf_mode(p_dm, p_beamforming_info, idx);
+		hal_txbf_8822b_rf_mode(dm, beamforming_info, idx);
 		if (p_beamformee_entry->is_mu_sta == 0) { /*SU BFee*/
 			if (p_beamformee_entry->su_reg_index == 0) {
-				odm_write_2byte(p_dm, REG_TXBF_CTRL_8822B, 0x0);
-				odm_write_1byte(p_dm, REG_TXBF_CTRL_8822B + 3, odm_read_1byte(p_dm, REG_TXBF_CTRL_8822B + 3) | BIT(4) | BIT(6) | BIT(7));
-				odm_write_2byte(p_dm, REG_ASSOCIATED_BFMEE_SEL_8822B, 0);
+				odm_write_2byte(dm, REG_TXBF_CTRL_8822B, 0x0);
+				odm_write_1byte(dm, REG_TXBF_CTRL_8822B + 3, odm_read_1byte(dm, REG_TXBF_CTRL_8822B + 3) | BIT(4) | BIT(6) | BIT(7));
+				odm_write_2byte(dm, REG_ASSOCIATED_BFMEE_SEL_8822B, 0);
 			} else {
-				odm_write_2byte(p_dm, REG_TXBF_CTRL_8822B + 2, 0x0 | BIT(14) | BIT(15) | BIT(12));
+				odm_write_2byte(dm, REG_TXBF_CTRL_8822B + 2, 0x0 | BIT(14) | BIT(15) | BIT(12));
 
-				odm_write_2byte(p_dm, REG_ASSOCIATED_BFMEE_SEL_8822B + 2,
-					odm_read_2byte(p_dm, REG_ASSOCIATED_BFMEE_SEL_8822B + 2) & 0x60);
+				odm_write_2byte(dm, REG_ASSOCIATED_BFMEE_SEL_8822B + 2,
+						odm_read_2byte(dm, REG_ASSOCIATED_BFMEE_SEL_8822B + 2) & 0x60);
 			}
-			p_beamforming_info->beamformee_su_reg_maping &= ~(BIT(p_beamformee_entry->su_reg_index));
+			beamforming_info->beamformee_su_reg_maping &= ~(BIT(p_beamformee_entry->su_reg_index));
 			p_beamformee_entry->su_reg_index = 0xFF;
-		} else { /*MU BFee */
-			/*Disable sending NDPA & BF-rpt-poll to this BFee*/
-			odm_write_2byte(p_dm, mu_reg[p_beamformee_entry->mu_reg_index], 0);
+		} else { /*@MU BFee */
+			/*@Disable sending NDPA & BF-rpt-poll to this BFee*/
+			odm_write_2byte(dm, mu_reg[p_beamformee_entry->mu_reg_index], 0);
 			/*set validity of MU STA*/
-			p_beamforming_info->reg_mu_tx_ctrl &= ~(BIT(p_beamformee_entry->mu_reg_index));
-			odm_write_4byte(p_dm, 0x14c0, p_beamforming_info->reg_mu_tx_ctrl);
-
+			beamforming_info->reg_mu_tx_ctrl &= ~(BIT(p_beamformee_entry->mu_reg_index));
+			odm_write_4byte(dm, 0x14c0, beamforming_info->reg_mu_tx_ctrl);
 
 			p_beamformee_entry->is_mu_sta = false;
-			p_beamforming_info->beamformee_mu_reg_maping &= ~(BIT(p_beamformee_entry->mu_reg_index));
+			beamforming_info->beamformee_mu_reg_maping &= ~(BIT(p_beamformee_entry->mu_reg_index));
 			p_beamformee_entry->mu_reg_index = 0xFF;
 		}
 	}
 }
 
-
 /***********SU & MU BFee Entry Only when souding done****************/
-void
-hal_txbf_8822b_status(
-	void			*p_dm_void,
-	u8				beamform_idx
-)
+void hal_txbf_8822b_status(
+	void *dm_void,
+	u8 beamform_idx)
 {
-	struct PHY_DM_STRUCT	*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	u16					beam_ctrl_val, tmp_val;
-	u32					beam_ctrl_reg;
-	struct _RT_BEAMFORMING_INFO	*p_beamforming_info = &p_dm->beamforming_info;
-	struct _RT_BEAMFORMEE_ENTRY	*p_beamform_entry;
-	boolean	is_mu_sounding = p_beamforming_info->is_mu_sounding, is_bitmap_ready = false;
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	u16 beam_ctrl_val, tmp_val;
+	u32 beam_ctrl_reg;
+	struct _RT_BEAMFORMING_INFO *beamforming_info = &dm->beamforming_info;
+	struct _RT_BEAMFORMEE_ENTRY *beamform_entry;
+	boolean is_mu_sounding = beamforming_info->is_mu_sounding, is_bitmap_ready = false;
 	u16 bitmap;
 	u8 idx, gid, i;
 	u8 id1, id0;
@@ -736,82 +721,92 @@ hal_txbf_8822b_status(
 	boolean is_sounding_success[6] = {false};
 
 	if (beamform_idx < BEAMFORMEE_ENTRY_NUM)
-		p_beamform_entry = &p_beamforming_info->beamformee_entry[beamform_idx];
+		beamform_entry = &beamforming_info->beamformee_entry[beamform_idx];
 	else
 		return;
 
 	/*SU sounding done */
 	if (is_mu_sounding == false) {
-
-		if (phydm_acting_determine(p_dm, phydm_acting_as_ibss))
-			beam_ctrl_val = p_beamform_entry->mac_id;
+		if (phydm_acting_determine(dm, phydm_acting_as_ibss))
+			beam_ctrl_val = beamform_entry->mac_id;
 		else
-			beam_ctrl_val = p_beamform_entry->p_aid;
+			beam_ctrl_val = beamform_entry->p_aid;
 
-		PHYDM_DBG(p_dm, DBG_TXBF, ("@%s, beamform_entry.beamform_entry_state = %d", __func__, p_beamform_entry->beamform_entry_state));
+		PHYDM_DBG(dm, DBG_TXBF,
+			  "@%s, beamform_entry.beamform_entry_state = %d",
+			  __func__, beamform_entry->beamform_entry_state);
 
-		if (p_beamform_entry->su_reg_index == 0)
+		if (beamform_entry->su_reg_index == 0)
 			beam_ctrl_reg = REG_TXBF_CTRL_8822B;
 		else {
 			beam_ctrl_reg = REG_TXBF_CTRL_8822B + 2;
 			beam_ctrl_val |= BIT(12) | BIT(14) | BIT(15);
 		}
 
-		if (p_beamform_entry->beamform_entry_state == BEAMFORMING_ENTRY_STATE_PROGRESSED) {
-			if (p_beamform_entry->sound_bw == CHANNEL_WIDTH_20)
+		if (beamform_entry->beamform_entry_state == BEAMFORMING_ENTRY_STATE_PROGRESSED) {
+			if (beamform_entry->sound_bw == CHANNEL_WIDTH_20)
 				beam_ctrl_val |= BIT(9);
-			else if (p_beamform_entry->sound_bw == CHANNEL_WIDTH_40)
+			else if (beamform_entry->sound_bw == CHANNEL_WIDTH_40)
 				beam_ctrl_val |= (BIT(9) | BIT(10));
-			else if (p_beamform_entry->sound_bw == CHANNEL_WIDTH_80)
+			else if (beamform_entry->sound_bw == CHANNEL_WIDTH_80)
 				beam_ctrl_val |= (BIT(9) | BIT(10) | BIT(11));
 		} else {
-			PHYDM_DBG(p_dm, DBG_TXBF, ("@%s, Don't apply Vmatrix",  __func__));
+			PHYDM_DBG(dm, DBG_TXBF, "@%s, Don't apply Vmatrix",
+				  __func__);
 			beam_ctrl_val &= ~(BIT(9) | BIT(10) | BIT(11));
 		}
 
-		odm_write_2byte(p_dm, beam_ctrl_reg, beam_ctrl_val);
-		/*disable NDP packet use beamforming */
-		tmp_val = odm_read_2byte(p_dm, REG_TXBF_CTRL_8822B);
-		odm_write_2byte(p_dm, REG_TXBF_CTRL_8822B, tmp_val | BIT(15));
+		odm_write_2byte(dm, beam_ctrl_reg, beam_ctrl_val);
+		/*@disable NDP packet use beamforming */
+		tmp_val = odm_read_2byte(dm, REG_TXBF_CTRL_8822B);
+		odm_write_2byte(dm, REG_TXBF_CTRL_8822B, tmp_val | BIT(15));
 	} else {
-		PHYDM_DBG(p_dm, DBG_TXBF, ("@%s, MU Sounding Done\n",  __func__));
-		/*MU sounding done */
-		if (1) { /* (p_beamform_entry->beamform_entry_state == BEAMFORMING_ENTRY_STATE_PROGRESSED) { */
-			PHYDM_DBG(p_dm, DBG_TXBF, ("@%s, BEAMFORMING_ENTRY_STATE_PROGRESSED\n",  __func__));
-
-			value32 = odm_get_bb_reg(p_dm, 0x1684, MASKDWORD);
+		PHYDM_DBG(dm, DBG_TXBF, "@%s, MU Sounding Done\n", __func__);
+		/*@MU sounding done */
+		if (1) { /* @(beamform_entry->beamform_entry_state == BEAMFORMING_ENTRY_STATE_PROGRESSED) { */
+			PHYDM_DBG(dm, DBG_TXBF,
+				  "@%s, BEAMFORMING_ENTRY_STATE_PROGRESSED\n",
+				  __func__);
+
+			value32 = odm_get_bb_reg(dm, R_0x1684, MASKDWORD);
 			is_sounding_success[0] = (value32 & BIT(10)) ? 1 : 0;
 			is_sounding_success[1] = (value32 & BIT(26)) ? 1 : 0;
-			value32 = odm_get_bb_reg(p_dm, 0x1688, MASKDWORD);
+			value32 = odm_get_bb_reg(dm, R_0x1688, MASKDWORD);
 			is_sounding_success[2] = (value32 & BIT(10)) ? 1 : 0;
 			is_sounding_success[3] = (value32 & BIT(26)) ? 1 : 0;
-			value32 = odm_get_bb_reg(p_dm, 0x168C, MASKDWORD);
+			value32 = odm_get_bb_reg(dm, R_0x168c, MASKDWORD);
 			is_sounding_success[4] = (value32 & BIT(10)) ? 1 : 0;
 			is_sounding_success[5] = (value32 & BIT(26)) ? 1 : 0;
 
-			PHYDM_DBG(p_dm, DBG_TXBF, ("@%s, is_sounding_success STA1:%d,  STA2:%d, STA3:%d, STA4:%d, STA5:%d, STA6:%d\n",
-				__func__, is_sounding_success[0], is_sounding_success[1], is_sounding_success[2], is_sounding_success[3], is_sounding_success[4], is_sounding_success[5]));
+			PHYDM_DBG(dm, DBG_TXBF,
+				  "@%s, is_sounding_success STA1:%d,  STA2:%d, STA3:%d, STA4:%d, STA5:%d, STA6:%d\n",
+				  __func__, is_sounding_success[0],
+				  is_sounding_success[1],
+				  is_sounding_success[2],
+				  is_sounding_success[3],
+				  is_sounding_success[4],
+				  is_sounding_success[5]);
 
-			value32 = odm_get_bb_reg(p_dm, 0xF4C, 0xFFFF0000);
-			/* odm_set_bb_reg(p_dm, 0x19E0, MASKHWORD, 0xFFFF);Let MAC ignore bitmap */
+			value32 = odm_get_bb_reg(dm, R_0xf4c, 0xFFFF0000);
+			/* odm_set_bb_reg(dm, R_0x19e0, MASKHWORD, 0xFFFF);Let MAC ignore bitmap */
 
 			is_bitmap_ready = (boolean)((value32 & BIT(15)) >> 15);
 			bitmap = (u16)(value32 & 0x3FFF);
 
 			for (idx = 0; idx < 15; idx++) {
-				if (idx < 5) {/*bit0~4*/
+				if (idx < 5) { /*@bit0~4*/
 					id0 = 0;
 					id1 = (u8)(idx + 1);
-				} else if (idx < 9) { /*bit5~8*/
+				} else if (idx < 9) { /*@bit5~8*/
 					id0 = 1;
 					id1 = (u8)(idx - 3);
-				} else if (idx < 12) { /*bit9~11*/
+				} else if (idx < 12) { /*@bit9~11*/
 					id0 = 2;
 					id1 = (u8)(idx - 6);
-				} else if (idx < 14) { /*bit12~13*/
+				} else if (idx < 14) { /*@bit12~13*/
 					id0 = 3;
 					id1 = (u8)(idx - 8);
-				} else { /*bit14*/
+				} else { /*@bit14*/
 					id0 = 4;
 					id1 = (u8)(idx - 9);
 				}
@@ -837,108 +832,105 @@ hal_txbf_8822b_status(
 			}
 
 			for (i = 0; i < BEAMFORMEE_ENTRY_NUM; i++) {
-				p_beamform_entry = &p_beamforming_info->beamformee_entry[i];
-				if ((p_beamform_entry->is_mu_sta) && (p_beamform_entry->mu_reg_index < 6)) {
-					value32 = gid_valid[p_beamform_entry->mu_reg_index];
+				beamform_entry = &beamforming_info->beamformee_entry[i];
+				if (beamform_entry->is_mu_sta && beamform_entry->mu_reg_index < 6) {
+					value32 = gid_valid[beamform_entry->mu_reg_index];
 					for (idx = 0; idx < 4; idx++) {
-						p_beamform_entry->gid_valid[idx] = (u8)(value32 & 0xFF);
+						beamform_entry->gid_valid[idx] = (u8)(value32 & 0xFF);
 						value32 = (value32 >> 8);
 					}
 				}
 			}
 
 			for (idx = 0; idx < 6; idx++) {
-				p_beamforming_info->reg_mu_tx_ctrl &= ~(BIT(8) | BIT(9) | BIT(10));
-				p_beamforming_info->reg_mu_tx_ctrl |= ((idx << 8) & (BIT(8) | BIT(9) | BIT(10)));
-				odm_write_4byte(p_dm, 0x14c0, p_beamforming_info->reg_mu_tx_ctrl);
-				odm_set_mac_reg(p_dm, 0x14C4, MASKDWORD, gid_valid[idx]); /*set MU STA gid valid table*/
+				beamforming_info->reg_mu_tx_ctrl &= ~(BIT(8) | BIT(9) | BIT(10));
+				beamforming_info->reg_mu_tx_ctrl |= ((idx << 8) & (BIT(8) | BIT(9) | BIT(10)));
+				odm_write_4byte(dm, 0x14c0, beamforming_info->reg_mu_tx_ctrl);
+				odm_set_mac_reg(dm, R_0x14c4, MASKDWORD, gid_valid[idx]); /*set MU STA gid valid table*/
 			}
 
-			/*Enable TxMU PPDU*/
-			if (p_beamforming_info->dbg_disable_mu_tx == false)
-				p_beamforming_info->reg_mu_tx_ctrl |= BIT(7);
+			/*@Enable TxMU PPDU*/
+			if (beamforming_info->dbg_disable_mu_tx == false)
+				beamforming_info->reg_mu_tx_ctrl |= BIT(7);
 			else
-				p_beamforming_info->reg_mu_tx_ctrl &= ~BIT(7);
-			odm_write_4byte(p_dm, 0x14c0, p_beamforming_info->reg_mu_tx_ctrl);
+				beamforming_info->reg_mu_tx_ctrl &= ~BIT(7);
+			odm_write_4byte(dm, 0x14c0, beamforming_info->reg_mu_tx_ctrl);
 		}
 	}
 }
 
 /*Only used for MU BFer Entry when get GID management frame (self is as MU STA)*/
-void
-hal_txbf_8822b_config_gtab(
-	void			*p_dm_void
-)
+void hal_txbf_8822b_config_gtab(
+	void *dm_void)
 {
-	struct PHY_DM_STRUCT	*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	struct _RT_BEAMFORMING_INFO	*p_beamforming_info = &p_dm->beamforming_info;
-	struct _RT_BEAMFORMER_ENTRY	*p_beamformer_entry = NULL;
-	u32		gid_valid = 0, user_position_l = 0, user_position_h = 0, i;
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct _RT_BEAMFORMING_INFO *beamforming_info = &dm->beamforming_info;
+	struct _RT_BEAMFORMER_ENTRY *beamformer_entry = NULL;
+	u32 gid_valid = 0, user_position_l = 0, user_position_h = 0, i;
 
-	if (p_beamforming_info->mu_ap_index < BEAMFORMER_ENTRY_NUM)
-		p_beamformer_entry = &p_beamforming_info->beamformer_entry[p_beamforming_info->mu_ap_index];
+	if (beamforming_info->mu_ap_index < BEAMFORMER_ENTRY_NUM)
+		beamformer_entry = &beamforming_info->beamformer_entry[beamforming_info->mu_ap_index];
 	else
 		return;
 
-	PHYDM_DBG(p_dm, DBG_TXBF, ("%s==>\n", __func__));
+	PHYDM_DBG(dm, DBG_TXBF, "%s==>\n", __func__);
 
-	/*For GID 0~31*/
+	/*@For GID 0~31*/
 	for (i = 0; i < 4; i++)
-		gid_valid |= (p_beamformer_entry->gid_valid[i] << (i << 3));
+		gid_valid |= (beamformer_entry->gid_valid[i] << (i << 3));
 	for (i = 0; i < 8; i++) {
 		if (i < 4)
-			user_position_l |= (p_beamformer_entry->user_position[i] << (i << 3));
+			user_position_l |= (beamformer_entry->user_position[i] << (i << 3));
 		else
-			user_position_h |= (p_beamformer_entry->user_position[i] << ((i - 4) << 3));
+			user_position_h |= (beamformer_entry->user_position[i] << ((i - 4) << 3));
 	}
 	/*select MU STA0 table*/
-	p_beamforming_info->reg_mu_tx_ctrl &= ~(BIT(8) | BIT(9) | BIT(10));
-	odm_write_4byte(p_dm, 0x14c0, p_beamforming_info->reg_mu_tx_ctrl);
-	odm_set_bb_reg(p_dm, 0x14c4, MASKDWORD, gid_valid);
-	odm_set_bb_reg(p_dm, 0x14c8, MASKDWORD, user_position_l);
-	odm_set_bb_reg(p_dm, 0x14cc, MASKDWORD, user_position_h);
+	beamforming_info->reg_mu_tx_ctrl &= ~(BIT(8) | BIT(9) | BIT(10));
+	odm_write_4byte(dm, 0x14c0, beamforming_info->reg_mu_tx_ctrl);
+	odm_set_bb_reg(dm, R_0x14c4, MASKDWORD, gid_valid);
+	odm_set_bb_reg(dm, R_0x14c8, MASKDWORD, user_position_l);
+	odm_set_bb_reg(dm, R_0x14cc, MASKDWORD, user_position_h);
 
-	PHYDM_DBG(p_dm, DBG_TXBF, ("%s: STA0: gid_valid = 0x%x, user_position_l = 0x%x, user_position_h = 0x%x\n",
-			__func__, gid_valid, user_position_l, user_position_h));
+	PHYDM_DBG(dm, DBG_TXBF,
+		  "%s: STA0: gid_valid = 0x%x, user_position_l = 0x%x, user_position_h = 0x%x\n",
+		  __func__, gid_valid, user_position_l, user_position_h);
 
 	gid_valid = 0;
 	user_position_l = 0;
 	user_position_h = 0;
 
-	/*For GID 32~64*/
+	/*@For GID 32~64*/
 	for (i = 4; i < 8; i++)
-		gid_valid |= (p_beamformer_entry->gid_valid[i] << ((i - 4) << 3));
+		gid_valid |= (beamformer_entry->gid_valid[i] << ((i - 4) << 3));
 	for (i = 8; i < 16; i++) {
 		if (i < 4)
-			user_position_l |= (p_beamformer_entry->user_position[i] << ((i - 8) << 3));
+			user_position_l |= (beamformer_entry->user_position[i] << ((i - 8) << 3));
 		else
-			user_position_h |= (p_beamformer_entry->user_position[i] << ((i - 12) << 3));
+			user_position_h |= (beamformer_entry->user_position[i] << ((i - 12) << 3));
 	}
 	/*select MU STA1 table*/
-	p_beamforming_info->reg_mu_tx_ctrl &= ~(BIT(8) | BIT(9) | BIT(10));
-	p_beamforming_info->reg_mu_tx_ctrl |= BIT(8);
-	odm_write_4byte(p_dm, 0x14c0, p_beamforming_info->reg_mu_tx_ctrl);
-	odm_set_bb_reg(p_dm, 0x14c4, MASKDWORD, gid_valid);
-	odm_set_bb_reg(p_dm, 0x14c8, MASKDWORD, user_position_l);
-	odm_set_bb_reg(p_dm, 0x14cc, MASKDWORD, user_position_h);
+	beamforming_info->reg_mu_tx_ctrl &= ~(BIT(8) | BIT(9) | BIT(10));
+	beamforming_info->reg_mu_tx_ctrl |= BIT(8);
+	odm_write_4byte(dm, 0x14c0, beamforming_info->reg_mu_tx_ctrl);
+	odm_set_bb_reg(dm, R_0x14c4, MASKDWORD, gid_valid);
+	odm_set_bb_reg(dm, R_0x14c8, MASKDWORD, user_position_l);
+	odm_set_bb_reg(dm, R_0x14cc, MASKDWORD, user_position_h);
 
-	PHYDM_DBG(p_dm, DBG_TXBF, ("%s: STA1: gid_valid = 0x%x, user_position_l = 0x%x, user_position_h = 0x%x\n",
-			__func__, gid_valid, user_position_l, user_position_h));
+	PHYDM_DBG(dm, DBG_TXBF,
+		  "%s: STA1: gid_valid = 0x%x, user_position_l = 0x%x, user_position_h = 0x%x\n",
+		  __func__, gid_valid, user_position_l, user_position_h);
 
 	/* Set validity of MU STA0 and MU STA1*/
-	p_beamforming_info->reg_mu_tx_ctrl &= 0xFFFFFFC0;
-	p_beamforming_info->reg_mu_tx_ctrl |= 0x3; /* STA0, STA1*/
-	odm_write_4byte(p_dm, 0x14c0, p_beamforming_info->reg_mu_tx_ctrl);
-
+	beamforming_info->reg_mu_tx_ctrl &= 0xFFFFFFC0;
+	beamforming_info->reg_mu_tx_ctrl |= 0x3; /* STA0, STA1*/
+	odm_write_4byte(dm, 0x14c0, beamforming_info->reg_mu_tx_ctrl);
 }
 
-
-
 #if 0
 /*This function translate the bitmap to GTAB*/
 void
 haltxbf8822b_gtab_translation(
-	struct PHY_DM_STRUCT			*p_dm
+	struct dm_struct			*dm
 )
 {
 	u8 idx, gid;
@@ -948,19 +940,19 @@ haltxbf8822b_gtab_translation(
 	u32 user_position_msb[6] = {0};
 
 	for (idx = 0; idx < 15; idx++) {
-		if (idx < 5) {/*bit0~4*/
+		if (idx < 5) {/*@bit0~4*/
 			id0 = 0;
 			id1 = (u8)(idx + 1);
-		} else if (idx < 9) { /*bit5~8*/
+		} else if (idx < 9) { /*@bit5~8*/
 			id0 = 1;
 			id1 = (u8)(idx - 3);
-		} else if (idx < 12) { /*bit9~11*/
+		} else if (idx < 12) { /*@bit9~11*/
 			id0 = 2;
 			id1 = (u8)(idx - 6);
-		} else if (idx < 14) { /*bit12~13*/
+		} else if (idx < 14) { /*@bit12~13*/
 			id0 = 3;
 			id1 = (u8)(idx - 8);
-		} else { /*bit14*/
+		} else { /*@bit14*/
 			id0 = 4;
 			id1 = (u8)(idx - 9);
 		}
@@ -988,26 +980,23 @@ haltxbf8822b_gtab_translation(
 			user_position_msb[id0] |= (1 << ((gid - 16) << 1));
 			/*user_position_msb[id1] |= (0 << ((gid - 16) << 1));*/
 		}
-
 	}
 
 
 	for (idx = 0; idx < 6; idx++) {
-		/*dbg_print("gid_valid[%d] = 0x%x\n", idx, gid_valid[idx]);
+		/*@dbg_print("gid_valid[%d] = 0x%x\n", idx, gid_valid[idx]);
 		dbg_print("user_position[%d] = 0x%x   %x\n", idx, user_position_msb[idx], user_position_lsb[idx]);*/
 	}
 }
 #endif
 
-void
-hal_txbf_8822b_fw_txbf(
-	void			*p_dm_void,
-	u8				idx
-)
+void hal_txbf_8822b_fw_txbf(
+	void *dm_void,
+	u8 idx)
 {
 #if 0
-	struct _RT_BEAMFORMING_INFO	*p_beam_info = GET_BEAMFORM_INFO(adapter);
-	struct _RT_BEAMFORMEE_ENTRY	*p_beam_entry = p_beam_info->beamformee_entry + idx;
+	struct _RT_BEAMFORMING_INFO	*beam_info = GET_BEAMFORM_INFO(adapter);
+	struct _RT_BEAMFORMEE_ENTRY	*p_beam_entry = beam_info->beamformee_entry + idx;
 
 	if (p_beam_entry->beamform_entry_state == BEAMFORMING_ENTRY_STATE_PROGRESSING)
 		hal_txbf_8822b_download_ndpa(adapter, idx);
@@ -1020,93 +1009,79 @@ hal_txbf_8822b_fw_txbf(
 
 #if (defined(CONFIG_BB_TXBF_API))
 /*this function is only used for BFer*/
-void
-phydm_8822btxbf_rfmode(
-	void		*p_dm_void,
-	u8	su_bfee_cnt,
-	u8	mu_bfee_cnt
-)
+void phydm_8822btxbf_rfmode(void *dm_void, u8 su_bfee_cnt, u8 mu_bfee_cnt)
 {
-	struct PHY_DM_STRUCT	*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	u8		i;
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	u8 i;
 
-	if (p_dm->rf_type == RF_1T1R)
+	if (dm->rf_type == RF_1T1R)
 		return;
 
-	if ((su_bfee_cnt > 0) || (mu_bfee_cnt > 0)) {
+	if (su_bfee_cnt > 0 || mu_bfee_cnt > 0) {
 		for (i = RF_PATH_A; i <= RF_PATH_B; i++) {
-			odm_set_rf_reg(p_dm, (enum rf_path)i, 0xEF, BIT(19), 0x1); /*RF mode table write enable*/
-			odm_set_rf_reg(p_dm, (enum rf_path)i, 0x33, 0xF, 3); /*Select RX mode*/
-			odm_set_rf_reg(p_dm, (enum rf_path)i, 0x3E, 0xfffff, 0x00036); /*Set Table data*/
-			odm_set_rf_reg(p_dm, (enum rf_path)i, 0x3F, 0xfffff, 0x5AFCE); /*Set Table data*/
-			odm_set_rf_reg(p_dm, (enum rf_path)i, 0xEF, BIT(19), 0x0); /*RF mode table write disable*/
+			odm_set_rf_reg(dm, (enum rf_path)i, RF_0xef, BIT(19), 0x1); /*RF mode table write enable*/
+			odm_set_rf_reg(dm, (enum rf_path)i, RF_0x33, 0xF, 3); /*Select RX mode*/
+			odm_set_rf_reg(dm, (enum rf_path)i, RF_0x3e, 0xfffff, 0x00036); /*Set Table data*/
+			odm_set_rf_reg(dm, (enum rf_path)i, RF_0x3f, 0xfffff, 0x5AFCE); /*Set Table data*/
+			odm_set_rf_reg(dm, (enum rf_path)i, RF_0xef, BIT(19), 0x0); /*RF mode table write disable*/
 		}
 	}
 
-	odm_set_bb_reg(p_dm, REG_BB_TXBF_ANT_SET_BF1_8822B, BIT(30), 1);			/*if Nsts > Nc, don't apply V matrix*/
+	odm_set_bb_reg(dm, REG_BB_TXBF_ANT_SET_BF1_8822B, BIT(30), 1); /*@if Nsts > Nc, don't apply V matrix*/
 
 	if (su_bfee_cnt > 0 || mu_bfee_cnt > 0) {
-		/*for 8814 19ac(idx 1), 19b4(idx 0), different Tx ant setting*/
-		odm_set_bb_reg(p_dm, REG_BB_TXBF_ANT_SET_BF1_8822B, BIT(28) | BIT29, 0x2);	/*enable BB TxBF ant mapping register*/
-		odm_set_bb_reg(p_dm, REG_BB_TXBF_ANT_SET_BF1_8822B, BIT(31), 1);			/*ignore user since 8822B only 2Tx*/
-		
+		/*@for 8814 19ac(idx 1), 19b4(idx 0), different Tx ant setting*/
+		odm_set_bb_reg(dm, REG_BB_TXBF_ANT_SET_BF1_8822B, BIT(28) | BIT29, 0x2); /*@enable BB TxBF ant mapping register*/
+		odm_set_bb_reg(dm, REG_BB_TXBF_ANT_SET_BF1_8822B, BIT(31), 1); /*@ignore user since 8822B only 2Tx*/
 
 		/*Nsts = 2	AB*/
-		odm_set_bb_reg(p_dm, REG_BB_TXBF_ANT_SET_BF1_8822B, 0xffff, 0x0433);
-		odm_set_bb_reg(p_dm, REG_BB_TX_PATH_SEL_1_8822B, 0xfff00000, 0x043);
+		odm_set_bb_reg(dm, REG_BB_TXBF_ANT_SET_BF1_8822B, 0xffff, 0x0433);
+		odm_set_bb_reg(dm, REG_BB_TX_PATH_SEL_1_8822B, 0xfff00000, 0x043);
 
 	} else {
-		odm_set_bb_reg(p_dm, REG_BB_TXBF_ANT_SET_BF1_8822B, BIT(28) | BIT29, 0x0);	/*enable BB TxBF ant mapping register*/
-		odm_set_bb_reg(p_dm, REG_BB_TXBF_ANT_SET_BF1_8822B, BIT(31), 0);			/*ignore user since 8822B only 2Tx*/
+		odm_set_bb_reg(dm, REG_BB_TXBF_ANT_SET_BF1_8822B, BIT(28) | BIT29, 0x0); /*@enable BB TxBF ant mapping register*/
+		odm_set_bb_reg(dm, REG_BB_TXBF_ANT_SET_BF1_8822B, BIT(31), 0); /*@ignore user since 8822B only 2Tx*/
 
-		odm_set_bb_reg(p_dm, REG_BB_TX_PATH_SEL_1_8822B, 0xfff00000, 0x1); /*1SS by path-A*/
-		odm_set_bb_reg(p_dm, REG_BB_TX_PATH_SEL_2_8822B, MASKLWORD, 0x430); /*2SS by path-A,B*/
+		odm_set_bb_reg(dm, REG_BB_TX_PATH_SEL_1_8822B, 0xfff00000, 0x1); /*@1SS by path-A*/
+		odm_set_bb_reg(dm, REG_BB_TX_PATH_SEL_2_8822B, MASKLWORD, 0x430); /*@2SS by path-A,B*/
 	}
-
 }
 
-
 /*this function is for BFer bug workaround*/
-void
-phydm_8822b_sutxbfer_workaroud(
-	void		*p_dm_void,
-	boolean	enable_su_bfer,
-	u8	nc,
-	u8	nr,
-	u8	ng,
-	u8	CB,
-	u8	BW,
-	boolean	is_vht
-)
+void phydm_8822b_sutxbfer_workaroud(void *dm_void, boolean enable_su_bfer,
+				    u8 nc, u8 nr, u8 ng, u8 CB, u8 BW,
+				    boolean is_vht)
 {
-	struct PHY_DM_STRUCT	*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
 
 	if (enable_su_bfer) {
-		odm_set_bb_reg(p_dm, 0x19f8, BIT(22) | BIT(21) | BIT(20), 0x1);
-		odm_set_bb_reg(p_dm, 0x19f8, BIT(25) | BIT(24) | BIT(23), 0x0);
-		odm_set_bb_reg(p_dm, 0x19f8, BIT(16), 0x1);
+		odm_set_bb_reg(dm, R_0x19f8, BIT(22) | BIT(21) | BIT(20), 0x1);
+		odm_set_bb_reg(dm, R_0x19f8, BIT(25) | BIT(24) | BIT(23), 0x0);
+		odm_set_bb_reg(dm, R_0x19f8, BIT(16), 0x1);
 
 		if (is_vht)
-			odm_set_bb_reg(p_dm, 0x19f0, BIT(5) | BIT(4) | BIT(3) | BIT(2) | BIT(1) | BIT(0), 0x1f);
+			odm_set_bb_reg(dm, R_0x19f0, BIT(5) | BIT(4) | BIT(3) | BIT(2) | BIT(1) | BIT(0), 0x1f);
 		else
-			odm_set_bb_reg(p_dm, 0x19f0, BIT(5) | BIT(4) | BIT(3) | BIT(2) | BIT(1) | BIT(0), 0x22);
+			odm_set_bb_reg(dm, R_0x19f0, BIT(5) | BIT(4) | BIT(3) | BIT(2) | BIT(1) | BIT(0), 0x22);
 
-		odm_set_bb_reg(p_dm, 0x19f0, BIT(7) | BIT(6), nc);
-		odm_set_bb_reg(p_dm, 0x19f0, BIT(9) | BIT(8), nr);
-		odm_set_bb_reg(p_dm, 0x19f0, BIT(11) | BIT(10), ng);
-		odm_set_bb_reg(p_dm, 0x19f0, BIT(13) | BIT(12), CB);
-
-		odm_set_bb_reg(p_dm, 0xb58, BIT(3) | BIT(2), BW);
-		odm_set_bb_reg(p_dm, 0xb58, BIT(7) | BIT(6) | BIT(5) | BIT(4), 0x0);
-		odm_set_bb_reg(p_dm, 0xb58, BIT(9) | BIT(8), BW);
-		odm_set_bb_reg(p_dm, 0xb58, BIT(13) | BIT(12) | BIT(11) | BIT(10), 0x0);
-	} else
-		odm_set_bb_reg(p_dm, 0x19f8, BIT(16), 0x0);
-
-	PHYDM_DBG(p_dm, DBG_TXBF, ("[%s] enable_su_bfer = %d, is_vht = %d\n", __func__, enable_su_bfer, is_vht));
-	PHYDM_DBG(p_dm, DBG_TXBF, ("[%s] nc = %d, nr = %d, ng = %d, CB = %d, BW = %d\n", __func__, nc, nr, ng, CB, BW));
+		odm_set_bb_reg(dm, R_0x19f0, BIT(7) | BIT(6), nc);
+		odm_set_bb_reg(dm, R_0x19f0, BIT(9) | BIT(8), nr);
+		odm_set_bb_reg(dm, R_0x19f0, BIT(11) | BIT(10), ng);
+		odm_set_bb_reg(dm, R_0x19f0, BIT(13) | BIT(12), CB);
 
+		odm_set_bb_reg(dm, R_0xb58, BIT(3) | BIT(2), BW);
+		odm_set_bb_reg(dm, R_0xb58, BIT(7) | BIT(6) | BIT(5) | BIT(4), 0x0);
+		odm_set_bb_reg(dm, R_0xb58, BIT(9) | BIT(8), BW);
+		odm_set_bb_reg(dm, R_0xb58, BIT(13) | BIT(12) | BIT(11) | BIT(10), 0x0);
+	} else {
+		odm_set_bb_reg(dm, R_0x19f8, BIT(16), 0x0);
+	}
 
+	PHYDM_DBG(dm, DBG_TXBF, "[%s] enable_su_bfer = %d, is_vht = %d\n",
+		  __func__, enable_su_bfer, is_vht);
+	PHYDM_DBG(dm, DBG_TXBF,
+		  "[%s] nc = %d, nr = %d, ng = %d, CB = %d, BW = %d\n",
+		  __func__, nc, nr, ng, CB, BW);
 }
 #endif
-#endif	/* (RTL8822B_SUPPORT == 1)*/
+#endif /* @(RTL8822B_SUPPORT == 1)*/
diff --git a/rtl8723DS/hal/phydm/txbf/haltxbf8822b.h b/rtl8723DS/hal/phydm/txbf/haltxbf8822b.h
index 2ff19bd..552fba2 100755..100644
--- a/rtl8723DS/hal/phydm/txbf/haltxbf8822b.h
+++ b/rtl8723DS/hal/phydm/txbf/haltxbf8822b.h
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2016 - 2017 Realtek Corporation.
+ * Copyright(c) 2007 - 2017  Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -8,86 +8,71 @@
  *
  * This program is distributed in the hope that it will be useful, but WITHOUT
  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  * more details.
  *
+ * The full GNU General Public License is included in this distribution in the
+ * file called LICENSE.
+ *
+ * Contact Information:
+ * wlanfae <wlanfae@realtek.com>
+ * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
+ * Hsinchu 300, Taiwan.
+ *
+ * Larry Finger <Larry.Finger@lwfinger.net>
+ *
  *****************************************************************************/
 #ifndef __HAL_TXBF_8822B_H__
 #define __HAL_TXBF_8822B_H__
 
 #if (RTL8822B_SUPPORT == 1)
-#if (BEAMFORMING_SUPPORT == 1)
-
-void
-hal_txbf_8822b_enter(
-	void			*p_dm_void,
-	u8				idx
-);
-
+#ifdef PHYDM_BEAMFORMING_SUPPORT
 
-void
-hal_txbf_8822b_leave(
-	void			*p_dm_void,
-	u8				idx
-);
+void hal_txbf_8822b_enter(
+	void *dm_void,
+	u8 idx);
 
+void hal_txbf_8822b_leave(
+	void *dm_void,
+	u8 idx);
 
-void
-hal_txbf_8822b_status(
-	void			*p_dm_void,
-	u8				beamform_idx
-);
+void hal_txbf_8822b_status(
+	void *dm_void,
+	u8 beamform_idx);
 
-void
-hal_txbf_8822b_config_gtab(
-	void			*p_dm_void
-);
+void hal_txbf_8822b_config_gtab(
+	void *dm_void);
 
-void
-hal_txbf_8822b_fw_txbf(
-	void			*p_dm_void,
-	u8				idx
-);
+void hal_txbf_8822b_fw_txbf(
+	void *dm_void,
+	u8 idx);
 #else
-#define hal_txbf_8822b_enter(p_dm_void, idx)
-#define hal_txbf_8822b_leave(p_dm_void, idx)
-#define hal_txbf_8822b_status(p_dm_void, idx)
-#define hal_txbf_8822b_fw_txbf(p_dm_void, idx)
-#define hal_txbf_8822b_config_gtab(p_dm_void)
+#define hal_txbf_8822b_enter(dm_void, idx)
+#define hal_txbf_8822b_leave(dm_void, idx)
+#define hal_txbf_8822b_status(dm_void, idx)
+#define hal_txbf_8822b_fw_txbf(dm_void, idx)
+#define hal_txbf_8822b_config_gtab(dm_void)
 
 #endif
 
 #if (defined(CONFIG_BB_TXBF_API))
-void
-phydm_8822btxbf_rfmode(
-	void		*p_dm_void,
-	u8	su_bfee_cnt,
-	u8	mu_bfee_cnt
-);
+void phydm_8822btxbf_rfmode(void *dm_void, u8 su_bfee_cnt, u8 mu_bfee_cnt);
 
-void
-phydm_8822b_sutxbfer_workaroud(
-	void		*p_dm_void,
-	boolean	enable_su_bfer,
-	u8	nc,
-	u8	nr,
-	u8	ng,
-	u8	CB,
-	u8	BW,
-	boolean	is_vht
-);
+void phydm_8822b_sutxbfer_workaroud(void *dm_void, boolean enable_su_bfer,
+				    u8 nc, u8 nr, u8 ng, u8 CB, u8 BW,
+				    boolean is_vht);
 
 #else
-#define phydm_8822btxbf_rfmode(p_dm_void, su_bfee_cnt, mu_bfee_cnt)
-#define phydm_8822b_sutxbfer_workaroud(p_dm_void, enable_su_bfer, nc, nr, ng, CB, BW, is_vht)
+#define phydm_8822btxbf_rfmode(dm_void, su_bfee_cnt, mu_bfee_cnt)
+#define phydm_8822b_sutxbfer_workaroud(dm_void, enable_su_bfer, nc, nr, ng, CB, BW, is_vht)
 #endif
 
 #else
-#define hal_txbf_8822b_enter(p_dm_void, idx)
-#define hal_txbf_8822b_leave(p_dm_void, idx)
-#define hal_txbf_8822b_status(p_dm_void, idx)
-#define hal_txbf_8822b_fw_txbf(p_dm_void, idx)
-#define hal_txbf_8822b_config_gtab(p_dm_void)
+#define hal_txbf_8822b_enter(dm_void, idx)
+#define hal_txbf_8822b_leave(dm_void, idx)
+#define hal_txbf_8822b_status(dm_void, idx)
+#define hal_txbf_8822b_fw_txbf(dm_void, idx)
+#define hal_txbf_8822b_config_gtab(dm_void)
 
 #endif
 #endif
diff --git a/rtl8723DS/hal/phydm/txbf/haltxbfinterface.c b/rtl8723DS/hal/phydm/txbf/haltxbfinterface.c
index ebccedc..c125fec 100755..100644
--- a/rtl8723DS/hal/phydm/txbf/haltxbfinterface.c
+++ b/rtl8723DS/hal/phydm/txbf/haltxbfinterface.c
@@ -12,148 +12,149 @@
  * more details.
  *
  *****************************************************************************/
-/* ************************************************************
+/*************************************************************
  * Description:
  *
  * This file is for TXBF interface mechanism
  *
- * ************************************************************ */
+ ************************************************************/
 #include "mp_precomp.h"
 #include "../phydm_precomp.h"
 
-#if (BEAMFORMING_SUPPORT == 1)
+#ifdef PHYDM_BEAMFORMING_SUPPORT
 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
-void
-beamforming_gid_paid(
-	struct _ADAPTER	*adapter,
-	PRT_TCB		p_tcb
-)
+void beamforming_gid_paid(
+	void *adapter,
+	PRT_TCB tcb)
 {
-	u8		RA[6] = {0};
-	u8		*p_header = GET_FRAME_OF_FIRST_FRAG(adapter, p_tcb);
-	HAL_DATA_TYPE			*p_hal_data = GET_HAL_DATA(adapter);
-	struct PHY_DM_STRUCT				*p_dm = &p_hal_data->DM_OutSrc;
-	struct _RT_BEAMFORMING_INFO	*p_beam_info = &(p_dm->beamforming_info);
+	u8 RA[6] = {0};
+	u8 *p_header = GET_FRAME_OF_FIRST_FRAG(adapter, tcb);
+	HAL_DATA_TYPE *hal_data = GET_HAL_DATA(((PADAPTER)adapter));
+	struct dm_struct *dm = &hal_data->DM_OutSrc;
+	struct _RT_BEAMFORMING_INFO *beam_info = &(dm->beamforming_info);
 
-	if (adapter->HardwareType < HARDWARE_TYPE_RTL8192EE)
+	if (((PADAPTER)adapter)->HardwareType < HARDWARE_TYPE_RTL8192EE)
 		return;
-	else if (IS_WIRELESS_MODE_N(adapter) == false)
+	else if (IS_WIRELESS_MODE_N((PADAPTER)adapter) == false)
 		return;
 
 #if (SUPPORT_MU_BF == 1)
-	if (p_tcb->tx_bf_pkt_type == RT_BF_PKT_TYPE_BROADCAST_NDPA) { /* MU NDPA */
+	if (tcb->tx_bf_pkt_type == RT_BF_PKT_TYPE_BROADCAST_NDPA) { /* @MU NDPA */
 #else
 	if (0) {
 #endif
-		/* Fill G_ID and P_AID */
-		p_tcb->G_ID = 63;
-		if (p_beam_info->first_mu_bfee_index < BEAMFORMEE_ENTRY_NUM) {
-			p_tcb->P_AID = p_beam_info->beamformee_entry[p_beam_info->first_mu_bfee_index].p_aid;
-			RT_DISP(FBEAM, FBEAM_FUN, ("[David]@%s End, G_ID=0x%X, P_AID=0x%X\n", __func__, p_tcb->G_ID, p_tcb->P_AID));
+		/* @Fill G_ID and P_AID */
+		tcb->G_ID = 63;
+		if (beam_info->first_mu_bfee_index < BEAMFORMEE_ENTRY_NUM) {
+			tcb->P_AID = beam_info->beamformee_entry[beam_info->first_mu_bfee_index].p_aid;
+			RT_DISP(FBEAM, FBEAM_FUN, ("[David]@%s End, G_ID=0x%X, P_AID=0x%X\n", __func__, tcb->G_ID, tcb->P_AID));
 		}
 	} else {
 		GET_80211_HDR_ADDRESS1(p_header, &RA);
 
 		/* VHT SU PPDU carrying one or more group addressed MPDUs or */
 		/* Transmitting a VHT NDP intended for multiple recipients */
-		if (MacAddr_isBcst(RA) || MacAddr_isMulticast(RA)	|| p_tcb->macId == MAC_ID_STATIC_FOR_BROADCAST_MULTICAST) {
-			p_tcb->G_ID = 63;
-			p_tcb->P_AID = 0;
+		if (MacAddr_isBcst(RA) || MacAddr_isMulticast(RA) || tcb->macId == MAC_ID_STATIC_FOR_BROADCAST_MULTICAST) {
+			tcb->G_ID = 63;
+			tcb->P_AID = 0;
 		} else if (ACTING_AS_AP(adapter)) {
-			u16	AID = (u16)(MacIdGetOwnerAssociatedClientAID(adapter, p_tcb->macId) & 0x1ff);		/*AID[0:8]*/
+			u16 AID = (u16)(MacIdGetOwnerAssociatedClientAID(adapter, tcb->macId) & 0x1ff); /*@AID[0:8]*/
 
-			/*RT_DISP(FBEAM, FBEAM_FUN, ("@%s  p_tcb->mac_id=0x%X, AID=0x%X\n", __func__, p_tcb->mac_id, AID));*/
-			p_tcb->G_ID = 63;
+			/*RT_DISP(FBEAM, FBEAM_FUN, ("@%s  tcb->mac_id=0x%X, AID=0x%X\n", __func__, tcb->mac_id, AID));*/
+			tcb->G_ID = 63;
 
-			if (AID == 0)		/*A PPDU sent by an AP to a non associated STA*/
-				p_tcb->P_AID = 0;
-			else {				/*Sent by an AP and addressed to a STA associated with that AP*/
-				u16	BSSID = 0;
+			if (AID == 0) /*@A PPDU sent by an AP to a non associated STA*/
+				tcb->P_AID = 0;
+			else { /*Sent by an AP and addressed to a STA associated with that AP*/
+				u16 BSSID = 0;
 				GET_80211_HDR_ADDRESS2(p_header, &RA);
-				BSSID = ((RA[5] & 0xf0) >> 4) ^ (RA[5] & 0xf);	/*BSSID[44:47] xor BSSID[40:43]*/
-				p_tcb->P_AID = (AID + BSSID * 32) & 0x1ff;		/*(dec(A) + dec(B)*32) mod 512*/
+				BSSID = ((RA[5] & 0xf0) >> 4) ^ (RA[5] & 0xf); /*@BSSID[44:47] xor BSSID[40:43]*/
+				tcb->P_AID = (AID + BSSID * 32) & 0x1ff; /*@(dec(A) + dec(B)*32) mod 512*/
 			}
-		} else if (ACTING_AS_IBSS(adapter)) {
-			p_tcb->G_ID = 63;
+		} else if (ACTING_AS_IBSS(((PADAPTER)adapter))) {
+			tcb->G_ID = 63;
 			/*P_AID for infrasturcture mode; MACID for ad-hoc mode. */
-			p_tcb->P_AID = p_tcb->macId;
-		} else if (MgntLinkStatusQuery(adapter)) {				/*Addressed to AP*/
-			p_tcb->G_ID = 0;
+			tcb->P_AID = tcb->macId;
+		} else if (MgntLinkStatusQuery(adapter)) { /*@Addressed to AP*/
+			tcb->G_ID = 0;
 			GET_80211_HDR_ADDRESS1(p_header, &RA);
-			p_tcb->P_AID =  RA[5];							/*RA[39:47]*/
-			p_tcb->P_AID = (p_tcb->P_AID << 1) | (RA[4] >> 7);
+			tcb->P_AID = RA[5]; /*RA[39:47]*/
+			tcb->P_AID = (tcb->P_AID << 1) | (RA[4] >> 7);
 		} else {
-			p_tcb->G_ID = 63;
-			p_tcb->P_AID = 0;
+			tcb->G_ID = 63;
+			tcb->P_AID = 0;
 		}
-		/*RT_DISP(FBEAM, FBEAM_FUN, ("[David]@%s End, G_ID=0x%X, P_AID=0x%X\n", __func__, p_tcb->G_ID, p_tcb->P_AID));*/
+		/*RT_DISP(FBEAM, FBEAM_FUN, ("[David]@%s End, G_ID=0x%X, P_AID=0x%X\n", __func__, tcb->G_ID, tcb->P_AID));*/
 	}
 }
 
-
 enum rt_status
 beamforming_get_report_frame(
-	struct _ADAPTER		*adapter,
-	PRT_RFD			p_rfd,
-	POCTET_STRING	p_pdu_os
-)
+	void *adapter,
+	PRT_RFD rfd,
+	POCTET_STRING p_pdu_os)
 {
-	HAL_DATA_TYPE				*p_hal_data = GET_HAL_DATA(adapter);
-	struct PHY_DM_STRUCT					*p_dm = &p_hal_data->DM_OutSrc;
-	struct _RT_BEAMFORMEE_ENTRY		*p_beamform_entry = NULL;
-	u8						*p_mimo_ctrl_field, p_csi_matrix;
-	u8						idx, nc, nr, CH_W;
-	u16						csi_matrix_len = 0;
+	HAL_DATA_TYPE *hal_data = GET_HAL_DATA((PADAPTER)adapter);
+	struct dm_struct *dm = &hal_data->DM_OutSrc;
+	struct _RT_BEAMFORMEE_ENTRY *beamform_entry = NULL;
+	u8 *p_mimo_ctrl_field, p_csi_matrix;
+	u8 idx, nc, nr, CH_W;
+	u16 csi_matrix_len = 0;
 
-	ACT_PKT_TYPE				pkt_type = ACT_PKT_TYPE_UNKNOWN;
+	ACT_PKT_TYPE pkt_type = ACT_PKT_TYPE_UNKNOWN;
 
-	/* Memory comparison to see if CSI report is the same with previous one */
-	p_beamform_entry = phydm_beamforming_get_bfee_entry_by_addr(p_dm, Frame_Addr2(*p_pdu_os), &idx);
+	/* @Memory comparison to see if CSI report is the same with previous one */
+	beamform_entry = phydm_beamforming_get_bfee_entry_by_addr(dm, Frame_Addr2(*p_pdu_os), &idx);
 
-	if (p_beamform_entry == NULL) {
-		PHYDM_DBG(p_dm, DBG_TXBF, ("beamforming_get_report_frame: Cannot find entry by addr\n"));
+	if (beamform_entry == NULL) {
+		PHYDM_DBG(dm, DBG_TXBF, "%s: Cannot find entry by addr\n",
+			  __func__);
 		return RT_STATUS_FAILURE;
 	}
 
 	pkt_type = PacketGetActionFrameType(p_pdu_os);
 
-	/* -@ Modified by David */
+	/* @-@ Modified by David */
 	if (pkt_type == ACT_PKT_VHT_COMPRESSED_BEAMFORMING) {
 		p_mimo_ctrl_field = p_pdu_os->Octet + 26;
 		nc = ((*p_mimo_ctrl_field) & 0x7) + 1;
 		nr = (((*p_mimo_ctrl_field) & 0x38) >> 3) + 1;
 		CH_W = (((*p_mimo_ctrl_field) & 0xC0) >> 6);
 		/*p_csi_matrix = p_mimo_ctrl_field + 3 + nc;*/ /* 24+(1+1+3)+2  MAC header+(Category+ActionCode+MIMOControlField) +SNR(nc=2) */
-		csi_matrix_len = p_pdu_os->Length  - 26 - 3 - nc;
+		csi_matrix_len = p_pdu_os->Length - 26 - 3 - nc;
 	} else if (pkt_type == ACT_PKT_HT_COMPRESSED_BEAMFORMING) {
 		p_mimo_ctrl_field = p_pdu_os->Octet + 26;
 		nc = ((*p_mimo_ctrl_field) & 0x3) + 1;
 		nr = (((*p_mimo_ctrl_field) & 0xC) >> 2) + 1;
 		CH_W = (((*p_mimo_ctrl_field) & 0x10) >> 4);
-		/*p_csi_matrix = p_mimo_ctrl_field + 6 + nr;*/	/* 24+(1+1+6)+2  MAC header+(Category+ActionCode+MIMOControlField) +SNR(nc=2) */
-		csi_matrix_len = p_pdu_os->Length  - 26 - 6 - nr;
+		/*p_csi_matrix = p_mimo_ctrl_field + 6 + nr;*/ /* 24+(1+1+6)+2  MAC header+(Category+ActionCode+MIMOControlField) +SNR(nc=2) */
+		csi_matrix_len = p_pdu_os->Length - 26 - 6 - nr;
 	} else
 		return RT_STATUS_SUCCESS;
 
-	PHYDM_DBG(p_dm, DBG_TXBF, ("[%s] idx=%d, pkt type=%d, nc=%d, nr=%d, CH_W=%d\n", __func__, idx, pkt_type, nc, nr, CH_W));
+	PHYDM_DBG(dm, DBG_TXBF,
+		  "[%s] idx=%d, pkt type=%d, nc=%d, nr=%d, CH_W=%d\n", __func__,
+		  idx, pkt_type, nc, nr, CH_W);
 
 	return RT_STATUS_SUCCESS;
 }
 
-
-void
-construct_ht_ndpa_packet(
-	struct _ADAPTER		*adapter,
-	u8			*RA,
-	u8			*buffer,
-	u32			*p_length,
-	enum channel_width	BW
-)
+void construct_ht_ndpa_packet(
+	// 2017/11 MH PHYDM compile. But why need to use windows maco?
+	// For all linux code, it should be useless?
+	//void				*adapter = dm->adapter;
+	ADAPTER * adapter,
+	//void		*adapter,
+	u8 *RA,
+	u8 *buffer,
+	u32 *p_length,
+	enum channel_width BW)
 {
-	u16					duration = 0;
-	PMGNT_INFO				p_mgnt_info = &(adapter->MgntInfo);
-	OCTET_STRING			p_ndpa_frame, action_content;
-	u8					action_hdr[4] = {ACT_CAT_VENDOR, 0x00, 0xe0, 0x4c};
+	u16 duration = 0;
+	PMGNT_INFO mgnt_info = &(((PADAPTER)adapter)->MgntInfo);
+	//PMGNT_INFO				mgnt_info = &((MGNT_INFO)(((PADAPTER)adapter)->MgntInfo));
+	OCTET_STRING p_ndpa_frame, action_content;
+	u8 action_hdr[4] = {ACT_CAT_VENDOR, 0x00, 0xe0, 0x4c};
 
 	PlatformZeroMemory(buffer, 32);
 
@@ -163,8 +164,8 @@ construct_ht_ndpa_packet(
 	SET_80211_HDR_TYPE_AND_SUBTYPE(buffer, Type_Action_No_Ack);
 
 	SET_80211_HDR_ADDRESS1(buffer, RA);
-	SET_80211_HDR_ADDRESS2(buffer, adapter->CurrentAddress);
-	SET_80211_HDR_ADDRESS3(buffer, p_mgnt_info->Bssid);
+	SET_80211_HDR_ADDRESS2(buffer, ((PADAPTER)adapter)->CurrentAddress);
+	SET_80211_HDR_ADDRESS3(buffer, ((PMGNT_INFO)mgnt_info)->Bssid);
 
 	duration = 2 * a_SifsTime + 40;
 
@@ -175,7 +176,7 @@ construct_ht_ndpa_packet(
 
 	SET_80211_HDR_DURATION(buffer, duration);
 
-	/* HT control field */
+	/* @HT control field */
 	SET_HT_CTRL_CSI_STEERING(buffer + sMacHdrLng, 3);
 	SET_HT_CTRL_NDP_ANNOUNCEMENT(buffer + sMacHdrLng, 1);
 
@@ -187,40 +188,37 @@ construct_ht_ndpa_packet(
 	*p_length = 32;
 }
 
-
-
-
 boolean
 send_fw_ht_ndpa_packet(
-	void			*p_dm_void,
-	u8			*RA,
-	enum channel_width	BW
-)
+	void *dm_void,
+	u8 *RA,
+	enum channel_width BW)
 {
-	struct PHY_DM_STRUCT				*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	struct _ADAPTER				*adapter = p_dm->adapter;
-	PRT_TCB				p_tcb;
-	PRT_TX_LOCAL_BUFFER	p_buf;
-	boolean				ret = true;
-	u32					buf_len;
-	u8					*buf_addr;
-	u8					desc_len = 0, idx = 0, ndp_tx_rate;
-	struct _ADAPTER				*p_def_adapter = GetDefaultAdapter(adapter);
-	HAL_DATA_TYPE			*p_hal_data = GET_HAL_DATA(adapter);
-	struct _RT_BEAMFORMEE_ENTRY	*p_beamform_entry = phydm_beamforming_get_bfee_entry_by_addr(p_dm, RA, &idx);
-
-	PHYDM_DBG(p_dm, DBG_TXBF, ("[%s] Start!\n", __func__));
-
-	if (p_beamform_entry == NULL)
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	void *adapter = dm->adapter;
+	PRT_TCB tcb;
+	PRT_TX_LOCAL_BUFFER p_buf;
+	boolean ret = true;
+	u32 buf_len;
+	u8 *buf_addr;
+	u8 desc_len = 0, idx = 0, ndp_tx_rate;
+	void *p_def_adapter = GetDefaultAdapter(((PADAPTER)adapter));
+	HAL_DATA_TYPE *hal_data = GET_HAL_DATA(((PADAPTER)adapter));
+	struct _RT_BEAMFORMEE_ENTRY *beamform_entry = phydm_beamforming_get_bfee_entry_by_addr(dm, RA, &idx);
+
+	PHYDM_DBG(dm, DBG_TXBF, "[%s] Start!\n", __func__);
+
+	if (beamform_entry == NULL)
 		return false;
 
-	ndp_tx_rate = beamforming_get_htndp_tx_rate(p_dm, p_beamform_entry->comp_steering_num_of_bfer);
-	PHYDM_DBG(p_dm, DBG_TXBF, ("[%s] ndp_tx_rate =%d\n", __func__, ndp_tx_rate));
+	ndp_tx_rate = beamforming_get_htndp_tx_rate(dm, beamform_entry->comp_steering_num_of_bfer);
+	PHYDM_DBG(dm, DBG_TXBF, "[%s] ndp_tx_rate =%d\n", __func__,
+		  ndp_tx_rate);
 	PlatformAcquireSpinLock(adapter, RT_TX_SPINLOCK);
 
-	if (MgntGetFWBuffer(p_def_adapter, &p_tcb, &p_buf)) {
+	if (MgntGetFWBuffer(p_def_adapter, &tcb, &p_buf)) {
 #if (DEV_BUS_TYPE != RT_PCI_INTERFACE)
-		desc_len = adapter->HWDescHeadLength - p_hal_data->USBALLDummyLength;
+		desc_len = ((PADAPTER)adapter)->HWDescHeadLength - hal_data->USBALLDummyLength;
 #endif
 		buf_addr = p_buf->Buffer.VirtualAddress + desc_len;
 
@@ -229,107 +227,105 @@ send_fw_ht_ndpa_packet(
 			RA,
 			buf_addr,
 			&buf_len,
-			BW
-		);
+			BW);
 
-		p_tcb->PacketLength = buf_len + desc_len;
+		tcb->PacketLength = buf_len + desc_len;
 
-		p_tcb->bTxEnableSwCalcDur = true;
+		tcb->bTxEnableSwCalcDur = true;
 
-		p_tcb->BWOfPacket = BW;
+		tcb->BWOfPacket = BW;
 
-		if (ACTING_AS_IBSS(adapter) || ACTING_AS_AP(adapter))
-			p_tcb->G_ID = 63;
+		if (ACTING_AS_IBSS(((PADAPTER)adapter)) || ACTING_AS_AP(((PADAPTER)adapter)))
+			tcb->G_ID = 63;
 
-		p_tcb->P_AID = p_beamform_entry->p_aid;
-		p_tcb->DataRate = ndp_tx_rate;	/*rate of NDP decide by nr*/
+		tcb->P_AID = beamform_entry->p_aid;
+		tcb->DataRate = ndp_tx_rate; /*rate of NDP decide by nr*/
 
-		adapter->HalFunc.CmdSendPacketHandler(adapter, p_tcb, p_buf, p_tcb->PacketLength, DESC_PACKET_TYPE_NORMAL, false);
+		((PADAPTER)adapter)->HalFunc.CmdSendPacketHandler(((PADAPTER)adapter), tcb, p_buf, tcb->PacketLength, DESC_PACKET_TYPE_NORMAL, false);
 	} else
 		ret = false;
 
 	PlatformReleaseSpinLock(adapter, RT_TX_SPINLOCK);
 
 	if (ret)
-		RT_DISP_DATA(FBEAM, FBEAM_DATA, "", p_buf->Buffer.VirtualAddress, p_tcb->PacketLength);
+		RT_DISP_DATA(FBEAM, FBEAM_DATA, "", p_buf->Buffer.VirtualAddress, tcb->PacketLength);
 
 	return ret;
 }
 
-
 boolean
 send_sw_ht_ndpa_packet(
-	void			*p_dm_void,
-	u8			*RA,
-	enum channel_width	BW
-)
+	void *dm_void,
+	u8 *RA,
+	enum channel_width BW)
 {
-	struct PHY_DM_STRUCT				*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	struct _ADAPTER				*adapter = p_dm->adapter;
-	PRT_TCB					p_tcb;
-	PRT_TX_LOCAL_BUFFER		p_buf;
-	boolean					ret = true;
-	u8					idx = 0, ndp_tx_rate = 0;
-	struct _RT_BEAMFORMEE_ENTRY	*p_beamform_entry = phydm_beamforming_get_bfee_entry_by_addr(p_dm, RA, &idx);
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	void *adapter = dm->adapter;
+	PRT_TCB tcb;
+	PRT_TX_LOCAL_BUFFER p_buf;
+	boolean ret = true;
+	u8 idx = 0, ndp_tx_rate = 0;
+	struct _RT_BEAMFORMEE_ENTRY *beamform_entry = phydm_beamforming_get_bfee_entry_by_addr(dm, RA, &idx);
 
-	PHYDM_DBG(p_dm, DBG_TXBF, ("[%s] Start!\n", __func__));
+	PHYDM_DBG(dm, DBG_TXBF, "[%s] Start!\n", __func__);
 
-	ndp_tx_rate = beamforming_get_htndp_tx_rate(p_dm, p_beamform_entry->comp_steering_num_of_bfer);
-	PHYDM_DBG(p_dm, DBG_TXBF, ("[%s] ndp_tx_rate =%d\n", __func__, ndp_tx_rate));
+	ndp_tx_rate = beamforming_get_htndp_tx_rate(dm, beamform_entry->comp_steering_num_of_bfer);
+	PHYDM_DBG(dm, DBG_TXBF, "[%s] ndp_tx_rate =%d\n", __func__,
+		  ndp_tx_rate);
 
 	PlatformAcquireSpinLock(adapter, RT_TX_SPINLOCK);
 
-	if (MgntGetBuffer(adapter, &p_tcb, &p_buf)) {
+	if (MgntGetBuffer(adapter, &tcb, &p_buf)) {
 		construct_ht_ndpa_packet(
 			adapter,
 			RA,
 			p_buf->Buffer.VirtualAddress,
-			&p_tcb->PacketLength,
-			BW
-		);
+			&tcb->PacketLength,
+			BW);
 
-		p_tcb->bTxEnableSwCalcDur = true;
+		tcb->bTxEnableSwCalcDur = true;
 
-		p_tcb->BWOfPacket = BW;
+		tcb->BWOfPacket = BW;
 
-		MgntSendPacket(adapter, p_tcb, p_buf, p_tcb->PacketLength, NORMAL_QUEUE, ndp_tx_rate);
+		MgntSendPacket(adapter, tcb, p_buf, tcb->PacketLength, NORMAL_QUEUE, ndp_tx_rate);
 	} else
 		ret = false;
 
 	PlatformReleaseSpinLock(adapter, RT_TX_SPINLOCK);
 
 	if (ret)
-		RT_DISP_DATA(FBEAM, FBEAM_DATA, "", p_buf->Buffer.VirtualAddress, p_tcb->PacketLength);
+		RT_DISP_DATA(FBEAM, FBEAM_DATA, "", p_buf->Buffer.VirtualAddress, tcb->PacketLength);
 
 	return ret;
 }
 
-
-
-void
-construct_vht_ndpa_packet(
-	struct PHY_DM_STRUCT	*p_dm,
-	u8			*RA,
-	u16			AID,
-	u8			*buffer,
-	u32			*p_length,
-	enum channel_width	BW
-)
+void construct_vht_ndpa_packet(
+	struct dm_struct *dm,
+	u8 *RA,
+	u16 AID,
+	u8 *buffer,
+	u32 *p_length,
+	enum channel_width BW)
 {
-	u16					duration = 0;
-	u8					sequence = 0;
-	u8					*p_ndpa_frame = buffer;
-	struct _RT_NDPA_STA_INFO		sta_info;
-	struct _ADAPTER				*adapter = p_dm->adapter;
-	u8	idx = 0;
-	struct _RT_BEAMFORMEE_ENTRY	*p_beamform_entry = phydm_beamforming_get_bfee_entry_by_addr(p_dm, RA, &idx);
-	/* Frame control. */
+	u16 duration = 0;
+	u8 sequence = 0;
+	u8 *p_ndpa_frame = buffer;
+	struct _RT_NDPA_STA_INFO sta_info;
+	// 2017/11 MH PHYDM compile. But why need to use windows maco?
+	// For all linux code, it should be useless?
+	//void				*adapter = dm->adapter;
+	ADAPTER * adapter = (PADAPTER)(dm->adapter);
+	u8 idx = 0;
+	struct _RT_BEAMFORMEE_ENTRY *beamform_entry = phydm_beamforming_get_bfee_entry_by_addr(dm, RA, &idx);
+	/* @Frame control. */
 	SET_80211_HDR_FRAME_CONTROL(p_ndpa_frame, 0);
 	SET_80211_HDR_TYPE_AND_SUBTYPE(p_ndpa_frame, Type_NDPA);
 
 	SET_80211_HDR_ADDRESS1(p_ndpa_frame, RA);
-	SET_80211_HDR_ADDRESS2(p_ndpa_frame, p_beamform_entry->my_mac_addr);
+	SET_80211_HDR_ADDRESS2(p_ndpa_frame, beamform_entry->my_mac_addr);
 
+	// 2017/11 MH PHYDM compile. But why need to use windows maco?
+	// For all linux code, it should be useless?
 	duration = 2 * a_SifsTime + 44;
 
 	if (BW == CHANNEL_WIDTH_80)
@@ -341,178 +337,174 @@ construct_vht_ndpa_packet(
 
 	SET_80211_HDR_DURATION(p_ndpa_frame, duration);
 
-	sequence = *(p_dm->p_sounding_seq) << 2;
-	odm_move_memory(p_dm, p_ndpa_frame + 16, &sequence, 1);
+	sequence = *(dm->sounding_seq) << 2;
+	odm_move_memory(dm, p_ndpa_frame + 16, &sequence, 1);
 
-	if (phydm_acting_determine(p_dm, phydm_acting_as_ibss) || phydm_acting_determine(p_dm, phydm_acting_as_ap) == false)
+	if (phydm_acting_determine(dm, phydm_acting_as_ibss) || phydm_acting_determine(dm, phydm_acting_as_ap) == false)
 		AID = 0;
 
 	sta_info.aid = AID;
 	sta_info.feedback_type = 0;
 	sta_info.nc_index = 0;
 
-	odm_move_memory(p_dm, p_ndpa_frame + 17, (u8 *)&sta_info, 2);
+	odm_move_memory(dm, p_ndpa_frame + 17, (u8 *)&sta_info, 2);
 
 	*p_length = 19;
 }
 
-
 boolean
 send_fw_vht_ndpa_packet(
-	void			*p_dm_void,
-	u8			*RA,
-	u16			AID,
-	enum channel_width	BW
-)
+	void *dm_void,
+	u8 *RA,
+	u16 AID,
+	enum channel_width BW)
 {
-	struct PHY_DM_STRUCT				*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	struct _ADAPTER				*adapter = p_dm->adapter;
-	PRT_TCB					p_tcb;
-	PRT_TX_LOCAL_BUFFER		p_buf;
-	boolean					ret = true;
-	u32					buf_len;
-	u8					*buf_addr;
-	u8					desc_len = 0, idx = 0, ndp_tx_rate = 0;
-	struct _ADAPTER				*p_def_adapter = GetDefaultAdapter(adapter);
-	HAL_DATA_TYPE			*p_hal_data = GET_HAL_DATA(adapter);
-	struct _RT_BEAMFORMEE_ENTRY	*p_beamform_entry = phydm_beamforming_get_bfee_entry_by_addr(p_dm, RA, &idx);
-
-	PHYDM_DBG(p_dm, DBG_TXBF, ("[%s] Start!\n", __func__));
-
-	if (p_beamform_entry == NULL)
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	void *adapter = dm->adapter;
+	PRT_TCB tcb;
+	PRT_TX_LOCAL_BUFFER p_buf;
+	boolean ret = true;
+	u32 buf_len;
+	u8 *buf_addr;
+	u8 desc_len = 0, idx = 0, ndp_tx_rate = 0;
+	void *p_def_adapter = GetDefaultAdapter(((PADAPTER)adapter));
+	HAL_DATA_TYPE *hal_data = GET_HAL_DATA(((PADAPTER)adapter));
+	struct _RT_BEAMFORMEE_ENTRY *beamform_entry = phydm_beamforming_get_bfee_entry_by_addr(dm, RA, &idx);
+
+	PHYDM_DBG(dm, DBG_TXBF, "[%s] Start!\n", __func__);
+
+	if (beamform_entry == NULL)
 		return false;
 
-	ndp_tx_rate = beamforming_get_vht_ndp_tx_rate(p_dm, p_beamform_entry->comp_steering_num_of_bfer);
-	PHYDM_DBG(p_dm, DBG_TXBF, ("[%s] ndp_tx_rate =%d\n", __func__, ndp_tx_rate));
+	ndp_tx_rate = beamforming_get_vht_ndp_tx_rate(dm, beamform_entry->comp_steering_num_of_bfer);
+	PHYDM_DBG(dm, DBG_TXBF, "[%s] ndp_tx_rate =%d\n", __func__,
+		  ndp_tx_rate);
 
 	PlatformAcquireSpinLock(adapter, RT_TX_SPINLOCK);
 
-	if (MgntGetFWBuffer(p_def_adapter, &p_tcb, &p_buf)) {
+	if (MgntGetFWBuffer(p_def_adapter, &tcb, &p_buf)) {
 #if (DEV_BUS_TYPE != RT_PCI_INTERFACE)
-		desc_len = adapter->HWDescHeadLength - p_hal_data->USBALLDummyLength;
+		desc_len = ((PADAPTER)adapter)->HWDescHeadLength - hal_data->USBALLDummyLength;
 #endif
 		buf_addr = p_buf->Buffer.VirtualAddress + desc_len;
 
 		construct_vht_ndpa_packet(
-			p_dm,
+			dm,
 			RA,
 			AID,
 			buf_addr,
 			&buf_len,
-			BW
-		);
+			BW);
 
-		p_tcb->PacketLength = buf_len + desc_len;
+		tcb->PacketLength = buf_len + desc_len;
 
-		p_tcb->bTxEnableSwCalcDur = true;
+		tcb->bTxEnableSwCalcDur = true;
 
-		p_tcb->BWOfPacket = BW;
+		tcb->BWOfPacket = BW;
 
-		if (phydm_acting_determine(p_dm, phydm_acting_as_ibss) || phydm_acting_determine(p_dm, phydm_acting_as_ap))
-			p_tcb->G_ID = 63;
+		if (phydm_acting_determine(dm, phydm_acting_as_ibss) || phydm_acting_determine(dm, phydm_acting_as_ap))
+			tcb->G_ID = 63;
 
-		p_tcb->P_AID = p_beamform_entry->p_aid;
-		p_tcb->DataRate = ndp_tx_rate;	/*decide by nr*/
+		tcb->P_AID = beamform_entry->p_aid;
+		tcb->DataRate = ndp_tx_rate; /*@decide by nr*/
 
-		adapter->HalFunc.CmdSendPacketHandler(adapter, p_tcb, p_buf, p_tcb->PacketLength, DESC_PACKET_TYPE_NORMAL, false);
+		((PADAPTER)adapter)->HalFunc.CmdSendPacketHandler(adapter, tcb, p_buf, tcb->PacketLength, DESC_PACKET_TYPE_NORMAL, false);
 	} else
 		ret = false;
 
 	PlatformReleaseSpinLock(adapter, RT_TX_SPINLOCK);
 
-	PHYDM_DBG(p_dm, DBG_TXBF, ("[%s] End, ret=%d\n", __func__, ret));
+	PHYDM_DBG(dm, DBG_TXBF, "[%s] End, ret=%d\n", __func__, ret);
 
 	if (ret)
-		RT_DISP_DATA(FBEAM, FBEAM_DATA, "", p_buf->Buffer.VirtualAddress, p_tcb->PacketLength);
+		RT_DISP_DATA(FBEAM, FBEAM_DATA, "", p_buf->Buffer.VirtualAddress, tcb->PacketLength);
 
 	return ret;
 }
 
-
-
 boolean
 send_sw_vht_ndpa_packet(
-	void			*p_dm_void,
-	u8			*RA,
-	u16			AID,
-	enum channel_width	BW
-)
+	void *dm_void,
+	u8 *RA,
+	u16 AID,
+	enum channel_width BW)
 {
-	struct PHY_DM_STRUCT				*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	struct _ADAPTER				*adapter = p_dm->adapter;
-	PRT_TCB					p_tcb;
-	PRT_TX_LOCAL_BUFFER		p_buf;
-	boolean					ret = true;
-	u8					idx = 0, ndp_tx_rate = 0;
-	struct _RT_BEAMFORMEE_ENTRY	*p_beamform_entry = phydm_beamforming_get_bfee_entry_by_addr(p_dm, RA, &idx);
-
-	ndp_tx_rate = beamforming_get_vht_ndp_tx_rate(p_dm, p_beamform_entry->comp_steering_num_of_bfer);
-	PHYDM_DBG(p_dm, DBG_TXBF, ("[%s] ndp_tx_rate =%d\n", __func__, ndp_tx_rate));
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	void *adapter = dm->adapter;
+	PRT_TCB tcb;
+	PRT_TX_LOCAL_BUFFER p_buf;
+	boolean ret = true;
+	u8 idx = 0, ndp_tx_rate = 0;
+	struct _RT_BEAMFORMEE_ENTRY *beamform_entry = phydm_beamforming_get_bfee_entry_by_addr(dm, RA, &idx);
+
+	ndp_tx_rate = beamforming_get_vht_ndp_tx_rate(dm, beamform_entry->comp_steering_num_of_bfer);
+	PHYDM_DBG(dm, DBG_TXBF, "[%s] ndp_tx_rate =%d\n", __func__,
+		  ndp_tx_rate);
 
 	PlatformAcquireSpinLock(adapter, RT_TX_SPINLOCK);
 
-	if (MgntGetBuffer(adapter, &p_tcb, &p_buf)) {
+	if (MgntGetBuffer(adapter, &tcb, &p_buf)) {
 		construct_vht_ndpa_packet(
-			p_dm,
+			dm,
 			RA,
 			AID,
 			p_buf->Buffer.VirtualAddress,
-			&p_tcb->PacketLength,
-			BW
-		);
+			&tcb->PacketLength,
+			BW);
 
-		p_tcb->bTxEnableSwCalcDur = true;
-		p_tcb->BWOfPacket = BW;
+		tcb->bTxEnableSwCalcDur = true;
+		tcb->BWOfPacket = BW;
 
 		/*rate of NDP decide by nr*/
-		MgntSendPacket(adapter, p_tcb, p_buf, p_tcb->PacketLength, NORMAL_QUEUE, ndp_tx_rate);
+		MgntSendPacket(adapter, tcb, p_buf, tcb->PacketLength, NORMAL_QUEUE, ndp_tx_rate);
 	} else
 		ret = false;
 
 	PlatformReleaseSpinLock(adapter, RT_TX_SPINLOCK);
 
 	if (ret)
-		RT_DISP_DATA(FBEAM, FBEAM_DATA, "", p_buf->Buffer.VirtualAddress, p_tcb->PacketLength);
+		RT_DISP_DATA(FBEAM, FBEAM_DATA, "", p_buf->Buffer.VirtualAddress, tcb->PacketLength);
 
 	return ret;
 }
 
 #ifdef SUPPORT_MU_BF
 #if (SUPPORT_MU_BF == 1)
-/*
+/*@
  * Description: On VHT GID management frame by an MU beamformee.
  *
  * 2015.05.20. Created by tynli.
  */
 enum rt_status
 beamforming_get_vht_gid_mgnt_frame(
-	struct _ADAPTER		*adapter,
-	PRT_RFD			p_rfd,
-	POCTET_STRING	p_pdu_os
-)
+	void *adapter,
+	PRT_RFD rfd,
+	POCTET_STRING p_pdu_os)
 {
-	HAL_DATA_TYPE	*p_hal_data = GET_HAL_DATA(adapter);
-	struct PHY_DM_STRUCT		*p_dm = &p_hal_data->DM_OutSrc;
-	enum rt_status		rt_status = RT_STATUS_SUCCESS;
-	u8			*p_buffer = NULL;
-	u8			*p_raddr = NULL;
-	u8			mem_status[8] = {0}, user_pos[16] = {0};
-	u8			idx;
-	struct _RT_BEAMFORMING_INFO	*p_beam_info = &(p_dm->beamforming_info);
-	struct _RT_BEAMFORMER_ENTRY	*p_beamform_entry = &p_beam_info->beamformer_entry[p_beam_info->mu_ap_index];
-
-	PHYDM_DBG(p_dm, DBG_TXBF, ("[%s] On VHT GID mgnt frame!\n", __func__));
-
-	/* Check length*/
+	HAL_DATA_TYPE *hal_data = GET_HAL_DATA(((PADAPTER)adapter));
+	struct dm_struct *dm = &hal_data->DM_OutSrc;
+	enum rt_status rt_status = RT_STATUS_SUCCESS;
+	u8 *p_buffer = NULL;
+	u8 *p_raddr = NULL;
+	u8 mem_status[8] = {0}, user_pos[16] = {0};
+	u8 idx;
+	struct _RT_BEAMFORMING_INFO *beam_info = &(dm->beamforming_info);
+	struct _RT_BEAMFORMER_ENTRY *beamform_entry = &beam_info->beamformer_entry[beam_info->mu_ap_index];
+
+	PHYDM_DBG(dm, DBG_TXBF, "[%s] On VHT GID mgnt frame!\n", __func__);
+
+	/* @Check length*/
 	if (p_pdu_os->length < (FRAME_OFFSET_VHT_GID_MGNT_USER_POSITION_ARRAY + 16)) {
-		PHYDM_DBG(p_dm, DBG_TXBF, ("beamforming_get_vht_gid_mgnt_frame(): Invalid length (%d)\n", p_pdu_os->length));
+		PHYDM_DBG(dm, DBG_TXBF, "%s: Invalid length (%d)\n", __func__,
+			  p_pdu_os->length);
 		return RT_STATUS_INVALID_LENGTH;
 	}
 
-	/* Check RA*/
+	/* @Check RA*/
 	p_raddr = (u8 *)(p_pdu_os->Octet) + 4;
 	if (!eq_mac_addr(p_raddr, adapter->CurrentAddress)) {
-		PHYDM_DBG(p_dm, DBG_TXBF, ("beamforming_get_vht_gid_mgnt_frame(): Drop because of RA error.\n"));
+		PHYDM_DBG(dm, DBG_TXBF, "%s: Drop because of RA error.\n",
+			  __func__);
 		return RT_STATUS_PKT_DROP;
 	}
 
@@ -522,7 +514,7 @@ beamforming_get_vht_gid_mgnt_frame(
 	p_buffer = p_pdu_os->Octet + FRAME_OFFSET_VHT_GID_MGNT_MEMBERSHIP_STATUS_ARRAY;
 	for (idx = 0; idx < 8; idx++) {
 		mem_status[idx] = GET_VHT_GID_MGNT_INFO_MEMBERSHIP_STATUS(p_buffer + idx);
-		p_beamform_entry->gid_valid[idx] = GET_VHT_GID_MGNT_INFO_MEMBERSHIP_STATUS(p_buffer + idx);
+		beamform_entry->gid_valid[idx] = GET_VHT_GID_MGNT_INFO_MEMBERSHIP_STATUS(p_buffer + idx);
 	}
 
 	RT_DISP_DATA(FBEAM, FBEAM_DATA, "mem_status: ", mem_status, 8);
@@ -531,37 +523,37 @@ beamforming_get_vht_gid_mgnt_frame(
 	p_buffer = p_pdu_os->Octet + FRAME_OFFSET_VHT_GID_MGNT_USER_POSITION_ARRAY;
 	for (idx = 0; idx < 16; idx++) {
 		user_pos[idx] = GET_VHT_GID_MGNT_INFO_USER_POSITION(p_buffer + idx);
-		p_beamform_entry->user_position[idx] = GET_VHT_GID_MGNT_INFO_USER_POSITION(p_buffer + idx);
+		beamform_entry->user_position[idx] = GET_VHT_GID_MGNT_INFO_USER_POSITION(p_buffer + idx);
 	}
 
 	RT_DISP_DATA(FBEAM, FBEAM_DATA, "user_pos: ", user_pos, 16);
 
-	/* Group ID detail printed*/
+	/* @Group ID detail printed*/
 	{
-		u8	i, j;
-		u8	tmp_val;
-		u16	tmp_val2;
+		u8 i, j;
+		u8 tmp_val;
+		u16 tmp_val2;
 
 		for (i = 0; i < 8; i++) {
 			tmp_val = mem_status[i];
 			tmp_val2 = ((user_pos[i * 2 + 1] << 8) & 0xFF00) + (user_pos[i * 2] & 0xFF);
 			for (j = 0; j < 8; j++) {
 				if ((tmp_val >> j) & BIT(0)) {
-					PHYDM_DBG(p_dm, DBG_TXBF, ("Use Group ID (%d), User Position (%d)\n",
-						(i * 8 + j), (tmp_val2 >> 2 * j) & 0x3));
+					PHYDM_DBG(dm, DBG_TXBF, "Use Group ID (%d), User Position (%d)\n",
+						  (i * 8 + j), (tmp_val2 >> 2 * j) & 0x3);
 				}
 			}
 		}
 	}
 
-	/* Indicate GID frame to IHV service. */
+	/* @Indicate GID frame to IHV service. */
 	{
-		u8	indibuffer[24] = {0};
-		u8	indioffset = 0;
+		u8 indibuffer[24] = {0};
+		u8 indioffset = 0;
 
-		PlatformMoveMemory(indibuffer + indioffset, p_beamform_entry->gid_valid, 8);
+		PlatformMoveMemory(indibuffer + indioffset, beamform_entry->gid_valid, 8);
 		indioffset += 8;
-		PlatformMoveMemory(indibuffer + indioffset, p_beamform_entry->user_position, 16);
+		PlatformMoveMemory(indibuffer + indioffset, beamform_entry->user_position, 16);
 		indioffset += 16;
 
 		PlatformIndicateCustomStatus(
@@ -572,30 +564,29 @@ beamforming_get_vht_gid_mgnt_frame(
 			indioffset);
 	}
 
-	/* Config HW GID table */
-	hal_com_txbf_config_gtab(p_dm);
+	/* @Config HW GID table */
+	hal_com_txbf_config_gtab(dm);
 
 	return rt_status;
 }
 
-/*
+/*@
  * Description: Construct VHT Group ID (GID) management frame.
  *
  * 2015.05.20. Created by tynli.
  */
-void
-construct_vht_gid_mgnt_frame(
-	struct PHY_DM_STRUCT		*p_dm,
-	u8			*RA,
-	struct _RT_BEAMFORMEE_ENTRY	*p_beamform_entry,
-	u8			*buffer,
-	u32			*p_length
-
-)
+void construct_vht_gid_mgnt_frame(
+	struct dm_struct *dm,
+	u8 *RA,
+	struct _RT_BEAMFORMEE_ENTRY *beamform_entry,
+	u8 *buffer,
+	u32 *p_length
+
+	)
 {
-	struct _RT_BEAMFORMING_INFO	*p_beam_info = &(p_dm->beamforming_info);
-	struct _ADAPTER				*adapter = p_beam_info->source_adapter;
-	OCTET_STRING		os_ftm_frame, tmp;
+	struct _RT_BEAMFORMING_INFO *beam_info = &(dm->beamforming_info);
+	void *adapter = beam_info->source_adapter;
+	OCTET_STRING os_ftm_frame, tmp;
 
 	FillOctetString(os_ftm_frame, buffer, 0);
 	*p_length = 0;
@@ -607,12 +598,12 @@ construct_vht_gid_mgnt_frame(
 		ACT_VHT_GROUPID_MANAGEMENT,
 		&os_ftm_frame);
 
-	/* Membership status array*/
-	FillOctetString(tmp, p_beamform_entry->gid_valid, 8);
+	/* @Membership status array*/
+	FillOctetString(tmp, beamform_entry->gid_valid, 8);
 	PacketAppendData(&os_ftm_frame, tmp);
 
 	/* User Position array*/
-	FillOctetString(tmp, p_beamform_entry->user_position, 16);
+	FillOctetString(tmp, beamform_entry->user_position, 16);
 	PacketAppendData(&os_ftm_frame, tmp);
 
 	*p_length = os_ftm_frame.length;
@@ -622,70 +613,65 @@ construct_vht_gid_mgnt_frame(
 
 boolean
 send_sw_vht_gid_mgnt_frame(
-	void			*p_dm_void,
-	u8			*RA,
-	u8			idx
-)
+	void *dm_void,
+	u8 *RA,
+	u8 idx)
 {
-	struct PHY_DM_STRUCT				*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	PRT_TCB					p_tcb;
-	PRT_TX_LOCAL_BUFFER		p_buf;
-	boolean					ret = true;
-	u8					data_rate = 0;
-	struct _RT_BEAMFORMING_INFO	*p_beam_info = &(p_dm->beamforming_info);
-	struct _RT_BEAMFORMEE_ENTRY	*p_beamform_entry = &p_beam_info->beamformee_entry[idx];
-	struct _ADAPTER				*adapter = p_beam_info->source_adapter;
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	PRT_TCB tcb;
+	PRT_TX_LOCAL_BUFFER p_buf;
+	boolean ret = true;
+	u8 data_rate = 0;
+	struct _RT_BEAMFORMING_INFO *beam_info = &(dm->beamforming_info);
+	struct _RT_BEAMFORMEE_ENTRY *beamform_entry = &beam_info->beamformee_entry[idx];
+	void *adapter = beam_info->source_adapter;
 
-	PHYDM_DBG(p_dm, DBG_TXBF, ("[%s] Start!\n", __func__));
+	PHYDM_DBG(dm, DBG_TXBF, "[%s] Start!\n", __func__);
 
 	PlatformAcquireSpinLock(adapter, RT_TX_SPINLOCK);
 
-	if (MgntGetBuffer(adapter, &p_tcb, &p_buf)) {
+	if (MgntGetBuffer(adapter, &tcb, &p_buf)) {
 		construct_vht_gid_mgnt_frame(
-			p_dm,
+			dm,
 			RA,
-			p_beamform_entry,
+			beamform_entry,
 			p_buf->Buffer.VirtualAddress,
-			&p_tcb->PacketLength
-		);
+			&tcb->PacketLength);
 
-		p_tcb->bw_of_packet = CHANNEL_WIDTH_20;
+		tcb->bw_of_packet = CHANNEL_WIDTH_20;
 		data_rate = MGN_6M;
-		MgntSendPacket(adapter, p_tcb, p_buf, p_tcb->PacketLength, NORMAL_QUEUE, data_rate);
+		MgntSendPacket(adapter, tcb, p_buf, tcb->PacketLength, NORMAL_QUEUE, data_rate);
 	} else
 		ret = false;
 
 	PlatformReleaseSpinLock(adapter, RT_TX_SPINLOCK);
 
 	if (ret)
-		RT_DISP_DATA(FBEAM, FBEAM_DATA, "", p_buf->Buffer.VirtualAddress, p_tcb->PacketLength);
+		RT_DISP_DATA(FBEAM, FBEAM_DATA, "", p_buf->Buffer.VirtualAddress, tcb->PacketLength);
 
 	return ret;
 }
 
-
-/*
+/*@
  * Description: Construct VHT beamforming report poll.
  *
  * 2015.05.20. Created by tynli.
  */
-void
-construct_vht_bf_report_poll(
-	struct PHY_DM_STRUCT		*p_dm,
-	u8			*RA,
-	u8			*buffer,
-	u32			*p_length
-)
+void construct_vht_bf_report_poll(
+	struct dm_struct *dm,
+	u8 *RA,
+	u8 *buffer,
+	u32 *p_length)
 {
-	struct _RT_BEAMFORMING_INFO	*p_beam_info = &(p_dm->beamforming_info);
-	struct _ADAPTER				*adapter = p_beam_info->source_adapter;
-	u8			*p_bf_rpt_poll = buffer;
+	struct _RT_BEAMFORMING_INFO *beam_info = &(dm->beamforming_info);
+	void *adapter = beam_info->source_adapter;
+	u8 *p_bf_rpt_poll = buffer;
 
-	/* Frame control*/
+	/* @Frame control*/
 	SET_80211_HDR_FRAME_CONTROL(p_bf_rpt_poll, 0);
 	SET_80211_HDR_TYPE_AND_SUBTYPE(p_bf_rpt_poll, Type_Beamforming_Report_Poll);
 
-	/* duration*/
+	/* @duration*/
 	SET_80211_HDR_DURATION(p_bf_rpt_poll, 100);
 
 	/* RA*/
@@ -694,111 +680,105 @@ construct_vht_bf_report_poll(
 	/* TA*/
 	SET_VHT_BF_REPORT_POLL_TA(p_bf_rpt_poll, adapter->CurrentAddress);
 
-	/* Feedback Segment Retransmission Bitmap*/
+	/* @Feedback Segment Retransmission Bitmap*/
 	SET_VHT_BF_REPORT_POLL_FEEDBACK_SEG_RETRAN_BITMAP(p_bf_rpt_poll, 0xFF);
 
 	*p_length = 17;
 
 	RT_DISP_DATA(FBEAM, FBEAM_DATA, "construct_vht_bf_report_poll():\n", buffer, *p_length);
-
 }
 
 boolean
 send_sw_vht_bf_report_poll(
-	void			*p_dm_void,
-	u8			*RA,
-	boolean			is_final_poll
-)
+	void *dm_void,
+	u8 *RA,
+	boolean is_final_poll)
 {
-	struct PHY_DM_STRUCT				*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	PRT_TCB					p_tcb;
-	PRT_TX_LOCAL_BUFFER		p_buf;
-	boolean					ret = true;
-	u8					idx = 0, data_rate = 0;
-	struct _RT_BEAMFORMING_INFO	*p_beam_info = &(p_dm->beamforming_info);
-	struct _RT_BEAMFORMEE_ENTRY	*p_beamform_entry = phydm_beamforming_get_bfee_entry_by_addr(p_dm, RA, &idx);
-	struct _ADAPTER				*adapter = p_beam_info->source_adapter;
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	PRT_TCB tcb;
+	PRT_TX_LOCAL_BUFFER p_buf;
+	boolean ret = true;
+	u8 idx = 0, data_rate = 0;
+	struct _RT_BEAMFORMING_INFO *beam_info = &(dm->beamforming_info);
+	struct _RT_BEAMFORMEE_ENTRY *beamform_entry = phydm_beamforming_get_bfee_entry_by_addr(dm, RA, &idx);
+	void *adapter = beam_info->source_adapter;
 
-	PHYDM_DBG(p_dm, DBG_TXBF, ("[%s] Start!\n", __func__));
+	PHYDM_DBG(dm, DBG_TXBF, "[%s] Start!\n", __func__);
 
 	PlatformAcquireSpinLock(adapter, RT_TX_SPINLOCK);
 
-	if (MgntGetBuffer(adapter, &p_tcb, &p_buf)) {
+	if (MgntGetBuffer(adapter, &tcb, &p_buf)) {
 		construct_vht_bf_report_poll(
-			p_dm,
+			dm,
 			RA,
 			p_buf->Buffer.VirtualAddress,
-			&p_tcb->PacketLength
-		);
+			&tcb->PacketLength);
 
-		p_tcb->bTxEnableSwCalcDur = true; /* <tynli_note> need?*/
-		p_tcb->BWOfPacket = CHANNEL_WIDTH_20;
+		tcb->bTxEnableSwCalcDur = true; /* @<tynli_note> need?*/
+		tcb->BWOfPacket = CHANNEL_WIDTH_20;
 
 		if (is_final_poll)
-			p_tcb->TxBFPktType = RT_BF_PKT_TYPE_FINAL_BF_REPORT_POLL;
+			tcb->TxBFPktType = RT_BF_PKT_TYPE_FINAL_BF_REPORT_POLL;
 		else
-			p_tcb->TxBFPktType = RT_BF_PKT_TYPE_BF_REPORT_POLL;
+			tcb->TxBFPktType = RT_BF_PKT_TYPE_BF_REPORT_POLL;
 
-		data_rate = MGN_6M;	/* Legacy OFDM rate*/
-		MgntSendPacket(adapter, p_tcb, p_buf, p_tcb->PacketLength, NORMAL_QUEUE, data_rate);
+		data_rate = MGN_6M; /* @Legacy OFDM rate*/
+		MgntSendPacket(adapter, tcb, p_buf, tcb->PacketLength, NORMAL_QUEUE, data_rate);
 	} else
 		ret = false;
 
 	PlatformReleaseSpinLock(adapter, RT_TX_SPINLOCK);
 
 	if (ret)
-		RT_DISP_DATA(FBEAM, FBEAM_DATA, "send_sw_vht_bf_report_poll():\n", p_buf->Buffer.VirtualAddress, p_tcb->PacketLength);
+		RT_DISP_DATA(FBEAM, FBEAM_DATA, "send_sw_vht_bf_report_poll:\n",
+		p_buf->Buffer.VirtualAddress, tcb->PacketLength);
 
 	return ret;
-
 }
 
-
-/*
+/*@
  * Description: Construct VHT MU NDPA packet.
  *	<Note> We should combine this function with construct_vht_ndpa_packet() in the future.
  *
  * 2015.05.21. Created by tynli.
  */
-void
-construct_vht_mu_ndpa_packet(
-	struct PHY_DM_STRUCT		*p_dm,
-	enum channel_width	BW,
-	u8			*buffer,
-	u32			*p_length
-)
+void construct_vht_mu_ndpa_packet(
+	struct dm_struct *dm,
+	enum channel_width BW,
+	u8 *buffer,
+	u32 *p_length)
 {
-	struct _RT_BEAMFORMING_INFO	*p_beam_info = &(p_dm->beamforming_info);
-	struct _ADAPTER				*adapter = p_beam_info->source_adapter;
-	u16					duration = 0;
-	u8					sequence = 0;
-	u8					*p_ndpa_frame = buffer;
-	struct _RT_NDPA_STA_INFO		sta_info;
-	u8					idx;
-	u8					dest_addr[6] = {0};
-	struct _RT_BEAMFORMEE_ENTRY	*p_entry = NULL;
-
-	/* Fill the first MU BFee entry (STA1) MAC addr to destination address then
+	struct _RT_BEAMFORMING_INFO *beam_info = &(dm->beamforming_info);
+	void *adapter = beam_info->source_adapter;
+	u16 duration = 0;
+	u8 sequence = 0;
+	u8 *p_ndpa_frame = buffer;
+	struct _RT_NDPA_STA_INFO sta_info;
+	u8 idx;
+	u8 dest_addr[6] = {0};
+	struct _RT_BEAMFORMEE_ENTRY *entry = NULL;
+
+	/* @Fill the first MU BFee entry (STA1) MAC addr to destination address then
 	     HW will change A1 to broadcast addr. 2015.05.28. Suggested by SD1 Chunchu. */
 	for (idx = 0; idx < BEAMFORMEE_ENTRY_NUM; idx++) {
-		p_entry = &(p_beam_info->beamformee_entry[idx]);
-		if (p_entry->is_mu_sta) {
-			cp_mac_addr(dest_addr, p_entry->mac_addr);
+		entry = &(beam_info->beamformee_entry[idx]);
+		if (entry->is_mu_sta) {
+			cp_mac_addr(dest_addr, entry->mac_addr);
 			break;
 		}
 	}
-	if (p_entry == NULL)
+	if (entry == NULL)
 		return;
 
-	/* Frame control.*/
+	/* @Frame control.*/
 	SET_80211_HDR_FRAME_CONTROL(p_ndpa_frame, 0);
 	SET_80211_HDR_TYPE_AND_SUBTYPE(p_ndpa_frame, Type_NDPA);
 
 	SET_80211_HDR_ADDRESS1(p_ndpa_frame, dest_addr);
-	SET_80211_HDR_ADDRESS2(p_ndpa_frame, p_entry->my_mac_addr);
+	SET_80211_HDR_ADDRESS2(p_ndpa_frame, entry->my_mac_addr);
 
-	/*--------------------------------------------*/
-	/* <Note> Need to modify "duration" to MU consideration. */
+	/*@--------------------------------------------*/
+	/* @<Note> Need to modify "duration" to MU consideration. */
 	duration = 2 * a_SifsTime + 44;
 
 	if (BW == CHANNEL_WIDTH_80)
@@ -807,122 +787,118 @@ construct_vht_mu_ndpa_packet(
 		duration += 87;
 	else
 		duration += 180;
-	/*--------------------------------------------*/
+	/*@--------------------------------------------*/
 
 	SET_80211_HDR_DURATION(p_ndpa_frame, duration);
 
-	sequence = *(p_dm->p_sounding_seq) << 2;
-	odm_move_memory(p_dm, p_ndpa_frame + 16, &sequence, 1);
+	sequence = *(dm->sounding_seq) << 2;
+	odm_move_memory(dm, p_ndpa_frame + 16, &sequence, 1);
 
 	*p_length = 17;
 
-	/* Construct STA info. for multiple STAs*/
+	/* @Construct STA info. for multiple STAs*/
 	for (idx = 0; idx < BEAMFORMEE_ENTRY_NUM; idx++) {
-		p_entry = &(p_beam_info->beamformee_entry[idx]);
-		if (p_entry->is_mu_sta) {
-			sta_info.aid = p_entry->AID;
-			sta_info.feedback_type = 1; /* 1'b1: MU*/
+		entry = &(beam_info->beamformee_entry[idx]);
+		if (entry->is_mu_sta) {
+			sta_info.aid = entry->AID;
+			sta_info.feedback_type = 1; /* @1'b1: MU*/
 			sta_info.nc_index = 0;
 
-			PHYDM_DBG(p_dm, DBG_TXBF, ("[%s] Get beamformee_entry idx(%d), AID =%d\n", __func__, idx, p_entry->AID));
+			PHYDM_DBG(dm, DBG_TXBF,
+				  "[%s] Get beamformee_entry idx(%d), AID =%d\n",
+				  __func__, idx, entry->AID);
 
-			odm_move_memory(p_dm, p_ndpa_frame + (*p_length), (u8 *)&sta_info, 2);
+			odm_move_memory(dm, p_ndpa_frame + (*p_length), (u8 *)&sta_info, 2);
 			*p_length += 2;
 		}
 	}
-
 }
 
 boolean
 send_sw_vht_mu_ndpa_packet(
-	void			*p_dm_void,
-	enum channel_width	BW
-)
+	void *dm_void,
+	enum channel_width BW)
 {
-	struct PHY_DM_STRUCT				*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	PRT_TCB					p_tcb;
-	PRT_TX_LOCAL_BUFFER		p_buf;
-	boolean					ret = true;
-	u8					ndp_tx_rate = 0;
-	struct _RT_BEAMFORMING_INFO	*p_beam_info = &(p_dm->beamforming_info);
-	struct _ADAPTER				*adapter = p_beam_info->source_adapter;
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	PRT_TCB tcb;
+	PRT_TX_LOCAL_BUFFER p_buf;
+	boolean ret = true;
+	u8 ndp_tx_rate = 0;
+	struct _RT_BEAMFORMING_INFO *beam_info = &(dm->beamforming_info);
+	void *adapter = beam_info->source_adapter;
 
 	ndp_tx_rate = MGN_VHT2SS_MCS0;
-	PHYDM_DBG(p_dm, DBG_TXBF, ("[%s] ndp_tx_rate =%d\n", __func__, ndp_tx_rate));
+	PHYDM_DBG(dm, DBG_TXBF, "[%s] ndp_tx_rate =%d\n", __func__,
+		  ndp_tx_rate);
 
 	PlatformAcquireSpinLock(adapter, RT_TX_SPINLOCK);
 
-	if (MgntGetBuffer(adapter, &p_tcb, &p_buf)) {
+	if (MgntGetBuffer(adapter, &tcb, &p_buf)) {
 		construct_vht_mu_ndpa_packet(
-			p_dm,
+			dm,
 			BW,
 			p_buf->Buffer.VirtualAddress,
-			&p_tcb->PacketLength
-		);
+			&tcb->PacketLength);
 
-		p_tcb->bTxEnableSwCalcDur = true;
-		p_tcb->BWOfPacket = BW;
-		p_tcb->TxBFPktType = RT_BF_PKT_TYPE_BROADCAST_NDPA;
+		tcb->bTxEnableSwCalcDur = true;
+		tcb->BWOfPacket = BW;
+		tcb->TxBFPktType = RT_BF_PKT_TYPE_BROADCAST_NDPA;
 
 		/*rate of NDP decide by nr*/
-		MgntSendPacket(adapter, p_tcb, p_buf, p_tcb->PacketLength, NORMAL_QUEUE, ndp_tx_rate);
+		MgntSendPacket(adapter, tcb, p_buf, tcb->PacketLength, NORMAL_QUEUE, ndp_tx_rate);
 	} else
 		ret = false;
 
 	PlatformReleaseSpinLock(adapter, RT_TX_SPINLOCK);
 
 	if (ret)
-		RT_DISP_DATA(FBEAM, FBEAM_DATA, "", p_buf->Buffer.VirtualAddress, p_tcb->PacketLength);
+		RT_DISP_DATA(FBEAM, FBEAM_DATA, "", p_buf->Buffer.VirtualAddress, tcb->PacketLength);
 
 	return ret;
 }
 
-
-void
-dbg_construct_vht_mundpa_packet(
-	struct PHY_DM_STRUCT		*p_dm,
-	enum channel_width	BW,
-	u8			*buffer,
-	u32			*p_length
-)
+void dbg_construct_vht_mundpa_packet(
+	struct dm_struct *dm,
+	enum channel_width BW,
+	u8 *buffer,
+	u32 *p_length)
 {
-	struct _RT_BEAMFORMING_INFO	*p_beam_info = &(p_dm->beamforming_info);
-	struct _ADAPTER				*adapter = p_beam_info->source_adapter;
-	u16					duration = 0;
-	u8					sequence = 0;
-	u8					*p_ndpa_frame = buffer;
-	struct _RT_NDPA_STA_INFO		sta_info;
-	u8					idx;
-	u8					dest_addr[6] = {0};
-	struct _RT_BEAMFORMEE_ENTRY	*p_entry = NULL;
-
-	boolean	is_STA1 = false;
-
-
-	/* Fill the first MU BFee entry (STA1) MAC addr to destination address then
+	struct _RT_BEAMFORMING_INFO *beam_info = &(dm->beamforming_info);
+	void *adapter = beam_info->source_adapter;
+	u16 duration = 0;
+	u8 sequence = 0;
+	u8 *p_ndpa_frame = buffer;
+	struct _RT_NDPA_STA_INFO sta_info;
+	u8 idx;
+	u8 dest_addr[6] = {0};
+	struct _RT_BEAMFORMEE_ENTRY *entry = NULL;
+
+	boolean is_STA1 = false;
+
+	/* @Fill the first MU BFee entry (STA1) MAC addr to destination address then
 	     HW will change A1 to broadcast addr. 2015.05.28. Suggested by SD1 Chunchu. */
 	for (idx = 0; idx < BEAMFORMEE_ENTRY_NUM; idx++) {
-		p_entry = &(p_beam_info->beamformee_entry[idx]);
-		if (p_entry->is_mu_sta) {
+		entry = &(beam_info->beamformee_entry[idx]);
+		if (entry->is_mu_sta) {
 			if (is_STA1 == false) {
 				is_STA1 = true;
 				continue;
 			} else {
-				cp_mac_addr(dest_addr, p_entry->mac_addr);
+				cp_mac_addr(dest_addr, entry->mac_addr);
 				break;
 			}
 		}
 	}
 
-	/* Frame control.*/
+	/* @Frame control.*/
 	SET_80211_HDR_FRAME_CONTROL(p_ndpa_frame, 0);
 	SET_80211_HDR_TYPE_AND_SUBTYPE(p_ndpa_frame, Type_NDPA);
 
 	SET_80211_HDR_ADDRESS1(p_ndpa_frame, dest_addr);
-	SET_80211_HDR_ADDRESS2(p_ndpa_frame, p_dm->CurrentAddress);
+	SET_80211_HDR_ADDRESS2(p_ndpa_frame, dm->CurrentAddress);
 
-	/*--------------------------------------------*/
-	/* <Note> Need to modify "duration" to MU consideration. */
+	/*@--------------------------------------------*/
+	/* @<Note> Need to modify "duration" to MU consideration. */
 	duration = 2 * a_SifsTime + 44;
 
 	if (BW == CHANNEL_WIDTH_80)
@@ -931,135 +907,127 @@ dbg_construct_vht_mundpa_packet(
 		duration += 87;
 	else
 		duration += 180;
-	/*--------------------------------------------*/
+	/*@--------------------------------------------*/
 
 	SET_80211_HDR_DURATION(p_ndpa_frame, duration);
 
-	sequence = *(p_dm->p_sounding_seq) << 2;
-	odm_move_memory(p_dm, p_ndpa_frame + 16, &sequence, 1);
+	sequence = *(dm->sounding_seq) << 2;
+	odm_move_memory(dm, p_ndpa_frame + 16, &sequence, 1);
 
 	*p_length = 17;
 
 	/*STA2's STA Info*/
-	sta_info.aid = p_entry->aid;
-	sta_info.feedback_type = 1; /* 1'b1: MU */
+	sta_info.aid = entry->aid;
+	sta_info.feedback_type = 1; /* @1'b1: MU */
 	sta_info.nc_index = 0;
 
-	PHYDM_DBG(p_dm, DBG_TXBF, ("[%s] Get beamformee_entry idx(%d), AID =%d\n", __func__, idx, p_entry->aid));
+	PHYDM_DBG(dm, DBG_TXBF, "[%s] Get beamformee_entry idx(%d), AID =%d\n",
+		  __func__, idx, entry->aid);
 
-	odm_move_memory(p_dm, p_ndpa_frame + (*p_length), (u8 *)&sta_info, 2);
+	odm_move_memory(dm, p_ndpa_frame + (*p_length), (u8 *)&sta_info, 2);
 	*p_length += 2;
-
 }
 
 boolean
 dbg_send_sw_vht_mundpa_packet(
-	void			*p_dm_void,
-	enum channel_width	BW
-)
+	void *dm_void,
+	enum channel_width BW)
 {
-	struct PHY_DM_STRUCT				*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	PRT_TCB					p_tcb;
-	PRT_TX_LOCAL_BUFFER		p_buf;
-	boolean					ret = true;
-	u8					ndp_tx_rate = 0;
-	struct _RT_BEAMFORMING_INFO	*p_beam_info = &(p_dm->beamforming_info);
-	struct _ADAPTER				*adapter = p_beam_info->source_adapter;
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	PRT_TCB tcb;
+	PRT_TX_LOCAL_BUFFER p_buf;
+	boolean ret = true;
+	u8 ndp_tx_rate = 0;
+	struct _RT_BEAMFORMING_INFO *beam_info = &(dm->beamforming_info);
+	void *adapter = beam_info->source_adapter;
 
 	ndp_tx_rate = MGN_VHT2SS_MCS0;
-	PHYDM_DBG(p_dm, DBG_TXBF, ("[%s] ndp_tx_rate =%d\n", __func__, ndp_tx_rate));
+	PHYDM_DBG(dm, DBG_TXBF, "[%s] ndp_tx_rate =%d\n", __func__,
+		  ndp_tx_rate);
 
 	PlatformAcquireSpinLock(adapter, RT_TX_SPINLOCK);
 
-	if (MgntGetBuffer(adapter, &p_tcb, &p_buf)) {
+	if (MgntGetBuffer(adapter, &tcb, &p_buf)) {
 		dbg_construct_vht_mundpa_packet(
-			p_dm,
+			dm,
 			BW,
 			p_buf->Buffer.VirtualAddress,
-			&p_tcb->PacketLength
-		);
+			&tcb->PacketLength);
 
-		p_tcb->bTxEnableSwCalcDur = true;
-		p_tcb->BWOfPacket = BW;
-		p_tcb->TxBFPktType = RT_BF_PKT_TYPE_UNICAST_NDPA;
+		tcb->bTxEnableSwCalcDur = true;
+		tcb->BWOfPacket = BW;
+		tcb->TxBFPktType = RT_BF_PKT_TYPE_UNICAST_NDPA;
 
 		/*rate of NDP decide by nr*/
-		MgntSendPacket(adapter, p_tcb, p_buf, p_tcb->PacketLength, NORMAL_QUEUE, ndp_tx_rate);
+		MgntSendPacket(adapter, tcb, p_buf, tcb->PacketLength, NORMAL_QUEUE, ndp_tx_rate);
 	} else
 		ret = false;
 
 	PlatformReleaseSpinLock(adapter, RT_TX_SPINLOCK);
 
 	if (ret)
-		RT_DISP_DATA(FBEAM, FBEAM_DATA, "", p_buf->Buffer.VirtualAddress, p_tcb->PacketLength);
+		RT_DISP_DATA(FBEAM, FBEAM_DATA, "", p_buf->Buffer.VirtualAddress, tcb->PacketLength);
 
 	return ret;
 }
 
-
-#endif	/*#if (SUPPORT_MU_BF == 1)*/
-#endif	/*#ifdef SUPPORT_MU_BF*/
-
+#endif /*@#if (SUPPORT_MU_BF == 1)*/
+#endif /*@#ifdef SUPPORT_MU_BF*/
 
 #elif (DM_ODM_SUPPORT_TYPE == ODM_CE)
 
-u32
-beamforming_get_report_frame(
-	void			*p_dm_void,
-	union recv_frame *precv_frame
-)
+u32 beamforming_get_report_frame(
+	void *dm_void,
+	union recv_frame *precv_frame)
 {
-	struct PHY_DM_STRUCT				*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	u32					ret = _SUCCESS;
-	struct _RT_BEAMFORMEE_ENTRY	*p_beamform_entry = NULL;
-	u8					*pframe = precv_frame->u.hdr.rx_data;
-	u32					frame_len = precv_frame->u.hdr.len;
-	u8					*TA;
-	u8					idx, offset;
-
-
-	/*Memory comparison to see if CSI report is the same with previous one*/
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	u32 ret = _SUCCESS;
+	struct _RT_BEAMFORMEE_ENTRY *beamform_entry = NULL;
+	u8 *pframe = precv_frame->u.hdr.rx_data;
+	u32 frame_len = precv_frame->u.hdr.len;
+	u8 *TA;
+	u8 idx, offset;
+
+	/*@Memory comparison to see if CSI report is the same with previous one*/
 	TA = get_addr2_ptr(pframe);
-	p_beamform_entry = phydm_beamforming_get_bfee_entry_by_addr(p_dm, TA, &idx);
-	if (p_beamform_entry->beamform_entry_cap & BEAMFORMER_CAP_VHT_SU)
-		offset = 31;		/*24+(1+1+3)+2  MAC header+(Category+ActionCode+MIMOControlField)+SNR(nc=2)*/
-	else if (p_beamform_entry->beamform_entry_cap & BEAMFORMER_CAP_HT_EXPLICIT)
-		offset = 34;		/*24+(1+1+6)+2  MAC header+(Category+ActionCode+MIMOControlField)+SNR(nc=2)*/
+	beamform_entry = phydm_beamforming_get_bfee_entry_by_addr(dm, TA, &idx);
+	if (beamform_entry->beamform_entry_cap & BEAMFORMER_CAP_VHT_SU)
+		offset = 31; /*@24+(1+1+3)+2  MAC header+(Category+ActionCode+MIMOControlField)+SNR(nc=2)*/
+	else if (beamform_entry->beamform_entry_cap & BEAMFORMER_CAP_HT_EXPLICIT)
+		offset = 34; /*@24+(1+1+6)+2  MAC header+(Category+ActionCode+MIMOControlField)+SNR(nc=2)*/
 	else
 		return ret;
 
-
 	return ret;
 }
 
-
 boolean
 send_fw_ht_ndpa_packet(
-	void			*p_dm_void,
-	u8			*RA,
-	enum channel_width	BW
-)
+	void *dm_void,
+	u8 *RA,
+	enum channel_width BW)
 {
-	struct PHY_DM_STRUCT				*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	struct _ADAPTER				*adapter = p_dm->adapter;
-	struct xmit_frame		*pmgntframe;
-	struct pkt_attrib		*pattrib;
-	struct rtw_ieee80211_hdr	*pwlanhdr;
-	struct xmit_priv		*pxmitpriv = &(adapter->xmitpriv);
-	struct mlme_ext_priv	*pmlmeext = &adapter->mlmeextpriv;
-	struct mlme_ext_info	*pmlmeinfo = &(pmlmeext->mlmext_info);
-	u8	action_hdr[4] = {ACT_CAT_VENDOR, 0x00, 0xe0, 0x4c};
-	u8	*pframe;
-	u16	*fctrl;
-	u16	duration = 0;
-	u8	a_sifs_time = 0, ndp_tx_rate = 0, idx = 0;
-	struct _RT_BEAMFORMING_INFO	*p_beam_info = &(p_dm->beamforming_info);
-	struct _RT_BEAMFORMEE_ENTRY	*p_beamform_entry = phydm_beamforming_get_bfee_entry_by_addr(p_dm, RA, &idx);
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct _ADAPTER *adapter = dm->adapter;
+	struct xmit_frame *pmgntframe;
+	struct pkt_attrib *pattrib;
+	struct rtw_ieee80211_hdr *pwlanhdr;
+	struct xmit_priv *pxmitpriv = &(adapter->xmitpriv);
+	struct mlme_ext_priv *pmlmeext = &adapter->mlmeextpriv;
+	struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info);
+	u8 action_hdr[4] = {ACT_CAT_VENDOR, 0x00, 0xe0, 0x4c};
+	u8 *pframe;
+	u16 *fctrl;
+	u16 duration = 0;
+	u8 a_sifs_time = 0, ndp_tx_rate = 0, idx = 0;
+	struct _RT_BEAMFORMING_INFO *beam_info = &(dm->beamforming_info);
+	struct _RT_BEAMFORMEE_ENTRY *beamform_entry = phydm_beamforming_get_bfee_entry_by_addr(dm, RA, &idx);
 
 	pmgntframe = alloc_mgtxmitframe(pxmitpriv);
 
 	if (pmgntframe == NULL) {
-		PHYDM_DBG(p_dm, DBG_TXBF, ("%s, alloc mgnt frame fail\n", __func__));
+		PHYDM_DBG(dm, DBG_TXBF, "%s, alloc mgnt frame fail\n",
+			  __func__);
 		return false;
 	}
 
@@ -1068,8 +1036,9 @@ send_fw_ht_ndpa_packet(
 	update_mgntframe_attrib(adapter, pattrib);
 
 	pattrib->qsel = QSLT_BEACON;
-	ndp_tx_rate = beamforming_get_htndp_tx_rate(p_dm, p_beamform_entry->comp_steering_num_of_bfer);
-	PHYDM_DBG(p_dm, DBG_TXBF, ("[%s] ndp_tx_rate =%d\n", __func__, ndp_tx_rate));
+	ndp_tx_rate = beamforming_get_htndp_tx_rate(dm, beamform_entry->comp_steering_num_of_bfer);
+	PHYDM_DBG(dm, DBG_TXBF, "[%s] ndp_tx_rate =%d\n", __func__,
+		  ndp_tx_rate);
 	pattrib->rate = ndp_tx_rate;
 	pattrib->bwmode = BW;
 	pattrib->order = 1;
@@ -1088,7 +1057,7 @@ send_fw_ht_ndpa_packet(
 	set_frame_sub_type(pframe, WIFI_ACTION_NOACK);
 
 	_rtw_memcpy(pwlanhdr->addr1, RA, ETH_ALEN);
-	_rtw_memcpy(pwlanhdr->addr2, p_beamform_entry->my_mac_addr, ETH_ALEN);
+	_rtw_memcpy(pwlanhdr->addr2, beamform_entry->my_mac_addr, ETH_ALEN);
 	_rtw_memcpy(pwlanhdr->addr3, get_my_bssid(&(pmlmeinfo->network)), ETH_ALEN);
 
 	if (pmlmeext->cur_wireless_mode == WIRELESS_11B)
@@ -1105,7 +1074,7 @@ send_fw_ht_ndpa_packet(
 
 	set_duration(pframe, duration);
 
-	/* HT control field */
+	/* @HT control field */
 	SET_HT_CTRL_CSI_STEERING(pframe + 24, 3);
 	SET_HT_CTRL_NDP_ANNOUNCEMENT(pframe + 24, 1);
 
@@ -1120,36 +1089,35 @@ send_fw_ht_ndpa_packet(
 	return true;
 }
 
-
 boolean
 send_sw_ht_ndpa_packet(
-	void			*p_dm_void,
-	u8			*RA,
-	enum channel_width	BW
-)
+	void *dm_void,
+	u8 *RA,
+	enum channel_width BW)
 {
-	struct PHY_DM_STRUCT				*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	struct _ADAPTER				*adapter = p_dm->adapter;
-	struct xmit_frame		*pmgntframe;
-	struct pkt_attrib		*pattrib;
-	struct rtw_ieee80211_hdr	*pwlanhdr;
-	struct xmit_priv		*pxmitpriv = &(adapter->xmitpriv);
-	struct mlme_ext_priv	*pmlmeext = &adapter->mlmeextpriv;
-	struct mlme_ext_info	*pmlmeinfo = &(pmlmeext->mlmext_info);
-	u8	action_hdr[4] = {ACT_CAT_VENDOR, 0x00, 0xe0, 0x4c};
-	u8	*pframe;
-	u16	*fctrl;
-	u16	duration = 0;
-	u8	a_sifs_time = 0, ndp_tx_rate = 0, idx = 0;
-	struct _RT_BEAMFORMING_INFO	*p_beam_info = &(p_dm->beamforming_info);
-	struct _RT_BEAMFORMEE_ENTRY	*p_beamform_entry = phydm_beamforming_get_bfee_entry_by_addr(p_dm, RA, &idx);
-
-	ndp_tx_rate = beamforming_get_htndp_tx_rate(p_dm, p_beamform_entry->comp_steering_num_of_bfer);
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct _ADAPTER *adapter = dm->adapter;
+	struct xmit_frame *pmgntframe;
+	struct pkt_attrib *pattrib;
+	struct rtw_ieee80211_hdr *pwlanhdr;
+	struct xmit_priv *pxmitpriv = &(adapter->xmitpriv);
+	struct mlme_ext_priv *pmlmeext = &adapter->mlmeextpriv;
+	struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info);
+	u8 action_hdr[4] = {ACT_CAT_VENDOR, 0x00, 0xe0, 0x4c};
+	u8 *pframe;
+	u16 *fctrl;
+	u16 duration = 0;
+	u8 a_sifs_time = 0, ndp_tx_rate = 0, idx = 0;
+	struct _RT_BEAMFORMING_INFO *beam_info = &(dm->beamforming_info);
+	struct _RT_BEAMFORMEE_ENTRY *beamform_entry = phydm_beamforming_get_bfee_entry_by_addr(dm, RA, &idx);
+
+	ndp_tx_rate = beamforming_get_htndp_tx_rate(dm, beamform_entry->comp_steering_num_of_bfer);
 
 	pmgntframe = alloc_mgtxmitframe(pxmitpriv);
 
 	if (pmgntframe == NULL) {
-		PHYDM_DBG(p_dm, DBG_TXBF, ("%s, alloc mgnt frame fail\n", __func__));
+		PHYDM_DBG(dm, DBG_TXBF, "%s, alloc mgnt frame fail\n",
+			  __func__);
 		return false;
 	}
 
@@ -1175,7 +1143,7 @@ send_sw_ht_ndpa_packet(
 	set_frame_sub_type(pframe, WIFI_ACTION_NOACK);
 
 	_rtw_memcpy(pwlanhdr->addr1, RA, ETH_ALEN);
-	_rtw_memcpy(pwlanhdr->addr2, p_beamform_entry->my_mac_addr, ETH_ALEN);
+	_rtw_memcpy(pwlanhdr->addr2, beamform_entry->my_mac_addr, ETH_ALEN);
 	_rtw_memcpy(pwlanhdr->addr3, get_my_bssid(&(pmlmeinfo->network)), ETH_ALEN);
 
 	if (pmlmeext->cur_wireless_mode == WIRELESS_11B)
@@ -1192,7 +1160,7 @@ send_sw_ht_ndpa_packet(
 
 	set_duration(pframe, duration);
 
-	/*HT control field*/
+	/*@HT control field*/
 	SET_HT_CTRL_CSI_STEERING(pframe + 24, 3);
 	SET_HT_CTRL_NDP_ANNOUNCEMENT(pframe + 24, 1);
 
@@ -1207,36 +1175,35 @@ send_sw_ht_ndpa_packet(
 	return true;
 }
 
-
 boolean
 send_fw_vht_ndpa_packet(
-	void			*p_dm_void,
-	u8			*RA,
-	u16			AID,
-	enum channel_width	BW
-)
+	void *dm_void,
+	u8 *RA,
+	u16 AID,
+	enum channel_width BW)
 {
-	struct PHY_DM_STRUCT				*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	struct _ADAPTER				*adapter = p_dm->adapter;
-	struct xmit_frame		*pmgntframe;
-	struct pkt_attrib		*pattrib;
-	struct rtw_ieee80211_hdr	*pwlanhdr;
-	struct xmit_priv		*pxmitpriv = &(adapter->xmitpriv);
-	struct mlme_ext_priv	*pmlmeext = &adapter->mlmeextpriv;
-	struct mlme_ext_info	*pmlmeinfo = &(pmlmeext->mlmext_info);
-	struct mlme_priv		*pmlmepriv = &(adapter->mlmepriv);
-	u8	*pframe;
-	u16	*fctrl;
-	u16	duration = 0;
-	u8	sequence = 0, a_sifs_time = 0, ndp_tx_rate = 0, idx = 0;
-	struct _RT_BEAMFORMING_INFO	*p_beam_info = &(p_dm->beamforming_info);
-	struct _RT_BEAMFORMEE_ENTRY	*p_beamform_entry = phydm_beamforming_get_bfee_entry_by_addr(p_dm, RA, &idx);
-	struct _RT_NDPA_STA_INFO	sta_info;
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct _ADAPTER *adapter = dm->adapter;
+	struct xmit_frame *pmgntframe;
+	struct pkt_attrib *pattrib;
+	struct rtw_ieee80211_hdr *pwlanhdr;
+	struct xmit_priv *pxmitpriv = &(adapter->xmitpriv);
+	struct mlme_ext_priv *pmlmeext = &adapter->mlmeextpriv;
+	struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info);
+	struct mlme_priv *pmlmepriv = &(adapter->mlmepriv);
+	u8 *pframe;
+	u16 *fctrl;
+	u16 duration = 0;
+	u8 sequence = 0, a_sifs_time = 0, ndp_tx_rate = 0, idx = 0;
+	struct _RT_BEAMFORMING_INFO *beam_info = &(dm->beamforming_info);
+	struct _RT_BEAMFORMEE_ENTRY *beamform_entry = phydm_beamforming_get_bfee_entry_by_addr(dm, RA, &idx);
+	struct _RT_NDPA_STA_INFO sta_info;
 
 	pmgntframe = alloc_mgtxmitframe(pxmitpriv);
 
 	if (pmgntframe == NULL) {
-		PHYDM_DBG(p_dm, DBG_TXBF, ("%s, alloc mgnt frame fail\n", __func__));
+		PHYDM_DBG(dm, DBG_TXBF, "%s, alloc mgnt frame fail\n",
+			  __func__);
 		return false;
 	}
 
@@ -1246,8 +1213,9 @@ send_fw_vht_ndpa_packet(
 	update_mgntframe_attrib(adapter, pattrib);
 
 	pattrib->qsel = QSLT_BEACON;
-	ndp_tx_rate = beamforming_get_vht_ndp_tx_rate(p_dm, p_beamform_entry->comp_steering_num_of_bfer);
-	PHYDM_DBG(p_dm, DBG_TXBF, ("[%s] ndp_tx_rate =%d\n", __func__, ndp_tx_rate));
+	ndp_tx_rate = beamforming_get_vht_ndp_tx_rate(dm, beamform_entry->comp_steering_num_of_bfer);
+	PHYDM_DBG(dm, DBG_TXBF, "[%s] ndp_tx_rate =%d\n", __func__,
+		  ndp_tx_rate);
 	pattrib->rate = ndp_tx_rate;
 	pattrib->bwmode = BW;
 	pattrib->subtype = WIFI_NDPA;
@@ -1264,7 +1232,7 @@ send_fw_vht_ndpa_packet(
 	set_frame_sub_type(pframe, WIFI_NDPA);
 
 	_rtw_memcpy(pwlanhdr->addr1, RA, ETH_ALEN);
-	_rtw_memcpy(pwlanhdr->addr2, p_beamform_entry->my_mac_addr, ETH_ALEN);
+	_rtw_memcpy(pwlanhdr->addr2, beamform_entry->my_mac_addr, ETH_ALEN);
 
 	if (is_supported_5g(pmlmeext->cur_wireless_mode) || is_supported_ht(pmlmeext->cur_wireless_mode))
 		a_sifs_time = 16;
@@ -1282,11 +1250,11 @@ send_fw_vht_ndpa_packet(
 
 	set_duration(pframe, duration);
 
-	sequence = p_beam_info->sounding_sequence << 2;
-	if (p_beam_info->sounding_sequence >= 0x3f)
-		p_beam_info->sounding_sequence = 0;
+	sequence = beam_info->sounding_sequence << 2;
+	if (beam_info->sounding_sequence >= 0x3f)
+		beam_info->sounding_sequence = 0;
 	else
-		p_beam_info->sounding_sequence++;
+		beam_info->sounding_sequence++;
 
 	_rtw_memcpy(pframe + 16, &sequence, 1);
 
@@ -1308,40 +1276,39 @@ send_fw_vht_ndpa_packet(
 	return true;
 }
 
-
-
 boolean
 send_sw_vht_ndpa_packet(
-	void			*p_dm_void,
-	u8			*RA,
-	u16			AID,
-	enum channel_width	BW
-)
+	void *dm_void,
+	u8 *RA,
+	u16 AID,
+	enum channel_width BW)
 {
-	struct PHY_DM_STRUCT				*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	struct _ADAPTER				*adapter = p_dm->adapter;
-	struct xmit_frame		*pmgntframe;
-	struct pkt_attrib		*pattrib;
-	struct rtw_ieee80211_hdr	*pwlanhdr;
-	struct xmit_priv		*pxmitpriv = &(adapter->xmitpriv);
-	struct mlme_ext_priv	*pmlmeext = &adapter->mlmeextpriv;
-	struct mlme_ext_info	*pmlmeinfo = &(pmlmeext->mlmext_info);
-	struct mlme_priv		*pmlmepriv = &(adapter->mlmepriv);
-	struct _RT_NDPA_STA_INFO	ndpa_sta_info;
-	u8	ndp_tx_rate = 0, sequence = 0, a_sifs_time = 0, idx = 0;
-	u8	*pframe;
-	u16	*fctrl;
-	u16	duration = 0;
-	struct _RT_BEAMFORMING_INFO	*p_beam_info = &(p_dm->beamforming_info);
-	struct _RT_BEAMFORMEE_ENTRY	*p_beamform_entry = phydm_beamforming_get_bfee_entry_by_addr(p_dm, RA, &idx);
-
-	ndp_tx_rate = beamforming_get_vht_ndp_tx_rate(p_dm, p_beamform_entry->comp_steering_num_of_bfer);
-	PHYDM_DBG(p_dm, DBG_TXBF, ("[%s] ndp_tx_rate =%d\n", __func__, ndp_tx_rate));
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct _ADAPTER *adapter = dm->adapter;
+	struct xmit_frame *pmgntframe;
+	struct pkt_attrib *pattrib;
+	struct rtw_ieee80211_hdr *pwlanhdr;
+	struct xmit_priv *pxmitpriv = &(adapter->xmitpriv);
+	struct mlme_ext_priv *pmlmeext = &adapter->mlmeextpriv;
+	struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info);
+	struct mlme_priv *pmlmepriv = &(adapter->mlmepriv);
+	struct _RT_NDPA_STA_INFO ndpa_sta_info;
+	u8 ndp_tx_rate = 0, sequence = 0, a_sifs_time = 0, idx = 0;
+	u8 *pframe;
+	u16 *fctrl;
+	u16 duration = 0;
+	struct _RT_BEAMFORMING_INFO *beam_info = &(dm->beamforming_info);
+	struct _RT_BEAMFORMEE_ENTRY *beamform_entry = phydm_beamforming_get_bfee_entry_by_addr(dm, RA, &idx);
+
+	ndp_tx_rate = beamforming_get_vht_ndp_tx_rate(dm, beamform_entry->comp_steering_num_of_bfer);
+	PHYDM_DBG(dm, DBG_TXBF, "[%s] ndp_tx_rate =%d\n", __func__,
+		  ndp_tx_rate);
 
 	pmgntframe = alloc_mgtxmitframe(pxmitpriv);
 
 	if (pmgntframe == NULL) {
-		PHYDM_DBG(p_dm, DBG_TXBF, ("%s, alloc mgnt frame fail\n", __func__));
+		PHYDM_DBG(dm, DBG_TXBF, "%s, alloc mgnt frame fail\n",
+			  __func__);
 		return false;
 	}
 
@@ -1366,7 +1333,7 @@ send_sw_vht_ndpa_packet(
 	set_frame_sub_type(pframe, WIFI_NDPA);
 
 	_rtw_memcpy(pwlanhdr->addr1, RA, ETH_ALEN);
-	_rtw_memcpy(pwlanhdr->addr2, p_beamform_entry->my_mac_addr, ETH_ALEN);
+	_rtw_memcpy(pwlanhdr->addr2, beamform_entry->my_mac_addr, ETH_ALEN);
 
 	if (is_supported_5g(pmlmeext->cur_wireless_mode) || is_supported_ht(pmlmeext->cur_wireless_mode))
 		a_sifs_time = 16;
@@ -1384,11 +1351,11 @@ send_sw_vht_ndpa_packet(
 
 	set_duration(pframe, duration);
 
-	sequence = p_beam_info->sounding_sequence << 2;
-	if (p_beam_info->sounding_sequence >= 0x3f)
-		p_beam_info->sounding_sequence = 0;
+	sequence = beam_info->sounding_sequence << 2;
+	if (beam_info->sounding_sequence >= 0x3f)
+		beam_info->sounding_sequence = 0;
 	else
-		p_beam_info->sounding_sequence++;
+		beam_info->sounding_sequence++;
 
 	_rtw_memcpy(pframe + 16, &sequence, 1);
 	if (((pmlmeinfo->state & 0x03) == WIFI_FW_ADHOC_STATE) || ((pmlmeinfo->state & 0x03) == WIFI_FW_AP_STATE))
@@ -1405,45 +1372,43 @@ send_sw_vht_ndpa_packet(
 	pattrib->last_txcmdsz = pattrib->pktlen;
 
 	dump_mgntframe(adapter, pmgntframe);
-	PHYDM_DBG(p_dm, DBG_TXBF, ("[%s] [%d]\n", __func__, __LINE__));
+	PHYDM_DBG(dm, DBG_TXBF, "[%s] [%d]\n", __func__, __LINE__);
 
 	return true;
 }
 
-
 #endif
 
-
-void
-beamforming_get_ndpa_frame(
-	void			*p_dm_void,
+void beamforming_get_ndpa_frame(
+	void *dm_void,
 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
-	OCTET_STRING	pdu_os
+	OCTET_STRING pdu_os
 #elif (DM_ODM_SUPPORT_TYPE == ODM_CE)
 	union recv_frame *precv_frame
 #endif
-)
+	)
 {
-	struct PHY_DM_STRUCT					*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	u8						*TA ;
-	u8						idx, sequence;
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	u8 *TA;
+	u8 idx, sequence;
 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
-	u8						*p_ndpa_frame = pdu_os.Octet;
+	u8 *p_ndpa_frame = pdu_os.Octet;
 #elif (DM_ODM_SUPPORT_TYPE == ODM_CE)
-	u8						*p_ndpa_frame = precv_frame->u.hdr.rx_data;
+	u8 *p_ndpa_frame = precv_frame->u.hdr.rx_data;
 #endif
-	struct _RT_BEAMFORMER_ENTRY		*p_beamformer_entry = NULL;		/*Modified By Jeffery @2014-10-29*/
-
+	struct _RT_BEAMFORMER_ENTRY *beamformer_entry = NULL; /*@Modified By Jeffery @2014-10-29*/
 
 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
-	RT_DISP_DATA(FBEAM, FBEAM_DATA, "beamforming_get_ndpa_frame\n", pdu_os.Octet, pdu_os.Length);
+	RT_DISP_DATA(FBEAM, FBEAM_DATA, "beamforming_get_ndpa_frame\n",
+	pdu_os.Octet, pdu_os.Length);
 	if (IsCtrlNDPA(p_ndpa_frame) == false)
 #elif (DM_ODM_SUPPORT_TYPE == ODM_CE)
 	if (get_frame_sub_type(p_ndpa_frame) != WIFI_NDPA)
 #endif
 		return;
-	else if (!(p_dm->support_ic_type & (ODM_RTL8812 | ODM_RTL8821))) {
-		PHYDM_DBG(p_dm, DBG_TXBF, ("[%s] not 8812 or 8821A, return\n", __func__));
+	else if (!(dm->support_ic_type & (ODM_RTL8812 | ODM_RTL8821))) {
+		PHYDM_DBG(dm, DBG_TXBF, "[%s] not 8812 or 8821A, return\n",
+			  __func__);
 		return;
 	}
 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
@@ -1454,57 +1419,66 @@ beamforming_get_ndpa_frame(
 	/*Remove signaling TA. */
 	TA[0] = TA[0] & 0xFE;
 
-	p_beamformer_entry = phydm_beamforming_get_bfer_entry_by_addr(p_dm, TA, &idx);		/* Modified By Jeffery @2014-10-29 */
+	beamformer_entry = phydm_beamforming_get_bfer_entry_by_addr(dm, TA, &idx); /* @Modified By Jeffery @2014-10-29 */
 
-	/*Break options for Clock Reset*/
-	if (p_beamformer_entry == NULL)
+	/*@Break options for Clock Reset*/
+	if (beamformer_entry == NULL)
 		return;
-	else if (!(p_beamformer_entry->beamform_entry_cap & BEAMFORMEE_CAP_VHT_SU))
+	else if (!(beamformer_entry->beamform_entry_cap & BEAMFORMEE_CAP_VHT_SU))
 		return;
-	/*log_success: As long as 8812A receive NDPA and feedback CSI succeed once, clock reset is NO LONGER needed !2015-04-10, Jeffery*/
-	/*clock_reset_times: While BFer entry always doesn't receive our CSI, clock will reset again and again.So clock_reset_times is limited to 5 times.2015-04-13, Jeffery*/
-	else if ((p_beamformer_entry->log_success == 1) || (p_beamformer_entry->clock_reset_times == 5)) {
-		PHYDM_DBG(p_dm, DBG_TXBF, ("[%s] log_seq=%d, pre_log_seq=%d, log_retry_cnt=%d, log_success=%d, clock_reset_times=%d, clock reset is no longer needed.\n",
-			__func__, p_beamformer_entry->log_seq, p_beamformer_entry->pre_log_seq, p_beamformer_entry->log_retry_cnt, p_beamformer_entry->log_success, p_beamformer_entry->clock_reset_times));
+	/*@log_success: As long as 8812A receive NDPA and feedback CSI succeed once, clock reset is NO LONGER needed !2015-04-10, Jeffery*/
+	/*@clock_reset_times: While BFer entry always doesn't receive our CSI, clock will reset again and again.So clock_reset_times is limited to 5 times.2015-04-13, Jeffery*/
+	else if ((beamformer_entry->log_success == 1) || (beamformer_entry->clock_reset_times == 5)) {
+		PHYDM_DBG(dm, DBG_TXBF,
+			  "[%s] log_seq=%d, pre_log_seq=%d, log_retry_cnt=%d, log_success=%d, clock_reset_times=%d, clock reset is no longer needed.\n",
+			  __func__, beamformer_entry->log_seq,
+			  beamformer_entry->pre_log_seq,
+			  beamformer_entry->log_retry_cnt,
+			  beamformer_entry->log_success,
+			  beamformer_entry->clock_reset_times);
 
 		return;
 	}
 
 	sequence = (p_ndpa_frame[16]) >> 2;
 
-	PHYDM_DBG(p_dm, DBG_TXBF, ("[%s] Start, sequence=%d, log_seq=%d, pre_log_seq=%d, log_retry_cnt=%d, clock_reset_times=%d, log_success=%d\n",
-		__func__, sequence, p_beamformer_entry->log_seq, p_beamformer_entry->pre_log_seq, p_beamformer_entry->log_retry_cnt, p_beamformer_entry->clock_reset_times, p_beamformer_entry->log_success));
+	PHYDM_DBG(dm, DBG_TXBF,
+		  "[%s] Start, sequence=%d, log_seq=%d, pre_log_seq=%d, log_retry_cnt=%d, clock_reset_times=%d, log_success=%d\n",
+		  __func__, sequence, beamformer_entry->log_seq,
+		  beamformer_entry->pre_log_seq,
+		  beamformer_entry->log_retry_cnt,
+		  beamformer_entry->clock_reset_times,
+		  beamformer_entry->log_success);
 
-	if ((p_beamformer_entry->log_seq != 0) && (p_beamformer_entry->pre_log_seq != 0)) {
+	if (beamformer_entry->log_seq != 0 && beamformer_entry->pre_log_seq != 0) {
 		/*Success condition*/
-		if ((p_beamformer_entry->log_seq != sequence) && (p_beamformer_entry->pre_log_seq != p_beamformer_entry->log_seq)) {
-			/* break option for clcok reset, 2015-03-30, Jeffery */
-			p_beamformer_entry->log_retry_cnt = 0;
-			/*As long as 8812A receive NDPA and feedback CSI succeed once, clock reset is no longer needed.*/
+		if (beamformer_entry->log_seq != sequence && beamformer_entry->pre_log_seq != beamformer_entry->log_seq) {
+			/* @break option for clcok reset, 2015-03-30, Jeffery */
+			beamformer_entry->log_retry_cnt = 0;
+			/*@As long as 8812A receive NDPA and feedback CSI succeed once, clock reset is no longer needed.*/
 			/*That is, log_success is NOT needed to be reset to zero, 2015-04-13, Jeffery*/
-			p_beamformer_entry->log_success = 1;
+			beamformer_entry->log_success = 1;
 
-		} else {/*Fail condition*/
+		} else { /*@Fail condition*/
 
-			if (p_beamformer_entry->log_retry_cnt == 5) {
-				p_beamformer_entry->clock_reset_times++;
-				p_beamformer_entry->log_retry_cnt = 0;
+			if (beamformer_entry->log_retry_cnt == 5) {
+				beamformer_entry->clock_reset_times++;
+				beamformer_entry->log_retry_cnt = 0;
 
-				PHYDM_DBG(p_dm, DBG_TXBF, ("[%s] Clock Reset!!! clock_reset_times=%d\n",
-					__func__, p_beamformer_entry->clock_reset_times));
-				hal_com_txbf_set(p_dm, TXBF_SET_SOUNDING_CLK, NULL);
+				PHYDM_DBG(dm, DBG_TXBF,
+					  "[%s] Clock Reset!!! clock_reset_times=%d\n",
+					  __func__,
+					  beamformer_entry->clock_reset_times);
+				hal_com_txbf_set(dm, TXBF_SET_SOUNDING_CLK, NULL);
 
 			} else
-				p_beamformer_entry->log_retry_cnt++;
+				beamformer_entry->log_retry_cnt++;
 		}
 	}
 
 	/*Update log_seq & pre_log_seq*/
-	p_beamformer_entry->pre_log_seq = p_beamformer_entry->log_seq;
-	p_beamformer_entry->log_seq = sequence;
-
+	beamformer_entry->pre_log_seq = beamformer_entry->log_seq;
+	beamformer_entry->log_seq = sequence;
 }
 
-
-
 #endif
diff --git a/rtl8723DS/hal/phydm/txbf/haltxbfinterface.h b/rtl8723DS/hal/phydm/txbf/haltxbfinterface.h
index 795cfc8..b97aa34 100755..100644
--- a/rtl8723DS/hal/phydm/txbf/haltxbfinterface.h
+++ b/rtl8723DS/hal/phydm/txbf/haltxbfinterface.h
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2016 - 2017 Realtek Corporation.
+ * Copyright(c) 2007 - 2017  Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -8,172 +8,160 @@
  *
  * This program is distributed in the hope that it will be useful, but WITHOUT
  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  * more details.
  *
+ * The full GNU General Public License is included in this distribution in the
+ * file called LICENSE.
+ *
+ * Contact Information:
+ * wlanfae <wlanfae@realtek.com>
+ * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
+ * Hsinchu 300, Taiwan.
+ *
+ * Larry Finger <Larry.Finger@lwfinger.net>
+ *
  *****************************************************************************/
 #ifndef __HAL_TXBF_INTERFACE_H__
 #define __HAL_TXBF_INTERFACE_H__
 
-#if (BEAMFORMING_SUPPORT == 1)
+#ifdef PHYDM_BEAMFORMING_SUPPORT
 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
 
-#define a_SifsTime					((IS_WIRELESS_MODE_5G(adapter)|| IS_WIRELESS_MODE_N_24G(adapter))? 16 : 10)
+#define a_SifsTime ((IS_WIRELESS_MODE_5G(adapter) || IS_WIRELESS_MODE_N_24G(adapter)) ? 16 : 10)
 
-void
-beamforming_gid_paid(
-	struct _ADAPTER	*adapter,
-	PRT_TCB		p_tcb
-);
+void beamforming_gid_paid(
+	void *adapter,
+	PRT_TCB tcb);
 
 enum rt_status
 beamforming_get_report_frame(
-	struct _ADAPTER		*adapter,
-	PRT_RFD			p_rfd,
-	POCTET_STRING	p_pdu_os
-);
+	void *adapter,
+	PRT_RFD rfd,
+	POCTET_STRING p_pdu_os);
 
-void
-beamforming_get_ndpa_frame(
-	void			*p_dm_void,
-	OCTET_STRING	pdu_os
-);
+void beamforming_get_ndpa_frame(
+	void *dm_void,
+	OCTET_STRING pdu_os);
 
 boolean
 send_fw_ht_ndpa_packet(
-	void			*p_dm_void,
-	u8			*RA,
-	enum channel_width	BW
-);
+	void *dm_void,
+	u8 *RA,
+	enum channel_width BW);
 
 boolean
 send_fw_vht_ndpa_packet(
-	void			*p_dm_void,
-	u8			*RA,
-	u16			AID,
-	enum channel_width	BW
-);
+	void *dm_void,
+	u8 *RA,
+	u16 AID,
+	enum channel_width BW);
 
 boolean
 send_sw_vht_ndpa_packet(
-	void			*p_dm_void,
-	u8			*RA,
-	u16			AID,
-	enum channel_width	BW
-);
+	void *dm_void,
+	u8 *RA,
+	u16 AID,
+	enum channel_width BW);
 
 boolean
 send_sw_ht_ndpa_packet(
-	void			*p_dm_void,
-	u8			*RA,
-	enum channel_width	BW
-);
+	void *dm_void,
+	u8 *RA,
+	enum channel_width BW);
 
 #if (SUPPORT_MU_BF == 1)
 enum rt_status
 beamforming_get_vht_gid_mgnt_frame(
-	struct _ADAPTER		*adapter,
-	PRT_RFD			p_rfd,
-	POCTET_STRING	p_pdu_os
-);
+	void *adapter,
+	PRT_RFD rfd,
+	POCTET_STRING p_pdu_os);
 
 boolean
 send_sw_vht_gid_mgnt_frame(
-	void			*p_dm_void,
-	u8			*RA,
-	u8			idx
-);
+	void *dm_void,
+	u8 *RA,
+	u8 idx);
 
 boolean
 send_sw_vht_bf_report_poll(
-	void			*p_dm_void,
-	u8			*RA,
-	boolean			is_final_poll
-);
+	void *dm_void,
+	u8 *RA,
+	boolean is_final_poll);
 
 boolean
 send_sw_vht_mu_ndpa_packet(
-	void			*p_dm_void,
-	enum channel_width	BW
-);
+	void *dm_void,
+	enum channel_width BW);
 #else
-#define beamforming_get_vht_gid_mgnt_frame(adapter, p_rfd, p_pdu_os) RT_STATUS_FAILURE
-#define send_sw_vht_gid_mgnt_frame(p_dm_void, RA)
-#define send_sw_vht_bf_report_poll(p_dm_void, RA, is_final_poll)
-#define send_sw_vht_mu_ndpa_packet(p_dm_void, BW)
+#define beamforming_get_vht_gid_mgnt_frame(adapter, rfd, p_pdu_os) RT_STATUS_FAILURE
+#define send_sw_vht_gid_mgnt_frame(dm_void, RA)
+#define send_sw_vht_bf_report_poll(dm_void, RA, is_final_poll)
+#define send_sw_vht_mu_ndpa_packet(dm_void, BW)
 #endif
 
-
 #elif (DM_ODM_SUPPORT_TYPE == ODM_CE)
 
-u32
-beamforming_get_report_frame(
-	void			*p_dm_void,
-	union recv_frame *precv_frame
-);
+u32 beamforming_get_report_frame(
+	void *dm_void,
+	union recv_frame *precv_frame);
 
 boolean
 send_fw_ht_ndpa_packet(
-	void			*p_dm_void,
-	u8			*RA,
-	enum channel_width	BW
-);
+	void *dm_void,
+	u8 *RA,
+	enum channel_width BW);
 
 boolean
 send_sw_ht_ndpa_packet(
-	void			*p_dm_void,
-	u8			*RA,
-	enum channel_width	BW
-);
+	void *dm_void,
+	u8 *RA,
+	enum channel_width BW);
 
 boolean
 send_fw_vht_ndpa_packet(
-	void			*p_dm_void,
-	u8			*RA,
-	u16			AID,
-	enum channel_width	BW
-);
+	void *dm_void,
+	u8 *RA,
+	u16 AID,
+	enum channel_width BW);
 
 boolean
 send_sw_vht_ndpa_packet(
-	void			*p_dm_void,
-	u8			*RA,
-	u16			AID,
-	enum channel_width	BW
-);
+	void *dm_void,
+	u8 *RA,
+	u16 AID,
+	enum channel_width BW);
 #endif
 
-void
-beamforming_get_ndpa_frame(
-	void			*p_dm_void,
+void beamforming_get_ndpa_frame(
+	void *dm_void,
 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
-	OCTET_STRING	pdu_os
+	OCTET_STRING pdu_os
 #elif (DM_ODM_SUPPORT_TYPE == ODM_CE)
 	union recv_frame *precv_frame
 #endif
-);
+	);
 
 boolean
 dbg_send_sw_vht_mundpa_packet(
-	void			*p_dm_void,
-	enum channel_width	BW
-);
+	void *dm_void,
+	enum channel_width BW);
 
 #else
-#define beamforming_get_ndpa_frame(p_dm, _pdu_os)
+#define beamforming_get_ndpa_frame(dm, _pdu_os)
 #if (DM_ODM_SUPPORT_TYPE == ODM_CE)
-	#define beamforming_get_report_frame(adapter, precv_frame)		RT_STATUS_FAILURE
+#define beamforming_get_report_frame(adapter, precv_frame) RT_STATUS_FAILURE
 #elif (DM_ODM_SUPPORT_TYPE == ODM_WIN)
-	#define beamforming_get_report_frame(adapter, p_rfd, p_pdu_os)		RT_STATUS_FAILURE
-	#define beamforming_get_vht_gid_mgnt_frame(adapter, p_rfd, p_pdu_os) RT_STATUS_FAILURE
+#define beamforming_get_report_frame(adapter, rfd, p_pdu_os) RT_STATUS_FAILURE
+#define beamforming_get_vht_gid_mgnt_frame(adapter, rfd, p_pdu_os) RT_STATUS_FAILURE
 #endif
-#define send_fw_ht_ndpa_packet(p_dm_void, RA, BW)
-#define send_sw_ht_ndpa_packet(p_dm_void, RA, BW)
-#define send_fw_vht_ndpa_packet(p_dm_void, RA, AID, BW)
-#define send_sw_vht_ndpa_packet(p_dm_void, RA,	AID, BW)
-#define send_sw_vht_gid_mgnt_frame(p_dm_void, RA, idx)
-#define send_sw_vht_bf_report_poll(p_dm_void, RA, is_final_poll)
-#define send_sw_vht_mu_ndpa_packet(p_dm_void, BW)
+#define send_fw_ht_ndpa_packet(dm_void, RA, BW)
+#define send_sw_ht_ndpa_packet(dm_void, RA, BW)
+#define send_fw_vht_ndpa_packet(dm_void, RA, AID, BW)
+#define send_sw_vht_ndpa_packet(dm_void, RA, AID, BW)
+#define send_sw_vht_gid_mgnt_frame(dm_void, RA, idx)
+#define send_sw_vht_bf_report_poll(dm_void, RA, is_final_poll)
+#define send_sw_vht_mu_ndpa_packet(dm_void, BW)
 #endif
 
 #endif
diff --git a/rtl8723DS/hal/phydm/txbf/haltxbfjaguar.c b/rtl8723DS/hal/phydm/txbf/haltxbfjaguar.c
index 0386837..18a47d4 100755..100644
--- a/rtl8723DS/hal/phydm/txbf/haltxbfjaguar.c
+++ b/rtl8723DS/hal/phydm/txbf/haltxbfjaguar.c
@@ -12,193 +12,183 @@
  * more details.
  *
  *****************************************************************************/
-/* ************************************************************
+/*************************************************************
  * Description:
  *
  * This file is for 8812/8821/8811 TXBF mechanism
  *
- * ************************************************************ */
+ ************************************************************/
 #include "mp_precomp.h"
 #include "../phydm_precomp.h"
 
-#if (BEAMFORMING_SUPPORT == 1)
+#ifdef PHYDM_BEAMFORMING_SUPPORT
 #if ((RTL8812A_SUPPORT == 1) || (RTL8821A_SUPPORT == 1))
-void
-hal_txbf_8812a_set_ndpa_rate(
-	void			*p_dm_void,
-	u8	BW,
-	u8	rate
-)
+void hal_txbf_8812a_set_ndpa_rate(
+	void *dm_void,
+	u8 BW,
+	u8 rate)
 {
-	struct PHY_DM_STRUCT	*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-
-	odm_write_1byte(p_dm, REG_NDPA_OPT_CTRL_8812A, (rate << 2 | BW));
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
 
+	odm_write_1byte(dm, REG_NDPA_OPT_CTRL_8812A, (rate << 2 | BW));
 }
 
-void
-hal_txbf_jaguar_rf_mode(
-	void			*p_dm_void,
-	struct _RT_BEAMFORMING_INFO	*p_beam_info
-)
+void hal_txbf_jaguar_rf_mode(
+	void *dm_void,
+	struct _RT_BEAMFORMING_INFO *beam_info)
 {
-	struct PHY_DM_STRUCT	*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
 
-	if (p_dm->rf_type == RF_1T1R)
+	if (dm->rf_type == RF_1T1R)
 		return;
 
-	PHYDM_DBG(p_dm, DBG_TXBF, ("[%s] set TxIQGen\n", __func__));
+	PHYDM_DBG(dm, DBG_TXBF, "[%s] set TxIQGen\n", __func__);
 
-	odm_set_rf_reg(p_dm, RF_PATH_A, 0xef, 0x80000, 0x1);	/*RF mode table write enable*/
-	odm_set_rf_reg(p_dm, RF_PATH_B, 0xef, 0x80000, 0x1);	/*RF mode table write enable*/
+	odm_set_rf_reg(dm, RF_PATH_A, RF_0xef, 0x80000, 0x1); /*RF mode table write enable*/
+	odm_set_rf_reg(dm, RF_PATH_B, RF_0xef, 0x80000, 0x1); /*RF mode table write enable*/
 
-	if (p_beam_info->beamformee_su_cnt > 0) {
+	if (beam_info->beamformee_su_cnt > 0) {
 		/* Paath_A */
-		odm_set_rf_reg(p_dm, RF_PATH_A, 0x30, 0x78000, 0x3);		/*Select RX mode*/
-		odm_set_rf_reg(p_dm, RF_PATH_A, 0x31, 0xfffff, 0x3F7FF);	/*Set Table data*/
-		odm_set_rf_reg(p_dm, RF_PATH_A, 0x32, 0xfffff, 0xE26BF);	/*Enable TXIQGEN in RX mode*/
+		odm_set_rf_reg(dm, RF_PATH_A, RF_0x30, 0x78000, 0x3); /*Select RX mode*/
+		odm_set_rf_reg(dm, RF_PATH_A, RF_0x31, 0xfffff, 0x3F7FF); /*Set Table data*/
+		odm_set_rf_reg(dm, RF_PATH_A, RF_0x32, 0xfffff, 0xE26BF); /*@Enable TXIQGEN in RX mode*/
 		/* Path_B */
-		odm_set_rf_reg(p_dm, RF_PATH_B, 0x30, 0x78000, 0x3);		/*Select RX mode*/
-		odm_set_rf_reg(p_dm, RF_PATH_B, 0x31, 0xfffff, 0x3F7FF);	/*Set Table data*/
-		odm_set_rf_reg(p_dm, RF_PATH_B, 0x32, 0xfffff, 0xE26BF);	/*Enable TXIQGEN in RX mode*/
+		odm_set_rf_reg(dm, RF_PATH_B, RF_0x30, 0x78000, 0x3); /*Select RX mode*/
+		odm_set_rf_reg(dm, RF_PATH_B, RF_0x31, 0xfffff, 0x3F7FF); /*Set Table data*/
+		odm_set_rf_reg(dm, RF_PATH_B, RF_0x32, 0xfffff, 0xE26BF); /*@Enable TXIQGEN in RX mode*/
 	} else {
 		/* Paath_A */
-		odm_set_rf_reg(p_dm, RF_PATH_A, 0x30, 0x78000, 0x3);		/*Select RX mode*/
-		odm_set_rf_reg(p_dm, RF_PATH_A, 0x31, 0xfffff, 0x3F7FF);	/*Set Table data*/
-		odm_set_rf_reg(p_dm, RF_PATH_A, 0x32, 0xfffff, 0xC26BF);	/*Disable TXIQGEN in RX mode*/
+		odm_set_rf_reg(dm, RF_PATH_A, RF_0x30, 0x78000, 0x3); /*Select RX mode*/
+		odm_set_rf_reg(dm, RF_PATH_A, RF_0x31, 0xfffff, 0x3F7FF); /*Set Table data*/
+		odm_set_rf_reg(dm, RF_PATH_A, RF_0x32, 0xfffff, 0xC26BF); /*@Disable TXIQGEN in RX mode*/
 		/* Path_B */
-		odm_set_rf_reg(p_dm, RF_PATH_B, 0x30, 0x78000, 0x3);		/*Select RX mode*/
-		odm_set_rf_reg(p_dm, RF_PATH_B, 0x31, 0xfffff, 0x3F7FF);	/*Set Table data*/
-		odm_set_rf_reg(p_dm, RF_PATH_B, 0x32, 0xfffff, 0xC26BF);	/*Disable TXIQGEN in RX mode*/
+		odm_set_rf_reg(dm, RF_PATH_B, RF_0x30, 0x78000, 0x3); /*Select RX mode*/
+		odm_set_rf_reg(dm, RF_PATH_B, RF_0x31, 0xfffff, 0x3F7FF); /*Set Table data*/
+		odm_set_rf_reg(dm, RF_PATH_B, RF_0x32, 0xfffff, 0xC26BF); /*@Disable TXIQGEN in RX mode*/
 	}
 
-	odm_set_rf_reg(p_dm, RF_PATH_A, 0xef, 0x80000, 0x0);	/*RF mode table write disable*/
-	odm_set_rf_reg(p_dm, RF_PATH_B, 0xef, 0x80000, 0x0);	/*RF mode table write disable*/
+	odm_set_rf_reg(dm, RF_PATH_A, RF_0xef, 0x80000, 0x0); /*RF mode table write disable*/
+	odm_set_rf_reg(dm, RF_PATH_B, RF_0xef, 0x80000, 0x0); /*RF mode table write disable*/
 
-	if (p_beam_info->beamformee_su_cnt > 0)
-		odm_set_bb_reg(p_dm, 0x80c, MASKBYTE1, 0x33);
+	if (beam_info->beamformee_su_cnt > 0)
+		odm_set_bb_reg(dm, R_0x80c, MASKBYTE1, 0x33);
 	else
-		odm_set_bb_reg(p_dm, 0x80c, MASKBYTE1, 0x11);
+		odm_set_bb_reg(dm, R_0x80c, MASKBYTE1, 0x11);
 }
 
-
-void
-hal_txbf_jaguar_download_ndpa(
-	void			*p_dm_void,
-	u8				idx
-)
+void hal_txbf_jaguar_download_ndpa(
+	void *dm_void,
+	u8 idx)
 {
-	struct PHY_DM_STRUCT	*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	u8			u1b_tmp = 0, tmp_reg422 = 0, head_page;
-	u8			bcn_valid_reg = 0, count = 0, dl_bcn_count = 0;
-	boolean			is_send_beacon = false;
-	u8			tx_page_bndy = LAST_ENTRY_OF_TX_PKT_BUFFER_8812;	/*default reseved 1 page for the IC type which is undefined.*/
-	struct _RT_BEAMFORMING_INFO	*p_beam_info = &p_dm->beamforming_info;
-	struct _RT_BEAMFORMEE_ENTRY	*p_beam_entry = p_beam_info->beamformee_entry + idx;
-	struct _ADAPTER		*adapter = p_dm->adapter;
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	u8 u1b_tmp = 0, tmp_reg422 = 0, head_page;
+	u8 bcn_valid_reg = 0, count = 0, dl_bcn_count = 0;
+	boolean is_send_beacon = false;
+	u8 tx_page_bndy = LAST_ENTRY_OF_TX_PKT_BUFFER_8812; /*@default reseved 1 page for the IC type which is undefined.*/
+	struct _RT_BEAMFORMING_INFO *beam_info = &dm->beamforming_info;
+	struct _RT_BEAMFORMEE_ENTRY *p_beam_entry = beam_info->beamformee_entry + idx;
+	void *adapter = dm->adapter;
 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
-	*p_dm->p_is_fw_dw_rsvd_page_in_progress = true;
+	*dm->is_fw_dw_rsvd_page_in_progress = true;
 #endif
-	PHYDM_DBG(p_dm, DBG_TXBF, ("[%s] Start!\n", __func__));
+	PHYDM_DBG(dm, DBG_TXBF, "[%s] Start!\n", __func__);
 
 	if (idx == 0)
 		head_page = 0xFE;
 	else
 		head_page = 0xFE;
 
-	phydm_get_hal_def_var_handler_interface(p_dm, HAL_DEF_TX_PAGE_BOUNDARY, (u8 *)&tx_page_bndy);
+	phydm_get_hal_def_var_handler_interface(dm, HAL_DEF_TX_PAGE_BOUNDARY, (u8 *)&tx_page_bndy);
 
 	/*Set REG_CR bit 8. DMA beacon by SW.*/
-	u1b_tmp = odm_read_1byte(p_dm, REG_CR_8812A + 1);
-	odm_write_1byte(p_dm,  REG_CR_8812A + 1, (u1b_tmp | BIT(0)));
-
+	u1b_tmp = odm_read_1byte(dm, REG_CR_8812A + 1);
+	odm_write_1byte(dm, REG_CR_8812A + 1, (u1b_tmp | BIT(0)));
 
 	/*Set FWHW_TXQ_CTRL 0x422[6]=0 to tell Hw the packet is not a real beacon frame.*/
-	tmp_reg422 = odm_read_1byte(p_dm, REG_FWHW_TXQ_CTRL_8812A + 2);
-	odm_write_1byte(p_dm, REG_FWHW_TXQ_CTRL_8812A + 2,  tmp_reg422 & (~BIT(6)));
+	tmp_reg422 = odm_read_1byte(dm, REG_FWHW_TXQ_CTRL_8812A + 2);
+	odm_write_1byte(dm, REG_FWHW_TXQ_CTRL_8812A + 2, tmp_reg422 & (~BIT(6)));
 
 	if (tmp_reg422 & BIT(6)) {
-		PHYDM_DBG(p_dm, DBG_TXBF, ("SetBeamformDownloadNDPA_8812(): There is an adapter is sending beacon.\n"));
+		PHYDM_DBG(dm, DBG_TXBF,
+			  "SetBeamformDownloadNDPA_8812(): There is an adapter is sending beacon.\n");
 		is_send_beacon = true;
 	}
 
 	/*TDECTRL[15:8] 0x209[7:0] = 0xF6	Beacon Head for TXDMA*/
-	odm_write_1byte(p_dm, REG_TDECTRL_8812A + 1, head_page);
+	odm_write_1byte(dm, REG_TDECTRL_8812A + 1, head_page);
 
 	do {
-		/*Clear beacon valid check bit.*/
-		bcn_valid_reg = odm_read_1byte(p_dm, REG_TDECTRL_8812A + 2);
-		odm_write_1byte(p_dm, REG_TDECTRL_8812A + 2, (bcn_valid_reg | BIT(0)));
+		/*@Clear beacon valid check bit.*/
+		bcn_valid_reg = odm_read_1byte(dm, REG_TDECTRL_8812A + 2);
+		odm_write_1byte(dm, REG_TDECTRL_8812A + 2, (bcn_valid_reg | BIT(0)));
 
-		/*download NDPA rsvd page.*/
+		/*@download NDPA rsvd page.*/
 		if (p_beam_entry->beamform_entry_cap & BEAMFORMER_CAP_VHT_SU)
-			beamforming_send_vht_ndpa_packet(p_dm, p_beam_entry->mac_addr, p_beam_entry->aid, p_beam_entry->sound_bw, BEACON_QUEUE);
+			beamforming_send_vht_ndpa_packet(dm, p_beam_entry->mac_addr, p_beam_entry->aid, p_beam_entry->sound_bw, BEACON_QUEUE);
 		else
-			beamforming_send_ht_ndpa_packet(p_dm, p_beam_entry->mac_addr, p_beam_entry->sound_bw, BEACON_QUEUE);
+			beamforming_send_ht_ndpa_packet(dm, p_beam_entry->mac_addr, p_beam_entry->sound_bw, BEACON_QUEUE);
 
-		/*check rsvd page download OK.*/
-		bcn_valid_reg = odm_read_1byte(p_dm, REG_TDECTRL_8812A + 2);
+		/*@check rsvd page download OK.*/
+		bcn_valid_reg = odm_read_1byte(dm, REG_TDECTRL_8812A + 2);
 		count = 0;
 		while (!(bcn_valid_reg & BIT(0)) && count < 20) {
 			count++;
 			ODM_delay_ms(10);
-			bcn_valid_reg = odm_read_1byte(p_dm, REG_TDECTRL_8812A + 2);
+			bcn_valid_reg = odm_read_1byte(dm, REG_TDECTRL_8812A + 2);
 		}
 		dl_bcn_count++;
 	} while (!(bcn_valid_reg & BIT(0)) && dl_bcn_count < 5);
 
 	if (!(bcn_valid_reg & BIT(0)))
-		PHYDM_DBG(p_dm, DBG_TXBF, ("%s Download RSVD page failed!\n", __func__));
+		PHYDM_DBG(dm, DBG_TXBF, "%s Download RSVD page failed!\n",
+			  __func__);
 
 	/*TDECTRL[15:8] 0x209[7:0] = 0xF6	Beacon Head for TXDMA*/
-	odm_write_1byte(p_dm, REG_TDECTRL_8812A + 1, tx_page_bndy);
+	odm_write_1byte(dm, REG_TDECTRL_8812A + 1, tx_page_bndy);
 
 	/*To make sure that if there exists an adapter which would like to send beacon.*/
-	/*If exists, the origianl value of 0x422[6] will be 1, we should check this to*/
+	/*@If exists, the origianl value of 0x422[6] will be 1, we should check this to*/
 	/*prevent from setting 0x422[6] to 0 after download reserved page, or it will cause*/
 	/*the beacon cannot be sent by HW.*/
-	/*2010.06.23. Added by tynli.*/
+	/*@2010.06.23. Added by tynli.*/
 	if (is_send_beacon)
-		odm_write_1byte(p_dm, REG_FWHW_TXQ_CTRL_8812A + 2, tmp_reg422);
+		odm_write_1byte(dm, REG_FWHW_TXQ_CTRL_8812A + 2, tmp_reg422);
 
-	/*Do not enable HW DMA BCN or it will cause Pcie interface hang by timing issue. 2011.11.24. by tynli.*/
-	/*Clear CR[8] or beacon packet will not be send to TxBuf anymore.*/
-	u1b_tmp = odm_read_1byte(p_dm, REG_CR_8812A + 1);
-	odm_write_1byte(p_dm, REG_CR_8812A + 1, (u1b_tmp & (~BIT(0))));
+	/*@Do not enable HW DMA BCN or it will cause Pcie interface hang by timing issue. 2011.11.24. by tynli.*/
+	/*@Clear CR[8] or beacon packet will not be send to TxBuf anymore.*/
+	u1b_tmp = odm_read_1byte(dm, REG_CR_8812A + 1);
+	odm_write_1byte(dm, REG_CR_8812A + 1, (u1b_tmp & (~BIT(0))));
 
 	p_beam_entry->beamform_entry_state = BEAMFORMING_ENTRY_STATE_PROGRESSED;
 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
-	*p_dm->p_is_fw_dw_rsvd_page_in_progress = false;
+	*dm->is_fw_dw_rsvd_page_in_progress = false;
 #endif
 }
 
-
-void
-hal_txbf_jaguar_fw_txbf_cmd(
-	void			*p_dm_void
-)
+void hal_txbf_jaguar_fw_txbf_cmd(
+	void *dm_void)
 {
-	struct PHY_DM_STRUCT	*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	u8	idx, period0 = 0, period1 = 0;
-	u8	PageNum0 = 0xFF, PageNum1 = 0xFF;
-	u8	u1_tx_bf_parm[3] = {0};
-	struct _RT_BEAMFORMING_INFO	*p_beam_info = &p_dm->beamforming_info;
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	u8 idx, period0 = 0, period1 = 0;
+	u8 PageNum0 = 0xFF, PageNum1 = 0xFF;
+	u8 u1_tx_bf_parm[3] = {0};
+	struct _RT_BEAMFORMING_INFO *beam_info = &dm->beamforming_info;
 
 	for (idx = 0; idx < BEAMFORMEE_ENTRY_NUM; idx++) {
-		/*Modified by David*/
-		if (p_beam_info->beamformee_entry[idx].is_used && p_beam_info->beamformee_entry[idx].beamform_entry_state == BEAMFORMING_ENTRY_STATE_PROGRESSED) {
+		/*@Modified by David*/
+		if (beam_info->beamformee_entry[idx].is_used && beam_info->beamformee_entry[idx].beamform_entry_state == BEAMFORMING_ENTRY_STATE_PROGRESSED) {
 			if (idx == 0) {
-				if (p_beam_info->beamformee_entry[idx].is_sound)
+				if (beam_info->beamformee_entry[idx].is_sound)
 					PageNum0 = 0xFE;
 				else
 					PageNum0 = 0xFF; /*stop sounding*/
-				period0 = (u8)(p_beam_info->beamformee_entry[idx].sound_period);
+				period0 = (u8)(beam_info->beamformee_entry[idx].sound_period);
 			} else if (idx == 1) {
-				if (p_beam_info->beamformee_entry[idx].is_sound)
+				if (beam_info->beamformee_entry[idx].is_sound)
 					PageNum1 = 0xFE;
 				else
 					PageNum1 = 0xFF; /*stop sounding*/
-				period1 = (u8)(p_beam_info->beamformee_entry[idx].sound_period);
+				period1 = (u8)(beam_info->beamformee_entry[idx].sound_period);
 			}
 		}
 	}
@@ -206,177 +196,167 @@ hal_txbf_jaguar_fw_txbf_cmd(
 	u1_tx_bf_parm[0] = PageNum0;
 	u1_tx_bf_parm[1] = PageNum1;
 	u1_tx_bf_parm[2] = (period1 << 4) | period0;
-	odm_fill_h2c_cmd(p_dm, PHYDM_H2C_TXBF, 3, u1_tx_bf_parm);
+	odm_fill_h2c_cmd(dm, PHYDM_H2C_TXBF, 3, u1_tx_bf_parm);
 
-	PHYDM_DBG(p_dm, DBG_TXBF,
-		("[%s] PageNum0 = %d period0 = %d, PageNum1 = %d period1 %d\n", __func__, PageNum0, period0, PageNum1, period1));
+	PHYDM_DBG(dm, DBG_TXBF,
+		  "[%s] PageNum0 = %d period0 = %d, PageNum1 = %d period1 %d\n",
+		  __func__, PageNum0, period0, PageNum1, period1);
 }
 
-
-void
-hal_txbf_jaguar_enter(
-	void			*p_dm_void,
-	u8				bfer_bfee_idx
-)
+void hal_txbf_jaguar_enter(
+	void *dm_void,
+	u8 bfer_bfee_idx)
 {
-	struct PHY_DM_STRUCT	*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	u8					i = 0;
-	u8					bfer_idx = (bfer_bfee_idx & 0xF0) >> 4;
-	u8					bfee_idx = (bfer_bfee_idx & 0xF);
-	u32					csi_param;
-	struct _RT_BEAMFORMING_INFO	*p_beamforming_info = &p_dm->beamforming_info;
-	struct _RT_BEAMFORMEE_ENTRY	beamformee_entry;
-	struct _RT_BEAMFORMER_ENTRY	beamformer_entry;
-	u16					sta_id = 0;
-
-	PHYDM_DBG(p_dm, DBG_TXBF, ("[%s]Start!\n", __func__));
-
-	hal_txbf_jaguar_rf_mode(p_dm, p_beamforming_info);
-
-	if (p_dm->rf_type == RF_2T2R)
-		odm_set_bb_reg(p_dm, ODM_REG_CSI_CONTENT_VALUE, MASKDWORD, 0x00000000);	/*nc =2*/
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	u8 i = 0;
+	u8 bfer_idx = (bfer_bfee_idx & 0xF0) >> 4;
+	u8 bfee_idx = (bfer_bfee_idx & 0xF);
+	u32 csi_param;
+	struct _RT_BEAMFORMING_INFO *beamforming_info = &dm->beamforming_info;
+	struct _RT_BEAMFORMEE_ENTRY beamformee_entry;
+	struct _RT_BEAMFORMER_ENTRY beamformer_entry;
+	u16 sta_id = 0;
+
+	PHYDM_DBG(dm, DBG_TXBF, "[%s]Start!\n", __func__);
+
+	hal_txbf_jaguar_rf_mode(dm, beamforming_info);
+
+	if (dm->rf_type == RF_2T2R)
+		odm_set_bb_reg(dm, ODM_REG_CSI_CONTENT_VALUE, MASKDWORD, 0x00000000); /*nc =2*/
 	else
-		odm_set_bb_reg(p_dm, ODM_REG_CSI_CONTENT_VALUE, MASKDWORD, 0x01081008);	/*nc =1*/
+		odm_set_bb_reg(dm, ODM_REG_CSI_CONTENT_VALUE, MASKDWORD, 0x01081008); /*nc =1*/
 
-	if ((p_beamforming_info->beamformer_su_cnt > 0) && (bfer_idx < BEAMFORMER_ENTRY_NUM)) {
-		beamformer_entry = p_beamforming_info->beamformer_entry[bfer_idx];
+	if (beamforming_info->beamformer_su_cnt > 0 && bfer_idx < BEAMFORMER_ENTRY_NUM) {
+		beamformer_entry = beamforming_info->beamformer_entry[bfer_idx];
 
 		/*Sounding protocol control*/
-		odm_write_1byte(p_dm, REG_SND_PTCL_CTRL_8812A, 0xCB);
+		odm_write_1byte(dm, REG_SND_PTCL_CTRL_8812A, 0xCB);
 
-		/*MAC address/Partial AID of Beamformer*/
+		/*@MAC address/Partial AID of Beamformer*/
 		if (bfer_idx == 0) {
-			for (i = 0; i < 6 ; i++)
-				odm_write_1byte(p_dm, (REG_BFMER0_INFO_8812A + i), beamformer_entry.mac_addr[i]);
-			/*CSI report use legacy ofdm so don't need to fill P_AID. */
+			for (i = 0; i < 6; i++)
+				odm_write_1byte(dm, (REG_BFMER0_INFO_8812A + i), beamformer_entry.mac_addr[i]);
+			/*@CSI report use legacy ofdm so don't need to fill P_AID. */
 			/*platform_efio_write_2byte(adapter, REG_BFMER0_INFO_8812A+6, beamform_entry.P_AID); */
 		} else {
-			for (i = 0; i < 6 ; i++)
-				odm_write_1byte(p_dm, (REG_BFMER1_INFO_8812A + i), beamformer_entry.mac_addr[i]);
-			/*CSI report use legacy ofdm so don't need to fill P_AID.*/
+			for (i = 0; i < 6; i++)
+				odm_write_1byte(dm, (REG_BFMER1_INFO_8812A + i), beamformer_entry.mac_addr[i]);
+			/*@CSI report use legacy ofdm so don't need to fill P_AID.*/
 			/*platform_efio_write_2byte(adapter, REG_BFMER1_INFO_8812A+6, beamform_entry.P_AID);*/
 		}
 
-		/*CSI report parameters of Beamformee*/
+		/*@CSI report parameters of Beamformee*/
 		if (beamformer_entry.beamform_entry_cap & BEAMFORMEE_CAP_VHT_SU) {
-			if (p_dm->rf_type == RF_2T2R)
+			if (dm->rf_type == RF_2T2R)
 				csi_param = 0x01090109;
 			else
 				csi_param = 0x01080108;
 		} else {
-			if (p_dm->rf_type == RF_2T2R)
+			if (dm->rf_type == RF_2T2R)
 				csi_param = 0x03090309;
 			else
 				csi_param = 0x03080308;
 		}
 
-		odm_write_4byte(p_dm, REG_CSI_RPT_PARAM_BW20_8812A, csi_param);
-		odm_write_4byte(p_dm, REG_CSI_RPT_PARAM_BW40_8812A, csi_param);
-		odm_write_4byte(p_dm, REG_CSI_RPT_PARAM_BW80_8812A, csi_param);
+		odm_write_4byte(dm, REG_CSI_RPT_PARAM_BW20_8812A, csi_param);
+		odm_write_4byte(dm, REG_CSI_RPT_PARAM_BW40_8812A, csi_param);
+		odm_write_4byte(dm, REG_CSI_RPT_PARAM_BW80_8812A, csi_param);
 
 		/*Timeout value for MAC to leave NDP_RX_standby_state (60 us, Test chip) (80 us,  MP chip)*/
-		odm_write_1byte(p_dm, REG_SND_PTCL_CTRL_8812A + 3, 0x50);
+		odm_write_1byte(dm, REG_SND_PTCL_CTRL_8812A + 3, 0x50);
 	}
 
+	if (beamforming_info->beamformee_su_cnt > 0 && bfee_idx < BEAMFORMEE_ENTRY_NUM) {
+		beamformee_entry = beamforming_info->beamformee_entry[bfee_idx];
 
-	if ((p_beamforming_info->beamformee_su_cnt > 0) && (bfee_idx < BEAMFORMEE_ENTRY_NUM)) {
-		beamformee_entry = p_beamforming_info->beamformee_entry[bfee_idx];
-
-		if (phydm_acting_determine(p_dm, phydm_acting_as_ibss))
+		if (phydm_acting_determine(dm, phydm_acting_as_ibss))
 			sta_id = beamformee_entry.mac_id;
 		else
 			sta_id = beamformee_entry.p_aid;
 
 		/*P_AID of Beamformee & enable NDPA transmission & enable NDPA interrupt*/
 		if (bfee_idx == 0) {
-			odm_write_2byte(p_dm, REG_TXBF_CTRL_8812A, sta_id);
-			odm_write_1byte(p_dm, REG_TXBF_CTRL_8812A + 3, odm_read_1byte(p_dm, REG_TXBF_CTRL_8812A + 3) | BIT(4) | BIT(6) | BIT(7));
+			odm_write_2byte(dm, REG_TXBF_CTRL_8812A, sta_id);
+			odm_write_1byte(dm, REG_TXBF_CTRL_8812A + 3, odm_read_1byte(dm, REG_TXBF_CTRL_8812A + 3) | BIT(4) | BIT(6) | BIT(7));
 		} else
-			odm_write_2byte(p_dm, REG_TXBF_CTRL_8812A + 2, sta_id | BIT(12) | BIT(14) | BIT(15));
+			odm_write_2byte(dm, REG_TXBF_CTRL_8812A + 2, sta_id | BIT(12) | BIT(14) | BIT(15));
 
-		/*CSI report parameters of Beamformee*/
+		/*@CSI report parameters of Beamformee*/
 		if (bfee_idx == 0) {
-			/*Get BIT24 & BIT25*/
-			u8	tmp = odm_read_1byte(p_dm, REG_BFMEE_SEL_8812A + 3) & 0x3;
+			/*@Get BIT24 & BIT25*/
+			u8 tmp = odm_read_1byte(dm, REG_BFMEE_SEL_8812A + 3) & 0x3;
 
-			odm_write_1byte(p_dm, REG_BFMEE_SEL_8812A + 3, tmp | 0x60);
-			odm_write_2byte(p_dm, REG_BFMEE_SEL_8812A, sta_id | BIT(9));
+			odm_write_1byte(dm, REG_BFMEE_SEL_8812A + 3, tmp | 0x60);
+			odm_write_2byte(dm, REG_BFMEE_SEL_8812A, sta_id | BIT(9));
 		} else {
 			/*Set BIT25*/
-			odm_write_2byte(p_dm, REG_BFMEE_SEL_8812A + 2, sta_id | 0xE200);
+			odm_write_2byte(dm, REG_BFMEE_SEL_8812A + 2, sta_id | 0xE200);
 		}
-		phydm_beamforming_notify(p_dm);
+		phydm_beamforming_notify(dm);
 	}
 }
 
-
-void
-hal_txbf_jaguar_leave(
-	void			*p_dm_void,
-	u8				idx
-)
+void hal_txbf_jaguar_leave(
+	void *dm_void,
+	u8 idx)
 {
-	struct PHY_DM_STRUCT	*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	struct _RT_BEAMFORMING_INFO	*p_beamforming_info = &p_dm->beamforming_info;
-	struct _RT_BEAMFORMER_ENTRY	beamformer_entry;
-	struct _RT_BEAMFORMEE_ENTRY	beamformee_entry;
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct _RT_BEAMFORMING_INFO *beamforming_info = &dm->beamforming_info;
+	struct _RT_BEAMFORMER_ENTRY beamformer_entry;
+	struct _RT_BEAMFORMEE_ENTRY beamformee_entry;
 
 	if (idx < BEAMFORMER_ENTRY_NUM) {
-		beamformer_entry = p_beamforming_info->beamformer_entry[idx];
-		beamformee_entry = p_beamforming_info->beamformee_entry[idx];
+		beamformer_entry = beamforming_info->beamformer_entry[idx];
+		beamformee_entry = beamforming_info->beamformee_entry[idx];
 	} else
 		return;
 
-	PHYDM_DBG(p_dm, DBG_TXBF, ("[%s]Start!, IDx = %d\n", __func__, idx));
+	PHYDM_DBG(dm, DBG_TXBF, "[%s]Start!, IDx = %d\n", __func__, idx);
 
-	/*Clear P_AID of Beamformee*/
-	/*Clear MAC address of Beamformer*/
-	/*Clear Associated Bfmee Sel*/
+	/*@Clear P_AID of Beamformee*/
+	/*@Clear MAC address of Beamformer*/
+	/*@Clear Associated Bfmee Sel*/
 
 	if (beamformer_entry.beamform_entry_cap == BEAMFORMING_CAP_NONE) {
-		odm_write_1byte(p_dm, REG_SND_PTCL_CTRL_8812A, 0xC8);
+		odm_write_1byte(dm, REG_SND_PTCL_CTRL_8812A, 0xC8);
 		if (idx == 0) {
-			odm_write_4byte(p_dm, REG_BFMER0_INFO_8812A, 0);
-			odm_write_2byte(p_dm, REG_BFMER0_INFO_8812A + 4, 0);
-			odm_write_2byte(p_dm, REG_CSI_RPT_PARAM_BW20_8812A, 0);
-			odm_write_2byte(p_dm, REG_CSI_RPT_PARAM_BW40_8812A, 0);
-			odm_write_2byte(p_dm, REG_CSI_RPT_PARAM_BW80_8812A, 0);
+			odm_write_4byte(dm, REG_BFMER0_INFO_8812A, 0);
+			odm_write_2byte(dm, REG_BFMER0_INFO_8812A + 4, 0);
+			odm_write_2byte(dm, REG_CSI_RPT_PARAM_BW20_8812A, 0);
+			odm_write_2byte(dm, REG_CSI_RPT_PARAM_BW40_8812A, 0);
+			odm_write_2byte(dm, REG_CSI_RPT_PARAM_BW80_8812A, 0);
 		} else {
-			odm_write_4byte(p_dm, REG_BFMER1_INFO_8812A, 0);
-			odm_write_2byte(p_dm, REG_BFMER1_INFO_8812A + 4, 0);
-			odm_write_2byte(p_dm, REG_CSI_RPT_PARAM_BW20_8812A, 0);
-			odm_write_2byte(p_dm, REG_CSI_RPT_PARAM_BW40_8812A, 0);
-			odm_write_2byte(p_dm, REG_CSI_RPT_PARAM_BW80_8812A, 0);
+			odm_write_4byte(dm, REG_BFMER1_INFO_8812A, 0);
+			odm_write_2byte(dm, REG_BFMER1_INFO_8812A + 4, 0);
+			odm_write_2byte(dm, REG_CSI_RPT_PARAM_BW20_8812A, 0);
+			odm_write_2byte(dm, REG_CSI_RPT_PARAM_BW40_8812A, 0);
+			odm_write_2byte(dm, REG_CSI_RPT_PARAM_BW80_8812A, 0);
 		}
 	}
 
 	if (beamformee_entry.beamform_entry_cap == BEAMFORMING_CAP_NONE) {
-		hal_txbf_jaguar_rf_mode(p_dm, p_beamforming_info);
+		hal_txbf_jaguar_rf_mode(dm, beamforming_info);
 		if (idx == 0) {
-			odm_write_2byte(p_dm, REG_TXBF_CTRL_8812A, 0x0);
-			odm_write_2byte(p_dm, REG_BFMEE_SEL_8812A, 0);
+			odm_write_2byte(dm, REG_TXBF_CTRL_8812A, 0x0);
+			odm_write_2byte(dm, REG_BFMEE_SEL_8812A, 0);
 		} else {
-			odm_write_2byte(p_dm, REG_TXBF_CTRL_8812A + 2, odm_read_2byte(p_dm, REG_TXBF_CTRL_8812A + 2) & 0xF000);
-			odm_write_2byte(p_dm, REG_BFMEE_SEL_8812A + 2, odm_read_2byte(p_dm, REG_BFMEE_SEL_8812A + 2) & 0x60);
+			odm_write_2byte(dm, REG_TXBF_CTRL_8812A + 2, odm_read_2byte(dm, REG_TXBF_CTRL_8812A + 2) & 0xF000);
+			odm_write_2byte(dm, REG_BFMEE_SEL_8812A + 2, odm_read_2byte(dm, REG_BFMEE_SEL_8812A + 2) & 0x60);
 		}
 	}
-
 }
 
-
-void
-hal_txbf_jaguar_status(
-	void			*p_dm_void,
-	u8				idx
-)
+void hal_txbf_jaguar_status(
+	void *dm_void,
+	u8 idx)
 {
-	struct PHY_DM_STRUCT	*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	u16					beam_ctrl_val;
-	u32					beam_ctrl_reg;
-	struct _RT_BEAMFORMING_INFO	*p_beam_info = &p_dm->beamforming_info;
-	struct _RT_BEAMFORMEE_ENTRY	beamform_entry = p_beam_info->beamformee_entry[idx];
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	u16 beam_ctrl_val;
+	u32 beam_ctrl_reg;
+	struct _RT_BEAMFORMING_INFO *beam_info = &dm->beamforming_info;
+	struct _RT_BEAMFORMEE_ENTRY beamform_entry = beam_info->beamformee_entry[idx];
 
-	if (phydm_acting_determine(p_dm, phydm_acting_as_ibss))
+	if (phydm_acting_determine(dm, phydm_acting_as_ibss))
 		beam_ctrl_val = beamform_entry.mac_id;
 	else
 		beam_ctrl_val = beamform_entry.p_aid;
@@ -388,7 +368,7 @@ hal_txbf_jaguar_status(
 		beam_ctrl_val |= BIT(12) | BIT(14) | BIT(15);
 	}
 
-	if ((beamform_entry.beamform_entry_state == BEAMFORMING_ENTRY_STATE_PROGRESSED) && (p_beam_info->apply_v_matrix == true)) {
+	if (beamform_entry.beamform_entry_state == BEAMFORMING_ENTRY_STATE_PROGRESSED && beam_info->apply_v_matrix == true) {
 		if (beamform_entry.sound_bw == CHANNEL_WIDTH_20)
 			beam_ctrl_val |= BIT(9);
 		else if (beamform_entry.sound_bw == CHANNEL_WIDTH_40)
@@ -398,77 +378,70 @@ hal_txbf_jaguar_status(
 	} else
 		beam_ctrl_val &= ~(BIT(9) | BIT(10) | BIT(11));
 
-	PHYDM_DBG(p_dm, DBG_TXBF, ("[%s] beam_ctrl_val = 0x%x!\n", __func__, beam_ctrl_val));
+	PHYDM_DBG(dm, DBG_TXBF, "[%s] beam_ctrl_val = 0x%x!\n", __func__,
+		  beam_ctrl_val);
 
-	odm_write_2byte(p_dm, beam_ctrl_reg, beam_ctrl_val);
+	odm_write_2byte(dm, beam_ctrl_reg, beam_ctrl_val);
 }
 
-
-
-void
-hal_txbf_jaguar_fw_txbf(
-	void			*p_dm_void,
-	u8				idx
-)
+void hal_txbf_jaguar_fw_txbf(
+	void *dm_void,
+	u8 idx)
 {
-	struct PHY_DM_STRUCT	*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	struct _RT_BEAMFORMING_INFO	*p_beam_info = &p_dm->beamforming_info;
-	struct _RT_BEAMFORMEE_ENTRY	*p_beam_entry = p_beam_info->beamformee_entry + idx;
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct _RT_BEAMFORMING_INFO *beam_info = &dm->beamforming_info;
+	struct _RT_BEAMFORMEE_ENTRY *p_beam_entry = beam_info->beamformee_entry + idx;
 
-	PHYDM_DBG(p_dm, DBG_TXBF, ("[%s] Start!\n", __func__));
+	PHYDM_DBG(dm, DBG_TXBF, "[%s] Start!\n", __func__);
 
 	if (p_beam_entry->beamform_entry_state == BEAMFORMING_ENTRY_STATE_PROGRESSING)
-		hal_txbf_jaguar_download_ndpa(p_dm, idx);
+		hal_txbf_jaguar_download_ndpa(dm, idx);
 
-	hal_txbf_jaguar_fw_txbf_cmd(p_dm);
+	hal_txbf_jaguar_fw_txbf_cmd(dm);
 }
 
-
-void
-hal_txbf_jaguar_patch(
-	void			*p_dm_void,
-	u8				operation
-)
+void hal_txbf_jaguar_patch(
+	void *dm_void,
+	u8 operation)
 {
-	struct PHY_DM_STRUCT	*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	struct _RT_BEAMFORMING_INFO	*p_beam_info = &p_dm->beamforming_info;
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	struct _RT_BEAMFORMING_INFO *beam_info = &dm->beamforming_info;
 
-	PHYDM_DBG(p_dm, DBG_TXBF, ("[%s] Start!\n", __func__));
+	PHYDM_DBG(dm, DBG_TXBF, "[%s] Start!\n", __func__);
 
-	if (p_beam_info->beamform_cap == BEAMFORMING_CAP_NONE)
+	if (beam_info->beamform_cap == BEAMFORMING_CAP_NONE)
 		return;
 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
 	if (operation == SCAN_OPT_BACKUP_BAND0)
-		odm_write_1byte(p_dm, REG_SND_PTCL_CTRL_8812A, 0xC8);
+		odm_write_1byte(dm, REG_SND_PTCL_CTRL_8812A, 0xC8);
 	else if (operation == SCAN_OPT_RESTORE)
-		odm_write_1byte(p_dm, REG_SND_PTCL_CTRL_8812A, 0xCB);
+		odm_write_1byte(dm, REG_SND_PTCL_CTRL_8812A, 0xCB);
 #endif
 }
 
-void
-hal_txbf_jaguar_clk_8812a(
-	void			*p_dm_void
-)
+void hal_txbf_jaguar_clk_8812a(
+	void *dm_void)
 {
-	struct PHY_DM_STRUCT	*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	u16	u2btmp;
-	u8	count = 0, u1btmp;
-	struct _ADAPTER	*adapter = p_dm->adapter;
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	u16 u2btmp;
+	u8 count = 0, u1btmp;
+	void *adapter = dm->adapter;
 
-	PHYDM_DBG(p_dm, DBG_TXBF, ("[%s] Start!\n", __func__));
+	PHYDM_DBG(dm, DBG_TXBF, "[%s] Start!\n", __func__);
 
-	if (*(p_dm->p_is_scan_in_process)) {
-		PHYDM_DBG(p_dm, DBG_TXBF, ("[%s] return by Scan\n", __func__));
+	if (*dm->is_scan_in_process) {
+		PHYDM_DBG(dm, DBG_TXBF, "[%s] return by Scan\n", __func__);
 		return;
 	}
 #if DEV_BUS_TYPE == RT_PCI_INTERFACE
 	/*Stop PCIe TxDMA*/
-	odm_write_1byte(p_dm, REG_PCIE_CTRL_REG_8812A + 1, 0xFE);
+	if (dm->support_interface == ODM_ITRF_PCIE)
+		odm_write_1byte(dm, REG_PCIE_CTRL_REG_8812A + 1, 0xFE);
 #endif
 
-	/*Stop Usb TxDMA*/
+/*Stop Usb TxDMA*/
 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
-	RT_DISABLE_FUNC(adapter, DF_TX_BIT);
+	RT_DISABLE_FUNC((PADAPTER)adapter, DF_TX_BIT);
 	PlatformReturnAllPendingTxPackets(adapter);
 #else
 	rtw_write_port_cancel(adapter);
@@ -476,7 +449,7 @@ hal_txbf_jaguar_clk_8812a(
 
 	/*Wait TXFF empty*/
 	for (count = 0; count < 100; count++) {
-		u2btmp = odm_read_2byte(p_dm, REG_TXPKT_EMPTY_8812A);
+		u2btmp = odm_read_2byte(dm, REG_TXPKT_EMPTY_8812A);
 		u2btmp = u2btmp & 0xfff;
 		if (u2btmp != 0xfff) {
 			ODM_delay_ms(10);
@@ -486,55 +459,52 @@ hal_txbf_jaguar_clk_8812a(
 	}
 
 	/*TX pause*/
-	odm_write_1byte(p_dm, REG_TXPAUSE_8812A, 0xFF);
+	odm_write_1byte(dm, REG_TXPAUSE_8812A, 0xFF);
 
 	/*Wait TX state Machine OK*/
 	for (count = 0; count < 100; count++) {
-		if (odm_read_4byte(p_dm, REG_SCH_TXCMD_8812A) != 0)
+		if (odm_read_4byte(dm, REG_SCH_TXCMD_8812A) != 0)
 			continue;
 		else
 			break;
 	}
 
-
 	/*Stop RX DMA path*/
-	u1btmp = odm_read_1byte(p_dm, REG_RXDMA_CONTROL_8812A);
-	odm_write_1byte(p_dm, REG_RXDMA_CONTROL_8812A, u1btmp | BIT(2));
+	u1btmp = odm_read_1byte(dm, REG_RXDMA_CONTROL_8812A);
+	odm_write_1byte(dm, REG_RXDMA_CONTROL_8812A, u1btmp | BIT(2));
 
 	for (count = 0; count < 100; count++) {
-		u1btmp = odm_read_1byte(p_dm, REG_RXDMA_CONTROL_8812A);
+		u1btmp = odm_read_1byte(dm, REG_RXDMA_CONTROL_8812A);
 		if (u1btmp & BIT(1))
 			break;
 		else
 			ODM_delay_ms(10);
 	}
 
-	/*Disable clock*/
-	odm_write_1byte(p_dm, REG_SYS_CLKR_8812A + 1, 0xf0);
-	/*Disable 320M*/
-	odm_write_1byte(p_dm, REG_AFE_PLL_CTRL_8812A + 3, 0x8);
-	/*Enable 320M*/
-	odm_write_1byte(p_dm, REG_AFE_PLL_CTRL_8812A + 3, 0xa);
-	/*Enable clock*/
-	odm_write_1byte(p_dm, REG_SYS_CLKR_8812A + 1, 0xfc);
-
+	/*@Disable clock*/
+	odm_write_1byte(dm, REG_SYS_CLKR_8812A + 1, 0xf0);
+	/*@Disable 320M*/
+	odm_write_1byte(dm, REG_AFE_PLL_CTRL_8812A + 3, 0x8);
+	/*@Enable 320M*/
+	odm_write_1byte(dm, REG_AFE_PLL_CTRL_8812A + 3, 0xa);
+	/*@Enable clock*/
+	odm_write_1byte(dm, REG_SYS_CLKR_8812A + 1, 0xfc);
 
 	/*Release Tx pause*/
-	odm_write_1byte(p_dm, REG_TXPAUSE_8812A, 0);
+	odm_write_1byte(dm, REG_TXPAUSE_8812A, 0);
 
-	/*Enable RX DMA path*/
-	u1btmp = odm_read_1byte(p_dm, REG_RXDMA_CONTROL_8812A);
-	odm_write_1byte(p_dm, REG_RXDMA_CONTROL_8812A, u1btmp & (~BIT(2)));
+	/*@Enable RX DMA path*/
+	u1btmp = odm_read_1byte(dm, REG_RXDMA_CONTROL_8812A);
+	odm_write_1byte(dm, REG_RXDMA_CONTROL_8812A, u1btmp & (~BIT(2)));
 #if DEV_BUS_TYPE == RT_PCI_INTERFACE
-	/*Enable PCIe TxDMA*/
-	odm_write_1byte(p_dm, REG_PCIE_CTRL_REG_8812A + 1, 0);
+	/*@Enable PCIe TxDMA*/
+	if (dm->support_interface == ODM_ITRF_PCIE)
+		odm_write_1byte(dm, REG_PCIE_CTRL_REG_8812A + 1, 0);
 #endif
 	/*Start Usb TxDMA*/
-	RT_ENABLE_FUNC(adapter, DF_TX_BIT);
+	RT_ENABLE_FUNC((PADAPTER)adapter, DF_TX_BIT);
 }
 
 #endif
 
-
-
 #endif
diff --git a/rtl8723DS/hal/phydm/txbf/haltxbfjaguar.h b/rtl8723DS/hal/phydm/txbf/haltxbfjaguar.h
index 4b1b320..2c9a623 100755..100644
--- a/rtl8723DS/hal/phydm/txbf/haltxbfjaguar.h
+++ b/rtl8723DS/hal/phydm/txbf/haltxbfjaguar.h
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2016 - 2017 Realtek Corporation.
+ * Copyright(c) 2007 - 2017  Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -8,81 +8,71 @@
  *
  * This program is distributed in the hope that it will be useful, but WITHOUT
  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  * more details.
  *
+ * The full GNU General Public License is included in this distribution in the
+ * file called LICENSE.
+ *
+ * Contact Information:
+ * wlanfae <wlanfae@realtek.com>
+ * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
+ * Hsinchu 300, Taiwan.
+ *
+ * Larry Finger <Larry.Finger@lwfinger.net>
+ *
  *****************************************************************************/
 #ifndef __HAL_TXBF_JAGUAR_H__
 #define __HAL_TXBF_JAGUAR_H__
 #if ((RTL8812A_SUPPORT == 1) || (RTL8821A_SUPPORT == 1))
-#if (BEAMFORMING_SUPPORT == 1)
-
-void
-hal_txbf_8812a_set_ndpa_rate(
-	void			*p_dm_void,
-	u8	BW,
-	u8	rate
-);
-
-
-void
-hal_txbf_jaguar_enter(
-	void			*p_dm_void,
-	u8				idx
-);
-
-
-void
-hal_txbf_jaguar_leave(
-	void			*p_dm_void,
-	u8				idx
-);
-
+#ifdef PHYDM_BEAMFORMING_SUPPORT
 
-void
-hal_txbf_jaguar_status(
-	void			*p_dm_void,
-	u8				idx
-);
+void hal_txbf_8812a_set_ndpa_rate(
+	void *dm_void,
+	u8 BW,
+	u8 rate);
 
+void hal_txbf_jaguar_enter(
+	void *dm_void,
+	u8 idx);
 
-void
-hal_txbf_jaguar_fw_txbf(
-	void			*p_dm_void,
-	u8				idx
-);
+void hal_txbf_jaguar_leave(
+	void *dm_void,
+	u8 idx);
 
+void hal_txbf_jaguar_status(
+	void *dm_void,
+	u8 idx);
 
-void
-hal_txbf_jaguar_patch(
-	void			*p_dm_void,
-	u8				operation
-);
+void hal_txbf_jaguar_fw_txbf(
+	void *dm_void,
+	u8 idx);
 
+void hal_txbf_jaguar_patch(
+	void *dm_void,
+	u8 operation);
 
-void
-hal_txbf_jaguar_clk_8812a(
-	void			*p_dm_void
-);
+void hal_txbf_jaguar_clk_8812a(
+	void *dm_void);
 #else
 
-#define hal_txbf_8812a_set_ndpa_rate(p_dm_void,	BW,	rate)
-#define hal_txbf_jaguar_enter(p_dm_void, idx)
-#define hal_txbf_jaguar_leave(p_dm_void, idx)
-#define hal_txbf_jaguar_status(p_dm_void, idx)
-#define hal_txbf_jaguar_fw_txbf(p_dm_void,	idx)
-#define hal_txbf_jaguar_patch(p_dm_void, operation)
-#define hal_txbf_jaguar_clk_8812a(p_dm_void)
+#define hal_txbf_8812a_set_ndpa_rate(dm_void, BW, rate)
+#define hal_txbf_jaguar_enter(dm_void, idx)
+#define hal_txbf_jaguar_leave(dm_void, idx)
+#define hal_txbf_jaguar_status(dm_void, idx)
+#define hal_txbf_jaguar_fw_txbf(dm_void, idx)
+#define hal_txbf_jaguar_patch(dm_void, operation)
+#define hal_txbf_jaguar_clk_8812a(dm_void)
 #endif
 #else
 
-#define hal_txbf_8812a_set_ndpa_rate(p_dm_void,	BW,	rate)
-#define hal_txbf_jaguar_enter(p_dm_void, idx)
-#define hal_txbf_jaguar_leave(p_dm_void, idx)
-#define hal_txbf_jaguar_status(p_dm_void, idx)
-#define hal_txbf_jaguar_fw_txbf(p_dm_void,	idx)
-#define hal_txbf_jaguar_patch(p_dm_void, operation)
-#define hal_txbf_jaguar_clk_8812a(p_dm_void)
+#define hal_txbf_8812a_set_ndpa_rate(dm_void, BW, rate)
+#define hal_txbf_jaguar_enter(dm_void, idx)
+#define hal_txbf_jaguar_leave(dm_void, idx)
+#define hal_txbf_jaguar_status(dm_void, idx)
+#define hal_txbf_jaguar_fw_txbf(dm_void, idx)
+#define hal_txbf_jaguar_patch(dm_void, operation)
+#define hal_txbf_jaguar_clk_8812a(dm_void)
 #endif
 
-#endif	/*  #ifndef __HAL_TXBF_JAGUAR_H__ */
+#endif /*  @#ifndef __HAL_TXBF_JAGUAR_H__ */
diff --git a/rtl8723DS/hal/phydm/txbf/phydm_hal_txbf_api.c b/rtl8723DS/hal/phydm/txbf/phydm_hal_txbf_api.c
index 2fb3f0a..a7f7e14 100755..100644
--- a/rtl8723DS/hal/phydm/txbf/phydm_hal_txbf_api.c
+++ b/rtl8723DS/hal/phydm/txbf/phydm_hal_txbf_api.c
@@ -17,75 +17,67 @@
 #include "phydm_precomp.h"
 
 #if (defined(CONFIG_BB_TXBF_API))
-#if (RTL8822B_SUPPORT == 1)
-/*Add by YuChen for 8822B MU-MIMO API*/
+#if (RTL8822B_SUPPORT == 1 || RTL8192F_SUPPORT == 1 ||\
+	RTL8822C_SUPPORT == 1 || RTL8198F_SUPPORT == 1 || RTL8814B_SUPPORT == 1)
+/*@Add by YuChen for 8822B MU-MIMO API*/
 
 /*this function is only used for BFer*/
-u8
-phydm_get_ndpa_rate(
-	void		*p_dm_void
-)
+u8 phydm_get_ndpa_rate(void *dm_void)
 {
-	struct PHY_DM_STRUCT	*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
-	u8		ndpa_rate = ODM_RATE6M;
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	u8 ndpa_rate = ODM_RATE6M;
 
-	if (p_dm->rssi_min >= 30)	/*link RSSI > 30%*/
+	if (dm->rssi_min >= 30) /*@link RSSI > 30%*/
 		ndpa_rate = ODM_RATE24M;
-	else if (p_dm->rssi_min <= 25)
+	else if (dm->rssi_min <= 25)
 		ndpa_rate = ODM_RATE6M;
 
-	PHYDM_DBG(p_dm, DBG_TXBF, ("[%s] ndpa_rate = 0x%x\n", __func__, ndpa_rate));
+	PHYDM_DBG(dm, DBG_TXBF, "[%s] ndpa_rate = 0x%x\n", __func__, ndpa_rate);
 
 	return ndpa_rate;
-
 }
 
 /*this function is only used for BFer*/
-u8
-phydm_get_beamforming_sounding_info(
-	void		*p_dm_void,
-	u16	*troughput,
-	u8	total_bfee_num,
-	u8	*tx_rate
-)
+u8 phydm_get_beamforming_sounding_info(void *dm_void, u16 *throughput,
+				       u8 total_bfee_num, u8 *tx_rate)
 {
-	u8	idx = 0;
-	u8	soundingdecision = 0xff;
-	struct PHY_DM_STRUCT	*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
+	u8 idx = 0;
+	u8 snddecision = 0xff;
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
 
 	for (idx = 0; idx < total_bfee_num; idx++) {
-		if (p_dm->support_ic_type & (ODM_RTL8814A)) {
-			if (((tx_rate[idx] >= ODM_RATEVHTSS3MCS7) && (tx_rate[idx] <= ODM_RATEVHTSS3MCS9)))
-				soundingdecision = soundingdecision & ~(1 << idx);
-		} else if (p_dm->support_ic_type & (ODM_RTL8822B | ODM_RTL8822C | ODM_RTL8812)) {
-			if (((tx_rate[idx] >= ODM_RATEVHTSS2MCS7) && (tx_rate[idx] <= ODM_RATEVHTSS2MCS9)))
-				soundingdecision = soundingdecision & ~(1 << idx);
-		} else if (p_dm->support_ic_type & (ODM_RTL8814B)) {
-			if (((tx_rate[idx] >= ODM_RATEVHTSS4MCS7) && (tx_rate[idx] <= ODM_RATEVHTSS4MCS9)))
-				soundingdecision = soundingdecision & ~(1 << idx);
+		if (dm->support_ic_type & (ODM_RTL8814A)) {
+			if ((tx_rate[idx] >= ODM_RATEVHTSS3MCS7 &&
+			     tx_rate[idx] <= ODM_RATEVHTSS3MCS9))
+				snddecision = snddecision & ~(1 << idx);
+		} else if (dm->support_ic_type & (ODM_RTL8822B | ODM_RTL8822C |
+			   ODM_RTL8812 | ODM_RTL8192F)) {
+			if ((tx_rate[idx] >= ODM_RATEVHTSS2MCS7 &&
+			     tx_rate[idx] <= ODM_RATEVHTSS2MCS9))
+				snddecision = snddecision & ~(1 << idx);
+		} else if (dm->support_ic_type & (ODM_RTL8814B)) {
+			if ((tx_rate[idx] >= ODM_RATEVHTSS4MCS7 &&
+			     tx_rate[idx] <= ODM_RATEVHTSS4MCS9))
+				snddecision = snddecision & ~(1 << idx);
 		}
 	}
 
 	for (idx = 0; idx < total_bfee_num; idx++) {
-		if (troughput[idx] <= 10)
-			soundingdecision = soundingdecision & ~(1 << idx);
+		if (throughput[idx] <= 10)
+			snddecision = snddecision & ~(1 << idx);
 	}
 
-	PHYDM_DBG(p_dm, DBG_TXBF, ("[%s] soundingdecision = 0x%x\n", __func__, soundingdecision));
-
-	return soundingdecision;
+	PHYDM_DBG(dm, DBG_TXBF, "[%s] soundingdecision = 0x%x\n", __func__,
+		  snddecision);
 
+	return snddecision;
 }
 
 /*this function is only used for BFer*/
-u8
-phydm_get_mu_bfee_snding_decision(
-	void		*p_dm_void,
-	u16	throughput
-)
+u8 phydm_get_mu_bfee_snding_decision(void *dm_void, u16 throughput)
 {
-	u8	snding_score = 0;
-	struct PHY_DM_STRUCT	*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
+	u8 snding_score = 0;
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
 
 	/*throughput unit is Mbps*/
 	if (throughput >= 500)
@@ -111,31 +103,26 @@ phydm_get_mu_bfee_snding_decision(
 	else
 		snding_score = 0;
 
-	PHYDM_DBG(p_dm, DBG_TXBF, ("[%s] snding_score = 0x%x\n", __func__, snding_score));
+	PHYDM_DBG(dm, DBG_TXBF, "[%s] snding_score = 0x%x\n", __func__,
+		  snding_score);
 
 	return snding_score;
-
 }
 
-
 #endif
 #if (DM_ODM_SUPPORT_TYPE != ODM_AP)
-u8
-beamforming_get_htndp_tx_rate(
-	void	*p_dm_void,
-	u8	comp_steering_num_of_bfer
-)
+u8 beamforming_get_htndp_tx_rate(void *dm_void, u8 bfer_str_num)
 {
-	struct PHY_DM_STRUCT	*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
 	u8 nr_index = 0;
 	u8 ndp_tx_rate;
-	/*Find nr*/
+/*@Find nr*/
 #if (RTL8814A_SUPPORT == 1)
-	if (p_dm->support_ic_type & ODM_RTL8814A)
-		nr_index = tx_bf_nr(hal_txbf_8814a_get_ntx(p_dm), comp_steering_num_of_bfer);
+	if (dm->support_ic_type & ODM_RTL8814A)
+		nr_index = tx_bf_nr(hal_txbf_8814a_get_ntx(dm), bfer_str_num);
 	else
 #endif
-		nr_index = tx_bf_nr(1, comp_steering_num_of_bfer);
+		nr_index = tx_bf_nr(1, bfer_str_num);
 
 	switch (nr_index) {
 	case 1:
@@ -156,25 +143,20 @@ beamforming_get_htndp_tx_rate(
 	}
 
 	return ndp_tx_rate;
-
 }
 
-u8
-beamforming_get_vht_ndp_tx_rate(
-	void	*p_dm_void,
-	u8	comp_steering_num_of_bfer
-)
+u8 beamforming_get_vht_ndp_tx_rate(void *dm_void, u8 bfer_str_num)
 {
-	struct PHY_DM_STRUCT	*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
 	u8 nr_index = 0;
 	u8 ndp_tx_rate;
-	/*Find nr*/
+/*@Find nr*/
 #if (RTL8814A_SUPPORT == 1)
-	if (p_dm->support_ic_type & ODM_RTL8814A)
-		nr_index = tx_bf_nr(hal_txbf_8814a_get_ntx(p_dm), comp_steering_num_of_bfer);
+	if (dm->support_ic_type & ODM_RTL8814A)
+		nr_index = tx_bf_nr(hal_txbf_8814a_get_ntx(dm), bfer_str_num);
 	else
 #endif
-		nr_index = tx_bf_nr(1, comp_steering_num_of_bfer);
+		nr_index = tx_bf_nr(1, bfer_str_num);
 
 	switch (nr_index) {
 	case 1:
@@ -195,8 +177,249 @@ beamforming_get_vht_ndp_tx_rate(
 	}
 
 	return ndp_tx_rate;
-
 }
 #endif
+#ifdef PHYDM_IC_JGR3_SERIES_SUPPORT
+/*this function is only used for BFer*/
+void phydm_txbf_rfmode(void *dm_void, u8 su_bfee_cnt, u8 mu_bfee_cnt)
+{
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	u8 i;
+
+	if (dm->rf_type == RF_1T1R)
+		return;
+#if (RTL8822C_SUPPORT == 1)
+	if (dm->support_ic_type == ODM_RTL8822C) {
+		if (su_bfee_cnt > 0 || mu_bfee_cnt > 0) {
+			for (i = RF_PATH_A; i <= RF_PATH_B; i++) {
+				/*RF mode table write enable*/
+				odm_set_rf_reg(dm, (enum rf_path)i, RF_0xef,
+					       BIT(19), 0x1);
+				/*Select RX mode*/
+				odm_set_rf_reg(dm, (enum rf_path)i, RF_0x33,
+					       0xF, 3);
+				/*Set Table data*/
+				odm_set_rf_reg(dm, (enum rf_path)i, RF_0x3e,
+					       0x3, 0x2);
+				/*Set Table data*/
+				odm_set_rf_reg(dm, (enum rf_path)i, RF_0x3f,
+					       0xfffff, 0x61AFF);
+				/*RF mode table write disable*/
+				odm_set_rf_reg(dm, (enum rf_path)i, RF_0xef,
+					       BIT(19), 0x0);
+			}
+		}
+		/*@if Nsts > Nc, don't apply V matrix*/
+		odm_set_bb_reg(dm, R_0x1e24, BIT(11), 1);
+
+		if (su_bfee_cnt > 0 || mu_bfee_cnt > 0) {
+			/*@enable BB TxBF ant mapping register*/
+			odm_set_bb_reg(dm, R_0x1e24, BIT(28) | BIT29, 0x2);
+			odm_set_bb_reg(dm, R_0x1e24, BIT(30), 1);
+
+			/* logic mapping */
+			/* TX BF logic map and TX path en for Nsts = 1~2 */
+			odm_set_bb_reg(dm, R_0x820, 0xffff0000, 0x33);
+			odm_set_bb_reg(dm, R_0x1e30, 0xffff, 0x404);
+		} else {
+			/*@Disable BB TxBF ant mapping register*/
+			odm_set_bb_reg(dm, R_0x1e24, BIT(28) | BIT29, 0x0);
+			odm_set_bb_reg(dm, R_0x1e24, BIT(31), 0);
+			/*@1SS~2ss A, AB*/
+			odm_set_bb_reg(dm, R_0x820, 0xff, 0x31);
+			odm_set_bb_reg(dm, R_0x1e2c, 0xffff, 0x400);
+		}
+	}
+#endif
+#if (RTL8814B_SUPPORT)
+	if (dm->support_ic_type == ODM_RTL8814B) {
+		if (su_bfee_cnt > 0 || mu_bfee_cnt > 0) {
+			for (i = RF_PATH_A; i <= RF_PATH_D; i++) {
+				/*RF mode table write enable*/
+				odm_set_rf_reg(dm, (enum rf_path)i, RF_0xef,
+					       BIT(19), 0x1);
+				/*Select RX mode*/
+				odm_set_rf_reg(dm, (enum rf_path)i, RF_0x33,
+					       0xF, 2);
+				/*Set Table data*/
+				odm_set_rf_reg(dm, (enum rf_path)i, RF_0x3e,
+					       0xfffff, 0x3fc);
+				/*Set Table data*/
+				odm_set_rf_reg(dm, (enum rf_path)i, RF_0x3f,
+					       0xfffff, 0x280f7);
+				/*Select RX mode*/
+				odm_set_rf_reg(dm, (enum rf_path)i, RF_0x33,
+					       0xF, 3);
+				/*Set Table data*/
+				odm_set_rf_reg(dm, (enum rf_path)i, RF_0x3e,
+					       0xfffff, 0x365);
+				/*Set Table data*/
+				odm_set_rf_reg(dm, (enum rf_path)i, RF_0x3f,
+					       0xfffff, 0xafcf7);
+				/*RF mode table write disable*/
+				odm_set_rf_reg(dm, (enum rf_path)i, RF_0xef,
+					       BIT(19), 0x0);
+			}
+		}
+		/*@if Nsts > Nc, don't apply V matrix*/
+		odm_set_bb_reg(dm, R_0x1e24, BIT(11), 1);
+
+		if (su_bfee_cnt > 0 || mu_bfee_cnt > 0) {
+			/*@enable BB TxBF ant mapping register*/
+			odm_set_bb_reg(dm, R_0x1e24, BIT(28) | BIT29, 0x2);
+			odm_set_bb_reg(dm, R_0x1e24, BIT(30), 1);
+
+			/* logic mapping */
+			/* TX BF logic map and TX path en for Nsts = 1~4 */
+			odm_set_bb_reg(dm, R_0x820, 0xffff0000, 0xff55);
+			/*verification path-AC*/
+			odm_set_bb_reg(dm, R_0x1e30, 0xffffffff, 0xe4e41010);
+		} else {
+			/*@Disable BB TxBF ant mapping register*/
+			odm_set_bb_reg(dm, R_0x1e24, BIT(28) | BIT29, 0x0);
+			odm_set_bb_reg(dm, R_0x1e24, BIT(31), 0);
+			/*@1SS~4ss A, AB, ABC, ABCD*/
+			odm_set_bb_reg(dm, R_0x820, 0xffff, 0xf731);
+			odm_set_bb_reg(dm, R_0x1e2c, 0xffffffff, 0xe4240400);
+		}
+	}
+#endif
+#if (RTL8198F_SUPPORT)
+	if (dm->support_ic_type == ODM_RTL8198F) {
+		if (su_bfee_cnt > 0 || mu_bfee_cnt > 0) {
+			for (i = RF_PATH_A; i <= RF_PATH_D; i++) {
+				/*RF mode table write enable*/
+				odm_set_rf_reg(dm, (enum rf_path)i, RF_0xef,
+					       BIT(19), 0x1);
+				/*Select RX mode*/
+				odm_set_rf_reg(dm, (enum rf_path)i, RF_0x30,
+					       0xfffff, 0x18000);
+				/*Set Table data*/
+				odm_set_rf_reg(dm, (enum rf_path)i, RF_0x31,
+					       0xfffff, 0x4f);
+				/*Select RX mode*/
+				odm_set_rf_reg(dm, (enum rf_path)i, RF_0x32,
+					       0xfffff, 0x71fc0);
+				/*RF mode table write disable*/
+				odm_set_rf_reg(dm, (enum rf_path)i, RF_0xef,
+					       BIT(19), 0x0);
+			}
+		}
+		/*@if Nsts > Nc, don't apply V matrix*/
+		odm_set_bb_reg(dm, R_0x1e24, BIT(11), 1);
+
+		if (su_bfee_cnt > 0 || mu_bfee_cnt > 0) {
+			/*@enable BB TxBF ant mapping register*/
+			odm_set_bb_reg(dm, R_0x1e24, BIT(28) | BIT29, 0x2);
+			odm_set_bb_reg(dm, R_0x1e24, BIT(30), 1);
+
+			/* logic mapping */
+			/* TX BF logic map and TX path en for Nsts = 1~4 */
+			odm_set_bb_reg(dm, R_0x820, 0xffff0000, 0xffff);
+			odm_set_bb_reg(dm, R_0x1e30, 0xffffffff, 0xe4e4e4e4);
+		} else {
+			/*@Disable BB TxBF ant mapping register*/
+			odm_set_bb_reg(dm, R_0x1e24, BIT(28) | BIT29, 0x0);
+			odm_set_bb_reg(dm, R_0x1e24, BIT(31), 0);
+			/*@1SS~4ss A, AB, ABC, ABCD*/
+			odm_set_bb_reg(dm, R_0x820, 0xffff, 0xf731);
+			odm_set_bb_reg(dm, R_0x1e2c, 0xffffffff, 0xe4240400);
+		}
+	}
+#endif
+}
+
+void phydm_txbf_avoid_hang(void *dm_void)
+{
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
 
+	/* avoid CCK CCA hang when the BF mode */
+	odm_set_bb_reg(dm, R_0x1e6c, 0x100000, 0x1);
+}
+
+#if (RTL8814B_SUPPORT == 1)
+void phydm_txbf_80p80_rfmode(void *dm_void, u8 su_bfee_cnt, u8 mu_bfee_cnt)
+{
+	struct dm_struct *dm = (struct dm_struct *)dm_void;
+	u8 i;
+
+	if (dm->rf_type == RF_1T1R)
+		return;
+
+	if (su_bfee_cnt > 0 || mu_bfee_cnt > 0) {
+		for (i = RF_PATH_A; i <= RF_PATH_D; i += 3) {
+			/*RF mode table write enable*/
+			odm_set_rf_reg(dm, (enum rf_path)i, RF_0xef, BIT(19),
+				       0x1);
+			/*Select RX mode*/
+			odm_set_rf_reg(dm, (enum rf_path)i, RF_0x33, 0xF, 2);
+			/*Set Table data*/
+			odm_set_rf_reg(dm, (enum rf_path)i, RF_0x3e, 0xfffff,
+				       0x3fc);
+			/*Set Table data*/
+			odm_set_rf_reg(dm, (enum rf_path)i, RF_0x3f, 0xfffff,
+				       0x280f7);
+			/*Select RX mode*/
+			odm_set_rf_reg(dm, (enum rf_path)i, RF_0x33, 0xF, 3);
+			/*Set Table data*/
+			odm_set_rf_reg(dm, (enum rf_path)i, RF_0x3e, 0xfffff,
+				       0x365);
+			/*Set Table data*/
+			odm_set_rf_reg(dm, (enum rf_path)i, RF_0x3f, 0xfffff,
+				       0xafcf7);
+			/*RF mode table write disable*/
+			odm_set_rf_reg(dm, (enum rf_path)i, RF_0xef, BIT(19),
+				       0x0);
+		}
+		for (i = RF_PATH_B; i <= RF_PATH_C; i++) {
+			/*RF mode table write enable*/
+			odm_set_rf_reg(dm, (enum rf_path)i, RF_0xef, BIT(19),
+				       0x1);
+			/*Select RX mode*/
+			odm_set_rf_reg(dm, (enum rf_path)i, RF_0x33, 0xF, 2);
+			/*Set Table data*/
+			odm_set_rf_reg(dm, (enum rf_path)i, RF_0x3f, 0xfffff,
+				       0x280c7);
+			/*Set Table data*/
+			odm_set_rf_reg(dm, (enum rf_path)i, RF_0x3f, 0xfffff,
+				       0x280c7);
+			/*Select RX mode*/
+			odm_set_rf_reg(dm, (enum rf_path)i, RF_0x33, 0xF, 3);
+			/*Set Table data*/
+			odm_set_rf_reg(dm, (enum rf_path)i, RF_0x3e, 0xfffff,
+				       0x365);
+			/*Set Table data*/
+			odm_set_rf_reg(dm, (enum rf_path)i, RF_0x3f, 0xfffff,
+				       0xafcc7);
+			/*RF mode table write disable*/
+			odm_set_rf_reg(dm, (enum rf_path)i, RF_0xef, BIT(19),
+				       0x0);
+		}
+	}
+	/*@if Nsts > Nc, don't apply V matrix*/
+	odm_set_bb_reg(dm, R_0x1e24, BIT(11), 1);
+
+	if (su_bfee_cnt > 0 || mu_bfee_cnt > 0) {
+		/*@enable BB TxBF ant mapping register*/
+		odm_set_bb_reg(dm, R_0x1e24, BIT(28) | BIT29, 0x2);
+		odm_set_bb_reg(dm, R_0x1e24, BIT(30), 1);
+
+		/* logic mapping */
+		/* TX BF logic map and TX path en for Nsts = 1~2 */
+		odm_set_bb_reg(dm, R_0x820, 0xff0000, 0x33); /*seg0*/
+		odm_set_bb_reg(dm, R_0x824, 0xff00, 0xcc); /*seg1*/
+		odm_set_bb_reg(dm, R_0x1e30, 0xffff, 0xe4e4);
+
+	} else {
+		/*@Disable BB TxBF ant mapping register*/
+		odm_set_bb_reg(dm, R_0x1e24, BIT(28) | BIT29, 0x0);
+		odm_set_bb_reg(dm, R_0x1e24, BIT(31), 0);
+		/*@1SS~2ss A, AB*/
+		odm_set_bb_reg(dm, R_0x820, 0xff, 0x31); /*seg0*/
+		odm_set_bb_reg(dm, R_0x824, 0xff, 0xc8); /*seg1*/
+		odm_set_bb_reg(dm, R_0x1e2c, 0xffff, 0xe420);
+	}
+}
 #endif
+#endif /*PHYSTS_3RD_TYPE_IC*/
+#endif /*CONFIG_BB_TXBF_API*/
diff --git a/rtl8723DS/hal/phydm/txbf/phydm_hal_txbf_api.h b/rtl8723DS/hal/phydm/txbf/phydm_hal_txbf_api.h
index 96809e8..7755bca 100755..100644
--- a/rtl8723DS/hal/phydm/txbf/phydm_hal_txbf_api.h
+++ b/rtl8723DS/hal/phydm/txbf/phydm_hal_txbf_api.h
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2011 - 2017 Realtek Corporation.
+ * Copyright(c) 2007 - 2017  Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -8,58 +8,67 @@
  *
  * This program is distributed in the hope that it will be useful, but WITHOUT
  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  * more details.
  *
+ * The full GNU General Public License is included in this distribution in the
+ * file called LICENSE.
+ *
+ * Contact Information:
+ * wlanfae <wlanfae@realtek.com>
+ * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
+ * Hsinchu 300, Taiwan.
+ *
+ * Larry Finger <Larry.Finger@lwfinger.net>
+ *
  *****************************************************************************/
-#ifndef	__PHYDM_HAL_TXBF_API_H__
+#ifndef __PHYDM_HAL_TXBF_API_H__
 #define __PHYDM_HAL_TXBF_API_H__
 
 #if (defined(CONFIG_BB_TXBF_API))
 
 #if (DM_ODM_SUPPORT_TYPE != ODM_AP)
+#if defined(DM_ODM_CE_MAC80211)
+#define tx_bf_nr(a, b) ({	\
+	u8 __tx_bf_nr_a = (a);	\
+	u8 __tx_bf_nr_b = (b);	\
+	((__tx_bf_nr_a > __tx_bf_nr_b) ? (__tx_bf_nr_b) : (__tx_bf_nr_a)); })
+#else
 #define tx_bf_nr(a, b) ((a > b) ? (b) : (a))
+#endif
 
-u8
-beamforming_get_htndp_tx_rate(
-	void	*p_dm_void,
-	u8	comp_steering_num_of_bfer
-);
+u8 beamforming_get_htndp_tx_rate(void *dm_void, u8 bfer_str_num);
 
-u8
-beamforming_get_vht_ndp_tx_rate(
-	void	*p_dm_void,
-	u8	comp_steering_num_of_bfer
-);
+u8 beamforming_get_vht_ndp_tx_rate(void *dm_void, u8 bfer_str_num);
 
 #endif
 
-#if (RTL8822B_SUPPORT == 1)
-u8
-phydm_get_beamforming_sounding_info(
-	void		*p_dm_void,
-	u16	*troughput,
-	u8	total_bfee_num,
-	u8	*tx_rate
-);
+#if (RTL8822B_SUPPORT == 1 || RTL8822C_SUPPORT == 1 || RTL8192F_SUPPORT == 1 ||\
+	RTL8814B_SUPPORT == 1 || RTL8198F_SUPPORT == 1)
+u8 phydm_get_beamforming_sounding_info(void *dm_void, u16 *throughput,
+				       u8 total_bfee_num, u8 *tx_rate);
 
-u8
-phydm_get_ndpa_rate(
-	void		*p_dm_void
-);
+u8 phydm_get_ndpa_rate(void *dm_void);
 
-u8
-phydm_get_mu_bfee_snding_decision(
-	void		*p_dm_void,
-	u16	throughput
-);
+u8 phydm_get_mu_bfee_snding_decision(void *dm_void, u16 throughput);
 
 #else
-#define phydm_get_beamforming_sounding_info(p_dm_void, troughput, total_bfee_num, tx_rate)
-#define phydm_get_ndpa_rate(p_dm_void)
-#define phydm_get_mu_bfee_snding_decision(p_dm_void, troughput)
+#define phydm_get_beamforming_sounding_info(dm, tp, bfee_num, rate) 0
+#define phydm_get_ndpa_rate(dm)
+#define phydm_get_mu_bfee_snding_decision(dm, tp)
 
 #endif
+#ifdef PHYSTS_3RD_TYPE_IC
+/*this function is only used for BFer*/
+void phydm_txbf_rfmode(void *dm_void, u8 su_bfee_cnt, u8 mu_bfee_cnt);
+
+void phydm_txbf_avoid_hang(void *dm_void);
+
+#if (RTL8814B_SUPPORT == 1)
+void phydm_txbf_80p80_rfmode(void *dm_void, u8 su_bfee_cnt, u8 mu_bfee_cnt);
+#endif
+
+#endif /*PHYSTS_3RD_TYPE_IC*/
 
 #endif
 #endif
diff --git a/rtl8723DS/hal/rtl8723d/Hal8723DPwrSeq.c b/rtl8723DS/hal/rtl8723d/Hal8723DPwrSeq.c
index 8e99a0b..8e99a0b 100755..100644
--- a/rtl8723DS/hal/rtl8723d/Hal8723DPwrSeq.c
+++ b/rtl8723DS/hal/rtl8723d/Hal8723DPwrSeq.c
diff --git a/rtl8723DS/hal/rtl8723d/hal8723d_fw.c b/rtl8723DS/hal/rtl8723d/hal8723d_fw.c
index 73f4e1b..0c483ce 100755..100644
--- a/rtl8723DS/hal/rtl8723d/hal8723d_fw.c
+++ b/rtl8723DS/hal/rtl8723d/hal8723d_fw.c
@@ -22,21 +22,21 @@
 #if (defined(CONFIG_AP_WOWLAN) || (DM_ODM_SUPPORT_TYPE & (ODM_AP)))
 
 u8 array_mp_8723d_fw_ap[] = {
-0xD1, 0x23, 0x20, 0x00, 0x29, 0x00, 0x00, 0x00,
-0x01, 0x04, 0x08, 0x57, 0x2C, 0x5E, 0x02, 0x00,
-0x6F, 0x5F, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+0xD1, 0x23, 0x20, 0x00, 0x2F, 0x00, 0x00, 0x00,
+0x12, 0x10, 0x17, 0x09, 0xBC, 0x60, 0x02, 0x00,
+0xBE, 0x76, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 0x00, 0x00, 0x00, 0x00, 0x02, 0x85, 0xA9, 0x00,
 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-0x00, 0x00, 0x00, 0x02, 0xAA, 0xA6, 0x00, 0x00,
+0x00, 0x00, 0x00, 0x02, 0xB8, 0xE8, 0x00, 0x00,
 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-0x00, 0x00, 0x00, 0x02, 0xCF, 0x0F, 0x00, 0x00,
+0x00, 0x00, 0x00, 0x02, 0xC9, 0x8F, 0x00, 0x00,
 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-0x00, 0x00, 0x00, 0x02, 0xC8, 0xB1, 0x00, 0x00,
-0x00, 0x00, 0x00, 0x02, 0xC9, 0x45, 0x00, 0x00,
-0x00, 0x00, 0x00, 0x02, 0xCE, 0xB9, 0x00, 0x00,
+0x00, 0x00, 0x00, 0x02, 0xC8, 0xE1, 0x00, 0x00,
+0x00, 0x00, 0x00, 0x02, 0xBD, 0xB9, 0x00, 0x00,
+0x00, 0x00, 0x00, 0x02, 0xC9, 0x39, 0x00, 0x00,
 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
@@ -238,1793 +238,1924 @@ u8 array_mp_8723d_fw_ap[] = {
 0x74, 0x01, 0x93, 0x70, 0x0D, 0xA3, 0xA3, 0x93,
 0xF8, 0x74, 0x01, 0x93, 0xF5, 0x82, 0x88, 0x83,
 0xE4, 0x73, 0x74, 0x02, 0x93, 0x68, 0x60, 0xEF,
-0xA3, 0xA3, 0xA3, 0x80, 0xDF, 0x41, 0x96, 0xD7,
-0x00, 0x41, 0x96, 0xDC, 0x00, 0x44, 0x96, 0xA2,
-0x41, 0x4E, 0x59, 0x00, 0x44, 0x96, 0x9E, 0x61,
-0x6E, 0x79, 0x00, 0x41, 0x96, 0xDF, 0x00, 0x00,
-0xBB, 0xCF, 0xC2, 0xB6, 0xAD, 0x55, 0x90, 0x96,
-0xD6, 0xEF, 0xF0, 0x7F, 0x02, 0xB1, 0x27, 0x90,
-0x86, 0xAF, 0xE0, 0xFF, 0x90, 0x96, 0xD6, 0xE0,
+0xA3, 0xA3, 0xA3, 0x80, 0xDF, 0x41, 0x97, 0x06,
+0x00, 0x41, 0x97, 0x0B, 0x00, 0x44, 0x96, 0xC7,
+0x41, 0x4E, 0x59, 0x00, 0x44, 0x96, 0xC3, 0x61,
+0x6E, 0x79, 0x00, 0x41, 0x97, 0x0E, 0x00, 0x00,
+0xA7, 0x60, 0xC4, 0x9F, 0x8F, 0x15, 0x90, 0x97,
+0x05, 0xEF, 0xF0, 0x7F, 0x02, 0xB1, 0x27, 0x90,
+0x86, 0xAF, 0xE0, 0xFF, 0x90, 0x97, 0x05, 0xE0,
 0xFE, 0xEF, 0x4E, 0x90, 0x86, 0xAF, 0xF0, 0x22,
 0x90, 0x02, 0x09, 0xE0, 0xFD, 0x12, 0x02, 0x06,
 0xFE, 0xAF, 0x05, 0xED, 0x2E, 0x90, 0x86, 0xB4,
-0xF1, 0xE6, 0xFF, 0xED, 0x2F, 0x90, 0x86, 0xB5,
-0xF1, 0x26, 0xFF, 0xED, 0x2F, 0x90, 0x86, 0xB6,
-0xF1, 0xF0, 0xFF, 0xED, 0x2F, 0x90, 0x86, 0xB7,
-0xF1, 0xFA, 0xFF, 0xED, 0x2F, 0x90, 0x86, 0xB8,
-0xF1, 0x2E, 0xFF, 0xED, 0x2F, 0x90, 0x86, 0xB9,
-0x12, 0xB9, 0x1A, 0xFF, 0xAE, 0x05, 0xED, 0x2F,
-0x90, 0x86, 0xBA, 0xF0, 0x22, 0x4F, 0xF0, 0x90,
-0x00, 0x02, 0x02, 0x02, 0x1F, 0xFF, 0xF0, 0x90,
-0x00, 0x05, 0x02, 0x02, 0x1F, 0x12, 0x88, 0xCD,
-0x12, 0x02, 0x06, 0xFF, 0x54, 0x7F, 0x90, 0x88,
-0x36, 0xF0, 0xEF, 0x12, 0x9D, 0xD0, 0xA3, 0xF1,
-0xE6, 0xFD, 0x54, 0xF0, 0xC4, 0x54, 0x0F, 0xFF,
-0x90, 0x88, 0x34, 0xE0, 0x54, 0xF0, 0x4F, 0xF1,
-0xF0, 0xFC, 0x54, 0x01, 0x25, 0xE0, 0xFF, 0x90,
-0x88, 0x31, 0xE0, 0x54, 0xFD, 0x4F, 0xF0, 0xEC,
-0x54, 0x04, 0xC3, 0x13, 0xFF, 0x90, 0x88, 0x33,
-0xE0, 0x54, 0xFD, 0x4F, 0xF0, 0xED, 0x54, 0x0F,
-0xC4, 0x54, 0xF0, 0xFF, 0xA3, 0xE0, 0x54, 0x0F,
-0xF1, 0x25, 0x90, 0x88, 0x35, 0xF1, 0xFA, 0xFD,
-0x90, 0x8A, 0x89, 0x12, 0x8D, 0x28, 0x7F, 0x02,
-0x12, 0x04, 0x7E, 0x12, 0x88, 0xD3, 0xF1, 0x2F,
-0xFF, 0x54, 0x01, 0xFE, 0x90, 0x88, 0x9B, 0x12,
-0xDD, 0x8E, 0xF1, 0x2D, 0xFE, 0x12, 0xDD, 0xDE,
-0x90, 0x88, 0x9B, 0x12, 0xDD, 0xC0, 0x54, 0xEF,
-0xF1, 0x2D, 0xFE, 0x12, 0xDD, 0xD5, 0x90, 0x88,
-0x9B, 0xF0, 0xEE, 0x54, 0x40, 0xFE, 0xEF, 0x54,
-0xBF, 0x4E, 0xF0, 0x12, 0x5C, 0x5F, 0x90, 0x88,
-0x36, 0xE0, 0xB4, 0x01, 0x07, 0x90, 0x88, 0x33,
-0xE0, 0x54, 0xFB, 0xF0, 0x12, 0xCB, 0xAC, 0xF0,
-0x90, 0x88, 0x36, 0x12, 0xDD, 0xAB, 0x12, 0xAF,
-0x57, 0x90, 0x01, 0xBE, 0xF0, 0x22, 0xF0, 0x90,
-0x00, 0x01, 0x02, 0x02, 0x1F, 0xF5, 0x83, 0xEF,
-0xF0, 0x90, 0x00, 0x03, 0x02, 0x02, 0x1F, 0xF5,
-0x83, 0xEF, 0xF0, 0x90, 0x00, 0x04, 0x02, 0x02,
-0x1F, 0x90, 0x94, 0xB6, 0x12, 0x86, 0x76, 0x90,
-0x93, 0x4C, 0xE0, 0x70, 0x12, 0x11, 0xD3, 0x12,
-0x02, 0x06, 0x13, 0x13, 0x54, 0x3F, 0x30, 0xE0,
-0x06, 0x90, 0x93, 0x52, 0x74, 0x01, 0xF0, 0x90,
-0x93, 0x4E, 0xE0, 0x70, 0x12, 0x11, 0xD3, 0x12,
-0x02, 0x06, 0xC4, 0x54, 0x0F, 0xFF, 0xBF, 0x05,
-0x06, 0x90, 0x93, 0x53, 0x74, 0x01, 0xF0, 0x11,
-0xD3, 0x12, 0x87, 0xE7, 0xFF, 0x90, 0x94, 0xBA,
-0xF0, 0x12, 0x02, 0x06, 0xC3, 0x13, 0x30, 0xE0,
-0x0B, 0x11, 0xD3, 0x12, 0x87, 0x27, 0x90, 0x94,
-0xBB, 0xF0, 0x80, 0x05, 0x90, 0x94, 0xBB, 0xEF,
-0xF0, 0x90, 0x94, 0xBA, 0xE0, 0x90, 0x94, 0xB9,
-0xF0, 0x90, 0x94, 0xBB, 0xE0, 0xFE, 0x90, 0x94,
-0xB9, 0xE0, 0xFF, 0xD3, 0x9E, 0x50, 0x3B, 0x11,
-0xD3, 0x12, 0x02, 0x06, 0x54, 0x01, 0xFD, 0x12,
-0x6E, 0x71, 0x90, 0x94, 0xB9, 0xE0, 0xFF, 0x12,
-0x78, 0x4A, 0xEF, 0x90, 0x94, 0xB9, 0x70, 0x07,
-0xE0, 0xFF, 0x12, 0xA4, 0x9C, 0x80, 0x05, 0xE0,
-0xFF, 0x12, 0xA7, 0xAC, 0x90, 0x93, 0x53, 0xE0,
-0x60, 0x08, 0x90, 0x94, 0xB9, 0xE0, 0xFF, 0x12,
-0xA4, 0x9C, 0x90, 0x94, 0xB9, 0xE0, 0x04, 0xF0,
-0x80, 0xB7, 0x90, 0x05, 0x5E, 0xE4, 0xF0, 0x90,
-0x94, 0xBA, 0xE0, 0x70, 0x17, 0xFF, 0x12, 0x78,
-0x4A, 0xEF, 0x70, 0x10, 0x71, 0x92, 0x90, 0x8A,
-0xED, 0x71, 0x95, 0x12, 0xDE, 0x09, 0x54, 0xBF,
-0xF0, 0x54, 0x7F, 0xF0, 0x22, 0x90, 0x94, 0xB6,
-0x12, 0x86, 0x76, 0x90, 0x94, 0xB6, 0x02, 0x86,
+0xF1, 0x86, 0xFF, 0xED, 0x2F, 0x90, 0x86, 0xB5,
+0xF1, 0x25, 0xFF, 0xED, 0x2F, 0x90, 0x86, 0xB6,
+0xF1, 0x75, 0xFF, 0xED, 0x2F, 0x90, 0x86, 0xB7,
+0xF1, 0x7F, 0xFF, 0xED, 0x2F, 0x90, 0x86, 0xB8,
+0xF1, 0xA6, 0xFF, 0xED, 0x2F, 0x90, 0x86, 0xB9,
+0xF1, 0x9F, 0xFF, 0xAE, 0x05, 0xED, 0x2F, 0x90,
+0x86, 0xBA, 0xF0, 0x22, 0x4F, 0xF0, 0x90, 0x00,
+0x02, 0x02, 0x02, 0x1F, 0x12, 0x02, 0x06, 0xFE,
+0xF1, 0x26, 0xFF, 0x74, 0xD6, 0x2E, 0xF5, 0x82,
+0xE4, 0x34, 0x8D, 0xF1, 0x72, 0xFF, 0xF1, 0x69,
+0xF1, 0x7C, 0xFF, 0x74, 0x15, 0x2E, 0xF1, 0xAD,
+0xEF, 0xF0, 0xF1, 0x69, 0xF5, 0x83, 0xE0, 0x30,
+0xE5, 0x16, 0x75, 0xF0, 0x12, 0xEE, 0xF1, 0xBA,
+0x13, 0x13, 0x54, 0x03, 0xFB, 0xAF, 0x06, 0x74,
+0xD6, 0x2E, 0xF1, 0xC6, 0xFD, 0x12, 0x6B, 0xFD,
+0x22, 0x74, 0xC6, 0x2E, 0xF5, 0x82, 0xE4, 0x34,
+0x8D, 0x22, 0xF5, 0x83, 0xEF, 0xF0, 0x90, 0x00,
+0x03, 0x02, 0x02, 0x1F, 0xF5, 0x83, 0xEF, 0xF0,
+0x90, 0x00, 0x04, 0x02, 0x02, 0x1F, 0xF0, 0x90,
+0x00, 0x01, 0x02, 0x02, 0x1F, 0x12, 0x02, 0x06,
+0x90, 0x93, 0x26, 0xF1, 0x86, 0x90, 0x93, 0x27,
+0xF1, 0x25, 0x90, 0x93, 0x28, 0xF0, 0x22, 0xF0,
+0x90, 0x00, 0x06, 0x02, 0x02, 0x1F, 0xF0, 0x90,
+0x00, 0x05, 0x02, 0x02, 0x1F, 0xF5, 0x82, 0xE4,
+0x34, 0x96, 0xF5, 0x83, 0x22, 0xFF, 0x75, 0xF0,
+0x12, 0xED, 0x90, 0x89, 0x52, 0x12, 0x04, 0x6E,
+0xE0, 0x22, 0x74, 0xD6, 0x25, 0x62, 0xF5, 0x82,
+0xE4, 0x34, 0x8D, 0xF5, 0x83, 0xE0, 0x22, 0x12,
+0x02, 0x06, 0xFF, 0xF1, 0x87, 0x90, 0x94, 0xBD,
+0xF1, 0x25, 0x90, 0x94, 0xBE, 0xF1, 0x75, 0x90,
+0x94, 0xBF, 0xF1, 0x7F, 0x90, 0x94, 0xC0, 0xF1,
+0xA6, 0x90, 0x94, 0xC1, 0xF1, 0x9F, 0x90, 0x94,
+0xC2, 0xF0, 0xEF, 0x24, 0xF9, 0x60, 0x40, 0x14,
+0x70, 0x03, 0x02, 0x88, 0x8C, 0x14, 0x70, 0x02,
+0x01, 0x8F, 0x24, 0xFD, 0x70, 0x02, 0x01, 0xCE,
+0x24, 0x06, 0x60, 0x02, 0x01, 0xDE, 0x90, 0x94,
+0xBD, 0xE0, 0x90, 0x88, 0xE1, 0xF0, 0x90, 0x94,
+0xBE, 0xE0, 0x90, 0x88, 0xE2, 0xF0, 0x90, 0x94,
+0xBF, 0xE0, 0x90, 0x88, 0xE3, 0xF0, 0x90, 0x94,
+0xC0, 0xE0, 0x90, 0x88, 0xE4, 0xF0, 0x90, 0x94,
+0xC1, 0xE0, 0x90, 0x88, 0xE5, 0xF0, 0x22, 0x90,
+0x94, 0xBD, 0xE0, 0x90, 0x94, 0xAE, 0xF0, 0x90,
+0x94, 0xC0, 0x31, 0x01, 0x78, 0x10, 0x12, 0x03,
+0xFE, 0xC0, 0x04, 0xC0, 0x05, 0xC0, 0x06, 0xC0,
+0x07, 0xA3, 0x31, 0x01, 0x78, 0x18, 0x12, 0x03,
+0xFE, 0xD0, 0x03, 0xD0, 0x02, 0xD0, 0x01, 0xD0,
+0x00, 0x12, 0x86, 0x54, 0xC0, 0x04, 0xC0, 0x05,
+0xC0, 0x06, 0xC0, 0x07, 0x90, 0x94, 0xBF, 0x31,
+0x01, 0x78, 0x08, 0x12, 0x03, 0xFE, 0xD0, 0x03,
+0xD0, 0x02, 0xD0, 0x01, 0xD0, 0x00, 0x12, 0x86,
+0x54, 0x11, 0xF6, 0x12, 0x86, 0x54, 0x90, 0x94,
+0xA4, 0x02, 0x04, 0x31, 0x02, 0x9F, 0x14, 0x90,
+0x94, 0xB0, 0xE0, 0x44, 0x01, 0xFF, 0xF0, 0x90,
+0x94, 0xBD, 0xE0, 0x54, 0x7F, 0x25, 0xE0, 0xFE,
+0xEF, 0x54, 0x01, 0x4E, 0x90, 0x94, 0xB0, 0xF0,
+0xE0, 0xFF, 0xC3, 0x13, 0x54, 0x7F, 0xC3, 0x94,
+0x1E, 0x50, 0x06, 0xEF, 0x54, 0x01, 0x44, 0x3C,
+0xF0, 0x90, 0x94, 0xB0, 0xE0, 0xFF, 0xC3, 0x13,
+0x54, 0x7F, 0xD3, 0x94, 0x50, 0x40, 0x2E, 0xEF,
+0x54, 0x01, 0x44, 0xA0, 0xF0, 0x22, 0x90, 0x94,
+0xBD, 0xE0, 0x54, 0x01, 0xFF, 0x90, 0x94, 0xB7,
+0xE0, 0x54, 0xFE, 0x4F, 0xF0, 0x22, 0x7E, 0x01,
+0x7F, 0xFF, 0xAD, 0x06, 0x12, 0xA0, 0xCC, 0x90,
+0x8A, 0xCF, 0xE0, 0xF8, 0xA3, 0xE0, 0xF5, 0x82,
+0x88, 0x83, 0x12, 0x04, 0x7E, 0x22, 0xA8, 0x04,
+0xA9, 0x05, 0xAA, 0x06, 0xAB, 0x07, 0x90, 0x94,
+0xBE, 0xE0, 0xFF, 0xE4, 0xFC, 0xFD, 0xFE, 0x22,
+0x90, 0x94, 0xB9, 0xE0, 0x04, 0xF0, 0x90, 0x8A,
+0xD9, 0x51, 0x5F, 0x7F, 0x01, 0x12, 0x04, 0x7E,
+0x90, 0x88, 0xA1, 0xB1, 0x34, 0x30, 0xE0, 0x04,
+0x7F, 0x03, 0x80, 0x02, 0x7F, 0x01, 0x12, 0x71,
+0x9A, 0xE4, 0x90, 0x88, 0xAF, 0xF0, 0xA3, 0xF1,
+0xF8, 0x30, 0xE0, 0x09, 0x90, 0x8A, 0xF9, 0x51,
+0x5F, 0x7D, 0x0E, 0x80, 0x2B, 0xF1, 0xE4, 0x30,
+0xE0, 0x14, 0x12, 0xE0, 0x99, 0x20, 0xE0, 0x05,
+0x12, 0xA7, 0x27, 0xF1, 0xDD, 0x90, 0x8A, 0xF9,
+0x51, 0x5F, 0x7D, 0x0F, 0x80, 0x12, 0x90, 0x88,
+0x36, 0xE0, 0x60, 0x11, 0x12, 0xA7, 0x27, 0xF1,
+0xDD, 0x90, 0x8A, 0xF9, 0x51, 0x5F, 0x7D, 0x10,
+0x7F, 0x6F, 0x12, 0x04, 0x7E, 0x90, 0x88, 0xA0,
+0xE0, 0x30, 0xE0, 0x08, 0x90, 0x8A, 0xF9, 0x51,
+0x5F, 0x12, 0x97, 0xF1, 0x90, 0x88, 0xA0, 0xB1,
+0x34, 0x30, 0xE0, 0x0A, 0x90, 0x8A, 0x97, 0x51,
+0x5F, 0xE4, 0xFF, 0x12, 0x04, 0x7E, 0x90, 0x88,
+0xA1, 0xE0, 0xFF, 0xC3, 0x13, 0x30, 0xE0, 0x0E,
+0x90, 0x06, 0xCD, 0xE0, 0x54, 0xEF, 0xF0, 0x90,
+0x06, 0xCF, 0xE0, 0x54, 0xEF, 0xF0, 0x12, 0xDB,
+0xDC, 0x30, 0xE0, 0x1C, 0xEF, 0x13, 0x13, 0x54,
+0x3F, 0x30, 0xE0, 0x14, 0xEE, 0x44, 0x08, 0xF0,
+0xA3, 0xE0, 0xC3, 0x13, 0x54, 0x7F, 0xFF, 0x90,
+0x8A, 0xD1, 0x12, 0xA5, 0xDE, 0x12, 0x04, 0x7E,
+0x90, 0x05, 0x63, 0xE0, 0x90, 0x96, 0xDB, 0xF0,
+0x90, 0x05, 0x62, 0xE0, 0x90, 0x96, 0xDA, 0xF0,
+0x90, 0x05, 0x61, 0xE0, 0x90, 0x96, 0xD9, 0xF0,
+0x90, 0x05, 0x60, 0xE0, 0x90, 0x96, 0xD8, 0xF0,
+0xA3, 0x31, 0x01, 0x12, 0xE0, 0x70, 0x90, 0x96,
+0xD8, 0x31, 0x01, 0x12, 0x86, 0x54, 0xC0, 0x04,
+0xC0, 0x05, 0xC0, 0x06, 0xC0, 0x07, 0x90, 0x96,
+0xDA, 0x31, 0x01, 0x78, 0x10, 0x12, 0x03, 0xFE,
+0xD0, 0x03, 0xD0, 0x02, 0xD0, 0x01, 0xD0, 0x00,
+0x12, 0x86, 0x54, 0xC0, 0x04, 0xC0, 0x05, 0xC0,
+0x06, 0xC0, 0x07, 0xA3, 0x31, 0x01, 0x78, 0x18,
+0x12, 0x03, 0xFE, 0xD0, 0x03, 0xD0, 0x02, 0xD0,
+0x01, 0xD0, 0x00, 0x12, 0x86, 0x54, 0x90, 0x94,
+0xB1, 0x12, 0x04, 0x31, 0x12, 0xDC, 0xB4, 0x90,
+0x96, 0xDC, 0xF0, 0x7B, 0x01, 0x7A, 0x96, 0x79,
+0xDC, 0x90, 0x8A, 0xCF, 0x51, 0x5F, 0x7D, 0x01,
+0x7F, 0x42, 0x02, 0x04, 0x7E, 0x90, 0x8A, 0x77,
+0xE0, 0xFE, 0xA3, 0xE0, 0xFF, 0xF5, 0x82, 0x8E,
+0x83, 0x12, 0x04, 0x7E, 0x90, 0x8A, 0x79, 0xE0,
+0xFE, 0xA3, 0xE0, 0xF5, 0x82, 0x8E, 0x83, 0x22,
+0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0x90,
+0x94, 0xBD, 0x74, 0x02, 0xF0, 0x90, 0x88, 0xC2,
+0xE0, 0x44, 0x10, 0xF0, 0x90, 0x88, 0xAF, 0xE0,
+0x60, 0x02, 0x61, 0xFA, 0x90, 0x8A, 0xD9, 0x51,
+0x5F, 0xE4, 0xFF, 0x12, 0x04, 0x7E, 0x90, 0x88,
+0xA1, 0xE0, 0x30, 0xE0, 0x04, 0x7F, 0x01, 0x80,
+0x36, 0x90, 0x88, 0x9D, 0xF1, 0xEF, 0x30, 0xE0,
+0x04, 0x7F, 0x0D, 0x80, 0x2A, 0x90, 0x88, 0xA0,
+0xE0, 0xFF, 0xC4, 0x54, 0x0F, 0x30, 0xE0, 0x10,
+0xEF, 0x13, 0x13, 0x54, 0x3F, 0x30, 0xE0, 0x04,
+0x7F, 0x09, 0x80, 0x13, 0x7F, 0x03, 0x80, 0x0F,
+0x90, 0x88, 0xA0, 0xE0, 0xC3, 0x13, 0x30, 0xE0,
+0x04, 0x7F, 0x03, 0x80, 0x02, 0x7F, 0x09, 0x12,
+0x71, 0x9A, 0x90, 0x88, 0xAF, 0x74, 0x01, 0xF1,
+0xF8, 0x30, 0xE0, 0x05, 0x12, 0xA4, 0x85, 0x80,
+0x3B, 0xF1, 0xE4, 0x30, 0xE0, 0x36, 0x90, 0x88,
+0xA3, 0xE0, 0x44, 0x20, 0xF0, 0x90, 0x88, 0x9C,
+0xE0, 0x60, 0x0B, 0x90, 0x8A, 0xB9, 0x51, 0x5F,
+0x7D, 0x01, 0x7F, 0x04, 0x80, 0x11, 0x12, 0xA4,
+0x85, 0xB1, 0x31, 0x90, 0x8A, 0xB9, 0x20, 0xE0,
+0x0B, 0x51, 0x5F, 0x7D, 0x01, 0x7F, 0x0C, 0x12,
+0x04, 0x7E, 0x80, 0x08, 0x51, 0x5F, 0x12, 0xAF,
+0x89, 0x12, 0xBC, 0x87, 0x90, 0x88, 0x9C, 0xE0,
+0x60, 0x06, 0x7B, 0x04, 0x7D, 0x6F, 0x80, 0x03,
+0xE4, 0xFB, 0xFD, 0x7F, 0xFF, 0x12, 0xA4, 0x8A,
+0x90, 0x88, 0xA0, 0xB1, 0x34, 0x30, 0xE0, 0x0A,
+0x90, 0x8A, 0x97, 0x51, 0x5F, 0x7F, 0x01, 0x12,
+0x04, 0x7E, 0x90, 0x88, 0xA1, 0xE0, 0xC3, 0x13,
+0x30, 0xE0, 0x0E, 0x90, 0x06, 0xCD, 0xE0, 0x44,
+0x10, 0xF0, 0x90, 0x06, 0xCF, 0xE0, 0x44, 0x10,
+0xF0, 0x90, 0x05, 0x63, 0xE0, 0x90, 0x94, 0xC1,
+0xF0, 0x90, 0x05, 0x62, 0xE0, 0x90, 0x94, 0xC0,
+0xF0, 0x90, 0x05, 0x61, 0xE0, 0x90, 0x94, 0xBF,
+0xF0, 0x90, 0x05, 0x60, 0xE0, 0x90, 0x94, 0xBE,
+0xF0, 0xA3, 0x31, 0x01, 0x78, 0x08, 0x12, 0x03,
+0xFE, 0x11, 0xF6, 0x12, 0x86, 0x54, 0xC0, 0x04,
+0xC0, 0x05, 0xC0, 0x06, 0xC0, 0x07, 0x90, 0x94,
+0xC0, 0x31, 0x01, 0x78, 0x10, 0x12, 0x03, 0xFE,
+0xD0, 0x03, 0xD0, 0x02, 0xD0, 0x01, 0xD0, 0x00,
+0x12, 0x86, 0x54, 0xC0, 0x04, 0xC0, 0x05, 0xC0,
+0x06, 0xC0, 0x07, 0xA3, 0x31, 0x01, 0x78, 0x18,
+0x12, 0x03, 0xFE, 0xD0, 0x03, 0xD0, 0x02, 0xD0,
+0x01, 0xD0, 0x00, 0x12, 0x86, 0x54, 0xA3, 0x12,
+0x04, 0x31, 0x90, 0x88, 0xA1, 0x12, 0xAD, 0x2E,
+0x30, 0xE0, 0x2F, 0x90, 0x94, 0xB1, 0x12, 0x04,
+0xB8, 0x90, 0x94, 0xC2, 0x12, 0xD7, 0x77, 0x40,
+0x21, 0x90, 0x94, 0xB1, 0x12, 0x86, 0x61, 0x90,
+0x94, 0xC2, 0x12, 0x04, 0xB8, 0x12, 0x86, 0x39,
+0xE4, 0xFB, 0x7A, 0x78, 0xF9, 0xF8, 0xC3, 0x12,
+0x03, 0xDA, 0x50, 0x06, 0x90, 0x94, 0xB6, 0xE0,
+0x04, 0xF0, 0xD0, 0xD0, 0x92, 0xAF, 0x22, 0x90,
+0x88, 0xB8, 0xE0, 0x30, 0xE0, 0x05, 0x90, 0x8A,
+0x8F, 0x80, 0x03, 0x90, 0x8A, 0x87, 0xD1, 0xAD,
+0x90, 0x88, 0xE6, 0xE0, 0x30, 0xE0, 0x04, 0xA3,
+0xE0, 0x04, 0xF0, 0x90, 0x88, 0xE7, 0xE0, 0x64,
+0x08, 0x70, 0x21, 0x90, 0x88, 0xE6, 0xE0, 0x30,
+0xE0, 0x15, 0x12, 0xC2, 0xF4, 0xF0, 0xE4, 0xFD,
+0x12, 0x76, 0xF7, 0x90, 0x88, 0xE6, 0xE0, 0x54,
+0xFE, 0xF0, 0xE4, 0xA3, 0xF0, 0x80, 0x05, 0xE4,
+0x90, 0x88, 0xE7, 0xF0, 0xF1, 0xEC, 0x30, 0xE0,
+0x13, 0x90, 0x88, 0xE8, 0xE0, 0x04, 0xF0, 0xE0,
+0xB4, 0x14, 0x09, 0x90, 0x04, 0x9C, 0xE4, 0xF0,
+0x90, 0x88, 0xE8, 0xF0, 0x90, 0x88, 0x36, 0xE0,
+0x70, 0x02, 0x81, 0xE9, 0x90, 0x88, 0x4D, 0xE0,
+0x04, 0xF0, 0x90, 0x05, 0x61, 0x31, 0x01, 0x12,
+0xE0, 0x70, 0x90, 0x05, 0x60, 0x31, 0x01, 0x12,
+0x86, 0x54, 0xC0, 0x04, 0xC0, 0x05, 0xC0, 0x06,
+0xC0, 0x07, 0x90, 0x05, 0x62, 0x31, 0x01, 0x78,
+0x10, 0x12, 0x03, 0xFE, 0xD0, 0x03, 0xD0, 0x02,
+0xD0, 0x01, 0xD0, 0x00, 0x12, 0x86, 0x54, 0xC0,
+0x04, 0xC0, 0x05, 0xC0, 0x06, 0xC0, 0x07, 0xA3,
+0x31, 0x01, 0x78, 0x18, 0x12, 0x03, 0xFE, 0xD0,
+0x03, 0xD0, 0x02, 0xD0, 0x01, 0xD0, 0x00, 0x12,
+0x86, 0x54, 0x90, 0x88, 0x81, 0x12, 0x04, 0x31,
+0x90, 0x88, 0x32, 0xE0, 0x54, 0x7F, 0xF0, 0xA3,
+0xE0, 0x30, 0xE0, 0x0F, 0x12, 0xAF, 0xA9, 0x90,
+0x92, 0x98, 0x74, 0x05, 0xF0, 0x12, 0x6E, 0x2F,
+0x12, 0xD7, 0x7E, 0x90, 0x88, 0x32, 0x12, 0xAE,
+0x23, 0x30, 0xE0, 0x0D, 0x90, 0x01, 0x3B, 0xE0,
+0x30, 0xE4, 0x06, 0x12, 0xAD, 0xB2, 0x12, 0xE0,
+0xAB, 0x12, 0xBB, 0x9F, 0xBF, 0x03, 0x14, 0x90,
+0x93, 0x4B, 0xE0, 0xB4, 0x01, 0x0D, 0x90, 0x01,
+0xB8, 0xE0, 0x04, 0xF0, 0x90, 0x05, 0x21, 0xE0,
+0x44, 0x80, 0xF0, 0x90, 0x8A, 0xE5, 0x51, 0x5F,
+0x7F, 0x01, 0x12, 0x04, 0x7E, 0x90, 0x93, 0x2A,
+0xE0, 0x30, 0xE0, 0x04, 0xF1, 0x8E, 0xF1, 0xC7,
+0x90, 0x86, 0xB3, 0xE0, 0xB4, 0x01, 0x11, 0x12,
+0xAD, 0x35, 0x20, 0xE0, 0x0B, 0xEF, 0xC4, 0x13,
+0x54, 0x07, 0x30, 0xE0, 0x03, 0x12, 0xE0, 0x0C,
+0x22, 0x90, 0x94, 0xAF, 0xE0, 0xC4, 0x13, 0x13,
+0x13, 0x54, 0x01, 0x22, 0xD3, 0x10, 0xAF, 0x01,
+0xC3, 0xC0, 0xD0, 0x7F, 0x8F, 0x12, 0x7B, 0x41,
+0xEF, 0x20, 0xE6, 0x02, 0xC1, 0x6B, 0x90, 0x00,
+0x8C, 0xE0, 0x90, 0x96, 0xF5, 0xF0, 0x7F, 0x8D,
+0x12, 0x7B, 0x41, 0x90, 0x96, 0xF6, 0xEF, 0xF0,
+0x90, 0x00, 0x8E, 0xE0, 0x90, 0x96, 0xF7, 0xF0,
+0x90, 0x96, 0xF6, 0xE0, 0x24, 0xFC, 0x60, 0x10,
+0x24, 0x03, 0x60, 0x02, 0xC1, 0x5B, 0x90, 0x96,
+0xF5, 0xE0, 0xFF, 0x12, 0xD5, 0x8E, 0xC1, 0x5B,
+0x90, 0x96, 0xF5, 0xE0, 0x24, 0xD6, 0x12, 0x87,
+0xC6, 0xFB, 0xE4, 0xFD, 0xFF, 0xD1, 0x9D, 0x75,
+0xF0, 0x12, 0x12, 0x87, 0xBA, 0x13, 0x13, 0x54,
+0x03, 0xFB, 0x0D, 0xE4, 0xFF, 0xD1, 0x9D, 0x75,
+0xF0, 0x12, 0x90, 0x89, 0x52, 0x12, 0x04, 0x6E,
+0xB1, 0x34, 0xFB, 0x0D, 0xE4, 0xFF, 0xD1, 0x9D,
+0x75, 0xF0, 0x12, 0x12, 0x87, 0xBA, 0xC4, 0x54,
+0x03, 0xFB, 0x0D, 0xE4, 0xFF, 0xD1, 0x9D, 0x75,
+0xF0, 0x12, 0x12, 0xCE, 0x70, 0xFB, 0xE4, 0xFD,
+0x0F, 0xD1, 0x9D, 0x12, 0xCE, 0x9F, 0xD1, 0x9A,
+0x75, 0xF0, 0x12, 0x12, 0xB6, 0x6C, 0xC4, 0x13,
+0x54, 0x01, 0xFB, 0x0D, 0x7F, 0x01, 0xD1, 0x9D,
+0x75, 0xF0, 0x12, 0x12, 0xB6, 0x6C, 0x54, 0x1F,
+0xD1, 0x9B, 0x12, 0xCC, 0xD1, 0xE0, 0xFB, 0xE4,
+0xFD, 0x0F, 0xD1, 0x9D, 0x75, 0xF0, 0x08, 0xA4,
+0x24, 0x01, 0xF5, 0x82, 0xE4, 0x34, 0x82, 0xD1,
+0x98, 0x75, 0xF0, 0x08, 0xA4, 0x24, 0x02, 0xF5,
+0x82, 0xE4, 0x34, 0x82, 0xD1, 0x98, 0x75, 0xF0,
+0x08, 0xA4, 0x24, 0x03, 0xF5, 0x82, 0xE4, 0x34,
+0x82, 0xD1, 0x98, 0x75, 0xF0, 0x08, 0xA4, 0x24,
+0x04, 0xF5, 0x82, 0xE4, 0x34, 0x82, 0xF5, 0x83,
+0xE0, 0xFB, 0xE4, 0xFD, 0x0F, 0xD1, 0x9D, 0x75,
+0xF0, 0x08, 0xA4, 0x24, 0x05, 0xF5, 0x82, 0xE4,
+0x34, 0x82, 0xD1, 0x98, 0x75, 0xF0, 0x08, 0xA4,
+0x24, 0x06, 0xF5, 0x82, 0xE4, 0x34, 0x82, 0xD1,
+0x98, 0x75, 0xF0, 0x08, 0xA4, 0x24, 0x07, 0xF5,
+0x82, 0xE4, 0x34, 0x82, 0xF5, 0x83, 0xE0, 0xFB,
+0x0D, 0xD1, 0x70, 0x7F, 0x8F, 0x12, 0x7B, 0x41,
+0xEF, 0x30, 0xE0, 0x07, 0xE4, 0xFD, 0x7F, 0x8D,
+0x12, 0x7B, 0x2E, 0xD0, 0xD0, 0x92, 0xAF, 0x22,
+0xEF, 0x70, 0x04, 0x74, 0xF0, 0x80, 0x16, 0xEF,
+0xB4, 0x01, 0x04, 0x74, 0xF4, 0x80, 0x0E, 0xEF,
+0xB4, 0x02, 0x04, 0x74, 0xF8, 0x80, 0x06, 0xEF,
+0xB4, 0x03, 0x0C, 0x74, 0xFC, 0x2D, 0xF5, 0x82,
+0xE4, 0x34, 0x02, 0xF5, 0x83, 0xEB, 0xF0, 0x22,
+0xF5, 0x83, 0xE0, 0xFB, 0x0D, 0xD1, 0x70, 0x90,
+0x96, 0xF5, 0xE0, 0x22, 0xE4, 0xFD, 0xFF, 0x12,
+0x04, 0x7E, 0x90, 0x86, 0x0C, 0xE0, 0xFE, 0xA3,
+0xE0, 0xAA, 0x06, 0xF9, 0x02, 0x04, 0x7A, 0x90,
+0x93, 0x2A, 0xE0, 0x30, 0xE0, 0x56, 0xC4, 0x54,
+0x0F, 0x20, 0xE0, 0x17, 0xF1, 0x8E, 0x90, 0x8A,
+0xF9, 0x51, 0x5F, 0xD1, 0xA4, 0xF1, 0xD6, 0x30,
+0xE0, 0x07, 0x90, 0x8A, 0x89, 0x51, 0x5F, 0xF1,
+0xCF, 0xE1, 0xC7, 0x90, 0x93, 0x2A, 0xE0, 0xC4,
+0x54, 0x0F, 0x30, 0xE0, 0x2F, 0xE4, 0x90, 0x92,
+0x20, 0xF0, 0x90, 0x93, 0x2D, 0xF1, 0x96, 0x90,
+0x93, 0x2A, 0xE0, 0x54, 0xEF, 0xF0, 0xE0, 0xC3,
+0x13, 0x30, 0xE0, 0x0C, 0x90, 0x8A, 0x89, 0x51,
+0x5F, 0x7D, 0x04, 0x7F, 0x01, 0x02, 0x04, 0x7E,
+0x90, 0x8A, 0xF9, 0x51, 0x5F, 0x7D, 0x31, 0x12,
+0xDB, 0x70, 0xD1, 0xAD, 0x22, 0xE4, 0xFB, 0xFA,
+0xFD, 0x7F, 0x01, 0x12, 0x85, 0x4E, 0x90, 0x95,
+0x3F, 0xEF, 0xF0, 0x60, 0xF0, 0x90, 0x86, 0xAF,
+0xE0, 0xFF, 0x70, 0x04, 0xA3, 0xE0, 0x60, 0xE5,
+0xC2, 0xAF, 0xEF, 0x30, 0xE0, 0x0F, 0x90, 0x86,
+0xAF, 0xE0, 0x54, 0xFE, 0xF0, 0xE4, 0xFF, 0x12,
+0xB9, 0xAD, 0x12, 0xCE, 0xE5, 0xF1, 0x86, 0xE0,
+0x30, 0xE1, 0x08, 0x54, 0xFD, 0xF0, 0x90, 0x86,
+0x08, 0xD1, 0xAD, 0xF1, 0x86, 0xE0, 0x30, 0xE2,
+0x08, 0x54, 0xFB, 0xF0, 0x90, 0x86, 0x0A, 0xD1,
+0xAD, 0xF1, 0x86, 0xE0, 0xFF, 0x30, 0xE5, 0x0C,
+0x54, 0xDF, 0xF0, 0x12, 0xC4, 0x32, 0xBF, 0x01,
+0x03, 0x12, 0x98, 0xC2, 0xF1, 0x86, 0xE0, 0x30,
+0xE6, 0x08, 0x54, 0xBF, 0xF0, 0x90, 0x8A, 0x7D,
+0xD1, 0xAD, 0xD2, 0xAF, 0x80, 0x9F, 0xD2, 0xAF,
+0xC2, 0xAF, 0x90, 0x86, 0xAF, 0x22, 0xE4, 0x90,
+0x92, 0x20, 0xF0, 0x90, 0x93, 0x2C, 0xE0, 0x90,
+0x92, 0x21, 0xF0, 0xE4, 0xFB, 0xFD, 0x7F, 0x54,
+0x7E, 0x01, 0x02, 0x66, 0x33, 0x90, 0x93, 0x2A,
+0xE0, 0x30, 0xE0, 0x1A, 0x90, 0x01, 0x57, 0xE4,
+0xF0, 0x90, 0x8A, 0xF9, 0x51, 0x5F, 0xD1, 0xA4,
+0xF1, 0xD6, 0x30, 0xE0, 0x07, 0x90, 0x8A, 0x89,
+0x51, 0x5F, 0xF1, 0xCF, 0xF1, 0xC7, 0x22, 0x90,
+0x93, 0x2A, 0xE0, 0x44, 0x10, 0xF0, 0x22, 0x7D,
+0x0C, 0x7F, 0x01, 0x02, 0x04, 0x7E, 0x90, 0x93,
+0x2A, 0xE0, 0xC3, 0x13, 0x22, 0x8C, 0x83, 0xE4,
+0xFD, 0x02, 0x04, 0x7E, 0x90, 0x88, 0x9D, 0xE0,
+0xC4, 0x54, 0x0F, 0x22, 0x90, 0x88, 0xA1, 0xE0,
+0xC4, 0x13, 0x13, 0x54, 0x03, 0x22, 0xA1, 0x3C,
+0xF0, 0x90, 0x88, 0x9D, 0xE0, 0xC4, 0x13, 0x54,
+0x07, 0x22, 0x90, 0x94, 0xBD, 0x12, 0x86, 0x76,
+0x90, 0x93, 0x4D, 0xE0, 0x70, 0x12, 0x11, 0xD3,
+0x12, 0x02, 0x06, 0x13, 0x13, 0x54, 0x3F, 0x30,
+0xE0, 0x06, 0x90, 0x93, 0x53, 0x74, 0x01, 0xF0,
+0x90, 0x93, 0x4F, 0xE0, 0x70, 0x12, 0x11, 0xD3,
+0x12, 0x02, 0x06, 0xC4, 0x54, 0x0F, 0xFF, 0xBF,
+0x05, 0x06, 0x90, 0x93, 0x54, 0x74, 0x01, 0xF0,
+0x11, 0xD3, 0x12, 0x87, 0x87, 0xFF, 0x90, 0x94,
+0xC1, 0xF0, 0x12, 0x02, 0x06, 0xC3, 0x13, 0x30,
+0xE0, 0x0B, 0x11, 0xD3, 0x12, 0x87, 0x26, 0x90,
+0x94, 0xC2, 0xF0, 0x80, 0x05, 0x90, 0x94, 0xC2,
+0xEF, 0xF0, 0x90, 0x94, 0xC1, 0xE0, 0x90, 0x94,
+0xC0, 0xF0, 0x90, 0x94, 0xC2, 0xE0, 0xFE, 0x90,
+0x94, 0xC0, 0xE0, 0xFF, 0xD3, 0x9E, 0x50, 0x38,
+0x11, 0xD3, 0x12, 0x02, 0x06, 0x54, 0x01, 0xFD,
+0x12, 0x6E, 0x71, 0x90, 0x94, 0xC0, 0xE0, 0xFF,
+0x12, 0x78, 0x4A, 0xEF, 0x90, 0x94, 0xC0, 0x70,
+0x06, 0xE0, 0xFF, 0x71, 0x8F, 0x80, 0x04, 0xE0,
+0xFF, 0xF1, 0xA8, 0x90, 0x93, 0x54, 0xE0, 0x60,
+0x07, 0x90, 0x94, 0xC0, 0xE0, 0xFF, 0x71, 0x8F,
+0x90, 0x94, 0xC0, 0xE0, 0x04, 0xF0, 0x80, 0xBA,
+0x90, 0x05, 0x5E, 0xE4, 0xF0, 0x90, 0x94, 0xC1,
+0xE0, 0x70, 0x19, 0xFF, 0x12, 0x78, 0x4A, 0xEF,
+0x70, 0x12, 0x12, 0x8E, 0xAA, 0x90, 0x8A, 0xED,
+0x12, 0x8E, 0xAD, 0x12, 0xE0, 0xB2, 0x54, 0xBF,
+0xF0, 0x54, 0x7F, 0xF0, 0x22, 0x90, 0x94, 0xBD,
+0x12, 0x86, 0x76, 0x90, 0x94, 0xBD, 0x02, 0x86,
 0x6D, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0,
 0x11, 0xCD, 0x12, 0x02, 0x06, 0xFF, 0x54, 0x01,
-0xFE, 0x90, 0x88, 0x9D, 0x12, 0xDD, 0x8E, 0xF0,
+0xFE, 0x90, 0x88, 0x9D, 0x12, 0xE0, 0x7E, 0xF0,
 0xFC, 0x12, 0x02, 0x06, 0xFD, 0x54, 0x04, 0x13,
-0x13, 0x54, 0x3F, 0xFF, 0x90, 0x94, 0xA2, 0xE0,
+0x13, 0x54, 0x3F, 0xFF, 0x90, 0x94, 0xA3, 0xE0,
 0x54, 0xFE, 0x4F, 0xF0, 0xED, 0x54, 0x08, 0xFF,
 0xEC, 0x54, 0xF7, 0x4F, 0xFF, 0x90, 0x88, 0x9D,
 0xF0, 0x12, 0x02, 0x06, 0xFE, 0x54, 0x10, 0xFD,
-0xEF, 0x54, 0xEF, 0x12, 0xDE, 0x21, 0x54, 0x20,
-0xFE, 0xEF, 0x54, 0xDF, 0x4E, 0x12, 0xAF, 0xCA,
-0x54, 0x40, 0xFD, 0xEF, 0x54, 0xBF, 0x12, 0xDE,
-0x21, 0x54, 0x80, 0xFE, 0xEF, 0x54, 0x7F, 0x4E,
-0xF0, 0x11, 0xD3, 0xE9, 0x24, 0x01, 0xF9, 0xE4,
-0x3A, 0x8B, 0x45, 0xF5, 0x46, 0x89, 0x47, 0x75,
-0x48, 0x04, 0x7B, 0x01, 0x7A, 0x88, 0x79, 0x9E,
-0x12, 0x69, 0xF5, 0x11, 0xD3, 0x12, 0x87, 0x27,
-0xFF, 0x54, 0x03, 0x90, 0x88, 0x9F, 0xF0, 0xEF,
-0x54, 0x04, 0x13, 0x13, 0x54, 0x01, 0x25, 0xE0,
-0x25, 0xE0, 0xFF, 0x90, 0x94, 0xAE, 0xE0, 0x54,
-0xFB, 0x4F, 0xFF, 0x12, 0x87, 0x26, 0xFE, 0x54,
-0x08, 0x13, 0x13, 0x13, 0x12, 0xB6, 0xF4, 0xFD,
-0xEF, 0x54, 0x7F, 0x4D, 0x90, 0x94, 0xAE, 0xF0,
-0x11, 0xD3, 0x12, 0x02, 0x06, 0x20, 0xE0, 0x02,
-0x41, 0xE6, 0x90, 0x05, 0x54, 0xE0, 0x90, 0x88,
-0xAE, 0xF0, 0xE0, 0xC3, 0x13, 0x90, 0x88, 0xAD,
-0xF0, 0x90, 0x88, 0xA0, 0xE0, 0xC4, 0x54, 0x0F,
-0x30, 0xE0, 0x10, 0x12, 0x87, 0xE7, 0x90, 0x88,
-0x9E, 0x12, 0xDE, 0x19, 0x90, 0x88, 0x9F, 0xEE,
-0xF0, 0x80, 0x26, 0x12, 0x87, 0xE7, 0xFF, 0xC3,
-0x94, 0x2A, 0x50, 0x15, 0xEF, 0xC3, 0x94, 0x03,
-0x50, 0x07, 0x90, 0x88, 0x9E, 0x74, 0x03, 0x80,
-0x0D, 0x12, 0x87, 0xE7, 0x90, 0x88, 0x9E, 0x80,
-0x05, 0x90, 0x88, 0x9E, 0x74, 0x2A, 0x12, 0xDE,
-0x19, 0x12, 0x9F, 0x83, 0x30, 0xE0, 0x3D, 0x90,
-0x88, 0x9E, 0xE0, 0x75, 0xF0, 0x03, 0x84, 0x90,
-0x88, 0xA6, 0xF0, 0xE0, 0xC3, 0x13, 0xA3, 0xF0,
-0x90, 0x88, 0x9F, 0xE0, 0x75, 0xF0, 0x03, 0x84,
-0x90, 0x88, 0xA8, 0xF0, 0x90, 0x88, 0x9E, 0xE0,
-0xC3, 0x13, 0x90, 0x88, 0xA9, 0xF0, 0x90, 0x88,
-0x9F, 0xE0, 0xC3, 0x13, 0x90, 0x88, 0xAA, 0xF0,
-0x90, 0x01, 0x3E, 0x74, 0x08, 0xF0, 0xFD, 0x7F,
-0x02, 0x12, 0x7C, 0x05, 0xE4, 0x90, 0x88, 0xDD,
-0xF0, 0x12, 0xDD, 0xB8, 0x30, 0xE0, 0x18, 0x12,
-0xDD, 0xF0, 0x30, 0xE0, 0x0C, 0x90, 0x8A, 0x89,
-0xB1, 0x28, 0x7D, 0x04, 0x7F, 0x02, 0x12, 0x04,
-0x7E, 0x12, 0xDE, 0x11, 0x74, 0x11, 0xF0, 0x90,
-0x94, 0xA2, 0xE0, 0x30, 0xE0, 0x33, 0x90, 0x94,
-0xAB, 0x74, 0x01, 0xF0, 0xE4, 0xA3, 0xF0, 0x90,
-0x06, 0xC7, 0xE0, 0xFE, 0x90, 0x06, 0xC6, 0x12,
-0x92, 0x3A, 0xFE, 0xE4, 0xFD, 0x78, 0x10, 0x12,
-0xDD, 0x9F, 0x90, 0x06, 0xC5, 0xE0, 0xFE, 0x90,
-0x06, 0xC4, 0x12, 0x92, 0x3A, 0xFE, 0xE4, 0xFD,
-0x12, 0x86, 0x54, 0x90, 0x94, 0xA7, 0x12, 0x04,
-0x31, 0x90, 0x94, 0xAE, 0xE0, 0x13, 0x13, 0x54,
-0x3F, 0x30, 0xE0, 0x13, 0xA3, 0xE0, 0x20, 0xE0,
-0x07, 0x54, 0x01, 0x44, 0x64, 0xF0, 0x80, 0x07,
-0x90, 0x94, 0xAF, 0xE0, 0x54, 0xFE, 0xF0, 0x90,
-0x05, 0x58, 0x74, 0x02, 0xF0, 0x90, 0x88, 0xA5,
-0xE0, 0xB4, 0x01, 0x08, 0x90, 0x88, 0xB0, 0x74,
-0x01, 0xF0, 0x80, 0x2B, 0x90, 0x88, 0xA5, 0xE0,
-0xB4, 0x04, 0x08, 0x90, 0x88, 0xB0, 0x74, 0x04,
-0xF0, 0x80, 0x1C, 0x90, 0x88, 0xA5, 0xE0, 0xB4,
-0x06, 0x08, 0x90, 0x88, 0xB0, 0x74, 0x02, 0xF0,
-0x80, 0x0D, 0x90, 0x88, 0xA5, 0xE0, 0xB4, 0x07,
-0x06, 0x90, 0x88, 0xB0, 0x74, 0x05, 0xF0, 0xE4,
-0x90, 0x88, 0xA5, 0xF0, 0x80, 0x3C, 0x90, 0x8A,
-0xF1, 0x71, 0x95, 0x90, 0x89, 0x04, 0xE0, 0x90,
-0x00, 0x40, 0x30, 0xE0, 0x08, 0xE0, 0x54, 0x0F,
-0x44, 0xA0, 0xF0, 0x80, 0x06, 0xE0, 0x54, 0x0F,
-0x44, 0x20, 0xF0, 0x11, 0xD3, 0x12, 0x87, 0xF1,
-0x13, 0x13, 0x13, 0x54, 0x1F, 0x30, 0xE0, 0x04,
-0x7F, 0x03, 0x80, 0x02, 0x7F, 0x01, 0x12, 0x71,
-0x9A, 0x12, 0x9C, 0x0B, 0x12, 0xDE, 0x11, 0x74,
-0x43, 0xF0, 0x90, 0x88, 0xA3, 0xE0, 0x54, 0xDF,
-0xF0, 0xE4, 0x90, 0x88, 0xAF, 0xF0, 0x90, 0x88,
-0xA0, 0x12, 0x9D, 0xCF, 0x30, 0xE0, 0x09, 0x90,
-0x88, 0xD0, 0xE0, 0x44, 0x02, 0xF0, 0x80, 0x11,
-0x90, 0x8A, 0x97, 0xB1, 0x28, 0x7F, 0x01, 0x12,
-0x04, 0x7E, 0x90, 0x88, 0xD0, 0xE0, 0x54, 0xFD,
-0xF0, 0x90, 0x8A, 0xD9, 0xB1, 0x28, 0x7F, 0x03,
-0x12, 0x04, 0x7E, 0x12, 0x9D, 0xCC, 0x30, 0xE0,
-0x0E, 0x90, 0x01, 0x36, 0x74, 0x20, 0xF0, 0xFD,
-0x7F, 0x02, 0x12, 0x7C, 0x74, 0x80, 0x07, 0x7D,
-0x20, 0x7F, 0x02, 0x12, 0x7C, 0x7E, 0x12, 0xB6,
-0xE4, 0x90, 0x88, 0x9D, 0xE0, 0x20, 0xE0, 0x07,
-0x90, 0x88, 0xA1, 0xE0, 0x54, 0xBF, 0xF0, 0xD0,
-0xD0, 0x92, 0xAF, 0x22, 0xE4, 0xFD, 0xFF, 0x12,
-0x04, 0x7E, 0x90, 0x86, 0x0C, 0xE0, 0xFE, 0xA3,
-0xE0, 0xAA, 0x06, 0xF9, 0x02, 0x04, 0x7A, 0xD3,
-0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0x90, 0x96,
-0xDD, 0xED, 0xF0, 0x90, 0x88, 0x31, 0xE0, 0xFE,
-0xC4, 0x13, 0x13, 0x54, 0x03, 0x30, 0xE0, 0x02,
-0xA1, 0x11, 0xEE, 0x12, 0x9D, 0xD0, 0x30, 0xE0,
-0x02, 0xA1, 0x11, 0x90, 0x88, 0x39, 0xE0, 0xFE,
-0x6F, 0x70, 0x02, 0xA1, 0x11, 0xEF, 0x70, 0x02,
-0x81, 0x6D, 0x24, 0xFE, 0x70, 0x02, 0x81, 0xB2,
-0x24, 0xFE, 0x60, 0x4F, 0x24, 0xFC, 0x70, 0x02,
-0x81, 0xF7, 0x24, 0xFC, 0x60, 0x02, 0xA1, 0x0A,
-0xEE, 0xB4, 0x0E, 0x03, 0x12, 0x71, 0x5F, 0x90,
-0x88, 0x39, 0xE0, 0x70, 0x05, 0x7F, 0x01, 0x12,
-0x78, 0xC0, 0x90, 0x88, 0x39, 0xE0, 0xB4, 0x06,
-0x03, 0x12, 0x71, 0x24, 0x90, 0x88, 0x39, 0xE0,
-0xB4, 0x04, 0x11, 0x90, 0x96, 0xDD, 0xE0, 0xFF,
-0x60, 0x05, 0x12, 0x67, 0x80, 0x80, 0x05, 0x90,
-0x8A, 0xED, 0x71, 0x95, 0x90, 0x88, 0x39, 0xE0,
-0x64, 0x08, 0x60, 0x02, 0xA1, 0x0A, 0x12, 0x7B,
-0xCC, 0xA1, 0x0A, 0x90, 0x88, 0x39, 0xE0, 0x70,
-0x05, 0x7F, 0x01, 0x12, 0x78, 0xC0, 0x90, 0x88,
-0x39, 0xE0, 0xB4, 0x06, 0x03, 0x12, 0x71, 0x24,
-0x90, 0x88, 0x39, 0xE0, 0xB4, 0x0E, 0x0B, 0x90,
-0x86, 0x00, 0x71, 0x95, 0xBF, 0x01, 0x03, 0x12,
-0x71, 0x5F, 0x90, 0x88, 0x39, 0xE0, 0x64, 0x0C,
-0x60, 0x02, 0xA1, 0x0A, 0x90, 0x86, 0x00, 0x71,
-0x95, 0xEF, 0x64, 0x01, 0x60, 0x02, 0xA1, 0x0A,
-0x12, 0x68, 0xC2, 0xA1, 0x0A, 0x90, 0x88, 0x39,
-0xE0, 0xB4, 0x0E, 0x0B, 0x90, 0x86, 0x00, 0x71,
-0x95, 0xBF, 0x01, 0x03, 0x12, 0x71, 0x5F, 0x90,
-0x88, 0x39, 0xE0, 0xB4, 0x06, 0x03, 0x12, 0x71,
-0x24, 0x90, 0x88, 0x39, 0xE0, 0xB4, 0x0C, 0x0B,
-0x90, 0x86, 0x00, 0x71, 0x95, 0xBF, 0x01, 0x03,
-0x12, 0x68, 0xC2, 0x90, 0x88, 0x39, 0xE0, 0x64,
-0x04, 0x70, 0x67, 0x90, 0x86, 0x02, 0x71, 0x95,
-0xEF, 0x64, 0x01, 0x70, 0x5D, 0x12, 0x73, 0x5A,
-0x80, 0x58, 0x90, 0x88, 0x39, 0xE0, 0xB4, 0x0E,
-0x0B, 0x90, 0x86, 0x00, 0x71, 0x95, 0xBF, 0x01,
-0x03, 0x12, 0x71, 0x5F, 0x90, 0x88, 0x39, 0xE0,
-0xB4, 0x06, 0x03, 0x12, 0x71, 0x24, 0x90, 0x88,
-0x39, 0xE0, 0xB4, 0x0C, 0x0B, 0x90, 0x86, 0x00,
-0x71, 0x95, 0xBF, 0x01, 0x03, 0x12, 0x68, 0xC2,
-0x90, 0x88, 0x39, 0xE0, 0x70, 0x05, 0x7F, 0x01,
-0x12, 0x78, 0xC0, 0x90, 0x88, 0x39, 0xE0, 0xB4,
-0x04, 0x18, 0x12, 0x7A, 0x49, 0x80, 0x13, 0x90,
-0x88, 0x39, 0xE0, 0xB4, 0x0C, 0x0C, 0x90, 0x88,
-0x32, 0x12, 0x9F, 0xD7, 0x30, 0xE0, 0x03, 0x12,
-0x79, 0xD4, 0x90, 0x88, 0x39, 0x12, 0xDD, 0xAB,
-0xF0, 0xD0, 0xD0, 0x92, 0xAF, 0x22, 0x90, 0x8A,
-0x77, 0xE0, 0xFE, 0xA3, 0xE0, 0xFF, 0xF5, 0x82,
-0x8E, 0x83, 0x12, 0x04, 0x7E, 0x90, 0x8A, 0x79,
-0xE0, 0xFE, 0xA3, 0xE0, 0xF5, 0x82, 0x8E, 0x83,
-0x22, 0x90, 0x8A, 0xD9, 0xB1, 0x28, 0x7F, 0x01,
-0x12, 0x04, 0x7E, 0x90, 0x88, 0xA1, 0x12, 0x9D,
-0xCF, 0x30, 0xE0, 0x04, 0x7F, 0x03, 0x80, 0x02,
-0x7F, 0x01, 0x12, 0x71, 0x9A, 0xE4, 0x90, 0x88,
-0xAF, 0xF0, 0xA3, 0x12, 0xDD, 0xCB, 0x30, 0xE0,
-0x09, 0x90, 0x8A, 0xF9, 0xB1, 0x28, 0x7D, 0x0E,
-0x80, 0x2E, 0x12, 0xDD, 0xB8, 0x30, 0xE0, 0x15,
-0x12, 0xDD, 0xF0, 0x20, 0xE0, 0x06, 0x12, 0xA7,
-0x04, 0x12, 0xDE, 0x02, 0x90, 0x8A, 0xF9, 0xB1,
-0x28, 0x7D, 0x0F, 0x80, 0x13, 0x90, 0x88, 0x36,
-0xE0, 0x60, 0x12, 0x12, 0xA7, 0x04, 0x12, 0xDE,
-0x02, 0x90, 0x8A, 0xF9, 0xB1, 0x28, 0x7D, 0x10,
-0x7F, 0x6F, 0x12, 0x04, 0x7E, 0x90, 0x88, 0xA0,
-0xE0, 0x30, 0xE0, 0x08, 0x90, 0x8A, 0xF9, 0xB1,
-0x28, 0x12, 0xA7, 0xB0, 0x90, 0x88, 0xA0, 0x12,
-0x9D, 0xCF, 0x30, 0xE0, 0x0A, 0x90, 0x8A, 0x97,
-0xB1, 0x28, 0xE4, 0xFF, 0x12, 0x04, 0x7E, 0x90,
-0x88, 0xA1, 0xE0, 0xFF, 0xC3, 0x13, 0x30, 0xE0,
-0x0E, 0x90, 0x06, 0xCD, 0xE0, 0x54, 0xEF, 0xF0,
-0x90, 0x06, 0xCF, 0xE0, 0x54, 0xEF, 0xF0, 0x12,
-0xCB, 0xA1, 0x30, 0xE0, 0x1C, 0xEF, 0x13, 0x13,
-0x54, 0x3F, 0x30, 0xE0, 0x14, 0xEE, 0x44, 0x08,
-0xF0, 0xA3, 0xE0, 0xC3, 0x13, 0x54, 0x7F, 0xFF,
-0x90, 0x8A, 0xD1, 0x12, 0xB4, 0xFF, 0x12, 0x04,
-0x7E, 0x90, 0x05, 0x63, 0xE0, 0x90, 0x96, 0xC4,
-0xF0, 0x90, 0x05, 0x62, 0xE0, 0x90, 0x96, 0xC3,
-0xF0, 0x90, 0x05, 0x61, 0xE0, 0x90, 0x96, 0xC2,
-0xF0, 0x90, 0x05, 0x60, 0xE0, 0x90, 0x96, 0xC1,
-0xF0, 0xA3, 0xD1, 0xCB, 0x12, 0xDD, 0x9D, 0x90,
-0x96, 0xC1, 0xD1, 0xCB, 0x12, 0x86, 0x54, 0xC0,
-0x04, 0xC0, 0x05, 0xC0, 0x06, 0xC0, 0x07, 0x90,
-0x96, 0xC3, 0xD1, 0xCB, 0x78, 0x10, 0x12, 0x03,
-0xFE, 0xD0, 0x03, 0xD0, 0x02, 0xD0, 0x01, 0xD0,
-0x00, 0x12, 0x86, 0x54, 0xC0, 0x04, 0xC0, 0x05,
-0xC0, 0x06, 0xC0, 0x07, 0xA3, 0xD1, 0xCB, 0x78,
-0x18, 0x12, 0x03, 0xFE, 0xD0, 0x03, 0xD0, 0x02,
-0xD0, 0x01, 0xD0, 0x00, 0x12, 0x86, 0x54, 0x90,
-0x94, 0xB0, 0x02, 0x04, 0x31, 0x90, 0x93, 0x29,
-0xE0, 0x30, 0xE0, 0x5B, 0xC4, 0x54, 0x0F, 0x20,
-0xE0, 0x1B, 0x12, 0xA7, 0x95, 0x90, 0x8A, 0xF9,
-0xB1, 0x28, 0x71, 0x8C, 0x12, 0xA9, 0x37, 0x30,
-0xE0, 0x08, 0x90, 0x8A, 0x89, 0xB1, 0x28, 0x12,
-0xA9, 0x0B, 0x02, 0xA9, 0x3E, 0x90, 0x93, 0x29,
-0xE0, 0xC4, 0x54, 0x0F, 0x30, 0xE0, 0x30, 0xE4,
-0x90, 0x92, 0x20, 0xF0, 0x90, 0x93, 0x2C, 0x12,
-0xA7, 0x9D, 0x90, 0x93, 0x29, 0xE0, 0x54, 0xEF,
-0xF0, 0xE0, 0xC3, 0x13, 0x30, 0xE0, 0x0C, 0x90,
-0x8A, 0x89, 0xB1, 0x28, 0x7D, 0x04, 0x7F, 0x01,
-0x02, 0x04, 0x7E, 0x90, 0x8A, 0xF9, 0xB1, 0x28,
-0x7D, 0x31, 0x12, 0xDA, 0x47, 0x71, 0x95, 0x22,
-0xA8, 0x04, 0xA9, 0x05, 0xAA, 0x06, 0xAB, 0x07,
-0x90, 0x94, 0xB7, 0xE0, 0xFF, 0xE4, 0xFC, 0xFD,
-0xFE, 0x22, 0x90, 0x88, 0xB8, 0xE0, 0x30, 0xE0,
-0x05, 0x90, 0x8A, 0x8F, 0x80, 0x03, 0x90, 0x8A,
-0x87, 0x71, 0x95, 0x90, 0x88, 0xE6, 0xE0, 0x30,
-0xE0, 0x04, 0xA3, 0xE0, 0x04, 0xF0, 0x90, 0x88,
-0xE7, 0xE0, 0x64, 0x08, 0x70, 0x21, 0x90, 0x88,
-0xE6, 0xE0, 0x30, 0xE0, 0x15, 0x12, 0xBF, 0xB2,
-0xF0, 0xE4, 0xFD, 0x12, 0x76, 0xF7, 0x90, 0x88,
-0xE6, 0xE0, 0x54, 0xFE, 0xF0, 0xE4, 0xA3, 0xF0,
-0x80, 0x05, 0xE4, 0x90, 0x88, 0xE7, 0xF0, 0x12,
-0x9F, 0x83, 0x30, 0xE0, 0x13, 0x90, 0x88, 0xE8,
-0xE0, 0x04, 0xF0, 0xE0, 0xB4, 0x14, 0x09, 0x90,
-0x04, 0x9C, 0xE4, 0xF0, 0x90, 0x88, 0xE8, 0xF0,
-0x90, 0x88, 0x36, 0xE0, 0x70, 0x02, 0xE1, 0xBD,
-0x90, 0x88, 0x4D, 0xE0, 0x04, 0xF0, 0x90, 0x05,
-0x61, 0xD1, 0xCB, 0x12, 0xDD, 0x9D, 0x90, 0x05,
-0x60, 0xD1, 0xCB, 0x12, 0x86, 0x54, 0xC0, 0x04,
-0xC0, 0x05, 0xC0, 0x06, 0xC0, 0x07, 0x90, 0x05,
-0x62, 0xD1, 0xCB, 0x78, 0x10, 0x12, 0x03, 0xFE,
-0xD0, 0x03, 0xD0, 0x02, 0xD0, 0x01, 0xD0, 0x00,
-0x12, 0x86, 0x54, 0xC0, 0x04, 0xC0, 0x05, 0xC0,
-0x06, 0xC0, 0x07, 0xA3, 0xD1, 0xCB, 0x78, 0x18,
-0x12, 0x03, 0xFE, 0xD0, 0x03, 0xD0, 0x02, 0xD0,
-0x01, 0xD0, 0x00, 0x12, 0x86, 0x54, 0x90, 0x88,
-0x81, 0x12, 0x04, 0x31, 0x90, 0x88, 0x32, 0xE0,
-0x54, 0x7F, 0xF0, 0xA3, 0xE0, 0x30, 0xE0, 0x0F,
-0x12, 0xCB, 0xB6, 0x90, 0x92, 0x98, 0x74, 0x05,
-0xF0, 0x12, 0x6E, 0x2F, 0x12, 0xDD, 0x45, 0x90,
-0x88, 0x32, 0x12, 0xA9, 0xBE, 0x30, 0xE0, 0x0D,
-0x90, 0x01, 0x3B, 0xE0, 0x30, 0xE4, 0x06, 0x12,
-0xC6, 0x01, 0x12, 0xC6, 0x89, 0x12, 0xD8, 0xC2,
-0xBF, 0x03, 0x14, 0x90, 0x93, 0x4A, 0xE0, 0xB4,
-0x01, 0x0D, 0x90, 0x01, 0xB8, 0xE0, 0x04, 0xF0,
-0x90, 0x05, 0x21, 0xE0, 0x44, 0x80, 0xF0, 0x90,
-0x8A, 0xE5, 0xB1, 0x28, 0x7F, 0x01, 0x12, 0x04,
-0x7E, 0x90, 0x93, 0x29, 0xE0, 0x30, 0xE0, 0x06,
-0x12, 0xA7, 0x95, 0x12, 0xA9, 0x3E, 0x90, 0x86,
-0xB3, 0xE0, 0xB4, 0x01, 0x10, 0x12, 0xC6, 0x7E,
-0x20, 0xE0, 0x0A, 0xEF, 0xC4, 0x13, 0x54, 0x07,
-0x30, 0xE0, 0x02, 0x11, 0x06, 0x22, 0x90, 0x93,
-0x29, 0xE0, 0x30, 0xE0, 0x34, 0xC4, 0x13, 0x54,
-0x07, 0x30, 0xE0, 0x2D, 0x90, 0x96, 0xDF, 0xE0,
-0x04, 0xF0, 0xE0, 0xD3, 0x94, 0xC8, 0x40, 0x21,
-0x90, 0x93, 0x29, 0xE0, 0x54, 0xDF, 0xF0, 0xE4,
-0x90, 0x96, 0xDF, 0xF0, 0x90, 0x93, 0x29, 0xE0,
-0x13, 0x30, 0xE0, 0x0D, 0x90, 0x88, 0x31, 0xE0,
-0x44, 0x01, 0xF0, 0x90, 0x88, 0x41, 0x74, 0xD0,
-0xF0, 0x22, 0x12, 0xC2, 0x0D, 0x30, 0xE0, 0x13,
-0x11, 0xEE, 0x90, 0x86, 0xB3, 0xE0, 0x64, 0x01,
-0x70, 0x27, 0x90, 0xFE, 0x10, 0xE0, 0x44, 0x04,
-0xF0, 0x80, 0x1E, 0x90, 0x93, 0x25, 0xE0, 0x60,
-0x16, 0x7D, 0x10, 0xE4, 0xFF, 0x12, 0x7C, 0x3B,
-0x90, 0x01, 0x3C, 0xE0, 0x30, 0xE4, 0x03, 0x74,
-0x10, 0xF0, 0x90, 0x01, 0x63, 0xE4, 0xF0, 0xF1,
-0xF2, 0x12, 0x88, 0xD3, 0x12, 0x87, 0xE7, 0x90,
-0x93, 0x04, 0x12, 0x87, 0x26, 0x90, 0x93, 0x05,
-0xF0, 0x90, 0x93, 0x04, 0xE0, 0x54, 0x01, 0x90,
-0x93, 0x11, 0xF0, 0x90, 0x93, 0x04, 0xE0, 0x54,
-0x02, 0x90, 0x93, 0x12, 0xF0, 0x90, 0x93, 0x04,
-0xE0, 0x54, 0x04, 0x90, 0x93, 0x13, 0xF0, 0x90,
-0x93, 0x04, 0xE0, 0x54, 0x08, 0x90, 0x93, 0x14,
-0xF0, 0x90, 0x93, 0x04, 0xE0, 0x54, 0x10, 0x90,
-0x93, 0x15, 0xF0, 0x90, 0x93, 0x05, 0xE0, 0x54,
-0x01, 0x90, 0x93, 0x16, 0xF0, 0x90, 0x93, 0x05,
-0xE0, 0x54, 0x02, 0x90, 0x93, 0x17, 0xF0, 0x90,
-0x93, 0x05, 0xE0, 0x54, 0x04, 0x90, 0x93, 0x18,
-0xF0, 0x90, 0x93, 0x05, 0xE0, 0x54, 0x08, 0x90,
-0x93, 0x19, 0xF0, 0x90, 0x93, 0x05, 0xE0, 0x54,
-0x10, 0x90, 0x93, 0x1A, 0xF0, 0x22, 0x90, 0x01,
-0x17, 0xE0, 0xFE, 0x90, 0x01, 0x16, 0x51, 0x3A,
-0x90, 0x88, 0x27, 0xF0, 0xA3, 0xEF, 0xF0, 0x90,
-0x02, 0x86, 0xE0, 0x44, 0x04, 0xF0, 0x90, 0x93,
-0x03, 0xE0, 0x44, 0x01, 0xF0, 0x7D, 0x08, 0xE4,
-0xFF, 0x12, 0x7C, 0x74, 0x90, 0x05, 0x52, 0xE0,
-0x54, 0x07, 0x04, 0x90, 0x93, 0x0E, 0xF1, 0xEB,
-0x90, 0x04, 0x22, 0xE0, 0x54, 0xEF, 0xF0, 0x22,
-0xE4, 0x90, 0x95, 0x11, 0xF0, 0x12, 0xD8, 0xCB,
-0x12, 0xBF, 0x6B, 0xE4, 0xFF, 0x12, 0xBD, 0x65,
-0x90, 0x93, 0x31, 0xE0, 0x20, 0xE0, 0x02, 0x41,
-0x20, 0x90, 0x00, 0x02, 0xE0, 0x44, 0x02, 0xF0,
-0xE4, 0x90, 0x95, 0x12, 0xF0, 0x90, 0x95, 0x12,
-0xE0, 0xFF, 0xC3, 0x94, 0x05, 0x50, 0x2F, 0x12,
-0xB7, 0x0A, 0x80, 0x05, 0xC3, 0x33, 0xCE, 0x33,
-0xCE, 0xD8, 0xF9, 0xFF, 0x90, 0x93, 0x34, 0xE0,
-0xFD, 0xEF, 0x5D, 0x60, 0x11, 0x90, 0x95, 0x12,
-0x12, 0xDD, 0x6E, 0x90, 0x95, 0x12, 0x12, 0xDD,
-0x4D, 0x44, 0x40, 0x12, 0xBD, 0xB3, 0x90, 0x95,
-0x12, 0xE0, 0x04, 0xF0, 0x80, 0xC7, 0x90, 0x07,
-0xC7, 0xE4, 0xF0, 0x90, 0x07, 0xC6, 0xF0, 0x90,
-0x07, 0xC5, 0x74, 0x77, 0xF0, 0x90, 0x07, 0xC4,
-0xE4, 0xF0, 0x90, 0x07, 0xC0, 0x74, 0x38, 0xF0,
-0xA3, 0xE4, 0xF0, 0xA3, 0x74, 0x0F, 0xF0, 0xA3,
-0x74, 0xC0, 0xF0, 0x90, 0x02, 0x26, 0xE0, 0x44,
-0x01, 0xF0, 0xE0, 0x90, 0x95, 0x13, 0xF0, 0x90,
-0x95, 0x13, 0xE0, 0x30, 0xE0, 0x19, 0x90, 0x95,
-0x11, 0xE0, 0x04, 0x12, 0xBF, 0x63, 0x90, 0x02,
-0x26, 0xE0, 0x90, 0x95, 0x13, 0xF0, 0x90, 0x95,
-0x11, 0xE0, 0xD3, 0x94, 0xFA, 0x40, 0xE0, 0x90,
-0x02, 0x03, 0x74, 0x80, 0xF0, 0x90, 0x04, 0x24,
-0xE0, 0x90, 0x95, 0x14, 0xF0, 0x90, 0x04, 0x22,
-0xE0, 0x44, 0x10, 0xF0, 0x90, 0x02, 0x00, 0xE0,
-0x90, 0x95, 0x13, 0xF0, 0x90, 0x02, 0x01, 0x51,
-0x31, 0x90, 0x02, 0x02, 0x51, 0x31, 0x90, 0x02,
-0x14, 0x51, 0x31, 0xE0, 0x04, 0xF0, 0xE0, 0x90,
-0x04, 0x24, 0xF0, 0x31, 0x20, 0x90, 0x95, 0x14,
-0xE0, 0x90, 0x04, 0x24, 0xF0, 0x90, 0xFD, 0x09,
-0x74, 0xFF, 0xF0, 0x90, 0xFD, 0x08, 0xE4, 0xF0,
-0x12, 0xBF, 0xB2, 0xF0, 0xE4, 0xFD, 0x12, 0x76,
-0xF7, 0x90, 0x88, 0x32, 0xE0, 0x54, 0xEF, 0xF0,
-0x22, 0xE0, 0xFF, 0x90, 0x95, 0x13, 0xE0, 0x2F,
-0xF0, 0x22, 0xE0, 0x7C, 0x00, 0x24, 0x00, 0xFF,
-0xEC, 0x3E, 0x22, 0x90, 0x93, 0x20, 0xE0, 0x90,
-0x95, 0x9C, 0xF0, 0x90, 0x93, 0x21, 0xE0, 0x90,
-0x95, 0x9D, 0xF0, 0x90, 0x93, 0x22, 0xE0, 0x90,
-0x95, 0x9E, 0xF0, 0x90, 0x93, 0x23, 0xE0, 0x90,
-0x95, 0x9F, 0xF0, 0x90, 0x93, 0x24, 0xE0, 0x90,
-0x95, 0xA0, 0xF0, 0x90, 0x93, 0x11, 0xE0, 0x90,
-0x95, 0xA1, 0xF0, 0x90, 0x93, 0x12, 0xE0, 0x90,
-0x95, 0xA2, 0xF0, 0x90, 0x93, 0x13, 0xE0, 0x90,
-0x95, 0xA3, 0xF0, 0x90, 0x93, 0x14, 0xE0, 0x90,
-0x95, 0xA4, 0xF0, 0x90, 0x93, 0x15, 0xE0, 0x90,
-0x95, 0xA5, 0xF0, 0x90, 0x93, 0x16, 0xE0, 0x90,
-0x95, 0xA6, 0xF0, 0x90, 0x93, 0x17, 0xE0, 0x90,
-0x95, 0xA7, 0xF0, 0x90, 0x93, 0x18, 0xE0, 0x90,
-0x95, 0xA8, 0xF0, 0x90, 0x93, 0x19, 0xE0, 0x90,
-0x95, 0xA9, 0xF0, 0x90, 0x93, 0x1A, 0xE0, 0x90,
-0x95, 0xAA, 0xF0, 0xF1, 0x30, 0x90, 0x95, 0x44,
-0xF0, 0xD1, 0xBD, 0x50, 0x09, 0xD1, 0xFB, 0x74,
-0x01, 0xF0, 0xD1, 0xB6, 0x80, 0xF3, 0x90, 0x01,
-0x1F, 0xE0, 0xFE, 0x90, 0x01, 0x1E, 0x51, 0x3A,
-0x90, 0x95, 0x39, 0xF0, 0xA3, 0xF1, 0x76, 0xD1,
-0xBD, 0x50, 0x4A, 0xD1, 0xE5, 0x90, 0x95, 0x44,
-0xE0, 0xFE, 0x24, 0xAB, 0xF5, 0x82, 0xE4, 0x34,
-0x95, 0xF1, 0x11, 0xE0, 0x24, 0x4D, 0xF5, 0x82,
-0xE4, 0x34, 0xFC, 0xF5, 0x83, 0xE0, 0xFF, 0x74,
-0x46, 0x2E, 0xF5, 0x82, 0xE4, 0x34, 0x95, 0xF1,
-0x11, 0xE0, 0x24, 0x4E, 0xF9, 0xE4, 0x34, 0xFC,
-0xFA, 0x7B, 0x01, 0xEE, 0xF1, 0x9D, 0x12, 0x86,
-0x76, 0xF1, 0x15, 0xE0, 0x24, 0x38, 0xF9, 0xE4,
-0x34, 0xFC, 0xFA, 0xEE, 0xF1, 0x8F, 0x12, 0x86,
-0x76, 0xD1, 0xB6, 0x80, 0xB2, 0x90, 0x02, 0x87,
-0xE0, 0x70, 0x02, 0xC1, 0xA2, 0x90, 0x93, 0x03,
-0xE0, 0x20, 0xE0, 0x02, 0xC1, 0xA2, 0xE4, 0x90,
-0x95, 0xB5, 0xF1, 0x38, 0x90, 0x95, 0x39, 0xE0,
-0xFF, 0xA3, 0xE0, 0xA3, 0xCF, 0xF0, 0xA3, 0xEF,
-0xF0, 0x90, 0x95, 0x3B, 0xE0, 0xFC, 0xA3, 0xE0,
-0xFD, 0xEC, 0x90, 0xFD, 0x11, 0xF0, 0x74, 0x01,
+0xEF, 0x54, 0xEF, 0x71, 0xEA, 0x54, 0x20, 0xFE,
+0xEF, 0x54, 0xDF, 0x4E, 0x12, 0xA8, 0xB3, 0x54,
+0x40, 0xFD, 0xEF, 0x54, 0xBF, 0x71, 0xEA, 0x54,
+0x80, 0xFE, 0xEF, 0x54, 0x7F, 0x4E, 0xF0, 0x11,
+0xD3, 0xE9, 0x24, 0x01, 0xF9, 0xE4, 0x3A, 0x8B,
+0x45, 0xF5, 0x46, 0x89, 0x47, 0x75, 0x48, 0x04,
+0x7B, 0x01, 0x7A, 0x88, 0x79, 0x9E, 0x12, 0x69,
+0xF5, 0x11, 0xD3, 0x12, 0x87, 0x26, 0xFF, 0x54,
+0x03, 0x90, 0x88, 0x9F, 0xF0, 0xEF, 0x54, 0x04,
+0x13, 0x13, 0x54, 0x01, 0x25, 0xE0, 0x25, 0xE0,
+0xFF, 0x90, 0x94, 0xAF, 0xE0, 0x54, 0xFB, 0x4F,
+0xFF, 0x12, 0x87, 0x25, 0xFE, 0x54, 0x08, 0x13,
+0x13, 0x13, 0x54, 0x01, 0xC4, 0x33, 0x33, 0x33,
+0x54, 0x80, 0xFD, 0xEF, 0x54, 0x7F, 0x4D, 0x90,
+0x94, 0xAF, 0xF0, 0x11, 0xD3, 0x12, 0x02, 0x06,
+0x20, 0xE0, 0x02, 0x41, 0xE7, 0x90, 0x05, 0x54,
+0xE0, 0x90, 0x88, 0xAE, 0xF0, 0xE0, 0xC3, 0x13,
+0x90, 0x88, 0xAD, 0xF0, 0x90, 0x88, 0xA0, 0xE0,
+0xC4, 0x54, 0x0F, 0x30, 0xE0, 0x0F, 0x12, 0x87,
+0x87, 0x90, 0x88, 0x9E, 0x71, 0xE2, 0x90, 0x88,
+0x9F, 0xEE, 0xF0, 0x80, 0x25, 0x12, 0x87, 0x87,
+0xFF, 0xC3, 0x94, 0x2A, 0x50, 0x15, 0xEF, 0xC3,
+0x94, 0x03, 0x50, 0x07, 0x90, 0x88, 0x9E, 0x74,
+0x03, 0x80, 0x0D, 0x12, 0x87, 0x87, 0x90, 0x88,
+0x9E, 0x80, 0x05, 0x90, 0x88, 0x9E, 0x74, 0x2A,
+0x71, 0xE2, 0x12, 0x8F, 0xEC, 0x30, 0xE0, 0x3D,
+0x90, 0x88, 0x9E, 0xE0, 0x75, 0xF0, 0x03, 0x84,
+0x90, 0x88, 0xA6, 0xF0, 0xE0, 0xC3, 0x13, 0xA3,
+0xF0, 0x90, 0x88, 0x9F, 0xE0, 0x75, 0xF0, 0x03,
+0x84, 0x90, 0x88, 0xA8, 0xF0, 0x90, 0x88, 0x9E,
+0xE0, 0xC3, 0x13, 0x90, 0x88, 0xA9, 0xF0, 0x90,
+0x88, 0x9F, 0xE0, 0xC3, 0x13, 0x90, 0x88, 0xAA,
+0xF0, 0x90, 0x01, 0x3E, 0x74, 0x08, 0xF0, 0xFD,
+0x7F, 0x02, 0x12, 0x7C, 0x05, 0xE4, 0x90, 0x88,
+0xDD, 0xF0, 0x12, 0x8F, 0xE4, 0x30, 0xE0, 0x18,
+0x12, 0xE0, 0x99, 0x30, 0xE0, 0x0D, 0x90, 0x8A,
+0x89, 0x12, 0x8A, 0x5F, 0x7D, 0x04, 0x7F, 0x02,
+0x12, 0x04, 0x7E, 0x71, 0xDA, 0x74, 0x11, 0xF0,
+0x90, 0x94, 0xA3, 0xE0, 0x30, 0xE0, 0x33, 0x90,
+0x94, 0xAC, 0x74, 0x01, 0xF0, 0xE4, 0xA3, 0xF0,
+0x90, 0x06, 0xC7, 0xE0, 0xFE, 0x90, 0x06, 0xC6,
+0x12, 0x9E, 0xF1, 0xFE, 0xE4, 0xFD, 0x78, 0x10,
+0x12, 0xE0, 0x72, 0x90, 0x06, 0xC5, 0xE0, 0xFE,
+0x90, 0x06, 0xC4, 0x12, 0x9E, 0xF1, 0xFE, 0xE4,
+0xFD, 0x12, 0x86, 0x54, 0x90, 0x94, 0xA8, 0x12,
+0x04, 0x31, 0x90, 0x94, 0xAF, 0xE0, 0x13, 0x13,
+0x54, 0x3F, 0x30, 0xE0, 0x13, 0xA3, 0xE0, 0x20,
+0xE0, 0x07, 0x54, 0x01, 0x44, 0x64, 0xF0, 0x80,
+0x07, 0x90, 0x94, 0xB0, 0xE0, 0x54, 0xFE, 0xF0,
+0x90, 0x05, 0x58, 0x74, 0x02, 0xF0, 0x90, 0x88,
+0xA5, 0xE0, 0xB4, 0x01, 0x08, 0x90, 0x88, 0xB0,
+0x74, 0x01, 0xF0, 0x80, 0x2B, 0x90, 0x88, 0xA5,
+0xE0, 0xB4, 0x04, 0x08, 0x90, 0x88, 0xB0, 0x74,
+0x04, 0xF0, 0x80, 0x1C, 0x90, 0x88, 0xA5, 0xE0,
+0xB4, 0x06, 0x08, 0x90, 0x88, 0xB0, 0x74, 0x02,
+0xF0, 0x80, 0x0D, 0x90, 0x88, 0xA5, 0xE0, 0xB4,
+0x07, 0x06, 0x90, 0x88, 0xB0, 0x74, 0x05, 0xF0,
+0xE4, 0x90, 0x88, 0xA5, 0xF0, 0x80, 0x3C, 0x90,
+0x8A, 0xF1, 0x12, 0x8E, 0xAD, 0x90, 0x89, 0x04,
+0xE0, 0x90, 0x00, 0x40, 0x30, 0xE0, 0x08, 0xE0,
+0x54, 0x0F, 0x44, 0xA0, 0xF0, 0x80, 0x06, 0xE0,
+0x54, 0x0F, 0x44, 0x20, 0xF0, 0x11, 0xD3, 0x12,
+0x87, 0x76, 0x13, 0x13, 0x13, 0x54, 0x1F, 0x30,
+0xE0, 0x04, 0x7F, 0x03, 0x80, 0x02, 0x7F, 0x01,
+0x12, 0x71, 0x9A, 0x12, 0xA4, 0x85, 0x71, 0xDA,
+0x74, 0x43, 0xF0, 0x90, 0x88, 0xA3, 0xE0, 0x54,
+0xDF, 0xF0, 0xE4, 0x90, 0x88, 0xAF, 0xF0, 0x90,
+0x88, 0xA0, 0x12, 0x8D, 0x34, 0x30, 0xE0, 0x09,
+0x90, 0x88, 0xD0, 0xE0, 0x44, 0x02, 0xF0, 0x80,
+0x12, 0x90, 0x8A, 0x97, 0x12, 0x8A, 0x5F, 0x7F,
+0x01, 0x12, 0x04, 0x7E, 0x90, 0x88, 0xD0, 0xE0,
+0x54, 0xFD, 0xF0, 0x90, 0x8A, 0xD9, 0x12, 0x8A,
+0x5F, 0x7F, 0x03, 0x12, 0x04, 0x7E, 0x12, 0x8D,
+0x31, 0x30, 0xE0, 0x0E, 0x90, 0x01, 0x36, 0x74,
+0x20, 0xF0, 0xFD, 0x7F, 0x02, 0x12, 0x7C, 0x74,
+0x80, 0x07, 0x7D, 0x20, 0x7F, 0x02, 0x12, 0x7C,
+0x7E, 0x12, 0xDB, 0x01, 0x90, 0x88, 0x9D, 0xE0,
+0x20, 0xE0, 0x07, 0x90, 0x88, 0xA1, 0xE0, 0x54,
+0xBF, 0xF0, 0xD0, 0xD0, 0x92, 0xAF, 0x22, 0x7D,
+0x01, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0,
+0x90, 0x96, 0xFB, 0xEF, 0xF0, 0xA3, 0xED, 0xF0,
+0x90, 0x8A, 0xF9, 0x12, 0x8A, 0x5F, 0x7D, 0x44,
+0x7F, 0x6F, 0x12, 0x04, 0x7E, 0x90, 0x8A, 0xFD,
+0x12, 0x8E, 0xAD, 0x90, 0x96, 0xFC, 0xE0, 0x90,
+0x96, 0xFB, 0xB4, 0x01, 0x09, 0xE0, 0x71, 0xF4,
+0xE0, 0x44, 0x04, 0xF0, 0x80, 0x07, 0xE0, 0x71,
+0xF4, 0xE0, 0x54, 0xFB, 0xF0, 0x90, 0x8A, 0xF9,
+0x12, 0x8A, 0x5F, 0xF1, 0xF1, 0xD0, 0xD0, 0x92,
+0xAF, 0x22, 0x90, 0x05, 0x00, 0x74, 0x1C, 0xF0,
+0xA3, 0x22, 0xF0, 0x24, 0x0A, 0x90, 0x88, 0xCF,
+0xF0, 0x22, 0x4D, 0xFF, 0x90, 0x88, 0x9D, 0xF0,
+0xEE, 0x22, 0xE5, 0x62, 0xC4, 0x54, 0xF0, 0x24,
+0x05, 0xF5, 0x82, 0xE4, 0x34, 0x81, 0xF5, 0x83,
+0x22, 0x8D, 0x0E, 0xEF, 0x30, 0xE6, 0x19, 0xE5,
+0x0E, 0x91, 0xDD, 0xE0, 0xFD, 0xE5, 0x0E, 0x71,
+0xF4, 0xF1, 0x99, 0xE4, 0xFB, 0xAF, 0x0E, 0x12,
+0x75, 0x80, 0x91, 0xD1, 0xE4, 0xF0, 0x80, 0x4E,
+0x91, 0xD1, 0xE0, 0x04, 0xF0, 0x91, 0xD1, 0xE0,
+0x64, 0x02, 0x70, 0x16, 0x74, 0x26, 0x25, 0x0E,
+0x12, 0xCE, 0x5C, 0xE0, 0xFD, 0xF4, 0x60, 0x02,
+0x80, 0x27, 0xE5, 0x0E, 0x91, 0xDD, 0xE0, 0xFD,
+0x80, 0x1F, 0x91, 0xD1, 0xE0, 0xD3, 0x94, 0x03,
+0x40, 0x11, 0x90, 0x8A, 0xB3, 0x12, 0x8A, 0x5F,
+0xAF, 0x0E, 0x12, 0x04, 0x7E, 0x91, 0xD1, 0xE4,
+0xF0, 0x80, 0x13, 0xE5, 0x0E, 0x91, 0xDD, 0xE0,
+0xFD, 0xE5, 0x0E, 0x71, 0xF4, 0xF1, 0x99, 0x7B,
+0x01, 0xAF, 0x0E, 0x12, 0x75, 0x80, 0xE5, 0x0E,
+0x91, 0xDD, 0xE0, 0xFD, 0x90, 0x96, 0x3E, 0x74,
+0x05, 0xF0, 0xE4, 0xFB, 0xAF, 0x0E, 0xD3, 0x10,
+0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0x90, 0x96, 0x41,
+0xED, 0xF0, 0xA3, 0xEF, 0xF0, 0xA3, 0xEB, 0xF0,
+0x90, 0x96, 0x3E, 0xE0, 0x90, 0x96, 0x44, 0xF0,
+0xE4, 0xA3, 0xF0, 0xEF, 0x12, 0xCE, 0xA8, 0xF5,
+0x83, 0xA3, 0xE0, 0x90, 0x96, 0x46, 0xF0, 0x74,
+0x46, 0x2F, 0x12, 0xCE, 0x64, 0xE0, 0x90, 0x96,
+0x47, 0xF0, 0x90, 0x96, 0x3F, 0x74, 0x0C, 0xF0,
+0x90, 0x96, 0x61, 0x74, 0x07, 0xF0, 0x7B, 0x01,
+0x7A, 0x96, 0x79, 0x3F, 0x12, 0x8A, 0x4D, 0x7F,
+0x04, 0x12, 0x04, 0x7E, 0xD0, 0xD0, 0x92, 0xAF,
+0x22, 0x74, 0xB6, 0x25, 0x0E, 0xF5, 0x82, 0xE4,
+0x34, 0x8E, 0xF5, 0x83, 0x22, 0xC4, 0x54, 0xF0,
+0x24, 0x00, 0xF5, 0x82, 0xE4, 0x34, 0x81, 0xF5,
+0x83, 0x22, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0,
+0xD0, 0x90, 0x96, 0xB7, 0x12, 0xE0, 0xA2, 0x12,
+0xD7, 0x92, 0x90, 0x96, 0xC2, 0xF0, 0xE4, 0x90,
+0x96, 0xBF, 0xF0, 0x90, 0x96, 0xB7, 0x12, 0xAD,
+0x38, 0x90, 0x96, 0xBA, 0xF0, 0xEF, 0x54, 0x07,
+0x90, 0x96, 0xBC, 0xD1, 0xEE, 0xE0, 0x90, 0x96,
+0xBD, 0xF0, 0x12, 0xCE, 0x6C, 0x54, 0x7F, 0x90,
+0x96, 0xC0, 0xF0, 0x90, 0x96, 0xB7, 0xE0, 0x12,
+0xCE, 0x9F, 0xE0, 0x90, 0x96, 0xC1, 0xF0, 0xED,
+0x54, 0x7F, 0x90, 0x96, 0xBB, 0xF0, 0xEB, 0x70,
+0x21, 0x90, 0x89, 0x3D, 0xF1, 0xC4, 0xFF, 0x12,
+0xD7, 0x86, 0xFD, 0x90, 0x89, 0x40, 0xF1, 0xCC,
+0x2D, 0xFF, 0xE4, 0x35, 0xF0, 0xC3, 0x13, 0xFE,
+0xEF, 0x13, 0xFF, 0x90, 0x96, 0xB7, 0xE0, 0x12,
+0xCE, 0x8E, 0x90, 0x96, 0xC0, 0xE0, 0xFF, 0x90,
+0x96, 0xBB, 0xE0, 0xFE, 0xD3, 0x9F, 0x40, 0x0C,
+0x90, 0x96, 0xB8, 0xE0, 0x54, 0x80, 0xFD, 0xEF,
+0x4D, 0xF0, 0x80, 0x0F, 0x90, 0x96, 0xC1, 0xE0,
+0xFF, 0xEE, 0xC3, 0x9F, 0x50, 0x05, 0x90, 0x96,
+0xB8, 0xEF, 0xF0, 0x90, 0x96, 0xB8, 0xE0, 0xFE,
+0x54, 0x7F, 0x90, 0x96, 0xBB, 0xF0, 0xEE, 0x54,
+0x80, 0x90, 0x96, 0xBE, 0xF0, 0x90, 0x96, 0xB9,
+0xE0, 0x70, 0x24, 0xA3, 0xF1, 0xD7, 0xC0, 0x83,
+0xC0, 0x82, 0xE0, 0xFF, 0x90, 0x96, 0xBC, 0xD1,
+0x3C, 0x80, 0x02, 0xC3, 0x33, 0xD8, 0xFC, 0xF4,
+0x5F, 0xD0, 0x82, 0xD0, 0x83, 0xF0, 0x90, 0x96,
+0xBD, 0xE0, 0x54, 0x7F, 0xF0, 0x80, 0x3B, 0x90,
+0x96, 0xBA, 0xF1, 0xD7, 0xC0, 0x83, 0xC0, 0x82,
+0xE0, 0xFF, 0x90, 0x96, 0xBC, 0xD1, 0x3C, 0x80,
+0x02, 0xC3, 0x33, 0xD8, 0xFC, 0x4F, 0xD0, 0x82,
+0xD0, 0x83, 0xD1, 0xEE, 0xE0, 0x54, 0x07, 0xFF,
+0x90, 0x96, 0xBD, 0xF0, 0x90, 0x89, 0x46, 0xF1,
+0xC4, 0xF5, 0x82, 0xF1, 0xD1, 0x33, 0x33, 0x33,
+0x54, 0xF8, 0x4F, 0x90, 0x96, 0xBD, 0xF0, 0x44,
+0x80, 0xF0, 0x90, 0x96, 0xB8, 0xF1, 0xBC, 0x91,
+0xDD, 0xEF, 0xF0, 0xEE, 0x70, 0x05, 0x90, 0x01,
+0xC8, 0xEF, 0xF0, 0x90, 0x96, 0xBD, 0xF1, 0xBC,
+0xD1, 0xF3, 0xEF, 0xF0, 0xEE, 0x71, 0xF4, 0xE0,
+0x54, 0xFC, 0xFF, 0x90, 0x96, 0xC2, 0xE0, 0x54,
+0x03, 0x4F, 0xFE, 0x90, 0x96, 0xB7, 0xE0, 0xFF,
+0x71, 0xF4, 0xEE, 0xF0, 0x7D, 0x01, 0x12, 0x61,
+0xF7, 0xD0, 0xD0, 0x92, 0xAF, 0x22, 0x12, 0x7B,
+0x41, 0x90, 0x96, 0xFF, 0xE0, 0xFE, 0x74, 0x01,
+0xA8, 0x06, 0x08, 0x22, 0xD3, 0x10, 0xAF, 0x01,
+0xC3, 0xC0, 0xD0, 0x90, 0x97, 0x00, 0xED, 0xF0,
+0x90, 0x96, 0xFF, 0xEF, 0xF0, 0xD3, 0x94, 0x07,
+0x50, 0x42, 0x7F, 0x47, 0xD1, 0x36, 0x80, 0x02,
+0xC3, 0x33, 0xD8, 0xFC, 0xF4, 0x5F, 0xFD, 0x7F,
+0x47, 0x12, 0x7B, 0x2E, 0x7F, 0x46, 0xD1, 0x36,
+0x80, 0x02, 0xC3, 0x33, 0xD8, 0xFC, 0x4F, 0xFD,
+0x7F, 0x46, 0xF1, 0xB4, 0x60, 0x0D, 0x7F, 0x45,
+0xD1, 0x36, 0x80, 0x02, 0xC3, 0x33, 0xD8, 0xFC,
+0x4F, 0x80, 0x0C, 0x7F, 0x45, 0xD1, 0x36, 0x80,
+0x02, 0xC3, 0x33, 0xD8, 0xFC, 0xF4, 0x5F, 0xFD,
+0x7F, 0x45, 0x80, 0x4A, 0x90, 0x96, 0xFF, 0xE0,
+0x24, 0xF8, 0xF0, 0x7F, 0x63, 0xD1, 0x36, 0x80,
+0x02, 0xC3, 0x33, 0xD8, 0xFC, 0xF4, 0x5F, 0xFD,
+0x7F, 0x63, 0x12, 0x7B, 0x2E, 0x7F, 0x62, 0xD1,
+0x36, 0x80, 0x02, 0xC3, 0x33, 0xD8, 0xFC, 0x4F,
+0xFD, 0x7F, 0x62, 0xF1, 0xB4, 0x60, 0x10, 0x7F,
+0x61, 0xD1, 0x36, 0x80, 0x02, 0xC3, 0x33, 0xD8,
+0xFC, 0x4F, 0xFD, 0x7F, 0x61, 0x80, 0x0F, 0x7F,
+0x61, 0xD1, 0x36, 0x80, 0x02, 0xC3, 0x33, 0xD8,
+0xFC, 0xF4, 0x5F, 0xFD, 0x7F, 0x61, 0x12, 0x7B,
+0x2E, 0xD0, 0xD0, 0x92, 0xAF, 0x22, 0xF0, 0x90,
+0x96, 0xB7, 0xE0, 0xC4, 0x54, 0xF0, 0x24, 0x01,
+0xF5, 0x82, 0xE4, 0x34, 0x81, 0xF5, 0x83, 0x22,
+0xAD, 0x07, 0x90, 0x93, 0x5A, 0xE0, 0x75, 0xF0,
+0x20, 0xA4, 0xFF, 0x90, 0x96, 0xD2, 0xE5, 0xF0,
+0xF0, 0xA3, 0xEF, 0xF0, 0x90, 0x93, 0x5B, 0xE0,
+0x75, 0xF0, 0x08, 0xA4, 0xAE, 0xF0, 0x90, 0x96,
+0xD4, 0xF0, 0xEE, 0xA3, 0xF0, 0xF1, 0xAC, 0x90,
+0x96, 0xD6, 0xF0, 0xEE, 0xA3, 0xF0, 0xED, 0x64,
+0x01, 0x60, 0x65, 0x90, 0x93, 0x58, 0xE0, 0xFE,
+0x12, 0x8D, 0x35, 0x30, 0xE0, 0x5A, 0xEE, 0x12,
+0xA8, 0x64, 0x20, 0xE0, 0x02, 0x7D, 0x01, 0xF1,
+0xA1, 0xFE, 0x54, 0x0F, 0xFF, 0xEE, 0xC4, 0x13,
+0x13, 0x54, 0x01, 0xFD, 0xF1, 0xA1, 0xC4, 0x13,
+0x54, 0x07, 0x30, 0xE0, 0x24, 0xA3, 0xE0, 0x30,
+0xE0, 0x0F, 0x90, 0x96, 0xD7, 0xE0, 0x90, 0x92,
+0x20, 0xF0, 0x90, 0x96, 0xD6, 0xF1, 0xE2, 0x80,
+0x10, 0xF1, 0xAC, 0xFF, 0x12, 0x7C, 0x6A, 0x12,
+0xA8, 0x5F, 0x20, 0xE0, 0x02, 0x7D, 0x01, 0xD1,
+0x44, 0x90, 0x93, 0x58, 0xE0, 0xC4, 0x54, 0x0F,
+0x30, 0xE0, 0x0D, 0x90, 0x96, 0xD5, 0xE0, 0x90,
+0x92, 0x20, 0xF0, 0x90, 0x96, 0xD4, 0xF1, 0xE2,
+0x22, 0xE0, 0x54, 0x03, 0x90, 0x92, 0x80, 0xF0,
+0x22, 0xD1, 0x44, 0x90, 0x93, 0x58, 0xE0, 0x22,
+0xE4, 0xFD, 0x61, 0x91, 0x90, 0x96, 0xD2, 0xE0,
+0xFE, 0xA3, 0xE0, 0x22, 0x12, 0x7B, 0x2E, 0x90,
+0x97, 0x00, 0xE0, 0x22, 0xE0, 0xFF, 0x90, 0x96,
+0xB7, 0xE0, 0xFE, 0x22, 0x12, 0x86, 0x6D, 0x90,
+0x96, 0xBB, 0xE0, 0x22, 0x12, 0x86, 0x6D, 0x8F,
+0x82, 0x75, 0x83, 0x00, 0x02, 0x02, 0x1F, 0xE0,
+0x24, 0x6F, 0xF5, 0x82, 0xE4, 0x34, 0x8D, 0xF5,
+0x83, 0x22, 0xE0, 0x90, 0x92, 0x21, 0xF0, 0xE4,
+0xFB, 0xFD, 0x7F, 0x58, 0x7E, 0x01, 0x02, 0x66,
+0x33, 0xE4, 0xFD, 0xFF, 0x02, 0x04, 0x7E, 0x12,
+0xB3, 0xFD, 0x30, 0xE0, 0x14, 0x12, 0x9E, 0xAF,
+0x90, 0x86, 0xB3, 0xE0, 0x64, 0x01, 0x70, 0x27,
+0x90, 0xFE, 0x10, 0xE0, 0x44, 0x04, 0xF0, 0x80,
+0x1E, 0x90, 0x93, 0x26, 0xE0, 0x60, 0x16, 0x7D,
+0x10, 0xE4, 0xFF, 0x12, 0x7C, 0x3B, 0x90, 0x01,
+0x3C, 0xE0, 0x30, 0xE4, 0x03, 0x74, 0x10, 0xF0,
+0x90, 0x01, 0x63, 0xE4, 0xF0, 0x11, 0xA4, 0x12,
+0x90, 0xD3, 0x12, 0x87, 0x87, 0x90, 0x93, 0x04,
+0x12, 0x87, 0x25, 0x90, 0x93, 0x05, 0xF0, 0x90,
+0x93, 0x04, 0xE0, 0x54, 0x01, 0x90, 0x93, 0x12,
+0xF0, 0x90, 0x93, 0x04, 0xE0, 0x54, 0x02, 0x90,
+0x93, 0x13, 0xF0, 0x90, 0x93, 0x04, 0xE0, 0x54,
+0x04, 0x90, 0x93, 0x14, 0xF0, 0x90, 0x93, 0x04,
+0xE0, 0x54, 0x08, 0x90, 0x93, 0x15, 0xF0, 0x90,
+0x93, 0x04, 0xE0, 0x54, 0x10, 0x90, 0x93, 0x16,
+0xF0, 0x90, 0x93, 0x05, 0xE0, 0x54, 0x01, 0x90,
+0x93, 0x17, 0xF0, 0x90, 0x93, 0x05, 0xE0, 0x54,
+0x02, 0x90, 0x93, 0x18, 0xF0, 0x90, 0x93, 0x05,
+0xE0, 0x54, 0x04, 0x90, 0x93, 0x19, 0xF0, 0x90,
+0x93, 0x05, 0xE0, 0x54, 0x08, 0x90, 0x93, 0x1A,
+0xF0, 0x90, 0x93, 0x05, 0xE0, 0x54, 0x10, 0x90,
+0x93, 0x1B, 0xF0, 0x22, 0xD3, 0x10, 0xAF, 0x01,
+0xC3, 0xC0, 0xD0, 0x90, 0x93, 0x03, 0xE0, 0xFE,
+0xEE, 0x54, 0xFE, 0xF0, 0xF1, 0xBF, 0xE4, 0x90,
+0x93, 0x10, 0xF0, 0xA3, 0xF0, 0xD0, 0xD0, 0x92,
+0xAF, 0x22, 0x90, 0x93, 0x21, 0xE0, 0x90, 0x95,
+0xA3, 0xF0, 0x90, 0x93, 0x22, 0xE0, 0x90, 0x95,
+0xA4, 0xF0, 0x90, 0x93, 0x23, 0xE0, 0x90, 0x95,
+0xA5, 0xF0, 0x90, 0x93, 0x24, 0xE0, 0x90, 0x95,
+0xA6, 0xF0, 0x90, 0x93, 0x25, 0xE0, 0x90, 0x95,
+0xA7, 0xF0, 0x90, 0x93, 0x12, 0xE0, 0x90, 0x95,
+0xA8, 0xF0, 0x90, 0x93, 0x13, 0xE0, 0x90, 0x95,
+0xA9, 0xF0, 0x90, 0x93, 0x14, 0xE0, 0x90, 0x95,
+0xAA, 0xF0, 0x90, 0x93, 0x15, 0xE0, 0x90, 0x95,
+0xAB, 0xF0, 0x90, 0x93, 0x16, 0xE0, 0x90, 0x95,
+0xAC, 0xF0, 0x90, 0x93, 0x17, 0xE0, 0x90, 0x95,
+0xAD, 0xF0, 0x90, 0x93, 0x18, 0xE0, 0x90, 0x95,
+0xAE, 0xF0, 0x90, 0x93, 0x19, 0xE0, 0x90, 0x95,
+0xAF, 0xF0, 0x90, 0x93, 0x1A, 0xE0, 0x90, 0x95,
+0xB0, 0xF0, 0x90, 0x93, 0x1B, 0xE0, 0x90, 0x95,
+0xB1, 0xF0, 0xD1, 0x27, 0x90, 0x95, 0x4B, 0xF0,
+0xB1, 0xBF, 0x50, 0x09, 0xB1, 0xFD, 0x74, 0x01,
+0xF0, 0xB1, 0xB8, 0x80, 0xF3, 0x90, 0x93, 0x03,
+0xE0, 0xC4, 0x13, 0x54, 0x07, 0x30, 0xE0, 0x12,
+0x90, 0x01, 0x02, 0xE0, 0x54, 0x0C, 0xFF, 0xBF,
+0x08, 0x08, 0x90, 0x95, 0xC1, 0x74, 0x01, 0xF0,
+0x80, 0x05, 0xE4, 0x90, 0x95, 0xC1, 0xF0, 0x90,
+0x01, 0x1F, 0xE0, 0xFE, 0x90, 0x01, 0x1E, 0xD1,
+0xF1, 0x90, 0x95, 0x40, 0xF0, 0xA3, 0xD1, 0x64,
+0xB1, 0xBF, 0x50, 0x4A, 0xB1, 0xE5, 0x90, 0x95,
+0x4B, 0xE0, 0xFE, 0x24, 0xB2, 0xF5, 0x82, 0xE4,
+0x34, 0x95, 0xD1, 0x08, 0xE0, 0x24, 0x4D, 0xF5,
+0x82, 0xE4, 0x34, 0xFC, 0xF5, 0x83, 0xE0, 0xFF,
+0x74, 0x4D, 0x2E, 0xF5, 0x82, 0xE4, 0x34, 0x95,
+0xD1, 0x08, 0xE0, 0x24, 0x4E, 0xF9, 0xE4, 0x34,
+0xFC, 0xFA, 0x7B, 0x01, 0xEE, 0xD1, 0x8B, 0x12,
+0x86, 0x76, 0xD1, 0x0C, 0xE0, 0x24, 0x38, 0xF9,
+0xE4, 0x34, 0xFC, 0xFA, 0xEE, 0xD1, 0x7D, 0x12,
+0x86, 0x76, 0xB1, 0xB8, 0x80, 0xB2, 0x90, 0x02,
+0x87, 0xE0, 0x70, 0x02, 0xA1, 0x98, 0x90, 0x93,
+0x03, 0xE0, 0x20, 0xE0, 0x02, 0xA1, 0x98, 0xE4,
+0x90, 0x95, 0xBC, 0xD1, 0x2F, 0x90, 0x95, 0x40,
+0xE0, 0xFF, 0xA3, 0xE0, 0xA3, 0xCF, 0xF0, 0xA3,
+0xEF, 0xF0, 0x90, 0x95, 0x42, 0xE0, 0xFC, 0xA3,
+0xE0, 0xFD, 0xEC, 0x90, 0xFD, 0x11, 0xF0, 0x74,
+0x01, 0x2D, 0xF5, 0x82, 0xE4, 0x34, 0xFB, 0xF5,
+0x83, 0xE0, 0xFE, 0x74, 0x00, 0x2D, 0xF5, 0x82,
+0xE4, 0x34, 0xFB, 0xF5, 0x83, 0xE0, 0x7A, 0x00,
+0x24, 0x00, 0xFF, 0xEA, 0x3E, 0x54, 0x3F, 0x90,
+0x95, 0x44, 0xF0, 0xA3, 0xEF, 0xF0, 0x74, 0x02,
 0x2D, 0xF5, 0x82, 0xE4, 0x34, 0xFB, 0xF5, 0x83,
-0xE0, 0xFE, 0x74, 0x00, 0x2D, 0xF5, 0x82, 0xE4,
-0x34, 0xFB, 0xF5, 0x83, 0xE0, 0x7A, 0x00, 0x24,
-0x00, 0xFF, 0xEA, 0x3E, 0x54, 0x3F, 0x90, 0x95,
-0x3D, 0xF0, 0xA3, 0xEF, 0xF0, 0x74, 0x02, 0x2D,
+0xE0, 0x54, 0x0F, 0x33, 0x33, 0x33, 0x54, 0xF8,
+0x90, 0x95, 0x47, 0xF0, 0xFC, 0x74, 0x07, 0x2D,
 0xF5, 0x82, 0xE4, 0x34, 0xFB, 0xF5, 0x83, 0xE0,
-0x54, 0x0F, 0x33, 0x33, 0x33, 0x54, 0xF8, 0x90,
-0x95, 0x40, 0xF0, 0xFC, 0x74, 0x07, 0x2D, 0xF5,
-0x82, 0xE4, 0x34, 0xFB, 0xF5, 0x83, 0xE0, 0x54,
-0xC0, 0x90, 0x95, 0x42, 0xF0, 0xEC, 0x24, 0x18,
-0x90, 0x95, 0x3F, 0xF0, 0xFD, 0x90, 0x95, 0x3B,
-0xE0, 0xFE, 0xA3, 0xE0, 0xFF, 0xD1, 0xA7, 0xEF,
-0x54, 0xFC, 0x90, 0x95, 0x41, 0xF0, 0x90, 0x95,
-0x40, 0xE0, 0x24, 0x18, 0xFF, 0xE4, 0x33, 0x90,
-0x95, 0x3D, 0x8F, 0xF0, 0x12, 0x02, 0xE7, 0x90,
-0x95, 0x3D, 0xE0, 0xFE, 0xA3, 0xE0, 0xFF, 0x12,
-0xDA, 0xBF, 0x90, 0x95, 0x39, 0xEE, 0x8F, 0xF0,
-0x12, 0x02, 0xE7, 0x90, 0x88, 0x27, 0xE0, 0xFE,
-0xA3, 0xE0, 0xFF, 0x90, 0x95, 0x39, 0x12, 0xD6,
-0xD5, 0x40, 0x1B, 0x90, 0x88, 0x28, 0xE0, 0x24,
+0x54, 0xC0, 0x90, 0x95, 0x49, 0xF0, 0xEC, 0x24,
+0x18, 0x90, 0x95, 0x46, 0xF0, 0xFD, 0x90, 0x95,
+0x42, 0xE0, 0xFE, 0xA3, 0xE0, 0xFF, 0xB1, 0x9D,
+0xEF, 0x54, 0xFC, 0x90, 0x95, 0x48, 0xF0, 0x90,
+0x95, 0x47, 0xE0, 0x24, 0x18, 0xFF, 0xE4, 0x33,
+0x90, 0x95, 0x44, 0x8F, 0xF0, 0x12, 0x02, 0xE7,
+0x90, 0x95, 0x44, 0xE0, 0xFE, 0xA3, 0xE0, 0xFF,
+0x12, 0xDD, 0x2C, 0x90, 0x95, 0x40, 0xEE, 0x8F,
+0xF0, 0x12, 0x02, 0xE7, 0x90, 0x88, 0x27, 0xE0,
+0xFE, 0xA3, 0xE0, 0xFF, 0x90, 0x95, 0x40, 0xF1,
+0xD1, 0x40, 0x1B, 0x90, 0x88, 0x28, 0xE0, 0x24,
 0x01, 0xFF, 0x90, 0x88, 0x27, 0xE0, 0x34, 0x00,
 0xFE, 0xC3, 0xED, 0x9F, 0xFF, 0xEC, 0x9E, 0x90,
-0x95, 0x39, 0xF0, 0xA3, 0xEF, 0xF0, 0x90, 0x95,
-0x41, 0xE0, 0x24, 0xC0, 0x60, 0x02, 0xA1, 0xF5,
-0xD1, 0xCA, 0x24, 0x18, 0xD1, 0xA6, 0xEF, 0x60,
-0x02, 0xA1, 0xEB, 0xD1, 0xCA, 0x24, 0x19, 0xD1,
-0xA6, 0x90, 0x95, 0x5A, 0xF1, 0x7E, 0x90, 0x95,
-0x5A, 0xE0, 0xFF, 0xD1, 0xF4, 0x9F, 0x50, 0x15,
-0xD1, 0xCA, 0x24, 0x1A, 0xD1, 0xA3, 0x90, 0x95,
-0x43, 0xE0, 0x24, 0x5B, 0xF5, 0x82, 0xE4, 0x34,
-0x95, 0xF1, 0x06, 0x80, 0xE1, 0x90, 0x95, 0x5A,
-0xE0, 0x70, 0x02, 0xA1, 0x1C, 0xE4, 0x90, 0x95,
-0x44, 0xF0, 0xD1, 0xBD, 0x40, 0x02, 0xA1, 0x04,
-0xD1, 0xE5, 0x90, 0x95, 0x44, 0xE0, 0xFF, 0x24,
-0x46, 0xF5, 0x82, 0xE4, 0x34, 0x95, 0xF5, 0x83,
-0xE0, 0xFE, 0x90, 0x95, 0x5A, 0xE0, 0xFD, 0xEE,
-0x6D, 0x70, 0x1D, 0xEF, 0xF1, 0x9D, 0x12, 0x86,
-0x6D, 0xC0, 0x03, 0xC0, 0x02, 0xC0, 0x01, 0xF1,
-0x20, 0xED, 0xF0, 0xD0, 0x01, 0xD0, 0x02, 0xD0,
-0x03, 0xF1, 0x42, 0xEF, 0x60, 0x02, 0x80, 0x47,
-0x90, 0x95, 0x5A, 0xE0, 0x64, 0x03, 0x70, 0x4E,
-0xF1, 0x20, 0x74, 0x03, 0xF0, 0x7A, 0x96, 0x79,
-0xA2, 0xF1, 0x42, 0xEF, 0x70, 0x0E, 0xF1, 0x20,
-0x74, 0x03, 0xF0, 0x7A, 0x96, 0x79, 0x9E, 0xF1,
-0x42, 0xEF, 0x60, 0x2A, 0x90, 0x95, 0x44, 0xE0,
-0xFF, 0x24, 0xA6, 0xF5, 0x82, 0xE4, 0x34, 0x95,
-0xF5, 0x83, 0xE0, 0x60, 0x02, 0x80, 0x0B, 0x90,
-0x95, 0x44, 0xE0, 0xFF, 0x24, 0xA1, 0xF1, 0x86,
-0x60, 0x05, 0x74, 0xB5, 0x2F, 0x80, 0x15, 0xD1,
-0xD7, 0x74, 0x01, 0xF0, 0x80, 0x12, 0x90, 0x95,
-0x44, 0xE0, 0x24, 0xB5, 0x80, 0x06, 0x90, 0x95,
-0x44, 0xE0, 0x24, 0xB5, 0xD1, 0xDD, 0xE4, 0xF0,
-0xD1, 0xB6, 0x81, 0x62, 0x90, 0x95, 0xB5, 0xE0,
-0x70, 0x4F, 0xA3, 0xE0, 0x70, 0x4B, 0xA3, 0xE0,
-0x70, 0x47, 0xA3, 0xE0, 0x70, 0x43, 0xA3, 0xE0,
-0x70, 0x3F, 0xA1, 0xEB, 0xE4, 0x90, 0x95, 0x44,
-0xF0, 0xD1, 0xBD, 0x50, 0x1C, 0x74, 0xA1, 0x2E,
-0xF1, 0x86, 0x60, 0x09, 0x74, 0xB5, 0x2E, 0xD1,
-0xDD, 0xE4, 0xF0, 0x80, 0x08, 0x74, 0xB5, 0x2E,
-0xD1, 0xDD, 0x74, 0x01, 0xF0, 0xD1, 0xB6, 0x80,
-0xE0, 0x90, 0x95, 0xB5, 0xE0, 0x70, 0x12, 0xA3,
-0xE0, 0x70, 0x0E, 0xA3, 0xE0, 0x70, 0x0A, 0xA3,
-0xE0, 0x70, 0x06, 0xA3, 0xE0, 0x70, 0x02, 0xA1,
-0xEB, 0xE4, 0x90, 0x95, 0x44, 0xF0, 0xD1, 0xBD,
-0x40, 0x02, 0xA1, 0xEB, 0xD1, 0xE5, 0xD1, 0xD7,
-0xE0, 0x60, 0x7C, 0x90, 0x93, 0x29, 0xE0, 0x30,
-0xE0, 0x06, 0xC4, 0x54, 0x0F, 0x30, 0xE0, 0x6F,
-0xE4, 0xFF, 0xFE, 0x90, 0x04, 0x1D, 0xE0, 0x60,
-0x10, 0xD3, 0xEF, 0x94, 0xE8, 0xEE, 0x94, 0x03,
-0x50, 0x07, 0x0F, 0xBF, 0x00, 0x01, 0x0E, 0x80,
-0xEA, 0x90, 0x04, 0x1D, 0xE0, 0x70, 0x50, 0x90,
-0x95, 0x44, 0xE0, 0x24, 0x9C, 0xF5, 0x82, 0xE4,
-0x34, 0x95, 0xF5, 0x83, 0xE0, 0xFF, 0x90, 0x92,
-0x13, 0x74, 0x06, 0xF0, 0x7B, 0x08, 0x7D, 0x01,
-0x12, 0x66, 0xDB, 0x90, 0x95, 0x3D, 0xEE, 0xF0,
-0xA3, 0xF1, 0x7E, 0xD1, 0xF4, 0x94, 0x06, 0x50,
-0x1C, 0xD1, 0xCA, 0x24, 0x0A, 0xD1, 0xA3, 0x90,
-0x95, 0x3D, 0xA3, 0xE0, 0xFE, 0x90, 0x95, 0x43,
-0xE0, 0x2E, 0x24, 0x2C, 0xF5, 0x82, 0xE4, 0x34,
-0xFC, 0xF1, 0x06, 0x80, 0xDE, 0x90, 0x04, 0x1F,
-0x74, 0x20, 0xF0, 0x90, 0x06, 0x35, 0xF0, 0xD1,
-0xB6, 0xA1, 0x5E, 0xF1, 0xBC, 0x90, 0x06, 0x36,
-0x74, 0xDD, 0xF0, 0x61, 0x2D, 0x90, 0x95, 0x42,
-0xE0, 0x60, 0x02, 0xC1, 0x9E, 0xD1, 0xCA, 0x24,
-0x16, 0xD1, 0xA6, 0x90, 0x06, 0x34, 0xEF, 0xF0,
-0xD1, 0xCA, 0x24, 0x17, 0xD1, 0xA6, 0x90, 0x06,
-0x37, 0xF1, 0x76, 0xD1, 0xBD, 0x50, 0x37, 0xD1,
-0xE5, 0xE4, 0x90, 0x95, 0x43, 0xF0, 0xD1, 0xF4,
-0x94, 0x06, 0x50, 0x26, 0xD1, 0xCA, 0x24, 0x04,
-0x2D, 0xD1, 0xA6, 0x90, 0x95, 0x44, 0xE0, 0xFE,
-0xF1, 0x8F, 0x12, 0x86, 0x6D, 0x90, 0x95, 0x43,
-0xE0, 0xF5, 0x82, 0xF1, 0x70, 0x6F, 0x60, 0x06,
-0xD1, 0xFB, 0xE4, 0xF0, 0x80, 0x04, 0xF1, 0x0A,
-0x80, 0xD4, 0xD1, 0xB6, 0x80, 0xC5, 0x90, 0x95,
-0xB0, 0xE0, 0x64, 0x01, 0x60, 0x17, 0xA3, 0xE0,
+0x95, 0x40, 0xF0, 0xA3, 0xEF, 0xF0, 0x90, 0x95,
+0x48, 0xE0, 0x24, 0xC0, 0x60, 0x02, 0x81, 0x9B,
+0xB1, 0xAC, 0xE0, 0x24, 0x18, 0xB1, 0x9C, 0xEF,
+0x60, 0x02, 0x81, 0x91, 0xB1, 0xAC, 0xE0, 0x24,
+0x19, 0xB1, 0x9C, 0x90, 0x95, 0x61, 0xD1, 0x6C,
+0x90, 0x95, 0x61, 0xE0, 0xFF, 0x90, 0x95, 0x4A,
+0xE0, 0xFD, 0xC3, 0x9F, 0x50, 0x16, 0xB1, 0xAC,
+0xE0, 0x24, 0x1A, 0xB1, 0x99, 0x90, 0x95, 0x4A,
+0xE0, 0x24, 0x62, 0xF5, 0x82, 0xE4, 0x34, 0x95,
+0xB1, 0xDA, 0x80, 0xDC, 0x90, 0x95, 0x61, 0xE0,
+0x70, 0x02, 0x61, 0xC3, 0xE4, 0x90, 0x95, 0x4B,
+0xF0, 0xB1, 0xBF, 0x40, 0x02, 0x61, 0xAB, 0xB1,
+0xE5, 0x90, 0x95, 0x4B, 0xE0, 0xFF, 0x24, 0x4D,
+0xF5, 0x82, 0xE4, 0x34, 0x95, 0xF5, 0x83, 0xE0,
+0xFE, 0x90, 0x95, 0x61, 0xE0, 0xFD, 0xEE, 0x6D,
+0x70, 0x1D, 0xEF, 0xD1, 0x8B, 0x12, 0x86, 0x6D,
+0xC0, 0x03, 0xC0, 0x02, 0xC0, 0x01, 0xD1, 0x17,
+0xED, 0xF0, 0xD0, 0x01, 0xD0, 0x02, 0xD0, 0x03,
+0xD1, 0x39, 0xEF, 0x60, 0x02, 0x80, 0x47, 0x90,
+0x95, 0x61, 0xE0, 0x64, 0x03, 0x70, 0x4E, 0xD1,
+0x17, 0x74, 0x03, 0xF0, 0x7A, 0x96, 0x79, 0xC7,
+0xD1, 0x39, 0xEF, 0x70, 0x0E, 0xD1, 0x17, 0x74,
+0x03, 0xF0, 0x7A, 0x96, 0x79, 0xC3, 0xD1, 0x39,
+0xEF, 0x60, 0x2A, 0x90, 0x95, 0x4B, 0xE0, 0xFF,
+0x24, 0xAD, 0xF5, 0x82, 0xE4, 0x34, 0x95, 0xF5,
+0x83, 0xE0, 0x60, 0x02, 0x80, 0x0B, 0x90, 0x95,
+0x4B, 0xE0, 0xFF, 0x24, 0xA8, 0xD1, 0x74, 0x60,
+0x05, 0x74, 0xBC, 0x2F, 0x80, 0x15, 0xB1, 0xCC,
+0x74, 0x01, 0xF0, 0x80, 0x12, 0x90, 0x95, 0x4B,
+0xE0, 0x24, 0xBC, 0x80, 0x06, 0x90, 0x95, 0x4B,
+0xE0, 0x24, 0xBC, 0xB1, 0xD2, 0xE4, 0xF0, 0xB1,
+0xB8, 0x61, 0x09, 0x90, 0x95, 0xBC, 0xE0, 0x70,
+0x4F, 0xA3, 0xE0, 0x70, 0x4B, 0xA3, 0xE0, 0x70,
+0x47, 0xA3, 0xE0, 0x70, 0x43, 0xA3, 0xE0, 0x70,
+0x3F, 0x81, 0x91, 0xE4, 0x90, 0x95, 0x4B, 0xF0,
+0xB1, 0xBF, 0x50, 0x1C, 0x74, 0xA8, 0x2E, 0xD1,
+0x74, 0x60, 0x09, 0x74, 0xBC, 0x2E, 0xB1, 0xD2,
+0xE4, 0xF0, 0x80, 0x08, 0x74, 0xBC, 0x2E, 0xB1,
+0xD2, 0x74, 0x01, 0xF0, 0xB1, 0xB8, 0x80, 0xE0,
+0x90, 0x95, 0xBC, 0xE0, 0x70, 0x12, 0xA3, 0xE0,
+0x70, 0x0E, 0xA3, 0xE0, 0x70, 0x0A, 0xA3, 0xE0,
+0x70, 0x06, 0xA3, 0xE0, 0x70, 0x02, 0x81, 0x91,
+0xE4, 0x90, 0x95, 0x4B, 0xF0, 0xB1, 0xBF, 0x40,
+0x02, 0x81, 0x91, 0xB1, 0xE5, 0xB1, 0xCC, 0xE0,
+0x60, 0x7B, 0x90, 0x93, 0x2A, 0xE0, 0x30, 0xE0,
+0x06, 0xC4, 0x54, 0x0F, 0x30, 0xE0, 0x6E, 0xE4,
+0xFF, 0xFE, 0x90, 0x04, 0x1D, 0xE0, 0x60, 0x10,
+0xD3, 0xEF, 0x94, 0xE8, 0xEE, 0x94, 0x03, 0x50,
+0x07, 0x0F, 0xBF, 0x00, 0x01, 0x0E, 0x80, 0xEA,
+0x90, 0x04, 0x1D, 0xE0, 0x70, 0x4F, 0x90, 0x95,
+0x4B, 0xE0, 0x24, 0xA3, 0xF5, 0x82, 0xE4, 0x34,
+0x95, 0xF5, 0x83, 0xE0, 0xFF, 0x90, 0x92, 0x13,
+0x74, 0x06, 0xF0, 0x7B, 0x08, 0x7D, 0x01, 0x12,
+0x66, 0xDB, 0x90, 0x95, 0x44, 0xEE, 0xF0, 0xA3,
+0xD1, 0x6C, 0xB1, 0xF4, 0x50, 0x1D, 0xB1, 0xAC,
+0xE0, 0x24, 0x0A, 0xB1, 0x99, 0x90, 0x95, 0x44,
+0xA3, 0xE0, 0xFE, 0x90, 0x95, 0x4A, 0xE0, 0x2E,
+0x24, 0x2C, 0xF5, 0x82, 0xE4, 0x34, 0xFC, 0xB1,
+0xDA, 0x80, 0xDF, 0x90, 0x04, 0x1F, 0x74, 0x20,
+0xF0, 0x90, 0x06, 0x35, 0xF0, 0xB1, 0xB8, 0x81,
+0x05, 0xD1, 0x99, 0x90, 0x06, 0x36, 0x74, 0xDD,
+0xF0, 0x21, 0xCE, 0x90, 0x95, 0x49, 0xE0, 0x60,
+0x02, 0xA1, 0x94, 0xB1, 0xAC, 0xE0, 0x24, 0x16,
+0xB1, 0x9C, 0x90, 0x06, 0x34, 0xEF, 0xF0, 0xB1,
+0xAC, 0xE0, 0x24, 0x17, 0xB1, 0x9C, 0x90, 0x06,
+0x37, 0xD1, 0x64, 0xB1, 0xBF, 0x50, 0x37, 0xB1,
+0xE5, 0xE4, 0x90, 0x95, 0x4A, 0xF0, 0xB1, 0xF4,
+0x50, 0x28, 0xB1, 0xAC, 0xE0, 0x24, 0x04, 0x2D,
+0xB1, 0x9C, 0x90, 0x95, 0x4B, 0xE0, 0xFE, 0xD1,
+0x7D, 0x12, 0x86, 0x6D, 0x90, 0x95, 0x4A, 0xE0,
+0xF5, 0x82, 0x12, 0x97, 0xD1, 0x6F, 0x60, 0x06,
+0xB1, 0xFD, 0xE4, 0xF0, 0x80, 0x04, 0xB1, 0xDE,
+0x80, 0xD4, 0xB1, 0xB8, 0x80, 0xC5, 0x90, 0x95,
+0xB7, 0xE0, 0x64, 0x01, 0x60, 0x17, 0xA3, 0xE0,
 0x64, 0x01, 0x60, 0x11, 0xA3, 0xE0, 0x64, 0x01,
 0x60, 0x0B, 0xA3, 0xE0, 0x64, 0x01, 0x60, 0x05,
-0xA3, 0xE0, 0xB4, 0x01, 0x06, 0x90, 0x95, 0x45,
-0x74, 0x01, 0xF0, 0x90, 0x95, 0x45, 0xE0, 0xB4,
-0x01, 0x11, 0xF1, 0xF2, 0x90, 0x93, 0x03, 0xE0,
-0x44, 0x20, 0xF0, 0x12, 0xCB, 0x3A, 0x12, 0xCA,
-0x13, 0x61, 0x2D, 0xF1, 0x30, 0x90, 0x95, 0x44,
-0xF0, 0xD1, 0xBD, 0x50, 0x09, 0xD1, 0xFB, 0x74,
-0x01, 0xF0, 0xD1, 0xB6, 0x80, 0xF3, 0xF1, 0xBC,
-0x61, 0x2D, 0x22, 0xFC, 0xED, 0x2C, 0xFD, 0x90,
-0x8A, 0xE9, 0xE0, 0xFA, 0xA3, 0xE0, 0xFB, 0xF5,
-0x82, 0x8A, 0x83, 0x02, 0x04, 0x7E, 0x90, 0x95,
-0x44, 0xE0, 0x04, 0xF0, 0x22, 0x90, 0x93, 0x0E,
-0xE0, 0xFF, 0x90, 0x95, 0x44, 0xE0, 0xFE, 0xC3,
-0x9F, 0x22, 0x90, 0x95, 0x3B, 0xE0, 0xFE, 0xA3,
-0xE0, 0xFF, 0x90, 0x95, 0x3F, 0xE0, 0x22, 0x90,
-0x95, 0x44, 0xE0, 0x24, 0xB5, 0xF5, 0x82, 0xE4,
-0x34, 0x95, 0xF5, 0x83, 0x22, 0x74, 0x9C, 0x2E,
+0xA3, 0xE0, 0xB4, 0x01, 0x06, 0x90, 0x95, 0x4C,
+0x74, 0x01, 0xF0, 0x90, 0x93, 0x03, 0xE0, 0xFF,
+0xC4, 0x13, 0x54, 0x07, 0x30, 0xE0, 0x43, 0x90,
+0x01, 0x02, 0xE0, 0x54, 0x0C, 0x64, 0x08, 0x70,
+0x2C, 0x90, 0x95, 0x4A, 0xF0, 0xB1, 0xF4, 0x50,
+0x24, 0xB1, 0xAC, 0xE0, 0x24, 0x04, 0xB1, 0x99,
+0x90, 0x95, 0x4A, 0xE0, 0xFE, 0xE4, 0x2E, 0xF5,
+0x82, 0xE4, 0x34, 0x07, 0xF5, 0x83, 0xE0, 0x6F,
+0x60, 0x07, 0xE4, 0x90, 0x95, 0xC1, 0xF0, 0x80,
+0x04, 0xB1, 0xDE, 0x80, 0xD8, 0x90, 0x95, 0xC1,
+0xE0, 0xB4, 0x01, 0x06, 0x90, 0x95, 0x4C, 0x74,
+0x01, 0xF0, 0x90, 0x95, 0x4C, 0xE0, 0xB4, 0x01,
+0x10, 0x11, 0xA4, 0x90, 0x93, 0x0D, 0xE0, 0x44,
+0x01, 0xF0, 0xF1, 0xC6, 0x12, 0xBF, 0x4B, 0x21,
+0xCE, 0xD1, 0x27, 0x90, 0x95, 0x4B, 0xF0, 0xB1,
+0xBF, 0x50, 0x09, 0xB1, 0xFD, 0x74, 0x01, 0xF0,
+0xB1, 0xB8, 0x80, 0xF3, 0xD1, 0x99, 0x21, 0xCE,
+0x22, 0xFC, 0xED, 0x2C, 0xFD, 0x90, 0x8A, 0xE9,
+0xE0, 0xFA, 0xA3, 0xE0, 0xFB, 0xF5, 0x82, 0x8A,
+0x83, 0x02, 0x04, 0x7E, 0x90, 0x95, 0x42, 0xE0,
+0xFE, 0xA3, 0xE0, 0xFF, 0x90, 0x95, 0x46, 0x22,
+0x90, 0x95, 0x4B, 0xE0, 0x04, 0xF0, 0x22, 0x90,
+0x93, 0x0F, 0xE0, 0xFF, 0x90, 0x95, 0x4B, 0xE0,
+0xFE, 0xC3, 0x9F, 0x22, 0x90, 0x95, 0x4B, 0xE0,
+0x24, 0xBC, 0xF5, 0x82, 0xE4, 0x34, 0x95, 0xF5,
+0x83, 0x22, 0xF5, 0x83, 0xEF, 0xF0, 0x90, 0x95,
+0x4A, 0xE0, 0x04, 0xF0, 0x22, 0x74, 0xA3, 0x2E,
 0xF5, 0x82, 0xE4, 0x34, 0x95, 0xF5, 0x83, 0xE0,
-0xFF, 0x02, 0x7B, 0x07, 0x90, 0x95, 0x43, 0xE0,
-0xFD, 0xC3, 0x22, 0x74, 0xB0, 0x2E, 0xF5, 0x82,
-0xE4, 0x34, 0x95, 0xF5, 0x83, 0x22, 0xF5, 0x83,
-0xEF, 0xF0, 0x90, 0x95, 0x43, 0xE0, 0x04, 0xF0,
-0x22, 0xF5, 0x83, 0xEF, 0xF0, 0x74, 0xAB, 0x2E,
+0xFF, 0x02, 0x7B, 0x07, 0x90, 0x95, 0x4A, 0xE0,
+0xFD, 0xC3, 0x94, 0x06, 0x22, 0x74, 0xB7, 0x2E,
 0xF5, 0x82, 0xE4, 0x34, 0x95, 0xF5, 0x83, 0x22,
-0x7B, 0x01, 0x7A, 0x95, 0x79, 0x5B, 0x90, 0x95,
-0xBD, 0x12, 0x86, 0x76, 0x90, 0x95, 0xC0, 0x22,
-0xE4, 0x90, 0x95, 0x45, 0xF0, 0x90, 0x95, 0xB0,
-0xF0, 0xA3, 0xF0, 0xA3, 0xF0, 0xA3, 0xF0, 0xA3,
-0xF0, 0x22, 0x90, 0x95, 0xBA, 0x12, 0x86, 0x76,
-0xE4, 0xFF, 0x90, 0x95, 0xC0, 0xE0, 0xFE, 0xEF,
-0xC3, 0x9E, 0x50, 0x14, 0x90, 0x95, 0xBD, 0xF1,
-0x6B, 0xFE, 0x90, 0x95, 0xBA, 0xF1, 0x6B, 0x6E,
-0x60, 0x03, 0x7F, 0x00, 0x22, 0x0F, 0x80, 0xE2,
-0x7F, 0x01, 0x22, 0x12, 0x86, 0x6D, 0x8F, 0x82,
-0x75, 0x83, 0x00, 0x02, 0x02, 0x1F, 0xEF, 0xF0,
-0xE4, 0x90, 0x95, 0x44, 0xF0, 0x22, 0xEF, 0xF0,
-0xE4, 0x90, 0x95, 0x43, 0xF0, 0x22, 0xF5, 0x82,
-0xE4, 0x34, 0x95, 0xF5, 0x83, 0xE0, 0x22, 0x75,
-0xF0, 0x03, 0xA4, 0x24, 0x8D, 0xF5, 0x82, 0xE4,
-0x34, 0x95, 0xF5, 0x83, 0x22, 0x75, 0xF0, 0x03,
-0xA4, 0x24, 0x4B, 0xF5, 0x82, 0xE4, 0x34, 0x95,
-0xF5, 0x83, 0x22, 0xD3, 0x10, 0xAF, 0x01, 0xC3,
-0xC0, 0xD0, 0x12, 0xBD, 0xBB, 0x31, 0x28, 0xD0,
-0xD0, 0x92, 0xAF, 0x22, 0x90, 0x95, 0x39, 0xE0,
-0xFE, 0xA3, 0xE0, 0xFF, 0x90, 0x02, 0x84, 0xEF,
-0xF0, 0xEE, 0xA3, 0xF0, 0xA3, 0xE0, 0x44, 0x01,
-0xF0, 0x22, 0x90, 0x88, 0x39, 0xE0, 0xFF, 0x60,
-0x03, 0xB4, 0x08, 0x0E, 0x12, 0xDB, 0x59, 0xBF,
-0x01, 0x08, 0xF1, 0xAB, 0x90, 0x01, 0xE5, 0xE0,
-0x04, 0xF0, 0x22, 0xF0, 0xE4, 0xA3, 0xF0, 0xA3,
-0xF0, 0x22, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0,
-0xD0, 0x90, 0x93, 0x03, 0xE0, 0xFE, 0xEE, 0x54,
-0xFE, 0xF0, 0x7D, 0x08, 0xE4, 0xFF, 0x12, 0x7C,
-0x7E, 0xE4, 0x90, 0x93, 0x0F, 0xF0, 0xA3, 0xF0,
-0xD0, 0xD0, 0x92, 0xAF, 0x22, 0x12, 0x88, 0xCD,
-0x11, 0x21, 0x7A, 0x93, 0x79, 0x1B, 0x02, 0x69,
-0xF5, 0x8B, 0x45, 0x8A, 0x46, 0x89, 0x47, 0x75,
-0x48, 0x05, 0x7B, 0x01, 0x22, 0x12, 0x88, 0xCD,
-0x11, 0x21, 0x7A, 0x93, 0x79, 0x20, 0x02, 0x69,
-0xF5, 0x90, 0x96, 0xB2, 0x12, 0x86, 0x76, 0x90,
-0x96, 0xB1, 0xEF, 0xF0, 0x12, 0x86, 0x7F, 0x98,
-0xCC, 0x00, 0x98, 0xD5, 0x01, 0x98, 0xDE, 0x06,
-0x98, 0xF3, 0x08, 0x98, 0xFC, 0x09, 0x99, 0x04,
-0x0A, 0x99, 0x0C, 0x12, 0x99, 0x14, 0x13, 0x99,
-0x1C, 0x14, 0x99, 0x25, 0x1E, 0x99, 0x2D, 0x20,
-0x99, 0x36, 0x25, 0x99, 0x3F, 0x26, 0x99, 0x48,
-0x29, 0x99, 0x51, 0x2A, 0x99, 0x5A, 0x40, 0x99,
-0x65, 0x42, 0x99, 0x74, 0x43, 0x99, 0x7D, 0x44,
-0x9A, 0x48, 0x47, 0x99, 0x86, 0x49, 0x99, 0x8F,
-0x60, 0x99, 0x98, 0x61, 0x99, 0xA1, 0x62, 0x99,
-0xAA, 0x63, 0x99, 0xB3, 0x64, 0x99, 0xBC, 0x65,
-0x99, 0xC5, 0x66, 0x99, 0xCE, 0x67, 0x99, 0xD7,
-0x68, 0x99, 0xE0, 0x69, 0x99, 0xE9, 0x6B, 0x99,
-0xF2, 0x6C, 0x99, 0xFB, 0x6D, 0x9A, 0x04, 0x6E,
-0x9A, 0x0D, 0x6F, 0x9A, 0x16, 0x70, 0x9A, 0x1F,
-0xC2, 0x9A, 0x27, 0xC3, 0x9A, 0x30, 0xC4, 0x98,
-0xE7, 0xC6, 0x98, 0xE7, 0xC7, 0x98, 0xE7, 0xC8,
-0x00, 0x00, 0x9A, 0x39, 0x90, 0x96, 0xB2, 0x12,
-0x86, 0x6D, 0x02, 0x86, 0xE0, 0x90, 0x96, 0xB2,
-0x12, 0x86, 0x6D, 0x02, 0x88, 0x01, 0x90, 0x96,
-0xB2, 0x12, 0x86, 0x6D, 0x02, 0xC0, 0x60, 0x90,
-0x96, 0xB1, 0xE0, 0xFF, 0xA3, 0x12, 0x86, 0x6D,
-0x02, 0xC1, 0x01, 0x90, 0x96, 0xB2, 0x12, 0x86,
-0x6D, 0x02, 0x90, 0x42, 0x90, 0x96, 0xB2, 0x12,
-0x86, 0x6D, 0x01, 0x15, 0x90, 0x96, 0xB2, 0x12,
-0x86, 0x6D, 0x01, 0x2D, 0x90, 0x96, 0xB2, 0x12,
-0x86, 0x6D, 0x41, 0x56, 0x90, 0x96, 0xB2, 0x12,
-0x86, 0x6D, 0xE1, 0xF2, 0x90, 0x96, 0xB2, 0x12,
-0x86, 0x6D, 0x02, 0xA7, 0xF4, 0x90, 0x96, 0xB2,
-0x12, 0x86, 0x6D, 0x61, 0xA5, 0x90, 0x96, 0xB2,
-0x12, 0x86, 0x6D, 0x02, 0x87, 0x35, 0x90, 0x96,
-0xB2, 0x12, 0x86, 0x6D, 0x02, 0xA8, 0x03, 0x90,
-0x96, 0xB2, 0x12, 0x86, 0x6D, 0x02, 0xA8, 0x46,
-0x90, 0x96, 0xB2, 0x12, 0x86, 0x6D, 0x02, 0xB7,
-0xEC, 0x90, 0x96, 0xB2, 0x12, 0x86, 0x6D, 0x02,
-0xAF, 0xF0, 0x90, 0x96, 0xB2, 0x12, 0x86, 0x6D,
-0x90, 0x8A, 0xA5, 0x80, 0x09, 0x90, 0x96, 0xB2,
-0x12, 0x86, 0x6D, 0x90, 0x8A, 0xB5, 0x12, 0xAF,
-0x8A, 0x02, 0x04, 0x7E, 0x90, 0x96, 0xB2, 0x12,
-0x86, 0x6D, 0x02, 0x25, 0xEC, 0x90, 0x96, 0xB2,
-0x12, 0x86, 0x6D, 0x02, 0x5B, 0xF3, 0x90, 0x96,
-0xB2, 0x12, 0x86, 0x6D, 0x02, 0xCF, 0x40, 0x90,
-0x96, 0xB2, 0x12, 0x86, 0x6D, 0x02, 0x88, 0xD9,
-0x90, 0x96, 0xB2, 0x12, 0x86, 0x6D, 0x02, 0x77,
-0x4F, 0x90, 0x96, 0xB2, 0x12, 0x86, 0x6D, 0x02,
-0x7C, 0x60, 0x90, 0x96, 0xB2, 0x12, 0x86, 0x6D,
-0x02, 0x7A, 0xC6, 0x90, 0x96, 0xB2, 0x12, 0x86,
-0x6D, 0x02, 0x5D, 0x36, 0x90, 0x96, 0xB2, 0x12,
-0x86, 0x6D, 0x02, 0x7B, 0xE9, 0x90, 0x96, 0xB2,
-0x12, 0x86, 0x6D, 0x02, 0x70, 0x33, 0x90, 0x96,
-0xB2, 0x12, 0x86, 0x6D, 0x02, 0x48, 0xC9, 0x90,
-0x96, 0xB2, 0x12, 0x86, 0x6D, 0x02, 0x79, 0xF3,
-0x90, 0x96, 0xB2, 0x12, 0x86, 0x6D, 0x02, 0xB8,
-0x02, 0x90, 0x96, 0xB2, 0x12, 0x86, 0x6D, 0x02,
-0x51, 0x7B, 0x90, 0x96, 0xB2, 0x12, 0x86, 0x6D,
-0x02, 0x79, 0x30, 0x90, 0x96, 0xB2, 0x12, 0x86,
-0x6D, 0x02, 0x57, 0xF2, 0x90, 0x96, 0xB2, 0x12,
-0x86, 0x6D, 0x02, 0x74, 0x8D, 0x90, 0x96, 0xB2,
-0x12, 0x86, 0x6D, 0x02, 0x78, 0x9A, 0x90, 0x96,
-0xB2, 0x12, 0x86, 0x6D, 0x02, 0x5E, 0x0B, 0x90,
-0x96, 0xB2, 0x12, 0x86, 0x6D, 0x80, 0x22, 0x90,
-0x96, 0xB2, 0x12, 0x86, 0x6D, 0x02, 0xB9, 0x53,
-0x90, 0x96, 0xB2, 0x12, 0x86, 0x6D, 0x02, 0xBF,
-0xE1, 0x90, 0x01, 0xC0, 0xE0, 0x44, 0x01, 0xF0,
-0x90, 0x96, 0xB1, 0xE0, 0x90, 0x01, 0xC2, 0xF0,
-0x22, 0x12, 0x02, 0x06, 0x90, 0x93, 0x4A, 0xF0,
-0x70, 0x03, 0x12, 0xD8, 0xAB, 0x22, 0x12, 0x02,
-0x06, 0xFF, 0x90, 0x93, 0x28, 0xF0, 0xBF, 0x01,
-0x07, 0x51, 0x69, 0xE4, 0x90, 0x93, 0x28, 0xF0,
-0x22, 0x71, 0x14, 0x7F, 0xEF, 0x7E, 0x01, 0x12,
-0x5F, 0xA6, 0xBF, 0x01, 0x06, 0x90, 0x94, 0xB6,
-0xE0, 0xA3, 0xF0, 0x71, 0x14, 0x7F, 0xEE, 0x7E,
+0xF5, 0x83, 0xEF, 0xF0, 0x74, 0xB2, 0x2E, 0xF5,
+0x82, 0xE4, 0x34, 0x95, 0xF5, 0x83, 0x22, 0x7B,
+0x01, 0x7A, 0x95, 0x79, 0x62, 0x90, 0x95, 0xC5,
+0x12, 0x86, 0x76, 0x90, 0x95, 0xC8, 0x22, 0xE4,
+0x90, 0x95, 0x4C, 0xF0, 0x90, 0x95, 0xB7, 0xF0,
+0xA3, 0xF0, 0xA3, 0xF0, 0xA3, 0xF0, 0xA3, 0xF0,
+0x22, 0x90, 0x95, 0xC2, 0x12, 0x86, 0x76, 0xE4,
+0xFF, 0x90, 0x95, 0xC8, 0xE0, 0xFE, 0xEF, 0xC3,
+0x9E, 0x50, 0x16, 0x90, 0x95, 0xC5, 0x12, 0x97,
+0xCC, 0xFE, 0x90, 0x95, 0xC2, 0x12, 0x97, 0xCC,
+0x6E, 0x60, 0x03, 0x7F, 0x00, 0x22, 0x0F, 0x80,
+0xE0, 0x7F, 0x01, 0x22, 0xEF, 0xF0, 0xE4, 0x90,
+0x95, 0x4B, 0xF0, 0x22, 0xEF, 0xF0, 0xE4, 0x90,
+0x95, 0x4A, 0xF0, 0x22, 0xF5, 0x82, 0xE4, 0x34,
+0x95, 0xF5, 0x83, 0xE0, 0x22, 0x75, 0xF0, 0x03,
+0xA4, 0x24, 0x94, 0xF5, 0x82, 0xE4, 0x34, 0x95,
+0xF5, 0x83, 0x22, 0x75, 0xF0, 0x03, 0xA4, 0x24,
+0x52, 0xF5, 0x82, 0xE4, 0x34, 0x95, 0xF5, 0x83,
+0x22, 0x90, 0x95, 0x40, 0xE0, 0xFE, 0xA3, 0xE0,
+0xFF, 0x90, 0x02, 0x84, 0xEF, 0xF0, 0xEE, 0xA3,
+0xF0, 0xA3, 0xE0, 0x44, 0x01, 0xF0, 0x22, 0x90,
+0x01, 0x17, 0xE0, 0xFE, 0x90, 0x01, 0x16, 0xD1,
+0xF1, 0x90, 0x88, 0x27, 0xF0, 0xA3, 0xEF, 0xF0,
+0x90, 0x02, 0x86, 0xE0, 0x44, 0x04, 0xF0, 0x90,
+0x93, 0x03, 0xE0, 0x44, 0x01, 0xF0, 0x7D, 0x08,
+0xE4, 0xFF, 0x12, 0x7C, 0x74, 0x90, 0x05, 0x52,
+0xE0, 0x54, 0x07, 0x04, 0x90, 0x93, 0x0F, 0xF1,
+0xB2, 0x90, 0x04, 0x22, 0xE0, 0x54, 0xEF, 0xF0,
+0x22, 0x90, 0x00, 0xAB, 0xE0, 0xFE, 0x90, 0x00,
+0xAA, 0xE0, 0x7C, 0x00, 0x24, 0x00, 0xFF, 0xEC,
+0x3E, 0x22, 0xD1, 0xE9, 0x54, 0x7F, 0x90, 0x94,
+0xBB, 0xF0, 0xA3, 0xEF, 0xF0, 0x90, 0x00, 0xAB,
+0xE0, 0x44, 0x80, 0xF0, 0x90, 0x00, 0xAA, 0xE0,
+0x44, 0x02, 0xF0, 0x22, 0x90, 0x94, 0xC3, 0x74,
+0x27, 0xF0, 0x90, 0x94, 0xE5, 0x74, 0x08, 0xF0,
+0x90, 0x94, 0xC5, 0xF0, 0xE4, 0xD1, 0x32, 0x90,
+0x94, 0xB5, 0xE0, 0x90, 0x94, 0xC9, 0xF0, 0x90,
+0x94, 0xB6, 0xE0, 0x90, 0x94, 0xCA, 0xF0, 0x90,
+0x94, 0xB9, 0xE0, 0x90, 0x94, 0xCB, 0xF0, 0x90,
+0x94, 0xBA, 0xE0, 0x90, 0x94, 0xCC, 0xF0, 0x7B,
+0x01, 0x7A, 0x94, 0x79, 0xC3, 0xF1, 0xDB, 0x02,
+0x04, 0x7E, 0xF1, 0xB9, 0x12, 0x7B, 0xDB, 0x90,
+0x8A, 0xC5, 0x12, 0x8E, 0xAD, 0x12, 0xCB, 0xD1,
+0xD1, 0xFA, 0x12, 0xDA, 0x26, 0x12, 0xD9, 0x81,
+0xF1, 0x95, 0x90, 0x8A, 0x73, 0x12, 0x8E, 0xAD,
+0x90, 0x00, 0x6A, 0xE0, 0x30, 0xE2, 0x14, 0x90,
+0x92, 0x20, 0x74, 0x01, 0xF0, 0xA3, 0x74, 0xF4,
+0xF0, 0xE4, 0xFB, 0xFD, 0x7F, 0x68, 0x7E, 0x01,
+0x12, 0x66, 0x33, 0x12, 0xD7, 0xD2, 0x90, 0x93,
+0x4B, 0x74, 0x01, 0xF0, 0x22, 0x90, 0x93, 0x03,
+0xE0, 0x54, 0xFE, 0xF1, 0xB2, 0x90, 0x93, 0x0A,
+0xF0, 0xA3, 0xF0, 0xA3, 0xF0, 0x90, 0x93, 0x0E,
+0xF0, 0x90, 0x93, 0x26, 0xF0, 0xA3, 0xF0, 0xA3,
+0xF0, 0x22, 0xF0, 0xE4, 0xA3, 0xF0, 0xA3, 0xF0,
+0x22, 0xE4, 0xFD, 0xFF, 0x02, 0x6E, 0x71, 0x7D,
+0x08, 0xE4, 0xFF, 0x02, 0x7C, 0x7E, 0x90, 0x01,
+0xC7, 0x74, 0x66, 0xF0, 0xE4, 0xFF, 0x22, 0xF5,
+0x83, 0xE0, 0xFC, 0xA3, 0xE0, 0xFD, 0xD3, 0x9F,
+0xEC, 0x9E, 0x22, 0x90, 0x8A, 0x77, 0xE0, 0xFE,
+0xA3, 0xE0, 0xFF, 0xF5, 0x82, 0x8E, 0x83, 0x22,
+0x12, 0x90, 0xCD, 0x12, 0xA0, 0x02, 0x7A, 0x93,
+0x79, 0x1C, 0x02, 0x69, 0xF5, 0x12, 0x90, 0xCD,
+0x12, 0xA0, 0x02, 0x7A, 0x93, 0x79, 0x21, 0x02,
+0x69, 0xF5, 0x8B, 0x45, 0x8A, 0x46, 0x89, 0x47,
+0x75, 0x48, 0x05, 0x7B, 0x01, 0x22, 0x12, 0x02,
+0x06, 0xFF, 0x90, 0x93, 0x29, 0xF0, 0xBF, 0x01,
+0x07, 0x11, 0x21, 0xE4, 0x90, 0x93, 0x29, 0xF0,
+0x22, 0x11, 0xCC, 0x7F, 0xEF, 0x7E, 0x01, 0x12,
+0x5F, 0xA6, 0xBF, 0x01, 0x06, 0x90, 0x94, 0xBD,
+0xE0, 0xA3, 0xF0, 0x11, 0xCC, 0x7F, 0xEE, 0x7E,
 0x01, 0x12, 0x5F, 0xA6, 0xBF, 0x01, 0x08, 0x90,
-0x94, 0xB6, 0xE0, 0x90, 0x94, 0xB8, 0xF0, 0x71,
-0x14, 0x7F, 0xED, 0x7E, 0x01, 0x12, 0x5F, 0xA6,
-0xBF, 0x01, 0x08, 0x90, 0x94, 0xB6, 0xE0, 0x90,
-0x94, 0xB9, 0xF0, 0x71, 0x14, 0x7F, 0xEC, 0x7E,
+0x94, 0xBD, 0xE0, 0x90, 0x94, 0xBF, 0xF0, 0x11,
+0xCC, 0x7F, 0xED, 0x7E, 0x01, 0x12, 0x5F, 0xA6,
+0xBF, 0x01, 0x08, 0x90, 0x94, 0xBD, 0xE0, 0x90,
+0x94, 0xC0, 0xF0, 0x11, 0xCC, 0x7F, 0xEC, 0x7E,
 0x01, 0x12, 0x5F, 0xA6, 0xBF, 0x01, 0x08, 0x90,
-0x94, 0xB6, 0xE0, 0x90, 0x94, 0xBA, 0xF0, 0x71,
-0x14, 0x7F, 0xEB, 0x7E, 0x01, 0x12, 0x5F, 0xA6,
-0xBF, 0x01, 0x08, 0x90, 0x94, 0xB6, 0xE0, 0x90,
-0x94, 0xBB, 0xF0, 0x90, 0x94, 0xB7, 0xE0, 0xFF,
+0x94, 0xBD, 0xE0, 0x90, 0x94, 0xC1, 0xF0, 0x11,
+0xCC, 0x7F, 0xEB, 0x7E, 0x01, 0x12, 0x5F, 0xA6,
+0xBF, 0x01, 0x08, 0x90, 0x94, 0xBD, 0xE0, 0x90,
+0x94, 0xC2, 0xF0, 0x90, 0x94, 0xBE, 0xE0, 0xFF,
 0xA3, 0xE0, 0xFD, 0xA3, 0xE0, 0xFB, 0xA3, 0xE0,
-0x90, 0x94, 0xBF, 0xF0, 0x90, 0x94, 0xBB, 0xE0,
-0x90, 0x94, 0xC0, 0xF0, 0x90, 0x94, 0xC1, 0x74,
-0x12, 0xF0, 0x90, 0x94, 0xE3, 0x74, 0x05, 0xF0,
-0x90, 0x94, 0xC3, 0x12, 0xDD, 0xF9, 0x90, 0x94,
-0xBF, 0xE0, 0x90, 0x94, 0xC6, 0xF0, 0x90, 0x94,
-0xC0, 0xE0, 0x90, 0x94, 0xC7, 0xF0, 0x7B, 0x01,
-0x7A, 0x94, 0x79, 0xC1, 0x12, 0x8D, 0x16, 0x7F,
+0x90, 0x94, 0xC6, 0xF0, 0x90, 0x94, 0xC2, 0xE0,
+0x90, 0x94, 0xC7, 0xF0, 0x90, 0x94, 0xC8, 0x74,
+0x12, 0xF0, 0x90, 0x94, 0xEA, 0x74, 0x05, 0xF0,
+0x90, 0x94, 0xCA, 0x12, 0xE0, 0xA2, 0x90, 0x94,
+0xC6, 0xE0, 0x90, 0x94, 0xCD, 0xF0, 0x90, 0x94,
+0xC7, 0xE0, 0x90, 0x94, 0xCE, 0xF0, 0x7B, 0x01,
+0x7A, 0x94, 0x79, 0xC8, 0x12, 0x8A, 0x4D, 0x7F,
 0x04, 0x02, 0x04, 0x7E, 0x7B, 0x01, 0x7A, 0x94,
-0x79, 0xB6, 0x22, 0x7E, 0x00, 0x7F, 0x0B, 0x7D,
-0x00, 0x7B, 0x01, 0x7A, 0x93, 0x79, 0x4C, 0x12,
-0x04, 0x80, 0x71, 0x14, 0x12, 0xBB, 0xC8, 0xBF,
-0x01, 0x1C, 0x90, 0x94, 0xB6, 0xE0, 0xFE, 0x54,
-0x01, 0x90, 0x93, 0x4C, 0xF0, 0xEE, 0x54, 0x04,
-0x90, 0x93, 0x4E, 0xF0, 0x90, 0x94, 0xB6, 0xE0,
-0x54, 0x08, 0x90, 0x93, 0x4D, 0xF0, 0x71, 0x14,
-0x12, 0xBB, 0xBD, 0x70, 0x35, 0x90, 0x94, 0xB6,
-0xE0, 0x54, 0x07, 0x70, 0x15, 0x7B, 0x01, 0x7A,
-0x94, 0x79, 0xB7, 0x7F, 0xFA, 0x7E, 0x01, 0x12,
-0x5F, 0xA6, 0xBF, 0x01, 0x0F, 0x90, 0x94, 0xB7,
-0x80, 0x03, 0x90, 0x94, 0xB6, 0xE0, 0x54, 0x07,
-0x90, 0x93, 0x50, 0xF0, 0x90, 0x94, 0xB6, 0xE0,
-0x54, 0xE0, 0xC4, 0x13, 0x54, 0x07, 0x90, 0x93,
-0x4F, 0xF0, 0x71, 0x14, 0x7F, 0xFD, 0x7E, 0x01,
-0x12, 0x5F, 0xA6, 0xBF, 0x01, 0x0E, 0x90, 0x94,
-0xB6, 0xE0, 0x54, 0x0C, 0x13, 0x13, 0x54, 0x3F,
-0x90, 0x93, 0x51, 0xF0, 0x22, 0x12, 0x02, 0x06,
-0x90, 0x94, 0xD9, 0x12, 0x87, 0xE6, 0x90, 0x94,
-0xDA, 0xF0, 0x60, 0x0E, 0x91, 0x03, 0x12, 0xBF,
-0xF5, 0x90, 0x94, 0xDA, 0x91, 0x03, 0x7B, 0x57,
-0x91, 0x10, 0x90, 0x88, 0x9D, 0xE0, 0x30, 0xE0,
-0x0C, 0xB1, 0xCC, 0x30, 0xE0, 0x07, 0x90, 0x06,
-0x0A, 0xE0, 0x44, 0x07, 0xF0, 0x90, 0x94, 0xB6,
-0x74, 0x20, 0xF0, 0x90, 0x94, 0xD8, 0x74, 0x03,
-0xF0, 0x90, 0x05, 0x22, 0xE0, 0x90, 0x94, 0xB8,
-0xF0, 0x90, 0x93, 0x5D, 0xE0, 0x90, 0x94, 0xB9,
-0xF0, 0x90, 0x93, 0x5E, 0xE0, 0x90, 0x94, 0xBA,
-0xF0, 0x71, 0x14, 0x12, 0x8D, 0x16, 0x7F, 0x04,
-0x02, 0x04, 0x7E, 0xE0, 0xFF, 0x90, 0x94, 0xD9,
-0xE0, 0xFD, 0x22, 0xE4, 0xFB, 0xFD, 0x7F, 0xFF,
-0xEB, 0xB4, 0x57, 0x04, 0xF1, 0x3B, 0x80, 0x0F,
-0xEF, 0x70, 0x07, 0x90, 0x93, 0x5D, 0xE0, 0x4D,
-0x80, 0x05, 0x12, 0xC0, 0x0D, 0xF1, 0x3B, 0x90,
-0x05, 0x22, 0xF0, 0x90, 0x93, 0x01, 0xEB, 0xF0,
-0x22, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0,
-0x90, 0x94, 0xB6, 0x74, 0x02, 0xF0, 0x90, 0x88,
-0xC2, 0xE0, 0x44, 0x10, 0xF0, 0x90, 0x88, 0xAF,
-0xE0, 0x60, 0x02, 0xA1, 0xC7, 0x90, 0x8A, 0xD9,
-0x12, 0x8D, 0x28, 0xE4, 0xFF, 0x12, 0x04, 0x7E,
-0x90, 0x88, 0xA1, 0xE0, 0x30, 0xE0, 0x04, 0x7F,
-0x01, 0x80, 0x36, 0x90, 0x88, 0x9D, 0xF1, 0x86,
-0x30, 0xE0, 0x04, 0x7F, 0x0D, 0x80, 0x2A, 0x90,
-0x88, 0xA0, 0xE0, 0xFF, 0xC4, 0x54, 0x0F, 0x30,
-0xE0, 0x10, 0xEF, 0x13, 0x13, 0x54, 0x3F, 0x30,
-0xE0, 0x04, 0x7F, 0x09, 0x80, 0x13, 0x7F, 0x03,
-0x80, 0x0F, 0x90, 0x88, 0xA0, 0xE0, 0xC3, 0x13,
-0x30, 0xE0, 0x04, 0x7F, 0x03, 0x80, 0x02, 0x7F,
-0x09, 0x12, 0x71, 0x9A, 0x90, 0x88, 0xAF, 0x74,
-0x01, 0x12, 0xDD, 0xCB, 0x30, 0xE0, 0x04, 0x91,
-0x0B, 0x80, 0x3C, 0x12, 0xDD, 0xB8, 0x30, 0xE0,
-0x36, 0x90, 0x88, 0xA3, 0xE0, 0x44, 0x20, 0xF0,
-0x90, 0x88, 0x9C, 0xE0, 0x60, 0x0C, 0x90, 0x8A,
-0xB9, 0x12, 0x8D, 0x28, 0x7D, 0x01, 0x7F, 0x04,
-0x80, 0x11, 0x91, 0x0B, 0xB1, 0xCC, 0x90, 0x8A,
-0xB9, 0x20, 0xE0, 0x0C, 0x12, 0x8D, 0x28, 0x7D,
-0x01, 0x7F, 0x0C, 0x12, 0x04, 0x7E, 0x80, 0x07,
-0x12, 0x8D, 0x28, 0xF1, 0xDE, 0xF1, 0x99, 0x90,
-0x88, 0x9C, 0xE0, 0x60, 0x06, 0x7B, 0x04, 0x7D,
-0x6F, 0x80, 0x03, 0xE4, 0xFB, 0xFD, 0x7F, 0xFF,
-0x91, 0x10, 0x90, 0x88, 0xA0, 0xB1, 0xCF, 0x30,
-0xE0, 0x0B, 0x90, 0x8A, 0x97, 0x12, 0x8D, 0x28,
-0x7F, 0x01, 0x12, 0x04, 0x7E, 0x90, 0x88, 0xA1,
-0xE0, 0xC3, 0x13, 0x30, 0xE0, 0x0E, 0x90, 0x06,
-0xCD, 0xE0, 0x44, 0x10, 0xF0, 0x90, 0x06, 0xCF,
-0xE0, 0x44, 0x10, 0xF0, 0x90, 0x05, 0x63, 0xE0,
-0x90, 0x94, 0xBA, 0xF0, 0x90, 0x05, 0x62, 0xE0,
-0x90, 0x94, 0xB9, 0xF0, 0x90, 0x05, 0x61, 0xE0,
-0x90, 0x94, 0xB8, 0xF0, 0x90, 0x05, 0x60, 0xE0,
-0x90, 0x94, 0xB7, 0xF0, 0xA3, 0x12, 0x8E, 0xCB,
-0x78, 0x08, 0x12, 0x03, 0xFE, 0x12, 0x8E, 0xC0,
-0x12, 0x86, 0x54, 0xC0, 0x04, 0xC0, 0x05, 0xC0,
-0x06, 0xC0, 0x07, 0x90, 0x94, 0xB9, 0x12, 0x8E,
-0xCB, 0x78, 0x10, 0x12, 0x03, 0xFE, 0xD0, 0x03,
-0xD0, 0x02, 0xD0, 0x01, 0xD0, 0x00, 0x12, 0x86,
-0x54, 0xC0, 0x04, 0xC0, 0x05, 0xC0, 0x06, 0xC0,
-0x07, 0xA3, 0x12, 0x8E, 0xCB, 0x78, 0x18, 0x12,
-0x03, 0xFE, 0xD0, 0x03, 0xD0, 0x02, 0xD0, 0x01,
-0xD0, 0x00, 0x12, 0x86, 0x54, 0xA3, 0x12, 0x04,
-0x31, 0x90, 0x88, 0xA1, 0xF1, 0xD7, 0x30, 0xE0,
-0x2E, 0x90, 0x94, 0xB0, 0x12, 0x04, 0xB8, 0x90,
-0x94, 0xBB, 0xF1, 0xEB, 0x40, 0x21, 0x90, 0x94,
-0xB0, 0x12, 0x86, 0x61, 0x90, 0x94, 0xBB, 0x12,
-0x04, 0xB8, 0x12, 0x86, 0x39, 0xE4, 0xFB, 0x7A,
-0x78, 0xF9, 0xF8, 0xC3, 0x12, 0x03, 0xDA, 0x50,
-0x06, 0x90, 0x94, 0xB5, 0xE0, 0x04, 0xF0, 0xD0,
-0xD0, 0x92, 0xAF, 0x22, 0x90, 0x94, 0xAE, 0xE0,
-0xC4, 0x13, 0x13, 0x13, 0x54, 0x01, 0x22, 0xD3,
-0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0x7F, 0x8F,
-0x12, 0x7B, 0x41, 0xEF, 0x20, 0xE6, 0x02, 0xE1,
-0x02, 0x90, 0x00, 0x8C, 0xE0, 0x90, 0x96, 0xC8,
-0xF0, 0x7F, 0x8D, 0x12, 0x7B, 0x41, 0x90, 0x96,
-0xC9, 0xEF, 0xF0, 0x90, 0x00, 0x8E, 0xE0, 0x90,
-0x96, 0xCA, 0xF0, 0x90, 0x96, 0xC9, 0xE0, 0x24,
-0xFC, 0x60, 0x10, 0x24, 0x03, 0x60, 0x02, 0xC1,
-0xF2, 0x90, 0x96, 0xC8, 0xE0, 0xFF, 0x12, 0xD7,
-0xB6, 0xC1, 0xF2, 0x90, 0x96, 0xC8, 0xE0, 0x24,
-0xD6, 0x12, 0xD7, 0x06, 0xFB, 0xE4, 0xFD, 0xFF,
-0xF1, 0x34, 0x75, 0xF0, 0x12, 0xF1, 0xCD, 0x13,
-0x13, 0x54, 0x03, 0xFB, 0x0D, 0xE4, 0xFF, 0xF1,
-0x34, 0x75, 0xF0, 0x12, 0x90, 0x89, 0x52, 0x12,
-0x04, 0x6E, 0xB1, 0xCF, 0xFB, 0x0D, 0xE4, 0xFF,
-0xF1, 0x34, 0x75, 0xF0, 0x12, 0xF1, 0xCD, 0xC4,
-0x54, 0x03, 0xFB, 0x0D, 0xE4, 0xFF, 0xF1, 0x34,
-0x75, 0xF0, 0x12, 0x12, 0xA6, 0x54, 0xFB, 0xE4,
-0xFD, 0x0F, 0xF1, 0x34, 0x12, 0xA6, 0x64, 0xF1,
-0x31, 0x75, 0xF0, 0x12, 0xF1, 0x4B, 0xC4, 0x13,
-0x54, 0x01, 0xFB, 0x0D, 0x7F, 0x01, 0xF1, 0x34,
-0x75, 0xF0, 0x12, 0xF1, 0x4B, 0x54, 0x1F, 0xF1,
-0x32, 0x12, 0xB7, 0x83, 0xE0, 0xFB, 0xE4, 0xFD,
-0x0F, 0xF1, 0x34, 0x75, 0xF0, 0x08, 0xA4, 0x24,
-0x01, 0xF5, 0x82, 0xE4, 0x34, 0x82, 0xF1, 0x2F,
-0x75, 0xF0, 0x08, 0xA4, 0x24, 0x02, 0xF5, 0x82,
-0xE4, 0x34, 0x82, 0xF1, 0x2F, 0x75, 0xF0, 0x08,
-0xA4, 0x24, 0x03, 0xF5, 0x82, 0xE4, 0x34, 0x82,
-0xF1, 0x2F, 0x75, 0xF0, 0x08, 0xA4, 0x24, 0x04,
-0xF5, 0x82, 0xE4, 0x34, 0x82, 0xF5, 0x83, 0xE0,
-0xFB, 0xE4, 0xFD, 0x0F, 0xF1, 0x34, 0x75, 0xF0,
-0x08, 0xA4, 0x24, 0x05, 0xF5, 0x82, 0xE4, 0x34,
-0x82, 0xF1, 0x2F, 0x75, 0xF0, 0x08, 0xA4, 0x24,
-0x06, 0xF5, 0x82, 0xE4, 0x34, 0x82, 0xF1, 0x2F,
-0x75, 0xF0, 0x08, 0xA4, 0x24, 0x07, 0xF5, 0x82,
-0xE4, 0x34, 0x82, 0xF5, 0x83, 0xE0, 0xFB, 0x0D,
-0xF1, 0x07, 0x7F, 0x8F, 0x12, 0x7B, 0x41, 0xEF,
-0x30, 0xE0, 0x07, 0xE4, 0xFD, 0x7F, 0x8D, 0x12,
-0x7B, 0x2E, 0xD0, 0xD0, 0x92, 0xAF, 0x22, 0xEF,
-0x70, 0x04, 0x74, 0xF0, 0x80, 0x16, 0xEF, 0xB4,
-0x01, 0x04, 0x74, 0xF4, 0x80, 0x0E, 0xEF, 0xB4,
-0x02, 0x04, 0x74, 0xF8, 0x80, 0x06, 0xEF, 0xB4,
-0x03, 0x0C, 0x74, 0xFC, 0x2D, 0xF5, 0x82, 0xE4,
-0x34, 0x02, 0xF5, 0x83, 0xEB, 0xF0, 0x22, 0xF5,
-0x83, 0xE0, 0xFB, 0x0D, 0xF1, 0x07, 0x90, 0x96,
-0xC8, 0xE0, 0x22, 0x90, 0x93, 0x5E, 0xE0, 0xFF,
-0x90, 0x93, 0x5D, 0xE0, 0x4F, 0x22, 0xFF, 0x75,
-0xF0, 0x12, 0xED, 0x90, 0x89, 0x51, 0x12, 0x04,
-0x6E, 0xE0, 0x22, 0x90, 0x88, 0x39, 0xE0, 0x64,
-0x02, 0x60, 0x27, 0x90, 0x88, 0x9D, 0xE0, 0x30,
-0xE0, 0x0A, 0x90, 0x94, 0xAE, 0xE0, 0xFF, 0xB1,
-0xD0, 0x20, 0xE0, 0x03, 0x12, 0xC4, 0xA0, 0x90,
-0x88, 0x9D, 0xE0, 0x30, 0xE0, 0x0C, 0x90, 0x94,
-0xAE, 0xE0, 0xFF, 0xB1, 0xD0, 0x30, 0xE0, 0x02,
-0xF1, 0x8D, 0x22, 0x90, 0x88, 0xA1, 0xE0, 0xC4,
-0x13, 0x13, 0x54, 0x03, 0x22, 0x90, 0x06, 0xA9,
-0xE0, 0xF5, 0x77, 0x30, 0xE6, 0x02, 0xF1, 0x99,
-0x22, 0x90, 0x88, 0x9D, 0xE0, 0x30, 0xE0, 0x27,
-0xB1, 0xCC, 0x30, 0xE0, 0x22, 0x90, 0x88, 0xAF,
-0xE0, 0xFF, 0x70, 0x0A, 0xEF, 0x70, 0x18, 0x90,
-0x88, 0xA0, 0xE0, 0x30, 0xE0, 0x11, 0x90, 0x06,
-0x04, 0xE0, 0x44, 0x40, 0xF0, 0xE0, 0x44, 0x80,
-0xF0, 0x90, 0x8A, 0xE1, 0x12, 0x8B, 0x95, 0x22,
-0xFF, 0x75, 0xF0, 0x12, 0xED, 0x90, 0x89, 0x52,
-0x12, 0x04, 0x6E, 0xE0, 0x22, 0xA1, 0xD7, 0xE0,
-0xFF, 0x13, 0x13, 0x54, 0x3F, 0x22, 0xE4, 0xFD,
-0x7F, 0x0C, 0x02, 0x04, 0x7E, 0x7D, 0xFF, 0xE4,
-0xFF, 0x81, 0x10, 0x12, 0x86, 0x61, 0xD3, 0x02,
-0x03, 0xDA, 0x12, 0x02, 0x06, 0xFF, 0x54, 0x80,
-0xFE, 0x90, 0x93, 0x57, 0xE0, 0x54, 0x7F, 0x4E,
-0xFE, 0xF0, 0xEF, 0x54, 0x40, 0xFF, 0xEE, 0x54,
-0xBF, 0x4F, 0x12, 0xAF, 0xCA, 0x12, 0xDD, 0xD5,
-0x90, 0x93, 0x57, 0xF0, 0xEE, 0x54, 0x10, 0xFE,
-0xEF, 0x54, 0xEF, 0x4E, 0xFF, 0xF0, 0x12, 0x02,
-0x06, 0x54, 0x0F, 0xFE, 0xEF, 0x54, 0xF0, 0x4E,
-0x90, 0x93, 0x57, 0x12, 0x87, 0xE6, 0xFF, 0x54,
-0x7F, 0x90, 0x93, 0x59, 0xF0, 0xEF, 0x54, 0x80,
-0x12, 0x9D, 0xD0, 0xFF, 0x90, 0x93, 0x58, 0xE0,
-0x54, 0xFE, 0x12, 0x87, 0x25, 0x90, 0x93, 0x5A,
-0x12, 0x87, 0xF0, 0x54, 0x01, 0x25, 0xE0, 0xFF,
-0x90, 0x93, 0x58, 0xE0, 0x54, 0xFD, 0x4F, 0xF0,
-0x31, 0xB3, 0x20, 0xE0, 0x02, 0x7D, 0x01, 0xD3,
-0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0x90, 0x96,
-0xD3, 0xED, 0xF0, 0x90, 0x96, 0xD2, 0xEF, 0xF0,
-0xD3, 0x94, 0x07, 0x50, 0x42, 0x7F, 0x47, 0x31,
-0x07, 0x80, 0x02, 0xC3, 0x33, 0xD8, 0xFC, 0xF4,
-0x5F, 0xFD, 0x7F, 0x47, 0x12, 0x7B, 0x2E, 0x7F,
-0x46, 0x31, 0x07, 0x80, 0x02, 0xC3, 0x33, 0xD8,
-0xFC, 0x4F, 0xFD, 0x7F, 0x46, 0x31, 0xCC, 0x60,
-0x0D, 0x7F, 0x45, 0x31, 0x07, 0x80, 0x02, 0xC3,
-0x33, 0xD8, 0xFC, 0x4F, 0x80, 0x0C, 0x7F, 0x45,
-0x31, 0x07, 0x80, 0x02, 0xC3, 0x33, 0xD8, 0xFC,
-0xF4, 0x5F, 0xFD, 0x7F, 0x45, 0x80, 0x46, 0x90,
-0x96, 0xD2, 0xE0, 0x24, 0xF8, 0xF0, 0x7F, 0x63,
-0x31, 0x07, 0x80, 0x02, 0xC3, 0x33, 0xD8, 0xFC,
-0xF4, 0x5F, 0xFD, 0x7F, 0x63, 0x12, 0x7B, 0x2E,
-0x7F, 0x62, 0x31, 0x07, 0x80, 0x02, 0xC3, 0x33,
-0xD8, 0xFC, 0x4F, 0xFD, 0x7F, 0x62, 0x31, 0xCC,
-0x60, 0x0E, 0x31, 0x05, 0x80, 0x02, 0xC3, 0x33,
-0xD8, 0xFC, 0x4F, 0xFD, 0x7F, 0x61, 0x80, 0x0D,
-0x31, 0x05, 0x80, 0x02, 0xC3, 0x33, 0xD8, 0xFC,
-0xF4, 0x5F, 0xFD, 0x7F, 0x61, 0x12, 0x7B, 0x2E,
-0xD0, 0xD0, 0x92, 0xAF, 0x22, 0x7F, 0x61, 0x12,
-0x7B, 0x41, 0x90, 0x96, 0xD2, 0xE0, 0xFE, 0x74,
-0x01, 0xA8, 0x06, 0x08, 0x22, 0xAD, 0x07, 0x90,
-0x93, 0x59, 0xE0, 0x75, 0xF0, 0x20, 0xA4, 0xFF,
-0x90, 0x96, 0xA6, 0xE5, 0xF0, 0xF0, 0xA3, 0xEF,
-0xF0, 0x90, 0x93, 0x5A, 0xE0, 0x75, 0xF0, 0x08,
-0xA4, 0xAE, 0xF0, 0x90, 0x96, 0xA8, 0xF0, 0xEE,
-0xA3, 0xF0, 0x31, 0xC4, 0x90, 0x96, 0xAA, 0xF0,
-0xEE, 0xA3, 0xF0, 0xED, 0x64, 0x01, 0x60, 0x63,
-0x90, 0x93, 0x57, 0xE0, 0xFE, 0x12, 0x9D, 0xD0,
-0x30, 0xE0, 0x58, 0xEE, 0x31, 0xB8, 0x20, 0xE0,
-0x02, 0x7D, 0x01, 0x31, 0xAC, 0xFE, 0x54, 0x0F,
-0xFF, 0xEE, 0xC4, 0x13, 0x13, 0x54, 0x01, 0xFD,
-0x31, 0xAC, 0xC4, 0x13, 0x54, 0x07, 0x30, 0xE0,
-0x23, 0xA3, 0xE0, 0x30, 0xE0, 0x0F, 0x90, 0x96,
-0xAB, 0xE0, 0x90, 0x92, 0x20, 0xF0, 0x90, 0x96,
-0xAA, 0x31, 0xD4, 0x80, 0x0F, 0x31, 0xC4, 0xFF,
-0x12, 0x7C, 0x6A, 0x31, 0xB3, 0x20, 0xE0, 0x02,
-0x7D, 0x01, 0x11, 0x5F, 0x90, 0x93, 0x57, 0xE0,
-0xC4, 0x54, 0x0F, 0x30, 0xE0, 0x0D, 0x90, 0x96,
-0xA9, 0xE0, 0x90, 0x92, 0x20, 0xF0, 0x90, 0x96,
-0xA8, 0x31, 0xD4, 0x22, 0x11, 0x5F, 0x90, 0x93,
-0x57, 0xE0, 0x22, 0x90, 0x93, 0x57, 0xE0, 0xFE,
-0x54, 0x0F, 0xFF, 0xEE, 0xC4, 0x13, 0x13, 0x54,
-0x03, 0x7D, 0x00, 0x22, 0x90, 0x96, 0xA6, 0xE0,
-0xFE, 0xA3, 0xE0, 0x22, 0x12, 0x7B, 0x2E, 0x90,
-0x96, 0xD3, 0xE0, 0x22, 0xE0, 0x90, 0x92, 0x21,
-0xF0, 0xE4, 0xFB, 0xFD, 0x7F, 0x58, 0x7E, 0x01,
-0x02, 0x66, 0x33, 0x90, 0x93, 0x57, 0xE0, 0xFF,
-0x12, 0x9D, 0xD0, 0x30, 0xE0, 0x1A, 0xEF, 0xC4,
-0x54, 0x0F, 0x30, 0xE0, 0x03, 0x12, 0xD8, 0x0B,
-0x90, 0x93, 0x58, 0xE0, 0x30, 0xE0, 0x09, 0x31,
-0xB3, 0x20, 0xE0, 0x02, 0x7D, 0x01, 0x11, 0x5F,
-0x22, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0,
-0x90, 0x96, 0x88, 0x12, 0xDD, 0xF9, 0x12, 0xB7,
-0x91, 0x90, 0x96, 0x93, 0xF0, 0xE4, 0x90, 0x96,
-0x90, 0xF0, 0x90, 0x96, 0x88, 0x12, 0xC6, 0x81,
-0x90, 0x96, 0x8B, 0xF0, 0xEF, 0x54, 0x07, 0x90,
-0x96, 0x8D, 0xF0, 0x90, 0x96, 0x88, 0xE0, 0x71,
-0x60, 0xE0, 0x90, 0x96, 0x8E, 0xF0, 0xD1, 0x50,
-0x54, 0x7F, 0x90, 0x96, 0x91, 0xF0, 0x90, 0x96,
-0x88, 0xE0, 0xD1, 0x64, 0xE0, 0x90, 0x96, 0x92,
-0xF0, 0xED, 0x54, 0x7F, 0x90, 0x96, 0x8C, 0xF0,
-0xEB, 0x70, 0x21, 0x90, 0x89, 0x3D, 0x91, 0x29,
-0xFF, 0x12, 0xD7, 0xAA, 0xFD, 0x90, 0x89, 0x40,
-0x12, 0x97, 0x6B, 0x2D, 0xFF, 0xE4, 0x35, 0xF0,
-0xC3, 0x13, 0xFE, 0xEF, 0x13, 0xFF, 0x90, 0x96,
-0x88, 0xE0, 0xB1, 0x89, 0x90, 0x96, 0x91, 0xE0,
-0xFF, 0x90, 0x96, 0x8C, 0xE0, 0xFE, 0xD3, 0x9F,
-0x40, 0x0C, 0x90, 0x96, 0x89, 0xE0, 0x54, 0x80,
-0xFD, 0xEF, 0x4D, 0xF0, 0x80, 0x0F, 0x90, 0x96,
-0x92, 0xE0, 0xFF, 0xEE, 0xC3, 0x9F, 0x50, 0x05,
-0x90, 0x96, 0x89, 0xEF, 0xF0, 0x90, 0x96, 0x89,
-0xE0, 0xFE, 0x54, 0x7F, 0x90, 0x96, 0x8C, 0xF0,
-0xEE, 0x54, 0x80, 0x90, 0x96, 0x8F, 0xF0, 0x90,
-0x96, 0x8A, 0xE0, 0x70, 0x24, 0xA3, 0x91, 0x3A,
-0xC0, 0x83, 0xC0, 0x82, 0xE0, 0xFF, 0x90, 0x96,
-0x8D, 0x31, 0x0D, 0x80, 0x02, 0xC3, 0x33, 0xD8,
-0xFC, 0xF4, 0x5F, 0xD0, 0x82, 0xD0, 0x83, 0xF0,
-0x90, 0x96, 0x8E, 0xE0, 0x54, 0x7F, 0xF0, 0x80,
-0x41, 0x90, 0x96, 0x8B, 0x91, 0x3A, 0xC0, 0x83,
-0xC0, 0x82, 0xE0, 0xFF, 0x90, 0x96, 0x8D, 0x31,
-0x0D, 0x80, 0x02, 0xC3, 0x33, 0xD8, 0xFC, 0x4F,
-0xD0, 0x82, 0xD0, 0x83, 0xF0, 0x90, 0x96, 0x88,
-0xE0, 0x71, 0x60, 0xE0, 0x54, 0x07, 0xFF, 0x90,
-0x96, 0x8E, 0xF0, 0x90, 0x89, 0x46, 0x91, 0x29,
-0xF5, 0x82, 0x12, 0x97, 0x70, 0x33, 0x33, 0x33,
-0x54, 0xF8, 0x4F, 0x90, 0x96, 0x8E, 0xF0, 0x44,
-0x80, 0xF0, 0x90, 0x96, 0x89, 0x91, 0x21, 0x71,
-0x7C, 0xEF, 0xF0, 0xEE, 0x70, 0x05, 0x90, 0x01,
-0xC8, 0xEF, 0xF0, 0x90, 0x96, 0x8E, 0x91, 0x21,
-0x71, 0x60, 0xEF, 0xF0, 0xEE, 0x91, 0x07, 0xE0,
-0x54, 0xFC, 0xFF, 0x90, 0x96, 0x93, 0xE0, 0x54,
-0x03, 0x4F, 0xFE, 0x90, 0x96, 0x88, 0xE0, 0xFF,
-0x91, 0x07, 0xEE, 0xF0, 0x7D, 0x01, 0x12, 0x61,
-0xF7, 0xD0, 0xD0, 0x92, 0xAF, 0x22, 0xE5, 0x62,
-0xC4, 0x54, 0xF0, 0x24, 0x01, 0xF5, 0x82, 0xE4,
-0x34, 0x81, 0xF5, 0x83, 0x22, 0x74, 0xB6, 0x25,
-0x0E, 0xF5, 0x82, 0xE4, 0x34, 0x8E, 0xF5, 0x83,
-0xE4, 0xF0, 0xE5, 0x0E, 0xC4, 0x54, 0xF0, 0x24,
-0x00, 0xF5, 0x82, 0xE4, 0x34, 0x81, 0xF5, 0x83,
-0x22, 0x8D, 0x0E, 0xEF, 0x30, 0xE6, 0x1E, 0x71,
-0x7A, 0x91, 0x03, 0xE0, 0x54, 0x03, 0x90, 0x92,
-0x80, 0xF0, 0xE4, 0xFB, 0xAF, 0x0E, 0x12, 0x75,
-0x80, 0x71, 0x6D, 0xE0, 0x90, 0x92, 0x5E, 0xF0,
-0xA3, 0x74, 0x01, 0x80, 0x4D, 0x91, 0x14, 0x04,
-0xF0, 0x91, 0x14, 0x64, 0x02, 0x70, 0x1B, 0x74,
-0x1E, 0x25, 0x0E, 0x91, 0xA4, 0xE0, 0xFD, 0xF4,
-0x60, 0x02, 0x80, 0x04, 0x71, 0x7A, 0xE0, 0xFD,
-0x91, 0x05, 0x91, 0x45, 0x71, 0x7A, 0x91, 0x31,
-0x80, 0x28, 0x91, 0x14, 0xD3, 0x94, 0x03, 0x40,
-0x17, 0x90, 0x8A, 0xB3, 0x12, 0x8D, 0x28, 0xAF,
-0x0E, 0x12, 0x04, 0x7E, 0x71, 0x6D, 0xE0, 0x90,
-0x92, 0x5E, 0xF0, 0xA3, 0x74, 0x03, 0x80, 0x0A,
-0x71, 0x7A, 0x91, 0x03, 0x91, 0x45, 0x71, 0x7A,
-0x91, 0x31, 0xF0, 0xAB, 0x0E, 0xE4, 0xFD, 0xFF,
-0x02, 0x6F, 0x75, 0xE0, 0xFD, 0xE5, 0x0E, 0xC4,
-0x54, 0xF0, 0x24, 0x05, 0xF5, 0x82, 0xE4, 0x34,
-0x81, 0xF5, 0x83, 0x22, 0x74, 0xB6, 0x25, 0x0E,
-0xF5, 0x82, 0xE4, 0x34, 0x8E, 0xF5, 0x83, 0xE0,
-0x22, 0xE0, 0xFF, 0x90, 0x96, 0x88, 0xE0, 0xFE,
-0x22, 0x12, 0x86, 0x6D, 0x90, 0x96, 0x8C, 0xE0,
-0x22, 0xE0, 0x90, 0x92, 0x5E, 0xF0, 0xA3, 0x74,
-0x02, 0x22, 0xE0, 0x24, 0x6F, 0xF5, 0x82, 0xE4,
-0x34, 0x8D, 0xF5, 0x83, 0x22, 0xE0, 0x54, 0x03,
-0x90, 0x92, 0x80, 0xF0, 0x7B, 0x01, 0xAF, 0x0E,
-0x02, 0x75, 0x80, 0xD3, 0x10, 0xAF, 0x01, 0xC3,
-0xC0, 0xD0, 0x90, 0x96, 0xCE, 0xEF, 0xF0, 0xA3,
-0xED, 0xF0, 0x90, 0x8A, 0xF9, 0x12, 0x8D, 0x28,
-0x7D, 0x44, 0x7F, 0x6F, 0x12, 0x04, 0x7E, 0x90,
-0x8A, 0xFD, 0x12, 0x8B, 0x95, 0x90, 0x96, 0xCF,
-0xE0, 0x90, 0x96, 0xCE, 0xB4, 0x01, 0x09, 0xE0,
-0x91, 0x07, 0xE0, 0x44, 0x04, 0xF0, 0x80, 0x07,
-0xE0, 0x91, 0x07, 0xE0, 0x54, 0xFB, 0xF0, 0x90,
-0x8A, 0xF9, 0x12, 0x8D, 0x28, 0xF1, 0xB0, 0xD0,
-0xD0, 0x92, 0xAF, 0x22, 0x7D, 0x01, 0x80, 0xB3,
-0x74, 0x1E, 0x25, 0x70, 0xF5, 0x82, 0xE4, 0x34,
-0x96, 0xF5, 0x83, 0x22, 0x8F, 0x70, 0x8D, 0x71,
-0xEF, 0x71, 0x7C, 0xE0, 0xFD, 0x54, 0x7F, 0xF5,
-0x72, 0xED, 0x54, 0x80, 0xF5, 0x73, 0xD1, 0x50,
-0xF5, 0x75, 0x75, 0xF0, 0x12, 0xEF, 0x12, 0x9F,
-0xCD, 0xC4, 0x54, 0x03, 0xF5, 0x76, 0x91, 0xA0,
-0x74, 0xFF, 0xF0, 0xB1, 0x73, 0xE5, 0x73, 0x4D,
-0xFF, 0xB1, 0x67, 0xEF, 0xF0, 0xE5, 0x70, 0x91,
-0x07, 0xE0, 0x54, 0x03, 0xF5, 0x74, 0x74, 0x46,
-0x25, 0x70, 0xD1, 0x5C, 0xE5, 0x74, 0xF0, 0xE5,
-0x72, 0x65, 0x75, 0x70, 0x23, 0x75, 0xF0, 0x12,
-0xE5, 0x70, 0x12, 0x9F, 0x4B, 0xC4, 0x13, 0x54,
-0x07, 0x30, 0xE0, 0x0B, 0xE5, 0x73, 0x70, 0x07,
-0xE5, 0x72, 0x44, 0x80, 0xFD, 0x80, 0x4B, 0xB1,
-0x73, 0x7D, 0x07, 0xAF, 0x70, 0x02, 0xCF, 0x4C,
-0xE5, 0x72, 0xC3, 0x95, 0x75, 0x50, 0x35, 0xAB,
-0x70, 0xAD, 0x75, 0xAF, 0x72, 0x12, 0x72, 0x7F,
-0xAD, 0x07, 0xE5, 0x72, 0xC3, 0x94, 0x0C, 0x40,
-0x29, 0x75, 0xF0, 0x12, 0xE5, 0x70, 0x12, 0x9F,
-0x4B, 0xFE, 0xC4, 0x13, 0x54, 0x07, 0x30, 0xE0,
-0x19, 0xE5, 0x71, 0x60, 0x15, 0xE5, 0x73, 0x70,
-0x11, 0xE5, 0x72, 0x44, 0x80, 0xFD, 0x91, 0xA0,
-0xEF, 0xF0, 0x80, 0x06, 0xB1, 0x67, 0xE5, 0x75,
-0xF0, 0xFD, 0x90, 0x92, 0x80, 0xE5, 0x74, 0xF0,
-0xAB, 0x71, 0xAF, 0x70, 0x02, 0x75, 0x80, 0x74,
-0xC6, 0x25, 0x70, 0xF5, 0x82, 0xE4, 0x34, 0x8E,
-0xF5, 0x83, 0x22, 0xE5, 0x72, 0x25, 0xE0, 0x24,
-0x75, 0xF5, 0x82, 0xE4, 0x34, 0x81, 0xF5, 0x83,
-0xE4, 0x93, 0xFE, 0x74, 0x01, 0x93, 0xFF, 0xE5,
-0x70, 0x25, 0xE0, 0x24, 0x75, 0xF5, 0x82, 0xE4,
-0x34, 0x8D, 0xF5, 0x83, 0xEE, 0xF0, 0xA3, 0xEF,
-0xF0, 0x22, 0xAA, 0x07, 0xA9, 0x05, 0xEA, 0x71,
-0x7C, 0xE0, 0xF5, 0x70, 0x54, 0x7F, 0xF5, 0x72,
-0x75, 0xF0, 0x12, 0xEA, 0xD1, 0x67, 0xE0, 0x90,
-0x95, 0x48, 0xF0, 0x75, 0xF0, 0x12, 0xEA, 0xD1,
-0x54, 0xFF, 0xEA, 0x91, 0x07, 0xE0, 0x54, 0x03,
-0xF5, 0x71, 0xE5, 0x72, 0x90, 0x81, 0x9D, 0x93,
-0xFD, 0xEA, 0x25, 0xE0, 0x24, 0x75, 0xF5, 0x82,
-0xE4, 0x34, 0x8D, 0xF5, 0x83, 0xE4, 0xF0, 0xA3,
-0xED, 0xF0, 0x75, 0xF0, 0x12, 0xEA, 0x12, 0x9F,
-0xCD, 0xFE, 0xC4, 0x54, 0x03, 0x90, 0x95, 0x47,
-0xF0, 0x74, 0xC6, 0x2A, 0xB1, 0x6B, 0xE5, 0x72,
-0xF0, 0x74, 0x46, 0x2A, 0xD1, 0x5C, 0xE5, 0x71,
-0xF0, 0xE5, 0x72, 0xD3, 0x9F, 0x40, 0x04, 0x8F,
-0x72, 0x8F, 0x70, 0x89, 0x73, 0xE4, 0xFF, 0xEF,
-0xC3, 0x95, 0x73, 0x50, 0x34, 0xE5, 0x70, 0x30,
-0xE7, 0x09, 0x85, 0x72, 0x70, 0x19, 0xE9, 0x70,
-0x25, 0x80, 0x26, 0x90, 0x95, 0x48, 0xE0, 0xFD,
-0xE5, 0x72, 0xD3, 0x9D, 0x40, 0x10, 0xAB, 0x02,
-0x90, 0x95, 0x4C, 0xE9, 0xF0, 0xAF, 0x72, 0x12,
-0xB7, 0x12, 0x8F, 0x70, 0x80, 0x0B, 0x90, 0x95,
-0x48, 0xE0, 0xF5, 0x70, 0x80, 0x03, 0x0F, 0x80,
-0xC6, 0xAF, 0x02, 0x90, 0x92, 0x80, 0xE5, 0x71,
-0xF0, 0xE4, 0xFB, 0xAD, 0x70, 0x02, 0x75, 0x80,
-0x75, 0xF0, 0x12, 0xEF, 0x90, 0x89, 0x4F, 0x12,
-0x04, 0x6E, 0xE0, 0x22, 0xF5, 0x82, 0xE4, 0x34,
-0x8E, 0xF5, 0x83, 0x22, 0x75, 0xF0, 0x12, 0x90,
-0x89, 0x50, 0x02, 0x04, 0x6E, 0xE6, 0xFD, 0xAF,
-0x62, 0xEF, 0x71, 0x60, 0xE0, 0x54, 0xF8, 0xF5,
-0x70, 0xED, 0x42, 0x70, 0xEF, 0x71, 0x60, 0xE5,
-0x70, 0xF0, 0x22, 0x90, 0x88, 0x36, 0xE0, 0x60,
-0x14, 0x90, 0x06, 0x92, 0xE0, 0x30, 0xE1, 0x08,
-0x90, 0x8B, 0x01, 0x12, 0x8B, 0x95, 0x80, 0x05,
-0x12, 0xDE, 0x09, 0xD1, 0x9F, 0x21, 0xE3, 0xF1,
-0x04, 0x8C, 0x83, 0x7D, 0x01, 0x02, 0x04, 0x7E,
-0x90, 0x94, 0xA1, 0xE0, 0xB4, 0x01, 0x14, 0xE4,
-0xF0, 0x90, 0x01, 0x5B, 0xF0, 0x90, 0x92, 0x20,
-0xF0, 0x90, 0x88, 0x95, 0xE0, 0xC3, 0x13, 0x54,
-0x7F, 0x31, 0xD5, 0x90, 0x88, 0x31, 0xE0, 0xFF,
-0xC4, 0x13, 0x13, 0x54, 0x03, 0x30, 0xE0, 0x33,
-0xEF, 0x54, 0xBF, 0x12, 0xCB, 0x98, 0x30, 0xE0,
-0x06, 0xE0, 0x44, 0x01, 0xF0, 0x80, 0x09, 0xE0,
-0x54, 0xFE, 0x12, 0xCB, 0xAB, 0x74, 0x04, 0xF0,
-0x90, 0x88, 0xA3, 0xE0, 0xFF, 0xC4, 0x13, 0x54,
-0x07, 0x30, 0xE0, 0x0D, 0x90, 0x8A, 0xB9, 0x12,
-0x8D, 0x28, 0x7D, 0x01, 0x7F, 0x0C, 0x02, 0x04,
-0x7E, 0xD1, 0x9F, 0x22, 0x90, 0x88, 0x38, 0xE0,
-0xFF, 0x90, 0x8A, 0xB9, 0xE0, 0xFC, 0xA3, 0xE0,
-0xF5, 0x82, 0x22, 0xE4, 0xFF, 0x12, 0x78, 0x4A,
-0xBF, 0x01, 0x0E, 0x90, 0x88, 0x36, 0xE0, 0x60,
-0x08, 0xF1, 0x2A, 0x54, 0x07, 0x70, 0x02, 0xD1,
-0x9F, 0x22, 0x90, 0x88, 0x3A, 0xE0, 0x54, 0xFE,
-0xF0, 0x22, 0xE4, 0xF5, 0x77, 0x90, 0x06, 0xA9,
-0xE0, 0xF5, 0x77, 0x54, 0xC0, 0x70, 0x10, 0xF1,
-0x2A, 0x54, 0xFD, 0xF0, 0xD1, 0x9F, 0x90, 0x88,
-0x39, 0xE0, 0x60, 0x48, 0x02, 0xAF, 0xD8, 0xE5,
-0x77, 0x30, 0xE6, 0x21, 0x90, 0x88, 0x36, 0xE0,
-0x64, 0x01, 0x70, 0x1B, 0x90, 0x88, 0x3A, 0xE0,
-0x44, 0x01, 0x12, 0xAF, 0x57, 0x64, 0x02, 0x60,
-0x08, 0x90, 0x8A, 0xE1, 0x12, 0x8B, 0x95, 0x80,
-0x06, 0xF1, 0xB6, 0x80, 0x02, 0xF1, 0x2A, 0xE5,
-0x77, 0x90, 0x88, 0x3A, 0x30, 0xE7, 0x11, 0xE0,
-0x44, 0x02, 0xF0, 0x12, 0xDD, 0xE7, 0xF1, 0x9D,
-0x90, 0x88, 0x31, 0xE0, 0x44, 0x04, 0xF0, 0x22,
-0xE0, 0x54, 0xFD, 0xF0, 0x22, 0xE4, 0x90, 0x92,
-0x20, 0xF0, 0x90, 0x93, 0x2B, 0xE0, 0x90, 0x92,
-0x21, 0xF0, 0xE4, 0xFB, 0xFD, 0x7F, 0x54, 0x7E,
-0x01, 0x02, 0x66, 0x33, 0xE4, 0xFD, 0x81, 0x53,
-0xE4, 0xFD, 0xFF, 0x02, 0x04, 0x7E, 0x90, 0x94,
-0xA1, 0x74, 0x01, 0xF0, 0x90, 0x06, 0x92, 0x04,
-0xF0, 0x90, 0x01, 0x3C, 0x74, 0x04, 0xF0, 0x90,
-0x88, 0x31, 0xE0, 0x44, 0x08, 0xF0, 0x90, 0x88,
-0x39, 0xE0, 0x64, 0x0C, 0x60, 0x11, 0x90, 0x8A,
-0xB9, 0x12, 0x8D, 0x28, 0x12, 0x9F, 0xDE, 0x90,
-0x8A, 0xF9, 0x12, 0x8D, 0x28, 0xF1, 0xB0, 0x90,
-0x8A, 0xAF, 0x12, 0x8D, 0x28, 0x7D, 0x08, 0xE4,
-0xFF, 0x02, 0x04, 0x7E, 0x12, 0x02, 0x06, 0x54,
-0x01, 0xFF, 0x90, 0x93, 0x5C, 0xE0, 0x54, 0xFE,
-0x4F, 0xF0, 0x22, 0x12, 0x02, 0x06, 0x90, 0x88,
-0x9C, 0xF0, 0x60, 0x39, 0xA3, 0xE0, 0x20, 0xE0,
-0x34, 0x90, 0x8A, 0xB9, 0x12, 0x8D, 0x28, 0xE4,
-0xFD, 0x7F, 0x04, 0x12, 0x04, 0x7E, 0x90, 0x88,
-0x9B, 0xE0, 0xFF, 0xC3, 0x13, 0x30, 0xE0, 0x1D,
-0xEF, 0x13, 0x13, 0x13, 0x54, 0x1F, 0x20, 0xE0,
-0x14, 0x90, 0x88, 0x9B, 0xE0, 0x13, 0x13, 0x54,
-0x3F, 0x30, 0xE0, 0x04, 0x7F, 0x0D, 0x80, 0x02,
-0x7F, 0x09, 0x12, 0x71, 0x9A, 0x22, 0x12, 0xC2,
-0x0D, 0xFF, 0x54, 0x01, 0xFE, 0x90, 0x93, 0x29,
-0x12, 0xDD, 0x8E, 0xF1, 0xCA, 0x12, 0xDD, 0xDE,
-0x90, 0x93, 0x29, 0x12, 0xDD, 0xC0, 0x90, 0x05,
-0x52, 0xE0, 0x54, 0x07, 0x90, 0x94, 0xB6, 0x60,
-0x16, 0x12, 0x86, 0x6D, 0x12, 0x87, 0xE7, 0xFD,
-0x90, 0x05, 0x56, 0xE0, 0xC3, 0x9D, 0x90, 0x93,
-0x2B, 0xF0, 0xA3, 0xED, 0xF0, 0x80, 0x26, 0x12,
-0x86, 0x6D, 0x12, 0x87, 0xE7, 0xFB, 0xFF, 0x90,
-0x05, 0x54, 0xE0, 0xC3, 0x9F, 0xFF, 0xE4, 0x94,
-0x00, 0xFE, 0x7C, 0x00, 0x7D, 0x05, 0x12, 0x02,
-0x92, 0x90, 0x93, 0x2B, 0xEF, 0xF0, 0xEB, 0x75,
-0xF0, 0x05, 0x84, 0xA3, 0xF0, 0x12, 0x88, 0xD3,
-0x12, 0x02, 0x06, 0x20, 0xE0, 0x13, 0x12, 0x8B,
-0x92, 0x90, 0x8A, 0xF9, 0x12, 0x8D, 0x28, 0x12,
-0xA7, 0xB0, 0x90, 0x01, 0x57, 0xE4, 0xF0, 0x80,
-0x0A, 0x90, 0x8A, 0x89, 0x12, 0x8D, 0x28, 0x31,
-0x0B, 0x31, 0x3E, 0x12, 0xC6, 0x7E, 0x20, 0xE0,
-0x04, 0xEF, 0x44, 0x20, 0xF0, 0x31, 0x37, 0x30,
-0xE0, 0x19, 0x90, 0x88, 0x36, 0x74, 0x01, 0xF0,
-0xE4, 0x90, 0x88, 0x38, 0xF0, 0xF1, 0xE0, 0x12,
-0xCB, 0xB6, 0x90, 0x92, 0x98, 0x74, 0x06, 0xF0,
-0x02, 0x6E, 0x2F, 0xE4, 0x90, 0x88, 0x36, 0xF0,
-0x90, 0x88, 0x38, 0x74, 0x0C, 0xF0, 0x90, 0x88,
-0x31, 0xE0, 0x54, 0xFE, 0xF0, 0xA3, 0xE0, 0x54,
-0xFB, 0xF0, 0x22, 0x7D, 0x0C, 0x7F, 0x01, 0x02,
-0x04, 0x7E, 0x90, 0x93, 0x29, 0xE0, 0x30, 0xE0,
-0x1D, 0x90, 0x01, 0x57, 0xE4, 0xF0, 0x90, 0x8A,
-0xF9, 0x12, 0x8D, 0x28, 0x12, 0x8B, 0x8C, 0x31,
-0x37, 0x30, 0xE0, 0x08, 0x90, 0x8A, 0x89, 0x12,
-0x8D, 0x28, 0x31, 0x0B, 0x31, 0x3E, 0x22, 0x90,
-0x93, 0x29, 0xE0, 0xC3, 0x13, 0x22, 0x90, 0x93,
-0x29, 0xE0, 0x44, 0x10, 0xF0, 0x22, 0x31, 0x5E,
-0xE4, 0xFF, 0x31, 0xCF, 0x90, 0x93, 0x03, 0xE0,
-0x30, 0xE0, 0x03, 0x12, 0xBD, 0x18, 0x90, 0x8B,
-0x07, 0x12, 0x8B, 0x95, 0x80, 0xB4, 0xE4, 0xF5,
-0x77, 0x90, 0x88, 0x36, 0xE0, 0x60, 0x4E, 0x51,
-0x63, 0x70, 0x4A, 0xF1, 0xA2, 0x75, 0x77, 0x01,
-0xE5, 0x77, 0x60, 0x41, 0x90, 0x88, 0x39, 0xE0,
-0x20, 0xE2, 0x08, 0x90, 0x8A, 0xB9, 0x12, 0x8D,
-0x28, 0x51, 0x54, 0x51, 0x5B, 0x90, 0x88, 0x3F,
-0xE0, 0x60, 0x04, 0x64, 0x01, 0x70, 0x10, 0x31,
-0xB6, 0xFF, 0xA3, 0xE0, 0x2F, 0x12, 0xA7, 0x9E,
-0x31, 0xBB, 0xFF, 0xA3, 0xE0, 0x80, 0x0C, 0x31,
-0xB6, 0x31, 0xC5, 0x2F, 0x12, 0xA7, 0x9E, 0x31,
-0xBB, 0x31, 0xC5, 0x2F, 0x33, 0x33, 0x33, 0x54,
-0xF8, 0x90, 0x88, 0x4F, 0xF0, 0x22, 0xE4, 0x90,
-0x92, 0x20, 0xF0, 0x90, 0x88, 0x3E, 0xE0, 0x13,
-0x13, 0x13, 0x54, 0x1F, 0x22, 0xFF, 0xA3, 0xE0,
-0x75, 0xF0, 0x03, 0xA4, 0x24, 0xFE, 0x22, 0xD3,
-0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0x90, 0x88,
-0x33, 0xE0, 0xC3, 0x13, 0x30, 0xE0, 0x27, 0x90,
-0x96, 0x33, 0x74, 0x1E, 0xF0, 0x90, 0x96, 0x55,
-0x74, 0x01, 0xF0, 0x90, 0x96, 0x35, 0xEF, 0xF0,
-0x7B, 0x01, 0x7A, 0x96, 0x79, 0x33, 0xF1, 0x87,
-0x12, 0x04, 0x7E, 0x90, 0x8A, 0xE5, 0x12, 0x8D,
-0x28, 0x7F, 0x04, 0x12, 0x04, 0x7E, 0xD0, 0xD0,
-0x92, 0xAF, 0x22, 0x51, 0x1B, 0xF1, 0xD1, 0x7F,
-0x01, 0x31, 0xCF, 0x90, 0x8B, 0x07, 0xD1, 0xEE,
-0x02, 0x04, 0x7A, 0xE4, 0x90, 0x95, 0xE8, 0xF0,
-0x90, 0x88, 0x36, 0xE0, 0x60, 0x2D, 0x51, 0x63,
-0x70, 0x29, 0xF1, 0xE8, 0xF0, 0xF1, 0xA2, 0x90,
-0x95, 0xE8, 0x74, 0x01, 0xF0, 0xE4, 0x90, 0x88,
-0x3D, 0xF0, 0x04, 0x60, 0x16, 0x90, 0x88, 0x39,
-0xE0, 0x20, 0xE2, 0x08, 0x90, 0x8A, 0xB9, 0x12,
-0x8D, 0x28, 0x51, 0x54, 0x51, 0x5B, 0x31, 0xB6,
-0x12, 0xA7, 0x9E, 0x22, 0x7D, 0x01, 0x7F, 0x04,
-0x02, 0x04, 0x7E, 0x90, 0x88, 0x3A, 0xE0, 0x44,
-0x10, 0xF0, 0x22, 0xE4, 0xFF, 0x12, 0x78, 0x4A,
-0xEF, 0x64, 0x01, 0x22, 0x51, 0x63, 0x70, 0x15,
-0x90, 0x88, 0x36, 0xE0, 0x60, 0x0F, 0x90, 0x88,
-0x3A, 0xE0, 0x20, 0xE4, 0x08, 0xF1, 0x7B, 0x12,
-0xDD, 0xE7, 0x12, 0xA7, 0x9D, 0x22, 0x51, 0x63,
-0x70, 0x1B, 0x90, 0x88, 0x36, 0xE0, 0x60, 0x15,
-0x90, 0x88, 0x3A, 0xE0, 0x20, 0xE4, 0x0E, 0xF1,
-0x7B, 0x90, 0x88, 0x31, 0xE0, 0x12, 0xC6, 0x9C,
-0x70, 0x03, 0x12, 0xA6, 0x9F, 0x22, 0xC0, 0xE0,
-0xC0, 0xF0, 0xC0, 0x83, 0xC0, 0x82, 0xC0, 0xD0,
-0x75, 0xD0, 0x00, 0xC0, 0x00, 0xC0, 0x01, 0xC0,
-0x02, 0xC0, 0x03, 0xC0, 0x04, 0xC0, 0x05, 0xC0,
-0x06, 0xC0, 0x07, 0x90, 0x01, 0xC4, 0x74, 0xA6,
-0xF0, 0x74, 0xAA, 0xA3, 0xF0, 0x12, 0x64, 0x7F,
-0xE5, 0x30, 0x30, 0xE1, 0x02, 0xF1, 0x5F, 0xE5,
-0x2D, 0x30, 0xE1, 0x02, 0x71, 0x6E, 0xE5, 0x2D,
-0x30, 0xE3, 0x03, 0x12, 0xD8, 0x35, 0xE5, 0x2D,
-0x30, 0xE4, 0x03, 0x12, 0xD8, 0x48, 0xE5, 0x2D,
-0x30, 0xE5, 0x03, 0x12, 0xD8, 0x59, 0xE5, 0x2F,
-0x30, 0xE0, 0x02, 0x31, 0x46, 0xE5, 0x2F, 0x30,
-0xE1, 0x03, 0x12, 0x8E, 0xD2, 0xE5, 0x2F, 0x30,
-0xE2, 0x03, 0x12, 0x9F, 0x53, 0xE5, 0x2F, 0x30,
-0xE3, 0x02, 0x51, 0x6C, 0xE5, 0x2F, 0x30, 0xE4,
-0x02, 0x51, 0x86, 0xE5, 0x2F, 0x30, 0xE5, 0x02,
-0xF1, 0x22, 0xE5, 0x2F, 0x30, 0xE6, 0x03, 0x12,
-0xA7, 0x13, 0xE5, 0x2F, 0x30, 0xE7, 0x03, 0x12,
-0xD8, 0x95, 0xE5, 0x30, 0x30, 0xE0, 0x03, 0x12,
-0xD8, 0xB3, 0xE5, 0x30, 0x30, 0xE4, 0x02, 0x71,
-0xF6, 0xE5, 0x30, 0x30, 0xE5, 0x02, 0xD1, 0xE6,
-0x74, 0xA6, 0x04, 0x90, 0x01, 0xC4, 0xF0, 0x74,
-0xAA, 0xA3, 0xF0, 0xD0, 0x07, 0xD0, 0x06, 0xD0,
-0x05, 0xD0, 0x04, 0xD0, 0x03, 0xD0, 0x02, 0xD0,
-0x01, 0xD0, 0x00, 0xD0, 0xD0, 0xD0, 0x82, 0xD0,
-0x83, 0xD0, 0xF0, 0xD0, 0xE0, 0x32, 0xE4, 0xFF,
-0x90, 0x95, 0xC3, 0xEF, 0xF0, 0x90, 0x04, 0x7E,
-0xE0, 0xFF, 0xA3, 0xE0, 0x90, 0x95, 0xE7, 0xF0,
-0xE0, 0xFE, 0x6F, 0x60, 0x70, 0x90, 0x95, 0xC4,
-0x74, 0x03, 0xF0, 0x90, 0x95, 0xE6, 0x74, 0x08,
-0xF0, 0xEE, 0x04, 0x54, 0x0F, 0xFF, 0xE4, 0xFE,
-0xEF, 0x75, 0xF0, 0x08, 0xA4, 0x24, 0x00, 0xF5,
-0x82, 0xE4, 0x34, 0x80, 0xF5, 0x83, 0xE5, 0x82,
-0x2E, 0xB1, 0x4D, 0xE0, 0xFD, 0x74, 0xC6, 0x2E,
-0xF5, 0x82, 0xE4, 0x34, 0x95, 0xF5, 0x83, 0xED,
-0xF0, 0x0E, 0xEE, 0xB4, 0x08, 0xDA, 0x7B, 0x01,
-0x7A, 0x95, 0x79, 0xC4, 0xF1, 0x87, 0x12, 0x04,
-0x7E, 0x90, 0x95, 0xE7, 0xE0, 0x04, 0x54, 0x0F,
-0xFF, 0xF0, 0xBF, 0x0F, 0x02, 0xE4, 0xF0, 0x90,
-0x95, 0xE7, 0xE0, 0x90, 0x04, 0x7F, 0xF0, 0x90,
-0x95, 0xC3, 0xE0, 0x70, 0x05, 0x90, 0x8A, 0xE5,
-0x80, 0x03, 0x90, 0x8A, 0x79, 0x12, 0x8D, 0x28,
-0x7F, 0x04, 0x12, 0x04, 0x7E, 0x22, 0xE4, 0xFF,
-0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0x90,
-0x96, 0x56, 0xEF, 0xF0, 0x90, 0x88, 0x2B, 0xE0,
-0x90, 0x96, 0x68, 0xF0, 0xE4, 0x90, 0x96, 0x57,
-0xF0, 0x90, 0x96, 0x68, 0xE0, 0xFE, 0x90, 0x96,
-0x57, 0xE0, 0xFF, 0xC3, 0x9E, 0x50, 0x2B, 0xE0,
-0xFE, 0xB1, 0x18, 0xE4, 0xF0, 0xEE, 0xF1, 0x95,
-0xE0, 0x30, 0xE7, 0x0A, 0x75, 0xF0, 0x12, 0xEF,
-0xB1, 0x22, 0xE4, 0xF0, 0x80, 0x0C, 0x12, 0x7C,
-0x8F, 0x90, 0x96, 0x57, 0xE0, 0xB1, 0x18, 0x74,
-0x01, 0xF0, 0x90, 0x96, 0x57, 0xE0, 0x04, 0xF0,
-0x80, 0xC7, 0x7F, 0x0C, 0x7E, 0x00, 0x12, 0x7C,
-0x6A, 0xE4, 0x90, 0x96, 0x57, 0xF0, 0x90, 0x96,
-0x68, 0xE0, 0xFF, 0x90, 0x96, 0x57, 0xE0, 0xFE,
-0xC3, 0x9F, 0x40, 0x02, 0xA1, 0x13, 0x74, 0x58,
-0x2E, 0xB1, 0x1A, 0xE0, 0x70, 0x02, 0xA1, 0x0B,
-0xEE, 0xC4, 0x54, 0xF0, 0x24, 0x06, 0xF5, 0x82,
-0xE4, 0x34, 0x81, 0xF5, 0x83, 0xE0, 0xFD, 0xEE,
-0xC4, 0x54, 0xF0, 0x24, 0x07, 0xF5, 0x82, 0xE4,
-0x34, 0x81, 0xF5, 0x83, 0xB1, 0x28, 0xFC, 0x75,
-0xF0, 0x12, 0x90, 0x89, 0x53, 0xB1, 0x31, 0xEC,
-0xC4, 0x54, 0xF0, 0x24, 0x0A, 0xF5, 0x82, 0xE4,
-0x34, 0x81, 0xF5, 0x83, 0xE0, 0xFD, 0xEC, 0xB1,
-0x3A, 0xB1, 0x28, 0x75, 0xF0, 0x12, 0x90, 0x89,
-0x57, 0xB1, 0x31, 0x7F, 0x01, 0x90, 0x96, 0x57,
-0xE0, 0xFE, 0xB1, 0x3A, 0xE5, 0x82, 0x2F, 0xB1,
-0x4D, 0xE0, 0xFD, 0x75, 0xF0, 0x12, 0xEE, 0x90,
-0x89, 0x57, 0x12, 0x04, 0x6E, 0x75, 0xF0, 0x02,
-0xEF, 0xD1, 0xDF, 0xED, 0xF0, 0x0F, 0xEF, 0xB4,
-0x05, 0xDB, 0x90, 0x96, 0x57, 0xE0, 0xFF, 0xC4,
-0x54, 0xF0, 0x24, 0x09, 0xF5, 0x82, 0xE4, 0x34,
-0x81, 0xF5, 0x83, 0xE0, 0xFE, 0x12, 0xCF, 0xA1,
-0xEE, 0xF0, 0x90, 0x96, 0x57, 0xE0, 0xFF, 0x90,
-0x96, 0x56, 0xE0, 0xFD, 0x12, 0x61, 0xF7, 0x90,
-0x96, 0x57, 0xE0, 0x75, 0xF0, 0x12, 0xB1, 0x22,
-0x74, 0x01, 0xF0, 0x90, 0x96, 0x57, 0xE0, 0x04,
-0xF0, 0x81, 0x56, 0xD0, 0xD0, 0x92, 0xAF, 0x22,
-0x24, 0x58, 0xF5, 0x82, 0xE4, 0x34, 0x96, 0xF5,
-0x83, 0x22, 0x90, 0x89, 0x56, 0x02, 0x04, 0x6E,
-0xE0, 0xFE, 0xED, 0xFF, 0x90, 0x96, 0x57, 0xE0,
-0x22, 0x12, 0x04, 0x6E, 0xEE, 0xF0, 0xA3, 0xEF,
-0xF0, 0x22, 0xC4, 0x54, 0xF0, 0x24, 0x0B, 0xF5,
-0x82, 0xE4, 0x34, 0x81, 0xF5, 0x83, 0x22, 0x12,
-0x04, 0x6E, 0xE5, 0x82, 0x2C, 0xF5, 0x82, 0xE4,
-0x35, 0x83, 0xF5, 0x83, 0x22, 0xE4, 0xFB, 0xFA,
-0xFD, 0x7F, 0x01, 0x12, 0x85, 0x4E, 0x90, 0x95,
-0x38, 0xEF, 0xF0, 0x60, 0xF0, 0x90, 0x86, 0xAF,
-0xE0, 0xFF, 0x70, 0x04, 0xA3, 0xE0, 0x60, 0xE5,
-0xC2, 0xAF, 0xEF, 0x30, 0xE0, 0x0E, 0x90, 0x86,
-0xAF, 0xE0, 0x54, 0xFE, 0xF0, 0xE4, 0xFF, 0x71,
-0xF8, 0x12, 0xD0, 0x29, 0xB1, 0xC8, 0xE0, 0x30,
-0xE1, 0x09, 0x54, 0xFD, 0xF0, 0x90, 0x86, 0x08,
-0x12, 0x8B, 0x95, 0xB1, 0xC8, 0xE0, 0x30, 0xE2,
-0x09, 0x54, 0xFB, 0xF0, 0x90, 0x86, 0x0A, 0x12,
-0x8B, 0x95, 0xB1, 0xC8, 0xE0, 0xFF, 0x30, 0xE5,
-0x0C, 0x54, 0xDF, 0xF0, 0x12, 0xBC, 0xE5, 0xBF,
-0x01, 0x03, 0x12, 0x92, 0x43, 0xB1, 0xC8, 0xE0,
-0x30, 0xE6, 0x09, 0x54, 0xBF, 0xF0, 0x90, 0x8A,
-0x7D, 0x12, 0x8B, 0x95, 0xD2, 0xAF, 0x80, 0x9D,
-0xD2, 0xAF, 0xC2, 0xAF, 0x90, 0x86, 0xAF, 0x22,
-0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0x90,
-0x01, 0xCC, 0xE0, 0x54, 0x0F, 0xFD, 0xED, 0x70,
-0x02, 0xC1, 0xBB, 0x90, 0x87, 0x0B, 0xE0, 0xFF,
-0x70, 0x06, 0xA3, 0xE0, 0x64, 0x09, 0x60, 0x0A,
-0xEF, 0x14, 0xFF, 0x90, 0x87, 0x0C, 0xE0, 0xB5,
-0x07, 0x04, 0x7F, 0x01, 0x80, 0x02, 0x7F, 0x00,
-0xEF, 0x60, 0x09, 0x90, 0x01, 0xC1, 0xE0, 0x44,
-0x01, 0xF0, 0xC1, 0xBB, 0x90, 0x96, 0xD7, 0xE0,
-0x12, 0xB7, 0x09, 0x80, 0x05, 0xC3, 0x33, 0xCE,
-0x33, 0xCE, 0xD8, 0xF9, 0xFF, 0xED, 0xFB, 0xEF,
-0x5B, 0x60, 0x7B, 0xE4, 0xFC, 0xD1, 0xC1, 0xA4,
-0xFF, 0xEC, 0x7A, 0x00, 0x2F, 0xFF, 0xEA, 0x35,
-0xF0, 0xFE, 0x74, 0xD0, 0xD1, 0xD4, 0x90, 0x87,
-0x0C, 0xE0, 0xF9, 0x75, 0xF0, 0x08, 0x90, 0x86,
-0xBB, 0xB1, 0x47, 0xEF, 0xD1, 0xC0, 0xA4, 0xFF,
-0xEC, 0x2F, 0xFF, 0xEA, 0x35, 0xF0, 0xFE, 0x74,
-0xF0, 0xD1, 0xD4, 0x75, 0xF0, 0x08, 0xE9, 0x90,
-0x86, 0xBF, 0xB1, 0x47, 0xEF, 0xF0, 0x0C, 0xEC,
-0xB4, 0x04, 0xC2, 0xD1, 0xC9, 0x80, 0x02, 0xC3,
-0x33, 0xD8, 0xFC, 0xF4, 0x5D, 0xFD, 0xD1, 0xC9,
-0x80, 0x02, 0xC3, 0x33, 0xD8, 0xFC, 0x90, 0x01,
-0xCC, 0xF0, 0x90, 0x96, 0xD7, 0xE0, 0x04, 0xF0,
-0xE0, 0x54, 0x03, 0xF0, 0x90, 0x87, 0x0C, 0xE0,
-0x04, 0xF0, 0xE0, 0x7F, 0x00, 0xB4, 0x0A, 0x02,
-0x7F, 0x01, 0xEF, 0x70, 0x02, 0xA1, 0xDE, 0xE4,
-0x90, 0x87, 0x0C, 0xF0, 0xA1, 0xDE, 0x90, 0x01,
-0xC0, 0xE0, 0x44, 0x02, 0xF0, 0x90, 0x96, 0xD7,
-0xE0, 0x44, 0x80, 0x90, 0x00, 0x8A, 0xD1, 0xC0,
-0x90, 0x01, 0xD0, 0x12, 0x04, 0x6E, 0xE0, 0x90,
-0x01, 0xC3, 0xF0, 0xD0, 0xD0, 0x92, 0xAF, 0x22,
-0xF0, 0x90, 0x96, 0xD7, 0xE0, 0x75, 0xF0, 0x04,
-0x22, 0x90, 0x96, 0xD7, 0xE0, 0xFF, 0x74, 0x01,
-0xA8, 0x07, 0x08, 0x22, 0x2F, 0xF5, 0x82, 0x74,
-0x01, 0x3E, 0xF5, 0x83, 0xE0, 0xFF, 0x22, 0x12,
-0x04, 0x6E, 0xE4, 0xF0, 0xA3, 0x22, 0x90, 0x8A,
-0xDF, 0xD1, 0xEE, 0x02, 0x04, 0x7A, 0xE0, 0xFE,
-0xA3, 0xE0, 0xAA, 0x06, 0xF9, 0x22, 0x90, 0x88,
-0x36, 0xE0, 0x64, 0x01, 0x70, 0x23, 0xF1, 0x58,
-0x60, 0x11, 0x90, 0x8A, 0xB9, 0x12, 0x8D, 0x28,
-0x12, 0x9F, 0xDE, 0x90, 0x8B, 0x01, 0xD1, 0xEE,
-0x02, 0x04, 0x7A, 0x90, 0x88, 0x39, 0xE0, 0x70,
-0x08, 0x90, 0x8A, 0xB9, 0x12, 0x8D, 0x28, 0x51,
-0x54, 0x22, 0x90, 0x88, 0x9D, 0xE0, 0x30, 0xE0,
-0x0E, 0x90, 0x94, 0xAE, 0xE0, 0xFF, 0x12, 0x9D,
-0xD0, 0x30, 0xE0, 0x03, 0x02, 0x9F, 0x99, 0xE4,
-0xFF, 0x12, 0x78, 0x4A, 0xBF, 0x01, 0x17, 0x90,
-0x88, 0x36, 0xE0, 0x60, 0x11, 0xF1, 0x58, 0x64,
-0x02, 0x60, 0x08, 0x90, 0x8A, 0xE1, 0xD1, 0xEE,
-0x02, 0x04, 0x7A, 0x12, 0x73, 0x8F, 0x22, 0xF0,
-0x90, 0x88, 0x34, 0xE0, 0x54, 0x0F, 0x22, 0x90,
-0x88, 0x36, 0xE0, 0x60, 0x02, 0xF1, 0x68, 0x22,
-0x90, 0x88, 0x39, 0xE0, 0xB4, 0x04, 0x02, 0xF1,
-0xD8, 0x90, 0x88, 0x9D, 0xE0, 0x20, 0xE0, 0x02,
-0xD1, 0xF6, 0x22, 0x90, 0x01, 0x57, 0xE4, 0xF0,
-0x90, 0x01, 0x3C, 0x74, 0x02, 0xF0, 0x22, 0x90,
-0x8A, 0x77, 0xE0, 0xFE, 0xA3, 0xE0, 0xFF, 0xF5,
-0x82, 0x8E, 0x83, 0x22, 0xEF, 0xC4, 0x54, 0xF0,
-0x24, 0x03, 0xF5, 0x82, 0xE4, 0x34, 0x81, 0xF5,
-0x83, 0x22, 0x90, 0x05, 0x63, 0xE0, 0x90, 0x88,
-0x89, 0xF0, 0x90, 0x05, 0x62, 0xE0, 0x90, 0x88,
-0x8A, 0xF0, 0x90, 0x05, 0x61, 0xE0, 0x90, 0x88,
-0x8B, 0xF0, 0x90, 0x05, 0x60, 0xE0, 0x90, 0x88,
-0x8C, 0xF0, 0x90, 0x88, 0x32, 0xE0, 0x44, 0x80,
-0xF0, 0x22, 0xFF, 0xF0, 0x12, 0x02, 0x06, 0xFE,
-0x22, 0x7D, 0x02, 0x7F, 0x02, 0x02, 0x7C, 0x74,
-0x90, 0x00, 0x02, 0xE0, 0x44, 0x01, 0xF0, 0x22,
-0x90, 0x88, 0x32, 0xE0, 0x44, 0x04, 0xF0, 0x22,
-0x90, 0x88, 0x3C, 0xE0, 0x90, 0x05, 0x73, 0x22,
-0x90, 0x93, 0x31, 0xE0, 0x20, 0xE0, 0x03, 0x02,
-0xB0, 0xB3, 0xE4, 0x90, 0x94, 0xB6, 0xF0, 0x11,
-0xB4, 0x40, 0x02, 0x01, 0xB3, 0xF1, 0x0A, 0x80,
-0x05, 0xC3, 0x33, 0xCE, 0x33, 0xCE, 0xD8, 0xF9,
-0xFF, 0x90, 0x93, 0x32, 0xE0, 0xFD, 0xEF, 0x5D,
-0x60, 0x02, 0x01, 0xAA, 0x12, 0x02, 0x06, 0xFF,
-0x30, 0xE0, 0x1A, 0x90, 0x93, 0x33, 0xE0, 0xFE,
-0x90, 0x94, 0xB6, 0xE0, 0xFD, 0x74, 0x01, 0xA8,
-0x05, 0x08, 0x80, 0x02, 0xC3, 0x33, 0xD8, 0xFC,
-0x4E, 0x90, 0x93, 0x33, 0xF0, 0xEF, 0xC3, 0x13,
-0x30, 0xE0, 0x16, 0x90, 0x93, 0x34, 0xE0, 0xFF,
-0x90, 0x94, 0xB6, 0x12, 0xA1, 0x0D, 0x80, 0x02,
-0xC3, 0x33, 0xD8, 0xFC, 0x4F, 0x90, 0x93, 0x34,
-0xF0, 0x12, 0x87, 0xE7, 0xFF, 0x90, 0x94, 0xB6,
-0xE0, 0xFE, 0x24, 0x35, 0xF5, 0x82, 0xE4, 0x34,
-0x93, 0xF5, 0x83, 0xEF, 0x12, 0x87, 0x26, 0xFF,
-0x74, 0x3A, 0x2E, 0xF5, 0x82, 0xE4, 0x34, 0x93,
-0x12, 0x87, 0xED, 0xFF, 0x74, 0x3F, 0x2E, 0xF5,
-0x82, 0xE4, 0x34, 0x93, 0x12, 0x87, 0xF7, 0xFF,
-0x74, 0x44, 0x2E, 0xF5, 0x82, 0xE4, 0x34, 0x93,
-0xF5, 0x83, 0xEF, 0xF0, 0x90, 0x93, 0x32, 0xE0,
-0xFF, 0x74, 0x01, 0xA8, 0x06, 0x08, 0x80, 0x02,
-0xC3, 0x33, 0xD8, 0xFC, 0x4F, 0x90, 0x93, 0x32,
-0xF0, 0x22, 0x90, 0x94, 0xB6, 0xE0, 0x04, 0xF0,
-0x02, 0xAF, 0xFF, 0x22, 0x90, 0x94, 0xB6, 0xE0,
-0xFF, 0xC3, 0x94, 0x05, 0x22, 0x7B, 0x00, 0x7A,
-0x00, 0x79, 0x00, 0x90, 0x89, 0x2E, 0x12, 0x86,
-0x76, 0x7B, 0xFF, 0x7A, 0x80, 0x79, 0x80, 0x90,
-0x89, 0x31, 0x12, 0x86, 0x76, 0x7A, 0x80, 0x79,
-0xBF, 0x90, 0x89, 0x34, 0x12, 0x86, 0x76, 0x7A,
-0x81, 0x79, 0x61, 0x90, 0x89, 0x3A, 0x12, 0x86,
-0x76, 0x7A, 0x81, 0x79, 0x75, 0x90, 0x89, 0x3D,
-0x12, 0x86, 0x76, 0x7A, 0x81, 0x79, 0x9D, 0x90,
-0x89, 0x40, 0x12, 0x86, 0x76, 0xD1, 0xFD, 0x7A,
-0x81, 0x79, 0xD9, 0x90, 0x89, 0x49, 0x12, 0x86,
-0x76, 0x7A, 0x82, 0x79, 0x01, 0x90, 0x89, 0x4C,
-0x12, 0x86, 0x76, 0xE4, 0x90, 0x96, 0x1D, 0xF0,
-0x90, 0x96, 0x0C, 0xF0, 0x90, 0x94, 0xB6, 0xF0,
-0x11, 0xB4, 0x50, 0x0F, 0x74, 0x2E, 0x2F, 0x31,
-0x38, 0xE4, 0xF0, 0x90, 0x94, 0xB6, 0xE0, 0x04,
-0xF0, 0x80, 0xED, 0x22, 0x74, 0x2E, 0x25, 0x62,
-0xF5, 0x82, 0xE4, 0x34, 0x96, 0xF5, 0x83, 0x22,
-0xD1, 0xDE, 0x12, 0x7B, 0xDB, 0x90, 0x8A, 0xC5,
-0x12, 0x8B, 0x95, 0x11, 0xBD, 0x51, 0x9C, 0x31,
-0x7D, 0xF1, 0xB7, 0x90, 0x8A, 0x73, 0x12, 0x8B,
-0x95, 0x90, 0x00, 0x6A, 0xE0, 0x30, 0xE2, 0x14,
-0x90, 0x92, 0x20, 0x74, 0x01, 0xF0, 0xA3, 0x74,
-0xF4, 0xF0, 0xE4, 0xFB, 0xFD, 0x7F, 0x68, 0x7E,
-0x01, 0x12, 0x66, 0x33, 0xF1, 0xCF, 0x90, 0x93,
-0x4A, 0x74, 0x01, 0xF0, 0x22, 0x90, 0x93, 0x29,
-0xE0, 0x54, 0xFE, 0xF0, 0x54, 0xFD, 0xF0, 0x54,
-0xEF, 0xF0, 0x44, 0x08, 0xF0, 0x90, 0x86, 0xB3,
-0xE0, 0xFF, 0x64, 0x02, 0x70, 0x29, 0x51, 0x1E,
-0x30, 0xE0, 0x02, 0x7E, 0x01, 0x90, 0x93, 0x2F,
-0x51, 0x1C, 0x30, 0xE1, 0x02, 0x7E, 0x01, 0x90,
-0x93, 0x2D, 0x51, 0x1C, 0x30, 0xE2, 0x02, 0x7E,
-0x01, 0x90, 0x93, 0x2E, 0xEE, 0xF0, 0x90, 0xFD,
-0x80, 0xE0, 0x90, 0x02, 0xFB, 0xF0, 0x22, 0xEF,
-0x64, 0x01, 0x70, 0x1D, 0x51, 0x15, 0x30, 0xE0,
-0x02, 0x7F, 0x01, 0x90, 0x93, 0x2F, 0x51, 0x13,
-0x30, 0xE1, 0x02, 0x7F, 0x01, 0x90, 0x93, 0x2D,
-0x51, 0x13, 0x30, 0xE2, 0x02, 0x7F, 0x01, 0x80,
-0x23, 0x90, 0x86, 0xB3, 0xE0, 0x64, 0x03, 0x70,
-0x20, 0x51, 0x0C, 0x30, 0xE0, 0x02, 0x7F, 0x01,
-0x90, 0x93, 0x2F, 0x51, 0x0A, 0x30, 0xE1, 0x02,
-0x7F, 0x01, 0x90, 0x93, 0x2D, 0x51, 0x0A, 0x30,
-0xE2, 0x02, 0x7F, 0x01, 0x90, 0x93, 0x2E, 0xEF,
-0xF0, 0x22, 0xEF, 0xF0, 0x90, 0xFD, 0x78, 0xE0,
-0x7F, 0x00, 0x22, 0xEF, 0xF0, 0x90, 0xFD, 0x70,
-0xE0, 0x7F, 0x00, 0x22, 0xEE, 0xF0, 0x90, 0xFD,
-0x80, 0xE0, 0x7E, 0x00, 0x22, 0x7E, 0x00, 0x7F,
-0x33, 0x7D, 0x00, 0x7B, 0x01, 0x7A, 0x88, 0x79,
-0x9D, 0x12, 0x04, 0x80, 0x90, 0x88, 0x9E, 0x74,
-0x0B, 0xF0, 0xA3, 0x74, 0x08, 0xF0, 0x7E, 0x00,
-0x7F, 0x14, 0x7D, 0x00, 0x7B, 0x01, 0x7A, 0x94,
-0x79, 0xA2, 0x12, 0x04, 0x80, 0x90, 0x86, 0xB3,
-0xE0, 0xFC, 0x64, 0x02, 0x70, 0x14, 0x51, 0x1E,
-0x30, 0xE2, 0x02, 0x7E, 0x01, 0xEE, 0x51, 0x94,
-0xFE, 0x90, 0x88, 0xA0, 0xE0, 0x54, 0xBF, 0x4E,
-0xF0, 0x22, 0xEC, 0x64, 0x01, 0x70, 0x09, 0x51,
-0x15, 0x30, 0xE2, 0x02, 0x7F, 0x01, 0x80, 0x0F,
-0x90, 0x86, 0xB3, 0xE0, 0x64, 0x03, 0x70, 0x13,
-0x51, 0x0C, 0x30, 0xE2, 0x02, 0x7F, 0x01, 0xEF,
-0x51, 0x94, 0xFF, 0x90, 0x88, 0xA0, 0xE0, 0x54,
-0xBF, 0x4F, 0xF0, 0x22, 0x54, 0x01, 0xC4, 0x33,
-0x33, 0x54, 0xC0, 0x22, 0x7E, 0x00, 0x7F, 0x62,
-0x7D, 0x00, 0x7B, 0x01, 0x7A, 0x88, 0x79, 0x31,
-0x12, 0x04, 0x80, 0xE4, 0x90, 0x94, 0xA1, 0xF0,
-0x90, 0x88, 0x35, 0x74, 0x02, 0xF0, 0x90, 0x88,
-0x3C, 0x14, 0xF0, 0xA3, 0xF0, 0xA3, 0x74, 0x50,
-0xF0, 0x90, 0x88, 0x42, 0xE4, 0xF0, 0xA3, 0x74,
-0x02, 0xF0, 0x90, 0x88, 0x4E, 0x74, 0x10, 0xF0,
-0xA3, 0x74, 0x50, 0xF0, 0xF1, 0xA1, 0x90, 0x8A,
-0x89, 0x12, 0x8D, 0x28, 0x12, 0xA7, 0xB0, 0x90,
-0x8A, 0x89, 0x12, 0x8D, 0x28, 0x7D, 0x0C, 0x7F,
-0x02, 0x12, 0x04, 0x7E, 0x90, 0x8A, 0x89, 0x12,
-0x8D, 0x28, 0x12, 0xA9, 0x0B, 0x90, 0x86, 0xB3,
-0xE0, 0xFF, 0xB4, 0x01, 0x08, 0x90, 0x88, 0x41,
-0x74, 0xDD, 0xF0, 0x80, 0x18, 0xEF, 0xB4, 0x03,
-0x0F, 0x90, 0x88, 0x41, 0x74, 0xF4, 0xF0, 0x90,
-0x00, 0x92, 0xE0, 0x54, 0x7F, 0xF0, 0x80, 0x05,
-0xE4, 0x90, 0x88, 0x41, 0xF0, 0x90, 0x00, 0x79,
-0xE0, 0x54, 0x03, 0xFF, 0xBF, 0x02, 0x0D, 0x90,
-0x00, 0x28, 0xE0, 0x30, 0xE2, 0x06, 0x90, 0x88,
-0x53, 0x74, 0x02, 0xF0, 0x90, 0x88, 0x93, 0x74,
-0x02, 0xF0, 0xA3, 0x74, 0x0F, 0xF0, 0xA3, 0xE0,
-0x54, 0x01, 0x44, 0x28, 0xF0, 0xA3, 0x74, 0x07,
-0xF0, 0x7E, 0x00, 0x7F, 0x18, 0x7D, 0x00, 0x7B,
-0x01, 0x7A, 0x93, 0x79, 0x31, 0x12, 0x04, 0x80,
-0x90, 0x8A, 0xA3, 0x12, 0x8D, 0x28, 0x7F, 0x01,
-0x12, 0x04, 0x7E, 0x7E, 0x00, 0x7F, 0x02, 0x7D,
-0x00, 0x7B, 0x01, 0x7A, 0x88, 0x79, 0x9A, 0x12,
-0x04, 0x80, 0xD1, 0xE4, 0x90, 0x06, 0x0A, 0xE0,
-0x54, 0xF8, 0xF0, 0x90, 0x05, 0x22, 0xE4, 0xF0,
-0x90, 0x88, 0x9C, 0xF0, 0x22, 0x90, 0x96, 0x94,
-0x12, 0x86, 0x76, 0x90, 0x96, 0x94, 0x12, 0x86,
-0x6D, 0x12, 0x02, 0x06, 0x54, 0x7F, 0xFD, 0x12,
-0x87, 0xE7, 0xFE, 0x54, 0x1F, 0x90, 0x96, 0x98,
-0xF0, 0xEE, 0x54, 0x80, 0x12, 0x9D, 0xD0, 0x90,
-0x96, 0x97, 0x12, 0x87, 0x26, 0xFE, 0x54, 0x03,
-0xFC, 0xEE, 0x54, 0x30, 0xC4, 0x54, 0x0F, 0x90,
-0x96, 0x9A, 0x12, 0x87, 0x26, 0xFE, 0x54, 0x40,
-0xC4, 0x13, 0x13, 0x54, 0x03, 0x90, 0x96, 0x99,
-0xF0, 0xEE, 0x54, 0x80, 0x12, 0x9D, 0xD0, 0xFF,
-0x12, 0x87, 0x27, 0xFB, 0x54, 0x08, 0x13, 0x13,
-0x13, 0x54, 0x1F, 0x90, 0x96, 0x9C, 0xF0, 0xFA,
-0xEB, 0x54, 0x04, 0x13, 0x13, 0x54, 0x3F, 0xA3,
-0xF0, 0xEF, 0xD1, 0xF4, 0x12, 0x9F, 0xC8, 0x54,
-0x7F, 0x4F, 0xF0, 0x90, 0x96, 0x99, 0xE0, 0x51,
-0x94, 0x12, 0x9F, 0xC8, 0x54, 0xBF, 0x4F, 0xF0,
-0xEA, 0x70, 0x0E, 0xEC, 0x54, 0x03, 0x25, 0xE0,
-0x25, 0xE0, 0x12, 0x9F, 0xC8, 0x54, 0xF3, 0x4F,
-0xF0, 0x90, 0x96, 0x98, 0xE0, 0x54, 0x1F, 0x12,
-0x9F, 0x46, 0x54, 0xE0, 0x4F, 0xF0, 0xEC, 0x54,
-0x03, 0x12, 0x9F, 0xC8, 0x54, 0xFC, 0x4F, 0xF0,
-0x90, 0x96, 0x97, 0xE0, 0x54, 0x01, 0xC4, 0x33,
-0x54, 0xE0, 0x12, 0x9F, 0x46, 0x54, 0xDF, 0x4F,
-0xF0, 0x90, 0x96, 0x9A, 0xE0, 0x54, 0x03, 0xC4,
-0x54, 0xF0, 0x12, 0x9F, 0xC8, 0x54, 0xCF, 0x4F,
-0x91, 0xDA, 0xE0, 0x54, 0xFB, 0x91, 0xDA, 0xC0,
-0x83, 0xC0, 0x82, 0xE0, 0xFF, 0x90, 0x96, 0x9D,
-0xE0, 0xD1, 0xEC, 0xD0, 0x82, 0xD0, 0x83, 0xF0,
-0x90, 0x93, 0x52, 0xE0, 0x60, 0x34, 0x90, 0x96,
-0x94, 0x12, 0x86, 0x6D, 0xE9, 0x24, 0x03, 0xF9,
-0xE4, 0x3A, 0xFA, 0x12, 0x02, 0x06, 0x54, 0x1F,
-0x12, 0x02, 0x4C, 0x90, 0x96, 0x9B, 0x74, 0x01,
-0xF0, 0x90, 0x96, 0x9B, 0xE0, 0xFF, 0xC3, 0x94,
-0x04, 0x50, 0x0F, 0xEF, 0x91, 0xE6, 0xE4, 0x12,
-0x02, 0x5E, 0x90, 0x96, 0x9B, 0xE0, 0x04, 0xF0,
-0x80, 0xE7, 0x90, 0x93, 0x50, 0xE0, 0x54, 0x07,
-0xFF, 0xBF, 0x05, 0x0A, 0xEC, 0xB4, 0x01, 0x06,
-0x90, 0x93, 0x55, 0x74, 0x01, 0xF0, 0xE4, 0x90,
-0x96, 0x9B, 0xF0, 0x90, 0x96, 0x9B, 0xE0, 0xFC,
-0x91, 0xE6, 0x12, 0x02, 0x1F, 0xFF, 0xED, 0xF1,
-0x83, 0x12, 0xAD, 0x4A, 0xEF, 0xF0, 0x90, 0x96,
-0x9B, 0xE0, 0x04, 0xF0, 0xE0, 0xB4, 0x04, 0xE3,
-0xAF, 0x05, 0x90, 0x8A, 0xFF, 0x91, 0xFF, 0x02,
-0x04, 0x7E, 0xF0, 0x74, 0xC6, 0x2D, 0xF5, 0x82,
-0xE4, 0x34, 0x8D, 0xF5, 0x83, 0x22, 0x24, 0x03,
-0xFF, 0xE4, 0x33, 0xFE, 0x90, 0x96, 0x94, 0x12,
-0x86, 0x6D, 0x8F, 0x82, 0x8E, 0x83, 0x22, 0x90,
-0x96, 0xAC, 0xE0, 0xFF, 0x90, 0x8A, 0xC7, 0xE0,
-0xFC, 0xA3, 0xE0, 0xFD, 0xF5, 0x82, 0x8C, 0x83,
-0x22, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0,
-0x90, 0x96, 0xAC, 0xEF, 0xF0, 0xA3, 0xED, 0xF0,
-0x90, 0x86, 0xB1, 0xE0, 0x04, 0xF0, 0x90, 0x88,
-0x9D, 0xE0, 0x30, 0xE0, 0x07, 0x90, 0x05, 0x10,
-0xE4, 0xF0, 0xA3, 0xF0, 0x90, 0x04, 0x1D, 0xE0,
-0x60, 0x37, 0x90, 0x05, 0x22, 0xE0, 0x90, 0x96,
-0xB0, 0xF0, 0x7B, 0x26, 0x12, 0x9F, 0xE5, 0x90,
-0x8A, 0xFD, 0x12, 0x8B, 0x95, 0xEF, 0x64, 0x01,
-0x70, 0x02, 0x80, 0x06, 0x12, 0x9F, 0x83, 0x30,
-0xE0, 0x04, 0xB1, 0xA0, 0xEE, 0xF0, 0x90, 0x96,
-0xB0, 0xE0, 0xFD, 0x7B, 0x27, 0xE4, 0xFF, 0x12,
-0x9C, 0x10, 0x91, 0xF7, 0x12, 0x04, 0x7E, 0x80,
-0x09, 0x91, 0xF7, 0x12, 0x04, 0x7E, 0xB1, 0xA0,
-0xEE, 0xF0, 0x90, 0x88, 0x9D, 0xE0, 0x30, 0xE0,
-0x1A, 0x12, 0x9F, 0x83, 0x30, 0xE0, 0x14, 0x90,
-0x05, 0x22, 0xE0, 0x54, 0x6F, 0xFF, 0x90, 0x8A,
-0xF9, 0x12, 0xA7, 0x0C, 0x8C, 0x83, 0x7D, 0x28,
-0x12, 0x04, 0x7E, 0x90, 0x04, 0x1F, 0x74, 0x20,
-0xF0, 0x7F, 0x01, 0xD0, 0xD0, 0x92, 0xAF, 0x22,
-0x90, 0x86, 0xB6, 0xE0, 0xFF, 0x90, 0x96, 0xAD,
+0x79, 0xBD, 0x22, 0x7E, 0x00, 0x7F, 0x0B, 0x7D,
+0x00, 0x7B, 0x01, 0x7A, 0x93, 0x79, 0x4D, 0x12,
+0x04, 0x80, 0x11, 0xCC, 0x91, 0x18, 0xBF, 0x01,
+0x1C, 0x90, 0x94, 0xBD, 0xE0, 0xFE, 0x54, 0x01,
+0x90, 0x93, 0x4D, 0xF0, 0xEE, 0x54, 0x04, 0x90,
+0x93, 0x4F, 0xF0, 0x90, 0x94, 0xBD, 0xE0, 0x54,
+0x08, 0x90, 0x93, 0x4E, 0xF0, 0x11, 0xCC, 0x31,
+0x5B, 0x70, 0x35, 0x90, 0x94, 0xBD, 0xE0, 0x54,
+0x07, 0x70, 0x15, 0x7B, 0x01, 0x7A, 0x94, 0x79,
+0xBE, 0x7F, 0xFA, 0x7E, 0x01, 0x12, 0x5F, 0xA6,
+0xBF, 0x01, 0x0F, 0x90, 0x94, 0xBE, 0x80, 0x03,
+0x90, 0x94, 0xBD, 0xE0, 0x54, 0x07, 0x90, 0x93,
+0x51, 0xF0, 0x90, 0x94, 0xBD, 0xE0, 0x54, 0xE0,
+0xC4, 0x13, 0x54, 0x07, 0x90, 0x93, 0x50, 0xF0,
+0x11, 0xCC, 0x7F, 0xFD, 0x7E, 0x01, 0x12, 0x5F,
+0xA6, 0xBF, 0x01, 0x0E, 0x90, 0x94, 0xBD, 0xE0,
+0x54, 0x0C, 0x13, 0x13, 0x54, 0x3F, 0x90, 0x93,
+0x52, 0xF0, 0x22, 0x7F, 0xFB, 0x7E, 0x01, 0x12,
+0x5F, 0xA6, 0xEF, 0x64, 0x01, 0x22, 0x90, 0x94,
+0xBD, 0xEF, 0xF0, 0x7B, 0x01, 0x7A, 0x95, 0x79,
+0x04, 0x7F, 0xF4, 0x7E, 0x01, 0x12, 0x5F, 0xA6,
+0xBF, 0x01, 0x08, 0x90, 0x95, 0x04, 0xE0, 0x90,
+0x95, 0x06, 0xF0, 0x7B, 0x01, 0x7A, 0x95, 0x79,
+0x04, 0x7F, 0xF5, 0x7E, 0x01, 0x12, 0x5F, 0xA6,
+0xBF, 0x01, 0x08, 0x90, 0x95, 0x04, 0xE0, 0x90,
+0x95, 0x07, 0xF0, 0x7B, 0x01, 0x7A, 0x95, 0x79,
+0x04, 0x7F, 0xF6, 0x7E, 0x01, 0x12, 0x5F, 0xA6,
+0xBF, 0x01, 0x08, 0x90, 0x95, 0x04, 0xE0, 0x90,
+0x95, 0x08, 0xF0, 0x7B, 0x01, 0x7A, 0x95, 0x79,
+0x04, 0x7F, 0xF7, 0x7E, 0x01, 0x12, 0x5F, 0xA6,
+0xBF, 0x01, 0x08, 0x90, 0x95, 0x04, 0xE0, 0x90,
+0x95, 0x09, 0xF0, 0x7B, 0x01, 0x7A, 0x95, 0x79,
+0x04, 0x7F, 0xF8, 0x7E, 0x01, 0x12, 0x5F, 0xA6,
+0xBF, 0x01, 0x08, 0x90, 0x95, 0x04, 0xE0, 0x90,
+0x95, 0x0A, 0xF0, 0x7B, 0x01, 0x7A, 0x95, 0x79,
+0x04, 0x91, 0x18, 0xBF, 0x01, 0x08, 0x90, 0x95,
+0x04, 0xE0, 0x90, 0x95, 0x0B, 0xF0, 0x7B, 0x01,
+0x7A, 0x95, 0x79, 0x04, 0x31, 0x5B, 0x70, 0x52,
+0x90, 0x95, 0x04, 0xE0, 0x90, 0x95, 0x0C, 0xF0,
+0x54, 0x07, 0x60, 0x08, 0x90, 0x95, 0x04, 0xE0,
+0x54, 0xE0, 0x70, 0x3E, 0x7B, 0x01, 0x7A, 0x95,
+0x79, 0x05, 0x7F, 0xFA, 0x31, 0x5D, 0x70, 0x32,
+0x90, 0x95, 0x04, 0xE0, 0xFC, 0x54, 0x07, 0x70,
+0x12, 0x90, 0x95, 0x0C, 0xE0, 0xFE, 0x90, 0x95,
+0x05, 0xE0, 0x54, 0x07, 0xFD, 0xEE, 0x4D, 0x90,
+0x95, 0x0C, 0xF0, 0xEC, 0x54, 0xE0, 0x70, 0x12,
+0x90, 0x95, 0x0C, 0xE0, 0xFF, 0x90, 0x95, 0x05,
+0xE0, 0x54, 0xE0, 0xFE, 0xEF, 0x4E, 0x90, 0x95,
+0x0C, 0xF0, 0x7B, 0x01, 0x7A, 0x95, 0x79, 0x04,
+0x7F, 0xFD, 0x31, 0x5D, 0x70, 0x46, 0x90, 0x95,
+0x04, 0xE0, 0xFE, 0x54, 0xCC, 0x90, 0x95, 0x0D,
+0xF0, 0xEE, 0x54, 0x0C, 0xFF, 0x60, 0x08, 0x90,
+0x95, 0x04, 0xE0, 0x54, 0xC0, 0x70, 0x2D, 0xEF,
+0x70, 0x11, 0x90, 0x95, 0x0D, 0xE0, 0xFF, 0x90,
+0x95, 0x04, 0xE0, 0x54, 0x03, 0xF1, 0xE3, 0x90,
+0x95, 0x0D, 0xF0, 0x90, 0x95, 0x04, 0xE0, 0xFF,
+0x54, 0xC0, 0x70, 0x10, 0x90, 0x95, 0x0D, 0xE0,
+0xFE, 0xEF, 0x54, 0x30, 0x25, 0xE0, 0x25, 0xE0,
+0xFF, 0xEE, 0x4F, 0xF0, 0x7B, 0x01, 0x7A, 0x95,
+0x79, 0x04, 0x7F, 0xF0, 0x7E, 0x01, 0x12, 0x5F,
+0xA6, 0xBF, 0x01, 0x08, 0x90, 0x95, 0x04, 0xE0,
+0x90, 0x95, 0x0E, 0xF0, 0x7B, 0x01, 0x7A, 0x95,
+0x79, 0x04, 0x7F, 0xF1, 0x7E, 0x01, 0x12, 0x5F,
+0xA6, 0xBF, 0x01, 0x08, 0x90, 0x95, 0x04, 0xE0,
+0x90, 0x95, 0x0F, 0xF0, 0x7B, 0x01, 0x7A, 0x95,
+0x79, 0x04, 0x7F, 0xF2, 0x7E, 0x01, 0x12, 0x5F,
+0xA6, 0xBF, 0x01, 0x08, 0x90, 0x95, 0x04, 0xE0,
+0x90, 0x95, 0x10, 0xF0, 0x7B, 0x01, 0x7A, 0x95,
+0x79, 0x04, 0x7F, 0xF3, 0x7E, 0x01, 0x12, 0x5F,
+0xA6, 0xBF, 0x01, 0x08, 0x90, 0x95, 0x04, 0xE0,
+0x90, 0x95, 0x11, 0xF0, 0x7B, 0x01, 0x7A, 0x95,
+0x79, 0x04, 0x7F, 0xFC, 0x7E, 0x01, 0x12, 0x5F,
+0xA6, 0xBF, 0x01, 0x08, 0x90, 0x95, 0x04, 0xE0,
+0x90, 0x95, 0x12, 0xF0, 0x90, 0x94, 0xBE, 0x74,
+0x19, 0xF0, 0x90, 0x94, 0xE0, 0x74, 0x08, 0xF0,
+0x90, 0x95, 0x06, 0xE0, 0x90, 0x94, 0xC0, 0xF0,
+0x90, 0x95, 0x07, 0xE0, 0x90, 0x94, 0xC1, 0xF0,
+0x90, 0x95, 0x08, 0xE0, 0x90, 0x94, 0xC2, 0xF0,
+0x90, 0x95, 0x09, 0xE0, 0x90, 0x94, 0xC3, 0xF0,
+0x90, 0x95, 0x0A, 0xE0, 0x90, 0x94, 0xC4, 0xF0,
+0x90, 0x95, 0x0B, 0xE0, 0x90, 0x94, 0xC5, 0xF0,
+0x90, 0x95, 0x0C, 0xE0, 0x90, 0x94, 0xC6, 0xF0,
+0x90, 0x95, 0x0D, 0xE0, 0x90, 0x94, 0xC7, 0xF0,
+0x90, 0x94, 0xE1, 0x74, 0x1A, 0xF0, 0x90, 0x95,
+0x03, 0x74, 0x05, 0xF0, 0x90, 0x95, 0x0E, 0xE0,
+0x90, 0x94, 0xE3, 0xF0, 0x90, 0x95, 0x0F, 0xE0,
+0x90, 0x94, 0xE4, 0xF0, 0x90, 0x95, 0x10, 0xE0,
+0x90, 0x94, 0xE5, 0xF0, 0x90, 0x95, 0x11, 0xE0,
+0x90, 0x94, 0xE6, 0xF0, 0x90, 0x95, 0x12, 0xE0,
+0x90, 0x94, 0xE7, 0xF0, 0x90, 0x00, 0x35, 0xE0,
+0x54, 0xFC, 0x44, 0x01, 0xF0, 0x7B, 0x01, 0x7A,
+0x95, 0x79, 0x04, 0x7F, 0x6F, 0x7E, 0x00, 0x12,
+0x5F, 0xA6, 0xBF, 0x01, 0x08, 0x90, 0x95, 0x04,
+0xE0, 0x90, 0x95, 0x13, 0xF0, 0x90, 0x00, 0x35,
+0xE0, 0x54, 0xFC, 0xF0, 0x90, 0x94, 0xBD, 0xE0,
+0xB4, 0x01, 0x1A, 0x7B, 0x01, 0x7A, 0x94, 0x79,
+0xBE, 0x12, 0x9F, 0xDB, 0x12, 0x04, 0x7E, 0x7B,
+0x01, 0x7A, 0x94, 0x79, 0xE1, 0x12, 0x8A, 0x4D,
+0x7F, 0x04, 0x02, 0x04, 0x7E, 0x75, 0x45, 0x01,
+0x75, 0x46, 0x94, 0x75, 0x47, 0xBE, 0x75, 0x48,
+0x0A, 0x7B, 0x01, 0x7A, 0x01, 0x79, 0xA0, 0x12,
+0x69, 0xF5, 0x75, 0x45, 0x01, 0x75, 0x46, 0x94,
+0x75, 0x47, 0xE3, 0x75, 0x48, 0x05, 0x7B, 0x01,
+0x7A, 0x01, 0x79, 0xAA, 0x12, 0x69, 0xF5, 0x90,
+0x95, 0x13, 0xE0, 0x90, 0x01, 0xA1, 0xF0, 0x22,
+0x7F, 0xF9, 0x7E, 0x01, 0x02, 0x5F, 0xA6, 0x12,
+0x02, 0x06, 0x90, 0x94, 0xE0, 0x12, 0x87, 0x86,
+0x90, 0x94, 0xE1, 0xF0, 0x60, 0x0D, 0x91, 0x7D,
+0xF1, 0x36, 0x90, 0x94, 0xE1, 0x91, 0x7D, 0x7B,
+0x57, 0x91, 0x8A, 0x90, 0x88, 0x9D, 0xE0, 0x30,
+0xE0, 0x0D, 0x12, 0x8D, 0x31, 0x30, 0xE0, 0x07,
+0x90, 0x06, 0x0A, 0xE0, 0x44, 0x07, 0xF0, 0x90,
+0x94, 0xBD, 0x74, 0x20, 0xF0, 0x90, 0x94, 0xDF,
+0x74, 0x03, 0xF0, 0x90, 0x05, 0x22, 0xE0, 0x90,
+0x94, 0xBF, 0xF0, 0x90, 0x93, 0x5E, 0xE0, 0x90,
+0x94, 0xC0, 0xF0, 0x90, 0x93, 0x5F, 0xE0, 0x90,
+0x94, 0xC1, 0xF0, 0x11, 0xCC, 0x12, 0x8A, 0x4D,
+0x7F, 0x04, 0x02, 0x04, 0x7E, 0xE0, 0xFF, 0x90,
+0x94, 0xE0, 0xE0, 0xFD, 0x22, 0xE4, 0xFB, 0xFD,
+0x7F, 0xFF, 0xEB, 0xB4, 0x57, 0x04, 0x91, 0xAA,
+0x80, 0x0E, 0xEF, 0x70, 0x07, 0x90, 0x93, 0x5E,
+0xE0, 0x4D, 0x80, 0x04, 0xF1, 0x4E, 0x91, 0xAA,
+0x90, 0x05, 0x22, 0xF0, 0x90, 0x93, 0x01, 0xEB,
+0xF0, 0x22, 0x90, 0x93, 0x5F, 0xE0, 0xFF, 0x90,
+0x93, 0x5E, 0xE0, 0x4F, 0x22, 0xE4, 0x90, 0x96,
+0xF2, 0xF0, 0xA3, 0xF0, 0x90, 0x05, 0x22, 0xE0,
+0x90, 0x96, 0xF4, 0xF0, 0x7B, 0x47, 0xB1, 0x3C,
+0x90, 0x05, 0xF8, 0xE0, 0x70, 0x1A, 0xA3, 0xE0,
+0x70, 0x16, 0xA3, 0xE0, 0x70, 0x12, 0xA3, 0xE0,
+0x70, 0x0E, 0x90, 0x96, 0xF4, 0xE0, 0xFD, 0x7B,
+0x48, 0xE4, 0xFF, 0x91, 0x8A, 0x7F, 0x01, 0x22,
+0x12, 0x8F, 0xEC, 0x30, 0xE0, 0x19, 0xD3, 0x90,
+0x96, 0xF3, 0xE0, 0x94, 0x03, 0x90, 0x96, 0xF2,
+0xE0, 0x94, 0x00, 0x40, 0x06, 0xB1, 0x2F, 0x7B,
+0x5A, 0x80, 0x17, 0x7F, 0x01, 0x80, 0x1C, 0xD3,
+0x90, 0x96, 0xF3, 0xE0, 0x94, 0xE8, 0x90, 0x96,
+0xF2, 0xE0, 0x94, 0x03, 0x40, 0x0B, 0xB1, 0x2F,
+0x7B, 0x5B, 0xE4, 0xFF, 0x91, 0x8A, 0x7F, 0x00,
+0x22, 0x7F, 0x32, 0x7E, 0x00, 0x12, 0x7C, 0x6A,
+0x90, 0x96, 0xF2, 0xF1, 0xDC, 0x80, 0x99, 0x90,
+0x01, 0xC0, 0xE0, 0x44, 0x20, 0xF0, 0x90, 0x96,
+0xF4, 0xE0, 0xFD, 0x22, 0x7D, 0xFF, 0xE4, 0xFF,
+0x81, 0x8A, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0,
+0xD0, 0x90, 0x96, 0xDD, 0xEF, 0xF0, 0xA3, 0xED,
+0xF0, 0x90, 0x86, 0xB1, 0xE0, 0x04, 0xF0, 0x90,
+0x88, 0x9D, 0xE0, 0x30, 0xE0, 0x07, 0x90, 0x05,
+0x10, 0xE4, 0xF0, 0xA3, 0xF0, 0x90, 0x04, 0x1D,
+0xE0, 0x60, 0x35, 0x90, 0x05, 0x22, 0xE0, 0x90,
+0x96, 0xE1, 0xF0, 0x7B, 0x26, 0xB1, 0x3C, 0x90,
+0x8A, 0xFD, 0x12, 0x8E, 0xAD, 0xEF, 0x64, 0x01,
+0x70, 0x02, 0x80, 0x06, 0x12, 0x8F, 0xEC, 0x30,
+0xE0, 0x04, 0xB1, 0xE8, 0xEE, 0xF0, 0x90, 0x96,
+0xE1, 0xE0, 0xFD, 0x7B, 0x27, 0xE4, 0xFF, 0x91,
+0x8A, 0xB1, 0xD6, 0x12, 0x04, 0x7E, 0x80, 0x09,
+0xB1, 0xD6, 0x12, 0x04, 0x7E, 0xB1, 0xE8, 0xEE,
+0xF0, 0x90, 0x88, 0x9D, 0xE0, 0x30, 0xE0, 0x19,
+0x12, 0x8F, 0xEC, 0x30, 0xE0, 0x13, 0x90, 0x05,
+0x22, 0xE0, 0x54, 0x6F, 0xFF, 0x90, 0x8A, 0xF9,
+0xF1, 0x2F, 0x8C, 0x83, 0x7D, 0x28, 0x12, 0x04,
+0x7E, 0x90, 0x04, 0x1F, 0x74, 0x20, 0xF0, 0x7F,
+0x01, 0xD0, 0xD0, 0x92, 0xAF, 0x22, 0x90, 0x96,
+0xDD, 0xE0, 0xFF, 0x90, 0x8A, 0xC7, 0xE0, 0xFC,
+0xA3, 0xE0, 0xFD, 0xF5, 0x82, 0x8C, 0x83, 0x22,
+0x90, 0x86, 0xB6, 0xE0, 0xFF, 0x90, 0x96, 0xDE,
 0xE0, 0xFB, 0x90, 0x92, 0x13, 0x74, 0x0A, 0xF0,
-0x7D, 0x01, 0x12, 0x66, 0xDB, 0x90, 0x96, 0xAE,
+0x7D, 0x01, 0x12, 0x66, 0xDB, 0x90, 0x96, 0xDF,
 0xEE, 0xF0, 0xFC, 0xA3, 0xEF, 0xF0, 0xFD, 0x90,
-0x96, 0xAC, 0xE0, 0xFF, 0x90, 0x8A, 0x95, 0xE0,
+0x96, 0xDD, 0xE0, 0xFF, 0x90, 0x8A, 0x95, 0xE0,
 0xFA, 0xA3, 0xE0, 0xFB, 0xF5, 0x82, 0x8A, 0x83,
-0x12, 0x04, 0x7E, 0x90, 0x96, 0xAE, 0xE0, 0xFE,
+0x12, 0x04, 0x7E, 0x90, 0x96, 0xDF, 0xE0, 0xFE,
 0xA3, 0xE0, 0xFF, 0x90, 0x8A, 0x9B, 0xE0, 0xFC,
 0xA3, 0xE0, 0xFD, 0xF5, 0x82, 0x8C, 0x83, 0x12,
-0x04, 0x7E, 0x90, 0x96, 0xAE, 0xA3, 0xE0, 0xFF,
+0x04, 0x7E, 0x90, 0x96, 0xDF, 0xA3, 0xE0, 0xFF,
 0x24, 0x12, 0xF5, 0x82, 0xE4, 0x34, 0xFC, 0xF5,
-0x83, 0xE0, 0x54, 0x01, 0xFE, 0x90, 0x96, 0xAD,
+0x83, 0xE0, 0x54, 0x01, 0xFE, 0x90, 0x96, 0xDE,
 0xE0, 0x25, 0xE0, 0x25, 0xE0, 0x44, 0x02, 0x4E,
 0xFE, 0x74, 0x12, 0x2F, 0xF5, 0x82, 0xE4, 0x34,
 0xFC, 0xF5, 0x83, 0x22, 0xD3, 0x10, 0xAF, 0x01,
-0xC3, 0xC0, 0xD0, 0x90, 0x96, 0xB6, 0xED, 0xF0,
-0xA3, 0xEB, 0xF0, 0x90, 0x96, 0xB5, 0xEF, 0xF0,
-0xE4, 0xFD, 0xFC, 0xF1, 0x91, 0x90, 0x96, 0xB8,
-0xF0, 0x12, 0x7B, 0x07, 0x7C, 0x00, 0xAD, 0x07,
-0x90, 0x96, 0xB5, 0xE0, 0x90, 0x04, 0x25, 0xF0,
-0x90, 0x96, 0xB6, 0xE0, 0x60, 0x05, 0xD1, 0xD2,
-0x44, 0x80, 0xF0, 0xAF, 0x05, 0x74, 0x20, 0x2F,
-0xF5, 0x82, 0xE4, 0x34, 0xFC, 0xF5, 0x83, 0xE0,
-0x54, 0xC0, 0xF0, 0xD1, 0xD2, 0x54, 0xC0, 0xF0,
-0x90, 0x96, 0xB8, 0xE0, 0xFF, 0xAE, 0x05, 0x74,
-0x18, 0x2E, 0xF5, 0x82, 0xE4, 0x34, 0xFC, 0xF5,
-0x83, 0xEF, 0xF0, 0x90, 0x00, 0x8B, 0xE0, 0xD3,
-0x94, 0x03, 0x74, 0x10, 0x2E, 0xF5, 0x82, 0xE4,
-0x34, 0xFC, 0xF5, 0x83, 0x74, 0x04, 0xF0, 0xAF,
-0x05, 0xD1, 0x09, 0xE0, 0x54, 0x01, 0xFE, 0x90,
-0x96, 0xB7, 0xE0, 0x25, 0xE0, 0x25, 0xE0, 0xFB,
-0xEE, 0x44, 0x02, 0x4B, 0xD1, 0x08, 0xEE, 0xF0,
-0x74, 0x11, 0x2F, 0xF5, 0x82, 0xE4, 0x34, 0xFC,
-0xF5, 0x83, 0x74, 0xFF, 0xF0, 0x74, 0x29, 0x2F,
-0xF5, 0x82, 0xE4, 0x34, 0xFC, 0xF5, 0x83, 0xE0,
-0x54, 0xF7, 0xF0, 0x74, 0x0D, 0x2D, 0xF5, 0x82,
-0xE4, 0x34, 0xFC, 0xF5, 0x83, 0xE0, 0x44, 0x80,
-0xF0, 0xAE, 0x04, 0xAF, 0x05, 0xD0, 0xD0, 0x92,
-0xAF, 0x22, 0x74, 0x21, 0x2F, 0xF5, 0x82, 0xE4,
-0x34, 0xFC, 0xF5, 0x83, 0xE0, 0x22, 0xE4, 0xFD,
-0xFF, 0x02, 0x6E, 0x71, 0x90, 0x06, 0x04, 0xE0,
-0x54, 0x7F, 0xF0, 0x22, 0x25, 0xE0, 0x25, 0xE0,
-0xFE, 0xEF, 0x4E, 0x22, 0x54, 0x01, 0xC4, 0x33,
-0x33, 0x33, 0x54, 0x80, 0x22, 0x7A, 0x81, 0x79,
-0xB1, 0x90, 0x89, 0x46, 0x02, 0x86, 0x76, 0x54,
-0x07, 0xFF, 0x74, 0x01, 0x7E, 0x00, 0xA8, 0x07,
-0x08, 0x22, 0xE4, 0xF5, 0x75, 0xEF, 0x14, 0xF5,
-0x74, 0xED, 0xFF, 0xE5, 0x74, 0xF5, 0x82, 0x33,
-0x95, 0xE0, 0xF5, 0x83, 0xC3, 0xE5, 0x82, 0x9F,
-0x74, 0x80, 0xF8, 0x65, 0x83, 0x98, 0x40, 0x50,
-0xE5, 0x74, 0x78, 0x03, 0xA2, 0xE7, 0x13, 0xD8,
-0xFB, 0xFF, 0x33, 0x95, 0xE0, 0xFE, 0xEB, 0xF1,
-0x83, 0xE5, 0x82, 0x2F, 0xF5, 0x82, 0xE5, 0x83,
-0x3E, 0xF5, 0x83, 0xE0, 0xF5, 0x82, 0x75, 0x83,
-0x00, 0xE5, 0x74, 0xF1, 0x07, 0x80, 0x05, 0xC3,
-0x33, 0xCE, 0x33, 0xCE, 0xD8, 0xF9, 0xFF, 0xEE,
-0x55, 0x83, 0xFE, 0xEF, 0x55, 0x82, 0x4E, 0x60,
-0x13, 0x85, 0x74, 0x76, 0x05, 0x75, 0x90, 0x95,
-0x4C, 0xE0, 0x65, 0x75, 0x60, 0x0A, 0xE5, 0x76,
-0xD3, 0x9D, 0x40, 0x04, 0x15, 0x74, 0x80, 0x99,
-0xAF, 0x76, 0x22, 0x75, 0xF0, 0x08, 0xA4, 0x24,
-0x00, 0xF5, 0x82, 0xE4, 0x34, 0x82, 0xF5, 0x83,
-0x22, 0x90, 0x86, 0xAD, 0xA3, 0xE0, 0x24, 0x7F,
-0xF5, 0x82, 0xE4, 0x34, 0x84, 0xF5, 0x83, 0xE0,
-0x22, 0x90, 0x88, 0x8D, 0x74, 0x18, 0xF0, 0xA3,
-0xF0, 0xA3, 0xE4, 0xF0, 0xA3, 0x74, 0x64, 0xF0,
-0xA3, 0x74, 0x05, 0xF0, 0xA3, 0xF0, 0x22, 0x90,
-0x93, 0x03, 0xE0, 0x54, 0xFE, 0x12, 0x97, 0xEB,
-0x90, 0x93, 0x0A, 0x12, 0x97, 0x3A, 0x90, 0x93,
-0x25, 0xF0, 0xA3, 0xF0, 0xA3, 0xF0, 0x22, 0x90,
-0x93, 0x57, 0xE0, 0x54, 0x7F, 0xF0, 0x54, 0xBF,
-0xF0, 0x54, 0xDF, 0xF0, 0x54, 0xF0, 0xF0, 0xE4,
-0x90, 0x93, 0x59, 0xF0, 0x90, 0x93, 0x57, 0xE0,
-0x54, 0xEF, 0xF0, 0x22, 0x12, 0x02, 0x06, 0x54,
-0x01, 0xFF, 0x90, 0x93, 0x31, 0xE0, 0x54, 0xFE,
-0x4F, 0xF0, 0x30, 0xE0, 0x04, 0xE4, 0x12, 0x97,
-0x3B, 0x22, 0x12, 0x02, 0x06, 0xFF, 0x12, 0x87,
-0xE7, 0x90, 0x94, 0xB6, 0x12, 0x87, 0x26, 0x90,
-0x94, 0xB7, 0x12, 0x87, 0xF0, 0x90, 0x94, 0xB8,
-0x12, 0x87, 0xFA, 0x90, 0x94, 0xB9, 0x12, 0x87,
-0x2E, 0x90, 0x94, 0xBA, 0x31, 0x1A, 0x90, 0x94,
-0xBB, 0xF0, 0xEF, 0x24, 0xF9, 0x60, 0x39, 0x14,
-0x70, 0x02, 0x01, 0xC1, 0x14, 0x70, 0x02, 0x01,
-0xC3, 0x24, 0x03, 0x60, 0x02, 0x21, 0x02, 0x90,
-0x94, 0xB6, 0xE0, 0x90, 0x88, 0xE1, 0xF0, 0x90,
-0x94, 0xB7, 0xE0, 0x90, 0x88, 0xE2, 0xF0, 0x90,
-0x94, 0xB8, 0xE0, 0x90, 0x88, 0xE3, 0xF0, 0x90,
-0x94, 0xB9, 0xE0, 0x90, 0x88, 0xE4, 0xF0, 0x90,
-0x94, 0xBA, 0xE0, 0x90, 0x88, 0xE5, 0xF0, 0x22,
-0x90, 0x94, 0xB6, 0xE0, 0x90, 0x94, 0xAD, 0xF0,
-0x90, 0x94, 0xB9, 0x12, 0x8E, 0xCB, 0x78, 0x10,
-0x12, 0x03, 0xFE, 0xC0, 0x04, 0xC0, 0x05, 0xC0,
-0x06, 0xC0, 0x07, 0xA3, 0x12, 0x8E, 0xCB, 0x78,
-0x18, 0x12, 0x03, 0xFE, 0xD0, 0x03, 0xD0, 0x02,
-0xD0, 0x01, 0xD0, 0x00, 0x12, 0x86, 0x54, 0xC0,
-0x04, 0xC0, 0x05, 0xC0, 0x06, 0xC0, 0x07, 0x90,
-0x94, 0xB8, 0x12, 0x8E, 0xCB, 0x78, 0x08, 0x12,
-0x03, 0xFE, 0xD0, 0x03, 0xD0, 0x02, 0xD0, 0x01,
-0xD0, 0x00, 0x12, 0x86, 0x54, 0x12, 0x8E, 0xC0,
-0x12, 0x86, 0x54, 0x90, 0x94, 0xA3, 0x02, 0x04,
-0x31, 0x80, 0x5E, 0x90, 0x94, 0xAF, 0xE0, 0x44,
-0x01, 0xFF, 0xF0, 0x90, 0x94, 0xB6, 0xE0, 0x54,
-0x7F, 0x25, 0xE0, 0xFE, 0xEF, 0x54, 0x01, 0x4E,
-0x90, 0x94, 0xAF, 0xF0, 0xE0, 0xFF, 0xC3, 0x13,
-0x54, 0x7F, 0xC3, 0x94, 0x1E, 0x50, 0x06, 0xEF,
-0x54, 0x01, 0x44, 0x3C, 0xF0, 0x90, 0x94, 0xAF,
-0xE0, 0xFF, 0xC3, 0x13, 0x54, 0x7F, 0xD3, 0x94,
-0x50, 0x40, 0x1E, 0xEF, 0x54, 0x01, 0x44, 0xA0,
-0xF0, 0x22, 0x7E, 0x01, 0x7F, 0xFF, 0xAD, 0x06,
-0x12, 0x9B, 0x14, 0x90, 0x8A, 0xCF, 0xE0, 0xF8,
-0xA3, 0xE0, 0xF5, 0x82, 0x88, 0x83, 0x12, 0x04,
-0x7E, 0x22, 0xF0, 0x90, 0x00, 0x06, 0x02, 0x02,
-0x1F, 0x90, 0x94, 0xBC, 0x74, 0x27, 0xF0, 0x90,
-0x94, 0xDE, 0x74, 0x06, 0xF0, 0x90, 0x94, 0xBE,
-0x74, 0x08, 0xF0, 0xE4, 0x12, 0x97, 0x3B, 0x90,
-0x94, 0xB4, 0xE0, 0x90, 0x94, 0xC2, 0xF0, 0x90,
-0x94, 0xB5, 0xE0, 0x90, 0x94, 0xC3, 0xF0, 0x7B,
-0x01, 0x7A, 0x94, 0x79, 0xBC, 0x12, 0xAF, 0x87,
-0x02, 0x04, 0x7E, 0x12, 0x02, 0x06, 0xFF, 0x90,
-0x93, 0x4B, 0xF0, 0xBF, 0x01, 0x09, 0x7F, 0x01,
-0x31, 0x68, 0xE4, 0x90, 0x93, 0x4B, 0xF0, 0x22,
-0x90, 0x94, 0xB6, 0xEF, 0xF0, 0x71, 0xB6, 0x7F,
-0xF4, 0x7E, 0x01, 0x12, 0x5F, 0xA6, 0xBF, 0x01,
-0x08, 0x90, 0x94, 0xFD, 0xE0, 0x90, 0x94, 0xFF,
-0xF0, 0x71, 0xB6, 0x7F, 0xF5, 0x7E, 0x01, 0x12,
-0x5F, 0xA6, 0xBF, 0x01, 0x08, 0x90, 0x94, 0xFD,
-0xE0, 0x90, 0x95, 0x00, 0xF0, 0x71, 0xB6, 0x7F,
-0xF6, 0x7E, 0x01, 0x12, 0x5F, 0xA6, 0xBF, 0x01,
-0x08, 0x90, 0x94, 0xFD, 0xE0, 0x90, 0x95, 0x01,
-0xF0, 0x71, 0xB6, 0x7F, 0xF7, 0x7E, 0x01, 0x12,
-0x5F, 0xA6, 0xBF, 0x01, 0x08, 0x90, 0x94, 0xFD,
-0xE0, 0x90, 0x95, 0x02, 0xF0, 0x71, 0xB6, 0x7F,
-0xF8, 0x7E, 0x01, 0x12, 0x5F, 0xA6, 0xBF, 0x01,
-0x08, 0x90, 0x94, 0xFD, 0xE0, 0x90, 0x95, 0x03,
-0xF0, 0x71, 0xB6, 0x71, 0xC8, 0xBF, 0x01, 0x08,
-0x90, 0x94, 0xFD, 0xE0, 0x90, 0x95, 0x04, 0xF0,
-0x71, 0xB6, 0x71, 0xBD, 0x70, 0x52, 0x90, 0x94,
-0xFD, 0xE0, 0x90, 0x95, 0x05, 0xF0, 0x54, 0x07,
-0x60, 0x08, 0x90, 0x94, 0xFD, 0xE0, 0x54, 0xE0,
-0x70, 0x3E, 0x7B, 0x01, 0x7A, 0x94, 0x79, 0xFE,
-0x7F, 0xFA, 0x71, 0xBF, 0x70, 0x32, 0x90, 0x94,
-0xFD, 0xE0, 0xFC, 0x54, 0x07, 0x70, 0x12, 0x90,
-0x95, 0x05, 0xE0, 0xFE, 0x90, 0x94, 0xFE, 0xE0,
-0x54, 0x07, 0xFD, 0xEE, 0x4D, 0x90, 0x95, 0x05,
-0xF0, 0xEC, 0x54, 0xE0, 0x70, 0x12, 0x90, 0x95,
-0x05, 0xE0, 0xFF, 0x90, 0x94, 0xFE, 0xE0, 0x54,
-0xE0, 0xFE, 0xEF, 0x4E, 0x90, 0x95, 0x05, 0xF0,
-0x71, 0xB6, 0x7F, 0xFD, 0x71, 0xBF, 0x70, 0x47,
-0x90, 0x94, 0xFD, 0xE0, 0xFE, 0x54, 0xCC, 0x90,
-0x95, 0x06, 0xF0, 0xEE, 0x54, 0x0C, 0xFF, 0x60,
-0x08, 0x90, 0x94, 0xFD, 0xE0, 0x54, 0xC0, 0x70,
-0x2E, 0xEF, 0x70, 0x12, 0x90, 0x95, 0x06, 0xE0,
-0xFF, 0x90, 0x94, 0xFD, 0xE0, 0x54, 0x03, 0x12,
-0xB6, 0xEC, 0x90, 0x95, 0x06, 0xF0, 0x90, 0x94,
-0xFD, 0xE0, 0xFF, 0x54, 0xC0, 0x70, 0x10, 0x90,
-0x95, 0x06, 0xE0, 0xFE, 0xEF, 0x54, 0x30, 0x25,
-0xE0, 0x25, 0xE0, 0xFF, 0xEE, 0x4F, 0xF0, 0x71,
-0xB6, 0x7F, 0xF0, 0x7E, 0x01, 0x12, 0x5F, 0xA6,
-0xBF, 0x01, 0x08, 0x90, 0x94, 0xFD, 0xE0, 0x90,
-0x95, 0x07, 0xF0, 0x71, 0xB6, 0x7F, 0xF1, 0x7E,
-0x01, 0x12, 0x5F, 0xA6, 0xBF, 0x01, 0x08, 0x90,
-0x94, 0xFD, 0xE0, 0x90, 0x95, 0x08, 0xF0, 0x71,
-0xB6, 0x7F, 0xF2, 0x7E, 0x01, 0x12, 0x5F, 0xA6,
-0xBF, 0x01, 0x08, 0x90, 0x94, 0xFD, 0xE0, 0x90,
-0x95, 0x09, 0xF0, 0x71, 0xB6, 0x7F, 0xF3, 0x7E,
-0x01, 0x12, 0x5F, 0xA6, 0xBF, 0x01, 0x08, 0x90,
-0x94, 0xFD, 0xE0, 0x90, 0x95, 0x0A, 0xF0, 0x71,
-0xB6, 0x7F, 0xFC, 0x7E, 0x01, 0x12, 0x5F, 0xA6,
-0xBF, 0x01, 0x08, 0x90, 0x94, 0xFD, 0xE0, 0x90,
-0x95, 0x0B, 0xF0, 0x90, 0x94, 0xB7, 0x74, 0x19,
-0xF0, 0x90, 0x94, 0xD9, 0x74, 0x08, 0xF0, 0x90,
-0x94, 0xFF, 0xE0, 0x90, 0x94, 0xB9, 0xF0, 0x90,
-0x95, 0x00, 0xE0, 0x90, 0x94, 0xBA, 0xF0, 0x90,
-0x95, 0x01, 0xE0, 0x90, 0x94, 0xBB, 0xF0, 0x90,
-0x95, 0x02, 0xE0, 0x90, 0x94, 0xBC, 0xF0, 0x90,
-0x95, 0x03, 0xE0, 0x90, 0x94, 0xBD, 0xF0, 0x90,
-0x95, 0x04, 0xE0, 0x90, 0x94, 0xBE, 0xF0, 0x90,
-0x95, 0x05, 0xE0, 0x90, 0x94, 0xBF, 0xF0, 0x90,
-0x95, 0x06, 0xE0, 0x90, 0x94, 0xC0, 0xF0, 0x90,
-0x94, 0xDA, 0x74, 0x1A, 0xF0, 0x90, 0x94, 0xFC,
-0x74, 0x05, 0xF0, 0x90, 0x95, 0x07, 0xE0, 0x90,
-0x94, 0xDC, 0xF0, 0x90, 0x95, 0x08, 0xE0, 0x90,
-0x94, 0xDD, 0xF0, 0x90, 0x95, 0x09, 0xE0, 0x90,
-0x94, 0xDE, 0xF0, 0x90, 0x95, 0x0A, 0xE0, 0x90,
-0x94, 0xDF, 0xF0, 0x90, 0x95, 0x0B, 0xE0, 0x90,
-0x94, 0xE0, 0xF0, 0x90, 0x94, 0xB6, 0xE0, 0xB4,
-0x01, 0x1A, 0x7B, 0x01, 0x7A, 0x94, 0x79, 0xB7,
-0x12, 0xAF, 0x87, 0x12, 0x04, 0x7E, 0x7B, 0x01,
-0x7A, 0x94, 0x79, 0xDA, 0x12, 0x8D, 0x16, 0x7F,
-0x04, 0x02, 0x04, 0x7E, 0x75, 0x45, 0x01, 0x75,
-0x46, 0x94, 0x75, 0x47, 0xB7, 0x75, 0x48, 0x0A,
-0x7B, 0x01, 0x7A, 0x01, 0x79, 0xA0, 0x12, 0x69,
-0xF5, 0x75, 0x45, 0x01, 0x75, 0x46, 0x94, 0x75,
-0x47, 0xDC, 0x75, 0x48, 0x05, 0x7B, 0x01, 0x7A,
-0x01, 0x79, 0xAA, 0x02, 0x69, 0xF5, 0x7B, 0x01,
-0x7A, 0x94, 0x79, 0xFD, 0x22, 0x7F, 0xFB, 0x7E,
-0x01, 0x12, 0x5F, 0xA6, 0xEF, 0x64, 0x01, 0x22,
-0x7F, 0xF9, 0x7E, 0x01, 0x02, 0x5F, 0xA6, 0x90,
-0x00, 0x80, 0xE0, 0x44, 0x80, 0xF0, 0x12, 0xC7,
-0x75, 0xF1, 0x93, 0x12, 0x7B, 0x79, 0x12, 0xC9,
-0x23, 0xF1, 0xA0, 0x7F, 0x01, 0x12, 0x84, 0x15,
-0x90, 0x93, 0x49, 0x74, 0x02, 0xF0, 0xFF, 0x12,
-0x84, 0x15, 0x90, 0x93, 0x49, 0xE0, 0x04, 0xF0,
-0x91, 0x48, 0x12, 0xB1, 0x40, 0x90, 0x00, 0x80,
-0xE0, 0x44, 0x40, 0xF0, 0x75, 0x20, 0xFF, 0x12,
-0x7C, 0x97, 0x90, 0x01, 0xA0, 0xE0, 0xB4, 0xFD,
-0x04, 0xE4, 0xFF, 0x31, 0x68, 0x91, 0x8E, 0x90,
-0x00, 0x81, 0xE0, 0x44, 0x04, 0xF0, 0xF1, 0x73,
-0x12, 0x9B, 0x1B, 0x90, 0x00, 0xAA, 0xE0, 0x44,
-0x02, 0xF0, 0xA3, 0xE0, 0x44, 0x80, 0xF0, 0x90,
-0x06, 0x0A, 0xE0, 0x44, 0x10, 0xF0, 0x90, 0x07,
-0xDB, 0xE0, 0x44, 0x80, 0xF0, 0x90, 0x06, 0x0D,
-0x74, 0xFF, 0xF0, 0xE4, 0xFF, 0x02, 0x84, 0x9E,
-0x12, 0x7B, 0x1B, 0x90, 0x86, 0xB3, 0xEF, 0xF0,
-0x91, 0x62, 0x90, 0x01, 0x64, 0x74, 0x01, 0xF0,
-0x90, 0x04, 0x23, 0xE0, 0x44, 0x80, 0xF0, 0x02,
-0x67, 0xD2, 0xF1, 0x6B, 0x12, 0x76, 0x6D, 0x12,
-0x75, 0xE0, 0x12, 0xC2, 0x16, 0x12, 0xC2, 0x4F,
-0x75, 0x21, 0x80, 0xE4, 0xF5, 0x22, 0xF5, 0x23,
-0x75, 0x24, 0x80, 0x90, 0x00, 0x50, 0xE5, 0x21,
-0xF0, 0xA3, 0xE5, 0x22, 0xF0, 0xA3, 0xE5, 0x23,
-0xF0, 0xA3, 0xE5, 0x24, 0xF0, 0x22, 0xE4, 0x90,
-0x94, 0xB6, 0xF0, 0xA3, 0xF0, 0xF1, 0x87, 0xEF,
-0x64, 0x01, 0x60, 0x3B, 0xC3, 0x90, 0x94, 0xB7,
-0xE0, 0x94, 0x88, 0x90, 0x94, 0xB6, 0xE0, 0x94,
-0x13, 0x40, 0x0F, 0x90, 0x01, 0xC1, 0xE0, 0x44,
-0x10, 0xF0, 0x90, 0x01, 0xC7, 0x74, 0xFD, 0xF0,
-0x80, 0x1D, 0x90, 0x94, 0xB6, 0x91, 0xDE, 0xB1,
-0xB4, 0xD3, 0x90, 0x94, 0xB7, 0xE0, 0x94, 0x32,
-0x90, 0x94, 0xB6, 0xE0, 0x94, 0x00, 0x40, 0xC5,
-0x90, 0x01, 0xC6, 0xE0, 0x30, 0xE3, 0xBE, 0x90,
-0x01, 0xC7, 0x74, 0xFE, 0xF0, 0x22, 0xE4, 0x75,
-0xF0, 0x01, 0x02, 0x02, 0xE7, 0xE4, 0x90, 0x96,
-0xD4, 0xF0, 0xA3, 0xF0, 0x90, 0x02, 0x86, 0xE0,
-0x20, 0xE1, 0x22, 0xC3, 0x90, 0x96, 0xD5, 0xE0,
-0x94, 0xD0, 0x90, 0x96, 0xD4, 0xE0, 0x94, 0x07,
-0x40, 0x0A, 0x90, 0x01, 0xC1, 0xE0, 0x44, 0x04,
-0xF0, 0x7F, 0x00, 0x22, 0x90, 0x96, 0xD4, 0x91,
-0xDE, 0xF1, 0x64, 0x80, 0xD7, 0x7F, 0x01, 0x22,
-0x90, 0x93, 0x0E, 0xE0, 0xFD, 0x7C, 0x00, 0xA3,
-0xE0, 0xFE, 0xA3, 0xE0, 0xFF, 0x12, 0x02, 0x92,
-0xED, 0x4C, 0x70, 0x05, 0x90, 0x93, 0x1B, 0x80,
-0x2A, 0xED, 0x64, 0x01, 0x4C, 0x70, 0x05, 0x90,
-0x93, 0x1C, 0x80, 0x1F, 0xED, 0x64, 0x02, 0x4C,
-0x70, 0x05, 0x90, 0x93, 0x1D, 0x80, 0x14, 0xED,
-0x64, 0x03, 0x4C, 0x70, 0x05, 0x90, 0x93, 0x1E,
-0x80, 0x09, 0xED, 0x64, 0x04, 0x4C, 0x70, 0x0C,
-0x90, 0x93, 0x1F, 0xE0, 0xFF, 0xF1, 0x7D, 0x90,
-0x93, 0x0F, 0x91, 0xDE, 0x22, 0x90, 0x96, 0xCB,
-0xEF, 0x12, 0x97, 0xEB, 0x90, 0x01, 0x09, 0xE0,
-0x7F, 0x00, 0x30, 0xE7, 0x02, 0x7F, 0x01, 0x90,
-0x96, 0xCB, 0xE0, 0x6F, 0x60, 0x34, 0xC3, 0x90,
-0x96, 0xCD, 0xE0, 0x94, 0x88, 0x90, 0x96, 0xCC,
-0xE0, 0x94, 0x13, 0x40, 0x08, 0x90, 0x01, 0xC0,
-0xE0, 0x44, 0x10, 0xF0, 0x22, 0x90, 0x96, 0xCC,
-0x91, 0xDE, 0xB1, 0xB4, 0xD3, 0x90, 0x96, 0xCD,
-0xE0, 0x94, 0x32, 0x90, 0x96, 0xCC, 0xE0, 0x94,
-0x00, 0x40, 0xC1, 0x90, 0x01, 0xC6, 0xE0, 0x30,
-0xE0, 0xBA, 0x22, 0xF0, 0x7F, 0x14, 0x7E, 0x00,
-0x02, 0x7C, 0x6A, 0x75, 0x61, 0x14, 0x90, 0x88,
-0x32, 0xE0, 0x44, 0x10, 0xF0, 0xF1, 0xB2, 0xF0,
-0x7D, 0x01, 0x12, 0x76, 0xF7, 0x90, 0x88, 0x41,
-0xE0, 0x90, 0x00, 0x93, 0xF0, 0x90, 0x88, 0x37,
-0xE0, 0x60, 0x12, 0x90, 0x01, 0x2F, 0xE0, 0x30,
-0xE7, 0x05, 0x74, 0x10, 0xF0, 0x80, 0x06, 0x90,
-0x01, 0x2F, 0x74, 0x90, 0xF0, 0x90, 0x93, 0x31,
-0xE0, 0x30, 0xE0, 0x61, 0x90, 0xFD, 0x09, 0xE4,
-0xF0, 0x90, 0xFD, 0x08, 0xF0, 0x90, 0x0E, 0x4B,
-0xE0, 0x54, 0xFC, 0xF0, 0xE4, 0x90, 0x95, 0x11,
-0xF0, 0x90, 0x95, 0x11, 0xE0, 0xFF, 0xC3, 0x94,
-0x05, 0x50, 0x2E, 0x12, 0xB7, 0x0A, 0x80, 0x05,
-0xC3, 0x33, 0xCE, 0x33, 0xCE, 0xD8, 0xF9, 0xFF,
-0x90, 0x93, 0x33, 0xE0, 0xFD, 0xEF, 0x5D, 0x60,
-0x10, 0x90, 0x95, 0x11, 0x12, 0xDD, 0x6E, 0x90,
-0x95, 0x11, 0x12, 0xDD, 0x4D, 0x44, 0x20, 0xB1,
-0xB3, 0x90, 0x95, 0x11, 0xE0, 0x04, 0xF0, 0x80,
-0xC8, 0x90, 0x00, 0x92, 0xE0, 0x54, 0xFE, 0xF0,
-0xE0, 0x44, 0x08, 0xF0, 0x90, 0x00, 0x02, 0xE0,
-0x54, 0xFD, 0xF0, 0x80, 0x07, 0x90, 0x00, 0x92,
-0xE0, 0x44, 0x01, 0xF0, 0x90, 0x00, 0x08, 0xE0,
-0x44, 0x10, 0xF0, 0x7F, 0x01, 0xB1, 0x65, 0x90,
-0x00, 0x90, 0xE0, 0x44, 0x01, 0xF0, 0x00, 0x00,
-0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+0xC3, 0xC0, 0xD0, 0x90, 0x96, 0xE7, 0xED, 0xF0,
+0xA3, 0xEB, 0xF0, 0x90, 0x96, 0xE6, 0xEF, 0xF0,
+0xE4, 0xFD, 0xFC, 0x12, 0xD7, 0x92, 0x90, 0x96,
+0xE9, 0xF0, 0x12, 0x7B, 0x07, 0x7C, 0x00, 0xAD,
+0x07, 0x90, 0x96, 0xE6, 0xE0, 0x90, 0x04, 0x25,
+0xF0, 0x90, 0x96, 0xE7, 0xE0, 0x60, 0x05, 0xF1,
+0x1B, 0x44, 0x80, 0xF0, 0xAF, 0x05, 0x74, 0x20,
+0x2F, 0xF5, 0x82, 0xE4, 0x34, 0xFC, 0xF5, 0x83,
+0xE0, 0x54, 0xC0, 0xF0, 0xF1, 0x1B, 0x54, 0xC0,
+0xF0, 0x90, 0x96, 0xE9, 0xE0, 0xFF, 0xAE, 0x05,
+0x74, 0x18, 0x2E, 0xF5, 0x82, 0xE4, 0x34, 0xFC,
+0xF5, 0x83, 0xEF, 0xF0, 0x90, 0x00, 0x8B, 0xE0,
+0xD3, 0x94, 0x03, 0x74, 0x10, 0x2E, 0xF5, 0x82,
+0xE4, 0x34, 0xFC, 0xF5, 0x83, 0x74, 0x04, 0xF0,
+0xAF, 0x05, 0xD1, 0x51, 0xE0, 0x54, 0x01, 0xFE,
+0x90, 0x96, 0xE8, 0xE0, 0x25, 0xE0, 0x25, 0xE0,
+0xFB, 0xEE, 0x44, 0x02, 0x4B, 0xD1, 0x50, 0xEE,
+0xF0, 0x74, 0x11, 0x2F, 0xF5, 0x82, 0xE4, 0x34,
+0xFC, 0xF5, 0x83, 0x74, 0xFF, 0xF0, 0x74, 0x29,
+0x2F, 0xF5, 0x82, 0xE4, 0x34, 0xFC, 0xF5, 0x83,
+0xE0, 0x54, 0xF7, 0xF0, 0x74, 0x0D, 0x2D, 0xF5,
+0x82, 0xE4, 0x34, 0xFC, 0xF5, 0x83, 0xE0, 0x44,
+0x80, 0xF0, 0xAE, 0x04, 0xAF, 0x05, 0xD0, 0xD0,
+0x92, 0xAF, 0x22, 0x74, 0x21, 0x2F, 0xF5, 0x82,
+0xE4, 0x34, 0xFC, 0xF5, 0x83, 0xE0, 0x22, 0x90,
+0x88, 0x38, 0xE0, 0xFF, 0x90, 0x8A, 0xB9, 0xE0,
+0xFC, 0xA3, 0xE0, 0xF5, 0x82, 0x22, 0xEF, 0xB4,
+0xFF, 0x06, 0x90, 0x93, 0x5E, 0xED, 0xF0, 0x22,
+0xEF, 0xF4, 0xFE, 0x90, 0x93, 0x5E, 0xE0, 0x5E,
+0xFE, 0xED, 0x5F, 0x4E, 0xF0, 0x22, 0xEF, 0xB4,
+0xFF, 0x06, 0x90, 0x93, 0x5F, 0xED, 0xF0, 0x22,
+0xEF, 0xF4, 0xFE, 0x90, 0x93, 0x5F, 0x80, 0xE6,
+0x90, 0x00, 0x80, 0xE0, 0x44, 0x80, 0xF0, 0x12,
+0xC7, 0x9B, 0x12, 0xD8, 0x19, 0x12, 0x7B, 0x79,
+0x12, 0xBE, 0x73, 0x12, 0xC0, 0x04, 0x7F, 0x01,
+0x12, 0x84, 0x15, 0x90, 0x93, 0x4A, 0x74, 0x02,
+0xF0, 0xFF, 0x12, 0x84, 0x15, 0x90, 0x93, 0x4A,
+0xE0, 0x04, 0xF0, 0x12, 0xC3, 0xCE, 0x12, 0x9F,
+0x52, 0x90, 0x00, 0x80, 0xE0, 0x44, 0x40, 0xF0,
+0x75, 0x20, 0xFF, 0x12, 0x7C, 0x97, 0x53, 0xA8,
+0xFE, 0x90, 0x01, 0xA0, 0xE0, 0xB4, 0xFD, 0x04,
+0xE4, 0xFF, 0x31, 0x66, 0x12, 0xBE, 0xE2, 0x90,
+0x00, 0x81, 0xE0, 0x44, 0x04, 0xF0, 0x12, 0xC7,
+0x91, 0x11, 0xD3, 0x12, 0x9F, 0x0C, 0xA3, 0xE0,
+0x44, 0x80, 0xF0, 0x90, 0x06, 0x0A, 0xE0, 0x44,
+0x10, 0xF0, 0x90, 0x07, 0xDB, 0xE0, 0x44, 0x80,
+0xF0, 0x90, 0x06, 0x0D, 0x74, 0xFF, 0xF0, 0xE4,
+0xFF, 0x02, 0x84, 0x9E, 0xE4, 0x75, 0xF0, 0x01,
+0x02, 0x02, 0xE7, 0x25, 0xE0, 0x25, 0xE0, 0xFE,
+0xEF, 0x4E, 0x22, 0x12, 0x02, 0x06, 0xFF, 0x54,
+0x80, 0xFE, 0x90, 0x93, 0x58, 0xE0, 0x54, 0x7F,
+0x4E, 0xFE, 0xF0, 0xEF, 0x54, 0x40, 0xFF, 0xEE,
+0x54, 0xBF, 0x4F, 0x11, 0xB3, 0x54, 0x20, 0xFD,
+0xEF, 0x54, 0xDF, 0x4D, 0xFF, 0x90, 0x93, 0x58,
+0xF0, 0xEE, 0x54, 0x10, 0xFE, 0xEF, 0x54, 0xEF,
+0x4E, 0xFF, 0xF0, 0x12, 0x02, 0x06, 0x54, 0x0F,
+0xFE, 0xEF, 0x54, 0xF0, 0x4E, 0x90, 0x93, 0x58,
+0x12, 0x87, 0x86, 0xFF, 0x54, 0x7F, 0x90, 0x93,
+0x5A, 0xF0, 0xEF, 0x54, 0x80, 0x12, 0x8D, 0x35,
+0xFF, 0x90, 0x93, 0x59, 0xE0, 0x54, 0xFE, 0x12,
+0x87, 0x24, 0x90, 0x93, 0x5B, 0x12, 0x87, 0x75,
+0x54, 0x01, 0x25, 0xE0, 0xFF, 0x90, 0x93, 0x59,
+0xE0, 0x54, 0xFD, 0x4F, 0xF0, 0x11, 0x5F, 0x20,
+0xE0, 0x02, 0x7D, 0x01, 0x02, 0x96, 0x44, 0x90,
+0x93, 0x58, 0xE0, 0xFE, 0x54, 0x0F, 0xFF, 0xEE,
+0xC4, 0x13, 0x13, 0x54, 0x03, 0x7D, 0x00, 0x22,
+0x90, 0x93, 0x58, 0xE0, 0xFF, 0x12, 0x8D, 0x35,
+0x30, 0xE0, 0x1B, 0xEF, 0xC4, 0x54, 0x0F, 0x30,
+0xE0, 0x03, 0x12, 0xD7, 0xEF, 0x90, 0x93, 0x59,
+0xE0, 0x30, 0xE0, 0x0A, 0x11, 0x5F, 0x20, 0xE0,
+0x02, 0x7D, 0x01, 0x12, 0x96, 0x44, 0x22, 0x90,
+0x88, 0x36, 0xE0, 0x60, 0x14, 0x90, 0x06, 0x92,
+0xE0, 0x30, 0xE1, 0x08, 0x90, 0x8B, 0x01, 0x12,
+0x8E, 0xAD, 0x80, 0x05, 0x12, 0xE0, 0xB2, 0xD1,
+0x85, 0x80, 0xBD, 0xFF, 0xF0, 0x12, 0x02, 0x06,
+0xFE, 0x22, 0x12, 0xB3, 0xFD, 0xFF, 0x54, 0x01,
+0xFE, 0x90, 0x93, 0x2A, 0x12, 0xE0, 0x7E, 0x11,
+0xB3, 0x54, 0x04, 0xFD, 0xEF, 0x54, 0xFB, 0x4D,
+0xFF, 0x90, 0x93, 0x2A, 0xF0, 0xEE, 0x54, 0x08,
+0xFE, 0xEF, 0x54, 0xF7, 0x4E, 0xF0, 0x90, 0x05,
+0x52, 0xE0, 0x54, 0x07, 0x90, 0x94, 0xBD, 0x60,
+0x16, 0x12, 0x86, 0x6D, 0x12, 0x87, 0x87, 0xFD,
+0x90, 0x05, 0x56, 0xE0, 0xC3, 0x9D, 0x90, 0x93,
+0x2C, 0xF0, 0xA3, 0xED, 0xF0, 0x80, 0x26, 0x12,
+0x86, 0x6D, 0x12, 0x87, 0x87, 0xFB, 0xFF, 0x90,
+0x05, 0x54, 0xE0, 0xC3, 0x9F, 0xFF, 0xE4, 0x94,
+0x00, 0xFE, 0x7C, 0x00, 0x7D, 0x05, 0x12, 0x02,
+0x92, 0x90, 0x93, 0x2C, 0xEF, 0xF0, 0xEB, 0x75,
+0xF0, 0x05, 0x84, 0xA3, 0xF0, 0x12, 0x90, 0xD3,
+0x12, 0x02, 0x06, 0x20, 0xE0, 0x13, 0x12, 0x8E,
+0xAA, 0x90, 0x8A, 0xF9, 0x12, 0x8A, 0x5F, 0x12,
+0x97, 0xF1, 0x90, 0x01, 0x57, 0xE4, 0xF0, 0x80,
+0x0C, 0x90, 0x8A, 0x89, 0x12, 0x8A, 0x5F, 0x12,
+0x8F, 0xCF, 0x12, 0x8F, 0xC7, 0xB1, 0x35, 0x20,
+0xE0, 0x04, 0xEF, 0x44, 0x20, 0xF0, 0x12, 0x8F,
+0xD6, 0x30, 0xE0, 0x18, 0x90, 0x88, 0x36, 0x74,
+0x01, 0xF0, 0xE4, 0x90, 0x88, 0x38, 0xF0, 0x31,
+0x8C, 0xF1, 0xA9, 0x90, 0x92, 0x98, 0x74, 0x06,
+0xF0, 0x02, 0x6E, 0x2F, 0xE4, 0x90, 0x88, 0x36,
+0xF0, 0x90, 0x88, 0x38, 0x74, 0x0C, 0xF0, 0x90,
+0x88, 0x31, 0xE0, 0x54, 0xFE, 0xF0, 0xA3, 0xE0,
+0x54, 0xFB, 0xF0, 0x22, 0x90, 0x88, 0x32, 0xE0,
+0x44, 0x04, 0xF0, 0x22, 0xE4, 0x90, 0x95, 0xCB,
+0xF0, 0xB1, 0xBA, 0x60, 0x02, 0x41, 0xD3, 0x90,
+0x88, 0x36, 0xE0, 0x70, 0x02, 0x41, 0xD3, 0x90,
+0x88, 0x9D, 0xE0, 0x20, 0xE0, 0x2F, 0x90, 0x06,
+0xA9, 0xE0, 0x54, 0xC0, 0x70, 0x27, 0x90, 0x88,
+0x9C, 0xE0, 0x70, 0x21, 0x90, 0x04, 0x1A, 0xE0,
+0xF4, 0x70, 0x1A, 0xA3, 0xE0, 0x54, 0x07, 0xFF,
+0xBF, 0x07, 0x12, 0x90, 0x06, 0x62, 0xE0, 0x54,
+0x03, 0x70, 0x0A, 0x90, 0x88, 0x39, 0xE0, 0xB4,
+0x04, 0x03, 0x12, 0xC6, 0x76, 0x90, 0x05, 0x63,
+0xE0, 0x90, 0x88, 0x85, 0xF0, 0x90, 0x05, 0x62,
+0xE0, 0x90, 0x88, 0x86, 0xF0, 0x90, 0x05, 0x61,
+0xE0, 0x90, 0x88, 0x87, 0xF0, 0x90, 0x05, 0x60,
+0xE0, 0x90, 0x88, 0x88, 0xF0, 0x90, 0x07, 0xF1,
+0xE0, 0x90, 0x94, 0xA0, 0xF0, 0x90, 0x07, 0xF0,
+0xE0, 0x90, 0x94, 0xA1, 0xF0, 0xF1, 0x90, 0x90,
+0x88, 0x3A, 0xE0, 0x54, 0xEC, 0xF0, 0x51, 0xDC,
+0x24, 0xFD, 0x50, 0x02, 0x80, 0x02, 0xD1, 0xAD,
+0x51, 0xDC, 0x64, 0x01, 0x70, 0x3A, 0x90, 0x06,
+0xAB, 0xE0, 0x90, 0x88, 0x3D, 0xF0, 0x90, 0x06,
+0xA9, 0xE0, 0x30, 0xE5, 0x06, 0xA3, 0xE0, 0x90,
+0x95, 0xCB, 0xF0, 0x90, 0x95, 0xCB, 0xE0, 0xFF,
+0x60, 0x02, 0x80, 0x05, 0x90, 0x88, 0x3C, 0xE0,
+0xFF, 0x90, 0x88, 0x3C, 0xEF, 0xF0, 0xA3, 0xE0,
+0xFF, 0x70, 0x08, 0x90, 0x88, 0x3C, 0xE0, 0xFE,
+0xFF, 0x80, 0x00, 0x90, 0x88, 0x3D, 0xEF, 0xF0,
+0x51, 0xF0, 0xE4, 0x90, 0x88, 0x3F, 0xF0, 0xA3,
+0xF0, 0x90, 0x88, 0x32, 0xB1, 0x38, 0x30, 0xE0,
+0x60, 0xEF, 0xC4, 0x13, 0x13, 0x54, 0x03, 0x20,
+0xE0, 0x23, 0x51, 0xD4, 0x6F, 0x70, 0x52, 0xEF,
+0x60, 0x4F, 0x90, 0x88, 0x32, 0xE0, 0x44, 0x40,
+0xF0, 0xD1, 0x75, 0x51, 0xE5, 0x12, 0x7C, 0x05,
+0x12, 0xE0, 0xAB, 0xB1, 0xB2, 0x90, 0x88, 0x3D,
+0xE0, 0x14, 0xF0, 0x80, 0x34, 0x90, 0x88, 0x34,
+0xE0, 0xC4, 0x54, 0x0F, 0x64, 0x01, 0x70, 0x29,
+0x51, 0xD4, 0xFE, 0x6F, 0x60, 0x23, 0x90, 0x05,
+0x73, 0xE0, 0xFF, 0xEE, 0x6F, 0x60, 0x1A, 0x90,
+0x88, 0x32, 0xB1, 0x2E, 0x30, 0xE0, 0x12, 0xEF,
+0x54, 0xBF, 0x51, 0xE5, 0x12, 0x7C, 0x3B, 0x7D,
+0x01, 0x7F, 0x02, 0x12, 0x7C, 0x74, 0x12, 0xBD,
+0x49, 0x31, 0x8C, 0x22, 0x90, 0x88, 0x3C, 0xE0,
+0xFF, 0xA3, 0xE0, 0x22, 0x90, 0x88, 0x34, 0xE0,
+0xFF, 0xC4, 0x54, 0x0F, 0x22, 0xF0, 0x90, 0x01,
+0x3F, 0x74, 0x10, 0xF0, 0xFD, 0x7F, 0x03, 0x22,
+0x90, 0x88, 0x85, 0x12, 0x04, 0xB8, 0xC0, 0x06,
+0xC0, 0x07, 0x90, 0x94, 0xA1, 0xE0, 0x24, 0x46,
+0xFF, 0x90, 0x94, 0xA0, 0xE0, 0x34, 0x00, 0xAB,
+0x07, 0xFA, 0xE4, 0xF9, 0xF8, 0xD0, 0x07, 0xD0,
+0x06, 0x12, 0x86, 0x39, 0x90, 0x88, 0x85, 0xB1,
+0x01, 0xEF, 0x24, 0x46, 0xFF, 0xE4, 0x3E, 0xFE,
+0xE4, 0x3D, 0xFD, 0xE4, 0x3C, 0xFC, 0x90, 0x88,
+0x89, 0xB1, 0x01, 0x90, 0x88, 0x85, 0x12, 0x86,
+0x61, 0xC3, 0x12, 0x03, 0xDA, 0x50, 0x02, 0x61,
+0xEC, 0x90, 0x88, 0x89, 0x12, 0x86, 0x61, 0x90,
+0x88, 0x85, 0x12, 0x04, 0xB8, 0x12, 0x86, 0x39,
+0x90, 0x95, 0xD0, 0x12, 0x04, 0x31, 0x90, 0x88,
+0x31, 0xE0, 0x30, 0xE0, 0x2F, 0x90, 0x88, 0x53,
+0xE0, 0x24, 0x04, 0xFF, 0xE4, 0x33, 0xFE, 0xEF,
+0x78, 0x03, 0xC3, 0x33, 0xCE, 0x33, 0xCE, 0xD8,
+0xF9, 0x24, 0x50, 0xFF, 0xE4, 0x3E, 0xFE, 0x90,
+0x88, 0x4E, 0xE0, 0xFD, 0xC3, 0xEF, 0x9D, 0xFB,
+0xEE, 0x94, 0x00, 0xFA, 0xB1, 0x0A, 0xEB, 0x2F,
+0xFF, 0xEA, 0x80, 0x1D, 0x90, 0x88, 0x33, 0xB1,
+0x2E, 0x30, 0xE0, 0x02, 0x81, 0xE6, 0xB1, 0x0A,
+0x90, 0x88, 0x4E, 0xE0, 0xFD, 0xC3, 0x74, 0x60,
+0x9D, 0xCD, 0xE4, 0x94, 0x00, 0xCD, 0x2F, 0xFF,
+0xED, 0x3E, 0x90, 0x95, 0xCC, 0xF0, 0xA3, 0xEF,
+0xF0, 0xC3, 0x90, 0x95, 0xCD, 0xE0, 0x94, 0xA0,
+0x90, 0x95, 0xCC, 0xE0, 0x94, 0x00, 0x50, 0x34,
+0xA3, 0xE0, 0xFB, 0x24, 0x60, 0x91, 0xF9, 0xE0,
+0x04, 0xF0, 0x90, 0x95, 0xD0, 0x12, 0x04, 0xB8,
+0xEF, 0x54, 0x7F, 0xFF, 0x74, 0x00, 0x2B, 0x91,
+0xEE, 0xE0, 0xFE, 0xEF, 0xC3, 0x9E, 0x50, 0x09,
+0x90, 0x95, 0xCC, 0xA3, 0xE0, 0x91, 0xEC, 0xEF,
+0xF0, 0x90, 0x88, 0x4C, 0xE0, 0x04, 0xF0, 0xE0,
+0x90, 0x00, 0xFE, 0xF0, 0x90, 0x88, 0x4C, 0xE0,
+0xFF, 0xD3, 0x90, 0x88, 0x90, 0xE0, 0x9F, 0x90,
+0x88, 0x8F, 0xE0, 0x94, 0x00, 0x40, 0x02, 0x81,
+0xE6, 0xE4, 0xFF, 0xFE, 0x91, 0xF6, 0xE0, 0x2F,
+0xFF, 0x90, 0x88, 0x91, 0xE0, 0xFD, 0xEF, 0xD3,
+0x9D, 0x40, 0x07, 0x90, 0x95, 0xCE, 0xEE, 0xF0,
+0x80, 0x05, 0x0E, 0xEE, 0xB4, 0xA0, 0xE5, 0xB1,
+0x15, 0x40, 0x02, 0x80, 0x15, 0x90, 0x95, 0xCE,
+0xE0, 0x04, 0xFE, 0xEE, 0xC3, 0x94, 0xA0, 0x50,
+0x13, 0x91, 0xF6, 0xE0, 0x2F, 0xFF, 0xB1, 0x15,
+0x40, 0x07, 0x90, 0x95, 0xCF, 0xEE, 0xF0, 0x80,
+0x03, 0x0E, 0x80, 0xE7, 0x90, 0x05, 0x5E, 0xE0,
+0xFF, 0x91, 0xE7, 0xE0, 0xFD, 0xEF, 0xC3, 0x9D,
+0x40, 0x11, 0xEF, 0x9D, 0x90, 0x05, 0x5E, 0xF0,
+0x90, 0x88, 0x51, 0xEE, 0xF0, 0x90, 0x95, 0xCF,
+0xE0, 0x80, 0x18, 0x91, 0xE7, 0xE0, 0xFD, 0xC3,
+0x74, 0x80, 0x9D, 0x2F, 0x90, 0x05, 0x5E, 0xF0,
+0xEE, 0x04, 0x90, 0x88, 0x51, 0xF0, 0x90, 0x95,
+0xCF, 0xE0, 0x04, 0x90, 0x88, 0x52, 0xF0, 0x90,
+0x88, 0x51, 0xE0, 0xFF, 0xC3, 0x94, 0x50, 0x40,
+0x0A, 0xEF, 0x24, 0xB0, 0x90, 0x88, 0x49, 0xF0,
+0xE4, 0x80, 0x0E, 0xE4, 0x90, 0x88, 0x49, 0xF0,
+0x90, 0x88, 0x51, 0xE0, 0xFF, 0xC3, 0x74, 0x50,
+0x9F, 0x90, 0x88, 0x48, 0xF0, 0x90, 0x88, 0x51,
+0xE0, 0xFF, 0xA3, 0xE0, 0xC3, 0x9F, 0x90, 0x88,
+0x4F, 0xF0, 0x90, 0x88, 0x31, 0xE0, 0x90, 0x88,
+0x8E, 0xE0, 0x24, 0x08, 0xFF, 0x90, 0x88, 0x4F,
+0xE0, 0x2F, 0xF0, 0x90, 0x88, 0x4F, 0xE0, 0xC3,
+0x94, 0x50, 0x50, 0x03, 0x74, 0x50, 0xF0, 0x90,
+0x88, 0x4F, 0xE0, 0x24, 0x10, 0xF0, 0xF1, 0xA9,
+0x12, 0xDF, 0xC9, 0x90, 0x8A, 0xA3, 0x12, 0x8A,
+0x5F, 0xE4, 0xFF, 0x12, 0x04, 0x7E, 0x22, 0x90,
+0x95, 0xCE, 0xE0, 0xFE, 0x24, 0x00, 0xF5, 0x82,
+0xE4, 0x34, 0x94, 0xF5, 0x83, 0x22, 0x74, 0x60,
+0x2E, 0xF5, 0x82, 0xE4, 0x34, 0x93, 0xF5, 0x83,
+0x22, 0x12, 0x04, 0x31, 0x90, 0x88, 0x89, 0x02,
+0x04, 0xB8, 0x90, 0x95, 0xD0, 0x12, 0x04, 0xB8,
+0x78, 0x07, 0x02, 0x03, 0xEB, 0x90, 0x88, 0x91,
+0xE0, 0xFD, 0xC3, 0x90, 0x88, 0x90, 0xE0, 0x9D,
+0xFD, 0x90, 0x88, 0x8F, 0xE0, 0x94, 0x00, 0xFC,
+0xEF, 0xD3, 0x9D, 0xE4, 0x9C, 0x22, 0xE0, 0xFF,
+0x13, 0x13, 0x54, 0x3F, 0x22, 0x90, 0x93, 0x2A,
+0xE0, 0xFF, 0x13, 0x13, 0x13, 0x54, 0x1F, 0x22,
+0x90, 0x88, 0x32, 0xB1, 0x38, 0x30, 0xE0, 0x0B,
+0xEF, 0xC4, 0x13, 0x13, 0x54, 0x03, 0x30, 0xE0,
+0x02, 0xB1, 0xB2, 0x90, 0x88, 0x31, 0xB1, 0x2E,
+0x30, 0xE0, 0x07, 0xEF, 0xF1, 0x9C, 0x70, 0x49,
+0x80, 0x45, 0x90, 0x88, 0x3F, 0xE0, 0x04, 0xF0,
+0x90, 0x88, 0x3A, 0xE0, 0x54, 0xEF, 0xF0, 0x12,
+0xDF, 0xD2, 0x40, 0x33, 0xB1, 0xB9, 0x70, 0x31,
+0xF1, 0x56, 0x70, 0x08, 0x90, 0x8A, 0xF5, 0x12,
+0x8E, 0xAD, 0x80, 0x26, 0x90, 0x8A, 0xF5, 0x12,
+0x8E, 0xAD, 0x90, 0x88, 0x40, 0xE0, 0x04, 0xF0,
+0xE0, 0xD3, 0x94, 0x02, 0x40, 0x09, 0xB1, 0xAA,
+0xE4, 0x90, 0x88, 0x40, 0xF0, 0x80, 0x02, 0xF1,
+0x17, 0xE4, 0x90, 0x88, 0x3F, 0xF0, 0x22, 0xD1,
+0x85, 0x22, 0x90, 0x88, 0x32, 0xE0, 0x54, 0xFB,
+0xF0, 0x22, 0x7D, 0x02, 0x7F, 0x02, 0x02, 0x7C,
+0x7E, 0xE4, 0xFF, 0x12, 0x78, 0x4A, 0xEF, 0x64,
+0x01, 0x22, 0xE4, 0xF5, 0x77, 0x90, 0x88, 0x36,
+0xE0, 0x60, 0x4F, 0xB1, 0xB9, 0x70, 0x4B, 0x12,
+0xE0, 0x48, 0x75, 0x77, 0x01, 0xE5, 0x77, 0x60,
+0x41, 0x90, 0x88, 0x39, 0xE0, 0x20, 0xE2, 0x08,
+0x90, 0x8A, 0xB9, 0x12, 0x8A, 0x5F, 0xD1, 0x6E,
+0xD1, 0x7D, 0x90, 0x88, 0x3F, 0xE0, 0x60, 0x04,
+0x64, 0x01, 0x70, 0x10, 0xD1, 0x1B, 0xFF, 0xA3,
+0xE0, 0x2F, 0x12, 0x8F, 0x97, 0xD1, 0x20, 0xFF,
+0xA3, 0xE0, 0x80, 0x0C, 0xD1, 0x1B, 0xD1, 0x2A,
+0x2F, 0x12, 0x8F, 0x97, 0xD1, 0x20, 0xD1, 0x2A,
+0x2F, 0x33, 0x33, 0x33, 0x54, 0xF8, 0x90, 0x88,
+0x4F, 0xF0, 0x22, 0xE4, 0x90, 0x92, 0x20, 0xF0,
+0x90, 0x88, 0x3E, 0xE0, 0x13, 0x13, 0x13, 0x54,
+0x1F, 0x22, 0xFF, 0xA3, 0xE0, 0x75, 0xF0, 0x03,
+0xA4, 0x24, 0xFE, 0x22, 0xE4, 0x90, 0x95, 0xF0,
+0xF0, 0x90, 0x88, 0x36, 0xE0, 0x60, 0x2E, 0xB1,
+0xB9, 0x70, 0x2A, 0xD1, 0x75, 0xF0, 0x12, 0xE0,
+0x48, 0x90, 0x95, 0xF0, 0x74, 0x01, 0xF0, 0xE4,
+0x90, 0x88, 0x3D, 0xF0, 0x04, 0x60, 0x16, 0x90,
+0x88, 0x39, 0xE0, 0x20, 0xE2, 0x08, 0x90, 0x8A,
+0xB9, 0x12, 0x8A, 0x5F, 0xD1, 0x6E, 0xD1, 0x7D,
+0xD1, 0x1B, 0x12, 0x8F, 0x97, 0x22, 0x7D, 0x01,
+0x7F, 0x04, 0x02, 0x04, 0x7E, 0x90, 0x88, 0x3C,
+0xE0, 0x90, 0x05, 0x73, 0x22, 0x90, 0x88, 0x3A,
+0xE0, 0x44, 0x10, 0xF0, 0x22, 0x12, 0xA7, 0x27,
+0x8C, 0x83, 0x7D, 0x01, 0x02, 0x04, 0x7E, 0xB1,
+0xB9, 0x70, 0x19, 0x90, 0x88, 0x36, 0xE0, 0x60,
+0x13, 0x90, 0x88, 0x3A, 0xE0, 0x20, 0xE4, 0x0C,
+0xF1, 0x90, 0x90, 0x88, 0x31, 0xE0, 0xF1, 0x9C,
+0x70, 0x02, 0xD1, 0x85, 0x22, 0xE4, 0xF5, 0x77,
+0x90, 0x06, 0xA9, 0xE0, 0xF5, 0x77, 0x54, 0xC0,
+0x70, 0x10, 0x90, 0x88, 0x3A, 0x12, 0xB7, 0xBC,
+0xD1, 0x85, 0x90, 0x88, 0x39, 0xE0, 0x60, 0x4E,
+0xE1, 0xCA, 0xE5, 0x77, 0x30, 0xE6, 0x27, 0x90,
+0x88, 0x36, 0xE0, 0x64, 0x01, 0x70, 0x22, 0x90,
+0x88, 0x3A, 0xE0, 0x44, 0x01, 0xF1, 0x55, 0x64,
+0x02, 0x60, 0x0F, 0x90, 0x88, 0x9D, 0xE0, 0x20,
+0xE0, 0x0F, 0x90, 0x8A, 0xE1, 0x12, 0x8E, 0xAD,
+0x80, 0x07, 0xF1, 0x17, 0x80, 0x03, 0x12, 0xBD,
+0x50, 0xE5, 0x77, 0x90, 0x88, 0x3A, 0x30, 0xE7,
+0x11, 0xE0, 0x44, 0x02, 0xF0, 0xF1, 0xEB, 0x12,
+0x8F, 0x96, 0x90, 0x88, 0x31, 0xE0, 0x44, 0x04,
+0xF0, 0x22, 0xE0, 0x54, 0xFD, 0xF0, 0x22, 0x90,
+0x94, 0xA2, 0x74, 0x01, 0xF0, 0x90, 0x06, 0x92,
+0x04, 0xF0, 0x90, 0x01, 0x3C, 0x74, 0x04, 0xF0,
+0x90, 0x88, 0x31, 0xE0, 0x44, 0x08, 0xF0, 0x90,
+0x88, 0x39, 0xE0, 0x64, 0x0C, 0x60, 0x11, 0x90,
+0x8A, 0xB9, 0x12, 0x8A, 0x5F, 0xF1, 0x89, 0x90,
+0x8A, 0xF9, 0x12, 0x8A, 0x5F, 0x12, 0x97, 0xF1,
+0x90, 0x8A, 0xAF, 0x12, 0x8A, 0x5F, 0x7D, 0x08,
+0xE4, 0xFF, 0x02, 0x04, 0x7E, 0xF0, 0x90, 0x88,
+0x34, 0xE0, 0x54, 0x0F, 0x22, 0x90, 0x88, 0x36,
+0xE0, 0x64, 0x01, 0x70, 0x23, 0xF1, 0x56, 0x60,
+0x11, 0x90, 0x8A, 0xB9, 0x12, 0x8A, 0x5F, 0xF1,
+0x89, 0x90, 0x8B, 0x01, 0x12, 0xBC, 0x6E, 0x02,
+0x04, 0x7A, 0x90, 0x88, 0x39, 0xE0, 0x70, 0x08,
+0x90, 0x8A, 0xB9, 0x12, 0x8A, 0x5F, 0xD1, 0x6E,
+0x22, 0xE4, 0xFD, 0x7F, 0x0C, 0x02, 0x04, 0x7E,
+0x90, 0x01, 0x57, 0xE4, 0xF0, 0x90, 0x01, 0x3C,
+0x74, 0x02, 0xF0, 0x22, 0x54, 0xFB, 0xF0, 0x90,
+0x88, 0x3A, 0xE0, 0x54, 0xFD, 0xF0, 0x54, 0x07,
+0x22, 0x90, 0x88, 0x48, 0xE0, 0xFF, 0xA3, 0xE0,
+0xFD, 0x90, 0x88, 0x4F, 0xE0, 0xFB, 0x22, 0x90,
+0x88, 0x39, 0xE0, 0xB4, 0x04, 0x02, 0xF1, 0xCA,
+0x90, 0x88, 0x9D, 0xE0, 0x20, 0xE0, 0x02, 0xF1,
+0x5D, 0x22, 0x90, 0x00, 0x02, 0xE0, 0x44, 0x01,
+0xF0, 0x22, 0xB1, 0xB9, 0x70, 0x14, 0x90, 0x88,
+0x36, 0xE0, 0x60, 0x0E, 0x90, 0x88, 0x3A, 0xE0,
+0x20, 0xE4, 0x07, 0xF1, 0x90, 0xF1, 0xEB, 0x12,
+0x8F, 0x96, 0x22, 0xE4, 0x90, 0x92, 0x20, 0xF0,
+0x90, 0x88, 0x94, 0x22, 0x12, 0x02, 0x06, 0x54,
+0x01, 0xFF, 0x90, 0x93, 0x5D, 0xE0, 0x54, 0xFE,
+0x4F, 0xF0, 0x22, 0x90, 0x96, 0xE3, 0x12, 0x86,
+0x76, 0x90, 0x96, 0xE2, 0xEF, 0xF0, 0x12, 0x86,
+0x7F, 0xB0, 0x96, 0x00, 0xB0, 0x9F, 0x01, 0xB0,
+0xA8, 0x06, 0xB0, 0xBB, 0x08, 0xB0, 0xC4, 0x09,
+0xB0, 0xCD, 0x0A, 0xB0, 0xD6, 0x12, 0xB0, 0xDF,
+0x13, 0xB0, 0xE8, 0x14, 0xB0, 0xF1, 0x1E, 0xB0,
+0xFA, 0x20, 0xB1, 0x02, 0x25, 0xB1, 0x0A, 0x26,
+0xB1, 0x13, 0x29, 0xB1, 0x1C, 0x2A, 0xB1, 0x24,
+0x40, 0xB1, 0x2F, 0x42, 0xB1, 0x3E, 0x43, 0xB1,
+0x47, 0x44, 0xB2, 0x11, 0x47, 0xB1, 0x50, 0x49,
+0xB1, 0x58, 0x60, 0xB1, 0x61, 0x61, 0xB1, 0x6A,
+0x62, 0xB1, 0x73, 0x63, 0xB1, 0x7C, 0x64, 0xB1,
+0x85, 0x65, 0xB1, 0x8E, 0x66, 0xB1, 0x97, 0x67,
+0xB1, 0xA0, 0x68, 0xB1, 0xA9, 0x69, 0xB1, 0xB2,
+0x6B, 0xB1, 0xBB, 0x6C, 0xB1, 0xC4, 0x6D, 0xB1,
+0xCD, 0x6E, 0xB1, 0xD6, 0x6F, 0xB1, 0xDF, 0x70,
+0xB1, 0xE8, 0xC2, 0xB1, 0xF0, 0xC3, 0xB1, 0xF9,
+0xC4, 0xB0, 0xB0, 0xC6, 0xB0, 0xB0, 0xC7, 0xB0,
+0xB0, 0xC8, 0x00, 0x00, 0xB2, 0x02, 0x90, 0x96,
+0xE3, 0x12, 0x86, 0x6D, 0x02, 0x86, 0xE0, 0x90,
+0x96, 0xE3, 0x12, 0x86, 0x6D, 0x02, 0x90, 0x02,
+0x90, 0x96, 0xE3, 0x12, 0x86, 0x6D, 0x41, 0x1E,
+0x90, 0x96, 0xE2, 0xE0, 0xFF, 0xA3, 0x12, 0x86,
+0x6D, 0x61, 0x4B, 0x90, 0x96, 0xE3, 0x12, 0x86,
+0x6D, 0x02, 0x97, 0xF7, 0x90, 0x96, 0xE3, 0x12,
+0x86, 0x6D, 0x02, 0x9F, 0xE8, 0x90, 0x96, 0xE3,
+0x12, 0x86, 0x6D, 0x02, 0x9F, 0xF5, 0x90, 0x96,
+0xE3, 0x12, 0x86, 0x6D, 0x02, 0xA0, 0x0E, 0x90,
+0x96, 0xE3, 0x12, 0x86, 0x6D, 0x02, 0xA7, 0xEB,
+0x90, 0x96, 0xE3, 0x12, 0x86, 0x6D, 0x02, 0xAF,
+0xF4, 0x90, 0x96, 0xE3, 0x12, 0x86, 0x6D, 0x02,
+0xA4, 0x1F, 0x90, 0x96, 0xE3, 0x12, 0x86, 0x6D,
+0x41, 0xB5, 0x90, 0x96, 0xE3, 0x12, 0x86, 0x6D,
+0xE1, 0xED, 0x90, 0x96, 0xE3, 0x12, 0x86, 0x6D,
+0x02, 0xA8, 0xBA, 0x90, 0x96, 0xE3, 0x12, 0x86,
+0x6D, 0x02, 0xB8, 0x30, 0x90, 0x96, 0xE3, 0x12,
+0x86, 0x6D, 0x81, 0x6A, 0x90, 0x96, 0xE3, 0x12,
+0x86, 0x6D, 0x90, 0x8A, 0xA5, 0x80, 0x09, 0x90,
+0x96, 0xE3, 0x12, 0x86, 0x6D, 0x90, 0x8A, 0xB5,
+0x12, 0x9F, 0xDE, 0x02, 0x04, 0x7E, 0x90, 0x96,
+0xE3, 0x12, 0x86, 0x6D, 0x02, 0x25, 0xEC, 0x90,
+0x96, 0xE3, 0x12, 0x86, 0x6D, 0x02, 0x5B, 0xF3,
+0x90, 0x96, 0xE3, 0x12, 0x86, 0x6D, 0xE1, 0xB4,
+0x90, 0x96, 0xE3, 0x12, 0x86, 0x6D, 0x02, 0x90,
+0xD9, 0x90, 0x96, 0xE3, 0x12, 0x86, 0x6D, 0x02,
+0x77, 0x4F, 0x90, 0x96, 0xE3, 0x12, 0x86, 0x6D,
+0x02, 0x7C, 0x60, 0x90, 0x96, 0xE3, 0x12, 0x86,
+0x6D, 0x02, 0x7A, 0xC6, 0x90, 0x96, 0xE3, 0x12,
+0x86, 0x6D, 0x02, 0x5D, 0x36, 0x90, 0x96, 0xE3,
+0x12, 0x86, 0x6D, 0x02, 0x7B, 0xE9, 0x90, 0x96,
+0xE3, 0x12, 0x86, 0x6D, 0x02, 0x70, 0x33, 0x90,
+0x96, 0xE3, 0x12, 0x86, 0x6D, 0x02, 0x48, 0xC9,
+0x90, 0x96, 0xE3, 0x12, 0x86, 0x6D, 0x02, 0x79,
+0xF3, 0x90, 0x96, 0xE3, 0x12, 0x86, 0x6D, 0x02,
+0x87, 0xCF, 0x90, 0x96, 0xE3, 0x12, 0x86, 0x6D,
+0x02, 0x51, 0x7B, 0x90, 0x96, 0xE3, 0x12, 0x86,
+0x6D, 0x02, 0x79, 0x30, 0x90, 0x96, 0xE3, 0x12,
+0x86, 0x6D, 0x02, 0x57, 0xF2, 0x90, 0x96, 0xE3,
+0x12, 0x86, 0x6D, 0x02, 0x74, 0x8D, 0x90, 0x96,
+0xE3, 0x12, 0x86, 0x6D, 0x02, 0x78, 0x9A, 0x90,
+0x96, 0xE3, 0x12, 0x86, 0x6D, 0x02, 0x5E, 0x0B,
+0x90, 0x96, 0xE3, 0x12, 0x86, 0x6D, 0x80, 0x22,
+0x90, 0x96, 0xE3, 0x12, 0x86, 0x6D, 0x02, 0xB8,
+0x46, 0x90, 0x96, 0xE3, 0x12, 0x86, 0x6D, 0x02,
+0x87, 0x8D, 0x90, 0x01, 0xC0, 0xE0, 0x44, 0x01,
+0xF0, 0x90, 0x96, 0xE2, 0xE0, 0x90, 0x01, 0xC2,
+0xF0, 0x22, 0x12, 0x02, 0x06, 0x90, 0x93, 0x4B,
+0xF0, 0x70, 0x02, 0xF1, 0xC4, 0x22, 0x12, 0x02,
+0x06, 0x64, 0x01, 0x60, 0x02, 0x41, 0xB4, 0x90,
+0x95, 0x04, 0xF0, 0x90, 0x95, 0x04, 0xE0, 0xFF,
+0xC3, 0x94, 0x10, 0x50, 0x27, 0xEF, 0x91, 0x06,
+0x7A, 0x95, 0x79, 0x03, 0x12, 0x5F, 0xA6, 0xBF,
+0x01, 0x12, 0x90, 0x95, 0x03, 0xE0, 0xFF, 0xA3,
+0xE0, 0x24, 0x05, 0xF5, 0x82, 0xE4, 0x34, 0x95,
+0xF5, 0x83, 0xEF, 0xF0, 0x90, 0x95, 0x04, 0xE0,
+0x04, 0xF0, 0x80, 0xCF, 0x75, 0x45, 0x01, 0x75,
+0x46, 0x95, 0x75, 0x47, 0x05, 0x75, 0x48, 0x08,
+0x7B, 0x01, 0x7A, 0x94, 0x79, 0xBF, 0x12, 0x69,
+0xF5, 0x90, 0x94, 0xBD, 0x74, 0x24, 0xF0, 0x90,
+0x94, 0xDF, 0x74, 0x08, 0xF0, 0x75, 0x45, 0x01,
+0x75, 0x46, 0x95, 0x75, 0x47, 0x0D, 0xF5, 0x48,
+0x7B, 0x01, 0x7A, 0x94, 0x79, 0xE2, 0x12, 0x69,
+0xF5, 0x90, 0x94, 0xE0, 0x74, 0x25, 0xF0, 0x90,
+0x95, 0x02, 0x74, 0x08, 0xF0, 0x12, 0xA0, 0xCC,
+0x12, 0x9F, 0xDB, 0x12, 0x04, 0x7E, 0x7B, 0x01,
+0x7A, 0x94, 0x79, 0xE0, 0x12, 0x8A, 0x4D, 0x7F,
+0x04, 0x12, 0x04, 0x7E, 0x22, 0x71, 0xFD, 0xFF,
+0x54, 0x7F, 0x90, 0x88, 0x36, 0xF0, 0xEF, 0x12,
+0x8D, 0x35, 0xA3, 0x12, 0x87, 0x86, 0xFD, 0x54,
+0xF0, 0xC4, 0x54, 0x0F, 0xFF, 0x90, 0x88, 0x34,
+0xE0, 0x54, 0xF0, 0x4F, 0x12, 0x87, 0x75, 0xFC,
+0x54, 0x01, 0x25, 0xE0, 0xFF, 0x90, 0x88, 0x31,
+0xE0, 0x54, 0xFD, 0x4F, 0xF0, 0xEC, 0x54, 0x04,
+0xC3, 0x13, 0xFF, 0x90, 0x88, 0x33, 0xE0, 0x54,
+0xFD, 0x4F, 0xF0, 0xED, 0x54, 0x0F, 0xC4, 0x54,
+0xF0, 0xFF, 0xA3, 0xE0, 0x54, 0x0F, 0x12, 0x87,
+0x24, 0x90, 0x88, 0x35, 0x12, 0x87, 0x7F, 0xFD,
+0x90, 0x8A, 0x89, 0x12, 0x8A, 0x5F, 0x7F, 0x02,
+0x12, 0x04, 0x7E, 0x90, 0x88, 0x9B, 0xF1, 0xBC,
+0x54, 0xFB, 0xF0, 0x54, 0xF7, 0xF0, 0x54, 0xEF,
+0xF0, 0x54, 0xDF, 0xF0, 0x54, 0xBF, 0xF0, 0x12,
+0x90, 0xD3, 0x12, 0x5C, 0x5F, 0x90, 0x88, 0x36,
+0xE0, 0xB4, 0x01, 0x07, 0x90, 0x88, 0x33, 0xE0,
+0x54, 0xFB, 0xF0, 0xF1, 0xD6, 0xF0, 0x90, 0x88,
+0x36, 0xF1, 0xE0, 0x12, 0xAF, 0x55, 0x90, 0x01,
+0xBE, 0xF0, 0x22, 0x71, 0xFD, 0x64, 0x01, 0x60,
+0x02, 0x61, 0xD8, 0xEF, 0x24, 0x39, 0x60, 0x12,
+0x14, 0x60, 0x19, 0x24, 0x02, 0x70, 0x1F, 0xE4,
+0x90, 0x94, 0xC3, 0xF0, 0xA3, 0x74, 0x06, 0xF0,
+0x80, 0x14, 0x90, 0x94, 0xC3, 0x74, 0x06, 0xF0,
+0xA3, 0xF0, 0x80, 0x0A, 0x90, 0x94, 0xC3, 0x74,
+0x0C, 0xF0, 0xA3, 0x74, 0x04, 0xF0, 0x71, 0xEC,
+0x71, 0xD9, 0x40, 0x1B, 0x90, 0x94, 0xC1, 0xE0,
+0x91, 0x06, 0x7A, 0x94, 0x79, 0xC0, 0x12, 0x5F,
+0xA6, 0xBF, 0x01, 0x07, 0x90, 0x94, 0xC0, 0xE0,
+0xF4, 0x70, 0x3D, 0x71, 0xE1, 0x80, 0xE1, 0x71,
+0xEC, 0x71, 0xD9, 0x40, 0x33, 0x90, 0x94, 0xC1,
+0xE0, 0xFD, 0x7C, 0x00, 0x24, 0xA8, 0xFF, 0xEC,
+0x34, 0x01, 0xFE, 0xED, 0x24, 0x01, 0xFD, 0xEC,
+0x33, 0xFC, 0x90, 0x94, 0xC3, 0xE0, 0xFB, 0xC3,
+0xED, 0x9B, 0xFD, 0xEC, 0x94, 0x00, 0xFC, 0x12,
+0x90, 0xD3, 0x8D, 0x82, 0x8C, 0x83, 0x12, 0x02,
+0x1F, 0xFD, 0x91, 0x10, 0x71, 0xE1, 0x80, 0xC9,
+0x22, 0x90, 0x94, 0xC2, 0xE0, 0xD3, 0x94, 0x00,
+0x22, 0x90, 0x94, 0xC1, 0xE0, 0x04, 0xF0, 0xA3,
+0xE0, 0x14, 0xF0, 0x22, 0x90, 0x94, 0xC3, 0xE0,
+0x90, 0x94, 0xC1, 0xF0, 0x90, 0x94, 0xC4, 0xE0,
+0x90, 0x94, 0xC2, 0xF0, 0x22, 0x90, 0x94, 0xBD,
+0x12, 0x86, 0x76, 0x02, 0x02, 0x06, 0x24, 0xA8,
+0xFF, 0xE4, 0x34, 0x01, 0xFE, 0x7B, 0x01, 0x22,
+0xE4, 0x90, 0x94, 0xC5, 0xF0, 0x90, 0x00, 0x37,
+0xE0, 0x44, 0x80, 0xF0, 0x90, 0x00, 0xCF, 0x74,
+0x69, 0xF0, 0xEF, 0x90, 0x00, 0x31, 0xF0, 0xEE,
+0x54, 0x03, 0xFF, 0xA3, 0xE0, 0x54, 0xFC, 0x4F,
+0xF0, 0x90, 0x00, 0x30, 0xED, 0xF0, 0x90, 0x00,
+0x33, 0xE0, 0x44, 0x80, 0xF0, 0x90, 0x00, 0x33,
+0xE0, 0x30, 0xE7, 0x09, 0x91, 0x62, 0x50, 0x05,
+0xE0, 0x04, 0xF0, 0x80, 0xF0, 0x90, 0x00, 0xCF,
+0xE4, 0xF0, 0x90, 0x00, 0x37, 0xE0, 0x54, 0x7F,
+0xF0, 0x91, 0x62, 0x7F, 0x00, 0x50, 0x02, 0x7F,
+0x01, 0x22, 0x90, 0x94, 0xC5, 0xE0, 0xC3, 0x94,
+0x64, 0x22, 0x90, 0x93, 0x32, 0xE0, 0x20, 0xE0,
+0x02, 0xA1, 0x2B, 0xE4, 0x90, 0x94, 0xBD, 0xF0,
+0xF1, 0xCC, 0x40, 0x02, 0xA1, 0x2B, 0xF1, 0x96,
+0x80, 0x05, 0xC3, 0x33, 0xCE, 0x33, 0xCE, 0xD8,
+0xF9, 0xFF, 0x90, 0x93, 0x33, 0xE0, 0xFD, 0xEF,
+0x5D, 0x60, 0x02, 0xA1, 0x23, 0x12, 0x02, 0x06,
+0xFF, 0x30, 0xE0, 0x1A, 0x90, 0x93, 0x34, 0xE0,
+0xFE, 0x90, 0x94, 0xBD, 0xE0, 0xFD, 0x74, 0x01,
+0xA8, 0x05, 0x08, 0x80, 0x02, 0xC3, 0x33, 0xD8,
+0xFC, 0x4E, 0x90, 0x93, 0x34, 0xF0, 0xEF, 0xC3,
+0x13, 0x30, 0xE0, 0x16, 0x90, 0x93, 0x35, 0xE0,
+0xFF, 0x90, 0x94, 0xBD, 0x12, 0x96, 0x3C, 0x80,
+0x02, 0xC3, 0x33, 0xD8, 0xFC, 0x4F, 0x90, 0x93,
+0x35, 0xF0, 0x12, 0x87, 0x87, 0xFF, 0x90, 0x94,
+0xBD, 0xE0, 0xFE, 0x24, 0x36, 0xF5, 0x82, 0xE4,
+0x34, 0x93, 0xF5, 0x83, 0xEF, 0x12, 0x87, 0x25,
+0xFF, 0x74, 0x3B, 0x2E, 0xF5, 0x82, 0xE4, 0x34,
+0x93, 0x12, 0x87, 0x72, 0xFF, 0x74, 0x40, 0x2E,
+0xF5, 0x82, 0xE4, 0x34, 0x93, 0x12, 0x87, 0x7C,
+0xFF, 0x74, 0x45, 0x2E, 0xF5, 0x82, 0xE4, 0x34,
+0x93, 0xF5, 0x83, 0xEF, 0xF0, 0x90, 0x93, 0x33,
+0xE0, 0xFF, 0x74, 0x01, 0xA8, 0x06, 0x08, 0x80,
+0x02, 0xC3, 0x33, 0xD8, 0xFC, 0x4F, 0x90, 0x93,
+0x33, 0xF0, 0x22, 0x90, 0x94, 0xBD, 0xE0, 0x04,
+0xF0, 0x81, 0x78, 0x22, 0x90, 0x96, 0xCB, 0x91,
+0x00, 0x54, 0x7F, 0xFD, 0x12, 0x87, 0x87, 0x54,
+0x1F, 0xD1, 0x67, 0x54, 0xE0, 0x4F, 0x12, 0x87,
+0x86, 0xFE, 0x54, 0x60, 0xC4, 0x13, 0x54, 0x07,
+0x90, 0x96, 0xCE, 0xF0, 0xEE, 0x54, 0x80, 0x12,
+0x8D, 0x35, 0xC4, 0x33, 0x54, 0xE0, 0xD1, 0x67,
+0x54, 0xDF, 0x12, 0x87, 0x24, 0xFE, 0x54, 0x03,
+0xFC, 0xEE, 0x54, 0x30, 0xC4, 0x54, 0x03, 0xC4,
+0x54, 0xF0, 0x12, 0x87, 0xB5, 0x54, 0xCF, 0x12,
+0x87, 0x24, 0x54, 0x40, 0xC4, 0x13, 0x13, 0xD1,
+0x85, 0x12, 0x87, 0xB5, 0x54, 0xBF, 0x12, 0x87,
+0x24, 0x54, 0x80, 0x12, 0x8D, 0x35, 0xC4, 0x33,
+0x33, 0x33, 0x54, 0x80, 0x12, 0x87, 0xB5, 0x54,
+0x7F, 0x12, 0x87, 0x24, 0xFE, 0x54, 0x08, 0x13,
+0x13, 0x13, 0x54, 0x1F, 0x90, 0x96, 0xD0, 0xF0,
+0xFB, 0xEE, 0x54, 0x04, 0x13, 0x13, 0x54, 0x3F,
+0xA3, 0xF0, 0xEC, 0x54, 0x03, 0x12, 0x87, 0xB5,
+0x54, 0xFC, 0x4F, 0xF0, 0xEB, 0x70, 0x0E, 0xEC,
+0x54, 0x03, 0x25, 0xE0, 0x25, 0xE0, 0x12, 0x87,
+0xB5, 0x54, 0xF3, 0x4F, 0xF0, 0xD1, 0x5E, 0xF5,
+0x83, 0xE0, 0x54, 0xFB, 0xF0, 0xD1, 0x5E, 0xF5,
+0x83, 0xC0, 0x83, 0xC0, 0x82, 0xE0, 0xFF, 0x90,
+0x96, 0xD1, 0xE0, 0x12, 0xA7, 0xE3, 0xD0, 0x82,
+0xD0, 0x83, 0xF0, 0x90, 0x93, 0x53, 0xE0, 0x60,
+0x34, 0x90, 0x96, 0xCB, 0x12, 0x86, 0x6D, 0xE9,
+0x24, 0x03, 0xF9, 0xE4, 0x3A, 0xFA, 0x12, 0x02,
+0x06, 0x54, 0x1F, 0x12, 0x02, 0x4C, 0x90, 0x96,
+0xCF, 0x74, 0x01, 0xF0, 0x90, 0x96, 0xCF, 0xE0,
+0xFF, 0xC3, 0x94, 0x04, 0x50, 0x0F, 0xEF, 0xD1,
+0x74, 0xE4, 0x12, 0x02, 0x5E, 0x90, 0x96, 0xCF,
+0xE0, 0x04, 0xF0, 0x80, 0xE7, 0x90, 0x93, 0x51,
+0xE0, 0x54, 0x07, 0xFF, 0xBF, 0x05, 0x0A, 0xEC,
+0xB4, 0x01, 0x06, 0x90, 0x93, 0x56, 0x74, 0x01,
+0xF0, 0xE4, 0x90, 0x96, 0xCF, 0xF0, 0x90, 0x96,
+0xCF, 0xE0, 0xFC, 0xD1, 0x74, 0x12, 0x02, 0x1F,
+0xFF, 0xED, 0x12, 0xCC, 0xD1, 0xD1, 0x90, 0xEF,
+0xF0, 0x90, 0x96, 0xCF, 0xE0, 0x04, 0xF0, 0xE0,
+0xB4, 0x04, 0xE3, 0xAF, 0x05, 0x90, 0x8A, 0xFF,
+0x12, 0xA5, 0xDE, 0x02, 0x04, 0x7E, 0x74, 0xC6,
+0x2D, 0xF5, 0x82, 0xE4, 0x34, 0x8D, 0x22, 0xFF,
+0x75, 0xF0, 0x12, 0xED, 0x90, 0x89, 0x51, 0x12,
+0x04, 0x6E, 0xE0, 0x22, 0x24, 0x03, 0xFF, 0xE4,
+0x33, 0xFE, 0x90, 0x96, 0xCB, 0x12, 0x86, 0x6D,
+0x8F, 0x82, 0x8E, 0x83, 0x22, 0x54, 0x01, 0xC4,
+0x33, 0x33, 0x54, 0xC0, 0x22, 0x12, 0x04, 0x6E,
+0xE5, 0x82, 0x2C, 0xF5, 0x82, 0xE4, 0x35, 0x83,
+0xF5, 0x83, 0x22, 0xD3, 0x10, 0xAF, 0x01, 0xC3,
+0xC0, 0xD0, 0x90, 0x01, 0xCC, 0xE0, 0x54, 0x0F,
+0xFD, 0xED, 0x70, 0x02, 0xE1, 0x85, 0x90, 0x87,
+0x0B, 0xE0, 0xFF, 0x70, 0x06, 0xA3, 0xE0, 0x64,
+0x09, 0x60, 0x0A, 0xEF, 0x14, 0xFF, 0x90, 0x87,
+0x0C, 0xE0, 0xB5, 0x07, 0x04, 0x7F, 0x01, 0x80,
+0x02, 0x7F, 0x00, 0xEF, 0x60, 0x09, 0x90, 0x01,
+0xC1, 0xE0, 0x44, 0x01, 0xF0, 0xE1, 0x85, 0x90,
+0x97, 0x06, 0xE0, 0xF1, 0x95, 0x80, 0x05, 0xC3,
+0x33, 0xCE, 0x33, 0xCE, 0xD8, 0xF9, 0xFF, 0xED,
+0xFB, 0xEF, 0x5B, 0x60, 0x7B, 0xE4, 0xFC, 0xF1,
+0x8B, 0xA4, 0xFF, 0xEC, 0x7A, 0x00, 0x2F, 0xFF,
+0xEA, 0x35, 0xF0, 0xFE, 0x74, 0xD0, 0xF1, 0xA9,
+0x90, 0x87, 0x0C, 0xE0, 0xF9, 0x75, 0xF0, 0x08,
+0x90, 0x86, 0xBB, 0xD1, 0x8D, 0xEF, 0xF1, 0x8A,
+0xA4, 0xFF, 0xEC, 0x2F, 0xFF, 0xEA, 0x35, 0xF0,
+0xFE, 0x74, 0xF0, 0xF1, 0xA9, 0x75, 0xF0, 0x08,
+0xE9, 0x90, 0x86, 0xBF, 0xD1, 0x8D, 0xEF, 0xF0,
+0x0C, 0xEC, 0xB4, 0x04, 0xC2, 0xF1, 0x9E, 0x80,
+0x02, 0xC3, 0x33, 0xD8, 0xFC, 0xF4, 0x5D, 0xFD,
+0xF1, 0x9E, 0x80, 0x02, 0xC3, 0x33, 0xD8, 0xFC,
+0x90, 0x01, 0xCC, 0xF0, 0x90, 0x97, 0x06, 0xE0,
+0x04, 0xF0, 0xE0, 0x54, 0x03, 0xF0, 0x90, 0x87,
+0x0C, 0xE0, 0x04, 0xF0, 0xE0, 0x7F, 0x00, 0xB4,
+0x0A, 0x02, 0x7F, 0x01, 0xEF, 0x70, 0x02, 0xC1,
+0xA9, 0xE4, 0x90, 0x87, 0x0C, 0xF0, 0xC1, 0xA9,
+0x90, 0x01, 0xC0, 0xE0, 0x44, 0x02, 0xF0, 0x90,
+0x97, 0x06, 0xE0, 0x44, 0x80, 0x90, 0x00, 0x8A,
+0xF1, 0x8A, 0x90, 0x01, 0xD0, 0x12, 0x04, 0x6E,
+0xE0, 0x90, 0x01, 0xC3, 0xF0, 0xD0, 0xD0, 0x92,
+0xAF, 0x22, 0xF0, 0x90, 0x97, 0x06, 0xE0, 0x75,
+0xF0, 0x04, 0x22, 0x54, 0x07, 0xFF, 0x74, 0x01,
+0x7E, 0x00, 0xA8, 0x07, 0x08, 0x22, 0x90, 0x97,
+0x06, 0xE0, 0xFF, 0x74, 0x01, 0xA8, 0x07, 0x08,
+0x22, 0x2F, 0xF5, 0x82, 0x74, 0x01, 0x3E, 0xF5,
+0x83, 0xE0, 0xFF, 0x22, 0x12, 0x02, 0x06, 0x90,
+0x96, 0x14, 0xF0, 0x22, 0xE0, 0x54, 0xFE, 0xF0,
+0x54, 0xFD, 0xF0, 0x22, 0x90, 0x05, 0x21, 0xE0,
+0x54, 0x7F, 0xF0, 0x22, 0x90, 0x94, 0xBD, 0xE0,
+0xFF, 0xC3, 0x94, 0x05, 0x22, 0xF0, 0x90, 0x01,
+0xB9, 0x74, 0x01, 0xF0, 0x90, 0x01, 0xB8, 0x22,
+0xE0, 0x90, 0x01, 0xBA, 0xF0, 0x90, 0x88, 0x38,
+0xE0, 0x90, 0x01, 0xBB, 0x22, 0x12, 0x02, 0x06,
+0x90, 0x88, 0x9C, 0xF0, 0x60, 0x39, 0xA3, 0xE0,
+0x20, 0xE0, 0x34, 0x90, 0x8A, 0xB9, 0x12, 0x8A,
+0x5F, 0xE4, 0xFD, 0x7F, 0x04, 0x12, 0x04, 0x7E,
+0x90, 0x88, 0x9B, 0xE0, 0xFF, 0xC3, 0x13, 0x30,
+0xE0, 0x1D, 0xEF, 0x13, 0x13, 0x13, 0x54, 0x1F,
+0x20, 0xE0, 0x14, 0x90, 0x88, 0x9B, 0xE0, 0x13,
+0x13, 0x54, 0x3F, 0x30, 0xE0, 0x04, 0x7F, 0x0D,
+0x80, 0x02, 0x7F, 0x09, 0x12, 0x71, 0x9A, 0x22,
+0x12, 0x02, 0x06, 0x54, 0x01, 0xFF, 0x90, 0x93,
+0x32, 0xE0, 0x54, 0xFE, 0x4F, 0xF0, 0x30, 0xE0,
+0x04, 0xE4, 0x12, 0x9E, 0x32, 0x22, 0x12, 0x02,
+0x06, 0xFF, 0x90, 0x93, 0x4C, 0xF0, 0xBF, 0x01,
+0x0A, 0x7F, 0x01, 0x12, 0xA1, 0x66, 0xE4, 0x90,
+0x93, 0x4C, 0xF0, 0x22, 0x90, 0x95, 0xCB, 0xEF,
+0xF0, 0x90, 0x04, 0x7E, 0xE0, 0xFF, 0xA3, 0xE0,
+0x90, 0x95, 0xEF, 0xF0, 0xE0, 0xFE, 0x6F, 0x60,
+0x72, 0x90, 0x95, 0xCC, 0x74, 0x03, 0xF0, 0x90,
+0x95, 0xEE, 0x74, 0x08, 0xF0, 0xEE, 0x04, 0x54,
+0x0F, 0xFF, 0xE4, 0xFE, 0xEF, 0x75, 0xF0, 0x08,
+0xA4, 0x24, 0x00, 0xF5, 0x82, 0xE4, 0x34, 0x80,
+0xF5, 0x83, 0xE5, 0x82, 0x2E, 0x12, 0xB6, 0x93,
+0xE0, 0xFD, 0x74, 0xCE, 0x2E, 0xF5, 0x82, 0xE4,
+0x34, 0x95, 0xF5, 0x83, 0xED, 0xF0, 0x0E, 0xEE,
+0xB4, 0x08, 0xD9, 0x7B, 0x01, 0x7A, 0x95, 0x79,
+0xCC, 0x12, 0x9F, 0xDB, 0x12, 0x04, 0x7E, 0x90,
+0x95, 0xEF, 0xE0, 0x04, 0x54, 0x0F, 0xFF, 0xF0,
+0xBF, 0x0F, 0x02, 0xE4, 0xF0, 0x90, 0x95, 0xEF,
+0xE0, 0x90, 0x04, 0x7F, 0xF0, 0x90, 0x95, 0xCB,
+0xE0, 0x70, 0x05, 0x90, 0x8A, 0xE5, 0x80, 0x03,
+0x90, 0x8A, 0x79, 0x12, 0x8A, 0x5F, 0x7F, 0x04,
+0x12, 0x04, 0x7E, 0x22, 0xE4, 0xFF, 0x01, 0x5C,
+0xC0, 0xE0, 0xC0, 0xF0, 0xC0, 0x83, 0xC0, 0x82,
+0xC0, 0xD0, 0x75, 0xD0, 0x00, 0xC0, 0x00, 0xC0,
+0x01, 0xC0, 0x02, 0xC0, 0x03, 0xC0, 0x04, 0xC0,
+0x05, 0xC0, 0x06, 0xC0, 0x07, 0x90, 0x01, 0xC4,
+0x74, 0xE8, 0xF0, 0x74, 0xB8, 0xA3, 0xF0, 0x12,
+0x64, 0x7F, 0xE5, 0x30, 0x30, 0xE1, 0x02, 0xB1,
+0x58, 0xE5, 0x2D, 0x30, 0xE1, 0x02, 0x11, 0xE4,
+0xE5, 0x2D, 0x30, 0xE3, 0x02, 0x71, 0xD8, 0xE5,
+0x2D, 0x30, 0xE4, 0x02, 0xB1, 0x6C, 0xE5, 0x2D,
+0x30, 0xE5, 0x02, 0xB1, 0x7D, 0xE5, 0x2F, 0x30,
+0xE0, 0x02, 0x71, 0xBF, 0xE5, 0x2F, 0x30, 0xE1,
+0x03, 0x12, 0x8B, 0xFF, 0xE5, 0x2F, 0x30, 0xE2,
+0x02, 0x71, 0xFB, 0xE5, 0x2F, 0x30, 0xE3, 0x03,
+0x12, 0xAF, 0xD2, 0xE5, 0x2F, 0x30, 0xE4, 0x03,
+0x12, 0xAE, 0x8F, 0xE5, 0x2F, 0x30, 0xE5, 0x02,
+0x91, 0x39, 0xE5, 0x2F, 0x30, 0xE6, 0x02, 0x71,
+0xA7, 0xE5, 0x2F, 0x30, 0xE7, 0x02, 0x71, 0x88,
+0xE5, 0x30, 0x30, 0xE0, 0x02, 0x71, 0x78, 0xE5,
+0x30, 0x30, 0xE4, 0x02, 0x31, 0xAB, 0xE5, 0x30,
+0x30, 0xE5, 0x02, 0x71, 0x66, 0x74, 0xE8, 0x04,
+0x90, 0x01, 0xC4, 0xF0, 0x74, 0xB8, 0xA3, 0xF0,
+0xD0, 0x07, 0xD0, 0x06, 0xD0, 0x05, 0xD0, 0x04,
+0xD0, 0x03, 0xD0, 0x02, 0xD0, 0x01, 0xD0, 0x00,
+0xD0, 0xD0, 0xD0, 0x82, 0xD0, 0x83, 0xD0, 0xF0,
+0xD0, 0xE0, 0x32, 0xE4, 0xFF, 0xD3, 0x10, 0xAF,
+0x01, 0xC3, 0xC0, 0xD0, 0x90, 0x96, 0x85, 0xEF,
+0xF0, 0x90, 0x88, 0x2B, 0xE0, 0x90, 0x96, 0x97,
+0xF0, 0xE4, 0x90, 0x96, 0x86, 0xF0, 0x90, 0x96,
+0x97, 0xE0, 0xFE, 0x90, 0x96, 0x86, 0xE0, 0xFF,
+0xC3, 0x9E, 0x50, 0x2B, 0xE0, 0xFE, 0x51, 0xCD,
+0xE4, 0xF0, 0xEE, 0x71, 0x59, 0xE0, 0x30, 0xE7,
+0x0A, 0x75, 0xF0, 0x12, 0xEF, 0x51, 0xD7, 0xE4,
+0xF0, 0x80, 0x0C, 0x12, 0x7C, 0x8F, 0x90, 0x96,
+0x86, 0xE0, 0x51, 0xCD, 0x74, 0x01, 0xF0, 0x90,
+0x96, 0x86, 0xE0, 0x04, 0xF0, 0x80, 0xC7, 0x7F,
+0x0C, 0x7E, 0x00, 0x12, 0x7C, 0x6A, 0xE4, 0x90,
+0x96, 0x86, 0xF0, 0x90, 0x96, 0x97, 0xE0, 0xFF,
+0x90, 0x96, 0x86, 0xE0, 0xFE, 0xC3, 0x9F, 0x40,
+0x02, 0x41, 0xC8, 0x74, 0x87, 0x2E, 0x51, 0xCF,
+0xE0, 0x70, 0x02, 0x41, 0xC0, 0xEE, 0xC4, 0x54,
+0xF0, 0x24, 0x06, 0xF5, 0x82, 0xE4, 0x34, 0x81,
+0xF5, 0x83, 0xE0, 0xFD, 0xEE, 0xC4, 0x54, 0xF0,
+0x24, 0x07, 0xF5, 0x82, 0xE4, 0x34, 0x81, 0xF5,
+0x83, 0x51, 0xDD, 0xFC, 0x75, 0xF0, 0x12, 0x90,
+0x89, 0x53, 0x51, 0xE6, 0xEC, 0xC4, 0x54, 0xF0,
+0x24, 0x0A, 0xF5, 0x82, 0xE4, 0x34, 0x81, 0xF5,
+0x83, 0xE0, 0xFD, 0xEC, 0x51, 0xEF, 0x51, 0xDD,
+0x75, 0xF0, 0x12, 0x90, 0x89, 0x57, 0x51, 0xE6,
+0x7F, 0x01, 0x90, 0x96, 0x86, 0xE0, 0xFE, 0x51,
+0xEF, 0xE5, 0x82, 0x2F, 0x12, 0xB6, 0x93, 0xE0,
+0xFD, 0x75, 0xF0, 0x12, 0xEE, 0x90, 0x89, 0x57,
+0x12, 0x04, 0x6E, 0x75, 0xF0, 0x02, 0xEF, 0x51,
+0xFC, 0xED, 0xF0, 0x0F, 0xEF, 0xB4, 0x05, 0xDA,
+0x90, 0x96, 0x86, 0xE0, 0xFF, 0xC4, 0x54, 0xF0,
+0x24, 0x09, 0xF5, 0x82, 0xE4, 0x34, 0x81, 0xF5,
+0x83, 0xE0, 0xFE, 0x71, 0x6E, 0xEE, 0xF0, 0x90,
+0x96, 0x86, 0xE0, 0xFF, 0x90, 0x96, 0x85, 0xE0,
+0xFD, 0x12, 0x61, 0xF7, 0x90, 0x96, 0x86, 0xE0,
+0x75, 0xF0, 0x12, 0x51, 0xD7, 0x74, 0x01, 0xF0,
+0x90, 0x96, 0x86, 0xE0, 0x04, 0xF0, 0x41, 0x0B,
+0xD0, 0xD0, 0x92, 0xAF, 0x22, 0x24, 0x87, 0xF5,
+0x82, 0xE4, 0x34, 0x96, 0xF5, 0x83, 0x22, 0x90,
+0x89, 0x56, 0x02, 0x04, 0x6E, 0xE0, 0xFE, 0xED,
+0xFF, 0x90, 0x96, 0x86, 0xE0, 0x22, 0x12, 0x04,
+0x6E, 0xEE, 0xF0, 0xA3, 0xEF, 0xF0, 0x22, 0xC4,
+0x54, 0xF0, 0x24, 0x0B, 0xF5, 0x82, 0xE4, 0x34,
+0x81, 0xF5, 0x83, 0x22, 0x12, 0x04, 0x6E, 0xE4,
+0xF0, 0xA3, 0x22, 0x7D, 0x07, 0xAF, 0x62, 0xED,
+0x30, 0xE0, 0x1E, 0x75, 0xF0, 0x12, 0xEF, 0x90,
+0x89, 0x57, 0x71, 0x4C, 0x90, 0x89, 0x59, 0x71,
+0x4C, 0x90, 0x89, 0x5B, 0x71, 0x4C, 0x90, 0x89,
+0x5D, 0x71, 0x4C, 0x90, 0x89, 0x5F, 0x51, 0xFC,
+0xF0, 0xED, 0x30, 0xE1, 0x0A, 0x75, 0xF0, 0x12,
+0xEF, 0x90, 0x89, 0x53, 0x51, 0xFC, 0xF0, 0xED,
+0x30, 0xE2, 0x04, 0x71, 0x6E, 0xE4, 0xF0, 0x71,
+0x58, 0xE0, 0x54, 0xBF, 0x44, 0x80, 0xFE, 0x71,
+0x58, 0xEE, 0xF0, 0x22, 0x12, 0x04, 0x6E, 0xE4,
+0xF0, 0xA3, 0xF0, 0x75, 0xF0, 0x12, 0xEF, 0x22,
+0xEF, 0xC4, 0x54, 0xF0, 0x24, 0x03, 0xF5, 0x82,
+0xE4, 0x34, 0x81, 0xF5, 0x83, 0x22, 0x90, 0x8A,
+0xDF, 0x91, 0x6E, 0x02, 0x04, 0x7A, 0x75, 0xF0,
+0x12, 0xEF, 0x90, 0x89, 0x55, 0x02, 0x04, 0x6E,
+0x71, 0x9F, 0xBF, 0x03, 0x0A, 0x90, 0x93, 0x4B,
+0xE0, 0xB4, 0x01, 0x03, 0x12, 0xB7, 0xC4, 0x22,
+0xE4, 0xF5, 0x77, 0xF5, 0x78, 0xF5, 0x79, 0x71,
+0x9F, 0xBF, 0x03, 0x0A, 0x90, 0x93, 0x4B, 0xE0,
+0xB4, 0x01, 0x03, 0x12, 0xB7, 0xC4, 0x22, 0x90,
+0x01, 0x02, 0xE0, 0x54, 0x03, 0xFF, 0x22, 0xE4,
+0xFF, 0x12, 0x78, 0x4A, 0xBF, 0x01, 0x0F, 0x90,
+0x88, 0x36, 0xE0, 0x60, 0x09, 0xB1, 0x50, 0x54,
+0x07, 0x70, 0x03, 0x12, 0xAE, 0x85, 0x22, 0x12,
+0xAD, 0xC2, 0xE4, 0xFF, 0x91, 0xB7, 0x90, 0x93,
+0x03, 0xE0, 0x30, 0xE0, 0x02, 0x91, 0xF4, 0x90,
+0x8B, 0x07, 0x12, 0x8E, 0xAD, 0x02, 0x8F, 0xA5,
+0x90, 0x93, 0x03, 0xE0, 0x30, 0xE0, 0x0B, 0x90,
+0x8A, 0xE5, 0x12, 0x8A, 0x5F, 0x7F, 0x20, 0x12,
+0x04, 0x7E, 0x90, 0x88, 0x9D, 0xE0, 0x30, 0xE0,
+0x09, 0x90, 0x94, 0xB7, 0xE0, 0x20, 0xE0, 0x02,
+0xB1, 0x42, 0x22, 0x90, 0x88, 0x39, 0xE0, 0x64,
+0x02, 0x60, 0x29, 0x90, 0x88, 0x9D, 0xE0, 0x30,
+0xE0, 0x0B, 0x90, 0x94, 0xAF, 0xE0, 0xFF, 0x12,
+0x8D, 0x35, 0x20, 0xE0, 0x03, 0x12, 0xA9, 0x94,
+0x90, 0x88, 0x9D, 0xE0, 0x30, 0xE0, 0x0D, 0x90,
+0x94, 0xAF, 0xE0, 0xFF, 0x12, 0x8D, 0x35, 0x30,
+0xE0, 0x02, 0x91, 0x2D, 0x22, 0x90, 0x06, 0xA9,
+0xE0, 0xF5, 0x77, 0x30, 0xE6, 0x02, 0x91, 0x87,
+0x22, 0x90, 0x88, 0x9D, 0xE0, 0x30, 0xE0, 0x0D,
+0x90, 0x94, 0xAF, 0xE0, 0xFF, 0x12, 0x8D, 0x35,
+0x30, 0xE0, 0x02, 0x80, 0x3A, 0xE4, 0xFF, 0x12,
+0x78, 0x4A, 0xBF, 0x01, 0x18, 0x90, 0x88, 0x36,
+0xE0, 0x60, 0x12, 0x12, 0xAF, 0x56, 0x64, 0x02,
+0x60, 0x08, 0x90, 0x8A, 0xE1, 0x91, 0x6E, 0x02,
+0x04, 0x7A, 0x12, 0x73, 0x8F, 0x22, 0xE0, 0xFE,
+0xA3, 0xE0, 0xAA, 0x06, 0xF9, 0x22, 0x12, 0xAE,
+0x34, 0xB1, 0x49, 0x7F, 0x01, 0x91, 0xB7, 0x90,
+0x8B, 0x07, 0x91, 0x6E, 0x02, 0x04, 0x7A, 0x90,
+0x88, 0x9D, 0xE0, 0x30, 0xE0, 0x28, 0x12, 0x8D,
+0x31, 0x30, 0xE0, 0x22, 0x90, 0x88, 0xAF, 0xE0,
+0xFF, 0x70, 0x0A, 0xEF, 0x70, 0x18, 0x90, 0x88,
+0xA0, 0xE0, 0x30, 0xE0, 0x11, 0x90, 0x06, 0x04,
+0xE0, 0x44, 0x40, 0xF0, 0xE0, 0x44, 0x80, 0xF0,
+0x90, 0x8A, 0xE1, 0x12, 0x8E, 0xAD, 0x22, 0xD3,
+0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0x90, 0x88,
+0x33, 0xE0, 0xC3, 0x13, 0x30, 0xE0, 0x28, 0x90,
+0x96, 0x62, 0x74, 0x1E, 0xF0, 0x90, 0x96, 0x84,
+0x74, 0x01, 0xF0, 0x90, 0x96, 0x64, 0xEF, 0xF0,
+0x7B, 0x01, 0x7A, 0x96, 0x79, 0x62, 0x12, 0x9F,
+0xDB, 0x12, 0x04, 0x7E, 0x90, 0x8A, 0xE5, 0x12,
+0x8A, 0x5F, 0x7F, 0x04, 0x12, 0x04, 0x7E, 0xD0,
+0xD0, 0x92, 0xAF, 0x22, 0x90, 0x93, 0x0F, 0xE0,
+0xFD, 0x7C, 0x00, 0xA3, 0xE0, 0xFE, 0xA3, 0xE0,
+0xFF, 0x12, 0x02, 0x92, 0xED, 0x4C, 0x70, 0x05,
+0x90, 0x93, 0x1C, 0x80, 0x2A, 0xED, 0x64, 0x01,
+0x4C, 0x70, 0x05, 0x90, 0x93, 0x1D, 0x80, 0x1F,
+0xED, 0x64, 0x02, 0x4C, 0x70, 0x05, 0x90, 0x93,
+0x1E, 0x80, 0x14, 0xED, 0x64, 0x03, 0x4C, 0x70,
+0x05, 0x90, 0x93, 0x1F, 0x80, 0x09, 0xED, 0x64,
+0x04, 0x4C, 0x70, 0x0D, 0x90, 0x93, 0x20, 0xE0,
+0xFF, 0xB1, 0x62, 0x90, 0x93, 0x10, 0x12, 0xA7,
+0xDC, 0x22, 0x90, 0x94, 0xB8, 0xE0, 0x04, 0xF0,
+0x22, 0x7D, 0x02, 0x7F, 0x02, 0x02, 0x7C, 0x74,
+0x90, 0x88, 0x3A, 0xE0, 0x54, 0xFE, 0xF0, 0x22,
+0x90, 0x88, 0x36, 0xE0, 0x60, 0x03, 0x12, 0xAF,
+0xB7, 0x22, 0x90, 0x04, 0x24, 0xEF, 0xF0, 0x90,
+0x04, 0x57, 0xF0, 0x22, 0x90, 0x8A, 0x75, 0x12,
+0x8E, 0xAD, 0x90, 0x8A, 0xE5, 0x12, 0x8A, 0x5F,
+0x7F, 0x02, 0x02, 0x04, 0x7E, 0x90, 0x01, 0xCF,
+0xE0, 0x90, 0x95, 0xCB, 0xF0, 0xE0, 0xFF, 0x30,
+0xE0, 0x07, 0x90, 0x01, 0xCF, 0xE0, 0x54, 0xFE,
+0xF0, 0xEF, 0x30, 0xE5, 0x23, 0x90, 0x01, 0xCF,
+0xE0, 0x54, 0xDF, 0xF0, 0x90, 0x01, 0x34, 0x74,
+0x20, 0xF0, 0xE4, 0xF5, 0xA8, 0xF5, 0xE8, 0x12,
+0x76, 0x6D, 0x90, 0x00, 0x03, 0xE0, 0x54, 0xFB,
+0xFD, 0x7F, 0x03, 0x12, 0x7B, 0x2E, 0x80, 0xFE,
+0x22, 0xC0, 0xE0, 0xC0, 0xF0, 0xC0, 0x83, 0xC0,
+0x82, 0xC0, 0xD0, 0x75, 0xD0, 0x00, 0xC0, 0x00,
+0xC0, 0x01, 0xC0, 0x02, 0xC0, 0x03, 0xC0, 0x04,
+0xC0, 0x05, 0xC0, 0x06, 0xC0, 0x07, 0x90, 0x01,
+0xC4, 0x74, 0xB9, 0xF0, 0x74, 0xBD, 0xA3, 0xF0,
+0x12, 0x75, 0x50, 0xE5, 0x3D, 0x30, 0xE0, 0x02,
+0xF1, 0xE0, 0xE5, 0x3D, 0x30, 0xE1, 0x03, 0x12,
+0xC9, 0xC0, 0xE5, 0x3D, 0x30, 0xE2, 0x03, 0x12,
+0xA8, 0x97, 0xE5, 0x3D, 0x30, 0xE4, 0x02, 0xF1,
+0x34, 0xE5, 0x3E, 0x30, 0xE0, 0x03, 0x12, 0xC9,
+0xDE, 0xE5, 0x3E, 0x30, 0xE3, 0x02, 0xD1, 0x73,
+0xE5, 0x3F, 0x30, 0xE2, 0x0A, 0x12, 0xCA, 0x7A,
+0x90, 0x07, 0x8F, 0xE0, 0x44, 0x10, 0xF0, 0xE5,
+0x40, 0x30, 0xE1, 0x0B, 0x90, 0x8A, 0xE5, 0x12,
+0x8A, 0x5F, 0x7F, 0x04, 0x12, 0x04, 0x7E, 0xE5,
+0x40, 0x30, 0xE4, 0x02, 0x91, 0x76, 0xE5, 0x40,
+0x30, 0xE5, 0x03, 0x12, 0xCA, 0xBF, 0xE5, 0x40,
+0x30, 0xE6, 0x03, 0x12, 0xCB, 0x25, 0xE5, 0x40,
+0x30, 0xE7, 0x02, 0xF1, 0x9C, 0x74, 0xB9, 0x04,
+0x90, 0x01, 0xC4, 0xF0, 0x74, 0xBD, 0xA3, 0xF0,
+0xD0, 0x07, 0xD0, 0x06, 0xD0, 0x05, 0xD0, 0x04,
+0xD0, 0x03, 0xD0, 0x02, 0xD0, 0x01, 0xD0, 0x00,
+0xD0, 0xD0, 0xD0, 0x82, 0xD0, 0x83, 0xD0, 0xF0,
+0xD0, 0xE0, 0x32, 0x90, 0x01, 0x8C, 0xE4, 0xF0,
+0xA3, 0xF0, 0xA3, 0x74, 0x71, 0xF0, 0xA3, 0x74,
+0x02, 0xF0, 0x90, 0x01, 0x95, 0xE0, 0x54, 0xF0,
+0x44, 0x07, 0xF0, 0x90, 0x01, 0x98, 0x74, 0x7F,
+0xF0, 0x90, 0x01, 0x01, 0xE0, 0x54, 0xFB, 0xF0,
+0xE0, 0x44, 0x04, 0xF0, 0x22, 0x12, 0x9E, 0xE9,
+0x54, 0x7F, 0x90, 0x95, 0xC9, 0xF0, 0xA3, 0xEF,
+0xF0, 0x90, 0x94, 0xBC, 0xE0, 0x54, 0x02, 0xFF,
+0x90, 0x95, 0xCA, 0xE0, 0x54, 0x02, 0xFD, 0xED,
+0x6F, 0x30, 0xE1, 0x04, 0xD1, 0x73, 0xD1, 0xE2,
+0x90, 0x95, 0xCA, 0xE0, 0x20, 0xE1, 0x0B, 0x90,
+0x94, 0xBC, 0xE0, 0x20, 0xE1, 0x04, 0xD1, 0x73,
+0xD1, 0xE2, 0x90, 0x95, 0xC9, 0xE0, 0xFF, 0xA3,
+0xE0, 0x90, 0x94, 0xBB, 0xCF, 0xF0, 0xA3, 0xEF,
+0xF0, 0x22, 0xE4, 0x90, 0x97, 0x01, 0xF0, 0xA3,
+0xF0, 0x12, 0xD8, 0x26, 0xEF, 0x64, 0x01, 0x60,
+0x3C, 0xC3, 0x90, 0x97, 0x02, 0xE0, 0x94, 0x88,
+0x90, 0x97, 0x01, 0xE0, 0x94, 0x13, 0x40, 0x0F,
+0x90, 0x01, 0xC1, 0xE0, 0x44, 0x10, 0xF0, 0x90,
+0x01, 0xC7, 0x74, 0xFD, 0xF0, 0x80, 0x1E, 0x90,
+0x97, 0x01, 0x12, 0xA7, 0xDC, 0xF1, 0xE2, 0xD3,
+0x90, 0x97, 0x02, 0xE0, 0x94, 0x32, 0x90, 0x97,
+0x01, 0xE0, 0x94, 0x00, 0x40, 0xC3, 0x90, 0x01,
+0xC6, 0xE0, 0x30, 0xE3, 0xBC, 0x90, 0x01, 0xC7,
+0x74, 0xFE, 0xF0, 0x22, 0x90, 0x88, 0x9D, 0xE0,
+0x30, 0xE0, 0x0D, 0xF1, 0x86, 0x30, 0xE0, 0x08,
+0x90, 0x8A, 0xBB, 0x12, 0x8A, 0x5F, 0xF1, 0x8F,
+0x12, 0x9F, 0xC6, 0x90, 0x97, 0x0A, 0xEF, 0xF0,
+0x90, 0x86, 0xB3, 0xE0, 0xB4, 0x02, 0x12, 0x90,
+0x97, 0x0A, 0xE0, 0xFF, 0x64, 0x01, 0x60, 0x25,
+0x90, 0x01, 0x4D, 0xE0, 0x64, 0x80, 0xF0, 0x80,
+0x19, 0x90, 0x01, 0x00, 0x74, 0xFF, 0xF0, 0x7F,
+0x64, 0x7E, 0x00, 0x12, 0x7C, 0x6A, 0x90, 0x06,
+0x90, 0xE0, 0x44, 0x01, 0xF0, 0x90, 0x97, 0x0A,
+0xE0, 0xFF, 0x12, 0x97, 0x00, 0x22, 0x90, 0x88,
+0xA1, 0xE0, 0x13, 0x13, 0x54, 0x3F, 0x22, 0xE4,
+0xFF, 0x12, 0x04, 0x7E, 0x90, 0x88, 0xC2, 0xE0,
+0x54, 0xEF, 0xF0, 0x22, 0x90, 0x88, 0xB8, 0xE0,
+0x30, 0xE0, 0x05, 0x90, 0x8A, 0xEB, 0x80, 0x27,
+0x90, 0x94, 0xAF, 0x12, 0xAE, 0x23, 0x30, 0xE0,
+0x1B, 0x90, 0x88, 0xC2, 0xE0, 0xC4, 0x54, 0x0F,
+0x20, 0xE0, 0x08, 0x90, 0x8A, 0xBB, 0x12, 0x8A,
+0x5F, 0xF1, 0x8F, 0x90, 0x94, 0xAF, 0xE0, 0x54,
+0xF7, 0xF0, 0x80, 0x06, 0x90, 0x8A, 0x99, 0x12,
+0x8E, 0xAD, 0x90, 0x88, 0xF0, 0xE0, 0x30, 0xE0,
+0x06, 0x90, 0x8A, 0xE7, 0x12, 0x8E, 0xAD, 0x22,
+0x22, 0xF0, 0x7F, 0x14, 0x7E, 0x00, 0x02, 0x7C,
+0x6A, 0x90, 0x95, 0x40, 0x02, 0x86, 0x6D, 0x00,
+0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+0x00, 0x00, 0x00, 0x00, 0xE4, 0x90, 0x86, 0xAF,
+0x12, 0x9E, 0x31, 0x90, 0x93, 0x01, 0xF0, 0x90,
+0x93, 0x5E, 0xF0, 0xA3, 0xF0, 0x22, 0x75, 0x21,
+0x80, 0xE4, 0xF5, 0x22, 0xF5, 0x23, 0x75, 0x24,
+0x80, 0x90, 0x00, 0x50, 0xE5, 0x21, 0xF0, 0xA3,
+0xE5, 0x22, 0xF0, 0xA3, 0xE5, 0x23, 0xF0, 0xA3,
+0xE5, 0x24, 0xF0, 0x22, 0x11, 0x42, 0x12, 0x76,
+0x6D, 0x12, 0x75, 0xE0, 0x91, 0x66, 0x91, 0x07,
+0x80, 0xD4, 0x90, 0x00, 0x08, 0xE0, 0x54, 0xEF,
+0xF0, 0x22, 0xE4, 0x90, 0x95, 0x18, 0xF0, 0x71,
+0xE8, 0x11, 0x42, 0xE4, 0xFF, 0x71, 0x4C, 0x90,
+0x93, 0x32, 0xE0, 0x20, 0xE0, 0x02, 0x21, 0x3D,
+0x90, 0x00, 0x02, 0xE0, 0x44, 0x02, 0xF0, 0xE4,
+0x90, 0x95, 0x19, 0xF0, 0x90, 0x95, 0x19, 0xE0,
+0xFF, 0xC3, 0x94, 0x05, 0x50, 0x2D, 0x12, 0xB7,
+0x96, 0x80, 0x05, 0xC3, 0x33, 0xCE, 0x33, 0xCE,
+0xD8, 0xF9, 0xFF, 0x90, 0x93, 0x35, 0xE0, 0xFD,
+0xEF, 0x5D, 0x60, 0x0F, 0x90, 0x95, 0x19, 0x71,
+0x0B, 0x90, 0x95, 0x19, 0x71, 0x2B, 0x44, 0x40,
+0x12, 0xBF, 0xE1, 0x90, 0x95, 0x19, 0xE0, 0x04,
+0xF0, 0x80, 0xC9, 0x90, 0x07, 0xC7, 0xE4, 0xF0,
+0x90, 0x07, 0xC6, 0xF0, 0x90, 0x07, 0xC5, 0x74,
+0x77, 0xF0, 0x90, 0x07, 0xC4, 0xE4, 0xF0, 0x90,
+0x07, 0xC0, 0x74, 0x38, 0xF0, 0xA3, 0xE4, 0xF0,
+0xA3, 0x74, 0x0F, 0xF0, 0xA3, 0x74, 0xC0, 0xF0,
+0x90, 0x02, 0x26, 0xE0, 0x44, 0x01, 0xF0, 0xE0,
+0x90, 0x95, 0x1A, 0xF0, 0x90, 0x95, 0x1A, 0xE0,
+0x30, 0xE0, 0x18, 0x90, 0x95, 0x18, 0xE0, 0x04,
+0x71, 0x9C, 0x90, 0x02, 0x26, 0xE0, 0x90, 0x95,
+0x1A, 0xF0, 0x90, 0x95, 0x18, 0xE0, 0xD3, 0x94,
+0xFA, 0x40, 0xE1, 0x90, 0x02, 0x03, 0x74, 0x80,
+0xF0, 0x90, 0x04, 0x24, 0xE0, 0x90, 0x95, 0x1B,
+0xF0, 0x90, 0x04, 0x22, 0xE0, 0x44, 0x10, 0xF0,
+0x90, 0x02, 0x00, 0xE0, 0x90, 0x95, 0x1A, 0xF0,
+0x90, 0x02, 0x01, 0x31, 0x4D, 0x90, 0x02, 0x02,
+0x31, 0x4D, 0x90, 0x02, 0x14, 0x31, 0x4D, 0xE0,
+0x04, 0xF0, 0xE0, 0x90, 0x04, 0x24, 0xF0, 0x12,
+0x9E, 0xE1, 0x90, 0x95, 0x1B, 0xE0, 0x90, 0x04,
+0x24, 0xF0, 0x90, 0xFD, 0x09, 0x74, 0xFF, 0xF0,
+0x90, 0xFD, 0x08, 0xE4, 0xF0, 0x51, 0xF4, 0xF0,
+0xE4, 0xFD, 0x12, 0x76, 0xF7, 0x90, 0x88, 0x32,
+0xE0, 0x54, 0xEF, 0xF0, 0x22, 0xE0, 0xFF, 0x90,
+0x95, 0x1A, 0xE0, 0x2F, 0xF0, 0x22, 0xD3, 0x10,
+0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0x31, 0xD0, 0x11,
+0x4A, 0xD0, 0xD0, 0x92, 0xAF, 0x22, 0x90, 0x88,
+0x39, 0xE0, 0xFF, 0x60, 0x03, 0xB4, 0x08, 0x0D,
+0x31, 0x7E, 0xBF, 0x01, 0x08, 0x31, 0x56, 0x90,
+0x01, 0xE5, 0xE0, 0x04, 0xF0, 0x22, 0x90, 0x02,
+0x87, 0xE0, 0x60, 0x02, 0x80, 0x08, 0x90, 0x01,
+0x00, 0xE0, 0x64, 0x3F, 0x60, 0x05, 0x75, 0x61,
+0x01, 0x80, 0x2E, 0x90, 0x02, 0x96, 0xE0, 0x60,
+0x05, 0x75, 0x61, 0x10, 0x80, 0x23, 0x90, 0x02,
+0x86, 0xE0, 0x20, 0xE1, 0x02, 0x80, 0x07, 0x90,
+0x02, 0x86, 0xE0, 0x30, 0xE3, 0x05, 0x75, 0x61,
+0x04, 0x80, 0x0E, 0x90, 0x88, 0xE6, 0xE0, 0x30,
+0xE0, 0x05, 0x75, 0x61, 0x20, 0x80, 0x02, 0x61,
+0xA4, 0x90, 0x01, 0xB9, 0x74, 0x08, 0xF0, 0x90,
+0x01, 0xB8, 0xE5, 0x61, 0xF0, 0x7F, 0x00, 0x22,
+0x75, 0x61, 0x14, 0x90, 0x88, 0x32, 0xE0, 0x44,
+0x10, 0xF0, 0x51, 0xF4, 0xF0, 0x7D, 0x01, 0x12,
+0x76, 0xF7, 0x90, 0x00, 0x06, 0xE0, 0x44, 0x40,
+0xF0, 0x90, 0x88, 0x41, 0xE0, 0x90, 0x00, 0x93,
+0xF0, 0x90, 0x88, 0x37, 0xE0, 0x60, 0x12, 0x90,
+0x01, 0x2F, 0xE0, 0x30, 0xE7, 0x05, 0x74, 0x10,
+0xF0, 0x80, 0x06, 0x90, 0x01, 0x2F, 0x74, 0x90,
+0xF0, 0x90, 0x93, 0x32, 0xE0, 0x30, 0xE0, 0x60,
+0x90, 0xFD, 0x09, 0xE4, 0xF0, 0x90, 0xFD, 0x08,
+0xF0, 0x90, 0x0E, 0x4B, 0xE0, 0x54, 0xFC, 0xF0,
+0xE4, 0x90, 0x95, 0x18, 0xF0, 0x90, 0x95, 0x18,
+0xE0, 0xFF, 0xC3, 0x94, 0x05, 0x50, 0x2D, 0x12,
+0xB7, 0x96, 0x80, 0x05, 0xC3, 0x33, 0xCE, 0x33,
+0xCE, 0xD8, 0xF9, 0xFF, 0x90, 0x93, 0x34, 0xE0,
+0xFD, 0xEF, 0x5D, 0x60, 0x0F, 0x90, 0x95, 0x18,
+0x71, 0x0B, 0x90, 0x95, 0x18, 0x71, 0x2B, 0x44,
+0x20, 0x12, 0xBF, 0xE1, 0x90, 0x95, 0x18, 0xE0,
+0x04, 0xF0, 0x80, 0xC9, 0x90, 0x00, 0x92, 0xE0,
+0x54, 0xFE, 0xF0, 0xE0, 0x44, 0x08, 0xF0, 0x90,
+0x00, 0x02, 0xE0, 0x54, 0xFD, 0xF0, 0x80, 0x07,
+0x90, 0x00, 0x92, 0xE0, 0x44, 0x01, 0xF0, 0x90,
+0x00, 0x08, 0xE0, 0x44, 0x10, 0xF0, 0x7F, 0x01,
+0x71, 0x4C, 0x90, 0x00, 0x90, 0xE0, 0x44, 0x01,
+0xF0, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
@@ -2036,1034 +2167,985 @@ u8 array_mp_8723d_fw_ap[] = {
 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-0x00, 0x00, 0x7F, 0x14, 0x7E, 0x00, 0x02, 0x7C,
-0x6A, 0xE4, 0x90, 0x96, 0xC5, 0xF0, 0xA3, 0xF0,
-0x90, 0x05, 0x22, 0xE0, 0x90, 0x96, 0xC7, 0xF0,
-0x7B, 0x47, 0x12, 0x9F, 0xE5, 0x90, 0x05, 0xF8,
-0xE0, 0x70, 0x1B, 0xA3, 0xE0, 0x70, 0x17, 0xA3,
-0xE0, 0x70, 0x13, 0xA3, 0xE0, 0x70, 0x0F, 0x90,
-0x96, 0xC7, 0xE0, 0xFD, 0x7B, 0x48, 0xE4, 0xFF,
-0x12, 0x9C, 0x10, 0x7F, 0x01, 0x22, 0x12, 0x9F,
-0x83, 0x30, 0xE0, 0x19, 0xD3, 0x90, 0x96, 0xC6,
-0xE0, 0x94, 0x03, 0x90, 0x96, 0xC5, 0xE0, 0x94,
-0x00, 0x40, 0x06, 0xF1, 0x56, 0x7B, 0x5A, 0x80,
-0x17, 0x7F, 0x01, 0x80, 0x1D, 0xD3, 0x90, 0x96,
-0xC6, 0xE0, 0x94, 0xE8, 0x90, 0x96, 0xC5, 0xE0,
-0x94, 0x03, 0x40, 0x0C, 0xF1, 0x56, 0x7B, 0x5B,
-0xE4, 0xFF, 0x12, 0x9C, 0x10, 0x7F, 0x00, 0x22,
-0x7F, 0x32, 0x7E, 0x00, 0x12, 0x7C, 0x6A, 0x90,
-0x96, 0xC5, 0x91, 0xDE, 0x80, 0x97, 0x90, 0x01,
-0xC0, 0xE0, 0x44, 0x20, 0xF0, 0x90, 0x96, 0xC7,
-0xE0, 0xFD, 0x22, 0xF0, 0x7F, 0x0A, 0x7E, 0x00,
-0x02, 0x7C, 0x6A, 0x90, 0x00, 0x08, 0xE0, 0x54,
-0xEF, 0xF0, 0x22, 0x90, 0x01, 0xE4, 0x74, 0x29,
-0xF0, 0xA3, 0xE4, 0xF0, 0x22, 0x90, 0x04, 0x24,
-0xEF, 0xF0, 0x90, 0x04, 0x57, 0xF0, 0x22, 0x90,
-0x01, 0x95, 0xE0, 0x7F, 0x00, 0x30, 0xE4, 0x02,
-0x7F, 0x01, 0x22, 0x90, 0x01, 0x94, 0xE0, 0x44,
-0x01, 0xF0, 0x90, 0x01, 0xC7, 0xE4, 0xF0, 0x22,
-0xE4, 0x90, 0x86, 0xAF, 0x12, 0x97, 0x3A, 0x90,
-0x93, 0x01, 0xF0, 0x90, 0x93, 0x5D, 0xF0, 0xA3,
-0xF0, 0x22, 0x90, 0x88, 0xA0, 0xE0, 0xC4, 0x13,
-0x13, 0x54, 0x01, 0xFF, 0x90, 0x88, 0xE0, 0xE0,
-0xFB, 0x90, 0x88, 0xDF, 0xE0, 0x90, 0x92, 0x90,
-0x22, 0x90, 0x01, 0x9A, 0xE0, 0x54, 0xC0, 0x44,
-0x0B, 0xF1, 0x63, 0x90, 0x01, 0x98, 0xE0, 0x54,
-0xC0, 0x7F, 0x00, 0xB4, 0x40, 0x02, 0x7F, 0x01,
-0x22, 0x12, 0x02, 0x06, 0x90, 0x93, 0x25, 0x12,
-0x87, 0xE6, 0x90, 0x93, 0x26, 0x12, 0x87, 0x26,
-0x90, 0x93, 0x27, 0xF0, 0x22, 0xEF, 0xB4, 0xFF,
-0x06, 0x90, 0x93, 0x5D, 0xED, 0xF0, 0x22, 0xEF,
-0xF4, 0xFE, 0x90, 0x93, 0x5D, 0xE0, 0x5E, 0xFE,
-0xED, 0x5F, 0x4E, 0xF0, 0x22, 0xEF, 0xB4, 0xFF,
-0x06, 0x90, 0x93, 0x5E, 0xED, 0xF0, 0x22, 0xEF,
-0xF4, 0xFE, 0x90, 0x93, 0x5E, 0x80, 0xE6, 0x90,
-0x96, 0xD8, 0xED, 0xF0, 0x64, 0x01, 0x60, 0x26,
-0xE0, 0xFE, 0x64, 0x02, 0x60, 0x20, 0xEE, 0x64,
-0x29, 0x60, 0x1B, 0xEE, 0x64, 0x2A, 0x60, 0x16,
-0xEE, 0x64, 0x36, 0x60, 0x11, 0xEE, 0xB4, 0x37,
-0x02, 0x80, 0x0B, 0xAD, 0x07, 0x7F, 0xFF, 0x11,
-0x0D, 0x90, 0x93, 0x5E, 0xE0, 0xFF, 0x90, 0x93,
-0x5D, 0xE0, 0x4F, 0x90, 0x05, 0x22, 0xF0, 0x90,
-0x96, 0xD8, 0xE0, 0x90, 0x93, 0x01, 0xF0, 0x22,
-0x12, 0x02, 0x06, 0x64, 0x01, 0x60, 0x02, 0x01,
-0xF6, 0x90, 0x94, 0xFD, 0xF0, 0x90, 0x94, 0xFD,
-0xE0, 0xFF, 0xC3, 0x94, 0x10, 0x50, 0x27, 0xEF,
-0x11, 0xF7, 0x7A, 0x94, 0x79, 0xFC, 0x12, 0x5F,
-0xA6, 0xBF, 0x01, 0x12, 0x90, 0x94, 0xFC, 0xE0,
-0xFF, 0xA3, 0xE0, 0x24, 0xFE, 0xF5, 0x82, 0xE4,
-0x34, 0x94, 0xF5, 0x83, 0xEF, 0xF0, 0x90, 0x94,
-0xFD, 0xE0, 0x04, 0xF0, 0x80, 0xCF, 0x75, 0x45,
-0x01, 0x75, 0x46, 0x94, 0x75, 0x47, 0xFE, 0x75,
-0x48, 0x08, 0x7B, 0x01, 0x7A, 0x94, 0x79, 0xB8,
-0x12, 0x69, 0xF5, 0x90, 0x94, 0xB6, 0x74, 0x24,
-0xF0, 0x90, 0x94, 0xD8, 0x74, 0x08, 0xF0, 0x75,
-0x45, 0x01, 0x75, 0x46, 0x95, 0x75, 0x47, 0x06,
-0xF5, 0x48, 0x7B, 0x01, 0x7A, 0x94, 0x79, 0xDB,
-0x12, 0x69, 0xF5, 0x90, 0x94, 0xD9, 0x74, 0x25,
-0xF0, 0x90, 0x94, 0xFB, 0x74, 0x08, 0xF0, 0x12,
-0x9B, 0x14, 0x12, 0xAF, 0x87, 0x12, 0x04, 0x7E,
-0x7B, 0x01, 0x7A, 0x94, 0x79, 0xD9, 0x12, 0x8D,
-0x16, 0x7F, 0x04, 0x12, 0x04, 0x7E, 0x22, 0x24,
-0xA8, 0xFF, 0xE4, 0x34, 0x01, 0xFE, 0x7B, 0x01,
-0x22, 0x51, 0x0D, 0x64, 0x01, 0x60, 0x02, 0x21,
-0x8E, 0xEF, 0x24, 0x39, 0x60, 0x12, 0x14, 0x60,
-0x19, 0x24, 0x02, 0x70, 0x1F, 0xE4, 0x90, 0x94,
-0xBC, 0xF0, 0xA3, 0x74, 0x06, 0xF0, 0x80, 0x14,
-0x90, 0x94, 0xBC, 0x74, 0x06, 0xF0, 0xA3, 0xF0,
-0x80, 0x0A, 0x90, 0x94, 0xBC, 0x74, 0x0C, 0xF0,
-0xA3, 0x74, 0x04, 0xF0, 0x31, 0xA2, 0x31, 0x8F,
-0x40, 0x1B, 0x90, 0x94, 0xBA, 0xE0, 0x11, 0xF7,
-0x7A, 0x94, 0x79, 0xB9, 0x12, 0x5F, 0xA6, 0xBF,
-0x01, 0x07, 0x90, 0x94, 0xB9, 0xE0, 0xF4, 0x70,
-0x3D, 0x31, 0x97, 0x80, 0xE1, 0x31, 0xA2, 0x31,
-0x8F, 0x40, 0x33, 0x90, 0x94, 0xBA, 0xE0, 0xFD,
-0x7C, 0x00, 0x24, 0xA8, 0xFF, 0xEC, 0x34, 0x01,
-0xFE, 0xED, 0x24, 0x01, 0xFD, 0xEC, 0x33, 0xFC,
-0x90, 0x94, 0xBC, 0xE0, 0xFB, 0xC3, 0xED, 0x9B,
-0xFD, 0xEC, 0x94, 0x00, 0xFC, 0x12, 0x88, 0xD3,
-0x8D, 0x82, 0x8C, 0x83, 0x12, 0x02, 0x1F, 0xFD,
-0x31, 0xB3, 0x31, 0x97, 0x80, 0xC9, 0x22, 0x90,
-0x94, 0xBB, 0xE0, 0xD3, 0x94, 0x00, 0x22, 0x90,
-0x94, 0xBA, 0xE0, 0x04, 0xF0, 0xA3, 0xE0, 0x14,
-0xF0, 0x22, 0x90, 0x94, 0xBC, 0xE0, 0x90, 0x94,
-0xBA, 0xF0, 0x90, 0x94, 0xBD, 0xE0, 0x90, 0x94,
-0xBB, 0xF0, 0x22, 0xE4, 0x90, 0x94, 0xBE, 0xF0,
-0x90, 0x00, 0x37, 0xE0, 0x44, 0x80, 0xF0, 0x90,
-0x00, 0xCF, 0x74, 0x69, 0xF0, 0xEF, 0x90, 0x00,
-0x31, 0xF0, 0xEE, 0x54, 0x03, 0xFF, 0xA3, 0xE0,
-0x54, 0xFC, 0x4F, 0xF0, 0x90, 0x00, 0x30, 0xED,
-0xF0, 0x90, 0x00, 0x33, 0xE0, 0x44, 0x80, 0xF0,
-0x90, 0x00, 0x33, 0xE0, 0x30, 0xE7, 0x09, 0x51,
-0x05, 0x50, 0x05, 0xE0, 0x04, 0xF0, 0x80, 0xF0,
-0x90, 0x00, 0xCF, 0xE4, 0xF0, 0x90, 0x00, 0x37,
-0xE0, 0x54, 0x7F, 0xF0, 0x51, 0x05, 0x7F, 0x00,
-0x50, 0x02, 0x7F, 0x01, 0x22, 0x90, 0x94, 0xBE,
-0xE0, 0xC3, 0x94, 0x64, 0x22, 0x90, 0x94, 0xB6,
-0x12, 0x86, 0x76, 0x02, 0x02, 0x06, 0x75, 0x29,
+0x00, 0x00, 0x00, 0x00, 0x00, 0x7F, 0x14, 0x7E,
+0x00, 0x02, 0x7C, 0x6A, 0x90, 0x88, 0xA0, 0xE0,
+0xC4, 0x13, 0x13, 0x54, 0x01, 0xFF, 0x90, 0x88,
+0xE0, 0xE0, 0xFB, 0x90, 0x88, 0xDF, 0xE0, 0x90,
+0x92, 0x90, 0x22, 0xE0, 0xFF, 0x24, 0x40, 0xF5,
+0x82, 0xE4, 0x34, 0x93, 0xF5, 0x83, 0xE0, 0x90,
+0x01, 0xB0, 0xF0, 0x74, 0x45, 0x2F, 0xF5, 0x82,
+0xE4, 0x34, 0x93, 0xF5, 0x83, 0xE0, 0x90, 0x01,
+0xB1, 0xF0, 0x22, 0xE0, 0xFF, 0x24, 0x36, 0xF5,
+0x82, 0xE4, 0x34, 0x93, 0xF5, 0x83, 0xE0, 0x90,
+0x01, 0xB2, 0xF0, 0x74, 0x3B, 0x2F, 0xF5, 0x82,
+0xE4, 0x34, 0x93, 0xF5, 0x83, 0xE0, 0x90, 0x01,
+0xB3, 0xF0, 0xE0, 0x22, 0x90, 0x96, 0xF8, 0xEF,
+0x12, 0x9F, 0xB2, 0x90, 0x01, 0x09, 0xE0, 0x7F,
+0x00, 0x30, 0xE7, 0x02, 0x7F, 0x01, 0x90, 0x96,
+0xF8, 0xE0, 0x6F, 0x60, 0x36, 0xC3, 0x90, 0x96,
+0xFA, 0xE0, 0x94, 0x88, 0x90, 0x96, 0xF9, 0xE0,
+0x94, 0x13, 0x40, 0x08, 0x90, 0x01, 0xC0, 0xE0,
+0x44, 0x10, 0xF0, 0x22, 0x90, 0x96, 0xF9, 0x12,
+0xA7, 0xDC, 0x12, 0xBF, 0xE2, 0xD3, 0x90, 0x96,
+0xFA, 0xE0, 0x94, 0x32, 0x90, 0x96, 0xF9, 0xE0,
+0x94, 0x00, 0x40, 0xBF, 0x90, 0x01, 0xC6, 0xE0,
+0x30, 0xE0, 0xB8, 0x22, 0xF0, 0x7F, 0x0A, 0x7E,
+0x00, 0x02, 0x7C, 0x6A, 0x90, 0x01, 0xB8, 0xE4,
+0xF0, 0x7F, 0x01, 0x22, 0x90, 0x88, 0x31, 0xE0,
+0x30, 0xE0, 0x02, 0x31, 0x66, 0x22, 0x90, 0x01,
+0x9A, 0xE0, 0x54, 0xC0, 0x44, 0x0B, 0x71, 0x9C,
+0x90, 0x01, 0x98, 0xE0, 0x54, 0xC0, 0x7F, 0x00,
+0xB4, 0x40, 0x02, 0x7F, 0x01, 0x22, 0x12, 0x7B,
+0x1B, 0x90, 0x86, 0xB3, 0xEF, 0xF0, 0x11, 0x34,
+0x90, 0x01, 0x64, 0x74, 0x01, 0xF0, 0x90, 0x04,
+0x23, 0xE0, 0x44, 0x80, 0xF0, 0x02, 0x67, 0xD2,
+0x90, 0x01, 0xC4, 0x74, 0xE8, 0xF0, 0x74, 0xC3,
+0xA3, 0xF0, 0x7F, 0x90, 0x12, 0x7B, 0x41, 0xEF,
+0x20, 0xE0, 0xF7, 0x74, 0xE8, 0x04, 0x90, 0x01,
+0xC4, 0xF0, 0x74, 0xC3, 0xA3, 0xF0, 0x22, 0x75,
+0x39, 0x07, 0x43, 0x39, 0x10, 0x75, 0x3A, 0x01,
+0x43, 0x3A, 0x08, 0x75, 0x3B, 0x03, 0x75, 0x3C,
+0x62, 0x43, 0x3C, 0x80, 0x43, 0x3B, 0x04, 0x90,
+0x01, 0x38, 0xE5, 0x39, 0xF0, 0xA3, 0xE5, 0x3A,
+0xF0, 0xA3, 0xE5, 0x3B, 0xF0, 0xA3, 0xE5, 0x3C,
+0xF0, 0x22, 0xE4, 0x90, 0x97, 0x03, 0xF0, 0xA3,
+0xF0, 0x90, 0x02, 0x86, 0xE0, 0x20, 0xE1, 0x23,
+0xC3, 0x90, 0x97, 0x04, 0xE0, 0x94, 0xD0, 0x90,
+0x97, 0x03, 0xE0, 0x94, 0x07, 0x40, 0x0A, 0x90,
+0x01, 0xC1, 0xE0, 0x44, 0x04, 0xF0, 0x7F, 0x00,
+0x22, 0x90, 0x97, 0x03, 0x12, 0xA7, 0xDC, 0x71,
+0x9D, 0x80, 0xD6, 0x7F, 0x01, 0x22, 0x75, 0x29,
 0x12, 0xE4, 0xF5, 0x2A, 0x75, 0x2B, 0x87, 0x75,
 0x2C, 0x33, 0xF5, 0x31, 0xF5, 0x32, 0xF5, 0x33,
 0xF5, 0x34, 0x90, 0x01, 0x30, 0xE5, 0x29, 0xF0,
 0xA3, 0xE5, 0x2A, 0xF0, 0xA3, 0xE5, 0x2B, 0xF0,
 0xA3, 0xE5, 0x2C, 0xF0, 0x90, 0x01, 0x20, 0xE5,
 0x31, 0xF0, 0xA3, 0xE5, 0x32, 0xF0, 0xA3, 0xE5,
-0x33, 0xF0, 0xA3, 0xE5, 0x34, 0xF0, 0x22, 0x75,
-0x39, 0x07, 0x43, 0x39, 0x10, 0x75, 0x3A, 0x01,
-0x43, 0x3A, 0x08, 0x75, 0x3B, 0x03, 0x75, 0x3C,
-0x62, 0x43, 0x3C, 0x80, 0x43, 0x3B, 0x04, 0x90,
-0x01, 0x38, 0xE5, 0x39, 0xF0, 0xA3, 0xE5, 0x3A,
-0xF0, 0xA3, 0xE5, 0x3B, 0xF0, 0xA3, 0xE5, 0x3C,
-0xF0, 0x22, 0x7D, 0x02, 0x90, 0x01, 0xC4, 0x74,
-0x7A, 0xF0, 0x74, 0xC2, 0xA3, 0xF0, 0x90, 0x93,
-0x49, 0xE0, 0xFF, 0xED, 0xC3, 0x9F, 0x50, 0x18,
-0xED, 0x25, 0xE0, 0x24, 0x81, 0xF8, 0xE6, 0x30,
-0xE4, 0x0B, 0x90, 0x01, 0xB8, 0x74, 0x08, 0xF0,
-0xA3, 0xF0, 0x7F, 0x00, 0x22, 0x0D, 0x80, 0xDE,
-0x74, 0x7A, 0x04, 0x90, 0x01, 0xC4, 0xF0, 0x74,
-0xC2, 0xA3, 0xF0, 0x7F, 0x01, 0x22, 0xE4, 0x90,
-0x95, 0x0E, 0xF0, 0xA3, 0xF0, 0xA3, 0xF0, 0x90,
-0x95, 0x0E, 0xE0, 0x64, 0x01, 0xF0, 0x90, 0x93,
-0x55, 0xE0, 0x70, 0x18, 0x90, 0x93, 0x52, 0xE0,
-0x70, 0x12, 0xA3, 0xE0, 0x70, 0x0E, 0x90, 0x95,
-0x0E, 0xE0, 0x24, 0xB6, 0x90, 0x01, 0xC4, 0xF0,
-0x74, 0xC2, 0xA3, 0xF0, 0x12, 0x7C, 0x54, 0xBF,
-0x01, 0x03, 0x12, 0x54, 0x9F, 0x90, 0x88, 0x36,
-0xE0, 0x60, 0x0F, 0x90, 0x88, 0x39, 0xE0, 0xFF,
-0x90, 0x88, 0x38, 0xE0, 0x6F, 0x60, 0x03, 0x12,
-0xA6, 0x9F, 0xC2, 0xAF, 0x51, 0x7A, 0xBF, 0x01,
-0x02, 0x71, 0xD6, 0xD2, 0xAF, 0x71, 0x17, 0x12,
-0x9F, 0xD5, 0x12, 0x83, 0x4D, 0x80, 0xA8, 0xD3,
-0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0x90, 0x93,
-0x52, 0xE0, 0x60, 0x24, 0x7F, 0x54, 0x7E, 0x09,
-0x12, 0x70, 0x70, 0x71, 0xC3, 0x12, 0x04, 0xB8,
-0xEF, 0x44, 0xFE, 0xFF, 0xEE, 0x44, 0x03, 0xFE,
-0xED, 0x44, 0x04, 0xFD, 0xEC, 0x71, 0xC3, 0x71,
-0xCD, 0x7F, 0x54, 0x7E, 0x09, 0x12, 0x70, 0xAD,
-0x90, 0x93, 0x4D, 0xE0, 0x70, 0x29, 0x90, 0x07,
-0xCC, 0xE0, 0x30, 0xE0, 0x22, 0xE4, 0xF0, 0x90,
-0x95, 0x15, 0x74, 0x22, 0xF0, 0x90, 0x95, 0x37,
-0x74, 0x01, 0xF0, 0x90, 0x95, 0x17, 0x74, 0x03,
-0xF0, 0x7B, 0x01, 0x7A, 0x95, 0x79, 0x15, 0x12,
-0x8D, 0x16, 0x7F, 0x04, 0x12, 0x04, 0x7E, 0x90,
-0x93, 0x55, 0xE0, 0xFF, 0x70, 0x0A, 0x90, 0x93,
-0x52, 0xE0, 0x70, 0x04, 0xA3, 0xE0, 0x60, 0x15,
-0x90, 0x00, 0x1F, 0xE0, 0x54, 0xF0, 0xF0, 0x90,
-0x01, 0xC5, 0x74, 0xEA, 0xF0, 0xA3, 0x74, 0xEF,
-0xF0, 0xA3, 0x74, 0xFD, 0xF0, 0xEF, 0x60, 0x06,
-0x90, 0x01, 0xC4, 0x74, 0x07, 0xF0, 0x90, 0x93,
-0x52, 0xE0, 0x60, 0x06, 0x90, 0x01, 0xC4, 0x74,
-0x01, 0xF0, 0x90, 0x93, 0x53, 0xE0, 0x60, 0x06,
-0x90, 0x01, 0xC4, 0x74, 0x02, 0xF0, 0xD0, 0xD0,
-0x92, 0xAF, 0x22, 0x90, 0x95, 0x11, 0x12, 0x04,
-0x31, 0x90, 0x95, 0x11, 0x22, 0x12, 0x04, 0xB8,
-0x90, 0x92, 0x18, 0x02, 0x04, 0x31, 0x90, 0x88,
-0x31, 0xE0, 0x30, 0xE0, 0x03, 0x12, 0x97, 0xD2,
+0x33, 0xF0, 0xA3, 0xE5, 0x34, 0xF0, 0x22, 0xE4,
+0x90, 0x95, 0x15, 0xF0, 0xA3, 0xF0, 0xA3, 0xF0,
+0x90, 0x95, 0x15, 0xE0, 0x64, 0x01, 0xF0, 0x90,
+0x93, 0x56, 0xE0, 0x70, 0x18, 0x90, 0x93, 0x53,
+0xE0, 0x70, 0x12, 0xA3, 0xE0, 0x70, 0x0E, 0x90,
+0x95, 0x15, 0xE0, 0x24, 0x9F, 0x90, 0x01, 0xC4,
+0xF0, 0x74, 0xC4, 0xA3, 0xF0, 0x12, 0x7C, 0x54,
+0xBF, 0x01, 0x03, 0x12, 0x54, 0x9F, 0x90, 0x88,
+0x36, 0xE0, 0x60, 0x0F, 0x90, 0x88, 0x39, 0xE0,
+0xFF, 0x90, 0x88, 0x38, 0xE0, 0x6F, 0x60, 0x03,
+0x12, 0xAE, 0x85, 0xC2, 0xAF, 0xD1, 0x7E, 0xBF,
+0x01, 0x02, 0x71, 0xAC, 0xD2, 0xAF, 0xB1, 0x00,
+0x12, 0x8F, 0xF6, 0x12, 0x83, 0x4D, 0x80, 0xA8,
+0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0x90,
+0x93, 0x53, 0xE0, 0x60, 0x24, 0x7F, 0x54, 0x7E,
+0x09, 0x12, 0x70, 0x70, 0xB1, 0xAC, 0x12, 0x04,
+0xB8, 0xEF, 0x44, 0xFE, 0xFF, 0xEE, 0x44, 0x03,
+0xFE, 0xED, 0x44, 0x04, 0xFD, 0xEC, 0xB1, 0xAC,
+0xB1, 0xB6, 0x7F, 0x54, 0x7E, 0x09, 0x12, 0x70,
+0xAD, 0x90, 0x93, 0x4E, 0xE0, 0x70, 0x29, 0x90,
+0x07, 0xCC, 0xE0, 0x30, 0xE0, 0x22, 0xE4, 0xF0,
+0x90, 0x95, 0x1C, 0x74, 0x22, 0xF0, 0x90, 0x95,
+0x3E, 0x74, 0x01, 0xF0, 0x90, 0x95, 0x1E, 0x74,
+0x03, 0xF0, 0x7B, 0x01, 0x7A, 0x95, 0x79, 0x1C,
+0x12, 0x8A, 0x4D, 0x7F, 0x04, 0x12, 0x04, 0x7E,
+0x90, 0x93, 0x56, 0xE0, 0xFF, 0x70, 0x0A, 0x90,
+0x93, 0x53, 0xE0, 0x70, 0x04, 0xA3, 0xE0, 0x60,
+0x15, 0x90, 0x00, 0x1F, 0xE0, 0x54, 0xF0, 0xF0,
+0x90, 0x01, 0xC5, 0x74, 0xEA, 0xF0, 0xA3, 0x74,
+0xEF, 0xF0, 0xA3, 0x74, 0xFD, 0xF0, 0xEF, 0x60,
+0x06, 0x90, 0x01, 0xC4, 0x74, 0x07, 0xF0, 0x90,
+0x93, 0x53, 0xE0, 0x60, 0x06, 0x90, 0x01, 0xC4,
+0x74, 0x01, 0xF0, 0x90, 0x93, 0x54, 0xE0, 0x60,
+0x06, 0x90, 0x01, 0xC4, 0x74, 0x02, 0xF0, 0xD0,
+0xD0, 0x92, 0xAF, 0x22, 0x90, 0x95, 0x18, 0x12,
+0x04, 0x31, 0x90, 0x95, 0x18, 0x22, 0x12, 0x04,
+0xB8, 0x90, 0x92, 0x18, 0x02, 0x04, 0x31, 0xD3,
+0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0xD1, 0x69,
+0x90, 0x96, 0xEA, 0x12, 0x04, 0x31, 0x90, 0x96,
+0xEA, 0xB1, 0xB6, 0xB1, 0xF6, 0x90, 0x01, 0x01,
+0xE0, 0x44, 0x02, 0xF0, 0x90, 0x01, 0x00, 0x74,
+0xFF, 0xF0, 0x90, 0x06, 0xB7, 0x74, 0x09, 0xF0,
+0x90, 0x06, 0xB4, 0x74, 0x86, 0xF0, 0x12, 0xAF,
+0xCA, 0xD0, 0xD0, 0x92, 0xAF, 0x22, 0x7F, 0x30,
+0x7E, 0x08, 0x02, 0x70, 0xAD, 0xD3, 0x10, 0xAF,
+0x01, 0xC3, 0xC0, 0xD0, 0xD1, 0x69, 0x90, 0x96,
+0xEE, 0x12, 0x04, 0x31, 0x90, 0x96, 0xEE, 0xB1,
+0xB6, 0xB1, 0xF6, 0x90, 0x8A, 0xFD, 0x12, 0x8E,
+0xAD, 0x90, 0x06, 0xB7, 0x74, 0x11, 0xF0, 0x7F,
+0x03, 0x7E, 0x00, 0x12, 0x7C, 0x6A, 0x90, 0x06,
+0xB4, 0xE0, 0x54, 0x0F, 0x70, 0xF1, 0x90, 0x07,
+0xD5, 0xE0, 0x44, 0x80, 0xF0, 0x7F, 0x0A, 0x80,
+0x09, 0x90, 0x06, 0x62, 0xE0, 0x30, 0xE0, 0x09,
+0x7F, 0x01, 0x7E, 0x00, 0x12, 0x7C, 0x6A, 0x80,
+0xF0, 0xD1, 0x76, 0x90, 0x01, 0x00, 0x74, 0x3F,
+0xF0, 0xA3, 0xE0, 0x54, 0xFD, 0xF0, 0x90, 0x05,
+0x53, 0xE0, 0x44, 0x20, 0xF0, 0x90, 0x07, 0xD5,
+0xE0, 0x54, 0x7F, 0xF0, 0xD0, 0xD0, 0x92, 0xAF,
+0x22, 0x7F, 0x30, 0x7E, 0x08, 0x12, 0x70, 0x70,
+0xED, 0x44, 0x80, 0xFD, 0xEC, 0x22, 0x90, 0x00,
+0x02, 0xE0, 0x54, 0xFE, 0xF0, 0x22, 0x7D, 0x02,
+0x90, 0x01, 0xC4, 0x74, 0x7E, 0xF0, 0x74, 0xC6,
+0xA3, 0xF0, 0x90, 0x93, 0x4A, 0xE0, 0xFF, 0xED,
+0xC3, 0x9F, 0x50, 0x18, 0xED, 0x25, 0xE0, 0x24,
+0x81, 0xF8, 0xE6, 0x30, 0xE4, 0x0B, 0x90, 0x01,
+0xB8, 0x74, 0x08, 0xF0, 0xA3, 0xF0, 0x7F, 0x00,
+0x22, 0x0D, 0x80, 0xDE, 0x74, 0x7E, 0x04, 0x90,
+0x01, 0xC4, 0xF0, 0x74, 0xC6, 0xA3, 0xF0, 0x7F,
+0x01, 0x22, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0,
+0xD0, 0x90, 0x96, 0x98, 0xEE, 0xF0, 0xA3, 0xEF,
+0xF0, 0x12, 0x70, 0x70, 0x90, 0x96, 0xA2, 0x12,
+0x04, 0x31, 0x90, 0x96, 0x9A, 0x12, 0x04, 0xB8,
+0x12, 0x03, 0xCD, 0x90, 0x96, 0xA2, 0x12, 0x86,
+0x61, 0x12, 0x86, 0x47, 0xC0, 0x04, 0xC0, 0x05,
+0xC0, 0x06, 0xC0, 0x07, 0x90, 0x96, 0x9A, 0x12,
+0x04, 0xB8, 0x90, 0x96, 0x9E, 0x12, 0x86, 0x61,
+0x12, 0x86, 0x47, 0xD0, 0x03, 0xD0, 0x02, 0xD0,
+0x01, 0xD0, 0x00, 0x12, 0x86, 0x54, 0x90, 0x96,
+0xA6, 0x12, 0x04, 0x31, 0x90, 0x96, 0xA6, 0xB1,
+0xB6, 0x90, 0x96, 0x98, 0xE0, 0xFE, 0xA3, 0xE0,
+0xFF, 0x12, 0x70, 0xAD, 0xD0, 0xD0, 0x92, 0xAF,
 0x22, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0,
-0x91, 0x8B, 0x90, 0x96, 0xB9, 0x12, 0x04, 0x31,
-0x90, 0x96, 0xB9, 0x71, 0xCD, 0x91, 0x18, 0x90,
-0x01, 0x01, 0xE0, 0x44, 0x02, 0xF0, 0x90, 0x01,
-0x00, 0x74, 0xFF, 0xF0, 0x90, 0x06, 0xB7, 0x74,
-0x09, 0xF0, 0x90, 0x06, 0xB4, 0x74, 0x86, 0xF0,
-0x12, 0xAF, 0xD8, 0xD0, 0xD0, 0x92, 0xAF, 0x22,
-0x7F, 0x30, 0x7E, 0x08, 0x02, 0x70, 0xAD, 0xD3,
-0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0x91, 0x8B,
-0x90, 0x96, 0xBD, 0x12, 0x04, 0x31, 0x90, 0x96,
-0xBD, 0x71, 0xCD, 0x91, 0x18, 0x90, 0x8A, 0xFD,
-0x12, 0x8B, 0x95, 0x90, 0x06, 0xB7, 0x74, 0x11,
-0xF0, 0x7F, 0x03, 0x7E, 0x00, 0x12, 0x7C, 0x6A,
-0x90, 0x06, 0xB4, 0xE0, 0x54, 0x0F, 0x70, 0xF1,
-0x90, 0x07, 0xD5, 0xE0, 0x44, 0x80, 0xF0, 0x7F,
-0x0A, 0x80, 0x09, 0x90, 0x06, 0x62, 0xE0, 0x30,
-0xE0, 0x09, 0x7F, 0x01, 0x7E, 0x00, 0x12, 0x7C,
-0x6A, 0x80, 0xF0, 0x91, 0x98, 0x90, 0x01, 0x00,
-0x74, 0x3F, 0xF0, 0xA3, 0xE0, 0x54, 0xFD, 0xF0,
-0x90, 0x05, 0x53, 0xE0, 0x44, 0x20, 0xF0, 0x90,
-0x07, 0xD5, 0xE0, 0x54, 0x7F, 0xF0, 0xD0, 0xD0,
-0x92, 0xAF, 0x22, 0x7F, 0x30, 0x7E, 0x08, 0x12,
-0x70, 0x70, 0xED, 0x44, 0x80, 0xFD, 0xEC, 0x22,
-0x90, 0x00, 0x02, 0xE0, 0x54, 0xFE, 0xF0, 0x22,
-0xE4, 0x90, 0x95, 0xC3, 0xF0, 0x12, 0xAA, 0x64,
-0x60, 0x02, 0xA1, 0xE4, 0x90, 0x88, 0x36, 0xE0,
-0x70, 0x02, 0xA1, 0xE4, 0x90, 0x88, 0x9D, 0xE0,
-0x20, 0xE0, 0x2E, 0x90, 0x06, 0xA9, 0xE0, 0x54,
-0xC0, 0x70, 0x26, 0x90, 0x88, 0x9C, 0xE0, 0x70,
-0x20, 0x90, 0x04, 0x1A, 0xE0, 0xF4, 0x70, 0x19,
-0xA3, 0xE0, 0x54, 0x07, 0xFF, 0xBF, 0x07, 0x11,
-0x90, 0x06, 0x62, 0xE0, 0x54, 0x03, 0x70, 0x09,
-0x90, 0x88, 0x39, 0xE0, 0xB4, 0x04, 0x02, 0x91,
-0x98, 0x90, 0x05, 0x63, 0xE0, 0x90, 0x88, 0x85,
-0xF0, 0x90, 0x05, 0x62, 0xE0, 0x90, 0x88, 0x86,
-0xF0, 0x90, 0x05, 0x61, 0xE0, 0x90, 0x88, 0x87,
-0xF0, 0x90, 0x05, 0x60, 0xE0, 0x90, 0x88, 0x88,
-0xF0, 0x90, 0x07, 0xF1, 0xE0, 0x90, 0x94, 0x9F,
-0xF0, 0x90, 0x07, 0xF0, 0xE0, 0x90, 0x94, 0xA0,
-0xF0, 0x12, 0xAF, 0x7B, 0x90, 0x88, 0x3A, 0xE0,
-0x54, 0xEC, 0xF0, 0xB1, 0xED, 0x24, 0xFD, 0x50,
-0x02, 0x80, 0x03, 0x12, 0xA7, 0x32, 0xB1, 0xED,
-0x64, 0x01, 0x70, 0x3A, 0x90, 0x06, 0xAB, 0xE0,
-0x90, 0x88, 0x3D, 0xF0, 0x90, 0x06, 0xA9, 0xE0,
-0x30, 0xE5, 0x06, 0xA3, 0xE0, 0x90, 0x95, 0xC3,
-0xF0, 0x90, 0x95, 0xC3, 0xE0, 0xFF, 0x60, 0x02,
-0x80, 0x05, 0x90, 0x88, 0x3C, 0xE0, 0xFF, 0x90,
-0x88, 0x3C, 0xEF, 0xF0, 0xA3, 0xE0, 0xFF, 0x70,
-0x08, 0x90, 0x88, 0x3C, 0xE0, 0xFE, 0xFF, 0x80,
-0x00, 0x90, 0x88, 0x3D, 0xEF, 0xF0, 0x12, 0xCB,
-0xC4, 0xE4, 0x90, 0x88, 0x3F, 0xF0, 0xA3, 0xF0,
-0x90, 0x88, 0x32, 0xD1, 0x81, 0x30, 0xE0, 0x61,
-0xEF, 0xC4, 0x13, 0x13, 0x54, 0x03, 0x20, 0xE0,
-0x23, 0xB1, 0xE5, 0x6F, 0x70, 0x53, 0xEF, 0x60,
-0x50, 0x90, 0x88, 0x32, 0xE0, 0x44, 0x40, 0xF0,
-0x12, 0xAF, 0xE8, 0xB1, 0xF6, 0x12, 0x7C, 0x05,
-0xD1, 0x89, 0xD1, 0x01, 0x90, 0x88, 0x3D, 0xE0,
-0x14, 0xF0, 0x80, 0x35, 0x90, 0x88, 0x34, 0xE0,
-0xC4, 0x54, 0x0F, 0x64, 0x01, 0x70, 0x2A, 0xB1,
-0xE5, 0xFE, 0x6F, 0x60, 0x24, 0x90, 0x05, 0x73,
-0xE0, 0xFF, 0xEE, 0x6F, 0x60, 0x1B, 0x90, 0x88,
-0x32, 0x12, 0x9F, 0xD7, 0x30, 0xE0, 0x12, 0xEF,
-0x54, 0xBF, 0xB1, 0xF6, 0x12, 0x7C, 0x3B, 0x7D,
-0x01, 0x7F, 0x02, 0x12, 0x7C, 0x74, 0x12, 0xAF,
-0xD1, 0x12, 0xAF, 0xE0, 0x22, 0x90, 0x88, 0x3C,
-0xE0, 0xFF, 0xA3, 0xE0, 0x22, 0x90, 0x88, 0x34,
-0xE0, 0xFF, 0xC4, 0x54, 0x0F, 0x22, 0xF0, 0x90,
-0x01, 0x3F, 0x74, 0x10, 0xF0, 0xFD, 0x7F, 0x03,
-0x22, 0x7D, 0x02, 0x7F, 0x02, 0x02, 0x7C, 0x7E,
-0x90, 0x88, 0x32, 0xD1, 0x81, 0x30, 0xE0, 0x0B,
-0xEF, 0xC4, 0x13, 0x13, 0x54, 0x03, 0x30, 0xE0,
-0x02, 0xD1, 0x01, 0x90, 0x88, 0x31, 0x12, 0x9F,
-0xD7, 0x30, 0xE0, 0x07, 0xEF, 0xD1, 0x9C, 0x70,
-0x4C, 0x80, 0x47, 0x90, 0x88, 0x3F, 0xE0, 0x04,
-0xF0, 0x90, 0x88, 0x3A, 0xE0, 0x54, 0xEF, 0xF0,
-0xD1, 0x90, 0x40, 0x36, 0x12, 0xAA, 0x63, 0x70,
-0x34, 0x12, 0xAF, 0x58, 0x70, 0x08, 0x90, 0x8A,
-0xF5, 0x12, 0x8B, 0x95, 0x80, 0x28, 0x90, 0x8A,
-0xF5, 0x12, 0x8B, 0x95, 0x90, 0x88, 0x40, 0xE0,
-0x04, 0xF0, 0xE0, 0xD3, 0x94, 0x02, 0x40, 0x09,
-0xD1, 0x76, 0xE4, 0x90, 0x88, 0x40, 0xF0, 0x80,
-0x03, 0x12, 0xA7, 0xB6, 0xE4, 0x90, 0x88, 0x3F,
-0xF0, 0x22, 0x12, 0xA6, 0x9F, 0x22, 0x90, 0x88,
-0x32, 0xE0, 0x54, 0xFB, 0xF0, 0x22, 0x90, 0x93,
-0x29, 0xE0, 0xFF, 0x13, 0x13, 0x13, 0x54, 0x1F,
-0x22, 0x7D, 0x01, 0x7F, 0x02, 0x02, 0x7C, 0x7E,
-0x90, 0x88, 0x93, 0xE0, 0xFF, 0x90, 0x88, 0x3F,
-0xE0, 0xD3, 0x9F, 0x22, 0x54, 0xFB, 0xF0, 0x90,
-0x88, 0x3A, 0xE0, 0x54, 0xFD, 0xF0, 0x54, 0x07,
-0x22, 0x90, 0x88, 0x36, 0xE0, 0x60, 0x14, 0x90,
-0x88, 0x9D, 0xE0, 0x30, 0xE0, 0x0B, 0x90, 0x94,
-0xAE, 0xE0, 0xFF, 0x12, 0x9D, 0xD0, 0x20, 0xE0,
-0x02, 0xD1, 0x08, 0x02, 0x8E, 0x5D, 0xD1, 0x90,
-0x40, 0x3A, 0x90, 0x88, 0x50, 0xE0, 0x04, 0xF0,
-0x90, 0x88, 0x92, 0xE0, 0xFF, 0x90, 0x88, 0x50,
-0xE0, 0xD3, 0x9F, 0x50, 0x27, 0x90, 0x88, 0x48,
-0xE0, 0x24, 0x08, 0xF0, 0x90, 0x88, 0x3F, 0x12,
-0xA9, 0xC7, 0x33, 0x33, 0x33, 0x54, 0xF8, 0xFF,
-0x90, 0x88, 0x3E, 0xE0, 0x2F, 0x90, 0x88, 0x4F,
-0xF0, 0xFB, 0x90, 0x88, 0x48, 0xE0, 0xFF, 0xA3,
-0xE0, 0xFD, 0xF1, 0x05, 0x22, 0x90, 0x92, 0x98,
-0x74, 0x03, 0xF0, 0x02, 0x6E, 0x2F, 0xD3, 0x10,
-0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0x90, 0x96, 0x69,
-0xEE, 0xF0, 0xA3, 0xEF, 0xF0, 0x12, 0x70, 0x70,
-0x90, 0x96, 0x73, 0x12, 0x04, 0x31, 0x90, 0x96,
-0x6B, 0x12, 0x04, 0xB8, 0x12, 0x03, 0xCD, 0x90,
-0x96, 0x73, 0x12, 0x86, 0x61, 0x12, 0x86, 0x47,
-0xC0, 0x04, 0xC0, 0x05, 0xC0, 0x06, 0xC0, 0x07,
-0x90, 0x96, 0x6B, 0x12, 0x04, 0xB8, 0x90, 0x96,
-0x6F, 0x12, 0x86, 0x61, 0x12, 0x86, 0x47, 0xD0,
-0x03, 0xD0, 0x02, 0xD0, 0x01, 0xD0, 0x00, 0x12,
-0x86, 0x54, 0x90, 0x96, 0x77, 0x12, 0x04, 0x31,
-0x90, 0x96, 0x77, 0x71, 0xCD, 0x90, 0x96, 0x69,
-0xE0, 0xFE, 0xA3, 0xE0, 0xFF, 0x12, 0x70, 0xAD,
-0xD0, 0xD0, 0x92, 0xAF, 0x22, 0x90, 0x8A, 0x79,
-0x74, 0x86, 0xF0, 0xA3, 0x74, 0xC6, 0xF0, 0x90,
-0x8A, 0xE5, 0x74, 0xC8, 0xF0, 0xA3, 0x74, 0xA2,
-0xF0, 0x90, 0x8B, 0x03, 0x74, 0x98, 0xF0, 0xA3,
-0x74, 0x39, 0xF0, 0x90, 0x8A, 0xB9, 0x74, 0x8B,
-0xF0, 0xA3, 0x74, 0x9F, 0xF0, 0x90, 0x8A, 0xD5,
-0x74, 0xA2, 0xF0, 0xA3, 0x74, 0x09, 0xF0, 0x90,
-0x8A, 0xFB, 0x74, 0xA3, 0xF0, 0xA3, 0x74, 0x89,
-0xF0, 0x90, 0x8A, 0xA5, 0x74, 0xB3, 0xF0, 0xA3,
-0x74, 0x85, 0xF0, 0x90, 0x8A, 0xB5, 0x74, 0xCF,
-0xF0, 0xA3, 0x74, 0xAB, 0xF0, 0x90, 0x8A, 0x75,
-0x74, 0xAD, 0xF0, 0xA3, 0x74, 0xD0, 0xF0, 0x90,
-0x8A, 0xC1, 0x74, 0x8D, 0xF0, 0xA3, 0x74, 0x31,
-0xF0, 0x90, 0x8A, 0xC3, 0x74, 0xD8, 0xF0, 0xA3,
-0x74, 0xEA, 0xF0, 0x90, 0x8A, 0xF3, 0x74, 0xD9,
-0xF0, 0xA3, 0x74, 0x1B, 0xF0, 0x90, 0x8A, 0x85,
-0x74, 0xD9, 0xF0, 0xA3, 0x74, 0xF6, 0xF0, 0x90,
-0x86, 0x04, 0x74, 0xCB, 0xF0, 0xA3, 0x74, 0x4C,
-0xF0, 0x90, 0x8A, 0xA9, 0x74, 0xD9, 0xF0, 0xA3,
-0x74, 0x27, 0xF0, 0x90, 0x8B, 0x07, 0x74, 0xD9,
-0xF0, 0xA3, 0x74, 0x4C, 0xF0, 0x90, 0x8A, 0xAD,
-0x74, 0xB2, 0xF0, 0xA3, 0x74, 0x25, 0xF0, 0x90,
-0x8A, 0xBB, 0x74, 0x9C, 0xF0, 0xA3, 0x74, 0x31,
-0xF0, 0x90, 0x86, 0x0C, 0x74, 0xC3, 0xF0, 0xA3,
-0x74, 0xE1, 0xF0, 0x90, 0x8A, 0xEF, 0x74, 0xC4,
-0xF0, 0xA3, 0x74, 0x1F, 0xF0, 0x90, 0x86, 0x00,
-0x74, 0xDA, 0xF0, 0xA3, 0x74, 0xE1, 0xF0, 0x90,
-0x86, 0x02, 0x74, 0xDB, 0xF0, 0xA3, 0x74, 0xAB,
-0xF0, 0x90, 0x8A, 0xFD, 0x74, 0xBE, 0xF0, 0xA3,
-0x74, 0xD9, 0xF0, 0x90, 0x8A, 0xF9, 0x74, 0xC0,
-0xF0, 0xA3, 0x74, 0x1F, 0xF0, 0x90, 0x8A, 0xDB,
-0x74, 0xCF, 0xF0, 0xA3, 0x74, 0xF6, 0xF0, 0x90,
-0x8A, 0xAF, 0x74, 0xB5, 0xF0, 0xA3, 0x74, 0x09,
-0xF0, 0x90, 0x8A, 0xD3, 0x74, 0xDC, 0xF0, 0xA3,
-0x74, 0x67, 0xF0, 0x90, 0x8A, 0xF5, 0x74, 0xC6,
-0xF0, 0xA3, 0x74, 0xC6, 0xF0, 0x90, 0x8A, 0xA3,
-0x74, 0xCE, 0xF0, 0xA3, 0x74, 0x03, 0xF0, 0x90,
-0x86, 0x06, 0x74, 0xB6, 0xF0, 0xA3, 0x74, 0x14,
+0x90, 0x88, 0x9D, 0xE0, 0x30, 0xE0, 0x10, 0x90,
+0x88, 0xA3, 0xE0, 0xC4, 0x13, 0x54, 0x07, 0x30,
+0xE0, 0x20, 0x75, 0x10, 0x10, 0x80, 0x3F, 0x12,
+0x7A, 0x65, 0xEF, 0x64, 0x01, 0x60, 0x05, 0x75,
+0x10, 0x01, 0x80, 0x32, 0x90, 0x88, 0x31, 0x12,
+0xAE, 0x23, 0x30, 0xE0, 0x05, 0x75, 0x10, 0x02,
+0x80, 0x24, 0x90, 0x88, 0x38, 0xE0, 0xD3, 0x94,
+0x04, 0x40, 0x05, 0x75, 0x10, 0x08, 0x80, 0x16,
+0x90, 0x93, 0x2A, 0xE0, 0x30, 0xE0, 0x0B, 0xC4,
+0x54, 0x0F, 0x30, 0xE0, 0x05, 0x75, 0x10, 0x11,
+0x80, 0x04, 0x71, 0xA4, 0x80, 0x0E, 0x90, 0x01,
+0xB9, 0x74, 0x02, 0xF0, 0x90, 0x01, 0xB8, 0xE5,
+0x10, 0xF0, 0x7F, 0x00, 0xD0, 0xD0, 0x92, 0xAF,
+0x22, 0x90, 0x01, 0xE4, 0x74, 0x2F, 0xF0, 0xA3,
+0xE4, 0xF0, 0x22, 0x90, 0x8A, 0x79, 0x74, 0x86,
+0xF0, 0xA3, 0x74, 0xC6, 0xF0, 0x90, 0x8A, 0xE5,
+0x74, 0xC8, 0xF0, 0xA3, 0x74, 0xD2, 0xF0, 0x90,
+0x8B, 0x03, 0x74, 0xB0, 0xF0, 0xA3, 0x74, 0x03,
+0xF0, 0x90, 0x8A, 0xB9, 0x74, 0xDE, 0xF0, 0xA3,
+0x74, 0x0B, 0xF0, 0x90, 0x8A, 0xD5, 0x74, 0x94,
+0xF0, 0xA3, 0x74, 0xEA, 0xF0, 0x90, 0x8A, 0xFB,
+0x74, 0x94, 0xF0, 0xA3, 0x74, 0x01, 0xF0, 0x90,
+0x8A, 0xA5, 0x74, 0xB5, 0xF0, 0xA3, 0x74, 0x2C,
+0xF0, 0x90, 0x8A, 0xB5, 0x74, 0x87, 0xF0, 0xA3,
+0x74, 0x2C, 0xF0, 0x90, 0x8A, 0x75, 0x74, 0xB6,
+0xF0, 0xA3, 0x74, 0x9B, 0xF0, 0x90, 0x8A, 0xC1,
+0x74, 0x89, 0xF0, 0xA3, 0x74, 0x08, 0xF0, 0x90,
+0x8A, 0xC3, 0x74, 0xD7, 0xF0, 0xA3, 0x74, 0xA2,
+0xF0, 0x90, 0x8A, 0xF3, 0x74, 0xD8, 0xF0, 0xA3,
+0x74, 0x33, 0xF0, 0x90, 0x8A, 0x85, 0x74, 0xDB,
+0xF0, 0xA3, 0x74, 0x1F, 0xF0, 0x90, 0x8A, 0x99,
+0x74, 0xDB, 0xF0, 0xA3, 0x74, 0xE6, 0xF0, 0x90,
+0x86, 0x04, 0x74, 0xDB, 0xF0, 0xA3, 0x74, 0x79,
+0xF0, 0x90, 0x8A, 0xA9, 0x74, 0xD8, 0xF0, 0xA3,
+0x74, 0x3F, 0xF0, 0x90, 0x8B, 0x07, 0x74, 0xD8,
+0xF0, 0xA3, 0x74, 0x64, 0xF0, 0x90, 0x8A, 0xAD,
+0x74, 0xD9, 0xF0, 0xA3, 0x74, 0x0E, 0xF0, 0x90,
+0x8A, 0xBB, 0x74, 0x8A, 0xF0, 0xA3, 0x74, 0x68,
+0xF0, 0x90, 0x86, 0x0C, 0x74, 0xC5, 0xF0, 0xA3,
+0x74, 0xBF, 0xF0, 0x90, 0x8A, 0xEF, 0x74, 0xC5,
+0xF0, 0xA3, 0x74, 0xFD, 0xF0, 0x90, 0x86, 0x00,
+0x74, 0xC7, 0xF0, 0xA3, 0x74, 0x21, 0xF0, 0x90,
+0x86, 0x02, 0x74, 0xDD, 0xF0, 0xA3, 0x74, 0x4E,
+0xF0, 0x90, 0x8A, 0xFD, 0x74, 0xA4, 0xF0, 0xA3,
+0x74, 0xB5, 0xF0, 0x90, 0x8A, 0xF9, 0x74, 0xCB,
+0xF0, 0xA3, 0x74, 0x77, 0xF0, 0x90, 0x8A, 0xDB,
+0x74, 0xCE, 0xF0, 0xA3, 0x74, 0xB2, 0xF0, 0x90,
+0x8A, 0xAF, 0x74, 0xA5, 0xF0, 0xA3, 0x74, 0x42,
+0xF0, 0x90, 0x8A, 0xD3, 0x74, 0xD6, 0xF0, 0xA3,
+0x74, 0x2A, 0xF0, 0x90, 0x8A, 0xF5, 0x74, 0xDF,
+0xF0, 0xA3, 0x74, 0x8A, 0xF0, 0x90, 0x8A, 0xA3,
+0x74, 0xDF, 0xF0, 0xA3, 0x74, 0xDE, 0xF0, 0x90,
+0x86, 0x06, 0x74, 0xA6, 0xF0, 0xA3, 0x74, 0x5C,
 0xF0, 0x22, 0x8F, 0x0D, 0x7F, 0x02, 0x12, 0x85,
 0x27, 0x90, 0x86, 0xAF, 0xE0, 0x45, 0x0D, 0xF0,
 0x22, 0xC0, 0xE0, 0xC0, 0xF0, 0xC0, 0x83, 0xC0,
 0x82, 0xC0, 0xD0, 0x75, 0xD0, 0x00, 0xC0, 0x00,
 0xC0, 0x01, 0xC0, 0x02, 0xC0, 0x03, 0xC0, 0x04,
 0xC0, 0x05, 0xC0, 0x06, 0xC0, 0x07, 0x90, 0x01,
-0xC4, 0x74, 0xB1, 0xF0, 0x74, 0xC8, 0xA3, 0xF0,
-0x12, 0x6C, 0xD6, 0xE5, 0x25, 0x30, 0xE7, 0x02,
-0x31, 0x08, 0x74, 0xB1, 0x04, 0x90, 0x01, 0xC4,
-0xF0, 0x74, 0xC8, 0xA3, 0xF0, 0xD0, 0x07, 0xD0,
-0x06, 0xD0, 0x05, 0xD0, 0x04, 0xD0, 0x03, 0xD0,
-0x02, 0xD0, 0x01, 0xD0, 0x00, 0xD0, 0xD0, 0xD0,
-0x82, 0xD0, 0x83, 0xD0, 0xF0, 0xD0, 0xE0, 0x32,
-0x90, 0x00, 0xAB, 0xE0, 0xFE, 0x90, 0x00, 0xAA,
-0x12, 0x92, 0x3A, 0x54, 0x7F, 0x90, 0x95, 0xC1,
-0xF0, 0xA3, 0xEF, 0xF0, 0xE0, 0x30, 0xE1, 0x02,
-0x31, 0x23, 0x22, 0x90, 0x01, 0x8C, 0xE4, 0xF0,
-0xA3, 0xF0, 0xA3, 0x74, 0x71, 0xF0, 0xA3, 0x74,
-0x02, 0xF0, 0x90, 0x01, 0x95, 0xE0, 0x54, 0xF0,
-0x44, 0x07, 0xF0, 0x90, 0x01, 0x01, 0xE0, 0x44,
-0x04, 0xF0, 0x22, 0x80, 0xDE, 0xC0, 0xE0, 0xC0,
-0xF0, 0xC0, 0x83, 0xC0, 0x82, 0xC0, 0xD0, 0x75,
-0xD0, 0x00, 0xC0, 0x00, 0xC0, 0x01, 0xC0, 0x02,
-0xC0, 0x03, 0xC0, 0x04, 0xC0, 0x05, 0xC0, 0x06,
-0xC0, 0x07, 0x90, 0x01, 0xC4, 0x74, 0x45, 0xF0,
-0x74, 0xC9, 0xA3, 0xF0, 0x12, 0x75, 0x50, 0xE5,
-0x3D, 0x30, 0xE0, 0x02, 0x71, 0x39, 0xE5, 0x3D,
-0x30, 0xE1, 0x03, 0x12, 0xC6, 0xA9, 0xE5, 0x3D,
-0x30, 0xE2, 0x03, 0x12, 0xA6, 0x83, 0xE5, 0x3D,
-0x30, 0xE4, 0x02, 0x31, 0xFD, 0xE5, 0x3E, 0x30,
-0xE0, 0x02, 0x51, 0x9F, 0xE5, 0x3E, 0x30, 0xE3,
-0x02, 0x31, 0x43, 0xE5, 0x3F, 0x30, 0xE2, 0x09,
-0xD1, 0x2F, 0x90, 0x07, 0x8F, 0xE0, 0x44, 0x10,
-0xF0, 0xE5, 0x40, 0x30, 0xE1, 0x0B, 0x90, 0x8A,
-0xE5, 0x12, 0x8D, 0x28, 0x7F, 0x04, 0x12, 0x04,
-0x7E, 0xE5, 0x40, 0x30, 0xE4, 0x03, 0x12, 0xAA,
-0x0B, 0xE5, 0x40, 0x30, 0xE5, 0x03, 0x12, 0xA6,
-0xA8, 0xE5, 0x40, 0x30, 0xE6, 0x02, 0x51, 0xE8,
-0xE5, 0x40, 0x30, 0xE7, 0x02, 0x51, 0x4E, 0x74,
-0x45, 0x04, 0x90, 0x01, 0xC4, 0xF0, 0x74, 0xC9,
-0xA3, 0xF0, 0xD0, 0x07, 0xD0, 0x06, 0xD0, 0x05,
-0xD0, 0x04, 0xD0, 0x03, 0xD0, 0x02, 0xD0, 0x01,
-0xD0, 0x00, 0xD0, 0xD0, 0xD0, 0x82, 0xD0, 0x83,
-0xD0, 0xF0, 0xD0, 0xE0, 0x32, 0x90, 0x88, 0x9D,
-0xE0, 0x30, 0xE0, 0x0D, 0x71, 0x43, 0x30, 0xE0,
-0x08, 0x90, 0x8A, 0xBB, 0x12, 0x8D, 0x28, 0x51,
-0x92, 0x71, 0x3A, 0x90, 0x96, 0xDB, 0xEF, 0xF0,
-0x90, 0x86, 0xB3, 0xE0, 0xB4, 0x02, 0x12, 0x90,
-0x96, 0xDB, 0xE0, 0xFF, 0x64, 0x01, 0x60, 0x25,
-0x90, 0x01, 0x4D, 0xE0, 0x64, 0x80, 0xF0, 0x80,
-0x19, 0x90, 0x01, 0x00, 0x74, 0xFF, 0xF0, 0x7F,
-0x64, 0x7E, 0x00, 0x12, 0x7C, 0x6A, 0x90, 0x06,
-0x90, 0xE0, 0x44, 0x01, 0xF0, 0x90, 0x96, 0xDB,
-0xE0, 0xFF, 0x12, 0xA1, 0x15, 0x22, 0x90, 0x88,
-0xB8, 0xE0, 0x30, 0xE0, 0x05, 0x90, 0x8A, 0xEB,
-0x80, 0x27, 0x90, 0x94, 0xAE, 0x12, 0xA9, 0xBE,
-0x30, 0xE0, 0x1B, 0x90, 0x88, 0xC2, 0xE0, 0xC4,
-0x54, 0x0F, 0x20, 0xE0, 0x08, 0x90, 0x8A, 0xBB,
-0x12, 0x8D, 0x28, 0x51, 0x92, 0x90, 0x94, 0xAE,
-0xE0, 0x54, 0xF7, 0xF0, 0x80, 0x06, 0x90, 0x8A,
-0x99, 0x12, 0x8B, 0x95, 0x90, 0x88, 0xF0, 0xE0,
-0x30, 0xE0, 0x06, 0x90, 0x8A, 0xE7, 0x12, 0x8B,
-0x95, 0x22, 0xE4, 0xFF, 0x12, 0x04, 0x7E, 0x90,
-0x88, 0xC2, 0xE0, 0x54, 0xEF, 0xF0, 0x22, 0xD1,
-0x74, 0x90, 0x95, 0xE8, 0xEF, 0xF0, 0x90, 0x8A,
-0x89, 0x30, 0xE0, 0x13, 0x12, 0x8D, 0x28, 0x7D,
-0x01, 0xE4, 0xFF, 0x12, 0x04, 0x7E, 0x90, 0x88,
-0x33, 0xE0, 0x44, 0x04, 0xF0, 0x80, 0x06, 0x12,
-0x8D, 0x28, 0x12, 0xA7, 0xB0, 0x90, 0x95, 0xE8,
-0xE0, 0x30, 0xE6, 0x11, 0x90, 0x01, 0x2F, 0xE0,
-0x30, 0xE7, 0x04, 0xE4, 0xF0, 0x80, 0x06, 0x90,
-0x01, 0x2F, 0x74, 0x80, 0xF0, 0x71, 0xB6, 0x90,
-0x92, 0x98, 0x74, 0x02, 0xF0, 0x02, 0x6E, 0x2F,
-0x90, 0x88, 0x31, 0xE0, 0xFF, 0x12, 0x9D, 0xD0,
-0x30, 0xE0, 0x1E, 0xEF, 0x54, 0x7F, 0x71, 0x98,
-0x30, 0xE1, 0x06, 0xE0, 0x44, 0x02, 0xF0, 0x80,
-0x07, 0xE0, 0x54, 0xFD, 0x71, 0xAB, 0x04, 0xF0,
-0x90, 0x88, 0x36, 0xE0, 0x60, 0x03, 0x12, 0xA6,
-0x9F, 0x12, 0x9F, 0x83, 0x30, 0xE0, 0x21, 0x90,
-0x88, 0xA4, 0xE0, 0xFF, 0xC3, 0x13, 0x30, 0xE0,
-0x17, 0xEF, 0x54, 0xFD, 0xF0, 0x90, 0x04, 0xE0,
-0xE0, 0x90, 0x88, 0xA4, 0x30, 0xE1, 0x05, 0xE0,
-0x44, 0x04, 0xF0, 0x22, 0xE0, 0x54, 0xFB, 0xF0,
-0x22, 0x22, 0x90, 0x01, 0xC7, 0x74, 0x66, 0xF0,
-0xE4, 0xFF, 0x22, 0x90, 0x88, 0xA1, 0xE0, 0x13,
-0x13, 0x54, 0x3F, 0x22, 0xEF, 0x64, 0x39, 0x70,
-0x46, 0x90, 0x88, 0x9D, 0xE0, 0x30, 0xE0, 0x3F,
-0x71, 0x43, 0x30, 0xE0, 0x3A, 0x90, 0x88, 0xC2,
-0xE0, 0xFF, 0xC4, 0x54, 0x0F, 0x30, 0xE0, 0x2F,
-0x90, 0x94, 0xB4, 0xE0, 0x04, 0xF0, 0x71, 0xA1,
-0x30, 0xE0, 0x1C, 0xEE, 0x13, 0x13, 0x13, 0x54,
-0x1F, 0x30, 0xE0, 0x13, 0x90, 0x01, 0x63, 0xE4,
-0xF0, 0x90, 0x01, 0x3C, 0x74, 0x10, 0xF0, 0xEF,
-0x54, 0xEF, 0x90, 0x88, 0xC2, 0xF0, 0x22, 0x90,
-0x88, 0xB0, 0xE0, 0x70, 0x02, 0x51, 0x97, 0x22,
-0xF0, 0x90, 0x04, 0xE0, 0xE0, 0x90, 0x88, 0x32,
-0x22, 0x90, 0x94, 0xAE, 0xE0, 0xFE, 0x13, 0x13,
-0x54, 0x3F, 0x22, 0xF0, 0x90, 0x01, 0xB9, 0x74,
-0x01, 0xF0, 0x90, 0x01, 0xB8, 0x22, 0x90, 0x88,
-0x48, 0xE0, 0xFF, 0xA3, 0xE0, 0xFD, 0x90, 0x88,
-0x4F, 0xE0, 0xFB, 0x22, 0x90, 0x88, 0x85, 0x12,
-0x04, 0xB8, 0xC0, 0x06, 0xC0, 0x07, 0x90, 0x94,
-0xA0, 0xE0, 0x24, 0x46, 0xFF, 0x90, 0x94, 0x9F,
-0xE0, 0x34, 0x00, 0xAB, 0x07, 0xFA, 0xE4, 0xF9,
-0xF8, 0xD0, 0x07, 0xD0, 0x06, 0x12, 0x86, 0x39,
-0x90, 0x88, 0x85, 0xB1, 0xD6, 0xEF, 0x24, 0x46,
-0xFF, 0xE4, 0x3E, 0xFE, 0xE4, 0x3D, 0xFD, 0xE4,
-0x3C, 0xFC, 0x90, 0x88, 0x89, 0xB1, 0xD6, 0x90,
-0x88, 0x85, 0x12, 0x86, 0x61, 0xC3, 0x12, 0x03,
-0xDA, 0x50, 0x02, 0x81, 0xC1, 0x90, 0x88, 0x89,
-0x12, 0x86, 0x61, 0x90, 0x88, 0x85, 0x12, 0x04,
-0xB8, 0x12, 0x86, 0x39, 0x90, 0x95, 0xC8, 0x12,
-0x04, 0x31, 0x90, 0x88, 0x31, 0xE0, 0x30, 0xE0,
-0x2F, 0x90, 0x88, 0x53, 0xE0, 0x24, 0x04, 0xFF,
-0xE4, 0x33, 0xFE, 0xEF, 0x78, 0x03, 0xC3, 0x33,
-0xCE, 0x33, 0xCE, 0xD8, 0xF9, 0x24, 0x50, 0xFF,
-0xE4, 0x3E, 0xFE, 0x90, 0x88, 0x4E, 0xE0, 0xFD,
-0xC3, 0xEF, 0x9D, 0xFB, 0xEE, 0x94, 0x00, 0xFA,
-0xB1, 0xDF, 0xEB, 0x2F, 0xFF, 0xEA, 0x80, 0x1E,
-0x90, 0x88, 0x33, 0x12, 0x9F, 0xD7, 0x30, 0xE0,
-0x02, 0xA1, 0xBB, 0xB1, 0xDF, 0x90, 0x88, 0x4E,
-0xE0, 0xFD, 0xC3, 0x74, 0x60, 0x9D, 0xCD, 0xE4,
-0x94, 0x00, 0xCD, 0x2F, 0xFF, 0xED, 0x3E, 0x90,
-0x95, 0xC4, 0xF0, 0xA3, 0xEF, 0xF0, 0xC3, 0x90,
-0x95, 0xC5, 0xE0, 0x94, 0xA0, 0x90, 0x95, 0xC4,
-0xE0, 0x94, 0x00, 0x50, 0x34, 0xA3, 0xE0, 0xFB,
-0x24, 0x5F, 0xB1, 0xCE, 0xE0, 0x04, 0xF0, 0x90,
-0x95, 0xC8, 0x12, 0x04, 0xB8, 0xEF, 0x54, 0x7F,
-0xFF, 0x74, 0xFF, 0x2B, 0xB1, 0xC3, 0xE0, 0xFE,
-0xEF, 0xC3, 0x9E, 0x50, 0x09, 0x90, 0x95, 0xC4,
-0xA3, 0xE0, 0xB1, 0xC1, 0xEF, 0xF0, 0x90, 0x88,
-0x4C, 0xE0, 0x04, 0xF0, 0xE0, 0x90, 0x00, 0xFE,
-0xF0, 0x90, 0x88, 0x4C, 0xE0, 0xFF, 0xD3, 0x90,
-0x88, 0x90, 0xE0, 0x9F, 0x90, 0x88, 0x8F, 0xE0,
-0x94, 0x00, 0x40, 0x02, 0xA1, 0xBB, 0xE4, 0xFF,
-0xFE, 0xB1, 0xCB, 0xE0, 0x2F, 0xFF, 0x90, 0x88,
-0x91, 0xE0, 0xFD, 0xEF, 0xD3, 0x9D, 0x40, 0x07,
-0x90, 0x95, 0xC6, 0xEE, 0xF0, 0x80, 0x05, 0x0E,
-0xEE, 0xB4, 0xA0, 0xE5, 0xB1, 0xEA, 0x40, 0x02,
-0x80, 0x15, 0x90, 0x95, 0xC6, 0xE0, 0x04, 0xFE,
-0xEE, 0xC3, 0x94, 0xA0, 0x50, 0x13, 0xB1, 0xCB,
-0xE0, 0x2F, 0xFF, 0xB1, 0xEA, 0x40, 0x07, 0x90,
-0x95, 0xC7, 0xEE, 0xF0, 0x80, 0x03, 0x0E, 0x80,
-0xE7, 0x90, 0x05, 0x5E, 0xE0, 0xFF, 0xB1, 0xBC,
-0xE0, 0xFD, 0xEF, 0xC3, 0x9D, 0x40, 0x11, 0xEF,
-0x9D, 0x90, 0x05, 0x5E, 0xF0, 0x90, 0x88, 0x51,
-0xEE, 0xF0, 0x90, 0x95, 0xC7, 0xE0, 0x80, 0x18,
-0xB1, 0xBC, 0xE0, 0xFD, 0xC3, 0x74, 0x80, 0x9D,
-0x2F, 0x90, 0x05, 0x5E, 0xF0, 0xEE, 0x04, 0x90,
-0x88, 0x51, 0xF0, 0x90, 0x95, 0xC7, 0xE0, 0x04,
-0x90, 0x88, 0x52, 0xF0, 0x90, 0x88, 0x51, 0xE0,
-0xFF, 0xC3, 0x94, 0x50, 0x40, 0x0A, 0xEF, 0x24,
-0xB0, 0x90, 0x88, 0x49, 0xF0, 0xE4, 0x80, 0x0E,
-0xE4, 0x90, 0x88, 0x49, 0xF0, 0x90, 0x88, 0x51,
-0xE0, 0xFF, 0xC3, 0x74, 0x50, 0x9F, 0x90, 0x88,
-0x48, 0xF0, 0x90, 0x88, 0x51, 0xE0, 0xFF, 0xA3,
-0xE0, 0xC3, 0x9F, 0x90, 0x88, 0x4F, 0xF0, 0x90,
-0x88, 0x31, 0xE0, 0x90, 0x88, 0x8E, 0xE0, 0x24,
-0x08, 0xFF, 0x90, 0x88, 0x4F, 0xE0, 0x2F, 0xF0,
-0x90, 0x88, 0x4F, 0xE0, 0xC3, 0x94, 0x50, 0x50,
-0x03, 0x74, 0x50, 0xF0, 0x90, 0x88, 0x4F, 0xE0,
-0x24, 0x10, 0xF0, 0x71, 0xB6, 0x12, 0xC7, 0x05,
-0x90, 0x8A, 0xA3, 0x12, 0x8D, 0x28, 0xE4, 0xFF,
-0x12, 0x04, 0x7E, 0x22, 0x90, 0x95, 0xC6, 0xE0,
-0xFE, 0x24, 0xFF, 0xF5, 0x82, 0xE4, 0x34, 0x93,
-0xF5, 0x83, 0x22, 0x74, 0x5F, 0x2E, 0xF5, 0x82,
-0xE4, 0x34, 0x93, 0xF5, 0x83, 0x22, 0x12, 0x04,
-0x31, 0x90, 0x88, 0x89, 0x02, 0x04, 0xB8, 0x90,
-0x95, 0xC8, 0x12, 0x04, 0xB8, 0x78, 0x07, 0x02,
-0x03, 0xEB, 0x90, 0x88, 0x91, 0xE0, 0xFD, 0xC3,
-0x90, 0x88, 0x90, 0xE0, 0x9D, 0xFD, 0x90, 0x88,
-0x8F, 0xE0, 0x94, 0x00, 0xFC, 0xEF, 0xD3, 0x9D,
-0xE4, 0x9C, 0x22, 0xE4, 0xFE, 0xB1, 0xCB, 0xE4,
-0xF0, 0x74, 0xFF, 0x2E, 0xB1, 0xC3, 0x74, 0xFF,
-0xF0, 0x0E, 0xEE, 0xB4, 0xA0, 0xEF, 0xE4, 0x90,
-0x88, 0x4D, 0xF0, 0x90, 0x88, 0x4C, 0xF0, 0x90,
-0x88, 0x50, 0xF0, 0xEF, 0xB4, 0x01, 0x07, 0xA3,
-0x74, 0xA0, 0xF0, 0xE4, 0xA3, 0xF0, 0x22, 0xD3,
-0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0x90, 0x88,
-0xF0, 0xE0, 0x30, 0xE0, 0x32, 0x90, 0x88, 0xF7,
-0xE0, 0xB4, 0x01, 0x1B, 0xA3, 0xE0, 0xB4, 0x01,
-0x26, 0x74, 0x02, 0xF0, 0x90, 0x88, 0xFE, 0xE0,
-0xFE, 0xA3, 0xE0, 0xFF, 0x90, 0x8A, 0x7F, 0x12,
-0xB4, 0xFF, 0x12, 0x04, 0x7E, 0x80, 0x10, 0x90,
-0x88, 0xF7, 0xE0, 0xB4, 0x02, 0x09, 0x74, 0x03,
-0xF0, 0x90, 0x8A, 0xE7, 0x12, 0x8B, 0x95, 0xD0,
-0xD0, 0x92, 0xAF, 0x22, 0xE4, 0x90, 0x95, 0xEA,
-0xF0, 0xA3, 0xF0, 0x7F, 0x83, 0x12, 0x7B, 0x41,
-0x90, 0x95, 0xE9, 0xEF, 0xF0, 0x7F, 0x83, 0x12,
-0x7B, 0x41, 0xAE, 0x07, 0x90, 0x95, 0xE9, 0xE0,
-0xFF, 0xB5, 0x06, 0x01, 0x22, 0xC3, 0x90, 0x95,
-0xEB, 0xE0, 0x94, 0x64, 0x90, 0x95, 0xEA, 0xE0,
-0x94, 0x00, 0x40, 0x0D, 0x90, 0x01, 0xC0, 0xE0,
-0x44, 0x40, 0xF0, 0x90, 0x95, 0xE9, 0xE0, 0xFF,
-0x22, 0x90, 0x95, 0xEA, 0x12, 0xBC, 0xDE, 0x80,
-0xC2, 0xC0, 0xE0, 0xC0, 0xF0, 0xC0, 0x83, 0xC0,
+0xC4, 0x74, 0xE1, 0xF0, 0x74, 0xC8, 0xA3, 0xF0,
+0x12, 0x6C, 0xD6, 0xE5, 0x25, 0x30, 0xE7, 0x03,
+0x12, 0xBE, 0x9D, 0x74, 0xE1, 0x04, 0x90, 0x01,
+0xC4, 0xF0, 0x74, 0xC8, 0xA3, 0xF0, 0xD0, 0x07,
+0xD0, 0x06, 0xD0, 0x05, 0xD0, 0x04, 0xD0, 0x03,
+0xD0, 0x02, 0xD0, 0x01, 0xD0, 0x00, 0xD0, 0xD0,
+0xD0, 0x82, 0xD0, 0x83, 0xD0, 0xF0, 0xD0, 0xE0,
+0x32, 0xC0, 0xE0, 0xC0, 0xF0, 0xC0, 0x83, 0xC0,
 0x82, 0xC0, 0xD0, 0x75, 0xD0, 0x00, 0xC0, 0x00,
 0xC0, 0x01, 0xC0, 0x02, 0xC0, 0x03, 0xC0, 0x04,
 0xC0, 0x05, 0xC0, 0x06, 0xC0, 0x07, 0x90, 0x01,
-0xC4, 0x74, 0xB9, 0xF0, 0x74, 0xCE, 0xA3, 0xF0,
-0x90, 0x8A, 0x9D, 0x12, 0x8B, 0x95, 0x53, 0x91,
-0xBF, 0x74, 0xB9, 0x04, 0x90, 0x01, 0xC4, 0xF0,
-0x74, 0xCE, 0xA3, 0xF0, 0xD0, 0x07, 0xD0, 0x06,
+0xC4, 0x74, 0x39, 0xF0, 0x74, 0xC9, 0xA3, 0xF0,
+0x90, 0x8A, 0x9D, 0x12, 0x8E, 0xAD, 0x53, 0x91,
+0xBF, 0x74, 0x39, 0x04, 0x90, 0x01, 0xC4, 0xF0,
+0x74, 0xC9, 0xA3, 0xF0, 0xD0, 0x07, 0xD0, 0x06,
 0xD0, 0x05, 0xD0, 0x04, 0xD0, 0x03, 0xD0, 0x02,
 0xD0, 0x01, 0xD0, 0x00, 0xD0, 0xD0, 0xD0, 0x82,
 0xD0, 0x83, 0xD0, 0xF0, 0xD0, 0xE0, 0x32, 0xC0,
 0xE0, 0xC0, 0x83, 0xC0, 0x82, 0xC0, 0xD0, 0x75,
-0xD0, 0x00, 0xC0, 0x05, 0xC0, 0x07, 0x7D, 0x0F,
-0x90, 0x01, 0xC4, 0xED, 0xF0, 0x74, 0xCF, 0xFF,
+0xD0, 0x00, 0xC0, 0x05, 0xC0, 0x07, 0x7D, 0x8F,
+0x90, 0x01, 0xC4, 0xED, 0xF0, 0x74, 0xC9, 0xFF,
 0xA3, 0xF0, 0xED, 0x04, 0x90, 0x01, 0xC4, 0xF0,
 0xA3, 0xEF, 0xF0, 0xD0, 0x07, 0xD0, 0x05, 0xD0,
 0xD0, 0xD0, 0x82, 0xD0, 0x83, 0xD0, 0xE0, 0x32,
-0x12, 0x02, 0x06, 0x90, 0x96, 0x0C, 0xF0, 0x22,
-0x7D, 0x07, 0xAF, 0x62, 0xED, 0x30, 0xE0, 0x1F,
-0x75, 0xF0, 0x12, 0xEF, 0x90, 0x89, 0x57, 0xF1,
-0x95, 0x90, 0x89, 0x59, 0xF1, 0x95, 0x90, 0x89,
-0x5B, 0xF1, 0x95, 0x90, 0x89, 0x5D, 0xF1, 0x95,
-0x90, 0x89, 0x5F, 0x12, 0xAE, 0xDF, 0xF0, 0xED,
-0x30, 0xE1, 0x0B, 0x75, 0xF0, 0x12, 0xEF, 0x90,
-0x89, 0x53, 0x12, 0xAE, 0xDF, 0xF0, 0xED, 0x30,
-0xE2, 0x04, 0xF1, 0xA1, 0xE4, 0xF0, 0x12, 0xAF,
-0x94, 0xE0, 0x54, 0xBF, 0x44, 0x80, 0xFE, 0x12,
-0xAF, 0x94, 0xEE, 0xF0, 0x22, 0x12, 0x04, 0x6E,
-0xE4, 0xF0, 0xA3, 0xF0, 0x75, 0xF0, 0x12, 0xEF,
-0x22, 0x75, 0xF0, 0x12, 0xEF, 0x90, 0x89, 0x55,
-0x02, 0x04, 0x6E, 0x12, 0x02, 0x06, 0xFE, 0x12,
-0x87, 0x27, 0xFF, 0x74, 0xD6, 0x2E, 0xF5, 0x82,
-0xE4, 0x34, 0x8D, 0x12, 0x87, 0xED, 0xFF, 0x74,
-0xC6, 0x2E, 0xF5, 0x82, 0xE4, 0x34, 0x8D, 0x12,
-0x87, 0xF7, 0xFF, 0x74, 0x0D, 0x2E, 0x12, 0xD7,
-0xA2, 0xEF, 0xF0, 0x74, 0xC6, 0x2E, 0x12, 0xB4,
-0xDE, 0xE0, 0x30, 0xE5, 0x18, 0x75, 0xF0, 0x12,
-0xEE, 0x12, 0x9F, 0xCD, 0x13, 0x13, 0x54, 0x03,
-0xFB, 0xAF, 0x06, 0x74, 0xD6, 0x2E, 0x12, 0xD7,
-0x06, 0xFD, 0x12, 0x6B, 0xFD, 0x22, 0xEF, 0x64,
-0x13, 0x60, 0x04, 0xEF, 0xB4, 0x0B, 0x05, 0x90,
-0x88, 0xE3, 0x80, 0x1F, 0xEF, 0x64, 0x12, 0x60,
-0x04, 0xEF, 0xB4, 0x0A, 0x05, 0x90, 0x88, 0xE4,
-0x80, 0x11, 0xEF, 0x64, 0x11, 0x60, 0x04, 0xEF,
-0xB4, 0x09, 0x05, 0x90, 0x88, 0xE5, 0x80, 0x03,
-0x90, 0x88, 0xE2, 0xE0, 0xF5, 0x0F, 0xAF, 0x0F,
-0x22, 0x90, 0x04, 0x85, 0xE0, 0xF5, 0x6B, 0x90,
-0x96, 0x1D, 0xE0, 0x04, 0xF0, 0xE4, 0xF5, 0x62,
-0x90, 0x88, 0x2B, 0xE0, 0xFF, 0xE5, 0x62, 0xC3,
-0x9F, 0x40, 0x02, 0xC1, 0x80, 0xE5, 0x62, 0x12,
-0xA3, 0x7C, 0xE0, 0xF5, 0x6D, 0xF1, 0x96, 0xE0,
-0x65, 0x6D, 0x60, 0x15, 0x90, 0x92, 0x5E, 0xE5,
-0x6D, 0xF0, 0xE4, 0xA3, 0xF0, 0xAB, 0x62, 0xFD,
-0xFF, 0x12, 0x6F, 0x75, 0xF1, 0x96, 0xE5, 0x6D,
-0xF0, 0x90, 0x04, 0xA0, 0xE0, 0x64, 0x01, 0x70,
-0x50, 0xA3, 0xE0, 0x65, 0x62, 0x70, 0x4A, 0xA3,
-0xE0, 0xF5, 0x63, 0xA3, 0xE0, 0x90, 0x95, 0x44,
-0xF0, 0xE5, 0x62, 0x12, 0xA3, 0x7C, 0xE0, 0x65,
-0x63, 0x70, 0x02, 0xC1, 0x7C, 0xE5, 0x62, 0x12,
-0xA3, 0x7C, 0xE5, 0x63, 0xF0, 0xE5, 0x62, 0x12,
-0xA4, 0x07, 0xE0, 0x54, 0xFC, 0xFF, 0x90, 0x95,
-0x44, 0xE0, 0x54, 0x03, 0x4F, 0xFF, 0xE5, 0x62,
-0x12, 0xA4, 0x07, 0xEF, 0xF0, 0x90, 0x92, 0x5E,
-0xE5, 0x63, 0xF0, 0xA3, 0x74, 0xFF, 0xF0, 0xAB,
-0x62, 0xE4, 0xFD, 0xFF, 0x12, 0x6F, 0x75, 0xC1,
-0x7C, 0x75, 0xF0, 0x12, 0xE5, 0x62, 0x12, 0xCF,
-0xA5, 0xE0, 0xFF, 0x90, 0x95, 0x3C, 0xE4, 0xF0,
-0xA3, 0xEF, 0xF0, 0x75, 0xF0, 0x12, 0xE5, 0x62,
-0x90, 0x89, 0x53, 0x12, 0x04, 0x6E, 0xE0, 0xF5,
-0x68, 0xA3, 0xE0, 0xF5, 0x69, 0xE5, 0x62, 0x75,
-0xF0, 0x12, 0xA4, 0x24, 0x57, 0xF9, 0x74, 0x89,
-0x35, 0xF0, 0xFA, 0x7B, 0x01, 0x90, 0x95, 0x39,
-0x12, 0x86, 0x76, 0xD1, 0xDF, 0xFF, 0x12, 0x03,
-0x13, 0x2F, 0xFF, 0xD1, 0xE5, 0x2F, 0xFF, 0xD1,
-0xCD, 0x2F, 0xFF, 0xD1, 0xC4, 0x2F, 0xF5, 0x6C,
-0xE5, 0x62, 0x12, 0xA3, 0x7C, 0xE0, 0xF5, 0x63,
-0x54, 0x80, 0xF5, 0x65, 0xE5, 0x63, 0x54, 0x7F,
-0xF5, 0x64, 0x75, 0xF0, 0x12, 0xE5, 0x62, 0x12,
-0xAD, 0x22, 0xE0, 0x64, 0x01, 0x60, 0x02, 0x41,
-0x71, 0xD1, 0x81, 0xD1, 0xDF, 0xFF, 0xAE, 0xF0,
+0x90, 0x88, 0x36, 0xE0, 0x60, 0x15, 0x90, 0x88,
+0x9D, 0xE0, 0x30, 0xE0, 0x0B, 0x90, 0x94, 0xAF,
+0xE0, 0xFF, 0x12, 0x8D, 0x35, 0x20, 0xE0, 0x03,
+0x12, 0xAD, 0x40, 0x02, 0x8E, 0xB7, 0x51, 0x35,
+0x90, 0x95, 0xF0, 0xEF, 0xF0, 0x20, 0xE0, 0x06,
+0x90, 0x01, 0x3D, 0x74, 0x01, 0xF0, 0x90, 0x95,
+0xF0, 0xE0, 0x90, 0x8A, 0x89, 0x30, 0xE0, 0x13,
+0x12, 0x8A, 0x5F, 0x7D, 0x01, 0xE4, 0xFF, 0x12,
+0x04, 0x7E, 0x90, 0x88, 0x33, 0xE0, 0x44, 0x04,
+0xF0, 0x80, 0x06, 0x12, 0x8A, 0x5F, 0x12, 0x97,
+0xF1, 0x90, 0x95, 0xF0, 0xE0, 0x30, 0xE6, 0x11,
+0x90, 0x01, 0x2F, 0xE0, 0x30, 0xE7, 0x04, 0xE4,
+0xF0, 0x80, 0x06, 0x90, 0x01, 0x2F, 0x74, 0x80,
+0xF0, 0x12, 0xAF, 0xA9, 0x90, 0x92, 0x98, 0x74,
+0x02, 0xF0, 0x02, 0x6E, 0x2F, 0xE4, 0x90, 0x95,
+0xF2, 0xF0, 0xA3, 0xF0, 0x7F, 0x83, 0x12, 0x7B,
+0x41, 0x90, 0x95, 0xF1, 0xEF, 0xF0, 0x7F, 0x83,
+0x12, 0x7B, 0x41, 0xAE, 0x07, 0x90, 0x95, 0xF1,
+0xE0, 0xFF, 0xB5, 0x06, 0x01, 0x22, 0xC3, 0x90,
+0x95, 0xF3, 0xE0, 0x94, 0x64, 0x90, 0x95, 0xF2,
+0xE0, 0x94, 0x00, 0x40, 0x0D, 0x90, 0x01, 0xC0,
+0xE0, 0x44, 0x40, 0xF0, 0x90, 0x95, 0xF1, 0xE0,
+0xFF, 0x22, 0x90, 0x95, 0xF2, 0x12, 0xA7, 0xDC,
+0x80, 0xC2, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0,
+0xD0, 0x90, 0x88, 0xF0, 0xE0, 0x30, 0xE0, 0x32,
+0x90, 0x88, 0xF7, 0xE0, 0xB4, 0x01, 0x1B, 0xA3,
+0xE0, 0xB4, 0x01, 0x26, 0x74, 0x02, 0xF0, 0x90,
+0x88, 0xFE, 0xE0, 0xFE, 0xA3, 0xE0, 0xFF, 0x90,
+0x8A, 0x7F, 0x12, 0xA5, 0xDE, 0x12, 0x04, 0x7E,
+0x80, 0x10, 0x90, 0x88, 0xF7, 0xE0, 0xB4, 0x02,
+0x09, 0x74, 0x03, 0xF0, 0x90, 0x8A, 0xE7, 0x12,
+0x8E, 0xAD, 0xD0, 0xD0, 0x92, 0xAF, 0x22, 0x90,
+0x94, 0xA2, 0xE0, 0xB4, 0x01, 0x15, 0xE4, 0xF0,
+0x90, 0x01, 0x5B, 0xF0, 0x90, 0x92, 0x20, 0xF0,
+0x90, 0x88, 0x95, 0xE0, 0xC3, 0x13, 0x54, 0x7F,
+0x12, 0x97, 0xE3, 0x90, 0x88, 0x31, 0xE0, 0xFF,
+0xC4, 0x13, 0x13, 0x54, 0x03, 0x30, 0xE0, 0x33,
+0xEF, 0x54, 0xBF, 0x71, 0x1C, 0x30, 0xE0, 0x06,
+0xE0, 0x44, 0x01, 0xF0, 0x80, 0x09, 0xE0, 0x54,
+0xFE, 0x12, 0xB7, 0xD5, 0x74, 0x04, 0xF0, 0x90,
+0x88, 0xA3, 0xE0, 0xFF, 0xC4, 0x13, 0x54, 0x07,
+0x30, 0xE0, 0x0D, 0x90, 0x8A, 0xB9, 0x12, 0x8A,
+0x5F, 0x7D, 0x01, 0x7F, 0x0C, 0x02, 0x04, 0x7E,
+0x12, 0xAE, 0x85, 0x22, 0xF0, 0x90, 0x04, 0xE0,
+0xE0, 0x90, 0x88, 0x32, 0x22, 0x90, 0x88, 0x31,
+0xE0, 0xFF, 0x12, 0x8D, 0x35, 0x30, 0xE0, 0x1F,
+0xEF, 0x54, 0x7F, 0x71, 0x1C, 0x30, 0xE1, 0x06,
+0xE0, 0x44, 0x02, 0xF0, 0x80, 0x08, 0xE0, 0x54,
+0xFD, 0x12, 0xB7, 0xD5, 0x04, 0xF0, 0x90, 0x88,
+0x36, 0xE0, 0x60, 0x03, 0x12, 0xAE, 0x85, 0x12,
+0x8F, 0xEC, 0x30, 0xE0, 0x21, 0x90, 0x88, 0xA4,
+0xE0, 0xFF, 0xC3, 0x13, 0x30, 0xE0, 0x17, 0xEF,
+0x54, 0xFD, 0xF0, 0x90, 0x04, 0xE0, 0xE0, 0x90,
+0x88, 0xA4, 0x30, 0xE1, 0x05, 0xE0, 0x44, 0x04,
+0xF0, 0x22, 0xE0, 0x54, 0xFB, 0xF0, 0x22, 0x90,
+0x97, 0x07, 0xED, 0xF0, 0x64, 0x01, 0x60, 0x27,
+0xE0, 0xFE, 0x64, 0x02, 0x60, 0x21, 0xEE, 0x64,
+0x29, 0x60, 0x1C, 0xEE, 0x64, 0x2A, 0x60, 0x17,
+0xEE, 0x64, 0x36, 0x60, 0x12, 0xEE, 0xB4, 0x37,
+0x02, 0x80, 0x0C, 0xAD, 0x07, 0x7F, 0xFF, 0x12,
+0xA7, 0x4E, 0x90, 0x93, 0x5F, 0xE0, 0xFF, 0x90,
+0x93, 0x5E, 0xE0, 0x4F, 0x90, 0x05, 0x22, 0xF0,
+0x90, 0x97, 0x07, 0xE0, 0x90, 0x93, 0x01, 0xF0,
+0x22, 0xE6, 0xFD, 0xAF, 0x62, 0xEF, 0x12, 0x96,
+0xF3, 0xE0, 0x54, 0xF8, 0xF5, 0x70, 0xED, 0x42,
+0x70, 0xEF, 0x12, 0x96, 0xF3, 0xE5, 0x70, 0xF0,
+0x22, 0x7B, 0x00, 0x7A, 0x00, 0x79, 0x00, 0x90,
+0x89, 0x2E, 0x12, 0x86, 0x76, 0x7B, 0xFF, 0x7A,
+0x80, 0x79, 0x80, 0x90, 0x89, 0x31, 0x12, 0x86,
+0x76, 0x7A, 0x80, 0x79, 0xBF, 0x90, 0x89, 0x34,
+0x12, 0x86, 0x76, 0x7A, 0x81, 0x79, 0x61, 0x90,
+0x89, 0x3A, 0x12, 0x86, 0x76, 0x7A, 0x81, 0x79,
+0x75, 0x90, 0x89, 0x3D, 0x12, 0x86, 0x76, 0x7A,
+0x81, 0x79, 0x9D, 0x90, 0x89, 0x40, 0x12, 0x86,
+0x76, 0x91, 0x49, 0x7A, 0x81, 0x79, 0xD9, 0x90,
+0x89, 0x49, 0x12, 0x86, 0x76, 0x7A, 0x82, 0x79,
+0x01, 0x90, 0x89, 0x4C, 0x12, 0x86, 0x76, 0xE4,
+0x90, 0x96, 0x25, 0xF0, 0x90, 0x96, 0x14, 0xF0,
+0x90, 0x94, 0xBD, 0xF0, 0x12, 0xB7, 0xCC, 0x50,
+0x0F, 0x74, 0x36, 0x2F, 0x91, 0x57, 0xE4, 0xF0,
+0x90, 0x94, 0xBD, 0xE0, 0x04, 0xF0, 0x80, 0xEC,
+0x22, 0x7A, 0x81, 0x79, 0xB1, 0x90, 0x89, 0x46,
+0x02, 0x86, 0x76, 0x74, 0x36, 0x25, 0x62, 0xF5,
+0x82, 0xE4, 0x34, 0x96, 0xF5, 0x83, 0x22, 0xE4,
+0xF5, 0x75, 0xEF, 0x14, 0xF5, 0x74, 0xED, 0xFF,
+0xE5, 0x74, 0xF5, 0x82, 0x33, 0x95, 0xE0, 0xF5,
+0x83, 0xC3, 0xE5, 0x82, 0x9F, 0x74, 0x80, 0xF8,
+0x65, 0x83, 0x98, 0x40, 0x51, 0xE5, 0x74, 0x78,
+0x03, 0xA2, 0xE7, 0x13, 0xD8, 0xFB, 0xFF, 0x33,
+0x95, 0xE0, 0xFE, 0xEB, 0x91, 0xD1, 0xE5, 0x82,
+0x2F, 0xF5, 0x82, 0xE5, 0x83, 0x3E, 0xF5, 0x83,
+0xE0, 0xF5, 0x82, 0x75, 0x83, 0x00, 0xE5, 0x74,
+0x12, 0xB7, 0x93, 0x80, 0x05, 0xC3, 0x33, 0xCE,
+0x33, 0xCE, 0xD8, 0xF9, 0xFF, 0xEE, 0x55, 0x83,
+0xFE, 0xEF, 0x55, 0x82, 0x4E, 0x60, 0x13, 0x85,
+0x74, 0x76, 0x05, 0x75, 0x90, 0x95, 0x53, 0xE0,
+0x65, 0x75, 0x60, 0x0A, 0xE5, 0x76, 0xD3, 0x9D,
+0x40, 0x04, 0x15, 0x74, 0x80, 0x98, 0xAF, 0x76,
+0x22, 0x75, 0xF0, 0x08, 0xA4, 0x24, 0x00, 0xF5,
+0x82, 0xE4, 0x34, 0x82, 0xF5, 0x83, 0x22, 0xAA,
+0x07, 0xA9, 0x05, 0xEA, 0x12, 0x94, 0xDD, 0xE0,
+0xF5, 0x70, 0x54, 0x7F, 0xF5, 0x72, 0x75, 0xF0,
+0x12, 0xEA, 0xD1, 0xA2, 0xE0, 0x90, 0x95, 0x4F,
+0xF0, 0x75, 0xF0, 0x12, 0xEA, 0xD1, 0x70, 0xFF,
+0xEA, 0x12, 0x93, 0xF4, 0xE0, 0x54, 0x03, 0xF5,
+0x71, 0xE5, 0x72, 0x90, 0x81, 0x9D, 0x93, 0xFD,
+0xEA, 0xD1, 0xA8, 0xF5, 0x83, 0xE4, 0xF0, 0xA3,
+0xED, 0xF0, 0x75, 0xF0, 0x12, 0xEA, 0x12, 0x87,
+0xBA, 0xFE, 0xC4, 0x54, 0x03, 0x90, 0x95, 0x4E,
+0xF0, 0x74, 0xC6, 0x2A, 0xB1, 0x93, 0xE5, 0x72,
+0xF0, 0x74, 0x46, 0x2A, 0xD1, 0x64, 0xE5, 0x71,
+0xF0, 0xE5, 0x72, 0xD3, 0x9F, 0x40, 0x04, 0x8F,
+0x72, 0x8F, 0x70, 0x89, 0x73, 0xE4, 0xFF, 0xEF,
+0xC3, 0x95, 0x73, 0x50, 0x33, 0xE5, 0x70, 0x30,
+0xE7, 0x09, 0x85, 0x72, 0x70, 0x19, 0xE9, 0x70,
+0x24, 0x80, 0x25, 0x90, 0x95, 0x4F, 0xE0, 0xFD,
+0xE5, 0x72, 0xD3, 0x9D, 0x40, 0x0F, 0xAB, 0x02,
+0x90, 0x95, 0x53, 0xE9, 0xF0, 0xAF, 0x72, 0x91,
+0x5F, 0x8F, 0x70, 0x80, 0x0B, 0x90, 0x95, 0x4F,
+0xE0, 0xF5, 0x70, 0x80, 0x03, 0x0F, 0x80, 0xC7,
+0xAF, 0x02, 0x90, 0x92, 0x80, 0xE5, 0x71, 0xF0,
+0xE4, 0xFB, 0xAD, 0x70, 0x02, 0x75, 0x80, 0x74,
+0xC6, 0x25, 0x70, 0xF5, 0x82, 0xE4, 0x34, 0x8E,
+0xF5, 0x83, 0x22, 0x8F, 0x70, 0x8D, 0x71, 0xEF,
+0x12, 0x94, 0xDD, 0xE0, 0xFD, 0x54, 0x7F, 0xF5,
+0x72, 0xED, 0x54, 0x80, 0xF5, 0x73, 0xD1, 0x6C,
+0xF5, 0x75, 0x75, 0xF0, 0x12, 0xEF, 0x12, 0x87,
+0xBA, 0xC4, 0x54, 0x03, 0xF5, 0x76, 0xD1, 0x58,
+0x74, 0xFF, 0xF0, 0xD1, 0x78, 0xE5, 0x73, 0x4D,
+0xFF, 0xB1, 0x8F, 0xEF, 0xF0, 0xE5, 0x70, 0x12,
+0x93, 0xF4, 0xE0, 0x54, 0x03, 0xF5, 0x74, 0x74,
+0x46, 0x25, 0x70, 0xD1, 0x64, 0xE5, 0x74, 0xF0,
+0xE5, 0x72, 0x65, 0x75, 0x70, 0x23, 0x75, 0xF0,
+0x12, 0xE5, 0x70, 0x12, 0xB6, 0x6C, 0xC4, 0x13,
+0x54, 0x07, 0x30, 0xE0, 0x0B, 0xE5, 0x73, 0x70,
+0x07, 0xE5, 0x72, 0x44, 0x80, 0xFD, 0x80, 0x4B,
+0xD1, 0x78, 0x7D, 0x07, 0xAF, 0x70, 0x02, 0xBB,
+0x07, 0xE5, 0x72, 0xC3, 0x95, 0x75, 0x50, 0x35,
+0xAB, 0x70, 0xAD, 0x75, 0xAF, 0x72, 0x12, 0x72,
+0x7F, 0xAD, 0x07, 0xE5, 0x72, 0xC3, 0x94, 0x0C,
+0x40, 0x29, 0x75, 0xF0, 0x12, 0xE5, 0x70, 0x12,
+0xB6, 0x6C, 0xFE, 0xC4, 0x13, 0x54, 0x07, 0x30,
+0xE0, 0x19, 0xE5, 0x71, 0x60, 0x15, 0xE5, 0x73,
+0x70, 0x11, 0xE5, 0x72, 0x44, 0x80, 0xFD, 0xD1,
+0x58, 0xEF, 0xF0, 0x80, 0x06, 0xB1, 0x8F, 0xE5,
+0x75, 0xF0, 0xFD, 0x90, 0x92, 0x80, 0xE5, 0x74,
+0xF0, 0xAB, 0x71, 0xAF, 0x70, 0x02, 0x75, 0x80,
+0x74, 0x26, 0x25, 0x70, 0xF5, 0x82, 0xE4, 0x34,
+0x96, 0xF5, 0x83, 0x22, 0xF5, 0x82, 0xE4, 0x34,
+0x8E, 0xF5, 0x83, 0x22, 0x75, 0xF0, 0x12, 0xEF,
+0x90, 0x89, 0x4F, 0x12, 0x04, 0x6E, 0xE0, 0x22,
+0xE5, 0x72, 0x25, 0xE0, 0x24, 0x75, 0xF5, 0x82,
+0xE4, 0x34, 0x81, 0xF5, 0x83, 0xE4, 0x93, 0xFE,
+0x74, 0x01, 0x93, 0xFF, 0xE5, 0x70, 0x25, 0xE0,
+0x24, 0x75, 0xF5, 0x82, 0xE4, 0x34, 0x8D, 0xF5,
+0x83, 0xEE, 0xF0, 0xA3, 0xEF, 0xF0, 0x22, 0x75,
+0xF0, 0x12, 0x90, 0x89, 0x50, 0x02, 0x04, 0x6E,
+0x25, 0xE0, 0x24, 0x75, 0xF5, 0x82, 0xE4, 0x34,
+0x8D, 0x22, 0xEF, 0x64, 0x13, 0x60, 0x04, 0xEF,
+0xB4, 0x0B, 0x05, 0x90, 0x88, 0xE3, 0x80, 0x1F,
+0xEF, 0x64, 0x12, 0x60, 0x04, 0xEF, 0xB4, 0x0A,
+0x05, 0x90, 0x88, 0xE4, 0x80, 0x11, 0xEF, 0x64,
+0x11, 0x60, 0x04, 0xEF, 0xB4, 0x09, 0x05, 0x90,
+0x88, 0xE5, 0x80, 0x03, 0x90, 0x88, 0xE2, 0xE0,
+0xF5, 0x0F, 0xAF, 0x0F, 0x22, 0x90, 0x04, 0x85,
+0xE0, 0xF5, 0x6B, 0x90, 0x96, 0x25, 0xE0, 0x04,
+0xF0, 0xE4, 0xF5, 0x62, 0x90, 0x88, 0x2B, 0xE0,
+0xFF, 0xE5, 0x62, 0xC3, 0x9F, 0x40, 0x03, 0x02,
+0xD5, 0x50, 0xE5, 0x62, 0x12, 0x94, 0xDD, 0xE0,
+0xF5, 0x6D, 0x12, 0xE0, 0x8D, 0xE0, 0x65, 0x6D,
+0x60, 0x15, 0x90, 0x96, 0x3E, 0x74, 0x06, 0xF0,
+0xE4, 0xFB, 0xAD, 0x6D, 0xAF, 0x62, 0x12, 0x94,
+0x7E, 0x12, 0xE0, 0x8D, 0xE5, 0x6D, 0xF0, 0x90,
+0x04, 0xA0, 0xE0, 0x64, 0x01, 0x70, 0x4B, 0xA3,
+0xE0, 0x65, 0x62, 0x70, 0x45, 0xA3, 0xE0, 0xF5,
+0x63, 0xA3, 0xE0, 0x90, 0x95, 0x4B, 0xF0, 0xE5,
+0x62, 0x12, 0x94, 0xDD, 0xE0, 0x65, 0x63, 0x70,
+0x03, 0x02, 0xD5, 0x4B, 0xE5, 0x62, 0x12, 0x94,
+0xDD, 0xE5, 0x63, 0xF0, 0x12, 0x93, 0xF2, 0xE0,
+0x54, 0xFC, 0xFF, 0x90, 0x95, 0x4B, 0xE0, 0x54,
+0x03, 0x4F, 0xFF, 0x12, 0x93, 0xF2, 0xEF, 0xF0,
+0x90, 0x96, 0x3E, 0x74, 0x07, 0xF0, 0xE4, 0xFB,
+0xAD, 0x63, 0xAF, 0x62, 0x12, 0x94, 0x7E, 0x02,
+0xD5, 0x4B, 0x75, 0xF0, 0x12, 0xE5, 0x62, 0x12,
+0xBB, 0x72, 0xE0, 0xFF, 0x90, 0x95, 0x43, 0xE4,
+0xF0, 0xA3, 0xEF, 0xF0, 0x75, 0xF0, 0x12, 0xE5,
+0x62, 0x90, 0x89, 0x53, 0x12, 0x04, 0x6E, 0xE0,
+0xF5, 0x68, 0xA3, 0xE0, 0xF5, 0x69, 0xE5, 0x62,
+0x75, 0xF0, 0x12, 0xA4, 0x24, 0x57, 0xF9, 0x74,
+0x89, 0x35, 0xF0, 0xFA, 0x7B, 0x01, 0x90, 0x95,
+0x40, 0x12, 0x86, 0x76, 0x12, 0xD7, 0x71, 0xFF,
+0x12, 0x03, 0x13, 0x2F, 0xFF, 0x12, 0xD7, 0x05,
+0x2F, 0xFF, 0x12, 0xD5, 0xEC, 0x2F, 0xFF, 0x12,
+0xD5, 0xE3, 0x2F, 0xF5, 0x6C, 0xE5, 0x62, 0x12,
+0x94, 0xDD, 0xE0, 0xF5, 0x63, 0x54, 0x80, 0xF5,
+0x65, 0xE5, 0x63, 0x54, 0x7F, 0xF5, 0x64, 0x75,
+0xF0, 0x12, 0xE5, 0x62, 0x12, 0xBA, 0xD7, 0xE0,
+0x64, 0x01, 0x60, 0x03, 0x02, 0xD1, 0x35, 0x12,
+0xBF, 0xE9, 0x12, 0xD7, 0x71, 0xFF, 0xAE, 0xF0,
 0x12, 0x03, 0x13, 0x2F, 0xFF, 0xE5, 0xF0, 0x3E,
-0xFE, 0xD1, 0xE5, 0x2F, 0xFF, 0xEE, 0xD1, 0xCA,
-0x2F, 0xFF, 0xEE, 0x35, 0xF0, 0xFE, 0xD1, 0xC4,
-0x2F, 0xFF, 0xEE, 0x35, 0xF0, 0x90, 0x95, 0x3E,
+0xFE, 0xF1, 0x05, 0x2F, 0xFF, 0xEE, 0xB1, 0xE9,
+0x2F, 0xFF, 0xEE, 0x35, 0xF0, 0xFE, 0xB1, 0xE3,
+0x2F, 0xFF, 0xEE, 0x35, 0xF0, 0x90, 0x95, 0x45,
 0xF0, 0xA3, 0xEF, 0xF0, 0x12, 0x03, 0x13, 0xFF,
-0xC3, 0x90, 0x95, 0x3F, 0xE0, 0x9F, 0xFE, 0x90,
-0x95, 0x3E, 0xE0, 0x95, 0xF0, 0x90, 0x95, 0x40,
-0xF0, 0xA3, 0xCE, 0xF0, 0xD1, 0xCD, 0xFD, 0xAC,
+0xC3, 0x90, 0x95, 0x46, 0xE0, 0x9F, 0xFE, 0x90,
+0x95, 0x45, 0xE0, 0x95, 0xF0, 0x90, 0x95, 0x47,
+0xF0, 0xA3, 0xCE, 0xF0, 0xB1, 0xEC, 0xFD, 0xAC,
 0xF0, 0x25, 0xE0, 0xFF, 0xEC, 0x33, 0xFE, 0xEF,
-0x2D, 0xFD, 0xEE, 0x3C, 0xFC, 0xD1, 0xE5, 0x25,
-0xE0, 0xFF, 0xE5, 0xF0, 0x33, 0xFE, 0xD1, 0xDF,
+0x2D, 0xFD, 0xEE, 0x3C, 0xFC, 0xF1, 0x05, 0x25,
+0xE0, 0xFF, 0xE5, 0xF0, 0x33, 0xFE, 0xF1, 0x71,
 0x2F, 0xFF, 0xEE, 0x35, 0xF0, 0xCF, 0x2D, 0xFD,
-0xEF, 0x3C, 0xFC, 0xD1, 0x81, 0xD1, 0xC4, 0xAE,
-0xF0, 0x78, 0x02, 0xC3, 0x33, 0xCE, 0x33, 0xCE,
-0xD8, 0xF9, 0x2D, 0xFF, 0xEC, 0x3E, 0x90, 0x95,
-0x42, 0xF0, 0xA3, 0xEF, 0xF0, 0x90, 0x95, 0x3C,
-0xF1, 0x1D, 0xF1, 0x3E, 0xD1, 0xD3, 0x50, 0x07,
-0x90, 0x95, 0x3C, 0xD1, 0xF6, 0x80, 0x04, 0x7E,
-0xFF, 0x7F, 0xFF, 0xE5, 0x62, 0x25, 0xE0, 0xF1,
-0x3E, 0x12, 0xA5, 0x92, 0x90, 0x95, 0x3E, 0xF1,
-0x1D, 0xF1, 0x46, 0xD1, 0xD3, 0x50, 0x07, 0x90,
-0x95, 0x3E, 0xD1, 0xF6, 0x80, 0x04, 0x7E, 0xFF,
-0x7F, 0xFF, 0xE5, 0x62, 0x25, 0xE0, 0xF1, 0x46,
-0x12, 0xA5, 0x92, 0x90, 0x95, 0x42, 0xF1, 0x1D,
-0xF1, 0x4E, 0xD1, 0xD3, 0x50, 0x07, 0x90, 0x95,
-0x42, 0xD1, 0xF6, 0x80, 0x04, 0x7E, 0xFF, 0x7F,
-0xFF, 0xE5, 0x62, 0x25, 0xE0, 0xF1, 0x4E, 0x12,
-0xA5, 0x92, 0xC3, 0x74, 0xFF, 0x95, 0x69, 0xFF,
-0x74, 0xFF, 0x95, 0x68, 0xFE, 0xF1, 0x8A, 0xD1,
-0xD3, 0x50, 0x0A, 0xE5, 0x69, 0x2D, 0xFF, 0xE5,
-0x68, 0x3C, 0xFE, 0x80, 0x04, 0x7E, 0xFF, 0x7F,
-0xFF, 0xF1, 0x8A, 0x12, 0xA5, 0x92, 0xF1, 0x5E,
-0xFB, 0xC3, 0x74, 0xFF, 0x9B, 0xFF, 0x74, 0xFF,
-0x9E, 0xFE, 0x74, 0xFF, 0x94, 0x00, 0xFD, 0x74,
-0xFF, 0x94, 0x00, 0xFC, 0x90, 0x8D, 0x71, 0x12,
-0x9F, 0xEB, 0x50, 0x11, 0xF1, 0x5E, 0xFF, 0xE4,
-0xFC, 0xFD, 0x90, 0x8D, 0x71, 0x12, 0x86, 0x61,
-0x12, 0x86, 0x2C, 0x80, 0x06, 0x74, 0xFF, 0xFF,
-0xFE, 0xFD, 0xFC, 0x90, 0x8D, 0x71, 0x12, 0x04,
-0x31, 0xAF, 0x62, 0x12, 0x78, 0x4A, 0xEF, 0x70,
-0x02, 0xC1, 0x7C, 0x75, 0xF0, 0x12, 0xE5, 0x62,
-0x90, 0x89, 0x52, 0x12, 0x04, 0x6E, 0x12, 0x9D,
-0xCF, 0x30, 0xE0, 0x02, 0xC1, 0x7C, 0xE5, 0x62,
-0x13, 0x13, 0x13, 0x54, 0x1F, 0x12, 0xA4, 0x3B,
-0xE0, 0xFD, 0x7C, 0x00, 0xE5, 0x62, 0x12, 0xB7,
-0x07, 0x80, 0x05, 0xC3, 0x33, 0xCE, 0x33, 0xCE,
-0xD8, 0xF9, 0xFF, 0xEE, 0x5C, 0xFE, 0xEF, 0x5D,
-0x4E, 0x60, 0x02, 0xC1, 0x7C, 0xE5, 0x69, 0x45,
-0x68, 0x70, 0x0C, 0x90, 0x95, 0x3C, 0xE0, 0x70,
-0x02, 0xA3, 0xE0, 0x70, 0x02, 0xC1, 0x7C, 0x90,
-0x96, 0x0B, 0xE0, 0x60, 0x11, 0x75, 0x6E, 0x0A,
-0xF1, 0x0F, 0xE4, 0x93, 0xC3, 0x13, 0x74, 0x01,
-0x93, 0x13, 0xF5, 0x6F, 0x80, 0x0A, 0x7B, 0xFF,
-0x12, 0xB6, 0xFD, 0xE4, 0xF5, 0x6E, 0xF5, 0x6F,
-0x75, 0xF0, 0x12, 0xE5, 0x62, 0x12, 0xA6, 0x54,
-0xFF, 0xE5, 0x64, 0xD3, 0x9F, 0x40, 0x08, 0x8F,
-0x64, 0xE5, 0x64, 0x45, 0x65, 0xF5, 0x63, 0xD1,
-0x87, 0xE0, 0xC3, 0x94, 0x05, 0x40, 0x02, 0x81,
-0x82, 0xE5, 0x64, 0x90, 0x81, 0x61, 0x93, 0xF5,
-0x6A, 0xFD, 0xAF, 0x64, 0x12, 0x60, 0x6F, 0x8F,
-0x6A, 0xE5, 0x65, 0x60, 0x04, 0x05, 0x6A, 0x05,
-0x6A, 0xE5, 0x64, 0xC3, 0x94, 0x0C, 0x40, 0x1C,
-0x74, 0x0D, 0x25, 0x62, 0xF1, 0xA2, 0xE0, 0xFF,
-0x54, 0x7F, 0xFE, 0xEF, 0x30, 0xE7, 0x06, 0xE5,
-0x6A, 0x2E, 0xFF, 0x80, 0x05, 0xC3, 0xE5, 0x6A,
-0x9E, 0xFF, 0x8F, 0x6A, 0xE5, 0x6A, 0xD3, 0x94,
-0x1A, 0xAF, 0x6A, 0x40, 0x02, 0x7F, 0x1A, 0x8F,
-0x6A, 0xE5, 0x63, 0x90, 0x81, 0xD9, 0x93, 0xFF,
-0xD3, 0x90, 0x95, 0x3D, 0xE0, 0x9F, 0x90, 0x95,
-0x3C, 0xE0, 0x94, 0x00, 0x40, 0x02, 0x81, 0x3B,
-0xC3, 0xE5, 0x69, 0x94, 0x0A, 0xE5, 0x68, 0x94,
-0x00, 0x50, 0x7A, 0x12, 0xB1, 0x34, 0xE0, 0xC3,
-0x94, 0x01, 0x40, 0x06, 0x12, 0xB1, 0x34, 0xE0,
-0x14, 0xF0, 0xD1, 0x81, 0xD1, 0xC4, 0xFF, 0x90,
-0x95, 0x3D, 0xE0, 0x2F, 0xFF, 0x90, 0x95, 0x3C,
-0xE0, 0xD1, 0xCA, 0x2F, 0xFD, 0xEE, 0x35, 0xF0,
-0xFC, 0xE5, 0x68, 0xC3, 0x13, 0xFE, 0xE5, 0x69,
-0x13, 0xFF, 0xD3, 0xED, 0x9F, 0xEC, 0x9E, 0x40,
-0x0E, 0xE5, 0x62, 0x94, 0x05, 0x50, 0x06, 0x12,
-0xB1, 0x34, 0x74, 0x02, 0xF0, 0x81, 0x3B, 0xD1,
-0x81, 0x12, 0x03, 0x13, 0x65, 0x6C, 0x70, 0x02,
-0xE5, 0xF0, 0x70, 0x25, 0xE5, 0x62, 0xC3, 0x94,
-0x05, 0x50, 0x12, 0x12, 0xB1, 0x34, 0xE0, 0xD3,
-0x94, 0x00, 0x40, 0x09, 0x7D, 0x06, 0xAF, 0x62,
-0x12, 0xCF, 0x4C, 0xC1, 0x7C, 0xE4, 0xFD, 0xAF,
-0x62, 0x12, 0xA4, 0xAC, 0x12, 0xCF, 0x48, 0xC1,
-0x61, 0xF1, 0x30, 0xC1, 0x61, 0x12, 0xB1, 0x34,
-0xE4, 0xF0, 0x90, 0x91, 0x6C, 0x74, 0x02, 0xF0,
-0xAB, 0x6A, 0xAD, 0x62, 0xAF, 0x69, 0xAE, 0x68,
-0x12, 0x41, 0x9C, 0x8E, 0x66, 0x8F, 0x67, 0xF1,
-0x0F, 0xC3, 0x74, 0x01, 0x93, 0x95, 0x6F, 0xFF,
-0xE4, 0x93, 0x94, 0x00, 0xFE, 0xD3, 0xE5, 0x67,
-0x9F, 0xE5, 0x66, 0x9E, 0x40, 0x0D, 0xD1, 0x9F,
-0xE4, 0xF0, 0x7D, 0x01, 0xAF, 0x62, 0x12, 0xA4,
-0xAC, 0xC1, 0x61, 0xF1, 0x56, 0xC3, 0xE5, 0x67,
-0x9F, 0xE5, 0x66, 0x94, 0x00, 0x50, 0x0D, 0xD1,
-0x9F, 0xE4, 0xF0, 0x7D, 0x01, 0xAF, 0x62, 0x12,
-0xA5, 0x9A, 0xC1, 0x61, 0x12, 0xCF, 0x48, 0xD1,
-0x9F, 0xE0, 0x04, 0xF0, 0xE5, 0x64, 0x90, 0x81,
-0xED, 0x93, 0x25, 0x6E, 0xFF, 0xE4, 0x33, 0xFE,
-0xD1, 0x9F, 0xE0, 0xC3, 0x9F, 0xEE, 0xD1, 0xEF,
-0x50, 0x02, 0xC1, 0x61, 0xD1, 0x9F, 0xE4, 0xF0,
-0xF1, 0x56, 0xF1, 0x0F, 0x74, 0x01, 0x93, 0x2F,
-0xFF, 0xE4, 0x93, 0x34, 0x00, 0xC3, 0x13, 0xFE,
-0xEF, 0x13, 0xFF, 0xE5, 0x62, 0x12, 0xA5, 0x89,
-0xC1, 0x61, 0xD1, 0x87, 0xE0, 0x64, 0x05, 0x60,
-0x02, 0xA1, 0x3E, 0x90, 0x04, 0xA0, 0xE0, 0x64,
-0x02, 0x70, 0x10, 0xD1, 0xAB, 0xE4, 0xF0, 0x90,
-0x04, 0xA1, 0xE0, 0x78, 0x88, 0xF6, 0x12, 0xA6,
-0x6D, 0xC1, 0x75, 0xAD, 0x64, 0xAF, 0x62, 0x12,
-0x72, 0xEE, 0xF1, 0x7E, 0xEF, 0xF0, 0x12, 0xA3,
-0x5E, 0xE0, 0x54, 0x07, 0x78, 0x88, 0xF6, 0xF1,
-0x02, 0xFF, 0xC3, 0x94, 0x30, 0x40, 0x1C, 0x75,
-0xF0, 0x12, 0xE5, 0x62, 0x12, 0x9F, 0xCD, 0xFE,
-0xC4, 0x13, 0x13, 0x54, 0x03, 0x20, 0xE0, 0x0B,
-0xF1, 0x7E, 0xE0, 0x60, 0x06, 0x90, 0x96, 0x0B,
-0xE0, 0x60, 0x0A, 0xE4, 0x78, 0x88, 0xF6, 0xD1,
-0xAB, 0xE4, 0xF0, 0x80, 0x52, 0xF1, 0x72, 0xE0,
-0xFE, 0x24, 0x05, 0xFD, 0xE4, 0x33, 0xFC, 0xEF,
-0xD1, 0xEC, 0x50, 0x1B, 0xF1, 0x02, 0x24, 0x05,
-0xFD, 0xE4, 0x33, 0xFC, 0xEE, 0xD1, 0xEC, 0x50,
-0x0E, 0xF1, 0x66, 0xE0, 0xB5, 0x64, 0x08, 0xD1,
-0xB8, 0xE0, 0xC3, 0x94, 0x0A, 0x40, 0x23, 0x78,
-0x88, 0xE6, 0xFF, 0x70, 0x04, 0x76, 0x01, 0x80,
-0x0C, 0xEF, 0x78, 0x88, 0xB4, 0x01, 0x04, 0x76,
-0x03, 0x80, 0x02, 0x76, 0x05, 0xD1, 0xB8, 0xE4,
-0xF0, 0xF1, 0x02, 0xFF, 0xF1, 0x72, 0xEF, 0xF0,
-0x80, 0x05, 0xD1, 0xAB, 0xE0, 0x04, 0xF0, 0xF1,
-0x66, 0xE5, 0x64, 0xF0, 0xC1, 0x5C, 0xD1, 0x87,
-0xE0, 0x64, 0x06, 0x60, 0x02, 0xC1, 0x61, 0xF5,
-0x66, 0xF5, 0x67, 0x12, 0xA3, 0x5E, 0xE0, 0x54,
-0x07, 0x78, 0x88, 0xF6, 0xD3, 0xE5, 0x69, 0x94,
-0xE8, 0xE5, 0x68, 0x94, 0x03, 0x40, 0x06, 0x78,
-0x86, 0x76, 0x05, 0x80, 0x15, 0xD3, 0xE5, 0x69,
-0x94, 0xFA, 0xE5, 0x68, 0x94, 0x00, 0x40, 0x06,
-0x78, 0x86, 0x76, 0x02, 0x80, 0x04, 0xE4, 0x78,
-0x86, 0xF6, 0xE5, 0x69, 0xAE, 0x68, 0x78, 0x86,
-0x86, 0x00, 0x08, 0x80, 0x05, 0xCE, 0xC3, 0x13,
-0xCE, 0x13, 0xD8, 0xF9, 0xFF, 0x90, 0x82, 0x06,
-0xE4, 0xF1, 0x37, 0x90, 0x95, 0x45, 0xEE, 0xF0,
-0xA3, 0xEF, 0xF0, 0xE4, 0x78, 0x87, 0xF6, 0xD1,
-0x81, 0x78, 0x87, 0xE6, 0xFD, 0xF1, 0xAA, 0xAE,
-0xF0, 0x78, 0x86, 0x86, 0x00, 0x08, 0x80, 0x05,
-0xCE, 0xC3, 0x13, 0xCE, 0x13, 0xD8, 0xF9, 0xFF,
-0xED, 0x90, 0x82, 0x01, 0xF1, 0x37, 0xEF, 0x25,
-0x67, 0xF5, 0x67, 0xEE, 0x35, 0x66, 0xF5, 0x66,
-0xC3, 0x90, 0x95, 0x46, 0xE0, 0x95, 0x67, 0x90,
-0x95, 0x45, 0xE0, 0x95, 0x66, 0x40, 0x07, 0x78,
-0x87, 0x06, 0xE6, 0xB4, 0x05, 0xC1, 0x78, 0x87,
-0xE6, 0xC3, 0x13, 0xF6, 0xFD, 0x08, 0xE6, 0x24,
-0x01, 0xFF, 0xE4, 0x33, 0xA2, 0xE7, 0x13, 0xEF,
-0x13, 0x08, 0xF6, 0xD3, 0x9D, 0x40, 0x07, 0xE6,
-0x79, 0x87, 0x97, 0xF6, 0x80, 0x04, 0xE4, 0x78,
-0x89, 0xF6, 0xD1, 0x93, 0xE0, 0xC3, 0x13, 0xFF,
-0x78, 0x89, 0xE6, 0xC4, 0x33, 0x54, 0xE0, 0x2F,
-0xFF, 0xD1, 0x93, 0xEF, 0xF0, 0xD1, 0x93, 0xE0,
-0xC3, 0x94, 0xC0, 0x40, 0x05, 0xD1, 0x93, 0x74,
-0xC0, 0xF0, 0xD1, 0x93, 0xE0, 0x24, 0x1F, 0xFF,
-0xE4, 0x33, 0xFE, 0xEF, 0x78, 0x06, 0xCE, 0xA2,
-0xE7, 0x13, 0xCE, 0x13, 0xD8, 0xF8, 0x78, 0x89,
-0xF6, 0xE6, 0x25, 0xE0, 0xF6, 0x70, 0x03, 0xFF,
-0x80, 0x05, 0x78, 0x89, 0xE6, 0x14, 0xFF, 0x78,
-0x88, 0xA6, 0x07, 0xD3, 0x90, 0x95, 0x3D, 0xE0,
-0x94, 0x03, 0x90, 0x95, 0x3C, 0xE0, 0x94, 0x00,
-0x40, 0x02, 0xE4, 0xF6, 0x78, 0x88, 0x12, 0xA6,
-0x6D, 0xD1, 0x87, 0xE0, 0xFF, 0xD3, 0x94, 0x05,
-0x50, 0x05, 0xEF, 0x04, 0xFF, 0x80, 0x02, 0x7F,
-0x00, 0xD1, 0x87, 0xEF, 0xF0, 0xE4, 0xF5, 0x66,
-0xF5, 0x67, 0xF1, 0x30, 0x05, 0x62, 0x01, 0x38,
-0x22, 0x90, 0x95, 0x39, 0x02, 0x86, 0x6D, 0x74,
-0x76, 0x25, 0x62, 0xF5, 0x82, 0xE4, 0x34, 0x8E,
-0xF5, 0x83, 0x22, 0x74, 0x4F, 0x25, 0x62, 0xF5,
-0x82, 0xE4, 0x34, 0x8D, 0xF5, 0x83, 0x22, 0x74,
-0xA6, 0x25, 0x62, 0xF5, 0x82, 0xE4, 0x34, 0x8D,
-0xF5, 0x83, 0x22, 0x74, 0x76, 0x25, 0x62, 0xF5,
-0x82, 0xE4, 0x34, 0x8E, 0xF5, 0x83, 0xE4, 0xF0,
-0x74, 0xF6, 0x25, 0x62, 0xF5, 0x82, 0xE4, 0x34,
-0x8D, 0xF5, 0x83, 0x22, 0x90, 0x00, 0x08, 0x02,
-0x03, 0x3E, 0x35, 0xF0, 0xFE, 0x90, 0x00, 0x06,
-0x02, 0x03, 0x3E, 0xF5, 0x83, 0xE0, 0xFC, 0xA3,
-0xE0, 0xFD, 0xD3, 0x9F, 0xEC, 0x9E, 0x22, 0x90,
-0x00, 0x02, 0x02, 0x03, 0x3E, 0x90, 0x00, 0x04,
-0x02, 0x03, 0x3E, 0xE0, 0xD3, 0x9D, 0xEC, 0x64,
-0x80, 0xF8, 0x74, 0x80, 0x98, 0x22, 0xE0, 0xFE,
-0xA3, 0xE0, 0xFF, 0xED, 0x2F, 0xFF, 0xEC, 0x3E,
-0xFE, 0x22, 0x74, 0xD6, 0x25, 0x62, 0xF5, 0x82,
-0xE4, 0x34, 0x8D, 0xF5, 0x83, 0xE0, 0x22, 0xE5,
-0x64, 0x25, 0xE0, 0x24, 0x75, 0xF5, 0x82, 0xE4,
-0x34, 0x81, 0xF5, 0x83, 0x22, 0xE0, 0xFE, 0xA3,
-0xE0, 0xFF, 0xC3, 0x74, 0xFF, 0x9F, 0xFF, 0x74,
-0xFF, 0x9E, 0xFE, 0xE5, 0x62, 0x25, 0xE0, 0x22,
-0x7D, 0x01, 0xAF, 0x62, 0x02, 0x61, 0xF7, 0x93,
-0xFD, 0x7C, 0x00, 0x02, 0x02, 0x80, 0x24, 0x06,
-0xF5, 0x82, 0xE4, 0x34, 0x8E, 0x22, 0x24, 0x26,
-0xF5, 0x82, 0xE4, 0x34, 0x8E, 0x22, 0x24, 0x56,
-0xF5, 0x82, 0xE4, 0x34, 0x8E, 0x22, 0xE5, 0x64,
-0x90, 0x81, 0x9D, 0x93, 0xFF, 0x22, 0x90, 0x95,
-0x40, 0xE0, 0xFE, 0xA3, 0xE0, 0x22, 0x74, 0xA6,
-0x25, 0x62, 0xF5, 0x82, 0xE4, 0x34, 0x8E, 0xF5,
-0x83, 0x22, 0x74, 0x5F, 0x25, 0x62, 0xF5, 0x82,
-0xE4, 0x34, 0x8D, 0xF5, 0x83, 0x22, 0x74, 0xE6,
-0x25, 0x62, 0xF5, 0x82, 0xE4, 0x34, 0x8D, 0xF5,
-0x83, 0x22, 0xE5, 0x62, 0x25, 0xE0, 0x24, 0x86,
-0xF5, 0x82, 0xE4, 0x34, 0x8E, 0x22, 0x74, 0xB6,
-0x25, 0x62, 0xF5, 0x82, 0xE4, 0x34, 0x8D, 0xF5,
-0x83, 0x22, 0xF5, 0x82, 0xE4, 0x34, 0x96, 0xF5,
-0x83, 0x22, 0x75, 0xF0, 0x02, 0xA4, 0xF5, 0x82,
-0x85, 0xF0, 0x83, 0x02, 0x03, 0x3E, 0xD3, 0x10,
-0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0x90, 0x96, 0xD0,
+0xEF, 0x3C, 0xFC, 0x12, 0xBF, 0xE9, 0xB1, 0xE3,
+0xAE, 0xF0, 0x78, 0x02, 0xC3, 0x33, 0xCE, 0x33,
+0xCE, 0xD8, 0xF9, 0x2D, 0xFF, 0xEC, 0x3E, 0x90,
+0x95, 0x49, 0xF0, 0xA3, 0xEF, 0xF0, 0x90, 0x95,
+0x43, 0xD1, 0x17, 0xF1, 0x19, 0x12, 0x9F, 0xCF,
+0x50, 0x07, 0x90, 0x95, 0x43, 0xB1, 0xFD, 0x80,
+0x04, 0x7E, 0xFF, 0x7F, 0xFF, 0xE5, 0x62, 0x25,
+0xE0, 0xF1, 0x19, 0x12, 0xCE, 0x97, 0x90, 0x95,
+0x45, 0xD1, 0x17, 0xF1, 0x21, 0x12, 0x9F, 0xCF,
+0x50, 0x07, 0x90, 0x95, 0x45, 0xB1, 0xFD, 0x80,
+0x04, 0x7E, 0xFF, 0x7F, 0xFF, 0xE5, 0x62, 0x25,
+0xE0, 0xF1, 0x21, 0x12, 0xCE, 0x97, 0x90, 0x95,
+0x49, 0xD1, 0x17, 0xF1, 0x29, 0x12, 0x9F, 0xCF,
+0x50, 0x07, 0x90, 0x95, 0x49, 0xB1, 0xFD, 0x80,
+0x04, 0x7E, 0xFF, 0x7F, 0xFF, 0xE5, 0x62, 0x25,
+0xE0, 0xF1, 0x29, 0x12, 0xCE, 0x97, 0xC3, 0x74,
+0xFF, 0x95, 0x69, 0xFF, 0x74, 0xFF, 0x95, 0x68,
+0xFE, 0xF1, 0x65, 0x12, 0x9F, 0xCF, 0x50, 0x0A,
+0xE5, 0x69, 0x2D, 0xFF, 0xE5, 0x68, 0x3C, 0xFE,
+0x80, 0x04, 0x7E, 0xFF, 0x7F, 0xFF, 0xF1, 0x65,
+0x12, 0xCE, 0x97, 0xF1, 0x39, 0xFB, 0xC3, 0x74,
+0xFF, 0x9B, 0xFF, 0x74, 0xFF, 0x9E, 0xFE, 0x74,
+0xFF, 0x94, 0x00, 0xFD, 0x74, 0xFF, 0x94, 0x00,
+0xFC, 0x90, 0x8D, 0x71, 0xF1, 0x77, 0x50, 0x11,
+0xF1, 0x39, 0xFF, 0xE4, 0xFC, 0xFD, 0x90, 0x8D,
+0x71, 0x12, 0x86, 0x61, 0x12, 0x86, 0x2C, 0x80,
+0x06, 0x74, 0xFF, 0xFF, 0xFE, 0xFD, 0xFC, 0x90,
+0x8D, 0x71, 0x12, 0x04, 0x31, 0xAF, 0x62, 0x12,
+0x78, 0x4A, 0xEF, 0x70, 0x02, 0xA1, 0x4B, 0x75,
+0xF0, 0x12, 0xE5, 0x62, 0x90, 0x89, 0x52, 0x12,
+0x04, 0x6E, 0x12, 0x8D, 0x34, 0x30, 0xE0, 0x02,
+0xA1, 0x4B, 0xE5, 0x62, 0x13, 0x13, 0x13, 0x54,
+0x1F, 0x12, 0x97, 0xD8, 0xE0, 0xFD, 0x7C, 0x00,
+0xE5, 0x62, 0x12, 0xB7, 0x93, 0x80, 0x05, 0xC3,
+0x33, 0xCE, 0x33, 0xCE, 0xD8, 0xF9, 0xFF, 0xEE,
+0x5C, 0xFE, 0xEF, 0x5D, 0x4E, 0x60, 0x02, 0xA1,
+0x4B, 0xE5, 0x69, 0x45, 0x68, 0x70, 0x0C, 0x90,
+0x95, 0x43, 0xE0, 0x70, 0x02, 0xA3, 0xE0, 0x70,
+0x02, 0xA1, 0x4B, 0x90, 0x96, 0x13, 0xE0, 0x60,
+0x11, 0x75, 0x6E, 0x0A, 0xD1, 0x09, 0xE4, 0x93,
+0xC3, 0x13, 0x74, 0x01, 0x93, 0x13, 0xF5, 0x6F,
+0x80, 0x0A, 0x7B, 0xFF, 0x12, 0xCC, 0x49, 0xE4,
+0xF5, 0x6E, 0xF5, 0x6F, 0x75, 0xF0, 0x12, 0xE5,
+0x62, 0x12, 0xCE, 0x70, 0xFF, 0xE5, 0x64, 0xD3,
+0x9F, 0x40, 0x08, 0x8F, 0x64, 0xE5, 0x64, 0x45,
+0x65, 0xF5, 0x63, 0xB1, 0x51, 0xE0, 0xC3, 0x94,
+0x05, 0x40, 0x02, 0x61, 0x49, 0xE5, 0x64, 0x90,
+0x81, 0x61, 0x93, 0xF5, 0x6A, 0xFD, 0xAF, 0x64,
+0x12, 0x60, 0x6F, 0x8F, 0x6A, 0xE5, 0x65, 0x60,
+0x04, 0x05, 0x6A, 0x05, 0x6A, 0xE5, 0x64, 0xC3,
+0x94, 0x0C, 0x40, 0x1D, 0x74, 0x15, 0x25, 0x62,
+0x12, 0x87, 0xAD, 0xE0, 0xFF, 0x54, 0x7F, 0xFE,
+0xEF, 0x30, 0xE7, 0x06, 0xE5, 0x6A, 0x2E, 0xFF,
+0x80, 0x05, 0xC3, 0xE5, 0x6A, 0x9E, 0xFF, 0x8F,
+0x6A, 0xE5, 0x6A, 0xD3, 0x94, 0x1A, 0xAF, 0x6A,
+0x40, 0x02, 0x7F, 0x1A, 0x8F, 0x6A, 0xE5, 0x63,
+0x90, 0x81, 0xD9, 0x93, 0xFF, 0xD3, 0x90, 0x95,
+0x44, 0xE0, 0x9F, 0x90, 0x95, 0x43, 0xE0, 0x94,
+0x00, 0x40, 0x02, 0x61, 0x02, 0xC3, 0xE5, 0x69,
+0x94, 0x0A, 0xE5, 0x68, 0x94, 0x00, 0x50, 0x7C,
+0x12, 0xCC, 0x53, 0xE0, 0xC3, 0x94, 0x01, 0x40,
+0x06, 0x12, 0xCC, 0x53, 0xE0, 0x14, 0xF0, 0x12,
+0xBF, 0xE9, 0xB1, 0xE3, 0xFF, 0x90, 0x95, 0x44,
+0xE0, 0x2F, 0xFF, 0x90, 0x95, 0x43, 0xE0, 0xB1,
+0xE9, 0x2F, 0xFD, 0xEE, 0x35, 0xF0, 0xFC, 0xE5,
+0x68, 0xC3, 0x13, 0xFE, 0xE5, 0x69, 0x13, 0xFF,
+0xD3, 0xED, 0x9F, 0xEC, 0x9E, 0x40, 0x0E, 0xE5,
+0x62, 0x94, 0x05, 0x50, 0x06, 0x12, 0xCC, 0x53,
+0x74, 0x02, 0xF0, 0x61, 0x02, 0x12, 0xBF, 0xE9,
+0x12, 0x03, 0x13, 0x65, 0x6C, 0x70, 0x02, 0xE5,
+0xF0, 0x70, 0x25, 0xE5, 0x62, 0xC3, 0x94, 0x05,
+0x50, 0x12, 0x12, 0xCC, 0x53, 0xE0, 0xD3, 0x94,
+0x00, 0x40, 0x09, 0x7D, 0x06, 0xAF, 0x62, 0x12,
+0xBB, 0x07, 0xA1, 0x4B, 0xE4, 0xFD, 0xAF, 0x62,
+0x12, 0xCD, 0x9B, 0x12, 0xBB, 0x03, 0xA1, 0x30,
+0xF1, 0x0B, 0xA1, 0x30, 0x12, 0xCC, 0x53, 0xE4,
+0xF0, 0x90, 0x91, 0x6C, 0x74, 0x02, 0xF0, 0xAB,
+0x6A, 0xAD, 0x62, 0xAF, 0x69, 0xAE, 0x68, 0x12,
+0x41, 0x9C, 0x8E, 0x66, 0x8F, 0x67, 0xD1, 0x09,
+0xC3, 0x74, 0x01, 0x93, 0x95, 0x6F, 0xFF, 0xE4,
+0x93, 0x94, 0x00, 0xFE, 0xD3, 0xE5, 0x67, 0x9F,
+0xE5, 0x66, 0x9E, 0x40, 0x0D, 0xB1, 0x69, 0xE4,
+0xF0, 0x7D, 0x01, 0xAF, 0x62, 0x12, 0xCD, 0x9B,
+0xA1, 0x30, 0xF1, 0x31, 0xC3, 0xE5, 0x67, 0x9F,
+0xE5, 0x66, 0x94, 0x00, 0x50, 0x0D, 0xB1, 0x69,
+0xE4, 0xF0, 0x7D, 0x01, 0xAF, 0x62, 0x12, 0xCC,
+0xDF, 0xA1, 0x30, 0x12, 0xBB, 0x03, 0xB1, 0x69,
+0xE0, 0x04, 0xF0, 0xE5, 0x64, 0x90, 0x81, 0xED,
+0x93, 0x25, 0x6E, 0xFF, 0xE4, 0x33, 0xFE, 0xB1,
+0x69, 0xE0, 0xC3, 0x9F, 0xEE, 0xB1, 0xF6, 0x50,
+0x02, 0xA1, 0x30, 0xB1, 0x69, 0xE4, 0xF0, 0xF1,
+0x31, 0xD1, 0x09, 0x74, 0x01, 0x93, 0x2F, 0xFF,
+0xE4, 0x93, 0x34, 0x00, 0xC3, 0x13, 0xFE, 0xEF,
+0x13, 0xFF, 0xE5, 0x62, 0x12, 0xCE, 0x8E, 0xA1,
+0x30, 0xB1, 0x51, 0xE0, 0x64, 0x05, 0x60, 0x02,
+0x81, 0x0A, 0x90, 0x04, 0xA0, 0xE0, 0x64, 0x02,
+0x70, 0x10, 0xB1, 0x75, 0xE4, 0xF0, 0x90, 0x04,
+0xA1, 0xE0, 0x78, 0x88, 0xF6, 0x12, 0xCB, 0xB9,
+0xA1, 0x44, 0xAD, 0x64, 0xAF, 0x62, 0x12, 0x72,
+0xEE, 0xF1, 0x59, 0xEF, 0xF0, 0xE5, 0x62, 0x12,
+0x96, 0xF3, 0xE0, 0x54, 0x07, 0x78, 0x88, 0xF6,
+0x12, 0x87, 0xC2, 0xFF, 0xC3, 0x94, 0x30, 0x40,
+0x1C, 0x75, 0xF0, 0x12, 0xE5, 0x62, 0x12, 0x87,
+0xBA, 0xFE, 0xC4, 0x13, 0x13, 0x54, 0x03, 0x20,
+0xE0, 0x0B, 0xF1, 0x59, 0xE0, 0x60, 0x06, 0x90,
+0x96, 0x13, 0xE0, 0x60, 0x0A, 0xE4, 0x78, 0x88,
+0xF6, 0xB1, 0x75, 0xE4, 0xF0, 0x80, 0x54, 0xF1,
+0x4D, 0xE0, 0xFE, 0x24, 0x05, 0xFD, 0xE4, 0x33,
+0xFC, 0xEF, 0xB1, 0xF3, 0x50, 0x1C, 0x12, 0x87,
+0xC2, 0x24, 0x05, 0xFD, 0xE4, 0x33, 0xFC, 0xEE,
+0xB1, 0xF3, 0x50, 0x0E, 0xF1, 0x41, 0xE0, 0xB5,
+0x64, 0x08, 0xB1, 0x82, 0xE0, 0xC3, 0x94, 0x0A,
+0x40, 0x24, 0x78, 0x88, 0xE6, 0xFF, 0x70, 0x04,
+0x76, 0x01, 0x80, 0x0C, 0xEF, 0x78, 0x88, 0xB4,
+0x01, 0x04, 0x76, 0x03, 0x80, 0x02, 0x76, 0x05,
+0xB1, 0x82, 0xE4, 0xF0, 0x12, 0x87, 0xC2, 0xFF,
+0xF1, 0x4D, 0xEF, 0xF0, 0x80, 0x05, 0xB1, 0x75,
+0xE0, 0x04, 0xF0, 0xF1, 0x41, 0xE5, 0x64, 0xF0,
+0xA1, 0x2B, 0xB1, 0x51, 0xE0, 0x64, 0x06, 0x60,
+0x02, 0xA1, 0x30, 0xF5, 0x66, 0xF5, 0x67, 0xE5,
+0x62, 0x12, 0x96, 0xF3, 0xE0, 0x54, 0x07, 0x78,
+0x88, 0xF6, 0xD3, 0xE5, 0x69, 0x94, 0xE8, 0xE5,
+0x68, 0x94, 0x03, 0x40, 0x06, 0x78, 0x86, 0x76,
+0x05, 0x80, 0x15, 0xD3, 0xE5, 0x69, 0x94, 0xFA,
+0xE5, 0x68, 0x94, 0x00, 0x40, 0x06, 0x78, 0x86,
+0x76, 0x02, 0x80, 0x04, 0xE4, 0x78, 0x86, 0xF6,
+0xE5, 0x69, 0xAE, 0x68, 0x78, 0x86, 0x86, 0x00,
+0x08, 0x80, 0x05, 0xCE, 0xC3, 0x13, 0xCE, 0x13,
+0xD8, 0xF9, 0xFF, 0x90, 0x82, 0x06, 0xE4, 0xF1,
+0x12, 0x90, 0x95, 0x4C, 0xEE, 0xF0, 0xA3, 0xEF,
+0xF0, 0xE4, 0x78, 0x87, 0xF6, 0x12, 0xBF, 0xE9,
+0x78, 0x87, 0xE6, 0xFD, 0xF1, 0x86, 0xAE, 0xF0,
+0x78, 0x86, 0x86, 0x00, 0x08, 0x80, 0x05, 0xCE,
+0xC3, 0x13, 0xCE, 0x13, 0xD8, 0xF9, 0xFF, 0xED,
+0x90, 0x82, 0x01, 0xF1, 0x12, 0xEF, 0x25, 0x67,
+0xF5, 0x67, 0xEE, 0x35, 0x66, 0xF5, 0x66, 0xC3,
+0x90, 0x95, 0x4D, 0xE0, 0x95, 0x67, 0x90, 0x95,
+0x4C, 0xE0, 0x95, 0x66, 0x40, 0x07, 0x78, 0x87,
+0x06, 0xE6, 0xB4, 0x05, 0xC0, 0x78, 0x87, 0xE6,
+0xC3, 0x13, 0xF6, 0xFD, 0x08, 0xE6, 0x24, 0x01,
+0xFF, 0xE4, 0x33, 0xA2, 0xE7, 0x13, 0xEF, 0x13,
+0x08, 0xF6, 0xD3, 0x9D, 0x40, 0x07, 0xE6, 0x79,
+0x87, 0x97, 0xF6, 0x80, 0x04, 0xE4, 0x78, 0x89,
+0xF6, 0xB1, 0x5D, 0xE0, 0xC3, 0x13, 0xFF, 0x78,
+0x89, 0xE6, 0xC4, 0x33, 0x54, 0xE0, 0x2F, 0xFF,
+0xB1, 0x5D, 0xEF, 0xF0, 0xB1, 0x5D, 0xE0, 0xC3,
+0x94, 0xC0, 0x40, 0x05, 0xB1, 0x5D, 0x74, 0xC0,
+0xF0, 0xB1, 0x5D, 0xE0, 0x24, 0x1F, 0xFF, 0xE4,
+0x33, 0xFE, 0xEF, 0x78, 0x06, 0xCE, 0xA2, 0xE7,
+0x13, 0xCE, 0x13, 0xD8, 0xF8, 0x78, 0x89, 0xF6,
+0xE6, 0x25, 0xE0, 0xF6, 0x70, 0x03, 0xFF, 0x80,
+0x05, 0x78, 0x89, 0xE6, 0x14, 0xFF, 0x78, 0x88,
+0xA6, 0x07, 0xD3, 0x90, 0x95, 0x44, 0xE0, 0x94,
+0x03, 0x90, 0x95, 0x43, 0xE0, 0x94, 0x00, 0x40,
+0x02, 0xE4, 0xF6, 0x78, 0x88, 0x12, 0xCB, 0xB9,
+0xB1, 0x51, 0xE0, 0xFF, 0xD3, 0x94, 0x05, 0x50,
+0x05, 0xEF, 0x04, 0xFF, 0x80, 0x02, 0x7F, 0x00,
+0xB1, 0x51, 0xEF, 0xF0, 0xE4, 0xF5, 0x66, 0xF5,
+0x67, 0xF1, 0x0B, 0x05, 0x62, 0x02, 0xCE, 0xF4,
+0x22, 0x74, 0x76, 0x25, 0x62, 0xF5, 0x82, 0xE4,
+0x34, 0x8E, 0xF5, 0x83, 0x22, 0x74, 0x4F, 0x25,
+0x62, 0xF5, 0x82, 0xE4, 0x34, 0x8D, 0xF5, 0x83,
+0x22, 0x74, 0xA6, 0x25, 0x62, 0xF5, 0x82, 0xE4,
+0x34, 0x8D, 0xF5, 0x83, 0x22, 0x74, 0x76, 0x25,
+0x62, 0xF5, 0x82, 0xE4, 0x34, 0x8E, 0xF5, 0x83,
+0xE4, 0xF0, 0x74, 0xF6, 0x25, 0x62, 0xF5, 0x82,
+0xE4, 0x34, 0x8D, 0xF5, 0x83, 0x22, 0xD3, 0x10,
+0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0x90, 0x96, 0xFD,
 0xEF, 0xF0, 0x90, 0x00, 0x8F, 0xE0, 0x30, 0xE6,
 0x3D, 0x90, 0x00, 0x8D, 0xE0, 0x64, 0x01, 0x70,
-0x35, 0x90, 0x96, 0xD1, 0xF0, 0x90, 0x96, 0xD1,
-0xE0, 0xFD, 0x90, 0x96, 0xD0, 0xE0, 0x12, 0xA3,
-0x7C, 0xE5, 0x82, 0x2D, 0x12, 0xAD, 0x4D, 0xE0,
-0xFB, 0xE4, 0xFF, 0x12, 0x9F, 0x07, 0x90, 0x96,
-0xD1, 0xE0, 0x04, 0xF0, 0xE0, 0xC3, 0x94, 0x10,
+0x35, 0x90, 0x96, 0xFE, 0xF0, 0x90, 0x96, 0xFE,
+0xE0, 0xFD, 0x90, 0x96, 0xFD, 0xE0, 0x12, 0x94,
+0xDD, 0xE5, 0x82, 0x2D, 0x12, 0xB6, 0x93, 0xE0,
+0xFB, 0xE4, 0xFF, 0x12, 0x8E, 0x70, 0x90, 0x96,
+0xFE, 0xE0, 0x04, 0xF0, 0xE0, 0xC3, 0x94, 0x10,
 0x40, 0xDB, 0x90, 0x00, 0x8F, 0xE0, 0x30, 0xE0,
 0x05, 0x90, 0x00, 0x8D, 0xE4, 0xF0, 0xD0, 0xD0,
-0x92, 0xAF, 0x22, 0xD3, 0x10, 0xAF, 0x01, 0xC3,
-0xC0, 0xD0, 0xE4, 0x90, 0x95, 0xEA, 0xF0, 0x90,
-0x95, 0xE8, 0x74, 0x14, 0xF0, 0x90, 0x96, 0x0A,
-0x74, 0x01, 0xF0, 0xFB, 0x7A, 0x95, 0x79, 0xE8,
-0x12, 0x8D, 0x16, 0x7F, 0x04, 0x12, 0x04, 0x7E,
-0xD0, 0xD0, 0x92, 0xAF, 0x22, 0x90, 0x93, 0x03,
-0xE0, 0x30, 0xE0, 0x0B, 0x90, 0x8A, 0xE5, 0x12,
-0x8D, 0x28, 0x7F, 0x20, 0x12, 0x04, 0x7E, 0x22,
-0x90, 0x8A, 0x75, 0x12, 0x8B, 0x95, 0x90, 0x8A,
-0xE5, 0x12, 0x8D, 0x28, 0x7F, 0x02, 0x02, 0x04,
-0x7E, 0x90, 0x01, 0xCF, 0xE0, 0x90, 0x95, 0xC3,
-0xF0, 0xE0, 0xFF, 0x30, 0xE0, 0x07, 0x90, 0x01,
-0xCF, 0xE0, 0x54, 0xFE, 0xF0, 0xEF, 0x30, 0xE5,
-0x23, 0x90, 0x01, 0xCF, 0xE0, 0x54, 0xDF, 0xF0,
-0x90, 0x01, 0x34, 0x74, 0x20, 0xF0, 0xE4, 0xF5,
-0xA8, 0xF5, 0xE8, 0x12, 0x76, 0x6D, 0x90, 0x00,
-0x03, 0xE0, 0x54, 0xFB, 0xFD, 0x7F, 0x03, 0x12,
-0x7B, 0x2E, 0x80, 0xFE, 0x22, 0xE4, 0xF5, 0x77,
-0xF5, 0x78, 0xF5, 0x79, 0x11, 0xC2, 0xBF, 0x03,
-0x09, 0x90, 0x93, 0x4A, 0xE0, 0xB4, 0x01, 0x02,
-0x11, 0xAB, 0x22, 0x90, 0x05, 0x21, 0xE0, 0x54,
-0x7F, 0xF0, 0x22, 0x11, 0xC2, 0xBF, 0x03, 0x09,
-0x90, 0x93, 0x4A, 0xE0, 0xB4, 0x01, 0x02, 0x11,
-0xAB, 0x22, 0x90, 0x01, 0x02, 0xE0, 0x54, 0x03,
-0xFF, 0x22, 0x22, 0x90, 0x01, 0xC4, 0x74, 0xCB,
-0xF0, 0x74, 0xD8, 0xA3, 0xF0, 0x7F, 0x90, 0x12,
-0x7B, 0x41, 0xEF, 0x20, 0xE0, 0xF7, 0x74, 0xCB,
-0x04, 0x90, 0x01, 0xC4, 0xF0, 0x74, 0xD8, 0xA3,
-0xF0, 0x22, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0,
-0xD0, 0x12, 0xB7, 0x91, 0x90, 0x96, 0xD9, 0xF0,
-0xED, 0x90, 0x00, 0x73, 0x70, 0x0D, 0xE0, 0x44,
-0x04, 0xF0, 0x90, 0x00, 0x67, 0xE0, 0x44, 0x80,
-0xF0, 0x80, 0x0B, 0xE0, 0x54, 0xFB, 0xF0, 0x90,
-0x00, 0x67, 0xE0, 0x54, 0x7F, 0xF0, 0xD0, 0xD0,
-0x92, 0xAF, 0x22, 0xD3, 0x10, 0xAF, 0x01, 0xC3,
+0x92, 0xAF, 0x22, 0x90, 0x00, 0x08, 0x02, 0x03,
+0x3E, 0x35, 0xF0, 0xFE, 0x90, 0x00, 0x06, 0x02,
+0x03, 0x3E, 0xE0, 0xD3, 0x9D, 0xEC, 0x64, 0x80,
+0xF8, 0x74, 0x80, 0x98, 0x22, 0xE0, 0xFE, 0xA3,
+0xE0, 0xFF, 0xED, 0x2F, 0xFF, 0xEC, 0x3E, 0xFE,
+0x22, 0xE5, 0x64, 0x25, 0xE0, 0x24, 0x75, 0xF5,
+0x82, 0xE4, 0x34, 0x81, 0xF5, 0x83, 0x22, 0xE0,
+0xFE, 0xA3, 0xE0, 0xFF, 0xC3, 0x74, 0xFF, 0x9F,
+0xFF, 0x74, 0xFF, 0x9E, 0xFE, 0xE5, 0x62, 0x25,
+0xE0, 0x22, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0,
+0xD0, 0xF1, 0x92, 0x90, 0x97, 0x0D, 0xF0, 0x90,
+0x88, 0x32, 0x12, 0x8D, 0x34, 0x30, 0xE0, 0x02,
+0xC1, 0xF0, 0x90, 0x88, 0x31, 0xE0, 0x30, 0xE0,
+0x1F, 0x90, 0x88, 0x53, 0xE0, 0x24, 0x04, 0x33,
+0x33, 0x33, 0x54, 0xF8, 0x90, 0x88, 0x4B, 0xF0,
+0x90, 0x88, 0x53, 0xE0, 0x04, 0x33, 0x33, 0x33,
+0x54, 0xF8, 0x90, 0x88, 0x4A, 0xF0, 0x80, 0x10,
+0x90, 0x88, 0x4B, 0x74, 0x10, 0xF0, 0x90, 0x88,
+0x4A, 0x74, 0x08, 0xF0, 0x74, 0x10, 0x2B, 0xFB,
+0x90, 0x88, 0x4A, 0xE0, 0xFE, 0x90, 0x88, 0x49,
+0xE0, 0xD3, 0x9E, 0x50, 0x0E, 0x90, 0x88, 0x3E,
+0xEB, 0xF0, 0x90, 0x88, 0x4B, 0xE0, 0xC3, 0x9D,
+0x2F, 0x80, 0x11, 0xC3, 0xED, 0x9E, 0x2B, 0x90,
+0x88, 0x3E, 0xF0, 0x90, 0x88, 0x4A, 0xE0, 0xFF,
+0xA3, 0xE0, 0xC3, 0x9F, 0x90, 0x88, 0x4E, 0xF0,
+0x90, 0x88, 0x4B, 0xD1, 0xFC, 0x90, 0x88, 0x4E,
+0xB1, 0xF2, 0x40, 0x04, 0xEF, 0x24, 0x50, 0xF0,
+0x90, 0x88, 0x4E, 0xD1, 0xFC, 0x90, 0x88, 0x3E,
+0xB1, 0xF2, 0x40, 0x04, 0xEF, 0x24, 0x50, 0xF0,
+0x90, 0x88, 0x4E, 0x12, 0xAE, 0x23, 0xFF, 0x7E,
+0x00, 0x90, 0x88, 0x42, 0xEE, 0xF0, 0xA3, 0xEF,
+0xF0, 0x90, 0x05, 0x58, 0xF0, 0x90, 0x88, 0x4E,
+0xE0, 0x54, 0x07, 0xFF, 0x90, 0x05, 0xB1, 0xE0,
+0x54, 0xF8, 0x4F, 0xF0, 0xF1, 0x7E, 0x80, 0x07,
+0x90, 0x88, 0x33, 0xE0, 0x44, 0x01, 0xF0, 0xD0,
+0xD0, 0x92, 0xAF, 0x22, 0xE0, 0xFF, 0x24, 0x50,
+0xFD, 0xE4, 0x33, 0xFC, 0x22, 0x90, 0x00, 0x04,
+0x02, 0x03, 0x3E, 0x7D, 0x01, 0xAF, 0x62, 0x02,
+0x61, 0xF7, 0x93, 0xFD, 0x7C, 0x00, 0x02, 0x02,
+0x80, 0x24, 0x06, 0xF5, 0x82, 0xE4, 0x34, 0x8E,
+0x22, 0x24, 0x26, 0xF5, 0x82, 0xE4, 0x34, 0x8E,
+0x22, 0x24, 0x56, 0xF5, 0x82, 0xE4, 0x34, 0x8E,
+0x22, 0xE5, 0x64, 0x90, 0x81, 0x9D, 0x93, 0xFF,
+0x22, 0x90, 0x95, 0x47, 0xE0, 0xFE, 0xA3, 0xE0,
+0x22, 0x74, 0xA6, 0x25, 0x62, 0xF5, 0x82, 0xE4,
+0x34, 0x8E, 0xF5, 0x83, 0x22, 0x74, 0x5F, 0x25,
+0x62, 0xF5, 0x82, 0xE4, 0x34, 0x8D, 0xF5, 0x83,
+0x22, 0x74, 0xE6, 0x25, 0x62, 0xF5, 0x82, 0xE4,
+0x34, 0x8D, 0xF5, 0x83, 0x22, 0xE5, 0x62, 0x25,
+0xE0, 0x24, 0x86, 0xF5, 0x82, 0xE4, 0x34, 0x8E,
+0x22, 0x90, 0x00, 0x02, 0x02, 0x03, 0x3E, 0x12,
+0x86, 0x61, 0xD3, 0x02, 0x03, 0xDA, 0x90, 0x88,
+0x33, 0xE0, 0x54, 0xFE, 0xF0, 0x22, 0x75, 0xF0,
+0x02, 0xA4, 0xF5, 0x82, 0x85, 0xF0, 0x83, 0x02,
+0x03, 0x3E, 0x90, 0x86, 0xAD, 0xA3, 0xE0, 0x24,
+0x7F, 0xF5, 0x82, 0xE4, 0x34, 0x84, 0xF5, 0x83,
+0xE0, 0x22, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0,
+0xD0, 0xF1, 0x92, 0x90, 0x97, 0x08, 0xF0, 0xED,
+0x90, 0x00, 0x73, 0x70, 0x0D, 0xE0, 0x44, 0x04,
+0xF0, 0x90, 0x00, 0x67, 0xE0, 0x44, 0x80, 0xF0,
+0x80, 0x0B, 0xE0, 0x54, 0xFB, 0xF0, 0x90, 0x00,
+0x67, 0xE0, 0x54, 0x7F, 0xF0, 0xD0, 0xD0, 0x92,
+0xAF, 0x22, 0x90, 0x93, 0x58, 0xE0, 0x54, 0x7F,
+0xF0, 0x54, 0xBF, 0xF0, 0x54, 0xDF, 0xF0, 0x54,
+0xF0, 0xF0, 0xE4, 0x90, 0x93, 0x5A, 0xF0, 0x90,
+0x93, 0x58, 0xE0, 0x54, 0xEF, 0xF0, 0x22, 0xD3,
+0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0xE4, 0x90,
+0x95, 0xF2, 0xF0, 0x90, 0x95, 0xF0, 0x74, 0x14,
+0xF0, 0x90, 0x96, 0x12, 0x74, 0x01, 0xF0, 0xFB,
+0x7A, 0x95, 0x79, 0xF0, 0x12, 0x8A, 0x4D, 0x7F,
+0x04, 0x12, 0x04, 0x7E, 0xD0, 0xD0, 0x92, 0xAF,
+0x22, 0x90, 0x01, 0x94, 0xE0, 0x44, 0x01, 0xF0,
+0x90, 0x01, 0xC7, 0xE4, 0xF0, 0x22, 0x90, 0x01,
+0x95, 0xE0, 0x7F, 0x00, 0x30, 0xE4, 0x02, 0x7F,
+0x01, 0x22, 0x22, 0xD3, 0x10, 0xAF, 0x01, 0xC3,
 0xC0, 0xD0, 0xD0, 0xD0, 0x92, 0xAF, 0x22, 0x90,
 0x88, 0xB8, 0xE0, 0x54, 0xFE, 0xF0, 0x54, 0xE1,
 0xF0, 0x90, 0x88, 0xBD, 0xE0, 0xFF, 0x12, 0x71,
 0x9A, 0x90, 0x88, 0x36, 0xE0, 0x70, 0x0C, 0x12,
-0x8B, 0x92, 0x90, 0x8A, 0xF9, 0x12, 0x8D, 0x28,
-0x12, 0xA7, 0xB0, 0x22, 0x90, 0x88, 0x9D, 0xE0,
-0x30, 0xE0, 0x5E, 0x90, 0x94, 0xA2, 0xE0, 0x30,
-0xE0, 0x3D, 0x90, 0x94, 0xAD, 0xE0, 0xFF, 0x90,
-0x94, 0xAC, 0xE0, 0xC3, 0x9F, 0x40, 0x24, 0x31,
-0xB4, 0x90, 0x06, 0xC4, 0x31, 0xB2, 0x78, 0x08,
-0x12, 0x03, 0xEB, 0x90, 0x06, 0xC5, 0x31, 0xB2,
+0x8E, 0xAA, 0x90, 0x8A, 0xF9, 0x12, 0x8A, 0x5F,
+0x12, 0x97, 0xF1, 0x22, 0x90, 0x88, 0x9D, 0xE0,
+0x30, 0xE0, 0x5E, 0x90, 0x94, 0xA3, 0xE0, 0x30,
+0xE0, 0x3D, 0x90, 0x94, 0xAE, 0xE0, 0xFF, 0x90,
+0x94, 0xAD, 0xE0, 0xC3, 0x9F, 0x40, 0x24, 0x11,
+0xCC, 0x90, 0x06, 0xC4, 0x11, 0xCA, 0x78, 0x08,
+0x12, 0x03, 0xEB, 0x90, 0x06, 0xC5, 0x11, 0xCA,
 0x78, 0x10, 0x12, 0x03, 0xEB, 0x90, 0x06, 0xC6,
-0x31, 0xB2, 0x31, 0xBA, 0xE4, 0x90, 0x94, 0xAC,
-0xF0, 0x80, 0x1B, 0x31, 0xC5, 0x31, 0xBA, 0x90,
-0x94, 0xAC, 0xE0, 0x04, 0xF0, 0x80, 0x0F, 0x90,
-0x94, 0xAB, 0xE0, 0x60, 0x09, 0x31, 0xC5, 0x31,
-0xBA, 0xE4, 0x90, 0x94, 0xAB, 0xF0, 0x90, 0x8A,
-0xBB, 0x12, 0x8D, 0x28, 0xE4, 0xFF, 0x12, 0x04,
-0x7E, 0x22, 0xEF, 0xF0, 0x90, 0x94, 0xA3, 0x02,
+0x11, 0xCA, 0x11, 0xD2, 0xE4, 0x90, 0x94, 0xAD,
+0xF0, 0x80, 0x1B, 0x11, 0xDD, 0x11, 0xD2, 0x90,
+0x94, 0xAD, 0xE0, 0x04, 0xF0, 0x80, 0x0F, 0x90,
+0x94, 0xAC, 0xE0, 0x60, 0x09, 0x11, 0xDD, 0x11,
+0xD2, 0xE4, 0x90, 0x94, 0xAC, 0xF0, 0x90, 0x8A,
+0xBB, 0x12, 0x8A, 0x5F, 0xE4, 0xFF, 0x12, 0x04,
+0x7E, 0x22, 0xEF, 0xF0, 0x90, 0x94, 0xA4, 0x02,
 0x04, 0xB8, 0x78, 0x18, 0x12, 0x03, 0xEB, 0x90,
-0x06, 0xC7, 0xEF, 0xF0, 0x22, 0x90, 0x94, 0xA7,
+0x06, 0xC7, 0xEF, 0xF0, 0x22, 0x90, 0x94, 0xA8,
 0x12, 0x04, 0xB8, 0x90, 0x06, 0xC4, 0xEF, 0xF0,
-0x90, 0x94, 0xA7, 0x12, 0x04, 0xB8, 0x78, 0x08,
+0x90, 0x94, 0xA8, 0x12, 0x04, 0xB8, 0x78, 0x08,
 0x12, 0x03, 0xEB, 0x90, 0x06, 0xC5, 0xEF, 0xF0,
-0x90, 0x94, 0xA7, 0x12, 0x04, 0xB8, 0x78, 0x10,
+0x90, 0x94, 0xA8, 0x12, 0x04, 0xB8, 0x78, 0x10,
 0x12, 0x03, 0xEB, 0x90, 0x06, 0xC6, 0xEF, 0xF0,
-0x90, 0x94, 0xA7, 0x02, 0x04, 0xB8, 0x90, 0x96,
-0xDA, 0xEF, 0xF0, 0x90, 0x88, 0xB8, 0xE0, 0x44,
-0x01, 0xF0, 0x90, 0x8A, 0xF9, 0x12, 0x8D, 0x28,
-0x7D, 0x11, 0x51, 0x47, 0x12, 0x8B, 0x95, 0x90,
-0x07, 0x78, 0xE0, 0x90, 0x88, 0xBD, 0xF0, 0x90,
-0x96, 0xDA, 0xE0, 0xFD, 0x70, 0x02, 0x80, 0x1C,
-0xED, 0xB4, 0x01, 0x06, 0x51, 0x40, 0x44, 0x20,
-0xF0, 0x22, 0x90, 0x96, 0xDA, 0xE0, 0xFD, 0xB4,
-0x02, 0x06, 0x51, 0x40, 0x44, 0x60, 0xF0, 0x22,
-0xED, 0xB4, 0x03, 0x03, 0x51, 0x40, 0xF0, 0x22,
-0x90, 0x88, 0xB8, 0xE0, 0x54, 0x1F, 0x22, 0x7F,
-0xFF, 0x12, 0x04, 0x7E, 0x90, 0x8A, 0xEF, 0x22,
-0x90, 0x96, 0x82, 0x12, 0x86, 0x76, 0x90, 0x96,
-0x7E, 0x12, 0x86, 0x6D, 0x90, 0x96, 0x85, 0x12,
-0x86, 0x76, 0x90, 0x96, 0x81, 0xE0, 0x24, 0xFF,
-0xFF, 0xE4, 0x34, 0xFF, 0xFE, 0x90, 0x96, 0x83,
-0x8F, 0xF0, 0x12, 0x02, 0xE7, 0x90, 0x96, 0x86,
-0xEE, 0x8F, 0xF0, 0x12, 0x02, 0xE7, 0x90, 0x96,
-0x81, 0xE0, 0xD3, 0x94, 0x00, 0x40, 0x2E, 0x90,
-0x96, 0x85, 0x12, 0x86, 0x6D, 0x12, 0x02, 0x06,
-0xFF, 0x90, 0x96, 0x82, 0x12, 0x86, 0x6D, 0x12,
-0x02, 0x06, 0xFE, 0x6F, 0x60, 0x05, 0xC3, 0xEE,
-0x9F, 0xFF, 0x22, 0x90, 0x96, 0x83, 0x51, 0xB8,
-0x90, 0x96, 0x86, 0x51, 0xB8, 0x90, 0x96, 0x81,
-0xE0, 0x14, 0xF0, 0x80, 0xC9, 0x7F, 0x00, 0x22,
-0x74, 0xFF, 0xF5, 0xF0, 0x02, 0x02, 0xE7, 0x7D,
-0x07, 0xEF, 0x5D, 0xC3, 0x60, 0x0A, 0x51, 0xD4,
-0x24, 0x08, 0xFF, 0xE4, 0x3E, 0xFE, 0x80, 0x03,
-0x51, 0xD4, 0xFF, 0x22, 0x74, 0xFF, 0x9D, 0xFD,
-0x74, 0xFF, 0x94, 0x00, 0x5E, 0xFE, 0xED, 0x5F,
-0x22, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0,
-0x90, 0x88, 0x9D, 0xE0, 0x30, 0xE0, 0x10, 0x90,
-0x88, 0xA3, 0xE0, 0xC4, 0x13, 0x54, 0x07, 0x30,
-0xE0, 0x12, 0x75, 0x10, 0x10, 0x80, 0x3F, 0x12,
-0x7A, 0x65, 0xEF, 0x64, 0x01, 0x60, 0x05, 0x75,
-0x10, 0x01, 0x80, 0x32, 0x90, 0x88, 0x31, 0x12,
-0xA9, 0xBE, 0x30, 0xE0, 0x05, 0x75, 0x10, 0x02,
-0x80, 0x24, 0x90, 0x88, 0x38, 0xE0, 0xD3, 0x94,
-0x04, 0x40, 0x05, 0x75, 0x10, 0x08, 0x80, 0x16,
-0x90, 0x93, 0x29, 0xE0, 0x30, 0xE0, 0x0B, 0xC4,
-0x54, 0x0F, 0x30, 0xE0, 0x05, 0x75, 0x10, 0x11,
-0x80, 0x04, 0x71, 0x51, 0x80, 0x0E, 0x90, 0x01,
-0xB9, 0x74, 0x02, 0xF0, 0x90, 0x01, 0xB8, 0xE5,
-0x10, 0xF0, 0x7F, 0x00, 0xD0, 0xD0, 0x92, 0xAF,
-0x22, 0x90, 0x01, 0xB8, 0xE4, 0xF0, 0x7F, 0x01,
-0x22, 0x90, 0x02, 0x87, 0xE0, 0x60, 0x02, 0x80,
-0x08, 0x90, 0x01, 0x00, 0xE0, 0x64, 0x3F, 0x60,
-0x05, 0x75, 0x61, 0x01, 0x80, 0x2E, 0x90, 0x02,
-0x96, 0xE0, 0x60, 0x05, 0x75, 0x61, 0x10, 0x80,
-0x23, 0x90, 0x02, 0x86, 0xE0, 0x20, 0xE1, 0x02,
-0x80, 0x07, 0x90, 0x02, 0x86, 0xE0, 0x30, 0xE3,
-0x05, 0x75, 0x61, 0x04, 0x80, 0x0E, 0x90, 0x88,
-0xE6, 0xE0, 0x30, 0xE0, 0x05, 0x75, 0x61, 0x20,
-0x80, 0x02, 0x80, 0xB5, 0x90, 0x01, 0xB9, 0x74,
-0x08, 0xF0, 0x90, 0x01, 0xB8, 0xE5, 0x61, 0xF0,
-0x7F, 0x00, 0x22, 0xD3, 0x10, 0xAF, 0x01, 0xC3,
-0xC0, 0xD0, 0x90, 0x88, 0x9D, 0xE0, 0x30, 0xE0,
-0x1E, 0x90, 0x88, 0xAF, 0xE0, 0x60, 0x05, 0x75,
-0x11, 0x40, 0x81, 0x54, 0x90, 0x88, 0x38, 0xE0,
-0xD3, 0x94, 0x00, 0x40, 0x02, 0x80, 0x2D, 0x90,
-0x88, 0x9C, 0xE0, 0x60, 0x7B, 0x80, 0x55, 0x12,
-0x7A, 0x65, 0xEF, 0x64, 0x01, 0x60, 0x05, 0x75,
-0x11, 0x01, 0x80, 0x70, 0x90, 0x88, 0x3A, 0xE0,
-0xFF, 0x54, 0x03, 0x60, 0x05, 0x75, 0x11, 0x02,
-0x80, 0x62, 0x90, 0x88, 0x38, 0xE0, 0xFE, 0xE4,
-0xC3, 0x9E, 0x50, 0x05, 0x75, 0x11, 0x04, 0x80,
-0x53, 0xEF, 0x30, 0xE2, 0x05, 0x75, 0x11, 0x08,
-0x80, 0x4A, 0x90, 0x88, 0x3A, 0xE0, 0x30, 0xE4,
-0x05, 0x75, 0x11, 0x10, 0x80, 0x3E, 0x90, 0x88,
-0x32, 0xE0, 0x13, 0x13, 0x54, 0x3F, 0x20, 0xE0,
-0x05, 0x75, 0x11, 0x20, 0x80, 0x2E, 0x90, 0x88,
-0x9C, 0xE0, 0x60, 0x05, 0x75, 0x11, 0x80, 0x80,
-0x23, 0x90, 0x06, 0x62, 0xE0, 0x30, 0xE1, 0x05,
-0x75, 0x11, 0x11, 0x80, 0x17, 0x90, 0x06, 0x62,
-0xE0, 0x30, 0xE0, 0x0C, 0xE0, 0x54, 0xFC, 0xFF,
-0xBF, 0x80, 0x05, 0x75, 0x11, 0x12, 0x80, 0x04,
-0x71, 0x51, 0x80, 0x0E, 0x90, 0x01, 0xB9, 0x74,
-0x04, 0xF0, 0x90, 0x01, 0xB8, 0xE5, 0x11, 0xF0,
-0x7F, 0x00, 0xD0, 0xD0, 0x92, 0xAF, 0x22, 0xD3,
-0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0x12, 0xB7,
-0x91, 0x90, 0x96, 0xDE, 0xF0, 0x90, 0x88, 0x32,
-0x12, 0x9D, 0xCF, 0x30, 0xE0, 0x02, 0xA1, 0x30,
-0x90, 0x88, 0x31, 0xE0, 0x30, 0xE0, 0x1F, 0x90,
-0x88, 0x53, 0xE0, 0x24, 0x04, 0x33, 0x33, 0x33,
-0x54, 0xF8, 0x90, 0x88, 0x4B, 0xF0, 0x90, 0x88,
-0x53, 0xE0, 0x04, 0x33, 0x33, 0x33, 0x54, 0xF8,
-0x90, 0x88, 0x4A, 0xF0, 0x80, 0x10, 0x90, 0x88,
-0x4B, 0x74, 0x10, 0xF0, 0x90, 0x88, 0x4A, 0x74,
-0x08, 0xF0, 0x74, 0x10, 0x2B, 0xFB, 0x90, 0x88,
-0x4A, 0xE0, 0xFE, 0x90, 0x88, 0x49, 0xE0, 0xD3,
-0x9E, 0x50, 0x0E, 0x90, 0x88, 0x3E, 0xEB, 0xF0,
-0x90, 0x88, 0x4B, 0xE0, 0xC3, 0x9D, 0x2F, 0x80,
-0x11, 0xC3, 0xED, 0x9E, 0x2B, 0x90, 0x88, 0x3E,
-0xF0, 0x90, 0x88, 0x4A, 0xE0, 0xFF, 0xA3, 0xE0,
-0xC3, 0x9F, 0x90, 0x88, 0x4E, 0xF0, 0x90, 0x88,
-0x4B, 0xB1, 0x3C, 0x90, 0x88, 0x4E, 0x12, 0xD6,
-0xEB, 0x40, 0x04, 0xEF, 0x24, 0x50, 0xF0, 0x90,
-0x88, 0x4E, 0xB1, 0x3C, 0x90, 0x88, 0x3E, 0x12,
-0xD6, 0xEB, 0x40, 0x04, 0xEF, 0x24, 0x50, 0xF0,
-0x90, 0x88, 0x4E, 0x12, 0xA9, 0xBE, 0xFF, 0x7E,
-0x00, 0x90, 0x88, 0x42, 0xEE, 0xF0, 0xA3, 0xEF,
-0xF0, 0x90, 0x05, 0x58, 0xF0, 0x90, 0x88, 0x4E,
-0xE0, 0x54, 0x07, 0xFF, 0x90, 0x05, 0xB1, 0xE0,
-0x54, 0xF8, 0x4F, 0xF0, 0xB1, 0x45, 0x80, 0x07,
-0x90, 0x88, 0x33, 0xE0, 0x44, 0x01, 0xF0, 0xD0,
-0xD0, 0x92, 0xAF, 0x22, 0xE0, 0xFF, 0x24, 0x50,
-0xFD, 0xE4, 0x33, 0xFC, 0x22, 0x90, 0x88, 0x33,
-0xE0, 0x54, 0xFE, 0xF0, 0x22, 0xE0, 0xFF, 0x24,
-0x35, 0xF5, 0x82, 0xE4, 0x34, 0x93, 0xF5, 0x83,
-0xE0, 0x90, 0x01, 0xB2, 0xF0, 0x74, 0x3A, 0x2F,
-0xF5, 0x82, 0xE4, 0x34, 0x93, 0xF5, 0x83, 0xE0,
-0x90, 0x01, 0xB3, 0xF0, 0xE0, 0x22, 0xE0, 0xFF,
-0x24, 0x3F, 0xF5, 0x82, 0xE4, 0x34, 0x93, 0xF5,
-0x83, 0xE0, 0x90, 0x01, 0xB0, 0xF0, 0x74, 0x44,
-0x2F, 0xF5, 0x82, 0xE4, 0x34, 0x93, 0xF5, 0x83,
-0xE0, 0x90, 0x01, 0xB1, 0xF0, 0x22, 0xE0, 0x54,
+0x90, 0x94, 0xA8, 0x02, 0x04, 0xB8, 0x7E, 0x00,
+0x7F, 0x33, 0x7D, 0x00, 0x7B, 0x01, 0x7A, 0x88,
+0x79, 0x9D, 0x12, 0x04, 0x80, 0x90, 0x88, 0x9E,
+0x74, 0x0B, 0xF0, 0xA3, 0x74, 0x08, 0x51, 0x1C,
+0x7A, 0x94, 0x79, 0xA3, 0x12, 0x04, 0x80, 0x90,
+0x86, 0xB3, 0xE0, 0xFC, 0x64, 0x02, 0x70, 0x15,
+0x51, 0x15, 0x30, 0xE2, 0x02, 0x7E, 0x01, 0xEE,
+0x12, 0xB6, 0x85, 0xFE, 0x90, 0x88, 0xA0, 0xE0,
+0x54, 0xBF, 0x4E, 0xF0, 0x22, 0xEC, 0x64, 0x01,
+0x70, 0x09, 0x51, 0x0C, 0x30, 0xE2, 0x02, 0x7F,
+0x01, 0x80, 0x0F, 0x90, 0x86, 0xB3, 0xE0, 0x64,
+0x03, 0x70, 0x14, 0x31, 0x7A, 0x30, 0xE2, 0x02,
+0x7F, 0x01, 0xEF, 0x12, 0xB6, 0x85, 0xFF, 0x90,
+0x88, 0xA0, 0xE0, 0x54, 0xBF, 0x4F, 0xF0, 0x22,
+0xEF, 0xF0, 0x90, 0xFD, 0x78, 0xE0, 0x7F, 0x00,
+0x22, 0x90, 0x93, 0x2A, 0x12, 0xB7, 0xBC, 0x54,
+0xEF, 0xF0, 0x44, 0x08, 0xF0, 0x90, 0x86, 0xB3,
+0xE0, 0xFF, 0x64, 0x02, 0x70, 0x29, 0x51, 0x15,
+0x30, 0xE0, 0x02, 0x7E, 0x01, 0x90, 0x93, 0x30,
+0x51, 0x13, 0x30, 0xE1, 0x02, 0x7E, 0x01, 0x90,
+0x93, 0x2E, 0x51, 0x13, 0x30, 0xE2, 0x02, 0x7E,
+0x01, 0x90, 0x93, 0x2F, 0xEE, 0xF0, 0x90, 0xFD,
+0x80, 0xE0, 0x90, 0x02, 0xFB, 0xF0, 0x22, 0xEF,
+0x64, 0x01, 0x70, 0x1D, 0x51, 0x0C, 0x30, 0xE0,
+0x02, 0x7F, 0x01, 0x90, 0x93, 0x30, 0x51, 0x0A,
+0x30, 0xE1, 0x02, 0x7F, 0x01, 0x90, 0x93, 0x2E,
+0x51, 0x0A, 0x30, 0xE2, 0x02, 0x7F, 0x01, 0x80,
+0x23, 0x90, 0x86, 0xB3, 0xE0, 0x64, 0x03, 0x70,
+0x20, 0x31, 0x7A, 0x30, 0xE0, 0x02, 0x7F, 0x01,
+0x90, 0x93, 0x30, 0x31, 0x78, 0x30, 0xE1, 0x02,
+0x7F, 0x01, 0x90, 0x93, 0x2E, 0x31, 0x78, 0x30,
+0xE2, 0x02, 0x7F, 0x01, 0x90, 0x93, 0x2F, 0xEF,
+0xF0, 0x22, 0xEF, 0xF0, 0x90, 0xFD, 0x70, 0xE0,
+0x7F, 0x00, 0x22, 0xEE, 0xF0, 0x90, 0xFD, 0x80,
+0xE0, 0x7E, 0x00, 0x22, 0xF0, 0x7E, 0x00, 0x7F,
+0x18, 0x7D, 0x00, 0x7B, 0x01, 0x22, 0x7E, 0x00,
+0x7F, 0x62, 0x7D, 0x00, 0x7B, 0x01, 0x7A, 0x88,
+0x79, 0x31, 0x12, 0x04, 0x80, 0xE4, 0x90, 0x94,
+0xA2, 0xF0, 0x90, 0x88, 0x35, 0x74, 0x02, 0xF0,
+0x90, 0x88, 0x3C, 0x14, 0xF0, 0xA3, 0xF0, 0xA3,
+0x74, 0x50, 0xF0, 0x90, 0x88, 0x42, 0xE4, 0xF0,
+0xA3, 0x74, 0x02, 0xF0, 0x90, 0x88, 0x4E, 0x74,
+0x10, 0xF0, 0xA3, 0x74, 0x50, 0xF0, 0x71, 0x09,
+0x90, 0x8A, 0x89, 0x12, 0x8A, 0x5F, 0x12, 0x97,
+0xF1, 0x90, 0x8A, 0x89, 0x12, 0x8A, 0x5F, 0x7D,
+0x0C, 0x7F, 0x02, 0x12, 0x04, 0x7E, 0x90, 0x8A,
+0x89, 0x12, 0x8A, 0x5F, 0x12, 0x8F, 0xCF, 0x90,
+0x86, 0xB3, 0xE0, 0xFF, 0xB4, 0x01, 0x08, 0x90,
+0x88, 0x41, 0x74, 0xDD, 0xF0, 0x80, 0x11, 0xEF,
+0xB4, 0x03, 0x08, 0x90, 0x88, 0x41, 0x74, 0x14,
+0xF0, 0x80, 0x05, 0xE4, 0x90, 0x88, 0x41, 0xF0,
+0x90, 0x00, 0x79, 0xE0, 0x54, 0x03, 0xFF, 0xBF,
+0x02, 0x0D, 0x90, 0x00, 0x28, 0xE0, 0x30, 0xE2,
+0x06, 0x90, 0x88, 0x53, 0x74, 0x02, 0xF0, 0x90,
+0x88, 0x93, 0x74, 0x02, 0xF0, 0xA3, 0x74, 0x0F,
+0xF0, 0xA3, 0xE0, 0x54, 0x01, 0x44, 0x28, 0xF0,
+0xA3, 0x74, 0x07, 0x51, 0x1C, 0x7A, 0x93, 0x79,
+0x32, 0x12, 0x04, 0x80, 0x90, 0x8A, 0xA3, 0x12,
+0x8A, 0x5F, 0x7F, 0x01, 0x12, 0x04, 0x7E, 0x7E,
+0x00, 0x7F, 0x02, 0x7D, 0x00, 0x7B, 0x01, 0x7A,
+0x88, 0x79, 0x9A, 0x12, 0x04, 0x80, 0x71, 0x01,
+0x90, 0x06, 0x0A, 0xE0, 0x54, 0xF8, 0xF0, 0x90,
+0x05, 0x22, 0xE4, 0xF0, 0x90, 0x88, 0x9C, 0xF0,
+0x22, 0x90, 0x06, 0x04, 0xE0, 0x54, 0x7F, 0xF0,
+0x22, 0x90, 0x88, 0x8D, 0x74, 0x18, 0xF0, 0xA3,
+0xF0, 0xA3, 0xE4, 0xF0, 0xA3, 0x74, 0x64, 0xF0,
+0xA3, 0x74, 0x05, 0xF0, 0xA3, 0xF0, 0x22, 0x90,
+0x97, 0x09, 0xEF, 0xF0, 0x90, 0x88, 0xB8, 0xE0,
+0x44, 0x01, 0xF0, 0x90, 0x8A, 0xF9, 0x12, 0x8A,
+0x5F, 0x7D, 0x11, 0x71, 0x70, 0x12, 0x8E, 0xAD,
+0x90, 0x07, 0x78, 0xE0, 0x90, 0x88, 0xBD, 0xF0,
+0x90, 0x97, 0x09, 0xE0, 0xFD, 0x70, 0x02, 0x80,
+0x1C, 0xED, 0xB4, 0x01, 0x06, 0x71, 0x69, 0x44,
+0x20, 0xF0, 0x22, 0x90, 0x97, 0x09, 0xE0, 0xFD,
+0xB4, 0x02, 0x06, 0x71, 0x69, 0x44, 0x60, 0xF0,
+0x22, 0xED, 0xB4, 0x03, 0x03, 0x71, 0x69, 0xF0,
+0x22, 0x90, 0x88, 0xB8, 0xE0, 0x54, 0x1F, 0x22,
+0x7F, 0xFF, 0x12, 0x04, 0x7E, 0x90, 0x8A, 0xEF,
+0x22, 0xEF, 0x64, 0x39, 0x70, 0x5D, 0x90, 0x01,
+0x63, 0xF0, 0x90, 0x01, 0x3C, 0x74, 0x10, 0xF0,
+0x90, 0x88, 0x9D, 0xE0, 0x30, 0xE0, 0x4C, 0x12,
+0xBF, 0x86, 0x30, 0xE0, 0x46, 0x90, 0x88, 0xC2,
+0xE0, 0xFF, 0xC4, 0x54, 0x0F, 0x30, 0xE0, 0x3B,
+0x90, 0x94, 0xB5, 0xE0, 0x04, 0xF0, 0x71, 0xDC,
+0x30, 0xE0, 0x11, 0xEE, 0x13, 0x13, 0x13, 0x54,
+0x1F, 0x30, 0xE0, 0x08, 0xEF, 0x54, 0xEF, 0x90,
+0x88, 0xC2, 0xF0, 0x22, 0x90, 0x88, 0xB0, 0xE0,
+0x70, 0x19, 0x12, 0xBF, 0x94, 0x90, 0x88, 0x9D,
+0xE0, 0x30, 0xE0, 0x0F, 0x12, 0xBF, 0x86, 0x30,
+0xE0, 0x09, 0x90, 0x8A, 0xBB, 0x12, 0x8A, 0x5F,
+0x12, 0xBF, 0x8F, 0x22, 0x90, 0x94, 0xAF, 0xE0,
+0xFE, 0x13, 0x13, 0x54, 0x3F, 0x22, 0x90, 0x88,
+0x9D, 0xE0, 0x20, 0xE0, 0x02, 0x81, 0xAB, 0x90,
+0x8A, 0xB1, 0x12, 0x8E, 0xAD, 0x90, 0x88, 0xB0,
+0xE0, 0xFF, 0xB4, 0x01, 0x02, 0x80, 0x22, 0x90,
+0x88, 0xB0, 0xE0, 0xFF, 0xB4, 0x02, 0x05, 0x90,
+0x8A, 0xC1, 0x80, 0x18, 0x90, 0x88, 0xB0, 0xE0,
+0xFF, 0xB4, 0x03, 0x05, 0x90, 0x8A, 0xBB, 0x80,
+0x0B, 0x90, 0x88, 0xB0, 0xE0, 0xFF, 0xB4, 0x04,
+0x09, 0x90, 0x8A, 0xBD, 0x12, 0xA5, 0xDE, 0x02,
+0x04, 0x7E, 0x90, 0x88, 0xB0, 0xE0, 0xFF, 0x64,
+0x05, 0x70, 0x78, 0x90, 0x94, 0xB7, 0xE0, 0x20,
+0xE0, 0x66, 0x90, 0x88, 0x9D, 0xE0, 0xFE, 0xC4,
+0x54, 0x0F, 0x20, 0xE0, 0x0A, 0xEE, 0xC4, 0x13,
+0x54, 0x07, 0x30, 0xE0, 0x02, 0x80, 0x51, 0x91,
+0xB4, 0x70, 0x0E, 0x90, 0x01, 0x34, 0x74, 0x08,
+0xF0, 0xFD, 0xE4, 0xFF, 0x12, 0x7C, 0x74, 0x80,
+0x16, 0x90, 0x94, 0xB8, 0xE0, 0x60, 0x2B, 0x91,
+0xB4, 0xC3, 0x94, 0x05, 0x50, 0x24, 0xE4, 0xA3,
+0xF0, 0x90, 0x94, 0xBA, 0xE0, 0x04, 0xF0, 0x90,
+0x8A, 0xD1, 0x12, 0x8A, 0x5F, 0x7F, 0x05, 0x91,
+0xAC, 0xFF, 0xC3, 0x13, 0xFE, 0xEF, 0x54, 0x01,
+0xFF, 0xEE, 0x04, 0x54, 0x7F, 0x25, 0xE0, 0x4F,
+0xF0, 0x22, 0x12, 0x9F, 0xBF, 0x90, 0x01, 0x34,
+0x74, 0x08, 0xF0, 0x90, 0x88, 0xB0, 0xE0, 0xFF,
+0x90, 0x8A, 0xC1, 0x12, 0xA5, 0xDE, 0x91, 0xAC,
+0x54, 0x01, 0xF0, 0x22, 0x12, 0x04, 0x7E, 0x90,
+0x94, 0xB7, 0xE0, 0x22, 0x90, 0x94, 0xB7, 0xE0,
+0xC3, 0x13, 0x54, 0x7F, 0x22, 0x90, 0x96, 0xB1,
+0x12, 0x86, 0x76, 0x90, 0x96, 0xAD, 0x12, 0x86,
+0x6D, 0x90, 0x96, 0xB4, 0x12, 0x86, 0x76, 0x90,
+0x96, 0xB0, 0xE0, 0x24, 0xFF, 0xFF, 0xE4, 0x34,
+0xFF, 0xFE, 0x90, 0x96, 0xB2, 0x8F, 0xF0, 0x12,
+0x02, 0xE7, 0x90, 0x96, 0xB5, 0xEE, 0x8F, 0xF0,
+0x12, 0x02, 0xE7, 0x90, 0x96, 0xB0, 0xE0, 0xD3,
+0x94, 0x00, 0x40, 0x2E, 0x90, 0x96, 0xB4, 0x12,
+0x86, 0x6D, 0x12, 0x02, 0x06, 0xFF, 0x90, 0x96,
+0xB1, 0x12, 0x86, 0x6D, 0x12, 0x02, 0x06, 0xFE,
+0x6F, 0x60, 0x05, 0xC3, 0xEE, 0x9F, 0xFF, 0x22,
+0x90, 0x96, 0xB2, 0xB1, 0x25, 0x90, 0x96, 0xB5,
+0xB1, 0x25, 0x90, 0x96, 0xB0, 0xE0, 0x14, 0xF0,
+0x80, 0xC9, 0x7F, 0x00, 0x22, 0x74, 0xFF, 0xF5,
+0xF0, 0x02, 0x02, 0xE7, 0x7D, 0x07, 0xEF, 0x5D,
+0xC3, 0x60, 0x0A, 0xB1, 0x41, 0x24, 0x08, 0xFF,
+0xE4, 0x3E, 0xFE, 0x80, 0x03, 0xB1, 0x41, 0xFF,
+0x22, 0x74, 0xFF, 0x9D, 0xFD, 0x74, 0xFF, 0x94,
+0x00, 0x5E, 0xFE, 0xED, 0x5F, 0x22, 0xD3, 0x10,
+0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0x90, 0x88, 0x9D,
+0xE0, 0x30, 0xE0, 0x1E, 0x90, 0x88, 0xAF, 0xE0,
+0x60, 0x05, 0x75, 0x11, 0x40, 0xA1, 0xF8, 0x90,
+0x88, 0x38, 0xE0, 0xD3, 0x94, 0x00, 0x40, 0x02,
+0x80, 0x2D, 0x90, 0x88, 0x9C, 0xE0, 0x60, 0x7B,
+0x80, 0x55, 0x12, 0x7A, 0x65, 0xEF, 0x64, 0x01,
+0x60, 0x05, 0x75, 0x11, 0x01, 0x80, 0x71, 0x90,
+0x88, 0x3A, 0xE0, 0xFF, 0x54, 0x03, 0x60, 0x05,
+0x75, 0x11, 0x02, 0x80, 0x63, 0x90, 0x88, 0x38,
+0xE0, 0xFE, 0xE4, 0xC3, 0x9E, 0x50, 0x05, 0x75,
+0x11, 0x04, 0x80, 0x54, 0xEF, 0x30, 0xE2, 0x05,
+0x75, 0x11, 0x08, 0x80, 0x4B, 0x90, 0x88, 0x3A,
+0xE0, 0x30, 0xE4, 0x05, 0x75, 0x11, 0x10, 0x80,
+0x3F, 0x90, 0x88, 0x32, 0xE0, 0x13, 0x13, 0x54,
+0x3F, 0x20, 0xE0, 0x05, 0x75, 0x11, 0x20, 0x80,
+0x2F, 0x90, 0x88, 0x9C, 0xE0, 0x60, 0x05, 0x75,
+0x11, 0x80, 0x80, 0x24, 0x90, 0x06, 0x62, 0xE0,
+0x30, 0xE1, 0x05, 0x75, 0x11, 0x11, 0x80, 0x18,
+0x90, 0x06, 0x62, 0xE0, 0x30, 0xE0, 0x0C, 0xE0,
+0x54, 0xFC, 0xFF, 0xBF, 0x80, 0x05, 0x75, 0x11,
+0x12, 0x80, 0x05, 0x12, 0xC3, 0xA4, 0x80, 0x0E,
+0x90, 0x01, 0xB9, 0x74, 0x04, 0xF0, 0x90, 0x01,
+0xB8, 0xE5, 0x11, 0xF0, 0x7F, 0x00, 0xD0, 0xD0,
+0x92, 0xAF, 0x22, 0xD3, 0x10, 0xAF, 0x01, 0xC3,
+0xC0, 0xD0, 0x90, 0x97, 0x0C, 0xED, 0xF0, 0x90,
+0x88, 0x31, 0xE0, 0xFE, 0xC4, 0x13, 0x13, 0x54,
+0x03, 0x30, 0xE0, 0x02, 0xE1, 0x85, 0xEE, 0x12,
+0x8D, 0x35, 0x30, 0xE0, 0x02, 0xE1, 0x85, 0x90,
+0x88, 0x39, 0xE0, 0xFE, 0x6F, 0x70, 0x02, 0xE1,
+0x85, 0xEF, 0x70, 0x02, 0xC1, 0xDC, 0x24, 0xFE,
+0x70, 0x02, 0xE1, 0x24, 0x24, 0xFE, 0x60, 0x50,
+0x24, 0xFC, 0x70, 0x02, 0xE1, 0x6B, 0x24, 0xFC,
+0x60, 0x02, 0xE1, 0x7E, 0xEE, 0xB4, 0x0E, 0x03,
+0x12, 0x71, 0x5F, 0x90, 0x88, 0x39, 0xE0, 0x70,
+0x05, 0x7F, 0x01, 0x12, 0x78, 0xC0, 0x90, 0x88,
+0x39, 0xE0, 0xB4, 0x06, 0x03, 0x12, 0x71, 0x24,
+0x90, 0x88, 0x39, 0xE0, 0xB4, 0x04, 0x12, 0x90,
+0x97, 0x0C, 0xE0, 0xFF, 0x60, 0x05, 0x12, 0x67,
+0x80, 0x80, 0x06, 0x90, 0x8A, 0xED, 0x12, 0x8E,
+0xAD, 0x90, 0x88, 0x39, 0xE0, 0x64, 0x08, 0x60,
+0x02, 0xE1, 0x7E, 0x12, 0x7B, 0xCC, 0xE1, 0x7E,
+0x90, 0x88, 0x39, 0xE0, 0x70, 0x05, 0x7F, 0x01,
+0x12, 0x78, 0xC0, 0x90, 0x88, 0x39, 0xE0, 0xB4,
+0x06, 0x03, 0x12, 0x71, 0x24, 0x90, 0x88, 0x39,
+0xE0, 0xB4, 0x0E, 0x0C, 0x90, 0x86, 0x00, 0x12,
+0x8E, 0xAD, 0xBF, 0x01, 0x03, 0x12, 0x71, 0x5F,
+0x90, 0x88, 0x39, 0xE0, 0x64, 0x0C, 0x60, 0x02,
+0xE1, 0x7E, 0x90, 0x86, 0x00, 0x12, 0x8E, 0xAD,
+0xEF, 0x64, 0x01, 0x60, 0x02, 0xE1, 0x7E, 0x12,
+0x68, 0xC2, 0xE1, 0x7E, 0x90, 0x88, 0x39, 0xE0,
+0xB4, 0x0E, 0x0C, 0x90, 0x86, 0x00, 0x12, 0x8E,
+0xAD, 0xBF, 0x01, 0x03, 0x12, 0x71, 0x5F, 0x90,
+0x88, 0x39, 0xE0, 0xB4, 0x06, 0x03, 0x12, 0x71,
+0x24, 0x90, 0x88, 0x39, 0xE0, 0xB4, 0x0C, 0x0C,
+0x90, 0x86, 0x00, 0x12, 0x8E, 0xAD, 0xBF, 0x01,
+0x03, 0x12, 0x68, 0xC2, 0x90, 0x88, 0x39, 0xE0,
+0x64, 0x04, 0x70, 0x6A, 0x90, 0x86, 0x02, 0x12,
+0x8E, 0xAD, 0xEF, 0x64, 0x01, 0x70, 0x5F, 0x12,
+0x73, 0x5A, 0x80, 0x5A, 0x90, 0x88, 0x39, 0xE0,
+0xB4, 0x0E, 0x0C, 0x90, 0x86, 0x00, 0x12, 0x8E,
+0xAD, 0xBF, 0x01, 0x03, 0x12, 0x71, 0x5F, 0x90,
+0x88, 0x39, 0xE0, 0xB4, 0x06, 0x03, 0x12, 0x71,
+0x24, 0x90, 0x88, 0x39, 0xE0, 0xB4, 0x0C, 0x0C,
+0x90, 0x86, 0x00, 0x12, 0x8E, 0xAD, 0xBF, 0x01,
+0x03, 0x12, 0x68, 0xC2, 0x90, 0x88, 0x39, 0xE0,
+0x70, 0x05, 0x7F, 0x01, 0x12, 0x78, 0xC0, 0x90,
+0x88, 0x39, 0xE0, 0xB4, 0x04, 0x18, 0x12, 0x7A,
+0x49, 0x80, 0x13, 0x90, 0x88, 0x39, 0xE0, 0xB4,
+0x0C, 0x0C, 0x90, 0x88, 0x32, 0x12, 0xAD, 0x2E,
+0x30, 0xE0, 0x03, 0x12, 0x79, 0xD4, 0x90, 0x88,
+0x39, 0x12, 0xB7, 0xE0, 0xF0, 0xD0, 0xD0, 0x92,
+0xAF, 0x22, 0xF1, 0xD2, 0x40, 0x3A, 0x90, 0x88,
+0x50, 0xE0, 0x04, 0xF0, 0x90, 0x88, 0x92, 0xE0,
+0xFF, 0x90, 0x88, 0x50, 0xE0, 0xD3, 0x9F, 0x50,
+0x27, 0x90, 0x88, 0x48, 0xE0, 0x24, 0x08, 0xF0,
+0x90, 0x88, 0x3F, 0x12, 0xAE, 0x2C, 0x33, 0x33,
+0x33, 0x54, 0xF8, 0xFF, 0x90, 0x88, 0x3E, 0xE0,
+0x2F, 0x90, 0x88, 0x4F, 0xF0, 0xFB, 0x90, 0x88,
+0x48, 0xE0, 0xFF, 0xA3, 0xE0, 0xFD, 0xF1, 0xC9,
+0x22, 0x90, 0x92, 0x98, 0x74, 0x03, 0xF0, 0x02,
+0x6E, 0x2F, 0x90, 0x88, 0x93, 0xE0, 0xFF, 0x90,
+0x88, 0x3F, 0xE0, 0xD3, 0x9F, 0x22, 0xE4, 0xFE,
+0x12, 0xAC, 0xF6, 0xE4, 0xF0, 0x74, 0x00, 0x2E,
+0x12, 0xAC, 0xEE, 0x74, 0xFF, 0xF0, 0x0E, 0xEE,
+0xB4, 0xA0, 0xED, 0xE4, 0x90, 0x88, 0x4D, 0xF0,
+0x90, 0x88, 0x4C, 0xF0, 0x90, 0x88, 0x50, 0xF0,
+0xEF, 0xB4, 0x01, 0x07, 0xA3, 0x74, 0xA0, 0xF0,
+0xE4, 0xA3, 0xF0, 0x22, 0x90, 0x93, 0x2A, 0xE0,
+0x30, 0xE0, 0x34, 0xC4, 0x13, 0x54, 0x07, 0x30,
+0xE0, 0x2D, 0x90, 0x97, 0x0E, 0xE0, 0x04, 0xF0,
+0xE0, 0xD3, 0x94, 0xC8, 0x40, 0x21, 0x90, 0x93,
+0x2A, 0xE0, 0x54, 0xDF, 0xF0, 0xE4, 0x90, 0x97,
+0x0E, 0xF0, 0x90, 0x93, 0x2A, 0xE0, 0x13, 0x30,
+0xE0, 0x0D, 0x90, 0x88, 0x31, 0xE0, 0x44, 0x01,
+0xF0, 0x90, 0x88, 0x41, 0x74, 0xD0, 0xF0, 0x22,
+0x90, 0x05, 0x63, 0xE0, 0x90, 0x88, 0x89, 0xF0,
+0x90, 0x05, 0x62, 0xE0, 0x90, 0x88, 0x8A, 0xF0,
+0x90, 0x05, 0x61, 0xE0, 0x90, 0x88, 0x8B, 0xF0,
+0x90, 0x05, 0x60, 0xE0, 0x90, 0x88, 0x8C, 0xF0,
+0x90, 0x88, 0x32, 0xE0, 0x44, 0x80, 0xF0, 0x22,
+0x78, 0x08, 0x12, 0x03, 0xFE, 0xA8, 0x04, 0xA9,
+0x05, 0xAA, 0x06, 0xAB, 0x07, 0x22, 0xE0, 0x54,
 0xFE, 0x4E, 0xFE, 0xF0, 0xEF, 0x54, 0x02, 0xFF,
-0xEE, 0x54, 0xFD, 0x4F, 0x22, 0x78, 0x08, 0x12,
-0x03, 0xFE, 0xA8, 0x04, 0xA9, 0x05, 0xAA, 0x06,
-0xAB, 0x07, 0x22, 0xE0, 0x90, 0x01, 0xBA, 0xF0,
-0x90, 0x88, 0x38, 0xE0, 0x90, 0x01, 0xBB, 0x22,
-0x90, 0x88, 0x9D, 0xE0, 0xC4, 0x54, 0x0F, 0x22,
-0xF0, 0xEE, 0x54, 0x08, 0xFE, 0xEF, 0x54, 0xF7,
-0x4E, 0xF0, 0x22, 0xF0, 0x90, 0x88, 0x9D, 0xE0,
-0xC4, 0x13, 0x54, 0x07, 0x22, 0x54, 0x20, 0xFD,
-0xEF, 0x54, 0xDF, 0x4D, 0xFF, 0x22, 0x54, 0x04,
-0xFD, 0xEF, 0x54, 0xFB, 0x4D, 0xFF, 0x22, 0xE4,
-0x90, 0x92, 0x20, 0xF0, 0x90, 0x88, 0x94, 0x22,
-0x90, 0x88, 0xA1, 0xE0, 0xC4, 0x13, 0x54, 0x07,
-0x22, 0xEF, 0xF0, 0xA3, 0xED, 0xF0, 0xA3, 0xEB,
-0xF0, 0x22, 0x8C, 0x83, 0xE4, 0xFD, 0x02, 0x04,
-0x7E, 0x90, 0x88, 0x31, 0xE0, 0x54, 0xF7, 0xF0,
-0x22, 0x90, 0x05, 0x00, 0x74, 0x1C, 0xF0, 0xA3,
-0x22, 0xF0, 0x24, 0x0A, 0x90, 0x88, 0xCF, 0xF0,
-0x22, 0x4D, 0xFF, 0x90, 0x88, 0x9D, 0xF0, 0xEE,
-0x22, 0x00, 0x8C, 0xC7
+0xEE, 0x54, 0xFD, 0x4F, 0x22, 0x74, 0xB6, 0x25,
+0x62, 0xF5, 0x82, 0xE4, 0x34, 0x8D, 0xF5, 0x83,
+0x22, 0x90, 0x88, 0xA1, 0xE0, 0xC4, 0x13, 0x54,
+0x07, 0x22, 0xEF, 0xF0, 0xA3, 0xED, 0xF0, 0xA3,
+0xEB, 0xF0, 0x22, 0x7D, 0x01, 0x7F, 0x02, 0x02,
+0x7C, 0x7E, 0x90, 0x88, 0x31, 0xE0, 0x54, 0xF7,
+0xF0, 0x22, 0x9A, 0x27
 };
 
-u32 array_length_mp_8723d_fw_ap = 24140;
+u32 array_length_mp_8723d_fw_ap = 24796;
 
 #endif /*defined(CONFIG_AP_WOWLAN) || (DM_ODM_SUPPORT_TYPE & (ODM_AP))*/
 
 #if (DM_ODM_SUPPORT_TYPE & (ODM_WIN)) || (DM_ODM_SUPPORT_TYPE & (ODM_CE))
 
 u8 array_mp_8723d_fw_nic[] = {
-0xD1, 0x23, 0x10, 0x00, 0x29, 0x00, 0x00, 0x00,
-0x01, 0x04, 0x08, 0x57, 0x94, 0x6C, 0x02, 0x00,
-0x6F, 0x5F, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+0xD1, 0x23, 0x10, 0x00, 0x2F, 0x00, 0x00, 0x00,
+0x12, 0x10, 0x17, 0x08, 0x5C, 0x6E, 0x02, 0x00,
+0xBE, 0x76, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 0x00, 0x00, 0x00, 0x00, 0x02, 0x86, 0x71, 0x00,
 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-0x00, 0x00, 0x00, 0x02, 0xDB, 0xB9, 0x00, 0x00,
+0x00, 0x00, 0x00, 0x02, 0xB6, 0xEF, 0x00, 0x00,
 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-0x00, 0x00, 0x00, 0x02, 0xE2, 0x17, 0x00, 0x00,
+0x00, 0x00, 0x00, 0x02, 0xD8, 0x4A, 0x00, 0x00,
 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-0x00, 0x00, 0x00, 0x02, 0xE1, 0x69, 0x00, 0x00,
-0x00, 0x00, 0x00, 0x02, 0xC9, 0x38, 0x00, 0x00,
-0x00, 0x00, 0x00, 0x02, 0xE1, 0xC1, 0x00, 0x00,
+0x00, 0x00, 0x00, 0x02, 0xD5, 0x03, 0x00, 0x00,
+0x00, 0x00, 0x00, 0x02, 0xD5, 0x5B, 0x00, 0x00,
+0x00, 0x00, 0x00, 0x02, 0xD7, 0xF4, 0x00, 0x00,
 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
@@ -3275,3281 +3357,3338 @@ u8 array_mp_8723d_fw_nic[] = {
 0xF8, 0xE4, 0x93, 0xA3, 0xC8, 0xC5, 0x82, 0xC8,
 0xCA, 0xC5, 0x83, 0xCA, 0xF0, 0xA3, 0xC8, 0xC5,
 0x82, 0xC8, 0xCA, 0xC5, 0x83, 0xCA, 0xDF, 0xE9,
-0xDE, 0xE7, 0x80, 0xBE, 0x41, 0x97, 0x40, 0x00,
-0x41, 0x97, 0x44, 0x00, 0x00, 0xD2, 0xD3, 0xDE,
-0x73, 0xDB, 0x45, 0x90, 0x97, 0x3F, 0xEF, 0xF0,
+0xDE, 0xE7, 0x80, 0xBE, 0x41, 0x97, 0x6D, 0x00,
+0x41, 0x97, 0x71, 0x00, 0x00, 0xC7, 0x52, 0xD1,
+0xDD, 0x8B, 0xE7, 0x90, 0x97, 0x6C, 0xEF, 0xF0,
 0x7F, 0x02, 0xB1, 0x27, 0x90, 0x86, 0xAF, 0xE0,
-0xFF, 0x90, 0x97, 0x3F, 0xE0, 0xFE, 0xEF, 0x4E,
+0xFF, 0x90, 0x97, 0x6C, 0xE0, 0xFE, 0xEF, 0x4E,
 0x90, 0x86, 0xAF, 0xF0, 0x22, 0x90, 0x02, 0x09,
 0xE0, 0xFD, 0x12, 0x02, 0x06, 0xFE, 0xAF, 0x05,
-0xED, 0x2E, 0x90, 0x86, 0xB4, 0xF0, 0xF1, 0xBC,
-0xFF, 0xED, 0x2F, 0x90, 0x86, 0xB5, 0xF0, 0xF1,
-0xB1, 0xFF, 0xED, 0x2F, 0x90, 0x86, 0xB6, 0xF1,
-0xA5, 0xFF, 0xED, 0x2F, 0x90, 0x86, 0xB7, 0xF1,
-0x75, 0xFF, 0xED, 0x2F, 0x90, 0x86, 0xB8, 0xF1,
-0x64, 0xFF, 0xED, 0x2F, 0x90, 0x86, 0xB9, 0xF1,
-0x6B, 0xFF, 0xAE, 0x05, 0xED, 0x2F, 0x90, 0x86,
-0xBA, 0xF0, 0x22, 0xFF, 0xF0, 0x90, 0x00, 0x05,
-0x02, 0x02, 0x1F, 0xF0, 0x90, 0x00, 0x06, 0x02,
+0xED, 0x2E, 0x90, 0x86, 0xB4, 0xF1, 0x69, 0xFF,
+0xED, 0x2F, 0x90, 0x86, 0xB5, 0xF1, 0x96, 0xFF,
+0xED, 0x2F, 0x90, 0x86, 0xB6, 0xF1, 0xFD, 0xFF,
+0xED, 0x2F, 0x90, 0x86, 0xB7, 0xF1, 0xF3, 0xFF,
+0xED, 0x2F, 0x90, 0x86, 0xB8, 0xF0, 0xF1, 0x63,
+0xFF, 0xED, 0x2F, 0x90, 0x86, 0xB9, 0x12, 0xA2,
+0x26, 0xFF, 0xAE, 0x05, 0xED, 0x2F, 0x90, 0x86,
+0xBA, 0xF0, 0x22, 0x90, 0x00, 0x05, 0x02, 0x02,
+0x1F, 0xF0, 0x90, 0x00, 0x01, 0x02, 0x02, 0x1F,
+0x12, 0xA2, 0x1F, 0x12, 0x02, 0x06, 0x90, 0x93,
+0x60, 0xF1, 0x69, 0x90, 0x93, 0x61, 0xF1, 0x96,
+0x90, 0x93, 0x7B, 0xF1, 0xFD, 0x90, 0x93, 0x7C,
+0xF1, 0xF3, 0x90, 0x93, 0x96, 0xF0, 0xF1, 0x63,
+0x90, 0x93, 0x97, 0xF0, 0x22, 0x4F, 0xF0, 0x90,
+0x00, 0x02, 0x02, 0x02, 0x1F, 0x12, 0xA7, 0x4E,
+0xFF, 0xF1, 0x6A, 0xFE, 0x54, 0x03, 0xFD, 0xEE,
+0x13, 0x13, 0x54, 0x07, 0xFB, 0xC0, 0x03, 0xF1,
+0xEB, 0xF1, 0x97, 0x54, 0x0F, 0x90, 0x97, 0x57,
+0xF0, 0xD0, 0x03, 0x12, 0xE5, 0xB8, 0xF1, 0xEB,
+0xF1, 0x6A, 0xFE, 0x54, 0x03, 0x12, 0x8D, 0x2C,
+0x90, 0x95, 0x57, 0x74, 0x10, 0xF0, 0x90, 0x95,
+0x79, 0x74, 0x07, 0xF1, 0xEA, 0x12, 0x02, 0x06,
+0x90, 0x95, 0x59, 0xF0, 0x7B, 0x01, 0x7A, 0x95,
+0x79, 0x57, 0x12, 0x90, 0x39, 0x7F, 0x04, 0x02,
+0x04, 0x7E, 0xF0, 0x90, 0x95, 0x54, 0xC1, 0x39,
+0xF5, 0x83, 0xEF, 0xF0, 0x90, 0x00, 0x04, 0x02,
 0x02, 0x1F, 0xF5, 0x83, 0xEF, 0xF0, 0x90, 0x00,
-0x04, 0x02, 0x02, 0x1F, 0x12, 0xB4, 0xE5, 0x12,
-0x02, 0x06, 0x90, 0x93, 0x60, 0xF0, 0xF1, 0xBC,
-0x90, 0x93, 0x61, 0xF0, 0xF1, 0xB1, 0x90, 0x93,
-0x7B, 0xF1, 0xA5, 0x90, 0x93, 0x7C, 0xF1, 0x75,
-0x90, 0x93, 0x96, 0xF1, 0x64, 0x90, 0x93, 0x97,
-0xF0, 0x22, 0xF5, 0x83, 0xEF, 0xF0, 0x90, 0x00,
-0x03, 0x02, 0x02, 0x1F, 0x90, 0x95, 0x4E, 0xD1,
-0x39, 0x90, 0x00, 0x02, 0x02, 0x02, 0x1F, 0x90,
-0x95, 0x4E, 0xD1, 0x39, 0x90, 0x00, 0x01, 0x02,
-0x02, 0x1F, 0x12, 0xB9, 0x00, 0x90, 0x93, 0x3B,
-0x12, 0xC9, 0x29, 0xF0, 0xF1, 0xBC, 0x90, 0x93,
-0x3C, 0xF0, 0xF1, 0xB1, 0x90, 0x93, 0x3D, 0xF0,
-0x12, 0xCD, 0xD0, 0x90, 0x93, 0x3B, 0xE0, 0x54,
-0x01, 0xFF, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0,
-0xD0, 0xEF, 0x64, 0x01, 0x70, 0x1D, 0x12, 0xEC,
-0x42, 0x60, 0x0B, 0x12, 0x88, 0x2E, 0x12, 0x7C,
-0x05, 0x12, 0xCD, 0x68, 0x80, 0x08, 0x11, 0x2E,
-0x12, 0x7C, 0x3B, 0x12, 0xCF, 0x15, 0x12, 0x79,
-0xD4, 0x80, 0x1A, 0x12, 0xEC, 0x42, 0x60, 0x07,
-0x11, 0x2E, 0x12, 0x7C, 0x05, 0x80, 0x05, 0x11,
-0x2E, 0x12, 0x7C, 0x3B, 0x12, 0xCD, 0x59, 0x12,
-0xEC, 0x3B, 0x12, 0x7B, 0xCC, 0xD0, 0xD0, 0x92,
-0xAF, 0x22, 0xF0, 0x90, 0x01, 0x3F, 0x74, 0x10,
-0xF0, 0xFD, 0x7F, 0x03, 0x22, 0xE4, 0x90, 0x95,
-0xE7, 0xF0, 0x12, 0xA7, 0x5E, 0x60, 0x02, 0x21,
-0x88, 0x90, 0x88, 0x36, 0xE0, 0x70, 0x02, 0x21,
-0x88, 0x90, 0x88, 0x2C, 0xE0, 0x20, 0xE0, 0x36,
-0x90, 0x88, 0x9D, 0xE0, 0x20, 0xE0, 0x2F, 0x90,
-0x06, 0xA9, 0xE0, 0x54, 0xC0, 0x70, 0x27, 0x90,
-0x88, 0x9C, 0xE0, 0x70, 0x21, 0x90, 0x04, 0x1A,
-0xE0, 0xF4, 0x70, 0x1A, 0xA3, 0xE0, 0x54, 0x07,
-0xFF, 0xBF, 0x07, 0x12, 0x90, 0x06, 0x62, 0xE0,
-0x54, 0x03, 0x70, 0x0A, 0x90, 0x88, 0x39, 0xE0,
-0xB4, 0x04, 0x03, 0x12, 0xE3, 0xAB, 0x90, 0x05,
-0x63, 0xE0, 0x90, 0x88, 0x85, 0xF0, 0x90, 0x05,
-0x62, 0xE0, 0x90, 0x88, 0x86, 0xF0, 0x90, 0x05,
-0x61, 0xE0, 0x90, 0x88, 0x87, 0xF0, 0x90, 0x05,
-0x60, 0xE0, 0x90, 0x88, 0x88, 0xF0, 0x90, 0x07,
-0xF1, 0xE0, 0x90, 0x95, 0x35, 0xF0, 0x90, 0x07,
-0xF0, 0xE0, 0x90, 0x95, 0x36, 0xF0, 0x12, 0xDD,
-0xB4, 0xF0, 0x90, 0x88, 0x3A, 0xE0, 0x54, 0xEC,
-0xF0, 0x31, 0xA4, 0x24, 0xFD, 0x50, 0x02, 0x80,
-0x0F, 0x90, 0x88, 0x2C, 0xE0, 0x30, 0xE0, 0x05,
-0x12, 0xB6, 0x0E, 0x80, 0x03, 0x12, 0xB6, 0x89,
-0x31, 0xA4, 0x64, 0x01, 0x70, 0x3A, 0x90, 0x06,
-0xAB, 0xE0, 0x90, 0x88, 0x3D, 0xF0, 0x90, 0x06,
-0xA9, 0xE0, 0x30, 0xE5, 0x06, 0xA3, 0xE0, 0x90,
-0x95, 0xE7, 0xF0, 0x90, 0x95, 0xE7, 0xE0, 0xFF,
-0x60, 0x02, 0x80, 0x05, 0x90, 0x88, 0x3C, 0xE0,
-0xFF, 0x90, 0x88, 0x3C, 0xEF, 0xF0, 0xA3, 0xE0,
-0xFF, 0x70, 0x08, 0x90, 0x88, 0x3C, 0xE0, 0xFE,
-0xFF, 0x80, 0x00, 0x90, 0x88, 0x3D, 0xEF, 0xF0,
-0x31, 0xAD, 0xE4, 0x90, 0x88, 0x3F, 0xF0, 0xA3,
-0xF0, 0x12, 0xB4, 0x39, 0x30, 0xE0, 0x5F, 0xEF,
-0xC4, 0x13, 0x13, 0x54, 0x03, 0x20, 0xE0, 0x25,
-0x31, 0x9C, 0x6F, 0x70, 0x51, 0xEF, 0x60, 0x4E,
-0x90, 0x88, 0x32, 0xE0, 0x44, 0x40, 0xF0, 0x12,
-0xEC, 0x4A, 0x11, 0x2A, 0x12, 0x7C, 0x05, 0x12,
-0xCF, 0x1C, 0x12, 0xEC, 0x34, 0x90, 0x88, 0x3D,
-0xE0, 0x14, 0xF0, 0x80, 0x31, 0x90, 0x88, 0x34,
-0xE0, 0xC4, 0x54, 0x0F, 0x64, 0x01, 0x70, 0x26,
-0x31, 0x9C, 0xFE, 0x6F, 0x60, 0x20, 0x90, 0x05,
-0x73, 0xE0, 0xFF, 0xEE, 0x6F, 0x60, 0x17, 0x90,
-0x88, 0x32, 0x12, 0xB7, 0xB7, 0x30, 0xE0, 0x0E,
-0xEF, 0x54, 0xBF, 0x11, 0x2A, 0x12, 0x7C, 0x3B,
-0x12, 0xEC, 0x3B, 0x12, 0xCD, 0x59, 0x31, 0x94,
-0x90, 0x88, 0x2C, 0xE0, 0xC3, 0x13, 0x20, 0xE0,
-0x02, 0x31, 0x94, 0x22, 0x90, 0x88, 0x32, 0xE0,
-0x44, 0x04, 0xF0, 0x22, 0x90, 0x88, 0x3C, 0xE0,
-0xFF, 0xA3, 0xE0, 0x22, 0x90, 0x88, 0x34, 0xE0,
-0xFF, 0xC4, 0x54, 0x0F, 0x22, 0x90, 0x88, 0x85,
-0x12, 0x04, 0xB8, 0xC0, 0x06, 0xC0, 0x07, 0x90,
-0x95, 0x36, 0xE0, 0x24, 0x46, 0xFF, 0x90, 0x95,
-0x35, 0xE0, 0x34, 0x00, 0xAB, 0x07, 0xFA, 0xE4,
-0xF9, 0xF8, 0xD0, 0x07, 0xD0, 0x06, 0x12, 0x85,
-0xB6, 0x90, 0x88, 0x85, 0x12, 0xEC, 0x0D, 0xEF,
-0x24, 0x46, 0x12, 0xEB, 0xE4, 0x90, 0x88, 0x89,
-0x12, 0xEC, 0x0D, 0x90, 0x88, 0x85, 0x12, 0xC7,
-0xD4, 0x50, 0x02, 0x41, 0xA3, 0x90, 0x88, 0x89,
-0x12, 0x86, 0x2D, 0x90, 0x88, 0x85, 0x12, 0x04,
-0xB8, 0x12, 0x85, 0xB6, 0x90, 0x95, 0xEC, 0x12,
-0x04, 0x31, 0x90, 0x88, 0x31, 0xE0, 0x30, 0xE0,
-0x30, 0x90, 0x88, 0x53, 0xE0, 0x24, 0x04, 0xFF,
-0xE4, 0x33, 0xFE, 0xEF, 0x78, 0x03, 0xC3, 0x33,
-0xCE, 0x33, 0xCE, 0xD8, 0xF9, 0x24, 0x50, 0xFF,
-0xE4, 0x3E, 0xFE, 0x90, 0x88, 0x4E, 0xE0, 0xFD,
-0xC3, 0xEF, 0x9D, 0xFB, 0xEE, 0x94, 0x00, 0xFA,
-0x12, 0xEB, 0xB5, 0xEB, 0x2F, 0xFF, 0xEA, 0x80,
-0x1F, 0x90, 0x88, 0x33, 0x12, 0xB7, 0xB7, 0x30,
-0xE0, 0x02, 0x61, 0xA2, 0x12, 0xEB, 0xB5, 0x90,
-0x88, 0x4E, 0xE0, 0xFD, 0xC3, 0x74, 0x60, 0x9D,
-0xCD, 0xE4, 0x94, 0x00, 0xCD, 0x2F, 0xFF, 0xED,
-0x3E, 0x90, 0x95, 0xE8, 0xF0, 0xA3, 0xEF, 0xF0,
-0xC3, 0x90, 0x95, 0xE9, 0xE0, 0x94, 0xA0, 0x90,
-0x95, 0xE8, 0xE0, 0x94, 0x00, 0x50, 0x34, 0xA3,
-0xE0, 0xFB, 0x24, 0xF5, 0x71, 0xB5, 0xE0, 0x04,
-0xF0, 0x90, 0x95, 0xEC, 0x12, 0x04, 0xB8, 0xEF,
-0x54, 0x7F, 0xFF, 0x74, 0x95, 0x2B, 0x71, 0xAA,
-0xE0, 0xFE, 0xEF, 0xC3, 0x9E, 0x50, 0x09, 0x90,
-0x95, 0xE8, 0xA3, 0xE0, 0x71, 0xA8, 0xEF, 0xF0,
-0x90, 0x88, 0x4C, 0xE0, 0x04, 0xF0, 0xE0, 0x90,
-0x00, 0xFE, 0xF0, 0x90, 0x88, 0x4C, 0xE0, 0xFF,
-0xD3, 0x90, 0x88, 0x90, 0xE0, 0x9F, 0x90, 0x88,
-0x8F, 0xE0, 0x94, 0x00, 0x40, 0x02, 0x61, 0xA2,
-0xE4, 0xFF, 0xFE, 0x71, 0xB2, 0xE0, 0x2F, 0xFF,
-0x90, 0x88, 0x91, 0xE0, 0xFD, 0xEF, 0xD3, 0x9D,
-0x40, 0x07, 0x90, 0x95, 0xEA, 0xEE, 0xF0, 0x80,
-0x05, 0x0E, 0xEE, 0xB4, 0xA0, 0xE5, 0x12, 0xEB,
-0x50, 0x40, 0x02, 0x80, 0x16, 0x90, 0x95, 0xEA,
-0xE0, 0x04, 0xFE, 0xEE, 0xC3, 0x94, 0xA0, 0x50,
-0x14, 0x71, 0xB2, 0xE0, 0x2F, 0xFF, 0x12, 0xEB,
-0x50, 0x40, 0x07, 0x90, 0x95, 0xEB, 0xEE, 0xF0,
-0x80, 0x03, 0x0E, 0x80, 0xE6, 0x90, 0x05, 0x5E,
-0xE0, 0xFF, 0x71, 0xA3, 0xE0, 0xFD, 0xEF, 0xC3,
-0x9D, 0x40, 0x11, 0xEF, 0x9D, 0x90, 0x05, 0x5E,
-0xF0, 0x90, 0x88, 0x51, 0xEE, 0xF0, 0x90, 0x95,
-0xEB, 0xE0, 0x80, 0x18, 0x71, 0xA3, 0xE0, 0xFD,
-0xC3, 0x74, 0x80, 0x9D, 0x2F, 0x90, 0x05, 0x5E,
-0xF0, 0xEE, 0x04, 0x90, 0x88, 0x51, 0xF0, 0x90,
-0x95, 0xEB, 0xE0, 0x04, 0x90, 0x88, 0x52, 0xF0,
-0x90, 0x88, 0x51, 0xE0, 0xFF, 0xC3, 0x94, 0x50,
-0x40, 0x0A, 0xEF, 0x24, 0xB0, 0x90, 0x88, 0x49,
-0xF0, 0xE4, 0x80, 0x0E, 0xE4, 0x90, 0x88, 0x49,
-0xF0, 0x90, 0x88, 0x51, 0xE0, 0xFF, 0xC3, 0x74,
-0x50, 0x9F, 0x90, 0x88, 0x48, 0xF0, 0x90, 0x88,
-0x51, 0xE0, 0xFF, 0xA3, 0xE0, 0xC3, 0x9F, 0x90,
-0x88, 0x4F, 0xF0, 0x90, 0x88, 0x31, 0xE0, 0x90,
-0x88, 0x8E, 0xE0, 0x24, 0x08, 0xFF, 0x90, 0x88,
-0x4F, 0xE0, 0x2F, 0xF0, 0x90, 0x88, 0x4F, 0xE0,
-0xC3, 0x94, 0x50, 0x50, 0x03, 0x74, 0x50, 0xF0,
-0x90, 0x88, 0x4F, 0xE0, 0x24, 0x10, 0xF0, 0x12,
-0xCD, 0xF4, 0x74, 0x03, 0xF0, 0x12, 0x6E, 0x2F,
-0x90, 0x8A, 0xA3, 0x71, 0xCF, 0xE4, 0xFF, 0x12,
-0x04, 0x7E, 0x22, 0x90, 0x95, 0xEA, 0xE0, 0xFE,
-0x24, 0x95, 0xF5, 0x82, 0xE4, 0x34, 0x94, 0xF5,
-0x83, 0x22, 0x74, 0xF5, 0x2E, 0xF5, 0x82, 0xE4,
-0x34, 0x93, 0xF5, 0x83, 0x22, 0x90, 0x8A, 0x77,
-0xE0, 0xFE, 0xA3, 0xE0, 0xFF, 0xF5, 0x82, 0x8E,
-0x83, 0x12, 0x04, 0x7E, 0x90, 0x8A, 0x79, 0xE0,
-0xFE, 0xA3, 0xE0, 0xF5, 0x82, 0x8E, 0x83, 0x22,
-0x90, 0x95, 0x4E, 0xEF, 0xF0, 0xD1, 0x2C, 0x7F,
-0xF4, 0x7E, 0x01, 0x12, 0x5F, 0xA6, 0xBF, 0x01,
-0x08, 0x90, 0x95, 0x95, 0xE0, 0x90, 0x95, 0x97,
-0xF0, 0xD1, 0x2C, 0x7F, 0xF5, 0x7E, 0x01, 0x12,
-0x5F, 0xA6, 0xBF, 0x01, 0x08, 0x90, 0x95, 0x95,
-0xE0, 0x90, 0x95, 0x98, 0xF0, 0xD1, 0x2C, 0x7F,
-0xF6, 0x7E, 0x01, 0x12, 0x5F, 0xA6, 0xBF, 0x01,
-0x08, 0x90, 0x95, 0x95, 0xE0, 0x90, 0x95, 0x99,
-0xF0, 0xD1, 0x2C, 0x7F, 0xF7, 0x7E, 0x01, 0x12,
-0x5F, 0xA6, 0xBF, 0x01, 0x08, 0x90, 0x95, 0x95,
-0xE0, 0x90, 0x95, 0x9A, 0xF0, 0xD1, 0x2C, 0x7F,
-0xF8, 0x7E, 0x01, 0x12, 0x5F, 0xA6, 0xBF, 0x01,
-0x08, 0x90, 0x95, 0x95, 0xE0, 0x90, 0x95, 0x9B,
-0xF0, 0xD1, 0x2C, 0x12, 0xC7, 0xDB, 0xBF, 0x01,
-0x08, 0x90, 0x95, 0x95, 0xE0, 0x90, 0x95, 0x9C,
-0xF0, 0xD1, 0x2C, 0xF1, 0x95, 0x64, 0x01, 0x70,
-0x54, 0x90, 0x95, 0x95, 0xE0, 0x90, 0x95, 0x9D,
-0xF0, 0x54, 0x07, 0x60, 0x08, 0x90, 0x95, 0x95,
-0xE0, 0x54, 0xE0, 0x70, 0x40, 0x7B, 0x01, 0x7A,
-0x95, 0x79, 0x96, 0x7F, 0xFA, 0xF1, 0x97, 0x64,
-0x01, 0x70, 0x32, 0x90, 0x95, 0x95, 0xE0, 0xFC,
-0x54, 0x07, 0x70, 0x12, 0x90, 0x95, 0x9D, 0xE0,
-0xFE, 0x90, 0x95, 0x96, 0xE0, 0x54, 0x07, 0xFD,
-0xEE, 0x4D, 0x90, 0x95, 0x9D, 0xF0, 0xEC, 0x54,
-0xE0, 0x70, 0x12, 0x90, 0x95, 0x9D, 0xE0, 0xFF,
-0x90, 0x95, 0x96, 0xE0, 0x54, 0xE0, 0xFE, 0xEF,
-0x4E, 0x90, 0x95, 0x9D, 0xF0, 0xD1, 0x2C, 0x7F,
-0xFD, 0xF1, 0x97, 0x64, 0x01, 0x70, 0x47, 0x90,
-0x95, 0x95, 0xE0, 0xFE, 0x54, 0xCC, 0x90, 0x95,
-0x9E, 0xF0, 0xEE, 0x54, 0x0C, 0xFF, 0x60, 0x08,
-0x90, 0x95, 0x95, 0xE0, 0x54, 0xC0, 0x70, 0x2E,
-0xEF, 0x70, 0x12, 0x90, 0x95, 0x9E, 0xE0, 0xFF,
-0x90, 0x95, 0x95, 0xE0, 0x54, 0x03, 0x12, 0xEC,
-0x52, 0x90, 0x95, 0x9E, 0xF0, 0x90, 0x95, 0x95,
-0xE0, 0xFF, 0x54, 0xC0, 0x70, 0x10, 0x90, 0x95,
-0x9E, 0xE0, 0xFE, 0xEF, 0x54, 0x30, 0x25, 0xE0,
-0x25, 0xE0, 0xFF, 0xEE, 0x4F, 0xF0, 0xD1, 0x2C,
-0x7F, 0xF0, 0x7E, 0x01, 0x12, 0x5F, 0xA6, 0xBF,
-0x01, 0x08, 0x90, 0x95, 0x95, 0xE0, 0x90, 0x95,
-0x9F, 0xF0, 0xD1, 0x2C, 0x7F, 0xF1, 0x7E, 0x01,
-0x12, 0x5F, 0xA6, 0xBF, 0x01, 0x08, 0x90, 0x95,
-0x95, 0xE0, 0x90, 0x95, 0xA0, 0xF0, 0xD1, 0x2C,
-0x7F, 0xF2, 0x7E, 0x01, 0x12, 0x5F, 0xA6, 0xBF,
-0x01, 0x08, 0x90, 0x95, 0x95, 0xE0, 0x90, 0x95,
-0xA1, 0xF0, 0xD1, 0x2C, 0x7F, 0xF3, 0x7E, 0x01,
-0x12, 0x5F, 0xA6, 0xBF, 0x01, 0x08, 0x90, 0x95,
-0x95, 0xE0, 0x90, 0x95, 0xA2, 0xF0, 0xD1, 0x2C,
-0x7F, 0xFC, 0x7E, 0x01, 0x12, 0x5F, 0xA6, 0xBF,
-0x01, 0x08, 0x90, 0x95, 0x95, 0xE0, 0x90, 0x95,
-0xA3, 0xF0, 0x90, 0x95, 0x4F, 0x74, 0x19, 0xF0,
-0x90, 0x95, 0x71, 0x74, 0x08, 0xF0, 0x90, 0x95,
-0x97, 0xE0, 0x90, 0x95, 0x51, 0xF0, 0x90, 0x95,
-0x98, 0xE0, 0x90, 0x95, 0x52, 0xF0, 0x90, 0x95,
-0x99, 0xE0, 0x90, 0x95, 0x53, 0xF0, 0x90, 0x95,
-0x9A, 0xE0, 0x90, 0x95, 0x54, 0xF0, 0x90, 0x95,
-0x9B, 0xE0, 0x90, 0x95, 0x55, 0xF0, 0x90, 0x95,
-0x9C, 0xE0, 0x90, 0x95, 0x56, 0xF0, 0x90, 0x95,
-0x9D, 0xE0, 0x90, 0x95, 0x57, 0xF0, 0x90, 0x95,
-0x9E, 0xE0, 0x90, 0x95, 0x58, 0xF0, 0x90, 0x95,
-0x72, 0x74, 0x1A, 0xF0, 0x90, 0x95, 0x94, 0x74,
-0x05, 0xF0, 0x90, 0x95, 0x9F, 0xE0, 0x90, 0x95,
-0x74, 0xF0, 0x90, 0x95, 0xA0, 0xE0, 0x90, 0x95,
-0x75, 0xF0, 0x90, 0x95, 0xA1, 0xE0, 0x90, 0x95,
-0x76, 0xF0, 0x90, 0x95, 0xA2, 0xE0, 0x90, 0x95,
-0x77, 0xF0, 0x90, 0x95, 0xA3, 0xE0, 0x90, 0x95,
-0x78, 0xF0, 0x90, 0x95, 0x4E, 0xE0, 0xB4, 0x01,
-0x19, 0x7B, 0x01, 0x7A, 0x95, 0x79, 0x4F, 0x12,
-0xC7, 0x0B, 0x12, 0x04, 0x7E, 0x7B, 0x01, 0x7A,
-0x95, 0x79, 0x72, 0x71, 0xBD, 0x7F, 0x04, 0x02,
-0x04, 0x7E, 0x75, 0x45, 0x01, 0x75, 0x46, 0x95,
-0x75, 0x47, 0x4F, 0x75, 0x48, 0x0A, 0x7B, 0x01,
-0x7A, 0x01, 0x79, 0xA0, 0x12, 0x69, 0xF5, 0x75,
-0x45, 0x01, 0x75, 0x46, 0x95, 0x75, 0x47, 0x74,
-0x75, 0x48, 0x05, 0x7B, 0x01, 0x7A, 0x01, 0x79,
-0xAA, 0x02, 0x69, 0xF5, 0x7B, 0x01, 0x7A, 0x95,
-0x79, 0x95, 0x22, 0x90, 0x8A, 0xD9, 0x71, 0xCF,
-0x7F, 0x01, 0x12, 0x04, 0x7E, 0x90, 0x88, 0xA1,
-0x12, 0x96, 0x94, 0x30, 0xE0, 0x04, 0x7F, 0x03,
-0x80, 0x02, 0x7F, 0x01, 0x12, 0x71, 0x9A, 0xE4,
-0x90, 0x88, 0xAF, 0xF0, 0xA3, 0x12, 0xE9, 0x98,
-0x30, 0xE0, 0x09, 0x90, 0x8A, 0xF9, 0x71, 0xCF,
-0x7D, 0x0E, 0x80, 0x32, 0x12, 0xE9, 0x90, 0x30,
-0xE0, 0x17, 0x12, 0xEC, 0x22, 0x20, 0xE0, 0x08,
-0x12, 0xB4, 0x54, 0xE4, 0xFD, 0x12, 0x04, 0x7E,
-0x90, 0x8A, 0xF9, 0x71, 0xCF, 0x7D, 0x0F, 0x80,
-0x15, 0x90, 0x88, 0x36, 0xE0, 0x60, 0x14, 0x12,
-0xB4, 0x54, 0xE4, 0xFD, 0x12, 0x04, 0x7E, 0x90,
-0x8A, 0xF9, 0x71, 0xCF, 0x7D, 0x10, 0x7F, 0x6F,
-0x12, 0x04, 0x7E, 0x90, 0x88, 0xA0, 0xE0, 0x30,
-0xE0, 0x07, 0x90, 0x8A, 0xF9, 0x71, 0xCF, 0xF1,
-0xD4, 0x90, 0x88, 0xA0, 0x12, 0x96, 0x94, 0x30,
-0xE0, 0x0A, 0x90, 0x8A, 0x97, 0x71, 0xCF, 0xE4,
-0xFF, 0x12, 0x04, 0x7E, 0x90, 0x88, 0xA1, 0xE0,
-0xFF, 0xC3, 0x13, 0x30, 0xE0, 0x0E, 0x90, 0x06,
-0xCD, 0xE0, 0x54, 0xEF, 0xF0, 0x90, 0x06, 0xCF,
-0xE0, 0x54, 0xEF, 0xF0, 0x12, 0xCD, 0xDA, 0x30,
-0xE0, 0x19, 0xEF, 0x13, 0x13, 0x54, 0x3F, 0x30,
-0xE0, 0x11, 0xEE, 0x44, 0x08, 0xF0, 0xA3, 0xE0,
-0xC3, 0x13, 0x54, 0x7F, 0xFF, 0x90, 0x8A, 0xD1,
-0x12, 0xCA, 0xFD, 0x90, 0x05, 0x63, 0xE0, 0x90,
-0x97, 0x2C, 0xF0, 0x90, 0x05, 0x62, 0xE0, 0x90,
-0x97, 0x2B, 0xF0, 0x90, 0x05, 0x61, 0xE0, 0x90,
-0x97, 0x2A, 0xF0, 0x90, 0x05, 0x60, 0xE0, 0x90,
-0x97, 0x29, 0x12, 0xC3, 0x51, 0x90, 0x97, 0x29,
-0xF1, 0xA1, 0x12, 0x86, 0x20, 0xC0, 0x04, 0xC0,
-0x05, 0xC0, 0x06, 0xC0, 0x07, 0x90, 0x97, 0x2B,
-0xF1, 0xA1, 0x78, 0x10, 0x12, 0x03, 0xFE, 0xD0,
-0x03, 0xD0, 0x02, 0xD0, 0x01, 0xD0, 0x00, 0x12,
-0x86, 0x20, 0xC0, 0x04, 0xC0, 0x05, 0xC0, 0x06,
-0xC0, 0x07, 0xA3, 0xF1, 0xA1, 0x78, 0x18, 0x12,
-0x03, 0xFE, 0xD0, 0x03, 0xD0, 0x02, 0xD0, 0x01,
-0xD0, 0x00, 0x12, 0x86, 0x20, 0x90, 0x95, 0x46,
-0x02, 0x04, 0x31, 0x90, 0x95, 0x37, 0x74, 0x01,
-0xF0, 0x90, 0x06, 0x92, 0x04, 0xF0, 0x90, 0x01,
-0x3C, 0x74, 0x04, 0xF0, 0x90, 0x88, 0x31, 0xE0,
-0x44, 0x08, 0xF0, 0x90, 0x88, 0x39, 0xE0, 0x64,
-0x0C, 0x60, 0x0E, 0x90, 0x8A, 0xB9, 0x71, 0xCF,
-0xF1, 0xF6, 0x90, 0x8A, 0xF9, 0x71, 0xCF, 0xF1,
-0xD4, 0x90, 0x8A, 0xAF, 0x71, 0xCF, 0x7D, 0x08,
-0xE4, 0xFF, 0x02, 0x04, 0x7E, 0x7F, 0xFB, 0x7E,
-0x01, 0x12, 0x5F, 0xA6, 0xEF, 0x22, 0x90, 0x95,
-0x51, 0xE0, 0xFF, 0xE4, 0xFC, 0xFD, 0xFE, 0x22,
-0x90, 0x88, 0x36, 0xE0, 0x64, 0x01, 0x70, 0x23,
-0x12, 0xB5, 0xA4, 0x60, 0x10, 0x90, 0x8A, 0xB9,
-0x71, 0xCF, 0xF1, 0xF6, 0x90, 0x8B, 0x01, 0x12,
-0xDD, 0x27, 0x02, 0x04, 0x7A, 0x90, 0x88, 0x39,
-0xE0, 0x70, 0x08, 0x90, 0x8A, 0xB9, 0x71, 0xCF,
-0x12, 0xA7, 0x46, 0x22, 0xE4, 0xFD, 0xFF, 0x02,
-0x04, 0x7E, 0x90, 0x8A, 0xF9, 0x71, 0xCF, 0xF1,
-0xD4, 0x90, 0x88, 0x2F, 0x74, 0x01, 0xF0, 0x22,
-0x90, 0x8A, 0xF9, 0x71, 0xCF, 0xF1, 0xD4, 0x12,
-0xB4, 0xC4, 0x80, 0xED, 0x80, 0xEB, 0xE4, 0xFD,
-0x7F, 0x0C, 0x02, 0x04, 0x7E, 0x90, 0x95, 0x4E,
-0x12, 0x86, 0x42, 0x90, 0x93, 0xE7, 0xE0, 0x70,
-0x12, 0x71, 0xDD, 0x12, 0x02, 0x06, 0x13, 0x13,
+0x03, 0x02, 0x02, 0x1F, 0x90, 0x95, 0x54, 0x12,
+0x86, 0x42, 0x90, 0x93, 0xE7, 0xE0, 0x70, 0x13,
+0x12, 0x87, 0xEB, 0x12, 0x02, 0x06, 0x13, 0x13,
 0x54, 0x3F, 0x30, 0xE0, 0x06, 0x90, 0x93, 0xED,
 0x74, 0x01, 0xF0, 0x90, 0x93, 0xE9, 0xE0, 0x70,
-0x12, 0x71, 0xDD, 0x12, 0x02, 0x06, 0xC4, 0x54,
-0x0F, 0xFF, 0xBF, 0x05, 0x06, 0x90, 0x93, 0xEE,
-0x74, 0x01, 0xF0, 0x12, 0x87, 0xB7, 0xFF, 0x90,
-0x95, 0x52, 0xF0, 0x12, 0x02, 0x06, 0xC3, 0x13,
-0x30, 0xE0, 0x09, 0x12, 0x87, 0xAC, 0x90, 0x95,
-0x53, 0xF0, 0x80, 0x05, 0x90, 0x95, 0x53, 0xEF,
-0xF0, 0x90, 0x95, 0x52, 0xE0, 0x90, 0x95, 0x51,
-0xF0, 0x90, 0x95, 0x53, 0xE0, 0xFE, 0x90, 0x95,
-0x51, 0xE0, 0xFF, 0xD3, 0x9E, 0x50, 0x39, 0x71,
-0xDD, 0x12, 0x02, 0x06, 0x54, 0x01, 0xFD, 0x12,
-0x6E, 0x71, 0x90, 0x95, 0x51, 0xE0, 0xFF, 0x12,
-0x78, 0x4A, 0xEF, 0x90, 0x95, 0x51, 0x70, 0x06,
-0xE0, 0xFF, 0xF1, 0xDE, 0x80, 0x05, 0xE0, 0xFF,
-0x12, 0xD7, 0xDE, 0x90, 0x93, 0xEE, 0xE0, 0x60,
-0x07, 0x90, 0x95, 0x51, 0xE0, 0xFF, 0xF1, 0xDE,
-0x90, 0x95, 0x51, 0xE0, 0x04, 0xF0, 0x80, 0xB9,
-0x90, 0x05, 0x5E, 0xE4, 0xF0, 0x90, 0x95, 0x52,
+0x13, 0x12, 0x87, 0xEB, 0x12, 0x02, 0x06, 0xC4,
+0x54, 0x0F, 0xFF, 0xBF, 0x05, 0x06, 0x90, 0x93,
+0xEE, 0x74, 0x01, 0xF0, 0x12, 0x87, 0xEB, 0x12,
+0x87, 0x6A, 0xFF, 0x90, 0x95, 0x58, 0xF0, 0x12,
+0x02, 0x06, 0xC3, 0x13, 0x30, 0xE0, 0x0C, 0x12,
+0x87, 0xEB, 0x12, 0x87, 0x97, 0x90, 0x95, 0x59,
+0xF0, 0x80, 0x05, 0x90, 0x95, 0x59, 0xEF, 0xF0,
+0x90, 0x95, 0x58, 0xE0, 0x90, 0x95, 0x57, 0xF0,
+0x90, 0x95, 0x59, 0xE0, 0xFE, 0x90, 0x95, 0x57,
+0xE0, 0xFF, 0xD3, 0x9E, 0x50, 0x3A, 0x12, 0x87,
+0xEB, 0x12, 0x02, 0x06, 0x54, 0x01, 0xFD, 0x12,
+0x6E, 0x71, 0x90, 0x95, 0x57, 0xE0, 0xFF, 0x12,
+0x78, 0x4A, 0xEF, 0x90, 0x95, 0x57, 0x70, 0x06,
+0xE0, 0xFF, 0xF1, 0xF3, 0x80, 0x05, 0xE0, 0xFF,
+0x12, 0xD0, 0x10, 0x90, 0x93, 0xEE, 0xE0, 0x60,
+0x07, 0x90, 0x95, 0x57, 0xE0, 0xFF, 0xF1, 0xF3,
+0x90, 0x95, 0x57, 0xE0, 0x04, 0xF0, 0x80, 0xB8,
+0x90, 0x05, 0x5E, 0xE4, 0xF0, 0x90, 0x95, 0x58,
 0xE0, 0x70, 0x1A, 0xFF, 0x12, 0x78, 0x4A, 0xEF,
-0x70, 0x13, 0x90, 0x86, 0x0C, 0x51, 0x57, 0x90,
-0x8A, 0xED, 0x51, 0x57, 0x12, 0xCD, 0x60, 0x54,
+0x70, 0x13, 0x90, 0x86, 0x0C, 0x51, 0x66, 0x90,
+0x8A, 0xED, 0x51, 0x66, 0x12, 0xEE, 0x52, 0x54,
 0xBF, 0xF0, 0x54, 0x7F, 0xF0, 0x22, 0x90, 0x97,
-0x16, 0x12, 0x86, 0x42, 0x90, 0x97, 0x15, 0xEF,
-0xF0, 0x12, 0x86, 0x4B, 0x91, 0x5C, 0x00, 0x91,
-0x61, 0x01, 0x91, 0x66, 0x06, 0x91, 0x7C, 0x10,
-0x91, 0x81, 0x12, 0x91, 0x86, 0x14, 0x91, 0x8B,
-0x16, 0x91, 0x90, 0x18, 0x91, 0x95, 0x19, 0x91,
-0x9A, 0x1B, 0x91, 0x9F, 0x1C, 0x91, 0xA4, 0x1E,
-0x91, 0xA9, 0x20, 0x91, 0xAE, 0x24, 0x91, 0xB3,
-0x25, 0x91, 0xB8, 0x27, 0x91, 0xBD, 0x29, 0x91,
-0xC2, 0x2A, 0x91, 0xC7, 0x40, 0x91, 0xCE, 0x42,
-0x91, 0xD9, 0x43, 0x92, 0x46, 0x47, 0x91, 0xDE,
-0x49, 0x91, 0xE3, 0x60, 0x91, 0xE7, 0x61, 0x91,
-0xEC, 0x62, 0x91, 0xF1, 0x63, 0x91, 0xF6, 0x64,
-0x91, 0xFB, 0x65, 0x92, 0x00, 0x66, 0x92, 0x05,
-0x67, 0x92, 0x0A, 0x68, 0x92, 0x0F, 0x69, 0x92,
-0x14, 0x6B, 0x92, 0x19, 0x6C, 0x92, 0x1E, 0x6D,
-0x92, 0x23, 0x6E, 0x92, 0x28, 0x6F, 0x92, 0x2D,
-0x70, 0x92, 0x32, 0xC3, 0x91, 0x6B, 0xC6, 0x91,
-0x6B, 0xC7, 0x91, 0x6B, 0xC8, 0x91, 0x77, 0xCB,
-0x00, 0x00, 0x92, 0x37, 0x51, 0x47, 0x02, 0x87,
-0x1D, 0x51, 0x47, 0x02, 0x8F, 0xFD, 0x51, 0x47,
-0x02, 0xC1, 0xA1, 0x90, 0x97, 0x15, 0xE0, 0xFF,
-0xA3, 0x12, 0x86, 0x39, 0x02, 0xBE, 0x7D, 0x51,
-0x47, 0x02, 0xD7, 0xF6, 0x51, 0x47, 0x02, 0xA7,
-0xF5, 0x51, 0x47, 0x02, 0xBF, 0xD8, 0x51, 0x47,
-0x02, 0xBF, 0xEC, 0x51, 0x47, 0x02, 0x87, 0x7C,
-0x51, 0x47, 0x02, 0xB0, 0x76, 0x51, 0x47, 0x02,
-0xB7, 0xE2, 0x51, 0x47, 0x02, 0xB8, 0x87, 0x51,
-0x47, 0x02, 0xB9, 0x08, 0x51, 0x47, 0x02, 0xBF,
-0xFB, 0x51, 0x47, 0x02, 0xC7, 0xE2, 0x51, 0x47,
-0x02, 0xB1, 0x7F, 0x51, 0x47, 0x02, 0xCF, 0xB2,
-0x51, 0x47, 0x02, 0x87, 0xC2, 0x51, 0x47, 0x02,
-0xD7, 0xB4, 0x51, 0x47, 0x02, 0xCF, 0xF5, 0x51,
-0x47, 0x90, 0x8A, 0xA5, 0x80, 0x05, 0x51, 0x47,
-0x90, 0x8A, 0xB5, 0x12, 0xC7, 0x0E, 0x02, 0x04,
-0x7E, 0x51, 0x47, 0x02, 0x25, 0xEC, 0x51, 0x47,
-0x02, 0xE3, 0xF5, 0x51, 0x47, 0x61, 0xE3, 0x51,
-0x47, 0x02, 0x77, 0x4F, 0x51, 0x47, 0x02, 0x7C,
-0x60, 0x51, 0x47, 0x02, 0x7A, 0xC6, 0x51, 0x47,
-0x02, 0x5D, 0x36, 0x51, 0x47, 0x02, 0x7B, 0xE9,
-0x51, 0x47, 0x02, 0x70, 0x33, 0x51, 0x47, 0x02,
-0x48, 0xC9, 0x51, 0x47, 0x02, 0x79, 0xF3, 0x51,
-0x47, 0x02, 0xC2, 0x36, 0x51, 0x47, 0x02, 0x51,
-0x7B, 0x51, 0x47, 0x02, 0x79, 0x30, 0x51, 0x47,
-0x02, 0x57, 0xF2, 0x51, 0x47, 0x02, 0x74, 0x8D,
-0x51, 0x47, 0x02, 0x78, 0x9A, 0x51, 0x47, 0x02,
-0x5E, 0x0B, 0x51, 0x47, 0x02, 0xD7, 0xC8, 0x90,
+0x45, 0x12, 0x86, 0x42, 0x90, 0x97, 0x44, 0xEF,
+0xF0, 0x12, 0x86, 0x4B, 0x89, 0x6C, 0x00, 0x89,
+0x71, 0x01, 0x89, 0x75, 0x06, 0x89, 0x8B, 0x10,
+0x89, 0x90, 0x12, 0x89, 0x95, 0x14, 0x89, 0x9A,
+0x16, 0x89, 0x9F, 0x18, 0x89, 0xA4, 0x19, 0x89,
+0xA9, 0x1B, 0x89, 0xAE, 0x1C, 0x89, 0xB3, 0x1E,
+0x89, 0xB8, 0x20, 0x89, 0xBD, 0x24, 0x89, 0xC2,
+0x25, 0x89, 0xC7, 0x27, 0x89, 0xCC, 0x29, 0x89,
+0xD1, 0x2A, 0x89, 0xD6, 0x40, 0x89, 0xDD, 0x42,
+0x89, 0xE8, 0x43, 0x8A, 0x56, 0x47, 0x89, 0xED,
+0x49, 0x89, 0xF2, 0x60, 0x89, 0xF7, 0x61, 0x89,
+0xFC, 0x62, 0x8A, 0x01, 0x63, 0x8A, 0x06, 0x64,
+0x8A, 0x0B, 0x65, 0x8A, 0x10, 0x66, 0x8A, 0x15,
+0x67, 0x8A, 0x1A, 0x68, 0x8A, 0x1F, 0x69, 0x8A,
+0x24, 0x6B, 0x8A, 0x29, 0x6C, 0x8A, 0x2E, 0x6D,
+0x8A, 0x33, 0x6E, 0x8A, 0x38, 0x6F, 0x8A, 0x3D,
+0x70, 0x8A, 0x42, 0xC3, 0x89, 0x7A, 0xC6, 0x89,
+0x7A, 0xC7, 0x89, 0x7A, 0xC8, 0x89, 0x86, 0xCB,
+0x00, 0x00, 0x8A, 0x47, 0x51, 0x57, 0x02, 0x87,
+0x1D, 0x51, 0x57, 0x01, 0x04, 0x51, 0x57, 0x02,
+0xAA, 0x0F, 0x90, 0x97, 0x44, 0xE0, 0xFF, 0xA3,
+0x12, 0x86, 0x39, 0x02, 0xD0, 0x15, 0x51, 0x57,
+0x02, 0xAD, 0x6E, 0x51, 0x57, 0x02, 0x97, 0xFE,
+0x51, 0x57, 0x02, 0xA8, 0x41, 0x51, 0x57, 0x02,
+0xAF, 0xE6, 0x51, 0x57, 0x02, 0x87, 0x70, 0x51,
+0x57, 0x02, 0xA0, 0x78, 0x51, 0x57, 0x02, 0xA1,
+0x7E, 0x51, 0x57, 0x02, 0xA7, 0xC7, 0x51, 0x57,
+0x02, 0x87, 0x9D, 0x51, 0x57, 0x02, 0xA9, 0x91,
+0x51, 0x57, 0x02, 0xAF, 0xF5, 0x51, 0x57, 0x02,
+0x94, 0x23, 0x51, 0x57, 0x02, 0xC0, 0x04, 0x51,
+0x57, 0x02, 0xC0, 0x43, 0x51, 0x57, 0x02, 0xAF,
+0xB6, 0x51, 0x57, 0x02, 0xC7, 0xF7, 0x51, 0x57,
+0x90, 0x8A, 0xA5, 0x80, 0x05, 0x51, 0x57, 0x90,
+0x8A, 0xB5, 0x12, 0xAC, 0x14, 0x02, 0x04, 0x7E,
+0x51, 0x57, 0x02, 0x25, 0xEC, 0x51, 0x57, 0x02,
+0xDC, 0x82, 0x51, 0x57, 0x02, 0xC0, 0x6C, 0x51,
+0x57, 0x02, 0x77, 0x4F, 0x51, 0x57, 0x02, 0x7C,
+0x60, 0x51, 0x57, 0x02, 0x7A, 0xC6, 0x51, 0x57,
+0x02, 0x5D, 0x36, 0x51, 0x57, 0x02, 0x7B, 0xE9,
+0x51, 0x57, 0x02, 0x70, 0x33, 0x51, 0x57, 0x02,
+0x48, 0xC9, 0x51, 0x57, 0x02, 0x79, 0xF3, 0x51,
+0x57, 0x02, 0xAA, 0xA3, 0x51, 0x57, 0x02, 0x51,
+0x7B, 0x51, 0x57, 0x02, 0x79, 0x30, 0x51, 0x57,
+0x02, 0x57, 0xF2, 0x51, 0x57, 0x02, 0x74, 0x8D,
+0x51, 0x57, 0x02, 0x78, 0x9A, 0x51, 0x57, 0x02,
+0x5E, 0x0B, 0x51, 0x57, 0x02, 0xCF, 0xFA, 0x90,
 0x01, 0xC0, 0xE0, 0x44, 0x01, 0xF0, 0x90, 0x97,
-0x15, 0xE0, 0x90, 0x01, 0xC2, 0xF0, 0x22, 0x90,
-0x97, 0x16, 0x02, 0x86, 0x39, 0x7D, 0xFF, 0xE4,
-0xFF, 0x12, 0xAC, 0x35, 0x90, 0x8A, 0xFD, 0xE0,
-0xFE, 0xA3, 0xE0, 0xAA, 0x06, 0xF9, 0x02, 0x04,
-0x7A, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0,
-0x90, 0x97, 0x46, 0xED, 0xF0, 0x90, 0x88, 0x31,
-0xE0, 0xFE, 0xC4, 0x13, 0x13, 0x54, 0x03, 0x30,
-0xE0, 0x02, 0x61, 0xD2, 0xEE, 0xD1, 0x95, 0x30,
-0xE0, 0x02, 0x61, 0xD2, 0x90, 0x88, 0x39, 0xE0,
-0xFE, 0x6F, 0x70, 0x02, 0x61, 0xD2, 0xEF, 0x70,
-0x02, 0x61, 0x2E, 0x24, 0xFE, 0x70, 0x02, 0x61,
-0x73, 0x24, 0xFE, 0x60, 0x4F, 0x24, 0xFC, 0x70,
-0x02, 0x61, 0xB8, 0x24, 0xFC, 0x60, 0x02, 0x61,
-0xCB, 0xEE, 0xB4, 0x0E, 0x03, 0x12, 0x71, 0x5F,
+0x44, 0xE0, 0x90, 0x01, 0xC2, 0xF0, 0x22, 0x90,
+0x97, 0x45, 0x02, 0x86, 0x39, 0x7D, 0xFF, 0xE4,
+0xFF, 0xF1, 0x64, 0x90, 0x8A, 0xFD, 0xE0, 0xFE,
+0xA3, 0xE0, 0xAA, 0x06, 0xF9, 0x02, 0x04, 0x7A,
+0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0x90,
+0x97, 0x73, 0xED, 0xF0, 0x90, 0x88, 0x31, 0xE0,
+0xFE, 0xC4, 0x13, 0x13, 0x54, 0x03, 0x30, 0xE0,
+0x02, 0x61, 0xE2, 0xEE, 0x12, 0x97, 0x35, 0x30,
+0xE0, 0x02, 0x61, 0xE2, 0x90, 0x88, 0x39, 0xE0,
+0xFE, 0x6F, 0x70, 0x02, 0x61, 0xE2, 0xEF, 0x70,
+0x02, 0x61, 0x3E, 0x24, 0xFE, 0x70, 0x02, 0x61,
+0x83, 0x24, 0xFE, 0x60, 0x4F, 0x24, 0xFC, 0x70,
+0x02, 0x61, 0xC8, 0x24, 0xFC, 0x60, 0x02, 0x61,
+0xDB, 0xEE, 0xB4, 0x0E, 0x03, 0x12, 0x71, 0x5F,
 0x90, 0x88, 0x39, 0xE0, 0x70, 0x05, 0x7F, 0x01,
 0x12, 0x78, 0xC0, 0x90, 0x88, 0x39, 0xE0, 0xB4,
 0x06, 0x03, 0x12, 0x71, 0x24, 0x90, 0x88, 0x39,
-0xE0, 0xB4, 0x04, 0x11, 0x90, 0x97, 0x46, 0xE0,
+0xE0, 0xB4, 0x04, 0x11, 0x90, 0x97, 0x73, 0xE0,
 0xFF, 0x60, 0x05, 0x12, 0x67, 0x80, 0x80, 0x05,
-0x90, 0x8A, 0xED, 0x51, 0x57, 0x90, 0x88, 0x39,
-0xE0, 0x64, 0x08, 0x60, 0x02, 0x61, 0xCB, 0x12,
-0x7B, 0xCC, 0x61, 0xCB, 0x90, 0x88, 0x39, 0xE0,
+0x90, 0x8A, 0xED, 0x51, 0x66, 0x90, 0x88, 0x39,
+0xE0, 0x64, 0x08, 0x60, 0x02, 0x61, 0xDB, 0x12,
+0x7B, 0xCC, 0x61, 0xDB, 0x90, 0x88, 0x39, 0xE0,
 0x70, 0x05, 0x7F, 0x01, 0x12, 0x78, 0xC0, 0x90,
 0x88, 0x39, 0xE0, 0xB4, 0x06, 0x03, 0x12, 0x71,
 0x24, 0x90, 0x88, 0x39, 0xE0, 0xB4, 0x0E, 0x0B,
-0x90, 0x86, 0x00, 0x51, 0x57, 0xBF, 0x01, 0x03,
+0x90, 0x86, 0x00, 0x51, 0x66, 0xBF, 0x01, 0x03,
 0x12, 0x71, 0x5F, 0x90, 0x88, 0x39, 0xE0, 0x64,
-0x0C, 0x60, 0x02, 0x61, 0xCB, 0x90, 0x86, 0x00,
-0x51, 0x57, 0xEF, 0x64, 0x01, 0x60, 0x02, 0x61,
-0xCB, 0x12, 0x68, 0xC2, 0x61, 0xCB, 0x90, 0x88,
+0x0C, 0x60, 0x02, 0x61, 0xDB, 0x90, 0x86, 0x00,
+0x51, 0x66, 0xEF, 0x64, 0x01, 0x60, 0x02, 0x61,
+0xDB, 0x12, 0x68, 0xC2, 0x61, 0xDB, 0x90, 0x88,
 0x39, 0xE0, 0xB4, 0x0E, 0x0B, 0x90, 0x86, 0x00,
-0x51, 0x57, 0xBF, 0x01, 0x03, 0x12, 0x71, 0x5F,
+0x51, 0x66, 0xBF, 0x01, 0x03, 0x12, 0x71, 0x5F,
 0x90, 0x88, 0x39, 0xE0, 0xB4, 0x06, 0x03, 0x12,
 0x71, 0x24, 0x90, 0x88, 0x39, 0xE0, 0xB4, 0x0C,
-0x0B, 0x90, 0x86, 0x00, 0x51, 0x57, 0xBF, 0x01,
+0x0B, 0x90, 0x86, 0x00, 0x51, 0x66, 0xBF, 0x01,
 0x03, 0x12, 0x68, 0xC2, 0x90, 0x88, 0x39, 0xE0,
 0x64, 0x04, 0x70, 0x67, 0x90, 0x86, 0x02, 0x51,
-0x57, 0xEF, 0x64, 0x01, 0x70, 0x5D, 0x12, 0x73,
+0x66, 0xEF, 0x64, 0x01, 0x70, 0x5D, 0x12, 0x73,
 0x5A, 0x80, 0x58, 0x90, 0x88, 0x39, 0xE0, 0xB4,
-0x0E, 0x0B, 0x90, 0x86, 0x00, 0x51, 0x57, 0xBF,
+0x0E, 0x0B, 0x90, 0x86, 0x00, 0x51, 0x66, 0xBF,
 0x01, 0x03, 0x12, 0x71, 0x5F, 0x90, 0x88, 0x39,
 0xE0, 0xB4, 0x06, 0x03, 0x12, 0x71, 0x24, 0x90,
 0x88, 0x39, 0xE0, 0xB4, 0x0C, 0x0B, 0x90, 0x86,
-0x00, 0x51, 0x57, 0xBF, 0x01, 0x03, 0x12, 0x68,
+0x00, 0x51, 0x66, 0xBF, 0x01, 0x03, 0x12, 0x68,
 0xC2, 0x90, 0x88, 0x39, 0xE0, 0x70, 0x05, 0x7F,
 0x01, 0x12, 0x78, 0xC0, 0x90, 0x88, 0x39, 0xE0,
 0xB4, 0x04, 0x18, 0x12, 0x7A, 0x49, 0x80, 0x13,
 0x90, 0x88, 0x39, 0xE0, 0xB4, 0x0C, 0x0C, 0x90,
-0x88, 0x32, 0x12, 0xB7, 0xB7, 0x30, 0xE0, 0x03,
-0x12, 0x79, 0xD4, 0x90, 0x88, 0x39, 0x12, 0xC9,
-0x1C, 0xF0, 0xD0, 0xD0, 0x92, 0xAF, 0x22, 0x90,
-0x95, 0x4E, 0x12, 0x86, 0x42, 0x90, 0x95, 0x4E,
-0x02, 0x86, 0x39, 0xD3, 0x10, 0xAF, 0x01, 0xC3,
-0xC0, 0xD0, 0x71, 0xD7, 0x12, 0xB9, 0x00, 0x90,
-0x88, 0x9D, 0x12, 0xC9, 0x29, 0xF0, 0xFC, 0x12,
-0x02, 0x06, 0xFD, 0x54, 0x04, 0x13, 0x13, 0x54,
-0x3F, 0xFF, 0x90, 0x95, 0x38, 0xE0, 0x54, 0xFE,
-0x4F, 0xF0, 0xED, 0x54, 0x08, 0xFF, 0xEC, 0x54,
-0xF7, 0x4F, 0xFF, 0x90, 0x88, 0x9D, 0xF0, 0x12,
-0x02, 0x06, 0xFE, 0x54, 0x10, 0xFD, 0xEF, 0x54,
-0xEF, 0x12, 0xEC, 0x8A, 0x54, 0x20, 0xFE, 0xEF,
-0x54, 0xDF, 0x4E, 0xFF, 0xF0, 0x12, 0x02, 0x06,
-0xFE, 0x54, 0x40, 0xFD, 0xEF, 0x54, 0xBF, 0x12,
-0xEC, 0x8A, 0x54, 0x80, 0xFE, 0xEF, 0x54, 0x7F,
-0x4E, 0xF0, 0x71, 0xDD, 0xE9, 0x24, 0x01, 0xF9,
-0xE4, 0x3A, 0x8B, 0x45, 0x12, 0xEC, 0x82, 0x7B,
-0x01, 0x7A, 0x88, 0x79, 0x9E, 0x12, 0x69, 0xF5,
-0x12, 0x87, 0xAC, 0xFF, 0x54, 0x03, 0x90, 0x88,
-0x9F, 0xF0, 0xEF, 0x54, 0x04, 0x13, 0x13, 0x54,
-0x01, 0x25, 0xE0, 0x25, 0xE0, 0xFF, 0x90, 0x95,
-0x44, 0xE0, 0x54, 0xFB, 0x4F, 0xFF, 0xF0, 0x12,
-0x87, 0xB1, 0xFE, 0x54, 0x08, 0x13, 0x13, 0x13,
-0x12, 0xEC, 0x2B, 0xFD, 0xEF, 0x54, 0x7F, 0x4D,
-0x90, 0x95, 0x44, 0xF0, 0x71, 0xDD, 0x12, 0x02,
-0x06, 0x20, 0xE0, 0x02, 0xA1, 0xEB, 0x90, 0x05,
-0x54, 0xE0, 0x90, 0x88, 0xAE, 0xF0, 0xE0, 0xC3,
-0x13, 0x90, 0x88, 0xAD, 0xF0, 0x90, 0x88, 0xA0,
-0xE0, 0xC4, 0x54, 0x0F, 0x30, 0xE0, 0x10, 0x12,
-0x87, 0xBC, 0x90, 0x88, 0x9E, 0x12, 0xEC, 0x7A,
-0x90, 0x88, 0x9F, 0xEE, 0xF0, 0x80, 0x26, 0x12,
-0x87, 0xBC, 0xFF, 0xC3, 0x94, 0x2A, 0x50, 0x15,
-0xEF, 0xC3, 0x94, 0x03, 0x50, 0x07, 0x90, 0x88,
-0x9E, 0x74, 0x03, 0x80, 0x0D, 0x12, 0x87, 0xBC,
-0x90, 0x88, 0x9E, 0x80, 0x05, 0x90, 0x88, 0x9E,
-0x74, 0x2A, 0x12, 0xEC, 0x7A, 0x90, 0x88, 0xA1,
-0x12, 0xAF, 0x83, 0x30, 0xE0, 0x3D, 0x90, 0x88,
-0x9E, 0xE0, 0x75, 0xF0, 0x03, 0x84, 0x90, 0x88,
-0xA6, 0xF0, 0xE0, 0xC3, 0x13, 0xA3, 0xF0, 0x90,
-0x88, 0x9F, 0xE0, 0x75, 0xF0, 0x03, 0x84, 0x90,
-0x88, 0xA8, 0xF0, 0x90, 0x88, 0x9E, 0xE0, 0xC3,
-0x13, 0x90, 0x88, 0xA9, 0xF0, 0x90, 0x88, 0x9F,
-0xE0, 0xC3, 0x13, 0x90, 0x88, 0xAA, 0xF0, 0x90,
-0x01, 0x3E, 0x74, 0x08, 0xF0, 0xFD, 0x7F, 0x02,
-0x12, 0x7C, 0x05, 0xE4, 0x90, 0x88, 0xDD, 0xF0,
-0x12, 0xE9, 0x90, 0x30, 0xE0, 0x19, 0x12, 0xEC,
-0x22, 0x30, 0xE0, 0x0D, 0x90, 0x8A, 0x89, 0x12,
-0x8B, 0xCF, 0x7D, 0x04, 0x7F, 0x02, 0x12, 0x04,
-0x7E, 0x12, 0xEC, 0x72, 0x74, 0x11, 0xF0, 0x90,
-0x95, 0x38, 0xE0, 0x30, 0xE0, 0x33, 0x90, 0x95,
-0x41, 0x74, 0x01, 0xF0, 0xE4, 0xA3, 0xF0, 0x90,
-0x06, 0xC7, 0xE0, 0xFE, 0x90, 0x06, 0xC6, 0x12,
-0xCA, 0x8E, 0xFE, 0xE4, 0xFD, 0x78, 0x10, 0x12,
-0xC3, 0x5B, 0x90, 0x06, 0xC5, 0xE0, 0xFE, 0x90,
-0x06, 0xC4, 0x12, 0xCA, 0x8E, 0xFE, 0xE4, 0xFD,
-0x12, 0x86, 0x20, 0x90, 0x95, 0x3D, 0x12, 0x04,
-0x31, 0x90, 0x95, 0x44, 0xE0, 0x13, 0x13, 0x54,
-0x3F, 0x30, 0xE0, 0x13, 0xA3, 0xE0, 0x20, 0xE0,
-0x07, 0x54, 0x01, 0x44, 0x64, 0xF0, 0x80, 0x07,
-0x90, 0x95, 0x45, 0xE0, 0x54, 0xFE, 0xF0, 0x12,
-0xD2, 0x95, 0x90, 0x88, 0xA5, 0xE0, 0xB4, 0x01,
-0x08, 0x90, 0x88, 0xB0, 0x74, 0x01, 0xF0, 0x80,
-0x2B, 0x90, 0x88, 0xA5, 0xE0, 0xB4, 0x04, 0x08,
-0x90, 0x88, 0xB0, 0x74, 0x04, 0xF0, 0x80, 0x1C,
-0x90, 0x88, 0xA5, 0xE0, 0xB4, 0x06, 0x08, 0x90,
-0x88, 0xB0, 0x74, 0x02, 0xF0, 0x80, 0x0D, 0x90,
-0x88, 0xA5, 0xE0, 0xB4, 0x07, 0x06, 0x90, 0x88,
-0xB0, 0x74, 0x05, 0xF0, 0xE4, 0x90, 0x88, 0xA5,
-0xF0, 0x80, 0x3C, 0x90, 0x8A, 0xF1, 0x51, 0x57,
-0x90, 0x89, 0x04, 0xE0, 0x90, 0x00, 0x40, 0x30,
-0xE0, 0x08, 0xE0, 0x54, 0x0F, 0x44, 0xA0, 0xF0,
-0x80, 0x06, 0xE0, 0x54, 0x0F, 0x44, 0x20, 0xF0,
-0x71, 0xDD, 0x12, 0x87, 0xA6, 0x13, 0x13, 0x13,
-0x54, 0x1F, 0x30, 0xE0, 0x04, 0x7F, 0x03, 0x80,
-0x02, 0x7F, 0x01, 0x12, 0x71, 0x9A, 0x12, 0xAC,
-0x30, 0x12, 0xEC, 0x72, 0x74, 0x43, 0xF0, 0x90,
-0x88, 0xA3, 0xE0, 0x54, 0xDF, 0xF0, 0xE4, 0x90,
-0x88, 0xAF, 0xF0, 0x90, 0x88, 0xA0, 0xD1, 0x94,
-0x30, 0xE0, 0x09, 0x90, 0x88, 0xD0, 0xE0, 0x44,
-0x02, 0xF0, 0x80, 0x12, 0x90, 0x8A, 0x97, 0x12,
-0x8B, 0xCF, 0x7F, 0x01, 0x12, 0x04, 0x7E, 0x90,
-0x88, 0xD0, 0xE0, 0x54, 0xFD, 0xF0, 0x90, 0x8A,
-0xD9, 0x12, 0x8B, 0xCF, 0x7F, 0x03, 0x12, 0x04,
-0x7E, 0xD1, 0x91, 0x30, 0xE0, 0x0E, 0x90, 0x01,
-0x36, 0x74, 0x20, 0xF0, 0xFD, 0x7F, 0x02, 0x12,
-0x7C, 0x74, 0x80, 0x07, 0x7D, 0x20, 0x7F, 0x02,
-0x12, 0x7C, 0x7E, 0x12, 0xD2, 0x9C, 0x90, 0x88,
-0x9D, 0xE0, 0x20, 0xE0, 0x07, 0x90, 0x88, 0xA1,
-0xE0, 0x54, 0xBF, 0xF0, 0xD0, 0xD0, 0x92, 0xAF,
-0x22, 0x90, 0x95, 0x44, 0xE0, 0xC4, 0x13, 0x13,
-0x13, 0x54, 0x01, 0x22, 0xD3, 0x10, 0xAF, 0x01,
-0xC3, 0xC0, 0xD0, 0x7F, 0x8F, 0x12, 0x7B, 0x41,
-0xEF, 0x20, 0xE6, 0x02, 0xE1, 0xCC, 0x90, 0x00,
-0x8C, 0xE0, 0x90, 0x97, 0x30, 0xF0, 0x7F, 0x8D,
-0x12, 0x7B, 0x41, 0x90, 0x97, 0x31, 0xEF, 0xF0,
-0x90, 0x00, 0x8E, 0xE0, 0x90, 0x97, 0x32, 0xF0,
-0x90, 0x97, 0x31, 0xE0, 0x24, 0xFC, 0x60, 0x10,
-0x24, 0x03, 0x60, 0x02, 0xE1, 0xBC, 0x90, 0x97,
-0x30, 0xE0, 0xFF, 0x12, 0xDA, 0xCA, 0xE1, 0xBC,
-0x90, 0x97, 0x30, 0xE0, 0x24, 0xD6, 0x12, 0xA2,
-0x7D, 0xFB, 0xE4, 0xFD, 0xFF, 0xF1, 0xD6, 0x75,
-0xF0, 0x12, 0x12, 0xA2, 0xBC, 0x13, 0x13, 0x54,
-0x03, 0xFB, 0x0D, 0xE4, 0xFF, 0xF1, 0xD6, 0x75,
-0xF0, 0x12, 0x90, 0x89, 0x52, 0x12, 0x04, 0x6E,
-0xD1, 0x94, 0xFB, 0x0D, 0xE4, 0xFF, 0xF1, 0xD6,
-0x75, 0xF0, 0x12, 0x12, 0xA2, 0xBC, 0xC4, 0x54,
-0x03, 0xFB, 0x0D, 0xE4, 0xFF, 0xF1, 0xD6, 0x75,
-0xF0, 0x12, 0x12, 0xE5, 0x55, 0xFB, 0xE4, 0xFD,
-0x0F, 0xF1, 0xD6, 0x12, 0xE5, 0x48, 0xF1, 0xD3,
-0x75, 0xF0, 0x12, 0x12, 0xA4, 0x3E, 0xC4, 0x13,
-0x54, 0x01, 0xFB, 0x0D, 0x7F, 0x01, 0xF1, 0xD6,
-0x75, 0xF0, 0x12, 0x12, 0xA4, 0x3E, 0x54, 0x1F,
-0xF1, 0xD4, 0x12, 0xE4, 0x6F, 0xE0, 0xFB, 0xE4,
-0xFD, 0x0F, 0xF1, 0xD6, 0x75, 0xF0, 0x08, 0xA4,
-0x24, 0x01, 0xF5, 0x82, 0xE4, 0x34, 0x82, 0xF1,
-0xD1, 0x75, 0xF0, 0x08, 0xA4, 0x24, 0x02, 0xF5,
-0x82, 0xE4, 0x34, 0x82, 0xF1, 0xD1, 0x75, 0xF0,
-0x08, 0xA4, 0x24, 0x03, 0xF5, 0x82, 0xE4, 0x34,
-0x82, 0xF1, 0xD1, 0x75, 0xF0, 0x08, 0xA4, 0x24,
-0x04, 0xF5, 0x82, 0xE4, 0x34, 0x82, 0xF5, 0x83,
-0xE0, 0xFB, 0xE4, 0xFD, 0x0F, 0xF1, 0xD6, 0x75,
-0xF0, 0x08, 0xA4, 0x24, 0x05, 0xF5, 0x82, 0xE4,
-0x34, 0x82, 0xF1, 0xD1, 0x75, 0xF0, 0x08, 0xA4,
-0x24, 0x06, 0xF5, 0x82, 0xE4, 0x34, 0x82, 0xF1,
-0xD1, 0x75, 0xF0, 0x08, 0xA4, 0x24, 0x07, 0xF5,
-0x82, 0xE4, 0x34, 0x82, 0xF5, 0x83, 0xE0, 0xFB,
-0x0D, 0x12, 0xDB, 0x1D, 0x7F, 0x8F, 0x12, 0x7B,
-0x41, 0xEF, 0x30, 0xE0, 0x07, 0xE4, 0xFD, 0x7F,
-0x8D, 0x12, 0x7B, 0x2E, 0xD0, 0xD0, 0x92, 0xAF,
-0x22, 0xF5, 0x83, 0xE0, 0xFB, 0x0D, 0x12, 0xDB,
-0x1D, 0x90, 0x97, 0x30, 0xE0, 0x22, 0x7D, 0x01,
-0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0x90,
-0x97, 0x39, 0xEF, 0xF0, 0xA3, 0xED, 0xF0, 0x90,
-0x8A, 0xF9, 0x12, 0x8B, 0xCF, 0x7D, 0x44, 0x7F,
-0x6F, 0x12, 0x04, 0x7E, 0x51, 0x54, 0x90, 0x97,
-0x3A, 0xE0, 0x90, 0x97, 0x39, 0xB4, 0x01, 0x09,
-0xE0, 0x11, 0x28, 0xE0, 0x44, 0x04, 0xF0, 0x80,
-0x07, 0xE0, 0x11, 0x28, 0xE0, 0x54, 0xFB, 0xF0,
-0x90, 0x8A, 0xF9, 0x12, 0x8B, 0xCF, 0x12, 0x8F,
-0xD4, 0xD0, 0xD0, 0x92, 0xAF, 0x22, 0xE5, 0x0E,
-0xC4, 0x54, 0xF0, 0x24, 0x05, 0xF5, 0x82, 0xE4,
-0x34, 0x81, 0xF5, 0x83, 0x22, 0x8D, 0x0E, 0xEF,
-0x30, 0xE6, 0x20, 0x11, 0xBC, 0xE0, 0xFD, 0x11,
-0x26, 0xE0, 0x54, 0x03, 0x90, 0x92, 0x80, 0xF0,
-0xE4, 0xFB, 0xAF, 0x0E, 0x12, 0x75, 0x80, 0x11,
-0xCB, 0xE4, 0xF0, 0x11, 0xBC, 0x11, 0xD7, 0x74,
-0x01, 0x80, 0x58, 0x11, 0xCB, 0xE0, 0x04, 0xF0,
-0x11, 0xCB, 0xE0, 0x64, 0x02, 0x70, 0x1E, 0x74,
-0x5E, 0x25, 0x0E, 0x31, 0xA0, 0xE0, 0xFD, 0xF4,
-0x60, 0x02, 0x80, 0x04, 0x11, 0xBC, 0xE0, 0xFD,
-0x11, 0x26, 0x12, 0xEB, 0x95, 0x11, 0xBC, 0x11,
-0xD7, 0x74, 0x02, 0x80, 0x2E, 0x11, 0xCB, 0xE0,
-0xD3, 0x94, 0x03, 0x40, 0x17, 0x90, 0x8A, 0xB3,
-0x12, 0x8B, 0xCF, 0xAF, 0x0E, 0x12, 0x04, 0x7E,
-0x11, 0xCB, 0xE4, 0xF0, 0x11, 0xBC, 0x11, 0xD7,
-0x74, 0x03, 0x80, 0x0F, 0x11, 0xBC, 0xE0, 0xFD,
-0x11, 0x26, 0x12, 0xEB, 0x95, 0x11, 0xBC, 0x11,
-0xD7, 0x74, 0x02, 0xF0, 0xAB, 0x0E, 0xE4, 0xFD,
-0xFF, 0x02, 0x6F, 0x75, 0xE5, 0x0E, 0xC4, 0x54,
-0xF0, 0x24, 0x00, 0xF5, 0x82, 0xE4, 0x34, 0x81,
-0xF5, 0x83, 0x22, 0x74, 0xB6, 0x25, 0x0E, 0xF5,
-0x82, 0xE4, 0x34, 0x8E, 0xF5, 0x83, 0x22, 0xE0,
-0x90, 0x92, 0x5E, 0xF0, 0xA3, 0x22, 0x8F, 0x75,
-0x8D, 0x76, 0xEF, 0x11, 0xBE, 0xE0, 0xFD, 0x54,
-0x7F, 0xF5, 0x77, 0xED, 0x54, 0x80, 0xF5, 0x78,
-0x12, 0xE5, 0x51, 0xF5, 0x7A, 0x75, 0xF0, 0x12,
-0xEF, 0x12, 0xA2, 0xBC, 0xC4, 0x54, 0x03, 0xF5,
-0x7B, 0x31, 0x9C, 0x74, 0xFF, 0xF0, 0x31, 0xA8,
-0xE5, 0x78, 0x4D, 0xFF, 0x12, 0xE5, 0x34, 0xEF,
-0xF0, 0xE5, 0x75, 0x11, 0x28, 0xE0, 0x54, 0x03,
-0xF5, 0x79, 0x74, 0x46, 0x25, 0x75, 0x12, 0xE5,
-0x40, 0xE5, 0x79, 0xF0, 0xE5, 0x77, 0x65, 0x7A,
-0x70, 0x22, 0x75, 0xF0, 0x12, 0xE5, 0x75, 0x12,
-0xA4, 0x3E, 0xC4, 0x13, 0x54, 0x07, 0x30, 0xE0,
-0x0B, 0xE5, 0x78, 0x70, 0x07, 0xE5, 0x77, 0x44,
-0x80, 0xFD, 0x80, 0x4B, 0x31, 0xA8, 0x7D, 0x07,
-0xAF, 0x75, 0x61, 0x2E, 0xE5, 0x77, 0xC3, 0x95,
-0x7A, 0x50, 0x35, 0xAB, 0x75, 0xAD, 0x7A, 0xAF,
-0x77, 0x12, 0x72, 0x7F, 0xAD, 0x07, 0xE5, 0x77,
-0xC3, 0x94, 0x0C, 0x40, 0x2A, 0x75, 0xF0, 0x12,
-0xE5, 0x75, 0x12, 0xA4, 0x3E, 0xFE, 0xC4, 0x13,
-0x54, 0x07, 0x30, 0xE0, 0x1A, 0xE5, 0x76, 0x60,
-0x16, 0xE5, 0x78, 0x70, 0x12, 0xE5, 0x77, 0x44,
-0x80, 0xFD, 0x31, 0x9C, 0xEF, 0xF0, 0x80, 0x07,
-0x12, 0xE5, 0x34, 0xE5, 0x7A, 0xF0, 0xFD, 0x90,
-0x92, 0x80, 0xE5, 0x79, 0xF0, 0xAB, 0x76, 0xAF,
-0x75, 0x02, 0x75, 0x80, 0x74, 0x5E, 0x25, 0x75,
-0xF5, 0x82, 0xE4, 0x34, 0x96, 0xF5, 0x83, 0x22,
-0xE5, 0x77, 0x25, 0xE0, 0x24, 0x75, 0xF5, 0x82,
-0xE4, 0x34, 0x81, 0xF5, 0x83, 0xE4, 0x93, 0xFE,
-0x74, 0x01, 0x93, 0xFF, 0xE5, 0x75, 0x25, 0xE0,
-0x24, 0x75, 0xF5, 0x82, 0xE4, 0x34, 0x8D, 0xF5,
-0x83, 0xEE, 0xF0, 0xA3, 0xEF, 0xF0, 0x22, 0xD3,
-0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0x90, 0x96,
-0xF3, 0x12, 0xAF, 0xE5, 0x12, 0xCD, 0xE4, 0x90,
-0x96, 0xFE, 0xF0, 0xE4, 0x90, 0x96, 0xFB, 0xF0,
-0x90, 0x96, 0xF3, 0x12, 0xB4, 0x3C, 0x90, 0x96,
-0xF6, 0xF0, 0xEF, 0x54, 0x07, 0x90, 0x96, 0xF8,
-0x71, 0x18, 0xE0, 0x90, 0x96, 0xF9, 0xF0, 0x12,
-0xE5, 0x51, 0x54, 0x7F, 0x90, 0x96, 0xFC, 0xF0,
-0x90, 0x96, 0xF3, 0xE0, 0x12, 0xE5, 0x48, 0xE0,
-0x90, 0x96, 0xFD, 0xF0, 0xED, 0x54, 0x7F, 0x90,
-0x96, 0xF7, 0xF0, 0xEB, 0x70, 0x21, 0x90, 0x89,
-0x3D, 0x71, 0x91, 0xFF, 0x12, 0xEB, 0xA3, 0xFD,
-0x90, 0x89, 0x40, 0x12, 0xBE, 0x4E, 0x2D, 0xFF,
-0xE4, 0x35, 0xF0, 0xC3, 0x13, 0xFE, 0xEF, 0x13,
-0xFF, 0x90, 0x96, 0xF3, 0xE0, 0x31, 0xBE, 0x90,
-0x96, 0xFC, 0xE0, 0xFF, 0x90, 0x96, 0xF7, 0xE0,
-0xFE, 0xD3, 0x9F, 0x40, 0x0C, 0x90, 0x96, 0xF4,
-0xE0, 0x54, 0x80, 0xFD, 0xEF, 0x4D, 0xF0, 0x80,
-0x0F, 0x90, 0x96, 0xFD, 0xE0, 0xFF, 0xEE, 0xC3,
-0x9F, 0x50, 0x05, 0x90, 0x96, 0xF4, 0xEF, 0xF0,
-0x90, 0x96, 0xF4, 0xE0, 0xFE, 0x54, 0x7F, 0x90,
-0x96, 0xF7, 0xF0, 0xEE, 0x54, 0x80, 0x90, 0x96,
-0xFA, 0xF0, 0x90, 0x96, 0xF5, 0xE0, 0x70, 0x22,
-0xA3, 0xE0, 0x71, 0x99, 0xC0, 0x83, 0xC0, 0x82,
-0x12, 0xD0, 0xBA, 0x08, 0x80, 0x02, 0xC3, 0x33,
-0xD8, 0xFC, 0xF4, 0x5F, 0xD0, 0x82, 0xD0, 0x83,
-0xF0, 0x90, 0x96, 0xF9, 0xE0, 0x54, 0x7F, 0xF0,
-0x80, 0x3A, 0x90, 0x96, 0xF6, 0xE0, 0x71, 0x99,
-0xC0, 0x83, 0xC0, 0x82, 0x12, 0xD0, 0xBA, 0x08,
-0x80, 0x02, 0xC3, 0x33, 0xD8, 0xFC, 0x4F, 0xD0,
-0x82, 0xD0, 0x83, 0x71, 0x18, 0xE0, 0x54, 0x07,
-0xFF, 0x90, 0x96, 0xF9, 0xF0, 0x90, 0x89, 0x46,
-0x71, 0x91, 0xF5, 0x82, 0x12, 0xBE, 0x53, 0x33,
-0x33, 0x33, 0x54, 0xF8, 0x4F, 0x90, 0x96, 0xF9,
-0xF0, 0x44, 0x80, 0xF0, 0x90, 0x96, 0xF4, 0x71,
-0x89, 0x11, 0xBE, 0xEF, 0xF0, 0xEE, 0x70, 0x05,
-0x90, 0x01, 0xC8, 0xEF, 0xF0, 0x90, 0x96, 0xF9,
-0x71, 0x89, 0x71, 0x1D, 0xEF, 0xF0, 0xEE, 0x11,
-0x28, 0xE0, 0x54, 0xFC, 0xFF, 0x90, 0x96, 0xFE,
-0xE0, 0x54, 0x03, 0x4F, 0xFE, 0x90, 0x96, 0xF3,
-0xE0, 0xFF, 0x11, 0x28, 0xEE, 0xF0, 0x7D, 0x01,
-0x12, 0x61, 0xF7, 0xD0, 0xD0, 0x92, 0xAF, 0x22,
-0xF0, 0x90, 0x96, 0xF3, 0xE0, 0xC4, 0x54, 0xF0,
-0x24, 0x01, 0xF5, 0x82, 0xE4, 0x34, 0x81, 0xF5,
-0x83, 0x22, 0x7D, 0x07, 0xAF, 0x67, 0xED, 0x30,
-0xE0, 0x1E, 0x75, 0xF0, 0x12, 0xEF, 0x90, 0x89,
-0x57, 0x71, 0x76, 0x90, 0x89, 0x59, 0x71, 0x76,
-0x90, 0x89, 0x5B, 0x71, 0x76, 0x90, 0x89, 0x5D,
-0x71, 0x76, 0x90, 0x89, 0x5F, 0x71, 0x82, 0xF0,
-0xED, 0x30, 0xE1, 0x0A, 0x75, 0xF0, 0x12, 0xEF,
-0x90, 0x89, 0x53, 0x71, 0x82, 0xF0, 0xED, 0x30,
-0xE2, 0x05, 0x12, 0xDB, 0xAF, 0xE4, 0xF0, 0x12,
-0xDA, 0xBC, 0xE0, 0x54, 0xBF, 0x44, 0x80, 0xFE,
-0x12, 0xDA, 0xBC, 0xEE, 0xF0, 0x22, 0x12, 0x04,
-0x6E, 0xE4, 0xF0, 0xA3, 0xF0, 0x75, 0xF0, 0x12,
-0xEF, 0x22, 0x12, 0x04, 0x6E, 0xE4, 0xF0, 0xA3,
-0x22, 0xE0, 0xFF, 0x90, 0x96, 0xF3, 0xE0, 0xFE,
-0x22, 0x12, 0x86, 0x39, 0x90, 0x96, 0xF7, 0xE0,
-0x22, 0x24, 0x6F, 0xF5, 0x82, 0xE4, 0x34, 0x8D,
-0xF5, 0x83, 0x22, 0x90, 0x04, 0x85, 0xE0, 0xF5,
-0x70, 0x90, 0x96, 0x5D, 0xE0, 0x04, 0xF0, 0xE4,
-0xF5, 0x67, 0x90, 0x88, 0x2B, 0xE0, 0xFF, 0xE5,
-0x67, 0xC3, 0x9F, 0x40, 0x03, 0x02, 0xA2, 0x2F,
-0xE5, 0x67, 0x11, 0xBE, 0xE0, 0xF5, 0x72, 0x12,
-0xEB, 0xD8, 0xE0, 0x65, 0x72, 0x60, 0x16, 0x90,
-0x92, 0x5E, 0xE5, 0x72, 0xF0, 0xE4, 0xA3, 0xF0,
-0xAB, 0x67, 0xFD, 0xFF, 0x12, 0x6F, 0x75, 0x12,
-0xEB, 0xD8, 0xE5, 0x72, 0xF0, 0x90, 0x04, 0xA0,
-0xE0, 0x64, 0x01, 0x70, 0x4E, 0xA3, 0xE0, 0x65,
-0x67, 0x70, 0x48, 0xA3, 0xE0, 0xF5, 0x68, 0xA3,
-0xE0, 0x90, 0x95, 0xDC, 0xF0, 0xE5, 0x67, 0x11,
-0xBE, 0xE0, 0x65, 0x68, 0x70, 0x03, 0x02, 0xA2,
-0x2A, 0xE5, 0x67, 0x11, 0xBE, 0xE5, 0x68, 0xF0,
-0xE5, 0x67, 0x11, 0x28, 0xE0, 0x54, 0xFC, 0xFF,
-0x90, 0x95, 0xDC, 0xE0, 0x54, 0x03, 0x4F, 0xFF,
-0xE5, 0x67, 0x11, 0x28, 0xEF, 0xF0, 0x90, 0x92,
-0x5E, 0xE5, 0x68, 0xF0, 0xA3, 0x74, 0xFF, 0xF0,
-0xAB, 0x67, 0xE4, 0xFD, 0xFF, 0x12, 0x6F, 0x75,
-0x02, 0xA2, 0x2A, 0x75, 0xF0, 0x12, 0xE5, 0x67,
-0x12, 0xDB, 0xB3, 0xE0, 0xFF, 0x90, 0x95, 0xD4,
-0xE4, 0xF0, 0xA3, 0xEF, 0xF0, 0x75, 0xF0, 0x12,
-0xE5, 0x67, 0x90, 0x89, 0x53, 0x12, 0x04, 0x6E,
-0xE0, 0xF5, 0x6D, 0xA3, 0xE0, 0xF5, 0x6E, 0xE5,
-0x67, 0x75, 0xF0, 0x12, 0xA4, 0x24, 0x57, 0xF9,
-0x74, 0x89, 0x35, 0xF0, 0xFA, 0x7B, 0x01, 0x90,
-0x95, 0xD1, 0x12, 0x86, 0x42, 0x12, 0xEC, 0x16,
-0xFF, 0x12, 0x03, 0x13, 0x2F, 0xFF, 0x12, 0xEC,
-0x1C, 0x2F, 0xFF, 0x12, 0xEB, 0x8F, 0x2F, 0xFF,
-0x12, 0xEB, 0xAF, 0x2F, 0xF5, 0x71, 0xE5, 0x67,
-0x11, 0xBE, 0xE0, 0xF5, 0x68, 0x54, 0x80, 0xF5,
-0x6A, 0xE5, 0x68, 0x54, 0x7F, 0xF5, 0x69, 0x75,
-0xF0, 0x12, 0xE5, 0x67, 0x12, 0xDA, 0x97, 0xE0,
-0x64, 0x01, 0x60, 0x02, 0xC1, 0x02, 0x12, 0xA2,
-0x86, 0x12, 0xEC, 0x16, 0xFF, 0xAE, 0xF0, 0x12,
-0x03, 0x13, 0x2F, 0xFF, 0xE5, 0xF0, 0x3E, 0xFE,
-0x12, 0xEC, 0x1C, 0x2F, 0xFF, 0xEE, 0x12, 0xEB,
-0x8C, 0x2F, 0xFF, 0xEE, 0x35, 0xF0, 0xFE, 0x12,
-0xEB, 0xAF, 0x2F, 0xFF, 0xEE, 0x35, 0xF0, 0x90,
-0x95, 0xD6, 0xF0, 0xA3, 0xEF, 0xF0, 0x12, 0x03,
-0x13, 0xFF, 0xC3, 0x90, 0x95, 0xD7, 0xE0, 0x9F,
-0xFE, 0x90, 0x95, 0xD6, 0xE0, 0x95, 0xF0, 0x90,
-0x95, 0xD8, 0xF0, 0xA3, 0xCE, 0xF0, 0x12, 0xEB,
-0x8F, 0xFD, 0xAC, 0xF0, 0x25, 0xE0, 0xFF, 0xEC,
-0x33, 0xFE, 0xEF, 0x2D, 0xFD, 0xEE, 0x3C, 0xFC,
-0x12, 0xEC, 0x1C, 0x25, 0xE0, 0xFF, 0xE5, 0xF0,
-0x33, 0xFE, 0x12, 0xEC, 0x16, 0x2F, 0xFF, 0xEE,
-0x35, 0xF0, 0xCF, 0x2D, 0xFD, 0xEF, 0x3C, 0xFC,
-0x12, 0xA2, 0x86, 0x12, 0xEB, 0xAF, 0xAE, 0xF0,
-0x78, 0x02, 0xC3, 0x33, 0xCE, 0x33, 0xCE, 0xD8,
-0xF9, 0x2D, 0xFF, 0xEC, 0x3E, 0x90, 0x95, 0xDA,
-0xF0, 0xA3, 0xEF, 0xF0, 0x90, 0x95, 0xD4, 0x12,
-0xEB, 0x33, 0x12, 0xEB, 0xEF, 0x12, 0xEB, 0x44,
-0x50, 0x08, 0x90, 0x95, 0xD4, 0x12, 0xEB, 0x77,
-0x80, 0x04, 0x7E, 0xFF, 0x7F, 0xFF, 0xE5, 0x67,
-0x12, 0xEB, 0xEF, 0x31, 0xC7, 0x90, 0x95, 0xD6,
-0x12, 0xEB, 0x33, 0x12, 0xEB, 0xF9, 0x12, 0xEB,
-0x44, 0x50, 0x08, 0x90, 0x95, 0xD6, 0x12, 0xEB,
-0x77, 0x80, 0x04, 0x7E, 0xFF, 0x7F, 0xFF, 0xE5,
-0x67, 0x12, 0xEB, 0xF9, 0x31, 0xC7, 0x90, 0x95,
-0xDA, 0x12, 0xEB, 0x33, 0x12, 0xEC, 0x03, 0x12,
-0xEB, 0x44, 0x50, 0x08, 0x90, 0x95, 0xDA, 0x12,
-0xEB, 0x77, 0x80, 0x04, 0x7E, 0xFF, 0x7F, 0xFF,
-0xE5, 0x67, 0x12, 0xEC, 0x03, 0x31, 0xC7, 0xC3,
-0x74, 0xFF, 0x95, 0x6E, 0xFF, 0x74, 0xFF, 0x95,
-0x6D, 0xFE, 0x12, 0xEB, 0xCC, 0x12, 0xEB, 0x44,
-0x50, 0x0A, 0xE5, 0x6E, 0x2D, 0xFF, 0xE5, 0x6D,
-0x3C, 0xFE, 0x80, 0x04, 0x7E, 0xFF, 0x7F, 0xFF,
-0x12, 0xEB, 0xCC, 0x31, 0xC7, 0x12, 0xEC, 0x6A,
-0xFB, 0xC3, 0x74, 0xFF, 0x9B, 0xFF, 0x74, 0xFF,
-0x9E, 0xFE, 0x74, 0xFF, 0x94, 0x00, 0xFD, 0x74,
-0xFF, 0x94, 0x00, 0xFC, 0x90, 0x8D, 0x71, 0x12,
-0xE9, 0x89, 0x50, 0x12, 0x12, 0xEC, 0x6A, 0xFF,
-0xE4, 0xFC, 0xFD, 0x90, 0x8D, 0x71, 0x12, 0x86,
-0x2D, 0x12, 0x85, 0xA9, 0x80, 0x06, 0x74, 0xFF,
-0xFF, 0xFE, 0xFD, 0xFC, 0x90, 0x8D, 0x71, 0x12,
-0x04, 0x31, 0xAF, 0x67, 0x12, 0x78, 0x4A, 0xEF,
-0x70, 0x03, 0x02, 0xA2, 0x2A, 0x75, 0xF0, 0x12,
-0xE5, 0x67, 0x90, 0x89, 0x52, 0x12, 0x04, 0x6E,
-0x12, 0x96, 0x94, 0x30, 0xE0, 0x03, 0x02, 0xA2,
-0x2A, 0xE5, 0x67, 0x13, 0x13, 0x13, 0x54, 0x1F,
-0x71, 0x99, 0xE0, 0xFD, 0x7C, 0x00, 0xE5, 0x67,
-0x12, 0xBF, 0x8F, 0x80, 0x05, 0xC3, 0x33, 0xCE,
-0x33, 0xCE, 0xD8, 0xF9, 0xFF, 0xEE, 0x5C, 0xFE,
-0xEF, 0x5D, 0x4E, 0x60, 0x03, 0x02, 0xA2, 0x2A,
-0xE5, 0x6E, 0x45, 0x6D, 0x70, 0x0D, 0x90, 0x95,
-0xD4, 0xE0, 0x70, 0x02, 0xA3, 0xE0, 0x70, 0x03,
-0x02, 0xA2, 0x2A, 0x90, 0x96, 0x4B, 0xE0, 0x60,
-0x12, 0x75, 0x73, 0x0A, 0x12, 0xEB, 0x69, 0xE4,
-0x93, 0xC3, 0x13, 0x74, 0x01, 0x93, 0x13, 0xF5,
-0x74, 0x80, 0x0A, 0x7B, 0xFF, 0x12, 0xD2, 0xA4,
-0xE4, 0xF5, 0x73, 0xF5, 0x74, 0x75, 0xF0, 0x12,
-0xE5, 0x67, 0x12, 0xE5, 0x55, 0xFF, 0xE5, 0x69,
-0xD3, 0x9F, 0x40, 0x08, 0x8F, 0x69, 0xE5, 0x69,
-0x45, 0x6A, 0xF5, 0x68, 0x12, 0xA2, 0x55, 0xC3,
-0x94, 0x05, 0x40, 0x03, 0x02, 0xA0, 0x28, 0xE5,
-0x69, 0x90, 0x81, 0x61, 0x93, 0xF5, 0x6F, 0xFD,
-0xAF, 0x69, 0x12, 0x60, 0x6F, 0x8F, 0x6F, 0xE5,
-0x6A, 0x60, 0x04, 0x05, 0x6F, 0x05, 0x6F, 0xE5,
-0x69, 0xC3, 0x94, 0x0C, 0x40, 0x1D, 0x74, 0x4D,
-0x25, 0x67, 0x12, 0xEC, 0x62, 0xE0, 0xFF, 0x54,
-0x7F, 0xFE, 0xEF, 0x30, 0xE7, 0x06, 0xE5, 0x6F,
-0x2E, 0xFF, 0x80, 0x05, 0xC3, 0xE5, 0x6F, 0x9E,
-0xFF, 0x8F, 0x6F, 0xE5, 0x6F, 0xD3, 0x94, 0x1A,
-0xAF, 0x6F, 0x40, 0x02, 0x7F, 0x1A, 0x8F, 0x6F,
-0xE5, 0x68, 0x90, 0x81, 0xD9, 0x93, 0xFF, 0xD3,
-0x90, 0x95, 0xD5, 0xE0, 0x9F, 0x90, 0x95, 0xD4,
-0xE0, 0x94, 0x00, 0x40, 0x02, 0xE1, 0xDD, 0xC3,
-0xE5, 0x6E, 0x94, 0x0A, 0xE5, 0x6D, 0x94, 0x00,
-0x40, 0x02, 0xE1, 0x8B, 0x12, 0xD1, 0x46, 0xE0,
-0xC3, 0x94, 0x01, 0x40, 0x06, 0x12, 0xD1, 0x46,
-0xE0, 0x14, 0xF0, 0x12, 0xA2, 0x86, 0x12, 0xEB,
-0xAF, 0xFF, 0x90, 0x95, 0xD5, 0xE0, 0x2F, 0xFF,
-0x90, 0x95, 0xD4, 0xE0, 0x12, 0xEB, 0x8C, 0x2F,
-0xFD, 0xEE, 0x35, 0xF0, 0xFC, 0xE5, 0x6D, 0xC3,
-0x13, 0xFE, 0xE5, 0x6E, 0x13, 0xFF, 0xD3, 0xED,
-0x9F, 0xEC, 0x9E, 0x40, 0x0E, 0xE5, 0x67, 0x94,
-0x05, 0x50, 0x06, 0x12, 0xD1, 0x46, 0x74, 0x02,
-0xF0, 0xE1, 0xDD, 0x12, 0xA2, 0x86, 0x12, 0x03,
-0x13, 0x65, 0x71, 0x70, 0x02, 0xE5, 0xF0, 0x70,
-0x24, 0xE5, 0x67, 0xC3, 0x94, 0x05, 0x50, 0x12,
-0x12, 0xD1, 0x46, 0xE0, 0xD3, 0x94, 0x00, 0x40,
-0x09, 0x7D, 0x06, 0xAF, 0x67, 0x71, 0x2E, 0x02,
-0xA2, 0x2A, 0xE4, 0xFD, 0xAF, 0x67, 0x11, 0xDE,
-0x71, 0x2A, 0x02, 0xA2, 0x07, 0x12, 0xA7, 0xE6,
-0x02, 0xA2, 0x07, 0x12, 0xD1, 0x46, 0xE4, 0xF0,
-0x90, 0x91, 0x6C, 0x74, 0x02, 0xF0, 0xAB, 0x6F,
-0xAD, 0x67, 0xAF, 0x6E, 0xAE, 0x6D, 0x12, 0x41,
-0x9C, 0x8E, 0x6B, 0x8F, 0x6C, 0x12, 0xEB, 0x69,
-0xC3, 0x74, 0x01, 0x93, 0x95, 0x74, 0xFF, 0xE4,
-0x93, 0x94, 0x00, 0xFE, 0xD3, 0xE5, 0x6C, 0x9F,
-0xE5, 0x6B, 0x9E, 0x40, 0x0E, 0x12, 0xA2, 0x6D,
-0xE4, 0xF0, 0x7D, 0x01, 0xAF, 0x67, 0x11, 0xDE,
-0x02, 0xA2, 0x07, 0x12, 0xEC, 0x5A, 0xC3, 0xE5,
-0x6C, 0x9F, 0xE5, 0x6B, 0x94, 0x00, 0x50, 0x0F,
-0x12, 0xA2, 0x6D, 0xE4, 0xF0, 0x7D, 0x01, 0xAF,
-0x67, 0x12, 0xE4, 0x7D, 0x02, 0xA2, 0x07, 0x71,
-0x2A, 0x12, 0xA2, 0x6D, 0xE0, 0x04, 0xF0, 0xE5,
-0x69, 0x90, 0x81, 0xED, 0x93, 0x25, 0x73, 0xFF,
-0xE4, 0x33, 0xFE, 0x12, 0xA2, 0x6D, 0xE0, 0xC3,
-0x9F, 0xEE, 0x51, 0x66, 0x50, 0x02, 0x41, 0x07,
-0x51, 0x6D, 0xE4, 0xF0, 0x12, 0xEC, 0x5A, 0x12,
-0xEB, 0x69, 0x74, 0x01, 0x93, 0x2F, 0xFF, 0xE4,
-0x93, 0x34, 0x00, 0xC3, 0x13, 0xFE, 0xEF, 0x13,
-0xFF, 0xE5, 0x67, 0x12, 0x99, 0xBE, 0x41, 0x07,
-0x51, 0x55, 0x64, 0x05, 0x60, 0x02, 0x01, 0xE3,
-0x90, 0x04, 0xA0, 0xE0, 0x64, 0x02, 0x70, 0x0F,
-0x51, 0x3C, 0xE4, 0xF0, 0x90, 0x04, 0xA1, 0xE0,
-0x78, 0x88, 0xF6, 0x91, 0x46, 0x41, 0x23, 0xAD,
-0x69, 0xAF, 0x67, 0x12, 0x72, 0xEE, 0x51, 0xAB,
-0xEF, 0xF0, 0xE5, 0x67, 0x12, 0x9B, 0x1D, 0xE0,
-0x54, 0x07, 0x78, 0x88, 0xF6, 0x51, 0x79, 0xFF,
-0xC3, 0x94, 0x30, 0x40, 0x1B, 0x75, 0xF0, 0x12,
-0xE5, 0x67, 0x51, 0xBC, 0xFE, 0xC4, 0x13, 0x13,
-0x54, 0x03, 0x20, 0xE0, 0x0B, 0x51, 0xAB, 0xE0,
-0x60, 0x06, 0x90, 0x96, 0x4B, 0xE0, 0x60, 0x0A,
-0xE4, 0x78, 0x88, 0xF6, 0x51, 0x3C, 0xE4, 0xF0,
-0x80, 0x52, 0x51, 0x9F, 0xE0, 0xFE, 0x24, 0x05,
-0xFD, 0xE4, 0x33, 0xFC, 0xEF, 0x51, 0x63, 0x50,
-0x1B, 0x51, 0x79, 0x24, 0x05, 0xFD, 0xE4, 0x33,
-0xFC, 0xEE, 0x51, 0x63, 0x50, 0x0E, 0x51, 0x93,
-0xE0, 0xB5, 0x69, 0x08, 0x51, 0x49, 0xE0, 0xC3,
-0x94, 0x0A, 0x40, 0x23, 0x78, 0x88, 0xE6, 0xFF,
-0x70, 0x04, 0x76, 0x01, 0x80, 0x0C, 0xEF, 0x78,
-0x88, 0xB4, 0x01, 0x04, 0x76, 0x03, 0x80, 0x02,
-0x76, 0x05, 0x51, 0x49, 0xE4, 0xF0, 0x51, 0x79,
-0xFF, 0x51, 0x9F, 0xEF, 0xF0, 0x80, 0x05, 0x51,
-0x3C, 0xE0, 0x04, 0xF0, 0x51, 0x93, 0xE5, 0x69,
-0xF0, 0x41, 0x03, 0x51, 0x55, 0x64, 0x06, 0x60,
-0x02, 0x41, 0x07, 0xF5, 0x6B, 0xF5, 0x6C, 0xE5,
-0x67, 0x12, 0x9B, 0x1D, 0xE0, 0x54, 0x07, 0x78,
-0x88, 0xF6, 0xD3, 0xE5, 0x6E, 0x94, 0xE8, 0xE5,
-0x6D, 0x94, 0x03, 0x40, 0x06, 0x78, 0x86, 0x76,
-0x05, 0x80, 0x15, 0xD3, 0xE5, 0x6E, 0x94, 0xFA,
-0xE5, 0x6D, 0x94, 0x00, 0x40, 0x06, 0x78, 0x86,
-0x76, 0x02, 0x80, 0x04, 0xE4, 0x78, 0x86, 0xF6,
-0xE5, 0x6E, 0xAE, 0x6D, 0x78, 0x86, 0x86, 0x00,
-0x08, 0x80, 0x05, 0xCE, 0xC3, 0x13, 0xCE, 0x13,
-0xD8, 0xF9, 0xFF, 0x90, 0x82, 0x06, 0xE4, 0x51,
-0x8C, 0x90, 0x95, 0xDD, 0xEE, 0xF0, 0xA3, 0xEF,
-0xF0, 0xE4, 0x78, 0x87, 0xF6, 0x51, 0x86, 0x78,
-0x87, 0xE6, 0xFD, 0x12, 0xEB, 0xA3, 0xAE, 0xF0,
-0x78, 0x86, 0x86, 0x00, 0x08, 0x80, 0x05, 0xCE,
-0xC3, 0x13, 0xCE, 0x13, 0xD8, 0xF9, 0xFF, 0xED,
-0x90, 0x82, 0x01, 0x51, 0x8C, 0xEF, 0x25, 0x6C,
-0xF5, 0x6C, 0xEE, 0x35, 0x6B, 0xF5, 0x6B, 0xC3,
-0x90, 0x95, 0xDE, 0xE0, 0x95, 0x6C, 0x90, 0x95,
-0xDD, 0xE0, 0x95, 0x6B, 0x40, 0x07, 0x78, 0x87,
-0x06, 0xE6, 0xB4, 0x05, 0xC0, 0x78, 0x87, 0xE6,
-0xC3, 0x13, 0xF6, 0xFD, 0x08, 0xE6, 0x24, 0x01,
-0xFF, 0xE4, 0x33, 0xA2, 0xE7, 0x13, 0xEF, 0x13,
-0x08, 0xF6, 0xD3, 0x9D, 0x40, 0x07, 0xE6, 0x79,
-0x87, 0x97, 0xF6, 0x80, 0x04, 0xE4, 0x78, 0x89,
-0xF6, 0x51, 0x30, 0xE0, 0xC3, 0x13, 0xFF, 0x78,
-0x89, 0xE6, 0xC4, 0x33, 0x54, 0xE0, 0x2F, 0xFF,
-0x51, 0x30, 0xEF, 0xF0, 0x51, 0x30, 0xE0, 0xC3,
-0x94, 0xC0, 0x40, 0x05, 0x51, 0x30, 0x74, 0xC0,
-0xF0, 0x51, 0x30, 0xE0, 0x24, 0x1F, 0xFF, 0xE4,
-0x33, 0xFE, 0xEF, 0x78, 0x06, 0xCE, 0xA2, 0xE7,
-0x13, 0xCE, 0x13, 0xD8, 0xF8, 0x78, 0x89, 0xF6,
-0xE6, 0x25, 0xE0, 0xF6, 0x70, 0x03, 0xFF, 0x80,
-0x05, 0x78, 0x89, 0xE6, 0x14, 0xFF, 0x78, 0x88,
-0xA6, 0x07, 0xD3, 0x90, 0x95, 0xD5, 0xE0, 0x94,
-0x03, 0x90, 0x95, 0xD4, 0xE0, 0x94, 0x00, 0x40,
-0x02, 0xE4, 0xF6, 0x78, 0x88, 0x91, 0x46, 0x51,
-0x55, 0xFF, 0xD3, 0x94, 0x05, 0x50, 0x05, 0xEF,
-0x04, 0xFF, 0x80, 0x02, 0x7F, 0x00, 0x74, 0x76,
-0x25, 0x67, 0xF5, 0x82, 0xE4, 0x34, 0x8E, 0xF5,
-0x83, 0xEF, 0xF0, 0xE4, 0xF5, 0x6B, 0xF5, 0x6C,
-0xF1, 0xE6, 0x05, 0x67, 0x02, 0x9B, 0xB2, 0x22,
-0x74, 0x4F, 0x25, 0x67, 0xF5, 0x82, 0xE4, 0x34,
-0x8D, 0xF5, 0x83, 0x22, 0x74, 0x76, 0x25, 0x67,
-0xF5, 0x82, 0xE4, 0x34, 0x8E, 0xF5, 0x83, 0xE4,
-0xF0, 0x74, 0xF6, 0x25, 0x67, 0xF5, 0x82, 0xE4,
-0x34, 0x8D, 0xF5, 0x83, 0x22, 0x74, 0x76, 0x25,
-0x67, 0xF5, 0x82, 0xE4, 0x34, 0x8E, 0xF5, 0x83,
-0xE0, 0x22, 0xE0, 0xD3, 0x9D, 0xEC, 0x64, 0x80,
-0xF8, 0x74, 0x80, 0x98, 0x22, 0x74, 0xA6, 0x25,
-0x67, 0xF5, 0x82, 0xE4, 0x34, 0x8D, 0xF5, 0x83,
-0x22, 0x74, 0xD6, 0x25, 0x67, 0xF5, 0x82, 0xE4,
-0x34, 0x8D, 0xF5, 0x83, 0xE0, 0x22, 0x90, 0x95,
-0xD1, 0x02, 0x86, 0x39, 0x93, 0xFD, 0x7C, 0x00,
-0x02, 0x02, 0x80, 0x74, 0xA6, 0x25, 0x67, 0xF5,
-0x82, 0xE4, 0x34, 0x8E, 0xF5, 0x83, 0x22, 0x74,
-0x5F, 0x25, 0x67, 0xF5, 0x82, 0xE4, 0x34, 0x8D,
-0xF5, 0x83, 0x22, 0x74, 0xE6, 0x25, 0x67, 0xF5,
-0x82, 0xE4, 0x34, 0x8D, 0xF5, 0x83, 0x22, 0xFF,
-0x75, 0xF0, 0x12, 0xED, 0x90, 0x89, 0x52, 0x12,
-0x04, 0x6E, 0xE0, 0x22, 0x90, 0x96, 0xFF, 0x12,
-0x86, 0x42, 0x91, 0x27, 0x12, 0x02, 0x06, 0x54,
-0x7F, 0xFD, 0x12, 0x87, 0xBC, 0xFE, 0x54, 0x1F,
-0x90, 0x97, 0x03, 0xF0, 0xEE, 0x54, 0x80, 0x12,
-0x96, 0x95, 0x90, 0x97, 0x02, 0xF0, 0x12, 0x87,
-0xB1, 0xFE, 0x54, 0x03, 0xFC, 0xEE, 0x54, 0x30,
-0xC4, 0x54, 0x0F, 0x90, 0x97, 0x05, 0xF0, 0x12,
-0x87, 0xB1, 0xFE, 0x54, 0x40, 0xC4, 0x13, 0x13,
-0x54, 0x03, 0x90, 0x97, 0x04, 0xF0, 0xEE, 0x54,
-0x80, 0x12, 0x96, 0x95, 0xFF, 0x12, 0x87, 0xB1,
-0xFB, 0x54, 0x08, 0x13, 0x13, 0x13, 0x54, 0x1F,
-0x90, 0x97, 0x07, 0xF0, 0xFA, 0xEB, 0x54, 0x04,
-0x13, 0x13, 0x54, 0x3F, 0xA3, 0xF0, 0xEF, 0x12,
-0xEC, 0x2B, 0x51, 0xB7, 0x54, 0x7F, 0x4F, 0xF0,
-0x90, 0x97, 0x04, 0xE0, 0xF1, 0x4D, 0x51, 0xB7,
-0x54, 0xBF, 0x4F, 0xF0, 0xEA, 0x70, 0x0D, 0xEC,
-0x54, 0x03, 0x25, 0xE0, 0x25, 0xE0, 0x51, 0xB7,
-0x54, 0xF3, 0x4F, 0xF0, 0x90, 0x97, 0x03, 0xE0,
-0x54, 0x1F, 0x91, 0x39, 0x54, 0xE0, 0x4F, 0xF0,
-0xEC, 0x54, 0x03, 0x51, 0xB7, 0x54, 0xFC, 0x4F,
-0xF0, 0x90, 0x97, 0x02, 0xE0, 0x54, 0x01, 0xC4,
-0x33, 0x54, 0xE0, 0x91, 0x39, 0x54, 0xDF, 0x4F,
-0xF0, 0x90, 0x97, 0x05, 0xE0, 0x54, 0x03, 0xC4,
-0x54, 0xF0, 0x51, 0xB7, 0x54, 0xCF, 0x4F, 0x91,
-0x2D, 0xE0, 0x54, 0xFB, 0x91, 0x2D, 0xC0, 0x83,
-0xC0, 0x82, 0xE0, 0xFF, 0x90, 0x97, 0x08, 0xE0,
-0x12, 0xEC, 0x52, 0xD0, 0x82, 0xD0, 0x83, 0xF0,
-0x90, 0x93, 0xED, 0xE0, 0x60, 0x3A, 0x91, 0x27,
-0xE9, 0x24, 0x03, 0xF9, 0xE4, 0x3A, 0xFA, 0x12,
-0x02, 0x06, 0x54, 0x1F, 0x12, 0x02, 0x4C, 0x90,
-0x97, 0x06, 0x74, 0x01, 0xF0, 0x90, 0x97, 0x06,
-0xE0, 0xFF, 0xC3, 0x94, 0x04, 0x50, 0x19, 0xEF,
-0x24, 0x03, 0xFF, 0xE4, 0x33, 0xFE, 0x91, 0x27,
-0x8F, 0x82, 0x8E, 0x83, 0xE4, 0x12, 0x02, 0x5E,
-0x90, 0x97, 0x06, 0xE0, 0x04, 0xF0, 0x80, 0xDD,
-0x90, 0x93, 0xEB, 0xE0, 0x54, 0x07, 0xFF, 0xBF,
-0x05, 0x0A, 0xEC, 0xB4, 0x01, 0x06, 0x90, 0x93,
-0xF0, 0x74, 0x01, 0xF0, 0xE4, 0x90, 0x97, 0x06,
-0xF0, 0x90, 0x97, 0x06, 0xE0, 0xFC, 0x24, 0x03,
-0xFF, 0xE4, 0x33, 0xFE, 0x90, 0x96, 0xFF, 0x12,
-0xBC, 0xE4, 0xFF, 0xED, 0x12, 0xE4, 0x6F, 0x12,
-0xD9, 0x62, 0xEF, 0xF0, 0x90, 0x97, 0x06, 0xE0,
-0x04, 0xF0, 0xE0, 0xB4, 0x04, 0xDB, 0xAF, 0x05,
-0x90, 0x8A, 0xFF, 0xE0, 0xFC, 0xA3, 0xE0, 0xFD,
-0xF5, 0x82, 0x8C, 0x83, 0x02, 0x04, 0x7E, 0x90,
-0x96, 0xFF, 0x02, 0x86, 0x39, 0xF0, 0x74, 0xC6,
-0x2D, 0xF5, 0x82, 0xE4, 0x34, 0x8D, 0xF5, 0x83,
-0x22, 0xFF, 0x75, 0xF0, 0x12, 0xED, 0x90, 0x89,
-0x51, 0x12, 0x04, 0x6E, 0xE0, 0x22, 0xE6, 0xFD,
-0xAF, 0x67, 0xEF, 0x12, 0x9B, 0x1D, 0xE0, 0x54,
-0xF8, 0xF5, 0x75, 0xED, 0x42, 0x75, 0xEF, 0x12,
-0x9B, 0x1D, 0xE5, 0x75, 0xF0, 0x22, 0x12, 0x02,
-0x06, 0xFE, 0x12, 0x87, 0xB1, 0xFF, 0x74, 0xD6,
-0x2E, 0xF5, 0x82, 0xE4, 0x34, 0x8D, 0x12, 0x87,
-0xA2, 0xFF, 0x74, 0xC6, 0x2E, 0xF5, 0x82, 0xE4,
-0x34, 0x8D, 0x12, 0x87, 0x72, 0xFF, 0x74, 0x4D,
-0x2E, 0x12, 0xEC, 0x62, 0xEF, 0xF0, 0x74, 0xC6,
-0x2E, 0x91, 0x31, 0xE0, 0x30, 0xE5, 0x16, 0x75,
-0xF0, 0x12, 0xEE, 0x51, 0xBC, 0x13, 0x13, 0x54,
-0x03, 0xFB, 0xAF, 0x06, 0x74, 0xD6, 0x2E, 0x51,
-0x7D, 0xFD, 0x12, 0x6B, 0xFD, 0x22, 0xD3, 0x10,
-0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0x12, 0xCD, 0xE4,
-0x90, 0x97, 0x47, 0xF0, 0x90, 0x88, 0x32, 0x12,
-0x96, 0x94, 0x30, 0xE0, 0x02, 0xA1, 0x6C, 0x90,
-0x88, 0x31, 0xE0, 0x30, 0xE0, 0x1F, 0x90, 0x88,
-0x53, 0xE0, 0x24, 0x04, 0x33, 0x33, 0x33, 0x54,
-0xF8, 0x90, 0x88, 0x4B, 0xF0, 0x90, 0x88, 0x53,
-0xE0, 0x04, 0x33, 0x33, 0x33, 0x54, 0xF8, 0x90,
-0x88, 0x4A, 0xF0, 0x80, 0x10, 0x90, 0x88, 0x4B,
-0x74, 0x10, 0xF0, 0x90, 0x88, 0x4A, 0x74, 0x08,
-0xF0, 0x74, 0x10, 0x2B, 0xFB, 0x90, 0x88, 0x4A,
-0xE0, 0xFE, 0x90, 0x88, 0x49, 0xE0, 0xD3, 0x9E,
-0x50, 0x0E, 0x90, 0x88, 0x3E, 0xEB, 0xF0, 0x90,
-0x88, 0x4B, 0xE0, 0xC3, 0x9D, 0x2F, 0x80, 0x11,
-0xC3, 0xED, 0x9E, 0x2B, 0x90, 0x88, 0x3E, 0xF0,
-0x90, 0x88, 0x4A, 0xE0, 0xFF, 0xA3, 0xE0, 0xC3,
-0x9F, 0x90, 0x88, 0x4E, 0xF0, 0x90, 0x88, 0x4B,
-0xB1, 0x78, 0x90, 0x88, 0x4E, 0x51, 0x62, 0x40,
-0x04, 0xEF, 0x24, 0x50, 0xF0, 0x90, 0x88, 0x4E,
-0xB1, 0x78, 0x90, 0x88, 0x3E, 0x51, 0x62, 0x40,
-0x04, 0xEF, 0x24, 0x50, 0xF0, 0x90, 0x88, 0x4E,
-0xB1, 0x89, 0xFF, 0x7E, 0x00, 0x90, 0x88, 0x42,
-0xEE, 0xF0, 0xA3, 0xEF, 0xF0, 0x90, 0x05, 0x58,
-0xF0, 0x90, 0x88, 0x4E, 0xE0, 0x54, 0x07, 0xFF,
-0x90, 0x05, 0xB1, 0xE0, 0x54, 0xF8, 0x4F, 0xF0,
-0xF1, 0xED, 0x80, 0x07, 0x90, 0x88, 0x33, 0xE0,
-0x44, 0x01, 0xF0, 0xD0, 0xD0, 0x92, 0xAF, 0x22,
-0xE0, 0xFF, 0x24, 0x50, 0xFD, 0xE4, 0x33, 0xFC,
-0x22, 0xE4, 0x90, 0x92, 0x20, 0xF0, 0x90, 0x88,
-0x3E, 0xE0, 0x13, 0x13, 0x13, 0x54, 0x1F, 0x22,
-0xE4, 0xF5, 0x7C, 0x90, 0x88, 0x36, 0xE0, 0x60,
-0x64, 0xF1, 0x5D, 0x70, 0x60, 0xF1, 0xBE, 0x75,
-0x7C, 0x01, 0x90, 0x88, 0x2C, 0xE0, 0x30, 0xE0,
-0x11, 0x90, 0x88, 0x30, 0xE0, 0xB4, 0x02, 0x03,
-0xE4, 0xF5, 0x7C, 0xD1, 0x7B, 0xEF, 0x70, 0x02,
-0xF5, 0x7C, 0xE5, 0x7C, 0x60, 0x3F, 0x90, 0x88,
-0x39, 0xE0, 0x20, 0xE2, 0x08, 0x90, 0x8A, 0xB9,
-0x12, 0x8B, 0xCF, 0xF1, 0x46, 0xF1, 0x55, 0x90,
-0x88, 0x3F, 0xE0, 0x60, 0x04, 0x64, 0x01, 0x70,
-0x0F, 0xB1, 0x81, 0xFF, 0xA3, 0xE0, 0x2F, 0xD1,
-0x15, 0xB1, 0x86, 0xFF, 0xA3, 0xE0, 0x80, 0x0B,
-0xB1, 0x81, 0xB1, 0xFE, 0x2F, 0xD1, 0x15, 0xB1,
-0x86, 0xB1, 0xFE, 0x2F, 0x33, 0x33, 0x33, 0x54,
-0xF8, 0x90, 0x88, 0x4F, 0xF0, 0x22, 0xFF, 0xA3,
-0xE0, 0x75, 0xF0, 0x03, 0xA4, 0x24, 0xFE, 0x22,
-0xE0, 0x44, 0x02, 0xF0, 0xE4, 0x90, 0x92, 0x20,
-0xF0, 0x90, 0x88, 0x94, 0xE0, 0x90, 0x92, 0x21,
-0xF0, 0xE4, 0xFB, 0xFD, 0x7F, 0x54, 0x7E, 0x01,
-0x02, 0x66, 0x33, 0xE4, 0x90, 0x96, 0x15, 0xF0,
-0x90, 0x88, 0x36, 0xE0, 0x60, 0x4C, 0xF1, 0x5D,
-0x70, 0x48, 0x12, 0xEC, 0x4A, 0xF0, 0xF1, 0xBE,
-0x90, 0x96, 0x15, 0x74, 0x01, 0xF0, 0xE4, 0x90,
-0x88, 0x3D, 0xF0, 0x90, 0x88, 0x2C, 0xE0, 0x30,
-0xE0, 0x15, 0x90, 0x88, 0x30, 0xE0, 0xB4, 0x02,
-0x05, 0xE4, 0x90, 0x96, 0x15, 0xF0, 0xD1, 0x7B,
-0xEF, 0x70, 0x04, 0x90, 0x96, 0x15, 0xF0, 0x90,
-0x96, 0x15, 0xE0, 0x60, 0x15, 0x90, 0x88, 0x39,
-0xE0, 0x20, 0xE2, 0x08, 0x90, 0x8A, 0xB9, 0x12,
-0x8B, 0xCF, 0xF1, 0x46, 0xF1, 0x55, 0xB1, 0x81,
-0xD1, 0x15, 0x22, 0x90, 0x05, 0x43, 0xE0, 0x7F,
-0x00, 0x30, 0xE7, 0x02, 0x7F, 0x01, 0x22, 0x90,
-0x93, 0x58, 0xE0, 0x30, 0xE0, 0x7B, 0x90, 0x93,
-0xDA, 0xE0, 0x04, 0xF1, 0x66, 0x04, 0xFF, 0x90,
-0x96, 0x15, 0xF0, 0x90, 0x93, 0x59, 0xE0, 0xB5,
-0x07, 0x05, 0xE4, 0x90, 0x96, 0x15, 0xF0, 0x90,
-0x93, 0xD8, 0xE0, 0xFF, 0x60, 0x0F, 0xF1, 0x0A,
-0xC3, 0x9F, 0xF1, 0x1D, 0xFB, 0xFD, 0x7F, 0x50,
-0x7E, 0x01, 0x12, 0x66, 0x33, 0x90, 0x96, 0x15,
-0xE0, 0xF1, 0x30, 0x54, 0x07, 0x90, 0x96, 0x16,
-0xF1, 0x27, 0x54, 0x07, 0xFF, 0x14, 0x60, 0x0E,
-0x14, 0x60, 0x07, 0x14, 0x60, 0x08, 0x24, 0x03,
-0x70, 0x09, 0xF1, 0x3F, 0x80, 0x02, 0xF1, 0x3F,
-0x12, 0xA9, 0x03, 0x12, 0xEB, 0xC0, 0x50, 0x21,
-0x90, 0x96, 0x16, 0xE0, 0xFF, 0x64, 0x02, 0x60,
-0x03, 0xEF, 0x70, 0x0E, 0xF1, 0x0A, 0x24, 0xFC,
-0xFF, 0xE4, 0x90, 0x92, 0x20, 0xF0, 0xA3, 0xEF,
-0xD1, 0x18, 0xF1, 0x0A, 0xF1, 0x1D, 0x12, 0xEB,
-0x83, 0x22, 0x90, 0x96, 0x15, 0xE0, 0x75, 0xF0,
-0x1B, 0xA4, 0x24, 0x5D, 0xF5, 0x82, 0xE4, 0x34,
-0x93, 0xF5, 0x83, 0xE0, 0x22, 0x90, 0x92, 0x21,
-0xF0, 0xE4, 0x90, 0x92, 0x20, 0xF0, 0x22, 0xF0,
-0x90, 0x93, 0x58, 0xE0, 0xC3, 0x13, 0x54, 0x07,
-0x75, 0xF0, 0x1B, 0xA4, 0x24, 0x5E, 0xF5, 0x82,
-0xE4, 0x34, 0x93, 0xF5, 0x83, 0xE0, 0x22, 0x90,
-0x93, 0x5A, 0x74, 0x05, 0xF0, 0x22, 0x7D, 0x01,
-0x7F, 0x04, 0x02, 0x04, 0x7E, 0x54, 0x01, 0xC4,
-0x33, 0x33, 0x54, 0xC0, 0x22, 0x90, 0x88, 0x3A,
-0xE0, 0x44, 0x10, 0xF0, 0x22, 0xE4, 0xFF, 0x12,
-0x78, 0x4A, 0xEF, 0x64, 0x01, 0x22, 0xF0, 0x90,
-0x93, 0x58, 0xE0, 0xC3, 0x13, 0x54, 0x07, 0x22,
-0xF1, 0x5D, 0x70, 0x12, 0x90, 0x88, 0x36, 0xE0,
-0x60, 0x0C, 0x90, 0x88, 0x3A, 0xE0, 0x20, 0xE4,
-0x05, 0x12, 0xDD, 0xB4, 0xD1, 0x0B, 0x22, 0xD3,
-0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0xD1, 0x7B,
-0xBF, 0x01, 0x04, 0x7F, 0x01, 0x80, 0x02, 0x7F,
-0x02, 0x12, 0xB2, 0xEC, 0xD0, 0xD0, 0x92, 0xAF,
-0x22, 0xAE, 0x07, 0xD1, 0x7B, 0xBF, 0x01, 0x13,
-0x12, 0xAF, 0x80, 0x20, 0xE0, 0x0D, 0xAF, 0x06,
-0x12, 0xB4, 0x59, 0x7D, 0x01, 0x12, 0x04, 0x7E,
-0x7F, 0x01, 0x22, 0x7F, 0x00, 0x22, 0x90, 0x05,
-0x63, 0xE0, 0x90, 0x88, 0x89, 0xF0, 0x90, 0x05,
-0x62, 0xE0, 0x90, 0x88, 0x8A, 0xF0, 0x90, 0x05,
-0x61, 0xE0, 0x90, 0x88, 0x8B, 0xF0, 0x90, 0x05,
-0x60, 0xE0, 0x90, 0x88, 0x8C, 0xF0, 0x90, 0x88,
-0x32, 0xE0, 0x44, 0x80, 0xF0, 0x22, 0x7D, 0x01,
-0xAF, 0x67, 0x02, 0x61, 0xF7, 0x90, 0x88, 0x33,
-0xE0, 0x54, 0xFE, 0xF0, 0x22, 0x90, 0x95, 0x4E,
-0x12, 0x86, 0x42, 0x90, 0x04, 0x24, 0xE0, 0xFF,
-0xE4, 0xFE, 0x12, 0x93, 0xDD, 0x8E, 0x82, 0x12,
-0xBE, 0x53, 0x2F, 0xFD, 0xEE, 0x11, 0x1B, 0xED,
-0xF0, 0x0E, 0xEE, 0xB4, 0x03, 0xEC, 0x22, 0xC3,
-0x13, 0x54, 0x07, 0x75, 0xF0, 0x1B, 0xA4, 0x24,
-0x64, 0xF5, 0x82, 0xE4, 0x34, 0x93, 0xF5, 0x83,
-0x22, 0x12, 0x92, 0x54, 0xEF, 0x70, 0x02, 0xFF,
-0x22, 0x12, 0xA7, 0x67, 0x90, 0x93, 0xAC, 0xF0,
-0x90, 0x93, 0x58, 0xE0, 0xFF, 0xC3, 0x13, 0xFE,
-0xEF, 0x54, 0xF1, 0xFF, 0xEE, 0x04, 0x54, 0x07,
-0x25, 0xE0, 0x4F, 0xF0, 0xA3, 0xE0, 0xFF, 0x90,
-0x93, 0x58, 0xE0, 0xFE, 0xC3, 0x13, 0x54, 0x07,
-0xB5, 0x07, 0x04, 0xEE, 0x54, 0xF1, 0xF0, 0x12,
-0xA7, 0x67, 0xF5, 0x7D, 0xE4, 0x90, 0x93, 0x5A,
-0xF0, 0xE5, 0x7D, 0x75, 0xF0, 0x1B, 0xA4, 0x24,
-0x5F, 0xF5, 0x82, 0xE4, 0x34, 0x93, 0xF5, 0x83,
-0xE0, 0x30, 0xE0, 0x28, 0x11, 0xF7, 0xE0, 0x24,
-0xAF, 0xF5, 0x82, 0xE4, 0x34, 0x93, 0xF5, 0x83,
-0xE0, 0xFF, 0xB1, 0x74, 0xF5, 0x83, 0xEF, 0x11,
-0xF6, 0xE0, 0x04, 0x11, 0xF6, 0xE0, 0xFF, 0x90,
-0x93, 0xAE, 0xE0, 0xFE, 0xEF, 0xB5, 0x06, 0x04,
-0x11, 0xF7, 0xE4, 0xF0, 0xB1, 0x74, 0xF5, 0x83,
-0xE0, 0xFC, 0x90, 0x93, 0xAC, 0xE0, 0xB1, 0x76,
-0xF5, 0x83, 0xE0, 0x6C, 0x60, 0x0C, 0xE5, 0x7D,
-0xB1, 0x84, 0xD1, 0x24, 0xE5, 0x7D, 0xB1, 0x84,
-0x31, 0xF2, 0xE5, 0x7D, 0x12, 0xA7, 0x30, 0x54,
-0x07, 0xFF, 0x60, 0x03, 0xBF, 0x02, 0x0E, 0xE5,
-0x7D, 0x11, 0x1B, 0xE0, 0xFF, 0x7E, 0x00, 0x7B,
-0x04, 0xE4, 0xFD, 0x91, 0xAA, 0xAD, 0x7D, 0x7F,
-0x01, 0x71, 0xB1, 0x90, 0x93, 0xAD, 0xE0, 0xC3,
-0x13, 0x54, 0x03, 0xFF, 0xBF, 0x02, 0x04, 0xE4,
-0xFF, 0xF1, 0xEE, 0x7F, 0x01, 0x22, 0xF0, 0x74,
-0xD2, 0x25, 0x7D, 0xF5, 0x82, 0xE4, 0x34, 0x93,
-0xF5, 0x83, 0x22, 0xE4, 0x90, 0x96, 0x1A, 0xF0,
-0x90, 0x93, 0x58, 0xE0, 0x20, 0xE0, 0x02, 0x21,
-0xF1, 0x12, 0xA7, 0x2C, 0x54, 0x07, 0x90, 0x96,
-0x17, 0xF0, 0x60, 0x05, 0xE0, 0x64, 0x02, 0x70,
-0x63, 0x90, 0x93, 0x5A, 0xE0, 0x70, 0x3F, 0x90,
-0x05, 0x22, 0xE0, 0x90, 0x96, 0x18, 0xF0, 0x7B,
-0x4E, 0x7D, 0x6F, 0xE4, 0xFF, 0x91, 0x35, 0x90,
-0x93, 0x58, 0xE0, 0x11, 0x17, 0xE0, 0xFF, 0x7E,
-0x00, 0x7B, 0x04, 0x7D, 0x01, 0x91, 0xAA, 0xBF,
-0x01, 0x11, 0x90, 0x93, 0x58, 0xE0, 0xB1, 0x62,
-0xE0, 0x44, 0x01, 0xF0, 0x90, 0x93, 0x5A, 0x74,
-0x01, 0xF0, 0x22, 0x90, 0x96, 0x18, 0xE0, 0xFD,
-0x7B, 0x4F, 0xE4, 0xFF, 0x81, 0x35, 0x90, 0x93,
-0x5A, 0xE0, 0xB4, 0x01, 0x03, 0x74, 0x05, 0xF0,
-0x12, 0xA7, 0x67, 0x71, 0xAE, 0x90, 0x93, 0x5A,
-0xE0, 0x64, 0x05, 0x70, 0x74, 0x11, 0x29, 0xEF,
-0x70, 0x6F, 0x80, 0x69, 0x90, 0x96, 0x17, 0xE0,
-0xFF, 0x64, 0x03, 0x60, 0x05, 0xEF, 0x64, 0x01,
-0x70, 0x5F, 0x90, 0x93, 0x5A, 0xE0, 0x64, 0x05,
-0x70, 0x57, 0x90, 0x96, 0x17, 0xE0, 0x64, 0x01,
-0x70, 0x41, 0x90, 0x96, 0x19, 0x12, 0xA7, 0x0D,
-0xD3, 0x94, 0x1F, 0x90, 0x93, 0x58, 0xE0, 0x40,
-0x10, 0x11, 0x18, 0xE0, 0xFF, 0x90, 0x8A, 0xBF,
-0x12, 0xB4, 0x5C, 0x7D, 0x00, 0x7C, 0x7C, 0x80,
-0x1F, 0x11, 0x17, 0xE0, 0xFB, 0x90, 0x96, 0x19,
-0x12, 0xA7, 0x0D, 0x7D, 0x00, 0x25, 0xE0, 0x25,
-0xE0, 0xFC, 0xAF, 0x03, 0x90, 0x8A, 0xBF, 0xE0,
-0xFA, 0xA3, 0xE0, 0xFB, 0xF5, 0x82, 0x8A, 0x83,
-0x12, 0x04, 0x7E, 0x12, 0xA7, 0x67, 0x71, 0xAE,
-0x11, 0x29, 0xEF, 0x70, 0x04, 0x7F, 0x06, 0xF1,
-0xEE, 0x22, 0xFF, 0xEE, 0x13, 0x13, 0x54, 0x07,
-0xFD, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0,
-0x90, 0x97, 0x3D, 0xED, 0xF0, 0xE4, 0xA3, 0xF0,
-0xEF, 0x14, 0x60, 0x02, 0x41, 0xE0, 0x90, 0x06,
-0x03, 0xE0, 0x54, 0xFB, 0xF0, 0x90, 0x97, 0x3D,
-0xE0, 0xFB, 0xC4, 0x33, 0x54, 0xE0, 0xFE, 0x90,
-0x04, 0x42, 0xE0, 0x54, 0x9F, 0x4E, 0xFE, 0xF0,
-0xE4, 0xFD, 0x12, 0xE5, 0xAA, 0x90, 0x97, 0x3E,
-0xEF, 0xF0, 0x90, 0x04, 0x83, 0xF0, 0x90, 0x96,
-0xE3, 0x12, 0x04, 0x3D, 0x00, 0x00, 0x00, 0x01,
-0x90, 0x96, 0xE7, 0x12, 0x04, 0x3D, 0x00, 0x00,
-0x00, 0x01, 0x71, 0xA4, 0x12, 0x04, 0x3D, 0x00,
-0x00, 0x00, 0x01, 0x90, 0x96, 0xE7, 0x12, 0x04,
-0x3D, 0x00, 0x00, 0x00, 0x01, 0x7F, 0x00, 0x7E,
-0x09, 0x71, 0xA8, 0x12, 0x04, 0x3D, 0x00, 0x00,
-0x00, 0x10, 0x90, 0x97, 0x3D, 0x12, 0x8F, 0xA1,
-0xEF, 0x54, 0x03, 0xFF, 0xE4, 0x78, 0x01, 0x12,
-0x03, 0xEB, 0x78, 0x04, 0xD1, 0x11, 0x7F, 0x00,
-0x7E, 0x0A, 0x71, 0xA8, 0x12, 0x04, 0x3D, 0x00,
-0x00, 0x0C, 0x00, 0x90, 0x97, 0x3D, 0x12, 0x8F,
-0xA1, 0xEF, 0x54, 0x03, 0xFF, 0xE4, 0x78, 0x0A,
-0xD1, 0x11, 0x7F, 0x00, 0x7E, 0x0D, 0x71, 0xA8,
+0x88, 0x32, 0x12, 0xB5, 0x23, 0x30, 0xE0, 0x03,
+0x12, 0x79, 0xD4, 0x90, 0x88, 0x39, 0x12, 0xED,
+0xB4, 0xF0, 0xD0, 0xD0, 0x92, 0xAF, 0x22, 0xE4,
+0xFB, 0xFA, 0xFD, 0x7F, 0x01, 0x12, 0x85, 0x4E,
+0x90, 0x95, 0xD6, 0xEF, 0xF0, 0x60, 0xF0, 0x90,
+0x86, 0xAF, 0xE0, 0xFF, 0x70, 0x04, 0xA3, 0xE0,
+0x60, 0xE5, 0xC2, 0xAF, 0xEF, 0x30, 0xE0, 0x0F,
+0x90, 0x86, 0xAF, 0xE0, 0x54, 0xFE, 0xF0, 0xE4,
+0xFF, 0x12, 0xB7, 0xE5, 0x12, 0xDD, 0x30, 0x91,
+0x42, 0x30, 0xE1, 0x08, 0x54, 0xFD, 0xF0, 0x90,
+0x86, 0x08, 0x51, 0x66, 0x91, 0x42, 0x30, 0xE2,
+0x08, 0x54, 0xFB, 0xF0, 0x90, 0x86, 0x0A, 0x51,
+0x66, 0x91, 0x42, 0x30, 0xE6, 0x08, 0x54, 0xBF,
+0xF0, 0x90, 0x8A, 0x7D, 0x51, 0x66, 0xD2, 0xAF,
+0x80, 0xB5, 0xD2, 0xAF, 0xC2, 0xAF, 0x90, 0x86,
+0xAF, 0xE0, 0x22, 0x51, 0x63, 0xEF, 0x70, 0x02,
+0xFF, 0x22, 0x12, 0x99, 0xA1, 0x90, 0x93, 0xAC,
+0xF0, 0x90, 0x93, 0x58, 0xE0, 0xFF, 0xC3, 0x13,
+0xFE, 0xEF, 0x54, 0xF1, 0xFF, 0xEE, 0x04, 0x54,
+0x07, 0x25, 0xE0, 0x4F, 0xF0, 0xA3, 0xE0, 0xFF,
+0x90, 0x93, 0x58, 0xE0, 0xFE, 0xC3, 0x13, 0x54,
+0x07, 0xB5, 0x07, 0x04, 0xEE, 0x54, 0xF1, 0xF0,
+0x12, 0x99, 0xA1, 0xF5, 0x7D, 0xE4, 0x90, 0x93,
+0x5A, 0xF0, 0xE5, 0x7D, 0x75, 0xF0, 0x1B, 0xA4,
+0x24, 0x5F, 0xF5, 0x82, 0xE4, 0x34, 0x93, 0xF5,
+0x83, 0xE0, 0x30, 0xE0, 0x2A, 0xB1, 0x20, 0xE0,
+0x24, 0xAF, 0xF5, 0x82, 0xE4, 0x34, 0x93, 0xF5,
+0x83, 0xE0, 0xFF, 0xE5, 0x7D, 0xD1, 0xFC, 0xF5,
+0x83, 0xEF, 0xB1, 0x1F, 0xE0, 0x04, 0xB1, 0x1F,
+0xE0, 0xFF, 0x90, 0x93, 0xAE, 0xE0, 0xFE, 0xEF,
+0xB5, 0x06, 0x04, 0xB1, 0x20, 0xE4, 0xF0, 0xE5,
+0x7D, 0xD1, 0xFC, 0xF5, 0x83, 0xE0, 0xFC, 0x90,
+0x93, 0xAC, 0xE0, 0xD1, 0xFC, 0xF5, 0x83, 0xE0,
+0x6C, 0x60, 0x0D, 0xE5, 0x7D, 0xF1, 0xD7, 0x12,
+0xE5, 0xA3, 0xE5, 0x7D, 0xF1, 0xD7, 0xB1, 0x2C,
+0xE5, 0x7D, 0x12, 0x9A, 0xCA, 0x54, 0x07, 0xFF,
+0x60, 0x03, 0xBF, 0x02, 0x0F, 0xE5, 0x7D, 0x12,
+0x98, 0x24, 0xE0, 0xFF, 0x7E, 0x00, 0x7B, 0x04,
+0xE4, 0xFD, 0xF1, 0x87, 0xAD, 0x7D, 0x7F, 0x01,
+0x12, 0x99, 0xAD, 0x90, 0x93, 0xAD, 0xE0, 0xC3,
+0x13, 0x54, 0x03, 0xFF, 0xBF, 0x02, 0x05, 0xE4,
+0xFF, 0x12, 0x9F, 0xF0, 0x7F, 0x01, 0x22, 0xF0,
+0x74, 0xD2, 0x25, 0x7D, 0xF5, 0x82, 0xE4, 0x34,
+0x93, 0xF5, 0x83, 0x22, 0xFF, 0xEE, 0x13, 0x13,
+0x54, 0x07, 0xFD, 0xD3, 0x10, 0xAF, 0x01, 0xC3,
+0xC0, 0xD0, 0x90, 0x97, 0x6A, 0xED, 0xF0, 0xE4,
+0xA3, 0xF0, 0xEF, 0x14, 0x60, 0x02, 0xC1, 0x17,
+0x90, 0x06, 0x03, 0xE0, 0x54, 0xFB, 0xF0, 0x90,
+0x97, 0x6A, 0xE0, 0xFB, 0xC4, 0x33, 0x54, 0xE0,
+0xFE, 0x90, 0x04, 0x42, 0xE0, 0x54, 0x9F, 0x4E,
+0xFE, 0xF0, 0xE4, 0xFD, 0x12, 0xE6, 0x3F, 0x90,
+0x97, 0x6B, 0xEF, 0xF0, 0x90, 0x04, 0x83, 0xF0,
+0x90, 0x97, 0x10, 0x12, 0x04, 0x3D, 0x00, 0x00,
+0x00, 0x01, 0x90, 0x97, 0x14, 0x12, 0x04, 0x3D,
+0x00, 0x00, 0x00, 0x01, 0xD1, 0xDF, 0x12, 0x04,
+0x3D, 0x00, 0x00, 0x00, 0x01, 0x90, 0x97, 0x14,
+0x12, 0x04, 0x3D, 0x00, 0x00, 0x00, 0x01, 0x7F,
+0x00, 0x7E, 0x09, 0xD1, 0xE3, 0x12, 0x04, 0x3D,
+0x00, 0x00, 0x00, 0x10, 0x90, 0x97, 0x6A, 0xF1,
+0xEC, 0xEF, 0x54, 0x03, 0xFF, 0xE4, 0x78, 0x01,
+0x12, 0x03, 0xEB, 0x78, 0x04, 0xD1, 0xE9, 0x7F,
+0x00, 0x7E, 0x0A, 0xD1, 0xE3, 0x12, 0x04, 0x3D,
+0x00, 0x00, 0x0C, 0x00, 0x90, 0x97, 0x6A, 0xF1,
+0xEC, 0xEF, 0x54, 0x03, 0xFF, 0xE4, 0x78, 0x0A,
+0xD1, 0xE9, 0x7F, 0x00, 0x7E, 0x0D, 0xD1, 0xE3,
 0x12, 0x04, 0x3D, 0x0C, 0x00, 0x00, 0x00, 0x90,
-0x97, 0x3E, 0x12, 0x8F, 0xA1, 0xEF, 0x54, 0x03,
-0xFF, 0xE4, 0x78, 0x1A, 0xD1, 0x11, 0x7F, 0x18,
-0x71, 0xA6, 0x12, 0x04, 0x3D, 0x00, 0x00, 0x0C,
-0x00, 0x90, 0x96, 0xE7, 0x12, 0x04, 0x3D, 0x00,
-0x00, 0x00, 0x00, 0xD1, 0x1A, 0x12, 0x04, 0x3D,
-0x00, 0x00, 0x0C, 0x00, 0x90, 0x96, 0xD5, 0x12,
-0x04, 0x3D, 0x00, 0x00, 0x04, 0x00, 0x80, 0x58,
-0x90, 0x06, 0x03, 0xE0, 0x44, 0x04, 0xF0, 0x90,
-0x96, 0xE3, 0x12, 0x04, 0x3D, 0x00, 0x00, 0x00,
-0x01, 0x90, 0x96, 0xE7, 0x12, 0x04, 0x3D, 0x00,
-0x00, 0x00, 0x00, 0x71, 0xA4, 0x12, 0x04, 0x3D,
-0x00, 0x00, 0x00, 0x01, 0x90, 0x96, 0xE7, 0x12,
-0x04, 0x3D, 0x00, 0x00, 0x00, 0x00, 0x7F, 0x00,
-0x7E, 0x09, 0x71, 0xA8, 0x12, 0x04, 0x3D, 0x00,
-0x00, 0x0C, 0x00, 0x90, 0x96, 0xE7, 0x12, 0x04,
-0x3D, 0x00, 0x00, 0x0C, 0x00, 0xD1, 0x1A, 0x12,
-0x04, 0x3D, 0x00, 0x00, 0x0C, 0x00, 0x90, 0x96,
-0xD5, 0x12, 0x04, 0x3D, 0x00, 0x00, 0x0C, 0x00,
-0x7D, 0x18, 0x7C, 0x00, 0xE4, 0xFF, 0xD1, 0xA3,
+0x97, 0x6B, 0xF1, 0xEC, 0xEF, 0x54, 0x03, 0xFF,
+0xE4, 0x78, 0x1A, 0xD1, 0xE9, 0x7F, 0x18, 0xD1,
+0xE1, 0x12, 0x04, 0x3D, 0x00, 0x00, 0x0C, 0x00,
+0x90, 0x97, 0x14, 0x12, 0x04, 0x3D, 0x00, 0x00,
+0x00, 0x00, 0xD1, 0xF2, 0x12, 0x04, 0x3D, 0x00,
+0x00, 0x0C, 0x00, 0x90, 0x97, 0x02, 0x12, 0x04,
+0x3D, 0x00, 0x00, 0x04, 0x00, 0x80, 0x58, 0x90,
+0x06, 0x03, 0xE0, 0x44, 0x04, 0xF0, 0x90, 0x97,
+0x10, 0x12, 0x04, 0x3D, 0x00, 0x00, 0x00, 0x01,
+0x90, 0x97, 0x14, 0x12, 0x04, 0x3D, 0x00, 0x00,
+0x00, 0x00, 0xD1, 0xDF, 0x12, 0x04, 0x3D, 0x00,
+0x00, 0x00, 0x01, 0x90, 0x97, 0x14, 0x12, 0x04,
+0x3D, 0x00, 0x00, 0x00, 0x00, 0x7F, 0x00, 0x7E,
+0x09, 0xD1, 0xE3, 0x12, 0x04, 0x3D, 0x00, 0x00,
+0x0C, 0x00, 0x90, 0x97, 0x14, 0x12, 0x04, 0x3D,
+0x00, 0x00, 0x0C, 0x00, 0xD1, 0xF2, 0x12, 0x04,
+0x3D, 0x00, 0x00, 0x0C, 0x00, 0x90, 0x97, 0x02,
+0x12, 0x04, 0x3D, 0x00, 0x00, 0x0C, 0x00, 0x7D,
+0x18, 0x7C, 0x00, 0xE4, 0xFF, 0x12, 0xE5, 0x2D,
 0xD0, 0xD0, 0x92, 0xAF, 0x22, 0xD3, 0x10, 0xAF,
-0x01, 0xC3, 0xC0, 0xD0, 0x90, 0x96, 0xE1, 0xEE,
+0x01, 0xC3, 0xC0, 0xD0, 0x90, 0x97, 0x0E, 0xEE,
 0xF0, 0xA3, 0xEF, 0xF0, 0x12, 0x70, 0x70, 0x90,
-0x96, 0xEB, 0x12, 0x04, 0x31, 0x90, 0x96, 0xE3,
-0x12, 0x04, 0xB8, 0x12, 0x03, 0xCD, 0x90, 0x96,
-0xEB, 0xF1, 0x19, 0xC0, 0x04, 0xC0, 0x05, 0xC0,
-0x06, 0xC0, 0x07, 0x90, 0x96, 0xE3, 0x12, 0x04,
-0xB8, 0x90, 0x96, 0xE7, 0xF1, 0x19, 0xD0, 0x03,
-0xD0, 0x02, 0xD0, 0x01, 0xD0, 0x00, 0x12, 0x86,
-0x20, 0x90, 0x96, 0xEF, 0x12, 0x04, 0x31, 0x90,
-0x96, 0xEF, 0xF1, 0xDC, 0x90, 0x96, 0xE1, 0xE0,
-0xFE, 0xA3, 0xE0, 0xFF, 0x12, 0x70, 0xAD, 0xD0,
-0xD0, 0x92, 0xAF, 0x22, 0x7F, 0x00, 0x7E, 0x08,
-0x71, 0x45, 0x90, 0x96, 0xE3, 0x22, 0xFD, 0x7F,
-0x02, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0,
-0x90, 0x97, 0x34, 0xED, 0xF0, 0x90, 0x97, 0x33,
-0xEF, 0xF0, 0x64, 0x02, 0x70, 0x24, 0x90, 0x05,
-0x22, 0xE0, 0x90, 0x97, 0x35, 0xF0, 0x7B, 0x4A,
-0x7D, 0x6F, 0x12, 0x92, 0x4F, 0xBF, 0x01, 0x07,
-0x90, 0x04, 0xD4, 0x74, 0xFF, 0x80, 0x47, 0x90,
-0x97, 0x35, 0xE0, 0xFD, 0x7B, 0x46, 0x91, 0xA3,
-0x80, 0x41, 0x90, 0x97, 0x33, 0xE0, 0x64, 0x01,
-0x70, 0x30, 0x91, 0x31, 0x90, 0x97, 0x34, 0xE0,
-0xFF, 0x75, 0xF0, 0x1B, 0xA4, 0x24, 0x60, 0xF5,
-0x82, 0xE4, 0x34, 0x93, 0xF5, 0x83, 0xE0, 0xF4,
-0x90, 0x04, 0xD4, 0xF0, 0xEF, 0x75, 0xF0, 0x1B,
-0xA4, 0x24, 0x61, 0xF5, 0x82, 0xE4, 0x34, 0x93,
-0xF5, 0x83, 0xE0, 0xF4, 0x90, 0x04, 0xD5, 0xF0,
-0x80, 0x07, 0x90, 0x04, 0xD4, 0xE4, 0xF0, 0xA3,
-0xF0, 0x7F, 0x01, 0xD0, 0xD0, 0x92, 0xAF, 0x22,
-0xE4, 0xFB, 0xFD, 0x7F, 0xFF, 0xEB, 0xB4, 0x57,
-0x04, 0xF1, 0x36, 0x80, 0x0E, 0xEF, 0x70, 0x07,
-0x90, 0x93, 0xF3, 0xE0, 0x4D, 0x80, 0x04, 0xF1,
-0x8A, 0xF1, 0x36, 0x90, 0x05, 0x22, 0xF0, 0x90,
-0x93, 0x01, 0xEB, 0xF0, 0x22, 0x8F, 0x65, 0x90,
-0x05, 0x22, 0xE0, 0x90, 0x95, 0x4E, 0xF0, 0x7B,
-0x17, 0x12, 0x92, 0x4D, 0xEF, 0x64, 0x01, 0x70,
-0x33, 0xE5, 0x65, 0xB1, 0x76, 0xF5, 0x83, 0xE0,
-0xFC, 0xB1, 0x82, 0xD1, 0x24, 0xB1, 0x82, 0x31,
-0xF2, 0xE5, 0x65, 0x12, 0xA7, 0x30, 0x54, 0x07,
-0xFF, 0x60, 0x03, 0xBF, 0x02, 0x0D, 0xE5, 0x65,
-0x11, 0x1B, 0xE0, 0xFF, 0x7E, 0x00, 0xE4, 0xFB,
-0xFD, 0x91, 0xAA, 0xAD, 0x65, 0x7F, 0x01, 0x71,
-0xB1, 0x7F, 0x01, 0x22, 0x90, 0x95, 0x4E, 0xE0,
-0xFD, 0x7B, 0x49, 0xE4, 0xFF, 0x91, 0x35, 0x7F,
-0x00, 0x22, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0,
-0xD0, 0x90, 0x97, 0x09, 0xEE, 0xF0, 0xA3, 0xF1,
-0xE5, 0x90, 0x04, 0x1D, 0xE0, 0x60, 0x29, 0x90,
-0x05, 0x22, 0xE0, 0x90, 0x97, 0x0F, 0xF0, 0x7B,
-0x14, 0x12, 0x92, 0x4D, 0xEF, 0x64, 0x01, 0x70,
-0x06, 0xF1, 0x4E, 0xF1, 0xC4, 0x80, 0x04, 0x7F,
-0x00, 0x80, 0x14, 0x90, 0x97, 0x0F, 0xE0, 0xFD,
-0x7B, 0x15, 0xE4, 0xFF, 0x91, 0x35, 0x80, 0x04,
-0xF1, 0x4E, 0xF1, 0xC4, 0x12, 0xCD, 0x71, 0xD0,
-0xD0, 0x92, 0xAF, 0x22, 0xE4, 0x90, 0x96, 0x15,
-0xF0, 0x90, 0x93, 0x58, 0xE0, 0x30, 0xE0, 0x61,
-0xC3, 0x13, 0x54, 0x07, 0xFF, 0xB1, 0x66, 0xE0,
-0xFE, 0x30, 0xE0, 0x55, 0xEF, 0xB1, 0x66, 0xEE,
-0x54, 0xFE, 0xF0, 0xEF, 0xB1, 0x66, 0x12, 0xB7,
-0xB7, 0x30, 0xE0, 0x11, 0x90, 0x93, 0x58, 0xE0,
-0xFE, 0xB1, 0x62, 0xEF, 0x54, 0xFB, 0xF0, 0x90,
-0x96, 0x15, 0x74, 0x01, 0xF0, 0x90, 0x04, 0xE0,
-0xE0, 0x30, 0xE1, 0x21, 0x12, 0xA7, 0x3F, 0x90,
-0x93, 0x58, 0xE0, 0xB1, 0x62, 0xE0, 0x44, 0x02,
-0xF0, 0xE4, 0x90, 0x93, 0xDE, 0x12, 0xA7, 0x66,
-0xFD, 0x7F, 0x02, 0x71, 0xB1, 0x90, 0x96, 0x15,
-0xE0, 0x60, 0x0E, 0x21, 0x03, 0x90, 0x93, 0x58,
-0xE0, 0xB1, 0x62, 0xE0, 0x54, 0xFD, 0xF0, 0x91,
-0x30, 0x22, 0xC3, 0x13, 0x54, 0x07, 0x75, 0xF0,
-0x1B, 0xA4, 0x24, 0x62, 0xF5, 0x82, 0xE4, 0x34,
-0x93, 0xF5, 0x83, 0x22, 0xE5, 0x7D, 0x75, 0xF0,
-0x1B, 0xA4, 0x24, 0x5B, 0xF5, 0x82, 0xE4, 0x34,
-0x93, 0x22, 0xE5, 0x65, 0x75, 0xF0, 0x1B, 0xA4,
-0x24, 0x5C, 0xF5, 0x82, 0xE4, 0x34, 0x93, 0xF5,
-0x83, 0xE0, 0xFE, 0x54, 0x03, 0x22, 0xE4, 0x90,
-0x97, 0x2D, 0xF0, 0xA3, 0xF0, 0x90, 0x05, 0x22,
-0xE0, 0x90, 0x97, 0x2F, 0xF0, 0x7B, 0x47, 0x7D,
-0xFF, 0xE4, 0xFF, 0x91, 0x35, 0x90, 0x05, 0xF8,
-0xE0, 0x70, 0x1A, 0xA3, 0xE0, 0x70, 0x16, 0xA3,
-0xE0, 0x70, 0x12, 0xA3, 0xE0, 0x70, 0x0E, 0x90,
-0x97, 0x2F, 0xE0, 0xFD, 0x7B, 0x48, 0xE4, 0xFF,
-0x91, 0x35, 0x7F, 0x01, 0x22, 0x90, 0x88, 0xA1,
-0xF1, 0x83, 0x30, 0xE0, 0x19, 0xD3, 0x90, 0x97,
-0x2E, 0xE0, 0x94, 0x03, 0x90, 0x97, 0x2D, 0xE0,
-0x94, 0x00, 0x40, 0x06, 0xF1, 0x41, 0x7B, 0x5A,
-0x80, 0x17, 0x7F, 0x01, 0x80, 0x17, 0xD3, 0x90,
-0x97, 0x2E, 0xE0, 0x94, 0xE8, 0x90, 0x97, 0x2D,
-0xE0, 0x94, 0x03, 0x40, 0x06, 0xF1, 0x41, 0x7B,
-0x5B, 0x81, 0xA3, 0x7F, 0x32, 0x7E, 0x00, 0x12,
-0x7C, 0x6A, 0x90, 0x97, 0x2D, 0xF1, 0xD5, 0x80,
-0x9C, 0x12, 0x03, 0xFE, 0x90, 0x96, 0xE7, 0x02,
-0x04, 0x31, 0x7F, 0x84, 0x7E, 0x08, 0x71, 0x45,
-0x90, 0x96, 0xD1, 0x22, 0xFD, 0xEE, 0x13, 0x13,
-0x54, 0x07, 0xFB, 0x90, 0x93, 0x58, 0xE0, 0xFE,
-0xC4, 0x54, 0x0F, 0x90, 0x97, 0x28, 0xF0, 0xAF,
-0x04, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0,
-0x90, 0x97, 0x25, 0xEF, 0xF0, 0xED, 0x64, 0x01,
-0x70, 0x2E, 0xEB, 0xB4, 0x01, 0x07, 0xE0, 0x24,
-0x02, 0xF5, 0x10, 0x80, 0x08, 0x90, 0x97, 0x25,
-0xE0, 0x24, 0xFE, 0xF5, 0x10, 0x90, 0x96, 0xD1,
-0x12, 0x04, 0x3D, 0x00, 0x00, 0x00, 0xFF, 0xAF,
-0x10, 0xF1, 0x27, 0xF1, 0x1F, 0x12, 0x04, 0x3D,
-0x00, 0x00, 0x00, 0xFF, 0xAF, 0x10, 0x80, 0x20,
-0x90, 0x96, 0xD1, 0x12, 0x04, 0x3D, 0x00, 0x00,
-0x00, 0xFF, 0x90, 0x97, 0x25, 0x12, 0x8F, 0xA1,
-0xF1, 0x2B, 0xF1, 0x1F, 0x12, 0x04, 0x3D, 0x00,
-0x00, 0x00, 0xFF, 0x90, 0x97, 0x25, 0xE0, 0xFF,
-0xF1, 0x27, 0x7F, 0x01, 0xD1, 0xA3, 0xD0, 0xD0,
-0x92, 0xAF, 0x22, 0xD3, 0x10, 0xAF, 0x01, 0xC3,
-0xC0, 0xD0, 0x90, 0x96, 0xCF, 0xEC, 0xF0, 0xA3,
-0xED, 0xF0, 0x90, 0x96, 0xCE, 0xEF, 0xF0, 0xA3,
-0xA3, 0xE0, 0xFD, 0x12, 0x7B, 0xBD, 0x90, 0x96,
-0xD9, 0x12, 0x04, 0x31, 0x90, 0x96, 0xD1, 0x12,
-0x04, 0xB8, 0x12, 0x03, 0xCD, 0x90, 0x96, 0xD9,
-0xF1, 0x19, 0xC0, 0x04, 0xC0, 0x05, 0xC0, 0x06,
-0xC0, 0x07, 0x90, 0x96, 0xD1, 0x12, 0x04, 0xB8,
-0x90, 0x96, 0xD5, 0xF1, 0x19, 0xD0, 0x03, 0xD0,
+0x97, 0x18, 0x12, 0x04, 0x31, 0x90, 0x97, 0x10,
+0x12, 0x04, 0xB8, 0x12, 0x03, 0xCD, 0x90, 0x97,
+0x18, 0x12, 0xE6, 0x39, 0xC0, 0x04, 0xC0, 0x05,
+0xC0, 0x06, 0xC0, 0x07, 0x90, 0x97, 0x10, 0x12,
+0x04, 0xB8, 0x90, 0x97, 0x14, 0x12, 0xE6, 0x39,
+0xD0, 0x03, 0xD0, 0x02, 0xD0, 0x01, 0xD0, 0x00,
+0x12, 0x86, 0x20, 0x90, 0x97, 0x1C, 0x12, 0x04,
+0x31, 0x90, 0x97, 0x1C, 0x12, 0xD2, 0xF5, 0x90,
+0x97, 0x0E, 0xE0, 0xFE, 0xA3, 0xE0, 0xFF, 0x12,
+0x70, 0xAD, 0xD0, 0xD0, 0x92, 0xAF, 0x22, 0x7F,
+0x00, 0x7E, 0x08, 0xD1, 0x7D, 0x90, 0x97, 0x10,
+0x22, 0x12, 0x03, 0xFE, 0x90, 0x97, 0x14, 0x02,
+0x04, 0x31, 0x7F, 0x84, 0x7E, 0x08, 0xD1, 0x7D,
+0x90, 0x96, 0xFE, 0x22, 0x75, 0xF0, 0x1B, 0xA4,
+0x24, 0x5B, 0xF5, 0x82, 0xE4, 0x34, 0x93, 0x22,
+0x8F, 0x65, 0x90, 0x05, 0x22, 0xE0, 0x90, 0x95,
+0x54, 0xF0, 0x7B, 0x17, 0x51, 0x5D, 0xEF, 0x64,
+0x01, 0x70, 0x36, 0xE5, 0x65, 0xD1, 0xFC, 0xF5,
+0x83, 0xE0, 0xFC, 0xF1, 0xD5, 0x12, 0xE5, 0xA3,
+0xF1, 0xD5, 0xB1, 0x2C, 0xE5, 0x65, 0x12, 0x9A,
+0xCA, 0x54, 0x07, 0xFF, 0x60, 0x03, 0xBF, 0x02,
+0x0E, 0xE5, 0x65, 0x12, 0x98, 0x24, 0xE0, 0xFF,
+0x7E, 0x00, 0xE4, 0xFB, 0xFD, 0xF1, 0x87, 0xAD,
+0x65, 0x7F, 0x01, 0x12, 0x99, 0xAD, 0x7F, 0x01,
+0x22, 0x90, 0x95, 0x54, 0xE0, 0xFD, 0x7B, 0x49,
+0xE4, 0xFF, 0xF1, 0x64, 0x7F, 0x00, 0x22, 0xE4,
+0xFB, 0xFD, 0x7F, 0xFF, 0xEB, 0xB4, 0x57, 0x05,
+0x12, 0xED, 0xE4, 0x80, 0x10, 0xEF, 0x70, 0x07,
+0x90, 0x93, 0xF3, 0xE0, 0x4D, 0x80, 0x06, 0x12,
+0xAF, 0xA4, 0x12, 0xED, 0xE4, 0x90, 0x05, 0x22,
+0xF0, 0x90, 0x93, 0x01, 0xEB, 0xF0, 0x22, 0xD3,
+0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0x90, 0x97,
+0x33, 0xEE, 0xF0, 0xA3, 0x12, 0xAF, 0x7F, 0x90,
+0x04, 0x1D, 0xE0, 0x60, 0x2A, 0x90, 0x05, 0x22,
+0xE0, 0x90, 0x97, 0x39, 0xF0, 0x7B, 0x14, 0x51,
+0x5D, 0xEF, 0x64, 0x01, 0x70, 0x08, 0x12, 0xED,
+0x49, 0x12, 0xC4, 0x1E, 0x80, 0x04, 0x7F, 0x00,
+0x80, 0x16, 0x90, 0x97, 0x39, 0xE0, 0xFD, 0x7B,
+0x15, 0xE4, 0xFF, 0xF1, 0x64, 0x80, 0x06, 0x12,
+0xED, 0x49, 0x12, 0xC4, 0x1E, 0x12, 0xC7, 0xDB,
+0xD0, 0xD0, 0x92, 0xAF, 0x22, 0xE5, 0x65, 0x75,
+0xF0, 0x1B, 0xA4, 0x24, 0x5C, 0xF5, 0x82, 0xE4,
+0x34, 0x93, 0xF5, 0x83, 0xE0, 0xFE, 0x54, 0x03,
+0x22, 0x90, 0x95, 0x57, 0xE0, 0xFF, 0xE4, 0xFC,
+0xFD, 0xFE, 0x22, 0x7D, 0x01, 0xD3, 0x10, 0xAF,
+0x01, 0xC3, 0xC0, 0xD0, 0x90, 0x97, 0x64, 0xEF,
+0xF0, 0xA3, 0xED, 0xF0, 0x90, 0x8A, 0xF9, 0x11,
+0x4B, 0x7D, 0x44, 0x7F, 0x6F, 0x12, 0x04, 0x7E,
+0x12, 0x8A, 0x63, 0x90, 0x97, 0x65, 0xE0, 0x90,
+0x97, 0x64, 0xB4, 0x01, 0x09, 0xE0, 0xF1, 0xB1,
+0xE0, 0x44, 0x04, 0xF0, 0x80, 0x07, 0xE0, 0xF1,
+0xB1, 0xE0, 0x54, 0xFB, 0xF0, 0x90, 0x8A, 0xF9,
+0x11, 0x4B, 0xF1, 0x87, 0xD0, 0xD0, 0x92, 0xAF,
+0x22, 0x90, 0x8A, 0x77, 0xE0, 0xFE, 0xA3, 0xE0,
+0xFF, 0xF5, 0x82, 0x8E, 0x83, 0x12, 0x04, 0x7E,
+0x90, 0x8A, 0x79, 0xE0, 0xFE, 0xA3, 0xE0, 0xF5,
+0x82, 0x8E, 0x83, 0x22, 0x90, 0x95, 0x4E, 0xE0,
+0x04, 0xF0, 0x90, 0x8A, 0xD9, 0x11, 0x4B, 0x7F,
+0x01, 0x12, 0x04, 0x7E, 0x90, 0x88, 0xA1, 0xF1,
+0x34, 0x30, 0xE0, 0x04, 0x7F, 0x03, 0x80, 0x02,
+0x7F, 0x01, 0x12, 0x71, 0x9A, 0xE4, 0x90, 0x88,
+0xAF, 0xF0, 0xA3, 0xF1, 0xF4, 0x30, 0xE0, 0x09,
+0x90, 0x8A, 0xF9, 0x11, 0x4B, 0x7D, 0x0E, 0x80,
+0x2F, 0xF1, 0xEA, 0x30, 0xE0, 0x16, 0x12, 0xC7,
+0xE4, 0x20, 0xE0, 0x07, 0xF1, 0x3C, 0xE4, 0xFD,
+0x12, 0x04, 0x7E, 0x90, 0x8A, 0xF9, 0x11, 0x4B,
+0x7D, 0x0F, 0x80, 0x14, 0x90, 0x88, 0x36, 0xE0,
+0x60, 0x13, 0xF1, 0x3C, 0xE4, 0xFD, 0x12, 0x04,
+0x7E, 0x90, 0x8A, 0xF9, 0x11, 0x4B, 0x7D, 0x10,
+0x7F, 0x6F, 0x12, 0x04, 0x7E, 0x90, 0x88, 0xA0,
+0xE0, 0x30, 0xE0, 0x07, 0x90, 0x8A, 0xF9, 0x11,
+0x4B, 0xF1, 0x87, 0x90, 0x88, 0xA0, 0xF1, 0x34,
+0x30, 0xE0, 0x0A, 0x90, 0x8A, 0x97, 0x11, 0x4B,
+0xE4, 0xFF, 0x12, 0x04, 0x7E, 0x90, 0x88, 0xA1,
+0xE0, 0xFF, 0xC3, 0x13, 0x30, 0xE0, 0x0E, 0x90,
+0x06, 0xCD, 0xE0, 0x54, 0xEF, 0xF0, 0x90, 0x06,
+0xCF, 0xE0, 0x54, 0xEF, 0xF0, 0x12, 0xD7, 0x80,
+0x30, 0xE0, 0x1C, 0xEF, 0x13, 0x13, 0x54, 0x3F,
+0x30, 0xE0, 0x14, 0xEE, 0x44, 0x08, 0xF0, 0xA3,
+0xE0, 0xC3, 0x13, 0x54, 0x7F, 0xFF, 0x90, 0x8A,
+0xD1, 0x12, 0xC4, 0x37, 0x12, 0x04, 0x7E, 0x90,
+0x05, 0x63, 0xE0, 0x90, 0x97, 0x3D, 0xF0, 0x90,
+0x05, 0x62, 0xE0, 0x90, 0x97, 0x3C, 0xF0, 0x90,
+0x05, 0x61, 0xE0, 0x90, 0x97, 0x3B, 0xF0, 0x90,
+0x05, 0x60, 0xE0, 0x90, 0x97, 0x3A, 0x12, 0x9D,
+0x32, 0x90, 0x97, 0x3A, 0x12, 0x8F, 0xEC, 0x12,
+0x86, 0x20, 0xC0, 0x04, 0xC0, 0x05, 0xC0, 0x06,
+0xC0, 0x07, 0x90, 0x97, 0x3C, 0x12, 0x8F, 0xEC,
+0x78, 0x10, 0x12, 0x03, 0xFE, 0xD0, 0x03, 0xD0,
+0x02, 0xD0, 0x01, 0xD0, 0x00, 0x12, 0x86, 0x20,
+0xC0, 0x04, 0xC0, 0x05, 0xC0, 0x06, 0xC0, 0x07,
+0xA3, 0x12, 0x8F, 0xEC, 0x78, 0x18, 0x12, 0x03,
+0xFE, 0xD0, 0x03, 0xD0, 0x02, 0xD0, 0x01, 0xD0,
+0x00, 0x12, 0x86, 0x20, 0x90, 0x95, 0x46, 0x12,
+0x04, 0x31, 0x12, 0xC6, 0x1D, 0x90, 0x97, 0x3E,
+0xF0, 0x7B, 0x01, 0x7A, 0x97, 0x79, 0x3E, 0x90,
+0x8A, 0xCF, 0x11, 0x4B, 0x7D, 0x01, 0x7F, 0x42,
+0x02, 0x04, 0x7E, 0x90, 0x95, 0x54, 0xEF, 0xF0,
+0x91, 0x1C, 0x7F, 0xF4, 0x7E, 0x01, 0x12, 0x5F,
+0xA6, 0xBF, 0x01, 0x08, 0x90, 0x95, 0x9B, 0xE0,
+0x90, 0x95, 0x9D, 0xF0, 0x91, 0x1C, 0x7F, 0xF5,
+0x7E, 0x01, 0x12, 0x5F, 0xA6, 0xBF, 0x01, 0x08,
+0x90, 0x95, 0x9B, 0xE0, 0x90, 0x95, 0x9E, 0xF0,
+0x91, 0x1C, 0x7F, 0xF6, 0x7E, 0x01, 0x12, 0x5F,
+0xA6, 0xBF, 0x01, 0x08, 0x90, 0x95, 0x9B, 0xE0,
+0x90, 0x95, 0x9F, 0xF0, 0x91, 0x1C, 0x7F, 0xF7,
+0x7E, 0x01, 0x12, 0x5F, 0xA6, 0xBF, 0x01, 0x08,
+0x90, 0x95, 0x9B, 0xE0, 0x90, 0x95, 0xA0, 0xF0,
+0x91, 0x1C, 0x7F, 0xF8, 0x7E, 0x01, 0x12, 0x5F,
+0xA6, 0xBF, 0x01, 0x08, 0x90, 0x95, 0x9B, 0xE0,
+0x90, 0x95, 0xA1, 0xF0, 0x91, 0x1C, 0x12, 0xAF,
+0x6F, 0xBF, 0x01, 0x08, 0x90, 0x95, 0x9B, 0xE0,
+0x90, 0x95, 0xA2, 0xF0, 0x91, 0x1C, 0xF1, 0x8D,
+0x64, 0x01, 0x70, 0x54, 0x90, 0x95, 0x9B, 0xE0,
+0x90, 0x95, 0xA3, 0xF0, 0x54, 0x07, 0x60, 0x08,
+0x90, 0x95, 0x9B, 0xE0, 0x54, 0xE0, 0x70, 0x40,
+0x7B, 0x01, 0x7A, 0x95, 0x79, 0x9C, 0x7F, 0xFA,
+0xF1, 0x8F, 0x64, 0x01, 0x70, 0x32, 0x90, 0x95,
+0x9B, 0xE0, 0xFC, 0x54, 0x07, 0x70, 0x12, 0x90,
+0x95, 0xA3, 0xE0, 0xFE, 0x90, 0x95, 0x9C, 0xE0,
+0x54, 0x07, 0xFD, 0xEE, 0x4D, 0x90, 0x95, 0xA3,
+0xF0, 0xEC, 0x54, 0xE0, 0x70, 0x12, 0x90, 0x95,
+0xA3, 0xE0, 0xFF, 0x90, 0x95, 0x9C, 0xE0, 0x54,
+0xE0, 0xFE, 0xEF, 0x4E, 0x90, 0x95, 0xA3, 0xF0,
+0x91, 0x1C, 0x7F, 0xFD, 0xF1, 0x8F, 0x64, 0x01,
+0x70, 0x47, 0x90, 0x95, 0x9B, 0xE0, 0xFE, 0x54,
+0xCC, 0x90, 0x95, 0xA4, 0xF0, 0xEE, 0x54, 0x0C,
+0xFF, 0x60, 0x08, 0x90, 0x95, 0x9B, 0xE0, 0x54,
+0xC0, 0x70, 0x2E, 0xEF, 0x70, 0x12, 0x90, 0x95,
+0xA4, 0xE0, 0xFF, 0x90, 0x95, 0x9B, 0xE0, 0x54,
+0x03, 0x12, 0xEE, 0x42, 0x90, 0x95, 0xA4, 0xF0,
+0x90, 0x95, 0x9B, 0xE0, 0xFF, 0x54, 0xC0, 0x70,
+0x10, 0x90, 0x95, 0xA4, 0xE0, 0xFE, 0xEF, 0x54,
+0x30, 0x25, 0xE0, 0x25, 0xE0, 0xFF, 0xEE, 0x4F,
+0xF0, 0x91, 0x1C, 0x7F, 0xF0, 0x7E, 0x01, 0x12,
+0x5F, 0xA6, 0xBF, 0x01, 0x08, 0x90, 0x95, 0x9B,
+0xE0, 0x90, 0x95, 0xA5, 0xF0, 0x91, 0x1C, 0x7F,
+0xF1, 0x7E, 0x01, 0x12, 0x5F, 0xA6, 0xBF, 0x01,
+0x08, 0x90, 0x95, 0x9B, 0xE0, 0x90, 0x95, 0xA6,
+0xF0, 0x91, 0x1C, 0x7F, 0xF2, 0x7E, 0x01, 0x12,
+0x5F, 0xA6, 0xBF, 0x01, 0x08, 0x90, 0x95, 0x9B,
+0xE0, 0x90, 0x95, 0xA7, 0xF0, 0x91, 0x1C, 0x7F,
+0xF3, 0x7E, 0x01, 0x12, 0x5F, 0xA6, 0xBF, 0x01,
+0x08, 0x90, 0x95, 0x9B, 0xE0, 0x90, 0x95, 0xA8,
+0xF0, 0x91, 0x1C, 0x7F, 0xFC, 0x7E, 0x01, 0x12,
+0x5F, 0xA6, 0xBF, 0x01, 0x08, 0x90, 0x95, 0x9B,
+0xE0, 0x90, 0x95, 0xA9, 0xF0, 0x90, 0x95, 0x55,
+0x74, 0x19, 0xF0, 0x90, 0x95, 0x77, 0x74, 0x08,
+0xF0, 0x90, 0x95, 0x9D, 0xE0, 0x90, 0x95, 0x57,
+0xF0, 0x90, 0x95, 0x9E, 0xE0, 0x90, 0x95, 0x58,
+0xF0, 0x90, 0x95, 0x9F, 0xE0, 0x90, 0x95, 0x59,
+0xF0, 0x90, 0x95, 0xA0, 0xE0, 0x90, 0x95, 0x5A,
+0xF0, 0x90, 0x95, 0xA1, 0xE0, 0x90, 0x95, 0x5B,
+0xF0, 0x90, 0x95, 0xA2, 0xE0, 0x90, 0x95, 0x5C,
+0xF0, 0x90, 0x95, 0xA3, 0xE0, 0x90, 0x95, 0x5D,
+0xF0, 0x90, 0x95, 0xA4, 0xE0, 0x90, 0x95, 0x5E,
+0xF0, 0x90, 0x95, 0x78, 0x74, 0x1A, 0xF0, 0x90,
+0x95, 0x9A, 0x74, 0x05, 0xF0, 0x90, 0x95, 0xA5,
+0xE0, 0x90, 0x95, 0x7A, 0xF0, 0x90, 0x95, 0xA6,
+0xE0, 0x90, 0x95, 0x7B, 0xF0, 0x90, 0x95, 0xA7,
+0xE0, 0x90, 0x95, 0x7C, 0xF0, 0x90, 0x95, 0xA8,
+0xE0, 0x90, 0x95, 0x7D, 0xF0, 0x90, 0x95, 0xA9,
+0xE0, 0x90, 0x95, 0x7E, 0xF0, 0x90, 0x00, 0x35,
+0xE0, 0x54, 0xFC, 0x44, 0x01, 0xF0, 0x91, 0x1C,
+0x7F, 0x6F, 0x7E, 0x00, 0x12, 0x5F, 0xA6, 0xBF,
+0x01, 0x08, 0x90, 0x95, 0x9B, 0xE0, 0x90, 0x95,
+0xAA, 0xF0, 0x90, 0x00, 0x35, 0xE0, 0x54, 0xFC,
+0xF0, 0x90, 0x95, 0x54, 0xE0, 0xB4, 0x01, 0x19,
+0x7B, 0x01, 0x7A, 0x95, 0x79, 0x55, 0x12, 0xAC,
+0x11, 0x12, 0x04, 0x7E, 0x7B, 0x01, 0x7A, 0x95,
+0x79, 0x78, 0x11, 0x39, 0x7F, 0x04, 0x02, 0x04,
+0x7E, 0x75, 0x45, 0x01, 0x75, 0x46, 0x95, 0x75,
+0x47, 0x55, 0x75, 0x48, 0x0A, 0x7B, 0x01, 0x7A,
+0x01, 0x79, 0xA0, 0x12, 0x69, 0xF5, 0x75, 0x45,
+0x01, 0x75, 0x46, 0x95, 0x75, 0x47, 0x7A, 0x75,
+0x48, 0x05, 0x7B, 0x01, 0x7A, 0x01, 0x79, 0xAA,
+0x12, 0x69, 0xF5, 0x90, 0x95, 0xAA, 0xE0, 0x90,
+0x01, 0xA1, 0xF0, 0x22, 0x7B, 0x01, 0x7A, 0x95,
+0x79, 0x9B, 0x22, 0xD3, 0x10, 0xAF, 0x01, 0xC3,
+0xC0, 0xD0, 0x12, 0xA2, 0x1F, 0x90, 0x05, 0x27,
+0xE0, 0x54, 0x7F, 0xF5, 0x64, 0x8B, 0x45, 0x8A,
+0x46, 0x89, 0x47, 0x75, 0x48, 0x01, 0x7B, 0x01,
+0x7A, 0x88, 0x79, 0x2C, 0x12, 0x69, 0xF5, 0x12,
+0xA1, 0x75, 0xFF, 0xC3, 0x13, 0x20, 0xE0, 0x02,
+0x81, 0xDD, 0x90, 0x88, 0x2C, 0xE0, 0x30, 0xE0,
+0x72, 0xF1, 0xDB, 0x75, 0x64, 0x21, 0x12, 0xEE,
+0x23, 0x30, 0xE0, 0x05, 0x12, 0xED, 0xA4, 0x80,
+0x0D, 0xE4, 0x90, 0x88, 0x2D, 0xF0, 0xA3, 0xF0,
+0x7D, 0x40, 0xFF, 0x12, 0x7C, 0x7E, 0x90, 0x88,
+0x2C, 0x12, 0xB5, 0x8F, 0x30, 0xE0, 0x03, 0x43,
+0x64, 0x12, 0xEF, 0xC4, 0x54, 0x0F, 0x30, 0xE0,
+0x03, 0x43, 0x64, 0x14, 0x90, 0x88, 0x2C, 0xE0,
+0xC4, 0x13, 0x54, 0x07, 0x30, 0xE0, 0x03, 0x43,
+0x64, 0x80, 0x12, 0xC3, 0x4A, 0x20, 0xE0, 0x03,
+0x43, 0x64, 0x40, 0xB1, 0x96, 0x90, 0x88, 0x2F,
+0xE0, 0x70, 0x05, 0x7F, 0x01, 0x12, 0xE8, 0x85,
+0x12, 0xD7, 0x8A, 0x30, 0xE0, 0x04, 0x7F, 0x04,
+0x80, 0x0C, 0x12, 0x9E, 0x67, 0xEF, 0x60, 0x04,
+0x7F, 0x01, 0x80, 0x02, 0x7F, 0x02, 0x12, 0xE8,
+0x85, 0xA1, 0x52, 0xB1, 0x93, 0x90, 0x88, 0x2F,
+0xE0, 0x64, 0x04, 0x60, 0x02, 0xA1, 0x8E, 0xFF,
+0x12, 0xE8, 0x85, 0xA1, 0x8E, 0x90, 0x88, 0x2C,
+0xE0, 0x30, 0xE0, 0x76, 0xF1, 0xDB, 0x43, 0x64,
+0x31, 0x12, 0xEE, 0x23, 0x30, 0xE0, 0x05, 0x12,
+0xED, 0xA4, 0x80, 0x07, 0x7D, 0x40, 0xE4, 0xFF,
+0x12, 0x7C, 0x7E, 0x90, 0x88, 0x2C, 0x12, 0xB5,
+0x8F, 0x30, 0xE0, 0x03, 0x43, 0x64, 0x02, 0xEF,
+0xC4, 0x54, 0x0F, 0x30, 0xE0, 0x03, 0x43, 0x64,
+0x04, 0xB1, 0x96, 0x12, 0xD7, 0x8A, 0x30, 0xE0,
+0x0F, 0xF1, 0xD4, 0x60, 0x35, 0x90, 0x8A, 0xB9,
+0x11, 0x4B, 0xE4, 0xFD, 0x7F, 0x02, 0x80, 0x1D,
+0xF1, 0xE2, 0xF1, 0xD4, 0x70, 0x1C, 0x12, 0x7B,
+0xAD, 0x12, 0x9E, 0x67, 0xBF, 0x01, 0x06, 0xF1,
+0x3C, 0x7D, 0x01, 0x80, 0x08, 0x90, 0x8A, 0xB9,
+0x11, 0x4B, 0xE4, 0xFD, 0xFF, 0x12, 0x04, 0x7E,
+0x80, 0x08, 0x90, 0x88, 0x39, 0xE0, 0x90, 0x88,
+0x30, 0xF0, 0x90, 0x05, 0x40, 0x74, 0x22, 0xF0,
+0x80, 0x34, 0xB1, 0x93, 0x90, 0x88, 0x30, 0xE0,
+0xB4, 0x02, 0x0B, 0x90, 0x8A, 0xB9, 0x11, 0x4B,
+0x7D, 0x01, 0x7F, 0x04, 0x80, 0x10, 0x90, 0x88,
+0x30, 0xE0, 0xB4, 0x08, 0x0C, 0x90, 0x8A, 0xB9,
+0x11, 0x4B, 0x7D, 0x01, 0x7F, 0x0C, 0x12, 0x04,
+0x7E, 0x12, 0xEA, 0x4A, 0xF1, 0x3C, 0x7D, 0x01,
+0x12, 0x04, 0x7E, 0x12, 0xAF, 0xCA, 0xD0, 0xD0,
+0x92, 0xAF, 0x22, 0x75, 0x64, 0x21, 0x90, 0x05,
+0x27, 0xE5, 0x64, 0xF0, 0x22, 0xD3, 0x10, 0xAF,
+0x01, 0xC3, 0xC0, 0xD0, 0x90, 0x95, 0x54, 0x74,
+0x02, 0xF0, 0x90, 0x88, 0xC2, 0xE0, 0x44, 0x10,
+0xF0, 0x90, 0x88, 0xAF, 0xE0, 0x60, 0x02, 0xE1,
+0x2C, 0x90, 0x8A, 0xD9, 0x11, 0x4B, 0xE4, 0xFF,
+0x12, 0x04, 0x7E, 0x90, 0x88, 0xA1, 0xE0, 0x30,
+0xE0, 0x04, 0x7F, 0x01, 0x80, 0x37, 0x90, 0x88,
+0x9D, 0x12, 0xC3, 0x4D, 0x30, 0xE0, 0x04, 0x7F,
+0x0D, 0x80, 0x2A, 0x90, 0x88, 0xA0, 0xE0, 0xFF,
+0xC4, 0x54, 0x0F, 0x30, 0xE0, 0x10, 0xEF, 0x13,
+0x13, 0x54, 0x3F, 0x30, 0xE0, 0x04, 0x7F, 0x09,
+0x80, 0x13, 0x7F, 0x03, 0x80, 0x0F, 0x90, 0x88,
+0xA0, 0xE0, 0xC3, 0x13, 0x30, 0xE0, 0x04, 0x7F,
+0x03, 0x80, 0x02, 0x7F, 0x09, 0x12, 0x71, 0x9A,
+0x90, 0x88, 0xAF, 0x74, 0x01, 0xF1, 0xF4, 0x30,
+0xE0, 0x05, 0x12, 0x8F, 0x5F, 0x80, 0x3A, 0xF1,
+0xEA, 0x30, 0xE0, 0x35, 0x90, 0x88, 0xA3, 0xE0,
+0x44, 0x20, 0xF0, 0x90, 0x88, 0x9C, 0xE0, 0x60,
+0x0B, 0x90, 0x8A, 0xB9, 0x11, 0x4B, 0x7D, 0x01,
+0x7F, 0x04, 0x80, 0x11, 0x12, 0x8F, 0x5F, 0xF1,
+0x31, 0x90, 0x8A, 0xB9, 0x20, 0xE0, 0x0B, 0x11,
+0x4B, 0x7D, 0x01, 0x7F, 0x0C, 0x12, 0x04, 0x7E,
+0x80, 0x07, 0x11, 0x4B, 0xF1, 0xCD, 0x12, 0xD8,
+0xDD, 0x90, 0x88, 0x9C, 0xE0, 0x60, 0x06, 0x7B,
+0x04, 0x7D, 0x6F, 0x80, 0x03, 0xE4, 0xFB, 0xFD,
+0x7F, 0xFF, 0x12, 0x8F, 0x64, 0x90, 0x88, 0xA0,
+0xF1, 0x34, 0x30, 0xE0, 0x0A, 0x90, 0x8A, 0x97,
+0x11, 0x4B, 0x7F, 0x01, 0x12, 0x04, 0x7E, 0x90,
+0x88, 0xA1, 0xE0, 0xC3, 0x13, 0x30, 0xE0, 0x0E,
+0x90, 0x06, 0xCD, 0xE0, 0x44, 0x10, 0xF0, 0x90,
+0x06, 0xCF, 0xE0, 0x44, 0x10, 0xF0, 0x90, 0x05,
+0x63, 0xE0, 0x90, 0x95, 0x58, 0xF0, 0x90, 0x05,
+0x62, 0xE0, 0x90, 0x95, 0x57, 0xF0, 0x90, 0x05,
+0x61, 0xE0, 0x90, 0x95, 0x56, 0xF0, 0x90, 0x05,
+0x60, 0xE0, 0x90, 0x95, 0x55, 0x12, 0x9D, 0x32,
+0x90, 0x95, 0x55, 0x12, 0x8F, 0xEC, 0x12, 0x86,
+0x20, 0xC0, 0x04, 0xC0, 0x05, 0xC0, 0x06, 0xC0,
+0x07, 0x12, 0x8F, 0xE9, 0x78, 0x10, 0x12, 0x03,
+0xFE, 0xD0, 0x03, 0xD0, 0x02, 0xD0, 0x01, 0xD0,
+0x00, 0x12, 0x86, 0x20, 0xC0, 0x04, 0xC0, 0x05,
+0xC0, 0x06, 0xC0, 0x07, 0xA3, 0x12, 0x8F, 0xEC,
+0x78, 0x18, 0x12, 0x03, 0xFE, 0xD0, 0x03, 0xD0,
+0x02, 0xD0, 0x01, 0xD0, 0x00, 0x12, 0x86, 0x20,
+0xA3, 0x12, 0x04, 0x31, 0x90, 0x88, 0xA1, 0x12,
+0xB5, 0x23, 0x30, 0xE0, 0x2F, 0x90, 0x95, 0x46,
+0x12, 0x04, 0xB8, 0x90, 0x95, 0x59, 0x12, 0xEE,
+0x3B, 0x40, 0x21, 0x90, 0x95, 0x46, 0x12, 0x86,
+0x2D, 0x90, 0x95, 0x59, 0x12, 0x04, 0xB8, 0x12,
+0x85, 0xB6, 0xE4, 0xFB, 0x7A, 0x78, 0xF9, 0xF8,
+0xC3, 0x12, 0x03, 0xDA, 0x50, 0x06, 0x90, 0x95,
+0x4B, 0xE0, 0x04, 0xF0, 0xD0, 0xD0, 0x92, 0xAF,
+0x22, 0x90, 0x95, 0x44, 0xE0, 0xC4, 0x13, 0x13,
+0x13, 0x54, 0x01, 0x22, 0x90, 0x88, 0x38, 0xE0,
+0xFF, 0x90, 0x8A, 0xB9, 0xE0, 0xFC, 0xA3, 0xE0,
+0xF5, 0x82, 0x8C, 0x83, 0x22, 0x90, 0x95, 0x37,
+0x74, 0x01, 0xF0, 0x90, 0x06, 0x92, 0x04, 0xF0,
+0x90, 0x01, 0x3C, 0x74, 0x04, 0xF0, 0x90, 0x88,
+0x31, 0xE0, 0x44, 0x08, 0xF0, 0x90, 0x88, 0x39,
+0xE0, 0x64, 0x0C, 0x60, 0x0E, 0x90, 0x8A, 0xB9,
+0x11, 0x4B, 0xF1, 0xCD, 0x90, 0x8A, 0xF9, 0x11,
+0x4B, 0xF1, 0x87, 0x90, 0x8A, 0xAF, 0x11, 0x4B,
+0x7D, 0x08, 0xE4, 0xFF, 0x02, 0x04, 0x7E, 0xE4,
+0xFD, 0xFF, 0x02, 0x04, 0x7E, 0x7F, 0xFB, 0x7E,
+0x01, 0x12, 0x5F, 0xA6, 0xEF, 0x22, 0x90, 0x8A,
+0xF9, 0x11, 0x4B, 0xF1, 0x87, 0x90, 0x88, 0x2F,
+0x74, 0x01, 0xF0, 0x22, 0x90, 0x8A, 0xF9, 0x11,
+0x4B, 0xF1, 0x87, 0xF1, 0xE2, 0x80, 0xEE, 0xE5,
+0x67, 0xC4, 0x54, 0xF0, 0x24, 0x05, 0xF5, 0x82,
+0xE4, 0x34, 0x81, 0xF5, 0x83, 0x22, 0x90, 0x86,
+0x0C, 0x12, 0x8A, 0x66, 0x90, 0x8A, 0xF9, 0x11,
+0x4B, 0xF1, 0x87, 0x80, 0xD0, 0xE4, 0xFD, 0x7F,
+0x0C, 0x02, 0x04, 0x7E, 0x90, 0x88, 0x30, 0xE0,
+0x64, 0x02, 0x22, 0x7D, 0x03, 0x7F, 0x02, 0x02,
+0x7C, 0x05, 0x90, 0x05, 0x27, 0xE0, 0x44, 0x40,
+0xF0, 0x22, 0x90, 0x88, 0x9D, 0xE0, 0xC4, 0x54,
+0x0F, 0x22, 0x80, 0xA9, 0xF0, 0x90, 0x88, 0x9D,
+0xE0, 0xC4, 0x13, 0x54, 0x07, 0x22, 0x90, 0x95,
+0x54, 0x12, 0x86, 0x42, 0x90, 0x04, 0x24, 0xE0,
+0xFF, 0xE4, 0xFE, 0x12, 0x87, 0xEB, 0x8E, 0x82,
+0x12, 0xA7, 0x24, 0x2F, 0xFD, 0xEE, 0x11, 0x24,
+0xED, 0xF0, 0x0E, 0xEE, 0xB4, 0x03, 0xEC, 0x22,
+0xC3, 0x13, 0x54, 0x07, 0x75, 0xF0, 0x1B, 0xA4,
+0x24, 0x64, 0xF5, 0x82, 0xE4, 0x34, 0x93, 0xF5,
+0x83, 0x22, 0xE4, 0x90, 0x96, 0x20, 0xF0, 0x90,
+0x93, 0x58, 0xE0, 0x20, 0xE0, 0x02, 0x21, 0x20,
+0x51, 0xC6, 0x54, 0x07, 0x90, 0x96, 0x1D, 0xF0,
+0x60, 0x05, 0xE0, 0x64, 0x02, 0x70, 0x66, 0x90,
+0x93, 0x5A, 0xE0, 0x70, 0x42, 0x90, 0x05, 0x22,
+0xE0, 0x90, 0x96, 0x1E, 0xF0, 0x7B, 0x4E, 0x7D,
+0x6F, 0xE4, 0xFF, 0x12, 0x8F, 0x64, 0x90, 0x93,
+0x58, 0xE0, 0x11, 0x20, 0xE0, 0xFF, 0x7E, 0x00,
+0x7B, 0x04, 0x7D, 0x01, 0x12, 0x8F, 0x87, 0xBF,
+0x01, 0x11, 0x90, 0x93, 0x58, 0xE0, 0x31, 0x21,
+0xE0, 0x44, 0x01, 0xF0, 0x90, 0x93, 0x5A, 0x74,
+0x01, 0xF0, 0x22, 0x90, 0x96, 0x1E, 0xE0, 0xFD,
+0x7B, 0x4F, 0xE4, 0xFF, 0x02, 0x8F, 0x64, 0x90,
+0x93, 0x5A, 0xE0, 0xB4, 0x01, 0x03, 0x74, 0x05,
+0xF0, 0x31, 0xA1, 0x31, 0xAA, 0x90, 0x93, 0x5A,
+0xE0, 0x64, 0x05, 0x70, 0x73, 0x12, 0x8C, 0x4B,
+0xEF, 0x70, 0x6D, 0x80, 0x67, 0x90, 0x96, 0x1D,
+0xE0, 0xFF, 0x64, 0x03, 0x60, 0x05, 0xEF, 0x64,
+0x01, 0x70, 0x5D, 0x90, 0x93, 0x5A, 0xE0, 0x64,
+0x05, 0x70, 0x55, 0x90, 0x96, 0x1D, 0xE0, 0x64,
+0x01, 0x70, 0x3F, 0x90, 0x96, 0x1F, 0x51, 0xB1,
+0xD3, 0x94, 0x1F, 0x90, 0x93, 0x58, 0xE0, 0x40,
+0x10, 0x11, 0x21, 0xE0, 0xFF, 0x90, 0x8A, 0xBF,
+0x12, 0x97, 0x44, 0x7D, 0x00, 0x7C, 0x7C, 0x80,
+0x1E, 0x11, 0x20, 0xE0, 0xFB, 0x90, 0x96, 0x1F,
+0x51, 0xB1, 0x7D, 0x00, 0x25, 0xE0, 0x25, 0xE0,
+0xFC, 0xAF, 0x03, 0x90, 0x8A, 0xBF, 0xE0, 0xFA,
+0xA3, 0xE0, 0xFB, 0xF5, 0x82, 0x8A, 0x83, 0x12,
+0x04, 0x7E, 0x31, 0xA1, 0x31, 0xAA, 0x12, 0x8C,
+0x4B, 0xEF, 0x70, 0x04, 0x7F, 0x06, 0xF1, 0xF0,
+0x22, 0xC3, 0x13, 0x54, 0x07, 0x75, 0xF0, 0x1B,
+0xA4, 0x24, 0x62, 0xF5, 0x82, 0xE4, 0x34, 0x93,
+0xF5, 0x83, 0x22, 0xE4, 0x90, 0x96, 0x1B, 0xF0,
+0x90, 0x93, 0x58, 0xE0, 0x30, 0xE0, 0x60, 0xC3,
+0x13, 0x54, 0x07, 0xFF, 0x31, 0x25, 0xE0, 0xFE,
+0x30, 0xE0, 0x54, 0xEF, 0x31, 0x25, 0xEE, 0x54,
+0xFE, 0xF0, 0xEF, 0x31, 0x25, 0x12, 0xB5, 0x23,
+0x30, 0xE0, 0x11, 0x90, 0x93, 0x58, 0xE0, 0xFE,
+0x31, 0x21, 0xEF, 0x54, 0xFB, 0xF0, 0x90, 0x96,
+0x1B, 0x74, 0x01, 0xF0, 0x90, 0x04, 0xE0, 0xE0,
+0x30, 0xE1, 0x1F, 0xD1, 0x8D, 0x90, 0x93, 0x58,
+0xE0, 0x31, 0x21, 0xE0, 0x44, 0x02, 0xF0, 0xE4,
+0x90, 0x93, 0xDE, 0x31, 0xA0, 0xFD, 0x7F, 0x02,
+0x31, 0xAD, 0x90, 0x96, 0x1B, 0xE0, 0x60, 0x0F,
+0x01, 0x32, 0x90, 0x93, 0x58, 0xE0, 0x31, 0x21,
+0xE0, 0x54, 0xFD, 0xF0, 0x12, 0x8F, 0x5F, 0x22,
+0xF0, 0x90, 0x93, 0x58, 0xE0, 0xC3, 0x13, 0x54,
+0x07, 0x22, 0xFD, 0x7F, 0x02, 0xD3, 0x10, 0xAF,
+0x01, 0xC3, 0xC0, 0xD0, 0x90, 0x97, 0x5F, 0xED,
+0xF0, 0x90, 0x97, 0x5E, 0xEF, 0xF0, 0x64, 0x02,
+0x70, 0x25, 0x90, 0x05, 0x22, 0xE0, 0x90, 0x97,
+0x60, 0xF0, 0x7B, 0x4A, 0x7D, 0x6F, 0x12, 0x8A,
+0x5F, 0xBF, 0x01, 0x07, 0x90, 0x04, 0xD4, 0x74,
+0xFF, 0x80, 0x49, 0x90, 0x97, 0x60, 0xE0, 0xFD,
+0x7B, 0x46, 0x12, 0x8F, 0x58, 0x80, 0x42, 0x90,
+0x97, 0x5E, 0xE0, 0x64, 0x01, 0x70, 0x31, 0x12,
+0x8F, 0x60, 0x90, 0x97, 0x5F, 0xE0, 0xFF, 0x75,
+0xF0, 0x1B, 0xA4, 0x24, 0x60, 0xF5, 0x82, 0xE4,
+0x34, 0x93, 0xF5, 0x83, 0xE0, 0xF4, 0x90, 0x04,
+0xD4, 0xF0, 0xEF, 0x75, 0xF0, 0x1B, 0xA4, 0x24,
+0x61, 0xF5, 0x82, 0xE4, 0x34, 0x93, 0xF5, 0x83,
+0xE0, 0xF4, 0x90, 0x04, 0xD5, 0xF0, 0x80, 0x07,
+0x90, 0x04, 0xD4, 0xE4, 0xF0, 0xA3, 0xF0, 0x7F,
+0x01, 0xD0, 0xD0, 0x92, 0xAF, 0x22, 0x90, 0x93,
+0x58, 0xE0, 0x30, 0xE0, 0x78, 0x90, 0x93, 0xDA,
+0xE0, 0x04, 0x31, 0xA0, 0x04, 0xFF, 0x90, 0x96,
+0x1B, 0xF0, 0x90, 0x93, 0x59, 0xE0, 0xB5, 0x07,
+0x05, 0xE4, 0x90, 0x96, 0x1B, 0xF0, 0x90, 0x93,
+0xD8, 0xE0, 0xFF, 0x60, 0x0F, 0x51, 0xAE, 0xC3,
+0x9F, 0xB1, 0x18, 0xFB, 0xFD, 0x7F, 0x50, 0x7E,
+0x01, 0x12, 0x66, 0x33, 0x90, 0x96, 0x1B, 0xE0,
+0x51, 0xCA, 0x54, 0x07, 0x90, 0x96, 0x1C, 0x51,
+0xC1, 0x54, 0x07, 0xFF, 0x14, 0x60, 0x0E, 0x14,
+0x60, 0x07, 0x14, 0x60, 0x08, 0x24, 0x03, 0x70,
+0x08, 0xD1, 0x8D, 0x80, 0x02, 0xD1, 0x8D, 0x11,
+0x32, 0xD1, 0xCC, 0x50, 0x20, 0x90, 0x96, 0x1C,
+0xE0, 0xFF, 0x64, 0x02, 0x60, 0x03, 0xEF, 0x70,
+0x0E, 0x51, 0xAE, 0x24, 0xFC, 0xFF, 0xE4, 0x90,
+0x92, 0x20, 0xF0, 0xA3, 0xEF, 0xB1, 0x58, 0x51,
+0xAE, 0xB1, 0x18, 0xD1, 0xC3, 0x22, 0x90, 0x96,
+0x1B, 0xE0, 0x75, 0xF0, 0x1B, 0xA4, 0x24, 0x5D,
+0xF5, 0x82, 0xE4, 0x34, 0x93, 0xF5, 0x83, 0xE0,
+0x22, 0xF0, 0x90, 0x93, 0x58, 0xE0, 0xC3, 0x13,
+0x54, 0x07, 0x75, 0xF0, 0x1B, 0xA4, 0x24, 0x5E,
+0xF5, 0x82, 0xE4, 0x34, 0x93, 0xF5, 0x83, 0xE0,
+0x22, 0x90, 0x93, 0x58, 0xE0, 0x20, 0xE0, 0x02,
+0xA1, 0x07, 0xC3, 0x13, 0x54, 0x07, 0x60, 0x02,
+0xA1, 0x07, 0x90, 0x93, 0xD9, 0xE0, 0x30, 0xE0,
+0x55, 0xD1, 0xCC, 0x40, 0x51, 0x90, 0x93, 0xE0,
+0xE0, 0x30, 0xE0, 0x23, 0x54, 0xFE, 0xF0, 0x90,
+0x93, 0xE2, 0xE0, 0x90, 0x93, 0xD6, 0xF0, 0x90,
+0x93, 0xE5, 0xE0, 0x90, 0x93, 0xD7, 0xF0, 0x90,
+0x93, 0xE3, 0xE0, 0x90, 0x93, 0x5D, 0xF0, 0x90,
+0x93, 0xE4, 0xE0, 0x90, 0x93, 0x78, 0xF0, 0x90,
+0x05, 0x58, 0xE0, 0x90, 0x95, 0xF9, 0x51, 0xC1,
+0x54, 0x07, 0xFF, 0x64, 0x02, 0x60, 0x03, 0xEF,
+0x70, 0x06, 0xB1, 0x22, 0x24, 0xFD, 0xB1, 0x55,
+0xB1, 0x22, 0x90, 0x92, 0x21, 0xF0, 0xE4, 0xD1,
+0xC3, 0xE4, 0x90, 0x93, 0xDA, 0xF0, 0x90, 0x93,
+0xD5, 0xE0, 0x20, 0xE0, 0x02, 0xA1, 0x07, 0x90,
+0x93, 0xD9, 0xE0, 0xFF, 0xC3, 0x13, 0xFE, 0x54,
+0x1F, 0x70, 0x02, 0xA1, 0x07, 0xEF, 0x54, 0xC1,
+0xFF, 0xEE, 0x14, 0x54, 0x1F, 0xFE, 0x25, 0xE0,
+0x4F, 0xF0, 0xE0, 0xC3, 0x13, 0x54, 0x1F, 0x60,
+0x02, 0xA1, 0x07, 0x90, 0x93, 0xE1, 0xE0, 0x30,
+0xE0, 0x17, 0x54, 0xFE, 0xF0, 0x90, 0x93, 0xE0,
+0xE0, 0x44, 0x01, 0xF0, 0xA3, 0xE0, 0x54, 0xFE,
+0xFF, 0x90, 0x93, 0xD5, 0xE0, 0x54, 0x01, 0x4F,
+0xF0, 0x90, 0x05, 0x22, 0xE0, 0x44, 0x40, 0xFD,
+0x7B, 0x58, 0x7F, 0x40, 0x12, 0x8F, 0x64, 0x90,
+0x05, 0x50, 0xE0, 0x54, 0xF7, 0xF0, 0x90, 0x05,
+0x69, 0xB1, 0x34, 0x90, 0x05, 0x68, 0x12, 0x8F,
+0xEC, 0x12, 0x86, 0x20, 0xC0, 0x04, 0xC0, 0x05,
+0xC0, 0x06, 0xC0, 0x07, 0x90, 0x05, 0x6A, 0x12,
+0x8F, 0xEC, 0x78, 0x10, 0x12, 0x03, 0xFE, 0xD0,
+0x03, 0xD0, 0x02, 0xD0, 0x01, 0xD0, 0x00, 0x12,
+0x86, 0x20, 0xC0, 0x04, 0xC0, 0x05, 0xC0, 0x06,
+0xC0, 0x07, 0xA3, 0x12, 0x8F, 0xEC, 0x78, 0x18,
+0x12, 0x03, 0xFE, 0xD0, 0x03, 0xD0, 0x02, 0xD0,
+0x01, 0xD0, 0x00, 0x12, 0x86, 0x20, 0x90, 0x95,
+0xED, 0x12, 0x04, 0x31, 0xB1, 0x0A, 0x90, 0x95,
+0xF5, 0x12, 0x04, 0x31, 0x90, 0x05, 0x6D, 0xB1,
+0x34, 0x90, 0x05, 0x6C, 0x12, 0x8F, 0xEC, 0x12,
+0x86, 0x20, 0xC0, 0x04, 0xC0, 0x05, 0xC0, 0x06,
+0xC0, 0x07, 0x90, 0x05, 0x6E, 0x12, 0x8F, 0xEC,
+0x78, 0x10, 0x12, 0x03, 0xFE, 0xD0, 0x03, 0xD0,
 0x02, 0xD0, 0x01, 0xD0, 0x00, 0x12, 0x86, 0x20,
-0x90, 0x96, 0xDD, 0x12, 0x04, 0x31, 0x90, 0x96,
-0xCF, 0xA3, 0xE0, 0xFD, 0xC0, 0x05, 0x90, 0x96,
-0xDD, 0x12, 0x04, 0xB8, 0x90, 0x8B, 0x9F, 0x12,
-0x04, 0x31, 0x90, 0x96, 0xCE, 0xE0, 0xFF, 0xD0,
-0x05, 0x12, 0x79, 0x53, 0xD0, 0xD0, 0x92, 0xAF,
-0x22, 0x12, 0x86, 0x2D, 0x02, 0x86, 0x13, 0xE4,
-0xFF, 0xD1, 0xA3, 0x90, 0x96, 0xD1, 0x22, 0xE4,
-0xFC, 0xFD, 0xFE, 0x90, 0x96, 0xD5, 0x12, 0x04,
-0x31, 0x7D, 0x18, 0x7C, 0x00, 0x22, 0x90, 0x93,
-0xF4, 0xE0, 0xFF, 0x90, 0x93, 0xF3, 0xE0, 0x4F,
-0x22, 0x90, 0x01, 0xC0, 0xE0, 0x44, 0x20, 0xF0,
-0x90, 0x97, 0x2F, 0xE0, 0xFD, 0x22, 0x90, 0x97,
-0x09, 0xA3, 0xE0, 0xFF, 0x90, 0x92, 0x13, 0x74,
-0x03, 0xF0, 0x7B, 0x06, 0x7D, 0x01, 0x12, 0x66,
-0xDB, 0x90, 0x97, 0x0D, 0xEE, 0xF0, 0xFC, 0xA3,
-0xEF, 0xF0, 0xFD, 0x90, 0x97, 0x0C, 0xE0, 0xFF,
-0x74, 0x10, 0x2D, 0xF5, 0x82, 0xE4, 0x34, 0xFC,
-0xF5, 0x83, 0xEF, 0xF0, 0x90, 0x97, 0x0B, 0x22,
-0x90, 0x88, 0x2C, 0xE0, 0xC4, 0x13, 0x13, 0x54,
-0x03, 0x22, 0xEF, 0xB4, 0xFF, 0x06, 0x90, 0x93,
-0xF4, 0xED, 0xF0, 0x22, 0xEF, 0xF4, 0xFE, 0x90,
-0x93, 0xF4, 0xE0, 0x5E, 0xFE, 0xED, 0x5F, 0x4E,
-0xF0, 0x22, 0x90, 0x86, 0xB6, 0xE0, 0xFF, 0x90,
-0x97, 0x11, 0xE0, 0xFB, 0x90, 0x92, 0x13, 0x74,
-0x0A, 0xF0, 0x7D, 0x01, 0x12, 0x66, 0xDB, 0x90,
-0x97, 0x12, 0xEE, 0xF0, 0xFC, 0xA3, 0xEF, 0xF0,
-0xFD, 0x90, 0x97, 0x10, 0xE0, 0xFF, 0x90, 0x8A,
-0x95, 0xE0, 0xFA, 0xA3, 0xE0, 0xFB, 0xF5, 0x82,
-0x8A, 0x83, 0x02, 0x04, 0x7E, 0xE4, 0x75, 0xF0,
-0x01, 0x02, 0x02, 0xE7, 0x12, 0x04, 0xB8, 0x90,
-0x92, 0x18, 0x02, 0x04, 0x31, 0xEF, 0xF0, 0xA3,
-0xED, 0xF0, 0xA3, 0xEB, 0xF0, 0x22, 0xD3, 0x10,
-0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0xAD, 0x07, 0x90,
-0x05, 0x63, 0xE0, 0xFE, 0x90, 0x05, 0x62, 0xE0,
-0x7A, 0x00, 0x24, 0x00, 0xFF, 0xEA, 0x3E, 0x90,
-0x96, 0x96, 0xF0, 0xA3, 0xEF, 0xF0, 0x90, 0x05,
-0x61, 0xE0, 0xFE, 0x90, 0x05, 0x60, 0xE0, 0x24,
-0x00, 0xFF, 0xEA, 0x3E, 0xFE, 0xED, 0xB4, 0x08,
-0x0A, 0x90, 0x05, 0x58, 0xE0, 0xFC, 0x2F, 0xFF,
-0xEA, 0x3E, 0xFE, 0x90, 0x96, 0x73, 0x74, 0x17,
-0xF0, 0x90, 0x96, 0x95, 0x74, 0x06, 0xF0, 0x90,
-0x96, 0x75, 0xED, 0xF0, 0x90, 0x93, 0x58, 0xE0,
-0xFD, 0xC3, 0x13, 0x54, 0x07, 0x12, 0xAD, 0x76,
-0xF5, 0x83, 0xE0, 0x90, 0x96, 0x76, 0xF0, 0xA3,
-0xEF, 0xF0, 0xEE, 0xA3, 0xF0, 0x90, 0x96, 0x96,
-0xE0, 0xFE, 0xA3, 0xE0, 0x90, 0x96, 0x79, 0xF0,
-0xEE, 0xA3, 0xF0, 0x7B, 0x01, 0x7A, 0x96, 0x79,
-0x73, 0x12, 0x8B, 0xBD, 0x7F, 0x04, 0x12, 0x04,
-0x7E, 0xD0, 0xD0, 0x92, 0xAF, 0x22, 0x91, 0xE5,
-0x12, 0x02, 0x06, 0xFF, 0x54, 0x0F, 0xF5, 0x64,
-0xEF, 0xC4, 0x54, 0x0F, 0x64, 0x0F, 0x70, 0x41,
-0x90, 0x93, 0x58, 0xE0, 0x54, 0xFE, 0xFF, 0xF0,
-0xE5, 0x64, 0x54, 0x07, 0x25, 0xE0, 0xFE, 0xEF,
-0x54, 0xF1, 0x4E, 0x12, 0x87, 0x75, 0xC4, 0x13,
-0x54, 0x07, 0x90, 0x93, 0xDF, 0x20, 0xE0, 0x05,
-0x74, 0x06, 0xF0, 0x80, 0x03, 0x74, 0x01, 0xF0,
-0x7D, 0x20, 0xE4, 0xFF, 0x12, 0x7C, 0x3B, 0xAF,
-0x64, 0x12, 0xAC, 0x55, 0xBF, 0x01, 0x06, 0xE4,
-0xFD, 0xFF, 0x12, 0xAB, 0xB1, 0x7F, 0x02, 0x21,
-0x71, 0xE5, 0x64, 0x75, 0xF0, 0x1B, 0xA4, 0x24,
-0x5B, 0xF9, 0x74, 0x93, 0x35, 0xF0, 0xFA, 0x7B,
-0x01, 0xC0, 0x02, 0xC0, 0x01, 0xE5, 0x63, 0x24,
-0x01, 0xF9, 0xE4, 0x35, 0x62, 0x85, 0x61, 0x45,
-0x12, 0xEC, 0x82, 0xD0, 0x01, 0xD0, 0x02, 0x12,
-0x69, 0xF5, 0xE5, 0x64, 0x12, 0xA7, 0x30, 0x54,
-0xF7, 0x31, 0x75, 0xC4, 0x54, 0x0F, 0x14, 0x65,
-0x64, 0x70, 0x71, 0x90, 0x88, 0x36, 0xE0, 0x70,
-0x07, 0x90, 0x88, 0x2C, 0xE0, 0x30, 0xE0, 0x04,
-0x7F, 0x05, 0x80, 0x5D, 0x31, 0x76, 0xC4, 0x54,
-0x0F, 0x90, 0x93, 0x59, 0x12, 0x87, 0x6B, 0xFC,
+0xC0, 0x04, 0xC0, 0x05, 0xC0, 0x06, 0xC0, 0x07,
+0xA3, 0x12, 0x8F, 0xEC, 0x78, 0x18, 0x12, 0x03,
+0xFE, 0xD0, 0x03, 0xD0, 0x02, 0xD0, 0x01, 0xD0,
+0x00, 0x12, 0x86, 0x20, 0x90, 0x95, 0xF1, 0x12,
+0x04, 0x31, 0x90, 0x95, 0xED, 0x12, 0x86, 0x2D,
+0xC0, 0x00, 0xC0, 0x01, 0xC0, 0x02, 0xC0, 0x03,
+0x90, 0x93, 0xD5, 0xE0, 0xC3, 0x13, 0x54, 0x7F,
+0xFF, 0xE4, 0xFC, 0xFD, 0xFE, 0xFB, 0x7A, 0x04,
+0xF9, 0xF8, 0x12, 0x85, 0xC4, 0xD0, 0x03, 0xD0,
+0x02, 0xD0, 0x01, 0xD0, 0x00, 0x12, 0x85, 0xA9,
+0x90, 0x95, 0xED, 0x12, 0x04, 0x31, 0x90, 0x95,
+0xF5, 0x12, 0x04, 0xB8, 0x90, 0x95, 0xED, 0x12,
+0xEE, 0x2C, 0x50, 0x0E, 0xB1, 0x12, 0xEF, 0x24,
+0x01, 0x12, 0xED, 0xD9, 0x90, 0x95, 0xF1, 0x12,
+0x04, 0x31, 0xB1, 0x12, 0x78, 0x18, 0x12, 0x03,
+0xEB, 0x90, 0x05, 0x67, 0xB1, 0x10, 0x78, 0x10,
+0x12, 0x03, 0xEB, 0x90, 0x05, 0x66, 0xB1, 0x10,
+0x78, 0x08, 0x12, 0x03, 0xEB, 0x90, 0x05, 0x65,
+0xB1, 0x10, 0x90, 0x05, 0x64, 0xB1, 0x08, 0x78,
+0x18, 0x12, 0x03, 0xEB, 0x90, 0x05, 0x63, 0xB1,
+0x08, 0x78, 0x10, 0x12, 0x03, 0xEB, 0x90, 0x05,
+0x62, 0xB1, 0x08, 0x78, 0x08, 0x12, 0x03, 0xEB,
+0x90, 0x05, 0x61, 0xB1, 0x08, 0x90, 0x05, 0x60,
+0xEF, 0xF0, 0x90, 0x05, 0x50, 0xE0, 0x44, 0x08,
+0xF0, 0x90, 0x05, 0x22, 0xE0, 0x54, 0xBF, 0xFD,
+0x7B, 0x59, 0x7F, 0x40, 0x12, 0x8F, 0x64, 0x7F,
+0x08, 0xF1, 0xF0, 0x90, 0x93, 0xD9, 0xE0, 0x54,
+0xC1, 0x44, 0x28, 0xF0, 0x44, 0x01, 0xF0, 0x22,
+0xEF, 0xF0, 0x90, 0x95, 0xED, 0x02, 0x04, 0xB8,
+0xEF, 0xF0, 0x90, 0x95, 0xF1, 0x02, 0x04, 0xB8,
+0x90, 0x92, 0x21, 0xF0, 0xE4, 0x90, 0x92, 0x20,
+0xF0, 0x22, 0xE4, 0x90, 0x92, 0x20, 0xF0, 0x90,
+0x95, 0xF9, 0xE0, 0xFF, 0x90, 0x93, 0xD6, 0xE0,
+0x2F, 0x22, 0xF0, 0xA3, 0xE0, 0xFF, 0xE4, 0xFC,
+0xFD, 0xFE, 0x78, 0x08, 0x12, 0x03, 0xFE, 0xA8,
+0x04, 0xA9, 0x05, 0xAA, 0x06, 0xAB, 0x07, 0x22,
+0xE0, 0x44, 0x02, 0xF0, 0xE4, 0x90, 0x92, 0x20,
+0xF0, 0x90, 0x88, 0x94, 0xE0, 0x90, 0x92, 0x21,
+0xF0, 0xE4, 0xFB, 0xFD, 0x7F, 0x54, 0x7E, 0x01,
+0x02, 0x66, 0x33, 0xE4, 0xF5, 0x7C, 0x90, 0x88,
+0x36, 0xE0, 0x60, 0x64, 0xD1, 0xA3, 0x70, 0x60,
+0xF1, 0xC1, 0x75, 0x7C, 0x01, 0x90, 0x88, 0x2C,
+0xE0, 0x30, 0xE0, 0x11, 0x90, 0x88, 0x30, 0xE0,
+0xB4, 0x02, 0x03, 0xE4, 0xF5, 0x7C, 0xD1, 0x67,
+0xEF, 0x70, 0x02, 0xF5, 0x7C, 0xE5, 0x7C, 0x60,
+0x3F, 0x90, 0x88, 0x39, 0xE0, 0x20, 0xE2, 0x08,
+0x90, 0x8A, 0xB9, 0x12, 0x90, 0x4B, 0xD1, 0x94,
+0xD1, 0x9B, 0x90, 0x88, 0x3F, 0xE0, 0x60, 0x04,
+0x64, 0x01, 0x70, 0x0F, 0xB1, 0xD1, 0xFF, 0xA3,
+0xE0, 0x2F, 0xB1, 0x55, 0xB1, 0xD6, 0xFF, 0xA3,
+0xE0, 0x80, 0x0B, 0xB1, 0xD1, 0xB1, 0xE0, 0x2F,
+0xB1, 0x55, 0xB1, 0xD6, 0xB1, 0xE0, 0x2F, 0x33,
+0x33, 0x33, 0x54, 0xF8, 0x90, 0x88, 0x4F, 0xF0,
+0x22, 0xE4, 0x90, 0x92, 0x20, 0xF0, 0x90, 0x88,
+0x3E, 0xE0, 0x13, 0x13, 0x13, 0x54, 0x1F, 0x22,
+0xFF, 0xA3, 0xE0, 0x75, 0xF0, 0x03, 0xA4, 0x24,
+0xFE, 0x22, 0x90, 0x88, 0x2C, 0xE0, 0x30, 0xE0,
+0x10, 0xA3, 0x74, 0x01, 0xF0, 0x90, 0x88, 0x2C,
+0xE0, 0xFF, 0xC3, 0x13, 0x30, 0xE0, 0x02, 0xD1,
+0x73, 0xB1, 0x63, 0xE4, 0xFF, 0xF1, 0x02, 0x90,
+0x8B, 0x07, 0x12, 0x8A, 0x66, 0x41, 0xD9, 0xE4,
+0x90, 0x96, 0x1B, 0xF0, 0x90, 0x88, 0x36, 0xE0,
+0x60, 0x4C, 0xD1, 0xA3, 0x70, 0x48, 0x12, 0xEE,
+0x33, 0xF0, 0xF1, 0xC1, 0x90, 0x96, 0x1B, 0x74,
+0x01, 0xF0, 0xE4, 0x90, 0x88, 0x3D, 0xF0, 0x90,
+0x88, 0x2C, 0xE0, 0x30, 0xE0, 0x15, 0x90, 0x88,
+0x30, 0xE0, 0xB4, 0x02, 0x05, 0xE4, 0x90, 0x96,
+0x1B, 0xF0, 0xD1, 0x67, 0xEF, 0x70, 0x04, 0x90,
+0x96, 0x1B, 0xF0, 0x90, 0x96, 0x1B, 0xE0, 0x60,
+0x15, 0x90, 0x88, 0x39, 0xE0, 0x20, 0xE2, 0x08,
+0x90, 0x8A, 0xB9, 0x12, 0x90, 0x4B, 0xD1, 0x94,
+0xD1, 0x9B, 0xB1, 0xD1, 0xB1, 0x55, 0x22, 0x90,
+0x05, 0x43, 0xE0, 0x7F, 0x00, 0x30, 0xE7, 0x02,
+0x7F, 0x01, 0x22, 0xD3, 0x10, 0xAF, 0x01, 0xC3,
+0xC0, 0xD0, 0xD1, 0x67, 0xBF, 0x01, 0x04, 0x7F,
+0x01, 0x80, 0x02, 0x7F, 0x02, 0x12, 0xE8, 0x85,
+0xD0, 0xD0, 0x92, 0xAF, 0x22, 0x90, 0x93, 0x5A,
+0x74, 0x05, 0xF0, 0x22, 0x7D, 0x01, 0x7F, 0x04,
+0x02, 0x04, 0x7E, 0x90, 0x88, 0x3A, 0xE0, 0x44,
+0x10, 0xF0, 0x22, 0xE4, 0xFF, 0x12, 0x78, 0x4A,
+0xEF, 0x64, 0x01, 0x22, 0xD1, 0xA3, 0x70, 0x12,
+0x90, 0x88, 0x36, 0xE0, 0x60, 0x0C, 0x90, 0x88,
+0x3A, 0xE0, 0x20, 0xE4, 0x05, 0x12, 0xB5, 0xBE,
+0xB1, 0x4B, 0x22, 0xFB, 0xFD, 0x7F, 0x58, 0x7E,
+0x01, 0x02, 0x66, 0x33, 0x90, 0x93, 0xD7, 0xE0,
+0xFF, 0x90, 0x93, 0xDA, 0xE0, 0xD3, 0x9F, 0x22,
+0xD1, 0x0F, 0xF1, 0x94, 0x7F, 0x01, 0xF1, 0x02,
+0x90, 0x8B, 0x07, 0x12, 0x8A, 0x66, 0x90, 0x93,
+0x3B, 0xE0, 0x30, 0xE0, 0x14, 0xF1, 0x9B, 0x90,
+0x93, 0x3E, 0xE0, 0x60, 0x05, 0x14, 0xF0, 0x02,
+0x79, 0xD4, 0x12, 0xEE, 0x0D, 0xE4, 0xFF, 0xF1,
+0x3F, 0x22, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0,
+0xD0, 0x90, 0x88, 0x33, 0xE0, 0xC3, 0x13, 0x30,
+0xE0, 0x28, 0x90, 0x96, 0xC5, 0x74, 0x1E, 0xF0,
+0x90, 0x96, 0xE7, 0x74, 0x01, 0xF0, 0x90, 0x96,
+0xC7, 0xEF, 0xF0, 0x7B, 0x01, 0x7A, 0x96, 0x79,
+0xC5, 0x12, 0xAC, 0x11, 0x12, 0x04, 0x7E, 0x90,
+0x8A, 0xE5, 0x12, 0x90, 0x4B, 0x7F, 0x04, 0x12,
+0x04, 0x7E, 0xD0, 0xD0, 0x92, 0xAF, 0x22, 0xD3,
+0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0xEF, 0x64,
+0x01, 0x70, 0x1A, 0xF1, 0x8C, 0x60, 0x09, 0xF1,
+0x85, 0x12, 0x7C, 0x05, 0xF1, 0x9B, 0x80, 0x08,
+0xF1, 0x85, 0x12, 0x7C, 0x3B, 0x12, 0xCC, 0xFE,
+0x12, 0x79, 0xD4, 0x80, 0x17, 0xF1, 0x8C, 0x60,
+0x07, 0xF1, 0x85, 0x12, 0x7C, 0x05, 0x80, 0x05,
+0xF1, 0x85, 0x12, 0x7C, 0x3B, 0xF1, 0x94, 0xF1,
+0xE9, 0x12, 0x7B, 0xCC, 0xD0, 0xD0, 0x92, 0xAF,
+0x22, 0xF0, 0x90, 0x01, 0x3F, 0x74, 0x10, 0xF0,
+0xFD, 0x7F, 0x03, 0x22, 0x90, 0x93, 0x3D, 0xE0,
+0x90, 0x01, 0x3F, 0x22, 0x7D, 0x02, 0x7F, 0x02,
+0x02, 0x7C, 0x74, 0x90, 0x93, 0x3D, 0xE0, 0x90,
+0x05, 0x73, 0xF0, 0x22, 0xAE, 0x07, 0xD1, 0x67,
+0xBF, 0x01, 0x13, 0x12, 0xC3, 0x4A, 0x20, 0xE0,
+0x0D, 0xAF, 0x06, 0x12, 0x97, 0x41, 0x7D, 0x01,
+0x12, 0x04, 0x7E, 0x7F, 0x01, 0x22, 0x7F, 0x00,
+0x22, 0x90, 0x05, 0x63, 0xE0, 0x90, 0x88, 0x89,
+0xF0, 0x90, 0x05, 0x62, 0xE0, 0x90, 0x88, 0x8A,
+0xF0, 0x90, 0x05, 0x61, 0xE0, 0x90, 0x88, 0x8B,
+0xF0, 0x90, 0x05, 0x60, 0xE0, 0x90, 0x88, 0x8C,
+0xF0, 0x90, 0x88, 0x32, 0xE0, 0x44, 0x80, 0xF0,
+0x22, 0x7D, 0x01, 0x7F, 0x02, 0x02, 0x7C, 0x74,
+0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0xAD,
+0x07, 0x90, 0x05, 0x63, 0xE0, 0xFE, 0x90, 0x05,
+0x62, 0xE0, 0x7A, 0x00, 0x24, 0x00, 0xFF, 0xEA,
+0x3E, 0x90, 0x96, 0xC3, 0xF0, 0xA3, 0xEF, 0xF0,
+0x90, 0x05, 0x61, 0xE0, 0xFE, 0x90, 0x05, 0x60,
+0xE0, 0x24, 0x00, 0xFF, 0xEA, 0x3E, 0xFE, 0xED,
+0xB4, 0x08, 0x0A, 0x90, 0x05, 0x58, 0xE0, 0xFC,
+0x2F, 0xFF, 0xEA, 0x3E, 0xFE, 0x90, 0x96, 0xA0,
+0x74, 0x17, 0xF0, 0x90, 0x96, 0xC2, 0x74, 0x06,
+0xF0, 0x90, 0x96, 0xA2, 0xED, 0xF0, 0x90, 0x93,
+0x58, 0xE0, 0xFD, 0xC3, 0x13, 0x54, 0x07, 0x12,
+0x8E, 0xFC, 0xF5, 0x83, 0xE0, 0x90, 0x96, 0xA3,
+0xF0, 0xA3, 0xEF, 0xF0, 0xEE, 0xA3, 0xF0, 0x90,
+0x96, 0xC3, 0xE0, 0xFE, 0xA3, 0xE0, 0x90, 0x96,
+0xA6, 0xF0, 0xEE, 0xA3, 0xF0, 0x7B, 0x01, 0x7A,
+0x96, 0x79, 0xA0, 0x12, 0x90, 0x39, 0x7F, 0x04,
+0x12, 0x04, 0x7E, 0xD0, 0xD0, 0x92, 0xAF, 0x22,
+0x51, 0x1F, 0x12, 0x02, 0x06, 0xFF, 0x54, 0x0F,
+0xF5, 0x64, 0xEF, 0xC4, 0x54, 0x0F, 0x64, 0x0F,
+0x70, 0x41, 0x90, 0x93, 0x58, 0xE0, 0x54, 0xFE,
+0xFF, 0xF0, 0xE5, 0x64, 0x54, 0x07, 0x25, 0xE0,
+0xFE, 0xEF, 0x54, 0xF1, 0x4E, 0x12, 0x87, 0xF3,
+0xC4, 0x13, 0x54, 0x07, 0x90, 0x93, 0xDF, 0x20,
+0xE0, 0x05, 0x74, 0x06, 0xF0, 0x80, 0x03, 0x74,
+0x01, 0xF0, 0x7D, 0x20, 0xE4, 0xFF, 0x12, 0x7C,
+0x3B, 0xAF, 0x64, 0x12, 0x8F, 0x08, 0xBF, 0x01,
+0x06, 0xE4, 0xFD, 0xFF, 0x12, 0x99, 0xAD, 0x7F,
+0x02, 0x21, 0x70, 0xE5, 0x64, 0x75, 0xF0, 0x1B,
+0xA4, 0x24, 0x5B, 0xF9, 0x74, 0x93, 0x35, 0xF0,
+0xFA, 0x7B, 0x01, 0xC0, 0x02, 0xC0, 0x01, 0xE5,
+0x63, 0x24, 0x01, 0xF9, 0xE4, 0x35, 0x62, 0x85,
+0x61, 0x45, 0xF1, 0x5E, 0xD0, 0x01, 0xD0, 0x02,
+0x12, 0x69, 0xF5, 0xE5, 0x64, 0x12, 0x9A, 0xCA,
+0x54, 0xF7, 0x31, 0x74, 0xC4, 0x54, 0x0F, 0x14,
+0x65, 0x64, 0x70, 0x6F, 0x90, 0x88, 0x36, 0xE0,
+0x70, 0x07, 0x90, 0x88, 0x2C, 0xE0, 0x30, 0xE0,
+0x04, 0x7F, 0x05, 0x80, 0x5B, 0x31, 0x75, 0xC4,
+0x54, 0x0F, 0x90, 0x93, 0x59, 0x51, 0x26, 0xFC,
 0x54, 0x0F, 0xC4, 0x54, 0xF0, 0xFE, 0x90, 0x93,
 0x58, 0xE0, 0x54, 0x0F, 0x4E, 0xF0, 0xEC, 0x54,
 0x60, 0xC4, 0x54, 0x0F, 0xFF, 0x90, 0x93, 0xAD,
 0xE0, 0x54, 0xF9, 0x4F, 0xF0, 0x90, 0x93, 0x58,
-0xE0, 0x54, 0xF1, 0xF0, 0x12, 0xD2, 0x95, 0x90,
-0x93, 0xD5, 0xE0, 0x90, 0x93, 0xD9, 0x30, 0xE0,
-0x0B, 0xE0, 0x54, 0xFE, 0xF0, 0x54, 0xC1, 0x44,
-0x02, 0xF0, 0x80, 0x07, 0xE0, 0x44, 0x01, 0xF0,
-0x54, 0xC1, 0xF0, 0x90, 0x93, 0x58, 0xE0, 0x44,
-0x01, 0xF0, 0xE4, 0x90, 0x93, 0x5A, 0xF0, 0x7F,
-0x03, 0x12, 0xAF, 0xEE, 0x22, 0xF0, 0xAB, 0x61,
-0xAA, 0x62, 0xA9, 0x63, 0x02, 0x02, 0x06, 0xD3,
-0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0x91, 0xE5,
-0x90, 0x05, 0x27, 0xE0, 0xF5, 0x64, 0x8B, 0x45,
-0x8A, 0x46, 0x89, 0x47, 0x75, 0x48, 0x01, 0x7B,
-0x01, 0x7A, 0x88, 0x79, 0x2C, 0x12, 0x69, 0xF5,
-0x31, 0x76, 0xFF, 0xC3, 0x13, 0x20, 0xE0, 0x02,
-0x41, 0x2E, 0x90, 0x88, 0x2C, 0xE0, 0x30, 0xE0,
-0x6C, 0x91, 0x01, 0x75, 0x64, 0x21, 0x91, 0x08,
-0x30, 0xE0, 0x04, 0x91, 0x44, 0x80, 0x0D, 0xE4,
-0x90, 0x88, 0x2D, 0xF0, 0xA3, 0xF0, 0x7D, 0x40,
-0xFF, 0x12, 0x7C, 0x7E, 0x90, 0x88, 0x2C, 0x91,
-0x3C, 0x30, 0xE0, 0x03, 0x43, 0x64, 0x12, 0xEF,
-0xC4, 0x54, 0x0F, 0x30, 0xE0, 0x03, 0x43, 0x64,
-0x14, 0x90, 0x88, 0x2C, 0xE0, 0xC4, 0x13, 0x54,
-0x07, 0x30, 0xE0, 0x03, 0x43, 0x64, 0x80, 0x12,
-0xAF, 0x80, 0x20, 0xE0, 0x03, 0x43, 0x64, 0x40,
-0x51, 0xE5, 0x90, 0x88, 0x2F, 0xE0, 0x70, 0x04,
-0x7F, 0x01, 0x51, 0xEC, 0x91, 0x11, 0x30, 0xE0,
-0x04, 0x7F, 0x04, 0x80, 0x0C, 0x12, 0xA6, 0x7B,
-0xEF, 0x60, 0x04, 0x7F, 0x01, 0x80, 0x02, 0x7F,
-0x02, 0x51, 0xEC, 0x41, 0xA1, 0x51, 0xE2, 0x90,
-0x88, 0x2F, 0xE0, 0x64, 0x04, 0x60, 0x02, 0x41,
-0xDD, 0xFF, 0x51, 0xEC, 0x41, 0xDD, 0x90, 0x88,
-0x2C, 0xE0, 0x30, 0xE0, 0x74, 0x91, 0x01, 0x43,
-0x64, 0x31, 0x91, 0x08, 0x30, 0xE0, 0x04, 0x91,
-0x44, 0x80, 0x07, 0x7D, 0x40, 0xE4, 0xFF, 0x12,
-0x7C, 0x7E, 0x90, 0x88, 0x2C, 0x91, 0x3C, 0x30,
-0xE0, 0x03, 0x43, 0x64, 0x02, 0xEF, 0xC4, 0x54,
-0x0F, 0x30, 0xE0, 0x03, 0x43, 0x64, 0x04, 0x51,
-0xE5, 0x91, 0x11, 0x30, 0xE0, 0x10, 0x71, 0xFA,
-0x60, 0x37, 0x90, 0x8A, 0xB9, 0x12, 0x8B, 0xCF,
-0xE4, 0xFD, 0x7F, 0x02, 0x80, 0x1E, 0x91, 0xC4,
-0x71, 0xFA, 0x70, 0x1D, 0x12, 0x7B, 0xAD, 0x12,
-0xA6, 0x7B, 0xBF, 0x01, 0x06, 0x91, 0x54, 0x7D,
-0x01, 0x80, 0x09, 0x90, 0x8A, 0xB9, 0x12, 0x8B,
-0xCF, 0xE4, 0xFD, 0xFF, 0x12, 0x04, 0x7E, 0x80,
-0x08, 0x90, 0x88, 0x39, 0xE0, 0x90, 0x88, 0x30,
-0xF0, 0x90, 0x05, 0x40, 0x74, 0x22, 0xF0, 0x80,
-0x34, 0x51, 0xE2, 0x90, 0x88, 0x30, 0xE0, 0xB4,
-0x02, 0x0C, 0x90, 0x8A, 0xB9, 0x12, 0x8B, 0xCF,
-0x7D, 0x01, 0x7F, 0x04, 0x80, 0x11, 0x90, 0x88,
-0x30, 0xE0, 0xB4, 0x08, 0x0D, 0x90, 0x8A, 0xB9,
-0x12, 0x8B, 0xCF, 0x7D, 0x01, 0x7F, 0x0C, 0x12,
-0x04, 0x7E, 0xB1, 0x05, 0x91, 0x54, 0x7D, 0x01,
-0x12, 0x04, 0x7E, 0xB1, 0x64, 0xD0, 0xD0, 0x92,
-0xAF, 0x22, 0x75, 0x64, 0x01, 0x90, 0x05, 0x27,
-0xE5, 0x64, 0xF0, 0x22, 0xD3, 0x10, 0xAF, 0x01,
-0xC3, 0xC0, 0xD0, 0x90, 0x88, 0x2F, 0xE0, 0x90,
-0x97, 0x45, 0xF0, 0x6F, 0x70, 0x02, 0x61, 0xF5,
-0xEF, 0x14, 0x60, 0x42, 0x14, 0x60, 0x6F, 0x14,
-0x70, 0x02, 0x61, 0xA1, 0x14, 0x70, 0x02, 0x61,
-0xCC, 0x24, 0x04, 0x60, 0x02, 0x61, 0xF5, 0x90,
-0x97, 0x45, 0xE0, 0xB4, 0x04, 0x04, 0x91, 0xCC,
-0x61, 0xF5, 0x90, 0x97, 0x45, 0xE0, 0xB4, 0x02,
-0x04, 0x91, 0xDC, 0x61, 0xF5, 0x90, 0x97, 0x45,
-0xE0, 0xB4, 0x03, 0x04, 0x91, 0xE0, 0x61, 0xF5,
-0x90, 0x97, 0x45, 0xE0, 0x64, 0x01, 0x60, 0x02,
-0x61, 0xF5, 0x91, 0xCF, 0x61, 0xF5, 0x90, 0x97,
-0x45, 0xE0, 0xB4, 0x04, 0x05, 0x12, 0x8F, 0xE8,
-0x61, 0xF5, 0x90, 0x97, 0x45, 0xE0, 0xB4, 0x02,
-0x04, 0xB1, 0x1A, 0x61, 0xF5, 0x90, 0x97, 0x45,
-0xE0, 0xB4, 0x03, 0x05, 0x12, 0x8F, 0xDA, 0x61,
-0xF5, 0x90, 0x97, 0x45, 0xE0, 0x60, 0x02, 0x61,
-0xF5, 0x12, 0x8F, 0xF4, 0x80, 0x7F, 0x90, 0x97,
-0x45, 0xE0, 0xB4, 0x04, 0x04, 0x91, 0x8B, 0x80,
-0x74, 0x90, 0x97, 0x45, 0xE0, 0xB4, 0x01, 0x04,
-0x91, 0x77, 0x80, 0x69, 0x90, 0x97, 0x45, 0xE0,
-0xB4, 0x03, 0x04, 0x91, 0xF4, 0x80, 0x5E, 0x90,
-0x97, 0x45, 0xE0, 0x70, 0x58, 0x91, 0x74, 0x80,
-0x54, 0x90, 0x97, 0x45, 0xE0, 0xB4, 0x04, 0x04,
-0x91, 0xB3, 0x80, 0x49, 0x90, 0x97, 0x45, 0xE0,
-0xB4, 0x01, 0x04, 0x91, 0x9F, 0x80, 0x3E, 0x90,
-0x97, 0x45, 0xE0, 0xB4, 0x02, 0x04, 0x91, 0xEC,
-0x80, 0x33, 0x90, 0x97, 0x45, 0xE0, 0x70, 0x2D,
-0x91, 0x9C, 0x80, 0x29, 0x90, 0x97, 0x45, 0xE0,
-0xB4, 0x03, 0x04, 0xB1, 0x0E, 0x80, 0x1E, 0x90,
-0x97, 0x45, 0xE0, 0xB4, 0x01, 0x04, 0x91, 0x68,
-0x80, 0x13, 0x90, 0x97, 0x45, 0xE0, 0xB4, 0x02,
-0x04, 0xB1, 0x3E, 0x80, 0x08, 0x90, 0x97, 0x45,
-0xE0, 0x70, 0x02, 0x91, 0x65, 0xD0, 0xD0, 0x92,
-0xAF, 0x22, 0x90, 0x88, 0x30, 0xE0, 0x64, 0x02,
-0x22, 0x7D, 0x03, 0x7F, 0x02, 0x02, 0x7C, 0x05,
-0x90, 0x88, 0x2C, 0xE0, 0x13, 0x13, 0x54, 0x3F,
-0x22, 0x90, 0x88, 0x2C, 0xE0, 0xFF, 0xC4, 0x13,
-0x13, 0x54, 0x03, 0x22, 0x91, 0x11, 0x30, 0xE0,
-0x11, 0x71, 0xFA, 0x60, 0x0D, 0x90, 0x8A, 0xB9,
-0x12, 0x8B, 0xCF, 0x7D, 0x01, 0x7F, 0x02, 0x12,
-0x04, 0x7E, 0x71, 0xFA, 0x60, 0x02, 0xB1, 0x81,
-0x22, 0x90, 0x88, 0x32, 0xE0, 0xFF, 0x13, 0x13,
-0x13, 0x54, 0x1F, 0x22, 0x90, 0x01, 0x34, 0x74,
-0x40, 0xF0, 0xFD, 0xE4, 0xFF, 0x12, 0x7C, 0x74,
-0x43, 0x64, 0x08, 0x22, 0x90, 0x88, 0x38, 0xE0,
-0xFF, 0x90, 0x8A, 0xB9, 0xE0, 0xFC, 0xA3, 0xE0,
-0xF5, 0x82, 0x8C, 0x83, 0x22, 0x12, 0x8F, 0xF4,
-0x90, 0x8A, 0xF9, 0x12, 0x8B, 0xCF, 0x7D, 0x1F,
-0xB1, 0x2C, 0xF0, 0x22, 0x12, 0x8F, 0xF4, 0x90,
-0x8A, 0xF9, 0x12, 0x8B, 0xCF, 0x7D, 0x20, 0x91,
-0xFC, 0x12, 0x92, 0x57, 0x90, 0x88, 0x2F, 0x74,
-0x02, 0xF0, 0x22, 0x91, 0xC4, 0x90, 0x8A, 0xF9,
-0x12, 0x8B, 0xCF, 0x7D, 0x23, 0x91, 0xFC, 0x12,
-0x92, 0x57, 0x80, 0xE8, 0x12, 0x8F, 0xF4, 0x90,
-0x8A, 0xF9, 0x12, 0x8B, 0xCF, 0x7D, 0x21, 0x7F,
-0xFF, 0x12, 0x04, 0x7E, 0x90, 0x88, 0x2F, 0x74,
-0x03, 0xF0, 0x22, 0x90, 0x8A, 0xF9, 0x12, 0x8B,
-0xCF, 0x7D, 0x22, 0x7F, 0xFF, 0x12, 0x04, 0x7E,
-0x91, 0xC4, 0x80, 0xE8, 0x90, 0x05, 0x27, 0xE0,
-0x44, 0x40, 0xF0, 0x22, 0x12, 0x8F, 0xE8, 0x90,
-0x05, 0x27, 0xE0, 0x54, 0xBF, 0xF0, 0xE4, 0x90,
-0x88, 0x2F, 0xF0, 0x22, 0xB1, 0x1A, 0x80, 0xEF,
-0x12, 0x8F, 0xDA, 0x80, 0xEA, 0x8B, 0x61, 0x8A,
-0x62, 0x89, 0x63, 0x22, 0x90, 0x86, 0x0C, 0x12,
-0x92, 0x57, 0x80, 0xB8, 0x90, 0x8A, 0xEF, 0x12,
-0x92, 0x57, 0x80, 0x88, 0x7F, 0xFF, 0x12, 0x04,
-0x7E, 0x90, 0x8A, 0xEF, 0x22, 0x12, 0x7A, 0x65,
-0xEF, 0x70, 0x02, 0xB1, 0x50, 0x22, 0x90, 0x8A,
-0xF9, 0x12, 0x8B, 0xCF, 0x7D, 0x25, 0xB1, 0x2C,
-0xF0, 0x22, 0x90, 0x86, 0x0C, 0x12, 0x92, 0x57,
-0x90, 0x8A, 0xF9, 0x12, 0x8B, 0xCF, 0x12, 0x8F,
-0xD4, 0x02, 0x8F, 0xE1, 0x7F, 0x6F, 0x12, 0x04,
-0x7E, 0x90, 0x05, 0x27, 0xE0, 0x54, 0xBF, 0xF0,
-0x90, 0x88, 0x2F, 0x74, 0x04, 0x22, 0x90, 0x86,
-0x0C, 0x12, 0x92, 0x57, 0x90, 0x8A, 0xF9, 0x12,
-0x8B, 0xCF, 0x7D, 0x24, 0xB1, 0x2C, 0xF0, 0x22,
-0x90, 0x88, 0x39, 0xE0, 0xB4, 0x04, 0x02, 0xF1,
-0x4D, 0x90, 0x88, 0x9D, 0xE0, 0x20, 0xE0, 0x03,
-0x12, 0x8F, 0xA8, 0x22, 0x7E, 0x00, 0x7F, 0x01,
-0x7D, 0x00, 0x7B, 0x01, 0x7A, 0x88, 0x79, 0x2C,
-0x12, 0x04, 0x80, 0x90, 0x88, 0x2C, 0xE0, 0x54,
-0xFD, 0x12, 0xD7, 0x7B, 0xA3, 0x74, 0x0C, 0xF0,
-0x22, 0x90, 0x88, 0x36, 0xE0, 0x64, 0x02, 0x60,
-0x13, 0xB1, 0xA4, 0x60, 0x0F, 0x12, 0x7A, 0x65,
-0xEF, 0x70, 0x09, 0x90, 0x8A, 0xB9, 0x12, 0x8B,
-0xCF, 0x12, 0x8F, 0xF6, 0x22, 0x90, 0x88, 0x3A,
-0xE0, 0x44, 0x01, 0xF0, 0x90, 0x88, 0x34, 0xE0,
-0x54, 0x0F, 0x22, 0x91, 0x39, 0x30, 0xE0, 0x0C,
-0xEF, 0xC4, 0x13, 0x13, 0x54, 0x03, 0x30, 0xE0,
-0x03, 0x12, 0xEC, 0x34, 0xF1, 0xB4, 0x30, 0xE0,
-0x09, 0xEF, 0xF1, 0xBE, 0x54, 0x07, 0x70, 0x3D,
-0x80, 0x39, 0xF1, 0xC9, 0x40, 0x35, 0x12, 0xA7,
-0x5D, 0x70, 0x32, 0xB1, 0xA4, 0x70, 0x08, 0x90,
-0x8A, 0xF5, 0x12, 0x92, 0x57, 0x80, 0x27, 0x90,
-0x8A, 0xF5, 0x12, 0x92, 0x57, 0x90, 0x88, 0x40,
-0xE0, 0x04, 0xF0, 0xE0, 0xD3, 0x94, 0x02, 0x40,
-0x09, 0xD1, 0x06, 0xE4, 0x90, 0x88, 0x40, 0xF0,
-0x80, 0x03, 0x12, 0x8F, 0x5B, 0xE4, 0x90, 0x88,
-0x3F, 0xF0, 0x22, 0xD1, 0xD9, 0x22, 0x90, 0x88,
-0x32, 0xE0, 0x54, 0xFB, 0xF0, 0x22, 0x90, 0x06,
-0xA9, 0xE0, 0x90, 0x95, 0xE8, 0xF0, 0xE0, 0xFD,
-0x54, 0xC0, 0x70, 0x04, 0xD1, 0x81, 0x80, 0x5D,
-0xED, 0x30, 0xE6, 0x47, 0x90, 0x88, 0x36, 0xE0,
-0x64, 0x02, 0x70, 0x2C, 0x90, 0x88, 0x31, 0xE0,
-0xC3, 0x13, 0x20, 0xE0, 0x09, 0x90, 0x88, 0x3A,
-0xE0, 0x44, 0x01, 0xF0, 0x80, 0x20, 0xB1, 0xA4,
-0x64, 0x01, 0x70, 0x29, 0x90, 0x88, 0x3A, 0xE0,
-0x44, 0x04, 0xF0, 0x90, 0x8A, 0x71, 0x12, 0x8B,
-0xCF, 0x7F, 0x01, 0x12, 0x04, 0x7E, 0x80, 0x15,
-0xB1, 0x9D, 0x64, 0x02, 0x60, 0x08, 0x90, 0x8A,
-0xE1, 0x12, 0x92, 0x57, 0x80, 0x07, 0x12, 0x73,
-0x8F, 0x80, 0x02, 0xD1, 0x81, 0x90, 0x95, 0xE8,
-0xE0, 0x90, 0x88, 0x3A, 0x30, 0xE7, 0x05, 0x12,
-0xA6, 0x08, 0xE1, 0x55, 0xE0, 0x54, 0xFD, 0xF0,
-0x22, 0x90, 0x88, 0x3A, 0xE0, 0x54, 0xFE, 0xF0,
-0x22, 0xE4, 0xF5, 0x7C, 0x90, 0x06, 0xA9, 0xE0,
-0xF5, 0x7C, 0x54, 0xC0, 0x70, 0x0F, 0xD1, 0x81,
-0x54, 0xFD, 0xF0, 0xD1, 0xD9, 0x90, 0x88, 0x39,
-0xE0, 0x60, 0x35, 0xE1, 0x4D, 0xE5, 0x7C, 0x30,
-0xE6, 0x1B, 0x90, 0x88, 0x36, 0xE0, 0x64, 0x01,
-0x70, 0x15, 0xB1, 0x9D, 0x64, 0x02, 0x60, 0x08,
-0x90, 0x8A, 0xE1, 0x12, 0x92, 0x57, 0x80, 0x07,
-0x12, 0x8F, 0x5B, 0x80, 0x02, 0xD1, 0x81, 0xE5,
-0x7C, 0x90, 0x88, 0x3A, 0x30, 0xE7, 0x05, 0x12,
-0xA6, 0x08, 0xE1, 0x55, 0xE0, 0x54, 0xFD, 0xF0,
-0x22, 0x90, 0x88, 0x2C, 0xE0, 0x90, 0x88, 0x38,
-0x30, 0xE0, 0x05, 0xE0, 0xFF, 0x02, 0xA7, 0xA1,
-0x91, 0x57, 0x7D, 0x01, 0x02, 0x04, 0x7E, 0x90,
-0x95, 0x37, 0xE0, 0xB4, 0x01, 0x1A, 0xE4, 0xF0,
-0x90, 0x01, 0x5B, 0xF0, 0x90, 0x92, 0x20, 0xF0,
-0x90, 0x88, 0x95, 0xE0, 0xC3, 0x13, 0x54, 0x7F,
-0x90, 0x92, 0x21, 0xF0, 0xE4, 0x12, 0xEB, 0x83,
-0x90, 0x88, 0x31, 0x91, 0x14, 0x30, 0xE0, 0x34,
-0xEF, 0x54, 0xBF, 0x12, 0xC9, 0x13, 0x30, 0xE0,
-0x06, 0xE0, 0x44, 0x01, 0xF0, 0x80, 0x0A, 0xE0,
-0x54, 0xFE, 0xF0, 0x12, 0xC8, 0xA9, 0x74, 0x04,
-0xF0, 0x90, 0x88, 0xA3, 0xE0, 0xFF, 0xC4, 0x13,
-0x54, 0x07, 0x30, 0xE0, 0x0D, 0x90, 0x8A, 0xB9,
-0x12, 0x8B, 0xCF, 0x7D, 0x01, 0x7F, 0x0C, 0x02,
-0x04, 0x7E, 0xD1, 0xD9, 0x22, 0x90, 0x00, 0x02,
-0xE0, 0x44, 0x01, 0xF0, 0x22, 0x90, 0x88, 0x31,
-0xE0, 0x44, 0x04, 0xF0, 0x22, 0xE4, 0xFF, 0x12,
-0x78, 0x4A, 0xBF, 0x01, 0x0E, 0x90, 0x88, 0x36,
-0xE0, 0x60, 0x08, 0xD1, 0x81, 0x54, 0x07, 0x70,
-0x02, 0xD1, 0xD9, 0x22, 0x90, 0x88, 0x36, 0xE0,
-0x70, 0x07, 0x90, 0x88, 0x2C, 0xE0, 0x30, 0xE0,
-0x11, 0x90, 0x88, 0x2C, 0xE0, 0x30, 0xE0, 0x08,
-0x12, 0xA6, 0x7B, 0xBF, 0x01, 0x04, 0xA1, 0x81,
-0xB1, 0x50, 0x22, 0x90, 0x01, 0x57, 0xE0, 0x60,
-0x1A, 0x12, 0xDD, 0xB7, 0xF0, 0xF1, 0xB4, 0x30,
-0xE0, 0x03, 0xEF, 0x80, 0x19, 0xF1, 0xC9, 0x40,
-0x0A, 0xE4, 0xFF, 0x12, 0x78, 0x4A, 0xBF, 0x01,
-0x02, 0xD1, 0x06, 0x22, 0x90, 0x88, 0x31, 0xE0,
-0xFF, 0x13, 0x13, 0x54, 0x3F, 0x22, 0x54, 0xFB,
-0xF0, 0x90, 0x88, 0x3A, 0xE0, 0x54, 0xFD, 0xF0,
-0x22, 0x90, 0x88, 0x3F, 0xE0, 0x04, 0xF0, 0x90,
-0x88, 0x3A, 0xE0, 0x54, 0xEF, 0xF0, 0x90, 0x88,
-0x93, 0xE0, 0xFF, 0x90, 0x88, 0x3F, 0xE0, 0xD3,
-0x9F, 0x22, 0x91, 0xE5, 0x90, 0x93, 0xE0, 0xE0,
-0x54, 0xFE, 0x12, 0x87, 0x64, 0xFC, 0x30, 0xE0,
-0x45, 0x90, 0x93, 0xE1, 0xE0, 0x44, 0x01, 0xFE,
-0xF0, 0x12, 0x02, 0x06, 0x54, 0xFE, 0xFD, 0xEE,
-0x54, 0x01, 0x4D, 0x90, 0x93, 0xE1, 0xF0, 0x12,
-0x87, 0xBC, 0x90, 0x93, 0xE2, 0xF0, 0xEC, 0xC3,
-0x13, 0x54, 0x7F, 0xFF, 0xA3, 0xF0, 0x12, 0x87,
-0xB1, 0xFE, 0xC3, 0x9F, 0x90, 0x93, 0xE4, 0xF0,
-0xA3, 0xEE, 0xF0, 0xBE, 0x64, 0x04, 0x74, 0x01,
-0xF0, 0x22, 0x90, 0x93, 0xE5, 0xE0, 0x64, 0x96,
-0x70, 0x54, 0x74, 0x03, 0xF0, 0x22, 0x90, 0x93,
-0xE1, 0xE0, 0x54, 0xFE, 0x12, 0xB1, 0x75, 0xFF,
-0x54, 0x01, 0xFE, 0x90, 0x93, 0xD5, 0xE0, 0x54,
-0xFE, 0x4E, 0xFE, 0xF0, 0xEF, 0x54, 0xFE, 0xFF,
-0xEE, 0x54, 0x01, 0x4F, 0xF0, 0x12, 0x87, 0xBC,
-0x90, 0x93, 0xD6, 0xF0, 0x12, 0x87, 0xB1, 0x90,
+0xE0, 0x54, 0xF1, 0xF0, 0xF1, 0x57, 0x90, 0x93,
+0xD5, 0xE0, 0x90, 0x93, 0xD9, 0x30, 0xE0, 0x0B,
+0xE0, 0x54, 0xFE, 0xF0, 0x54, 0xC1, 0x44, 0x02,
+0xF0, 0x80, 0x07, 0xE0, 0x44, 0x01, 0xF0, 0x54,
+0xC1, 0xF0, 0x90, 0x93, 0x58, 0xE0, 0x44, 0x01,
+0xF0, 0xE4, 0x90, 0x93, 0x5A, 0xF0, 0x7F, 0x03,
+0x12, 0x9F, 0xF0, 0x22, 0xF0, 0xAB, 0x61, 0xAA,
+0x62, 0xA9, 0x63, 0x02, 0x02, 0x06, 0x51, 0x1F,
+0x90, 0x93, 0xE0, 0xE0, 0x54, 0xFE, 0xF0, 0x12,
+0x87, 0x63, 0xFC, 0x30, 0xE0, 0x43, 0x90, 0x93,
+0xE1, 0xE0, 0x44, 0x01, 0xFE, 0xF0, 0x12, 0x02,
+0x06, 0x54, 0xFE, 0xFD, 0xEE, 0x54, 0x01, 0x4D,
+0x90, 0x93, 0xE1, 0x12, 0x87, 0x69, 0x90, 0x93,
+0xE2, 0xF0, 0xEC, 0xC3, 0x13, 0x54, 0x7F, 0xFF,
+0xA3, 0x12, 0x87, 0x96, 0xFE, 0xC3, 0x9F, 0x90,
+0x93, 0xE4, 0xF0, 0xA3, 0xEE, 0xF0, 0xBE, 0x64,
+0x04, 0x74, 0x01, 0xF0, 0x22, 0x90, 0x93, 0xE5,
+0xE0, 0x64, 0x96, 0x70, 0x51, 0x74, 0x03, 0xF0,
+0x22, 0x90, 0x93, 0xE1, 0xE0, 0x54, 0xFE, 0x31,
+0x74, 0xFF, 0x54, 0x01, 0xFE, 0x90, 0x93, 0xD5,
+0xE0, 0x54, 0xFE, 0x4E, 0xFE, 0xF0, 0xEF, 0x54,
+0xFE, 0xFF, 0xEE, 0x54, 0x01, 0x4F, 0x12, 0x87,
+0x69, 0x90, 0x93, 0xD6, 0x12, 0x87, 0x96, 0x90,
 0x93, 0xD7, 0xF0, 0xE4, 0xA3, 0xF0, 0x90, 0x93,
 0xD7, 0xE0, 0xFF, 0xB4, 0x64, 0x05, 0x74, 0x01,
 0xF0, 0x80, 0x0A, 0xEF, 0xB4, 0x96, 0x06, 0x90,
 0x93, 0xD7, 0x74, 0x03, 0xF0, 0x90, 0x93, 0xD7,
-0xE0, 0x04, 0x90, 0x93, 0xDA, 0xF0, 0x22, 0x31,
-0x00, 0x90, 0x93, 0x03, 0xE0, 0x54, 0xFE, 0x4E,
-0xF0, 0x30, 0xE0, 0x30, 0xEF, 0x54, 0x04, 0x25,
-0xE0, 0xFE, 0xE0, 0x54, 0xF7, 0x4E, 0xFE, 0xF0,
-0xEF, 0x54, 0x02, 0x25, 0xE0, 0xFF, 0xEE, 0x54,
-0xFB, 0x4F, 0xF0, 0x90, 0x04, 0x57, 0xE0, 0x90,
-0x93, 0x05, 0xF0, 0x90, 0x04, 0x55, 0xE0, 0x90,
-0x93, 0x04, 0xF0, 0x7D, 0x10, 0x7F, 0x01, 0x12,
-0x7C, 0x05, 0x80, 0x07, 0x7D, 0x10, 0x7F, 0x01,
-0x12, 0x7C, 0x3B, 0x90, 0x93, 0x03, 0xE0, 0x54,
-0x01, 0xFF, 0xEF, 0x90, 0x07, 0xDC, 0x60, 0x25,
-0xE4, 0xF0, 0xF0, 0x90, 0x07, 0xDE, 0xF0, 0xA3,
-0x04, 0xF0, 0x90, 0x07, 0xDD, 0x74, 0x03, 0xF0,
-0x90, 0x07, 0xE3, 0xE0, 0xF0, 0xA3, 0x74, 0x50,
-0xF0, 0xA3, 0x74, 0x10, 0xF0, 0x90, 0x07, 0xDC,
-0xE0, 0x44, 0x01, 0xF0, 0x22, 0xE4, 0xF0, 0x22,
-0x12, 0x02, 0x06, 0xFF, 0x54, 0x01, 0xFE, 0x22,
-0x31, 0x55, 0xFF, 0x12, 0x87, 0xBC, 0xFE, 0x54,
-0x03, 0xFD, 0xEE, 0x13, 0x13, 0x54, 0x07, 0xFB,
-0xC0, 0x03, 0x12, 0x87, 0xAC, 0x54, 0x0F, 0x90,
-0x97, 0x28, 0xF0, 0xD0, 0x03, 0x12, 0xAE, 0x39,
-0x12, 0x87, 0xB7, 0xFE, 0x54, 0x03, 0x12, 0xA9,
-0xF2, 0x90, 0x95, 0x51, 0x74, 0x10, 0xF0, 0x90,
-0x95, 0x73, 0x74, 0x07, 0xF0, 0x12, 0x93, 0xDD,
-0x12, 0x02, 0x06, 0x90, 0x95, 0x53, 0xF0, 0x7B,
-0x01, 0x7A, 0x95, 0x79, 0x51, 0x12, 0x8B, 0xBD,
-0x7F, 0x04, 0x02, 0x04, 0x7E, 0x90, 0x95, 0x4E,
-0x12, 0x86, 0x42, 0x02, 0x02, 0x06, 0xEF, 0x70,
-0x05, 0x90, 0x93, 0x05, 0x80, 0x03, 0x90, 0x93,
-0x04, 0xE0, 0xFF, 0x12, 0x7B, 0x07, 0x90, 0x95,
-0xE7, 0xEF, 0xF0, 0x90, 0x95, 0xE7, 0xE0, 0x24,
-0x38, 0xF9, 0xE4, 0x34, 0xFC, 0xFA, 0x7B, 0x01,
-0xA3, 0x12, 0x86, 0x42, 0xE4, 0xFF, 0x74, 0x08,
-0x2F, 0xF5, 0x82, 0xE4, 0x34, 0x07, 0xF5, 0x83,
-0xE0, 0xFE, 0x90, 0x95, 0xE8, 0x12, 0x86, 0x39,
-0x8F, 0x82, 0x75, 0x83, 0x00, 0x51, 0x20, 0xB4,
-0x06, 0xE4, 0x90, 0x95, 0xE7, 0xE0, 0x24, 0x52,
+0xE0, 0x04, 0x90, 0x93, 0xDA, 0xF0, 0x22, 0x8B,
+0x61, 0x8A, 0x62, 0x89, 0x63, 0x22, 0xF0, 0x90,
+0x00, 0x06, 0x02, 0x02, 0x1F, 0xEF, 0x70, 0x05,
+0x90, 0x93, 0x05, 0x80, 0x03, 0x90, 0x93, 0x04,
+0xE0, 0xFF, 0x12, 0x7B, 0x07, 0x90, 0x95, 0xED,
+0xEF, 0xF0, 0x90, 0x95, 0xED, 0xE0, 0x24, 0x38,
 0xF9, 0xE4, 0x34, 0xFC, 0xFA, 0x7B, 0x01, 0xA3,
-0x31, 0x58, 0x70, 0x5D, 0x90, 0x95, 0xE8, 0x12,
-0x87, 0xBA, 0x64, 0x02, 0x70, 0x53, 0x90, 0x24,
-0x87, 0xE0, 0x90, 0x00, 0x03, 0x12, 0x02, 0x5E,
-0x90, 0x24, 0x86, 0xE0, 0x90, 0x00, 0x04, 0x12,
-0x02, 0x5E, 0x90, 0x95, 0xE8, 0x12, 0x86, 0x39,
-0x12, 0x87, 0x65, 0x64, 0x01, 0x70, 0x32, 0x12,
-0x87, 0x6C, 0x64, 0x0D, 0x70, 0x2B, 0xFF, 0x74,
-0x88, 0x51, 0x29, 0xEF, 0x24, 0x08, 0x51, 0x12,
-0xB4, 0x08, 0xF4, 0x90, 0x05, 0xDC, 0xE0, 0xFF,
-0x90, 0x95, 0xE8, 0x12, 0x86, 0x39, 0x90, 0x00,
-0x10, 0xEF, 0x12, 0x02, 0x5E, 0xE4, 0xFF, 0x51,
-0x27, 0xEF, 0x24, 0x11, 0x51, 0x12, 0xB4, 0x04,
-0xF6, 0x22, 0xFD, 0xE4, 0x33, 0xFC, 0x90, 0x95,
-0xE8, 0x12, 0x86, 0x39, 0x8D, 0x82, 0x8C, 0x83,
-0xEE, 0x12, 0x02, 0x5E, 0x0F, 0xEF, 0x22, 0x74,
-0x90, 0x2F, 0xF5, 0x82, 0xE4, 0x34, 0x24, 0xF5,
-0x83, 0xE0, 0xFE, 0x22, 0x90, 0x93, 0x03, 0xE0,
-0x30, 0xE0, 0x1E, 0xE4, 0xFF, 0xF1, 0xAE, 0xE4,
-0xFF, 0x31, 0x5E, 0x7F, 0x01, 0x31, 0x5E, 0x90,
-0x93, 0x03, 0xE0, 0x13, 0x13, 0x54, 0x3F, 0x30,
-0xE0, 0x07, 0x90, 0x04, 0x1F, 0xE0, 0x44, 0x80,
-0xF0, 0x22, 0xE4, 0xFF, 0x74, 0x94, 0x51, 0x29,
-0x74, 0x13, 0x2F, 0xF5, 0x82, 0xE4, 0x34, 0x93,
-0x51, 0x81, 0xB4, 0x08, 0xEF, 0xE4, 0xFF, 0x74,
-0x9C, 0x51, 0x29, 0x74, 0x1C, 0x2F, 0xF5, 0x82,
-0xE4, 0x34, 0x93, 0x51, 0x81, 0xB4, 0x04, 0xEF,
-0x22, 0xF5, 0x83, 0xEE, 0xF0, 0x0F, 0xEF, 0x22,
-0xE4, 0xFF, 0x74, 0x88, 0x51, 0x29, 0x74, 0x06,
-0x2F, 0xF5, 0x82, 0xE4, 0x34, 0x93, 0x51, 0x81,
-0xB4, 0x08, 0xEF, 0x90, 0x05, 0xDC, 0xE0, 0x90,
-0x93, 0x0E, 0xF0, 0xE4, 0xFF, 0x51, 0x27, 0x74,
-0x0F, 0x2F, 0xF5, 0x82, 0xE4, 0x34, 0x93, 0x51,
-0x81, 0xB4, 0x04, 0xF1, 0x22, 0xE4, 0x90, 0x95,
-0xE8, 0xF0, 0xF1, 0x9A, 0xD1, 0x69, 0x51, 0x88,
-0x51, 0x5A, 0x90, 0x07, 0xE3, 0xE0, 0x90, 0x95,
-0xE7, 0xF0, 0xE0, 0x60, 0x59, 0xE4, 0x90, 0x95,
-0xE9, 0xF0, 0x90, 0x96, 0x0B, 0x74, 0x08, 0xF0,
-0x90, 0x05, 0x68, 0xE0, 0x90, 0x95, 0xEB, 0xF0,
-0x90, 0x05, 0x69, 0xE0, 0x90, 0x95, 0xEC, 0xF0,
-0x90, 0x05, 0x6A, 0xE0, 0x90, 0x95, 0xED, 0xF0,
-0x90, 0x05, 0x6B, 0xE0, 0x90, 0x95, 0xEE, 0xF0,
-0x90, 0x05, 0x78, 0xE0, 0x90, 0x95, 0xEF, 0xF0,
-0x90, 0x05, 0x79, 0xE0, 0x90, 0x95, 0xF0, 0xF0,
-0x90, 0x05, 0x7A, 0xE0, 0x90, 0x95, 0xF1, 0xF0,
-0x90, 0x05, 0x7B, 0xE0, 0x90, 0x95, 0xF2, 0xF0,
-0x7B, 0x01, 0x7A, 0x95, 0x79, 0xE9, 0x12, 0x8B,
-0xBD, 0x7F, 0x04, 0x12, 0x04, 0x7E, 0x90, 0x95,
-0xE7, 0xE0, 0xFD, 0x60, 0x3F, 0xA3, 0xE0, 0xF1,
-0x91, 0x80, 0x05, 0xC3, 0x33, 0xCE, 0x33, 0xCE,
-0xD8, 0xF9, 0xFF, 0xEF, 0x5D, 0x60, 0xE7, 0x90,
-0x95, 0xE8, 0xE0, 0xFB, 0x74, 0x01, 0xA8, 0x03,
-0x08, 0x80, 0x02, 0xC3, 0x33, 0xD8, 0xFC, 0xFE,
-0xF4, 0xFD, 0x90, 0x95, 0xE7, 0xE0, 0x5D, 0xF0,
-0x90, 0x07, 0xE3, 0xE0, 0x4E, 0xF0, 0xAF, 0x03,
-0x91, 0xEE, 0x71, 0x6D, 0x90, 0x95, 0xE8, 0xE0,
-0x04, 0xF0, 0x80, 0xBA, 0x22, 0xE4, 0x90, 0x96,
-0x0C, 0xF0, 0x90, 0x93, 0x03, 0xE0, 0xFF, 0xC3,
-0x13, 0x20, 0xE0, 0x70, 0x91, 0x26, 0x91, 0x37,
-0xEF, 0x60, 0x0D, 0x7B, 0x01, 0x7A, 0x93, 0x79,
-0x13, 0x91, 0x2C, 0x91, 0x75, 0xEF, 0x60, 0x54,
-0x91, 0x26, 0x91, 0x37, 0xEF, 0x60, 0x17, 0x7B,
-0x01, 0x7A, 0x93, 0x79, 0x13, 0x91, 0x2C, 0x91,
-0x75, 0xEF, 0x60, 0x0A, 0x7B, 0x01, 0x7A, 0x93,
-0x79, 0x1C, 0xB1, 0xFC, 0x70, 0x36, 0x7B, 0x01,
-0x7A, 0x93, 0x79, 0x20, 0x90, 0x96, 0x10, 0x12,
-0x86, 0x42, 0x7A, 0x93, 0x79, 0x06, 0x91, 0x37,
-0xEF, 0x60, 0x10, 0x91, 0x88, 0x91, 0x2C, 0x91,
-0x37, 0xEF, 0x60, 0x07, 0x91, 0x26, 0xD1, 0x29,
-0xEF, 0x70, 0x11, 0x91, 0x26, 0x91, 0x75, 0xEF,
-0x60, 0x29, 0x7B, 0x01, 0x7A, 0x93, 0x79, 0x0F,
-0xB1, 0xFC, 0x60, 0x1F, 0x90, 0x96, 0x0C, 0x74,
-0x01, 0xF0, 0x80, 0x17, 0x91, 0x88, 0x91, 0x2C,
-0x91, 0x37, 0xEF, 0x60, 0x0E, 0x91, 0x88, 0x91,
-0x2C, 0xD1, 0x29, 0xEF, 0x70, 0x05, 0x90, 0x96,
-0x0C, 0x04, 0xF0, 0x90, 0x96, 0x0C, 0xE0, 0xFF,
-0x90, 0x05, 0x18, 0xE4, 0xF0, 0xA3, 0xF0, 0xEF,
-0x90, 0x05, 0xB3, 0x60, 0x0C, 0xE0, 0x44, 0x80,
-0xF0, 0x90, 0x24, 0xA0, 0xE0, 0x44, 0x01, 0xF0,
-0x22, 0xE0, 0x44, 0x20, 0xF0, 0x22, 0x7B, 0x01,
-0x7A, 0x93, 0x79, 0x06, 0x90, 0x96, 0x10, 0x12,
-0x86, 0x42, 0x7A, 0x93, 0x79, 0x20, 0x22, 0xD1,
-0x21, 0x90, 0x96, 0x13, 0xF0, 0x90, 0x96, 0x13,
-0xE0, 0xFF, 0xC3, 0x94, 0x08, 0x50, 0x2B, 0xD1,
-0x0A, 0xFD, 0xC3, 0x74, 0x07, 0x91, 0xDC, 0xC3,
-0x9D, 0x50, 0x03, 0x7F, 0x00, 0x22, 0x90, 0x96,
-0x13, 0xE0, 0xFF, 0xD1, 0x0A, 0xFD, 0xC3, 0x74,
-0x07, 0x91, 0xDC, 0xD3, 0x9D, 0x40, 0x03, 0x7F,
-0x01, 0x22, 0x90, 0x96, 0x13, 0xE0, 0x04, 0xF0,
-0x80, 0xCB, 0x7F, 0x00, 0x22, 0xD1, 0x21, 0xFF,
-0xD1, 0x3C, 0x6E, 0x60, 0x03, 0x7F, 0x00, 0x22,
-0x0F, 0xEF, 0xB4, 0x08, 0xF3, 0x7F, 0x01, 0x22,
-0x7B, 0x01, 0x7A, 0x93, 0x79, 0x2D, 0x22, 0xD1,
-0x21, 0x90, 0x96, 0x13, 0xF0, 0x90, 0x96, 0x13,
-0xE0, 0xFF, 0xC3, 0x94, 0x04, 0x50, 0x1F, 0x91,
-0xC1, 0xC3, 0x9D, 0x50, 0x03, 0x7F, 0x00, 0x22,
-0x90, 0x96, 0x13, 0xE0, 0xFF, 0x91, 0xC1, 0xD3,
-0x9D, 0x40, 0x03, 0x7F, 0x01, 0x22, 0x90, 0x96,
-0x13, 0xE0, 0x04, 0xF0, 0x80, 0xD7, 0x7F, 0x00,
-0x22, 0x7E, 0x00, 0xC3, 0x74, 0x03, 0x9F, 0xFD,
-0xE4, 0x9E, 0xFC, 0x90, 0x96, 0x10, 0x12, 0x86,
-0x39, 0x8D, 0x82, 0x8C, 0x83, 0x12, 0x02, 0x1F,
-0xFD, 0xC3, 0x74, 0x03, 0x9F, 0xFF, 0xE4, 0x9E,
-0xFE, 0x90, 0x96, 0x0D, 0x12, 0x86, 0x39, 0x8F,
-0x82, 0x8E, 0x83, 0x02, 0x02, 0x1F, 0xE4, 0x90,
-0x96, 0x10, 0xF0, 0xEF, 0x75, 0xF0, 0x40, 0xA4,
-0x24, 0x80, 0xF9, 0x74, 0x82, 0x35, 0xF0, 0xFA,
-0x7B, 0x01, 0x90, 0x96, 0x0C, 0x31, 0x58, 0x90,
-0x96, 0x0F, 0xF0, 0xA3, 0x74, 0x1C, 0xF0, 0x90,
-0x96, 0x0F, 0xE0, 0xFF, 0xA3, 0xE0, 0xFE, 0xC3,
-0x9F, 0x40, 0x02, 0xA1, 0xF0, 0x90, 0x96, 0x0C,
-0x12, 0x86, 0x39, 0x8E, 0x82, 0xD1, 0x53, 0x90,
-0x96, 0x11, 0xF0, 0xEE, 0xFD, 0x7C, 0x00, 0xF5,
-0x82, 0x8C, 0x83, 0xA3, 0xA3, 0x12, 0x02, 0x1F,
-0xFE, 0x8D, 0x82, 0x8C, 0x83, 0xA3, 0x12, 0x02,
-0x1F, 0xFD, 0xED, 0xFF, 0x90, 0x96, 0x12, 0xEE,
-0xF0, 0xA3, 0xEF, 0xF0, 0x90, 0x96, 0x11, 0xE0,
-0x64, 0x01, 0x60, 0x0E, 0xA3, 0xA3, 0xE0, 0x24,
-0x03, 0xFF, 0x90, 0x96, 0x10, 0xE0, 0x2F, 0xF0,
-0x80, 0xAD, 0xE4, 0x90, 0x96, 0x14, 0xF0, 0x90,
-0x96, 0x14, 0xE0, 0xFF, 0xC3, 0x94, 0x08, 0x50,
-0x1A, 0x90, 0x96, 0x10, 0xE0, 0x24, 0x03, 0xD1,
-0x59, 0x91, 0xE4, 0xFF, 0x90, 0x96, 0x14, 0xE0,
-0x24, 0x20, 0xF5, 0x82, 0xE4, 0x34, 0x93, 0xB1,
-0xF1, 0x80, 0xDC, 0x90, 0x96, 0x10, 0xE0, 0x24,
-0x0B, 0xFF, 0xE4, 0x33, 0xFE, 0x90, 0x96, 0x0C,
-0x91, 0xE4, 0x90, 0x93, 0x28, 0xF0, 0x70, 0x27,
-0x90, 0x96, 0x14, 0xF0, 0x90, 0x96, 0x14, 0xE0,
-0xFF, 0x24, 0x10, 0xFD, 0xE4, 0x33, 0xFC, 0x90,
-0x96, 0x0C, 0xD1, 0x17, 0xFE, 0x74, 0x29, 0x2F,
-0xF5, 0x82, 0xE4, 0x34, 0x93, 0xF5, 0x83, 0xEE,
-0xB1, 0xF4, 0xE0, 0xB4, 0x04, 0xDE, 0x22, 0xE4,
-0x90, 0x96, 0x14, 0xF0, 0x90, 0x96, 0x14, 0xE0,
-0xFF, 0xC3, 0x94, 0x04, 0x50, 0x1A, 0x90, 0x96,
-0x10, 0xE0, 0x24, 0x0C, 0xD1, 0x59, 0x91, 0xE4,
-0xFF, 0x90, 0x96, 0x14, 0xE0, 0x24, 0x29, 0xF5,
-0x82, 0xE4, 0x34, 0x93, 0xB1, 0xF1, 0x80, 0xDC,
-0x22, 0xF5, 0x83, 0xEF, 0xF0, 0x90, 0x96, 0x14,
-0xE0, 0x04, 0xF0, 0x22, 0x90, 0x96, 0x10, 0x12,
-0x86, 0x42, 0x7A, 0x93, 0x79, 0x29, 0x91, 0x8F,
-0xEF, 0x22, 0x7E, 0x00, 0xC3, 0x74, 0x07, 0x9F,
-0xFD, 0xE4, 0x9E, 0xFC, 0x90, 0x96, 0x10, 0x12,
-0x86, 0x39, 0x8D, 0x82, 0x8C, 0x83, 0x02, 0x02,
-0x1F, 0x90, 0x96, 0x0D, 0x12, 0x86, 0x42, 0xE4,
-0x22, 0xD1, 0x21, 0xFF, 0xD1, 0x3C, 0x6E, 0x60,
-0x03, 0x7F, 0x00, 0x22, 0x0F, 0xEF, 0xB4, 0x06,
-0xF3, 0x7F, 0x01, 0x22, 0x90, 0x96, 0x10, 0x12,
-0x86, 0x39, 0x8F, 0x82, 0x75, 0x83, 0x00, 0x12,
-0x02, 0x1F, 0xFE, 0x90, 0x96, 0x0D, 0x12, 0x86,
-0x39, 0x8F, 0x82, 0x75, 0x83, 0x00, 0x02, 0x02,
-0x1F, 0xFD, 0xE4, 0x33, 0xFC, 0x7E, 0x00, 0xED,
-0x2F, 0xFF, 0xEE, 0x3C, 0xFE, 0x90, 0x96, 0x0C,
-0x22, 0xE4, 0xFF, 0x74, 0x80, 0x51, 0x29, 0x74,
-0x2D, 0x2F, 0xF5, 0x82, 0xE4, 0x34, 0x93, 0x51,
-0x81, 0xB4, 0x08, 0xEF, 0x22, 0x31, 0x55, 0x64,
-0x01, 0x60, 0x02, 0xE1, 0x07, 0xEF, 0x24, 0x39,
-0x60, 0x12, 0x14, 0x60, 0x19, 0x24, 0x02, 0x70,
-0x1F, 0xE4, 0x90, 0x95, 0x54, 0xF0, 0xA3, 0x74,
-0x06, 0xF0, 0x80, 0x14, 0x90, 0x95, 0x54, 0x74,
-0x06, 0xF0, 0xA3, 0xF0, 0x80, 0x0A, 0x90, 0x95,
-0x54, 0x74, 0x0C, 0xF0, 0xA3, 0x74, 0x04, 0xF0,
-0xF1, 0x1B, 0xF0, 0xF1, 0x08, 0x40, 0x1B, 0x90,
-0x95, 0x52, 0xE0, 0xF1, 0x85, 0x7A, 0x95, 0x79,
-0x51, 0x12, 0x5F, 0xA6, 0xBF, 0x01, 0x07, 0x90,
-0x95, 0x51, 0xE0, 0xF4, 0x70, 0x39, 0xF1, 0x10,
-0x80, 0xE1, 0xF1, 0x1B, 0xF0, 0xF1, 0x08, 0x40,
-0x2E, 0x90, 0x95, 0x52, 0xE0, 0xFD, 0x7C, 0x00,
-0x24, 0xA8, 0xFF, 0xEC, 0x34, 0x01, 0xFE, 0xED,
-0x24, 0x01, 0xFD, 0xEC, 0x33, 0xFC, 0x90, 0x95,
-0x54, 0xE0, 0xFB, 0xC3, 0xED, 0x9B, 0xFD, 0xEC,
-0x94, 0x00, 0xFC, 0x12, 0x93, 0xDD, 0xD1, 0x1A,
-0xFD, 0xF1, 0x2B, 0xF1, 0x10, 0x80, 0xCE, 0x22,
-0x90, 0x95, 0x53, 0xE0, 0xD3, 0x94, 0x00, 0x22,
-0x90, 0x95, 0x52, 0xE0, 0x04, 0xF0, 0xA3, 0xE0,
-0x14, 0xF0, 0x22, 0x90, 0x95, 0x54, 0xE0, 0x90,
-0x95, 0x52, 0xF0, 0x90, 0x95, 0x55, 0xE0, 0x90,
-0x95, 0x53, 0x22, 0xE4, 0x90, 0x95, 0x56, 0xF0,
-0x90, 0x00, 0x37, 0xE0, 0x44, 0x80, 0xF0, 0x90,
-0x00, 0xCF, 0x74, 0x69, 0xF0, 0xEF, 0x90, 0x00,
-0x31, 0xF0, 0xEE, 0x54, 0x03, 0xFF, 0xA3, 0xE0,
-0x54, 0xFC, 0x4F, 0xF0, 0x90, 0x00, 0x30, 0xED,
-0xF0, 0x90, 0x00, 0x33, 0xE0, 0x44, 0x80, 0xF0,
-0x90, 0x00, 0x33, 0xE0, 0x30, 0xE7, 0x09, 0xF1,
-0x7D, 0x50, 0x05, 0xE0, 0x04, 0xF0, 0x80, 0xF0,
-0x90, 0x00, 0xCF, 0xE4, 0xF0, 0x90, 0x00, 0x37,
-0xE0, 0x54, 0x7F, 0xF0, 0xF1, 0x7D, 0x7F, 0x00,
-0x50, 0x02, 0x7F, 0x01, 0x22, 0x90, 0x95, 0x56,
-0xE0, 0xC3, 0x94, 0x64, 0x22, 0x24, 0xA8, 0xFF,
-0xE4, 0x34, 0x01, 0xFE, 0x7B, 0x01, 0x22, 0x54,
-0x07, 0xFF, 0x74, 0x01, 0x7E, 0x00, 0xA8, 0x07,
-0x08, 0x22, 0x90, 0x24, 0xA0, 0xE0, 0x90, 0x93,
-0x03, 0x30, 0xE7, 0x05, 0xE0, 0x44, 0x02, 0xF0,
-0x22, 0xE0, 0x54, 0xFD, 0xF0, 0x22, 0x90, 0x95,
-0xE9, 0xEF, 0xF0, 0x90, 0x95, 0xE7, 0x74, 0x18,
-0xF0, 0x90, 0x96, 0x09, 0x74, 0x01, 0xF0, 0xFB,
-0x7A, 0x95, 0x79, 0xE7, 0x12, 0x8B, 0xBD, 0x7F,
-0x04, 0x02, 0x04, 0x7E, 0x90, 0x93, 0x03, 0xE0,
-0x30, 0xE0, 0x04, 0x7F, 0x01, 0xF1, 0xAE, 0x22,
-0x12, 0x02, 0x06, 0xFF, 0x90, 0x93, 0x3A, 0xF0,
-0xBF, 0x01, 0x08, 0x12, 0xC0, 0x63, 0xE4, 0x90,
-0x93, 0x3A, 0xF0, 0x22, 0x12, 0x02, 0x06, 0x54,
-0x01, 0xFF, 0x90, 0x93, 0xF2, 0xE0, 0x54, 0xFE,
-0x4F, 0xF0, 0x22, 0x12, 0x02, 0x06, 0x90, 0x95,
-0x71, 0xF0, 0x12, 0x87, 0xBC, 0x90, 0x95, 0x72,
-0xF0, 0x60, 0x0F, 0x31, 0x99, 0x12, 0xD7, 0xE3,
-0x90, 0x95, 0x72, 0x31, 0x99, 0x7B, 0x57, 0x12,
-0xAC, 0x35, 0x90, 0x88, 0x9D, 0xE0, 0x30, 0xE0,
-0x0D, 0x12, 0x96, 0x91, 0x30, 0xE0, 0x07, 0x90,
-0x06, 0x0A, 0xE0, 0x44, 0x07, 0xF0, 0x90, 0x95,
-0x4E, 0x74, 0x20, 0xF0, 0x90, 0x95, 0x70, 0x74,
-0x03, 0xF0, 0x90, 0x05, 0x22, 0xE0, 0x90, 0x95,
-0x50, 0xF0, 0x90, 0x93, 0xF3, 0xE0, 0x90, 0x95,
-0x51, 0xF0, 0x90, 0x93, 0xF4, 0xE0, 0x90, 0x95,
-0x52, 0x11, 0x5B, 0x12, 0x8B, 0xBD, 0x7F, 0x04,
-0x02, 0x04, 0x7E, 0xF0, 0x7B, 0x01, 0x7A, 0x95,
-0x79, 0x4E, 0x22, 0x11, 0x5C, 0x7F, 0xEF, 0x7E,
-0x01, 0x12, 0x5F, 0xA6, 0xBF, 0x01, 0x06, 0x90,
-0x95, 0x4E, 0xE0, 0xA3, 0xF0, 0x11, 0x5C, 0x7F,
-0xEE, 0x7E, 0x01, 0x12, 0x5F, 0xA6, 0xBF, 0x01,
-0x08, 0x90, 0x95, 0x4E, 0xE0, 0x90, 0x95, 0x50,
-0xF0, 0x11, 0x5C, 0x7F, 0xED, 0x7E, 0x01, 0x12,
-0x5F, 0xA6, 0xBF, 0x01, 0x08, 0x90, 0x95, 0x4E,
-0xE0, 0x90, 0x95, 0x51, 0xF0, 0x11, 0x5C, 0x7F,
-0xEC, 0x7E, 0x01, 0x12, 0x5F, 0xA6, 0xBF, 0x01,
-0x08, 0x90, 0x95, 0x4E, 0xE0, 0x90, 0x95, 0x52,
-0xF0, 0x11, 0x5C, 0x7F, 0xEB, 0x7E, 0x01, 0x12,
-0x5F, 0xA6, 0xBF, 0x01, 0x08, 0x90, 0x95, 0x4E,
-0xE0, 0x90, 0x95, 0x53, 0xF0, 0x90, 0x95, 0x4F,
-0xE0, 0xFF, 0xA3, 0xE0, 0xFD, 0xA3, 0xE0, 0xFB,
-0xA3, 0xE0, 0x90, 0x95, 0x57, 0xF0, 0x90, 0x95,
-0x53, 0xE0, 0x90, 0x95, 0x58, 0xF0, 0x90, 0x95,
-0x59, 0x74, 0x12, 0xF0, 0x90, 0x95, 0x7B, 0x74,
-0x05, 0xF0, 0x90, 0x95, 0x5B, 0x12, 0xAF, 0xE5,
-0x90, 0x95, 0x57, 0xE0, 0x90, 0x95, 0x5E, 0xF0,
-0x90, 0x95, 0x58, 0xE0, 0x90, 0x95, 0x5F, 0xF0,
-0x7B, 0x01, 0x7A, 0x95, 0x79, 0x59, 0x12, 0x8B,
-0xBD, 0x7F, 0x04, 0x02, 0x04, 0x7E, 0x7E, 0x00,
+0x12, 0x86, 0x42, 0xE4, 0xFF, 0x74, 0x08, 0x2F,
+0xF5, 0x82, 0xE4, 0x34, 0x07, 0xF5, 0x83, 0xE0,
+0xFE, 0x90, 0x95, 0xEE, 0x12, 0x86, 0x39, 0x8F,
+0x82, 0x75, 0x83, 0x00, 0x51, 0xF1, 0xB4, 0x06,
+0xE4, 0x90, 0x95, 0xED, 0xE0, 0x24, 0x52, 0xF9,
+0xE4, 0x34, 0xFC, 0xFA, 0x7B, 0x01, 0xA3, 0xF1,
+0x51, 0x70, 0x5F, 0x90, 0x95, 0xEE, 0x12, 0x86,
+0x39, 0x12, 0x87, 0x6A, 0x64, 0x02, 0x70, 0x52,
+0x90, 0x24, 0x87, 0xE0, 0x90, 0x00, 0x03, 0x12,
+0x02, 0x5E, 0x90, 0x24, 0x86, 0xE0, 0x90, 0x00,
+0x04, 0x12, 0x02, 0x5E, 0x90, 0x95, 0xEE, 0x12,
+0x86, 0x39, 0x12, 0x87, 0x63, 0x64, 0x01, 0x70,
+0x31, 0x51, 0x27, 0x64, 0x0D, 0x70, 0x2B, 0xFF,
+0x74, 0x88, 0x51, 0xFA, 0xEF, 0x24, 0x08, 0x51,
+0xE3, 0xB4, 0x08, 0xF4, 0x90, 0x05, 0xDC, 0xE0,
+0xFF, 0x90, 0x95, 0xEE, 0x12, 0x86, 0x39, 0x90,
+0x00, 0x10, 0xEF, 0x12, 0x02, 0x5E, 0xE4, 0xFF,
+0x51, 0xF8, 0xEF, 0x24, 0x11, 0x51, 0xE3, 0xB4,
+0x04, 0xF6, 0x22, 0xFD, 0xE4, 0x33, 0xFC, 0x90,
+0x95, 0xEE, 0x12, 0x86, 0x39, 0x8D, 0x82, 0x8C,
+0x83, 0xEE, 0x12, 0x02, 0x5E, 0x0F, 0xEF, 0x22,
+0x74, 0x90, 0x2F, 0xF5, 0x82, 0xE4, 0x34, 0x24,
+0xF5, 0x83, 0xE0, 0xFE, 0x22, 0x90, 0x93, 0x03,
+0xE0, 0x30, 0xE0, 0x1E, 0xE4, 0xFF, 0xF1, 0x85,
+0xE4, 0xFF, 0x51, 0x2D, 0x7F, 0x01, 0x51, 0x2D,
+0x90, 0x93, 0x03, 0xE0, 0x13, 0x13, 0x54, 0x3F,
+0x30, 0xE0, 0x07, 0x90, 0x04, 0x1F, 0xE0, 0x44,
+0x80, 0xF0, 0x22, 0xE4, 0xFF, 0x74, 0x94, 0x51,
+0xFA, 0x74, 0x13, 0x2F, 0xF5, 0x82, 0xE4, 0x34,
+0x93, 0x71, 0x52, 0xB4, 0x08, 0xEF, 0xE4, 0xFF,
+0x74, 0x9C, 0x51, 0xFA, 0x74, 0x1C, 0x2F, 0xF5,
+0x82, 0xE4, 0x34, 0x93, 0x71, 0x52, 0xB4, 0x04,
+0xEF, 0x22, 0xF5, 0x83, 0xEE, 0xF0, 0x0F, 0xEF,
+0x22, 0xE4, 0xFF, 0x74, 0x88, 0x51, 0xFA, 0x74,
+0x06, 0x2F, 0xF5, 0x82, 0xE4, 0x34, 0x93, 0x71,
+0x52, 0xB4, 0x08, 0xEF, 0x90, 0x05, 0xDC, 0xE0,
+0x90, 0x93, 0x0E, 0xF0, 0xE4, 0xFF, 0x51, 0xF8,
+0x74, 0x0F, 0x2F, 0xF5, 0x82, 0xE4, 0x34, 0x93,
+0x71, 0x52, 0xB4, 0x04, 0xF1, 0x22, 0xE4, 0x90,
+0x95, 0xEE, 0xF0, 0xF1, 0x71, 0xF1, 0x3A, 0x71,
+0x59, 0x71, 0x2B, 0x90, 0x07, 0xE3, 0xE0, 0x90,
+0x95, 0xED, 0xF0, 0xE0, 0x60, 0x59, 0xE4, 0x90,
+0x95, 0xEF, 0xF0, 0x90, 0x96, 0x11, 0x74, 0x08,
+0xF0, 0x90, 0x05, 0x68, 0xE0, 0x90, 0x95, 0xF1,
+0xF0, 0x90, 0x05, 0x69, 0xE0, 0x90, 0x95, 0xF2,
+0xF0, 0x90, 0x05, 0x6A, 0xE0, 0x90, 0x95, 0xF3,
+0xF0, 0x90, 0x05, 0x6B, 0xE0, 0x90, 0x95, 0xF4,
+0xF0, 0x90, 0x05, 0x78, 0xE0, 0x90, 0x95, 0xF5,
+0xF0, 0x90, 0x05, 0x79, 0xE0, 0x90, 0x95, 0xF6,
+0xF0, 0x90, 0x05, 0x7A, 0xE0, 0x90, 0x95, 0xF7,
+0xF0, 0x90, 0x05, 0x7B, 0xE0, 0x90, 0x95, 0xF8,
+0xF0, 0x7B, 0x01, 0x7A, 0x95, 0x79, 0xEF, 0x12,
+0x90, 0x39, 0x7F, 0x04, 0x12, 0x04, 0x7E, 0x90,
+0x95, 0xED, 0xE0, 0xFD, 0x60, 0x3F, 0xA3, 0xE0,
+0xF1, 0x68, 0x80, 0x05, 0xC3, 0x33, 0xCE, 0x33,
+0xCE, 0xD8, 0xF9, 0xFF, 0xEF, 0x5D, 0x60, 0xE7,
+0x90, 0x95, 0xEE, 0xE0, 0xFB, 0x74, 0x01, 0xA8,
+0x03, 0x08, 0x80, 0x02, 0xC3, 0x33, 0xD8, 0xFC,
+0xFE, 0xF4, 0xFD, 0x90, 0x95, 0xED, 0xE0, 0x5D,
+0xF0, 0x90, 0x07, 0xE3, 0xE0, 0x4E, 0xF0, 0xAF,
+0x03, 0xB1, 0xBF, 0x91, 0x3E, 0x90, 0x95, 0xEE,
+0xE0, 0x04, 0xF0, 0x80, 0xBA, 0x22, 0xE4, 0x90,
+0x96, 0x12, 0xF0, 0x90, 0x93, 0x03, 0xE0, 0xFF,
+0xC3, 0x13, 0x20, 0xE0, 0x70, 0x91, 0xF7, 0xB1,
+0x08, 0xEF, 0x60, 0x0D, 0x7B, 0x01, 0x7A, 0x93,
+0x79, 0x13, 0x91, 0xFD, 0xB1, 0x46, 0xEF, 0x60,
+0x54, 0x91, 0xF7, 0xB1, 0x08, 0xEF, 0x60, 0x17,
+0x7B, 0x01, 0x7A, 0x93, 0x79, 0x13, 0x91, 0xFD,
+0xB1, 0x46, 0xEF, 0x60, 0x0A, 0x7B, 0x01, 0x7A,
+0x93, 0x79, 0x1C, 0xD1, 0xCD, 0x70, 0x36, 0x7B,
+0x01, 0x7A, 0x93, 0x79, 0x20, 0x90, 0x96, 0x16,
+0x12, 0x86, 0x42, 0x7A, 0x93, 0x79, 0x06, 0xB1,
+0x08, 0xEF, 0x60, 0x10, 0xB1, 0x59, 0x91, 0xFD,
+0xB1, 0x08, 0xEF, 0x60, 0x07, 0x91, 0xF7, 0xD1,
+0xFA, 0xEF, 0x70, 0x11, 0x91, 0xF7, 0xB1, 0x46,
+0xEF, 0x60, 0x29, 0x7B, 0x01, 0x7A, 0x93, 0x79,
+0x0F, 0xD1, 0xCD, 0x60, 0x1F, 0x90, 0x96, 0x12,
+0x74, 0x01, 0xF0, 0x80, 0x17, 0xB1, 0x59, 0x91,
+0xFD, 0xB1, 0x08, 0xEF, 0x60, 0x0E, 0xB1, 0x59,
+0x91, 0xFD, 0xD1, 0xFA, 0xEF, 0x70, 0x05, 0x90,
+0x96, 0x12, 0x04, 0xF0, 0x90, 0x96, 0x12, 0xE0,
+0xFF, 0x90, 0x05, 0x18, 0xE4, 0xF0, 0xA3, 0xF0,
+0xEF, 0x90, 0x05, 0xB3, 0x60, 0x0C, 0xE0, 0x44,
+0x80, 0xF0, 0x90, 0x24, 0xA0, 0xE0, 0x44, 0x01,
+0xF0, 0x22, 0xE0, 0x44, 0x20, 0xF0, 0x22, 0x7B,
+0x01, 0x7A, 0x93, 0x79, 0x06, 0x90, 0x96, 0x16,
+0x12, 0x86, 0x42, 0x7A, 0x93, 0x79, 0x20, 0x22,
+0xD1, 0xF2, 0x90, 0x96, 0x19, 0xF0, 0x90, 0x96,
+0x19, 0xE0, 0xFF, 0xC3, 0x94, 0x08, 0x50, 0x2B,
+0xD1, 0xDB, 0xFD, 0xC3, 0x74, 0x07, 0xB1, 0xAD,
+0xC3, 0x9D, 0x50, 0x03, 0x7F, 0x00, 0x22, 0x90,
+0x96, 0x19, 0xE0, 0xFF, 0xD1, 0xDB, 0xFD, 0xC3,
+0x74, 0x07, 0xB1, 0xAD, 0xD3, 0x9D, 0x40, 0x03,
+0x7F, 0x01, 0x22, 0x90, 0x96, 0x19, 0xE0, 0x04,
+0xF0, 0x80, 0xCB, 0x7F, 0x00, 0x22, 0xD1, 0xF2,
+0xFF, 0xF1, 0x0D, 0x6E, 0x60, 0x03, 0x7F, 0x00,
+0x22, 0x0F, 0xEF, 0xB4, 0x08, 0xF3, 0x7F, 0x01,
+0x22, 0x7B, 0x01, 0x7A, 0x93, 0x79, 0x2D, 0x22,
+0xD1, 0xF2, 0x90, 0x96, 0x19, 0xF0, 0x90, 0x96,
+0x19, 0xE0, 0xFF, 0xC3, 0x94, 0x04, 0x50, 0x1F,
+0xB1, 0x92, 0xC3, 0x9D, 0x50, 0x03, 0x7F, 0x00,
+0x22, 0x90, 0x96, 0x19, 0xE0, 0xFF, 0xB1, 0x92,
+0xD3, 0x9D, 0x40, 0x03, 0x7F, 0x01, 0x22, 0x90,
+0x96, 0x19, 0xE0, 0x04, 0xF0, 0x80, 0xD7, 0x7F,
+0x00, 0x22, 0x7E, 0x00, 0xC3, 0x74, 0x03, 0x9F,
+0xFD, 0xE4, 0x9E, 0xFC, 0x90, 0x96, 0x16, 0x12,
+0x86, 0x39, 0x8D, 0x82, 0x8C, 0x83, 0x12, 0x02,
+0x1F, 0xFD, 0xC3, 0x74, 0x03, 0x9F, 0xFF, 0xE4,
+0x9E, 0xFE, 0x90, 0x96, 0x13, 0x12, 0x86, 0x39,
+0x8F, 0x82, 0x8E, 0x83, 0x02, 0x02, 0x1F, 0xE4,
+0x90, 0x96, 0x16, 0xF0, 0xEF, 0x75, 0xF0, 0x40,
+0xA4, 0x24, 0x80, 0xF9, 0x74, 0x82, 0x35, 0xF0,
+0xFA, 0x7B, 0x01, 0x90, 0x96, 0x12, 0xF1, 0x51,
+0x90, 0x96, 0x15, 0xF0, 0xA3, 0x74, 0x1C, 0xF0,
+0x90, 0x96, 0x15, 0xE0, 0xFF, 0xA3, 0xE0, 0xFE,
+0xC3, 0x9F, 0x40, 0x02, 0xC1, 0xC1, 0x90, 0x96,
+0x12, 0x12, 0x86, 0x39, 0x8E, 0x82, 0xF1, 0x24,
+0x90, 0x96, 0x17, 0xF0, 0xEE, 0xFD, 0x7C, 0x00,
+0xF5, 0x82, 0x8C, 0x83, 0xA3, 0xA3, 0x12, 0x02,
+0x1F, 0xFE, 0x8D, 0x82, 0x8C, 0x83, 0xA3, 0x12,
+0x02, 0x1F, 0xFD, 0xED, 0xFF, 0x90, 0x96, 0x18,
+0xEE, 0xF0, 0xA3, 0xEF, 0xF0, 0x90, 0x96, 0x17,
+0xE0, 0x64, 0x01, 0x60, 0x0E, 0xA3, 0xA3, 0xE0,
+0x24, 0x03, 0xFF, 0x90, 0x96, 0x16, 0xE0, 0x2F,
+0xF0, 0x80, 0xAD, 0xE4, 0x90, 0x96, 0x1A, 0xF0,
+0x90, 0x96, 0x1A, 0xE0, 0xFF, 0xC3, 0x94, 0x08,
+0x50, 0x1A, 0x90, 0x96, 0x16, 0xE0, 0x24, 0x03,
+0xF1, 0x2A, 0xB1, 0xB5, 0xFF, 0x90, 0x96, 0x1A,
+0xE0, 0x24, 0x20, 0xF5, 0x82, 0xE4, 0x34, 0x93,
+0xD1, 0xC2, 0x80, 0xDC, 0x90, 0x96, 0x16, 0xE0,
+0x24, 0x0B, 0xFF, 0xE4, 0x33, 0xFE, 0x90, 0x96,
+0x12, 0xB1, 0xB5, 0x90, 0x93, 0x28, 0xF0, 0x70,
+0x27, 0x90, 0x96, 0x1A, 0xF0, 0x90, 0x96, 0x1A,
+0xE0, 0xFF, 0x24, 0x10, 0xFD, 0xE4, 0x33, 0xFC,
+0x90, 0x96, 0x12, 0xD1, 0xE8, 0xFE, 0x74, 0x29,
+0x2F, 0xF5, 0x82, 0xE4, 0x34, 0x93, 0xF5, 0x83,
+0xEE, 0xD1, 0xC5, 0xE0, 0xB4, 0x04, 0xDE, 0x22,
+0xE4, 0x90, 0x96, 0x1A, 0xF0, 0x90, 0x96, 0x1A,
+0xE0, 0xFF, 0xC3, 0x94, 0x04, 0x50, 0x1A, 0x90,
+0x96, 0x16, 0xE0, 0x24, 0x0C, 0xF1, 0x2A, 0xB1,
+0xB5, 0xFF, 0x90, 0x96, 0x1A, 0xE0, 0x24, 0x29,
+0xF5, 0x82, 0xE4, 0x34, 0x93, 0xD1, 0xC2, 0x80,
+0xDC, 0x22, 0xF5, 0x83, 0xEF, 0xF0, 0x90, 0x96,
+0x1A, 0xE0, 0x04, 0xF0, 0x22, 0x90, 0x96, 0x16,
+0x12, 0x86, 0x42, 0x7A, 0x93, 0x79, 0x29, 0xB1,
+0x60, 0xEF, 0x22, 0x7E, 0x00, 0xC3, 0x74, 0x07,
+0x9F, 0xFD, 0xE4, 0x9E, 0xFC, 0x90, 0x96, 0x16,
+0x12, 0x86, 0x39, 0x8D, 0x82, 0x8C, 0x83, 0x02,
+0x02, 0x1F, 0x90, 0x96, 0x13, 0x12, 0x86, 0x42,
+0xE4, 0x22, 0xD1, 0xF2, 0xFF, 0xF1, 0x0D, 0x6E,
+0x60, 0x03, 0x7F, 0x00, 0x22, 0x0F, 0xEF, 0xB4,
+0x06, 0xF3, 0x7F, 0x01, 0x22, 0x90, 0x96, 0x16,
+0x12, 0x86, 0x39, 0x8F, 0x82, 0x75, 0x83, 0x00,
+0x12, 0x02, 0x1F, 0xFE, 0x90, 0x96, 0x13, 0x12,
+0x86, 0x39, 0x8F, 0x82, 0x75, 0x83, 0x00, 0x02,
+0x02, 0x1F, 0xFD, 0xE4, 0x33, 0xFC, 0x7E, 0x00,
+0xED, 0x2F, 0xFF, 0xEE, 0x3C, 0xFE, 0x90, 0x96,
+0x12, 0x22, 0xE4, 0xFF, 0x74, 0x80, 0x51, 0xFA,
+0x74, 0x2D, 0x2F, 0xF5, 0x82, 0xE4, 0x34, 0x93,
+0x71, 0x52, 0xB4, 0x08, 0xEF, 0x22, 0x90, 0x95,
+0x54, 0x12, 0x86, 0x42, 0x02, 0x02, 0x06, 0x90,
+0x05, 0x58, 0x74, 0x02, 0xF0, 0x22, 0xF5, 0x46,
+0x89, 0x47, 0x75, 0x48, 0x04, 0x22, 0x54, 0x07,
+0xFF, 0x74, 0x01, 0x7E, 0x00, 0xA8, 0x07, 0x08,
+0x22, 0x90, 0x24, 0xA0, 0xE0, 0x90, 0x93, 0x03,
+0x30, 0xE7, 0x05, 0xE0, 0x44, 0x02, 0xF0, 0x22,
+0xE0, 0x54, 0xFD, 0xF0, 0x22, 0x90, 0x95, 0xEF,
+0xEF, 0xF0, 0x90, 0x95, 0xED, 0x74, 0x18, 0xF0,
+0x90, 0x96, 0x0F, 0x74, 0x01, 0xF0, 0xFB, 0x7A,
+0x95, 0x79, 0xED, 0x12, 0x90, 0x39, 0x7F, 0x04,
+0x02, 0x04, 0x7E, 0x90, 0x93, 0x03, 0xE0, 0x30,
+0xE0, 0x04, 0x7F, 0x01, 0xF1, 0x85, 0x22, 0x90,
+0x93, 0x03, 0xE0, 0x30, 0xE0, 0x04, 0x7F, 0x02,
+0xF1, 0x85, 0x22, 0x90, 0x93, 0x03, 0xE0, 0x30,
+0xE0, 0x04, 0x7F, 0x03, 0xF1, 0x85, 0x22, 0x12,
+0xC0, 0x64, 0x90, 0x93, 0x03, 0xE0, 0x54, 0xFE,
+0x4E, 0xF0, 0x30, 0xE0, 0x30, 0xEF, 0x54, 0x04,
+0x25, 0xE0, 0xFE, 0xE0, 0x54, 0xF7, 0x4E, 0xFE,
+0xF0, 0xEF, 0x54, 0x02, 0x25, 0xE0, 0xFF, 0xEE,
+0x54, 0xFB, 0x4F, 0xF0, 0x90, 0x04, 0x57, 0xE0,
+0x90, 0x93, 0x05, 0xF0, 0x90, 0x04, 0x55, 0xE0,
+0x90, 0x93, 0x04, 0xF0, 0x7D, 0x10, 0x7F, 0x01,
+0x12, 0x7C, 0x05, 0x80, 0x07, 0x7D, 0x10, 0x7F,
+0x01, 0x12, 0x7C, 0x3B, 0x90, 0x93, 0x03, 0xE0,
+0x54, 0x01, 0xFF, 0xEF, 0x90, 0x07, 0xDC, 0x60,
+0x25, 0xE4, 0xF0, 0xF0, 0x90, 0x07, 0xDE, 0xF0,
+0xA3, 0x04, 0xF0, 0x90, 0x07, 0xDD, 0x74, 0x03,
+0xF0, 0x90, 0x07, 0xE3, 0xE0, 0xF0, 0xA3, 0x74,
+0x50, 0xF0, 0xA3, 0x74, 0x10, 0xF0, 0x90, 0x07,
+0xDC, 0xE0, 0x44, 0x01, 0xF0, 0x22, 0xE4, 0xF0,
+0x22, 0x12, 0x02, 0x06, 0xFF, 0x90, 0x93, 0x3A,
+0xF0, 0xBF, 0x01, 0x07, 0x11, 0x54, 0xE4, 0x90,
+0x93, 0x3A, 0xF0, 0x22, 0x11, 0xFF, 0x7F, 0xEF,
+0x7E, 0x01, 0x12, 0x5F, 0xA6, 0xBF, 0x01, 0x06,
+0x90, 0x95, 0x54, 0xE0, 0xA3, 0xF0, 0x11, 0xFF,
+0x7F, 0xEE, 0x7E, 0x01, 0x12, 0x5F, 0xA6, 0xBF,
+0x01, 0x08, 0x90, 0x95, 0x54, 0xE0, 0x90, 0x95,
+0x56, 0xF0, 0x11, 0xFF, 0x7F, 0xED, 0x7E, 0x01,
+0x12, 0x5F, 0xA6, 0xBF, 0x01, 0x08, 0x90, 0x95,
+0x54, 0xE0, 0x90, 0x95, 0x57, 0xF0, 0x11, 0xFF,
+0x7F, 0xEC, 0x7E, 0x01, 0x12, 0x5F, 0xA6, 0xBF,
+0x01, 0x08, 0x90, 0x95, 0x54, 0xE0, 0x90, 0x95,
+0x58, 0xF0, 0x11, 0xFF, 0x7F, 0xEB, 0x7E, 0x01,
+0x12, 0x5F, 0xA6, 0xBF, 0x01, 0x08, 0x90, 0x95,
+0x54, 0xE0, 0x90, 0x95, 0x59, 0xF0, 0x90, 0x95,
+0x55, 0xE0, 0xFF, 0xA3, 0xE0, 0xFD, 0xA3, 0xE0,
+0xFB, 0xA3, 0xE0, 0x90, 0x95, 0x5D, 0xF0, 0x90,
+0x95, 0x59, 0xE0, 0x90, 0x95, 0x5E, 0xF0, 0x90,
+0x95, 0x5F, 0x74, 0x12, 0xF0, 0x90, 0x95, 0x81,
+0x74, 0x05, 0xF0, 0x90, 0x95, 0x61, 0xF1, 0x7F,
+0x90, 0x95, 0x5D, 0xE0, 0x90, 0x95, 0x64, 0xF0,
+0x90, 0x95, 0x5E, 0xE0, 0x90, 0x95, 0x65, 0xF0,
+0x7B, 0x01, 0x7A, 0x95, 0x79, 0x5F, 0x12, 0x90,
+0x39, 0x7F, 0x04, 0x02, 0x04, 0x7E, 0xF0, 0x7B,
+0x01, 0x7A, 0x95, 0x79, 0x54, 0x22, 0x7E, 0x00,
 0x7F, 0x0B, 0x7D, 0x00, 0x7B, 0x01, 0x7A, 0x93,
-0x79, 0xE7, 0x12, 0x04, 0x80, 0x11, 0x5C, 0xF1,
-0xDB, 0xBF, 0x01, 0x1C, 0x90, 0x95, 0x4E, 0xE0,
+0x79, 0xE7, 0x12, 0x04, 0x80, 0x11, 0xFF, 0xF1,
+0x6F, 0xBF, 0x01, 0x1C, 0x90, 0x95, 0x54, 0xE0,
 0xFE, 0x54, 0x01, 0x90, 0x93, 0xE7, 0xF0, 0xEE,
 0x54, 0x04, 0x90, 0x93, 0xE9, 0xF0, 0x90, 0x95,
-0x4E, 0xE0, 0x54, 0x08, 0x90, 0x93, 0xE8, 0xF0,
-0x11, 0x5C, 0x12, 0x8F, 0x95, 0x64, 0x01, 0x70,
-0x35, 0x90, 0x95, 0x4E, 0xE0, 0x54, 0x07, 0x70,
-0x15, 0x7B, 0x01, 0x7A, 0x95, 0x79, 0x4F, 0x7F,
+0x54, 0xE0, 0x54, 0x08, 0x90, 0x93, 0xE8, 0xF0,
+0x11, 0xFF, 0x12, 0x97, 0x8D, 0x64, 0x01, 0x70,
+0x35, 0x90, 0x95, 0x54, 0xE0, 0x54, 0x07, 0x70,
+0x15, 0x7B, 0x01, 0x7A, 0x95, 0x79, 0x55, 0x7F,
 0xFA, 0x7E, 0x01, 0x12, 0x5F, 0xA6, 0xBF, 0x01,
-0x0F, 0x90, 0x95, 0x4F, 0x80, 0x03, 0x90, 0x95,
-0x4E, 0xE0, 0x54, 0x07, 0x90, 0x93, 0xEB, 0xF0,
-0x90, 0x95, 0x4E, 0xE0, 0x54, 0xE0, 0xC4, 0x13,
-0x54, 0x07, 0x90, 0x93, 0xEA, 0xF0, 0x11, 0x5C,
+0x0F, 0x90, 0x95, 0x55, 0x80, 0x03, 0x90, 0x95,
+0x54, 0xE0, 0x54, 0x07, 0x90, 0x93, 0xEB, 0xF0,
+0x90, 0x95, 0x54, 0xE0, 0x54, 0xE0, 0xC4, 0x13,
+0x54, 0x07, 0x90, 0x93, 0xEA, 0xF0, 0x11, 0xFF,
 0x7F, 0xFD, 0x7E, 0x01, 0x12, 0x5F, 0xA6, 0xBF,
-0x01, 0x0E, 0x90, 0x95, 0x4E, 0xE0, 0x54, 0x0C,
+0x01, 0x0E, 0x90, 0x95, 0x54, 0xE0, 0x54, 0x0C,
 0x13, 0x13, 0x54, 0x3F, 0x90, 0x93, 0xEC, 0xF0,
-0x22, 0xE0, 0xFF, 0x90, 0x95, 0x71, 0xE0, 0xFD,
-0x22, 0x12, 0x02, 0x06, 0x64, 0x01, 0x60, 0x02,
-0x41, 0x35, 0x90, 0x95, 0x95, 0xF0, 0x90, 0x95,
-0x95, 0xE0, 0xFF, 0xC3, 0x94, 0x10, 0x50, 0x28,
-0xEF, 0x12, 0xBF, 0x85, 0x7A, 0x95, 0x79, 0x94,
-0x12, 0x5F, 0xA6, 0xBF, 0x01, 0x12, 0x90, 0x95,
-0x94, 0xE0, 0xFF, 0xA3, 0xE0, 0x24, 0x96, 0xF5,
-0x82, 0xE4, 0x34, 0x95, 0xF5, 0x83, 0xEF, 0xF0,
-0x90, 0x95, 0x95, 0xE0, 0x04, 0xF0, 0x80, 0xCE,
-0x75, 0x45, 0x01, 0x75, 0x46, 0x95, 0x75, 0x47,
-0x96, 0x75, 0x48, 0x08, 0x7B, 0x01, 0x7A, 0x95,
-0x79, 0x50, 0x12, 0x69, 0xF5, 0x90, 0x95, 0x4E,
-0x74, 0x24, 0xF0, 0x90, 0x95, 0x70, 0x74, 0x08,
-0xF0, 0x75, 0x45, 0x01, 0x75, 0x46, 0x95, 0x75,
-0x47, 0x9E, 0xF5, 0x48, 0x7B, 0x01, 0x7A, 0x95,
-0x79, 0x73, 0x12, 0x69, 0xF5, 0x90, 0x95, 0x71,
-0x74, 0x25, 0xF0, 0x90, 0x95, 0x93, 0x74, 0x08,
-0x11, 0x5B, 0xF1, 0x0B, 0x12, 0x04, 0x7E, 0x7B,
-0x01, 0x7A, 0x95, 0x79, 0x71, 0x12, 0x8B, 0xBD,
-0x7F, 0x04, 0x12, 0x04, 0x7E, 0x22, 0x12, 0x02,
-0x06, 0xFF, 0x12, 0x87, 0xBC, 0x90, 0x95, 0x4E,
-0xF0, 0x12, 0x87, 0xB1, 0x90, 0x95, 0x4F, 0x12,
-0x87, 0xA5, 0x90, 0x95, 0x50, 0x12, 0x87, 0x75,
-0x90, 0x95, 0x51, 0x12, 0x87, 0x64, 0x90, 0x95,
-0x52, 0x12, 0x87, 0x6B, 0x90, 0x95, 0x53, 0xF0,
-0xEF, 0x24, 0xF9, 0x60, 0x39, 0x14, 0x70, 0x02,
-0x41, 0xF9, 0x14, 0x70, 0x02, 0x41, 0xFB, 0x24,
-0x03, 0x60, 0x02, 0x61, 0x3A, 0x90, 0x95, 0x4E,
-0xE0, 0x90, 0x88, 0xE1, 0xF0, 0x90, 0x95, 0x4F,
-0xE0, 0x90, 0x88, 0xE2, 0xF0, 0x90, 0x95, 0x50,
-0xE0, 0x90, 0x88, 0xE3, 0xF0, 0x90, 0x95, 0x51,
-0xE0, 0x90, 0x88, 0xE4, 0xF0, 0x90, 0x95, 0x52,
-0xE0, 0x90, 0x88, 0xE5, 0xF0, 0x22, 0x90, 0x95,
-0x4E, 0xE0, 0x90, 0x95, 0x43, 0xF0, 0x12, 0x8F,
-0x9E, 0x78, 0x10, 0x12, 0x03, 0xFE, 0xC0, 0x04,
-0xC0, 0x05, 0xC0, 0x06, 0xC0, 0x07, 0xA3, 0x12,
-0x8F, 0xA1, 0x78, 0x18, 0x12, 0x03, 0xFE, 0xD0,
-0x03, 0xD0, 0x02, 0xD0, 0x01, 0xD0, 0x00, 0x12,
-0x86, 0x20, 0xC0, 0x04, 0xC0, 0x05, 0xC0, 0x06,
-0xC0, 0x07, 0x90, 0x95, 0x50, 0x12, 0x8F, 0xA1,
-0x78, 0x08, 0x12, 0x03, 0xFE, 0xD0, 0x03, 0xD0,
-0x02, 0xD0, 0x01, 0xD0, 0x00, 0x12, 0x86, 0x20,
-0x71, 0x5E, 0x90, 0x95, 0x4F, 0x12, 0x8F, 0xA1,
-0x12, 0x86, 0x20, 0x90, 0x95, 0x39, 0x02, 0x04,
-0x31, 0xE1, 0x18, 0x90, 0x95, 0x45, 0xE0, 0x44,
-0x01, 0xFF, 0xF0, 0x90, 0x95, 0x4E, 0xE0, 0x54,
-0x7F, 0x25, 0xE0, 0xFE, 0xEF, 0x54, 0x01, 0x4E,
-0x90, 0x95, 0x45, 0xF0, 0xE0, 0xFF, 0xC3, 0x13,
-0x54, 0x7F, 0xC3, 0x94, 0x1E, 0x50, 0x06, 0xEF,
-0x54, 0x01, 0x44, 0x3C, 0xF0, 0x90, 0x95, 0x45,
-0xE0, 0xFF, 0xC3, 0x13, 0x54, 0x7F, 0xD3, 0x94,
-0x50, 0x40, 0x1D, 0xEF, 0x54, 0x01, 0x44, 0xA0,
-0xF0, 0x22, 0x7E, 0x01, 0x7F, 0xFF, 0xAD, 0x06,
-0x11, 0x5C, 0x90, 0x8A, 0xCF, 0xE0, 0xF8, 0xA3,
-0xE0, 0xF5, 0x82, 0x88, 0x83, 0x12, 0x04, 0x7E,
-0x22, 0xF0, 0xA3, 0xE0, 0xFF, 0xE4, 0xFC, 0xFD,
-0xFE, 0x78, 0x08, 0x12, 0x03, 0xFE, 0xA8, 0x04,
-0xA9, 0x05, 0xAA, 0x06, 0xAB, 0x07, 0x22, 0x90,
-0x93, 0x58, 0xE0, 0x20, 0xE0, 0x02, 0xA1, 0x99,
-0xC3, 0x13, 0x54, 0x07, 0x60, 0x02, 0xA1, 0x99,
-0x90, 0x93, 0xD9, 0xE0, 0x30, 0xE0, 0x59, 0x12,
-0xEB, 0xC0, 0x40, 0x54, 0x90, 0x93, 0xE0, 0xE0,
-0x30, 0xE0, 0x23, 0x54, 0xFE, 0xF0, 0x90, 0x93,
-0xE2, 0xE0, 0x90, 0x93, 0xD6, 0xF0, 0x90, 0x93,
-0xE5, 0xE0, 0x90, 0x93, 0xD7, 0xF0, 0x90, 0x93,
-0xE3, 0xE0, 0x90, 0x93, 0x5D, 0xF0, 0x90, 0x93,
-0xE4, 0xE0, 0x90, 0x93, 0x78, 0xF0, 0x90, 0x05,
-0x58, 0xE0, 0x90, 0x95, 0xF3, 0x12, 0xA7, 0x27,
-0x54, 0x07, 0xFF, 0x64, 0x02, 0x60, 0x03, 0xEF,
-0x70, 0x07, 0xB1, 0xAA, 0x24, 0xFD, 0x12, 0xA6,
-0x15, 0xB1, 0xAA, 0x90, 0x92, 0x21, 0xF0, 0xE4,
-0x12, 0xEB, 0x83, 0xE4, 0x90, 0x93, 0xDA, 0xF0,
-0x90, 0x93, 0xD5, 0xE0, 0x20, 0xE0, 0x02, 0xA1,
-0x99, 0x90, 0x93, 0xD9, 0xE0, 0xFF, 0xC3, 0x13,
-0xFE, 0x54, 0x1F, 0x70, 0x02, 0xA1, 0x99, 0xEF,
-0x54, 0xC1, 0xFF, 0xEE, 0x14, 0x54, 0x1F, 0xFE,
-0x25, 0xE0, 0x4F, 0xF0, 0xE0, 0xC3, 0x13, 0x54,
-0x1F, 0x60, 0x02, 0xA1, 0x99, 0x90, 0x93, 0xE1,
-0xE0, 0x30, 0xE0, 0x17, 0x54, 0xFE, 0xF0, 0x90,
-0x93, 0xE0, 0xE0, 0x44, 0x01, 0xF0, 0xA3, 0xE0,
-0x54, 0xFE, 0xFF, 0x90, 0x93, 0xD5, 0xE0, 0x54,
-0x01, 0x4F, 0xF0, 0x90, 0x05, 0x22, 0xE0, 0x44,
-0x40, 0xFD, 0x7B, 0x58, 0x7F, 0x40, 0x12, 0xAC,
-0x35, 0x90, 0x05, 0x50, 0xE0, 0x54, 0xF7, 0xF0,
-0x90, 0x05, 0x69, 0x71, 0x53, 0x90, 0x05, 0x68,
-0x12, 0x8F, 0xA1, 0x12, 0x86, 0x20, 0xC0, 0x04,
-0xC0, 0x05, 0xC0, 0x06, 0xC0, 0x07, 0x90, 0x05,
-0x6A, 0x12, 0x8F, 0xA1, 0x78, 0x10, 0x12, 0x03,
-0xFE, 0xD0, 0x03, 0xD0, 0x02, 0xD0, 0x01, 0xD0,
-0x00, 0x12, 0x86, 0x20, 0xC0, 0x04, 0xC0, 0x05,
-0xC0, 0x06, 0xC0, 0x07, 0xA3, 0x12, 0x8F, 0xA1,
-0x78, 0x18, 0x12, 0x03, 0xFE, 0xD0, 0x03, 0xD0,
-0x02, 0xD0, 0x01, 0xD0, 0x00, 0x12, 0x86, 0x20,
-0x90, 0x95, 0xE7, 0x12, 0x04, 0x31, 0xB1, 0x9C,
-0x90, 0x95, 0xEF, 0x12, 0x04, 0x31, 0x90, 0x05,
-0x6D, 0x71, 0x53, 0x90, 0x05, 0x6C, 0x12, 0x8F,
-0xA1, 0x12, 0x86, 0x20, 0xC0, 0x04, 0xC0, 0x05,
-0xC0, 0x06, 0xC0, 0x07, 0x90, 0x05, 0x6E, 0x12,
-0x8F, 0xA1, 0x78, 0x10, 0x12, 0x03, 0xFE, 0xD0,
-0x03, 0xD0, 0x02, 0xD0, 0x01, 0xD0, 0x00, 0x12,
-0x86, 0x20, 0xC0, 0x04, 0xC0, 0x05, 0xC0, 0x06,
-0xC0, 0x07, 0xA3, 0x12, 0x8F, 0xA1, 0x78, 0x18,
-0x12, 0x03, 0xFE, 0xD0, 0x03, 0xD0, 0x02, 0xD0,
-0x01, 0xD0, 0x00, 0x12, 0x86, 0x20, 0x90, 0x95,
-0xEB, 0x12, 0x04, 0x31, 0x90, 0x95, 0xE7, 0x12,
-0x86, 0x2D, 0xC0, 0x00, 0xC0, 0x01, 0xC0, 0x02,
-0xC0, 0x03, 0x90, 0x93, 0xD5, 0xE0, 0xC3, 0x13,
-0x54, 0x7F, 0xFF, 0xE4, 0xFC, 0xFD, 0xFE, 0xFB,
-0x7A, 0x04, 0xF9, 0xF8, 0x12, 0x85, 0xC4, 0xD0,
-0x03, 0xD0, 0x02, 0xD0, 0x01, 0xD0, 0x00, 0x12,
-0x85, 0xA9, 0x90, 0x95, 0xE7, 0x12, 0x04, 0x31,
-0x90, 0x95, 0xEF, 0x12, 0x04, 0xB8, 0x90, 0x95,
-0xE7, 0xF1, 0xD4, 0x50, 0x0E, 0xB1, 0xA4, 0xEF,
-0x24, 0x01, 0x12, 0xEB, 0xE4, 0x90, 0x95, 0xEB,
-0x12, 0x04, 0x31, 0xB1, 0xA4, 0x78, 0x18, 0x12,
-0x03, 0xEB, 0x90, 0x05, 0x67, 0xB1, 0xA2, 0x78,
-0x10, 0x12, 0x03, 0xEB, 0x90, 0x05, 0x66, 0xB1,
-0xA2, 0x78, 0x08, 0x12, 0x03, 0xEB, 0x90, 0x05,
-0x65, 0xB1, 0xA2, 0x90, 0x05, 0x64, 0xB1, 0x9A,
-0x78, 0x18, 0x12, 0x03, 0xEB, 0x90, 0x05, 0x63,
-0xB1, 0x9A, 0x78, 0x10, 0x12, 0x03, 0xEB, 0x90,
-0x05, 0x62, 0xB1, 0x9A, 0x78, 0x08, 0x12, 0x03,
-0xEB, 0x90, 0x05, 0x61, 0xB1, 0x9A, 0x90, 0x05,
-0x60, 0xEF, 0xF0, 0x90, 0x05, 0x50, 0xE0, 0x44,
-0x08, 0xF0, 0x90, 0x05, 0x22, 0xE0, 0x54, 0xBF,
-0xFD, 0x7B, 0x59, 0x7F, 0x40, 0x12, 0xAC, 0x35,
-0x7F, 0x08, 0x12, 0xAF, 0xEE, 0x90, 0x93, 0xD9,
-0xE0, 0x54, 0xC1, 0x44, 0x28, 0xF0, 0x44, 0x01,
-0xF0, 0x22, 0xEF, 0xF0, 0x90, 0x95, 0xE7, 0x02,
-0x04, 0xB8, 0xEF, 0xF0, 0x90, 0x95, 0xEB, 0x02,
-0x04, 0xB8, 0xE4, 0x90, 0x92, 0x20, 0xF0, 0x90,
-0x95, 0xF3, 0xE0, 0xFF, 0x90, 0x93, 0xD6, 0xE0,
-0x2F, 0x22, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0,
-0xD0, 0xE4, 0x90, 0x96, 0x1B, 0xF0, 0x90, 0x05,
-0x63, 0xE0, 0x90, 0x96, 0x1F, 0xF0, 0x90, 0x05,
-0x62, 0xE0, 0x90, 0x96, 0x1E, 0xF0, 0x90, 0x05,
-0x61, 0xE0, 0x90, 0x96, 0x1D, 0xF0, 0x90, 0x05,
-0x60, 0xE0, 0x90, 0x96, 0x1C, 0x71, 0x51, 0x90,
-0x96, 0x1C, 0x12, 0x8F, 0xA1, 0x12, 0x86, 0x20,
-0xC0, 0x04, 0xC0, 0x05, 0xC0, 0x06, 0xC0, 0x07,
-0x90, 0x96, 0x1E, 0x12, 0x8F, 0xA1, 0x78, 0x10,
-0x12, 0x03, 0xFE, 0xD0, 0x03, 0xD0, 0x02, 0xD0,
-0x01, 0xD0, 0x00, 0x12, 0x86, 0x20, 0xC0, 0x04,
-0xC0, 0x05, 0xC0, 0x06, 0xC0, 0x07, 0xA3, 0x12,
-0x8F, 0xA1, 0x78, 0x18, 0x12, 0x03, 0xFE, 0xD0,
-0x03, 0xD0, 0x02, 0xD0, 0x01, 0xD0, 0x00, 0x12,
-0x86, 0x20, 0x90, 0x96, 0x24, 0x12, 0x04, 0x31,
-0x90, 0x96, 0x24, 0x12, 0x86, 0x2D, 0xC0, 0x00,
-0xC0, 0x01, 0xC0, 0x02, 0xC0, 0x03, 0x90, 0x95,
-0x4D, 0xE0, 0x24, 0x01, 0xFF, 0xE4, 0x33, 0xFE,
-0xE4, 0xFC, 0xFD, 0xFB, 0x7A, 0x90, 0x79, 0x01,
-0xF8, 0x12, 0x85, 0xC4, 0xD0, 0x03, 0xD0, 0x02,
-0xD0, 0x01, 0xD0, 0x00, 0x12, 0x85, 0xA9, 0x90,
-0x96, 0x24, 0x12, 0x04, 0x31, 0xD1, 0xFF, 0x90,
-0x05, 0x2C, 0xEF, 0xF0, 0xD1, 0xFF, 0x78, 0x08,
-0x12, 0x03, 0xEB, 0x90, 0x05, 0x2D, 0xEF, 0xF0,
-0xD1, 0xFF, 0x78, 0x10, 0x12, 0x03, 0xEB, 0x90,
-0x05, 0x2E, 0xEF, 0xF0, 0xD1, 0xFF, 0x78, 0x18,
-0x12, 0x03, 0xEB, 0x90, 0x05, 0x2F, 0xEF, 0x12,
-0xD8, 0x38, 0x90, 0x96, 0x20, 0x12, 0x04, 0x31,
-0xF1, 0x05, 0xE4, 0xFF, 0xFE, 0xED, 0x54, 0x03,
-0xFD, 0xE4, 0xFC, 0xFB, 0xFA, 0xF9, 0xF8, 0xC3,
-0x12, 0x03, 0xDA, 0x70, 0x4D, 0xF1, 0x05, 0xE4,
-0xFF, 0xEE, 0x54, 0xFC, 0xFE, 0xE4, 0xFD, 0xFC,
-0x78, 0x0A, 0x12, 0x03, 0xEB, 0x90, 0x96, 0x1B,
-0xEF, 0xF0, 0x90, 0x95, 0x4C, 0xE0, 0xFE, 0xEF,
-0xD3, 0x9E, 0x50, 0x07, 0x90, 0x96, 0x1B, 0xE0,
-0xB5, 0x06, 0x1F, 0x90, 0x96, 0x28, 0x74, 0x28,
-0xF0, 0x90, 0x96, 0x4A, 0x74, 0x04, 0xF0, 0x90,
-0x96, 0x1B, 0xE0, 0x90, 0x96, 0x2A, 0xF0, 0x7B,
-0x01, 0x7A, 0x96, 0x79, 0x28, 0xF1, 0x0B, 0x12,
-0x04, 0x7E, 0xF1, 0x05, 0x12, 0xD8, 0x40, 0x12,
-0x79, 0x53, 0xD0, 0xD0, 0x92, 0xAF, 0x22, 0x90,
-0x96, 0x24, 0x02, 0x04, 0xB8, 0x90, 0x96, 0x20,
-0x02, 0x04, 0xB8, 0x90, 0x8A, 0x77, 0xE0, 0xFE,
-0xA3, 0xE0, 0xFF, 0xF5, 0x82, 0x8E, 0x83, 0x22,
-0x90, 0x95, 0x54, 0x74, 0x27, 0xF0, 0x90, 0x95,
-0x76, 0x74, 0x06, 0xF0, 0x90, 0x95, 0x56, 0x74,
-0x08, 0x12, 0xD7, 0x7B, 0x90, 0x95, 0x4A, 0xE0,
-0x90, 0x95, 0x5A, 0xF0, 0x90, 0x95, 0x4B, 0xE0,
-0x90, 0x95, 0x5B, 0xF0, 0x7B, 0x01, 0x7A, 0x95,
-0x79, 0x54, 0xF1, 0x0B, 0x02, 0x04, 0x7E, 0x90,
-0x95, 0xE7, 0xEF, 0xF0, 0x90, 0x04, 0x7E, 0xE0,
-0xFF, 0xA3, 0xE0, 0x90, 0x96, 0x0B, 0xF0, 0xE0,
-0xFE, 0x6F, 0x60, 0x71, 0x90, 0x95, 0xE8, 0x74,
-0x03, 0xF0, 0x90, 0x96, 0x0A, 0x74, 0x08, 0xF0,
-0xEE, 0x04, 0x54, 0x0F, 0xFF, 0xE4, 0xFE, 0xEF,
-0x75, 0xF0, 0x08, 0xA4, 0x24, 0x00, 0xF5, 0x82,
-0xE4, 0x34, 0x80, 0xF5, 0x83, 0xE5, 0x82, 0x2E,
-0x12, 0xD9, 0x65, 0xE0, 0xFD, 0x74, 0xEA, 0x2E,
-0xF5, 0x82, 0xE4, 0x34, 0x95, 0xF5, 0x83, 0xED,
-0xF0, 0x0E, 0xEE, 0xB4, 0x08, 0xD9, 0x7B, 0x01,
-0x7A, 0x95, 0x79, 0xE8, 0xF1, 0x0B, 0x12, 0x04,
-0x7E, 0x90, 0x96, 0x0B, 0xE0, 0x04, 0x54, 0x0F,
-0xFF, 0xF0, 0xBF, 0x0F, 0x02, 0xE4, 0xF0, 0x90,
-0x96, 0x0B, 0xE0, 0x90, 0x04, 0x7F, 0xF0, 0x90,
-0x95, 0xE7, 0xE0, 0x70, 0x05, 0x90, 0x8A, 0xE5,
-0x80, 0x03, 0x90, 0x8A, 0x79, 0x12, 0x8B, 0xCF,
-0x7F, 0x04, 0x12, 0x04, 0x7E, 0x22, 0xA1, 0xBA,
-0xE4, 0xFF, 0xE1, 0x47, 0x12, 0x86, 0x2D, 0xC3,
-0x02, 0x03, 0xDA, 0x7F, 0xF9, 0x7E, 0x01, 0x02,
-0x5F, 0xA6, 0x12, 0x93, 0xD7, 0x12, 0x02, 0x06,
+0x22, 0x12, 0x02, 0x06, 0x90, 0x95, 0x77, 0x12,
+0x87, 0x69, 0x90, 0x95, 0x78, 0xF0, 0x60, 0x0E,
+0x31, 0xEF, 0x31, 0xF7, 0x90, 0x95, 0x78, 0x31,
+0xEF, 0x7B, 0x57, 0x12, 0x8F, 0x64, 0x90, 0x88,
+0x9D, 0xE0, 0x30, 0xE0, 0x0D, 0x12, 0x97, 0x31,
+0x30, 0xE0, 0x07, 0x90, 0x06, 0x0A, 0xE0, 0x44,
+0x07, 0xF0, 0x90, 0x95, 0x54, 0x74, 0x20, 0xF0,
+0x90, 0x95, 0x76, 0x74, 0x03, 0xF0, 0x90, 0x05,
+0x22, 0xE0, 0x90, 0x95, 0x56, 0xF0, 0x90, 0x93,
+0xF3, 0xE0, 0x90, 0x95, 0x57, 0xF0, 0x90, 0x93,
+0xF4, 0xE0, 0x90, 0x95, 0x58, 0x11, 0xFE, 0x12,
+0x90, 0x39, 0x7F, 0x04, 0x02, 0x04, 0x7E, 0xE0,
+0xFF, 0x90, 0x95, 0x77, 0xE0, 0xFD, 0x22, 0xEF,
+0xB4, 0xFF, 0x06, 0x90, 0x93, 0xF3, 0xED, 0xF0,
+0x22, 0xEF, 0xF4, 0xFE, 0x90, 0x93, 0xF3, 0xE0,
+0x5E, 0xFE, 0xED, 0x5F, 0x4E, 0xF0, 0x22, 0x12,
+0x02, 0x06, 0x64, 0x01, 0x60, 0x02, 0x41, 0xA2,
+0x90, 0x95, 0x9B, 0xF0, 0x90, 0x95, 0x9B, 0xE0,
+0xFF, 0xC3, 0x94, 0x10, 0x50, 0x27, 0xEF, 0xF1,
+0x88, 0x7A, 0x95, 0x79, 0x9A, 0x12, 0x5F, 0xA6,
+0xBF, 0x01, 0x12, 0x90, 0x95, 0x9A, 0xE0, 0xFF,
+0xA3, 0xE0, 0x24, 0x9C, 0xF5, 0x82, 0xE4, 0x34,
+0x95, 0xF5, 0x83, 0xEF, 0xF0, 0x90, 0x95, 0x9B,
+0xE0, 0x04, 0xF0, 0x80, 0xCF, 0x75, 0x45, 0x01,
+0x75, 0x46, 0x95, 0x75, 0x47, 0x9C, 0x75, 0x48,
+0x08, 0x7B, 0x01, 0x7A, 0x95, 0x79, 0x56, 0x12,
+0x69, 0xF5, 0x90, 0x95, 0x54, 0x74, 0x24, 0xF0,
+0x90, 0x95, 0x76, 0x74, 0x08, 0xF0, 0x75, 0x45,
+0x01, 0x75, 0x46, 0x95, 0x75, 0x47, 0xA4, 0xF5,
+0x48, 0x7B, 0x01, 0x7A, 0x95, 0x79, 0x79, 0x12,
+0x69, 0xF5, 0x90, 0x95, 0x77, 0x74, 0x25, 0xF0,
+0x90, 0x95, 0x99, 0x74, 0x08, 0x11, 0xFE, 0x91,
+0x11, 0x12, 0x04, 0x7E, 0x7B, 0x01, 0x7A, 0x95,
+0x79, 0x77, 0x12, 0x90, 0x39, 0x7F, 0x04, 0x12,
+0x04, 0x7E, 0x22, 0x12, 0x02, 0x06, 0xFF, 0x12,
+0x87, 0x6A, 0x90, 0x95, 0x54, 0x12, 0x87, 0x96,
+0x90, 0x95, 0x55, 0x12, 0x87, 0xFD, 0x90, 0x95,
+0x56, 0x12, 0x87, 0xF3, 0x90, 0x95, 0x57, 0xF0,
+0x12, 0x87, 0x63, 0x90, 0x95, 0x58, 0x12, 0xA2,
+0x26, 0x90, 0x95, 0x59, 0xF0, 0xEF, 0x24, 0xF9,
+0x60, 0x3F, 0x14, 0x70, 0x02, 0x61, 0x6D, 0x14,
+0x70, 0x02, 0x61, 0x6F, 0x24, 0xFD, 0x70, 0x02,
+0x61, 0xAE, 0x24, 0x06, 0x60, 0x02, 0x61, 0xBE,
+0x90, 0x95, 0x54, 0xE0, 0x90, 0x88, 0xE1, 0xF0,
+0x90, 0x95, 0x55, 0xE0, 0x90, 0x88, 0xE2, 0xF0,
+0x90, 0x95, 0x56, 0xE0, 0x90, 0x88, 0xE3, 0xF0,
+0x90, 0x95, 0x57, 0xE0, 0x90, 0x88, 0xE4, 0xF0,
+0x90, 0x95, 0x58, 0xE0, 0x90, 0x88, 0xE5, 0xF0,
+0x22, 0x90, 0x95, 0x54, 0xE0, 0x90, 0x95, 0x43,
+0xF0, 0x12, 0x8F, 0xE9, 0x78, 0x10, 0x12, 0x03,
+0xFE, 0xC0, 0x04, 0xC0, 0x05, 0xC0, 0x06, 0xC0,
+0x07, 0xA3, 0x12, 0x8F, 0xEC, 0x78, 0x18, 0x12,
+0x03, 0xFE, 0xD0, 0x03, 0xD0, 0x02, 0xD0, 0x01,
+0xD0, 0x00, 0x12, 0x86, 0x20, 0xC0, 0x04, 0xC0,
+0x05, 0xC0, 0x06, 0xC0, 0x07, 0x90, 0x95, 0x56,
+0x12, 0x8F, 0xEC, 0x78, 0x08, 0x12, 0x03, 0xFE,
+0xD0, 0x03, 0xD0, 0x02, 0xD0, 0x01, 0xD0, 0x00,
+0x12, 0x86, 0x20, 0x12, 0x9D, 0x3F, 0x90, 0x95,
+0x55, 0x12, 0x8F, 0xEC, 0x12, 0x86, 0x20, 0x90,
+0x95, 0x39, 0x02, 0x04, 0x31, 0x80, 0x66, 0x90,
+0x95, 0x45, 0xE0, 0x44, 0x01, 0xFF, 0xF0, 0x90,
+0x95, 0x54, 0xE0, 0x54, 0x7F, 0x25, 0xE0, 0xFE,
+0xEF, 0x54, 0x01, 0x4E, 0x90, 0x95, 0x45, 0xF0,
+0xE0, 0xFF, 0xC3, 0x13, 0x54, 0x7F, 0xC3, 0x94,
+0x1E, 0x50, 0x06, 0xEF, 0x54, 0x01, 0x44, 0x3C,
+0xF0, 0x90, 0x95, 0x45, 0xE0, 0xFF, 0xC3, 0x13,
+0x54, 0x7F, 0xD3, 0x94, 0x50, 0x40, 0x2D, 0xEF,
+0x54, 0x01, 0x44, 0xA0, 0xF0, 0x22, 0x90, 0x95,
+0x54, 0xE0, 0x54, 0x01, 0xFF, 0x90, 0x95, 0x4C,
+0xE0, 0x54, 0xFE, 0x4F, 0xF0, 0x22, 0x7E, 0x01,
+0x7F, 0xFF, 0xAD, 0x06, 0x11, 0xFF, 0x90, 0x8A,
+0xCF, 0xE0, 0xF8, 0xA3, 0xE0, 0xF5, 0x82, 0x88,
+0x83, 0x12, 0x04, 0x7E, 0x22, 0x90, 0x95, 0x5A,
+0x74, 0x27, 0xF0, 0x90, 0x95, 0x7C, 0x74, 0x08,
+0xF0, 0x90, 0x95, 0x5C, 0xF1, 0x76, 0x90, 0x95,
+0x4A, 0xE0, 0x90, 0x95, 0x60, 0xF0, 0x90, 0x95,
+0x4B, 0xE0, 0x90, 0x95, 0x61, 0xF0, 0x90, 0x95,
+0x4E, 0xE0, 0x90, 0x95, 0x62, 0xF0, 0x90, 0x95,
+0x4F, 0xE0, 0x90, 0x95, 0x63, 0xF0, 0x7B, 0x01,
+0x7A, 0x95, 0x79, 0x5A, 0x91, 0x11, 0x02, 0x04,
+0x7E, 0x90, 0x8A, 0x77, 0xE0, 0xFE, 0xA3, 0xE0,
+0xFF, 0xF5, 0x82, 0x8E, 0x83, 0x22, 0xD3, 0x10,
+0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0xE4, 0x90, 0x96,
+0x21, 0xF0, 0x90, 0x05, 0x63, 0xE0, 0x90, 0x96,
+0x25, 0xF0, 0x90, 0x05, 0x62, 0xE0, 0x90, 0x96,
+0x24, 0xF0, 0x90, 0x05, 0x61, 0xE0, 0x90, 0x96,
+0x23, 0xF0, 0x90, 0x05, 0x60, 0xE0, 0x90, 0x96,
+0x22, 0x12, 0x9D, 0x32, 0x90, 0x96, 0x22, 0x12,
+0x8F, 0xEC, 0x12, 0x86, 0x20, 0xC0, 0x04, 0xC0,
+0x05, 0xC0, 0x06, 0xC0, 0x07, 0x90, 0x96, 0x24,
+0x12, 0x8F, 0xEC, 0x78, 0x10, 0x12, 0x03, 0xFE,
+0xD0, 0x03, 0xD0, 0x02, 0xD0, 0x01, 0xD0, 0x00,
+0x12, 0x86, 0x20, 0xC0, 0x04, 0xC0, 0x05, 0xC0,
+0x06, 0xC0, 0x07, 0xA3, 0x12, 0x8F, 0xEC, 0x78,
+0x18, 0x12, 0x03, 0xFE, 0xD0, 0x03, 0xD0, 0x02,
+0xD0, 0x01, 0xD0, 0x00, 0x12, 0x86, 0x20, 0x90,
+0x96, 0x2A, 0x12, 0x04, 0x31, 0x90, 0x96, 0x2A,
+0x12, 0x86, 0x2D, 0xC0, 0x00, 0xC0, 0x01, 0xC0,
+0x02, 0xC0, 0x03, 0x90, 0x95, 0x51, 0xE0, 0x24,
+0x01, 0xFF, 0xE4, 0x33, 0xFE, 0xE4, 0xFC, 0xFD,
+0xFB, 0x7A, 0x90, 0x79, 0x01, 0xF8, 0x12, 0x85,
+0xC4, 0xD0, 0x03, 0xD0, 0x02, 0xD0, 0x01, 0xD0,
+0x00, 0x12, 0x85, 0xA9, 0x90, 0x96, 0x2A, 0x12,
+0x04, 0x31, 0xB1, 0x62, 0x90, 0x05, 0x2C, 0xEF,
+0xF0, 0xB1, 0x62, 0x78, 0x08, 0x12, 0x03, 0xEB,
+0x90, 0x05, 0x2D, 0xEF, 0xF0, 0xB1, 0x62, 0x78,
+0x10, 0x12, 0x03, 0xEB, 0x90, 0x05, 0x2E, 0xEF,
+0xF0, 0xB1, 0x62, 0x78, 0x18, 0x12, 0x03, 0xEB,
+0x90, 0x05, 0x2F, 0xEF, 0xB1, 0xAE, 0x90, 0x96,
+0x26, 0x12, 0x04, 0x31, 0xB1, 0x68, 0xE4, 0xFF,
+0xFE, 0xED, 0x54, 0x03, 0xFD, 0xE4, 0xFC, 0xFB,
+0xFA, 0xF9, 0xF8, 0xC3, 0x12, 0x03, 0xDA, 0x70,
+0x4C, 0xB1, 0x68, 0xE4, 0xFF, 0xEE, 0x54, 0xFC,
+0xFE, 0xE4, 0xFD, 0xFC, 0x78, 0x0A, 0x12, 0x03,
+0xEB, 0x90, 0x96, 0x21, 0xEF, 0xF0, 0x90, 0x95,
+0x50, 0xE0, 0xFE, 0xEF, 0xD3, 0x9E, 0x50, 0x07,
+0x90, 0x96, 0x21, 0xE0, 0xB5, 0x06, 0x1F, 0x90,
+0x96, 0x2E, 0x74, 0x28, 0xF0, 0x90, 0x96, 0x50,
+0x74, 0x04, 0xF0, 0x90, 0x96, 0x21, 0xE0, 0x90,
+0x96, 0x30, 0xF0, 0x7B, 0x01, 0x7A, 0x96, 0x79,
+0x2E, 0x91, 0x11, 0x12, 0x04, 0x7E, 0xB1, 0x68,
+0xB1, 0xB6, 0x12, 0x79, 0x53, 0xD0, 0xD0, 0x92,
+0xAF, 0x22, 0x90, 0x96, 0x2A, 0x02, 0x04, 0xB8,
+0x90, 0x96, 0x26, 0x02, 0x04, 0xB8, 0x12, 0x02,
+0x06, 0x64, 0x01, 0x70, 0x2A, 0x12, 0x87, 0x6A,
+0x90, 0x95, 0x50, 0x12, 0x87, 0x96, 0x90, 0x95,
+0x51, 0xB1, 0xAE, 0xB1, 0xB6, 0x12, 0x79, 0x53,
+0x90, 0x01, 0x25, 0x74, 0x08, 0xF0, 0xFD, 0x7F,
+0x01, 0x12, 0x7B, 0xF7, 0x90, 0x05, 0x1F, 0xE0,
+0x54, 0xFC, 0x44, 0x08, 0xF0, 0x81, 0x1E, 0x7D,
+0x08, 0x7F, 0x01, 0x12, 0x7C, 0x2E, 0x90, 0x05,
+0x1F, 0xE0, 0x54, 0xF7, 0xF0, 0x22, 0xF0, 0x7D,
+0x42, 0xE4, 0xFF, 0x02, 0x7B, 0xBD, 0xED, 0x44,
+0x03, 0xFD, 0xEC, 0x90, 0x8B, 0x9F, 0x12, 0x04,
+0x31, 0x7D, 0x42, 0xE4, 0xFF, 0x22, 0x90, 0x95,
+0xED, 0xEF, 0xF0, 0x90, 0x04, 0x7E, 0xE0, 0xFF,
+0xA3, 0xE0, 0x90, 0x96, 0x11, 0xF0, 0xE0, 0xFE,
+0x6F, 0x60, 0x70, 0x90, 0x95, 0xEE, 0x74, 0x03,
+0xF0, 0x90, 0x96, 0x10, 0x74, 0x08, 0xF0, 0xEE,
+0x04, 0x54, 0x0F, 0xFF, 0xE4, 0xFE, 0xEF, 0x75,
+0xF0, 0x08, 0xA4, 0x24, 0x00, 0xF5, 0x82, 0xE4,
+0x34, 0x80, 0xF5, 0x83, 0xE5, 0x82, 0x2E, 0xD1,
+0x52, 0xE0, 0xFD, 0x74, 0xF0, 0x2E, 0xF5, 0x82,
+0xE4, 0x34, 0x95, 0xF5, 0x83, 0xED, 0xF0, 0x0E,
+0xEE, 0xB4, 0x08, 0xDA, 0x7B, 0x01, 0x7A, 0x95,
+0x79, 0xEE, 0x91, 0x11, 0x12, 0x04, 0x7E, 0x90,
+0x96, 0x11, 0xE0, 0x04, 0x54, 0x0F, 0xFF, 0xF0,
+0xBF, 0x0F, 0x02, 0xE4, 0xF0, 0x90, 0x96, 0x11,
+0xE0, 0x90, 0x04, 0x7F, 0xF0, 0x90, 0x95, 0xED,
+0xE0, 0x70, 0x05, 0x90, 0x8A, 0xE5, 0x80, 0x03,
+0x90, 0x8A, 0x79, 0x12, 0x90, 0x4B, 0x7F, 0x04,
+0x12, 0x04, 0x7E, 0x22, 0x12, 0x04, 0x6E, 0xE5,
+0x82, 0x2C, 0xF5, 0x82, 0xE4, 0x35, 0x83, 0xF5,
+0x83, 0x22, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0,
+0xD0, 0x90, 0x01, 0xCC, 0xE0, 0x54, 0x0F, 0xFD,
+0xED, 0x70, 0x02, 0xE1, 0x45, 0x90, 0x87, 0x0B,
+0xE0, 0xFF, 0x70, 0x06, 0xA3, 0xE0, 0x64, 0x09,
+0x60, 0x0A, 0xEF, 0x14, 0xFF, 0x90, 0x87, 0x0C,
+0xE0, 0xB5, 0x07, 0x04, 0x7F, 0x01, 0x80, 0x02,
+0x7F, 0x00, 0xEF, 0x60, 0x09, 0x90, 0x01, 0xC1,
+0xE0, 0x44, 0x01, 0xF0, 0xE1, 0x45, 0x90, 0x97,
+0x6D, 0xE0, 0x12, 0xA7, 0x68, 0x80, 0x05, 0xC3,
+0x33, 0xCE, 0x33, 0xCE, 0xD8, 0xF9, 0xFF, 0xED,
+0xFB, 0xEF, 0x5B, 0x60, 0x7B, 0xE4, 0xFC, 0xF1,
+0x4B, 0xA4, 0xFF, 0xEC, 0x7A, 0x00, 0x2F, 0xFF,
+0xEA, 0x35, 0xF0, 0xFE, 0x74, 0xD0, 0xF1, 0x5E,
+0x90, 0x87, 0x0C, 0xE0, 0xF9, 0x75, 0xF0, 0x08,
+0x90, 0x86, 0xBB, 0xD1, 0x4C, 0xEF, 0xF1, 0x4A,
+0xA4, 0xFF, 0xEC, 0x2F, 0xFF, 0xEA, 0x35, 0xF0,
+0xFE, 0x74, 0xF0, 0xF1, 0x5E, 0x75, 0xF0, 0x08,
+0xE9, 0x90, 0x86, 0xBF, 0xD1, 0x4C, 0xEF, 0xF0,
+0x0C, 0xEC, 0xB4, 0x04, 0xC2, 0xF1, 0x53, 0x80,
+0x02, 0xC3, 0x33, 0xD8, 0xFC, 0xF4, 0x5D, 0xFD,
+0xF1, 0x53, 0x80, 0x02, 0xC3, 0x33, 0xD8, 0xFC,
+0x90, 0x01, 0xCC, 0xF0, 0x90, 0x97, 0x6D, 0xE0,
+0x04, 0xF0, 0xE0, 0x54, 0x03, 0xF0, 0x90, 0x87,
+0x0C, 0xE0, 0x04, 0xF0, 0xE0, 0x7F, 0x00, 0xB4,
+0x0A, 0x02, 0x7F, 0x01, 0xEF, 0x70, 0x02, 0xC1,
+0x68, 0xE4, 0x90, 0x87, 0x0C, 0xF0, 0xC1, 0x68,
+0x90, 0x01, 0xC0, 0xE0, 0x44, 0x02, 0xF0, 0x90,
+0x97, 0x6D, 0xE0, 0x44, 0x80, 0x90, 0x00, 0x8A,
+0xF1, 0x4A, 0x90, 0x01, 0xD0, 0x12, 0x04, 0x6E,
+0xE0, 0x90, 0x01, 0xC3, 0xF0, 0xD0, 0xD0, 0x92,
+0xAF, 0x22, 0xF0, 0x90, 0x97, 0x6D, 0xE0, 0x75,
+0xF0, 0x04, 0x22, 0x90, 0x97, 0x6D, 0xE0, 0xFF,
+0x74, 0x01, 0xA8, 0x07, 0x08, 0x22, 0x2F, 0xF5,
+0x82, 0x74, 0x01, 0x3E, 0xF5, 0x83, 0xE0, 0xFF,
+0x22, 0x81, 0x1E, 0xE4, 0xFF, 0xA1, 0xC6, 0x7F,
+0xF9, 0x7E, 0x01, 0x02, 0x5F, 0xA6, 0xF0, 0xE4,
+0xA3, 0xF0, 0xA3, 0xF0, 0xA3, 0xF0, 0x22, 0xEF,
+0xF0, 0xA3, 0xED, 0xF0, 0xA3, 0xEB, 0xF0, 0x22,
+0x24, 0xA8, 0xFF, 0xE4, 0x34, 0x01, 0xFE, 0x7B,
+0x01, 0x22, 0xE4, 0x90, 0x86, 0xAF, 0xF0, 0xF1,
+0x78, 0x90, 0x93, 0x01, 0xF0, 0x90, 0x93, 0xF3,
+0xF0, 0xA3, 0xF0, 0x22, 0xEF, 0xB4, 0xFF, 0x06,
+0x90, 0x93, 0xF4, 0xED, 0xF0, 0x22, 0xEF, 0xF4,
+0xFE, 0x90, 0x93, 0xF4, 0x41, 0x07, 0x12, 0x02,
+0x06, 0x54, 0x01, 0xFF, 0x90, 0x93, 0x3F, 0xE0,
+0x54, 0xFE, 0x4F, 0xF0, 0x30, 0xE0, 0x02, 0xF1,
+0x77, 0x22, 0x7E, 0x00, 0x7F, 0x01, 0x7D, 0x00,
+0x7B, 0x01, 0x7A, 0x88, 0x79, 0x2C, 0x12, 0x04,
+0x80, 0x90, 0x88, 0x2C, 0xE0, 0x54, 0xFD, 0xF1,
+0x76, 0xA3, 0x74, 0x0C, 0xF0, 0x22, 0x12, 0x02,
+0x06, 0x54, 0x01, 0xFF, 0x90, 0x93, 0xF2, 0xE0,
+0x54, 0xFE, 0x4F, 0xF0, 0x22, 0x12, 0xA7, 0x4E,
 0xFF, 0x54, 0x7F, 0x90, 0x88, 0x36, 0xF0, 0xEF,
-0x12, 0x96, 0x95, 0xA3, 0xF0, 0x12, 0x87, 0xBC,
-0xFD, 0x54, 0xF0, 0xC4, 0x54, 0x0F, 0xFF, 0x90,
-0x88, 0x34, 0xE0, 0x54, 0xF0, 0x4F, 0x12, 0x87,
-0xA5, 0xFC, 0x54, 0x01, 0x25, 0xE0, 0xFF, 0x90,
-0x88, 0x31, 0xE0, 0x54, 0xFD, 0x4F, 0xF0, 0xEC,
-0x54, 0x04, 0xC3, 0x13, 0xFF, 0x90, 0x88, 0x33,
-0xE0, 0x54, 0xFD, 0x4F, 0xF0, 0xED, 0x54, 0x0F,
-0xC4, 0x54, 0xF0, 0xFF, 0xA3, 0xE0, 0x54, 0x0F,
-0x4F, 0xF0, 0x12, 0x87, 0xB1, 0x90, 0x88, 0x35,
-0x12, 0x87, 0x75, 0xFD, 0x90, 0x8A, 0x89, 0x12,
-0x8B, 0xCF, 0x7F, 0x02, 0x12, 0x04, 0x7E, 0x12,
-0x93, 0xDD, 0x12, 0x87, 0x65, 0xFF, 0x54, 0x01,
-0xFE, 0x90, 0x88, 0x9B, 0x31, 0x29, 0x12, 0x87,
-0x63, 0xFE, 0x54, 0x04, 0xFD, 0xEF, 0x54, 0xFB,
-0x11, 0xA1, 0x54, 0x08, 0xFE, 0xEF, 0x54, 0xF7,
-0x4E, 0xF0, 0x54, 0xEF, 0x12, 0x87, 0x63, 0xFE,
-0x54, 0x20, 0xFD, 0xEF, 0x54, 0xDF, 0x11, 0xA1,
-0x54, 0x40, 0xFE, 0xEF, 0x54, 0xBF, 0x4E, 0xF0,
-0x12, 0x5C, 0x5F, 0x90, 0x88, 0x36, 0xE0, 0xB4,
-0x01, 0x07, 0x90, 0x88, 0x33, 0xE0, 0x54, 0xFB,
-0xF0, 0x11, 0xA9, 0xF0, 0x90, 0x88, 0x36, 0x31,
-0x1C, 0x12, 0xB5, 0xA3, 0x90, 0x01, 0xBE, 0xF0,
-0x22, 0x4D, 0xFF, 0x90, 0x88, 0x9B, 0xF0, 0xEE,
-0x22, 0x90, 0x01, 0xB9, 0x74, 0x01, 0xF0, 0x90,
-0x01, 0xB8, 0x22, 0x90, 0x88, 0x31, 0xE0, 0xFF,
-0x12, 0x96, 0x95, 0x30, 0xE0, 0x1F, 0xEF, 0x54,
-0x7F, 0x31, 0x13, 0x30, 0xE1, 0x06, 0xE0, 0x44,
-0x02, 0xF0, 0x80, 0x08, 0xE0, 0x54, 0xFD, 0xF0,
-0x11, 0xA9, 0x04, 0xF0, 0x90, 0x88, 0x36, 0xE0,
-0x60, 0x03, 0x12, 0xB6, 0xD9, 0x90, 0x88, 0xA1,
-0x12, 0xB4, 0x14, 0x30, 0xE0, 0x22, 0x90, 0x88,
-0xA4, 0xE0, 0xFF, 0xC3, 0x13, 0x30, 0xE0, 0x18,
-0xEF, 0x54, 0xFD, 0xF0, 0x90, 0x04, 0xE0, 0xE0,
-0x90, 0x88, 0xA4, 0x30, 0xE1, 0x06, 0xE0, 0x44,
-0x04, 0xF0, 0x80, 0x04, 0xE0, 0x54, 0xFB, 0xF0,
-0x90, 0x04, 0xE0, 0xE0, 0x30, 0xE1, 0x03, 0x12,
-0xAC, 0xF4, 0x22, 0xF0, 0x90, 0x04, 0xE0, 0xE0,
-0x90, 0x88, 0x32, 0x22, 0xE0, 0x90, 0x01, 0xBA,
-0xF0, 0x90, 0x88, 0x38, 0xE0, 0x90, 0x01, 0xBB,
-0x22, 0xE0, 0x54, 0xFE, 0x4E, 0xFE, 0xF0, 0xEF,
-0x54, 0x02, 0xFF, 0xEE, 0x54, 0xFD, 0x4F, 0x22,
-0xC0, 0xE0, 0xC0, 0xF0, 0xC0, 0x83, 0xC0, 0x82,
-0xC0, 0xD0, 0x75, 0xD0, 0x00, 0xC0, 0x00, 0xC0,
-0x01, 0xC0, 0x02, 0xC0, 0x03, 0xC0, 0x04, 0xC0,
-0x05, 0xC0, 0x06, 0xC0, 0x07, 0x90, 0x01, 0xC4,
-0x74, 0x38, 0xF0, 0x74, 0xC9, 0xA3, 0xF0, 0x12,
-0x75, 0x50, 0xE5, 0x3D, 0x30, 0xE0, 0x02, 0xF1,
-0x23, 0xE5, 0x3D, 0x30, 0xE1, 0x02, 0xF1, 0x64,
-0xE5, 0x3D, 0x30, 0xE2, 0x02, 0x51, 0x97, 0xE5,
-0x3D, 0x30, 0xE4, 0x02, 0x51, 0x5E, 0xE5, 0x3D,
-0x30, 0xE5, 0x02, 0xB1, 0x57, 0xE5, 0x3E, 0x30,
-0xE0, 0x02, 0x91, 0x40, 0xE5, 0x3E, 0x30, 0xE3,
-0x02, 0x51, 0x12, 0xE5, 0x3E, 0x30, 0xE4, 0x02,
-0xF1, 0x36, 0xE5, 0x3F, 0x30, 0xE1, 0x03, 0x12,
-0xE2, 0x9D, 0xE5, 0x3F, 0x30, 0xE0, 0x03, 0x12,
-0xE2, 0x48, 0xE5, 0x3F, 0x30, 0xE4, 0x02, 0xB1,
-0x58, 0xE5, 0x3F, 0x30, 0xE2, 0x09, 0x51, 0xB4,
-0x90, 0x07, 0x8F, 0xE0, 0x44, 0x10, 0xF0, 0xE5,
-0x40, 0x30, 0xE1, 0x0B, 0x90, 0x8A, 0xE5, 0x12,
-0x8B, 0xCF, 0x7F, 0x04, 0x12, 0x04, 0x7E, 0xE5,
-0x40, 0x30, 0xE4, 0x02, 0x51, 0x32, 0xE5, 0x40,
-0x30, 0xE5, 0x03, 0x12, 0xB6, 0xEF, 0xE5, 0x40,
-0x30, 0xE6, 0x02, 0x11, 0xB3, 0xE5, 0x40, 0x30,
-0xE7, 0x02, 0x71, 0xEF, 0x74, 0x38, 0x04, 0x90,
-0x01, 0xC4, 0xF0, 0x74, 0xC9, 0xA3, 0xF0, 0xD0,
-0x07, 0xD0, 0x06, 0xD0, 0x05, 0xD0, 0x04, 0xD0,
-0x03, 0xD0, 0x02, 0xD0, 0x01, 0xD0, 0x00, 0xD0,
-0xD0, 0xD0, 0x82, 0xD0, 0x83, 0xD0, 0xF0, 0xD0,
-0xE0, 0x32, 0x90, 0x01, 0x8C, 0xE4, 0xF0, 0xA3,
-0xF0, 0xA3, 0x74, 0x71, 0xF0, 0xA3, 0x74, 0x02,
-0xF0, 0x90, 0x01, 0x95, 0xE0, 0x54, 0xF0, 0x44,
-0x07, 0xF0, 0x90, 0x01, 0x01, 0xE0, 0x44, 0x04,
-0xF0, 0x22, 0x12, 0xA6, 0x23, 0xB1, 0x59, 0x7F,
-0x01, 0x12, 0xDE, 0x33, 0x90, 0x8B, 0x07, 0x12,
-0x92, 0x57, 0x90, 0x93, 0x3B, 0xE0, 0x30, 0xE0,
-0x14, 0xB1, 0x68, 0x90, 0x93, 0x3E, 0xE0, 0x60,
-0x05, 0x14, 0xF0, 0x02, 0x79, 0xD4, 0xB1, 0xD0,
-0xE4, 0xFF, 0x12, 0x87, 0xE2, 0x22, 0x90, 0x88,
-0x9D, 0xE0, 0x30, 0xE0, 0x0E, 0xB1, 0x7A, 0x30,
-0xE0, 0x09, 0x90, 0x8A, 0xBB, 0x12, 0x8B, 0xCF,
-0x91, 0x34, 0xF0, 0x22, 0x90, 0x00, 0xAB, 0xE0,
-0xFE, 0x90, 0x00, 0xAA, 0x51, 0x8E, 0x54, 0x7F,
-0x90, 0x95, 0xE5, 0xF0, 0xA3, 0xEF, 0xF0, 0xE0,
-0x30, 0xE1, 0x02, 0x51, 0x12, 0x22, 0xE0, 0x7C,
-0x00, 0x24, 0x00, 0xFF, 0xEC, 0x3E, 0x22, 0x90,
-0x88, 0x36, 0xE0, 0x60, 0x14, 0x90, 0x06, 0x92,
-0xE0, 0x30, 0xE1, 0x08, 0x90, 0x8B, 0x01, 0x12,
-0x92, 0x57, 0x80, 0x05, 0xB1, 0x60, 0x12, 0xB6,
-0xD9, 0x02, 0xA6, 0x87, 0xD3, 0x10, 0xAF, 0x01,
-0xC3, 0xC0, 0xD0, 0x90, 0x88, 0xF0, 0xE0, 0x30,
-0xE0, 0x2E, 0x90, 0x88, 0xF7, 0xE0, 0xB4, 0x01,
-0x17, 0xA3, 0xE0, 0xB4, 0x01, 0x22, 0x74, 0x02,
-0xF0, 0x90, 0x88, 0xFE, 0xE0, 0xFE, 0xA3, 0xE0,
-0xFF, 0x90, 0x8A, 0x7F, 0x51, 0xFD, 0x80, 0x10,
-0x90, 0x88, 0xF7, 0xE0, 0xB4, 0x02, 0x09, 0x74,
-0x03, 0xF0, 0x90, 0x8A, 0xE7, 0x12, 0x92, 0x57,
-0xD0, 0xD0, 0x92, 0xAF, 0x22, 0x90, 0x97, 0x10,
-0xE0, 0xFF, 0x90, 0x8A, 0xC7, 0xE0, 0xFC, 0xA3,
-0xE0, 0xFD, 0xF5, 0x82, 0x8C, 0x83, 0x02, 0x04,
-0x7E, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0,
-0x90, 0x97, 0x10, 0xEF, 0xF0, 0xA3, 0xED, 0xF0,
-0x90, 0x86, 0xB1, 0xE0, 0x04, 0xF0, 0x90, 0x88,
-0x9D, 0xE0, 0x30, 0xE0, 0x07, 0x90, 0x05, 0x10,
-0xE4, 0xF0, 0xA3, 0xF0, 0x90, 0x04, 0x1D, 0xE0,
-0x60, 0x43, 0x90, 0x05, 0x22, 0xE0, 0x90, 0x97,
-0x14, 0xF0, 0x7B, 0x26, 0x12, 0x92, 0x4D, 0xEF,
-0x64, 0x01, 0x70, 0x0C, 0x12, 0xAF, 0xA2, 0x90,
-0x93, 0x58, 0xE0, 0x20, 0xE0, 0x17, 0x80, 0x13,
-0x90, 0x88, 0xA1, 0x12, 0xAF, 0x83, 0x30, 0xE0,
-0x0C, 0x12, 0xAF, 0xA2, 0x90, 0x93, 0x58, 0xE0,
-0x20, 0xE0, 0x02, 0x71, 0xAC, 0x90, 0x97, 0x14,
-0xE0, 0xFD, 0x7B, 0x27, 0xE4, 0xFF, 0x12, 0xAC,
-0x35, 0x51, 0xF5, 0x80, 0x0E, 0x51, 0xF5, 0x12,
-0xAF, 0xA2, 0x90, 0x93, 0x58, 0xE0, 0x20, 0xE0,
-0x02, 0x71, 0xAC, 0x90, 0x88, 0x9D, 0xE0, 0x30,
-0xE0, 0x1B, 0x90, 0x88, 0xA1, 0x12, 0xAF, 0x83,
+0x12, 0x97, 0x35, 0xA3, 0x12, 0x87, 0x69, 0xFD,
+0x54, 0xF0, 0xC4, 0x54, 0x0F, 0xFF, 0x90, 0x88,
+0x34, 0xE0, 0x54, 0xF0, 0x4F, 0x12, 0x87, 0xFD,
+0xFC, 0x54, 0x01, 0x25, 0xE0, 0xFF, 0x90, 0x88,
+0x31, 0xE0, 0x54, 0xFD, 0x4F, 0xF0, 0xEC, 0x54,
+0x04, 0xC3, 0x13, 0xFF, 0x90, 0x88, 0x33, 0xE0,
+0x54, 0xFD, 0x4F, 0xF0, 0xED, 0x54, 0x0F, 0xC4,
+0x54, 0xF0, 0xFF, 0xA3, 0xE0, 0x54, 0x0F, 0x12,
+0x87, 0x95, 0x90, 0x88, 0x35, 0x12, 0x87, 0xF3,
+0xFD, 0x90, 0x8A, 0x89, 0x12, 0x90, 0x4B, 0x7F,
+0x02, 0x12, 0xBF, 0xE2, 0x54, 0xFE, 0xF0, 0x54,
+0xFD, 0xF0, 0x54, 0xFB, 0xF0, 0x54, 0xF7, 0xF0,
+0x54, 0xEF, 0xF0, 0x54, 0xDF, 0xF0, 0x54, 0xBF,
+0x12, 0x87, 0xEA, 0x12, 0x5C, 0x5F, 0x90, 0x88,
+0x36, 0xE0, 0xB4, 0x01, 0x07, 0x90, 0x88, 0x33,
+0xE0, 0x54, 0xFB, 0xF0, 0x12, 0xDA, 0x73, 0xF0,
+0x90, 0x88, 0x36, 0x12, 0xED, 0xB4, 0x11, 0x93,
+0x90, 0x01, 0xBE, 0xF0, 0x22, 0x90, 0x88, 0x3A,
+0xE0, 0x44, 0x01, 0xF0, 0x90, 0x88, 0x34, 0xE0,
+0x54, 0x0F, 0x22, 0x90, 0x06, 0xA9, 0xE0, 0x90,
+0x95, 0xEE, 0xF0, 0xE0, 0xFD, 0x54, 0xC0, 0x70,
+0x04, 0x31, 0x0E, 0x80, 0x5D, 0xED, 0x30, 0xE6,
+0x47, 0x90, 0x88, 0x36, 0xE0, 0x64, 0x02, 0x70,
+0x2C, 0x90, 0x88, 0x31, 0xE0, 0xC3, 0x13, 0x20,
+0xE0, 0x09, 0x90, 0x88, 0x3A, 0xE0, 0x44, 0x01,
+0xF0, 0x80, 0x20, 0x11, 0x94, 0x64, 0x01, 0x70,
+0x29, 0x90, 0x88, 0x3A, 0xE0, 0x44, 0x04, 0xF0,
+0x90, 0x8A, 0x71, 0x12, 0x90, 0x4B, 0x7F, 0x01,
+0x12, 0x04, 0x7E, 0x80, 0x15, 0x11, 0x8D, 0x64,
+0x02, 0x60, 0x08, 0x90, 0x8A, 0xE1, 0x12, 0x8A,
+0x66, 0x80, 0x07, 0x12, 0x73, 0x8F, 0x80, 0x02,
+0x31, 0x0E, 0x90, 0x95, 0xEE, 0xE0, 0x90, 0x88,
+0x3A, 0x30, 0xE7, 0x05, 0x12, 0x9D, 0x48, 0xA1,
+0x18, 0xE0, 0x54, 0xFD, 0xF0, 0x22, 0x90, 0x88,
+0x3A, 0xE0, 0x54, 0xFE, 0xF0, 0x22, 0xE4, 0xF5,
+0x7C, 0x90, 0x06, 0xA9, 0xE0, 0xF5, 0x7C, 0x54,
+0xC0, 0x70, 0x0F, 0x31, 0x0E, 0x54, 0xFD, 0xF0,
+0xB1, 0xF6, 0x90, 0x88, 0x39, 0xE0, 0x60, 0x3C,
+0xC1, 0xC7, 0xE5, 0x7C, 0x30, 0xE6, 0x22, 0x90,
+0x88, 0x36, 0xE0, 0x64, 0x01, 0x70, 0x1C, 0x11,
+0x8D, 0x64, 0x02, 0x60, 0x0F, 0x90, 0x88, 0x9D,
+0xE0, 0x20, 0xE0, 0x0F, 0x90, 0x8A, 0xE1, 0x12,
+0x8A, 0x66, 0x80, 0x07, 0x12, 0x97, 0x4D, 0x80,
+0x02, 0x31, 0x0E, 0xE5, 0x7C, 0x90, 0x88, 0x3A,
+0x30, 0xE7, 0x05, 0x12, 0x9D, 0x48, 0xA1, 0x18,
+0xE0, 0x54, 0xFD, 0xF0, 0x22, 0xE4, 0x90, 0x95,
+0xED, 0xF0, 0x12, 0x9E, 0xA4, 0x60, 0x02, 0x41,
+0xBC, 0x90, 0x88, 0x36, 0xE0, 0x70, 0x02, 0x41,
+0xBC, 0x90, 0x88, 0x2C, 0xE0, 0x20, 0xE0, 0x36,
+0x90, 0x88, 0x9D, 0xE0, 0x20, 0xE0, 0x2F, 0x90,
+0x06, 0xA9, 0xE0, 0x54, 0xC0, 0x70, 0x27, 0x90,
+0x88, 0x9C, 0xE0, 0x70, 0x21, 0x90, 0x04, 0x1A,
+0xE0, 0xF4, 0x70, 0x1A, 0xA3, 0xE0, 0x54, 0x07,
+0xFF, 0xBF, 0x07, 0x12, 0x90, 0x06, 0x62, 0xE0,
+0x54, 0x03, 0x70, 0x0A, 0x90, 0x88, 0x39, 0xE0,
+0xB4, 0x04, 0x03, 0x12, 0xD3, 0xB5, 0x90, 0x05,
+0x63, 0xE0, 0x90, 0x88, 0x85, 0xF0, 0x90, 0x05,
+0x62, 0xE0, 0x90, 0x88, 0x86, 0xF0, 0x90, 0x05,
+0x61, 0xE0, 0x90, 0x88, 0x87, 0xF0, 0x90, 0x05,
+0x60, 0xE0, 0x90, 0x88, 0x88, 0xF0, 0x90, 0x07,
+0xF1, 0xE0, 0x90, 0x95, 0x35, 0xF0, 0x90, 0x07,
+0xF0, 0xE0, 0x90, 0x95, 0x36, 0xF0, 0xB1, 0xBE,
+0xF0, 0x90, 0x88, 0x3A, 0xE0, 0x54, 0xEC, 0xF0,
+0x51, 0xD8, 0x24, 0xFD, 0x50, 0x02, 0x80, 0x0D,
+0x90, 0x88, 0x2C, 0xE0, 0x30, 0xE0, 0x04, 0x11,
+0x9B, 0x80, 0x02, 0x31, 0x16, 0x51, 0xD8, 0x64,
+0x01, 0x70, 0x3A, 0x90, 0x06, 0xAB, 0xE0, 0x90,
+0x88, 0x3D, 0xF0, 0x90, 0x06, 0xA9, 0xE0, 0x30,
+0xE5, 0x06, 0xA3, 0xE0, 0x90, 0x95, 0xED, 0xF0,
+0x90, 0x95, 0xED, 0xE0, 0xFF, 0x60, 0x02, 0x80,
+0x05, 0x90, 0x88, 0x3C, 0xE0, 0xFF, 0x90, 0x88,
+0x3C, 0xEF, 0xF0, 0xA3, 0xE0, 0xFF, 0x70, 0x08,
+0x90, 0x88, 0x3C, 0xE0, 0xFE, 0xFF, 0x80, 0x00,
+0x90, 0x88, 0x3D, 0xEF, 0xF0, 0x51, 0xE1, 0xE4,
+0x90, 0x88, 0x3F, 0xF0, 0xA3, 0xF0, 0xB1, 0x8C,
+0x30, 0xE0, 0x5F, 0xEF, 0xC4, 0x13, 0x13, 0x54,
+0x03, 0x20, 0xE0, 0x25, 0x51, 0xD0, 0x6F, 0x70,
+0x51, 0xEF, 0x60, 0x4E, 0x90, 0x88, 0x32, 0xE0,
+0x44, 0x40, 0xF0, 0x12, 0xEE, 0x33, 0x12, 0x9F,
+0x81, 0x12, 0x7C, 0x05, 0x12, 0xCD, 0x05, 0xB1,
+0xB7, 0x90, 0x88, 0x3D, 0xE0, 0x14, 0xF0, 0x80,
+0x31, 0x90, 0x88, 0x34, 0xE0, 0xC4, 0x54, 0x0F,
+0x64, 0x01, 0x70, 0x26, 0x51, 0xD0, 0xFE, 0x6F,
+0x60, 0x20, 0x90, 0x05, 0x73, 0xE0, 0xFF, 0xEE,
+0x6F, 0x60, 0x17, 0x90, 0x88, 0x32, 0xB1, 0x23,
+0x30, 0xE0, 0x0F, 0xEF, 0x54, 0xBF, 0x12, 0x9F,
+0x81, 0x12, 0x7C, 0x3B, 0x12, 0x9F, 0xE9, 0x12,
+0x9F, 0x94, 0x51, 0xC8, 0x90, 0x88, 0x2C, 0xE0,
+0xC3, 0x13, 0x20, 0xE0, 0x02, 0x51, 0xC8, 0x22,
+0x90, 0x88, 0x32, 0xE0, 0x44, 0x04, 0xF0, 0x22,
+0x90, 0x88, 0x3C, 0xE0, 0xFF, 0xA3, 0xE0, 0x22,
+0x90, 0x88, 0x34, 0xE0, 0xFF, 0xC4, 0x54, 0x0F,
+0x22, 0x90, 0x88, 0x85, 0x12, 0x04, 0xB8, 0xC0,
+0x06, 0xC0, 0x07, 0x90, 0x95, 0x36, 0xE0, 0x24,
+0x46, 0xFF, 0x90, 0x95, 0x35, 0xE0, 0x34, 0x00,
+0xAB, 0x07, 0xFA, 0xE4, 0xF9, 0xF8, 0xD0, 0x07,
+0xD0, 0x06, 0x12, 0x85, 0xB6, 0x90, 0x88, 0x85,
+0x91, 0xEB, 0xEF, 0x24, 0x46, 0x12, 0xED, 0xD9,
+0x90, 0x88, 0x89, 0x91, 0xEB, 0x90, 0x88, 0x85,
+0x12, 0xEE, 0x2C, 0x50, 0x02, 0x61, 0xD2, 0x90,
+0x88, 0x89, 0x12, 0x86, 0x2D, 0x90, 0x88, 0x85,
+0x12, 0x04, 0xB8, 0x12, 0x85, 0xB6, 0x90, 0x95,
+0xF2, 0x12, 0x04, 0x31, 0x90, 0x88, 0x31, 0xE0,
+0x30, 0xE0, 0x2F, 0x90, 0x88, 0x53, 0xE0, 0x24,
+0x04, 0xFF, 0xE4, 0x33, 0xFE, 0xEF, 0x78, 0x03,
+0xC3, 0x33, 0xCE, 0x33, 0xCE, 0xD8, 0xF9, 0x24,
+0x50, 0xFF, 0xE4, 0x3E, 0xFE, 0x90, 0x88, 0x4E,
+0xE0, 0xFD, 0xC3, 0xEF, 0x9D, 0xFB, 0xEE, 0x94,
+0x00, 0xFA, 0x91, 0xF4, 0xEB, 0x2F, 0xFF, 0xEA,
+0x80, 0x1D, 0x90, 0x88, 0x33, 0xB1, 0x23, 0x30,
+0xE0, 0x02, 0x81, 0xD0, 0x91, 0xF4, 0x90, 0x88,
+0x4E, 0xE0, 0xFD, 0xC3, 0x74, 0x60, 0x9D, 0xCD,
+0xE4, 0x94, 0x00, 0xCD, 0x2F, 0xFF, 0xED, 0x3E,
+0x90, 0x95, 0xEE, 0xF0, 0xA3, 0xEF, 0xF0, 0xC3,
+0x90, 0x95, 0xEF, 0xE0, 0x94, 0xA0, 0x90, 0x95,
+0xEE, 0xE0, 0x94, 0x00, 0x50, 0x34, 0xA3, 0xE0,
+0xFB, 0x24, 0xF5, 0x91, 0xE3, 0xE0, 0x04, 0xF0,
+0x90, 0x95, 0xF2, 0x12, 0x04, 0xB8, 0xEF, 0x54,
+0x7F, 0xFF, 0x74, 0x95, 0x2B, 0x91, 0xD8, 0xE0,
+0xFE, 0xEF, 0xC3, 0x9E, 0x50, 0x09, 0x90, 0x95,
+0xEE, 0xA3, 0xE0, 0x91, 0xD6, 0xEF, 0xF0, 0x90,
+0x88, 0x4C, 0xE0, 0x04, 0xF0, 0xE0, 0x90, 0x00,
+0xFE, 0xF0, 0x90, 0x88, 0x4C, 0xE0, 0xFF, 0xD3,
+0x90, 0x88, 0x90, 0xE0, 0x9F, 0x90, 0x88, 0x8F,
+0xE0, 0x94, 0x00, 0x40, 0x02, 0x81, 0xD0, 0xE4,
+0xFF, 0xFE, 0x91, 0xE0, 0xE0, 0x2F, 0xFF, 0x90,
+0x88, 0x91, 0xE0, 0xFD, 0xEF, 0xD3, 0x9D, 0x40,
+0x07, 0x90, 0x95, 0xF0, 0xEE, 0xF0, 0x80, 0x05,
+0x0E, 0xEE, 0xB4, 0xA0, 0xE5, 0x91, 0xFF, 0x40,
+0x02, 0x80, 0x15, 0x90, 0x95, 0xF0, 0xE0, 0x04,
+0xFE, 0xEE, 0xC3, 0x94, 0xA0, 0x50, 0x13, 0x91,
+0xE0, 0xE0, 0x2F, 0xFF, 0x91, 0xFF, 0x40, 0x07,
+0x90, 0x95, 0xF1, 0xEE, 0xF0, 0x80, 0x03, 0x0E,
+0x80, 0xE7, 0x90, 0x05, 0x5E, 0xE0, 0xFF, 0x91,
+0xD1, 0xE0, 0xFD, 0xEF, 0xC3, 0x9D, 0x40, 0x11,
+0xEF, 0x9D, 0x90, 0x05, 0x5E, 0xF0, 0x90, 0x88,
+0x51, 0xEE, 0xF0, 0x90, 0x95, 0xF1, 0xE0, 0x80,
+0x18, 0x91, 0xD1, 0xE0, 0xFD, 0xC3, 0x74, 0x80,
+0x9D, 0x2F, 0x90, 0x05, 0x5E, 0xF0, 0xEE, 0x04,
+0x90, 0x88, 0x51, 0xF0, 0x90, 0x95, 0xF1, 0xE0,
+0x04, 0x90, 0x88, 0x52, 0xF0, 0x90, 0x88, 0x51,
+0xE0, 0xFF, 0xC3, 0x94, 0x50, 0x40, 0x0A, 0xEF,
+0x24, 0xB0, 0x90, 0x88, 0x49, 0xF0, 0xE4, 0x80,
+0x0E, 0xE4, 0x90, 0x88, 0x49, 0xF0, 0x90, 0x88,
+0x51, 0xE0, 0xFF, 0xC3, 0x74, 0x50, 0x9F, 0x90,
+0x88, 0x48, 0xF0, 0x90, 0x88, 0x51, 0xE0, 0xFF,
+0xA3, 0xE0, 0xC3, 0x9F, 0x90, 0x88, 0x4F, 0xF0,
+0x90, 0x88, 0x31, 0xE0, 0x90, 0x88, 0x8E, 0xE0,
+0x24, 0x08, 0xFF, 0x90, 0x88, 0x4F, 0xE0, 0x2F,
+0xF0, 0x90, 0x88, 0x4F, 0xE0, 0xC3, 0x94, 0x50,
+0x50, 0x03, 0x74, 0x50, 0xF0, 0x90, 0x88, 0x4F,
+0xE0, 0x24, 0x10, 0xF0, 0x12, 0xCD, 0x0C, 0x74,
+0x03, 0xF0, 0x12, 0x6E, 0x2F, 0x90, 0x8A, 0xA3,
+0x12, 0x90, 0x4B, 0xE4, 0xFF, 0x12, 0x04, 0x7E,
+0x22, 0x90, 0x95, 0xF0, 0xE0, 0xFE, 0x24, 0x95,
+0xF5, 0x82, 0xE4, 0x34, 0x94, 0xF5, 0x83, 0x22,
+0x74, 0xF5, 0x2E, 0xF5, 0x82, 0xE4, 0x34, 0x93,
+0xF5, 0x83, 0x22, 0x12, 0x04, 0x31, 0x90, 0x88,
+0x89, 0x02, 0x04, 0xB8, 0x90, 0x95, 0xF2, 0x12,
+0x04, 0xB8, 0x78, 0x07, 0x02, 0x03, 0xEB, 0x90,
+0x88, 0x91, 0xE0, 0xFD, 0xC3, 0x90, 0x88, 0x90,
+0xE0, 0x9D, 0xFD, 0x90, 0x88, 0x8F, 0xE0, 0x94,
+0x00, 0xFC, 0xEF, 0xD3, 0x9D, 0xE4, 0x9C, 0x22,
+0x90, 0x88, 0x31, 0xE0, 0x44, 0x04, 0xF0, 0x22,
+0x90, 0x88, 0x31, 0xE0, 0xFF, 0x13, 0x13, 0x54,
+0x3F, 0x22, 0xB1, 0x8C, 0x30, 0xE0, 0x0B, 0xEF,
+0xC4, 0x13, 0x13, 0x54, 0x03, 0x30, 0xE0, 0x02,
+0xB1, 0xB7, 0xB1, 0x20, 0x30, 0xE0, 0x09, 0xEF,
+0xB1, 0xC9, 0x54, 0x07, 0x70, 0x3D, 0x80, 0x39,
+0xD1, 0x24, 0x40, 0x35, 0x12, 0x9E, 0xA3, 0x70,
+0x32, 0x11, 0x94, 0x70, 0x08, 0x90, 0x8A, 0xF5,
+0x12, 0x8A, 0x66, 0x80, 0x27, 0x90, 0x8A, 0xF5,
+0x12, 0x8A, 0x66, 0x90, 0x88, 0x40, 0xE0, 0x04,
+0xF0, 0xE0, 0xD3, 0x94, 0x02, 0x40, 0x09, 0xB1,
+0x84, 0xE4, 0x90, 0x88, 0x40, 0xF0, 0x80, 0x03,
+0x12, 0x97, 0x4D, 0xE4, 0x90, 0x88, 0x3F, 0xF0,
+0x22, 0xB1, 0xF6, 0x22, 0x90, 0x88, 0x32, 0xE0,
+0x54, 0xFB, 0xF0, 0x22, 0x90, 0x88, 0x32, 0xE0,
+0xFF, 0x13, 0x13, 0x13, 0x54, 0x1F, 0x22, 0x90,
+0x01, 0x57, 0xE0, 0x60, 0x19, 0xB1, 0xC1, 0xF0,
+0xB1, 0x20, 0x30, 0xE0, 0x03, 0xEF, 0x80, 0x21,
+0xD1, 0x24, 0x40, 0x0A, 0xE4, 0xFF, 0x12, 0x78,
+0x4A, 0xBF, 0x01, 0x02, 0xB1, 0x84, 0x22, 0x7D,
+0x02, 0x7F, 0x02, 0x02, 0x7C, 0x7E, 0x90, 0x01,
+0x57, 0xE4, 0xF0, 0x90, 0x01, 0x3C, 0x74, 0x02,
+0x22, 0x54, 0xFB, 0xF0, 0x90, 0x88, 0x3A, 0xE0,
+0x54, 0xFD, 0xF0, 0x22, 0x12, 0x9E, 0xA3, 0x70,
+0x1C, 0x90, 0x88, 0x36, 0xE0, 0x60, 0x16, 0x90,
+0x88, 0x3A, 0xE0, 0x20, 0xE4, 0x0F, 0xB1, 0xBE,
+0xF0, 0x90, 0x88, 0x31, 0xE0, 0xB1, 0xC9, 0x54,
+0x07, 0x70, 0x02, 0xB1, 0xF6, 0x22, 0x90, 0x88,
+0x2C, 0xE0, 0x90, 0x88, 0x38, 0x30, 0xE0, 0x05,
+0xE0, 0xFF, 0x02, 0x9F, 0xA4, 0x12, 0x97, 0x3F,
+0x7D, 0x01, 0x02, 0x04, 0x7E, 0xE4, 0xFF, 0x12,
+0x78, 0x4A, 0xBF, 0x01, 0x0E, 0x90, 0x88, 0x36,
+0xE0, 0x60, 0x08, 0x31, 0x0E, 0x54, 0x07, 0x70,
+0x02, 0xB1, 0xF6, 0x22, 0x90, 0x88, 0x3F, 0xE0,
+0x04, 0xF0, 0x90, 0x88, 0x3A, 0xE0, 0x54, 0xEF,
+0xF0, 0x90, 0x88, 0x93, 0xE0, 0xFF, 0x90, 0x88,
+0x3F, 0xE0, 0xD3, 0x9F, 0x22, 0x90, 0x88, 0x36,
+0xE0, 0x60, 0x14, 0x90, 0x06, 0x92, 0xE0, 0x30,
+0xE1, 0x08, 0x90, 0x8B, 0x01, 0x12, 0x8A, 0x66,
+0x80, 0x05, 0x12, 0xEE, 0x52, 0xB1, 0xF6, 0x02,
+0x9A, 0x2E, 0xE4, 0xFE, 0x91, 0xE0, 0xE4, 0xF0,
+0x74, 0x95, 0x2E, 0x91, 0xD8, 0x74, 0xFF, 0xF0,
+0x0E, 0xEE, 0xB4, 0xA0, 0xEF, 0xE4, 0x90, 0x88,
+0x4D, 0xF0, 0x90, 0x88, 0x4C, 0xF0, 0x90, 0x88,
+0x50, 0xF0, 0xEF, 0xB4, 0x01, 0x07, 0xA3, 0x74,
+0xA0, 0xF0, 0xE4, 0xA3, 0xF0, 0x22, 0x90, 0x88,
+0x36, 0xE0, 0x64, 0x01, 0x70, 0x25, 0x11, 0x94,
+0x60, 0x12, 0x90, 0x8A, 0xB9, 0x12, 0x90, 0x4B,
+0x12, 0x97, 0xCD, 0x90, 0x8B, 0x01, 0x12, 0xD9,
+0x42, 0x02, 0x04, 0x7A, 0x90, 0x88, 0x39, 0xE0,
+0x70, 0x09, 0x90, 0x8A, 0xB9, 0x12, 0x90, 0x4B,
+0x12, 0x9E, 0x94, 0x22, 0x90, 0x88, 0x39, 0xE0,
+0xB4, 0x04, 0x02, 0xD1, 0xC7, 0x90, 0x88, 0x9D,
+0xE0, 0x20, 0xE0, 0x02, 0xD1, 0x86, 0x22, 0x90,
+0x00, 0x02, 0xE0, 0x44, 0x01, 0xF0, 0x22, 0x90,
+0x88, 0x36, 0xE0, 0x70, 0x07, 0x90, 0x88, 0x2C,
+0xE0, 0x30, 0xE0, 0x12, 0x90, 0x88, 0x2C, 0xE0,
+0x30, 0xE0, 0x09, 0x12, 0x9E, 0x67, 0xBF, 0x01,
+0x05, 0x02, 0xEA, 0x54, 0xD1, 0xB4, 0x22, 0xC0,
+0xE0, 0xC0, 0xF0, 0xC0, 0x83, 0xC0, 0x82, 0xC0,
+0xD0, 0x75, 0xD0, 0x00, 0xC0, 0x00, 0xC0, 0x01,
+0xC0, 0x02, 0xC0, 0x03, 0xC0, 0x04, 0xC0, 0x05,
+0xC0, 0x06, 0xC0, 0x07, 0x90, 0x01, 0xC4, 0x74,
+0xEF, 0xF0, 0x74, 0xB6, 0xA3, 0xF0, 0x12, 0x64,
+0x7F, 0xE5, 0x30, 0x30, 0xE1, 0x02, 0xD1, 0xCF,
+0xE5, 0x2D, 0x30, 0xE1, 0x03, 0x12, 0xAF, 0x6B,
+0xE5, 0x2D, 0x30, 0xE3, 0x03, 0x12, 0xE4, 0x9D,
+0xE5, 0x2D, 0x30, 0xE4, 0x03, 0x12, 0xE4, 0xB5,
+0xE5, 0x2D, 0x30, 0xE5, 0x03, 0x12, 0xE4, 0xC6,
+0xE5, 0x2D, 0x30, 0xE6, 0x03, 0x12, 0xD8, 0x7B,
+0xE5, 0x2F, 0x30, 0xE0, 0x03, 0x12, 0x9D, 0xEA,
+0xE5, 0x2F, 0x30, 0xE1, 0x03, 0x12, 0xCB, 0xF1,
+0xE5, 0x2F, 0x30, 0xE2, 0x03, 0x12, 0xD8, 0x88,
+0xE5, 0x2F, 0x30, 0xE3, 0x03, 0x12, 0x9E, 0xAC,
+0xE5, 0x2F, 0x30, 0xE4, 0x02, 0xB1, 0xD4, 0xE5,
+0x2F, 0x30, 0xE5, 0x03, 0x12, 0xD9, 0x0D, 0xE5,
+0x2F, 0x30, 0xE6, 0x02, 0xD1, 0x0D, 0xE5, 0x30,
+0x30, 0xE4, 0x02, 0xF1, 0xE3, 0xE5, 0x30, 0x30,
+0xE5, 0x03, 0x12, 0xD9, 0x4A, 0xE5, 0x36, 0x30,
+0xE3, 0x03, 0x12, 0xAF, 0x69, 0xE5, 0x36, 0x30,
+0xE0, 0x03, 0x12, 0xA3, 0x86, 0xE5, 0x36, 0x30,
+0xE6, 0x03, 0x12, 0xA3, 0x05, 0xE5, 0x36, 0x30,
+0xE7, 0x03, 0x12, 0xA7, 0xA3, 0xE5, 0x37, 0x30,
+0xE2, 0x03, 0x12, 0xA7, 0xAF, 0xE5, 0x37, 0x30,
+0xE3, 0x03, 0x12, 0xA7, 0xBB, 0x74, 0xEF, 0x04,
+0x90, 0x01, 0xC4, 0xF0, 0x74, 0xB6, 0xA3, 0xF0,
+0xD0, 0x07, 0xD0, 0x06, 0xD0, 0x05, 0xD0, 0x04,
+0xD0, 0x03, 0xD0, 0x02, 0xD0, 0x01, 0xD0, 0x00,
+0xD0, 0xD0, 0xD0, 0x82, 0xD0, 0x83, 0xD0, 0xF0,
+0xD0, 0xE0, 0x32, 0xE4, 0xFF, 0xD3, 0x10, 0xAF,
+0x01, 0xC3, 0xC0, 0xD0, 0x90, 0x96, 0xE8, 0xEF,
+0xF0, 0x90, 0x88, 0x2B, 0xE0, 0x90, 0x96, 0xFA,
+0xF0, 0xE4, 0x90, 0x96, 0xE9, 0xF0, 0x90, 0x96,
+0xFA, 0xE0, 0xFE, 0x90, 0x96, 0xE9, 0xE0, 0xFF,
+0xC3, 0x9E, 0x50, 0x2B, 0xE0, 0xFE, 0x31, 0x05,
+0xE4, 0xF0, 0xEE, 0x31, 0x91, 0xE0, 0x30, 0xE7,
+0x0A, 0x75, 0xF0, 0x12, 0xEF, 0x31, 0x0F, 0xE4,
+0xF0, 0x80, 0x0C, 0x12, 0x7C, 0x8F, 0x90, 0x96,
+0xE9, 0xE0, 0x31, 0x05, 0x74, 0x01, 0xF0, 0x90,
+0x96, 0xE9, 0xE0, 0x04, 0xF0, 0x80, 0xC7, 0x7F,
+0x0C, 0x7E, 0x00, 0x12, 0x7C, 0x6A, 0xE4, 0x90,
+0x96, 0xE9, 0xF0, 0x90, 0x96, 0xFA, 0xE0, 0xFF,
+0x90, 0x96, 0xE9, 0xE0, 0xFE, 0xC3, 0x9F, 0x40,
+0x02, 0x21, 0x00, 0x74, 0xEA, 0x2E, 0x31, 0x07,
+0xE0, 0x70, 0x02, 0x01, 0xF8, 0xEE, 0xC4, 0x54,
+0xF0, 0x24, 0x06, 0xF5, 0x82, 0xE4, 0x34, 0x81,
+0xF5, 0x83, 0xE0, 0xFD, 0xEE, 0xC4, 0x54, 0xF0,
+0x24, 0x07, 0xF5, 0x82, 0xE4, 0x34, 0x81, 0xF5,
+0x83, 0x31, 0x15, 0xFC, 0x75, 0xF0, 0x12, 0x90,
+0x89, 0x53, 0x31, 0x1E, 0xEC, 0xC4, 0x54, 0xF0,
+0x24, 0x0A, 0xF5, 0x82, 0xE4, 0x34, 0x81, 0xF5,
+0x83, 0xE0, 0xFD, 0xEC, 0x31, 0x27, 0x31, 0x15,
+0x75, 0xF0, 0x12, 0x90, 0x89, 0x57, 0x31, 0x1E,
+0x7F, 0x01, 0x90, 0x96, 0xE9, 0xE0, 0xFE, 0x31,
+0x27, 0xE5, 0x82, 0x2F, 0x12, 0xAE, 0x52, 0xE0,
+0xFD, 0x75, 0xF0, 0x12, 0xEE, 0x90, 0x89, 0x57,
+0x12, 0x04, 0x6E, 0x75, 0xF0, 0x02, 0xEF, 0x31,
+0x34, 0xED, 0xF0, 0x0F, 0xEF, 0xB4, 0x05, 0xDA,
+0x90, 0x96, 0xE9, 0xE0, 0xFF, 0xC4, 0x54, 0xF0,
+0x24, 0x09, 0xF5, 0x82, 0xE4, 0x34, 0x81, 0xF5,
+0x83, 0xE0, 0xFE, 0xF1, 0x7D, 0xEE, 0xF0, 0x90,
+0x96, 0xE9, 0xE0, 0xFF, 0x90, 0x96, 0xE8, 0xE0,
+0xFD, 0x12, 0x61, 0xF7, 0x90, 0x96, 0xE9, 0xE0,
+0x75, 0xF0, 0x12, 0x31, 0x0F, 0x74, 0x01, 0xF0,
+0x90, 0x96, 0xE9, 0xE0, 0x04, 0xF0, 0x01, 0x43,
+0xD0, 0xD0, 0x92, 0xAF, 0x22, 0x24, 0xEA, 0xF5,
+0x82, 0xE4, 0x34, 0x96, 0xF5, 0x83, 0x22, 0x90,
+0x89, 0x56, 0x02, 0x04, 0x6E, 0xE0, 0xFE, 0xED,
+0xFF, 0x90, 0x96, 0xE9, 0xE0, 0x22, 0x12, 0x04,
+0x6E, 0xEE, 0xF0, 0xA3, 0xEF, 0xF0, 0x22, 0xC4,
+0x54, 0xF0, 0x24, 0x0B, 0xF5, 0x82, 0xE4, 0x34,
+0x81, 0xF5, 0x83, 0x22, 0x12, 0x04, 0x6E, 0xE4,
+0xF0, 0xA3, 0x22, 0x7D, 0x07, 0xAF, 0x67, 0xED,
+0x30, 0xE0, 0x1E, 0x75, 0xF0, 0x12, 0xEF, 0x90,
+0x89, 0x57, 0x31, 0x84, 0x90, 0x89, 0x59, 0x31,
+0x84, 0x90, 0x89, 0x5B, 0x31, 0x84, 0x90, 0x89,
+0x5D, 0x31, 0x84, 0x90, 0x89, 0x5F, 0x31, 0x34,
+0xF0, 0xED, 0x30, 0xE1, 0x0A, 0x75, 0xF0, 0x12,
+0xEF, 0x90, 0x89, 0x53, 0x31, 0x34, 0xF0, 0xED,
+0x30, 0xE2, 0x04, 0xF1, 0x7D, 0xE4, 0xF0, 0x31,
+0x90, 0xE0, 0x54, 0xBF, 0x44, 0x80, 0xFE, 0x31,
+0x90, 0xEE, 0xF0, 0x22, 0x12, 0x04, 0x6E, 0xE4,
+0xF0, 0xA3, 0xF0, 0x75, 0xF0, 0x12, 0xEF, 0x22,
+0xEF, 0xC4, 0x54, 0xF0, 0x24, 0x03, 0xF5, 0x82,
+0xE4, 0x34, 0x81, 0xF5, 0x83, 0x22, 0x8F, 0x75,
+0x8D, 0x76, 0xEF, 0xB1, 0x5A, 0xE0, 0xFD, 0x54,
+0x7F, 0xF5, 0x77, 0xED, 0x54, 0x80, 0xF5, 0x78,
+0xF1, 0x58, 0xF5, 0x7A, 0x75, 0xF0, 0x12, 0xEF,
+0x51, 0x9A, 0xC4, 0x54, 0x03, 0xF5, 0x7B, 0x51,
+0x89, 0x74, 0xFF, 0xF0, 0x51, 0x56, 0xE5, 0x78,
+0x4D, 0xFF, 0x51, 0x7D, 0xEF, 0xF0, 0xE5, 0x75,
+0x12, 0x97, 0xB1, 0xE0, 0x54, 0x03, 0xF5, 0x79,
+0x74, 0x46, 0x25, 0x75, 0xF1, 0x50, 0xE5, 0x79,
+0xF0, 0xE5, 0x77, 0x65, 0x7A, 0x70, 0x21, 0x75,
+0xF0, 0x12, 0xE5, 0x75, 0xB1, 0x3D, 0xC4, 0x13,
+0x54, 0x07, 0x30, 0xE0, 0x0B, 0xE5, 0x78, 0x70,
+0x07, 0xE5, 0x77, 0x44, 0x80, 0xFD, 0x80, 0x49,
+0x51, 0x56, 0x7D, 0x07, 0xAF, 0x75, 0x21, 0x3F,
+0xE5, 0x77, 0xC3, 0x95, 0x7A, 0x50, 0x34, 0xAB,
+0x75, 0xAD, 0x7A, 0xAF, 0x77, 0x12, 0x72, 0x7F,
+0xAD, 0x07, 0xE5, 0x77, 0xC3, 0x94, 0x0C, 0x40,
+0x28, 0x75, 0xF0, 0x12, 0xE5, 0x75, 0xB1, 0x3D,
+0xFE, 0xC4, 0x13, 0x54, 0x07, 0x30, 0xE0, 0x19,
+0xE5, 0x76, 0x60, 0x15, 0xE5, 0x78, 0x70, 0x11,
+0xE5, 0x77, 0x44, 0x80, 0xFD, 0x51, 0x89, 0xEF,
+0xF0, 0x80, 0x06, 0x51, 0x7D, 0xE5, 0x7A, 0xF0,
+0xFD, 0x90, 0x92, 0x80, 0xE5, 0x79, 0xF0, 0xAB,
+0x76, 0xAF, 0x75, 0x02, 0x75, 0x80, 0xE5, 0x77,
+0x25, 0xE0, 0x24, 0x75, 0xF5, 0x82, 0xE4, 0x34,
+0x81, 0xF5, 0x83, 0xE4, 0x93, 0xFE, 0x74, 0x01,
+0x93, 0xFF, 0xE5, 0x75, 0x25, 0xE0, 0x24, 0x75,
+0xF5, 0x82, 0xE4, 0x34, 0x8D, 0xF5, 0x83, 0xEE,
+0xF0, 0xA3, 0xEF, 0xF0, 0x22, 0x74, 0xC6, 0x25,
+0x75, 0xF5, 0x82, 0xE4, 0x34, 0x8E, 0xF5, 0x83,
+0x22, 0x74, 0x64, 0x25, 0x75, 0xF5, 0x82, 0xE4,
+0x34, 0x96, 0xF5, 0x83, 0x22, 0xFF, 0x75, 0xF0,
+0x12, 0xED, 0x90, 0x89, 0x52, 0x12, 0x04, 0x6E,
+0xE0, 0x22, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0,
+0xD0, 0x7F, 0x8F, 0x12, 0x7B, 0x41, 0xEF, 0x20,
+0xE6, 0x02, 0x61, 0xCA, 0x90, 0x00, 0x8C, 0xE0,
+0x90, 0x97, 0x5B, 0xF0, 0x7F, 0x8D, 0x12, 0x7B,
+0x41, 0x90, 0x97, 0x5C, 0xEF, 0xF0, 0x90, 0x00,
+0x8E, 0xE0, 0x90, 0x97, 0x5D, 0xF0, 0x90, 0x97,
+0x5C, 0xE0, 0x24, 0xFC, 0x60, 0x0F, 0x24, 0x03,
+0x60, 0x02, 0x61, 0xBA, 0x90, 0x97, 0x5B, 0xE0,
+0xFF, 0xD1, 0x4C, 0x61, 0xBA, 0x90, 0x97, 0x5B,
+0xE0, 0x24, 0xD6, 0x12, 0xE3, 0xF4, 0xFB, 0xE4,
+0xFD, 0xFF, 0x71, 0xFC, 0x75, 0xF0, 0x12, 0x51,
+0x9A, 0x13, 0x13, 0x54, 0x03, 0xFB, 0x0D, 0xE4,
+0xFF, 0x71, 0xFC, 0x75, 0xF0, 0x12, 0x90, 0x89,
+0x52, 0x12, 0x04, 0x6E, 0x12, 0x97, 0x34, 0xFB,
+0x0D, 0xE4, 0xFF, 0x71, 0xFC, 0x75, 0xF0, 0x12,
+0x51, 0x9A, 0xC4, 0x54, 0x03, 0xFB, 0x0D, 0xE4,
+0xFF, 0x71, 0xFC, 0x75, 0xF0, 0x12, 0xF1, 0x5C,
+0xFB, 0xE4, 0xFD, 0x0F, 0x71, 0xFC, 0xF1, 0x74,
+0x71, 0xF9, 0x75, 0xF0, 0x12, 0xB1, 0x3D, 0xC4,
+0x13, 0x54, 0x01, 0xFB, 0x0D, 0x7F, 0x01, 0x71,
+0xFC, 0x75, 0xF0, 0x12, 0xB1, 0x3D, 0x54, 0x1F,
+0x71, 0xFA, 0xF1, 0x87, 0xE0, 0xFB, 0xE4, 0xFD,
+0x0F, 0x71, 0xFC, 0x75, 0xF0, 0x08, 0xA4, 0x24,
+0x01, 0xF5, 0x82, 0xE4, 0x34, 0x82, 0x71, 0xF7,
+0x75, 0xF0, 0x08, 0xA4, 0x24, 0x02, 0xF5, 0x82,
+0xE4, 0x34, 0x82, 0x71, 0xF7, 0x75, 0xF0, 0x08,
+0xA4, 0x24, 0x03, 0xF5, 0x82, 0xE4, 0x34, 0x82,
+0x71, 0xF7, 0x75, 0xF0, 0x08, 0xA4, 0x24, 0x04,
+0xF5, 0x82, 0xE4, 0x34, 0x82, 0xF5, 0x83, 0xE0,
+0xFB, 0xE4, 0xFD, 0x0F, 0x71, 0xFC, 0x75, 0xF0,
+0x08, 0xA4, 0x24, 0x05, 0xF5, 0x82, 0xE4, 0x34,
+0x82, 0x71, 0xF7, 0x75, 0xF0, 0x08, 0xA4, 0x24,
+0x06, 0xF5, 0x82, 0xE4, 0x34, 0x82, 0x71, 0xF7,
+0x75, 0xF0, 0x08, 0xA4, 0x24, 0x07, 0xF5, 0x82,
+0xE4, 0x34, 0x82, 0xF5, 0x83, 0xE0, 0xFB, 0x0D,
+0x71, 0xCF, 0x7F, 0x8F, 0x12, 0x7B, 0x41, 0xEF,
+0x30, 0xE0, 0x07, 0xE4, 0xFD, 0x7F, 0x8D, 0x12,
+0x7B, 0x2E, 0xD0, 0xD0, 0x92, 0xAF, 0x22, 0xEF,
+0x70, 0x04, 0x74, 0xF0, 0x80, 0x16, 0xEF, 0xB4,
+0x01, 0x04, 0x74, 0xF4, 0x80, 0x0E, 0xEF, 0xB4,
+0x02, 0x04, 0x74, 0xF8, 0x80, 0x06, 0xEF, 0xB4,
+0x03, 0x0C, 0x74, 0xFC, 0x2D, 0xF5, 0x82, 0xE4,
+0x34, 0x02, 0xF5, 0x83, 0xEB, 0xF0, 0x22, 0xF5,
+0x83, 0xE0, 0xFB, 0x0D, 0x71, 0xCF, 0x90, 0x97,
+0x5B, 0xE0, 0x22, 0x90, 0x97, 0x2C, 0x12, 0xA7,
+0x51, 0x54, 0x7F, 0xFD, 0x12, 0x87, 0x6A, 0x54,
+0x1F, 0xB1, 0x38, 0x54, 0xE0, 0x4F, 0x12, 0x87,
+0x69, 0xFE, 0x54, 0x60, 0xC4, 0x13, 0x54, 0x07,
+0x90, 0x97, 0x2F, 0xF0, 0xEE, 0x54, 0x80, 0x12,
+0x97, 0x35, 0xC4, 0x33, 0x54, 0xE0, 0xB1, 0x38,
+0x54, 0xDF, 0x12, 0x87, 0x95, 0xFE, 0x54, 0x03,
+0xFC, 0xEE, 0x54, 0x30, 0xC4, 0x54, 0x03, 0xC4,
+0x54, 0xF0, 0x51, 0x95, 0x54, 0xCF, 0x12, 0x87,
+0x95, 0x54, 0x40, 0xC4, 0x13, 0x13, 0xF1, 0x64,
+0x51, 0x95, 0x54, 0xBF, 0x12, 0x87, 0x95, 0x54,
+0x80, 0x12, 0x97, 0x35, 0xC4, 0x33, 0x33, 0x33,
+0x54, 0x80, 0x51, 0x95, 0x54, 0x7F, 0x12, 0x87,
+0x95, 0xFE, 0x54, 0x08, 0x13, 0x13, 0x13, 0x54,
+0x1F, 0x90, 0x97, 0x31, 0xF0, 0xFB, 0xEE, 0x54,
+0x04, 0x13, 0x13, 0x54, 0x3F, 0xA3, 0xF0, 0xEC,
+0x54, 0x03, 0x51, 0x95, 0x54, 0xFC, 0x4F, 0xF0,
+0xEB, 0x70, 0x0D, 0xEC, 0x54, 0x03, 0x25, 0xE0,
+0x25, 0xE0, 0x51, 0x95, 0x54, 0xF3, 0x4F, 0xF0,
+0xB1, 0x45, 0xF5, 0x83, 0xE0, 0x54, 0xFB, 0xF0,
+0xB1, 0x45, 0xF5, 0x83, 0xC0, 0x83, 0xC0, 0x82,
+0xE0, 0xFF, 0x90, 0x97, 0x32, 0xE0, 0x12, 0xEE,
+0x42, 0xD0, 0x82, 0xD0, 0x83, 0xF0, 0x90, 0x93,
+0xED, 0xE0, 0x60, 0x3B, 0x90, 0x97, 0x2C, 0x12,
+0x86, 0x39, 0xE9, 0x24, 0x03, 0xF9, 0xE4, 0x3A,
+0xFA, 0x12, 0x02, 0x06, 0x54, 0x1F, 0x12, 0x02,
+0x4C, 0x90, 0x97, 0x30, 0x74, 0x01, 0xF0, 0x90,
+0x97, 0x30, 0xE0, 0xFF, 0xC3, 0x94, 0x04, 0x50,
+0x16, 0xEF, 0xB1, 0x4E, 0x12, 0x86, 0x39, 0x8F,
+0x82, 0x8E, 0x83, 0xE4, 0x12, 0x02, 0x5E, 0x90,
+0x97, 0x30, 0xE0, 0x04, 0xF0, 0x80, 0xE0, 0x90,
+0x93, 0xEB, 0xE0, 0x54, 0x07, 0xFF, 0xBF, 0x05,
+0x0A, 0xEC, 0xB4, 0x01, 0x06, 0x90, 0x93, 0xF0,
+0x74, 0x01, 0xF0, 0xE4, 0x90, 0x97, 0x30, 0xF0,
+0x90, 0x97, 0x30, 0xE0, 0xFC, 0xB1, 0x4E, 0x12,
+0xA5, 0xB5, 0xFF, 0xED, 0xF1, 0x87, 0x12, 0xAE,
+0x4F, 0xEF, 0xF0, 0x90, 0x97, 0x30, 0xE0, 0x04,
+0xF0, 0xE0, 0xB4, 0x04, 0xE3, 0xAF, 0x05, 0x90,
+0x8A, 0xFF, 0x12, 0xC4, 0x37, 0x02, 0x04, 0x7E,
+0xFF, 0x75, 0xF0, 0x12, 0xED, 0x90, 0x89, 0x51,
+0x12, 0x04, 0x6E, 0xE0, 0x22, 0x74, 0xC6, 0x2D,
+0xF5, 0x82, 0xE4, 0x34, 0x8D, 0x22, 0x24, 0x03,
+0xFF, 0xE4, 0x33, 0xFE, 0x90, 0x97, 0x2C, 0x22,
+0xE5, 0x67, 0xC4, 0x54, 0xF0, 0x24, 0x00, 0xF5,
+0x82, 0xE4, 0x34, 0x81, 0xF5, 0x83, 0x22, 0x8D,
+0x0E, 0xEF, 0x30, 0xE6, 0x1A, 0xE5, 0x0E, 0xB1,
+0x5A, 0xE0, 0xFD, 0xE5, 0x0E, 0x12, 0x97, 0xB1,
+0xD1, 0x44, 0xE4, 0xFB, 0xAF, 0x0E, 0x12, 0x75,
+0x80, 0xD1, 0x38, 0xE4, 0xF0, 0x80, 0x4E, 0xD1,
+0x38, 0xE0, 0x04, 0xF0, 0xD1, 0x38, 0xE0, 0x64,
+0x02, 0x70, 0x15, 0x74, 0x64, 0x25, 0x0E, 0x51,
+0x8D, 0xE0, 0xFD, 0xF4, 0x60, 0x02, 0x80, 0x27,
+0xE5, 0x0E, 0xB1, 0x5A, 0xE0, 0xFD, 0x80, 0x1F,
+0xD1, 0x38, 0xE0, 0xD3, 0x94, 0x03, 0x40, 0x11,
+0x90, 0x8A, 0xB3, 0x12, 0x90, 0x4B, 0xAF, 0x0E,
+0x12, 0x04, 0x7E, 0xD1, 0x38, 0xE4, 0xF0, 0x80,
+0x14, 0xE5, 0x0E, 0xB1, 0x5A, 0xE0, 0xFD, 0xE5,
+0x0E, 0x12, 0x97, 0xB1, 0xD1, 0x44, 0x7B, 0x01,
+0xAF, 0x0E, 0x12, 0x75, 0x80, 0xE5, 0x0E, 0xB1,
+0x5A, 0xE0, 0xFD, 0x90, 0x96, 0x7C, 0x74, 0x05,
+0xF0, 0xE4, 0xFB, 0xAF, 0x0E, 0xD3, 0x10, 0xAF,
+0x01, 0xC3, 0xC0, 0xD0, 0x90, 0x96, 0x7F, 0xED,
+0xF0, 0xA3, 0xEF, 0xF0, 0xA3, 0xEB, 0xF0, 0x90,
+0x96, 0x7C, 0xE0, 0x90, 0x96, 0x82, 0xF0, 0xE4,
+0xA3, 0xF0, 0xEF, 0xF1, 0x6C, 0x34, 0x8D, 0xF5,
+0x83, 0xA3, 0xE0, 0x90, 0x96, 0x84, 0xF0, 0x74,
+0x46, 0x2F, 0xF1, 0x50, 0xE0, 0x90, 0x96, 0x85,
+0xF0, 0x90, 0x96, 0x7D, 0x74, 0x0C, 0xF0, 0x90,
+0x96, 0x9F, 0x74, 0x07, 0xF0, 0x7B, 0x01, 0x7A,
+0x96, 0x79, 0x7D, 0x12, 0x90, 0x39, 0x7F, 0x04,
+0x12, 0x04, 0x7E, 0xD0, 0xD0, 0x92, 0xAF, 0x22,
+0x74, 0xB6, 0x25, 0x0E, 0xF5, 0x82, 0xE4, 0x34,
+0x8E, 0xF5, 0x83, 0x22, 0xE0, 0x54, 0x03, 0x90,
+0x92, 0x80, 0xF0, 0x22, 0xD3, 0x10, 0xAF, 0x01,
+0xC3, 0xC0, 0xD0, 0x90, 0x97, 0x66, 0xEF, 0xF0,
+0x90, 0x00, 0x8F, 0xE0, 0x30, 0xE6, 0x3B, 0x90,
+0x00, 0x8D, 0xE0, 0x64, 0x01, 0x70, 0x33, 0x90,
+0x97, 0x67, 0xF0, 0x90, 0x97, 0x67, 0xE0, 0xFD,
+0x90, 0x97, 0x66, 0xE0, 0xB1, 0x5A, 0xE5, 0x82,
+0x2D, 0x12, 0xAE, 0x52, 0xE0, 0xFB, 0xE4, 0xFF,
+0x71, 0xCF, 0x90, 0x97, 0x67, 0xE0, 0x04, 0xF0,
+0xE0, 0xC3, 0x94, 0x10, 0x40, 0xDD, 0x90, 0x00,
+0x8F, 0xE0, 0x30, 0xE0, 0x05, 0x90, 0x00, 0x8D,
+0xE4, 0xF0, 0xD0, 0xD0, 0x92, 0xAF, 0x22, 0xAA,
+0x07, 0xA9, 0x05, 0xEA, 0xB1, 0x5A, 0xE0, 0xF5,
+0x75, 0x54, 0x7F, 0xF5, 0x77, 0x75, 0xF0, 0x12,
+0xEA, 0xF1, 0x77, 0xE0, 0x90, 0x95, 0xE6, 0xF0,
+0x75, 0xF0, 0x12, 0xEA, 0xF1, 0x5C, 0xFF, 0xEA,
+0x12, 0x97, 0xB1, 0xE0, 0x54, 0x03, 0xF5, 0x76,
+0xE5, 0x77, 0x90, 0x81, 0x9D, 0x93, 0xFD, 0xEA,
+0xF1, 0x6C, 0x34, 0x8D, 0xF5, 0x83, 0xE4, 0xF0,
+0xA3, 0xED, 0xF0, 0x75, 0xF0, 0x12, 0xEA, 0x51,
+0x9A, 0xFE, 0xC4, 0x54, 0x03, 0x90, 0x95, 0xE5,
+0xF0, 0x74, 0xC6, 0x2A, 0x51, 0x81, 0xE5, 0x77,
+0xF0, 0x74, 0x46, 0x2A, 0xF1, 0x50, 0xE5, 0x76,
+0xF0, 0xE5, 0x77, 0xD3, 0x9F, 0x40, 0x04, 0x8F,
+0x77, 0x8F, 0x75, 0x89, 0x78, 0xE4, 0xFF, 0xEF,
+0xC3, 0x95, 0x78, 0x50, 0x34, 0xE5, 0x75, 0x30,
+0xE7, 0x09, 0x85, 0x77, 0x75, 0x19, 0xE9, 0x70,
+0x25, 0x80, 0x26, 0x90, 0x95, 0xE6, 0xE0, 0xFD,
+0xE5, 0x77, 0xD3, 0x9D, 0x40, 0x10, 0xAB, 0x02,
+0x90, 0x95, 0xEA, 0xE9, 0xF0, 0xAF, 0x77, 0x12,
+0xDC, 0x8A, 0x8F, 0x75, 0x80, 0x0B, 0x90, 0x95,
+0xE6, 0xE0, 0xF5, 0x75, 0x80, 0x03, 0x0F, 0x80,
+0xC6, 0xAF, 0x02, 0x90, 0x92, 0x80, 0xE5, 0x76,
+0xF0, 0xE4, 0xFB, 0xAD, 0x75, 0x02, 0x75, 0x80,
+0xF5, 0x82, 0xE4, 0x34, 0x8E, 0xF5, 0x83, 0x22,
+0x75, 0xF0, 0x12, 0xEF, 0x90, 0x89, 0x4F, 0x12,
+0x04, 0x6E, 0xE0, 0x22, 0x54, 0x01, 0xC4, 0x33,
+0x33, 0x54, 0xC0, 0x22, 0x25, 0xE0, 0x24, 0x75,
+0xF5, 0x82, 0xE4, 0x22, 0x75, 0xF0, 0x12, 0x90,
+0x89, 0x50, 0x02, 0x04, 0x6E, 0x75, 0xF0, 0x12,
+0xEF, 0x90, 0x89, 0x55, 0x02, 0x04, 0x6E, 0x75,
+0xF0, 0x08, 0xA4, 0x24, 0x00, 0xF5, 0x82, 0xE4,
+0x34, 0x82, 0xF5, 0x83, 0x22, 0x12, 0x02, 0x06,
+0xFE, 0x12, 0x87, 0x97, 0xFF, 0x74, 0xD6, 0x2E,
+0xF5, 0x82, 0xE4, 0x34, 0x8D, 0x12, 0x87, 0xFA,
+0xFF, 0xF1, 0xD7, 0x12, 0x87, 0xF0, 0xFF, 0x74,
+0x53, 0x2E, 0x12, 0xE4, 0x54, 0xEF, 0xF0, 0xF1,
+0xD7, 0xF5, 0x83, 0xE0, 0x30, 0xE5, 0x17, 0x75,
+0xF0, 0x12, 0xEE, 0x51, 0x9A, 0x13, 0x13, 0x54,
+0x03, 0xFB, 0xAF, 0x06, 0x74, 0xD6, 0x2E, 0x12,
+0xE3, 0xF4, 0xFD, 0x12, 0x6B, 0xFD, 0x22, 0x74,
+0xC6, 0x2E, 0xF5, 0x82, 0xE4, 0x34, 0x8D, 0x22,
+0x41, 0xA2, 0x12, 0x04, 0x7E, 0x90, 0x88, 0x9B,
+0xE0, 0x22, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+0x00, 0x00, 0x00, 0x00, 0x12, 0x02, 0x06, 0x90,
+0x88, 0x9C, 0xF0, 0x60, 0x35, 0xA3, 0xE0, 0x20,
+0xE0, 0x30, 0x90, 0x8A, 0xB9, 0x12, 0x90, 0x4B,
+0xE4, 0xFD, 0x7F, 0x04, 0x12, 0xBF, 0xE2, 0xFF,
+0xC3, 0x13, 0x30, 0xE0, 0x1D, 0xEF, 0x13, 0x13,
+0x13, 0x54, 0x1F, 0x20, 0xE0, 0x14, 0x90, 0x88,
+0x9B, 0xE0, 0x13, 0x13, 0x54, 0x3F, 0x30, 0xE0,
+0x04, 0x7F, 0x0D, 0x80, 0x02, 0x7F, 0x09, 0x12,
+0x71, 0x9A, 0x22, 0x11, 0x64, 0x90, 0x93, 0x3B,
+0xD1, 0x26, 0x12, 0x87, 0x69, 0x90, 0x93, 0x3C,
+0x12, 0x87, 0x96, 0x90, 0x93, 0x3D, 0xF0, 0x12,
+0xEE, 0x0D, 0x90, 0x93, 0x3B, 0xE0, 0x54, 0x01,
+0xFF, 0x02, 0x9F, 0x3F, 0x12, 0x02, 0x06, 0xFF,
+0x54, 0x01, 0xFE, 0x22, 0xD3, 0x10, 0xAF, 0x01,
+0xC3, 0xC0, 0xD0, 0x90, 0x95, 0x54, 0x12, 0x86,
+0x42, 0x12, 0x87, 0xEB, 0x11, 0x64, 0x90, 0x88,
+0x9D, 0xD1, 0x26, 0xF0, 0xFC, 0x12, 0x02, 0x06,
+0xFD, 0x54, 0x04, 0x13, 0x13, 0x54, 0x3F, 0xFF,
+0x90, 0x95, 0x38, 0xE0, 0x54, 0xFE, 0x4F, 0xF0,
+0xED, 0x54, 0x08, 0xFF, 0xEC, 0x54, 0xF7, 0x4F,
+0xFF, 0x90, 0x88, 0x9D, 0xF0, 0x12, 0x02, 0x06,
+0xFE, 0x54, 0x10, 0xFD, 0xEF, 0x54, 0xEF, 0x71,
+0x32, 0x54, 0x20, 0xFE, 0xEF, 0x54, 0xDF, 0x4E,
+0xFF, 0xF0, 0x12, 0x02, 0x06, 0xFE, 0x54, 0x40,
+0xFD, 0xEF, 0x54, 0xBF, 0x71, 0x32, 0x54, 0x80,
+0xFE, 0xEF, 0x54, 0x7F, 0x4E, 0x12, 0x87, 0xEA,
+0xE9, 0x24, 0x01, 0xF9, 0xE4, 0x3A, 0x8B, 0x45,
+0x12, 0xA7, 0x5E, 0x7B, 0x01, 0x7A, 0x88, 0x79,
+0x9E, 0x12, 0x69, 0xF5, 0x12, 0x87, 0xEB, 0x12,
+0x87, 0x97, 0xFF, 0x54, 0x03, 0x90, 0x88, 0x9F,
+0xF0, 0xEF, 0x54, 0x04, 0x13, 0x13, 0x54, 0x01,
+0x25, 0xE0, 0x25, 0xE0, 0xFF, 0x90, 0x95, 0x44,
+0xE0, 0x54, 0xFB, 0x4F, 0xFF, 0x12, 0x87, 0x96,
+0xFE, 0x54, 0x08, 0x13, 0x13, 0x13, 0x54, 0x01,
+0xC4, 0x33, 0x33, 0x33, 0x54, 0x80, 0xFD, 0xEF,
+0x54, 0x7F, 0x4D, 0x90, 0x95, 0x44, 0xF0, 0x12,
+0x87, 0xEB, 0x12, 0x02, 0x06, 0x20, 0xE0, 0x02,
+0x41, 0x7A, 0x90, 0x05, 0x54, 0xE0, 0x90, 0x88,
+0xAE, 0xF0, 0xE0, 0xC3, 0x13, 0x90, 0x88, 0xAD,
+0xF0, 0x90, 0x88, 0xA0, 0xE0, 0xC4, 0x54, 0x0F,
+0x30, 0xE0, 0x0F, 0x12, 0x87, 0x6A, 0x90, 0x88,
+0x9E, 0x71, 0x2A, 0x90, 0x88, 0x9F, 0xEE, 0xF0,
+0x80, 0x25, 0x12, 0x87, 0x6A, 0xFF, 0xC3, 0x94,
+0x2A, 0x50, 0x15, 0xEF, 0xC3, 0x94, 0x03, 0x50,
+0x07, 0x90, 0x88, 0x9E, 0x74, 0x03, 0x80, 0x0D,
+0x12, 0x87, 0x6A, 0x90, 0x88, 0x9E, 0x80, 0x05,
+0x90, 0x88, 0x9E, 0x74, 0x2A, 0x71, 0x2A, 0x90,
+0x88, 0xA1, 0x71, 0x4D, 0x30, 0xE0, 0x3D, 0x90,
+0x88, 0x9E, 0xE0, 0x75, 0xF0, 0x03, 0x84, 0x90,
+0x88, 0xA6, 0xF0, 0xE0, 0xC3, 0x13, 0xA3, 0xF0,
+0x90, 0x88, 0x9F, 0xE0, 0x75, 0xF0, 0x03, 0x84,
+0x90, 0x88, 0xA8, 0xF0, 0x90, 0x88, 0x9E, 0xE0,
+0xC3, 0x13, 0x90, 0x88, 0xA9, 0xF0, 0x90, 0x88,
+0x9F, 0xE0, 0xC3, 0x13, 0x90, 0x88, 0xAA, 0xF0,
+0x90, 0x01, 0x3E, 0x74, 0x08, 0xF0, 0xFD, 0x7F,
+0x02, 0x12, 0x7C, 0x05, 0xE4, 0x90, 0x88, 0xDD,
+0xF0, 0x12, 0x97, 0xEA, 0x30, 0xE0, 0x17, 0xF1,
+0xE4, 0x30, 0xE0, 0x0D, 0x90, 0x8A, 0x89, 0x12,
+0x90, 0x4B, 0x7D, 0x04, 0x7F, 0x02, 0x12, 0x04,
+0x7E, 0x71, 0x22, 0x74, 0x11, 0xF0, 0x90, 0x95,
+0x38, 0xE0, 0x30, 0xE0, 0x33, 0x90, 0x95, 0x41,
+0x74, 0x01, 0xF0, 0xE4, 0xA3, 0xF0, 0x90, 0x06,
+0xC7, 0xE0, 0xFE, 0x90, 0x06, 0xC6, 0x71, 0x42,
+0x3E, 0xFE, 0xE4, 0xFD, 0x78, 0x10, 0x12, 0x9D,
+0x3C, 0x90, 0x06, 0xC5, 0xE0, 0xFE, 0x90, 0x06,
+0xC4, 0x71, 0x42, 0x3E, 0xFE, 0xE4, 0xFD, 0x12,
+0x86, 0x20, 0x90, 0x95, 0x3D, 0x12, 0x04, 0x31,
+0x90, 0x95, 0x44, 0xE0, 0x13, 0x13, 0x54, 0x3F,
+0x30, 0xE0, 0x13, 0xA3, 0xE0, 0x20, 0xE0, 0x07,
+0x54, 0x01, 0x44, 0x64, 0xF0, 0x80, 0x07, 0x90,
+0x95, 0x45, 0xE0, 0x54, 0xFE, 0xF0, 0x12, 0xA7,
+0x57, 0x90, 0x88, 0xA5, 0xE0, 0xB4, 0x01, 0x08,
+0x90, 0x88, 0xB0, 0x74, 0x01, 0xF0, 0x80, 0x2B,
+0x90, 0x88, 0xA5, 0xE0, 0xB4, 0x04, 0x08, 0x90,
+0x88, 0xB0, 0x74, 0x04, 0xF0, 0x80, 0x1C, 0x90,
+0x88, 0xA5, 0xE0, 0xB4, 0x06, 0x08, 0x90, 0x88,
+0xB0, 0x74, 0x02, 0xF0, 0x80, 0x0D, 0x90, 0x88,
+0xA5, 0xE0, 0xB4, 0x07, 0x06, 0x90, 0x88, 0xB0,
+0x74, 0x05, 0xF0, 0xE4, 0x90, 0x88, 0xA5, 0xF0,
+0x80, 0x3D, 0x90, 0x8A, 0xF1, 0x12, 0x8A, 0x66,
+0x90, 0x89, 0x04, 0xE0, 0x90, 0x00, 0x40, 0x30,
+0xE0, 0x08, 0xE0, 0x54, 0x0F, 0x44, 0xA0, 0xF0,
+0x80, 0x06, 0xE0, 0x54, 0x0F, 0x44, 0x20, 0xF0,
+0x12, 0x87, 0xEB, 0x12, 0x87, 0xFE, 0x13, 0x13,
+0x13, 0x54, 0x1F, 0x30, 0xE0, 0x04, 0x7F, 0x03,
+0x80, 0x02, 0x7F, 0x01, 0x12, 0x71, 0x9A, 0x12,
+0x8F, 0x5F, 0x71, 0x22, 0x74, 0x43, 0xF0, 0x90,
+0x88, 0xA3, 0xE0, 0x54, 0xDF, 0xF0, 0xE4, 0x90,
+0x88, 0xAF, 0xF0, 0x90, 0x88, 0xA0, 0x12, 0x97,
+0x34, 0x30, 0xE0, 0x09, 0x90, 0x88, 0xD0, 0xE0,
+0x44, 0x02, 0xF0, 0x80, 0x12, 0x90, 0x8A, 0x97,
+0x12, 0x90, 0x4B, 0x7F, 0x01, 0x12, 0x04, 0x7E,
+0x90, 0x88, 0xD0, 0xE0, 0x54, 0xFD, 0xF0, 0x90,
+0x8A, 0xD9, 0x12, 0x90, 0x4B, 0x7F, 0x03, 0x12,
+0x04, 0x7E, 0x12, 0x97, 0x31, 0x30, 0xE0, 0x0E,
+0x90, 0x01, 0x36, 0x74, 0x20, 0xF0, 0xFD, 0x7F,
+0x02, 0x12, 0x7C, 0x74, 0x80, 0x07, 0x7D, 0x20,
+0x7F, 0x02, 0x12, 0x7C, 0x7E, 0xF1, 0xD3, 0x90,
+0x88, 0x9D, 0xE0, 0x20, 0xE0, 0x07, 0x90, 0x88,
+0xA1, 0xE0, 0x54, 0xBF, 0xF0, 0xD0, 0xD0, 0x92,
+0xAF, 0x22, 0x90, 0x05, 0x00, 0x74, 0x1C, 0xF0,
+0xA3, 0x22, 0xF0, 0x24, 0x0A, 0x90, 0x88, 0xCF,
+0xF0, 0x22, 0x4D, 0xFF, 0x90, 0x88, 0x9D, 0xF0,
+0xEE, 0x22, 0x90, 0x00, 0xAB, 0xE0, 0xFE, 0x90,
+0x00, 0xAA, 0xE0, 0x7C, 0x00, 0x24, 0x00, 0xFF,
+0xEC, 0x22, 0x90, 0x88, 0x2C, 0xE0, 0xC4, 0x13,
+0x13, 0x54, 0x03, 0x22, 0xD3, 0x10, 0xAF, 0x01,
+0xC3, 0xC0, 0xD0, 0x90, 0x97, 0x3F, 0xEF, 0xF0,
+0xA3, 0xED, 0xF0, 0x90, 0x86, 0xB1, 0xE0, 0x04,
+0xF0, 0x90, 0x88, 0x9D, 0xE0, 0x30, 0xE0, 0x07,
+0x90, 0x05, 0x10, 0xE4, 0xF0, 0xA3, 0xF0, 0x90,
+0x04, 0x1D, 0xE0, 0x60, 0x45, 0x90, 0x05, 0x22,
+0xE0, 0x90, 0x97, 0x43, 0xF0, 0x7B, 0x26, 0x12,
+0x8A, 0x5D, 0xEF, 0x64, 0x01, 0x70, 0x0B, 0x71,
+0xFC, 0x90, 0x93, 0x58, 0xE0, 0x20, 0xE0, 0x17,
+0x80, 0x11, 0x90, 0x88, 0xA1, 0x71, 0x4D, 0x30,
+0xE0, 0x0D, 0x71, 0xFC, 0x90, 0x93, 0x58, 0xE0,
+0x20, 0xE0, 0x04, 0x91, 0x41, 0xEE, 0xF0, 0x90,
+0x97, 0x43, 0xE0, 0xFD, 0x7B, 0x27, 0xE4, 0xFF,
+0x12, 0x8F, 0x64, 0x91, 0x2F, 0x12, 0x04, 0x7E,
+0x80, 0x12, 0x91, 0x2F, 0x12, 0x04, 0x7E, 0x71,
+0xFC, 0x90, 0x93, 0x58, 0xE0, 0x20, 0xE0, 0x04,
+0x91, 0x41, 0xEE, 0xF0, 0x90, 0x88, 0x9D, 0xE0,
+0x30, 0xE0, 0x1A, 0x90, 0x88, 0xA1, 0x71, 0x4D,
 0x30, 0xE0, 0x12, 0x90, 0x05, 0x22, 0xE0, 0x54,
-0x6F, 0xFF, 0x90, 0x8A, 0xF9, 0x12, 0xB4, 0x5C,
-0x7D, 0x28, 0x12, 0x04, 0x7E, 0xB1, 0x71, 0xD0,
-0xD0, 0x92, 0xAF, 0x22, 0x90, 0x97, 0x12, 0xE0,
-0xFE, 0xA3, 0xE0, 0xFF, 0x90, 0x8A, 0x9B, 0xE0,
+0x6F, 0xFF, 0x90, 0x8A, 0xF9, 0x12, 0x97, 0x44,
+0x7D, 0x28, 0x12, 0x04, 0x7E, 0xF1, 0xDB, 0xD0,
+0xD0, 0x92, 0xAF, 0x22, 0x90, 0x86, 0xB6, 0xE0,
+0xFF, 0x90, 0x97, 0x40, 0xE0, 0xFB, 0x90, 0x92,
+0x13, 0x74, 0x0A, 0xF0, 0x7D, 0x01, 0x12, 0x66,
+0xDB, 0x90, 0x97, 0x41, 0xEE, 0xF0, 0xFC, 0xA3,
+0xEF, 0xF0, 0xFD, 0x90, 0x97, 0x3F, 0xE0, 0xFF,
+0x90, 0x8A, 0x95, 0xE0, 0xFA, 0xA3, 0xE0, 0xFB,
+0xF5, 0x82, 0x8A, 0x83, 0x02, 0x04, 0x7E, 0x90,
+0x97, 0x3F, 0xE0, 0xFF, 0x90, 0x8A, 0xC7, 0xE0,
 0xFC, 0xA3, 0xE0, 0xFD, 0xF5, 0x82, 0x8C, 0x83,
-0x12, 0x04, 0x7E, 0x90, 0x97, 0x12, 0xA3, 0xE0,
-0xFF, 0x24, 0x12, 0xF5, 0x82, 0xE4, 0x34, 0xFC,
-0xF5, 0x83, 0xE0, 0x54, 0x01, 0xFE, 0x90, 0x97,
-0x11, 0xE0, 0x25, 0xE0, 0x25, 0xE0, 0x44, 0x02,
-0x4E, 0xFE, 0x74, 0x12, 0x2F, 0xF5, 0x82, 0xE4,
-0x34, 0xFC, 0xF5, 0x83, 0xEE, 0xF0, 0x22, 0x90,
-0x88, 0xB8, 0xE0, 0x30, 0xE0, 0x05, 0x90, 0x8A,
-0xEB, 0x80, 0x28, 0x90, 0x95, 0x44, 0x12, 0xA5,
-0x89, 0x30, 0xE0, 0x1C, 0x90, 0x88, 0xC2, 0xE0,
-0xC4, 0x54, 0x0F, 0x20, 0xE0, 0x09, 0x90, 0x8A,
-0xBB, 0x12, 0x8B, 0xCF, 0x91, 0x34, 0xF0, 0x90,
-0x95, 0x44, 0xE0, 0x54, 0xF7, 0xF0, 0x80, 0x06,
-0x90, 0x8A, 0x99, 0x12, 0x92, 0x57, 0x90, 0x88,
-0xF0, 0xE0, 0x30, 0xE0, 0x06, 0x90, 0x8A, 0xE7,
-0x12, 0x92, 0x57, 0x22, 0xE4, 0xFF, 0x12, 0x04,
-0x7E, 0x90, 0x88, 0xC2, 0xE0, 0x54, 0xEF, 0x22,
-0x12, 0xE5, 0xD2, 0x90, 0x96, 0x15, 0xEF, 0xF0,
-0x90, 0x8A, 0x89, 0x30, 0xE0, 0x13, 0x12, 0x8B,
-0xCF, 0x7D, 0x01, 0xE4, 0xFF, 0x12, 0x04, 0x7E,
-0x90, 0x88, 0x33, 0xE0, 0x44, 0x04, 0xF0, 0x80,
-0x06, 0x12, 0x8B, 0xCF, 0x12, 0x8F, 0xD4, 0x90,
-0x96, 0x15, 0xE0, 0x30, 0xE6, 0x11, 0x90, 0x01,
-0x2F, 0xE0, 0x30, 0xE7, 0x04, 0xE4, 0xF0, 0x80,
-0x06, 0x90, 0x01, 0x2F, 0x74, 0x80, 0xF0, 0xB1,
-0xF4, 0x74, 0x02, 0xF0, 0x02, 0x6E, 0x2F, 0xD3,
-0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0x90, 0x97,
-0x1A, 0xED, 0xF0, 0xA3, 0xEB, 0xF0, 0x90, 0x97,
-0x19, 0xEF, 0xF0, 0xE4, 0xFD, 0xFC, 0xB1, 0xE4,
-0x90, 0x97, 0x1C, 0xF0, 0x12, 0x7B, 0x07, 0x7C,
-0x00, 0xAD, 0x07, 0x90, 0x97, 0x19, 0xE0, 0x90,
-0x04, 0x25, 0xF0, 0x90, 0x97, 0x1A, 0xE0, 0x60,
-0x05, 0xB1, 0x4B, 0x44, 0x80, 0xF0, 0xAF, 0x05,
-0x74, 0x20, 0x2F, 0xF5, 0x82, 0xE4, 0x34, 0xFC,
-0xF5, 0x83, 0xE0, 0x54, 0xC0, 0xF0, 0xB1, 0x4B,
-0x54, 0xC0, 0xF0, 0x90, 0x97, 0x1C, 0xE0, 0xFF,
-0xAE, 0x05, 0x74, 0x18, 0x2E, 0xF5, 0x82, 0xE4,
-0x34, 0xFC, 0xF5, 0x83, 0xEF, 0xF0, 0x90, 0x00,
-0x8B, 0xE0, 0xD3, 0x94, 0x03, 0x74, 0x10, 0x2E,
-0xF5, 0x82, 0xE4, 0x34, 0xFC, 0xF5, 0x83, 0x74,
-0x04, 0xF0, 0xAF, 0x05, 0x74, 0x12, 0x2F, 0xF5,
+0x22, 0x90, 0x97, 0x41, 0xE0, 0xFE, 0xA3, 0xE0,
+0xFF, 0x90, 0x8A, 0x9B, 0xE0, 0xFC, 0xA3, 0xE0,
+0xFD, 0xF5, 0x82, 0x8C, 0x83, 0x12, 0x04, 0x7E,
+0x90, 0x97, 0x41, 0xA3, 0xE0, 0xFF, 0x24, 0x12,
+0xF5, 0x82, 0xE4, 0x34, 0xFC, 0xF5, 0x83, 0xE0,
+0x54, 0x01, 0xFE, 0x90, 0x97, 0x40, 0xE0, 0x25,
+0xE0, 0x25, 0xE0, 0x44, 0x02, 0x4E, 0xFE, 0x74,
+0x12, 0x2F, 0xF5, 0x82, 0xE4, 0x34, 0xFC, 0xF5,
+0x83, 0x22, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0,
+0xD0, 0x90, 0x97, 0x49, 0xED, 0xF0, 0xA3, 0xEB,
+0xF0, 0x90, 0x97, 0x48, 0xEF, 0xF0, 0xE4, 0xFD,
+0xFC, 0x12, 0xCA, 0xF3, 0x90, 0x97, 0x4B, 0xF0,
+0x12, 0x7B, 0x07, 0x7C, 0x00, 0xAD, 0x07, 0x90,
+0x97, 0x48, 0xE0, 0x90, 0x04, 0x25, 0xF0, 0x90,
+0x97, 0x49, 0xE0, 0x60, 0x05, 0xB1, 0x41, 0x44,
+0x80, 0xF0, 0xAF, 0x05, 0x74, 0x20, 0x2F, 0xF5,
 0x82, 0xE4, 0x34, 0xFC, 0xF5, 0x83, 0xE0, 0x54,
-0x01, 0xFE, 0x90, 0x97, 0x1B, 0xE0, 0x25, 0xE0,
-0x25, 0xE0, 0xFB, 0xEE, 0x44, 0x02, 0x4B, 0x71,
-0xE1, 0x74, 0x11, 0x2F, 0xF5, 0x82, 0xE4, 0x34,
-0xFC, 0xF5, 0x83, 0x74, 0xFF, 0xF0, 0x74, 0x29,
-0x2F, 0xF5, 0x82, 0xE4, 0x34, 0xFC, 0xF5, 0x83,
-0xE0, 0x54, 0xF7, 0xF0, 0x74, 0x0D, 0x2D, 0xF5,
-0x82, 0xE4, 0x34, 0xFC, 0xF5, 0x83, 0xE0, 0x44,
-0x80, 0xF0, 0xAE, 0x04, 0xAF, 0x05, 0xD0, 0xD0,
-0x92, 0xAF, 0x22, 0x74, 0x21, 0x2F, 0xF5, 0x82,
-0xE4, 0x34, 0xFC, 0xF5, 0x83, 0xE0, 0x22, 0x22,
-0x22, 0x7D, 0x02, 0x7F, 0x02, 0x02, 0x7C, 0x74,
-0x90, 0x88, 0x31, 0xE0, 0x54, 0xF7, 0xF0, 0x22,
-0x90, 0x93, 0x3D, 0xE0, 0x90, 0x05, 0x73, 0xF0,
-0x22, 0x90, 0x04, 0x1F, 0x74, 0x20, 0xF0, 0x7F,
-0x01, 0x22, 0x90, 0x88, 0xA1, 0xE0, 0x13, 0x13,
-0x54, 0x3F, 0x22, 0xEF, 0x64, 0x39, 0x70, 0x47,
-0x90, 0x88, 0x9D, 0xE0, 0x30, 0xE0, 0x40, 0xB1,
-0x7A, 0x30, 0xE0, 0x3B, 0x90, 0x88, 0xC2, 0xE0,
-0xFF, 0xC4, 0x54, 0x0F, 0x30, 0xE0, 0x30, 0x90,
-0x95, 0x4A, 0xE0, 0x04, 0xF0, 0xB1, 0xDA, 0x30,
-0xE0, 0x1C, 0xEE, 0x13, 0x13, 0x13, 0x54, 0x1F,
-0x30, 0xE0, 0x13, 0x90, 0x01, 0x63, 0xE4, 0xF0,
-0x90, 0x01, 0x3C, 0x74, 0x10, 0xF0, 0xEF, 0x54,
-0xEF, 0x90, 0x88, 0xC2, 0xF0, 0x22, 0x90, 0x88,
-0xB0, 0xE0, 0x70, 0x03, 0x91, 0x39, 0xF0, 0x22,
-0x90, 0x93, 0x3C, 0xE0, 0x14, 0x90, 0x93, 0x3E,
-0xF0, 0x22, 0x90, 0x95, 0x44, 0xE0, 0xFE, 0x13,
-0x13, 0x54, 0x3F, 0x22, 0x90, 0x86, 0xAD, 0xA3,
-0xE0, 0x24, 0x7F, 0xF5, 0x82, 0xE4, 0x34, 0x84,
-0xF5, 0x83, 0xE0, 0x22, 0x90, 0x88, 0x48, 0xE0,
-0xFF, 0xA3, 0xE0, 0xFD, 0x90, 0x88, 0x4F, 0xE0,
-0xFB, 0x90, 0x92, 0x98, 0x22, 0x90, 0x88, 0xB8,
-0xE0, 0x30, 0xE0, 0x05, 0x90, 0x8A, 0x8F, 0x80,
-0x03, 0x90, 0x8A, 0x87, 0x12, 0x92, 0x57, 0x90,
-0x88, 0xE6, 0xE0, 0x30, 0xE0, 0x04, 0xA3, 0xE0,
-0x04, 0xF0, 0x90, 0x88, 0xE7, 0xE0, 0x64, 0x08,
-0x70, 0x20, 0x90, 0x88, 0xE6, 0xE0, 0x30, 0xE0,
-0x14, 0xF1, 0x4D, 0xF0, 0xE4, 0xFD, 0x12, 0x76,
-0xF7, 0x90, 0x88, 0xE6, 0xE0, 0x54, 0xFE, 0xF0,
-0xE4, 0xA3, 0xF0, 0x80, 0x05, 0xE4, 0x90, 0x88,
-0xE7, 0xF0, 0x90, 0x88, 0xA1, 0x12, 0xAF, 0x83,
-0x30, 0xE0, 0x13, 0x90, 0x88, 0xE8, 0xE0, 0x04,
-0xF0, 0xE0, 0xB4, 0x14, 0x09, 0x90, 0x04, 0x9C,
-0xE4, 0xF0, 0x90, 0x88, 0xE8, 0xF0, 0x90, 0x88,
-0x2C, 0xE0, 0x30, 0xE0, 0x06, 0x90, 0x88, 0x2E,
-0x74, 0x01, 0xF0, 0x90, 0x88, 0x36, 0xE0, 0x70,
-0x02, 0xC1, 0xF9, 0x90, 0x88, 0x4D, 0xE0, 0x04,
-0xF0, 0x90, 0x05, 0x61, 0x12, 0xC3, 0x53, 0x90,
-0x05, 0x60, 0x12, 0x8F, 0xA1, 0x12, 0x86, 0x20,
-0xC0, 0x04, 0xC0, 0x05, 0xC0, 0x06, 0xC0, 0x07,
-0x90, 0x05, 0x62, 0x12, 0x8F, 0xA1, 0x78, 0x10,
-0x12, 0x03, 0xFE, 0xD0, 0x03, 0xD0, 0x02, 0xD0,
-0x01, 0xD0, 0x00, 0x12, 0x86, 0x20, 0xC0, 0x04,
-0xC0, 0x05, 0xC0, 0x06, 0xC0, 0x07, 0xA3, 0x12,
-0x8F, 0xA1, 0x78, 0x18, 0x12, 0x03, 0xFE, 0xD0,
-0x03, 0xD0, 0x02, 0xD0, 0x01, 0xD0, 0x00, 0x12,
-0x86, 0x20, 0x90, 0x88, 0x81, 0x12, 0x04, 0x31,
-0x90, 0x88, 0x32, 0xE0, 0x54, 0x7F, 0xF0, 0xA3,
-0xE0, 0x30, 0xE0, 0x0B, 0xB1, 0xF4, 0x74, 0x05,
-0xF0, 0x12, 0x6E, 0x2F, 0x12, 0xA7, 0xED, 0x90,
-0x88, 0x32, 0x12, 0xA5, 0x89, 0x30, 0xE0, 0x09,
-0x90, 0x01, 0x3B, 0xE0, 0x30, 0xE4, 0x02, 0xF1,
-0x15, 0x90, 0x8A, 0xE5, 0x12, 0x8B, 0xCF, 0x7F,
-0x01, 0x12, 0x04, 0x7E, 0x90, 0x93, 0x3B, 0xE0,
-0x30, 0xE0, 0x09, 0x90, 0x01, 0x3B, 0xE0, 0x30,
-0xE4, 0x02, 0xF1, 0x15, 0x22, 0x7D, 0x02, 0x7F,
-0x02, 0x12, 0x7C, 0x7E, 0x7D, 0x01, 0x7F, 0x02,
-0x02, 0x7C, 0x7E, 0x90, 0x93, 0x58, 0xE0, 0x30,
-0xE0, 0x0B, 0x90, 0x93, 0xD8, 0xE0, 0x60, 0x05,
-0x7F, 0x07, 0x12, 0xAF, 0xEE, 0x22, 0x90, 0x93,
-0x03, 0xE0, 0x30, 0xE0, 0x0F, 0x13, 0x13, 0x13,
-0x54, 0x1F, 0x30, 0xE0, 0x07, 0x90, 0x04, 0x1F,
-0xE0, 0x44, 0x40, 0xF0, 0x22, 0x90, 0x88, 0xA0,
-0xE0, 0xC4, 0x13, 0x13, 0x54, 0x01, 0xFF, 0x90,
-0x88, 0xE0, 0xE0, 0xFB, 0x90, 0x88, 0xDF, 0xE0,
-0x90, 0x92, 0x90, 0x22, 0x90, 0x88, 0x36, 0xE0,
-0x60, 0x15, 0x90, 0x88, 0x9D, 0xE0, 0x30, 0xE0,
-0x0B, 0x90, 0x95, 0x44, 0xE0, 0xFF, 0x12, 0x96,
-0x95, 0x20, 0xE0, 0x03, 0x12, 0xB5, 0xAB, 0x02,
-0xA9, 0x03, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0,
-0xD0, 0xB1, 0xE4, 0x90, 0x97, 0x42, 0xF0, 0xED,
-0x90, 0x00, 0x73, 0x70, 0x0D, 0xE0, 0x44, 0x04,
-0xF0, 0x90, 0x00, 0x67, 0xE0, 0x44, 0x80, 0xF0,
-0x80, 0x0B, 0xE0, 0x54, 0xFB, 0xF0, 0x90, 0x00,
-0x67, 0xE0, 0x54, 0x7F, 0xF0, 0xD0, 0xD0, 0x92,
-0xAF, 0x22, 0x12, 0x02, 0x06, 0x90, 0x88, 0x9C,
-0xF0, 0x60, 0x39, 0xA3, 0xE0, 0x20, 0xE0, 0x34,
-0x90, 0x8A, 0xB9, 0x12, 0x8B, 0xCF, 0xE4, 0xFD,
-0x7F, 0x04, 0x12, 0x04, 0x7E, 0x90, 0x88, 0x9B,
-0xE0, 0xFF, 0xC3, 0x13, 0x30, 0xE0, 0x1D, 0xEF,
-0x13, 0x13, 0x13, 0x54, 0x1F, 0x20, 0xE0, 0x14,
-0x90, 0x88, 0x9B, 0xE0, 0x13, 0x13, 0x54, 0x3F,
-0x30, 0xE0, 0x04, 0x7F, 0x0D, 0x80, 0x02, 0x7F,
-0x09, 0x12, 0x71, 0x9A, 0x22, 0x90, 0x93, 0x3F,
-0xE0, 0x20, 0xE0, 0x03, 0x02, 0xD0, 0xB9, 0xE4,
-0x90, 0x95, 0x4E, 0xF0, 0x11, 0xC6, 0x40, 0x02,
-0x01, 0xB9, 0x12, 0xBF, 0x92, 0x80, 0x05, 0xC3,
-0x33, 0xCE, 0x33, 0xCE, 0xD8, 0xF9, 0xFF, 0x90,
-0x93, 0x40, 0xE0, 0xFD, 0xEF, 0x5D, 0x60, 0x02,
-0x01, 0xB1, 0x12, 0x02, 0x06, 0xFF, 0x30, 0xE0,
-0x1A, 0x90, 0x93, 0x41, 0xE0, 0xFE, 0x90, 0x95,
-0x4E, 0xE0, 0xFD, 0x74, 0x01, 0xA8, 0x05, 0x08,
-0x80, 0x02, 0xC3, 0x33, 0xD8, 0xFC, 0x4E, 0x90,
-0x93, 0x41, 0xF0, 0xEF, 0xC3, 0x13, 0x30, 0xE0,
-0x16, 0x90, 0x93, 0x42, 0xE0, 0xFF, 0x90, 0x95,
-0x4E, 0x11, 0xBF, 0x08, 0x80, 0x02, 0xC3, 0x33,
-0xD8, 0xFC, 0x4F, 0x90, 0x93, 0x42, 0xF0, 0x12,
-0x87, 0xBC, 0xFF, 0x90, 0x95, 0x4E, 0xE0, 0xFE,
-0x24, 0x43, 0xF5, 0x82, 0xE4, 0x34, 0x93, 0xF5,
-0x83, 0xEF, 0xF0, 0x12, 0x87, 0xB1, 0xFF, 0x74,
+0xC0, 0xF0, 0xB1, 0x41, 0x54, 0xC0, 0xF0, 0x90,
+0x97, 0x4B, 0xE0, 0xFF, 0xAE, 0x05, 0x74, 0x18,
+0x2E, 0xF5, 0x82, 0xE4, 0x34, 0xFC, 0xF5, 0x83,
+0xEF, 0xF0, 0x90, 0x00, 0x8B, 0xE0, 0xD3, 0x94,
+0x03, 0x74, 0x10, 0x2E, 0xF5, 0x82, 0xE4, 0x34,
+0xFC, 0xF5, 0x83, 0x74, 0x04, 0xF0, 0xAF, 0x05,
+0x91, 0x77, 0xE0, 0x54, 0x01, 0xFE, 0x90, 0x97,
+0x4A, 0xE0, 0x25, 0xE0, 0x25, 0xE0, 0xFB, 0xEE,
+0x44, 0x02, 0x4B, 0x91, 0x76, 0xEE, 0xF0, 0x74,
+0x11, 0x2F, 0xF5, 0x82, 0xE4, 0x34, 0xFC, 0xF5,
+0x83, 0x74, 0xFF, 0xF0, 0x74, 0x29, 0x2F, 0xF5,
+0x82, 0xE4, 0x34, 0xFC, 0xF5, 0x83, 0xE0, 0x54,
+0xF7, 0xF0, 0x74, 0x0D, 0x2D, 0xF5, 0x82, 0xE4,
+0x34, 0xFC, 0xF5, 0x83, 0xE0, 0x44, 0x80, 0xF0,
+0xAE, 0x04, 0xAF, 0x05, 0xD0, 0xD0, 0x92, 0xAF,
+0x22, 0x74, 0x21, 0x2F, 0xF5, 0x82, 0xE4, 0x34,
+0xFC, 0xF5, 0x83, 0xE0, 0x22, 0x90, 0x88, 0x9D,
+0xE0, 0x20, 0xE0, 0x02, 0xC1, 0x14, 0x90, 0x8A,
+0xB1, 0x12, 0x8A, 0x66, 0x90, 0x88, 0xB0, 0xE0,
+0xFF, 0xB4, 0x01, 0x02, 0x80, 0x22, 0x90, 0x88,
+0xB0, 0xE0, 0xFF, 0xB4, 0x02, 0x05, 0x90, 0x8A,
+0xC1, 0x80, 0x18, 0x90, 0x88, 0xB0, 0xE0, 0xFF,
+0xB4, 0x03, 0x05, 0x90, 0x8A, 0xBB, 0x80, 0x0B,
+0x90, 0x88, 0xB0, 0xE0, 0xFF, 0xB4, 0x04, 0x08,
+0x90, 0x8A, 0xBD, 0x91, 0x37, 0x02, 0x04, 0x7E,
+0x90, 0x88, 0xB0, 0xE0, 0xFF, 0x64, 0x05, 0x70,
+0x7B, 0x90, 0x95, 0x4C, 0xE0, 0x20, 0xE0, 0x6A,
+0x90, 0x88, 0x9D, 0xE0, 0xFE, 0xC4, 0x54, 0x0F,
+0x20, 0xE0, 0x0A, 0xEE, 0xC4, 0x13, 0x54, 0x07,
+0x30, 0xE0, 0x02, 0x80, 0x55, 0xD1, 0x1D, 0x70,
+0x0E, 0x90, 0x01, 0x34, 0x74, 0x08, 0xF0, 0xFD,
+0xE4, 0xFF, 0x12, 0x7C, 0x74, 0x80, 0x16, 0x90,
+0x95, 0x4D, 0xE0, 0x60, 0x2B, 0xD1, 0x1D, 0xC3,
+0x94, 0x05, 0x50, 0x24, 0xE4, 0xA3, 0xF0, 0x90,
+0x95, 0x4F, 0xE0, 0x04, 0xF0, 0x90, 0x8A, 0xD1,
+0x12, 0x90, 0x4B, 0x7F, 0x05, 0xD1, 0x15, 0xFF,
+0xC3, 0x13, 0xFE, 0xEF, 0x54, 0x01, 0xFF, 0xEE,
+0x04, 0x54, 0x7F, 0x25, 0xE0, 0x4F, 0xF0, 0x22,
+0x7D, 0x08, 0xE4, 0xFF, 0x12, 0x7C, 0x7E, 0x90,
+0x01, 0x34, 0x74, 0x08, 0xF0, 0x90, 0x88, 0xB0,
+0xE0, 0xFF, 0x90, 0x8A, 0xC1, 0x91, 0x37, 0xD1,
+0x15, 0x54, 0x01, 0xF0, 0x22, 0x12, 0x04, 0x7E,
+0x90, 0x95, 0x4C, 0xE0, 0x22, 0x90, 0x95, 0x4C,
+0xE0, 0xC3, 0x13, 0x54, 0x7F, 0x22, 0xE0, 0x54,
+0xFE, 0x4E, 0xFE, 0xF0, 0xEF, 0x54, 0x02, 0xFF,
+0xEE, 0x54, 0xFD, 0x4F, 0x22, 0x71, 0x3A, 0x3E,
+0x54, 0x7F, 0x90, 0x95, 0x52, 0xF0, 0xA3, 0xEF,
+0xF0, 0x90, 0x00, 0xAB, 0xE0, 0x44, 0x80, 0xF0,
+0x90, 0x00, 0xAA, 0xE0, 0x44, 0x02, 0xF0, 0x22,
+0xF1, 0xCD, 0x12, 0x7B, 0xDB, 0x90, 0x8A, 0xC5,
+0x12, 0x8A, 0x66, 0x12, 0xCA, 0x5A, 0xD1, 0x35,
+0x12, 0xAF, 0xCA, 0x12, 0xEA, 0x71, 0xD1, 0x8D,
+0x12, 0xE4, 0x5C, 0x90, 0x8A, 0x73, 0x12, 0x8A,
+0x66, 0x90, 0x00, 0x6A, 0xE0, 0x30, 0xE2, 0x14,
+0x90, 0x92, 0x20, 0x74, 0x01, 0xF0, 0xA3, 0x74,
+0xF4, 0xF0, 0xE4, 0xFB, 0xFD, 0x7F, 0x68, 0x7E,
+0x01, 0x12, 0x66, 0x33, 0x22, 0x12, 0xEB, 0x62,
+0x02, 0x04, 0x80, 0x71, 0x3A, 0x3E, 0x54, 0x7F,
+0x90, 0x95, 0xEB, 0xF0, 0xA3, 0xEF, 0xF0, 0x90,
+0x95, 0x53, 0xE0, 0x54, 0x02, 0xFF, 0x90, 0x95,
+0xEC, 0xE0, 0x54, 0x02, 0xFD, 0xED, 0x6F, 0x30,
+0xE1, 0x04, 0xD1, 0xD8, 0xF1, 0x02, 0x90, 0x95,
+0xEC, 0xE0, 0x20, 0xE1, 0x0B, 0x90, 0x95, 0x53,
+0xE0, 0x20, 0xE1, 0x04, 0xD1, 0xD8, 0xF1, 0x02,
+0x90, 0x95, 0xEB, 0xE0, 0xFF, 0xA3, 0xE0, 0x90,
+0x95, 0x52, 0xCF, 0xF0, 0xA3, 0xEF, 0xF0, 0x22,
+0x90, 0x01, 0x8C, 0xE4, 0xF0, 0xA3, 0xF0, 0xA3,
+0x74, 0x71, 0xF0, 0xA3, 0x74, 0x02, 0xF0, 0x90,
+0x01, 0x95, 0xE0, 0x54, 0xF0, 0x44, 0x07, 0xF0,
+0x90, 0x01, 0x98, 0x74, 0x7F, 0xF0, 0x90, 0x01,
+0x01, 0xE0, 0x54, 0xFB, 0xF0, 0xE0, 0x44, 0x04,
+0xF0, 0x22, 0xE4, 0x90, 0x97, 0x68, 0xF0, 0xA3,
+0xF0, 0x12, 0xE4, 0x91, 0xEF, 0x64, 0x01, 0x60,
+0x3A, 0xC3, 0x90, 0x97, 0x69, 0xE0, 0x94, 0x88,
+0x90, 0x97, 0x68, 0xE0, 0x94, 0x13, 0x40, 0x0F,
+0x90, 0x01, 0xC1, 0xE0, 0x44, 0x10, 0xF0, 0x90,
+0x01, 0xC7, 0x74, 0xFD, 0xF0, 0x80, 0x1C, 0x90,
+0x97, 0x68, 0x12, 0xDC, 0x33, 0xD3, 0x90, 0x97,
+0x69, 0xE0, 0x94, 0x32, 0x90, 0x97, 0x68, 0xE0,
+0x94, 0x00, 0x40, 0xC5, 0x90, 0x01, 0xC6, 0xE0,
+0x30, 0xE3, 0xBE, 0x90, 0x01, 0xC7, 0x74, 0xFE,
+0xF0, 0x22, 0x90, 0x00, 0x80, 0xE0, 0x44, 0x80,
+0xF0, 0x12, 0xD3, 0xBD, 0x12, 0xE4, 0x6B, 0x12,
+0x7B, 0x79, 0xD1, 0xD8, 0x12, 0xAF, 0x92, 0x7F,
+0x01, 0x12, 0x84, 0x15, 0x90, 0x93, 0x57, 0x74,
+0x02, 0xF0, 0xFF, 0x12, 0x84, 0x15, 0x90, 0x93,
+0x57, 0xE0, 0x04, 0xF0, 0x12, 0xD1, 0x86, 0xD1,
+0x50, 0x90, 0x00, 0x80, 0xE0, 0x44, 0x40, 0xF0,
+0x75, 0x20, 0xFF, 0x12, 0x7C, 0x97, 0x53, 0xA8,
+0xFE, 0x90, 0x01, 0xA0, 0xE0, 0xB4, 0xFD, 0x05,
+0xE4, 0xFF, 0x12, 0x91, 0x9B, 0xF1, 0x02, 0x90,
+0x00, 0x81, 0xE0, 0x44, 0x04, 0xF0, 0xF1, 0xED,
+0x12, 0xA9, 0x06, 0xD1, 0x48, 0xA3, 0xE0, 0x44,
+0x80, 0xF0, 0x90, 0x06, 0x0A, 0xE0, 0x44, 0x10,
+0xF0, 0x90, 0x07, 0xDB, 0xE0, 0x44, 0x80, 0xF0,
+0x90, 0x06, 0x0D, 0x74, 0xFF, 0xF0, 0xE4, 0xFF,
+0x02, 0x84, 0x9E, 0xC1, 0xD8, 0xE4, 0xFD, 0xFF,
+0x02, 0x6E, 0x71, 0x90, 0x06, 0x04, 0xE0, 0x54,
+0x7F, 0xF0, 0x22, 0x90, 0x04, 0x1F, 0x74, 0x20,
+0xF0, 0x7F, 0x01, 0x22, 0x90, 0x88, 0xA1, 0xE0,
+0xC4, 0x13, 0x54, 0x07, 0x22, 0x90, 0x01, 0xE4,
+0x74, 0x2F, 0xF0, 0xA3, 0xE4, 0xF0, 0x22, 0x90,
+0x93, 0x3F, 0xE0, 0x20, 0xE0, 0x02, 0x01, 0xB9,
+0xE4, 0x90, 0x95, 0x54, 0xF0, 0x51, 0x51, 0x40,
+0x02, 0x01, 0xB9, 0x12, 0xA7, 0x69, 0x80, 0x05,
+0xC3, 0x33, 0xCE, 0x33, 0xCE, 0xD8, 0xF9, 0xFF,
+0x90, 0x93, 0x40, 0xE0, 0xFD, 0xEF, 0x5D, 0x60,
+0x02, 0x01, 0xB1, 0x12, 0x02, 0x06, 0xFF, 0x30,
+0xE0, 0x1A, 0x90, 0x93, 0x41, 0xE0, 0xFE, 0x90,
+0x95, 0x54, 0xE0, 0xFD, 0x74, 0x01, 0xA8, 0x05,
+0x08, 0x80, 0x02, 0xC3, 0x33, 0xD8, 0xFC, 0x4E,
+0x90, 0x93, 0x41, 0xF0, 0xEF, 0xC3, 0x13, 0x30,
+0xE0, 0x16, 0x90, 0x93, 0x42, 0xE0, 0xFF, 0x90,
+0x95, 0x54, 0x11, 0xBF, 0x08, 0x80, 0x02, 0xC3,
+0x33, 0xD8, 0xFC, 0x4F, 0x90, 0x93, 0x42, 0xF0,
+0x12, 0x87, 0x6A, 0xFF, 0x90, 0x95, 0x54, 0xE0,
+0xFE, 0x24, 0x43, 0xF5, 0x82, 0xE4, 0x34, 0x93,
+0xF5, 0x83, 0xEF, 0x12, 0x87, 0x96, 0xFF, 0x74,
 0x48, 0x2E, 0xF5, 0x82, 0xE4, 0x34, 0x93, 0x12,
-0x87, 0xA2, 0xFF, 0x74, 0x4D, 0x2E, 0xF5, 0x82,
-0xE4, 0x34, 0x93, 0x12, 0x87, 0x72, 0xFF, 0x74,
+0x87, 0xFA, 0xFF, 0x74, 0x4D, 0x2E, 0xF5, 0x82,
+0xE4, 0x34, 0x93, 0x12, 0x87, 0xF0, 0xFF, 0x74,
 0x52, 0x2E, 0xF5, 0x82, 0xE4, 0x34, 0x93, 0xF5,
 0x83, 0xEF, 0xF0, 0x90, 0x93, 0x40, 0xE0, 0xFF,
 0x74, 0x01, 0xA8, 0x06, 0x08, 0x80, 0x02, 0xC3,
 0x33, 0xD8, 0xFC, 0x4F, 0x90, 0x93, 0x40, 0xF0,
-0x22, 0x90, 0x95, 0x4E, 0xE0, 0x04, 0xF0, 0x01,
-0x04, 0x22, 0xE0, 0xFF, 0x90, 0x96, 0xF8, 0xE0,
-0xFE, 0x74, 0x01, 0xA8, 0x06, 0x22, 0x90, 0x95,
-0x4E, 0xE0, 0xFF, 0xC3, 0x94, 0x05, 0x22, 0x7B,
-0x00, 0x7A, 0x00, 0x79, 0x00, 0x90, 0x89, 0x2E,
-0x12, 0x86, 0x42, 0x7B, 0xFF, 0x7A, 0x80, 0x79,
-0x80, 0x90, 0x89, 0x31, 0x12, 0x86, 0x42, 0x7A,
-0x80, 0x79, 0xBF, 0x90, 0x89, 0x34, 0x12, 0x86,
-0x42, 0x7A, 0x81, 0x79, 0x61, 0x90, 0x89, 0x3A,
-0x12, 0x86, 0x42, 0x7A, 0x81, 0x79, 0x75, 0x90,
-0x89, 0x3D, 0x12, 0x86, 0x42, 0x7A, 0x81, 0x79,
-0x9D, 0x90, 0x89, 0x40, 0x12, 0x86, 0x42, 0x51,
-0xA4, 0x7A, 0x81, 0x79, 0xD9, 0x90, 0x89, 0x49,
-0x12, 0x86, 0x42, 0x7A, 0x82, 0x79, 0x01, 0x90,
-0x89, 0x4C, 0x12, 0x86, 0x42, 0xE4, 0x90, 0x96,
-0x5D, 0xF0, 0x90, 0x96, 0x4C, 0xF0, 0x90, 0x95,
-0x4E, 0xF0, 0x11, 0xC6, 0x50, 0x0F, 0x74, 0x6E,
-0x2F, 0x31, 0x4A, 0xE4, 0xF0, 0x90, 0x95, 0x4E,
-0xE0, 0x04, 0xF0, 0x80, 0xED, 0x22, 0x74, 0x6E,
-0x25, 0x67, 0xF5, 0x82, 0xE4, 0x34, 0x96, 0xF5,
-0x83, 0x22, 0x51, 0x8F, 0x12, 0x7B, 0xDB, 0x90,
-0x8A, 0xC5, 0x12, 0x92, 0x57, 0x11, 0xCF, 0x12,
-0xB5, 0x64, 0x31, 0x8F, 0x31, 0x8A, 0x51, 0xAE,
-0x90, 0x8A, 0x73, 0x12, 0x92, 0x57, 0x90, 0x00,
-0x6A, 0xE0, 0x30, 0xE2, 0x14, 0x90, 0x92, 0x20,
-0x74, 0x01, 0xF0, 0xA3, 0x74, 0xF4, 0xF0, 0xE4,
-0xFB, 0xFD, 0x7F, 0x68, 0x7E, 0x01, 0x12, 0x66,
-0x33, 0x22, 0x51, 0x82, 0x02, 0x04, 0x80, 0x7E,
-0x00, 0x7F, 0x62, 0x7D, 0x00, 0x7B, 0x01, 0x7A,
-0x88, 0x79, 0x31, 0x12, 0x04, 0x80, 0x51, 0x82,
-0x12, 0x04, 0x80, 0xE4, 0x90, 0x95, 0x37, 0xF0,
-0x90, 0x88, 0x35, 0x74, 0x02, 0xF0, 0x90, 0x88,
-0x3C, 0x14, 0xF0, 0xA3, 0xF0, 0xA3, 0x74, 0x50,
-0xF0, 0x90, 0x88, 0x42, 0xE4, 0xF0, 0xA3, 0x74,
-0x02, 0xF0, 0x90, 0x88, 0x4E, 0x74, 0x10, 0xF0,
-0xA3, 0x74, 0x50, 0xF0, 0x51, 0xBD, 0x90, 0x8A,
-0x89, 0x12, 0x8B, 0xCF, 0x12, 0x8F, 0xD4, 0x90,
-0x8A, 0x89, 0x12, 0x8B, 0xCF, 0x7D, 0x0C, 0x7F,
-0x02, 0x12, 0x04, 0x7E, 0x90, 0x8A, 0x89, 0x12,
-0x8B, 0xCF, 0x7D, 0x0C, 0x7F, 0x01, 0x12, 0x04,
-0x7E, 0x90, 0x86, 0xB3, 0xE0, 0xFF, 0xB4, 0x01,
-0x08, 0x90, 0x88, 0x41, 0x74, 0xDD, 0xF0, 0x80,
-0x18, 0xEF, 0xB4, 0x03, 0x0F, 0x90, 0x88, 0x41,
-0x74, 0xF4, 0xF0, 0x90, 0x00, 0x92, 0xE0, 0x54,
-0x7F, 0xF0, 0x80, 0x05, 0xE4, 0x90, 0x88, 0x41,
-0xF0, 0x90, 0x00, 0x79, 0xE0, 0x54, 0x03, 0xFF,
-0xBF, 0x02, 0x0D, 0x90, 0x00, 0x28, 0xE0, 0x30,
-0xE2, 0x06, 0x90, 0x88, 0x53, 0x74, 0x02, 0xF0,
-0x90, 0x88, 0x93, 0x74, 0x02, 0xF0, 0xA3, 0x74,
-0x0F, 0xF0, 0xA3, 0xE0, 0x54, 0x01, 0x44, 0x28,
-0xF0, 0xA3, 0x74, 0x07, 0xF0, 0x7E, 0x00, 0x7F,
-0x18, 0x7D, 0x00, 0x7B, 0x01, 0x7A, 0x93, 0x79,
-0x3F, 0x12, 0x04, 0x80, 0x90, 0x8A, 0xA3, 0x12,
-0x8B, 0xCF, 0x7F, 0x01, 0x12, 0x04, 0x7E, 0x51,
-0x95, 0x7E, 0x00, 0xFF, 0x7D, 0x00, 0x7B, 0x01,
-0x7A, 0x88, 0x79, 0x9A, 0x12, 0x04, 0x80, 0x51,
-0x9C, 0x90, 0x06, 0x0A, 0xE0, 0x54, 0xF8, 0xF0,
-0x90, 0x05, 0x22, 0xE4, 0xF0, 0x90, 0x88, 0x9C,
-0xF0, 0x22, 0x7E, 0x00, 0x7F, 0x04, 0x7D, 0x00,
-0x7B, 0x01, 0x7A, 0x93, 0x79, 0x3B, 0x22, 0xE4,
-0xFD, 0xFF, 0x02, 0x6E, 0x71, 0x90, 0x05, 0x58,
-0x74, 0x02, 0xF0, 0x22, 0x90, 0x06, 0x04, 0xE0,
-0x54, 0x7F, 0xF0, 0x22, 0x7A, 0x81, 0x79, 0xB1,
-0x90, 0x89, 0x46, 0x02, 0x86, 0x42, 0x7E, 0x00,
-0x7F, 0x8E, 0x7D, 0x00, 0x7B, 0x01, 0x7A, 0x93,
-0x79, 0x58, 0x02, 0x04, 0x80, 0x90, 0x88, 0x8D,
-0x74, 0x18, 0xF0, 0xA3, 0xF0, 0xA3, 0xE4, 0xF0,
-0xA3, 0x74, 0x64, 0xF0, 0xA3, 0x74, 0x05, 0xF0,
-0xA3, 0xF0, 0x22, 0x90, 0x00, 0x80, 0xE0, 0x44,
-0x80, 0xF0, 0x12, 0xE0, 0x2D, 0xF1, 0x9A, 0x12,
-0x7B, 0x79, 0x12, 0xCA, 0x12, 0x71, 0x4C, 0x7F,
-0x01, 0x12, 0x84, 0x15, 0x90, 0x93, 0x57, 0x74,
-0x02, 0xF0, 0xFF, 0x12, 0x84, 0x15, 0x90, 0x93,
-0x57, 0xE0, 0x04, 0xF0, 0x71, 0x5E, 0x31, 0x52,
-0x90, 0x00, 0x80, 0xE0, 0x44, 0x40, 0xF0, 0x75,
-0x20, 0xFF, 0x12, 0x7C, 0x97, 0x90, 0x01, 0xA0,
-0xE0, 0xB4, 0xFD, 0x05, 0xE4, 0xFF, 0x12, 0x8B,
-0xD8, 0x71, 0xA4, 0x90, 0x00, 0x81, 0xE0, 0x44,
-0x04, 0xF0, 0xF1, 0x84, 0x12, 0xC1, 0x0E, 0x90,
-0x00, 0xAA, 0xE0, 0x44, 0x02, 0xF0, 0xA3, 0xE0,
-0x44, 0x80, 0xF0, 0x90, 0x06, 0x0A, 0xE0, 0x44,
-0x10, 0xF0, 0x90, 0x07, 0xDB, 0xE0, 0x44, 0x80,
-0xF0, 0x90, 0x06, 0x0D, 0x74, 0xFF, 0xF0, 0xE4,
-0xFF, 0x02, 0x84, 0x9E, 0xE4, 0x90, 0x86, 0xAF,
-0xF0, 0xF1, 0x7D, 0x90, 0x93, 0x01, 0xF0, 0x90,
-0x93, 0xF3, 0xF0, 0xA3, 0xF0, 0x22, 0x12, 0x7B,
-0x1B, 0x90, 0x86, 0xB3, 0xEF, 0xF0, 0x71, 0x78,
-0x90, 0x01, 0x64, 0x74, 0x01, 0xF0, 0x90, 0x04,
-0x23, 0xE0, 0x44, 0x80, 0xF0, 0x02, 0x67, 0xD2,
-0x71, 0xF2, 0x12, 0x76, 0x6D, 0x12, 0x75, 0xE0,
-0x12, 0xDF, 0xC7, 0x12, 0xE0, 0x02, 0x75, 0x21,
-0x80, 0xE4, 0xF5, 0x22, 0xF5, 0x23, 0x75, 0x24,
-0x80, 0x90, 0x00, 0x50, 0xE5, 0x21, 0xF0, 0xA3,
-0xE5, 0x22, 0xF0, 0xA3, 0xE5, 0x23, 0xF0, 0xA3,
-0xE5, 0x24, 0xF0, 0x22, 0xE4, 0x90, 0x95, 0x4E,
-0xF0, 0xA3, 0xF0, 0xF1, 0x8E, 0xEF, 0x64, 0x01,
-0x60, 0x39, 0xC3, 0x90, 0x95, 0x4F, 0xE0, 0x94,
-0x88, 0x90, 0x95, 0x4E, 0xE0, 0x94, 0x13, 0x40,
-0x0F, 0x90, 0x01, 0xC1, 0xE0, 0x44, 0x10, 0xF0,
-0x90, 0x01, 0xC7, 0x74, 0xFD, 0xF0, 0x80, 0x1B,
-0x90, 0x95, 0x4E, 0xB1, 0x0C, 0xD3, 0x90, 0x95,
-0x4F, 0xE0, 0x94, 0x32, 0x90, 0x95, 0x4E, 0xE0,
-0x94, 0x00, 0x40, 0xC7, 0x90, 0x01, 0xC6, 0xE0,
-0x30, 0xE3, 0xC0, 0x90, 0x01, 0xC7, 0x74, 0xFE,
-0xF0, 0x22, 0x90, 0x00, 0x08, 0xE0, 0x54, 0xEF,
-0xF0, 0x22, 0xE4, 0x90, 0x95, 0xA9, 0xF0, 0x12,
-0xE6, 0x17, 0x71, 0xF2, 0xE4, 0xFF, 0xD1, 0x48,
-0x90, 0x93, 0x3F, 0xE0, 0x20, 0xE0, 0x02, 0x81,
-0xF2, 0x90, 0x00, 0x02, 0xE0, 0x44, 0x02, 0xF0,
-0xE4, 0x90, 0x95, 0xAA, 0xF0, 0x90, 0x95, 0xAA,
-0xE0, 0xFF, 0xC3, 0x94, 0x05, 0x50, 0x2D, 0x12,
-0xBF, 0x92, 0x80, 0x05, 0xC3, 0x33, 0xCE, 0x33,
-0xCE, 0xD8, 0xF9, 0xFF, 0x90, 0x93, 0x42, 0xE0,
-0xFD, 0xEF, 0x5D, 0x60, 0x0F, 0x90, 0x95, 0xAA,
-0xD1, 0xAF, 0x90, 0x95, 0xAA, 0xD1, 0xCF, 0x44,
-0x40, 0xF0, 0xB1, 0x13, 0x90, 0x95, 0xAA, 0xE0,
-0x04, 0xF0, 0x80, 0xC9, 0x90, 0x07, 0xC7, 0xE4,
+0x22, 0x90, 0x95, 0x54, 0xE0, 0x04, 0xF0, 0x01,
+0x05, 0x22, 0xE0, 0xFF, 0x90, 0x97, 0x25, 0xE0,
+0xFE, 0x74, 0x01, 0xA8, 0x06, 0x22, 0xD3, 0x10,
+0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0x90, 0x97, 0x20,
+0x12, 0xAF, 0x7F, 0x51, 0xF3, 0x90, 0x97, 0x2B,
+0xF0, 0xE4, 0x90, 0x97, 0x28, 0xF0, 0x90, 0x97,
+0x20, 0x12, 0xB5, 0x8F, 0x90, 0x97, 0x23, 0xF0,
+0xEF, 0x54, 0x07, 0x90, 0x97, 0x25, 0x51, 0x0F,
+0xE0, 0x90, 0x97, 0x26, 0xF0, 0x12, 0xBF, 0x58,
+0x54, 0x7F, 0x90, 0x97, 0x29, 0xF0, 0x90, 0x97,
+0x20, 0xE0, 0x12, 0xBF, 0x74, 0xE0, 0x90, 0x97,
+0x2A, 0xF0, 0xED, 0x54, 0x7F, 0x90, 0x97, 0x24,
+0xF0, 0xEB, 0x70, 0x21, 0x90, 0x89, 0x3D, 0x51,
+0x29, 0xFF, 0x51, 0xE7, 0xFD, 0x90, 0x89, 0x40,
+0x12, 0xA7, 0x1F, 0x2D, 0xFF, 0xE4, 0x35, 0xF0,
+0xC3, 0x13, 0xFE, 0xEF, 0x13, 0xFF, 0x90, 0x97,
+0x20, 0xE0, 0x12, 0xBA, 0x6C, 0x90, 0x97, 0x29,
+0xE0, 0xFF, 0x90, 0x97, 0x24, 0xE0, 0xFE, 0xD3,
+0x9F, 0x40, 0x0C, 0x90, 0x97, 0x21, 0xE0, 0x54,
+0x80, 0xFD, 0xEF, 0x4D, 0xF0, 0x80, 0x0F, 0x90,
+0x97, 0x2A, 0xE0, 0xFF, 0xEE, 0xC3, 0x9F, 0x50,
+0x05, 0x90, 0x97, 0x21, 0xEF, 0xF0, 0x90, 0x97,
+0x21, 0xE0, 0xFE, 0x54, 0x7F, 0x90, 0x97, 0x24,
+0xF0, 0xEE, 0x54, 0x80, 0x90, 0x97, 0x27, 0xF0,
+0x90, 0x97, 0x22, 0xE0, 0x70, 0x21, 0xA3, 0xE0,
+0x51, 0x31, 0xC0, 0x83, 0xC0, 0x82, 0x11, 0xBA,
+0x08, 0x80, 0x02, 0xC3, 0x33, 0xD8, 0xFC, 0xF4,
+0x5F, 0xD0, 0x82, 0xD0, 0x83, 0xF0, 0x90, 0x97,
+0x26, 0xE0, 0x54, 0x7F, 0xF0, 0x80, 0x39, 0x90,
+0x97, 0x23, 0xE0, 0x51, 0x31, 0xC0, 0x83, 0xC0,
+0x82, 0x11, 0xBA, 0x08, 0x80, 0x02, 0xC3, 0x33,
+0xD8, 0xFC, 0x4F, 0xD0, 0x82, 0xD0, 0x83, 0x51,
+0x0F, 0xE0, 0x54, 0x07, 0xFF, 0x90, 0x97, 0x26,
+0xF0, 0x90, 0x89, 0x46, 0x51, 0x29, 0xF5, 0x82,
+0x12, 0xA7, 0x24, 0x33, 0x33, 0x33, 0x54, 0xF8,
+0x4F, 0x90, 0x97, 0x26, 0xF0, 0x44, 0x80, 0xF0,
+0x90, 0x97, 0x21, 0x51, 0x21, 0x12, 0xBD, 0x5A,
+0xEF, 0xF0, 0xEE, 0x70, 0x05, 0x90, 0x01, 0xC8,
+0xEF, 0xF0, 0x90, 0x97, 0x26, 0x51, 0x21, 0x51,
+0x14, 0xEF, 0xF0, 0xEE, 0x12, 0x97, 0xB1, 0xE0,
+0x54, 0xFC, 0xFF, 0x90, 0x97, 0x2B, 0xE0, 0x54,
+0x03, 0x4F, 0xFE, 0x90, 0x97, 0x20, 0xE0, 0xFF,
+0x12, 0x97, 0xB1, 0xEE, 0xF0, 0x7D, 0x01, 0x12,
+0x61, 0xF7, 0xD0, 0xD0, 0x92, 0xAF, 0x22, 0xF0,
+0x90, 0x97, 0x20, 0xE0, 0xC4, 0x54, 0xF0, 0x24,
+0x01, 0xF5, 0x82, 0xE4, 0x34, 0x81, 0xF5, 0x83,
+0x22, 0xE0, 0xFF, 0x90, 0x97, 0x20, 0xE0, 0xFE,
+0x22, 0x12, 0x86, 0x39, 0x90, 0x97, 0x24, 0xE0,
+0x22, 0x24, 0x6F, 0xF5, 0x82, 0xE4, 0x34, 0x8D,
+0xF5, 0x83, 0x22, 0xE6, 0xFD, 0xAF, 0x67, 0xEF,
+0x51, 0x14, 0xE0, 0x54, 0xF8, 0xF5, 0x75, 0xED,
+0x42, 0x75, 0xEF, 0x51, 0x14, 0xE5, 0x75, 0xF0,
+0x22, 0x90, 0x95, 0x54, 0xE0, 0xFF, 0xC3, 0x94,
+0x05, 0x22, 0x7B, 0x00, 0x7A, 0x00, 0x79, 0x00,
+0x90, 0x89, 0x2E, 0x12, 0x86, 0x42, 0x7B, 0xFF,
+0x7A, 0x80, 0x79, 0x80, 0x90, 0x89, 0x31, 0x12,
+0x86, 0x42, 0x7A, 0x80, 0x79, 0xBF, 0x90, 0x89,
+0x34, 0x12, 0x86, 0x42, 0x7A, 0x81, 0x79, 0x61,
+0x90, 0x89, 0x3A, 0x12, 0x86, 0x42, 0x7A, 0x81,
+0x79, 0x75, 0x90, 0x89, 0x3D, 0x12, 0x86, 0x42,
+0x7A, 0x81, 0x79, 0x9D, 0x90, 0x89, 0x40, 0x12,
+0x86, 0x42, 0x51, 0xDD, 0x7A, 0x81, 0x79, 0xD9,
+0x90, 0x89, 0x49, 0x12, 0x86, 0x42, 0x7A, 0x82,
+0x79, 0x01, 0x90, 0x89, 0x4C, 0x12, 0x86, 0x42,
+0xE4, 0x90, 0x96, 0x63, 0xF0, 0x90, 0x96, 0x52,
+0xF0, 0x90, 0x95, 0x54, 0xF0, 0x51, 0x51, 0x50,
+0x0F, 0x74, 0x74, 0x2F, 0x51, 0xD5, 0xE4, 0xF0,
+0x90, 0x95, 0x54, 0xE0, 0x04, 0xF0, 0x80, 0xED,
+0x22, 0x74, 0x74, 0x25, 0x67, 0xF5, 0x82, 0xE4,
+0x34, 0x96, 0xF5, 0x83, 0x22, 0x7A, 0x81, 0x79,
+0xB1, 0x90, 0x89, 0x46, 0x02, 0x86, 0x42, 0x75,
+0xF0, 0x02, 0xA4, 0xF5, 0x82, 0x85, 0xF0, 0x83,
+0x02, 0x03, 0x3E, 0x90, 0x86, 0xAD, 0xA3, 0xE0,
+0x24, 0x7F, 0xF5, 0x82, 0xE4, 0x34, 0x84, 0xF5,
+0x83, 0xE0, 0x22, 0xD3, 0x10, 0xAF, 0x01, 0xC3,
+0xC0, 0xD0, 0x51, 0xF3, 0x90, 0x97, 0x74, 0xF0,
+0x90, 0x88, 0x32, 0x12, 0x97, 0x34, 0x30, 0xE0,
+0x02, 0x61, 0xC9, 0x90, 0x88, 0x31, 0xE0, 0x30,
+0xE0, 0x1F, 0x90, 0x88, 0x53, 0xE0, 0x24, 0x04,
+0x33, 0x33, 0x33, 0x54, 0xF8, 0x90, 0x88, 0x4B,
+0xF0, 0x90, 0x88, 0x53, 0xE0, 0x04, 0x33, 0x33,
+0x33, 0x54, 0xF8, 0x90, 0x88, 0x4A, 0xF0, 0x80,
+0x10, 0x90, 0x88, 0x4B, 0x74, 0x10, 0xF0, 0x90,
+0x88, 0x4A, 0x74, 0x08, 0xF0, 0x74, 0x10, 0x2B,
+0xFB, 0x90, 0x88, 0x4A, 0xE0, 0xFE, 0x90, 0x88,
+0x49, 0xE0, 0xD3, 0x9E, 0x50, 0x0E, 0x90, 0x88,
+0x3E, 0xEB, 0xF0, 0x90, 0x88, 0x4B, 0xE0, 0xC3,
+0x9D, 0x2F, 0x80, 0x11, 0xC3, 0xED, 0x9E, 0x2B,
+0x90, 0x88, 0x3E, 0xF0, 0x90, 0x88, 0x4A, 0xE0,
+0xFF, 0xA3, 0xE0, 0xC3, 0x9F, 0x90, 0x88, 0x4E,
+0xF0, 0x90, 0x88, 0x4B, 0x71, 0xD5, 0x90, 0x88,
+0x4E, 0x71, 0xDE, 0x40, 0x04, 0xEF, 0x24, 0x50,
+0xF0, 0x90, 0x88, 0x4E, 0x71, 0xD5, 0x90, 0x88,
+0x3E, 0x71, 0xDE, 0x40, 0x04, 0xEF, 0x24, 0x50,
+0xF0, 0x90, 0x88, 0x4E, 0x12, 0x9D, 0xD9, 0xFF,
+0x7E, 0x00, 0x90, 0x88, 0x42, 0xEE, 0xF0, 0xA3,
+0xEF, 0xF0, 0x90, 0x05, 0x58, 0xF0, 0x90, 0x88,
+0x4E, 0xE0, 0x54, 0x07, 0xFF, 0x90, 0x05, 0xB1,
+0xE0, 0x54, 0xF8, 0x4F, 0xF0, 0x71, 0xE9, 0x80,
+0x07, 0x90, 0x88, 0x33, 0xE0, 0x44, 0x01, 0xF0,
+0xD0, 0xD0, 0x92, 0xAF, 0x22, 0xE0, 0xFF, 0x24,
+0x50, 0xFD, 0xE4, 0x33, 0xFC, 0x22, 0xE0, 0xD3,
+0x9D, 0xEC, 0x64, 0x80, 0xF8, 0x74, 0x80, 0x98,
+0x22, 0x90, 0x88, 0x33, 0xE0, 0x54, 0xFE, 0xF0,
+0x22, 0x90, 0x88, 0xB8, 0xE0, 0x30, 0xE0, 0x05,
+0x90, 0x8A, 0x8F, 0x80, 0x03, 0x90, 0x8A, 0x87,
+0x12, 0x8A, 0x66, 0x90, 0x88, 0xE6, 0xE0, 0x30,
+0xE0, 0x04, 0xA3, 0xE0, 0x04, 0xF0, 0x90, 0x88,
+0xE7, 0xE0, 0x64, 0x08, 0x70, 0x20, 0x90, 0x88,
+0xE6, 0xE0, 0x30, 0xE0, 0x14, 0xD1, 0x47, 0xF0,
+0xE4, 0xFD, 0x12, 0x76, 0xF7, 0x90, 0x88, 0xE6,
+0xE0, 0x54, 0xFE, 0xF0, 0xE4, 0xA3, 0xF0, 0x80,
+0x05, 0xE4, 0x90, 0x88, 0xE7, 0xF0, 0x90, 0x88,
+0xA1, 0x12, 0xC3, 0x4D, 0x30, 0xE0, 0x13, 0x90,
+0x88, 0xE8, 0xE0, 0x04, 0xF0, 0xE0, 0xB4, 0x14,
+0x09, 0x90, 0x04, 0x9C, 0xE4, 0xF0, 0x90, 0x88,
+0xE8, 0xF0, 0x90, 0x88, 0x2C, 0xE0, 0x30, 0xE0,
+0x06, 0x90, 0x88, 0x2E, 0x74, 0x01, 0xF0, 0x90,
+0x88, 0x36, 0xE0, 0x60, 0x7D, 0x90, 0x88, 0x4D,
+0xE0, 0x04, 0xF0, 0x90, 0x05, 0x61, 0x12, 0x9D,
+0x34, 0x90, 0x05, 0x60, 0x12, 0x8F, 0xEC, 0x12,
+0x86, 0x20, 0xC0, 0x04, 0xC0, 0x05, 0xC0, 0x06,
+0xC0, 0x07, 0x90, 0x05, 0x62, 0x12, 0x8F, 0xEC,
+0x78, 0x10, 0x12, 0x03, 0xFE, 0xD0, 0x03, 0xD0,
+0x02, 0xD0, 0x01, 0xD0, 0x00, 0x12, 0x86, 0x20,
+0xC0, 0x04, 0xC0, 0x05, 0xC0, 0x06, 0xC0, 0x07,
+0xA3, 0x12, 0x8F, 0xEC, 0x78, 0x18, 0x12, 0x03,
+0xFE, 0xD0, 0x03, 0xD0, 0x02, 0xD0, 0x01, 0xD0,
+0x00, 0x12, 0x86, 0x20, 0x90, 0x88, 0x81, 0x12,
+0x04, 0x31, 0x90, 0x88, 0x32, 0xE0, 0x54, 0x7F,
+0xF0, 0xA3, 0xE0, 0x30, 0xE0, 0x0A, 0xB1, 0x0C,
+0x74, 0x05, 0xF0, 0x12, 0x6E, 0x2F, 0x71, 0xE9,
+0x90, 0x88, 0x32, 0x12, 0x9D, 0xD9, 0x30, 0xE0,
+0x09, 0x90, 0x01, 0x3B, 0xE0, 0x30, 0xE4, 0x02,
+0x91, 0xFE, 0x90, 0x8A, 0xE5, 0x12, 0x90, 0x4B,
+0x7F, 0x01, 0x12, 0x04, 0x7E, 0x90, 0x93, 0x3B,
+0xE0, 0x30, 0xE0, 0x09, 0x90, 0x01, 0x3B, 0xE0,
+0x30, 0xE4, 0x02, 0x91, 0xFE, 0x22, 0x7D, 0x02,
+0x7F, 0x02, 0x12, 0x7C, 0x7E, 0x7D, 0x01, 0x7F,
+0x02, 0x02, 0x7C, 0x7E, 0x90, 0x88, 0x48, 0xE0,
+0xFF, 0xA3, 0xE0, 0xFD, 0x90, 0x88, 0x4F, 0xE0,
+0xFB, 0x90, 0x92, 0x98, 0x22, 0xB1, 0x70, 0x90,
+0x96, 0x1B, 0xEF, 0xF0, 0x20, 0xE0, 0x06, 0x90,
+0x01, 0x3D, 0x74, 0x01, 0xF0, 0x90, 0x96, 0x1B,
+0xE0, 0x90, 0x8A, 0x89, 0x30, 0xE0, 0x13, 0x12,
+0x90, 0x4B, 0x7D, 0x01, 0xE4, 0xFF, 0x12, 0x04,
+0x7E, 0x90, 0x88, 0x33, 0xE0, 0x44, 0x04, 0xF0,
+0x80, 0x06, 0x12, 0x90, 0x4B, 0x12, 0x97, 0x87,
+0x90, 0x96, 0x1B, 0xE0, 0x30, 0xE6, 0x11, 0x90,
+0x01, 0x2F, 0xE0, 0x30, 0xE7, 0x04, 0xE4, 0xF0,
+0x80, 0x06, 0x90, 0x01, 0x2F, 0x74, 0x80, 0xF0,
+0xB1, 0x0C, 0x74, 0x02, 0xF0, 0x02, 0x6E, 0x2F,
+0xE4, 0x90, 0x96, 0x1D, 0xF0, 0xA3, 0xF0, 0x7F,
+0x83, 0x12, 0x7B, 0x41, 0x90, 0x96, 0x1C, 0xEF,
+0xF0, 0x7F, 0x83, 0x12, 0x7B, 0x41, 0xAE, 0x07,
+0x90, 0x96, 0x1C, 0xE0, 0xFF, 0xB5, 0x06, 0x01,
+0x22, 0xC3, 0x90, 0x96, 0x1E, 0xE0, 0x94, 0x64,
+0x90, 0x96, 0x1D, 0xE0, 0x94, 0x00, 0x40, 0x0D,
+0x90, 0x01, 0xC0, 0xE0, 0x44, 0x40, 0xF0, 0x90,
+0x96, 0x1C, 0xE0, 0xFF, 0x22, 0x90, 0x96, 0x1D,
+0xB1, 0xB4, 0x80, 0xC3, 0xE4, 0x75, 0xF0, 0x01,
+0x02, 0x02, 0xE7, 0xE4, 0x90, 0x97, 0x58, 0xF0,
+0xA3, 0xF0, 0x90, 0x05, 0x22, 0xE0, 0x90, 0x97,
+0x5A, 0xF0, 0x7B, 0x47, 0x7D, 0xFF, 0xE4, 0xFF,
+0x12, 0x8F, 0x64, 0x90, 0x05, 0xF8, 0xE0, 0x70,
+0x1B, 0xA3, 0xE0, 0x70, 0x17, 0xA3, 0xE0, 0x70,
+0x13, 0xA3, 0xE0, 0x70, 0x0F, 0x90, 0x97, 0x5A,
+0xE0, 0xFD, 0x7B, 0x48, 0xE4, 0xFF, 0x12, 0x8F,
+0x64, 0x7F, 0x01, 0x22, 0x90, 0x88, 0xA1, 0x12,
+0xC3, 0x4D, 0x30, 0xE0, 0x19, 0xD3, 0x90, 0x97,
+0x59, 0xE0, 0x94, 0x03, 0x90, 0x97, 0x58, 0xE0,
+0x94, 0x00, 0x40, 0x06, 0xD1, 0x3A, 0x7B, 0x5A,
+0x80, 0x17, 0x7F, 0x01, 0x80, 0x18, 0xD3, 0x90,
+0x97, 0x59, 0xE0, 0x94, 0xE8, 0x90, 0x97, 0x58,
+0xE0, 0x94, 0x03, 0x40, 0x07, 0xD1, 0x3A, 0x7B,
+0x5B, 0x02, 0x8F, 0x58, 0x7F, 0x32, 0x7E, 0x00,
+0x12, 0x7C, 0x6A, 0x90, 0x97, 0x58, 0xB1, 0xB4,
+0x80, 0x99, 0x90, 0x01, 0xC0, 0xE0, 0x44, 0x20,
+0xF0, 0x90, 0x97, 0x5A, 0xE0, 0xFD, 0x22, 0x90,
+0x88, 0xA0, 0xE0, 0xC4, 0x13, 0x13, 0x54, 0x01,
+0xFF, 0x90, 0x88, 0xE0, 0xE0, 0xFB, 0x90, 0x88,
+0xDF, 0xE0, 0x90, 0x92, 0x90, 0x22, 0xE4, 0x90,
+0x95, 0xAF, 0xF0, 0x12, 0xE6, 0x67, 0xF1, 0xC6,
+0xE4, 0xFF, 0x12, 0xDB, 0xE4, 0x90, 0x93, 0x3F,
+0xE0, 0x20, 0xE0, 0x02, 0xE1, 0x5A, 0x90, 0x00,
+0x02, 0xE0, 0x44, 0x02, 0xF0, 0xE4, 0x90, 0x95,
+0xB0, 0xF0, 0x90, 0x95, 0xB0, 0xE0, 0xFF, 0xC3,
+0x94, 0x05, 0x50, 0x30, 0x12, 0xA7, 0x69, 0x80,
+0x05, 0xC3, 0x33, 0xCE, 0x33, 0xCE, 0xD8, 0xF9,
+0xFF, 0x90, 0x93, 0x42, 0xE0, 0xFD, 0xEF, 0x5D,
+0x60, 0x12, 0x90, 0x95, 0xB0, 0x12, 0xDC, 0x41,
+0x90, 0x95, 0xB0, 0x12, 0xDC, 0x61, 0x44, 0x40,
+0xF0, 0x12, 0xDC, 0x3A, 0x90, 0x95, 0xB0, 0xE0,
+0x04, 0xF0, 0x80, 0xC6, 0x90, 0x07, 0xC7, 0xE4,
 0xF0, 0x90, 0x07, 0xC6, 0xF0, 0x90, 0x07, 0xC5,
 0x74, 0x77, 0xF0, 0x90, 0x07, 0xC4, 0xE4, 0xF0,
 0x90, 0x07, 0xC0, 0x74, 0x38, 0xF0, 0xA3, 0xE4,
 0xF0, 0xA3, 0x74, 0x0F, 0xF0, 0xA3, 0x74, 0xC0,
 0xF0, 0x90, 0x02, 0x26, 0xE0, 0x44, 0x01, 0xF0,
-0xE0, 0x90, 0x95, 0xAB, 0xF0, 0x90, 0x95, 0xAB,
-0xE0, 0x30, 0xE0, 0x18, 0x90, 0x95, 0xA9, 0xE0,
-0x04, 0xF1, 0x73, 0x90, 0x02, 0x26, 0xE0, 0x90,
-0x95, 0xAB, 0xF0, 0x90, 0x95, 0xA9, 0xE0, 0xD3,
+0xE0, 0x90, 0x95, 0xB1, 0xF0, 0x90, 0x95, 0xB1,
+0xE0, 0x30, 0xE0, 0x18, 0x90, 0x95, 0xAF, 0xE0,
+0x04, 0xF1, 0xBE, 0x90, 0x02, 0x26, 0xE0, 0x90,
+0x95, 0xB1, 0xF0, 0x90, 0x95, 0xAF, 0xE0, 0xD3,
 0x94, 0xFA, 0x40, 0xE1, 0x90, 0x02, 0x03, 0x74,
 0x80, 0xF0, 0x90, 0x04, 0x24, 0xE0, 0x90, 0x95,
-0xAC, 0xF0, 0x90, 0x04, 0x22, 0xE0, 0x44, 0x10,
-0xF0, 0x90, 0x02, 0x00, 0xE0, 0x90, 0x95, 0xAB,
-0xF0, 0x90, 0x02, 0x01, 0xB1, 0x03, 0x90, 0x02,
-0x02, 0xB1, 0x03, 0x90, 0x02, 0x14, 0xB1, 0x03,
+0xB2, 0xF0, 0x90, 0x04, 0x22, 0xE0, 0x44, 0x10,
+0xF0, 0x90, 0x02, 0x00, 0xE0, 0x90, 0x95, 0xB1,
+0xF0, 0x90, 0x02, 0x01, 0xF1, 0x6A, 0x90, 0x02,
+0x02, 0xF1, 0x6A, 0x90, 0x02, 0x14, 0xF1, 0x6A,
 0xE0, 0x04, 0xF0, 0xE0, 0x90, 0x04, 0x24, 0xF0,
 0x90, 0x04, 0x22, 0xE0, 0x54, 0xEF, 0xF0, 0x90,
-0x95, 0xAC, 0xE0, 0x90, 0x04, 0x24, 0xF0, 0x90,
+0x95, 0xB2, 0xE0, 0x90, 0x04, 0x24, 0xF0, 0x90,
 0xFD, 0x09, 0x74, 0xFF, 0xF0, 0x90, 0xFD, 0x08,
-0xE4, 0xF0, 0x12, 0xCF, 0x4D, 0xF0, 0xE4, 0xFD,
-0x12, 0x76, 0xF7, 0x90, 0x88, 0x32, 0xE0, 0x54,
-0xEF, 0xF0, 0x22, 0xE0, 0xFF, 0x90, 0x95, 0xAB,
-0xE0, 0x2F, 0xF0, 0x22, 0xE4, 0x75, 0xF0, 0x01,
-0x12, 0x02, 0xE7, 0x7F, 0x14, 0x7E, 0x00, 0x02,
-0x7C, 0x6A, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0,
-0xD0, 0xB1, 0x2A, 0x71, 0xFA, 0xD0, 0xD0, 0x92,
-0xAF, 0x22, 0x75, 0x66, 0x14, 0x90, 0x88, 0x32,
-0xE0, 0x44, 0x10, 0xF0, 0x12, 0xCF, 0x4D, 0xF0,
-0x7D, 0x01, 0x12, 0x76, 0xF7, 0x90, 0x88, 0x41,
-0xE0, 0x90, 0x00, 0x93, 0xF0, 0x90, 0x88, 0x37,
-0xE0, 0x60, 0x12, 0x90, 0x01, 0x2F, 0xE0, 0x30,
-0xE7, 0x05, 0x74, 0x10, 0xF0, 0x80, 0x06, 0x90,
-0x01, 0x2F, 0x74, 0x90, 0xF0, 0x90, 0x93, 0x3F,
-0xE0, 0x30, 0xE0, 0x60, 0x90, 0xFD, 0x09, 0xE4,
-0xF0, 0x90, 0xFD, 0x08, 0xF0, 0x90, 0x0E, 0x4B,
-0xE0, 0x54, 0xFC, 0xF0, 0xE4, 0x90, 0x95, 0xA9,
-0xF0, 0x90, 0x95, 0xA9, 0xE0, 0xFF, 0xC3, 0x94,
-0x05, 0x50, 0x2D, 0x12, 0xBF, 0x92, 0x80, 0x05,
-0xC3, 0x33, 0xCE, 0x33, 0xCE, 0xD8, 0xF9, 0xFF,
-0x90, 0x93, 0x41, 0xE0, 0xFD, 0xEF, 0x5D, 0x60,
-0x0F, 0x90, 0x95, 0xA9, 0xD1, 0xAF, 0x90, 0x95,
-0xA9, 0xD1, 0xCF, 0x44, 0x20, 0xF0, 0xB1, 0x13,
-0x90, 0x95, 0xA9, 0xE0, 0x04, 0xF0, 0x80, 0xC9,
-0x90, 0x00, 0x92, 0xE0, 0x54, 0xFE, 0xF0, 0xE0,
-0x44, 0x08, 0xF0, 0x90, 0x00, 0x02, 0xE0, 0x54,
-0xFD, 0xF0, 0x80, 0x07, 0x90, 0x00, 0x92, 0xE0,
-0x44, 0x01, 0xF0, 0x90, 0x00, 0x08, 0xE0, 0x44,
-0x10, 0xF0, 0x7F, 0x01, 0xD1, 0x48, 0x90, 0x00,
-0x90, 0xE0, 0x44, 0x01, 0xF0, 0x00, 0x00, 0x00,
-0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-0x00, 0x7F, 0x14, 0x7E, 0x00, 0x02, 0x7C, 0x6A,
-0x90, 0x97, 0x36, 0xEF, 0xF0, 0xE4, 0xA3, 0xF0,
-0xA3, 0xF0, 0x90, 0x01, 0x09, 0xE0, 0x7F, 0x00,
-0x30, 0xE7, 0x02, 0x7F, 0x01, 0x90, 0x97, 0x36,
-0xE0, 0x6F, 0x60, 0x32, 0xC3, 0x90, 0x97, 0x38,
-0xE0, 0x94, 0x88, 0x90, 0x97, 0x37, 0xE0, 0x94,
-0x13, 0x40, 0x08, 0x90, 0x01, 0xC0, 0xE0, 0x44,
-0x10, 0xF0, 0x22, 0x90, 0x97, 0x37, 0xB1, 0x0C,
-0xD3, 0x90, 0x97, 0x38, 0xE0, 0x94, 0x32, 0x90,
-0x97, 0x37, 0xE0, 0x94, 0x00, 0x40, 0xC3, 0x90,
-0x01, 0xC6, 0xE0, 0x30, 0xE0, 0xBC, 0x22, 0x90,
-0x88, 0x39, 0xE0, 0xFF, 0x60, 0x03, 0xB4, 0x08,
-0x0D, 0xF1, 0x10, 0xBF, 0x01, 0x08, 0xB1, 0x1A,
-0x90, 0x01, 0xE5, 0xE0, 0x04, 0xF0, 0x22, 0xE0,
-0xFF, 0x24, 0x4D, 0xF5, 0x82, 0xE4, 0x34, 0x93,
-0xF5, 0x83, 0xE0, 0x90, 0x01, 0xB0, 0xF0, 0x74,
-0x52, 0x2F, 0xF5, 0x82, 0xE4, 0x34, 0x93, 0xF5,
-0x83, 0xE0, 0x90, 0x01, 0xB1, 0xF0, 0x22, 0xE0,
-0xFF, 0x24, 0x43, 0xF5, 0x82, 0xE4, 0x34, 0x93,
-0xF5, 0x83, 0xE0, 0x90, 0x01, 0xB2, 0xF0, 0x74,
-0x48, 0x2F, 0xF5, 0x82, 0xE4, 0x34, 0x93, 0xF5,
-0x83, 0xE0, 0x90, 0x01, 0xB3, 0xF0, 0xE0, 0x22,
-0x90, 0x88, 0x31, 0xE0, 0x30, 0xE0, 0x18, 0x90,
-0x88, 0x2C, 0xE0, 0xFF, 0x30, 0xE0, 0x0E, 0xC3,
-0x13, 0x30, 0xE0, 0x07, 0xF1, 0xA7, 0xBF, 0x01,
-0x06, 0x80, 0x02, 0x80, 0x00, 0xD1, 0x97, 0x22,
-0x90, 0x93, 0x3B, 0xE0, 0xC3, 0x13, 0x20, 0xE0,
-0x35, 0x90, 0x02, 0x87, 0xE0, 0x60, 0x02, 0x80,
-0x08, 0x90, 0x01, 0x00, 0xE0, 0x64, 0x3F, 0x60,
-0x05, 0x75, 0x66, 0x01, 0x80, 0x2E, 0x90, 0x02,
-0x96, 0xE0, 0x60, 0x05, 0x75, 0x66, 0x10, 0x80,
-0x23, 0x90, 0x02, 0x86, 0xE0, 0x20, 0xE1, 0x02,
-0x80, 0x07, 0x90, 0x02, 0x86, 0xE0, 0x30, 0xE3,
-0x05, 0x75, 0x66, 0x04, 0x80, 0x0E, 0x90, 0x88,
-0xE6, 0xE0, 0x30, 0xE0, 0x05, 0x75, 0x66, 0x20,
-0x80, 0x02, 0x80, 0x0F, 0x90, 0x01, 0xB9, 0x74,
-0x08, 0xF0, 0x90, 0x01, 0xB8, 0xE5, 0x66, 0xF0,
-0x7F, 0x00, 0x22, 0x90, 0x01, 0xB8, 0xE4, 0xF0,
-0x7F, 0x01, 0x22, 0xF0, 0x7F, 0x0A, 0x7E, 0x00,
-0x02, 0x7C, 0x6A, 0xF0, 0xE4, 0xA3, 0xF0, 0xA3,
-0xF0, 0xA3, 0xF0, 0x22, 0x90, 0x01, 0xE4, 0x74,
-0x29, 0xF0, 0xA3, 0xE4, 0xF0, 0x22, 0x90, 0x01,
-0x95, 0xE0, 0x7F, 0x00, 0x30, 0xE4, 0x02, 0x7F,
-0x01, 0x22, 0x90, 0x01, 0x94, 0xE0, 0x44, 0x01,
-0xF0, 0x90, 0x01, 0xC7, 0xE4, 0xF0, 0x22, 0x90,
-0x88, 0x2F, 0xE0, 0x64, 0x02, 0x7F, 0x01, 0x60,
-0x02, 0x7F, 0x00, 0x22, 0x12, 0x02, 0x06, 0x54,
-0x01, 0xFF, 0x90, 0x93, 0x3F, 0xE0, 0x54, 0xFE,
-0x4F, 0xF0, 0x30, 0xE0, 0x02, 0xF1, 0x7C, 0x22,
-0x12, 0x02, 0x06, 0xFF, 0x90, 0x93, 0xE6, 0xF0,
-0xBF, 0x01, 0x0A, 0x7F, 0x01, 0x12, 0x8B, 0xD8,
-0xE4, 0x90, 0x93, 0xE6, 0xF0, 0x22, 0xE4, 0xFD,
-0x02, 0x97, 0xE0, 0xEF, 0xB4, 0xFF, 0x06, 0x90,
-0x93, 0xF3, 0xED, 0xF0, 0x22, 0xEF, 0xF4, 0xFE,
-0x90, 0x93, 0xF3, 0x02, 0xAF, 0x9A, 0x12, 0x02,
-0x06, 0x64, 0x01, 0x70, 0x2C, 0x12, 0x87, 0xBC,
-0x90, 0x95, 0x4C, 0xF0, 0x12, 0x87, 0xB1, 0x90,
-0x95, 0x4D, 0x11, 0x38, 0x11, 0x40, 0x12, 0x79,
-0x53, 0x90, 0x01, 0x25, 0x74, 0x08, 0xF0, 0xFD,
-0x7F, 0x01, 0x12, 0x7B, 0xF7, 0x90, 0x05, 0x1F,
-0xE0, 0x54, 0xFC, 0x44, 0x08, 0xF0, 0x02, 0xC5,
-0xBA, 0x7D, 0x08, 0x7F, 0x01, 0x12, 0x7C, 0x2E,
-0x90, 0x05, 0x1F, 0xE0, 0x54, 0xF7, 0xF0, 0x22,
-0xF0, 0x7D, 0x42, 0xE4, 0xFF, 0x02, 0x7B, 0xBD,
-0xED, 0x44, 0x03, 0xFD, 0xEC, 0x90, 0x8B, 0x9F,
-0x12, 0x04, 0x31, 0x7D, 0x42, 0xE4, 0xFF, 0x22,
-0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0x90,
-0x01, 0xCC, 0xE0, 0x54, 0x0F, 0xFD, 0xED, 0x70,
-0x02, 0x21, 0x3B, 0x90, 0x87, 0x0B, 0xE0, 0xFF,
-0x70, 0x06, 0xA3, 0xE0, 0x64, 0x09, 0x60, 0x0A,
-0xEF, 0x14, 0xFF, 0x90, 0x87, 0x0C, 0xE0, 0xB5,
-0x07, 0x04, 0x7F, 0x01, 0x80, 0x02, 0x7F, 0x00,
-0xEF, 0x60, 0x09, 0x90, 0x01, 0xC1, 0xE0, 0x44,
-0x01, 0xF0, 0x21, 0x3B, 0x90, 0x97, 0x40, 0xE0,
-0x12, 0xBF, 0x91, 0x80, 0x05, 0xC3, 0x33, 0xCE,
-0x33, 0xCE, 0xD8, 0xF9, 0xFF, 0xED, 0xFB, 0xEF,
-0x5B, 0x60, 0x7B, 0xE4, 0xFC, 0x31, 0x41, 0xA4,
-0xFF, 0xEC, 0x7A, 0x00, 0x2F, 0xFF, 0xEA, 0x35,
-0xF0, 0xFE, 0x74, 0xD0, 0x31, 0x54, 0x90, 0x87,
-0x0C, 0xE0, 0xF9, 0x75, 0xF0, 0x08, 0x90, 0x86,
-0xBB, 0x31, 0x5F, 0xEF, 0x31, 0x40, 0xA4, 0xFF,
-0xEC, 0x2F, 0xFF, 0xEA, 0x35, 0xF0, 0xFE, 0x74,
-0xF0, 0x31, 0x54, 0x75, 0xF0, 0x08, 0xE9, 0x90,
-0x86, 0xBF, 0x31, 0x5F, 0xEF, 0xF0, 0x0C, 0xEC,
-0xB4, 0x04, 0xC2, 0x31, 0x49, 0x80, 0x02, 0xC3,
-0x33, 0xD8, 0xFC, 0xF4, 0x5D, 0xFD, 0x31, 0x49,
-0x80, 0x02, 0xC3, 0x33, 0xD8, 0xFC, 0x90, 0x01,
-0xCC, 0xF0, 0x90, 0x97, 0x40, 0xE0, 0x04, 0xF0,
-0xE0, 0x54, 0x03, 0xF0, 0x90, 0x87, 0x0C, 0xE0,
-0x04, 0xF0, 0xE0, 0x7F, 0x00, 0xB4, 0x0A, 0x02,
-0x7F, 0x01, 0xEF, 0x70, 0x02, 0x01, 0x5E, 0xE4,
-0x90, 0x87, 0x0C, 0xF0, 0x01, 0x5E, 0x90, 0x01,
-0xC0, 0xE0, 0x44, 0x02, 0xF0, 0x90, 0x97, 0x40,
-0xE0, 0x44, 0x80, 0x90, 0x00, 0x8A, 0x31, 0x40,
-0x90, 0x01, 0xD0, 0x12, 0x04, 0x6E, 0xE0, 0x90,
-0x01, 0xC3, 0xF0, 0xD0, 0xD0, 0x92, 0xAF, 0x22,
-0xF0, 0x90, 0x97, 0x40, 0xE0, 0x75, 0xF0, 0x04,
-0x22, 0x90, 0x97, 0x40, 0xE0, 0xFF, 0x74, 0x01,
-0xA8, 0x07, 0x08, 0x22, 0x2F, 0xF5, 0x82, 0x74,
-0x01, 0x3E, 0xF5, 0x83, 0xE0, 0xFF, 0x22, 0x12,
-0x04, 0x6E, 0xE5, 0x82, 0x2C, 0xF5, 0x82, 0xE4,
-0x35, 0x83, 0xF5, 0x83, 0x22, 0xD3, 0x10, 0xAF,
-0x01, 0xC3, 0xC0, 0xD0, 0x90, 0x96, 0xBB, 0xEF,
-0xF0, 0x90, 0x88, 0x2B, 0xE0, 0x90, 0x96, 0xCD,
-0xF0, 0xE4, 0x90, 0x96, 0xBC, 0xF0, 0x90, 0x96,
-0xCD, 0xE0, 0xFE, 0x90, 0x96, 0xBC, 0xE0, 0xFF,
-0xC3, 0x9E, 0x50, 0x2B, 0xE0, 0xFE, 0x51, 0x8D,
-0xE4, 0xF0, 0xEE, 0x51, 0xBD, 0xE0, 0x30, 0xE7,
-0x0A, 0x75, 0xF0, 0x12, 0xEF, 0x51, 0x97, 0xE4,
-0xF0, 0x80, 0x0C, 0x12, 0x7C, 0x8F, 0x90, 0x96,
-0xBC, 0xE0, 0x51, 0x8D, 0x74, 0x01, 0xF0, 0x90,
-0x96, 0xBC, 0xE0, 0x04, 0xF0, 0x80, 0xC7, 0x7F,
-0x0C, 0x7E, 0x00, 0x12, 0x7C, 0x6A, 0xE4, 0x90,
-0x96, 0xBC, 0xF0, 0x90, 0x96, 0xCD, 0xE0, 0xFF,
-0x90, 0x96, 0xBC, 0xE0, 0xFE, 0xC3, 0x9F, 0x40,
-0x02, 0x41, 0x88, 0x74, 0xBD, 0x2E, 0x51, 0x8F,
-0xE0, 0x70, 0x02, 0x41, 0x80, 0xEE, 0xC4, 0x54,
-0xF0, 0x24, 0x06, 0xF5, 0x82, 0xE4, 0x34, 0x81,
-0xF5, 0x83, 0xE0, 0xFD, 0xEE, 0xC4, 0x54, 0xF0,
-0x24, 0x07, 0xF5, 0x82, 0xE4, 0x34, 0x81, 0xF5,
-0x83, 0x51, 0x9D, 0xFC, 0x75, 0xF0, 0x12, 0x90,
-0x89, 0x53, 0x51, 0xA6, 0xEC, 0xC4, 0x54, 0xF0,
-0x24, 0x0A, 0xF5, 0x82, 0xE4, 0x34, 0x81, 0xF5,
-0x83, 0xE0, 0xFD, 0xEC, 0x51, 0xAF, 0x51, 0x9D,
-0x75, 0xF0, 0x12, 0x90, 0x89, 0x57, 0x51, 0xA6,
-0x7F, 0x01, 0x90, 0x96, 0xBC, 0xE0, 0xFE, 0x51,
-0xAF, 0xE5, 0x82, 0x2F, 0x31, 0x65, 0xE0, 0xFD,
-0x75, 0xF0, 0x12, 0xEE, 0x90, 0x89, 0x57, 0x12,
-0x04, 0x6E, 0x75, 0xF0, 0x02, 0xEF, 0x12, 0x9B,
-0x82, 0xED, 0xF0, 0x0F, 0xEF, 0xB4, 0x05, 0xDA,
-0x90, 0x96, 0xBC, 0xE0, 0xFF, 0xC4, 0x54, 0xF0,
-0x24, 0x09, 0xF5, 0x82, 0xE4, 0x34, 0x81, 0xF5,
-0x83, 0xE0, 0xFE, 0x71, 0xAF, 0xEE, 0xF0, 0x90,
-0x96, 0xBC, 0xE0, 0xFF, 0x90, 0x96, 0xBB, 0xE0,
-0xFD, 0x12, 0x61, 0xF7, 0x90, 0x96, 0xBC, 0xE0,
-0x75, 0xF0, 0x12, 0x51, 0x97, 0x74, 0x01, 0xF0,
-0x90, 0x96, 0xBC, 0xE0, 0x04, 0xF0, 0x21, 0xCB,
-0xD0, 0xD0, 0x92, 0xAF, 0x22, 0x24, 0xBD, 0xF5,
-0x82, 0xE4, 0x34, 0x96, 0xF5, 0x83, 0x22, 0x90,
-0x89, 0x56, 0x02, 0x04, 0x6E, 0xE0, 0xFE, 0xED,
-0xFF, 0x90, 0x96, 0xBC, 0xE0, 0x22, 0x12, 0x04,
-0x6E, 0xEE, 0xF0, 0xA3, 0xEF, 0xF0, 0x22, 0xC4,
-0x54, 0xF0, 0x24, 0x0B, 0xF5, 0x82, 0xE4, 0x34,
-0x81, 0xF5, 0x83, 0x22, 0xEF, 0xC4, 0x54, 0xF0,
-0x24, 0x03, 0xF5, 0x82, 0xE4, 0x34, 0x81, 0xF5,
-0x83, 0x22, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0,
-0xD0, 0x90, 0x97, 0x3B, 0xEF, 0xF0, 0x90, 0x00,
-0x8F, 0xE0, 0x30, 0xE6, 0x3B, 0x90, 0x00, 0x8D,
-0xE0, 0x64, 0x01, 0x70, 0x33, 0x90, 0x97, 0x3C,
-0xF0, 0x90, 0x97, 0x3C, 0xE0, 0xFD, 0x90, 0x97,
-0x3B, 0xE0, 0x12, 0x98, 0xBE, 0xE5, 0x82, 0x2D,
-0x31, 0x65, 0xE0, 0xFB, 0xE4, 0xFF, 0x71, 0x1D,
-0x90, 0x97, 0x3C, 0xE0, 0x04, 0xF0, 0xE0, 0xC3,
-0x94, 0x10, 0x40, 0xDD, 0x90, 0x00, 0x8F, 0xE0,
-0x30, 0xE0, 0x05, 0x90, 0x00, 0x8D, 0xE4, 0xF0,
-0xD0, 0xD0, 0x92, 0xAF, 0x22, 0xEF, 0x70, 0x04,
-0x74, 0xF0, 0x80, 0x16, 0xEF, 0xB4, 0x01, 0x04,
-0x74, 0xF4, 0x80, 0x0E, 0xEF, 0xB4, 0x02, 0x04,
-0x74, 0xF8, 0x80, 0x06, 0xEF, 0xB4, 0x03, 0x0C,
-0x74, 0xFC, 0x2D, 0xF5, 0x82, 0xE4, 0x34, 0x02,
-0xF5, 0x83, 0xEB, 0xF0, 0x22, 0xE4, 0xFB, 0xFA,
-0xFD, 0x7F, 0x01, 0x12, 0x85, 0x4E, 0x90, 0x95,
-0xD0, 0xEF, 0xF0, 0x60, 0xF0, 0x90, 0x86, 0xAF,
-0xE0, 0xFF, 0x70, 0x04, 0xA3, 0xE0, 0x60, 0xE5,
-0xC2, 0xAF, 0xEF, 0x30, 0xE0, 0x0E, 0x90, 0x86,
-0xAF, 0xE0, 0x54, 0xFE, 0xF0, 0xE4, 0xFF, 0x31,
-0x6D, 0x12, 0x9B, 0xA3, 0x71, 0xA2, 0x30, 0xE1,
-0x09, 0x54, 0xFD, 0xF0, 0x90, 0x86, 0x08, 0x12,
-0x92, 0x57, 0x71, 0xA2, 0x30, 0xE2, 0x09, 0x54,
-0xFB, 0xF0, 0x90, 0x86, 0x0A, 0x12, 0x92, 0x57,
-0x71, 0xA2, 0x30, 0xE6, 0x09, 0x54, 0xBF, 0xF0,
-0x90, 0x8A, 0x7D, 0x12, 0x92, 0x57, 0xD2, 0xAF,
-0x80, 0xB3, 0xD2, 0xAF, 0xC2, 0xAF, 0x90, 0x86,
-0xAF, 0xE0, 0x22, 0xE4, 0xFF, 0x21, 0x6D, 0x75,
-0xF0, 0x12, 0xEF, 0x90, 0x89, 0x55, 0x02, 0x04,
-0x6E, 0xC0, 0xE0, 0xC0, 0xF0, 0xC0, 0x83, 0xC0,
-0x82, 0xC0, 0xD0, 0x75, 0xD0, 0x00, 0xC0, 0x00,
-0xC0, 0x01, 0xC0, 0x02, 0xC0, 0x03, 0xC0, 0x04,
-0xC0, 0x05, 0xC0, 0x06, 0xC0, 0x07, 0x90, 0x01,
-0xC4, 0x74, 0xB9, 0xF0, 0x74, 0xDB, 0xA3, 0xF0,
-0x12, 0x64, 0x7F, 0xE5, 0x30, 0x30, 0xE1, 0x03,
-0x12, 0xB7, 0x74, 0xE5, 0x2D, 0x30, 0xE1, 0x03,
-0x12, 0xC7, 0xD0, 0xE5, 0x2D, 0x30, 0xE4, 0x02,
-0xB1, 0xE6, 0xE5, 0x2D, 0x30, 0xE5, 0x02, 0xB1,
-0xF7, 0xE5, 0x2D, 0x30, 0xE6, 0x02, 0xB1, 0xBF,
-0xE5, 0x2F, 0x30, 0xE0, 0x02, 0x91, 0xCA, 0xE5,
-0x2F, 0x30, 0xE1, 0x03, 0x12, 0xCE, 0x05, 0xE5,
-0x2F, 0x30, 0xE2, 0x02, 0xB1, 0x2F, 0xE5, 0x2F,
-0x30, 0xE3, 0x03, 0x12, 0xA7, 0x70, 0xE5, 0x2F,
-0x30, 0xE4, 0x02, 0x91, 0xA6, 0xE5, 0x2F, 0x30,
-0xE5, 0x02, 0x91, 0xF2, 0xE5, 0x2F, 0x30, 0xE6,
-0x03, 0x12, 0xB7, 0x5D, 0xE5, 0x30, 0x30, 0xE4,
-0x02, 0x71, 0xAB, 0xE5, 0x30, 0x30, 0xE5, 0x02,
-0x91, 0x9E, 0xE5, 0x36, 0x30, 0xE3, 0x03, 0x12,
-0xC7, 0xCE, 0xE5, 0x36, 0x30, 0xE0, 0x03, 0x12,
-0xBA, 0xB5, 0xE5, 0x36, 0x30, 0xE6, 0x03, 0x12,
-0xBA, 0x34, 0xE5, 0x36, 0x30, 0xE7, 0x03, 0x12,
-0xBF, 0xCC, 0xE5, 0x37, 0x30, 0xE2, 0x02, 0xB1,
-0xCC, 0xE5, 0x37, 0x30, 0xE3, 0x02, 0xB1, 0xD9,
-0x74, 0xB9, 0x04, 0x90, 0x01, 0xC4, 0xF0, 0x74,
-0xDB, 0xA3, 0xF0, 0xD0, 0x07, 0xD0, 0x06, 0xD0,
-0x05, 0xD0, 0x04, 0xD0, 0x03, 0xD0, 0x02, 0xD0,
-0x01, 0xD0, 0x00, 0xD0, 0xD0, 0xD0, 0x82, 0xD0,
-0x83, 0xD0, 0xF0, 0xD0, 0xE0, 0x32, 0x90, 0x8A,
-0xDF, 0xB1, 0x27, 0x02, 0x04, 0x7A, 0x12, 0xA7,
-0x5D, 0x70, 0x1E, 0x90, 0x88, 0x36, 0xE0, 0x60,
-0x18, 0x90, 0x88, 0x3A, 0xE0, 0x20, 0xE4, 0x11,
-0xB1, 0xB4, 0xF0, 0x90, 0x88, 0x31, 0xE0, 0x12,
-0xB7, 0xBE, 0x54, 0x07, 0x70, 0x03, 0x12, 0xB6,
-0xD9, 0x22, 0x90, 0x88, 0x2C, 0xE0, 0x30, 0xE0,
-0x11, 0xA3, 0x74, 0x01, 0xF0, 0x90, 0x88, 0x2C,
-0xE0, 0xFF, 0xC3, 0x13, 0x30, 0xE0, 0x03, 0x12,
-0xA7, 0x87, 0x12, 0xA5, 0x90, 0xE4, 0xFF, 0xD1,
-0x33, 0x90, 0x8B, 0x07, 0x12, 0x92, 0x57, 0x02,
-0xC3, 0x67, 0x90, 0x88, 0x9D, 0xE0, 0x30, 0xE0,
-0x0D, 0x90, 0x95, 0x44, 0xE0, 0xFF, 0x12, 0x96,
-0x95, 0x30, 0xE0, 0x02, 0x80, 0x7E, 0xE4, 0xFF,
-0x12, 0x78, 0x4A, 0xBF, 0x01, 0x18, 0x90, 0x88,
-0x36, 0xE0, 0x60, 0x12, 0x12, 0xB5, 0xA4, 0x64,
-0x02, 0x60, 0x08, 0x90, 0x8A, 0xE1, 0xB1, 0x27,
-0x02, 0x04, 0x7A, 0x12, 0x73, 0x8F, 0x22, 0xE0,
-0xFE, 0xA3, 0xE0, 0xAA, 0x06, 0xF9, 0x22, 0x90,
-0x88, 0x2C, 0xE0, 0xFF, 0x30, 0xE0, 0x05, 0x12,
-0xB3, 0xFA, 0x60, 0x3B, 0x90, 0x88, 0x36, 0xE0,
-0x70, 0x04, 0xEF, 0x30, 0xE0, 0x1D, 0x90, 0x88,
-0x39, 0xE0, 0x64, 0x02, 0x60, 0x29, 0x90, 0x88,
-0x9D, 0xE0, 0x30, 0xE0, 0x0B, 0x90, 0x95, 0x44,
-0xE0, 0xFF, 0x12, 0x96, 0x95, 0x20, 0xE0, 0x03,
-0x12, 0x88, 0x35, 0x90, 0x88, 0x9D, 0xE0, 0x30,
-0xE0, 0x0D, 0x90, 0x95, 0x44, 0xE0, 0xFF, 0x12,
-0x96, 0x95, 0x30, 0xE0, 0x02, 0xB1, 0x78, 0x22,
-0x90, 0x06, 0xA9, 0xE0, 0xF5, 0x7C, 0x30, 0xE6,
-0x02, 0xB1, 0x84, 0x22, 0x90, 0x88, 0x9D, 0xE0,
-0x30, 0xE0, 0x28, 0x12, 0x96, 0x91, 0x30, 0xE0,
-0x22, 0x90, 0x88, 0xAF, 0xE0, 0xFF, 0x70, 0x0A,
-0xEF, 0x70, 0x18, 0x90, 0x88, 0xA0, 0xE0, 0x30,
-0xE0, 0x11, 0x90, 0x06, 0x04, 0xE0, 0x44, 0x40,
-0xF0, 0xE0, 0x44, 0x80, 0xF0, 0x90, 0x8A, 0xE1,
-0x12, 0x92, 0x57, 0x22, 0x90, 0x01, 0x57, 0xE4,
-0xF0, 0x90, 0x01, 0x3C, 0x74, 0x02, 0x22, 0x90,
-0x88, 0x2C, 0xE0, 0x30, 0xE0, 0x05, 0xE4, 0xA3,
-0xF0, 0xA3, 0xF0, 0x22, 0x90, 0x93, 0x03, 0xE0,
-0x30, 0xE0, 0x05, 0x7F, 0x02, 0x12, 0xBF, 0xAE,
-0x22, 0x90, 0x93, 0x03, 0xE0, 0x30, 0xE0, 0x05,
-0x7F, 0x03, 0x12, 0xBF, 0xAE, 0x22, 0x90, 0x8A,
-0x75, 0x12, 0x92, 0x57, 0x90, 0x8A, 0xE5, 0x12,
-0x8B, 0xCF, 0x7F, 0x02, 0x02, 0x04, 0x7E, 0x90,
-0x01, 0xCF, 0xE0, 0x90, 0x95, 0xE7, 0xF0, 0xE0,
-0xFF, 0x30, 0xE0, 0x07, 0x90, 0x01, 0xCF, 0xE0,
-0x54, 0xFE, 0xF0, 0xEF, 0x30, 0xE5, 0x23, 0x90,
-0x01, 0xCF, 0xE0, 0x54, 0xDF, 0xF0, 0x90, 0x01,
-0x34, 0x74, 0x20, 0xF0, 0xE4, 0xF5, 0xA8, 0xF5,
-0xE8, 0x12, 0x76, 0x6D, 0x90, 0x00, 0x03, 0xE0,
-0x54, 0xFB, 0xFD, 0x7F, 0x03, 0x12, 0x7B, 0x2E,
-0x80, 0xFE, 0x22, 0xD3, 0x10, 0xAF, 0x01, 0xC3,
-0xC0, 0xD0, 0x90, 0x88, 0x33, 0xE0, 0xC3, 0x13,
-0x30, 0xE0, 0x28, 0x90, 0x96, 0x98, 0x74, 0x1E,
-0xF0, 0x90, 0x96, 0xBA, 0x74, 0x01, 0xF0, 0x90,
-0x96, 0x9A, 0xEF, 0xF0, 0x7B, 0x01, 0x7A, 0x96,
-0x79, 0x98, 0x12, 0xC7, 0x0B, 0x12, 0x04, 0x7E,
-0x90, 0x8A, 0xE5, 0x12, 0x8B, 0xCF, 0x7F, 0x04,
-0x12, 0x04, 0x7E, 0xD0, 0xD0, 0x92, 0xAF, 0x22,
-0x02, 0x96, 0x9C, 0xE4, 0x90, 0x95, 0xA6, 0xF0,
-0xA3, 0xF0, 0xA3, 0xF0, 0x90, 0x95, 0xA6, 0xE0,
-0x64, 0x01, 0xF0, 0x90, 0x93, 0xF0, 0xE0, 0x70,
-0x18, 0x90, 0x93, 0xED, 0xE0, 0x70, 0x12, 0xA3,
-0xE0, 0x70, 0x0E, 0x90, 0x95, 0xA6, 0xE0, 0x24,
-0x73, 0x90, 0x01, 0xC4, 0xF0, 0x74, 0xDE, 0xA3,
-0xF0, 0x12, 0x7C, 0x54, 0xBF, 0x01, 0x03, 0x12,
-0x54, 0x9F, 0x90, 0x88, 0x36, 0xE0, 0x60, 0x0F,
-0x90, 0x88, 0x39, 0xE0, 0xFF, 0x90, 0x88, 0x38,
-0xE0, 0x6F, 0x60, 0x03, 0x12, 0xB6, 0xD9, 0xC2,
-0xAF, 0xF1, 0x8B, 0xBF, 0x01, 0x03, 0x12, 0xD6,
-0xF0, 0xD2, 0xAF, 0xD1, 0xD4, 0xD1, 0x70, 0x12,
-0x83, 0x4D, 0x80, 0xA8, 0xD3, 0x10, 0xAF, 0x01,
-0xC3, 0xC0, 0xD0, 0x90, 0x93, 0xED, 0xE0, 0x60,
-0x25, 0x7F, 0x54, 0x7E, 0x09, 0x12, 0x70, 0x70,
-0xF1, 0x81, 0x12, 0x04, 0xB8, 0xEF, 0x44, 0xFE,
-0xFF, 0xEE, 0x44, 0x03, 0xFE, 0xED, 0x44, 0x04,
-0xFD, 0xEC, 0xF1, 0x81, 0x12, 0xAF, 0xDC, 0x7F,
-0x54, 0x7E, 0x09, 0x12, 0x70, 0xAD, 0x90, 0x93,
-0xE8, 0xE0, 0x70, 0x29, 0x90, 0x07, 0xCC, 0xE0,
-0x30, 0xE0, 0x22, 0xE4, 0xF0, 0x90, 0x95, 0xAD,
-0x74, 0x22, 0xF0, 0x90, 0x95, 0xCF, 0x74, 0x01,
-0xF0, 0x90, 0x95, 0xAF, 0x74, 0x03, 0xF0, 0x7B,
-0x01, 0x7A, 0x95, 0x79, 0xAD, 0x12, 0x8B, 0xBD,
-0x7F, 0x04, 0x12, 0x04, 0x7E, 0x90, 0x93, 0xF0,
-0xE0, 0xFF, 0x70, 0x0A, 0x90, 0x93, 0xED, 0xE0,
-0x70, 0x04, 0xA3, 0xE0, 0x60, 0x15, 0x90, 0x00,
-0x1F, 0xE0, 0x54, 0xF0, 0xF0, 0x90, 0x01, 0xC5,
-0x74, 0xEA, 0xF0, 0xA3, 0x74, 0xEF, 0xF0, 0xA3,
-0x74, 0xFD, 0xF0, 0xEF, 0x60, 0x06, 0x90, 0x01,
-0xC4, 0x74, 0x07, 0xF0, 0x90, 0x93, 0xED, 0xE0,
-0x60, 0x06, 0x90, 0x01, 0xC4, 0x74, 0x01, 0xF0,
-0x90, 0x93, 0xEE, 0xE0, 0x60, 0x06, 0x90, 0x01,
-0xC4, 0x74, 0x02, 0xF0, 0xD0, 0xD0, 0x92, 0xAF,
-0x22, 0x90, 0x95, 0xA9, 0x12, 0x04, 0x31, 0x90,
-0x95, 0xA9, 0x22, 0x7D, 0x02, 0x90, 0x01, 0xC4,
-0x74, 0x8B, 0xF0, 0x74, 0xDF, 0xA3, 0xF0, 0x90,
-0x93, 0x57, 0xE0, 0xFF, 0xED, 0xC3, 0x9F, 0x50,
-0x18, 0xED, 0x25, 0xE0, 0x24, 0x81, 0xF8, 0xE6,
-0x30, 0xE4, 0x0B, 0x90, 0x01, 0xB8, 0x74, 0x08,
-0xF0, 0xA3, 0xF0, 0x7F, 0x00, 0x22, 0x0D, 0x80,
-0xDE, 0x74, 0x8B, 0x04, 0x90, 0x01, 0xC4, 0xF0,
-0x74, 0xDF, 0xA3, 0xF0, 0x7F, 0x01, 0x22, 0x75,
-0x29, 0x12, 0xE4, 0xF5, 0x2A, 0x75, 0x2B, 0x07,
-0x75, 0x2C, 0x32, 0xF5, 0x31, 0x75, 0x32, 0xC1,
-0x75, 0x33, 0x0C, 0xF5, 0x34, 0x90, 0x01, 0x30,
-0xE5, 0x29, 0xF0, 0xA3, 0xE5, 0x2A, 0xF0, 0xA3,
-0xE5, 0x2B, 0xF0, 0xA3, 0xE5, 0x2C, 0xF0, 0x90,
-0x01, 0x20, 0xE5, 0x31, 0xF0, 0xA3, 0xE5, 0x32,
-0xF0, 0xA3, 0xE5, 0x33, 0xF0, 0xA3, 0xE5, 0x34,
-0xF0, 0x22, 0x75, 0x39, 0x07, 0x43, 0x39, 0x10,
-0x75, 0x3A, 0x01, 0x43, 0x3A, 0x08, 0x75, 0x3B,
-0x03, 0x75, 0x3C, 0x62, 0x43, 0x3C, 0x80, 0x43,
-0x3B, 0x04, 0x90, 0x01, 0x38, 0xE5, 0x39, 0xF0,
-0xA3, 0xE5, 0x3A, 0xF0, 0xA3, 0xE5, 0x3B, 0xF0,
-0xA3, 0xE5, 0x3C, 0xF0, 0x22, 0x90, 0x8A, 0x79,
+0xE4, 0xF0, 0xD1, 0x47, 0xF0, 0xE4, 0xFD, 0x12,
+0x76, 0xF7, 0x90, 0x88, 0x32, 0xE0, 0x54, 0xEF,
+0xF0, 0x22, 0xE0, 0xFF, 0x90, 0x95, 0xB1, 0xE0,
+0x2F, 0xF0, 0x22, 0xD3, 0x10, 0xAF, 0x01, 0xC3,
+0xC0, 0xD0, 0x12, 0xDA, 0xBF, 0xD1, 0x5E, 0xD0,
+0xD0, 0x92, 0xAF, 0x22, 0x90, 0x88, 0x39, 0xE0,
+0xFF, 0x60, 0x03, 0xB4, 0x08, 0x0E, 0x12, 0xEB,
+0xEB, 0xBF, 0x01, 0x08, 0xF1, 0x73, 0x90, 0x01,
+0xE5, 0xE0, 0x04, 0xF0, 0x22, 0x90, 0x88, 0x31,
+0xE0, 0x30, 0xE0, 0x19, 0x90, 0x88, 0x2C, 0xE0,
+0xFF, 0x30, 0xE0, 0x0F, 0xC3, 0x13, 0x30, 0xE0,
+0x08, 0x12, 0xEA, 0x3D, 0xBF, 0x01, 0x06, 0x80,
+0x02, 0x80, 0x00, 0xF1, 0x84, 0x22, 0xF0, 0x7F,
+0x0A, 0x7E, 0x00, 0x02, 0x7C, 0x6A, 0x90, 0x00,
+0x08, 0xE0, 0x54, 0xEF, 0xF0, 0x22, 0xF1, 0xC6,
+0x12, 0x76, 0x6D, 0x12, 0x75, 0xE0, 0x12, 0xD1,
+0x20, 0x12, 0xD1, 0x5B, 0x75, 0x21, 0x80, 0xE4,
+0xF5, 0x22, 0xF5, 0x23, 0x75, 0x24, 0x80, 0x90,
+0x00, 0x50, 0xE5, 0x21, 0xF0, 0xA3, 0xE5, 0x22,
+0xF0, 0xA3, 0xE5, 0x23, 0xF0, 0xA3, 0xE5, 0x24,
+0xF0, 0x22, 0x12, 0x02, 0x06, 0xFF, 0x90, 0x93,
+0xE6, 0xF0, 0xBF, 0x01, 0x0A, 0x7F, 0x01, 0x12,
+0x91, 0x9B, 0xE4, 0x90, 0x93, 0xE6, 0xF0, 0x22,
+0xE4, 0xFD, 0x02, 0x8F, 0xF5, 0x12, 0xA7, 0x4E,
+0x64, 0x01, 0x60, 0x02, 0x01, 0xA2, 0xEF, 0x24,
+0x39, 0x60, 0x12, 0x14, 0x60, 0x19, 0x24, 0x02,
+0x70, 0x1F, 0xE4, 0x90, 0x95, 0x5A, 0xF0, 0xA3,
+0x74, 0x06, 0xF0, 0x80, 0x14, 0x90, 0x95, 0x5A,
+0x74, 0x06, 0xF0, 0xA3, 0xF0, 0x80, 0x0A, 0x90,
+0x95, 0x5A, 0x74, 0x0C, 0xF0, 0xA3, 0x74, 0x04,
+0xF0, 0x11, 0xB6, 0xF0, 0x11, 0xA3, 0x40, 0x1C,
+0x90, 0x95, 0x58, 0xE0, 0x12, 0xAF, 0x88, 0x7A,
+0x95, 0x79, 0x57, 0x12, 0x5F, 0xA6, 0xBF, 0x01,
+0x07, 0x90, 0x95, 0x57, 0xE0, 0xF4, 0x70, 0x3A,
+0x11, 0xAB, 0x80, 0xE0, 0x11, 0xB6, 0xF0, 0x11,
+0xA3, 0x40, 0x2F, 0x90, 0x95, 0x58, 0xE0, 0xFD,
+0x7C, 0x00, 0x24, 0xA8, 0xFF, 0xEC, 0x34, 0x01,
+0xFE, 0xED, 0x24, 0x01, 0xFD, 0xEC, 0x33, 0xFC,
+0x90, 0x95, 0x5A, 0xE0, 0xFB, 0xC3, 0xED, 0x9B,
+0xFD, 0xEC, 0x94, 0x00, 0xFC, 0x12, 0x87, 0xEB,
+0x12, 0xA6, 0xEB, 0xFD, 0x11, 0xC6, 0x11, 0xAB,
+0x80, 0xCD, 0x22, 0x90, 0x95, 0x59, 0xE0, 0xD3,
+0x94, 0x00, 0x22, 0x90, 0x95, 0x58, 0xE0, 0x04,
+0xF0, 0xA3, 0xE0, 0x14, 0xF0, 0x22, 0x90, 0x95,
+0x5A, 0xE0, 0x90, 0x95, 0x58, 0xF0, 0x90, 0x95,
+0x5B, 0xE0, 0x90, 0x95, 0x59, 0x22, 0xE4, 0x90,
+0x95, 0x5C, 0xF0, 0x90, 0x00, 0x37, 0xE0, 0x44,
+0x80, 0xF0, 0x90, 0x00, 0xCF, 0x74, 0x69, 0xF0,
+0xEF, 0x90, 0x00, 0x31, 0xF0, 0xEE, 0x54, 0x03,
+0xFF, 0xA3, 0xE0, 0x54, 0xFC, 0x4F, 0xF0, 0x90,
+0x00, 0x30, 0xED, 0xF0, 0x90, 0x00, 0x33, 0xE0,
+0x44, 0x80, 0xF0, 0x90, 0x00, 0x33, 0xE0, 0x30,
+0xE7, 0x09, 0x31, 0x18, 0x50, 0x05, 0xE0, 0x04,
+0xF0, 0x80, 0xF0, 0x90, 0x00, 0xCF, 0xE4, 0xF0,
+0x90, 0x00, 0x37, 0xE0, 0x54, 0x7F, 0xF0, 0x31,
+0x18, 0x7F, 0x00, 0x50, 0x02, 0x7F, 0x01, 0x22,
+0x90, 0x95, 0x5C, 0xE0, 0xC3, 0x94, 0x64, 0x22,
+0x75, 0x29, 0x12, 0xE4, 0xF5, 0x2A, 0x75, 0x2B,
+0x07, 0x75, 0x2C, 0x32, 0xF5, 0x31, 0x75, 0x32,
+0xC1, 0x75, 0x33, 0x0C, 0xF5, 0x34, 0x90, 0x01,
+0x30, 0xE5, 0x29, 0xF0, 0xA3, 0xE5, 0x2A, 0xF0,
+0xA3, 0xE5, 0x2B, 0xF0, 0xA3, 0xE5, 0x2C, 0xF0,
+0x90, 0x01, 0x20, 0xE5, 0x31, 0xF0, 0xA3, 0xE5,
+0x32, 0xF0, 0xA3, 0xE5, 0x33, 0xF0, 0xA3, 0xE5,
+0x34, 0xF0, 0x22, 0x75, 0x39, 0x07, 0x43, 0x39,
+0x10, 0x75, 0x3A, 0x01, 0x43, 0x3A, 0x08, 0x75,
+0x3B, 0x03, 0x75, 0x3C, 0x62, 0x43, 0x3C, 0x80,
+0x43, 0x3B, 0x04, 0x90, 0x01, 0x38, 0xE5, 0x39,
+0xF0, 0xA3, 0xE5, 0x3A, 0xF0, 0xA3, 0xE5, 0x3B,
+0xF0, 0xA3, 0xE5, 0x3C, 0xF0, 0x22, 0x12, 0x7B,
+0x1B, 0x90, 0x86, 0xB3, 0xEF, 0xF0, 0x12, 0xCF,
+0xCE, 0x90, 0x01, 0x64, 0x74, 0x01, 0xF0, 0x90,
+0x04, 0x23, 0xE0, 0x44, 0x80, 0xF0, 0x02, 0x67,
+0xD2, 0x7D, 0x02, 0x90, 0x01, 0xC4, 0x74, 0xA1,
+0xF0, 0x74, 0xD1, 0xA3, 0xF0, 0x90, 0x93, 0x57,
+0xE0, 0xFF, 0xED, 0xC3, 0x9F, 0x50, 0x18, 0xED,
+0x25, 0xE0, 0x24, 0x81, 0xF8, 0xE6, 0x30, 0xE4,
+0x0B, 0x90, 0x01, 0xB8, 0x74, 0x08, 0xF0, 0xA3,
+0xF0, 0x7F, 0x00, 0x22, 0x0D, 0x80, 0xDE, 0x74,
+0xA1, 0x04, 0x90, 0x01, 0xC4, 0xF0, 0x74, 0xD1,
+0xA3, 0xF0, 0x7F, 0x01, 0x22, 0xE4, 0x90, 0x95,
+0xAC, 0xF0, 0xA3, 0xF0, 0xA3, 0xF0, 0x90, 0x95,
+0xAC, 0xE0, 0x64, 0x01, 0xF0, 0x90, 0x93, 0xF0,
+0xE0, 0x70, 0x18, 0x90, 0x93, 0xED, 0xE0, 0x70,
+0x12, 0xA3, 0xE0, 0x70, 0x0E, 0x90, 0x95, 0xAC,
+0xE0, 0x24, 0xDD, 0x90, 0x01, 0xC4, 0xF0, 0x74,
+0xD1, 0xA3, 0xF0, 0x12, 0x7C, 0x54, 0xBF, 0x01,
+0x03, 0x12, 0x54, 0x9F, 0x90, 0x88, 0x36, 0xE0,
+0x60, 0x0F, 0x90, 0x88, 0x39, 0xE0, 0xFF, 0x90,
+0x88, 0x38, 0xE0, 0x6F, 0x60, 0x03, 0x12, 0xB5,
+0xF6, 0xC2, 0xAF, 0x31, 0xA1, 0xBF, 0x01, 0x03,
+0x12, 0xCF, 0x9D, 0xD2, 0xAF, 0x51, 0x3F, 0x12,
+0xBF, 0xE0, 0x12, 0x83, 0x4D, 0x80, 0xA7, 0xD3,
+0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0x90, 0x93,
+0xED, 0xE0, 0x60, 0x24, 0x7F, 0x54, 0x7E, 0x09,
+0x12, 0x70, 0x70, 0x51, 0xEB, 0x12, 0x04, 0xB8,
+0xEF, 0x44, 0xFE, 0xFF, 0xEE, 0x44, 0x03, 0xFE,
+0xED, 0x44, 0x04, 0xFD, 0xEC, 0x51, 0xEB, 0x51,
+0xF5, 0x7F, 0x54, 0x7E, 0x09, 0x12, 0x70, 0xAD,
+0x90, 0x93, 0xE8, 0xE0, 0x70, 0x29, 0x90, 0x07,
+0xCC, 0xE0, 0x30, 0xE0, 0x22, 0xE4, 0xF0, 0x90,
+0x95, 0xB3, 0x74, 0x22, 0xF0, 0x90, 0x95, 0xD5,
+0x74, 0x01, 0xF0, 0x90, 0x95, 0xB5, 0x74, 0x03,
+0xF0, 0x7B, 0x01, 0x7A, 0x95, 0x79, 0xB3, 0x12,
+0x90, 0x39, 0x7F, 0x04, 0x12, 0x04, 0x7E, 0x90,
+0x93, 0xF0, 0xE0, 0xFF, 0x70, 0x0A, 0x90, 0x93,
+0xED, 0xE0, 0x70, 0x04, 0xA3, 0xE0, 0x60, 0x15,
+0x90, 0x00, 0x1F, 0xE0, 0x54, 0xF0, 0xF0, 0x90,
+0x01, 0xC5, 0x74, 0xEA, 0xF0, 0xA3, 0x74, 0xEF,
+0xF0, 0xA3, 0x74, 0xFD, 0xF0, 0xEF, 0x60, 0x06,
+0x90, 0x01, 0xC4, 0x74, 0x07, 0xF0, 0x90, 0x93,
+0xED, 0xE0, 0x60, 0x06, 0x90, 0x01, 0xC4, 0x74,
+0x01, 0xF0, 0x90, 0x93, 0xEE, 0xE0, 0x60, 0x06,
+0x90, 0x01, 0xC4, 0x74, 0x02, 0xF0, 0xD0, 0xD0,
+0x92, 0xAF, 0x22, 0x90, 0x95, 0xAF, 0x12, 0x04,
+0x31, 0x90, 0x95, 0xAF, 0x22, 0x12, 0x04, 0xB8,
+0x90, 0x92, 0x18, 0x02, 0x04, 0x31, 0xD3, 0x10,
+0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0x71, 0x3A, 0x90,
+0x97, 0x4C, 0x12, 0x04, 0x31, 0x90, 0x97, 0x4C,
+0x51, 0xF5, 0x7F, 0x30, 0x7E, 0x08, 0x12, 0x70,
+0xAD, 0x90, 0x01, 0x01, 0xE0, 0x44, 0x02, 0xF0,
+0x90, 0x01, 0x00, 0x74, 0xFF, 0xF0, 0x90, 0x06,
+0xB7, 0x74, 0x09, 0xF0, 0x90, 0x06, 0xB4, 0x74,
+0x86, 0xF0, 0x12, 0xB6, 0xC7, 0xD0, 0xD0, 0x92,
+0xAF, 0x22, 0x7F, 0x30, 0x7E, 0x08, 0x12, 0x70,
+0x70, 0xED, 0x44, 0x80, 0xFD, 0xEC, 0x22, 0xD3,
+0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0x71, 0x3A,
+0x90, 0x97, 0x50, 0x12, 0x04, 0x31, 0x90, 0x97,
+0x50, 0x51, 0xF5, 0x7F, 0x30, 0x7E, 0x08, 0x12,
+0x70, 0xAD, 0x12, 0x8A, 0x63, 0x90, 0x06, 0xB7,
+0x74, 0x11, 0xF0, 0x7F, 0x03, 0x7E, 0x00, 0x12,
+0x7C, 0x6A, 0x90, 0x06, 0xB4, 0xE0, 0x54, 0x0F,
+0x70, 0xF1, 0x90, 0x07, 0xD5, 0xE0, 0x44, 0x80,
+0xF0, 0x7F, 0x0A, 0x80, 0x09, 0x90, 0x06, 0x62,
+0xE0, 0x30, 0xE0, 0x09, 0x7F, 0x01, 0x7E, 0x00,
+0x12, 0x7C, 0x6A, 0x80, 0xF0, 0x71, 0xB5, 0x90,
+0x01, 0x00, 0x74, 0x3F, 0xF0, 0xA3, 0xE0, 0x54,
+0xFD, 0xF0, 0x90, 0x05, 0x53, 0xE0, 0x44, 0x20,
+0xF0, 0x90, 0x07, 0xD5, 0xE0, 0x54, 0x7F, 0xF0,
+0xD0, 0xD0, 0x92, 0xAF, 0x22, 0x90, 0x00, 0x02,
+0xE0, 0x54, 0xFE, 0xF0, 0x22, 0x90, 0x8A, 0x79,
 0x74, 0x87, 0xF0, 0xA3, 0x74, 0x03, 0xF0, 0x90,
-0x8A, 0xE5, 0x74, 0xE1, 0xF0, 0xA3, 0x74, 0x5A,
-0xF0, 0x90, 0x8B, 0x03, 0x74, 0x90, 0xF0, 0xA3,
-0x74, 0xC6, 0xF0, 0x90, 0x8A, 0xB9, 0x74, 0x92,
-0xF0, 0xA3, 0x74, 0x61, 0xF0, 0x90, 0x8A, 0xD5,
-0x74, 0x99, 0xF0, 0xA3, 0x74, 0xCF, 0xF0, 0x90,
-0x8A, 0xFB, 0x74, 0x98, 0xF0, 0xA3, 0x74, 0x35,
-0xF0, 0x90, 0x8A, 0xA5, 0x74, 0xA2, 0xF0, 0xA3,
-0x74, 0xC4, 0xF0, 0x90, 0x8A, 0xB5, 0x74, 0xA4,
-0xF0, 0xA3, 0x74, 0x5E, 0xF0, 0x90, 0x8A, 0x75,
-0x74, 0xD8, 0xF0, 0xA3, 0x74, 0x50, 0xF0, 0x90,
-0x8A, 0xC1, 0x74, 0x8E, 0xF0, 0xA3, 0x74, 0x33,
-0xF0, 0x90, 0x8A, 0xC3, 0x74, 0xCF, 0xF0, 0xA3,
-0x74, 0x82, 0xF0, 0x90, 0x8A, 0xF3, 0x74, 0xE6,
-0xF0, 0xA3, 0x74, 0x36, 0xF0, 0x90, 0x8A, 0x85,
-0x74, 0xE7, 0xF0, 0xA3, 0x74, 0x9C, 0xF0, 0x90,
-0x86, 0x04, 0x74, 0xCD, 0xF0, 0xA3, 0x74, 0x83,
-0xF0, 0x90, 0x8A, 0xA9, 0x74, 0xE6, 0xF0, 0xA3,
-0x74, 0x42, 0xF0, 0x90, 0x8B, 0x07, 0x74, 0xE6,
-0xF0, 0xA3, 0x74, 0x71, 0xF0, 0x90, 0x8A, 0xAD,
-0x74, 0xE7, 0xF0, 0xA3, 0x74, 0x1F, 0xF0, 0x90,
-0x8A, 0xBB, 0x74, 0xE7, 0xF0, 0xA3, 0x74, 0xEE,
-0xF0, 0x90, 0x86, 0x0C, 0x74, 0xE2, 0xF0, 0xA3,
-0x74, 0xF2, 0xF0, 0x90, 0x8A, 0xEF, 0x74, 0xE3,
-0xF0, 0xA3, 0x74, 0x3C, 0xF0, 0x90, 0x86, 0x00,
-0x74, 0xE9, 0xF0, 0xA3, 0x74, 0xA2, 0xF0, 0x90,
-0x86, 0x02, 0x74, 0xEA, 0xF0, 0xA3, 0x74, 0x01,
-0xF0, 0x90, 0x8A, 0xFD, 0x74, 0xAD, 0xF0, 0xA3,
-0x74, 0x96, 0xF0, 0x90, 0x8A, 0xF9, 0x74, 0xE3,
-0xF0, 0xA3, 0x74, 0xB3, 0xF0, 0x90, 0x8A, 0xDB,
-0x74, 0xE5, 0xF0, 0xA3, 0x74, 0x5D, 0xF0, 0x90,
-0x8A, 0xAF, 0x74, 0xCB, 0xF0, 0xA3, 0x74, 0x09,
-0xF0, 0x90, 0x8A, 0xD3, 0x74, 0xA4, 0xF0, 0xA3,
-0x74, 0xA6, 0xF0, 0x90, 0x8A, 0xF5, 0x74, 0xEA,
-0xF0, 0xA3, 0x74, 0xBE, 0xF0, 0x90, 0x8A, 0xA3,
-0x74, 0xEB, 0xF0, 0xA3, 0x74, 0x05, 0xF0, 0x90,
-0x86, 0x06, 0x74, 0xCC, 0xF0, 0xA3, 0x74, 0x87,
-0xF0, 0x22, 0x8F, 0x0D, 0x7F, 0x02, 0x12, 0x85,
-0x27, 0x90, 0x86, 0xAF, 0xE0, 0x45, 0x0D, 0xF0,
-0x22, 0xC0, 0xE0, 0xC0, 0xF0, 0xC0, 0x83, 0xC0,
-0x82, 0xC0, 0xD0, 0x75, 0xD0, 0x00, 0xC0, 0x00,
-0xC0, 0x01, 0xC0, 0x02, 0xC0, 0x03, 0xC0, 0x04,
-0xC0, 0x05, 0xC0, 0x06, 0xC0, 0x07, 0x90, 0x01,
-0xC4, 0x74, 0x69, 0xF0, 0x74, 0xE1, 0xA3, 0xF0,
-0x12, 0x6C, 0xD6, 0xE5, 0x25, 0x30, 0xE7, 0x03,
-0x12, 0xCA, 0x74, 0x74, 0x69, 0x04, 0x90, 0x01,
-0xC4, 0xF0, 0x74, 0xE1, 0xA3, 0xF0, 0xD0, 0x07,
-0xD0, 0x06, 0xD0, 0x05, 0xD0, 0x04, 0xD0, 0x03,
-0xD0, 0x02, 0xD0, 0x01, 0xD0, 0x00, 0xD0, 0xD0,
-0xD0, 0x82, 0xD0, 0x83, 0xD0, 0xF0, 0xD0, 0xE0,
-0x32, 0xC0, 0xE0, 0xC0, 0xF0, 0xC0, 0x83, 0xC0,
-0x82, 0xC0, 0xD0, 0x75, 0xD0, 0x00, 0xC0, 0x00,
-0xC0, 0x01, 0xC0, 0x02, 0xC0, 0x03, 0xC0, 0x04,
-0xC0, 0x05, 0xC0, 0x06, 0xC0, 0x07, 0x90, 0x01,
-0xC4, 0x74, 0xC1, 0xF0, 0x74, 0xE1, 0xA3, 0xF0,
-0x90, 0x8A, 0x9D, 0x12, 0x92, 0x57, 0x53, 0x91,
-0xBF, 0x74, 0xC1, 0x04, 0x90, 0x01, 0xC4, 0xF0,
-0x74, 0xE1, 0xA3, 0xF0, 0xD0, 0x07, 0xD0, 0x06,
-0xD0, 0x05, 0xD0, 0x04, 0xD0, 0x03, 0xD0, 0x02,
-0xD0, 0x01, 0xD0, 0x00, 0xD0, 0xD0, 0xD0, 0x82,
-0xD0, 0x83, 0xD0, 0xF0, 0xD0, 0xE0, 0x32, 0xC0,
-0xE0, 0xC0, 0x83, 0xC0, 0x82, 0xC0, 0xD0, 0x75,
-0xD0, 0x00, 0xC0, 0x05, 0xC0, 0x07, 0x7D, 0x17,
-0x90, 0x01, 0xC4, 0xED, 0xF0, 0x74, 0xE2, 0xFF,
-0xA3, 0xF0, 0xED, 0x04, 0x90, 0x01, 0xC4, 0xF0,
-0xA3, 0xEF, 0xF0, 0xD0, 0x07, 0xD0, 0x05, 0xD0,
-0xD0, 0xD0, 0x82, 0xD0, 0x83, 0xD0, 0xE0, 0x32,
+0x8A, 0xE5, 0x74, 0xD4, 0xF0, 0xA3, 0x74, 0xF4,
+0xF0, 0x90, 0x8B, 0x03, 0x74, 0x88, 0xF0, 0xA3,
+0x74, 0xD6, 0xF0, 0x90, 0x8A, 0xB9, 0x74, 0x8A,
+0xF0, 0xA3, 0x74, 0x70, 0xF0, 0x90, 0x8A, 0xD5,
+0x74, 0xC8, 0xF0, 0xA3, 0x74, 0xC6, 0xF0, 0x90,
+0x8A, 0xFB, 0x74, 0xBD, 0xF0, 0xA3, 0x74, 0x67,
+0xF0, 0x90, 0x8A, 0xA5, 0x74, 0xBC, 0xF0, 0xA3,
+0x74, 0x03, 0xF0, 0x90, 0x8A, 0xB5, 0x74, 0xBF,
+0xF0, 0xA3, 0x74, 0x95, 0xF0, 0x90, 0x8A, 0x75,
+0x74, 0xAE, 0xF0, 0xA3, 0x74, 0x5A, 0xF0, 0x90,
+0x8A, 0xC1, 0x74, 0x90, 0xF0, 0xA3, 0x74, 0x54,
+0xF0, 0x90, 0x8A, 0xC3, 0x74, 0xE6, 0xF0, 0xA3,
+0x74, 0x86, 0xF0, 0x90, 0x8A, 0xF3, 0x74, 0xE6,
+0xF0, 0xA3, 0x74, 0xB7, 0xF0, 0x90, 0x8A, 0x85,
+0x74, 0xE8, 0xF0, 0xA3, 0x74, 0x17, 0xF0, 0x90,
+0x8A, 0x99, 0x74, 0xC5, 0xF0, 0xA3, 0x74, 0x4D,
+0xF0, 0x90, 0x86, 0x04, 0x74, 0xD6, 0xF0, 0xA3,
+0x74, 0x5A, 0xF0, 0x90, 0x8A, 0xA9, 0x74, 0xE6,
+0xF0, 0xA3, 0x74, 0xC3, 0xF0, 0x90, 0x8B, 0x07,
+0x74, 0xE6, 0xF0, 0xA3, 0x74, 0xF2, 0xF0, 0x90,
+0x8A, 0xAD, 0x74, 0xE7, 0xF0, 0xA3, 0x74, 0xA0,
+0xF0, 0x90, 0x8A, 0xBB, 0x74, 0x95, 0xF0, 0xA3,
+0x74, 0x9D, 0xF0, 0x90, 0x86, 0x0C, 0x74, 0xD2,
+0xF0, 0xA3, 0x74, 0xFE, 0xF0, 0x90, 0x8A, 0xEF,
+0x74, 0xD3, 0xF0, 0xA3, 0x74, 0x47, 0xF0, 0x90,
+0x86, 0x00, 0x74, 0xEB, 0xF0, 0xA3, 0x74, 0x85,
+0xF0, 0x90, 0x86, 0x02, 0x74, 0xEC, 0xF0, 0xA3,
+0x74, 0x46, 0xF0, 0x90, 0x8A, 0xFD, 0x74, 0xCD,
+0xF0, 0xA3, 0x74, 0xBB, 0xF0, 0x90, 0x8A, 0xF9,
+0x74, 0xDA, 0xF0, 0xA3, 0x74, 0x7D, 0xF0, 0x90,
+0x8A, 0xDB, 0x74, 0xDC, 0xF0, 0xA3, 0x74, 0xFD,
+0xF0, 0x90, 0x8A, 0xAF, 0x74, 0xC3, 0xF0, 0xA3,
+0x74, 0x54, 0xF0, 0x90, 0x8A, 0xD3, 0x74, 0xCB,
+0xF0, 0xA3, 0x74, 0x03, 0xF0, 0x90, 0x8A, 0xF5,
+0x74, 0xED, 0xF0, 0xA3, 0x74, 0x02, 0xF0, 0x90,
+0x8A, 0xA3, 0x74, 0xB6, 0xF0, 0xA3, 0x74, 0x5A,
+0xF0, 0x90, 0x86, 0x06, 0x74, 0xC4, 0xF0, 0xA3,
+0x74, 0x82, 0xF0, 0x22, 0x8F, 0x0D, 0x7F, 0x02,
+0x12, 0x85, 0x27, 0x90, 0x86, 0xAF, 0xE0, 0x45,
+0x0D, 0xF0, 0x22, 0xC0, 0xE0, 0xC0, 0xF0, 0xC0,
+0x83, 0xC0, 0x82, 0xC0, 0xD0, 0x75, 0xD0, 0x00,
+0xC0, 0x00, 0xC0, 0x01, 0xC0, 0x02, 0xC0, 0x03,
+0xC0, 0x04, 0xC0, 0x05, 0xC0, 0x06, 0xC0, 0x07,
+0x90, 0x01, 0xC4, 0x74, 0x03, 0xF0, 0x74, 0xD5,
+0xA3, 0xF0, 0x12, 0x6C, 0xD6, 0xE5, 0x25, 0x30,
+0xE7, 0x03, 0x12, 0xC6, 0x93, 0x74, 0x03, 0x04,
+0x90, 0x01, 0xC4, 0xF0, 0x74, 0xD5, 0xA3, 0xF0,
+0xD0, 0x07, 0xD0, 0x06, 0xD0, 0x05, 0xD0, 0x04,
+0xD0, 0x03, 0xD0, 0x02, 0xD0, 0x01, 0xD0, 0x00,
+0xD0, 0xD0, 0xD0, 0x82, 0xD0, 0x83, 0xD0, 0xF0,
+0xD0, 0xE0, 0x32, 0xC0, 0xE0, 0xC0, 0xF0, 0xC0,
+0x83, 0xC0, 0x82, 0xC0, 0xD0, 0x75, 0xD0, 0x00,
+0xC0, 0x00, 0xC0, 0x01, 0xC0, 0x02, 0xC0, 0x03,
+0xC0, 0x04, 0xC0, 0x05, 0xC0, 0x06, 0xC0, 0x07,
+0x90, 0x01, 0xC4, 0x74, 0x5B, 0xF0, 0x74, 0xD5,
+0xA3, 0xF0, 0x12, 0x75, 0x50, 0xE5, 0x3D, 0x30,
+0xE0, 0x03, 0x12, 0xE5, 0x02, 0xE5, 0x3D, 0x30,
+0xE1, 0x03, 0x12, 0xD9, 0x52, 0xE5, 0x3D, 0x30,
+0xE2, 0x03, 0x12, 0xB6, 0x3D, 0xE5, 0x3D, 0x30,
+0xE4, 0x02, 0xD1, 0x3C, 0xE5, 0x3D, 0x30, 0xE5,
+0x02, 0xF1, 0x7E, 0xE5, 0x3E, 0x30, 0xE0, 0x03,
+0x12, 0xCD, 0x1D, 0xE5, 0x3E, 0x30, 0xE3, 0x03,
+0x12, 0xC7, 0xCB, 0xE5, 0x3E, 0x30, 0xE4, 0x03,
+0x12, 0xE5, 0x16, 0xE5, 0x3F, 0x30, 0xE1, 0x03,
+0x12, 0xD9, 0x70, 0xE5, 0x3F, 0x30, 0xE0, 0x02,
+0xF1, 0x0A, 0xE5, 0x3F, 0x30, 0xE4, 0x02, 0xF1,
+0x7F, 0xE5, 0x3F, 0x30, 0xE2, 0x0A, 0x12, 0xD9,
+0xC5, 0x90, 0x07, 0x8F, 0xE0, 0x44, 0x10, 0xF0,
+0xE5, 0x40, 0x30, 0xE1, 0x0B, 0x90, 0x8A, 0xE5,
+0x12, 0x90, 0x4B, 0x7F, 0x04, 0x12, 0x04, 0x7E,
+0xE5, 0x40, 0x30, 0xE4, 0x03, 0x12, 0x9E, 0xD8,
+0xE5, 0x40, 0x30, 0xE5, 0x02, 0xF1, 0x95, 0xE5,
+0x40, 0x30, 0xE6, 0x03, 0x12, 0xDA, 0x0A, 0xE5,
+0x40, 0x30, 0xE7, 0x02, 0xD1, 0xC6, 0x74, 0x5B,
+0x04, 0x90, 0x01, 0xC4, 0xF0, 0x74, 0xD5, 0xA3,
+0xF0, 0xD0, 0x07, 0xD0, 0x06, 0xD0, 0x05, 0xD0,
+0x04, 0xD0, 0x03, 0xD0, 0x02, 0xD0, 0x01, 0xD0,
+0x00, 0xD0, 0xD0, 0xD0, 0x82, 0xD0, 0x83, 0xD0,
+0xF0, 0xD0, 0xE0, 0x32, 0x90, 0x88, 0x9D, 0xE0,
+0x30, 0xE0, 0x0D, 0xD1, 0x51, 0x30, 0xE0, 0x08,
+0x90, 0x8A, 0xBB, 0x12, 0x90, 0x4B, 0xD1, 0xB9,
+0x22, 0x90, 0x88, 0xA1, 0xE0, 0x13, 0x13, 0x54,
+0x3F, 0x22, 0xEF, 0x64, 0x39, 0x70, 0x59, 0x90,
+0x01, 0x63, 0xF0, 0x90, 0x01, 0x3C, 0x74, 0x10,
+0xF0, 0x90, 0x88, 0x9D, 0xE0, 0x30, 0xE0, 0x48,
+0xD1, 0x51, 0x30, 0xE0, 0x43, 0x90, 0x88, 0xC2,
+0xE0, 0xFF, 0xC4, 0x54, 0x0F, 0x30, 0xE0, 0x38,
+0x90, 0x95, 0x4A, 0xE0, 0x04, 0xF0, 0xF1, 0x80,
+0x30, 0xE0, 0x11, 0xEE, 0x13, 0x13, 0x13, 0x54,
+0x1F, 0x30, 0xE0, 0x08, 0xEF, 0x54, 0xEF, 0x90,
+0x88, 0xC2, 0xF0, 0x22, 0x90, 0x88, 0xB0, 0xE0,
+0x70, 0x16, 0xD1, 0xBE, 0x90, 0x88, 0x9D, 0xE0,
+0x30, 0xE0, 0x0D, 0xD1, 0x51, 0x30, 0xE0, 0x08,
+0x90, 0x8A, 0xBB, 0x12, 0x90, 0x4B, 0xD1, 0xB9,
+0x22, 0xE4, 0xFF, 0x12, 0x04, 0x7E, 0x90, 0x88,
+0xC2, 0xE0, 0x54, 0xEF, 0xF0, 0x22, 0x90, 0x88,
+0xB8, 0xE0, 0x30, 0xE0, 0x05, 0x90, 0x8A, 0xEB,
+0x80, 0x27, 0x90, 0x95, 0x44, 0x12, 0x9D, 0xD9,
+0x30, 0xE0, 0x1B, 0x90, 0x88, 0xC2, 0xE0, 0xC4,
+0x54, 0x0F, 0x20, 0xE0, 0x08, 0x90, 0x8A, 0xBB,
+0x12, 0x90, 0x4B, 0xD1, 0xB9, 0x90, 0x95, 0x44,
+0xE0, 0x54, 0xF7, 0xF0, 0x80, 0x06, 0x90, 0x8A,
+0x99, 0x12, 0x8A, 0x66, 0x90, 0x88, 0xF0, 0xE0,
+0x30, 0xE0, 0x06, 0x90, 0x8A, 0xE7, 0x12, 0x8A,
+0x66, 0x22, 0x90, 0x88, 0x2C, 0xE0, 0xFF, 0x30,
+0xE0, 0x4B, 0x90, 0x88, 0x30, 0xE0, 0x7E, 0x00,
+0xB4, 0x02, 0x02, 0x7E, 0x01, 0x90, 0x88, 0x2F,
+0xE0, 0x7D, 0x00, 0xB4, 0x04, 0x02, 0x7D, 0x01,
+0xED, 0x4E, 0x70, 0x31, 0xEF, 0xC3, 0x13, 0x30,
+0xE0, 0x03, 0x02, 0x9E, 0x73, 0xF1, 0x5E, 0x90,
+0x88, 0x30, 0xE0, 0xB4, 0x08, 0x0C, 0x90, 0x8A,
+0xB9, 0x12, 0x90, 0x4B, 0xE4, 0xFD, 0x7F, 0x0C,
+0x80, 0x10, 0x90, 0x88, 0x30, 0xE0, 0x70, 0x0D,
+0x90, 0x8A, 0xB9, 0x12, 0x90, 0x4B, 0xE4, 0xFD,
+0x7F, 0x04, 0x12, 0x04, 0x7E, 0x22, 0xF1, 0x8A,
+0x30, 0xE0, 0x12, 0x12, 0x97, 0xD4, 0x60, 0x0D,
+0x90, 0x8A, 0xB9, 0x12, 0x90, 0x4B, 0x7D, 0x01,
+0x7F, 0x02, 0x12, 0x04, 0x7E, 0x12, 0x97, 0xD4,
+0x60, 0x03, 0x12, 0xEA, 0x54, 0x22, 0x22, 0x22,
+0x90, 0x95, 0x44, 0xE0, 0xFE, 0x13, 0x13, 0x54,
+0x3F, 0x22, 0x90, 0x88, 0x2C, 0xE0, 0xFF, 0xC4,
+0x13, 0x13, 0x54, 0x03, 0x22, 0x90, 0x95, 0x37,
+0xE0, 0xB4, 0x01, 0x1A, 0xE4, 0xF0, 0x90, 0x01,
+0x5B, 0xF0, 0x90, 0x92, 0x20, 0xF0, 0x90, 0x88,
+0x95, 0xE0, 0xC3, 0x13, 0x54, 0x7F, 0x90, 0x92,
+0x21, 0xF0, 0xE4, 0x12, 0x9E, 0xC3, 0x90, 0x88,
+0x31, 0xF1, 0x8D, 0x30, 0xE0, 0x35, 0xEF, 0x54,
+0xBF, 0x12, 0xDA, 0x6A, 0x30, 0xE0, 0x06, 0xE0,
+0x44, 0x01, 0xF0, 0x80, 0x0A, 0xE0, 0x54, 0xFE,
+0xF0, 0x12, 0xDA, 0x73, 0x74, 0x04, 0xF0, 0x90,
+0x88, 0xA3, 0xE0, 0xFF, 0xC4, 0x13, 0x54, 0x07,
+0x30, 0xE0, 0x0D, 0x90, 0x8A, 0xB9, 0x12, 0x90,
+0x4B, 0x7D, 0x01, 0x7F, 0x0C, 0x02, 0x04, 0x7E,
+0x12, 0xB5, 0xF6, 0x22, 0xC0, 0xE0, 0xC0, 0xF0,
+0xC0, 0x83, 0xC0, 0x82, 0xC0, 0xD0, 0x75, 0xD0,
+0x00, 0xC0, 0x00, 0xC0, 0x01, 0xC0, 0x02, 0xC0,
+0x03, 0xC0, 0x04, 0xC0, 0x05, 0xC0, 0x06, 0xC0,
+0x07, 0x90, 0x01, 0xC4, 0x74, 0xF4, 0xF0, 0x74,
+0xD7, 0xA3, 0xF0, 0x90, 0x8A, 0x9D, 0x12, 0x8A,
+0x66, 0x53, 0x91, 0xBF, 0x74, 0xF4, 0x04, 0x90,
+0x01, 0xC4, 0xF0, 0x74, 0xD7, 0xA3, 0xF0, 0xD0,
+0x07, 0xD0, 0x06, 0xD0, 0x05, 0xD0, 0x04, 0xD0,
+0x03, 0xD0, 0x02, 0xD0, 0x01, 0xD0, 0x00, 0xD0,
+0xD0, 0xD0, 0x82, 0xD0, 0x83, 0xD0, 0xF0, 0xD0,
+0xE0, 0x32, 0xC0, 0xE0, 0xC0, 0x83, 0xC0, 0x82,
+0xC0, 0xD0, 0x75, 0xD0, 0x00, 0xC0, 0x05, 0xC0,
+0x07, 0x7D, 0x4A, 0x90, 0x01, 0xC4, 0xED, 0xF0,
+0x74, 0xD8, 0xFF, 0xA3, 0xF0, 0xED, 0x04, 0x90,
+0x01, 0xC4, 0xF0, 0xA3, 0xEF, 0xF0, 0xD0, 0x07,
+0xD0, 0x05, 0xD0, 0xD0, 0xD0, 0x82, 0xD0, 0x83,
+0xD0, 0xE0, 0x32, 0x90, 0x88, 0x2C, 0xE0, 0x30,
+0xE0, 0x05, 0xE4, 0xA3, 0xF0, 0xA3, 0xF0, 0x22,
+0x90, 0x88, 0x2C, 0xE0, 0xFF, 0x30, 0xE0, 0x05,
+0x12, 0x97, 0xD4, 0x60, 0x3B, 0x90, 0x88, 0x36,
+0xE0, 0x70, 0x04, 0xEF, 0x30, 0xE0, 0x1D, 0x90,
+0x88, 0x39, 0xE0, 0x64, 0x02, 0x60, 0x29, 0x90,
+0x88, 0x9D, 0xE0, 0x30, 0xE0, 0x0B, 0x90, 0x95,
+0x44, 0xE0, 0xFF, 0x12, 0x97, 0x35, 0x20, 0xE0,
+0x03, 0x12, 0xB1, 0x6D, 0x90, 0x88, 0x9D, 0xE0,
+0x30, 0xE0, 0x0D, 0x90, 0x95, 0x44, 0xE0, 0xFF,
+0x12, 0x97, 0x35, 0x30, 0xE0, 0x02, 0x11, 0xD1,
+0x22, 0x90, 0x06, 0xA9, 0xE0, 0xF5, 0x7C, 0x30,
+0xE6, 0x02, 0x11, 0xDD, 0x22, 0x90, 0x88, 0x9D,
+0xE0, 0x30, 0xE0, 0x28, 0x12, 0x97, 0x31, 0x30,
+0xE0, 0x22, 0x90, 0x88, 0xAF, 0xE0, 0xFF, 0x70,
+0x0A, 0xEF, 0x70, 0x18, 0x90, 0x88, 0xA0, 0xE0,
+0x30, 0xE0, 0x11, 0x90, 0x06, 0x04, 0xE0, 0x44,
+0x40, 0xF0, 0xE0, 0x44, 0x80, 0xF0, 0x90, 0x8A,
+0xE1, 0x12, 0x8A, 0x66, 0x22, 0x90, 0x88, 0x9D,
+0xE0, 0x30, 0xE0, 0x0D, 0x90, 0x95, 0x44, 0xE0,
+0xFF, 0x12, 0x97, 0x35, 0x30, 0xE0, 0x02, 0x80,
+0xBC, 0xE4, 0xFF, 0x12, 0x78, 0x4A, 0xBF, 0x01,
+0x18, 0x90, 0x88, 0x36, 0xE0, 0x60, 0x12, 0x12,
+0xB0, 0x94, 0x64, 0x02, 0x60, 0x08, 0x90, 0x8A,
+0xE1, 0x31, 0x42, 0x02, 0x04, 0x7A, 0x12, 0x73,
+0x8F, 0x22, 0xE0, 0xFE, 0xA3, 0xE0, 0xAA, 0x06,
+0xF9, 0x22, 0x90, 0x8A, 0xDF, 0x31, 0x42, 0x02,
+0x04, 0x7A, 0x90, 0x88, 0x36, 0xE0, 0x60, 0x15,
+0x90, 0x88, 0x9D, 0xE0, 0x30, 0xE0, 0x0B, 0x90,
+0x95, 0x44, 0xE0, 0xFF, 0x12, 0x97, 0x35, 0x20,
+0xE0, 0x03, 0x12, 0xB5, 0x2A, 0x02, 0x98, 0x32,
 0x90, 0x88, 0x2C, 0xE0, 0xFF, 0x30, 0xE0, 0x4C,
 0x90, 0x88, 0x30, 0xE0, 0x7E, 0x00, 0xB4, 0x02,
 0x02, 0x7E, 0x01, 0x90, 0x88, 0x2F, 0xE0, 0x7D,
 0x00, 0xB4, 0x04, 0x02, 0x7D, 0x01, 0xED, 0x4E,
 0x70, 0x32, 0xEF, 0xC3, 0x13, 0x30, 0xE0, 0x03,
-0x02, 0xA7, 0x87, 0x12, 0xB4, 0x1C, 0x90, 0x88,
-0x30, 0xE0, 0xB4, 0x08, 0x0C, 0x90, 0x8A, 0xB9,
-0x12, 0x8B, 0xCF, 0xE4, 0xFD, 0x7F, 0x0C, 0x80,
-0x10, 0x90, 0x88, 0x30, 0xE0, 0x70, 0x0D, 0x90,
-0x8A, 0xB9, 0x12, 0x8B, 0xCF, 0xE4, 0xFD, 0x7F,
-0x04, 0x12, 0x04, 0x7E, 0x22, 0x90, 0x88, 0x2C,
-0xE0, 0xFF, 0x30, 0xE0, 0x4C, 0x90, 0x88, 0x30,
-0xE0, 0x7E, 0x00, 0xB4, 0x02, 0x02, 0x7E, 0x01,
-0x90, 0x88, 0x2F, 0xE0, 0x7D, 0x00, 0xB4, 0x04,
-0x02, 0x7D, 0x01, 0xED, 0x4E, 0x70, 0x32, 0xEF,
-0xC3, 0x13, 0x30, 0xE0, 0x03, 0x02, 0xA7, 0x87,
-0x12, 0xB7, 0x93, 0x90, 0x88, 0x30, 0xE0, 0xB4,
-0x0C, 0x0C, 0x90, 0x8A, 0xB9, 0x12, 0x8B, 0xCF,
-0xE4, 0xFD, 0x7F, 0x08, 0x80, 0x10, 0x90, 0x88,
-0x30, 0xE0, 0xB4, 0x04, 0x0C, 0x90, 0x8A, 0xB9,
-0x12, 0x8B, 0xCF, 0xE4, 0xFD, 0xFF, 0x12, 0x04,
-0x7E, 0x22, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0,
-0xD0, 0x71, 0x2F, 0x90, 0x97, 0x1D, 0x12, 0x04,
-0x31, 0x90, 0x97, 0x1D, 0x12, 0xAF, 0xDC, 0x7F,
-0x30, 0x7E, 0x08, 0x12, 0x70, 0xAD, 0x90, 0x01,
-0x01, 0xE0, 0x44, 0x02, 0xF0, 0x90, 0x01, 0x00,
-0x74, 0xFF, 0xF0, 0x90, 0x06, 0xB7, 0x74, 0x09,
-0xF0, 0x90, 0x06, 0xB4, 0x74, 0x86, 0xF0, 0x12,
-0xB7, 0x4D, 0xD0, 0xD0, 0x92, 0xAF, 0x22, 0x7F,
-0x30, 0x7E, 0x08, 0x12, 0x70, 0x70, 0xED, 0x44,
-0x80, 0xFD, 0xEC, 0x22, 0xD3, 0x10, 0xAF, 0x01,
-0xC3, 0xC0, 0xD0, 0x71, 0x2F, 0x90, 0x97, 0x21,
-0x12, 0x04, 0x31, 0x90, 0x97, 0x21, 0x12, 0xAF,
-0xDC, 0x7F, 0x30, 0x7E, 0x08, 0x12, 0x70, 0xAD,
-0x12, 0x92, 0x54, 0x90, 0x06, 0xB7, 0x74, 0x11,
-0xF0, 0x7F, 0x03, 0x7E, 0x00, 0x12, 0x7C, 0x6A,
-0x90, 0x06, 0xB4, 0xE0, 0x54, 0x0F, 0x70, 0xF1,
-0x90, 0x07, 0xD5, 0xE0, 0x44, 0x80, 0xF0, 0x7F,
-0x0A, 0x80, 0x09, 0x90, 0x06, 0x62, 0xE0, 0x30,
-0xE0, 0x09, 0x7F, 0x01, 0x7E, 0x00, 0x12, 0x7C,
-0x6A, 0x80, 0xF0, 0x71, 0xAB, 0x90, 0x01, 0x00,
-0x74, 0x3F, 0xF0, 0xA3, 0xE0, 0x54, 0xFD, 0xF0,
-0x90, 0x05, 0x53, 0xE0, 0x44, 0x20, 0xF0, 0x90,
-0x07, 0xD5, 0xE0, 0x54, 0x7F, 0xF0, 0xD0, 0xD0,
-0x92, 0xAF, 0x22, 0x90, 0x00, 0x02, 0xE0, 0x54,
-0xFE, 0xF0, 0x22, 0x90, 0x97, 0x41, 0xED, 0xF0,
-0x64, 0x01, 0x60, 0x27, 0xE0, 0xFE, 0x64, 0x02,
-0x60, 0x21, 0xEE, 0x64, 0x29, 0x60, 0x1C, 0xEE,
-0x64, 0x2A, 0x60, 0x17, 0xEE, 0x64, 0x36, 0x60,
-0x12, 0xEE, 0xB4, 0x37, 0x02, 0x80, 0x0C, 0xAD,
-0x07, 0x7F, 0xFF, 0x12, 0xAF, 0x8A, 0x90, 0x93,
-0xF4, 0xE0, 0xFF, 0x90, 0x93, 0xF3, 0xE0, 0x4F,
-0x90, 0x05, 0x22, 0xF0, 0x90, 0x97, 0x41, 0xE0,
-0x90, 0x93, 0x01, 0xF0, 0x22, 0x12, 0x02, 0x06,
-0x90, 0x96, 0x4C, 0xF0, 0x22, 0xE4, 0xF5, 0x7A,
-0xEF, 0x14, 0xF5, 0x79, 0xED, 0xFF, 0xE5, 0x79,
-0xF5, 0x82, 0x33, 0x95, 0xE0, 0xF5, 0x83, 0xC3,
-0xE5, 0x82, 0x9F, 0x74, 0x80, 0xF8, 0x65, 0x83,
-0x98, 0x40, 0x51, 0xE5, 0x79, 0x78, 0x03, 0xA2,
-0xE7, 0x13, 0xD8, 0xFB, 0xFF, 0x33, 0x95, 0xE0,
-0xFE, 0xEB, 0x91, 0x6F, 0xE5, 0x82, 0x2F, 0xF5,
-0x82, 0xE5, 0x83, 0x3E, 0xF5, 0x83, 0xE0, 0xF5,
-0x82, 0x75, 0x83, 0x00, 0xE5, 0x79, 0x12, 0xBF,
-0x8F, 0x80, 0x05, 0xC3, 0x33, 0xCE, 0x33, 0xCE,
-0xD8, 0xF9, 0xFF, 0xEE, 0x55, 0x83, 0xFE, 0xEF,
-0x55, 0x82, 0x4E, 0x60, 0x13, 0x85, 0x79, 0x7B,
-0x05, 0x7A, 0x90, 0x95, 0xE4, 0xE0, 0x65, 0x7A,
-0x60, 0x0A, 0xE5, 0x7B, 0xD3, 0x9D, 0x40, 0x04,
-0x15, 0x79, 0x80, 0x98, 0xAF, 0x7B, 0x22, 0x75,
-0xF0, 0x08, 0xA4, 0x24, 0x00, 0xF5, 0x82, 0xE4,
-0x34, 0x82, 0xF5, 0x83, 0x22, 0xAA, 0x07, 0xA9,
-0x05, 0xEA, 0x12, 0x98, 0xBE, 0xE0, 0xF5, 0x75,
-0x54, 0x7F, 0xF5, 0x77, 0x75, 0xF0, 0x12, 0xEA,
-0xB1, 0x4B, 0xE0, 0x90, 0x95, 0xE0, 0xF0, 0x75,
-0xF0, 0x12, 0xEA, 0xB1, 0x55, 0xFF, 0xEA, 0x12,
-0x98, 0x28, 0xE0, 0x54, 0x03, 0xF5, 0x76, 0xE5,
-0x77, 0x90, 0x81, 0x9D, 0x93, 0xFD, 0xEA, 0x25,
-0xE0, 0x24, 0x75, 0xF5, 0x82, 0xE4, 0x34, 0x8D,
-0xF5, 0x83, 0xE4, 0xF0, 0xA3, 0xED, 0xF0, 0x75,
-0xF0, 0x12, 0xEA, 0x12, 0xA2, 0xBC, 0xFE, 0xC4,
-0x54, 0x03, 0x90, 0x95, 0xDF, 0xF0, 0x74, 0xC6,
-0x2A, 0xB1, 0x38, 0xE5, 0x77, 0xF0, 0x74, 0x46,
-0x2A, 0xB1, 0x40, 0xE5, 0x76, 0xF0, 0xE5, 0x77,
-0xD3, 0x9F, 0x40, 0x04, 0x8F, 0x77, 0x8F, 0x75,
-0x89, 0x78, 0xE4, 0xFF, 0xEF, 0xC3, 0x95, 0x78,
-0x50, 0x33, 0xE5, 0x75, 0x30, 0xE7, 0x09, 0x85,
-0x77, 0x75, 0x19, 0xE9, 0x70, 0x24, 0x80, 0x25,
-0x90, 0x95, 0xE0, 0xE0, 0xFD, 0xE5, 0x77, 0xD3,
-0x9D, 0x40, 0x0F, 0xAB, 0x02, 0x90, 0x95, 0xE4,
-0xE9, 0xF0, 0xAF, 0x77, 0x71, 0xFD, 0x8F, 0x75,
-0x80, 0x0B, 0x90, 0x95, 0xE0, 0xE0, 0xF5, 0x75,
-0x80, 0x03, 0x0F, 0x80, 0xC7, 0xAF, 0x02, 0x90,
-0x92, 0x80, 0xE5, 0x76, 0xF0, 0xE4, 0xFB, 0xAD,
-0x75, 0x02, 0x75, 0x80, 0x74, 0xC6, 0x25, 0x75,
-0xF5, 0x82, 0xE4, 0x34, 0x8E, 0xF5, 0x83, 0x22,
-0xF5, 0x82, 0xE4, 0x34, 0x8E, 0xF5, 0x83, 0x22,
-0x75, 0xF0, 0x12, 0x90, 0x89, 0x50, 0x02, 0x04,
-0x6E, 0x75, 0xF0, 0x12, 0xEF, 0x90, 0x89, 0x4F,
-0x12, 0x04, 0x6E, 0xE0, 0x22, 0xEF, 0x64, 0x13,
+0x02, 0x9E, 0x73, 0x12, 0xB5, 0x97, 0x90, 0x88,
+0x30, 0xE0, 0xB4, 0x0C, 0x0C, 0x90, 0x8A, 0xB9,
+0x12, 0x90, 0x4B, 0xE4, 0xFD, 0x7F, 0x08, 0x80,
+0x10, 0x90, 0x88, 0x30, 0xE0, 0xB4, 0x04, 0x0C,
+0x90, 0x8A, 0xB9, 0x12, 0x90, 0x4B, 0xE4, 0xFD,
+0xFF, 0x12, 0x04, 0x7E, 0x22, 0xD3, 0x10, 0xAF,
+0x01, 0xC3, 0xC0, 0xD0, 0x90, 0x88, 0xF0, 0xE0,
+0x30, 0xE0, 0x32, 0x90, 0x88, 0xF7, 0xE0, 0xB4,
+0x01, 0x1B, 0xA3, 0xE0, 0xB4, 0x01, 0x26, 0x74,
+0x02, 0xF0, 0x90, 0x88, 0xFE, 0xE0, 0xFE, 0xA3,
+0xE0, 0xFF, 0x90, 0x8A, 0x7F, 0x12, 0xC4, 0x37,
+0x12, 0x04, 0x7E, 0x80, 0x10, 0x90, 0x88, 0xF7,
+0xE0, 0xB4, 0x02, 0x09, 0x74, 0x03, 0xF0, 0x90,
+0x8A, 0xE7, 0x12, 0x8A, 0x66, 0xD0, 0xD0, 0x92,
+0xAF, 0x22, 0x90, 0x88, 0x31, 0xE0, 0xFF, 0x12,
+0x97, 0x35, 0x30, 0xE0, 0x1F, 0xEF, 0x54, 0x7F,
+0x51, 0x6A, 0x30, 0xE1, 0x06, 0xE0, 0x44, 0x02,
+0xF0, 0x80, 0x08, 0xE0, 0x54, 0xFD, 0xF0, 0x51,
+0x73, 0x04, 0xF0, 0x90, 0x88, 0x36, 0xE0, 0x60,
+0x03, 0x12, 0xB5, 0xF6, 0x90, 0x88, 0xA1, 0x12,
+0xD7, 0x8D, 0x30, 0xE0, 0x22, 0x90, 0x88, 0xA4,
+0xE0, 0xFF, 0xC3, 0x13, 0x30, 0xE0, 0x18, 0xEF,
+0x54, 0xFD, 0xF0, 0x90, 0x04, 0xE0, 0xE0, 0x90,
+0x88, 0xA4, 0x30, 0xE1, 0x06, 0xE0, 0x44, 0x04,
+0xF0, 0x80, 0x04, 0xE0, 0x54, 0xFB, 0xF0, 0x90,
+0x04, 0xE0, 0xE0, 0x30, 0xE1, 0x03, 0x12, 0x99,
+0x33, 0x22, 0xF0, 0x90, 0x04, 0xE0, 0xE0, 0x90,
+0x88, 0x32, 0x22, 0x90, 0x01, 0xB9, 0x74, 0x01,
+0xF0, 0x90, 0x01, 0xB8, 0x22, 0x90, 0x97, 0x6E,
+0xED, 0xF0, 0x64, 0x01, 0x60, 0x27, 0xE0, 0xFE,
+0x64, 0x02, 0x60, 0x21, 0xEE, 0x64, 0x29, 0x60,
+0x1C, 0xEE, 0x64, 0x2A, 0x60, 0x17, 0xEE, 0x64,
+0x36, 0x60, 0x12, 0xEE, 0xB4, 0x37, 0x02, 0x80,
+0x0C, 0xAD, 0x07, 0x7F, 0xFF, 0x12, 0xAF, 0xA4,
+0x90, 0x93, 0xF4, 0xE0, 0xFF, 0x90, 0x93, 0xF3,
+0xE0, 0x4F, 0x90, 0x05, 0x22, 0xF0, 0x90, 0x97,
+0x6E, 0xE0, 0x90, 0x93, 0x01, 0xF0, 0x22, 0x75,
+0x66, 0x14, 0x90, 0x88, 0x32, 0xE0, 0x44, 0x10,
+0xF0, 0x12, 0xCE, 0x47, 0xF0, 0x7D, 0x01, 0x12,
+0x76, 0xF7, 0x90, 0x00, 0x06, 0xE0, 0x44, 0x40,
+0xF0, 0x90, 0x88, 0x41, 0xE0, 0x90, 0x00, 0x93,
+0xF0, 0x90, 0x88, 0x37, 0xE0, 0x60, 0x12, 0x90,
+0x01, 0x2F, 0xE0, 0x30, 0xE7, 0x05, 0x74, 0x10,
+0xF0, 0x80, 0x06, 0x90, 0x01, 0x2F, 0x74, 0x90,
+0xF0, 0x90, 0x93, 0x3F, 0xE0, 0x30, 0xE0, 0x60,
+0x90, 0xFD, 0x09, 0xE4, 0xF0, 0x90, 0xFD, 0x08,
+0xF0, 0x90, 0x0E, 0x4B, 0xE0, 0x54, 0xFC, 0xF0,
+0xE4, 0x90, 0x95, 0xAF, 0xF0, 0x90, 0x95, 0xAF,
+0xE0, 0xFF, 0xC3, 0x94, 0x05, 0x50, 0x2D, 0x12,
+0xA7, 0x69, 0x80, 0x05, 0xC3, 0x33, 0xCE, 0x33,
+0xCE, 0xD8, 0xF9, 0xFF, 0x90, 0x93, 0x41, 0xE0,
+0xFD, 0xEF, 0x5D, 0x60, 0x0F, 0x90, 0x95, 0xAF,
+0x91, 0x41, 0x90, 0x95, 0xAF, 0x91, 0x61, 0x44,
+0x20, 0xF0, 0x91, 0x3A, 0x90, 0x95, 0xAF, 0xE0,
+0x04, 0xF0, 0x80, 0xC9, 0x90, 0x00, 0x92, 0xE0,
+0x54, 0xFE, 0xF0, 0xE0, 0x44, 0x08, 0xF0, 0x90,
+0x00, 0x02, 0xE0, 0x54, 0xFD, 0xF0, 0x80, 0x07,
+0x90, 0x00, 0x92, 0xE0, 0x44, 0x01, 0xF0, 0x90,
+0x00, 0x08, 0xE0, 0x44, 0x10, 0xF0, 0x7F, 0x01,
+0x71, 0xE4, 0x90, 0x00, 0x90, 0xE0, 0x44, 0x01,
+0xF0, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+0x00, 0x00, 0x00, 0x00, 0x00, 0x7F, 0x14, 0x7E,
+0x00, 0x02, 0x7C, 0x6A, 0x90, 0x97, 0x61, 0xEF,
+0xF0, 0xE4, 0xA3, 0xF0, 0xA3, 0xF0, 0x90, 0x01,
+0x09, 0xE0, 0x7F, 0x00, 0x30, 0xE7, 0x02, 0x7F,
+0x01, 0x90, 0x97, 0x61, 0xE0, 0x6F, 0x60, 0x32,
+0xC3, 0x90, 0x97, 0x63, 0xE0, 0x94, 0x88, 0x90,
+0x97, 0x62, 0xE0, 0x94, 0x13, 0x40, 0x08, 0x90,
+0x01, 0xC0, 0xE0, 0x44, 0x10, 0xF0, 0x22, 0x90,
+0x97, 0x62, 0x91, 0x33, 0xD3, 0x90, 0x97, 0x63,
+0xE0, 0x94, 0x32, 0x90, 0x97, 0x62, 0xE0, 0x94,
+0x00, 0x40, 0xC3, 0x90, 0x01, 0xC6, 0xE0, 0x30,
+0xE0, 0xBC, 0x22, 0xE4, 0x75, 0xF0, 0x01, 0x12,
+0x02, 0xE7, 0x7F, 0x14, 0x7E, 0x00, 0x02, 0x7C,
+0x6A, 0xE0, 0xFF, 0x24, 0x4D, 0xF5, 0x82, 0xE4,
+0x34, 0x93, 0xF5, 0x83, 0xE0, 0x90, 0x01, 0xB0,
+0xF0, 0x74, 0x52, 0x2F, 0xF5, 0x82, 0xE4, 0x34,
+0x93, 0xF5, 0x83, 0xE0, 0x90, 0x01, 0xB1, 0xF0,
+0x22, 0xE0, 0xFF, 0x24, 0x43, 0xF5, 0x82, 0xE4,
+0x34, 0x93, 0xF5, 0x83, 0xE0, 0x90, 0x01, 0xB2,
+0xF0, 0x74, 0x48, 0x2F, 0xF5, 0x82, 0xE4, 0x34,
+0x93, 0xF5, 0x83, 0xE0, 0x90, 0x01, 0xB3, 0xF0,
+0xE0, 0x22, 0x12, 0x02, 0x06, 0x90, 0x96, 0x52,
+0xF0, 0x22, 0xE4, 0xF5, 0x7A, 0xEF, 0x14, 0xF5,
+0x79, 0xED, 0xFF, 0xE5, 0x79, 0xF5, 0x82, 0x33,
+0x95, 0xE0, 0xF5, 0x83, 0xC3, 0xE5, 0x82, 0x9F,
+0x74, 0x80, 0xF8, 0x65, 0x83, 0x98, 0x40, 0x52,
+0xE5, 0x79, 0x78, 0x03, 0xA2, 0xE7, 0x13, 0xD8,
+0xFB, 0xFF, 0x33, 0x95, 0xE0, 0xFE, 0xEB, 0x12,
+0xBF, 0x87, 0xE5, 0x82, 0x2F, 0xF5, 0x82, 0xE5,
+0x83, 0x3E, 0xF5, 0x83, 0xE0, 0xF5, 0x82, 0x75,
+0x83, 0x00, 0xE5, 0x79, 0x12, 0xA7, 0x66, 0x80,
+0x05, 0xC3, 0x33, 0xCE, 0x33, 0xCE, 0xD8, 0xF9,
+0xFF, 0xEE, 0x55, 0x83, 0xFE, 0xEF, 0x55, 0x82,
+0x4E, 0x60, 0x13, 0x85, 0x79, 0x7B, 0x05, 0x7A,
+0x90, 0x95, 0xEA, 0xE0, 0x65, 0x7A, 0x60, 0x0A,
+0xE5, 0x7B, 0xD3, 0x9D, 0x40, 0x04, 0x15, 0x79,
+0x80, 0x97, 0xAF, 0x7B, 0x22, 0xEF, 0x64, 0x13,
 0x60, 0x04, 0xEF, 0xB4, 0x0B, 0x05, 0x90, 0x88,
 0xE3, 0x80, 0x1F, 0xEF, 0x64, 0x12, 0x60, 0x04,
 0xEF, 0xB4, 0x0A, 0x05, 0x90, 0x88, 0xE4, 0x80,
 0x11, 0xEF, 0x64, 0x11, 0x60, 0x04, 0xEF, 0xB4,
 0x09, 0x05, 0x90, 0x88, 0xE5, 0x80, 0x03, 0x90,
 0x88, 0xE2, 0xE0, 0xF5, 0x0F, 0xAF, 0x0F, 0x22,
+0x90, 0x04, 0x85, 0xE0, 0xF5, 0x70, 0x90, 0x96,
+0x63, 0xE0, 0x04, 0xF0, 0xE4, 0xF5, 0x67, 0x90,
+0x88, 0x2B, 0xE0, 0xFF, 0xE5, 0x67, 0xC3, 0x9F,
+0x40, 0x03, 0x02, 0xE3, 0xAB, 0x12, 0xBD, 0x58,
+0xE0, 0xF5, 0x72, 0x12, 0xED, 0xCD, 0xE0, 0x65,
+0x72, 0x60, 0x15, 0x90, 0x96, 0x7C, 0x74, 0x06,
+0xF0, 0xE4, 0xFB, 0xAD, 0x72, 0xAF, 0x67, 0x12,
+0xBD, 0xE5, 0x12, 0xED, 0xCD, 0xE5, 0x72, 0xF0,
+0x90, 0x04, 0xA0, 0xE0, 0x64, 0x01, 0x70, 0x47,
+0xA3, 0xE0, 0x65, 0x67, 0x70, 0x41, 0xA3, 0xE0,
+0xF5, 0x68, 0xA3, 0xE0, 0x90, 0x95, 0xE2, 0xF0,
+0x12, 0xBD, 0x58, 0xE0, 0x65, 0x68, 0x70, 0x03,
+0x02, 0xE3, 0xA6, 0x12, 0xBD, 0x58, 0xE5, 0x68,
+0xF0, 0x12, 0x97, 0xAF, 0xE0, 0x54, 0xFC, 0xFF,
+0x90, 0x95, 0xE2, 0xE0, 0x54, 0x03, 0x4F, 0xFF,
+0x12, 0x97, 0xAF, 0xEF, 0xF0, 0x90, 0x96, 0x7C,
+0x74, 0x07, 0xF0, 0xE4, 0xFB, 0xAD, 0x68, 0xAF,
+0x67, 0x12, 0xBD, 0xE5, 0x02, 0xE3, 0xA6, 0x75,
+0xF0, 0x12, 0xE5, 0x67, 0x12, 0xBF, 0x81, 0xE0,
+0xFF, 0x90, 0x95, 0xDA, 0xE4, 0xF0, 0xA3, 0xEF,
+0xF0, 0x75, 0xF0, 0x12, 0xE5, 0x67, 0x90, 0x89,
+0x53, 0x12, 0x04, 0x6E, 0xE0, 0xF5, 0x6D, 0xA3,
+0xE0, 0xF5, 0x6E, 0xE5, 0x67, 0x75, 0xF0, 0x12,
+0xA4, 0x24, 0x57, 0xF9, 0x74, 0x89, 0x35, 0xF0,
+0xFA, 0x7B, 0x01, 0x90, 0x95, 0xD7, 0x12, 0x86,
+0x42, 0x12, 0xEE, 0x17, 0xFF, 0x12, 0x03, 0x13,
+0x2F, 0xFF, 0x12, 0xEE, 0x1D, 0x2F, 0xFF, 0x12,
+0xE4, 0x1C, 0x2F, 0xFF, 0x12, 0xE3, 0xFD, 0x2F,
+0xF5, 0x71, 0x12, 0xBD, 0x58, 0xE0, 0xF5, 0x68,
+0x54, 0x80, 0xF5, 0x6A, 0xE5, 0x68, 0x54, 0x7F,
+0xF5, 0x69, 0x75, 0xF0, 0x12, 0xE5, 0x67, 0x12,
+0xB9, 0x0F, 0xE0, 0x64, 0x01, 0x60, 0x02, 0xE1,
+0x89, 0x12, 0xE3, 0xEA, 0x12, 0xEE, 0x17, 0xFF,
+0xAE, 0xF0, 0x12, 0x03, 0x13, 0x2F, 0xFF, 0xE5,
+0xF0, 0x3E, 0xFE, 0x12, 0xEE, 0x1D, 0x2F, 0xFF,
+0xEE, 0x12, 0xE4, 0x19, 0x2F, 0xFF, 0xEE, 0x35,
+0xF0, 0xFE, 0x12, 0xE3, 0xFD, 0x2F, 0xFF, 0xEE,
+0x35, 0xF0, 0x90, 0x95, 0xDC, 0xF0, 0xA3, 0xEF,
+0xF0, 0x12, 0x03, 0x13, 0xFF, 0xC3, 0x90, 0x95,
+0xDD, 0xE0, 0x9F, 0xFE, 0x90, 0x95, 0xDC, 0xE0,
+0x95, 0xF0, 0x90, 0x95, 0xDE, 0xF0, 0xA3, 0xCE,
+0xF0, 0x12, 0xE4, 0x1C, 0xFD, 0xAC, 0xF0, 0x25,
+0xE0, 0xFF, 0xEC, 0x33, 0xFE, 0xEF, 0x2D, 0xFD,
+0xEE, 0x3C, 0xFC, 0x12, 0xEE, 0x1D, 0x25, 0xE0,
+0xFF, 0xE5, 0xF0, 0x33, 0xFE, 0x12, 0xEE, 0x17,
+0x2F, 0xFF, 0xEE, 0x35, 0xF0, 0xCF, 0x2D, 0xFD,
+0xEF, 0x3C, 0xFC, 0x12, 0xE3, 0xEA, 0x12, 0xE3,
+0xFD, 0xAE, 0xF0, 0x78, 0x02, 0xC3, 0x33, 0xCE,
+0x33, 0xCE, 0xD8, 0xF9, 0x2D, 0xFF, 0xEC, 0x3E,
+0x90, 0x95, 0xE0, 0xF0, 0xA3, 0xEF, 0xF0, 0x90,
+0x95, 0xDA, 0x12, 0xED, 0x7B, 0x12, 0xED, 0xEF,
+0x12, 0xED, 0x8C, 0x50, 0x08, 0x90, 0x95, 0xDA,
+0x12, 0xED, 0x98, 0x80, 0x04, 0x7E, 0xFF, 0x7F,
+0xFF, 0xE5, 0x67, 0x12, 0xED, 0xEF, 0x12, 0xBA,
+0x75, 0x90, 0x95, 0xDC, 0x12, 0xED, 0x7B, 0x12,
+0xED, 0xF9, 0x12, 0xED, 0x8C, 0x50, 0x08, 0x90,
+0x95, 0xDC, 0x12, 0xED, 0x98, 0x80, 0x04, 0x7E,
+0xFF, 0x7F, 0xFF, 0xE5, 0x67, 0x12, 0xED, 0xF9,
+0x12, 0xBA, 0x75, 0x90, 0x95, 0xE0, 0x12, 0xED,
+0x7B, 0x12, 0xEE, 0x03, 0x12, 0xED, 0x8C, 0x50,
+0x08, 0x90, 0x95, 0xE0, 0x12, 0xED, 0x98, 0x80,
+0x04, 0x7E, 0xFF, 0x7F, 0xFF, 0xE5, 0x67, 0x12,
+0xEE, 0x03, 0x12, 0xBA, 0x75, 0xC3, 0x74, 0xFF,
+0x95, 0x6E, 0xFF, 0x74, 0xFF, 0x95, 0x6D, 0xFE,
+0x12, 0xED, 0xC1, 0x12, 0xED, 0x8C, 0x50, 0x0A,
+0xE5, 0x6E, 0x2D, 0xFF, 0xE5, 0x6D, 0x3C, 0xFE,
+0x80, 0x04, 0x7E, 0xFF, 0x7F, 0xFF, 0x12, 0xED,
+0xC1, 0x12, 0xBA, 0x75, 0x12, 0xEE, 0x4A, 0xFB,
+0xC3, 0x74, 0xFF, 0x9B, 0xFF, 0x74, 0xFF, 0x9E,
+0xFE, 0x74, 0xFF, 0x94, 0x00, 0xFD, 0x74, 0xFF,
+0x94, 0x00, 0xFC, 0x90, 0x8D, 0x71, 0x12, 0xEE,
+0x3B, 0x50, 0x12, 0x12, 0xEE, 0x4A, 0xFF, 0xE4,
+0xFC, 0xFD, 0x90, 0x8D, 0x71, 0x12, 0x86, 0x2D,
+0x12, 0x85, 0xA9, 0x80, 0x06, 0x74, 0xFF, 0xFF,
+0xFE, 0xFD, 0xFC, 0x90, 0x8D, 0x71, 0x12, 0x04,
+0x31, 0xAF, 0x67, 0x12, 0x78, 0x4A, 0xEF, 0x70,
+0x03, 0x02, 0xE3, 0xA6, 0x75, 0xF0, 0x12, 0xE5,
+0x67, 0x90, 0x89, 0x52, 0x12, 0x04, 0x6E, 0x12,
+0x97, 0x34, 0x30, 0xE0, 0x03, 0x02, 0xE3, 0xA6,
+0xE5, 0x67, 0x13, 0x13, 0x13, 0x54, 0x1F, 0x12,
+0xCA, 0x31, 0xE0, 0xFD, 0x7C, 0x00, 0xE5, 0x67,
+0x12, 0xA7, 0x66, 0x80, 0x05, 0xC3, 0x33, 0xCE,
+0x33, 0xCE, 0xD8, 0xF9, 0xFF, 0xEE, 0x5C, 0xFE,
+0xEF, 0x5D, 0x4E, 0x60, 0x03, 0x02, 0xE3, 0xA6,
+0xE5, 0x6E, 0x45, 0x6D, 0x70, 0x0D, 0x90, 0x95,
+0xDA, 0xE0, 0x70, 0x02, 0xA3, 0xE0, 0x70, 0x03,
+0x02, 0xE3, 0xA6, 0x90, 0x96, 0x51, 0xE0, 0x60,
+0x12, 0x75, 0x73, 0x0A, 0x12, 0xE4, 0x46, 0xE4,
+0x93, 0xC3, 0x13, 0x74, 0x01, 0x93, 0x13, 0xF5,
+0x74, 0x80, 0x0A, 0x7B, 0xFF, 0x12, 0xCA, 0xDD,
+0xE4, 0xF5, 0x73, 0xF5, 0x74, 0x75, 0xF0, 0x12,
+0xE5, 0x67, 0x12, 0xBF, 0x5C, 0xFF, 0xE5, 0x69,
+0xD3, 0x9F, 0x40, 0x08, 0x8F, 0x69, 0xE5, 0x69,
+0x45, 0x6A, 0xF5, 0x68, 0x71, 0xDD, 0xC3, 0x94,
+0x05, 0x40, 0x02, 0x21, 0x9F, 0xE5, 0x69, 0x90,
+0x81, 0x61, 0x93, 0xF5, 0x6F, 0xFD, 0xAF, 0x69,
+0x12, 0x60, 0x6F, 0x8F, 0x6F, 0xE5, 0x6A, 0x60,
+0x04, 0x05, 0x6F, 0x05, 0x6F, 0xE5, 0x69, 0xC3,
+0x94, 0x0C, 0x40, 0x1C, 0x74, 0x53, 0x25, 0x67,
+0x91, 0x54, 0xE0, 0xFF, 0x54, 0x7F, 0xFE, 0xEF,
+0x30, 0xE7, 0x06, 0xE5, 0x6F, 0x2E, 0xFF, 0x80,
+0x05, 0xC3, 0xE5, 0x6F, 0x9E, 0xFF, 0x8F, 0x6F,
+0xE5, 0x6F, 0xD3, 0x94, 0x1A, 0xAF, 0x6F, 0x40,
+0x02, 0x7F, 0x1A, 0x8F, 0x6F, 0xE5, 0x68, 0x90,
+0x81, 0xD9, 0x93, 0xFF, 0xD3, 0x90, 0x95, 0xDB,
+0xE0, 0x9F, 0x90, 0x95, 0xDA, 0xE0, 0x94, 0x00,
+0x40, 0x02, 0x21, 0x57, 0xC3, 0xE5, 0x6E, 0x94,
+0x0A, 0xE5, 0x6D, 0x94, 0x00, 0x50, 0x7A, 0x12,
+0xCA, 0xD1, 0xE0, 0xC3, 0x94, 0x01, 0x40, 0x06,
+0x12, 0xCA, 0xD1, 0xE0, 0x14, 0xF0, 0x71, 0xEA,
+0x71, 0xFD, 0xFF, 0x90, 0x95, 0xDB, 0xE0, 0x2F,
+0xFF, 0x90, 0x95, 0xDA, 0xE0, 0x91, 0x19, 0x2F,
+0xFD, 0xEE, 0x35, 0xF0, 0xFC, 0xE5, 0x6D, 0xC3,
+0x13, 0xFE, 0xE5, 0x6E, 0x13, 0xFF, 0xD3, 0xED,
+0x9F, 0xEC, 0x9E, 0x40, 0x0E, 0xE5, 0x67, 0x94,
+0x05, 0x50, 0x06, 0x12, 0xCA, 0xD1, 0x74, 0x02,
+0xF0, 0x21, 0x57, 0x71, 0xEA, 0x12, 0x03, 0x13,
+0x65, 0x71, 0x70, 0x02, 0xE5, 0xF0, 0x70, 0x25,
+0xE5, 0x67, 0xC3, 0x94, 0x05, 0x50, 0x12, 0x12,
+0xCA, 0xD1, 0xE0, 0xD3, 0x94, 0x00, 0x40, 0x09,
+0x7D, 0x06, 0xAF, 0x67, 0x12, 0xB9, 0x3F, 0x61,
+0xA6, 0xE4, 0xFD, 0xAF, 0x67, 0x12, 0xB9, 0x9E,
+0x12, 0xB9, 0x3B, 0x61, 0x83, 0x91, 0x03, 0x61,
+0x83, 0x12, 0xCA, 0xD1, 0xE4, 0xF0, 0x90, 0x91,
+0x6C, 0x74, 0x02, 0xF0, 0xAB, 0x6F, 0xAD, 0x67,
+0xAF, 0x6E, 0xAE, 0x6D, 0x12, 0x41, 0x9C, 0x8E,
+0x6B, 0x8F, 0x6C, 0x91, 0x46, 0xC3, 0x74, 0x01,
+0x93, 0x95, 0x74, 0xFF, 0xE4, 0x93, 0x94, 0x00,
+0xFE, 0xD3, 0xE5, 0x6C, 0x9F, 0xE5, 0x6B, 0x9E,
+0x40, 0x0D, 0x71, 0xB8, 0xE4, 0xF0, 0x7D, 0x01,
+0xAF, 0x67, 0x12, 0xB9, 0x9E, 0x61, 0x83, 0x91,
+0x11, 0xC3, 0xE5, 0x6C, 0x9F, 0xE5, 0x6B, 0x94,
+0x00, 0x50, 0x0D, 0x71, 0xB8, 0xE4, 0xF0, 0x7D,
+0x01, 0xAF, 0x67, 0x12, 0xBE, 0x9F, 0x61, 0x83,
+0x12, 0xB9, 0x3B, 0x71, 0xB8, 0xE0, 0x04, 0xF0,
+0xE5, 0x69, 0x90, 0x81, 0xED, 0x93, 0x25, 0x73,
+0xFF, 0xE4, 0x33, 0xFE, 0x71, 0xB8, 0xE0, 0xC3,
+0x9F, 0xEE, 0x12, 0xCB, 0xE2, 0x50, 0x02, 0x61,
+0x83, 0x71, 0xB8, 0xE4, 0xF0, 0x91, 0x11, 0x91,
+0x46, 0x74, 0x01, 0x93, 0x2F, 0xFF, 0xE4, 0x93,
+0x34, 0x00, 0xC3, 0x13, 0xFE, 0xEF, 0x13, 0xFF,
+0xE5, 0x67, 0x12, 0xBA, 0x6C, 0x61, 0x83, 0x71,
+0xDD, 0x64, 0x05, 0x60, 0x02, 0x41, 0x5E, 0x90,
+0x04, 0xA0, 0xE0, 0x64, 0x02, 0x70, 0x10, 0x71,
+0xC4, 0xE4, 0xF0, 0x90, 0x04, 0xA1, 0xE0, 0x78,
+0x88, 0xF6, 0x12, 0xCA, 0x3B, 0x61, 0x9F, 0xAD,
+0x69, 0xAF, 0x67, 0x12, 0x72, 0xEE, 0x91, 0x3A,
+0xEF, 0xF0, 0xE5, 0x67, 0x12, 0xCA, 0x14, 0xE0,
+0x54, 0x07, 0x78, 0x88, 0xF6, 0x71, 0xF0, 0xFF,
+0xC3, 0x94, 0x30, 0x40, 0x1C, 0x75, 0xF0, 0x12,
+0xE5, 0x67, 0x12, 0xBA, 0x9A, 0xFE, 0xC4, 0x13,
+0x13, 0x54, 0x03, 0x20, 0xE0, 0x0B, 0x91, 0x3A,
+0xE0, 0x60, 0x06, 0x90, 0x96, 0x51, 0xE0, 0x60,
+0x0A, 0xE4, 0x78, 0x88, 0xF6, 0x71, 0xC4, 0xE4,
+0xF0, 0x80, 0x54, 0x91, 0x2E, 0xE0, 0xFE, 0x24,
+0x05, 0xFD, 0xE4, 0x33, 0xFC, 0xEF, 0x12, 0xCB,
+0xDF, 0x50, 0x1C, 0x71, 0xF0, 0x24, 0x05, 0xFD,
+0xE4, 0x33, 0xFC, 0xEE, 0x12, 0xCB, 0xDF, 0x50,
+0x0E, 0x91, 0x22, 0xE0, 0xB5, 0x69, 0x08, 0x71,
+0xD1, 0xE0, 0xC3, 0x94, 0x0A, 0x40, 0x23, 0x78,
+0x88, 0xE6, 0xFF, 0x70, 0x04, 0x76, 0x01, 0x80,
+0x0C, 0xEF, 0x78, 0x88, 0xB4, 0x01, 0x04, 0x76,
+0x03, 0x80, 0x02, 0x76, 0x05, 0x71, 0xD1, 0xE4,
+0xF0, 0x71, 0xF0, 0xFF, 0x91, 0x2E, 0xEF, 0xF0,
+0x80, 0x05, 0x71, 0xC4, 0xE0, 0x04, 0xF0, 0x91,
+0x22, 0xE5, 0x69, 0xF0, 0x61, 0x7E, 0x71, 0xDD,
+0x64, 0x06, 0x60, 0x02, 0x61, 0x83, 0xF5, 0x6B,
+0xF5, 0x6C, 0xE5, 0x67, 0x12, 0xCA, 0x14, 0xE0,
+0x54, 0x07, 0x78, 0x88, 0xF6, 0xD3, 0xE5, 0x6E,
+0x94, 0xE8, 0xE5, 0x6D, 0x94, 0x03, 0x40, 0x06,
+0x78, 0x86, 0x76, 0x05, 0x80, 0x15, 0xD3, 0xE5,
+0x6E, 0x94, 0xFA, 0xE5, 0x6D, 0x94, 0x00, 0x40,
+0x06, 0x78, 0x86, 0x76, 0x02, 0x80, 0x04, 0xE4,
+0x78, 0x86, 0xF6, 0xE5, 0x6E, 0xAE, 0x6D, 0x78,
+0x86, 0x86, 0x00, 0x08, 0x80, 0x05, 0xCE, 0xC3,
+0x13, 0xCE, 0x13, 0xD8, 0xF9, 0xFF, 0x90, 0x82,
+0x06, 0xE4, 0x91, 0x0A, 0x90, 0x95, 0xE3, 0xEE,
+0xF0, 0xA3, 0xEF, 0xF0, 0xE4, 0x78, 0x87, 0xF6,
+0x71, 0xEA, 0x78, 0x87, 0xE6, 0xFD, 0x12, 0xCA,
+0xE7, 0xAE, 0xF0, 0x78, 0x86, 0x86, 0x00, 0x08,
+0x80, 0x05, 0xCE, 0xC3, 0x13, 0xCE, 0x13, 0xD8,
+0xF9, 0xFF, 0xED, 0x90, 0x82, 0x01, 0x91, 0x0A,
+0xEF, 0x25, 0x6C, 0xF5, 0x6C, 0xEE, 0x35, 0x6B,
+0xF5, 0x6B, 0xC3, 0x90, 0x95, 0xE4, 0xE0, 0x95,
+0x6C, 0x90, 0x95, 0xE3, 0xE0, 0x95, 0x6B, 0x40,
+0x07, 0x78, 0x87, 0x06, 0xE6, 0xB4, 0x05, 0xC0,
+0x78, 0x87, 0xE6, 0xC3, 0x13, 0xF6, 0xFD, 0x08,
+0xE6, 0x24, 0x01, 0xFF, 0xE4, 0x33, 0xA2, 0xE7,
+0x13, 0xEF, 0x13, 0x08, 0xF6, 0xD3, 0x9D, 0x40,
+0x07, 0xE6, 0x79, 0x87, 0x97, 0xF6, 0x80, 0x04,
+0xE4, 0x78, 0x89, 0xF6, 0x71, 0xAC, 0xE0, 0xC3,
+0x13, 0xFF, 0x78, 0x89, 0xE6, 0xC4, 0x33, 0x54,
+0xE0, 0x2F, 0xFF, 0x71, 0xAC, 0xEF, 0xF0, 0x71,
+0xAC, 0xE0, 0xC3, 0x94, 0xC0, 0x40, 0x05, 0x71,
+0xAC, 0x74, 0xC0, 0xF0, 0x71, 0xAC, 0xE0, 0x24,
+0x1F, 0xFF, 0xE4, 0x33, 0xFE, 0xEF, 0x78, 0x06,
+0xCE, 0xA2, 0xE7, 0x13, 0xCE, 0x13, 0xD8, 0xF8,
+0x78, 0x89, 0xF6, 0xE6, 0x25, 0xE0, 0xF6, 0x70,
+0x03, 0xFF, 0x80, 0x05, 0x78, 0x89, 0xE6, 0x14,
+0xFF, 0x78, 0x88, 0xA6, 0x07, 0xD3, 0x90, 0x95,
+0xDB, 0xE0, 0x94, 0x03, 0x90, 0x95, 0xDA, 0xE0,
+0x94, 0x00, 0x40, 0x02, 0xE4, 0xF6, 0x78, 0x88,
+0x12, 0xCA, 0x3B, 0x71, 0xDD, 0xFF, 0xD3, 0x94,
+0x05, 0x50, 0x05, 0xEF, 0x04, 0xFF, 0x80, 0x02,
+0x7F, 0x00, 0x74, 0x76, 0x25, 0x67, 0xF5, 0x82,
+0xE4, 0x34, 0x8E, 0xF5, 0x83, 0xEF, 0xF0, 0xE4,
+0xF5, 0x6B, 0xF5, 0x6C, 0x91, 0x03, 0x05, 0x67,
+0x02, 0xDD, 0x3F, 0x22, 0x74, 0x4F, 0x25, 0x67,
+0xF5, 0x82, 0xE4, 0x34, 0x8D, 0xF5, 0x83, 0x22,
+0x74, 0xA6, 0x25, 0x67, 0xF5, 0x82, 0xE4, 0x34,
+0x8D, 0xF5, 0x83, 0x22, 0x74, 0x76, 0x25, 0x67,
+0xF5, 0x82, 0xE4, 0x34, 0x8E, 0xF5, 0x83, 0xE4,
+0xF0, 0x74, 0xF6, 0x25, 0x67, 0xF5, 0x82, 0xE4,
+0x34, 0x8D, 0xF5, 0x83, 0x22, 0x74, 0x76, 0x25,
+0x67, 0xF5, 0x82, 0xE4, 0x34, 0x8E, 0xF5, 0x83,
+0xE0, 0x22, 0x90, 0x95, 0xD7, 0x02, 0x86, 0x39,
+0x74, 0xD6, 0x25, 0x67, 0xF5, 0x82, 0xE4, 0x34,
+0x8D, 0xF5, 0x83, 0xE0, 0x22, 0x90, 0x00, 0x08,
+0x02, 0x03, 0x3E, 0x7D, 0x01, 0xAF, 0x67, 0x02,
+0x61, 0xF7, 0x93, 0xFD, 0x7C, 0x00, 0x02, 0x02,
+0x80, 0xE5, 0x69, 0x90, 0x81, 0x9D, 0x93, 0xFF,
+0x22, 0x35, 0xF0, 0xFE, 0x90, 0x00, 0x06, 0x02,
+0x03, 0x3E, 0x74, 0xA6, 0x25, 0x67, 0xF5, 0x82,
+0xE4, 0x34, 0x8E, 0xF5, 0x83, 0x22, 0x74, 0x5F,
+0x25, 0x67, 0xF5, 0x82, 0xE4, 0x34, 0x8D, 0xF5,
+0x83, 0x22, 0x74, 0xE6, 0x25, 0x67, 0xF5, 0x82,
+0xE4, 0x34, 0x8D, 0xF5, 0x83, 0x22, 0xE5, 0x69,
+0x25, 0xE0, 0x24, 0x75, 0xF5, 0x82, 0xE4, 0x34,
+0x81, 0xF5, 0x83, 0x22, 0xF5, 0x82, 0xE4, 0x34,
+0x96, 0xF5, 0x83, 0x22, 0x7E, 0x00, 0x7F, 0x8E,
+0x7D, 0x00, 0x7B, 0x01, 0x7A, 0x93, 0x79, 0x58,
+0x02, 0x04, 0x80, 0x90, 0x01, 0x94, 0xE0, 0x44,
+0x01, 0xF0, 0x90, 0x01, 0xC7, 0xE4, 0xF0, 0x22,
 0x90, 0x01, 0x9A, 0xE0, 0x54, 0xC0, 0x44, 0x0B,
-0x12, 0xD7, 0x73, 0x90, 0x01, 0x98, 0xE0, 0x54,
+0x12, 0xCF, 0xBE, 0x90, 0x01, 0x98, 0xE0, 0x54,
 0xC0, 0x7F, 0x00, 0xB4, 0x40, 0x02, 0x7F, 0x01,
-0x22, 0x22, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0,
-0xD0, 0xE4, 0xFE, 0xFD, 0xEF, 0xB4, 0x01, 0x0D,
-0xEB, 0xB4, 0x02, 0x03, 0x0D, 0x80, 0x06, 0xEB,
-0xB4, 0x01, 0x02, 0x7D, 0x02, 0xAF, 0x06, 0xEF,
-0xC4, 0x54, 0xF0, 0x4D, 0xFF, 0xD0, 0xD0, 0x92,
-0xAF, 0x22, 0xE4, 0x90, 0x96, 0x17, 0xF0, 0xA3,
-0xF0, 0x7F, 0x83, 0x12, 0x7B, 0x41, 0x90, 0x96,
-0x16, 0xEF, 0xF0, 0x7F, 0x83, 0x12, 0x7B, 0x41,
-0xAE, 0x07, 0x90, 0x96, 0x16, 0xE0, 0xFF, 0xB5,
-0x06, 0x01, 0x22, 0xC3, 0x90, 0x96, 0x18, 0xE0,
-0x94, 0x64, 0x90, 0x96, 0x17, 0xE0, 0x94, 0x00,
-0x40, 0x0D, 0x90, 0x01, 0xC0, 0xE0, 0x44, 0x40,
-0xF0, 0x90, 0x96, 0x16, 0xE0, 0xFF, 0x22, 0x90,
-0x96, 0x17, 0x12, 0xAF, 0xD5, 0x80, 0xC2, 0x90,
-0x01, 0xC4, 0x74, 0x17, 0xF0, 0x74, 0xE6, 0xA3,
+0x22, 0x90, 0x01, 0x95, 0xE0, 0x7F, 0x00, 0x30,
+0xE4, 0x02, 0x7F, 0x01, 0x22, 0x90, 0x88, 0x9D,
+0xE0, 0x30, 0xE0, 0x09, 0x90, 0x95, 0x4C, 0xE0,
+0x20, 0xE0, 0x02, 0x91, 0xAE, 0x22, 0x90, 0x95,
+0x4D, 0xE0, 0x04, 0xF0, 0x22, 0x90, 0x8A, 0x75,
+0x12, 0x8A, 0x66, 0x90, 0x8A, 0xE5, 0x12, 0x90,
+0x4B, 0x7F, 0x02, 0x02, 0x04, 0x7E, 0x90, 0x01,
+0xCF, 0xE0, 0x90, 0x95, 0xED, 0xF0, 0xE0, 0xFF,
+0x30, 0xE0, 0x07, 0x90, 0x01, 0xCF, 0xE0, 0x54,
+0xFE, 0xF0, 0xEF, 0x30, 0xE5, 0x23, 0x90, 0x01,
+0xCF, 0xE0, 0x54, 0xDF, 0xF0, 0x90, 0x01, 0x34,
+0x74, 0x20, 0xF0, 0xE4, 0xF5, 0xA8, 0xF5, 0xE8,
+0x12, 0x76, 0x6D, 0x90, 0x00, 0x03, 0xE0, 0x54,
+0xFB, 0xFD, 0x7F, 0x03, 0x12, 0x7B, 0x2E, 0x80,
+0xFE, 0x22, 0x90, 0x93, 0x58, 0xE0, 0x30, 0xE0,
+0x0B, 0x90, 0x93, 0xD8, 0xE0, 0x60, 0x05, 0x7F,
+0x07, 0x12, 0x9F, 0xF0, 0x22, 0x22, 0x90, 0x93,
+0x03, 0xE0, 0x30, 0xE0, 0x0F, 0x13, 0x13, 0x13,
+0x54, 0x1F, 0x30, 0xE0, 0x07, 0x90, 0x04, 0x1F,
+0xE0, 0x44, 0x40, 0xF0, 0x22, 0xD3, 0x10, 0xAF,
+0x01, 0xC3, 0xC0, 0xD0, 0x90, 0x96, 0xFC, 0xEC,
+0xF0, 0xA3, 0xED, 0xF0, 0x90, 0x96, 0xFB, 0xEF,
+0xF0, 0xA3, 0xA3, 0xE0, 0xFD, 0x12, 0x7B, 0xBD,
+0x90, 0x97, 0x06, 0x12, 0x04, 0x31, 0x90, 0x96,
+0xFE, 0x12, 0x04, 0xB8, 0x12, 0x03, 0xCD, 0x90,
+0x97, 0x06, 0xD1, 0x39, 0xC0, 0x04, 0xC0, 0x05,
+0xC0, 0x06, 0xC0, 0x07, 0x90, 0x96, 0xFE, 0x12,
+0x04, 0xB8, 0x90, 0x97, 0x02, 0xD1, 0x39, 0xD0,
+0x03, 0xD0, 0x02, 0xD0, 0x01, 0xD0, 0x00, 0x12,
+0x86, 0x20, 0x90, 0x97, 0x0A, 0x12, 0x04, 0x31,
+0x90, 0x96, 0xFC, 0xA3, 0xE0, 0xFD, 0xC0, 0x05,
+0x90, 0x97, 0x0A, 0x12, 0x04, 0xB8, 0x90, 0x8B,
+0x9F, 0x12, 0x04, 0x31, 0x90, 0x96, 0xFB, 0xE0,
+0xFF, 0xD0, 0x05, 0x12, 0x79, 0x53, 0xD0, 0xD0,
+0x92, 0xAF, 0x22, 0xFD, 0xEE, 0x13, 0x13, 0x54,
+0x07, 0xFB, 0x90, 0x93, 0x58, 0xE0, 0xFE, 0xC4,
+0x54, 0x0F, 0x90, 0x97, 0x57, 0xF0, 0xAF, 0x04,
+0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0x90,
+0x97, 0x54, 0xEF, 0xF0, 0xED, 0x64, 0x01, 0x70,
+0x2E, 0xEB, 0xB4, 0x01, 0x07, 0xE0, 0x24, 0x02,
+0xF5, 0x10, 0x80, 0x08, 0x90, 0x97, 0x54, 0xE0,
+0x24, 0xFE, 0xF5, 0x10, 0x90, 0x96, 0xFE, 0x12,
+0x04, 0x3D, 0x00, 0x00, 0x00, 0xFF, 0xAF, 0x10,
+0xD1, 0x2A, 0xD1, 0x22, 0x12, 0x04, 0x3D, 0x00,
+0x00, 0x00, 0xFF, 0xAF, 0x10, 0x80, 0x20, 0x90,
+0x96, 0xFE, 0x12, 0x04, 0x3D, 0x00, 0x00, 0x00,
+0xFF, 0x90, 0x97, 0x54, 0x12, 0x8F, 0xEC, 0xD1,
+0x2E, 0xD1, 0x22, 0x12, 0x04, 0x3D, 0x00, 0x00,
+0x00, 0xFF, 0x90, 0x97, 0x54, 0xE0, 0xFF, 0xD1,
+0x2A, 0x7F, 0x01, 0xB1, 0x2D, 0xD0, 0xD0, 0x92,
+0xAF, 0x22, 0xE4, 0xFF, 0xB1, 0x2D, 0x90, 0x96,
+0xFE, 0x22, 0xE4, 0xFC, 0xFD, 0xFE, 0x90, 0x97,
+0x02, 0x12, 0x04, 0x31, 0x7D, 0x18, 0x7C, 0x00,
+0x22, 0x12, 0x86, 0x2D, 0x02, 0x86, 0x13, 0xD3,
+0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0xE4, 0xFE,
+0xFD, 0xEF, 0xB4, 0x01, 0x0D, 0xEB, 0xB4, 0x02,
+0x03, 0x0D, 0x80, 0x06, 0xEB, 0xB4, 0x01, 0x02,
+0x7D, 0x02, 0xAF, 0x06, 0xEF, 0xC4, 0x54, 0xF0,
+0x4D, 0xFF, 0xD0, 0xD0, 0x92, 0xAF, 0x22, 0x90,
+0x01, 0xC4, 0x74, 0x67, 0xF0, 0x74, 0xE6, 0xA3,
 0xF0, 0x7F, 0x90, 0x12, 0x7B, 0x41, 0xEF, 0x20,
-0xE0, 0xF7, 0x74, 0x17, 0x04, 0x90, 0x01, 0xC4,
+0xE0, 0xF7, 0x74, 0x67, 0x04, 0x90, 0x01, 0xC4,
 0xF0, 0x74, 0xE6, 0xA3, 0xF0, 0x22, 0xD3, 0x10,
-0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0xD0, 0xD0, 0x92,
-0xAF, 0x22, 0x90, 0x88, 0xB8, 0xE0, 0x54, 0xFE,
-0xF0, 0x54, 0xE1, 0xF0, 0x90, 0x88, 0xBD, 0xE0,
-0xFF, 0x12, 0x71, 0x9A, 0x90, 0x88, 0x36, 0xE0,
-0x70, 0x16, 0x90, 0x93, 0x3B, 0xE0, 0x20, 0xE0,
-0x0F, 0x90, 0x86, 0x0C, 0x12, 0x92, 0x57, 0x90,
-0x8A, 0xF9, 0x12, 0x8B, 0xCF, 0x12, 0x8F, 0xD4,
-0x22, 0x90, 0x88, 0x9D, 0xE0, 0x30, 0xE0, 0x64,
-0x90, 0x95, 0x38, 0xE0, 0x30, 0xE0, 0x43, 0x90,
-0x95, 0x43, 0xE0, 0xFF, 0x90, 0x95, 0x42, 0xE0,
-0xC3, 0x9F, 0x40, 0x2A, 0xD1, 0xDD, 0x90, 0x06,
-0xC4, 0xEF, 0xF0, 0xD1, 0xDD, 0x78, 0x08, 0x12,
-0x03, 0xEB, 0x90, 0x06, 0xC5, 0xEF, 0xF0, 0xD1,
-0xDD, 0x78, 0x10, 0x12, 0x03, 0xEB, 0x90, 0x06,
-0xC6, 0xEF, 0xF0, 0xD1, 0xDD, 0xD1, 0xE3, 0xE4,
-0x90, 0x95, 0x42, 0xF0, 0x80, 0x1B, 0xD1, 0xEE,
-0xD1, 0xE3, 0x90, 0x95, 0x42, 0xE0, 0x04, 0xF0,
-0x80, 0x0F, 0x90, 0x95, 0x41, 0xE0, 0x60, 0x09,
-0xD1, 0xEE, 0xD1, 0xE3, 0xE4, 0x90, 0x95, 0x41,
-0xF0, 0x90, 0x8A, 0xBB, 0x12, 0x8B, 0xCF, 0xE4,
-0xFF, 0x12, 0x04, 0x7E, 0x22, 0x90, 0x95, 0x39,
-0x02, 0x04, 0xB8, 0x78, 0x18, 0x12, 0x03, 0xEB,
-0x90, 0x06, 0xC7, 0xEF, 0xF0, 0x22, 0x90, 0x95,
-0x3D, 0x12, 0x04, 0xB8, 0x90, 0x06, 0xC4, 0xEF,
-0xF0, 0x90, 0x95, 0x3D, 0x12, 0x04, 0xB8, 0x78,
-0x08, 0x12, 0x03, 0xEB, 0x90, 0x06, 0xC5, 0xEF,
-0xF0, 0x90, 0x95, 0x3D, 0x12, 0x04, 0xB8, 0x78,
-0x10, 0x12, 0x03, 0xEB, 0x90, 0x06, 0xC6, 0xEF,
-0xF0, 0x90, 0x95, 0x3D, 0x02, 0x04, 0xB8, 0x7E,
-0x00, 0x7F, 0x33, 0x7D, 0x00, 0x7B, 0x01, 0x7A,
-0x88, 0x79, 0x9D, 0x12, 0x04, 0x80, 0x90, 0x88,
-0x9E, 0x74, 0x0B, 0xF0, 0xA3, 0x74, 0x08, 0xF0,
-0x7E, 0x00, 0x7F, 0x14, 0x7D, 0x00, 0x7B, 0x01,
-0x7A, 0x95, 0x79, 0x38, 0x12, 0x04, 0x80, 0x90,
-0x86, 0xB3, 0xE0, 0xFC, 0x64, 0x02, 0x70, 0x19,
-0x90, 0xFD, 0x80, 0xE0, 0x7E, 0x00, 0x30, 0xE2,
-0x02, 0x7E, 0x01, 0xEE, 0x12, 0xA7, 0x4D, 0xFE,
-0x90, 0x88, 0xA0, 0xE0, 0x54, 0xBF, 0x4E, 0xF0,
-0x22, 0xEC, 0x64, 0x01, 0x70, 0x0D, 0x90, 0xFD,
-0x70, 0xE0, 0x7F, 0x00, 0x30, 0xE2, 0x02, 0x7F,
-0x01, 0x80, 0x13, 0x90, 0x86, 0xB3, 0xE0, 0x64,
-0x03, 0x70, 0x18, 0x90, 0xFD, 0x78, 0xE0, 0x7F,
-0x00, 0x30, 0xE2, 0x02, 0x7F, 0x01, 0xEF, 0x12,
-0xA7, 0x4D, 0xFF, 0x90, 0x88, 0xA0, 0xE0, 0x54,
-0xBF, 0x4F, 0xF0, 0x22, 0x90, 0x97, 0x43, 0xEF,
-0xF0, 0x90, 0x88, 0xB8, 0xE0, 0x44, 0x01, 0xF0,
-0x90, 0x8A, 0xF9, 0x12, 0x8B, 0xCF, 0x7D, 0x11,
-0x12, 0xB4, 0xFC, 0x12, 0x92, 0x57, 0x90, 0x07,
-0x78, 0xE0, 0x90, 0x88, 0xBD, 0xF0, 0x90, 0x97,
-0x43, 0xE0, 0xFD, 0x70, 0x02, 0x80, 0x1C, 0xED,
-0xB4, 0x01, 0x06, 0xF1, 0xE7, 0x44, 0x20, 0xF0,
-0x22, 0x90, 0x97, 0x43, 0xE0, 0xFD, 0xB4, 0x02,
-0x06, 0xF1, 0xE7, 0x44, 0x60, 0xF0, 0x22, 0xED,
-0xB4, 0x03, 0x03, 0xF1, 0xE7, 0xF0, 0x22, 0x90,
-0x88, 0xB8, 0xE0, 0x54, 0x1F, 0x22, 0xD3, 0x10,
-0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0x90, 0x95, 0x4E,
-0x74, 0x02, 0xF0, 0x90, 0x88, 0xC2, 0xE0, 0x44,
-0x10, 0xF0, 0x90, 0x88, 0xAF, 0xE0, 0x60, 0x02,
-0x21, 0x84, 0x90, 0x8A, 0xD9, 0x12, 0x8B, 0xCF,
-0xE4, 0xFF, 0x12, 0x04, 0x7E, 0x90, 0x88, 0xA1,
-0xE0, 0x30, 0xE0, 0x04, 0x7F, 0x01, 0x80, 0x37,
-0x90, 0x88, 0x9D, 0x12, 0xAF, 0x83, 0x30, 0xE0,
-0x04, 0x7F, 0x0D, 0x80, 0x2A, 0x90, 0x88, 0xA0,
-0xE0, 0xFF, 0xC4, 0x54, 0x0F, 0x30, 0xE0, 0x10,
-0xEF, 0x13, 0x13, 0x54, 0x3F, 0x30, 0xE0, 0x04,
-0x7F, 0x09, 0x80, 0x13, 0x7F, 0x03, 0x80, 0x0F,
-0x90, 0x88, 0xA0, 0xE0, 0xC3, 0x13, 0x30, 0xE0,
-0x04, 0x7F, 0x03, 0x80, 0x02, 0x7F, 0x09, 0x12,
-0x71, 0x9A, 0x90, 0x88, 0xAF, 0x74, 0x01, 0x31,
-0x98, 0x30, 0xE0, 0x05, 0x12, 0xAC, 0x30, 0x80,
-0x3F, 0x31, 0x90, 0x30, 0xE0, 0x3A, 0x90, 0x88,
-0xA3, 0xE0, 0x44, 0x20, 0xF0, 0x90, 0x88, 0x9C,
-0xE0, 0x60, 0x0C, 0x90, 0x8A, 0xB9, 0x12, 0x8B,
-0xCF, 0x7D, 0x01, 0x7F, 0x04, 0x80, 0x13, 0x12,
-0xAC, 0x30, 0x12, 0x96, 0x91, 0x90, 0x8A, 0xB9,
-0x20, 0xE0, 0x0C, 0x12, 0x8B, 0xCF, 0x7D, 0x01,
-0x7F, 0x0C, 0x12, 0x04, 0x7E, 0x80, 0x09, 0x12,
-0x8B, 0xCF, 0x12, 0x8F, 0xF6, 0x12, 0xDD, 0x84,
-0x90, 0x88, 0x9C, 0xE0, 0x60, 0x06, 0x7B, 0x04,
-0x7D, 0x6F, 0x80, 0x03, 0xE4, 0xFB, 0xFD, 0x7F,
-0xFF, 0x12, 0xAC, 0x35, 0x90, 0x88, 0xA0, 0x12,
-0x96, 0x94, 0x30, 0xE0, 0x0B, 0x90, 0x8A, 0x97,
-0x12, 0x8B, 0xCF, 0x7F, 0x01, 0x12, 0x04, 0x7E,
-0x90, 0x88, 0xA1, 0xE0, 0xC3, 0x13, 0x30, 0xE0,
-0x0E, 0x90, 0x06, 0xCD, 0xE0, 0x44, 0x10, 0xF0,
-0x90, 0x06, 0xCF, 0xE0, 0x44, 0x10, 0xF0, 0x90,
-0x05, 0x63, 0xE0, 0x90, 0x95, 0x52, 0xF0, 0x90,
-0x05, 0x62, 0xE0, 0x90, 0x95, 0x51, 0xF0, 0x90,
-0x05, 0x61, 0xE0, 0x90, 0x95, 0x50, 0xF0, 0x90,
-0x05, 0x60, 0xE0, 0x90, 0x95, 0x4F, 0x12, 0xC3,
-0x51, 0x90, 0x95, 0x4F, 0x12, 0x8F, 0xA1, 0x12,
-0x86, 0x20, 0xC0, 0x04, 0xC0, 0x05, 0xC0, 0x06,
-0xC0, 0x07, 0x12, 0x8F, 0x9E, 0x78, 0x10, 0x12,
-0x03, 0xFE, 0xD0, 0x03, 0xD0, 0x02, 0xD0, 0x01,
-0xD0, 0x00, 0x12, 0x86, 0x20, 0xC0, 0x04, 0xC0,
-0x05, 0xC0, 0x06, 0xC0, 0x07, 0xA3, 0x12, 0x8F,
-0xA1, 0x78, 0x18, 0x12, 0x03, 0xFE, 0xD0, 0x03,
-0xD0, 0x02, 0xD0, 0x01, 0xD0, 0x00, 0x12, 0x86,
-0x20, 0xA3, 0x12, 0x04, 0x31, 0x90, 0x88, 0xA1,
-0x12, 0xB7, 0xB7, 0x30, 0xE0, 0x2E, 0x90, 0x95,
-0x46, 0x12, 0x04, 0xB8, 0x90, 0x95, 0x53, 0x31,
-0x89, 0x40, 0x21, 0x90, 0x95, 0x46, 0x12, 0x86,
-0x2D, 0x90, 0x95, 0x53, 0x12, 0x04, 0xB8, 0x12,
-0x85, 0xB6, 0xE4, 0xFB, 0x7A, 0x78, 0xF9, 0xF8,
-0xC3, 0x12, 0x03, 0xDA, 0x50, 0x06, 0x90, 0x95,
-0x4B, 0xE0, 0x04, 0xF0, 0xD0, 0xD0, 0x92, 0xAF,
-0x22, 0x12, 0x86, 0x2D, 0xD3, 0x02, 0x03, 0xDA,
-0x90, 0x88, 0x9D, 0xE0, 0xC4, 0x54, 0x0F, 0x22,
-0xF0, 0x90, 0x88, 0x9D, 0xE0, 0xC4, 0x13, 0x54,
-0x07, 0x22, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0,
-0xD0, 0x90, 0x88, 0x9D, 0xE0, 0x30, 0xE0, 0x10,
-0x90, 0x88, 0xA3, 0xE0, 0xC4, 0x13, 0x54, 0x07,
-0x30, 0xE0, 0x12, 0x75, 0x11, 0x10, 0x80, 0x2E,
-0x12, 0x7A, 0x65, 0xEF, 0x64, 0x01, 0x60, 0x05,
-0x75, 0x11, 0x01, 0x80, 0x21, 0x90, 0x88, 0x31,
-0x12, 0xA5, 0x89, 0x30, 0xE0, 0x05, 0x75, 0x11,
-0x02, 0x80, 0x13, 0x90, 0x88, 0x38, 0xE0, 0xD3,
-0x94, 0x04, 0x40, 0x05, 0x75, 0x11, 0x08, 0x80,
-0x05, 0x12, 0xD7, 0x6B, 0x80, 0x0E, 0x90, 0x01,
-0xB9, 0x74, 0x02, 0xF0, 0x90, 0x01, 0xB8, 0xE5,
-0x11, 0xF0, 0x7F, 0x00, 0xD0, 0xD0, 0x92, 0xAF,
-0x22, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0,
-0x90, 0x88, 0x9D, 0xE0, 0x30, 0xE0, 0x1E, 0x90,
-0x88, 0xAF, 0xE0, 0x60, 0x05, 0x75, 0x12, 0x40,
-0x41, 0xAB, 0x90, 0x88, 0x38, 0xE0, 0xD3, 0x94,
-0x00, 0x40, 0x02, 0x80, 0x2D, 0x90, 0x88, 0x9C,
-0xE0, 0x60, 0x7B, 0x80, 0x55, 0x12, 0x7A, 0x65,
-0xEF, 0x64, 0x01, 0x60, 0x05, 0x75, 0x12, 0x01,
-0x80, 0x71, 0x90, 0x88, 0x3A, 0xE0, 0xFF, 0x54,
-0x03, 0x60, 0x05, 0x75, 0x12, 0x02, 0x80, 0x63,
-0x90, 0x88, 0x38, 0xE0, 0xFE, 0xE4, 0xC3, 0x9E,
-0x50, 0x05, 0x75, 0x12, 0x04, 0x80, 0x54, 0xEF,
-0x30, 0xE2, 0x05, 0x75, 0x12, 0x08, 0x80, 0x4B,
-0x90, 0x88, 0x3A, 0xE0, 0x30, 0xE4, 0x05, 0x75,
-0x12, 0x10, 0x80, 0x3F, 0x90, 0x88, 0x32, 0xE0,
-0x13, 0x13, 0x54, 0x3F, 0x20, 0xE0, 0x05, 0x75,
-0x12, 0x20, 0x80, 0x2F, 0x90, 0x88, 0x9C, 0xE0,
-0x60, 0x05, 0x75, 0x12, 0x80, 0x80, 0x24, 0x90,
-0x06, 0x62, 0xE0, 0x30, 0xE1, 0x05, 0x75, 0x12,
-0x11, 0x80, 0x18, 0x90, 0x06, 0x62, 0xE0, 0x30,
-0xE0, 0x0C, 0xE0, 0x54, 0xFC, 0xFF, 0xBF, 0x80,
-0x05, 0x75, 0x12, 0x12, 0x80, 0x05, 0x12, 0xD7,
-0x6B, 0x80, 0x0E, 0x90, 0x01, 0xB9, 0x74, 0x04,
-0xF0, 0x90, 0x01, 0xB8, 0xE5, 0x12, 0xF0, 0x7F,
-0x00, 0xD0, 0xD0, 0x92, 0xAF, 0x22, 0x12, 0xB7,
-0xD6, 0x40, 0x41, 0x90, 0x88, 0x50, 0xE0, 0x04,
-0xF0, 0x90, 0x88, 0x92, 0xE0, 0xFF, 0x90, 0x88,
-0x50, 0xE0, 0xD3, 0x9F, 0x50, 0x2E, 0x90, 0x88,
-0x48, 0xE0, 0x24, 0x08, 0xF0, 0x90, 0x88, 0x3F,
-0x12, 0xA6, 0x00, 0x33, 0x33, 0x33, 0x54, 0xF8,
-0xFF, 0x90, 0x88, 0x3E, 0xE0, 0x2F, 0x90, 0x88,
-0x4F, 0xF0, 0xFB, 0x90, 0x88, 0x48, 0xE0, 0xFF,
-0xA3, 0xE0, 0xFD, 0x90, 0x92, 0x98, 0x74, 0x03,
-0xF0, 0x12, 0x6E, 0x2F, 0x22, 0xE4, 0xFE, 0x12,
-0x8B, 0xB2, 0xE4, 0xF0, 0x74, 0x95, 0x2E, 0x12,
-0x8B, 0xAA, 0x74, 0xFF, 0xF0, 0x0E, 0xEE, 0xB4,
-0xA0, 0xED, 0xE4, 0x90, 0x88, 0x4D, 0xF0, 0x90,
-0x88, 0x4C, 0xF0, 0x90, 0x88, 0x50, 0xF0, 0xEF,
-0xB4, 0x01, 0x07, 0xA3, 0x74, 0xA0, 0xF0, 0xE4,
-0xA3, 0xF0, 0x22, 0xE0, 0xFE, 0xA3, 0xE0, 0xFF,
+0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0x12, 0xCA, 0xF3,
+0x90, 0x97, 0x6F, 0xF0, 0xED, 0x90, 0x00, 0x73,
+0x70, 0x0D, 0xE0, 0x44, 0x04, 0xF0, 0x90, 0x00,
+0x67, 0xE0, 0x44, 0x80, 0xF0, 0x80, 0x0B, 0xE0,
+0x54, 0xFB, 0xF0, 0x90, 0x00, 0x67, 0xE0, 0x54,
+0x7F, 0xF0, 0xD0, 0xD0, 0x92, 0xAF, 0x22, 0xD3,
+0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0xD0, 0xD0,
+0x92, 0xAF, 0x22, 0x90, 0x88, 0xB8, 0xE0, 0x54,
+0xFE, 0xF0, 0x54, 0xE1, 0xF0, 0x90, 0x88, 0xBD,
+0xE0, 0xFF, 0x12, 0x71, 0x9A, 0x90, 0x88, 0x36,
+0xE0, 0x70, 0x16, 0x90, 0x93, 0x3B, 0xE0, 0x20,
+0xE0, 0x0F, 0x90, 0x86, 0x0C, 0x12, 0x8A, 0x66,
+0x90, 0x8A, 0xF9, 0x12, 0x90, 0x4B, 0x12, 0x97,
+0x87, 0x22, 0x90, 0x88, 0x9D, 0xE0, 0x30, 0xE0,
+0x64, 0x90, 0x95, 0x38, 0xE0, 0x30, 0xE0, 0x43,
+0x90, 0x95, 0x43, 0xE0, 0xFF, 0x90, 0x95, 0x42,
+0xE0, 0xC3, 0x9F, 0x40, 0x2A, 0xF1, 0x5E, 0x90,
+0x06, 0xC4, 0xEF, 0xF0, 0xF1, 0x5E, 0x78, 0x08,
+0x12, 0x03, 0xEB, 0x90, 0x06, 0xC5, 0xEF, 0xF0,
+0xF1, 0x5E, 0x78, 0x10, 0x12, 0x03, 0xEB, 0x90,
+0x06, 0xC6, 0xEF, 0xF0, 0xF1, 0x5E, 0xF1, 0x64,
+0xE4, 0x90, 0x95, 0x42, 0xF0, 0x80, 0x1B, 0xF1,
+0x6F, 0xF1, 0x64, 0x90, 0x95, 0x42, 0xE0, 0x04,
+0xF0, 0x80, 0x0F, 0x90, 0x95, 0x41, 0xE0, 0x60,
+0x09, 0xF1, 0x6F, 0xF1, 0x64, 0xE4, 0x90, 0x95,
+0x41, 0xF0, 0x90, 0x8A, 0xBB, 0x12, 0x90, 0x4B,
+0xE4, 0xFF, 0x12, 0x04, 0x7E, 0x22, 0x90, 0x95,
+0x39, 0x02, 0x04, 0xB8, 0x78, 0x18, 0x12, 0x03,
+0xEB, 0x90, 0x06, 0xC7, 0xEF, 0xF0, 0x22, 0x90,
+0x95, 0x3D, 0x12, 0x04, 0xB8, 0x90, 0x06, 0xC4,
+0xEF, 0xF0, 0x90, 0x95, 0x3D, 0x12, 0x04, 0xB8,
+0x78, 0x08, 0x12, 0x03, 0xEB, 0x90, 0x06, 0xC5,
+0xEF, 0xF0, 0x90, 0x95, 0x3D, 0x12, 0x04, 0xB8,
+0x78, 0x10, 0x12, 0x03, 0xEB, 0x90, 0x06, 0xC6,
+0xEF, 0xF0, 0x90, 0x95, 0x3D, 0x02, 0x04, 0xB8,
+0x7E, 0x00, 0x7F, 0x33, 0x7D, 0x00, 0x7B, 0x01,
+0x7A, 0x88, 0x79, 0x9D, 0x12, 0x04, 0x80, 0x90,
+0x88, 0x9E, 0x74, 0x0B, 0xF0, 0xA3, 0x74, 0x08,
+0x12, 0xEB, 0x58, 0x7A, 0x95, 0x79, 0x38, 0x12,
+0x04, 0x80, 0x90, 0x86, 0xB3, 0xE0, 0xFC, 0x64,
+0x02, 0x70, 0x19, 0x90, 0xFD, 0x80, 0xE0, 0x7E,
+0x00, 0x30, 0xE2, 0x02, 0x7E, 0x01, 0xEE, 0x12,
+0xBF, 0x64, 0xFE, 0x90, 0x88, 0xA0, 0xE0, 0x54,
+0xBF, 0x4E, 0xF0, 0x22, 0xEC, 0x64, 0x01, 0x70,
+0x0D, 0x90, 0xFD, 0x70, 0xE0, 0x7F, 0x00, 0x30,
+0xE2, 0x02, 0x7F, 0x01, 0x80, 0x13, 0x90, 0x86,
+0xB3, 0xE0, 0x64, 0x03, 0x70, 0x18, 0x90, 0xFD,
+0x78, 0xE0, 0x7F, 0x00, 0x30, 0xE2, 0x02, 0x7F,
+0x01, 0xEF, 0x12, 0xBF, 0x64, 0xFF, 0x90, 0x88,
+0xA0, 0xE0, 0x54, 0xBF, 0x4F, 0xF0, 0x22, 0x90,
+0x97, 0x70, 0xEF, 0xF0, 0x90, 0x88, 0xB8, 0xE0,
+0x44, 0x01, 0xF0, 0x90, 0x8A, 0xF9, 0x12, 0x90,
+0x4B, 0x7D, 0x11, 0x11, 0x68, 0x12, 0x8A, 0x66,
+0x90, 0x07, 0x78, 0xE0, 0x90, 0x88, 0xBD, 0xF0,
+0x90, 0x97, 0x70, 0xE0, 0xFD, 0x70, 0x02, 0x80,
+0x1C, 0xED, 0xB4, 0x01, 0x06, 0x11, 0x61, 0x44,
+0x20, 0xF0, 0x22, 0x90, 0x97, 0x70, 0xE0, 0xFD,
+0xB4, 0x02, 0x06, 0x11, 0x61, 0x44, 0x60, 0xF0,
+0x22, 0xED, 0xB4, 0x03, 0x03, 0x11, 0x61, 0xF0,
+0x22, 0x90, 0x88, 0xB8, 0xE0, 0x54, 0x1F, 0x22,
+0x7F, 0xFF, 0x12, 0x04, 0x7E, 0x90, 0x8A, 0xEF,
+0x22, 0x90, 0x8A, 0xF9, 0x12, 0x90, 0x4B, 0x7D,
+0x20, 0x11, 0x68, 0x12, 0x8A, 0x66, 0x90, 0x88,
+0x2F, 0x74, 0x02, 0xF0, 0x22, 0xD3, 0x10, 0xAF,
+0x01, 0xC3, 0xC0, 0xD0, 0x90, 0x88, 0x2F, 0xE0,
+0x90, 0x97, 0x72, 0xF0, 0x6F, 0x70, 0x02, 0x21,
+0x8F, 0xEF, 0x14, 0x60, 0x42, 0x14, 0x60, 0x70,
+0x14, 0x70, 0x02, 0x21, 0x3B, 0x14, 0x70, 0x02,
+0x21, 0x66, 0x24, 0x04, 0x60, 0x02, 0x21, 0x8F,
+0x90, 0x97, 0x72, 0xE0, 0xB4, 0x04, 0x04, 0x31,
+0xD1, 0x21, 0x8F, 0x90, 0x97, 0x72, 0xE0, 0xB4,
+0x02, 0x04, 0x31, 0xE1, 0x21, 0x8F, 0x90, 0x97,
+0x72, 0xE0, 0xB4, 0x03, 0x04, 0x31, 0xE6, 0x21,
+0x8F, 0x90, 0x97, 0x72, 0xE0, 0x64, 0x01, 0x60,
+0x02, 0x21, 0x8F, 0x31, 0xD4, 0x21, 0x8F, 0x90,
+0x97, 0x72, 0xE0, 0xB4, 0x04, 0x05, 0x12, 0x97,
+0xA4, 0x21, 0x8F, 0x90, 0x97, 0x72, 0xE0, 0xB4,
+0x02, 0x05, 0x12, 0x97, 0xBE, 0x21, 0x8F, 0x90,
+0x97, 0x72, 0xE0, 0xB4, 0x03, 0x05, 0x12, 0x97,
+0x96, 0x21, 0x8F, 0x90, 0x97, 0x72, 0xE0, 0x60,
+0x02, 0x21, 0x8F, 0x12, 0x97, 0xF2, 0x80, 0x7F,
+0x90, 0x97, 0x72, 0xE0, 0xB4, 0x04, 0x04, 0x31,
+0x94, 0x80, 0x74, 0x90, 0x97, 0x72, 0xE0, 0xB4,
+0x01, 0x04, 0x11, 0x71, 0x80, 0x69, 0x90, 0x97,
+0x72, 0xE0, 0xB4, 0x03, 0x04, 0x31, 0xF3, 0x80,
+0x5E, 0x90, 0x97, 0x72, 0xE0, 0x70, 0x58, 0x31,
+0xB5, 0x80, 0x54, 0x90, 0x97, 0x72, 0xE0, 0xB4,
+0x04, 0x04, 0x51, 0x19, 0x80, 0x49, 0x90, 0x97,
+0x72, 0xE0, 0xB4, 0x01, 0x04, 0x31, 0xBD, 0x80,
+0x3E, 0x90, 0x97, 0x72, 0xE0, 0xB4, 0x02, 0x04,
+0x31, 0xEB, 0x80, 0x33, 0x90, 0x97, 0x72, 0xE0,
+0x70, 0x2D, 0x31, 0xBA, 0x80, 0x29, 0x90, 0x97,
+0x72, 0xE0, 0xB4, 0x03, 0x04, 0x31, 0xFB, 0x80,
+0x1E, 0x90, 0x97, 0x72, 0xE0, 0xB4, 0x01, 0x04,
+0x31, 0xA9, 0x80, 0x13, 0x90, 0x97, 0x72, 0xE0,
+0xB4, 0x02, 0x04, 0x51, 0x2B, 0x80, 0x08, 0x90,
+0x97, 0x72, 0xE0, 0x70, 0x02, 0x31, 0xA6, 0xD0,
+0xD0, 0x92, 0xAF, 0x22, 0x12, 0x97, 0xE2, 0x90,
+0x8A, 0xF9, 0x12, 0x90, 0x4B, 0x7D, 0x23, 0x11,
+0x68, 0x12, 0x8A, 0x66, 0x01, 0x7E, 0x12, 0x97,
+0xF2, 0x90, 0x8A, 0xF9, 0x12, 0x90, 0x4B, 0x7D,
+0x1F, 0x51, 0x07, 0xF0, 0x22, 0x12, 0x97, 0xF2,
+0x01, 0x71, 0x12, 0x97, 0xF2, 0x90, 0x8A, 0xF9,
+0x12, 0x90, 0x4B, 0x7D, 0x21, 0x7F, 0xFF, 0x12,
+0x04, 0x7E, 0x90, 0x88, 0x2F, 0x74, 0x03, 0xF0,
+0x22, 0x12, 0x97, 0xA4, 0x90, 0x05, 0x27, 0xE0,
+0x54, 0xBF, 0xF0, 0xE4, 0x90, 0x88, 0x2F, 0xF0,
+0x22, 0x12, 0x97, 0xBE, 0x80, 0xEE, 0x12, 0x97,
+0x96, 0x80, 0xE9, 0x90, 0x86, 0x0C, 0x12, 0x8A,
+0x66, 0x80, 0xD7, 0x90, 0x8A, 0xEF, 0x12, 0x8A,
+0x66, 0x01, 0x7E, 0x90, 0x8A, 0xF9, 0x12, 0x90,
+0x4B, 0x7D, 0x25, 0x51, 0x07, 0xF0, 0x22, 0x7F,
+0x6F, 0x12, 0x04, 0x7E, 0x90, 0x05, 0x27, 0xE0,
+0x54, 0xBF, 0xF0, 0x90, 0x88, 0x2F, 0x74, 0x04,
+0x22, 0x90, 0x8A, 0xF9, 0x12, 0x90, 0x4B, 0x7D,
+0x22, 0x7F, 0xFF, 0x12, 0x04, 0x7E, 0x12, 0x97,
+0xE2, 0x80, 0x9F, 0x90, 0x86, 0x0C, 0x12, 0x8A,
+0x66, 0x90, 0x8A, 0xF9, 0x12, 0x90, 0x4B, 0x7D,
+0x24, 0x51, 0x07, 0xF0, 0x22, 0x90, 0x88, 0x2F,
+0xE0, 0x64, 0x02, 0x7F, 0x01, 0x60, 0x02, 0x7F,
+0x00, 0x22, 0x12, 0x7A, 0x65, 0xEF, 0x70, 0x03,
+0x12, 0xB6, 0xB4, 0x22, 0x90, 0x88, 0x36, 0xE0,
+0x64, 0x02, 0x60, 0x14, 0x12, 0xB0, 0x94, 0x60,
+0x0F, 0x12, 0x7A, 0x65, 0xEF, 0x70, 0x09, 0x90,
+0x8A, 0xB9, 0x12, 0x90, 0x4B, 0x12, 0x97, 0xCD,
+0x22, 0x7E, 0x00, 0x7F, 0x62, 0x7D, 0x00, 0x7B,
+0x01, 0x7A, 0x88, 0x79, 0x31, 0x12, 0x04, 0x80,
+0x71, 0x62, 0x12, 0x04, 0x80, 0xE4, 0x90, 0x95,
+0x37, 0xF0, 0x90, 0x88, 0x35, 0x74, 0x02, 0xF0,
+0x90, 0x88, 0x3C, 0x14, 0xF0, 0xA3, 0xF0, 0xA3,
+0x74, 0x50, 0xF0, 0x90, 0x88, 0x42, 0xE4, 0xF0,
+0xA3, 0x74, 0x02, 0xF0, 0x90, 0x88, 0x4E, 0x74,
+0x10, 0xF0, 0xA3, 0x74, 0x50, 0xF0, 0x71, 0x6F,
+0x90, 0x8A, 0x89, 0x12, 0x90, 0x4B, 0x12, 0x97,
+0x87, 0x90, 0x8A, 0x89, 0x12, 0x90, 0x4B, 0x7D,
+0x0C, 0x7F, 0x02, 0x12, 0x04, 0x7E, 0x90, 0x8A,
+0x89, 0x12, 0x90, 0x4B, 0x7D, 0x0C, 0x7F, 0x01,
+0x12, 0x04, 0x7E, 0x90, 0x86, 0xB3, 0xE0, 0xFF,
+0xB4, 0x01, 0x08, 0x90, 0x88, 0x41, 0x74, 0xDD,
+0xF0, 0x80, 0x11, 0xEF, 0xB4, 0x03, 0x08, 0x90,
+0x88, 0x41, 0x74, 0x14, 0xF0, 0x80, 0x05, 0xE4,
+0x90, 0x88, 0x41, 0xF0, 0x90, 0x00, 0x79, 0xE0,
+0x54, 0x03, 0xFF, 0xBF, 0x02, 0x0D, 0x90, 0x00,
+0x28, 0xE0, 0x30, 0xE2, 0x06, 0x90, 0x88, 0x53,
+0x74, 0x02, 0xF0, 0x90, 0x88, 0x93, 0x74, 0x02,
+0xF0, 0xA3, 0x74, 0x0F, 0xF0, 0xA3, 0xE0, 0x54,
+0x01, 0x44, 0x28, 0xF0, 0xA3, 0x74, 0x07, 0x71,
+0x58, 0x7A, 0x93, 0x79, 0x3F, 0x12, 0x04, 0x80,
+0x90, 0x8A, 0xA3, 0x12, 0x90, 0x4B, 0x7F, 0x01,
+0x12, 0x04, 0x7E, 0x12, 0xA7, 0x57, 0x7E, 0x00,
+0xFF, 0x7D, 0x00, 0x7B, 0x01, 0x7A, 0x88, 0x79,
+0x9A, 0x12, 0x04, 0x80, 0x12, 0xC7, 0xD3, 0x90,
+0x06, 0x0A, 0xE0, 0x54, 0xF8, 0xF0, 0x90, 0x05,
+0x22, 0xE4, 0xF0, 0x90, 0x88, 0x9C, 0xF0, 0x22,
+0xF0, 0x7E, 0x00, 0x7F, 0x18, 0x7D, 0x00, 0x7B,
+0x01, 0x22, 0x7E, 0x00, 0x7F, 0x04, 0x7D, 0x00,
+0x7B, 0x01, 0x7A, 0x93, 0x79, 0x3B, 0x22, 0x90,
+0x88, 0x8D, 0x74, 0x18, 0xF0, 0xA3, 0xF0, 0xA3,
+0xE4, 0xF0, 0xA3, 0x74, 0x64, 0xF0, 0xA3, 0x74,
+0x05, 0xF0, 0xA3, 0xF0, 0x22, 0xD3, 0x10, 0xAF,
+0x01, 0xC3, 0xC0, 0xD0, 0x90, 0x88, 0x9D, 0xE0,
+0x30, 0xE0, 0x10, 0x90, 0x88, 0xA3, 0xE0, 0xC4,
+0x13, 0x54, 0x07, 0x30, 0xE0, 0x20, 0x75, 0x11,
+0x10, 0x80, 0x2D, 0x12, 0x7A, 0x65, 0xEF, 0x64,
+0x01, 0x60, 0x05, 0x75, 0x11, 0x01, 0x80, 0x20,
+0x90, 0x88, 0x31, 0x12, 0x9D, 0xD9, 0x30, 0xE0,
+0x05, 0x75, 0x11, 0x02, 0x80, 0x12, 0x90, 0x88,
+0x38, 0xE0, 0xD3, 0x94, 0x04, 0x40, 0x05, 0x75,
+0x11, 0x08, 0x80, 0x04, 0x71, 0xE3, 0x80, 0x0E,
+0x90, 0x01, 0xB9, 0x74, 0x02, 0xF0, 0x90, 0x01,
+0xB8, 0xE5, 0x11, 0xF0, 0x7F, 0x00, 0xD0, 0xD0,
+0x92, 0xAF, 0x22, 0x90, 0x01, 0xB8, 0xE4, 0xF0,
+0x7F, 0x01, 0x22, 0x90, 0x93, 0x3B, 0xE0, 0xC3,
+0x13, 0x20, 0xE0, 0x35, 0x90, 0x02, 0x87, 0xE0,
+0x60, 0x02, 0x80, 0x08, 0x90, 0x01, 0x00, 0xE0,
+0x64, 0x3F, 0x60, 0x05, 0x75, 0x66, 0x01, 0x80,
+0x2E, 0x90, 0x02, 0x96, 0xE0, 0x60, 0x05, 0x75,
+0x66, 0x10, 0x80, 0x23, 0x90, 0x02, 0x86, 0xE0,
+0x20, 0xE1, 0x02, 0x80, 0x07, 0x90, 0x02, 0x86,
+0xE0, 0x30, 0xE3, 0x05, 0x75, 0x66, 0x04, 0x80,
+0x0E, 0x90, 0x88, 0xE6, 0xE0, 0x30, 0xE0, 0x05,
+0x75, 0x66, 0x20, 0x80, 0x02, 0x80, 0xAC, 0x90,
+0x01, 0xB9, 0x74, 0x08, 0xF0, 0x90, 0x01, 0xB8,
+0xE5, 0x66, 0xF0, 0x7F, 0x00, 0x22, 0xD3, 0x10,
+0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0x90, 0x88, 0x9D,
+0xE0, 0x30, 0xE0, 0x1E, 0x90, 0x88, 0xAF, 0xE0,
+0x60, 0x05, 0x75, 0x12, 0x40, 0x81, 0xEF, 0x90,
+0x88, 0x38, 0xE0, 0xD3, 0x94, 0x00, 0x40, 0x02,
+0x80, 0x2D, 0x90, 0x88, 0x9C, 0xE0, 0x60, 0x7B,
+0x80, 0x55, 0x12, 0x7A, 0x65, 0xEF, 0x64, 0x01,
+0x60, 0x05, 0x75, 0x12, 0x01, 0x80, 0x70, 0x90,
+0x88, 0x3A, 0xE0, 0xFF, 0x54, 0x03, 0x60, 0x05,
+0x75, 0x12, 0x02, 0x80, 0x62, 0x90, 0x88, 0x38,
+0xE0, 0xFE, 0xE4, 0xC3, 0x9E, 0x50, 0x05, 0x75,
+0x12, 0x04, 0x80, 0x53, 0xEF, 0x30, 0xE2, 0x05,
+0x75, 0x12, 0x08, 0x80, 0x4A, 0x90, 0x88, 0x3A,
+0xE0, 0x30, 0xE4, 0x05, 0x75, 0x12, 0x10, 0x80,
+0x3E, 0x90, 0x88, 0x32, 0xE0, 0x13, 0x13, 0x54,
+0x3F, 0x20, 0xE0, 0x05, 0x75, 0x12, 0x20, 0x80,
+0x2E, 0x90, 0x88, 0x9C, 0xE0, 0x60, 0x05, 0x75,
+0x12, 0x80, 0x80, 0x23, 0x90, 0x06, 0x62, 0xE0,
+0x30, 0xE1, 0x05, 0x75, 0x12, 0x11, 0x80, 0x17,
+0x90, 0x06, 0x62, 0xE0, 0x30, 0xE0, 0x0C, 0xE0,
+0x54, 0xFC, 0xFF, 0xBF, 0x80, 0x05, 0x75, 0x12,
+0x12, 0x80, 0x04, 0x71, 0xE3, 0x80, 0x0E, 0x90,
+0x01, 0xB9, 0x74, 0x04, 0xF0, 0x90, 0x01, 0xB8,
+0xE5, 0x12, 0xF0, 0x7F, 0x00, 0xD0, 0xD0, 0x92,
+0xAF, 0x22, 0x12, 0xB6, 0x31, 0x40, 0x41, 0x90,
+0x88, 0x50, 0xE0, 0x04, 0xF0, 0x90, 0x88, 0x92,
+0xE0, 0xFF, 0x90, 0x88, 0x50, 0xE0, 0xD3, 0x9F,
+0x50, 0x2E, 0x90, 0x88, 0x48, 0xE0, 0x24, 0x08,
+0xF0, 0x90, 0x88, 0x3F, 0x12, 0x9D, 0xE2, 0x33,
+0x33, 0x33, 0x54, 0xF8, 0xFF, 0x90, 0x88, 0x3E,
+0xE0, 0x2F, 0x90, 0x88, 0x4F, 0xF0, 0xFB, 0x90,
+0x88, 0x48, 0xE0, 0xFF, 0xA3, 0xE0, 0xFD, 0x90,
+0x92, 0x98, 0x74, 0x03, 0xF0, 0x12, 0x6E, 0x2F,
+0x22, 0x90, 0x97, 0x33, 0xA3, 0xE0, 0xFF, 0x90,
+0x92, 0x13, 0x74, 0x03, 0xF0, 0x7B, 0x06, 0x7D,
+0x01, 0x12, 0x66, 0xDB, 0x90, 0x97, 0x37, 0xEE,
+0xF0, 0xFC, 0xA3, 0xEF, 0xF0, 0xFD, 0x90, 0x97,
+0x36, 0xE0, 0xFF, 0x74, 0x10, 0x2D, 0xF5, 0x82,
+0xE4, 0x34, 0xFC, 0xF5, 0x83, 0xEF, 0xF0, 0x90,
+0x97, 0x35, 0x22, 0xE0, 0xFE, 0xA3, 0xE0, 0xFF,
 0xC3, 0x74, 0xFF, 0x9F, 0xFF, 0x74, 0xFF, 0x9E,
 0xFE, 0xE5, 0x67, 0x22, 0xF5, 0x83, 0xE0, 0xFC,
 0xA3, 0xE0, 0xFD, 0xD3, 0x9F, 0xEC, 0x9E, 0x22,
-0x90, 0x88, 0x91, 0xE0, 0xFD, 0xC3, 0x90, 0x88,
-0x90, 0xE0, 0x9D, 0xFD, 0x90, 0x88, 0x8F, 0xE0,
-0x94, 0x00, 0xFC, 0xEF, 0xD3, 0x9D, 0xE4, 0x9C,
-0x22, 0xE5, 0x69, 0x25, 0xE0, 0x24, 0x75, 0xF5,
-0x82, 0xE4, 0x34, 0x81, 0xF5, 0x83, 0x22, 0xE0,
-0xFE, 0xA3, 0xE0, 0xFF, 0xED, 0x2F, 0xFF, 0xEC,
-0x3E, 0xFE, 0x22, 0xFB, 0xFD, 0x7F, 0x58, 0x7E,
-0x01, 0x02, 0x66, 0x33, 0x35, 0xF0, 0xFE, 0x90,
-0x00, 0x06, 0x02, 0x03, 0x3E, 0xE0, 0x54, 0x03,
-0x90, 0x92, 0x80, 0xF0, 0x7B, 0x01, 0xAF, 0x0E,
-0x02, 0x75, 0x80, 0x75, 0xF0, 0x02, 0xA4, 0xF5,
-0x82, 0x85, 0xF0, 0x83, 0x02, 0x03, 0x3E, 0x90,
-0x00, 0x08, 0x02, 0x03, 0x3E, 0x90, 0x95, 0xEC,
-0x12, 0x04, 0xB8, 0x78, 0x07, 0x02, 0x03, 0xEB,
-0x90, 0x93, 0xD7, 0xE0, 0xFF, 0x90, 0x93, 0xDA,
-0xE0, 0xD3, 0x9F, 0x22, 0xE5, 0x67, 0x25, 0xE0,
-0x24, 0x86, 0xF5, 0x82, 0xE4, 0x34, 0x8E, 0x22,
-0x74, 0xB6, 0x25, 0x67, 0xF5, 0x82, 0xE4, 0x34,
-0x8D, 0xF5, 0x83, 0x22, 0xFF, 0xE4, 0x3E, 0xFE,
-0xE4, 0x3D, 0xFD, 0xE4, 0x3C, 0xFC, 0x22, 0x25,
+0xE0, 0xFE, 0xA3, 0xE0, 0xFF, 0xED, 0x2F, 0xFF,
+0xEC, 0x3E, 0xFE, 0x22, 0x90, 0x01, 0x34, 0x74,
+0x40, 0xF0, 0xFD, 0xE4, 0xFF, 0x12, 0x7C, 0x74,
+0x43, 0x64, 0x08, 0x22, 0xE0, 0x90, 0x01, 0xBA,
+0xF0, 0x90, 0x88, 0x38, 0xE0, 0x90, 0x01, 0xBB,
+0x22, 0xE5, 0x67, 0x25, 0xE0, 0x24, 0x86, 0xF5,
+0x82, 0xE4, 0x34, 0x8E, 0x22, 0x74, 0xB6, 0x25,
+0x67, 0xF5, 0x82, 0xE4, 0x34, 0x8D, 0xF5, 0x83,
+0x22, 0xFF, 0xE4, 0x3E, 0xFE, 0xE4, 0x3D, 0xFD,
+0xE4, 0x3C, 0xFC, 0x22, 0x90, 0x93, 0xF4, 0xE0,
+0xFF, 0x90, 0x93, 0xF3, 0xE0, 0x4F, 0x22, 0x25,
 0xE0, 0x24, 0x06, 0xF5, 0x82, 0xE4, 0x34, 0x8E,
 0x22, 0x25, 0xE0, 0x24, 0x26, 0xF5, 0x82, 0xE4,
 0x34, 0x8E, 0x22, 0x25, 0xE0, 0x24, 0x56, 0xF5,
-0x82, 0xE4, 0x34, 0x8E, 0x22, 0x12, 0x04, 0x31,
-0x90, 0x88, 0x89, 0x02, 0x04, 0xB8, 0x90, 0x00,
-0x02, 0x02, 0x03, 0x3E, 0x90, 0x00, 0x04, 0x02,
-0x03, 0x3E, 0x90, 0x88, 0xA1, 0xE0, 0xC4, 0x13,
-0x54, 0x07, 0x22, 0x54, 0x01, 0xC4, 0x33, 0x33,
-0x33, 0x54, 0x80, 0x22, 0x7D, 0x02, 0x7F, 0x02,
-0x02, 0x7C, 0x7E, 0x7D, 0x01, 0x7F, 0x02, 0x02,
-0x7C, 0x74, 0x90, 0x93, 0x3D, 0xE0, 0x90, 0x01,
-0x3F, 0x22, 0x90, 0x88, 0x3C, 0xE0, 0x90, 0x05,
-0x73, 0x22, 0x25, 0xE0, 0x25, 0xE0, 0xFE, 0xEF,
-0x4E, 0x22, 0xE5, 0x69, 0x90, 0x81, 0x9D, 0x93,
-0xFF, 0x22, 0xF5, 0x82, 0xE4, 0x34, 0x96, 0xF5,
-0x83, 0x22, 0x90, 0x95, 0xD8, 0xE0, 0xFE, 0xA3,
-0xE0, 0x22, 0x90, 0x05, 0x00, 0x74, 0x1C, 0xF0,
-0xA3, 0x22, 0xF0, 0x24, 0x0A, 0x90, 0x88, 0xCF,
-0xF0, 0x22, 0xF5, 0x46, 0x89, 0x47, 0x75, 0x48,
-0x04, 0x22, 0x4D, 0xFF, 0x90, 0x88, 0x9D, 0xF0,
-0xEE, 0x22, 0x9C, 0xE2
+0x82, 0xE4, 0x34, 0x8E, 0x22, 0x90, 0x93, 0x3C,
+0xE0, 0x14, 0x90, 0x93, 0x3E, 0xF0, 0x22, 0x90,
+0x00, 0x02, 0x02, 0x03, 0x3E, 0x90, 0x00, 0x04,
+0x02, 0x03, 0x3E, 0x90, 0x88, 0x2C, 0xE0, 0x13,
+0x13, 0x54, 0x3F, 0x22, 0x12, 0x86, 0x2D, 0xC3,
+0x02, 0x03, 0xDA, 0x90, 0x88, 0x3C, 0xE0, 0x90,
+0x05, 0x73, 0x22, 0x12, 0x86, 0x2D, 0xD3, 0x02,
+0x03, 0xDA, 0x25, 0xE0, 0x25, 0xE0, 0xFE, 0xEF,
+0x4E, 0x22, 0x90, 0x95, 0xDE, 0xE0, 0xFE, 0xA3,
+0xE0, 0x22, 0x90, 0x88, 0x31, 0xE0, 0x54, 0xF7,
+0xF0, 0x22, 0x5F, 0x54
 };
 
-u32 array_length_mp_8723d_fw_nic = 27828;
+u32 array_length_mp_8723d_fw_nic = 28284;
 
 #ifdef CONFIG_WOWLAN
 
 u8 array_mp_8723d_fw_wowlan[] = {
-0xD1, 0x23, 0x30, 0x00, 0x29, 0x00, 0x00, 0x00,
-0x01, 0x04, 0x08, 0x57, 0x60, 0x7B, 0x02, 0x00,
-0x6F, 0x5F, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+0xD1, 0x23, 0x30, 0x00, 0x2F, 0x00, 0x00, 0x00,
+0x12, 0x10, 0x17, 0x09, 0xAE, 0x7B, 0x02, 0x00,
+0xBE, 0x76, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 0x00, 0x00, 0x00, 0x00, 0x02, 0x86, 0xA9, 0x00,
 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-0x00, 0x00, 0x00, 0x02, 0xD1, 0x6F, 0x00, 0x00,
+0x00, 0x00, 0x00, 0x02, 0xB6, 0xA5, 0x00, 0x00,
 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-0x00, 0x00, 0x00, 0x02, 0xD7, 0xD9, 0x00, 0x00,
+0x00, 0x00, 0x00, 0x02, 0xDD, 0x18, 0x00, 0x00,
 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-0x00, 0x00, 0x00, 0x02, 0xD0, 0xC9, 0x00, 0x00,
-0x00, 0x00, 0x00, 0x02, 0xD5, 0x7E, 0x00, 0x00,
-0x00, 0x00, 0x00, 0x02, 0xD7, 0xD8, 0x00, 0x00,
+0x00, 0x00, 0x00, 0x02, 0xD9, 0x95, 0x00, 0x00,
+0x00, 0x00, 0x00, 0x02, 0xDA, 0x3B, 0x00, 0x00,
+0x00, 0x00, 0x00, 0x02, 0xDD, 0x17, 0x00, 0x00,
 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
@@ -6768,15 +6907,15 @@ u8 array_mp_8723d_fw_wowlan[] = {
 0xF8, 0xE4, 0x93, 0xA3, 0xC8, 0xC5, 0x82, 0xC8,
 0xCA, 0xC5, 0x83, 0xCA, 0xF0, 0xA3, 0xC8, 0xC5,
 0x82, 0xC8, 0xCA, 0xC5, 0x83, 0xCA, 0xDF, 0xE9,
-0xDE, 0xE7, 0x80, 0xBE, 0x41, 0x9C, 0xDE, 0x00,
-0x41, 0x9C, 0xE3, 0x00, 0x41, 0x9B, 0x89, 0x00,
+0xDE, 0xE7, 0x80, 0xBE, 0x41, 0x9C, 0xE0, 0x00,
+0x41, 0x9C, 0xE5, 0x00, 0x41, 0x9B, 0x89, 0x00,
 0x41, 0x9B, 0x08, 0x00, 0x44, 0x9C, 0xC3, 0x00,
-0x50, 0xF2, 0x01, 0x00, 0xC0, 0xA2, 0xC8, 0x81,
-0xC7, 0x26, 0x90, 0x9C, 0xDD, 0xEF, 0xF0, 0x7F,
+0x50, 0xF2, 0x01, 0x00, 0xC8, 0xA8, 0xD0, 0x7F,
+0xD8, 0xA7, 0x90, 0x9C, 0xDF, 0xEF, 0xF0, 0x7F,
 0x02, 0xD1, 0x27, 0x90, 0x86, 0xAF, 0xE0, 0xFF,
-0x90, 0x9C, 0xDD, 0xE0, 0xFE, 0xEF, 0x4E, 0x90,
+0x90, 0x9C, 0xDF, 0xE0, 0xFE, 0xEF, 0x4E, 0x90,
 0x86, 0xAF, 0xF0, 0x22, 0xF1, 0xED, 0x2E, 0x90,
-0x86, 0xB4, 0xF0, 0x12, 0x9C, 0x54, 0xFF, 0xED,
+0x86, 0xB4, 0xF0, 0x12, 0x9C, 0x5A, 0xFF, 0xED,
 0x2F, 0x90, 0x86, 0xB5, 0xF1, 0xE6, 0xFF, 0xED,
 0x2F, 0x90, 0x86, 0xB6, 0xF1, 0xA3, 0xFF, 0xED,
 0x2F, 0x90, 0x86, 0xB7, 0xF1, 0xD1, 0xFF, 0xED,
@@ -6800,9 +6939,9 @@ u8 array_mp_8723d_fw_wowlan[] = {
 0x5F, 0x74, 0x01, 0xF0, 0x90, 0x98, 0x5B, 0xE0,
 0x70, 0x0F, 0xF1, 0x6A, 0xC4, 0x54, 0x0F, 0xFF,
 0xBF, 0x05, 0x06, 0x90, 0x98, 0x60, 0x74, 0x01,
-0xF0, 0x90, 0x99, 0xB1, 0x12, 0x9C, 0x51, 0xFF,
+0xF0, 0x90, 0x99, 0xB1, 0x12, 0x9C, 0x57, 0xFF,
 0x90, 0x99, 0xB5, 0xF0, 0x12, 0x02, 0x06, 0xC3,
-0x13, 0x30, 0xE0, 0x0C, 0x12, 0xA7, 0xF2, 0x12,
+0x13, 0x30, 0xE0, 0x0C, 0x12, 0xC7, 0x95, 0x12,
 0x87, 0xE7, 0x90, 0x99, 0xB6, 0xF0, 0x80, 0x05,
 0x90, 0x99, 0xB6, 0xEF, 0xF0, 0x90, 0x99, 0xB5,
 0xE0, 0x90, 0x99, 0xB4, 0xF0, 0x90, 0x99, 0xB6,
@@ -6811,21 +6950,21 @@ u8 array_mp_8723d_fw_wowlan[] = {
 0x12, 0x6E, 0x71, 0x90, 0x99, 0xB4, 0xE0, 0xFF,
 0x12, 0x78, 0x4A, 0xEF, 0x90, 0x99, 0xB4, 0x70,
 0x06, 0xE0, 0xFF, 0xF1, 0xF3, 0x80, 0x05, 0xE0,
-0xFF, 0x12, 0xB8, 0x22, 0x90, 0x98, 0x60, 0xE0,
+0xFF, 0x12, 0xBF, 0xF5, 0x90, 0x98, 0x60, 0xE0,
 0x60, 0x07, 0x90, 0x99, 0xB4, 0xE0, 0xFF, 0xF1,
 0xF3, 0x90, 0x99, 0xB4, 0xE0, 0x04, 0xF0, 0x80,
 0xBC, 0x90, 0x05, 0x5E, 0xE4, 0xF0, 0x90, 0x99,
 0xB5, 0xE0, 0x70, 0x1A, 0xFF, 0x12, 0x78, 0x4A,
 0xEF, 0x70, 0x13, 0x90, 0x86, 0x0C, 0x11, 0xC8,
-0x90, 0x8A, 0xED, 0x11, 0xC8, 0x12, 0xD7, 0x68,
+0x90, 0x8A, 0xED, 0x11, 0xC8, 0x12, 0xDC, 0xC1,
 0x54, 0xBF, 0xF0, 0x54, 0x7F, 0xF0, 0x22, 0x7D,
 0xFF, 0xE4, 0xFF, 0xB1, 0x1E, 0x90, 0x8A, 0xFD,
 0xE0, 0xFE, 0xA3, 0xE0, 0xAA, 0x06, 0xF9, 0x02,
 0x04, 0x7A, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0,
-0xD0, 0x90, 0x9C, 0xE4, 0xED, 0xF0, 0x90, 0x88,
+0xD0, 0x90, 0x9C, 0xE6, 0xED, 0xF0, 0x90, 0x88,
 0x31, 0xE0, 0xFE, 0xC4, 0x13, 0x13, 0x54, 0x03,
-0x30, 0xE0, 0x02, 0x41, 0x40, 0xEE, 0x12, 0xA0,
-0x9F, 0x30, 0xE0, 0x02, 0x41, 0x40, 0x90, 0x88,
+0x30, 0xE0, 0x02, 0x41, 0x40, 0xEE, 0x12, 0xA8,
+0xAA, 0x30, 0xE0, 0x02, 0x41, 0x40, 0x90, 0x88,
 0x39, 0xE0, 0xFE, 0x6F, 0x70, 0x02, 0x41, 0x40,
 0xEF, 0x70, 0x02, 0x21, 0xA0, 0x24, 0xFE, 0x70,
 0x02, 0x21, 0xE5, 0x24, 0xFE, 0x60, 0x4F, 0x24,
@@ -6835,7 +6974,7 @@ u8 array_mp_8723d_fw_wowlan[] = {
 0x7F, 0x01, 0x12, 0x78, 0xC0, 0x90, 0x88, 0x39,
 0xE0, 0xB4, 0x06, 0x03, 0x12, 0x71, 0x24, 0x90,
 0x88, 0x39, 0xE0, 0xB4, 0x04, 0x11, 0x90, 0x9C,
-0xE4, 0xE0, 0xFF, 0x60, 0x05, 0x12, 0x67, 0x80,
+0xE6, 0xE0, 0xFF, 0x60, 0x05, 0x12, 0x67, 0x80,
 0x80, 0x05, 0x90, 0x8A, 0xED, 0x11, 0xC8, 0x90,
 0x88, 0x39, 0xE0, 0x64, 0x08, 0x60, 0x02, 0x41,
 0x3A, 0x12, 0x7B, 0xCC, 0x41, 0x3A, 0x90, 0x88,
@@ -6865,8 +7004,8 @@ u8 array_mp_8723d_fw_wowlan[] = {
 0x05, 0x7F, 0x01, 0x12, 0x78, 0xC0, 0x90, 0x88,
 0x39, 0xE0, 0xB4, 0x04, 0x15, 0x12, 0x7A, 0x49,
 0x80, 0x10, 0x90, 0x88, 0x39, 0xE0, 0xB4, 0x0C,
-0x09, 0x12, 0xD6, 0xB8, 0x30, 0xE0, 0x03, 0x12,
-0x79, 0xD4, 0x90, 0x88, 0x39, 0x12, 0xF9, 0xE0,
+0x09, 0x12, 0xB4, 0xA0, 0x30, 0xE0, 0x03, 0x12,
+0x79, 0xD4, 0x90, 0x88, 0x39, 0x12, 0xFA, 0x75,
 0xD0, 0xD0, 0x92, 0xAF, 0x22, 0x90, 0x9A, 0x61,
 0x12, 0x82, 0x27, 0x90, 0x05, 0x22, 0xE0, 0x90,
 0x9A, 0x72, 0xF0, 0x90, 0x04, 0x1D, 0xE0, 0x60,
@@ -6876,8 +7015,8 @@ u8 array_mp_8723d_fw_wowlan[] = {
 0x18, 0x7D, 0x01, 0x12, 0x66, 0xDB, 0x90, 0x9A,
 0x6F, 0xEE, 0xF0, 0xA3, 0xEF, 0xF0, 0x90, 0x9A,
 0x6F, 0xD1, 0xA3, 0x90, 0x9A, 0x71, 0xEF, 0xF0,
-0x90, 0x9A, 0x6F, 0x12, 0xF9, 0x70, 0x7B, 0x01,
-0x90, 0x9A, 0x6D, 0xE0, 0xFD, 0x12, 0xF0, 0x6E,
+0x90, 0x9A, 0x6F, 0x12, 0xFA, 0x1D, 0x7B, 0x01,
+0x90, 0x9A, 0x6D, 0xE0, 0xFD, 0x12, 0xF0, 0x46,
 0x90, 0x9A, 0x6E, 0xE0, 0x60, 0x02, 0x61, 0x21,
 0xB1, 0x48, 0xC0, 0x03, 0xC0, 0x02, 0xC0, 0x01,
 0x90, 0x9A, 0x64, 0x71, 0xE0, 0x75, 0x48, 0x06,
@@ -6899,7 +7038,7 @@ u8 array_mp_8723d_fw_wowlan[] = {
 0x9A, 0x9E, 0x12, 0x82, 0x27, 0x90, 0x9A, 0xA1,
 0x12, 0x04, 0x3D, 0x00, 0x00, 0x00, 0x20, 0x90,
 0x9A, 0xA5, 0x74, 0x3A, 0xF0, 0x90, 0x9A, 0x61,
-0x12, 0x82, 0x1E, 0x12, 0xF1, 0xD3, 0x71, 0xD3,
+0x12, 0x82, 0x1E, 0x12, 0xF1, 0xA0, 0x71, 0xD3,
 0xF1, 0xE2, 0xB1, 0xC9, 0x75, 0x48, 0x28, 0x7B,
 0x01, 0x7A, 0x9A, 0x79, 0x73, 0x71, 0xD0, 0xF1,
 0xE2, 0xFA, 0x7B, 0x01, 0xC0, 0x03, 0x8B, 0x45,
@@ -6908,15 +7047,15 @@ u8 array_mp_8723d_fw_wowlan[] = {
 0x71, 0xE0, 0xFF, 0x90, 0x9A, 0x70, 0xE0, 0x2F,
 0xFF, 0x90, 0x9A, 0x6F, 0xE0, 0x34, 0x00, 0xCF,
 0x24, 0x30, 0xFD, 0xE4, 0x3F, 0xFC, 0x90, 0x98,
-0x39, 0xE0, 0xFB, 0x7F, 0x3A, 0x12, 0xBB, 0xEB,
+0x39, 0xE0, 0xFB, 0x7F, 0x3A, 0x12, 0xC3, 0xF8,
 0x71, 0xD3, 0xF1, 0xE2, 0xFA, 0x7B, 0x01, 0xC0,
 0x03, 0x8B, 0x45, 0x75, 0x46, 0x9A, 0x75, 0x47,
 0x73, 0x75, 0x48, 0x28, 0xD0, 0x03, 0x12, 0x69,
 0xF5, 0x90, 0x98, 0x35, 0xE0, 0xB4, 0x02, 0x0D,
 0x90, 0x98, 0x39, 0xE0, 0xFF, 0x90, 0x9A, 0x71,
-0xE0, 0xFD, 0x12, 0xDB, 0xD3, 0x90, 0x06, 0x33,
+0xE0, 0xFD, 0x12, 0xF1, 0xDF, 0x90, 0x06, 0x33,
 0xE0, 0x44, 0x02, 0xF0, 0x90, 0x9A, 0x72, 0xE0,
-0xFD, 0x7B, 0x3A, 0x12, 0xFA, 0x3A, 0xF0, 0x22,
+0xFD, 0x7B, 0x3A, 0x12, 0xFA, 0xDA, 0xF0, 0x22,
 0x12, 0x69, 0xF5, 0x90, 0x9A, 0x6F, 0xA3, 0xE0,
 0xFF, 0xA3, 0xE0, 0x2F, 0x22, 0x90, 0x9A, 0x67,
 0x12, 0x82, 0x1E, 0x8B, 0x45, 0x8A, 0x46, 0x89,
@@ -6932,8 +7071,8 @@ u8 array_mp_8723d_fw_wowlan[] = {
 0x7D, 0x01, 0x12, 0x66, 0xDB, 0x90, 0x9C, 0x47,
 0xEE, 0xF0, 0xA3, 0xEF, 0xF0, 0x90, 0x9C, 0x47,
 0xD1, 0xA3, 0x90, 0x9C, 0x49, 0xEF, 0xF0, 0x90,
-0x9C, 0x47, 0x12, 0xF9, 0x70, 0x7B, 0x01, 0x90,
-0x9C, 0x45, 0xE0, 0xFD, 0x12, 0xF0, 0x6E, 0x90,
+0x9C, 0x47, 0x12, 0xFA, 0x1D, 0x7B, 0x01, 0x90,
+0x9C, 0x45, 0xE0, 0xFD, 0x12, 0xF0, 0x46, 0x90,
 0x9C, 0x46, 0xE0, 0x70, 0x4D, 0xB1, 0x48, 0xC0,
 0x03, 0xC0, 0x02, 0xC0, 0x01, 0x90, 0x9C, 0x42,
 0x71, 0xE0, 0x75, 0x48, 0x06, 0xD0, 0x01, 0xD0,
@@ -6955,13 +7094,13 @@ u8 array_mp_8723d_fw_wowlan[] = {
 0x75, 0x47, 0x5D, 0x75, 0x48, 0x04, 0xD0, 0x03,
 0x12, 0x69, 0xF5, 0x90, 0x98, 0x35, 0xE0, 0xB4,
 0x02, 0x0D, 0x90, 0x98, 0x38, 0xE0, 0xFF, 0x90,
-0x9C, 0x49, 0xE0, 0xFD, 0x12, 0xDB, 0xD3, 0x90,
+0x9C, 0x49, 0xE0, 0xFD, 0x12, 0xF1, 0xDF, 0x90,
 0x06, 0x30, 0xE0, 0x44, 0x10, 0xF0, 0x90, 0x9C,
-0x4A, 0xE0, 0xFD, 0x7B, 0x34, 0x12, 0xFA, 0x3A,
+0x4A, 0xE0, 0xFD, 0x7B, 0x34, 0x12, 0xFA, 0xDA,
 0xF0, 0xD0, 0xD0, 0x92, 0xAF, 0x22, 0xEB, 0xB4,
-0x57, 0x05, 0x12, 0xFA, 0x45, 0x80, 0x10, 0xEF,
+0x57, 0x05, 0x12, 0xFA, 0xE5, 0x80, 0x10, 0xEF,
 0x70, 0x07, 0x90, 0x98, 0x6A, 0xE0, 0x4D, 0x80,
-0x06, 0x12, 0xB8, 0x3F, 0x12, 0xFA, 0x45, 0x90,
+0x06, 0x12, 0xC0, 0x48, 0x12, 0xFA, 0xE5, 0x90,
 0x05, 0x22, 0xF0, 0x90, 0x93, 0x01, 0xEB, 0xF0,
 0x22, 0x12, 0x69, 0xF5, 0x90, 0x9C, 0x47, 0x22,
 0xA3, 0xA3, 0xE0, 0x24, 0x38, 0xF9, 0xE4, 0x34,
@@ -6982,19 +7121,19 @@ u8 array_mp_8723d_fw_wowlan[] = {
 0x2F, 0xF0, 0xE0, 0x24, 0x00, 0xF9, 0xE4, 0x34,
 0xFC, 0x75, 0x45, 0x01, 0xF5, 0x46, 0x89, 0x47,
 0x22, 0x90, 0x98, 0x42, 0xD1, 0x80, 0xEF, 0xF0,
-0xE0, 0xFE, 0x12, 0xFA, 0x04, 0xFF, 0x74, 0x29,
-0x2E, 0x12, 0xFA, 0xB4, 0xFD, 0x90, 0x99, 0xB1,
+0xE0, 0xFE, 0x12, 0xFA, 0xAF, 0xFF, 0x74, 0x29,
+0x2E, 0x12, 0xDE, 0x3E, 0xFD, 0x90, 0x99, 0xB1,
 0xE0, 0x24, 0x2C, 0xD1, 0xC0, 0x90, 0x99, 0xB1,
 0xE0, 0x2F, 0x24, 0x30, 0xA3, 0xF0, 0xE0, 0xFD,
-0x24, 0x04, 0x12, 0xDB, 0x81, 0xFE, 0x74, 0x05,
-0x2D, 0x12, 0xBF, 0xB6, 0x12, 0xBF, 0x7E, 0x90,
+0x24, 0x04, 0x12, 0xD7, 0x1C, 0xFE, 0x74, 0x05,
+0x2D, 0x12, 0xC7, 0xB0, 0x12, 0xC7, 0x8C, 0x90,
 0x95, 0x9D, 0xF0, 0xA3, 0xEF, 0xF0, 0x90, 0x99,
 0xB2, 0xE0, 0x24, 0x0C, 0xF9, 0xE4, 0x34, 0xFC,
 0xB1, 0xC9, 0x75, 0x48, 0x04, 0x7B, 0x01, 0x7A,
 0x95, 0x79, 0x9F, 0x12, 0x69, 0xF5, 0x90, 0x99,
 0xB2, 0xE0, 0x24, 0x14, 0xF0, 0xE0, 0xFD, 0x24,
-0x01, 0x12, 0xBB, 0xE3, 0xE0, 0xFE, 0x74, 0x00,
-0x2D, 0xD1, 0x9B, 0x12, 0xBF, 0x7E, 0x90, 0x95,
+0x01, 0x12, 0xC3, 0xF0, 0xE0, 0xFE, 0x74, 0x00,
+0x2D, 0xD1, 0x9B, 0x12, 0xC7, 0x8C, 0x90, 0x95,
 0xA3, 0xF0, 0xA3, 0xEF, 0xF0, 0x90, 0x98, 0x43,
 0xD1, 0x80, 0xEF, 0xF0, 0x90, 0x95, 0x99, 0xE0,
 0xFE, 0xA3, 0xE0, 0xFF, 0x4E, 0x60, 0x10, 0x90,
@@ -7014,13 +7153,13 @@ u8 array_mp_8723d_fw_wowlan[] = {
 0xF5, 0x82, 0xE4, 0x34, 0xFC, 0xF5, 0x83, 0xE0,
 0xFB, 0xE4, 0xFE, 0xEF, 0x30, 0xE7, 0x04, 0x7C,
 0x02, 0x80, 0x02, 0xE4, 0xFC, 0xED, 0x30, 0xE6,
-0x09, 0xAF, 0x03, 0x12, 0xF0, 0x2F, 0xAE, 0x07,
+0x09, 0xAF, 0x03, 0x12, 0xF0, 0x07, 0xAE, 0x07,
 0x80, 0x02, 0xE4, 0xFE, 0xEC, 0x24, 0x18, 0x2E,
 0xFF, 0x22, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0,
-0xD0, 0x90, 0x93, 0x07, 0x12, 0xFA, 0xC6, 0xD1,
+0xD0, 0x90, 0x93, 0x07, 0x12, 0xD7, 0x25, 0xD1,
 0x9B, 0xE0, 0x90, 0x9B, 0x26, 0xF0, 0x74, 0x01,
-0x2F, 0x12, 0xBB, 0xE3, 0xE0, 0x90, 0x9B, 0x47,
-0x12, 0xDB, 0x70, 0x90, 0x9B, 0x68, 0xF0, 0xEF,
+0x2F, 0x12, 0xC3, 0xF0, 0xE0, 0x90, 0x9B, 0x47,
+0x12, 0xD7, 0x0B, 0x90, 0x9B, 0x68, 0xF0, 0xEF,
 0x24, 0x20, 0x90, 0x99, 0xB1, 0xF0, 0xB1, 0xC3,
 0x90, 0x9B, 0x26, 0xE0, 0xF5, 0x48, 0x7B, 0x01,
 0x7A, 0x9B, 0x79, 0x27, 0x12, 0x69, 0xF5, 0x90,
@@ -7039,12 +7178,12 @@ u8 array_mp_8723d_fw_wowlan[] = {
 0x90, 0x04, 0x1D, 0xE0, 0x60, 0x2F, 0x90, 0x05,
 0x22, 0xE0, 0x90, 0x9C, 0xAA, 0xF0, 0x7B, 0x26,
 0x11, 0xBF, 0xEF, 0x64, 0x01, 0x70, 0x0B, 0x12,
-0xF8, 0xEC, 0x12, 0xE9, 0xD3, 0x12, 0xD8, 0xBC,
+0xF9, 0x5F, 0x12, 0xAF, 0xCA, 0x12, 0xDD, 0xFD,
 0xEE, 0xF0, 0x90, 0x9C, 0xAA, 0xE0, 0xFD, 0x7B,
-0x27, 0xE4, 0xFF, 0xB1, 0x1E, 0x12, 0xF9, 0x5E,
-0x12, 0x04, 0x7E, 0x80, 0x11, 0x12, 0xF9, 0x5E,
-0x12, 0x04, 0x7E, 0x12, 0xF8, 0xEC, 0x12, 0xE9,
-0xD3, 0x12, 0xD8, 0xBC, 0xEE, 0xF0, 0x90, 0x04,
+0x27, 0xE4, 0xFF, 0xB1, 0x1E, 0x12, 0xF9, 0xF9,
+0x12, 0x04, 0x7E, 0x80, 0x11, 0x12, 0xF9, 0xF9,
+0x12, 0x04, 0x7E, 0x12, 0xF9, 0x5F, 0x12, 0xAF,
+0xCA, 0x12, 0xDD, 0xFD, 0xEE, 0xF0, 0x90, 0x04,
 0x1F, 0x74, 0x20, 0xF0, 0x7F, 0x01, 0xD0, 0xD0,
 0x92, 0xAF, 0x22, 0x24, 0x42, 0xF9, 0xE4, 0x34,
 0xFC, 0x22, 0x24, 0x30, 0xF9, 0xE4, 0x34, 0xFC,
@@ -7054,1027 +7193,1283 @@ u8 array_mp_8723d_fw_wowlan[] = {
 0xF0, 0xA3, 0xED, 0xF0, 0x90, 0x8A, 0xF9, 0x11,
 0x47, 0x7D, 0x44, 0x7F, 0x6F, 0x12, 0x04, 0x7E,
 0x12, 0x88, 0xC5, 0x90, 0x9C, 0xD4, 0xE0, 0x90,
-0x9C, 0xD3, 0xB4, 0x01, 0x07, 0x91, 0xBE, 0x44,
-0x04, 0xF0, 0x80, 0x05, 0x91, 0xBE, 0x54, 0xFB,
-0xF0, 0x90, 0x8A, 0xF9, 0x11, 0x47, 0x91, 0x73,
+0x9C, 0xD3, 0xB4, 0x01, 0x07, 0x91, 0xF0, 0x44,
+0x04, 0xF0, 0x80, 0x05, 0x91, 0xF0, 0x54, 0xFB,
+0xF0, 0x90, 0x8A, 0xF9, 0x11, 0x47, 0x91, 0x98,
 0xD0, 0xD0, 0x92, 0xAF, 0x22, 0x90, 0x8A, 0x77,
 0xE0, 0xFE, 0xA3, 0xE0, 0xFF, 0xF5, 0x82, 0x8E,
 0x83, 0x12, 0x04, 0x7E, 0x90, 0x8A, 0x79, 0xE0,
 0xFE, 0xA3, 0xE0, 0xF5, 0x82, 0x8E, 0x83, 0x22,
-0x90, 0x99, 0xB1, 0xEF, 0xF0, 0x51, 0xA2, 0x7F,
-0xF4, 0x7E, 0x01, 0x12, 0x5F, 0xA6, 0xBF, 0x01,
-0x08, 0x90, 0x99, 0xF8, 0xE0, 0x90, 0x99, 0xFA,
-0xF0, 0x51, 0xA2, 0x7F, 0xF5, 0x7E, 0x01, 0x12,
+0x90, 0x99, 0xB1, 0xEF, 0x51, 0xCD, 0x7F, 0xF4,
+0x7E, 0x01, 0x12, 0x5F, 0xA6, 0xBF, 0x01, 0x08,
+0x90, 0x99, 0xF8, 0xE0, 0x90, 0x99, 0xFA, 0xF0,
+0x51, 0xCE, 0x7F, 0xF5, 0x7E, 0x01, 0x12, 0x5F,
+0xA6, 0xBF, 0x01, 0x08, 0x90, 0x99, 0xF8, 0xE0,
+0x90, 0x99, 0xFB, 0xF0, 0x51, 0xCE, 0x7F, 0xF6,
+0x7E, 0x01, 0x12, 0x5F, 0xA6, 0xBF, 0x01, 0x08,
+0x90, 0x99, 0xF8, 0xE0, 0x90, 0x99, 0xFC, 0xF0,
+0x51, 0xCE, 0x7F, 0xF7, 0x7E, 0x01, 0x12, 0x5F,
+0xA6, 0xBF, 0x01, 0x08, 0x90, 0x99, 0xF8, 0xE0,
+0x90, 0x99, 0xFD, 0xF0, 0x51, 0xCE, 0x7F, 0xF8,
+0x7E, 0x01, 0x12, 0x5F, 0xA6, 0xBF, 0x01, 0x08,
+0x90, 0x99, 0xF8, 0xE0, 0x90, 0x99, 0xFE, 0xF0,
+0x51, 0xCE, 0x12, 0xFB, 0xA4, 0xBF, 0x01, 0x08,
+0x90, 0x99, 0xF8, 0xE0, 0x90, 0x99, 0xFF, 0xF0,
+0x51, 0xCE, 0x71, 0xC7, 0x64, 0x01, 0x70, 0x54,
+0x90, 0x99, 0xF8, 0xE0, 0x90, 0x9A, 0x00, 0xF0,
+0x54, 0x07, 0x60, 0x08, 0x90, 0x99, 0xF8, 0xE0,
+0x54, 0xE0, 0x70, 0x40, 0x7B, 0x01, 0x7A, 0x99,
+0x79, 0xF9, 0x7F, 0xFA, 0x71, 0xC9, 0x64, 0x01,
+0x70, 0x32, 0x90, 0x99, 0xF8, 0xE0, 0xFC, 0x54,
+0x07, 0x70, 0x12, 0x90, 0x9A, 0x00, 0xE0, 0xFE,
+0x90, 0x99, 0xF9, 0xE0, 0x54, 0x07, 0xFD, 0xEE,
+0x4D, 0x90, 0x9A, 0x00, 0xF0, 0xEC, 0x54, 0xE0,
+0x70, 0x12, 0x90, 0x9A, 0x00, 0xE0, 0xFF, 0x90,
+0x99, 0xF9, 0xE0, 0x54, 0xE0, 0xFE, 0xEF, 0x4E,
+0x90, 0x9A, 0x00, 0xF0, 0x51, 0xCE, 0x7F, 0xFD,
+0x71, 0xC9, 0x64, 0x01, 0x70, 0x4B, 0x90, 0x99,
+0xF8, 0xE0, 0xFE, 0x54, 0xCC, 0x90, 0x9A, 0x01,
+0xF0, 0xEE, 0x54, 0x0C, 0xFF, 0x60, 0x08, 0x90,
+0x99, 0xF8, 0xE0, 0x54, 0xC0, 0x70, 0x32, 0xEF,
+0x70, 0x16, 0x90, 0x9A, 0x01, 0xE0, 0xFF, 0x90,
+0x99, 0xF8, 0xE0, 0x54, 0x03, 0x25, 0xE0, 0x25,
+0xE0, 0xFE, 0xEF, 0x4E, 0x90, 0x9A, 0x01, 0xF0,
+0x90, 0x99, 0xF8, 0xE0, 0xFF, 0x54, 0xC0, 0x70,
+0x10, 0x90, 0x9A, 0x01, 0xE0, 0xFE, 0xEF, 0x54,
+0x30, 0x25, 0xE0, 0x25, 0xE0, 0xFF, 0xEE, 0x4F,
+0xF0, 0x51, 0xCE, 0x7F, 0xF0, 0x7E, 0x01, 0x12,
 0x5F, 0xA6, 0xBF, 0x01, 0x08, 0x90, 0x99, 0xF8,
-0xE0, 0x90, 0x99, 0xFB, 0xF0, 0x51, 0xA2, 0x7F,
-0xF6, 0x7E, 0x01, 0x12, 0x5F, 0xA6, 0xBF, 0x01,
-0x08, 0x90, 0x99, 0xF8, 0xE0, 0x90, 0x99, 0xFC,
-0xF0, 0x51, 0xA2, 0x7F, 0xF7, 0x7E, 0x01, 0x12,
+0xE0, 0x90, 0x9A, 0x02, 0xF0, 0x51, 0xCE, 0x7F,
+0xF1, 0x7E, 0x01, 0x12, 0x5F, 0xA6, 0xBF, 0x01,
+0x08, 0x90, 0x99, 0xF8, 0xE0, 0x90, 0x9A, 0x03,
+0xF0, 0x51, 0xCE, 0x7F, 0xF2, 0x7E, 0x01, 0x12,
 0x5F, 0xA6, 0xBF, 0x01, 0x08, 0x90, 0x99, 0xF8,
-0xE0, 0x90, 0x99, 0xFD, 0xF0, 0x51, 0xA2, 0x7F,
-0xF8, 0x7E, 0x01, 0x12, 0x5F, 0xA6, 0xBF, 0x01,
-0x08, 0x90, 0x99, 0xF8, 0xE0, 0x90, 0x99, 0xFE,
-0xF0, 0x51, 0xA2, 0x12, 0xFB, 0x56, 0xBF, 0x01,
-0x08, 0x90, 0x99, 0xF8, 0xE0, 0x90, 0x99, 0xFF,
-0xF0, 0x51, 0xA2, 0x71, 0xA2, 0x64, 0x01, 0x70,
-0x54, 0x90, 0x99, 0xF8, 0xE0, 0x90, 0x9A, 0x00,
-0xF0, 0x54, 0x07, 0x60, 0x08, 0x90, 0x99, 0xF8,
-0xE0, 0x54, 0xE0, 0x70, 0x40, 0x7B, 0x01, 0x7A,
-0x99, 0x79, 0xF9, 0x7F, 0xFA, 0x71, 0xA4, 0x64,
-0x01, 0x70, 0x32, 0x90, 0x99, 0xF8, 0xE0, 0xFC,
-0x54, 0x07, 0x70, 0x12, 0x90, 0x9A, 0x00, 0xE0,
-0xFE, 0x90, 0x99, 0xF9, 0xE0, 0x54, 0x07, 0xFD,
-0xEE, 0x4D, 0x90, 0x9A, 0x00, 0xF0, 0xEC, 0x54,
-0xE0, 0x70, 0x12, 0x90, 0x9A, 0x00, 0xE0, 0xFF,
-0x90, 0x99, 0xF9, 0xE0, 0x54, 0xE0, 0xFE, 0xEF,
-0x4E, 0x90, 0x9A, 0x00, 0xF0, 0x51, 0xA2, 0x7F,
-0xFD, 0x71, 0xA4, 0x64, 0x01, 0x70, 0x4B, 0x90,
-0x99, 0xF8, 0xE0, 0xFE, 0x54, 0xCC, 0x90, 0x9A,
-0x01, 0xF0, 0xEE, 0x54, 0x0C, 0xFF, 0x60, 0x08,
-0x90, 0x99, 0xF8, 0xE0, 0x54, 0xC0, 0x70, 0x32,
-0xEF, 0x70, 0x16, 0x90, 0x9A, 0x01, 0xE0, 0xFF,
-0x90, 0x99, 0xF8, 0xE0, 0x54, 0x03, 0x25, 0xE0,
-0x25, 0xE0, 0xFE, 0xEF, 0x4E, 0x90, 0x9A, 0x01,
-0xF0, 0x90, 0x99, 0xF8, 0xE0, 0xFF, 0x54, 0xC0,
-0x70, 0x10, 0x90, 0x9A, 0x01, 0xE0, 0xFE, 0xEF,
-0x54, 0x30, 0x25, 0xE0, 0x25, 0xE0, 0xFF, 0xEE,
-0x4F, 0xF0, 0x51, 0xA2, 0x7F, 0xF0, 0x7E, 0x01,
-0x12, 0x5F, 0xA6, 0xBF, 0x01, 0x08, 0x90, 0x99,
-0xF8, 0xE0, 0x90, 0x9A, 0x02, 0xF0, 0x51, 0xA2,
-0x7F, 0xF1, 0x7E, 0x01, 0x12, 0x5F, 0xA6, 0xBF,
-0x01, 0x08, 0x90, 0x99, 0xF8, 0xE0, 0x90, 0x9A,
-0x03, 0xF0, 0x51, 0xA2, 0x7F, 0xF2, 0x7E, 0x01,
-0x12, 0x5F, 0xA6, 0xBF, 0x01, 0x08, 0x90, 0x99,
-0xF8, 0xE0, 0x90, 0x9A, 0x04, 0xF0, 0x51, 0xA2,
-0x7F, 0xF3, 0x7E, 0x01, 0x12, 0x5F, 0xA6, 0xBF,
-0x01, 0x08, 0x90, 0x99, 0xF8, 0xE0, 0x90, 0x9A,
-0x05, 0xF0, 0x51, 0xA2, 0x7F, 0xFC, 0x7E, 0x01,
-0x12, 0x5F, 0xA6, 0xBF, 0x01, 0x08, 0x90, 0x99,
-0xF8, 0xE0, 0x90, 0x9A, 0x06, 0xF0, 0x90, 0x99,
-0xB2, 0x74, 0x19, 0xF0, 0x90, 0x99, 0xD4, 0x74,
-0x08, 0xF0, 0x90, 0x99, 0xFA, 0xE0, 0x90, 0x99,
-0xB4, 0xF0, 0x90, 0x99, 0xFB, 0xE0, 0x90, 0x99,
-0xB5, 0xF0, 0x90, 0x99, 0xFC, 0xE0, 0x90, 0x99,
-0xB6, 0xF0, 0x90, 0x99, 0xFD, 0xE0, 0x90, 0x99,
-0xB7, 0xF0, 0x90, 0x99, 0xFE, 0xE0, 0x90, 0x99,
-0xB8, 0xF0, 0x90, 0x99, 0xFF, 0xE0, 0x90, 0x99,
-0xB9, 0xF0, 0x90, 0x9A, 0x00, 0xE0, 0x90, 0x99,
-0xBA, 0xF0, 0x90, 0x9A, 0x01, 0xE0, 0x90, 0x99,
-0xBB, 0xF0, 0x90, 0x99, 0xD5, 0x74, 0x1A, 0xF0,
-0x90, 0x99, 0xF7, 0x74, 0x05, 0xF0, 0x90, 0x9A,
-0x02, 0xE0, 0x90, 0x99, 0xD7, 0xF0, 0x90, 0x9A,
-0x03, 0xE0, 0x90, 0x99, 0xD8, 0xF0, 0x90, 0x9A,
-0x04, 0xE0, 0x90, 0x99, 0xD9, 0xF0, 0x90, 0x9A,
-0x05, 0xE0, 0x90, 0x99, 0xDA, 0xF0, 0x90, 0x9A,
-0x06, 0xE0, 0x90, 0x99, 0xDB, 0xF0, 0x90, 0x99,
-0xB1, 0xE0, 0xB4, 0x01, 0x16, 0x7B, 0x01, 0x7A,
-0x99, 0x79, 0xB2, 0x12, 0xD7, 0xA6, 0x7B, 0x01,
-0x7A, 0x99, 0x79, 0xD5, 0x11, 0x35, 0x7F, 0x04,
-0x02, 0x04, 0x7E, 0x75, 0x45, 0x01, 0x75, 0x46,
-0x99, 0x75, 0x47, 0xB2, 0x75, 0x48, 0x0A, 0x7B,
-0x01, 0x7A, 0x01, 0x79, 0xA0, 0x12, 0xEF, 0xDB,
-0x75, 0x46, 0x99, 0x75, 0x47, 0xD7, 0x75, 0x48,
-0x05, 0x7B, 0x01, 0x7A, 0x01, 0x79, 0xAA, 0x02,
-0x69, 0xF5, 0x7B, 0x01, 0x7A, 0x99, 0x79, 0xF8,
-0x22, 0x7E, 0x00, 0x7F, 0x62, 0x7D, 0x00, 0x7B,
-0x01, 0x7A, 0x88, 0x79, 0x31, 0x12, 0x04, 0x80,
-0x12, 0xF9, 0xF7, 0x12, 0x04, 0x80, 0xE4, 0x90,
-0x99, 0xAF, 0xF0, 0x90, 0x88, 0x35, 0x74, 0x02,
-0xF0, 0x90, 0x88, 0x3C, 0x14, 0xF0, 0xA3, 0xF0,
-0xA3, 0x74, 0x50, 0xF0, 0x90, 0x88, 0x42, 0xE4,
-0xF0, 0xA3, 0x74, 0x02, 0xF0, 0x90, 0x88, 0x4E,
-0x74, 0x10, 0xF0, 0xA3, 0x74, 0x50, 0xF0, 0x12,
-0xF5, 0xE7, 0x90, 0x8A, 0x89, 0x11, 0x47, 0x91,
-0x73, 0x90, 0x8A, 0x89, 0x11, 0x47, 0x7D, 0x0C,
-0x7F, 0x02, 0x12, 0x04, 0x7E, 0x90, 0x8A, 0x89,
-0x11, 0x47, 0x7D, 0x0C, 0x7F, 0x01, 0x12, 0x04,
-0x7E, 0x90, 0x86, 0xB3, 0xE0, 0xFF, 0xB4, 0x01,
-0x08, 0x90, 0x88, 0x41, 0x74, 0xD4, 0xF0, 0x80,
-0x18, 0xEF, 0xB4, 0x03, 0x0F, 0x90, 0x88, 0x41,
-0x74, 0xF4, 0xF0, 0x90, 0x00, 0x92, 0xE0, 0x54,
-0x7F, 0xF0, 0x80, 0x05, 0xE4, 0x90, 0x88, 0x41,
-0xF0, 0x90, 0x00, 0x79, 0xE0, 0x54, 0x03, 0xFF,
-0xBF, 0x02, 0x0D, 0x90, 0x00, 0x28, 0xE0, 0x30,
-0xE2, 0x06, 0x90, 0x88, 0x53, 0x74, 0x02, 0xF0,
-0x90, 0x88, 0x93, 0x74, 0x03, 0xF0, 0xA3, 0x74,
-0x0F, 0xF0, 0xA3, 0xE0, 0x54, 0x01, 0x44, 0x28,
-0xF0, 0xA3, 0x74, 0x07, 0xF0, 0x7E, 0x00, 0x7F,
-0x18, 0x7D, 0x00, 0x7B, 0x01, 0x7A, 0x93, 0x79,
-0x0C, 0x12, 0x04, 0x80, 0x90, 0x8A, 0xA3, 0x11,
-0x47, 0x7F, 0x01, 0x12, 0x04, 0x7E, 0x90, 0x05,
-0x58, 0x74, 0x02, 0xF0, 0x7E, 0x00, 0xFF, 0x7D,
-0x00, 0x7B, 0x01, 0x7A, 0x88, 0x79, 0x9A, 0x12,
-0x04, 0x80, 0x90, 0x06, 0x04, 0xE0, 0x54, 0x7F,
-0xF0, 0x90, 0x06, 0x0A, 0xE0, 0x54, 0xF8, 0xF0,
-0x90, 0x05, 0x22, 0xE4, 0xF0, 0x90, 0x88, 0x9C,
-0xF0, 0x22, 0x7F, 0xFB, 0x7E, 0x01, 0x12, 0x5F,
-0xA6, 0xEF, 0x22, 0x90, 0x99, 0xAF, 0x74, 0x01,
-0xF0, 0x90, 0x06, 0x92, 0x04, 0xF0, 0x90, 0x01,
-0x3C, 0x74, 0x04, 0xF0, 0x90, 0x88, 0x31, 0xE0,
-0x44, 0x08, 0xF0, 0x90, 0x88, 0x39, 0xE0, 0x64,
-0x0C, 0x60, 0x13, 0x90, 0x8A, 0xB9, 0x11, 0x47,
-0xE4, 0xFD, 0x7F, 0x0C, 0x12, 0x04, 0x7E, 0x90,
-0x8A, 0xF9, 0x11, 0x47, 0x91, 0x73, 0x90, 0x8A,
-0xAF, 0x11, 0x47, 0x7D, 0x08, 0xE4, 0xFF, 0x02,
-0x04, 0x7E, 0xE4, 0x90, 0x9A, 0x35, 0xF0, 0x90,
-0x9B, 0x89, 0x04, 0xF0, 0x90, 0x06, 0x32, 0xE0,
-0x44, 0x04, 0xF0, 0x90, 0x98, 0x31, 0x12, 0x04,
-0xB8, 0xEF, 0x24, 0x01, 0x12, 0xFA, 0x0F, 0x90,
-0x98, 0x31, 0x12, 0x04, 0x31, 0x12, 0xCB, 0x72,
-0xE4, 0x90, 0x9B, 0x0A, 0xF0, 0xFF, 0x12, 0xF3,
-0xCF, 0xF1, 0xED, 0x70, 0x48, 0x90, 0x8A, 0xB9,
+0xE0, 0x90, 0x9A, 0x04, 0xF0, 0x51, 0xCE, 0x7F,
+0xF3, 0x7E, 0x01, 0x12, 0x5F, 0xA6, 0xBF, 0x01,
+0x08, 0x90, 0x99, 0xF8, 0xE0, 0x90, 0x9A, 0x05,
+0xF0, 0x51, 0xCE, 0x7F, 0xFC, 0x7E, 0x01, 0x12,
+0x5F, 0xA6, 0xBF, 0x01, 0x08, 0x90, 0x99, 0xF8,
+0xE0, 0x90, 0x9A, 0x06, 0xF0, 0x90, 0x99, 0xB2,
+0x74, 0x19, 0xF0, 0x90, 0x99, 0xD4, 0x74, 0x08,
+0xF0, 0x90, 0x99, 0xFA, 0xE0, 0x90, 0x99, 0xB4,
+0xF0, 0x90, 0x99, 0xFB, 0xE0, 0x90, 0x99, 0xB5,
+0xF0, 0x90, 0x99, 0xFC, 0xE0, 0x90, 0x99, 0xB6,
+0xF0, 0x90, 0x99, 0xFD, 0xE0, 0x90, 0x99, 0xB7,
+0xF0, 0x90, 0x99, 0xFE, 0xE0, 0x90, 0x99, 0xB8,
+0xF0, 0x90, 0x99, 0xFF, 0xE0, 0x90, 0x99, 0xB9,
+0xF0, 0x90, 0x9A, 0x00, 0xE0, 0x90, 0x99, 0xBA,
+0xF0, 0x90, 0x9A, 0x01, 0xE0, 0x90, 0x99, 0xBB,
+0xF0, 0x90, 0x99, 0xD5, 0x74, 0x1A, 0xF0, 0x90,
+0x99, 0xF7, 0x74, 0x05, 0xF0, 0x90, 0x9A, 0x02,
+0xE0, 0x90, 0x99, 0xD7, 0xF0, 0x90, 0x9A, 0x03,
+0xE0, 0x90, 0x99, 0xD8, 0xF0, 0x90, 0x9A, 0x04,
+0xE0, 0x90, 0x99, 0xD9, 0xF0, 0x90, 0x9A, 0x05,
+0xE0, 0x90, 0x99, 0xDA, 0xF0, 0x90, 0x9A, 0x06,
+0xE0, 0x90, 0x99, 0xDB, 0xF0, 0x90, 0x00, 0x35,
+0xE0, 0x54, 0xFC, 0x44, 0x01, 0x51, 0xCD, 0x7F,
+0x6F, 0x7E, 0x00, 0x12, 0x5F, 0xA6, 0xBF, 0x01,
+0x08, 0x90, 0x99, 0xF8, 0xE0, 0x90, 0x9A, 0x07,
+0xF0, 0x90, 0x00, 0x35, 0xE0, 0x54, 0xFC, 0xF0,
+0x90, 0x99, 0xB1, 0xE0, 0xB4, 0x01, 0x16, 0x7B,
+0x01, 0x7A, 0x99, 0x79, 0xB2, 0x12, 0xF9, 0xC3,
+0x7B, 0x01, 0x7A, 0x99, 0x79, 0xD5, 0x11, 0x35,
+0x7F, 0x04, 0x02, 0x04, 0x7E, 0x75, 0x45, 0x01,
+0x75, 0x46, 0x99, 0x75, 0x47, 0xB2, 0x75, 0x48,
+0x0A, 0x7B, 0x01, 0x7A, 0x01, 0x79, 0xA0, 0x12,
+0xFB, 0x0B, 0x75, 0x46, 0x99, 0x75, 0x47, 0xD7,
+0x75, 0x48, 0x05, 0x7B, 0x01, 0x7A, 0x01, 0x79,
+0xAA, 0x12, 0x69, 0xF5, 0x90, 0x9A, 0x07, 0xE0,
+0x90, 0x01, 0xA1, 0xF0, 0x22, 0xF0, 0x7B, 0x01,
+0x7A, 0x99, 0x79, 0xF8, 0x22, 0x7E, 0x00, 0x7F,
+0x62, 0x7D, 0x00, 0x7B, 0x01, 0x7A, 0x88, 0x79,
+0x31, 0x12, 0x04, 0x80, 0x12, 0xFA, 0x95, 0x12,
+0x04, 0x80, 0xE4, 0x90, 0x99, 0xAF, 0xF0, 0x90,
+0x88, 0x35, 0x74, 0x02, 0xF0, 0x90, 0x88, 0x3C,
+0x14, 0xF0, 0xA3, 0xF0, 0xA3, 0x74, 0x50, 0xF0,
+0x90, 0x88, 0x42, 0xE4, 0xF0, 0xA3, 0x74, 0x02,
+0xF0, 0x90, 0x88, 0x4E, 0x74, 0x10, 0xF0, 0xA3,
+0x74, 0x50, 0xF0, 0x12, 0xF8, 0xA6, 0x90, 0x8A,
+0x89, 0x11, 0x47, 0x91, 0x98, 0x90, 0x8A, 0x89,
+0x11, 0x47, 0x7D, 0x0C, 0x7F, 0x02, 0x12, 0x04,
+0x7E, 0x90, 0x8A, 0x89, 0x11, 0x47, 0x7D, 0x0C,
+0x7F, 0x01, 0x12, 0x04, 0x7E, 0x90, 0x86, 0xB3,
+0xE0, 0xFF, 0xB4, 0x01, 0x08, 0x90, 0x88, 0x41,
+0x74, 0xD4, 0xF0, 0x80, 0x11, 0xEF, 0xB4, 0x03,
+0x08, 0x90, 0x88, 0x41, 0x74, 0x14, 0xF0, 0x80,
+0x05, 0xE4, 0x90, 0x88, 0x41, 0xF0, 0x90, 0x00,
+0x79, 0xE0, 0x54, 0x03, 0xFF, 0xBF, 0x02, 0x0D,
+0x90, 0x00, 0x28, 0xE0, 0x30, 0xE2, 0x06, 0x90,
+0x88, 0x53, 0x74, 0x02, 0xF0, 0x90, 0x88, 0x93,
+0x74, 0x03, 0xF0, 0xA3, 0x74, 0x0F, 0xF0, 0xA3,
+0xE0, 0x54, 0x01, 0x44, 0x28, 0xF0, 0xA3, 0x74,
+0x07, 0xF0, 0x7E, 0x00, 0x7F, 0x18, 0x7D, 0x00,
+0x7B, 0x01, 0x7A, 0x93, 0x79, 0x0C, 0x12, 0x04,
+0x80, 0x90, 0x8A, 0xA3, 0x11, 0x47, 0x7F, 0x01,
+0x12, 0x04, 0x7E, 0x90, 0x05, 0x58, 0x74, 0x02,
+0xF0, 0x7E, 0x00, 0xFF, 0x7D, 0x00, 0x7B, 0x01,
+0x7A, 0x88, 0x79, 0x9A, 0x12, 0x04, 0x80, 0x90,
+0x06, 0x04, 0xE0, 0x54, 0x7F, 0xF0, 0x90, 0x06,
+0x0A, 0xE0, 0x54, 0xF8, 0xF0, 0x90, 0x05, 0x22,
+0xE4, 0xF0, 0x90, 0x88, 0x9C, 0xF0, 0x22, 0x7F,
+0xFB, 0x7E, 0x01, 0x12, 0x5F, 0xA6, 0xEF, 0x22,
+0x90, 0x99, 0xAF, 0x74, 0x01, 0xF0, 0x90, 0x06,
+0x92, 0x04, 0xF0, 0x90, 0x01, 0x3C, 0x74, 0x04,
+0xF0, 0x90, 0x88, 0x31, 0xE0, 0x44, 0x08, 0xF0,
+0x90, 0x88, 0x39, 0xE0, 0x64, 0x0C, 0x60, 0x13,
+0x90, 0x8A, 0xB9, 0x11, 0x47, 0xE4, 0xFD, 0x7F,
+0x0C, 0x12, 0x04, 0x7E, 0x90, 0x8A, 0xF9, 0x11,
+0x47, 0x91, 0x98, 0x90, 0x8A, 0xAF, 0x11, 0x47,
+0x7D, 0x08, 0xE4, 0xFF, 0x02, 0x04, 0x7E, 0xE4,
+0x90, 0x9A, 0x35, 0xF0, 0x90, 0x9B, 0x89, 0x04,
+0xF0, 0x90, 0x06, 0x32, 0xE0, 0x44, 0x04, 0xF0,
+0x90, 0x98, 0x31, 0x12, 0x04, 0xB8, 0xEF, 0x24,
+0x01, 0x12, 0xB7, 0xEA, 0x90, 0x98, 0x31, 0x12,
+0x04, 0x31, 0x12, 0xD3, 0x57, 0xE4, 0x90, 0x9B,
+0x0A, 0xF0, 0xFF, 0x12, 0xF4, 0xE3, 0xF1, 0xE0,
+0x70, 0x48, 0x90, 0x8A, 0xB9, 0x11, 0x47, 0x7D,
+0x01, 0x7F, 0x02, 0x12, 0x04, 0x7E, 0x7F, 0x05,
+0x7E, 0x00, 0x12, 0x7A, 0xAE, 0x12, 0xFB, 0x2F,
+0x90, 0x8A, 0x89, 0x11, 0x47, 0x12, 0xFB, 0x6E,
+0x90, 0x88, 0x39, 0xE0, 0x64, 0x02, 0x60, 0x22,
+0x90, 0x9A, 0x35, 0xE0, 0x04, 0xF0, 0x7F, 0x01,
+0x7E, 0x00, 0x12, 0x7A, 0xAE, 0x90, 0x8A, 0xB9,
 0x11, 0x47, 0x7D, 0x01, 0x7F, 0x02, 0x12, 0x04,
-0x7E, 0x7F, 0x05, 0x7E, 0x00, 0x12, 0x7A, 0xAE,
-0x12, 0xFA, 0xD8, 0x90, 0x8A, 0x89, 0x11, 0x47,
-0x12, 0xFB, 0x28, 0x90, 0x88, 0x39, 0xE0, 0x64,
-0x02, 0x60, 0x22, 0x90, 0x9A, 0x35, 0xE0, 0x04,
-0xF0, 0x7F, 0x01, 0x7E, 0x00, 0x12, 0x7A, 0xAE,
-0x90, 0x8A, 0xB9, 0x11, 0x47, 0x7D, 0x01, 0x7F,
-0x02, 0x12, 0x04, 0x7E, 0x90, 0x9A, 0x35, 0xE0,
-0xD3, 0x94, 0x0A, 0x40, 0xD6, 0x90, 0x9C, 0x9B,
-0x12, 0x04, 0x3D, 0x00, 0x00, 0x00, 0x0A, 0xF1,
-0xE5, 0xA1, 0x06, 0xE4, 0xFD, 0xFF, 0x02, 0x04,
-0x7E, 0x12, 0xE3, 0xCF, 0x90, 0x9B, 0x04, 0xEF,
-0xF0, 0x90, 0x8A, 0x89, 0x30, 0xE0, 0x12, 0x11,
-0x47, 0x7D, 0x01, 0xE4, 0xFF, 0x12, 0x04, 0x7E,
-0x90, 0x88, 0x33, 0xE0, 0x44, 0x04, 0xF0, 0x80,
-0x04, 0x11, 0x47, 0x91, 0x73, 0x90, 0x9B, 0x04,
-0xE0, 0x30, 0xE6, 0x11, 0x90, 0x01, 0x2F, 0xE0,
-0x30, 0xE7, 0x04, 0xE4, 0xF0, 0x80, 0x06, 0x90,
-0x01, 0x2F, 0x74, 0x80, 0xF0, 0x12, 0xF8, 0x08,
-0x74, 0x02, 0xF0, 0x02, 0x6E, 0x2F, 0xE0, 0xC4,
-0x54, 0xF0, 0x24, 0x05, 0xF5, 0x82, 0xE4, 0x34,
-0x81, 0xF5, 0x83, 0xE0, 0x22, 0x90, 0x88, 0x36,
-0xE0, 0x64, 0x01, 0x70, 0x29, 0x12, 0xD4, 0x1E,
-0x60, 0x12, 0x90, 0x8A, 0xB9, 0x11, 0x47, 0xE4,
-0xFD, 0x7F, 0x0C, 0x12, 0x04, 0x7E, 0x12, 0xD4,
-0x97, 0x02, 0x04, 0x7A, 0x90, 0x88, 0x39, 0xE0,
-0x70, 0x0C, 0x90, 0x8A, 0xB9, 0x11, 0x47, 0x7D,
-0x01, 0x7F, 0x04, 0x12, 0x04, 0x7E, 0x22, 0xE4,
-0x90, 0x9C, 0x9F, 0xF0, 0x7F, 0x03, 0xD3, 0x10,
-0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0x90, 0x9C, 0x9A,
-0xEF, 0xF0, 0x12, 0xC2, 0x81, 0x90, 0x9C, 0x9A,
-0xE0, 0xFF, 0x12, 0xC2, 0x92, 0x74, 0x01, 0xF0,
-0x90, 0x9C, 0x9F, 0xE0, 0xFE, 0xEF, 0xF1, 0xF6,
-0xEE, 0xF0, 0x90, 0x9C, 0x9A, 0xE0, 0xB1, 0x6C,
-0x12, 0x04, 0x3D, 0x00, 0x00, 0x00, 0x01, 0xB1,
-0x61, 0x78, 0x10, 0x12, 0x03, 0xEB, 0xAB, 0x07,
-0xB1, 0x61, 0x78, 0x08, 0x12, 0x03, 0xEB, 0x90,
-0x92, 0x20, 0xEF, 0xF0, 0xB1, 0x61, 0x90, 0x92,
-0x21, 0xEF, 0xF0, 0x7D, 0x01, 0x7F, 0x50, 0x7E,
-0x01, 0x12, 0x66, 0x33, 0xD0, 0xD0, 0x92, 0xAF,
-0x22, 0x90, 0x9C, 0x9B, 0x02, 0x04, 0xB8, 0x90,
-0x9A, 0x34, 0xE0, 0xFB, 0x75, 0xF0, 0x0A, 0xA4,
-0x24, 0x8A, 0xF5, 0x82, 0xE4, 0x34, 0x9B, 0xF5,
-0x83, 0x22, 0xE4, 0x90, 0x9A, 0x34, 0xF0, 0x90,
-0x9A, 0x34, 0xE0, 0xFF, 0xC3, 0x94, 0x08, 0x40,
-0x02, 0xC1, 0x0F, 0x12, 0xC2, 0x91, 0xE0, 0x64,
-0x01, 0x70, 0x74, 0x90, 0x9A, 0x34, 0xE0, 0xB1,
-0x6C, 0x12, 0x04, 0xB8, 0xE4, 0x7B, 0x01, 0xF1,
-0x18, 0x70, 0x3A, 0x90, 0x9A, 0x34, 0xE0, 0xFB,
-0xF1, 0xF6, 0xE0, 0x60, 0x21, 0x14, 0x70, 0x57,
-0xEB, 0x75, 0xF0, 0x0A, 0xA4, 0x24, 0x8E, 0xF5,
-0x82, 0xE4, 0x34, 0x9B, 0xF5, 0x83, 0x12, 0x04,
-0xB8, 0xEB, 0xB1, 0x6C, 0x12, 0x04, 0x31, 0x90,
-0x9A, 0x34, 0xE0, 0xFF, 0x80, 0x0B, 0xB1, 0x67,
-0x12, 0x04, 0x3D, 0x00, 0x00, 0x00, 0x00, 0xAF,
-0x03, 0xF1, 0x1F, 0x80, 0x2A, 0x90, 0x9A, 0x34,
-0xE0, 0xB1, 0x6C, 0x12, 0x04, 0xB8, 0xE4, 0xFB,
-0xF1, 0x18, 0x50, 0x1B, 0xB1, 0x67, 0x12, 0x04,
-0xB8, 0xEF, 0x24, 0xFF, 0xFF, 0xEE, 0x34, 0xFF,
-0xFE, 0xED, 0x34, 0xFF, 0xFD, 0xEC, 0x34, 0xFF,
-0xFC, 0xEB, 0xB1, 0x6C, 0x12, 0x04, 0x31, 0x90,
-0x9A, 0x34, 0xE0, 0x04, 0xF0, 0xA1, 0x7F, 0x22,
-0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0x90,
-0x9B, 0x1D, 0xE0, 0xFF, 0x12, 0xF4, 0x05, 0xEF,
-0x70, 0x02, 0xC1, 0xCC, 0x90, 0x9B, 0x1E, 0xE0,
-0xFB, 0xD3, 0x94, 0x00, 0x40, 0x1A, 0x90, 0x9C,
-0x2F, 0x12, 0x04, 0x3D, 0x00, 0x00, 0x00, 0x0F,
-0xAF, 0x03, 0xE4, 0xFC, 0xFD, 0xFE, 0x12, 0xCC,
-0x53, 0x7F, 0x08, 0x7E, 0x0E, 0x12, 0xC9, 0xBA,
-0x90, 0x9B, 0x1D, 0xE0, 0xFF, 0x90, 0x06, 0x33,
-0xF0, 0x12, 0xFA, 0xCF, 0xE4, 0xFB, 0xFD, 0x12,
-0xAE, 0xB8, 0x90, 0x9B, 0x20, 0xE0, 0x60, 0x07,
-0x90, 0x93, 0x05, 0xE0, 0xFF, 0xF1, 0x2C, 0x12,
-0xCF, 0xD8, 0x30, 0xE0, 0x3A, 0x90, 0x95, 0xEA,
-0xE0, 0x60, 0x34, 0xE4, 0x90, 0x9A, 0x36, 0xF0,
-0x90, 0x95, 0xEA, 0xE0, 0xFF, 0x90, 0x9A, 0x36,
-0xE0, 0xC3, 0x9F, 0x50, 0x22, 0x7F, 0x03, 0x7E,
-0x00, 0x12, 0x7A, 0xAE, 0x90, 0x9A, 0x36, 0xE0,
-0x24, 0x29, 0x12, 0xBF, 0xDB, 0xE0, 0xFF, 0xF1,
-0x2C, 0x90, 0x01, 0xA6, 0xE0, 0x04, 0xF0, 0x90,
-0x9A, 0x36, 0xE0, 0x04, 0xF0, 0x80, 0xD1, 0x90,
-0x9B, 0x1F, 0xE0, 0x90, 0x9A, 0x35, 0xF0, 0x90,
-0x9B, 0x0A, 0xE0, 0x04, 0xF0, 0xE0, 0xFF, 0x12,
-0xF3, 0xCF, 0x90, 0x9A, 0x35, 0x12, 0xAE, 0xA3,
-0x90, 0x9C, 0x9B, 0x12, 0x04, 0x31, 0xF1, 0xE5,
-0xB1, 0x06, 0x80, 0x47, 0xE4, 0x90, 0x9B, 0x0A,
-0xF0, 0x90, 0x9B, 0x89, 0xF0, 0x90, 0x06, 0x32,
-0xE0, 0x54, 0xFB, 0xF0, 0x12, 0xCB, 0xE2, 0xE4,
-0xFF, 0x12, 0x78, 0x4A, 0xBF, 0x01, 0x12, 0x90,
-0x9B, 0x22, 0xE0, 0xFD, 0x90, 0x8A, 0x89, 0x11,
-0x47, 0x7F, 0x02, 0x12, 0x04, 0x7E, 0x12, 0x7B,
-0xAD, 0x90, 0x9A, 0x37, 0x74, 0x07, 0xF0, 0x90,
-0x9A, 0x59, 0xF0, 0x7B, 0x01, 0x7A, 0x9A, 0x79,
-0x37, 0x11, 0x35, 0x7F, 0x04, 0x12, 0x04, 0x7E,
-0x12, 0xAB, 0xEC, 0xD0, 0xD0, 0x92, 0xAF, 0x22,
-0xFA, 0xF9, 0xF8, 0xC3, 0x02, 0x03, 0xDA, 0xEF,
-0x24, 0xFC, 0x60, 0x05, 0x04, 0x70, 0x04, 0x61,
-0xEA, 0xD1, 0x10, 0x22, 0xD3, 0x10, 0xAF, 0x01,
-0xC3, 0xC0, 0xD0, 0x90, 0x9A, 0x5A, 0xEF, 0xF0,
-0x12, 0x76, 0x9B, 0xBF, 0x01, 0x27, 0x90, 0x06,
-0x32, 0xE0, 0x44, 0x08, 0xF0, 0x90, 0x9A, 0x5A,
-0xE0, 0xFF, 0x90, 0x92, 0x13, 0x74, 0x07, 0xF0,
-0x7B, 0x18, 0x7D, 0x01, 0x12, 0x66, 0xDB, 0x90,
-0x9A, 0x5B, 0xEE, 0xF0, 0xA3, 0xEF, 0xF0, 0x90,
-0x04, 0x1F, 0x74, 0x20, 0xF0, 0xD0, 0xD0, 0x92,
-0xAF, 0x22, 0xE4, 0xF5, 0x0F, 0x90, 0x88, 0x36,
-0xE0, 0x60, 0x58, 0xF1, 0xED, 0x70, 0x54, 0x12,
-0xF8, 0xC4, 0x75, 0x0F, 0x01, 0xE5, 0x0F, 0x60,
-0x4A, 0x90, 0x88, 0x39, 0xE0, 0x20, 0xE2, 0x0C,
-0x90, 0x8A, 0xB9, 0x11, 0x47, 0x7D, 0x01, 0x7F,
-0x04, 0x12, 0x04, 0x7E, 0x12, 0xD7, 0x58, 0x90,
-0x88, 0x3F, 0xE0, 0x60, 0x04, 0x64, 0x01, 0x70,
-0x11, 0xE4, 0x90, 0x92, 0x20, 0xF0, 0xF1, 0xDB,
-0xFF, 0xA3, 0xE0, 0xF1, 0xCC, 0xFF, 0xA3, 0xE0,
-0x80, 0x0F, 0xE4, 0x90, 0x92, 0x20, 0xF0, 0xF1,
-0xDB, 0x12, 0xF8, 0x60, 0xF1, 0xCC, 0x12, 0xF8,
-0x60, 0x2F, 0x33, 0x33, 0x33, 0x54, 0xF8, 0x90,
-0x88, 0x4F, 0xF0, 0x22, 0x2F, 0x90, 0x92, 0x21,
-0xF0, 0xE4, 0xFB, 0xFD, 0x7F, 0x54, 0x7E, 0x01,
-0x12, 0x66, 0x33, 0x90, 0x88, 0x3E, 0xE0, 0x13,
-0x13, 0x13, 0x54, 0x1F, 0x22, 0xE4, 0x90, 0x9C,
-0x9F, 0xF0, 0x7F, 0x04, 0x22, 0xE4, 0xFF, 0x12,
-0x78, 0x4A, 0xEF, 0x64, 0x01, 0x22, 0x75, 0xF0,
-0x0A, 0xA4, 0x24, 0x92, 0xF5, 0x82, 0xE4, 0x34,
-0x9B, 0xF5, 0x83, 0x22, 0x12, 0x02, 0x06, 0xFF,
-0x90, 0x93, 0x03, 0xF0, 0xBF, 0x01, 0x07, 0x11,
-0xF6, 0xE4, 0x90, 0x93, 0x03, 0xF0, 0x22, 0x90,
-0x9C, 0xAC, 0x12, 0x82, 0x27, 0x90, 0x9C, 0xAB,
-0xEF, 0xF0, 0x12, 0x82, 0x30, 0x98, 0x71, 0x00,
-0x98, 0x76, 0x01, 0x98, 0x7B, 0x03, 0x98, 0x80,
-0x04, 0x98, 0x85, 0x06, 0x98, 0x95, 0x12, 0x98,
-0x99, 0x14, 0x98, 0x9D, 0x1E, 0x98, 0xA1, 0x20,
-0x98, 0xA6, 0x25, 0x98, 0xAB, 0x27, 0x98, 0xB0,
-0x29, 0x98, 0xB5, 0x2A, 0x98, 0xBE, 0x80, 0x98,
-0xBA, 0x81, 0x98, 0xC3, 0x82, 0x98, 0xC7, 0x83,
-0x98, 0xCC, 0x84, 0x98, 0xD6, 0x86, 0x98, 0xD1,
-0x88, 0x98, 0xDB, 0xC3, 0x98, 0x89, 0xC6, 0x98,
-0x89, 0xC7, 0x98, 0x89, 0xC8, 0x00, 0x00, 0x98,
-0xE0, 0x11, 0xF0, 0x02, 0x87, 0x64, 0x11, 0xF0,
-0x02, 0x87, 0xFA, 0x11, 0xF0, 0x02, 0xE7, 0x14,
-0x11, 0xF0, 0x02, 0xD6, 0xF9, 0x11, 0xF0, 0x41,
-0x89, 0x90, 0x9C, 0xAB, 0xE0, 0xFF, 0xA3, 0x12,
-0x82, 0x1E, 0x02, 0xB8, 0x92, 0x11, 0xF0, 0x01,
-0x04, 0x11, 0xF0, 0xE1, 0xF7, 0x11, 0xF0, 0x41,
-0x36, 0x11, 0xF0, 0x02, 0xA0, 0x06, 0x11, 0xF0,
-0x02, 0xA7, 0xF8, 0x11, 0xF0, 0x02, 0xA8, 0x00,
-0x11, 0xF0, 0x02, 0xB7, 0xF6, 0x11, 0xF0, 0x02,
-0xAF, 0xF5, 0x11, 0xF0, 0x61, 0x19, 0x11, 0xF0,
-0x02, 0xE7, 0x9B, 0x11, 0xF0, 0xE1, 0xE9, 0x11,
-0xF0, 0x02, 0xF2, 0x54, 0x11, 0xF0, 0x02, 0x87,
-0xAA, 0x11, 0xF0, 0x02, 0xF2, 0x91, 0x11, 0xF0,
-0x02, 0xF2, 0xEA, 0x11, 0xF0, 0x02, 0xB8, 0x0C,
-0x90, 0x01, 0xC0, 0xE0, 0x44, 0x01, 0xF0, 0x90,
-0x9C, 0xAB, 0xE0, 0x90, 0x01, 0xC2, 0xF0, 0x22,
-0x90, 0x9C, 0xAC, 0x02, 0x82, 0x1E, 0x31, 0xA3,
-0x7F, 0xEF, 0x7E, 0x01, 0x12, 0x5F, 0xA6, 0xBF,
-0x01, 0x06, 0x90, 0x99, 0xB1, 0xE0, 0xA3, 0xF0,
-0x31, 0xA3, 0x7F, 0xEE, 0x7E, 0x01, 0x12, 0x5F,
-0xA6, 0xBF, 0x01, 0x08, 0x90, 0x99, 0xB1, 0xE0,
-0x90, 0x99, 0xB3, 0xF0, 0x31, 0xA3, 0x7F, 0xED,
-0x7E, 0x01, 0x12, 0x5F, 0xA6, 0xBF, 0x01, 0x08,
-0x90, 0x99, 0xB1, 0xE0, 0x90, 0x99, 0xB4, 0xF0,
-0x31, 0xA3, 0x7F, 0xEC, 0x7E, 0x01, 0x12, 0x5F,
-0xA6, 0xBF, 0x01, 0x08, 0x90, 0x99, 0xB1, 0xE0,
-0x90, 0x99, 0xB5, 0xF0, 0x31, 0xA3, 0x7F, 0xEB,
-0x7E, 0x01, 0x12, 0x5F, 0xA6, 0xBF, 0x01, 0x08,
-0x90, 0x99, 0xB1, 0xE0, 0x90, 0x99, 0xB6, 0xF0,
-0x90, 0x99, 0xB2, 0xE0, 0xFF, 0xA3, 0xE0, 0xFD,
-0xA3, 0xE0, 0xFB, 0xA3, 0xE0, 0x90, 0x99, 0xBA,
-0xF0, 0x90, 0x99, 0xB6, 0xE0, 0x90, 0x99, 0xBB,
-0xF0, 0x90, 0x99, 0xBC, 0x74, 0x12, 0xF0, 0x90,
-0x99, 0xDE, 0x74, 0x05, 0xF0, 0x90, 0x99, 0xBE,
-0xEF, 0x12, 0xBF, 0xD3, 0x90, 0x99, 0xBA, 0xE0,
-0x90, 0x99, 0xC1, 0xF0, 0x90, 0x99, 0xBB, 0xE0,
-0x90, 0x99, 0xC2, 0xF0, 0x7B, 0x01, 0x7A, 0x99,
-0x79, 0xBC, 0x12, 0x90, 0x35, 0x7F, 0x04, 0x02,
-0x04, 0x7E, 0xF0, 0x7B, 0x01, 0x7A, 0x99, 0x79,
-0xB1, 0x22, 0x7E, 0x00, 0x7F, 0x0B, 0x7D, 0x00,
-0x7B, 0x01, 0x7A, 0x98, 0x79, 0x59, 0x12, 0x04,
-0x80, 0x31, 0xA3, 0x12, 0xFB, 0x56, 0xBF, 0x01,
-0x1C, 0x90, 0x99, 0xB1, 0xE0, 0xFE, 0x54, 0x01,
-0x90, 0x98, 0x59, 0xF0, 0xEE, 0x54, 0x04, 0x90,
-0x98, 0x5B, 0xF0, 0x90, 0x99, 0xB1, 0xE0, 0x54,
-0x08, 0x90, 0x98, 0x5A, 0xF0, 0x31, 0xA3, 0x12,
-0x93, 0xA2, 0x64, 0x01, 0x70, 0x35, 0x90, 0x99,
-0xB1, 0xE0, 0x54, 0x07, 0x70, 0x15, 0x7B, 0x01,
-0x7A, 0x99, 0x79, 0xB2, 0x7F, 0xFA, 0x7E, 0x01,
-0x12, 0x5F, 0xA6, 0xBF, 0x01, 0x0F, 0x90, 0x99,
-0xB2, 0x80, 0x03, 0x90, 0x99, 0xB1, 0xE0, 0x54,
-0x07, 0x90, 0x98, 0x5D, 0xF0, 0x90, 0x99, 0xB1,
-0xE0, 0x54, 0xE0, 0xC4, 0x13, 0x54, 0x07, 0x90,
-0x98, 0x5C, 0xF0, 0x31, 0xA3, 0x7F, 0xFD, 0x7E,
-0x01, 0x12, 0x5F, 0xA6, 0xBF, 0x01, 0x0E, 0x90,
-0x99, 0xB1, 0xE0, 0x54, 0x0C, 0x13, 0x13, 0x54,
-0x3F, 0x90, 0x98, 0x5E, 0xF0, 0x22, 0x12, 0x02,
-0x06, 0x90, 0x99, 0xD4, 0xF0, 0x91, 0x54, 0x90,
-0x99, 0xD5, 0xF0, 0x60, 0x0F, 0x51, 0x81, 0x12,
-0xB8, 0x27, 0x90, 0x99, 0xD5, 0x51, 0x81, 0x7B,
-0x57, 0x12, 0x8D, 0x1E, 0x90, 0x99, 0xB1, 0x74,
-0x20, 0xF0, 0x90, 0x99, 0xD3, 0x74, 0x03, 0xF0,
-0x90, 0x05, 0x22, 0xE0, 0x90, 0x99, 0xB3, 0xF0,
-0x90, 0x98, 0x6A, 0xE0, 0x90, 0x99, 0xB4, 0xF0,
-0x90, 0x98, 0x6B, 0xE0, 0x90, 0x99, 0xB5, 0x31,
-0xA2, 0x12, 0x90, 0x35, 0x7F, 0x04, 0x02, 0x04,
-0x7E, 0xE0, 0xFF, 0x90, 0x99, 0xD4, 0xE0, 0xFD,
-0x22, 0x12, 0x02, 0x06, 0x64, 0x01, 0x60, 0x02,
-0x61, 0x18, 0x90, 0x99, 0xF8, 0xF0, 0x90, 0x99,
-0xF8, 0xE0, 0xFF, 0xC3, 0x94, 0x10, 0x50, 0x28,
-0xEF, 0x12, 0xFA, 0x98, 0x7A, 0x99, 0x79, 0xF7,
-0x12, 0x5F, 0xA6, 0xBF, 0x01, 0x12, 0x90, 0x99,
-0xF7, 0xE0, 0xFF, 0xA3, 0xE0, 0x24, 0xF9, 0xF5,
-0x82, 0xE4, 0x34, 0x99, 0xF5, 0x83, 0xEF, 0xF0,
-0x90, 0x99, 0xF8, 0xE0, 0x04, 0xF0, 0x80, 0xCE,
-0x75, 0x45, 0x01, 0x75, 0x46, 0x99, 0x75, 0x47,
-0xF9, 0x75, 0x48, 0x08, 0x7B, 0x01, 0x7A, 0x99,
-0x79, 0xB3, 0x12, 0x8F, 0x63, 0x74, 0x24, 0xF0,
-0x90, 0x99, 0xD3, 0x74, 0x08, 0xF0, 0x75, 0x45,
-0x01, 0x75, 0x46, 0x9A, 0x75, 0x47, 0x01, 0xF5,
-0x48, 0x7B, 0x01, 0x7A, 0x99, 0x79, 0xD6, 0x12,
-0x69, 0xF5, 0x90, 0x99, 0xD4, 0x74, 0x25, 0xF0,
-0x90, 0x99, 0xF6, 0x74, 0x08, 0x31, 0xA2, 0x12,
-0xD7, 0xA6, 0x7B, 0x01, 0x7A, 0x99, 0x79, 0xD4,
-0x12, 0x90, 0x35, 0x7F, 0x04, 0x12, 0x04, 0x7E,
+0x7E, 0x90, 0x9A, 0x35, 0xE0, 0xD3, 0x94, 0x0A,
+0x40, 0xD6, 0x90, 0x9C, 0x9B, 0x12, 0x04, 0x3D,
+0x00, 0x00, 0x00, 0x0A, 0xF1, 0xD8, 0xA1, 0x37,
+0xE4, 0xFD, 0xFF, 0x02, 0x04, 0x7E, 0x12, 0xE2,
+0xE3, 0x90, 0x9B, 0x04, 0xEF, 0xF0, 0x20, 0xE0,
+0x06, 0x90, 0x01, 0x3D, 0x74, 0x01, 0xF0, 0x90,
+0x9B, 0x04, 0xE0, 0x90, 0x8A, 0x89, 0x30, 0xE0,
+0x12, 0x11, 0x47, 0x7D, 0x01, 0xE4, 0xFF, 0x12,
+0x04, 0x7E, 0x90, 0x88, 0x33, 0xE0, 0x44, 0x04,
+0xF0, 0x80, 0x04, 0x11, 0x47, 0x91, 0x98, 0x90,
+0x9B, 0x04, 0xE0, 0x30, 0xE6, 0x11, 0x90, 0x01,
+0x2F, 0xE0, 0x30, 0xE7, 0x04, 0xE4, 0xF0, 0x80,
+0x06, 0x90, 0x01, 0x2F, 0x74, 0x80, 0xF0, 0x12,
+0xF9, 0xB2, 0x74, 0x02, 0xF0, 0x02, 0x6E, 0x2F,
+0xE0, 0xC4, 0x54, 0xF0, 0x24, 0x05, 0xF5, 0x82,
+0xE4, 0x34, 0x81, 0xF5, 0x83, 0xE0, 0x22, 0x90,
+0x88, 0x36, 0xE0, 0x64, 0x01, 0x70, 0x28, 0xF1,
+0xF3, 0x60, 0x12, 0x90, 0x8A, 0xB9, 0x11, 0x47,
+0xE4, 0xFD, 0x7F, 0x0C, 0x12, 0x04, 0x7E, 0x12,
+0xDC, 0xD4, 0x02, 0x04, 0x7A, 0x90, 0x88, 0x39,
+0xE0, 0x70, 0x0C, 0x90, 0x8A, 0xB9, 0x11, 0x47,
+0x7D, 0x01, 0x7F, 0x04, 0x12, 0x04, 0x7E, 0x22,
+0xE4, 0x90, 0x9C, 0x9F, 0xF0, 0x7F, 0x03, 0xD3,
+0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0x90, 0x9C,
+0x9A, 0xEF, 0xF0, 0x12, 0xA0, 0x03, 0x90, 0x9C,
+0x9A, 0xE0, 0xFF, 0x12, 0xF9, 0x88, 0x74, 0x01,
+0xF0, 0x90, 0x9C, 0x9F, 0xE0, 0xFE, 0xEF, 0xF1,
+0xFA, 0xEE, 0xF0, 0x90, 0x9C, 0x9A, 0xE0, 0xB1,
+0x9D, 0x12, 0x04, 0x3D, 0x00, 0x00, 0x00, 0x01,
+0xB1, 0x92, 0x78, 0x10, 0x12, 0x03, 0xEB, 0xAB,
+0x07, 0xB1, 0x92, 0x78, 0x08, 0x12, 0x03, 0xEB,
+0x90, 0x92, 0x20, 0xEF, 0xF0, 0xB1, 0x92, 0x90,
+0x92, 0x21, 0xEF, 0xF0, 0x7D, 0x01, 0x7F, 0x50,
+0x7E, 0x01, 0x12, 0x66, 0x33, 0xD0, 0xD0, 0x92,
+0xAF, 0x22, 0x90, 0x9C, 0x9B, 0x02, 0x04, 0xB8,
+0x90, 0x9A, 0x34, 0xE0, 0xFB, 0x75, 0xF0, 0x0A,
+0xA4, 0x24, 0x8A, 0xF5, 0x82, 0xE4, 0x34, 0x9B,
+0xF5, 0x83, 0x22, 0xE4, 0x90, 0x9A, 0x34, 0xF0,
+0x90, 0x9A, 0x34, 0xE0, 0xFF, 0xC3, 0x94, 0x08,
+0x40, 0x02, 0xC1, 0x40, 0x12, 0xF9, 0x87, 0xE0,
+0x64, 0x01, 0x70, 0x74, 0x90, 0x9A, 0x34, 0xE0,
+0xB1, 0x9D, 0x12, 0x04, 0xB8, 0xE4, 0x7B, 0x01,
+0xF1, 0x4B, 0x70, 0x3A, 0x90, 0x9A, 0x34, 0xE0,
+0xFB, 0xF1, 0xFA, 0xE0, 0x60, 0x21, 0x14, 0x70,
+0x57, 0xEB, 0x75, 0xF0, 0x0A, 0xA4, 0x24, 0x8E,
+0xF5, 0x82, 0xE4, 0x34, 0x9B, 0xF5, 0x83, 0x12,
+0x04, 0xB8, 0xEB, 0xB1, 0x9D, 0x12, 0x04, 0x31,
+0x90, 0x9A, 0x34, 0xE0, 0xFF, 0x80, 0x0B, 0xB1,
+0x98, 0x12, 0x04, 0x3D, 0x00, 0x00, 0x00, 0x00,
+0xAF, 0x03, 0xF1, 0x52, 0x80, 0x2A, 0x90, 0x9A,
+0x34, 0xE0, 0xB1, 0x9D, 0x12, 0x04, 0xB8, 0xE4,
+0xFB, 0xF1, 0x4B, 0x50, 0x1B, 0xB1, 0x98, 0x12,
+0x04, 0xB8, 0xEF, 0x24, 0xFF, 0xFF, 0xEE, 0x34,
+0xFF, 0xFE, 0xED, 0x34, 0xFF, 0xFD, 0xEC, 0x34,
+0xFF, 0xFC, 0xEB, 0xB1, 0x9D, 0x12, 0x04, 0x31,
+0x90, 0x9A, 0x34, 0xE0, 0x04, 0xF0, 0xA1, 0xB0,
 0x22, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0,
-0x12, 0x02, 0x06, 0xFF, 0x54, 0x01, 0xFE, 0x90,
-0x93, 0x24, 0x12, 0xF3, 0xB8, 0xFD, 0xEF, 0x54,
-0xFB, 0x4D, 0xFF, 0x90, 0x93, 0x24, 0xF1, 0xDB,
-0x12, 0xFA, 0xA2, 0xFF, 0x90, 0x93, 0x24, 0x12,
-0xFA, 0xEA, 0xF1, 0xE3, 0x12, 0xFA, 0xAB, 0xFF,
-0x90, 0x93, 0x24, 0x12, 0xFA, 0x84, 0x12, 0x87,
-0xE6, 0xFF, 0x54, 0x01, 0xFE, 0x90, 0x93, 0x26,
-0xE0, 0x54, 0xFE, 0x4E, 0xF0, 0x91, 0x54, 0xFE,
-0x54, 0x01, 0xFD, 0x90, 0x93, 0x25, 0xE0, 0x54,
-0xFE, 0x4D, 0xFD, 0xF0, 0xEE, 0x54, 0x04, 0xFE,
-0xED, 0x54, 0xFB, 0x4E, 0xFE, 0xF0, 0x91, 0x54,
-0xFD, 0x54, 0x08, 0xFC, 0xEE, 0x54, 0xF7, 0x4C,
-0xFE, 0x90, 0x93, 0x25, 0xF0, 0xED, 0x54, 0x10,
-0xFD, 0xEE, 0x54, 0xEF, 0x4D, 0xFE, 0xF0, 0x91,
-0x54, 0xFD, 0x54, 0x20, 0xFC, 0xEE, 0x54, 0xDF,
-0x4C, 0x90, 0x93, 0x25, 0xF0, 0xEF, 0x54, 0x10,
-0xFF, 0xA3, 0xE0, 0x54, 0xEF, 0x4F, 0xFF, 0x12,
-0x87, 0xE6, 0xFE, 0x54, 0x20, 0xFC, 0xEF, 0x54,
-0xDF, 0x4C, 0x90, 0x93, 0x26, 0xF0, 0xED, 0x54,
-0x40, 0xFF, 0x90, 0x93, 0x25, 0xE0, 0x54, 0xBF,
-0x12, 0x87, 0xA2, 0x54, 0x07, 0xFF, 0x90, 0x93,
-0x27, 0xE0, 0x54, 0xF8, 0x4F, 0xF0, 0xEE, 0x54,
-0x40, 0xFF, 0x90, 0x93, 0x26, 0xE0, 0x54, 0xBF,
-0x4F, 0x12, 0xBF, 0x75, 0x12, 0xCF, 0xD0, 0x90,
-0x93, 0x24, 0xE0, 0xC3, 0x13, 0x54, 0x01, 0xFF,
-0x12, 0xF2, 0xAF, 0xF1, 0xA0, 0x54, 0x01, 0xFF,
-0x12, 0xF1, 0x85, 0x90, 0x93, 0x25, 0x12, 0x97,
-0xDE, 0x30, 0xE0, 0x1F, 0x90, 0x93, 0x24, 0x12,
-0xAC, 0x3D, 0x20, 0xE0, 0x0E, 0xEF, 0xC3, 0x13,
-0x20, 0xE0, 0x08, 0xE0, 0x13, 0x13, 0x54, 0x3F,
-0x30, 0xE0, 0x04, 0x7F, 0x01, 0x80, 0x0A, 0x7F,
-0x00, 0x80, 0x06, 0xF1, 0xA0, 0x13, 0x54, 0x01,
-0xFF, 0x12, 0xDB, 0x8A, 0x90, 0x93, 0x24, 0xE0,
-0xC4, 0x54, 0x01, 0xFF, 0x12, 0xF2, 0xBB, 0x90,
-0x93, 0x24, 0xE0, 0xC4, 0x13, 0x13, 0x54, 0x01,
-0xFF, 0x12, 0xF2, 0xC9, 0x90, 0x93, 0x24, 0xE0,
-0x54, 0x01, 0xFF, 0x12, 0xCD, 0x05, 0xD0, 0xD0,
-0x92, 0xAF, 0x22, 0x12, 0x02, 0x4C, 0x90, 0x9C,
-0x90, 0x12, 0x82, 0x1E, 0x90, 0x00, 0x01, 0x02,
-0x02, 0x1F, 0x90, 0x9C, 0x8D, 0x12, 0x82, 0x27,
-0x90, 0x9C, 0x93, 0xE0, 0xFF, 0xB4, 0x04, 0x1C,
-0x90, 0x9C, 0x90, 0x12, 0x8F, 0x6D, 0xFE, 0x91,
-0xF2, 0xEE, 0x91, 0x4B, 0xFE, 0x91, 0xF2, 0x90,
-0x00, 0x01, 0xEE, 0x12, 0x02, 0x5E, 0x90, 0x00,
-0x02, 0xE4, 0x80, 0x20, 0xEF, 0x64, 0x02, 0x70,
-0x1E, 0x91, 0x4E, 0x91, 0xF1, 0xEF, 0x91, 0x4B,
-0x44, 0x20, 0x54, 0x7F, 0x91, 0xF1, 0x90, 0x00,
-0x01, 0xB1, 0xCB, 0x12, 0x8F, 0x6D, 0x91, 0xF1,
-0x90, 0x00, 0x02, 0xEF, 0x12, 0x02, 0x5E, 0x91,
-0xF2, 0xE9, 0x24, 0x03, 0xF9, 0xE4, 0x3A, 0xFA,
-0x12, 0x02, 0x06, 0x44, 0x20, 0x12, 0x02, 0x4C,
-0x90, 0x9C, 0x90, 0x12, 0x82, 0x1E, 0x12, 0x87,
-0xE7, 0x91, 0xF1, 0x90, 0x00, 0x04, 0xB1, 0xCB,
-0x12, 0x82, 0x1E, 0x12, 0x87, 0xA4, 0x91, 0xF1,
-0x90, 0x00, 0x05, 0xB1, 0xCB, 0x12, 0x82, 0x1E,
-0x12, 0x87, 0xD2, 0x91, 0xF1, 0x90, 0x00, 0x06,
-0xB1, 0xCB, 0x12, 0x82, 0x1E, 0x12, 0x87, 0x9C,
-0x91, 0xF1, 0x90, 0x00, 0x07, 0xEF, 0x02, 0x02,
-0x5E, 0xFF, 0x90, 0x9C, 0x8D, 0x02, 0x82, 0x1E,
-0x90, 0x9C, 0x7B, 0x12, 0x82, 0x27, 0x90, 0x9C,
-0x84, 0xE0, 0xFF, 0x64, 0x04, 0x70, 0x4C, 0xB1,
-0xBB, 0x12, 0x02, 0x06, 0xB1, 0xC4, 0xEE, 0x12,
-0x02, 0x4C, 0x90, 0x9C, 0x7B, 0x91, 0x51, 0xB1,
-0xC4, 0x90, 0x00, 0x01, 0xB1, 0xB7, 0x90, 0x00,
-0x04, 0xB1, 0xC1, 0x90, 0x00, 0x02, 0xB1, 0xB7,
-0x90, 0x00, 0x05, 0xB1, 0xC1, 0x90, 0x00, 0x03,
-0xB1, 0xB7, 0x90, 0x00, 0x06, 0xB1, 0xC1, 0x90,
-0x00, 0x04, 0xB1, 0xB7, 0x90, 0x00, 0x07, 0xB1,
-0xC1, 0x90, 0x00, 0x05, 0xB1, 0xB7, 0x12, 0x87,
-0xA4, 0xFE, 0x90, 0x9C, 0x81, 0x12, 0x82, 0x1E,
-0xEE, 0x80, 0x60, 0xEF, 0x64, 0x02, 0x70, 0x5E,
-0xB1, 0xBB, 0x12, 0x87, 0xE7, 0xFF, 0xB1, 0xC5,
-0xEF, 0x12, 0x02, 0x4C, 0xB1, 0xBB, 0x12, 0x02,
-0x06, 0xFF, 0xB1, 0xC5, 0x90, 0x00, 0x01, 0xEF,
-0xB1, 0xB8, 0x12, 0x87, 0xD2, 0xFF, 0xB1, 0xC5,
-0x90, 0x00, 0x02, 0xEF, 0xB1, 0xB8, 0x12, 0x87,
-0x9C, 0xFF, 0xB1, 0xC5, 0x90, 0x00, 0x03, 0xEF,
-0xB1, 0xB8, 0x90, 0x00, 0x06, 0x12, 0x02, 0x1F,
-0xFF, 0xB1, 0xC5, 0x90, 0x00, 0x04, 0xEF, 0xB1,
-0xB8, 0x90, 0x00, 0x07, 0x12, 0x02, 0x1F, 0xFF,
-0xB1, 0xC5, 0x90, 0x00, 0x05, 0xEF, 0xB1, 0xB8,
-0x12, 0x87, 0xA4, 0xFF, 0x90, 0x9C, 0x81, 0x12,
-0x82, 0x1E, 0xEF, 0x12, 0x02, 0x4C, 0x22, 0xEE,
-0x12, 0x02, 0x5E, 0x90, 0x9C, 0x7B, 0x02, 0x82,
-0x1E, 0x12, 0x02, 0x1F, 0xFE, 0x90, 0x9C, 0x7E,
-0x02, 0x82, 0x1E, 0xEF, 0x12, 0x02, 0x5E, 0x90,
-0x9C, 0x90, 0x22, 0x90, 0x9A, 0x42, 0x12, 0x82,
-0x27, 0xF1, 0x91, 0xD1, 0x3A, 0x12, 0x04, 0x80,
-0xF1, 0x91, 0xD1, 0x33, 0x12, 0x04, 0x80, 0xD1,
-0x3A, 0xF1, 0x79, 0x7A, 0x9A, 0x79, 0x5A, 0xD1,
-0x41, 0x90, 0x9C, 0x84, 0xF1, 0x8A, 0x91, 0xF8,
-0xD1, 0x33, 0xF1, 0x79, 0x7A, 0x9A, 0x79, 0x59,
-0xD1, 0x41, 0x90, 0x9C, 0x84, 0xF0, 0x90, 0x9A,
-0x45, 0x12, 0x82, 0x1E, 0x91, 0xF8, 0xD1, 0x3A,
-0x12, 0xE5, 0xA6, 0x74, 0x08, 0xF0, 0x7A, 0x9A,
-0x79, 0x51, 0x12, 0xE5, 0xB0, 0x40, 0x11, 0xD1,
-0x33, 0x90, 0x9C, 0x90, 0xD1, 0x44, 0x90, 0x9C,
-0x93, 0xF1, 0x8A, 0x91, 0x5A, 0x7F, 0x01, 0x22,
-0x7F, 0x00, 0x22, 0x7B, 0x01, 0x7A, 0x9A, 0x79,
-0x51, 0x22, 0x7B, 0x01, 0x7A, 0x9A, 0x79, 0x49,
-0x22, 0x90, 0x9C, 0x81, 0x12, 0x82, 0x27, 0x90,
-0x9A, 0x48, 0xE0, 0x22, 0xFF, 0x90, 0x9A, 0xF6,
-0xF0, 0x7B, 0x01, 0x7A, 0x9A, 0x79, 0xF7, 0x12,
-0x02, 0x06, 0x90, 0x06, 0x74, 0xF0, 0x91, 0x54,
-0x90, 0x06, 0x75, 0x12, 0x87, 0xE6, 0x90, 0x06,
-0x76, 0x12, 0x87, 0xA3, 0x90, 0x06, 0x77, 0xF0,
-0x12, 0xFA, 0x69, 0x04, 0x12, 0xFA, 0x5F, 0x02,
-0x7C, 0x6A, 0x90, 0x9A, 0xF1, 0xEF, 0xF0, 0xA3,
-0xED, 0xF0, 0xA3, 0x12, 0x82, 0x27, 0x90, 0x9A,
-0xF3, 0x12, 0x8B, 0xE0, 0xF1, 0x08, 0x24, 0x02,
-0xD1, 0x4C, 0x90, 0x9A, 0xF3, 0x12, 0x82, 0x1E,
-0xE9, 0x24, 0x04, 0xD1, 0xFF, 0x24, 0x03, 0xD1,
-0x4C, 0x90, 0x9A, 0xF3, 0x12, 0x82, 0x1E, 0xE9,
-0x24, 0x08, 0xD1, 0xFF, 0x24, 0x04, 0xD1, 0x4C,
+0x90, 0x9B, 0x1D, 0xE0, 0xFF, 0x12, 0xF5, 0x19,
+0xEF, 0x70, 0x02, 0xC1, 0xFF, 0x90, 0x9B, 0x1E,
+0xE0, 0xFB, 0xD3, 0x94, 0x00, 0x40, 0x1A, 0x90,
+0x9C, 0x2F, 0x12, 0x04, 0x3D, 0x00, 0x00, 0x00,
+0x0F, 0xAF, 0x03, 0xE4, 0xFC, 0xFD, 0xFE, 0x12,
+0xD4, 0x36, 0x7F, 0x08, 0x7E, 0x0E, 0x12, 0xD1,
+0xA3, 0x90, 0x9B, 0x1D, 0xE0, 0xFF, 0x90, 0x06,
+0x33, 0xF0, 0x12, 0xD5, 0x43, 0xE4, 0xFB, 0xFD,
+0x12, 0xD4, 0xC2, 0x90, 0x9B, 0x20, 0xE0, 0x60,
+0x08, 0x90, 0x93, 0x05, 0xE0, 0xFF, 0x12, 0xF5,
+0x44, 0x12, 0xCF, 0x7F, 0x30, 0xE0, 0x3B, 0x90,
+0x95, 0xEA, 0xE0, 0x60, 0x35, 0xE4, 0x90, 0x9A,
+0x36, 0xF0, 0x90, 0x95, 0xEA, 0xE0, 0xFF, 0x90,
+0x9A, 0x36, 0xE0, 0xC3, 0x9F, 0x50, 0x23, 0x7F,
+0x03, 0x7E, 0x00, 0x12, 0x7A, 0xAE, 0x90, 0x9A,
+0x36, 0xE0, 0x24, 0x29, 0x12, 0xC7, 0xE9, 0xE0,
+0xFF, 0x12, 0xF5, 0x44, 0x90, 0x01, 0xA6, 0xE0,
+0x04, 0xF0, 0x90, 0x9A, 0x36, 0xE0, 0x04, 0xF0,
+0x80, 0xD0, 0x90, 0x9B, 0x1F, 0xE0, 0x90, 0x9A,
+0x35, 0xF0, 0x90, 0x9B, 0x0A, 0xE0, 0x04, 0xF0,
+0xE0, 0xFF, 0x12, 0xF4, 0xE3, 0x90, 0x9A, 0x35,
+0x12, 0xAF, 0x13, 0x90, 0x9C, 0x9B, 0x12, 0x04,
+0x31, 0xF1, 0xD8, 0xB1, 0x37, 0x80, 0x47, 0xE4,
+0x90, 0x9B, 0x0A, 0xF0, 0x90, 0x9B, 0x89, 0xF0,
+0x90, 0x06, 0x32, 0xE0, 0x54, 0xFB, 0xF0, 0x12,
+0xD3, 0xC6, 0xE4, 0xFF, 0x12, 0x78, 0x4A, 0xBF,
+0x01, 0x12, 0x90, 0x9B, 0x22, 0xE0, 0xFD, 0x90,
+0x8A, 0x89, 0x11, 0x47, 0x7F, 0x02, 0x12, 0x04,
+0x7E, 0x12, 0x7B, 0xAD, 0x90, 0x9A, 0x37, 0x74,
+0x07, 0xF0, 0x90, 0x9A, 0x59, 0xF0, 0x7B, 0x01,
+0x7A, 0x9A, 0x79, 0x37, 0x11, 0x35, 0x7F, 0x04,
+0x12, 0x04, 0x7E, 0x12, 0xB5, 0x79, 0xD0, 0xD0,
+0x92, 0xAF, 0x22, 0xFA, 0xF9, 0xF8, 0xC3, 0x02,
+0x03, 0xDA, 0xEF, 0x24, 0xFC, 0x60, 0x05, 0x04,
+0x70, 0x04, 0x81, 0x0F, 0xD1, 0x41, 0x22, 0xE4,
+0xF5, 0x0F, 0x90, 0x88, 0x36, 0xE0, 0x60, 0x56,
+0xF1, 0xE0, 0x70, 0x52, 0x12, 0xF9, 0x37, 0x75,
+0x0F, 0x01, 0xE5, 0x0F, 0x60, 0x48, 0x90, 0x88,
+0x39, 0xE0, 0x20, 0xE2, 0x0C, 0x90, 0x8A, 0xB9,
+0x11, 0x47, 0x7D, 0x01, 0x7F, 0x04, 0x12, 0x04,
+0x7E, 0x12, 0xB7, 0xB0, 0x90, 0x88, 0x3F, 0xE0,
+0x60, 0x04, 0x64, 0x01, 0x70, 0x11, 0xE4, 0x90,
+0x92, 0x20, 0xF0, 0xF1, 0xCE, 0xFF, 0xA3, 0xE0,
+0xF1, 0xBF, 0xFF, 0xA3, 0xE0, 0x80, 0x0D, 0xE4,
+0x90, 0x92, 0x20, 0xF0, 0xF1, 0xCE, 0xF1, 0xE9,
+0xF1, 0xBF, 0xF1, 0xE9, 0x2F, 0x33, 0x33, 0x33,
+0x54, 0xF8, 0x90, 0x88, 0x4F, 0xF0, 0x22, 0x2F,
+0x90, 0x92, 0x21, 0xF0, 0xE4, 0xFB, 0xFD, 0x7F,
+0x54, 0x7E, 0x01, 0x12, 0x66, 0x33, 0x90, 0x88,
+0x3E, 0xE0, 0x13, 0x13, 0x13, 0x54, 0x1F, 0x22,
+0xE4, 0x90, 0x9C, 0x9F, 0xF0, 0x7F, 0x04, 0x22,
+0xE4, 0xFF, 0x12, 0x78, 0x4A, 0xEF, 0x64, 0x01,
+0x22, 0xFF, 0xA3, 0xE0, 0x75, 0xF0, 0x03, 0xA4,
+0x24, 0xFE, 0x22, 0x90, 0x88, 0x34, 0xE0, 0x54,
+0x0F, 0x22, 0x75, 0xF0, 0x0A, 0xA4, 0x24, 0x92,
+0xF5, 0x82, 0xE4, 0x34, 0x9B, 0xF5, 0x83, 0x22,
+0x12, 0x02, 0x06, 0xFF, 0x90, 0x93, 0x03, 0xF0,
+0xBF, 0x01, 0x07, 0x11, 0xFC, 0xE4, 0x90, 0x93,
+0x03, 0xF0, 0x22, 0x90, 0x9C, 0xAC, 0x12, 0x82,
+0x27, 0x90, 0x9C, 0xAB, 0xEF, 0xF0, 0x12, 0x82,
+0x30, 0x98, 0x75, 0x00, 0x98, 0x7A, 0x01, 0x98,
+0x7F, 0x03, 0x98, 0x84, 0x04, 0x98, 0x89, 0x06,
+0x98, 0x99, 0x12, 0x98, 0x9D, 0x14, 0x98, 0xA2,
+0x1E, 0x98, 0xA6, 0x20, 0x98, 0xAB, 0x25, 0x98,
+0xB0, 0x27, 0x98, 0xB5, 0x29, 0x98, 0xBA, 0x2A,
+0x98, 0xC3, 0x80, 0x98, 0xBF, 0x81, 0x98, 0xC8,
+0x82, 0x98, 0xCD, 0x83, 0x98, 0xD2, 0x84, 0x98,
+0xDC, 0x86, 0x98, 0xD7, 0x88, 0x98, 0xE1, 0xC3,
+0x98, 0x8D, 0xC6, 0x98, 0x8D, 0xC7, 0x98, 0x8D,
+0xC8, 0x00, 0x00, 0x98, 0xE6, 0x11, 0xF6, 0x02,
+0x87, 0x64, 0x11, 0xF6, 0x02, 0x87, 0xFA, 0x11,
+0xF6, 0x02, 0xE5, 0xF4, 0x11, 0xF6, 0x02, 0xDC,
+0x71, 0x11, 0xF6, 0x41, 0x8F, 0x90, 0x9C, 0xAB,
+0xE0, 0xFF, 0xA3, 0x12, 0x82, 0x1E, 0x02, 0xC0,
+0x9B, 0x11, 0xF6, 0x01, 0x08, 0x11, 0xF6, 0x02,
+0xA8, 0x01, 0x11, 0xF6, 0x41, 0x3C, 0x11, 0xF6,
+0x02, 0xA8, 0x10, 0x11, 0xF6, 0x02, 0xAF, 0xFA,
+0x11, 0xF6, 0x02, 0xB0, 0x02, 0x11, 0xF6, 0x02,
+0xC0, 0x04, 0x11, 0xF6, 0x02, 0xB7, 0xF5, 0x11,
+0xF6, 0x61, 0x1F, 0x11, 0xF6, 0x02, 0xE6, 0x46,
+0x11, 0xF6, 0x02, 0xF4, 0x5F, 0x11, 0xF6, 0x02,
+0xF4, 0x6E, 0x11, 0xF6, 0x02, 0x87, 0xAA, 0x11,
+0xF6, 0x02, 0xF4, 0xAB, 0x11, 0xF6, 0x02, 0xD5,
+0x55, 0x11, 0xF6, 0x02, 0xC0, 0x1A, 0x90, 0x01,
+0xC0, 0xE0, 0x44, 0x01, 0xF0, 0x90, 0x9C, 0xAB,
+0xE0, 0x90, 0x01, 0xC2, 0xF0, 0x22, 0x90, 0x9C,
+0xAC, 0x02, 0x82, 0x1E, 0x31, 0xA9, 0x7F, 0xEF,
+0x7E, 0x01, 0x12, 0x5F, 0xA6, 0xBF, 0x01, 0x06,
+0x90, 0x99, 0xB1, 0xE0, 0xA3, 0xF0, 0x31, 0xA9,
+0x7F, 0xEE, 0x7E, 0x01, 0x12, 0x5F, 0xA6, 0xBF,
+0x01, 0x08, 0x90, 0x99, 0xB1, 0xE0, 0x90, 0x99,
+0xB3, 0xF0, 0x31, 0xA9, 0x7F, 0xED, 0x7E, 0x01,
+0x12, 0x5F, 0xA6, 0xBF, 0x01, 0x08, 0x90, 0x99,
+0xB1, 0xE0, 0x90, 0x99, 0xB4, 0xF0, 0x31, 0xA9,
+0x7F, 0xEC, 0x7E, 0x01, 0x12, 0x5F, 0xA6, 0xBF,
+0x01, 0x08, 0x90, 0x99, 0xB1, 0xE0, 0x90, 0x99,
+0xB5, 0xF0, 0x31, 0xA9, 0x7F, 0xEB, 0x7E, 0x01,
+0x12, 0x5F, 0xA6, 0xBF, 0x01, 0x08, 0x90, 0x99,
+0xB1, 0xE0, 0x90, 0x99, 0xB6, 0xF0, 0x90, 0x99,
+0xB2, 0xE0, 0xFF, 0xA3, 0xE0, 0xFD, 0xA3, 0xE0,
+0xFB, 0xA3, 0xE0, 0x90, 0x99, 0xBA, 0xF0, 0x90,
+0x99, 0xB6, 0xE0, 0x90, 0x99, 0xBB, 0xF0, 0x90,
+0x99, 0xBC, 0x74, 0x12, 0xF0, 0x90, 0x99, 0xDE,
+0x74, 0x05, 0xF0, 0x90, 0x99, 0xBE, 0xEF, 0x12,
+0xC7, 0xE1, 0x90, 0x99, 0xBA, 0xE0, 0x90, 0x99,
+0xC1, 0xF0, 0x90, 0x99, 0xBB, 0xE0, 0x90, 0x99,
+0xC2, 0xF0, 0x7B, 0x01, 0x7A, 0x99, 0x79, 0xBC,
+0x12, 0x90, 0x35, 0x7F, 0x04, 0x02, 0x04, 0x7E,
+0xF0, 0x7B, 0x01, 0x7A, 0x99, 0x79, 0xB1, 0x22,
+0x7E, 0x00, 0x7F, 0x0B, 0x7D, 0x00, 0x7B, 0x01,
+0x7A, 0x98, 0x79, 0x59, 0x12, 0x04, 0x80, 0x31,
+0xA9, 0x12, 0xFB, 0xA4, 0xBF, 0x01, 0x1C, 0x90,
+0x99, 0xB1, 0xE0, 0xFE, 0x54, 0x01, 0x90, 0x98,
+0x59, 0xF0, 0xEE, 0x54, 0x04, 0x90, 0x98, 0x5B,
+0xF0, 0x90, 0x99, 0xB1, 0xE0, 0x54, 0x08, 0x90,
+0x98, 0x5A, 0xF0, 0x31, 0xA9, 0x12, 0x93, 0xC7,
+0x64, 0x01, 0x70, 0x35, 0x90, 0x99, 0xB1, 0xE0,
+0x54, 0x07, 0x70, 0x15, 0x7B, 0x01, 0x7A, 0x99,
+0x79, 0xB2, 0x7F, 0xFA, 0x7E, 0x01, 0x12, 0x5F,
+0xA6, 0xBF, 0x01, 0x0F, 0x90, 0x99, 0xB2, 0x80,
+0x03, 0x90, 0x99, 0xB1, 0xE0, 0x54, 0x07, 0x90,
+0x98, 0x5D, 0xF0, 0x90, 0x99, 0xB1, 0xE0, 0x54,
+0xE0, 0xC4, 0x13, 0x54, 0x07, 0x90, 0x98, 0x5C,
+0xF0, 0x31, 0xA9, 0x7F, 0xFD, 0x7E, 0x01, 0x12,
+0x5F, 0xA6, 0xBF, 0x01, 0x0E, 0x90, 0x99, 0xB1,
+0xE0, 0x54, 0x0C, 0x13, 0x13, 0x54, 0x3F, 0x90,
+0x98, 0x5E, 0xF0, 0x22, 0x12, 0x02, 0x06, 0x90,
+0x99, 0xD4, 0xF0, 0x91, 0x5A, 0x90, 0x99, 0xD5,
+0xF0, 0x60, 0x0F, 0x51, 0x87, 0x12, 0xC0, 0x30,
+0x90, 0x99, 0xD5, 0x51, 0x87, 0x7B, 0x57, 0x12,
+0x8D, 0x1E, 0x90, 0x99, 0xB1, 0x74, 0x20, 0xF0,
+0x90, 0x99, 0xD3, 0x74, 0x03, 0xF0, 0x90, 0x05,
+0x22, 0xE0, 0x90, 0x99, 0xB3, 0xF0, 0x90, 0x98,
+0x6A, 0xE0, 0x90, 0x99, 0xB4, 0xF0, 0x90, 0x98,
+0x6B, 0xE0, 0x90, 0x99, 0xB5, 0x31, 0xA8, 0x12,
+0x90, 0x35, 0x7F, 0x04, 0x02, 0x04, 0x7E, 0xE0,
+0xFF, 0x90, 0x99, 0xD4, 0xE0, 0xFD, 0x22, 0x12,
+0x02, 0x06, 0x64, 0x01, 0x60, 0x02, 0x61, 0x1E,
+0x90, 0x99, 0xF8, 0xF0, 0x90, 0x99, 0xF8, 0xE0,
+0xFF, 0xC3, 0x94, 0x10, 0x50, 0x28, 0xEF, 0x12,
+0xFB, 0x1C, 0x7A, 0x99, 0x79, 0xF7, 0x12, 0x5F,
+0xA6, 0xBF, 0x01, 0x12, 0x90, 0x99, 0xF7, 0xE0,
+0xFF, 0xA3, 0xE0, 0x24, 0xF9, 0xF5, 0x82, 0xE4,
+0x34, 0x99, 0xF5, 0x83, 0xEF, 0xF0, 0x90, 0x99,
+0xF8, 0xE0, 0x04, 0xF0, 0x80, 0xCE, 0x75, 0x45,
+0x01, 0x75, 0x46, 0x99, 0x75, 0x47, 0xF9, 0x75,
+0x48, 0x08, 0x7B, 0x01, 0x7A, 0x99, 0x79, 0xB3,
+0x12, 0x8F, 0x63, 0x74, 0x24, 0xF0, 0x90, 0x99,
+0xD3, 0x74, 0x08, 0xF0, 0x75, 0x45, 0x01, 0x75,
+0x46, 0x9A, 0x75, 0x47, 0x01, 0xF5, 0x48, 0x7B,
+0x01, 0x7A, 0x99, 0x79, 0xD6, 0x12, 0x69, 0xF5,
+0x90, 0x99, 0xD4, 0x74, 0x25, 0xF0, 0x90, 0x99,
+0xF6, 0x74, 0x08, 0x31, 0xA8, 0x12, 0xF9, 0xC3,
+0x7B, 0x01, 0x7A, 0x99, 0x79, 0xD4, 0x12, 0x90,
+0x35, 0x7F, 0x04, 0x12, 0x04, 0x7E, 0x22, 0xD3,
+0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0x12, 0x02,
+0x06, 0xFF, 0x54, 0x01, 0xFE, 0x90, 0x93, 0x24,
+0x12, 0xD7, 0x4C, 0xFD, 0xEF, 0x54, 0xFB, 0x4D,
+0xFF, 0x90, 0x93, 0x24, 0xF1, 0xE1, 0x12, 0xE7,
+0xB4, 0xFF, 0x90, 0x93, 0x24, 0x12, 0xE7, 0xC6,
+0xF1, 0xE9, 0x12, 0xE7, 0xBD, 0xFF, 0x90, 0x93,
+0x24, 0x12, 0xE7, 0xCF, 0x12, 0x87, 0xE6, 0xFF,
+0x54, 0x01, 0xFE, 0x90, 0x93, 0x26, 0xE0, 0x54,
+0xFE, 0x4E, 0xF0, 0x91, 0x5A, 0xFE, 0x54, 0x01,
+0xFD, 0x90, 0x93, 0x25, 0xE0, 0x54, 0xFE, 0x4D,
+0xFD, 0xF0, 0xEE, 0x54, 0x04, 0xFE, 0xED, 0x54,
+0xFB, 0x4E, 0xFE, 0xF0, 0x91, 0x5A, 0xFD, 0x54,
+0x08, 0xFC, 0xEE, 0x54, 0xF7, 0x4C, 0xFE, 0x90,
+0x93, 0x25, 0xF0, 0xED, 0x54, 0x10, 0xFD, 0xEE,
+0x54, 0xEF, 0x4D, 0xFE, 0xF0, 0x91, 0x5A, 0xFD,
+0x54, 0x20, 0xFC, 0xEE, 0x54, 0xDF, 0x4C, 0x90,
+0x93, 0x25, 0xF0, 0xEF, 0x54, 0x10, 0xFF, 0xA3,
+0xE0, 0x54, 0xEF, 0x4F, 0xFF, 0x12, 0x87, 0xE6,
+0xFE, 0x54, 0x20, 0xFC, 0xEF, 0x54, 0xDF, 0x4C,
+0x90, 0x93, 0x26, 0xF0, 0xED, 0x54, 0x40, 0xFF,
+0x90, 0x93, 0x25, 0xE0, 0x54, 0xBF, 0x12, 0x87,
+0xA2, 0x54, 0x07, 0xFF, 0x90, 0x93, 0x27, 0xE0,
+0x54, 0xF8, 0x4F, 0xF0, 0xEE, 0x54, 0x40, 0xFF,
+0x90, 0x93, 0x26, 0xE0, 0x54, 0xBF, 0x4F, 0x12,
+0xC7, 0x83, 0x12, 0xCF, 0x77, 0x90, 0x93, 0x24,
+0xE0, 0xC3, 0x13, 0x54, 0x01, 0xFF, 0x12, 0xF4,
+0xC9, 0xF1, 0xA6, 0x54, 0x01, 0xFF, 0x12, 0xF1,
+0x5D, 0x90, 0x93, 0x25, 0x12, 0x97, 0xD1, 0x30,
+0xE0, 0x1F, 0x90, 0x93, 0x24, 0x12, 0xB4, 0xAD,
+0x20, 0xE0, 0x0E, 0xEF, 0xC3, 0x13, 0x20, 0xE0,
+0x08, 0xE0, 0x13, 0x13, 0x54, 0x3F, 0x30, 0xE0,
+0x04, 0x7F, 0x01, 0x80, 0x0A, 0x7F, 0x00, 0x80,
+0x06, 0xF1, 0xA6, 0x13, 0x54, 0x01, 0xFF, 0x12,
+0xD7, 0xA9, 0x90, 0x93, 0x24, 0xE0, 0xC4, 0x54,
+0x01, 0xFF, 0x12, 0xF4, 0xD5, 0x90, 0x93, 0x24,
+0xE0, 0xC4, 0x13, 0x13, 0x54, 0x01, 0xFF, 0x12,
+0xD7, 0x2E, 0x90, 0x93, 0x24, 0xE0, 0x54, 0x01,
+0xFF, 0x12, 0xCB, 0x44, 0xD0, 0xD0, 0x92, 0xAF,
+0x22, 0x12, 0x02, 0x4C, 0x90, 0x9C, 0x90, 0x12,
+0x82, 0x1E, 0x90, 0x00, 0x01, 0x02, 0x02, 0x1F,
+0x90, 0x9C, 0x8D, 0x12, 0x82, 0x27, 0x90, 0x9C,
+0x93, 0xE0, 0xFF, 0xB4, 0x04, 0x1C, 0x90, 0x9C,
+0x90, 0x12, 0x8F, 0x6D, 0xFE, 0x91, 0xF8, 0xEE,
+0x91, 0x51, 0xFE, 0x91, 0xF8, 0x90, 0x00, 0x01,
+0xEE, 0x12, 0x02, 0x5E, 0x90, 0x00, 0x02, 0xE4,
+0x80, 0x20, 0xEF, 0x64, 0x02, 0x70, 0x1E, 0x91,
+0x54, 0x91, 0xF7, 0xEF, 0x91, 0x51, 0x44, 0x20,
+0x54, 0x7F, 0x91, 0xF7, 0x90, 0x00, 0x01, 0xB1,
+0xD1, 0x12, 0x8F, 0x6D, 0x91, 0xF7, 0x90, 0x00,
+0x02, 0xEF, 0x12, 0x02, 0x5E, 0x91, 0xF8, 0xE9,
+0x24, 0x03, 0xF9, 0xE4, 0x3A, 0xFA, 0x12, 0x02,
+0x06, 0x44, 0x20, 0x12, 0x02, 0x4C, 0x90, 0x9C,
+0x90, 0x12, 0x82, 0x1E, 0x12, 0x87, 0xE7, 0x91,
+0xF7, 0x90, 0x00, 0x04, 0xB1, 0xD1, 0x12, 0x82,
+0x1E, 0x12, 0x87, 0xA4, 0x91, 0xF7, 0x90, 0x00,
+0x05, 0xB1, 0xD1, 0x12, 0x82, 0x1E, 0x12, 0x87,
+0xD2, 0x91, 0xF7, 0x90, 0x00, 0x06, 0xB1, 0xD1,
+0x12, 0x82, 0x1E, 0x12, 0x87, 0x9C, 0x91, 0xF7,
+0x90, 0x00, 0x07, 0xEF, 0x02, 0x02, 0x5E, 0xFF,
+0x90, 0x9C, 0x8D, 0x02, 0x82, 0x1E, 0x90, 0x9C,
+0x7B, 0x12, 0x82, 0x27, 0x90, 0x9C, 0x84, 0xE0,
+0xFF, 0x64, 0x04, 0x70, 0x4C, 0xB1, 0xC1, 0x12,
+0x02, 0x06, 0xB1, 0xCA, 0xEE, 0x12, 0x02, 0x4C,
+0x90, 0x9C, 0x7B, 0x91, 0x57, 0xB1, 0xCA, 0x90,
+0x00, 0x01, 0xB1, 0xBD, 0x90, 0x00, 0x04, 0xB1,
+0xC7, 0x90, 0x00, 0x02, 0xB1, 0xBD, 0x90, 0x00,
+0x05, 0xB1, 0xC7, 0x90, 0x00, 0x03, 0xB1, 0xBD,
+0x90, 0x00, 0x06, 0xB1, 0xC7, 0x90, 0x00, 0x04,
+0xB1, 0xBD, 0x90, 0x00, 0x07, 0xB1, 0xC7, 0x90,
+0x00, 0x05, 0xB1, 0xBD, 0x12, 0x87, 0xA4, 0xFE,
+0x90, 0x9C, 0x81, 0x12, 0x82, 0x1E, 0xEE, 0x80,
+0x60, 0xEF, 0x64, 0x02, 0x70, 0x5E, 0xB1, 0xC1,
+0x12, 0x87, 0xE7, 0xFF, 0xB1, 0xCB, 0xEF, 0x12,
+0x02, 0x4C, 0xB1, 0xC1, 0x12, 0x02, 0x06, 0xFF,
+0xB1, 0xCB, 0x90, 0x00, 0x01, 0xEF, 0xB1, 0xBE,
+0x12, 0x87, 0xD2, 0xFF, 0xB1, 0xCB, 0x90, 0x00,
+0x02, 0xEF, 0xB1, 0xBE, 0x12, 0x87, 0x9C, 0xFF,
+0xB1, 0xCB, 0x90, 0x00, 0x03, 0xEF, 0xB1, 0xBE,
+0x90, 0x00, 0x06, 0x12, 0x02, 0x1F, 0xFF, 0xB1,
+0xCB, 0x90, 0x00, 0x04, 0xEF, 0xB1, 0xBE, 0x90,
+0x00, 0x07, 0x12, 0x02, 0x1F, 0xFF, 0xB1, 0xCB,
+0x90, 0x00, 0x05, 0xEF, 0xB1, 0xBE, 0x12, 0x87,
+0xA4, 0xFF, 0x90, 0x9C, 0x81, 0x12, 0x82, 0x1E,
+0xEF, 0x12, 0x02, 0x4C, 0x22, 0xEE, 0x12, 0x02,
+0x5E, 0x90, 0x9C, 0x7B, 0x02, 0x82, 0x1E, 0x12,
+0x02, 0x1F, 0xFE, 0x90, 0x9C, 0x7E, 0x02, 0x82,
+0x1E, 0xEF, 0x12, 0x02, 0x5E, 0x90, 0x9C, 0x90,
+0x22, 0x90, 0x9A, 0x42, 0x12, 0x82, 0x27, 0xF1,
+0x90, 0xD1, 0x40, 0x12, 0x04, 0x80, 0xF1, 0x90,
+0xD1, 0x39, 0x12, 0x04, 0x80, 0xD1, 0x40, 0xF1,
+0x7F, 0x7A, 0x9A, 0x79, 0x5A, 0xD1, 0x47, 0x90,
+0x9C, 0x84, 0xF1, 0x97, 0x91, 0xFE, 0xD1, 0x39,
+0xF1, 0x7F, 0x7A, 0x9A, 0x79, 0x59, 0xD1, 0x47,
+0x90, 0x9C, 0x84, 0xF0, 0x90, 0x9A, 0x45, 0x12,
+0x82, 0x1E, 0x91, 0xFE, 0xD1, 0x40, 0x12, 0xE5,
+0xA4, 0x74, 0x08, 0xF0, 0x7A, 0x9A, 0x79, 0x51,
+0x12, 0xE5, 0xAE, 0x40, 0x11, 0xD1, 0x39, 0x90,
+0x9C, 0x90, 0xD1, 0x4A, 0x90, 0x9C, 0x93, 0xF1,
+0x97, 0x91, 0x60, 0x7F, 0x01, 0x22, 0x7F, 0x00,
+0x22, 0x7B, 0x01, 0x7A, 0x9A, 0x79, 0x51, 0x22,
+0x7B, 0x01, 0x7A, 0x9A, 0x79, 0x49, 0x22, 0x90,
+0x9C, 0x81, 0x12, 0x82, 0x27, 0x90, 0x9A, 0x48,
+0xE0, 0x22, 0xFF, 0x90, 0x9A, 0xF6, 0xF0, 0x7B,
+0x01, 0x7A, 0x9A, 0x79, 0xF7, 0x12, 0x02, 0x06,
+0x90, 0x06, 0x74, 0xF0, 0x91, 0x5A, 0x90, 0x06,
+0x75, 0x12, 0x87, 0xE6, 0x90, 0x06, 0x76, 0x12,
+0x87, 0xA3, 0x90, 0x06, 0x77, 0xF0, 0x12, 0xCF,
+0xE1, 0x04, 0x12, 0xCF, 0xD7, 0x02, 0x7C, 0x6A,
+0x90, 0x9A, 0xF1, 0xEF, 0xF0, 0xA3, 0xED, 0xF0,
+0xA3, 0x12, 0x82, 0x27, 0x90, 0x9A, 0xF3, 0x12,
+0x8B, 0xE0, 0xF1, 0x0E, 0x24, 0x02, 0xD1, 0x52,
 0x90, 0x9A, 0xF3, 0x12, 0x82, 0x1E, 0xE9, 0x24,
-0x0C, 0xD1, 0xFF, 0x24, 0x05, 0xD1, 0x4C, 0x90,
-0x9A, 0xF2, 0xE0, 0xFD, 0xB4, 0x02, 0x08, 0x90,
-0x9A, 0xF1, 0xE0, 0x44, 0x48, 0x80, 0x0A, 0xED,
-0xB4, 0x04, 0x0A, 0x90, 0x9A, 0xF1, 0xE0, 0x44,
-0x50, 0x90, 0x9A, 0xF7, 0xF0, 0x90, 0x9A, 0xF8,
-0x74, 0x80, 0xF0, 0xA3, 0x74, 0xFF, 0xF0, 0xA3,
-0xF0, 0xF1, 0x14, 0xD1, 0x4C, 0x90, 0x9A, 0xF7,
-0x74, 0xFF, 0xF1, 0xA9, 0xF1, 0x14, 0x04, 0xD1,
-0x4C, 0x90, 0x06, 0x72, 0xE4, 0xF0, 0x22, 0xF9,
-0xE4, 0x3A, 0x8B, 0x45, 0xF5, 0x46, 0x89, 0x47,
-0x75, 0x48, 0x04, 0x7B, 0x01, 0x7A, 0x9A, 0x79,
-0xF7, 0x12, 0x69, 0xF5, 0x90, 0x9A, 0xF1, 0xE0,
-0x75, 0xF0, 0x08, 0xA4, 0x22, 0x90, 0x9C, 0x60,
-0x12, 0x82, 0x27, 0xC0, 0x03, 0xC0, 0x02, 0xC0,
-0x01, 0x7B, 0x01, 0x7A, 0x9C, 0x79, 0x65, 0xF1,
-0x79, 0x7A, 0x9C, 0x79, 0x6D, 0x90, 0x9C, 0x81,
-0xF1, 0x98, 0x90, 0x9C, 0x84, 0xF0, 0xD0, 0x01,
-0xD0, 0x02, 0xD0, 0x03, 0x91, 0xF8, 0xED, 0x70,
-0x19, 0xFF, 0xF1, 0x7F, 0xE0, 0xB4, 0xFF, 0x06,
-0xF1, 0x7F, 0xE4, 0xF0, 0x80, 0x07, 0xF1, 0x7F,
-0xE0, 0x04, 0xF0, 0x80, 0x05, 0x0F, 0xEF, 0xB4,
-0x06, 0xE8, 0x7B, 0x01, 0x7A, 0x9C, 0x79, 0x65,
-0x90, 0x9C, 0x90, 0xF1, 0x98, 0x90, 0x9C, 0x93,
-0xF0, 0x90, 0x9C, 0x60, 0x12, 0x82, 0x1E, 0x81,
-0x5A, 0x90, 0x9C, 0x7E, 0x02, 0x82, 0x27, 0x74,
-0x65, 0x2F, 0xF5, 0x82, 0xE4, 0x34, 0x9C, 0xF5,
-0x83, 0x22, 0xF0, 0x90, 0x9A, 0x42, 0x02, 0x82,
-0x1E, 0x7E, 0x00, 0x7F, 0x08, 0x7D, 0x00, 0x22,
-0x12, 0x82, 0x27, 0x90, 0x9C, 0x64, 0xE0, 0x22,
-0x90, 0x93, 0x24, 0xE0, 0x13, 0x13, 0x22, 0xF0,
-0xA3, 0xF0, 0xA3, 0xF0, 0xA3, 0xF0, 0xA3, 0xF0,
-0x22, 0x12, 0xA7, 0xEA, 0xE4, 0x90, 0x98, 0x41,
-0xF1, 0xA9, 0x90, 0x95, 0x93, 0xF1, 0xA7, 0xA3,
-0xF1, 0xA7, 0x90, 0x95, 0xA5, 0xF0, 0xA3, 0xF0,
-0x90, 0x95, 0xE7, 0xF0, 0xA3, 0xF0, 0x22, 0x90,
-0x93, 0x24, 0x12, 0xD7, 0x60, 0x30, 0xE0, 0x02,
-0xF1, 0xB1, 0x22, 0xF0, 0xEE, 0x54, 0x08, 0xFE,
-0xEF, 0x54, 0xF7, 0x4E, 0xFF, 0xF0, 0x02, 0x02,
-0x06, 0x12, 0x02, 0x06, 0x90, 0x98, 0x35, 0xF0,
-0x91, 0x54, 0x90, 0x98, 0x36, 0xF0, 0x22, 0x12,
-0x02, 0x06, 0x54, 0x01, 0xFF, 0x90, 0x98, 0x69,
-0xE0, 0x54, 0xFE, 0x4F, 0xF0, 0x22, 0x12, 0xF9,
-0xB9, 0xFF, 0x54, 0x7F, 0x90, 0x88, 0x36, 0xF0,
-0xEF, 0x11, 0x9F, 0xA3, 0xF0, 0x12, 0x9C, 0x54,
-0xFD, 0x54, 0xF0, 0xC4, 0x54, 0x0F, 0xFF, 0x90,
-0x88, 0x34, 0xE0, 0x54, 0xF0, 0x12, 0x87, 0xA2,
-0xFC, 0x54, 0x01, 0x25, 0xE0, 0xFF, 0x90, 0x88,
-0x31, 0xE0, 0x54, 0xFD, 0x4F, 0xF0, 0xEC, 0x54,
-0x04, 0xC3, 0x13, 0xFF, 0x90, 0x88, 0x33, 0xE0,
-0x54, 0xFD, 0x4F, 0xF0, 0xED, 0x54, 0x0F, 0xC4,
-0x54, 0xF0, 0xFF, 0xA3, 0xE0, 0x54, 0x0F, 0x12,
-0x87, 0xE5, 0x90, 0x88, 0x35, 0x12, 0x87, 0xD1,
-0xFD, 0x90, 0x8A, 0x89, 0x12, 0x90, 0x47, 0x7F,
-0x02, 0x12, 0x04, 0x7E, 0x90, 0x9B, 0x89, 0xE0,
-0x60, 0x0C, 0x12, 0xFA, 0xD8, 0x90, 0x8A, 0x89,
-0x12, 0x90, 0x47, 0x12, 0xFB, 0x28, 0xF1, 0xF2,
-0x12, 0x5C, 0x5F, 0x90, 0x88, 0x36, 0xE0, 0xB4,
-0x01, 0x07, 0x90, 0x88, 0x33, 0xE0, 0x54, 0xFB,
-0xF0, 0x12, 0xD6, 0xC2, 0xF0, 0x90, 0x88, 0x36,
-0x12, 0xF9, 0xE0, 0x12, 0xD4, 0x1E, 0x90, 0x01,
-0xBE, 0xF0, 0x22, 0x90, 0x93, 0x2A, 0xE0, 0xC4,
-0x13, 0x13, 0x13, 0x54, 0x01, 0x22, 0xD3, 0x10,
-0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0xE4, 0x90, 0x9C,
-0x08, 0xF0, 0xA3, 0x74, 0x08, 0xF0, 0xA3, 0x12,
-0xC2, 0xB0, 0x90, 0x9C, 0x0F, 0xF0, 0xA3, 0xF0,
-0x90, 0x9C, 0x19, 0x12, 0xCF, 0xA7, 0x12, 0xBF,
-0x7E, 0x90, 0x9B, 0xFD, 0x12, 0xFB, 0x05, 0x90,
-0x9C, 0x06, 0xF0, 0x90, 0x93, 0x24, 0xE0, 0x20,
-0xE0, 0x02, 0x81, 0x26, 0xE4, 0x90, 0x9C, 0x05,
-0xF0, 0x90, 0x9C, 0x06, 0xE0, 0xFF, 0x90, 0x9C,
-0x05, 0xE0, 0xC3, 0x9F, 0x40, 0x02, 0x81, 0x26,
-0x12, 0xFA, 0xF3, 0xEC, 0xFF, 0x90, 0xFD, 0x11,
-0xF0, 0x90, 0x9C, 0x0F, 0xEF, 0xF0, 0x12, 0xCF,
-0xB1, 0x3E, 0x54, 0x3F, 0xFE, 0x90, 0x9B, 0xFF,
-0xF0, 0xA3, 0xEF, 0xF0, 0x90, 0x9C, 0x0B, 0xEE,
-0x12, 0xF9, 0x14, 0x30, 0xE0, 0x0A, 0xC3, 0x13,
-0x20, 0xE0, 0x05, 0x12, 0xF9, 0xD1, 0x80, 0x02,
-0x7E, 0x00, 0xEF, 0x24, 0x18, 0x2E, 0xFF, 0x90,
-0x9C, 0x10, 0xF0, 0x90, 0x9B, 0xFE, 0xE0, 0x2F,
-0xFF, 0x90, 0x9B, 0xFD, 0xE0, 0x34, 0x00, 0xFE,
-0x90, 0x9C, 0x01, 0xF0, 0xA3, 0xEF, 0xF0, 0x91,
-0x62, 0xC0, 0x07, 0x90, 0x9C, 0x01, 0xB1, 0xF2,
-0x7D, 0x01, 0x12, 0x04, 0x7E, 0xC0, 0x07, 0x90,
-0x9C, 0x01, 0xB1, 0xF2, 0x7D, 0x04, 0x12, 0x04,
-0x7E, 0xAB, 0x07, 0xD0, 0x05, 0xD0, 0x07, 0x12,
-0x8E, 0xC9, 0x90, 0x9C, 0x07, 0xEF, 0xF0, 0x91,
-0x39, 0x91, 0x62, 0xEF, 0x54, 0xFC, 0x90, 0x9C,
-0x03, 0xF0, 0x90, 0x9C, 0x10, 0xE0, 0xFF, 0x90,
-0x9B, 0xFF, 0xE4, 0x8F, 0xF0, 0x12, 0x02, 0xE7,
-0x12, 0xFA, 0xFC, 0x12, 0xE7, 0x50, 0x90, 0x9B,
-0xFF, 0xEE, 0xF0, 0xA3, 0xEF, 0xF0, 0x90, 0x9B,
-0xFD, 0xB1, 0xF2, 0x7D, 0x0F, 0x12, 0x04, 0x7E,
-0x90, 0x9C, 0x04, 0xEF, 0xF0, 0x90, 0x9B, 0x89,
-0xE0, 0x60, 0x3B, 0x90, 0x9C, 0x03, 0xE0, 0x24,
-0xB0, 0x60, 0x16, 0x24, 0xD0, 0x60, 0x02, 0x61,
-0x49, 0x12, 0xF3, 0xA7, 0x20, 0xE0, 0x18, 0x12,
-0xD7, 0x42, 0x20, 0xE0, 0x02, 0x61, 0x49, 0x80,
-0x0E, 0x12, 0xF3, 0xA7, 0x20, 0xE0, 0x08, 0x12,
-0xD7, 0x42, 0x20, 0xE0, 0x02, 0x61, 0x49, 0x91,
-0x39, 0x90, 0x9C, 0x0B, 0xE0, 0xFC, 0xA3, 0xE0,
-0xFD, 0x12, 0xF4, 0x30, 0x61, 0x49, 0x90, 0x9C,
-0x03, 0xE0, 0x24, 0xF8, 0x60, 0x36, 0x24, 0x80,
-0x60, 0x32, 0x24, 0xC8, 0x60, 0x06, 0x24, 0x20,
-0x60, 0x02, 0x61, 0x49, 0x90, 0x93, 0x29, 0x11,
-0x9E, 0x20, 0xE0, 0x02, 0x61, 0x49, 0x91, 0x39,
-0x12, 0xE9, 0x71, 0xEF, 0x70, 0x02, 0x61, 0x49,
-0x91, 0x39, 0x12, 0xEF, 0xE2, 0xEF, 0x70, 0x02,
-0x61, 0x49, 0x90, 0x9C, 0x03, 0xE0, 0xFF, 0x12,
-0xE9, 0x5F, 0x61, 0x49, 0x12, 0xF9, 0x9A, 0xFF,
-0x12, 0xF0, 0x2F, 0xAC, 0x07, 0x91, 0x2B, 0xAB,
-0x04, 0xC0, 0x03, 0x7B, 0x01, 0x7A, 0x9C, 0x79,
-0x11, 0x90, 0x9A, 0x38, 0x12, 0x82, 0x27, 0xD0,
-0x03, 0x12, 0xB7, 0x80, 0x91, 0x39, 0x12, 0xE9,
-0x71, 0x90, 0x9A, 0x38, 0xEF, 0xF0, 0x7B, 0x01,
-0x7A, 0x9C, 0x79, 0x11, 0x12, 0xF9, 0x9A, 0xFD,
-0x12, 0xE5, 0xB9, 0xEF, 0x70, 0x02, 0x61, 0x49,
-0x90, 0x93, 0x24, 0x12, 0xAF, 0xE7, 0x30, 0xE0,
-0x62, 0x90, 0x9C, 0x07, 0xE0, 0xFF, 0x90, 0x9C,
-0x02, 0xE0, 0x2F, 0xFF, 0x90, 0x9C, 0x01, 0xE0,
-0x34, 0x00, 0xCF, 0x24, 0x08, 0xCF, 0x34, 0x00,
-0xFE, 0x90, 0x9C, 0x0D, 0xF0, 0xA3, 0xEF, 0xF0,
-0x91, 0x62, 0xEF, 0x64, 0x45, 0x70, 0x3C, 0x12,
-0xF9, 0x55, 0x12, 0xF4, 0x57, 0xEF, 0x64, 0x01,
-0x70, 0x31, 0x12, 0xF9, 0x55, 0x12, 0xB7, 0xC1,
-0xEF, 0x64, 0x01, 0x70, 0x26, 0x90, 0x9C, 0x19,
-0x04, 0x12, 0xF9, 0x54, 0xA3, 0xE0, 0xFD, 0x12,
-0xEB, 0x38, 0xEF, 0x70, 0x0E, 0x90, 0x9C, 0x0F,
-0xE0, 0xFD, 0x90, 0xFD, 0x11, 0x12, 0xF9, 0x54,
-0x12, 0xEA, 0xF3, 0x90, 0x9C, 0x0F, 0xE0, 0x90,
-0xFD, 0x11, 0xF0, 0x91, 0x39, 0x12, 0xE9, 0x71,
-0xEF, 0x60, 0x31, 0x91, 0x2B, 0x90, 0x9C, 0x0A,
-0xE0, 0xFB, 0x90, 0x9C, 0x0F, 0xE0, 0x90, 0x9A,
-0x38, 0xF0, 0x12, 0xEA, 0x45, 0xEF, 0x60, 0x02,
-0xF1, 0x3E, 0x90, 0x93, 0x25, 0xE0, 0xC4, 0x13,
-0x54, 0x07, 0x30, 0xE0, 0x0F, 0x91, 0x2B, 0x90,
-0x9C, 0x0A, 0xE0, 0xFB, 0x12, 0xE9, 0xDF, 0xEF,
-0x60, 0x02, 0xF1, 0x3E, 0x90, 0x93, 0x24, 0xE0,
-0xC3, 0x13, 0x30, 0xE0, 0x0A, 0x91, 0x2B, 0x12,
-0xB5, 0xD6, 0xEF, 0x60, 0x02, 0xF1, 0x3E, 0x12,
-0x9F, 0xA0, 0x54, 0x3F, 0x30, 0xE0, 0x0A, 0x91,
-0x2B, 0x12, 0xEB, 0x88, 0xEF, 0x60, 0x02, 0xF1,
-0x3E, 0x90, 0x93, 0x24, 0x11, 0x9E, 0x30, 0xE0,
-0x16, 0x90, 0x9C, 0x19, 0xE0, 0x70, 0x10, 0x91,
-0x2B, 0x12, 0xEA, 0xDD, 0xEF, 0x60, 0x08, 0xF1,
-0x46, 0x90, 0x01, 0xC7, 0x74, 0x22, 0xF0, 0x91,
-0x2B, 0xD1, 0x03, 0xEF, 0x60, 0x03, 0x12, 0xC1,
-0x2D, 0x90, 0x9C, 0x04, 0xE0, 0xFF, 0x7D, 0x01,
-0x12, 0xF2, 0x12, 0xEF, 0x60, 0x11, 0xF1, 0x46,
-0x90, 0x9B, 0xFD, 0xB1, 0xF2, 0x7D, 0x10, 0x12,
-0x04, 0x7E, 0x90, 0x95, 0x65, 0xEF, 0xF0, 0x90,
-0x9C, 0x19, 0xE0, 0x70, 0x1E, 0x90, 0x93, 0x26,
-0x12, 0xAF, 0xE7, 0x30, 0xE0, 0x15, 0x90, 0x9C,
-0x03, 0xE0, 0xFF, 0x64, 0x08, 0x60, 0x04, 0xEF,
-0xB4, 0x88, 0x08, 0xF1, 0x46, 0x90, 0x01, 0xC7,
-0x74, 0x25, 0xF0, 0x90, 0x93, 0x31, 0xE0, 0x30,
-0xE0, 0x14, 0x90, 0x93, 0x25, 0x12, 0xAF, 0xE7,
-0x30, 0xE0, 0x0B, 0x91, 0x2B, 0x12, 0xB4, 0x13,
-0xBF, 0x01, 0x03, 0x12, 0xC1, 0x2D, 0x12, 0xFA,
-0xFC, 0x90, 0x9B, 0xFD, 0x12, 0xF9, 0xC2, 0x12,
-0xFA, 0xF3, 0xD3, 0x9F, 0xEC, 0x9E, 0x40, 0x0F,
-0x12, 0xF9, 0x8A, 0xED, 0x9F, 0xFF, 0xEC, 0x9E,
-0x90, 0x9B, 0xFD, 0xF0, 0xA3, 0xEF, 0xF0, 0x90,
-0x93, 0x31, 0xE0, 0x30, 0xE0, 0x04, 0x7F, 0x01,
-0xF1, 0x56, 0x12, 0xE9, 0x48, 0xEF, 0x64, 0x01,
-0x70, 0x30, 0x12, 0xE7, 0x72, 0xAD, 0x07, 0xEF,
-0x64, 0x01, 0x60, 0x1E, 0xF1, 0x46, 0xED, 0xB4,
-0x02, 0x08, 0x90, 0x01, 0xC7, 0x74, 0x42, 0xF0,
-0x80, 0x0A, 0xED, 0xB4, 0x04, 0x06, 0x90, 0x01,
-0xC7, 0x74, 0x43, 0xF0, 0x7F, 0x01, 0xF1, 0x56,
-0x80, 0x24, 0x90, 0x9B, 0xFD, 0x12, 0xE7, 0x3D,
-0x80, 0x14, 0x90, 0x93, 0x26, 0xE0, 0xC4, 0x13,
-0x54, 0x07, 0x20, 0xE0, 0x11, 0x90, 0x93, 0x24,
-0xE0, 0x54, 0xFE, 0xF0, 0x80, 0x08, 0x90, 0x9C,
-0x05, 0xE0, 0x04, 0xF0, 0x01, 0xE1, 0xD0, 0xD0,
-0x92, 0xAF, 0x22, 0x90, 0x9C, 0x01, 0xE0, 0xFE,
-0xA3, 0xE0, 0xFF, 0x90, 0x9C, 0x07, 0xE0, 0xFD,
-0x22, 0x90, 0x9C, 0x01, 0xE0, 0xFE, 0xA3, 0xE0,
-0xFF, 0x22, 0x90, 0x9A, 0x36, 0xE0, 0xFD, 0x90,
-0x9A, 0x35, 0xE0, 0x2D, 0xFD, 0x90, 0x9A, 0x34,
-0xE0, 0x34, 0x00, 0xCD, 0x24, 0x10, 0xCD, 0x34,
-0x00, 0xFC, 0x7E, 0x00, 0xED, 0x2F, 0xFF, 0xEE,
-0x3C, 0xFE, 0x90, 0x8A, 0xE9, 0xE0, 0xFC, 0xA3,
-0xE0, 0xF5, 0x82, 0x8C, 0x83, 0xE4, 0xFD, 0x02,
-0x04, 0x7E, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0,
-0xD0, 0x90, 0x06, 0x31, 0xE0, 0x54, 0xEF, 0x44,
-0x08, 0xF0, 0xED, 0x2F, 0xFF, 0xE4, 0x3E, 0xFE,
-0x7C, 0x00, 0xEF, 0x24, 0x08, 0x12, 0xFA, 0x24,
-0x7E, 0x00, 0x7F, 0xE3, 0x7D, 0x00, 0x7B, 0x01,
-0x7A, 0x94, 0x79, 0x39, 0x12, 0x04, 0x80, 0x90,
-0x9A, 0x3E, 0xE0, 0x24, 0x01, 0xB1, 0xE7, 0x91,
-0x61, 0x90, 0x94, 0x3A, 0xEF, 0xF0, 0x90, 0x9A,
-0x3E, 0xE0, 0x24, 0x04, 0xB1, 0xE7, 0x91, 0x61,
-0x90, 0x94, 0x3D, 0xEF, 0xF0, 0x90, 0x9A, 0x3E,
-0xE0, 0x24, 0x05, 0xB1, 0xE7, 0x91, 0x61, 0x90,
-0x94, 0x3E, 0xEF, 0xF0, 0x90, 0x9A, 0x3E, 0xE0,
-0x24, 0x06, 0xB1, 0xE7, 0x91, 0x61, 0x90, 0x94,
-0x3F, 0xEF, 0xF0, 0x90, 0x9A, 0x3E, 0xE0, 0x24,
-0x07, 0xB1, 0xE7, 0x91, 0x61, 0x90, 0x94, 0x40,
-0xEF, 0xF0, 0x90, 0x9A, 0x3E, 0xE0, 0x24, 0x08,
-0xB1, 0xE7, 0x91, 0x61, 0x90, 0x94, 0x41, 0xEF,
-0xF0, 0xE4, 0x90, 0x9A, 0x3C, 0xF0, 0x12, 0xFA,
-0x7D, 0x94, 0x08, 0x50, 0x1C, 0x90, 0x9A, 0x3E,
-0xE0, 0x24, 0x09, 0xFD, 0x90, 0x9A, 0x3D, 0xE0,
-0x91, 0x57, 0x90, 0x9A, 0x3C, 0xE0, 0x24, 0x42,
-0xF5, 0x82, 0xE4, 0x34, 0x94, 0xD1, 0xA7, 0x80,
-0xDD, 0xE4, 0x90, 0x9A, 0x3C, 0xF0, 0x12, 0xFA,
-0x7D, 0x94, 0x02, 0x50, 0x1C, 0x90, 0x9A, 0x3E,
+0x04, 0xF1, 0x05, 0x24, 0x03, 0xD1, 0x52, 0x90,
+0x9A, 0xF3, 0x12, 0x82, 0x1E, 0xE9, 0x24, 0x08,
+0xF1, 0x05, 0x24, 0x04, 0xD1, 0x52, 0x90, 0x9A,
+0xF3, 0x12, 0x82, 0x1E, 0xE9, 0x24, 0x0C, 0xF1,
+0x05, 0x24, 0x05, 0xD1, 0x52, 0x90, 0x9A, 0xF2,
+0xE0, 0xFD, 0xB4, 0x02, 0x08, 0x90, 0x9A, 0xF1,
+0xE0, 0x44, 0x48, 0x80, 0x0A, 0xED, 0xB4, 0x04,
+0x0A, 0x90, 0x9A, 0xF1, 0xE0, 0x44, 0x50, 0x90,
+0x9A, 0xF7, 0xF0, 0x90, 0x9A, 0xF8, 0x74, 0x80,
+0xF0, 0xA3, 0x74, 0xFF, 0xF0, 0xA3, 0xF0, 0xF1,
+0x1A, 0xD1, 0x52, 0x90, 0x9A, 0xF7, 0x74, 0xFF,
+0xF1, 0xAF, 0xF1, 0x1A, 0x04, 0xD1, 0x52, 0x90,
+0x06, 0x72, 0xE4, 0xF0, 0x22, 0xF9, 0xE4, 0x3A,
+0x8B, 0x45, 0xF5, 0x46, 0x89, 0x47, 0x75, 0x48,
+0x04, 0x7B, 0x01, 0x7A, 0x9A, 0x79, 0xF7, 0x12,
+0x69, 0xF5, 0x90, 0x9A, 0xF1, 0xE0, 0x75, 0xF0,
+0x08, 0xA4, 0x22, 0x90, 0x9C, 0x60, 0x12, 0x82,
+0x27, 0xC0, 0x03, 0xC0, 0x02, 0xC0, 0x01, 0x7B,
+0x01, 0x7A, 0x9C, 0x79, 0x65, 0xF1, 0x7F, 0x7A,
+0x9C, 0x79, 0x6D, 0x90, 0x9C, 0x81, 0xF1, 0x9E,
+0x90, 0x9C, 0x84, 0xF0, 0xD0, 0x01, 0xD0, 0x02,
+0xD0, 0x03, 0x91, 0xFE, 0xED, 0x70, 0x19, 0xFF,
+0xF1, 0x85, 0xE0, 0xB4, 0xFF, 0x06, 0xF1, 0x85,
+0xE4, 0xF0, 0x80, 0x07, 0xF1, 0x85, 0xE0, 0x04,
+0xF0, 0x80, 0x05, 0x0F, 0xEF, 0xB4, 0x06, 0xE8,
+0x7B, 0x01, 0x7A, 0x9C, 0x79, 0x65, 0x90, 0x9C,
+0x90, 0xF1, 0x9E, 0x90, 0x9C, 0x93, 0xF0, 0x90,
+0x9C, 0x60, 0x12, 0x82, 0x1E, 0x81, 0x60, 0x90,
+0x9C, 0x7E, 0x02, 0x82, 0x27, 0x74, 0x65, 0x2F,
+0xF5, 0x82, 0xE4, 0x34, 0x9C, 0xF5, 0x83, 0x22,
+0x7E, 0x00, 0x7F, 0x08, 0x7D, 0x00, 0x22, 0xF0,
+0x90, 0x9A, 0x42, 0x02, 0x82, 0x1E, 0x12, 0x82,
+0x27, 0x90, 0x9C, 0x64, 0xE0, 0x22, 0x90, 0x93,
+0x24, 0xE0, 0x13, 0x13, 0x22, 0xF0, 0xA3, 0xF0,
+0xA3, 0xF0, 0xA3, 0xF0, 0xA3, 0xF0, 0x22, 0x12,
+0xAD, 0xF3, 0xE4, 0x90, 0x98, 0x41, 0xF1, 0xAF,
+0x90, 0x95, 0x93, 0xF1, 0xAD, 0xA3, 0xF1, 0xAD,
+0x90, 0x95, 0xA5, 0xF0, 0xA3, 0xF0, 0x90, 0x95,
+0xE7, 0xF0, 0xA3, 0xF0, 0x22, 0x90, 0x93, 0x24,
+0x12, 0xDC, 0xB9, 0x30, 0xE0, 0x02, 0xF1, 0xB7,
+0x22, 0xF0, 0xEE, 0x54, 0x08, 0xFE, 0xEF, 0x54,
+0xF7, 0x4E, 0xFF, 0xF0, 0x02, 0x02, 0x06, 0xF1,
+0xD5, 0x90, 0x93, 0x24, 0xE0, 0xFF, 0xC4, 0x54,
+0x0F, 0x30, 0xE0, 0x06, 0x12, 0xA0, 0x03, 0x12,
+0xCA, 0x2D, 0x22, 0x90, 0x01, 0x53, 0xE4, 0xF0,
+0xFF, 0x12, 0xF9, 0x87, 0xE4, 0xF0, 0x0F, 0xEF,
+0xB4, 0x08, 0xF6, 0x22, 0x90, 0x9A, 0x38, 0xEC,
+0xF0, 0xA3, 0xED, 0xF0, 0x90, 0x9A, 0x36, 0xEE,
+0xF0, 0xA3, 0xEF, 0xF0, 0xE4, 0x90, 0x9A, 0x5C,
+0xF0, 0xEF, 0x24, 0x24, 0xFF, 0xE4, 0x3E, 0xFE,
+0xC0, 0x06, 0x91, 0xB0, 0xD0, 0x06, 0xE4, 0xFB,
+0xFA, 0x91, 0x64, 0x4E, 0x60, 0x39, 0xE0, 0x24,
+0x01, 0x71, 0xC7, 0x51, 0x3B, 0x90, 0x9A, 0x3B,
+0x91, 0x99, 0x90, 0x9A, 0x3B, 0x91, 0x84, 0xFE,
+0xC3, 0x9F, 0x50, 0x23, 0x90, 0x9A, 0x5E, 0xE0,
+0x24, 0x02, 0xFD, 0x71, 0xC8, 0xFC, 0xEE, 0x7E,
+0x00, 0x2D, 0x51, 0x38, 0x90, 0x9A, 0x3A, 0xE0,
+0x24, 0x3C, 0xF5, 0x82, 0xE4, 0x34, 0x9A, 0xF5,
+0x83, 0xEF, 0xF0, 0x91, 0x7A, 0x80, 0xD3, 0x91,
+0xA1, 0xC0, 0x06, 0x91, 0xB0, 0xD0, 0x06, 0x7B,
+0x03, 0x91, 0x61, 0x90, 0x9A, 0x37, 0xE0, 0x24,
+0x22, 0x91, 0xA7, 0x90, 0x9A, 0x5D, 0xF0, 0xA3,
+0xEF, 0xF0, 0x51, 0x3C, 0xEF, 0x20, 0xE4, 0x02,
+0x21, 0x3A, 0x90, 0x9A, 0x5C, 0xE0, 0x04, 0xF0,
+0x91, 0xA1, 0xC0, 0x06, 0x91, 0xB0, 0xD0, 0x06,
+0x7B, 0x30, 0x91, 0x61, 0x4E, 0x60, 0x3C, 0xE0,
+0x24, 0x08, 0x71, 0xC7, 0x51, 0x3B, 0x91, 0x96,
+0x91, 0x81, 0xC3, 0x9F, 0x50, 0x2D, 0x90, 0x9A,
+0x5E, 0xE0, 0x24, 0x0D, 0x71, 0xC7, 0x51, 0x3B,
+0x90, 0x9A, 0x5F, 0xEF, 0xF0, 0xBF, 0x02, 0x09,
+0x90, 0x9A, 0x5C, 0xE0, 0x24, 0x20, 0xF0, 0x80,
+0x0E, 0x90, 0x9A, 0x5F, 0xE0, 0xB4, 0x04, 0x07,
+0x90, 0x9A, 0x5C, 0xE0, 0x24, 0x40, 0xF0, 0x91,
+0x70, 0x80, 0xCD, 0x91, 0xA1, 0xC0, 0x06, 0x91,
+0xB0, 0xD0, 0x06, 0x7B, 0xDD, 0x7A, 0x00, 0x7D,
+0x01, 0x91, 0x65, 0x4E, 0x60, 0x41, 0xE0, 0x24,
+0x0C, 0x71, 0xC7, 0x51, 0x3B, 0x91, 0x96, 0x91,
+0x81, 0xC3, 0x9F, 0x50, 0x32, 0x90, 0x9A, 0x5E,
+0xE0, 0x24, 0x11, 0x71, 0xC7, 0x51, 0x3B, 0x90,
+0x9A, 0x5F, 0xEF, 0xF0, 0xBF, 0x02, 0x09, 0x90,
+0x9A, 0x5C, 0xE0, 0x24, 0x02, 0xF0, 0x80, 0x0E,
+0x90, 0x9A, 0x5F, 0xE0, 0xB4, 0x04, 0x07, 0x90,
+0x9A, 0x5C, 0xE0, 0x24, 0x04, 0xF0, 0x91, 0x70,
+0x80, 0xCD, 0xE4, 0x90, 0x9A, 0x5C, 0xF0, 0x90,
+0x95, 0xE9, 0xE0, 0x90, 0x04, 0xFD, 0x91, 0x9A,
+0x90, 0x95, 0xE9, 0x91, 0x84, 0xFE, 0xC3, 0x9F,
+0x50, 0x5C, 0x12, 0xFB, 0x26, 0xF5, 0x83, 0xF1,
+0xDE, 0x6F, 0x70, 0x4E, 0x90, 0x04, 0xFC, 0xE0,
+0x04, 0xF0, 0x90, 0x9A, 0x3A, 0xE0, 0x24, 0x09,
+0xF5, 0x82, 0xE4, 0x34, 0x96, 0xF5, 0x83, 0xE0,
+0xFF, 0x90, 0x9A, 0x5C, 0xE0, 0xFD, 0x4F, 0x60,
+0x04, 0xED, 0x5F, 0x60, 0x2D, 0xEE, 0xFF, 0x7E,
+0x00, 0xC0, 0x06, 0xC0, 0x07, 0x90, 0x9A, 0x3A,
+0xE0, 0x75, 0xF0, 0x20, 0xA4, 0x24, 0x31, 0xF9,
+0x74, 0x96, 0xF1, 0x88, 0x7D, 0x01, 0xD0, 0x07,
+0xD0, 0x06, 0x12, 0x83, 0xDC, 0xEF, 0x70, 0x0A,
+0x90, 0x01, 0xC7, 0x74, 0x55, 0xF1, 0x70, 0x12,
+0x9F, 0xF1, 0x91, 0x7A, 0x80, 0x9A, 0xE4, 0x90,
+0x9A, 0x3A, 0xF0, 0x90, 0x9A, 0x3A, 0xE0, 0xFF,
+0xC3, 0x94, 0x03, 0x50, 0x5E, 0xA3, 0xE0, 0xFE,
+0x60, 0x55, 0xEF, 0x75, 0xF0, 0x21, 0xA4, 0x24,
+0x26, 0xF5, 0x82, 0xE4, 0x34, 0x9B, 0xF5, 0x83,
+0xE0, 0xFF, 0xEE, 0x6F, 0x70, 0x41, 0x90, 0x04,
+0xFC, 0xE0, 0x04, 0xF0, 0x90, 0x9A, 0x3B, 0xE0,
+0xFF, 0x7E, 0x00, 0xC0, 0x06, 0xC0, 0x07, 0x90,
+0x9A, 0x3A, 0xE0, 0x75, 0xF0, 0x21, 0xA4, 0x24,
+0x27, 0xF9, 0x74, 0x9B, 0xF1, 0x88, 0x7D, 0x01,
+0xD0, 0x07, 0xD0, 0x06, 0x12, 0x83, 0xDC, 0xEF,
+0x70, 0x15, 0x90, 0x01, 0xC7, 0x74, 0x24, 0xF1,
+0x70, 0x12, 0xD6, 0x11, 0x30, 0xE0, 0x02, 0x11,
+0x03, 0xF1, 0x82, 0xE4, 0xFF, 0xD1, 0xCA, 0x91,
+0x7A, 0x80, 0x98, 0x22, 0x90, 0x9A, 0x36, 0xE0,
+0xFD, 0x90, 0x9A, 0x35, 0xE0, 0x2D, 0xFD, 0x90,
+0x9A, 0x34, 0xE0, 0x34, 0x00, 0xCD, 0x24, 0x10,
+0xCD, 0x34, 0x00, 0xFC, 0x7E, 0x00, 0xED, 0x2F,
+0xFF, 0xEE, 0x3C, 0xFE, 0x90, 0x8A, 0xE9, 0xE0,
+0xFC, 0xA3, 0xE0, 0xF5, 0x82, 0x8C, 0x83, 0xE4,
+0xFD, 0x02, 0x04, 0x7E, 0xD3, 0x10, 0xAF, 0x01,
+0xC3, 0xC0, 0xD0, 0x90, 0x06, 0x31, 0xE0, 0x54,
+0xEF, 0x44, 0x08, 0xF0, 0xED, 0x2F, 0xFF, 0xE4,
+0x3E, 0xFE, 0x7C, 0x00, 0xEF, 0x24, 0x08, 0x12,
+0xFA, 0xC4, 0x7E, 0x00, 0x7F, 0xE3, 0x7D, 0x00,
+0x7B, 0x01, 0x7A, 0x94, 0x79, 0x39, 0x12, 0x04,
+0x80, 0x90, 0x9A, 0x3E, 0xE0, 0x24, 0x01, 0x71,
+0xBF, 0x51, 0x3B, 0x90, 0x94, 0x3A, 0xEF, 0xF0,
+0x90, 0x9A, 0x3E, 0xE0, 0x24, 0x04, 0x71, 0xBF,
+0x51, 0x3B, 0x90, 0x94, 0x3D, 0xEF, 0xF0, 0x90,
+0x9A, 0x3E, 0xE0, 0x24, 0x05, 0x71, 0xBF, 0x51,
+0x3B, 0x90, 0x94, 0x3E, 0xEF, 0xF0, 0x90, 0x9A,
+0x3E, 0xE0, 0x24, 0x06, 0x71, 0xBF, 0x51, 0x3B,
+0x90, 0x94, 0x3F, 0xEF, 0xF0, 0x90, 0x9A, 0x3E,
+0xE0, 0x24, 0x07, 0x71, 0xBF, 0x51, 0x3B, 0x90,
+0x94, 0x40, 0xEF, 0xF0, 0x90, 0x9A, 0x3E, 0xE0,
+0x24, 0x08, 0x71, 0xBF, 0x51, 0x3B, 0x90, 0x94,
+0x41, 0xEF, 0xF0, 0xE4, 0x90, 0x9A, 0x3C, 0xF0,
+0xD1, 0x39, 0x94, 0x08, 0x50, 0x1C, 0x90, 0x9A,
+0x3E, 0xE0, 0x24, 0x09, 0xFD, 0x90, 0x9A, 0x3D,
+0xE0, 0x51, 0x31, 0x90, 0x9A, 0x3C, 0xE0, 0x24,
+0x42, 0xF5, 0x82, 0xE4, 0x34, 0x94, 0x91, 0x8B,
+0x80, 0xDE, 0xE4, 0x90, 0x9A, 0x3C, 0xF0, 0xD1,
+0x39, 0x94, 0x02, 0x50, 0x1C, 0x90, 0x9A, 0x3E,
 0xE0, 0x24, 0x61, 0xFD, 0x90, 0x9A, 0x3D, 0xE0,
-0x91, 0x57, 0x90, 0x9A, 0x3C, 0xE0, 0x24, 0x9A,
-0xF5, 0x82, 0xE4, 0x34, 0x94, 0xD1, 0xA7, 0x80,
-0xDD, 0xE4, 0x90, 0x9A, 0x3C, 0xF0, 0x12, 0xFA,
-0x7D, 0x94, 0x10, 0x50, 0x1C, 0x90, 0x9A, 0x3E,
-0xE0, 0x24, 0x31, 0xFD, 0x90, 0x9A, 0x3D, 0xE0,
-0x91, 0x57, 0x90, 0x9A, 0x3C, 0xE0, 0x24, 0x6A,
-0xF5, 0x82, 0xE4, 0x34, 0x94, 0xD1, 0xA7, 0x80,
-0xDD, 0xE4, 0x90, 0x9A, 0x3C, 0xF0, 0x90, 0x94,
-0x9B, 0xE0, 0xFF, 0x90, 0x9A, 0x3C, 0xE0, 0xFE,
-0xC3, 0x9F, 0x50, 0x1F, 0x90, 0x9A, 0x3E, 0xE0,
-0x24, 0x63, 0xFD, 0xB1, 0xE8, 0xFC, 0xEE, 0x7E,
-0x00, 0x2D, 0x91, 0x5E, 0x90, 0x9A, 0x3C, 0xE0,
-0x24, 0x9C, 0xF5, 0x82, 0xE4, 0x34, 0x94, 0xD1,
-0xA7, 0x80, 0xD3, 0x90, 0x94, 0x3E, 0x12, 0xFB,
-0x46, 0x90, 0x9A, 0x3A, 0xEE, 0xF0, 0xA3, 0xEF,
-0xF0, 0x30, 0xE3, 0x0C, 0x90, 0x01, 0xC7, 0x74,
-0x03, 0xF0, 0x7F, 0x01, 0xF1, 0x56, 0x80, 0x20,
+0x51, 0x31, 0x90, 0x9A, 0x3C, 0xE0, 0x24, 0x9A,
+0xF5, 0x82, 0xE4, 0x34, 0x94, 0x91, 0x8B, 0x80,
+0xDE, 0xE4, 0x90, 0x9A, 0x3C, 0xF0, 0xD1, 0x39,
+0x94, 0x10, 0x50, 0x1C, 0x90, 0x9A, 0x3E, 0xE0,
+0x24, 0x31, 0xFD, 0x90, 0x9A, 0x3D, 0xE0, 0x51,
+0x31, 0x90, 0x9A, 0x3C, 0xE0, 0x24, 0x6A, 0xF5,
+0x82, 0xE4, 0x34, 0x94, 0x91, 0x8B, 0x80, 0xDE,
+0xE4, 0x90, 0x9A, 0x3C, 0xF0, 0x90, 0x94, 0x9B,
+0xE0, 0xFF, 0x90, 0x9A, 0x3C, 0xE0, 0xFE, 0xC3,
+0x9F, 0x50, 0x1F, 0x90, 0x9A, 0x3E, 0xE0, 0x24,
+0x63, 0xFD, 0x71, 0xC0, 0xFC, 0xEE, 0x7E, 0x00,
+0x2D, 0x51, 0x38, 0x90, 0x9A, 0x3C, 0xE0, 0x24,
+0x9C, 0xF5, 0x82, 0xE4, 0x34, 0x94, 0x91, 0x8B,
+0x80, 0xD3, 0x90, 0x94, 0x3E, 0x12, 0xFB, 0x9C,
+0x90, 0x9A, 0x3A, 0xEE, 0xF0, 0xA3, 0xEF, 0xF0,
+0x30, 0xE3, 0x0D, 0x90, 0x01, 0xC7, 0x74, 0x03,
+0xF0, 0x7F, 0x01, 0x12, 0xAD, 0x5E, 0x80, 0x20,
 0x7E, 0x00, 0x90, 0x9A, 0x3B, 0xE0, 0x54, 0x07,
 0xFF, 0x64, 0x01, 0x60, 0x05, 0xEF, 0x64, 0x02,
-0x70, 0x0E, 0xE4, 0xFD, 0x12, 0xDD, 0x95, 0x90,
+0x70, 0x0E, 0xE4, 0xFD, 0x12, 0xEC, 0xE4, 0x90,
 0x06, 0x31, 0xE0, 0x54, 0xF7, 0x44, 0x10, 0xF0,
 0x7F, 0x00, 0xD0, 0xD0, 0x92, 0xAF, 0x22, 0xFF,
-0x90, 0x9A, 0x3D, 0xE0, 0x34, 0x00, 0x22, 0x90,
-0x9A, 0x39, 0xE0, 0xFE, 0xA3, 0xE0, 0xFF, 0x90,
-0x8A, 0xE9, 0xE0, 0xFC, 0xA3, 0xE0, 0xF5, 0x82,
-0x8C, 0x83, 0x22, 0x90, 0x9A, 0x36, 0xED, 0x12,
-0xB7, 0x76, 0x12, 0xE9, 0x71, 0xEF, 0x70, 0x02,
-0xC1, 0xA4, 0x12, 0xEA, 0x3C, 0x12, 0xFB, 0x20,
-0x70, 0x02, 0xC1, 0xA4, 0x12, 0xB5, 0xAD, 0xCF,
-0x24, 0x08, 0x12, 0xFA, 0x2F, 0x90, 0x93, 0x25,
-0xE0, 0xC4, 0x54, 0x0F, 0x30, 0xE0, 0x33, 0xB1,
-0xEF, 0x7D, 0x09, 0x12, 0x04, 0x7E, 0xEF, 0x64,
-0x06, 0x70, 0x27, 0xB1, 0xEF, 0x7D, 0x14, 0x12,
-0x04, 0x7E, 0xEF, 0x70, 0x1D, 0xB1, 0xEF, 0x7D,
-0x15, 0x12, 0x04, 0x7E, 0xEF, 0x64, 0x50, 0x70,
-0x11, 0xB1, 0xEF, 0x7D, 0x21, 0x12, 0x04, 0x7E,
-0xEF, 0x20, 0xE0, 0x03, 0x30, 0xE2, 0x03, 0x7F,
-0x01, 0x22, 0x90, 0x93, 0x25, 0xE0, 0x13, 0x13,
-0x54, 0x3F, 0x30, 0xE0, 0x37, 0xB1, 0xEF, 0x7D,
-0x09, 0x12, 0x04, 0x7E, 0xEF, 0x64, 0x11, 0x70,
-0x2B, 0x90, 0x9A, 0x3A, 0xE0, 0x24, 0x14, 0xFF,
-0x90, 0x9A, 0x39, 0xE0, 0x34, 0x00, 0xFE, 0x12,
-0xFB, 0x4E, 0xB1, 0xF7, 0x7D, 0x02, 0x12, 0x04,
-0x7E, 0xEF, 0x70, 0x10, 0x90, 0x9A, 0x37, 0xB1,
-0xF2, 0x7D, 0x03, 0x12, 0x04, 0x7E, 0xBF, 0x89,
-0x03, 0x7F, 0x01, 0x22, 0x7F, 0x00, 0x22, 0xF5,
-0x83, 0xEF, 0xF0, 0x90, 0x9A, 0x3C, 0xE0, 0x04,
-0xF0, 0x22, 0x90, 0x9A, 0x3B, 0x12, 0xF1, 0xCA,
-0x78, 0x3F, 0x7C, 0x9A, 0x7D, 0x01, 0x7B, 0xFF,
-0x7A, 0x80, 0x79, 0xBA, 0x7E, 0x00, 0x7F, 0x04,
-0x12, 0x01, 0xE0, 0x90, 0x9A, 0x3D, 0xE0, 0xFF,
-0x90, 0x9A, 0x3C, 0xE0, 0x2F, 0x12, 0xF9, 0xEE,
-0x90, 0x9A, 0x43, 0xF0, 0xA3, 0xEF, 0xF0, 0x24,
-0x06, 0xFF, 0xE4, 0x3E, 0x91, 0x61, 0xEF, 0x64,
-0x08, 0x70, 0x52, 0x90, 0x9A, 0x44, 0xE0, 0x24,
-0x07, 0xFF, 0x90, 0x9A, 0x43, 0xE0, 0x34, 0x00,
-0x91, 0x61, 0xEF, 0x70, 0x40, 0x90, 0x9A, 0x3E,
-0xF0, 0x90, 0x9A, 0x3E, 0xE0, 0xFF, 0xC3, 0x94,
-0x04, 0x50, 0x24, 0x90, 0x9A, 0x44, 0xE0, 0x24,
-0x18, 0xFD, 0x90, 0x9A, 0x43, 0xE0, 0x91, 0x57,
-0x90, 0x9A, 0x3E, 0xE0, 0x24, 0x3F, 0xF5, 0x82,
-0xE4, 0x34, 0x9A, 0xF5, 0x83, 0xEF, 0xF0, 0x90,
-0x9A, 0x3E, 0xE0, 0x04, 0xF0, 0x80, 0xD2, 0x78,
-0x3F, 0x7C, 0x9A, 0x12, 0xF9, 0xAA, 0xEF, 0x7F,
-0x00, 0x70, 0x02, 0x7F, 0x01, 0x22, 0x90, 0x9C,
-0x19, 0x74, 0x01, 0xF0, 0x22, 0xF0, 0x90, 0x93,
-0x31, 0xE0, 0x44, 0x01, 0xF0, 0x22, 0x90, 0x01,
-0xC7, 0x74, 0x10, 0xF0, 0x7F, 0x01, 0x90, 0x9C,
-0xE2, 0xEF, 0xF0, 0x90, 0x86, 0xB3, 0xE0, 0x64,
-0x02, 0x70, 0x20, 0x90, 0x9C, 0xE2, 0xE0, 0xFD,
-0x64, 0x01, 0x70, 0x7A, 0xF1, 0x46, 0x11, 0x9B,
-0x30, 0xE0, 0x09, 0x90, 0x01, 0x4D, 0xE0, 0x64,
-0x80, 0xF0, 0x80, 0x6A, 0xAF, 0x05, 0x12, 0xE2,
-0xE6, 0x80, 0x63, 0x90, 0x86, 0xB3, 0xE0, 0x64,
-0x03, 0x70, 0x2E, 0x90, 0x99, 0xB0, 0xE0, 0xFF,
-0x30, 0xE0, 0x26, 0x90, 0x00, 0xD4, 0xE0, 0x54,
-0xEF, 0xF0, 0x90, 0x00, 0xC6, 0xE0, 0x54, 0xFD,
-0xF0, 0x90, 0x00, 0x01, 0xE0, 0x44, 0x30, 0xF0,
-0x90, 0x00, 0x23, 0xE0, 0x44, 0x80, 0xF0, 0x12,
-0xC6, 0x59, 0xEF, 0x54, 0xFE, 0x90, 0x99, 0xB0,
-0xF0, 0x90, 0x06, 0x90, 0xE0, 0x44, 0x20, 0x12,
-0xE1, 0x4E, 0x12, 0xFB, 0x3F, 0x90, 0x06, 0x90,
-0xE0, 0x44, 0x01, 0xF0, 0x90, 0x9C, 0xE2, 0xE0,
-0xFF, 0x12, 0xE2, 0xE6, 0x12, 0xC7, 0xDC, 0xFB,
-0xFD, 0x12, 0xB2, 0x4C, 0x12, 0xC6, 0x44, 0x90,
-0x00, 0x04, 0xE0, 0x44, 0x08, 0xF0, 0x12, 0xD6,
-0x18, 0xF0, 0x90, 0x93, 0x24, 0xE0, 0x54, 0xBF,
-0xF0, 0x22, 0x90, 0x99, 0xB1, 0x02, 0x82, 0x1E,
-0x12, 0x02, 0x06, 0x90, 0x88, 0x9C, 0xF0, 0x22,
-0x12, 0x02, 0x06, 0xFF, 0x54, 0x01, 0xFE, 0x90,
-0x93, 0x08, 0xE0, 0x54, 0xFE, 0x4E, 0xFE, 0xF0,
-0xEF, 0x54, 0x02, 0xFF, 0xEE, 0x54, 0xFD, 0x4F,
-0xF0, 0x12, 0x9C, 0x54, 0x90, 0x93, 0x09, 0x12,
-0x87, 0xE6, 0x90, 0x93, 0x0A, 0xF0, 0x12, 0xD7,
-0x79, 0x90, 0x93, 0x08, 0xE0, 0x54, 0x01, 0xFF,
-0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0x90,
-0x9C, 0xE6, 0xEF, 0xF0, 0x90, 0x93, 0x04, 0x91,
-0x3D, 0x30, 0xE0, 0x37, 0xF1, 0xCB, 0x60, 0x0F,
-0xF1, 0xC1, 0x40, 0x0B, 0xE4, 0x7F, 0x0A, 0xFE,
-0xFD, 0xFC, 0x90, 0x95, 0xF5, 0x80, 0x09, 0xE4,
-0x7F, 0x0A, 0xFE, 0xFD, 0xFC, 0x90, 0x95, 0xED,
-0x12, 0x82, 0x12, 0x12, 0x80, 0xDB, 0xC0, 0x07,
-0x90, 0x93, 0x0A, 0xE0, 0xFB, 0xE4, 0xFA, 0xF9,
-0xF8, 0xD0, 0x07, 0x12, 0x81, 0x66, 0x90, 0x93,
-0x0B, 0xEF, 0xF0, 0x90, 0x9C, 0xE6, 0xE0, 0x64,
-0x01, 0x70, 0x1A, 0x71, 0xD1, 0x60, 0x0A, 0x11,
-0xC2, 0x12, 0x7C, 0x05, 0x12, 0xD7, 0x70, 0x80,
-0x07, 0x11, 0xC2, 0x12, 0x7C, 0x3B, 0xD1, 0xAA,
-0x12, 0x79, 0xD4, 0x80, 0x1C, 0x71, 0xD1, 0x60,
-0x07, 0x11, 0xC2, 0x12, 0x7C, 0x05, 0x80, 0x05,
-0x11, 0xC2, 0x12, 0x7C, 0x3B, 0x7D, 0x02, 0x7F,
-0x02, 0x12, 0x7C, 0x74, 0xF1, 0xBA, 0x12, 0x7B,
-0xCC, 0xD0, 0xD0, 0x92, 0xAF, 0x22, 0xF0, 0x90,
-0x01, 0x3F, 0x74, 0x10, 0xF0, 0xFD, 0x7F, 0x03,
-0x22, 0x90, 0x9A, 0x38, 0xEC, 0xF0, 0xA3, 0xED,
-0xF0, 0x90, 0x9A, 0x36, 0xEE, 0xF0, 0xA3, 0xEF,
-0xF0, 0xE4, 0x90, 0x9A, 0x5C, 0xF0, 0xEF, 0x24,
-0x24, 0xFF, 0xE4, 0x3E, 0xFE, 0xC0, 0x06, 0x71,
-0xBC, 0xD0, 0x06, 0xE4, 0xFB, 0xFA, 0x71, 0x8C,
-0x4E, 0x60, 0x3B, 0xE0, 0x24, 0x01, 0x51, 0xDC,
-0x12, 0xA4, 0x61, 0x90, 0x9A, 0x3B, 0x71, 0xA5,
-0x90, 0x9A, 0x3B, 0x71, 0x9B, 0xFE, 0xC3, 0x9F,
-0x50, 0x24, 0x90, 0x9A, 0x5E, 0xE0, 0x24, 0x02,
-0xFD, 0x51, 0xDD, 0xFC, 0xEE, 0x7E, 0x00, 0x2D,
-0x12, 0xA4, 0x5E, 0x90, 0x9A, 0x3A, 0xE0, 0x24,
-0x3C, 0xF5, 0x82, 0xE4, 0x34, 0x9A, 0xF5, 0x83,
-0xEF, 0xF0, 0x51, 0xEE, 0x80, 0xD2, 0x71, 0xAD,
-0xC0, 0x06, 0x71, 0xBC, 0xD0, 0x06, 0x7B, 0x03,
-0x71, 0x89, 0x90, 0x9A, 0x37, 0xE0, 0x24, 0x22,
-0x71, 0xB3, 0x90, 0x9A, 0x5D, 0xF0, 0xA3, 0xEF,
-0xF0, 0x12, 0xA4, 0x62, 0xEF, 0x20, 0xE4, 0x02,
-0x21, 0xF6, 0x90, 0x9A, 0x5C, 0xE0, 0x04, 0xF0,
-0x71, 0xAD, 0xC0, 0x06, 0x71, 0xBC, 0xD0, 0x06,
-0x7B, 0x30, 0x71, 0x89, 0x4E, 0x60, 0x3E, 0xE0,
-0x24, 0x08, 0x51, 0xDC, 0x12, 0xA4, 0x61, 0x71,
-0xA2, 0x71, 0x98, 0xC3, 0x9F, 0x50, 0x2E, 0x90,
-0x9A, 0x5E, 0xE0, 0x24, 0x0D, 0x51, 0xDC, 0x12,
-0xA4, 0x61, 0x90, 0x9A, 0x5F, 0xEF, 0xF0, 0xBF,
-0x02, 0x09, 0x90, 0x9A, 0x5C, 0xE0, 0x24, 0x20,
-0xF0, 0x80, 0x0E, 0x90, 0x9A, 0x5F, 0xE0, 0xB4,
-0x04, 0x07, 0x90, 0x9A, 0x5C, 0xE0, 0x24, 0x40,
-0xF0, 0x51, 0xE4, 0x80, 0xCC, 0x71, 0xAD, 0xC0,
-0x06, 0x71, 0xBC, 0xD0, 0x06, 0x7B, 0xDD, 0x7A,
-0x00, 0x7D, 0x01, 0x71, 0x8D, 0x4E, 0x60, 0x43,
-0xE0, 0x24, 0x0C, 0x51, 0xDC, 0x12, 0xA4, 0x61,
-0x71, 0xA2, 0x71, 0x98, 0xC3, 0x9F, 0x50, 0x33,
-0x90, 0x9A, 0x5E, 0xE0, 0x24, 0x11, 0x51, 0xDC,
-0x12, 0xA4, 0x61, 0x90, 0x9A, 0x5F, 0xEF, 0xF0,
-0xBF, 0x02, 0x09, 0x90, 0x9A, 0x5C, 0xE0, 0x24,
-0x02, 0xF0, 0x80, 0x0E, 0x90, 0x9A, 0x5F, 0xE0,
-0xB4, 0x04, 0x07, 0x90, 0x9A, 0x5C, 0xE0, 0x24,
-0x04, 0xF0, 0x51, 0xE4, 0x80, 0xCC, 0xE4, 0x90,
-0x9A, 0x5C, 0xF0, 0x90, 0x95, 0xE9, 0xE0, 0x90,
-0x04, 0xFD, 0x71, 0xA6, 0x90, 0x95, 0xE9, 0x71,
-0x9B, 0xFE, 0xC3, 0x9F, 0x50, 0x5E, 0x12, 0xFA,
-0xBD, 0xF5, 0x83, 0x12, 0xFB, 0x37, 0x6F, 0x70,
-0x4F, 0x90, 0x04, 0xFC, 0xE0, 0x04, 0xF0, 0x90,
-0x9A, 0x3A, 0xE0, 0x24, 0x09, 0xF5, 0x82, 0xE4,
-0x34, 0x96, 0xF5, 0x83, 0xE0, 0xFF, 0x90, 0x9A,
-0x5C, 0xE0, 0xFD, 0x4F, 0x60, 0x04, 0xED, 0x5F,
-0x60, 0x2E, 0xEE, 0xFF, 0x7E, 0x00, 0xC0, 0x06,
-0xC0, 0x07, 0x90, 0x9A, 0x3A, 0xE0, 0x75, 0xF0,
-0x20, 0xA4, 0x24, 0x31, 0xF9, 0x74, 0x96, 0x71,
-0xE2, 0x7D, 0x01, 0xD0, 0x07, 0xD0, 0x06, 0x12,
-0x83, 0xDC, 0xEF, 0x70, 0x0B, 0x90, 0x01, 0xC7,
-0x74, 0x55, 0x12, 0xA7, 0x45, 0x12, 0xC2, 0x71,
-0x51, 0xEE, 0x80, 0x98, 0xE4, 0x90, 0x9A, 0x3A,
-0xF0, 0x90, 0x9A, 0x3A, 0xE0, 0xFF, 0xC3, 0x94,
-0x03, 0x50, 0x60, 0xA3, 0xE0, 0xFE, 0x60, 0x57,
-0xEF, 0x75, 0xF0, 0x21, 0xA4, 0x24, 0x26, 0xF5,
-0x82, 0xE4, 0x34, 0x9B, 0xF5, 0x83, 0xE0, 0xFF,
-0xEE, 0x6F, 0x70, 0x43, 0x90, 0x04, 0xFC, 0xE0,
-0x04, 0xF0, 0x90, 0x9A, 0x3B, 0xE0, 0xFF, 0x7E,
-0x00, 0xC0, 0x06, 0xC0, 0x07, 0x90, 0x9A, 0x3A,
-0xE0, 0x75, 0xF0, 0x21, 0xA4, 0x24, 0x27, 0xF9,
-0x74, 0x9B, 0x71, 0xE2, 0x7D, 0x01, 0xD0, 0x07,
-0xD0, 0x06, 0x12, 0x83, 0xDC, 0xEF, 0x70, 0x17,
-0x90, 0x01, 0xC7, 0x74, 0x24, 0x12, 0xA7, 0x45,
-0x12, 0xF3, 0xA7, 0x30, 0xE0, 0x03, 0x12, 0xC2,
-0x81, 0xF1, 0xB4, 0xE4, 0xFF, 0x11, 0x30, 0x51,
-0xEE, 0x80, 0x96, 0x22, 0xFF, 0x90, 0x9A, 0x5D,
-0xE0, 0x34, 0x00, 0x22, 0x90, 0x9A, 0x5D, 0xE4,
-0x75, 0xF0, 0x04, 0x12, 0x02, 0xE7, 0x90, 0x9A,
-0x3A, 0xE0, 0x04, 0xF0, 0x22, 0x12, 0xF1, 0xC7,
-0xA3, 0xEA, 0xF0, 0xA3, 0xEB, 0xF0, 0xC3, 0x90,
-0x9A, 0x67, 0xE0, 0x94, 0x01, 0x90, 0x9A, 0x66,
-0xE0, 0x94, 0x00, 0x50, 0x02, 0x80, 0x76, 0xE4,
-0x90, 0x9A, 0x6A, 0xF0, 0xA3, 0xF0, 0x71, 0xD9,
-0x12, 0xA4, 0x62, 0x90, 0x9A, 0x64, 0xE0, 0x70,
+0x90, 0x9A, 0x3D, 0xE0, 0x34, 0x00, 0x22, 0xFF,
+0x90, 0x9A, 0x5D, 0xE0, 0x34, 0x00, 0x22, 0xF1,
+0xE6, 0xA3, 0xEA, 0xF0, 0xA3, 0xEB, 0xF0, 0xC3,
+0x90, 0x9A, 0x67, 0xE0, 0x94, 0x01, 0x90, 0x9A,
+0x66, 0xE0, 0x94, 0x00, 0x50, 0x02, 0x80, 0x75,
+0xE4, 0x90, 0x9A, 0x6A, 0xF0, 0xA3, 0xF0, 0xF1,
+0x79, 0x51, 0x3C, 0x90, 0x9A, 0x64, 0xE0, 0x70,
 0x03, 0xA3, 0xE0, 0x6F, 0x70, 0x1D, 0x90, 0x9A,
 0x62, 0xE0, 0x24, 0x02, 0xFF, 0x90, 0x9A, 0x61,
 0xE0, 0x34, 0x00, 0xFE, 0x90, 0x9A, 0x63, 0xE0,
-0xFD, 0x12, 0xF4, 0x4A, 0xBF, 0x01, 0x02, 0x61,
-0xD9, 0x80, 0x00, 0x90, 0x9A, 0x62, 0xE0, 0x24,
+0xFD, 0x12, 0xF6, 0x3B, 0xBF, 0x01, 0x02, 0xE1,
+0x79, 0x80, 0x00, 0x90, 0x9A, 0x62, 0xE0, 0x24,
 0x01, 0xFF, 0x90, 0x9A, 0x61, 0xE0, 0x34, 0x00,
-0x12, 0xA4, 0x61, 0x7E, 0x00, 0x90, 0x9A, 0x68,
-0xEE, 0xF0, 0xA3, 0xEF, 0xF0, 0x24, 0x02, 0xFF,
-0xEE, 0x33, 0xFE, 0x90, 0x9A, 0x61, 0x8F, 0xF0,
-0x12, 0x02, 0xE7, 0x90, 0x9A, 0x6A, 0xEE, 0x8F,
-0xF0, 0x12, 0x02, 0xE7, 0x90, 0x9A, 0x66, 0xF1,
-0xEE, 0x90, 0x9A, 0x6B, 0xE0, 0x9F, 0x90, 0x9A,
-0x6A, 0xE0, 0x9E, 0x40, 0x91, 0xE4, 0xFE, 0xFF,
-0x22, 0x7A, 0x00, 0xE4, 0xFD, 0x51, 0xF5, 0x90,
+0x51, 0x3B, 0x7E, 0x00, 0x90, 0x9A, 0x68, 0xEE,
+0xF0, 0xA3, 0xEF, 0xF0, 0x24, 0x02, 0xFF, 0xEE,
+0x33, 0xFE, 0x90, 0x9A, 0x61, 0x8F, 0xF0, 0x12,
+0x02, 0xE7, 0x90, 0x9A, 0x6A, 0xEE, 0x8F, 0xF0,
+0x12, 0x02, 0xE7, 0x90, 0x9A, 0x66, 0x12, 0xC7,
+0x9B, 0x90, 0x9A, 0x6B, 0xE0, 0x9F, 0x90, 0x9A,
+0x6A, 0xE0, 0x9E, 0x40, 0x92, 0xE4, 0xFE, 0xFF,
+0x22, 0x7A, 0x00, 0xE4, 0xFD, 0x71, 0xCF, 0x90,
 0x9A, 0x5D, 0xEE, 0xF0, 0xA3, 0xEF, 0xF0, 0x22,
-0x90, 0x9A, 0x60, 0xE0, 0xFF, 0x90, 0x9A, 0x3A,
-0xE0, 0x22, 0x90, 0x9A, 0x60, 0xEF, 0xF0, 0xE4,
-0x90, 0x9A, 0x3A, 0xF0, 0x22, 0x90, 0x9A, 0x37,
-0xE0, 0x24, 0x24, 0xFF, 0x90, 0x9A, 0x36, 0xE0,
-0x34, 0x00, 0xFE, 0x22, 0x90, 0x9A, 0x39, 0xE0,
-0x24, 0xDC, 0xFE, 0x90, 0x9A, 0x38, 0xE0, 0x34,
-0xFF, 0x90, 0x9A, 0x66, 0xF0, 0xA3, 0xCE, 0xF0,
-0x22, 0x90, 0x93, 0x0A, 0xE0, 0x90, 0x01, 0x3F,
+0x90, 0x9A, 0x5D, 0xE4, 0x75, 0xF0, 0x04, 0x12,
+0x02, 0xE7, 0x90, 0x9A, 0x3A, 0xE0, 0x04, 0xF0,
+0x22, 0x90, 0x9A, 0x60, 0xE0, 0xFF, 0x90, 0x9A,
+0x3A, 0xE0, 0x22, 0xF5, 0x83, 0xEF, 0xF0, 0x90,
+0x9A, 0x3C, 0xE0, 0x04, 0xF0, 0x22, 0x90, 0x9A,
+0x60, 0xEF, 0xF0, 0xE4, 0x90, 0x9A, 0x3A, 0xF0,
+0x22, 0x90, 0x9A, 0x37, 0xE0, 0x24, 0x24, 0xFF,
+0x90, 0x9A, 0x36, 0xE0, 0x34, 0x00, 0xFE, 0x22,
+0x90, 0x9A, 0x39, 0xE0, 0x24, 0xDC, 0xFE, 0x90,
+0x9A, 0x38, 0xE0, 0x34, 0xFF, 0x90, 0x9A, 0x66,
+0xF0, 0xA3, 0xCE, 0xF0, 0x22, 0x12, 0xE8, 0x98,
+0xA3, 0xED, 0xF0, 0x12, 0xFB, 0x65, 0x7A, 0x80,
+0x79, 0x80, 0x7E, 0x00, 0x7F, 0x06, 0x12, 0x01,
+0xE0, 0x78, 0x43, 0x7C, 0x9A, 0x7D, 0x01, 0x7B,
+0xFF, 0x7A, 0x80, 0x79, 0x86, 0x7E, 0x00, 0x7F,
+0x04, 0x12, 0x01, 0xE0, 0x78, 0x47, 0x7C, 0x9A,
+0x7D, 0x01, 0x7B, 0xFF, 0x7A, 0x80, 0x79, 0x8A,
+0x7E, 0x00, 0x7F, 0x04, 0x12, 0x01, 0xE0, 0xE4,
+0x90, 0x9A, 0x4C, 0xF0, 0xD1, 0x27, 0xCF, 0x24,
+0x06, 0xCF, 0x34, 0x00, 0x51, 0x3B, 0xEF, 0x64,
+0x08, 0x60, 0x02, 0xC1, 0x0F, 0xD1, 0x27, 0xCF,
+0x24, 0x07, 0xCF, 0x34, 0x00, 0x51, 0x3B, 0xEF,
+0x64, 0x06, 0x60, 0x02, 0xC1, 0x0F, 0x90, 0x9A,
+0x4C, 0x04, 0xF0, 0xE4, 0x90, 0x9A, 0x4B, 0xF0,
+0xD1, 0x15, 0x94, 0x06, 0x50, 0x17, 0x90, 0x9A,
+0x35, 0xE0, 0x24, 0x0A, 0xFD, 0x90, 0x9A, 0x34,
+0xE0, 0x51, 0x31, 0x90, 0x9A, 0x4B, 0x12, 0xFB,
+0x5C, 0xD1, 0x1C, 0x80, 0xE3, 0x78, 0x37, 0x7C,
+0x9A, 0x7D, 0x01, 0x7B, 0x01, 0x7A, 0x93, 0x79,
+0x38, 0x12, 0xE8, 0x87, 0x60, 0x02, 0xC1, 0x0F,
+0x90, 0x9A, 0x4B, 0xF0, 0xD1, 0x15, 0x94, 0x04,
+0x50, 0x18, 0xF1, 0x92, 0xD1, 0x32, 0xCD, 0x24,
+0x20, 0x51, 0x30, 0x90, 0x9A, 0x4B, 0xE0, 0x24,
+0x47, 0xF5, 0x82, 0xE4, 0x34, 0x9A, 0xD1, 0x1C,
+0x80, 0xE2, 0x78, 0x47, 0x7C, 0x9A, 0xF1, 0xF2,
+0xEF, 0x70, 0x7B, 0x90, 0x06, 0x30, 0xE0, 0x44,
+0x01, 0x54, 0xDF, 0xF0, 0x90, 0x93, 0x26, 0xE0,
+0x30, 0xE0, 0x02, 0x80, 0x10, 0x90, 0x98, 0x35,
+0xE0, 0xB4, 0x02, 0x12, 0x90, 0x93, 0x25, 0x12,
+0x97, 0xD1, 0x20, 0xE0, 0x09, 0x90, 0x01, 0xC7,
+0x74, 0x09, 0xF1, 0x70, 0x80, 0x59, 0xE4, 0x90,
+0x9A, 0x4B, 0xF0, 0xD1, 0x15, 0x94, 0x06, 0x50,
+0x0C, 0x51, 0x1C, 0x90, 0x9A, 0x4B, 0x12, 0xFA,
+0x8C, 0xD1, 0x1C, 0x80, 0xEE, 0xE4, 0x90, 0x9A,
+0x4B, 0xF0, 0xD1, 0x15, 0x94, 0x04, 0x50, 0x18,
+0xF1, 0x92, 0xD1, 0x32, 0xCD, 0x24, 0x16, 0x51,
+0x30, 0x90, 0x9A, 0x4B, 0xE0, 0x24, 0x43, 0xF5,
+0x82, 0xE4, 0x34, 0x9A, 0xD1, 0x1C, 0x80, 0xE2,
+0x12, 0x94, 0xFF, 0x7B, 0x01, 0x7A, 0x9A, 0x79,
+0x3D, 0x12, 0xFA, 0xA2, 0xF0, 0x7A, 0x9A, 0x79,
+0x43, 0x12, 0x8B, 0xEA, 0x80, 0x09, 0x90, 0x06,
+0x30, 0xE0, 0x44, 0x21, 0x54, 0xEF, 0xF0, 0x90,
+0x9A, 0x4C, 0xE0, 0xFF, 0x22, 0x90, 0x9A, 0x4B,
+0xE0, 0xFF, 0xC3, 0x22, 0xF5, 0x83, 0xEF, 0xF0,
+0x90, 0x9A, 0x4B, 0xE0, 0x04, 0xF0, 0x22, 0x90,
+0x9A, 0x36, 0xE0, 0xFF, 0x90, 0x9A, 0x35, 0xE0,
+0x2F, 0xFF, 0x90, 0x9A, 0x34, 0xE0, 0x34, 0x00,
+0x22, 0x90, 0x9A, 0x3C, 0xE0, 0xFF, 0xC3, 0x22,
+0x90, 0x9A, 0x3B, 0xF1, 0xE9, 0x78, 0x3F, 0x7C,
+0x9A, 0x7D, 0x01, 0x7B, 0xFF, 0x7A, 0x80, 0x79,
+0xBA, 0x7E, 0x00, 0x7F, 0x04, 0x12, 0x01, 0xE0,
+0x90, 0x9A, 0x3D, 0xE0, 0xFF, 0x90, 0x9A, 0x3C,
+0xE0, 0x2F, 0x12, 0xFA, 0x83, 0x90, 0x9A, 0x43,
+0xF0, 0xA3, 0xEF, 0xF0, 0x24, 0x06, 0xFF, 0xE4,
+0x3E, 0x51, 0x3B, 0xEF, 0x64, 0x08, 0x70, 0x51,
+0x90, 0x9A, 0x44, 0xE0, 0x24, 0x07, 0xFF, 0x90,
+0x9A, 0x43, 0xE0, 0x34, 0x00, 0x51, 0x3B, 0xEF,
+0x70, 0x3F, 0x90, 0x9A, 0x3E, 0xF0, 0x90, 0x9A,
+0x3E, 0xE0, 0xFF, 0xC3, 0x94, 0x04, 0x50, 0x24,
+0x90, 0x9A, 0x44, 0xE0, 0x24, 0x18, 0xFD, 0x90,
+0x9A, 0x43, 0xE0, 0x51, 0x31, 0x90, 0x9A, 0x3E,
+0xE0, 0x24, 0x3F, 0xF5, 0x82, 0xE4, 0x34, 0x9A,
+0xF5, 0x83, 0xEF, 0xF0, 0x90, 0x9A, 0x3E, 0xE0,
+0x04, 0xF0, 0x80, 0xD2, 0x78, 0x3F, 0x7C, 0x9A,
+0xF1, 0xF2, 0xEF, 0x7F, 0x00, 0x70, 0x02, 0x7F,
+0x01, 0x22, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0,
+0xD0, 0x90, 0x9C, 0xE8, 0xEF, 0xF0, 0x90, 0x93,
+0x04, 0x12, 0xB4, 0xAD, 0x30, 0xE0, 0x39, 0x12,
+0xB7, 0xD4, 0x60, 0x10, 0x12, 0xB7, 0xCA, 0x40,
+0x0B, 0xE4, 0x7F, 0x0A, 0xFE, 0xFD, 0xFC, 0x90,
+0x95, 0xF5, 0x80, 0x09, 0xE4, 0x7F, 0x0A, 0xFE,
+0xFD, 0xFC, 0x90, 0x95, 0xED, 0x12, 0x82, 0x12,
+0x12, 0x80, 0xDB, 0xC0, 0x07, 0x90, 0x93, 0x0A,
+0xE0, 0xFB, 0xE4, 0xFA, 0xF9, 0xF8, 0xD0, 0x07,
+0x12, 0x81, 0x66, 0x90, 0x93, 0x0B, 0xEF, 0xF0,
+0x90, 0x9C, 0xE8, 0xE0, 0x64, 0x01, 0x70, 0x1B,
+0xF1, 0x68, 0x60, 0x0A, 0xF1, 0x61, 0x12, 0x7C,
+0x05, 0x12, 0xB7, 0xB8, 0x80, 0x08, 0xF1, 0x61,
+0x12, 0x7C, 0x3B, 0x12, 0xF9, 0x15, 0x12, 0x79,
+0xD4, 0x80, 0x1D, 0xF1, 0x68, 0x60, 0x07, 0xF1,
+0x61, 0x12, 0x7C, 0x05, 0x80, 0x05, 0xF1, 0x61,
+0x12, 0x7C, 0x3B, 0x7D, 0x02, 0x7F, 0x02, 0x12,
+0x7C, 0x74, 0x12, 0xB7, 0xA1, 0x12, 0x7B, 0xCC,
+0xD0, 0xD0, 0x92, 0xAF, 0x22, 0xF0, 0x90, 0x01,
+0x3F, 0x74, 0x10, 0xF0, 0xFD, 0x7F, 0x03, 0x22,
+0x90, 0x93, 0x0A, 0xE0, 0x90, 0x01, 0x3F, 0x22,
+0xF0, 0x90, 0x93, 0x31, 0xE0, 0x44, 0x01, 0xF0,
 0x22, 0x90, 0x9A, 0x61, 0xE0, 0xFE, 0xA3, 0xE0,
-0xFF, 0x22, 0x35, 0xF0, 0xFA, 0x7B, 0x01, 0x78,
-0x3C, 0x7C, 0x9A, 0x22, 0x90, 0x93, 0x04, 0x91,
-0x3D, 0x30, 0xE0, 0x30, 0xEF, 0xC4, 0x54, 0x0F,
-0x20, 0xE0, 0x25, 0xF1, 0xCB, 0x60, 0x0B, 0xF1,
-0xC1, 0x40, 0x07, 0x91, 0x32, 0x90, 0x95, 0xF5,
-0x80, 0x05, 0x91, 0x32, 0x90, 0x95, 0xED, 0x12,
-0x82, 0x12, 0x12, 0x80, 0xDB, 0x90, 0x9C, 0x9B,
-0x12, 0x04, 0x31, 0x12, 0x94, 0xFF, 0x80, 0x04,
-0x7F, 0x01, 0x11, 0x30, 0x90, 0x93, 0x04, 0xE0,
-0xC3, 0x13, 0x30, 0xE0, 0x04, 0x7F, 0x01, 0x11,
-0x30, 0x22, 0xE4, 0x7F, 0xE8, 0x7E, 0x03, 0xFD,
-0xFC, 0x22, 0x90, 0x88, 0x32, 0xE0, 0xFF, 0x13,
-0x13, 0x13, 0x54, 0x1F, 0x22, 0xE4, 0x90, 0x9A,
-0xFB, 0xF0, 0x12, 0x97, 0xEE, 0x60, 0x02, 0xA1,
-0x82, 0x90, 0x88, 0x36, 0xE0, 0x70, 0x02, 0xA1,
-0x82, 0x90, 0x06, 0xA9, 0xE0, 0x54, 0xC0, 0x70,
-0x27, 0x90, 0x88, 0x9C, 0xE0, 0x70, 0x21, 0x90,
-0x04, 0x1A, 0xE0, 0xF4, 0x70, 0x1A, 0xA3, 0xE0,
-0x54, 0x07, 0xFF, 0xBF, 0x07, 0x12, 0x90, 0x06,
-0x62, 0xE0, 0x54, 0x03, 0x70, 0x0A, 0x90, 0x88,
-0x39, 0xE0, 0xB4, 0x04, 0x03, 0x12, 0xE1, 0xEC,
-0x90, 0x05, 0x63, 0xE0, 0x90, 0x88, 0x85, 0xF0,
-0x90, 0x05, 0x62, 0xE0, 0x90, 0x88, 0x86, 0xF0,
-0x90, 0x05, 0x61, 0xE0, 0x90, 0x88, 0x87, 0xF0,
-0x90, 0x05, 0x60, 0xE0, 0x90, 0x88, 0x88, 0xF0,
-0x90, 0x07, 0xF1, 0xE0, 0x90, 0x99, 0xAD, 0xF0,
-0x90, 0x07, 0xF0, 0xE0, 0x90, 0x99, 0xAE, 0xF0,
-0x12, 0xD3, 0x7F, 0xF0, 0x90, 0x88, 0x3A, 0xE0,
-0x54, 0xEC, 0xF0, 0xB1, 0x8B, 0x24, 0xFD, 0x50,
-0x02, 0x80, 0x03, 0x12, 0xD2, 0xE5, 0xB1, 0x8B,
-0x64, 0x01, 0x70, 0x3A, 0x90, 0x06, 0xAB, 0xE0,
-0x90, 0x88, 0x3D, 0xF0, 0x90, 0x06, 0xA9, 0xE0,
-0x30, 0xE5, 0x06, 0xA3, 0xE0, 0x90, 0x9A, 0xFB,
-0xF0, 0x90, 0x9A, 0xFB, 0xE0, 0xFF, 0x60, 0x02,
-0x80, 0x05, 0x90, 0x88, 0x3C, 0xE0, 0xFF, 0x90,
-0x88, 0x3C, 0xEF, 0xF0, 0xA3, 0xE0, 0xFF, 0x70,
-0x08, 0x90, 0x88, 0x3C, 0xE0, 0xFE, 0xFF, 0x80,
-0x00, 0x90, 0x88, 0x3D, 0xEF, 0xF0, 0x12, 0xF5,
-0xFD, 0xE4, 0x90, 0x88, 0x3F, 0xF0, 0xA3, 0xF0,
-0x91, 0x3A, 0x30, 0xE0, 0x5E, 0xEF, 0xC4, 0x13,
-0x13, 0x54, 0x03, 0x20, 0xE0, 0x24, 0xB1, 0x83,
-0x6F, 0x70, 0x50, 0xEF, 0x60, 0x4D, 0x90, 0x88,
-0x32, 0xE0, 0x44, 0x40, 0xF0, 0x12, 0xD7, 0x50,
-0x11, 0xBE, 0x12, 0x7C, 0x05, 0xD1, 0xB1, 0x12,
-0xD7, 0x49, 0x90, 0x88, 0x3D, 0xE0, 0x14, 0xF0,
-0x80, 0x31, 0x90, 0x88, 0x34, 0xE0, 0xC4, 0x54,
-0x0F, 0x64, 0x01, 0x70, 0x26, 0xB1, 0x83, 0xFE,
-0x6F, 0x60, 0x20, 0x90, 0x05, 0x73, 0xE0, 0xFF,
-0xEE, 0x6F, 0x60, 0x17, 0x12, 0xD6, 0xB8, 0x30,
-0xE0, 0x11, 0xEF, 0x54, 0xBF, 0x11, 0xBE, 0x12,
-0x7C, 0x3B, 0xF1, 0xBA, 0x7D, 0x02, 0x7F, 0x02,
-0x12, 0x7C, 0x74, 0x90, 0x88, 0x32, 0xE0, 0x44,
-0x04, 0xF0, 0x22, 0x90, 0x88, 0x3C, 0xE0, 0xFF,
-0xA3, 0xE0, 0x22, 0x90, 0x88, 0x34, 0xE0, 0xFF,
-0xC4, 0x54, 0x0F, 0x22, 0x90, 0x88, 0x36, 0xE0,
-0x70, 0x02, 0xC1, 0x20, 0x90, 0x88, 0x4D, 0xE0,
-0x04, 0xF0, 0x90, 0x05, 0x61, 0xD1, 0xA3, 0x78,
-0x08, 0x12, 0x03, 0xFE, 0xA8, 0x04, 0xA9, 0x05,
-0xAA, 0x06, 0xAB, 0x07, 0x90, 0x05, 0x60, 0xD1,
-0xA3, 0x12, 0x82, 0x05, 0xC0, 0x04, 0xC0, 0x05,
-0xC0, 0x06, 0xC0, 0x07, 0x90, 0x05, 0x62, 0xD1,
-0xA3, 0x78, 0x10, 0x12, 0x03, 0xFE, 0xD0, 0x03,
-0xD0, 0x02, 0xD0, 0x01, 0xD0, 0x00, 0x12, 0x82,
-0x05, 0xC0, 0x04, 0xC0, 0x05, 0xC0, 0x06, 0xC0,
-0x07, 0xA3, 0xD1, 0xA3, 0x78, 0x18, 0x12, 0x03,
-0xFE, 0xD0, 0x03, 0xD0, 0x02, 0xD0, 0x01, 0xD0,
-0x00, 0x12, 0x82, 0x05, 0x90, 0x88, 0x81, 0x12,
-0x04, 0x31, 0x90, 0x88, 0x32, 0xE0, 0x54, 0x7F,
-0xF0, 0xA3, 0xE0, 0x30, 0xE0, 0x0C, 0x12, 0xF8,
-0x08, 0x74, 0x05, 0xF0, 0x12, 0x6E, 0x2F, 0x12,
-0xFB, 0x2F, 0x91, 0x3A, 0x30, 0xE0, 0x09, 0x90,
-0x01, 0x3B, 0xE0, 0x30, 0xE4, 0x02, 0xD1, 0xAA,
-0x12, 0xD6, 0x1F, 0x12, 0xE6, 0xD7, 0xE4, 0x90,
-0x98, 0x4F, 0xF0, 0xF1, 0xD6, 0x90, 0x93, 0x24,
-0xF1, 0xE7, 0x30, 0xE0, 0x52, 0x90, 0x95, 0x93,
-0xE0, 0xFE, 0xA3, 0xE0, 0xFF, 0x7C, 0x00, 0x7D,
-0x64, 0x12, 0x02, 0x92, 0x90, 0x95, 0xE7, 0xE0,
-0x6E, 0x70, 0x03, 0xA3, 0xE0, 0x6F, 0x60, 0x0A,
-0x90, 0x95, 0xE7, 0xE4, 0x75, 0xF0, 0x01, 0x02,
-0x02, 0xE7, 0x90, 0x95, 0x97, 0xE0, 0xFE, 0xA3,
-0xE0, 0xFF, 0x90, 0x95, 0xA5, 0xE0, 0xB5, 0x06,
-0x14, 0xA3, 0xE0, 0xB5, 0x07, 0x0F, 0xEF, 0x4E,
-0x60, 0x0B, 0x90, 0x01, 0xC7, 0x74, 0x31, 0xF0,
-0x7F, 0x01, 0x02, 0xA7, 0x56, 0x12, 0xBD, 0xF9,
+0xFF, 0x22, 0x12, 0xFA, 0x95, 0x02, 0x04, 0x80,
+0x35, 0xF0, 0xFA, 0x7B, 0x01, 0x78, 0x3C, 0x7C,
+0x9A, 0x22, 0x90, 0x9A, 0x36, 0xE0, 0xFD, 0x90,
+0x9A, 0x35, 0xE0, 0x2D, 0xFD, 0x22, 0x12, 0xE8,
+0x98, 0x12, 0xC7, 0xE2, 0xE4, 0x90, 0x9A, 0x3B,
+0xF0, 0xF0, 0x90, 0x9A, 0x37, 0xF1, 0xDE, 0xC3,
+0x9F, 0x50, 0x2A, 0xF1, 0x92, 0xD1, 0x32, 0xFC,
+0xEF, 0x12, 0xFB, 0x12, 0xEE, 0x7E, 0x00, 0x2D,
+0x51, 0x38, 0x90, 0x9A, 0x38, 0x12, 0x82, 0x1E,
+0x90, 0x9A, 0x3B, 0xE0, 0xF5, 0x82, 0x75, 0x83,
+0x00, 0xEF, 0x12, 0x02, 0x5E, 0x90, 0x9A, 0x3B,
+0xE0, 0x04, 0xF0, 0x80, 0xCD, 0x22, 0xE0, 0xFF,
+0x90, 0x9A, 0x3B, 0xE0, 0xFE, 0x22, 0x90, 0x9A,
+0x61, 0xEE, 0xF0, 0xA3, 0xEF, 0xF0, 0xA3, 0xED,
+0xF0, 0x22, 0x7D, 0x01, 0x7B, 0x01, 0x7A, 0x93,
+0x79, 0x53, 0x7E, 0x00, 0x7F, 0x04, 0x02, 0x83,
+0xDC, 0x12, 0x02, 0x06, 0x54, 0x01, 0xFF, 0x90,
+0x98, 0x69, 0xE0, 0x54, 0xFE, 0x4F, 0xF0, 0x22,
+0x12, 0xE7, 0xAB, 0xFF, 0x54, 0x7F, 0x90, 0x88,
+0x36, 0xF0, 0xEF, 0x11, 0xAA, 0xA3, 0xF0, 0x12,
+0x9C, 0x5A, 0xFD, 0x54, 0xF0, 0xC4, 0x54, 0x0F,
+0xFF, 0x90, 0x88, 0x34, 0xE0, 0x54, 0xF0, 0x12,
+0x87, 0xA2, 0xFC, 0x54, 0x01, 0x25, 0xE0, 0xFF,
+0x90, 0x88, 0x31, 0xE0, 0x54, 0xFD, 0x4F, 0xF0,
+0xEC, 0x54, 0x04, 0xC3, 0x13, 0xFF, 0x90, 0x88,
+0x33, 0xE0, 0x54, 0xFD, 0x4F, 0xF0, 0xED, 0x54,
+0x0F, 0xC4, 0x54, 0xF0, 0xFF, 0xA3, 0xE0, 0x54,
+0x0F, 0x12, 0x87, 0xE5, 0x90, 0x88, 0x35, 0x12,
+0x87, 0xD1, 0xFD, 0x90, 0x8A, 0x89, 0x12, 0x90,
+0x47, 0x7F, 0x02, 0x12, 0x04, 0x7E, 0x90, 0x9B,
+0x89, 0xE0, 0x60, 0x0C, 0x12, 0xFB, 0x2F, 0x90,
+0x8A, 0x89, 0x12, 0x90, 0x47, 0x12, 0xFB, 0x6E,
+0x12, 0xC7, 0x95, 0x12, 0x5C, 0x5F, 0x90, 0x88,
+0x36, 0xE0, 0xB4, 0x01, 0x07, 0x90, 0x88, 0x33,
+0xE0, 0x54, 0xFB, 0xF0, 0x12, 0xDC, 0x59, 0xF0,
+0x90, 0x88, 0x36, 0x12, 0xFA, 0x75, 0x12, 0x97,
+0xF3, 0x90, 0x01, 0xBE, 0xF0, 0x22, 0x90, 0x93,
+0x2A, 0xE0, 0xC4, 0x13, 0x13, 0x13, 0x54, 0x01,
+0x22, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0,
+0xE4, 0x90, 0x9C, 0x08, 0xF0, 0xA3, 0x74, 0x08,
+0xF0, 0xA3, 0x12, 0xCA, 0x89, 0x90, 0x9C, 0x0F,
+0xF0, 0xA3, 0xF0, 0x90, 0x9C, 0x19, 0x12, 0xCF,
+0xCD, 0x12, 0xC7, 0x8C, 0x90, 0x9B, 0xFD, 0x12,
+0xCF, 0xB1, 0x90, 0x9C, 0x06, 0xF0, 0x90, 0x93,
+0x24, 0xE0, 0x20, 0xE0, 0x02, 0x81, 0x2A, 0xE4,
+0x90, 0x9C, 0x05, 0xF0, 0x90, 0x9C, 0x06, 0xE0,
+0xFF, 0x90, 0x9C, 0x05, 0xE0, 0xC3, 0x9F, 0x40,
+0x02, 0x81, 0x2A, 0x12, 0xFB, 0x4A, 0xEC, 0xFF,
+0x90, 0xFD, 0x11, 0xF0, 0x90, 0x9C, 0x0F, 0xEF,
+0xF0, 0x12, 0xD7, 0x63, 0x3E, 0x54, 0x3F, 0xFE,
+0x90, 0x9B, 0xFF, 0xF0, 0xA3, 0xEF, 0xF0, 0x90,
+0x9C, 0x0B, 0xEE, 0x12, 0xF9, 0xD2, 0x30, 0xE0,
+0x0A, 0xC3, 0x13, 0x20, 0xE0, 0x05, 0x12, 0xFA,
+0x66, 0x80, 0x02, 0x7E, 0x00, 0xEF, 0x24, 0x18,
+0x2E, 0xFF, 0x90, 0x9C, 0x10, 0xF0, 0x90, 0x9B,
+0xFE, 0xE0, 0x2F, 0xFF, 0x90, 0x9B, 0xFD, 0xE0,
+0x34, 0x00, 0xFE, 0x90, 0x9C, 0x01, 0xF0, 0xA3,
+0xEF, 0xF0, 0x12, 0xA2, 0x3C, 0xC0, 0x07, 0x90,
+0x9C, 0x01, 0x91, 0x49, 0x7D, 0x01, 0x12, 0x04,
+0x7E, 0xC0, 0x07, 0x90, 0x9C, 0x01, 0x91, 0x49,
+0x7D, 0x04, 0x12, 0x04, 0x7E, 0xAB, 0x07, 0xD0,
+0x05, 0xD0, 0x07, 0x12, 0x8E, 0xC9, 0x90, 0x9C,
+0x07, 0xEF, 0xF0, 0x91, 0x3D, 0x12, 0xA2, 0x3C,
+0xEF, 0x54, 0xFC, 0x90, 0x9C, 0x03, 0xF0, 0x90,
+0x9C, 0x10, 0xE0, 0xFF, 0x90, 0x9B, 0xFF, 0xE4,
+0x8F, 0xF0, 0x12, 0x02, 0xE7, 0x12, 0xFB, 0x53,
+0x12, 0xCD, 0xEE, 0x90, 0x9B, 0xFF, 0xEE, 0xF0,
+0xA3, 0xEF, 0xF0, 0x90, 0x9B, 0xFD, 0x91, 0x49,
+0x7D, 0x0F, 0x12, 0x04, 0x7E, 0x90, 0x9C, 0x04,
+0xEF, 0xF0, 0x90, 0x9B, 0x89, 0xE0, 0x60, 0x39,
+0x90, 0x9C, 0x03, 0xE0, 0x24, 0xB0, 0x60, 0x15,
+0x24, 0xD0, 0x60, 0x02, 0x61, 0x4C, 0x12, 0xD6,
+0x11, 0x20, 0xE0, 0x16, 0xF1, 0xEB, 0x20, 0xE0,
+0x02, 0x61, 0x4C, 0x80, 0x0D, 0x12, 0xD6, 0x11,
+0x20, 0xE0, 0x07, 0xF1, 0xEB, 0x20, 0xE0, 0x02,
+0x61, 0x4C, 0x91, 0x3D, 0x90, 0x9C, 0x0B, 0xE0,
+0xFC, 0xA3, 0xE0, 0xFD, 0x12, 0xF6, 0x21, 0x61,
+0x4C, 0x90, 0x9C, 0x03, 0xE0, 0x24, 0xF8, 0x60,
+0x35, 0x24, 0x80, 0x60, 0x31, 0x24, 0xC8, 0x60,
+0x06, 0x24, 0x20, 0x60, 0x02, 0x61, 0x4C, 0x90,
+0x93, 0x29, 0x11, 0xA9, 0x20, 0xE0, 0x02, 0x61,
+0x4C, 0x91, 0x3D, 0xB1, 0x0C, 0xEF, 0x70, 0x02,
+0x61, 0x4C, 0x91, 0x3D, 0x12, 0xE8, 0x44, 0xEF,
+0x70, 0x02, 0x61, 0x4C, 0x90, 0x9C, 0x03, 0xE0,
+0xFF, 0x12, 0xE8, 0x32, 0x61, 0x4C, 0x12, 0xFA,
+0x47, 0xFF, 0x12, 0xF0, 0x07, 0xAC, 0x07, 0x91,
+0x2F, 0xAB, 0x04, 0xC0, 0x03, 0x7B, 0x01, 0x7A,
+0x9C, 0x79, 0x11, 0x90, 0x9A, 0x38, 0x12, 0x82,
+0x27, 0xD0, 0x03, 0x12, 0xA7, 0x9E, 0x91, 0x3D,
+0xB1, 0x0C, 0x90, 0x9A, 0x38, 0xEF, 0xF0, 0x7B,
+0x01, 0x7A, 0x9C, 0x79, 0x11, 0x12, 0xFA, 0x47,
+0xFD, 0x12, 0xE4, 0x7A, 0xEF, 0x70, 0x02, 0x61,
+0x4C, 0x90, 0x93, 0x24, 0xB1, 0xFB, 0x30, 0xE0,
+0x5F, 0x90, 0x9C, 0x07, 0xE0, 0xFF, 0x90, 0x9C,
+0x02, 0xE0, 0x2F, 0xFF, 0x90, 0x9C, 0x01, 0xE0,
+0x34, 0x00, 0xCF, 0x24, 0x08, 0xCF, 0x34, 0x00,
+0xFE, 0x90, 0x9C, 0x0D, 0xF0, 0xA3, 0xEF, 0xF0,
+0x12, 0xA2, 0x3C, 0xEF, 0x64, 0x45, 0x70, 0x38,
+0xB1, 0x03, 0x12, 0xF6, 0xEA, 0xEF, 0x64, 0x01,
+0x70, 0x2E, 0xB1, 0x03, 0x12, 0xF7, 0x26, 0xEF,
+0x64, 0x01, 0x70, 0x24, 0x90, 0x9C, 0x19, 0x04,
+0xB1, 0x02, 0xA3, 0xE0, 0xFD, 0x12, 0xF6, 0x48,
+0xEF, 0x70, 0x0D, 0x90, 0x9C, 0x0F, 0xE0, 0xFD,
+0x90, 0xFD, 0x11, 0xB1, 0x02, 0x12, 0xF6, 0xA3,
+0x90, 0x9C, 0x0F, 0xE0, 0x90, 0xFD, 0x11, 0xF0,
+0x91, 0x3D, 0xB1, 0x0C, 0xEF, 0x60, 0x30, 0x91,
+0x2F, 0x90, 0x9C, 0x0A, 0xE0, 0xFB, 0x90, 0x9C,
+0x0F, 0xE0, 0x90, 0x9A, 0x38, 0xF0, 0xF1, 0x24,
+0xEF, 0x60, 0x02, 0x91, 0xFB, 0x90, 0x93, 0x25,
+0xE0, 0xC4, 0x13, 0x54, 0x07, 0x30, 0xE0, 0x0F,
+0x91, 0x2F, 0x90, 0x9C, 0x0A, 0xE0, 0xFB, 0x12,
+0xF3, 0xAD, 0xEF, 0x60, 0x02, 0x91, 0xFB, 0x90,
+0x93, 0x24, 0xE0, 0xC3, 0x13, 0x30, 0xE0, 0x0A,
+0x91, 0x2F, 0x12, 0xA4, 0xC5, 0xEF, 0x60, 0x02,
+0x91, 0xFB, 0x12, 0x9F, 0xA6, 0x54, 0x3F, 0x30,
+0xE0, 0x0A, 0x91, 0x2F, 0x12, 0xE8, 0xA1, 0xEF,
+0x60, 0x02, 0x91, 0xFB, 0x90, 0x93, 0x24, 0x11,
+0xA9, 0x30, 0xE0, 0x16, 0x90, 0x9C, 0x19, 0xE0,
+0x70, 0x10, 0x91, 0x2F, 0xF1, 0xD6, 0xEF, 0x60,
+0x09, 0x12, 0xA7, 0x71, 0x90, 0x01, 0xC7, 0x74,
+0x22, 0xF0, 0x91, 0x2F, 0x91, 0x5A, 0xEF, 0x60,
+0x03, 0x12, 0xC9, 0x35, 0x90, 0x9C, 0x04, 0xE0,
+0xFF, 0x7D, 0x01, 0x12, 0xF4, 0x1D, 0xEF, 0x60,
+0x12, 0x12, 0xA7, 0x71, 0x90, 0x9B, 0xFD, 0x91,
+0x49, 0x7D, 0x10, 0x12, 0x04, 0x7E, 0x90, 0x95,
+0x65, 0xEF, 0xF0, 0x90, 0x9C, 0x19, 0xE0, 0x70,
+0x1E, 0x90, 0x93, 0x26, 0xB1, 0xFB, 0x30, 0xE0,
+0x16, 0x90, 0x9C, 0x03, 0xE0, 0xFF, 0x64, 0x08,
+0x60, 0x04, 0xEF, 0xB4, 0x88, 0x09, 0x12, 0xA7,
+0x71, 0x90, 0x01, 0xC7, 0x74, 0x25, 0xF0, 0x90,
+0x93, 0x31, 0xE0, 0x30, 0xE0, 0x13, 0x90, 0x93,
+0x25, 0xB1, 0xFB, 0x30, 0xE0, 0x0B, 0x91, 0x2F,
+0x12, 0xBC, 0x13, 0xBF, 0x01, 0x03, 0x12, 0xC9,
+0x35, 0x12, 0xFB, 0x53, 0x90, 0x9B, 0xFD, 0x12,
+0xFA, 0x57, 0x12, 0xFB, 0x4A, 0xD3, 0x9F, 0xEC,
+0x9E, 0x40, 0x0F, 0x12, 0xFA, 0x37, 0xED, 0x9F,
+0xFF, 0xEC, 0x9E, 0x90, 0x9B, 0xFD, 0xF0, 0xA3,
+0xEF, 0xF0, 0x90, 0x93, 0x31, 0xE0, 0x30, 0xE0,
+0x04, 0x7F, 0x01, 0xB1, 0x5E, 0x12, 0xE8, 0x1B,
+0xEF, 0x64, 0x01, 0x70, 0x31, 0x12, 0xE6, 0x30,
+0xAD, 0x07, 0xEF, 0x64, 0x01, 0x60, 0x1F, 0x12,
+0xA7, 0x71, 0xED, 0xB4, 0x02, 0x08, 0x90, 0x01,
+0xC7, 0x74, 0x42, 0xF0, 0x80, 0x0A, 0xED, 0xB4,
+0x04, 0x06, 0x90, 0x01, 0xC7, 0x74, 0x43, 0xF0,
+0x7F, 0x01, 0xB1, 0x5E, 0x80, 0x24, 0x90, 0x9B,
+0xFD, 0x12, 0xE6, 0x1D, 0x80, 0x14, 0x90, 0x93,
+0x26, 0xE0, 0xC4, 0x13, 0x54, 0x07, 0x20, 0xE0,
+0x11, 0x90, 0x93, 0x24, 0xE0, 0x54, 0xFE, 0xF0,
+0x80, 0x08, 0x90, 0x9C, 0x05, 0xE0, 0x04, 0xF0,
+0x01, 0xEC, 0xD0, 0xD0, 0x92, 0xAF, 0x22, 0x90,
+0x9C, 0x01, 0xE0, 0xFE, 0xA3, 0xE0, 0xFF, 0x90,
+0x9C, 0x07, 0xE0, 0xFD, 0x22, 0x90, 0x9C, 0x01,
+0xE0, 0xFE, 0xA3, 0xE0, 0xFF, 0x22, 0x90, 0x9A,
+0x39, 0xE0, 0xFE, 0xA3, 0xE0, 0xFF, 0x90, 0x8A,
+0xE9, 0xE0, 0xFC, 0xA3, 0xE0, 0xF5, 0x82, 0x8C,
+0x83, 0x22, 0x90, 0x9A, 0x36, 0xED, 0x12, 0xE8,
+0x97, 0xB1, 0x0C, 0xEF, 0x70, 0x02, 0x81, 0xF8,
+0xF1, 0x1B, 0xF1, 0xF2, 0x70, 0x02, 0x81, 0xF8,
+0x12, 0xA6, 0x27, 0xCF, 0x24, 0x08, 0x12, 0xFA,
+0xCF, 0x90, 0x93, 0x25, 0xE0, 0xC4, 0x54, 0x0F,
+0x30, 0xE0, 0x33, 0x91, 0x46, 0x7D, 0x09, 0x12,
+0x04, 0x7E, 0xEF, 0x64, 0x06, 0x70, 0x27, 0x91,
+0x46, 0x7D, 0x14, 0x12, 0x04, 0x7E, 0xEF, 0x70,
+0x1D, 0x91, 0x46, 0x7D, 0x15, 0x12, 0x04, 0x7E,
+0xEF, 0x64, 0x50, 0x70, 0x11, 0x91, 0x46, 0x7D,
+0x21, 0x12, 0x04, 0x7E, 0xEF, 0x20, 0xE0, 0x03,
+0x30, 0xE2, 0x03, 0x7F, 0x01, 0x22, 0x90, 0x93,
+0x25, 0xE0, 0x13, 0x13, 0x54, 0x3F, 0x30, 0xE0,
+0x37, 0x91, 0x46, 0x7D, 0x09, 0x12, 0x04, 0x7E,
+0xEF, 0x64, 0x11, 0x70, 0x2B, 0x90, 0x9A, 0x3A,
+0xE0, 0x24, 0x14, 0xFF, 0x90, 0x9A, 0x39, 0xE0,
+0x34, 0x00, 0xFE, 0x12, 0xBF, 0xED, 0x91, 0x4E,
+0x7D, 0x02, 0x12, 0x04, 0x7E, 0xEF, 0x70, 0x10,
+0x90, 0x9A, 0x37, 0x91, 0x49, 0x7D, 0x03, 0x12,
+0x04, 0x7E, 0xBF, 0x89, 0x03, 0x7F, 0x01, 0x22,
+0x7F, 0x00, 0x22, 0x90, 0x9C, 0x19, 0x74, 0x01,
+0xF0, 0x22, 0xF0, 0x90, 0x9C, 0x0D, 0xE0, 0xFE,
+0xA3, 0xE0, 0xFF, 0x22, 0x90, 0x9A, 0x3B, 0xEE,
+0xF0, 0xA3, 0xEF, 0xF0, 0xE4, 0x90, 0x9A, 0x43,
+0xF0, 0x90, 0x9A, 0x43, 0xE0, 0xFD, 0xC3, 0x94,
+0x06, 0x50, 0x1D, 0x90, 0x9A, 0x3C, 0xE0, 0x24,
+0x04, 0x12, 0xFA, 0x83, 0xF1, 0xC7, 0x90, 0x9A,
+0x43, 0x12, 0xFA, 0x8C, 0xF5, 0x83, 0xEF, 0xF0,
+0x90, 0x9A, 0x43, 0xE0, 0x04, 0xF0, 0x80, 0xD9,
+0x78, 0x32, 0x7C, 0x93, 0x7D, 0x01, 0x7B, 0x01,
+0x7A, 0x9A, 0x79, 0x3D, 0x12, 0xE8, 0x87, 0x7F,
+0x00, 0x70, 0x02, 0x7F, 0x01, 0x22, 0x90, 0x01,
+0xC7, 0x74, 0x10, 0xF0, 0x7F, 0x01, 0x90, 0x9C,
+0xE4, 0xEF, 0xF0, 0x90, 0x86, 0xB3, 0xE0, 0x64,
+0x02, 0x70, 0x21, 0x90, 0x9C, 0xE4, 0xE0, 0xFD,
+0x64, 0x01, 0x70, 0x7B, 0x12, 0xA7, 0x71, 0x11,
+0xA6, 0x30, 0xE0, 0x09, 0x90, 0x01, 0x4D, 0xE0,
+0x64, 0x80, 0xF0, 0x80, 0x6A, 0xAF, 0x05, 0x12,
+0xE2, 0x07, 0x80, 0x63, 0x90, 0x86, 0xB3, 0xE0,
+0x64, 0x03, 0x70, 0x2E, 0x90, 0x99, 0xB0, 0xE0,
+0xFF, 0x30, 0xE0, 0x26, 0x90, 0x00, 0xD4, 0xE0,
+0x54, 0xEF, 0xF0, 0x90, 0x00, 0xC6, 0xE0, 0x54,
+0xFD, 0xF0, 0x90, 0x00, 0x01, 0xE0, 0x44, 0x30,
+0xF0, 0x90, 0x00, 0x23, 0xE0, 0x44, 0x80, 0xF0,
+0x12, 0xBF, 0x73, 0xEF, 0x54, 0xFE, 0x90, 0x99,
+0xB0, 0xF0, 0x90, 0x06, 0x90, 0xE0, 0x44, 0x20,
+0x12, 0xDE, 0xC8, 0x12, 0xFB, 0x95, 0x90, 0x06,
+0x90, 0xE0, 0x44, 0x01, 0xF0, 0x90, 0x9C, 0xE4,
+0xE0, 0xFF, 0x12, 0xE2, 0x07, 0x12, 0xBF, 0xE6,
+0xFB, 0xFD, 0x12, 0xBA, 0x4C, 0x12, 0xBF, 0x5E,
+0x90, 0x00, 0x04, 0xE0, 0x44, 0x08, 0xF0, 0x12,
+0xDB, 0xC0, 0xF0, 0x90, 0x93, 0x24, 0xE0, 0x54,
+0xBF, 0xF0, 0x22, 0xE0, 0xC4, 0x13, 0x13, 0x54,
+0x03, 0x22, 0x90, 0x88, 0x36, 0xE0, 0x70, 0x02,
+0xC1, 0x90, 0x90, 0x88, 0x4D, 0xE0, 0x04, 0xF0,
+0x90, 0x05, 0x61, 0xF1, 0x13, 0x78, 0x08, 0x12,
+0x03, 0xFE, 0xA8, 0x04, 0xA9, 0x05, 0xAA, 0x06,
+0xAB, 0x07, 0x90, 0x05, 0x60, 0xF1, 0x13, 0x12,
+0x82, 0x05, 0xC0, 0x04, 0xC0, 0x05, 0xC0, 0x06,
+0xC0, 0x07, 0x90, 0x05, 0x62, 0xF1, 0x13, 0x78,
+0x10, 0x12, 0x03, 0xFE, 0xD0, 0x03, 0xD0, 0x02,
+0xD0, 0x01, 0xD0, 0x00, 0x12, 0x82, 0x05, 0xC0,
+0x04, 0xC0, 0x05, 0xC0, 0x06, 0xC0, 0x07, 0xA3,
+0xF1, 0x13, 0x78, 0x18, 0x12, 0x03, 0xFE, 0xD0,
+0x03, 0xD0, 0x02, 0xD0, 0x01, 0xD0, 0x00, 0x12,
+0x82, 0x05, 0x90, 0x88, 0x81, 0x12, 0x04, 0x31,
+0x90, 0x88, 0x32, 0xE0, 0x54, 0x7F, 0xF0, 0xA3,
+0xE0, 0x30, 0xE0, 0x0C, 0x12, 0xF9, 0xB2, 0x74,
+0x05, 0xF0, 0x12, 0x6E, 0x2F, 0x12, 0xFB, 0x75,
+0x12, 0xB4, 0xAA, 0x30, 0xE0, 0x0A, 0x90, 0x01,
+0x3B, 0xE0, 0x30, 0xE4, 0x03, 0x12, 0xF9, 0x15,
+0x12, 0xDB, 0xC7, 0x12, 0xE5, 0xB7, 0xE4, 0x90,
+0x98, 0x4F, 0xF0, 0x12, 0xF9, 0x04, 0x90, 0x93,
+0x24, 0xB1, 0xFB, 0x30, 0xE0, 0x51, 0x90, 0x95,
+0x93, 0xE0, 0xFE, 0xA3, 0xE0, 0xFF, 0x7C, 0x00,
+0x7D, 0x64, 0x12, 0x02, 0x92, 0x90, 0x95, 0xE7,
+0xE0, 0x6E, 0x70, 0x03, 0xA3, 0xE0, 0x6F, 0x60,
+0x0A, 0x90, 0x95, 0xE7, 0xE4, 0x75, 0xF0, 0x01,
+0x02, 0x02, 0xE7, 0x90, 0x95, 0x97, 0xE0, 0xFE,
+0xA3, 0xE0, 0xFF, 0x90, 0x95, 0xA5, 0xE0, 0xB5,
+0x06, 0x13, 0xA3, 0xE0, 0xB5, 0x07, 0x0E, 0xEF,
+0x4E, 0x60, 0x0A, 0x90, 0x01, 0xC7, 0x74, 0x31,
+0xF0, 0x7F, 0x01, 0xA1, 0x5E, 0x12, 0xC6, 0x06,
 0xE4, 0x90, 0x95, 0xE7, 0xF0, 0xA3, 0xF0, 0x22,
 0x12, 0x04, 0x31, 0x90, 0x99, 0xB1, 0xE4, 0x75,
 0xF0, 0x04, 0x12, 0x02, 0xE7, 0x90, 0x99, 0xB1,
 0xA3, 0xE0, 0x24, 0x02, 0xF5, 0x82, 0xE4, 0x34,
 0xFC, 0xF5, 0x83, 0xE0, 0xFF, 0xE4, 0xFC, 0xFD,
-0xFE, 0x22, 0x7D, 0x02, 0x7F, 0x02, 0x12, 0x7C,
-0x7E, 0x7D, 0x01, 0x7F, 0x02, 0x02, 0x7C, 0x7E,
-0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0x90,
-0x9C, 0xBB, 0xEF, 0xF0, 0xED, 0x64, 0x01, 0x70,
-0x2E, 0xEB, 0xB4, 0x01, 0x07, 0xE0, 0x24, 0x02,
-0xF5, 0x13, 0x80, 0x08, 0x90, 0x9C, 0xBB, 0xE0,
-0x24, 0xFE, 0xF5, 0x13, 0x90, 0x9C, 0x1D, 0x12,
-0x04, 0x3D, 0x00, 0x00, 0x00, 0xFF, 0xAF, 0x13,
-0xF1, 0x9F, 0xF1, 0x97, 0x12, 0x04, 0x3D, 0x00,
-0x00, 0x00, 0xFF, 0xAF, 0x13, 0x80, 0x1F, 0x90,
-0x9C, 0x1D, 0x12, 0x04, 0x3D, 0x00, 0x00, 0x00,
-0xFF, 0x90, 0x9C, 0xBB, 0xD1, 0xA3, 0xF1, 0xA3,
-0xF1, 0x97, 0x12, 0x04, 0x3D, 0x00, 0x00, 0x00,
-0xFF, 0x90, 0x9C, 0xBB, 0xE0, 0xFF, 0xF1, 0x9F,
-0x7F, 0x01, 0xF1, 0x21, 0xD0, 0xD0, 0x92, 0xAF,
-0x22, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0,
-0x90, 0x9C, 0x1B, 0xEC, 0xF0, 0xA3, 0xED, 0xF0,
-0x90, 0x9C, 0x1A, 0xEF, 0xF0, 0xA3, 0xA3, 0xE0,
-0xFD, 0x12, 0x7B, 0xBD, 0x90, 0x9C, 0x25, 0x12,
-0x04, 0x31, 0x90, 0x9C, 0x1D, 0x12, 0x04, 0xB8,
-0x12, 0x03, 0xCD, 0x90, 0x9C, 0x25, 0xF1, 0xAE,
-0xC0, 0x04, 0xC0, 0x05, 0xC0, 0x06, 0xC0, 0x07,
-0x90, 0x9C, 0x1D, 0x12, 0x04, 0xB8, 0x90, 0x9C,
-0x21, 0xF1, 0xAE, 0xD0, 0x03, 0xD0, 0x02, 0xD0,
-0x01, 0xD0, 0x00, 0x12, 0x82, 0x05, 0x90, 0x9C,
-0x29, 0x12, 0x04, 0x31, 0x90, 0x9C, 0x1B, 0xA3,
-0xE0, 0xFD, 0xC0, 0x05, 0x90, 0x9C, 0x29, 0x12,
-0x04, 0xB8, 0x90, 0x8B, 0x9F, 0x12, 0x04, 0x31,
-0x90, 0x9C, 0x1A, 0xE0, 0xFF, 0xD0, 0x05, 0x12,
-0x79, 0x53, 0xD0, 0xD0, 0x92, 0xAF, 0x22, 0xE4,
-0xFF, 0xF1, 0x21, 0x90, 0x9C, 0x1D, 0x22, 0xE4,
-0xFC, 0xFD, 0xFE, 0x90, 0x9C, 0x21, 0x12, 0x04,
-0x31, 0x7D, 0x18, 0x7C, 0x00, 0x22, 0x12, 0x82,
-0x12, 0x02, 0x81, 0xF8, 0x12, 0xF9, 0xF7, 0x02,
-0x04, 0x80, 0x7D, 0x01, 0x7F, 0x02, 0x02, 0x7C,
-0x74, 0x90, 0x98, 0x31, 0x12, 0x82, 0x12, 0xD3,
-0x02, 0x03, 0xDA, 0x90, 0x95, 0xF1, 0x12, 0x04,
-0xB8, 0xEC, 0x4D, 0x4E, 0x4F, 0x22, 0x90, 0x93,
-0x08, 0xE0, 0x30, 0xE0, 0x09, 0x90, 0x01, 0x3B,
-0xE0, 0x30, 0xE4, 0x02, 0xD1, 0xAA, 0x22, 0xE0,
-0xC4, 0x13, 0x13, 0x54, 0x03, 0x22, 0xE0, 0xFE,
-0xA3, 0xE0, 0xFF, 0xC3, 0x22, 0x90, 0x93, 0x0C,
-0xE0, 0x20, 0xE0, 0x03, 0x02, 0xB0, 0xC2, 0xE4,
+0xFE, 0x22, 0xF0, 0x90, 0x9A, 0x34, 0xE0, 0xFE,
+0xA3, 0xE0, 0xFF, 0x22, 0x12, 0xE8, 0x90, 0xE4,
+0x90, 0x9A, 0x39, 0xF0, 0x12, 0xA2, 0x3C, 0xEF,
+0x54, 0x0C, 0x64, 0x08, 0x70, 0x75, 0xF1, 0x1B,
+0xA3, 0xE0, 0x24, 0x06, 0xF1, 0xC6, 0xEF, 0x64,
+0x88, 0x70, 0x68, 0xF1, 0x1B, 0xA3, 0xE0, 0x24,
+0x07, 0xF1, 0xC6, 0xEF, 0x64, 0x8E, 0x70, 0x5B,
+0x90, 0x9A, 0x39, 0xF1, 0xB1, 0xEF, 0x64, 0x03,
+0x70, 0x51, 0xF1, 0x1B, 0x12, 0xF4, 0x12, 0x24,
+0x06, 0xF1, 0xC6, 0xEF, 0x30, 0xE3, 0x07, 0x90,
+0x01, 0xC7, 0x74, 0x01, 0x80, 0x3A, 0x90, 0x93,
+0x24, 0x12, 0x97, 0xD1, 0x30, 0xE0, 0x24, 0x90,
+0x98, 0x35, 0xE0, 0x64, 0x02, 0x70, 0x12, 0x90,
+0x93, 0x25, 0x12, 0x97, 0xD1, 0x30, 0xE0, 0x02,
+0x80, 0x07, 0x90, 0x01, 0xC7, 0x74, 0x02, 0x80,
+0x17, 0xF1, 0x1B, 0xA3, 0xE0, 0xFD, 0x12, 0xA2,
+0x4C, 0x80, 0x10, 0x90, 0x93, 0x29, 0xB1, 0xFB,
+0x30, 0xE0, 0x08, 0x90, 0x01, 0xC7, 0x74, 0x02,
+0x12, 0xA7, 0x70, 0x90, 0x9A, 0x39, 0xE0, 0xFF,
+0x22, 0x04, 0xF0, 0x90, 0x9A, 0x34, 0xE0, 0xFE,
+0xA3, 0xE0, 0xFF, 0x90, 0x9A, 0x37, 0xE0, 0xFD,
+0x90, 0x9A, 0x36, 0xE0, 0x2D, 0x04, 0xFD, 0x90,
+0x8A, 0xE9, 0xE0, 0xFA, 0xA3, 0xE0, 0xFB, 0xF5,
+0x82, 0x8A, 0x83, 0x02, 0x04, 0x7E, 0x90, 0x9A,
+0x36, 0xED, 0x12, 0xE8, 0x97, 0xB1, 0x0C, 0xEF,
+0x60, 0x08, 0xF1, 0x1B, 0xF1, 0xF2, 0x60, 0x02,
+0x7F, 0x01, 0x22, 0xEF, 0x13, 0x13, 0x13, 0x54,
+0x1F, 0x22, 0xA3, 0xE0, 0xFD, 0x12, 0xA6, 0x40,
+0xEF, 0x22, 0x12, 0x02, 0x06, 0x90, 0x88, 0x9C,
+0xF0, 0x22, 0x12, 0x02, 0x06, 0xFF, 0x54, 0x01,
+0xFE, 0x90, 0x93, 0x08, 0xE0, 0x54, 0xFE, 0x4E,
+0xFE, 0xF0, 0xEF, 0x54, 0x02, 0xFF, 0xEE, 0x54,
+0xFD, 0x4F, 0xF0, 0x12, 0x9C, 0x5A, 0x90, 0x93,
+0x09, 0x12, 0x87, 0xE6, 0x90, 0x93, 0x0A, 0xF0,
+0x11, 0x34, 0x90, 0x93, 0x08, 0xE0, 0x54, 0x01,
+0xFF, 0x02, 0xA6, 0xCA, 0x90, 0x93, 0x09, 0xE0,
+0x14, 0x90, 0x93, 0x0B, 0xF0, 0x22, 0x90, 0x93,
+0x08, 0xE0, 0x30, 0xE0, 0x37, 0xF1, 0xB8, 0x90,
+0x93, 0x0B, 0xE0, 0x60, 0x0B, 0x14, 0xF0, 0x90,
+0x9B, 0x89, 0xE0, 0x70, 0x27, 0x02, 0x79, 0xD4,
+0x11, 0x34, 0xE4, 0xFF, 0x12, 0xA6, 0xCA, 0x90,
+0x93, 0x04, 0xE0, 0xFF, 0x20, 0xE0, 0x08, 0x13,
+0x13, 0x13, 0x54, 0x1F, 0x30, 0xE0, 0x0D, 0x90,
+0x9C, 0x9B, 0x12, 0x04, 0x3D, 0x00, 0x00, 0x00,
+0x01, 0x12, 0x95, 0x30, 0x22, 0x11, 0xC6, 0x7D,
+0x02, 0x7F, 0x02, 0x12, 0x7C, 0x74, 0x7F, 0x01,
+0x11, 0x8C, 0x80, 0xB2, 0xD3, 0x10, 0xAF, 0x01,
+0xC3, 0xC0, 0xD0, 0x90, 0x88, 0x33, 0xE0, 0xC3,
+0x13, 0x30, 0xE0, 0x25, 0x90, 0x9B, 0xDA, 0x74,
+0x1E, 0xF0, 0x90, 0x9B, 0xFC, 0x74, 0x01, 0xF0,
+0x90, 0x9B, 0xDC, 0xEF, 0xF0, 0x7B, 0x01, 0x7A,
+0x9B, 0x79, 0xDA, 0x12, 0xF9, 0xC3, 0x90, 0x8A,
+0xE5, 0x12, 0x90, 0x47, 0x7F, 0x04, 0x12, 0x04,
+0x7E, 0xD0, 0xD0, 0x92, 0xAF, 0x22, 0xE4, 0x90,
+0x9B, 0x04, 0xF0, 0x90, 0x88, 0x36, 0xE0, 0x60,
+0x39, 0x12, 0x97, 0xE0, 0x70, 0x34, 0x31, 0x12,
+0xF0, 0x12, 0xF9, 0x37, 0x90, 0x9B, 0x04, 0x74,
+0x01, 0xF0, 0xE4, 0x90, 0x88, 0x3D, 0xF0, 0x04,
+0x60, 0x20, 0x90, 0x88, 0x39, 0xE0, 0x20, 0xE2,
+0x0D, 0x90, 0x8A, 0xB9, 0x12, 0x90, 0x47, 0x7D,
+0x01, 0x7F, 0x04, 0x12, 0x04, 0x7E, 0xF1, 0xB0,
+0xE4, 0x90, 0x92, 0x20, 0xF0, 0x12, 0x97, 0xCE,
+0xD1, 0x55, 0x22, 0x12, 0x97, 0x5F, 0xE4, 0xFF,
+0x01, 0x8C, 0x90, 0x88, 0x3C, 0xE0, 0x90, 0x05,
+0x73, 0x22, 0xE4, 0x90, 0x9A, 0xFB, 0xF0, 0x12,
+0x97, 0xE1, 0x60, 0x02, 0x41, 0x53, 0x90, 0x88,
+0x36, 0xE0, 0x70, 0x02, 0x41, 0x53, 0x90, 0x06,
+0xA9, 0xE0, 0x54, 0xC0, 0x70, 0x26, 0x90, 0x88,
+0x9C, 0xE0, 0x70, 0x20, 0x90, 0x04, 0x1A, 0xE0,
+0xF4, 0x70, 0x19, 0xA3, 0xE0, 0x54, 0x07, 0xFF,
+0xBF, 0x07, 0x11, 0x90, 0x06, 0x62, 0xE0, 0x54,
+0x03, 0x70, 0x09, 0x90, 0x88, 0x39, 0xE0, 0xB4,
+0x04, 0x02, 0xF1, 0xA8, 0x90, 0x05, 0x63, 0xE0,
+0x90, 0x88, 0x85, 0xF0, 0x90, 0x05, 0x62, 0xE0,
+0x90, 0x88, 0x86, 0xF0, 0x90, 0x05, 0x61, 0xE0,
+0x90, 0x88, 0x87, 0xF0, 0x90, 0x05, 0x60, 0xE0,
+0x90, 0x88, 0x88, 0xF0, 0x90, 0x07, 0xF1, 0xE0,
+0x90, 0x99, 0xAD, 0xF0, 0x90, 0x07, 0xF0, 0xE0,
+0x90, 0x99, 0xAE, 0xF0, 0xD1, 0x7A, 0xF0, 0x90,
+0x88, 0x3A, 0xE0, 0x54, 0xEC, 0xF0, 0x51, 0x5C,
+0x24, 0xFD, 0x50, 0x02, 0x80, 0x02, 0xB1, 0xC9,
+0x51, 0x5C, 0x64, 0x01, 0x70, 0x3A, 0x90, 0x06,
+0xAB, 0xE0, 0x90, 0x88, 0x3D, 0xF0, 0x90, 0x06,
+0xA9, 0xE0, 0x30, 0xE5, 0x06, 0xA3, 0xE0, 0x90,
+0x9A, 0xFB, 0xF0, 0x90, 0x9A, 0xFB, 0xE0, 0xFF,
+0x60, 0x02, 0x80, 0x05, 0x90, 0x88, 0x3C, 0xE0,
+0xFF, 0x90, 0x88, 0x3C, 0xEF, 0xF0, 0xA3, 0xE0,
+0xFF, 0x70, 0x08, 0x90, 0x88, 0x3C, 0xE0, 0xFE,
+0xFF, 0x80, 0x00, 0x90, 0x88, 0x3D, 0xEF, 0xF0,
+0x51, 0x65, 0xE4, 0x90, 0x88, 0x3F, 0xF0, 0xA3,
+0xF0, 0x91, 0xAA, 0x30, 0xE0, 0x5E, 0xEF, 0xC4,
+0x13, 0x13, 0x54, 0x03, 0x20, 0xE0, 0x24, 0x51,
+0x54, 0x6F, 0x70, 0x50, 0xEF, 0x60, 0x4D, 0x90,
+0x88, 0x32, 0xE0, 0x44, 0x40, 0xF0, 0x31, 0x12,
+0x12, 0xA7, 0x5D, 0x12, 0x7C, 0x05, 0x12, 0xF9,
+0x1C, 0xB1, 0x27, 0x90, 0x88, 0x3D, 0xE0, 0x14,
+0xF0, 0x80, 0x31, 0x90, 0x88, 0x34, 0xE0, 0xC4,
+0x54, 0x0F, 0x64, 0x01, 0x70, 0x26, 0x51, 0x54,
+0xFE, 0x6F, 0x60, 0x20, 0x90, 0x05, 0x73, 0xE0,
+0xFF, 0xEE, 0x6F, 0x60, 0x17, 0x91, 0xA0, 0x30,
+0xE0, 0x12, 0xEF, 0x54, 0xBF, 0x12, 0xA7, 0x5D,
+0x12, 0x7C, 0x3B, 0xF1, 0xA1, 0x7D, 0x02, 0x7F,
+0x02, 0x12, 0x7C, 0x74, 0x90, 0x88, 0x32, 0xE0,
+0x44, 0x04, 0xF0, 0x22, 0x90, 0x88, 0x3C, 0xE0,
+0xFF, 0xA3, 0xE0, 0x22, 0x90, 0x88, 0x34, 0xE0,
+0xFF, 0xC4, 0x54, 0x0F, 0x22, 0x90, 0x88, 0x85,
+0x12, 0x04, 0xB8, 0xC0, 0x06, 0xC0, 0x07, 0x90,
+0x99, 0xAE, 0xE0, 0x24, 0x46, 0xFF, 0x90, 0x99,
+0xAD, 0xE0, 0x34, 0x00, 0xAB, 0x07, 0xFA, 0xE4,
+0xF9, 0xF8, 0xD0, 0x07, 0xD0, 0x06, 0x12, 0x80,
+0xCD, 0x90, 0x88, 0x85, 0x91, 0x7E, 0xEF, 0x24,
+0x46, 0xF1, 0xEA, 0x90, 0x88, 0x89, 0x91, 0x7E,
+0x90, 0x88, 0x85, 0x12, 0x82, 0x12, 0xC3, 0x12,
+0x03, 0xDA, 0x50, 0x02, 0x61, 0x5F, 0x90, 0x88,
+0x89, 0x12, 0x82, 0x12, 0x90, 0x88, 0x85, 0x12,
+0x04, 0xB8, 0x12, 0x80, 0xCD, 0x90, 0x9B, 0x00,
+0x12, 0x04, 0x31, 0x90, 0x88, 0x31, 0xE0, 0x30,
+0xE0, 0x34, 0x90, 0x88, 0x53, 0xE0, 0x24, 0x04,
+0xFF, 0xE4, 0x33, 0xFE, 0xEF, 0x78, 0x03, 0xC3,
+0x33, 0xCE, 0x33, 0xCE, 0xD8, 0xF9, 0x24, 0x50,
+0xFF, 0xE4, 0x3E, 0xFE, 0x90, 0x88, 0x4E, 0xE0,
+0xFD, 0xC3, 0xEF, 0x9D, 0xFB, 0xEE, 0x94, 0x00,
+0xFA, 0x91, 0x6D, 0x78, 0x07, 0x12, 0x03, 0xEB,
+0xEB, 0x2F, 0xFF, 0xEA, 0x80, 0x22, 0x90, 0x88,
+0x33, 0x91, 0xA3, 0x30, 0xE0, 0x02, 0x81, 0x5D,
+0x91, 0x6D, 0x78, 0x07, 0x12, 0x03, 0xEB, 0x90,
+0x88, 0x4E, 0xE0, 0xFD, 0xC3, 0x74, 0x60, 0x9D,
+0xCD, 0xE4, 0x94, 0x00, 0xCD, 0x2F, 0xFF, 0xED,
+0x3E, 0x90, 0x9A, 0xFC, 0xF0, 0xA3, 0xEF, 0xF0,
+0xC3, 0x90, 0x9A, 0xFD, 0xE0, 0x94, 0xA0, 0x90,
+0x9A, 0xFC, 0xE0, 0x94, 0x00, 0x50, 0x30, 0xA3,
+0xE0, 0xFB, 0x24, 0x6D, 0x91, 0x76, 0xE0, 0x04,
+0xF0, 0x91, 0x6D, 0xEF, 0x54, 0x7F, 0xFF, 0x74,
+0x0D, 0x2B, 0x91, 0x65, 0xE0, 0xFE, 0xEF, 0xC3,
+0x9E, 0x50, 0x09, 0x90, 0x9A, 0xFC, 0xA3, 0xE0,
+0x91, 0x63, 0xEF, 0xF0, 0x90, 0x88, 0x4C, 0xE0,
+0x04, 0xF0, 0xE0, 0x90, 0x00, 0xFE, 0xF0, 0x90,
+0x88, 0x4C, 0xE0, 0xFF, 0xD3, 0x90, 0x88, 0x90,
+0xE0, 0x9F, 0x90, 0x88, 0x8F, 0xE0, 0x94, 0x00,
+0x40, 0x02, 0x81, 0x5D, 0xE4, 0xFF, 0xFE, 0x91,
+0x73, 0xE0, 0x2F, 0xFF, 0x90, 0x88, 0x91, 0xE0,
+0xFD, 0xEF, 0xD3, 0x9D, 0x40, 0x07, 0x90, 0x9A,
+0xFE, 0xEE, 0xF0, 0x80, 0x05, 0x0E, 0xEE, 0xB4,
+0xA0, 0xE5, 0x91, 0x87, 0x40, 0x02, 0x80, 0x15,
+0x90, 0x9A, 0xFE, 0xE0, 0x04, 0xFE, 0xEE, 0xC3,
+0x94, 0xA0, 0x50, 0x13, 0x91, 0x73, 0xE0, 0x2F,
+0xFF, 0x91, 0x87, 0x40, 0x07, 0x90, 0x9A, 0xFF,
+0xEE, 0xF0, 0x80, 0x03, 0x0E, 0x80, 0xE7, 0x90,
+0x05, 0x5E, 0xE0, 0xFF, 0x91, 0x5E, 0xE0, 0xFD,
+0xEF, 0xC3, 0x9D, 0x40, 0x11, 0xEF, 0x9D, 0x90,
+0x05, 0x5E, 0xF0, 0x90, 0x88, 0x51, 0xEE, 0xF0,
+0x90, 0x9A, 0xFF, 0xE0, 0x80, 0x18, 0x91, 0x5E,
+0xE0, 0xFD, 0xC3, 0x74, 0x80, 0x9D, 0x2F, 0x90,
+0x05, 0x5E, 0xF0, 0xEE, 0x04, 0x90, 0x88, 0x51,
+0xF0, 0x90, 0x9A, 0xFF, 0xE0, 0x04, 0x90, 0x88,
+0x52, 0xF0, 0x90, 0x88, 0x51, 0xE0, 0xFF, 0xC3,
+0x94, 0x50, 0x40, 0x0A, 0xEF, 0x24, 0xB0, 0x90,
+0x88, 0x49, 0xF0, 0xE4, 0x80, 0x0E, 0xE4, 0x90,
+0x88, 0x49, 0xF0, 0x90, 0x88, 0x51, 0xE0, 0xFF,
+0xC3, 0x74, 0x50, 0x9F, 0x90, 0x88, 0x48, 0xF0,
+0x90, 0x88, 0x51, 0xE0, 0xFF, 0xA3, 0xE0, 0xC3,
+0x9F, 0x90, 0x88, 0x4F, 0xF0, 0x90, 0x88, 0x31,
+0xE0, 0x90, 0x88, 0x8E, 0xE0, 0x24, 0x08, 0xFF,
+0x90, 0x88, 0x4F, 0xE0, 0x2F, 0xF0, 0x90, 0x88,
+0x4F, 0xE0, 0xC3, 0x94, 0x50, 0x50, 0x03, 0x74,
+0x50, 0xF0, 0x90, 0x88, 0x4F, 0xE0, 0x24, 0x10,
+0xF0, 0x12, 0xF9, 0xB2, 0x74, 0x03, 0xF0, 0x12,
+0x6E, 0x2F, 0x90, 0x8A, 0xA3, 0x12, 0x90, 0x47,
+0xE4, 0xFF, 0x12, 0x04, 0x7E, 0x22, 0x90, 0x9A,
+0xFE, 0xE0, 0xFE, 0x24, 0x0D, 0xF5, 0x82, 0xE4,
+0x34, 0x99, 0xF5, 0x83, 0x22, 0x90, 0x9B, 0x00,
+0x02, 0x04, 0xB8, 0x74, 0x6D, 0x2E, 0xF5, 0x82,
+0xE4, 0x34, 0x98, 0xF5, 0x83, 0x22, 0x12, 0x04,
+0x31, 0x90, 0x88, 0x89, 0x02, 0x04, 0xB8, 0x90,
+0x88, 0x91, 0xE0, 0xFD, 0xC3, 0x90, 0x88, 0x90,
+0xE0, 0x9D, 0xFD, 0x90, 0x88, 0x8F, 0xE0, 0x94,
+0x00, 0xFC, 0xEF, 0xD3, 0x9D, 0xE4, 0x9C, 0x22,
+0x90, 0x88, 0x32, 0xE0, 0xFF, 0x13, 0x13, 0x54,
+0x3F, 0x22, 0x90, 0x88, 0x32, 0xE0, 0xFF, 0x13,
+0x13, 0x13, 0x54, 0x1F, 0x22, 0x91, 0xAA, 0x30,
+0xE0, 0x0B, 0xEF, 0xC4, 0x13, 0x13, 0x54, 0x03,
+0x30, 0xE0, 0x02, 0xB1, 0x27, 0x90, 0x88, 0x31,
+0x91, 0xA3, 0x30, 0xE0, 0x07, 0xEF, 0xF1, 0x68,
+0x70, 0x4C, 0x80, 0x48, 0x90, 0x88, 0x3F, 0xE0,
+0x04, 0xF0, 0x90, 0x88, 0x3A, 0xE0, 0x54, 0xEF,
+0xF0, 0xF1, 0xDF, 0x9F, 0x40, 0x36, 0x12, 0x97,
+0xE0, 0x70, 0x33, 0x12, 0x97, 0xF3, 0x70, 0x08,
+0x90, 0x8A, 0xF5, 0x12, 0x88, 0xC8, 0x80, 0x27,
+0x90, 0x8A, 0xF5, 0x12, 0x88, 0xC8, 0x90, 0x88,
+0x40, 0xE0, 0x04, 0xF0, 0xE0, 0xD3, 0x94, 0x02,
+0x40, 0x09, 0xB1, 0x1F, 0xE4, 0x90, 0x88, 0x40,
+0xF0, 0x80, 0x03, 0x12, 0x93, 0xD0, 0xE4, 0x90,
+0x88, 0x3F, 0xF0, 0x22, 0xD1, 0x3B, 0x22, 0x90,
+0x88, 0x32, 0xE0, 0x54, 0xFB, 0xF0, 0x22, 0x7D,
+0x02, 0x7F, 0x02, 0x02, 0x7C, 0x7E, 0x90, 0x98,
+0x4C, 0x91, 0xA3, 0x30, 0xE0, 0x0A, 0xF1, 0x9A,
+0x12, 0xFA, 0xA2, 0x04, 0xF0, 0x02, 0x8B, 0xEA,
+0x90, 0x8A, 0xAF, 0x12, 0x90, 0x47, 0x7D, 0x08,
+0xE4, 0xFF, 0x02, 0x04, 0x7E, 0xE4, 0xFE, 0x91,
+0x73, 0xE4, 0xF0, 0x74, 0x0D, 0x2E, 0x91, 0x65,
+0x74, 0xFF, 0xF0, 0x0E, 0xEE, 0xB4, 0xA0, 0xEF,
+0xE4, 0x90, 0x88, 0x4D, 0xF0, 0x90, 0x88, 0x4C,
+0xF0, 0x90, 0x88, 0x50, 0xF0, 0xEF, 0xB4, 0x01,
+0x07, 0xA3, 0x74, 0xA0, 0xF0, 0xE4, 0xA3, 0xF0,
+0x22, 0x90, 0x93, 0x04, 0x91, 0xAD, 0x30, 0xE0,
+0x31, 0xEF, 0xC4, 0x54, 0x0F, 0x20, 0xE0, 0x25,
+0xF1, 0xD4, 0x60, 0x0B, 0xF1, 0xCA, 0x40, 0x07,
+0xB1, 0xC1, 0x90, 0x95, 0xF5, 0x80, 0x05, 0xB1,
+0xC1, 0x90, 0x95, 0xED, 0x12, 0x82, 0x12, 0x12,
+0x80, 0xDB, 0x90, 0x9C, 0x9B, 0x12, 0x04, 0x31,
+0x12, 0x95, 0x30, 0x80, 0x05, 0x7F, 0x01, 0x12,
+0xA6, 0xCA, 0x90, 0x93, 0x04, 0xE0, 0xC3, 0x13,
+0x30, 0xE0, 0x05, 0x7F, 0x01, 0x12, 0xA6, 0xCA,
+0x22, 0xE4, 0x7F, 0xE8, 0x7E, 0x03, 0xFD, 0xFC,
+0x22, 0xE4, 0xF5, 0x0F, 0x90, 0x06, 0xA9, 0xE0,
+0xF5, 0x0F, 0x54, 0xC0, 0x70, 0x12, 0xD1, 0x34,
+0xF0, 0x54, 0xFD, 0xF0, 0xD1, 0x3B, 0x90, 0x88,
+0x39, 0xE0, 0x60, 0x4F, 0xF1, 0x82, 0xF0, 0x22,
+0xE5, 0x0F, 0x30, 0xE6, 0x2A, 0x90, 0x88, 0x36,
+0xE0, 0x64, 0x01, 0x70, 0x25, 0x90, 0x88, 0x3A,
+0xE0, 0x44, 0x01, 0xF0, 0x12, 0x97, 0xF3, 0x64,
+0x02, 0x60, 0x0F, 0x90, 0x88, 0x9D, 0xE0, 0x20,
+0xE0, 0x10, 0x90, 0x8A, 0xE1, 0x12, 0x88, 0xC8,
+0x80, 0x08, 0x12, 0x93, 0xD0, 0x80, 0x03, 0xD1,
+0x34, 0xF0, 0xE5, 0x0F, 0x90, 0x88, 0x3A, 0x30,
+0xE7, 0x0D, 0xE0, 0x44, 0x02, 0xD1, 0x4B, 0x90,
+0x88, 0x31, 0xE0, 0x44, 0x04, 0xF0, 0x22, 0xE0,
+0x54, 0xFD, 0xF0, 0x22, 0x90, 0x88, 0x3A, 0xE0,
+0x54, 0xFE, 0x22, 0x90, 0x88, 0x38, 0xE0, 0xFF,
+0x90, 0x8A, 0xB9, 0x12, 0xAC, 0x51, 0x7D, 0x01,
+0x02, 0x04, 0x7E, 0xF0, 0xE4, 0x90, 0x92, 0x20,
+0xF0, 0x90, 0x88, 0x94, 0xE0, 0x90, 0x92, 0x21,
+0xF0, 0xE4, 0xFB, 0xFD, 0x7F, 0x54, 0x7E, 0x01,
+0x02, 0x66, 0x33, 0x12, 0x97, 0xE0, 0x70, 0x11,
+0x90, 0x88, 0x36, 0xE0, 0x60, 0x0B, 0x90, 0x88,
+0x3A, 0xE0, 0x20, 0xE4, 0x04, 0xD1, 0x7A, 0xD1,
+0x4B, 0x22, 0x90, 0x01, 0x57, 0xE4, 0xF0, 0x90,
+0x01, 0x3C, 0x74, 0x02, 0x22, 0x12, 0x97, 0xE0,
+0x70, 0x1A, 0x90, 0x88, 0x36, 0xE0, 0x60, 0x14,
+0x90, 0x88, 0x3A, 0xE0, 0x20, 0xE4, 0x0D, 0xD1,
+0x7A, 0xF0, 0x90, 0x88, 0x31, 0xE0, 0xF1, 0x68,
+0x70, 0x02, 0xD1, 0x3B, 0x22, 0xC0, 0xE0, 0xC0,
+0xF0, 0xC0, 0x83, 0xC0, 0x82, 0xC0, 0xD0, 0x75,
+0xD0, 0x00, 0xC0, 0x00, 0xC0, 0x01, 0xC0, 0x02,
+0xC0, 0x03, 0xC0, 0x04, 0xC0, 0x05, 0xC0, 0x06,
+0xC0, 0x07, 0x90, 0x01, 0xC4, 0x74, 0xA5, 0xF0,
+0x74, 0xB6, 0xA3, 0xF0, 0x12, 0x64, 0x7F, 0xE5,
+0x30, 0x30, 0xE1, 0x02, 0xF1, 0x5F, 0xE5, 0x2D,
+0x30, 0xE3, 0x03, 0x12, 0xE2, 0x83, 0xE5, 0x2D,
+0x30, 0xE4, 0x03, 0x12, 0xE2, 0x96, 0xE5, 0x2D,
+0x30, 0xE5, 0x03, 0x12, 0xE2, 0xA7, 0xE5, 0x2F,
+0x30, 0xE0, 0x02, 0x31, 0x0B, 0xE5, 0x2F, 0x30,
+0xE1, 0x03, 0x12, 0xAE, 0x02, 0xE5, 0x2F, 0x30,
+0xE2, 0x02, 0xF1, 0x89, 0xE5, 0x2F, 0x30, 0xE3,
+0x02, 0xD1, 0x63, 0xE5, 0x2F, 0x30, 0xE4, 0x02,
+0xD1, 0x85, 0xE5, 0x2F, 0x30, 0xE5, 0x03, 0x12,
+0xDC, 0xF6, 0xE5, 0x2F, 0x30, 0xE6, 0x02, 0xF1,
+0x47, 0x74, 0xA5, 0x04, 0x90, 0x01, 0xC4, 0xF0,
+0x74, 0xB6, 0xA3, 0xF0, 0xD0, 0x07, 0xD0, 0x06,
+0xD0, 0x05, 0xD0, 0x04, 0xD0, 0x03, 0xD0, 0x02,
+0xD0, 0x01, 0xD0, 0x00, 0xD0, 0xD0, 0xD0, 0x82,
+0xD0, 0x83, 0xD0, 0xF0, 0xD0, 0xE0, 0x32, 0xE4,
+0xFF, 0x12, 0x78, 0x4A, 0xBF, 0x01, 0x0F, 0x90,
+0x88, 0x36, 0xE0, 0x60, 0x09, 0xD1, 0x34, 0xF0,
+0x54, 0x07, 0x70, 0x02, 0xD1, 0x3B, 0x22, 0x90,
+0x88, 0x36, 0xE0, 0x60, 0x02, 0xF1, 0x75, 0x22,
+0x54, 0xFB, 0xF0, 0x90, 0x88, 0x3A, 0xE0, 0x54,
+0xFD, 0xF0, 0x54, 0x07, 0x22, 0x90, 0x88, 0x39,
+0xE0, 0xB4, 0x04, 0x03, 0xF1, 0x82, 0xF0, 0x02,
+0x94, 0xFF, 0x90, 0x00, 0x02, 0xE0, 0x44, 0x01,
+0x22, 0x90, 0x98, 0x56, 0xE0, 0x04, 0xF0, 0x90,
+0x88, 0x39, 0xE0, 0x64, 0x02, 0x60, 0x02, 0x31,
+0x1A, 0x22, 0x7B, 0x00, 0x7A, 0x00, 0x79, 0x00,
+0x22, 0x7D, 0x01, 0x7F, 0x02, 0x02, 0x7C, 0x74,
+0x90, 0x00, 0x02, 0xE0, 0x54, 0xFE, 0xF0, 0x22,
+0x90, 0x88, 0x3A, 0xE0, 0x44, 0x10, 0xF0, 0x22,
+0x90, 0x93, 0x0A, 0xE0, 0x90, 0x05, 0x73, 0xF0,
+0x22, 0x90, 0x88, 0x36, 0xE0, 0x60, 0x02, 0x91,
+0xB5, 0x22, 0x90, 0x98, 0x31, 0x12, 0x82, 0x12,
+0xD3, 0x02, 0x03, 0xDA, 0x90, 0x95, 0xF1, 0x12,
+0x04, 0xB8, 0xEC, 0x4D, 0x4E, 0x4F, 0x22, 0x90,
+0x88, 0x93, 0xE0, 0xFF, 0x90, 0x88, 0x3F, 0xE0,
+0xD3, 0x22, 0xFF, 0xE4, 0x3E, 0xFE, 0xE4, 0x3D,
+0xFD, 0xE4, 0x3C, 0xFC, 0x22, 0x90, 0x93, 0x0C,
+0xE0, 0x20, 0xE0, 0x03, 0x02, 0xB8, 0xC2, 0xE4,
 0x90, 0x99, 0xB1, 0xF0, 0x90, 0x99, 0xB1, 0xE0,
 0xFF, 0xC3, 0x94, 0x05, 0x40, 0x02, 0x01, 0xC2,
 0x91, 0x0B, 0x80, 0x05, 0xC3, 0x33, 0xCE, 0x33,
@@ -8087,7 +8482,7 @@ u8 array_mp_8723d_fw_wowlan[] = {
 0xEF, 0xC3, 0x13, 0x30, 0xE0, 0x15, 0x90, 0x93,
 0x0F, 0xE0, 0xFF, 0x90, 0x99, 0xB1, 0x11, 0xC9,
 0x80, 0x02, 0xC3, 0x33, 0xD8, 0xFC, 0x4F, 0x90,
-0x93, 0x0F, 0xF0, 0x12, 0x9C, 0x54, 0xFF, 0x90,
+0x93, 0x0F, 0xF0, 0x12, 0x9C, 0x5A, 0xFF, 0x90,
 0x99, 0xB1, 0xE0, 0xFE, 0x24, 0x10, 0xF5, 0x82,
 0xE4, 0x34, 0x93, 0xF5, 0x83, 0xEF, 0x12, 0x87,
 0xE6, 0xFF, 0x74, 0x15, 0x2E, 0xF5, 0x82, 0xE4,
@@ -8179,446 +8574,447 @@ u8 array_mp_8723d_fw_wowlan[] = {
 0xEF, 0x14, 0xFF, 0x90, 0x87, 0x0C, 0xE0, 0xB5,
 0x07, 0x04, 0x7F, 0x01, 0x80, 0x02, 0x7F, 0x00,
 0xEF, 0x60, 0x09, 0x90, 0x01, 0xC1, 0xE0, 0x44,
-0x01, 0xF0, 0x61, 0xFB, 0x90, 0x9C, 0xDE, 0x91,
+0x01, 0xF0, 0x61, 0xFB, 0x90, 0x9C, 0xE0, 0x91,
 0x09, 0x80, 0x05, 0xC3, 0x33, 0xCE, 0x33, 0xCE,
 0xD8, 0xF9, 0xFF, 0xED, 0xFB, 0xEF, 0x5B, 0x70,
 0x02, 0x61, 0xDE, 0xE4, 0xFC, 0x91, 0x01, 0xA4,
 0xFF, 0xEC, 0x7A, 0x00, 0x2F, 0xFF, 0xEA, 0x35,
-0xF0, 0xFE, 0x74, 0xD0, 0xF1, 0x41, 0x90, 0x87,
+0xF0, 0xFE, 0x74, 0xD0, 0xB1, 0xCE, 0x90, 0x87,
 0x0C, 0xE0, 0xF9, 0x75, 0xF0, 0x08, 0x90, 0x86,
-0xBB, 0xF1, 0x4C, 0xEF, 0x91, 0x00, 0xA4, 0xFF,
+0xBB, 0xB1, 0xD9, 0xEF, 0x91, 0x00, 0xA4, 0xFF,
 0xEC, 0x2F, 0xFF, 0xEA, 0x35, 0xF0, 0xFE, 0x74,
-0xF0, 0xF1, 0x41, 0x75, 0xF0, 0x08, 0xE9, 0x90,
-0x86, 0xBF, 0xF1, 0x4C, 0xEF, 0xF0, 0x0C, 0xEC,
-0xB4, 0x04, 0xC2, 0x90, 0x9C, 0xDE, 0x71, 0x01,
+0xF0, 0xB1, 0xCE, 0x75, 0xF0, 0x08, 0xE9, 0x90,
+0x86, 0xBF, 0xB1, 0xD9, 0xEF, 0xF0, 0x0C, 0xEC,
+0xB4, 0x04, 0xC2, 0x90, 0x9C, 0xE0, 0x71, 0x01,
 0x08, 0x80, 0x02, 0xC3, 0x33, 0xD8, 0xFC, 0xF4,
-0x5D, 0xFD, 0x90, 0x9C, 0xDE, 0x71, 0x01, 0x08,
+0x5D, 0xFD, 0x90, 0x9C, 0xE0, 0x71, 0x01, 0x08,
 0x80, 0x02, 0xC3, 0x33, 0xD8, 0xFC, 0x90, 0x01,
-0xCC, 0xF0, 0x90, 0x9C, 0xDE, 0xE0, 0x04, 0xF0,
+0xCC, 0xF0, 0x90, 0x9C, 0xE0, 0xE0, 0x04, 0xF0,
 0xE0, 0x54, 0x03, 0xF0, 0x90, 0x87, 0x0C, 0xE0,
 0x04, 0xF0, 0xE0, 0x7F, 0x00, 0xB4, 0x0A, 0x02,
 0x7F, 0x01, 0xEF, 0x70, 0x02, 0x61, 0x16, 0xE4,
 0x90, 0x87, 0x0C, 0xF0, 0x61, 0x16, 0x90, 0x01,
-0xC0, 0xE0, 0x44, 0x02, 0xF0, 0x90, 0x9C, 0xDE,
+0xC0, 0xE0, 0x44, 0x02, 0xF0, 0x90, 0x9C, 0xE0,
 0xE0, 0x44, 0x80, 0x90, 0x00, 0x8A, 0x91, 0x00,
 0x90, 0x01, 0xD0, 0x12, 0x04, 0x6E, 0xE0, 0x90,
 0x01, 0xC3, 0xF0, 0xD0, 0xD0, 0x92, 0xAF, 0x22,
-0xF0, 0x90, 0x9C, 0xDE, 0xE0, 0x75, 0xF0, 0x04,
+0xF0, 0x90, 0x9C, 0xE0, 0xE0, 0x75, 0xF0, 0x04,
 0x22, 0xE0, 0xFF, 0x74, 0x01, 0x7E, 0x00, 0xA8,
-0x07, 0x08, 0x22, 0xF1, 0x77, 0xA3, 0xED, 0xF0,
-0x90, 0x98, 0x47, 0xE0, 0xFF, 0x12, 0x7B, 0x07,
-0x90, 0x9A, 0x37, 0xE4, 0xF0, 0xA3, 0xEF, 0xF0,
-0x90, 0xFD, 0x10, 0xE0, 0x90, 0x9A, 0x37, 0x75,
-0xF0, 0x00, 0x12, 0x02, 0xE7, 0xE4, 0x90, 0x9A,
-0x41, 0xF0, 0x90, 0x93, 0x27, 0xE0, 0x54, 0x07,
-0xFF, 0x90, 0x9A, 0x41, 0xE0, 0xC3, 0x9F, 0x40,
-0x02, 0xA1, 0xAA, 0x90, 0x9A, 0x35, 0xE0, 0x24,
-0x04, 0xFE, 0xB1, 0xB8, 0x90, 0x9A, 0x39, 0xF0,
-0xA3, 0xCE, 0xF0, 0x90, 0x9A, 0x38, 0xE0, 0x24,
-0x01, 0xFF, 0x90, 0x9A, 0x37, 0xB1, 0xCD, 0x7F,
-0x00, 0xFE, 0xC0, 0x06, 0xC0, 0x07, 0x90, 0x9A,
-0x37, 0xE0, 0xFE, 0xA3, 0xE0, 0xFF, 0x12, 0x7A,
-0x7E, 0xEF, 0xFD, 0xD0, 0xE0, 0x2D, 0xFF, 0xD0,
-0xE0, 0x34, 0x00, 0xFE, 0x90, 0x9A, 0x3B, 0xF0,
-0xA3, 0xEF, 0xF0, 0x90, 0x9A, 0x38, 0xE0, 0x24,
-0x02, 0xFD, 0x90, 0x9A, 0x37, 0xE0, 0x34, 0x00,
-0xFC, 0x90, 0x9A, 0x3F, 0xF0, 0xA3, 0xED, 0xF0,
-0x2F, 0x12, 0xFA, 0x24, 0x90, 0x9A, 0x44, 0x74,
-0x01, 0xF0, 0xE4, 0x90, 0x9A, 0x43, 0xF0, 0x90,
-0x9A, 0x43, 0xE0, 0xFF, 0xFD, 0xD3, 0x90, 0x9A,
-0x3C, 0xE0, 0x9D, 0x90, 0x9A, 0x3B, 0xE0, 0x94,
-0x00, 0x50, 0x02, 0xA1, 0x76, 0xEF, 0xB4, 0x12,
-0x08, 0xB1, 0xAD, 0xCF, 0x24, 0x06, 0x12, 0xFA,
-0x2F, 0x90, 0x9A, 0x43, 0xE0, 0x75, 0xF0, 0x02,
-0xA4, 0xFD, 0xAC, 0xF0, 0xAE, 0x04, 0x78, 0x03,
-0xCE, 0xA2, 0xE7, 0x13, 0xCE, 0x13, 0xD8, 0xF8,
-0xFF, 0xED, 0x54, 0x07, 0x90, 0x9A, 0x42, 0xF0,
-0x90, 0x9A, 0x3E, 0xE0, 0x2F, 0x12, 0xA5, 0xE7,
-0xFE, 0x12, 0x7A, 0x7E, 0x90, 0x9A, 0x45, 0xEF,
-0xF0, 0xFD, 0x90, 0x9A, 0x42, 0x91, 0x09, 0x80,
-0x05, 0xC3, 0x33, 0xCE, 0x33, 0xCE, 0xD8, 0xF9,
-0xFF, 0xEF, 0x5D, 0x6F, 0x70, 0x01, 0xEE, 0x70,
-0x16, 0xB1, 0xBF, 0x54, 0x0F, 0xFF, 0xC0, 0x07,
-0xF1, 0x5A, 0x12, 0xA4, 0x62, 0xEF, 0x54, 0x0F,
-0xD0, 0x07, 0x6F, 0x60, 0x02, 0x80, 0x32, 0x90,
-0x9A, 0x42, 0xE0, 0x04, 0x91, 0x0A, 0x80, 0x05,
-0xC3, 0x33, 0xCE, 0x33, 0xCE, 0xD8, 0xF9, 0xFF,
-0x90, 0x9A, 0x45, 0xE0, 0xFD, 0xEF, 0x5D, 0x6F,
-0x70, 0x01, 0xEE, 0x70, 0x1B, 0xB1, 0xBF, 0x54,
-0xF0, 0xFF, 0xC0, 0x07, 0xF1, 0x5A, 0x12, 0xA4,
-0x62, 0xEF, 0x54, 0xF0, 0xD0, 0x07, 0x6F, 0x60,
-0x07, 0xE4, 0x90, 0x9A, 0x44, 0xF0, 0x80, 0x0E,
-0x90, 0x9A, 0x39, 0x12, 0xBF, 0x87, 0x90, 0x9A,
-0x43, 0xE0, 0x04, 0xF0, 0x81, 0xAF, 0x90, 0x9A,
-0x44, 0xE0, 0xB4, 0x01, 0x03, 0x7F, 0x01, 0x22,
-0x90, 0x9A, 0x3C, 0xE0, 0x24, 0x03, 0x12, 0xF9,
-0xEE, 0xEF, 0x78, 0x02, 0xCE, 0xC3, 0x13, 0xCE,
-0x13, 0xD8, 0xF9, 0xFF, 0x90, 0x9A, 0x3E, 0xE0,
-0x2F, 0xFF, 0x90, 0x9A, 0x3D, 0xE0, 0x3E, 0x12,
-0xFB, 0x4E, 0x90, 0x9A, 0x41, 0xE0, 0x04, 0xF0,
-0x81, 0x3A, 0x7F, 0x00, 0x22, 0x90, 0x9A, 0x36,
-0xE0, 0xFF, 0x90, 0x9A, 0x35, 0xE0, 0x2F, 0xFF,
-0x90, 0x9A, 0x34, 0xE0, 0x34, 0x00, 0x22, 0x90,
-0x9A, 0x43, 0xE0, 0xFF, 0x90, 0x9A, 0x40, 0xE0,
-0x2F, 0xFF, 0x90, 0x9A, 0x3F, 0xE0, 0x34, 0x00,
-0xFE, 0x12, 0x7A, 0x7E, 0xEF, 0x22, 0xF1, 0x77,
-0xA3, 0xED, 0xF0, 0x12, 0xFB, 0x17, 0x7A, 0x80,
-0x79, 0x80, 0x7E, 0x00, 0x7F, 0x06, 0x12, 0x01,
-0xE0, 0x78, 0x43, 0x7C, 0x9A, 0x7D, 0x01, 0x7B,
-0xFF, 0x7A, 0x80, 0x79, 0x86, 0x7E, 0x00, 0x7F,
-0x04, 0x12, 0x01, 0xE0, 0x78, 0x47, 0x7C, 0x9A,
-0x7D, 0x01, 0x7B, 0xFF, 0x7A, 0x80, 0x79, 0x8A,
-0x7E, 0x00, 0x7F, 0x04, 0x12, 0x01, 0xE0, 0xE4,
-0x90, 0x9A, 0x4C, 0xF0, 0xB1, 0xAD, 0xCF, 0x24,
-0x06, 0xCF, 0x34, 0x00, 0x12, 0xA4, 0x61, 0xEF,
-0x64, 0x08, 0x60, 0x02, 0xE1, 0x29, 0xB1, 0xAD,
-0xCF, 0x24, 0x07, 0xCF, 0x34, 0x00, 0x12, 0xA4,
-0x61, 0xEF, 0x64, 0x06, 0x60, 0x02, 0xE1, 0x29,
-0x90, 0x9A, 0x4C, 0x04, 0xF0, 0xE4, 0x90, 0x9A,
-0x4B, 0xF0, 0xF1, 0x2F, 0x94, 0x06, 0x50, 0x18,
-0x90, 0x9A, 0x35, 0xE0, 0x24, 0x0A, 0xFD, 0x90,
-0x9A, 0x34, 0xE0, 0x12, 0xA4, 0x57, 0x90, 0x9A,
-0x4B, 0x12, 0xFB, 0x0E, 0xF1, 0x36, 0x80, 0xE2,
-0x78, 0x37, 0x7C, 0x9A, 0x7D, 0x01, 0x7B, 0x01,
-0x7A, 0x93, 0x79, 0x38, 0x12, 0xF0, 0x26, 0x60,
-0x02, 0xE1, 0x29, 0x90, 0x9A, 0x4B, 0xF0, 0xF1,
-0x2F, 0x94, 0x04, 0x50, 0x19, 0xF1, 0x63, 0xB1,
-0xB8, 0xCD, 0x24, 0x20, 0x12, 0xA4, 0x56, 0x90,
-0x9A, 0x4B, 0xE0, 0x24, 0x47, 0xF5, 0x82, 0xE4,
-0x34, 0x9A, 0xF1, 0x36, 0x80, 0xE1, 0x78, 0x47,
-0x7C, 0x9A, 0x12, 0xF9, 0xAA, 0xEF, 0x60, 0x02,
-0xE1, 0x20, 0x90, 0x06, 0x30, 0xE0, 0x44, 0x01,
-0x54, 0xDF, 0xF0, 0x90, 0x93, 0x26, 0xE0, 0x30,
-0xE0, 0x02, 0x80, 0x10, 0x90, 0x98, 0x35, 0xE0,
-0xB4, 0x02, 0x13, 0x90, 0x93, 0x25, 0x12, 0x97,
-0xDE, 0x20, 0xE0, 0x0A, 0x90, 0x01, 0xC7, 0x74,
-0x09, 0x12, 0xA7, 0x45, 0x80, 0x5B, 0xE4, 0x90,
-0x9A, 0x4B, 0xF0, 0xF1, 0x2F, 0x94, 0x06, 0x50,
-0x0D, 0x12, 0xA4, 0x42, 0x90, 0x9A, 0x4B, 0x12,
-0xEF, 0x92, 0xF1, 0x36, 0x80, 0xED, 0xE4, 0x90,
-0x9A, 0x4B, 0xF0, 0xF1, 0x2F, 0x94, 0x04, 0x50,
-0x19, 0xF1, 0x63, 0xB1, 0xB8, 0xCD, 0x24, 0x16,
-0x12, 0xA4, 0x56, 0x90, 0x9A, 0x4B, 0xE0, 0x24,
-0x43, 0xF5, 0x82, 0xE4, 0x34, 0x9A, 0xF1, 0x36,
-0x80, 0xE1, 0x12, 0x94, 0xCD, 0x7B, 0x01, 0x7A,
-0x9A, 0x79, 0x3D, 0x12, 0xD7, 0x99, 0xF0, 0x7A,
-0x9A, 0x79, 0x43, 0x12, 0x8B, 0xEA, 0x80, 0x09,
-0x90, 0x06, 0x30, 0xE0, 0x44, 0x21, 0x54, 0xEF,
-0xF0, 0x90, 0x9A, 0x4C, 0xE0, 0xFF, 0x22, 0x90,
-0x9A, 0x4B, 0xE0, 0xFF, 0xC3, 0x22, 0xF5, 0x83,
-0xEF, 0xF0, 0x90, 0x9A, 0x4B, 0xE0, 0x04, 0xF0,
-0x22, 0x2F, 0xF5, 0x82, 0x74, 0x01, 0x3E, 0xF5,
-0x83, 0xE0, 0xFF, 0x22, 0x12, 0x04, 0x6E, 0xE5,
-0x82, 0x2C, 0xF5, 0x82, 0xE4, 0x35, 0x83, 0xF5,
-0x83, 0x22, 0x90, 0x9A, 0x39, 0xE0, 0xFE, 0xA3,
-0xE0, 0xFF, 0x22, 0x90, 0x9A, 0x36, 0xE0, 0xFD,
-0x90, 0x9A, 0x35, 0xE0, 0x2D, 0xFD, 0x22, 0x90,
-0x9A, 0x36, 0xED, 0xF0, 0xA3, 0xEB, 0xF0, 0x90,
-0x9A, 0x34, 0xEE, 0xF0, 0xA3, 0xEF, 0xF0, 0x22,
-0xF1, 0x77, 0x12, 0xBF, 0xD4, 0xE4, 0x90, 0x9A,
-0x3B, 0xF0, 0xF0, 0x90, 0x9A, 0x37, 0x12, 0xFB,
-0x37, 0xC3, 0x9F, 0x50, 0x2B, 0xF1, 0x63, 0xB1,
-0xB8, 0xFC, 0xEF, 0x12, 0xFA, 0x8E, 0xEE, 0x7E,
-0x00, 0x2D, 0x12, 0xA4, 0x5E, 0x90, 0x9A, 0x38,
-0x12, 0x82, 0x1E, 0x90, 0x9A, 0x3B, 0xE0, 0xF5,
-0x82, 0x75, 0x83, 0x00, 0xEF, 0x12, 0x02, 0x5E,
-0x90, 0x9A, 0x3B, 0xE0, 0x04, 0xF0, 0x80, 0xCB,
-0x22, 0xF1, 0x77, 0x24, 0x16, 0xFF, 0xE4, 0x3E,
-0x12, 0xA4, 0x61, 0x90, 0x95, 0xA3, 0xA3, 0xE0,
-0xB5, 0x07, 0x1D, 0x90, 0x9A, 0x35, 0xE0, 0x24,
-0x16, 0xB1, 0xB7, 0xFE, 0x12, 0xA5, 0xF7, 0x7D,
-0x01, 0x12, 0x04, 0x7E, 0xEF, 0xFD, 0x90, 0x95,
-0xA3, 0xE0, 0x6D, 0x70, 0x01, 0xE4, 0x60, 0x03,
-0x7F, 0x00, 0x22, 0x7F, 0x01, 0x22, 0x12, 0x02,
-0x06, 0x54, 0x01, 0xFF, 0x90, 0x93, 0x0C, 0xE0,
-0x54, 0xFE, 0x4F, 0xF0, 0x30, 0xE0, 0x04, 0xE4,
-0x12, 0x9F, 0xAA, 0x22, 0x12, 0x02, 0x06, 0xFF,
-0x90, 0x98, 0x58, 0xF0, 0xBF, 0x01, 0x0A, 0x7F,
-0x01, 0x12, 0x90, 0x50, 0xE4, 0x90, 0x98, 0x58,
-0xF0, 0x22, 0xE4, 0xFD, 0x02, 0x8F, 0xF5, 0xEF,
-0xB4, 0xFF, 0x06, 0x90, 0x98, 0x6A, 0xED, 0xF0,
-0x22, 0xEF, 0xF4, 0xFE, 0x90, 0x98, 0x6A, 0xE0,
-0x5E, 0xFE, 0xED, 0x5F, 0x4E, 0xF0, 0x22, 0xEF,
-0xB4, 0xFF, 0x06, 0x90, 0x98, 0x6B, 0xED, 0xF0,
-0x22, 0xEF, 0xF4, 0xFE, 0x90, 0x98, 0x6B, 0x80,
-0xE6, 0x90, 0x9C, 0xDF, 0xED, 0xF0, 0x64, 0x01,
-0x60, 0x26, 0xE0, 0xFE, 0x64, 0x02, 0x60, 0x20,
-0xEE, 0x64, 0x29, 0x60, 0x1B, 0xEE, 0x64, 0x2A,
-0x60, 0x16, 0xEE, 0x64, 0x36, 0x60, 0x11, 0xEE,
-0xB4, 0x37, 0x02, 0x80, 0x0B, 0xAD, 0x07, 0x7F,
-0xFF, 0x11, 0x3F, 0x90, 0x98, 0x6B, 0xE0, 0xFF,
-0x90, 0x98, 0x6A, 0xE0, 0x4F, 0x90, 0x05, 0x22,
-0xF0, 0x90, 0x9C, 0xDF, 0xE0, 0x90, 0x93, 0x01,
-0xF0, 0x22, 0x12, 0xF9, 0xB9, 0x64, 0x01, 0x60,
-0x02, 0x21, 0x26, 0xEF, 0x24, 0x39, 0x60, 0x12,
-0x14, 0x60, 0x19, 0x24, 0x02, 0x70, 0x1F, 0xE4,
-0x90, 0x99, 0xB7, 0xF0, 0xA3, 0x74, 0x06, 0xF0,
-0x80, 0x14, 0x90, 0x99, 0xB7, 0x74, 0x06, 0xF0,
-0xA3, 0xF0, 0x80, 0x0A, 0x90, 0x99, 0xB7, 0x74,
-0x0C, 0xF0, 0xA3, 0x74, 0x04, 0xF0, 0xB1, 0xE9,
-0xF0, 0x71, 0xD5, 0x40, 0x20, 0x90, 0x99, 0xB5,
-0xE0, 0x12, 0xFA, 0x98, 0x7A, 0x99, 0x79, 0xB4,
-0x12, 0x5F, 0xA6, 0xBF, 0x01, 0x07, 0x90, 0x99,
-0xB4, 0xE0, 0xF4, 0x70, 0x41, 0x31, 0x27, 0xA3,
-0xE0, 0x14, 0xF0, 0x80, 0xDC, 0xB1, 0xE9, 0xF0,
-0x71, 0xD5, 0x40, 0x32, 0x90, 0x99, 0xB5, 0xE0,
-0xFD, 0x7C, 0x00, 0x24, 0xA8, 0xFF, 0xEC, 0x34,
-0x01, 0xFE, 0xED, 0x24, 0x01, 0xFD, 0xEC, 0x33,
-0xFC, 0x90, 0x99, 0xB7, 0xE0, 0x12, 0xFA, 0x8E,
-0x12, 0xA7, 0xF2, 0x8D, 0x82, 0x8C, 0x83, 0x12,
-0x02, 0x1F, 0xFD, 0x12, 0xC0, 0x36, 0x31, 0x27,
-0xA3, 0xE0, 0x14, 0xF0, 0x80, 0xCA, 0x22, 0x90,
+0x07, 0x08, 0x22, 0x12, 0xE8, 0x98, 0xA3, 0xED,
+0xF0, 0x90, 0x98, 0x47, 0xE0, 0xFF, 0x12, 0x7B,
+0x07, 0x90, 0x9A, 0x37, 0xE4, 0xF0, 0xA3, 0xEF,
+0xF0, 0x90, 0xFD, 0x10, 0xE0, 0x90, 0x9A, 0x37,
+0x75, 0xF0, 0x00, 0x12, 0x02, 0xE7, 0xE4, 0x90,
+0x9A, 0x41, 0xF0, 0x90, 0x93, 0x27, 0xE0, 0x54,
+0x07, 0xFF, 0x90, 0x9A, 0x41, 0xE0, 0xC3, 0x9F,
+0x40, 0x02, 0xA1, 0xAB, 0x90, 0x9A, 0x35, 0xE0,
+0x24, 0x04, 0xFE, 0x12, 0xA6, 0x32, 0x90, 0x9A,
+0x39, 0xF0, 0xA3, 0xCE, 0xF0, 0x90, 0x9A, 0x38,
+0xE0, 0x24, 0x01, 0xFF, 0x90, 0x9A, 0x37, 0xB1,
+0xBC, 0x7F, 0x00, 0xFE, 0xC0, 0x06, 0xC0, 0x07,
+0x90, 0x9A, 0x37, 0xE0, 0xFE, 0xA3, 0xE0, 0xFF,
+0x12, 0x7A, 0x7E, 0xEF, 0xFD, 0xD0, 0xE0, 0x2D,
+0xFF, 0xD0, 0xE0, 0x34, 0x00, 0xFE, 0x90, 0x9A,
+0x3B, 0xF0, 0xA3, 0xEF, 0xF0, 0x90, 0x9A, 0x38,
+0xE0, 0x24, 0x02, 0xFD, 0x90, 0x9A, 0x37, 0xE0,
+0x34, 0x00, 0xFC, 0x90, 0x9A, 0x3F, 0xF0, 0xA3,
+0xED, 0xF0, 0x2F, 0x12, 0xFA, 0xC4, 0x90, 0x9A,
+0x44, 0x74, 0x01, 0xF0, 0xE4, 0x90, 0x9A, 0x43,
+0xF0, 0x90, 0x9A, 0x43, 0xE0, 0xFF, 0xFD, 0xD3,
+0x90, 0x9A, 0x3C, 0xE0, 0x9D, 0x90, 0x9A, 0x3B,
+0xE0, 0x94, 0x00, 0x50, 0x02, 0xA1, 0x78, 0xEF,
+0xB4, 0x12, 0x09, 0x12, 0xA6, 0x27, 0xCF, 0x24,
+0x06, 0x12, 0xFA, 0xCF, 0x90, 0x9A, 0x43, 0xE0,
+0x75, 0xF0, 0x02, 0xA4, 0xFD, 0xAC, 0xF0, 0xAE,
+0x04, 0x78, 0x03, 0xCE, 0xA2, 0xE7, 0x13, 0xCE,
+0x13, 0xD8, 0xF8, 0xFF, 0xED, 0x54, 0x07, 0x90,
+0x9A, 0x42, 0xF0, 0x90, 0x9A, 0x3E, 0xE0, 0x2F,
+0x12, 0xA3, 0xBF, 0xFE, 0x12, 0x7A, 0x7E, 0x90,
+0x9A, 0x45, 0xEF, 0xF0, 0xFD, 0x90, 0x9A, 0x42,
+0x91, 0x09, 0x80, 0x05, 0xC3, 0x33, 0xCE, 0x33,
+0xCE, 0xD8, 0xF9, 0xFF, 0xEF, 0x5D, 0x6F, 0x70,
+0x01, 0xEE, 0x70, 0x16, 0xB1, 0xAE, 0x54, 0x0F,
+0xFF, 0xC0, 0x07, 0xB1, 0xC5, 0x12, 0xA2, 0x3C,
+0xEF, 0x54, 0x0F, 0xD0, 0x07, 0x6F, 0x60, 0x02,
+0x80, 0x32, 0x90, 0x9A, 0x42, 0xE0, 0x04, 0x91,
+0x0A, 0x80, 0x05, 0xC3, 0x33, 0xCE, 0x33, 0xCE,
+0xD8, 0xF9, 0xFF, 0x90, 0x9A, 0x45, 0xE0, 0xFD,
+0xEF, 0x5D, 0x6F, 0x70, 0x01, 0xEE, 0x70, 0x1B,
+0xB1, 0xAE, 0x54, 0xF0, 0xFF, 0xC0, 0x07, 0xB1,
+0xC5, 0x12, 0xA2, 0x3C, 0xEF, 0x54, 0xF0, 0xD0,
+0x07, 0x6F, 0x60, 0x07, 0xE4, 0x90, 0x9A, 0x44,
+0xF0, 0x80, 0x0D, 0x90, 0x9A, 0x39, 0xF1, 0xA5,
+0x90, 0x9A, 0x43, 0xE0, 0x04, 0xF0, 0x81, 0xB1,
+0x90, 0x9A, 0x44, 0xE0, 0xB4, 0x01, 0x03, 0x7F,
+0x01, 0x22, 0x90, 0x9A, 0x3C, 0xE0, 0x24, 0x03,
+0x12, 0xFA, 0x83, 0xEF, 0x78, 0x02, 0xCE, 0xC3,
+0x13, 0xCE, 0x13, 0xD8, 0xF9, 0xFF, 0x90, 0x9A,
+0x3E, 0xE0, 0x2F, 0xFF, 0x90, 0x9A, 0x3D, 0xE0,
+0x3E, 0xF1, 0xED, 0x90, 0x9A, 0x41, 0xE0, 0x04,
+0xF0, 0x81, 0x3B, 0x7F, 0x00, 0x22, 0x90, 0x9A,
+0x43, 0xE0, 0xFF, 0x90, 0x9A, 0x40, 0xE0, 0x2F,
+0xFF, 0x90, 0x9A, 0x3F, 0xE0, 0x34, 0x00, 0xFE,
+0x12, 0x7A, 0x7E, 0xEF, 0x22, 0x90, 0x9A, 0x39,
+0xE0, 0xFE, 0xA3, 0xE0, 0xFF, 0x22, 0x2F, 0xF5,
+0x82, 0x74, 0x01, 0x3E, 0xF5, 0x83, 0xE0, 0xFF,
+0x22, 0x12, 0x04, 0x6E, 0xE5, 0x82, 0x2C, 0xF5,
+0x82, 0xE4, 0x35, 0x83, 0xF5, 0x83, 0x22, 0xE4,
+0x90, 0x9A, 0x0C, 0xF0, 0x12, 0xE3, 0x28, 0x12,
+0xCF, 0x97, 0xE4, 0xFF, 0x12, 0xE1, 0x32, 0x90,
+0x93, 0x0C, 0xE0, 0x20, 0xE0, 0x02, 0xC1, 0xE3,
+0x90, 0x00, 0x02, 0xE0, 0x44, 0x02, 0xF0, 0xE4,
+0x90, 0x9A, 0x0D, 0xF0, 0x90, 0x9A, 0x0D, 0xE0,
+0xFF, 0xC3, 0x94, 0x05, 0x50, 0x2E, 0x91, 0x0B,
+0x80, 0x05, 0xC3, 0x33, 0xCE, 0x33, 0xCE, 0xD8,
+0xF9, 0xFF, 0x90, 0x93, 0x0F, 0xE0, 0xFD, 0xEF,
+0x5D, 0x60, 0x11, 0x90, 0x9A, 0x0D, 0x12, 0xE0,
+0xF1, 0x90, 0x9A, 0x0D, 0x12, 0xE1, 0x11, 0x44,
+0x40, 0xF0, 0xF1, 0xDF, 0x90, 0x9A, 0x0D, 0xE0,
+0x04, 0xF0, 0x80, 0xC8, 0x90, 0x07, 0xC7, 0xE4,
+0xF0, 0x90, 0x07, 0xC6, 0xF0, 0x90, 0x07, 0xC5,
+0x74, 0x77, 0xF0, 0x90, 0x07, 0xC4, 0xE4, 0xF0,
+0x90, 0x07, 0xC0, 0x74, 0x38, 0xF0, 0xA3, 0xE4,
+0xF0, 0xA3, 0x74, 0x0F, 0xF0, 0xA3, 0x74, 0xC0,
+0xF0, 0x90, 0x02, 0x26, 0xE0, 0x44, 0x01, 0xF0,
+0xE0, 0x90, 0x9A, 0x0E, 0xF0, 0x90, 0x9A, 0x0E,
+0xE0, 0x30, 0xE0, 0x19, 0x90, 0x9A, 0x0C, 0xE0,
+0x04, 0xF0, 0xD1, 0xF4, 0x90, 0x02, 0x26, 0xE0,
+0x90, 0x9A, 0x0E, 0xF0, 0x90, 0x9A, 0x0C, 0xE0,
+0xD3, 0x94, 0xFA, 0x40, 0xE0, 0x90, 0x02, 0x03,
+0x74, 0x80, 0xF0, 0x90, 0x04, 0x24, 0xE0, 0x90,
+0x9A, 0x0F, 0xF0, 0x90, 0x04, 0x22, 0xE0, 0x44,
+0x10, 0xF0, 0x90, 0x02, 0x00, 0xE0, 0x90, 0x9A,
+0x0E, 0xF0, 0x90, 0x02, 0x01, 0xD1, 0xEB, 0x90,
+0x02, 0x02, 0xD1, 0xEB, 0x90, 0x02, 0x14, 0xD1,
+0xEB, 0xE0, 0x04, 0xF0, 0xE0, 0x90, 0x04, 0x24,
+0xF0, 0x90, 0x04, 0x22, 0xE0, 0x54, 0xEF, 0xF0,
+0x90, 0x9A, 0x0F, 0xE0, 0x90, 0x04, 0x24, 0xF0,
+0x90, 0xFD, 0x09, 0x74, 0xFF, 0xF0, 0x90, 0xFD,
+0x08, 0xE4, 0xF0, 0x90, 0x88, 0x32, 0xE0, 0x54,
+0xEF, 0xF0, 0x22, 0xE0, 0xFF, 0x90, 0x9A, 0x0E,
+0xE0, 0x2F, 0xF0, 0x22, 0x7F, 0x0A, 0x7E, 0x00,
+0x02, 0x7C, 0x6A, 0x90, 0x93, 0x2D, 0xE0, 0xC3,
+0x13, 0x30, 0xE0, 0x28, 0x12, 0xD9, 0x66, 0x70,
+0x1D, 0x90, 0x93, 0x2D, 0xE0, 0x30, 0xE0, 0x0B,
+0xF1, 0x4E, 0xF1, 0x6D, 0xF1, 0x46, 0x20, 0xE0,
+0x02, 0xD1, 0xF4, 0x90, 0x98, 0x48, 0xE0, 0xFF,
+0x7B, 0x01, 0x7D, 0x01, 0x80, 0x04, 0xF1, 0xE6,
+0xFB, 0xFD, 0x41, 0x4C, 0x90, 0x93, 0x2D, 0xE0,
+0x30, 0xE0, 0x12, 0xF1, 0x4E, 0xF1, 0x6D, 0xF1,
+0x46, 0x20, 0xE0, 0x02, 0xD1, 0xF4, 0x90, 0x93,
+0x2D, 0xE0, 0x54, 0xFE, 0xF0, 0x22, 0x90, 0x93,
+0x2D, 0xE0, 0xC4, 0x54, 0x0F, 0x22, 0x90, 0x00,
+0xCC, 0xE0, 0x44, 0x04, 0xF0, 0x7F, 0x02, 0x12,
+0x7B, 0x41, 0xEF, 0x54, 0xFB, 0x22, 0x90, 0x00,
+0xCC, 0xE0, 0x44, 0x04, 0xF0, 0x7F, 0x02, 0x12,
+0x7B, 0x41, 0xEF, 0x44, 0x04, 0xFD, 0x7F, 0x02,
+0x12, 0x7B, 0x2E, 0x90, 0x00, 0xCC, 0xE0, 0x54,
+0xFB, 0xF0, 0x22, 0xD3, 0x10, 0xAF, 0x01, 0xC3,
+0xC0, 0xD0, 0x12, 0xDF, 0xD4, 0xB1, 0xE7, 0xD0,
+0xD0, 0x92, 0xAF, 0x22, 0x90, 0x88, 0x39, 0xE0,
+0xFF, 0x60, 0x03, 0xB4, 0x08, 0x0E, 0x12, 0xF8,
+0x45, 0xBF, 0x01, 0x08, 0xF1, 0x7B, 0x90, 0x01,
+0xE5, 0xE0, 0x04, 0xF0, 0x22, 0xE4, 0x75, 0xF0,
+0x01, 0x02, 0x02, 0xE7, 0xE4, 0x90, 0x9C, 0xDD,
+0xF0, 0xA3, 0xF0, 0x90, 0x02, 0x86, 0xE0, 0x20,
+0xE1, 0x22, 0xC3, 0x90, 0x9C, 0xDE, 0xE0, 0x94,
+0xD0, 0x90, 0x9C, 0xDD, 0xE0, 0x94, 0x07, 0x40,
+0x0A, 0x90, 0x01, 0xC1, 0xE0, 0x44, 0x04, 0xF0,
+0x7F, 0x00, 0x22, 0x90, 0x9C, 0xDD, 0xF1, 0xA5,
+0xD1, 0xF4, 0x80, 0xD7, 0x7F, 0x01, 0x22, 0x7F,
+0x14, 0x7E, 0x00, 0x02, 0x7C, 0x6A, 0x90, 0x98,
+0x48, 0xE0, 0xFF, 0xE4, 0x22, 0x90, 0x9A, 0x37,
+0xF0, 0xA3, 0xEF, 0xF0, 0x22, 0xE4, 0xFD, 0x02,
+0x8F, 0xF5, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+0x00, 0x00, 0x00, 0x00, 0x12, 0x02, 0x06, 0x54,
+0x01, 0xFF, 0x90, 0x93, 0x0C, 0xE0, 0x54, 0xFE,
+0x4F, 0xF0, 0x30, 0xE0, 0x04, 0xE4, 0x12, 0x9F,
+0xB0, 0x22, 0x12, 0x02, 0x06, 0xFF, 0x90, 0x98,
+0x58, 0xF0, 0xBF, 0x01, 0x0A, 0x7F, 0x01, 0x12,
+0x90, 0x50, 0xE4, 0x90, 0x98, 0x58, 0xF0, 0x22,
+0xEF, 0xB4, 0xFF, 0x06, 0x90, 0x98, 0x6A, 0xED,
+0xF0, 0x22, 0xEF, 0xF4, 0xFE, 0x90, 0x98, 0x6A,
+0xE0, 0x5E, 0xFE, 0xED, 0x5F, 0x4E, 0xF0, 0x22,
+0xEF, 0xB4, 0xFF, 0x06, 0x90, 0x98, 0x6B, 0xED,
+0xF0, 0x22, 0xEF, 0xF4, 0xFE, 0x90, 0x98, 0x6B,
+0x80, 0xE6, 0x90, 0x9C, 0xE1, 0xED, 0xF0, 0x64,
+0x01, 0x60, 0x26, 0xE0, 0xFE, 0x64, 0x02, 0x60,
+0x20, 0xEE, 0x64, 0x29, 0x60, 0x1B, 0xEE, 0x64,
+0x2A, 0x60, 0x16, 0xEE, 0x64, 0x36, 0x60, 0x11,
+0xEE, 0xB4, 0x37, 0x02, 0x80, 0x0B, 0xAD, 0x07,
+0x7F, 0xFF, 0x11, 0x48, 0x90, 0x98, 0x6B, 0xE0,
+0xFF, 0x90, 0x98, 0x6A, 0xE0, 0x4F, 0x90, 0x05,
+0x22, 0xF0, 0x90, 0x9C, 0xE1, 0xE0, 0x90, 0x93,
+0x01, 0xF0, 0x22, 0x12, 0xE7, 0xAB, 0x64, 0x01,
+0x60, 0x02, 0x21, 0x2E, 0xEF, 0x24, 0x39, 0x60,
+0x12, 0x14, 0x60, 0x19, 0x24, 0x02, 0x70, 0x1F,
+0xE4, 0x90, 0x99, 0xB7, 0xF0, 0xA3, 0x74, 0x06,
+0xF0, 0x80, 0x14, 0x90, 0x99, 0xB7, 0x74, 0x06,
+0xF0, 0xA3, 0xF0, 0x80, 0x0A, 0x90, 0x99, 0xB7,
+0x74, 0x0C, 0xF0, 0xA3, 0x74, 0x04, 0xF0, 0xB1,
+0xF6, 0xF0, 0x71, 0xE2, 0x40, 0x20, 0x90, 0x99,
+0xB5, 0xE0, 0x12, 0xFB, 0x1C, 0x7A, 0x99, 0x79,
+0xB4, 0x12, 0x5F, 0xA6, 0xBF, 0x01, 0x07, 0x90,
+0x99, 0xB4, 0xE0, 0xF4, 0x70, 0x40, 0x31, 0x2F,
+0xA3, 0xE0, 0x14, 0xF0, 0x80, 0xDC, 0xB1, 0xF6,
+0xF0, 0x71, 0xE2, 0x40, 0x31, 0x90, 0x99, 0xB5,
+0xE0, 0xFD, 0x7C, 0x00, 0x24, 0xA8, 0xFF, 0xEC,
+0x34, 0x01, 0xFE, 0xED, 0x24, 0x01, 0xFD, 0xEC,
+0x33, 0xFC, 0x90, 0x99, 0xB7, 0xE0, 0x12, 0xFB,
+0x12, 0xF1, 0x95, 0x8D, 0x82, 0x8C, 0x83, 0x12,
+0x02, 0x1F, 0xFD, 0x12, 0xC8, 0x3C, 0x31, 0x2F,
+0xA3, 0xE0, 0x14, 0xF0, 0x80, 0xCB, 0x22, 0x90,
 0x99, 0xB5, 0xE0, 0x04, 0xF0, 0x22, 0xD3, 0x10,
-0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0xF1, 0xEB, 0x90,
-0x99, 0xB6, 0xF0, 0x90, 0x02, 0x09, 0xE0, 0x90,
-0x99, 0xB7, 0xF0, 0x90, 0x98, 0x45, 0xF1, 0xE3,
-0x90, 0x99, 0xB1, 0xEE, 0xF0, 0xA3, 0xEF, 0xF0,
-0x12, 0x8E, 0x99, 0xE0, 0x90, 0x95, 0xE9, 0xF0,
-0x74, 0x01, 0x2F, 0x71, 0xE3, 0xE0, 0x90, 0x95,
-0xEA, 0xF0, 0x71, 0xCD, 0x12, 0x02, 0xE7, 0x90,
-0x99, 0xB1, 0xA3, 0xE0, 0x24, 0x02, 0x12, 0xDB,
-0x74, 0xFF, 0xE4, 0xFC, 0xFD, 0x78, 0x10, 0x12,
+0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0xE4, 0x90, 0x99,
+0xB1, 0xF0, 0xA3, 0xF0, 0x90, 0x99, 0xB6, 0xF0,
+0x90, 0x02, 0x09, 0xE0, 0x90, 0x99, 0xB7, 0xF0,
+0x90, 0x98, 0x45, 0xF1, 0xF1, 0x90, 0x99, 0xB1,
+0xEE, 0xF0, 0xA3, 0xEF, 0xF0, 0x12, 0x8E, 0x99,
+0xE0, 0x90, 0x95, 0xE9, 0xF0, 0x74, 0x01, 0x2F,
+0x71, 0xF0, 0xE0, 0x90, 0x95, 0xEA, 0xF0, 0x71,
+0xDA, 0x12, 0x02, 0xE7, 0x90, 0x99, 0xB1, 0xA3,
+0xE0, 0x24, 0x02, 0x12, 0xD7, 0x0F, 0xFF, 0xE4,
+0xFC, 0xFD, 0x78, 0x10, 0x12, 0x03, 0xFE, 0xC0,
+0x04, 0xC0, 0x05, 0xC0, 0x06, 0xC0, 0x07, 0x71,
+0xCD, 0x12, 0xAF, 0x11, 0x78, 0x18, 0x12, 0x03,
+0xFE, 0xD0, 0x03, 0xD0, 0x02, 0xD0, 0x01, 0xD0,
+0x00, 0x12, 0x80, 0xC0, 0xC0, 0x04, 0xC0, 0x05,
+0xC0, 0x06, 0xC0, 0x07, 0x71, 0xC0, 0x12, 0xAF,
+0x11, 0x78, 0x08, 0x12, 0x03, 0xFE, 0xD0, 0x03,
+0xD0, 0x02, 0xD0, 0x01, 0xD0, 0x00, 0x12, 0x8E,
+0x89, 0x12, 0xAF, 0x13, 0x12, 0x80, 0xC0, 0x90,
+0x95, 0xED, 0x12, 0xAE, 0xF8, 0x78, 0x10, 0x12,
 0x03, 0xFE, 0xC0, 0x04, 0xC0, 0x05, 0xC0, 0x06,
-0xC0, 0x07, 0x71, 0xC0, 0x12, 0xAE, 0xA1, 0x78,
+0xC0, 0x07, 0x71, 0xCD, 0x12, 0xAF, 0x11, 0x78,
 0x18, 0x12, 0x03, 0xFE, 0xD0, 0x03, 0xD0, 0x02,
 0xD0, 0x01, 0xD0, 0x00, 0x12, 0x80, 0xC0, 0xC0,
 0x04, 0xC0, 0x05, 0xC0, 0x06, 0xC0, 0x07, 0x71,
-0xB3, 0x12, 0xAE, 0xA1, 0x78, 0x08, 0x12, 0x03,
+0xC0, 0x12, 0xAF, 0x11, 0x78, 0x08, 0x12, 0x03,
 0xFE, 0xD0, 0x03, 0xD0, 0x02, 0xD0, 0x01, 0xD0,
-0x00, 0x12, 0x8E, 0x89, 0x12, 0xAE, 0xA3, 0x12,
-0x80, 0xC0, 0x90, 0x95, 0xED, 0x12, 0xAE, 0x88,
+0x00, 0x12, 0x8E, 0x89, 0x12, 0xAF, 0x13, 0x12,
+0x80, 0xC0, 0x90, 0x95, 0xF1, 0x12, 0xAE, 0xF8,
 0x78, 0x10, 0x12, 0x03, 0xFE, 0xC0, 0x04, 0xC0,
-0x05, 0xC0, 0x06, 0xC0, 0x07, 0x71, 0xC0, 0x12,
-0xAE, 0xA1, 0x78, 0x18, 0x12, 0x03, 0xFE, 0xD0,
+0x05, 0xC0, 0x06, 0xC0, 0x07, 0x71, 0xCD, 0x12,
+0xAF, 0x11, 0x78, 0x18, 0x12, 0x03, 0xFE, 0xD0,
 0x03, 0xD0, 0x02, 0xD0, 0x01, 0xD0, 0x00, 0x12,
 0x80, 0xC0, 0xC0, 0x04, 0xC0, 0x05, 0xC0, 0x06,
-0xC0, 0x07, 0x71, 0xB3, 0x12, 0xAE, 0xA1, 0x78,
+0xC0, 0x07, 0x71, 0xC0, 0x12, 0xAF, 0x11, 0x78,
 0x08, 0x12, 0x03, 0xFE, 0xD0, 0x03, 0xD0, 0x02,
 0xD0, 0x01, 0xD0, 0x00, 0x12, 0x8E, 0x89, 0x12,
-0xAE, 0xA3, 0x12, 0x80, 0xC0, 0x90, 0x95, 0xF1,
-0x12, 0xAE, 0x88, 0x78, 0x10, 0x12, 0x03, 0xFE,
-0xC0, 0x04, 0xC0, 0x05, 0xC0, 0x06, 0xC0, 0x07,
-0x71, 0xC0, 0x12, 0xAE, 0xA1, 0x78, 0x18, 0x12,
-0x03, 0xFE, 0xD0, 0x03, 0xD0, 0x02, 0xD0, 0x01,
-0xD0, 0x00, 0x12, 0x80, 0xC0, 0xC0, 0x04, 0xC0,
-0x05, 0xC0, 0x06, 0xC0, 0x07, 0x71, 0xB3, 0x12,
-0xAE, 0xA1, 0x78, 0x08, 0x12, 0x03, 0xFE, 0xD0,
-0x03, 0xD0, 0x02, 0xD0, 0x01, 0xD0, 0x00, 0x12,
-0x8E, 0x89, 0x12, 0xAE, 0xA3, 0x12, 0x80, 0xC0,
-0x90, 0x95, 0xF5, 0x12, 0x04, 0x31, 0x71, 0xCD,
-0x71, 0x9F, 0x71, 0xA8, 0x12, 0x8E, 0x99, 0xE0,
-0xFF, 0x12, 0xFA, 0xBD, 0x71, 0x8D, 0xE0, 0xB4,
-0x10, 0xF0, 0x71, 0x98, 0x71, 0xA8, 0x12, 0x8E,
-0x99, 0xE0, 0xFF, 0x74, 0x09, 0x2E, 0xF5, 0x82,
-0xE4, 0x34, 0x96, 0x71, 0x8D, 0xE0, 0xB4, 0x10,
-0xEB, 0x71, 0x98, 0x71, 0xA8, 0x12, 0x8E, 0x99,
-0xE0, 0xFF, 0x74, 0x19, 0x2E, 0xF5, 0x82, 0xE4,
-0x34, 0x96, 0x71, 0x8D, 0xE0, 0xB4, 0x10, 0xEB,
-0x90, 0x99, 0xB1, 0xF1, 0xC5, 0x90, 0x98, 0x45,
-0x12, 0x8E, 0x80, 0xE4, 0xF0, 0xA3, 0xEF, 0xF0,
-0x90, 0x99, 0xB1, 0xE4, 0x75, 0xF0, 0x40, 0x71,
-0x9F, 0x90, 0x99, 0xB3, 0xE0, 0xFF, 0xC3, 0x94,
-0x08, 0x50, 0x1F, 0x90, 0x99, 0xB1, 0xA3, 0xE0,
-0xFE, 0xEF, 0x2E, 0x12, 0x8E, 0x99, 0xE0, 0xFE,
-0x90, 0x99, 0xB7, 0xE0, 0xFD, 0xEE, 0x2D, 0xFE,
-0x74, 0x29, 0x2F, 0xF1, 0xDB, 0xEE, 0x71, 0x90,
-0x80, 0xD7, 0x90, 0x98, 0x45, 0xE0, 0x04, 0x90,
-0x99, 0xB5, 0xF0, 0xE4, 0x90, 0x99, 0xB4, 0xF0,
-0x90, 0x95, 0xE9, 0xE0, 0x13, 0x13, 0x54, 0x3F,
-0x24, 0x01, 0xFF, 0xE4, 0x33, 0xFE, 0x90, 0x99,
-0xB4, 0xE0, 0xC3, 0x9F, 0xEE, 0xD1, 0x91, 0x50,
-0x75, 0xA3, 0x12, 0x8E, 0x80, 0xE4, 0xF0, 0xA3,
-0xEF, 0xF0, 0xE4, 0xA3, 0xF0, 0x90, 0x99, 0xB3,
-0xE0, 0xFD, 0xC3, 0x94, 0x04, 0x50, 0x55, 0xA3,
-0xE0, 0x75, 0xF0, 0x04, 0xA4, 0x7C, 0x00, 0x2D,
-0xFF, 0xEC, 0x35, 0xF0, 0xFE, 0x90, 0x95, 0xE9,
-0xE0, 0xFD, 0xC3, 0xEF, 0x9D, 0x74, 0x80, 0xF8,
-0x6E, 0x98, 0x50, 0x38, 0xEF, 0x78, 0x05, 0xC3,
-0x33, 0xCE, 0x33, 0xCE, 0xD8, 0xF9, 0x24, 0x31,
-0xF9, 0x74, 0x96, 0x3E, 0xFA, 0x7B, 0x01, 0xC0,
-0x03, 0xC0, 0x01, 0x90, 0x99, 0xB1, 0xA3, 0xE0,
-0x24, 0x00, 0xF9, 0xE4, 0x34, 0xFC, 0x8B, 0x45,
-0xF5, 0x46, 0x89, 0x47, 0x75, 0x48, 0x20, 0xD0,
-0x01, 0xD0, 0x03, 0x12, 0x8F, 0x63, 0xF1, 0xCC,
-0x71, 0x91, 0x80, 0xA1, 0x31, 0x27, 0x90, 0x99,
-0xB4, 0xE0, 0x04, 0xF0, 0x41, 0xE8, 0xE4, 0x90,
-0x99, 0xB3, 0xF0, 0xE4, 0xFF, 0x0F, 0xEF, 0xB4,
-0x20, 0xFB, 0x71, 0x91, 0xE0, 0xB4, 0x10, 0xF3,
-0xD0, 0xD0, 0x92, 0xAF, 0x22, 0xF5, 0x83, 0xEF,
-0xF0, 0x90, 0x99, 0xB3, 0xE0, 0x04, 0xF0, 0x22,
-0x90, 0x99, 0xB1, 0xE4, 0x75, 0xF0, 0x10, 0x12,
-0x02, 0xE7, 0xE4, 0x90, 0x99, 0xB3, 0xF0, 0x22,
-0x90, 0x99, 0xB1, 0xA3, 0xE0, 0xFF, 0xA3, 0xE0,
-0xFE, 0x2F, 0x22, 0x90, 0x99, 0xB1, 0xA3, 0xE0,
-0x24, 0x01, 0xF5, 0x82, 0xE4, 0x34, 0xFC, 0x22,
-0x90, 0x99, 0xB1, 0xA3, 0xE0, 0x24, 0x03, 0xF5,
+0xAF, 0x13, 0x12, 0x80, 0xC0, 0x90, 0x95, 0xF5,
+0x12, 0x04, 0x31, 0x71, 0xDA, 0x71, 0xAC, 0x71,
+0xB5, 0x12, 0x8E, 0x99, 0xE0, 0xFF, 0x12, 0xFB,
+0x26, 0x71, 0x9A, 0xE0, 0xB4, 0x10, 0xF0, 0x71,
+0xA5, 0x71, 0xB5, 0x12, 0x8E, 0x99, 0xE0, 0xFF,
+0x74, 0x09, 0x2E, 0xF5, 0x82, 0xE4, 0x34, 0x96,
+0x71, 0x9A, 0xE0, 0xB4, 0x10, 0xEB, 0x71, 0xA5,
+0x71, 0xB5, 0x12, 0x8E, 0x99, 0xE0, 0xFF, 0x74,
+0x19, 0x2E, 0xF5, 0x82, 0xE4, 0x34, 0x96, 0x71,
+0x9A, 0xE0, 0xB4, 0x10, 0xEB, 0x90, 0x99, 0xB1,
+0xF1, 0xA2, 0x90, 0x98, 0x45, 0x12, 0x8E, 0x80,
+0xE4, 0xF0, 0xA3, 0xEF, 0xF0, 0x90, 0x99, 0xB1,
+0xE4, 0x75, 0xF0, 0x40, 0x71, 0xAC, 0x90, 0x99,
+0xB3, 0xE0, 0xFF, 0xC3, 0x94, 0x08, 0x50, 0x1F,
+0x90, 0x99, 0xB1, 0xA3, 0xE0, 0xFE, 0xEF, 0x2E,
+0x12, 0x8E, 0x99, 0xE0, 0xFE, 0x90, 0x99, 0xB7,
+0xE0, 0xFD, 0xEE, 0x2D, 0xFE, 0x74, 0x29, 0x2F,
+0xF1, 0xE9, 0xEE, 0x71, 0x9D, 0x80, 0xD7, 0x90,
+0x98, 0x45, 0xE0, 0x04, 0x90, 0x99, 0xB5, 0xF0,
+0xE4, 0x90, 0x99, 0xB4, 0xF0, 0x90, 0x95, 0xE9,
+0xE0, 0x13, 0x13, 0x54, 0x3F, 0x24, 0x01, 0xFF,
+0xE4, 0x33, 0xFE, 0x90, 0x99, 0xB4, 0xE0, 0xC3,
+0x9F, 0xEE, 0xD1, 0x9F, 0x50, 0x75, 0xA3, 0x12,
+0x8E, 0x80, 0xE4, 0xF0, 0xA3, 0xEF, 0xF0, 0xE4,
+0xA3, 0xF0, 0x90, 0x99, 0xB3, 0xE0, 0xFD, 0xC3,
+0x94, 0x04, 0x50, 0x55, 0xA3, 0xE0, 0x75, 0xF0,
+0x04, 0xA4, 0x7C, 0x00, 0x2D, 0xFF, 0xEC, 0x35,
+0xF0, 0xFE, 0x90, 0x95, 0xE9, 0xE0, 0xFD, 0xC3,
+0xEF, 0x9D, 0x74, 0x80, 0xF8, 0x6E, 0x98, 0x50,
+0x38, 0xEF, 0x78, 0x05, 0xC3, 0x33, 0xCE, 0x33,
+0xCE, 0xD8, 0xF9, 0x24, 0x31, 0xF9, 0x74, 0x96,
+0x3E, 0xFA, 0x7B, 0x01, 0xC0, 0x03, 0xC0, 0x01,
+0x90, 0x99, 0xB1, 0xA3, 0xE0, 0x24, 0x00, 0xF9,
+0xE4, 0x34, 0xFC, 0x8B, 0x45, 0xF5, 0x46, 0x89,
+0x47, 0x75, 0x48, 0x20, 0xD0, 0x01, 0xD0, 0x03,
+0x12, 0x8F, 0x63, 0xF1, 0xA9, 0x71, 0x9E, 0x80,
+0xA1, 0x31, 0x2F, 0x90, 0x99, 0xB4, 0xE0, 0x04,
+0xF0, 0x41, 0xF5, 0xE4, 0x90, 0x99, 0xB3, 0xF0,
+0xE4, 0xFF, 0x0F, 0xEF, 0xB4, 0x20, 0xFB, 0x71,
+0x9E, 0xE0, 0xB4, 0x10, 0xF3, 0xD0, 0xD0, 0x92,
+0xAF, 0x22, 0xF5, 0x83, 0xEF, 0xF0, 0x90, 0x99,
+0xB3, 0xE0, 0x04, 0xF0, 0x22, 0x90, 0x99, 0xB1,
+0xE4, 0x75, 0xF0, 0x10, 0x12, 0x02, 0xE7, 0xE4,
+0x90, 0x99, 0xB3, 0xF0, 0x22, 0x90, 0x99, 0xB1,
+0xA3, 0xE0, 0xFF, 0xA3, 0xE0, 0xFE, 0x2F, 0x22,
+0x90, 0x99, 0xB1, 0xA3, 0xE0, 0x24, 0x01, 0xF5,
 0x82, 0xE4, 0x34, 0xFC, 0x22, 0x90, 0x99, 0xB1,
-0xE4, 0x75, 0xF0, 0x04, 0x22, 0x90, 0x99, 0xB6,
-0xE0, 0xD3, 0x94, 0x00, 0x22, 0x74, 0x03, 0xF0,
-0x74, 0x01, 0x2E, 0xF5, 0x82, 0xE4, 0x34, 0xFC,
-0xF5, 0x83, 0x22, 0xD3, 0x10, 0xAF, 0x01, 0xC3,
-0xC0, 0xD0, 0x90, 0x9C, 0x6E, 0xEC, 0xF1, 0xD3,
-0xAA, 0x07, 0x90, 0x9C, 0x75, 0x12, 0x04, 0x3D,
-0x00, 0x00, 0x00, 0x00, 0xB1, 0xDE, 0xEA, 0x24,
-0xEF, 0x60, 0x39, 0x24, 0xD7, 0x70, 0x02, 0xA1,
-0x46, 0x24, 0x3A, 0x60, 0x02, 0xA1, 0x80, 0xB1,
-0xB4, 0x24, 0x0A, 0xB1, 0xC2, 0xED, 0xF0, 0xFE,
-0x12, 0x8E, 0x99, 0xE4, 0x71, 0xDF, 0xE4, 0xF0,
-0xFE, 0x74, 0x00, 0x2F, 0xB1, 0xD6, 0x7D, 0x14,
-0xB1, 0x9D, 0xF1, 0xBE, 0xB1, 0xA8, 0x90, 0x90,
-0xBE, 0x12, 0x04, 0x31, 0x7D, 0x14, 0x7C, 0x00,
-0xE4, 0xFF, 0xA1, 0x41, 0x90, 0x9C, 0x6E, 0xE4,
-0x75, 0xF0, 0x14, 0x12, 0x02, 0xE7, 0x90, 0x9C,
-0x6E, 0xA3, 0xE0, 0xFB, 0xFF, 0x24, 0x06, 0xFC,
-0xB1, 0xC3, 0xCC, 0xF0, 0x90, 0x9C, 0x79, 0xA3,
-0xE0, 0xFE, 0x12, 0x8E, 0x99, 0xE4, 0x71, 0xDF,
-0xE4, 0x12, 0xDB, 0x7D, 0xFE, 0xA9, 0x03, 0x74,
-0x05, 0x29, 0xF1, 0xB6, 0xF1, 0x7E, 0xFE, 0x90,
-0x9C, 0x73, 0xF0, 0xA3, 0xEF, 0xF0, 0x90, 0x9C,
-0x6E, 0xE0, 0xFC, 0xA3, 0xE0, 0x2F, 0xFF, 0xEC,
-0x3E, 0xFE, 0xD3, 0xEF, 0x94, 0x00, 0xEE, 0x94,
-0x01, 0x90, 0x9C, 0x6E, 0x40, 0x67, 0xE0, 0xFE,
-0xA3, 0xE0, 0xFF, 0xE9, 0x7C, 0x00, 0x24, 0x00,
-0xF9, 0xEC, 0x34, 0xFC, 0xFA, 0x7B, 0x01, 0xC3,
-0xE4, 0x9F, 0xFD, 0x74, 0x01, 0x9E, 0xFC, 0xB1,
-0x9F, 0x90, 0x9C, 0x70, 0xE0, 0x24, 0x01, 0xFF,
-0xE4, 0x33, 0xA2, 0xE7, 0x13, 0xEF, 0x13, 0x90,
-0xFD, 0x10, 0xF0, 0xB1, 0xD0, 0xC0, 0x00, 0xC0,
-0x01, 0xC0, 0x02, 0xC0, 0x03, 0x7B, 0x01, 0x7A,
-0xFC, 0x79, 0x00, 0x90, 0x9C, 0x6E, 0x12, 0xAF,
-0xEE, 0xE4, 0x9F, 0xFF, 0x74, 0x01, 0x9E, 0xFE,
-0xB1, 0xBB, 0xE0, 0xC3, 0x9F, 0xFD, 0xEC, 0x9E,
-0xFC, 0x12, 0x45, 0xC2, 0xD0, 0x03, 0xD0, 0x02,
-0xD0, 0x01, 0xD0, 0x00, 0x12, 0x80, 0xC0, 0xB1,
-0xA2, 0xB1, 0xDE, 0x80, 0x0E, 0xA3, 0xE0, 0x7E,
-0x00, 0x24, 0x00, 0xB1, 0xD6, 0xB1, 0xBB, 0xE0,
-0xFD, 0xB1, 0x9F, 0x90, 0x9C, 0x6E, 0x74, 0xFF,
-0x75, 0xF0, 0xEC, 0x12, 0x02, 0xE7, 0xB1, 0xB4,
-0x7E, 0x00, 0x24, 0x0C, 0xF9, 0xEE, 0x34, 0xFC,
-0xFA, 0x7B, 0x01, 0xC0, 0x02, 0xC0, 0x01, 0x74,
-0x10, 0x2F, 0xF9, 0xEE, 0x34, 0xFC, 0xFA, 0xB1,
-0xA8, 0x90, 0x90, 0xBE, 0x12, 0x04, 0x31, 0xB1,
-0xBB, 0xE0, 0xFD, 0xD0, 0x01, 0xD0, 0x02, 0x7F,
-0x11, 0x12, 0x3C, 0xD9, 0x80, 0x32, 0xB1, 0xB4,
-0x24, 0x2A, 0xB1, 0xC2, 0xED, 0xF0, 0xFE, 0x12,
-0x8E, 0x99, 0xE4, 0x71, 0xDF, 0xE4, 0xF0, 0x12,
-0xF9, 0x49, 0x7D, 0x48, 0xB1, 0x9D, 0xB1, 0xAE,
-0xB1, 0xCB, 0x12, 0x80, 0xC0, 0xE4, 0xFD, 0xFC,
-0xB1, 0xA2, 0xB1, 0xAE, 0xB1, 0xCB, 0x12, 0x80,
-0xC0, 0xB1, 0xA2, 0xB1, 0xAE, 0x12, 0x03, 0xCD,
-0x90, 0x9C, 0x71, 0xEE, 0xF0, 0xA3, 0xEF, 0xF0,
-0x90, 0x9C, 0x71, 0xE0, 0xFC, 0xA3, 0xE0, 0xFD,
-0xEC, 0xFF, 0x90, 0x9C, 0x79, 0xA3, 0xE0, 0xFE,
-0x12, 0x8E, 0x99, 0xEF, 0x71, 0xDF, 0xED, 0xF0,
-0xD0, 0xD0, 0x92, 0xAF, 0x22, 0x7C, 0x00, 0x12,
-0x45, 0xC2, 0x90, 0x9C, 0x75, 0x02, 0x04, 0x31,
-0x90, 0x90, 0xBB, 0x12, 0x82, 0x27, 0x90, 0x9C,
-0x75, 0x02, 0x04, 0xB8, 0x90, 0x9C, 0x6E, 0xA3,
-0xE0, 0xFF, 0x22, 0x90, 0x9C, 0x73, 0xE0, 0xFC,
-0xA3, 0x22, 0xFD, 0xE4, 0x33, 0x90, 0x9C, 0x79,
-0xF0, 0xA3, 0x22, 0x78, 0x10, 0x12, 0x03, 0xEB,
-0x90, 0x9C, 0x75, 0x02, 0x82, 0x12, 0xF9, 0xEE,
-0x34, 0xFC, 0xFA, 0x7B, 0x01, 0x22, 0x90, 0x9C,
-0x70, 0xE0, 0xC3, 0x13, 0x90, 0xFD, 0x10, 0xF0,
-0x22, 0x90, 0x99, 0xB7, 0xE0, 0x90, 0x99, 0xB5,
-0xF0, 0x90, 0x99, 0xB8, 0xE0, 0x90, 0x99, 0xB6,
-0x22, 0xE4, 0x90, 0x9A, 0xFE, 0xF0, 0xA3, 0xF0,
-0x90, 0x06, 0x32, 0xE0, 0x44, 0x20, 0xF0, 0x12,
-0x76, 0x9B, 0xEF, 0x64, 0x01, 0x70, 0x74, 0x90,
-0x98, 0x42, 0xE0, 0xFF, 0x90, 0x92, 0x13, 0x74,
-0x0D, 0xF0, 0x7B, 0x08, 0x7D, 0x01, 0x12, 0x66,
-0xDB, 0x90, 0x9A, 0xFB, 0xEE, 0xF0, 0xA3, 0xEF,
-0xF0, 0x90, 0x9A, 0xFB, 0x12, 0x8E, 0xA3, 0x90,
-0x9A, 0xFD, 0xEF, 0xF0, 0x90, 0x9A, 0xFB, 0x12,
-0xF9, 0x70, 0x7B, 0x01, 0xE4, 0xFD, 0x12, 0xF0,
-0x6E, 0x90, 0x9A, 0xFD, 0xE0, 0xFF, 0x90, 0x9A,
-0xFC, 0xE0, 0x2F, 0xFF, 0x90, 0x9A, 0xFB, 0xE0,
-0x34, 0x00, 0xCF, 0x24, 0x30, 0xCF, 0x34, 0x00,
-0xFE, 0x90, 0x9A, 0xFE, 0xF0, 0xA3, 0xEF, 0xF0,
-0xF1, 0x8E, 0xD1, 0x84, 0x90, 0x98, 0x42, 0xE0,
-0xFB, 0xE4, 0xFF, 0x71, 0xEB, 0xD1, 0x84, 0x90,
-0x98, 0x3E, 0xE0, 0xFB, 0x7F, 0x11, 0x71, 0xEB,
-0x90, 0x04, 0x1F, 0x74, 0x20, 0xF0, 0x90, 0x95,
-0xA5, 0xF1, 0x87, 0x22, 0x90, 0x9A, 0xFE, 0xE0,
-0xFC, 0xA3, 0xE0, 0xFD, 0x22, 0xE0, 0xD3, 0x9D,
-0xEC, 0x64, 0x80, 0xF8, 0x74, 0x80, 0x98, 0x22,
-0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0x12,
-0xE4, 0x63, 0x90, 0x9C, 0xE5, 0xF0, 0x90, 0x88,
-0x32, 0x12, 0xA0, 0x9E, 0x30, 0xE0, 0x02, 0xE1,
-0x60, 0x90, 0x88, 0x31, 0xE0, 0x30, 0xE0, 0x1F,
-0x90, 0x88, 0x53, 0xE0, 0x24, 0x04, 0x33, 0x33,
-0x33, 0x54, 0xF8, 0x90, 0x88, 0x4B, 0xF0, 0x90,
-0x88, 0x53, 0xE0, 0x04, 0x33, 0x33, 0x33, 0x54,
-0xF8, 0x90, 0x88, 0x4A, 0xF0, 0x80, 0x10, 0x90,
-0x88, 0x4B, 0x74, 0x10, 0xF0, 0x90, 0x88, 0x4A,
-0x74, 0x08, 0xF0, 0x74, 0x10, 0x2B, 0xFB, 0x90,
-0x88, 0x4A, 0xE0, 0xFE, 0x90, 0x88, 0x49, 0xE0,
-0xD3, 0x9E, 0x50, 0x0E, 0x90, 0x88, 0x3E, 0xEB,
-0xF0, 0x90, 0x88, 0x4B, 0xE0, 0xC3, 0x9D, 0x2F,
-0x80, 0x11, 0xC3, 0xED, 0x9E, 0x2B, 0x90, 0x88,
-0x3E, 0xF0, 0x90, 0x88, 0x4A, 0xE0, 0xFF, 0xA3,
-0xE0, 0xC3, 0x9F, 0x90, 0x88, 0x4E, 0xF0, 0x90,
-0x88, 0x4B, 0xF1, 0x6C, 0x90, 0x88, 0x4E, 0xD1,
-0x8D, 0x40, 0x04, 0xEF, 0x24, 0x50, 0xF0, 0x90,
-0x88, 0x4E, 0xF1, 0x6C, 0x90, 0x88, 0x3E, 0xD1,
-0x8D, 0x40, 0x04, 0xEF, 0x24, 0x50, 0xF0, 0x90,
-0x88, 0x4E, 0x12, 0x97, 0xDE, 0xFF, 0x7E, 0x00,
-0x90, 0x88, 0x42, 0xEE, 0xF0, 0xA3, 0xEF, 0xF0,
-0x90, 0x05, 0x58, 0xF0, 0x90, 0x88, 0x4E, 0xE0,
-0x54, 0x07, 0xFF, 0x90, 0x05, 0xB1, 0xE0, 0x54,
-0xF8, 0x4F, 0xF0, 0x12, 0xFB, 0x2F, 0x80, 0x07,
-0x90, 0x88, 0x33, 0xE0, 0x44, 0x01, 0xF0, 0xD0,
-0xD0, 0x92, 0xAF, 0x22, 0xE0, 0xFF, 0x24, 0x50,
-0xFD, 0xE4, 0x33, 0xFC, 0x22, 0xF0, 0x90, 0x01,
-0x17, 0xE0, 0xFE, 0x90, 0x01, 0x16, 0xE0, 0x7C,
-0x00, 0x24, 0x00, 0xFF, 0xEC, 0x3E, 0x22, 0xE4,
-0x75, 0xF0, 0x01, 0x02, 0x02, 0xE7, 0xAD, 0x07,
-0x90, 0x95, 0x9D, 0xF1, 0x87, 0x90, 0x95, 0x9D,
-0xE0, 0xFF, 0xAE, 0x05, 0x74, 0x04, 0x2E, 0xF5,
-0x82, 0xE4, 0x34, 0xFC, 0xF5, 0x83, 0xEF, 0xF0,
-0x90, 0x95, 0x9D, 0xA3, 0xE0, 0xFF, 0x74, 0x05,
-0x2E, 0xF1, 0xB6, 0xEF, 0xF0, 0x22, 0xF5, 0x82,
-0xE4, 0x34, 0xFC, 0xF5, 0x83, 0x22, 0x7B, 0x00,
-0x7A, 0x00, 0x79, 0x00, 0x22, 0xE4, 0x75, 0xF0,
-0x10, 0x02, 0x02, 0xE7, 0xE4, 0x75, 0xF0, 0x20,
-0x02, 0x02, 0xE7, 0xF0, 0xA3, 0xED, 0xF0, 0xA3,
-0xEB, 0xF0, 0x22, 0xF5, 0x82, 0xE4, 0x34, 0x96,
-0xF5, 0x83, 0x22, 0xE0, 0xFF, 0x12, 0x7B, 0x07,
-0x7E, 0x00, 0x22, 0xE4, 0x90, 0x99, 0xB1, 0xF0,
-0xA3, 0xF0, 0x22, 0xD3, 0x10, 0xAF, 0x01, 0xC3,
-0xC0, 0xD0, 0x7F, 0x8F, 0x12, 0x7B, 0x41, 0xEF,
-0x30, 0xE6, 0x2E, 0x90, 0x00, 0x8C, 0xE0, 0x90,
-0x9C, 0xCA, 0xF0, 0x7F, 0x8D, 0x12, 0x7B, 0x41,
-0x90, 0x9C, 0xCB, 0xEF, 0xF0, 0x90, 0x00, 0x8E,
-0xE0, 0x90, 0x9C, 0xCC, 0xF0, 0x90, 0x9C, 0xCB,
-0xE0, 0x7F, 0x8F, 0x12, 0x7B, 0x41, 0xEF, 0x30,
-0xE0, 0x07, 0xE4, 0xFD, 0x7F, 0x8D, 0x12, 0x7B,
-0x2E, 0xD0, 0xD0, 0x92, 0xAF, 0x22, 0xE4, 0x90,
-0x99, 0xB9, 0xF0, 0x90, 0x00, 0x37, 0xE0, 0x44,
-0x80, 0xF0, 0x90, 0x00, 0xCF, 0x74, 0x69, 0xF0,
-0xEF, 0x90, 0x00, 0x31, 0xF0, 0xEE, 0x54, 0x03,
-0xFF, 0xA3, 0xE0, 0x54, 0xFC, 0x4F, 0xF0, 0x90,
-0x00, 0x30, 0xED, 0xF0, 0x90, 0x00, 0x33, 0xE0,
-0x44, 0x80, 0xF0, 0x90, 0x00, 0x33, 0xE0, 0x30,
-0xE7, 0x09, 0x11, 0x88, 0x50, 0x05, 0xE0, 0x04,
-0xF0, 0x80, 0xF0, 0x90, 0x00, 0xCF, 0xE4, 0xF0,
-0x90, 0x00, 0x37, 0xE0, 0x54, 0x7F, 0xF0, 0x11,
-0x88, 0x7F, 0x00, 0x50, 0x02, 0x7F, 0x01, 0x22,
-0x90, 0x99, 0xB9, 0xE0, 0xC3, 0x94, 0x64, 0x22,
-0xE4, 0x90, 0x86, 0xAF, 0x12, 0x9F, 0xA9, 0x90,
-0x93, 0x01, 0xF0, 0x90, 0x98, 0x6A, 0xF0, 0xA3,
-0xF0, 0x22, 0x90, 0x00, 0x80, 0xE0, 0x44, 0x80,
-0xF0, 0x12, 0xCF, 0xE8, 0x31, 0x25, 0x12, 0x7B,
-0x79, 0x12, 0xE3, 0x12, 0x11, 0x90, 0x7F, 0x01,
-0x12, 0x85, 0x15, 0x90, 0x98, 0x4B, 0x74, 0x02,
-0xF0, 0xFF, 0x12, 0x85, 0x15, 0x90, 0x98, 0x4B,
-0xE0, 0x04, 0xF0, 0x51, 0xB7, 0x31, 0x51, 0x90,
-0x00, 0x80, 0xE0, 0x44, 0x40, 0xF0, 0x75, 0x20,
-0xFF, 0x12, 0x7C, 0x97, 0x90, 0x01, 0xA0, 0xE0,
-0xB4, 0xFD, 0x05, 0xE4, 0xFF, 0x12, 0x90, 0x50,
-0x71, 0x18, 0x31, 0x3A, 0x90, 0x00, 0x81, 0xE0,
-0x44, 0x04, 0xF0, 0x12, 0xC8, 0x3B, 0x12, 0x99,
-0xAA, 0x90, 0x00, 0xAA, 0xE0, 0x44, 0x02, 0xF0,
+0xA3, 0xE0, 0x24, 0x03, 0xF5, 0x82, 0xE4, 0x34,
+0xFC, 0x22, 0x90, 0x99, 0xB1, 0xE4, 0x75, 0xF0,
+0x04, 0x22, 0x90, 0x99, 0xB6, 0xE0, 0xD3, 0x94,
+0x00, 0x22, 0x74, 0x03, 0xF0, 0x74, 0x01, 0x2E,
+0xF5, 0x82, 0xE4, 0x34, 0xFC, 0xF5, 0x83, 0x22,
+0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0x90,
+0x9C, 0x6E, 0xEC, 0xF1, 0xE1, 0xAA, 0x07, 0x90,
+0x9C, 0x75, 0x12, 0x04, 0x3D, 0x00, 0x00, 0x00,
+0x00, 0xB1, 0xEB, 0xEA, 0x24, 0xEF, 0x60, 0x3A,
+0x24, 0xD7, 0x70, 0x02, 0xA1, 0x53, 0x24, 0x3A,
+0x60, 0x02, 0xA1, 0x8D, 0xB1, 0xC1, 0x24, 0x0A,
+0xB1, 0xCF, 0xED, 0xF0, 0xFE, 0x12, 0x8E, 0x99,
+0xE4, 0x71, 0xEC, 0xE4, 0xF0, 0xFE, 0x74, 0x00,
+0x2F, 0xB1, 0xE3, 0x7D, 0x14, 0xB1, 0xAA, 0x12,
+0xB7, 0x9A, 0xB1, 0xB5, 0x90, 0x90, 0xBE, 0x12,
+0x04, 0x31, 0x7D, 0x14, 0x7C, 0x00, 0xE4, 0xFF,
+0xA1, 0x4E, 0x90, 0x9C, 0x6E, 0xE4, 0x75, 0xF0,
+0x14, 0x12, 0x02, 0xE7, 0x90, 0x9C, 0x6E, 0xA3,
+0xE0, 0xFB, 0xFF, 0x24, 0x06, 0xFC, 0xB1, 0xD0,
+0xCC, 0xF0, 0x90, 0x9C, 0x79, 0xA3, 0xE0, 0xFE,
+0x12, 0x8E, 0x99, 0xE4, 0x71, 0xEC, 0xE4, 0x12,
+0xD7, 0x18, 0xFE, 0xA9, 0x03, 0x74, 0x05, 0x29,
+0xF1, 0xB0, 0xF1, 0x8C, 0xFE, 0x90, 0x9C, 0x73,
+0xF0, 0xA3, 0xEF, 0xF0, 0x90, 0x9C, 0x6E, 0xE0,
+0xFC, 0xA3, 0xE0, 0x2F, 0xFF, 0xEC, 0x3E, 0xFE,
+0xD3, 0xEF, 0x94, 0x00, 0xEE, 0x94, 0x01, 0x90,
+0x9C, 0x6E, 0x40, 0x66, 0xE0, 0xFE, 0xA3, 0xE0,
+0xFF, 0xE9, 0x7C, 0x00, 0x24, 0x00, 0xF9, 0xEC,
+0x34, 0xFC, 0xFA, 0x7B, 0x01, 0xC3, 0xE4, 0x9F,
+0xFD, 0x74, 0x01, 0x9E, 0xFC, 0xB1, 0xAC, 0x90,
+0x9C, 0x70, 0xE0, 0x24, 0x01, 0xFF, 0xE4, 0x33,
+0xA2, 0xE7, 0x13, 0xEF, 0x13, 0x90, 0xFD, 0x10,
+0xF0, 0xB1, 0xDD, 0xC0, 0x00, 0xC0, 0x01, 0xC0,
+0x02, 0xC0, 0x03, 0x7B, 0x01, 0x7A, 0xFC, 0x79,
+0x00, 0x90, 0x9C, 0x6E, 0xF1, 0x9B, 0xE4, 0x9F,
+0xFF, 0x74, 0x01, 0x9E, 0xFE, 0xB1, 0xC8, 0xE0,
+0xC3, 0x9F, 0xFD, 0xEC, 0x9E, 0xFC, 0x12, 0x45,
+0xC2, 0xD0, 0x03, 0xD0, 0x02, 0xD0, 0x01, 0xD0,
+0x00, 0x12, 0x80, 0xC0, 0xB1, 0xAF, 0xB1, 0xEB,
+0x80, 0x0E, 0xA3, 0xE0, 0x7E, 0x00, 0x24, 0x00,
+0xB1, 0xE3, 0xB1, 0xC8, 0xE0, 0xFD, 0xB1, 0xAC,
+0x90, 0x9C, 0x6E, 0x74, 0xFF, 0x75, 0xF0, 0xEC,
+0x12, 0x02, 0xE7, 0xB1, 0xC1, 0x7E, 0x00, 0x24,
+0x0C, 0xF9, 0xEE, 0x34, 0xFC, 0xFA, 0x7B, 0x01,
+0xC0, 0x02, 0xC0, 0x01, 0x74, 0x10, 0x2F, 0xF9,
+0xEE, 0x34, 0xFC, 0xFA, 0xB1, 0xB5, 0x90, 0x90,
+0xBE, 0x12, 0x04, 0x31, 0xB1, 0xC8, 0xE0, 0xFD,
+0xD0, 0x01, 0xD0, 0x02, 0x7F, 0x11, 0x12, 0x3C,
+0xD9, 0x80, 0x32, 0xB1, 0xC1, 0x24, 0x2A, 0xB1,
+0xCF, 0xED, 0xF0, 0xFE, 0x12, 0x8E, 0x99, 0xE4,
+0x71, 0xEC, 0xE4, 0xF0, 0x12, 0xF9, 0xEE, 0x7D,
+0x48, 0xB1, 0xAA, 0xB1, 0xBB, 0xB1, 0xD8, 0x12,
+0x80, 0xC0, 0xE4, 0xFD, 0xFC, 0xB1, 0xAF, 0xB1,
+0xBB, 0xB1, 0xD8, 0x12, 0x80, 0xC0, 0xB1, 0xAF,
+0xB1, 0xBB, 0x12, 0x03, 0xCD, 0x90, 0x9C, 0x71,
+0xEE, 0xF0, 0xA3, 0xEF, 0xF0, 0x90, 0x9C, 0x71,
+0xE0, 0xFC, 0xA3, 0xE0, 0xFD, 0xEC, 0xFF, 0x90,
+0x9C, 0x79, 0xA3, 0xE0, 0xFE, 0x12, 0x8E, 0x99,
+0xEF, 0x71, 0xEC, 0xED, 0xF0, 0xD0, 0xD0, 0x92,
+0xAF, 0x22, 0x7C, 0x00, 0x12, 0x45, 0xC2, 0x90,
+0x9C, 0x75, 0x02, 0x04, 0x31, 0x90, 0x90, 0xBB,
+0x12, 0x82, 0x27, 0x90, 0x9C, 0x75, 0x02, 0x04,
+0xB8, 0x90, 0x9C, 0x6E, 0xA3, 0xE0, 0xFF, 0x22,
+0x90, 0x9C, 0x73, 0xE0, 0xFC, 0xA3, 0x22, 0xFD,
+0xE4, 0x33, 0x90, 0x9C, 0x79, 0xF0, 0xA3, 0x22,
+0x78, 0x10, 0x12, 0x03, 0xEB, 0x90, 0x9C, 0x75,
+0x02, 0x82, 0x12, 0xF9, 0xEE, 0x34, 0xFC, 0xFA,
+0x7B, 0x01, 0x22, 0x90, 0x9C, 0x70, 0xE0, 0xC3,
+0x13, 0x90, 0xFD, 0x10, 0xF0, 0x22, 0x90, 0x99,
+0xB7, 0xE0, 0x90, 0x99, 0xB5, 0xF0, 0x90, 0x99,
+0xB8, 0xE0, 0x90, 0x99, 0xB6, 0x22, 0xE4, 0x90,
+0x9A, 0xFE, 0xF0, 0xA3, 0xF0, 0x90, 0x06, 0x32,
+0xE0, 0x44, 0x20, 0xF0, 0x12, 0x76, 0x9B, 0xEF,
+0x64, 0x01, 0x70, 0x75, 0x90, 0x98, 0x42, 0xE0,
+0xFF, 0x90, 0x92, 0x13, 0x74, 0x0D, 0xF0, 0x7B,
+0x08, 0x7D, 0x01, 0x12, 0x66, 0xDB, 0x90, 0x9A,
+0xFB, 0xEE, 0xF0, 0xA3, 0xEF, 0xF0, 0x90, 0x9A,
+0xFB, 0x12, 0x8E, 0xA3, 0x90, 0x9A, 0xFD, 0xEF,
+0xF0, 0x90, 0x9A, 0xFB, 0x12, 0xFA, 0x1D, 0x7B,
+0x01, 0xE4, 0xFD, 0x12, 0xF0, 0x46, 0x90, 0x9A,
+0xFD, 0xE0, 0xFF, 0x90, 0x9A, 0xFC, 0xE0, 0x2F,
+0xFF, 0x90, 0x9A, 0xFB, 0xE0, 0x34, 0x00, 0xCF,
+0x24, 0x30, 0xCF, 0x34, 0x00, 0xFE, 0x90, 0x9A,
+0xFE, 0xF0, 0xA3, 0xEF, 0xF0, 0xF1, 0xB8, 0xD1,
+0x92, 0x90, 0x98, 0x42, 0xE0, 0xFB, 0xE4, 0xFF,
+0x71, 0xF8, 0xD1, 0x92, 0x90, 0x98, 0x3E, 0xE0,
+0xFB, 0x7F, 0x11, 0x71, 0xF8, 0x90, 0x04, 0x1F,
+0x74, 0x20, 0xF0, 0x90, 0x95, 0xA5, 0x12, 0xBF,
+0xA5, 0x22, 0x90, 0x9A, 0xFE, 0xE0, 0xFC, 0xA3,
+0xE0, 0xFD, 0x22, 0xE0, 0xD3, 0x9D, 0xEC, 0x64,
+0x80, 0xF8, 0x74, 0x80, 0x98, 0x22, 0xD3, 0x10,
+0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0x12, 0xDE, 0x47,
+0x90, 0x9C, 0xE7, 0xF0, 0x90, 0x88, 0x32, 0x12,
+0xA8, 0xA9, 0x30, 0xE0, 0x02, 0xE1, 0x6E, 0x90,
+0x88, 0x31, 0xE0, 0x30, 0xE0, 0x1F, 0x90, 0x88,
+0x53, 0xE0, 0x24, 0x04, 0x33, 0x33, 0x33, 0x54,
+0xF8, 0x90, 0x88, 0x4B, 0xF0, 0x90, 0x88, 0x53,
+0xE0, 0x04, 0x33, 0x33, 0x33, 0x54, 0xF8, 0x90,
+0x88, 0x4A, 0xF0, 0x80, 0x10, 0x90, 0x88, 0x4B,
+0x74, 0x10, 0xF0, 0x90, 0x88, 0x4A, 0x74, 0x08,
+0xF0, 0x74, 0x10, 0x2B, 0xFB, 0x90, 0x88, 0x4A,
+0xE0, 0xFE, 0x90, 0x88, 0x49, 0xE0, 0xD3, 0x9E,
+0x50, 0x0E, 0x90, 0x88, 0x3E, 0xEB, 0xF0, 0x90,
+0x88, 0x4B, 0xE0, 0xC3, 0x9D, 0x2F, 0x80, 0x11,
+0xC3, 0xED, 0x9E, 0x2B, 0x90, 0x88, 0x3E, 0xF0,
+0x90, 0x88, 0x4A, 0xE0, 0xFF, 0xA3, 0xE0, 0xC3,
+0x9F, 0x90, 0x88, 0x4E, 0xF0, 0x90, 0x88, 0x4B,
+0xF1, 0x7A, 0x90, 0x88, 0x4E, 0xD1, 0x9B, 0x40,
+0x04, 0xEF, 0x24, 0x50, 0xF0, 0x90, 0x88, 0x4E,
+0xF1, 0x7A, 0x90, 0x88, 0x3E, 0xD1, 0x9B, 0x40,
+0x04, 0xEF, 0x24, 0x50, 0xF0, 0x90, 0x88, 0x4E,
+0x12, 0x97, 0xD1, 0xFF, 0x7E, 0x00, 0x90, 0x88,
+0x42, 0xEE, 0xF0, 0xA3, 0xEF, 0xF0, 0x90, 0x05,
+0x58, 0xF0, 0x90, 0x88, 0x4E, 0xE0, 0x54, 0x07,
+0xFF, 0x90, 0x05, 0xB1, 0xE0, 0x54, 0xF8, 0x4F,
+0xF0, 0x12, 0xFB, 0x75, 0x80, 0x07, 0x90, 0x88,
+0x33, 0xE0, 0x44, 0x01, 0xF0, 0xD0, 0xD0, 0x92,
+0xAF, 0x22, 0xE0, 0xFF, 0x24, 0x50, 0xFD, 0xE4,
+0x33, 0xFC, 0x22, 0xF0, 0x90, 0x01, 0x17, 0xE0,
+0xFE, 0x90, 0x01, 0x16, 0xE0, 0x7C, 0x00, 0x24,
+0x00, 0xFF, 0xEC, 0x3E, 0x22, 0x90, 0x99, 0xB1,
+0x02, 0x82, 0x1E, 0xE0, 0xFE, 0xA3, 0xE0, 0xFF,
+0xC3, 0x22, 0xE4, 0x75, 0xF0, 0x10, 0x02, 0x02,
+0xE7, 0xE4, 0x75, 0xF0, 0x20, 0x02, 0x02, 0xE7,
+0xF5, 0x82, 0xE4, 0x34, 0xFC, 0xF5, 0x83, 0x22,
+0xAD, 0x07, 0x90, 0x95, 0x9D, 0x12, 0xBF, 0xA5,
+0x90, 0x95, 0x9D, 0xE0, 0xFF, 0xAE, 0x05, 0x74,
+0x04, 0x2E, 0xF5, 0x82, 0xE4, 0x34, 0xFC, 0xF5,
+0x83, 0xEF, 0xF0, 0x90, 0x95, 0x9D, 0xA3, 0xE0,
+0xFF, 0x74, 0x05, 0x2E, 0xF1, 0xB0, 0xEF, 0xF0,
+0x22, 0xF0, 0xA3, 0xED, 0xF0, 0xA3, 0xEB, 0xF0,
+0x22, 0xF5, 0x82, 0xE4, 0x34, 0x96, 0xF5, 0x83,
+0x22, 0xE0, 0xFF, 0x12, 0x7B, 0x07, 0x7E, 0x00,
+0x22, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0,
+0x7F, 0x8F, 0x12, 0x7B, 0x41, 0xEF, 0x30, 0xE6,
+0x2E, 0x90, 0x00, 0x8C, 0xE0, 0x90, 0x9C, 0xCA,
+0xF0, 0x7F, 0x8D, 0x12, 0x7B, 0x41, 0x90, 0x9C,
+0xCB, 0xEF, 0xF0, 0x90, 0x00, 0x8E, 0xE0, 0x90,
+0x9C, 0xCC, 0xF0, 0x90, 0x9C, 0xCB, 0xE0, 0x7F,
+0x8F, 0x12, 0x7B, 0x41, 0xEF, 0x30, 0xE0, 0x07,
+0xE4, 0xFD, 0x7F, 0x8D, 0x12, 0x7B, 0x2E, 0xD0,
+0xD0, 0x92, 0xAF, 0x22, 0xE4, 0x90, 0x99, 0xB9,
+0xF0, 0x90, 0x00, 0x37, 0xE0, 0x44, 0x80, 0xF0,
+0x90, 0x00, 0xCF, 0x74, 0x69, 0xF0, 0xEF, 0x90,
+0x00, 0x31, 0xF0, 0xEE, 0x54, 0x03, 0xFF, 0xA3,
+0xE0, 0x54, 0xFC, 0x4F, 0xF0, 0x90, 0x00, 0x30,
+0xED, 0xF0, 0x90, 0x00, 0x33, 0xE0, 0x44, 0x80,
+0xF0, 0x90, 0x00, 0x33, 0xE0, 0x30, 0xE7, 0x09,
+0x11, 0x8E, 0x50, 0x05, 0xE0, 0x04, 0xF0, 0x80,
+0xF0, 0x90, 0x00, 0xCF, 0xE4, 0xF0, 0x90, 0x00,
+0x37, 0xE0, 0x54, 0x7F, 0xF0, 0x11, 0x8E, 0x7F,
+0x00, 0x50, 0x02, 0x7F, 0x01, 0x22, 0x90, 0x99,
+0xB9, 0xE0, 0xC3, 0x94, 0x64, 0x22, 0xE4, 0x90,
+0x86, 0xAF, 0x12, 0x9F, 0xAF, 0x90, 0x93, 0x01,
+0xF0, 0x90, 0x98, 0x6A, 0xF0, 0xA3, 0xF0, 0x22,
+0x90, 0x00, 0x80, 0xE0, 0x44, 0x80, 0xF0, 0x12,
+0xD7, 0xE8, 0x31, 0x2D, 0x12, 0x7B, 0x79, 0x12,
+0xE2, 0x33, 0x11, 0x96, 0x7F, 0x01, 0x12, 0x85,
+0x15, 0x90, 0x98, 0x4B, 0x74, 0x02, 0xF0, 0xFF,
+0x12, 0x85, 0x15, 0x90, 0x98, 0x4B, 0xE0, 0x04,
+0xF0, 0x51, 0x90, 0x31, 0x5A, 0x90, 0x00, 0x80,
+0xE0, 0x44, 0x40, 0xF0, 0x75, 0x20, 0xFF, 0x12,
+0x7C, 0x97, 0x53, 0xA8, 0xFE, 0x90, 0x01, 0xA0,
+0xE0, 0xB4, 0xFD, 0x05, 0xE4, 0xFF, 0x12, 0x90,
+0x50, 0x51, 0xF1, 0x31, 0x42, 0x90, 0x00, 0x81,
+0xE0, 0x44, 0x04, 0xF0, 0xF1, 0xC3, 0x12, 0x99,
+0xB0, 0x90, 0x00, 0xAA, 0xE0, 0x44, 0x02, 0xF0,
 0xA3, 0xE0, 0x44, 0x80, 0xF0, 0x90, 0x99, 0xB0,
 0xE0, 0x54, 0xFE, 0xF0, 0x90, 0x06, 0x0A, 0xE0,
 0x44, 0x10, 0xF0, 0x90, 0x07, 0xDB, 0xE0, 0x44,
@@ -8627,34 +9023,34 @@ u8 array_mp_8723d_fw_wowlan[] = {
 0xE0, 0x44, 0x01, 0x80, 0x06, 0x90, 0x93, 0x31,
 0xE0, 0x54, 0xFE, 0xF0, 0x90, 0x01, 0xC7, 0xE4,
 0xF0, 0x22, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0,
-0xD0, 0xE4, 0xFF, 0x51, 0x91, 0xE4, 0xF0, 0x0F,
-0xEF, 0xB4, 0x08, 0xF7, 0xD0, 0xD0, 0x92, 0xAF,
-0x22, 0xF1, 0xD1, 0x12, 0x7B, 0xDB, 0x12, 0x92,
-0xA9, 0x12, 0xAF, 0xB4, 0x31, 0x80, 0x51, 0xA0,
-0x12, 0xF2, 0xD3, 0x90, 0x98, 0x64, 0xE0, 0x54,
-0x7F, 0xF0, 0x54, 0xBF, 0xF0, 0x54, 0xDF, 0xF0,
-0x54, 0xF0, 0xF0, 0xE4, 0x90, 0x98, 0x66, 0xF0,
-0x90, 0x98, 0x64, 0xE0, 0x54, 0xEF, 0xF0, 0x22,
-0x7E, 0x00, 0x7F, 0x29, 0x7D, 0x00, 0x7B, 0x01,
-0x7A, 0x93, 0x79, 0x24, 0x12, 0x04, 0x80, 0x90,
-0x06, 0x90, 0xE0, 0x54, 0xDF, 0xF0, 0x12, 0xE7,
-0x88, 0x12, 0x9F, 0xB1, 0x90, 0x86, 0xB3, 0xE0,
+0xD0, 0xE4, 0xFF, 0x12, 0xF9, 0x87, 0xE4, 0xF0,
+0x0F, 0xEF, 0xB4, 0x08, 0xF6, 0xD0, 0xD0, 0x92,
+0xAF, 0x22, 0xF1, 0x63, 0x12, 0x7B, 0xDB, 0x12,
+0x92, 0xD5, 0x12, 0xA7, 0x82, 0x31, 0x89, 0x51,
+0x79, 0x12, 0xDC, 0xDF, 0x90, 0x98, 0x64, 0xE0,
+0x54, 0x7F, 0xF0, 0x54, 0xBF, 0xF0, 0x54, 0xDF,
+0xF0, 0x54, 0xF0, 0xF0, 0xE4, 0x90, 0x98, 0x66,
+0xF0, 0x90, 0x98, 0x64, 0xE0, 0x54, 0xEF, 0xF0,
+0x22, 0x7E, 0x00, 0x7F, 0x29, 0x7D, 0x00, 0x7B,
+0x01, 0x7A, 0x93, 0x79, 0x24, 0x12, 0x04, 0x80,
+0x90, 0x06, 0x90, 0xE0, 0x54, 0xDF, 0xF0, 0x91,
+0x8A, 0x12, 0x9F, 0xB7, 0x90, 0x86, 0xB3, 0xE0,
 0xFF, 0x64, 0x02, 0x70, 0x2E, 0x90, 0xFD, 0x80,
 0xE0, 0x7E, 0x00, 0x30, 0xE0, 0x02, 0x7E, 0x01,
-0x90, 0x93, 0x47, 0x51, 0x6A, 0x7E, 0x00, 0x30,
+0x90, 0x93, 0x47, 0x51, 0x72, 0x7E, 0x00, 0x30,
 0xE1, 0x02, 0x7E, 0x01, 0x90, 0x93, 0x45, 0x51,
-0x6A, 0x7E, 0x00, 0x30, 0xE2, 0x02, 0x7E, 0x01,
-0x90, 0x93, 0x46, 0x51, 0x6A, 0x90, 0x02, 0xFB,
+0x72, 0x7E, 0x00, 0x30, 0xE2, 0x02, 0x7E, 0x01,
+0x90, 0x93, 0x46, 0x51, 0x72, 0x90, 0x02, 0xFB,
 0xF0, 0x80, 0x52, 0xEF, 0x64, 0x01, 0x70, 0x21,
-0x51, 0x63, 0x30, 0xE0, 0x02, 0x7F, 0x01, 0x90,
-0x93, 0x47, 0xEF, 0xF0, 0x51, 0x63, 0x30, 0xE1,
+0x51, 0x6B, 0x30, 0xE0, 0x02, 0x7F, 0x01, 0x90,
+0x93, 0x47, 0xEF, 0xF0, 0x51, 0x6B, 0x30, 0xE1,
 0x02, 0x7F, 0x01, 0x90, 0x93, 0x45, 0xEF, 0xF0,
-0x51, 0x63, 0x30, 0xE2, 0x02, 0x7F, 0x01, 0x80,
+0x51, 0x6B, 0x30, 0xE2, 0x02, 0x7F, 0x01, 0x80,
 0x27, 0x90, 0x86, 0xB3, 0xE0, 0x64, 0x03, 0x70,
-0x24, 0x51, 0x5C, 0x30, 0xE0, 0x02, 0x7F, 0x01,
-0x90, 0x93, 0x47, 0xEF, 0xF0, 0x51, 0x5C, 0x30,
+0x24, 0x51, 0x64, 0x30, 0xE0, 0x02, 0x7F, 0x01,
+0x90, 0x93, 0x47, 0xEF, 0xF0, 0x51, 0x64, 0x30,
 0xE1, 0x02, 0x7F, 0x01, 0x90, 0x93, 0x45, 0xEF,
-0xF0, 0x51, 0x5C, 0x30, 0xE2, 0x02, 0x7F, 0x01,
+0xF0, 0x51, 0x64, 0x30, 0xE2, 0x02, 0x7F, 0x01,
 0x90, 0x93, 0x46, 0xEF, 0xF0, 0x90, 0x93, 0x24,
 0xE0, 0x54, 0xEF, 0xF0, 0xE4, 0x90, 0x95, 0xE9,
 0xF0, 0xA3, 0xF0, 0x90, 0x95, 0xF1, 0x12, 0x04,
@@ -8665,398 +9061,86 @@ u8 array_mp_8723d_fw_wowlan[] = {
 0x00, 0x00, 0x00, 0x22, 0x90, 0xFD, 0x78, 0xE0,
 0x7F, 0x00, 0x22, 0x90, 0xFD, 0x70, 0xE0, 0x7F,
 0x00, 0x22, 0xEE, 0xF0, 0x90, 0xFD, 0x80, 0xE0,
-0x22, 0x90, 0x93, 0x24, 0xE0, 0xFF, 0xC4, 0x54,
-0x0F, 0x30, 0xE0, 0x04, 0x51, 0x81, 0x51, 0x25,
-0x22, 0x90, 0x01, 0x53, 0xE4, 0xF0, 0xFF, 0x51,
-0x91, 0xE4, 0xF0, 0x0F, 0xEF, 0xB4, 0x08, 0xF7,
-0x22, 0xEF, 0x75, 0xF0, 0x0A, 0xA4, 0x24, 0x93,
-0xF5, 0x82, 0xE4, 0x34, 0x9B, 0xF5, 0x83, 0x22,
-0x90, 0x98, 0x4C, 0xE0, 0x54, 0xFE, 0xF0, 0x54,
-0x7F, 0xF0, 0x54, 0xFB, 0xF0, 0xA3, 0x74, 0x0A,
-0xF0, 0xE4, 0xA3, 0xF0, 0xA3, 0xF0, 0x22, 0x12,
-0x7B, 0x1B, 0x90, 0x86, 0xB3, 0xEF, 0xF0, 0x51,
-0xD1, 0x90, 0x01, 0x64, 0x74, 0x01, 0xF0, 0x90,
-0x04, 0x23, 0xE0, 0x44, 0x80, 0xF0, 0x02, 0x67,
-0xD2, 0xD1, 0x61, 0x12, 0x76, 0x6D, 0x12, 0x75,
-0xE0, 0xF1, 0xE3, 0x12, 0xC8, 0x1C, 0xE4, 0xF5,
-0x21, 0x90, 0x86, 0xB3, 0xE0, 0xFF, 0xB4, 0x03,
-0x05, 0x75, 0x22, 0x08, 0x80, 0x03, 0xE4, 0xF5,
-0x22, 0xEF, 0xB4, 0x01, 0x0A, 0x90, 0x00, 0x75,
-0xE0, 0x54, 0xFB, 0xF0, 0x75, 0x22, 0x04, 0x75,
-0x23, 0x10, 0x75, 0x24, 0x80, 0x90, 0x00, 0x50,
-0xE5, 0x21, 0xF0, 0xA3, 0xE5, 0x22, 0xF0, 0xA3,
-0xE5, 0x23, 0xF0, 0xA3, 0xE5, 0x24, 0xF0, 0x22,
-0x12, 0xBF, 0xEB, 0x12, 0xE3, 0x4C, 0xEF, 0x64,
-0x01, 0x60, 0x3C, 0xC3, 0x90, 0x99, 0xB2, 0xE0,
-0x94, 0x88, 0x90, 0x99, 0xB1, 0xE0, 0x94, 0x13,
-0x40, 0x0F, 0x90, 0x01, 0xC1, 0xE0, 0x44, 0x10,
-0xF0, 0x90, 0x01, 0xC7, 0x74, 0xFD, 0xF0, 0x80,
-0x1E, 0x90, 0x99, 0xB1, 0x12, 0xBF, 0x87, 0x91,
-0xBE, 0xD3, 0x90, 0x99, 0xB2, 0xE0, 0x94, 0x32,
-0x90, 0x99, 0xB1, 0xE0, 0x94, 0x00, 0x40, 0xC3,
-0x90, 0x01, 0xC6, 0xE0, 0x30, 0xE3, 0xBC, 0x90,
-0x01, 0xC7, 0x74, 0xFE, 0xF0, 0x22, 0x90, 0x9C,
-0xCD, 0xEF, 0x51, 0xB0, 0x90, 0x01, 0x09, 0xE0,
-0x7F, 0x00, 0x30, 0xE7, 0x02, 0x7F, 0x01, 0x90,
-0x9C, 0xCD, 0xE0, 0x6F, 0x60, 0x35, 0xC3, 0x90,
-0x9C, 0xCF, 0xE0, 0x94, 0x88, 0x90, 0x9C, 0xCE,
-0xE0, 0x94, 0x13, 0x40, 0x08, 0x90, 0x01, 0xC0,
-0xE0, 0x44, 0x10, 0xF0, 0x22, 0x90, 0x9C, 0xCE,
-0x12, 0xBF, 0x87, 0x91, 0xBE, 0xD3, 0x90, 0x9C,
-0xCF, 0xE0, 0x94, 0x32, 0x90, 0x9C, 0xCE, 0xE0,
-0x94, 0x00, 0x40, 0xC0, 0x90, 0x01, 0xC6, 0xE0,
-0x30, 0xE0, 0xB9, 0x22, 0xE4, 0x90, 0x9A, 0x0C,
-0xF0, 0x12, 0xE4, 0x14, 0xD1, 0x61, 0xE4, 0xFF,
-0x71, 0x66, 0x90, 0x93, 0x0C, 0xE0, 0x20, 0xE0,
-0x02, 0x81, 0xAD, 0x90, 0x00, 0x02, 0xE0, 0x44,
-0x02, 0xF0, 0xE4, 0x90, 0x9A, 0x0D, 0xF0, 0x90,
-0x9A, 0x0D, 0xE0, 0xFF, 0xC3, 0x94, 0x05, 0x50,
-0x2D, 0x12, 0xB4, 0x0B, 0x80, 0x05, 0xC3, 0x33,
-0xCE, 0x33, 0xCE, 0xD8, 0xF9, 0xFF, 0x90, 0x93,
-0x0F, 0xE0, 0xFD, 0xEF, 0x5D, 0x60, 0x0F, 0x90,
-0x9A, 0x0D, 0xD1, 0x92, 0x90, 0x9A, 0x0D, 0xD1,
-0xB2, 0x44, 0x40, 0xF0, 0x91, 0xBE, 0x90, 0x9A,
-0x0D, 0xE0, 0x04, 0xF0, 0x80, 0xC9, 0x90, 0x07,
-0xC7, 0xE4, 0xF0, 0x90, 0x07, 0xC6, 0xF0, 0x90,
-0x07, 0xC5, 0x74, 0x77, 0xF0, 0x90, 0x07, 0xC4,
-0xE4, 0xF0, 0x90, 0x07, 0xC0, 0x74, 0x38, 0xF0,
-0xA3, 0xE4, 0xF0, 0xA3, 0x74, 0x0F, 0xF0, 0xA3,
-0x74, 0xC0, 0xF0, 0x90, 0x02, 0x26, 0xE0, 0x44,
-0x01, 0xF0, 0xE0, 0x90, 0x9A, 0x0E, 0xF0, 0x90,
-0x9A, 0x0E, 0xE0, 0x30, 0xE0, 0x19, 0x90, 0x9A,
-0x0C, 0xE0, 0x04, 0xF0, 0xB1, 0xDA, 0x90, 0x02,
-0x26, 0xE0, 0x90, 0x9A, 0x0E, 0xF0, 0x90, 0x9A,
-0x0C, 0xE0, 0xD3, 0x94, 0xFA, 0x40, 0xE0, 0x90,
-0x02, 0x03, 0x74, 0x80, 0xF0, 0x90, 0x04, 0x24,
-0xE0, 0x90, 0x9A, 0x0F, 0xF0, 0x90, 0x04, 0x22,
-0xE0, 0x44, 0x10, 0xF0, 0x90, 0x02, 0x00, 0xE0,
-0x90, 0x9A, 0x0E, 0xF0, 0x90, 0x02, 0x01, 0x91,
-0xB5, 0x90, 0x02, 0x02, 0x91, 0xB5, 0x90, 0x02,
-0x14, 0x91, 0xB5, 0xE0, 0x04, 0xF0, 0xE0, 0x90,
-0x04, 0x24, 0xF0, 0x90, 0x04, 0x22, 0xE0, 0x54,
-0xEF, 0xF0, 0x90, 0x9A, 0x0F, 0xE0, 0x90, 0x04,
-0x24, 0xF0, 0x90, 0xFD, 0x09, 0x74, 0xFF, 0xF0,
-0x90, 0xFD, 0x08, 0xE4, 0xF0, 0x90, 0x88, 0x32,
-0xE0, 0x54, 0xEF, 0xF0, 0x22, 0xE0, 0xFF, 0x90,
-0x9A, 0x0E, 0xE0, 0x2F, 0xF0, 0x22, 0x7F, 0x14,
-0x7E, 0x00, 0x02, 0x7C, 0x6A, 0x75, 0x0D, 0x14,
-0x90, 0x88, 0x32, 0xE0, 0x44, 0x10, 0xF0, 0x90,
-0x88, 0x41, 0xE0, 0x90, 0x00, 0x93, 0xF0, 0x90,
-0x88, 0x37, 0xE0, 0x60, 0x12, 0x90, 0x01, 0x2F,
-0xE0, 0x30, 0xE7, 0x05, 0x74, 0x10, 0xF0, 0x80,
-0x06, 0x90, 0x01, 0x2F, 0x74, 0x90, 0xF0, 0x90,
-0x93, 0x0C, 0xE0, 0x30, 0xE0, 0x60, 0x90, 0xFD,
-0x09, 0xE4, 0xF0, 0x90, 0xFD, 0x08, 0xF0, 0x90,
-0x0E, 0x4B, 0xE0, 0x54, 0xFC, 0xF0, 0xE4, 0x90,
-0x9A, 0x0C, 0xF0, 0x90, 0x9A, 0x0C, 0xE0, 0xFF,
-0xC3, 0x94, 0x05, 0x50, 0x2D, 0x12, 0xB4, 0x0B,
-0x80, 0x05, 0xC3, 0x33, 0xCE, 0x33, 0xCE, 0xD8,
-0xF9, 0xFF, 0x90, 0x93, 0x0E, 0xE0, 0xFD, 0xEF,
-0x5D, 0x60, 0x0F, 0x90, 0x9A, 0x0C, 0xD1, 0x92,
-0x90, 0x9A, 0x0C, 0xD1, 0xB2, 0x44, 0x20, 0xF0,
-0x91, 0xBE, 0x90, 0x9A, 0x0C, 0xE0, 0x04, 0xF0,
-0x80, 0xC9, 0x90, 0x00, 0x92, 0xE0, 0x54, 0xFE,
-0xF0, 0xE0, 0x44, 0x08, 0xF0, 0x90, 0x00, 0x02,
-0xE0, 0x54, 0xFD, 0xF0, 0x80, 0x07, 0x90, 0x00,
-0x92, 0xE0, 0x44, 0x01, 0xF0, 0x90, 0x00, 0x08,
-0xE0, 0x44, 0x10, 0xF0, 0x7F, 0x01, 0x71, 0x66,
-0x90, 0x00, 0x90, 0xE0, 0x44, 0x01, 0xF0, 0x00,
-0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-0x00, 0x00, 0x00, 0x7F, 0x14, 0x7E, 0x00, 0x02,
-0x7C, 0x6A, 0x7F, 0x0A, 0x7E, 0x00, 0x02, 0x7C,
-0x6A, 0x90, 0x93, 0x2D, 0xE0, 0xC3, 0x13, 0x30,
-0xE0, 0x28, 0xF1, 0x19, 0x70, 0x1D, 0x90, 0x93,
-0x2D, 0xE0, 0x30, 0xE0, 0x0B, 0xD1, 0x34, 0xD1,
-0x53, 0xD1, 0x2C, 0x20, 0xE0, 0x02, 0xB1, 0xDA,
-0x90, 0x98, 0x48, 0xE0, 0xFF, 0x7B, 0x01, 0x7D,
-0x01, 0x80, 0x04, 0xF1, 0xDC, 0xFB, 0xFD, 0x02,
-0xB2, 0x4C, 0x90, 0x93, 0x2D, 0xE0, 0x30, 0xE0,
-0x12, 0xD1, 0x34, 0xD1, 0x53, 0xD1, 0x2C, 0x20,
-0xE0, 0x02, 0xB1, 0xDA, 0x90, 0x93, 0x2D, 0xE0,
-0x54, 0xFE, 0xF0, 0x22, 0x90, 0x93, 0x2D, 0xE0,
-0xC4, 0x54, 0x0F, 0x22, 0x90, 0x00, 0xCC, 0xE0,
-0x44, 0x04, 0xF0, 0x7F, 0x02, 0x12, 0x7B, 0x41,
-0xEF, 0x54, 0xFB, 0x22, 0x90, 0x00, 0xCC, 0xE0,
-0x44, 0x04, 0xF0, 0x7F, 0x02, 0x12, 0x7B, 0x41,
-0xEF, 0x44, 0x04, 0xFD, 0x7F, 0x02, 0x12, 0x7B,
-0x2E, 0x90, 0x00, 0xCC, 0xE0, 0x54, 0xFB, 0xF0,
-0x22, 0x90, 0x00, 0x08, 0xE0, 0x54, 0xEF, 0xF0,
-0x22, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0,
-0x91, 0xC5, 0x71, 0xB4, 0xD0, 0xD0, 0x92, 0xAF,
-0x22, 0x90, 0x88, 0x39, 0xE0, 0xFF, 0x60, 0x03,
-0xB4, 0x08, 0x0E, 0x12, 0xF5, 0x7B, 0xBF, 0x01,
-0x08, 0xD1, 0x69, 0x90, 0x01, 0xE5, 0xE0, 0x04,
-0xF0, 0x22, 0xE0, 0xFF, 0x24, 0x1A, 0xF5, 0x82,
-0xE4, 0x34, 0x93, 0xF5, 0x83, 0xE0, 0x90, 0x01,
-0xB0, 0xF0, 0x74, 0x1F, 0x2F, 0xF5, 0x82, 0xE4,
-0x34, 0x93, 0xF5, 0x83, 0xE0, 0x90, 0x01, 0xB1,
-0xF0, 0x22, 0xE0, 0xFF, 0x24, 0x10, 0xF5, 0x82,
-0xE4, 0x34, 0x93, 0xF5, 0x83, 0xE0, 0x90, 0x01,
-0xB2, 0xF0, 0x74, 0x15, 0x2F, 0xF5, 0x82, 0xE4,
-0x34, 0x93, 0xF5, 0x83, 0xE0, 0x90, 0x01, 0xB3,
-0xF0, 0xE0, 0x22, 0x90, 0x93, 0x2D, 0xE0, 0xC3,
-0x13, 0x30, 0xE0, 0x3C, 0xF1, 0x19, 0x60, 0x0D,
-0xD1, 0x44, 0xE4, 0x90, 0x92, 0x20, 0xF0, 0xA3,
-0x04, 0xF0, 0xE4, 0x80, 0x22, 0x90, 0x93, 0x2D,
-0x12, 0x97, 0xDE, 0x30, 0xE0, 0x0B, 0xA3, 0xE0,
-0x90, 0x92, 0x20, 0xF0, 0xE4, 0xA3, 0xF0, 0x80,
-0x0E, 0xE4, 0x90, 0x92, 0x20, 0xF0, 0x90, 0x93,
-0x2E, 0xE0, 0x90, 0x92, 0x21, 0xF0, 0xE4, 0xFB,
-0xFD, 0x7F, 0x5C, 0x7E, 0x01, 0x12, 0x66, 0x33,
-0x22, 0x7F, 0x60, 0x12, 0x7B, 0x41, 0xEF, 0x54,
-0x01, 0x90, 0x98, 0x4A, 0xF0, 0x22, 0xE4, 0xFB,
-0xFA, 0xFD, 0x7F, 0x01, 0x12, 0x86, 0x4E, 0x90,
-0x9A, 0x33, 0xEF, 0xF0, 0x60, 0xF0, 0x90, 0x86,
-0xAF, 0xE0, 0xFF, 0x70, 0x04, 0xA3, 0xE0, 0x60,
-0xE5, 0xC2, 0xAF, 0xEF, 0x30, 0xE1, 0x0D, 0x90,
-0x86, 0xAF, 0xE0, 0x54, 0xFD, 0xF0, 0x90, 0x86,
-0x08, 0x12, 0x88, 0xC8, 0xF1, 0x94, 0x30, 0xE2,
-0x09, 0x54, 0xFB, 0xF0, 0x90, 0x86, 0x0A, 0x12,
-0x88, 0xC8, 0xF1, 0x94, 0xFF, 0x30, 0xE4, 0x0B,
-0x54, 0xEF, 0xF0, 0xF1, 0x9D, 0xBF, 0x01, 0x03,
-0x12, 0xA0, 0xA6, 0xF1, 0x94, 0xFF, 0x30, 0xE7,
-0x06, 0x54, 0x7F, 0xF0, 0x12, 0x95, 0x7A, 0xD2,
-0xAF, 0xC2, 0xAF, 0x90, 0x86, 0xB0, 0xE0, 0xFF,
-0x30, 0xE2, 0x05, 0x54, 0xFB, 0xF0, 0xD1, 0xD3,
-0xD2, 0xAF, 0x80, 0xA2, 0xD2, 0xAF, 0xC2, 0xAF,
-0x90, 0x86, 0xAF, 0xE0, 0x22, 0xE4, 0x90, 0x9C,
-0xDB, 0xF0, 0xA3, 0xF0, 0x90, 0x02, 0x86, 0xE0,
-0x20, 0xE1, 0x23, 0xC3, 0x90, 0x9C, 0xDC, 0xE0,
-0x94, 0xD0, 0x90, 0x9C, 0xDB, 0xE0, 0x94, 0x07,
-0x40, 0x0A, 0x90, 0x01, 0xC1, 0xE0, 0x44, 0x04,
-0xF0, 0x7F, 0x00, 0x22, 0x90, 0x9C, 0xDB, 0x12,
-0xBF, 0x87, 0xB1, 0xDA, 0x80, 0xD6, 0x7F, 0x01,
-0x22, 0xE4, 0xFD, 0xFF, 0x02, 0x6E, 0x71, 0x12,
-0x9F, 0xCF, 0x41, 0x71, 0x90, 0x98, 0x48, 0xE0,
-0xFF, 0xE4, 0x22, 0x75, 0x29, 0x10, 0xE4, 0xF5,
-0x2A, 0x75, 0x2B, 0x07, 0x75, 0x2C, 0x02, 0xF5,
-0x31, 0xF5, 0x32, 0xF5, 0x33, 0xF5, 0x34, 0x90,
-0x01, 0x30, 0xE5, 0x29, 0xF0, 0xA3, 0xE5, 0x2A,
-0xF0, 0xA3, 0xE5, 0x2B, 0xF0, 0xA3, 0xE5, 0x2C,
-0xF0, 0x90, 0x01, 0x20, 0xE5, 0x31, 0xF0, 0xA3,
-0xE5, 0x32, 0xF0, 0xA3, 0xE5, 0x33, 0xF0, 0xA3,
-0xE5, 0x34, 0xF0, 0x22, 0x75, 0x39, 0x0F, 0x75,
-0x3A, 0x01, 0x75, 0x3B, 0x03, 0x75, 0x3C, 0x62,
-0x90, 0x01, 0x38, 0xE5, 0x39, 0xF0, 0xA3, 0xE5,
-0x3A, 0xF0, 0xA3, 0xE5, 0x3B, 0xF0, 0xA3, 0xE5,
-0x3C, 0xF0, 0x22, 0x90, 0x01, 0xE4, 0x74, 0x29,
-0xF0, 0xA3, 0xE4, 0xF0, 0x22, 0x7D, 0x02, 0x90,
-0x01, 0xC4, 0x74, 0x45, 0xF0, 0x74, 0xC8, 0xA3,
-0xF0, 0x90, 0x98, 0x4B, 0xE0, 0xFF, 0xED, 0xC3,
-0x9F, 0x50, 0x18, 0xED, 0x25, 0xE0, 0x24, 0x81,
-0xF8, 0xE6, 0x30, 0xE4, 0x0B, 0x90, 0x01, 0xB8,
-0x74, 0x08, 0xF0, 0xA3, 0xF0, 0x7F, 0x00, 0x22,
-0x0D, 0x80, 0xDE, 0x74, 0x45, 0x04, 0x90, 0x01,
-0xC4, 0xF0, 0x74, 0xC8, 0xA3, 0xF0, 0x7F, 0x01,
-0x22, 0xE4, 0x90, 0x9A, 0x09, 0xF0, 0xA3, 0xF0,
-0xA3, 0xF0, 0x90, 0x9A, 0x09, 0xE0, 0x64, 0x01,
-0xF0, 0x90, 0x98, 0x62, 0xE0, 0x70, 0x18, 0x90,
-0x98, 0x5F, 0xE0, 0x70, 0x12, 0xA3, 0xE0, 0x70,
-0x0E, 0x90, 0x9A, 0x09, 0xE0, 0x24, 0x81, 0x90,
-0x01, 0xC4, 0xF0, 0x74, 0xC8, 0xA3, 0xF0, 0x12,
-0x7C, 0x54, 0xBF, 0x01, 0x03, 0x12, 0x54, 0x9F,
-0x90, 0x88, 0x36, 0xE0, 0x60, 0x0F, 0x90, 0x88,
-0x39, 0xE0, 0xFF, 0x90, 0x88, 0x38, 0xE0, 0x6F,
-0x60, 0x03, 0x12, 0xD3, 0x4F, 0xC2, 0xAF, 0x11,
-0x45, 0xBF, 0x01, 0x17, 0x90, 0x86, 0xB3, 0xE0,
-0xFF, 0xB4, 0x03, 0x07, 0x90, 0x99, 0xB0, 0xE0,
-0x20, 0xE0, 0x05, 0xEF, 0x64, 0x03, 0x60, 0x03,
-0x12, 0xF5, 0xDC, 0xD2, 0xAF, 0x11, 0xF7, 0x12,
-0xBF, 0xF3, 0x12, 0x84, 0x4D, 0x80, 0x93, 0xD3,
-0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0x90, 0x98,
-0x5F, 0xE0, 0x60, 0x24, 0x7F, 0x54, 0x7E, 0x09,
-0x12, 0x70, 0x70, 0x31, 0xA3, 0x12, 0x04, 0xB8,
-0xEF, 0x44, 0xFE, 0xFF, 0xEE, 0x44, 0x03, 0xFE,
-0xED, 0x44, 0x04, 0xFD, 0xEC, 0x31, 0xA3, 0x31,
-0xAD, 0x7F, 0x54, 0x7E, 0x09, 0x12, 0x70, 0xAD,
-0x90, 0x98, 0x5A, 0xE0, 0x70, 0x29, 0x90, 0x07,
-0xCC, 0xE0, 0x30, 0xE0, 0x22, 0xE4, 0xF0, 0x90,
-0x9A, 0x10, 0x74, 0x22, 0xF0, 0x90, 0x9A, 0x32,
-0x74, 0x01, 0xF0, 0x90, 0x9A, 0x12, 0x74, 0x03,
-0xF0, 0x7B, 0x01, 0x7A, 0x9A, 0x79, 0x10, 0x12,
-0x90, 0x35, 0x7F, 0x04, 0x12, 0x04, 0x7E, 0x90,
-0x98, 0x62, 0xE0, 0xFF, 0x70, 0x0A, 0x90, 0x98,
-0x5F, 0xE0, 0x70, 0x04, 0xA3, 0xE0, 0x60, 0x15,
-0x90, 0x00, 0x1F, 0xE0, 0x54, 0xF0, 0xF0, 0x90,
-0x01, 0xC5, 0x74, 0xEA, 0xF0, 0xA3, 0x74, 0xEF,
-0xF0, 0xA3, 0x74, 0xFD, 0xF0, 0xEF, 0x60, 0x06,
-0x90, 0x01, 0xC4, 0x74, 0x07, 0xF0, 0x90, 0x98,
-0x5F, 0xE0, 0x60, 0x06, 0x90, 0x01, 0xC4, 0x74,
-0x01, 0xF0, 0x90, 0x98, 0x60, 0xE0, 0x60, 0x06,
-0x90, 0x01, 0xC4, 0x74, 0x02, 0xF0, 0xD0, 0xD0,
-0x92, 0xAF, 0x22, 0x90, 0x9A, 0x0C, 0x12, 0x04,
-0x31, 0x90, 0x9A, 0x0C, 0x22, 0x12, 0x04, 0xB8,
-0x90, 0x92, 0x18, 0x02, 0x04, 0x31, 0x7F, 0x58,
-0x7E, 0x0C, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0,
-0xD0, 0x90, 0x9C, 0x2D, 0xEE, 0xF0, 0xA3, 0xEF,
-0xF0, 0x12, 0x70, 0x70, 0x90, 0x9C, 0x37, 0x12,
-0x04, 0x31, 0x90, 0x9C, 0x2F, 0x12, 0x04, 0xB8,
-0x12, 0x03, 0xCD, 0x90, 0x9C, 0x37, 0x12, 0xAF,
-0xAE, 0xC0, 0x04, 0xC0, 0x05, 0xC0, 0x06, 0xC0,
-0x07, 0x90, 0x9C, 0x2F, 0x12, 0x04, 0xB8, 0x90,
-0x9C, 0x33, 0x12, 0xAF, 0xAE, 0xD0, 0x03, 0xD0,
-0x02, 0xD0, 0x01, 0xD0, 0x00, 0x12, 0x82, 0x05,
-0x90, 0x9C, 0x3B, 0x12, 0x04, 0x31, 0x90, 0x9C,
-0x3B, 0x31, 0xAD, 0x90, 0x9C, 0x2D, 0xE0, 0xFE,
-0xA3, 0xE0, 0xFF, 0x12, 0x70, 0xAD, 0xD0, 0xD0,
-0x92, 0xAF, 0x22, 0xD3, 0x10, 0xAF, 0x01, 0xC3,
-0xC0, 0xD0, 0x90, 0x9C, 0xD9, 0xED, 0xF0, 0xE4,
-0xA3, 0xF0, 0xEF, 0x14, 0x60, 0x02, 0x61, 0x02,
-0x90, 0x06, 0x03, 0xE0, 0x54, 0xFB, 0xF0, 0x90,
-0x9C, 0xD9, 0xE0, 0xFB, 0xC4, 0x33, 0x54, 0xE0,
-0xFE, 0x90, 0x04, 0x42, 0xE0, 0x54, 0x9F, 0x4E,
-0xFE, 0xF0, 0xE4, 0xFD, 0x12, 0xE3, 0xA7, 0x90,
-0x9C, 0xDA, 0xEF, 0xF0, 0x90, 0x04, 0x83, 0xF0,
-0x90, 0x9C, 0x2F, 0x12, 0x04, 0x3D, 0x00, 0x00,
-0x00, 0x01, 0x90, 0x9C, 0x33, 0x12, 0x04, 0x3D,
-0x00, 0x00, 0x00, 0x01, 0x71, 0x68, 0x12, 0x04,
-0x3D, 0x00, 0x00, 0x00, 0x01, 0x90, 0x9C, 0x33,
-0x12, 0x04, 0x3D, 0x00, 0x00, 0x00, 0x01, 0x7F,
-0x00, 0x7E, 0x09, 0x71, 0x6C, 0x12, 0x04, 0x3D,
-0x00, 0x00, 0x00, 0x10, 0x90, 0x9C, 0xD9, 0x12,
-0xAE, 0xA3, 0xEF, 0x54, 0x03, 0xFF, 0xE4, 0x78,
-0x01, 0x12, 0x03, 0xEB, 0x78, 0x04, 0x91, 0x50,
-0x7F, 0x00, 0x7E, 0x0A, 0x71, 0x6C, 0x12, 0x04,
-0x3D, 0x00, 0x00, 0x0C, 0x00, 0x90, 0x9C, 0xD9,
-0x12, 0xAE, 0xA3, 0xEF, 0x54, 0x03, 0xFF, 0xE4,
-0x78, 0x0A, 0x91, 0x50, 0x7F, 0x00, 0x7E, 0x0D,
-0x71, 0x6C, 0x12, 0x04, 0x3D, 0x0C, 0x00, 0x00,
-0x00, 0x90, 0x9C, 0xDA, 0x12, 0xAE, 0xA3, 0xEF,
-0x54, 0x03, 0xFF, 0xE4, 0x78, 0x1A, 0x91, 0x50,
-0x7F, 0x18, 0x71, 0x6A, 0x12, 0x04, 0x3D, 0x00,
-0x00, 0x0C, 0x00, 0x90, 0x9C, 0x33, 0x12, 0x04,
-0x3D, 0x00, 0x00, 0x00, 0x00, 0x91, 0x59, 0x12,
-0x04, 0x3D, 0x00, 0x00, 0x0C, 0x00, 0x90, 0x9C,
-0x21, 0x12, 0x04, 0x3D, 0x00, 0x00, 0x04, 0x00,
-0x80, 0x58, 0x90, 0x06, 0x03, 0xE0, 0x44, 0x04,
-0xF0, 0x90, 0x9C, 0x2F, 0x12, 0x04, 0x3D, 0x00,
-0x00, 0x00, 0x01, 0x90, 0x9C, 0x33, 0x12, 0x04,
-0x3D, 0x00, 0x00, 0x00, 0x00, 0x71, 0x68, 0x12,
-0x04, 0x3D, 0x00, 0x00, 0x00, 0x01, 0x90, 0x9C,
-0x33, 0x12, 0x04, 0x3D, 0x00, 0x00, 0x00, 0x00,
-0x7F, 0x00, 0x7E, 0x09, 0x71, 0x6C, 0x12, 0x04,
-0x3D, 0x00, 0x00, 0x0C, 0x00, 0x90, 0x9C, 0x33,
-0x12, 0x04, 0x3D, 0x00, 0x00, 0x0C, 0x00, 0x91,
-0x59, 0x12, 0x04, 0x3D, 0x00, 0x00, 0x0C, 0x00,
-0x90, 0x9C, 0x21, 0x12, 0x04, 0x3D, 0x00, 0x00,
-0x0C, 0x00, 0x7D, 0x18, 0x7C, 0x00, 0xE4, 0xFF,
-0x12, 0xAF, 0x21, 0xD0, 0xD0, 0x92, 0xAF, 0x22,
-0x7F, 0x00, 0x7E, 0x08, 0x31, 0xBA, 0x90, 0x9C,
-0x2F, 0x22, 0x7F, 0x50, 0x7E, 0x0C, 0x12, 0x70,
-0x70, 0x90, 0x9B, 0x0B, 0xEF, 0xF0, 0x7F, 0x58,
-0x7E, 0x0C, 0x12, 0x70, 0x70, 0x90, 0x9B, 0x0C,
-0xEF, 0xF0, 0x90, 0x9C, 0x2F, 0x12, 0x04, 0x3D,
-0x00, 0x00, 0x00, 0x7F, 0x90, 0x9C, 0x33, 0x12,
-0x04, 0x3D, 0x00, 0x00, 0x00, 0x17, 0x7F, 0x50,
-0x7E, 0x0C, 0x71, 0x6C, 0x12, 0x04, 0x3D, 0x00,
-0x00, 0x00, 0x7F, 0x90, 0x9C, 0x33, 0x12, 0x04,
-0x3D, 0x00, 0x00, 0x00, 0x17, 0x31, 0xB6, 0x90,
-0x06, 0x08, 0xE0, 0x90, 0x9B, 0x21, 0xF0, 0x90,
-0x06, 0xA1, 0xE0, 0xFE, 0x90, 0x06, 0xA0, 0x12,
-0xBF, 0x7E, 0x90, 0x9B, 0x23, 0xF0, 0xA3, 0xEF,
-0x12, 0xF3, 0xAF, 0x90, 0x06, 0xA0, 0x74, 0x20,
-0xF0, 0xA3, 0x74, 0x01, 0xF0, 0xE4, 0xFD, 0xFF,
-0x41, 0x1B, 0x90, 0x93, 0x04, 0x12, 0xD6, 0xBB,
-0x30, 0xE0, 0x08, 0x91, 0x63, 0xF0, 0xE4, 0x90,
-0x9B, 0x25, 0xF0, 0x90, 0x9C, 0x2F, 0x12, 0x04,
-0x3D, 0x00, 0x00, 0x00, 0x7F, 0x90, 0x9B, 0x0B,
-0x12, 0xAE, 0xA3, 0x91, 0x53, 0x7F, 0x50, 0x7E,
-0x0C, 0x71, 0x6C, 0x12, 0x04, 0x3D, 0x00, 0x00,
-0x00, 0x7F, 0x90, 0x9B, 0x0C, 0x12, 0xAE, 0xA3,
-0x91, 0x53, 0x31, 0xB6, 0x90, 0x9B, 0x21, 0xE0,
-0x90, 0x06, 0x08, 0xF0, 0x90, 0x9B, 0x23, 0xA3,
-0xE0, 0x90, 0x06, 0xA0, 0xF0, 0xA3, 0xE4, 0xF0,
-0x90, 0x9B, 0x0F, 0xE0, 0xFF, 0x60, 0x05, 0xA3,
-0xE0, 0xFD, 0x51, 0x1B, 0x90, 0x9B, 0x0E, 0xE0,
-0xFF, 0x60, 0x0C, 0xA3, 0xE0, 0xFD, 0xA3, 0xE0,
-0xFB, 0x12, 0xFA, 0xCF, 0x12, 0xAE, 0xB8, 0x22,
-0x12, 0x03, 0xFE, 0x90, 0x9C, 0x33, 0x02, 0x04,
-0x31, 0x7F, 0x84, 0x7E, 0x08, 0x31, 0xBA, 0x90,
-0x9C, 0x1D, 0x22, 0x90, 0x02, 0x86, 0xE0, 0x54,
-0xFB, 0x22, 0xE4, 0xFD, 0xFC, 0x90, 0x01, 0x1D,
-0xE0, 0xFE, 0x90, 0x01, 0x1C, 0xF1, 0xC7, 0x3E,
-0x90, 0x9C, 0xBF, 0xF0, 0xA3, 0xEF, 0xF1, 0xA7,
-0xE0, 0x24, 0x00, 0xFF, 0xEA, 0x3E, 0x90, 0x9C,
-0xC1, 0xF0, 0xA3, 0xEF, 0xF0, 0x91, 0xFC, 0x90,
-0x9C, 0xBF, 0xE0, 0xFA, 0xA3, 0xE0, 0xFB, 0xB5,
-0x07, 0x06, 0xEA, 0xB5, 0x06, 0x02, 0x80, 0x3D,
-0x91, 0xFC, 0xD3, 0xEB, 0x9F, 0xEA, 0x9E, 0x40,
-0x0E, 0x90, 0x9C, 0xC0, 0xE0, 0x9F, 0xFD, 0x90,
-0x9C, 0xBF, 0xE0, 0x9E, 0xFC, 0x80, 0x26, 0x91,
-0xFC, 0xC3, 0x90, 0x9C, 0xC0, 0xE0, 0x9F, 0x90,
-0x9C, 0xBF, 0xE0, 0x9E, 0x50, 0x17, 0x12, 0xAF,
-0xEE, 0x90, 0x9C, 0xC2, 0xE0, 0x9F, 0xFF, 0x90,
-0x9C, 0xC1, 0xE0, 0x9E, 0xFE, 0xC3, 0xE4, 0x9F,
-0xFD, 0x74, 0x40, 0x9E, 0xFC, 0xD3, 0xED, 0x94,
-0x00, 0xEC, 0x94, 0x38, 0x40, 0x04, 0x91, 0x63,
-0xF0, 0x22, 0xC3, 0xEC, 0x94, 0x08, 0x50, 0x0B,
-0xED, 0x94, 0x00, 0xEC, 0x94, 0x00, 0x40, 0x03,
-0xB1, 0xF0, 0xF0, 0x22, 0x90, 0x9C, 0xC1, 0xE0,
-0xFE, 0xA3, 0xE0, 0xFF, 0x22, 0xEF, 0x70, 0x02,
-0xA1, 0xB7, 0x90, 0x06, 0x0F, 0xE0, 0x20, 0xE6,
-0x1D, 0x90, 0x98, 0x6C, 0xE0, 0x54, 0xFE, 0xF0,
-0x90, 0x06, 0x0F, 0xE0, 0x20, 0xE5, 0x07, 0x90,
-0x01, 0x0C, 0xE0, 0x30, 0xE1, 0x45, 0x90, 0x01,
-0xC7, 0x74, 0x44, 0xF0, 0x80, 0xFE, 0x90, 0x98,
-0x6C, 0xE0, 0x44, 0x01, 0xF0, 0x90, 0x06, 0x0F,
-0xE0, 0x30, 0xE5, 0x10, 0x90, 0x01, 0x0C, 0xE0,
-0x20, 0xE1, 0x09, 0x90, 0x98, 0x6C, 0xE0, 0x54,
-0xFD, 0xF0, 0x80, 0x1F, 0x90, 0x06, 0x0F, 0xE0,
-0x20, 0xE5, 0x10, 0x90, 0x01, 0x0C, 0xE0, 0x30,
-0xE1, 0x09, 0x90, 0x98, 0x6C, 0xE0, 0x44, 0x02,
-0xF0, 0x80, 0x08, 0x90, 0x01, 0xC7, 0x74, 0x44,
-0xF0, 0x80, 0xFE, 0x90, 0x98, 0x37, 0xE0, 0xFF,
-0x60, 0x03, 0x12, 0xD9, 0x05, 0x90, 0x01, 0xC7,
-0xE4, 0x12, 0xBF, 0x75, 0xF1, 0xD0, 0x90, 0x06,
-0x09, 0xE0, 0x54, 0xFE, 0xF0, 0x7B, 0x35, 0x7D,
-0xFF, 0x7F, 0xFF, 0x12, 0x8D, 0x1E, 0x90, 0x8A,
-0xEF, 0x12, 0x88, 0xC8, 0xB1, 0xF0, 0xF0, 0xD1,
-0x55, 0xB1, 0xD0, 0x90, 0x86, 0x0C, 0x12, 0x88,
-0xC8, 0xE4, 0xFB, 0xFD, 0x7F, 0xFF, 0x12, 0x8D,
-0x1E, 0xB1, 0xF7, 0x90, 0x01, 0x34, 0x74, 0x08,
-0xF0, 0xFD, 0xE4, 0xFF, 0x02, 0x7C, 0x74, 0x7D,
-0x08, 0xE4, 0xFF, 0x12, 0x7C, 0x7E, 0x90, 0x06,
-0x90, 0xE0, 0x54, 0xF0, 0xF0, 0x91, 0x63, 0xF0,
-0xD1, 0x2A, 0x12, 0xC7, 0xD7, 0x02, 0xC1, 0x80,
-0xF1, 0xCF, 0xF1, 0xD8, 0x30, 0xE0, 0x18, 0x90,
-0x93, 0x04, 0xE0, 0xFF, 0xC4, 0x54, 0x0F, 0x20,
-0xE0, 0x0D, 0x90, 0x9C, 0x9B, 0x12, 0x04, 0x3D,
-0x00, 0x00, 0x00, 0x14, 0x12, 0x94, 0xFF, 0x22,
-0x90, 0x02, 0x86, 0xE0, 0x44, 0x04, 0x22, 0xE4,
-0xFF, 0x74, 0x18, 0xD1, 0x1F, 0x74, 0x38, 0x2F,
-0xF5, 0x82, 0xE4, 0x34, 0x93, 0xF5, 0x83, 0xEE,
-0xF0, 0x74, 0x10, 0xD1, 0x1F, 0x74, 0x32, 0x2F,
-0xF5, 0x82, 0xE4, 0x34, 0x93, 0xF5, 0x83, 0xEE,
-0xF0, 0x0F, 0xEF, 0xB4, 0x06, 0xDB, 0x22, 0x2F,
-0xF5, 0x82, 0xE4, 0x34, 0x06, 0xF5, 0x83, 0xE0,
-0xFE, 0x22, 0x12, 0xE7, 0x88, 0x90, 0x98, 0x46,
-0xE0, 0xFF, 0xD1, 0xA2, 0x90, 0x01, 0x3F, 0x74,
-0x04, 0xF0, 0x90, 0x86, 0xB3, 0xE0, 0xFF, 0xB4,
-0x01, 0x07, 0x90, 0xFD, 0x00, 0xE0, 0x54, 0xEF,
-0xF0, 0xEF, 0xB4, 0x01, 0x07, 0x90, 0xFE, 0x10,
-0xE0, 0x54, 0xFB, 0xF0, 0x22, 0x12, 0xE7, 0x72,
-0xAD, 0x07, 0x90, 0x01, 0xC4, 0x74, 0x55, 0xF0,
-0x74, 0xCE, 0xA3, 0xF0, 0xED, 0x64, 0x01, 0x60,
-0x1E, 0x12, 0xA7, 0x46, 0xED, 0xB4, 0x02, 0x08,
+0x22, 0x90, 0x98, 0x4C, 0xE0, 0x54, 0xFE, 0xF0,
+0x54, 0x7F, 0xF0, 0x54, 0xFB, 0xF0, 0xA3, 0x74,
+0x0A, 0xF0, 0xE4, 0xA3, 0xF0, 0xA3, 0xF0, 0x22,
+0x12, 0x7B, 0x1B, 0x90, 0x86, 0xB3, 0xEF, 0xF0,
+0x51, 0xAA, 0x90, 0x01, 0x64, 0x74, 0x01, 0xF0,
+0x90, 0x04, 0x23, 0xE0, 0x44, 0x80, 0xF0, 0x02,
+0x67, 0xD2, 0xF1, 0x97, 0x12, 0x76, 0x6D, 0x12,
+0x75, 0xE0, 0xF1, 0xEB, 0x12, 0xD0, 0x24, 0xE4,
+0xF5, 0x21, 0x90, 0x86, 0xB3, 0xE0, 0xFF, 0xB4,
+0x03, 0x05, 0x75, 0x22, 0x08, 0x80, 0x03, 0xE4,
+0xF5, 0x22, 0xEF, 0xB4, 0x01, 0x0A, 0x90, 0x00,
+0x75, 0xE0, 0x54, 0xFB, 0xF0, 0x75, 0x22, 0x04,
+0x75, 0x23, 0x10, 0x75, 0x24, 0x80, 0x90, 0x00,
+0x50, 0xE5, 0x21, 0xF0, 0xA3, 0xE5, 0x22, 0xF0,
+0xA3, 0xE5, 0x23, 0xF0, 0xA3, 0xE5, 0x24, 0xF0,
+0x22, 0xE4, 0x90, 0x9C, 0xD9, 0xF0, 0xA3, 0xF0,
+0x12, 0xE2, 0x77, 0xEF, 0x64, 0x01, 0x60, 0x3D,
+0xC3, 0x90, 0x9C, 0xDA, 0xE0, 0x94, 0x88, 0x90,
+0x9C, 0xD9, 0xE0, 0x94, 0x13, 0x40, 0x0F, 0x90,
+0x01, 0xC1, 0xE0, 0x44, 0x10, 0xF0, 0x90, 0x01,
+0xC7, 0x74, 0xFD, 0xF0, 0x80, 0x1F, 0x90, 0x9C,
+0xD9, 0x12, 0xBF, 0xA5, 0x12, 0xBF, 0xDF, 0xD3,
+0x90, 0x9C, 0xDA, 0xE0, 0x94, 0x32, 0x90, 0x9C,
+0xD9, 0xE0, 0x94, 0x00, 0x40, 0xC2, 0x90, 0x01,
+0xC6, 0xE0, 0x30, 0xE3, 0xBB, 0x90, 0x01, 0xC7,
+0x74, 0xFE, 0xF0, 0x22, 0xEF, 0x70, 0x02, 0x61,
+0xF5, 0x90, 0x06, 0x0F, 0xE0, 0x20, 0xE6, 0x1D,
+0x90, 0x98, 0x6C, 0xE0, 0x54, 0xFE, 0xF0, 0x90,
+0x06, 0x0F, 0xE0, 0x20, 0xE5, 0x07, 0x90, 0x01,
+0x0C, 0xE0, 0x30, 0xE1, 0x45, 0x90, 0x01, 0xC7,
+0x74, 0x44, 0xF0, 0x80, 0xFE, 0x90, 0x98, 0x6C,
+0xE0, 0x44, 0x01, 0xF0, 0x90, 0x06, 0x0F, 0xE0,
+0x30, 0xE5, 0x10, 0x90, 0x01, 0x0C, 0xE0, 0x20,
+0xE1, 0x09, 0x90, 0x98, 0x6C, 0xE0, 0x54, 0xFD,
+0xF0, 0x80, 0x1F, 0x90, 0x06, 0x0F, 0xE0, 0x20,
+0xE5, 0x10, 0x90, 0x01, 0x0C, 0xE0, 0x30, 0xE1,
+0x09, 0x90, 0x98, 0x6C, 0xE0, 0x44, 0x02, 0xF0,
+0x80, 0x08, 0x90, 0x01, 0xC7, 0x74, 0x44, 0xF0,
+0x80, 0xFE, 0x90, 0x98, 0x37, 0xE0, 0xFF, 0x60,
+0x02, 0xD1, 0x10, 0x90, 0x01, 0xC7, 0xE4, 0x12,
+0xC7, 0x83, 0xF1, 0x77, 0x90, 0x06, 0x09, 0xE0,
+0x54, 0xFE, 0xF0, 0x7B, 0x35, 0x7D, 0xFF, 0x7F,
+0xFF, 0x12, 0x8D, 0x1E, 0x90, 0x8A, 0xEF, 0x12,
+0x88, 0xC8, 0xF1, 0x69, 0xF0, 0x91, 0x9D, 0x91,
+0x0D, 0x90, 0x86, 0x0C, 0x12, 0x88, 0xC8, 0xE4,
+0xFB, 0xFD, 0x7F, 0xFF, 0x12, 0x8D, 0x1E, 0x91,
+0x2D, 0x90, 0x01, 0x34, 0x74, 0x08, 0xF0, 0xFD,
+0xE4, 0xFF, 0x02, 0x7C, 0x74, 0x7D, 0x08, 0xE4,
+0xFF, 0x12, 0x7C, 0x7E, 0x90, 0x06, 0x90, 0xE0,
+0x54, 0xF0, 0xF0, 0xF1, 0x70, 0xF0, 0x91, 0x60,
+0x12, 0x9F, 0xEF, 0x21, 0x89, 0xF1, 0x62, 0xF1,
+0x7F, 0x30, 0xE0, 0x18, 0x90, 0x93, 0x04, 0xE0,
+0xFF, 0xC4, 0x54, 0x0F, 0x20, 0xE0, 0x0D, 0x90,
+0x9C, 0x9B, 0x12, 0x04, 0x3D, 0x00, 0x00, 0x00,
+0x14, 0x12, 0x95, 0x30, 0x22, 0xE4, 0xFF, 0x74,
+0x18, 0x91, 0x55, 0x74, 0x38, 0x2F, 0xF5, 0x82,
+0xE4, 0x34, 0x93, 0xF5, 0x83, 0xEE, 0xF0, 0x74,
+0x10, 0x91, 0x55, 0x74, 0x32, 0x2F, 0xF5, 0x82,
+0xE4, 0x34, 0x93, 0xF5, 0x83, 0xEE, 0xF0, 0x0F,
+0xEF, 0xB4, 0x06, 0xDB, 0x22, 0x2F, 0xF5, 0x82,
+0xE4, 0x34, 0x06, 0xF5, 0x83, 0xE0, 0xFE, 0x22,
+0x91, 0x8A, 0x90, 0x98, 0x46, 0xE0, 0xFF, 0x91,
+0xEA, 0x90, 0x01, 0x3F, 0x74, 0x04, 0xF0, 0x90,
+0x86, 0xB3, 0xE0, 0xFF, 0xB4, 0x01, 0x07, 0x90,
+0xFD, 0x00, 0xE0, 0x54, 0xEF, 0xF0, 0xEF, 0xB4,
+0x01, 0x07, 0x90, 0xFE, 0x10, 0xE0, 0x54, 0xFB,
+0xF0, 0x22, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0,
+0xD0, 0xE4, 0xFD, 0x7F, 0x8F, 0x12, 0x7B, 0x2E,
+0xD0, 0xD0, 0x92, 0xAF, 0x22, 0x12, 0xE6, 0x30,
+0xAD, 0x07, 0x90, 0x01, 0xC4, 0x74, 0x9D, 0xF0,
+0x74, 0xCC, 0xA3, 0xF0, 0xED, 0x64, 0x01, 0x60,
+0x1E, 0x12, 0xA7, 0x71, 0xED, 0xB4, 0x02, 0x08,
 0x90, 0x01, 0xC7, 0x74, 0x40, 0xF0, 0x80, 0x0A,
 0xED, 0xB4, 0x04, 0x06, 0x90, 0x01, 0xC7, 0x74,
-0x41, 0xF0, 0x7F, 0x01, 0x02, 0xA7, 0x56, 0xF1,
-0x0C, 0x90, 0x02, 0x87, 0xE0, 0x70, 0xF8, 0x90,
-0x06, 0x90, 0xE0, 0x44, 0x02, 0xF0, 0x74, 0x55,
-0x04, 0x90, 0x01, 0xC4, 0xF0, 0x74, 0xCE, 0xA3,
+0x41, 0xF0, 0x7F, 0x01, 0x02, 0xAD, 0x5E, 0xB1,
+0x54, 0x90, 0x02, 0x87, 0xE0, 0x70, 0xF8, 0x90,
+0x06, 0x90, 0xE0, 0x44, 0x02, 0xF0, 0x74, 0x9D,
+0x04, 0x90, 0x01, 0xC4, 0xF0, 0x74, 0xCC, 0xA3,
 0xF0, 0x22, 0x90, 0x99, 0xB4, 0xEF, 0xF0, 0xE4,
-0xFF, 0x74, 0x33, 0x2F, 0xF1, 0xE0, 0xE0, 0xFE,
+0xFF, 0x74, 0x33, 0x2F, 0xD1, 0xD7, 0xE0, 0xFE,
 0x74, 0x84, 0x2F, 0xF5, 0x82, 0xE4, 0x34, 0x04,
 0xF5, 0x83, 0xEE, 0xF0, 0x0F, 0xEF, 0xB4, 0x08,
 0xE8, 0x90, 0x95, 0x63, 0xE0, 0x90, 0x04, 0x8C,
@@ -9065,1070 +9149,1120 @@ u8 array_mp_8723d_fw_wowlan[] = {
 0x45, 0x75, 0x46, 0x94, 0x75, 0x47, 0x42, 0x75,
 0x48, 0x08, 0xFB, 0x7A, 0x95, 0x79, 0x3B, 0x12,
 0x69, 0xF5, 0x90, 0x98, 0x46, 0xE0, 0x60, 0x1B,
-0x90, 0x99, 0xB4, 0x12, 0xBF, 0xE3, 0x12, 0xF9,
-0x49, 0xC0, 0x03, 0x8B, 0x45, 0x75, 0x46, 0x95,
+0x90, 0x99, 0xB4, 0x12, 0xC7, 0xF1, 0x12, 0xF9,
+0xEE, 0xC0, 0x03, 0x8B, 0x45, 0x75, 0x46, 0x95,
 0x75, 0x47, 0x33, 0x75, 0x48, 0x60, 0xD0, 0x03,
-0x12, 0x69, 0xF5, 0x22, 0xF1, 0xA8, 0x12, 0xBF,
-0x7E, 0x90, 0x99, 0xB1, 0x12, 0xFB, 0x05, 0xF9,
-0x90, 0x93, 0x24, 0xE0, 0x20, 0xE0, 0x02, 0xE1,
-0xA6, 0xEC, 0xC3, 0x99, 0x40, 0x02, 0xE1, 0xA6,
-0x90, 0x99, 0xB1, 0xE0, 0xFA, 0xA3, 0xE0, 0xFB,
-0xEA, 0x90, 0xFD, 0x11, 0xF0, 0xAF, 0x03, 0xAD,
-0x07, 0xF1, 0xB1, 0x3E, 0x54, 0x3F, 0x90, 0x99,
-0xB3, 0x12, 0xF9, 0x14, 0x30, 0xE0, 0x0A, 0xC3,
-0x13, 0x20, 0xE0, 0x05, 0x12, 0xF9, 0xD1, 0x80,
+0x12, 0x69, 0xF5, 0x22, 0xF1, 0xCE, 0x12, 0xC7,
+0x8C, 0x90, 0x99, 0xB1, 0xF1, 0xB1, 0xF9, 0x90,
+0x93, 0x24, 0xE0, 0x20, 0xE0, 0x02, 0xA1, 0xED,
+0xEC, 0xC3, 0x99, 0x40, 0x02, 0xA1, 0xED, 0x90,
+0x99, 0xB1, 0xE0, 0xFA, 0xA3, 0xE0, 0xFB, 0xEA,
+0x90, 0xFD, 0x11, 0xF0, 0xAF, 0x03, 0xAD, 0x07,
+0x12, 0xD7, 0x63, 0x3E, 0x54, 0x3F, 0x90, 0x99,
+0xB3, 0x12, 0xF9, 0xD2, 0x30, 0xE0, 0x0A, 0xC3,
+0x13, 0x20, 0xE0, 0x05, 0x12, 0xFA, 0x66, 0x80,
 0x02, 0x7E, 0x00, 0xEE, 0xFB, 0xEF, 0x24, 0x18,
 0xFF, 0xE4, 0x33, 0xCF, 0x2B, 0xCF, 0x34, 0x00,
 0x90, 0x99, 0xB3, 0x8F, 0xF0, 0x12, 0x02, 0xE7,
 0x90, 0x99, 0xB3, 0xE0, 0xFE, 0xA3, 0xE0, 0xFF,
-0x12, 0xE7, 0x50, 0x90, 0x99, 0xB3, 0xEE, 0xF0,
-0xA3, 0xEF, 0xF0, 0x90, 0x99, 0xB1, 0x12, 0xF9,
-0xC2, 0xD3, 0x90, 0x99, 0xB2, 0xE0, 0x9F, 0x90,
-0x99, 0xB1, 0xE0, 0x9E, 0x40, 0x0F, 0x12, 0xF9,
-0x8A, 0x90, 0x99, 0xB2, 0xE0, 0x9F, 0xF0, 0x90,
-0x99, 0xB1, 0xE0, 0x9E, 0xF0, 0x90, 0x99, 0xB1,
-0x12, 0xE7, 0x3D, 0x0C, 0xE1, 0x21, 0x22, 0xF0,
-0x90, 0x01, 0x1F, 0xE0, 0xFE, 0x90, 0x01, 0x1E,
-0x22, 0x74, 0x01, 0x2D, 0xF5, 0x82, 0xE4, 0x34,
-0xFB, 0xF5, 0x83, 0xE0, 0xFE, 0x74, 0x00, 0x2D,
-0xF5, 0x82, 0xE4, 0x34, 0xFB, 0xF5, 0x83, 0xE0,
-0x7A, 0x00, 0x24, 0x00, 0xFF, 0xEA, 0x22, 0x22,
-0x90, 0x88, 0x27, 0xF0, 0xA3, 0xEF, 0xF0, 0x22,
-0x90, 0x93, 0x24, 0xE0, 0xC4, 0x54, 0x0F, 0x22,
-0xF5, 0x82, 0xE4, 0x34, 0x95, 0xF5, 0x83, 0x22,
+0xB1, 0xEE, 0x90, 0x99, 0xB3, 0xEE, 0xF0, 0xA3,
+0xEF, 0xF0, 0x90, 0x99, 0xB1, 0x12, 0xFA, 0x57,
+0xD3, 0x90, 0x99, 0xB2, 0xE0, 0x9F, 0x90, 0x99,
+0xB1, 0xE0, 0x9E, 0x40, 0x0F, 0x12, 0xFA, 0x37,
+0x90, 0x99, 0xB2, 0xE0, 0x9F, 0xF0, 0x90, 0x99,
+0xB1, 0xE0, 0x9E, 0xF0, 0x90, 0x99, 0xB1, 0x12,
+0xE6, 0x1D, 0x0C, 0xA1, 0x68, 0x22, 0x7D, 0x07,
+0xEF, 0x5D, 0xC3, 0x60, 0x0A, 0xD1, 0x03, 0x24,
+0x08, 0xFF, 0xE4, 0x3E, 0xFE, 0x80, 0x03, 0xD1,
+0x03, 0xFF, 0x22, 0x74, 0xFF, 0x9D, 0xFD, 0x74,
+0xFF, 0x94, 0x00, 0x5E, 0xFE, 0xED, 0x5F, 0x22,
+0x12, 0x7B, 0x07, 0x7E, 0x00, 0xE4, 0xFD, 0xEF,
+0x2D, 0x12, 0x8E, 0x99, 0xE0, 0xFC, 0x74, 0x33,
+0x2D, 0xD1, 0xD7, 0xEC, 0xF0, 0x0D, 0xED, 0xB4,
+0x08, 0xED, 0xAC, 0x07, 0x74, 0x08, 0x2C, 0xF1,
+0x9F, 0x64, 0xDD, 0x60, 0x02, 0xC1, 0xD6, 0x74,
+0x09, 0x2C, 0xF1, 0xA8, 0xFC, 0x30, 0xE0, 0x1B,
+0xE4, 0xFD, 0xEF, 0x2D, 0x24, 0x10, 0xF1, 0x8F,
+0xE0, 0xFB, 0x74, 0x6B, 0x2D, 0xF5, 0x82, 0xE4,
+0x34, 0x95, 0xF5, 0x83, 0xEB, 0xF0, 0x0D, 0xED,
+0xB4, 0x08, 0xE7, 0xEC, 0x30, 0xE1, 0x77, 0x74,
+0x0A, 0x2F, 0xF5, 0x82, 0xE4, 0x34, 0xFC, 0xF5,
+0x83, 0xE0, 0x90, 0x95, 0x63, 0xF0, 0xE4, 0xFD,
+0xA9, 0x07, 0xE9, 0x2D, 0xFC, 0x24, 0x18, 0xF1,
+0x87, 0xE0, 0xFB, 0x74, 0x73, 0x2D, 0xF5, 0x82,
+0xE4, 0x34, 0x95, 0xF5, 0x83, 0xEB, 0xF0, 0x74,
+0x20, 0x2C, 0xF1, 0xBA, 0xFC, 0x74, 0x7B, 0x2D,
+0xF5, 0x82, 0xE4, 0x34, 0x95, 0xF5, 0x83, 0xEC,
+0xF0, 0xE9, 0x2D, 0xFC, 0x12, 0xFA, 0xAF, 0xFB,
+0x74, 0x83, 0x2D, 0xF5, 0x82, 0xE4, 0x34, 0x95,
+0xF5, 0x83, 0xEB, 0xF0, 0x74, 0x30, 0x2C, 0xF5,
+0x82, 0xE4, 0x34, 0xFC, 0xF5, 0x83, 0xE0, 0xFC,
+0x74, 0x8B, 0x2D, 0xF5, 0x82, 0xE4, 0x34, 0x95,
+0xF5, 0x83, 0xEC, 0xF0, 0x0D, 0xED, 0xB4, 0x08,
+0xA7, 0x90, 0x95, 0x63, 0xE0, 0xFF, 0x7B, 0x01,
+0x7A, 0x95, 0x79, 0x43, 0xD1, 0xDF, 0x22, 0xF5,
+0x82, 0xE4, 0x34, 0x95, 0xF5, 0x83, 0x22, 0x90,
+0x99, 0xB1, 0xEF, 0xF0, 0xA3, 0x12, 0x82, 0x27,
+0xE4, 0x90, 0x99, 0xB5, 0xF0, 0xF0, 0x90, 0x99,
+0xB5, 0xE0, 0xFF, 0xC3, 0x94, 0x04, 0x50, 0x2B,
+0xEF, 0x75, 0xF0, 0x04, 0xA4, 0xFF, 0x90, 0x99,
+0xB2, 0x12, 0x82, 0x1E, 0xE9, 0x2F, 0xF9, 0xEA,
+0x35, 0xF0, 0xFA, 0x90, 0x99, 0xB1, 0xE0, 0x75,
+0xF0, 0x08, 0xA4, 0x24, 0x02, 0xFF, 0x90, 0x99,
+0xB5, 0xE0, 0x2F, 0xFF, 0xF1, 0x24, 0x12, 0xC1,
+0x2F, 0x80, 0xCB, 0x22, 0x90, 0x99, 0xB6, 0x12,
+0x82, 0x27, 0xF1, 0xE1, 0xF1, 0xD7, 0x12, 0x7C,
+0x6A, 0x90, 0x06, 0x78, 0xF1, 0x5A, 0xEF, 0x12,
+0x02, 0x4C, 0x90, 0x06, 0x79, 0xF1, 0x5A, 0x90,
+0x00, 0x01, 0xEF, 0x12, 0x02, 0x5E, 0x90, 0x06,
+0x7A, 0xE0, 0x90, 0x00, 0x02, 0x12, 0x02, 0x5E,
+0x90, 0x06, 0x7B, 0xE0, 0x90, 0x00, 0x03, 0x02,
+0x02, 0x5E, 0xE0, 0xFF, 0x90, 0x99, 0xB6, 0x02,
+0x82, 0x1E, 0x22, 0xE4, 0xFD, 0xFF, 0x02, 0x6E,
+0x71, 0x90, 0x02, 0x86, 0xE0, 0x44, 0x04, 0x22,
+0x90, 0x02, 0x86, 0xE0, 0x54, 0xFB, 0x22, 0x90,
+0x88, 0x27, 0xF0, 0xA3, 0xEF, 0xF0, 0x22, 0x90,
+0x93, 0x24, 0xE0, 0xC4, 0x54, 0x0F, 0x22, 0xF5,
+0x82, 0xE4, 0x34, 0xFC, 0xF5, 0x83, 0x22, 0xF5,
+0x82, 0xE4, 0x34, 0xFC, 0xF5, 0x83, 0x22, 0x90,
+0x00, 0x08, 0xE0, 0x54, 0xEF, 0xF0, 0x22, 0xF5,
+0x82, 0xE4, 0x34, 0xFC, 0xF5, 0x83, 0xE0, 0x22,
+0xF5, 0x82, 0xE4, 0x34, 0xFC, 0xF5, 0x83, 0xE0,
+0x22, 0xF0, 0xA3, 0xEF, 0xF0, 0x90, 0x02, 0x87,
+0xE0, 0x22, 0xF5, 0x82, 0xE4, 0x34, 0xFC, 0xF5,
+0x83, 0xE0, 0x22, 0x90, 0x01, 0xE4, 0x74, 0x2F,
+0xF0, 0xA3, 0xE4, 0xF0, 0x22, 0xF0, 0x90, 0x01,
+0x1F, 0xE0, 0xFE, 0x90, 0x01, 0x1E, 0x22, 0xF0,
+0xA3, 0x74, 0x80, 0xF0, 0x7F, 0x01, 0x7E, 0x00,
+0x22, 0x90, 0x06, 0x70, 0xEF, 0xF0, 0xA3, 0xE4,
+0xF0, 0xA3, 0x22, 0x75, 0x29, 0x10, 0xE4, 0xF5,
+0x2A, 0x75, 0x2B, 0x07, 0x75, 0x2C, 0x02, 0xF5,
+0x31, 0xF5, 0x32, 0xF5, 0x33, 0xF5, 0x34, 0x90,
+0x01, 0x30, 0xE5, 0x29, 0xF0, 0xA3, 0xE5, 0x2A,
+0xF0, 0xA3, 0xE5, 0x2B, 0xF0, 0xA3, 0xE5, 0x2C,
+0xF0, 0x90, 0x01, 0x20, 0xE5, 0x31, 0xF0, 0xA3,
+0xE5, 0x32, 0xF0, 0xA3, 0xE5, 0x33, 0xF0, 0xA3,
+0xE5, 0x34, 0xF0, 0x22, 0x75, 0x39, 0x0F, 0x75,
+0x3A, 0x01, 0x75, 0x3B, 0x03, 0x75, 0x3C, 0x62,
+0x90, 0x01, 0x38, 0xE5, 0x39, 0xF0, 0xA3, 0xE5,
+0x3A, 0xF0, 0xA3, 0xE5, 0x3B, 0xF0, 0xA3, 0xE5,
+0x3C, 0xF0, 0x22, 0x7D, 0x02, 0x90, 0x01, 0xC4,
+0x74, 0x43, 0xF0, 0x74, 0xD0, 0xA3, 0xF0, 0x90,
+0x98, 0x4B, 0xE0, 0xFF, 0xED, 0xC3, 0x9F, 0x50,
+0x18, 0xED, 0x25, 0xE0, 0x24, 0x81, 0xF8, 0xE6,
+0x30, 0xE4, 0x0B, 0x90, 0x01, 0xB8, 0x74, 0x08,
+0xF0, 0xA3, 0xF0, 0x7F, 0x00, 0x22, 0x0D, 0x80,
+0xDE, 0x74, 0x43, 0x04, 0x90, 0x01, 0xC4, 0xF0,
+0x74, 0xD0, 0xA3, 0xF0, 0x7F, 0x01, 0x22, 0xE4,
+0x90, 0x9A, 0x09, 0xF0, 0xA3, 0xF0, 0xA3, 0xF0,
+0x90, 0x9A, 0x09, 0xE0, 0x64, 0x01, 0xF0, 0x90,
+0x98, 0x62, 0xE0, 0x70, 0x18, 0x90, 0x98, 0x5F,
+0xE0, 0x70, 0x12, 0xA3, 0xE0, 0x70, 0x0E, 0x90,
+0x9A, 0x09, 0xE0, 0x24, 0x7F, 0x90, 0x01, 0xC4,
+0xF0, 0x74, 0xD0, 0xA3, 0xF0, 0x12, 0x7C, 0x54,
+0xBF, 0x01, 0x03, 0x12, 0x54, 0x9F, 0x90, 0x88,
+0x36, 0xE0, 0x60, 0x0F, 0x90, 0x88, 0x39, 0xE0,
+0xFF, 0x90, 0x88, 0x38, 0xE0, 0x6F, 0x60, 0x03,
+0x12, 0xB6, 0x3B, 0xC2, 0xAF, 0x11, 0x43, 0xBF,
+0x01, 0x02, 0xF1, 0x41, 0xD2, 0xAF, 0x11, 0xE0,
+0x12, 0xC7, 0xF9, 0x12, 0x84, 0x4D, 0x80, 0xA8,
+0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0x90,
+0x98, 0x5F, 0xE0, 0x60, 0x24, 0x7F, 0x54, 0x7E,
+0x09, 0x12, 0x70, 0x70, 0x31, 0x8C, 0x12, 0x04,
+0xB8, 0xEF, 0x44, 0xFE, 0xFF, 0xEE, 0x44, 0x03,
+0xFE, 0xED, 0x44, 0x04, 0xFD, 0xEC, 0x31, 0x8C,
+0x31, 0x96, 0x7F, 0x54, 0x7E, 0x09, 0x12, 0x70,
+0xAD, 0x90, 0x98, 0x5A, 0xE0, 0x70, 0x29, 0x90,
+0x07, 0xCC, 0xE0, 0x30, 0xE0, 0x22, 0xE4, 0xF0,
+0x90, 0x9A, 0x10, 0x74, 0x22, 0xF0, 0x90, 0x9A,
+0x32, 0x74, 0x01, 0xF0, 0x90, 0x9A, 0x12, 0x74,
+0x03, 0xF0, 0x7B, 0x01, 0x7A, 0x9A, 0x79, 0x10,
+0x12, 0x90, 0x35, 0x7F, 0x04, 0x12, 0x04, 0x7E,
+0x90, 0x98, 0x62, 0xE0, 0xFF, 0x70, 0x0A, 0x90,
+0x98, 0x5F, 0xE0, 0x70, 0x04, 0xA3, 0xE0, 0x60,
+0x15, 0x90, 0x00, 0x1F, 0xE0, 0x54, 0xF0, 0xF0,
+0x90, 0x01, 0xC5, 0x74, 0xEA, 0xF0, 0xA3, 0x74,
+0xEF, 0xF0, 0xA3, 0x74, 0xFD, 0xF0, 0xEF, 0x60,
+0x06, 0x90, 0x01, 0xC4, 0x74, 0x07, 0xF0, 0x90,
+0x98, 0x5F, 0xE0, 0x60, 0x06, 0x90, 0x01, 0xC4,
+0x74, 0x01, 0xF0, 0x90, 0x98, 0x60, 0xE0, 0x60,
+0x06, 0x90, 0x01, 0xC4, 0x74, 0x02, 0xF0, 0xD0,
+0xD0, 0x92, 0xAF, 0x22, 0x90, 0x9A, 0x0C, 0x12,
+0x04, 0x31, 0x90, 0x9A, 0x0C, 0x22, 0x12, 0x04,
+0xB8, 0x90, 0x92, 0x18, 0x02, 0x04, 0x31, 0x7F,
+0x58, 0x7E, 0x0C, 0xD3, 0x10, 0xAF, 0x01, 0xC3,
+0xC0, 0xD0, 0x90, 0x9C, 0x2D, 0xEE, 0xF0, 0xA3,
+0xEF, 0xF0, 0x12, 0x70, 0x70, 0x90, 0x9C, 0x37,
+0x12, 0x04, 0x31, 0x90, 0x9C, 0x2F, 0x12, 0x04,
+0xB8, 0x12, 0x03, 0xCD, 0x90, 0x9C, 0x37, 0x91,
+0x46, 0xC0, 0x04, 0xC0, 0x05, 0xC0, 0x06, 0xC0,
+0x07, 0x90, 0x9C, 0x2F, 0x12, 0x04, 0xB8, 0x90,
+0x9C, 0x33, 0x91, 0x46, 0xD0, 0x03, 0xD0, 0x02,
+0xD0, 0x01, 0xD0, 0x00, 0x12, 0x82, 0x05, 0x90,
+0x9C, 0x3B, 0x12, 0x04, 0x31, 0x90, 0x9C, 0x3B,
+0x31, 0x96, 0x90, 0x9C, 0x2D, 0xE0, 0xFE, 0xA3,
+0xE0, 0xFF, 0x12, 0x70, 0xAD, 0xD0, 0xD0, 0x92,
+0xAF, 0x22, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0,
+0xD0, 0x90, 0x9C, 0xDB, 0xED, 0xF0, 0xE4, 0xA3,
+0xF0, 0xEF, 0x14, 0x60, 0x02, 0x41, 0xE8, 0x90,
+0x06, 0x03, 0xE0, 0x54, 0xFB, 0xF0, 0x90, 0x9C,
+0xDB, 0xE0, 0xFB, 0xC4, 0x33, 0x54, 0xE0, 0xFE,
+0x90, 0x04, 0x42, 0xE0, 0x54, 0x9F, 0x4E, 0xFE,
+0xF0, 0xE4, 0xFD, 0xF1, 0x81, 0x90, 0x9C, 0xDC,
+0xEF, 0xF0, 0x90, 0x04, 0x83, 0xF0, 0x90, 0x9C,
+0x2F, 0x12, 0x04, 0x3D, 0x00, 0x00, 0x00, 0x01,
+0x90, 0x9C, 0x33, 0x12, 0x04, 0x3D, 0x00, 0x00,
+0x00, 0x01, 0x71, 0x4D, 0x12, 0x04, 0x3D, 0x00,
+0x00, 0x00, 0x01, 0x90, 0x9C, 0x33, 0x12, 0x04,
+0x3D, 0x00, 0x00, 0x00, 0x01, 0x7F, 0x00, 0x7E,
+0x09, 0x71, 0x51, 0x12, 0x04, 0x3D, 0x00, 0x00,
+0x00, 0x10, 0x90, 0x9C, 0xDB, 0x12, 0xAF, 0x13,
+0xEF, 0x54, 0x03, 0xFF, 0xE4, 0x78, 0x01, 0x12,
+0x03, 0xEB, 0x78, 0x04, 0x91, 0x33, 0x7F, 0x00,
+0x7E, 0x0A, 0x71, 0x51, 0x12, 0x04, 0x3D, 0x00,
+0x00, 0x0C, 0x00, 0x90, 0x9C, 0xDB, 0x12, 0xAF,
+0x13, 0xEF, 0x54, 0x03, 0xFF, 0xE4, 0x78, 0x0A,
+0x91, 0x33, 0x7F, 0x00, 0x7E, 0x0D, 0x71, 0x51,
+0x12, 0x04, 0x3D, 0x0C, 0x00, 0x00, 0x00, 0x90,
+0x9C, 0xDC, 0x12, 0xAF, 0x13, 0xEF, 0x54, 0x03,
+0xFF, 0xE4, 0x78, 0x1A, 0x91, 0x33, 0x7F, 0x18,
+0x71, 0x4F, 0x12, 0x04, 0x3D, 0x00, 0x00, 0x0C,
+0x00, 0x90, 0x9C, 0x33, 0x12, 0x04, 0x3D, 0x00,
+0x00, 0x00, 0x00, 0x91, 0x3C, 0x12, 0x04, 0x3D,
+0x00, 0x00, 0x0C, 0x00, 0x90, 0x9C, 0x21, 0x12,
+0x04, 0x3D, 0x00, 0x00, 0x04, 0x00, 0x80, 0x58,
+0x90, 0x06, 0x03, 0xE0, 0x44, 0x04, 0xF0, 0x90,
+0x9C, 0x2F, 0x12, 0x04, 0x3D, 0x00, 0x00, 0x00,
+0x01, 0x90, 0x9C, 0x33, 0x12, 0x04, 0x3D, 0x00,
+0x00, 0x00, 0x00, 0x71, 0x4D, 0x12, 0x04, 0x3D,
+0x00, 0x00, 0x00, 0x01, 0x90, 0x9C, 0x33, 0x12,
+0x04, 0x3D, 0x00, 0x00, 0x00, 0x00, 0x7F, 0x00,
+0x7E, 0x09, 0x71, 0x51, 0x12, 0x04, 0x3D, 0x00,
+0x00, 0x0C, 0x00, 0x90, 0x9C, 0x33, 0x12, 0x04,
+0x3D, 0x00, 0x00, 0x0C, 0x00, 0x91, 0x3C, 0x12,
+0x04, 0x3D, 0x00, 0x00, 0x0C, 0x00, 0x90, 0x9C,
+0x21, 0x12, 0x04, 0x3D, 0x00, 0x00, 0x0C, 0x00,
+0x7D, 0x18, 0x7C, 0x00, 0xE4, 0xFF, 0x91, 0x4C,
+0xD0, 0xD0, 0x92, 0xAF, 0x22, 0x7F, 0x00, 0x7E,
+0x08, 0x31, 0xA3, 0x90, 0x9C, 0x2F, 0x22, 0x7F,
+0x50, 0x7E, 0x0C, 0x12, 0x70, 0x70, 0x90, 0x9B,
+0x0B, 0xEF, 0xF0, 0x7F, 0x58, 0x7E, 0x0C, 0x12,
+0x70, 0x70, 0x90, 0x9B, 0x0C, 0xEF, 0xF0, 0x90,
+0x9C, 0x2F, 0x12, 0x04, 0x3D, 0x00, 0x00, 0x00,
+0x7F, 0x90, 0x9C, 0x33, 0x12, 0x04, 0x3D, 0x00,
+0x00, 0x00, 0x17, 0x7F, 0x50, 0x7E, 0x0C, 0x71,
+0x51, 0x12, 0x04, 0x3D, 0x00, 0x00, 0x00, 0x7F,
+0x90, 0x9C, 0x33, 0x12, 0x04, 0x3D, 0x00, 0x00,
+0x00, 0x17, 0x31, 0x9F, 0x90, 0x06, 0x08, 0xE0,
+0x90, 0x9B, 0x21, 0xF0, 0x90, 0x06, 0xA1, 0xE0,
+0xFE, 0x90, 0x06, 0xA0, 0x12, 0xC7, 0x8C, 0x90,
+0x9B, 0x23, 0xF0, 0xA3, 0xEF, 0xB1, 0x4C, 0x90,
+0x06, 0xA0, 0x74, 0x20, 0xF0, 0xA3, 0x74, 0x01,
+0xF0, 0xE4, 0xFD, 0xFF, 0x41, 0x02, 0x90, 0x93,
+0x04, 0x12, 0xB4, 0xA3, 0x30, 0xE0, 0x09, 0x12,
+0xCF, 0x70, 0xF0, 0xE4, 0x90, 0x9B, 0x25, 0xF0,
+0x90, 0x9C, 0x2F, 0x12, 0x04, 0x3D, 0x00, 0x00,
+0x00, 0x7F, 0x90, 0x9B, 0x0B, 0x12, 0xAF, 0x13,
+0x91, 0x36, 0x7F, 0x50, 0x7E, 0x0C, 0x71, 0x51,
+0x12, 0x04, 0x3D, 0x00, 0x00, 0x00, 0x7F, 0x90,
+0x9B, 0x0C, 0x12, 0xAF, 0x13, 0x91, 0x36, 0x31,
+0x9F, 0x90, 0x9B, 0x21, 0xE0, 0x90, 0x06, 0x08,
+0xF0, 0x90, 0x9B, 0x23, 0xA3, 0xE0, 0x90, 0x06,
+0xA0, 0xF0, 0xA3, 0xE4, 0xF0, 0x90, 0x9B, 0x0F,
+0xE0, 0xFF, 0x60, 0x05, 0xA3, 0xE0, 0xFD, 0x51,
+0x02, 0x90, 0x9B, 0x0E, 0xE0, 0xFF, 0x60, 0x0A,
+0xA3, 0xE0, 0xFD, 0xA3, 0xE0, 0xFB, 0xB1, 0x43,
+0x91, 0xC2, 0x22, 0x12, 0x03, 0xFE, 0x90, 0x9C,
+0x33, 0x02, 0x04, 0x31, 0x7F, 0x84, 0x7E, 0x08,
+0x31, 0xA3, 0x90, 0x9C, 0x1D, 0x22, 0x12, 0x82,
+0x12, 0x02, 0x81, 0xF8, 0xD3, 0x10, 0xAF, 0x01,
+0xC3, 0xC0, 0xD0, 0x90, 0x9C, 0x1B, 0xEC, 0xF0,
+0xA3, 0xED, 0xF0, 0x90, 0x9C, 0x1A, 0xEF, 0xF0,
+0xA3, 0xA3, 0xE0, 0xFD, 0x12, 0x7B, 0xBD, 0x90,
+0x9C, 0x25, 0x12, 0x04, 0x31, 0x90, 0x9C, 0x1D,
+0x12, 0x04, 0xB8, 0x12, 0x03, 0xCD, 0x90, 0x9C,
+0x25, 0x91, 0x46, 0xC0, 0x04, 0xC0, 0x05, 0xC0,
+0x06, 0xC0, 0x07, 0x90, 0x9C, 0x1D, 0x12, 0x04,
+0xB8, 0x90, 0x9C, 0x21, 0x91, 0x46, 0xD0, 0x03,
+0xD0, 0x02, 0xD0, 0x01, 0xD0, 0x00, 0x12, 0x82,
+0x05, 0x90, 0x9C, 0x29, 0x12, 0x04, 0x31, 0x90,
+0x9C, 0x1B, 0xA3, 0xE0, 0xFD, 0xC0, 0x05, 0x90,
+0x9C, 0x29, 0x12, 0x04, 0xB8, 0x90, 0x8B, 0x9F,
+0x12, 0x04, 0x31, 0x90, 0x9C, 0x1A, 0xE0, 0xFF,
+0xD0, 0x05, 0x12, 0x79, 0x53, 0xD0, 0xD0, 0x92,
+0xAF, 0x22, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0,
+0xD0, 0x90, 0x9C, 0xBB, 0xEF, 0xF0, 0xED, 0x64,
+0x01, 0x70, 0x2E, 0xEB, 0xB4, 0x01, 0x07, 0xE0,
+0x24, 0x02, 0xF5, 0x13, 0x80, 0x08, 0x90, 0x9C,
+0xBB, 0xE0, 0x24, 0xFE, 0xF5, 0x13, 0x90, 0x9C,
+0x1D, 0x12, 0x04, 0x3D, 0x00, 0x00, 0x00, 0xFF,
+0xAF, 0x13, 0xB1, 0x34, 0xB1, 0x2C, 0x12, 0x04,
+0x3D, 0x00, 0x00, 0x00, 0xFF, 0xAF, 0x13, 0x80,
+0x20, 0x90, 0x9C, 0x1D, 0x12, 0x04, 0x3D, 0x00,
+0x00, 0x00, 0xFF, 0x90, 0x9C, 0xBB, 0x12, 0xAF,
+0x13, 0xB1, 0x38, 0xB1, 0x2C, 0x12, 0x04, 0x3D,
+0x00, 0x00, 0x00, 0xFF, 0x90, 0x9C, 0xBB, 0xE0,
+0xFF, 0xB1, 0x34, 0x7F, 0x01, 0x91, 0x4C, 0xD0,
+0xD0, 0x92, 0xAF, 0x22, 0xE4, 0xFF, 0x91, 0x4C,
+0x90, 0x9C, 0x1D, 0x22, 0xE4, 0xFC, 0xFD, 0xFE,
+0x90, 0x9C, 0x21, 0x12, 0x04, 0x31, 0x7D, 0x18,
+0x7C, 0x00, 0x22, 0x90, 0x9B, 0x15, 0xE0, 0x90,
+0x9C, 0xBE, 0xF0, 0x22, 0xF0, 0x90, 0x06, 0x08,
+0xE0, 0x54, 0x7F, 0xF0, 0x22, 0xD3, 0x10, 0xAF,
+0x01, 0xC3, 0xC0, 0xD0, 0x90, 0x02, 0x09, 0xE0,
+0xFD, 0x12, 0x02, 0x06, 0xFF, 0x54, 0x01, 0xFE,
+0x90, 0x93, 0x04, 0xF1, 0x4C, 0xFC, 0xEF, 0x54,
+0xFB, 0x4C, 0xFF, 0x90, 0x93, 0x04, 0x12, 0x9F,
+0xE1, 0x54, 0x10, 0xFE, 0xEF, 0x54, 0xEF, 0x4E,
+0x90, 0x93, 0x04, 0xF0, 0x12, 0x9C, 0x5A, 0xFF,
+0xED, 0x2F, 0x90, 0x93, 0x05, 0x12, 0x87, 0xE6,
+0xFF, 0xED, 0x2F, 0x90, 0x93, 0x06, 0x12, 0x87,
+0xA3, 0xFF, 0xAE, 0x05, 0xED, 0x2F, 0x90, 0x93,
+0x07, 0xF0, 0x90, 0x93, 0x04, 0xE0, 0xFF, 0x20,
+0xE0, 0x08, 0x13, 0x13, 0x13, 0x54, 0x1F, 0x30,
+0xE0, 0x09, 0x90, 0x06, 0x31, 0xE0, 0x44, 0x40,
+0xF0, 0xD1, 0x19, 0x90, 0x93, 0x04, 0xE0, 0xFF,
+0x30, 0xE0, 0x3A, 0x90, 0x06, 0x32, 0xE0, 0x44,
+0x01, 0xF0, 0x90, 0x06, 0x09, 0xE0, 0x54, 0xFE,
+0xB1, 0x4C, 0xEF, 0x13, 0x13, 0x54, 0x3F, 0x30,
+0xE0, 0x0A, 0x12, 0xCF, 0x69, 0xF0, 0x90, 0x9B,
+0x25, 0x74, 0x01, 0xF0, 0x7D, 0x08, 0xE4, 0xFF,
+0x12, 0x7C, 0x74, 0xD1, 0x11, 0x20, 0xE0, 0x0D,
+0x90, 0x9C, 0x9B, 0x12, 0x04, 0x3D, 0x00, 0x00,
+0x27, 0x10, 0x12, 0x95, 0x30, 0xD1, 0x11, 0x30,
+0xE0, 0x0A, 0x90, 0x06, 0x32, 0xE0, 0x44, 0x02,
+0xF0, 0x12, 0x8E, 0xEA, 0xD0, 0xD0, 0x92, 0xAF,
+0x22, 0x90, 0x93, 0x04, 0xE0, 0xFF, 0xC3, 0x13,
+0x22, 0x90, 0x93, 0x06, 0xF1, 0x25, 0x12, 0x8E,
+0x9B, 0xE0, 0x90, 0x9B, 0x0D, 0xF0, 0x74, 0x01,
+0x2F, 0x12, 0xC3, 0xF0, 0xE0, 0x90, 0x9B, 0x0E,
+0xF1, 0x0B, 0x90, 0x9B, 0x0F, 0xF0, 0x74, 0x03,
+0x2F, 0xD1, 0x6D, 0xE0, 0x90, 0x9B, 0x10, 0xF1,
+0x18, 0x90, 0x9B, 0x11, 0xF0, 0x74, 0x05, 0x2F,
+0x12, 0xC7, 0xB0, 0xE0, 0x90, 0x9B, 0x12, 0xF0,
+0x74, 0x06, 0x2F, 0xD1, 0xF9, 0x90, 0x9B, 0x13,
+0xF0, 0x74, 0x07, 0x2F, 0xF1, 0x02, 0x90, 0x9B,
+0x14, 0xF0, 0x74, 0x08, 0x2F, 0x12, 0xCF, 0x9F,
+0x90, 0x9B, 0x15, 0xF0, 0x22, 0xF5, 0x82, 0xE4,
+0x34, 0xFC, 0xF5, 0x83, 0x22, 0xE4, 0xFD, 0xFC,
+0x90, 0x98, 0x41, 0xF1, 0x37, 0xAB, 0x05, 0x74,
+0x01, 0x2B, 0x12, 0xC3, 0xF0, 0xE0, 0xFE, 0x74,
+0x00, 0x2B, 0x12, 0x8E, 0x9B, 0xF1, 0x79, 0x3E,
+0x90, 0x95, 0x93, 0xF0, 0xA3, 0xEF, 0xF0, 0x74,
+0x03, 0x2B, 0xD1, 0x6D, 0xE0, 0xFE, 0x74, 0x02,
+0x2B, 0xF1, 0x0F, 0x24, 0x00, 0xFF, 0xEA, 0x3E,
+0x90, 0x95, 0x95, 0xF0, 0xA3, 0xEF, 0xF0, 0x74,
+0x05, 0x2B, 0x12, 0xC7, 0xB0, 0xE0, 0xFE, 0x74,
+0x04, 0x2B, 0xF1, 0x1C, 0x24, 0x00, 0xFF, 0xEA,
+0x3E, 0x90, 0x95, 0x97, 0xF0, 0xA3, 0xEF, 0xF0,
+0x74, 0x07, 0x2B, 0xF1, 0x02, 0xFE, 0x74, 0x06,
+0x2B, 0xD1, 0xF9, 0x24, 0x00, 0xFF, 0xEA, 0x3E,
+0x90, 0x95, 0x99, 0xF0, 0xA3, 0xEF, 0xF0, 0x74,
+0x09, 0x2B, 0x12, 0xCF, 0xA8, 0xFE, 0x74, 0x08,
+0x2B, 0x12, 0xCF, 0x9F, 0x24, 0x00, 0xFF, 0xEC,
+0x3E, 0x90, 0x95, 0x9B, 0xF0, 0xA3, 0xEF, 0xF0,
+0x22, 0xF5, 0x82, 0xE4, 0x34, 0xFC, 0xF5, 0x83,
+0xE0, 0x22, 0xF5, 0x82, 0xE4, 0x34, 0xFC, 0xF5,
+0x83, 0xE0, 0x22, 0xF0, 0x74, 0x02, 0x2F, 0xF5,
+0x82, 0xE4, 0x34, 0xFC, 0xF5, 0x83, 0xE0, 0x22,
+0xF0, 0x74, 0x04, 0x2F, 0xF5, 0x82, 0xE4, 0x34,
+0xFC, 0xF5, 0x83, 0xE0, 0x22, 0xE0, 0xFF, 0x12,
+0x7B, 0x07, 0x74, 0x00, 0x2F, 0x22, 0xEF, 0x60,
+0x05, 0xD1, 0x75, 0x12, 0x8D, 0xD1, 0x22, 0xE0,
+0xFF, 0x12, 0x7B, 0x07, 0x7C, 0x00, 0xAD, 0x07,
+0x22, 0x90, 0x88, 0x31, 0xE0, 0x30, 0xE0, 0x03,
+0x12, 0xBF, 0x8C, 0x22, 0xE0, 0x54, 0xFE, 0x4E,
+0xFE, 0xF0, 0xEF, 0x54, 0x02, 0xFF, 0xEE, 0x54,
+0xFD, 0x4F, 0xFF, 0xF0, 0x12, 0x02, 0x06, 0xFE,
+0x54, 0x04, 0x22, 0x74, 0x01, 0x2D, 0xF5, 0x82,
+0xE4, 0x34, 0xFB, 0xF5, 0x83, 0xE0, 0xFE, 0x74,
+0x00, 0x2D, 0xF5, 0x82, 0xE4, 0x34, 0xFB, 0xF5,
+0x83, 0xE0, 0x7A, 0x00, 0x24, 0x00, 0xFF, 0xEA,
+0x22, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0,
+0xE4, 0xFE, 0xFD, 0xEF, 0xB4, 0x01, 0x0D, 0xEB,
+0xB4, 0x02, 0x03, 0x0D, 0x80, 0x06, 0xEB, 0xB4,
+0x01, 0x02, 0x7D, 0x02, 0xAF, 0x06, 0xEF, 0xC4,
+0x54, 0xF0, 0x4D, 0xFF, 0xD0, 0xD0, 0x92, 0xAF,
+0x22, 0xE4, 0xFD, 0xFC, 0xEF, 0x60, 0x2F, 0x90,
+0x98, 0x3B, 0xF1, 0x37, 0x12, 0xF9, 0xEE, 0x90,
+0x99, 0xB1, 0x12, 0x82, 0x27, 0x90, 0x99, 0xB1,
+0x12, 0x8B, 0xE0, 0x75, 0x48, 0x40, 0x7B, 0x01,
+0x7A, 0x93, 0x79, 0xF9, 0x12, 0x69, 0xF5, 0x12,
+0xF3, 0x4E, 0xCE, 0xC3, 0x13, 0xCE, 0x13, 0xD8,
+0xF9, 0xF1, 0xDF, 0x12, 0x54, 0x1E, 0x22, 0xFF,
+0x12, 0x77, 0xA4, 0x7D, 0x01, 0x7F, 0x03, 0x22,
 0x90, 0x8A, 0x79, 0x74, 0x87, 0xF0, 0xA3, 0x74,
-0x4A, 0xF0, 0x90, 0x8A, 0xE5, 0x74, 0xD0, 0xF0,
-0xA3, 0x74, 0xA7, 0xF0, 0x90, 0x8B, 0x03, 0x74,
-0x98, 0xF0, 0xA3, 0x74, 0x17, 0xF0, 0x90, 0x8A,
+0x4A, 0xF0, 0x90, 0x8A, 0xE5, 0x74, 0xD9, 0xF0,
+0xA3, 0x74, 0x73, 0xF0, 0x90, 0x8B, 0x03, 0x74,
+0x98, 0xF0, 0xA3, 0x74, 0x1B, 0xF0, 0x90, 0x8A,
 0xB9, 0x74, 0x88, 0xF0, 0xA3, 0x74, 0xD2, 0xF0,
-0x90, 0x8A, 0x75, 0x74, 0xB3, 0xF0, 0xA3, 0x74,
-0x08, 0xF0, 0x90, 0x8A, 0xC3, 0x74, 0xE4, 0xF0,
-0xA3, 0x74, 0x33, 0xF0, 0x90, 0x8A, 0xF3, 0x74,
-0xE4, 0xF0, 0xA3, 0x74, 0x73, 0xF0, 0x90, 0x8A,
-0x85, 0x74, 0xE4, 0xF0, 0xA3, 0x74, 0x7F, 0xF0,
-0x90, 0x86, 0x0C, 0x74, 0xE1, 0xF0, 0xA3, 0x74,
-0x0D, 0xF0, 0x90, 0x8A, 0xEF, 0x74, 0xE1, 0xF0,
-0xA3, 0x74, 0x75, 0xF0, 0x90, 0x86, 0x00, 0x74,
-0xF4, 0xF0, 0xA3, 0x74, 0x93, 0xF0, 0x90, 0x86,
-0x02, 0x74, 0xF4, 0xF0, 0xA3, 0x74, 0xDF, 0xF0,
-0x90, 0x8A, 0xFD, 0x74, 0xE1, 0xF0, 0xA3, 0x74,
-0xF4, 0xF0, 0x90, 0x8A, 0xF9, 0x74, 0xB8, 0xF0,
-0xA3, 0x74, 0x51, 0xF0, 0x90, 0x8A, 0xAF, 0x74,
+0x90, 0x8A, 0x75, 0x74, 0xBB, 0xF0, 0xA3, 0x74,
+0x08, 0xF0, 0x90, 0x8A, 0xC3, 0x74, 0xDE, 0xF0,
+0xA3, 0x74, 0x57, 0xF0, 0x90, 0x8A, 0xF3, 0x74,
+0xE3, 0xF0, 0xA3, 0x74, 0x47, 0xF0, 0x90, 0x8A,
+0x85, 0x74, 0xE3, 0xF0, 0xA3, 0x74, 0x53, 0xF0,
+0x90, 0x86, 0x0C, 0x74, 0xDE, 0xF0, 0xA3, 0x74,
+0x87, 0xF0, 0x90, 0x8A, 0xEF, 0x74, 0xDE, 0xF0,
+0xA3, 0x74, 0xEF, 0xF0, 0x90, 0x86, 0x00, 0x74,
+0xF7, 0xF0, 0xA3, 0x74, 0x5D, 0xF0, 0x90, 0x86,
+0x02, 0x74, 0xF7, 0xF0, 0xA3, 0x74, 0xA9, 0xF0,
+0x90, 0x8A, 0xFD, 0x74, 0xDF, 0xF0, 0xA3, 0x74,
+0x67, 0xF0, 0x90, 0x8A, 0xF9, 0x74, 0xC0, 0xF0,
+0xA3, 0x74, 0x5A, 0xF0, 0x90, 0x8A, 0xAF, 0x74,
 0x8F, 0xF0, 0xA3, 0x74, 0x73, 0xF0, 0x90, 0x8A,
-0xD3, 0x74, 0xBE, 0xF0, 0xA3, 0x74, 0x98, 0xF0,
+0xD3, 0x74, 0xC6, 0xF0, 0xA3, 0x74, 0xA6, 0xF0,
 0x90, 0x8A, 0xF5, 0x74, 0xF8, 0xF0, 0xA3, 0x74,
-0x19, 0xF0, 0x90, 0x8A, 0xA3, 0x74, 0xF8, 0xF0,
-0xA3, 0x74, 0x6A, 0xF0, 0x90, 0x86, 0x06, 0x74,
-0xD8, 0xF0, 0xA3, 0x74, 0x0A, 0xF0, 0x22, 0x8F,
-0x12, 0x7F, 0x02, 0x12, 0x86, 0x27, 0x90, 0x86,
-0xAF, 0xE0, 0x45, 0x12, 0xF0, 0x22, 0x8F, 0x0E,
-0x7F, 0x02, 0x12, 0x86, 0x27, 0x90, 0x86, 0xB0,
-0xE0, 0x45, 0x0E, 0xF0, 0x22, 0x7F, 0x04, 0x80,
-0xED, 0xC0, 0xE0, 0xC0, 0xF0, 0xC0, 0x83, 0xC0,
-0x82, 0xC0, 0xD0, 0x75, 0xD0, 0x00, 0xC0, 0x00,
-0xC0, 0x01, 0xC0, 0x02, 0xC0, 0x03, 0xC0, 0x04,
-0xC0, 0x05, 0xC0, 0x06, 0xC0, 0x07, 0x90, 0x01,
-0xC4, 0x74, 0xC9, 0xF0, 0x74, 0xD0, 0xA3, 0xF0,
-0x12, 0x6C, 0xD6, 0xE5, 0x27, 0x30, 0xE4, 0x02,
-0x11, 0xC5, 0x90, 0x86, 0xB3, 0xE0, 0xFC, 0x64,
-0x03, 0x70, 0x37, 0x90, 0x99, 0xB0, 0xE0, 0xFE,
-0x20, 0xE0, 0x2F, 0xE5, 0x26, 0x30, 0xE3, 0x2A,
-0x90, 0x00, 0xCC, 0xE0, 0x44, 0x04, 0xF0, 0x90,
-0x00, 0xD4, 0xE0, 0x44, 0x10, 0xF0, 0x90, 0x00,
-0xC6, 0xE0, 0x44, 0x02, 0xF0, 0x90, 0x00, 0x01,
-0xE0, 0x54, 0xCF, 0xF0, 0x90, 0x00, 0x23, 0xE0,
-0x54, 0x7F, 0xF0, 0xEE, 0x44, 0x01, 0x90, 0x99,
-0xB0, 0xF0, 0xEC, 0xB4, 0x01, 0x0B, 0xE5, 0x26,
-0x30, 0xE2, 0x06, 0x90, 0x88, 0x41, 0x74, 0xDD,
-0xF0, 0x74, 0xC9, 0x04, 0x90, 0x01, 0xC4, 0xF0,
-0x74, 0xD0, 0xA3, 0xF0, 0xD0, 0x07, 0xD0, 0x06,
-0xD0, 0x05, 0xD0, 0x04, 0xD0, 0x03, 0xD0, 0x02,
-0xD0, 0x01, 0xD0, 0x00, 0xD0, 0xD0, 0xD0, 0x82,
-0xD0, 0x83, 0xD0, 0xF0, 0xD0, 0xE0, 0x32, 0xC0,
-0xE0, 0xC0, 0xF0, 0xC0, 0x83, 0xC0, 0x82, 0xC0,
-0xD0, 0x75, 0xD0, 0x00, 0xC0, 0x00, 0xC0, 0x01,
-0xC0, 0x02, 0xC0, 0x03, 0xC0, 0x04, 0xC0, 0x05,
-0xC0, 0x06, 0xC0, 0x07, 0x90, 0x01, 0xC4, 0x74,
-0x6F, 0xF0, 0x74, 0xD1, 0xA3, 0xF0, 0x12, 0x64,
-0x7F, 0xE5, 0x30, 0x30, 0xE1, 0x02, 0x51, 0x4D,
-0xE5, 0x2D, 0x30, 0xE3, 0x03, 0x12, 0xE3, 0x58,
-0xE5, 0x2D, 0x30, 0xE4, 0x02, 0xF1, 0xB5, 0xE5,
-0x2D, 0x30, 0xE5, 0x03, 0x12, 0xE3, 0x6B, 0xE5,
-0x2F, 0x30, 0xE0, 0x02, 0x51, 0x0F, 0xE5, 0x2F,
-0x30, 0xE1, 0x03, 0x12, 0xAD, 0x94, 0xE5, 0x2F,
-0x30, 0xE2, 0x02, 0xF1, 0xC6, 0xE5, 0x2F, 0x30,
-0xE3, 0x02, 0x51, 0xAF, 0xE5, 0x2F, 0x30, 0xE4,
-0x02, 0x71, 0x5F, 0xE5, 0x2F, 0x30, 0xE5, 0x02,
-0x71, 0xFE, 0xE5, 0x2F, 0x30, 0xE6, 0x02, 0x51,
-0xC6, 0x74, 0x6F, 0x04, 0x90, 0x01, 0xC4, 0xF0,
-0x74, 0xD1, 0xA3, 0xF0, 0xD0, 0x07, 0xD0, 0x06,
+0xBC, 0xF0, 0x90, 0x8A, 0xA3, 0x74, 0xB5, 0xF0,
+0xA3, 0x74, 0x4D, 0xF0, 0x90, 0x86, 0x06, 0x74,
+0xDD, 0xF0, 0xA3, 0x74, 0x49, 0xF0, 0x22, 0xE4,
+0xFB, 0xFA, 0xFD, 0x7F, 0x01, 0x12, 0x86, 0x4E,
+0x90, 0x9A, 0x33, 0xEF, 0xF0, 0x60, 0xF0, 0x90,
+0x86, 0xAF, 0xE0, 0xFF, 0x70, 0x04, 0xA3, 0xE0,
+0x60, 0xE5, 0xC2, 0xAF, 0xEF, 0x30, 0xE1, 0x0D,
+0x90, 0x86, 0xAF, 0xE0, 0x54, 0xFD, 0xF0, 0x90,
+0x86, 0x08, 0x12, 0x88, 0xC8, 0x31, 0x16, 0x30,
+0xE2, 0x09, 0x54, 0xFB, 0xF0, 0x90, 0x86, 0x0A,
+0x12, 0x88, 0xC8, 0x31, 0x16, 0xFF, 0x30, 0xE4,
+0x0C, 0x54, 0xEF, 0xF0, 0x12, 0xBF, 0xAC, 0xBF,
+0x01, 0x03, 0x12, 0xA8, 0xB1, 0x31, 0x16, 0xFF,
+0x30, 0xE7, 0x06, 0x54, 0x7F, 0xF0, 0x12, 0x95,
+0xAB, 0xD2, 0xAF, 0xC2, 0xAF, 0x90, 0x86, 0xB0,
+0xE0, 0xFF, 0x30, 0xE2, 0x05, 0x54, 0xFB, 0xF0,
+0x31, 0x1F, 0xD2, 0xAF, 0x80, 0xA1, 0xD2, 0xAF,
+0xC2, 0xAF, 0x90, 0x86, 0xAF, 0xE0, 0x22, 0x90,
+0x93, 0x2D, 0xE0, 0xC3, 0x13, 0x30, 0xE0, 0x3D,
+0x31, 0x66, 0x60, 0x0E, 0x12, 0xBF, 0x5E, 0xE4,
+0x90, 0x92, 0x20, 0xF0, 0xA3, 0x04, 0xF0, 0xE4,
+0x80, 0x22, 0x90, 0x93, 0x2D, 0x12, 0x97, 0xD1,
+0x30, 0xE0, 0x0B, 0xA3, 0xE0, 0x90, 0x92, 0x20,
+0xF0, 0xE4, 0xA3, 0xF0, 0x80, 0x0E, 0xE4, 0x90,
+0x92, 0x20, 0xF0, 0x90, 0x93, 0x2E, 0xE0, 0x90,
+0x92, 0x21, 0xF0, 0xE4, 0xFB, 0xFD, 0x7F, 0x5C,
+0x7E, 0x01, 0x12, 0x66, 0x33, 0x22, 0x7F, 0x60,
+0x12, 0x7B, 0x41, 0xEF, 0x54, 0x01, 0x90, 0x98,
+0x4A, 0xF0, 0x22, 0x8F, 0x12, 0x7F, 0x02, 0x12,
+0x86, 0x27, 0x90, 0x86, 0xAF, 0xE0, 0x45, 0x12,
+0xF0, 0x22, 0x8F, 0x0E, 0x7F, 0x02, 0x12, 0x86,
+0x27, 0x90, 0x86, 0xB0, 0xE0, 0x45, 0x0E, 0xF0,
+0x22, 0x7F, 0x04, 0x80, 0xED, 0xC0, 0xE0, 0xC0,
+0xF0, 0xC0, 0x83, 0xC0, 0x82, 0xC0, 0xD0, 0x75,
+0xD0, 0x00, 0xC0, 0x00, 0xC0, 0x01, 0xC0, 0x02,
+0xC0, 0x03, 0xC0, 0x04, 0xC0, 0x05, 0xC0, 0x06,
+0xC0, 0x07, 0x90, 0x01, 0xC4, 0x74, 0x95, 0xF0,
+0x74, 0xD9, 0xA3, 0xF0, 0x12, 0x6C, 0xD6, 0xE5,
+0x27, 0x30, 0xE4, 0x02, 0x31, 0x91, 0x90, 0x86,
+0xB3, 0xE0, 0xFC, 0x64, 0x03, 0x70, 0x37, 0x90,
+0x99, 0xB0, 0xE0, 0xFE, 0x20, 0xE0, 0x2F, 0xE5,
+0x26, 0x30, 0xE3, 0x2A, 0x90, 0x00, 0xCC, 0xE0,
+0x44, 0x04, 0xF0, 0x90, 0x00, 0xD4, 0xE0, 0x44,
+0x10, 0xF0, 0x90, 0x00, 0xC6, 0xE0, 0x44, 0x02,
+0xF0, 0x90, 0x00, 0x01, 0xE0, 0x54, 0xCF, 0xF0,
+0x90, 0x00, 0x23, 0xE0, 0x54, 0x7F, 0xF0, 0xEE,
+0x44, 0x01, 0x90, 0x99, 0xB0, 0xF0, 0xEC, 0xB4,
+0x01, 0x0B, 0xE5, 0x26, 0x30, 0xE2, 0x06, 0x90,
+0x88, 0x41, 0x74, 0xDD, 0xF0, 0x74, 0x95, 0x04,
+0x90, 0x01, 0xC4, 0xF0, 0x74, 0xD9, 0xA3, 0xF0,
+0xD0, 0x07, 0xD0, 0x06, 0xD0, 0x05, 0xD0, 0x04,
+0xD0, 0x03, 0xD0, 0x02, 0xD0, 0x01, 0xD0, 0x00,
+0xD0, 0xD0, 0xD0, 0x82, 0xD0, 0x83, 0xD0, 0xF0,
+0xD0, 0xE0, 0x32, 0xC0, 0xE0, 0xC0, 0xF0, 0xC0,
+0x83, 0xC0, 0x82, 0xC0, 0xD0, 0x75, 0xD0, 0x00,
+0xC0, 0x00, 0xC0, 0x01, 0xC0, 0x02, 0xC0, 0x03,
+0xC0, 0x04, 0xC0, 0x05, 0xC0, 0x06, 0xC0, 0x07,
+0x90, 0x01, 0xC4, 0x74, 0x3B, 0xF0, 0x74, 0xDA,
+0xA3, 0xF0, 0x12, 0x75, 0x50, 0xE5, 0x3D, 0x30,
+0xE0, 0x02, 0x91, 0xC9, 0xE5, 0x3D, 0x30, 0xE1,
+0x03, 0x12, 0xB7, 0xC1, 0xE5, 0x3D, 0x30, 0xE2,
+0x02, 0x51, 0xD7, 0xE5, 0x3D, 0x30, 0xE3, 0x03,
+0x12, 0xBE, 0xFB, 0xE5, 0x3E, 0x30, 0xE0, 0x03,
+0x12, 0x94, 0x9E, 0xE5, 0x40, 0x30, 0xE1, 0x0B,
+0x90, 0x8A, 0xE5, 0x12, 0x90, 0x47, 0x7F, 0x04,
+0x12, 0x04, 0x7E, 0xE5, 0x40, 0x30, 0xE4, 0x03,
+0x12, 0xB0, 0x7D, 0xE5, 0x40, 0x30, 0xE5, 0x02,
+0x71, 0x73, 0xE5, 0x40, 0x30, 0xE6, 0x02, 0x51,
+0xEF, 0x74, 0x3B, 0x04, 0x90, 0x01, 0xC4, 0xF0,
+0x74, 0xDA, 0xA3, 0xF0, 0xD0, 0x07, 0xD0, 0x06,
 0xD0, 0x05, 0xD0, 0x04, 0xD0, 0x03, 0xD0, 0x02,
 0xD0, 0x01, 0xD0, 0x00, 0xD0, 0xD0, 0xD0, 0x82,
-0xD0, 0x83, 0xD0, 0xF0, 0xD0, 0xE0, 0x32, 0x12,
-0x97, 0x6A, 0xE4, 0xFF, 0xD3, 0x10, 0xAF, 0x01,
-0xC3, 0xC0, 0xD0, 0x90, 0x88, 0x33, 0xE0, 0xC3,
-0x13, 0x30, 0xE0, 0x24, 0x90, 0x9B, 0xDA, 0x74,
-0x1E, 0xF0, 0x90, 0x9B, 0xFC, 0x74, 0x01, 0xF0,
-0x90, 0x9B, 0xDC, 0xEF, 0xF0, 0x7B, 0x01, 0x7A,
-0x9B, 0x79, 0xDA, 0xF1, 0xA6, 0x90, 0x8A, 0xE5,
-0x12, 0x90, 0x47, 0x7F, 0x04, 0x12, 0x04, 0x7E,
-0xD0, 0xD0, 0x92, 0xAF, 0x22, 0x90, 0x88, 0x36,
-0xE0, 0x60, 0x02, 0x51, 0x56, 0x22, 0x90, 0x88,
-0x39, 0xE0, 0xB4, 0x04, 0x03, 0x71, 0x48, 0xF0,
-0x02, 0x94, 0xCD, 0x71, 0xA2, 0x7D, 0x02, 0x7F,
-0x02, 0x12, 0x7C, 0x74, 0x7F, 0x01, 0x51, 0x14,
-0x90, 0x93, 0x08, 0xE0, 0x30, 0xE0, 0x37, 0xF1,
-0x70, 0x90, 0x93, 0x0B, 0xE0, 0x60, 0x0B, 0x14,
-0xF0, 0x90, 0x9B, 0x89, 0xE0, 0x70, 0x27, 0x02,
-0x79, 0xD4, 0xF1, 0x79, 0xE4, 0xFF, 0x12, 0xA8,
-0x30, 0x90, 0x93, 0x04, 0xE0, 0xFF, 0x20, 0xE0,
-0x08, 0x13, 0x13, 0x13, 0x54, 0x1F, 0x30, 0xE0,
-0x0D, 0x90, 0x9C, 0x9B, 0x12, 0x04, 0x3D, 0x00,
-0x00, 0x00, 0x01, 0x12, 0x94, 0xFF, 0x22, 0x12,
-0x97, 0xED, 0x70, 0x11, 0x90, 0x88, 0x36, 0xE0,
-0x60, 0x0B, 0x90, 0x88, 0x3A, 0xE0, 0x20, 0xE4,
-0x04, 0x71, 0x7F, 0x71, 0x8A, 0x22, 0xE4, 0xFF,
-0x12, 0x78, 0x4A, 0xBF, 0x01, 0x0F, 0x90, 0x88,
-0x36, 0xE0, 0x60, 0x09, 0x51, 0xDE, 0xF0, 0x54,
-0x07, 0x70, 0x02, 0x71, 0x4F, 0x22, 0x90, 0x88,
-0x3A, 0xE0, 0x54, 0xFE, 0x22, 0xE4, 0xF5, 0x0F,
-0x90, 0x06, 0xA9, 0xE0, 0xF5, 0x0F, 0x54, 0xC0,
-0x70, 0x12, 0x51, 0xDE, 0xF0, 0x54, 0xFD, 0xF0,
-0x71, 0x4F, 0x90, 0x88, 0x39, 0xE0, 0x60, 0x47,
-0x71, 0x48, 0xF0, 0x22, 0xE5, 0x0F, 0x30, 0xE6,
-0x22, 0x90, 0x88, 0x36, 0xE0, 0x64, 0x01, 0x70,
-0x1D, 0x90, 0x88, 0x3A, 0xE0, 0x44, 0x01, 0xF0,
-0x91, 0x1E, 0x64, 0x02, 0x60, 0x08, 0x90, 0x8A,
-0xE1, 0x12, 0x88, 0xC8, 0x80, 0x08, 0x12, 0x93,
-0xAB, 0x80, 0x03, 0x51, 0xDE, 0xF0, 0xE5, 0x0F,
-0x90, 0x88, 0x3A, 0x30, 0xE7, 0x0D, 0xE0, 0x44,
-0x02, 0x71, 0x8A, 0x90, 0x88, 0x31, 0xE0, 0x44,
-0x04, 0xF0, 0x22, 0xE0, 0x54, 0xFD, 0xF0, 0x22,
-0x90, 0x00, 0x02, 0xE0, 0x44, 0x01, 0x22, 0x90,
-0x88, 0x38, 0xE0, 0xFF, 0x90, 0x8A, 0xB9, 0x12,
-0xA5, 0xFA, 0x7D, 0x01, 0x02, 0x04, 0x7E, 0x12,
-0x97, 0xED, 0x70, 0x1A, 0x90, 0x88, 0x36, 0xE0,
-0x60, 0x14, 0x90, 0x88, 0x3A, 0xE0, 0x20, 0xE4,
-0x0D, 0x71, 0x7F, 0xF0, 0x90, 0x88, 0x31, 0xE0,
-0x91, 0xA2, 0x70, 0x02, 0x71, 0x4F, 0x22, 0x90,
-0x01, 0x57, 0xE4, 0xF0, 0x90, 0x01, 0x3C, 0x74,
-0x02, 0x22, 0xF0, 0xE4, 0x90, 0x92, 0x20, 0xF0,
-0x90, 0x88, 0x94, 0xE0, 0x90, 0x92, 0x21, 0xF0,
-0xE4, 0xFB, 0xFD, 0x7F, 0x54, 0x7E, 0x01, 0x02,
-0x66, 0x33, 0xE4, 0x90, 0x9B, 0x04, 0xF0, 0x90,
-0x88, 0x36, 0xE0, 0x60, 0x39, 0x12, 0x97, 0xED,
-0x70, 0x34, 0xF1, 0x50, 0xF0, 0x12, 0xF8, 0xC4,
-0x90, 0x9B, 0x04, 0x74, 0x01, 0xF0, 0xE4, 0x90,
-0x88, 0x3D, 0xF0, 0x04, 0x60, 0x20, 0x90, 0x88,
-0x39, 0xE0, 0x20, 0xE2, 0x0D, 0x90, 0x8A, 0xB9,
-0x12, 0x90, 0x47, 0x7D, 0x01, 0x7F, 0x04, 0x12,
-0x04, 0x7E, 0xF1, 0x58, 0xE4, 0x90, 0x92, 0x20,
-0xF0, 0x12, 0x97, 0xDB, 0x71, 0x94, 0x22, 0x90,
-0x88, 0x36, 0xE0, 0x60, 0x10, 0x90, 0x06, 0x92,
-0xE0, 0x30, 0xE1, 0x05, 0x91, 0x97, 0x02, 0x04,
-0x7A, 0xF1, 0x68, 0x71, 0x4F, 0x22, 0xE4, 0xFF,
-0x12, 0x78, 0x4A, 0xBF, 0x01, 0x17, 0x90, 0x88,
-0x36, 0xE0, 0x60, 0x11, 0x91, 0x1E, 0x64, 0x02,
-0x60, 0x08, 0x90, 0x8A, 0xE1, 0x91, 0x9A, 0x02,
-0x04, 0x7A, 0x12, 0x73, 0x8F, 0x22, 0x90, 0x88,
-0x34, 0xE0, 0x54, 0x0F, 0x22, 0x12, 0xAC, 0x3A,
-0x30, 0xE0, 0x0B, 0xEF, 0xC4, 0x13, 0x13, 0x54,
-0x03, 0x30, 0xE0, 0x02, 0xF1, 0x49, 0x90, 0x88,
-0x31, 0xD1, 0xBB, 0x30, 0xE0, 0x07, 0xEF, 0x91,
-0xA2, 0x70, 0x4B, 0x80, 0x47, 0x90, 0x88, 0x3F,
-0xE0, 0x04, 0xF0, 0x90, 0x88, 0x3A, 0xE0, 0x54,
-0xEF, 0xF0, 0xF1, 0x8E, 0x9F, 0x40, 0x35, 0x12,
-0x97, 0xED, 0x70, 0x32, 0x91, 0x1E, 0x70, 0x08,
-0x90, 0x8A, 0xF5, 0x12, 0x88, 0xC8, 0x80, 0x27,
-0x90, 0x8A, 0xF5, 0x12, 0x88, 0xC8, 0x90, 0x88,
-0x40, 0xE0, 0x04, 0xF0, 0xE0, 0xD3, 0x94, 0x02,
-0x40, 0x09, 0x91, 0x8F, 0xE4, 0x90, 0x88, 0x40,
-0xF0, 0x80, 0x03, 0x12, 0x93, 0xAB, 0xE4, 0x90,
-0x88, 0x3F, 0xF0, 0x22, 0x71, 0x4F, 0x22, 0x90,
-0x88, 0x32, 0xE0, 0x54, 0xFB, 0xF0, 0x22, 0x90,
-0x8B, 0x01, 0xE0, 0xFE, 0xA3, 0xE0, 0xAA, 0x06,
-0xF9, 0x22, 0x54, 0xFB, 0xF0, 0x90, 0x88, 0x3A,
-0xE0, 0x54, 0xFD, 0xF0, 0x54, 0x07, 0x22, 0x90,
-0x88, 0x31, 0xE0, 0xFF, 0x12, 0xA0, 0x9F, 0x30,
-0xE0, 0x1E, 0xEF, 0x54, 0x7F, 0xD1, 0xA6, 0x30,
+0xD0, 0x83, 0xD0, 0xF0, 0xD0, 0xE0, 0x32, 0x90,
+0x88, 0x36, 0xE0, 0x60, 0x11, 0x90, 0x06, 0x92,
+0xE0, 0x30, 0xE1, 0x05, 0x91, 0xD4, 0x02, 0x04,
+0x7A, 0x91, 0xC1, 0x12, 0xB6, 0x3B, 0x22, 0x90,
+0x88, 0x31, 0xE0, 0xFF, 0x12, 0xA8, 0xAA, 0x30,
+0xE0, 0x1F, 0xEF, 0x54, 0x7F, 0x91, 0x50, 0x30,
 0xE1, 0x06, 0xE0, 0x44, 0x02, 0xF0, 0x80, 0x08,
-0xE0, 0x54, 0xFD, 0xF0, 0xD1, 0xC2, 0x04, 0xF0,
-0x90, 0x88, 0x36, 0xE0, 0x60, 0x02, 0x71, 0x4F,
-0x7F, 0x01, 0x90, 0x98, 0x50, 0xE0, 0xFD, 0x30,
-0xE0, 0x4F, 0x90, 0x98, 0x55, 0xE0, 0xFC, 0x60,
-0x48, 0x12, 0xB4, 0x0B, 0x80, 0x05, 0xC3, 0x33,
-0xCE, 0x33, 0xCE, 0xD8, 0xF9, 0xFF, 0x90, 0x04,
-0xE0, 0xE0, 0xFB, 0xEF, 0x5B, 0x60, 0x0B, 0xE4,
-0x90, 0x98, 0x55, 0xF0, 0x90, 0x98, 0x57, 0x04,
-0xF0, 0x22, 0x90, 0x98, 0x52, 0xE0, 0xD3, 0x9C,
-0x50, 0x17, 0xED, 0x13, 0x13, 0x13, 0x54, 0x1F,
-0x30, 0xE0, 0x07, 0xD1, 0x9D, 0x12, 0x8F, 0xF3,
-0x80, 0x03, 0x12, 0xA7, 0x4E, 0xD1, 0x18, 0xF0,
-0x22, 0x90, 0x8A, 0xAF, 0x12, 0x90, 0x47, 0xD1,
-0xCC, 0x22, 0x90, 0x99, 0xAF, 0xE0, 0xB4, 0x01,
-0x20, 0xE4, 0xF0, 0x90, 0x01, 0x5B, 0xF0, 0x90,
-0x92, 0x20, 0xF0, 0x90, 0x88, 0x95, 0xE0, 0xC3,
-0x13, 0x54, 0x7F, 0x90, 0x92, 0x21, 0xF0, 0xE4,
-0xFB, 0xFD, 0x7F, 0x58, 0x7E, 0x01, 0x12, 0x66,
-0x33, 0x90, 0x88, 0x31, 0xF1, 0x60, 0x30, 0xE0,
-0x19, 0xEF, 0x54, 0xBF, 0xD1, 0xA6, 0x30, 0xE0,
-0x06, 0xE0, 0x44, 0x01, 0xF0, 0x80, 0x09, 0xE0,
-0x54, 0xFE, 0xF0, 0xD1, 0xC2, 0x74, 0x04, 0xF0,
-0x71, 0x4F, 0xE4, 0xFF, 0x81, 0xDA, 0xC0, 0xE0,
-0xC0, 0xF0, 0xC0, 0x83, 0xC0, 0x82, 0xC0, 0xD0,
-0x75, 0xD0, 0x00, 0xC0, 0x00, 0xC0, 0x01, 0xC0,
-0x02, 0xC0, 0x03, 0xC0, 0x04, 0xC0, 0x05, 0xC0,
-0x06, 0xC0, 0x07, 0x90, 0x01, 0xC4, 0x74, 0x7E,
-0xF0, 0x74, 0xD5, 0xA3, 0xF0, 0x12, 0x75, 0x50,
-0xE5, 0x3D, 0x30, 0xE0, 0x02, 0xF1, 0x83, 0xE5,
-0x3D, 0x30, 0xE1, 0x02, 0xD1, 0xAF, 0xE5, 0x3D,
-0x30, 0xE2, 0x02, 0x71, 0xE7, 0xE5, 0x3D, 0x30,
-0xE3, 0x03, 0x12, 0xC5, 0xE1, 0xE5, 0x3E, 0x30,
-0xE0, 0x03, 0x12, 0x94, 0x79, 0xE5, 0x40, 0x30,
-0xE1, 0x0B, 0x90, 0x8A, 0xE5, 0x12, 0x90, 0x47,
-0x7F, 0x04, 0x12, 0x04, 0x7E, 0xE5, 0x40, 0x30,
-0xE4, 0x02, 0x51, 0x63, 0xE5, 0x40, 0x30, 0xE5,
-0x02, 0xB1, 0x32, 0xE5, 0x40, 0x30, 0xE6, 0x02,
-0x91, 0xAF, 0x74, 0x7E, 0x04, 0x90, 0x01, 0xC4,
-0xF0, 0x74, 0xD5, 0xA3, 0xF0, 0xD0, 0x07, 0xD0,
-0x06, 0xD0, 0x05, 0xD0, 0x04, 0xD0, 0x03, 0xD0,
-0x02, 0xD0, 0x01, 0xD0, 0x00, 0xD0, 0xD0, 0xD0,
-0x82, 0xD0, 0x83, 0xD0, 0xF0, 0xD0, 0xE0, 0x32,
+0xE0, 0x54, 0xFD, 0xF0, 0x91, 0x59, 0x04, 0xF0,
+0x90, 0x88, 0x36, 0xE0, 0x60, 0x03, 0x12, 0xB6,
+0x3B, 0x7F, 0x01, 0x90, 0x98, 0x50, 0xE0, 0xFD,
+0x30, 0xE0, 0x4F, 0x90, 0x98, 0x55, 0xE0, 0xFC,
+0x60, 0x48, 0x12, 0xBC, 0x0B, 0x80, 0x05, 0xC3,
+0x33, 0xCE, 0x33, 0xCE, 0xD8, 0xF9, 0xFF, 0x90,
+0x04, 0xE0, 0xE0, 0xFB, 0xEF, 0x5B, 0x60, 0x0B,
+0xE4, 0x90, 0x98, 0x55, 0xF0, 0x90, 0x98, 0x57,
+0x04, 0xF0, 0x22, 0x90, 0x98, 0x52, 0xE0, 0xD3,
+0x9C, 0x50, 0x17, 0xED, 0x13, 0x13, 0x13, 0x54,
+0x1F, 0x30, 0xE0, 0x07, 0x91, 0x47, 0x12, 0x8F,
+0xF3, 0x80, 0x03, 0x12, 0xAD, 0x56, 0x71, 0xC0,
+0xF0, 0x22, 0x90, 0x8A, 0xAF, 0x12, 0x90, 0x47,
+0x91, 0x63, 0x22, 0x90, 0x99, 0xAF, 0xE0, 0xB4,
+0x01, 0x20, 0xE4, 0xF0, 0x90, 0x01, 0x5B, 0xF0,
+0x90, 0x92, 0x20, 0xF0, 0x90, 0x88, 0x95, 0xE0,
+0xC3, 0x13, 0x54, 0x7F, 0x90, 0x92, 0x21, 0xF0,
+0xE4, 0xFB, 0xFD, 0x7F, 0x58, 0x7E, 0x01, 0x12,
+0x66, 0x33, 0x90, 0x88, 0x31, 0x91, 0xB9, 0x30,
+0xE0, 0x1A, 0xEF, 0x54, 0xBF, 0x91, 0x50, 0x30,
+0xE0, 0x06, 0xE0, 0x44, 0x01, 0xF0, 0x80, 0x09,
+0xE0, 0x54, 0xFE, 0xF0, 0x91, 0x59, 0x74, 0x04,
+0xF0, 0x12, 0xB6, 0x3B, 0xE4, 0xFF, 0x61, 0x1B,
 0x90, 0x98, 0x50, 0xE0, 0x54, 0xFE, 0x22, 0x90,
-0x98, 0x50, 0xE0, 0x30, 0xE0, 0x76, 0x90, 0x98,
+0x98, 0x50, 0xE0, 0x30, 0xE0, 0x78, 0x90, 0x98,
 0x54, 0xE0, 0x04, 0xF0, 0x90, 0x98, 0x57, 0xE0,
-0x64, 0x01, 0x70, 0x2F, 0x90, 0x98, 0x50, 0xD1,
-0xBB, 0x30, 0xE0, 0x27, 0x90, 0x98, 0x56, 0xE0,
-0x70, 0x21, 0x90, 0x98, 0x53, 0xE0, 0xFE, 0xA3,
-0xE0, 0xC3, 0x9E, 0x40, 0x16, 0xF1, 0x42, 0x30,
-0xE0, 0x0A, 0xD1, 0x9D, 0x12, 0x8F, 0xF3, 0xD1,
-0x18, 0xF0, 0x80, 0x07, 0x12, 0xA7, 0x4E, 0xD1,
-0x18, 0xF0, 0x22, 0x90, 0x98, 0x54, 0xE0, 0xFF,
-0x90, 0x98, 0x51, 0xE0, 0xD3, 0x9F, 0x50, 0x2C,
-0x90, 0x06, 0x92, 0xE0, 0x20, 0xE2, 0x16, 0x90,
-0x98, 0x56, 0xE0, 0x70, 0x10, 0x90, 0x8A, 0xAF,
-0x12, 0x90, 0x47, 0xD1, 0xCC, 0x90, 0x98, 0x4F,
-0xE0, 0x04, 0xF0, 0x80, 0x06, 0x90, 0x06, 0x92,
-0x74, 0x04, 0xF0, 0xE4, 0x90, 0x98, 0x54, 0xF0,
-0x90, 0x98, 0x56, 0xF0, 0x22, 0xE4, 0xFD, 0xFF,
-0x12, 0x6E, 0x71, 0xE4, 0xFF, 0x22, 0xF0, 0x90,
-0x04, 0xE0, 0xE0, 0x90, 0x88, 0x32, 0x22, 0x90,
-0x88, 0x36, 0xE0, 0x60, 0x02, 0x91, 0x25, 0x22,
-0x90, 0x88, 0x32, 0xE0, 0xFF, 0x13, 0x13, 0x54,
-0x3F, 0x22, 0x90, 0x01, 0xB9, 0x74, 0x01, 0xF0,
-0x90, 0x01, 0xB8, 0x22, 0x7D, 0x08, 0xE4, 0xFF,
-0x12, 0x04, 0x7E, 0x90, 0x98, 0x55, 0xE0, 0x04,
-0xF0, 0x22, 0x90, 0x98, 0x4C, 0xD1, 0xBB, 0x30,
-0xE0, 0x0A, 0x12, 0xBF, 0xBE, 0xF1, 0x99, 0x04,
-0xF0, 0x02, 0x8B, 0xEA, 0x90, 0x8A, 0xAF, 0x12,
-0x90, 0x47, 0x7D, 0x08, 0xE4, 0xFF, 0x02, 0x04,
-0x7E, 0x90, 0x99, 0xB1, 0x12, 0x82, 0x27, 0x12,
-0xF2, 0xD3, 0x12, 0x8F, 0x6A, 0xFF, 0x54, 0x01,
-0xFE, 0xD1, 0x18, 0x4E, 0xF0, 0xEF, 0xC3, 0x13,
-0x30, 0xE0, 0x2E, 0x12, 0x9C, 0x54, 0x90, 0x98,
-0x51, 0x12, 0x87, 0xE6, 0x90, 0x98, 0x52, 0xF0,
-0x12, 0x02, 0x06, 0xFF, 0x54, 0x04, 0xFE, 0x90,
-0x98, 0x50, 0xE0, 0x54, 0xFB, 0x4E, 0x12, 0x87,
-0xA3, 0x90, 0x98, 0x53, 0xF0, 0xEF, 0x54, 0x08,
-0xFF, 0x90, 0x98, 0x50, 0xE0, 0x54, 0xF7, 0x4F,
-0xF0, 0x22, 0xEF, 0x13, 0x13, 0x13, 0x54, 0x1F,
-0x22, 0x7D, 0x02, 0x7F, 0x02, 0x02, 0x7C, 0x7E,
-0x90, 0x88, 0x3C, 0xE0, 0x90, 0x05, 0x73, 0x22,
-0x90, 0x88, 0x3A, 0xE0, 0x44, 0x10, 0xF0, 0x22,
-0xE0, 0xFF, 0xC4, 0x13, 0x13, 0x54, 0x03, 0x22,
-0x90, 0x88, 0x31, 0xE0, 0x54, 0xF7, 0xF0, 0x22,
-0x90, 0x93, 0x0A, 0xE0, 0x90, 0x05, 0x73, 0xF0,
-0x22, 0x90, 0x93, 0x09, 0xE0, 0x14, 0x90, 0x93,
-0x0B, 0xF0, 0x22, 0x90, 0x8A, 0xE5, 0x12, 0x90,
-0x47, 0x7F, 0x80, 0x02, 0x04, 0x7E, 0x90, 0x88,
-0x93, 0xE0, 0xFF, 0x90, 0x88, 0x3F, 0xE0, 0xD3,
-0x22, 0x90, 0x9C, 0x42, 0x12, 0x82, 0x27, 0xE4,
-0x90, 0x9C, 0x45, 0xF0, 0xA3, 0x22, 0x90, 0x8A,
-0x77, 0xE0, 0xFE, 0xA3, 0xE0, 0xFF, 0xF5, 0x82,
-0x8E, 0x83, 0x02, 0x04, 0x7E, 0x90, 0x8A, 0x75,
-0x12, 0x88, 0xC8, 0x90, 0x8A, 0xE5, 0x12, 0x90,
-0x47, 0x7F, 0x02, 0x02, 0x04, 0x7E, 0x90, 0x98,
-0x56, 0xE0, 0x04, 0xF0, 0x90, 0x88, 0x39, 0xE0,
-0x64, 0x02, 0x60, 0x03, 0x12, 0xAC, 0x45, 0x22,
-0x32, 0xC0, 0xE0, 0xC0, 0x83, 0xC0, 0x82, 0xC0,
-0xD0, 0x75, 0xD0, 0x00, 0xC0, 0x05, 0xC0, 0x07,
-0x7D, 0xD9, 0x90, 0x01, 0xC4, 0xED, 0xF0, 0x74,
-0xD7, 0xFF, 0xA3, 0xF0, 0xED, 0x04, 0x90, 0x01,
-0xC4, 0xF0, 0xA3, 0xEF, 0xF0, 0xD0, 0x07, 0xD0,
-0x05, 0xD0, 0xD0, 0xD0, 0x82, 0xD0, 0x83, 0xD0,
-0xE0, 0x32, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0,
-0xD0, 0x90, 0x9C, 0xB0, 0xED, 0xF0, 0xA3, 0xEB,
-0xF0, 0x90, 0x9C, 0xAF, 0xEF, 0xF0, 0xE4, 0xFD,
-0xFC, 0x12, 0xE4, 0x63, 0x90, 0x9C, 0xB2, 0xF0,
-0x71, 0x68, 0x90, 0x9C, 0xAF, 0xE0, 0x90, 0x04,
-0x25, 0xF0, 0x90, 0x9C, 0xB0, 0xE0, 0x60, 0x06,
-0x11, 0xB1, 0xE0, 0x44, 0x80, 0xF0, 0xAF, 0x05,
-0x74, 0x20, 0x2F, 0x31, 0xD5, 0x54, 0xC0, 0xF0,
-0x11, 0xB1, 0xE0, 0x54, 0xC0, 0xF0, 0x90, 0x9C,
+0x64, 0x01, 0x70, 0x31, 0x90, 0x98, 0x50, 0x12,
+0xB4, 0xA3, 0x30, 0xE0, 0x28, 0x90, 0x98, 0x56,
+0xE0, 0x70, 0x22, 0x90, 0x98, 0x53, 0xE0, 0xFE,
+0xA3, 0xE0, 0xC3, 0x9E, 0x40, 0x17, 0x12, 0xAF,
+0xEB, 0x30, 0xE0, 0x0A, 0x91, 0x47, 0x12, 0x8F,
+0xF3, 0x71, 0xC0, 0xF0, 0x80, 0x07, 0x12, 0xAD,
+0x56, 0x71, 0xC0, 0xF0, 0x22, 0x90, 0x98, 0x54,
+0xE0, 0xFF, 0x90, 0x98, 0x51, 0xE0, 0xD3, 0x9F,
+0x50, 0x2C, 0x90, 0x06, 0x92, 0xE0, 0x20, 0xE2,
+0x16, 0x90, 0x98, 0x56, 0xE0, 0x70, 0x10, 0x90,
+0x8A, 0xAF, 0x12, 0x90, 0x47, 0x91, 0x63, 0x90,
+0x98, 0x4F, 0xE0, 0x04, 0xF0, 0x80, 0x06, 0x90,
+0x06, 0x92, 0x74, 0x04, 0xF0, 0xE4, 0x90, 0x98,
+0x54, 0xF0, 0x90, 0x98, 0x56, 0xF0, 0x22, 0xE4,
+0xFD, 0xFF, 0x12, 0x6E, 0x71, 0xE4, 0xFF, 0x22,
+0xF0, 0x90, 0x04, 0xE0, 0xE0, 0x90, 0x88, 0x32,
+0x22, 0x90, 0x01, 0xB9, 0x74, 0x01, 0xF0, 0x90,
+0x01, 0xB8, 0x22, 0x7D, 0x08, 0xE4, 0xFF, 0x12,
+0x04, 0x7E, 0x90, 0x98, 0x55, 0xE0, 0x04, 0xF0,
+0x22, 0x90, 0x99, 0xB1, 0x12, 0x82, 0x27, 0x91,
+0xDF, 0x12, 0x8F, 0x6A, 0xFF, 0x54, 0x01, 0xFE,
+0x71, 0xC0, 0x4E, 0xF0, 0xEF, 0xC3, 0x13, 0x30,
+0xE0, 0x2E, 0x12, 0x9C, 0x5A, 0x90, 0x98, 0x51,
+0x12, 0x87, 0xE6, 0x90, 0x98, 0x52, 0xF0, 0x12,
+0x02, 0x06, 0xFF, 0x54, 0x04, 0xFE, 0x90, 0x98,
+0x50, 0xE0, 0x54, 0xFB, 0x4E, 0x12, 0x87, 0xA3,
+0x90, 0x98, 0x53, 0xF0, 0xEF, 0x54, 0x08, 0xFF,
+0x90, 0x98, 0x50, 0xE0, 0x54, 0xF7, 0x4F, 0xF0,
+0x22, 0xE0, 0xFF, 0xC4, 0x13, 0x13, 0x54, 0x03,
+0x22, 0x90, 0x88, 0x31, 0xE0, 0x54, 0xF7, 0xF0,
+0x22, 0x90, 0x8A, 0xE5, 0x12, 0x90, 0x47, 0x7F,
+0x80, 0x02, 0x04, 0x7E, 0x90, 0x8B, 0x01, 0xE0,
+0xFE, 0xA3, 0xE0, 0xAA, 0x06, 0xF9, 0x22, 0x12,
+0x9F, 0x90, 0x7B, 0x01, 0x7A, 0x98, 0x79, 0x50,
+0x12, 0x04, 0x80, 0x90, 0x98, 0x51, 0x74, 0x08,
+0xF0, 0xA3, 0x74, 0x03, 0xF0, 0x22, 0xE4, 0xFF,
+0x12, 0x78, 0x4A, 0xBF, 0x01, 0x18, 0x90, 0x88,
+0x36, 0xE0, 0x60, 0x12, 0x12, 0x97, 0xF3, 0x64,
+0x02, 0x60, 0x08, 0x90, 0x8A, 0xE1, 0x91, 0xD7,
+0x02, 0x04, 0x7A, 0x12, 0x73, 0x8F, 0x22, 0x32,
+0xC0, 0xE0, 0xC0, 0x83, 0xC0, 0x82, 0xC0, 0xD0,
+0x75, 0xD0, 0x00, 0xC0, 0x05, 0xC0, 0x07, 0x7D,
+0x18, 0x90, 0x01, 0xC4, 0xED, 0xF0, 0x74, 0xDD,
+0xFF, 0xA3, 0xF0, 0xED, 0x04, 0x90, 0x01, 0xC4,
+0xF0, 0xA3, 0xEF, 0xF0, 0xD0, 0x07, 0xD0, 0x05,
+0xD0, 0xD0, 0xD0, 0x82, 0xD0, 0x83, 0xD0, 0xE0,
+0x32, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0,
+0x90, 0x9C, 0xB0, 0xED, 0xF0, 0xA3, 0xEB, 0xF0,
+0x90, 0x9C, 0xAF, 0xEF, 0xF0, 0xE4, 0xFD, 0xFC,
+0xD1, 0x47, 0x90, 0x9C, 0xB2, 0xF0, 0x12, 0xD7,
+0x39, 0x90, 0x9C, 0xAF, 0xE0, 0x90, 0x04, 0x25,
+0xF0, 0x90, 0x9C, 0xB0, 0xE0, 0x60, 0x06, 0xB1,
+0xF2, 0xE0, 0x44, 0x80, 0xF0, 0xAF, 0x05, 0x74,
+0x20, 0x2F, 0x12, 0xCF, 0xBA, 0x54, 0xC0, 0xF0,
+0xB1, 0xF2, 0xE0, 0x54, 0xC0, 0xF0, 0x90, 0x9C,
 0xB2, 0xE0, 0xFF, 0xAE, 0x05, 0x74, 0x18, 0x2E,
-0x11, 0xFD, 0xEF, 0xF0, 0x90, 0x00, 0x8B, 0xE0,
-0xD3, 0x94, 0x03, 0x74, 0x10, 0x2E, 0x31, 0xCD,
-0x74, 0x04, 0xF0, 0xAF, 0x05, 0x11, 0xF2, 0xE0,
-0x54, 0x01, 0xFE, 0x90, 0x9C, 0xB1, 0xE0, 0x25,
-0xE0, 0x25, 0xE0, 0xFB, 0xEE, 0x44, 0x02, 0x4B,
-0x11, 0xF1, 0xEE, 0xF0, 0x74, 0x11, 0x2F, 0xF5,
-0x82, 0xE4, 0x34, 0xFC, 0xF5, 0x83, 0x74, 0xFF,
-0xF0, 0x74, 0x29, 0x2F, 0x12, 0xFA, 0xB4, 0x54,
-0xF7, 0xF0, 0x74, 0x0D, 0x2D, 0xF5, 0x82, 0xE4,
-0x34, 0xFC, 0xF5, 0x83, 0xE0, 0x44, 0x80, 0xF0,
-0xAE, 0x04, 0xAF, 0x05, 0xD0, 0xD0, 0x92, 0xAF,
-0x22, 0x74, 0x21, 0x2F, 0xF5, 0x82, 0xE4, 0x34,
-0xFC, 0xF5, 0x83, 0x22, 0x90, 0x9C, 0xA8, 0xE0,
-0xFE, 0xA3, 0xE0, 0xFF, 0x90, 0x8A, 0x9B, 0xE0,
-0xFC, 0xA3, 0xE0, 0xFD, 0xF5, 0x82, 0x8C, 0x83,
-0x12, 0x04, 0x7E, 0x90, 0x9C, 0xA8, 0xA3, 0xE0,
-0xFF, 0x24, 0x12, 0xF5, 0x82, 0xE4, 0x34, 0xFC,
-0xF5, 0x83, 0xE0, 0x54, 0x01, 0xFE, 0x90, 0x9C,
-0xA7, 0xE0, 0x25, 0xE0, 0x25, 0xE0, 0x44, 0x02,
-0x4E, 0xFE, 0x74, 0x12, 0x2F, 0xF5, 0x82, 0xE4,
-0x34, 0xFC, 0xF5, 0x83, 0x22, 0xF5, 0x82, 0xE4,
-0x34, 0xFC, 0xF5, 0x83, 0x22, 0x12, 0x7B, 0x07,
-0x7E, 0x00, 0xE4, 0xFD, 0xEF, 0x2D, 0x12, 0x8E,
-0x99, 0xE0, 0xFC, 0x74, 0x33, 0x2D, 0x12, 0xCF,
-0xE0, 0xEC, 0xF0, 0x0D, 0xED, 0xB4, 0x08, 0xEC,
-0xAC, 0x07, 0x74, 0x08, 0x2C, 0x51, 0x63, 0x64,
-0xDD, 0x60, 0x02, 0x21, 0xCC, 0x74, 0x09, 0x2C,
-0x71, 0x4B, 0xFC, 0x30, 0xE0, 0x1B, 0xE4, 0xFD,
-0xEF, 0x2D, 0x24, 0x10, 0x31, 0xCD, 0xE0, 0xFB,
-0x74, 0x6B, 0x2D, 0xF5, 0x82, 0xE4, 0x34, 0x95,
-0xF5, 0x83, 0xEB, 0xF0, 0x0D, 0xED, 0xB4, 0x08,
-0xE7, 0xEC, 0x30, 0xE1, 0x77, 0x74, 0x0A, 0x2F,
-0xF5, 0x82, 0xE4, 0x34, 0xFC, 0xF5, 0x83, 0xE0,
-0x90, 0x95, 0x63, 0xF0, 0xE4, 0xFD, 0xA9, 0x07,
-0xE9, 0x2D, 0xFC, 0x24, 0x18, 0x11, 0xFD, 0xE0,
-0xFB, 0x74, 0x73, 0x2D, 0xF5, 0x82, 0xE4, 0x34,
-0x95, 0xF5, 0x83, 0xEB, 0xF0, 0x74, 0x20, 0x2C,
-0x31, 0xD5, 0xFC, 0x74, 0x7B, 0x2D, 0xF5, 0x82,
-0xE4, 0x34, 0x95, 0xF5, 0x83, 0xEC, 0xF0, 0xE9,
-0x2D, 0xFC, 0x12, 0xFA, 0x04, 0xFB, 0x74, 0x83,
-0x2D, 0xF5, 0x82, 0xE4, 0x34, 0x95, 0xF5, 0x83,
-0xEB, 0xF0, 0x74, 0x30, 0x2C, 0xF5, 0x82, 0xE4,
-0x34, 0xFC, 0xF5, 0x83, 0xE0, 0xFC, 0x74, 0x8B,
-0x2D, 0xF5, 0x82, 0xE4, 0x34, 0x95, 0xF5, 0x83,
-0xEC, 0xF0, 0x0D, 0xED, 0xB4, 0x08, 0xA7, 0x90,
-0x95, 0x63, 0xE0, 0xFF, 0x7B, 0x01, 0x7A, 0x95,
-0x79, 0x43, 0x31, 0xDE, 0x22, 0xF5, 0x82, 0xE4,
-0x34, 0xFC, 0xF5, 0x83, 0x22, 0xF5, 0x82, 0xE4,
-0x34, 0xFC, 0xF5, 0x83, 0xE0, 0x22, 0x90, 0x99,
-0xB1, 0xEF, 0xF0, 0xA3, 0x12, 0x82, 0x27, 0xE4,
-0x90, 0x99, 0xB5, 0xF0, 0xF0, 0x90, 0x99, 0xB5,
-0xE0, 0xFF, 0xC3, 0x94, 0x04, 0x50, 0x2B, 0xEF,
-0x75, 0xF0, 0x04, 0xA4, 0xFF, 0x90, 0x99, 0xB2,
-0x12, 0x82, 0x1E, 0xE9, 0x2F, 0xF9, 0xEA, 0x35,
-0xF0, 0xFA, 0x90, 0x99, 0xB1, 0xE0, 0x75, 0xF0,
-0x08, 0xA4, 0x24, 0x02, 0xFF, 0x90, 0x99, 0xB5,
-0xE0, 0x2F, 0xFF, 0x51, 0x23, 0x12, 0xB9, 0x27,
-0x80, 0xCB, 0x22, 0x90, 0x99, 0xB6, 0x12, 0x82,
-0x27, 0x12, 0xFA, 0x69, 0x12, 0xFA, 0x5F, 0x12,
-0x7C, 0x6A, 0x90, 0x06, 0x78, 0x51, 0x5B, 0xEF,
-0x12, 0x02, 0x4C, 0x90, 0x06, 0x79, 0x51, 0x5B,
-0x90, 0x00, 0x01, 0xEF, 0x12, 0x02, 0x5E, 0x90,
-0x06, 0x7A, 0xE0, 0x90, 0x00, 0x02, 0x12, 0x02,
-0x5E, 0x90, 0x06, 0x7B, 0xE0, 0x90, 0x00, 0x03,
-0x02, 0x02, 0x5E, 0xE0, 0xFF, 0x90, 0x99, 0xB6,
-0x02, 0x82, 0x1E, 0xF5, 0x82, 0xE4, 0x34, 0xFC,
-0xF5, 0x83, 0xE0, 0x22, 0x90, 0x93, 0x06, 0x12,
-0xFA, 0xC6, 0x12, 0x8E, 0x9B, 0xE0, 0x90, 0x9B,
-0x0D, 0xF0, 0x74, 0x01, 0x2F, 0x12, 0xBB, 0xE3,
-0xE0, 0x90, 0x9B, 0x0E, 0x71, 0x70, 0x90, 0x9B,
-0x0F, 0xF0, 0x74, 0x03, 0x2F, 0x71, 0x43, 0xE0,
-0x90, 0x9B, 0x10, 0x71, 0x7D, 0x90, 0x9B, 0x11,
-0xF0, 0x74, 0x05, 0x2F, 0x12, 0xBF, 0xB6, 0xE0,
-0x90, 0x9B, 0x12, 0xF0, 0x74, 0x06, 0x2F, 0x71,
-0x54, 0x90, 0x9B, 0x13, 0xF0, 0x74, 0x07, 0x2F,
-0x71, 0x5D, 0x90, 0x9B, 0x14, 0xF0, 0x74, 0x08,
-0x2F, 0x51, 0x63, 0x90, 0x9B, 0x15, 0xF0, 0x22,
-0xE4, 0xFD, 0xFC, 0x90, 0x98, 0x41, 0x71, 0x66,
-0xAB, 0x05, 0x74, 0x01, 0x2B, 0x12, 0xBB, 0xE3,
-0xE0, 0xFE, 0x74, 0x00, 0x2B, 0x12, 0x8E, 0x9B,
-0x12, 0xCF, 0xC7, 0x3E, 0x90, 0x95, 0x93, 0xF0,
-0xA3, 0xEF, 0xF0, 0x74, 0x03, 0x2B, 0x71, 0x43,
-0xE0, 0xFE, 0x74, 0x02, 0x2B, 0x71, 0x74, 0x24,
-0x00, 0xFF, 0xEA, 0x3E, 0x90, 0x95, 0x95, 0xF0,
-0xA3, 0xEF, 0xF0, 0x74, 0x05, 0x2B, 0x12, 0xBF,
-0xB6, 0xE0, 0xFE, 0x74, 0x04, 0x2B, 0x71, 0x81,
-0x24, 0x00, 0xFF, 0xEA, 0x3E, 0x90, 0x95, 0x97,
-0xF0, 0xA3, 0xEF, 0xF0, 0x74, 0x07, 0x2B, 0x71,
-0x5D, 0xFE, 0x74, 0x06, 0x2B, 0x71, 0x54, 0x24,
-0x00, 0xFF, 0xEA, 0x3E, 0x90, 0x95, 0x99, 0xF0,
-0xA3, 0xEF, 0xF0, 0x74, 0x09, 0x2B, 0x71, 0x4B,
-0xFE, 0x74, 0x08, 0x2B, 0x51, 0x63, 0x24, 0x00,
-0xFF, 0xEC, 0x3E, 0x90, 0x95, 0x9B, 0xF0, 0xA3,
-0xEF, 0xF0, 0x22, 0xF5, 0x82, 0xE4, 0x34, 0xFC,
-0xF5, 0x83, 0x22, 0xF5, 0x82, 0xE4, 0x34, 0xFC,
-0xF5, 0x83, 0xE0, 0x22, 0xF5, 0x82, 0xE4, 0x34,
-0xFC, 0xF5, 0x83, 0xE0, 0x22, 0xF5, 0x82, 0xE4,
-0x34, 0xFC, 0xF5, 0x83, 0xE0, 0x22, 0xE0, 0xFF,
-0x12, 0x7B, 0x07, 0x7C, 0x00, 0xAD, 0x07, 0x22,
-0xF0, 0x74, 0x02, 0x2F, 0xF5, 0x82, 0xE4, 0x34,
-0xFC, 0xF5, 0x83, 0xE0, 0x22, 0xF0, 0x74, 0x04,
+0x12, 0xCF, 0x87, 0xEF, 0xF0, 0x90, 0x00, 0x8B,
+0xE0, 0xD3, 0x94, 0x03, 0x74, 0x10, 0x2E, 0x12,
+0xCF, 0x8F, 0x74, 0x04, 0xF0, 0xAF, 0x05, 0xD1,
+0x33, 0xE0, 0x54, 0x01, 0xFE, 0x90, 0x9C, 0xB1,
+0xE0, 0x25, 0xE0, 0x25, 0xE0, 0xFB, 0xEE, 0x44,
+0x02, 0x4B, 0xD1, 0x32, 0xEE, 0xF0, 0x74, 0x11,
 0x2F, 0xF5, 0x82, 0xE4, 0x34, 0xFC, 0xF5, 0x83,
-0xE0, 0x22, 0xE4, 0xFD, 0xFC, 0xEF, 0x60, 0x2E,
-0x90, 0x98, 0x3B, 0x71, 0x66, 0x12, 0xF9, 0x49,
-0x90, 0x99, 0xB1, 0x12, 0x82, 0x27, 0x90, 0x99,
-0xB1, 0x12, 0x8B, 0xE0, 0x75, 0x48, 0x40, 0x7B,
-0x01, 0x7A, 0x93, 0x79, 0xF9, 0x12, 0x69, 0xF5,
-0x71, 0xBF, 0xCE, 0xC3, 0x13, 0xCE, 0x13, 0xD8,
-0xF9, 0xB1, 0x8C, 0x12, 0x54, 0x1E, 0x22, 0xE4,
-0xFD, 0x7F, 0x03, 0x12, 0x54, 0x1E, 0x90, 0x98,
-0x3C, 0xE0, 0x75, 0xF0, 0x80, 0xA4, 0xAE, 0xF0,
-0x78, 0x03, 0x22, 0xD3, 0x10, 0xAF, 0x01, 0xC3,
-0xC0, 0xD0, 0x90, 0x9C, 0x52, 0xED, 0xF0, 0x90,
-0x9C, 0x51, 0xEF, 0xF0, 0x12, 0x7B, 0x07, 0x90,
-0x9C, 0x5F, 0xEF, 0xF0, 0xE0, 0xFD, 0x24, 0x01,
-0x12, 0xBB, 0xE3, 0xE0, 0xFE, 0x74, 0x00, 0x2D,
-0x12, 0x8E, 0x9B, 0x12, 0xBF, 0x7E, 0x54, 0x3F,
-0x90, 0x9C, 0x5C, 0xF0, 0xA3, 0xEF, 0xF0, 0xE4,
-0x90, 0x9C, 0x5B, 0xF0, 0xB1, 0x23, 0x50, 0x0A,
-0xB1, 0x42, 0x12, 0x8E, 0x98, 0xE4, 0xB1, 0x0B,
-0x80, 0xF2, 0x90, 0x9C, 0x5D, 0xE0, 0x24, 0xF8,
-0xFB, 0x90, 0x9C, 0x5C, 0xE0, 0x34, 0xFF, 0xFA,
-0x90, 0x9C, 0x52, 0xE0, 0xFF, 0x90, 0x91, 0xDC,
-0xE4, 0xF0, 0xA3, 0xEF, 0xF0, 0xA3, 0x74, 0x01,
-0xF0, 0x7D, 0x0A, 0x7C, 0x00, 0x7F, 0x10, 0x7E,
-0x00, 0x12, 0x6D, 0xED, 0x90, 0x98, 0x3B, 0xE0,
-0xFF, 0x90, 0x9C, 0x51, 0xE0, 0xFD, 0xD3, 0x9F,
-0x40, 0x36, 0x90, 0x98, 0x3B, 0xE0, 0xFC, 0x71,
-0xCA, 0xCE, 0xC3, 0x13, 0xCE, 0x13, 0xD8, 0xF9,
-0xB1, 0x2C, 0xEC, 0xFF, 0xC3, 0xED, 0xB1, 0x38,
-0xC3, 0x33, 0xCE, 0x33, 0xCE, 0xD8, 0xF9, 0x24,
-0x28, 0xFF, 0xE4, 0x3E, 0xFE, 0xB1, 0x1B, 0xFD,
-0x90, 0x9C, 0x52, 0xE0, 0xFC, 0xC3, 0xED, 0x9C,
-0xB1, 0x13, 0x7D, 0x38, 0x7C, 0x00, 0x80, 0x35,
-0x90, 0x9C, 0x51, 0xE0, 0xFD, 0x71, 0xCA, 0xCE,
-0xC3, 0x13, 0xCE, 0x13, 0xD8, 0xF9, 0xB1, 0x2C,
-0xED, 0xFF, 0x90, 0x98, 0x3B, 0xB1, 0x36, 0xC3,
-0x33, 0xCE, 0x33, 0xCE, 0xD8, 0xF9, 0x24, 0x38,
-0xFD, 0xE4, 0x3E, 0xFC, 0xB1, 0x1B, 0xFF, 0x90,
-0x9C, 0x52, 0xE0, 0xFE, 0xC3, 0xEF, 0x9E, 0xB1,
-0x13, 0x7F, 0x28, 0x7E, 0x00, 0x12, 0x71, 0xD4,
-0x12, 0xBF, 0xBE, 0x90, 0x91, 0x45, 0x12, 0x82,
-0x27, 0x0B, 0x7A, 0x9C, 0x79, 0x53, 0x90, 0x91,
-0x48, 0x12, 0x82, 0x27, 0x90, 0x91, 0x4B, 0x74,
-0x08, 0xF0, 0x7A, 0x94, 0x79, 0x31, 0x12, 0x4E,
-0xA5, 0xE4, 0x90, 0x9C, 0x5B, 0xF0, 0xB1, 0x23,
-0x50, 0x1C, 0xB1, 0x42, 0x90, 0x9C, 0x5B, 0xE0,
-0x24, 0x53, 0xF5, 0x82, 0xE4, 0x34, 0x9C, 0xF5,
-0x83, 0xE0, 0xFF, 0x90, 0x9C, 0x5E, 0x12, 0x8E,
-0x98, 0xEF, 0xB1, 0x0B, 0x80, 0xE0, 0xD0, 0xD0,
-0x92, 0xAF, 0x22, 0xF0, 0x90, 0x9C, 0x5B, 0xE0,
-0x04, 0xF0, 0x22, 0xFB, 0x90, 0x92, 0x06, 0x74,
-0x08, 0xF0, 0x22, 0x90, 0x9C, 0x5C, 0xA3, 0xE0,
-0x24, 0xF8, 0x22, 0x90, 0x9C, 0x5B, 0xE0, 0xFF,
-0xC3, 0x94, 0x08, 0x22, 0xFF, 0x90, 0x92, 0x07,
-0xEE, 0xF0, 0xA3, 0xEF, 0xF0, 0x22, 0xE0, 0xC3,
-0x9F, 0xFF, 0xE4, 0x94, 0x00, 0xFE, 0xEF, 0x78,
-0x07, 0x22, 0x90, 0x9C, 0x5F, 0xE0, 0xFD, 0x90,
-0x9C, 0x5D, 0xE0, 0x2D, 0xFD, 0x90, 0x9C, 0x5C,
-0xE0, 0x34, 0x00, 0xCD, 0x24, 0x20, 0xCD, 0x34,
-0x00, 0xFC, 0x7E, 0x00, 0xED, 0x2F, 0xFF, 0xEE,
-0x3C, 0xFE, 0x90, 0x9C, 0x51, 0xE0, 0xFD, 0x12,
-0x7B, 0x8B, 0x90, 0x9C, 0x5E, 0xEF, 0xF0, 0x22,
-0xE4, 0xFD, 0x7F, 0x03, 0x12, 0x54, 0x1E, 0x90,
-0x01, 0x85, 0xE0, 0x54, 0xFE, 0xF0, 0x71, 0xBF,
-0xCE, 0xC3, 0x13, 0xCE, 0x13, 0xD8, 0xF9, 0xB1,
-0x8C, 0x02, 0x54, 0x1E, 0xFF, 0x12, 0x77, 0xA4,
-0x7D, 0x01, 0x7F, 0x03, 0x22, 0x90, 0x9A, 0x3F,
-0x12, 0xF1, 0xCA, 0xB1, 0x70, 0x12, 0xFA, 0xE1,
-0x12, 0xED, 0x93, 0x12, 0xFA, 0xE1, 0xA3, 0xE0,
-0xFD, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0,
-0x90, 0x9A, 0x42, 0x12, 0xF1, 0xCA, 0x90, 0x9A,
-0x5A, 0x74, 0x18, 0xF0, 0x7E, 0x00, 0x7F, 0x80,
-0x7D, 0x00, 0x7B, 0x01, 0x7A, 0x9A, 0x79, 0x62,
-0x12, 0x04, 0x80, 0x90, 0x98, 0x3A, 0xE0, 0xFF,
-0x12, 0x7B, 0x07, 0x90, 0x9A, 0x59, 0xEF, 0xF0,
-0xF9, 0xE0, 0xFE, 0x24, 0x29, 0xF5, 0x82, 0xE4,
-0x34, 0xFC, 0xF5, 0x83, 0x74, 0x41, 0xF0, 0xEE,
-0x24, 0x28, 0xFD, 0xE4, 0x33, 0xFC, 0x90, 0x9A,
-0x5A, 0xE0, 0x7A, 0x00, 0x2D, 0xFE, 0xEA, 0x3C,
-0x90, 0x9A, 0x5E, 0xF0, 0xA3, 0xCE, 0xF0, 0x74,
-0x28, 0x29, 0xF9, 0xE4, 0x34, 0xFC, 0xFA, 0x7B,
-0x01, 0x90, 0x9A, 0x44, 0xE0, 0xFD, 0x12, 0xF0,
-0x6E, 0x12, 0xF8, 0xB0, 0x90, 0x9A, 0x5E, 0xE0,
-0xFF, 0xA3, 0xE0, 0x90, 0x9A, 0x5C, 0xCF, 0xF0,
-0xA3, 0xEF, 0xF0, 0x90, 0x9A, 0x62, 0x74, 0x01,
-0xF0, 0xA3, 0x74, 0x03, 0xF0, 0xE4, 0xA3, 0xF0,
-0xA3, 0x74, 0x5F, 0xF0, 0x90, 0x9A, 0x5E, 0xE4,
-0x75, 0xF0, 0x04, 0x12, 0x02, 0xE7, 0x90, 0x94,
-0x3D, 0xE0, 0xFF, 0x7E, 0x02, 0xB4, 0xFE, 0x02,
-0x7E, 0xFE, 0x90, 0x9A, 0x5E, 0xA3, 0xE0, 0xFD,
-0x12, 0x8E, 0x99, 0xEE, 0xF0, 0x74, 0x00, 0x2D,
-0x12, 0x8E, 0x9B, 0xE0, 0x90, 0x9A, 0x66, 0xF0,
-0x90, 0x9A, 0x5E, 0x12, 0xBF, 0x87, 0x90, 0x95,
-0x32, 0xE0, 0x90, 0x9A, 0x42, 0xB4, 0x01, 0x0B,
-0xE0, 0x44, 0x03, 0xFC, 0xA3, 0xE0, 0x44, 0x10,
-0xFD, 0x80, 0x09, 0xE0, 0x44, 0x03, 0xFC, 0xA3,
-0xE0, 0x44, 0x20, 0xFD, 0x90, 0x9A, 0x60, 0xEC,
-0xF0, 0xA3, 0xED, 0xF0, 0x90, 0x9A, 0x42, 0xE0,
-0x70, 0x04, 0xA3, 0xE0, 0x64, 0x01, 0x90, 0x9A,
-0x5E, 0x70, 0x18, 0xA3, 0xE0, 0xFE, 0x12, 0x8E,
-0x99, 0x12, 0xBB, 0xDD, 0x74, 0x01, 0xF0, 0x90,
-0x9A, 0x67, 0x74, 0x03, 0xF0, 0xA3, 0x74, 0x01,
-0xF0, 0x80, 0x14, 0xA3, 0xE0, 0xFE, 0x12, 0x8E,
-0x99, 0x12, 0xBB, 0xDD, 0x74, 0x02, 0xF0, 0x90,
-0x9A, 0x67, 0x04, 0xF0, 0xA3, 0x14, 0xF0, 0x12,
-0xFA, 0x1A, 0xEF, 0x64, 0xFE, 0x90, 0x9A, 0x5E,
-0x70, 0x21, 0xA3, 0xE0, 0x24, 0x00, 0x12, 0xF9,
-0x4C, 0xC0, 0x03, 0x8B, 0x45, 0x12, 0xFA, 0x73,
-0xD0, 0x03, 0x12, 0xEF, 0xDB, 0x12, 0xFA, 0x73,
-0x7B, 0x01, 0x7A, 0x9A, 0x79, 0x69, 0x12, 0x69,
-0xF5, 0x80, 0x22, 0xE0, 0xFE, 0xA3, 0xE0, 0xFF,
-0x24, 0x00, 0xF5, 0x82, 0x74, 0xFC, 0x3E, 0xF5,
-0x83, 0xE4, 0xF0, 0x74, 0x01, 0x2F, 0xF5, 0x82,
-0x74, 0xFC, 0x3E, 0xF5, 0x83, 0xE4, 0xF0, 0x90,
-0x9A, 0x69, 0xF0, 0xA3, 0xF0, 0x12, 0xFA, 0x1A,
-0xE4, 0x90, 0x9A, 0x5B, 0xF0, 0x12, 0xF9, 0x7A,
-0xFE, 0x90, 0x9A, 0x5E, 0xA3, 0xE0, 0xFD, 0xEF,
-0x2D, 0x12, 0x8E, 0x99, 0xEE, 0xF0, 0x12, 0xF9,
-0x7A, 0xFE, 0x74, 0x6B, 0x2F, 0xF5, 0x82, 0xE4,
-0x34, 0x9A, 0xF5, 0x83, 0xEE, 0x12, 0xE0, 0xD1,
-0xF0, 0xE0, 0xB4, 0x08, 0xD8, 0x12, 0xF8, 0xBA,
-0x90, 0x9A, 0x5E, 0x12, 0xBF, 0xCC, 0x90, 0x9A,
-0x5E, 0x12, 0xBF, 0xC5, 0x12, 0xF8, 0xB0, 0xE4,
-0x90, 0x9A, 0xE5, 0xF0, 0xE4, 0x90, 0x9A, 0x5B,
-0xF0, 0x12, 0xE0, 0xE8, 0x50, 0x14, 0x12, 0xE0,
-0xFB, 0xA3, 0x12, 0xE0, 0xC2, 0x12, 0xE0, 0xF1,
-0x12, 0x8E, 0x98, 0xE4, 0x12, 0xE0, 0xD1, 0xF0,
-0x80, 0xE7, 0x12, 0xFB, 0x3F, 0x90, 0x06, 0x31,
-0xE0, 0x54, 0xFB, 0xF0, 0x90, 0x98, 0x3B, 0xE0,
-0xFD, 0x71, 0xCA, 0xCE, 0xC3, 0x13, 0xCE, 0x13,
-0xD8, 0xF9, 0xB1, 0x2C, 0xED, 0xFF, 0x90, 0x98,
-0x3A, 0xB1, 0x36, 0xC3, 0x33, 0xCE, 0x33, 0xCE,
-0xD8, 0xF9, 0xFF, 0x90, 0x9A, 0x5A, 0xE0, 0x7C,
-0x00, 0x2F, 0xFF, 0xEC, 0x3E, 0xCF, 0x24, 0x38,
-0xCF, 0x34, 0x00, 0xFE, 0x90, 0x92, 0x06, 0x74,
-0x10, 0xF0, 0x7B, 0x63, 0xE4, 0xFD, 0x12, 0x71,
-0xD4, 0x90, 0x9A, 0x42, 0xE0, 0x70, 0x04, 0xA3,
-0xE0, 0x64, 0x01, 0x7B, 0x01, 0x7A, 0x9A, 0x79,
-0x62, 0x70, 0x17, 0x90, 0x91, 0xA0, 0x12, 0xE0,
-0xE0, 0x90, 0x91, 0xA3, 0x12, 0x82, 0x27, 0x90,
-0x91, 0xA6, 0x12, 0xE0, 0xD8, 0x12, 0x6F, 0x34,
-0x80, 0x15, 0x90, 0x91, 0x96, 0x12, 0xE0, 0xE0,
-0x90, 0x91, 0x99, 0x12, 0x82, 0x27, 0x90, 0x91,
-0x9C, 0x12, 0xE0, 0xD8, 0x12, 0x6E, 0xF3, 0x90,
-0x9A, 0xE5, 0xE0, 0x04, 0xF0, 0x90, 0x06, 0x31,
-0xE0, 0x30, 0xE2, 0x07, 0x11, 0xC9, 0x50, 0x03,
-0x02, 0xDF, 0x5C, 0x11, 0xC9, 0x40, 0x0A, 0x90,
-0x06, 0x35, 0xE0, 0x44, 0x20, 0x90, 0x06, 0x34,
-0xF0, 0xE4, 0x90, 0x9A, 0x5B, 0xF0, 0x11, 0xE8,
-0x50, 0x22, 0x11, 0xFB, 0xA3, 0x11, 0xC2, 0x11,
-0xF1, 0x90, 0x9A, 0x5B, 0xE0, 0x24, 0x45, 0xF5,
-0x82, 0xE4, 0x34, 0x9A, 0xF5, 0x83, 0xE0, 0xFF,
-0x90, 0x9A, 0x59, 0x12, 0x8E, 0x98, 0xEF, 0x11,
-0xD1, 0xF0, 0x80, 0xDA, 0x90, 0x9A, 0x42, 0xE0,
-0x70, 0x04, 0xA3, 0xE0, 0x64, 0x01, 0x70, 0x0F,
-0x90, 0x98, 0x3A, 0xE0, 0xFF, 0x90, 0x9A, 0x5A,
-0xE0, 0x24, 0x08, 0xFD, 0x12, 0xDB, 0xD3, 0x90,
-0x04, 0x1D, 0xE0, 0x60, 0x24, 0x90, 0x05, 0x22,
-0xE0, 0x90, 0x9A, 0xE4, 0xF0, 0x7B, 0x1D, 0x12,
-0x88, 0xBF, 0xBF, 0x01, 0x06, 0x11, 0xAD, 0x90,
-0x04, 0x25, 0xF0, 0x90, 0x9A, 0xE4, 0xE0, 0xFD,
-0x7B, 0x1E, 0xE4, 0xFF, 0x12, 0x8D, 0x1E, 0x80,
-0x06, 0x11, 0xAD, 0x90, 0x04, 0x25, 0xF0, 0x90,
-0x04, 0x1F, 0x74, 0x20, 0xF0, 0x90, 0x88, 0x39,
-0xE0, 0x70, 0x05, 0x7F, 0x01, 0x12, 0x78, 0xC0,
-0xD0, 0xD0, 0x92, 0xAF, 0x22, 0x90, 0x98, 0x3A,
-0xE0, 0xFF, 0x90, 0x92, 0x13, 0x74, 0x08, 0xF0,
-0x7B, 0x18, 0x7D, 0x01, 0x12, 0x66, 0xDB, 0x90,
-0x9A, 0x59, 0xEF, 0xF0, 0x90, 0x98, 0x3A, 0xE0,
-0x22, 0x90, 0x9A, 0xE5, 0xE0, 0xC3, 0x94, 0x0A,
-0x22, 0xF0, 0x90, 0x9A, 0x5B, 0xE0, 0x04, 0x22,
-0x74, 0x10, 0xF0, 0x7A, 0x93, 0x79, 0xF9, 0x22,
-0x12, 0x82, 0x27, 0x7A, 0x9A, 0x79, 0x45, 0x22,
-0x90, 0x9A, 0x5B, 0xE0, 0xFF, 0xC3, 0x94, 0x10,
-0x22, 0xFD, 0x12, 0x7B, 0x8B, 0x90, 0x9A, 0x59,
-0xEF, 0xF0, 0x22, 0x90, 0x9A, 0x5F, 0xE0, 0x2F,
-0xFF, 0x90, 0x9A, 0x5E, 0xE0, 0x34, 0x00, 0xFE,
-0x90, 0x9A, 0xE2, 0xF0, 0x22, 0xD3, 0x10, 0xAF,
-0x01, 0xC3, 0xC0, 0xD0, 0x31, 0x56, 0x90, 0x9C,
-0xB3, 0x12, 0x04, 0x31, 0x90, 0x9C, 0xB3, 0x12,
-0xC9, 0xAD, 0x7F, 0x30, 0x7E, 0x08, 0x12, 0x70,
-0xAD, 0x90, 0x01, 0x01, 0xE0, 0x44, 0x02, 0x31,
-0x4E, 0x90, 0x06, 0xB7, 0x74, 0x09, 0xF0, 0x90,
-0x06, 0xB4, 0x74, 0x86, 0xF0, 0x31, 0x63, 0xF0,
-0xE4, 0xFD, 0x12, 0x76, 0xF7, 0x12, 0xD3, 0x48,
-0xF0, 0xD0, 0xD0, 0x92, 0xAF, 0x22, 0xF0, 0x90,
-0x01, 0x00, 0x74, 0xFF, 0xF0, 0x22, 0x7F, 0x30,
-0x7E, 0x08, 0x12, 0x70, 0x70, 0xED, 0x44, 0x80,
-0xFD, 0xEC, 0x22, 0x90, 0x93, 0x46, 0xE0, 0xFF,
-0x90, 0x93, 0x45, 0xE0, 0xFB, 0x90, 0x93, 0x47,
-0xE0, 0x90, 0x92, 0x90, 0x22, 0xD3, 0x10, 0xAF,
-0x01, 0xC3, 0xC0, 0xD0, 0x31, 0x56, 0x90, 0x9C,
-0xB7, 0x12, 0x04, 0x31, 0x90, 0x9C, 0xB7, 0x12,
-0xC9, 0xAD, 0x7F, 0x30, 0x7E, 0x08, 0x12, 0x70,
-0xAD, 0x31, 0x63, 0xF0, 0x7D, 0x01, 0x12, 0x76,
-0xF7, 0x12, 0x88, 0xC5, 0x90, 0x06, 0xB7, 0x74,
-0x11, 0xF0, 0x7F, 0x03, 0x7E, 0x00, 0x12, 0x7C,
-0x6A, 0x90, 0x06, 0xB4, 0xE0, 0x54, 0x0F, 0x70,
-0xF1, 0x90, 0x07, 0xD5, 0xE0, 0x44, 0x80, 0xF0,
-0x7F, 0x0A, 0x80, 0x09, 0x90, 0x06, 0x62, 0xE0,
-0x30, 0xE0, 0x09, 0x7F, 0x01, 0x7E, 0x00, 0x12,
-0x7C, 0x6A, 0x80, 0xF0, 0x31, 0xEC, 0x90, 0x01,
-0x00, 0x74, 0x3F, 0xF0, 0xA3, 0xE0, 0x54, 0xFD,
-0xF0, 0x90, 0x05, 0x53, 0xE0, 0x44, 0x20, 0xF0,
-0x90, 0x07, 0xD5, 0xE0, 0x54, 0x7F, 0xF0, 0xD0,
-0xD0, 0x92, 0xAF, 0x22, 0x90, 0x00, 0x02, 0xE0,
-0x54, 0xFE, 0xF0, 0x22, 0xE4, 0x90, 0x9C, 0xC7,
-0xF0, 0xA3, 0xF0, 0x90, 0x05, 0x22, 0xE0, 0x90,
-0x9C, 0xC9, 0xF0, 0x7B, 0x47, 0x7D, 0xFF, 0xE4,
-0xFF, 0x12, 0x8D, 0x1E, 0x90, 0x05, 0xF8, 0xE0,
-0x70, 0x1B, 0xA3, 0xE0, 0x70, 0x17, 0xA3, 0xE0,
-0x70, 0x13, 0xA3, 0xE0, 0x70, 0x0F, 0x90, 0x9C,
-0xC9, 0xE0, 0xFD, 0x7B, 0x48, 0xE4, 0xFF, 0x12,
-0x8D, 0x1E, 0x7F, 0x01, 0x22, 0xD3, 0x90, 0x9C,
-0xC8, 0xE0, 0x94, 0xE8, 0x90, 0x9C, 0xC7, 0xE0,
-0x94, 0x03, 0x40, 0x16, 0x90, 0x01, 0xC0, 0xE0,
-0x44, 0x20, 0xF0, 0x90, 0x9C, 0xC9, 0xE0, 0xFD,
-0x7B, 0x5B, 0xE4, 0xFF, 0x12, 0x8D, 0x1E, 0x7F,
-0x00, 0x22, 0x7F, 0x32, 0x7E, 0x00, 0x12, 0x7C,
-0x6A, 0x90, 0x9C, 0xC7, 0x12, 0xBF, 0x87, 0x80,
-0xAB, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0,
-0x90, 0x9C, 0xD5, 0xEF, 0xF0, 0x90, 0x00, 0x8F,
-0xE0, 0x30, 0xE6, 0x45, 0x90, 0x00, 0x8D, 0xE0,
-0x64, 0x01, 0x70, 0x3D, 0x90, 0x9C, 0xD6, 0xF0,
-0x90, 0x9C, 0xD6, 0xE0, 0xFD, 0x90, 0x9C, 0xD5,
-0xE0, 0xC4, 0x54, 0xF0, 0x24, 0x00, 0xF5, 0x82,
-0xE4, 0x34, 0x81, 0xF5, 0x83, 0xE5, 0x82, 0x2D,
-0x12, 0xB7, 0x52, 0xE0, 0xFB, 0xE4, 0xFF, 0x51,
-0xBE, 0x90, 0x9C, 0xD6, 0xE0, 0x04, 0xF0, 0xE0,
-0xC3, 0x94, 0x10, 0x40, 0xD3, 0x90, 0x00, 0x8F,
-0xE0, 0x30, 0xE0, 0x05, 0x90, 0x00, 0x8D, 0xE4,
-0xF0, 0xD0, 0xD0, 0x92, 0xAF, 0x22, 0xEF, 0x70,
-0x04, 0x74, 0xF0, 0x80, 0x16, 0xEF, 0xB4, 0x01,
-0x04, 0x74, 0xF4, 0x80, 0x0E, 0xEF, 0xB4, 0x02,
-0x04, 0x74, 0xF8, 0x80, 0x06, 0xEF, 0xB4, 0x03,
-0x0C, 0x74, 0xFC, 0x2D, 0xF5, 0x82, 0xE4, 0x34,
-0x02, 0xF5, 0x83, 0xEB, 0xF0, 0x22, 0xEF, 0x64,
-0x01, 0x70, 0x26, 0x90, 0x93, 0x2B, 0xE0, 0x54,
-0x7F, 0xFF, 0x7E, 0x00, 0x90, 0x93, 0x2D, 0xE0,
-0x13, 0x13, 0x54, 0x01, 0xFD, 0x90, 0x93, 0x2C,
-0xE0, 0xFC, 0xC3, 0x13, 0x54, 0x7F, 0xFB, 0xEC,
-0x54, 0x01, 0x90, 0x9C, 0x98, 0xF0, 0x12, 0xB1,
-0x7B, 0x22, 0x90, 0x01, 0x8C, 0xE4, 0xF0, 0xA3,
-0xF0, 0xA3, 0x74, 0x71, 0xF0, 0xA3, 0x74, 0x02,
-0xF0, 0x90, 0x01, 0x95, 0xE0, 0x54, 0xF0, 0x44,
-0x07, 0xF0, 0x90, 0x01, 0x01, 0xE0, 0x44, 0x04,
-0xF0, 0x22, 0x90, 0x01, 0x9A, 0xE0, 0x54, 0xC0,
-0x44, 0x0B, 0xF0, 0x12, 0xC5, 0xDA, 0x90, 0x01,
-0x98, 0xE0, 0x54, 0xC0, 0x7F, 0x00, 0xB4, 0x40,
-0x02, 0x7F, 0x01, 0x22, 0x90, 0x01, 0x95, 0xE0,
-0x7F, 0x00, 0x30, 0xE4, 0x02, 0x7F, 0x01, 0x22,
-0x90, 0x93, 0x24, 0xE0, 0x30, 0xE0, 0x0B, 0x90,
-0x8A, 0xE5, 0x12, 0x90, 0x47, 0x7F, 0x10, 0x12,
-0x04, 0x7E, 0x22, 0x90, 0x01, 0xCF, 0xE0, 0x90,
-0x9A, 0xFB, 0xF0, 0xE0, 0xFF, 0x30, 0xE0, 0x07,
-0x90, 0x01, 0xCF, 0xE0, 0x54, 0xFE, 0xF0, 0xEF,
-0x30, 0xE5, 0x23, 0x90, 0x01, 0xCF, 0xE0, 0x54,
-0xDF, 0xF0, 0x90, 0x01, 0x34, 0x74, 0x20, 0xF0,
-0xE4, 0xF5, 0xA8, 0xF5, 0xE8, 0x12, 0x76, 0x6D,
-0x90, 0x00, 0x03, 0xE0, 0x54, 0xFB, 0xFD, 0x7F,
-0x03, 0x12, 0x7B, 0x2E, 0x80, 0xFE, 0x22, 0xD3,
-0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0xE4, 0xFE,
-0xFD, 0xEF, 0xB4, 0x01, 0x0D, 0xEB, 0xB4, 0x02,
-0x03, 0x0D, 0x80, 0x06, 0xEB, 0xB4, 0x01, 0x02,
-0x7D, 0x02, 0xAF, 0x06, 0xEF, 0xC4, 0x54, 0xF0,
-0x4D, 0xFF, 0xD0, 0xD0, 0x92, 0xAF, 0x22, 0xE4,
-0x90, 0x9B, 0x06, 0xF0, 0xA3, 0xF0, 0x7F, 0x83,
-0x12, 0x7B, 0x41, 0x90, 0x9B, 0x05, 0xEF, 0xF0,
-0x7F, 0x83, 0x12, 0x7B, 0x41, 0xAE, 0x07, 0x90,
-0x9B, 0x05, 0xE0, 0xFF, 0xB5, 0x06, 0x01, 0x22,
-0xC3, 0x90, 0x9B, 0x07, 0xE0, 0x94, 0x64, 0x90,
-0x9B, 0x06, 0xE0, 0x94, 0x00, 0x40, 0x0D, 0x90,
-0x01, 0xC0, 0xE0, 0x44, 0x40, 0xF0, 0x90, 0x9B,
-0x05, 0xE0, 0xFF, 0x22, 0x90, 0x9B, 0x06, 0x12,
-0xBF, 0x87, 0x80, 0xC2, 0x90, 0x01, 0xC4, 0x74,
-0x14, 0xF0, 0x74, 0xE4, 0xA3, 0xF0, 0x7F, 0x90,
-0x12, 0x7B, 0x41, 0xEF, 0x20, 0xE0, 0xF7, 0x74,
-0x14, 0x04, 0x90, 0x01, 0xC4, 0xF0, 0x74, 0xE4,
-0xA3, 0xF0, 0x22, 0xD3, 0x10, 0xAF, 0x01, 0xC3,
-0xC0, 0xD0, 0x91, 0x63, 0x90, 0x9C, 0xE0, 0xF0,
-0xED, 0x90, 0x00, 0x73, 0x70, 0x0D, 0xE0, 0x44,
-0x04, 0xF0, 0x90, 0x00, 0x67, 0xE0, 0x44, 0x80,
-0xF0, 0x80, 0x0B, 0xE0, 0x54, 0xFB, 0xF0, 0x90,
-0x00, 0x67, 0xE0, 0x54, 0x7F, 0xF0, 0xD0, 0xD0,
-0x92, 0xAF, 0x22, 0x90, 0x86, 0xAD, 0xA3, 0xE0,
-0x24, 0x7F, 0xF5, 0x82, 0xE4, 0x34, 0x84, 0xF5,
-0x83, 0xE0, 0x22, 0xD3, 0x10, 0xAF, 0x01, 0xC3,
-0xC0, 0xD0, 0xD0, 0xD0, 0x92, 0xAF, 0x22, 0x90,
-0x9C, 0xE1, 0xEF, 0xF0, 0x90, 0x88, 0xB8, 0xE0,
-0x44, 0x01, 0xF0, 0x90, 0x8A, 0xF9, 0x12, 0x90,
-0x47, 0x7D, 0x11, 0x7F, 0xFF, 0x12, 0x04, 0x7E,
-0x90, 0x8A, 0xEF, 0x12, 0x88, 0xC8, 0x90, 0x07,
-0x78, 0xE0, 0x90, 0x88, 0xBD, 0xF0, 0x90, 0x9C,
-0xE1, 0xE0, 0xFD, 0x70, 0x02, 0x80, 0x1C, 0xED,
-0xB4, 0x01, 0x06, 0x91, 0xCF, 0x44, 0x20, 0xF0,
-0x22, 0x90, 0x9C, 0xE1, 0xE0, 0xFD, 0xB4, 0x02,
-0x06, 0x91, 0xCF, 0x44, 0x60, 0xF0, 0x22, 0xED,
-0xB4, 0x03, 0x03, 0x91, 0xCF, 0xF0, 0x22, 0x90,
-0x88, 0xB8, 0xE0, 0x54, 0x1F, 0x22, 0x90, 0x9A,
-0x62, 0x12, 0x82, 0x27, 0x90, 0x9A, 0x5E, 0x12,
-0x82, 0x1E, 0x90, 0x9A, 0x65, 0xB1, 0xA9, 0xE0,
-0x24, 0xFF, 0xFF, 0xE4, 0x34, 0xFF, 0xFE, 0x90,
-0x9A, 0x63, 0x8F, 0xF0, 0x12, 0x02, 0xE7, 0x90,
-0x9A, 0x66, 0xEE, 0x8F, 0xF0, 0x12, 0x02, 0xE7,
-0x90, 0x9A, 0x61, 0xE0, 0xD3, 0x94, 0x00, 0x40,
-0x28, 0x90, 0x9A, 0x65, 0x12, 0x8F, 0x6D, 0xFF,
-0x90, 0x9A, 0x62, 0x12, 0x8F, 0x6D, 0xFE, 0x6F,
-0x60, 0x05, 0xC3, 0xEE, 0x9F, 0xFF, 0x22, 0x90,
-0x9A, 0x63, 0xB1, 0x34, 0x90, 0x9A, 0x66, 0xB1,
-0x34, 0x90, 0x9A, 0x61, 0xE0, 0x14, 0xF0, 0x80,
-0xCF, 0x7F, 0x00, 0x22, 0x74, 0xFF, 0xF5, 0xF0,
-0x02, 0x02, 0xE7, 0x90, 0x9A, 0x42, 0x12, 0x82,
-0x27, 0x90, 0x9A, 0x45, 0x12, 0x82, 0x1E, 0x12,
-0x87, 0xA4, 0x90, 0x9A, 0x4E, 0x12, 0x9F, 0x8A,
-0x12, 0x87, 0xA4, 0x90, 0x9A, 0x4F, 0xF0, 0x90,
-0x9A, 0x45, 0x12, 0x8B, 0xE0, 0x75, 0x48, 0x03,
-0x7B, 0x01, 0x7A, 0x9A, 0x79, 0x48, 0x12, 0x69,
-0xF5, 0x90, 0x9A, 0x42, 0x12, 0x8B, 0xE0, 0x75,
-0x48, 0x03, 0x7B, 0x01, 0x7A, 0x9A, 0x79, 0x4B,
-0x12, 0x69, 0xF5, 0x7B, 0x01, 0x7A, 0x9A, 0x79,
-0x4B, 0xB1, 0xA6, 0x74, 0x03, 0xF0, 0x7A, 0x9A,
-0x79, 0x48, 0xB1, 0xB0, 0x40, 0x15, 0x75, 0x45,
-0x01, 0x75, 0x46, 0x9A, 0x75, 0x47, 0x48, 0x75,
-0x48, 0x03, 0x12, 0x9F, 0x8B, 0x12, 0x69, 0xF5,
-0x7F, 0x01, 0x22, 0x7F, 0x00, 0x22, 0x90, 0x9A,
-0x5E, 0x12, 0x82, 0x27, 0x90, 0x9A, 0x61, 0x22,
-0x91, 0xD6, 0xD3, 0xEF, 0x64, 0x80, 0x94, 0x80,
-0x22, 0x90, 0x9A, 0x34, 0x12, 0x82, 0x27, 0x90,
-0x9A, 0x37, 0xED, 0xF0, 0x90, 0x9A, 0x39, 0x74,
-0x01, 0xF0, 0xED, 0x20, 0xE0, 0x1D, 0x90, 0x9A,
-0x38, 0xE0, 0xB4, 0x01, 0x13, 0x90, 0x98, 0x35,
-0xE0, 0x90, 0x95, 0x64, 0xF0, 0x75, 0x45, 0x01,
-0x75, 0x46, 0x95, 0x75, 0x47, 0x6B, 0x80, 0x46,
-0x7F, 0x00, 0x22, 0x90, 0x98, 0x36, 0xE0, 0x90,
-0x95, 0x64, 0xF0, 0x90, 0x95, 0x63, 0xE0, 0x14,
-0x60, 0x15, 0x14, 0x60, 0x1D, 0x14, 0x60, 0x25,
-0x24, 0x03, 0x70, 0x32, 0x75, 0x45, 0x01, 0x75,
-0x46, 0x95, 0x75, 0x47, 0x73, 0x80, 0x1F, 0x75,
-0x45, 0x01, 0x75, 0x46, 0x95, 0x75, 0x47, 0x7B,
-0x80, 0x14, 0x75, 0x45, 0x01, 0x75, 0x46, 0x95,
-0x75, 0x47, 0x83, 0x80, 0x09, 0x75, 0x45, 0x01,
-0x75, 0x46, 0x95, 0x75, 0x47, 0x8B, 0x75, 0x48,
-0x08, 0xD1, 0xC4, 0x12, 0x69, 0xF5, 0x90, 0x95,
-0x64, 0xE0, 0x24, 0xFE, 0x60, 0x16, 0x24, 0xFE,
-0x60, 0x12, 0x14, 0x60, 0x07, 0x14, 0x60, 0x04,
-0x24, 0x05, 0x70, 0x1C, 0xD1, 0xCB, 0xD1, 0xC4,
-0xB1, 0x3B, 0x80, 0x0F, 0xD1, 0xCB, 0x90, 0x95,
-0x64, 0xE0, 0x90, 0x9A, 0x48, 0xF0, 0xD1, 0xC4,
-0x12, 0x9D, 0xD3, 0x90, 0x9A, 0x39, 0xEF, 0xF0,
-0x90, 0x9A, 0x39, 0xE0, 0x60, 0x41, 0x90, 0x9A,
-0x37, 0xE0, 0x20, 0xE0, 0x08, 0xD1, 0xB5, 0x7A,
-0x95, 0x79, 0x6B, 0x80, 0x2F, 0x90, 0x95, 0x63,
-0xE0, 0x14, 0x60, 0x12, 0x14, 0x60, 0x17, 0x14,
-0x60, 0x1C, 0x24, 0x03, 0x70, 0x21, 0xD1, 0xB5,
-0x7A, 0x95, 0x79, 0x73, 0x80, 0x16, 0xD1, 0xB5,
-0x7A, 0x95, 0x79, 0x7B, 0x80, 0x0E, 0xD1, 0xB5,
-0x7A, 0x95, 0x79, 0x83, 0x80, 0x06, 0xD1, 0xB5,
-0x7A, 0x95, 0x79, 0x8B, 0x12, 0x69, 0xF5, 0x90,
-0x9A, 0x39, 0xE0, 0xFF, 0x22, 0x75, 0x45, 0x01,
-0x75, 0x46, 0x9A, 0x75, 0x47, 0x3A, 0x75, 0x48,
-0x08, 0x7B, 0x01, 0x22, 0x7B, 0x01, 0x7A, 0x9A,
-0x79, 0x3A, 0x22, 0x90, 0x9A, 0x34, 0x12, 0x82,
-0x1E, 0x90, 0x9A, 0x45, 0x02, 0x82, 0x27, 0x90,
+0x74, 0xFF, 0xF0, 0x74, 0x29, 0x2F, 0xD1, 0x3E,
+0x54, 0xF7, 0xF0, 0x74, 0x0D, 0x2D, 0xF5, 0x82,
+0xE4, 0x34, 0xFC, 0xF5, 0x83, 0xE0, 0x44, 0x80,
+0xF0, 0xAE, 0x04, 0xAF, 0x05, 0xD0, 0xD0, 0x92,
+0xAF, 0x22, 0x74, 0x21, 0x2F, 0xF5, 0x82, 0xE4,
+0x34, 0xFC, 0xF5, 0x83, 0x22, 0x90, 0x9C, 0xA8,
+0xE0, 0xFE, 0xA3, 0xE0, 0xFF, 0x90, 0x8A, 0x9B,
+0xE0, 0xFC, 0xA3, 0xE0, 0xFD, 0xF5, 0x82, 0x8C,
+0x83, 0x12, 0x04, 0x7E, 0x90, 0x9C, 0xA8, 0xA3,
+0xE0, 0xFF, 0x24, 0x12, 0xF5, 0x82, 0xE4, 0x34,
+0xFC, 0xF5, 0x83, 0xE0, 0x54, 0x01, 0xFE, 0x90,
+0x9C, 0xA7, 0xE0, 0x25, 0xE0, 0x25, 0xE0, 0x44,
+0x02, 0x4E, 0xFE, 0x74, 0x12, 0x2F, 0xF5, 0x82,
+0xE4, 0x34, 0xFC, 0xF5, 0x83, 0x22, 0xF5, 0x82,
+0xE4, 0x34, 0xFC, 0xF5, 0x83, 0xE0, 0x22, 0x90,
+0x86, 0xAD, 0xA3, 0xE0, 0x24, 0x7F, 0xF5, 0x82,
+0xE4, 0x34, 0x84, 0xF5, 0x83, 0xE0, 0x22, 0xD3,
+0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0xD1, 0x47,
+0x90, 0x9C, 0xE2, 0xF0, 0xED, 0x90, 0x00, 0x73,
+0x70, 0x0D, 0xE0, 0x44, 0x04, 0xF0, 0x90, 0x00,
+0x67, 0xE0, 0x44, 0x80, 0xF0, 0x80, 0x0B, 0xE0,
+0x54, 0xFB, 0xF0, 0x90, 0x00, 0x67, 0xE0, 0x54,
+0x7F, 0xF0, 0xD0, 0xD0, 0x92, 0xAF, 0x22, 0xD3,
+0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0xD1, 0xD0,
+0x90, 0x9C, 0xB3, 0x12, 0x04, 0x31, 0x90, 0x9C,
+0xB3, 0x12, 0xD1, 0x96, 0x7F, 0x30, 0x7E, 0x08,
+0x12, 0x70, 0xAD, 0x90, 0x01, 0x01, 0xE0, 0x44,
+0x02, 0xD1, 0xC8, 0x90, 0x06, 0xB7, 0x74, 0x09,
+0xF0, 0x90, 0x06, 0xB4, 0x74, 0x86, 0xF0, 0xD1,
+0xDD, 0xF0, 0xE4, 0xFD, 0x12, 0x76, 0xF7, 0x12,
+0xB7, 0x82, 0xF0, 0xD0, 0xD0, 0x92, 0xAF, 0x22,
+0xF0, 0x90, 0x01, 0x00, 0x74, 0xFF, 0xF0, 0x22,
+0x7F, 0x30, 0x7E, 0x08, 0x12, 0x70, 0x70, 0xED,
+0x44, 0x80, 0xFD, 0xEC, 0x22, 0x90, 0x93, 0x46,
+0xE0, 0xFF, 0x90, 0x93, 0x45, 0xE0, 0xFB, 0x90,
+0x93, 0x47, 0xE0, 0x90, 0x92, 0x90, 0x22, 0xD3,
+0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0xD1, 0xD0,
+0x90, 0x9C, 0xB7, 0x12, 0x04, 0x31, 0x90, 0x9C,
+0xB7, 0x12, 0xD1, 0x96, 0x7F, 0x30, 0x7E, 0x08,
+0x12, 0x70, 0xAD, 0xD1, 0xDD, 0xF0, 0x7D, 0x01,
+0x12, 0x76, 0xF7, 0x12, 0x88, 0xC5, 0x90, 0x06,
+0xB7, 0x74, 0x11, 0xF0, 0x7F, 0x03, 0x7E, 0x00,
+0x12, 0x7C, 0x6A, 0x90, 0x06, 0xB4, 0xE0, 0x54,
+0x0F, 0x70, 0xF1, 0x90, 0x07, 0xD5, 0xE0, 0x44,
+0x80, 0xF0, 0x7F, 0x0A, 0x80, 0x09, 0x90, 0x06,
+0x62, 0xE0, 0x30, 0xE0, 0x09, 0x7F, 0x01, 0x7E,
+0x00, 0x12, 0x7C, 0x6A, 0x80, 0xF0, 0x12, 0xB7,
+0xA8, 0x90, 0x01, 0x00, 0x74, 0x3F, 0xF0, 0xA3,
+0xE0, 0x54, 0xFD, 0xF0, 0x90, 0x05, 0x53, 0xE0,
+0x44, 0x20, 0xF0, 0x90, 0x07, 0xD5, 0xE0, 0x54,
+0x7F, 0xF0, 0xD0, 0xD0, 0x92, 0xAF, 0x22, 0xE4,
+0x90, 0x9C, 0xC7, 0xF0, 0xA3, 0xF0, 0x90, 0x05,
+0x22, 0xE0, 0x90, 0x9C, 0xC9, 0xF0, 0x7B, 0x47,
+0x7D, 0xFF, 0xE4, 0xFF, 0x12, 0x8D, 0x1E, 0x90,
+0x05, 0xF8, 0xE0, 0x70, 0x1B, 0xA3, 0xE0, 0x70,
+0x17, 0xA3, 0xE0, 0x70, 0x13, 0xA3, 0xE0, 0x70,
+0x0F, 0x90, 0x9C, 0xC9, 0xE0, 0xFD, 0x7B, 0x48,
+0xE4, 0xFF, 0x12, 0x8D, 0x1E, 0x7F, 0x01, 0x22,
+0xD3, 0x90, 0x9C, 0xC8, 0xE0, 0x94, 0xE8, 0x90,
+0x9C, 0xC7, 0xE0, 0x94, 0x03, 0x40, 0x16, 0x90,
+0x01, 0xC0, 0xE0, 0x44, 0x20, 0xF0, 0x90, 0x9C,
+0xC9, 0xE0, 0xFD, 0x7B, 0x5B, 0xE4, 0xFF, 0x12,
+0x8D, 0x1E, 0x7F, 0x00, 0x22, 0x7F, 0x32, 0x7E,
+0x00, 0x12, 0x7C, 0x6A, 0x90, 0x9C, 0xC7, 0x12,
+0xBF, 0xA5, 0x80, 0xAB, 0x75, 0x0D, 0x14, 0x90,
+0x88, 0x32, 0xE0, 0x44, 0x10, 0xF0, 0x90, 0x00,
+0x06, 0xE0, 0x44, 0x40, 0xF0, 0x90, 0x88, 0x41,
+0xE0, 0x90, 0x00, 0x93, 0xF0, 0x90, 0x88, 0x37,
+0xE0, 0x60, 0x12, 0x90, 0x01, 0x2F, 0xE0, 0x30,
+0xE7, 0x05, 0x74, 0x10, 0xF0, 0x80, 0x06, 0x90,
+0x01, 0x2F, 0x74, 0x90, 0xF0, 0x90, 0x93, 0x0C,
+0xE0, 0x30, 0xE0, 0x61, 0x90, 0xFD, 0x09, 0xE4,
+0xF0, 0x90, 0xFD, 0x08, 0xF0, 0x90, 0x0E, 0x4B,
+0xE0, 0x54, 0xFC, 0xF0, 0xE4, 0x90, 0x9A, 0x0C,
+0xF0, 0x90, 0x9A, 0x0C, 0xE0, 0xFF, 0xC3, 0x94,
+0x05, 0x50, 0x2E, 0x12, 0xBC, 0x0B, 0x80, 0x05,
+0xC3, 0x33, 0xCE, 0x33, 0xCE, 0xD8, 0xF9, 0xFF,
+0x90, 0x93, 0x0E, 0xE0, 0xFD, 0xEF, 0x5D, 0x60,
+0x10, 0x90, 0x9A, 0x0C, 0x11, 0xF1, 0x90, 0x9A,
+0x0C, 0x31, 0x11, 0x44, 0x20, 0xF0, 0x12, 0xBF,
+0xDF, 0x90, 0x9A, 0x0C, 0xE0, 0x04, 0xF0, 0x80,
+0xC8, 0x90, 0x00, 0x92, 0xE0, 0x54, 0xFE, 0xF0,
+0xE0, 0x44, 0x08, 0xF0, 0x90, 0x00, 0x02, 0xE0,
+0x54, 0xFD, 0xF0, 0x80, 0x07, 0x90, 0x00, 0x92,
+0xE0, 0x44, 0x01, 0xF0, 0x90, 0x00, 0x08, 0xE0,
+0x44, 0x10, 0xF0, 0x7F, 0x01, 0x31, 0x32, 0x90,
+0x00, 0x90, 0xE0, 0x44, 0x01, 0xF0, 0x00, 0x00,
+0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+0x00, 0x00, 0x7F, 0x14, 0x7E, 0x00, 0x02, 0x7C,
+0x6A, 0xE0, 0xFF, 0x24, 0x1A, 0xF5, 0x82, 0xE4,
+0x34, 0x93, 0xF5, 0x83, 0xE0, 0x90, 0x01, 0xB0,
+0xF0, 0x74, 0x1F, 0x2F, 0xF5, 0x82, 0xE4, 0x34,
+0x93, 0xF5, 0x83, 0xE0, 0x90, 0x01, 0xB1, 0xF0,
+0x22, 0xE0, 0xFF, 0x24, 0x10, 0xF5, 0x82, 0xE4,
+0x34, 0x93, 0xF5, 0x83, 0xE0, 0x90, 0x01, 0xB2,
+0xF0, 0x74, 0x15, 0x2F, 0xF5, 0x82, 0xE4, 0x34,
+0x93, 0xF5, 0x83, 0xE0, 0x90, 0x01, 0xB3, 0xF0,
+0xE0, 0x22, 0x90, 0x9C, 0xCD, 0xEF, 0x12, 0xCA,
+0x89, 0x90, 0x01, 0x09, 0xE0, 0x7F, 0x00, 0x30,
+0xE7, 0x02, 0x7F, 0x01, 0x90, 0x9C, 0xCD, 0xE0,
+0x6F, 0x60, 0x36, 0xC3, 0x90, 0x9C, 0xCF, 0xE0,
+0x94, 0x88, 0x90, 0x9C, 0xCE, 0xE0, 0x94, 0x13,
+0x40, 0x08, 0x90, 0x01, 0xC0, 0xE0, 0x44, 0x10,
+0xF0, 0x22, 0x90, 0x9C, 0xCE, 0x12, 0xBF, 0xA5,
+0x12, 0xBF, 0xDF, 0xD3, 0x90, 0x9C, 0xCF, 0xE0,
+0x94, 0x32, 0x90, 0x9C, 0xCE, 0xE0, 0x94, 0x00,
+0x40, 0xBF, 0x90, 0x01, 0xC6, 0xE0, 0x30, 0xE0,
+0xB8, 0x22, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0,
+0xD0, 0x90, 0x9C, 0xD5, 0xEF, 0xF0, 0x90, 0x00,
+0x8F, 0xE0, 0x30, 0xE6, 0x45, 0x90, 0x00, 0x8D,
+0xE0, 0x64, 0x01, 0x70, 0x3D, 0x90, 0x9C, 0xD6,
+0xF0, 0x90, 0x9C, 0xD6, 0xE0, 0xFD, 0x90, 0x9C,
+0xD5, 0xE0, 0xC4, 0x54, 0xF0, 0x24, 0x00, 0xF5,
+0x82, 0xE4, 0x34, 0x81, 0xF5, 0x83, 0xE5, 0x82,
+0x2D, 0x12, 0xBD, 0xDF, 0xE0, 0xFB, 0xE4, 0xFF,
+0x31, 0xDF, 0x90, 0x9C, 0xD6, 0xE0, 0x04, 0xF0,
+0xE0, 0xC3, 0x94, 0x10, 0x40, 0xD3, 0x90, 0x00,
+0x8F, 0xE0, 0x30, 0xE0, 0x05, 0x90, 0x00, 0x8D,
+0xE4, 0xF0, 0xD0, 0xD0, 0x92, 0xAF, 0x22, 0xEF,
+0x70, 0x04, 0x74, 0xF0, 0x80, 0x16, 0xEF, 0xB4,
+0x01, 0x04, 0x74, 0xF4, 0x80, 0x0E, 0xEF, 0xB4,
+0x02, 0x04, 0x74, 0xF8, 0x80, 0x06, 0xEF, 0xB4,
+0x03, 0x0C, 0x74, 0xFC, 0x2D, 0xF5, 0x82, 0xE4,
+0x34, 0x02, 0xF5, 0x83, 0xEB, 0xF0, 0x22, 0xEF,
+0x64, 0x01, 0x70, 0x26, 0x90, 0x93, 0x2B, 0xE0,
+0x54, 0x7F, 0xFF, 0x7E, 0x00, 0x90, 0x93, 0x2D,
+0xE0, 0x13, 0x13, 0x54, 0x01, 0xFD, 0x90, 0x93,
+0x2C, 0xE0, 0xFC, 0xC3, 0x13, 0x54, 0x7F, 0xFB,
+0xEC, 0x54, 0x01, 0x90, 0x9C, 0x98, 0xF0, 0x12,
+0xB9, 0x7B, 0x22, 0x90, 0x01, 0x8C, 0xE4, 0xF0,
+0xA3, 0xF0, 0xA3, 0x74, 0x71, 0xF0, 0xA3, 0x74,
+0x02, 0xF0, 0x90, 0x01, 0x95, 0xE0, 0x54, 0xF0,
+0x44, 0x07, 0xF0, 0x90, 0x01, 0x98, 0x74, 0x7F,
+0xF0, 0x90, 0x01, 0x01, 0xE0, 0x54, 0xFB, 0xF0,
+0xE0, 0x44, 0x04, 0xF0, 0x22, 0x90, 0x01, 0x9A,
+0xE0, 0x54, 0xC0, 0x44, 0x0B, 0xF0, 0x12, 0xBE,
+0xF4, 0x90, 0x01, 0x98, 0xE0, 0x54, 0xC0, 0x7F,
+0x00, 0xB4, 0x40, 0x02, 0x7F, 0x01, 0x22, 0x90,
+0x01, 0x95, 0xE0, 0x7F, 0x00, 0x30, 0xE4, 0x02,
+0x7F, 0x01, 0x22, 0x90, 0x93, 0x24, 0xE0, 0x30,
+0xE0, 0x0B, 0x90, 0x8A, 0xE5, 0x12, 0x90, 0x47,
+0x7F, 0x10, 0x12, 0x04, 0x7E, 0x22, 0x90, 0x8A,
+0x75, 0x12, 0x88, 0xC8, 0x90, 0x8A, 0xE5, 0x12,
+0x90, 0x47, 0x7F, 0x02, 0x02, 0x04, 0x7E, 0x90,
+0x01, 0xCF, 0xE0, 0x90, 0x9A, 0xFB, 0xF0, 0xE0,
+0xFF, 0x30, 0xE0, 0x07, 0x90, 0x01, 0xCF, 0xE0,
+0x54, 0xFE, 0xF0, 0xEF, 0x30, 0xE5, 0x23, 0x90,
+0x01, 0xCF, 0xE0, 0x54, 0xDF, 0xF0, 0x90, 0x01,
+0x34, 0x74, 0x20, 0xF0, 0xE4, 0xF5, 0xA8, 0xF5,
+0xE8, 0x12, 0x76, 0x6D, 0x90, 0x00, 0x03, 0xE0,
+0x54, 0xFB, 0xFD, 0x7F, 0x03, 0x12, 0x7B, 0x2E,
+0x80, 0xFE, 0x22, 0xE4, 0x90, 0x9B, 0x06, 0xF0,
+0xA3, 0xF0, 0x7F, 0x83, 0x12, 0x7B, 0x41, 0x90,
+0x9B, 0x05, 0xEF, 0xF0, 0x7F, 0x83, 0x12, 0x7B,
+0x41, 0xAE, 0x07, 0x90, 0x9B, 0x05, 0xE0, 0xFF,
+0xB5, 0x06, 0x01, 0x22, 0xC3, 0x90, 0x9B, 0x07,
+0xE0, 0x94, 0x64, 0x90, 0x9B, 0x06, 0xE0, 0x94,
+0x00, 0x40, 0x0D, 0x90, 0x01, 0xC0, 0xE0, 0x44,
+0x40, 0xF0, 0x90, 0x9B, 0x05, 0xE0, 0xFF, 0x22,
+0x90, 0x9B, 0x06, 0x12, 0xBF, 0xA5, 0x80, 0xC2,
+0x90, 0x01, 0xC4, 0x74, 0x28, 0xF0, 0x74, 0xE3,
+0xA3, 0xF0, 0x7F, 0x90, 0x12, 0x7B, 0x41, 0xEF,
+0x20, 0xE0, 0xF7, 0x74, 0x28, 0x04, 0x90, 0x01,
+0xC4, 0xF0, 0x74, 0xE3, 0xA3, 0xF0, 0x22, 0xD3,
+0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0xD0, 0xD0,
+0x92, 0xAF, 0x22, 0x90, 0x9C, 0xE3, 0xEF, 0xF0,
+0x90, 0x88, 0xB8, 0xE0, 0x44, 0x01, 0xF0, 0x90,
+0x8A, 0xF9, 0x12, 0x90, 0x47, 0x7D, 0x11, 0x7F,
+0xFF, 0x12, 0x04, 0x7E, 0x90, 0x8A, 0xEF, 0x12,
+0x88, 0xC8, 0x90, 0x07, 0x78, 0xE0, 0x90, 0x88,
+0xBD, 0xF0, 0x90, 0x9C, 0xE3, 0xE0, 0xFD, 0x70,
+0x02, 0x80, 0x1C, 0xED, 0xB4, 0x01, 0x06, 0x71,
+0xA3, 0x44, 0x20, 0xF0, 0x22, 0x90, 0x9C, 0xE3,
+0xE0, 0xFD, 0xB4, 0x02, 0x06, 0x71, 0xA3, 0x44,
+0x60, 0xF0, 0x22, 0xED, 0xB4, 0x03, 0x03, 0x71,
+0xA3, 0xF0, 0x22, 0x90, 0x88, 0xB8, 0xE0, 0x54,
+0x1F, 0x22, 0x90, 0x9A, 0x62, 0x12, 0x82, 0x27,
+0x90, 0x9A, 0x5E, 0x12, 0x82, 0x1E, 0x90, 0x9A,
+0x65, 0xB1, 0xA7, 0xE0, 0x24, 0xFF, 0xFF, 0xE4,
+0x34, 0xFF, 0xFE, 0x90, 0x9A, 0x63, 0x8F, 0xF0,
+0x12, 0x02, 0xE7, 0x90, 0x9A, 0x66, 0xEE, 0x8F,
+0xF0, 0x12, 0x02, 0xE7, 0x90, 0x9A, 0x61, 0xE0,
+0xD3, 0x94, 0x00, 0x40, 0x28, 0x90, 0x9A, 0x65,
+0x12, 0x8F, 0x6D, 0xFF, 0x90, 0x9A, 0x62, 0x12,
+0x8F, 0x6D, 0xFE, 0x6F, 0x60, 0x05, 0xC3, 0xEE,
+0x9F, 0xFF, 0x22, 0x90, 0x9A, 0x63, 0x91, 0x08,
+0x90, 0x9A, 0x66, 0x91, 0x08, 0x90, 0x9A, 0x61,
+0xE0, 0x14, 0xF0, 0x80, 0xCF, 0x7F, 0x00, 0x22,
+0x74, 0xFF, 0xF5, 0xF0, 0x02, 0x02, 0xE7, 0x90,
+0x9A, 0x42, 0x12, 0x82, 0x27, 0x90, 0x9A, 0x45,
+0x12, 0x82, 0x1E, 0x12, 0x87, 0xA4, 0x90, 0x9A,
+0x4E, 0x12, 0x9F, 0x97, 0x12, 0x87, 0xA4, 0x90,
+0x9A, 0x4F, 0xF0, 0x90, 0x9A, 0x45, 0x12, 0x8B,
+0xE0, 0x75, 0x48, 0x03, 0x7B, 0x01, 0x7A, 0x9A,
+0x79, 0x48, 0x12, 0x69, 0xF5, 0x90, 0x9A, 0x42,
+0x12, 0x8B, 0xE0, 0x75, 0x48, 0x03, 0x7B, 0x01,
+0x7A, 0x9A, 0x79, 0x4B, 0x12, 0x69, 0xF5, 0x7B,
+0x01, 0x7A, 0x9A, 0x79, 0x4B, 0xB1, 0xA4, 0x74,
+0x03, 0xF0, 0x7A, 0x9A, 0x79, 0x48, 0xB1, 0xAE,
+0x40, 0x15, 0x75, 0x45, 0x01, 0x75, 0x46, 0x9A,
+0x75, 0x47, 0x48, 0x75, 0x48, 0x03, 0x12, 0x9F,
+0x98, 0x12, 0x69, 0xF5, 0x7F, 0x01, 0x22, 0x7F,
+0x00, 0x22, 0x90, 0x9A, 0x34, 0x12, 0x82, 0x27,
+0x90, 0x9A, 0x37, 0xED, 0xF0, 0x90, 0x9A, 0x39,
+0x74, 0x01, 0xF0, 0x12, 0x9F, 0x90, 0xFB, 0x7A,
+0x9A, 0x79, 0x3A, 0x12, 0x04, 0x80, 0x90, 0x9A,
+0x37, 0xE0, 0x20, 0xE0, 0x1B, 0xA3, 0xE0, 0xB4,
+0x01, 0x13, 0x90, 0x98, 0x35, 0xE0, 0x90, 0x95,
+0x64, 0xF0, 0x75, 0x45, 0x01, 0x75, 0x46, 0x95,
+0x75, 0x47, 0x6B, 0x80, 0x46, 0x7F, 0x00, 0x22,
+0x90, 0x98, 0x36, 0xE0, 0x90, 0x95, 0x64, 0xF0,
+0x90, 0x95, 0x63, 0xE0, 0x14, 0x60, 0x15, 0x14,
+0x60, 0x1D, 0x14, 0x60, 0x25, 0x24, 0x03, 0x70,
+0x32, 0x75, 0x45, 0x01, 0x75, 0x46, 0x95, 0x75,
+0x47, 0x73, 0x80, 0x1F, 0x75, 0x45, 0x01, 0x75,
+0x46, 0x95, 0x75, 0x47, 0x7B, 0x80, 0x14, 0x75,
+0x45, 0x01, 0x75, 0x46, 0x95, 0x75, 0x47, 0x83,
+0x80, 0x09, 0x75, 0x45, 0x01, 0x75, 0x46, 0x95,
+0x75, 0x47, 0x8B, 0x75, 0x48, 0x08, 0xB1, 0x91,
+0x12, 0x69, 0xF5, 0x90, 0x95, 0x64, 0xE0, 0x24,
+0xFE, 0x60, 0x16, 0x24, 0xFE, 0x60, 0x12, 0x14,
+0x60, 0x07, 0x14, 0x60, 0x04, 0x24, 0x05, 0x70,
+0x1C, 0xB1, 0x98, 0xB1, 0x91, 0x91, 0x0F, 0x80,
+0x0F, 0xB1, 0x98, 0x90, 0x95, 0x64, 0xE0, 0x90,
+0x9A, 0x48, 0xF0, 0xB1, 0x91, 0x12, 0x9D, 0xD9,
+0x90, 0x9A, 0x39, 0xEF, 0xF0, 0x90, 0x9A, 0x39,
+0xE0, 0x60, 0x41, 0x90, 0x9A, 0x37, 0xE0, 0x20,
+0xE0, 0x08, 0xB1, 0x82, 0x7A, 0x95, 0x79, 0x6B,
+0x80, 0x2F, 0x90, 0x95, 0x63, 0xE0, 0x14, 0x60,
+0x12, 0x14, 0x60, 0x17, 0x14, 0x60, 0x1C, 0x24,
+0x03, 0x70, 0x21, 0xB1, 0x82, 0x7A, 0x95, 0x79,
+0x73, 0x80, 0x16, 0xB1, 0x82, 0x7A, 0x95, 0x79,
+0x7B, 0x80, 0x0E, 0xB1, 0x82, 0x7A, 0x95, 0x79,
+0x83, 0x80, 0x06, 0xB1, 0x82, 0x7A, 0x95, 0x79,
+0x8B, 0x12, 0x69, 0xF5, 0x90, 0x9A, 0x39, 0xE0,
+0xFF, 0x22, 0x75, 0x45, 0x01, 0x75, 0x46, 0x9A,
+0x75, 0x47, 0x3A, 0x75, 0x48, 0x08, 0x7B, 0x01,
+0x22, 0x7B, 0x01, 0x7A, 0x9A, 0x79, 0x3A, 0x22,
+0x90, 0x9A, 0x34, 0x12, 0x82, 0x1E, 0x90, 0x9A,
+0x45, 0x02, 0x82, 0x27, 0x90, 0x9A, 0x5E, 0x12,
+0x82, 0x27, 0x90, 0x9A, 0x61, 0x22, 0x71, 0xAA,
+0xD3, 0xEF, 0x64, 0x80, 0x94, 0x80, 0x22, 0x90,
 0x98, 0x4C, 0xE0, 0x30, 0xE0, 0x35, 0x12, 0x97,
-0xED, 0x70, 0x30, 0x90, 0x9C, 0xE3, 0xE0, 0x04,
+0xE0, 0x70, 0x30, 0x90, 0x9C, 0xE5, 0xE0, 0x04,
 0xF0, 0xE0, 0xB4, 0x0A, 0x0B, 0x90, 0x98, 0x4E,
-0xE0, 0x04, 0xF0, 0xE4, 0x90, 0x9C, 0xE3, 0xF0,
+0xE0, 0x04, 0xF0, 0xE4, 0x90, 0x9C, 0xE5, 0xF0,
 0x90, 0x98, 0x4E, 0xE0, 0xFF, 0x90, 0x98, 0x4D,
 0xE0, 0xD3, 0x9F, 0x50, 0x0E, 0x90, 0x98, 0x4F,
 0xE0, 0x70, 0x08, 0xE4, 0x90, 0x98, 0x4E, 0xF0,
-0x12, 0xD6, 0xDA, 0x22, 0x12, 0x02, 0x06, 0xFF,
+0x12, 0xB5, 0x2E, 0x22, 0x12, 0x02, 0x06, 0xFF,
 0x54, 0x01, 0xFE, 0x90, 0x98, 0x4C, 0xE0, 0x54,
 0xFE, 0x4E, 0xFE, 0xF0, 0xEF, 0x54, 0x04, 0xFF,
 0xEE, 0x54, 0xFB, 0x4F, 0xF0, 0x12, 0x02, 0x06,
-0xC3, 0x13, 0x30, 0xE0, 0x07, 0x12, 0x9C, 0x54,
+0xC3, 0x13, 0x30, 0xE0, 0x07, 0x12, 0x9C, 0x5A,
 0x90, 0x98, 0x4D, 0xF0, 0x22, 0xE0, 0xFE, 0xA3,
 0xE0, 0xFF, 0x90, 0x02, 0x84, 0xEF, 0xF0, 0xEE,
 0xA3, 0xF0, 0xA3, 0xE0, 0x44, 0x01, 0xF0, 0x22,
-0x7D, 0x07, 0xEF, 0x5D, 0xC3, 0x60, 0x0A, 0xF1,
-0x65, 0x24, 0x08, 0xFF, 0xE4, 0x3E, 0xFE, 0x80,
-0x03, 0xF1, 0x65, 0xFF, 0x22, 0x74, 0xFF, 0x9D,
-0xFD, 0x74, 0xFF, 0x94, 0x00, 0x5E, 0xFE, 0xED,
-0x5F, 0x22, 0x90, 0x02, 0x86, 0xE0, 0x20, 0xE2,
-0x03, 0x7F, 0x04, 0x22, 0x90, 0x02, 0x86, 0xE0,
-0x7F, 0x01, 0x20, 0xE1, 0x02, 0x7F, 0x02, 0x22,
-0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0xE4,
-0xFD, 0x7F, 0x8F, 0x12, 0x7B, 0x2E, 0xD0, 0xD0,
-0x92, 0xAF, 0x22, 0xD3, 0x10, 0xAF, 0x01, 0xC3,
-0xC0, 0xD0, 0x12, 0xF9, 0xB9, 0x20, 0xE0, 0x0D,
-0x90, 0x00, 0x04, 0xE0, 0x54, 0xF7, 0xF0, 0x12,
-0xCE, 0x2A, 0x02, 0xE9, 0x01, 0x12, 0x8F, 0x6A,
-0xFF, 0x54, 0x01, 0xFE, 0x90, 0x93, 0x29, 0x12,
-0xF3, 0xB8, 0xFD, 0xEF, 0x54, 0xFB, 0x4D, 0xFF,
-0x90, 0x93, 0x29, 0x12, 0x9F, 0xDB, 0x12, 0xFA,
-0xA2, 0xFF, 0x90, 0x93, 0x29, 0x12, 0xFA, 0xEA,
-0x12, 0x9F, 0xE3, 0x12, 0xFA, 0xAB, 0xFF, 0x90,
-0x93, 0x29, 0x12, 0xFA, 0x84, 0xF0, 0x12, 0x9C,
-0x54, 0x54, 0x80, 0xFF, 0x90, 0x93, 0x2A, 0xE0,
-0x54, 0x7F, 0x12, 0x87, 0xD0, 0xFF, 0x54, 0x02,
-0xFE, 0x90, 0x93, 0x2D, 0xE0, 0x54, 0xFD, 0x4E,
-0xFE, 0xF0, 0xEF, 0x54, 0x08, 0xFF, 0xEE, 0x54,
-0xF7, 0x4F, 0x12, 0x87, 0x9B, 0x90, 0x93, 0x2E,
-0x12, 0x87, 0xD1, 0x54, 0x10, 0xFF, 0x90, 0x93,
-0x2D, 0xE0, 0x54, 0xEF, 0x4F, 0xF0, 0x12, 0x02,
-0x06, 0xFF, 0x13, 0x13, 0x54, 0x3F, 0x30, 0xE0,
-0x07, 0x90, 0x06, 0x90, 0xE0, 0x44, 0x04, 0xF0,
-0x12, 0xD7, 0x42, 0x30, 0xE0, 0x07, 0x90, 0x06,
-0x90, 0xE0, 0x44, 0x08, 0xF0, 0x90, 0x93, 0x2E,
-0xE0, 0x70, 0x02, 0x04, 0xF0, 0x12, 0xA7, 0xF2,
-0x12, 0x87, 0xD2, 0xC4, 0x54, 0x0F, 0x30, 0xE0,
-0x0E, 0x7F, 0x05, 0x12, 0x7B, 0x41, 0xEF, 0x54,
-0x7F, 0xFD, 0x7F, 0x05, 0x12, 0x7B, 0x2E, 0x90,
-0x86, 0xB3, 0xE0, 0xB4, 0x02, 0x06, 0x12, 0xA0,
-0x9B, 0x20, 0xE0, 0x66, 0x90, 0x99, 0xB1, 0x12,
-0x9C, 0x51, 0x54, 0x7F, 0xFF, 0x90, 0x93, 0x2A,
-0xE0, 0x54, 0x80, 0x12, 0x87, 0xE5, 0x54, 0x7F,
-0xFF, 0x90, 0x93, 0x2B, 0xE0, 0x54, 0x80, 0x12,
-0x87, 0xA2, 0xFF, 0x54, 0x01, 0xFE, 0x90, 0x93,
-0x2C, 0xE0, 0x54, 0xFE, 0x4E, 0xFE, 0xF0, 0xEF,
-0x54, 0xFE, 0xFF, 0xEE, 0x54, 0x01, 0x12, 0x87,
-0xD0, 0xFF, 0x54, 0x04, 0xFE, 0x90, 0x93, 0x2D,
-0xE0, 0x54, 0xFB, 0x4E, 0xFE, 0xF0, 0xEF, 0x54,
-0x01, 0xFF, 0xEE, 0x54, 0xFE, 0x4F, 0xF0, 0x12,
-0xB2, 0x1E, 0x54, 0x07, 0x7D, 0x00, 0x20, 0xE0,
-0x02, 0x7D, 0x01, 0x12, 0xB0, 0xD1, 0x90, 0x93,
-0x2D, 0xE0, 0xFF, 0xC3, 0x13, 0x30, 0xE0, 0x02,
-0x31, 0x06, 0x90, 0x86, 0xB3, 0xE0, 0xB4, 0x01,
-0x07, 0x90, 0xFE, 0x10, 0xE0, 0x44, 0x04, 0xF0,
-0x7E, 0x00, 0x7F, 0x60, 0x7D, 0x00, 0x7B, 0x01,
-0x7A, 0x95, 0x79, 0x33, 0x12, 0x04, 0x80, 0x90,
-0x95, 0x63, 0x74, 0x05, 0xF0, 0x12, 0x9F, 0x91,
-0x7B, 0x01, 0x7A, 0x94, 0x79, 0x42, 0x12, 0x04,
-0x80, 0xD0, 0xD0, 0x92, 0xAF, 0x22, 0x90, 0x98,
-0x49, 0x74, 0x06, 0xF0, 0x90, 0x98, 0x48, 0x74,
-0x08, 0xF0, 0x90, 0x00, 0x4A, 0xE0, 0x54, 0xFE,
-0xF0, 0x90, 0x00, 0x4F, 0xE0, 0x44, 0x40, 0xF0,
-0x90, 0x00, 0x40, 0xE0, 0x44, 0x08, 0xF0, 0x90,
-0x93, 0x29, 0xE0, 0xC4, 0x13, 0x54, 0x07, 0x90,
-0x00, 0x65, 0x30, 0xE0, 0x06, 0xE0, 0x44, 0x20,
-0xF0, 0x80, 0x04, 0xE0, 0x54, 0xDF, 0xF0, 0x12,
-0xC7, 0xDC, 0xFB, 0x7D, 0x01, 0x02, 0xB2, 0x4C,
-0x90, 0x93, 0x31, 0xE0, 0x30, 0xE0, 0x0D, 0x90,
-0x93, 0x29, 0xE0, 0xC4, 0x54, 0x0F, 0x20, 0xE0,
-0x03, 0x7F, 0x00, 0x22, 0x7F, 0x01, 0x22, 0xEF,
-0x90, 0x01, 0xC7, 0xB4, 0xA0, 0x05, 0x74, 0x04,
-0xF0, 0x80, 0x03, 0x74, 0x08, 0xF0, 0x02, 0xA7,
-0x46, 0x90, 0x9A, 0x3B, 0xEE, 0xF0, 0xA3, 0xEF,
-0xF0, 0xE4, 0x90, 0x9A, 0x43, 0xF0, 0x90, 0x9A,
-0x43, 0xE0, 0xFD, 0xC3, 0x94, 0x06, 0x50, 0x1C,
-0x90, 0x9A, 0x3C, 0xE0, 0x24, 0x04, 0x12, 0xF9,
-0xEE, 0x31, 0xD0, 0x90, 0x9A, 0x43, 0xF1, 0x92,
-0xF5, 0x83, 0xEF, 0xF0, 0x90, 0x9A, 0x43, 0xE0,
-0x04, 0xF0, 0x80, 0xDA, 0x78, 0x32, 0x7C, 0x93,
-0x7D, 0x01, 0x7B, 0x01, 0x7A, 0x9A, 0x79, 0x3D,
-0x12, 0xF0, 0x26, 0x7F, 0x00, 0x70, 0x02, 0x7F,
-0x01, 0x22, 0x04, 0xF0, 0x90, 0x9A, 0x34, 0xE0,
-0xFE, 0xA3, 0xE0, 0xFF, 0x90, 0x9A, 0x37, 0xE0,
-0xFD, 0x90, 0x9A, 0x36, 0xE0, 0x2D, 0x04, 0xFD,
-0x90, 0x8A, 0xE9, 0xE0, 0xFA, 0xA3, 0xE0, 0xFB,
-0xF5, 0x82, 0x8A, 0x83, 0x02, 0x04, 0x7E, 0x12,
-0xB7, 0x6F, 0xE4, 0x90, 0x9A, 0x38, 0xF0, 0xA3,
-0xF0, 0x12, 0xA4, 0x62, 0xEF, 0x54, 0x0C, 0x64,
-0x08, 0x70, 0x42, 0x51, 0x3C, 0xA3, 0xE0, 0x24,
-0x06, 0x31, 0xCF, 0xEF, 0x64, 0x88, 0x70, 0x35,
-0x51, 0x3C, 0xA3, 0xE0, 0x24, 0x07, 0x31, 0xCF,
-0xEF, 0x64, 0x8E, 0x70, 0x28, 0x90, 0x9A, 0x38,
-0x31, 0xBA, 0xEF, 0x70, 0x20, 0x51, 0x3C, 0x51,
-0xD2, 0x24, 0x04, 0x31, 0xCF, 0xEF, 0x64, 0x01,
-0x70, 0x13, 0x51, 0x3C, 0x51, 0xD2, 0x24, 0x08,
-0x31, 0xCF, 0xBF, 0x01, 0x08, 0x90, 0x01, 0xC7,
-0x74, 0x0B, 0x12, 0xA7, 0x45, 0x90, 0x9A, 0x38,
-0xE0, 0xFF, 0x22, 0xF0, 0x90, 0x9A, 0x34, 0xE0,
-0xFE, 0xA3, 0xE0, 0xFF, 0x22, 0x12, 0xB7, 0x6F,
-0xE4, 0x90, 0x9A, 0x39, 0xF0, 0x12, 0xA4, 0x62,
-0xEF, 0x54, 0x0C, 0x64, 0x08, 0x70, 0x75, 0x51,
-0x3C, 0xA3, 0xE0, 0x24, 0x06, 0x31, 0xCF, 0xEF,
-0x64, 0x88, 0x70, 0x68, 0x51, 0x3C, 0xA3, 0xE0,
-0x24, 0x07, 0x31, 0xCF, 0xEF, 0x64, 0x8E, 0x70,
-0x5B, 0x90, 0x9A, 0x39, 0x31, 0xBA, 0xEF, 0x64,
-0x03, 0x70, 0x51, 0x51, 0x3C, 0x51, 0xD2, 0x24,
-0x06, 0x31, 0xCF, 0xEF, 0x30, 0xE3, 0x07, 0x90,
-0x01, 0xC7, 0x74, 0x01, 0x80, 0x3B, 0x90, 0x93,
-0x24, 0x12, 0x97, 0xDE, 0x30, 0xE0, 0x24, 0x90,
-0x98, 0x35, 0xE0, 0x64, 0x02, 0x70, 0x12, 0x90,
-0x93, 0x25, 0x12, 0x97, 0xDE, 0x30, 0xE0, 0x02,
-0x80, 0x07, 0x90, 0x01, 0xC7, 0x74, 0x02, 0x80,
-0x18, 0x51, 0x3C, 0xA3, 0xE0, 0xFD, 0x12, 0xA4,
-0x72, 0x80, 0x11, 0x90, 0x93, 0x29, 0x12, 0xAF,
-0xE7, 0x30, 0xE0, 0x08, 0x90, 0x01, 0xC7, 0x74,
-0x02, 0x12, 0xA7, 0x45, 0x90, 0x9A, 0x39, 0xE0,
-0xFF, 0x22, 0x90, 0x9A, 0x37, 0xE0, 0xFD, 0x90,
-0x9A, 0x36, 0xE0, 0x2D, 0x22, 0x90, 0x9A, 0x36,
-0xED, 0x12, 0xB7, 0x76, 0x31, 0x71, 0xEF, 0x60,
-0x09, 0x51, 0x3C, 0x12, 0xFB, 0x20, 0x60, 0x02,
-0x7F, 0x01, 0x22, 0x12, 0xB7, 0x77, 0xA3, 0xED,
-0xF0, 0xE4, 0xA3, 0xF0, 0xF1, 0x9B, 0x50, 0x20,
-0x51, 0x3C, 0xED, 0x24, 0x1C, 0x31, 0xCF, 0x90,
-0x9A, 0x37, 0xE0, 0x24, 0xC7, 0xF5, 0x82, 0xE4,
-0x34, 0x95, 0xF5, 0x83, 0xE0, 0xB5, 0x07, 0x1D,
-0x90, 0x9A, 0x37, 0xE0, 0x04, 0xF0, 0x80, 0xDC,
-0x90, 0x06, 0x32, 0xE0, 0x44, 0x80, 0xF0, 0x90,
-0x01, 0xC7, 0x74, 0x30, 0xF0, 0x7F, 0x01, 0x12,
-0xA7, 0x56, 0x7F, 0x01, 0x22, 0x7F, 0x00, 0x22,
-0x12, 0xB7, 0x77, 0xA3, 0xED, 0xF0, 0x90, 0x95,
-0x99, 0xE0, 0x70, 0x02, 0xA3, 0xE0, 0x60, 0x2C,
-0xE4, 0x90, 0x9A, 0x37, 0xF0, 0xF1, 0x9B, 0x50,
-0x26, 0x51, 0x3C, 0xED, 0x24, 0x1C, 0x31, 0xCF,
-0x90, 0x9A, 0x37, 0xE0, 0x24, 0xA7, 0xF5, 0x82,
-0xE4, 0x34, 0x95, 0xF5, 0x83, 0xE0, 0x6F, 0x60,
-0x03, 0x7F, 0x00, 0x22, 0x90, 0x9A, 0x37, 0xE0,
-0x04, 0xF0, 0x80, 0xD9, 0x7F, 0x00, 0x22, 0x90,
-0x06, 0x32, 0xE0, 0x44, 0x40, 0xF0, 0xE4, 0x90,
-0x95, 0xA5, 0xF0, 0xA3, 0xF0, 0x7F, 0x01, 0x22,
-0x12, 0xB7, 0x77, 0xA3, 0xED, 0xF0, 0x78, 0x37,
+0x90, 0x02, 0x86, 0xE0, 0x20, 0xE2, 0x03, 0x7F,
+0x04, 0x22, 0x90, 0x02, 0x86, 0xE0, 0x7F, 0x01,
+0x20, 0xE1, 0x02, 0x7F, 0x02, 0x22, 0xD3, 0x10,
+0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0xF1, 0xAB, 0x20,
+0xE0, 0x0C, 0x90, 0x00, 0x04, 0xE0, 0x54, 0xF7,
+0xF0, 0x12, 0xCC, 0x60, 0xE1, 0xA6, 0x12, 0x8F,
+0x6A, 0xFF, 0x54, 0x01, 0xFE, 0x90, 0x93, 0x29,
+0x12, 0xD7, 0x4C, 0xFD, 0xEF, 0x54, 0xFB, 0x4D,
+0xFF, 0x90, 0x93, 0x29, 0x12, 0x9F, 0xE1, 0xF1,
+0xB4, 0xFF, 0x90, 0x93, 0x29, 0xF1, 0xC6, 0x12,
+0x9F, 0xE9, 0xF1, 0xBD, 0xFF, 0x90, 0x93, 0x29,
+0xF1, 0xCF, 0xF0, 0x12, 0x9C, 0x5A, 0x54, 0x80,
+0xFF, 0x90, 0x93, 0x2A, 0xE0, 0x54, 0x7F, 0x12,
+0x87, 0xD0, 0xFF, 0x54, 0x02, 0xFE, 0x90, 0x93,
+0x2D, 0xE0, 0x54, 0xFD, 0x4E, 0xFE, 0xF0, 0xEF,
+0x54, 0x08, 0xFF, 0xEE, 0x54, 0xF7, 0x4F, 0x12,
+0x87, 0x9B, 0x90, 0x93, 0x2E, 0x12, 0x87, 0xD1,
+0x54, 0x10, 0xFF, 0x90, 0x93, 0x2D, 0xE0, 0x54,
+0xEF, 0x4F, 0xF0, 0x12, 0x02, 0x06, 0xFF, 0x13,
+0x13, 0x54, 0x3F, 0x30, 0xE0, 0x07, 0x90, 0x06,
+0x90, 0xE0, 0x44, 0x04, 0xF0, 0x12, 0xAF, 0xEB,
+0x30, 0xE0, 0x07, 0x90, 0x06, 0x90, 0xE0, 0x44,
+0x08, 0xF0, 0x90, 0x93, 0x2E, 0xE0, 0x70, 0x02,
+0x04, 0xF0, 0x12, 0xC7, 0x95, 0x12, 0x87, 0xD2,
+0xC4, 0x54, 0x0F, 0x30, 0xE0, 0x0E, 0x7F, 0x05,
+0x12, 0x7B, 0x41, 0xEF, 0x54, 0x7F, 0xFD, 0x7F,
+0x05, 0x12, 0x7B, 0x2E, 0x90, 0x86, 0xB3, 0xE0,
+0xB4, 0x02, 0x06, 0x12, 0xA8, 0xA6, 0x20, 0xE0,
+0x66, 0x90, 0x99, 0xB1, 0x12, 0x9C, 0x57, 0x54,
+0x7F, 0xFF, 0x90, 0x93, 0x2A, 0xE0, 0x54, 0x80,
+0x12, 0x87, 0xE5, 0x54, 0x7F, 0xFF, 0x90, 0x93,
+0x2B, 0xE0, 0x54, 0x80, 0x12, 0x87, 0xA2, 0xFF,
+0x54, 0x01, 0xFE, 0x90, 0x93, 0x2C, 0xE0, 0x54,
+0xFE, 0x4E, 0xFE, 0xF0, 0xEF, 0x54, 0xFE, 0xFF,
+0xEE, 0x54, 0x01, 0x12, 0x87, 0xD0, 0xFF, 0x54,
+0x04, 0xFE, 0x90, 0x93, 0x2D, 0xE0, 0x54, 0xFB,
+0x4E, 0xFE, 0xF0, 0xEF, 0x54, 0x01, 0xFF, 0xEE,
+0x54, 0xFE, 0x4F, 0xF0, 0x12, 0xBA, 0x1E, 0x54,
+0x07, 0x7D, 0x00, 0x20, 0xE0, 0x02, 0x7D, 0x01,
+0x12, 0xB8, 0xD1, 0x90, 0x93, 0x2D, 0xE0, 0xFF,
+0xC3, 0x13, 0x30, 0xE0, 0x02, 0xF1, 0xD9, 0x90,
+0x86, 0xB3, 0xE0, 0xB4, 0x01, 0x07, 0x90, 0xFE,
+0x10, 0xE0, 0x44, 0x04, 0xF0, 0x7E, 0x00, 0x7F,
+0x60, 0x7D, 0x00, 0x7B, 0x01, 0x7A, 0x95, 0x79,
+0x33, 0x12, 0x04, 0x80, 0x90, 0x95, 0x63, 0x74,
+0x05, 0xF0, 0x12, 0x9F, 0x90, 0x7B, 0x01, 0x7A,
+0x94, 0x79, 0x42, 0x12, 0x04, 0x80, 0xD0, 0xD0,
+0x92, 0xAF, 0x22, 0x90, 0x99, 0xB1, 0x12, 0x82,
+0x27, 0x02, 0x02, 0x06, 0xFE, 0x54, 0x10, 0xFD,
+0xEF, 0x54, 0xEF, 0x4D, 0x22, 0xFE, 0x54, 0x40,
+0xFD, 0xEF, 0x54, 0xBF, 0x4D, 0x22, 0xF0, 0xEE,
+0x54, 0x20, 0xFE, 0xEF, 0x54, 0xDF, 0x22, 0xF0,
+0xEE, 0x54, 0x80, 0xFE, 0xEF, 0x54, 0x7F, 0x4E,
+0x22, 0x90, 0x98, 0x49, 0x74, 0x06, 0xF0, 0x90,
+0x98, 0x48, 0x74, 0x08, 0xF0, 0x90, 0x00, 0x4A,
+0xE0, 0x54, 0xFE, 0xF0, 0x90, 0x00, 0x4F, 0xE0,
+0x44, 0x40, 0xF0, 0x90, 0x00, 0x40, 0xE0, 0x44,
+0x08, 0xF0, 0x90, 0x93, 0x29, 0xE0, 0xC4, 0x13,
+0x54, 0x07, 0x90, 0x00, 0x65, 0x30, 0xE0, 0x06,
+0xE0, 0x44, 0x20, 0xF0, 0x80, 0x04, 0xE0, 0x54,
+0xDF, 0xF0, 0x12, 0xBF, 0xE6, 0xFB, 0x7D, 0x01,
+0x02, 0xBA, 0x4C, 0x90, 0x93, 0x31, 0xE0, 0x30,
+0xE0, 0x0D, 0x90, 0x93, 0x29, 0xE0, 0xC4, 0x54,
+0x0F, 0x20, 0xE0, 0x03, 0x7F, 0x00, 0x22, 0x7F,
+0x01, 0x22, 0xEF, 0x90, 0x01, 0xC7, 0xB4, 0xA0,
+0x05, 0x74, 0x04, 0xF0, 0x80, 0x03, 0x74, 0x08,
+0xF0, 0x02, 0xA7, 0x71, 0x11, 0x98, 0xE4, 0x90,
+0x9A, 0x3C, 0xF0, 0x90, 0x9A, 0x3C, 0xE0, 0xFD,
+0xC3, 0x94, 0x06, 0x50, 0x1D, 0x90, 0x9A, 0x35,
+0xE0, 0x24, 0x10, 0x12, 0xA6, 0x31, 0xFE, 0x12,
+0xAF, 0xC7, 0x90, 0x9A, 0x3C, 0xE0, 0x24, 0x36,
+0xF5, 0x82, 0xE4, 0x34, 0x9A, 0x12, 0xA4, 0x8B,
+0x80, 0xD9, 0x78, 0x38, 0x7C, 0x93, 0x7D, 0x01,
+0x7B, 0x01, 0x7A, 0x9A, 0x79, 0x36, 0x11, 0x87,
+0x7F, 0x00, 0x70, 0x02, 0x7F, 0x01, 0x22, 0x7E,
+0x00, 0x7F, 0x06, 0x12, 0x83, 0xDC, 0xEF, 0x22,
+0x90, 0x9A, 0x36, 0xED, 0xF0, 0xA3, 0xEB, 0xF0,
+0x90, 0x9A, 0x34, 0xEE, 0xF0, 0xA3, 0xEF, 0xF0,
+0x22, 0x11, 0x98, 0xA3, 0xED, 0xF0, 0x78, 0x37,
 0x7C, 0x9A, 0x7D, 0x01, 0x7B, 0xFF, 0x7A, 0x80,
 0x79, 0x94, 0x7E, 0x00, 0x7F, 0x06, 0x12, 0x01,
-0xE0, 0x12, 0xFB, 0x17, 0x7A, 0x80, 0x79, 0x9A,
-0xB1, 0x70, 0x78, 0x4D, 0x7C, 0x9A, 0x7D, 0x01,
-0x7B, 0xFF, 0x7A, 0x80, 0x79, 0xAA, 0xB1, 0x70,
-0xE4, 0x90, 0x9A, 0x60, 0x51, 0x3B, 0xA3, 0xE0,
-0xFD, 0x12, 0xF1, 0x90, 0xEF, 0x64, 0x01, 0x60,
-0x02, 0xA1, 0x58, 0x12, 0xB5, 0xAD, 0xCF, 0x24,
-0x0E, 0xCF, 0x34, 0x00, 0x12, 0xA4, 0x61, 0xEF,
-0x64, 0x3A, 0x60, 0x02, 0xA1, 0x58, 0x12, 0xB5,
-0xAD, 0xCF, 0x24, 0x30, 0xCF, 0x34, 0x00, 0x12,
-0xA4, 0x61, 0xEF, 0x64, 0x87, 0x60, 0x02, 0xA1,
-0x58, 0x90, 0x9A, 0x60, 0x04, 0xF0, 0xE4, 0x90,
-0x9A, 0x5D, 0xF0, 0xB1, 0x5E, 0x94, 0x10, 0x50,
-0x1B, 0x12, 0xB7, 0x63, 0x12, 0xB5, 0xB8, 0xCD,
-0x24, 0x38, 0x12, 0xA4, 0x56, 0x90, 0x9A, 0x5D,
-0xE0, 0x24, 0x4D, 0xF5, 0x82, 0xE4, 0x34, 0x9A,
-0xB1, 0x65, 0x80, 0xDF, 0xE4, 0x90, 0x9A, 0x5E,
-0xF0, 0x90, 0x9A, 0x5E, 0xE0, 0xFF, 0xC3, 0x94,
-0x02, 0x40, 0x02, 0xA1, 0x58, 0x75, 0xF0, 0x38,
-0xEF, 0xB1, 0x77, 0x20, 0xE0, 0x02, 0xA1, 0x58,
-0xE4, 0x90, 0x9A, 0x5F, 0xF0, 0xB1, 0x7F, 0x90,
-0x93, 0x62, 0x12, 0x04, 0x6E, 0xE0, 0xFE, 0x90,
-0x9A, 0x5F, 0xE0, 0xC3, 0x9E, 0x40, 0x02, 0xA1,
-0x50, 0xEF, 0x75, 0xF0, 0x38, 0xA4, 0x24, 0x79,
-0xF9, 0x74, 0x93, 0x35, 0xF0, 0xFA, 0x7B, 0x01,
-0xE0, 0x75, 0xF0, 0x10, 0xA4, 0x29, 0xF9, 0xEA,
-0x35, 0xF0, 0xFA, 0x78, 0x4D, 0x7C, 0x9A, 0xB1,
-0x88, 0x60, 0x02, 0xA1, 0x41, 0x90, 0x06, 0x33,
-0xE0, 0x44, 0x01, 0x54, 0xFB, 0xF0, 0xE4, 0x90,
-0x9A, 0x5D, 0xF0, 0xB1, 0x5E, 0x94, 0x06, 0x50,
-0x16, 0x12, 0xB7, 0x63, 0x12, 0xB5, 0xB8, 0xCD,
-0x24, 0x4A, 0x12, 0xA4, 0x56, 0x90, 0x9A, 0x5D,
-0x12, 0xFB, 0x0E, 0xB1, 0x65, 0x80, 0xE4, 0xE4,
-0x90, 0x9A, 0x5D, 0xF0, 0xB1, 0x5E, 0x94, 0x10,
-0x50, 0x0C, 0x12, 0xA4, 0x42, 0x90, 0x9A, 0x5D,
-0xF1, 0x92, 0xB1, 0x65, 0x80, 0xEE, 0xB1, 0x7F,
-0xB1, 0x77, 0xFE, 0xC3, 0x13, 0x30, 0xE0, 0x2B,
-0xEF, 0x75, 0xF0, 0x38, 0xA4, 0x24, 0x69, 0xF9,
-0x74, 0x93, 0x35, 0xF0, 0xFA, 0x7B, 0x01, 0x78,
-0x3D, 0x7C, 0x9A, 0xB1, 0x88, 0x70, 0x71, 0x90,
-0x98, 0x35, 0xE0, 0xB4, 0x02, 0x0B, 0x90, 0x93,
-0x25, 0x12, 0xAC, 0x3D, 0x20, 0xE0, 0x1E, 0x80,
-0x12, 0x80, 0x1A, 0x90, 0x98, 0x35, 0xE0, 0xB4,
-0x02, 0x13, 0x90, 0x93, 0x25, 0x12, 0xAC, 0x3D,
-0x20, 0xE0, 0x0A, 0x90, 0x01, 0xC7, 0x74, 0x0A,
-0x12, 0xA7, 0x45, 0x80, 0x53, 0x7B, 0x01, 0x7A,
-0x9A, 0x79, 0x37, 0x90, 0x9A, 0x64, 0x12, 0x82,
-0x27, 0x7A, 0x9A, 0x79, 0x4D, 0x90, 0x9A, 0x67,
-0x12, 0x82, 0x27, 0x90, 0x9A, 0x5E, 0xE0, 0x75,
-0xF0, 0x38, 0xA4, 0x24, 0x63, 0xF9, 0x74, 0x93,
-0x35, 0xF0, 0xFA, 0x90, 0x9A, 0x6A, 0x12, 0x82,
-0x27, 0xE4, 0x90, 0x9A, 0x6D, 0xF0, 0xA3, 0xF0,
-0x7A, 0x9A, 0x79, 0x3D, 0x12, 0x8A, 0x45, 0x80,
-0x07, 0x90, 0x06, 0x33, 0xE0, 0x44, 0x05, 0xF0,
-0x90, 0x9A, 0x5F, 0xE0, 0x04, 0xF0, 0x81, 0x3D,
-0x90, 0x9A, 0x5E, 0xE0, 0x04, 0xF0, 0x81, 0x21,
-0x90, 0x9A, 0x60, 0xE0, 0xFF, 0x22, 0x90, 0x9A,
-0x5D, 0xE0, 0xFF, 0xC3, 0x22, 0xF5, 0x83, 0xEF,
-0xF0, 0x90, 0x9A, 0x5D, 0xE0, 0x04, 0xF0, 0x22,
-0x7E, 0x00, 0x7F, 0x10, 0x02, 0x01, 0xE0, 0x90,
-0x93, 0x61, 0x12, 0x04, 0x6E, 0xE0, 0x22, 0x90,
-0x9A, 0x5E, 0xE0, 0xFF, 0x75, 0xF0, 0x38, 0x22,
-0x7D, 0x01, 0x7E, 0x00, 0x7F, 0x10, 0x12, 0x83,
-0xDC, 0xEF, 0x22, 0xD3, 0x10, 0xAF, 0x01, 0xC3,
-0xC0, 0xD0, 0x90, 0x9A, 0x42, 0xEE, 0xF0, 0xA3,
-0xEF, 0xF0, 0x90, 0x98, 0x36, 0xE0, 0xFF, 0xB4,
-0x02, 0x07, 0xF1, 0x8A, 0x74, 0x08, 0xF0, 0x80,
-0x09, 0xEF, 0xB4, 0x04, 0x05, 0xF1, 0x8A, 0x74,
-0x10, 0xF0, 0x90, 0x9A, 0x42, 0xE0, 0xFE, 0xA3,
-0xE0, 0xFF, 0x64, 0x02, 0x4E, 0x60, 0x08, 0xEF,
-0x64, 0x01, 0x4E, 0x60, 0x02, 0xE1, 0x60, 0x90,
-0x94, 0x9A, 0x12, 0xFB, 0x46, 0x90, 0x9A, 0xCF,
-0xEE, 0xF0, 0xA3, 0xEF, 0xF0, 0x7E, 0x00, 0x7F,
-0x28, 0x7D, 0x00, 0x7B, 0x01, 0x7A, 0x9A, 0x79,
-0x65, 0x12, 0x04, 0x80, 0x7E, 0x00, 0x7F, 0x40,
-0x7D, 0x00, 0x7B, 0x01, 0x7A, 0x9A, 0x79, 0x8D,
-0x12, 0x04, 0x80, 0x90, 0x9A, 0x42, 0xE0, 0x70,
-0x04, 0xA3, 0xE0, 0x64, 0x01, 0x70, 0x4C, 0x75,
-0x45, 0x01, 0x75, 0x46, 0x94, 0x75, 0x47, 0x6A,
-0x75, 0x48, 0x10, 0x7B, 0x01, 0x7A, 0x9A, 0x79,
-0xD1, 0xF1, 0xDB, 0x75, 0x46, 0x94, 0x75, 0x47,
-0x09, 0x75, 0x48, 0x10, 0x7B, 0x01, 0x7A, 0x9A,
-0x79, 0xE1, 0x12, 0x69, 0xF5, 0xF1, 0xAD, 0x74,
-0x20, 0xF1, 0xC7, 0x90, 0x8F, 0x3A, 0xF1, 0x82,
-0x90, 0x8F, 0x3D, 0xF1, 0xA4, 0x90, 0x8F, 0x40,
-0xF0, 0x7A, 0x9A, 0x79, 0xD1, 0x12, 0x4C, 0x23,
-0x75, 0x45, 0x01, 0x75, 0x46, 0x9A, 0x75, 0x47,
-0x8D, 0x80, 0x24, 0xF1, 0xAD, 0x74, 0x10, 0xF1,
-0xC7, 0x90, 0x91, 0x8C, 0xF1, 0x82, 0x90, 0x91,
-0x8F, 0xF1, 0xA4, 0x90, 0x91, 0x92, 0xF0, 0x7A,
-0x94, 0x79, 0x09, 0x12, 0x61, 0x34, 0x75, 0x45,
-0x01, 0x75, 0x46, 0x9A, 0x75, 0x47, 0x95, 0x75,
-0x48, 0x28, 0x7B, 0x01, 0x7A, 0x9A, 0x79, 0x65,
-0x12, 0x69, 0xF5, 0x90, 0x94, 0x3D, 0xE0, 0x64,
-0xFE, 0x70, 0x1A, 0x90, 0x94, 0x3F, 0xE0, 0x54,
-0x30, 0xFF, 0xC4, 0x54, 0x0F, 0xF1, 0x7A, 0x75,
-0x46, 0x9A, 0x75, 0x47, 0x65, 0xF1, 0xB7, 0xE0,
-0x44, 0x10, 0xF0, 0x80, 0x31, 0x90, 0x94, 0x3D,
-0xE0, 0xFF, 0x64, 0x02, 0x60, 0x05, 0xEF, 0x64,
-0x03, 0x70, 0x16, 0x90, 0x9A, 0x6B, 0xE0, 0x54,
-0x03, 0xF1, 0x7A, 0x75, 0x46, 0x9A, 0x75, 0x47,
-0x6D, 0xF1, 0xB7, 0xE0, 0x44, 0x20, 0xF0, 0x80,
-0x0D, 0x90, 0x9A, 0x64, 0x74, 0x05, 0xF0, 0x90,
-0x06, 0x33, 0xE0, 0x44, 0x40, 0xF0, 0x78, 0x43,
-0x7C, 0x95, 0x7D, 0x01, 0x7B, 0x01, 0x7A, 0x9A,
-0x79, 0x44, 0xB1, 0x8A, 0x70, 0x09, 0x90, 0x06,
-0x33, 0xE0, 0x44, 0x08, 0xF0, 0x80, 0x71, 0x90,
-0x9A, 0x64, 0xE0, 0xFF, 0xC3, 0x94, 0x04, 0x50,
-0x61, 0x90, 0x95, 0x63, 0xEF, 0xF0, 0x75, 0x45,
-0x01, 0x75, 0x46, 0x9A, 0x75, 0x47, 0x44, 0x75,
-0x48, 0x20, 0x7B, 0x01, 0x7A, 0x95, 0x79, 0x43,
-0x12, 0x69, 0xF5, 0x90, 0x9A, 0x64, 0xE0, 0xFF,
-0x90, 0x98, 0x36, 0xE0, 0xFD, 0x7B, 0x01, 0x7A,
-0x9A, 0x79, 0x44, 0x12, 0x9E, 0x7A, 0x90, 0x95,
-0x63, 0xE0, 0x14, 0x60, 0x12, 0x14, 0x60, 0x17,
-0x14, 0x60, 0x1C, 0x24, 0x03, 0x70, 0x29, 0xF1,
-0x65, 0x7A, 0x95, 0x79, 0x73, 0x80, 0x16, 0xF1,
-0x65, 0x7A, 0x95, 0x79, 0x7B, 0x80, 0x0E, 0xF1,
-0x65, 0x7A, 0x95, 0x79, 0x83, 0x80, 0x06, 0xF1,
-0x65, 0x7A, 0x95, 0x79, 0x8B, 0x12, 0x9C, 0x5A,
-0x80, 0x06, 0x90, 0x95, 0x63, 0x74, 0x05, 0xF0,
-0xD0, 0xD0, 0x92, 0xAF, 0x22, 0x7B, 0x01, 0x7A,
-0x94, 0x79, 0x7A, 0x90, 0x9C, 0x90, 0x12, 0x82,
-0x27, 0x90, 0x98, 0x36, 0xE0, 0x90, 0x9C, 0x93,
-0xF0, 0x22, 0x90, 0x9A, 0x64, 0xF0, 0x75, 0x45,
-0x01, 0x22, 0x12, 0x82, 0x27, 0x7A, 0x9A, 0x79,
-0x8D, 0x22, 0x90, 0x9A, 0xCD, 0x74, 0x80, 0xF0,
-0xA3, 0x22, 0xE0, 0x24, 0x3D, 0xF5, 0x82, 0xE4,
-0x34, 0x9A, 0x22, 0x90, 0x9A, 0x37, 0xE0, 0xFD,
-0xC3, 0x94, 0x02, 0x22, 0x12, 0x82, 0x27, 0x90,
-0x9A, 0xCF, 0xA3, 0xE0, 0x22, 0x90, 0x9A, 0xCF,
-0xA3, 0xE0, 0xFB, 0x90, 0x92, 0x06, 0x22, 0x75,
-0x48, 0x20, 0x7B, 0x01, 0x7A, 0x9A, 0x79, 0x44,
-0x12, 0x69, 0xF5, 0x90, 0x06, 0x33, 0x22, 0xF0,
-0xE4, 0xA3, 0xF0, 0xA3, 0xF0, 0xFD, 0xFC, 0xFF,
-0xFE, 0x12, 0x71, 0xD4, 0x7B, 0x01, 0x7A, 0x94,
-0x79, 0x9C, 0x22, 0x12, 0x69, 0xF5, 0x75, 0x45,
-0x01, 0x22, 0x12, 0xB7, 0x77, 0xE4, 0x90, 0x9A,
-0x3C, 0xF0, 0x90, 0x9A, 0x3C, 0xE0, 0xFD, 0xC3,
-0x94, 0x06, 0x50, 0x1D, 0x90, 0x9A, 0x35, 0xE0,
-0x24, 0x10, 0x12, 0xB5, 0xB7, 0xFE, 0x12, 0xE9,
-0xD0, 0x90, 0x9A, 0x3C, 0xE0, 0x24, 0x36, 0xF5,
-0x82, 0xE4, 0x34, 0x9A, 0x12, 0xA6, 0xA7, 0x80,
-0xD9, 0x78, 0x38, 0x7C, 0x93, 0x7D, 0x01, 0x7B,
-0x01, 0x7A, 0x9A, 0x79, 0x36, 0x11, 0x26, 0x7F,
-0x00, 0x70, 0x02, 0x7F, 0x01, 0x22, 0x7E, 0x00,
-0x7F, 0x06, 0x12, 0x83, 0xDC, 0xEF, 0x22, 0xD3,
+0xE0, 0x12, 0xFB, 0x65, 0x7A, 0x80, 0x79, 0x9A,
+0x51, 0x8A, 0x78, 0x4D, 0x7C, 0x9A, 0x7D, 0x01,
+0x7B, 0xFF, 0x7A, 0x80, 0x79, 0xAA, 0x51, 0x8A,
+0xE4, 0x90, 0x9A, 0x60, 0x12, 0xAF, 0x1A, 0xA3,
+0xE0, 0xFD, 0x12, 0xF1, 0x68, 0xEF, 0x64, 0x01,
+0x60, 0x02, 0x41, 0x72, 0x12, 0xA6, 0x27, 0xCF,
+0x24, 0x0E, 0xCF, 0x34, 0x00, 0x12, 0xA2, 0x3B,
+0xEF, 0x64, 0x3A, 0x60, 0x02, 0x41, 0x72, 0x12,
+0xA6, 0x27, 0xCF, 0x24, 0x30, 0xCF, 0x34, 0x00,
+0x12, 0xA2, 0x3B, 0xEF, 0x64, 0x87, 0x60, 0x02,
+0x41, 0x72, 0x90, 0x9A, 0x60, 0x04, 0xF0, 0xE4,
+0x90, 0x9A, 0x5D, 0xF0, 0x51, 0x78, 0x94, 0x10,
+0x50, 0x1B, 0x12, 0xA7, 0x92, 0x12, 0xA6, 0x32,
+0xCD, 0x24, 0x38, 0x12, 0xA2, 0x30, 0x90, 0x9A,
+0x5D, 0xE0, 0x24, 0x4D, 0xF5, 0x82, 0xE4, 0x34,
+0x9A, 0x51, 0x7F, 0x80, 0xDF, 0xE4, 0x90, 0x9A,
+0x5E, 0xF0, 0x90, 0x9A, 0x5E, 0xE0, 0xFF, 0xC3,
+0x94, 0x02, 0x40, 0x02, 0x41, 0x72, 0x75, 0xF0,
+0x38, 0xEF, 0x51, 0x91, 0x20, 0xE0, 0x02, 0x41,
+0x72, 0xE4, 0x90, 0x9A, 0x5F, 0xF0, 0x51, 0x99,
+0x90, 0x93, 0x62, 0x12, 0x04, 0x6E, 0xE0, 0xFE,
+0x90, 0x9A, 0x5F, 0xE0, 0xC3, 0x9E, 0x40, 0x02,
+0x41, 0x6A, 0xEF, 0x75, 0xF0, 0x38, 0xA4, 0x24,
+0x79, 0xF9, 0x74, 0x93, 0x35, 0xF0, 0xFA, 0x7B,
+0x01, 0xE0, 0x75, 0xF0, 0x10, 0xA4, 0x29, 0xF9,
+0xEA, 0x35, 0xF0, 0xFA, 0x78, 0x4D, 0x7C, 0x9A,
+0x51, 0xA2, 0x60, 0x02, 0x41, 0x5B, 0x90, 0x06,
+0x33, 0xE0, 0x44, 0x01, 0x54, 0xFB, 0xF0, 0xE4,
+0x90, 0x9A, 0x5D, 0xF0, 0x51, 0x78, 0x94, 0x06,
+0x50, 0x16, 0x12, 0xA7, 0x92, 0x12, 0xA6, 0x32,
+0xCD, 0x24, 0x4A, 0x12, 0xA2, 0x30, 0x90, 0x9A,
+0x5D, 0x12, 0xFB, 0x5C, 0x51, 0x7F, 0x80, 0xE4,
+0xE4, 0x90, 0x9A, 0x5D, 0xF0, 0x51, 0x78, 0x94,
+0x10, 0x50, 0x0D, 0x12, 0xA2, 0x1C, 0x90, 0x9A,
+0x5D, 0x12, 0xFA, 0x8C, 0x51, 0x7F, 0x80, 0xED,
+0x51, 0x99, 0x51, 0x91, 0xFE, 0xC3, 0x13, 0x30,
+0xE0, 0x2B, 0xEF, 0x75, 0xF0, 0x38, 0xA4, 0x24,
+0x69, 0xF9, 0x74, 0x93, 0x35, 0xF0, 0xFA, 0x7B,
+0x01, 0x78, 0x3D, 0x7C, 0x9A, 0x51, 0xA2, 0x70,
+0x71, 0x90, 0x98, 0x35, 0xE0, 0xB4, 0x02, 0x0B,
+0x90, 0x93, 0x25, 0x12, 0xB4, 0xAD, 0x20, 0xE0,
+0x1E, 0x80, 0x12, 0x80, 0x1A, 0x90, 0x98, 0x35,
+0xE0, 0xB4, 0x02, 0x13, 0x90, 0x93, 0x25, 0x12,
+0xB4, 0xAD, 0x20, 0xE0, 0x0A, 0x90, 0x01, 0xC7,
+0x74, 0x0A, 0x12, 0xA7, 0x70, 0x80, 0x53, 0x7B,
+0x01, 0x7A, 0x9A, 0x79, 0x37, 0x90, 0x9A, 0x64,
+0x12, 0x82, 0x27, 0x7A, 0x9A, 0x79, 0x4D, 0x90,
+0x9A, 0x67, 0x12, 0x82, 0x27, 0x90, 0x9A, 0x5E,
+0xE0, 0x75, 0xF0, 0x38, 0xA4, 0x24, 0x63, 0xF9,
+0x74, 0x93, 0x35, 0xF0, 0xFA, 0x90, 0x9A, 0x6A,
+0x12, 0x82, 0x27, 0xE4, 0x90, 0x9A, 0x6D, 0xF0,
+0xA3, 0xF0, 0x7A, 0x9A, 0x79, 0x3D, 0x12, 0x8A,
+0x45, 0x80, 0x07, 0x90, 0x06, 0x33, 0xE0, 0x44,
+0x05, 0xF0, 0x90, 0x9A, 0x5F, 0xE0, 0x04, 0xF0,
+0x21, 0x56, 0x90, 0x9A, 0x5E, 0xE0, 0x04, 0xF0,
+0x21, 0x3A, 0x90, 0x9A, 0x60, 0xE0, 0xFF, 0x22,
+0x90, 0x9A, 0x5D, 0xE0, 0xFF, 0xC3, 0x22, 0xF5,
+0x83, 0xEF, 0xF0, 0x90, 0x9A, 0x5D, 0xE0, 0x04,
+0xF0, 0x22, 0x7E, 0x00, 0x7F, 0x10, 0x02, 0x01,
+0xE0, 0x90, 0x93, 0x61, 0x12, 0x04, 0x6E, 0xE0,
+0x22, 0x90, 0x9A, 0x5E, 0xE0, 0xFF, 0x75, 0xF0,
+0x38, 0x22, 0x7D, 0x01, 0x7E, 0x00, 0x7F, 0x10,
+0x12, 0x83, 0xDC, 0xEF, 0x22, 0xD3, 0x10, 0xAF,
+0x01, 0xC3, 0xC0, 0xD0, 0x90, 0x9A, 0x42, 0xEE,
+0xF0, 0xA3, 0xEF, 0xF0, 0x90, 0x98, 0x36, 0xE0,
+0xFF, 0xB4, 0x02, 0x07, 0x91, 0xA5, 0x74, 0x08,
+0xF0, 0x80, 0x09, 0xEF, 0xB4, 0x04, 0x05, 0x91,
+0xA5, 0x74, 0x10, 0xF0, 0x90, 0x9A, 0x42, 0xE0,
+0xFE, 0xA3, 0xE0, 0xFF, 0x64, 0x02, 0x4E, 0x60,
+0x08, 0xEF, 0x64, 0x01, 0x4E, 0x60, 0x02, 0x81,
+0x7B, 0x90, 0x94, 0x9A, 0x12, 0xFB, 0x9C, 0x90,
+0x9A, 0xCF, 0xEE, 0xF0, 0xA3, 0xEF, 0xF0, 0x7E,
+0x00, 0x7F, 0x28, 0x7D, 0x00, 0x7B, 0x01, 0x7A,
+0x9A, 0x79, 0x65, 0x12, 0x04, 0x80, 0x7E, 0x00,
+0x7F, 0x40, 0x7D, 0x00, 0x7B, 0x01, 0x7A, 0x9A,
+0x79, 0x8D, 0x12, 0x04, 0x80, 0x90, 0x9A, 0x42,
+0xE0, 0x70, 0x04, 0xA3, 0xE0, 0x64, 0x01, 0x70,
+0x4D, 0x75, 0x45, 0x01, 0x75, 0x46, 0x94, 0x75,
+0x47, 0x6A, 0x75, 0x48, 0x10, 0x7B, 0x01, 0x7A,
+0x9A, 0x79, 0xD1, 0x12, 0xFB, 0x0B, 0x75, 0x46,
+0x94, 0x75, 0x47, 0x09, 0x75, 0x48, 0x10, 0x7B,
+0x01, 0x7A, 0x9A, 0x79, 0xE1, 0x12, 0x69, 0xF5,
+0x91, 0xB6, 0x74, 0x20, 0x91, 0xD0, 0x90, 0x8F,
+0x3A, 0x91, 0x9D, 0x90, 0x8F, 0x3D, 0x91, 0xAD,
+0x90, 0x8F, 0x40, 0xF0, 0x7A, 0x9A, 0x79, 0xD1,
+0x12, 0x4C, 0x23, 0x75, 0x45, 0x01, 0x75, 0x46,
+0x9A, 0x75, 0x47, 0x8D, 0x80, 0x24, 0x91, 0xB6,
+0x74, 0x10, 0x91, 0xD0, 0x90, 0x91, 0x8C, 0x91,
+0x9D, 0x90, 0x91, 0x8F, 0x91, 0xAD, 0x90, 0x91,
+0x92, 0xF0, 0x7A, 0x94, 0x79, 0x09, 0x12, 0x61,
+0x34, 0x75, 0x45, 0x01, 0x75, 0x46, 0x9A, 0x75,
+0x47, 0x95, 0x75, 0x48, 0x28, 0x7B, 0x01, 0x7A,
+0x9A, 0x79, 0x65, 0x12, 0x69, 0xF5, 0x90, 0x94,
+0x3D, 0xE0, 0x64, 0xFE, 0x70, 0x1A, 0x90, 0x94,
+0x3F, 0xE0, 0x54, 0x30, 0xFF, 0xC4, 0x54, 0x0F,
+0x91, 0x95, 0x75, 0x46, 0x9A, 0x75, 0x47, 0x65,
+0x91, 0xC0, 0xE0, 0x44, 0x10, 0xF0, 0x80, 0x31,
+0x90, 0x94, 0x3D, 0xE0, 0xFF, 0x64, 0x02, 0x60,
+0x05, 0xEF, 0x64, 0x03, 0x70, 0x16, 0x90, 0x9A,
+0x6B, 0xE0, 0x54, 0x03, 0x91, 0x95, 0x75, 0x46,
+0x9A, 0x75, 0x47, 0x6D, 0x91, 0xC0, 0xE0, 0x44,
+0x20, 0xF0, 0x80, 0x0D, 0x90, 0x9A, 0x64, 0x74,
+0x05, 0xF0, 0x90, 0x06, 0x33, 0xE0, 0x44, 0x40,
+0xF0, 0x78, 0x43, 0x7C, 0x95, 0x7D, 0x01, 0x7B,
+0x01, 0x7A, 0x9A, 0x79, 0x44, 0x51, 0xA4, 0x70,
+0x09, 0x90, 0x06, 0x33, 0xE0, 0x44, 0x08, 0xF0,
+0x80, 0x71, 0x90, 0x9A, 0x64, 0xE0, 0xFF, 0xC3,
+0x94, 0x04, 0x50, 0x61, 0x90, 0x95, 0x63, 0xEF,
+0xF0, 0x75, 0x45, 0x01, 0x75, 0x46, 0x9A, 0x75,
+0x47, 0x44, 0x75, 0x48, 0x20, 0x7B, 0x01, 0x7A,
+0x95, 0x79, 0x43, 0x12, 0x69, 0xF5, 0x90, 0x9A,
+0x64, 0xE0, 0xFF, 0x90, 0x98, 0x36, 0xE0, 0xFD,
+0x7B, 0x01, 0x7A, 0x9A, 0x79, 0x44, 0x12, 0x9E,
+0x80, 0x90, 0x95, 0x63, 0xE0, 0x14, 0x60, 0x12,
+0x14, 0x60, 0x17, 0x14, 0x60, 0x1C, 0x24, 0x03,
+0x70, 0x29, 0x91, 0x80, 0x7A, 0x95, 0x79, 0x73,
+0x80, 0x16, 0x91, 0x80, 0x7A, 0x95, 0x79, 0x7B,
+0x80, 0x0E, 0x91, 0x80, 0x7A, 0x95, 0x79, 0x83,
+0x80, 0x06, 0x91, 0x80, 0x7A, 0x95, 0x79, 0x8B,
+0x12, 0x9C, 0x60, 0x80, 0x06, 0x90, 0x95, 0x63,
+0x74, 0x05, 0xF0, 0xD0, 0xD0, 0x92, 0xAF, 0x22,
+0x7B, 0x01, 0x7A, 0x94, 0x79, 0x7A, 0x90, 0x9C,
+0x90, 0x12, 0x82, 0x27, 0x90, 0x98, 0x36, 0xE0,
+0x90, 0x9C, 0x93, 0xF0, 0x22, 0x90, 0x9A, 0x64,
+0xF0, 0x75, 0x45, 0x01, 0x22, 0x12, 0x82, 0x27,
+0x7A, 0x9A, 0x79, 0x8D, 0x22, 0x90, 0x9A, 0xCD,
+0x74, 0x80, 0xF0, 0xA3, 0x22, 0x12, 0x82, 0x27,
+0x90, 0x9A, 0xCF, 0xA3, 0xE0, 0x22, 0x90, 0x9A,
+0xCF, 0xA3, 0xE0, 0xFB, 0x90, 0x92, 0x06, 0x22,
+0x75, 0x48, 0x20, 0x7B, 0x01, 0x7A, 0x9A, 0x79,
+0x44, 0x12, 0x69, 0xF5, 0x90, 0x06, 0x33, 0x22,
+0xF0, 0xE4, 0xA3, 0xF0, 0xA3, 0xF0, 0xFD, 0xFC,
+0xFF, 0xFE, 0x12, 0x71, 0xD4, 0x7B, 0x01, 0x7A,
+0x94, 0x79, 0x9C, 0x22, 0x90, 0x9A, 0x3F, 0x12,
+0xA7, 0xE9, 0x12, 0xF3, 0x90, 0x12, 0xFB, 0x41,
+0x51, 0xAD, 0x12, 0xFB, 0x41, 0xA3, 0xE0, 0xFD,
+0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0x90,
+0x9A, 0x42, 0x12, 0xA7, 0xE9, 0x90, 0x9A, 0x5A,
+0x74, 0x18, 0xF0, 0x7E, 0x00, 0x7F, 0x80, 0x7D,
+0x00, 0x7B, 0x01, 0x7A, 0x9A, 0x79, 0x62, 0x12,
+0x04, 0x80, 0x90, 0x98, 0x3A, 0xE0, 0xFF, 0x12,
+0x7B, 0x07, 0x90, 0x9A, 0x59, 0xEF, 0xF0, 0xF9,
+0xE0, 0xFE, 0x24, 0x29, 0xF5, 0x82, 0xE4, 0x34,
+0xFC, 0xF5, 0x83, 0x74, 0x41, 0xF0, 0xEE, 0x24,
+0x28, 0xFD, 0xE4, 0x33, 0xFC, 0x90, 0x9A, 0x5A,
+0xE0, 0x7A, 0x00, 0x2D, 0xFE, 0xEA, 0x3C, 0x90,
+0x9A, 0x5E, 0xF0, 0xA3, 0xCE, 0xF0, 0x74, 0x28,
+0x29, 0xF9, 0xE4, 0x34, 0xFC, 0xFA, 0x7B, 0x01,
+0x90, 0x9A, 0x44, 0xE0, 0xFD, 0x12, 0xF0, 0x46,
+0x12, 0xF9, 0x23, 0x90, 0x9A, 0x5E, 0xE0, 0xFF,
+0xA3, 0xE0, 0x90, 0x9A, 0x5C, 0xCF, 0xF0, 0xA3,
+0xEF, 0xF0, 0x90, 0x9A, 0x62, 0x74, 0x01, 0xF0,
+0xA3, 0x74, 0x03, 0xF0, 0xE4, 0xA3, 0xF0, 0xA3,
+0x74, 0x5F, 0xF0, 0x90, 0x9A, 0x5E, 0xE4, 0x75,
+0xF0, 0x04, 0x12, 0x02, 0xE7, 0x90, 0x94, 0x3D,
+0xE0, 0xFF, 0x7E, 0x02, 0xB4, 0xFE, 0x02, 0x7E,
+0xFE, 0x90, 0x9A, 0x5E, 0xA3, 0xE0, 0xFD, 0x12,
+0x8E, 0x99, 0xEE, 0xF0, 0x74, 0x00, 0x2D, 0x12,
+0x8E, 0x9B, 0xE0, 0x90, 0x9A, 0x66, 0xF0, 0x90,
+0x9A, 0x5E, 0x12, 0xBF, 0xA5, 0x90, 0x95, 0x32,
+0xE0, 0x90, 0x9A, 0x42, 0xB4, 0x01, 0x0B, 0xE0,
+0x44, 0x03, 0xFC, 0xA3, 0xE0, 0x44, 0x10, 0xFD,
+0x80, 0x09, 0xE0, 0x44, 0x03, 0xFC, 0xA3, 0xE0,
+0x44, 0x20, 0xFD, 0x90, 0x9A, 0x60, 0xEC, 0xF0,
+0xA3, 0xED, 0xF0, 0x90, 0x9A, 0x42, 0xE0, 0x70,
+0x04, 0xA3, 0xE0, 0x64, 0x01, 0x90, 0x9A, 0x5E,
+0x70, 0x18, 0xA3, 0xE0, 0xFE, 0x12, 0x8E, 0x99,
+0x12, 0xC3, 0xEA, 0x74, 0x01, 0xF0, 0x90, 0x9A,
+0x67, 0x74, 0x03, 0xF0, 0xA3, 0x74, 0x01, 0xF0,
+0x80, 0x14, 0xA3, 0xE0, 0xFE, 0x12, 0x8E, 0x99,
+0x12, 0xC3, 0xEA, 0x74, 0x02, 0xF0, 0x90, 0x9A,
+0x67, 0x04, 0xF0, 0xA3, 0x14, 0xF0, 0x12, 0xFA,
+0xBA, 0xEF, 0x64, 0xFE, 0x90, 0x9A, 0x5E, 0x70,
+0x21, 0xA3, 0xE0, 0x24, 0x00, 0x12, 0xF9, 0xF1,
+0xC0, 0x03, 0x8B, 0x45, 0x12, 0xFB, 0x01, 0xD0,
+0x03, 0x12, 0xFB, 0x0B, 0x12, 0xFB, 0x01, 0x7B,
+0x01, 0x7A, 0x9A, 0x79, 0x69, 0x12, 0x69, 0xF5,
+0x80, 0x22, 0xE0, 0xFE, 0xA3, 0xE0, 0xFF, 0x24,
+0x00, 0xF5, 0x82, 0x74, 0xFC, 0x3E, 0xF5, 0x83,
+0xE4, 0xF0, 0x74, 0x01, 0x2F, 0xF5, 0x82, 0x74,
+0xFC, 0x3E, 0xF5, 0x83, 0xE4, 0xF0, 0x90, 0x9A,
+0x69, 0xF0, 0xA3, 0xF0, 0x12, 0xFA, 0xBA, 0xE4,
+0x90, 0x9A, 0x5B, 0xF0, 0x12, 0xFA, 0x27, 0xFE,
+0x90, 0x9A, 0x5E, 0xA3, 0xE0, 0xFD, 0xEF, 0x2D,
+0x12, 0x8E, 0x99, 0xEE, 0xF0, 0x12, 0xFA, 0x27,
+0xFE, 0x74, 0x6B, 0x2F, 0xF5, 0x82, 0xE4, 0x34,
+0x9A, 0xF5, 0x83, 0xEE, 0x12, 0xFA, 0xFA, 0xF0,
+0xE0, 0xB4, 0x08, 0xD8, 0x12, 0xF9, 0x2D, 0x90,
+0x9A, 0x5E, 0x12, 0xC7, 0xA9, 0x90, 0x9A, 0x5E,
+0x12, 0xC7, 0xA2, 0x12, 0xF9, 0x23, 0xE4, 0x90,
+0x9A, 0xE5, 0xF0, 0xE4, 0x90, 0x9A, 0x5B, 0xF0,
+0x12, 0xFB, 0x38, 0x50, 0x14, 0x12, 0xFA, 0x0B,
+0xA3, 0x12, 0xF9, 0xAB, 0x12, 0xFA, 0xF0, 0x12,
+0x8E, 0x98, 0xE4, 0x12, 0xFA, 0xFA, 0xF0, 0x80,
+0xE7, 0x12, 0xFB, 0x95, 0x90, 0x06, 0x31, 0xE0,
+0x54, 0xFB, 0xF0, 0x90, 0x98, 0x3B, 0xE0, 0xFD,
+0x12, 0xF3, 0x59, 0xCE, 0xC3, 0x13, 0xCE, 0x13,
+0xD8, 0xF9, 0x12, 0xF3, 0x38, 0xED, 0xFF, 0x90,
+0x98, 0x3A, 0x12, 0xF3, 0x42, 0xC3, 0x33, 0xCE,
+0x33, 0xCE, 0xD8, 0xF9, 0xFF, 0x90, 0x9A, 0x5A,
+0xE0, 0x7C, 0x00, 0x2F, 0xFF, 0xEC, 0x3E, 0xCF,
+0x24, 0x38, 0xCF, 0x34, 0x00, 0xFE, 0x90, 0x92,
+0x06, 0x74, 0x10, 0xF0, 0x7B, 0x63, 0xE4, 0xFD,
+0x12, 0x71, 0xD4, 0x90, 0x9A, 0x42, 0xE0, 0x70,
+0x04, 0xA3, 0xE0, 0x64, 0x01, 0x7B, 0x01, 0x7A,
+0x9A, 0x79, 0x62, 0x70, 0x17, 0x90, 0x91, 0xA0,
+0x12, 0xFB, 0x8D, 0x90, 0x91, 0xA3, 0x12, 0x82,
+0x27, 0x90, 0x91, 0xA6, 0x12, 0xFB, 0x85, 0x12,
+0x6F, 0x34, 0x80, 0x15, 0x90, 0x91, 0x96, 0x12,
+0xFB, 0x8D, 0x90, 0x91, 0x99, 0x12, 0x82, 0x27,
+0x90, 0x91, 0x9C, 0x12, 0xFB, 0x85, 0x12, 0x6E,
+0xF3, 0x90, 0x9A, 0xE5, 0xE0, 0x04, 0xF0, 0x90,
+0x06, 0x31, 0xE0, 0x30, 0xE2, 0x07, 0x12, 0xFB,
+0x7D, 0x50, 0x02, 0xC1, 0xAB, 0x12, 0xFB, 0x7D,
+0x40, 0x0A, 0x90, 0x06, 0x35, 0xE0, 0x44, 0x20,
+0x90, 0x06, 0x34, 0xF0, 0xE4, 0x90, 0x9A, 0x5B,
+0xF0, 0x12, 0xFB, 0x38, 0x50, 0x26, 0x12, 0xFA,
+0x0B, 0xA3, 0x12, 0xF9, 0xAB, 0x12, 0xFA, 0xF0,
+0x90, 0x9A, 0x5B, 0xE0, 0x24, 0x45, 0xF5, 0x82,
+0xE4, 0x34, 0x9A, 0xF5, 0x83, 0xE0, 0xFF, 0x90,
+0x9A, 0x59, 0x12, 0x8E, 0x98, 0xEF, 0x12, 0xFA,
+0xFA, 0xF0, 0x80, 0xD5, 0x90, 0x9A, 0x42, 0xE0,
+0x70, 0x04, 0xA3, 0xE0, 0x64, 0x01, 0x70, 0x0F,
+0x90, 0x98, 0x3A, 0xE0, 0xFF, 0x90, 0x9A, 0x5A,
+0xE0, 0x24, 0x08, 0xFD, 0x12, 0xF1, 0xDF, 0x90,
+0x04, 0x1D, 0xE0, 0x60, 0x25, 0x90, 0x05, 0x22,
+0xE0, 0x90, 0x9A, 0xE4, 0xF0, 0x7B, 0x1D, 0x12,
+0x88, 0xBF, 0xBF, 0x01, 0x07, 0x12, 0xF9, 0x96,
+0x90, 0x04, 0x25, 0xF0, 0x90, 0x9A, 0xE4, 0xE0,
+0xFD, 0x7B, 0x1E, 0xE4, 0xFF, 0x12, 0x8D, 0x1E,
+0x80, 0x07, 0x12, 0xF9, 0x96, 0x90, 0x04, 0x25,
+0xF0, 0x90, 0x04, 0x1F, 0x74, 0x20, 0xF0, 0x90,
+0x88, 0x39, 0xE0, 0x70, 0x05, 0x7F, 0x01, 0x12,
+0x78, 0xC0, 0xD0, 0xD0, 0x92, 0xAF, 0x22, 0xD3,
 0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0xEF, 0x20,
 0xE0, 0x05, 0x90, 0x98, 0x35, 0x80, 0x03, 0x90,
 0x98, 0x36, 0xE0, 0x90, 0x95, 0x64, 0xF0, 0x90,
@@ -10139,16 +10273,16 @@ u8 array_mp_8723d_fw_wowlan[] = {
 0x06, 0xD0, 0xD0, 0x92, 0xAF, 0x22, 0x90, 0x9C,
 0xA3, 0xED, 0xF0, 0x90, 0x9C, 0xA0, 0x12, 0x82,
 0x27, 0xE4, 0x90, 0x9C, 0xA4, 0xF0, 0xA3, 0xF0,
-0x12, 0x02, 0x06, 0xFF, 0x12, 0x9C, 0x54, 0xFD,
+0x12, 0x02, 0x06, 0xFF, 0x12, 0x9C, 0x5A, 0xFD,
 0x12, 0x87, 0xD2, 0xFB, 0x12, 0x8E, 0xC9, 0x90,
 0x9C, 0xA4, 0xEF, 0xF0, 0x90, 0x9C, 0xA0, 0x12,
-0x82, 0x1E, 0x12, 0x87, 0xD2, 0xFF, 0x11, 0x2F,
+0x82, 0x1E, 0x12, 0x87, 0xD2, 0xFF, 0x11, 0x07,
 0x90, 0x9C, 0xA5, 0xEF, 0xF0, 0x90, 0x95, 0x64,
 0xE0, 0x24, 0xFE, 0x60, 0x15, 0x24, 0xFE, 0x60,
 0x11, 0x14, 0x60, 0x07, 0x14, 0x60, 0x04, 0x24,
-0x05, 0x70, 0x43, 0x11, 0xFF, 0xFD, 0x31, 0x0A,
-0x80, 0x0E, 0x11, 0xFF, 0xFD, 0x90, 0x95, 0x64,
-0xE0, 0x90, 0x9C, 0x64, 0xF0, 0x12, 0x9F, 0x1D,
+0x05, 0x70, 0x43, 0x11, 0xD7, 0xFD, 0x11, 0xE2,
+0x80, 0x0E, 0x11, 0xD7, 0xFD, 0x90, 0x95, 0x64,
+0xE0, 0x90, 0x9C, 0x64, 0xF0, 0x12, 0x9F, 0x23,
 0x90, 0x9C, 0xA5, 0xE0, 0xFF, 0x90, 0x9C, 0xA0,
 0x12, 0x82, 0x1E, 0x90, 0x9C, 0xA4, 0xE0, 0x7C,
 0x00, 0x29, 0xF9, 0xEC, 0x3A, 0xFA, 0xC3, 0xE9,
@@ -10161,9 +10295,9 @@ u8 array_mp_8723d_fw_wowlan[] = {
 0x90, 0x9C, 0x8C, 0xF0, 0x90, 0x9C, 0x85, 0x12,
 0x8B, 0xE0, 0x75, 0x48, 0x03, 0x7B, 0x01, 0x7A,
 0x9C, 0x79, 0x89, 0x12, 0x69, 0xF5, 0x90, 0x9C,
-0x88, 0xE0, 0x70, 0x2E, 0xFF, 0x31, 0x63, 0xE0,
-0xB4, 0xFF, 0x06, 0x31, 0x63, 0xE4, 0xF0, 0x80,
-0x07, 0x31, 0x63, 0xE0, 0x04, 0xF0, 0x80, 0x05,
+0x88, 0xE0, 0x70, 0x2E, 0xFF, 0x31, 0x3B, 0xE0,
+0xB4, 0xFF, 0x06, 0x31, 0x3B, 0xE4, 0xF0, 0x80,
+0x07, 0x31, 0x3B, 0xE0, 0x04, 0xF0, 0x80, 0x05,
 0x0F, 0xEF, 0xB4, 0x03, 0xE8, 0x75, 0x45, 0x01,
 0x75, 0x46, 0x9C, 0x75, 0x47, 0x89, 0x75, 0x48,
 0x03, 0x90, 0x9C, 0x85, 0x12, 0x82, 0x1E, 0x12,
@@ -10172,324 +10306,339 @@ u8 array_mp_8723d_fw_wowlan[] = {
 0x07, 0x7E, 0x00, 0x74, 0x00, 0x2F, 0x12, 0x8D,
 0xC5, 0x75, 0x48, 0x70, 0x7B, 0x01, 0x7A, 0x93,
 0x79, 0x61, 0x02, 0x69, 0xF5, 0xEF, 0x60, 0x07,
-0x90, 0x98, 0x3D, 0xE0, 0xFF, 0x31, 0x6E, 0x22,
-0x31, 0xC7, 0x2F, 0xFF, 0xE4, 0x3E, 0xCF, 0x24,
-0x06, 0xCF, 0x34, 0x00, 0x12, 0xA4, 0x61, 0xEF,
-0x64, 0x86, 0x70, 0x20, 0x90, 0x9A, 0x63, 0xE0,
-0xFF, 0x90, 0x9A, 0x62, 0xE0, 0x2F, 0xFF, 0x90,
-0x9A, 0x61, 0xE0, 0x34, 0x00, 0xCF, 0x24, 0x07,
-0xCF, 0x34, 0x00, 0x12, 0xA4, 0x61, 0xBF, 0xDD,
-0x03, 0x7F, 0x01, 0x22, 0x7F, 0x00, 0x22, 0x90,
-0x9A, 0x61, 0xEE, 0xF0, 0xA3, 0xEF, 0xF0, 0xA3,
-0xED, 0xF0, 0x22, 0x90, 0x9A, 0x9B, 0x12, 0x82,
-0x27, 0x90, 0x9A, 0x9E, 0x12, 0x8B, 0xE0, 0x75,
-0x48, 0x10, 0x7B, 0x01, 0x7A, 0x93, 0x79, 0xD1,
-0x12, 0x69, 0xF5, 0x90, 0x9A, 0x9B, 0x12, 0x8B,
-0xE0, 0x75, 0x48, 0x10, 0x7B, 0x01, 0x7A, 0x93,
-0x79, 0xE1, 0x12, 0x69, 0xF5, 0x90, 0x9A, 0xA1,
-0x12, 0x04, 0xB8, 0x90, 0x93, 0xF1, 0x12, 0x04,
-0x31, 0x90, 0x9A, 0xA5, 0xE0, 0x90, 0x93, 0xF8,
-0xF0, 0x22, 0xE4, 0xFE, 0xED, 0x30, 0xE1, 0x11,
-0x90, 0x01, 0x3F, 0xE0, 0x30, 0xE2, 0x0A, 0x74,
-0x04, 0xF0, 0x90, 0x01, 0xC7, 0x74, 0x23, 0xF0,
-0x0E, 0xED, 0x30, 0xE0, 0x24, 0xEF, 0x30, 0xE6,
-0x08, 0x90, 0x01, 0xC7, 0x74, 0x22, 0xF0, 0x7E,
-0x01, 0xEF, 0x30, 0xE7, 0x08, 0x90, 0x01, 0xC7,
-0x74, 0x21, 0xF0, 0x7E, 0x01, 0xEF, 0x30, 0xE5,
-0x08, 0x90, 0x01, 0xC7, 0x74, 0x23, 0xF0, 0x7E,
-0x01, 0xAF, 0x06, 0x22, 0x12, 0x87, 0xED, 0x2E,
-0x90, 0x98, 0x37, 0xF0, 0x12, 0x9C, 0x54, 0xFF,
-0xED, 0x2F, 0x90, 0x98, 0x38, 0x12, 0x87, 0xE6,
-0xFF, 0xED, 0x2F, 0x90, 0x98, 0x39, 0x12, 0x87,
-0xA3, 0xFF, 0xED, 0x2F, 0x90, 0x98, 0x3A, 0x12,
-0x87, 0xD1, 0xFF, 0xED, 0x2F, 0x90, 0x98, 0x3B,
-0x12, 0x87, 0x9B, 0xFF, 0xED, 0x2F, 0x90, 0x98,
-0x3C, 0x12, 0x87, 0xD8, 0x90, 0x98, 0x3D, 0xF0,
-0x22, 0x12, 0x87, 0xED, 0x2E, 0x90, 0x98, 0x45,
-0xF0, 0x12, 0x9C, 0x54, 0xFF, 0xED, 0x2F, 0x90,
-0x98, 0x46, 0x12, 0x87, 0xE6, 0xFF, 0xAE, 0x05,
-0xED, 0x2F, 0x90, 0x98, 0x47, 0xF0, 0x22, 0xEF,
-0x60, 0x08, 0x90, 0x98, 0x38, 0xE0, 0xFF, 0x12,
-0x8D, 0x55, 0x22, 0xEF, 0x60, 0x0A, 0x90, 0x06,
-0x31, 0xE0, 0x44, 0x80, 0xF0, 0x12, 0xB9, 0x2E,
-0x22, 0xEF, 0x60, 0x06, 0x12, 0xDA, 0xC0, 0x12,
-0x8D, 0xD1, 0x22, 0x12, 0x9F, 0x91, 0x7B, 0x01,
-0x7A, 0x98, 0x79, 0x50, 0x12, 0x04, 0x80, 0x90,
-0x98, 0x51, 0x74, 0x08, 0xF0, 0xA3, 0x74, 0x03,
-0xF0, 0x22, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0,
-0xD0, 0x90, 0x02, 0x09, 0xE0, 0xFD, 0x12, 0x02,
-0x06, 0xFF, 0x54, 0x01, 0xFE, 0x90, 0x93, 0x04,
-0x71, 0xB8, 0xFC, 0xEF, 0x54, 0xFB, 0x4C, 0xFF,
-0x90, 0x93, 0x04, 0x12, 0x9F, 0xDB, 0x54, 0x10,
-0xFE, 0xEF, 0x54, 0xEF, 0x4E, 0x90, 0x93, 0x04,
-0xF0, 0x12, 0x9C, 0x54, 0xFF, 0xED, 0x2F, 0x90,
-0x93, 0x05, 0x12, 0x87, 0xE6, 0xFF, 0xED, 0x2F,
-0x90, 0x93, 0x06, 0x12, 0x87, 0xA3, 0xFF, 0xAE,
-0x05, 0xED, 0x2F, 0x90, 0x93, 0x07, 0xF0, 0x90,
-0x93, 0x04, 0xE0, 0xFF, 0x20, 0xE0, 0x08, 0x13,
-0x13, 0x13, 0x54, 0x1F, 0x30, 0xE0, 0x0A, 0x90,
-0x06, 0x31, 0xE0, 0x44, 0x40, 0xF0, 0x12, 0xDA,
-0x6C, 0x90, 0x93, 0x04, 0xE0, 0xFF, 0x30, 0xE0,
-0x3A, 0x90, 0x06, 0x32, 0xE0, 0x44, 0x01, 0xF0,
-0x90, 0x06, 0x09, 0xE0, 0x54, 0xFE, 0x71, 0xAF,
-0xEF, 0x13, 0x13, 0x54, 0x3F, 0x30, 0xE0, 0x0A,
-0x12, 0xCD, 0xF0, 0xF0, 0x90, 0x9B, 0x25, 0x74,
-0x01, 0xF0, 0x7D, 0x08, 0xE4, 0xFF, 0x12, 0x7C,
-0x74, 0x71, 0xA7, 0x20, 0xE0, 0x0D, 0x90, 0x9C,
-0x9B, 0x12, 0x04, 0x3D, 0x00, 0x00, 0x27, 0x10,
-0x12, 0x94, 0xFF, 0x71, 0xA7, 0x30, 0xE0, 0x0A,
-0x90, 0x06, 0x32, 0xE0, 0x44, 0x02, 0xF0, 0x12,
-0x8E, 0xEA, 0xD0, 0xD0, 0x92, 0xAF, 0x22, 0x90,
-0x93, 0x04, 0xE0, 0xFF, 0xC3, 0x13, 0x22, 0xF0,
-0x90, 0x06, 0x08, 0xE0, 0x54, 0x7F, 0xF0, 0x22,
-0xE0, 0x54, 0xFE, 0x4E, 0xFE, 0xF0, 0xEF, 0x54,
-0x02, 0xFF, 0xEE, 0x54, 0xFD, 0x4F, 0xFF, 0xF0,
-0x12, 0x02, 0x06, 0xFE, 0x54, 0x04, 0x22, 0xD3,
-0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0x90, 0x9A,
-0x5A, 0xEF, 0xF0, 0x90, 0x93, 0x06, 0xE0, 0xFF,
-0x12, 0x7B, 0x07, 0x74, 0x10, 0x2F, 0xFF, 0x90,
-0x9A, 0x5A, 0xE0, 0x25, 0xE0, 0x25, 0xE0, 0x2F,
-0xFF, 0x12, 0x8D, 0xC3, 0x75, 0x48, 0x04, 0x7B,
-0x01, 0x7A, 0x9B, 0x79, 0x1D, 0x12, 0x69, 0xF5,
-0xD0, 0xD0, 0x92, 0xAF, 0x22, 0xD3, 0x10, 0xAF,
-0x01, 0xC3, 0xC0, 0xD0, 0x90, 0x9B, 0x0D, 0xE0,
-0xFE, 0x90, 0x9B, 0x0A, 0xE0, 0xC3, 0x9E, 0x40,
-0x04, 0x7F, 0x00, 0x80, 0x0E, 0xEF, 0x60, 0x05,
-0xD3, 0x94, 0x0E, 0x40, 0x04, 0x7F, 0x00, 0x80,
-0x02, 0x7F, 0x01, 0xD0, 0xD0, 0x92, 0xAF, 0x22,
-0x12, 0xB7, 0x77, 0x90, 0x9B, 0x08, 0xE0, 0x64,
-0x01, 0xF0, 0xE0, 0x24, 0x30, 0x90, 0x01, 0xC4,
-0xF0, 0x74, 0xF4, 0xA3, 0x12, 0xEA, 0x3B, 0x02,
-0xA8, 0xC9, 0xED, 0x14, 0x60, 0x06, 0x04, 0x70,
-0x03, 0x7F, 0x01, 0x22, 0x7F, 0x01, 0x22, 0x12,
-0xB7, 0x77, 0xE4, 0xA3, 0xF0, 0x90, 0x9A, 0x36,
-0xE0, 0xFD, 0xC3, 0x94, 0x04, 0x50, 0x29, 0x90,
-0x9A, 0x35, 0xE0, 0x24, 0x10, 0x12, 0xB5, 0xB7,
-0xFE, 0x12, 0xE9, 0xD0, 0x90, 0x9A, 0x36, 0xE0,
-0x24, 0x9F, 0xF5, 0x82, 0xE4, 0x34, 0x95, 0xF5,
-0x83, 0xE0, 0x6F, 0x60, 0x03, 0x7F, 0x00, 0x22,
-0x90, 0x9A, 0x36, 0xE0, 0x04, 0xF0, 0x80, 0xCD,
-0x7F, 0x01, 0x22, 0xD3, 0x10, 0xAF, 0x01, 0xC3,
-0xC0, 0xD0, 0x12, 0x7A, 0x65, 0xEF, 0x64, 0x01,
-0x60, 0x05, 0x75, 0x14, 0x01, 0x80, 0x25, 0x90,
-0x88, 0x31, 0x12, 0x97, 0xDE, 0x30, 0xE0, 0x05,
-0x75, 0x14, 0x02, 0x80, 0x17, 0x90, 0x88, 0x38,
-0xE0, 0xD3, 0x94, 0x04, 0x40, 0x05, 0x75, 0x14,
-0x08, 0x80, 0x09, 0x90, 0x01, 0xB8, 0xE4, 0xF0,
-0x7F, 0x01, 0x80, 0x0E, 0x90, 0x01, 0xB9, 0x74,
-0x02, 0xF0, 0x90, 0x01, 0xB8, 0xE5, 0x14, 0xF0,
-0x7F, 0x00, 0xD0, 0xD0, 0x92, 0xAF, 0x22, 0xD3,
-0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0x12, 0x7A,
-0x65, 0xEF, 0x64, 0x01, 0x60, 0x05, 0x75, 0x15,
-0x01, 0x80, 0x75, 0x90, 0x88, 0x3A, 0xE0, 0xFF,
-0x54, 0x03, 0x60, 0x05, 0x75, 0x15, 0x02, 0x80,
-0x67, 0x90, 0x88, 0x38, 0xE0, 0xFE, 0xE4, 0xC3,
-0x9E, 0x50, 0x05, 0x75, 0x15, 0x04, 0x80, 0x58,
-0xEF, 0x30, 0xE2, 0x05, 0x75, 0x15, 0x08, 0x80,
-0x4F, 0x90, 0x88, 0x3A, 0xE0, 0x30, 0xE4, 0x05,
-0x75, 0x15, 0x10, 0x80, 0x43, 0x90, 0x88, 0x32,
-0xE0, 0x13, 0x13, 0x54, 0x3F, 0x20, 0xE0, 0x05,
-0x75, 0x15, 0x20, 0x80, 0x33, 0x90, 0x88, 0x9C,
-0xE0, 0x60, 0x05, 0x75, 0x15, 0x80, 0x80, 0x28,
-0x90, 0x06, 0x62, 0xE0, 0x30, 0xE1, 0x05, 0x75,
-0x15, 0x11, 0x80, 0x1C, 0x90, 0x06, 0x62, 0xE0,
-0x30, 0xE0, 0x0C, 0xE0, 0x54, 0xFC, 0xFF, 0xBF,
-0x80, 0x05, 0x75, 0x15, 0x12, 0x80, 0x09, 0x90,
-0x01, 0xB8, 0xE4, 0xF0, 0x7F, 0x01, 0x80, 0x0E,
-0x90, 0x01, 0xB9, 0x74, 0x04, 0xF0, 0x90, 0x01,
-0xB8, 0xE5, 0x15, 0xF0, 0x7F, 0x00, 0xD0, 0xD0,
-0x92, 0xAF, 0x22, 0x90, 0x93, 0x08, 0xE0, 0xC3,
-0x13, 0x20, 0xE0, 0x36, 0x90, 0x02, 0x87, 0xE0,
-0x60, 0x02, 0x80, 0x08, 0x90, 0x01, 0x00, 0xE0,
-0x64, 0x3F, 0x60, 0x05, 0x75, 0x0D, 0x01, 0x80,
-0x34, 0x90, 0x93, 0x31, 0xE0, 0x30, 0xE0, 0x05,
-0x75, 0x0D, 0x08, 0x80, 0x28, 0x90, 0x02, 0x86,
-0xE0, 0x20, 0xE1, 0x02, 0x80, 0x07, 0x90, 0x02,
-0x86, 0xE0, 0x30, 0xE3, 0x05, 0x75, 0x0D, 0x04,
-0x80, 0x13, 0x90, 0x04, 0x1D, 0xE0, 0x60, 0x05,
-0x75, 0x0D, 0x40, 0x80, 0x08, 0x90, 0x01, 0xB8,
-0xE4, 0xF0, 0x7F, 0x01, 0x22, 0x90, 0x01, 0xB9,
-0x74, 0x08, 0xF0, 0x90, 0x01, 0xB8, 0xE5, 0x0D,
-0xF0, 0x7F, 0x00, 0x22, 0x90, 0x88, 0x31, 0xE0,
-0x30, 0xE0, 0x03, 0x12, 0xC6, 0x79, 0x22, 0x90,
-0x88, 0x8D, 0x74, 0x18, 0xF0, 0xA3, 0xF0, 0xA3,
-0xE4, 0xF0, 0xA3, 0x74, 0x64, 0xF0, 0xA3, 0x74,
-0x05, 0xF0, 0xA3, 0xF0, 0x22, 0x90, 0x88, 0x85,
-0x12, 0x04, 0xB8, 0xC0, 0x06, 0xC0, 0x07, 0x90,
-0x99, 0xAE, 0xE0, 0x24, 0x46, 0xFF, 0x90, 0x99,
-0xAD, 0xE0, 0x34, 0x00, 0xAB, 0x07, 0xFA, 0xE4,
-0xF9, 0xF8, 0xD0, 0x07, 0xD0, 0x06, 0x12, 0x80,
-0xCD, 0x90, 0x88, 0x85, 0x12, 0xFA, 0x56, 0xEF,
-0x24, 0x46, 0x12, 0xFA, 0x0F, 0x90, 0x88, 0x89,
-0x12, 0xFA, 0x56, 0x90, 0x88, 0x85, 0x12, 0x82,
-0x12, 0xC3, 0x12, 0x03, 0xDA, 0x50, 0x02, 0xE1,
-0x02, 0x90, 0x88, 0x89, 0x12, 0x82, 0x12, 0x90,
-0x88, 0x85, 0x12, 0x04, 0xB8, 0x12, 0x80, 0xCD,
-0x90, 0x9B, 0x00, 0x12, 0x04, 0x31, 0x90, 0x88,
-0x31, 0xE0, 0x30, 0xE0, 0x35, 0x90, 0x88, 0x53,
-0xE0, 0x24, 0x04, 0xFF, 0xE4, 0x33, 0xFE, 0xEF,
-0x78, 0x03, 0xC3, 0x33, 0xCE, 0x33, 0xCE, 0xD8,
-0xF9, 0x24, 0x50, 0xFF, 0xE4, 0x3E, 0xFE, 0x90,
-0x88, 0x4E, 0xE0, 0xFD, 0xC3, 0xEF, 0x9D, 0xFB,
-0xEE, 0x94, 0x00, 0xFA, 0x12, 0xFA, 0x50, 0x78,
-0x07, 0x12, 0x03, 0xEB, 0xEB, 0x2F, 0xFF, 0xEA,
-0x80, 0x25, 0x90, 0x88, 0x33, 0x12, 0xD6, 0xBB,
-0x30, 0xE0, 0x03, 0x02, 0xF8, 0x07, 0x12, 0xFA,
-0x50, 0x78, 0x07, 0x12, 0x03, 0xEB, 0x90, 0x88,
-0x4E, 0xE0, 0xFD, 0xC3, 0x74, 0x60, 0x9D, 0xCD,
-0xE4, 0x94, 0x00, 0xCD, 0x2F, 0xFF, 0xED, 0x3E,
-0x90, 0x9A, 0xFC, 0xF0, 0xA3, 0xEF, 0xF0, 0xC3,
-0x90, 0x9A, 0xFD, 0xE0, 0x94, 0xA0, 0x90, 0x9A,
-0xFC, 0xE0, 0x94, 0x00, 0x50, 0x34, 0xA3, 0xE0,
-0xFB, 0x24, 0x6D, 0x12, 0xF8, 0xA8, 0xE0, 0x04,
-0xF0, 0x12, 0xFA, 0x50, 0xEF, 0x54, 0x7F, 0xFF,
-0x74, 0x0D, 0x2B, 0x12, 0xF8, 0x9D, 0xE0, 0xFE,
-0xEF, 0xC3, 0x9E, 0x50, 0x0A, 0x90, 0x9A, 0xFC,
-0xA3, 0xE0, 0x12, 0xF8, 0x9B, 0xEF, 0xF0, 0x90,
-0x88, 0x4C, 0xE0, 0x04, 0xF0, 0xE0, 0x90, 0x00,
-0xFE, 0xF0, 0x90, 0x88, 0x4C, 0xE0, 0xFF, 0xD3,
-0x90, 0x88, 0x90, 0xE0, 0x9F, 0x90, 0x88, 0x8F,
-0xE0, 0x94, 0x00, 0x40, 0x03, 0x02, 0xF8, 0x07,
-0xE4, 0xFF, 0xFE, 0x12, 0xF8, 0xA5, 0xE0, 0x2F,
-0xFF, 0x90, 0x88, 0x91, 0xE0, 0xFD, 0xEF, 0xD3,
-0x9D, 0x40, 0x07, 0x90, 0x9A, 0xFE, 0xEE, 0xF0,
-0x80, 0x05, 0x0E, 0xEE, 0xB4, 0xA0, 0xE4, 0x12,
-0xF9, 0x30, 0x40, 0x02, 0x80, 0x17, 0x90, 0x9A,
-0xFE, 0xE0, 0x04, 0xFE, 0xEE, 0xC3, 0x94, 0xA0,
-0x50, 0x15, 0x12, 0xF8, 0xA5, 0xE0, 0x2F, 0xFF,
-0x12, 0xF9, 0x30, 0x40, 0x07, 0x90, 0x9A, 0xFF,
-0xEE, 0xF0, 0x80, 0x03, 0x0E, 0x80, 0xE5, 0x90,
-0x05, 0x5E, 0xE0, 0xFF, 0x12, 0xF8, 0x96, 0xE0,
-0xFD, 0xEF, 0xC3, 0x9D, 0x40, 0x11, 0xEF, 0x9D,
-0x90, 0x05, 0x5E, 0xF0, 0x90, 0x88, 0x51, 0xEE,
-0xF0, 0x90, 0x9A, 0xFF, 0xE0, 0x80, 0x19, 0x12,
-0xF8, 0x96, 0xE0, 0xFD, 0xC3, 0x74, 0x80, 0x9D,
-0x2F, 0x90, 0x05, 0x5E, 0xF0, 0xEE, 0x04, 0x90,
-0x88, 0x51, 0xF0, 0x90, 0x9A, 0xFF, 0xE0, 0x04,
-0x90, 0x88, 0x52, 0xF0, 0x90, 0x88, 0x51, 0xE0,
-0xFF, 0xC3, 0x94, 0x50, 0x40, 0x0A, 0xEF, 0x24,
-0xB0, 0x90, 0x88, 0x49, 0xF0, 0xE4, 0x80, 0x0E,
-0xE4, 0x90, 0x88, 0x49, 0xF0, 0x90, 0x88, 0x51,
-0xE0, 0xFF, 0xC3, 0x74, 0x50, 0x9F, 0x90, 0x88,
-0x48, 0xF0, 0x90, 0x88, 0x51, 0xE0, 0xFF, 0xA3,
-0xE0, 0xC3, 0x9F, 0x90, 0x88, 0x4F, 0xF0, 0x90,
-0x88, 0x31, 0xE0, 0x90, 0x88, 0x8E, 0xE0, 0x24,
-0x08, 0xFF, 0x90, 0x88, 0x4F, 0xE0, 0x2F, 0xF0,
-0x90, 0x88, 0x4F, 0xE0, 0xC3, 0x94, 0x50, 0x50,
-0x03, 0x74, 0x50, 0xF0, 0x90, 0x88, 0x4F, 0xE0,
-0x24, 0x10, 0xF0, 0x12, 0xF8, 0x08, 0x74, 0x03,
-0xF0, 0x12, 0x6E, 0x2F, 0x90, 0x8A, 0xA3, 0x12,
-0x90, 0x47, 0xE4, 0xFF, 0x12, 0x04, 0x7E, 0x22,
-0x90, 0x88, 0x48, 0xE0, 0xFF, 0xA3, 0xE0, 0xFD,
-0x90, 0x88, 0x4F, 0xE0, 0xFB, 0x90, 0x92, 0x98,
-0x22, 0x12, 0xD7, 0x8E, 0x9F, 0x40, 0x40, 0x90,
-0x88, 0x50, 0xE0, 0x04, 0xF0, 0x90, 0x88, 0x92,
-0xE0, 0xFF, 0x90, 0x88, 0x50, 0xE0, 0xD3, 0x9F,
-0x50, 0x2D, 0x90, 0x88, 0x48, 0xE0, 0x24, 0x08,
-0xF0, 0x90, 0x88, 0x3F, 0x11, 0x62, 0x33, 0x33,
-0x33, 0x54, 0xF8, 0xFF, 0x90, 0x88, 0x3E, 0xE0,
-0x2F, 0x90, 0x88, 0x4F, 0xF0, 0xFB, 0x90, 0x88,
-0x48, 0xE0, 0xFF, 0xA3, 0xE0, 0xFD, 0x90, 0x92,
-0x98, 0x74, 0x03, 0xF0, 0x12, 0x6E, 0x2F, 0x22,
-0xFF, 0xA3, 0xE0, 0x75, 0xF0, 0x03, 0xA4, 0x24,
-0xFE, 0x22, 0xE4, 0xFE, 0x11, 0xA5, 0xE4, 0xF0,
-0x74, 0x0D, 0x2E, 0x11, 0x9D, 0x74, 0xFF, 0xF0,
-0x0E, 0xEE, 0xB4, 0xA0, 0xEF, 0xE4, 0x90, 0x88,
-0x4D, 0xF0, 0x90, 0x88, 0x4C, 0xF0, 0x90, 0x88,
-0x50, 0xF0, 0xEF, 0xB4, 0x01, 0x07, 0xA3, 0x74,
-0xA0, 0xF0, 0xE4, 0xA3, 0xF0, 0x22, 0x90, 0x9A,
-0xFE, 0xE0, 0xFE, 0x24, 0x0D, 0xF5, 0x82, 0xE4,
-0x34, 0x99, 0xF5, 0x83, 0x22, 0x74, 0x6D, 0x2E,
-0xF5, 0x82, 0xE4, 0x34, 0x98, 0xF5, 0x83, 0x22,
-0x90, 0x9A, 0x5E, 0xE4, 0x75, 0xF0, 0x08, 0x12,
-0x02, 0xE7, 0x90, 0x9A, 0x5E, 0xE4, 0x75, 0xF0,
-0x08, 0x02, 0x02, 0xE7, 0x90, 0x05, 0x63, 0xE0,
-0x90, 0x88, 0x89, 0xF0, 0x90, 0x05, 0x62, 0xE0,
-0x90, 0x88, 0x8A, 0xF0, 0x90, 0x05, 0x61, 0xE0,
-0x90, 0x88, 0x8B, 0xF0, 0x90, 0x05, 0x60, 0xE0,
-0x90, 0x88, 0x8C, 0xF0, 0x90, 0x88, 0x32, 0xE0,
-0x44, 0x80, 0xF0, 0x22, 0x90, 0x86, 0xB6, 0xE0,
-0xFF, 0x90, 0x9C, 0xA7, 0xE0, 0xFB, 0x90, 0x92,
-0x13, 0x74, 0x0A, 0xF0, 0x7D, 0x01, 0x12, 0x66,
-0xDB, 0x90, 0x9C, 0xA8, 0xEE, 0xF0, 0xFC, 0xA3,
-0xEF, 0xF0, 0xFD, 0x90, 0x9C, 0xA6, 0xE0, 0xFF,
-0x90, 0x8A, 0x95, 0x22, 0xF0, 0xA3, 0xEF, 0xF0,
-0x74, 0x02, 0x2D, 0xF5, 0x82, 0xE4, 0x34, 0xFB,
-0xF5, 0x83, 0xE0, 0x54, 0x0F, 0x33, 0x33, 0x33,
-0x54, 0xF8, 0xFF, 0x90, 0x98, 0x6C, 0xE0, 0x22,
-0x90, 0x88, 0x91, 0xE0, 0xFD, 0xC3, 0x90, 0x88,
-0x90, 0xE0, 0x9D, 0xFD, 0x90, 0x88, 0x8F, 0xE0,
-0x94, 0x00, 0xFC, 0xEF, 0xD3, 0x9D, 0xE4, 0x9C,
-0x22, 0x74, 0x00, 0x2F, 0xF9, 0xE4, 0x34, 0xFC,
-0xFA, 0x7B, 0x01, 0x22, 0xF0, 0x90, 0x9C, 0x0D,
-0xE0, 0xFE, 0xA3, 0xE0, 0xFF, 0x22, 0x90, 0x9C,
-0xA6, 0xE0, 0xFF, 0x90, 0x8A, 0xC7, 0xE0, 0xFC,
-0xA3, 0xE0, 0xFD, 0xF5, 0x82, 0x8C, 0x83, 0x22,
-0xA3, 0xE0, 0x24, 0x28, 0xF9, 0xE4, 0x34, 0xFC,
-0xFA, 0x22, 0x90, 0x9A, 0x5B, 0xE0, 0xFF, 0x24,
-0x42, 0xF5, 0x82, 0xE4, 0x34, 0x94, 0xF5, 0x83,
-0xE0, 0x22, 0x90, 0x88, 0x28, 0xE0, 0x24, 0x01,
-0xFF, 0x90, 0x88, 0x27, 0xE0, 0x34, 0x00, 0xFE,
-0xC3, 0x22, 0x90, 0x9C, 0x01, 0xA3, 0xE0, 0x24,
-0x04, 0xF5, 0x82, 0xE4, 0x34, 0xFB, 0xF5, 0x83,
-0xE0, 0x22, 0x7D, 0x01, 0x7B, 0x01, 0x7A, 0x93,
-0x79, 0x53, 0x7E, 0x00, 0x7F, 0x04, 0x02, 0x83,
-0xDC, 0x90, 0x99, 0xB1, 0x12, 0x82, 0x27, 0x02,
-0x02, 0x06, 0xEE, 0x8F, 0xF0, 0x12, 0x02, 0xE7,
-0x90, 0x88, 0x27, 0xE0, 0xFE, 0xA3, 0xE0, 0xFF,
-0x22, 0x74, 0x03, 0x2D, 0xF5, 0x82, 0xE4, 0x34,
-0xFB, 0xF5, 0x83, 0xE0, 0x54, 0x03, 0xFE, 0x22,
-0xE0, 0x90, 0x01, 0xBA, 0xF0, 0x90, 0x88, 0x38,
-0xE0, 0x90, 0x01, 0xBB, 0xF0, 0x22, 0xFF, 0x90,
-0x9A, 0x3B, 0xE0, 0x34, 0x00, 0xFE, 0x22, 0x7E,
-0x00, 0x7F, 0x04, 0x7D, 0x00, 0x7B, 0x01, 0x7A,
-0x93, 0x79, 0x08, 0x22, 0x24, 0x28, 0xF5, 0x82,
-0xE4, 0x34, 0xFC, 0xF5, 0x83, 0xE0, 0x22, 0xFF,
-0xE4, 0x3E, 0xFE, 0xE4, 0x3D, 0xFD, 0xE4, 0x3C,
-0xFC, 0x22, 0x90, 0x9A, 0x5E, 0xE4, 0x75, 0xF0,
+0x90, 0x98, 0x3D, 0xE0, 0xFF, 0x31, 0x46, 0x22,
+0x12, 0xA7, 0xE6, 0x2F, 0xFF, 0xE4, 0x3E, 0xCF,
+0x24, 0x06, 0xCF, 0x34, 0x00, 0x12, 0xA2, 0x3B,
+0xEF, 0x64, 0x86, 0x70, 0x20, 0x90, 0x9A, 0x63,
+0xE0, 0xFF, 0x90, 0x9A, 0x62, 0xE0, 0x2F, 0xFF,
+0x90, 0x9A, 0x61, 0xE0, 0x34, 0x00, 0xCF, 0x24,
+0x07, 0xCF, 0x34, 0x00, 0x12, 0xA2, 0x3B, 0xBF,
+0xDD, 0x03, 0x7F, 0x01, 0x22, 0x7F, 0x00, 0x22,
+0x90, 0x9A, 0x9B, 0x12, 0x82, 0x27, 0x90, 0x9A,
+0x9E, 0x12, 0x8B, 0xE0, 0x75, 0x48, 0x10, 0x7B,
+0x01, 0x7A, 0x93, 0x79, 0xD1, 0x12, 0x69, 0xF5,
+0x90, 0x9A, 0x9B, 0x12, 0x8B, 0xE0, 0x75, 0x48,
+0x10, 0x7B, 0x01, 0x7A, 0x93, 0x79, 0xE1, 0x12,
+0x69, 0xF5, 0x90, 0x9A, 0xA1, 0x12, 0x04, 0xB8,
+0x90, 0x93, 0xF1, 0x12, 0x04, 0x31, 0x90, 0x9A,
+0xA5, 0xE0, 0x90, 0x93, 0xF8, 0xF0, 0x22, 0xD3,
+0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0x90, 0x9C,
+0x52, 0xED, 0xF0, 0x90, 0x9C, 0x51, 0xEF, 0xF0,
+0x12, 0x7B, 0x07, 0x90, 0x9C, 0x5F, 0xEF, 0xF0,
+0xE0, 0xFD, 0x24, 0x01, 0x12, 0xC3, 0xF0, 0xE0,
+0xFE, 0x74, 0x00, 0x2D, 0x12, 0x8E, 0x9B, 0x12,
+0xC7, 0x8C, 0x54, 0x3F, 0x90, 0x9C, 0x5C, 0xF0,
+0xA3, 0xEF, 0xF0, 0xE4, 0x90, 0x9C, 0x5B, 0xF0,
+0x71, 0x2F, 0x50, 0x0A, 0x71, 0x62, 0x12, 0x8E,
+0x98, 0xE4, 0x71, 0x17, 0x80, 0xF2, 0x90, 0x9C,
+0x5D, 0xE0, 0x24, 0xF8, 0xFB, 0x90, 0x9C, 0x5C,
+0xE0, 0x34, 0xFF, 0xFA, 0x90, 0x9C, 0x52, 0xE0,
+0xFF, 0x90, 0x91, 0xDC, 0xE4, 0xF0, 0xA3, 0xEF,
+0xF0, 0xA3, 0x74, 0x01, 0xF0, 0x7D, 0x0A, 0x7C,
+0x00, 0x7F, 0x10, 0x7E, 0x00, 0x12, 0x6D, 0xED,
+0x90, 0x98, 0x3B, 0xE0, 0xFF, 0x90, 0x9C, 0x51,
+0xE0, 0xFD, 0xD3, 0x9F, 0x40, 0x36, 0x90, 0x98,
+0x3B, 0xE0, 0xFC, 0x71, 0x59, 0xCE, 0xC3, 0x13,
+0xCE, 0x13, 0xD8, 0xF9, 0x71, 0x38, 0xEC, 0xFF,
+0xC3, 0xED, 0x71, 0x44, 0xC3, 0x33, 0xCE, 0x33,
+0xCE, 0xD8, 0xF9, 0x24, 0x28, 0xFF, 0xE4, 0x3E,
+0xFE, 0x71, 0x27, 0xFD, 0x90, 0x9C, 0x52, 0xE0,
+0xFC, 0xC3, 0xED, 0x9C, 0x71, 0x1F, 0x7D, 0x38,
+0x7C, 0x00, 0x80, 0x35, 0x90, 0x9C, 0x51, 0xE0,
+0xFD, 0x71, 0x59, 0xCE, 0xC3, 0x13, 0xCE, 0x13,
+0xD8, 0xF9, 0x71, 0x38, 0xED, 0xFF, 0x90, 0x98,
+0x3B, 0x71, 0x42, 0xC3, 0x33, 0xCE, 0x33, 0xCE,
+0xD8, 0xF9, 0x24, 0x38, 0xFD, 0xE4, 0x3E, 0xFC,
+0x71, 0x27, 0xFF, 0x90, 0x9C, 0x52, 0xE0, 0xFE,
+0xC3, 0xEF, 0x9E, 0x71, 0x1F, 0x7F, 0x28, 0x7E,
+0x00, 0x12, 0x71, 0xD4, 0x12, 0xB7, 0x9A, 0x90,
+0x91, 0x45, 0x12, 0x82, 0x27, 0x0B, 0x7A, 0x9C,
+0x79, 0x53, 0x90, 0x91, 0x48, 0x12, 0x82, 0x27,
+0x90, 0x91, 0x4B, 0x74, 0x08, 0xF0, 0x7A, 0x94,
+0x79, 0x31, 0x12, 0x4E, 0xA5, 0xE4, 0x90, 0x9C,
+0x5B, 0xF0, 0x71, 0x2F, 0x50, 0x1C, 0x71, 0x62,
+0x90, 0x9C, 0x5B, 0xE0, 0x24, 0x53, 0xF5, 0x82,
+0xE4, 0x34, 0x9C, 0xF5, 0x83, 0xE0, 0xFF, 0x90,
+0x9C, 0x5E, 0x12, 0x8E, 0x98, 0xEF, 0x71, 0x17,
+0x80, 0xE0, 0xD0, 0xD0, 0x92, 0xAF, 0x22, 0xF0,
+0x90, 0x9C, 0x5B, 0xE0, 0x04, 0xF0, 0x22, 0xFB,
+0x90, 0x92, 0x06, 0x74, 0x08, 0xF0, 0x22, 0x90,
+0x9C, 0x5C, 0xA3, 0xE0, 0x24, 0xF8, 0x22, 0x90,
+0x9C, 0x5B, 0xE0, 0xFF, 0xC3, 0x94, 0x08, 0x22,
+0xFF, 0x90, 0x92, 0x07, 0xEE, 0xF0, 0xA3, 0xEF,
+0xF0, 0x22, 0xE0, 0xC3, 0x9F, 0xFF, 0xE4, 0x94,
+0x00, 0xFE, 0xEF, 0x78, 0x07, 0x22, 0xE4, 0xFD,
+0x7F, 0x03, 0x12, 0x54, 0x1E, 0x90, 0x98, 0x3C,
+0xE0, 0x75, 0xF0, 0x80, 0xA4, 0xAE, 0xF0, 0x78,
+0x03, 0x22, 0x90, 0x9C, 0x5F, 0xE0, 0xFD, 0x90,
+0x9C, 0x5D, 0xE0, 0x2D, 0xFD, 0x90, 0x9C, 0x5C,
+0xE0, 0x34, 0x00, 0xCD, 0x24, 0x20, 0xCD, 0x34,
+0x00, 0xFC, 0x7E, 0x00, 0xED, 0x2F, 0xFF, 0xEE,
+0x3C, 0xFE, 0x90, 0x9C, 0x51, 0xE0, 0xFD, 0x12,
+0x7B, 0x8B, 0x90, 0x9C, 0x5E, 0xEF, 0xF0, 0x22,
+0xE4, 0xFD, 0x7F, 0x03, 0x12, 0x54, 0x1E, 0x90,
+0x01, 0x85, 0xE0, 0x54, 0xFE, 0xF0, 0x71, 0x4E,
+0xCE, 0xC3, 0x13, 0xCE, 0x13, 0xD8, 0xF9, 0x12,
+0xD7, 0xDF, 0x02, 0x54, 0x1E, 0x12, 0xE8, 0x90,
+0xE4, 0x90, 0x9A, 0x38, 0xF0, 0xA3, 0xF0, 0x12,
+0xA2, 0x3C, 0xEF, 0x54, 0x0C, 0x64, 0x08, 0x70,
+0x4B, 0x12, 0xAF, 0x1B, 0xA3, 0xE0, 0x24, 0x06,
+0x12, 0xAF, 0xC6, 0xEF, 0x64, 0x88, 0x70, 0x3C,
+0x12, 0xAF, 0x1B, 0xA3, 0xE0, 0x24, 0x07, 0x12,
+0xAF, 0xC6, 0xEF, 0x64, 0x8E, 0x70, 0x2D, 0x90,
+0x9A, 0x38, 0x12, 0xAF, 0xB1, 0xEF, 0x70, 0x24,
+0x12, 0xAF, 0x1B, 0x91, 0x12, 0x24, 0x04, 0x12,
+0xAF, 0xC6, 0xEF, 0x64, 0x01, 0x70, 0x15, 0x12,
+0xAF, 0x1B, 0x91, 0x12, 0x24, 0x08, 0x12, 0xAF,
+0xC6, 0xBF, 0x01, 0x08, 0x90, 0x01, 0xC7, 0x74,
+0x0B, 0x12, 0xA7, 0x70, 0x90, 0x9A, 0x38, 0xE0,
+0xFF, 0x22, 0x90, 0x9A, 0x37, 0xE0, 0xFD, 0x90,
+0x9A, 0x36, 0xE0, 0x2D, 0x22, 0xE4, 0xFE, 0xED,
+0x30, 0xE1, 0x11, 0x90, 0x01, 0x3F, 0xE0, 0x30,
+0xE2, 0x0A, 0x74, 0x04, 0xF0, 0x90, 0x01, 0xC7,
+0x74, 0x23, 0xF0, 0x0E, 0xED, 0x30, 0xE0, 0x24,
+0xEF, 0x30, 0xE6, 0x08, 0x90, 0x01, 0xC7, 0x74,
+0x22, 0xF0, 0x7E, 0x01, 0xEF, 0x30, 0xE7, 0x08,
+0x90, 0x01, 0xC7, 0x74, 0x21, 0xF0, 0x7E, 0x01,
+0xEF, 0x30, 0xE5, 0x08, 0x90, 0x01, 0xC7, 0x74,
+0x23, 0xF0, 0x7E, 0x01, 0xAF, 0x06, 0x22, 0x12,
+0x02, 0x06, 0x90, 0x98, 0x35, 0xF0, 0x12, 0x9C,
+0x5A, 0x90, 0x98, 0x36, 0xF0, 0x22, 0x12, 0x87,
+0xED, 0x2E, 0x90, 0x98, 0x37, 0xF0, 0x12, 0x9C,
+0x5A, 0xFF, 0xED, 0x2F, 0x90, 0x98, 0x38, 0x12,
+0x87, 0xE6, 0xFF, 0xED, 0x2F, 0x90, 0x98, 0x39,
+0x12, 0x87, 0xA3, 0xFF, 0xED, 0x2F, 0x90, 0x98,
+0x3A, 0x12, 0x87, 0xD1, 0xFF, 0xED, 0x2F, 0x90,
+0x98, 0x3B, 0x12, 0x87, 0x9B, 0xFF, 0xED, 0x2F,
+0x90, 0x98, 0x3C, 0x12, 0x87, 0xD8, 0x90, 0x98,
+0x3D, 0xF0, 0x22, 0x12, 0x87, 0xED, 0x2E, 0x90,
+0x98, 0x45, 0xF0, 0x12, 0x9C, 0x5A, 0xFF, 0xED,
+0x2F, 0x90, 0x98, 0x46, 0x12, 0x87, 0xE6, 0xFF,
+0xAE, 0x05, 0xED, 0x2F, 0x90, 0x98, 0x47, 0xF0,
+0x22, 0xEF, 0x60, 0x08, 0x90, 0x98, 0x38, 0xE0,
+0xFF, 0x12, 0x8D, 0x55, 0x22, 0xEF, 0x60, 0x0A,
+0x90, 0x06, 0x31, 0xE0, 0x44, 0x80, 0xF0, 0x12,
+0xC1, 0x36, 0x22, 0xD3, 0x10, 0xAF, 0x01, 0xC3,
+0xC0, 0xD0, 0x90, 0x9A, 0x5A, 0xEF, 0xF0, 0x90,
+0x93, 0x06, 0xE0, 0xFF, 0x12, 0x7B, 0x07, 0x74,
+0x10, 0x2F, 0xFF, 0x90, 0x9A, 0x5A, 0xE0, 0x25,
+0xE0, 0x25, 0xE0, 0x2F, 0xFF, 0x12, 0x8D, 0xC3,
+0x75, 0x48, 0x04, 0x7B, 0x01, 0x7A, 0x9B, 0x79,
+0x1D, 0x12, 0x69, 0xF5, 0xD0, 0xD0, 0x92, 0xAF,
+0x22, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0,
+0x90, 0x9B, 0x0D, 0xE0, 0xFE, 0x90, 0x9B, 0x0A,
+0xE0, 0xC3, 0x9E, 0x40, 0x04, 0x7F, 0x00, 0x80,
+0x0E, 0xEF, 0x60, 0x05, 0xD3, 0x94, 0x0E, 0x40,
+0x04, 0x7F, 0x00, 0x80, 0x02, 0x7F, 0x01, 0xD0,
+0xD0, 0x92, 0xAF, 0x22, 0xD3, 0x10, 0xAF, 0x01,
+0xC3, 0xC0, 0xD0, 0x90, 0x9A, 0x5A, 0xEF, 0xF0,
+0x12, 0x76, 0x9B, 0xBF, 0x01, 0x27, 0x90, 0x06,
+0x32, 0xE0, 0x44, 0x08, 0xF0, 0x90, 0x9A, 0x5A,
+0xE0, 0xFF, 0x90, 0x92, 0x13, 0x74, 0x07, 0xF0,
+0x7B, 0x18, 0x7D, 0x01, 0x12, 0x66, 0xDB, 0x90,
+0x9A, 0x5B, 0xEE, 0xF0, 0xA3, 0xEF, 0xF0, 0x90,
+0x04, 0x1F, 0x74, 0x20, 0xF0, 0xD0, 0xD0, 0x92,
+0xAF, 0x22, 0xE4, 0xFD, 0xFC, 0x90, 0x01, 0x1D,
+0xE0, 0xFE, 0x90, 0x01, 0x1C, 0x12, 0xD7, 0x79,
+0x3E, 0x90, 0x9C, 0xBF, 0xF0, 0xA3, 0xEF, 0x12,
+0xCF, 0xCD, 0xE0, 0x24, 0x00, 0xFF, 0xEA, 0x3E,
+0x90, 0x9C, 0xC1, 0xF0, 0xA3, 0xEF, 0xF0, 0xD1,
+0x18, 0x90, 0x9C, 0xBF, 0xE0, 0xFA, 0xA3, 0xE0,
+0xFB, 0xB5, 0x07, 0x06, 0xEA, 0xB5, 0x06, 0x02,
+0x80, 0x3D, 0xD1, 0x18, 0xD3, 0xEB, 0x9F, 0xEA,
+0x9E, 0x40, 0x0E, 0x90, 0x9C, 0xC0, 0xE0, 0x9F,
+0xFD, 0x90, 0x9C, 0xBF, 0xE0, 0x9E, 0xFC, 0x80,
+0x26, 0xD1, 0x18, 0xC3, 0x90, 0x9C, 0xC0, 0xE0,
+0x9F, 0x90, 0x9C, 0xBF, 0xE0, 0x9E, 0x50, 0x17,
+0x12, 0xC7, 0x9B, 0x90, 0x9C, 0xC2, 0xE0, 0x9F,
+0xFF, 0x90, 0x9C, 0xC1, 0xE0, 0x9E, 0xFE, 0xC3,
+0xE4, 0x9F, 0xFD, 0x74, 0x40, 0x9E, 0xFC, 0xD3,
+0xED, 0x94, 0x00, 0xEC, 0x94, 0x38, 0x40, 0x05,
+0x12, 0xCF, 0x70, 0xF0, 0x22, 0xC3, 0xEC, 0x94,
+0x08, 0x50, 0x0C, 0xED, 0x94, 0x00, 0xEC, 0x94,
+0x00, 0x40, 0x04, 0x12, 0xCF, 0x69, 0xF0, 0x22,
+0x90, 0x9C, 0xC1, 0xE0, 0xFE, 0xA3, 0xE0, 0xFF,
+0x22, 0x12, 0xE8, 0x98, 0x90, 0x9B, 0x08, 0xE0,
+0x64, 0x01, 0xF0, 0xE0, 0x24, 0x21, 0x90, 0x01,
+0xC4, 0xF0, 0x74, 0xF6, 0xA3, 0x12, 0xAF, 0x1A,
+0x02, 0xA0, 0x14, 0xED, 0x14, 0x60, 0x06, 0x04,
+0x70, 0x03, 0x7F, 0x01, 0x22, 0x7F, 0x01, 0x22,
+0x12, 0xE8, 0x98, 0xA3, 0xED, 0xF0, 0x90, 0x95,
+0x99, 0xE0, 0x70, 0x02, 0xA3, 0xE0, 0x60, 0x2E,
+0xE4, 0x90, 0x9A, 0x37, 0xF0, 0xD1, 0x9A, 0x50,
+0x28, 0x12, 0xAF, 0x1B, 0xED, 0x24, 0x1C, 0x12,
+0xAF, 0xC6, 0x90, 0x9A, 0x37, 0xE0, 0x24, 0xA7,
+0xF5, 0x82, 0xE4, 0x34, 0x95, 0xF5, 0x83, 0xE0,
+0x6F, 0x60, 0x03, 0x7F, 0x00, 0x22, 0x90, 0x9A,
+0x37, 0xE0, 0x04, 0xF0, 0x80, 0xD7, 0x7F, 0x00,
+0x22, 0x90, 0x06, 0x32, 0xE0, 0x44, 0x40, 0xF0,
+0xE4, 0x90, 0x95, 0xA5, 0xF0, 0xA3, 0xF0, 0x7F,
+0x01, 0x22, 0x90, 0x9A, 0x37, 0xE0, 0xFD, 0xC3,
+0x94, 0x02, 0x22, 0x12, 0xE8, 0x98, 0xA3, 0xED,
+0xF0, 0xE4, 0xA3, 0xF0, 0xD1, 0x9A, 0x50, 0x22,
+0x12, 0xAF, 0x1B, 0xED, 0x24, 0x1C, 0x12, 0xAF,
+0xC6, 0x90, 0x9A, 0x37, 0xE0, 0x24, 0xC7, 0xF5,
+0x82, 0xE4, 0x34, 0x95, 0xF5, 0x83, 0xE0, 0xB5,
+0x07, 0x1D, 0x90, 0x9A, 0x37, 0xE0, 0x04, 0xF0,
+0x80, 0xDA, 0x90, 0x06, 0x32, 0xE0, 0x44, 0x80,
+0xF0, 0x90, 0x01, 0xC7, 0x74, 0x30, 0xF0, 0x7F,
+0x01, 0x12, 0xAD, 0x5E, 0x7F, 0x01, 0x22, 0x7F,
+0x00, 0x22, 0x12, 0xE8, 0x98, 0xE4, 0xA3, 0xF0,
+0x90, 0x9A, 0x36, 0xE0, 0xFD, 0xC3, 0x94, 0x04,
+0x50, 0x29, 0x90, 0x9A, 0x35, 0xE0, 0x24, 0x10,
+0x12, 0xA6, 0x31, 0xFE, 0x12, 0xAF, 0xC7, 0x90,
+0x9A, 0x36, 0xE0, 0x24, 0x9F, 0xF5, 0x82, 0xE4,
+0x34, 0x95, 0xF5, 0x83, 0xE0, 0x6F, 0x60, 0x03,
+0x7F, 0x00, 0x22, 0x90, 0x9A, 0x36, 0xE0, 0x04,
+0xF0, 0x80, 0xCD, 0x7F, 0x01, 0x22, 0x12, 0xE8,
+0x98, 0x24, 0x16, 0xFF, 0xE4, 0x3E, 0x12, 0xA2,
+0x3B, 0x90, 0x95, 0xA3, 0xA3, 0xE0, 0xB5, 0x07,
+0x1E, 0x90, 0x9A, 0x35, 0xE0, 0x24, 0x16, 0x12,
+0xA6, 0x31, 0xFE, 0x12, 0xAC, 0x4E, 0x7D, 0x01,
+0x12, 0x04, 0x7E, 0xEF, 0xFD, 0x90, 0x95, 0xA3,
+0xE0, 0x6D, 0x70, 0x01, 0xE4, 0x60, 0x03, 0x7F,
+0x00, 0x22, 0x7F, 0x01, 0x22, 0xD3, 0x10, 0xAF,
+0x01, 0xC3, 0xC0, 0xD0, 0x12, 0x7A, 0x65, 0xEF,
+0x64, 0x01, 0x60, 0x05, 0x75, 0x14, 0x01, 0x80,
+0x25, 0x90, 0x88, 0x31, 0x12, 0x97, 0xD1, 0x30,
+0xE0, 0x05, 0x75, 0x14, 0x02, 0x80, 0x17, 0x90,
+0x88, 0x38, 0xE0, 0xD3, 0x94, 0x04, 0x40, 0x05,
+0x75, 0x14, 0x08, 0x80, 0x09, 0x90, 0x01, 0xB8,
+0xE4, 0xF0, 0x7F, 0x01, 0x80, 0x0E, 0x90, 0x01,
+0xB9, 0x74, 0x02, 0xF0, 0x90, 0x01, 0xB8, 0xE5,
+0x14, 0xF0, 0x7F, 0x00, 0xD0, 0xD0, 0x92, 0xAF,
+0x22, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0,
+0x12, 0x7A, 0x65, 0xEF, 0x64, 0x01, 0x60, 0x05,
+0x75, 0x15, 0x01, 0x80, 0x75, 0x90, 0x88, 0x3A,
+0xE0, 0xFF, 0x54, 0x03, 0x60, 0x05, 0x75, 0x15,
+0x02, 0x80, 0x67, 0x90, 0x88, 0x38, 0xE0, 0xFE,
+0xE4, 0xC3, 0x9E, 0x50, 0x05, 0x75, 0x15, 0x04,
+0x80, 0x58, 0xEF, 0x30, 0xE2, 0x05, 0x75, 0x15,
+0x08, 0x80, 0x4F, 0x90, 0x88, 0x3A, 0xE0, 0x30,
+0xE4, 0x05, 0x75, 0x15, 0x10, 0x80, 0x43, 0x90,
+0x88, 0x32, 0xE0, 0x13, 0x13, 0x54, 0x3F, 0x20,
+0xE0, 0x05, 0x75, 0x15, 0x20, 0x80, 0x33, 0x90,
+0x88, 0x9C, 0xE0, 0x60, 0x05, 0x75, 0x15, 0x80,
+0x80, 0x28, 0x90, 0x06, 0x62, 0xE0, 0x30, 0xE1,
+0x05, 0x75, 0x15, 0x11, 0x80, 0x1C, 0x90, 0x06,
+0x62, 0xE0, 0x30, 0xE0, 0x0C, 0xE0, 0x54, 0xFC,
+0xFF, 0xBF, 0x80, 0x05, 0x75, 0x15, 0x12, 0x80,
+0x09, 0x90, 0x01, 0xB8, 0xE4, 0xF0, 0x7F, 0x01,
+0x80, 0x0E, 0x90, 0x01, 0xB9, 0x74, 0x04, 0xF0,
+0x90, 0x01, 0xB8, 0xE5, 0x15, 0xF0, 0x7F, 0x00,
+0xD0, 0xD0, 0x92, 0xAF, 0x22, 0x90, 0x93, 0x08,
+0xE0, 0xC3, 0x13, 0x20, 0xE0, 0x36, 0x90, 0x02,
+0x87, 0xE0, 0x60, 0x02, 0x80, 0x08, 0x90, 0x01,
+0x00, 0xE0, 0x64, 0x3F, 0x60, 0x05, 0x75, 0x0D,
+0x01, 0x80, 0x34, 0x90, 0x93, 0x31, 0xE0, 0x30,
+0xE0, 0x05, 0x75, 0x0D, 0x08, 0x80, 0x28, 0x90,
+0x02, 0x86, 0xE0, 0x20, 0xE1, 0x02, 0x80, 0x07,
+0x90, 0x02, 0x86, 0xE0, 0x30, 0xE3, 0x05, 0x75,
+0x0D, 0x04, 0x80, 0x13, 0x90, 0x04, 0x1D, 0xE0,
+0x60, 0x05, 0x75, 0x0D, 0x40, 0x80, 0x08, 0x90,
+0x01, 0xB8, 0xE4, 0xF0, 0x7F, 0x01, 0x22, 0x90,
+0x01, 0xB9, 0x74, 0x08, 0xF0, 0x90, 0x01, 0xB8,
+0xE5, 0x0D, 0xF0, 0x7F, 0x00, 0x22, 0x90, 0x88,
+0x8D, 0x74, 0x18, 0xF0, 0xA3, 0xF0, 0xA3, 0xE4,
+0xF0, 0xA3, 0x74, 0x64, 0xF0, 0xA3, 0x74, 0x05,
+0xF0, 0xA3, 0xF0, 0x22, 0x12, 0xB7, 0xDF, 0x9F,
+0x40, 0x41, 0x90, 0x88, 0x50, 0xE0, 0x04, 0xF0,
+0x90, 0x88, 0x92, 0xE0, 0xFF, 0x90, 0x88, 0x50,
+0xE0, 0xD3, 0x9F, 0x50, 0x2E, 0x90, 0x88, 0x48,
+0xE0, 0x24, 0x08, 0xF0, 0x90, 0x88, 0x3F, 0x12,
+0x97, 0xEB, 0x33, 0x33, 0x33, 0x54, 0xF8, 0xFF,
+0x90, 0x88, 0x3E, 0xE0, 0x2F, 0x90, 0x88, 0x4F,
+0xF0, 0xFB, 0x90, 0x88, 0x48, 0xE0, 0xFF, 0xA3,
+0xE0, 0xFD, 0x90, 0x92, 0x98, 0x74, 0x03, 0xF0,
+0x12, 0x6E, 0x2F, 0x22, 0x90, 0x93, 0x08, 0xE0,
+0x30, 0xE0, 0x09, 0x90, 0x01, 0x3B, 0xE0, 0x30,
+0xE4, 0x02, 0x31, 0x15, 0x22, 0x7D, 0x02, 0x7F,
+0x02, 0x12, 0x7C, 0x7E, 0x7D, 0x01, 0x7F, 0x02,
+0x02, 0x7C, 0x7E, 0x90, 0x9A, 0x5E, 0xE4, 0x75,
+0xF0, 0x08, 0x12, 0x02, 0xE7, 0x90, 0x9A, 0x5E,
+0xE4, 0x75, 0xF0, 0x08, 0x02, 0x02, 0xE7, 0x90,
+0x05, 0x63, 0xE0, 0x90, 0x88, 0x89, 0xF0, 0x90,
+0x05, 0x62, 0xE0, 0x90, 0x88, 0x8A, 0xF0, 0x90,
+0x05, 0x61, 0xE0, 0x90, 0x88, 0x8B, 0xF0, 0x90,
+0x05, 0x60, 0xE0, 0x90, 0x88, 0x8C, 0xF0, 0x90,
+0x88, 0x32, 0xE0, 0x44, 0x80, 0xF0, 0x22, 0x90,
+0x86, 0xB6, 0xE0, 0xFF, 0x90, 0x9C, 0xA7, 0xE0,
+0xFB, 0x90, 0x92, 0x13, 0x74, 0x0A, 0xF0, 0x7D,
+0x01, 0x12, 0x66, 0xDB, 0x90, 0x9C, 0xA8, 0xEE,
+0xF0, 0xFC, 0xA3, 0xEF, 0xF0, 0xFD, 0x90, 0x9C,
+0xA6, 0xE0, 0xFF, 0x90, 0x8A, 0x95, 0x22, 0xEF,
+0x75, 0xF0, 0x0A, 0xA4, 0x24, 0x93, 0xF5, 0x82,
+0xE4, 0x34, 0x9B, 0xF5, 0x83, 0x22, 0x90, 0x98,
+0x3A, 0xE0, 0xFF, 0x90, 0x92, 0x13, 0x74, 0x08,
+0xF0, 0x7B, 0x18, 0x7D, 0x01, 0x12, 0x66, 0xDB,
+0x90, 0x9A, 0x59, 0xEF, 0xF0, 0x90, 0x98, 0x3A,
+0xE0, 0x22, 0x90, 0x88, 0x48, 0xE0, 0xFF, 0xA3,
+0xE0, 0xFD, 0x90, 0x88, 0x4F, 0xE0, 0xFB, 0x90,
+0x92, 0x98, 0x22, 0x90, 0x8A, 0x77, 0xE0, 0xFE,
+0xA3, 0xE0, 0xFF, 0xF5, 0x82, 0x8E, 0x83, 0x02,
+0x04, 0x7E, 0xF0, 0xA3, 0xEF, 0xF0, 0x74, 0x02,
+0x2D, 0xF5, 0x82, 0xE4, 0x34, 0xFB, 0xF5, 0x83,
+0xE0, 0x54, 0x0F, 0x33, 0x33, 0x33, 0x54, 0xF8,
+0xFF, 0x90, 0x98, 0x6C, 0xE0, 0x22, 0x74, 0x00,
+0x2F, 0xF9, 0xE4, 0x34, 0xFC, 0xFA, 0x7B, 0x01,
+0x22, 0x90, 0x9C, 0xA6, 0xE0, 0xFF, 0x90, 0x8A,
+0xC7, 0xE0, 0xFC, 0xA3, 0xE0, 0xFD, 0xF5, 0x82,
+0x8C, 0x83, 0x22, 0x90, 0x9A, 0x5F, 0xE0, 0x2F,
+0xFF, 0x90, 0x9A, 0x5E, 0xE0, 0x34, 0x00, 0xFE,
+0x90, 0x9A, 0xE2, 0xF0, 0x22, 0xA3, 0xE0, 0x24,
+0x28, 0xF9, 0xE4, 0x34, 0xFC, 0xFA, 0x22, 0x90,
+0x9A, 0x5B, 0xE0, 0xFF, 0x24, 0x42, 0xF5, 0x82,
+0xE4, 0x34, 0x94, 0xF5, 0x83, 0xE0, 0x22, 0x90,
+0x88, 0x28, 0xE0, 0x24, 0x01, 0xFF, 0x90, 0x88,
+0x27, 0xE0, 0x34, 0x00, 0xFE, 0xC3, 0x22, 0x90,
+0x9C, 0x01, 0xA3, 0xE0, 0x24, 0x04, 0xF5, 0x82,
+0xE4, 0x34, 0xFB, 0xF5, 0x83, 0xE0, 0x22, 0xEE,
+0x8F, 0xF0, 0x12, 0x02, 0xE7, 0x90, 0x88, 0x27,
+0xE0, 0xFE, 0xA3, 0xE0, 0xFF, 0x22, 0x74, 0x03,
+0x2D, 0xF5, 0x82, 0xE4, 0x34, 0xFB, 0xF5, 0x83,
+0xE0, 0x54, 0x03, 0xFE, 0x22, 0xE0, 0x90, 0x01,
+0xBA, 0xF0, 0x90, 0x88, 0x38, 0xE0, 0x90, 0x01,
+0xBB, 0xF0, 0x22, 0xFF, 0x90, 0x9A, 0x3B, 0xE0,
+0x34, 0x00, 0xFE, 0x22, 0xE0, 0x24, 0x3D, 0xF5,
+0x82, 0xE4, 0x34, 0x9A, 0x22, 0x7E, 0x00, 0x7F,
+0x04, 0x7D, 0x00, 0x7B, 0x01, 0x7A, 0x93, 0x79,
+0x08, 0x22, 0x90, 0x9C, 0x42, 0x12, 0x82, 0x27,
+0xE4, 0x90, 0x9C, 0x45, 0xF0, 0xA3, 0x22, 0x24,
+0x28, 0xF5, 0x82, 0xE4, 0x34, 0xFC, 0xF5, 0x83,
+0xE0, 0x22, 0x90, 0x9A, 0x5E, 0xE4, 0x75, 0xF0,
 0x02, 0x02, 0x02, 0xE7, 0xFF, 0xEC, 0x3E, 0x90,
 0x9A, 0x3D, 0xF0, 0xA3, 0xEF, 0xF0, 0x22, 0xCF,
 0x34, 0x00, 0x90, 0x9A, 0x39, 0xF0, 0xA3, 0xEF,
 0xF0, 0x22, 0xE4, 0xFF, 0x12, 0x8D, 0x1E, 0x90,
 0x04, 0x1F, 0x74, 0x20, 0x22, 0x90, 0x98, 0x6B,
 0xE0, 0xFF, 0x90, 0x98, 0x6A, 0xE0, 0x4F, 0x22,
-0x90, 0x9B, 0x00, 0x02, 0x04, 0xB8, 0x12, 0x04,
-0x31, 0x90, 0x88, 0x89, 0x02, 0x04, 0xB8, 0xF0,
-0xA3, 0x74, 0x80, 0xF0, 0x7F, 0x01, 0x7E, 0x00,
-0x22, 0x90, 0x06, 0x70, 0xEF, 0xF0, 0xA3, 0xE4,
-0xF0, 0xA3, 0x22, 0x75, 0x46, 0x94, 0x75, 0x47,
-0x40, 0x75, 0x48, 0x02, 0x22, 0x90, 0x9A, 0x3C,
-0xE0, 0xFF, 0xC3, 0x22, 0xF0, 0xEE, 0x54, 0x80,
-0xFE, 0xEF, 0x54, 0x7F, 0x4E, 0x22, 0xFB, 0xC3,
-0xED, 0x9B, 0xFD, 0xEC, 0x94, 0x00, 0xFC, 0x22,
-0x24, 0xA8, 0xFF, 0xE4, 0x34, 0x01, 0xFE, 0x7B,
-0x01, 0x22, 0xFE, 0x54, 0x10, 0xFD, 0xEF, 0x54,
-0xEF, 0x4D, 0x22, 0xFE, 0x54, 0x40, 0xFD, 0xEF,
-0x54, 0xBF, 0x4D, 0x22, 0xF5, 0x82, 0xE4, 0x34,
-0xFC, 0xF5, 0x83, 0xE0, 0x22, 0x74, 0xF9, 0x2E,
-0xF5, 0x82, 0xE4, 0x34, 0x95, 0x22, 0xE0, 0xFF,
-0x12, 0x7B, 0x07, 0x74, 0x00, 0x2F, 0x22, 0x90,
-0x9B, 0x15, 0xE0, 0x90, 0x9C, 0xBE, 0xF0, 0x22,
-0x90, 0x88, 0x38, 0xE0, 0x90, 0x9B, 0x22, 0xF0,
+0xFD, 0x12, 0x7B, 0x8B, 0x90, 0x9A, 0x59, 0xEF,
+0xF0, 0x22, 0xF0, 0x90, 0x9A, 0x5B, 0xE0, 0x04,
+0x22, 0x75, 0x46, 0x94, 0x75, 0x47, 0x40, 0x75,
+0x48, 0x02, 0x22, 0x12, 0x69, 0xF5, 0x75, 0x45,
+0x01, 0x22, 0xFB, 0xC3, 0xED, 0x9B, 0xFD, 0xEC,
+0x94, 0x00, 0xFC, 0x22, 0x24, 0xA8, 0xFF, 0xE4,
+0x34, 0x01, 0xFE, 0x7B, 0x01, 0x22, 0x74, 0xF9,
+0x2E, 0xF5, 0x82, 0xE4, 0x34, 0x95, 0x22, 0x90,
+0x88, 0x38, 0xE0, 0x90, 0x9B, 0x22, 0xF0, 0x22,
+0x90, 0x9A, 0x5B, 0xE0, 0xFF, 0xC3, 0x94, 0x10,
 0x22, 0x90, 0x9A, 0x3F, 0xE0, 0xFE, 0xA3, 0xE0,
-0xFF, 0x22, 0xF0, 0xEE, 0x54, 0x20, 0xFE, 0xEF,
-0x54, 0xDF, 0x22, 0x90, 0x9B, 0xFD, 0xE0, 0xFC,
-0xA3, 0xE0, 0xFD, 0x22, 0x90, 0x9B, 0xFF, 0xE0,
-0xFE, 0xA3, 0xE0, 0xFF, 0x22, 0xF0, 0xA3, 0xEF,
-0xF0, 0x90, 0x02, 0x87, 0xE0, 0x22, 0xE0, 0x24,
-0x37, 0xF5, 0x82, 0xE4, 0x34, 0x9A, 0x22, 0x78,
-0x3D, 0x7C, 0x9A, 0x7D, 0x01, 0x7B, 0xFF, 0x22,
-0xA3, 0xE0, 0xFD, 0x12, 0xA6, 0xB2, 0xEF, 0x22,
-0x7D, 0x02, 0x7F, 0x02, 0x02, 0x04, 0x7E, 0x90,
-0x88, 0x33, 0xE0, 0x54, 0xFE, 0xF0, 0x22, 0xE0,
-0xFF, 0x90, 0x9A, 0x3B, 0xE0, 0xFE, 0x22, 0x7F,
-0x64, 0x7E, 0x00, 0x02, 0x7C, 0x6A, 0xE0, 0xFE,
-0xA3, 0xE0, 0xFD, 0xED, 0xFF, 0x22, 0x90, 0x9A,
-0x37, 0xF0, 0xA3, 0xEF, 0xF0, 0x22, 0x7F, 0xF9,
-0x7E, 0x01, 0x02, 0x5F, 0xA6, 0x00, 0xFB, 0x69
+0xFF, 0x22, 0x90, 0x9B, 0xFD, 0xE0, 0xFC, 0xA3,
+0xE0, 0xFD, 0x22, 0x90, 0x9B, 0xFF, 0xE0, 0xFE,
+0xA3, 0xE0, 0xFF, 0x22, 0xE0, 0x24, 0x37, 0xF5,
+0x82, 0xE4, 0x34, 0x9A, 0x22, 0x78, 0x3D, 0x7C,
+0x9A, 0x7D, 0x01, 0x7B, 0xFF, 0x22, 0x7D, 0x02,
+0x7F, 0x02, 0x02, 0x04, 0x7E, 0x90, 0x88, 0x33,
+0xE0, 0x54, 0xFE, 0xF0, 0x22, 0x90, 0x9A, 0xE5,
+0xE0, 0xC3, 0x94, 0x0A, 0x22, 0x74, 0x10, 0xF0,
+0x7A, 0x93, 0x79, 0xF9, 0x22, 0x12, 0x82, 0x27,
+0x7A, 0x9A, 0x79, 0x45, 0x22, 0x7F, 0x64, 0x7E,
+0x00, 0x02, 0x7C, 0x6A, 0xE0, 0xFE, 0xA3, 0xE0,
+0xFD, 0xED, 0xFF, 0x22, 0x7F, 0xF9, 0x7E, 0x01,
+0x02, 0x5F, 0xA6, 0x00, 0x4F, 0x1E
 };
 
-u32 array_length_mp_8723d_fw_wowlan = 31616;
+u32 array_length_mp_8723d_fw_wowlan = 31694;
 
 #endif /*CONFIG_WOWLAN*/
 
diff --git a/rtl8723DS/hal/rtl8723d/hal8723d_fw.h b/rtl8723DS/hal/rtl8723d/hal8723d_fw.h
index e20d159..7b1c2a9 100755..100644
--- a/rtl8723DS/hal/rtl8723d/hal8723d_fw.h
+++ b/rtl8723DS/hal/rtl8723d/hal8723d_fw.h
@@ -20,15 +20,15 @@
 
 #ifdef LOAD_FW_HEADER_FROM_DRIVER
 #if (defined(CONFIG_AP_WOWLAN) || (DM_ODM_SUPPORT_TYPE & (ODM_AP)))
-extern u8 array_mp_8723d_fw_ap[24140];
+extern u8 array_mp_8723d_fw_ap[24796];
 extern u32 array_length_mp_8723d_fw_ap;
 #endif
 
 #if (DM_ODM_SUPPORT_TYPE & (ODM_WIN)) || (DM_ODM_SUPPORT_TYPE & (ODM_CE))
-extern u8 array_mp_8723d_fw_nic[27828];
+extern u8 array_mp_8723d_fw_nic[28284];
 extern u32 array_length_mp_8723d_fw_nic;
 #ifdef CONFIG_WOWLAN
-extern u8 array_mp_8723d_fw_wowlan[31616];
+extern u8 array_mp_8723d_fw_wowlan[31694];
 extern u32 array_length_mp_8723d_fw_wowlan;
 #endif /*CONFIG_WOWLAN*/
 #endif
diff --git a/rtl8723DS/hal/rtl8723d/rtl8723d_cmd.c b/rtl8723DS/hal/rtl8723d/rtl8723d_cmd.c
index 8d73b3f..e08df1c 100755..100644
--- a/rtl8723DS/hal/rtl8723d/rtl8723d_cmd.c
+++ b/rtl8723DS/hal/rtl8723d/rtl8723d_cmd.c
@@ -154,76 +154,12 @@ u8 GetTxBufferRsvdPageNum8723D(_adapter *padapter, bool wowlan)
 	return RsvdPageNum;
 }
 
-static void rtl8723d_set_FwRsvdPage_cmd(PADAPTER padapter, PRSVDPAGE_LOC rsvdpageloc)
-{
-	u8 u1H2CRsvdPageParm[H2C_RSVDPAGE_LOC_LEN] = {0};
-
-	RTW_INFO("8723DRsvdPageLoc: ProbeRsp=%d PsPoll=%d Null=%d QoSNull=%d BTNull=%d\n",
-		 rsvdpageloc->LocProbeRsp, rsvdpageloc->LocPsPoll,
-		 rsvdpageloc->LocNullData, rsvdpageloc->LocQosNull,
-		 rsvdpageloc->LocBTQosNull);
-
-	SET_H2CCMD_RSVDPAGE_LOC_PROBE_RSP(u1H2CRsvdPageParm, rsvdpageloc->LocProbeRsp);
-	SET_H2CCMD_RSVDPAGE_LOC_PSPOLL(u1H2CRsvdPageParm, rsvdpageloc->LocPsPoll);
-	SET_H2CCMD_RSVDPAGE_LOC_NULL_DATA(u1H2CRsvdPageParm, rsvdpageloc->LocNullData);
-	SET_H2CCMD_RSVDPAGE_LOC_QOS_NULL_DATA(u1H2CRsvdPageParm, rsvdpageloc->LocQosNull);
-	SET_H2CCMD_RSVDPAGE_LOC_BT_QOS_NULL_DATA(u1H2CRsvdPageParm, rsvdpageloc->LocBTQosNull);
-
-	RTW_DBG_DUMP("u1H2CRsvdPageParm:",
-		     u1H2CRsvdPageParm, H2C_RSVDPAGE_LOC_LEN);
-
-	FillH2CCmd8723D(padapter, H2C_8723D_RSVD_PAGE, H2C_RSVDPAGE_LOC_LEN, u1H2CRsvdPageParm);
-}
-
-static void rtl8723d_set_FwAoacRsvdPage_cmd(PADAPTER padapter, PRSVDPAGE_LOC rsvdpageloc)
-{
-	struct pwrctrl_priv *pwrpriv = adapter_to_pwrctl(padapter);
-	struct mlme_priv *pmlmepriv = &padapter->mlmepriv;
-	u8	res = 0, count = 0;
-#ifdef CONFIG_WOWLAN
-	u8 u1H2CAoacRsvdPageParm[H2C_AOAC_RSVDPAGE_LOC_LEN] = {0};
-
-	RTW_INFO("8723DAOACRsvdPageLoc: RWC=%d ArpRsp=%d NbrAdv=%d GtkRsp=%d GtkInfo=%d ProbeReq=%d NetworkList=%d\n",
-		 rsvdpageloc->LocRemoteCtrlInfo, rsvdpageloc->LocArpRsp,
-		 rsvdpageloc->LocNbrAdv, rsvdpageloc->LocGTKRsp,
-		 rsvdpageloc->LocGTKInfo, rsvdpageloc->LocProbeReq,
-		 rsvdpageloc->LocNetList);
-
-	if (check_fwstate(pmlmepriv, _FW_LINKED)) {
-		SET_H2CCMD_AOAC_RSVDPAGE_LOC_REMOTE_WAKE_CTRL_INFO(u1H2CAoacRsvdPageParm, rsvdpageloc->LocRemoteCtrlInfo);
-		SET_H2CCMD_AOAC_RSVDPAGE_LOC_ARP_RSP(u1H2CAoacRsvdPageParm, rsvdpageloc->LocArpRsp);
-		/* SET_H2CCMD_AOAC_RSVDPAGE_LOC_NEIGHBOR_ADV(u1H2CAoacRsvdPageParm, rsvdpageloc->LocNbrAdv); */
-		SET_H2CCMD_AOAC_RSVDPAGE_LOC_GTK_RSP(u1H2CAoacRsvdPageParm, rsvdpageloc->LocGTKRsp);
-		SET_H2CCMD_AOAC_RSVDPAGE_LOC_GTK_INFO(u1H2CAoacRsvdPageParm, rsvdpageloc->LocGTKInfo);
-#ifdef CONFIG_GTK_OL
-		SET_H2CCMD_AOAC_RSVDPAGE_LOC_GTK_EXT_MEM(u1H2CAoacRsvdPageParm, rsvdpageloc->LocGTKEXTMEM);
-#endif /* CONFIG_GTK_OL */
-		RTW_DBG_DUMP("u1H2CAoacRsvdPageParm:",
-			     u1H2CAoacRsvdPageParm, H2C_AOAC_RSVDPAGE_LOC_LEN);
-
-		FillH2CCmd8723D(padapter, H2C_8723D_AOAC_RSVD_PAGE, H2C_AOAC_RSVDPAGE_LOC_LEN, u1H2CAoacRsvdPageParm);
-	} else {
-#ifdef CONFIG_PNO_SUPPORT
-		if (!pwrpriv->wowlan_in_resume) {
-			RTW_INFO("NLO_INFO=%d\n", rsvdpageloc->LocPNOInfo);
-			_rtw_memset(&u1H2CAoacRsvdPageParm, 0, sizeof(u1H2CAoacRsvdPageParm));
-			SET_H2CCMD_AOAC_RSVDPAGE_LOC_NLO_INFO(u1H2CAoacRsvdPageParm, rsvdpageloc->LocPNOInfo);
-			FillH2CCmd8723D(padapter, H2C_AOAC_RSVDPAGE3, H2C_AOAC_RSVDPAGE_LOC_LEN, u1H2CAoacRsvdPageParm);
-			rtw_msleep_os(10);
-		}
-#endif
-	}
-
-#endif /* CONFIG_WOWLAN */
-}
 void rtl8723d_set_FwPwrMode_cmd(PADAPTER padapter, u8 psmode)
 {
-	int i;
 	u8 smart_ps = 0;
 	struct pwrctrl_priv *pwrpriv = adapter_to_pwrctl(padapter);
-	struct mlme_ext_priv	*pmlmeext = &padapter->mlmeextpriv;
 	u8 u1H2CPwrModeParm[H2C_PWRMODE_LEN] = {0};
-	u8 PowerState = 0, awake_intvl = 1, byte5 = 0, rlbm = 0;
+	u8 PowerState = 0, awake_intvl = 1, rlbm = 0;
 #ifdef CONFIG_P2P
 	struct wifidirect_info *wdinfo = &(padapter->wdinfo);
 #endif /* CONFIG_P2P */
@@ -277,26 +213,13 @@ void rtl8723d_set_FwPwrMode_cmd(PADAPTER padapter, u8 psmode)
 
 	if (psmode > 0) {
 #ifdef CONFIG_BT_COEXIST
-		if (rtw_btcoex_IsBtControlLps(padapter) == _TRUE) {
+		if (rtw_btcoex_IsBtControlLps(padapter) == _TRUE)
 			PowerState = rtw_btcoex_RpwmVal(padapter);
-			byte5 = rtw_btcoex_LpsVal(padapter);
-
-			if ((rlbm == 2) && (byte5 & BIT(4))) {
-				/* Keep awake interval to 1 to prevent from */
-				/* decreasing coex performance */
-				awake_intvl = 2;
-				rlbm = 2;
-			}
-		} else
+		else
 #endif /* CONFIG_BT_COEXIST */
-		{
 			PowerState = 0x00;/* AllON(0x0C), RFON(0x04), RFOFF(0x00) */
-			byte5 = 0x40;
-		}
-	} else {
+	} else
 		PowerState = 0x0C;/* AllON(0x0C), RFON(0x04), RFOFF(0x00) */
-		byte5 = 0x40;
-	}
 
 	SET_8723D_H2CCMD_PWRMODE_PARM_MODE(u1H2CPwrModeParm, (psmode > 0) ? 1 : 0);
 	SET_8723D_H2CCMD_PWRMODE_PARM_SMART_PS(u1H2CPwrModeParm, smart_ps);
@@ -304,65 +227,6 @@ void rtl8723d_set_FwPwrMode_cmd(PADAPTER padapter, u8 psmode)
 	SET_8723D_H2CCMD_PWRMODE_PARM_BCN_PASS_TIME(u1H2CPwrModeParm, awake_intvl);
 	SET_8723D_H2CCMD_PWRMODE_PARM_ALL_QUEUE_UAPSD(u1H2CPwrModeParm, allQueueUAPSD);
 	SET_8723D_H2CCMD_PWRMODE_PARM_PWR_STATE(u1H2CPwrModeParm, PowerState);
-	SET_8723D_H2CCMD_PWRMODE_PARM_BYTE5(u1H2CPwrModeParm, byte5);
-#ifdef CONFIG_LPS_LCLK
-	if (psmode != PS_MODE_ACTIVE) {
-		if (pmlmeext->adaptive_tsf_done == _FALSE && pmlmeext->bcn_cnt > 0) {
-			u8 ratio_20_delay, ratio_80_delay;
-
-			/* byte 6 for adaptive_early_32k */
-			/* [0:3] = DrvBcnEarly  (ms) , [4:7] = DrvBcnTimeOut  (ms) */
-			/* 20% for DrvBcnEarly, 80% for DrvBcnTimeOut */
-			ratio_20_delay = 0;
-			ratio_80_delay = 0;
-			pmlmeext->DrvBcnEarly = 0xff;
-			pmlmeext->DrvBcnTimeOut = 0xff;
-
-			/* RTW_INFO("%s(): bcn_cnt = %d\n", __func__, pmlmeext->bcn_cnt); */
-
-			for (i = 0; i < 9; i++) {
-				pmlmeext->bcn_delay_ratio[i] = (pmlmeext->bcn_delay_cnt[i] * 100) / pmlmeext->bcn_cnt;
-
-				/* RTW_INFO("%s(): bcn_delay_cnt[%d]=%d, bcn_delay_ratio[%d] = %d\n", __func__, i, pmlmeext->bcn_delay_cnt[i] */
-				/*	,i ,pmlmeext->bcn_delay_ratio[i]); */
-
-				ratio_20_delay += pmlmeext->bcn_delay_ratio[i];
-				ratio_80_delay += pmlmeext->bcn_delay_ratio[i];
-
-				if (ratio_20_delay > 20 && pmlmeext->DrvBcnEarly == 0xff) {
-					pmlmeext->DrvBcnEarly = i;
-					/* RTW_INFO("%s(): DrvBcnEarly = %d\n", __func__, pmlmeext->DrvBcnEarly); */
-				}
-
-				if (ratio_80_delay > 80 && pmlmeext->DrvBcnTimeOut == 0xff) {
-					pmlmeext->DrvBcnTimeOut = i;
-					/* RTW_INFO("%s(): DrvBcnTimeOut = %d\n", __func__, pmlmeext->DrvBcnTimeOut); */
-				}
-
-				/* reset adaptive_early_32k cnt */
-				pmlmeext->bcn_delay_cnt[i] = 0;
-				pmlmeext->bcn_delay_ratio[i] = 0;
-
-			}
-
-			pmlmeext->bcn_cnt = 0;
-			pmlmeext->adaptive_tsf_done = _TRUE;
-
-		} else {
-			/* RTW_INFO("%s(): DrvBcnEarly = %d\n", __func__, pmlmeext->DrvBcnEarly); */
-			/* RTW_INFO("%s(): DrvBcnTimeOut = %d\n", __func__, pmlmeext->DrvBcnTimeOut); */
-		}
-
-		/* offload to FW if fw version > v15.10
-				pmlmeext->DrvBcnEarly=0;
-				pmlmeext->DrvBcnTimeOut=7;
-
-				if((pmlmeext->DrvBcnEarly!=0Xff) && (pmlmeext->DrvBcnTimeOut!=0xff))
-					u1H2CPwrModeParm[H2C_PWRMODE_LEN-1] = BIT(0) | ((pmlmeext->DrvBcnEarly<<1)&0x0E) |((pmlmeext->DrvBcnTimeOut<<4)&0xf0) ;
-		*/
-
-	}
-#endif
 
 #ifdef CONFIG_BT_COEXIST
 	rtw_btcoex_RecordPwrMode(padapter, u1H2CPwrModeParm, H2C_PWRMODE_LEN);
@@ -387,7 +251,6 @@ void rtl8723d_set_BcnEarly_C2H_Rpt_cmd(PADAPTER padapter, u8 enable)
 	SET_8723D_H2CCMD_PWRMODE_PARM_ALL_QUEUE_UAPSD(u1H2CSetPwrMode, 0);
 	SET_8723D_H2CCMD_PWRMODE_PARM_BCN_EARLY_C2H_RPT(u1H2CSetPwrMode, enable);
 	SET_8723D_H2CCMD_PWRMODE_PARM_PWR_STATE(u1H2CSetPwrMode, 0x0C);
-	SET_8723D_H2CCMD_PWRMODE_PARM_BYTE5(u1H2CSetPwrMode, 0);
 	FillH2CCmd8723D(padapter, H2C_8723D_SET_PWR_MODE, sizeof(u1H2CSetPwrMode), u1H2CSetPwrMode);
 }
 #endif
@@ -425,13 +288,14 @@ void rtl8723d_download_rsvd_page(PADAPTER padapter, u8 mstatus)
 	BOOLEAN		bcn_valid = _FALSE;
 	u8	DLBcnCount = 0;
 	u32 poll = 0;
-	u8 val8, RegFwHwTxQCtrl;
+	u8 RegFwHwTxQCtrl;
 
 
 	RTW_INFO("+" FUNC_ADPT_FMT ": hw_port=%d mstatus(%x)\n",
 		 FUNC_ADPT_ARG(padapter), get_hw_port(padapter), mstatus);
 
 	if (mstatus == RT_MEDIA_CONNECT) {
+		u8 bcn_ctrl = rtw_read8(padapter, REG_BCN_CTRL);
 		BOOLEAN bRecover = _FALSE;
 		u8 v8;
 
@@ -447,10 +311,7 @@ void rtl8723d_download_rsvd_page(PADAPTER padapter, u8 mstatus)
 		/* Disable Hw protection for a time which revserd for Hw sending beacon. */
 		/* Fix download reserved page packet fail that access collision with the protection time. */
 		/* 2010.05.11. Added by tynli. */
-		val8 = rtw_read8(padapter, REG_BCN_CTRL);
-		val8 &= ~EN_BCN_FUNCTION;
-		val8 |= DIS_TSF_UDT;
-		rtw_write8(padapter, REG_BCN_CTRL, val8);
+		rtw_write8(padapter, REG_BCN_CTRL, (bcn_ctrl & (~EN_BCN_FUNCTION)) | DIS_TSF_UDT);
 
 		/* Set FWHW_TXQ_CTRL 0x422[6]=0 to tell Hw the packet is not a real beacon frame. */
 		RegFwHwTxQCtrl = rtw_read8(padapter, REG_FWHW_TXQ_CTRL + 2);
@@ -469,7 +330,7 @@ void rtl8723d_download_rsvd_page(PADAPTER padapter, u8 mstatus)
 		poll = 0;
 		do {
 			/* download rsvd page. */
-			rtw_hal_set_fw_rsvd_page(padapter, 0);
+			rtw_hal_set_fw_rsvd_page(padapter, _FALSE);
 			DLBcnCount++;
 			do {
 				rtw_yield_os();
@@ -484,21 +345,19 @@ void rtl8723d_download_rsvd_page(PADAPTER padapter, u8 mstatus)
 		if (RTW_CANNOT_RUN(padapter))
 			;
 		else if (!bcn_valid)
-			RTW_INFO(ADPT_FMT": 1 DL RSVD page failed! DLBcnCount:%u, poll:%u\n",
+			RTW_ERR(ADPT_FMT": 1 DL RSVD page failed! DLBcnCount:%u, poll:%u\n",
 				 ADPT_ARG(padapter) , DLBcnCount, poll);
 		else {
 			struct pwrctrl_priv *pwrctl = adapter_to_pwrctl(padapter);
 
 			pwrctl->fw_psmode_iface_id = padapter->iface_id;
+			rtw_hal_set_fw_rsvd_page(padapter, _TRUE);
 			RTW_INFO(ADPT_FMT": 1 DL RSVD page success! DLBcnCount:%u, poll:%u\n",
 				 ADPT_ARG(padapter), DLBcnCount, poll);
 		}
 
-		/* 2010.05.11. Added by tynli. */
-		val8 = rtw_read8(padapter, REG_BCN_CTRL);
-		val8 |= EN_BCN_FUNCTION;
-		val8 &= ~DIS_TSF_UDT;
-		rtw_write8(padapter, REG_BCN_CTRL, val8);
+		/* restore bcn_ctrl */
+		rtw_write8(padapter, REG_BCN_CTRL, bcn_ctrl);
 
 		/* To make sure that if there exists an adapter which would like to send beacon. */
 		/* If exists, the origianl value of 0x422[6] will be 1, we should check this to */
@@ -522,226 +381,14 @@ void rtl8723d_download_rsvd_page(PADAPTER padapter, u8 mstatus)
 
 void rtl8723d_set_FwJoinBssRpt_cmd(PADAPTER padapter, u8 mstatus)
 {
-	struct sta_info *psta = NULL;
-	struct pwrctrl_priv *ppwrpriv = adapter_to_pwrctl(padapter);
-	struct mlme_priv	*pmlmepriv = &padapter->mlmepriv;
-
 	if (mstatus == 1)
 		rtl8723d_download_rsvd_page(padapter, RT_MEDIA_CONNECT);
 }
 
 #ifdef CONFIG_BT_COEXIST
-static void SetFwRsvdPagePkt_BTCoex(PADAPTER padapter)
-{
-	PHAL_DATA_TYPE pHalData;
-	struct xmit_frame *pcmdframe;
-	struct pkt_attrib *pattrib;
-	struct xmit_priv *pxmitpriv;
-	struct mlme_ext_priv *pmlmeext;
-	struct mlme_ext_info *pmlmeinfo;
-	u32	BeaconLength = 0;
-	u32	BTQosNullLength = 0;
-	u8 *ReservedPagePacket;
-	u8 TxDescLen, TxDescOffset;
-	u8 TotalPageNum = 0, CurtPktPageNum = 0, RsvdPageNum = 0;
-	u16	BufIndex, PageSize;
-	u32	TotalPacketLen, MaxRsvdPageBufSize = 0;
-	RSVDPAGE_LOC RsvdPageLoc;
-
-
-	/*	RTW_INFO("+" FUNC_ADPT_FMT "\n", FUNC_ADPT_ARG(padapter)); */
-
-	pHalData = GET_HAL_DATA(padapter);
-	pxmitpriv = &padapter->xmitpriv;
-	pmlmeext = &padapter->mlmeextpriv;
-	pmlmeinfo = &pmlmeext->mlmext_info;
-	TxDescLen = TXDESC_SIZE;
-	TxDescOffset = TXDESC_OFFSET;
-	PageSize = PAGE_SIZE_TX_8723D;
-
-	RsvdPageNum = BCNQ_PAGE_NUM_8723D;
-	MaxRsvdPageBufSize = RsvdPageNum * PageSize;
-
-	pcmdframe = rtw_alloc_cmdxmitframe(pxmitpriv);
-	if (pcmdframe == NULL) {
-		RTW_INFO("%s: alloc ReservedPagePacket fail!\n", __FUNCTION__);
-		return;
-	}
-
-	ReservedPagePacket = pcmdframe->buf_addr;
-	_rtw_memset(&RsvdPageLoc, 0, sizeof(RSVDPAGE_LOC));
-
-	/* 3 (1) beacon */
-	BufIndex = TxDescOffset;
-	rtw_hal_construct_beacon(padapter,
-		&ReservedPagePacket[BufIndex], &BeaconLength);
-
-	/* When we count the first page size, we need to reserve description size for the RSVD */
-	/* packet, it will be filled in front of the packet in TXPKTBUF. */
-	CurtPktPageNum = (u8)PageNum_128(TxDescLen + BeaconLength);
-	/* If we don't add 1 more page, the WOWLAN function has a problem. Baron thinks it's a bug of firmware */
-	if (CurtPktPageNum == 1)
-		CurtPktPageNum += 1;
-	TotalPageNum += CurtPktPageNum;
-
-	BufIndex += (CurtPktPageNum * PageSize);
-
-	/* Jump to lastest page */
-	if (BufIndex < (MaxRsvdPageBufSize - PageSize)) {
-		BufIndex = TxDescOffset + (MaxRsvdPageBufSize - PageSize);
-		TotalPageNum = BCNQ_PAGE_NUM_8723D - 1;
-	}
-
-	/* 3 (6) BT Qos null data */
-	RsvdPageLoc.LocBTQosNull = TotalPageNum;
-	rtw_hal_construct_NullFunctionData(
-		padapter,
-		&ReservedPagePacket[BufIndex],
-		&BTQosNullLength,
-		get_my_bssid(&pmlmeinfo->network),
-		_TRUE, 0, 0, _FALSE);
-	rtl8723d_fill_fake_txdesc(padapter, &ReservedPagePacket[BufIndex - TxDescLen], BTQosNullLength, _FALSE, _TRUE, _FALSE);
-
-	CurtPktPageNum = (u8)PageNum_128(TxDescLen + BTQosNullLength);
-
-	TotalPageNum += CurtPktPageNum;
-
-	TotalPacketLen = BufIndex + BTQosNullLength;
-	if (TotalPacketLen > MaxRsvdPageBufSize) {
-		RTW_INFO(FUNC_ADPT_FMT ": ERROR: The rsvd page size is not enough!!TotalPacketLen %d, MaxRsvdPageBufSize %d\n",
-			FUNC_ADPT_ARG(padapter), TotalPacketLen, MaxRsvdPageBufSize);
-		goto error;
-	}
-
-	/* update attribute */
-	pattrib = &pcmdframe->attrib;
-	update_mgntframe_attrib(padapter, pattrib);
-	pattrib->qsel = QSLT_BEACON;
-	pattrib->pktlen = pattrib->last_txcmdsz = TotalPacketLen - TxDescOffset;
-#ifdef CONFIG_PCI_HCI
-	dump_mgntframe(padapter, pcmdframe);
-#else
-	dump_mgntframe_and_wait(padapter, pcmdframe, 100);
-#endif
-
-	/*	RTW_INFO(FUNC_ADPT_FMT ": Set RSVD page location to Fw, TotalPacketLen(%d), TotalPageNum(%d)\n",
-	 *		FUNC_ADPT_ARG(padapter), TotalPacketLen, TotalPageNum); */
-	rtl8723d_set_FwRsvdPage_cmd(padapter, &RsvdPageLoc);
-	rtl8723d_set_FwAoacRsvdPage_cmd(padapter, &RsvdPageLoc);
-
-	return;
-
-error:
-	rtw_free_xmitframe(pxmitpriv, pcmdframe);
-}
-
 void rtl8723d_download_BTCoex_AP_mode_rsvd_page(PADAPTER padapter)
 {
-	PHAL_DATA_TYPE pHalData;
-	struct mlme_ext_priv *pmlmeext;
-	struct mlme_ext_info *pmlmeinfo;
-	u8 bRecover = _FALSE;
-	u8 bcn_valid = _FALSE;
-	u8 DLBcnCount = 0;
-	u32 poll = 0;
-	u8 val8, RegFwHwTxQCtrl;
-
-
-	RTW_INFO("+" FUNC_ADPT_FMT ": hw_port=%d fw_state=0x%08X\n",
-		FUNC_ADPT_ARG(padapter), get_hw_port(padapter), get_fwstate(&padapter->mlmepriv));
-
-#ifdef CONFIG_RTW_DEBUG
-	if (check_fwstate(&padapter->mlmepriv, WIFI_AP_STATE) == _FALSE) {
-		RTW_INFO(FUNC_ADPT_FMT ": [WARNING] not in AP mode!!\n",
-			 FUNC_ADPT_ARG(padapter));
-	}
-#endif /* CONFIG_RTW_DEBUG */
-
-	pHalData = GET_HAL_DATA(padapter);
-	pmlmeext = &padapter->mlmeextpriv;
-	pmlmeinfo = &pmlmeext->mlmext_info;
-
-	/* We should set AID, correct TSF, HW seq enable before set JoinBssReport to Fw in 88/92C. */
-	/* Suggested by filen. Added by tynli. */
-	rtw_write16(padapter, REG_BCN_PSR_RPT, (0xC000 | pmlmeinfo->aid));
-
-	/* set REG_CR bit 8 */
-	val8 = rtw_read8(padapter, REG_CR + 1);
-	val8 |= BIT(0); /* ENSWBCN */
-	rtw_write8(padapter,  REG_CR + 1, val8);
-
-	/* Disable Hw protection for a time which revserd for Hw sending beacon. */
-	/* Fix download reserved page packet fail that access collision with the protection time. */
-	/* 2010.05.11. Added by tynli. */
-	val8 = rtw_read8(padapter, REG_BCN_CTRL);
-	val8 &= ~EN_BCN_FUNCTION;
-	val8 |= DIS_TSF_UDT;
-	rtw_write8(padapter, REG_BCN_CTRL, val8);
-
-	/* Set FWHW_TXQ_CTRL 0x422[6]=0 to tell Hw the packet is not a real beacon frame. */
-	RegFwHwTxQCtrl = rtw_read8(padapter, REG_FWHW_TXQ_CTRL + 2);
-	if (RegFwHwTxQCtrl & BIT(6))
-		bRecover = _TRUE;
-
-	/* To tell Hw the packet is not a real beacon frame. */
-	RegFwHwTxQCtrl &= ~BIT(6);
-	rtw_write8(padapter, REG_FWHW_TXQ_CTRL + 2, RegFwHwTxQCtrl);
-
-	/* Clear beacon valid check bit. */
-	rtw_hal_set_hwreg(padapter, HW_VAR_BCN_VALID, NULL);
-	rtw_hal_set_hwreg(padapter, HW_VAR_DL_BCN_SEL, NULL);
-
-	DLBcnCount = 0;
-	poll = 0;
-	do {
-		SetFwRsvdPagePkt_BTCoex(padapter);
-		DLBcnCount++;
-		do {
-			rtw_yield_os();
-			/*			rtw_mdelay_os(10); */
-			/* check rsvd page download OK. */
-			rtw_hal_get_hwreg(padapter, HW_VAR_BCN_VALID, &bcn_valid);
-			poll++;
-		} while (!bcn_valid && (poll % 10) != 0 && !RTW_CANNOT_RUN(padapter));
-	} while (!bcn_valid && (DLBcnCount <= 100) && !RTW_CANNOT_RUN(padapter));
-
-	if (_TRUE == bcn_valid) {
-		struct pwrctrl_priv *pwrctl = adapter_to_pwrctl(padapter);
-
-		pwrctl->fw_psmode_iface_id = padapter->iface_id;
-		RTW_INFO(ADPT_FMT": DL RSVD page success! DLBcnCount:%d, poll:%d\n",
-			 ADPT_ARG(padapter), DLBcnCount, poll);
-	} else {
-		RTW_INFO(ADPT_FMT": DL RSVD page fail! DLBcnCount:%d, poll:%d\n",
-			 ADPT_ARG(padapter), DLBcnCount, poll);
-		RTW_INFO(ADPT_FMT": DL RSVD page fail! bSurpriseRemoved=%s\n",
-			ADPT_ARG(padapter), rtw_is_surprise_removed(padapter) ? "True" : "False");
-		RTW_INFO(ADPT_FMT": DL RSVD page fail! bDriverStopped=%s\n",
-			ADPT_ARG(padapter), rtw_is_drv_stopped(padapter) ? "True" : "False");
-	}
-
-	/* 2010.05.11. Added by tynli. */
-	val8 = rtw_read8(padapter, REG_BCN_CTRL);
-	val8 |= EN_BCN_FUNCTION;
-	val8 &= ~DIS_TSF_UDT;
-	rtw_write8(padapter, REG_BCN_CTRL, val8);
-
-	/* To make sure that if there exists an adapter which would like to send beacon. */
-	/* If exists, the origianl value of 0x422[6] will be 1, we should check this to */
-	/* prevent from setting 0x422[6] to 0 after download reserved page, or it will cause */
-	/* the beacon cannot be sent by HW. */
-	/* 2010.06.23. Added by tynli. */
-	if (bRecover) {
-		RegFwHwTxQCtrl |= BIT(6);
-		rtw_write8(padapter, REG_FWHW_TXQ_CTRL + 2, RegFwHwTxQCtrl);
-	}
-
-	/* Clear CR[8] or beacon packet will not be send to TxBuf anymore. */
-#ifndef CONFIG_PCI_HCI
-	val8 = rtw_read8(padapter, REG_CR + 1);
-	val8 &= ~BIT(0); /* ~ENSWBCN */
-	rtw_write8(padapter, REG_CR + 1, val8);
-#endif
+	rtl8723d_download_rsvd_page(padapter, RT_MEDIA_CONNECT);
 }
 #endif /* CONFIG_BT_COEXIST */
 
diff --git a/rtl8723DS/hal/rtl8723d/rtl8723d_dm.c b/rtl8723DS/hal/rtl8723d/rtl8723d_dm.c
index 7db7370..514c06d 100755..100644
--- a/rtl8723DS/hal/rtl8723d/rtl8723d_dm.c
+++ b/rtl8723DS/hal/rtl8723d/rtl8723d_dm.c
@@ -207,7 +207,7 @@ dm_InitGPIOSetting(
 static void Init_ODM_ComInfo_8723d(PADAPTER	Adapter)
 {
 	PHAL_DATA_TYPE	pHalData = GET_HAL_DATA(Adapter);
-	struct PHY_DM_STRUCT		*pDM_Odm = &(pHalData->odmpriv);
+	struct dm_struct		*pDM_Odm = &(pHalData->odmpriv);
 	u8	cut_ver, fab_ver;
 
 	Init_ODM_ComInfo(Adapter);
@@ -228,13 +228,12 @@ rtl8723d_InitHalDm(
 )
 {
 	PHAL_DATA_TYPE	pHalData = GET_HAL_DATA(Adapter);
-	struct PHY_DM_STRUCT		*pDM_Odm = &(pHalData->odmpriv);
+	struct dm_struct		*pDM_Odm = &(pHalData->odmpriv);
 
 #ifdef CONFIG_USB_HCI
 	dm_InitGPIOSetting(Adapter);
 #endif
-	odm_dm_init(pDM_Odm);
-
+	rtw_phydm_init(Adapter);
 }
 
 VOID
@@ -245,6 +244,8 @@ rtl8723d_HalDmWatchDog(
 	BOOLEAN		bFwCurrentInPSMode = _FALSE;
 	u8 bFwPSAwake = _TRUE;
 	PHAL_DATA_TYPE	pHalData = GET_HAL_DATA(Adapter);
+	struct pwrctrl_priv *pwrpriv = adapter_to_pwrctl(Adapter);
+	u8 in_lps = _FALSE;
 
 #ifdef CONFIG_MP_INCLUDED
 	/* #if MP_DRIVER */
@@ -257,7 +258,7 @@ rtl8723d_HalDmWatchDog(
 		goto skip_dm;
 
 #ifdef CONFIG_LPS
-	bFwCurrentInPSMode = adapter_to_pwrctl(Adapter)->bFwCurrentInPSMode;
+	bFwCurrentInPSMode = pwrpriv->bFwCurrentInPSMode;
 	rtw_hal_get_hwreg(Adapter, HW_VAR_FWLPS_RF_ON, &bFwPSAwake);
 #endif
 
@@ -291,7 +292,13 @@ rtl8723d_HalDmWatchDog(
 #ifdef CONFIG_DISABLE_ODM
 	goto skip_dm;
 #endif
-	rtw_phydm_watchdog(Adapter);
+
+#ifdef CONFIG_LPS
+	if (pwrpriv->bLeisurePs && bFwCurrentInPSMode && pwrpriv->pwr_mode != PS_MODE_ACTIVE)
+		in_lps = _TRUE;
+#endif
+
+	rtw_phydm_watchdog(Adapter, in_lps);
 
 skip_dm:
 
@@ -311,7 +318,7 @@ skip_dm:
 void rtl8723d_init_dm_priv(IN PADAPTER Adapter)
 {
 	PHAL_DATA_TYPE	pHalData = GET_HAL_DATA(Adapter);
-	struct PHY_DM_STRUCT		*podmpriv = &pHalData->odmpriv;
+	struct dm_struct		*podmpriv = &pHalData->odmpriv;
 
 	Init_ODM_ComInfo_8723d(Adapter);
 	odm_init_all_timers(podmpriv);
@@ -321,7 +328,7 @@ void rtl8723d_init_dm_priv(IN PADAPTER Adapter)
 void rtl8723d_deinit_dm_priv(IN PADAPTER Adapter)
 {
 	PHAL_DATA_TYPE	pHalData = GET_HAL_DATA(Adapter);
-	struct PHY_DM_STRUCT		*podmpriv = &pHalData->odmpriv;
+	struct dm_struct		*podmpriv = &pHalData->odmpriv;
 
 	odm_cancel_all_timers(podmpriv);
 
diff --git a/rtl8723DS/hal/rtl8723d/rtl8723d_hal_init.c b/rtl8723DS/hal/rtl8723d/rtl8723d_hal_init.c
index 2a20123..5ef9e87 100755..100644
--- a/rtl8723DS/hal/rtl8723d/rtl8723d_hal_init.c
+++ b/rtl8723DS/hal/rtl8723d/rtl8723d_hal_init.c
@@ -425,11 +425,11 @@ int _WriteBTFWtoTxPktBuf8723D(
 	struct pkt_attrib	*pattrib;
 	u8			txdesc_offset = TXDESC_OFFSET;
 	u8			val8, RegFwHwTxQCtrl;
-#if (DEV_BUS_TYPE == RT_PCI_INTERFACE)
+#ifdef CONFIG_PCI_HCI
 	u8			u1bTmp;
 #endif
 
-#if 1/* (DEV_BUS_TYPE == RT_PCI_INTERFACE) */
+#if 1/* #ifdef CONFIG_PCI_HCI */
 	TotalPktLen = FwBufLen;
 #else
 	TotalPktLen = FwBufLen + pHalData->HWDescHeadLength;
@@ -449,7 +449,7 @@ int _WriteBTFWtoTxPktBuf8723D(
 
 	_rtw_memset(ReservedPagePacket, 0, TotalPktLen);
 
-#if 1/* (DEV_BUS_TYPE == RT_PCI_INTERFACE) */
+#if 1/* #ifdef CONFIG_PCI_HCI */
 	_rtw_memcpy(ReservedPagePacket, FwbufferPtr, FwBufLen);
 
 #else
@@ -460,7 +460,7 @@ int _WriteBTFWtoTxPktBuf8723D(
 	/* 1. Pause BCN */
 	/* --------------------------------------------------------- */
 	/* Set REG_CR bit 8. DMA beacon by SW. */
-#if (DEV_BUS_TYPE == RT_PCI_INTERFACE)
+#ifdef CONFIG_PCI_HCI
 	u1bTmp = PlatformEFIORead1Byte(Adapter, REG_CR + 1);
 	PlatformEFIOWrite1Byte(Adapter,  REG_CR + 1, (u1bTmp | BIT(0)));
 #else
@@ -476,7 +476,7 @@ int _WriteBTFWtoTxPktBuf8723D(
 	val8 |= DIS_TSF_UDT;
 	rtw_write8(Adapter, REG_BCN_CTRL, val8);
 
-#if 0/* (DEV_BUS_TYPE == RT_PCI_INTERFACE) */
+#if 0/* #ifdef CONFIG_PCI_HCI */
 	tmpReg422 = PlatformEFIORead1Byte(Adapter, REG_FWHW_TXQ_CTRL + 2);
 	if (tmpReg422 & BIT(6))
 		bRecover = TRUE;
@@ -492,7 +492,7 @@ int _WriteBTFWtoTxPktBuf8723D(
 	/* --------------------------------------------------------- */
 	/* 2. Adjust LLT table to an even boundary. */
 	/* --------------------------------------------------------- */
-#if 0/* (DEV_BUS_TYPE == RT_SDIO_INTERFACE) */
+#if 0/* #ifdef CONFIG_SDIO_HCI */
 	txpktbuf_bndy = 10; /* rsvd page start address should be an even value.														 */
 	rtStatus =	InitLLTTable8723DS(Adapter, txpktbuf_bndy);
 	if (RT_STATUS_SUCCESS != rtStatus) {
@@ -686,7 +686,7 @@ _CheckWLANFwPatchBTFwReady(
 	/* --------------------------------------------------------- */
 	/* Reset beacon setting to the initial value. */
 	/* --------------------------------------------------------- */
-#if 0/* (DEV_BUS_TYPE == RT_PCI_INTERFACE) */
+#if 0/* #ifdef CONFIG_PCI_HCI */
 	if (LLT_table_init(Adapter, FALSE, 0) == RT_STATUS_FAILURE) {
 		dbgdump("Init self define for BT Fw patch LLT table fail.\n");
 		/* return RT_STATUS_FAILURE; */
@@ -2803,7 +2803,7 @@ void rtl8723d_InitBeaconParameters(PADAPTER padapter)
 
 	/* Suggested by designer timchen. Change beacon AIFS to the largest number */
 	/* beacause test chip does not contension before sending beacon. by tynli. 2009.11.03 */
-	rtw_write16(padapter, REG_BCNTCFG, 0x660F);
+	rtw_write16(padapter, REG_BCNTCFG, 0x4413);
 
 }
 
@@ -2818,6 +2818,7 @@ void rtl8723d_InitBeaconMaxError(PADAPTER padapter, u8 InfraMode)
 
 void _InitMacAPLLSetting_8723D(PADAPTER Adapter)
 {
+
 	PHAL_DATA_TYPE	pHalData = GET_HAL_DATA(Adapter);
 	u16 RegValue;
 	u8	afe;
@@ -2827,19 +2828,20 @@ void _InitMacAPLLSetting_8723D(PADAPTER Adapter)
 	RegValue |= BIT(15);
 	rtw_write16(Adapter, REG_AFE_CTRL_4_8723D, RegValue);
 
-/*
- *	8723D with 24MHz xtal has VCO noise issue
- *  This will cause some TRx test fail
- *	Therefore, set MAC GM parameter for 24MHz xtal
- *	AFE[0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 ] =
- *	[ 40M 25M 13M 19.2M 20M 26M 38.4M 17.664M 16M 14.318M 12M 52M 48M 27M 24M ]
- */
+	/*
+	 *	8723D with 24MHz xtal has VCO noise issue
+	 *  This will cause some TRx test fail
+	 *	Therefore, set MAC GM parameter for 24MHz xtal
+	 *	AFE[0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 ] =
+	 *	[ 40M 25M 13M 19.2M 20M 26M 38.4M 17.664M 16M 14.318M 12M 52M 48M 27M 24M ]
+	 */
 	afe = (pHalData->efuse_eeprom_data[4] >>4);
 	if( afe == 14) {
 		rtw_write32(Adapter, 0x2c, (rtw_read32(Adapter, 0x2c) | BIT28));
 		rtw_write32(Adapter, 0x24, (rtw_read32(Adapter, 0x24) & 0xFFFFFF0F));
 		rtw_write32(Adapter, 0x7c, ((rtw_read32(Adapter, 0x7c) | BIT29) & (~BIT28)));
 	}
+
 }
 
 static void _BeaconFunctionEnable(PADAPTER padapter, u8 Enable, u8 Linked)
@@ -2859,7 +2861,7 @@ static void rtl8723d_SetBeaconRelatedRegisters(PADAPTER padapter)
 
 	/* reset TSF, enable update TSF, correcting TSF On Beacon */
 
-	/* REG_BCN_INTERVAL */
+	/* REG_MBSSID_BCN_SPACE */
 	/* REG_BCNDMATIM */
 	/* REG_ATIMWND */
 	/* REG_TBTT_PROHIBIT */
@@ -2884,7 +2886,7 @@ static void rtl8723d_SetBeaconRelatedRegisters(PADAPTER padapter)
 	/* */
 	/* Beacon interval (in unit of TU). */
 	/* */
-	rtw_write16(padapter, REG_BCN_INTERVAL, pmlmeinfo->bcn_interval);
+	rtw_hal_set_hwreg(padapter, HW_VAR_BEACON_INTERVAL, (u8 *)&pmlmeinfo->bcn_interval);
 
 	rtl8723d_InitBeaconParameters(padapter);
 
@@ -3109,6 +3111,8 @@ void init_hal_spec_8723d(_adapter *adapter)
 	hal_spec->sec_cap = SEC_CAP_CHK_BMC;
 	hal_spec->rfpath_num_2g = 2;
 	hal_spec->rfpath_num_5g = 0;
+	hal_spec->txgi_max = 63;
+	hal_spec->txgi_pdbm = 2;
 	hal_spec->max_tx_cnt = 1;
 	hal_spec->tx_nss_num = 1;
 	hal_spec->rx_nss_num = 1;
@@ -3123,6 +3127,9 @@ void init_hal_spec_8723d(_adapter *adapter)
 			    | WL_FUNC_TDLS
 			    ;
 
+	hal_spec->pg_txpwr_saddr = 0x10;
+	hal_spec->pg_txgi_diff_factor = 1;
+
 	rtw_macid_ctl_init_sleep_reg(adapter_to_macidctl(adapter)
 		, REG_MACID_SLEEP, 0, 0, 0);
 }
@@ -3134,8 +3141,6 @@ void rtl8723d_init_default_value(PADAPTER padapter)
 
 	pHalData = GET_HAL_DATA(padapter);
 
-	padapter->registrypriv.wireless_mode = WIRELESS_11BG_24N;
-
 	/* init default value */
 	pHalData->fw_ractrl = _FALSE;
 	if (!adapter_to_pwrctl(padapter)->bkeepfwalive)
@@ -3143,10 +3148,6 @@ void rtl8723d_init_default_value(PADAPTER padapter)
 
 	/* init phydm default value */
 	pHalData->bIQKInitialized = _FALSE;
-	pHalData->odmpriv.rf_calibrate_info.tm_trigger = 0;/* for IQK */
-	pHalData->odmpriv.rf_calibrate_info.thermal_value_hp_index = 0;
-	for (i = 0; i < HP_THERMAL_NUM; i++)
-		pHalData->odmpriv.rf_calibrate_info.thermal_value_hp[i] = 0;
 
 	/* init Efuse variables */
 	pHalData->EfuseUsedBytes = 0;
@@ -3743,55 +3744,6 @@ Hal_EfuseParseEEPROMVer_8723D(
 		pHalData->EEPROMVersion = 1;
 }
 
-
-VOID
-Hal_EfuseParsePackageType_8723D(
-	IN	PADAPTER		pAdapter,
-	IN	u8				*hwinfo,
-	IN	BOOLEAN		AutoLoadFail
-)
-{
-	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(pAdapter);
-	u1Byte			package;
-	u8 efuseContent;
-
-	Efuse_PowerSwitch(pAdapter, _FALSE, _TRUE);
-	efuse_OneByteRead(pAdapter, 0x1FB, &efuseContent, FALSE);
-	RTW_INFO("%s phy efuse read 0x1FB =%x\n", __func__, efuseContent);
-	Efuse_PowerSwitch(pAdapter, _FALSE, _FALSE);
-
-	package = efuseContent & 0x7;
-	switch (package) {
-	case 0x4:
-		pHalData->PackageType = PACKAGE_TFBGA79;
-		break;
-	case 0x5:
-		pHalData->PackageType = PACKAGE_TFBGA90;
-		break;
-	case 0x6:
-		pHalData->PackageType = PACKAGE_QFN68;
-		break;
-	case 0x7:
-		pHalData->PackageType = PACKAGE_TFBGA80;
-		break;
-
-	default:
-		pHalData->PackageType = PACKAGE_DEFAULT;
-		break;
-	}
-
-	RTW_INFO("PackageType = 0x%X\n", pHalData->PackageType);
-
-#ifdef CONFIG_SDIO_HCI
-	/* RTL8703AS: 0x1FB[5:4] 2b'10 */
-	/* RTL8723DS: 0x1FB[5:4] 2b'11 */
-	if ((efuseContent & 0x30) == 0x20) {
-		pAdapter->registrypriv.bw_mode &= 0xF0;
-		RTW_INFO("This is the case of 8703AS\n");
-	}
-#endif
-}
-
 VOID
 Hal_EfuseParseVoltage_8723D(
 	IN	PADAPTER		pAdapter,
@@ -4241,10 +4193,16 @@ static void rtl8723d_fill_default_txdesc(
 			SET_TX_DESC_USE_RATE_8723D(pbuf, 1);
 			if (pmlmeinfo->preamble_mode == PREAMBLE_SHORT)
 				SET_TX_DESC_DATA_SHORT_8723D(pbuf, 1);
-			SET_TX_DESC_TX_RATE_8723D(pbuf, MRateToHwRate(pmlmeext->tx_rate));
-
-			RTW_INFO(FUNC_ADPT_FMT ": SP Packet(0x%04X) rate=0x%x\n",
-				FUNC_ADPT_ARG(padapter), pattrib->ether_type, MRateToHwRate(pmlmeext->tx_rate));
+#ifdef CONFIG_IP_R_MONITOR
+			if((pattrib->ether_type == ETH_P_ARP) &&
+				(IsSupportedTxOFDM(padapter->registrypriv.wireless_mode))) 
+				SET_TX_DESC_TX_RATE_8723D(pbuf, MRateToHwRate(IEEE80211_OFDM_RATE_6MB));
+			 else
+#endif/*CONFIG_IP_R_MONITOR*/
+				SET_TX_DESC_TX_RATE_8723D(pbuf, MRateToHwRate(pmlmeext->tx_rate));
+
+			RTW_INFO(FUNC_ADPT_FMT ": SP Packet(0x%04X) rate=0x%x SeqNum = %d\n",
+				FUNC_ADPT_ARG(padapter), pattrib->ether_type, MRateToHwRate(pmlmeext->tx_rate), pattrib->seqnum);
 		}
 
 #if defined(CONFIG_USB_TX_AGGREGATION) || defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI)
@@ -4376,13 +4334,15 @@ static void hw_var_set_monitor(PADAPTER Adapter, u8 variable, u8 *val)
 
 	if (*((u8 *)val) == _HW_STATE_MONITOR_) {
 
-
+#ifdef CONFIG_CUSTOMER_ALIBABA_GENERAL
+		rcr_bits = RCR_AAP | RCR_APM | RCR_AM | RCR_AB | RCR_APWRMGT | RCR_ADF | RCR_AMF | RCR_APP_PHYST_RXFF;
+#else
 		/* Receive all type */
 		rcr_bits = RCR_AAP | RCR_APM | RCR_AM | RCR_AB | RCR_APWRMGT | RCR_ADF | RCR_ACF | RCR_AMF | RCR_APP_PHYST_RXFF;
 
 		/* Append FCS */
 		rcr_bits |= RCR_APPFCS;
-
+#endif
 #if 0
 		/*
 		   CRC and ICV packet will drop in recvbuf2recvframe()
@@ -4438,9 +4398,7 @@ static void hw_var_set_opmode(PADAPTER padapter, u8 variable, u8 *val)
 #ifdef CONFIG_CONCURRENT_MODE
 	if (padapter->hw_port == HW_PORT1) {
 		/* disable Port1 TSF update */
-		val8 = rtw_read8(padapter, REG_BCN_CTRL_1);
-		val8 |= DIS_TSF_UDT;
-		rtw_write8(padapter, REG_BCN_CTRL_1, val8);
+		rtw_iface_disable_tsf_update(padapter);
 
 		Set_MSR(padapter, mode);
 
@@ -4490,8 +4448,6 @@ static void hw_var_set_opmode(PADAPTER padapter, u8 variable, u8 *val)
 #endif /* CONFIG_INTERRUPT_BASED_TXBCN */
 #endif /* !CONFIG_PCI_HCI */
 
-			ResumeTxBeacon(padapter);
-
 			rtw_write8(padapter, REG_BCN_CTRL_1, DIS_TSF_UDT | DIS_BCNQ_SUB);
 
 			/* enable to rx data frame*/
@@ -4504,7 +4460,6 @@ static void hw_var_set_opmode(PADAPTER padapter, u8 variable, u8 *val)
 
 			/* rtw_write8(padapter, REG_BCN_MAX_ERR, 0xFF); */
 			rtw_write8(padapter, REG_ATIMWND_1, 0x0c); /* 13ms for port1 */
-			rtw_write16(padapter, REG_BCNTCFG, 0x00);
 
 			rtw_write16(padapter, REG_TSFTR_SYN_OFFSET, 0x7fff);/* +32767 (~32ms) */
 
@@ -4532,8 +4487,7 @@ static void hw_var_set_opmode(PADAPTER padapter, u8 variable, u8 *val)
 
 #ifdef CONFIG_TSF_RESET_OFFLOAD
 			/* Reset TSF for STA+AP concurrent mode */
-			if (rtw_mi_buddy_check_fwstate(padapter,
-				(WIFI_STATION_STATE | WIFI_ASOC_STATE))) {
+			if (DEV_STA_LD_NUM(adapter_to_dvobj(padapter))) {
 				if (rtw_hal_reset_tsf(padapter, HW_PORT1) == _FAIL)
 					RTW_INFO("ERROR! %s()-%d: Reset port1 TSF fail\n",
 						 __FUNCTION__, __LINE__);
@@ -4547,9 +4501,7 @@ static void hw_var_set_opmode(PADAPTER padapter, u8 variable, u8 *val)
 		hw_var_set_opmode_mbid(padapter, mode);
 #else
 		/* disable Port0 TSF update */
-		val8 = rtw_read8(padapter, REG_BCN_CTRL);
-		val8 |= DIS_TSF_UDT;
-		rtw_write8(padapter, REG_BCN_CTRL, val8);
+		rtw_iface_disable_tsf_update(padapter);
 
 		/* set net_type */
 		Set_MSR(padapter, mode);
@@ -4582,7 +4534,7 @@ static void hw_var_set_opmode(PADAPTER padapter, u8 variable, u8 *val)
 
 			/* disable atim wnd */
 			rtw_write8(padapter, REG_BCN_CTRL, DIS_TSF_UDT | EN_BCN_FUNCTION | DIS_ATIM);
-			/* rtw_write8(padapter,REG_BCN_CTRL, 0x18); */
+			/* rtw_write8(padapter,REG_BCN_CTRL, DIS_TSF_UDT | EN_BCN_FUNCTION); */
 		} else if (mode == _HW_STATE_ADHOC_) {
 			ResumeTxBeacon(padapter);
 			rtw_write8(padapter, REG_BCN_CTRL, DIS_TSF_UDT | EN_BCN_FUNCTION | DIS_BCNQ_SUB);
@@ -4602,8 +4554,6 @@ static void hw_var_set_opmode(PADAPTER padapter, u8 variable, u8 *val)
 #endif /* CONFIG_INTERRUPT_BASED_TXBCN */
 #endif
 
-			ResumeTxBeacon(padapter);
-
 			rtw_write8(padapter, REG_BCN_CTRL, DIS_TSF_UDT | DIS_BCNQ_SUB);
 
 			/* enable to rx data frame */
@@ -4616,7 +4566,6 @@ static void hw_var_set_opmode(PADAPTER padapter, u8 variable, u8 *val)
 
 			/* rtw_write8(padapter, REG_BCN_MAX_ERR, 0xFF); */
 			rtw_write8(padapter, REG_ATIMWND, 0x0c); /* 13ms */
-			rtw_write16(padapter, REG_BCNTCFG, 0x00);
 
 			rtw_write16(padapter, REG_TSFTR_SYN_OFFSET, 0x7fff);/* +32767 (~32ms) */
 
@@ -4641,8 +4590,7 @@ static void hw_var_set_opmode(PADAPTER padapter, u8 variable, u8 *val)
 			rtw_write8(padapter, REG_BCN_CTRL_1, val8);
 #ifdef CONFIG_TSF_RESET_OFFLOAD
 			/* Reset TSF for STA+AP concurrent mode */
-			if (rtw_mi_buddy_check_fwstate(padapter,
-				(WIFI_STATION_STATE | WIFI_ASOC_STATE))) {
+			if (DEV_STA_LD_NUM(adapter_to_dvobj(padapter))) {
 				if (rtw_hal_reset_tsf(padapter, HW_PORT0) == _FAIL)
 					RTW_INFO("ERROR! %s()-%d: Reset port0 TSF fail\n",
 						 __FUNCTION__, __LINE__);
@@ -4653,163 +4601,6 @@ static void hw_var_set_opmode(PADAPTER padapter, u8 variable, u8 *val)
 	}
 }
 
-static void hw_var_set_bcn_func(PADAPTER padapter, u8 variable, u8 *val)
-{
-	u32 bcn_ctrl_reg;
-
-#ifdef CONFIG_CONCURRENT_MODE
-	if (padapter->hw_port == HW_PORT1)
-		bcn_ctrl_reg = REG_BCN_CTRL_1;
-	else
-#endif
-	{
-		bcn_ctrl_reg = REG_BCN_CTRL;
-	}
-
-	if (*(u8 *)val)
-		rtw_write8(padapter, bcn_ctrl_reg, (EN_BCN_FUNCTION | EN_TXBCN_RPT));
-	else {
-		u8 val8;
-
-		val8 = rtw_read8(padapter, bcn_ctrl_reg);
-		val8 &= ~(EN_BCN_FUNCTION | EN_TXBCN_RPT);
-#ifdef CONFIG_BT_COEXIST
-		/* Always enable port0 beacon function for PSTDMA */
-		if (REG_BCN_CTRL == bcn_ctrl_reg)
-			val8 |= EN_BCN_FUNCTION;
-#endif
-		rtw_write8(padapter, bcn_ctrl_reg, val8);
-	}
-}
-
-static void hw_var_set_mlme_disconnect(PADAPTER padapter, u8 variable, u8 *val)
-{
-	u8 val8;
-
-	/* reject all data frames */
-#ifdef CONFIG_CONCURRENT_MODE
-	if (rtw_mi_check_status(padapter, MI_LINKED) == _FALSE)
-#endif
-		rtw_write16(padapter, REG_RXFLTMAP2, 0);
-
-#ifdef CONFIG_CONCURRENT_MODE
-	if (padapter->hw_port == HW_PORT1) {
-	/* reset TSF1 */
-		rtw_write8(padapter, REG_DUAL_TSF_RST, BIT(1));
-
-	/* disable update TSF1 */
-		val8 = rtw_read8(padapter, REG_BCN_CTRL_1);
-		val8 |= DIS_TSF_UDT;
-		rtw_write8(padapter, REG_BCN_CTRL_1, val8);
-	} else
-#endif
-	{
-	/* reset TSF */
-		rtw_write8(padapter, REG_DUAL_TSF_RST, BIT(0));
-
-	/* disable update TSF */
-		val8 = rtw_read8(padapter, REG_BCN_CTRL);
-		val8 |= DIS_TSF_UDT;
-		rtw_write8(padapter, REG_BCN_CTRL, val8);
-	}
-}
-
-static void hw_var_set_mlme_join(PADAPTER padapter, u8 variable, u8 *val)
-{
-	u8 val8;
-	u16 val16;
-	u32 val32;
-	u8 RetryLimit;
-	u8 type;
-	PHAL_DATA_TYPE pHalData;
-	struct mlme_priv *pmlmepriv;
-
-	RetryLimit = RL_VAL_STA;
-	type = *(u8 *)val;
-	pHalData = GET_HAL_DATA(padapter);
-	pmlmepriv = &padapter->mlmepriv;
-#ifdef CONFIG_CONCURRENT_MODE
-	if (type == 0) {
-		/* prepare to join */
-		if (rtw_mi_get_ap_num(padapter) || rtw_mi_get_mesh_num(padapter))
-			StopTxBeacon(padapter);
-
-		/* enable to rx data frame.Accept all data frame */
-		rtw_write16(padapter, REG_RXFLTMAP2, 0xFFFF);
-
-		if (check_fwstate(pmlmepriv, WIFI_STATION_STATE) == _TRUE)
-			RetryLimit = (pHalData->CustomerID == RT_CID_CCX) ? RL_VAL_AP : RL_VAL_STA;
-		else /* Ad-hoc Mode */
-			RetryLimit = RL_VAL_AP;
-		} else if (type == 1) {
-			/* joinbss_event call back when join res < 0 */
-			if (rtw_mi_check_status(padapter, MI_LINKED) == _FALSE)
-				rtw_write16(padapter, REG_RXFLTMAP2, 0x00);
-
-			if (rtw_mi_get_ap_num(padapter) || rtw_mi_get_mesh_num(padapter)) {
-				ResumeTxBeacon(padapter);
-				/* reset TSF 1/2 after ResumeTxBeacon */
-				rtw_write8(padapter, REG_DUAL_TSF_RST, BIT(1) | BIT(0));
-			}
-		} else if (type == 2) {
-			/* sta add event call back */
-#ifdef CONFIG_MI_WITH_MBSSID_CAM
-			/*if (check_fwstate(pmlmepriv, WIFI_STATION_STATE) && (rtw_mi_get_assoced_sta_num(padapter) == 1))
-				rtw_write8(padapter, REG_BCN_CTRL, rtw_read8(padapter, REG_BCN_CTRL)&(~DIS_TSF_UDT));*/
-#else
-			/* enable update TSF */
-			if (padapter->hw_port == HW_PORT1) {
-				val8 = rtw_read8(padapter, REG_BCN_CTRL_1);
-				val8 &= ~DIS_TSF_UDT;
-				rtw_write8(padapter, REG_BCN_CTRL_1, val8);
-			} else {
-				val8 = rtw_read8(padapter, REG_BCN_CTRL);
-				val8 &= ~DIS_TSF_UDT;
-				rtw_write8(padapter, REG_BCN_CTRL, val8);
-			}
-#endif
-			if (check_fwstate(pmlmepriv,
-				WIFI_ADHOC_STATE | WIFI_ADHOC_MASTER_STATE)) {
-				rtw_write8(padapter, 0x542 , 0x02);
-				RetryLimit = RL_VAL_AP;
-			}
-
-			if (rtw_mi_get_ap_num(padapter) || rtw_mi_get_mesh_num(padapter)) {
-				ResumeTxBeacon(padapter);
-
-			/* reset TSF 1/2 after ResumeTxBeacon */
-				rtw_write8(padapter, REG_DUAL_TSF_RST, BIT(1) | BIT(0));
-			}
-		}
-
-		val16 = (RetryLimit << RETRY_LIMIT_SHORT_SHIFT) | (RetryLimit << RETRY_LIMIT_LONG_SHIFT);
-		rtw_write16(padapter, REG_RL, val16);
-#else /* !CONFIG_CONCURRENT_MODE */
-		if (type == 0) { /* prepare to join */
-			/* enable to rx data frame.Accept all data frame */
-			rtw_write16(padapter, REG_RXFLTMAP2, 0xFFFF);
-
-			if (check_fwstate(pmlmepriv, WIFI_STATION_STATE) == _TRUE)
-				RetryLimit = (pHalData->CustomerID == RT_CID_CCX) ? RL_VAL_AP : RL_VAL_STA;
-			else /* Ad-hoc Mode */
-				RetryLimit = RL_VAL_AP;
-		} else if (type == 1) /* joinbss_event call back when join res < 0 */
-			rtw_write16(padapter, REG_RXFLTMAP2, 0x00);
-		else if (type == 2) { /* sta add event call back */
-			/* enable update TSF */
-			val8 = rtw_read8(padapter, REG_BCN_CTRL);
-			val8 &= ~DIS_TSF_UDT;
-			rtw_write8(padapter, REG_BCN_CTRL, val8);
-
-			if (check_fwstate(pmlmepriv, WIFI_ADHOC_STATE | WIFI_ADHOC_MASTER_STATE))
-				RetryLimit = RL_VAL_AP;
-		}
-
-	val16 = (RetryLimit << RETRY_LIMIT_SHORT_SHIFT) | (RetryLimit << RETRY_LIMIT_LONG_SHIFT);
-	rtw_write16(padapter, REG_RL, val16);
-#endif /* !CONFIG_CONCURRENT_MODE */
-}
-
 void CCX_FwC2HTxRpt_8723d(PADAPTER padapter, u8 *pdata, u8 len)
 {
 	u8 seq_no;
@@ -4909,56 +4700,6 @@ u8 SetHwReg8723D(PADAPTER padapter, u8 variable, u8 *val)
 		rtw_write8(padapter, REG_TXPAUSE, *val);
 		break;
 
-	case HW_VAR_BCN_FUNC:
-		hw_var_set_bcn_func(padapter, variable, val);
-		break;
-
-	case HW_VAR_MLME_DISCONNECT:
-		hw_var_set_mlme_disconnect(padapter, variable, val);
-		break;
-
-	case HW_VAR_MLME_JOIN:
-		hw_var_set_mlme_join(padapter, variable, val);
-
-#ifdef CONFIG_BT_COEXIST
-		switch (*val) {
-		case 0:
-			/* Notify coex. mechanism before join */
-			rtw_btcoex_ConnectNotify(padapter, _TRUE);
-			break;
-		case 1:
-		case 2:
-			/* Notify coex. mechanism after join, whether successful or failed */
-			rtw_btcoex_ConnectNotify(padapter, _FALSE);
-			break;
-		}
-#endif /* CONFIG_BT_COEXIST */
-		break;
-
-	case HW_VAR_BEACON_INTERVAL:
-		{
-			u16 bcn_interval = *((u16 *)val);
-
-			#ifdef CONFIG_SWTIMER_BASED_TXBCN
-			bcn_interval = rtw_hal_bcn_interval_adjust(padapter, bcn_interval);
-			#endif
-
-			rtw_write16(padapter, REG_BCN_INTERVAL, bcn_interval);
-
-			#ifdef CONFIG_INTERRUPT_BASED_TXBCN_EARLY_INT
-			{
-				struct mlme_ext_priv	*pmlmeext = &padapter->mlmeextpriv;
-				struct mlme_ext_info	*pmlmeinfo = &(pmlmeext->mlmext_info);
-
-				if ((pmlmeinfo->state & 0x03) == WIFI_FW_AP_STATE) {
-					RTW_INFO("%s==> bcn_interval:%d, eraly_int:%d\n", __func__, bcn_interval, bcn_interval >> 1);
-					rtw_write8(padapter, REG_DRVERLYINT, bcn_interval >> 1);
-				}
-			}
-			#endif/* CONFIG_INTERRUPT_BASED_TXBCN_EARLY_INT */
-		}
-		break;
-
 	case HW_VAR_SLOT_TIME:
 		rtw_write8(padapter, REG_SLOT, *val);
 		break;
@@ -5068,7 +4809,7 @@ u8 SetHwReg8723D(PADAPTER padapter, u8 variable, u8 *val)
 		rtw_write8(padapter, REG_ACMHWCTRL, hwctrl);
 	}
 		break;
-
+#ifdef CONFIG_80211N_HT
 	case HW_VAR_AMPDU_FACTOR: {
 		u32	AMPDULen = (*((u8 *)val));
 
@@ -5080,7 +4821,7 @@ u8 SetHwReg8723D(PADAPTER padapter, u8 variable, u8 *val)
 		rtw_write32(padapter, REG_AMPDU_MAX_LENGTH_8723D, AMPDULen);
 	}
 		break;
-
+#endif /* CONFIG_80211N_HT */
 #if 0
 	case HW_VAR_RXDMA_AGG_PG_TH:
 		rtw_write8(padapter, REG_RXDMA_AGG_PG_TH, *val);
@@ -5109,6 +4850,17 @@ u8 SetHwReg8723D(PADAPTER padapter, u8 variable, u8 *val)
 #endif
 		break;
 
+	case HW_VAR_DL_RSVD_PAGE:
+#ifdef CONFIG_BT_COEXIST
+		if (check_fwstate(&padapter->mlmepriv, WIFI_AP_STATE) == _TRUE)
+			rtl8723d_download_BTCoex_AP_mode_rsvd_page(padapter);
+		else
+#endif /* CONFIG_BT_COEXIST */
+		{
+			rtl8723d_download_rsvd_page(padapter, RT_MEDIA_CONNECT);
+		}
+		break;
+
 #ifdef CONFIG_P2P
 	case HW_VAR_H2C_FW_P2P_PS_OFFLOAD:
 		rtl8723d_set_p2p_ps_offload_cmd(padapter, *val);
@@ -5199,8 +4951,8 @@ u8 SetHwReg8723D(PADAPTER padapter, u8 variable, u8 *val)
 		u8 RetryLimit = 0x01;
 		u32 reg_200, reg_204;
 
-		val16 = RetryLimit << RETRY_LIMIT_SHORT_SHIFT | RetryLimit << RETRY_LIMIT_LONG_SHIFT;
-		rtw_write16(padapter, REG_RL, val16);
+		val16 = BIT_SRL(RetryLimit) | BIT_LRL(RetryLimit);
+		rtw_write16(padapter, REG_RETRY_LIMIT, val16);
 
 		for (i = 0; i < 200; i++) { /* polling 200x10=2000 msec */
 			reg_200 = rtw_read32(padapter, 0x200);
@@ -5218,8 +4970,8 @@ u8 SetHwReg8723D(PADAPTER padapter, u8 variable, u8 *val)
 			RTW_INFO("packets in tx buffer - 0x204=%x, 0x200=%x\n", reg_204, reg_200);
 
 		RetryLimit = RL_VAL_STA;
-		val16 = RetryLimit << RETRY_LIMIT_SHORT_SHIFT | RetryLimit << RETRY_LIMIT_LONG_SHIFT;
-		rtw_write16(padapter, REG_RL, val16);
+		val16 = BIT_SRL(RetryLimit) | BIT_LRL(RetryLimit);
+		rtw_write16(padapter, REG_RETRY_LIMIT, val16);
 	}
 		break;
 #endif /* CONFIG_CONCURRENT_MODE */
@@ -5269,23 +5021,6 @@ u8 SetHwReg8723D(PADAPTER padapter, u8 variable, u8 *val)
 			rtw_write8(padapter, REG_DWBCN1_CTRL_8723D + 2, val8);
 		}
 		break;
-	case HW_VAR_DO_IQK:
-		if (*val)
-			pHalData->bNeedIQK = _TRUE;
-		else
-			pHalData->bNeedIQK = _FALSE;
-		break;
-
-	case HW_VAR_DL_RSVD_PAGE:
-#ifdef CONFIG_BT_COEXIST
-		if (check_fwstate(&padapter->mlmepriv, WIFI_AP_STATE) == _TRUE)
-			rtl8723d_download_BTCoex_AP_mode_rsvd_page(padapter);
-		else
-#endif /* CONFIG_BT_COEXIST */
-		{
-			rtl8723d_download_rsvd_page(padapter, RT_MEDIA_CONNECT);
-		}
-		break;
 
 #if defined(CONFIG_TDLS) && defined(CONFIG_TDLS_CH_SW)
 	case HW_VAR_TDLS_BCN_EARLY_C2H_RPT:
@@ -5389,6 +5124,48 @@ static void dump_mac_txfifo_8723d(void *sel, _adapter *adapter)
 			, hpq, lpq, npq, epq, pubq);
 }
 
+void rtl8723d_read_wmmedca_reg(PADAPTER adapter, u16 *vo_params, u16 *vi_params, u16 *be_params, u16 *bk_params)
+{
+	u8 vo_reg_params[4];
+	u8 vi_reg_params[4];
+	u8 be_reg_params[4];
+	u8 bk_reg_params[4];
+
+	GetHwReg8723D(adapter, HW_VAR_AC_PARAM_VO, vo_reg_params);
+	GetHwReg8723D(adapter, HW_VAR_AC_PARAM_VI, vi_reg_params);
+	GetHwReg8723D(adapter, HW_VAR_AC_PARAM_BE, be_reg_params);
+	GetHwReg8723D(adapter, HW_VAR_AC_PARAM_BK, bk_reg_params);
+
+	vo_params[0] = vo_reg_params[0];
+	vo_params[1] = vo_reg_params[1] & 0x0F;
+	vo_params[2] = (vo_reg_params[1] & 0xF0) >> 4;
+	vo_params[3] = ((vo_reg_params[3] << 8) | (vo_reg_params[2])) * 32;
+
+	vi_params[0] = vi_reg_params[0];
+	vi_params[1] = vi_reg_params[1] & 0x0F;
+	vi_params[2] = (vi_reg_params[1] & 0xF0) >> 4;
+	vi_params[3] = ((vi_reg_params[3] << 8) | (vi_reg_params[2])) * 32;
+
+	be_params[0] = be_reg_params[0];
+	be_params[1] = be_reg_params[1] & 0x0F;
+	be_params[2] = (be_reg_params[1] & 0xF0) >> 4;
+	be_params[3] = ((be_reg_params[3] << 8) | (be_reg_params[2])) * 32;
+
+	bk_params[0] = bk_reg_params[0];
+	bk_params[1] = bk_reg_params[1] & 0x0F;
+	bk_params[2] = (bk_reg_params[1] & 0xF0) >> 4;
+	bk_params[3] = ((bk_reg_params[3] << 8) | (bk_reg_params[2])) * 32;
+
+	vo_params[1] = (1 << vo_params[1]) - 1;
+	vo_params[2] = (1 << vo_params[2]) - 1;
+	vi_params[1] = (1 << vi_params[1]) - 1;
+	vi_params[2] = (1 << vi_params[2]) - 1;
+	be_params[1] = (1 << be_params[1]) - 1;
+	be_params[2] = (1 << be_params[2]) - 1;
+	bk_params[1] = (1 << bk_params[1]) - 1;
+	bk_params[2] = (1 << bk_params[2]) - 1;
+}
+
 void GetHwReg8723D(PADAPTER padapter, u8 variable, u8 *val)
 {
 	PHAL_DATA_TYPE pHalData = GET_HAL_DATA(padapter);
@@ -5415,6 +5192,38 @@ void GetHwReg8723D(PADAPTER padapter, u8 variable, u8 *val)
 		}
 		break;
 
+	case HW_VAR_AC_PARAM_VO:
+		val32 = rtw_read32(padapter, REG_EDCA_VO_PARAM);
+		val[0] = val32 & 0xFF;
+		val[1] = (val32 >> 8) & 0xFF;
+		val[2] = (val32 >> 16) & 0xFF;
+		val[3] = (val32 >> 24) & 0x07;
+		break;
+
+	case HW_VAR_AC_PARAM_VI:
+		val32 = rtw_read32(padapter, REG_EDCA_VI_PARAM);
+		val[0] = val32 & 0xFF;
+		val[1] = (val32 >> 8) & 0xFF;
+		val[2] = (val32 >> 16) & 0xFF;
+		val[3] = (val32 >> 24) & 0x07;
+		break;
+
+	case HW_VAR_AC_PARAM_BE:
+		val32 = rtw_read32(padapter, REG_EDCA_BE_PARAM);
+		val[0] = val32 & 0xFF;
+		val[1] = (val32 >> 8) & 0xFF;
+		val[2] = (val32 >> 16) & 0xFF;
+		val[3] = (val32 >> 24) & 0x07;
+		break;
+
+	case HW_VAR_AC_PARAM_BK:
+		val32 = rtw_read32(padapter, REG_EDCA_BK_PARAM);
+		val[0] = val32 & 0xFF;
+		val[1] = (val32 >> 8) & 0xFF;
+		val[2] = (val32 >> 16) & 0xFF;
+		val[3] = (val32 >> 24) & 0x07;
+		break;
+
 	case HW_VAR_EFUSE_USAGE:
 		*val = pHalData->EfuseUsedPercentage;
 		break;
@@ -5513,8 +5322,8 @@ void hal_ra_info_dump(_adapter *padapter , void *sel)
 			rtw_write32(padapter, REG_HMEBOX_DBG_2_8723D, cmd);
 			rtw_msleep_os(10);
 			ra_info1 = rtw_read32(padapter, 0x2F0);
-			curr_tx_rate = ra_info1 & 0x7F;
-			curr_tx_sgi = (ra_info1 >> 7) & 0x01;
+			curr_tx_sgi = rtw_get_current_tx_sgi(padapter, macid_ctl->sta[mac_id]);
+			curr_tx_rate = rtw_get_current_tx_rate(padapter, macid_ctl->sta[mac_id]);
 
 			_RTW_PRINT_SEL(sel , "[ ra_info1:0x%08x ] =>cur_tx_rate= %s,cur_sgi:%d\n", ra_info1, HDATA_RATE(curr_tx_rate), curr_tx_sgi);
 			_RTW_PRINT_SEL(sel , "[ ra_info1:0x%08x ] => PWRSTS = 0x%02x\n", ra_info1, (ra_info1 >> 8)  & 0x07);
@@ -5737,6 +5546,7 @@ void rtl8723d_set_hal_ops(struct hal_ops *pHalFunc)
 	pHalFunc->set_chnl_bw_handler = &PHY_SetSwChnlBWMode8723D;
 	pHalFunc->set_tx_power_level_handler = &PHY_SetTxPowerLevel8723D;
 	pHalFunc->get_tx_power_level_handler = &PHY_GetTxPowerLevel8723D;
+	pHalFunc->set_tx_power_index_handler = PHY_SetTxPowerIndex_8723D;
 	pHalFunc->get_tx_power_index_handler = &PHY_GetTxPowerIndex_8723D;
 	pHalFunc->hal_dm_watchdog = &rtl8723d_HalDmWatchDog;
 
@@ -5747,6 +5557,7 @@ void rtl8723d_set_hal_ops(struct hal_ops *pHalFunc)
 	pHalFunc->write_bbreg = &PHY_SetBBReg_8723D;
 	pHalFunc->read_rfreg = &PHY_QueryRFReg_8723D;
 	pHalFunc->write_rfreg = &PHY_SetRFReg_8723D;
+	pHalFunc->read_wmmedca_reg = &rtl8723d_read_wmmedca_reg;
 
 	/* Efuse related function */
 	pHalFunc->BTEfusePowerSwitch = &Hal_BT_EfusePowerSwitch;
diff --git a/rtl8723DS/hal/rtl8723d/rtl8723d_lps_poff.c b/rtl8723DS/hal/rtl8723d/rtl8723d_lps_poff.c
index ee574c8..75efd1a 100755..100644
--- a/rtl8723DS/hal/rtl8723d/rtl8723d_lps_poff.c
+++ b/rtl8723DS/hal/rtl8723d/rtl8723d_lps_poff.c
@@ -204,7 +204,7 @@ static void rtl8723d_lps_poff_set_tx_bndy(PADAPTER padapter, u8 tx_bndy)
 	u32	val32 = 0;
 	u8	val8  = 0;
 
-#if (DEV_BUS_TYPE == RT_PCI_INTERFACE)
+#ifdef CONFIG_PCI_HCI
 	numHQ = 0x8;
 	numLQ = 0x8;
 #endif
diff --git a/rtl8723DS/hal/rtl8723d/rtl8723d_phycfg.c b/rtl8723DS/hal/rtl8723d/rtl8723d_phycfg.c
index 0bdb826..14a6f24 100755..100644
--- a/rtl8723DS/hal/rtl8723d/rtl8723d_phycfg.c
+++ b/rtl8723DS/hal/rtl8723d/rtl8723d_phycfg.c
@@ -595,7 +595,7 @@ PHY_BBConfig8723D(
 {
 	int	rtStatus = _SUCCESS;
 	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(Adapter);
-	u32	RegVal;
+	u16	RegVal;
 	u8	TmpU1B = 0;
 	u8	value8;
 
@@ -603,17 +603,16 @@ PHY_BBConfig8723D(
 
 	/* Enable BB and RF */
 	RegVal = rtw_read16(Adapter, REG_SYS_FUNC_EN);
-	rtw_write16(Adapter, REG_SYS_FUNC_EN, (u16)(RegVal | BIT(13) | BIT(0) | BIT(1)));
+	RegVal |= FEN_EN_25_1 | FEN_BB_GLB_RSTn | FEN_BBRSTB;
+	rtw_write16(Adapter, REG_SYS_FUNC_EN, RegVal);
 
 	rtw_write8(Adapter, REG_RF_CTRL, RF_EN | RF_RSTB | RF_SDMRSTB);
 
-#if (DEV_BUS_TYPE == RT_USB_INTERFACE)
-	rtw_write8(Adapter, REG_SYS_FUNC_EN, FEN_USBA | FEN_USBD | FEN_BB_GLB_RSTn | FEN_BBRSTB);
-#else
+#if defined(CONFIG_PCI_HCI)
 	rtw_write8(Adapter, REG_SYS_FUNC_EN, FEN_PPLL | FEN_PCIEA | FEN_DIO_PCIE | FEN_BB_GLB_RSTn | FEN_BBRSTB);
 #endif
 
-#if DEV_BUS_TYPE == RT_USB_INTERFACE
+#ifdef CONFIG_USB_HCI
 	/* To Fix MAC loopback mode fail. Suggested by SD4 Johnny. 2010.03.23. */
 	PlatformEFIOWrite1Byte(Adapter, REG_LDOHCI12_CTRL, 0x0f);
 	PlatformEFIOWrite1Byte(Adapter, 0x15, 0xe9);
@@ -808,6 +807,7 @@ PHY_GetTxPowerIndex_8723D(
 )
 {
 	PHAL_DATA_TYPE pHalData = GET_HAL_DATA(pAdapter);
+	struct hal_spec_t *hal_spec = GET_HAL_SPEC(pAdapter);
 	s16 power_idx;
 	u8 base_idx = 0;
 	s8 by_rate_diff = 0, limit = 0, tpt_offset = 0, extra_bias = 0;
@@ -834,8 +834,8 @@ PHY_GetTxPowerIndex_8723D(
 
 	if (power_idx < 0)
 		power_idx = 0;
-	else if (power_idx > MAX_POWER_INDEX)
-		power_idx = MAX_POWER_INDEX;
+	else if (power_idx > hal_spec->txgi_max)
+		power_idx = hal_spec->txgi_max;
 
 	return power_idx;
 }
@@ -899,7 +899,7 @@ phy_SpurCalibration_8723D(
 	/* add for notch */
 	u4Byte				wlan_channel, CurrentChannel;
 	HAL_DATA_TYPE		*pHalData	= GET_HAL_DATA(pAdapter);
-	struct PHY_DM_STRUCT		*pDM_Odm = &(pHalData->odmpriv);
+	struct dm_struct		*pDM_Odm = &(pHalData->odmpriv);
 
 	/* check threshold */
 	if (threshold <= 0x0)
@@ -1167,6 +1167,16 @@ phy_SwChnlAndSetBwMode8723D(
 		pHalData->bSetChnlBW = _FALSE;
 	}
 
+	if (pHalData->bNeedIQK == _TRUE) {
+		if (pHalData->neediqk_24g == _TRUE) {
+
+			halrf_iqk_trigger(&pHalData->odmpriv, _FALSE);
+			pHalData->bIQKInitialized = _TRUE;
+			pHalData->neediqk_24g = _FALSE;
+		}
+		pHalData->bNeedIQK = _FALSE;
+	}
+
 	PHY_SetTxPowerLevel8723D(Adapter, pHalData->current_channel);
 }
 
diff --git a/rtl8723DS/hal/rtl8723d/rtl8723d_rf6052.c b/rtl8723DS/hal/rtl8723d/rtl8723d_rf6052.c
index 9d5f46a..09a8cb1 100755..100644
--- a/rtl8723DS/hal/rtl8723d/rtl8723d_rf6052.c
+++ b/rtl8723DS/hal/rtl8723d/rtl8723d_rf6052.c
@@ -45,9 +45,11 @@
 
 
 /*------------------------Define local variable------------------------------*/
+#ifdef CONFIG_RF_SHADOW_RW
 /* 2008/11/20 MH For Debug only, RF
  * static	RF_SHADOW_T	RF_Shadow[RF6052_MAX_PATH][RF6052_MAX_REG] = {0}; */
 static	RF_SHADOW_T	RF_Shadow[RF6052_MAX_PATH][RF6052_MAX_REG];
+#endif /*CONFIG_RF_SHADOW_RW*/
 /*------------------------Define local variable------------------------------*/
 
 /*-----------------------------------------------------------------------------
diff --git a/rtl8723DS/hal/rtl8723d/rtl8723d_rxdesc.c b/rtl8723DS/hal/rtl8723d/rtl8723d_rxdesc.c
index 10eb324..7dc37b8 100755..100644
--- a/rtl8723DS/hal/rtl8723d/rtl8723d_rxdesc.c
+++ b/rtl8723DS/hal/rtl8723d/rtl8723d_rxdesc.c
@@ -50,7 +50,7 @@ void rtl8723d_query_rx_desc_status(union recv_frame *precvframe, u8 *pdesc)
 
 		/* Offset 12 */
 		pattrib->data_rate = (u8)GET_RX_STATUS_DESC_RX_RATE_8723D(pdesc);
-
+		pattrib->bw = CHANNEL_WIDTH_MAX;
 		/* Offset 20 */
 		/* pattrib->tsfl=(u8)GET_RX_STATUS_DESC_TSFL_8723D(pdesc); */
 	}
diff --git a/rtl8723DS/hal/rtl8723d/rtl8723d_sreset.c b/rtl8723DS/hal/rtl8723d/rtl8723d_sreset.c
index db38541..db38541 100755..100644
--- a/rtl8723DS/hal/rtl8723d/rtl8723d_sreset.c
+++ b/rtl8723DS/hal/rtl8723d/rtl8723d_sreset.c
diff --git a/rtl8723DS/hal/rtl8723d/sdio/rtl8723ds_led.c b/rtl8723DS/hal/rtl8723d/sdio/rtl8723ds_led.c
index 6a7fbc7..0df289c 100755..100644
--- a/rtl8723DS/hal/rtl8723d/sdio/rtl8723ds_led.c
+++ b/rtl8723DS/hal/rtl8723d/sdio/rtl8723ds_led.c
@@ -90,7 +90,7 @@ rtl8723ds_InitSwLeds(
 )
 {
 #if 0
-	struct led_priv *pledpriv = &(padapter->ledpriv);
+	struct led_priv *pledpriv = adapter_to_led(padapter);
 
 	pledpriv->LedControlHandler = LedControlSDIO;
 
@@ -114,7 +114,7 @@ rtl8723ds_DeInitSwLeds(
 )
 {
 #if 0
-	struct led_priv	*ledpriv = &(padapter->ledpriv);
+	struct led_priv	*ledpriv = adapter_to_led(padapter);
 
 	DeInitLed871x(&(ledpriv->SwLed0));
 	DeInitLed871x(&(ledpriv->SwLed1));
diff --git a/rtl8723DS/hal/rtl8723d/sdio/rtl8723ds_recv.c b/rtl8723DS/hal/rtl8723d/sdio/rtl8723ds_recv.c
index 1bed99e..ceb395e 100755..100644
--- a/rtl8723DS/hal/rtl8723d/sdio/rtl8723ds_recv.c
+++ b/rtl8723DS/hal/rtl8723d/sdio/rtl8723ds_recv.c
@@ -164,7 +164,9 @@ s32 rtl8723ds_recv_hdl(_adapter *padapter)
 		d = adapter_to_dvobj(padapter);
 		for (i = 0; i < d->iface_nums; i++) {
 			a = d->padapters[i];
-			if (rtw_if_up(a) == _TRUE)
+			precvpriv = &a->recvpriv;
+			if (rtw_if_up(a) == _TRUE
+				&& skb_queue_len(&precvpriv->rx_napi_skb_queue))
 				napi_schedule(&a->napi);
 	
 		}
diff --git a/rtl8723DS/hal/rtl8723d/sdio/rtl8723ds_xmit.c b/rtl8723DS/hal/rtl8723d/sdio/rtl8723ds_xmit.c
index fe31d6f..ec05648 100755..100644
--- a/rtl8723DS/hal/rtl8723d/sdio/rtl8723ds_xmit.c
+++ b/rtl8723DS/hal/rtl8723d/sdio/rtl8723ds_xmit.c
@@ -128,7 +128,10 @@ query_free_page:
 		goto free_xmitbuf;
 
 #ifdef CONFIG_CHECK_LEAVE_LPS
-	traffic_check_for_leave_lps(padapter, _TRUE, pxmitbuf->agg_num);
+	#ifdef CONFIG_LPS_CHK_BY_TP
+	if (!adapter_to_pwrctl(padapter)->lps_chk_by_tp)
+	#endif
+		traffic_check_for_leave_lps(padapter, _TRUE, pxmitbuf->agg_num);
 #endif
 
 	rtw_write_port(padapter, deviceId, pxmitbuf->len, (u8 *)pxmitbuf);
diff --git a/rtl8723DS/hal/rtl8723d/sdio/sdio_halinit.c b/rtl8723DS/hal/rtl8723d/sdio/sdio_halinit.c
index ccef361..43072df 100755..100644
--- a/rtl8723DS/hal/rtl8723d/sdio/sdio_halinit.c
+++ b/rtl8723DS/hal/rtl8723d/sdio/sdio_halinit.c
@@ -214,7 +214,7 @@ static void _InitQueueReservedPage(PADAPTER padapter)
 	value32 = _HPQ(numHQ) | _LPQ(numLQ) | _PUBQ(numPubQ) | LD_RQPN;
 	rtw_write32(padapter, REG_RQPN, value32);
 
-	rtw_hal_set_sdio_tx_max_length(padapter, numHQ, numNQ, numLQ, numPubQ);
+	rtw_hal_set_sdio_tx_max_length(padapter, numHQ, numNQ, numLQ, numPubQ, SDIO_TX_DIV_NUM);
 
 #ifdef CONFIG_SDIO_TX_ENABLE_AVAL_INT
 	_init_available_page_threshold(padapter, numHQ, numNQ, numLQ, numPubQ);
@@ -511,8 +511,8 @@ void _InitAdaptiveCtrl(PADAPTER padapter)
 	rtw_write16(padapter, REG_SPEC_SIFS, value16);
 
 	/* Retry Limit */
-	value16 = _LRL(RL_VAL_STA) | _SRL(RL_VAL_STA);
-	rtw_write16(padapter, REG_RL, value16);
+	value16 = BIT_LRL(RL_VAL_STA) | BIT_SRL(RL_VAL_STA);
+	rtw_write16(padapter, REG_RETRY_LIMIT, value16);
 }
 
 void _InitEDCA(PADAPTER padapter)
@@ -777,21 +777,29 @@ static BOOLEAN HalDetectPwrDownMode(PADAPTER Adapter)
 	return pHalData->pwrdown;
 }	/* HalDetectPwrDownMode */
 
-static void rtl8723ds_init_burst_pkt_len(PADAPTER padapter)
+static void	rtl8723ds_init_burst_pkt_len(PADAPTER padapter)
 {
-	HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter);
-	u8 val8 = 0;
+	HAL_DATA_TYPE		*pHalData = GET_HAL_DATA(padapter);
 
 	rtw_write8(padapter, 0x4c7, rtw_read8(padapter, 0x4c7) | BIT(7)); /* enable single pkt ampdu */
 	rtw_write8(padapter, REG_RX_PKT_LIMIT_8723D, 0x18);		/* for VHT packet length 11K */
-	rtw_write8(padapter, REG_MAX_AGGR_NUM_8723D, 0x14);
+	rtw_write8(padapter, REG_MAX_AGGR_NUM_8723D, 0x1F);
 	rtw_write8(padapter, REG_PIFS_8723D, 0x00);
 	rtw_write8(padapter, REG_FWHW_TXQ_CTRL_8723D, rtw_read8(padapter, REG_FWHW_TXQ_CTRL) & (~BIT(7)));
-
-	val8 = rtw_read8(padapter, REG_AMPDU_BURST_MODE_8723D);
-	val8 |= BIT(6);
-	rtw_write8(padapter, REG_AMPDU_BURST_MODE_8723D,  val8);
+	if (pHalData->AMPDUBurstMode)
+		rtw_write8(padapter, REG_AMPDU_BURST_MODE_8723D,  0x5F);
 	rtw_write8(padapter, REG_AMPDU_MAX_TIME_8723D, 0x70);
+
+	/* ARFB table 9 for 11ac 5G 2SS */
+	rtw_write32(padapter, REG_ARFR0_8723D, 0x00000010);
+	if (IS_NORMAL_CHIP(pHalData->version_id))
+		rtw_write32(padapter, REG_ARFR0_8723D + 4, 0xfffff000);
+	else
+		rtw_write32(padapter, REG_ARFR0_8723D + 4, 0x3e0ff000);
+
+	/* ARFB table 10 for 11ac 5G 1SS */
+	rtw_write32(padapter, REG_ARFR1_8723D, 0x00000010);
+	rtw_write32(padapter, REG_ARFR1_8723D + 4, 0x003ff000);
 }
 
 static void rtl8723ds_init_lte_coex(PADAPTER padapter)
@@ -928,23 +936,23 @@ static u32 rtl8723ds_hal_init(PADAPTER padapter)
 		RTW_INFO("FW exist before power on!!\n");
 	else
 		RTW_INFO("FW does not exist before power on!!\n");
-
+#ifdef DBG_CHECK_FW_PS_STATE
 	if (rtw_fw_ps_state(padapter) == _FAIL) {
 		RTW_INFO("check fw_ps_state fail before PowerOn!\n");
 		pdbgpriv->dbg_ips_drvopen_fail_cnt++;
 	}
-
+#endif
 	ret = rtw_hal_power_on(padapter);
 	if (_FAIL == ret) {
 		return _FAIL;
 	}
 	RTW_INFO("Power on ok!\n");
-
+#ifdef DBG_CHECK_FW_PS_STATE
 	if (rtw_fw_ps_state(padapter) == _FAIL) {
 		RTW_INFO("check fw_ps_state fail after PowerOn!\n");
 		pdbgpriv->dbg_ips_drvopen_fail_cnt++;
 	}
-
+#endif
 
 	rtw_write8(padapter, REG_EARLY_MODE_CONTROL, 0);
 
@@ -1166,6 +1174,8 @@ static u32 rtl8723ds_hal_init(PADAPTER padapter)
 
 			pwrpriv = adapter_to_pwrctl(padapter);
 
+			halrf_lck_trigger(&pHalData->odmpriv);
+
 			/* Inform WiFi FW that it is the beginning of IQK */
 			h2cCmdBuf = 1;
 			FillH2CCmd8723D(padapter, H2C_8723D_BT_WLAN_CALIBRATION, 1, &h2cCmdBuf);
@@ -1181,9 +1191,8 @@ static u32 rtl8723ds_hal_init(PADAPTER padapter)
 #ifdef CONFIG_BT_COEXIST
 			rtw_btcoex_IQKNotify(padapter, _TRUE);
 #endif
-			/*phy_iq_calibrate_8723d(padapter, _FALSE);*/
-			halrf_iqk_trigger(&pHalData->odmpriv, _FALSE);
-			pHalData->bIQKInitialized = _TRUE;
+
+			pHalData->neediqk_24g= _TRUE;
 #ifdef CONFIG_BT_COEXIST
 			rtw_btcoex_IQKNotify(padapter, _FALSE);
 #endif
diff --git a/rtl8723DS/hal/rtl8723d/sdio/sdio_ops.c b/rtl8723DS/hal/rtl8723d/sdio/sdio_ops.c
index 8951759..213c937 100755..100644
--- a/rtl8723DS/hal/rtl8723d/sdio/sdio_ops.c
+++ b/rtl8723DS/hal/rtl8723d/sdio/sdio_ops.c
@@ -492,7 +492,6 @@ static u32 sdio_read_port(
 	u8 *mem)
 {
 	PADAPTER padapter;
-	PSDIO_DATA psdio;
 	PHAL_DATA_TYPE phal;
 	u32 oldcnt;
 #ifdef SDIO_DYNAMIC_ALLOC_MEM
@@ -502,15 +501,12 @@ static u32 sdio_read_port(
 
 
 	padapter = pintfhdl->padapter;
-	psdio = &adapter_to_dvobj(padapter)->intf_data;
 	phal = GET_HAL_DATA(padapter);
 
 	HalSdioGetCmdAddr8723DSdio(padapter, addr, phal->SdioRxFIFOCnt++, &addr);
 
 	oldcnt = cnt;
-	if (cnt > psdio->block_transfer_len)
-		cnt = _RND(cnt, psdio->block_transfer_len);
-	/*	cnt = sdio_align_size(cnt); */
+	cnt = rtw_sdio_cmd53_align_size(adapter_to_dvobj(padapter), cnt);
 
 	if (oldcnt != cnt) {
 #ifdef SDIO_DYNAMIC_ALLOC_MEM
@@ -565,12 +561,10 @@ static u32 sdio_write_port(
 	u8 *mem)
 {
 	PADAPTER padapter;
-	PSDIO_DATA psdio;
 	s32 err;
 	struct xmit_buf *xmitbuf = (struct xmit_buf *)mem;
 
 	padapter = pintfhdl->padapter;
-	psdio = &adapter_to_dvobj(padapter)->intf_data;
 
 #ifndef CONFIG_DLFW_TXPKT
 	if (!rtw_is_hw_init_completed(padapter)) {
@@ -583,9 +577,7 @@ static u32 sdio_write_port(
 	cnt = _RND4(cnt);
 	HalSdioGetCmdAddr8723DSdio(padapter, addr, cnt >> 2, &addr);
 
-	if (cnt > psdio->block_transfer_len)
-		cnt = _RND(cnt, psdio->block_transfer_len);
-	/*	cnt = sdio_align_size(cnt); */
+	cnt = rtw_sdio_cmd53_align_size(adapter_to_dvobj(padapter), cnt);
 
 	err = sd_write(pintfhdl, addr, cnt, xmitbuf->pdata);
 
@@ -1272,7 +1264,7 @@ static void sd_recv_loopback(PADAPTER padapter, u32 size)
 
 	readsize = size;
 	RTW_INFO("%s: read size=%d\n", __func__, readsize);
-	allocsize = _RND(readsize, adapter_to_dvobj(padapter)->intf_data.block_transfer_len);
+	allocsize = _RND(readsize, rtw_sdio_get_block_size(adapter_to_dvobj(padapter)));
 
 	ploopback = padapter->ploopback;
 	if (ploopback) {
@@ -1380,14 +1372,13 @@ exit:
 #else /* !CONFIG_SDIO_RX_COPY */
 static struct recv_buf *sd_recv_rxfifo(PADAPTER padapter, u32 size)
 {
-	u32 sdioblksize, readsize, allocsize, ret;
+	u32 readsize, allocsize, ret;
 	u8 *preadbuf;
 	_pkt *ppkt;
 	struct recv_priv *precvpriv;
 	struct recv_buf	*precvbuf;
 
 
-	sdioblksize = adapter_to_dvobj(padapter)->intf_data.block_transfer_len;
 #if 0
 	readsize = size;
 #else
@@ -1398,10 +1389,7 @@ static struct recv_buf *sd_recv_rxfifo(PADAPTER padapter, u32 size)
 
 	/* 3 1. alloc skb */
 	/* align to block size */
-	if (readsize > sdioblksize)
-		allocsize = _RND(readsize, sdioblksize);
-	else
-		allocsize = readsize;
+	allocsize = rtw_sdio_cmd53_align_size(adapter_to_dvobj(padapter), readsize);
 
 	ppkt = rtw_skb_alloc(allocsize);
 
@@ -1463,6 +1451,10 @@ static void sd_rxhandler(PADAPTER padapter, struct recv_buf *precvbuf)
 #endif /* CONFIG_RECV_THREAD_MODE */
 }
 
+#ifndef CMD52_ACCESS_HISR_RX_REQ_LEN
+#define CMD52_ACCESS_HISR_RX_REQ_LEN 0
+#endif
+
 #ifndef SD_INT_HDL_DIS_HIMR_RX_REQ
 #define SD_INT_HDL_DIS_HIMR_RX_REQ 1
 #endif
@@ -1520,6 +1512,77 @@ _exit:
 	return ret;
 }
 
+void sd_recv(PADAPTER padapter)
+{
+	PHAL_DATA_TYPE phal = GET_HAL_DATA(padapter);
+	struct recv_buf *precvbuf;
+	int alloc_fail_time = 0;
+	u32 rx_cnt = 0;
+
+	do {
+		if (phal->SdioRxFIFOSize == 0) {
+			#if CMD52_ACCESS_HISR_RX_REQ_LEN
+			u16 rx_req_len;
+
+			rx_req_len = SdioLocalCmd52Read2Byte(padapter, SDIO_REG_RX0_REQ_LEN);
+			if (rx_req_len) {
+				if (rx_req_len % 256 == 0)
+					rx_req_len += SdioLocalCmd52Read1Byte(padapter, SDIO_REG_RX0_REQ_LEN);
+				phal->SdioRxFIFOSize = rx_req_len;
+			}
+			#else
+			u8 data[4];
+
+			_sdio_local_read(padapter, SDIO_REG_RX0_REQ_LEN, 4, data);
+			phal->SdioRxFIFOSize = le16_to_cpu(*(u16 *)data);
+			#endif
+		}
+
+		if (phal->SdioRxFIFOSize != 0) {
+			u32 ret;
+
+			#ifdef CONFIG_MAC_LOOPBACK_DRIVER
+			sd_recv_loopback(padapter, phal->SdioRxFIFOSize);
+			#else
+			ret = sd_recv_rxfifo(padapter, phal->SdioRxFIFOSize, &precvbuf);
+			if (precvbuf) {
+				sd_rxhandler(padapter, precvbuf);
+				phal->SdioRxFIFOSize = 0;
+				rx_cnt++;
+			} else {
+				alloc_fail_time++;
+#ifdef CONFIG_RECV_THREAD_MODE
+					if (alloc_fail_time >= 10) {
+						if (_FAIL == sdio_recv_and_drop(padapter, phal->SdioRxFIFOSize))
+							break;
+		
+						alloc_fail_time = 0;
+						phal->SdioRxFIFOSize = 0;
+						rx_cnt = 0;
+						RTW_INFO("%s RECV_THREAD_MODE drop pkt due to alloc_fail_time >= 10 \n",__func__);
+					} else {
+						rtw_msleep_os(1);
+						continue;
+					}
+#else /* !CONFIG_RECV_THREAD_MODE */
+				if (ret == RTW_RBUF_UNAVAIL || ret == RTW_RBUF_PKT_UNAVAIL)
+					rtw_msleep_os(10);
+				else {
+					RTW_INFO("%s: recv fail!(time=%d)\n", __func__, alloc_fail_time);
+					phal->SdioRxFIFOSize = 0;
+				}
+				if (alloc_fail_time >= 10 && rx_cnt != 0)
+					break;
+#endif /* !CONFIG_RECV_THREAD_MODE */
+			}
+			#endif
+		} else
+			break;
+	} while (1);
+
+	if (alloc_fail_time >= 10)
+		RTW_INFO("%s: exit because recv failed more than 10 times!, rx_cnt:%u\n", __func__, rx_cnt);
+}
 void sd_int_dpc(PADAPTER padapter)
 {
 	PHAL_DATA_TYPE phal;
@@ -1599,100 +1662,72 @@ void sd_int_dpc(PADAPTER padapter)
 		RTW_INFO("%s: Rx Error\n", __func__);
 
 	if (phal->sdio_hisr & SDIO_HISR_RX_REQUEST) {
-		struct recv_buf *precvbuf;
-		int alloc_fail_time = 0;
-		u32 hisr = 0, rx_cnt = 0, ret = 0;
-
 		phal->sdio_hisr ^= SDIO_HISR_RX_REQUEST;
-		do {
-
-			if(phal->SdioRxFIFOSize == 0) {
-				u8 data[4];
-				_sdio_local_read(padapter, SDIO_REG_RX0_REQ_LEN, 4, data);
-				phal->SdioRxFIFOSize = le16_to_cpu(*(u16 *)data);
-			} 			
-			if (phal->SdioRxFIFOSize != 0) {
-#ifdef CONFIG_MAC_LOOPBACK_DRIVER
-				sd_recv_loopback(padapter, phal->SdioRxFIFOSize);
-#else
-				ret = sd_recv_rxfifo(padapter, phal->SdioRxFIFOSize, &precvbuf);
-				if (precvbuf) {
-					sd_rxhandler(padapter, precvbuf);
-					phal->SdioRxFIFOSize = 0;
-					rx_cnt++;
-				} else {
-					alloc_fail_time++;
-#ifdef CONFIG_RECV_THREAD_MODE
-					if (alloc_fail_time >= 10) {
-						if (_FAIL == sdio_recv_and_drop(padapter, phal->SdioRxFIFOSize))
-							break;
-		
-						alloc_fail_time = 0;
-						phal->SdioRxFIFOSize = 0;
-						rx_cnt = 0;
-						RTW_INFO("%s RECV_THREAD_MODE drop pkt due to alloc_fail_time >= 10 \n",__func__);
-					} else {
-						rtw_msleep_os(1);
-						continue;
-					}
-#else /* !CONFIG_RECV_THREAD_MODE */
-					if (ret == RTW_RBUF_UNAVAIL || ret == RTW_RBUF_PKT_UNAVAIL)
-						rtw_msleep_os(10);
-					else {
-						RTW_INFO("%s: recv fail!(time=%d)\n", __func__, alloc_fail_time);
-						phal->SdioRxFIFOSize = 0;
-					}
-					if (alloc_fail_time >= 10 && rx_cnt != 0)
-						break;
-#endif /* !CONFIG_RECV_THREAD_MODE */
-				}
-#endif
-			} else
-				break;
-
-		} while (1);
-
-		if (alloc_fail_time == 10)
-			RTW_INFO("%s: exit because recv failed more than 10 times!\n", __func__);
+		sd_recv(padapter);
 	}
 }
-
+#ifndef DBG_SD_INT_HISR_HIMR
+#define DBG_SD_INT_HISR_HIMR 0
+#endif
 void sd_int_hdl(PADAPTER padapter)
 {
 	PHAL_DATA_TYPE phal;
+	#if !CMD52_ACCESS_HISR_RX_REQ_LEN
 	u8 data[6];
-
+	#endif
 
 	if (RTW_CANNOT_RUN(padapter))
 		return;
 
 	phal = GET_HAL_DATA(padapter);
 
-#if SD_INT_HDL_DIS_HIMR_RX_REQ
+	#if SD_INT_HDL_DIS_HIMR_RX_REQ
 	disable_himr_rx_req_8723d_sdio(padapter);
-#endif
+	#endif
 
+	#if CMD52_ACCESS_HISR_RX_REQ_LEN
 	phal->sdio_hisr = 0;
+	ReadInterrupt8723DSdio(padapter, &phal->sdio_hisr);
+	#else
 	_sdio_local_read(padapter, SDIO_REG_HISR, 6, data);
 	phal->sdio_hisr = le32_to_cpu(*(u32 *)data);
 	phal->SdioRxFIFOSize = le16_to_cpu(*(u16 *)&data[4]);
-
+	#endif
+	
 	if (phal->sdio_hisr & phal->sdio_himr) {
 		u32 v32;
+		#if DBG_SD_INT_HISR_HIMR
+		static u32 match_cnt = 0;
 
+		if ((match_cnt++) % 1000 == 0)
+			RTW_INFO("%s: HISR(0x%08x) and HIMR(0x%08x) match!\n"
+				, __func__, phal->sdio_hisr, phal->sdio_himr);
+		#endif
+		
 		phal->sdio_hisr &= phal->sdio_himr;
 
 		/* clear HISR */
 		v32 = phal->sdio_hisr & MASK_SDIO_HISR_CLEAR;
 		if (v32) {
+			#if CMD52_ACCESS_HISR_RX_REQ_LEN
+			SdioLocalCmd52Write4Byte(padapter, SDIO_REG_HISR, v32);
+			#else
 			v32 = cpu_to_le32(v32);
 			_sdio_local_write(padapter, SDIO_REG_HISR, 4, (u8 *)&v32);
+			#endif
 		}
+
 		sd_int_dpc(padapter);
 	}
-#if SD_INT_HDL_DIS_HIMR_RX_REQ
+	#if DBG_SD_INT_HISR_HIMR
+	else
+		RTW_INFO("%s: HISR(0x%08x) and HIMR(0x%08x) not match!\n"
+			, __func__, phal->sdio_hisr, phal->sdio_himr);
+	#endif
+
+	#if SD_INT_HDL_DIS_HIMR_RX_REQ
 	restore_himr_8723d_sdio(padapter);
-#endif
+	#endif	
 }
 
 /*
diff --git a/rtl8723DS/ifcfg-wlan0 b/rtl8723DS/ifcfg-wlan0
index 20dcbec..20dcbec 100755..100644
--- a/rtl8723DS/ifcfg-wlan0
+++ b/rtl8723DS/ifcfg-wlan0
diff --git a/rtl8723DS/include/Hal8188EPhyCfg.h b/rtl8723DS/include/Hal8188EPhyCfg.h
index 98f6f4f..3fc0b11 100755..100644
--- a/rtl8723DS/include/Hal8188EPhyCfg.h
+++ b/rtl8723DS/include/Hal8188EPhyCfg.h
@@ -162,7 +162,7 @@ PHY_SetRFEReg_8188E(
 /*
  * BB/MAC/RF other monitor API
  *   */
-VOID phy_set_rf_path_switch_8188e(IN	PADAPTER	pAdapter, IN	bool		bMain);
+VOID phy_set_rf_path_switch_8188e(IN	struct dm_struct	*phydm, IN	bool		bMain);
 
 extern	VOID
 PHY_SwitchEphyParameter(
diff --git a/rtl8723DS/include/Hal8188EPhyReg.h b/rtl8723DS/include/Hal8188EPhyReg.h
index 2eab831..2eab831 100755..100644
--- a/rtl8723DS/include/Hal8188EPhyReg.h
+++ b/rtl8723DS/include/Hal8188EPhyReg.h
diff --git a/rtl8723DS/include/Hal8188EPwrSeq.h b/rtl8723DS/include/Hal8188EPwrSeq.h
index 46c61ab..46c61ab 100755..100644
--- a/rtl8723DS/include/Hal8188EPwrSeq.h
+++ b/rtl8723DS/include/Hal8188EPwrSeq.h
diff --git a/rtl8723DS/include/Hal8188FPhyCfg.h b/rtl8723DS/include/Hal8188FPhyCfg.h
index cca0b63..1f03a33 100755..100644
--- a/rtl8723DS/include/Hal8188FPhyCfg.h
+++ b/rtl8723DS/include/Hal8188FPhyCfg.h
@@ -123,7 +123,7 @@ PHY_SetSwChnlBWMode8188F(
 );
 
 VOID phy_set_rf_path_switch_8188f(
-	IN	PADAPTER	pAdapter,
+	IN	struct		dm_struct *phydm,
 	IN	bool		bMain
 );
 
diff --git a/rtl8723DS/include/Hal8188FPhyReg.h b/rtl8723DS/include/Hal8188FPhyReg.h
index a831faa..a831faa 100755..100644
--- a/rtl8723DS/include/Hal8188FPhyReg.h
+++ b/rtl8723DS/include/Hal8188FPhyReg.h
diff --git a/rtl8723DS/include/Hal8188FPwrSeq.h b/rtl8723DS/include/Hal8188FPwrSeq.h
index 5cad428..5cad428 100755..100644
--- a/rtl8723DS/include/Hal8188FPwrSeq.h
+++ b/rtl8723DS/include/Hal8188FPwrSeq.h
diff --git a/rtl8723DS/include/Hal8192EPhyCfg.h b/rtl8723DS/include/Hal8192EPhyCfg.h
index b7822d5..d6394c6 100755..100644
--- a/rtl8723DS/include/Hal8192EPhyCfg.h
+++ b/rtl8723DS/include/Hal8192EPhyCfg.h
@@ -140,7 +140,7 @@ phy_SpurCalibration_8192E_NBI(
 
 VOID
 phy_set_rf_path_switch_8192e(
-	IN	PADAPTER	pAdapter,
+	IN	struct dm_struct		*phydm,
 	IN	bool		bMain
 );
 
diff --git a/rtl8723DS/include/Hal8192EPhyReg.h b/rtl8723DS/include/Hal8192EPhyReg.h
index 30b7711..30b7711 100755..100644
--- a/rtl8723DS/include/Hal8192EPhyReg.h
+++ b/rtl8723DS/include/Hal8192EPhyReg.h
diff --git a/rtl8723DS/include/Hal8192EPwrSeq.h b/rtl8723DS/include/Hal8192EPwrSeq.h
index 1f2ba87..1f2ba87 100755..100644
--- a/rtl8723DS/include/Hal8192EPwrSeq.h
+++ b/rtl8723DS/include/Hal8192EPwrSeq.h
diff --git a/rtl8723DS/include/Hal8192FPhyCfg.h b/rtl8723DS/include/Hal8192FPhyCfg.h
new file mode 100644
index 0000000..db396d4
--- a/dev/null
+++ b/rtl8723DS/include/Hal8192FPhyCfg.h
@@ -0,0 +1,131 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2007 - 2017 Realtek Corporation.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ *****************************************************************************/
+#ifndef __INC_HAL8192FPHYCFG_H__
+#define __INC_HAL8192FPHYCFG_H__
+
+/*--------------------------Define Parameters-------------------------------*/
+#define LOOP_LIMIT				5
+#define MAX_STALL_TIME			50		/* us */
+#define AntennaDiversityValue	0x80	/* (Adapter->bSoftwareAntennaDiversity ? 0x00 : 0x80) */
+#define MAX_TXPWR_IDX_NMODE_92S	63
+#define Reset_Cnt_Limit			3
+
+#ifdef CONFIG_PCI_HCI
+	#define MAX_AGGR_NUM	0x0B
+#else
+	#define MAX_AGGR_NUM	0x07
+#endif /* CONFIG_PCI_HCI */
+
+
+/*--------------------------Define Parameters End-------------------------------*/
+
+
+/*------------------------------Define structure----------------------------*/
+
+/*------------------------------Define structure End----------------------------*/
+
+/*--------------------------Exported Function prototype---------------------*/
+u32
+PHY_QueryBBReg_8192F(
+	IN	PADAPTER	Adapter,
+	IN	u32		RegAddr,
+	IN	u32		BitMask
+);
+
+VOID
+PHY_SetBBReg_8192F(
+	IN	PADAPTER	Adapter,
+	IN	u32		RegAddr,
+	IN	u32		BitMask,
+	IN	u32		Data
+);
+
+u32
+PHY_QueryRFReg_8192F(
+	IN	PADAPTER		Adapter,
+	IN	enum rf_path		eRFPath,
+	IN	u32				RegAddr,
+	IN	u32				BitMask
+);
+
+VOID
+PHY_SetRFReg_8192F(
+	IN	PADAPTER		Adapter,
+	IN	enum rf_path		eRFPath,
+	IN	u32				RegAddr,
+	IN	u32				BitMask,
+	IN	u32				Data
+);
+
+/* MAC/BB/RF HAL config */
+int PHY_BBConfig8192F(PADAPTER	Adapter	);
+
+int PHY_RFConfig8192F(PADAPTER	Adapter);
+
+s32 PHY_MACConfig8192F(PADAPTER padapter);
+
+int
+PHY_ConfigRFWithParaFile_8192F(
+	IN	PADAPTER			Adapter,
+	IN	u8				*pFileName,
+	enum rf_path				eRFPath
+);
+
+VOID
+PHY_SetTxPowerIndex_8192F(
+	IN	PADAPTER			Adapter,
+	IN	u32					PowerIndex,
+	IN	enum rf_path			RFPath,
+	IN	u8					Rate
+);
+
+u8
+PHY_GetTxPowerIndex_8192F(
+	IN	PADAPTER			pAdapter,
+	IN	enum rf_path			RFPath,
+	IN	u8					Rate,
+	IN	u8					BandWidth,
+	IN	u8					Channel,
+	struct txpwr_idx_comp *tic
+);
+
+VOID
+PHY_GetTxPowerLevel8192F(			
+	IN	PADAPTER		Adapter,
+	OUT s32				*powerlevel
+);
+
+VOID
+PHY_SetTxPowerLevel8192F(
+	IN	PADAPTER		Adapter,
+	IN	u8			channel
+);
+
+VOID
+PHY_SetSwChnlBWMode8192F(
+	IN	PADAPTER			Adapter,
+	IN	u8					channel,
+	IN	enum channel_width	Bandwidth,
+	IN	u8					Offset40,
+	IN	u8					Offset80
+);
+
+VOID phy_set_rf_path_switch_8192f(
+	IN	PADAPTER	pAdapter,
+	IN	bool		bMain
+);
+/*--------------------------Exported Function prototype End---------------------*/
+
+#endif
diff --git a/rtl8723DS/include/Hal8192FPhyReg.h b/rtl8723DS/include/Hal8192FPhyReg.h
new file mode 100644
index 0000000..b82f7f9
--- a/dev/null
+++ b/rtl8723DS/include/Hal8192FPhyReg.h
@@ -0,0 +1,1134 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2007 - 2017 Realtek Corporation.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ *****************************************************************************/
+#ifndef __INC_HAL8192FPHYREG_H__
+#define __INC_HAL8192FPHYREG_H__
+
+#define		rSYM_WLBT_PAPE_SEL		0x64
+/*
+ * BB-PHY register PMAC 0x100 PHY 0x800 - 0xEFF
+ * 1. PMAC duplicate register due to connection: RF_Mode, TRxRN, NumOf L-STF
+ * 2. 0x800/0x900/0xA00/0xC00/0xD00/0xE00
+ * 3. RF register 0x00-2E
+ * 4. Bit Mask for BB/RF register
+ * 5. Other definition for BB/RF R/W
+ *   */
+
+
+/*
+ * 1. PMAC duplicate register due to connection: RF_Mode, TRxRN, NumOf L-STF
+ * 1. Page1(0x100)
+ *   */
+#define		rPMAC_Reset					0x100
+#define		rPMAC_TxStart					0x104
+#define		rPMAC_TxLegacySIG				0x108
+#define		rPMAC_TxHTSIG1				0x10c
+#define		rPMAC_TxHTSIG2				0x110
+#define		rPMAC_PHYDebug				0x114
+#define		rPMAC_TxPacketNum				0x118
+#define		rPMAC_TxIdle					0x11c
+#define		rPMAC_TxMACHeader0			0x120
+#define		rPMAC_TxMACHeader1			0x124
+#define		rPMAC_TxMACHeader2			0x128
+#define		rPMAC_TxMACHeader3			0x12c
+#define		rPMAC_TxMACHeader4			0x130
+#define		rPMAC_TxMACHeader5			0x134
+#define		rPMAC_TxDataType				0x138
+#define		rPMAC_TxRandomSeed			0x13c
+#define		rPMAC_CCKPLCPPreamble			0x140
+#define		rPMAC_CCKPLCPHeader			0x144
+#define		rPMAC_CCKCRC16				0x148
+#define		rPMAC_OFDMRxCRC32OK			0x170
+#define		rPMAC_OFDMRxCRC32Er			0x174
+#define		rPMAC_OFDMRxParityEr			0x178
+#define		rPMAC_OFDMRxCRC8Er			0x17c
+#define		rPMAC_CCKCRxRC16Er			0x180
+#define		rPMAC_CCKCRxRC32Er			0x184
+#define		rPMAC_CCKCRxRC32OK			0x188
+#define		rPMAC_TxStatus					0x18c
+
+/*
+ * 2. Page2(0x200)
+ *
+ * The following two definition are only used for USB interface. */
+#define		RF_BB_CMD_ADDR				0x02c0	/* RF/BB read/write command address. */
+#define		RF_BB_CMD_DATA				0x02c4	/* RF/BB read/write command data. */
+
+/*
+ * 3. Page8(0x800)
+ *   */
+#define		rFPGA0_RFMOD				0x800	/* RF mode & CCK TxSC // RF BW Setting?? */
+
+#define		rFPGA0_TxInfo				0x804	/* Status report?? */
+#define		rFPGA0_PSDFunction			0x808
+
+#define		rFPGA0_TxGainStage			0x80c	/* Set TX PWR init gain? */
+
+#define		rFPGA0_RFTiming1			0x810	/* Useless now */
+#define		rFPGA0_RFTiming2			0x814
+
+#define		rFPGA0_XA_HSSIParameter1		0x820	/* RF 3 wire register */
+#define		rFPGA0_XA_HSSIParameter2		0x824
+#define		rFPGA0_XB_HSSIParameter1		0x828
+#define		rFPGA0_XB_HSSIParameter2		0x82c
+#define		rTxAGC_B_Rate18_06				0x830
+#define		rTxAGC_B_Rate54_24				0x834
+#define		rTxAGC_B_CCK1_55_Mcs32		0x838
+#define		rTxAGC_B_Mcs03_Mcs00			0x83c
+
+#define		rTxAGC_B_Mcs07_Mcs04			0x848
+#define		rTxAGC_B_Mcs11_Mcs08			0x84c
+
+#define		rFPGA0_XA_LSSIParameter		0x840
+#define		rFPGA0_XB_LSSIParameter		0x844
+
+#define		rFPGA0_RFWakeUpParameter		0x850	/* Useless now */
+#define		rFPGA0_RFSleepUpParameter		0x854
+
+#define		rFPGA0_XAB_SwitchControl		0x858	/* RF Channel switch */
+#define		rFPGA0_XCD_SwitchControl		0x85c
+
+#define		rFPGA0_XA_RFInterfaceOE		0x860	/* RF Channel switch */
+#define		rFPGA0_XB_RFInterfaceOE		0x864
+
+#define		rTxAGC_B_Mcs15_Mcs12			0x868
+#define		rTxAGC_B_CCK11_A_CCK2_11		0x86c
+
+#define		rFPGA0_XAB_RFInterfaceSW		0x870	/* RF Interface Software Control */
+#define		rFPGA0_XCD_RFInterfaceSW		0x874
+
+#define		rFPGA0_XAB_RFParameter		0x878	/* RF Parameter */
+#define		rFPGA0_XCD_RFParameter		0x87c
+
+#define		rFPGA0_AnalogParameter1		0x880	/* Crystal cap setting RF-R/W protection for parameter4?? */
+#define		rFPGA0_AnalogParameter2		0x884
+#define		rFPGA0_AnalogParameter3		0x888	/* Useless now */
+#define		rFPGA0_AnalogParameter4		0x88c
+
+#define		rFPGA0_XA_LSSIReadBack		0x8a0	/* Tranceiver LSSI Readback */
+#define		rFPGA0_XB_LSSIReadBack		0x8a4
+#define		rFPGA0_XC_LSSIReadBack		0x8a8
+#define		rFPGA0_XD_LSSIReadBack		0x8ac
+
+#define		rFPGA0_PSDReport				0x8b4	/* Useless now */
+#define		TransceiverA_HSPI_Readback	0x8b8	/* Transceiver A HSPI Readback */
+#define		TransceiverB_HSPI_Readback	0x8bc	/* Transceiver B HSPI Readback */
+#define		rFPGA0_XAB_RFInterfaceRB		0x8e0	/* Useless now // RF Interface Readback Value */
+#define		rFPGA0_XCD_RFInterfaceRB		0x8e4	/* Useless now */
+
+/*
+ * 4. Page9(0x900)
+ *   */
+#define	rFPGA1_RFMOD				0x900	/* RF mode & OFDM TxSC // RF BW Setting?? */
+#define	rFPGA1_TxBlock				0x904	/* Useless now */
+#define	rFPGA1_DebugSelect			0x908	/* Useless now */
+#define	rFPGA1_TxInfo				0x90c	/* Useless now // Status report?? */
+#define	rDPDT_control				0x92c
+#define	rfe_ctrl_anta_src				0x930
+#define	rS0S1_PathSwitch			0x948
+#define	rBBrx_DFIR					0x954
+
+/*
+ * 5. PageA(0xA00)
+ *
+ * Set Control channel to upper or lower. These settings are required only for 40MHz */
+#define		rCCK0_System				0xa00
+
+#define		rCCK0_AFESetting			0xa04	/* Disable init gain now // Select RX path by RSSI */
+#define		rCCK0_CCA					0xa08	/* Disable init gain now // Init gain */
+
+#define		rCCK0_RxAGC1				0xa0c	/* AGC default value, saturation level // Antenna Diversity, RX AGC, LNA Threshold, RX LNA Threshold useless now. Not the same as 90 series */
+#define		rCCK0_RxAGC2				0xa10	/* AGC & DAGC */
+
+#define		rCCK0_RxHP					0xa14
+
+#define		rCCK0_DSPParameter1		0xa18	/* Timing recovery & Channel estimation threshold */
+#define		rCCK0_DSPParameter2		0xa1c	/* SQ threshold */
+
+#define		rCCK0_TxFilter1				0xa20
+#define		rCCK0_TxFilter2				0xa24
+#define		rCCK0_DebugPort			0xa28	/* debug port and Tx filter3 */
+#define		rCCK0_FalseAlarmReport		0xa2c	/* 0xa2d	useless now 0xa30-a4f channel report */
+#define		rCCK0_TRSSIReport		0xa50
+#define		rCCK0_RxReport			0xa54  /* 0xa57 */
+#define		rCCK0_FACounterLower		0xa5c  /* 0xa5b */
+#define		rCCK0_FACounterUpper		0xa58  /* 0xa5c */
+
+/*
+ * PageB(0xB00)
+ *   */
+#define rPdp_AntA						0xb00
+#define rPdp_AntA_4						0xb04
+#define rPdp_AntA_8						0xb08
+#define rPdp_AntA_C						0xb0c
+#define rPdp_AntA_10					0xb10
+#define rPdp_AntA_14					0xb14
+#define rPdp_AntA_18					0xb18
+#define rPdp_AntA_1C					0xb1c
+#define rPdp_AntA_20					0xb20
+#define rPdp_AntA_24					0xb24
+
+#define rConfig_Pmpd_AntA				0xb28
+#define rConfig_ram64x16				0xb2c
+
+#define rBndA							0xb30
+#define rHssiPar						0xb34
+
+#define rConfig_AntA					0xb68
+#define rConfig_AntB					0xb6c
+
+#define rPdp_AntB						0xb70
+#define rPdp_AntB_4						0xb74
+#define rPdp_AntB_8						0xb78
+#define rPdp_AntB_C						0xb7c
+#define rPdp_AntB_10					0xb80
+#define rPdp_AntB_14					0xb84
+#define rPdp_AntB_18					0xb88
+#define rPdp_AntB_1C					0xb8c
+#define rPdp_AntB_20					0xb90
+#define rPdp_AntB_24					0xb94
+
+#define rConfig_Pmpd_AntB				0xb98
+
+#define rBndB							0xba0
+
+#define rAPK							0xbd8
+#define rPm_Rx0_AntA					0xbdc
+#define rPm_Rx1_AntA					0xbe0
+#define rPm_Rx2_AntA					0xbe4
+#define rPm_Rx3_AntA					0xbe8
+#define rPm_Rx0_AntB					0xbec
+#define rPm_Rx1_AntB					0xbf0
+#define rPm_Rx2_AntB					0xbf4
+#define rPm_Rx3_AntB					0xbf8
+/*
+ * 6. PageC(0xC00)
+ *   */
+#define		rOFDM0_LSTF				0xc00
+
+#define		rOFDM0_TRxPathEnable		0xc04
+#define		rOFDM0_TRMuxPar			0xc08
+#define		rOFDM0_TRSWIsolation		0xc0c
+
+#define		rOFDM0_XARxAFE			0xc10  /* RxIQ DC offset, Rx digital filter, DC notch filter */
+#define		rOFDM0_XARxIQImbalance		0xc14  /* RxIQ imbalance matrix */
+#define		rOFDM0_XBRxAFE		0xc18
+#define		rOFDM0_XBRxIQImbalance	0xc1c
+#define		rOFDM0_XCRxAFE		0xc20
+#define		rOFDM0_XCRxIQImbalance	0xc24
+#define		rOFDM0_XDRxAFE		0xc28
+#define		rOFDM0_XDRxIQImbalance	0xc2c
+
+#define		rOFDM0_RxDetector1			0xc30  /* PD, BW & SBD	// DM tune init gain */
+#define		rOFDM0_RxDetector2			0xc34  /* SBD & Fame Sync. */
+#define		rOFDM0_RxDetector3			0xc38  /* Frame Sync. */
+#define		rOFDM0_RxDetector4			0xc3c  /* PD, SBD, Frame Sync & Short-GI */
+
+#define		rOFDM0_RxDSP				0xc40  /* Rx Sync Path */
+#define		rOFDM0_CFOandDAGC		0xc44  /* CFO & DAGC */
+#define		rOFDM0_CCADropThreshold	0xc48 /* CCA Drop threshold */
+#define		rOFDM0_ECCAThreshold		0xc4c /* energy CCA */
+
+#define		rOFDM0_XAAGCCore1			0xc50	/* DIG */
+#define		rOFDM0_XAAGCCore2			0xc54
+#define		rOFDM0_XBAGCCore1			0xc58
+#define		rOFDM0_XBAGCCore2			0xc5c
+#define		rOFDM0_XCAGCCore1			0xc60
+#define		rOFDM0_XCAGCCore2			0xc64
+#define		rOFDM0_XDAGCCore1			0xc68
+#define		rOFDM0_XDAGCCore2			0xc6c
+
+#define		rOFDM0_AGCParameter1			0xc70
+#define		rOFDM0_AGCParameter2			0xc74
+#define		rOFDM0_AGCRSSITable			0xc78
+#define		rOFDM0_HTSTFAGC				0xc7c
+
+#define		rOFDM0_XATxIQImbalance		0xc80	/* TX PWR TRACK and DIG */
+#define		rOFDM0_XATxAFE				0xc84
+#define		rOFDM0_XBTxIQImbalance		0xc88
+#define		rOFDM0_XBTxAFE				0xc8c
+#define		rOFDM0_XCTxIQImbalance		0xc90
+#define		rOFDM0_XCTxAFE			0xc94
+#define		rOFDM0_XDTxIQImbalance		0xc98
+#define		rOFDM0_XDTxAFE				0xc9c
+
+#define		rOFDM0_RxIQExtAnta			0xca0
+#define		rOFDM0_TxCoeff1				0xca4
+#define		rOFDM0_TxCoeff2				0xca8
+#define		rOFDM0_TxCoeff3				0xcac
+#define		rOFDM0_TxCoeff4				0xcb0
+#define		rOFDM0_TxCoeff5				0xcb4
+#define		rOFDM0_TxCoeff6				0xcb8
+#define		rOFDM0_RxHPParameter			0xce0
+#define		rOFDM0_TxPseudoNoiseWgt		0xce4
+#define		rOFDM0_FrameSync				0xcf0
+#define		rOFDM0_DFSReport				0xcf4
+
+/*
+ * 7. PageD(0xD00)
+ *   */
+#define		rOFDM1_LSTF					0xd00
+#define		rOFDM1_TRxPathEnable			0xd04
+
+#define		rOFDM1_CFO						0xd08	/* No setting now */
+#define		rOFDM1_CSI1					0xd10
+#define		rOFDM1_SBD						0xd14
+#define		rOFDM1_CSI2					0xd18
+#define		rOFDM1_CFOTracking			0xd2c
+#define		rOFDM1_TRxMesaure1			0xd34
+#define		rOFDM1_IntfDet					0xd3c
+#define		rOFDM1_PseudoNoiseStateAB		0xd50
+#define		rOFDM1_PseudoNoiseStateCD		0xd54
+#define		rOFDM1_RxPseudoNoiseWgt		0xd58
+
+#define		rOFDM_PHYCounter1				0xda0  /* cca, parity fail */
+#define		rOFDM_PHYCounter2				0xda4  /* rate illegal, crc8 fail */
+#define		rOFDM_PHYCounter3				0xda8  /* MCS not support */
+
+#define		rOFDM_ShortCFOAB				0xdac	/* No setting now */
+#define		rOFDM_ShortCFOCD				0xdb0
+#define		rOFDM_LongCFOAB				0xdb4
+#define		rOFDM_LongCFOCD				0xdb8
+#define		rOFDM_TailCFOAB				0xdbc
+#define		rOFDM_TailCFOCD				0xdc0
+#define		rOFDM_PWMeasure1		0xdc4
+#define		rOFDM_PWMeasure2		0xdc8
+#define		rOFDM_BWReport				0xdcc
+#define		rOFDM_AGCReport				0xdd0
+#define		rOFDM_RxSNR					0xdd4
+#define		rOFDM_RxEVMCSI				0xdd8
+#define		rOFDM_SIGReport				0xddc
+
+
+/*
+ * 8. PageE(0xE00)
+ *   */
+#define		rTxAGC_A_Rate18_06			0xe00
+#define		rTxAGC_A_Rate54_24			0xe04
+#define		rTxAGC_A_CCK1_Mcs32			0xe08
+#define		rTxAGC_A_Mcs03_Mcs00			0xe10
+#define		rTxAGC_A_Mcs07_Mcs04			0xe14
+#define		rTxAGC_A_Mcs11_Mcs08			0xe18
+#define		rTxAGC_A_Mcs15_Mcs12			0xe1c
+
+#define		rFPGA0_IQK					0xe28
+#define		rTx_IQK_Tone_A				0xe30
+#define		rRx_IQK_Tone_A				0xe34
+#define		rTx_IQK_PI_A					0xe38
+#define		rRx_IQK_PI_A					0xe3c
+
+#define		rTx_IQK						0xe40
+#define		rRx_IQK						0xe44
+#define		rIQK_AGC_Pts					0xe48
+#define		rIQK_AGC_Rsp					0xe4c
+#define		rTx_IQK_Tone_B				0xe50
+#define		rRx_IQK_Tone_B				0xe54
+#define		rTx_IQK_PI_B					0xe58
+#define		rRx_IQK_PI_B					0xe5c
+#define		rIQK_AGC_Cont				0xe60
+
+#define		rBlue_Tooth					0xe6c
+#define		rRx_Wait_CCA					0xe70
+#define		rTx_CCK_RFON					0xe74
+#define		rTx_CCK_BBON				0xe78
+#define		rTx_OFDM_RFON				0xe7c
+#define		rTx_OFDM_BBON				0xe80
+#define		rTx_To_Rx					0xe84
+#define		rTx_To_Tx					0xe88
+#define		rRx_CCK						0xe8c
+
+#define		rTx_Power_Before_IQK_A		0xe94
+#define		rTx_Power_After_IQK_A			0xe9c
+
+#define		rRx_Power_Before_IQK_A		0xea0
+#define		rRx_Power_Before_IQK_A_2		0xea4
+#define		rRx_Power_After_IQK_A			0xea8
+#define		rRx_Power_After_IQK_A_2		0xeac
+
+#define		rTx_Power_Before_IQK_B		0xeb4
+#define		rTx_Power_After_IQK_B			0xebc
+
+#define		rRx_Power_Before_IQK_B		0xec0
+#define		rRx_Power_Before_IQK_B_2		0xec4
+#define		rRx_Power_After_IQK_B			0xec8
+#define		rRx_Power_After_IQK_B_2		0xecc
+
+#define		rRx_OFDM					0xed0
+#define		rRx_Wait_RIFS				0xed4
+#define		rRx_TO_Rx					0xed8
+#define		rStandby						0xedc
+#define		rSleep						0xee0
+#define		rPMPD_ANAEN				0xeec
+
+/*
+ * 7. RF Register 0x00-0x2E (RF 8256)
+ * RF-0222D 0x00-3F
+ *
+ * Zebra1 */
+#define		rZebra1_HSSIEnable				0x0	/* Useless now */
+#define		rZebra1_TRxEnable1				0x1
+#define		rZebra1_TRxEnable2				0x2
+#define		rZebra1_AGC					0x4
+#define		rZebra1_ChargePump			0x5
+#define		rZebra1_Channel				0x7	/* RF channel switch */
+
+/* #endif */
+#define		rZebra1_TxGain					0x8	/* Useless now */
+#define		rZebra1_TxLPF					0x9
+#define		rZebra1_RxLPF					0xb
+#define		rZebra1_RxHPFCorner			0xc
+
+/* Zebra4 */
+#define		rGlobalCtrl						0	/* Useless now */
+#define		rRTL8256_TxLPF					19
+#define		rRTL8256_RxLPF					11
+
+/* RTL8258 */
+#define		rRTL8258_TxLPF					0x11	/* Useless now */
+#define		rRTL8258_RxLPF					0x13
+#define		rRTL8258_RSSILPF				0xa
+
+/*
+ * RL6052 Register definition
+ *   */
+#define		RF_AC						0x00	/* */
+
+#define		RF_IQADJ_G1				0x01	/* */
+#define		RF_IQADJ_G2				0x02	/* */
+#define		RF_BS_PA_APSET_G1_G4		0x03
+#define		RF_BS_PA_APSET_G5_G8		0x04
+#define		RF_POW_TRSW				0x05	/* */
+
+#define		RF_GAIN_RX					0x06	/* */
+#define		RF_GAIN_TX					0x07	/* */
+
+#define		RF_TXM_IDAC				0x08	/* */
+#define		RF_IPA_G					0x09	/* */
+#define		RF_TXBIAS_G				0x0A
+#define		RF_TXPA_AG					0x0B
+#define		RF_IPA_A					0x0C	/* */
+#define		RF_TXBIAS_A				0x0D
+#define		RF_BS_PA_APSET_G9_G11	0x0E
+#define		RF_BS_IQGEN				0x0F	/* */
+
+#define		RF_MODE1					0x10	/* */
+#define		RF_MODE2					0x11	/* */
+
+#define		RF_RX_AGC_HP				0x12	/* */
+#define		RF_TX_AGC					0x13	/* */
+#define		RF_BIAS						0x14	/* */
+#define		RF_IPA						0x15	/* */
+#define		RF_TXBIAS					0x16
+#define		RF_POW_ABILITY			0x17	/* */
+#define		RF_MODE_AG				0x18	/* */
+#define		rRfChannel					0x18	/* RF channel and BW switch */
+#define		RF_CHNLBW					0x18	/* RF channel and BW switch */
+#define		RF_TOP						0x19	/* */
+
+#define		RF_RX_G1					0x1A	/* */
+#define		RF_RX_G2					0x1B	/* */
+
+#define		RF_RX_BB2					0x1C	/* */
+#define		RF_RX_BB1					0x1D	/* */
+
+#define		RF_RCK1					0x1E	/* */
+#define		RF_RCK2					0x1F	/* */
+
+#define		RF_TX_G1					0x20	/* */
+#define		RF_TX_G2					0x21	/* */
+#define		RF_TX_G3					0x22	/* */
+
+#define		RF_TX_BB1					0x23	/* */
+
+#define		RF_T_METER					0x24	/* */
+
+#define		RF_SYN_G1					0x25	/* RF TX Power control */
+#define		RF_SYN_G2					0x26	/* RF TX Power control */
+#define		RF_SYN_G3					0x27	/* RF TX Power control */
+#define		RF_SYN_G4					0x28	/* RF TX Power control */
+#define		RF_SYN_G5					0x29	/* RF TX Power control */
+#define		RF_SYN_G6					0x2A	/* RF TX Power control */
+#define		RF_SYN_G7					0x2B	/* RF TX Power control */
+#define		RF_SYN_G8					0x2C	/* RF TX Power control */
+
+#define		RF_RCK_OS					0x30	/* RF TX PA control */
+
+#define		RF_TXPA_G1					0x31	/* RF TX PA control */
+#define		RF_TXPA_G2					0x32	/* RF TX PA control */
+#define		RF_TXPA_G3					0x33	/* RF TX PA control */
+#define	RF_TX_BIAS_A				0x35
+#define	RF_TX_BIAS_D				0x36
+#define	RF_LOBF_9					0x38
+#define	RF_RXRF_A3					0x3C	/*	 */
+#define	RF_TRSW					0x3F
+
+#define	RF_TXRF_A2					0x41
+#define	RF_T_METER_88E				0x42
+#define	RF_TXPA_G4					0x46
+#define	RF_TXPA_A4					0x4B
+#define	RF_0x52					0x52
+#define	RF_WE_LUT					0xEF
+#define	RF_S0S1					0xB0
+
+/*
+ * Bit Mask
+ *
+ * 1. Page1(0x100) */
+#define		bBBResetB						0x100	/* Useless now? */
+#define		bGlobalResetB					0x200
+#define		bOFDMTxStart					0x4
+#define		bCCKTxStart						0x8
+#define		bCRC32Debug					0x100
+#define		bPMACLoopback					0x10
+#define		bTxLSIG							0xffffff
+#define		bOFDMTxRate					0xf
+#define		bOFDMTxReserved				0x10
+#define		bOFDMTxLength					0x1ffe0
+#define		bOFDMTxParity					0x20000
+#define		bTxHTSIG1						0xffffff
+#define		bTxHTMCSRate					0x7f
+#define		bTxHTBW						0x80
+#define		bTxHTLength					0xffff00
+#define		bTxHTSIG2						0xffffff
+#define		bTxHTSmoothing					0x1
+#define		bTxHTSounding					0x2
+#define		bTxHTReserved					0x4
+#define		bTxHTAggreation				0x8
+#define		bTxHTSTBC						0x30
+#define		bTxHTAdvanceCoding			0x40
+#define		bTxHTShortGI					0x80
+#define		bTxHTNumberHT_LTF			0x300
+#define		bTxHTCRC8						0x3fc00
+#define		bCounterReset					0x10000
+#define		bNumOfOFDMTx					0xffff
+#define		bNumOfCCKTx					0xffff0000
+#define		bTxIdleInterval					0xffff
+#define		bOFDMService					0xffff0000
+#define		bTxMACHeader					0xffffffff
+#define		bTxDataInit						0xff
+#define		bTxHTMode						0x100
+#define		bTxDataType					0x30000
+#define		bTxRandomSeed					0xffffffff
+#define		bCCKTxPreamble					0x1
+#define		bCCKTxSFD						0xffff0000
+#define		bCCKTxSIG						0xff
+#define		bCCKTxService					0xff00
+#define		bCCKLengthExt					0x8000
+#define		bCCKTxLength					0xffff0000
+#define		bCCKTxCRC16					0xffff
+#define		bCCKTxStatus					0x1
+#define		bOFDMTxStatus					0x2
+
+#define		IS_BB_REG_OFFSET_92S(_Offset)		((_Offset >= 0x800) && (_Offset <= 0xfff))
+#define		RF_TX_GAIN_OFFSET_8192F(_val) (abs((_val)) | (((_val) > 0) ? BIT(4) : 0))
+
+/* 2. Page8(0x800) */
+#define		bRFMOD							0x1	/* Reg 0x800 rFPGA0_RFMOD */
+#define		bJapanMode						0x2
+#define		bCCKTxSC						0x30
+#define		bCCKEn							0x1000000
+#define		bOFDMEn						0x2000000
+
+#define		bOFDMRxADCPhase           0x10000	/* Useless now */
+#define		bOFDMTxDACPhase		0x40000
+#define		bXATxAGC			0x3f
+
+#define		bAntennaSelect		0x0300
+
+#define		bXBTxAGC                 0xf00	/* Reg 80c rFPGA0_TxGainStage */
+#define		bXCTxAGC			0xf000
+#define		bXDTxAGC			0xf0000
+
+#define		bPAStart                 0xf0000000	/* Useless now */
+#define		bTRStart			0x00f00000
+#define		bRFStart			0x0000f000
+#define		bBBStart			0x000000f0
+#define		bBBCCKStart		0x0000000f
+#define		bPAEnd                    0xf          /* Reg0x814 */
+#define		bTREnd			0x0f000000
+#define		bRFEnd			0x000f0000
+#define		bCCAMask                  0x000000f0   /* T2R */
+#define		bR2RCCAMask		0x00000f00
+#define		bHSSI_R2TDelay		0xf8000000
+#define		bHSSI_T2RDelay		0xf80000
+#define		bContTxHSSI              0x400     /* chane gain at continue Tx */
+#define		bIGFromCCK		0x200
+#define		bAGCAddress		0x3f
+#define		bRxHPTx			0x7000
+#define		bRxHPT2R			0x38000
+#define		bRxHPCCKIni		0xc0000
+#define		bAGCTxCode		0xc00000
+#define		bAGCRxCode		0x300000
+
+#define		b3WireDataLength         0x800	/* Reg 0x820~84f rFPGA0_XA_HSSIParameter1 */
+#define		b3WireAddressLength		0x400
+
+#define		b3WireRFPowerDown         0x1	/* Useless now
+ * #define bHWSISelect		0x8 */
+#define		b5GPAPEPolarity		0x40000000
+#define		b2GPAPEPolarity		0x80000000
+#define		bRFSW_TxDefaultAnt		0x3
+#define		bRFSW_TxOptionAnt		0x30
+#define		bRFSW_RxDefaultAnt		0x300
+#define		bRFSW_RxOptionAnt		0x3000
+#define		bRFSI_3WireData		0x1
+#define		bRFSI_3WireClock		0x2
+#define		bRFSI_3WireLoad		0x4
+#define		bRFSI_3WireRW		0x8
+#define		bRFSI_3Wire			0xf
+
+#define		bRFSI_RFENV              0x10	/* Reg 0x870 rFPGA0_XAB_RFInterfaceSW */
+
+#define		bRFSI_TRSW               0x20	/* Useless now */
+#define		bRFSI_TRSWB		0x40
+#define		bRFSI_ANTSW		0x100
+#define		bRFSI_ANTSWB		0x200
+#define		bRFSI_PAPE			0x400
+#define		bRFSI_PAPE5G		0x800
+#define		bBandSelect			0x1
+#define		bHTSIG2_GI			0x80
+#define		bHTSIG2_Smoothing		0x01
+#define		bHTSIG2_Sounding		0x02
+#define		bHTSIG2_Aggreaton		0x08
+#define		bHTSIG2_STBC		0x30
+#define		bHTSIG2_AdvCoding		0x40
+#define		bHTSIG2_NumOfHTLTF	0x300
+#define		bHTSIG2_CRC8		0x3fc
+#define		bHTSIG1_MCS		0x7f
+#define		bHTSIG1_BandWidth		0x80
+#define		bHTSIG1_HTLength		0xffff
+#define		bLSIG_Rate			0xf
+#define		bLSIG_Reserved		0x10
+#define		bLSIG_Length		0x1fffe
+#define		bLSIG_Parity			0x20
+#define		bCCKRxPhase		0x4
+
+#define		bLSSIReadAddress          0x7f800000   /* T65 RF */
+
+#define		bLSSIReadEdge             0x80000000   /* LSSI "Read" edge signal */
+
+#define		bLSSIReadBackData         0xfffff		/* T65 RF */
+
+#define		bLSSIReadOKFlag           0x1000	/* Useless now */
+#define		bCCKSampleRate            0x8       /* 0: 44MHz, 1:88MHz     */
+#define		bRegulator0Standby		0x1
+#define		bRegulatorPLLStandby		0x2
+#define		bRegulator1Standby		0x4
+#define		bPLLPowerUp		0x8
+#define		bDPLLPowerUp		0x10
+#define		bDA10PowerUp		0x20
+#define		bAD7PowerUp		0x200
+#define		bDA6PowerUp		0x2000
+#define		bXtalPowerUp		0x4000
+#define		b40MDClkPowerUP		0x8000
+#define		bDA6DebugMode		0x20000
+#define		bDA6Swing			0x380000
+
+#define		bADClkPhase               0x4000000	/* Reg 0x880 rFPGA0_AnalogParameter1 20/40 CCK support switch 40/80 BB MHZ */
+
+#define		b80MClkDelay              0x18000000	/* Useless */
+#define		bAFEWatchDogEnable		0x20000000
+
+#define		bXtalCap01                0xc0000000	/* Reg 0x884 rFPGA0_AnalogParameter2 Crystal cap */
+#define		bXtalCap23			0x3
+#define		bXtalCap92x					0x0f000000
+#define		bXtalCap			0x0f000000
+
+#define		bIntDifClkEnable          0x400	/* Useless */
+#define		bExtSigClkEnable		0x800
+#define		bBandgapMbiasPowerUp	0x10000
+#define		bAD11SHGain		0xc0000
+#define		bAD11InputRange		0x700000
+#define		bAD11OPCurrent		0x3800000
+#define		bIPathLoopback		0x4000000
+#define		bQPathLoopback		0x8000000
+#define		bAFELoopback		0x10000000
+#define		bDA10Swing		0x7e0
+#define		bDA10Reverse		0x800
+#define		bDAClkSource		0x1000
+#define		bAD7InputRange		0x6000
+#define		bAD7Gain			0x38000
+#define		bAD7OutputCMMode		0x40000
+#define		bAD7InputCMMode		0x380000
+#define		bAD7Current			0xc00000
+#define		bRegulatorAdjust		0x7000000
+#define		bAD11PowerUpAtTx		0x1
+#define		bDA10PSAtTx		0x10
+#define		bAD11PowerUpAtRx		0x100
+#define		bDA10PSAtRx		0x1000
+#define		bCCKRxAGCFormat		0x200
+#define		bPSDFFTSamplepPoint		0xc000
+#define		bPSDAverageNum		0x3000
+#define		bIQPathControl		0xc00
+#define		bPSDFreq			0x3ff
+#define		bPSDAntennaPath		0x30
+#define		bPSDIQSwitch		0x40
+#define		bPSDRxTrigger		0x400000
+#define		bPSDTxTrigger		0x80000000
+#define		bPSDSineToneScale		0x7f000000
+#define		bPSDReport			0xffff
+
+/* 3. Page9(0x900) */
+#define		bOFDMTxSC                 0x30000000	/* Useless */
+#define		bCCKTxOn			0x1
+#define		bOFDMTxOn		0x2
+#define		bDebugPage                0xfff  /* reset debug page and also HWord, LWord */
+#define		bDebugItem                0xff   /* reset debug page and LWord */
+#define		bAntL			0x10
+#define		bAntNonHT				0x100
+#define		bAntHT1			0x1000
+#define		bAntHT2			0x10000
+#define		bAntHT1S1			0x100000
+#define		bAntNonHTS1		0x1000000
+
+/* 4. PageA(0xA00) */
+#define		bCCKBBMode				0x3	/* Useless */
+#define		bCCKTxPowerSaving		0x80
+#define		bCCKRxPowerSaving		0x40
+
+#define		bCCKSideBand			0x10	/* Reg 0xa00 rCCK0_System 20/40 switch */
+
+#define		bCCKScramble			0x8	/* Useless */
+#define		bCCKAntDiversity		0x8000
+#define		bCCKCarrierRecovery		0x4000
+#define		bCCKTxRate				0x3000
+#define		bCCKDCCancel			0x0800
+#define		bCCKISICancel			0x0400
+#define		bCCKMatchFilter			0x0200
+#define		bCCKEqualizer			0x0100
+#define		bCCKPreambleDetect		0x800000
+#define		bCCKFastFalseCCA		0x400000
+#define		bCCKChEstStart			0x300000
+#define		bCCKCCACount			0x080000
+#define		bCCKcs_lim				0x070000
+#define		bCCKBistMode			0x80000000
+#define		bCCKCCAMask			0x40000000
+#define		bCCKTxDACPhase		0x4
+#define		bCCKRxADCPhase		0x20000000   /* r_rx_clk */
+#define		bCCKr_cp_mode0		0x0100
+#define		bCCKTxDCOffset			0xf0
+#define		bCCKRxDCOffset			0xf
+#define		bCCKCCAMode			0xc000
+#define		bCCKFalseCS_lim			0x3f00
+#define		bCCKCS_ratio			0xc00000
+#define		bCCKCorgBit_sel			0x300000
+#define		bCCKPD_lim				0x0f0000
+#define		bCCKNewCCA			0x80000000
+#define		bCCKRxHPofIG			0x8000
+#define		bCCKRxIG				0x7f00
+#define		bCCKLNAPolarity			0x800000
+#define		bCCKRx1stGain			0x7f0000
+#define		bCCKRFExtend			0x20000000 /* CCK Rx Iinital gain polarity */
+#define		bCCKRxAGCSatLevel		0x1f000000
+#define		bCCKRxAGCSatCount		0xe0
+#define		bCCKRxRFSettle			0x1f       /* AGCsamp_dly */
+#define		bCCKFixedRxAGC			0x8000
+/* #define bCCKRxAGCFormat		0x4000 */   /* remove to HSSI register 0x824 */
+#define		bCCKAntennaPolarity		0x2000
+#define		bCCKTxFilterType		0x0c00
+#define		bCCKRxAGCReportType	0x0300
+#define		bCCKRxDAGCEn			0x80000000
+#define		bCCKRxDAGCPeriod		0x20000000
+#define		bCCKRxDAGCSatLevel		0x1f000000
+#define		bCCKTimingRecovery		0x800000
+#define		bCCKTxC0				0x3f0000
+#define		bCCKTxC1				0x3f000000
+#define		bCCKTxC2				0x3f
+#define		bCCKTxC3				0x3f00
+#define		bCCKTxC4				0x3f0000
+#define		bCCKTxC5				0x3f000000
+#define		bCCKTxC6				0x3f
+#define		bCCKTxC7				0x3f00
+#define		bCCKDebugPort			0xff0000
+#define		bCCKDACDebug			0x0f000000
+#define		bCCKFalseAlarmEnable	0x8000
+#define		bCCKFalseAlarmRead		0x4000
+#define		bCCKTRSSI				0x7f
+#define		bCCKRxAGCReport		0xfe
+#define		bCCKRxReport_AntSel	0x80000000
+#define		bCCKRxReport_MFOff		0x40000000
+#define		bCCKRxRxReport_SQLoss	0x20000000
+#define		bCCKRxReport_Pktloss	0x10000000
+#define		bCCKRxReport_Lockedbit	0x08000000
+#define		bCCKRxReport_RateError	0x04000000
+#define		bCCKRxReport_RxRate	0x03000000
+#define		bCCKRxFACounterLower	0xff
+#define		bCCKRxFACounterUpper	0xff000000
+#define		bCCKRxHPAGCStart		0xe000
+#define		bCCKRxHPAGCFinal		0x1c00
+#define		bCCKRxFalseAlarmEnable	0x8000
+#define		bCCKFACounterFreeze	0x4000
+#define		bCCKTxPathSel			0x10000000
+#define		bCCKDefaultRxPath		0xc000000
+#define		bCCKOptionRxPath		0x3000000
+
+/* 5. PageC(0xC00) */
+#define		bNumOfSTF				0x3	/* Useless */
+#define		bShift_L					0xc0
+#define		bGI_TH					0xc
+#define		bRxPathA				0x1
+#define		bRxPathB				0x2
+#define		bRxPathC				0x4
+#define		bRxPathD				0x8
+#define		bTxPathA				0x1
+#define		bTxPathB				0x2
+#define		bTxPathC				0x4
+#define		bTxPathD				0x8
+#define		bTRSSIFreq				0x200
+#define		bADCBackoff				0x3000
+#define		bDFIRBackoff			0xc000
+#define		bTRSSILatchPhase		0x10000
+#define		bRxIDCOffset			0xff
+#define		bRxQDCOffset			0xff00
+#define		bRxDFIRMode			0x1800000
+#define		bRxDCNFType			0xe000000
+#define		bRXIQImb_A				0x3ff
+#define		bRXIQImb_B				0xfc00
+#define		bRXIQImb_C				0x3f0000
+#define		bRXIQImb_D				0xffc00000
+#define		bDC_dc_Notch			0x60000
+#define		bRxNBINotch			0x1f000000
+#define		bPD_TH					0xf
+#define		bPD_TH_Opt2			0xc000
+#define		bPWED_TH				0x700
+#define		bIfMF_Win_L			0x800
+#define		bPD_Option				0x1000
+#define		bMF_Win_L				0xe000
+#define		bBW_Search_L			0x30000
+#define		bwin_enh_L				0xc0000
+#define		bBW_TH					0x700000
+#define		bED_TH2				0x3800000
+#define		bBW_option				0x4000000
+#define		bRatio_TH				0x18000000
+#define		bWindow_L				0xe0000000
+#define		bSBD_Option				0x1
+#define		bFrame_TH				0x1c
+#define		bFS_Option				0x60
+#define		bDC_Slope_check		0x80
+#define		bFGuard_Counter_DC_L	0xe00
+#define		bFrame_Weight_Short	0x7000
+#define		bSub_Tune				0xe00000
+#define		bFrame_DC_Length		0xe000000
+#define		bSBD_start_offset		0x30000000
+#define		bFrame_TH_2			0x7
+#define		bFrame_GI2_TH			0x38
+#define		bGI2_Sync_en			0x40
+#define		bSarch_Short_Early		0x300
+#define		bSarch_Short_Late		0xc00
+#define		bSarch_GI2_Late		0x70000
+#define		bCFOAntSum				0x1
+#define		bCFOAcc				0x2
+#define		bCFOStartOffset			0xc
+#define		bCFOLookBack			0x70
+#define		bCFOSumWeight			0x80
+#define		bDAGCEnable			0x10000
+#define		bTXIQImb_A				0x3ff
+#define		bTXIQImb_B				0xfc00
+#define		bTXIQImb_C				0x3f0000
+#define		bTXIQImb_D				0xffc00000
+#define		bTxIDCOffset			0xff
+#define		bTxQDCOffset			0xff00
+#define		bTxDFIRMode			0x10000
+#define		bTxPesudoNoiseOn		0x4000000
+#define		bTxPesudoNoise_A		0xff
+#define		bTxPesudoNoise_B		0xff00
+#define		bTxPesudoNoise_C		0xff0000
+#define		bTxPesudoNoise_D		0xff000000
+#define		bCCADropOption			0x20000
+#define		bCCADropThres			0xfff00000
+#define		bEDCCA_H				0xf
+#define		bEDCCA_L				0xf0
+#define		bLambda_ED			0x300
+#define		bRxInitialGain			0x7f
+#define		bRxAntDivEn				0x80
+#define		bRxAGCAddressForLNA	0x7f00
+#define		bRxHighPowerFlow		0x8000
+#define		bRxAGCFreezeThres		0xc0000
+#define		bRxFreezeStep_AGC1	0x300000
+#define		bRxFreezeStep_AGC2	0xc00000
+#define		bRxFreezeStep_AGC3	0x3000000
+#define		bRxFreezeStep_AGC0	0xc000000
+#define		bRxRssi_Cmp_En			0x10000000
+#define		bRxQuickAGCEn			0x20000000
+#define		bRxAGCFreezeThresMode	0x40000000
+#define		bRxOverFlowCheckType	0x80000000
+#define		bRxAGCShift				0x7f
+#define		bTRSW_Tri_Only			0x80
+#define		bPowerThres			0x300
+#define		bRxAGCEn				0x1
+#define		bRxAGCTogetherEn		0x2
+#define		bRxAGCMin				0x4
+#define		bRxHP_Ini				0x7
+#define		bRxHP_TRLNA			0x70
+#define		bRxHP_RSSI				0x700
+#define		bRxHP_BBP1				0x7000
+#define		bRxHP_BBP2				0x70000
+#define		bRxHP_BBP3				0x700000
+#define		bRSSI_H					0x7f0000     /* the threshold for high power */
+#define		bRSSI_Gen				0x7f000000   /* the threshold for ant diversity */
+#define		bRxSettle_TRSW			0x7
+#define		bRxSettle_LNA			0x38
+#define		bRxSettle_RSSI			0x1c0
+#define		bRxSettle_BBP			0xe00
+#define		bRxSettle_RxHP			0x7000
+#define		bRxSettle_AntSW_RSSI	0x38000
+#define		bRxSettle_AntSW		0xc0000
+#define		bRxProcessTime_DAGC	0x300000
+#define		bRxSettle_HSSI			0x400000
+#define		bRxProcessTime_BBPPW	0x800000
+#define		bRxAntennaPowerShift	0x3000000
+#define		bRSSITableSelect		0xc000000
+#define		bRxHP_Final				0x7000000
+#define		bRxHTSettle_BBP			0x7
+#define		bRxHTSettle_HSSI		0x8
+#define		bRxHTSettle_RxHP		0x70
+#define		bRxHTSettle_BBPPW		0x80
+#define		bRxHTSettle_Idle		0x300
+#define		bRxHTSettle_Reserved	0x1c00
+#define		bRxHTRxHPEn			0x8000
+#define		bRxHTAGCFreezeThres	0x30000
+#define		bRxHTAGCTogetherEn	0x40000
+#define		bRxHTAGCMin			0x80000
+#define		bRxHTAGCEn				0x100000
+#define		bRxHTDAGCEn			0x200000
+#define		bRxHTRxHP_BBP			0x1c00000
+#define		bRxHTRxHP_Final		0xe0000000
+#define		bRxPWRatioTH			0x3
+#define		bRxPWRatioEn			0x4
+#define		bRxMFHold				0x3800
+#define		bRxPD_Delay_TH1		0x38
+#define		bRxPD_Delay_TH2		0x1c0
+#define		bRxPD_DC_COUNT_MAX	0x600
+/* #define bRxMF_Hold               0x3800 */
+#define		bRxPD_Delay_TH			0x8000
+#define		bRxProcess_Delay		0xf0000
+#define		bRxSearchrange_GI2_Early	0x700000
+#define		bRxFrame_Guard_Counter_L	0x3800000
+#define		bRxSGI_Guard_L			0xc000000
+#define		bRxSGI_Search_L		0x30000000
+#define		bRxSGI_TH				0xc0000000
+#define		bDFSCnt0				0xff
+#define		bDFSCnt1				0xff00
+#define		bDFSFlag				0xf0000
+#define		bMFWeightSum			0x300000
+#define		bMinIdxTH				0x7f000000
+#define		bDAFormat				0x40000
+#define		bTxChEmuEnable		0x01000000
+#define		bTRSWIsolation_A		0x7f
+#define		bTRSWIsolation_B		0x7f00
+#define		bTRSWIsolation_C		0x7f0000
+#define		bTRSWIsolation_D		0x7f000000
+#define		bExtLNAGain				0x7c00
+
+/* 6. PageE(0xE00) */
+#define		bSTBCEn				0x4	/* Useless */
+#define		bAntennaMapping		0x10
+#define		bNss					0x20
+#define		bCFOAntSumD			0x200
+#define		bPHYCounterReset		0x8000000
+#define		bCFOReportGet			0x4000000
+#define		bOFDMContinueTx		0x10000000
+#define		bOFDMSingleCarrier		0x20000000
+#define		bOFDMSingleTone		0x40000000
+/* #define bRxPath1                 0x01 */
+/* #define bRxPath2                 0x02 */
+/* #define bRxPath3                 0x04 */
+/* #define bRxPath4                 0x08 */
+/* #define bTxPath1                 0x10 */
+/* #define bTxPath2                 0x20 */
+#define		bHTDetect			0x100
+#define		bCFOEn				0x10000
+#define		bCFOValue			0xfff00000
+#define		bSigTone_Re		0x3f
+#define		bSigTone_Im		0x7f00
+#define		bCounter_CCA		0xffff
+#define		bCounter_ParityFail	0xffff0000
+#define		bCounter_RateIllegal		0xffff
+#define		bCounter_CRC8Fail	0xffff0000
+#define		bCounter_MCSNoSupport	0xffff
+#define		bCounter_FastSync	0xffff
+#define		bShortCFO			0xfff
+#define		bShortCFOTLength	12   /* total */
+#define		bShortCFOFLength	11   /* fraction */
+#define		bLongCFO			0x7ff
+#define		bLongCFOTLength	11
+#define		bLongCFOFLength	11
+#define		bTailCFO			0x1fff
+#define		bTailCFOTLength		13
+#define		bTailCFOFLength		12
+#define		bmax_en_pwdB		0xffff
+#define		bCC_power_dB		0xffff0000
+#define		bnoise_pwdB		0xffff
+#define		bPowerMeasTLength	10
+#define		bPowerMeasFLength	3
+#define		bRx_HT_BW			0x1
+#define		bRxSC				0x6
+#define		bRx_HT				0x8
+#define		bNB_intf_det_on		0x1
+#define		bIntf_win_len_cfg	0x30
+#define		bNB_Intf_TH_cfg		0x1c0
+#define		bRFGain				0x3f
+#define		bTableSel			0x40
+#define		bTRSW				0x80
+#define		bRxSNR_A			0xff
+#define		bRxSNR_B			0xff00
+#define		bRxSNR_C			0xff0000
+#define		bRxSNR_D			0xff000000
+#define		bSNREVMTLength		8
+#define		bSNREVMFLength		1
+#define		bCSI1st				0xff
+#define		bCSI2nd				0xff00
+#define		bRxEVM1st			0xff0000
+#define		bRxEVM2nd			0xff000000
+#define		bSIGEVM			0xff
+#define		bPWDB				0xff00
+#define		bSGIEN				0x10000
+
+#define		bSFactorQAM1		0xf	/* Useless */
+#define		bSFactorQAM2		0xf0
+#define		bSFactorQAM3		0xf00
+#define		bSFactorQAM4		0xf000
+#define		bSFactorQAM5		0xf0000
+#define		bSFactorQAM6		0xf0000
+#define		bSFactorQAM7		0xf00000
+#define		bSFactorQAM8		0xf000000
+#define		bSFactorQAM9		0xf0000000
+#define		bCSIScheme			0x100000
+
+#define		bNoiseLvlTopSet		0x3	/* Useless */
+#define		bChSmooth			0x4
+#define		bChSmoothCfg1		0x38
+#define		bChSmoothCfg2		0x1c0
+#define		bChSmoothCfg3		0xe00
+#define		bChSmoothCfg4		0x7000
+#define		bMRCMode			0x800000
+#define		bTHEVMCfg			0x7000000
+
+#define		bLoopFitType		0x1	/* Useless */
+#define		bUpdCFO			0x40
+#define		bUpdCFOOffData		0x80
+#define		bAdvUpdCFO			0x100
+#define		bAdvTimeCtrl		0x800
+#define		bUpdClko			0x1000
+#define		bFC					0x6000
+#define		bTrackingMode		0x8000
+#define		bPhCmpEnable		0x10000
+#define		bUpdClkoLTF		0x20000
+#define		bComChCFO			0x40000
+#define		bCSIEstiMode		0x80000
+#define		bAdvUpdEqz			0x100000
+#define		bUChCfg				0x7000000
+#define		bUpdEqz			0x8000000
+
+/* Rx Pseduo noise */
+#define		bRxPesudoNoiseOn		0x20000000	/* Useless */
+#define		bRxPesudoNoise_A		0xff
+#define		bRxPesudoNoise_B		0xff00
+#define		bRxPesudoNoise_C		0xff0000
+#define		bRxPesudoNoise_D		0xff000000
+#define		bPesudoNoiseState_A	0xffff
+#define		bPesudoNoiseState_B	0xffff0000
+#define		bPesudoNoiseState_C	0xffff
+#define		bPesudoNoiseState_D	0xffff0000
+
+/* 7. RF Register
+ * Zebra1 */
+#define		bZebra1_HSSIEnable		0x8		/* Useless */
+#define		bZebra1_TRxControl		0xc00
+#define		bZebra1_TRxGainSetting	0x07f
+#define		bZebra1_RxCorner		0xc00
+#define		bZebra1_TxChargePump	0x38
+#define		bZebra1_RxChargePump	0x7
+#define		bZebra1_ChannelNum	0xf80
+#define		bZebra1_TxLPFBW		0x400
+#define		bZebra1_RxLPFBW		0x600
+
+/* Zebra4 */
+#define		bRTL8256RegModeCtrl1	0x100	/* Useless */
+#define		bRTL8256RegModeCtrl0	0x40
+#define		bRTL8256_TxLPFBW		0x18
+#define		bRTL8256_RxLPFBW		0x600
+
+/* RTL8258 */
+#define		bRTL8258_TxLPFBW		0xc	/* Useless */
+#define		bRTL8258_RxLPFBW		0xc00
+#define		bRTL8258_RSSILPFBW	0xc0
+
+
+/*
+ * Other Definition
+ *   */
+
+/* byte endable for sb_write */
+#define		bByte0				0x1	/* Useless */
+#define		bByte1				0x2
+#define		bByte2				0x4
+#define		bByte3				0x8
+#define		bWord0				0x3
+#define		bWord1				0xc
+#define		bDWord				0xf
+
+/* for PutRegsetting & GetRegSetting BitMask */
+#define		bMaskByte0			0xff	/* Reg 0xc50 rOFDM0_XAAGCCore~0xC6f */
+#define		bMaskByte1			0xff00
+#define		bMaskByte2			0xff0000
+#define		bMaskByte3			0xff000000
+#define		bMaskHWord		0xffff0000
+#define		bMaskLWord			0x0000ffff
+#define		bMaskDWord		0xffffffff
+#define		bMaskH3Bytes		0xffffff00
+#define		bMask12Bits			0xfff
+#define		bMaskH4Bits			0xf0000000
+#define		bMaskOFDM_D		0xffc00000
+#define		bMaskCCK			0x3f3f3f3f
+
+
+#define		bEnable			0x1	/* Useless */
+#define		bDisable		0x0
+
+#define		LeftAntenna		0x0	/* Useless */
+#define		RightAntenna	0x1
+
+#define		tCheckTxStatus		500   /* 500ms // Useless */
+#define		tUpdateRxCounter	100   /* 100ms */
+
+#define		rateCCK		0	/* Useless */
+#define		rateOFDM	1
+#define		rateHT		2
+
+/* define Register-End */
+#define		bPMAC_End			0x1ff	/* Useless */
+#define		bFPGAPHY0_End		0x8ff
+#define		bFPGAPHY1_End		0x9ff
+#define		bCCKPHY0_End		0xaff
+#define		bOFDMPHY0_End		0xcff
+#define		bOFDMPHY1_End		0xdff
+
+/* define max debug item in each debug page
+ * #define bMaxItem_FPGA_PHY0        0x9
+ * #define bMaxItem_FPGA_PHY1        0x3
+ * #define bMaxItem_PHY_11B          0x16
+ * #define bMaxItem_OFDM_PHY0        0x29
+ * #define bMaxItem_OFDM_PHY1        0x0 */
+
+#define		bPMACControl		0x0		/* Useless */
+#define		bWMACControl		0x1
+#define		bWNICControl		0x2
+
+#define		PathA			0x0	/* Useless */
+#define		PathB			0x1
+#define		PathC			0x2
+#define		PathD			0x3
+
+#endif
diff --git a/rtl8723DS/include/Hal8192FPwrSeq.h b/rtl8723DS/include/Hal8192FPwrSeq.h
new file mode 100644
index 0000000..2b0bdc7
--- a/dev/null
+++ b/rtl8723DS/include/Hal8192FPwrSeq.h
@@ -0,0 +1,220 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2016 - 2017 Realtek Corporation.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ *****************************************************************************/
+#ifndef REALTEK_POWER_SEQUENCE_8192F
+#define REALTEK_POWER_SEQUENCE_8192F
+#define POWER_SEQUENCE_8192F_VER 04
+/* #include "PwrSeqCmd.h" */
+#include "HalPwrSeqCmd.h"
+
+/*
+	Check document WM-20110607-Paul-RTL8192e_Power_Architecture-R02.vsd
+	There are 6 HW Power States:
+	0: POFF--Power Off
+	1: PDN--Power Down
+	2: CARDEMU--Card Emulation
+	3: ACT--Active Mode
+	4: LPS--Low Power State
+	5: SUS--Suspend
+
+	The transition from different states are defined below
+	TRANS_CARDEMU_TO_ACT
+	TRANS_ACT_TO_CARDEMU
+	TRANS_CARDEMU_TO_SUS
+	TRANS_SUS_TO_CARDEMU
+	TRANS_CARDEMU_TO_PDN
+	TRANS_ACT_TO_LPS
+	TRANS_LPS_TO_ACT
+
+	TRANS_END
+*/
+#define	RTL8192F_TRANS_CARDEMU_TO_ACT_STEPS	38
+#define	RTL8192F_TRANS_ACT_TO_CARDEMU_STEPS	8
+#define	RTL8192F_TRANS_CARDEMU_TO_SUS_STEPS	7
+#define	RTL8192F_TRANS_SUS_TO_CARDEMU_STEPS	5
+#define	RTL8192F_TRANS_CARDEMU_TO_CARDDIS_STEPS	8
+#define	RTL8192F_TRANS_CARDDIS_TO_CARDEMU_STEPS	8
+#define	RTL8192F_TRANS_CARDEMU_TO_PDN_STEPS	4
+#define	RTL8192F_TRANS_PDN_TO_CARDEMU_STEPS	1
+#define	RTL8192F_TRANS_ACT_TO_LPS_STEPS		13
+#define	RTL8192F_TRANS_LPS_TO_ACT_STEPS		11	
+#define	RTL8192F_TRANS_END_STEPS	1
+
+
+#define RTL8192F_TRANS_CARDEMU_TO_ACT 														\
+	/* format */																\
+	/* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/								\
+	{0x0020, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK|PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0, BIT0}, /*0x20[0] = 1b'1 enable LDOA12 MACRO block for all interface*/	\
+	{0x0067, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK|PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT4, 0}, /*0x67[0] = 0 to disable BT_GPS_SEL pins*/	\
+	{0x0001, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK|PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_DELAY, 1, PWRSEQ_DELAY_MS},/*Delay 1ms*/   \
+	{0x0000, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK|PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT5, 0}, /*0x00[5] = 1b'0 release analog Ips to digital ,1:isolation*/	\
+	{0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, (BIT4|BIT3|BIT2), 0},/* disable SW LPS 0x04[10]=0 and WLSUS_EN 0x04[11]=0*/ \
+	{0x0075, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0 , BIT0},/* Disable USB suspend */	\
+	{0x0006, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_POLLING, BIT1, BIT1},/* wait till 0x04[17] = 1    power ready*/	\
+	{0x0075, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0 , 0},/* Enable USB suspend */	\
+	{0x0006, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0, BIT0},/* release WLON reset  0x04[16]=1*/ \
+	{0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_POLLING, (BIT1|BIT0), 0}, \
+	{0x0012, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT2, BIT2},/* SWR OCP enable 0x10[18]=1*/ \
+	{0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT7, 0},/* disable HWPDN 0x04[15]=0*/	\
+	{0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, (BIT4|BIT3), 0},/* disable WL suspend*/ \
+	{0x007f, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT7, BIT7},/* 0x7c[31]=1,LDO has max output capability*/ \
+	{0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0, BIT0},/* polling until return 0*/ \
+	{0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_POLLING, BIT0, 0},/**/ \
+	{0x0010, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT6, BIT6},/* Enable WL control XTAL setting*/ \
+	{0x0049, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT1, BIT1},/*Enable falling edge triggering interrupt*/\
+	{0x0063, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT1, 0},/*Enable GPIO9 data mode*/\
+	{0x0062, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT1, 0},/*Enable GPIO9 input mode*/\
+	{0x0058, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0, BIT0},/*Enable HSISR GPIO[C:0] interrupt*/\
+	{0x0068, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT3, 0},/*RF HW ON/OFF Enable*/\
+	{0x001C, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT7, BIT7},/*Register Lock Disable*/\
+	{0x0069, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT6, BIT6},/*For GPIO9 internal pull high setting*/\
+	{0x001f, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x00},/*reset RF path S1*/\
+	{0x007B, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x00},/*reset RF path S0*/\
+	{0x001f, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x07},/*enable RF path S1*/\
+	{0x007B, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x07},/*enalbe RF path S0*/\
+	{0x0097, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT5, BIT5},/*AFE_Ctrl*/\
+	{0x00DC, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0xCC},/*AFE_Ctrl*/\
+	{0x0024, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0x18, 0x00},/*AFE_Ctrl 0x24[4:3]=00 for xtal gmn*/\
+	{0x1050, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0xFF},/*GPIO_A[7:0] Pull down software register*/\
+	{0x1051, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0xFF},/*GPIO_A[15:8] Pull down software register*/\
+	{0x1052, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0xFF},/*GPIO_A[23:16] Pull down software register*/\
+	{0x1053, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0xFF},/*GPIO_A[31:24] Pull down software register*/\
+	{0x105B, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0xFF},/*GPIO_B[7:0] Pull down software register*/\
+	{0x001C, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT7, 0},/*Register Lock Enable*/\
+	{0x0077, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, (BIT7|BIT6), 0x3},/*set HCI Power sequence state delay time:0*/
+
+	
+#define RTL8192F_TRANS_ACT_TO_CARDEMU													\
+	/* format */																\
+	/* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/								\
+	/*{0x001F, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0}, */ /*0x1F[7:0] = 0 turn off RF*/	\
+	{0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0, 0}, /*0x2[0]=0 Reset BB,RF enter Power Down mode*/ \
+	{0x0049, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT1, 0},/*Enable rising edge triggering interrupt*/ \
+	{0x0006, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0, BIT0},/* release WLON reset  0x04[16]=1*/ \
+	{0x0012, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT2, 0}, /*0x10[18] = 0 to disable ocp*/	\
+	{0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT1, BIT1}, /*0x04[9] = 1 turn off MAC by HW state machine*/	\
+	{0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_POLLING, BIT1, 0}, /*wait till 0x04[9] = 0 polling until return 0 to disable*/ \
+	{0x0000, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK|PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT5, BIT5}, /*0x00[5] = 1b'1 analog Ips to digital ,1:isolation*/   \
+	{0x0020, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK|PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0, 0}, /*0x20[0] = 1b'0 disable LDOA12 MACRO block*/\
+
+
+#define RTL8192F_TRANS_CARDEMU_TO_SUS													\
+	/* format */																\
+	/* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/								\
+	{0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT4|BIT3, (BIT4|BIT3)}, /*0x04[12:11] = 2b'11 enable WL suspend for PCIe*/ \
+	{0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK|PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT3|BIT4, BIT3}, /*0x04[12:11] = 2b'01 enable WL suspend*/	\
+	{0x0023, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT4, BIT4}, /*0x23[4] = 1b'1 12H LDO enter sleep mode*/	\
+	{0x0007, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK|PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x20}, /*0x07[7:0] = 0x20 USB|SDIO SOP option to disable BG/MB/ACK/SWR*/   \
+	{0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT3|BIT4, BIT3|BIT4}, /*0x04[12:11] = 2b'11 enable WL suspend for PCIe*/	\
+	{0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_SDIO,PWR_CMD_WRITE, BIT0, BIT0}, /*Set SDIO suspend local register*/	\
+	{0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_SDIO,PWR_CMD_POLLING, BIT1, 0}, /*wait power state to suspend*/
+
+#define RTL8192F_TRANS_SUS_TO_CARDEMU													\
+	/* format */																\
+	/* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/								\
+	{0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT3 | BIT7, 0}, /*clear suspend enable and power down enable*/ \
+	{0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_SDIO,PWR_CMD_WRITE, BIT0, 0}, /*Set SDIO suspend local register*/ \
+	{0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_SDIO,PWR_CMD_POLLING, BIT1, BIT1}, /*wait power state to suspend*/\
+	{0x0023, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT4, 0}, /*0x23[4] = 1b'0 12H LDO enter normal mode*/   \
+	{0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT3|BIT4, 0}, /*0x04[12:11] = 2b'01enable WL suspend*/
+	
+
+#define RTL8192F_TRANS_CARDEMU_TO_CARDDIS													\
+	/* format */																\
+	/* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/	\
+	{0x0007, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK|PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x20}, /*0x07=0x20 , SOP option to disable BG/MB*/	\
+	{0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK|PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT3|BIT4, BIT3}, /*0x04[12:11] = 2b'01 enable WL suspend*/	\
+	{0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT2, BIT2}, /*0x04[10] = 1, enable SW LPS*/	\
+	{0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT3|BIT4, BIT3|BIT4}, /*0x04[12:11] = 2b'11 enable WL suspend*/	\
+	{0x004A, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0, 1}, /*0x48[16] = 1 to enable GPIO9 as EXT WAKEUP*/   \
+	{0x0023, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT4, BIT4}, /*0x23[4] = 1b'1 12H LDO enter sleep mode*/	\
+	{0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_SDIO,PWR_CMD_WRITE, BIT0, BIT0}, /*Set SDIO suspend local register*/	\
+	{0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_SDIO,PWR_CMD_POLLING, BIT1, 0}, /*wait power state to suspend*/
+
+#define RTL8192F_TRANS_CARDDIS_TO_CARDEMU													\
+	/* format */																\
+	/* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/								\
+	{0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT3 | BIT7, 0}, /*clear suspend enable and power down enable*/ \
+	{0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_SDIO,PWR_CMD_WRITE, BIT0, 0}, /*Set SDIO suspend local register*/ \
+	{0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_SDIO,PWR_CMD_POLLING, BIT1, BIT1}, /*wait power state to suspend*/\
+	{0x004A, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0, 0}, /*0x48[16] = 0 to disable GPIO9 as EXT WAKEUP*/	\
+	{0x0012, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT2, BIT2}, /*0x10[18] = 1 to enable ocp*/	\
+	{0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT3|BIT4, 0}, /*0x04[12:11] = 2b'01enable WL suspend*/\
+	{0x0023, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT4, 0}, /*0x23[4] = 1b'0 12H LDO enter normal mode*/   \
+	{0x0301, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0},/*PCIe DMA start*/
+
+
+#define RTL8192F_TRANS_CARDEMU_TO_PDN												\
+	/* format */																\
+	/* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/								\
+	{0x0023, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT4, BIT4}, /*0x23[4] = 1b'1 12H LDO enter sleep mode*/	\
+	{0x0007, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK|PWR_INTF_USB_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x20}, /*0x07[7:0] = 0x20 SOP option to disable BG/MB/ACK/SWR*/   \
+	{0x0006, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0, 0},/* 0x04[16] = 0*/\
+	{0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT7, BIT7},/* 0x04[15] = 1*/
+
+#define RTL8192F_TRANS_PDN_TO_CARDEMU												\
+	/* format */																\
+	/* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/								\
+	{0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT7, 0},/* 0x04[15] = 0*/
+
+#define RTL8192F_TRANS_ACT_TO_LPS														\
+	/* format */																\
+	/* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/								\
+	{0x0301, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0xFF},/*PCIe DMA stop*/	\
+	{0x0522, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0xFF},/*Tx Pause*/	\
+	{0x05F8, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_POLLING, 0xFF, 0},/*Should be zero if no packet is transmitting*/	\
+	{0x05F9, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_POLLING, 0xFF, 0},/*Should be zero if no packet is transmitting*/	\
+	{0x05FA, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_POLLING, 0xFF, 0},/*Should be zero if no packet is transmitting*/	\
+	{0x05FB, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_POLLING, 0xFF, 0},/*Should be zero if no packet is transmitting*/	\
+	{0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0, 0},/*CCK and OFDM are disabled,and clock are gated*/	\
+	{0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_DELAY, 0, PWRSEQ_DELAY_US},/*Delay 1us*/	\
+	{0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT1, 0},/*Whole BB is reset*/	\
+	{0x0100, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x03},/*Reset MAC TRX*/	\
+	{0x0101, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT1, 0},/*check if removed later*/ \
+	{0x0093, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x00},/*When driver enter Sus/ Disable, enable LOP for BT*/	\
+	{0x0553, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT5, BIT5},/*Respond TxOK to scheduler*/	\
+
+
+#define RTL8192F_TRANS_LPS_TO_ACT															\
+	/* format */																\
+	/* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/								\
+	{0x0080, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_SDIO,PWR_CMD_WRITE, 0xFF, 0x84}, /*SDIO RPWM*/\
+	{0xFE58, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x84}, /*USB RPWM*/\
+	{0x0361, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x84}, /*PCIe RPWM*/\
+	{0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_DELAY, 0, PWRSEQ_DELAY_MS}, /*Delay*/\
+	{0x0008, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT4, 0}, /*.	0x08[4] = 0 	 switch TSF to 40M*/\
+	{0x0109, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_POLLING, BIT7, 0}, /*Polling 0x109[7]=0  TSF in 40M*/\
+	{0x0029, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT6|BIT7, 0}, /*.	0x29[7:6] = 2b'00	 enable BB clock*/\
+	{0x0101, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT1, BIT1}, /*.	0x101[1] = 1*/\
+	{0x0100, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0xFF}, /*.	0x100[7:0] = 0xFF	 enable WMAC TRX*/\
+	{0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT1|BIT0, BIT1|BIT0}, /*.	0x02[1:0] = 2b'11	 enable BB macro*/\
+	{0x0522, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0}, /*.	0x522 = 0*/
+ 
+#define RTL8192F_TRANS_END															\
+	/* format */																\
+	/* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/								\
+	{0xFFFF, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,0,PWR_CMD_END, 0, 0}, //
+
+
+extern WLAN_PWR_CFG rtl8192F_power_on_flow[RTL8192F_TRANS_CARDEMU_TO_ACT_STEPS+RTL8192F_TRANS_END_STEPS];
+extern WLAN_PWR_CFG rtl8192F_radio_off_flow[RTL8192F_TRANS_ACT_TO_CARDEMU_STEPS+RTL8192F_TRANS_END_STEPS];
+extern WLAN_PWR_CFG rtl8192F_card_disable_flow[RTL8192F_TRANS_ACT_TO_CARDEMU_STEPS+RTL8192F_TRANS_CARDEMU_TO_CARDDIS_STEPS+RTL8192F_TRANS_END_STEPS];
+extern WLAN_PWR_CFG rtl8192F_card_enable_flow[RTL8192F_TRANS_CARDDIS_TO_CARDEMU_STEPS+RTL8192F_TRANS_CARDEMU_TO_ACT_STEPS+RTL8192F_TRANS_END_STEPS];
+extern WLAN_PWR_CFG rtl8192F_suspend_flow[RTL8192F_TRANS_ACT_TO_CARDEMU_STEPS+RTL8192F_TRANS_CARDEMU_TO_SUS_STEPS+RTL8192F_TRANS_END_STEPS];
+extern WLAN_PWR_CFG rtl8192F_resume_flow[RTL8192F_TRANS_SUS_TO_CARDEMU_STEPS+RTL8192F_TRANS_CARDEMU_TO_ACT_STEPS+RTL8192F_TRANS_END_STEPS];
+extern WLAN_PWR_CFG rtl8192F_hwpdn_flow[RTL8192F_TRANS_ACT_TO_CARDEMU_STEPS+RTL8192F_TRANS_CARDEMU_TO_PDN_STEPS+RTL8192F_TRANS_END_STEPS];
+extern WLAN_PWR_CFG rtl8192F_enter_lps_flow[RTL8192F_TRANS_ACT_TO_LPS_STEPS+RTL8192F_TRANS_END_STEPS];
+extern WLAN_PWR_CFG rtl8192F_leave_lps_flow[RTL8192F_TRANS_LPS_TO_ACT_STEPS+RTL8192F_TRANS_END_STEPS];
+
+#endif
diff --git a/rtl8723DS/include/Hal8703BPhyCfg.h b/rtl8723DS/include/Hal8703BPhyCfg.h
index 7ef2a8c..f5b995c 100755..100644
--- a/rtl8723DS/include/Hal8703BPhyCfg.h
+++ b/rtl8723DS/include/Hal8703BPhyCfg.h
@@ -123,7 +123,7 @@ PHY_SetSwChnlBWMode8703B(
 );
 
 VOID phy_set_rf_path_switch_8703b(
-	IN	PADAPTER	pAdapter,
+	IN	struct dm_struct		*phydm,
 	IN	bool		bMain
 );
 
diff --git a/rtl8723DS/include/Hal8703BPhyReg.h b/rtl8723DS/include/Hal8703BPhyReg.h
index 881a13c..881a13c 100755..100644
--- a/rtl8723DS/include/Hal8703BPhyReg.h
+++ b/rtl8723DS/include/Hal8703BPhyReg.h
diff --git a/rtl8723DS/include/Hal8703BPwrSeq.h b/rtl8723DS/include/Hal8703BPwrSeq.h
index 0dac13e..0dac13e 100755..100644
--- a/rtl8723DS/include/Hal8703BPwrSeq.h
+++ b/rtl8723DS/include/Hal8703BPwrSeq.h
diff --git a/rtl8723DS/include/Hal8710BPhyCfg.h b/rtl8723DS/include/Hal8710BPhyCfg.h
new file mode 100644
index 0000000..4d72f7a
--- a/dev/null
+++ b/rtl8723DS/include/Hal8710BPhyCfg.h
@@ -0,0 +1,127 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2007 - 2017 Realtek Corporation.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ *****************************************************************************/
+#ifndef __INC_HAL8710BPHYCFG_H__
+#define __INC_HAL8710BPHYCFG_H__
+
+/*--------------------------Define Parameters-------------------------------*/
+#define LOOP_LIMIT				5
+#define MAX_STALL_TIME			50		/* us */
+#define AntennaDiversityValue	0x80	/* (Adapter->bSoftwareAntennaDiversity ? 0x00 : 0x80) */
+#define MAX_TXPWR_IDX_NMODE_92S	63
+#define Reset_Cnt_Limit			3
+
+#ifdef CONFIG_PCI_HCI
+	#define MAX_AGGR_NUM	0x0B
+#else
+	#define MAX_AGGR_NUM	0x07
+#endif /* CONFIG_PCI_HCI */
+
+
+/*--------------------------Define Parameters End-------------------------------*/
+
+
+/*------------------------------Define structure----------------------------*/
+
+/*------------------------------Define structure End----------------------------*/
+
+/*--------------------------Exported Function prototype---------------------*/
+u32
+PHY_QueryBBReg_8710B(
+	IN	PADAPTER	Adapter,
+	IN	u32		RegAddr,
+	IN	u32		BitMask
+);
+
+VOID
+PHY_SetBBReg_8710B(
+	IN	PADAPTER	Adapter,
+	IN	u32		RegAddr,
+	IN	u32		BitMask,
+	IN	u32		Data
+);
+
+u32
+PHY_QueryRFReg_8710B(
+	IN	PADAPTER		Adapter,
+	IN	enum rf_path		eRFPath,
+	IN	u32				RegAddr,
+	IN	u32				BitMask
+);
+
+VOID
+PHY_SetRFReg_8710B(
+	IN	PADAPTER		Adapter,
+	IN	enum rf_path		eRFPath,
+	IN	u32				RegAddr,
+	IN	u32				BitMask,
+	IN	u32				Data
+);
+
+/* MAC/BB/RF HAL config */
+int PHY_BBConfig8710B(PADAPTER	Adapter);
+
+int PHY_RFConfig8710B(PADAPTER	Adapter);
+
+s32 PHY_MACConfig8710B(PADAPTER padapter);
+
+int
+PHY_ConfigRFWithParaFile_8710B(
+	IN	PADAPTER			Adapter,
+	IN	u8				*pFileName,
+	enum rf_path				eRFPath
+);
+
+VOID
+PHY_SetTxPowerIndex_8710B(
+	IN	PADAPTER			Adapter,
+	IN	u32					PowerIndex,
+	IN	enum rf_path			RFPath,
+	IN	u8					Rate
+);
+
+u8
+PHY_GetTxPowerIndex_8710B(
+	IN	PADAPTER			pAdapter,
+	IN	enum rf_path			RFPath,
+	IN	u8					Rate,
+	IN	u8					BandWidth,
+	IN	u8					Channel,
+	struct txpwr_idx_comp *tic
+);
+
+VOID
+PHY_GetTxPowerLevel8710B(
+	IN	PADAPTER		Adapter,
+	OUT s32				*powerlevel
+);
+
+VOID
+PHY_SetTxPowerLevel8710B(
+	IN	PADAPTER		Adapter,
+	IN	u8			channel
+);
+
+VOID
+PHY_SetSwChnlBWMode8710B(
+	IN	PADAPTER			Adapter,
+	IN	u8					channel,
+	IN	enum channel_width	Bandwidth,
+	IN	u8					Offset40,
+	IN	u8					Offset80
+);
+
+/*--------------------------Exported Function prototype End---------------------*/
+
+#endif
diff --git a/rtl8723DS/include/Hal8710BPhyReg.h b/rtl8723DS/include/Hal8710BPhyReg.h
new file mode 100644
index 0000000..337e032
--- a/dev/null
+++ b/rtl8723DS/include/Hal8710BPhyReg.h
@@ -0,0 +1,1134 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2007 - 2017 Realtek Corporation.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ *****************************************************************************/
+#ifndef __INC_HAL8710BPHYREG_H__
+#define __INC_HAL8710BPHYREG_H__
+
+#define		rSYM_WLBT_PAPE_SEL		0x64
+/*
+ * BB-PHY register PMAC 0x100 PHY 0x800 - 0xEFF
+ * 1. PMAC duplicate register due to connection: RF_Mode, TRxRN, NumOf L-STF
+ * 2. 0x800/0x900/0xA00/0xC00/0xD00/0xE00
+ * 3. RF register 0x00-2E
+ * 4. Bit Mask for BB/RF register
+ * 5. Other definition for BB/RF R/W
+ *   */
+
+
+/*
+ * 1. PMAC duplicate register due to connection: RF_Mode, TRxRN, NumOf L-STF
+ * 1. Page1(0x100)
+ *   */
+#define		rPMAC_Reset					0x100
+#define		rPMAC_TxStart					0x104
+#define		rPMAC_TxLegacySIG				0x108
+#define		rPMAC_TxHTSIG1				0x10c
+#define		rPMAC_TxHTSIG2				0x110
+#define		rPMAC_PHYDebug				0x114
+#define		rPMAC_TxPacketNum				0x118
+#define		rPMAC_TxIdle					0x11c
+#define		rPMAC_TxMACHeader0			0x120
+#define		rPMAC_TxMACHeader1			0x124
+#define		rPMAC_TxMACHeader2			0x128
+#define		rPMAC_TxMACHeader3			0x12c
+#define		rPMAC_TxMACHeader4			0x130
+#define		rPMAC_TxMACHeader5			0x134
+#define		rPMAC_TxDataType				0x138
+#define		rPMAC_TxRandomSeed			0x13c
+#define		rPMAC_CCKPLCPPreamble			0x140
+#define		rPMAC_CCKPLCPHeader			0x144
+#define		rPMAC_CCKCRC16				0x148
+#define		rPMAC_OFDMRxCRC32OK			0x170
+#define		rPMAC_OFDMRxCRC32Er			0x174
+#define		rPMAC_OFDMRxParityEr			0x178
+#define		rPMAC_OFDMRxCRC8Er			0x17c
+#define		rPMAC_CCKCRxRC16Er			0x180
+#define		rPMAC_CCKCRxRC32Er			0x184
+#define		rPMAC_CCKCRxRC32OK			0x188
+#define		rPMAC_TxStatus					0x18c
+
+/*
+ * 2. Page2(0x200)
+ *
+ * The following two definition are only used for USB interface. */
+#define		RF_BB_CMD_ADDR				0x02c0	/* RF/BB read/write command address. */
+#define		RF_BB_CMD_DATA				0x02c4	/* RF/BB read/write command data. */
+
+/*
+ * 3. Page8(0x800)
+ *   */
+#define		rFPGA0_RFMOD				0x800	/* RF mode & CCK TxSC // RF BW Setting?? */
+
+#define		rFPGA0_TxInfo				0x804	/* Status report?? */
+#define		rFPGA0_PSDFunction			0x808
+
+#define		rFPGA0_TxGainStage			0x80c	/* Set TX PWR init gain? */
+
+#define		rFPGA0_RFTiming1			0x810	/* Useless now */
+#define		rFPGA0_RFTiming2			0x814
+
+#define		rFPGA0_XA_HSSIParameter1		0x820	/* RF 3 wire register */
+#define		rFPGA0_XA_HSSIParameter2		0x824
+#define		rFPGA0_XB_HSSIParameter1		0x828
+#define		rFPGA0_XB_HSSIParameter2		0x82c
+#define		rTxAGC_B_Rate18_06				0x830
+#define		rTxAGC_B_Rate54_24				0x834
+#define		rTxAGC_B_CCK1_55_Mcs32		0x838
+#define		rTxAGC_B_Mcs03_Mcs00			0x83c
+
+#define		rTxAGC_B_Mcs07_Mcs04			0x848
+#define		rTxAGC_B_Mcs11_Mcs08			0x84c
+
+#define		rFPGA0_XA_LSSIParameter		0x840
+#define		rFPGA0_XB_LSSIParameter		0x844
+
+#define		rFPGA0_RFWakeUpParameter		0x850	/* Useless now */
+#define		rFPGA0_RFSleepUpParameter		0x854
+
+#define		rFPGA0_XAB_SwitchControl		0x858	/* RF Channel switch */
+#define		rFPGA0_XCD_SwitchControl		0x85c
+
+#define		rFPGA0_XA_RFInterfaceOE		0x860	/* RF Channel switch */
+#define		rFPGA0_XB_RFInterfaceOE		0x864
+
+#define		rTxAGC_B_Mcs15_Mcs12			0x868
+#define		rTxAGC_B_CCK11_A_CCK2_11		0x86c
+
+#define		rFPGA0_XAB_RFInterfaceSW		0x870	/* RF Interface Software Control */
+#define		rFPGA0_XCD_RFInterfaceSW		0x874
+
+#define		rFPGA0_XAB_RFParameter		0x878	/* RF Parameter */
+#define		rFPGA0_XCD_RFParameter		0x87c
+
+#define		rFPGA0_AnalogParameter1		0x880	/* Crystal cap setting RF-R/W protection for parameter4?? */
+#define		rFPGA0_AnalogParameter2		0x884
+#define		rFPGA0_AnalogParameter3		0x888	/* Useless now */
+#define		rFPGA0_AnalogParameter4		0x88c
+
+#define		rFPGA0_XA_LSSIReadBack		0x8a0	/* Tranceiver LSSI Readback */
+#define		rFPGA0_XB_LSSIReadBack		0x8a4
+#define		rFPGA0_XC_LSSIReadBack		0x8a8
+#define		rFPGA0_XD_LSSIReadBack		0x8ac
+
+#define		rFPGA0_PSDReport				0x8b4	/* Useless now */
+#define		TransceiverA_HSPI_Readback	0x8b8	/* Transceiver A HSPI Readback */
+#define		TransceiverB_HSPI_Readback	0x8bc	/* Transceiver B HSPI Readback */
+#define		rFPGA0_XAB_RFInterfaceRB		0x8e0	/* Useless now // RF Interface Readback Value */
+#define		rFPGA0_XCD_RFInterfaceRB		0x8e4	/* Useless now */
+
+/*
+ * 4. Page9(0x900)
+ *   */
+#define	rFPGA1_RFMOD				0x900	/* RF mode & OFDM TxSC // RF BW Setting?? */
+#define	rFPGA1_TxBlock				0x904	/* Useless now */
+#define	rFPGA1_DebugSelect			0x908	/* Useless now */
+#define	rFPGA1_TxInfo				0x90c	/* Useless now // Status report?? */
+#define	rDPDT_control				0x92c
+#define	rfe_ctrl_anta_src				0x930
+#define	rS0S1_PathSwitch			0x948
+#define	rBBrx_DFIR					0x954
+
+/*
+ * 5. PageA(0xA00)
+ *
+ * Set Control channel to upper or lower. These settings are required only for 40MHz */
+#define		rCCK0_System				0xa00
+
+#define		rCCK0_AFESetting			0xa04	/* Disable init gain now // Select RX path by RSSI */
+#define		rCCK0_CCA					0xa08	/* Disable init gain now // Init gain */
+
+#define		rCCK0_RxAGC1				0xa0c	/* AGC default value, saturation level // Antenna Diversity, RX AGC, LNA Threshold, RX LNA Threshold useless now. Not the same as 90 series */
+#define		rCCK0_RxAGC2				0xa10	/* AGC & DAGC */
+
+#define		rCCK0_RxHP					0xa14
+
+#define		rCCK0_DSPParameter1		0xa18	/* Timing recovery & Channel estimation threshold */
+#define		rCCK0_DSPParameter2		0xa1c	/* SQ threshold */
+
+#define		rCCK0_TxFilter1				0xa20
+#define		rCCK0_TxFilter2				0xa24
+#define		rCCK0_DebugPort			0xa28	/* debug port and Tx filter3 */
+#define		rCCK0_FalseAlarmReport		0xa2c	/* 0xa2d	useless now 0xa30-a4f channel report */
+#define		rCCK0_TRSSIReport		0xa50
+#define		rCCK0_RxReport			0xa54  /* 0xa57 */
+#define		rCCK0_FACounterLower		0xa5c  /* 0xa5b */
+#define		rCCK0_FACounterUpper		0xa58  /* 0xa5c */
+
+/*
+ * PageB(0xB00)
+ *   */
+#define rPdp_AntA						0xb00
+#define rPdp_AntA_4						0xb04
+#define rPdp_AntA_8						0xb08
+#define rPdp_AntA_C						0xb0c
+#define rPdp_AntA_10					0xb10
+#define rPdp_AntA_14					0xb14
+#define rPdp_AntA_18					0xb18
+#define rPdp_AntA_1C					0xb1c
+#define rPdp_AntA_20					0xb20
+#define rPdp_AntA_24					0xb24
+
+#define rConfig_Pmpd_AntA				0xb28
+#define rConfig_ram64x16				0xb2c
+
+#define rBndA							0xb30
+#define rHssiPar						0xb34
+
+#define rConfig_AntA					0xb68
+#define rConfig_AntB					0xb6c
+
+#define rPdp_AntB						0xb70
+#define rPdp_AntB_4						0xb74
+#define rPdp_AntB_8						0xb78
+#define rPdp_AntB_C						0xb7c
+#define rPdp_AntB_10					0xb80
+#define rPdp_AntB_14					0xb84
+#define rPdp_AntB_18					0xb88
+#define rPdp_AntB_1C					0xb8c
+#define rPdp_AntB_20					0xb90
+#define rPdp_AntB_24					0xb94
+
+#define rConfig_Pmpd_AntB				0xb98
+
+#define rBndB							0xba0
+
+#define rAPK							0xbd8
+#define rPm_Rx0_AntA					0xbdc
+#define rPm_Rx1_AntA					0xbe0
+#define rPm_Rx2_AntA					0xbe4
+#define rPm_Rx3_AntA					0xbe8
+#define rPm_Rx0_AntB					0xbec
+#define rPm_Rx1_AntB					0xbf0
+#define rPm_Rx2_AntB					0xbf4
+#define rPm_Rx3_AntB					0xbf8
+/*
+ * 6. PageC(0xC00)
+ *   */
+#define		rOFDM0_LSTF				0xc00
+
+#define		rOFDM0_TRxPathEnable		0xc04
+#define		rOFDM0_TRMuxPar			0xc08
+#define		rOFDM0_TRSWIsolation		0xc0c
+
+#define		rOFDM0_XARxAFE			0xc10  /* RxIQ DC offset, Rx digital filter, DC notch filter */
+#define		rOFDM0_XARxIQImbalance		0xc14  /* RxIQ imbalance matrix */
+#define		rOFDM0_XBRxAFE		0xc18
+#define		rOFDM0_XBRxIQImbalance	0xc1c
+#define		rOFDM0_XCRxAFE		0xc20
+#define		rOFDM0_XCRxIQImbalance	0xc24
+#define		rOFDM0_XDRxAFE		0xc28
+#define		rOFDM0_XDRxIQImbalance	0xc2c
+
+#define		rOFDM0_RxDetector1			0xc30  /* PD, BW & SBD	// DM tune init gain */
+#define		rOFDM0_RxDetector2			0xc34  /* SBD & Fame Sync. */
+#define		rOFDM0_RxDetector3			0xc38  /* Frame Sync. */
+#define		rOFDM0_RxDetector4			0xc3c  /* PD, SBD, Frame Sync & Short-GI */
+
+#define		rOFDM0_RxDSP				0xc40  /* Rx Sync Path */
+#define		rOFDM0_CFOandDAGC		0xc44  /* CFO & DAGC */
+#define		rOFDM0_CCADropThreshold	0xc48 /* CCA Drop threshold */
+#define		rOFDM0_ECCAThreshold		0xc4c /* energy CCA */
+
+#define		rOFDM0_XAAGCCore1			0xc50	/* DIG */
+#define		rOFDM0_XAAGCCore2			0xc54
+#define		rOFDM0_XBAGCCore1			0xc58
+#define		rOFDM0_XBAGCCore2			0xc5c
+#define		rOFDM0_XCAGCCore1			0xc60
+#define		rOFDM0_XCAGCCore2			0xc64
+#define		rOFDM0_XDAGCCore1			0xc68
+#define		rOFDM0_XDAGCCore2			0xc6c
+
+#define		rOFDM0_AGCParameter1			0xc70
+#define		rOFDM0_AGCParameter2			0xc74
+#define		rOFDM0_AGCRSSITable			0xc78
+#define		rOFDM0_HTSTFAGC				0xc7c
+
+#define		rOFDM0_XATxIQImbalance		0xc80	/* TX PWR TRACK and DIG */
+#define		rOFDM0_XATxAFE				0xc84
+#define		rOFDM0_XBTxIQImbalance		0xc88
+#define		rOFDM0_XBTxAFE				0xc8c
+#define		rOFDM0_XCTxIQImbalance		0xc90
+#define		rOFDM0_XCTxAFE			0xc94
+#define		rOFDM0_XDTxIQImbalance		0xc98
+#define		rOFDM0_XDTxAFE				0xc9c
+
+#define		rOFDM0_RxIQExtAnta			0xca0
+#define		rOFDM0_TxCoeff1				0xca4
+#define		rOFDM0_TxCoeff2				0xca8
+#define		rOFDM0_TxCoeff3				0xcac
+#define		rOFDM0_TxCoeff4				0xcb0
+#define		rOFDM0_TxCoeff5				0xcb4
+#define		rOFDM0_TxCoeff6				0xcb8
+#define		rOFDM0_RxHPParameter			0xce0
+#define		rOFDM0_TxPseudoNoiseWgt		0xce4
+#define		rOFDM0_FrameSync				0xcf0
+#define		rOFDM0_DFSReport				0xcf4
+
+/*
+ * 7. PageD(0xD00)
+ *   */
+#define		rOFDM1_LSTF					0xd00
+#define		rOFDM1_TRxPathEnable			0xd04
+
+#define		rOFDM1_CFO						0xd08	/* No setting now */
+#define		rOFDM1_CSI1					0xd10
+#define		rOFDM1_SBD						0xd14
+#define		rOFDM1_CSI2					0xd18
+#define		rOFDM1_CFOTracking			0xd2c
+#define		rOFDM1_TRxMesaure1			0xd34
+#define		rOFDM1_IntfDet					0xd3c
+#define		rOFDM1_PseudoNoiseStateAB		0xd50
+#define		rOFDM1_PseudoNoiseStateCD		0xd54
+#define		rOFDM1_RxPseudoNoiseWgt		0xd58
+
+#define		rOFDM_PHYCounter1				0xda0  /* cca, parity fail */
+#define		rOFDM_PHYCounter2				0xda4  /* rate illegal, crc8 fail */
+#define		rOFDM_PHYCounter3				0xda8  /* MCS not support */
+
+#define		rOFDM_ShortCFOAB				0xdac	/* No setting now */
+#define		rOFDM_ShortCFOCD				0xdb0
+#define		rOFDM_LongCFOAB				0xdb4
+#define		rOFDM_LongCFOCD				0xdb8
+#define		rOFDM_TailCFOAB				0xdbc
+#define		rOFDM_TailCFOCD				0xdc0
+#define		rOFDM_PWMeasure1		0xdc4
+#define		rOFDM_PWMeasure2		0xdc8
+#define		rOFDM_BWReport				0xdcc
+#define		rOFDM_AGCReport				0xdd0
+#define		rOFDM_RxSNR					0xdd4
+#define		rOFDM_RxEVMCSI				0xdd8
+#define		rOFDM_SIGReport				0xddc
+
+
+/*
+ * 8. PageE(0xE00)
+ *   */
+#define		rTxAGC_A_Rate18_06			0xe00
+#define		rTxAGC_A_Rate54_24			0xe04
+#define		rTxAGC_A_CCK1_Mcs32			0xe08
+#define		rTxAGC_A_Mcs03_Mcs00			0xe10
+#define		rTxAGC_A_Mcs07_Mcs04			0xe14
+#define		rTxAGC_A_Mcs11_Mcs08			0xe18
+#define		rTxAGC_A_Mcs15_Mcs12			0xe1c
+
+#define		rFPGA0_IQK					0xe28
+#define		rTx_IQK_Tone_A				0xe30
+#define		rRx_IQK_Tone_A				0xe34
+#define		rTx_IQK_PI_A					0xe38
+#define		rRx_IQK_PI_A					0xe3c
+
+#define		rTx_IQK						0xe40
+#define		rRx_IQK						0xe44
+#define		rIQK_AGC_Pts					0xe48
+#define		rIQK_AGC_Rsp					0xe4c
+#define		rTx_IQK_Tone_B				0xe50
+#define		rRx_IQK_Tone_B				0xe54
+#define		rTx_IQK_PI_B					0xe58
+#define		rRx_IQK_PI_B					0xe5c
+#define		rIQK_AGC_Cont				0xe60
+
+#define		rBlue_Tooth					0xe6c
+#define		rRx_Wait_CCA					0xe70
+#define		rTx_CCK_RFON					0xe74
+#define		rTx_CCK_BBON				0xe78
+#define		rTx_OFDM_RFON				0xe7c
+#define		rTx_OFDM_BBON				0xe80
+#define		rTx_To_Rx					0xe84
+#define		rTx_To_Tx					0xe88
+#define		rRx_CCK						0xe8c
+
+#define		rTx_Power_Before_IQK_A		0xe94
+#define		rTx_Power_After_IQK_A			0xe9c
+
+#define		rRx_Power_Before_IQK_A		0xea0
+#define		rRx_Power_Before_IQK_A_2		0xea4
+#define		rRx_Power_After_IQK_A			0xea8
+#define		rRx_Power_After_IQK_A_2		0xeac
+
+#define		rTx_Power_Before_IQK_B		0xeb4
+#define		rTx_Power_After_IQK_B			0xebc
+
+#define		rRx_Power_Before_IQK_B		0xec0
+#define		rRx_Power_Before_IQK_B_2		0xec4
+#define		rRx_Power_After_IQK_B			0xec8
+#define		rRx_Power_After_IQK_B_2		0xecc
+
+#define		rRx_OFDM					0xed0
+#define		rRx_Wait_RIFS				0xed4
+#define		rRx_TO_Rx					0xed8
+#define		rStandby						0xedc
+#define		rSleep						0xee0
+#define		rPMPD_ANAEN				0xeec
+
+/*
+ * 7. RF Register 0x00-0x2E (RF 8256)
+ * RF-0222D 0x00-3F
+ *
+ * Zebra1 */
+#define		rZebra1_HSSIEnable				0x0	/* Useless now */
+#define		rZebra1_TRxEnable1				0x1
+#define		rZebra1_TRxEnable2				0x2
+#define		rZebra1_AGC					0x4
+#define		rZebra1_ChargePump			0x5
+#define		rZebra1_Channel				0x7	/* RF channel switch */
+
+/* #endif */
+#define		rZebra1_TxGain					0x8	/* Useless now */
+#define		rZebra1_TxLPF					0x9
+#define		rZebra1_RxLPF					0xb
+#define		rZebra1_RxHPFCorner			0xc
+
+/* Zebra4 */
+#define		rGlobalCtrl						0	/* Useless now */
+#define		rRTL8256_TxLPF					19
+#define		rRTL8256_RxLPF					11
+
+/* RTL8258 */
+#define		rRTL8258_TxLPF					0x11	/* Useless now */
+#define		rRTL8258_RxLPF					0x13
+#define		rRTL8258_RSSILPF				0xa
+
+/*
+ * RL6052 Register definition
+ *   */
+#define		RF_AC						0x00	/* */
+
+#define		RF_IQADJ_G1				0x01	/* */
+#define		RF_IQADJ_G2				0x02	/* */
+#define		RF_BS_PA_APSET_G1_G4		0x03
+#define		RF_BS_PA_APSET_G5_G8		0x04
+#define		RF_POW_TRSW				0x05	/* */
+
+#define		RF_GAIN_RX					0x06	/* */
+#define		RF_GAIN_TX					0x07	/* */
+
+#define		RF_TXM_IDAC				0x08	/* */
+#define		RF_IPA_G					0x09	/* */
+#define		RF_TXBIAS_G				0x0A
+#define		RF_TXPA_AG					0x0B
+#define		RF_IPA_A					0x0C	/* */
+#define		RF_TXBIAS_A				0x0D
+#define		RF_BS_PA_APSET_G9_G11	0x0E
+#define		RF_BS_IQGEN				0x0F	/* */
+
+#define		RF_MODE1					0x10	/* */
+#define		RF_MODE2					0x11	/* */
+
+#define		RF_RX_AGC_HP				0x12	/* */
+#define		RF_TX_AGC					0x13	/* */
+#define		RF_BIAS						0x14	/* */
+#define		RF_IPA						0x15	/* */
+#define		RF_TXBIAS					0x16
+#define		RF_POW_ABILITY			0x17	/* */
+#define		RF_MODE_AG				0x18	/* */
+#define		rRfChannel					0x18	/* RF channel and BW switch */
+#define		RF_CHNLBW					0x18	/* RF channel and BW switch */
+#define		RF_TOP						0x19	/* */
+
+#define		RF_RX_G1					0x1A	/* */
+#define		RF_RX_G2					0x1B	/* */
+
+#define		RF_RX_BB2					0x1C	/* */
+#define		RF_RX_BB1					0x1D	/* */
+
+#define		RF_RCK1					0x1E	/* */
+#define		RF_RCK2					0x1F	/* */
+
+#define		RF_TX_G1					0x20	/* */
+#define		RF_TX_G2					0x21	/* */
+#define		RF_TX_G3					0x22	/* */
+
+#define		RF_TX_BB1					0x23	/* */
+
+#define		RF_T_METER					0x24	/* */
+
+#define		RF_SYN_G1					0x25	/* RF TX Power control */
+#define		RF_SYN_G2					0x26	/* RF TX Power control */
+#define		RF_SYN_G3					0x27	/* RF TX Power control */
+#define		RF_SYN_G4					0x28	/* RF TX Power control */
+#define		RF_SYN_G5					0x29	/* RF TX Power control */
+#define		RF_SYN_G6					0x2A	/* RF TX Power control */
+#define		RF_SYN_G7					0x2B	/* RF TX Power control */
+#define		RF_SYN_G8					0x2C	/* RF TX Power control */
+
+#define		RF_RCK_OS					0x30	/* RF TX PA control */
+
+#define		RF_TXPA_G1					0x31	/* RF TX PA control */
+#define		RF_TXPA_G2					0x32	/* RF TX PA control */
+#define		RF_TXPA_G3					0x33	/* RF TX PA control */
+#define	RF_TX_BIAS_A				0x35
+#define	RF_TX_BIAS_D				0x36
+#define	RF_LOBF_9					0x38
+#define	RF_RXRF_A3					0x3C	/*	 */
+#define	RF_TRSW					0x3F
+
+#define	RF_TXRF_A2					0x41
+#define	RF_T_METER_88E				0x42
+#define	RF_TXPA_G4					0x46
+#define	RF_TXPA_A4					0x4B
+#define	RF_0x52					0x52
+#define	RF_WE_LUT					0xEF
+#define	RF_S0S1					0xB0
+
+/*
+ * Bit Mask
+ *
+ * 1. Page1(0x100) */
+#define		bBBResetB						0x100	/* Useless now? */
+#define		bGlobalResetB					0x200
+#define		bOFDMTxStart					0x4
+#define		bCCKTxStart						0x8
+#define		bCRC32Debug					0x100
+#define		bPMACLoopback					0x10
+#define		bTxLSIG							0xffffff
+#define		bOFDMTxRate					0xf
+#define		bOFDMTxReserved				0x10
+#define		bOFDMTxLength					0x1ffe0
+#define		bOFDMTxParity					0x20000
+#define		bTxHTSIG1						0xffffff
+#define		bTxHTMCSRate					0x7f
+#define		bTxHTBW						0x80
+#define		bTxHTLength					0xffff00
+#define		bTxHTSIG2						0xffffff
+#define		bTxHTSmoothing					0x1
+#define		bTxHTSounding					0x2
+#define		bTxHTReserved					0x4
+#define		bTxHTAggreation				0x8
+#define		bTxHTSTBC						0x30
+#define		bTxHTAdvanceCoding			0x40
+#define		bTxHTShortGI					0x80
+#define		bTxHTNumberHT_LTF			0x300
+#define		bTxHTCRC8						0x3fc00
+#define		bCounterReset					0x10000
+#define		bNumOfOFDMTx					0xffff
+#define		bNumOfCCKTx					0xffff0000
+#define		bTxIdleInterval					0xffff
+#define		bOFDMService					0xffff0000
+#define		bTxMACHeader					0xffffffff
+#define		bTxDataInit						0xff
+#define		bTxHTMode						0x100
+#define		bTxDataType					0x30000
+#define		bTxRandomSeed					0xffffffff
+#define		bCCKTxPreamble					0x1
+#define		bCCKTxSFD						0xffff0000
+#define		bCCKTxSIG						0xff
+#define		bCCKTxService					0xff00
+#define		bCCKLengthExt					0x8000
+#define		bCCKTxLength					0xffff0000
+#define		bCCKTxCRC16					0xffff
+#define		bCCKTxStatus					0x1
+#define		bOFDMTxStatus					0x2
+
+#define		IS_BB_REG_OFFSET_92S(_Offset)		((_Offset >= 0x800) && (_Offset <= 0xfff))
+#define		RF_TX_GAIN_OFFSET_8710B(_val) (abs((_val)) | (((_val) > 0) ? BIT(4) : 0))
+
+/* 2. Page8(0x800) */
+#define		bRFMOD							0x1	/* Reg 0x800 rFPGA0_RFMOD */
+#define		bJapanMode						0x2
+#define		bCCKTxSC						0x30
+#define		bCCKEn							0x1000000
+#define		bOFDMEn						0x2000000
+
+#define		bOFDMRxADCPhase           0x10000	/* Useless now */
+#define		bOFDMTxDACPhase		0x40000
+#define		bXATxAGC			0x3f
+
+#define		bAntennaSelect		0x0300
+
+#define		bXBTxAGC                 0xf00	/* Reg 80c rFPGA0_TxGainStage */
+#define		bXCTxAGC			0xf000
+#define		bXDTxAGC			0xf0000
+
+#define		bPAStart                 0xf0000000	/* Useless now */
+#define		bTRStart			0x00f00000
+#define		bRFStart			0x0000f000
+#define		bBBStart			0x000000f0
+#define		bBBCCKStart		0x0000000f
+#define		bPAEnd                    0xf          /* Reg0x814 */
+#define		bTREnd			0x0f000000
+#define		bRFEnd			0x000f0000
+#define		bCCAMask                  0x000000f0   /* T2R */
+#define		bR2RCCAMask		0x00000f00
+#define		bHSSI_R2TDelay		0xf8000000
+#define		bHSSI_T2RDelay		0xf80000
+#define		bContTxHSSI              0x400     /* chane gain at continue Tx */
+#define		bIGFromCCK		0x200
+#define		bAGCAddress		0x3f
+#define		bRxHPTx			0x7000
+#define		bRxHPT2R			0x38000
+#define		bRxHPCCKIni		0xc0000
+#define		bAGCTxCode		0xc00000
+#define		bAGCRxCode		0x300000
+
+#define		b3WireDataLength         0x800	/* Reg 0x820~84f rFPGA0_XA_HSSIParameter1 */
+#define		b3WireAddressLength		0x400
+
+#define		b3WireRFPowerDown         0x1	/* Useless now
+ * #define bHWSISelect		0x8 */
+#define		b5GPAPEPolarity		0x40000000
+#define		b2GPAPEPolarity		0x80000000
+#define		bRFSW_TxDefaultAnt		0x3
+#define		bRFSW_TxOptionAnt		0x30
+#define		bRFSW_RxDefaultAnt		0x300
+#define		bRFSW_RxOptionAnt		0x3000
+#define		bRFSI_3WireData		0x1
+#define		bRFSI_3WireClock		0x2
+#define		bRFSI_3WireLoad		0x4
+#define		bRFSI_3WireRW		0x8
+#define		bRFSI_3Wire			0xf
+
+#define		bRFSI_RFENV              0x10	/* Reg 0x870 rFPGA0_XAB_RFInterfaceSW */
+
+#define		bRFSI_TRSW               0x20	/* Useless now */
+#define		bRFSI_TRSWB		0x40
+#define		bRFSI_ANTSW		0x100
+#define		bRFSI_ANTSWB		0x200
+#define		bRFSI_PAPE			0x400
+#define		bRFSI_PAPE5G		0x800
+#define		bBandSelect			0x1
+#define		bHTSIG2_GI			0x80
+#define		bHTSIG2_Smoothing		0x01
+#define		bHTSIG2_Sounding		0x02
+#define		bHTSIG2_Aggreaton		0x08
+#define		bHTSIG2_STBC		0x30
+#define		bHTSIG2_AdvCoding		0x40
+#define		bHTSIG2_NumOfHTLTF	0x300
+#define		bHTSIG2_CRC8		0x3fc
+#define		bHTSIG1_MCS		0x7f
+#define		bHTSIG1_BandWidth		0x80
+#define		bHTSIG1_HTLength		0xffff
+#define		bLSIG_Rate			0xf
+#define		bLSIG_Reserved		0x10
+#define		bLSIG_Length		0x1fffe
+#define		bLSIG_Parity			0x20
+#define		bCCKRxPhase		0x4
+
+#define		bLSSIReadAddress          0x7f800000   /* T65 RF */
+
+#define		bLSSIReadEdge             0x80000000   /* LSSI "Read" edge signal */
+
+#define		bLSSIReadBackData         0xfffff		/* T65 RF */
+
+#define		bLSSIReadOKFlag           0x1000	/* Useless now */
+#define		bCCKSampleRate            0x8       /* 0: 44MHz, 1:88MHz     */
+#define		bRegulator0Standby		0x1
+#define		bRegulatorPLLStandby		0x2
+#define		bRegulator1Standby		0x4
+#define		bPLLPowerUp		0x8
+#define		bDPLLPowerUp		0x10
+#define		bDA10PowerUp		0x20
+#define		bAD7PowerUp		0x200
+#define		bDA6PowerUp		0x2000
+#define		bXtalPowerUp		0x4000
+#define		b40MDClkPowerUP		0x8000
+#define		bDA6DebugMode		0x20000
+#define		bDA6Swing			0x380000
+
+#define		bADClkPhase               0x4000000	/* Reg 0x880 rFPGA0_AnalogParameter1 20/40 CCK support switch 40/80 BB MHZ */
+
+#define		b80MClkDelay              0x18000000	/* Useless */
+#define		bAFEWatchDogEnable		0x20000000
+
+#define		bXtalCap01                0xc0000000	/* Reg 0x884 rFPGA0_AnalogParameter2 Crystal cap */
+#define		bXtalCap23			0x3
+#define		bXtalCap92x					0x0f000000
+#define		bXtalCap			0x0f000000
+
+#define		bIntDifClkEnable          0x400	/* Useless */
+#define		bExtSigClkEnable		0x800
+#define		bBandgapMbiasPowerUp	0x10000
+#define		bAD11SHGain		0xc0000
+#define		bAD11InputRange		0x700000
+#define		bAD11OPCurrent		0x3800000
+#define		bIPathLoopback		0x4000000
+#define		bQPathLoopback		0x8000000
+#define		bAFELoopback		0x10000000
+#define		bDA10Swing		0x7e0
+#define		bDA10Reverse		0x800
+#define		bDAClkSource		0x1000
+#define		bAD7InputRange		0x6000
+#define		bAD7Gain			0x38000
+#define		bAD7OutputCMMode		0x40000
+#define		bAD7InputCMMode		0x380000
+#define		bAD7Current			0xc00000
+#define		bRegulatorAdjust		0x7000000
+#define		bAD11PowerUpAtTx		0x1
+#define		bDA10PSAtTx		0x10
+#define		bAD11PowerUpAtRx		0x100
+#define		bDA10PSAtRx		0x1000
+#define		bCCKRxAGCFormat		0x200
+#define		bPSDFFTSamplepPoint		0xc000
+#define		bPSDAverageNum		0x3000
+#define		bIQPathControl		0xc00
+#define		bPSDFreq			0x3ff
+#define		bPSDAntennaPath		0x30
+#define		bPSDIQSwitch		0x40
+#define		bPSDRxTrigger		0x400000
+#define		bPSDTxTrigger		0x80000000
+#define		bPSDSineToneScale		0x7f000000
+#define		bPSDReport			0xffff
+
+/* 3. Page9(0x900) */
+#define		bOFDMTxSC                 0x30000000	/* Useless */
+#define		bCCKTxOn			0x1
+#define		bOFDMTxOn		0x2
+#define		bDebugPage                0xfff  /* reset debug page and also HWord, LWord */
+#define		bDebugItem                0xff   /* reset debug page and LWord */
+#define		bAntL			0x10
+#define		bAntNonHT				0x100
+#define		bAntHT1			0x1000
+#define		bAntHT2			0x10000
+#define		bAntHT1S1			0x100000
+#define		bAntNonHTS1		0x1000000
+
+/* 4. PageA(0xA00) */
+#define		bCCKBBMode				0x3	/* Useless */
+#define		bCCKTxPowerSaving		0x80
+#define		bCCKRxPowerSaving		0x40
+
+#define		bCCKSideBand			0x10	/* Reg 0xa00 rCCK0_System 20/40 switch */
+
+#define		bCCKScramble			0x8	/* Useless */
+#define		bCCKAntDiversity		0x8000
+#define		bCCKCarrierRecovery		0x4000
+#define		bCCKTxRate				0x3000
+#define		bCCKDCCancel			0x0800
+#define		bCCKISICancel			0x0400
+#define		bCCKMatchFilter			0x0200
+#define		bCCKEqualizer			0x0100
+#define		bCCKPreambleDetect		0x800000
+#define		bCCKFastFalseCCA		0x400000
+#define		bCCKChEstStart			0x300000
+#define		bCCKCCACount			0x080000
+#define		bCCKcs_lim				0x070000
+#define		bCCKBistMode			0x80000000
+#define		bCCKCCAMask			0x40000000
+#define		bCCKTxDACPhase		0x4
+#define		bCCKRxADCPhase		0x20000000   /* r_rx_clk */
+#define		bCCKr_cp_mode0		0x0100
+#define		bCCKTxDCOffset			0xf0
+#define		bCCKRxDCOffset			0xf
+#define		bCCKCCAMode			0xc000
+#define		bCCKFalseCS_lim			0x3f00
+#define		bCCKCS_ratio			0xc00000
+#define		bCCKCorgBit_sel			0x300000
+#define		bCCKPD_lim				0x0f0000
+#define		bCCKNewCCA			0x80000000
+#define		bCCKRxHPofIG			0x8000
+#define		bCCKRxIG				0x7f00
+#define		bCCKLNAPolarity			0x800000
+#define		bCCKRx1stGain			0x7f0000
+#define		bCCKRFExtend			0x20000000 /* CCK Rx Iinital gain polarity */
+#define		bCCKRxAGCSatLevel		0x1f000000
+#define		bCCKRxAGCSatCount		0xe0
+#define		bCCKRxRFSettle			0x1f       /* AGCsamp_dly */
+#define		bCCKFixedRxAGC			0x8000
+/* #define bCCKRxAGCFormat		0x4000 */   /* remove to HSSI register 0x824 */
+#define		bCCKAntennaPolarity		0x2000
+#define		bCCKTxFilterType		0x0c00
+#define		bCCKRxAGCReportType	0x0300
+#define		bCCKRxDAGCEn			0x80000000
+#define		bCCKRxDAGCPeriod		0x20000000
+#define		bCCKRxDAGCSatLevel		0x1f000000
+#define		bCCKTimingRecovery		0x800000
+#define		bCCKTxC0				0x3f0000
+#define		bCCKTxC1				0x3f000000
+#define		bCCKTxC2				0x3f
+#define		bCCKTxC3				0x3f00
+#define		bCCKTxC4				0x3f0000
+#define		bCCKTxC5				0x3f000000
+#define		bCCKTxC6				0x3f
+#define		bCCKTxC7				0x3f00
+#define		bCCKDebugPort			0xff0000
+#define		bCCKDACDebug			0x0f000000
+#define		bCCKFalseAlarmEnable	0x8000
+#define		bCCKFalseAlarmRead		0x4000
+#define		bCCKTRSSI				0x7f
+#define		bCCKRxAGCReport		0xfe
+#define		bCCKRxReport_AntSel	0x80000000
+#define		bCCKRxReport_MFOff		0x40000000
+#define		bCCKRxRxReport_SQLoss	0x20000000
+#define		bCCKRxReport_Pktloss	0x10000000
+#define		bCCKRxReport_Lockedbit	0x08000000
+#define		bCCKRxReport_RateError	0x04000000
+#define		bCCKRxReport_RxRate	0x03000000
+#define		bCCKRxFACounterLower	0xff
+#define		bCCKRxFACounterUpper	0xff000000
+#define		bCCKRxHPAGCStart		0xe000
+#define		bCCKRxHPAGCFinal		0x1c00
+#define		bCCKRxFalseAlarmEnable	0x8000
+#define		bCCKFACounterFreeze	0x4000
+#define		bCCKTxPathSel			0x10000000
+#define		bCCKDefaultRxPath		0xc000000
+#define		bCCKOptionRxPath		0x3000000
+
+/* 5. PageC(0xC00) */
+#define		bNumOfSTF				0x3	/* Useless */
+#define		bShift_L					0xc0
+#define		bGI_TH					0xc
+#define		bRxPathA				0x1
+#define		bRxPathB				0x2
+#define		bRxPathC				0x4
+#define		bRxPathD				0x8
+#define		bTxPathA				0x1
+#define		bTxPathB				0x2
+#define		bTxPathC				0x4
+#define		bTxPathD				0x8
+#define		bTRSSIFreq				0x200
+#define		bADCBackoff				0x3000
+#define		bDFIRBackoff			0xc000
+#define		bTRSSILatchPhase		0x10000
+#define		bRxIDCOffset			0xff
+#define		bRxQDCOffset			0xff00
+#define		bRxDFIRMode			0x1800000
+#define		bRxDCNFType			0xe000000
+#define		bRXIQImb_A				0x3ff
+#define		bRXIQImb_B				0xfc00
+#define		bRXIQImb_C				0x3f0000
+#define		bRXIQImb_D				0xffc00000
+#define		bDC_dc_Notch			0x60000
+#define		bRxNBINotch			0x1f000000
+#define		bPD_TH					0xf
+#define		bPD_TH_Opt2			0xc000
+#define		bPWED_TH				0x700
+#define		bIfMF_Win_L			0x800
+#define		bPD_Option				0x1000
+#define		bMF_Win_L				0xe000
+#define		bBW_Search_L			0x30000
+#define		bwin_enh_L				0xc0000
+#define		bBW_TH					0x700000
+#define		bED_TH2				0x3800000
+#define		bBW_option				0x4000000
+#define		bRatio_TH				0x18000000
+#define		bWindow_L				0xe0000000
+#define		bSBD_Option				0x1
+#define		bFrame_TH				0x1c
+#define		bFS_Option				0x60
+#define		bDC_Slope_check		0x80
+#define		bFGuard_Counter_DC_L	0xe00
+#define		bFrame_Weight_Short	0x7000
+#define		bSub_Tune				0xe00000
+#define		bFrame_DC_Length		0xe000000
+#define		bSBD_start_offset		0x30000000
+#define		bFrame_TH_2			0x7
+#define		bFrame_GI2_TH			0x38
+#define		bGI2_Sync_en			0x40
+#define		bSarch_Short_Early		0x300
+#define		bSarch_Short_Late		0xc00
+#define		bSarch_GI2_Late		0x70000
+#define		bCFOAntSum				0x1
+#define		bCFOAcc				0x2
+#define		bCFOStartOffset			0xc
+#define		bCFOLookBack			0x70
+#define		bCFOSumWeight			0x80
+#define		bDAGCEnable			0x10000
+#define		bTXIQImb_A				0x3ff
+#define		bTXIQImb_B				0xfc00
+#define		bTXIQImb_C				0x3f0000
+#define		bTXIQImb_D				0xffc00000
+#define		bTxIDCOffset			0xff
+#define		bTxQDCOffset			0xff00
+#define		bTxDFIRMode			0x10000
+#define		bTxPesudoNoiseOn		0x4000000
+#define		bTxPesudoNoise_A		0xff
+#define		bTxPesudoNoise_B		0xff00
+#define		bTxPesudoNoise_C		0xff0000
+#define		bTxPesudoNoise_D		0xff000000
+#define		bCCADropOption			0x20000
+#define		bCCADropThres			0xfff00000
+#define		bEDCCA_H				0xf
+#define		bEDCCA_L				0xf0
+#define		bLambda_ED			0x300
+#define		bRxInitialGain			0x7f
+#define		bRxAntDivEn				0x80
+#define		bRxAGCAddressForLNA	0x7f00
+#define		bRxHighPowerFlow		0x8000
+#define		bRxAGCFreezeThres		0xc0000
+#define		bRxFreezeStep_AGC1	0x300000
+#define		bRxFreezeStep_AGC2	0xc00000
+#define		bRxFreezeStep_AGC3	0x3000000
+#define		bRxFreezeStep_AGC0	0xc000000
+#define		bRxRssi_Cmp_En			0x10000000
+#define		bRxQuickAGCEn			0x20000000
+#define		bRxAGCFreezeThresMode	0x40000000
+#define		bRxOverFlowCheckType	0x80000000
+#define		bRxAGCShift				0x7f
+#define		bTRSW_Tri_Only			0x80
+#define		bPowerThres			0x300
+#define		bRxAGCEn				0x1
+#define		bRxAGCTogetherEn		0x2
+#define		bRxAGCMin				0x4
+#define		bRxHP_Ini				0x7
+#define		bRxHP_TRLNA			0x70
+#define		bRxHP_RSSI				0x700
+#define		bRxHP_BBP1				0x7000
+#define		bRxHP_BBP2				0x70000
+#define		bRxHP_BBP3				0x700000
+#define		bRSSI_H					0x7f0000     /* the threshold for high power */
+#define		bRSSI_Gen				0x7f000000   /* the threshold for ant diversity */
+#define		bRxSettle_TRSW			0x7
+#define		bRxSettle_LNA			0x38
+#define		bRxSettle_RSSI			0x1c0
+#define		bRxSettle_BBP			0xe00
+#define		bRxSettle_RxHP			0x7000
+#define		bRxSettle_AntSW_RSSI	0x38000
+#define		bRxSettle_AntSW		0xc0000
+#define		bRxProcessTime_DAGC	0x300000
+#define		bRxSettle_HSSI			0x400000
+#define		bRxProcessTime_BBPPW	0x800000
+#define		bRxAntennaPowerShift	0x3000000
+#define		bRSSITableSelect		0xc000000
+#define		bRxHP_Final				0x7000000
+#define		bRxHTSettle_BBP			0x7
+#define		bRxHTSettle_HSSI		0x8
+#define		bRxHTSettle_RxHP		0x70
+#define		bRxHTSettle_BBPPW		0x80
+#define		bRxHTSettle_Idle		0x300
+#define		bRxHTSettle_Reserved	0x1c00
+#define		bRxHTRxHPEn			0x8000
+#define		bRxHTAGCFreezeThres	0x30000
+#define		bRxHTAGCTogetherEn	0x40000
+#define		bRxHTAGCMin			0x80000
+#define		bRxHTAGCEn				0x100000
+#define		bRxHTDAGCEn			0x200000
+#define		bRxHTRxHP_BBP			0x1c00000
+#define		bRxHTRxHP_Final		0xe0000000
+#define		bRxPWRatioTH			0x3
+#define		bRxPWRatioEn			0x4
+#define		bRxMFHold				0x3800
+#define		bRxPD_Delay_TH1		0x38
+#define		bRxPD_Delay_TH2		0x1c0
+#define		bRxPD_DC_COUNT_MAX	0x600
+/* #define bRxMF_Hold               0x3800 */
+#define		bRxPD_Delay_TH			0x8000
+#define		bRxProcess_Delay		0xf0000
+#define		bRxSearchrange_GI2_Early	0x700000
+#define		bRxFrame_Guard_Counter_L	0x3800000
+#define		bRxSGI_Guard_L			0xc000000
+#define		bRxSGI_Search_L		0x30000000
+#define		bRxSGI_TH				0xc0000000
+#define		bDFSCnt0				0xff
+#define		bDFSCnt1				0xff00
+#define		bDFSFlag				0xf0000
+#define		bMFWeightSum			0x300000
+#define		bMinIdxTH				0x7f000000
+#define		bDAFormat				0x40000
+#define		bTxChEmuEnable		0x01000000
+#define		bTRSWIsolation_A		0x7f
+#define		bTRSWIsolation_B		0x7f00
+#define		bTRSWIsolation_C		0x7f0000
+#define		bTRSWIsolation_D		0x7f000000
+#define		bExtLNAGain				0x7c00
+
+/* 6. PageE(0xE00) */
+#define		bSTBCEn				0x4	/* Useless */
+#define		bAntennaMapping		0x10
+#define		bNss					0x20
+#define		bCFOAntSumD			0x200
+#define		bPHYCounterReset		0x8000000
+#define		bCFOReportGet			0x4000000
+#define		bOFDMContinueTx		0x10000000
+#define		bOFDMSingleCarrier		0x20000000
+#define		bOFDMSingleTone		0x40000000
+/* #define bRxPath1                 0x01 */
+/* #define bRxPath2                 0x02 */
+/* #define bRxPath3                 0x04 */
+/* #define bRxPath4                 0x08 */
+/* #define bTxPath1                 0x10 */
+/* #define bTxPath2                 0x20 */
+#define		bHTDetect			0x100
+#define		bCFOEn				0x10000
+#define		bCFOValue			0xfff00000
+#define		bSigTone_Re		0x3f
+#define		bSigTone_Im		0x7f00
+#define		bCounter_CCA		0xffff
+#define		bCounter_ParityFail	0xffff0000
+#define		bCounter_RateIllegal		0xffff
+#define		bCounter_CRC8Fail	0xffff0000
+#define		bCounter_MCSNoSupport	0xffff
+#define		bCounter_FastSync	0xffff
+#define		bShortCFO			0xfff
+#define		bShortCFOTLength	12   /* total */
+#define		bShortCFOFLength	11   /* fraction */
+#define		bLongCFO			0x7ff
+#define		bLongCFOTLength	11
+#define		bLongCFOFLength	11
+#define		bTailCFO			0x1fff
+#define		bTailCFOTLength		13
+#define		bTailCFOFLength		12
+#define		bmax_en_pwdB		0xffff
+#define		bCC_power_dB		0xffff0000
+#define		bnoise_pwdB		0xffff
+#define		bPowerMeasTLength	10
+#define		bPowerMeasFLength	3
+#define		bRx_HT_BW			0x1
+#define		bRxSC				0x6
+#define		bRx_HT				0x8
+#define		bNB_intf_det_on		0x1
+#define		bIntf_win_len_cfg	0x30
+#define		bNB_Intf_TH_cfg		0x1c0
+#define		bRFGain				0x3f
+#define		bTableSel			0x40
+#define		bTRSW				0x80
+#define		bRxSNR_A			0xff
+#define		bRxSNR_B			0xff00
+#define		bRxSNR_C			0xff0000
+#define		bRxSNR_D			0xff000000
+#define		bSNREVMTLength		8
+#define		bSNREVMFLength		1
+#define		bCSI1st				0xff
+#define		bCSI2nd				0xff00
+#define		bRxEVM1st			0xff0000
+#define		bRxEVM2nd			0xff000000
+#define		bSIGEVM			0xff
+#define		bPWDB				0xff00
+#define		bSGIEN				0x10000
+
+#define		bSFactorQAM1		0xf	/* Useless */
+#define		bSFactorQAM2		0xf0
+#define		bSFactorQAM3		0xf00
+#define		bSFactorQAM4		0xf000
+#define		bSFactorQAM5		0xf0000
+#define		bSFactorQAM6		0xf0000
+#define		bSFactorQAM7		0xf00000
+#define		bSFactorQAM8		0xf000000
+#define		bSFactorQAM9		0xf0000000
+#define		bCSIScheme			0x100000
+
+#define		bNoiseLvlTopSet		0x3	/* Useless */
+#define		bChSmooth			0x4
+#define		bChSmoothCfg1		0x38
+#define		bChSmoothCfg2		0x1c0
+#define		bChSmoothCfg3		0xe00
+#define		bChSmoothCfg4		0x7000
+#define		bMRCMode			0x800000
+#define		bTHEVMCfg			0x7000000
+
+#define		bLoopFitType		0x1	/* Useless */
+#define		bUpdCFO			0x40
+#define		bUpdCFOOffData		0x80
+#define		bAdvUpdCFO			0x100
+#define		bAdvTimeCtrl		0x800
+#define		bUpdClko			0x1000
+#define		bFC					0x6000
+#define		bTrackingMode		0x8000
+#define		bPhCmpEnable		0x10000
+#define		bUpdClkoLTF		0x20000
+#define		bComChCFO			0x40000
+#define		bCSIEstiMode		0x80000
+#define		bAdvUpdEqz			0x100000
+#define		bUChCfg				0x7000000
+#define		bUpdEqz			0x8000000
+
+/* Rx Pseduo noise */
+#define		bRxPesudoNoiseOn		0x20000000	/* Useless */
+#define		bRxPesudoNoise_A		0xff
+#define		bRxPesudoNoise_B		0xff00
+#define		bRxPesudoNoise_C		0xff0000
+#define		bRxPesudoNoise_D		0xff000000
+#define		bPesudoNoiseState_A	0xffff
+#define		bPesudoNoiseState_B	0xffff0000
+#define		bPesudoNoiseState_C	0xffff
+#define		bPesudoNoiseState_D	0xffff0000
+
+/* 7. RF Register
+ * Zebra1 */
+#define		bZebra1_HSSIEnable		0x8		/* Useless */
+#define		bZebra1_TRxControl		0xc00
+#define		bZebra1_TRxGainSetting	0x07f
+#define		bZebra1_RxCorner		0xc00
+#define		bZebra1_TxChargePump	0x38
+#define		bZebra1_RxChargePump	0x7
+#define		bZebra1_ChannelNum	0xf80
+#define		bZebra1_TxLPFBW		0x400
+#define		bZebra1_RxLPFBW		0x600
+
+/* Zebra4 */
+#define		bRTL8256RegModeCtrl1	0x100	/* Useless */
+#define		bRTL8256RegModeCtrl0	0x40
+#define		bRTL8256_TxLPFBW		0x18
+#define		bRTL8256_RxLPFBW		0x600
+
+/* RTL8258 */
+#define		bRTL8258_TxLPFBW		0xc	/* Useless */
+#define		bRTL8258_RxLPFBW		0xc00
+#define		bRTL8258_RSSILPFBW	0xc0
+
+
+/*
+ * Other Definition
+ *   */
+
+/* byte endable for sb_write */
+#define		bByte0				0x1	/* Useless */
+#define		bByte1				0x2
+#define		bByte2				0x4
+#define		bByte3				0x8
+#define		bWord0				0x3
+#define		bWord1				0xc
+#define		bDWord				0xf
+
+/* for PutRegsetting & GetRegSetting BitMask */
+#define		bMaskByte0			0xff	/* Reg 0xc50 rOFDM0_XAAGCCore~0xC6f */
+#define		bMaskByte1			0xff00
+#define		bMaskByte2			0xff0000
+#define		bMaskByte3			0xff000000
+#define		bMaskHWord		0xffff0000
+#define		bMaskLWord			0x0000ffff
+#define		bMaskDWord		0xffffffff
+#define		bMaskH3Bytes		0xffffff00
+#define		bMask12Bits			0xfff
+#define		bMaskH4Bits			0xf0000000
+#define		bMaskOFDM_D		0xffc00000
+#define		bMaskCCK			0x3f3f3f3f
+
+
+#define		bEnable			0x1	/* Useless */
+#define		bDisable		0x0
+
+#define		LeftAntenna		0x0	/* Useless */
+#define		RightAntenna	0x1
+
+#define		tCheckTxStatus		500   /* 500ms // Useless */
+#define		tUpdateRxCounter	100   /* 100ms */
+
+#define		rateCCK		0	/* Useless */
+#define		rateOFDM	1
+#define		rateHT		2
+
+/* define Register-End */
+#define		bPMAC_End			0x1ff	/* Useless */
+#define		bFPGAPHY0_End		0x8ff
+#define		bFPGAPHY1_End		0x9ff
+#define		bCCKPHY0_End		0xaff
+#define		bOFDMPHY0_End		0xcff
+#define		bOFDMPHY1_End		0xdff
+
+/* define max debug item in each debug page
+ * #define bMaxItem_FPGA_PHY0        0x9
+ * #define bMaxItem_FPGA_PHY1        0x3
+ * #define bMaxItem_PHY_11B          0x16
+ * #define bMaxItem_OFDM_PHY0        0x29
+ * #define bMaxItem_OFDM_PHY1        0x0 */
+
+#define		bPMACControl		0x0		/* Useless */
+#define		bWMACControl		0x1
+#define		bWNICControl		0x2
+
+#define		PathA			0x0	/* Useless */
+#define		PathB			0x1
+#define		PathC			0x2
+#define		PathD			0x3
+
+#endif
diff --git a/rtl8723DS/include/Hal8710BPwrSeq.h b/rtl8723DS/include/Hal8710BPwrSeq.h
new file mode 100644
index 0000000..31ad29c
--- a/dev/null
+++ b/rtl8723DS/include/Hal8710BPwrSeq.h
@@ -0,0 +1,167 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2016 - 2017 Realtek Corporation.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ *****************************************************************************/
+#ifndef REALTEK_POWER_SEQUENCE_8710B
+#define REALTEK_POWER_SEQUENCE_8710B
+
+/* #include "PwrSeqCmd.h" */
+#include "HalPwrSeqCmd.h"
+
+/*
+	Check document WM-20110607-Paul-RTL8192e_Power_Architecture-R02.vsd
+	There are 6 HW Power States:
+	0: POFF--Power Off
+	1: PDN--Power Down
+	2: CARDEMU--Card Emulation
+	3: ACT--Active Mode
+	4: LPS--Low Power State
+	5: SUS--Suspend
+
+	The transition from different states are defined below
+	TRANS_CARDEMU_TO_ACT
+	TRANS_ACT_TO_CARDEMU
+	TRANS_CARDEMU_TO_SUS
+	TRANS_SUS_TO_CARDEMU
+	TRANS_CARDEMU_TO_PDN
+	TRANS_ACT_TO_LPS
+	TRANS_LPS_TO_ACT
+
+	TRANS_END
+*/
+#define RTL8710B_TRANS_CARDEMU_TO_ACT_STEPS 5
+#define RTL8710B_TRANS_ACT_TO_CARDEMU_STEPS 4
+#define RTL8710B_TRANS_CARDEMU_TO_SUS_STEPS 7
+#define RTL8710B_TRANS_SUS_TO_CARDEMU_STEPS 15
+#define RTL8710B_TRANS_CARDEMU_TO_PDN_STEPS 15
+#define RTL8710B_TRANS_PDN_TO_CARDEMU_STEPS 15
+#define RTL8710B_TRANS_ACT_TO_LPS_STEPS 	15
+#define RTL8710B_TRANS_LPS_TO_ACT_STEPS 	15	
+#define RTL8710B_TRANS_ACT_TO_SWLPS_STEPS		22
+#define RTL8710B_TRANS_SWLPS_TO_ACT_STEPS		15
+#define RTL8710B_TRANS_END_STEPS		1
+
+
+#define RTL8710B_TRANS_CARDEMU_TO_ACT 														\
+	/* format */																\
+	/* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/								\
+	{0x005D, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0, 0},/*AFE power mode selection:1:  LDO mode ,0:  Power-cut mode*/\
+	{0x0004, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0, 1},\
+	{0x0056, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x0E},\
+	{0x0020, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0, 1},\
+	{0x0020, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_POLLING, BIT0, 0},/**/ 
+
+	
+#define RTL8710B_TRANS_ACT_TO_CARDEMU													\
+	/* format */																\
+	/* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/								\
+	/*{0x001F, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0}, */ /*0x1F[7:0] = 0 turn off RF*/	\
+	{0x0007, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, (BIT0|BIT1|BIT2), 0},/*0x04[24:26] = 0 turn off RF*/	\
+	{0x0006, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, (BIT0|BIT1), 0},/*0x04[16:17] = 0 BB reset*/	\
+	{0x0020, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT1, BIT1}, /*0x20[1] = 1 turn off MAC by HW state machine*/	\
+	{0x0020, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_POLLING, BIT1, 0}, /*wait till 0x20[1] = 0 polling until return 0 to disable*/ \
+
+
+#define RTL8710B_TRANS_CARDEMU_TO_SUS													\
+	/* format */																\
+	/* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/								\
+	{0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT4|BIT3, (BIT4|BIT3)}, /*0x04[12:11] = 2b'11 enable WL suspend for PCIe*/ \
+	{0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK|PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT3|BIT4, BIT3}, /*0x04[12:11] = 2b'01 enable WL suspend*/	\
+	{0x0023, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT4, BIT4}, /*0x23[4] = 1b'1 12H LDO enter sleep mode*/	\
+	{0x0007, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x20}, /*0x07[7:0] = 0x20 SDIO SOP option to disable BG/MB/ACK/SWR*/   \
+	{0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT3|BIT4, BIT3|BIT4}, /*0x04[12:11] = 2b'11 enable WL suspend for PCIe*/	\
+	{0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_SDIO,PWR_CMD_WRITE, BIT0, BIT0}, /*Set SDIO suspend local register*/	\
+	{0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_SDIO,PWR_CMD_POLLING, BIT1, 0}, /*wait power state to suspend*/
+
+#define RTL8710B_TRANS_SUS_TO_CARDEMU													\
+	/* format */																\
+	/* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/								\
+	{0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT3 | BIT7, 0}, /*clear suspend enable and power down enable*/ \
+	{0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_SDIO,PWR_CMD_WRITE, BIT0, 0}, /*Set SDIO suspend local register*/ \
+	{0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_SDIO,PWR_CMD_POLLING, BIT1, BIT1}, /*wait power state to suspend*/\
+	{0x0023, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT4, 0}, /*0x23[4] = 1b'0 12H LDO enter normal mode*/   \
+	{0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT3|BIT4, 0}, /*0x04[12:11] = 2b'01enable WL suspend*/
+	
+
+#define RTL8710B_TRANS_CARDEMU_TO_CARDDIS													\
+	/* format */																\
+	/* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/	\
+
+#define RTL8710B_TRANS_CARDDIS_TO_CARDEMU													\
+	/* format */																\
+	/* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/								\
+
+
+#define RTL8710B_TRANS_CARDEMU_TO_PDN												\
+	/* format */																\
+	/* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/								\
+	{0x0023, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT4, BIT4}, /*0x23[4] = 1b'1 12H LDO enter sleep mode*/	\
+	{0x0007, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK|PWR_INTF_USB_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x20}, /*0x07[7:0] = 0x20 SOP option to disable BG/MB/ACK/SWR*/   \
+	{0x0006, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0, 0},/* 0x04[16] = 0*/\
+	{0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT7, BIT7},/* 0x04[15] = 1*/
+
+#define RTL8710B_TRANS_PDN_TO_CARDEMU												\
+	/* format */																\
+	/* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/								\
+	{0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT7, 0},/* 0x04[15] = 0*/
+
+#define RTL8710B_TRANS_ACT_TO_LPS														\
+	/* format */																\
+	/* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/								\
+	{0x0301, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0xFF},/*PCIe DMA stop*/	\
+	{0x0522, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0xFF},/*Tx Pause*/	\
+	{0x05F8, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_POLLING, 0xFF, 0},/*Should be zero if no packet is transmitting*/	\
+	{0x05F9, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_POLLING, 0xFF, 0},/*Should be zero if no packet is transmitting*/	\
+	{0x05FA, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_POLLING, 0xFF, 0},/*Should be zero if no packet is transmitting*/	\
+	{0x05FB, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_POLLING, 0xFF, 0},/*Should be zero if no packet is transmitting*/	\
+	{0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0, 0},/*CCK and OFDM are disabled,and clock are gated*/	\
+	{0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_DELAY, 0, PWRSEQ_DELAY_US},/*Delay 1us*/	\
+	{0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT1, 0},/*Whole BB is reset*/	\
+	{0x0100, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x03},/*Reset MAC TRX*/	\
+	{0x0101, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT1, 0},/*check if removed later*/ \
+	{0x0093, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x00},/*When driver enter Sus/ Disable, enable LOP for BT*/	\
+	{0x0553, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT5, BIT5},/*Respond TxOK to scheduler*/	
+
+
+#define RTL8710B_TRANS_LPS_TO_ACT															\
+	/* format */																\
+	/* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/								\
+	{0x0080, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_SDIO,PWR_CMD_WRITE, 0xFF, 0x84}, /*SDIO RPWM*/\
+	{0xFE58, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x84}, /*USB RPWM*/\
+	{0x0361, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x84}, /*PCIe RPWM*/\
+	{0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_DELAY, 0, PWRSEQ_DELAY_MS}, /*Delay*/\
+	{0x0008, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT4, 0}, /*.	0x08[4] = 0 	 switch TSF to 40M*/\
+	{0x0109, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_POLLING, BIT7, 0}, /*Polling 0x109[7]=0  TSF in 40M*/\
+	{0x0029, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT6|BIT7, 0}, /*.	0x29[7:6] = 2b'00	 enable BB clock*/\
+	{0x0101, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT1, BIT1}, /*.	0x101[1] = 1*/\
+	{0x0100, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0xFF}, /*.	0x100[7:0] = 0xFF	 enable WMAC TRX*/\
+	{0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT1|BIT0, BIT1|BIT0}, /*.	0x02[1:0] = 2b'11	 enable BB macro*/\
+	{0x0522, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0}, /*.	0x522 = 0*/
+ 
+#define RTL8710B_TRANS_END															\
+	/* format */																\
+	/* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/								\
+	{0xFFFF, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,0,PWR_CMD_END, 0, 0}, //
+
+
+extern WLAN_PWR_CFG rtl8710B_power_on_flow[RTL8710B_TRANS_CARDEMU_TO_ACT_STEPS+RTL8710B_TRANS_END_STEPS];
+extern WLAN_PWR_CFG rtl8710B_radio_off_flow[RTL8710B_TRANS_ACT_TO_CARDEMU_STEPS+RTL8710B_TRANS_END_STEPS];
+extern WLAN_PWR_CFG rtl8710B_card_disable_flow[RTL8710B_TRANS_ACT_TO_CARDEMU_STEPS+RTL8710B_TRANS_CARDEMU_TO_PDN_STEPS+RTL8710B_TRANS_END_STEPS];
+extern WLAN_PWR_CFG rtl8710B_card_enable_flow[RTL8710B_TRANS_ACT_TO_CARDEMU_STEPS+RTL8710B_TRANS_CARDEMU_TO_PDN_STEPS+RTL8710B_TRANS_END_STEPS];
+extern WLAN_PWR_CFG rtl8710B_suspend_flow[RTL8710B_TRANS_ACT_TO_CARDEMU_STEPS+RTL8710B_TRANS_CARDEMU_TO_SUS_STEPS+RTL8710B_TRANS_END_STEPS];
+extern WLAN_PWR_CFG rtl8710B_resume_flow[RTL8710B_TRANS_SUS_TO_CARDEMU_STEPS+RTL8710B_TRANS_CARDEMU_TO_ACT_STEPS+RTL8710B_TRANS_END_STEPS];
+extern WLAN_PWR_CFG rtl8710B_hwpdn_flow[RTL8710B_TRANS_ACT_TO_CARDEMU_STEPS+RTL8710B_TRANS_CARDEMU_TO_PDN_STEPS+RTL8710B_TRANS_END_STEPS];
+extern WLAN_PWR_CFG rtl8710B_enter_lps_flow[RTL8710B_TRANS_ACT_TO_LPS_STEPS+RTL8710B_TRANS_END_STEPS];
+extern WLAN_PWR_CFG rtl8710B_leave_lps_flow[RTL8710B_TRANS_LPS_TO_ACT_STEPS+RTL8710B_TRANS_END_STEPS];
+
+#endif
diff --git a/rtl8723DS/include/Hal8723BPhyCfg.h b/rtl8723DS/include/Hal8723BPhyCfg.h
index 594cf3f..18c0a78 100755..100644
--- a/rtl8723DS/include/Hal8723BPhyCfg.h
+++ b/rtl8723DS/include/Hal8723BPhyCfg.h
@@ -123,7 +123,7 @@ PHY_SetSwChnlBWMode8723B(
 );
 
 VOID phy_set_rf_path_switch_8723b(
-	IN	PADAPTER	pAdapter,
+	IN	struct dm_struct		*phydm,
 	IN	bool		bMain
 );
 
diff --git a/rtl8723DS/include/Hal8723BPhyReg.h b/rtl8723DS/include/Hal8723BPhyReg.h
index ce485c2..ce485c2 100755..100644
--- a/rtl8723DS/include/Hal8723BPhyReg.h
+++ b/rtl8723DS/include/Hal8723BPhyReg.h
diff --git a/rtl8723DS/include/Hal8723BPwrSeq.h b/rtl8723DS/include/Hal8723BPwrSeq.h
index 1aec885..1aec885 100755..100644
--- a/rtl8723DS/include/Hal8723BPwrSeq.h
+++ b/rtl8723DS/include/Hal8723BPwrSeq.h
diff --git a/rtl8723DS/include/Hal8723DPhyCfg.h b/rtl8723DS/include/Hal8723DPhyCfg.h
index e447407..8dd4819 100755..100644
--- a/rtl8723DS/include/Hal8723DPhyCfg.h
+++ b/rtl8723DS/include/Hal8723DPhyCfg.h
@@ -123,7 +123,7 @@ PHY_SetSwChnlBWMode8723D(
 );
 
 VOID phy_set_rf_path_switch_8723d(
-	IN	PADAPTER	pAdapter,
+	IN	struct dm_struct		*phydm,
 	IN	bool		bMain
 );
 /*--------------------------Exported Function prototype End---------------------*/
diff --git a/rtl8723DS/include/Hal8723DPhyReg.h b/rtl8723DS/include/Hal8723DPhyReg.h
index 036144a..036144a 100755..100644
--- a/rtl8723DS/include/Hal8723DPhyReg.h
+++ b/rtl8723DS/include/Hal8723DPhyReg.h
diff --git a/rtl8723DS/include/Hal8723DPwrSeq.h b/rtl8723DS/include/Hal8723DPwrSeq.h
index 60cb53b..60cb53b 100755..100644
--- a/rtl8723DS/include/Hal8723DPwrSeq.h
+++ b/rtl8723DS/include/Hal8723DPwrSeq.h
diff --git a/rtl8723DS/include/Hal8723PwrSeq.h b/rtl8723DS/include/Hal8723PwrSeq.h
index 22de833..22de833 100755..100644
--- a/rtl8723DS/include/Hal8723PwrSeq.h
+++ b/rtl8723DS/include/Hal8723PwrSeq.h
diff --git a/rtl8723DS/include/Hal8812PhyCfg.h b/rtl8723DS/include/Hal8812PhyCfg.h
index bdd1e34..0d5282a 100755..100644
--- a/rtl8723DS/include/Hal8812PhyCfg.h
+++ b/rtl8723DS/include/Hal8812PhyCfg.h
@@ -135,7 +135,7 @@ PHY_SetSwChnlBWMode8812(
 
 VOID
 phy_set_rf_path_switch_8812a(
-	IN	PADAPTER	pAdapter,
+	IN	struct dm_struct		*phydm,
 	IN	bool		bMain
 );
 
diff --git a/rtl8723DS/include/Hal8812PhyReg.h b/rtl8723DS/include/Hal8812PhyReg.h
index ef4abb2..521ebb2 100755..100644
--- a/rtl8723DS/include/Hal8812PhyReg.h
+++ b/rtl8723DS/include/Hal8812PhyReg.h
@@ -163,6 +163,8 @@
 #define rB_RFE_Inv_Jaguar		0xeb4 /* Path_B RFE control */
 #define rA_RFE_Jaguar			0xcb8  /* Path_A RFE cotrol   */
 #define rB_RFE_Jaguar			0xeb8 /* Path_B RFE control */
+#define	rA_RFE_Inverse_Jaguar	0xCBC	/* Path_A RFE control inverse */
+#define	rB_RFE_Inverse_Jaguar	0xEBC	/* Path_B RFE control inverse */
 #define r_ANTSEL_SW_Jaguar		0x900 /* ANTSEL SW Control */
 #define bMask_RFEInv_Jaguar		0x3ff00000
 #define bMask_AntselPathFollow_Jaguar 0x00030000
diff --git a/rtl8723DS/include/Hal8812PwrSeq.h b/rtl8723DS/include/Hal8812PwrSeq.h
index 498faf8..498faf8 100755..100644
--- a/rtl8723DS/include/Hal8812PwrSeq.h
+++ b/rtl8723DS/include/Hal8812PwrSeq.h
diff --git a/rtl8723DS/include/Hal8814PhyCfg.h b/rtl8723DS/include/Hal8814PhyCfg.h
index ffa67ee..96f0794 100755..100644
--- a/rtl8723DS/include/Hal8814PhyCfg.h
+++ b/rtl8723DS/include/Hal8814PhyCfg.h
@@ -167,12 +167,12 @@ PHY_GetTxBBSwing_8814A(
 
 
 /* 1 6. Channel setting API */
-
+#if 0
 VOID
 PHY_SwChnlTimerCallback8814A(
 	IN	struct timer_list		*p_timer
 );
-
+#endif
 VOID
 PHY_SwChnlWorkItemCallback8814A(
 	IN PVOID            pContext
diff --git a/rtl8723DS/include/Hal8814PhyReg.h b/rtl8723DS/include/Hal8814PhyReg.h
index 2fa46dd..21851a8 100755..100644
--- a/rtl8723DS/include/Hal8814PhyReg.h
+++ b/rtl8723DS/include/Hal8814PhyReg.h
@@ -197,6 +197,8 @@
 #define rB_RFE_Inv_Jaguar		0xeb4 /* Path_B RFE control */
 #define rA_RFE_Jaguar			0xcb8  /* Path_A RFE cotrol   */
 #define rB_RFE_Jaguar			0xeb8 /* Path_B RFE control */
+#define	rA_RFE_Inverse_Jaguar	0xCBC	/* Path_A RFE control inverse */
+#define	rB_RFE_Inverse_Jaguar	0xEBC	/* Path_B RFE control inverse */
 #define r_ANTSEL_SW_Jaguar		0x900 /* ANTSEL SW Control */
 #define bMask_RFEInv_Jaguar		0x3ff00000
 #define bMask_AntselPathFollow_Jaguar 0x00030000
diff --git a/rtl8723DS/include/Hal8814PwrSeq.h b/rtl8723DS/include/Hal8814PwrSeq.h
index 5f4097d..5f4097d 100755..100644
--- a/rtl8723DS/include/Hal8814PwrSeq.h
+++ b/rtl8723DS/include/Hal8814PwrSeq.h
diff --git a/rtl8723DS/include/Hal8821APwrSeq.h b/rtl8723DS/include/Hal8821APwrSeq.h
index 568b8e5..568b8e5 100755..100644
--- a/rtl8723DS/include/Hal8821APwrSeq.h
+++ b/rtl8723DS/include/Hal8821APwrSeq.h
diff --git a/rtl8723DS/include/HalPwrSeqCmd.h b/rtl8723DS/include/HalPwrSeqCmd.h
index f67ed22..f67ed22 100755..100644
--- a/rtl8723DS/include/HalPwrSeqCmd.h
+++ b/rtl8723DS/include/HalPwrSeqCmd.h
diff --git a/rtl8723DS/include/HalVerDef.h b/rtl8723DS/include/HalVerDef.h
index 1909da7..ab1c578 100755..100644
--- a/rtl8723DS/include/HalVerDef.h
+++ b/rtl8723DS/include/HalVerDef.h
@@ -35,7 +35,10 @@ typedef enum tag_HAL_IC_Type_Definition {
 	CHIP_8188F	=	12,
 	CHIP_8822B	=	13,
 	CHIP_8723D	=	14,
-	CHIP_8821C	=	15
+	CHIP_8821C	=	15,
+	CHIP_8710B	=	16,
+	CHIP_8192F	=	17,
+	CHIP_8188GTV =	18,
 } HAL_IC_TYPE_E;
 
 /* HAL_CHIP_TYPE_E */
@@ -112,6 +115,7 @@ typedef	struct tag_HAL_VERSION {
 
 #define IS_8188E(version)					((GET_CVID_IC_TYPE(version) == CHIP_8188E) ? TRUE : FALSE)
 #define IS_8188F(version)					((GET_CVID_IC_TYPE(version) == CHIP_8188F) ? TRUE : FALSE)
+#define IS_8188GTV(version)					((GET_CVID_IC_TYPE(version) == CHIP_8188GTV) ? TRUE : FALSE)
 #define IS_8192E(version)					((GET_CVID_IC_TYPE(version) == CHIP_8192E) ? TRUE : FALSE)
 #define IS_8812_SERIES(version)			((GET_CVID_IC_TYPE(version) == CHIP_8812) ? TRUE : FALSE)
 #define IS_8821_SERIES(version)			((GET_CVID_IC_TYPE(version) == CHIP_8821) ? TRUE : FALSE)
@@ -120,8 +124,11 @@ typedef	struct tag_HAL_VERSION {
 #define IS_8703B_SERIES(version)			((GET_CVID_IC_TYPE(version) == CHIP_8703B) ? TRUE : FALSE)
 #define IS_8822B_SERIES(version)			((GET_CVID_IC_TYPE(version) == CHIP_8822B) ? TRUE : FALSE)
 #define IS_8821C_SERIES(version)			((GET_CVID_IC_TYPE(version) == CHIP_8821C) ? TRUE : FALSE)
-#define IS_8723D_SERIES(version)\
-	((GET_CVID_IC_TYPE(version) == CHIP_8723D) ? TRUE : FALSE)
+#define IS_8723D_SERIES(version)			((GET_CVID_IC_TYPE(version) == CHIP_8723D) ? TRUE : FALSE)
+#define IS_8710B_SERIES(version)			((GET_CVID_IC_TYPE(version) == CHIP_8710B) ? TRUE : FALSE)
+
+#define IS_8192F_SERIES(version)\
+	((GET_CVID_IC_TYPE(version) == CHIP_8192F) ? TRUE : FALSE)
 /* HAL_CHIP_TYPE_E */
 #define IS_TEST_CHIP(version)			((GET_CVID_CHIP_TYPE(version) == TEST_CHIP) ? TRUE : FALSE)
 #define IS_NORMAL_CHIP(version)			((GET_CVID_CHIP_TYPE(version) == NORMAL_CHIP) ? TRUE : FALSE)
diff --git a/rtl8723DS/include/autoconf.h b/rtl8723DS/include/autoconf.h
index 27f3147..4f1eb0c 100755..100644
--- a/rtl8723DS/include/autoconf.h
+++ b/rtl8723DS/include/autoconf.h
@@ -72,7 +72,7 @@
 	#define CONFIG_P2P_PS
 	#define CONFIG_P2P_OP_CHK_SOCIAL_CH
 	#define CONFIG_CFG80211_ONECHANNEL_UNDER_CONCURRENT  /* replace CONFIG_P2P_CHK_INVITE_CH_LIST flag */
-	#define CONFIG_P2P_INVITE_IOT
+	/*#define CONFIG_P2P_INVITE_IOT*/
 #endif
 
 /* Added by Kurt 20110511 */
@@ -98,14 +98,11 @@
 #define CONFIG_LAYER2_ROAMING
 #define CONFIG_LAYER2_ROAMING_RESUME
 
-/* #define CONFIG_80211D */
-
-
 /*
  * Hareware/Firmware Related Config
  */
 /* #define CONFIG_BT_COEXIST */	/* Set from Makefile */
-/* #define CONFIG_ANTENNA_DIVERSITY */	/* Set from Makefile */
+/* #define CONFIG_ANTENNA_DIVERSITY */
 /* #define SUPPORT_HW_RFOFF_DETECTED */
 
 /*#define CONFIG_RTW_LED*/
@@ -133,6 +130,9 @@
 #define CONFIG_XMIT_THREAD_MODE
 /* #define CONFIG_SDIO_TX_ENABLE_AVAL_INT */
 /* #define CONFIG_RECV_THREAD_MODE */
+#ifdef CONFIG_RECV_THREAD_MODE
+#define RTW_RECV_THREAD_HIGH_PRIORITY
+#endif/*CONFIG_RECV_THREAD_MODE*/
 
 /*
  * Others
@@ -154,7 +154,6 @@
 
 #define CONFIG_LONG_DELAY_ISSUE
 /* #define CONFIG_PATCH_JOIN_WRONG_CHANNEL */
-#define CONFIG_ATTEMPT_TO_FIX_AP_BEACON_ERROR
 
 
 /*
diff --git a/rtl8723DS/include/basic_types.h b/rtl8723DS/include/basic_types.h
index c0737f5..c0737f5 100755..100644
--- a/rtl8723DS/include/basic_types.h
+++ b/rtl8723DS/include/basic_types.h
diff --git a/rtl8723DS/include/byteorder/big_endian.h b/rtl8723DS/include/byteorder/big_endian.h
index 6b1dc44..6b1dc44 100755..100644
--- a/rtl8723DS/include/byteorder/big_endian.h
+++ b/rtl8723DS/include/byteorder/big_endian.h
diff --git a/rtl8723DS/include/byteorder/generic.h b/rtl8723DS/include/byteorder/generic.h
index f85114b..f85114b 100755..100644
--- a/rtl8723DS/include/byteorder/generic.h
+++ b/rtl8723DS/include/byteorder/generic.h
diff --git a/rtl8723DS/include/byteorder/little_endian.h b/rtl8723DS/include/byteorder/little_endian.h
index c4b6451..c4b6451 100755..100644
--- a/rtl8723DS/include/byteorder/little_endian.h
+++ b/rtl8723DS/include/byteorder/little_endian.h
diff --git a/rtl8723DS/include/byteorder/swab.h b/rtl8723DS/include/byteorder/swab.h
index a8dd46b..a8dd46b 100755..100644
--- a/rtl8723DS/include/byteorder/swab.h
+++ b/rtl8723DS/include/byteorder/swab.h
diff --git a/rtl8723DS/include/byteorder/swabb.h b/rtl8723DS/include/byteorder/swabb.h
index 634519a..634519a 100755..100644
--- a/rtl8723DS/include/byteorder/swabb.h
+++ b/rtl8723DS/include/byteorder/swabb.h
diff --git a/rtl8723DS/include/circ_buf.h b/rtl8723DS/include/circ_buf.h
index 7a5b8ef..7a5b8ef 100755..100644
--- a/rtl8723DS/include/circ_buf.h
+++ b/rtl8723DS/include/circ_buf.h
diff --git a/rtl8723DS/include/cmd_osdep.h b/rtl8723DS/include/cmd_osdep.h
index e4ba2b6..e4ba2b6 100755..100644
--- a/rtl8723DS/include/cmd_osdep.h
+++ b/rtl8723DS/include/cmd_osdep.h
diff --git a/rtl8723DS/include/cmn_info/rtw_sta_info.h b/rtl8723DS/include/cmn_info/rtw_sta_info.h
index 4ad7b6c..6910098 100755..100644
--- a/rtl8723DS/include/cmn_info/rtw_sta_info.h
+++ b/rtl8723DS/include/cmn_info/rtw_sta_info.h
@@ -85,7 +85,7 @@ enum rf_type {
 	RF_3T3R			= 5,
 	RF_3T4R			= 6,
 	RF_4T4R			= 7,
-	RF_TYPE_MAX = 0x0F,
+	RF_TYPE_MAX,
 };
 
 enum bb_path {
@@ -106,7 +106,7 @@ enum bb_path {
 	BB_PATH_ACD = (BB_PATH_A | BB_PATH_C | BB_PATH_D),
 	BB_PATH_BCD = (BB_PATH_B | BB_PATH_C | BB_PATH_D),
 
-	BB_PATH_ABCD = (BB_PATH_A | BB_PATH_B | BB_PATH_D | BB_PATH_D),
+	BB_PATH_ABCD = (BB_PATH_A | BB_PATH_B | BB_PATH_C | BB_PATH_D),
 };
 
 enum rf_path {
@@ -121,11 +121,17 @@ enum rf_path {
 	RF_PATH_BD,
 	RF_PATH_CD,
 	RF_PATH_ABC,
+	RF_PATH_ABD,
 	RF_PATH_ACD,
 	RF_PATH_BCD,
 	RF_PATH_ABCD,
 };
 
+enum rf_syn {
+	RF_SYN0 = 0,
+	RF_SYN1 = 1,
+};
+
 enum wireless_set {
 	WIRELESS_CCK	= 0x00000001,
 	WIRELESS_OFDM	= 0x00000002,
@@ -155,47 +161,54 @@ struct rssi_info {
 	u16		cck_sum_power;
 	u8		is_send_rssi;
 	u8		valid_bit;
+	s16		rssi_acc;	/*accumulate RSSI for per packet MA sum*/
 };
 
 struct ra_sta_info {
-	u8	rate_id;			/*ratr_idx*/
-	u8	rssi_level;
-
-	/*New*/
-	u8	is_first_connect:1;	/*CE: ra_rpt_linked, AP: H2C_rssi_rpt*/
-	u8	is_support_sgi:1;	/*driver*/
-	u8	is_vht_enable:2;		/*driver*/
-	u8	disable_ra:1;		/*driver*/
-	u8	disable_pt:1;		/*driver*/  /*remove is_disable_power_training*/
-	u8	txrx_state:2;		/*0: Tx, 1:Rx, 2:bi-direction*/
-	u8	is_noisy:1;
-	
-	u8 curr_tx_rate;					/*FW->Driver*/
-	enum channel_width	ra_bw_mode;	/*max bandwidth, for RA only*/
-	enum channel_width	curr_tx_bw;    /*FW->Driver*/
-	u8 curr_retry_ratio;				/*FW->Driver*/
-
+	u8	rate_id;			/*[PHYDM] ratr_idx*/
+	u8	rssi_level;			/*[PHYDM]*/
+	u8	is_first_connect:1;		/*[PHYDM] CE: ra_rpt_linked, AP: H2C_rssi_rpt*/
+	u8	is_support_sgi:1;		/*[driver]*/
+	u8	is_vht_enable:2;		/*[driver]*/
+	u8	disable_ra:1;			/*[driver]*/
+	u8	disable_pt:1;			/*[driver] remove is_disable_power_training*/
+	u8	txrx_state:2;			/*[PHYDM] 0: Tx, 1:Rx, 2:bi-direction*/
+	u8	is_noisy:1;			/*[PHYDM]*/
+	u8	curr_tx_rate;			/*[PHYDM] FW->Driver*/
+	enum channel_width	ra_bw_mode;	/*[Driver] max bandwidth, for RA only*/
+	enum channel_width	curr_tx_bw;	/*[PHYDM] FW->Driver*/
+	u8	curr_retry_ratio;		/*[PHYDM] FW->Driver*/
 	u64	ramask;
 };
 
+struct dtp_info {
+	u8	dyn_tx_power;	/*Dynamic Tx power offset*/
+	u8	last_tx_power;
+	u8	sta_tx_high_power_lvl:4;
+	u8	sta_last_dtp_lvl:4;
+};
+
 struct cmn_sta_info {
-	u16	dm_ctrl;
-	enum channel_width	bw_mode;	/*max bandwidth*/
-	u8	mac_id;
-	u8	mac_addr[6];
-	u16	aid;
-	enum rf_type mimo_type;		/*sta XTXR*/
-	struct rssi_info	rssi_stat;
-	struct ra_sta_info	ra_info;
-	u16	tx_moving_average_tp;	/*tx average MBps*/
-	u16	rx_moving_average_tp;	/*rx average MBps*/
-	u8	stbc_en:2;		/*Driver : really use stbc!!*/
-	u8	ldpc_en:2;
-	enum wireless_set	support_wireless_set;
+	u16	dm_ctrl;			/*[Driver]*/			
+	enum channel_width	bw_mode;	/*[Driver] max support BW*/
+	u8	mac_id;				/*[Driver]*/
+	u8	mac_addr[6];			/*[Driver]*/
+	u16	aid;				/*[Driver]*/
+	enum rf_type mimo_type;			/*[Driver] sta XTXR*/
+	struct rssi_info	rssi_stat;	/*[PHYDM]*/
+	struct ra_sta_info	ra_info;	/*[Driver&PHYDM]*/
+	u16	tx_moving_average_tp;		/*[Driver] tx average MBps*/
+	u16	rx_moving_average_tp;		/*[Driver] rx average MBps*/
+	u8	stbc_en:2;			/*[Driver] really transmitt STBC*/
+	u8	ldpc_en:2;			/*[Driver] really transmitt LDPC*/
+	enum wireless_set	support_wireless_set;/*[Driver]*/
 #ifdef CONFIG_BEAMFORMING
-	struct bf_cmn_info	bf_info;
+	struct bf_cmn_info	bf_info;	/*[Driver]*/
 #endif
-	u8	sm_ps:2;
+	u8	sm_ps:2;			/*[Driver]*/
+	struct dtp_info dtp_stat;		/*[PHYDM] Dynamic Tx power offset*/
+	/*u8		pw2cca_over_TH_cnt;*/
+	/*u8		total_pw2cca_cnt;*/
 };
 
 struct phydm_phyinfo_struct {
@@ -212,6 +225,7 @@ struct phydm_phyinfo_struct {
 	u8		signal_strength;				/* in 0-100 index. */
 	s8		rx_pwr[4];					/* per-path's pwdb */
 	s8		rx_snr[4];					/* per-path's SNR	*/
+	u8		ant_idx[4];	/*per-path's antenna index*/
 /*ODM_PHY_STATUS_NEW_TYPE_SUPPORT*/
 	u8		rx_count:2;					/* RX path counter---*/
 	u8		band_width:2;
@@ -219,12 +233,16 @@ struct phydm_phyinfo_struct {
 	u8		channel;						/* channel number---*/
 	u8		is_mu_packet:1;				/* is MU packet or not---boolean*/
 	u8		is_beamformed:1;				/* BF packet---boolean*/
+	u8		cnt_pw2cca;
+	u8		cnt_cca2agc_rdy;
 /*ODM_PHY_STATUS_NEW_TYPE_SUPPORT*/
 };
 
 struct phydm_perpkt_info_struct {
 	u8		data_rate;
 	u8		station_id;
+	u8		is_cck_rate: 1;
+	u8		rate_ss:3;			/*spatial stream of data rate*/
 	u8		is_packet_match_bssid:1;	/*boolean*/
 	u8		is_packet_to_self:1;		/*boolean*/
 	u8		is_packet_beacon:1;		/*boolean*/
diff --git a/rtl8723DS/include/custom_gpio.h b/rtl8723DS/include/custom_gpio.h
index 49411b6..49411b6 100755..100644
--- a/rtl8723DS/include/custom_gpio.h
+++ b/rtl8723DS/include/custom_gpio.h
diff --git a/rtl8723DS/include/drv_conf.h b/rtl8723DS/include/drv_conf.h
index dab2936..8e09020 100755
--- a/rtl8723DS/include/drv_conf.h
+++ b/rtl8723DS/include/drv_conf.h
@@ -16,13 +16,12 @@
 #define __DRV_CONF_H__
 #include "autoconf.h"
 #include "hal_ic_cfg.h"
-
 #if defined(PLATFORM_LINUX) && defined (PLATFORM_WINDOWS)
 
 	#error "Shall be Linux or Windows, but not both!\n"
 
 #endif
-
+#define CONFIG_RSSI_PRIORITY
 #ifdef CONFIG_RTW_REPEATER_SON
 	#ifndef CONFIG_AP
 		#define CONFIG_AP
@@ -115,9 +114,71 @@
 	#define CONFIG_USB_VENDOR_REQ_MUTEX
 #endif
 
+#if defined(CONFIG_DFS_SLAVE_WITH_RADAR_DETECT) && !defined(CONFIG_DFS_MASTER)
+	#define CONFIG_DFS_MASTER
+#endif
+
 #if !defined(CONFIG_AP_MODE) && defined(CONFIG_DFS_MASTER)
-	#warning "undef CONFIG_DFS_MASTER because CONFIG_AP_MODE is not defined"
-	#undef CONFIG_DFS_MASTER
+	#error "enable CONFIG_DFS_MASTER without CONFIG_AP_MODE"
+#endif
+
+#ifdef CONFIG_WIFI_MONITOR
+	/*	#define CONFIG_MONITOR_MODE_XMIT	*/
+#endif
+
+#ifdef CONFIG_CUSTOMER_ALIBABA_GENERAL
+	#ifndef CONFIG_WIFI_MONITOR
+		#define CONFIG_WIFI_MONITOR
+	#endif
+	#ifndef CONFIG_MONITOR_MODE_XMIT
+		#define CONFIG_MONITOR_MODE_XMIT
+	#endif
+	#ifdef CONFIG_POWER_SAVING
+		#undef CONFIG_POWER_SAVING
+	#endif
+#endif
+
+#ifdef CONFIG_CUSTOMER01_SMART_ANTENNA
+	#ifdef CONFIG_POWER_SAVING
+		#undef CONFIG_POWER_SAVING
+	#endif
+	#ifdef CONFIG_BEAMFORMING
+		#undef CONFIG_BEAMFORMING
+	#endif
+#endif
+
+#ifdef CONFIG_RTW_MESH
+	#ifndef CONFIG_RTW_MESH_ACNODE_PREVENT
+	#define CONFIG_RTW_MESH_ACNODE_PREVENT 1
+	#endif
+
+	#ifndef CONFIG_RTW_MESH_OFFCH_CAND
+	#define CONFIG_RTW_MESH_OFFCH_CAND 1
+	#endif
+
+	#ifndef CONFIG_RTW_MESH_PEER_BLACKLIST
+	#define CONFIG_RTW_MESH_PEER_BLACKLIST 1
+	#endif
+
+	#ifndef CONFIG_RTW_MESH_CTO_MGATE_BLACKLIST
+	#define CONFIG_RTW_MESH_CTO_MGATE_BLACKLIST 1
+	#endif
+	#ifndef CONFIG_RTW_MESH_CTO_MGATE_CARRIER
+	#define CONFIG_RTW_MESH_CTO_MGATE_CARRIER CONFIG_RTW_MESH_CTO_MGATE_BLACKLIST
+	#endif
+
+	#ifndef CONFIG_RTW_MPM_TX_IES_SYNC_BSS
+	#define CONFIG_RTW_MPM_TX_IES_SYNC_BSS 1
+	#endif
+	#if CONFIG_RTW_MPM_TX_IES_SYNC_BSS
+		#ifndef CONFIG_RTW_MESH_AEK
+		#define CONFIG_RTW_MESH_AEK
+		#endif
+	#endif
+
+	#ifndef CONFIG_RTW_MESH_DATA_BMC_TO_UC
+	#define CONFIG_RTW_MESH_DATA_BMC_TO_UC 1
+	#endif
 #endif
 
 #if !defined(CONFIG_SCAN_BACKOP) && defined(CONFIG_AP_MODE)
@@ -140,14 +201,6 @@
 	#define CONFIG_RTW_ADAPTIVITY_MODE 0
 #endif
 
-#ifndef CONFIG_RTW_ADAPTIVITY_DML
-	#define CONFIG_RTW_ADAPTIVITY_DML 0
-#endif
-
-#ifndef CONFIG_RTW_ADAPTIVITY_DC_BACKOFF
-	#define CONFIG_RTW_ADAPTIVITY_DC_BACKOFF 2
-#endif
-
 #ifndef CONFIG_RTW_ADAPTIVITY_TH_L2H_INI
 	#define CONFIG_RTW_ADAPTIVITY_TH_L2H_INI 0
 #endif
@@ -210,8 +263,11 @@
 	#define CONFIG_RTW_CUSTOMIZE_BEEDCA		0x0000431C
 	#define CONFIG_RTW_CUSTOMIZE_BWMODE		0x00
 	#define CONFIG_RTW_CUSTOMIZE_RLSTA		0x7
+#if defined(CONFIG_RTL8192E) || defined(CONFIG_RTL8192F) || defined(CONFIG_RTL8822B)
+	#define CONFIG_RTW_TX_2PATH_EN		/*	mutually incompatible with STBC_TX & Beamformer	*/
 #endif
-
+#endif
+/*#define CONFIG_EXTEND_LOWRATE_TXOP			*/
 
 #ifndef CONFIG_RTW_RX_AMPDU_SZ_LIMIT_1SS
 	#define CONFIG_RTW_RX_AMPDU_SZ_LIMIT_1SS {0xFF, 0xFF, 0xFF, 0xFF}
@@ -293,11 +349,33 @@
 #endif
 
 #if (CONFIG_IFACE_NUMBER == 0)
-	#error "CONFIG_IFACE_NUMBER cound not equel to 0 !!"
+	#error "CONFIG_IFACE_NUMBER cound not be 0 !!"
 #endif
 
-#if (CONFIG_IFACE_NUMBER > 3)
-	#error "Not support over 3 interfaces yet !!"
+#if defined(CONFIG_RTL8188E) || defined(CONFIG_RTL8192E) || defined(CONFIG_RTL8188F) || \
+defined(CONFIG_RTL8188GTV) || defined(CONFIG_RTL8192F) || \
+defined(CONFIG_RTL8812A) || defined(CONFIG_RTL8821A) || defined(CONFIG_RTL8710B) || \
+defined(CONFIG_RTL8723B) || defined(CONFIG_RTL8703B) || defined(CONFIG_RTL8723D)
+#define CONFIG_HWMPCAP_GEN1
+#elif defined(CONFIG_RTL8822B) || defined(CONFIG_RTL8821C) || defined(CONFIG_RTL8822C) /*|| defined(CONFIG_RTL8814A)*/
+#define CONFIG_HWMPCAP_GEN2
+#elif defined(CONFIG_RTL8814B) /*Address CAM - 128*/
+#define CONFIG_HWMPCAP_GEN3
+#endif
+
+#if defined(CONFIG_HWMPCAP_GEN1) && (CONFIG_IFACE_NUMBER > 2) 
+	#ifdef CONFIG_POWER_SAVING
+	/*#warning "Disable PS when CONFIG_IFACE_NUMBER > 2"*/
+	#undef CONFIG_POWER_SAVING
+	#endif
+
+	#ifdef CONFIG_WOWLAN
+	#error "This IC can't support MI and WoWLan at the same time"
+	#endif
+#endif
+
+#if (CONFIG_IFACE_NUMBER > 4)
+	#error "Not support over 4 interfaces yet !!"
 #endif
 
 #if (CONFIG_IFACE_NUMBER > 8)	/*IFACE_ID_MAX*/
@@ -315,10 +393,28 @@
 	#endif
 
 	#ifdef CONFIG_AP_MODE
+		#define CONFIG_SUPPORT_MULTI_BCN
+
 		#define CONFIG_SWTIMER_BASED_TXBCN
-		/*#define CONFIG_FW_BASED_BCN*/
-	#endif
-#endif
+
+		#ifdef CONFIG_HWMPCAP_GEN2 /*CONFIG_RTL8822B/CONFIG_RTL8821C/CONFIG_RTL8822C*/
+		#define CONFIG_FW_HANDLE_TXBCN
+
+		#ifdef CONFIG_FW_HANDLE_TXBCN
+			#ifdef CONFIG_SWTIMER_BASED_TXBCN
+				#undef CONFIG_SWTIMER_BASED_TXBCN
+			#endif
+
+			#define CONFIG_LIMITED_AP_NUM	4
+		#endif
+	#endif /*CONFIG_HWMPCAP_GEN2*/
+	#endif /*CONFIG_AP_MODE*/
+
+	#ifdef CONFIG_HWMPCAP_GEN2 /*CONFIG_RTL8822B/CONFIG_RTL8821C/CONFIG_RTL8822C*/
+	#define CONFIG_CLIENT_PORT_CFG
+	#define CONFIG_NEW_NETDEV_HDL
+	#endif/*CONFIG_HWMPCAP_GEN2*/
+#endif/*(CONFIG_IFACE_NUMBER > 2)*/
 
 #define MACID_NUM_SW_LIMIT 32
 #define SEC_CAM_ENT_NUM_SW_LIMIT 32
@@ -327,10 +423,18 @@
 	#define CONFIG_IEEE80211_BAND_5GHZ
 #endif
 
-#if defined(CONFIG_WOWLAN) && (defined(CONFIG_RTL8822B) || defined(CONFIG_RTL8821C))
+#if defined(CONFIG_WOWLAN) && (defined(CONFIG_RTL8822B) || defined(CONFIG_RTL8821C) || defined(CONFIG_RTL8814A))
 	#define CONFIG_WOW_PATTERN_HW_CAM
 #endif
 
+#ifndef CONFIG_TSF_UPDATE_PAUSE_FACTOR
+#define CONFIG_TSF_UPDATE_PAUSE_FACTOR 200
+#endif
+
+#ifndef CONFIG_TSF_UPDATE_RESTORE_FACTOR
+#define CONFIG_TSF_UPDATE_RESTORE_FACTOR 5
+#endif
+
 /*
 	Mark CONFIG_DEAUTH_BEFORE_CONNECT by Arvin 2015/07/20
 	If the failure of Wi-Fi connection is due to some irregular disconnection behavior (like unplug dongle,
@@ -343,6 +447,7 @@
 
 
 /*#define CONFIG_DOSCAN_IN_BUSYTRAFFIC	*/
+/*#define CONFIG_PHDYM_FW_FIXRATE		*/	/*	Another way to fix tx rate	*/
 
 /*Don't release SDIO irq in suspend/resume procedure*/
 #define CONFIG_RTW_SDIO_KEEP_IRQ	0
@@ -384,4 +489,24 @@
 #define CONFIG_IPS
 #endif
 #endif
+
+#ifdef RTW_REDUCE_SCAN_SWITCH_CH_TIME
+#ifndef CONFIG_RTL8822B
+	#error "Only 8822B support RTW_REDUCE_SCAN_SWITCH_CH_TIME"
+#endif
+	#ifndef RTW_CHANNEL_SWITCH_OFFLOAD
+		#define RTW_CHANNEL_SWITCH_OFFLOAD
+	#endif
+#endif
+
+#define CONFIG_RTW_TPT_MODE 
+
+#ifdef CONFIG_PCI_BCN_POLLING
+#define CONFIG_BCN_ICF
+#endif 
+
+#ifndef CONFIG_PCI_MSI
+#define CONFIG_RTW_PCI_MSI_DISABLE
+#endif
+
 #endif /* __DRV_CONF_H__ */
diff --git a/rtl8723DS/include/drv_types.h b/rtl8723DS/include/drv_types.h
index bc7000c..c2aa2a6 100755..100644
--- a/rtl8723DS/include/drv_types.h
+++ b/rtl8723DS/include/drv_types.h
@@ -60,6 +60,7 @@ typedef struct _ADAPTER _adapter, ADAPTER, *PADAPTER;
 #include <rtw_debug.h>
 #include <cmn_info/rtw_sta_info.h>
 #include <rtw_rf.h>
+#include "../core/rtw_chplan.h"
 
 #ifdef CONFIG_80211N_HT
 	#include <rtw_ht.h>
@@ -109,6 +110,9 @@ typedef struct _ADAPTER _adapter, ADAPTER, *PADAPTER;
 #include <rtw_mlme_ext.h>
 #include <rtw_mi.h>
 #include <rtw_ap.h>
+#ifdef CONFIG_RTW_MESH
+#include "../core/mesh/rtw_mesh.h"
+#endif
 #include <rtw_efuse.h>
 #include <rtw_version.h>
 #include <rtw_odm.h>
@@ -194,6 +198,7 @@ struct registry_priv {
 	u8	power_mgnt;
 	u8	ips_mode;
 	u8	lps_level;
+	u8	lps_chk_by_tp;
 	u8	smart_ps;
 #ifdef CONFIG_WMMPS_STA
 	u8	wmm_smart_ps;
@@ -203,6 +208,7 @@ struct registry_priv {
 	u8	long_retry_lmt;
 	u8	short_retry_lmt;
 	u16	busy_thresh;
+	u16	max_bss_cnt;
 	u8	ack_policy;
 	u8	mp_mode;
 #if defined(CONFIG_MP_INCLUDED) && defined(CONFIG_RTW_CUSTOMER_STR)
@@ -340,6 +346,9 @@ struct registry_priv {
 	s8 target_tx_pwr_5g[RF_PATH_MAX][RATE_SECTION_NUM - 1];
 #endif
 
+	u8 tsf_update_pause_factor;
+	u8 tsf_update_restore_factor;
+
 	s8	TxBBSwing_2G;
 	s8	TxBBSwing_5G;
 	u8	AmplifierType_2G;
@@ -363,8 +372,6 @@ struct registry_priv {
 	u8 hiq_filter;
 	u8 adaptivity_en;
 	u8 adaptivity_mode;
-	u8 adaptivity_dml;
-	u8 adaptivity_dc_backoff;
 	s8 adaptivity_th_l2h_ini;
 	s8 adaptivity_th_edcca_hl_diff;
 
@@ -413,13 +420,14 @@ struct registry_priv {
 
 #ifdef CONFIG_WOWLAN
 	u8 wakeup_event;
+	u8 suspend_type;
 #endif
 
 #ifdef CONFIG_SUPPORT_TRX_SHARED
 	u8 trx_share_mode;
 #endif
 	u8 check_hw_status;
-
+	u8 wowlan_sta_mix_mode;
 	u32 pci_aspm_config;
 
 	u8 iqk_fw_offload;
@@ -436,6 +444,25 @@ struct registry_priv {
 #ifdef CONFIG_FW_OFFLOAD_PARAM_INIT
 	u8 fw_param_init;
 #endif
+#ifdef CONFIG_DYNAMIC_SOML
+	u8 dyn_soml_en;
+	u8 dyn_soml_train_num;
+	u8 dyn_soml_interval;
+	u8 dyn_soml_period;
+	u8 dyn_soml_delay;
+#endif
+#ifdef CONFIG_FW_HANDLE_TXBCN
+	u8 fw_tbtt_rpt;
+#endif
+
+#ifdef DBG_LA_MODE
+	u8 la_mode_en;
+#endif
+#ifdef CONFIG_TDMADIG
+	u8 tdmadig_en;
+	u8 tdmadig_mode;
+	u8 tdmadig_dynamic;
+#endif/*CONFIG_TDMADIG*/
 };
 
 /* For registry parameters */
@@ -453,13 +480,19 @@ struct registry_priv {
 #define GetRegGLNAType(_Adapter)	(_Adapter->registrypriv.GLNA_Type)
 #define GetRegPowerTrackingType(_Adapter)	(_Adapter->registrypriv.PowerTracking_Type)
 
+#define WOWLAN_IS_STA_MIX_MODE(_Adapter)	(_Adapter->registrypriv.wowlan_sta_mix_mode)
 #define BSSID_OFT(field) ((ULONG)FIELD_OFFSET(WLAN_BSSID_EX, field))
 #define BSSID_SZ(field)   sizeof(((PWLAN_BSSID_EX) 0)->field)
 
 #define BW_MODE_2G(bw_mode) ((bw_mode) & 0x0F)
 #define BW_MODE_5G(bw_mode) ((bw_mode) >> 4)
+#ifdef CONFIG_80211N_HT
 #define REGSTY_BW_2G(regsty) BW_MODE_2G((regsty)->bw_mode)
 #define REGSTY_BW_5G(regsty) BW_MODE_5G((regsty)->bw_mode)
+#else
+#define REGSTY_BW_2G(regsty) CHANNEL_WIDTH_20
+#define REGSTY_BW_5G(regsty) CHANNEL_WIDTH_20
+#endif
 #define REGSTY_IS_BW_2G_SUPPORT(regsty, bw) (REGSTY_BW_2G((regsty)) >= (bw))
 #define REGSTY_IS_BW_5G_SUPPORT(regsty, bw) (REGSTY_BW_5G((regsty)) >= (bw))
 
@@ -681,7 +714,7 @@ struct rtw_traffic_statistics {
 	u64	tx_drop;
 	u64	cur_tx_bytes;
 	u64	last_tx_bytes;
-	u32	cur_tx_tp; /* Tx throughput in MBps. */
+	u32	cur_tx_tp; /* Tx throughput in Mbps. */
 
 	/* rx statistics */
 	u64	rx_bytes;
@@ -689,7 +722,7 @@ struct rtw_traffic_statistics {
 	u64	rx_drop;
 	u64	cur_rx_bytes;
 	u64	last_rx_bytes;
-	u32	cur_rx_tp; /* Rx throughput in MBps. */
+	u32	cur_rx_tp; /* Rx throughput in Mbps. */
 };
 
 #define SEC_CAP_CHK_BMC	BIT0
@@ -747,6 +780,15 @@ struct macid_bmp {
 #endif
 };
 
+#ifdef CONFIG_CLIENT_PORT_CFG
+struct clt_port_t{
+	_lock lock;
+	u8 bmp;
+	s8 num;
+};
+#define get_clt_num(adapter) (adapter_to_dvobj(adapter)->clt_port.num)
+#endif
+
 struct macid_ctl_t {
 	_lock lock;
 	u8 num;
@@ -862,9 +904,15 @@ struct rf_ctl_t {
 	#endif
 #endif
 
+	u8 ch_sel_same_band_prefer;
+
+#ifdef CONFIG_DFS
+	u8 csa_ch;
+
 #ifdef CONFIG_DFS_MASTER
+	_timer radar_detect_timer;
 	bool radar_detect_by_others;
-	u8 dfs_master_enabled;
+	u8 radar_detect_enabled;
 	bool radar_detected;
 
 	u8 radar_detect_ch;
@@ -873,28 +921,39 @@ struct rf_ctl_t {
 
 	systime cac_start_time;
 	systime cac_end_time;
+	u8 cac_force_stop;
 
+#ifdef CONFIG_DFS_SLAVE_WITH_RADAR_DETECT
+	u8 dfs_slave_with_rd;
+#endif
 	u8 dfs_ch_sel_d_flags;
 
-	u8 dbg_dfs_master_fake_radar_detect_cnt;
-	u8 dbg_dfs_master_radar_detect_trigger_non;
-	u8 dbg_dfs_master_choose_dfs_ch_first;
-#endif
+	u8 dbg_dfs_fake_radar_detect_cnt;
+	u8 dbg_dfs_radar_detect_trigger_non;
+	u8 dbg_dfs_choose_dfs_ch_first;
+#endif /* CONFIG_DFS_MASTER */
+#endif /* CONFIG_DFS */
 };
 
-#ifdef CONFIG_DFS_MASTER
 #define RTW_CAC_STOPPED 0
 #ifdef CONFIG_DFS_MASTER
 #define IS_CAC_STOPPED(rfctl) ((rfctl)->cac_end_time == RTW_CAC_STOPPED)
-#define IS_CH_WAITING(rfctl) (!IS_CAC_STOPPED(rfctl) && time_after((rfctl)->cac_end_time, rtw_get_current_time()))
-#define IS_UNDER_CAC(rfctl) (IS_CH_WAITING(rfctl) && time_after(rtw_get_current_time(), (rfctl)->cac_start_time))
-#endif /*CONFIG_DFS_MASTER*/
+#define IS_CH_WAITING(rfctl) (!IS_CAC_STOPPED(rfctl) && rtw_time_after((rfctl)->cac_end_time, rtw_get_current_time()))
+#define IS_UNDER_CAC(rfctl) (IS_CH_WAITING(rfctl) && rtw_time_after(rtw_get_current_time(), (rfctl)->cac_start_time))
+#define IS_RADAR_DETECTED(rfctl) ((rfctl)->radar_detected)
 #else
 #define IS_CAC_STOPPED(rfctl) 1
 #define IS_CH_WAITING(rfctl) 0
 #define IS_UNDER_CAC(rfctl) 0
+#define IS_RADAR_DETECTED(rfctl) 0
 #endif /* CONFIG_DFS_MASTER */
 
+#ifdef CONFIG_DFS_SLAVE_WITH_RADAR_DETECT
+#define IS_DFS_SLAVE_WITH_RD(rfctl) ((rfctl)->dfs_slave_with_rd)
+#else
+#define IS_DFS_SLAVE_WITH_RD(rfctl) 0
+#endif
+
 #ifdef CONFIG_MBSSID_CAM
 #define TOTAL_MBID_CAM_NUM	8
 #define INVALID_CAM_ID			0xFF
@@ -933,6 +992,21 @@ struct halmacpriv {
 };
 #endif /* RTW_HALMAC */
 
+#ifdef CONFIG_FW_MULTI_PORT_SUPPORT
+/*info for H2C-0x2C*/
+struct dft_info {
+	u8 port_id;
+	u8 mac_id;
+};
+#endif
+
+#ifdef CONFIG_HW_P0_TSF_SYNC
+struct tsf_info {
+	u8 sync_port;/*port_x's tsf sync to port_0*/
+	u8 offset; /*tsf timer offset*/
+};
+#endif
+
 struct dvobj_priv {
 	/*-------- below is common data --------*/
 	u8	chip_type;
@@ -962,6 +1036,10 @@ struct dvobj_priv {
 	_mutex sd_indirect_access_mutex;
 #endif
 
+#ifdef CONFIG_SYSON_INDIRECT_ACCESS
+	_mutex syson_indirect_access_mutex;	/* System On Reg R/W */
+#endif
+
 	unsigned char	oper_channel; /* saved channel info when call set_channel_bw */
 	unsigned char	oper_bwmode;
 	unsigned char	oper_ch_offset;/* PRIME_CHNL_OFFSET */
@@ -972,14 +1050,27 @@ struct dvobj_priv {
 	struct mi_state iface_state;
 
 #ifdef CONFIG_AP_MODE
-	u8 nr_ap_if; /* total interface s number of ap/go mode. */
-	u16 inter_bcn_space; /* unit:ms */
+	#ifdef CONFIG_SUPPORT_MULTI_BCN
+	u8		nr_ap_if; /* total interface number of ap /go /mesh / nan mode. */
+	u16		inter_bcn_space; /* unit:ms */
 	_queue	ap_if_q;
-#ifdef CONFIG_RTW_REPEATER_SON
+	u8		vap_map;
+	u8		fw_bcn_offload;
+	u8		vap_tbtt_rpt_map;
+	#endif /*CONFIG_SUPPORT_MULTI_BCN*/
+	#ifdef CONFIG_RTW_REPEATER_SON
 	struct rtw_rson_struct  rson_data;
+	#endif
+#endif
+#ifdef CONFIG_CLIENT_PORT_CFG
+	struct clt_port_t clt_port;
 #endif
 
+#ifdef CONFIG_HW_P0_TSF_SYNC
+	struct tsf_info p0_tsf;
 #endif
+	systime periodic_tsf_update_etime;
+	_timer periodic_tsf_update_end_timer;
 
 	struct macid_ctl_t macid_ctl;
 
@@ -1037,8 +1128,14 @@ struct dvobj_priv {
 #endif /* RTW_HALMAC */
 
 #ifdef CONFIG_FW_MULTI_PORT_SUPPORT
-	u8 default_port_id;
+	/*info for H2C-0x2C*/
+	struct dft_info dft;
 #endif
+
+#ifdef CONFIG_RTW_WIFI_HAL
+	u32 nodfs;
+#endif
+
 	/*-------- below is for SDIO INTERFACE --------*/
 
 #ifdef INTF_DATA
@@ -1161,6 +1258,15 @@ struct dvobj_priv {
 #ifdef CONFIG_MCC_MODE
 	struct mcc_obj_priv mcc_objpriv;
 #endif /*CONFIG_MCC_MODE */
+
+#ifdef CONFIG_RTW_TPT_MODE
+	u8 tpt_mode; /* RTK T/P Testing Mode, 0:default mode */
+	u32 edca_be_ul;
+	u32 edca_be_dl;
+#endif 
+	/* also for RTK T/P Testing Mode */ 
+	u8 scan_deny;
+
 };
 
 #define DEV_STA_NUM(_dvobj)			MSTATE_STA_NUM(&((_dvobj)->iface_state))
@@ -1174,6 +1280,9 @@ struct dvobj_priv {
 #define DEV_ADHOC_LD_NUM(_dvobj)	MSTATE_ADHOC_LD_NUM(&((_dvobj)->iface_state))
 #define DEV_MESH_NUM(_dvobj)		MSTATE_MESH_NUM(&((_dvobj)->iface_state))
 #define DEV_MESH_LD_NUM(_dvobj)		MSTATE_MESH_LD_NUM(&((_dvobj)->iface_state))
+#define DEV_P2P_DV_NUM(_dvobj)		MSTATE_P2P_DV_NUM(&((_dvobj)->iface_state))
+#define DEV_P2P_GC_NUM(_dvobj)		MSTATE_P2P_GC_NUM(&((_dvobj)->iface_state))
+#define DEV_P2P_GO_NUM(_dvobj)		MSTATE_P2P_GO_NUM(&((_dvobj)->iface_state))
 #define DEV_SCAN_NUM(_dvobj)		MSTATE_SCAN_NUM(&((_dvobj)->iface_state))
 #define DEV_WPS_NUM(_dvobj)			MSTATE_WPS_NUM(&((_dvobj)->iface_state))
 #define DEV_ROCH_NUM(_dvobj)		MSTATE_ROCH_NUM(&((_dvobj)->iface_state))
@@ -1213,7 +1322,7 @@ static inline void dev_clr_drv_stopped(struct dvobj_priv *dvobj)
 #define dev_is_drv_stopped(dvobj)		(ATOMIC_READ(&dvobj->bDriverStopped) == _TRUE)
 
 #ifdef PLATFORM_LINUX
-static struct device *dvobj_to_dev(struct dvobj_priv *dvobj)
+static inline struct device *dvobj_to_dev(struct dvobj_priv *dvobj)
 {
 	/* todo: get interface type from dvobj and the return the dev accordingly */
 #ifdef RTW_DVOBJ_CHIP_HW_TYPE
@@ -1248,6 +1357,19 @@ enum _hw_port {
 	MAX_HW_PORT,
 };
 
+#ifdef CONFIG_CLIENT_PORT_CFG
+enum _client_port {
+	CLT_PORT0 = HW_PORT1,
+	CLT_PORT1 = HW_PORT2,
+	CLT_PORT2 = HW_PORT3,
+	CLT_PORT3 = HW_PORT4,
+	CLT_PORT_INVALID = HW_PORT0,
+};
+
+#define MAX_CLIENT_PORT_NUM	4
+#define get_clt_port(adapter) (adapter->client_port)
+#endif
+
 enum _ADAPTER_TYPE {
 	PRIMARY_ADAPTER,
 	VIRTUAL_ADAPTER,
@@ -1295,11 +1417,6 @@ typedef struct loopbackdata {
 } LOOPBACKDATA, *PLOOPBACKDATA;
 #endif
 
-struct tsf_info {
-	u8 sync_port;/*tsf sync from portx*/
-	u8 offset; /*tsf timer offset*/
-};
-
 #define ADAPTER_TX_BW_2G(adapter) BW_MODE_2G((adapter)->driver_tx_bw_mode)
 #define ADAPTER_TX_BW_5G(adapter) BW_MODE_5G((adapter)->driver_tx_bw_mode)
 
@@ -1308,8 +1425,10 @@ struct _ADAPTER {
 	int	pid[3];/* process id from UI, 0:wps, 1:hostapd, 2:dhcpcd */
 	int	bDongle;/* build-in module or external dongle */
 
+	#if defined(CONFIG_AP_MODE) && defined(CONFIG_SUPPORT_MULTI_BCN)
 	_list	list;
-
+	u8 vap_id;
+	#endif
 	struct dvobj_priv *dvobj;
 	struct	mlme_priv mlmepriv;
 	struct	mlme_ext_priv mlmeextpriv;
@@ -1327,10 +1446,6 @@ struct _ADAPTER {
 	struct	security_priv	securitypriv;
 	_lock   security_key_mutex; /* add for CONFIG_IEEE80211W, none 11w also can use */
 	struct	registry_priv	registrypriv;
-#ifdef CONFIG_RTW_LED
-	struct	led_priv	ledpriv;
-#endif
-
 
 #ifdef CONFIG_RTW_NAPI
 	struct	napi_struct napi;
@@ -1495,12 +1610,14 @@ struct _ADAPTER {
 	**	refer to iface_id if iface_nums>2 and isprimary is false and the adapter_type value is 0xff.*/
 	u8 adapter_type;/*be used in  Multi-interface to recognize whether is PRIMARY_ADAPTER  or not(PRIMARY_ADAPTER/VIRTUAL_ADAPTER) .*/
 	u8 hw_port; /*interface port type, it depends on HW port */
-	struct tsf_info tsf;
 
+	#ifdef CONFIG_CLIENT_PORT_CFG
+	u8 client_id;
+	u8 client_port;
+	#endif
+	/*struct tsf_info tsf;*//*reserve define for 8814B*/
 
 	/*extend to support multi interface*/
-	/*IFACE_ID0 is equals to PRIMARY_ADAPTER
-	IFACE_ID1 is equals to VIRTUAL_ADAPTER*/
 	u8 iface_id;
 
 #ifdef CONFIG_BR_EXT
@@ -1574,6 +1691,16 @@ struct _ADAPTER {
 #ifdef CONFIG_MCC_MODE
 	struct mcc_adapter_priv mcc_adapterpriv;
 #endif /* CONFIG_MCC_MODE */
+
+#ifdef CONFIG_RTW_MESH
+	struct rtw_mesh_cfg mesh_cfg;
+	struct rtw_mesh_info mesh_info;
+	_timer mesh_path_timer;
+	_timer mesh_path_root_timer;
+	_timer mesh_atlm_param_req_timer; /* airtime link metrics param request timer */
+	_workitem mesh_work;
+	unsigned long wrkq_flags;
+#endif /* CONFIG_RTW_MESH */
 };
 
 #define adapter_to_dvobj(adapter) ((adapter)->dvobj)
@@ -1590,6 +1717,11 @@ struct _ADAPTER {
 #define adapter_to_macidctl(adapter) dvobj_to_macidctl(adapter_to_dvobj((adapter)))
 
 #define adapter_mac_addr(adapter) (adapter->mac_addr)
+#ifdef CONFIG_RTW_CFGVENDOR_RANDOM_MAC_OUI
+#define adapter_pno_mac_addr(adapter) \
+	((adapter_wdev_data(adapter))->pno_mac_addr)
+#endif
+
 #define adapter_to_chset(adapter) (adapter_to_rfctl((adapter))->channel_set)
 
 #define mlme_to_adapter(mlme) container_of((mlme), struct _ADAPTER, mlmepriv)
diff --git a/rtl8723DS/include/drv_types_ce.h b/rtl8723DS/include/drv_types_ce.h
index c00dea8..c00dea8 100755..100644
--- a/rtl8723DS/include/drv_types_ce.h
+++ b/rtl8723DS/include/drv_types_ce.h
diff --git a/rtl8723DS/include/drv_types_gspi.h b/rtl8723DS/include/drv_types_gspi.h
index c22c497..c22c497 100755..100644
--- a/rtl8723DS/include/drv_types_gspi.h
+++ b/rtl8723DS/include/drv_types_gspi.h
diff --git a/rtl8723DS/include/drv_types_linux.h b/rtl8723DS/include/drv_types_linux.h
index 91ca68b..91ca68b 100755..100644
--- a/rtl8723DS/include/drv_types_linux.h
+++ b/rtl8723DS/include/drv_types_linux.h
diff --git a/rtl8723DS/include/drv_types_pci.h b/rtl8723DS/include/drv_types_pci.h
index a3a4927..a3a4927 100755..100644
--- a/rtl8723DS/include/drv_types_pci.h
+++ b/rtl8723DS/include/drv_types_pci.h
diff --git a/rtl8723DS/include/drv_types_sdio.h b/rtl8723DS/include/drv_types_sdio.h
index cb219e0..9feca12 100755..100644
--- a/rtl8723DS/include/drv_types_sdio.h
+++ b/rtl8723DS/include/drv_types_sdio.h
@@ -26,9 +26,6 @@
 		#include <linux/gpio.h>
 		#include <custom_gpio.h>
 	#endif /* CONFIG_PLATFORM_SPRD */
-	#ifdef CONFIG_PM
-		#include <linux/pm_runtime.h>
-	#endif
 #endif
 
 #ifdef PLATFORM_OS_XP
diff --git a/rtl8723DS/include/drv_types_xp.h b/rtl8723DS/include/drv_types_xp.h
index 81c4504..81c4504 100755..100644
--- a/rtl8723DS/include/drv_types_xp.h
+++ b/rtl8723DS/include/drv_types_xp.h
diff --git a/rtl8723DS/include/ethernet.h b/rtl8723DS/include/ethernet.h
index 2bafa4d..2bafa4d 100755..100644
--- a/rtl8723DS/include/ethernet.h
+++ b/rtl8723DS/include/ethernet.h
diff --git a/rtl8723DS/include/gspi_hal.h b/rtl8723DS/include/gspi_hal.h
index 6da0f07..6da0f07 100755..100644
--- a/rtl8723DS/include/gspi_hal.h
+++ b/rtl8723DS/include/gspi_hal.h
diff --git a/rtl8723DS/include/gspi_ops.h b/rtl8723DS/include/gspi_ops.h
index bcfaad2..bcfaad2 100755..100644
--- a/rtl8723DS/include/gspi_ops.h
+++ b/rtl8723DS/include/gspi_ops.h
diff --git a/rtl8723DS/include/gspi_ops_linux.h b/rtl8723DS/include/gspi_ops_linux.h
index 0ba263d..0ba263d 100755..100644
--- a/rtl8723DS/include/gspi_ops_linux.h
+++ b/rtl8723DS/include/gspi_ops_linux.h
diff --git a/rtl8723DS/include/gspi_osintf.h b/rtl8723DS/include/gspi_osintf.h
index 6393f77..6393f77 100755..100644
--- a/rtl8723DS/include/gspi_osintf.h
+++ b/rtl8723DS/include/gspi_osintf.h
diff --git a/rtl8723DS/include/h2clbk.h b/rtl8723DS/include/h2clbk.h
index 4e22afc..4e22afc 100755..100644
--- a/rtl8723DS/include/h2clbk.h
+++ b/rtl8723DS/include/h2clbk.h
diff --git a/rtl8723DS/include/hal_btcoex.h b/rtl8723DS/include/hal_btcoex.h
index 03021fe..03021fe 100755..100644
--- a/rtl8723DS/include/hal_btcoex.h
+++ b/rtl8723DS/include/hal_btcoex.h
diff --git a/rtl8723DS/include/hal_btcoex_wifionly.h b/rtl8723DS/include/hal_btcoex_wifionly.h
index b41bc36..c18d20e 100755..100644
--- a/rtl8723DS/include/hal_btcoex_wifionly.h
+++ b/rtl8723DS/include/hal_btcoex_wifionly.h
@@ -65,12 +65,14 @@ void halwifionly_phy_set_rf_reg(PVOID pwifionlyContext, enum rf_path eRFPath, u3
 void halwifionly_phy_set_bb_reg(PVOID pwifionlyContext, u32 RegAddr, u32 BitMask, u32 Data);
 void hal_btcoex_wifionly_switchband_notify(PADAPTER padapter);
 void hal_btcoex_wifionly_scan_notify(PADAPTER padapter);
+void hal_btcoex_wifionly_connect_notify(PADAPTER padapter);
 void hal_btcoex_wifionly_hw_config(PADAPTER padapter);
 void hal_btcoex_wifionly_initlizevariables(PADAPTER padapter);
 void hal_btcoex_wifionly_AntInfoSetting(PADAPTER padapter);
 #else
 #define hal_btcoex_wifionly_switchband_notify(padapter)
 #define hal_btcoex_wifionly_scan_notify(padapter)
+#define hal_btcoex_wifionly_connect_notify(padapter)
 #define hal_btcoex_wifionly_hw_config(padapter)
 #define hal_btcoex_wifionly_initlizevariables(padapter)
 #define hal_btcoex_wifionly_AntInfoSetting(padapter)
diff --git a/rtl8723DS/include/hal_com.h b/rtl8723DS/include/hal_com.h
index 1ac16c5..a9fb90c 100755..100644
--- a/rtl8723DS/include/hal_com.h
+++ b/rtl8723DS/include/hal_com.h
@@ -265,6 +265,8 @@ struct dbg_rx_counter {
 	u32	rx_ht_fa;
 };
 
+u8 rtw_hal_get_port(_adapter *adapter);
+
 #ifdef CONFIG_MBSSID_CAM
 	#define DBG_MBID_CAM_DUMP
 
@@ -275,7 +277,10 @@ struct dbg_rx_counter {
 	u8 rtw_get_mbid_cam_entry_num(_adapter *adapter);
 	int rtw_mbid_cam_cache_dump(void *sel, const char *fun_name , _adapter *adapter);
 	int rtw_mbid_cam_dump(void *sel, const char *fun_name, _adapter *adapter);
-	void rtw_mbid_cam_restore(_adapter *adapter);
+	void rtw_mi_set_mbid_cam(_adapter *adapter);
+	u8 rtw_mbid_camid_alloc(_adapter *adapter, u8 *mac_addr);
+	void rtw_ap_set_mbid_num(_adapter *adapter, u8 ap_num);
+	void rtw_mbid_cam_enable(_adapter *adapter);
 #endif
 
 #ifdef CONFIG_MI_WITH_MBSSID_CAM
@@ -284,6 +289,7 @@ struct dbg_rx_counter {
 	#ifdef CONFIG_SWTIMER_BASED_TXBCN
 	u16 rtw_hal_bcn_interval_adjust(_adapter *adapter, u16 bcn_interval);
 	#endif
+	void hw_var_set_opmode_mbid(_adapter *Adapter, u8 mode);
 #endif
 
 void rtw_dump_mac_rx_counters(_adapter *padapter, struct dbg_rx_counter *rx_counter);
@@ -343,6 +349,7 @@ bool hal_chk_proto_cap(_adapter *adapter, u8 cap);
 bool hal_is_band_support(_adapter *adapter, u8 band);
 bool hal_is_bw_support(_adapter *adapter, u8 bw);
 bool hal_is_wireless_mode_support(_adapter *adapter, u8 mode);
+bool hal_is_mimo_support(_adapter *adapter);
 u8 hal_largest_bw(_adapter *adapter, u8 in_bw);
 
 bool hal_chk_wl_func(_adapter *adapter, u8 func);
@@ -358,6 +365,10 @@ void hal_com_config_channel_plan(
 );
 
 int hal_config_macaddr(_adapter *adapter, bool autoload_fail);
+#ifdef RTW_HALMAC
+void rtw_hal_hw_port_enable(_adapter *adapter);
+void rtw_hal_hw_port_disable(_adapter *adapter);
+#endif
 
 BOOLEAN
 HAL_IsLegalChannel(
@@ -382,7 +393,7 @@ Hal_MappingOutPipe(
 
 void rtw_dump_fw_info(void *sel, _adapter *adapter);
 void rtw_restore_hw_port_cfg(_adapter *adapter);
-void rtw_restore_mac_addr(_adapter *adapter);/*set mac addr when hal_init for all iface*/
+void rtw_mi_set_mac_addr(_adapter *adapter);/*set mac addr when hal_init for all iface*/
 void rtw_hal_dump_macaddr(void *sel, _adapter *adapter);
 
 void rtw_init_hal_com_default_value(PADAPTER Adapter);
@@ -418,6 +429,11 @@ u8 rtw_hal_rcr_add(_adapter *adapter, u32 add);
 u8 rtw_hal_rcr_clear(_adapter *adapter, u32 clear);
 void rtw_hal_rcr_set_chk_bssid(_adapter *adapter, u8 self_action);
 
+void rtw_iface_enable_tsf_update(_adapter *adapter);
+void rtw_iface_disable_tsf_update(_adapter *adapter);
+void rtw_hal_periodic_tsf_update_chk(_adapter *adapter);
+void rtw_hal_periodic_tsf_update_end_timer_hdl(void *ctx);
+
 void hw_var_port_switch(_adapter *adapter);
 
 u8 SetHwReg(PADAPTER padapter, u8 variable, u8 *val);
@@ -492,13 +508,12 @@ void linked_info_dump(_adapter *padapter, u8 benable);
 #endif
 void rtw_store_phy_info(_adapter *padapter, union recv_frame *prframe);
 #define		HWSET_MAX_SIZE			1024
+
 #ifdef CONFIG_EFUSE_CONFIG_FILE
-	#define		EFUSE_FILE_COLUMN_NUM		16
-	u32 Hal_readPGDataFromConfigFile(PADAPTER padapter);
-	u32 Hal_ReadMACAddrFromFile(PADAPTER padapter, u8 *mac_addr);
+u32 Hal_readPGDataFromConfigFile(PADAPTER padapter);
+u32 Hal_ReadMACAddrFromFile(PADAPTER padapter, u8 *mac_addr);
 #endif /* CONFIG_EFUSE_CONFIG_FILE */
 
-int check_phy_efuse_tx_power_info_valid(PADAPTER padapter);
 int hal_efuse_macaddr_offset(_adapter *adapter);
 int Hal_GetPhyEfuseMACAddr(PADAPTER padapter, u8 *mac_addr);
 void rtw_dump_cur_efuse(PADAPTER padapter);
@@ -512,13 +527,16 @@ u8 rtw_hal_busagg_qsel_check(_adapter *padapter, u8 pre_qsel, u8 next_qsel);
 
 u8 rtw_get_current_tx_rate(_adapter *padapter, struct sta_info *psta);
 u8 rtw_get_current_tx_sgi(_adapter *padapter, struct sta_info *psta);
-
+#ifdef CONFIG_CUSTOMER01_SMART_ANTENNA
+void rtw_hal_set_pathb_phase(_adapter *adapter, u8 phase_idx);
+#endif
 void rtw_hal_set_fw_rsvd_page(_adapter *adapter, bool finished);
 u8 rtw_hal_get_rsvd_page_num(struct _ADAPTER *adapter);
 
 #ifdef CONFIG_TSF_RESET_OFFLOAD
 int rtw_hal_reset_tsf(_adapter *adapter, u8 reset_port);
 #endif
+u64 rtw_hal_get_tsftr_by_port(_adapter *adapter, u8 port);
 
 #ifdef CONFIG_TDLS
 	#ifdef CONFIG_TDLS_CH_SW
@@ -526,7 +544,7 @@ int rtw_hal_reset_tsf(_adapter *adapter, u8 reset_port);
 	#endif
 #endif
 #if defined(CONFIG_BT_COEXIST) && defined(CONFIG_FW_MULTI_PORT_SUPPORT)
-s32 rtw_hal_set_wifi_port_id_cmd(_adapter *adapter);
+s32 rtw_hal_set_wifi_btc_port_id_cmd(_adapter *adapter);
 #endif
 
 #ifdef CONFIG_GPIO_API
@@ -554,16 +572,13 @@ void rtw_hal_ch_sw_iqk_info_restore(_adapter *padapter, u8 ch_sw_use_case);
 #endif
 
 void update_IOT_info(_adapter *padapter);
-
+#ifdef CONFIG_RTS_FULL_BW
+void rtw_set_rts_bw(_adapter *padapter);
+#endif/*CONFIG_RTS_FULL_BW*/
 void hal_set_crystal_cap(_adapter *adapter, u8 crystal_cap);
-void rtw_hal_correct_tsf(_adapter *padapter, u8 hw_port, u64 tsf);
 
 void ResumeTxBeacon(_adapter *padapter);
 void StopTxBeacon(_adapter *padapter);
-#ifdef CONFIG_MI_WITH_MBSSID_CAM /*HW port0 - MBSS*/
-	void hw_var_set_opmode_mbid(_adapter *Adapter, u8 mode);
-	u8 rtw_mbid_camid_alloc(_adapter *adapter, u8 *mac_addr);
-#endif
 
 #ifdef CONFIG_ANTENNA_DIVERSITY
 	u8	rtw_hal_antdiv_before_linked(_adapter *padapter);
@@ -593,7 +608,8 @@ void StopTxBeacon(_adapter *padapter);
 enum lps_pg_hdl_id {
 	LPS_PG_INFO_CFG = 0,
 	LPS_PG_REDLEMEM,
-	LPS_PG_RESEND_H2C,
+	LPS_PG_PHYDM_DIS,
+	LPS_PG_PHYDM_EN,
 };
 
 	u8 rtw_hal_set_lps_pg_info(_adapter *adapter);
@@ -602,7 +618,7 @@ enum lps_pg_hdl_id {
 int rtw_hal_get_rsvd_page(_adapter *adapter, u32 page_offset, u32 page_num, u8 *buffer, u32 buffer_size);
 void rtw_hal_construct_beacon(_adapter *padapter, u8 *pframe, u32 *pLength);
 void rtw_hal_construct_NullFunctionData(PADAPTER, u8 *pframe, u32 *pLength,
-				u8 *StaAddr, u8 bQoS, u8 AC, u8 bEosp, u8 bForcePowerSave);
+				u8 bQoS, u8 AC, u8 bEosp, u8 bForcePowerSave);
 
 #ifdef CONFIG_WOWLAN
 struct rtl_wow_pattern {
@@ -646,6 +662,11 @@ void rtw_dump_fifo(void *sel, _adapter *adapter, u8 fifo_sel, u32 fifo_addr, u32
 s32 rtw_hal_set_default_port_id_cmd(_adapter *adapter, u8 mac_id);
 s32 rtw_set_default_port_id(_adapter *adapter);
 s32 rtw_set_ps_rsvd_page(_adapter *adapter);
+
+#define get_dft_portid(adapter) (adapter_to_dvobj(adapter)->dft.port_id)
+#define get_dft_macid(adapter) (adapter_to_dvobj(adapter)->dft.mac_id)
+
+/*void rtw_search_default_port(_adapter *adapter);*/
 #endif
 
 #ifdef CONFIG_P2P_PS
@@ -660,6 +681,10 @@ void rtw_hal_switch_chnl_and_set_bw_offload(_adapter *adapter, u8 central_ch, u8
 
 s16 translate_dbm_to_percentage(s16 signal);
 
+#ifdef CONFIG_SUPPORT_MULTI_BCN
+void rtw_ap_multi_bcn_cfg(_adapter *adapter);
+#endif
+
 #ifdef CONFIG_SWTIMER_BASED_TXBCN
 #ifdef CONFIG_BCN_RECOVERY
 u8 rtw_ap_bcn_recovery(_adapter *padapter);
@@ -669,4 +694,26 @@ u8 rtw_ap_bcn_queue_empty_check(_adapter *padapter, u32 txbcn_timer_ms);
 #endif
 #endif /*CONFIG_SWTIMER_BASED_TXBCN*/
 
+#ifdef CONFIG_FW_HANDLE_TXBCN
+void rtw_ap_mbid_bcn_en(_adapter *adapter, u8 mbcn_id);
+void rtw_ap_mbid_bcn_dis(_adapter *adapter, u8 mbcn_id);
+#endif
+
+void rtw_hal_get_rf_path(struct dvobj_priv *d, enum rf_type *type,
+			 enum bb_path *tx, enum bb_path *rx);
+#ifdef CONFIG_BEAMFORMING
+#ifdef RTW_BEAMFORMING_VERSION_2
+void rtw_hal_beamforming_config_csirate(PADAPTER adapter);
+#endif
+#endif
+#if defined(CONFIG_RTL8814A) || defined(CONFIG_RTL8812A) ||\
+	defined(CONFIG_RTL8192F) || defined(CONFIG_RTL8192E) ||\
+	defined(CONFIG_RTL8822B) || defined(CONFIG_RTL8821A)
+u8 phy_get_current_tx_num(IN PADAPTER pAdapter, IN u8 Rate);
+#endif
+
+#ifdef CONFIG_RTL8812A
+u8 * rtw_hal_set_8812a_vendor_ie(_adapter *padapter , u8 *pframe ,uint *frlen );
+#endif
+
 #endif /* __HAL_COMMON_H__ */
diff --git a/rtl8723DS/include/hal_com_h2c.h b/rtl8723DS/include/hal_com_h2c.h
index 3200c96..b8b58e7 100755..100644
--- a/rtl8723DS/include/hal_com_h2c.h
+++ b/rtl8723DS/include/hal_com_h2c.h
@@ -80,7 +80,9 @@ enum h2c_cmd {
 	H2C_DYNAMIC_TX_PATH = 0x48,/* for 8814A */
 
 	H2C_FW_TRACE_EN = 0x49,
-
+#ifdef RTW_PER_CMD_SUPPORT_FW
+	H2C_REQ_PER_RPT = 0x4e,
+#endif
 	/* BT Class: 011 */
 	H2C_B_TYPE_TDMA = 0x60,
 	H2C_BT_INFO = 0x61,
@@ -108,16 +110,23 @@ enum h2c_cmd {
 	H2C_AOAC_RSVDPAGE3 = 0x88,
 	H2C_P2P_OFFLOAD_RSVD_PAGE = 0x8A,
 	H2C_P2P_OFFLOAD = 0x8B,
-
+#ifdef CONFIG_FW_HANDLE_TXBCN
+	H2C_FW_BCN_OFFLOAD = 0xBA,
+#endif
 	H2C_RESET_TSF = 0xC0,
+#ifdef CONFIG_FW_CORRECT_BCN
 	H2C_BCNHWSEQ = 0xC5,
+#endif
 	H2C_CUSTOMER_STR_W1 = 0xC6,
 	H2C_CUSTOMER_STR_W2 = 0xC7,
 	H2C_CUSTOMER_STR_W3 = 0xC8,
+#ifdef DBG_FW_DEBUG_MSG_PKT
+	H2C_FW_DBG_MSG_PKT = 0xE1,
+#endif /*DBG_FW_DEBUG_MSG_PKT*/
 	H2C_MAXID,
 };
 
-#define H2C_INACTIVE_PS_LEN		3
+#define H2C_INACTIVE_PS_LEN		4
 #define H2C_RSVDPAGE_LOC_LEN		5
 #ifdef CONFIG_FW_MULTI_PORT_SUPPORT
 #define H2C_DEFAULT_PORT_ID_LEN		2
@@ -134,7 +143,7 @@ enum h2c_cmd {
 #define H2C_PSTUNEPARAM_LEN			4
 #define H2C_MACID_CFG_LEN		7
 #define H2C_BTMP_OPER_LEN			5
-#define H2C_WOWLAN_LEN			6
+#define H2C_WOWLAN_LEN			7
 #define H2C_REMOTE_WAKE_CTRL_LEN	3
 #define H2C_AOAC_GLOBAL_INFO_LEN	2
 #define H2C_AOAC_RSVDPAGE_LOC_LEN	7
@@ -171,6 +180,11 @@ enum h2c_cmd {
 #if defined(CONFIG_BT_COEXIST) && defined(CONFIG_FW_MULTI_PORT_SUPPORT)
 #define H2C_BTC_WL_PORT_ID_LEN	1
 #endif
+
+#ifdef DBG_FW_DEBUG_MSG_PKT
+	#define H2C_FW_DBG_MSG_PKT_LEN	2
+#endif /*DBG_FW_DEBUG_MSG_PKT*/
+
 #define H2C_SINGLE_CHANNELSWITCH_V2_LEN 2
 
 #define eq_mac_addr(a, b)						(((a)[0] == (b)[0] && (a)[1] == (b)[1] && (a)[2] == (b)[2] && (a)[3] == (b)[3] && (a)[4] == (b)[4] && (a)[5] == (b)[5]) ? 1 : 0)
@@ -179,29 +193,6 @@ enum h2c_cmd {
 
 
 #if defined(CONFIG_WOWLAN) || defined(CONFIG_AP_WOWLAN)
-/*
-* ARP packet
-*
-* LLC Header */
-#define GET_ARP_PKT_LLC_TYPE(__pHeader)					ReadLE2Byte(((u8 *)(__pHeader)) + 6)
-
-/* ARP element */
-#define GET_ARP_PKT_OPERATION(__pHeader)				ReadLE2Byte(((u8 *)(__pHeader)) + 6)
-#define GET_ARP_PKT_SENDER_MAC_ADDR(__pHeader, _val)	cp_mac_addr((u8 *)(_val), ((u8 *)(__pHeader))+8)
-#define GET_ARP_PKT_SENDER_IP_ADDR(__pHeader, _val)		cpIpAddr((u8 *)(_val), ((u8 *)(__pHeader))+14)
-#define GET_ARP_PKT_TARGET_MAC_ADDR(__pHeader, _val)	cp_mac_addr((u8 *)(_val), ((u8 *)(__pHeader))+18)
-#define GET_ARP_PKT_TARGET_IP_ADDR(__pHeader, _val)	cpIpAddr((u8 *)(_val), ((u8 *)(__pHeader))+24)
-
-#define SET_ARP_PKT_HW(__pHeader, __Value)					WriteLE2Byte(((u8 *)(__pHeader)) + 0, __Value)
-#define SET_ARP_PKT_PROTOCOL(__pHeader, __Value)			WriteLE2Byte(((u8 *)(__pHeader)) + 2, __Value)
-#define SET_ARP_PKT_HW_ADDR_LEN(__pHeader, __Value)			WriteLE1Byte(((u8 *)(__pHeader)) + 4, __Value)
-#define SET_ARP_PKT_PROTOCOL_ADDR_LEN(__pHeader, __Value)	WriteLE1Byte(((u8 *)(__pHeader)) + 5, __Value)
-#define SET_ARP_PKT_OPERATION(__pHeader, __Value)			WriteLE2Byte(((u8 *)(__pHeader)) + 6, __Value)
-#define SET_ARP_PKT_SENDER_MAC_ADDR(__pHeader, _val)	cp_mac_addr(((u8 *)(__pHeader))+8, (u8 *)(_val))
-#define SET_ARP_PKT_SENDER_IP_ADDR(__pHeader, _val)		cpIpAddr(((u8 *)(__pHeader))+14, (u8 *)(_val))
-#define SET_ARP_PKT_TARGET_MAC_ADDR(__pHeader, _val)	cp_mac_addr(((u8 *)(__pHeader))+18, (u8 *)(_val))
-#define SET_ARP_PKT_TARGET_IP_ADDR(__pHeader, _val)		cpIpAddr(((u8 *)(__pHeader))+24, (u8 *)(_val))
-
 #define FW_WOWLAN_FUN_EN				BIT(0)
 #define FW_WOWLAN_PATTERN_MATCH			BIT(1)
 #define FW_WOWLAN_MAGIC_PKT				BIT(2)
@@ -226,6 +217,9 @@ enum h2c_cmd {
 #define FW_REALWOWLAN_EN				BIT(5)
 #define FW_WOW_FW_UNICAST_EN			BIT(7)
 
+#define FW_IPS_DISABLE_BBRF		BIT(0)
+#define FW_IPS_WRC				BIT(1)
+
 #endif /* CONFIG_WOWLAN */
 
 /* _RSVDPAGE_LOC_CMD_0x00 */
@@ -283,9 +277,12 @@ s32 rtw_hal_set_FwMediaStatusRpt_range_cmd(_adapter *adapter, bool opmode, bool
 /* _DISCONNECT_DECISION_CMD_0x04 */
 #define SET_H2CCMD_DISCONDECISION_PARM_ENABLE(__pH2CCmd, __Value)		SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 1, __Value)
 #define SET_H2CCMD_DISCONDECISION_PARM_ADOPT(__pH2CCmd, __Value)		SET_BITS_TO_LE_1BYTE(__pH2CCmd, 1, 1, __Value)
+#define SET_H2CCMD_DISCONDECISION_PARM_TRY_BCN_FAIL_EN(__pH2CCmd, __Value)		SET_BITS_TO_LE_1BYTE(__pH2CCmd, 2, 1, __Value)
+#define SET_H2CCMD_DISCONDECISION_PARM_DISCONNECT_EN(__pH2CCmd, __Value)		SET_BITS_TO_LE_1BYTE(__pH2CCmd, 3, 1, __Value)
 #define SET_H2CCMD_DISCONDECISION_PORT_NUM(__pH2CCmd, __Value)			SET_BITS_TO_LE_1BYTE(__pH2CCmd, 4, 3, __Value)
 #define SET_H2CCMD_DISCONDECISION_PARM_CHECK_PERIOD(__pH2CCmd, __Value)	SET_BITS_TO_LE_1BYTE(__pH2CCmd+1, 0, 8, __Value)
 #define SET_H2CCMD_DISCONDECISION_PARM_TRY_PKT_NUM(__pH2CCmd, __Value)	SET_BITS_TO_LE_1BYTE(__pH2CCmd+2, 0, 8, __Value)
+#define SET_H2CCMD_DISCONDECISION_PARM_TRY_OK_BCN(__pH2CCmd, __Value)	SET_BITS_TO_LE_1BYTE(__pH2CCmd+3, 0, 8, __Value)
 
 #ifdef CONFIG_RTW_CUSTOMER_STR
 #define RTW_CUSTOMER_STR_LEN 16
@@ -338,6 +335,22 @@ s32 rtw_hal_customer_str_write(_adapter *adapter, const u8 *cs);
 #define SET_H2CCMD_AP_WOW_PS_RF(__pH2CCmd, __Value)			SET_BITS_TO_LE_1BYTE(__pH2CCmd, 2, 1, __Value)
 #define SET_H2CCMD_AP_WOW_PS_DURATION(__pH2CCmd, __Value)	SET_BITS_TO_LE_1BYTE((__pH2CCmd)+1, 0, 8, __Value)
 
+/* INACTIVE_PS 0x27, duration unit is TBTT */
+#define SET_H2CCMD_INACTIVE_PS_EN(__pH2CCmd, __Value) \
+	SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 1, __Value)
+#define SET_H2CCMD_INACTIVE_IGNORE_PS(__pH2CCmd, __Value) \
+	SET_BITS_TO_LE_1BYTE(__pH2CCmd, 1, 1, __Value)
+#define SET_H2CCMD_INACTIVE_PERIOD_SCAN_EN(__pH2CCmd, __Value) \
+	SET_BITS_TO_LE_1BYTE(__pH2CCmd, 2, 1, __Value)
+#define SET_H2CCMD_INACTIVE_DISBBRF(__pH2CCmd, __Value) \
+	SET_BITS_TO_LE_1BYTE(__pH2CCmd, 3, 1, __Value)
+#define SET_H2CCMD_INACTIVE_PS_FREQ(__pH2CCmd, __Value) \
+	SET_BITS_TO_LE_1BYTE(__pH2CCmd + 1, 0, 8, __Value)
+#define SET_H2CCMD_INACTIVE_PS_DURATION(__pH2CCmd, __Value) \
+	SET_BITS_TO_LE_1BYTE(__pH2CCmd + 2, 0, 8, __Value)
+#define SET_H2CCMD_INACTIVE_PS_PERIOD_SCAN_TIME(__pH2CCmd, __Value) \
+	SET_BITS_TO_LE_1BYTE(__pH2CCmd + 3, 0, 8, __Value)
+
 #ifdef CONFIG_LPS_POFF
 /*PARTIAL OFF Control 0x29*/
 #define SET_H2CCMD_LPS_POFF_CTRL_EN(__pH2CCmd, __Value) \
@@ -475,6 +488,9 @@ s32 rtw_hal_customer_str_write(_adapter *adapter, const u8 *cs);
 #define SET_H2CCMD_WOWLAN_UNIT_FOR_UPHY_DISABLE(__pH2CCmd, __Value)		SET_BITS_TO_LE_1BYTE((__pH2CCmd)+4, 3, 1, __Value)
 #define SET_H2CCMD_WOWLAN_TAKE_PDN_UPHY_DIS_EN(__pH2CCmd, __Value)		SET_BITS_TO_LE_1BYTE((__pH2CCmd)+4, 4, 1, __Value)
 #define SET_H2CCMD_WOWLAN_GPIO_INPUT_EN(__pH2CCmd, __Value)		SET_BITS_TO_LE_1BYTE((__pH2CCmd)+4, 5, 1, __Value)
+#define SET_H2CCMD_WOWLAN_DEV2HST_EN(__pH2CCmd, __Value) 	SET_BITS_TO_LE_1BYTE((__pH2CCmd)+4, 7, 1, __Value)
+#define SET_H2CCMD_WOWLAN_TIME_FOR_UPHY_DISABLE(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+5, 0, 8, __Value)
+#define SET_H2CCMD_WOWLAN_RISE_HST2DEV(__pH2CCmd, __Value) 	SET_BITS_TO_LE_1BYTE((__pH2CCmd)+6, 2, 1, __Value)
 
 /* _REMOTE_WAKEUP_CMD_0x81 */
 #define SET_H2CCMD_REMOTE_WAKECTRL_ENABLE(__pH2CCmd, __Value)		SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 1, __Value)
@@ -501,7 +517,9 @@ s32 rtw_hal_customer_str_write(_adapter *adapter, const u8 *cs);
 #define SET_H2CCMD_AOAC_RSVDPAGE_LOC_NEIGHBOR_ADV(__pH2CCmd, __Value)		SET_BITS_TO_LE_1BYTE((__pH2CCmd)+2, 0, 8, __Value)
 #define SET_H2CCMD_AOAC_RSVDPAGE_LOC_GTK_RSP(__pH2CCmd, __Value)		SET_BITS_TO_LE_1BYTE((__pH2CCmd)+3, 0, 8, __Value)
 #define SET_H2CCMD_AOAC_RSVDPAGE_LOC_GTK_INFO(__pH2CCmd, __Value)		SET_BITS_TO_LE_1BYTE((__pH2CCmd)+4, 0, 8, __Value)
+#ifdef CONFIG_GTK_OL
 #define SET_H2CCMD_AOAC_RSVDPAGE_LOC_GTK_EXT_MEM(__pH2CCmd, __Value)		SET_BITS_TO_LE_1BYTE((__pH2CCmd)+5, 0, 8, __Value)
+#endif /* CONFIG_GTK_OL */
 #define SET_H2CCMD_AOAC_RSVDPAGE_LOC_NDP_INFO(__pH2CCmd, __Value) \
 	SET_BITS_TO_LE_1BYTE((__pH2CCmd)+6, 0, 8, __Value)
 
@@ -542,6 +560,11 @@ s32 rtw_hal_customer_str_write(_adapter *adapter, const u8 *cs);
 #define SET_H2CCMD_LPSPG_LOC(__pH2CCmd, __Value)	SET_BITS_TO_LE_1BYTE(__pH2CCmd+1, 0, 8, __Value)/*Loc_LPS_PG*/
 #endif
 
+#ifdef DBG_FW_DEBUG_MSG_PKT
+#define SET_H2CCMD_FW_DBG_MSG_PKT_EN(__pH2CCmd, __Value)	SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 1, __Value)/*sniffer_dbg_en*/
+#define SET_H2CCMD_RSVDPAGE_LOC_FW_DBG_MSG_PKT(__pH2CCmd, __Value)	SET_BITS_TO_LE_1BYTE((__pH2CCmd)+1, 0, 8, __Value) /*loc_debug_packet*/
+#endif /*DBG_FW_DEBUG_MSG_PKT*/
+
 /* ---------------------------------------------------------------------------------------------------------
  * -------------------------------------------    Structure    --------------------------------------------------
  * --------------------------------------------------------------------------------------------------------- */
@@ -559,7 +582,9 @@ typedef struct _RSVDPAGE_LOC {
 	u8 LocGTKInfo;
 	u8 LocProbeReq;
 	u8 LocNetList;
+#ifdef CONFIG_GTK_OL
 	u8 LocGTKEXTMEM;
+#endif /* CONFIG_GTK_OL */
 	u8 LocNDPInfo;
 	u8 LocAOACReport;
 #ifdef CONFIG_PNO_SUPPORT
@@ -577,6 +602,9 @@ typedef struct _RSVDPAGE_LOC {
 	u8 LocInviteRsp;
 	u8 LocPDRsp;
 #endif /* CONFIG_P2P_WOWLAN */
+#ifdef DBG_FW_DEBUG_MSG_PKT
+	u8 loc_fw_dbg_msg_pkt;
+#endif /*DBG_FW_DEBUG_MSG_PKT*/
 } RSVDPAGE_LOC, *PRSVDPAGE_LOC;
 
 #endif
@@ -592,3 +620,8 @@ u8 rtw_hal_set_fw_media_status_cmd(_adapter *adapter, u8 mstatus, u8 macid);
 		u8 rtw_hal_set_p2p_wowlan_offload_cmd(_adapter *adapter);
 	#endif /* CONFIG_P2P_WOWLAN */
 #endif
+
+#ifdef RTW_PER_CMD_SUPPORT_FW
+u8 rtw_hal_set_req_per_rpt_cmd(_adapter *adapter, u8 group_macid,
+			       u8 rpt_type, u32 macid_bitmap);
+#endif
diff --git a/rtl8723DS/include/hal_com_led.h b/rtl8723DS/include/hal_com_led.h
index 8d44191..d88556d 100755..100644
--- a/rtl8723DS/include/hal_com_led.h
+++ b/rtl8723DS/include/hal_com_led.h
@@ -101,17 +101,21 @@ typedef enum _LED_CTL_MODE {
 	LED_CTL_POWER_ON = 1,
 	LED_CTL_LINK = 2,
 	LED_CTL_NO_LINK = 3,
-	LED_CTL_TX = 4,
-	LED_CTL_RX = 5,
-	LED_CTL_SITE_SURVEY = 6,
-	LED_CTL_POWER_OFF = 7,
-	LED_CTL_START_TO_LINK = 8,
-	LED_CTL_START_WPS = 9,
-	LED_CTL_STOP_WPS = 10,
-	LED_CTL_START_WPS_BOTTON = 11, /* added for runtop */
-	LED_CTL_STOP_WPS_FAIL = 12, /* added for ALPHA	 */
-	LED_CTL_STOP_WPS_FAIL_OVERLAP = 13, /* added for BELKIN */
-	LED_CTL_CONNECTION_NO_TRANSFER = 14,
+	LED_CTL_TX = 4, /* unspecific data TX, including single & group addressed */
+	LED_CTL_RX = 5, /* unspecific data RX, including single & group addressed */
+	LED_CTL_UC_TX = 6, /* single addressed data TX */
+	LED_CTL_UC_RX = 7, /* single addressed data RX */
+	LED_CTL_BMC_TX = 8, /* group addressed data TX */
+	LED_CTL_BMC_RX = 9, /* group addressed data RX */
+	LED_CTL_SITE_SURVEY = 10,
+	LED_CTL_POWER_OFF = 11,
+	LED_CTL_START_TO_LINK = 12,
+	LED_CTL_START_WPS = 13,
+	LED_CTL_STOP_WPS = 14,
+	LED_CTL_START_WPS_BOTTON = 15, /* added for runtop */
+	LED_CTL_STOP_WPS_FAIL = 16, /* added for ALPHA	 */
+	LED_CTL_STOP_WPS_FAIL_OVERLAP = 17, /* added for BELKIN */
+	LED_CTL_CONNECTION_NO_TRANSFER = 18,
 } LED_CTL_MODE;
 
 typedef	enum _LED_STATE {
@@ -158,7 +162,8 @@ typedef enum _LED_PIN {
 #ifdef CONFIG_PCI_HCI
 typedef	enum _LED_STRATEGY_PCIE {
 	/* start from 2 */
-	SW_LED_MODE0 = 2, /* SW control 1 LED via GPIO0. It is default option. */
+	SW_LED_MODE_UC_TRX_ONLY = 2,
+	SW_LED_MODE0, /* SW control 1 LED via GPIO0. It is default option. */
 	SW_LED_MODE1, /* SW control for PCI Express */
 	SW_LED_MODE2, /* SW control for Cameo. */
 	SW_LED_MODE3, /* SW contorl for RunTop. */
@@ -219,7 +224,8 @@ gen_RefreshLedState(
 
 typedef	enum _LED_STRATEGY_USB {
 	/* start from 2 */
-	SW_LED_MODE0 = 2, /* SW control 1 LED via GPIO0. It is default option. */
+	SW_LED_MODE_UC_TRX_ONLY = 2,
+	SW_LED_MODE0, /* SW control 1 LED via GPIO0. It is default option. */
 	SW_LED_MODE1, /* 2 LEDs, through LED0 and LED1. For ALPHA. */
 	SW_LED_MODE2, /* SW control 1 LED via GPIO0, customized for AzWave 8187 minicard. */
 	SW_LED_MODE3, /* SW control 1 LED via GPIO0, customized for Sercomm Printer Server case. */
@@ -291,7 +297,8 @@ LedControlUSB(
 
 typedef	enum _LED_STRATEGY_SDIO {
 	/* start from 2 */
-	SW_LED_MODE0 = 2, /* SW control 1 LED via GPIO0. It is default option. */
+	SW_LED_MODE_UC_TRX_ONLY = 2,
+	SW_LED_MODE0, /* SW control 1 LED via GPIO0. It is default option. */
 	SW_LED_MODE1, /* 2 LEDs, through LED0 and LED1. For ALPHA. */
 	SW_LED_MODE2, /* SW control 1 LED via GPIO0, customized for AzWave 8187 minicard. */
 	SW_LED_MODE3, /* SW control 1 LED via GPIO0, customized for Sercomm Printer Server case. */
@@ -340,28 +347,28 @@ LedControlSDIO(
 struct led_priv {
 	LED_STRATEGY		LedStrategy;
 #ifdef CONFIG_RTW_SW_LED
-	/* add for led controll */
 	LED_DATA			SwLed0;
 	LED_DATA			SwLed1;
 	LED_DATA			SwLed2;
 	u8					bRegUseLed;
+	u8 iface_en_mask;
+	u32 ctl_en_mask[CONFIG_IFACE_NUMBER];
 	void (*LedControlHandler)(_adapter *padapter, LED_CTL_MODE LedAction);
 	void (*SwLedOn)(_adapter *padapter, PLED_DATA pLed);
 	void (*SwLedOff)(_adapter *padapter, PLED_DATA pLed);
-	/* add for led controll */
 #endif
 };
 
 #define SwLedOn(adapter, pLed) \
 	do { \
-		if ((adapter)->ledpriv.SwLedOn) \
-			(adapter)->ledpriv.SwLedOn((adapter), (pLed)); \
+		if (adapter_to_led(adapter)->SwLedOn) \
+			adapter_to_led(adapter)->SwLedOn((adapter), (pLed)); \
 	} while (0)
 
 #define SwLedOff(adapter, pLed) \
 	do { \
-		if ((adapter)->ledpriv.SwLedOff) \
-			(adapter)->ledpriv.SwLedOff((adapter), (pLed)); \
+		if (adapter_to_led(adapter)->SwLedOff) \
+			adapter_to_led(adapter)->SwLedOff((adapter), (pLed)); \
 	} while (0)
 
 void BlinkTimerCallback(void *data);
@@ -383,20 +390,12 @@ DeInitLed(
 
 /* hal... */
 extern void BlinkHandler(PLED_DATA	pLed);
+void dump_led_config(void *sel, _adapter *adapter);
+void rtw_led_set_strategy(_adapter *adapter, u8 strategy);
 #endif /* CONFIG_RTW_LED */
 
-#if defined(CONFIG_RTW_LED) && defined(CONFIG_RTW_SW_LED)
-#define rtw_led_control(adapter, LedAction) \
-	do { \
-		if ((adapter)->ledpriv.LedControlHandler) \
-			(adapter)->ledpriv.LedControlHandler((adapter), (LedAction)); \
-	} while (0)
-#else
-#define rtw_led_control(adapter, LedAction) do {} while (0)
-#endif
-
 #if defined(CONFIG_RTW_LED)
-#define rtw_led_get_strategy(adapter) ((adapter)->ledpriv.LedStrategy)
+#define rtw_led_get_strategy(adapter) (adapter_to_led(adapter)->LedStrategy)
 #else
 #define rtw_led_get_strategy(adapter) NO_LED
 #endif
@@ -405,5 +404,34 @@ extern void BlinkHandler(PLED_DATA	pLed);
 #define IS_HW_LED_STRATEGY(s) ((s) == HW_LED)
 #define IS_SW_LED_STRATEGY(s) ((s) != NO_LED && (s) != HW_LED)
 
+#if defined(CONFIG_RTW_LED) && defined(CONFIG_RTW_SW_LED)
+
+#ifndef CONFIG_RTW_SW_LED_TRX_DA_CLASSIFY
+#define CONFIG_RTW_SW_LED_TRX_DA_CLASSIFY 0
+#endif
+
+#if CONFIG_RTW_SW_LED_TRX_DA_CLASSIFY
+void rtw_sw_led_blink_uc_trx_only(LED_DATA *led);
+void rtw_sw_led_ctl_mode_uc_trx_only(_adapter *adapter, LED_CTL_MODE ctl);
+#endif
+void rtw_led_control(_adapter *adapter, LED_CTL_MODE ctl);
+void rtw_led_tx_control(_adapter *adapter, const u8 *da);
+void rtw_led_rx_control(_adapter *adapter, const u8 *da);
+void rtw_led_set_iface_en(_adapter *adapter, u8 en);
+void rtw_led_set_iface_en_mask(_adapter *adapter, u8 mask);
+void rtw_led_set_ctl_en_mask(_adapter *adapter, u32 ctl_mask);
+void rtw_led_set_ctl_en_mask_primary(_adapter *adapter);
+void rtw_led_set_ctl_en_mask_virtual(_adapter *adapter);
+#else
+#define rtw_led_control(adapter, ctl) do {} while (0)
+#define rtw_led_tx_control(adapter, da) do {} while (0)
+#define rtw_led_rx_control(adapter, da) do {} while (0)
+#define rtw_led_set_iface_en(adapter, en) do {} while (0)
+#define rtw_led_set_iface_en_mask(adapter, mask) do {} while (0)
+#define rtw_led_set_ctl_en_mask(adapter, ctl_mask) do {} while (0)
+#define rtw_led_set_ctl_en_mask_primary(adapter) do {} while (0)
+#define rtw_led_set_ctl_en_mask_virtual(adapter) do {} while (0)
+#endif /* defined(CONFIG_RTW_LED) && defined(CONFIG_RTW_SW_LED) */
+
 #endif /*__HAL_COMMON_LED_H_*/
 
diff --git a/rtl8723DS/include/hal_com_phycfg.h b/rtl8723DS/include/hal_com_phycfg.h
index 978e556..51d6429 100755..100644
--- a/rtl8723DS/include/hal_com_phycfg.h
+++ b/rtl8723DS/include/hal_com_phycfg.h
@@ -29,8 +29,6 @@ typedef enum _RF_TX_NUM {
 	RF_TX_NUM_NONIMPLEMENT,
 } RF_TX_NUM;
 
-#define MAX_POWER_INDEX		0x3F
-
 /*------------------------------Define structure----------------------------*/
 typedef struct _BB_REGISTER_DEFINITION {
 	u32 rfintfs;			/* set software control: */
@@ -182,9 +180,9 @@ s8 PHY_GetTxPowerLimit(_adapter *adapter
 	, u8 rfpath, u8 rate, u8 ntx_idx, u8 cch
 );
 #else
-#define phy_get_txpwr_lmt_abs(adapter, regd_name, band, bw, tlrs, ntx_idx, cch, lock) MAX_POWER_INDEX
-#define phy_get_txpwr_lmt(adapter, regd_name, band, bw, rfpath, rs, ntx_idx, cch, lock) MAX_POWER_INDEX
-#define PHY_GetTxPowerLimit(adapter, regd_name, band, bw, rfpath, rate, ntx_idx, cch) MAX_POWER_INDEX
+#define phy_get_txpwr_lmt_abs(adapter, regd_name, band, bw, tlrs, ntx_idx, cch, lock) (GET_HAL_SPEC(adapter)->txgi_max)
+#define phy_get_txpwr_lmt(adapter, regd_name, band, bw, rfpath, rs, ntx_idx, cch, lock) (GET_HAL_SPEC(adapter)->txgi_max)
+#define PHY_GetTxPowerLimit(adapter, regd_name, band, bw, rfpath, rate, ntx_idx, cch) (GET_HAL_SPEC(adapter)->txgi_max)
 #endif /* CONFIG_TXPWR_LIMIT */
 
 s8
@@ -236,6 +234,10 @@ void phy_reload_default_tx_power_ext_info(_adapter *adapter);
 
 const struct map_t *hal_pg_txpwr_def_info(_adapter *adapter);
 
+#ifdef CONFIG_EFUSE_CONFIG_FILE
+int check_phy_efuse_tx_power_info_valid(_adapter *adapter);
+#endif
+
 void dump_hal_txpwr_info_2g(void *sel, _adapter *adapter, u8 rfpath_num, u8 max_tx_cnt);
 void dump_hal_txpwr_info_5g(void *sel, _adapter *adapter, u8 rfpath_num, u8 max_tx_cnt);
 
@@ -293,5 +295,5 @@ int PHY_ConfigRFWithPowerLimitTableParaFile(IN PADAPTER	Adapter, IN const char *
 void phy_free_filebuf_mask(_adapter *padapter, u8 mask);
 void phy_free_filebuf(_adapter *padapter);
 #endif /* CONFIG_LOAD_PHY_PARA_FROM_FILE */
-
+u8 phy_check_under_survey_ch(_adapter *adapter);
 #endif /* __HAL_COMMON_H__ */
diff --git a/rtl8723DS/include/hal_com_reg.h b/rtl8723DS/include/hal_com_reg.h
index 31f4f9b..4203671 100755..100644
--- a/rtl8723DS/include/hal_com_reg.h
+++ b/rtl8723DS/include/hal_com_reg.h
@@ -257,7 +257,7 @@
 #define REG_LIFETIME_CTRL				0x0426
 #define REG_MULTI_BCNQ_OFFSET			0x0427
 #define REG_SPEC_SIFS					0x0428
-#define REG_RL							0x042A
+#define REG_RETRY_LIMIT					0x042A
 #define REG_DARFRC						0x0430
 #define REG_RARFRC						0x0438
 #define REG_RRSR						0x0440
@@ -313,6 +313,11 @@
 #define REG_MACID_SLEEP	0x04D4
 
 #define REG_NQOS_SEQ					0x04DC
+#define REG_HW_SEQ0						0x04D8
+#define REG_HW_SEQ1						0x04DA
+#define REG_HW_SEQ2						0x04DC
+#define REG_HW_SEQ3						0x04DE
+
 #define REG_QOS_SEQ					0x04DE
 #define REG_NEED_CPU_HANDLE			0x04E0
 #define REG_PKT_LOSE_RPT				0x04E1
@@ -364,7 +369,7 @@
 #define REG_BCN_CTRL_1					0x0551
 #define REG_MBID_NUM					0x0552
 #define REG_DUAL_TSF_RST				0x0553
-#define REG_BCN_INTERVAL				0x0554	/* The same as REG_MBSSID_BCN_SPACE */
+#define REG_MBSSID_BCN_SPACE			0x0554
 #define REG_DRVERLYINT					0x0558
 #define REG_BCNDMATIM					0x0559
 #define REG_ATIMWND					0x055A
@@ -379,6 +384,7 @@
 #define REG_PSTIMER						0x0580
 #define REG_TIMER0						0x0584
 #define REG_TIMER1						0x0588
+#define REG_HIQ_NO_LMT_EN				0x05A7
 #define REG_ACMHWCTRL					0x05C0
 #define REG_NOA_DESC_SEL				0x05CF
 #define REG_NOA_DESC_DURATION		0x05E0
@@ -423,6 +429,8 @@
 #define REG_CTS2TO						0x0641
 #define REG_EIFS							0x0642
 
+/*REG_TCR*/
+#define BIT_PWRBIT_OW_EN BIT(7)
 
 /* RXERR_RPT */
 #define RXERR_TYPE_OFDM_PPDU			0
@@ -484,9 +492,25 @@
 #define REG_BCN_PSR_RPT				0x06A8
 #define REG_BT_COEX_TABLE				0x06C0
 
+#define BIT_WKFCAM_WE					BIT(16)
+#define BIT_WKFCAM_POLLING_V1				BIT(31)
+#define BIT_WKFCAM_CLR_V1				BIT(30)
+#define BIT_SHIFT_WKFCAM_ADDR_V2			8
+#define BIT_MASK_WKFCAM_ADDR_V2			0xff
+#define BIT_WKFCAM_ADDR_V2(x)				(((x) & BIT_MASK_WKFCAM_ADDR_V2) << BIT_SHIFT_WKFCAM_ADDR_V2)
+
 /* Hardware Port 1 */
 #define REG_MACID1						0x0700
 #define REG_BSSID1						0x0708
+
+/* Enable/Disable Port 0 and Port 1 for Specific ICs (ex. 8192F)*/
+#define REG_WLAN_ACT_MASK_CTRL_1		0x076C
+
+/* GPIO Control */
+#define REG_SW_GPIO_SHARE_CTRL			0x1038
+#define REG_SW_GPIO_A_OUT				0x1040
+#define REG_SW_GPIO_A_OEN				0x1044
+
 /* Hardware Port 2 */
 #define REG_MACID2						0x1620
 #define REG_BSSID2						0x1628
@@ -1228,6 +1252,15 @@ Current IOREG MAP
 #define EFUSE_BT_SEL_1			0x2
 #define EFUSE_BT_SEL_2			0x3
 
+/* 2 REG_GPIO_INTM				(Offset 0x0048) */
+#define BIT_EXTWOL_EN 			BIT(16)
+
+/* 2 REG_LED_CFG				(Offset 0x004C) */
+#define BIT_SW_SPDT_SEL			BIT(22)
+
+/* 2 REG_SW_GPIO_SHARE_CTRL		(Offset 0x1038) */
+#define BIT_BTGP_WAKE_LOC		(BIT(10) | BIT(11))
+#define BIT_SW_GPIO_FUNC 		BIT(0)
 
 /* 2 8051FWDL
  * 2 MCUFWDL */
@@ -1373,7 +1406,8 @@ Current IOREG MAP
 #define QUEUE_LOW				1
 #define QUEUE_NORMAL			2
 #define QUEUE_HIGH				3
-
+#define QUEUE_EXTRA_1			4
+#define QUEUE_EXTRA_2			5
 
 /* 2 TRXFF_BNDY */
 
@@ -1475,8 +1509,13 @@ Current IOREG MAP
 #define _SPEC_SIFS_OFDM(x)			(((x) & 0xFF) << 8)
 
 /* 2 RL */
-#define	RETRY_LIMIT_SHORT_SHIFT			8
-#define	RETRY_LIMIT_LONG_SHIFT			0
+#define BIT_SHIFT_SRL 8
+#define BIT_MASK_SRL 0x3f
+#define BIT_SRL(x) (((x) & BIT_MASK_SRL) << BIT_SHIFT_SRL)
+
+#define BIT_SHIFT_LRL 0
+#define BIT_MASK_LRL 0x3f
+#define BIT_LRL(x) (((x) & BIT_MASK_LRL) << BIT_SHIFT_LRL)
 
 #define	RL_VAL_AP					7
 #ifdef CONFIG_RTW_CUSTOMIZE_RLSTA
@@ -1496,11 +1535,6 @@ Current IOREG MAP
 #define AC_PARAM_ECW_MIN_OFFSET			8
 #define AC_PARAM_AIFS_OFFSET				0
 
-
-#define _LRL(x)					((x) & 0x3F)
-#define _SRL(x)					(((x) & 0x3F) << 8)
-
-
 /* 2 BCN_CTRL */
 #define EN_TXBCN_RPT			BIT(2)
 #define EN_BCN_FUNCTION		BIT(3)
@@ -1511,11 +1545,6 @@ Current IOREG MAP
 #define DIS_BCNQ_SUB			BIT(1)
 #define DIS_TSF_UDT				BIT(4)
 
-/* The same function but different bit field. */
-#define DIS_TSF_UDT0_NORMAL_CHIP	BIT(4)
-#define DIS_TSF_UDT0_TEST_CHIP	BIT(5)
-
-
 /* 2 ACMHWCTRL */
 #define AcmHw_HwEn				BIT(0)
 #define AcmHw_VoqEn			BIT(1)
@@ -1604,6 +1633,13 @@ Current IOREG MAP
 #define BIT_LSIC_TXOP_EN		BIT(17)
 #define BIT_CTS_EN				BIT(16)
 
+/*REG_RXFLTMAP1 (Offset 0x6A2)*/
+#define BIT_CTRLFLT10EN	BIT(10) /*PS-POLL*/
+
+/*REG_WLAN_ACT_MASK_CTRL_1	(Offset 0x76C)*/
+#define EN_PORT_0_FUNCTION		BIT(12)
+#define EN_PORT_1_FUNCTION		BIT(13)
+
 /* -----------------------------------------------------
  *
  *	SDIO Bus Specification
@@ -1645,6 +1681,7 @@ Current IOREG MAP
 #define SDIO_MAX_RX_QUEUE			1
 
 #define SDIO_REG_TX_CTRL			0x0000 /* SDIO Tx Control */
+#define SDIO_REG_TIMEOUT			0x0002/*SDIO status timeout*/
 #define SDIO_REG_HIMR				0x0014 /* SDIO Host Interrupt Mask */
 #define SDIO_REG_HISR				0x0018 /* SDIO Host Interrupt Service Routine */
 #define SDIO_REG_HCPWM			0x0019 /* HCI Current Power Mode */
@@ -1739,6 +1776,19 @@ Current IOREG MAP
 #define SDIO_TX_FREE_PG_QUEUE			4	/* The number of Tx FIFO free page */
 #define SDIO_TX_FIFO_PAGE_SZ			128
 
+/* indirect access */
+#ifdef CONFIG_SDIO_INDIRECT_ACCESS
+#define SDIO_REG_INDIRECT_REG_CFG		0x40
+#define SDIO_REG_INDIRECT_REG_DATA	0x44
+#define SET_INDIRECT_REG_ADDR(_cmd, _addr)	SET_BITS_TO_LE_2BYTE(((u8 *)(_cmd)) + 0, 0, 16, (_addr))
+#define SET_INDIRECT_REG_SIZE_1BYTE(_cmd)		SET_BITS_TO_LE_1BYTE(((u8 *)(_cmd)) + 2, 0, 2, 0)
+#define SET_INDIRECT_REG_SIZE_2BYTE(_cmd)		SET_BITS_TO_LE_1BYTE(((u8 *)(_cmd)) + 2, 0, 2, 1)
+#define SET_INDIRECT_REG_SIZE_4BYTE(_cmd)		SET_BITS_TO_LE_1BYTE(((u8 *)(_cmd)) + 2, 0, 2, 2)
+#define SET_INDIRECT_REG_WRITE(_cmd)			SET_BITS_TO_LE_1BYTE(((u8 *)(_cmd)) + 2, 2, 1, 1)
+#define SET_INDIRECT_REG_READ(_cmd)			SET_BITS_TO_LE_1BYTE(((u8 *)(_cmd)) + 2, 3, 1, 1)
+#define GET_INDIRECT_REG_RDY(_cmd)			LE_BITS_TO_1BYTE(((u8 *)(_cmd)) + 2, 4, 1)
+#endif/*CONFIG_SDIO_INDIRECT_ACCESS*/
+
 #ifdef CONFIG_SDIO_HCI
 	#define MAX_TX_AGG_PACKET_NUMBER	0x8
 #else
@@ -1816,8 +1866,10 @@ Current IOREG MAP
 #define LAST_ENTRY_OF_TX_PKT_BUFFER_8703B		255
 #define LAST_ENTRY_OF_TX_PKT_BUFFER_DUAL_MAC	127
 #define LAST_ENTRY_OF_TX_PKT_BUFFER_8188F		255
+#define LAST_ENTRY_OF_TX_PKT_BUFFER_8188GTV		255
 #define LAST_ENTRY_OF_TX_PKT_BUFFER_8723D		255
-
+#define LAST_ENTRY_OF_TX_PKT_BUFFER_8710B		255
+#define LAST_ENTRY_OF_TX_PKT_BUFFER_8192F		255
 #define POLLING_LLT_THRESHOLD				20
 #if defined(CONFIG_RTL8723B) && defined(CONFIG_PCI_HCI)
 	#define POLLING_READY_TIMEOUT_COUNT		6000
diff --git a/rtl8723DS/include/hal_data.h b/rtl8723DS/include/hal_data.h
index 8711e5e..28c81df 100755
--- a/rtl8723DS/include/hal_data.h
+++ b/rtl8723DS/include/hal_data.h
@@ -21,6 +21,7 @@
 #ifdef CONFIG_BT_COEXIST
 	#include <hal_btcoex.h>
 #endif
+	#include <hal_btcoex_wifionly.h>
 
 #ifdef CONFIG_SDIO_HCI
 	#include <hal_sdio.h>
@@ -96,21 +97,6 @@ typedef enum _RT_AMPDU_BRUST_MODE {
 #define MAX_BASE_NUM_IN_PHY_REG_PG_2_4G			10 /* CCK:1, OFDM:1, HT:4, VHT:4 */
 #define MAX_BASE_NUM_IN_PHY_REG_PG_5G			9 /* OFDM:1, HT:4, VHT:4 */
 
-
-/* ###### duplicate code,will move to ODM ######### */
-/* #define IQK_MAC_REG_NUM		4 */
-/* #define IQK_ADDA_REG_NUM		16 */
-
-/* #define IQK_BB_REG_NUM			10 */
-#define IQK_BB_REG_NUM_92C	9
-#define IQK_BB_REG_NUM_92D	10
-#define IQK_BB_REG_NUM_test	6
-
-#define IQK_Matrix_Settings_NUM_92D	(1+24+21)
-
-/* #define HP_THERMAL_NUM		8 */
-/* ###### duplicate code,will move to ODM ######### */
-
 #ifdef RTW_RX_AGGREGATION
 typedef enum _RX_AGG_MODE {
 	RX_AGG_DISABLE,
@@ -148,10 +134,19 @@ typedef enum _RX_AGG_MODE {
 #ifdef CONFIG_RTL8188F
 	#define EFUSE_MAP_SIZE	512
 #endif
+#ifdef CONFIG_RTL8188GTV
+	#define EFUSE_MAP_SIZE	512
+#endif
+#ifdef CONFIG_RTL8710B
+	#define EFUSE_MAP_SIZE	512
+#endif
+#ifdef CONFIG_RTL8192F
+	#define EFUSE_MAP_SIZE	512
+#endif
 
 #if defined(CONFIG_RTL8814A) || defined(CONFIG_RTL8822B) || defined(CONFIG_RTL8821C)
 	#define EFUSE_MAX_SIZE	1024
-#elif defined(CONFIG_RTL8188E) || defined(CONFIG_RTL8188F) || defined(CONFIG_RTL8703B)
+#elif defined(CONFIG_RTL8188E) || defined(CONFIG_RTL8188F) || defined(CONFIG_RTL8188GTV) || defined(CONFIG_RTL8703B) || defined(CONFIG_RTL8710B)
 	#define EFUSE_MAX_SIZE	256
 #else
 	#define EFUSE_MAX_SIZE	512
@@ -207,9 +202,6 @@ typedef struct _BB_INIT_REGISTER {
 #define MACADDR_FILE_FAILED 1
 #define MACADDR_FILE_LOADED 2
 
-#define KFREE_FLAG_ON				BIT(0)
-#define KFREE_FLAG_THERMAL_K_ON		BIT(1)
-
 #define MAX_IQK_INFO_BACKUP_CHNL_NUM	5
 #define MAX_IQK_INFO_BACKUP_REG_NUM		10
 
@@ -235,6 +227,8 @@ struct hal_spec_t {
 
 	u8 rfpath_num_2g:4;	/* used for tx power index path */
 	u8 rfpath_num_5g:4;	/* used for tx power index path */
+	u8 txgi_max; /* maximum tx power gain index */
+	u8 txgi_pdbm; /* tx power gain index per dBm */
 
 	u8 max_tx_cnt;
 	u8 tx_nss_num:4;
@@ -244,10 +238,13 @@ struct hal_spec_t {
 	u8 port_num;
 	u8 proto_cap;	/* value of PROTO_CAP_XXX */
 	u8 wl_func;		/* value of WL_FUNC_XXX */
+
+	u8 rx_tsf_filter:1;
+
+	u8 pg_txpwr_saddr; /* starting address of PG tx power info */
+	u8 pg_txgi_diff_factor; /* PG tx power gain index diff to tx power gain index */
+
 	u8 hci_type;	/* value of HCI Type */
-#ifdef CONFIG_BT_COEXIST
-	u8 bt_ft_ver;	/*bt FT version*/
-#endif /*CONFIG_BT_COEXIST*/
 };
 
 #define HAL_SPEC_CHK_RF_PATH_2G(_spec, _path) ((_spec)->rfpath_num_2g > (_path))
@@ -283,7 +280,7 @@ typedef struct hal_p2p_ps_para {
 	u8  noa_sel:1;
 	u8  all_sta_sleep:1;
 	u8  discovery:1;
-	u8  rsvd2:1;
+	u8  disable_close_rf:1;
 	u8  p2p_port_id;
 	u8  p2p_group;
 	u8  p2p_macid;
@@ -400,9 +397,9 @@ typedef struct hal_com_data {
 	u16	ForcedDataRate;	/* Force Data Rate. 0: Auto, 0x02: 1M ~ 0x6C: 54M. */
 	u8	bDumpRxPkt;
 	u8	bDumpTxPkt;
-	u8	bDisableTXPowerTraining;
-	u8	dis_turboedca;
-
+	u8	dis_turboedca; /* 1: disable turboedca, 
+						  2: disable turboedca and setting EDCA parameter based on the input parameter*/
+	u32 edca_param_mode;
 
 	/****** EEPROM setting.******/
 	u8	bautoload_fail_flag;
@@ -448,7 +445,9 @@ typedef struct hal_com_data {
 #endif /*CONFIG_RF_POWER_TRIM*/
 
 #if defined(CONFIG_RTL8723B) || defined(CONFIG_RTL8703B) || \
-	defined(CONFIG_RTL8723D)
+	defined(CONFIG_RTL8723D) || \
+	defined(CONFIG_RTL8192F)
+
 	u8	adjuseVoltageVal;
 	u8	need_restore;
 #endif
@@ -539,10 +538,11 @@ typedef struct hal_com_data {
 	_lock		IQKSpinLock;
 	u8			INIDATA_RATE[MACID_NUM_SW_LIMIT];
 
-	struct PHY_DM_STRUCT	 odmpriv;
+	struct dm_struct	 odmpriv;
 	u64			bk_rf_ability;
 	u8			bIQKInitialized;
 	u8			bNeedIQK;
+	u8			neediqk_24g;
 	u8			IQK_MP_Switch;
 	u8			bScanInProcess;
 	/******** PHY DM & DM Section **********/
@@ -556,8 +556,12 @@ typedef struct hal_com_data {
 	u32	interfaceIndex;
 
 #ifdef CONFIG_P2P
+#ifdef CONFIG_P2P_PS_NOA_USE_MACID_SLEEP
+	u16 p2p_ps_offload;
+#else
 	u8	p2p_ps_offload;
 #endif
+#endif
 	/* Auto FSM to Turn On, include clock, isolation, power control for MAC only */
 	u8	bMacPwrCtrlOn;
 	u8 hci_sus_state;
@@ -598,7 +602,11 @@ typedef struct hal_com_data {
 	/* SDIO Tx FIFO related. */
 	/*  */
 	/* HIQ, MID, LOW, PUB free pages; padapter->xmitpriv.free_txpg */
+#ifdef CONFIG_RTL8192F
+	u16			SdioTxFIFOFreePage[SDIO_TX_FREE_PG_QUEUE];
+#else
 	u8			SdioTxFIFOFreePage[SDIO_TX_FREE_PG_QUEUE];
+#endif/*CONFIG_RTL8192F*/
 	_lock		SdioTxFIFOFreePageLock;
 	u8			SdioTxOQTMaxFreeSpace;
 	u8			SdioTxOQTFreeSpace;
@@ -702,7 +710,7 @@ typedef struct hal_com_data {
 #endif /* CONFIG_BT_COEXIST */
 
 #if defined(CONFIG_RTL8723B) || defined(CONFIG_RTL8703B) \
-	|| defined(CONFIG_RTL8188F) || defined(CONFIG_RTL8723D)
+	|| defined(CONFIG_RTL8188F) || defined(CONFIG_RTL8188GTV) || defined(CONFIG_RTL8723D)|| defined(CONFIG_RTL8192F)
 #ifndef CONFIG_PCI_HCI	/* mutual exclusive with PCI -- so they're SDIO and GSPI */
 	/* Interrupt relatd register information. */
 	u32			SysIntrStatus;
@@ -754,7 +762,7 @@ typedef struct hal_com_data {
 	struct hal_iqk_reg_backup iqk_reg_backup[MAX_IQK_INFO_BACKUP_CHNL_NUM];
 
 #ifdef RTW_HALMAC
-	u8 drv_rsvd_page_number;
+	u16 drv_rsvd_page_number;
 #endif
 
 #ifdef CONFIG_BEAMFORMING
@@ -768,13 +776,16 @@ typedef struct hal_com_data {
 	u8 phydm_op_mode;
 
 	u8 in_cta_test;
-} HAL_DATA_COMMON, *PHAL_DATA_COMMON;
-
 
+#ifdef CONFIG_RTW_LED
+	struct led_priv led;
+#endif
+} HAL_DATA_COMMON, *PHAL_DATA_COMMON;
 
 typedef struct hal_com_data HAL_DATA_TYPE, *PHAL_DATA_TYPE;
-#define GET_HAL_DATA(__pAdapter)			((HAL_DATA_TYPE *)((__pAdapter)->HalData))
+#define GET_HAL_DATA(__pAdapter)			((HAL_DATA_TYPE *)(((struct _ADAPTER*)__pAdapter)->HalData))
 #define GET_HAL_SPEC(__pAdapter)			(&(GET_HAL_DATA((__pAdapter))->hal_spec))
+#define adapter_to_led(adapter) (&(GET_HAL_DATA(adapter)->led))
 
 #define GET_HAL_RFPATH_NUM(__pAdapter)		(((HAL_DATA_TYPE *)((__pAdapter)->HalData))->NumTotalRFPath)
 #define RT_GetInterfaceSelection(_Adapter)		(GET_HAL_DATA(_Adapter)->InterfaceSel)
@@ -788,6 +799,7 @@ typedef struct hal_com_data HAL_DATA_TYPE, *PHAL_DATA_TYPE;
 #define get_hal_mac_addr(adapter)				(GET_HAL_DATA(adapter)->EEPROMMACAddr)
 #define is_boot_from_eeprom(adapter)			(GET_HAL_DATA(adapter)->EepromOrEfuse)
 #define rtw_get_hw_init_completed(adapter)		(GET_HAL_DATA(adapter)->hw_init_completed)
+#define rtw_set_hw_init_completed(adapter, cmp)	(GET_HAL_DATA(adapter)->hw_init_completed = cmp)
 #define rtw_is_hw_init_completed(adapter)		(GET_HAL_DATA(adapter)->hw_init_completed == _TRUE)
 #endif
 
diff --git a/rtl8723DS/include/hal_gspi.h b/rtl8723DS/include/hal_gspi.h
index 51d491c..51d491c 100755..100644
--- a/rtl8723DS/include/hal_gspi.h
+++ b/rtl8723DS/include/hal_gspi.h
diff --git a/rtl8723DS/include/hal_ic_cfg.h b/rtl8723DS/include/hal_ic_cfg.h
index 022c6da..cc3ab5c 100755..100644
--- a/rtl8723DS/include/hal_ic_cfg.h
+++ b/rtl8723DS/include/hal_ic_cfg.h
@@ -21,6 +21,7 @@
 #define RTL8723B_SUPPORT				0
 #define RTL8723D_SUPPORT				0
 #define RTL8192E_SUPPORT				0
+#define RTL8192F_SUPPORT				0
 #define RTL8814A_SUPPORT				0
 #define RTL8195A_SUPPORT				0
 #define RTL8197F_SUPPORT				0
@@ -32,7 +33,12 @@
 #define RTL8710B_SUPPORT				0
 #define RTL8814B_SUPPORT				0
 #define RTL8824B_SUPPORT				0
-
+#define RTL8198F_SUPPORT				0
+#define RTL8195B_SUPPORT				0
+#define RTL8822C_SUPPORT				0
+#define RTL8812F_SUPPORT				0
+#define RTL8197G_SUPPORT				0
+#define RTL8721D_SUPPORT				0
 
 /*#if (RTL8188E_SUPPORT==1)*/
 #define RATE_ADAPTIVE_SUPPORT			0
@@ -57,6 +63,7 @@
 	#ifndef CONFIG_FW_C2H_PKT
 		#define CONFIG_FW_C2H_PKT
 	#endif
+	#define CONFIG_RTS_FULL_BW
 #endif
 
 #ifdef CONFIG_RTL8821A
@@ -65,6 +72,7 @@
 	#ifndef CONFIG_FW_C2H_PKT
 		#define CONFIG_FW_C2H_PKT
 	#endif
+	#define CONFIG_RTS_FULL_BW
 #endif
 
 #ifdef CONFIG_RTL8192E
@@ -73,6 +81,24 @@
 	#ifndef CONFIG_FW_C2H_PKT
 		#define CONFIG_FW_C2H_PKT
 	#endif
+	#define CONFIG_RTS_FULL_BW
+#endif
+
+#ifdef CONFIG_RTL8192F
+	#undef RTL8192F_SUPPORT
+	#define RTL8192F_SUPPORT				1
+	#ifndef CONFIG_FW_C2H_PKT
+		#define CONFIG_FW_C2H_PKT
+	#endif
+	#ifndef CONFIG_RTW_MAC_HIDDEN_RPT
+		#define CONFIG_RTW_MAC_HIDDEN_RPT
+	#endif
+	/*#define CONFIG_AMPDU_PRETX_CD*/
+	/*#define DBG_LA_MODE*/
+	#ifdef CONFIG_P2P_PS
+		#define CONFIG_P2P_PS_NOA_USE_MACID_SLEEP
+	#endif
+	#define CONFIG_RTS_FULL_BW
 #endif
 
 #ifdef CONFIG_RTL8723B
@@ -81,6 +107,7 @@
 	#ifndef CONFIG_FW_C2H_PKT
 		#define CONFIG_FW_C2H_PKT
 	#endif
+	#define CONFIG_RTS_FULL_BW
 #endif
 
 #ifdef CONFIG_RTL8723D
@@ -95,6 +122,7 @@
 	#ifndef CONFIG_RTW_CUSTOMER_STR
 		#define CONFIG_RTW_CUSTOMER_STR
 	#endif
+	#define CONFIG_RTS_FULL_BW
 #endif
 
 #ifdef CONFIG_RTL8814A
@@ -103,6 +131,8 @@
 	#ifndef CONFIG_FW_C2H_PKT
 		#define CONFIG_FW_C2H_PKT
 	#endif
+	#define CONFIG_FW_CORRECT_BCN
+	#define CONFIG_RTS_FULL_BW
 #endif
 
 #ifdef CONFIG_RTL8703B
@@ -114,6 +144,7 @@
 	#ifndef CONFIG_RTW_MAC_HIDDEN_RPT
 		#define CONFIG_RTW_MAC_HIDDEN_RPT
 	#endif
+	#define CONFIG_RTS_FULL_BW
 #endif
 
 #ifdef CONFIG_RTL8188F
@@ -128,6 +159,22 @@
 	#ifndef CONFIG_RTW_CUSTOMER_STR
 		#define CONFIG_RTW_CUSTOMER_STR
 	#endif
+	#define CONFIG_RTS_FULL_BW
+#endif
+
+#ifdef CONFIG_RTL8188GTV
+	#undef RTL8188F_SUPPORT
+	#define RTL8188F_SUPPORT				1
+	#ifndef CONFIG_FW_C2H_PKT
+		#define CONFIG_FW_C2H_PKT
+	#endif
+	#ifndef CONFIG_RTW_MAC_HIDDEN_RPT
+		#define CONFIG_RTW_MAC_HIDDEN_RPT
+	#endif
+	#ifndef CONFIG_RTW_CUSTOMER_STR
+		#define CONFIG_RTW_CUSTOMER_STR
+	#endif
+	#define CONFIG_RTS_FULL_BW
 #endif
 
 #ifdef CONFIG_RTL8822B
@@ -138,10 +185,11 @@
 	#endif /* CONFIG_FW_C2H_PKT */
 	#define RTW_TX_PA_BIAS	/* Adjust TX PA Bias from eFuse */
 	#define CONFIG_DFS	/* Enable 5G band 2&3 channel */
+	#define RTW_AMPDU_AGG_RETRY_AND_NEW
 
 	#ifdef CONFIG_WOWLAN
 		#define CONFIG_GTK_OL
-		#define CONFIG_ARP_KEEP_ALIVE
+		/*#define CONFIG_ARP_KEEP_ALIVE*/
 
 		#ifdef CONFIG_GPIO_WAKEUP
 			#ifndef WAKEUP_GPIO_IDX
@@ -158,10 +206,6 @@
 	/*
 	 * Beamforming related definition
 	 */
-	#if defined(CONFIG_CONCURRENT_MODE) && defined(CONFIG_BEAMFORMING)
-		#undef CONFIG_BEAMFORMING
-		#warning "Not support Beamforming in concurrent mode yet!!"
-	#endif /* CONFIG_CONCURRENT_MODE && CONFIG_BEAMFORMING */
 	/* Beamforming mechanism is on driver not phydm, always disable it */
 	#define BEAMFORMING_SUPPORT				0
 	/* Only support new beamforming mechanism */
@@ -177,18 +221,41 @@
 		#define DBG_RX_DFRAME_RAW_DATA
 	#endif /* DBG_RX_DFRAME_RAW_DATA */
 
-	/*#ifndef RTW_IQK_FW_OFFLOAD
+	#ifndef RTW_IQK_FW_OFFLOAD
 		#define RTW_IQK_FW_OFFLOAD
-	#endif*/ /* RTW_IQK_FW_OFFLOAD */
+	#endif /* RTW_IQK_FW_OFFLOAD */
+
+	/* Checksum offload feature */
+	/*#define CONFIG_TCP_CSUM_OFFLOAD_TX*/ /* not ready */
+	#define CONFIG_TCP_CSUM_OFFLOAD_RX
+
 	#define CONFIG_ADVANCE_OTA
 
 	#ifdef CONFIG_MCC_MODE
 		#define CONFIG_MCC_MODE_V2
 	#endif /* CONFIG_MCC_MODE */
 
+	#if defined(CONFIG_TDLS) && defined(CONFIG_TDLS_CH_SW)
+		#define CONFIG_TDLS_CH_SW_V2
+	#endif
+
 	#ifndef RTW_CHANNEL_SWITCH_OFFLOAD
-		/* #define RTW_CHANNEL_SWITCH_OFFLOAD */
+		#ifdef CONFIG_TDLS_CH_SW_V2
+			#define RTW_CHANNEL_SWITCH_OFFLOAD
+		#endif
 	#endif /* RTW_CHANNEL_SWITCH_OFFLOAD */
+
+	#if defined(CONFIG_RTW_MESH) && !defined(RTW_PER_CMD_SUPPORT_FW)
+		/* Supported since fw v22.1 */
+		#define RTW_PER_CMD_SUPPORT_FW
+	#endif /* RTW_PER_CMD_SUPPORT_FW */
+	#define CONFIG_SUPPORT_FIFO_DUMP
+	#define CONFIG_HW_P0_TSF_SYNC
+	#define CONFIG_BCN_RECV_TIME
+	#ifdef CONFIG_P2P_PS
+		#define CONFIG_P2P_PS_NOA_USE_MACID_SLEEP
+	#endif
+	#define CONFIG_RTS_FULL_BW
 #endif /* CONFIG_RTL8822B */
 
 #ifdef CONFIG_RTL8821C
@@ -213,9 +280,34 @@
 	#define CONFIG_FW_MULTI_PORT_SUPPORT
 	#endif
 	#define CONFIG_SUPPORT_FIFO_DUMP
-	/*#ifndef RTW_IQK_FW_OFFLOAD
+	#ifndef RTW_IQK_FW_OFFLOAD
 		#define RTW_IQK_FW_OFFLOAD
-	#endif*/ /* RTW_IQK_FW_OFFLOAD */
+	#endif /* RTW_IQK_FW_OFFLOAD */
+	/*#define CONFIG_AMPDU_PRETX_CD*/
+	/*#define DBG_PRE_TX_HANG*/
+
+	/* Beamforming related definition */
+	/* Beamforming mechanism is on driver not phydm, always disable it */
+	#define BEAMFORMING_SUPPORT				0
+	/* Only support new beamforming mechanism */
+	#ifdef CONFIG_BEAMFORMING
+		#define RTW_BEAMFORMING_VERSION_2
+	#endif /* CONFIG_BEAMFORMING */
+	#define CONFIG_HW_P0_TSF_SYNC
+	#define CONFIG_BCN_RECV_TIME
+	#ifdef CONFIG_P2P_PS
+		#define CONFIG_P2P_PS_NOA_USE_MACID_SLEEP
+	#endif
+	#define CONFIG_RTS_FULL_BW
+#endif /*CONFIG_RTL8821C*/
+
+#ifdef CONFIG_RTL8710B
+	#undef RTL8710B_SUPPORT
+	#define RTL8710B_SUPPORT				1
+	#ifndef CONFIG_FW_C2H_PKT
+		#define CONFIG_FW_C2H_PKT
+	#endif
+	#define CONFIG_RTS_FULL_BW
 #endif
 
 #endif /*__HAL_IC_CFG_H__*/
diff --git a/rtl8723DS/include/hal_intf.h b/rtl8723DS/include/hal_intf.h
index 15d8045..f77fa44 100755..100644
--- a/rtl8723DS/include/hal_intf.h
+++ b/rtl8723DS/include/hal_intf.h
@@ -34,9 +34,12 @@ enum _CHIP_TYPE {
 	RTL8814A,
 	RTL8703B,
 	RTL8188F,
+	RTL8188GTV,
 	RTL8822B,
 	RTL8723D,
 	RTL8821C,
+	RTL8710B,
+	RTL8192F,
 	MAX_CHIP_TYPE
 };
 
@@ -67,6 +70,7 @@ typedef enum _HW_VARIABLES {
 	HW_VAR_BASIC_RATE,
 	HW_VAR_TXPAUSE,
 	HW_VAR_BCN_FUNC,
+	HW_VAR_BCN_CTRL_ADDR,
 	HW_VAR_CORRECT_TSF,
 	HW_VAR_RCR,
 	HW_VAR_MLME_DISCONNECT,
@@ -82,7 +86,6 @@ typedef enum _HW_VARIABLES {
 	HW_VAR_SEC_DK_CFG,
 	HW_VAR_BCN_VALID,
 	HW_VAR_RF_TYPE,
-	HW_VAR_TSF,
 	HW_VAR_FREECNT,
 
 	/* PHYDM odm->SupportAbility */
@@ -97,11 +100,14 @@ typedef enum _HW_VARIABLES {
 	HW_VAR_UAPSD_TID,
 #endif /* CONFIG_WMMPS_STA */
 	HW_VAR_AMPDU_MIN_SPACE,
+#ifdef CONFIG_80211N_HT
 	HW_VAR_AMPDU_FACTOR,
+#endif /* CONFIG_80211N_HT */
 	HW_VAR_RXDMA_AGG_PG_TH,
 	HW_VAR_SET_RPWM,
 	HW_VAR_CPWM,
 	HW_VAR_H2C_FW_PWRMODE,
+	HW_VAR_H2C_INACTIVE_IPS,
 	HW_VAR_H2C_PS_TUNE_PARAM,
 	HW_VAR_H2C_FW_JOINBSSRPT,
 	HW_VAR_FWLPS_RF_ON,
@@ -137,6 +143,8 @@ typedef enum _HW_VARIABLES {
 #endif
 	HW_VAR_RPWM_TOG,
 #ifdef CONFIG_GPIO_WAKEUP
+	HW_VAR_WOW_OUTPUT_GPIO,
+	HW_VAR_WOW_INPUT_GPIO,
 	HW_SET_GPIO_WL_CTRL,
 #endif
 	HW_VAR_SYS_CLKR,
@@ -195,8 +203,19 @@ typedef enum _HW_VARIABLES {
 #endif
 	HW_VAR_DUMP_MAC_TXFIFO,
 	HW_VAR_PWR_CMD,
+#ifdef CONFIG_FW_HANDLE_TXBCN
+	HW_VAR_BCN_HEAD_SEL,
+#endif
+	HW_VAR_SET_SOML_PARAM,
 	HW_VAR_ENABLE_RX_BAR,
 	HW_VAR_TSF_AUTO_SYNC,
+	HW_VAR_LPS_STATE_CHK,
+	#ifdef CONFIG_RTS_FULL_BW
+	HW_VAR_SET_RTS_BW,
+	#endif
+#if defined(CONFIG_PCI_HCI)
+	HW_VAR_ENSWBCN,
+#endif
 } HW_VARIABLES;
 
 typedef enum _HAL_DEF_VARIABLE {
@@ -233,7 +252,6 @@ typedef enum _HAL_DEF_VARIABLE {
 	HAL_DEF_PCI_SUUPORT_L1_BACKDOOR, /* Determine if the L1 Backdoor setting is turned on. */
 	HAL_DEF_PCI_AMD_L1_SUPPORT,
 	HAL_DEF_PCI_ASPM_OSC, /* Support for ASPM OSC, added by Roger, 2013.03.27. */
-	HAL_DEF_DBG_DIS_PWT, /* disable Tx power training or not. */
 	HAL_DEF_EFUSE_USAGE,	/* Get current EFUSE utilization. 2008.12.19. Added by Roger. */
 	HAL_DEF_EFUSE_BYTES,
 	HW_VAR_BEST_AMPDU_DENSITY,
@@ -305,6 +323,7 @@ struct hal_ops {
 	u8(*check_ips_status)(_adapter *padapter);
 #if defined(CONFIG_PCI_HCI)
 	s32(*interrupt_handler)(_adapter *padapter);
+	void (*unmap_beacon_icf)(_adapter *padapter);
 #endif
 
 #if defined(CONFIG_USB_HCI) && defined(CONFIG_SUPPORT_USB_INT)
@@ -351,7 +370,12 @@ struct hal_ops {
 	void	(*write_bbreg)(_adapter *padapter, u32 RegAddr, u32 BitMask, u32 Data);
 	u32 (*read_rfreg)(_adapter *padapter, enum rf_path eRFPath, u32 RegAddr, u32 BitMask);
 	void	(*write_rfreg)(_adapter *padapter, enum rf_path eRFPath, u32 RegAddr, u32 BitMask, u32 Data);
-
+#ifdef CONFIG_SYSON_INDIRECT_ACCESS
+	u32 (*read_syson_reg)(_adapter *padapter, u32 RegAddr, u32 BitMask);
+	void (*write_syson_reg)(_adapter *padapter, u32 RegAddr, u32 BitMask, u32 Data);
+#endif
+	void (*read_wmmedca_reg)(_adapter *padapter, u16 *vo_params, u16 *vi_params, u16 *be_params, u16 *bk_params);
+	
 #ifdef CONFIG_HOSTAPD_MLME
 	s32(*hostap_mgnt_xmit_entry)(_adapter *padapter, _pkt *pkt);
 #endif
@@ -365,6 +389,9 @@ struct hal_ops {
 	int	(*Efuse_PgPacketWrite)(_adapter *padapter, u8 offset, u8 word_en, u8 *data, BOOLEAN bPseudoTest);
 	u8(*Efuse_WordEnableDataWrite)(_adapter *padapter, u16 efuse_addr, u8 word_en, u8 *data, BOOLEAN bPseudoTest);
 	BOOLEAN(*Efuse_PgPacketWrite_BT)(_adapter *padapter, u8 offset, u8 word_en, u8 *data, BOOLEAN bPseudoTest);
+#if defined(CONFIG_RTL8710B)
+	BOOLEAN(*efuse_indirect_read4)(_adapter *padapter, u16 regaddr, u8 *value);
+#endif
 
 #ifdef DBG_CONFIG_ERROR_DETECT
 	void (*sreset_init_value)(_adapter *padapter);
@@ -404,7 +431,9 @@ struct hal_ops {
 	int (*hal_gpio_func_check)(_adapter *padapter, u8 gpio_num);
 	void (*hal_gpio_multi_func_reset)(_adapter *padapter, u8 gpio_num);
 #endif
+#ifdef CONFIG_FW_CORRECT_BCN
 	void (*fw_correct_bcn)(PADAPTER padapter);
+#endif
 
 #ifdef RTW_HALMAC
 	u8(*init_mac_register)(PADAPTER);
@@ -467,12 +496,18 @@ typedef enum _HARDWARE_TYPE {
 	HARDWARE_TYPE_RTL8188FE,
 	HARDWARE_TYPE_RTL8188FU,
 	HARDWARE_TYPE_RTL8188FS,
+	HARDWARE_TYPE_RTL8188GTVU,
+	HARDWARE_TYPE_RTL8188GTVS,
 	HARDWARE_TYPE_RTL8723DE,
 	HARDWARE_TYPE_RTL8723DU,
 	HARDWARE_TYPE_RTL8723DS,
 	HARDWARE_TYPE_RTL8821CE,
 	HARDWARE_TYPE_RTL8821CU,
 	HARDWARE_TYPE_RTL8821CS,
+	HARDWARE_TYPE_RTL8710BU,
+	HARDWARE_TYPE_RTL8192FS,
+	HARDWARE_TYPE_RTL8192FU,
+	HARDWARE_TYPE_RTL8192FE,
 	HARDWARE_TYPE_MAX,
 } HARDWARE_TYPE;
 
@@ -546,6 +581,18 @@ typedef enum _HARDWARE_TYPE {
 	 IS_HARDWARE_TYPE_8723DU(_Adapter) || \
 	 IS_HARDWARE_TYPE_8723DS(_Adapter))
 
+/* RTL8192F Series */
+#define IS_HARDWARE_TYPE_8192FS(_Adapter)\
+	(rtw_get_hw_type(_Adapter) == HARDWARE_TYPE_RTL8192FS)
+#define IS_HARDWARE_TYPE_8192FU(_Adapter)\
+	(rtw_get_hw_type(_Adapter) == HARDWARE_TYPE_RTL8192FU)	
+#define IS_HARDWARE_TYPE_8192FE(_Adapter)\
+	(rtw_get_hw_type(_Adapter) == HARDWARE_TYPE_RTL8192FE)	
+#define	IS_HARDWARE_TYPE_8192F(_Adapter)\
+	(IS_HARDWARE_TYPE_8192FS(_Adapter) ||\
+	 IS_HARDWARE_TYPE_8192FU(_Adapter) ||\
+	 IS_HARDWARE_TYPE_8192FE(_Adapter))
+
 /* RTL8188F Series */
 #define IS_HARDWARE_TYPE_8188FE(_Adapter)		(rtw_get_hw_type(_Adapter) == HARDWARE_TYPE_RTL8188FE)
 #define IS_HARDWARE_TYPE_8188FS(_Adapter)		(rtw_get_hw_type(_Adapter) == HARDWARE_TYPE_RTL8188FS)
@@ -553,6 +600,15 @@ typedef enum _HARDWARE_TYPE {
 #define	IS_HARDWARE_TYPE_8188F(_Adapter)			\
 	(IS_HARDWARE_TYPE_8188FE(_Adapter) || IS_HARDWARE_TYPE_8188FU(_Adapter) || IS_HARDWARE_TYPE_8188FS(_Adapter))
 
+#define IS_HARDWARE_TYPE_8188GTVU(_Adapter)		(rtw_get_hw_type(_Adapter) == HARDWARE_TYPE_RTL8188GTVU)
+#define IS_HARDWARE_TYPE_8188GTVS(_Adapter)		(rtw_get_hw_type(_Adapter) == HARDWARE_TYPE_RTL8188GTVS)
+#define	IS_HARDWARE_TYPE_8188GTV(_Adapter)			\
+	(IS_HARDWARE_TYPE_8188GTVU(_Adapter) || IS_HARDWARE_TYPE_8188GTVS(_Adapter))
+
+/* RTL8710B Series */
+#define IS_HARDWARE_TYPE_8710BU(_Adapter) (rtw_get_hw_type(_Adapter) == HARDWARE_TYPE_RTL8710BU)
+#define IS_HARDWARE_TYPE_8710B(_Adapter) (IS_HARDWARE_TYPE_8710BU(_Adapter))
+
 #define IS_HARDWARE_TYPE_8821BE(_Adapter)		(rtw_get_hw_type(_Adapter) == HARDWARE_TYPE_RTL8821BE)
 #define IS_HARDWARE_TYPE_8821BU(_Adapter)		(rtw_get_hw_type(_Adapter) == HARDWARE_TYPE_RTL8821BU)
 #define IS_HARDWARE_TYPE_8821BS(_Adapter)		(rtw_get_hw_type(_Adapter) == HARDWARE_TYPE_RTL8821BS)
@@ -611,6 +667,9 @@ u32 rtw_hal_power_on(_adapter *padapter);
 void rtw_hal_power_off(_adapter *padapter);
 
 uint rtw_hal_init(_adapter *padapter);
+#ifdef CONFIG_NEW_NETDEV_HDL
+uint rtw_hal_iface_init(_adapter *adapter);
+#endif
 uint rtw_hal_deinit(_adapter *padapter);
 void rtw_hal_stop(_adapter *padapter);
 u8 rtw_hal_set_hwreg(PADAPTER padapter, u8 variable, u8 *val);
@@ -676,12 +735,19 @@ void	rtw_hal_write_rfreg(_adapter *padapter, enum rf_path eRFPath, u32 RegAddr,
 #define phy_query_rf_reg(Adapter, eRFPath, RegAddr, BitMask) rtw_hal_read_rfreg((Adapter), (eRFPath), (RegAddr), (BitMask))
 #define phy_set_rf_reg(Adapter, eRFPath, RegAddr, BitMask, Data) rtw_hal_write_rfreg((Adapter), (eRFPath), (RegAddr), (BitMask), (Data))
 
+#ifdef CONFIG_SYSON_INDIRECT_ACCESS
+u32 rtw_hal_read_syson_reg(PADAPTER padapter, u32 RegAddr, u32 BitMask);
+void rtw_hal_write_syson_reg(_adapter *padapter, u32 RegAddr, u32 BitMask, u32 Data);
+#define hal_query_syson_reg(Adapter, RegAddr, BitMask) rtw_hal_read_syson_reg((Adapter), (RegAddr), (BitMask))
+#define hal_set_syson_reg(Adapter, RegAddr, BitMask, Data) rtw_hal_write_syson_reg((Adapter), (RegAddr), (BitMask), (Data))
+#endif
+
 #define phy_set_mac_reg	phy_set_bb_reg
 #define phy_query_mac_reg phy_query_bb_reg
 
-
 #if defined(CONFIG_PCI_HCI)
 	s32	rtw_hal_interrupt_handler(_adapter *padapter);
+	void	rtw_hal_unmap_beacon_icf(_adapter *padapter);
 #endif
 #if  defined(CONFIG_USB_HCI) && defined(CONFIG_SUPPORT_USB_INT)
 	void	rtw_hal_interrupt_handler(_adapter *padapter, u16 pkt_len, u8 *pbuf);
@@ -755,8 +821,9 @@ void rtw_hal_update_hisr_hsisr_ind(_adapter *padapter, u32 flag);
 int rtw_hal_gpio_func_check(_adapter *padapter, u8 gpio_num);
 void rtw_hal_gpio_multi_func_reset(_adapter *padapter, u8 gpio_num);
 #endif
-
+#ifdef CONFIG_FW_CORRECT_BCN
 void rtw_hal_fw_correct_bcn(_adapter *padapter);
+#endif
 s32 rtw_hal_fw_dl(_adapter *padapter, u8 wowlan);
 
 #if defined(CONFIG_WOWLAN) || defined(CONFIG_AP_WOWLAN)
diff --git a/rtl8723DS/include/hal_pg.h b/rtl8723DS/include/hal_pg.h
index c60f7fc..b807ca8 100755..100644
--- a/rtl8723DS/include/hal_pg.h
+++ b/rtl8723DS/include/hal_pg.h
@@ -29,8 +29,6 @@
 /* ****************************************************
  *			EEPROM/Efuse PG Offset for 88EE/88EU/88ES
  * **************************************************** */
-#define EEPROM_TX_PWR_INX_88E					0x10
-
 #define EEPROM_ChannelPlan_88E					0xB8
 #define EEPROM_XTAL_88E						0xB9
 #define EEPROM_THERMAL_METER_88E				0xBA
@@ -69,9 +67,6 @@
 #define PPG_BB_GAIN_2G_TXA_OFFSET_8192E	0x1F6
 #define PPG_THERMAL_OFFSET_8192E		0x1F5
 
-/* 0x10 ~ 0x63 = TX power area. */
-#define	EEPROM_TX_PWR_INX_8192E				0x10
-
 #define	EEPROM_ChannelPlan_8192E				0xB8
 #define	EEPROM_XTAL_8192E						0xB9
 #define	EEPROM_THERMAL_METER_8192E			0xBA
@@ -112,10 +107,8 @@
 #define	EEPROM_MAC_ADDR_8192ES				0x11A
 /* ****************************************************
  *			EEPROM/Efuse PG Offset for 8812AE/8812AU/8812AS
- * ****************************************************
- * 0x10 ~ 0x63 = TX power area. */
+ * *****************************************************/
 #define EEPROM_USB_MODE_8812					0x08
-#define EEPROM_TX_PWR_INX_8812				0x10
 
 #define EEPROM_ChannelPlan_8812				0xB8
 #define EEPROM_XTAL_8812						0xB9
@@ -180,7 +173,6 @@
 
 #define PPG_THERMAL_OFFSET_8814A		0x3EF
 
-#define EEPROM_TX_PWR_INX_8814				0x10
 #define EEPROM_USB_MODE_8814A				0x0E
 #define EEPROM_ChannelPlan_8814				0xB8
 #define EEPROM_XTAL_8814					0xB9
@@ -228,8 +220,6 @@
 #define PPG_BB_GAIN_5GMB2_TXA_OFFSET_8821A	0x1F1
 #define PPG_BB_GAIN_5GHB_TXA_OFFSET_8821A	0x1F0
 
-#define EEPROM_TX_PWR_INX_8821				0x10
-
 #define EEPROM_ChannelPlan_8821				0xB8
 #define EEPROM_XTAL_8821						0xB9
 #define EEPROM_THERMAL_METER_8821			0xBA
@@ -297,9 +287,6 @@
 #define PPG_BB_GAIN_2G_TXA_OFFSET_8188F	0xEE
 #define PPG_THERMAL_OFFSET_8188F		0xEF
 
-/* 0x10 ~ 0x63 = TX power area. */
-#define	EEPROM_TX_PWR_INX_8188F				0x10
-
 #define	EEPROM_ChannelPlan_8188F			0xB8
 #define	EEPROM_XTAL_8188F					0xB9
 #define	EEPROM_THERMAL_METER_8188F			0xBA
@@ -333,12 +320,53 @@
 #define	EEPROM_MAC_ADDR_8188FS				0x11A
 #define EEPROM_Voltage_ADDR_8188F			0x8
 
+/* ====================================================
+	EEPROM/Efuse PG Offset for 8188GTV/8188GTVS
+   ====================================================
+ */
+
+#define GET_PG_KFREE_ON_8188GTV(_pg_m)				LE_BITS_TO_1BYTE(((u8 *)(_pg_m)) + 0xC1, 4, 1)
+#define GET_PG_KFREE_THERMAL_K_ON_8188GTV(_pg_m)	LE_BITS_TO_1BYTE(((u8 *)(_pg_m)) + 0xC8, 5, 1)
+
+#define PPG_BB_GAIN_2G_TXA_OFFSET_8188GTV	0xEE
+#define PPG_THERMAL_OFFSET_8188GTV			0xEF
+
+#define	EEPROM_ChannelPlan_8188GTV				0xB8
+#define	EEPROM_XTAL_8188GTV						0xB9
+#define	EEPROM_THERMAL_METER_8188GTV			0xBA
+#define	EEPROM_IQK_LCK_8188GTV					0xBB
+#define	EEPROM_2G_5G_PA_TYPE_8188GTV			0xBC
+#define	EEPROM_2G_LNA_TYPE_GAIN_SEL_8188GTV		0xBD
+#define	EEPROM_5G_LNA_TYPE_GAIN_SEL_8188GTV		0xBF
+
+#define	EEPROM_RF_BOARD_OPTION_8188GTV			0xC1
+#define	EEPROM_FEATURE_OPTION_8188GTV			0xC2
+#define	EEPROM_RF_BT_SETTING_8188GTV			0xC3
+#define	EEPROM_VERSION_8188GTV					0xC4
+#define	EEPROM_CustomID_8188GTV					0xC5
+#define	EEPROM_TX_BBSWING_2G_8188GTV			0xC6
+#define	EEPROM_TX_PWR_CALIBRATE_RATE_8188GTV	0xC8
+#define	EEPROM_RF_ANTENNA_OPT_8188GTV			0xC9
+#define	EEPROM_RFE_OPTION_8188GTV				0xCA
+#define EEPROM_COUNTRY_CODE_8188GTV				0xCB
+#define EEPROM_CUSTOMER_ID_8188GTV				0x7F
+#define EEPROM_SUBCUSTOMER_ID_8188GTV			0x59
+
+/* RTL8188GTVU */
+#define EEPROM_MAC_ADDR_8188GTVU				0xD7
+#define EEPROM_VID_8188GTVU						0xD0
+#define EEPROM_PID_8188GTVU						0xD2
+#define EEPROM_PA_TYPE_8188GTVU					0xBC
+#define EEPROM_LNA_TYPE_2G_8188GTVU				0xBD
+#define EEPROM_USB_OPTIONAL_FUNCTION0_8188GTVU	0xD4
+
+/* RTL8188GTVS */
+#define	EEPROM_MAC_ADDR_8188GTVS				0x11A
+#define EEPROM_Voltage_ADDR_8188GTV				0x8
+
 /* ****************************************************
  *			EEPROM/Efuse PG Offset for 8723BE/8723BU/8723BS
- * ****************************************************
- * 0x10 ~ 0x63 = TX power area. */
-#define	EEPROM_TX_PWR_INX_8723B				0x10
-
+ * *****************************************************/
 #define	EEPROM_ChannelPlan_8723B				0xB8
 #define	EEPROM_XTAL_8723B						0xB9
 #define	EEPROM_THERMAL_METER_8723B			0xBA
@@ -386,8 +414,6 @@
 #define PPG_BB_GAIN_2G_TXA_OFFSET_8703B	0xEE
 #define PPG_THERMAL_OFFSET_8703B		0xEF
 
-#define	EEPROM_TX_PWR_INX_8703B				0x10
-
 #define	EEPROM_ChannelPlan_8703B				0xB8
 #define	EEPROM_XTAL_8703B					0xB9
 #define	EEPROM_THERMAL_METER_8703B			0xBA
@@ -424,8 +450,6 @@
  *	EEPROM/Efuse PG Offset for 8822B
  * ====================================================
  */
-#define	EEPROM_TX_PWR_INX_8822B			0x10
-
 #define	EEPROM_ChannelPlan_8822B		0xB8
 #define	EEPROM_XTAL_8822B			0xB9
 #define	EEPROM_THERMAL_METER_8822B		0xBA
@@ -468,8 +492,6 @@
  *	EEPROM/Efuse PG Offset for 8821C
  * ====================================================
  */
-#define	EEPROM_TX_PWR_INX_8821C			0x10
-
 #define	EEPROM_CHANNEL_PLAN_8821C		0xB8
 #define	EEPROM_XTAL_8821C			0xB9
 #define	EEPROM_THERMAL_METER_8821C		0xBA
@@ -523,8 +545,6 @@
 #define PPG_BB_GAIN_2G_TX_OFFSET_8723D		0x1EE
 #define PPG_THERMAL_OFFSET_8723D		0xEF
 
-#define	EEPROM_TX_PWR_INX_8723D			0x10
-
 #define	EEPROM_ChannelPlan_8723D		0xB8
 #define	EEPROM_XTAL_8723D			0xB9
 #define	EEPROM_THERMAL_METER_8723D		0xBA
@@ -562,9 +582,81 @@
 #define	EEPROM_Voltage_ADDR_8723D		0x8
 
 /* ****************************************************
+ *	EEPROM/Efuse PG Offset for 8192F
+ * **************************************************** */
+#define	EEPROM_ChannelPlan_8192F			0xB8
+#define	EEPROM_XTAL_8192F					0xB9
+#define	EEPROM_THERMAL_METER_8192F			0xBA
+#define	EEPROM_IQK_LCK_8192F				0xBB
+#define	EEPROM_2G_5G_PA_TYPE_8192F			0xBC
+#define	EEPROM_2G_LNA_TYPE_GAIN_SEL_8192F	0xBD
+#define	EEPROM_5G_LNA_TYPE_GAIN_SEL_8192F	0xBF
+
+#define	EEPROM_RF_BOARD_OPTION_8192F		0xC1
+#define	EEPROM_FEATURE_OPTION_8192F			0xC2
+#define	EEPROM_RF_BT_SETTING_8192F			0xC3
+#define	EEPROM_VERSION_8192F				0xC4
+#define	EEPROM_CustomID_8192F				0xC5
+#define	EEPROM_TX_BBSWING_2G_8192F			0xC6
+#define	EEPROM_TX_BBSWING_5G_8192F			0xC7
+#define	EEPROM_TX_PWR_CALIBRATE_RATE_8192F	0xC8
+#define	EEPROM_RF_ANTENNA_OPT_8192F			0xC9
+#define	EEPROM_RFE_OPTION_8192F				0xCA
+#define EEPROM_COUNTRY_CODE_8192F			0xCB
+/*RTL8192FS*/
+#define	EEPROM_MAC_ADDR_8192FS				0x11A
+#define EEPROM_Voltage_ADDR_8192F			0x8
+/* RTL8192FU */
+#define EEPROM_MAC_ADDR_8192FU					0x107
+#define EEPROM_VID_8192FU							0x100
+#define EEPROM_PID_8192FU							0x102
+#define EEPROM_USB_OPTIONAL_FUNCTION0_8192FU	0x104
+/* RTL8192FE */
+#define EEPROM_MAC_ADDR_8192FE					0xD0
+#define EEPROM_VID_8192FE							0xD6
+#define EEPROM_DID_8192FE							0xD8
+#define EEPROM_SVID_8192FE							0xDA
+#define EEPROM_SMID_8192FE						0xDC
+
+/* ****************************************************
+ *	EEPROM/Efuse PG Offset for 8710B
+ * **************************************************** */
+#define RTL_EEPROM_ID_8710B 					0x8195
+#define EEPROM_Default_ThermalMeter_8710B		0x1A
+
+#define	EEPROM_CHANNEL_PLAN_8710B			0xC8
+#define	EEPROM_XTAL_8710B					0xC9
+#define	EEPROM_THERMAL_METER_8710B			0xCA
+#define	EEPROM_IQK_LCK_8710B					0xCB
+#define	EEPROM_2G_5G_PA_TYPE_8710B			0xCC
+#define	EEPROM_2G_LNA_TYPE_GAIN_SEL_8710B	0xCD
+#define	EEPROM_5G_LNA_TYPE_GAIN_SEL_8710B	0xCF
+#define 	EEPROM_TX_KFREE_8710B				0xEE    //Physical  Efuse Address
+#define 	EEPROM_THERMAL_8710B				0xEF    //Physical  Efuse Address
+#define 	EEPROM_PACKAGE_TYPE_8710B			0xF8    //Physical  Efuse Address
+
+#define EEPROM_RF_BOARD_OPTION_8710B		0x131
+#define EEPROM_RF_FEATURE_OPTION_8710B		0x132
+#define EEPROM_RF_BT_SETTING_8710B			0x133
+#define EEPROM_VERSION_8710B					0x134
+#define EEPROM_CUSTOM_ID_8710B				0x135
+#define EEPROM_TX_BBSWING_2G_8710B			0x136
+#define EEPROM_TX_BBSWING_5G_8710B			0x137
+#define EEPROM_TX_PWR_CALIBRATE_RATE_8710B	0x138
+#define EEPROM_RF_ANTENNA_OPT_8710B			0x139
+#define EEPROM_RFE_OPTION_8710B				0x13A
+#define EEPROM_COUNTRY_CODE_8710B			0x13B
+#define EEPROM_COUNTRY_CODE_2_8710B			0x13C
+
+#define EEPROM_MAC_ADDR_8710B 				0x11A
+#define EEPROM_VID_8710BU						0x1C0
+#define EEPROM_PID_8710BU						0x1C2
+
+/* ****************************************************
  *			EEPROM/Efuse Value Type
  * **************************************************** */
 #define EETYPE_TX_PWR							0x0
+#define EETYPE_MAX_RFE_8192F					0x31
 /* ****************************************************
  *			EEPROM/Efuse Default Value
  * **************************************************** */
@@ -612,8 +704,9 @@
 #define	EEPROM_Default_ThermalMeter_8703B		0x18
 #define	EEPROM_Default_ThermalMeter_8723D		0x18
 #define	EEPROM_Default_ThermalMeter_8188F		0x18
+#define	EEPROM_Default_ThermalMeter_8188GTV		0x18
 #define EEPROM_Default_ThermalMeter_8814A		0x18
-
+#define	EEPROM_Default_ThermalMeter_8192F		0x1A
 
 #define EEPROM_Default_CrystalCap				0x0
 #define EEPROM_Default_CrystalCap_8723A		0x20
@@ -625,6 +718,8 @@
 #define EEPROM_Default_CrystalCap_8703B			0x20
 #define EEPROM_Default_CrystalCap_8723D			0x20
 #define EEPROM_Default_CrystalCap_8188F			0x20
+#define EEPROM_Default_CrystalCap_8188GTV		0x20
+#define EEPROM_Default_CrystalCap_8192F			0x20
 #define EEPROM_Default_CrystalFreq				0x0
 #define EEPROM_Default_TxPowerLevel_92C		0x22
 #define EEPROM_Default_TxPowerLevel_2G			0x2C
@@ -772,7 +867,8 @@ typedef	enum _BT_CoType {
 	BT_RTL8703B		= 12,
 	BT_RTL8822B		= 13,
 	BT_RTL8723D		= 14,
-	BT_RTL8821C		= 15
+	BT_RTL8821C		= 15,
+	BT_RTL8192F		= 16,
 } BT_CoType, *PBT_CoType;
 
 typedef	enum _BT_RadioShared {
diff --git a/rtl8723DS/include/hal_phy.h b/rtl8723DS/include/hal_phy.h
index a90b266..342613b 100755..100644
--- a/rtl8723DS/include/hal_phy.h
+++ b/rtl8723DS/include/hal_phy.h
@@ -151,6 +151,14 @@ typedef struct _R_ANTENNA_SELECT_CCK {
 	u8			r_ccktx_enable:4;
 } R_ANTENNA_SELECT_CCK;
 
+
+/*--------------------------Exported Function prototype---------------------*/
+u32
+PHY_CalculateBitShift(
+	u32 BitMask
+);
+
+#ifdef CONFIG_RF_SHADOW_RW
 typedef struct RF_Shadow_Compare_Map {
 	/* Shadow register value */
 	u32		Value;
@@ -164,13 +172,6 @@ typedef struct RF_Shadow_Compare_Map {
 	u8		Driver_Write;
 } RF_SHADOW_T;
 
-/*--------------------------Exported Function prototype---------------------*/
-
-u32
-PHY_CalculateBitShift(
-	u32 BitMask
-);
-
 u32
 PHY_RFShadowRead(
 	IN	PADAPTER		Adapter,
@@ -229,5 +230,5 @@ PHY_RFShadowRecorverFlagSetAll(
 VOID
 PHY_RFShadowRefresh(
 	IN	PADAPTER		Adapter);
-
+#endif /*#CONFIG_RF_SHADOW_RW*/
 #endif /* __HAL_COMMON_H__ */
diff --git a/rtl8723DS/include/hal_phy_reg.h b/rtl8723DS/include/hal_phy_reg.h
index 6e6a99e..6e6a99e 100755..100644
--- a/rtl8723DS/include/hal_phy_reg.h
+++ b/rtl8723DS/include/hal_phy_reg.h
diff --git a/rtl8723DS/include/hal_sdio.h b/rtl8723DS/include/hal_sdio.h
index 3c22eb9..c3578e2 100755..100644
--- a/rtl8723DS/include/hal_sdio.h
+++ b/rtl8723DS/include/hal_sdio.h
@@ -20,7 +20,7 @@
 u8 rtw_hal_sdio_max_txoqt_free_space(_adapter *padapter);
 u8 rtw_hal_sdio_query_tx_freepage(_adapter *padapter, u8 PageIdx, u8 RequiredPageNum);
 void rtw_hal_sdio_update_tx_freepage(_adapter *padapter, u8 PageIdx, u8 RequiredPageNum);
-void rtw_hal_set_sdio_tx_max_length(PADAPTER padapter, u8 numHQ, u8 numNQ, u8 numLQ, u8 numPubQ);
+void rtw_hal_set_sdio_tx_max_length(PADAPTER padapter, u8 numHQ, u8 numNQ, u8 numLQ, u8 numPubQ, u8 div_num);
 u32 rtw_hal_get_sdio_tx_max_length(PADAPTER padapter, u8 queue_idx);
 bool sdio_power_on_check(PADAPTER padapter);
 
@@ -28,4 +28,29 @@ bool sdio_power_on_check(PADAPTER padapter);
 void sd_c2h_hisr_hdl(_adapter *adapter);
 #endif
 
+#if defined(CONFIG_RTL8188F) || defined (CONFIG_RTL8188GTV) || defined (CONFIG_RTL8192F)
+#define SDIO_LOCAL_CMD_ADDR(addr) ((SDIO_LOCAL_DEVICE_ID << 13) | ((addr) & SDIO_LOCAL_MSK))
+#endif
+
+#ifdef CONFIG_SDIO_CHK_HCI_RESUME
+bool sdio_chk_hci_resume(struct intf_hdl *pintfhdl);
+void sdio_chk_hci_suspend(struct intf_hdl *pintfhdl);
+#else
+#define sdio_chk_hci_resume(pintfhdl) _FALSE
+#define sdio_chk_hci_suspend(pintfhdl) do {} while (0)
+#endif /* CONFIG_SDIO_CHK_HCI_RESUME */
+
+#ifdef CONFIG_SDIO_INDIRECT_ACCESS
+/* program indirect access register in sdio local to read/write page0 registers */
+s32 sdio_iread(PADAPTER padapter, u32 addr, u8 size, u8 *v);
+s32 sdio_iwrite(PADAPTER padapter, u32 addr, u8 size, u8 *v);
+u8 sdio_iread8(struct intf_hdl *pintfhdl, u32 addr);
+u16 sdio_iread16(struct intf_hdl *pintfhdl, u32 addr);
+u32 sdio_iread32(struct intf_hdl *pintfhdl, u32 addr);
+s32 sdio_iwrite8(struct intf_hdl *pintfhdl, u32 addr, u8 val);
+s32 sdio_iwrite16(struct intf_hdl *pintfhdl, u32 addr, u16 val);
+s32 sdio_iwrite32(struct intf_hdl *pintfhdl, u32 addr, u32 val);
+#endif /* CONFIG_SDIO_INDIRECT_ACCESS */
+u32 cmd53_4byte_alignment(struct intf_hdl *pintfhdl, u32 addr);
+
 #endif /* __HAL_SDIO_H_ */
diff --git a/rtl8723DS/include/ieee80211.h b/rtl8723DS/include/ieee80211.h
index 665cefe..c87a5b2 100755..100644
--- a/rtl8723DS/include/ieee80211.h
+++ b/rtl8723DS/include/ieee80211.h
@@ -151,6 +151,58 @@ extern u8 RSN_CIPHER_SUITE_WRAP[];
 extern u8 RSN_CIPHER_SUITE_CCMP[];
 extern u8 RSN_CIPHER_SUITE_WEP104[];
 
+/* IEEE 802.11i */
+#define PMKID_LEN 16
+#define PMK_LEN 32
+#define PMK_LEN_SUITE_B_192 48
+#define PMK_LEN_MAX 48
+#define WPA_REPLAY_COUNTER_LEN 8
+#define WPA_NONCE_LEN 32
+#define WPA_KEY_RSC_LEN 8
+#define WPA_GMK_LEN 32
+#define WPA_GTK_MAX_LEN 32
+
+/* IEEE 802.11, 8.5.2 EAPOL-Key frames */
+#define WPA_KEY_INFO_TYPE_MASK ((u16) (BIT(0) | BIT(1) | BIT(2)))
+#define WPA_KEY_INFO_TYPE_AKM_DEFINED 0
+#define WPA_KEY_INFO_TYPE_HMAC_MD5_RC4 BIT(0)
+#define WPA_KEY_INFO_TYPE_HMAC_SHA1_AES BIT(1)
+#define WPA_KEY_INFO_TYPE_AES_128_CMAC 3
+#define WPA_KEY_INFO_KEY_TYPE BIT(3) /* 1 = Pairwise, 0 = Group key */
+/* bit4..5 is used in WPA, but is reserved in IEEE 802.11i/RSN */
+#define WPA_KEY_INFO_KEY_INDEX_MASK (BIT(4) | BIT(5))
+#define WPA_KEY_INFO_KEY_INDEX_SHIFT 4
+#define WPA_KEY_INFO_INSTALL BIT(6) /* pairwise */
+#define WPA_KEY_INFO_TXRX BIT(6) /* group */
+#define WPA_KEY_INFO_ACK BIT(7)
+#define WPA_KEY_INFO_MIC BIT(8)
+#define WPA_KEY_INFO_SECURE BIT(9)
+#define WPA_KEY_INFO_ERROR BIT(10)
+#define WPA_KEY_INFO_REQUEST BIT(11)
+#define WPA_KEY_INFO_ENCR_KEY_DATA BIT(12) /* IEEE 802.11i/RSN only */
+#define WPA_KEY_INFO_SMK_MESSAGE BIT(13)
+
+struct ieee802_1x_hdr {
+	u8 version;
+	u8 type;
+	u16 length;
+	/* followed by length octets of data */
+};
+
+struct wpa_eapol_key {
+	u8 type;
+	/* Note: key_info, key_length, and key_data_length are unaligned */
+	u8 key_info[2]; /* big endian */
+	u8 key_length[2]; /* big endian */
+	u8 replay_counter[WPA_REPLAY_COUNTER_LEN];
+	u8 key_nonce[WPA_NONCE_LEN];
+	u8 key_iv[16];
+	u8 key_rsc[WPA_KEY_RSC_LEN];
+	u8 key_id[8]; /* Reserved in IEEE 802.11i/RSN */
+	u8 key_mic[16];
+	u8 key_data_length[2]; /* big endian */
+	/* followed by key_data_length bytes of key_data */
+};
 
 typedef enum _RATEID_IDX_ {
 	RATEID_IDX_BGN_40M_2SS = 0,
@@ -391,6 +443,28 @@ struct eapol {
 	u16 length;
 } __attribute__((packed));
 
+struct rtw_ieee80211s_hdr {
+	u8 flags;
+	u8 ttl;
+	u32 seqnum;
+	u8 eaddr1[ETH_ALEN];
+	u8 eaddr2[ETH_ALEN];
+} __attribute__((packed));
+
+/**
+ * struct rtw_ieee80211_rann_ie
+ *
+ * This structure refers to "Root Announcement information element"
+ */
+ struct rtw_ieee80211_rann_ie {
+	u8 rann_flags;
+	u8 rann_hopcount;
+	u8 rann_ttl;
+	u8 rann_addr[ETH_ALEN];
+	u32 rann_seq;
+	u32 rann_interval;
+	u32 rann_metric;
+} __attribute__((packed));
 #endif
 
 
@@ -631,6 +705,21 @@ struct ieee80211_snap_hdr {
 #define WLAN_REASON_CLASS3_FRAME_FROM_NONASSOC_STA 7
 #define WLAN_REASON_DISASSOC_STA_HAS_LEFT 8
 #define WLAN_REASON_STA_REQ_ASSOC_WITHOUT_AUTH 9
+#define WLAN_REASON_MESH_PEER_CANCELED 52
+#define WLAN_REASON_MESH_MAX_PEERS 53
+#define WLAN_REASON_MESH_CONFIG 54
+#define WLAN_REASON_MESH_CLOSE 55
+#define WLAN_REASON_MESH_MAX_RETRIES 56 
+#define WLAN_REASON_MESH_CONFIRM_TIMEOUT 57
+#define WLAN_REASON_MESH_INVALID_GTK 58
+#define WLAN_REASON_MESH_INCONSISTENT_PARAM 59
+#define WLAN_REASON_MESH_INVALID_SECURITY 60
+#define WLAN_REASON_MESH_PATH_NOPROXY 61
+#define WLAN_REASON_MESH_PATH_NOFORWARD 62
+#define WLAN_REASON_MESH_PATH_DEST_UNREACHABLE 63
+#define WLAN_REASON_MAC_EXISTS_IN_MBSS 64
+#define WLAN_REASON_MESH_CHAN_REGULATORY 65
+#define WLAN_REASON_MESH_CHAN 66
 #define WLAN_REASON_SA_QUERY_TIMEOUT 65532
 #define WLAN_REASON_ACTIVE_ROAM 65533
 #define WLAN_REASON_JOIN_WRONG_CHANNEL       65534
@@ -678,6 +767,15 @@ struct ieee80211_snap_hdr {
 #define WLAN_EID_20_40_BSS_INTOLERANT 73
 #define WLAN_EID_OVERLAPPING_BSS_SCAN_PARAMS 74
 #define WLAN_EID_MMIE 76
+#define WLAN_EID_MESH_CONFIG 113
+#define WLAN_EID_MESH_ID 114
+#define WLAN_EID_MPM 117
+#define	WLAN_EID_RANN 126
+#define	WLAN_EID_PREQ 130
+#define	WLAN_EID_PREP 131
+#define	WLAN_EID_PERR 132
+#define WLAN_EID_AMPE 139
+#define WLAN_EID_MIC 140
 #define WLAN_EID_VENDOR_SPECIFIC 221
 #define WLAN_EID_GENERIC (WLAN_EID_VENDOR_SPECIFIC)
 #define WLAN_EID_VHT_CAPABILITY 191
@@ -1107,11 +1205,8 @@ struct ieee80211_softmac_stats {
 
 #define WEP_KEYS 4
 #define WEP_KEY_LEN 13
-
-#ifdef CONFIG_IEEE80211W
-	#define BIP_MAX_KEYID 5
-	#define BIP_AAD_SIZE  20
-#endif /* CONFIG_IEEE80211W */
+#define BIP_MAX_KEYID 5
+#define BIP_AAD_SIZE  20
 
 #if defined(PLATFORM_LINUX) || defined(CONFIG_RTL8711FW)
 
@@ -1486,18 +1581,18 @@ enum ieee80211_state {
 	(((Addr[2]) & 0xff) == 0xff) && (((Addr[3]) & 0xff) == 0xff) && (((Addr[4]) & 0xff) == 0xff) && \
 				     (((Addr[5]) & 0xff) == 0xff))
 #else
-static __inline int is_multicast_mac_addr(const u8 *addr)
+extern __inline int is_multicast_mac_addr(const u8 *addr)
 {
 	return (addr[0] != 0xff) && (0x01 & addr[0]);
 }
 
-static __inline int is_broadcast_mac_addr(const u8 *addr)
+extern __inline int is_broadcast_mac_addr(const u8 *addr)
 {
 	return ((addr[0] == 0xff) && (addr[1] == 0xff) && (addr[2] == 0xff) &&   \
 		(addr[3] == 0xff) && (addr[4] == 0xff) && (addr[5] == 0xff));
 }
 
-static __inline int is_zero_mac_addr(const u8 *addr)
+extern __inline int is_zero_mac_addr(const u8 *addr)
 {
 	return ((addr[0] == 0x00) && (addr[1] == 0x00) && (addr[2] == 0x00) &&   \
 		(addr[3] == 0x00) && (addr[4] == 0x00) && (addr[5] == 0x00));
@@ -1583,6 +1678,32 @@ enum rtw_ieee80211_spectrum_mgmt_actioncode {
 	RTW_WLAN_ACTION_SPCT_EXT_CHL_SWITCH = 5,
 };
 
+/* SELF_PROTECTED action code */
+enum rtw_ieee80211_self_protected_actioncode {
+	RTW_ACT_SELF_PROTECTED_RSVD = 0,
+	RTW_ACT_SELF_PROTECTED_MESH_OPEN = 1,
+	RTW_ACT_SELF_PROTECTED_MESH_CONF = 2,
+	RTW_ACT_SELF_PROTECTED_MESH_CLOSE = 3,
+	RTW_ACT_SELF_PROTECTED_MESH_GK_INFORM = 4,
+	RTW_ACT_SELF_PROTECTED_MESH_GK_ACK = 5,
+	RTW_ACT_SELF_PROTECTED_NUM,
+};
+
+/* MESH action code */
+enum rtw_ieee80211_mesh_actioncode {
+	RTW_ACT_MESH_LINK_METRIC_REPORT,
+	RTW_ACT_MESH_HWMP_PATH_SELECTION,
+	RTW_ACT_MESH_GATE_ANNOUNCEMENT,
+	RTW_ACT_MESH_CONGESTION_CONTROL_NOTIFICATION,
+	RTW_ACT_MESH_MCCA_SETUP_REQUEST,
+	RTW_ACT_MESH_MCCA_SETUP_REPLY,
+	RTW_ACT_MESH_MCCA_ADVERTISEMENT_REQUEST,
+	RTW_ACT_MESH_MCCA_ADVERTISEMENT,
+	RTW_ACT_MESH_MCCA_TEARDOWN,
+	RTW_ACT_MESH_TBTT_ADJUSTMENT_REQUEST,
+	RTW_ACT_MESH_TBTT_ADJUSTMENT_RESPONSE,
+};
+
 enum _PUBLIC_ACTION {
 	ACT_PUBLIC_BSSCOEXIST = 0, /* 20/40 BSS Coexistence */
 	ACT_PUBLIC_DSE_ENABLE = 1,
@@ -1710,6 +1831,55 @@ enum rtw_ieee80211_wnm_actioncode {
 
 #define VENDOR_HT_CAPAB_OUI_TYPE 0x33 /* 00-90-4c:0x33 */
 
+enum rtw_ieee80211_rann_flags {
+	RTW_RANN_FLAG_IS_GATE = 1 << 0,
+};
+
+/**
+ * enum rtw_ieee80211_preq_flags - mesh PREQ element flags
+ *
+ * @RTW_IEEE80211_PREQ_IS_GATE_FLAG: Gate Announcement subfield
+ * @RTW_IEEE80211_PREQ_PROACTIVE_PREP_FLAG: proactive PREP subfield
+ */
+enum rtw_ieee80211_preq_flags {
+	RTW_IEEE80211_PREQ_IS_GATE_FLAG = 1 << 0,
+	RTW_IEEE80211_PREQ_PROACTIVE_PREP_FLAG	= 1 << 2,
+};
+
+/**
+ * enum rtw_ieee80211_preq_target_flags - mesh PREQ element per target flags
+ *
+ * @RTW_IEEE80211_PREQ_TO_FLAG: target only subfield
+ * @RTW_IEEE80211_PREQ_USN_FLAG: unknown target HWMP sequence number subfield
+ */
+enum rtw_ieee80211_preq_target_flags {
+	RTW_IEEE80211_PREQ_TO_FLAG	= 1<<0,
+	RTW_IEEE80211_PREQ_USN_FLAG	= 1<<2,
+};
+
+/**
+ * enum rtw_ieee80211_root_mode_identifier - root mesh STA mode identifier
+ *
+ * These attribute are used by dot11MeshHWMPRootMode to set root mesh STA mode
+ *
+ * @RTW_IEEE80211_ROOTMODE_NO_ROOT: the mesh STA is not a root mesh STA (default)
+ * @RTW_IEEE80211_ROOTMODE_ROOT: the mesh STA is a root mesh STA if greater than
+ *	this value
+ * @RTW_IEEE80211_PROACTIVE_PREQ_NO_PREP: the mesh STA is a root mesh STA supports
+ *	the proactive PREQ with proactive PREP subfield set to 0
+ * @RTW_IEEE80211_PROACTIVE_PREQ_WITH_PREP: the mesh STA is a root mesh STA
+ *	supports the proactive PREQ with proactive PREP subfield set to 1
+ * @RTW_IEEE80211_PROACTIVE_RANN: the mesh STA is a root mesh STA supports
+ *	the proactive RANN
+ */
+enum rtw_ieee80211_root_mode_identifier {
+	RTW_IEEE80211_ROOTMODE_NO_ROOT = 0,
+	RTW_IEEE80211_ROOTMODE_ROOT = 1,
+	RTW_IEEE80211_PROACTIVE_PREQ_NO_PREP = 2,
+	RTW_IEEE80211_PROACTIVE_PREQ_WITH_PREP = 3,
+	RTW_IEEE80211_PROACTIVE_RANN = 4,
+};
+
 /**
  * enum rtw_ieee80211_channel_flags - channel flags
  *
@@ -1834,6 +2004,16 @@ struct rtw_ieee802_11_elems {
 	u8 vht_op_mode_notify_len;
 	u8 *rm_en_cap;
 	u8 rm_en_cap_len;
+#ifdef CONFIG_RTW_MESH
+	u8 *preq;
+	u8 preq_len;
+	u8 *prep;
+	u8 prep_len;
+	u8 *perr;
+	u8 perr_len;
+	u8 *rann;
+	u8 rann_len;
+#endif
 };
 
 typedef enum { ParseOK = 0, ParseUnknown = 1, ParseFailed = -1 } ParseRes;
@@ -1857,6 +2037,7 @@ u8 *rtw_set_ie_secondary_ch_offset(u8 *buf, u32 *buf_len, u8 secondary_ch_offset
 u8 *rtw_set_ie_mesh_ch_switch_parm(u8 *buf, u32 *buf_len, u8 ttl, u8 flags, u16 reason, u16 precedence);
 
 u8 *rtw_get_ie(const u8 *pbuf, sint index, sint *len, sint limit);
+int rtw_remove_ie_g_rate(u8 *ie, uint *ie_len, uint offset, u8 eid);
 u8 *rtw_get_ie_ex(const u8 *in_ie, uint in_len, u8 eid, const u8 *oui, u8 oui_len, u8 *ie, uint *ielen);
 int rtw_ies_remove_ie(u8 *ies, uint *ies_len, uint offset, u8 eid, u8 *oui, u8 oui_len);
 
@@ -1921,9 +2102,9 @@ void dump_ht_cap_ie_content(void *sel, const u8 *buf, u32 buf_len);
 
 void dump_wps_ie(void *sel, const u8 *ie, u32 ie_len);
 
-void rtw_ies_get_chbw(u8 *ies, int ies_len, u8 *ch, u8 *bw, u8 *offset);
+void rtw_ies_get_chbw(u8 *ies, int ies_len, u8 *ch, u8 *bw, u8 *offset, u8 ht, u8 vht);
 
-void rtw_bss_get_chbw(WLAN_BSSID_EX *bss, u8 *ch, u8 *bw, u8 *offset);
+void rtw_bss_get_chbw(WLAN_BSSID_EX *bss, u8 *ch, u8 *bw, u8 *offset, u8 ht, u8 vht);
 
 bool rtw_is_chbw_grouped(u8 ch_a, u8 bw_a, u8 offset_a
 	, u8 ch_b, u8 bw_b, u8 offset_b);
@@ -1963,7 +2144,7 @@ int rtw_get_bit_value_from_ieee_value(u8 val);
 uint	rtw_is_cckrates_included(u8 *rate);
 
 uint	rtw_is_cckratesonly_included(u8 *rate);
-
+uint rtw_get_cckrate_size(u8 *rate,u32 rate_length);
 int rtw_check_network_type(unsigned char *rate, int ratelen, int channel);
 
 void rtw_get_bcn_info(struct wlan_network *pnetwork);
diff --git a/rtl8723DS/include/ieee80211_ext.h b/rtl8723DS/include/ieee80211_ext.h
index 94a8e58..94a8e58 100755..100644
--- a/rtl8723DS/include/ieee80211_ext.h
+++ b/rtl8723DS/include/ieee80211_ext.h
diff --git a/rtl8723DS/include/if_ether.h b/rtl8723DS/include/if_ether.h
index a3007c4..a3007c4 100755..100644
--- a/rtl8723DS/include/if_ether.h
+++ b/rtl8723DS/include/if_ether.h
diff --git a/rtl8723DS/include/ip.h b/rtl8723DS/include/ip.h
index 4feb98f..4feb98f 100755..100644
--- a/rtl8723DS/include/ip.h
+++ b/rtl8723DS/include/ip.h
diff --git a/rtl8723DS/include/linux/wireless.h b/rtl8723DS/include/linux/wireless.h
index c7f4a6c..c7f4a6c 100755..100644
--- a/rtl8723DS/include/linux/wireless.h
+++ b/rtl8723DS/include/linux/wireless.h
diff --git a/rtl8723DS/include/mlme_osdep.h b/rtl8723DS/include/mlme_osdep.h
index 7669fb3..131eb09 100755..100644
--- a/rtl8723DS/include/mlme_osdep.h
+++ b/rtl8723DS/include/mlme_osdep.h
@@ -15,11 +15,6 @@
 #ifndef	__MLME_OSDEP_H_
 #define __MLME_OSDEP_H_
 
-
-#if defined(PLATFORM_WINDOWS) || defined(PLATFORM_MPIXEL)
-	extern int time_after(systime now, systime old);
-#endif
-
 extern void rtw_os_indicate_disconnect(_adapter *adapter, u16 reason, u8 locally_generated);
 extern void rtw_os_indicate_connect(_adapter *adapter);
 void rtw_os_indicate_scan_done(_adapter *padapter, bool aborted);
diff --git a/rtl8723DS/include/mp_custom_oid.h b/rtl8723DS/include/mp_custom_oid.h
index 8ed1441..8ed1441 100755..100644
--- a/rtl8723DS/include/mp_custom_oid.h
+++ b/rtl8723DS/include/mp_custom_oid.h
diff --git a/rtl8723DS/include/nic_spec.h b/rtl8723DS/include/nic_spec.h
index 913ef9b..913ef9b 100755..100644
--- a/rtl8723DS/include/nic_spec.h
+++ b/rtl8723DS/include/nic_spec.h
diff --git a/rtl8723DS/include/osdep_intf.h b/rtl8723DS/include/osdep_intf.h
index 7be0880..7be0880 100755..100644
--- a/rtl8723DS/include/osdep_intf.h
+++ b/rtl8723DS/include/osdep_intf.h
diff --git a/rtl8723DS/include/osdep_service.h b/rtl8723DS/include/osdep_service.h
index 70705e9..35988cc 100755..100644
--- a/rtl8723DS/include/osdep_service.h
+++ b/rtl8723DS/include/osdep_service.h
@@ -24,6 +24,9 @@
 #define RTW_RBUF_UNAVAIL		5
 #define RTW_RBUF_PKT_UNAVAIL	6
 #define RTW_SDIO_READ_PORT_FAIL	7
+#define RTW_ALREADY				8
+#define RTW_RA_RESOLVING		9
+#define RTW_BMC_NO_NEED			10
 
 /* #define RTW_STATUS_TIMEDOUT -110 */
 
@@ -137,6 +140,7 @@ typedef enum mstat_status {
 #ifdef DBG_MEM_ALLOC
 void rtw_mstat_update(const enum mstat_f flags, const MSTAT_STATUS status, u32 sz);
 void rtw_mstat_dump(void *sel);
+bool match_mstat_sniff_rules(const enum mstat_f flags, const size_t size);
 void *dbg_rtw_vmalloc(u32 sz, const enum mstat_f flags, const char *func, const int line);
 void *dbg_rtw_zvmalloc(u32 sz, const enum mstat_f flags, const char *func, const int line);
 void dbg_rtw_vmfree(void *pbuf, const enum mstat_f flags, u32 sz, const char *func, const int line);
@@ -209,6 +213,7 @@ void dbg_rtw_usb_buffer_free(struct usb_device *dev, size_t size, void *addr, dm
 #else /* DBG_MEM_ALLOC */
 #define rtw_mstat_update(flag, status, sz) do {} while (0)
 #define rtw_mstat_dump(sel) do {} while (0)
+#define match_mstat_sniff_rules(flags, size) _FALSE
 void *_rtw_vmalloc(u32 sz);
 void *_rtw_zvmalloc(u32 sz);
 void _rtw_vmfree(void *pbuf, u32 sz);
@@ -284,6 +289,7 @@ extern void	*rtw_malloc2d(int h, int w, size_t size);
 extern void	rtw_mfree2d(void *pbuf, int h, int w, int size);
 
 void rtw_os_pkt_free(_pkt *pkt);
+_pkt *rtw_os_pkt_copy(_pkt *pkt);
 void *rtw_os_pkt_data(_pkt *pkt);
 u32 rtw_os_pkt_len(_pkt *pkt);
 
@@ -296,10 +302,20 @@ extern void	_rtw_init_listhead(_list *list);
 extern u32	rtw_is_list_empty(_list *phead);
 extern void	rtw_list_insert_head(_list *plist, _list *phead);
 extern void	rtw_list_insert_tail(_list *plist, _list *phead);
+void rtw_list_splice(_list *list, _list *head);
+void rtw_list_splice_init(_list *list, _list *head);
+void rtw_list_splice_tail(_list *list, _list *head);
+
 #ifndef PLATFORM_FREEBSD
 extern void	rtw_list_delete(_list *plist);
 #endif /* PLATFORM_FREEBSD */
 
+void rtw_hlist_head_init(rtw_hlist_head *h);
+void rtw_hlist_add_head(rtw_hlist_node *n, rtw_hlist_head *h);
+void rtw_hlist_del(rtw_hlist_node *n);
+void rtw_hlist_add_head_rcu(rtw_hlist_node *n, rtw_hlist_head *h);
+void rtw_hlist_del_rcu(rtw_hlist_node *n);
+
 extern void	_rtw_init_sema(_sema *sema, int init_val);
 extern void	_rtw_free_sema(_sema	*sema);
 extern void	_rtw_up_sema(_sema	*sema);
@@ -323,21 +339,32 @@ extern u32	rtw_end_of_queue_search(_list *queue, _list *pelement);
 extern systime _rtw_get_current_time(void);
 extern u32	_rtw_systime_to_ms(systime stime);
 extern systime _rtw_ms_to_systime(u32 ms);
+extern systime _rtw_us_to_systime(u32 us);
 extern s32	_rtw_get_passing_time_ms(systime start);
+extern s32 _rtw_get_remaining_time_ms(systime end);
 extern s32	_rtw_get_time_interval_ms(systime start, systime end);
+extern bool _rtw_time_after(systime a, systime b);
 
 #ifdef DBG_SYSTIME
 #define rtw_get_current_time() ({systime __stime = _rtw_get_current_time(); __stime;})
 #define rtw_systime_to_ms(stime) ({u32 __ms = _rtw_systime_to_ms(stime); typecheck(systime, stime); __ms;})
 #define rtw_ms_to_systime(ms) ({systime __stime = _rtw_ms_to_systime(ms); __stime;})
+#define rtw_us_to_systime(us) ({systime __stime = _rtw_us_to_systime(us); __stime;})
 #define rtw_get_passing_time_ms(start) ({u32 __ms = _rtw_get_passing_time_ms(start); typecheck(systime, start); __ms;})
+#define rtw_get_remaining_time_ms(end) ({u32 __ms = _rtw_get_remaining_time_ms(end); typecheck(systime, end); __ms;})
 #define rtw_get_time_interval_ms(start, end) ({u32 __ms = _rtw_get_time_interval_ms(start, end); typecheck(systime, start); typecheck(systime, end); __ms;})
+#define rtw_time_after(a,b) ({bool __r = _rtw_time_after(a,b); typecheck(systime, a); typecheck(systime, b); __r;})
+#define rtw_time_before(a,b) ({bool __r = _rtw_time_after(b, a); typecheck(systime, a); typecheck(systime, b); __r;})
 #else
 #define rtw_get_current_time() _rtw_get_current_time()
 #define rtw_systime_to_ms(stime) _rtw_systime_to_ms(stime)
 #define rtw_ms_to_systime(ms) _rtw_ms_to_systime(ms)
+#define rtw_us_to_systime(us) _rtw_us_to_systime(us)
 #define rtw_get_passing_time_ms(start) _rtw_get_passing_time_ms(start)
+#define rtw_get_remaining_time_ms(end) _rtw_get_remaining_time_ms(end)
 #define rtw_get_time_interval_ms(start, end) _rtw_get_time_interval_ms(start, end)
+#define rtw_time_after(a,b) _rtw_time_after(a,b)
+#define rtw_time_before(a,b) _rtw_time_after(b,a)
 #endif
 
 extern void	rtw_sleep_schedulable(int ms);
@@ -551,6 +578,7 @@ static inline int largest_bit(u32 bitmask)
 	return i;
 }
 
+#define rtw_abs(a) (a < 0 ? -a : a)
 #define rtw_min(a, b) ((a > b) ? b : a)
 #define rtw_is_range_a_in_b(hi_a, lo_a, hi_b, lo_b) (((hi_a) <= (hi_b)) && ((lo_a) >= (lo_b)))
 #define rtw_is_range_overlap(hi_a, lo_a, hi_b, lo_b) (((hi_a) > (lo_b)) && ((lo_a) < (hi_b)))
@@ -562,16 +590,14 @@ static inline int largest_bit(u32 bitmask)
 #define MAC_ARG(x) ((u8 *)(x))[0], ((u8 *)(x))[1], ((u8 *)(x))[2], ((u8 *)(x))[3], ((u8 *)(x))[4], ((u8 *)(x))[5]
 #endif
 
+bool rtw_macaddr_is_larger(const u8 *a, const u8 *b);
 
 extern void rtw_suspend_lock_init(void);
 extern void rtw_suspend_lock_uninit(void);
 extern void rtw_lock_suspend(void);
 extern void rtw_unlock_suspend(void);
 extern void rtw_lock_suspend_timeout(u32 timeout_ms);
-extern void rtw_lock_ext_suspend_timeout(u32 timeout_ms);
-extern void rtw_lock_rx_suspend_timeout(u32 timeout_ms);
 extern void rtw_lock_traffic_suspend_timeout(u32 timeout_ms);
-extern void rtw_lock_resume_scan_timeout(u32 timeout_ms);
 extern void rtw_resume_lock_suspend(void);
 extern void rtw_resume_unlock_suspend(void);
 #ifdef CONFIG_AP_WOWLAN
@@ -579,6 +605,10 @@ extern void rtw_softap_lock_suspend(void);
 extern void rtw_softap_unlock_suspend(void);
 #endif
 
+extern void rtw_set_bit(int nr, unsigned long *addr);
+extern void rtw_clear_bit(int nr, unsigned long *addr);
+extern int rtw_test_and_clear_bit(int nr, unsigned long *addr);
+
 extern void ATOMIC_SET(ATOMIC_T *v, int i);
 extern int ATOMIC_READ(ATOMIC_T *v);
 extern void ATOMIC_ADD(ATOMIC_T *v, int i);
@@ -589,6 +619,7 @@ extern int ATOMIC_ADD_RETURN(ATOMIC_T *v, int i);
 extern int ATOMIC_SUB_RETURN(ATOMIC_T *v, int i);
 extern int ATOMIC_INC_RETURN(ATOMIC_T *v);
 extern int ATOMIC_DEC_RETURN(ATOMIC_T *v);
+extern bool ATOMIC_INC_UNLESS(ATOMIC_T *v, int u);
 
 /* File operation APIs, just for linux now */
 extern int rtw_is_file_readable(const char *path);
@@ -725,6 +756,18 @@ struct map_t {
 int map_readN(const struct map_t *map, u16 offset, u16 len, u8 *buf);
 u8 map_read8(const struct map_t *map, u16 offset);
 
+struct blacklist_ent {
+	_list list;
+	u8 addr[ETH_ALEN];
+	systime exp_time;
+};
+
+int rtw_blacklist_add(_queue *blist, const u8 *addr, u32 timeout_ms);
+int rtw_blacklist_del(_queue *blist, const u8 *addr);
+int rtw_blacklist_search(_queue *blist, const u8 *addr);
+void rtw_blacklist_flush(_queue *blist);
+void dump_blacklist(void *sel, _queue *blist, const char *title);
+
 /* String handler */
 
 BOOLEAN is_null(char c);
diff --git a/rtl8723DS/include/osdep_service_bsd.h b/rtl8723DS/include/osdep_service_bsd.h
index 20c14d7..4773f05 100755..100644
--- a/rtl8723DS/include/osdep_service_bsd.h
+++ b/rtl8723DS/include/osdep_service_bsd.h
@@ -77,7 +77,7 @@
 //	typedef	spinlock_t	_lock;

 	typedef	struct mtx	_lock;

 	typedef struct mtx 		_mutex;

-	typedef struct timer_list _timer;

+	typedef struct rtw_timer_list _timer;

 	struct list_head {

 	struct list_head *next, *prev;

 	};

@@ -128,7 +128,7 @@
  * See (linux_compat) processes.c

  *

  */

-struct timer_list {

+struct rtw_timer_list {

 	struct callout callout;
 	void (*function)(void *);
 	void *arg;
diff --git a/rtl8723DS/include/osdep_service_ce.h b/rtl8723DS/include/osdep_service_ce.h
index bc920c0..a406d62 100755..100644
--- a/rtl8723DS/include/osdep_service_ce.h
+++ b/rtl8723DS/include/osdep_service_ce.h
@@ -40,7 +40,7 @@ typedef u32	_irqL;
 

 typedef NDIS_HANDLE  _nic_hdl;

 

-struct timer_list {
+struct rtw_timer_list {
 	NDIS_MINIPORT_TIMER ndis_timer;
 	void (*function)(void *);
 	void *arg;
diff --git a/rtl8723DS/include/osdep_service_linux.h b/rtl8723DS/include/osdep_service_linux.h
index f52dd42..2f84f97 100755..100644
--- a/rtl8723DS/include/osdep_service_linux.h
+++ b/rtl8723DS/include/osdep_service_linux.h
@@ -93,10 +93,6 @@
 	#include <net/cfg80211.h>
 #endif /* CONFIG_IOCTL_CFG80211 */
 
-#ifdef CONFIG_TCP_CSUM_OFFLOAD_TX
-	#include <linux/in.h>
-	#include <linux/udp.h>
-#endif
 
 #ifdef CONFIG_HAS_EARLYSUSPEND
 	#include <linux/earlysuspend.h>
@@ -160,7 +156,13 @@ typedef	spinlock_t	_lock;
 #else
 	typedef struct semaphore	_mutex;
 #endif
-typedef struct timer_list _timer;
+struct rtw_timer_list {
+	struct timer_list timer;
+	void (*function)(void *);
+	void *arg;
+};
+
+typedef struct rtw_timer_list _timer;
 typedef struct completion _completion;
 
 struct	__queue	{
@@ -173,6 +175,25 @@ typedef unsigned char	_buffer;
 
 typedef struct	__queue	_queue;
 typedef struct	list_head	_list;
+
+/* hlist */
+typedef struct	hlist_head	rtw_hlist_head;
+typedef struct	hlist_node	rtw_hlist_node;
+
+/* RCU */
+typedef struct rcu_head rtw_rcu_head;
+#define rtw_rcu_dereference(p) rcu_dereference((p))
+#define rtw_rcu_dereference_protected(p, c) rcu_dereference_protected(p, c)
+#define rtw_rcu_assign_pointer(p, v) rcu_assign_pointer((p), (v))
+#define rtw_rcu_read_lock() rcu_read_lock()
+#define rtw_rcu_read_unlock() rcu_read_unlock()
+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 34))
+#define rtw_rcu_access_pointer(p) rcu_access_pointer(p)
+#endif
+
+/* rhashtable */
+#include "../os_dep/linux/rtw_rhashtable.h"
+
 typedef	int	_OS_STATUS;
 /* typedef u32	_irqL; */
 typedef unsigned long _irqL;
@@ -220,20 +241,31 @@ static inline unsigned char *skb_end_pointer(const struct sk_buff *skb)
 }
 #endif
 
-__inline static _list *get_next(_list	*list)
+__inline static void rtw_list_delete(_list *plist)
 {
-	return list->next;
+	list_del_init(plist);
 }
 
-__inline static _list	*get_list_head(_queue	*queue)
+__inline static _list *get_next(_list	*list)
 {
-	return &(queue->queue);
+	return list->next;
 }
 
-
 #define LIST_CONTAINOR(ptr, type, member) \
 	((type *)((char *)(ptr)-(SIZE_T)(&((type *)0)->member)))
 
+#define rtw_list_first_entry(ptr, type, member) list_first_entry(ptr, type, member)
+
+#define rtw_hlist_for_each_entry(pos, head, member) hlist_for_each_entry(pos, head, member)
+#define rtw_hlist_for_each_safe(pos, n, head) hlist_for_each_safe(pos, n, head)
+#define rtw_hlist_entry(ptr, type, member) hlist_entry(ptr, type, member)
+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 9, 0))
+#define rtw_hlist_for_each_entry_safe(pos, np, n, head, member) hlist_for_each_entry_safe(pos, n, head, member)
+#define rtw_hlist_for_each_entry_rcu(pos, node, head, member) hlist_for_each_entry_rcu(pos, head, member)
+#else
+#define rtw_hlist_for_each_entry_safe(pos, np, n, head, member) hlist_for_each_entry_safe(pos, np, n, head, member)
+#define rtw_hlist_for_each_entry_rcu(pos, node, head, member) hlist_for_each_entry_rcu(pos, node, head, member)
+#endif
 
 __inline static void _enter_critical(_lock *plock, _irqL *pirqL)
 {
@@ -265,6 +297,16 @@ __inline static void _exit_critical_bh(_lock *plock, _irqL *pirqL)
 	spin_unlock_bh(plock);
 }
 
+__inline static void enter_critical_bh(_lock *plock)
+{
+	spin_lock_bh(plock);
+}
+
+__inline static void exit_critical_bh(_lock *plock)
+{
+	spin_unlock_bh(plock);
+}
+
 __inline static int _enter_critical_mutex(_mutex *pmutex, _irqL *pirqL)
 {
 	int ret = 0;
@@ -278,6 +320,17 @@ __inline static int _enter_critical_mutex(_mutex *pmutex, _irqL *pirqL)
 }
 
 
+__inline static int _enter_critical_mutex_lock(_mutex *pmutex, _irqL *pirqL)
+{
+	int ret = 0;
+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 37))
+	mutex_lock(pmutex);
+#else
+	down(pmutex);
+#endif
+	return ret;
+}
+
 __inline static void _exit_critical_mutex(_mutex *pmutex, _irqL *pirqL)
 {
 #if (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 37))
@@ -287,27 +340,48 @@ __inline static void _exit_critical_mutex(_mutex *pmutex, _irqL *pirqL)
 #endif
 }
 
-__inline static void rtw_list_delete(_list *plist)
+__inline static _list	*get_list_head(_queue	*queue)
 {
-	list_del_init(plist);
+	return &(queue->queue);
+}
+
+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(4, 14, 0))
+static inline void timer_hdl(struct timer_list *in_timer)
+#else
+static inline void timer_hdl(unsigned long cntx)
+#endif
+{
+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(4, 14, 0))
+	_timer *ptimer = from_timer(ptimer, in_timer, timer);
+#else
+	_timer *ptimer = (_timer *)cntx;
+#endif
+	ptimer->function(ptimer->arg);
 }
 
 __inline static void _init_timer(_timer *ptimer, _nic_hdl nic_hdl, void *pfunc, void *cntx)
 {
-	/* setup_timer(ptimer, pfunc,(u32)cntx);	 */
 	ptimer->function = pfunc;
-	ptimer->data = (unsigned long)cntx;
-	init_timer(ptimer);
+	ptimer->arg = cntx;
+
+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(4, 14, 0))
+	timer_setup(&ptimer->timer, timer_hdl, 0);
+#else
+	/* setup_timer(ptimer, pfunc,(u32)cntx);	 */
+	ptimer->timer.function = timer_hdl;
+	ptimer->timer.data = (unsigned long)ptimer;
+	init_timer(&ptimer->timer);
+#endif
 }
 
 __inline static void _set_timer(_timer *ptimer, u32 delay_time)
 {
-	mod_timer(ptimer , (jiffies + (delay_time * HZ / 1000)));
+	mod_timer(&ptimer->timer , (jiffies + (delay_time * HZ / 1000)));
 }
 
 __inline static void _cancel_timer(_timer *ptimer, u8 *bcancelled)
 {
-	*bcancelled = del_timer_sync(ptimer) == 1 ? 1 : 0;
+	*bcancelled = del_timer_sync(&ptimer->timer) == 1 ? 1 : 0;
 }
 
 static inline void _init_workitem(_workitem *pwork, void *pfunc, void *cntx)
diff --git a/rtl8723DS/include/osdep_service_xp.h b/rtl8723DS/include/osdep_service_xp.h
index fdbdb50..71dc1cd 100755..100644
--- a/rtl8723DS/include/osdep_service_xp.h
+++ b/rtl8723DS/include/osdep_service_xp.h
@@ -40,7 +40,7 @@
 	// USB_PIPE for WINCE , but handle can be use just integer under windows

 	typedef NDIS_HANDLE  _nic_hdl;

 

-	struct timer_list {
+	struct rtw_timer_list {
 		NDIS_MINIPORT_TIMER ndis_timer;
 		void (*function)(void *);
 		void *arg;
diff --git a/rtl8723DS/include/pci_hal.h b/rtl8723DS/include/pci_hal.h
index 16eac21..15e4a79 100755..100644
--- a/rtl8723DS/include/pci_hal.h
+++ b/rtl8723DS/include/pci_hal.h
@@ -27,6 +27,10 @@
 	void rtl8192ee_set_hal_ops(_adapter *padapter);
 #endif
 
+#if defined(CONFIG_RTL8192F)
+	void rtl8192fe_set_hal_ops(_adapter *padapter);
+#endif
+
 #ifdef CONFIG_RTL8723B
 	void rtl8723be_set_hal_ops(_adapter *padapter);
 #endif
diff --git a/rtl8723DS/include/pci_ops.h b/rtl8723DS/include/pci_ops.h
index f195f5b..6e4e0fa 100755..100644
--- a/rtl8723DS/include/pci_ops.h
+++ b/rtl8723DS/include/pci_ops.h
@@ -25,6 +25,7 @@
 	void	rtl8188ee_recv_tasklet(void *priv);
 	void	rtl8188ee_prepare_bcn_tasklet(void *priv);
 	void	rtl8188ee_set_intf_ops(struct _io_ops	*pops);
+	void	rtw8188ee_unmap_beacon_icf(_adapter *padapter);
 #endif
 
 #if defined(CONFIG_RTL8812A) || defined(CONFIG_RTL8821A)
@@ -36,6 +37,7 @@
 	void	rtl8812ae_recv_tasklet(void *priv);
 	void	rtl8812ae_prepare_bcn_tasklet(void *priv);
 	void	rtl8812ae_set_intf_ops(struct _io_ops	*pops);
+	void	rtw8812ae_unmap_beacon_icf(_adapter *padapter);
 #endif
 
 #ifdef CONFIG_RTL8192E
@@ -46,6 +48,19 @@
 	void	rtl8192ee_prepare_bcn_tasklet(void *priv);
 	int	rtl8192ee_interrupt(PADAPTER Adapter);
 	void	rtl8192ee_set_intf_ops(struct _io_ops	*pops);
+	void	rtw8192ee_unmap_beacon_icf(_adapter *padapter);
+#endif
+
+#ifdef CONFIG_RTL8192F
+	u32	rtl8192fe_init_desc_ring(_adapter *padapter);
+	u32	rtl8192fe_free_desc_ring(_adapter *padapter);
+	void	rtl8192fe_reset_desc_ring(_adapter *padapter);
+	int	rtl8192fe_interrupt(PADAPTER Adapter);
+	void	rtl8192fe_recv_tasklet(void *priv);
+	void	rtl8192fe_prepare_bcn_tasklet(void *priv);
+	void	rtl8192fe_set_intf_ops(struct _io_ops	*pops);
+	u8 check_tx_desc_resource(_adapter *padapter, int prio);
+	void	rtl8192fe_unmap_beacon_icf(PADAPTER Adapter);
 #endif
 
 #ifdef CONFIG_RTL8723B
@@ -56,6 +71,7 @@
 	void	rtl8723be_recv_tasklet(void *priv);
 	void	rtl8723be_prepare_bcn_tasklet(void *priv);
 	void	rtl8723be_set_intf_ops(struct _io_ops	*pops);
+	void	rtl8723be_unmap_beacon_icf(PADAPTER Adapter);
 #endif
 
 #ifdef CONFIG_RTL8723D
@@ -67,6 +83,7 @@
 	void	rtl8723de_prepare_bcn_tasklet(void *priv);
 	void	rtl8723de_set_intf_ops(struct _io_ops	*pops);
 	u8 check_tx_desc_resource(_adapter *padapter, int prio);
+	void 	rtl8723de_unmap_beacon_icf(PADAPTER Adapter);
 #endif
 
 #ifdef CONFIG_RTL8814A
@@ -78,6 +95,7 @@
 	void	rtl8814ae_recv_tasklet(void *priv);
 	void	rtl8814ae_prepare_bcn_tasklet(void *priv);
 	void	rtl8814ae_set_intf_ops(struct _io_ops	*pops);
+	void	rtl8814ae_unmap_beacon_icf(PADAPTER Adapter);
 #endif
 
 #ifdef CONFIG_RTL8822B
diff --git a/rtl8723DS/include/pci_osintf.h b/rtl8723DS/include/pci_osintf.h
index c6a0fdd..c6a0fdd 100755..100644
--- a/rtl8723DS/include/pci_osintf.h
+++ b/rtl8723DS/include/pci_osintf.h
diff --git a/rtl8723DS/include/recv_osdep.h b/rtl8723DS/include/recv_osdep.h
index 58038e5..8c569b6 100755..100644
--- a/rtl8723DS/include/recv_osdep.h
+++ b/rtl8723DS/include/recv_osdep.h
@@ -21,6 +21,7 @@ extern void _rtw_free_recv_priv(struct recv_priv *precvpriv);
 
 
 extern s32  rtw_recv_entry(union recv_frame *precv_frame);
+void rtw_rframe_set_os_pkt(union recv_frame *rframe);
 extern int rtw_recv_indicatepkt(_adapter *adapter, union recv_frame *precv_frame);
 extern void rtw_recv_returnpacket(IN _nic_hdl cnxt, IN _pkt *preturnedpkt);
 
@@ -47,7 +48,7 @@ void rtw_os_free_recvframe(union recv_frame *precvframe);
 int rtw_os_recvbuf_resource_alloc(_adapter *padapter, struct recv_buf *precvbuf);
 int rtw_os_recvbuf_resource_free(_adapter *padapter, struct recv_buf *precvbuf);
 
-_pkt *rtw_os_alloc_msdu_pkt(union recv_frame *prframe, u16 nSubframe_Length, u8 *pdata);
+_pkt *rtw_os_alloc_msdu_pkt(union recv_frame *prframe, const u8 *da, const u8 *sa, u8 *msdu ,u16 msdu_len);
 void rtw_os_recv_indicate_pkt(_adapter *padapter, _pkt *pkt, union recv_frame *rframe);
 
 void rtw_os_read_port(_adapter *padapter, struct recv_buf *precvbuf);
@@ -57,6 +58,9 @@ void rtw_os_read_port(_adapter *padapter, struct recv_buf *precvbuf);
 #include <linux/netdevice.h>	/* struct napi_struct */
 
 int rtw_recv_napi_poll(struct napi_struct *, int budget);
+#ifdef CONFIG_RTW_NAPI_DYNAMIC
+void dynamic_napi_th_chk (_adapter *adapter);
+#endif /* CONFIG_RTW_NAPI_DYNAMIC */
 #endif /* CONFIG_RTW_NAPI */
 #endif /* PLATFORM_LINUX */
 
diff --git a/rtl8723DS/include/rtl8188e_cmd.h b/rtl8723DS/include/rtl8188e_cmd.h
index 99a9cba..aba0bec 100755..100644
--- a/rtl8723DS/include/rtl8188e_cmd.h
+++ b/rtl8723DS/include/rtl8188e_cmd.h
@@ -135,7 +135,6 @@ typedef struct _RSVDPAGE_LOC_88E {
 /* host message to firmware cmd */
 void rtl8188e_set_FwPwrMode_cmd(PADAPTER padapter, u8 Mode);
 void rtl8188e_set_FwJoinBssReport_cmd(PADAPTER padapter, u8 mstatus);
-u8 rtl8188e_set_rssi_cmd(PADAPTER padapter, u8 *param);
 s32 FillH2CCmd_88E(PADAPTER padapter, u8 ElementID, u32 CmdLen, u8 *pCmdBuffer);
 /* u8 rtl8192c_set_FwSelectSuspend_cmd(PADAPTER padapter, u8 bfwpoll, u16 period); */
 u8 GetTxBufferRsvdPageNum8188E(_adapter *padapter, bool wowlan);
diff --git a/rtl8723DS/include/rtl8188e_dm.h b/rtl8723DS/include/rtl8188e_dm.h
index 501d3a9..501d3a9 100755..100644
--- a/rtl8723DS/include/rtl8188e_dm.h
+++ b/rtl8723DS/include/rtl8188e_dm.h
diff --git a/rtl8723DS/include/rtl8188e_hal.h b/rtl8723DS/include/rtl8188e_hal.h
index 23c435e..a344e49 100755..100644
--- a/rtl8723DS/include/rtl8188e_hal.h
+++ b/rtl8723DS/include/rtl8188e_hal.h
@@ -128,16 +128,18 @@ typedef struct _RT_8188E_FIRMWARE_HDR {
 
 #define MAX_TX_REPORT_BUFFER_SIZE			0x0400 /* 1k */
 
+#define PAGE_SIZE_TX_88E PAGE_SIZE_128
 /* Note: We will divide number of page equally for each queue other than public queue!
  * 22k = 22528 bytes = 176 pages (@page =  128 bytes)
- * must reserved about 7 pages for LPS =>  176-7 = 169 (0xA9)
- * 2*BCN / 1*ps-poll / 1*null-data /1*prob_rsp /1*QOS null-data /1*BT QOS null-data  */
+ * BCN rsvd_page_num = MAX_BEACON_LEN / PAGE_SIZE_TX_88E
+ * 1 ps-poll / 1 null-data /1 prob_rsp /1 QOS null-data = 4 pages */
 
-#define BCNQ_PAGE_NUM_88E		0x09
+#define BCNQ_PAGE_NUM_88E		(MAX_BEACON_LEN / PAGE_SIZE_TX_88E + 4) /*0x09*/
 
 /* For WoWLan , more reserved page */
 #ifdef CONFIG_WOWLAN
-	#define WOWLAN_PAGE_NUM_88E	0x00
+	/* 1 ArpRsp + 2 NbrAdv + 2 NDPInfo + 1 RCI + 1 AOAC = 7 pages */
+	#define WOWLAN_PAGE_NUM_88E	0x07
 #else
 	#define WOWLAN_PAGE_NUM_88E	0x00
 #endif
@@ -283,7 +285,6 @@ BOOLEAN HalDetectPwrDownMode88E(PADAPTER Adapter);
 	void Hal_ReadRFGainOffset(PADAPTER pAdapter, u8 *hwinfo, BOOLEAN AutoLoadFail);
 #endif /*CONFIG_RF_POWER_TRIM*/
 
-void rtl8188e_init_default_value(_adapter *adapter);
 
 void InitBeaconParameters_8188e(_adapter *adapter);
 void SetBeaconRelatedRegisters8188E(PADAPTER padapter);
@@ -291,9 +292,6 @@ void SetBeaconRelatedRegisters8188E(PADAPTER padapter);
 void rtl8188e_set_hal_ops(struct hal_ops *pHalFunc);
 void init_hal_spec_8188e(_adapter *adapter);
 
-/* register */
-void SetBcnCtrlReg(PADAPTER padapter, u8 SetBits, u8 ClearBits);
-
 void rtl8188e_start_thread(_adapter *padapter);
 void rtl8188e_stop_thread(_adapter *padapter);
 
diff --git a/rtl8723DS/include/rtl8188e_led.h b/rtl8723DS/include/rtl8188e_led.h
index ef05467..ef05467 100755..100644
--- a/rtl8723DS/include/rtl8188e_led.h
+++ b/rtl8723DS/include/rtl8188e_led.h
diff --git a/rtl8723DS/include/rtl8188e_recv.h b/rtl8723DS/include/rtl8188e_recv.h
index 92425a8..92425a8 100755..100644
--- a/rtl8723DS/include/rtl8188e_recv.h
+++ b/rtl8723DS/include/rtl8188e_recv.h
diff --git a/rtl8723DS/include/rtl8188e_rf.h b/rtl8723DS/include/rtl8188e_rf.h
index f5c5fbd..f5c5fbd 100755..100644
--- a/rtl8723DS/include/rtl8188e_rf.h
+++ b/rtl8723DS/include/rtl8188e_rf.h
diff --git a/rtl8723DS/include/rtl8188e_spec.h b/rtl8723DS/include/rtl8188e_spec.h
index 802659a..802659a 100755..100644
--- a/rtl8723DS/include/rtl8188e_spec.h
+++ b/rtl8723DS/include/rtl8188e_spec.h
diff --git a/rtl8723DS/include/rtl8188e_sreset.h b/rtl8723DS/include/rtl8188e_sreset.h
index f4ec2d8..f4ec2d8 100755..100644
--- a/rtl8723DS/include/rtl8188e_sreset.h
+++ b/rtl8723DS/include/rtl8188e_sreset.h
diff --git a/rtl8723DS/include/rtl8188e_xmit.h b/rtl8723DS/include/rtl8188e_xmit.h
index f625576..f625576 100755..100644
--- a/rtl8723DS/include/rtl8188e_xmit.h
+++ b/rtl8723DS/include/rtl8188e_xmit.h
diff --git a/rtl8723DS/include/rtl8188f_cmd.h b/rtl8723DS/include/rtl8188f_cmd.h
index a198e33..5e1bc9a 100755..100644
--- a/rtl8723DS/include/rtl8188f_cmd.h
+++ b/rtl8723DS/include/rtl8188f_cmd.h
@@ -113,7 +113,6 @@ enum h2c_cmd_8188F {
 #define SET_8188F_H2CCMD_PWRMODE_PARM_ALL_QUEUE_UAPSD(__pH2CCmd, __Value)	SET_BITS_TO_LE_1BYTE((__pH2CCmd)+3, 0, 8, __Value)
 #define SET_8188F_H2CCMD_PWRMODE_PARM_BCN_EARLY_C2H_RPT(__pH2CCmd, __Value)	SET_BITS_TO_LE_1BYTE((__pH2CCmd)+3, 2, 1, __Value)
 #define SET_8188F_H2CCMD_PWRMODE_PARM_PWR_STATE(__pH2CCmd, __Value)			SET_BITS_TO_LE_1BYTE((__pH2CCmd)+4, 0, 8, __Value)
-#define SET_8188F_H2CCMD_PWRMODE_PARM_BYTE5(__pH2CCmd, __Value)				SET_BITS_TO_LE_1BYTE((__pH2CCmd)+5, 0, 8, __Value)
 
 #define GET_8188F_H2CCMD_PWRMODE_PARM_MODE(__pH2CCmd)					LE_BITS_TO_1BYTE(__pH2CCmd, 0, 8)
 
@@ -178,7 +177,6 @@ enum h2c_cmd_8188F {
 /* host message to firmware cmd */
 void rtl8188f_set_FwPwrMode_cmd(PADAPTER padapter, u8 Mode);
 void rtl8188f_set_FwJoinBssRpt_cmd(PADAPTER padapter, u8 mstatus);
-void rtl8188f_set_rssi_cmd(PADAPTER padapter, u8 *param);
 void rtl8188f_fw_try_ap_cmd(PADAPTER padapter, u32 need_ack);
 /* s32 rtl8188f_set_lowpwr_lps_cmd(PADAPTER padapter, u8 enable); */
 void rtl8188f_set_FwPsTuneParam_cmd(PADAPTER padapter);
diff --git a/rtl8723DS/include/rtl8188f_dm.h b/rtl8723DS/include/rtl8188f_dm.h
index 342ade9..342ade9 100755..100644
--- a/rtl8723DS/include/rtl8188f_dm.h
+++ b/rtl8723DS/include/rtl8188f_dm.h
diff --git a/rtl8723DS/include/rtl8188f_hal.h b/rtl8723DS/include/rtl8188f_hal.h
index 7aaead7..9d5da6a 100755..100644
--- a/rtl8723DS/include/rtl8188f_hal.h
+++ b/rtl8723DS/include/rtl8188f_hal.h
@@ -104,18 +104,10 @@ typedef struct _RT_8188F_FIRMWARE_HDR {
 /* Note: We will divide number of page equally for each queue other than public queue! */
 
 /* For General Reserved Page Number(Beacon Queue is reserved page)
- * Beacon:2, PS-Poll:1, Null Data:1,Qos Null Data:1,BT Qos Null Data:1 */
-#define BCNQ_PAGE_NUM_8188F		0x08
-#ifdef CONFIG_CONCURRENT_MODE
-	#define BCNQ1_PAGE_NUM_8188F		0x08 /* 0x04 */
-#else
-	#define BCNQ1_PAGE_NUM_8188F		0x00
-#endif
+ * BCN rsvd_page_num = MAX_BEACON_LEN / PAGE_SIZE_TX_8188F,
+ * PS-Poll:1, Null Data:1,Qos Null Data:1,BT Qos Null Data:1, CTS-2-SELF / LTE QoS Null */
 
-#ifdef CONFIG_PNO_SUPPORT
-#undef BCNQ1_PAGE_NUM_8188F
-#define BCNQ1_PAGE_NUM_8188F		0x00 /* 0x04 */
-#endif
+#define BCNQ_PAGE_NUM_8188F		(MAX_BEACON_LEN / PAGE_SIZE_TX_8188F + 6) /*0x08*/
 
 /* For WoWLan , more reserved page
  * ARP Rsp:1, RWC:1, GTK Info:1,GTK RSP:2,GTK EXT MEM:2, AOAC rpt:1 ,PNO: 6
@@ -136,7 +128,7 @@ typedef struct _RT_8188F_FIRMWARE_HDR {
 #define AP_WOWLAN_PAGE_NUM_8188F	0x02
 #endif
 
-#define TX_TOTAL_PAGE_NUMBER_8188F	(0xFF - BCNQ_PAGE_NUM_8188F - BCNQ1_PAGE_NUM_8188F - WOWLAN_PAGE_NUM_8188F)
+#define TX_TOTAL_PAGE_NUMBER_8188F	(0xFF - BCNQ_PAGE_NUM_8188F - WOWLAN_PAGE_NUM_8188F)
 #define TX_PAGE_BOUNDARY_8188F		(TX_TOTAL_PAGE_NUMBER_8188F + 1)
 
 #define WMM_NORMAL_TX_TOTAL_PAGE_NUMBER_8188F	TX_TOTAL_PAGE_NUMBER_8188F
diff --git a/rtl8723DS/include/rtl8188f_led.h b/rtl8723DS/include/rtl8188f_led.h
index ef5d1a7..ef5d1a7 100755..100644
--- a/rtl8723DS/include/rtl8188f_led.h
+++ b/rtl8723DS/include/rtl8188f_led.h
diff --git a/rtl8723DS/include/rtl8188f_recv.h b/rtl8723DS/include/rtl8188f_recv.h
index 6366b81..6366b81 100755..100644
--- a/rtl8723DS/include/rtl8188f_recv.h
+++ b/rtl8723DS/include/rtl8188f_recv.h
diff --git a/rtl8723DS/include/rtl8188f_rf.h b/rtl8723DS/include/rtl8188f_rf.h
index bf4f591..bf4f591 100755..100644
--- a/rtl8723DS/include/rtl8188f_rf.h
+++ b/rtl8723DS/include/rtl8188f_rf.h
diff --git a/rtl8723DS/include/rtl8188f_spec.h b/rtl8723DS/include/rtl8188f_spec.h
index 6e99acf..d947ba8 100755..100644
--- a/rtl8723DS/include/rtl8188f_spec.h
+++ b/rtl8723DS/include/rtl8188f_spec.h
@@ -150,18 +150,6 @@
 
 #define SDIO_REG_HCPWM1_8188F			0x0038
 
-/* indirect access */
-#define SDIO_REG_INDIRECT_REG_CFG_8188F		0x40
-#define SET_INDIRECT_REG_ADDR(_cmd, _addr)	SET_BITS_TO_LE_2BYTE(((u8 *)(_cmd)) + 0, 0, 16, (_addr))
-#define SET_INDIRECT_REG_SIZE_1BYTE(_cmd)	SET_BITS_TO_LE_1BYTE(((u8 *)(_cmd)) + 2, 0, 2, 0)
-#define SET_INDIRECT_REG_SIZE_2BYTE(_cmd)	SET_BITS_TO_LE_1BYTE(((u8 *)(_cmd)) + 2, 0, 2, 1)
-#define SET_INDIRECT_REG_SIZE_4BYTE(_cmd)	SET_BITS_TO_LE_1BYTE(((u8 *)(_cmd)) + 2, 0, 2, 2)
-#define SET_INDIRECT_REG_WRITE(_cmd)		SET_BITS_TO_LE_1BYTE(((u8 *)(_cmd)) + 2, 2, 1, 1)
-#define SET_INDIRECT_REG_READ(_cmd)			SET_BITS_TO_LE_1BYTE(((u8 *)(_cmd)) + 2, 3, 1, 1)
-#define GET_INDIRECT_REG_RDY(_cmd)			LE_BITS_TO_1BYTE(((u8 *)(_cmd)) + 2, 4, 1)
-
-#define SDIO_REG_INDIRECT_REG_DATA_8188F	0x44
-
 /* ****************************************************************************
  *	8188 Regsiter Bit and Content definition
  * **************************************************************************** */
diff --git a/rtl8723DS/include/rtl8188f_sreset.h b/rtl8723DS/include/rtl8188f_sreset.h
index fe56567..fe56567 100755..100644
--- a/rtl8723DS/include/rtl8188f_sreset.h
+++ b/rtl8723DS/include/rtl8188f_sreset.h
diff --git a/rtl8723DS/include/rtl8188f_xmit.h b/rtl8723DS/include/rtl8188f_xmit.h
index 069183d..40493ce 100755..100644
--- a/rtl8723DS/include/rtl8188f_xmit.h
+++ b/rtl8723DS/include/rtl8188f_xmit.h
@@ -184,13 +184,15 @@
 #define SET_TX_DESC_ANTSEL_D_8188F(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+24, 25, 3, __Value)
 
 /* Dword 7 */
-#if (DEV_BUS_TYPE == RT_PCI_INTERFACE)
+#ifdef CONFIG_PCI_HCI
 #define SET_TX_DESC_TX_BUFFER_SIZE_8188F(__pTxDesc, __Value)		SET_BITS_TO_LE_4BYTE(__pTxDesc+28, 0, 16, __Value)
-#else
+#endif
+
+#if defined(CONFIG_SDIO_HCI) || defined(CONFIG_USB_HCI)
 #define SET_TX_DESC_TX_DESC_CHECKSUM_8188F(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+28, 0, 16, __Value)
 #endif
 #define SET_TX_DESC_USB_TXAGG_NUM_8188F(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+28, 24, 8, __Value)
-#if (DEV_BUS_TYPE == RT_SDIO_INTERFACE)
+#ifdef CONFIG_SDIO_HCI
 #define SET_TX_DESC_SDIO_TXSEQ_8188F(__pTxDesc, __Value)			SET_BITS_TO_LE_4BYTE(__pTxDesc+28, 16, 8, __Value)
 #endif
 
@@ -301,9 +303,10 @@ thread_return rtl8188fs_xmit_thread(thread_context context);
 #endif
 
 #ifdef CONFIG_USB_HCI
+#ifdef CONFIG_XMIT_THREAD_MODE
 s32 rtl8188fu_xmit_buf_handler(PADAPTER padapter);
 #define hal_xmit_handler rtl8188fu_xmit_buf_handler
-
+#endif
 
 s32 rtl8188fu_init_xmit_priv(PADAPTER padapter);
 void rtl8188fu_free_xmit_priv(PADAPTER padapter);
diff --git a/rtl8723DS/include/rtl8192e_cmd.h b/rtl8723DS/include/rtl8192e_cmd.h
index 6aff7ea..5efdf99 100755..100644
--- a/rtl8723DS/include/rtl8192e_cmd.h
+++ b/rtl8723DS/include/rtl8192e_cmd.h
@@ -101,7 +101,6 @@ typedef struct _RSVDPAGE_LOC_92E {
 #define SET_8192E_H2CCMD_PWRMODE_PARM_ALL_QUEUE_UAPSD(__pH2CCmd, __Value)	SET_BITS_TO_LE_1BYTE((__pH2CCmd)+3, 0, 8, __Value)
 #define SET_8192E_H2CCMD_PWRMODE_PARM_BCN_EARLY_C2H_RPT(__pH2CCmd, __Value)	SET_BITS_TO_LE_1BYTE((__pH2CCmd)+3, 2, 1, __Value)
 #define SET_8192E_H2CCMD_PWRMODE_PARM_PWR_STATE(__pH2CCmd, __Value)			SET_BITS_TO_LE_1BYTE((__pH2CCmd)+4, 0, 8, __Value)
-#define SET_8192E_H2CCMD_PWRMODE_PARM_BYTE5(__pH2CCmd, __Value)				SET_BITS_TO_LE_1BYTE((__pH2CCmd)+5, 0, 8, __Value)
 #define GET_8192E_H2CCMD_PWRMODE_PARM_MODE(__pH2CCmd)						LE_BITS_TO_1BYTE(__pH2CCmd, 0, 8)
 
 /* _P2P_PS_OFFLOAD */
@@ -116,7 +115,6 @@ typedef struct _RSVDPAGE_LOC_92E {
 /* host message to firmware cmd */
 void rtl8192e_set_FwPwrMode_cmd(PADAPTER padapter, u8 Mode);
 void rtl8192e_set_FwJoinBssReport_cmd(PADAPTER padapter, u8 mstatus);
-u8 rtl8192e_set_rssi_cmd(PADAPTER padapter, u8 *param);
 s32 FillH2CCmd_8192E(PADAPTER padapter, u8 ElementID, u32 CmdLen, u8 *pCmdBuffer);
 u8 GetTxBufferRsvdPageNum8192E(_adapter *padapter, bool wowlan);
 /* u8 rtl8192c_set_FwSelectSuspend_cmd(PADAPTER padapter, u8 bfwpoll, u16 period); */
diff --git a/rtl8723DS/include/rtl8192e_dm.h b/rtl8723DS/include/rtl8192e_dm.h
index 5f6ee4b..5f6ee4b 100755..100644
--- a/rtl8723DS/include/rtl8192e_dm.h
+++ b/rtl8723DS/include/rtl8192e_dm.h
diff --git a/rtl8723DS/include/rtl8192e_hal.h b/rtl8723DS/include/rtl8192e_hal.h
index edd4040..716995f 100755..100644
--- a/rtl8723DS/include/rtl8192e_hal.h
+++ b/rtl8723DS/include/rtl8192e_hal.h
@@ -121,10 +121,15 @@ typedef struct _RT_FIRMWARE_8192E {
 #endif
 #define MAX_RX_DMA_BUFFER_SIZE_8192E		(RX_DMA_SIZE_8192E-RX_DMA_RESERVED_SIZE_8192E)	/*RX 16K*/
 
+
+#define PAGE_SIZE_TX_92E	PAGE_SIZE_256
+
 /* For General Reserved Page Number(Beacon Queue is reserved page)
  * if (CONFIG_2BCN_EN) Beacon:4, PS-Poll:1, Null Data:1,Prob Rsp:1,Qos Null Data:1
- * Beacon:2, PS-Poll:1, Null Data:1,Prob Rsp:1,Qos Null Data:1 */
-#define RSVD_PAGE_NUM_8192E		0x08
+ * Beacon: MAX_BEACON_LEN / PAGE_SIZE_TX_92E
+ * PS-Poll:1, Null Data:1,Prob Rsp:1,Qos Null Data:1,CTS-2-SELF / LTE QoS Null*/
+
+#define RSVD_PAGE_NUM_8192E		(MAX_BEACON_LEN / PAGE_SIZE_TX_92E + 6) /*0x08*/
 /* For WoWLan , more reserved page
  * ARP Rsp:1, RWC:1, GTK Info:1,GTK RSP:2,GTK EXT MEM:2, AOAC rpt: 1,PNO: 6
  * NS offload: 2 NDP info: 1
@@ -154,7 +159,6 @@ Total page numbers : 256(0x100)
 #define	TX_PAGE_BOUNDARY_8192E	(TX_TOTAL_PAGE_NUMBER_8192E) /* beacon header start address */
 
 
-#define PAGE_SIZE_TX_92E	PAGE_SIZE_256
 #define RSVD_PKT_LEN_92E	(TOTAL_RSVD_PAGE_NUMBER_8192E * PAGE_SIZE_TX_92E)
 
 #define TX_PAGE_LOAD_FW_BOUNDARY_8192E		0x47 /* 0xA5 */
@@ -304,8 +308,6 @@ GetHalDefVar8192E(
 void rtl8192e_set_hal_ops(struct hal_ops *pHalFunc);
 void init_hal_spec_8192e(_adapter *adapter);
 void rtl8192e_init_default_value(_adapter *padapter);
-/* register */
-void SetBcnCtrlReg(PADAPTER padapter, u8 SetBits, u8 ClearBits);
 
 void rtl8192e_start_thread(_adapter *padapter);
 void rtl8192e_stop_thread(_adapter *padapter);
diff --git a/rtl8723DS/include/rtl8192e_led.h b/rtl8723DS/include/rtl8192e_led.h
index 3d795c4..3d795c4 100755..100644
--- a/rtl8723DS/include/rtl8192e_led.h
+++ b/rtl8723DS/include/rtl8192e_led.h
diff --git a/rtl8723DS/include/rtl8192e_recv.h b/rtl8723DS/include/rtl8192e_recv.h
index 3faf16c..6ccb8e9 100755..100644
--- a/rtl8723DS/include/rtl8192e_recv.h
+++ b/rtl8723DS/include/rtl8192e_recv.h
@@ -35,6 +35,10 @@
 				/* #define MAX_RECVBUF_SZ (10240)  */ /* 10K */
 				/* #define MAX_RECVBUF_SZ (16384) */ /* 16k - 92E RX BUF :16K */
 				/* #define MAX_RECVBUF_SZ (8192+1024) */ /* 8K+1k		 */
+				#ifdef CONFIG_PLATFORM_NOVATEK_NT72668
+					#undef MAX_RECVBUF_SZ
+					#define MAX_RECVBUF_SZ (15360) /* 15k < 16k */
+				#endif /* CONFIG_PLATFORM_NOVATEK_NT72668 */
 			#endif
 		#endif
 	#endif /* !MAX_RECVBUF_SZ */
@@ -139,6 +143,12 @@
 #define GET_RX_STATUS_DESC_UNICAST_92E(__pRxDesc)			LE_BITS_TO_4BYTE(__pRxDesc+12, 30, 1)
 #define GET_RX_STATUS_DESC_MAGIC_WAKE_92E(__pRxDesc)			LE_BITS_TO_4BYTE(__pRxDesc+12, 31, 1)
 
+/* DWORD 6 */
+#define GET_RX_STATUS_DESC_SPLCP_92E(__pRxDesc)			LE_BITS_TO_4BYTE(__pRxDesc+16, 0, 1)
+#define GET_RX_STATUS_DESC_LDPC_92E(__pRxDesc)			LE_BITS_TO_4BYTE(__pRxDesc+16, 1, 1)
+#define GET_RX_STATUS_DESC_STBC_92E(__pRxDesc)			LE_BITS_TO_4BYTE(__pRxDesc+16, 2, 1)
+#define GET_RX_STATUS_DESC_BW_92E(__pRxDesc)			LE_BITS_TO_4BYTE(__pRxDesc+16, 4, 2)
+
 
 /* DWORD 5 */
 #define GET_RX_STATUS_DESC_TSFL_92E(__pRxStatusDesc)				LE_BITS_TO_4BYTE(__pRxStatusDesc+20, 0, 32)
@@ -150,6 +160,7 @@
 #ifdef CONFIG_SDIO_HCI
 	s32 rtl8192es_init_recv_priv(PADAPTER padapter);
 	void rtl8192es_free_recv_priv(PADAPTER padapter);
+	s32 rtl8192es_recv_hdl(_adapter *padapter);
 #endif
 
 #ifdef CONFIG_USB_HCI
diff --git a/rtl8723DS/include/rtl8192e_rf.h b/rtl8723DS/include/rtl8192e_rf.h
index f15e070..f15e070 100755..100644
--- a/rtl8723DS/include/rtl8192e_rf.h
+++ b/rtl8723DS/include/rtl8192e_rf.h
diff --git a/rtl8723DS/include/rtl8192e_spec.h b/rtl8723DS/include/rtl8192e_spec.h
index c9b2b41..c9b2b41 100755..100644
--- a/rtl8723DS/include/rtl8192e_spec.h
+++ b/rtl8723DS/include/rtl8192e_spec.h
diff --git a/rtl8723DS/include/rtl8192e_sreset.h b/rtl8723DS/include/rtl8192e_sreset.h
index 78109ae..78109ae 100755..100644
--- a/rtl8723DS/include/rtl8192e_sreset.h
+++ b/rtl8723DS/include/rtl8192e_sreset.h
diff --git a/rtl8723DS/include/rtl8192e_xmit.h b/rtl8723DS/include/rtl8192e_xmit.h
index 0202302..559eefe 100755..100644
--- a/rtl8723DS/include/rtl8192e_xmit.h
+++ b/rtl8723DS/include/rtl8192e_xmit.h
@@ -317,9 +317,11 @@ typedef struct txdescriptor_8192e {
 #define SET_TX_DESC_ANTSEL_D_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+24, 25, 3, __Value)
 
 /* Dword 7 */
-#if (DEV_BUS_TYPE == RT_PCI_INTERFACE)
+#ifdef CONFIG_PCI_HCI
 	#define SET_TX_DESC_TX_BUFFER_SIZE_92E(__pTxDesc, __Value)		SET_BITS_TO_LE_4BYTE(__pTxDesc+28, 0, 16, __Value)
-#else
+#endif
+
+#if defined(CONFIG_SDIO_HCI) || defined(CONFIG_USB_HCI)
 	#define SET_TX_DESC_TX_DESC_CHECKSUM_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+28, 0, 16, __Value)
 #endif
 #define SET_TX_DESC_USB_TXAGG_NUM_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+28, 24, 8, __Value)
diff --git a/rtl8723DS/include/rtl8192f_cmd.h b/rtl8723DS/include/rtl8192f_cmd.h
new file mode 100644
index 0000000..fedfd7f
--- a/dev/null
+++ b/rtl8723DS/include/rtl8192f_cmd.h
@@ -0,0 +1,194 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2007 - 2017 Realtek Corporation.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ *****************************************************************************/
+#ifndef __RTL8192F_CMD_H__
+#define __RTL8192F_CMD_H__
+
+/* ---------------------------------------------------------------------------------------------------------
+ * ----------------------------------    H2C CMD DEFINITION    ------------------------------------------------
+ * --------------------------------------------------------------------------------------------------------- */
+
+enum h2c_cmd_8192F {
+	/* Common Class: 000 */
+	H2C_8192F_RSVD_PAGE = 0x00,
+	H2C_8192F_MEDIA_STATUS_RPT = 0x01,
+	H2C_8192F_SCAN_ENABLE = 0x02,
+	H2C_8192F_KEEP_ALIVE = 0x03,
+	H2C_8192F_DISCON_DECISION = 0x04,	
+	H2C_8192F_PSD_OFFLOAD = 0x05,	
+	H2C_8192F_AP_OFFLOAD = 0x08,	
+	H2C_8192F_BCN_RSVDPAGE = 0x09,	
+	H2C_8192F_PROBERSP_RSVDPAGE = 0x0A,	
+	H2C_8192F_FCS_RSVDPAGE = 0x10,	
+	H2C_8192F_FCS_INFO = 0x11,	
+	H2C_8192F_AP_WOW_GPIO_CTRL = 0x13,
+
+	/* PoweSave Class: 001 */
+	H2C_8192F_SET_PWR_MODE = 0x20,
+	H2C_8192F_PS_TUNING_PARA = 0x21,
+	H2C_8192F_PS_TUNING_PARA2 = 0x22,
+	H2C_8192F_P2P_LPS_PARAM = 0x23,	
+	H2C_8192F_P2P_PS_OFFLOAD = 0x24,	
+	H2C_8192F_PS_SCAN_ENABLE = 0x25,	
+	H2C_8192F_SAP_PS_ = 0x26,
+	H2C_8192F_INACTIVE_PS_ = 0x27,/* Inactive_PS */
+	H2C_8192F_FWLPS_IN_IPS_ = 0x28,
+
+	/* Dynamic Mechanism Class: 010 */
+	H2C_8192F_MACID_CFG = 0x40,	
+	H2C_8192F_TXBF = 0x41,	
+	H2C_8192F_RSSI_SETTING = 0x42,	
+	H2C_8192F_AP_REQ_TXRPT = 0x43,	
+	H2C_8192F_INIT_RATE_COLLECT = 0x44,	
+	H2C_8192F_RA_PARA_ADJUST = 0x46,
+
+	/* BT Class: 011 */
+	H2C_8192F_B_TYPE_TDMA = 0x60,
+	H2C_8192F_BT_INFO = 0x61,
+	H2C_8192F_FORCE_BT_TXPWR = 0x62,
+	H2C_8192F_BT_IGNORE_WLANACT = 0x63,
+	H2C_8192F_DAC_SWING_VALUE = 0x64,
+	H2C_8192F_ANT_SEL_RSV = 0x65,
+	H2C_8192F_WL_OPMODE = 0x66,
+	H2C_8192F_BT_MP_OPER = 0x67,
+	H2C_8192F_BT_CONTROL = 0x68,
+	H2C_8192F_BT_WIFI_CTRL = 0x69,
+	H2C_8192F_BT_FW_PATCH = 0x6A,
+	H2C_8192F_BT_WLAN_CALIBRATION = 0x6D,
+
+	/* WOWLAN Class: 100 */
+	H2C_8192F_WOWLAN = 0x80,
+	H2C_8192F_REMOTE_WAKE_CTRL = 0x81,
+	H2C_8192F_AOAC_GLOBAL_INFO = 0x82,	
+	H2C_8192F_AOAC_RSVD_PAGE = 0x83,	
+	H2C_8192F_AOAC_RSVD_PAGE2 = 0x84,
+	H2C_8192F_D0_SCAN_OFFLOAD_CTRL = 0x85,
+	H2C_8192F_D0_SCAN_OFFLOAD_INFO = 0x86,
+	H2C_8192F_CHNL_SWITCH_OFFLOAD = 0x87,
+	H2C_8192F_P2P_OFFLOAD_RSVD_PAGE = 0x8A,	
+	H2C_8192F_P2P_OFFLOAD = 0x8B,
+
+	H2C_8192F_RESET_TSF = 0xC0,
+	H2C_8192F_MAXID,
+};
+
+/* ---------------------------------------------------------------------------------------------------------
+ * ----------------------------------    H2C CMD CONTENT    --------------------------------------------------
+ * ---------------------------------------------------------------------------------------------------------
+ * _RSVDPAGE_LOC_CMD_0x00 */
+#define SET_8192F_H2CCMD_RSVDPAGE_LOC_PROBE_RSP(__pH2CCmd, __Value)			SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 8, __Value)
+#define SET_8192F_H2CCMD_RSVDPAGE_LOC_PSPOLL(__pH2CCmd, __Value)				SET_BITS_TO_LE_1BYTE((__pH2CCmd)+1, 0, 8, __Value)
+#define SET_8192F_H2CCMD_RSVDPAGE_LOC_NULL_DATA(__pH2CCmd, __Value)			SET_BITS_TO_LE_1BYTE((__pH2CCmd)+2, 0, 8, __Value)
+#define SET_8192F_H2CCMD_RSVDPAGE_LOC_QOS_NULL_DATA(__pH2CCmd, __Value)		SET_BITS_TO_LE_1BYTE((__pH2CCmd)+3, 0, 8, __Value)
+#define SET_8192F_H2CCMD_RSVDPAGE_LOC_BT_QOS_NULL_DATA(__pH2CCmd, __Value)	SET_BITS_TO_LE_1BYTE((__pH2CCmd)+4, 0, 8, __Value)
+
+/*_MEDIA_STATUS_RPT_PARM_CMD_0x01*/
+#define SET_8192F_H2CCMD_MSRRPT_PARM_OPMODE(__pH2CCmd, __Value)				SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 1, __Value)
+#define SET_8192F_H2CCMD_MSRRPT_PARM_MACID_IND(__pH2CCmd, __Value)			SET_BITS_TO_LE_1BYTE(__pH2CCmd, 1, 1, __Value)
+#define SET_8192F_H2CCMD_MSRRPT_PARM_MACID(__pH2CCmd, __Value)				SET_BITS_TO_LE_1BYTE(__pH2CCmd+1, 0, 8, __Value)
+#define SET_8192F_H2CCMD_MSRRPT_PARM_MACID_END(__pH2CCmd, __Value)			SET_BITS_TO_LE_1BYTE(__pH2CCmd+2, 0, 8, __Value)
+/* _PWR_MOD_CMD_0x20 */
+#define SET_8192F_H2CCMD_PWRMODE_PARM_MODE(__pH2CCmd, __Value)				SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 8, __Value)
+#define SET_8192F_H2CCMD_PWRMODE_PARM_RLBM(__pH2CCmd, __Value)				SET_BITS_TO_LE_1BYTE((__pH2CCmd)+1, 0, 4, __Value)
+#define SET_8192F_H2CCMD_PWRMODE_PARM_SMART_PS(__pH2CCmd, __Value)			SET_BITS_TO_LE_1BYTE((__pH2CCmd)+1, 4, 4, __Value)
+#define SET_8192F_H2CCMD_PWRMODE_PARM_BCN_PASS_TIME(__pH2CCmd, __Value)		SET_BITS_TO_LE_1BYTE((__pH2CCmd)+2, 0, 8, __Value)
+#define SET_8192F_H2CCMD_PWRMODE_PARM_ALL_QUEUE_UAPSD(__pH2CCmd, __Value)	SET_BITS_TO_LE_1BYTE((__pH2CCmd)+3, 0, 8, __Value)
+#define SET_8192F_H2CCMD_PWRMODE_PARM_BCN_EARLY_C2H_RPT(__pH2CCmd, __Value)	SET_BITS_TO_LE_1BYTE((__pH2CCmd)+3, 2, 1, __Value)
+#define SET_8192F_H2CCMD_PWRMODE_PARM_PWR_STATE(__pH2CCmd, __Value)			SET_BITS_TO_LE_1BYTE((__pH2CCmd)+4, 0, 8, __Value)
+
+#define GET_8192F_H2CCMD_PWRMODE_PARM_MODE(__pH2CCmd)					LE_BITS_TO_1BYTE(__pH2CCmd, 0, 8)
+
+/* _PS_TUNE_PARAM_CMD_0x21 */
+#define SET_8192F_H2CCMD_PSTUNE_PARM_BCN_TO_LIMIT(__pH2CCmd, __Value)			SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 8, __Value)
+#define SET_8192F_H2CCMD_PSTUNE_PARM_DTIM_TIMEOUT(__pH2CCmd, __Value)			SET_BITS_TO_LE_1BYTE(__pH2CCmd+1, 0, 8, __Value)
+#define SET_8192F_H2CCMD_PSTUNE_PARM_ADOPT(__pH2CCmd, __Value)			SET_BITS_TO_LE_1BYTE(__pH2CCmd+2, 0, 1, __Value)
+#define SET_8192F_H2CCMD_PSTUNE_PARM_PS_TIMEOUT(__pH2CCmd, __Value)			SET_BITS_TO_LE_1BYTE(__pH2CCmd+2, 1, 7, __Value)
+#define SET_8192F_H2CCMD_PSTUNE_PARM_DTIM_PERIOD(__pH2CCmd, __Value)			SET_BITS_TO_LE_1BYTE(__pH2CCmd+3, 0, 8, __Value)
+
+/* _MACID_CFG_CMD_0x40 */
+#define SET_8192F_H2CCMD_MACID_CFG_MACID(__pH2CCmd, __Value)		SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 8, __Value)
+#define SET_8192F_H2CCMD_MACID_CFG_RAID(__pH2CCmd, __Value)		SET_BITS_TO_LE_1BYTE(__pH2CCmd+1, 0, 5, __Value)
+#define SET_8192F_H2CCMD_MACID_CFG_SGI_EN(__pH2CCmd, __Value)		SET_BITS_TO_LE_1BYTE(__pH2CCmd+1, 7, 1, __Value)
+#define SET_8192F_H2CCMD_MACID_CFG_BW(__pH2CCmd, __Value)		SET_BITS_TO_LE_1BYTE(__pH2CCmd+2, 0, 2, __Value)
+#define SET_8192F_H2CCMD_MACID_CFG_NO_UPDATE(__pH2CCmd, __Value)		SET_BITS_TO_LE_1BYTE(__pH2CCmd+2, 3, 1, __Value)
+#define SET_8192F_H2CCMD_MACID_CFG_VHT_EN(__pH2CCmd, __Value)		SET_BITS_TO_LE_1BYTE(__pH2CCmd+2, 4, 2, __Value)
+#define SET_8192F_H2CCMD_MACID_CFG_DISPT(__pH2CCmd, __Value)		SET_BITS_TO_LE_1BYTE(__pH2CCmd+2, 6, 1, __Value)
+#define SET_8192F_H2CCMD_MACID_CFG_DISRA(__pH2CCmd, __Value)		SET_BITS_TO_LE_1BYTE(__pH2CCmd+2, 7, 1, __Value)
+#define SET_8192F_H2CCMD_MACID_CFG_RATE_MASK0(__pH2CCmd, __Value)		SET_BITS_TO_LE_1BYTE(__pH2CCmd+3, 0, 8, __Value)
+#define SET_8192F_H2CCMD_MACID_CFG_RATE_MASK1(__pH2CCmd, __Value)		SET_BITS_TO_LE_1BYTE(__pH2CCmd+4, 0, 8, __Value)
+#define SET_8192F_H2CCMD_MACID_CFG_RATE_MASK2(__pH2CCmd, __Value)		SET_BITS_TO_LE_1BYTE(__pH2CCmd+5, 0, 8, __Value)
+#define SET_8192F_H2CCMD_MACID_CFG_RATE_MASK3(__pH2CCmd, __Value)		SET_BITS_TO_LE_1BYTE(__pH2CCmd+6, 0, 8, __Value)
+
+/* _RSSI_SETTING_CMD_0x42 */
+#define SET_8192F_H2CCMD_RSSI_SETTING_MACID(__pH2CCmd, __Value)		SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 8, __Value)
+#define SET_8192F_H2CCMD_RSSI_SETTING_RSSI(__pH2CCmd, __Value)		SET_BITS_TO_LE_1BYTE(__pH2CCmd+2, 0, 7, __Value)
+#define SET_8192F_H2CCMD_RSSI_SETTING_ULDL_STATE(__pH2CCmd, __Value)		SET_BITS_TO_LE_1BYTE(__pH2CCmd+3, 0, 8, __Value)
+
+/* _AP_REQ_TXRPT_CMD_0x43 */
+#define SET_8192F_H2CCMD_APREQRPT_PARM_MACID1(__pH2CCmd, __Value)		SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 8, __Value)
+#define SET_8192F_H2CCMD_APREQRPT_PARM_MACID2(__pH2CCmd, __Value)		SET_BITS_TO_LE_1BYTE(__pH2CCmd+1, 0, 8, __Value)
+
+/* _FORCE_BT_TXPWR_CMD_0x62 */
+#define SET_8192F_H2CCMD_BT_PWR_IDX(__pH2CCmd, __Value)							SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 8, __Value)
+
+/* _FORCE_BT_MP_OPER_CMD_0x67 */
+#define SET_8192F_H2CCMD_BT_MPOPER_VER(__pH2CCmd, __Value)							SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 4, __Value)
+#define SET_8192F_H2CCMD_BT_MPOPER_REQNUM(__pH2CCmd, __Value)							SET_BITS_TO_LE_1BYTE(__pH2CCmd, 4, 4, __Value)
+#define SET_8192F_H2CCMD_BT_MPOPER_IDX(__pH2CCmd, __Value)							SET_BITS_TO_LE_1BYTE(__pH2CCmd+1, 0, 8, __Value)
+#define SET_8192F_H2CCMD_BT_MPOPER_PARAM1(__pH2CCmd, __Value)							SET_BITS_TO_LE_1BYTE(__pH2CCmd+2, 0, 8, __Value)
+#define SET_8192F_H2CCMD_BT_MPOPER_PARAM2(__pH2CCmd, __Value)							SET_BITS_TO_LE_1BYTE(__pH2CCmd+3, 0, 8, __Value)
+#define SET_8192F_H2CCMD_BT_MPOPER_PARAM3(__pH2CCmd, __Value)							SET_BITS_TO_LE_1BYTE(__pH2CCmd+4, 0, 8, __Value)
+
+/* _BT_FW_PATCH_0x6A */
+#define SET_8192F_H2CCMD_BT_FW_PATCH_SIZE(__pH2CCmd, __Value)					SET_BITS_TO_LE_2BYTE((pu1Byte)(__pH2CCmd), 0, 16, __Value)
+#define SET_8192F_H2CCMD_BT_FW_PATCH_ADDR0(__pH2CCmd, __Value)					SET_BITS_TO_LE_1BYTE((__pH2CCmd)+2, 0, 8, __Value)
+#define SET_8192F_H2CCMD_BT_FW_PATCH_ADDR1(__pH2CCmd, __Value)					SET_BITS_TO_LE_1BYTE((__pH2CCmd)+3, 0, 8, __Value)
+#define SET_8192F_H2CCMD_BT_FW_PATCH_ADDR2(__pH2CCmd, __Value)					SET_BITS_TO_LE_1BYTE((__pH2CCmd)+4, 0, 8, __Value)
+#define SET_8192F_H2CCMD_BT_FW_PATCH_ADDR3(__pH2CCmd, __Value)					SET_BITS_TO_LE_1BYTE((__pH2CCmd)+5, 0, 8, __Value)
+
+/* ---------------------------------------------------------------------------------------------------------
+ * -------------------------------------------    Structure    --------------------------------------------------
+ * --------------------------------------------------------------------------------------------------------- */
+
+
+/* ---------------------------------------------------------------------------------------------------------
+ * ----------------------------------    Function Statement     --------------------------------------------------
+ * --------------------------------------------------------------------------------------------------------- */
+
+/* host message to firmware cmd */
+void rtl8192f_set_FwPwrMode_cmd(PADAPTER padapter, u8 Mode);
+void rtl8192f_set_FwJoinBssRpt_cmd(PADAPTER padapter, u8 mstatus);
+/* s32 rtl8192f__set_lowpwr_lps_cmd(PADAPTER padapter, u8 enable); */
+void rtl8192f_set_FwPsTuneParam_cmd(PADAPTER padapter);
+void rtl8192f_download_rsvd_page(PADAPTER padapter, u8 mstatus);
+#ifdef CONFIG_BT_COEXIST
+	void rtl8192f__download_BTCoex_AP_mode_rsvd_page(PADAPTER padapter);
+#endif /* CONFIG_BT_COEXIST */
+#ifdef CONFIG_P2P
+	void rtl8192f_set_p2p_ps_offload_cmd(PADAPTER padapter, u8 p2p_ps_state);
+#endif /* CONFIG_P2P */
+
+#ifdef CONFIG_TDLS
+#ifdef CONFIG_TDLS_CH_SW
+void rtl8192f_set_BcnEarly_C2H_Rpt_cmd(PADAPTER padapter, u8 enable);
+#endif
+#endif
+
+#ifdef CONFIG_P2P_WOWLAN
+	void rtl8192f_set_p2p_wowlan_offload_cmd(PADAPTER padapter);
+#endif
+
+s32 FillH2CCmd8192F(PADAPTER padapter, u8 ElementID, u32 CmdLen, u8 *pCmdBuffer);
+u8 GetTxBufferRsvdPageNum8192F(_adapter *padapter, bool wowlan);
+#endif
diff --git a/rtl8723DS/include/rtl8192f_dm.h b/rtl8723DS/include/rtl8192f_dm.h
new file mode 100644
index 0000000..f4ac100
--- a/dev/null
+++ b/rtl8723DS/include/rtl8192f_dm.h
@@ -0,0 +1,27 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2012 - 2017 Realtek Corporation.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ *****************************************************************************/
+#ifndef __RTL8192F_DM_H__
+#define __RTL8192F_DM_H__
+
+void rtl8192f_init_dm_priv(IN PADAPTER Adapter);
+void rtl8192f_deinit_dm_priv(IN PADAPTER Adapter);
+void rtl8192f_InitHalDm(IN PADAPTER Adapter);
+void rtl8192f_HalDmWatchDog(IN PADAPTER Adapter);
+
+/* VOID rtl8192c_dm_CheckTXPowerTracking(IN PADAPTER Adapter); */
+
+/* void rtl8192c_dm_RF_Saving(IN PADAPTER pAdapter, IN u8 bForceInNormal); */
+
+#endif
diff --git a/rtl8723DS/include/rtl8192f_hal.h b/rtl8723DS/include/rtl8192f_hal.h
new file mode 100644
index 0000000..c8a828a
--- a/dev/null
+++ b/rtl8723DS/include/rtl8192f_hal.h
@@ -0,0 +1,315 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2007 - 2017 Realtek Corporation.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ *****************************************************************************/
+#ifndef __RTL8192F_HAL_H__
+#define __RTL8192F_HAL_H__
+
+#include "hal_data.h"
+
+#include "rtl8192f_spec.h"
+#include "rtl8192f_rf.h"
+#include "rtl8192f_dm.h"
+#include "rtl8192f_recv.h"
+#include "rtl8192f_xmit.h"
+#include "rtl8192f_cmd.h"
+#include "rtl8192f_led.h"
+#include "Hal8192FPwrSeq.h"
+#include "Hal8192FPhyReg.h"
+#include "Hal8192FPhyCfg.h"
+#ifdef DBG_CONFIG_ERROR_DETECT
+#include "rtl8192f_sreset.h"
+#endif
+#ifdef CONFIG_LPS_POFF
+	#include "rtl8192f_lps_poff.h"
+#endif
+
+#define FW_8192F_SIZE		0x8000
+#define FW_8192F_START_ADDRESS	0x4000
+#define FW_8192F_END_ADDRESS	0x5000 /* brian_zhang@realsil.com.cn */
+
+#define IS_FW_HEADER_EXIST_8192F(_pFwHdr)\
+	((le16_to_cpu(_pFwHdr->Signature) & 0xFFF0) == 0x92F0)
+
+typedef struct _RT_FIRMWARE {
+	FIRMWARE_SOURCE	eFWSource;
+#ifdef CONFIG_EMBEDDED_FWIMG
+	u8			*szFwBuffer;
+#else
+	u8			szFwBuffer[FW_8192F_SIZE];
+#endif
+	u32			ulFwLength;
+} RT_FIRMWARE_8192F, *PRT_FIRMWARE_8192F;
+
+/*
+ * This structure must be cared byte-ordering
+ *
+ * Added by tynli. 2009.12.04. */
+typedef struct _RT_8192F_FIRMWARE_HDR {
+	/* 8-byte alinment required */
+
+	/* --- LONG WORD 0 ---- */
+	u16		Signature;	/* 92C0: test chip; 92C, 88C0: test chip; 88C1: MP A-cut; 92C1: MP A-cut */
+	u8		Category;	/* AP/NIC and USB/PCI */
+	u8		Function;	/* Reserved for different FW function indcation, for further use when driver needs to download different FW in different conditions */
+	u16		Version;		/* FW Version */
+	u16		Subversion;	/* FW Subversion, default 0x00 */
+
+	/* --- LONG WORD 1 ---- */
+	u8		Month;	/* Release time Month field */
+	u8		Date;	/* Release time Date field */
+	u8		Hour;	/* Release time Hour field */
+	u8		Minute;	/* Release time Minute field */
+	u16		RamCodeSize;	/* The size of RAM code */
+	u16		Rsvd2;
+
+	/* --- LONG WORD 2 ---- */
+	u32		SvnIdx;	/* The SVN entry index */
+	u32		Rsvd3;
+
+	/* --- LONG WORD 3 ---- */
+	u32		Rsvd4;
+	u32		Rsvd5;
+} RT_8192F_FIRMWARE_HDR, *PRT_8192F_FIRMWARE_HDR;
+#define DRIVER_EARLY_INT_TIME_8192F		0x05
+#define BCN_DMA_ATIME_INT_TIME_8192F		0x02
+/* for 8192F
+ * TX 64K, RX 16K, Page size 256B for TX*/
+#define PAGE_SIZE_TX_8192F			256
+#define PAGE_SIZE_RX_8192F			8
+#define TX_DMA_SIZE_8192F			0x10000/* 64K(TX) */
+#define RX_DMA_SIZE_8192F			0x4000/* 16K(RX) */
+#ifdef CONFIG_WOWLAN
+	#define RESV_FMWF	(WKFMCAM_SIZE * MAX_WKFM_CAM_NUM) /* 16 entries, for each is 24 bytes*/
+#else
+	#define RESV_FMWF	0
+#endif
+
+#ifdef CONFIG_FW_C2H_DEBUG
+	#define RX_DMA_RESERVED_SIZE_8192F	0x100	/* 256B, reserved for c2h debug message */
+#else
+	#define RX_DMA_RESERVED_SIZE_8192F	0xc0	/* 192B, reserved for tx report 24*8=192*/
+#endif
+#define RX_DMA_BOUNDARY_8192F\
+	(RX_DMA_SIZE_8192F - RX_DMA_RESERVED_SIZE_8192F - 1)
+
+
+/* Note: We will divide number of page equally for each queue other than public queue! */
+
+/* For General Reserved Page Number(Beacon Queue is reserved page)
+ * Beacon:MAX_BEACON_LEN/PAGE_SIZE_TX_8192F
+ * PS-Poll:1, Null Data:1,Qos Null Data:1,BT Qos Null Data:1,CTS-2-SELF,LTE QoS Null*/
+#define BCNQ_PAGE_NUM_8192F		(MAX_BEACON_LEN/PAGE_SIZE_TX_8192F + 6) /*0x08*/
+
+
+/* For WoWLan , more reserved page
+ * ARP Rsp:1, RWC:1, GTK Info:1,GTK RSP:2,GTK EXT MEM:2, AOAC rpt 1, PNO: 6
+ * NS offload: 2 NDP info: 1
+ */
+#ifdef CONFIG_WOWLAN
+	#define WOWLAN_PAGE_NUM_8192F	0x07
+#else
+	#define WOWLAN_PAGE_NUM_8192F	0x00
+#endif
+
+#ifdef CONFIG_PNO_SUPPORT
+	#undef WOWLAN_PAGE_NUM_8192F
+	#define WOWLAN_PAGE_NUM_8192F	0x15
+#endif
+
+#ifdef CONFIG_AP_WOWLAN
+	#define AP_WOWLAN_PAGE_NUM_8192F	0x02
+#endif
+
+#ifdef DBG_LA_MODE
+	#define LA_MODE_PAGE_NUM 0xE0
+#endif
+
+#define MAX_RX_DMA_BUFFER_SIZE_8192F	(RX_DMA_SIZE_8192F - RX_DMA_RESERVED_SIZE_8192F)
+
+#ifdef DBG_LA_MODE
+	#define TX_TOTAL_PAGE_NUMBER_8192F	(0xFF - LA_MODE_PAGE_NUM)
+#else
+	#define TX_TOTAL_PAGE_NUMBER_8192F	(0xFF - BCNQ_PAGE_NUM_8192F - WOWLAN_PAGE_NUM_8192F)
+#endif
+
+#define TX_PAGE_BOUNDARY_8192F		(TX_TOTAL_PAGE_NUMBER_8192F + 1)
+
+#define WMM_NORMAL_TX_TOTAL_PAGE_NUMBER_8192F \
+	TX_TOTAL_PAGE_NUMBER_8192F
+#define WMM_NORMAL_TX_PAGE_BOUNDARY_8192F \
+	(WMM_NORMAL_TX_TOTAL_PAGE_NUMBER_8192F + 1)
+
+/* For Normal Chip Setting
+ * (HPQ + LPQ + NPQ + PUBQ) shall be TX_TOTAL_PAGE_NUMBER_8192F */
+#define NORMAL_PAGE_NUM_HPQ_8192F		0x8
+#define NORMAL_PAGE_NUM_LPQ_8192F		0x8
+#define NORMAL_PAGE_NUM_NPQ_8192F		0x8
+#define NORMAL_PAGE_NUM_EPQ_8192F		0x00
+
+/* Note: For Normal Chip Setting, modify later */
+#define WMM_NORMAL_PAGE_NUM_HPQ_8192F		0x30
+#define WMM_NORMAL_PAGE_NUM_LPQ_8192F		0x20
+#define WMM_NORMAL_PAGE_NUM_NPQ_8192F		0x20
+#define WMM_NORMAL_PAGE_NUM_EPQ_8192F		0x00
+
+
+#include "HalVerDef.h"
+#include "hal_com.h"
+
+#define EFUSE_OOB_PROTECT_BYTES 56 /*0x1C8~0x1FF*/
+
+#define HAL_EFUSE_MEMORY
+#define HWSET_MAX_SIZE_8192F                512
+#define EFUSE_REAL_CONTENT_LEN_8192F        512
+#define EFUSE_MAP_LEN_8192F                 512
+#define EFUSE_MAX_SECTION_8192F            64
+
+/* For some inferiority IC purpose. added by Roger, 2009.09.02.*/
+#define EFUSE_IC_ID_OFFSET			506
+#define AVAILABLE_EFUSE_ADDR(addr)	(addr < EFUSE_REAL_CONTENT_LEN_8192F)
+
+#define EFUSE_ACCESS_ON		0x69
+#define EFUSE_ACCESS_OFF	0x00
+
+/* ********************************************************
+ *			EFUSE for BT definition
+ * ******************************************************** */
+#define BANK_NUM			1
+#define EFUSE_BT_REAL_BANK_CONTENT_LEN	512
+#define EFUSE_BT_REAL_CONTENT_LEN	1536/*512 * 3 */
+/*	(EFUSE_BT_REAL_BANK_CONTENT_LEN * BANK_NUM)*/
+#define EFUSE_BT_MAP_LEN		1024	/* 1k bytes */
+#define EFUSE_BT_MAX_SECTION		128 /* 1024/8 */
+#define EFUSE_PROTECT_BYTES_BANK	16
+
+typedef enum tag_Package_Definition {
+	PACKAGE_DEFAULT,
+	PACKAGE_QFN32,
+	PACKAGE_QFN40,
+	PACKAGE_QFN46
+} PACKAGE_TYPE_E;
+
+#define INCLUDE_MULTI_FUNC_BT(_Adapter) \
+	(GET_HAL_DATA(_Adapter)->MultiFunc & RT_MULTI_FUNC_BT)
+#define INCLUDE_MULTI_FUNC_GPS(_Adapter) \
+	(GET_HAL_DATA(_Adapter)->MultiFunc & RT_MULTI_FUNC_GPS)
+
+#ifdef CONFIG_FILE_FWIMG
+	extern char *rtw_fw_file_path;
+	extern char *rtw_fw_wow_file_path;
+	#ifdef CONFIG_MP_INCLUDED
+		extern char *rtw_fw_mp_bt_file_path;
+	#endif /* CONFIG_MP_INCLUDED */
+#endif /* CONFIG_FILE_FWIMG */
+
+/* rtl8192f_hal_init.c */
+s32 rtl8192f_FirmwareDownload(PADAPTER padapter, BOOLEAN  bUsedWoWLANFw);
+void rtl8192f_FirmwareSelfReset(PADAPTER padapter);
+void rtl8192f_InitializeFirmwareVars(PADAPTER padapter);
+
+void rtl8192f_InitAntenna_Selection(PADAPTER padapter);
+void rtl8192f_DeinitAntenna_Selection(PADAPTER padapter);
+void rtl8192f_CheckAntenna_Selection(PADAPTER padapter);
+void rtl8192f_init_default_value(PADAPTER padapter);
+
+s32 rtl8192f_InitLLTTable(PADAPTER padapter);
+
+s32 CardDisableHWSM(PADAPTER padapter, u8 resetMCU);
+s32 CardDisableWithoutHWSM(PADAPTER padapter);
+
+/* EFuse */
+u8 GetEEPROMSize8192F(PADAPTER padapter);
+void Hal_InitPGData(PADAPTER padapter, u8 *PROMContent);
+void Hal_EfuseParseIDCode(PADAPTER padapter, u8 *hwinfo);
+void Hal_EfuseParseTxPowerInfo_8192F(PADAPTER padapter,
+					u8 *PROMContent, BOOLEAN AutoLoadFail);
+/*
+void Hal_EfuseParseBTCoexistInfo_8192F(PADAPTER padapter,
+				       u8 *hwinfo, BOOLEAN AutoLoadFail);
+*/
+void Hal_EfuseParseEEPROMVer_8192F(PADAPTER padapter,
+				   u8 *hwinfo, BOOLEAN AutoLoadFail);
+void Hal_EfuseParseChnlPlan_8192F(PADAPTER padapter,
+				  u8 *hwinfo, BOOLEAN AutoLoadFail);
+void Hal_EfuseParseCustomerID_8192F(PADAPTER padapter,
+				    u8 *hwinfo, BOOLEAN AutoLoadFail);
+void Hal_EfuseParseAntennaDiversity_8192F(PADAPTER padapter,
+		u8 *hwinfo, BOOLEAN AutoLoadFail);
+void Hal_EfuseParseXtal_8192F(PADAPTER pAdapter,
+			      u8 *hwinfo, u8 AutoLoadFail);
+void Hal_EfuseParseThermalMeter_8192F(PADAPTER padapter,
+				      u8 *hwinfo, u8 AutoLoadFail);
+VOID Hal_EfuseParseVoltage_8192F(PADAPTER pAdapter,
+				 u8 *hwinfo, BOOLEAN	AutoLoadFail);
+VOID Hal_EfuseParseBoardType_8192F(PADAPTER Adapter,
+				   u8	*PROMContent, BOOLEAN AutoloadFail);
+u8	Hal_ReadRFEType_8192F(PADAPTER Adapter, u8 *PROMContent, BOOLEAN AutoloadFail);
+void rtl8192f_set_hal_ops(struct hal_ops *pHalFunc);
+void init_hal_spec_8192f(_adapter *adapter);
+u8 SetHwReg8192F(PADAPTER padapter, u8 variable, u8 *val);
+void GetHwReg8192F(PADAPTER padapter, u8 variable, u8 *val);
+u8 SetHalDefVar8192F(PADAPTER padapter, HAL_DEF_VARIABLE variable, void *pval);
+u8 GetHalDefVar8192F(PADAPTER padapter, HAL_DEF_VARIABLE variable, void *pval);
+
+/* register */
+void rtl8192f_InitBeaconParameters(PADAPTER padapter);
+void rtl8192f_InitBeaconMaxError(PADAPTER padapter, u8 InfraMode);
+
+void _InitMacAPLLSetting_8192F(PADAPTER Adapter);
+void _8051Reset8192F(PADAPTER padapter);
+#ifdef CONFIG_WOWLAN
+	void Hal_DetectWoWMode(PADAPTER pAdapter);
+#endif /* CONFIG_WOWLAN */
+
+void rtl8192f_start_thread(_adapter *padapter);
+void rtl8192f_stop_thread(_adapter *padapter);
+
+#if defined(CONFIG_CHECK_BT_HANG) && defined(CONFIG_BT_COEXIST)
+	void rtl8192fs_init_checkbthang_workqueue(_adapter *adapter);
+	void rtl8192fs_free_checkbthang_workqueue(_adapter *adapter);
+	void rtl8192fs_cancle_checkbthang_workqueue(_adapter *adapter);
+	void rtl8192fs_hal_check_bt_hang(_adapter *adapter);
+#endif
+
+#ifdef CONFIG_GPIO_WAKEUP
+	void HalSetOutPutGPIO(PADAPTER padapter, u8 index, u8 OutPutValue);
+#endif
+#ifdef CONFIG_MP_INCLUDED
+int FirmwareDownloadBT(IN PADAPTER Adapter, PRT_MP_FIRMWARE pFirmware);
+#endif
+void CCX_FwC2HTxRpt_8192f(PADAPTER padapter, u8 *pdata, u8 len);
+
+u8 MRateToHwRate8192F(u8 rate);
+u8 HwRateToMRate8192F(u8 rate);
+
+#if defined(CONFIG_CHECK_BT_HANG) && defined(CONFIG_BT_COEXIST)
+	void check_bt_status_work(void *data);
+#endif
+
+
+void rtl8192f_cal_txdesc_chksum(struct tx_desc *ptxdesc);
+
+#ifdef CONFIG_AMPDU_PRETX_CD
+void rtl8192f_pretx_cd_config(_adapter *adapter);
+#endif
+
+#ifdef CONFIG_PCI_HCI
+	BOOLEAN	InterruptRecognized8192FE(PADAPTER Adapter);
+	VOID	UpdateInterruptMask8192FE(PADAPTER Adapter, u32 AddMSR, u32 AddMSR1, u32 RemoveMSR, u32 RemoveMSR1);
+	VOID InitMAC_TRXBD_8192FE(PADAPTER Adapter);
+
+	u16 get_txbd_rw_reg(u16 ff_hwaddr);
+#endif
+
+#endif
diff --git a/rtl8723DS/include/rtl8192f_led.h b/rtl8723DS/include/rtl8192f_led.h
new file mode 100644
index 0000000..22530b4
--- a/dev/null
+++ b/rtl8723DS/include/rtl8192f_led.h
@@ -0,0 +1,42 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2007 - 2017 Realtek Corporation.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ *****************************************************************************/
+#ifndef __RTL8192F_LED_H__
+#define __RTL8192F_LED_H__
+
+#include <drv_conf.h>
+#include <osdep_service.h>
+#include <drv_types.h>
+
+#ifdef CONFIG_RTW_SW_LED
+/* ********************************************************************************
+ * Interface to manipulate LED objects.
+ * ******************************************************************************** */
+#ifdef CONFIG_USB_HCI
+void rtl8192fu_InitSwLeds(PADAPTER padapter);
+void rtl8192fu_DeInitSwLeds(PADAPTER padapter);
+#endif
+
+#ifdef CONFIG_SDIO_HCI
+void rtl8192fs_InitSwLeds(PADAPTER padapter);
+void rtl8192fs_DeInitSwLeds(PADAPTER padapter);
+#endif
+
+#ifdef CONFIG_PCI_HCI
+void rtl8192fe_InitSwLeds(PADAPTER padapter);
+void rtl8192fe_DeInitSwLeds(PADAPTER padapter);
+#endif
+#endif /*#ifdef CONFIG_RTW_SW_LED*/
+
+#endif
diff --git a/rtl8723DS/include/rtl8192f_recv.h b/rtl8723DS/include/rtl8192f_recv.h
new file mode 100644
index 0000000..989551b
--- a/dev/null
+++ b/rtl8723DS/include/rtl8192f_recv.h
@@ -0,0 +1,111 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2007 - 2017 Realtek Corporation.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ *****************************************************************************/
+#ifndef __RTL8192F_RECV_H__
+#define __RTL8192F_RECV_H__
+
+#define RECV_BLK_SZ 512
+#define RECV_BLK_CNT 16
+#define RECV_BLK_TH RECV_BLK_CNT
+
+#if defined(CONFIG_USB_HCI)
+
+	#ifndef MAX_RECVBUF_SZ
+		#ifdef PLATFORM_OS_CE
+			#define MAX_RECVBUF_SZ (8192+1024) /* 8K+1k */
+		#else
+			#ifndef CONFIG_MINIMAL_MEMORY_USAGE
+				/* #define MAX_RECVBUF_SZ (32768) */ /* 32k */
+				/* #define MAX_RECVBUF_SZ (16384) */ /* 16K */
+				/* #define MAX_RECVBUF_SZ (10240) */ /* 10K */
+				#ifdef CONFIG_PLATFORM_MSTAR
+					#define MAX_RECVBUF_SZ (8192) /* 8K */
+				#else
+					#define MAX_RECVBUF_SZ (32768) /* 32k */
+				#endif
+				/* #define MAX_RECVBUF_SZ (8192+1024) */ /* 8K+1k */
+			#else
+				#define MAX_RECVBUF_SZ (4000) /* about 4K */
+			#endif
+		#endif
+	#endif /* !MAX_RECVBUF_SZ */
+
+#elif defined(CONFIG_PCI_HCI)
+	#define MAX_RECVBUF_SZ (4000) /* about 4K */
+
+#elif defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI)
+
+	#define MAX_RECVBUF_SZ (RX_DMA_BOUNDARY_8192F + 1)
+
+#endif
+
+/* Rx smooth factor */
+#define	Rx_Smooth_Factor (20)
+
+#ifdef CONFIG_SDIO_HCI
+	#ifndef CONFIG_SDIO_RX_COPY
+		#undef MAX_RECVBUF_SZ
+		#define MAX_RECVBUF_SZ	(RX_DMA_SIZE_8192F - RX_DMA_RESERVED_SIZE_8192F)
+	#endif /* !CONFIG_SDIO_RX_COPY */
+#endif /* CONFIG_SDIO_HCI */
+
+/*-----------------------------------------------------------------*/
+/*	RTL8192F RX BUFFER DESC                                      */
+/*-----------------------------------------------------------------*/
+/*DWORD 0*/
+#define SET_RX_BUFFER_DESC_DATA_LENGTH_8192F(__pRxStatusDesc, __Value)		SET_BITS_TO_LE_4BYTE(__pRxStatusDesc, 0, 14, __Value)
+#define SET_RX_BUFFER_DESC_LS_8192F(__pRxStatusDesc, __Value)	SET_BITS_TO_LE_4BYTE(__pRxStatusDesc, 15, 1, __Value)
+#define SET_RX_BUFFER_DESC_FS_8192F(__pRxStatusDesc, __Value)		SET_BITS_TO_LE_4BYTE(__pRxStatusDesc, 16, 1, __Value)
+#define SET_RX_BUFFER_DESC_TOTAL_LENGTH_8192F(__pRxStatusDesc, __Value)		SET_BITS_TO_LE_4BYTE(__pRxStatusDesc, 16, 15, __Value)
+
+#define GET_RX_BUFFER_DESC_OWN_8192F(__pRxStatusDesc)		LE_BITS_TO_4BYTE(__pRxStatusDesc, 31, 1)
+#define GET_RX_BUFFER_DESC_LS_8192F(__pRxStatusDesc)		LE_BITS_TO_4BYTE(__pRxStatusDesc, 15, 1)
+#define GET_RX_BUFFER_DESC_FS_8192F(__pRxStatusDesc)		LE_BITS_TO_4BYTE(__pRxStatusDesc, 16, 1)
+#ifdef USING_RX_TAG
+	#define GET_RX_BUFFER_DESC_RX_TAG_8192F(__pRxStatusDesc)		LE_BITS_TO_4BYTE(__pRxStatusDesc, 16, 13)
+#else
+	#define GET_RX_BUFFER_DESC_TOTAL_LENGTH_8192F(__pRxStatusDesc)		LE_BITS_TO_4BYTE(__pRxStatusDesc, 16, 15)
+#endif
+
+/*DWORD 1*/
+#define SET_RX_BUFFER_PHYSICAL_LOW_8192F(__pRxStatusDesc, __Value)		SET_BITS_TO_LE_4BYTE(__pRxStatusDesc+4, 0, 32, __Value)
+
+/*DWORD 2*/
+#ifdef CONFIG_64BIT_DMA
+	#define SET_RX_BUFFER_PHYSICAL_HIGH_8192F(__pRxStatusDesc, __Value)		SET_BITS_TO_LE_4BYTE(__pRxStatusDesc+8, 0, 32, __Value)
+#else
+	#define SET_RX_BUFFER_PHYSICAL_HIGH_8192F(__pRxStatusDesc, __Value)
+#endif
+
+
+#if defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI)
+	s32 rtl8192fs_init_recv_priv(PADAPTER padapter);
+	void rtl8192fs_free_recv_priv(PADAPTER padapter);
+	s32 rtl8192fs_recv_hdl(_adapter *padapter);
+#endif
+
+#ifdef CONFIG_USB_HCI
+	int rtl8192fu_init_recv_priv(_adapter *padapter);
+	void rtl8192fu_free_recv_priv(_adapter *padapter);
+	void rtl8192fu_init_recvbuf(_adapter *padapter, struct recv_buf *precvbuf);
+#endif
+
+#ifdef CONFIG_PCI_HCI
+	s32 rtl8192fe_init_recv_priv(_adapter *padapter);
+	void rtl8192fe_free_recv_priv(_adapter *padapter);
+#endif
+
+void rtl8192f_query_rx_desc_status(union recv_frame *precvframe, u8 *pdesc);
+
+#endif /* __RTL8192F_RECV_H__ */
diff --git a/rtl8723DS/include/rtl8192f_rf.h b/rtl8723DS/include/rtl8192f_rf.h
new file mode 100644
index 0000000..168eb7b
--- a/dev/null
+++ b/rtl8723DS/include/rtl8192f_rf.h
@@ -0,0 +1,83 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2012 - 2017 Realtek Corporation.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ *****************************************************************************/
+#ifndef __RTL8192F_RF_H__
+#define __RTL8192F_RF_H__
+
+/*default*/
+/*#define CONFIG_8192F_DRV_DIS*/
+/*AP*/
+#define CONFIG_8192F_TYPE3_DRV_DIS
+#define CONFIG_8192F_TYPE4_DRV_DIS
+/*unused*/
+#define CONFIG_8192F_TYPE10_DRV_DIS
+#define CONFIG_8192F_TYPE11_DRV_DIS
+#define CONFIG_8192F_TYPE12_DRV_DIS
+#define CONFIG_8192F_TYPE13_DRV_DIS
+#define CONFIG_8192F_TYPE14_DRV_DIS
+#define CONFIG_8192F_TYPE15_DRV_DIS
+#define CONFIG_8192F_TYPE16_DRV_DIS
+#define CONFIG_8192F_TYPE17_DRV_DIS
+#define CONFIG_8192F_TYPE18_DRV_DIS
+#define CONFIG_8192F_TYPE19_DRV_DIS
+#define CONFIG_8192F_TYPE20_DRV_DIS
+#define CONFIG_8192F_TYPE21_DRV_DIS
+#define CONFIG_8192F_TYPE22_DRV_DIS
+#define CONFIG_8192F_TYPE23_DRV_DIS
+#define CONFIG_8192F_TYPE24_DRV_DIS
+#define CONFIG_8192F_TYPE25_DRV_DIS
+#define CONFIG_8192F_TYPE26_DRV_DIS
+#define CONFIG_8192F_TYPE27_DRV_DIS
+#define CONFIG_8192F_TYPE28_DRV_DIS
+#define CONFIG_8192F_TYPE29_DRV_DIS
+#define CONFIG_8192F_TYPE30_DRV_DIS
+#define CONFIG_8192F_TYPE31_DRV_DIS
+
+
+#ifdef CONFIG_SDIO_HCI /**/
+/*usb*/
+#define CONFIG_8192F_TYPE1_DRV_DIS
+#define CONFIG_8192F_TYPE5_DRV_DIS
+/*pcie*/
+#define CONFIG_8192F_TYPE0_DRV_DIS
+#define CONFIG_8192F_TYPE6_DRV_DIS
+#define CONFIG_8192F_TYPE7_DRV_DIS
+#define CONFIG_8192F_TYPE8_DRV_DIS
+#define CONFIG_8192F_TYPE9_DRV_DIS
+#endif/*CONFIG_SDIO_HCI*/
+
+#ifdef CONFIG_USB_HCI
+/*sdio*/
+#define CONFIG_8192F_TYPE2_DRV_DIS
+/*pcie*/
+#define CONFIG_8192F_TYPE0_DRV_DIS
+#define CONFIG_8192F_TYPE6_DRV_DIS
+#define CONFIG_8192F_TYPE7_DRV_DIS
+#define CONFIG_8192F_TYPE8_DRV_DIS
+#define CONFIG_8192F_TYPE9_DRV_DIS
+#endif/*CONFIG_USB_HCI*/
+
+#ifdef CONFIG_PCI_HCI
+/*sdio*/
+#define CONFIG_8192F_TYPE2_DRV_DIS
+/*usb*/
+#define CONFIG_8192F_TYPE1_DRV_DIS
+#define CONFIG_8192F_TYPE5_DRV_DIS
+#endif/*CONFIG_PCI_HCI*/
+
+int PHY_RF6052_Config8192F(IN PADAPTER pdapter);
+
+void PHY_RF6052SetBandwidth8192F(IN PADAPTER Adapter, IN enum channel_width Bandwidth);
+
+#endif/* __RTL8192F_RF_H__ */
diff --git a/rtl8723DS/include/rtl8192f_spec.h b/rtl8723DS/include/rtl8192f_spec.h
new file mode 100644
index 0000000..6e67195
--- a/dev/null
+++ b/rtl8723DS/include/rtl8192f_spec.h
@@ -0,0 +1,538 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2007 - 2017 Realtek Corporation.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ *****************************************************************************/
+#ifndef __RTL8192F_SPEC_H__
+#define __RTL8192F_SPEC_H__
+
+#include <drv_conf.h>
+
+
+#define HAL_NAV_UPPER_UNIT_8192F		128		/* micro-second */
+
+/* -----------------------------------------------------
+ *
+ *	0x0000h ~ 0x00FFh	System Configuration
+ *
+ * ----------------------------------------------------- */
+#define REG_SYS_ISO_CTRL_8192F			0x0000	/* 2 Byte */
+#define REG_SYS_FUNC_EN_8192F			0x0002	/* 2 Byte */
+#define REG_APS_FSMCO_8192F			0x0004	/* 4 Byte */
+#define REG_SYS_CLKR_8192F				0x0008	/* 2 Byte */
+#define REG_9346CR_8192F				0x000A	/* 2 Byte */
+#define REG_EE_VPD_8192F				0x000C	/* 2 Byte */
+#define REG_AFE_MISC_8192F				0x0010	/* 1 Byte */
+#define REG_SPS0_CTRL_8192F				0x0011	/* 7 Byte */
+#define REG_SPS_OCP_CFG_8192F			0x0018	/* 4 Byte */
+#define REG_RSV_CTRL_8192F				0x001C	/* 3 Byte */
+#define REG_RF_CTRL_8192F				0x001F	/* 1 Byte */
+#define REG_LPLDO_CTRL_8192F			0x0023	/* 1 Byte */
+#define REG_AFE_XTAL_CTRL_8192F		0x0024	/* 4 Byte */
+#define REG_AFE_PLL_CTRL_8192F			0x0028	/* 4 Byte */
+#define REG_MAC_PLL_CTRL_EXT_8192F		0x002c	/* 4 Byte */
+#define REG_EFUSE_CTRL_8192F			0x0030
+#define REG_EFUSE_TEST_8192F			0x0034
+#define REG_PWR_DATA_8192F				0x0038
+#define REG_CAL_TIMER_8192F				0x003C
+#define REG_ACLK_MON_8192F				0x003E
+#define REG_GPIO_MUXCFG_8192F			0x0040
+#define REG_GPIO_IO_SEL_8192F			0x0042
+#define REG_MAC_PINMUX_CFG_8192F		0x0043
+#define REG_GPIO_PIN_CTRL_8192F			0x0044
+#define REG_GPIO_INTM_8192F				0x0048
+#define REG_LEDCFG0_8192F				0x004C
+#define REG_LEDCFG1_8192F				0x004D
+#define REG_LEDCFG2_8192F				0x004E
+#define REG_LEDCFG3_8192F				0x004F
+#define REG_FSIMR_8192F					0x0050
+#define REG_FSISR_8192F					0x0054
+#define REG_HSIMR_8192F					0x0058
+#define REG_HSISR_8192F					0x005c
+#define REG_GPIO_EXT_CTRL				0x0060
+#define REG_PAD_CTRL1_8192F		0x0064
+#define REG_MULTI_FUNC_CTRL_8192F		0x0068
+#define REG_GPIO_STATUS_8192F			0x006C
+#define REG_SDIO_CTRL_8192F				0x0070
+#define REG_OPT_CTRL_8192F				0x0074
+#define REG_AFE_CTRL_4_8192F		0x0078
+#define REG_MCUFWDL_8192F				0x0080
+#define REG_8051FW_CTRL_8192F			0x0080
+#define REG_HMEBOX_DBG_0_8192F	0x0088
+#define REG_HMEBOX_DBG_1_8192F	0x008A
+#define REG_HMEBOX_DBG_2_8192F	0x008C
+#define REG_HMEBOX_DBG_3_8192F	0x008E
+#define REG_WLLPS_CTRL		0x0090
+#define REG_HIMR0_8192F					0x00B0
+#define REG_HISR0_8192F				0x00B4
+#define REG_HIMR1_8192F					0x00B8
+#define REG_HISR1_8192F					0x00BC
+#define REG_PMC_DBG_CTRL2_8192F			0x00CC
+#define	REG_EFUSE_BURN_GNT_8192F		0x00CF
+#define REG_HPON_FSM_8192F				0x00EC
+#define REG_SYS_CFG1_8192F				0x00F0
+#define REG_SYS_CFG2_8192F				0x00FC
+#define REG_ROM_VERSION					0x00FD
+
+/* -----------------------------------------------------
+ *
+ *	0x0100h ~ 0x01FFh	MACTOP General Configuration
+ *
+ * ----------------------------------------------------- */
+#define REG_CR_8192F						0x0100
+#define REG_PBP_8192F					0x0104
+#define REG_PKT_BUFF_ACCESS_CTRL_8192F	0x0106
+#define REG_TRXDMA_CTRL_8192F			0x010C
+#define REG_TRXFF_BNDY_8192F			0x0114
+#define REG_TRXFF_STATUS_8192F			0x0118
+#define REG_RXFF_PTR_8192F				0x011C
+#define REG_CPWM_8192F					0x012C
+#define REG_FWIMR_8192F					0x0130
+#define REG_FWISR_8192F					0x0134
+#define REG_FTIMR_8192F					0x0138
+#define REG_PKTBUF_DBG_CTRL_8192F		0x0140
+#define REG_RXPKTBUF_CTRL_8192F		0x0142
+#define REG_PKTBUF_DBG_DATA_L_8192F	0x0144
+#define REG_PKTBUF_DBG_DATA_H_8192F	0x0148
+
+#define REG_TC0_CTRL_8192F				0x0150
+#define REG_TC1_CTRL_8192F				0x0154
+#define REG_TC2_CTRL_8192F				0x0158
+#define REG_TC3_CTRL_8192F				0x015C
+#define REG_TC4_CTRL_8192F				0x0160
+#define REG_TCUNIT_BASE_8192F			0x0164
+#define REG_RSVD3_8192F					0x0168
+#define REG_C2HEVT_CMD_ID_8192F	0x01A0
+#define REG_C2HEVT_CMD_SEQ_88XX		0x01A1
+#define REG_C2hEVT_CMD_CONTENT_88XX	0x01A2
+#define REG_C2HEVT_CMD_LEN_8192F        0x01AE
+#define REG_C2HEVT_CLEAR_8192F			0x01AF
+#define REG_MCUTST_1_8192F				0x01C0
+#define REG_WOWLAN_WAKE_REASON 0x01C7
+#define REG_FMETHR_8192F				0x01C8
+#define REG_HMETFR_8192F				0x01CC
+#define REG_HMEBOX_0_8192F				0x01D0
+#define REG_HMEBOX_1_8192F				0x01D4
+#define REG_HMEBOX_2_8192F				0x01D8
+#define REG_HMEBOX_3_8192F				0x01DC
+#define REG_LLT_INIT_8192F				0x01E0
+#define REG_HMEBOX_EXT0_8192F			0x01F0
+#define REG_HMEBOX_EXT1_8192F			0x01F4
+#define REG_HMEBOX_EXT2_8192F			0x01F8
+#define REG_HMEBOX_EXT3_8192F			0x01FC
+
+/* -----------------------------------------------------
+ *
+ *	0x0200h ~ 0x027Fh	TXDMA Configuration
+ *
+ * ----------------------------------------------------- */
+#define REG_RQPN_8192F					0x0200
+#define REG_FIFOPAGE_8192F				0x0204
+#define REG_DWBCN0_CTRL_8192F			REG_TDECTRL
+#define REG_TXDMA_OFFSET_CHK_8192F	0x020C
+#define REG_TXDMA_STATUS_8192F		0x0210
+#define REG_RQPN_NPQ_8192F			0x0214
+#define REG_DWBCN1_CTRL_8192F			0x0228
+#define REG_RQPN_EXQ1_EXQ2			0x0230
+
+/* -----------------------------------------------------
+ *
+ *	0x0280h ~ 0x02FFh	RXDMA Configuration
+ *
+ * ----------------------------------------------------- */
+#define REG_RXDMA_AGG_PG_TH_8192F		0x0280
+#define REG_FW_UPD_RDPTR_8192F		0x0284 /* FW shall update this register before FW write RXPKT_RELEASE_POLL to 1 */
+#define REG_RXDMA_CONTROL_8192F		0x0286 /* Control the RX DMA. */
+#define REG_RXDMA_STATUS_8192F			0x0288
+#define REG_RXDMA_MODE_CTRL_8192F		0x0290
+#define REG_EARLY_MODE_CONTROL_8192F	0x02BC
+#define REG_RSVD5_8192F					0x02F0
+#define REG_RSVD6_8192F					0x02F4
+
+/* -----------------------------------------------------
+ *
+ *	0x0300h ~ 0x03FFh	PCIe
+ *
+ * ----------------------------------------------------- */
+#define	REG_PCIE_CTRL_REG_8192F		0x0300
+#define	REG_INT_MIG_8192F				0x0304	/* Interrupt Migration */
+#define	REG_BCNQ_TXBD_DESA_8192F		0x0308	/* TX Beacon Descriptor Address */
+#define	REG_MGQ_TXBD_DESA_8192F			0x0310	/* TX Manage Queue Descriptor Address */
+#define	REG_VOQ_TXBD_DESA_8192F			0x0318	/* TX VO Queue Descriptor Address */
+#define	REG_VIQ_TXBD_DESA_8192F			0x0320	/* TX VI Queue Descriptor Address */
+#define	REG_BEQ_TXBD_DESA_8192F			0x0328	/* TX BE Queue Descriptor Address */
+#define	REG_BKQ_TXBD_DESA_8192F			0x0330	/* TX BK Queue Descriptor Address */
+#define	REG_RXQ_RXBD_DESA_8192F			0x0338	/* RX Queue	Descriptor Address */
+#define REG_HI0Q_TXBD_DESA_8192F		0x0340
+#define REG_HI1Q_TXBD_DESA_8192F		0x0348
+#define REG_HI2Q_TXBD_DESA_8192F		0x0350
+#define REG_HI3Q_TXBD_DESA_8192F		0x0358
+#define REG_HI4Q_TXBD_DESA_8192F		0x0360
+#define REG_HI5Q_TXBD_DESA_8192F		0x0368
+#define REG_HI6Q_TXBD_DESA_8192F		0x0370
+#define REG_HI7Q_TXBD_DESA_8192F		0x0378
+#define	REG_MGQ_TXBD_NUM_8192F			0x0380
+#define	REG_RX_RXBD_NUM_8192F			0x0382
+#define	REG_VOQ_TXBD_NUM_8192F			0x0384
+#define	REG_VIQ_TXBD_NUM_8192F			0x0386
+#define	REG_BEQ_TXBD_NUM_8192F			0x0388
+#define	REG_BKQ_TXBD_NUM_8192F			0x038A
+#define	REG_HI0Q_TXBD_NUM_8192F			0x038C
+#define	REG_HI1Q_TXBD_NUM_8192F			0x038E
+#define	REG_HI2Q_TXBD_NUM_8192F			0x0390
+#define	REG_HI3Q_TXBD_NUM_8192F			0x0392
+#define	REG_HI4Q_TXBD_NUM_8192F			0x0394
+#define	REG_HI5Q_TXBD_NUM_8192F			0x0396
+#define	REG_HI6Q_TXBD_NUM_8192F			0x0398
+#define	REG_HI7Q_TXBD_NUM_8192F			0x039A
+#define	REG_TSFTIMER_HCI_8192F			0x039C
+#define	REG_BD_RW_PTR_CLR_8192F			0x039C
+
+/* Read Write Point */
+#define	REG_VOQ_TXBD_IDX_8192F			0x03A0
+#define	REG_VIQ_TXBD_IDX_8192F			0x03A4
+#define	REG_BEQ_TXBD_IDX_8192F			0x03A8
+#define	REG_BKQ_TXBD_IDX_8192F			0x03AC
+#define	REG_MGQ_TXBD_IDX_8192F			0x03B0
+#define	REG_RXQ_TXBD_IDX_8192F			0x03B4
+#define	REG_HI0Q_TXBD_IDX_8192F			0x03B8
+#define	REG_HI1Q_TXBD_IDX_8192F			0x03BC
+#define	REG_HI2Q_TXBD_IDX_8192F			0x03C0
+#define	REG_HI3Q_TXBD_IDX_8192F			0x03C4
+#define	REG_HI4Q_TXBD_IDX_8192F			0x03C8
+#define	REG_HI5Q_TXBD_IDX_8192F			0x03CC
+#define	REG_HI6Q_TXBD_IDX_8192F			0x03D0
+#define	REG_HI7Q_TXBD_IDX_8192F			0x03D4
+#define	REG_DBI_WDATA_V1_8192F			0x03E8
+#define	REG_DBI_RDATA_V1_8192F			0x03EC
+#define	REG_DBI_FLAG_V1_8192F			0x03F0
+#define REG_MDIO_V1_8192F			0x03F4
+#define REG_HCI_MIX_CFG_8192F			0x03FC
+#define REG_PCIE_HCPWM_8192FE				0x03D8
+#define REG_PCIE_HRPWM_8192FE				0x03DC
+#define REG_PCIE_MIX_CFG_8192F				0x03F8
+
+/* -----------------------------------------------------
+ *
+ *	0x0400h ~ 0x047Fh	Protocol Configuration
+ *
+ * ----------------------------------------------------- */
+#define REG_QUEUELIST_INFO0_8192F		0x0400
+#define REG_QUEUELIST_INFO1_8192F		0x0404
+#define REG_QUEUELIST_INFO2_8192F		0x0414
+#define REG_TXPKT_EMPTY_8192F			0x0418
+
+#define REG_FWHW_TXQ_CTRL_8192F		0x0420
+#define REG_HWSEQ_CTRL_8192F			0x0423
+#define REG_TXPKTBUF_BCNQ_BDNY_8192F	0x0424
+#define REG_TXPKTBUF_MGQ_BDNY_8192F	0x0425
+#define REG_LIFECTRL_CTRL_8192F			0x0426
+#define REG_MULTI_BCNQ_OFFSET_8192F	0x0427
+#define REG_SPEC_SIFS_8192F				0x0428
+#define REG_RL_8192F						0x042A
+#define REG_TXBF_CTRL_8192F				0x042C
+#define REG_DARFRC_8192F				0x0430
+#define REG_RARFRC_8192F				0x0438
+#define REG_RRSR_8192F					0x0440
+#define REG_ARFR0_8192F					0x0444
+#define REG_ARFR1_8192F					0x044C
+#define REG_CCK_CHECK_8192F				0x0454
+#define REG_AMPDU_MAX_TIME_8192F		0x0456
+#define REG_TXPKTBUF_BCNQ_BDNY1_8192F	0x0457
+
+#define REG_AMPDU_MAX_LENGTH_8192F	0x0458
+#define REG_TXPKTBUF_WMAC_LBK_BF_HD_8192F	0x045D
+#define REG_NDPA_OPT_CTRL_8192F		0x045F
+#define REG_FAST_EDCA_CTRL_8192F		0x0460
+#define REG_RD_RESP_PKT_TH_8192F		0x0463
+#define REG_DATA_SC_8192F				0x0483
+#define REG_TXRPT_START_OFFSET		0x04AC
+#define REG_POWER_STAGE1_8192F		0x04B4
+#define REG_POWER_STAGE2_8192F		0x04B8
+#define REG_AMPDU_BURST_MODE_8192F	0x04BC
+#define REG_PKT_VO_VI_LIFE_TIME_8192F	0x04C0
+#define REG_PKT_BE_BK_LIFE_TIME_8192F	0x04C2
+#define REG_STBC_SETTING_8192F			0x04C4
+#define REG_HT_SINGLE_AMPDU_8192F		0x04C7
+#define REG_PROT_MODE_CTRL_8192F		0x04C8
+#define REG_MAX_AGGR_NUM_8192F		0x04CA
+#define REG_RTS_MAX_AGGR_NUM_8192F	0x04CB
+#define REG_BAR_MODE_CTRL_8192F		0x04CC
+#define REG_RA_TRY_RATE_AGG_LMT_8192F	0x04CF
+#define REG_MACID_PKT_DROP0_8192F		0x04D0
+#define REG_MACID_PKT_SLEEP_8192F		0x04D4
+#define REG_PRECNT_CTRL_8192F			0x04E5
+/* -----------------------------------------------------
+ *
+ *	0x0500h ~ 0x05FFh	EDCA Configuration
+ *
+ * ----------------------------------------------------- */
+#define REG_EDCA_VO_PARAM_8192F		0x0500
+#define REG_EDCA_VI_PARAM_8192F		0x0504
+#define REG_EDCA_BE_PARAM_8192F		0x0508
+#define REG_EDCA_BK_PARAM_8192F		0x050C
+#define REG_BCNTCFG_8192F				0x0510
+#define REG_PIFS_8192F					0x0512
+#define REG_RDG_PIFS_8192F				0x0513
+#define REG_SIFS_CTX_8192F				0x0514
+#define REG_SIFS_TRX_8192F				0x0516
+#define REG_AGGR_BREAK_TIME_8192F		0x051A
+#define REG_SLOT_8192F					0x051B
+#define REG_TX_PTCL_CTRL_8192F			0x0520
+#define REG_TXPAUSE_8192F				0x0522
+#define REG_DIS_TXREQ_CLR_8192F		0x0523
+#define REG_RD_CTRL_8192F				0x0524
+/*
+ * Format for offset 540h-542h:
+ *	[3:0]:   TBTT prohibit setup in unit of 32us. The time for HW getting beacon content before TBTT.
+ *	[7:4]:   Reserved.
+ *	[19:8]:  TBTT prohibit hold in unit of 32us. The time for HW holding to send the beacon packet.
+ *	[23:20]: Reserved
+ * Description:
+ *	              |
+ * |<--Setup--|--Hold------------>|
+ *	--------------|----------------------
+ * |
+ * TBTT
+ * Note: We cannot update beacon content to HW or send any AC packets during the time between Setup and Hold.
+ * Described by Designer Tim and Bruce, 2011-01-14.
+ *   */
+#define REG_TBTT_PROHIBIT_8192F			0x0540
+#define REG_RD_NAV_NXT_8192F			0x0544
+#define REG_NAV_PROT_LEN_8192F			0x0546
+#define REG_BCN_CTRL_8192F				0x0550
+#define REG_BCN_CTRL_1_8192F			0x0551
+#define REG_MBID_NUM_8192F				0x0552
+#define REG_DUAL_TSF_RST_8192F			0x0553
+#define REG_BCN_INTERVAL_8192F			0x0554
+#define REG_DRVERLYINT_8192F			0x0558
+#define REG_BCNDMATIM_8192F			0x0559
+#define REG_ATIMWND_8192F				0x055A
+#define REG_USTIME_TSF_8192F			0x055C
+#define REG_BCN_MAX_ERR_8192F			0x055D
+#define REG_RXTSF_OFFSET_CCK_8192F		0x055E
+#define REG_RXTSF_OFFSET_OFDM_8192F	0x055F	
+#define REG_TSFTR_8192F					0x0560
+#define REG_CTWND_8192F					0x0572
+#define REG_SECONDARY_CCA_CTRL_8192F	0x0577
+#define REG_PSTIMER_8192F				0x0580
+#define REG_TIMER0_8192F				0x0584
+#define REG_TIMER1_8192F				0x0588
+#define REG_ACMHWCTRL_8192F			0x05C0
+#define REG_SCH_TXCMD_8192F			0x05F8
+
+/* -----------------------------------------------------
+ *
+ *	0x0600h ~ 0x07FFh	WMAC Configuration
+ *
+ * ----------------------------------------------------- */
+#define REG_MAC_CR_8192F				0x0600
+#define REG_TCR_8192F					0x0604
+#define REG_RCR_8192F					0x0608
+#define REG_RX_PKT_LIMIT_8192F			0x060C
+#define REG_RX_DLK_TIME_8192F			0x060D
+#define REG_RX_DRVINFO_SZ_8192F	0x060F
+
+#define REG_MACID_8192F					0x0610
+#define REG_BSSID_8192F					0x0618
+#define REG_MAR_8192F					0x0620
+#define REG_MBIDCAMCFG_8192F			0x0628
+
+
+#define REG_USTIME_EDCA_8192F			0x0638
+#define REG_MAC_SPEC_SIFS_8192F		0x063A
+#define REG_RESP_SIFP_CCK_8192F			0x063C
+#define REG_RESP_SIFS_OFDM_8192F		0x063E
+#define REG_ACKTO_8192F					0x0640
+#define REG_CTS2TO_8192F				0x0641
+#define REG_EIFS_8192F					0x0642
+
+#define REG_NAV_UPPER_8192F			0x0652	/* unit of 128*/
+#define REG_TRXPTCL_CTL_8192F			0x0668
+
+/* Security*/
+#define REG_CAMCMD_8192F				0x0670
+#define REG_CAMWRITE_8192F				0x0674
+#define REG_CAMREAD_8192F				0x0678
+#define REG_CAMDBG_8192F				0x067C
+#define REG_SECCFG_8192F				0x0680
+
+/* Power */
+#define REG_WOW_CTRL_8192F				0x0690
+#define REG_PS_RX_INFO_8192F			0x0692
+#define REG_UAPSD_TID_8192F				0x0693
+#define REG_WKFMCAM_CMD_8192F			0x0698
+#define REG_WKFMCAM_NUM_8192F			0x0698
+#define REG_WKFMCAM_RWD_8192F			0x069C
+#define REG_RXFLTMAP0_8192F				0x06A0
+#define REG_RXFLTMAP1_8192F				0x06A2
+#define REG_RXFLTMAP2_8192F				0x06A4
+#define REG_BCN_PSR_RPT_8192F			0x06A8
+#define REG_BT_COEX_TABLE_8192F		0x06C0
+#define REG_BFMER0_INFO_8192F			0x06E4
+#define REG_BFMER1_INFO_8192F			0x06EC
+#define REG_CSI_RPT_PARAM_BW20_8192F	0x06F4
+#define REG_CSI_RPT_PARAM_BW40_8192F	0x06F8
+#define REG_CSI_RPT_PARAM_BW80_8192F	0x06FC
+
+/* Hardware Port 2 */
+#define REG_MACID1_8192F				0x0700
+#define REG_BSSID1_8192F				0x0708
+#define REG_BFMEE_SEL_8192F				0x0714
+#define REG_SND_PTCL_CTRL_8192F		0x0718
+
+/* LTR */
+#define REG_LTR_CTRL_BASIC_8192F		0x07A4
+#define REG_LTR_IDLE_LATENCY_V1_8192F		0x0798
+#define REG_LTR_ACTIVE_LATENCY_V1_8192F	0x079C
+
+/* GPIO Control */
+#define REG_SW_GPIO_SHARE_CTRL_8192F	0x1038
+#define REG_SW_GPIO_A_OUT_8192F			0x1040
+#define REG_SW_GPIO_A_OEN_8192F			0x1044
+
+/* ************************************************************
+ * SDIO Bus Specification
+ * ************************************************************ */
+
+/* -----------------------------------------------------
+ * SDIO CMD Address Mapping
+ * ----------------------------------------------------- */
+
+/* -----------------------------------------------------
+ * I/O bus domain (Host)
+ * ----------------------------------------------------- */
+/*SDIO Host Interrupt Mask Register */
+#define SDIO_HIMR_CRCERR_MSK			BIT(31)
+/* SDIO Host Interrupt Service Routine */
+#define SDIO_HISR_HEISR_IND_INT		BIT(28)
+#define SDIO_HISR_HSISR2_IND_INT		BIT(29)
+#define SDIO_HISR_HSISR3_IND_INT		BIT(30)
+#define SDIO_HISR_SDIO_CRCERR			BIT(31)
+/* -----------------------------------------------------
+ * SDIO register
+ * ----------------------------------------------------- */
+#define SDIO_REG_HCPWM1_8192F	0x038/* HCI Current Power Mode 1 */
+#define SDIO_REG_FREE_TXPG1_8192F		0x0020 /* Free Tx Buffer Page1*/
+#define SDIO_REG_FREE_TXPG2_8192F		0x0024 /* Free Tx Buffer Page1*/
+#define SDIO_REG_FREE_TXPG3_8192F		0x0028
+#define SDIO_REG_AC_OQT_FREEPG_8192F		0x002A
+#define SDIO_REG_NOAC_OQT_FREEPG_8192F		0x002B
+/* ****************************************************************************
+ *	8192F Regsiter Bit and Content definition
+ * **************************************************************************** */
+
+#define BIT_USB_RXDMA_AGG_EN	BIT(31)
+#define RXDMA_AGG_MODE_EN		BIT(1)
+
+#ifdef CONFIG_WOWLAN
+	#define RXPKT_RELEASE_POLL		BIT(16)
+	#define RXDMA_IDLE				BIT(17)
+	#define RW_RELEASE_EN			BIT(18)
+#endif
+
+#ifdef CONFIG_AMPDU_PRETX_CD
+/*#define BIT_ERRORHDL_INT			BIT(2)*/
+/*#define BIT_MACTX_ERR_3			BIT(4)*/
+#define BIT_PRE_TX_CMD_8192F		BIT(6)
+#define BIT_EN_PRECNT_8192F		BIT(11)
+#endif
+/* SDIO Host Interrupt Service Routine */
+#define SDIO_HISR_HEISR_IND_INT	BIT(28)
+#define SDIO_HISR_HSISR2_IND_INT	BIT(29)
+#define SDIO_HISR_HSISR3_IND_INT	BIT(30)
+#define SDIO_HISR_SDIO_CRCERR		BIT(31)
+
+/* PCIE Host Interrupt Mask Register (HIMR) */
+#ifdef CONFIG_PCI_HCI
+/* ----------------------------------------------------------------------------
+ *   * 8192F IMR/ISR bits							(offset 0xB0,  8bits)
+ *     * ---------------------------------------------------------------------------- */
+
+#define IMR_DISABLED_8192F					0
+/* IMR DW0(0x00B0-00B3) Bit 0-31 */
+#define IMR_TIMER2_8192F					BIT(31)         /* Timeout interrupt 2 */
+#define IMR_TIMER1_8192F					BIT(30)		/* Timeout interrupt 1 */
+#define IMR_PSTIMEOUT_8192F				BIT(29)		/* Power Save Time Out Interrupt */
+#define IMR_GTINT4_8192F					BIT(28)		/* When GTIMER4 expires, this bit is set to 1 */
+#define IMR_GTINT3_8192F					BIT(27)		/* When GTIMER3 expires, this bit is set to 1 */
+#define IMR_TXBCN0ERR_8192F				BIT(26)		/* Transmit Beacon0 Error */
+#define IMR_TXBCN0OK_8192F				BIT(25)		/* Transmit Beacon0 OK */
+#define IMR_TSF_BIT32_TOGGLE_8192F		BIT(24)		/* TSF Timer BIT32 toggle indication interrupt */
+#define IMR_BCNDMAINT0_8192F				BIT(20)		/* Beacon DMA Interrupt 0 */
+#define IMR_BCNDERR0_8192F				BIT(16)		/* Beacon Queue DMA OK0 */
+#define IMR_HSISR_IND_ON_INT_8192F		BIT(15)		/* HSISR Indicator (HSIMR & HSISR is true, this bit is set to 1) */
+#define IMR_BCNDMAINT_E_8192F				BIT(14)		/* Beacon DMA Interrupt Extension for Win7 */
+#define IMR_ATIMEND_8192F					BIT(12)         /* CTWidnow End or ATIM Window End */
+#define IMR_C2HCMD_8192F					BIT(10)		/* CPU to Host Command INT status, Write 1 clear */
+#define IMR_CPWM2_8192F					BIT(9)          /* CPU power mode exchange INT status, Write 1 clear */
+#define IMR_CPWM_8192F						BIT(8)		/* CPU power mode exchange INT status, Write 1 clear */
+#define IMR_HIGHDOK_8192F					BIT(7)		/* High Queue DMA OK */
+#define IMR_MGNTDOK_8192F					BIT(6)		/* Management Queue DMA OK */
+#define IMR_BKDOK_8192F					BIT(5)		/* AC_BK DMA OK */
+#define IMR_BEDOK_8192F					BIT(4)		/* AC_BE DMA OK */
+#define IMR_VIDOK_8192F					BIT(3)		/* AC_VI DMA OK */
+#define IMR_VODOK_8192F					BIT(2)		/* AC_VO DMA OK */
+#define IMR_RDU_8192F						BIT(1)		/* Rx Descriptor Unavailable */
+#define IMR_ROK_8192F						BIT(0)		/* Receive DMA OK */
+
+/* IMR DW1(0x00B4-00B7) Bit 0-31 */
+#define IMR_MCUERR_8192F					BIT(28)
+#define IMR_BCNDMAINT7_8192F				BIT(27) 		/* Beacon DMA Interrupt 7 */
+#define IMR_BCNDMAINT6_8192F				BIT(26)		/* Beacon DMA Interrupt 6 */
+#define IMR_BCNDMAINT5_8192F				BIT(25)		/* Beacon DMA Interrupt 5 */
+#define IMR_BCNDMAINT4_8192F				BIT(24)		/* Beacon DMA Interrupt 4 */
+#define IMR_BCNDMAINT3_8192F				BIT(23)		/* Beacon DMA Interrupt 3 */
+#define IMR_BCNDMAINT2_8192F				BIT(22)		/* Beacon DMA Interrupt 2 */
+#define IMR_BCNDMAINT1_8192F 				BIT(21)		/* Beacon DMA Interrupt 1 */
+#define IMR_BCNDOK7_8192F 					BIT(20)		/* Beacon Queue DMA OK Interrup 7 */
+#define IMR_BCNDOK6_8192F					BIT(19) 		/* Beacon Queue DMA OK Interrup 6 */
+#define IMR_BCNDOK5_8192F					BIT(18)		/* Beacon Queue DMA OK Interrup 5 */
+#define IMR_BCNDOK4_8192F					BIT(17)		/* Beacon Queue DMA OK Interrup 4 */
+#define IMR_BCNDOK3_8192F					BIT(16)		/* Beacon Queue DMA OK Interrup 3 */
+#define IMR_BCNDOK2_8192F					BIT(15)		/* Beacon Queue DMA OK Interrup 2 */
+#define IMR_BCNDOK1_8192F					BIT(14)		/* Beacon Queue DMA OK Interrup 1 */
+#define IMR_ATIMEND_E_8192F				BIT(13)		/* ATIM Window End Extension for Win7 */
+#define IMR_TXERR_8192F					BIT(11)		/* Tx Error Flag Interrupt status, write 1 clear. */
+#define IMR_RXERR_8192F					BIT(10)		/* Rx Error Flag INT status, Write 1 clear */
+#define IMR_TXFOVW_8192F					BIT(9)		/* Transmit FIFO Overflow */
+#define IMR_RXFOVW_8192F 					BIT(8)		/* Receive FIFO Overflow */
+
+/* #define IMR_RX_MASK			(IMR_ROK_8192F|IMR_RDU_8192F|IMR_RXFOVW_8192F) */
+#define IMR_TX_MASK			(IMR_VODOK_8192F | IMR_VIDOK_8192F | IMR_BEDOK_8192F | IMR_BKDOK_8192F | IMR_MGNTDOK_8192F | IMR_HIGHDOK_8192F)
+#define RT_BCN_INT_MASKS		(IMR_BCNDMAINT0_8192F | IMR_TXBCN0OK_8192F | IMR_TXBCN0ERR_8192F | IMR_BCNDERR0_8192F)
+#define RT_AC_INT_MASKS		(IMR_VIDOK_8192F | IMR_VODOK_8192F | IMR_BEDOK_8192F | IMR_BKDOK_8192F)
+#endif /* CONFIG_PCI_HCI */
+
+/* 2 HSISR
+ * interrupt mask which needs to clear */
+#define MASK_HSISR_CLEAR		(HSISR_GPIO12_0_INT |\
+		HSISR_SPS_OCP_INT |\
+		HSISR_RON_INT |\
+		HSISR_PDNINT |\
+		HSISR_GPIO9_INT)
+
+#define _TXDMA_HIQ_MAP_8192F(x)			(((x) & 0x7) << 19)
+#define _TXDMA_MGQ_MAP_8192F(x)			(((x) & 0x7) << 16)
+#define _TXDMA_BKQ_MAP_8192F(x)			(((x) & 0x7) << 13)
+#define _TXDMA_BEQ_MAP_8192F(x)			(((x) & 0x7) << 10)
+#define _TXDMA_VIQ_MAP_8192F(x)			(((x) & 0x7) << 7)
+#define _TXDMA_VOQ_MAP_8192F(x)			(((x) & 0x7) << 4)
+
+/*mac queue info*/
+#define QUEUE_TOTAL_NUM	20/*reg414h : 0~f ac queue 0x10~0x13MGQ HIQ BCNQ CMDQ*/
+#define QUEUE_ACQ_NUM		16 
+#define QUEUE_INDEX_MGQ		0x10
+#define QUEUE_INDEX_HIQ		0x11
+#define QUEUE_INDEX_BCNQ	0x12
+#define QUEUE_INDEX_CMDQ	0x13
+#endif /* __RTL8192F_SPEC_H__ */
diff --git a/rtl8723DS/include/rtl8192f_sreset.h b/rtl8723DS/include/rtl8192f_sreset.h
new file mode 100644
index 0000000..cf881c4
--- a/dev/null
+++ b/rtl8723DS/include/rtl8192f_sreset.h
@@ -0,0 +1,24 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2007 - 2017 Realtek Corporation.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ *****************************************************************************/
+#ifndef _RTL8192F_SRESET_H_
+#define _RTL8192F_SRESET_H_
+
+#include <rtw_sreset.h>
+
+#ifdef DBG_CONFIG_ERROR_DETECT
+	extern void rtl8192f_sreset_xmit_status_check(_adapter *padapter);
+	extern void rtl8192f_sreset_linked_status_check(_adapter *padapter);
+#endif /* DBG_CONFIG_ERROR_DETECT */
+#endif /* _RTL8192F_SRESET_H_ */
\ No newline at end of file
diff --git a/rtl8723DS/include/rtl8192f_xmit.h b/rtl8723DS/include/rtl8192f_xmit.h
new file mode 100644
index 0000000..6e0f1ea
--- a/dev/null
+++ b/rtl8723DS/include/rtl8192f_xmit.h
@@ -0,0 +1,531 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2007 - 2017 Realtek Corporation.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ *****************************************************************************/
+#ifndef __RTL8192F_XMIT_H__
+#define __RTL8192F_XMIT_H__
+
+
+#define MAX_TID (15)
+
+
+#ifndef __INC_HAL8192FDESC_H
+#define __INC_HAL8192FDESC_H
+
+#define RX_STATUS_DESC_SIZE_8192F		24
+#define RX_DRV_INFO_SIZE_UNIT_8192F 	8
+
+
+/* DWORD 0 */
+#define SET_RX_STATUS_DESC_PKT_LEN_8192F(__pRxStatusDesc, __Value) \
+	SET_BITS_TO_LE_4BYTE(__pRxStatusDesc, 0, 14, __Value)
+#define SET_RX_STATUS_DESC_EOR_8192F(__pRxStatusDesc, __Value) \
+	SET_BITS_TO_LE_4BYTE(__pRxStatusDesc, 30, 1, __Value)
+#define SET_RX_STATUS_DESC_OWN_8192F(__pRxStatusDesc, __Value) \
+	SET_BITS_TO_LE_4BYTE(__pRxStatusDesc, 31, 1, __Value)
+
+#define GET_RX_STATUS_DESC_PKT_LEN_8192F(__pRxStatusDesc) \
+	LE_BITS_TO_4BYTE(__pRxStatusDesc, 0, 14)
+#define GET_RX_STATUS_DESC_CRC32_8192F(__pRxStatusDesc) \
+	LE_BITS_TO_4BYTE(__pRxStatusDesc, 14, 1)
+#define GET_RX_STATUS_DESC_ICV_8192F(__pRxStatusDesc) \
+	LE_BITS_TO_4BYTE(__pRxStatusDesc, 15, 1)
+#define GET_RX_STATUS_DESC_DRVINFO_SIZE_8192F(__pRxStatusDesc) \
+	LE_BITS_TO_4BYTE(__pRxStatusDesc, 16, 4)
+#define GET_RX_STATUS_DESC_SECURITY_8192F(__pRxStatusDesc) \
+	LE_BITS_TO_4BYTE(__pRxStatusDesc, 20, 3)
+#define GET_RX_STATUS_DESC_QOS_8192F(__pRxStatusDesc) \
+	LE_BITS_TO_4BYTE(__pRxStatusDesc, 23, 1)
+#define GET_RX_STATUS_DESC_SHIFT_8192F(__pRxStatusDesc) \
+	LE_BITS_TO_4BYTE(__pRxStatusDesc, 24, 2)
+#define GET_RX_STATUS_DESC_PHY_STATUS_8192F(__pRxStatusDesc) \
+	LE_BITS_TO_4BYTE(__pRxStatusDesc, 26, 1)
+#define GET_RX_STATUS_DESC_SWDEC_8192F(__pRxStatusDesc) \
+	LE_BITS_TO_4BYTE(__pRxStatusDesc, 27, 1)
+#define GET_RX_STATUS_DESC_EOR_8192F(__pRxStatusDesc) \
+	LE_BITS_TO_4BYTE(__pRxStatusDesc, 30, 1)
+#define GET_RX_STATUS_DESC_OWN_8192F(__pRxStatusDesc) \
+	LE_BITS_TO_4BYTE(__pRxStatusDesc, 31, 1)
+
+/* DWORD 1 */
+#define GET_RX_STATUS_DESC_MACID_8192F(__pRxDesc) \
+	LE_BITS_TO_4BYTE(__pRxDesc+4, 0, 7)
+#define GET_RX_STATUS_DESC_TID_8192F(__pRxDesc) \
+	LE_BITS_TO_4BYTE(__pRxDesc+4, 8, 4)
+#define GET_RX_STATUS_DESC_AMSDU_8192F(__pRxDesc) \
+	LE_BITS_TO_4BYTE(__pRxDesc+4, 13, 1)
+#define GET_RX_STATUS_DESC_RXID_MATCH_8192F(__pRxDesc) \
+	LE_BITS_TO_4BYTE(__pRxDesc+4, 14, 1)
+#define GET_RX_STATUS_DESC_PAGGR_8192F(__pRxDesc) \
+	LE_BITS_TO_4BYTE(__pRxDesc+4, 15, 1)
+#define GET_RX_STATUS_DESC_A1_FIT_8192F(__pRxDesc) \
+	LE_BITS_TO_4BYTE(__pRxDesc+4, 16, 4)
+#define GET_RX_STATUS_DESC_CHKERR_8192F(__pRxDesc) \
+	LE_BITS_TO_4BYTE(__pRxDesc+4, 20, 1)
+#define GET_RX_STATUS_DESC_IPVER_8192F(__pRxDesc) \
+	LE_BITS_TO_4BYTE(__pRxDesc+4, 21, 1)
+#define GET_RX_STATUS_DESC_IS_TCPUDP__8192F(__pRxDesc) \
+	LE_BITS_TO_4BYTE(__pRxDesc+4, 22, 1)
+#define GET_RX_STATUS_DESC_CHK_VLD_8192F(__pRxDesc) \
+	LE_BITS_TO_4BYTE(__pRxDesc+4, 23, 1)
+#define GET_RX_STATUS_DESC_PAM_8192F(__pRxDesc) \
+	LE_BITS_TO_4BYTE(__pRxDesc+4, 24, 1)
+#define GET_RX_STATUS_DESC_PWR_8192F(__pRxDesc) \
+	LE_BITS_TO_4BYTE(__pRxDesc+4, 25, 1)
+#define GET_RX_STATUS_DESC_MORE_DATA_8192F(__pRxDesc) \
+	LE_BITS_TO_4BYTE(__pRxDesc+4, 26, 1)
+#define GET_RX_STATUS_DESC_MORE_FRAG_8192F(__pRxDesc) \
+	LE_BITS_TO_4BYTE(__pRxDesc+4, 27, 1)
+#define GET_RX_STATUS_DESC_TYPE_8192F(__pRxDesc) \
+	LE_BITS_TO_4BYTE(__pRxDesc+4, 28, 2)
+#define GET_RX_STATUS_DESC_MC_8192F(__pRxDesc) \
+	LE_BITS_TO_4BYTE(__pRxDesc+4, 30, 1)
+#define GET_RX_STATUS_DESC_BC_8192F(__pRxDesc) \
+	LE_BITS_TO_4BYTE(__pRxDesc+4, 31, 1)
+
+/* DWORD 2 */
+#define GET_RX_STATUS_DESC_SEQ_8192F(__pRxStatusDesc) \
+	LE_BITS_TO_4BYTE(__pRxStatusDesc+8, 0, 12)
+#define GET_RX_STATUS_DESC_FRAG_8192F(__pRxStatusDesc) \
+	LE_BITS_TO_4BYTE(__pRxStatusDesc+8, 12, 4)
+#define GET_RX_STATUS_DESC_RX_IS_QOS_8192F(__pRxStatusDesc) \
+	LE_BITS_TO_4BYTE(__pRxStatusDesc+8, 16, 1)
+#define GET_RX_STATUS_DESC_WLANHD_IV_LEN_8192F(__pRxStatusDesc) \
+	LE_BITS_TO_4BYTE(__pRxStatusDesc+8, 18, 6)
+#define GET_RX_STATUS_DESC_RPT_SEL_8192F(__pRxStatusDesc) \
+	LE_BITS_TO_4BYTE(__pRxStatusDesc+8, 28, 1)
+#define GET_RX_STATUS_DESC_FCS_OK_8192F(__pRxStatusDesc) \
+	LE_BITS_TO_4BYTE(__pRxStatusDesc+8, 31, 1)
+
+/* DWORD 3 */
+#define GET_RX_STATUS_DESC_RX_RATE_8192F(__pRxStatusDesc) \
+	LE_BITS_TO_4BYTE(__pRxStatusDesc+12, 0, 7)
+#define GET_RX_STATUS_DESC_HTC_8192F(__pRxStatusDesc) \
+	LE_BITS_TO_4BYTE(__pRxStatusDesc+12, 10, 1)
+#define GET_RX_STATUS_DESC_EOSP_8192F(__pRxStatusDesc) \
+	LE_BITS_TO_4BYTE(__pRxStatusDesc+12, 11, 1)
+#define GET_RX_STATUS_DESC_BSSID_FIT_8192F(__pRxStatusDesc) \
+	LE_BITS_TO_4BYTE(__pRxStatusDesc+12, 12, 2)
+#ifdef CONFIG_USB_RX_AGGREGATION
+#define GET_RX_STATUS_DESC_USB_AGG_PKTNUM_8192F(__pRxStatusDesc) \
+	LE_BITS_TO_4BYTE(__pRxStatusDesc+12, 16, 8)
+#endif
+#define GET_RX_STATUS_DESC_PATTERN_MATCH_8192F(__pRxDesc) \
+	LE_BITS_TO_4BYTE(__pRxDesc+12, 29, 1)
+#define GET_RX_STATUS_DESC_UNICAST_MATCH_8192F(__pRxDesc) \
+	LE_BITS_TO_4BYTE(__pRxDesc+12, 30, 1)
+#define GET_RX_STATUS_DESC_MAGIC_MATCH_8192F(__pRxDesc) \
+	LE_BITS_TO_4BYTE(__pRxDesc+12, 31, 1)
+
+/* DWORD 6 */
+#define GET_RX_STATUS_DESC_MATCH_ID_8192F(__pRxDesc) \
+	LE_BITS_TO_4BYTE(__pRxDesc+16, 0, 7)
+
+/* DWORD 5 */
+#define GET_RX_STATUS_DESC_TSFL_8192F(__pRxStatusDesc) \
+	LE_BITS_TO_4BYTE(__pRxStatusDesc+20, 0, 32)
+
+#define GET_RX_STATUS_DESC_BUFF_ADDR64_8192F(__pRxDesc) \
+	LE_BITS_TO_4BYTE(__pRxDesc+28, 0, 32)
+
+
+
+/* Dword 0, rsvd: bit26, bit28 */
+#define GET_TX_DESC_OWN_8192F(__pTxDesc)\
+	LE_BITS_TO_4BYTE(__pTxDesc, 31, 1)
+
+#define SET_TX_DESC_PKT_SIZE_8192F(__pTxDesc, __Value) \
+	SET_BITS_TO_LE_4BYTE(__pTxDesc, 0, 16, __Value)
+#define SET_TX_DESC_OFFSET_8192F(__pTxDesc, __Value) \
+	SET_BITS_TO_LE_4BYTE(__pTxDesc, 16, 8, __Value)
+#define SET_TX_DESC_BMC_8192F(__pTxDesc, __Value) \
+	SET_BITS_TO_LE_4BYTE(__pTxDesc, 24, 1, __Value)
+#define SET_TX_DESC_HTC_8192F(__pTxDesc, __Value) \
+	SET_BITS_TO_LE_4BYTE(__pTxDesc, 25, 1, __Value)
+#define SET_TX_DESC_AMSDU_PAD_EN_8192F(__pTxDesc, __Value) \
+	SET_BITS_TO_LE_4BYTE(__pTxDesc, 27, 1, __Value)
+#define SET_TX_DESC_NO_ACM_8192F(__pTxDesc, __Value) \
+	SET_BITS_TO_LE_4BYTE(__pTxDesc, 29, 1, __Value)
+#define SET_TX_DESC_GF_8192F(__pTxDesc, __Value) \
+	SET_BITS_TO_LE_4BYTE(__pTxDesc, 30, 1, __Value)
+
+/* Dword 1 */
+#define SET_TX_DESC_MACID_8192F(__pTxDesc, __Value) \
+	SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 0, 7, __Value)
+#define SET_TX_DESC_QUEUE_SEL_8192F(__pTxDesc, __Value) \
+	SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 8, 5, __Value)
+#define SET_TX_DESC_RDG_NAV_EXT_8192F(__pTxDesc, __Value) \
+	SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 13, 1, __Value)
+#define SET_TX_DESC_LSIG_TXOP_EN_8192F(__pTxDesc, __Value) \
+	SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 14, 1, __Value)
+#define SET_TX_DESC_PIFS_8192F(__pTxDesc, __Value) \
+	SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 15, 1, __Value)
+#define SET_TX_DESC_RATE_ID_8192F(__pTxDesc, __Value) \
+	SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 16, 5, __Value)
+#define SET_TX_DESC_EN_DESC_ID_8192F(__pTxDesc, __Value) \
+	SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 21, 1, __Value)
+#define SET_TX_DESC_SEC_TYPE_8192F(__pTxDesc, __Value) \
+	SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 22, 2, __Value)
+#define SET_TX_DESC_PKT_OFFSET_8192F(__pTxDesc, __Value) \
+	SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 24, 5, __Value)
+#define SET_TX_DESC_MORE_DATA_8192F(__pTxDesc, __Value) \
+	SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 29, 1, __Value)
+
+/* Dword 2 ADD HW_DIG*/
+#define SET_TX_DESC_PAID_92F(__pTxDesc, __Value) \
+	SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 0, 9, __Value)
+#define SET_TX_DESC_CCA_RTS_8192F(__pTxDesc, __Value) \
+	SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 10, 2, __Value)
+#define SET_TX_DESC_AGG_ENABLE_8192F(__pTxDesc, __Value) \
+	SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 12, 1, __Value)
+#define SET_TX_DESC_RDG_ENABLE_8192F(__pTxDesc, __Value) \
+	SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 13, 1, __Value)
+#define SET_TX_DESC_NULL0_8192F(__pTxDesc, __Value) \
+	SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 14, 1, __Value)
+#define SET_TX_DESC_NULL1_8192F(__pTxDesc, __Value) \
+	SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 15, 1, __Value)
+#define SET_TX_DESC_BK_8192F(__pTxDesc, __Value) \
+	SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 16, 1, __Value)
+#define SET_TX_DESC_MORE_FRAG_8192F(__pTxDesc, __Value) \
+	SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 17, 1, __Value)
+#define SET_TX_DESC_RAW_8192F(__pTxDesc, __Value) \
+	SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 18, 1, __Value)
+#define SET_TX_DESC_CCX_8192F(__pTxDesc, __Value) \
+	SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 19, 1, __Value)
+#define SET_TX_DESC_AMPDU_DENSITY_8192F(__pTxDesc, __Value) \
+	SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 20, 3, __Value)
+#define SET_TX_DESC_BT_INT_8192F(__pTxDesc, __Value) \
+	SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 23, 1, __Value)
+#define SET_TX_DESC_HW_DIG_8192F(__pTxDesc, __Value) \
+	SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 24, 7, __Value)
+
+/* Dword 3 */
+#define SET_TX_DESC_HWSEQ_SEL_8192F(__pTxDesc, __Value) \
+	SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 6, 2, __Value)
+#define SET_TX_DESC_USE_RATE_8192F(__pTxDesc, __Value) \
+	SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 8, 1, __Value)
+#define SET_TX_DESC_DISABLE_RTS_FB_8192F(__pTxDesc, __Value) \
+	SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 9, 1, __Value)
+#define SET_TX_DESC_DISABLE_FB_8192F(__pTxDesc, __Value) \
+	SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 10, 1, __Value)
+#define SET_TX_DESC_CTS2SELF_8192F(__pTxDesc, __Value) \
+	SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 11, 1, __Value)
+#define SET_TX_DESC_RTS_ENABLE_8192F(__pTxDesc, __Value) \
+	SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 12, 1, __Value)
+#define SET_TX_DESC_HW_RTS_ENABLE_8192F(__pTxDesc, __Value) \
+	SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 13, 1, __Value)
+#define SET_TX_DESC_CHK_EN_92F(__pTxDesc, __Value) \
+	SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 14, 1, __Value)
+#define SET_TX_DESC_NAV_USE_HDR_8192F(__pTxDesc, __Value) \
+	SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 15, 1, __Value)
+#define SET_TX_DESC_USE_MAX_LEN_8192F(__pTxDesc, __Value) \
+	SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 16, 1, __Value)
+#define SET_TX_DESC_MAX_AGG_NUM_8192F(__pTxDesc, __Value) \
+	SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 17, 5, __Value)
+#define SET_TX_DESC_NDPA_8192F(__pTxDesc, __Value) \
+	SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 22, 2, __Value)
+#define SET_TX_DESC_AMPDU_MAX_TIME_8192F(__pTxDesc, __Value) \
+	SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 24, 8, __Value)
+
+/* Dword 4 */
+#define SET_TX_DESC_TX_RATE_8192F(__pTxDesc, __Value) \
+	SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 0, 7, __Value)
+#define SET_TX_DESC_TX_TRY_RATE_8192F(__pTxDesc, __Value) \
+	SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 7, 1, __Value)
+#define SET_TX_DESC_DATA_RATE_FB_LIMIT_8192F(__pTxDesc, __Value) \
+	SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 8, 5, __Value)
+#define SET_TX_DESC_RTS_RATE_FB_LIMIT_8192F(__pTxDesc, __Value) \
+	SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 13, 4, __Value)
+#define SET_TX_DESC_RETRY_LIMIT_ENABLE_8192F(__pTxDesc, __Value) \
+	SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 17, 1, __Value)
+#define SET_TX_DESC_DATA_RETRY_LIMIT_8192F(__pTxDesc, __Value) \
+	SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 18, 6, __Value)
+#define SET_TX_DESC_RTS_RATE_8192F(__pTxDesc, __Value) \
+	SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 24, 5, __Value)
+#define SET_TX_DESC_PCTS_EN_8192F(__pTxDesc, __Value) \
+	SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 29, 1, __Value)
+#define SET_TX_DESC_PCTS_MASK_IDX_8192F(__pTxDesc, __Value) \
+	SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 30, 2, __Value)
+
+/* Dword 5 */
+#define SET_TX_DESC_DATA_SC_8192F(__pTxDesc, __Value) \
+	SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 0, 4, __Value)
+#define SET_TX_DESC_DATA_SHORT_8192F(__pTxDesc, __Value) \
+	SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 4, 1, __Value)
+#define SET_TX_DESC_DATA_BW_8192F(__pTxDesc, __Value) \
+	SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 5, 2, __Value)
+#define SET_TX_DESC_DATA_LDPC_8192F(__pTxDesc, __Value) \
+	SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 7, 1, __Value)
+#define SET_TX_DESC_DATA_STBC_8192F(__pTxDesc, __Value) \
+	SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 8, 2, __Value)
+#define SET_TX_DESC_RTS_STBC_8192F(__pTxDesc, __Value) \
+	SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 10, 2, __Value)
+#define SET_TX_DESC_RTS_SHORT_8192F(__pTxDesc, __Value) \
+	SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 12, 1, __Value)
+#define SET_TX_DESC_RTS_SC_8192F(__pTxDesc, __Value) \
+	SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 13, 4, __Value)
+#define SET_TX_DESC_PORT_ID_8192F(__pTxDesc, __Value) \
+	SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 21, 1, __Value)
+#define SET_TX_DESC_DROP_ID_8192F(__pTxDesc, __Value) \
+	SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 22, 2, __Value)
+#define SET_TX_DESC_PATH_A_EN_8192F(__pTxDesc, __Value) \
+	SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 24, 1, __Value)
+#define SET_TX_DESC_PATH_B_EN_8192F(__pTxDesc, __Value) \
+	SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 25, 1, __Value)
+#define SET_TX_DESC_TXPWR_OF_SET_8192F(__pTxDesc, __Value) \
+	SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 28, 3, __Value)
+
+/* Dword 6 */
+#define SET_TX_DESC_SW_DEFINE_8192F(__pTxDesc, __Value) \
+	SET_BITS_TO_LE_4BYTE(__pTxDesc+24, 0, 12, __Value)
+#define SET_TX_DESC_MBSSID_8192F(__pTxDesc, __Value) \
+	SET_BITS_TO_LE_4BYTE(__pTxDesc+24, 12, 4, __Value)
+#define SET_TX_DESC_RF_SEL_8192F(__pTxDesc, __Value) \
+	SET_BITS_TO_LE_4BYTE(__pTxDesc+24, 16, 3, __Value)
+
+/* Dword 7 */
+#ifdef CONFIG_PCI_HCI
+#define SET_TX_DESC_TX_BUFFER_SIZE_8192F(__pTxDesc, __Value) \
+	SET_BITS_TO_LE_4BYTE(__pTxDesc+28, 0, 16, __Value)
+#endif
+
+#ifdef CONFIG_USB_HCI
+#define SET_TX_DESC_TX_DESC_CHECKSUM_8192F(__pTxDesc, __Value) \
+	SET_BITS_TO_LE_4BYTE(__pTxDesc+28, 0, 16, __Value)
+#endif
+
+#ifdef CONFIG_SDIO_HCI
+#define SET_TX_DESC_TX_TIMESTAMP_8192F(__pTxDesc, __Value) \
+	SET_BITS_TO_LE_4BYTE(__pTxDesc+28, 6, 18, __Value)
+#endif
+
+#define SET_TX_DESC_USB_TXAGG_NUM_8192F(__pTxDesc, __Value) \
+	SET_BITS_TO_LE_4BYTE(__pTxDesc+28, 24, 8, __Value)
+
+/* Dword 8 */
+#define SET_TX_DESC_RTS_RC_8192F(__pTxDesc, __Value) \
+	SET_BITS_TO_LE_4BYTE(__pTxDesc+32, 0, 6, __Value)
+#define SET_TX_DESC_BAR_RC_8192F(__pTxDesc, __Value) \
+	SET_BITS_TO_LE_4BYTE(__pTxDesc+32, 6, 2, __Value)
+#define SET_TX_DESC_DATA_RC_8192F(__pTxDesc, __Value) \
+	SET_BITS_TO_LE_4BYTE(__pTxDesc+32, 8, 6, __Value)
+#define SET_TX_DESC_HWSEQ_EN_8192F(__pTxDesc, __Value) \
+	SET_BITS_TO_LE_4BYTE(__pTxDesc+32, 15, 1, __Value)
+#define SET_TX_DESC_NEXTHEADPAGE_8192F(__pTxDesc, __Value) \
+	SET_BITS_TO_LE_4BYTE(__pTxDesc+32, 16, 8, __Value)
+#define SET_TX_DESC_TAILPAGE_8192F(__pTxDesc, __Value) \
+	SET_BITS_TO_LE_4BYTE(__pTxDesc+32, 24, 8, __Value)
+
+/* Dword 9 */
+#define SET_TX_DESC_PADDING_LEN_8192F(__pTxDesc, __Value) \
+	SET_BITS_TO_LE_4BYTE(__pTxDesc+36, 0, 11, __Value)
+#define SET_TX_DESC_SEQ_8192F(__pTxDesc, __Value) \
+	SET_BITS_TO_LE_4BYTE(__pTxDesc+36, 12, 12, __Value)
+#define SET_TX_DESC_FINAL_DATA_RATE_8192F(__pTxDesc, __Value) \
+	SET_BITS_TO_LE_4BYTE(__pTxDesc+36, 24, 8, __Value)
+
+
+#define SET_EARLYMODE_PKTNUM_8192F(__pAddr, __Value)					SET_BITS_TO_LE_4BYTE(__pAddr, 0, 4, __Value)
+#define SET_EARLYMODE_LEN0_8192F(__pAddr, __Value)					SET_BITS_TO_LE_4BYTE(__pAddr, 4, 15, __Value)
+#define SET_EARLYMODE_LEN1_1_8192F(__pAddr, __Value)					SET_BITS_TO_LE_4BYTE(__pAddr, 19, 13, __Value)
+#define SET_EARLYMODE_LEN1_2_8192F(__pAddr, __Value)					SET_BITS_TO_LE_4BYTE(__pAddr+4, 0, 2, __Value)
+#define SET_EARLYMODE_LEN2_8192F(__pAddr, __Value)					SET_BITS_TO_LE_4BYTE(__pAddr+4, 2, 15,	__Value)
+#define SET_EARLYMODE_LEN3_8192F(__pAddr, __Value)					SET_BITS_TO_LE_4BYTE(__pAddr+4, 17, 15, __Value)
+
+
+/*-----------------------------------------------------------------*/
+/*	RTL8192F TX BUFFER DESC                                      */
+/*-----------------------------------------------------------------*/
+#ifdef CONFIG_64BIT_DMA
+	#define SET_TXBUFFER_DESC_LEN_WITH_OFFSET(__pTxDesc, __Offset, __Valeu) SET_BITS_TO_LE_4BYTE(__pTxDesc+((__Offset)*16), 0, 16, __Valeu)
+	#define SET_TXBUFFER_DESC_AMSDU_WITH_OFFSET(__pTxDesc, __Offset, __Valeu) SET_BITS_TO_LE_4BYTE(__pTxDesc+((__Offset)*16), 31, 1, __Valeu)
+	#define SET_TXBUFFER_DESC_ADD_LOW_WITH_OFFSET(__pTxDesc, __Offset, __Valeu) SET_BITS_TO_LE_4BYTE(__pTxDesc+((__Offset)*16)+4, 0, 32, __Valeu)
+	#define SET_TXBUFFER_DESC_ADD_HIGT_WITH_OFFSET(__pTxDesc, __Offset, __Valeu) SET_BITS_TO_LE_4BYTE(__pTxDesc+((__Offset)*16)+8, 0, 32, __Valeu)
+#else
+	#define SET_TXBUFFER_DESC_LEN_WITH_OFFSET(__pTxDesc, __Offset, __Valeu) SET_BITS_TO_LE_4BYTE(__pTxDesc+(__Offset*8), 0, 16, __Valeu)
+	#define SET_TXBUFFER_DESC_AMSDU_WITH_OFFSET(__pTxDesc, __Offset, __Valeu) SET_BITS_TO_LE_4BYTE(__pTxDesc+(__Offset*8), 31, 1, __Valeu)
+	#define SET_TXBUFFER_DESC_ADD_LOW_WITH_OFFSET(__pTxDesc, __Offset, __Valeu) SET_BITS_TO_LE_4BYTE(__pTxDesc+(__Offset*8)+4, 0, 32, __Valeu)
+	#define SET_TXBUFFER_DESC_ADD_HIGT_WITH_OFFSET(__pTxDesc, __Offset, __Valeu)	/* 64 BIT mode only */
+#endif
+/* ********************************************************* */
+
+/* 64 bits  -- 32 bits */
+/* =======     ======= */
+/* Dword 0     0 */
+#define SET_TX_BUFF_DESC_LEN_0_8192F(__pTxDesc, __Valeu) SET_BITS_TO_LE_4BYTE(__pTxDesc, 0, 14, __Valeu)
+#define SET_TX_BUFF_DESC_PSB_8192F(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 16, 15, __Value)
+#define SET_TX_BUFF_DESC_OWN_8192F(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 31, 1, __Value)
+
+/* Dword 1     1 */
+#define SET_TX_BUFF_DESC_ADDR_LOW_0_8192F(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 0, 32, __Value)
+#define GET_TX_BUFF_DESC_ADDR_LOW_0_8192F(__pTxDesc) LE_BITS_TO_4BYTE(__pTxDesc+4, 0, 32)
+/* Dword 2     NA */
+#define SET_TX_BUFF_DESC_ADDR_HIGH_0_8192F(__pTxDesc, __Value) SET_TXBUFFER_DESC_ADD_HIGT_WITH_OFFSET(__pTxDesc, 0, __Value)
+#ifdef CONFIG_64BIT_DMA
+	#define GET_TX_BUFF_DESC_ADDR_HIGH_0_8192F(__pTxDesc) LE_BITS_TO_4BYTE(__pTxDesc+8, 0, 32)
+#else
+	#define GET_TX_BUFF_DESC_ADDR_HIGH_0_8192F(__pTxDesc) 0
+#endif
+/* Dword 3     NA */
+/* RESERVED 0 */
+/* Dword 4     2 */
+#define SET_TX_BUFF_DESC_LEN_1_8192F(__pTxDesc, __Value) SET_TXBUFFER_DESC_LEN_WITH_OFFSET(__pTxDesc, 1, __Value)
+#define SET_TX_BUFF_DESC_AMSDU_1_8192F(__pTxDesc, __Value) SET_TXBUFFER_DESC_AMSDU_WITH_OFFSET(__pTxDesc, 1, __Value)
+/* Dword 5     3 */
+#define SET_TX_BUFF_DESC_ADDR_LOW_1_8192F(__pTxDesc, __Value) SET_TXBUFFER_DESC_ADD_LOW_WITH_OFFSET(__pTxDesc, 1, __Value)
+/* Dword 6     NA */
+#define SET_TX_BUFF_DESC_ADDR_HIGH_1_8192F(__pTxDesc, __Value) SET_TXBUFFER_DESC_ADD_HIGT_WITH_OFFSET(__pTxDesc, 1, __Value)
+/* Dword 7     NA */
+/*RESERVED 0 */
+/* Dword 8     4 */
+#define SET_TX_BUFF_DESC_LEN_2_8192F(__pTxDesc, __Value) SET_TXBUFFER_DESC_LEN_WITH_OFFSET(__pTxDesc, 2, __Value)
+#define SET_TX_BUFF_DESC_AMSDU_2_8192F(__pTxDesc, __Value) SET_TXBUFFER_DESC_AMSDU_WITH_OFFSET(__pTxDesc, 2, __Value)
+/* Dword 9     5 */
+#define SET_TX_BUFF_DESC_ADDR_LOW_2_8192F(__pTxDesc, __Value) SET_TXBUFFER_DESC_ADD_LOW_WITH_OFFSET(__pTxDesc, 2, __Value)
+/* Dword 10    NA */
+#define SET_TX_BUFF_DESC_ADDR_HIGH_2_8192F(__pTxDesc, __Value) SET_TXBUFFER_DESC_ADD_HIGT_WITH_OFFSET(__pTxDesc, 2, __Value)
+/* Dword 11    NA */
+/*RESERVED 0 */
+/* Dword 12    6 */
+#define SET_TX_BUFF_DESC_LEN_3_8192F(__pTxDesc, __Value) SET_TXBUFFER_DESC_LEN_WITH_OFFSET(__pTxDesc, 3, __Value)
+#define SET_TX_BUFF_DESC_AMSDU_3_8192F(__pTxDesc, __Value) SET_TXBUFFER_DESC_AMSDU_WITH_OFFSET(__pTxDesc, 3, __Value)
+/* Dword 13    7 */
+#define SET_TX_BUFF_DESC_ADDR_LOW_3_8192F(__pTxDesc, __Value) SET_TXBUFFER_DESC_ADD_LOW_WITH_OFFSET(__pTxDesc, 3, __Value)
+/* Dword 14    NA */
+#define SET_TX_BUFF_DESC_ADDR_HIGH_3_8192F(__pTxDesc, __Value) SET_TXBUFFER_DESC_ADD_HIGT_WITH_OFFSET(__pTxDesc, 3, __Value)
+/* Dword 15    NA */
+/*RESERVED 0 */
+
+
+#endif
+/* -----------------------------------------------------------
+ *
+ *	Rate
+ *
+ * -----------------------------------------------------------
+ * CCK Rates, TxHT = 0 */
+#define DESC8192F_RATE1M				0x00
+#define DESC8192F_RATE2M				0x01
+#define DESC8192F_RATE5_5M				0x02
+#define DESC8192F_RATE11M				0x03
+
+/* OFDM Rates, TxHT = 0 */
+#define DESC8192F_RATE6M				0x04
+#define DESC8192F_RATE9M				0x05
+#define DESC8192F_RATE12M				0x06
+#define DESC8192F_RATE18M				0x07
+#define DESC8192F_RATE24M				0x08
+#define DESC8192F_RATE36M				0x09
+#define DESC8192F_RATE48M				0x0a
+#define DESC8192F_RATE54M				0x0b
+
+/* MCS Rates, TxHT = 1 */
+#define DESC8192F_RATEMCS0				0x0c
+#define DESC8192F_RATEMCS1				0x0d
+#define DESC8192F_RATEMCS2				0x0e
+#define DESC8192F_RATEMCS3				0x0f
+#define DESC8192F_RATEMCS4				0x10
+#define DESC8192F_RATEMCS5				0x11
+#define DESC8192F_RATEMCS6				0x12
+#define DESC8192F_RATEMCS7				0x13
+#define DESC8192F_RATEMCS8				0x14
+#define DESC8192F_RATEMCS9				0x15
+#define DESC8192F_RATEMCS10		0x16
+#define DESC8192F_RATEMCS11		0x17
+#define DESC8192F_RATEMCS12		0x18
+#define DESC8192F_RATEMCS13		0x19
+#define DESC8192F_RATEMCS14		0x1a
+#define DESC8192F_RATEMCS15		0x1b
+#define DESC8192F_RATEVHTSS1MCS0		0x2c
+#define DESC8192F_RATEVHTSS1MCS1		0x2d
+#define DESC8192F_RATEVHTSS1MCS2		0x2e
+#define DESC8192F_RATEVHTSS1MCS3		0x2f
+#define DESC8192F_RATEVHTSS1MCS4		0x30
+#define DESC8192F_RATEVHTSS1MCS5		0x31
+#define DESC8192F_RATEVHTSS1MCS6		0x32
+#define DESC8192F_RATEVHTSS1MCS7		0x33
+#define DESC8192F_RATEVHTSS1MCS8		0x34
+#define DESC8192F_RATEVHTSS1MCS9		0x35
+#define DESC8192F_RATEVHTSS2MCS0		0x36
+#define DESC8192F_RATEVHTSS2MCS1		0x37
+#define DESC8192F_RATEVHTSS2MCS2		0x38
+#define DESC8192F_RATEVHTSS2MCS3		0x39
+#define DESC8192F_RATEVHTSS2MCS4		0x3a
+#define DESC8192F_RATEVHTSS2MCS5		0x3b
+#define DESC8192F_RATEVHTSS2MCS6		0x3c
+#define DESC8192F_RATEVHTSS2MCS7		0x3d
+#define DESC8192F_RATEVHTSS2MCS8		0x3e
+#define DESC8192F_RATEVHTSS2MCS9		0x3f
+
+
+#define	RX_HAL_IS_CCK_RATE_8192F(pDesc)\
+	(GET_RX_STATUS_DESC_RX_RATE_8192F(pDesc) == DESC8192F_RATE1M || \
+	 GET_RX_STATUS_DESC_RX_RATE_8192F(pDesc) == DESC8192F_RATE2M || \
+	 GET_RX_STATUS_DESC_RX_RATE_8192F(pDesc) == DESC8192F_RATE5_5M || \
+	 GET_RX_STATUS_DESC_RX_RATE_8192F(pDesc) == DESC8192F_RATE11M)
+
+#ifdef CONFIG_TRX_BD_ARCH
+	struct tx_desc;
+#endif
+
+void rtl8192f_cal_txdesc_chksum(struct tx_desc *ptxdesc);
+void rtl8192f_update_txdesc(struct xmit_frame *pxmitframe, u8 *pmem);
+void rtl8192f_fill_txdesc_sectype(struct pkt_attrib *pattrib, struct tx_desc *ptxdesc);
+void rtl8192f_fill_txdesc_vcs(PADAPTER padapter, struct pkt_attrib *pattrib, struct tx_desc *ptxdesc);
+void rtl8192f_fill_txdesc_phy(PADAPTER padapter, struct pkt_attrib *pattrib, struct tx_desc *ptxdesc);
+void rtl8192f_fill_fake_txdesc(PADAPTER padapter, u8 *pDesc, u32 BufferLen, u8 IsPsPoll, u8 IsBTQosNull, u8 bDataFrame);
+
+#if defined(CONFIG_CONCURRENT_MODE)
+	void fill_txdesc_force_bmc_camid(struct pkt_attrib *pattrib, u8 *ptxdesc);
+#endif
+void fill_txdesc_bmc_tx_rate(struct pkt_attrib *pattrib, u8 *ptxdesc);
+
+#if defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI)
+	s32 rtl8192fs_init_xmit_priv(PADAPTER padapter);
+	void rtl8192fs_free_xmit_priv(PADAPTER padapter);
+	s32 rtl8192fs_hal_xmit(PADAPTER padapter, struct xmit_frame *pxmitframe);
+	s32 rtl8192fs_mgnt_xmit(PADAPTER padapter, struct xmit_frame *pmgntframe);
+	s32	rtl8192fs_hal_xmitframe_enqueue(_adapter *padapter, struct xmit_frame *pxmitframe);
+	s32 rtl8192fs_xmit_buf_handler(PADAPTER padapter);
+	thread_return rtl8192fs_xmit_thread(thread_context context);
+	#define hal_xmit_handler rtl8192fs_xmit_buf_handler
+#endif
+
+#ifdef CONFIG_USB_HCI
+	s32 rtl8192fu_init_xmit_priv(PADAPTER padapter);
+	void rtl8192fu_free_xmit_priv(PADAPTER padapter);
+	s32 rtl8192fu_hal_xmit(PADAPTER padapter, struct xmit_frame *pxmitframe);
+	s32 rtl8192fu_mgnt_xmit(PADAPTER padapter, struct xmit_frame *pmgntframe);
+	s32	 rtl8192fu_hal_xmitframe_enqueue(_adapter *padapter, struct xmit_frame *pxmitframe);
+	s32 rtl8192fu_xmit_buf_handler(PADAPTER padapter);
+	#define hal_xmit_handler rtl8192fu_xmit_buf_handler
+	void rtl8192fu_xmit_tasklet(void *priv);
+	s32 rtl8192fu_xmitframe_complete(_adapter *padapter, struct xmit_priv *pxmitpriv, struct xmit_buf *pxmitbuf);
+	void _dbg_dump_tx_info(_adapter	*padapter,int frame_tag,struct tx_desc *ptxdesc);
+#endif
+
+#ifdef CONFIG_PCI_HCI
+	s32 rtl8192fe_init_xmit_priv(PADAPTER padapter);
+	void rtl8192fe_free_xmit_priv(PADAPTER padapter);
+	struct xmit_buf *rtl8192fe_dequeue_xmitbuf(struct rtw_tx_ring *ring);
+	void    rtl8192fe_xmitframe_resume(_adapter *padapter);
+	s32 rtl8192fe_hal_xmit(PADAPTER padapter, struct xmit_frame *pxmitframe);
+	s32 rtl8192fe_mgnt_xmit(PADAPTER padapter, struct xmit_frame *pmgntframe);
+	s32     rtl8192fe_hal_xmitframe_enqueue(_adapter *padapter, struct xmit_frame *pxmitframe);
+	void rtl8192fe_xmit_tasklet(void *priv);
+#endif
+
+u8	BWMapping_8192F(PADAPTER Adapter, struct pkt_attrib *pattrib);
+u8	SCMapping_8192F(PADAPTER Adapter, struct pkt_attrib	*pattrib);
+
+#endif
diff --git a/rtl8723DS/include/rtl8703b_cmd.h b/rtl8723DS/include/rtl8703b_cmd.h
index 43f7a88..dd0439b 100755..100644
--- a/rtl8723DS/include/rtl8703b_cmd.h
+++ b/rtl8723DS/include/rtl8703b_cmd.h
@@ -113,7 +113,6 @@ enum h2c_cmd_8703B {
 #define SET_8703B_H2CCMD_PWRMODE_PARM_ALL_QUEUE_UAPSD(__pH2CCmd, __Value)	SET_BITS_TO_LE_1BYTE((__pH2CCmd)+3, 0, 8, __Value)
 #define SET_8703B_H2CCMD_PWRMODE_PARM_BCN_EARLY_C2H_RPT(__pH2CCmd, __Value)	SET_BITS_TO_LE_1BYTE((__pH2CCmd)+3, 2, 1, __Value)
 #define SET_8703B_H2CCMD_PWRMODE_PARM_PWR_STATE(__pH2CCmd, __Value)			SET_BITS_TO_LE_1BYTE((__pH2CCmd)+4, 0, 8, __Value)
-#define SET_8703B_H2CCMD_PWRMODE_PARM_BYTE5(__pH2CCmd, __Value)				SET_BITS_TO_LE_1BYTE((__pH2CCmd)+5, 0, 8, __Value)
 
 #define GET_8703B_H2CCMD_PWRMODE_PARM_MODE(__pH2CCmd)					LE_BITS_TO_1BYTE(__pH2CCmd, 0, 8)
 
@@ -177,7 +176,6 @@ enum h2c_cmd_8703B {
 /* host message to firmware cmd */
 void rtl8703b_set_FwPwrMode_cmd(PADAPTER padapter, u8 Mode);
 void rtl8703b_set_FwJoinBssRpt_cmd(PADAPTER padapter, u8 mstatus);
-void rtl8703b_set_rssi_cmd(PADAPTER padapter, u8 *param);
 void rtl8703b_fw_try_ap_cmd(PADAPTER padapter, u32 need_ack);
 /* s32 rtl8703b_set_lowpwr_lps_cmd(PADAPTER padapter, u8 enable); */
 void rtl8703b_set_FwPsTuneParam_cmd(PADAPTER padapter);
diff --git a/rtl8723DS/include/rtl8703b_dm.h b/rtl8723DS/include/rtl8703b_dm.h
index 912c7da..912c7da 100755..100644
--- a/rtl8723DS/include/rtl8703b_dm.h
+++ b/rtl8723DS/include/rtl8703b_dm.h
diff --git a/rtl8723DS/include/rtl8703b_hal.h b/rtl8723DS/include/rtl8703b_hal.h
index dfc9b6d..f75cc30 100755..100644
--- a/rtl8723DS/include/rtl8703b_hal.h
+++ b/rtl8723DS/include/rtl8703b_hal.h
@@ -106,18 +106,10 @@ typedef struct _RT_8703B_FIRMWARE_HDR {
 /* Note: We will divide number of page equally for each queue other than public queue! */
 
 /* For General Reserved Page Number(Beacon Queue is reserved page)
- * Beacon:2, PS-Poll:1, Null Data:1,Qos Null Data:1,BT Qos Null Data:1 */
-#define BCNQ_PAGE_NUM_8703B		0x08
-#ifdef CONFIG_CONCURRENT_MODE
-	#define BCNQ1_PAGE_NUM_8703B		0x08 /* 0x04 */
-#else
-	#define BCNQ1_PAGE_NUM_8703B		0x00
-#endif
+ * Beacon:MAX_BEACON_LEN/PAGE_SIZE_TX_8703B
+ * PS-Poll:1, Null Data:1,Qos Null Data:1,BT Qos Null Data:1,CTS-2-SELF,LTE QoS Null*/
 
-#ifdef CONFIG_PNO_SUPPORT
-	#undef BCNQ1_PAGE_NUM_8703B
-	#define BCNQ1_PAGE_NUM_8703B		0x00 /* 0x04 */
-#endif
+#define BCNQ_PAGE_NUM_8703B		(MAX_BEACON_LEN/PAGE_SIZE_TX_8703B + 6) /*0x08*/
 
 /* For WoWLan , more reserved page
  * ARP Rsp:1, RWC:1, GTK Info:1,GTK RSP:2,GTK EXT MEM:2, AOAC rpt: 1 PNO: 6
@@ -138,7 +130,7 @@ typedef struct _RT_8703B_FIRMWARE_HDR {
 	#define AP_WOWLAN_PAGE_NUM_8703B	0x02
 #endif
 
-#define TX_TOTAL_PAGE_NUMBER_8703B	(0xFF - BCNQ_PAGE_NUM_8703B - BCNQ1_PAGE_NUM_8703B - WOWLAN_PAGE_NUM_8703B)
+#define TX_TOTAL_PAGE_NUMBER_8703B	(0xFF - BCNQ_PAGE_NUM_8703B - WOWLAN_PAGE_NUM_8703B)
 #define TX_PAGE_BOUNDARY_8703B		(TX_TOTAL_PAGE_NUMBER_8703B + 1)
 
 #define WMM_NORMAL_TX_TOTAL_PAGE_NUMBER_8703B	TX_TOTAL_PAGE_NUMBER_8703B
diff --git a/rtl8723DS/include/rtl8703b_led.h b/rtl8723DS/include/rtl8703b_led.h
index 99e590d..99e590d 100755..100644
--- a/rtl8723DS/include/rtl8703b_led.h
+++ b/rtl8723DS/include/rtl8703b_led.h
diff --git a/rtl8723DS/include/rtl8703b_recv.h b/rtl8723DS/include/rtl8703b_recv.h
index e796e6e..e796e6e 100755..100644
--- a/rtl8723DS/include/rtl8703b_recv.h
+++ b/rtl8723DS/include/rtl8703b_recv.h
diff --git a/rtl8723DS/include/rtl8703b_rf.h b/rtl8723DS/include/rtl8703b_rf.h
index 8d980a8..8d980a8 100755..100644
--- a/rtl8723DS/include/rtl8703b_rf.h
+++ b/rtl8723DS/include/rtl8703b_rf.h
diff --git a/rtl8723DS/include/rtl8703b_spec.h b/rtl8723DS/include/rtl8703b_spec.h
index 633b23b..633b23b 100755..100644
--- a/rtl8723DS/include/rtl8703b_spec.h
+++ b/rtl8723DS/include/rtl8703b_spec.h
diff --git a/rtl8723DS/include/rtl8703b_sreset.h b/rtl8723DS/include/rtl8703b_sreset.h
index 5fe53cf..5fe53cf 100755..100644
--- a/rtl8723DS/include/rtl8703b_sreset.h
+++ b/rtl8723DS/include/rtl8703b_sreset.h
diff --git a/rtl8723DS/include/rtl8703b_xmit.h b/rtl8723DS/include/rtl8703b_xmit.h
index 2bcd5a7..40c7bb2 100755..100644
--- a/rtl8723DS/include/rtl8703b_xmit.h
+++ b/rtl8723DS/include/rtl8703b_xmit.h
@@ -184,13 +184,14 @@
 	#define SET_TX_DESC_ANTSEL_D_8703B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+24, 25, 3, __Value)
 
 	/* Dword 7 */
-	#if (DEV_BUS_TYPE == RT_PCI_INTERFACE)
+	#ifdef CONFIG_PCI_HCI
 		#define SET_TX_DESC_TX_BUFFER_SIZE_8703B(__pTxDesc, __Value)		SET_BITS_TO_LE_4BYTE(__pTxDesc+28, 0, 16, __Value)
-	#else
+	#endif /*CONFIG_PCI_HCI*/
+	#if defined(CONFIG_SDIO_HCI) || defined(CONFIG_USB_HCI)
 		#define SET_TX_DESC_TX_DESC_CHECKSUM_8703B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+28, 0, 16, __Value)
 	#endif
 	#define SET_TX_DESC_USB_TXAGG_NUM_8703B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+28, 24, 8, __Value)
-	#if (DEV_BUS_TYPE == RT_SDIO_INTERFACE)
+	#ifdef CONFIG_SDIO_HCI
 		#define SET_TX_DESC_SDIO_TXSEQ_8703B(__pTxDesc, __Value)			SET_BITS_TO_LE_4BYTE(__pTxDesc+28, 16, 8, __Value)
 	#endif
 
diff --git a/rtl8723DS/include/rtl8710b_cmd.h b/rtl8723DS/include/rtl8710b_cmd.h
new file mode 100644
index 0000000..8b2e8fa
--- a/dev/null
+++ b/rtl8723DS/include/rtl8710b_cmd.h
@@ -0,0 +1,175 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2007 - 2017 Realtek Corporation.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ *****************************************************************************/
+#ifndef __RTL8710B_CMD_H__
+#define __RTL8710B_CMD_H__
+
+/* ---------------------------------------------------------------------------------------------------------
+ * ----------------------------------    H2C CMD DEFINITION    ------------------------------------------------
+ * --------------------------------------------------------------------------------------------------------- */
+
+enum h2c_cmd_8710B {
+	/* Common Class: 000 */
+	H2C_8710B_RSVD_PAGE = 0x00,
+	H2C_8710B_MEDIA_STATUS_RPT = 0x01,
+	H2C_8710B_SCAN_ENABLE = 0x02,
+	H2C_8710B_KEEP_ALIVE = 0x03,
+	H2C_8710B_DISCON_DECISION = 0x04,
+	H2C_8710B_PSD_OFFLOAD = 0x05,
+	H2C_8710B_AP_OFFLOAD = 0x08,
+	H2C_8710B_BCN_RSVDPAGE = 0x09,
+	H2C_8710B_PROBERSP_RSVDPAGE = 0x0A,
+	H2C_8710B_FCS_RSVDPAGE = 0x10,
+	H2C_8710B_FCS_INFO = 0x11,
+	H2C_8710B_AP_WOW_GPIO_CTRL = 0x13,
+
+	/* PoweSave Class: 001 */
+	H2C_8710B_SET_PWR_MODE = 0x20,
+	H2C_8710B_PS_TUNING_PARA = 0x21,
+	H2C_8710B_PS_TUNING_PARA2 = 0x22,
+	H2C_8710B_P2P_LPS_PARAM = 0x23,
+	H2C_8710B_P2P_PS_OFFLOAD = 0x24,
+	H2C_8710B_PS_SCAN_ENABLE = 0x25,
+	H2C_8710B_SAP_PS_ = 0x26,
+	H2C_8710B_INACTIVE_PS_ = 0x27, /* Inactive_PS */
+	H2C_8710B_FWLPS_IN_IPS_ = 0x28,
+
+	/* Dynamic Mechanism Class: 010 */
+	H2C_8710B_MACID_CFG = 0x40,
+	H2C_8710B_TXBF = 0x41,
+	H2C_8710B_RSSI_SETTING = 0x42,
+	H2C_8710B_AP_REQ_TXRPT = 0x43,
+	H2C_8710B_INIT_RATE_COLLECT = 0x44,
+	H2C_8710B_RA_PARA_ADJUST = 0x46,
+
+	/* WOWLAN Class: 100 */
+	H2C_8710B_WOWLAN = 0x80,
+	H2C_8710B_REMOTE_WAKE_CTRL = 0x81,
+	H2C_8710B_AOAC_GLOBAL_INFO = 0x82,
+	H2C_8710B_AOAC_RSVD_PAGE = 0x83,
+	H2C_8710B_AOAC_RSVD_PAGE2 = 0x84,
+	H2C_8710B_D0_SCAN_OFFLOAD_CTRL = 0x85,
+	H2C_8710B_D0_SCAN_OFFLOAD_INFO = 0x86,
+	H2C_8710B_CHNL_SWITCH_OFFLOAD = 0x87,
+	H2C_8710B_P2P_OFFLOAD_RSVD_PAGE = 0x8A,
+	H2C_8710B_P2P_OFFLOAD = 0x8B,
+
+	H2C_8710B_RESET_TSF = 0xC0,
+	H2C_8710B_MAXID,
+};
+
+/* ---------------------------------------------------------------------------------------------------------
+ * ----------------------------------    H2C CMD CONTENT    --------------------------------------------------
+ * ---------------------------------------------------------------------------------------------------------
+ * _RSVDPAGE_LOC_CMD_0x00 */
+#define SET_8710B_H2CCMD_RSVDPAGE_LOC_PROBE_RSP(__pH2CCmd, __Value)			SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 8, __Value)
+#define SET_8710B_H2CCMD_RSVDPAGE_LOC_PSPOLL(__pH2CCmd, __Value)				SET_BITS_TO_LE_1BYTE((__pH2CCmd)+1, 0, 8, __Value)
+#define SET_8710B_H2CCMD_RSVDPAGE_LOC_NULL_DATA(__pH2CCmd, __Value)			SET_BITS_TO_LE_1BYTE((__pH2CCmd)+2, 0, 8, __Value)
+#define SET_8710B_H2CCMD_RSVDPAGE_LOC_QOS_NULL_DATA(__pH2CCmd, __Value)		SET_BITS_TO_LE_1BYTE((__pH2CCmd)+3, 0, 8, __Value)
+#define SET_8710B_H2CCMD_RSVDPAGE_LOC_BT_QOS_NULL_DATA(__pH2CCmd, __Value)	SET_BITS_TO_LE_1BYTE((__pH2CCmd)+4, 0, 8, __Value)
+
+/* _PWR_MOD_CMD_0x20 */
+#define SET_8710B_H2CCMD_PWRMODE_PARM_MODE(__pH2CCmd, __Value)				SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 8, __Value)
+#define SET_8710B_H2CCMD_PWRMODE_PARM_RLBM(__pH2CCmd, __Value)				SET_BITS_TO_LE_1BYTE((__pH2CCmd)+1, 0, 4, __Value)
+#define SET_8710B_H2CCMD_PWRMODE_PARM_SMART_PS(__pH2CCmd, __Value)			SET_BITS_TO_LE_1BYTE((__pH2CCmd)+1, 4, 4, __Value)
+#define SET_8710B_H2CCMD_PWRMODE_PARM_BCN_PASS_TIME(__pH2CCmd, __Value)		SET_BITS_TO_LE_1BYTE((__pH2CCmd)+2, 0, 8, __Value)
+#define SET_8710B_H2CCMD_PWRMODE_PARM_ALL_QUEUE_UAPSD(__pH2CCmd, __Value)	SET_BITS_TO_LE_1BYTE((__pH2CCmd)+3, 0, 8, __Value)
+#define SET_8710B_H2CCMD_PWRMODE_PARM_BCN_EARLY_C2H_RPT(__pH2CCmd, __Value)	SET_BITS_TO_LE_1BYTE((__pH2CCmd)+3, 2, 1, __Value)
+#define SET_8710B_H2CCMD_PWRMODE_PARM_PWR_STATE(__pH2CCmd, __Value)			SET_BITS_TO_LE_1BYTE((__pH2CCmd)+4, 0, 8, __Value)
+
+#define GET_8710B_H2CCMD_PWRMODE_PARM_MODE(__pH2CCmd)					LE_BITS_TO_1BYTE(__pH2CCmd, 0, 8)
+
+/* _PS_TUNE_PARAM_CMD_0x21 */
+#define SET_8710B_H2CCMD_PSTUNE_PARM_BCN_TO_LIMIT(__pH2CCmd, __Value)			SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 8, __Value)
+#define SET_8710B_H2CCMD_PSTUNE_PARM_DTIM_TIMEOUT(__pH2CCmd, __Value)			SET_BITS_TO_LE_1BYTE(__pH2CCmd+1, 0, 8, __Value)
+#define SET_8710B_H2CCMD_PSTUNE_PARM_ADOPT(__pH2CCmd, __Value)			SET_BITS_TO_LE_1BYTE(__pH2CCmd+2, 0, 1, __Value)
+#define SET_8710B_H2CCMD_PSTUNE_PARM_PS_TIMEOUT(__pH2CCmd, __Value)			SET_BITS_TO_LE_1BYTE(__pH2CCmd+2, 1, 7, __Value)
+#define SET_8710B_H2CCMD_PSTUNE_PARM_DTIM_PERIOD(__pH2CCmd, __Value)			SET_BITS_TO_LE_1BYTE(__pH2CCmd+3, 0, 8, __Value)
+
+/* _MACID_CFG_CMD_0x40 */
+#define SET_8710B_H2CCMD_MACID_CFG_MACID(__pH2CCmd, __Value)		SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 8, __Value)
+#define SET_8710B_H2CCMD_MACID_CFG_RAID(__pH2CCmd, __Value)		SET_BITS_TO_LE_1BYTE(__pH2CCmd+1, 0, 5, __Value)
+#define SET_8710B_H2CCMD_MACID_CFG_SGI_EN(__pH2CCmd, __Value)		SET_BITS_TO_LE_1BYTE(__pH2CCmd+1, 7, 1, __Value)
+#define SET_8710B_H2CCMD_MACID_CFG_BW(__pH2CCmd, __Value)		SET_BITS_TO_LE_1BYTE(__pH2CCmd+2, 0, 2, __Value)
+#define SET_8710B_H2CCMD_MACID_CFG_NO_UPDATE(__pH2CCmd, __Value)		SET_BITS_TO_LE_1BYTE(__pH2CCmd+2, 3, 1, __Value)
+#define SET_8710B_H2CCMD_MACID_CFG_VHT_EN(__pH2CCmd, __Value)		SET_BITS_TO_LE_1BYTE(__pH2CCmd+2, 4, 2, __Value)
+#define SET_8710B_H2CCMD_MACID_CFG_DISPT(__pH2CCmd, __Value)		SET_BITS_TO_LE_1BYTE(__pH2CCmd+2, 6, 1, __Value)
+#define SET_8710B_H2CCMD_MACID_CFG_DISRA(__pH2CCmd, __Value)		SET_BITS_TO_LE_1BYTE(__pH2CCmd+2, 7, 1, __Value)
+#define SET_8710B_H2CCMD_MACID_CFG_RATE_MASK0(__pH2CCmd, __Value)		SET_BITS_TO_LE_1BYTE(__pH2CCmd+3, 0, 8, __Value)
+#define SET_8710B_H2CCMD_MACID_CFG_RATE_MASK1(__pH2CCmd, __Value)		SET_BITS_TO_LE_1BYTE(__pH2CCmd+4, 0, 8, __Value)
+#define SET_8710B_H2CCMD_MACID_CFG_RATE_MASK2(__pH2CCmd, __Value)		SET_BITS_TO_LE_1BYTE(__pH2CCmd+5, 0, 8, __Value)
+#define SET_8710B_H2CCMD_MACID_CFG_RATE_MASK3(__pH2CCmd, __Value)		SET_BITS_TO_LE_1BYTE(__pH2CCmd+6, 0, 8, __Value)
+
+/* _RSSI_SETTING_CMD_0x42 */
+#define SET_8710B_H2CCMD_RSSI_SETTING_MACID(__pH2CCmd, __Value)		SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 8, __Value)
+#define SET_8710B_H2CCMD_RSSI_SETTING_RSSI(__pH2CCmd, __Value)		SET_BITS_TO_LE_1BYTE(__pH2CCmd+2, 0, 7, __Value)
+#define SET_8710B_H2CCMD_RSSI_SETTING_ULDL_STATE(__pH2CCmd, __Value)		SET_BITS_TO_LE_1BYTE(__pH2CCmd+3, 0, 8, __Value)
+
+/* _AP_REQ_TXRPT_CMD_0x43 */
+#define SET_8710B_H2CCMD_APREQRPT_PARM_MACID1(__pH2CCmd, __Value)		SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 8, __Value)
+#define SET_8710B_H2CCMD_APREQRPT_PARM_MACID2(__pH2CCmd, __Value)		SET_BITS_TO_LE_1BYTE(__pH2CCmd+1, 0, 8, __Value)
+
+/* _FORCE_BT_TXPWR_CMD_0x62 */
+#define SET_8710B_H2CCMD_BT_PWR_IDX(__pH2CCmd, __Value)							SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 8, __Value)
+
+/* _FORCE_BT_MP_OPER_CMD_0x67 */
+#define SET_8710B_H2CCMD_BT_MPOPER_VER(__pH2CCmd, __Value)							SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 4, __Value)
+#define SET_8710B_H2CCMD_BT_MPOPER_REQNUM(__pH2CCmd, __Value)							SET_BITS_TO_LE_1BYTE(__pH2CCmd, 4, 4, __Value)
+#define SET_8710B_H2CCMD_BT_MPOPER_IDX(__pH2CCmd, __Value)							SET_BITS_TO_LE_1BYTE(__pH2CCmd+1, 0, 8, __Value)
+#define SET_8710B_H2CCMD_BT_MPOPER_PARAM1(__pH2CCmd, __Value)							SET_BITS_TO_LE_1BYTE(__pH2CCmd+2, 0, 8, __Value)
+#define SET_8710B_H2CCMD_BT_MPOPER_PARAM2(__pH2CCmd, __Value)							SET_BITS_TO_LE_1BYTE(__pH2CCmd+3, 0, 8, __Value)
+#define SET_8710B_H2CCMD_BT_MPOPER_PARAM3(__pH2CCmd, __Value)							SET_BITS_TO_LE_1BYTE(__pH2CCmd+4, 0, 8, __Value)
+
+/* _BT_FW_PATCH_0x6A */
+#define SET_8710B_H2CCMD_BT_FW_PATCH_SIZE(__pH2CCmd, __Value)					SET_BITS_TO_LE_2BYTE((pu1Byte)(__pH2CCmd), 0, 16, __Value)
+#define SET_8710B_H2CCMD_BT_FW_PATCH_ADDR0(__pH2CCmd, __Value)					SET_BITS_TO_LE_1BYTE((__pH2CCmd)+2, 0, 8, __Value)
+#define SET_8710B_H2CCMD_BT_FW_PATCH_ADDR1(__pH2CCmd, __Value)					SET_BITS_TO_LE_1BYTE((__pH2CCmd)+3, 0, 8, __Value)
+#define SET_8710B_H2CCMD_BT_FW_PATCH_ADDR2(__pH2CCmd, __Value)					SET_BITS_TO_LE_1BYTE((__pH2CCmd)+4, 0, 8, __Value)
+#define SET_8710B_H2CCMD_BT_FW_PATCH_ADDR3(__pH2CCmd, __Value)					SET_BITS_TO_LE_1BYTE((__pH2CCmd)+5, 0, 8, __Value)
+
+/* ---------------------------------------------------------------------------------------------------------
+ * -------------------------------------------    Structure    --------------------------------------------------
+ * --------------------------------------------------------------------------------------------------------- */
+
+
+/* ---------------------------------------------------------------------------------------------------------
+ * ----------------------------------    Function Statement     --------------------------------------------------
+ * --------------------------------------------------------------------------------------------------------- */
+
+/* host message to firmware cmd */
+void rtl8710b_set_FwPwrMode_cmd(PADAPTER padapter, u8 Mode);
+void rtl8710b_set_FwJoinBssRpt_cmd(PADAPTER padapter, u8 mstatus);
+/* s32 rtl8710b_set_lowpwr_lps_cmd(PADAPTER padapter, u8 enable); */
+void rtl8710b_set_FwPsTuneParam_cmd(PADAPTER padapter);
+void rtl8710b_download_rsvd_page(PADAPTER padapter, u8 mstatus);
+#ifdef CONFIG_BT_COEXIST
+	void rtl8710b_download_BTCoex_AP_mode_rsvd_page(PADAPTER padapter);
+#endif /* CONFIG_BT_COEXIST */
+#ifdef CONFIG_P2P
+	void rtl8710b_set_p2p_ps_offload_cmd(PADAPTER padapter, u8 p2p_ps_state);
+#endif /* CONFIG_P2P */
+
+#ifdef CONFIG_TDLS
+#ifdef CONFIG_TDLS_CH_SW
+void rtl8710b_set_BcnEarly_C2H_Rpt_cmd(PADAPTER padapter, u8 enable);
+#endif
+#endif
+
+#ifdef CONFIG_P2P_WOWLAN
+	void rtl8710b_set_p2p_wowlan_offload_cmd(PADAPTER padapter);
+#endif
+
+s32 FillH2CCmd8710B(PADAPTER padapter, u8 ElementID, u32 CmdLen, u8 *pCmdBuffer);
+u8 GetTxBufferRsvdPageNum8710B(_adapter *padapter, bool wowlan);
+#endif
diff --git a/rtl8723DS/include/rtl8710b_dm.h b/rtl8723DS/include/rtl8710b_dm.h
new file mode 100644
index 0000000..9a131ba
--- a/dev/null
+++ b/rtl8723DS/include/rtl8710b_dm.h
@@ -0,0 +1,39 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2007 - 2017 Realtek Corporation.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ *****************************************************************************/
+#ifndef __RTL8710B_DM_H__
+#define __RTL8710B_DM_H__
+/* ************************************************************
+ * Description:
+ *
+ * This file is for 8710B dynamic mechanism only
+ *
+ *
+ * ************************************************************ */
+
+/* ************************************************************
+ * structure and define
+ * ************************************************************ */
+
+/* ************************************************************
+ * function prototype
+ * ************************************************************ */
+
+void rtl8710b_init_dm_priv(PADAPTER padapter);
+void rtl8710b_deinit_dm_priv(PADAPTER padapter);
+
+void rtl8710b_InitHalDm(PADAPTER padapter);
+void rtl8710b_HalDmWatchDog(PADAPTER padapter);
+
+#endif
diff --git a/rtl8723DS/include/rtl8710b_hal.h b/rtl8723DS/include/rtl8710b_hal.h
new file mode 100644
index 0000000..b01dab0
--- a/dev/null
+++ b/rtl8723DS/include/rtl8710b_hal.h
@@ -0,0 +1,277 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2007 - 2017 Realtek Corporation.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ *****************************************************************************/
+#ifndef __RTL8710B_HAL_H__
+#define __RTL8710B_HAL_H__
+
+#include "hal_data.h"
+
+#include "rtl8710b_spec.h"
+#include "rtl8710b_rf.h"
+#include "rtl8710b_dm.h"
+#include "rtl8710b_recv.h"
+#include "rtl8710b_xmit.h"
+#include "rtl8710b_cmd.h"
+#include "rtl8710b_led.h"
+#include "Hal8710BPwrSeq.h"
+#include "Hal8710BPhyReg.h"
+#include "Hal8710BPhyCfg.h"
+#ifdef DBG_CONFIG_ERROR_DETECT
+	#include "rtl8710b_sreset.h"
+#endif
+#ifdef CONFIG_LPS_POFF
+	#include "rtl8710b_lps_poff.h"
+#endif
+
+#define FW_8710B_SIZE		0x8000
+#define FW_8710B_START_ADDRESS	0x1000
+#define FW_8710B_END_ADDRESS	0x1FFF /* 0x5FFF */
+
+typedef struct _RT_FIRMWARE {
+	FIRMWARE_SOURCE	eFWSource;
+#ifdef CONFIG_EMBEDDED_FWIMG
+	u8			*szFwBuffer;
+#else
+	u8			szFwBuffer[FW_8710B_SIZE];
+#endif
+	u32			ulFwLength;
+} RT_FIRMWARE_8710B, *PRT_FIRMWARE_8710B;
+
+/*
+ * This structure must be cared byte-ordering
+ *
+ * Added by tynli. 2009.12.04. */
+typedef struct _RT_8710B_FIRMWARE_HDR {
+	/* 8-byte alinment required */
+
+	/* --- LONG WORD 0 ---- */
+	u16		Signature;	/* 92C0: test chip; 92C, 88C0: test chip; 88C1: MP A-cut; 92C1: MP A-cut */
+	u8		Category;	/* AP/NIC and USB/PCI */
+	u8		Function;	/* Reserved for different FW function indcation, for further use when driver needs to download different FW in different conditions */
+	u16		Version;		/* FW Version */
+	u16		Subversion;	/* FW Subversion, default 0x00 */
+
+	/* --- LONG WORD 1 ---- */
+	u8		Month;	/* Release time Month field */
+	u8		Date;	/* Release time Date field */
+	u8		Hour;	/* Release time Hour field */
+	u8		Minute;	/* Release time Minute field */
+	u16		RamCodeSize;	/* The size of RAM code */
+	u16		Rsvd2;
+
+	/* --- LONG WORD 2 ---- */
+	u32		SvnIdx;	/* The SVN entry index */
+	u32		Rsvd3;
+
+	/* --- LONG WORD 3 ---- */
+	u32		Rsvd4;
+	u32		Rsvd5;
+} RT_8710B_FIRMWARE_HDR, *PRT_8710B_FIRMWARE_HDR;
+
+#define DRIVER_EARLY_INT_TIME_8710B		0x05
+#define BCN_DMA_ATIME_INT_TIME_8710B		0x02
+
+/* for 8710B
+ * TX 32K, RX 16K, Page size 128B for TX, 8B for RX */
+#define PAGE_SIZE_TX_8710B			128
+#define PAGE_SIZE_RX_8710B			8
+
+#define TX_DMA_SIZE_8710B			0x8000	/* 32K(TX) */
+#define RX_DMA_SIZE_8710B			0x4000	/* 16K(RX) */
+
+#ifdef CONFIG_WOWLAN
+	#define RESV_FMWF	(WKFMCAM_SIZE * MAX_WKFM_CAM_NUM) /* 16 entries, for each is 24 bytes*/
+#else
+	#define RESV_FMWF	0
+#endif
+
+#ifdef CONFIG_FW_C2H_DEBUG
+	#define RX_DMA_RESERVED_SIZE_8710B	0x100	/* 256B, reserved for c2h debug message */
+#else
+	#define RX_DMA_RESERVED_SIZE_8710B	0x80	/* 128B, reserved for tx report */
+#endif
+#define RX_DMA_BOUNDARY_8710B\
+	(RX_DMA_SIZE_8710B - RX_DMA_RESERVED_SIZE_8710B - 1)
+
+
+/* Note: We will divide number of page equally for each queue other than public queue! */
+
+/* For General Reserved Page Number(Beacon Queue is reserved page)
+ * Beacon:MAX_BEACON_LEN/PAGE_SIZE_TX_8710B
+ * PS-Poll:1, Null Data:1,Qos Null Data:1,BT Qos Null Data:1,CTS-2-SELF,LTE QoS Null*/
+#define BCNQ_PAGE_NUM_8710B	(MAX_BEACON_LEN/PAGE_SIZE_TX_8710B + 6) /*0x08*/
+
+
+/* For WoWLan , more reserved page
+ * ARP Rsp:1, RWC:1, GTK Info:1,GTK RSP:2,GTK EXT MEM:2, AOAC rpt 1, PNO: 6
+ * NS offload: 2 NDP info: 1
+ */
+#ifdef CONFIG_WOWLAN
+	#define WOWLAN_PAGE_NUM_8710B	0x0b
+#else
+	#define WOWLAN_PAGE_NUM_8710B	0x00
+#endif
+
+#ifdef CONFIG_PNO_SUPPORT
+	#undef WOWLAN_PAGE_NUM_8710B
+	#define WOWLAN_PAGE_NUM_8710B	0x15
+#endif
+
+#ifdef CONFIG_AP_WOWLAN
+	#define AP_WOWLAN_PAGE_NUM_8710B	0x02
+#endif
+
+#define TX_TOTAL_PAGE_NUMBER_8710B\
+	(0xFF - BCNQ_PAGE_NUM_8710B -WOWLAN_PAGE_NUM_8710B)
+#define TX_PAGE_BOUNDARY_8710B		(TX_TOTAL_PAGE_NUMBER_8710B + 1)
+
+#define WMM_NORMAL_TX_TOTAL_PAGE_NUMBER_8710B	TX_TOTAL_PAGE_NUMBER_8710B
+#define WMM_NORMAL_TX_PAGE_BOUNDARY_8710B\
+	(WMM_NORMAL_TX_TOTAL_PAGE_NUMBER_8710B + 1)
+
+/* For Normal Chip Setting
+ * (HPQ + LPQ + NPQ + PUBQ) shall be TX_TOTAL_PAGE_NUMBER_8710B */
+#define NORMAL_PAGE_NUM_HPQ_8710B		0x0C
+#define NORMAL_PAGE_NUM_LPQ_8710B		0x02
+#define NORMAL_PAGE_NUM_NPQ_8710B		0x02
+#define NORMAL_PAGE_NUM_EPQ_8710B		0x04
+
+/* Note: For Normal Chip Setting, modify later */
+#define WMM_NORMAL_PAGE_NUM_HPQ_8710B		0x30
+#define WMM_NORMAL_PAGE_NUM_LPQ_8710B		0x20
+#define WMM_NORMAL_PAGE_NUM_NPQ_8710B		0x20
+#define WMM_NORMAL_PAGE_NUM_EPQ_8710B		0x00
+
+
+#include "HalVerDef.h"
+#include "hal_com.h"
+
+#define EFUSE_OOB_PROTECT_BYTES (96 + 1)
+
+#define HAL_EFUSE_MEMORY
+#define HWSET_MAX_SIZE_8710B                512
+#define EFUSE_REAL_CONTENT_LEN_8710B        512
+#define EFUSE_MAP_LEN_8710B                 512
+#define EFUSE_MAX_SECTION_8710B             64
+
+/* For some inferiority IC purpose. added by Roger, 2009.09.02.*/
+#define EFUSE_IC_ID_OFFSET			506
+#define AVAILABLE_EFUSE_ADDR(addr)	(addr < EFUSE_REAL_CONTENT_LEN_8710B)
+
+#define EFUSE_ACCESS_ON	0x69
+#define EFUSE_ACCESS_OFF	0x00
+
+#define   PACKAGE_QFN32_S           0
+#define   PACKAGE_QFN48M_S        1    //definiton 8188GU Dongle Package, Efuse Physical Address 0xF8 = 0xFE
+#define   PACKAGE_QFN48_S  	       2
+#define   PACKAGE_QFN64_S  	       3     
+#define   PACKAGE_QFN32_U  		4    
+#define   PACKAGE_QFN48M_U  	5   //definiton 8188GU Dongle Package, Efuse Physical Address 0xF8 = 0xEE
+#define   PACKAGE_QFN48_U  		6 
+#define   PACKAGE_QFN68_U  		7
+
+typedef enum _PACKAGE_TYPE_E
+{
+    PACKAGE_DEFAULT,
+    PACKAGE_QFN68,
+    PACKAGE_TFBGA90,
+    PACKAGE_TFBGA80,
+    PACKAGE_TFBGA79
+}PACKAGE_TYPE_E;
+
+#define INCLUDE_MULTI_FUNC_GPS(_Adapter) \
+	(GET_HAL_DATA(_Adapter)->MultiFunc & RT_MULTI_FUNC_GPS)
+
+#ifdef CONFIG_FILE_FWIMG
+	extern char *rtw_fw_file_path;
+	extern char *rtw_fw_wow_file_path;
+	#ifdef CONFIG_MP_INCLUDED
+		extern char *rtw_fw_mp_bt_file_path;
+	#endif /* CONFIG_MP_INCLUDED */
+#endif /* CONFIG_FILE_FWIMG */
+
+/* rtl8710b_hal_init.c */
+s32 rtl8710b_FirmwareDownload(PADAPTER padapter, BOOLEAN  bUsedWoWLANFw);
+void rtl8710b_FirmwareSelfReset(PADAPTER padapter);
+void rtl8710b_InitializeFirmwareVars(PADAPTER padapter);
+
+void rtl8710b_InitAntenna_Selection(PADAPTER padapter);
+void rtl8710b_DeinitAntenna_Selection(PADAPTER padapter);
+void rtl8710b_CheckAntenna_Selection(PADAPTER padapter);
+void rtl8710b_init_default_value(PADAPTER padapter);
+
+
+u32 indirect_read32_8710b(PADAPTER padapter, u32 regaddr);
+VOID indirect_write32_8710b(PADAPTER padapter, u32 regaddr, u32 data);
+u32 hal_query_syson_reg_8710b(PADAPTER padapter, u32 regaddr, u32 bitmask);
+VOID hal_set_syson_reg_8710b(PADAPTER padapter, u32 regaddr, u32 bitmask, u32 data);
+#define HAL_SetSYSOnReg hal_set_syson_reg_8710b
+
+
+/* EFuse */
+u8 GetEEPROMSize8710B(PADAPTER padapter);
+
+#if 0
+void Hal_InitPGData(PADAPTER padapter, u8 *PROMContent);
+void Hal_EfuseParseIDCode(PADAPTER padapter, u8 *hwinfo);
+void Hal_EfuseParseTxPowerInfo_8710B(PADAPTER padapter,
+				     u8 *PROMContent, BOOLEAN AutoLoadFail);
+void Hal_EfuseParseEEPROMVer_8710B(PADAPTER padapter,
+				   u8 *hwinfo, BOOLEAN AutoLoadFail);
+void Hal_EfuseParsePackageType_8710B(PADAPTER pAdapter,
+				     u8 *hwinfo, BOOLEAN AutoLoadFail);
+void Hal_EfuseParseChnlPlan_8710B(PADAPTER padapter,
+				  u8 *hwinfo, BOOLEAN AutoLoadFail);
+void Hal_EfuseParseCustomerID_8710B(PADAPTER padapter,
+				    u8 *hwinfo, BOOLEAN AutoLoadFail);
+void Hal_EfuseParseAntennaDiversity_8710B(PADAPTER padapter,
+		u8 *hwinfo, BOOLEAN AutoLoadFail);
+void Hal_EfuseParseXtal_8710B(PADAPTER pAdapter,
+			      u8 *hwinfo, u8 AutoLoadFail);
+void Hal_EfuseParseThermalMeter_8710B(PADAPTER padapter,
+				      u8 *hwinfo, u8 AutoLoadFail);
+VOID Hal_EfuseParseBoardType_8710B(PADAPTER Adapter,
+				   u8	*PROMContent, BOOLEAN AutoloadFail);
+#endif
+
+void rtl8710b_set_hal_ops(struct hal_ops *pHalFunc);
+void init_hal_spec_8710b(_adapter *adapter);
+u8 SetHwReg8710B(PADAPTER padapter, u8 variable, u8 *val);
+void GetHwReg8710B(PADAPTER padapter, u8 variable, u8 *val);
+u8 SetHalDefVar8710B(PADAPTER padapter, HAL_DEF_VARIABLE variable, void *pval);
+u8 GetHalDefVar8710B(PADAPTER padapter, HAL_DEF_VARIABLE variable, void *pval);
+
+/* register */
+void rtl8710b_InitBeaconParameters(PADAPTER padapter);
+void rtl8710b_InitBeaconMaxError(PADAPTER padapter, u8 InfraMode);
+void _8051Reset8710(PADAPTER padapter);
+
+void rtl8710b_start_thread(_adapter *padapter);
+void rtl8710b_stop_thread(_adapter *padapter);
+
+#ifdef CONFIG_GPIO_WAKEUP
+	void HalSetOutPutGPIO(PADAPTER padapter, u8 index, u8 OutPutValue);
+#endif
+
+void CCX_FwC2HTxRpt_8710b(PADAPTER padapter, u8 *pdata, u8 len);
+
+u8 MRateToHwRate8710B(u8 rate);
+u8 HwRateToMRate8710B(u8 rate);
+
+#ifdef CONFIG_USB_HCI
+	void rtl8710b_cal_txdesc_chksum(struct tx_desc *ptxdesc);
+#endif
+
+
+#endif
diff --git a/rtl8723DS/include/rtl8710b_led.h b/rtl8723DS/include/rtl8710b_led.h
new file mode 100644
index 0000000..8ca346d
--- a/dev/null
+++ b/rtl8723DS/include/rtl8710b_led.h
@@ -0,0 +1,44 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2007 - 2017 Realtek Corporation.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ *****************************************************************************/
+#ifndef __RTL8710B_LED_H__
+#define __RTL8710B_LED_H__
+
+#include <drv_conf.h>
+#include <osdep_service.h>
+#include <drv_types.h>
+
+#ifdef CONFIG_RTW_SW_LED
+/* ********************************************************************************
+ * Interface to manipulate LED objects.
+ * ******************************************************************************** */
+#ifdef CONFIG_USB_HCI
+	void rtl8710bu_InitSwLeds(PADAPTER padapter);
+	void rtl8710bu_DeInitSwLeds(PADAPTER padapter);
+#endif
+#ifdef CONFIG_SDIO_HCI
+	void rtl8710bs_InitSwLeds(PADAPTER padapter);
+	void rtl8710bs_DeInitSwLeds(PADAPTER padapter);
+#endif
+#ifdef CONFIG_GSPI_HCI
+	void rtl8710bs_InitSwLeds(PADAPTER padapter);
+	void rtl8710bs_DeInitSwLeds(PADAPTER padapter);
+#endif
+#ifdef CONFIG_PCI_HCI
+	void rtl8710be_InitSwLeds(PADAPTER padapter);
+	void rtl8710be_DeInitSwLeds(PADAPTER padapter);
+#endif
+
+#endif /*#ifdef CONFIG_RTW_SW_LED*/
+#endif
diff --git a/rtl8723DS/include/rtl8710b_lps_poff.h b/rtl8723DS/include/rtl8710b_lps_poff.h
new file mode 100644
index 0000000..ea9c60e
--- a/dev/null
+++ b/rtl8723DS/include/rtl8710b_lps_poff.h
@@ -0,0 +1,56 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2007 - 2017 Realtek Corporation.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ *****************************************************************************/
+
+/******************************************** CONST  ************************/
+#define NUM_OF_REGISTER_BANK	13
+#define NUM_OF_TOTAL_DWORD (NUM_OF_REGISTER_BANK * 64)
+#define TOTAL_LEN_FOR_HIOE ((NUM_OF_TOTAL_DWORD + 1) * 8)
+#define LPS_POFF_STATIC_FILE_LEN (TOTAL_LEN_FOR_HIOE + TXDESC_SIZE)
+#define LPS_POFF_DYNAMIC_FILE_LEN	(512 + TXDESC_SIZE)
+/******************************************** CONST  ************************/
+
+/******************************************** MACRO   ************************/
+/* HOIE Entry Definition */
+#define SET_HOIE_ENTRY_LOW_DATA(__pHOIE, __Value) \
+	SET_BITS_TO_LE_4BYTE((__pHOIE),	0, 16, __Value)
+#define SET_HOIE_ENTRY_HIGH_DATA(__pHOIE, __Value) \
+	SET_BITS_TO_LE_4BYTE((__pHOIE), 16, 16, __Value)
+#define SET_HOIE_ENTRY_MODE_SELECT(__pHOIE, __Value) \
+	SET_BITS_TO_LE_4BYTE((__pHOIE)+4, 0, 1, __Value)
+#define SET_HOIE_ENTRY_ADDRESS(__pHOIE, __Value) \
+	SET_BITS_TO_LE_4BYTE((__pHOIE)+4, 1, 14, __Value)
+#define SET_HOIE_ENTRY_BYTE_MASK(__pHOIE, __Value) \
+	SET_BITS_TO_LE_4BYTE((__pHOIE)+4, 15, 4, __Value)
+#define SET_HOIE_ENTRY_IO_LOCK(__pHOIE, __Value) \
+	SET_BITS_TO_LE_4BYTE((__pHOIE)+4, 19, 1, __Value)
+#define SET_HOIE_ENTRY_RD_EN(__pHOIE, __Value) \
+	SET_BITS_TO_LE_4BYTE((__pHOIE)+4, 20, 1, __Value)
+#define SET_HOIE_ENTRY_WR_EN(__pHOIE, __Value) \
+	SET_BITS_TO_LE_4BYTE((__pHOIE)+4, 21, 1, __Value)
+#define SET_HOIE_ENTRY_RAW_RW(__pHOIE, __Value) \
+	SET_BITS_TO_LE_4BYTE((__pHOIE)+4, 22, 1, __Value)
+#define SET_HOIE_ENTRY_RAW(__pHOIE, __Value) \
+	SET_BITS_TO_LE_4BYTE((__pHOIE)+4, 23, 1, __Value)
+#define SET_HOIE_ENTRY_IO_DELAY(__pHOIE, __Value) \
+	SET_BITS_TO_LE_4BYTE((__pHOIE)+4, 24, 8, __Value)
+
+/*********************Function Definition*******************************************/
+void rtl8710b_lps_poff_init(PADAPTER padapter);
+void rtl8710b_lps_poff_deinit(PADAPTER padapter);
+bool rtl8710b_lps_poff_get_txbndy_status(PADAPTER padapter);
+void rtl8710b_lps_poff_h2c_ctrl(PADAPTER padapter, u8 enable);
+void rtl8710b_lps_poff_set_ps_mode(PADAPTER padapter, bool bEnterLPS);
+bool rtl8710b_lps_poff_get_status(PADAPTER padapter);
+void rtl8710b_lps_poff_wow(PADAPTER padapter);
diff --git a/rtl8723DS/include/rtl8710b_recv.h b/rtl8723DS/include/rtl8710b_recv.h
new file mode 100644
index 0000000..f99c331
--- a/dev/null
+++ b/rtl8723DS/include/rtl8710b_recv.h
@@ -0,0 +1,85 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2007 - 2017 Realtek Corporation.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ *****************************************************************************/
+#ifndef __RTL8710B_RECV_H__
+#define __RTL8710B_RECV_H__
+
+#define RECV_BLK_SZ 512
+#define RECV_BLK_CNT 16
+#define RECV_BLK_TH RECV_BLK_CNT
+
+#if defined(CONFIG_USB_HCI)
+	#ifndef MAX_RECVBUF_SZ
+		#ifdef PLATFORM_OS_CE
+			#define MAX_RECVBUF_SZ (8192+1024) /* 8K+1k */
+		#else
+			#ifdef CONFIG_MINIMAL_MEMORY_USAGE
+				#define MAX_RECVBUF_SZ (4000) /* about 4K */
+			#else
+				#ifdef CONFIG_PLATFORM_MSTAR
+					#define MAX_RECVBUF_SZ (8192) /* 8K */
+				#elif defined(CONFIG_PLATFORM_HISILICON)
+					#define MAX_RECVBUF_SZ (16384) /* 16k */
+				#else
+					#define MAX_RECVBUF_SZ (15360) /* 15k < 16k */
+					/* #define MAX_RECVBUF_SZ (32768) */ /* 32k */
+					/* #define MAX_RECVBUF_SZ (20480) */ /* 20K */
+					/* #define MAX_RECVBUF_SZ (10240)  */ /* 10K */
+					/* #define MAX_RECVBUF_SZ (16384) */ /* 16k - 92E RX BUF :16K */
+				#endif
+			#endif
+		#endif
+	#endif /* !MAX_RECVBUF_SZ */
+#endif
+
+/* Rx smooth factor */
+#define	Rx_Smooth_Factor (20)
+
+/*-----------------------------------------------------------------*/
+/*	RTL8710B RX BUFFER DESC                                      */
+/*-----------------------------------------------------------------*/
+/*DWORD 0*/
+#define SET_RX_BUFFER_DESC_DATA_LENGTH_8710B(__pRxStatusDesc, __Value)		SET_BITS_TO_LE_4BYTE(__pRxStatusDesc, 0, 14, __Value)
+#define SET_RX_BUFFER_DESC_LS_8710B(__pRxStatusDesc, __Value)	SET_BITS_TO_LE_4BYTE(__pRxStatusDesc, 15, 1, __Value)
+#define SET_RX_BUFFER_DESC_FS_8710B(__pRxStatusDesc, __Value)		SET_BITS_TO_LE_4BYTE(__pRxStatusDesc, 16, 1, __Value)
+#define SET_RX_BUFFER_DESC_TOTAL_LENGTH_8710B(__pRxStatusDesc, __Value)		SET_BITS_TO_LE_4BYTE(__pRxStatusDesc, 16, 15, __Value)
+
+#define GET_RX_BUFFER_DESC_OWN_8710B(__pRxStatusDesc)		LE_BITS_TO_4BYTE(__pRxStatusDesc, 31, 1)
+#define GET_RX_BUFFER_DESC_LS_8710B(__pRxStatusDesc)		LE_BITS_TO_4BYTE(__pRxStatusDesc, 15, 1)
+#define GET_RX_BUFFER_DESC_FS_8710B(__pRxStatusDesc)		LE_BITS_TO_4BYTE(__pRxStatusDesc, 16, 1)
+#ifdef USING_RX_TAG
+	#define GET_RX_BUFFER_DESC_RX_TAG_8710B(__pRxStatusDesc)		LE_BITS_TO_4BYTE(__pRxStatusDesc, 16, 13)
+#else
+	#define GET_RX_BUFFER_DESC_TOTAL_LENGTH_8710B(__pRxStatusDesc)		LE_BITS_TO_4BYTE(__pRxStatusDesc, 16, 15)
+#endif
+
+/*DWORD 1*/
+#define SET_RX_BUFFER_PHYSICAL_LOW_8710B(__pRxStatusDesc, __Value)		SET_BITS_TO_LE_4BYTE(__pRxStatusDesc+4, 0, 32, __Value)
+
+/*DWORD 2*/
+#ifdef CONFIG_64BIT_DMA
+	#define SET_RX_BUFFER_PHYSICAL_HIGH_8710B(__pRxStatusDesc, __Value)		SET_BITS_TO_LE_4BYTE(__pRxStatusDesc+8, 0, 32, __Value)
+#else
+	#define SET_RX_BUFFER_PHYSICAL_HIGH_8710B(__pRxStatusDesc, __Value)
+#endif
+
+#ifdef CONFIG_USB_HCI
+	int rtl8710bu_init_recv_priv(_adapter *padapter);
+	void rtl8710bu_free_recv_priv(_adapter *padapter);
+	void rtl8710bu_init_recvbuf(_adapter *padapter, struct recv_buf *precvbuf);
+#endif
+
+void rtl8710b_query_rx_desc_status(union recv_frame *precvframe, u8 *pdesc);
+
+#endif /* __RTL8710B_RECV_H__ */
diff --git a/rtl8723DS/include/rtl8710b_rf.h b/rtl8723DS/include/rtl8710b_rf.h
new file mode 100644
index 0000000..2f176e6
--- a/dev/null
+++ b/rtl8723DS/include/rtl8710b_rf.h
@@ -0,0 +1,20 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2007 - 2017 Realtek Corporation.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ *****************************************************************************/
+#ifndef __RTL8710B_RF_H__
+#define __RTL8710B_RF_H__
+
+int PHY_RF6052_Config8710B(IN PADAPTER pdapter);
+
+#endif
diff --git a/rtl8723DS/include/rtl8710b_spec.h b/rtl8723DS/include/rtl8710b_spec.h
new file mode 100644
index 0000000..309c3ee
--- a/dev/null
+++ b/rtl8723DS/include/rtl8710b_spec.h
@@ -0,0 +1,481 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2007 - 2017 Realtek Corporation.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ *****************************************************************************/
+#ifndef __RTL8710B_SPEC_H__
+#define __RTL8710B_SPEC_H__
+
+#include <drv_conf.h>
+
+
+#define HAL_NAV_UPPER_UNIT_8710B		128		/* micro-second */
+
+/* -----------------------------------------------------
+ *
+ *	0x0000h ~ 0x00FFh	System Configuration
+ *
+ * ----------------------------------------------------- */
+#define REG_SYS_ISO_CTRL_8710B			0x0000	/* 2 Byte */
+#define REG_APS_FSMCO_8710B			0x0004	/* 4 Byte */
+#define REG_SYS_CLKR_8710B				0x0008	/* 2 Byte */
+#define REG_9346CR_8710B				0x000A	/* 2 Byte */
+#define REG_EE_VPD_8710B				0x000C	/* 2 Byte */
+#define REG_AFE_MISC_8710B				0x0010	/* 1 Byte */
+#define REG_SPS0_CTRL_8710B				0x0011	/* 7 Byte */
+#define REG_SPS_OCP_CFG_8710B			0x0018	/* 4 Byte */
+#define REG_RSV_CTRL_8710B				0x001C	/* 3 Byte */
+#define REG_RF_CTRL_8710B				0x001F	/* 1 Byte */
+#define REG_LPLDO_CTRL_8710B			0x0023	/* 1 Byte */
+#define REG_AFE_XTAL_CTRL_8710B		0x0024	/* 4 Byte */
+#define REG_AFE_PLL_CTRL_8710B			0x0028	/* 4 Byte */
+#define REG_MAC_PLL_CTRL_EXT_8710B		0x002c	/* 4 Byte */
+#define REG_EFUSE_CTRL_8710B			0x0030
+#define REG_EFUSE_TEST_8710B			0x0034
+#define REG_PWR_DATA_8710B				0x0038
+#define REG_CAL_TIMER_8710B				0x003C
+#define REG_ACLK_MON_8710B				0x003E
+#define REG_GPIO_MUXCFG_8710B			0x0040
+#define REG_GPIO_IO_SEL_8710B			0x0042
+#define REG_MAC_PINMUX_CFG_8710B		0x0043
+#define REG_GPIO_PIN_CTRL_8710B			0x0044
+#define REG_GPIO_INTM_8710B				0x0048
+#define REG_LEDCFG0_8710B				0x004C
+#define REG_LEDCFG1_8710B				0x004D
+#define REG_LEDCFG2_8710B				0x004E
+#define REG_LEDCFG3_8710B				0x004F
+#define REG_FSIMR_8710B					0x0050
+#define REG_FSISR_8710B					0x0054
+#define REG_HSIMR_8710B					0x0058
+#define REG_HSISR_8710B					0x005c
+#define REG_GPIO_EXT_CTRL				0x0060
+#define REG_PAD_CTRL1_8710B		0x0064
+#define REG_MULTI_FUNC_CTRL_8710B		0x0068
+#define REG_GPIO_STATUS_8710B			0x006C
+#define REG_SDIO_CTRL_8710B				0x0070
+#define REG_OPT_CTRL_8710B				0x0074
+#define REG_AFE_CTRL_4_8710B		0x0078
+#define REG_MCUFWDL_8710B				0x0080
+#define REG_8051FW_CTRL_8710B			0x0080
+#define REG_HMEBOX_DBG_0_8710B	0x0088
+#define REG_HMEBOX_DBG_1_8710B	0x008A
+#define REG_HMEBOX_DBG_2_8710B	0x008C
+#define REG_HMEBOX_DBG_3_8710B	0x008E
+#define REG_WLLPS_CTRL		0x0090
+
+#define REG_PMC_DBG_CTRL2_8710B			0x00CC
+#define	REG_EFUSE_BURN_GNT_8710B		0x00CF
+#define REG_HPON_FSM_8710B				0x00EC
+#define REG_SYS_CFG1_8710B				0x00F0
+#define REG_SYS_CFG_8710B				0x00FC
+#define REG_ROM_VERSION					0x00FD
+
+/* -----------------------------------------------------
+ *
+ *	0x0100h ~ 0x01FFh	MACTOP General Configuration
+ *
+ * ----------------------------------------------------- */
+#define REG_C2HEVT_CMD_ID_8710B	0x01A0
+#define REG_C2HEVT_CMD_SEQ_88XX		0x01A1
+#define REG_C2hEVT_CMD_CONTENT_88XX	0x01A2
+#define REG_C2HEVT_CMD_LEN_8710B        0x01AE
+#define REG_C2HEVT_CLEAR_8710B			0x01AF
+#define REG_MCUTST_1_8710B				0x01C0
+#define REG_WOWLAN_WAKE_REASON 0x01C7
+#define REG_FMETHR_8710B				0x01C8
+#define REG_HMETFR_8710B				0x01CC
+#define REG_HMEBOX_0_8710B				0x01D0
+#define REG_HMEBOX_1_8710B				0x01D4
+#define REG_HMEBOX_2_8710B				0x01D8
+#define REG_HMEBOX_3_8710B				0x01DC
+#define REG_LLT_INIT_8710B				0x01E0
+#define REG_HMEBOX_EXT0_8710B			0x01F0
+#define REG_HMEBOX_EXT1_8710B			0x01F4
+#define REG_HMEBOX_EXT2_8710B			0x01F8
+#define REG_HMEBOX_EXT3_8710B			0x01FC
+
+/* -----------------------------------------------------
+ *
+ *	0x0200h ~ 0x027Fh	TXDMA Configuration
+ *
+ * ----------------------------------------------------- */
+#define REG_RQPN_8710B					0x0200
+#define REG_FIFOPAGE_8710B				0x0204
+#define REG_DWBCN0_CTRL_8710B			REG_TDECTRL
+#define REG_TXDMA_OFFSET_CHK_8710B	0x020C
+#define REG_TXDMA_STATUS_8710B		0x0210
+#define REG_RQPN_NPQ_8710B			0x0214
+#define REG_DWBCN1_CTRL_8710B			0x0228
+
+
+/* -----------------------------------------------------
+ *
+ *	0x0280h ~ 0x02FFh	RXDMA Configuration
+ *
+ * ----------------------------------------------------- */
+#define REG_RXDMA_AGG_PG_TH_8710B		0x0280
+#define REG_FW_UPD_RDPTR_8710B		0x0284 /* FW shall update this register before FW write RXPKT_RELEASE_POLL to 1 */
+#define REG_RXDMA_CONTROL_8710B		0x0286 /* Control the RX DMA. */
+#define REG_RXDMA_STATUS_8710B			0x0288
+#define REG_RXDMA_MODE_CTRL_8710B		0x0290
+#define REG_EARLY_MODE_CONTROL_8710B	0x02BC
+#define REG_RSVD5_8710B					0x02F0
+#define REG_RSVD6_8710B					0x02F4
+
+/* -----------------------------------------------------
+ *
+ *	0x0300h ~ 0x03FFh	PCIe
+ *
+ * ----------------------------------------------------- */
+#define	REG_PCIE_CTRL_REG_8710B			0x0300
+#define	REG_INT_MIG_8710B				0x0304	/* Interrupt Migration */
+#define	REG_BCNQ_TXBD_DESA_8710B		0x0308	/* TX Beacon Descriptor Address */
+#define	REG_MGQ_TXBD_DESA_8710B			0x0310	/* TX Manage Queue Descriptor Address */
+#define	REG_VOQ_TXBD_DESA_8710B			0x0318	/* TX VO Queue Descriptor Address */
+#define	REG_VIQ_TXBD_DESA_8710B			0x0320	/* TX VI Queue Descriptor Address */
+#define	REG_BEQ_TXBD_DESA_8710B			0x0328	/* TX BE Queue Descriptor Address */
+#define	REG_BKQ_TXBD_DESA_8710B			0x0330	/* TX BK Queue Descriptor Address */
+#define	REG_RXQ_RXBD_DESA_8710B			0x0338	/* RX Queue	Descriptor Address */
+#define REG_HI0Q_TXBD_DESA_8710B		0x0340
+#define REG_HI1Q_TXBD_DESA_8710B		0x0348
+#define REG_HI2Q_TXBD_DESA_8710B		0x0350
+#define REG_HI3Q_TXBD_DESA_8710B		0x0358
+#define REG_HI4Q_TXBD_DESA_8710B		0x0360
+#define REG_HI5Q_TXBD_DESA_8710B		0x0368
+#define REG_HI6Q_TXBD_DESA_8710B		0x0370
+#define REG_HI7Q_TXBD_DESA_8710B		0x0378
+#define	REG_MGQ_TXBD_NUM_8710B			0x0380
+#define	REG_RX_RXBD_NUM_8710B			0x0382
+#define	REG_VOQ_TXBD_NUM_8710B			0x0384
+#define	REG_VIQ_TXBD_NUM_8710B			0x0386
+#define	REG_BEQ_TXBD_NUM_8710B			0x0388
+#define	REG_BKQ_TXBD_NUM_8710B			0x038A
+#define	REG_HI0Q_TXBD_NUM_8710B			0x038C
+#define	REG_HI1Q_TXBD_NUM_8710B			0x038E
+#define	REG_HI2Q_TXBD_NUM_8710B			0x0390
+#define	REG_HI3Q_TXBD_NUM_8710B			0x0392
+#define	REG_HI4Q_TXBD_NUM_8710B			0x0394
+#define	REG_HI5Q_TXBD_NUM_8710B			0x0396
+#define	REG_HI6Q_TXBD_NUM_8710B			0x0398
+#define	REG_HI7Q_TXBD_NUM_8710B			0x039A
+#define	REG_TSFTIMER_HCI_8710B			0x039C
+#define	REG_BD_RW_PTR_CLR_8710B			0x039C
+
+/* Read Write Point */
+#define	REG_VOQ_TXBD_IDX_8710B			0x03A0
+#define	REG_VIQ_TXBD_IDX_8710B			0x03A4
+#define	REG_BEQ_TXBD_IDX_8710B			0x03A8
+#define	REG_BKQ_TXBD_IDX_8710B			0x03AC
+#define	REG_MGQ_TXBD_IDX_8710B			0x03B0
+#define	REG_RXQ_TXBD_IDX_8710B			0x03B4
+#define	REG_HI0Q_TXBD_IDX_8710B			0x03B8
+#define	REG_HI1Q_TXBD_IDX_8710B			0x03BC
+#define	REG_HI2Q_TXBD_IDX_8710B			0x03C0
+#define	REG_HI3Q_TXBD_IDX_8710B			0x03C4
+#define	REG_HI4Q_TXBD_IDX_8710B			0x03C8
+#define	REG_HI5Q_TXBD_IDX_8710B			0x03CC
+#define	REG_HI6Q_TXBD_IDX_8710B			0x03D0
+#define	REG_HI7Q_TXBD_IDX_8710B			0x03D4
+
+#define	REG_PCIE_HCPWM_8710BE			0x03D8 /* ?????? */
+#define	REG_PCIE_HRPWM_8710BE			0x03DC	/* PCIe RPWM  ?????? */
+#define	REG_DBI_WDATA_V1_8710B			0x03E8
+#define	REG_DBI_RDATA_V1_8710B			0x03EC
+#define	REG_DBI_FLAG_V1_8710B			0x03F0
+#define REG_MDIO_V1_8710B				0x03F4
+#define REG_PCIE_MIX_CFG_8710B			0x03F8
+#define REG_HCI_MIX_CFG_8710B			0x03FC
+
+/* -----------------------------------------------------
+ *
+ *	0x0400h ~ 0x047Fh	Protocol Configuration
+ *
+ * ----------------------------------------------------- */
+#define REG_VOQ_INFORMATION_8710B		0x0400
+#define REG_VIQ_INFORMATION_8710B		0x0404
+#define REG_BEQ_INFORMATION_8710B		0x0408
+#define REG_BKQ_INFORMATION_8710B		0x040C
+#define REG_MGQ_INFORMATION_8710B		0x0410
+#define REG_HGQ_INFORMATION_8710B		0x0414
+#define REG_BCNQ_INFORMATION_8710B	0x0418
+#define REG_TXPKT_EMPTY_8710B			0x041A
+
+#define REG_FWHW_TXQ_CTRL_8710B		0x0420
+#define REG_HWSEQ_CTRL_8710B			0x0423
+#define REG_TXPKTBUF_BCNQ_BDNY_8710B	0x0424
+#define REG_TXPKTBUF_MGQ_BDNY_8710B	0x0425
+#define REG_LIFECTRL_CTRL_8710B			0x0426
+#define REG_MULTI_BCNQ_OFFSET_8710B	0x0427
+#define REG_SPEC_SIFS_8710B				0x0428
+#define REG_RL_8710B						0x042A
+#define REG_TXBF_CTRL_8710B				0x042C
+#define REG_DARFRC_8710B				0x0430
+#define REG_RARFRC_8710B				0x0438
+#define REG_RRSR_8710B					0x0440
+#define REG_ARFR0_8710B					0x0444
+#define REG_ARFR1_8710B					0x044C
+#define REG_CCK_CHECK_8710B				0x0454
+#define REG_AMPDU_MAX_TIME_8710B		0x0456
+#define REG_TXPKTBUF_BCNQ_BDNY1_8710B	0x0457
+
+#define REG_AMPDU_MAX_LENGTH_8710B	0x0458
+#define REG_TXPKTBUF_WMAC_LBK_BF_HD_8710B	0x045D
+#define REG_NDPA_OPT_CTRL_8710B		0x045F
+#define REG_FAST_EDCA_CTRL_8710B		0x0460
+#define REG_RD_RESP_PKT_TH_8710B		0x0463
+#define REG_DATA_SC_8710B				0x0483
+#ifdef CONFIG_WOWLAN
+	#define REG_TXPKTBUF_IV_LOW             0x0484
+	#define REG_TXPKTBUF_IV_HIGH            0x0488
+#endif
+#define REG_TXRPT_START_OFFSET		0x04AC
+#define REG_POWER_STAGE1_8710B		0x04B4
+#define REG_POWER_STAGE2_8710B		0x04B8
+#define REG_AMPDU_BURST_MODE_8710B	0x04BC
+#define REG_PKT_VO_VI_LIFE_TIME_8710B	0x04C0
+#define REG_PKT_BE_BK_LIFE_TIME_8710B	0x04C2
+#define REG_STBC_SETTING_8710B			0x04C4
+#define REG_HT_SINGLE_AMPDU_8710B		0x04C7
+#define REG_PROT_MODE_CTRL_8710B		0x04C8
+#define REG_MAX_AGGR_NUM_8710B		0x04CA
+#define REG_RTS_MAX_AGGR_NUM_8710B	0x04CB
+#define REG_BAR_MODE_CTRL_8710B		0x04CC
+#define REG_RA_TRY_RATE_AGG_LMT_8710B	0x04CF
+#define REG_MACID_PKT_DROP0_8710B		0x04D0
+#define REG_MACID_PKT_SLEEP_8710B		0x04D4
+
+/* -----------------------------------------------------
+ *
+ *	0x0500h ~ 0x05FFh	EDCA Configuration
+ *
+ * ----------------------------------------------------- */
+#define REG_EDCA_VO_PARAM_8710B		0x0500
+#define REG_EDCA_VI_PARAM_8710B		0x0504
+#define REG_EDCA_BE_PARAM_8710B		0x0508
+#define REG_EDCA_BK_PARAM_8710B		0x050C
+#define REG_BCNTCFG_8710B				0x0510
+#define REG_PIFS_8710B					0x0512
+#define REG_RDG_PIFS_8710B				0x0513
+#define REG_SIFS_CTX_8710B				0x0514
+#define REG_SIFS_TRX_8710B				0x0516
+#define REG_AGGR_BREAK_TIME_8710B		0x051A
+#define REG_SLOT_8710B					0x051B
+#define REG_TX_PTCL_CTRL_8710B			0x0520
+#define REG_TXPAUSE_8710B				0x0522
+#define REG_DIS_TXREQ_CLR_8710B		0x0523
+#define REG_RD_CTRL_8710B				0x0524
+/*
+ * Format for offset 540h-542h:
+ *	[3:0]:   TBTT prohibit setup in unit of 32us. The time for HW getting beacon content before TBTT.
+ *	[7:4]:   Reserved.
+ *	[19:8]:  TBTT prohibit hold in unit of 32us. The time for HW holding to send the beacon packet.
+ *	[23:20]: Reserved
+ * Description:
+ *	              |
+ * |<--Setup--|--Hold------------>|
+ *	--------------|----------------------
+ * |
+ * TBTT
+ * Note: We cannot update beacon content to HW or send any AC packets during the time between Setup and Hold.
+ * Described by Designer Tim and Bruce, 2011-01-14.
+ *   */
+#define REG_TBTT_PROHIBIT_8710B			0x0540
+#define REG_RD_NAV_NXT_8710B			0x0544
+#define REG_NAV_PROT_LEN_8710B			0x0546
+#define REG_BCN_CTRL_8710B				0x0550
+#define REG_BCN_CTRL_1_8710B			0x0551
+#define REG_MBID_NUM_8710B				0x0552
+#define REG_DUAL_TSF_RST_8710B			0x0553
+#define REG_BCN_INTERVAL_8710B			0x0554
+#define REG_DRVERLYINT_8710B			0x0558
+#define REG_BCNDMATIM_8710B			0x0559
+#define REG_ATIMWND_8710B				0x055A
+#define REG_USTIME_TSF_8710B			0x055C
+#define REG_BCN_MAX_ERR_8710B			0x055D
+#define REG_RXTSF_OFFSET_CCK_8710B		0x055E
+#define REG_RXTSF_OFFSET_OFDM_8710B	0x055F
+#define REG_TSFTR_8710B					0x0560
+#define REG_CTWND_8710B					0x0572
+#define REG_SECONDARY_CCA_CTRL_8710B	0x0577
+#define REG_PSTIMER_8710B				0x0580
+#define REG_TIMER0_8710B				0x0584
+#define REG_TIMER1_8710B				0x0588
+#define REG_ACMHWCTRL_8710B			0x05C0
+#define REG_SCH_TXCMD_8710B			0x05F8
+
+/* -----------------------------------------------------
+ *
+ *	0x0600h ~ 0x07FFh	WMAC Configuration
+ *
+ * ----------------------------------------------------- */
+#define REG_MAC_CR_8710B				0x0600
+#define REG_TCR_8710B					0x0604
+#define REG_RCR_8710B					0x0608
+#define REG_RX_PKT_LIMIT_8710B			0x060C
+#define REG_RX_DLK_TIME_8710B			0x060D
+#define REG_RX_DRVINFO_SZ_8710B		0x060F
+
+#define REG_MACID_8710B					0x0610
+#define REG_BSSID_8710B					0x0618
+#define REG_MAR_8710B					0x0620
+#define REG_MBIDCAMCFG_8710B			0x0628
+#define REG_WOWLAN_GTK_DBG1	0x630
+#define REG_WOWLAN_GTK_DBG2	0x634
+
+#define REG_USTIME_EDCA_8710B			0x0638
+#define REG_MAC_SPEC_SIFS_8710B		0x063A
+#define REG_RESP_SIFP_CCK_8710B			0x063C
+#define REG_RESP_SIFS_OFDM_8710B		0x063E
+#define REG_ACKTO_8710B					0x0640
+#define REG_CTS2TO_8710B				0x0641
+#define REG_EIFS_8710B					0x0642
+
+#define REG_NAV_UPPER_8710B			0x0652	/* unit of 128 */
+#define REG_TRXPTCL_CTL_8710B			0x0668
+
+/* Security */
+#define REG_CAMCMD_8710B				0x0670
+#define REG_CAMWRITE_8710B				0x0674
+#define REG_CAMREAD_8710B				0x0678
+#define REG_CAMDBG_8710B				0x067C
+#define REG_SECCFG_8710B				0x0680
+
+/* Power */
+#define REG_WOW_CTRL_8710B				0x0690
+#define REG_PS_RX_INFO_8710B			0x0692
+#define REG_UAPSD_TID_8710B				0x0693
+#define REG_WKFMCAM_CMD_8710B			0x0698
+#define REG_WKFMCAM_NUM_8710B			0x0698
+#define REG_WKFMCAM_RWD_8710B			0x069C
+#define REG_RXFLTMAP0_8710B				0x06A0
+#define REG_RXFLTMAP1_8710B				0x06A2
+#define REG_RXFLTMAP2_8710B				0x06A4
+#define REG_BCN_PSR_RPT_8710B			0x06A8
+#define REG_BT_COEX_TABLE_8710B		0x06C0
+#define REG_BFMER0_INFO_8710B			0x06E4
+#define REG_BFMER1_INFO_8710B			0x06EC
+#define REG_CSI_RPT_PARAM_BW20_8710B	0x06F4
+#define REG_CSI_RPT_PARAM_BW40_8710B	0x06F8
+#define REG_CSI_RPT_PARAM_BW80_8710B	0x06FC
+
+/* Hardware Port 2 */
+#define REG_MACID1_8710B				0x0700
+#define REG_BSSID1_8710B				0x0708
+#define REG_BFMEE_SEL_8710B				0x0714
+#define REG_SND_PTCL_CTRL_8710B		0x0718
+
+/* LTR */
+#define REG_LTR_CTRL_BASIC_8710B		0x07A4
+#define REG_LTR_IDLE_LATENCY_V1_8710B		0x0798
+#define REG_LTR_ACTIVE_LATENCY_V1_8710B		0x079C
+
+/* LTE_COEX */
+#define REG_LTECOEX_CTRL			0x07C0
+#define REG_LTECOEX_WRITE_DATA		0x07C4
+#define REG_LTECOEX_READ_DATA		0x07C8
+#define REG_LTECOEX_PATH_CONTROL	0x70
+
+/* Other */
+#define REG_USB_ACCESS_TIMEOUT 0xFE4C
+
+/* -----------------------------------------------------
+ * SYSON_REG_SPEC
+ * ----------------------------------------------------- */
+#define SYSON_REG_BASE_ADDR_8710B 0x40000000
+#define REG_SYS_XTAL_CTRL0	0x0060
+#define REG_SYS_SYSTEM_CFG0 0x1F0
+#define REG_SYS_SYSTEM_CFG1 0x1F4
+#define REG_SYS_SYSTEM_CFG2 0x1F8
+#define REG_SYS_EEPROM_CTRL0 0x0E0
+
+
+/* -----------------------------------------------------
+ * Indirect_R/W_SPEC
+ * ----------------------------------------------------- */
+#define NORMAL_REG_READ_OFFSET 0x83000000
+#define NORMAL_REG_WRITE_OFFSET 0x84000000
+#define EFUSE_READ_OFFSET 0x85000000
+#define EFUSE_WRITE_OFFSET 0x86000000
+
+
+/* -----------------------------------------------------
+ * PAGE0_WLANON_REG_SPEC
+ * ----------------------------------------------------- */
+#define PAGE0_OFFSET 0x0 // WLANON_PAGE0_REG needs to add an offset.
+
+
+
+/* ****************************************************************************
+ *	8723 Regsiter Bit and Content definition
+ * **************************************************************************** */
+ 
+ /* -----------------------------------------------------
+ * REG_SYS_SYSTEM_CFG0 
+ * ----------------------------------------------------- */
+#define BIT_RTL_ID_8710B BIT(16)
+
+#define BIT_MASK_CHIP_VER_8710B 0xf
+#define BIT_GET_CHIP_VER_8710B(x) ((x) & BIT_MASK_CHIP_VER_8710B)
+
+#define BIT_SHIFT_VENDOR_ID_8710B 4
+#define BIT_MASK_VENDOR_ID_8710B 0xf
+#define BIT_GET_VENDOR_ID_8710B(x) (((x) >> BIT_SHIFT_VENDOR_ID_8710B) & BIT_MASK_VENDOR_ID_8710B)
+
+ /* -----------------------------------------------------
+ * REG_SYS_SYSTEM_CFG1 
+ * ----------------------------------------------------- */
+#define BIT_SPSLDO_SEL_8710B BIT(25)
+
+ /* -----------------------------------------------------
+ * REG_SYS_SYSTEM_CFG2 
+ * ----------------------------------------------------- */
+#define BIT_MASK_RF_RL_ID_8710B 0xf
+#define BIT_GET_RF_RL_ID_8710B(x) ((x) & BIT_MASK_RF_RL_ID_8710B)
+
+ /* -----------------------------------------------------
+ * REG_SYS_SYSTEM_CFG2 
+ * ----------------------------------------------------- */
+#define BIT_EERPOMSEL_8710B BIT(4)
+#define BIT_AUTOLOAD_SUS_8710B BIT(5)
+
+
+ /* -----------------------------------------------------
+ * Other
+ * ----------------------------------------------------- */
+
+
+#define BIT_USB_RXDMA_AGG_EN	BIT(31)
+#define RXDMA_AGG_MODE_EN		BIT(1)
+
+#ifdef CONFIG_WOWLAN
+	#define RXPKT_RELEASE_POLL		BIT(16)
+	#define RXDMA_IDLE				BIT(17)
+	#define RW_RELEASE_EN			BIT(18)
+#endif
+
+/* 2 HSISR
+ * interrupt mask which needs to clear */
+#define MASK_HSISR_CLEAR		(HSISR_GPIO12_0_INT |\
+		HSISR_SPS_OCP_INT |\
+		HSISR_RON_INT |\
+		HSISR_PDNINT |\
+		HSISR_GPIO9_INT)
+
+#ifdef CONFIG_RF_POWER_TRIM
+	#ifdef CONFIG_RTL8710B
+		#define EEPROM_RF_GAIN_OFFSET			0xC1
+	#endif
+
+	#define EEPROM_RF_GAIN_VAL				0x1F6
+#endif /*CONFIG_RF_POWER_TRIM*/
+
+#endif /* __RTL8710B_SPEC_H__ */
diff --git a/rtl8723DS/include/rtl8710b_sreset.h b/rtl8723DS/include/rtl8710b_sreset.h
new file mode 100644
index 0000000..ac5c64e
--- a/dev/null
+++ b/rtl8723DS/include/rtl8710b_sreset.h
@@ -0,0 +1,24 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2007 - 2017 Realtek Corporation.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ *****************************************************************************/
+#ifndef _RTL8710B_SRESET_H_
+#define _RTL8710B_SRESET_H_
+
+#include <rtw_sreset.h>
+
+#ifdef DBG_CONFIG_ERROR_DETECT
+	extern void rtl8710b_sreset_xmit_status_check(_adapter *padapter);
+	extern void rtl8710b_sreset_linked_status_check(_adapter *padapter);
+#endif
+#endif
diff --git a/rtl8723DS/include/rtl8710b_xmit.h b/rtl8723DS/include/rtl8710b_xmit.h
new file mode 100644
index 0000000..a6b49cd
--- a/dev/null
+++ b/rtl8723DS/include/rtl8710b_xmit.h
@@ -0,0 +1,522 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2007 - 2017 Realtek Corporation.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ *****************************************************************************/
+#ifndef __RTL8710B_XMIT_H__
+#define __RTL8710B_XMIT_H__
+
+
+#define MAX_TID (15)
+
+
+#ifndef __INC_HAL8710BDESC_H
+#define __INC_HAL8710BDESC_H
+
+#define RX_STATUS_DESC_SIZE_8710B		24
+#define RX_DRV_INFO_SIZE_UNIT_8710B 8
+
+
+/* DWORD 0 */
+#define SET_RX_STATUS_DESC_PKT_LEN_8710B(__pRxStatusDesc, __Value) \
+	SET_BITS_TO_LE_4BYTE(__pRxStatusDesc, 0, 14, __Value)
+#define SET_RX_STATUS_DESC_EOR_8710B(__pRxStatusDesc, __Value) \
+	SET_BITS_TO_LE_4BYTE(__pRxStatusDesc, 30, 1, __Value)
+#define SET_RX_STATUS_DESC_OWN_8710B(__pRxStatusDesc, __Value) \
+	SET_BITS_TO_LE_4BYTE(__pRxStatusDesc, 31, 1, __Value)
+
+#define GET_RX_STATUS_DESC_PKT_LEN_8710B(__pRxStatusDesc) \
+	LE_BITS_TO_4BYTE(__pRxStatusDesc, 0, 14)
+#define GET_RX_STATUS_DESC_CRC32_8710B(__pRxStatusDesc) \
+	LE_BITS_TO_4BYTE(__pRxStatusDesc, 14, 1)
+#define GET_RX_STATUS_DESC_ICV_8710B(__pRxStatusDesc) \
+	LE_BITS_TO_4BYTE(__pRxStatusDesc, 15, 1)
+#define GET_RX_STATUS_DESC_DRVINFO_SIZE_8710B(__pRxStatusDesc) \
+	LE_BITS_TO_4BYTE(__pRxStatusDesc, 16, 4)
+#define GET_RX_STATUS_DESC_SECURITY_8710B(__pRxStatusDesc) \
+	LE_BITS_TO_4BYTE(__pRxStatusDesc, 20, 3)
+#define GET_RX_STATUS_DESC_QOS_8710B(__pRxStatusDesc) \
+	LE_BITS_TO_4BYTE(__pRxStatusDesc, 23, 1)
+#define GET_RX_STATUS_DESC_SHIFT_8710B(__pRxStatusDesc) \
+	LE_BITS_TO_4BYTE(__pRxStatusDesc, 24, 2)
+#define GET_RX_STATUS_DESC_PHY_STATUS_8710B(__pRxStatusDesc) \
+	LE_BITS_TO_4BYTE(__pRxStatusDesc, 26, 1)
+#define GET_RX_STATUS_DESC_SWDEC_8710B(__pRxStatusDesc) \
+	LE_BITS_TO_4BYTE(__pRxStatusDesc, 27, 1)
+#define GET_RX_STATUS_DESC_EOR_8710B(__pRxStatusDesc) \
+	LE_BITS_TO_4BYTE(__pRxStatusDesc, 30, 1)
+#define GET_RX_STATUS_DESC_OWN_8710B(__pRxStatusDesc) \
+	LE_BITS_TO_4BYTE(__pRxStatusDesc, 31, 1)
+
+/* DWORD 1 */
+#define GET_RX_STATUS_DESC_MACID_8710B(__pRxDesc) \
+	LE_BITS_TO_4BYTE(__pRxDesc+4, 0, 7)
+#define GET_RX_STATUS_DESC_TID_8710B(__pRxDesc) \
+	LE_BITS_TO_4BYTE(__pRxDesc+4, 8, 4)
+#define GET_RX_STATUS_DESC_AMSDU_8710B(__pRxDesc) \
+	LE_BITS_TO_4BYTE(__pRxDesc+4, 13, 1)
+#define GET_RX_STATUS_DESC_RXID_MATCH_8710B(__pRxDesc) \
+	LE_BITS_TO_4BYTE(__pRxDesc+4, 14, 1)
+#define GET_RX_STATUS_DESC_PAGGR_8710B(__pRxDesc) \
+	LE_BITS_TO_4BYTE(__pRxDesc+4, 15, 1)
+#define GET_RX_STATUS_DESC_A1_FIT_8710B(__pRxDesc) \
+	LE_BITS_TO_4BYTE(__pRxDesc+4, 16, 4)
+#define GET_RX_STATUS_DESC_CHKERR_8710B(__pRxDesc) \
+	LE_BITS_TO_4BYTE(__pRxDesc+4, 20, 1)
+#define GET_RX_STATUS_DESC_IPVER_8710B(__pRxDesc) \
+	LE_BITS_TO_4BYTE(__pRxDesc+4, 21, 1)
+#define GET_RX_STATUS_DESC_IS_TCPUDP__8710B(__pRxDesc) \
+	LE_BITS_TO_4BYTE(__pRxDesc+4, 22, 1)
+#define GET_RX_STATUS_DESC_CHK_VLD_8710B(__pRxDesc) \
+	LE_BITS_TO_4BYTE(__pRxDesc+4, 23, 1)
+#define GET_RX_STATUS_DESC_PAM_8710B(__pRxDesc) \
+	LE_BITS_TO_4BYTE(__pRxDesc+4, 24, 1)
+#define GET_RX_STATUS_DESC_PWR_8710B(__pRxDesc) \
+	LE_BITS_TO_4BYTE(__pRxDesc+4, 25, 1)
+#define GET_RX_STATUS_DESC_MORE_DATA_8710B(__pRxDesc) \
+	LE_BITS_TO_4BYTE(__pRxDesc+4, 26, 1)
+#define GET_RX_STATUS_DESC_MORE_FRAG_8710B(__pRxDesc) \
+	LE_BITS_TO_4BYTE(__pRxDesc+4, 27, 1)
+#define GET_RX_STATUS_DESC_TYPE_8710B(__pRxDesc) \
+	LE_BITS_TO_4BYTE(__pRxDesc+4, 28, 2)
+#define GET_RX_STATUS_DESC_MC_8710B(__pRxDesc) \
+	LE_BITS_TO_4BYTE(__pRxDesc+4, 30, 1)
+#define GET_RX_STATUS_DESC_BC_8710B(__pRxDesc) \
+	LE_BITS_TO_4BYTE(__pRxDesc+4, 31, 1)
+
+/* DWORD 2 */
+#define GET_RX_STATUS_DESC_SEQ_8710B(__pRxStatusDesc) \
+	LE_BITS_TO_4BYTE(__pRxStatusDesc+8, 0, 12)
+#define GET_RX_STATUS_DESC_FRAG_8710B(__pRxStatusDesc) \
+	LE_BITS_TO_4BYTE(__pRxStatusDesc+8, 12, 4)
+#define GET_RX_STATUS_DESC_RX_IS_QOS_8710B(__pRxStatusDesc) \
+	LE_BITS_TO_4BYTE(__pRxStatusDesc+8, 16, 1)
+#define GET_RX_STATUS_DESC_WLANHD_IV_LEN_8710B(__pRxStatusDesc) \
+	LE_BITS_TO_4BYTE(__pRxStatusDesc+8, 18, 6)
+#define GET_RX_STATUS_DESC_RPT_SEL_8710B(__pRxStatusDesc) \
+	LE_BITS_TO_4BYTE(__pRxStatusDesc+8, 28, 1)
+#define GET_RX_STATUS_DESC_FCS_OK_8710B(__pRxStatusDesc) \
+	LE_BITS_TO_4BYTE(__pRxStatusDesc+8, 31, 1)
+
+/* DWORD 3 */
+#define GET_RX_STATUS_DESC_RX_RATE_8710B(__pRxStatusDesc) \
+	LE_BITS_TO_4BYTE(__pRxStatusDesc+12, 0, 7)
+#define GET_RX_STATUS_DESC_HTC_8710B(__pRxStatusDesc) \
+	LE_BITS_TO_4BYTE(__pRxStatusDesc+12, 10, 1)
+#define GET_RX_STATUS_DESC_EOSP_8710B(__pRxStatusDesc) \
+	LE_BITS_TO_4BYTE(__pRxStatusDesc+12, 11, 1)
+#define GET_RX_STATUS_DESC_BSSID_FIT_8710B(__pRxStatusDesc) \
+	LE_BITS_TO_4BYTE(__pRxStatusDesc+12, 12, 2)
+#ifdef CONFIG_USB_RX_AGGREGATION
+#define GET_RX_STATUS_DESC_USB_AGG_PKTNUM_8710B(__pRxStatusDesc) \
+	LE_BITS_TO_4BYTE(__pRxStatusDesc+12, 16, 8)
+#endif
+#define GET_RX_STATUS_DESC_PATTERN_MATCH_8710B(__pRxDesc) \
+	LE_BITS_TO_4BYTE(__pRxDesc+12, 29, 1)
+#define GET_RX_STATUS_DESC_UNICAST_MATCH_8710B(__pRxDesc) \
+	LE_BITS_TO_4BYTE(__pRxDesc+12, 30, 1)
+#define GET_RX_STATUS_DESC_MAGIC_MATCH_8710B(__pRxDesc) \
+	LE_BITS_TO_4BYTE(__pRxDesc+12, 31, 1)
+
+/* DWORD 6 */
+#define GET_RX_STATUS_DESC_MATCH_ID_8710B(__pRxDesc) \
+	LE_BITS_TO_4BYTE(__pRxDesc+16, 0, 7)
+
+/* DWORD 5 */
+#define GET_RX_STATUS_DESC_TSFL_8710B(__pRxStatusDesc) \
+	LE_BITS_TO_4BYTE(__pRxStatusDesc+20, 0, 32)
+
+#define GET_RX_STATUS_DESC_BUFF_ADDR_8710B(__pRxDesc) \
+	LE_BITS_TO_4BYTE(__pRxDesc+24, 0, 32)
+#define GET_RX_STATUS_DESC_BUFF_ADDR64_8710B(__pRxDesc) \
+	LE_BITS_TO_4BYTE(__pRxDesc+28, 0, 32)
+
+#define SET_RX_STATUS_DESC_BUFF_ADDR_8710B(__pRxDesc, __Value) \
+	SET_BITS_TO_LE_4BYTE(__pRxDesc+24, 0, 32, __Value)
+
+
+/* Dword 0, rsvd: bit26, bit28 */
+#define GET_TX_DESC_OWN_8710B(__pTxDesc)\
+	LE_BITS_TO_4BYTE(__pTxDesc, 31, 1)
+
+#define SET_TX_DESC_PKT_SIZE_8710B(__pTxDesc, __Value) \
+	SET_BITS_TO_LE_4BYTE(__pTxDesc, 0, 16, __Value)
+#define SET_TX_DESC_OFFSET_8710B(__pTxDesc, __Value) \
+	SET_BITS_TO_LE_4BYTE(__pTxDesc, 16, 8, __Value)
+#define SET_TX_DESC_BMC_8710B(__pTxDesc, __Value) \
+	SET_BITS_TO_LE_4BYTE(__pTxDesc, 24, 1, __Value)
+#define SET_TX_DESC_HTC_8710B(__pTxDesc, __Value) \
+	SET_BITS_TO_LE_4BYTE(__pTxDesc, 25, 1, __Value)
+#define SET_TX_DESC_AMSDU_PAD_EN_8710B(__pTxDesc, __Value) \
+	SET_BITS_TO_LE_4BYTE(__pTxDesc, 27, 1, __Value)
+#define SET_TX_DESC_NO_ACM_8710B(__pTxDesc, __Value) \
+	SET_BITS_TO_LE_4BYTE(__pTxDesc, 29, 1, __Value)
+#define SET_TX_DESC_GF_8710B(__pTxDesc, __Value) \
+	SET_BITS_TO_LE_4BYTE(__pTxDesc, 30, 1, __Value)
+
+/* Dword 1 */
+#define SET_TX_DESC_MACID_8710B(__pTxDesc, __Value) \
+	SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 0, 7, __Value)
+#define SET_TX_DESC_QUEUE_SEL_8710B(__pTxDesc, __Value) \
+	SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 8, 5, __Value)
+#define SET_TX_DESC_RDG_NAV_EXT_8710B(__pTxDesc, __Value) \
+	SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 13, 1, __Value)
+#define SET_TX_DESC_LSIG_TXOP_EN_8710B(__pTxDesc, __Value) \
+	SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 14, 1, __Value)
+#define SET_TX_DESC_PIFS_8710B(__pTxDesc, __Value) \
+	SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 15, 1, __Value)
+#define SET_TX_DESC_RATE_ID_8710B(__pTxDesc, __Value) \
+	SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 16, 5, __Value)
+#define SET_TX_DESC_EN_DESC_ID_8710B(__pTxDesc, __Value) \
+	SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 21, 1, __Value)
+#define SET_TX_DESC_SEC_TYPE_8710B(__pTxDesc, __Value) \
+	SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 22, 2, __Value)
+#define SET_TX_DESC_PKT_OFFSET_8710B(__pTxDesc, __Value) \
+	SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 24, 5, __Value)
+#define SET_TX_DESC_MORE_DATA_8710B(__pTxDesc, __Value) \
+	SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 29, 1, __Value)
+
+/* Dword 2  remove P_AID, G_ID field*/
+#define SET_TX_DESC_CCA_RTS_8710B(__pTxDesc, __Value) \
+	SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 10, 2, __Value)
+#define SET_TX_DESC_AGG_ENABLE_8710B(__pTxDesc, __Value) \
+	SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 12, 1, __Value)
+#define SET_TX_DESC_RDG_ENABLE_8710B(__pTxDesc, __Value) \
+	SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 13, 1, __Value)
+#define SET_TX_DESC_NULL0_8710B(__pTxDesc, __Value) \
+	SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 14, 1, __Value)
+#define SET_TX_DESC_NULL1_8710B(__pTxDesc, __Value) \
+	SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 15, 1, __Value)
+#define SET_TX_DESC_BK_8710B(__pTxDesc, __Value) \
+	SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 16, 1, __Value)
+#define SET_TX_DESC_MORE_FRAG_8710B(__pTxDesc, __Value) \
+	SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 17, 1, __Value)
+#define SET_TX_DESC_RAW_8710B(__pTxDesc, __Value) \
+	SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 18, 1, __Value)
+#define SET_TX_DESC_CCX_8710B(__pTxDesc, __Value) \
+	SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 19, 1, __Value)
+#define SET_TX_DESC_AMPDU_DENSITY_8710B(__pTxDesc, __Value) \
+	SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 20, 3, __Value)
+#define SET_TX_DESC_BT_INT_8710B(__pTxDesc, __Value) \
+	SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 23, 1, __Value)
+#define SET_TX_DESC_FTM_EN_8710B(__pTxDesc, __Value) \
+	SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 30, 1, __Value)
+
+/* Dword 3 */
+#define SET_TX_DESC_NAV_USE_HDR_8710B(__pTxDesc, __Value) \
+	SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 5, 1, __Value)
+#define SET_TX_DESC_HWSEQ_SEL_8710B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 6, 2, __Value)
+#define SET_TX_DESC_USE_RATE_8710B(__pTxDesc, __Value) \
+	SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 8, 1, __Value)
+#define SET_TX_DESC_DISABLE_RTS_FB_8710B(__pTxDesc, __Value) \
+	SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 9, 1, __Value)
+#define SET_TX_DESC_DISABLE_FB_8710B(__pTxDesc, __Value) \
+	SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 10, 1, __Value)
+#define SET_TX_DESC_CTS2SELF_8710B(__pTxDesc, __Value) \
+	SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 11, 1, __Value)
+#define SET_TX_DESC_RTS_ENABLE_8710B(__pTxDesc, __Value) \
+	SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 12, 1, __Value)
+#define SET_TX_DESC_HW_RTS_ENABLE_8710B(__pTxDesc, __Value) \
+	SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 13, 1, __Value)
+#define SET_TX_DESC_PORT_ID_8710B(__pTxDesc, __Value) \
+	SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 14, 2, __Value)
+#define SET_TX_DESC_USE_MAX_LEN_8710B(__pTxDesc, __Value) \
+	SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 16, 1, __Value)
+#define SET_TX_DESC_MAX_AGG_NUM_8710B(__pTxDesc, __Value) \
+	SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 17, 5, __Value)
+#define SET_TX_DESC_AMPDU_MAX_TIME_8710B(__pTxDesc, __Value) \
+	SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 24, 8, __Value)
+
+/* Dword 4 */
+#define SET_TX_DESC_TX_RATE_8710B(__pTxDesc, __Value) \
+	SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 0, 7, __Value)
+#define SET_TX_DESC_TX_TRY_RATE_8710B(__pTxDesc, __Value) \
+	SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 7, 1, __Value)
+#define SET_TX_DESC_DATA_RATE_FB_LIMIT_8710B(__pTxDesc, __Value) \
+	SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 8, 5, __Value)
+#define SET_TX_DESC_RTS_RATE_FB_LIMIT_8710B(__pTxDesc, __Value) \
+	SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 13, 4, __Value)
+#define SET_TX_DESC_RETRY_LIMIT_ENABLE_8710B(__pTxDesc, __Value) \
+	SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 17, 1, __Value)
+#define SET_TX_DESC_DATA_RETRY_LIMIT_8710B(__pTxDesc, __Value) \
+	SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 18, 6, __Value)
+#define SET_TX_DESC_RTS_RATE_8710B(__pTxDesc, __Value) \
+	SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 24, 5, __Value)
+#define SET_TX_DESC_PCTS_EN_8710B(__pTxDesc, __Value) \
+	SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 29, 1, __Value)
+#define SET_TX_DESC_PCTS_MASK_IDX_8710B(__pTxDesc, __Value) \
+	SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 30, 2, __Value)
+
+/* Dword 5 */
+#define SET_TX_DESC_DATA_SC_8710B(__pTxDesc, __Value) \
+	SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 0, 4, __Value)
+#define SET_TX_DESC_DATA_SHORT_8710B(__pTxDesc, __Value) \
+	SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 4, 1, __Value)
+#define SET_TX_DESC_DATA_BW_8710B(__pTxDesc, __Value) \
+	SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 5, 2, __Value)
+#define SET_TX_DESC_DATA_STBC_8710B(__pTxDesc, __Value) \
+	SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 8, 2, __Value)
+#define SET_TX_DESC_RTS_STBC_8710B(__pTxDesc, __Value) \
+	SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 10, 2, __Value)
+#define SET_TX_DESC_RTS_SHORT_8710B(__pTxDesc, __Value) \
+	SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 12, 1, __Value)
+#define SET_TX_DESC_RTS_SC_8710B(__pTxDesc, __Value) \
+	SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 13, 4, __Value)
+#define SET_TX_DESC_PATH_A_EN_8710B(__pTxDesc, __Value) \
+	SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 24, 1, __Value)
+#define SET_TX_DESC_TXPWR_OF_SET_8710B(__pTxDesc, __Value) \
+	SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 28, 3, __Value)
+
+/* Dword 6 */
+#define SET_TX_DESC_SW_DEFINE_8710B(__pTxDesc, __Value) \
+	SET_BITS_TO_LE_4BYTE(__pTxDesc+24, 0, 12, __Value)
+#define SET_TX_DESC_MBSSID_8710B(__pTxDesc, __Value) \
+	SET_BITS_TO_LE_4BYTE(__pTxDesc+24, 12, 4, __Value)
+#define SET_TX_DESC_RF_SEL_8710B(__pTxDesc, __Value) \
+	SET_BITS_TO_LE_4BYTE(__pTxDesc+24, 16, 3, __Value)
+
+/* Dword 7 */
+#ifdef CONFIG_PCI_HCI
+#define SET_TX_DESC_TX_BUFFER_SIZE_8710B(__pTxDesc, __Value) \
+	SET_BITS_TO_LE_4BYTE(__pTxDesc+28, 0, 16, __Value)
+#endif
+
+#ifdef CONFIG_USB_HCI
+#define SET_TX_DESC_TX_DESC_CHECKSUM_8710B(__pTxDesc, __Value) \
+	SET_BITS_TO_LE_4BYTE(__pTxDesc+28, 0, 16, __Value)
+#endif
+
+#ifdef CONFIG_SDIO_HCI
+#define SET_TX_DESC_TX_TIMESTAMP_8710B(__pTxDesc, __Value) \
+	SET_BITS_TO_LE_4BYTE(__pTxDesc+28, 6, 18, __Value)
+#endif
+
+#define SET_TX_DESC_USB_TXAGG_NUM_8710B(__pTxDesc, __Value) \
+	SET_BITS_TO_LE_4BYTE(__pTxDesc+28, 24, 8, __Value)
+
+/* Dword 8 */
+#define SET_TX_DESC_RTS_RC_8710B(__pTxDesc, __Value) \
+	SET_BITS_TO_LE_4BYTE(__pTxDesc+32, 0, 6, __Value)
+#define SET_TX_DESC_BAR_RC_8710B(__pTxDesc, __Value) \
+	SET_BITS_TO_LE_4BYTE(__pTxDesc+32, 6, 2, __Value)
+#define SET_TX_DESC_DATA_RC_8710B(__pTxDesc, __Value) \
+	SET_BITS_TO_LE_4BYTE(__pTxDesc+32, 8, 6, __Value)
+#define SET_TX_DESC_HWSEQ_EN_8710B(__pTxDesc, __Value) \
+	SET_BITS_TO_LE_4BYTE(__pTxDesc+32, 15, 1, __Value)
+#define SET_TX_DESC_NEXTHEADPAGE_8710B(__pTxDesc, __Value) \
+	SET_BITS_TO_LE_4BYTE(__pTxDesc+32, 16, 8, __Value)
+#define SET_TX_DESC_TAILPAGE_8710B(__pTxDesc, __Value) \
+	SET_BITS_TO_LE_4BYTE(__pTxDesc+32, 24, 8, __Value)
+
+/* Dword 9 */
+#define SET_TX_DESC_PADDING_LEN_8710B(__pTxDesc, __Value) \
+	SET_BITS_TO_LE_4BYTE(__pTxDesc+36, 0, 11, __Value)
+#define SET_TX_DESC_SEQ_8710B(__pTxDesc, __Value) \
+	SET_BITS_TO_LE_4BYTE(__pTxDesc+36, 12, 12, __Value)
+#define SET_TX_DESC_FINAL_DATA_RATE_8710B(__pTxDesc, __Value) \
+	SET_BITS_TO_LE_4BYTE(__pTxDesc+36, 24, 8, __Value)
+
+
+#define SET_EARLYMODE_PKTNUM_8710B(__pAddr, __Value)					SET_BITS_TO_LE_4BYTE(__pAddr, 0, 4, __Value)
+#define SET_EARLYMODE_LEN0_8710B(__pAddr, __Value)					SET_BITS_TO_LE_4BYTE(__pAddr, 4, 15, __Value)
+#define SET_EARLYMODE_LEN1_1_8710B(__pAddr, __Value)					SET_BITS_TO_LE_4BYTE(__pAddr, 19, 13, __Value)
+#define SET_EARLYMODE_LEN1_2_8710B(__pAddr, __Value)					SET_BITS_TO_LE_4BYTE(__pAddr+4, 0, 2, __Value)
+#define SET_EARLYMODE_LEN2_8710B(__pAddr, __Value)					SET_BITS_TO_LE_4BYTE(__pAddr+4, 2, 15,	__Value)
+#define SET_EARLYMODE_LEN3_8710B(__pAddr, __Value)					SET_BITS_TO_LE_4BYTE(__pAddr+4, 17, 15, __Value)
+
+
+/*-----------------------------------------------------------------*/
+/*	RTL8710B TX BUFFER DESC                                      */
+/*-----------------------------------------------------------------*/
+#ifdef CONFIG_64BIT_DMA
+	#define SET_TXBUFFER_DESC_LEN_WITH_OFFSET(__pTxDesc, __Offset, __Valeu) SET_BITS_TO_LE_4BYTE(__pTxDesc+((__Offset)*16), 0, 16, __Valeu)
+	#define SET_TXBUFFER_DESC_AMSDU_WITH_OFFSET(__pTxDesc, __Offset, __Valeu) SET_BITS_TO_LE_4BYTE(__pTxDesc+((__Offset)*16), 31, 1, __Valeu)
+	#define SET_TXBUFFER_DESC_ADD_LOW_WITH_OFFSET(__pTxDesc, __Offset, __Valeu) SET_BITS_TO_LE_4BYTE(__pTxDesc+((__Offset)*16)+4, 0, 32, __Valeu)
+	#define SET_TXBUFFER_DESC_ADD_HIGT_WITH_OFFSET(__pTxDesc, __Offset, __Valeu) SET_BITS_TO_LE_4BYTE(__pTxDesc+((__Offset)*16)+8, 0, 32, __Valeu)
+#else
+	#define SET_TXBUFFER_DESC_LEN_WITH_OFFSET(__pTxDesc, __Offset, __Valeu) SET_BITS_TO_LE_4BYTE(__pTxDesc+(__Offset*8), 0, 16, __Valeu)
+	#define SET_TXBUFFER_DESC_AMSDU_WITH_OFFSET(__pTxDesc, __Offset, __Valeu) SET_BITS_TO_LE_4BYTE(__pTxDesc+(__Offset*8), 31, 1, __Valeu)
+	#define SET_TXBUFFER_DESC_ADD_LOW_WITH_OFFSET(__pTxDesc, __Offset, __Valeu) SET_BITS_TO_LE_4BYTE(__pTxDesc+(__Offset*8)+4, 0, 32, __Valeu)
+	#define SET_TXBUFFER_DESC_ADD_HIGT_WITH_OFFSET(__pTxDesc, __Offset, __Valeu)	/* 64 BIT mode only */
+#endif
+/* ********************************************************* */
+
+/* 64 bits  -- 32 bits */
+/* =======     ======= */
+/* Dword 0     0 */
+#define SET_TX_BUFF_DESC_LEN_0_8710B(__pTxDesc, __Valeu) SET_BITS_TO_LE_4BYTE(__pTxDesc, 0, 14, __Valeu)
+#define SET_TX_BUFF_DESC_PSB_8710B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 16, 15, __Value)
+#define SET_TX_BUFF_DESC_OWN_8710B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 31, 1, __Value)
+
+/* Dword 1     1 */
+#define SET_TX_BUFF_DESC_ADDR_LOW_0_8710B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 0, 32, __Value)
+#define GET_TX_BUFF_DESC_ADDR_LOW_0_8710B(__pTxDesc) LE_BITS_TO_4BYTE(__pTxDesc+4, 0, 32)
+/* Dword 2     NA */
+#define SET_TX_BUFF_DESC_ADDR_HIGH_0_8710B(__pTxDesc, __Value) SET_TXBUFFER_DESC_ADD_HIGT_WITH_OFFSET(__pTxDesc, 0, __Value)
+#ifdef CONFIG_64BIT_DMA
+	#define GET_TX_BUFF_DESC_ADDR_HIGH_0_8710B(__pTxDesc) LE_BITS_TO_4BYTE(__pTxDesc+8, 0, 32)
+#else
+	#define GET_TX_BUFF_DESC_ADDR_HIGH_0_8710B(__pTxDesc) 0
+#endif
+/* Dword 3     NA */
+/* RESERVED 0 */
+/* Dword 4     2 */
+#define SET_TX_BUFF_DESC_LEN_1_8710B(__pTxDesc, __Value) SET_TXBUFFER_DESC_LEN_WITH_OFFSET(__pTxDesc, 1, __Value)
+#define SET_TX_BUFF_DESC_AMSDU_1_8710B(__pTxDesc, __Value) SET_TXBUFFER_DESC_AMSDU_WITH_OFFSET(__pTxDesc, 1, __Value)
+/* Dword 5     3 */
+#define SET_TX_BUFF_DESC_ADDR_LOW_1_8710B(__pTxDesc, __Value) SET_TXBUFFER_DESC_ADD_LOW_WITH_OFFSET(__pTxDesc, 1, __Value)
+/* Dword 6     NA */
+#define SET_TX_BUFF_DESC_ADDR_HIGH_1_8710B(__pTxDesc, __Value) SET_TXBUFFER_DESC_ADD_HIGT_WITH_OFFSET(__pTxDesc, 1, __Value)
+/* Dword 7     NA */
+/*RESERVED 0 */
+/* Dword 8     4 */
+#define SET_TX_BUFF_DESC_LEN_2_8710B(__pTxDesc, __Value) SET_TXBUFFER_DESC_LEN_WITH_OFFSET(__pTxDesc, 2, __Value)
+#define SET_TX_BUFF_DESC_AMSDU_2_8710B(__pTxDesc, __Value) SET_TXBUFFER_DESC_AMSDU_WITH_OFFSET(__pTxDesc, 2, __Value)
+/* Dword 9     5 */
+#define SET_TX_BUFF_DESC_ADDR_LOW_2_8710B(__pTxDesc, __Value) SET_TXBUFFER_DESC_ADD_LOW_WITH_OFFSET(__pTxDesc, 2, __Value)
+/* Dword 10    NA */
+#define SET_TX_BUFF_DESC_ADDR_HIGH_2_8710B(__pTxDesc, __Value) SET_TXBUFFER_DESC_ADD_HIGT_WITH_OFFSET(__pTxDesc, 2, __Value)
+/* Dword 11    NA */
+/*RESERVED 0 */
+/* Dword 12    6 */
+#define SET_TX_BUFF_DESC_LEN_3_8710B(__pTxDesc, __Value) SET_TXBUFFER_DESC_LEN_WITH_OFFSET(__pTxDesc, 3, __Value)
+#define SET_TX_BUFF_DESC_AMSDU_3_8710B(__pTxDesc, __Value) SET_TXBUFFER_DESC_AMSDU_WITH_OFFSET(__pTxDesc, 3, __Value)
+/* Dword 13    7 */
+#define SET_TX_BUFF_DESC_ADDR_LOW_3_8710B(__pTxDesc, __Value) SET_TXBUFFER_DESC_ADD_LOW_WITH_OFFSET(__pTxDesc, 3, __Value)
+/* Dword 14    NA */
+#define SET_TX_BUFF_DESC_ADDR_HIGH_3_8710B(__pTxDesc, __Value) SET_TXBUFFER_DESC_ADD_HIGT_WITH_OFFSET(__pTxDesc, 3, __Value)
+/* Dword 15    NA */
+/*RESERVED 0 */
+
+
+#endif
+/* -----------------------------------------------------------
+ *
+ *	Rate
+ *
+ * -----------------------------------------------------------
+ * CCK Rates, TxHT = 0 */
+#define DESC8710B_RATE1M				0x00
+#define DESC8710B_RATE2M				0x01
+#define DESC8710B_RATE5_5M				0x02
+#define DESC8710B_RATE11M				0x03
+
+/* OFDM Rates, TxHT = 0 */
+#define DESC8710B_RATE6M				0x04
+#define DESC8710B_RATE9M				0x05
+#define DESC8710B_RATE12M				0x06
+#define DESC8710B_RATE18M				0x07
+#define DESC8710B_RATE24M				0x08
+#define DESC8710B_RATE36M				0x09
+#define DESC8710B_RATE48M				0x0a
+#define DESC8710B_RATE54M				0x0b
+
+/* MCS Rates, TxHT = 1 */
+#define DESC8710B_RATEMCS0				0x0c
+#define DESC8710B_RATEMCS1				0x0d
+#define DESC8710B_RATEMCS2				0x0e
+#define DESC8710B_RATEMCS3				0x0f
+#define DESC8710B_RATEMCS4				0x10
+#define DESC8710B_RATEMCS5				0x11
+#define DESC8710B_RATEMCS6				0x12
+#define DESC8710B_RATEMCS7				0x13
+#define DESC8710B_RATEMCS8				0x14
+#define DESC8710B_RATEMCS9				0x15
+#define DESC8710B_RATEMCS10		0x16
+#define DESC8710B_RATEMCS11		0x17
+#define DESC8710B_RATEMCS12		0x18
+#define DESC8710B_RATEMCS13		0x19
+#define DESC8710B_RATEMCS14		0x1a
+#define DESC8710B_RATEMCS15		0x1b
+#define DESC8710B_RATEVHTSS1MCS0		0x2c
+#define DESC8710B_RATEVHTSS1MCS1		0x2d
+#define DESC8710B_RATEVHTSS1MCS2		0x2e
+#define DESC8710B_RATEVHTSS1MCS3		0x2f
+#define DESC8710B_RATEVHTSS1MCS4		0x30
+#define DESC8710B_RATEVHTSS1MCS5		0x31
+#define DESC8710B_RATEVHTSS1MCS6		0x32
+#define DESC8710B_RATEVHTSS1MCS7		0x33
+#define DESC8710B_RATEVHTSS1MCS8		0x34
+#define DESC8710B_RATEVHTSS1MCS9		0x35
+#define DESC8710B_RATEVHTSS2MCS0		0x36
+#define DESC8710B_RATEVHTSS2MCS1		0x37
+#define DESC8710B_RATEVHTSS2MCS2		0x38
+#define DESC8710B_RATEVHTSS2MCS3		0x39
+#define DESC8710B_RATEVHTSS2MCS4		0x3a
+#define DESC8710B_RATEVHTSS2MCS5		0x3b
+#define DESC8710B_RATEVHTSS2MCS6		0x3c
+#define DESC8710B_RATEVHTSS2MCS7		0x3d
+#define DESC8710B_RATEVHTSS2MCS8		0x3e
+#define DESC8710B_RATEVHTSS2MCS9		0x3f
+
+
+#define	RX_HAL_IS_CCK_RATE_8710B(pDesc)\
+	(GET_RX_STATUS_DESC_RX_RATE_8710B(pDesc) == DESC8710B_RATE1M || \
+	 GET_RX_STATUS_DESC_RX_RATE_8710B(pDesc) == DESC8710B_RATE2M || \
+	 GET_RX_STATUS_DESC_RX_RATE_8710B(pDesc) == DESC8710B_RATE5_5M || \
+	 GET_RX_STATUS_DESC_RX_RATE_8710B(pDesc) == DESC8710B_RATE11M)
+
+#ifdef CONFIG_TRX_BD_ARCH
+	struct tx_desc;
+#endif
+
+void rtl8710b_cal_txdesc_chksum(struct tx_desc *ptxdesc);
+void rtl8710b_update_txdesc(struct xmit_frame *pxmitframe, u8 *pmem);
+void rtl8710b_fill_txdesc_sectype(struct pkt_attrib *pattrib, struct tx_desc *ptxdesc);
+void rtl8710b_fill_txdesc_vcs(PADAPTER padapter, struct pkt_attrib *pattrib, struct tx_desc *ptxdesc);
+void rtl8710b_fill_txdesc_phy(PADAPTER padapter, struct pkt_attrib *pattrib, struct tx_desc *ptxdesc);
+void rtl8710b_fill_fake_txdesc(PADAPTER padapter, u8 *pDesc, u32 BufferLen, u8 IsPsPoll, u8 IsBTQosNull, u8 bDataFrame);
+
+#if defined(CONFIG_CONCURRENT_MODE)
+	void fill_txdesc_force_bmc_camid(struct pkt_attrib *pattrib, u8 *ptxdesc);
+#endif
+void fill_txdesc_bmc_tx_rate(struct pkt_attrib *pattrib, u8 *ptxdesc);
+
+#if defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI)
+	s32 rtl8710bs_init_xmit_priv(PADAPTER padapter);
+	void rtl8710bs_free_xmit_priv(PADAPTER padapter);
+	s32 rtl8710bs_hal_xmit(PADAPTER padapter, struct xmit_frame *pxmitframe);
+	s32 rtl8710bs_mgnt_xmit(PADAPTER padapter, struct xmit_frame *pmgntframe);
+	s32	rtl8710bs_hal_xmitframe_enqueue(_adapter *padapter, struct xmit_frame *pxmitframe);
+	s32 rtl8710bs_xmit_buf_handler(PADAPTER padapter);
+	thread_return rtl8710bs_xmit_thread(thread_context context);
+	#define hal_xmit_handler rtl8710bs_xmit_buf_handler
+#endif
+
+#ifdef CONFIG_USB_HCI
+	s32 rtl8710bu_xmit_buf_handler(PADAPTER padapter);
+	#define hal_xmit_handler rtl8710bu_xmit_buf_handler
+	s32 rtl8710bu_init_xmit_priv(PADAPTER padapter);
+	void rtl8710bu_free_xmit_priv(PADAPTER padapter);
+	s32 rtl8710bu_hal_xmit(PADAPTER padapter, struct xmit_frame *pxmitframe);
+	s32 rtl8710bu_mgnt_xmit(PADAPTER padapter, struct xmit_frame *pmgntframe);
+	s32	 rtl8710bu_hal_xmitframe_enqueue(_adapter *padapter, struct xmit_frame *pxmitframe);
+	void rtl8710bu_xmit_tasklet(void *priv);
+	s32 rtl8710bu_xmitframe_complete(_adapter *padapter, struct xmit_priv *pxmitpriv, struct xmit_buf *pxmitbuf);
+	void _dbg_dump_tx_info(_adapter	*padapter, int frame_tag, struct tx_desc *ptxdesc);
+#endif
+
+#ifdef CONFIG_PCI_HCI
+	s32 rtl8710be_init_xmit_priv(PADAPTER padapter);
+	void rtl8710be_free_xmit_priv(PADAPTER padapter);
+	struct xmit_buf *rtl8710be_dequeue_xmitbuf(struct rtw_tx_ring *ring);
+	void	rtl8710be_xmitframe_resume(_adapter *padapter);
+	s32 rtl8710be_hal_xmit(PADAPTER padapter, struct xmit_frame *pxmitframe);
+	s32 rtl8710be_mgnt_xmit(PADAPTER padapter, struct xmit_frame *pmgntframe);
+	s32	rtl8710be_hal_xmitframe_enqueue(_adapter *padapter, struct xmit_frame *pxmitframe);
+	void rtl8710be_xmit_tasklet(void *priv);
+#endif
+
+u8	BWMapping_8710B(PADAPTER Adapter, struct pkt_attrib *pattrib);
+u8	SCMapping_8710B(PADAPTER Adapter, struct pkt_attrib	*pattrib);
+
+#endif
diff --git a/rtl8723DS/include/rtl8723b_cmd.h b/rtl8723DS/include/rtl8723b_cmd.h
index f284a05..4f542da 100755..100644
--- a/rtl8723DS/include/rtl8723b_cmd.h
+++ b/rtl8723DS/include/rtl8723b_cmd.h
@@ -113,7 +113,6 @@ enum h2c_cmd_8723B {
 #define SET_8723B_H2CCMD_PWRMODE_PARM_ALL_QUEUE_UAPSD(__pH2CCmd, __Value)	SET_BITS_TO_LE_1BYTE((__pH2CCmd)+3, 0, 8, __Value)
 #define SET_8723B_H2CCMD_PWRMODE_PARM_BCN_EARLY_C2H_RPT(__pH2CCmd, __Value)	SET_BITS_TO_LE_1BYTE((__pH2CCmd)+3, 2, 1, __Value)
 #define SET_8723B_H2CCMD_PWRMODE_PARM_PWR_STATE(__pH2CCmd, __Value)			SET_BITS_TO_LE_1BYTE((__pH2CCmd)+4, 0, 8, __Value)
-#define SET_8723B_H2CCMD_PWRMODE_PARM_BYTE5(__pH2CCmd, __Value)				SET_BITS_TO_LE_1BYTE((__pH2CCmd)+5, 0, 8, __Value)
 
 #define GET_8723B_H2CCMD_PWRMODE_PARM_MODE(__pH2CCmd)					LE_BITS_TO_1BYTE(__pH2CCmd, 0, 8)
 
@@ -177,7 +176,6 @@ enum h2c_cmd_8723B {
 /* host message to firmware cmd */
 void rtl8723b_set_FwPwrMode_cmd(PADAPTER padapter, u8 Mode);
 void rtl8723b_set_FwJoinBssRpt_cmd(PADAPTER padapter, u8 mstatus);
-void rtl8723b_set_rssi_cmd(PADAPTER padapter, u8 *param);
 void rtl8723b_fw_try_ap_cmd(PADAPTER padapter, u32 need_ack);
 /* s32 rtl8723b_set_lowpwr_lps_cmd(PADAPTER padapter, u8 enable); */
 void rtl8723b_set_FwPsTuneParam_cmd(PADAPTER padapter);
diff --git a/rtl8723DS/include/rtl8723b_dm.h b/rtl8723DS/include/rtl8723b_dm.h
index ea51717..ea51717 100755..100644
--- a/rtl8723DS/include/rtl8723b_dm.h
+++ b/rtl8723DS/include/rtl8723b_dm.h
diff --git a/rtl8723DS/include/rtl8723b_hal.h b/rtl8723DS/include/rtl8723b_hal.h
index 6e9ac57..5ab8b35 100755
--- a/rtl8723DS/include/rtl8723b_hal.h
+++ b/rtl8723DS/include/rtl8723b_hal.h
@@ -106,18 +106,10 @@ typedef struct _RT_8723B_FIRMWARE_HDR {
 /* Note: We will divide number of page equally for each queue other than public queue! */
 
 /* For General Reserved Page Number(Beacon Queue is reserved page)
- * Beacon:2, PS-Poll:1, Null Data:1,Qos Null Data:1,BT Qos Null Data:1 */
-#define BCNQ_PAGE_NUM_8723B		0x08
-#ifdef CONFIG_CONCURRENT_MODE
-	#define BCNQ1_PAGE_NUM_8723B		0x08 /* 0x04 */
-#else
-	#define BCNQ1_PAGE_NUM_8723B		0x00
-#endif
+ * Beacon:MAX_BEACON_LEN/PAGE_SIZE_TX_8723B
+ * PS-Poll:1, Null Data:1,Qos Null Data:1,BT Qos Null Data:1,CTS-2-SELF,LTE QoS Null*/
+#define BCNQ_PAGE_NUM_8723B		(MAX_BEACON_LEN / PAGE_SIZE_TX_8723B + 6) /*0x08*/
 
-#ifdef CONFIG_PNO_SUPPORT
-	#undef BCNQ1_PAGE_NUM_8723B
-	#define BCNQ1_PAGE_NUM_8723B		0x00 /* 0x04 */
-#endif
 
 /* For WoWLan , more reserved page
  * ARP Rsp:1, RWC:1, GTK Info:1,GTK RSP:2,GTK EXT MEM:2, AOAC rpt: 1,PNO: 6
@@ -138,7 +130,7 @@ typedef struct _RT_8723B_FIRMWARE_HDR {
 	#define AP_WOWLAN_PAGE_NUM_8723B	0x02
 #endif
 
-#define TX_TOTAL_PAGE_NUMBER_8723B	(0xFF - BCNQ_PAGE_NUM_8723B - BCNQ1_PAGE_NUM_8723B - WOWLAN_PAGE_NUM_8723B)
+#define TX_TOTAL_PAGE_NUMBER_8723B	(0xFF - BCNQ_PAGE_NUM_8723B - WOWLAN_PAGE_NUM_8723B)
 #define TX_PAGE_BOUNDARY_8723B		(TX_TOTAL_PAGE_NUMBER_8723B + 1)
 
 #define WMM_NORMAL_TX_TOTAL_PAGE_NUMBER_8723B	TX_TOTAL_PAGE_NUMBER_8723B
diff --git a/rtl8723DS/include/rtl8723b_rf.h b/rtl8723DS/include/rtl8723b_rf.h
index 6325ad5..6325ad5 100755..100644
--- a/rtl8723DS/include/rtl8723b_rf.h
+++ b/rtl8723DS/include/rtl8723b_rf.h
diff --git a/rtl8723DS/include/rtl8723b_sreset.h b/rtl8723DS/include/rtl8723b_sreset.h
index c97f264..c97f264 100755..100644
--- a/rtl8723DS/include/rtl8723b_sreset.h
+++ b/rtl8723DS/include/rtl8723b_sreset.h
diff --git a/rtl8723DS/include/rtl8723b_xmit.h b/rtl8723DS/include/rtl8723b_xmit.h
index 1364951..22b3bac 100755
--- a/rtl8723DS/include/rtl8723b_xmit.h
+++ b/rtl8723DS/include/rtl8723b_xmit.h
@@ -184,13 +184,14 @@
 	#define SET_TX_DESC_ANTSEL_D_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+24, 25, 3, __Value)
 
 	/* Dword 7 */
-	#if (DEV_BUS_TYPE == RT_PCI_INTERFACE)
+	#ifdef CONFIG_PCI_HCI
 		#define SET_TX_DESC_TX_BUFFER_SIZE_8723B(__pTxDesc, __Value)		SET_BITS_TO_LE_4BYTE(__pTxDesc+28, 0, 16, __Value)
-	#else
+	#endif
+	#if defined(CONFIG_SDIO_HCI) || defined(CONFIG_USB_HCI)
 		#define SET_TX_DESC_TX_DESC_CHECKSUM_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+28, 0, 16, __Value)
 	#endif
 	#define SET_TX_DESC_USB_TXAGG_NUM_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+28, 24, 8, __Value)
-	#if (DEV_BUS_TYPE == RT_SDIO_INTERFACE)
+	#ifdef CONFIG_SDIO_HCI
 		#define SET_TX_DESC_SDIO_TXSEQ_8723B(__pTxDesc, __Value)			SET_BITS_TO_LE_4BYTE(__pTxDesc+28, 16, 8, __Value)
 	#endif
 
diff --git a/rtl8723DS/include/rtl8723d_cmd.h b/rtl8723DS/include/rtl8723d_cmd.h
index c90b8ea..2226959 100755..100644
--- a/rtl8723DS/include/rtl8723d_cmd.h
+++ b/rtl8723DS/include/rtl8723d_cmd.h
@@ -101,7 +101,6 @@ enum h2c_cmd_8723D {
 #define SET_8723D_H2CCMD_PWRMODE_PARM_ALL_QUEUE_UAPSD(__pH2CCmd, __Value)	SET_BITS_TO_LE_1BYTE((__pH2CCmd)+3, 0, 8, __Value)
 #define SET_8723D_H2CCMD_PWRMODE_PARM_BCN_EARLY_C2H_RPT(__pH2CCmd, __Value)	SET_BITS_TO_LE_1BYTE((__pH2CCmd)+3, 2, 1, __Value)
 #define SET_8723D_H2CCMD_PWRMODE_PARM_PWR_STATE(__pH2CCmd, __Value)			SET_BITS_TO_LE_1BYTE((__pH2CCmd)+4, 0, 8, __Value)
-#define SET_8723D_H2CCMD_PWRMODE_PARM_BYTE5(__pH2CCmd, __Value)				SET_BITS_TO_LE_1BYTE((__pH2CCmd)+5, 0, 8, __Value)
 
 #define GET_8723D_H2CCMD_PWRMODE_PARM_MODE(__pH2CCmd)					LE_BITS_TO_1BYTE(__pH2CCmd, 0, 8)
 
diff --git a/rtl8723DS/include/rtl8723d_dm.h b/rtl8723DS/include/rtl8723d_dm.h
index 0612f06..0612f06 100755..100644
--- a/rtl8723DS/include/rtl8723d_dm.h
+++ b/rtl8723DS/include/rtl8723d_dm.h
diff --git a/rtl8723DS/include/rtl8723d_hal.h b/rtl8723DS/include/rtl8723d_hal.h
index 7ebf666..49bfc5e 100755..100644
--- a/rtl8723DS/include/rtl8723d_hal.h
+++ b/rtl8723DS/include/rtl8723d_hal.h
@@ -111,18 +111,10 @@ typedef struct _RT_8723D_FIRMWARE_HDR {
 /* Note: We will divide number of page equally for each queue other than public queue! */
 
 /* For General Reserved Page Number(Beacon Queue is reserved page)
- * Beacon:2, PS-Poll:1, Null Data:1,Qos Null Data:1,BT Qos Null Data:1 */
-#define BCNQ_PAGE_NUM_8723D		0x08
-#ifdef CONFIG_CONCURRENT_MODE
-	#define BCNQ1_PAGE_NUM_8723D		0x08 /* 0x04 */
-#else
-	#define BCNQ1_PAGE_NUM_8723D		0x00
-#endif
+ * Beacon:MAX_BEACON_LEN/PAGE_SIZE_TX_8723D
+ * PS-Poll:1, Null Data:1,Qos Null Data:1,BT Qos Null Data:1,CTS-2-SELF,LTE QoS Null*/
 
-#ifdef CONFIG_PNO_SUPPORT
-	#undef BCNQ1_PAGE_NUM_8723D
-	#define BCNQ1_PAGE_NUM_8723D		0x00 /* 0x04 */
-#endif
+#define BCNQ_PAGE_NUM_8723D		(MAX_BEACON_LEN/PAGE_SIZE_TX_8723D + 6) /*0x08*/
 
 /* For WoWLan , more reserved page
  * ARP Rsp:1, RWC:1, GTK Info:1,GTK RSP:2,GTK EXT MEM:2, AOAC rpt 1, PNO: 6
@@ -144,7 +136,7 @@ typedef struct _RT_8723D_FIRMWARE_HDR {
 #endif
 
 #define TX_TOTAL_PAGE_NUMBER_8723D\
-	(0xFF - BCNQ_PAGE_NUM_8723D - BCNQ1_PAGE_NUM_8723D - WOWLAN_PAGE_NUM_8723D)
+	(0xFF - BCNQ_PAGE_NUM_8723D - WOWLAN_PAGE_NUM_8723D)
 #define TX_PAGE_BOUNDARY_8723D		(TX_TOTAL_PAGE_NUMBER_8723D + 1)
 
 #define WMM_NORMAL_TX_TOTAL_PAGE_NUMBER_8723D	TX_TOTAL_PAGE_NUMBER_8723D
@@ -240,8 +232,6 @@ void Hal_EfuseParseBTCoexistInfo_8723D(PADAPTER padapter,
 				       u8 *hwinfo, BOOLEAN AutoLoadFail);
 void Hal_EfuseParseEEPROMVer_8723D(PADAPTER padapter,
 				   u8 *hwinfo, BOOLEAN AutoLoadFail);
-void Hal_EfuseParsePackageType_8723D(PADAPTER pAdapter,
-				     u8 *hwinfo, BOOLEAN AutoLoadFail);
 void Hal_EfuseParseChnlPlan_8723D(PADAPTER padapter,
 				  u8 *hwinfo, BOOLEAN AutoLoadFail);
 void Hal_EfuseParseCustomerID_8723D(PADAPTER padapter,
diff --git a/rtl8723DS/include/rtl8723d_led.h b/rtl8723DS/include/rtl8723d_led.h
index 1905e8b..1905e8b 100755..100644
--- a/rtl8723DS/include/rtl8723d_led.h
+++ b/rtl8723DS/include/rtl8723d_led.h
diff --git a/rtl8723DS/include/rtl8723d_lps_poff.h b/rtl8723DS/include/rtl8723d_lps_poff.h
index 138a0ca..138a0ca 100755..100644
--- a/rtl8723DS/include/rtl8723d_lps_poff.h
+++ b/rtl8723DS/include/rtl8723d_lps_poff.h
diff --git a/rtl8723DS/include/rtl8723d_recv.h b/rtl8723DS/include/rtl8723d_recv.h
index 03539a8..03539a8 100755..100644
--- a/rtl8723DS/include/rtl8723d_recv.h
+++ b/rtl8723DS/include/rtl8723d_recv.h
diff --git a/rtl8723DS/include/rtl8723d_rf.h b/rtl8723DS/include/rtl8723d_rf.h
index 733eb0a..733eb0a 100755..100644
--- a/rtl8723DS/include/rtl8723d_rf.h
+++ b/rtl8723DS/include/rtl8723d_rf.h
diff --git a/rtl8723DS/include/rtl8723d_spec.h b/rtl8723DS/include/rtl8723d_spec.h
index 5106b23..5106b23 100755..100644
--- a/rtl8723DS/include/rtl8723d_spec.h
+++ b/rtl8723DS/include/rtl8723d_spec.h
diff --git a/rtl8723DS/include/rtl8723d_sreset.h b/rtl8723DS/include/rtl8723d_sreset.h
index db75dba..db75dba 100755..100644
--- a/rtl8723DS/include/rtl8723d_sreset.h
+++ b/rtl8723DS/include/rtl8723d_sreset.h
diff --git a/rtl8723DS/include/rtl8723d_xmit.h b/rtl8723DS/include/rtl8723d_xmit.h
index b825c83..b1636ad 100755..100644
--- a/rtl8723DS/include/rtl8723d_xmit.h
+++ b/rtl8723DS/include/rtl8723d_xmit.h
@@ -286,13 +286,17 @@
 	SET_BITS_TO_LE_4BYTE(__pTxDesc+24, 16, 3, __Value)
 
 /* Dword 7 */
-#if (DEV_BUS_TYPE == RT_PCI_INTERFACE)
+#ifdef CONFIG_PCI_HCI
 #define SET_TX_DESC_TX_BUFFER_SIZE_8723D(__pTxDesc, __Value) \
 	SET_BITS_TO_LE_4BYTE(__pTxDesc+28, 0, 16, __Value)
-#elif(DEV_BUS_TYPE == RT_USB_INTERFACE)
+#endif
+
+#ifdef CONFIG_USB_HCI
 #define SET_TX_DESC_TX_DESC_CHECKSUM_8723D(__pTxDesc, __Value) \
 	SET_BITS_TO_LE_4BYTE(__pTxDesc+28, 0, 16, __Value)
-#else
+#endif
+
+#ifdef CONFIG_SDIO_HCI
 #define SET_TX_DESC_TX_TIMESTAMP_8723D(__pTxDesc, __Value) \
 	SET_BITS_TO_LE_4BYTE(__pTxDesc+28, 6, 18, __Value)
 #endif
diff --git a/rtl8723DS/include/rtl8812a_cmd.h b/rtl8723DS/include/rtl8812a_cmd.h
index 17dd2dd..5b55fdf 100755..100644
--- a/rtl8723DS/include/rtl8812a_cmd.h
+++ b/rtl8723DS/include/rtl8812a_cmd.h
@@ -84,7 +84,6 @@ struct H2C_SS_RFOFF_PARAM {
 #define SET_8812_H2CCMD_PWRMODE_PARM_ALL_QUEUE_UAPSD(__pH2CCmd, __Value)	SET_BITS_TO_LE_1BYTE((__pH2CCmd)+3, 0, 8, __Value)
 #define SET_8812_H2CCMD_PWRMODE_PARM_BCN_EARLY_C2H_RPT(__pH2CCmd, __Value)	SET_BITS_TO_LE_1BYTE((__pH2CCmd)+3, 2, 1, __Value)
 #define SET_8812_H2CCMD_PWRMODE_PARM_PWR_STATE(__pH2CCmd, __Value)			SET_BITS_TO_LE_1BYTE((__pH2CCmd)+4, 0, 8, __Value)
-#define SET_8812_H2CCMD_PWRMODE_PARM_BYTE5(__pH2CCmd, __Value)				SET_BITS_TO_LE_1BYTE((__pH2CCmd)+5, 0, 8, __Value)
 
 #define GET_8812_H2CCMD_PWRMODE_PARM_MODE(__pH2CCmd)							LE_BITS_TO_1BYTE(__pH2CCmd, 0, 8)
 
diff --git a/rtl8723DS/include/rtl8812a_dm.h b/rtl8723DS/include/rtl8812a_dm.h
index 584f6d3..584f6d3 100755..100644
--- a/rtl8723DS/include/rtl8812a_dm.h
+++ b/rtl8723DS/include/rtl8812a_dm.h
diff --git a/rtl8723DS/include/rtl8812a_hal.h b/rtl8723DS/include/rtl8812a_hal.h
index e3fe265..1ecfb72 100755..100644
--- a/rtl8723DS/include/rtl8812a_hal.h
+++ b/rtl8723DS/include/rtl8812a_hal.h
@@ -135,7 +135,11 @@ typedef struct _RT_FIRMWARE_8812 {
 #endif
 #define RX_DMA_BOUNDARY_8812		(MAX_RX_DMA_BUFFER_SIZE_8812 - RX_DMA_RESERVED_SIZE_8812 - 1)
 
-#define BCNQ_PAGE_NUM_8812		0x07
+#define PAGE_SIZE_TX_8812A PAGE_SIZE_512
+
+/* Beacon:MAX_BEACON_LEN/PAGE_SIZE_TX_8812A
+ * PS-Poll:1, Null Data:1,Qos Null Data:1,BT Qos Null Data:1,CTS-2-SELF,LTE QoS Null*/
+#define BCNQ_PAGE_NUM_8812		(MAX_BEACON_LEN / PAGE_SIZE_TX_8812A + 6) /*0x07*/
 
 /* For WoWLan , more reserved page
  * ARP Rsp:1, RWC:1, GTK Info:1,GTK RSP:1,GTK EXT MEM:1, AOAC rpt: 1,PNO: 6
@@ -154,7 +158,13 @@ typedef struct _RT_FIRMWARE_8812 {
 	#define FW_NDPA_PAGE_NUM	0x00
 #endif
 
-#define TX_TOTAL_PAGE_NUMBER_8812	(0xFF - BCNQ_PAGE_NUM_8812 - WOWLAN_PAGE_NUM_8812-FW_NDPA_PAGE_NUM)
+#ifdef DBG_FW_DEBUG_MSG_PKT
+	#define FW_DBG_MSG_PKT_PAGE_NUM_8812	0x01
+#else
+	#define FW_DBG_MSG_PKT_PAGE_NUM_8812	0x00
+#endif /*DBG_FW_DEBUG_MSG_PKT*/
+
+#define TX_TOTAL_PAGE_NUMBER_8812	(0xFF - BCNQ_PAGE_NUM_8812 - WOWLAN_PAGE_NUM_8812 - FW_NDPA_PAGE_NUM - FW_DBG_MSG_PKT_PAGE_NUM_8812)
 #define TX_PAGE_BOUNDARY_8812			(TX_TOTAL_PAGE_NUMBER_8812 + 1)
 
 #define TX_PAGE_BOUNDARY_WOWLAN_8812		(0xFF - BCNQ_PAGE_NUM_8812 - WOWLAN_PAGE_NUM_8812 + 1)
@@ -187,12 +197,11 @@ typedef struct _RT_FIRMWARE_8812 {
 #endif
 #define RX_DMA_BOUNDARY_8821		(MAX_RX_DMA_BUFFER_SIZE_8821 - RX_DMA_RESERVED_SIZE_8821 - 1)
 
-#define BCNQ_PAGE_NUM_8821		0x08
-#ifdef CONFIG_CONCURRENT_MODE
-	#define BCNQ1_PAGE_NUM_8821		0x04
-#else
-	#define BCNQ1_PAGE_NUM_8821		0x00
-#endif
+/* Beacon:MAX_BEACON_LEN/PAGE_SIZE_TX_8821A
+ * PS-Poll:1, Null Data:1,Qos Null Data:1,BT Qos Null Data:1,CTS-2-SELF,LTE QoS Null*/
+
+#define BCNQ_PAGE_NUM_8821		(MAX_BEACON_LEN / PAGE_SIZE_TX_8821A + 6) /*0x08*/
+
 
 /* For WoWLan , more reserved page
  * ARP Rsp:1, RWC:1, GTK Info:1,GTK RSP:1,GTK EXT MEM:1, PNO: 6 */
@@ -202,7 +211,7 @@ typedef struct _RT_FIRMWARE_8812 {
 	#define WOWLAN_PAGE_NUM_8821	0x00
 #endif
 
-#define TX_TOTAL_PAGE_NUMBER_8821	(0xFF - BCNQ_PAGE_NUM_8821 - BCNQ1_PAGE_NUM_8821 - WOWLAN_PAGE_NUM_8821)
+#define TX_TOTAL_PAGE_NUMBER_8821	(0xFF - BCNQ_PAGE_NUM_8821 - WOWLAN_PAGE_NUM_8821)
 #define TX_PAGE_BOUNDARY_8821				(TX_TOTAL_PAGE_NUMBER_8821 + 1)
 /* #define TX_PAGE_BOUNDARY_WOWLAN_8821		0xE0 */
 
@@ -338,9 +347,6 @@ void init_hal_spec_8821a(_adapter *adapter);
 
 u32 upload_txpktbuf_8812au(_adapter *adapter, u8 *buf, u32 buflen);
 
-/* register */
-void SetBcnCtrlReg(PADAPTER padapter, u8 SetBits, u8 ClearBits);
-
 void rtl8812_start_thread(PADAPTER padapter);
 void rtl8812_stop_thread(PADAPTER padapter);
 
diff --git a/rtl8723DS/include/rtl8812a_led.h b/rtl8723DS/include/rtl8812a_led.h
index 30c676e..30c676e 100755..100644
--- a/rtl8723DS/include/rtl8812a_led.h
+++ b/rtl8723DS/include/rtl8812a_led.h
diff --git a/rtl8723DS/include/rtl8812a_recv.h b/rtl8723DS/include/rtl8812a_recv.h
index bf1d4b6..bf1d4b6 100755..100644
--- a/rtl8723DS/include/rtl8812a_recv.h
+++ b/rtl8723DS/include/rtl8812a_recv.h
diff --git a/rtl8723DS/include/rtl8812a_rf.h b/rtl8723DS/include/rtl8812a_rf.h
index 9a7b60e..9a7b60e 100755..100644
--- a/rtl8723DS/include/rtl8812a_rf.h
+++ b/rtl8723DS/include/rtl8812a_rf.h
diff --git a/rtl8723DS/include/rtl8812a_spec.h b/rtl8723DS/include/rtl8812a_spec.h
index 37ba247..37ba247 100755..100644
--- a/rtl8723DS/include/rtl8812a_spec.h
+++ b/rtl8723DS/include/rtl8812a_spec.h
diff --git a/rtl8723DS/include/rtl8812a_sreset.h b/rtl8723DS/include/rtl8812a_sreset.h
index d4bbd58..d4bbd58 100755..100644
--- a/rtl8723DS/include/rtl8812a_sreset.h
+++ b/rtl8723DS/include/rtl8812a_sreset.h
diff --git a/rtl8723DS/include/rtl8812a_xmit.h b/rtl8723DS/include/rtl8812a_xmit.h
index 6105a8e..6105a8e 100755..100644
--- a/rtl8723DS/include/rtl8812a_xmit.h
+++ b/rtl8723DS/include/rtl8812a_xmit.h
diff --git a/rtl8723DS/include/rtl8814a_cmd.h b/rtl8723DS/include/rtl8814a_cmd.h
index 53c2828..1c3e48b 100755
--- a/rtl8723DS/include/rtl8814a_cmd.h
+++ b/rtl8723DS/include/rtl8814a_cmd.h
@@ -31,7 +31,6 @@
 #define SET_8814A_H2CCMD_PWRMODE_PARM_ALL_QUEUE_UAPSD(__pH2CCmd, __Value)	SET_BITS_TO_LE_1BYTE((__pH2CCmd)+3, 0, 8, __Value)
 #define SET_8814A_H2CCMD_PWRMODE_PARM_BCN_EARLY_C2H_RPT(__pH2CCmd, __Value)	SET_BITS_TO_LE_1BYTE((__pH2CCmd)+3, 2, 1, __Value)
 #define SET_8814A_H2CCMD_PWRMODE_PARM_PWR_STATE(__pH2CCmd, __Value)	SET_BITS_TO_LE_1BYTE((__pH2CCmd)+4, 0, 8, __Value)
-#define SET_8814A_H2CCMD_PWRMODE_PARM_BYTE5(__pH2CCmd, __Value)	SET_BITS_TO_LE_1BYTE((__pH2CCmd)+5, 0, 8, __Value)
 
 #define GET_8814A_H2CCMD_PWRMODE_PARM_MODE(__pH2CCmd)					LE_BITS_TO_1BYTE(__pH2CCmd, 0, 8)
 
@@ -140,7 +139,6 @@ void rtl8814_set_wowlan_cmd(_adapter *padapter, u8 enable);
 void rtl8814_set_FwJoinBssReport_cmd(PADAPTER padapter, u8 mstatus);
 void rtl8814_set_FwPwrMode_cmd(PADAPTER padapter, u8 PSMode);
 u8 GetTxBufferRsvdPageNum8814(_adapter *padapter, bool wowlan);
-u8 rtl8814_set_rssi_cmd(_adapter *padapter, u8 *param);
 void rtl8814_req_txrpt_cmd(PADAPTER padapter, u8 macid);
 
 #ifdef CONFIG_TDLS
diff --git a/rtl8723DS/include/rtl8814a_dm.h b/rtl8723DS/include/rtl8814a_dm.h
index afbc8be..afbc8be 100755..100644
--- a/rtl8723DS/include/rtl8814a_dm.h
+++ b/rtl8723DS/include/rtl8814a_dm.h
diff --git a/rtl8723DS/include/rtl8814a_hal.h b/rtl8723DS/include/rtl8814a_hal.h
index b7631df..aa7b498 100755
--- a/rtl8723DS/include/rtl8814a_hal.h
+++ b/rtl8723DS/include/rtl8814a_hal.h
@@ -51,7 +51,10 @@ typedef struct _RT_FIRMWARE_8814 {
 } RT_FIRMWARE_8814, *PRT_FIRMWARE_8814;
 
 #define PAGE_SIZE_TX_8814	PAGE_SIZE_128
-#define BCNQ_PAGE_NUM_8814		0x08
+/* BCN rsvd_page_num = MAX_BEACON_LEN / PAGE_SIZE_TX_8814
+ * PS-Poll:1, Null Data:1,Qos Null Data:1,BT Qos Null Data:1,CTS-2-SELF,LTE QoS Null*/
+
+#define BCNQ_PAGE_NUM_8814		(MAX_BEACON_LEN / PAGE_SIZE_TX_8814 + 6) /*0x08*/
 
 #define Rtl8814A_NIC_PWR_ON_FLOW				rtl8814A_power_on_flow
 #define Rtl8814A_NIC_RF_OFF_FLOW				rtl8814A_radio_off_flow
@@ -196,12 +199,12 @@ Chip specific
 /* pic buffer descriptor */
 #if 1 /* according to the define in the rtw_xmit.h, rtw_recv.h */
 	#define RTL8814AE_SEG_NUM  TX_BUFFER_SEG_NUM /* 0:2 seg, 1: 4 seg, 2: 8 seg */
-	#define TX_DESC_NUM_8814A  TXDESC_NUM   /* 128 */
+	#define TX_DESC_NUM_8814A  TX_BD_NUM   /* 128 */
 	#define RX_DESC_NUM_8814A  PCI_MAX_RX_COUNT /* 128 */
 	#ifdef CONFIG_CONCURRENT_MODE
-		#define BE_QUEUE_TX_DESC_NUM_8814A  (TXDESC_NUM<<1)    /* 256 */
+		#define BE_QUEUE_TX_DESC_NUM_8814A  (TX_BD_NUM<<1)    /* 256 */
 	#else
-		#define BE_QUEUE_TX_DESC_NUM_8814A  (TXDESC_NUM+(TXDESC_NUM>>1)) /* 192 */
+		#define BE_QUEUE_TX_DESC_NUM_8814A  (TX_BD_NUM+(TX_BD_NUM>>1)) /* 192 */
 	#endif
 #else
 	#define RTL8814AE_SEG_NUM  TX_BUFFER_SEG_NUM /* 0:2 seg, 1: 4 seg, 2: 8 seg */
@@ -309,9 +312,6 @@ u8 GetHalDefVar8814A(PADAPTER padapter, HAL_DEF_VARIABLE variable, void *pval);
 void rtl8814_set_hal_ops(struct hal_ops *pHalFunc);
 void init_hal_spec_8814a(_adapter *adapter);
 
-/* register */
-void SetBcnCtrlReg(PADAPTER padapter, u8 SetBits, u8 ClearBits);
-void SetBcnCtrlReg(PADAPTER	Adapter, u8	SetBits, u8	ClearBits);
 void rtl8814_start_thread(PADAPTER padapter);
 void rtl8814_stop_thread(PADAPTER padapter);
 
diff --git a/rtl8723DS/include/rtl8814a_led.h b/rtl8723DS/include/rtl8814a_led.h
index cc45792..cc45792 100755..100644
--- a/rtl8723DS/include/rtl8814a_led.h
+++ b/rtl8723DS/include/rtl8814a_led.h
diff --git a/rtl8723DS/include/rtl8814a_rf.h b/rtl8723DS/include/rtl8814a_rf.h
index e374439..e374439 100755..100644
--- a/rtl8723DS/include/rtl8814a_rf.h
+++ b/rtl8723DS/include/rtl8814a_rf.h
diff --git a/rtl8723DS/include/rtl8814a_sreset.h b/rtl8723DS/include/rtl8814a_sreset.h
index d65cb98..d65cb98 100755..100644
--- a/rtl8723DS/include/rtl8814a_sreset.h
+++ b/rtl8723DS/include/rtl8814a_sreset.h
diff --git a/rtl8723DS/include/rtl8814a_xmit.h b/rtl8723DS/include/rtl8814a_xmit.h
index 5b1e966..e3b6311 100755
--- a/rtl8723DS/include/rtl8814a_xmit.h
+++ b/rtl8723DS/include/rtl8814a_xmit.h
@@ -218,9 +218,10 @@ typedef struct txdescriptor_8814 {
 
 
 /* Dword 7 */
-#if (DEV_BUS_TYPE == RT_PCI_INTERFACE)
+#ifdef CONFIG_PCI_HCI
 	#define SET_TX_DESC_TX_BUFFER_SIZE_8814A(__pTxDesc, __Value)		SET_BITS_TO_LE_4BYTE(__pTxDesc+28, 0, 16, __Value)
-#else
+#endif
+#if defined(CONFIG_SDIO_HCI)|| defined(CONFIG_USB_HCI)
 	#define SET_TX_DESC_TX_DESC_CHECKSUM_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+28, 0, 16, __Value)
 #endif
 #define SET_TX_DESC_NTX_MAP_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+28, 20, 4, __Value)
@@ -233,9 +234,10 @@ typedef struct txdescriptor_8814 {
 #define SET_TX_DESC_DATA_RC_8814A(__pTxDesc, __Value)			SET_BITS_TO_LE_4BYTE(__pTxDesc+32, 8, 6, __Value)
 #define SET_TX_DESC_EN_HWEXSEQ_8814A(__pTxDesc, __Value)			SET_BITS_TO_LE_4BYTE(__pTxDesc+32, 14, 1, __Value)
 #define SET_TX_DESC_HWSEQ_EN_8814A(__pTxDesc, __Value)			SET_BITS_TO_LE_4BYTE(__pTxDesc+32, 15, 1, __Value)
-#if (DEV_BUS_TYPE != RT_SDIO_INTERFACE)
+#if defined(CONFIG_PCI_HCI)|| defined(CONFIG_USB_HCI)
 	#define SET_TX_DESC_NEXT_HEAD_PAGE_L_8814A(__pTxDesc, __Value)(__pTxDesc, __Value)	SET_BITS_TO_LE_4BYTE(__pTxDesc+32, 16, 8, __Value)
-#else
+#endif
+#ifdef CONFIG_SDIO_HCI
 	#define SET_TX_DESC_SDIO_SEQ_8814A(__pTxDesc, __Value)(__pTxDesc, __Value) 			SET_BITS_TO_LE_4BYTE(__pTxDesc+32, 16, 8, __Value) /* 20130415 KaiYuan add for 8814AS */
 #endif
 #define SET_TX_DESC_TAIL_PAGE_L_8814A(__pTxDesc, __Value)(__pTxDesc, __Value)			SET_BITS_TO_LE_4BYTE(__pTxDesc+32, 24, 8, __Value)
diff --git a/rtl8723DS/include/rtl8821a_spec.h b/rtl8723DS/include/rtl8821a_spec.h
index 1379ffc..1379ffc 100755..100644
--- a/rtl8723DS/include/rtl8821a_spec.h
+++ b/rtl8723DS/include/rtl8821a_spec.h
diff --git a/rtl8723DS/include/rtl8821a_xmit.h b/rtl8723DS/include/rtl8821a_xmit.h
index 5d973cd..5d973cd 100755..100644
--- a/rtl8723DS/include/rtl8821a_xmit.h
+++ b/rtl8723DS/include/rtl8821a_xmit.h
diff --git a/rtl8723DS/include/rtl8821c_dm.h b/rtl8723DS/include/rtl8821c_dm.h
index b1e4fe6..b1e4fe6 100755..100644
--- a/rtl8723DS/include/rtl8821c_dm.h
+++ b/rtl8723DS/include/rtl8821c_dm.h
diff --git a/rtl8723DS/include/rtl8821c_hal.h b/rtl8723DS/include/rtl8821c_hal.h
index 75d8750..41d222e 100755..100644
--- a/rtl8723DS/include/rtl8821c_hal.h
+++ b/rtl8723DS/include/rtl8821c_hal.h
@@ -75,6 +75,7 @@ void init_hal_spec_rtl8821c(PADAPTER);
 void rtl8821c_prepare_mp_txdesc(PADAPTER, struct mp_priv *);	/* rtw_mp.c */
 void rtl8821c_mp_config_rfpath(PADAPTER);			/* hal_mp.c */
 #endif
+void rtl8821c_dl_rsvd_page(PADAPTER adapter, u8 mstatus);
 
 #ifdef CONFIG_PCI_HCI
 u16 get_txbd_rw_reg(u16 q_idx);
diff --git a/rtl8723DS/include/rtl8821c_spec.h b/rtl8723DS/include/rtl8821c_spec.h
index 6184332..949f349 100755..100644
--- a/rtl8723DS/include/rtl8821c_spec.h
+++ b/rtl8723DS/include/rtl8821c_spec.h
@@ -29,7 +29,7 @@
 #define REG_C2HEVT_MSG_NORMAL		0x1A0			/* hal_com.c */
 #define REG_C2HEVT_CLEAR			0x1AF			/* hal_com.c */
 #define REG_BCN_CTRL_1				REG_BCN_CTRL_CLINT0_8821C/* hal_com.c */
-#define REG_TSFTR1					REG_FREERUN_CNT_8821C	/* hal_com.c */
+
 #define REG_WOWLAN_WAKE_REASON	0x01C7
 #define REG_GPIO_PIN_CTRL_2			REG_GPIO_EXT_CTRL_8821C
 
@@ -112,7 +112,18 @@
 #define rOFDM0_XBAGCCore1			0xC58	/* phydm only */
 #define rOFDM0_XATxIQImbalance		0xC80	/* phydm only */
 #define rA_LSSIWrite_Jaguar			0xC90	/* RF write addr, LSSI Parameter (rtl8821c_phy.c) */
-#define rA_RFE_Pinmux_Jaguar			0xCB0	/* hal_mp.c */
+/* RFE */
+#define rA_RFE_Pinmux_Jaguar	0xCB0	/* hal_mp.c */
+#define	rB_RFE_Pinmux_Jaguar	0xEB0	/* Path_B RFE control pinmux */
+#define	rA_RFE_Inv_Jaguar		0xCB4	/* Path_A RFE cotrol */  
+#define	rB_RFE_Inv_Jaguar		0xEB4	/* Path_B RFE control */
+#define	rA_RFE_Jaguar			0xCB8 	/* Path_A RFE cotrol */  
+#define	rB_RFE_Jaguar			0xEB8	/* Path_B RFE control */
+#define	rA_RFE_Inverse_Jaguar	0xCBC	/* Path_A RFE control inverse */
+#define	rB_RFE_Inverse_Jaguar	0xEBC	/* Path_B RFE control inverse */
+#define	r_ANTSEL_SW_Jaguar		0x900	/* ANTSEL SW Control */
+#define	bMask_RFEInv_Jaguar	0x3FF00000
+#define	bMask_AntselPathFollow_Jaguar 0x00030000   
 
 #define rOFDM1_LSTF					0xD00
 #define rOFDM1_TRxPathEnable			0xD04	/* hal_mp.c */
@@ -131,7 +142,6 @@
 #define rB_TxScale_Jaguar				0xE1C	/* Path_B TX scaling factor (hal_mp.c) */
 #define rB_IGI_Jaguar					0xE50	/* Initial Gain for path-B (hal_mp.c) */
 #define rB_LSSIWrite_Jaguar			0xE90	/* RF write addr, LSSI Parameter (rtl8821c_phy.c) */
-#define rB_RFE_Pinmux_Jaguar			0xEB0	/* hal_mp.c */
 
 /* Page1(0x100) */
 #define bBBResetB					0x100
@@ -177,8 +187,8 @@
 struct hw_port_reg {
 	u32 net_type;	/*reg_offset*/
 	u8 net_type_shift;
-	u32 macaddr;	/*reg_offset*/
-	u32 bssid;	/*reg_offset*/
+	u32 macaddr;		/*reg_offset*/
+	u32 bssid;		/*reg_offset*/
 	u32 bcn_ctl;			/*reg_offset*/
 	u32 tsf_rst;			/*reg_offset*/
 	u8 tsf_rst_bit;
@@ -186,6 +196,7 @@ struct hw_port_reg {
 	u8 bcn_space_shift;
 	u16 bcn_space_mask;
 	u32	ps_aid;			/*reg_offset*/
+	u32	ta;				/*reg_offset*/
 };
 
 #endif /* __RTL8192E_SPEC_H__ */
diff --git a/rtl8723DS/include/rtl8821cs_hal.h b/rtl8723DS/include/rtl8821cs_hal.h
index ceecc15..ceecc15 100755..100644
--- a/rtl8723DS/include/rtl8821cs_hal.h
+++ b/rtl8723DS/include/rtl8821cs_hal.h
diff --git a/rtl8723DS/include/rtl8821cu_hal.h b/rtl8723DS/include/rtl8821cu_hal.h
index aec4372..aec4372 100755..100644
--- a/rtl8723DS/include/rtl8821cu_hal.h
+++ b/rtl8723DS/include/rtl8821cu_hal.h
diff --git a/rtl8723DS/include/rtl8822b_hal.h b/rtl8723DS/include/rtl8822b_hal.h
index 8c4093b..076f824 100755..100644
--- a/rtl8723DS/include/rtl8822b_hal.h
+++ b/rtl8723DS/include/rtl8822b_hal.h
@@ -38,7 +38,7 @@
 #define REG_C2HEVT_MSG_NORMAL	0x1A0			/* hal_com.c */
 #define REG_C2HEVT_CLEAR	0x1AF			/* hal_com.c */
 #define REG_BCN_CTRL_1		REG_BCN_CTRL_CLINT0_8822B	/* hal_com.c */
-#define REG_TSFTR1		REG_FREERUN_CNT_8822B	/* hal_com.c */
+
 #define REG_WOWLAN_WAKE_REASON	0x01C7 /* hal_com.c */
 #define REG_GPIO_PIN_CTRL_2		REG_GPIO_EXT_CTRL_8822B		/* hal_com.c */
 
@@ -128,7 +128,6 @@
 #define rOFDM0_XBAGCCore1		0xC58	/* phydm only */
 #define rOFDM0_XATxIQImbalance		0xC80	/* phydm only */
 #define rA_LSSIWrite_Jaguar		0xC90	/* RF write addr, LSSI Parameter (rtl8822b_phy.c) */
-#define rA_RFE_Pinmux_Jaguar		0xCB0	/* hal_mp.c */
 
 #define rOFDM1_LSTF			0xD00
 #define rOFDM1_TRxPathEnable		0xD04	/* hal_mp.c */
@@ -147,7 +146,22 @@
 #define rB_TxScale_Jaguar		0xE1C	/* Path_B TX scaling factor (hal_mp.c) */
 #define rB_IGI_Jaguar			0xE50	/* Initial Gain for path-B (hal_mp.c) */
 #define rB_LSSIWrite_Jaguar		0xE90	/* RF write addr, LSSI Parameter (rtl8822b_phy.c) */
-#define rB_RFE_Pinmux_Jaguar		0xEB0	/* hal_mp.c */
+/* RFE */
+#define rA_RFE_Pinmux_Jaguar	0xCB0	/* hal_mp.c */
+#define	rB_RFE_Pinmux_Jaguar	0xEB0	/* Path_B RFE control pinmux */
+#define	rA_RFE_Inv_Jaguar		0xCB4	/* Path_A RFE cotrol */  
+#define	rB_RFE_Inv_Jaguar		0xEB4	/* Path_B RFE control */
+#define	rA_RFE_Jaguar			0xCB8 	/* Path_A RFE cotrol */  
+#define	rB_RFE_Jaguar			0xEB8	/* Path_B RFE control */
+#define	rA_RFE_Inverse_Jaguar	0xCBC	/* Path_A RFE control inverse */
+#define	rB_RFE_Inverse_Jaguar	0xEBC	/* Path_B RFE control inverse */
+#define	r_ANTSEL_SW_Jaguar		0x900	/* ANTSEL SW Control */
+#define	bMask_RFEInv_Jaguar	0x3FF00000
+#define	bMask_AntselPathFollow_Jaguar 0x00030000
+
+#define		rC_RFE_Pinmux_Jaguar	0x18B4	/* Path_C RFE cotrol pinmux*/
+#define		rD_RFE_Pinmux_Jaguar	0x1AB4	/* Path_D RFE cotrol pinmux*/
+#define		rA_RFE_Sel_Jaguar2		0x1990
 
 /* Page1(0x100) */
 #define bBBResetB			0x100
@@ -203,6 +217,7 @@ void rtl8822b_init_hal_spec(PADAPTER);				/* hal/hal_com.c */
 void rtl8822b_prepare_mp_txdesc(PADAPTER, struct mp_priv *);	/* rtw_mp.c */
 void rtl8822b_mp_config_rfpath(PADAPTER);			/* hal_mp.c */
 #endif
+void hw_var_set_dl_rsvd_page(PADAPTER adapter, u8 mstatus);
 
 #ifdef CONFIG_USB_HCI
 #include <rtl8822bu_hal.h>
diff --git a/rtl8723DS/include/rtl8822bs_hal.h b/rtl8723DS/include/rtl8822bs_hal.h
index ffaddee..ffaddee 100755..100644
--- a/rtl8723DS/include/rtl8822bs_hal.h
+++ b/rtl8723DS/include/rtl8822bs_hal.h
diff --git a/rtl8723DS/include/rtl8822bu_hal.h b/rtl8723DS/include/rtl8822bu_hal.h
index 39618c9..39618c9 100755..100644
--- a/rtl8723DS/include/rtl8822bu_hal.h
+++ b/rtl8723DS/include/rtl8822bu_hal.h
diff --git a/rtl8723DS/include/rtw_android.h b/rtl8723DS/include/rtw_android.h
index 424a64e..efc981a 100755..100644
--- a/rtl8723DS/include/rtw_android.h
+++ b/rtl8723DS/include/rtw_android.h
@@ -30,6 +30,7 @@ enum ANDROID_WIFI_CMD {
 	ANDROID_WIFI_CMD_BTCOEXSCAN_START,
 	ANDROID_WIFI_CMD_BTCOEXSCAN_STOP,
 	ANDROID_WIFI_CMD_BTCOEXMODE,
+	ANDROID_WIFI_CMD_SETSUSPENDMODE,
 	ANDROID_WIFI_CMD_SETSUSPENDOPT,
 	ANDROID_WIFI_CMD_P2P_DEV_ADDR,
 	ANDROID_WIFI_CMD_SETFWPATH,
@@ -69,6 +70,7 @@ enum ANDROID_WIFI_CMD {
 	ANDROID_WIFI_CMD_GTK_REKEY_OFFLOAD,
 #endif /* CONFIG_GTK_OL */
 	ANDROID_WIFI_CMD_P2P_DISABLE,
+	ANDROID_WIFI_CMD_SET_AEK,
 	ANDROID_WIFI_CMD_DRIVERVERSION,
 	ANDROID_WIFI_CMD_MAX
 };
@@ -92,11 +94,11 @@ int wifi_set_power(int on, unsigned long msec);
 int wifi_get_mac_addr(unsigned char *buf);
 void *wifi_get_country_code(char *ccode);
 #else
-static int rtw_android_wifictrl_func_add(void)
+static inline int rtw_android_wifictrl_func_add(void)
 {
 	return 0;
 }
-static void rtw_android_wifictrl_func_del(void) {}
+static inline void rtw_android_wifictrl_func_del(void) {}
 #endif /* defined(RTW_ENABLE_WIFI_CONTROL_FUNC) */
 
 #ifdef CONFIG_GPIO_WAKEUP
diff --git a/rtl8723DS/include/rtw_ap.h b/rtl8723DS/include/rtw_ap.h
index 8a57517..7ad94d6 100755..100644
--- a/rtl8723DS/include/rtw_ap.h
+++ b/rtl8723DS/include/rtw_ap.h
@@ -43,11 +43,15 @@ int rtw_check_beacon_data(_adapter *padapter, u8 *pbuf,  int len);
 void rtw_ap_restore_network(_adapter *padapter);
 
 #if CONFIG_RTW_MACADDR_ACL
-void rtw_set_macaddr_acl(_adapter *adapter, int mode);
-int rtw_acl_add_sta(_adapter *adapter, const u8 *addr);
-int rtw_acl_remove_sta(_adapter *adapter, const u8 *addr);
+void rtw_macaddr_acl_init(_adapter *adapter, u8 period);
+void rtw_macaddr_acl_deinit(_adapter *adapter, u8 period);
+void rtw_macaddr_acl_clear(_adapter *adapter, u8 period);
+void rtw_set_macaddr_acl(_adapter *adapter, u8 period, int mode);
+int rtw_acl_add_sta(_adapter *adapter, u8 period, const u8 *addr);
+int rtw_acl_remove_sta(_adapter *adapter, u8 period, const u8 *addr);
 #endif /* CONFIG_RTW_MACADDR_ACL */
 
+u8 rtw_ap_set_sta_key(_adapter *adapter, const u8 *addr, u8 alg, const u8 *key, u8 keyid, u8 gk);
 u8 rtw_ap_set_pairwise_key(_adapter *padapter, struct sta_info *psta);
 int rtw_ap_set_group_key(_adapter *padapter, u8 *key, u8 alg, int keyid);
 int rtw_ap_set_wep_key(_adapter *padapter, u8 *key, u8 keylen, int keyid, u8 set_tx);
@@ -66,7 +70,8 @@ void stop_ap_mode(_adapter *padapter);
 #endif
 
 void rtw_ap_update_bss_chbw(_adapter *adapter, WLAN_BSSID_EX *bss, u8 ch, u8 bw, u8 offset);
-bool rtw_ap_chbw_decision(_adapter *adapter, s16 req_ch, s8 req_bw, s8 req_offset, u8 *ch, u8 *bw, u8 *offset, u8 *chbw_allow);
+u8 rtw_ap_chbw_decision(_adapter *adapter, u8 ifbmp, u8 excl_ifbmp
+	, s16 req_ch, s8 req_bw, s8 req_offset, u8 *ch, u8 *bw, u8 *offset, u8 *chbw_allow);
 
 #ifdef CONFIG_AUTO_AP_MODE
 void rtw_auto_ap_rx_msg_dump(_adapter *padapter, union recv_frame *precv_frame, u8 *ehdr_pos);
@@ -88,8 +93,15 @@ void rtw_update_bmc_sta_tx_rate(_adapter *adapter);
 
 void rtw_process_ht_action_smps(_adapter *padapter, u8 *ta, u8 ctrl_field);
 void rtw_process_public_act_bsscoex(_adapter *padapter, u8 *pframe, uint frame_len);
+#ifdef CONFIG_80211N_HT
 int rtw_ht_operation_update(_adapter *padapter);
-u8 rtw_ap_sta_linking_state_check(_adapter *adapter);
+#endif /* CONFIG_80211N_HT */
+u8 rtw_ap_sta_states_check(_adapter *adapter);
+
+#ifdef CONFIG_FW_HANDLE_TXBCN
+#define rtw_ap_get_nums(adapter)	(adapter_to_dvobj(adapter)->nr_ap_if)
+bool rtw_ap_nums_check(_adapter *adapter);
+#endif
 
 #ifdef CONFIG_SWTIMER_BASED_TXBCN
 void tx_beacon_handlder(struct dvobj_priv *pdvobj);
diff --git a/rtl8723DS/include/rtw_beamforming.h b/rtl8723DS/include/rtw_beamforming.h
index c0d6e0d..cca5bcc 100755..100644
--- a/rtl8723DS/include/rtw_beamforming.h
+++ b/rtl8723DS/include/rtw_beamforming.h
@@ -208,6 +208,7 @@ struct beamforming_info {
 	u32 beamformee_mu_reg_maping;
 	u8 first_mu_bfee_index;
 	u8 mu_bfer_curidx;
+	u8 cur_csi_rpt_rate;
 
 	struct sounding_info sounding_info;
 	/* schedule regular timer for sounding */
@@ -257,6 +258,21 @@ void rtw_bf_update_traffic(PADAPTER);
 #define beamforming_wk_cmd				rtw_bf_cmd
 #define update_attrib_txbf_info				rtw_bf_update_attrib
 
+#define HT_BF_CAP(adapter) ((adapter)->mlmepriv.htpriv.beamform_cap)
+#define VHT_BF_CAP(adapter) ((adapter)->mlmepriv.vhtpriv.beamform_cap)
+
+#define IS_HT_BEAMFORMEE(adapter) \
+		(HT_BF_CAP(adapter) & \
+		(BEAMFORMING_HT_BEAMFORMEE_ENABLE))
+
+#define IS_VHT_BEAMFORMEE(adapter) \
+		(VHT_BF_CAP(adapter) & \
+		(BEAMFORMING_VHT_BEAMFORMEE_ENABLE | \
+		 BEAMFORMING_VHT_MU_MIMO_STA_ENABLE))
+
+#define IS_BEAMFORMEE(adapter) (IS_HT_BEAMFORMEE(adapter) | \
+				IS_VHT_BEAMFORMEE(adapter))
+
 #else /* !RTW_BEAMFORMING_VERSION_2 */
 
 #if (BEAMFORMING_SUPPORT == 0) /*for diver defined beamforming*/
@@ -311,7 +327,7 @@ struct beamforming_entry {
 	u16	mac_id;		/* Used to Set Reg42C in IBSS mode. */
 	u16	p_aid;		/* Used to fill Reg42C & Reg714 to compare with P_AID of Tx DESC. */
 	u16 g_id;
-	u8	mac_addr[6];/* Used to fill Reg6E4 to fill Mac address of CSI report frame. */
+	u8	mac_addr[ETH_ALEN];/* Used to fill Reg6E4 to fill Mac address of CSI report frame. */
 	enum channel_width	sound_bw;	/* Sounding BandWidth */
 	u16	sound_period;
 	BEAMFORMING_CAP	beamforming_entry_cap;
diff --git a/rtl8723DS/include/rtw_br_ext.h b/rtl8723DS/include/rtw_br_ext.h
index 54ba75e..54ba75e 100755..100644
--- a/rtl8723DS/include/rtw_br_ext.h
+++ b/rtl8723DS/include/rtw_br_ext.h
diff --git a/rtl8723DS/include/rtw_bt_mp.h b/rtl8723DS/include/rtw_bt_mp.h
index a152d18..a152d18 100755..100644
--- a/rtl8723DS/include/rtw_bt_mp.h
+++ b/rtl8723DS/include/rtw_bt_mp.h
diff --git a/rtl8723DS/include/rtw_btcoex.h b/rtl8723DS/include/rtw_btcoex.h
index fd42248..fd42248 100755..100644
--- a/rtl8723DS/include/rtw_btcoex.h
+++ b/rtl8723DS/include/rtw_btcoex.h
diff --git a/rtl8723DS/include/rtw_btcoex_wifionly.h b/rtl8723DS/include/rtw_btcoex_wifionly.h
index c5a0740..93087eb 100755..100644
--- a/rtl8723DS/include/rtw_btcoex_wifionly.h
+++ b/rtl8723DS/include/rtw_btcoex_wifionly.h
@@ -17,6 +17,7 @@
 
 void rtw_btcoex_wifionly_switchband_notify(PADAPTER padapter);
 void rtw_btcoex_wifionly_scan_notify(PADAPTER padapter);
+void rtw_btcoex_wifionly_connect_notify(PADAPTER padapter);
 void rtw_btcoex_wifionly_hw_config(PADAPTER padapter);
 void rtw_btcoex_wifionly_initialize(PADAPTER padapter);
 void rtw_btcoex_wifionly_AntInfoSetting(PADAPTER padapter);
diff --git a/rtl8723DS/include/rtw_byteorder.h b/rtl8723DS/include/rtw_byteorder.h
index 8e6bb7a..8e6bb7a 100755..100644
--- a/rtl8723DS/include/rtw_byteorder.h
+++ b/rtl8723DS/include/rtw_byteorder.h
diff --git a/rtl8723DS/include/rtw_cmd.h b/rtl8723DS/include/rtw_cmd.h
index eb81f50..d51a7a5 100755..100644
--- a/rtl8723DS/include/rtw_cmd.h
+++ b/rtl8723DS/include/rtw_cmd.h
@@ -150,6 +150,10 @@ struct P2P_PS_Offload_t {
 	u8 AllStaSleep:1; /* Only valid in Owner */
 	u8 discovery:1;
 	u8 rsvd:1;
+#ifdef CONFIG_P2P_PS_NOA_USE_MACID_SLEEP
+	u8 p2p_macid:7;
+	u8 disable_close_rf:1; /*1: not close RF but just pause p2p_macid when NoA duration*/
+#endif /* CONFIG_P2P_PS_NOA_USE_MACID_SLEEP */
 };
 
 struct P2P_PS_CTWPeriod_t {
@@ -246,9 +250,11 @@ enum rtw_drvextra_cmd_id {
 	BEAMFORMING_WK_CID,
 	LPS_CHANGE_DTIM_CID,
 	BTINFO_WK_CID,
-	DFS_MASTER_WK_CID,
+	DFS_RADAR_DETECT_WK_CID,
+	DFS_RADAR_DETECT_EN_DEC_WK_CID,
 	SESSION_TRACKER_WK_CID,
 	EN_HW_UPDATE_TSF_WK_CID,
+	PERIOD_TSF_UPDATE_END_WK_CID,
 	TEST_H2C_CID,
 	MP_CMD_WK_CID,
 	CUSTOMER_STR_WK_CID,
@@ -259,6 +265,11 @@ enum rtw_drvextra_cmd_id {
 #ifdef CONFIG_MCC_MODE
 	MCC_SET_DURATION_WK_CID,
 #endif /* CONFIG_MCC_MODE */
+	REQ_PER_CMD_WK_CID,
+	SSMPS_WK_CID,
+#ifdef CONFIG_CTRL_TXSS_BY_TP
+	TXSS_WK_CID,
+#endif
 	MAX_WK_CID
 };
 
@@ -343,7 +354,9 @@ Command Mode
 struct createbss_parm {
 	bool adhoc;
 
-	/* used by AP mode now */
+	/* used by AP/Mesh mode now */
+	u8 ifbmp;
+	u8 excl_ifbmp;
 	s16 req_ch;
 	s8 req_bw;
 	s8 req_offset;
@@ -437,10 +450,11 @@ when shared key ==> algorithm/keyid
 
 */
 struct set_stakey_parm {
-	u8	addr[ETH_ALEN];
-	u8	algorithm;
-	u8	keyid;
-	u8	key[16];
+	u8 addr[ETH_ALEN];
+	u8 algorithm;
+	u8 keyid;
+	u8 key[16];
+	u8 gk;
 };
 
 struct set_stakey_rsp {
@@ -959,11 +973,6 @@ struct LedBlink_param {
 	PVOID	 pLed;
 };
 
-/*H2C Handler index: 61 */
-struct SetChannelSwitch_param {
-	u8 new_ch_no;
-};
-
 /*H2C Handler index: 62 */
 struct TDLSoption_param {
 	u8 addr[ETH_ALEN];
@@ -1011,7 +1020,14 @@ void rtw_init_sitesurvey_parm(_adapter *padapter, struct sitesurvey_parm *pparm)
 u8 rtw_sitesurvey_cmd(_adapter *padapter, struct sitesurvey_parm *pparm);
 u8 rtw_create_ibss_cmd(_adapter *adapter, int flags);
 u8 rtw_startbss_cmd(_adapter *adapter, int flags);
-u8 rtw_change_bss_chbw_cmd(_adapter *adapter, int flags, s16 req_ch, s8 req_bw, s8 req_offset);
+
+#define REQ_CH_NONE		-1
+#define REQ_BW_NONE		-1
+#define REQ_BW_ORI		-2
+#define REQ_OFFSET_NONE	-1
+
+u8 rtw_change_bss_chbw_cmd(_adapter *adapter, int flags
+	, u8 ifbmp, u8 excl_ifbmp, s16 req_ch, s8 req_bw, s8 req_offset);
 
 extern u8 rtw_setphy_cmd(_adapter  *padapter, u8 modem, u8 ch);
 
@@ -1042,7 +1058,7 @@ extern u8 rtw_addbareq_cmd(_adapter *padapter, u8 tid, u8 *addr);
 extern u8 rtw_addbarsp_cmd(_adapter *padapter, u8 *addr, u16 tid, u8 status, u8 size, u16 start_seq);
 /* add for CONFIG_IEEE80211W, none 11w also can use */
 extern u8 rtw_reset_securitypriv_cmd(_adapter *padapter);
-extern u8 rtw_free_assoc_resources_cmd(_adapter *padapter);
+extern u8 rtw_free_assoc_resources_cmd(_adapter *padapter, u8 lock_scanned_queue, int flags);
 extern u8 rtw_dynamic_chk_wk_cmd(_adapter *adapter);
 
 u8 rtw_lps_ctrl_wk_cmd(_adapter *padapter, u8 lps_ctrl_type, u8 enqueue);
@@ -1061,14 +1077,17 @@ u8 rtw_dm_ra_mask_wk_cmd(_adapter *padapter, u8 *psta);
 
 extern u8 rtw_ps_cmd(_adapter *padapter);
 
+#ifdef CONFIG_DFS
+void rtw_dfs_ch_switch_hdl(struct dvobj_priv *dvobj);
+#endif
+
 #ifdef CONFIG_AP_MODE
 u8 rtw_chk_hi_queue_cmd(_adapter *padapter);
 #ifdef CONFIG_DFS_MASTER
-u8 rtw_dfs_master_cmd(_adapter *adapter, bool enqueue);
-void rtw_dfs_master_timer_hdl(void *ctx);
-void rtw_dfs_master_enable(_adapter *adapter, u8 ch, u8 bw, u8 offset);
-void rtw_dfs_master_disable(_adapter *adapter, u8 ch, u8 bw, u8 offset, bool by_others);
-void rtw_dfs_master_status_apply(_adapter *adapter, u8 self_action);
+u8 rtw_dfs_rd_cmd(_adapter *adapter, bool enqueue);
+void rtw_dfs_rd_timer_hdl(void *ctx);
+void rtw_dfs_rd_en_decision(_adapter *adapter, u8 mlme_act, u8 excl_ifbmp);
+u8 rtw_dfs_rd_en_decision_cmd(_adapter *adapter);
 #endif /* CONFIG_DFS_MASTER */
 #endif /* CONFIG_AP_MODE */
 
@@ -1079,6 +1098,7 @@ u8 rtw_btinfo_cmd(PADAPTER padapter, u8 *pbuf, u16 length);
 u8 rtw_test_h2c_cmd(_adapter *adapter, u8 *buf, u8 len);
 
 u8 rtw_enable_hw_update_tsf_cmd(_adapter *padapter);
+u8 rtw_periodic_tsf_update_end_cmd(_adapter *adapter);
 
 u8 rtw_set_chbw_cmd(_adapter *padapter, u8 ch, u8 bw, u8 ch_offset, u8 flags);
 
@@ -1086,7 +1106,7 @@ u8 rtw_set_chplan_cmd(_adapter *adapter, int flags, u8 chplan, u8 swconfig);
 u8 rtw_set_country_cmd(_adapter *adapter, int flags, const char *country_code, u8 swconfig);
 
 extern u8 rtw_led_blink_cmd(_adapter *padapter, PVOID pLed);
-extern u8 rtw_set_csa_cmd(_adapter *padapter, u8 new_ch_no);
+extern u8 rtw_set_csa_cmd(_adapter *adapter);
 extern u8 rtw_tdls_cmd(_adapter *padapter, u8 *addr, u8 option);
 
 u8 rtw_mp_cmd(_adapter *adapter, u8 mp_cmd_id, u8 flags);
@@ -1111,10 +1131,35 @@ u8 rtw_rson_scan_wk_cmd(_adapter *adapter, int op);
 
 u8 rtw_run_in_thread_cmd(PADAPTER padapter, void (*func)(void *), void *context);
 
+struct ssmps_cmd_parm {
+	struct sta_info *sta;
+	u8 smps;
+};
+u8 rtw_ssmps_wk_cmd(_adapter *adapter, struct sta_info *sta, u8 smps, u8 enqueue);
+
 u8 session_tracker_chk_cmd(_adapter *adapter, struct sta_info *sta);
 u8 session_tracker_add_cmd(_adapter *adapter, struct sta_info *sta, u8 *local_naddr, u8 *local_port, u8 *remote_naddr, u8 *remote_port);
 u8 session_tracker_del_cmd(_adapter *adapter, struct sta_info *sta, u8 *local_naddr, u8 *local_port, u8 *remote_naddr, u8 *remote_port);
 
+#if defined(CONFIG_RTW_MESH) && defined(RTW_PER_CMD_SUPPORT_FW)
+u8 rtw_req_per_cmd(_adapter * adapter);
+#endif
+
+#ifdef CONFIG_CTRL_TXSS_BY_TP
+struct txss_cmd_parm {
+	struct sta_info *sta;
+	u8 tx_1ss;
+};
+
+void rtw_ctrl_txss_update_mimo_type(_adapter *adapter, struct sta_info *sta);
+u8 rtw_ctrl_txss(_adapter *adapter, struct sta_info *sta, u8 tx_1ss);
+void rtw_ctrl_tx_ss_by_tp(_adapter *adapter, u8 from_timer);
+
+#ifdef DBG_CTRL_TXSS
+void dbg_ctrl_txss(_adapter *adapter, u8 tx_1ss);
+#endif
+#endif
+
 u8 rtw_drvextra_cmd_hdl(_adapter *padapter, unsigned char *pbuf);
 
 extern void rtw_survey_cmd_callback(_adapter  *padapter, struct cmd_obj *pcmd);
diff --git a/rtl8723DS/include/rtw_debug.h b/rtl8723DS/include/rtw_debug.h
index 80fb6d8..754ded9 100755..100644
--- a/rtl8723DS/include/rtw_debug.h
+++ b/rtl8723DS/include/rtw_debug.h
@@ -68,8 +68,6 @@ extern void rtl871x_cedbg(const char *fmt, ...);
 
 #define RTW_DBGDUMP 0 /* 'stream' for _dbgdump */
 
-/* don't use these 3 APIs anymore, will be removed later */
-#define RT_TRACE(_Comp, _Level, Fmt) do {} while (0)
 
 
 #undef _dbgdump
@@ -308,12 +306,6 @@ int proc_get_rf_info(struct seq_file *m, void *v);
 int proc_get_scan_param(struct seq_file *m, void *v);
 ssize_t proc_set_scan_param(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data);
 int proc_get_scan_abort(struct seq_file *m, void *v);
-#ifdef CONFIG_SCAN_BACKOP
-int proc_get_backop_flags_sta(struct seq_file *m, void *v);
-ssize_t proc_set_backop_flags_sta(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data);
-int proc_get_backop_flags_ap(struct seq_file *m, void *v);
-ssize_t proc_set_backop_flags_ap(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data);
-#endif /* CONFIG_SCAN_BACKOP */
 #ifdef CONFIG_RTW_REPEATER_SON
 int proc_get_rson_data(struct seq_file *m, void *v);
 ssize_t proc_set_rson_data(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data);
@@ -321,6 +313,9 @@ ssize_t proc_set_rson_data(struct file *file, const char __user *buffer, size_t
 int proc_get_survey_info(struct seq_file *m, void *v);
 ssize_t proc_set_survey_info(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data);
 int proc_get_ap_info(struct seq_file *m, void *v);
+#ifdef ROKU_PRIVATE
+int proc_get_infra_ap(struct seq_file *m, void *v);
+#endif /* ROKU_PRIVATE */
 ssize_t proc_reset_trx_info(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data);
 int proc_get_trx_info(struct seq_file *m, void *v);
 ssize_t proc_set_tx_power_offset(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data);
@@ -340,9 +335,6 @@ int proc_get_bmc_tx_rate(struct seq_file *m, void *v);
 ssize_t proc_set_bmc_tx_rate(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data);
 #endif /*CONFIG_AP_MODE*/
 
-int proc_get_dis_pwt(struct seq_file *m, void *v);
-ssize_t proc_set_dis_pwt(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data);
-
 int proc_get_ps_dbg_info(struct seq_file *m, void *v);
 ssize_t proc_set_ps_dbg_info(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data);
 
@@ -351,16 +343,17 @@ bool rtw_fwdl_test_trigger_wintint_rdy_fail(void);
 ssize_t proc_set_fwdl_test_case(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data);
 bool rtw_del_rx_ampdu_test_trigger_no_tx_fail(void);
 ssize_t proc_set_del_rx_ampdu_test_case(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data);
-#ifdef CONFIG_DFS_MASTER
-int proc_get_dfs_master_test_case(struct seq_file *m, void *v);
-ssize_t proc_set_dfs_master_test_case(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data);
-#endif /* CONFIG_DFS_MASTER */
 u32 rtw_get_wait_hiq_empty_ms(void);
 ssize_t proc_set_wait_hiq_empty(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data);
 void rtw_sta_linking_test_set_start(void);
 bool rtw_sta_linking_test_wait_done(void);
 bool rtw_sta_linking_test_force_fail(void);
 ssize_t proc_set_sta_linking_test(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data);
+#ifdef CONFIG_AP_MODE
+u16 rtw_ap_linking_test_force_auth_fail(void);
+u16 rtw_ap_linking_test_force_asoc_fail(void);
+ssize_t proc_set_ap_linking_test(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data);
+#endif
 
 int proc_get_rx_stat(struct seq_file *m, void *v);
 int proc_get_tx_stat(struct seq_file *m, void *v);
@@ -379,10 +372,15 @@ ssize_t proc_set_best_channel(struct file *file, const char __user *buffer, size
 
 int proc_get_trx_info_debug(struct seq_file *m, void *v);
 
+#ifdef CONFIG_HUAWEI_PROC
+int proc_get_huawei_trx_info(struct seq_file *m, void *v);
+#endif
+
 int proc_get_rx_signal(struct seq_file *m, void *v);
 ssize_t proc_set_rx_signal(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data);
 int proc_get_hw_status(struct seq_file *m, void *v);
 ssize_t proc_set_hw_status(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data);
+int proc_get_mac_rptbuf(struct seq_file *m, void *v);
 
 #ifdef CONFIG_80211N_HT
 int proc_get_ht_enable(struct seq_file *m, void *v);
@@ -394,8 +392,6 @@ ssize_t proc_set_bw_mode(struct file *file, const char __user *buffer, size_t co
 int proc_get_ampdu_enable(struct seq_file *m, void *v);
 ssize_t proc_set_ampdu_enable(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data);
 
-int proc_get_mac_rptbuf(struct seq_file *m, void *v);
-
 void dump_regsty_rx_ampdu_size_limit(void *sel, _adapter *adapter);
 int proc_get_rx_ampdu(struct seq_file *m, void *v);
 ssize_t proc_set_rx_ampdu(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data);
@@ -471,6 +467,13 @@ int proc_get_int_logs(struct seq_file *m, void *v);
 int proc_get_rx_ring(struct seq_file *m, void *v);
 int proc_get_tx_ring(struct seq_file *m, void *v);
 int proc_get_pci_aspm(struct seq_file *m, void *v);
+int proc_get_pci_conf_space(struct seq_file *m, void *v);
+ssize_t proc_set_pci_conf_space(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data);
+
+int proc_get_pci_bridge_conf_space(struct seq_file *m, void *v);
+ssize_t proc_set_pci_bridge_conf_space(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data);
+
+
 #ifdef DBG_TXBD_DESC_DUMP
 int proc_get_tx_ring_ext(struct seq_file *m, void *v);
 ssize_t proc_set_tx_ring_ext(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data);
@@ -502,6 +505,7 @@ ssize_t proc_set_new_bcn_max(struct file *file, const char __user *buffer, size_
 
 #ifdef CONFIG_POWER_SAVING
 int proc_get_ps_info(struct seq_file *m, void *v);
+ssize_t proc_set_ps_info(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data);
 #ifdef CONFIG_WMMPS_STA	
 int proc_get_wmmps_info(struct seq_file *m, void *v);
 ssize_t proc_set_wmmps_info(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data);
@@ -540,6 +544,11 @@ int proc_get_tx_auth(struct seq_file *m, void *v);
 int proc_get_efuse_map(struct seq_file *m, void *v);
 ssize_t proc_set_efuse_map(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data);
 
+#ifdef CONFIG_CUSTOMER01_SMART_ANTENNA
+int proc_get_pathb_phase(struct seq_file *m, void *v);
+ssize_t proc_set_pathb_phase(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data);
+#endif
+
 #ifdef CONFIG_MCC_MODE
 int proc_get_mcc_info(struct seq_file *m, void *v);
 ssize_t proc_set_mcc_enable(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data);
@@ -560,6 +569,11 @@ ssize_t proc_set_ack_timeout(struct file *file, const char __user *buffer, size_
 int proc_get_fw_offload(struct seq_file *m, void *v);
 ssize_t proc_set_fw_offload(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data);
 
+#ifdef CONFIG_FW_HANDLE_TXBCN
+ssize_t proc_set_fw_tbtt_rpt(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data);
+int proc_get_fw_tbtt_rpt(struct seq_file *m, void *v);
+#endif
+
 #ifdef CONFIG_DBG_RF_CAL
 int proc_get_iqk_info(struct seq_file *m, void *v);
 ssize_t proc_set_iqk(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data);
@@ -567,6 +581,25 @@ int proc_get_lck_info(struct seq_file *m, void *v);
 ssize_t proc_set_lck(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data);
 #endif /*CONFIG_DBG_RF_CAL*/
 
+#ifdef CONFIG_CTRL_TXSS_BY_TP
+ssize_t proc_set_txss_tp(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data);
+int proc_get_txss_tp(struct seq_file *m, void *v);
+#ifdef DBG_CTRL_TXSS
+ssize_t proc_set_txss_ctrl(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data);
+int proc_get_txss_ctrl(struct seq_file *m, void *v);
+#endif
+#endif
+
+#ifdef CONFIG_LPS_CHK_BY_TP
+ssize_t proc_set_lps_chk_tp(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data);
+int proc_get_lps_chk_tp(struct seq_file *m, void *v);
+#endif
+
+#ifdef CONFIG_SUPPORT_STATIC_SMPS
+ssize_t proc_set_smps(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data);
+int proc_get_smps(struct seq_file *m, void *v);
+#endif
+
 #define _drv_always_		1
 #define _drv_emerg_			2
 #define _drv_alert_			3
diff --git a/rtl8723DS/include/rtw_eeprom.h b/rtl8723DS/include/rtw_eeprom.h
index 62304d5..62304d5 100755..100644
--- a/rtl8723DS/include/rtw_eeprom.h
+++ b/rtl8723DS/include/rtw_eeprom.h
diff --git a/rtl8723DS/include/rtw_efuse.h b/rtl8723DS/include/rtw_efuse.h
index 2e73342..3052702 100755..100644
--- a/rtl8723DS/include/rtw_efuse.h
+++ b/rtl8723DS/include/rtw_efuse.h
@@ -50,7 +50,7 @@ enum _EFUSE_DEF_TYPE {
 #define		EFUSE_MAX_SECTION_NUM	128
 #define		EFUSE_MAX_BANK_SIZE		512
 
-/*RTL8822B 8821C BT EFUSE Define 1 BANK 128 size logical map 1024*/ 
+/*RTL8822B 8821C BT EFUSE Define 1 BANK 128 size logical map 1024*/
 #ifdef RTW_HALMAC
 #define BANK_NUM		1
 #define EFUSE_BT_REAL_BANK_CONTENT_LEN	128
@@ -179,13 +179,6 @@ extern u8 fakeBTEfuseModifiedMap[];
 #define		MAX_SEGMENT_NUM			200
 #define		MAX_BUF_SIZE				(MAX_SEGMENT_SIZE*MAX_SEGMENT_NUM)
 #define		TMP_BUF_SIZE				100
-
-static	u8	dcmd_Return_Buffer[MAX_BUF_SIZE] = {0};
-static	u32	dcmd_Buf_Idx = 0;
-static	u32	dcmd_Finifh_Flag = 0;
-
-static	char	dcmd_Buf[TMP_BUF_SIZE];
-
 #define		rtprintf					dcmd_Store_Return_Buf
 
 u8	efuse_bt_GetCurrentSize(PADAPTER padapter, u16 *size);
@@ -222,6 +215,9 @@ void	EFUSE_ShadowMapUpdate(PADAPTER pAdapter, u8 efuseType, BOOLEAN bPseudoTest)
 void	EFUSE_ShadowRead(PADAPTER pAdapter, u8 Type, u16 Offset, u32 *Value);
 #define efuse_logical_map_read(adapter, type, offset, value) EFUSE_ShadowRead((adapter), (type), (offset), (value))
 
+BOOLEAN rtw_file_efuse_IsMasked(PADAPTER pAdapter, u16 Offset);
+BOOLEAN efuse_IsMasked(PADAPTER pAdapter, u16 Offset);
+
 VOID	hal_ReadEFuse_BT_logic_map(
 	PADAPTER	padapter,
 	u16			_offset,
diff --git a/rtl8723DS/include/rtw_event.h b/rtl8723DS/include/rtw_event.h
index 8e4d5d6..8e4d5d6 100755..100644
--- a/rtl8723DS/include/rtw_event.h
+++ b/rtl8723DS/include/rtw_event.h
diff --git a/rtl8723DS/include/rtw_ht.h b/rtl8723DS/include/rtw_ht.h
index 85e5a0d..8237bbe 100755..100644
--- a/rtl8723DS/include/rtw_ht.h
+++ b/rtl8723DS/include/rtw_ht.h
@@ -44,9 +44,27 @@ struct ht_priv {
 	u8	beamform_cap;
 	u8	smps_cap; /*spatial multiplexing power save mode. 0:static SMPS, 1:dynamic SMPS, 3:SMPS disabled, 2:reserved*/
 
+	u8 op_present:1; /* ht_op is present */
+
 	struct rtw_ieee80211_ht_cap ht_cap;
+	u8 ht_op[HT_OP_IE_LEN];
+
+};
 
+#ifdef ROKU_PRIVATE
+struct ht_priv_infra_ap {
+
+	/*Infra mode, only store AP's info , not intersection of STA and AP*/
+	u8	channel_width_infra_ap;
+	u8	sgi_20m_infra_ap;
+	u8	sgi_40m_infra_ap;
+	u8	ldpc_cap_infra_ap;
+	u8	stbc_cap_infra_ap;
+	u8	MCS_set_infra_ap[16];
+	u8	Rx_ss_infra_ap;
+	u16	rx_highest_data_rate_infra_ap;
 };
+#endif /* ROKU_PRIVATE */
 
 typedef enum AGGRE_SIZE {
 	HT_AGG_SIZE_8K = 0,
@@ -59,23 +77,6 @@ typedef enum AGGRE_SIZE {
 	VHT_AGG_SIZE_1024K = 7,
 } AGGRE_SIZE_E, *PAGGRE_SIZE_E;
 
-typedef enum _RT_HT_INF0_CAP {
-	RT_HT_CAP_USE_TURBO_AGGR = 0x01,
-	RT_HT_CAP_USE_LONG_PREAMBLE = 0x02,
-	RT_HT_CAP_USE_AMPDU = 0x04,
-	RT_HT_CAP_USE_WOW = 0x8,
-	RT_HT_CAP_USE_SOFTAP = 0x10,
-	RT_HT_CAP_USE_92SE = 0x20,
-	RT_HT_CAP_USE_88C_92C = 0x40,
-	RT_HT_CAP_USE_AP_CLIENT_MODE = 0x80,	/* AP team request to reserve this bit, by Emily */
-} RT_HT_INF0_CAPBILITY, *PRT_HT_INF0_CAPBILITY;
-
-typedef enum _RT_HT_INF1_CAP {
-	RT_HT_CAP_USE_VIDEO_CLIENT = 0x01,
-	RT_HT_CAP_USE_JAGUAR_BCUT = 0x02,
-	RT_HT_CAP_USE_JAGUAR_CCUT = 0x04,
-} RT_HT_INF1_CAPBILITY, *PRT_HT_INF1_CAPBILITY;
-
 #define	LDPC_HT_ENABLE_RX			BIT0
 #define	LDPC_HT_ENABLE_TX			BIT1
 #define	LDPC_HT_TEST_TX_ENABLE		BIT2
diff --git a/rtl8723DS/include/rtw_io.h b/rtl8723DS/include/rtw_io.h
index 28430d8..cafb12d 100755..100644
--- a/rtl8723DS/include/rtw_io.h
+++ b/rtl8723DS/include/rtw_io.h
@@ -395,10 +395,12 @@ u32 _rtw_write_port_and_wait(_adapter *adapter, u32 addr, u32 cnt, u8 *pmem, int
 extern void _rtw_write_port_cancel(_adapter *adapter);
 
 #ifdef DBG_IO
-bool match_read_sniff_ranges(u32 addr, u16 len);
-bool match_write_sniff_ranges(u32 addr, u16 len);
-bool match_rf_read_sniff_ranges(u8 path, u32 addr, u32 mask);
-bool match_rf_write_sniff_ranges(u8 path, u32 addr, u32 mask);
+struct rtw_io_sniff_ent;
+const char *rtw_io_sniff_ent_get_tag(const struct rtw_io_sniff_ent *ent);
+const struct rtw_io_sniff_ent *match_read_sniff(_adapter *adapter, u32 addr, u16 len, u32 val);
+const struct rtw_io_sniff_ent *match_write_sniff(_adapter *adapter, u32 addr, u16 len, u32 val);
+bool match_rf_read_sniff_ranges(_adapter *adapter, u8 path, u32 addr, u32 mask);
+bool match_rf_write_sniff_ranges(_adapter *adapter, u8 path, u32 addr, u32 mask);
 
 extern u8 dbg_rtw_read8(_adapter *adapter, u32 addr, const char *caller, const int line);
 extern u16 dbg_rtw_read16(_adapter *adapter, u32 addr, const char *caller, const int line);
@@ -455,10 +457,6 @@ int dbg_rtw_sd_iwrite32(_adapter *adapter, u32 addr, u32 val, const char *caller
 #endif /* CONFIG_SDIO_HCI */
 
 #else /* DBG_IO */
-#define match_read_sniff_ranges(addr, len) _FALSE
-#define match_write_sniff_ranges(addr, len) _FALSE
-#define match_rf_read_sniff_ranges(path, addr, mask) _FALSE
-#define match_rf_write_sniff_ranges(path, addr, mask) _FALSE
 #define rtw_read8(adapter, addr) _rtw_read8((adapter), (addr))
 #define rtw_read16(adapter, addr) _rtw_read16((adapter), (addr))
 #define rtw_read32(adapter, addr) _rtw_read32((adapter), (addr))
diff --git a/rtl8723DS/include/rtw_ioctl.h b/rtl8723DS/include/rtw_ioctl.h
index 4924751..4924751 100755..100644
--- a/rtl8723DS/include/rtw_ioctl.h
+++ b/rtl8723DS/include/rtw_ioctl.h
diff --git a/rtl8723DS/include/rtw_ioctl_query.h b/rtl8723DS/include/rtw_ioctl_query.h
index cc7b557..cc7b557 100755..100644
--- a/rtl8723DS/include/rtw_ioctl_query.h
+++ b/rtl8723DS/include/rtw_ioctl_query.h
diff --git a/rtl8723DS/include/rtw_ioctl_rtl.h b/rtl8723DS/include/rtw_ioctl_rtl.h
index 2df8713..2df8713 100755..100644
--- a/rtl8723DS/include/rtw_ioctl_rtl.h
+++ b/rtl8723DS/include/rtw_ioctl_rtl.h
diff --git a/rtl8723DS/include/rtw_ioctl_set.h b/rtl8723DS/include/rtw_ioctl_set.h
index 2bfe570..2bfe570 100755..100644
--- a/rtl8723DS/include/rtw_ioctl_set.h
+++ b/rtl8723DS/include/rtw_ioctl_set.h
diff --git a/rtl8723DS/include/rtw_iol.h b/rtl8723DS/include/rtw_iol.h
index fa35a59..fa35a59 100755..100644
--- a/rtl8723DS/include/rtw_iol.h
+++ b/rtl8723DS/include/rtw_iol.h
diff --git a/rtl8723DS/include/rtw_mcc.h b/rtl8723DS/include/rtw_mcc.h
index 62e880e..718036c 100755..100644
--- a/rtl8723DS/include/rtw_mcc.h
+++ b/rtl8723DS/include/rtw_mcc.h
@@ -100,7 +100,7 @@ enum mcc_status_rpt {
 	MCC_RPT_MAX,
 };
 
-enum MCC_ROLE {
+enum mcc_role {
 	MCC_ROLE_STA = 0,
 	MCC_ROLE_AP = 1,
 	MCC_ROLE_GC = 2,
@@ -129,7 +129,7 @@ enum MCC_SCHED_MODE {
 /*  mcc data for adapter */
 struct mcc_adapter_priv {
 	u8 order;		/* FW document, softap/AP must be 0 */
-	u8 role;			/* MCC role(AP,STA,GO,GC) */
+	enum mcc_role role;			/* MCC role(AP,STA,GO,GC) */
 	u8 mcc_duration; /* channel stay period, UNIT:1TU */
 
 	/* flow control */
@@ -182,12 +182,14 @@ struct mcc_obj_priv {
 	u8 mcc_stop_threshold;
 	u8 current_order;
 	u8 last_tsfdiff;
-	u32 mcc_launch_time; /* mcc launch time, used for starting detect mcc switch channel success */
+	systime mcc_launch_time; /* mcc launch time, used for starting detect mcc switch channel success */
 	_mutex mcc_mutex;
 	_lock mcc_lock;
 	PADAPTER iface[MAX_MCC_NUM]; /* by order, use for mcc parameter cmd */
 	struct submit_ctx mcc_sctx;
 	struct submit_ctx mcc_tsf_req_sctx;
+	_mutex mcc_tsf_req_mutex;
+	u8 mcc_tsf_req_sctx_order; /* record current order for mcc_tsf_req_sctx */
 #ifdef CONFIG_MCC_MODE_V2
 	u8 mcc_iqk_value_rsvd_page[3];
 #endif /* CONFIG_MCC_MODE_V2 */
diff --git a/rtl8723DS/include/rtw_mem.h b/rtl8723DS/include/rtw_mem.h
index 229028c..229028c 100755..100644
--- a/rtl8723DS/include/rtw_mem.h
+++ b/rtl8723DS/include/rtw_mem.h
diff --git a/rtl8723DS/include/rtw_mi.h b/rtl8723DS/include/rtw_mi.h
index dfbac2d..26db46b 100755..100644
--- a/rtl8723DS/include/rtw_mi.h
+++ b/rtl8723DS/include/rtw_mi.h
@@ -18,6 +18,8 @@
 void rtw_mi_update_union_chan_inf(_adapter *adapter, u8 ch, u8 offset , u8 bw);
 u8 rtw_mi_stayin_union_ch_chk(_adapter *adapter);
 u8 rtw_mi_stayin_union_band_chk(_adapter *adapter);
+
+int rtw_mi_get_ch_setting_union_by_ifbmp(struct dvobj_priv *dvobj, u8 ifbmp, u8 *ch, u8 *bw, u8 *offset);
 int rtw_mi_get_ch_setting_union(_adapter *adapter, u8 *ch, u8 *bw, u8 *offset);
 int rtw_mi_get_ch_setting_union_no_self(_adapter *adapter, u8 *ch, u8 *bw, u8 *offset);
 
@@ -48,7 +50,11 @@ struct mi_state {
 	#endif
 	u8 mgmt_tx_num;
 #endif
-
+#ifdef CONFIG_P2P
+	u8 p2p_device_num;
+	u8 p2p_gc;
+	u8 p2p_go;
+#endif
 	u8 union_ch;
 	u8 union_bw;
 	u8 union_offset;
@@ -95,6 +101,16 @@ struct mi_state {
 #define MSTATE_ROCH_NUM(_mstate)		0
 #endif
 
+#ifdef CONFIG_P2P
+#define MSTATE_P2P_DV_NUM(_mstate)		((_mstate)->p2p_device_num)
+#define MSTATE_P2P_GC_NUM(_mstate)		((_mstate)->p2p_gc)
+#define MSTATE_P2P_GO_NUM(_mstate)		((_mstate)->p2p_go)
+#else
+#define MSTATE_P2P_DV_NUM(_mstate)		0
+#define MSTATE_P2P_GC_NUM(_mstate)		0
+#define MSTATE_P2P_GO_NUM(_mstate)		0
+#endif
+
 #if defined(CONFIG_IOCTL_CFG80211)
 #define MSTATE_MGMT_TX_NUM(_mstate)		((_mstate)->mgmt_tx_num)
 #else
@@ -112,8 +128,10 @@ struct mi_state {
 #define rtw_mi_get_assoced_sta_num(adapter)	DEV_STA_LD_NUM(adapter_to_dvobj(adapter))
 #define rtw_mi_get_ap_num(adapter)			DEV_AP_NUM(adapter_to_dvobj(adapter))
 #define rtw_mi_get_mesh_num(adapter)		DEV_MESH_NUM(adapter_to_dvobj(adapter))
+u8 rtw_mi_get_assoc_if_num(_adapter *adapter);
 
 /* For now, not return union_ch/bw/offset */
+void rtw_mi_status_by_ifbmp(struct dvobj_priv *dvobj, u8 ifbmp, struct mi_state *mstate);
 void rtw_mi_status(_adapter *adapter, struct mi_state *mstate);
 void rtw_mi_status_no_self(_adapter *adapter, struct mi_state *mstate);
 void rtw_mi_status_no_others(_adapter *adapter, struct mi_state *mstate);
@@ -157,6 +175,9 @@ void rtw_mi_buddy_intf_start(_adapter *adapter);
 void rtw_mi_intf_stop(_adapter *adapter);
 void rtw_mi_buddy_intf_stop(_adapter *adapter);
 
+#ifdef CONFIG_NEW_NETDEV_HDL
+u8 rtw_mi_hal_iface_init(_adapter *padapter);
+#endif
 void rtw_mi_suspend_free_assoc_resource(_adapter *adapter);
 void rtw_mi_buddy_suspend_free_assoc_resource(_adapter *adapter);
 
@@ -236,9 +257,6 @@ void rtw_mi_buddy_adapter_reset(_adapter *padapter);
 u8 rtw_mi_dynamic_check_timer_handlder(_adapter *padapter);
 u8 rtw_mi_buddy_dynamic_check_timer_handlder(_adapter *padapter);
 
-u8 rtw_mi_dev_unload(_adapter *padapter);
-u8 rtw_mi_buddy_dev_unload(_adapter *padapter);
-
 extern void rtw_iface_dynamic_chk_wk_hdl(_adapter *padapter);
 u8 rtw_mi_dynamic_chk_wk_hdl(_adapter *padapter);
 u8 rtw_mi_buddy_dynamic_chk_wk_hdl(_adapter *padapter);
@@ -253,6 +271,9 @@ extern void sreset_start_adapter(_adapter *padapter);
 extern void sreset_stop_adapter(_adapter *padapter);
 u8 rtw_mi_sreset_adapter_hdl(_adapter *padapter, u8 bstart);
 u8 rtw_mi_buddy_sreset_adapter_hdl(_adapter *padapter, u8 bstart);
+#if defined(DBG_CONFIG_ERROR_RESET) && defined(CONFIG_CONCURRENT_MODE)
+void rtw_mi_ap_info_restore(_adapter *adapter);
+#endif
 
 u8 rtw_mi_tx_beacon_hdl(_adapter *padapter);
 u8 rtw_mi_buddy_tx_beacon_hdl(_adapter *padapter);
@@ -268,7 +289,7 @@ u8 rtw_mi_buddy_stay_in_p2p_mode(_adapter *padapter);
 #endif
 
 _adapter *rtw_get_iface_by_id(_adapter *padapter, u8 iface_id);
-_adapter *rtw_get_iface_by_macddr(_adapter *padapter, u8 *mac_addr);
+_adapter *rtw_get_iface_by_macddr(_adapter *padapter, const u8 *mac_addr);
 _adapter *rtw_get_iface_by_hwport(_adapter *padapter, u8 hw_port);
 
 void rtw_mi_buddy_clone_bcmc_packet(_adapter *padapter, union recv_frame *precvframe, u8 *pphy_status);
@@ -278,6 +299,8 @@ void rtw_mi_buddy_clone_bcmc_packet(_adapter *padapter, union recv_frame *precvf
 _adapter *rtw_mi_get_ap_adapter(_adapter *padapter);
 #endif
 
+u8 rtw_mi_get_ld_sta_ifbmp(_adapter *adapter);
+u8 rtw_mi_get_ap_mesh_ifbmp(_adapter *adapter);
 void rtw_mi_update_ap_bmc_camid(_adapter *padapter, u8 camid_a, u8 camid_b);
 
 #endif /*__RTW_MI_H_*/
diff --git a/rtl8723DS/include/rtw_mlme.h b/rtl8723DS/include/rtw_mlme.h
index c2c1075..8f2646c 100755..100644
--- a/rtl8723DS/include/rtw_mlme.h
+++ b/rtl8723DS/include/rtw_mlme.h
@@ -56,7 +56,7 @@
 #define WIFI_MP_CTX_CCK_CS				0x00200000 /* in continuous tx with carrier suppression */
 #define WIFI_MP_LPBK_STATE				0x00400000
 #define WIFI_OP_CH_SWITCHING			0x00800000
-/*#define WIFI_UNDEFINED_STATE			0x01000000*/
+#define WIFI_UNDER_KEY_HANDSHAKE	0x01000000
 /*#define WIFI_UNDEFINED_STATE			0x02000000*/
 /*#define WIFI_UNDEFINED_STATE			0x04000000*/
 /*#define WIFI_UNDEFINED_STATE			0x08000000*/
@@ -158,6 +158,7 @@ enum {
 	MLME_ADHOC_STOPPED,
 	MLME_MESH_STARTED,
 	MLME_MESH_STOPPED,
+	MLME_OPCH_SWITCH,
 };
 
 #define _FW_UNDER_LINKING	WIFI_UNDER_LINKING
@@ -749,20 +750,22 @@ struct mlme_priv {
 	_lock	lock;
 	sint	fw_state;	/* shall we protect this variable? maybe not necessarily... */
 	u8	to_join; /* flag */
+	u16 join_status;
 #ifdef CONFIG_LAYER2_ROAMING
 	u8 to_roam; /* roaming trying times */
 	struct wlan_network *roam_network; /* the target of active roam */
 	u8 roam_flags;
 	u8 roam_rssi_diff_th; /* rssi difference threshold for active scan candidate selection */
-	u32 roam_scan_int_ms; /* scan interval for active roam */
+	u32 roam_scan_int; 		/* scan interval for active roam (Unit:2 second)*/
 	u32 roam_scanr_exp_ms; /* scan result expire time in ms  for roam */
 	u8 roam_tgt_addr[ETH_ALEN]; /* request to roam to speicific target without other consideration */
 	u8 roam_rssi_threshold;
+	systime last_roaming;
 	bool need_to_roam;
 #endif
 
 	u8	*nic_hdl;
-
+	u32	max_bss_cnt;		/*	The size of scan queue	*/
 	_list		*pscanned;
 	_queue	free_bss_pool;
 	_queue	scanned_queue;
@@ -777,14 +780,16 @@ struct mlme_priv {
 
 	/* bcn check info */
 	struct beacon_keys cur_beacon_keys; /* save current beacon keys */
+#ifdef CONFIG_BCN_CNT_CONFIRM_HDL
 	struct beacon_keys new_beacon_keys; /* save new beacon keys */
 	u8 new_beacon_cnts; /* if new_beacon_cnts >= threshold, ap beacon is changed */
+#endif
 
 #ifdef CONFIG_ARP_KEEP_ALIVE
 	/* for arp offload keep alive */
 	u8 bGetGateway;
 	u8	GetGatewayTryCnt;
-	u8	gw_mac_addr[6];
+	u8	gw_mac_addr[ETH_ALEN];
 	u8	gw_ip[4];
 #endif
 
@@ -804,6 +809,7 @@ struct mlme_priv {
 	_timer set_scan_deny_timer;
 	ATOMIC_T set_scan_deny; /* 0: allowed, 1: deny */
 #endif
+	u8 wpa_phase;/*wpa_phase after wps finished*/
 
 	struct qos_priv qospriv;
 
@@ -824,7 +830,16 @@ struct mlme_priv {
 
 #ifdef CONFIG_80211AC_VHT
 	struct vht_priv	vhtpriv;
+#ifdef ROKU_PRIVATE
+	/*infra mode, used to store AP's info*/
+	struct vht_priv_infra_ap vhtpriv_infra_ap;
+#endif /* ROKU_PRIVATE */
 #endif
+
+#ifdef ROKU_PRIVATE
+	struct ht_priv_infra_ap htpriv_infra_ap;
+#endif /* ROKU_PRIVATE */
+
 #ifdef CONFIG_BEAMFORMING
 #ifndef RTW_BEAMFORMING_VERSION_2
 #if (BEAMFORMING_SUPPORT == 0)/*for driver beamforming*/
@@ -833,13 +848,6 @@ struct mlme_priv {
 #endif /* !RTW_BEAMFORMING_VERSION_2 */
 #endif
 
-#ifdef CONFIG_DFS
-	u8	handle_dfs;
-#endif
-#ifdef CONFIG_DFS_MASTER
-	/* TODO: move to rfctl */
-	_timer dfs_master_timer;
-#endif
 #ifdef CONFIG_RTW_80211R
 	struct ft_roam_info ft_roam;
 #endif
@@ -940,6 +948,9 @@ struct mlme_priv {
 	u8 ori_ch;
 	u8 ori_bw;
 	u8 ori_offset;
+	#ifdef CONFIG_80211AC_VHT
+	u8 ori_vht_en;
+	#endif
 #endif /* #if defined (CONFIG_AP_MODE) && defined (CONFIG_NATIVEAP_MLME) */
 
 #if defined(CONFIG_WFD) && defined(CONFIG_IOCTL_CFG80211)
@@ -999,11 +1010,6 @@ struct mlme_priv {
 	u8	scanning_via_buddy_intf;
 #endif
 
-#if 0
-	u8	NumOfBcnInfoChkFail;
-	u32	timeBcnInfoChkStart;
-#endif
-
 #ifdef CONFIG_APPEND_VENDOR_IE_ENABLE
 	u32 vendor_ie_mask[WLAN_MAX_VENDOR_IE_NUM];
 	u8 vendor_ie[WLAN_MAX_VENDOR_IE_NUM][WLAN_MAX_VENDOR_IE_LEN];
@@ -1022,10 +1028,11 @@ struct mlme_priv {
 		adapter->mlmepriv.auto_scan_int_ms = ms; \
 	} while (0)
 
-#define RTW_AUTO_SCAN_REASON_UNSPECIFIED	0
-#define RTW_AUTO_SCAN_REASON_2040_BSS		BIT0
-#define RTW_AUTO_SCAN_REASON_ACS			BIT1
-#define RTW_AUTO_SCAN_REASON_ROAM			BIT2
+#define RTW_AUTO_SCAN_REASON_UNSPECIFIED		0
+#define RTW_AUTO_SCAN_REASON_2040_BSS			BIT0
+#define RTW_AUTO_SCAN_REASON_ACS				BIT1
+#define RTW_AUTO_SCAN_REASON_ROAM				BIT2
+#define RTW_AUTO_SCAN_REASON_MESH_OFFCH_CAND	BIT3
 
 void rtw_mlme_reset_auto_scan_int(_adapter *adapter, u8 *reason);
 
@@ -1046,7 +1053,7 @@ extern void hostapd_mode_unload(_adapter *padapter);
 #endif
 
 
-extern void rtw_joinbss_event_prehandle(_adapter *adapter, u8 *pbuf);
+extern void rtw_joinbss_event_prehandle(_adapter *adapter, u8 *pbuf, u16 status);
 extern void rtw_survey_event_callback(_adapter *adapter, u8 *pbuf);
 extern void rtw_surveydone_event_callback(_adapter *adapter, u8 *pbuf);
 extern void rtw_joinbss_event_callback(_adapter *adapter, u8 *pbuf);
@@ -1178,12 +1185,13 @@ extern u16 rtw_get_capability(WLAN_BSSID_EX *bss);
 extern bool rtw_update_scanned_network(_adapter *adapter, WLAN_BSSID_EX *target);
 extern void rtw_disconnect_hdl_under_linked(_adapter *adapter, struct sta_info *psta, u8 free_assoc);
 extern void rtw_generate_random_ibss(u8 *pibss);
-extern struct wlan_network *rtw_find_network(_queue *scanned_queue, u8 *addr);
+struct wlan_network *_rtw_find_network(_queue *scanned_queue, const u8 *addr);
+struct wlan_network *rtw_find_network(_queue *scanned_queue, const u8 *addr);
 extern struct wlan_network *rtw_get_oldest_wlan_network(_queue *scanned_queue);
 struct wlan_network *_rtw_find_same_network(_queue *scanned_queue, struct wlan_network *network);
 struct wlan_network *rtw_find_same_network(_queue *scanned_queue, struct wlan_network *network);
 
-extern void rtw_free_assoc_resources(_adapter *adapter, int lock_scanned_queue);
+extern void rtw_free_assoc_resources(_adapter *adapter, u8 lock_scanned_queue);
 extern void rtw_indicate_disconnect(_adapter *adapter, u16 reason, u8 locally_generated);
 extern void rtw_indicate_connect(_adapter *adapter);
 void rtw_indicate_scan_done(_adapter *padapter, bool aborted);
@@ -1213,6 +1221,29 @@ extern void rtw_scan_timeout_handler(void *ctx);
 extern void rtw_dynamic_check_timer_handlder(void *ctx);
 extern void rtw_iface_dynamic_check_timer_handlder(_adapter *adapter);
 
+enum {
+	SS_DENY_MP_MODE,
+	SS_DENY_RSON_SCANING,
+	SS_DENY_BLOCK_SCAN,
+	SS_DENY_BY_DRV,
+	SS_DENY_SELF_AP_UNDER_WPS,
+	SS_DENY_SELF_AP_UNDER_LINKING,
+	SS_DENY_SELF_AP_UNDER_SURVEY,
+	/*SS_DENY_SELF_STA_UNDER_WPS,*/
+	SS_DENY_SELF_STA_UNDER_LINKING,
+	SS_DENY_SELF_STA_UNDER_SURVEY,
+	SS_DENY_BUDDY_UNDER_LINK_WPS,
+	SS_DENY_BUDDY_UNDER_SURVEY,
+	SS_DENY_BUSY_TRAFFIC,
+	SS_ALLOW,
+#ifdef DBG_LA_MODE
+	SS_DENY_LA_MODE,
+#endif
+};
+
+u8 _rtw_sitesurvey_condition_check(const char *caller, _adapter *adapter, bool check_sc_interval);
+#define rtw_sitesurvey_condition_check(adapter, check_sc_interval) _rtw_sitesurvey_condition_check(__func__, adapter, check_sc_interval)
+
 #ifdef CONFIG_SET_SCAN_DENY_TIMER
 bool rtw_is_scan_deny(_adapter *adapter);
 void rtw_clear_scan_deny(_adapter *adapter);
@@ -1246,9 +1277,6 @@ extern struct wlan_network *_rtw_alloc_network(struct mlme_priv *pmlmepriv);
 extern void _rtw_free_network(struct mlme_priv *pmlmepriv, struct wlan_network *pnetwork, u8 isfreeall);
 extern void _rtw_free_network_nolock(struct mlme_priv *pmlmepriv, struct wlan_network *pnetwork);
 
-
-extern struct wlan_network *_rtw_find_network(_queue *scanned_queue, u8 *addr);
-
 extern void _rtw_free_network_queue(_adapter *padapter, u8 isfreeall);
 
 extern sint rtw_if_up(_adapter *padapter);
@@ -1330,6 +1358,40 @@ void rtw_proxim_disable(_adapter *padapter);
 void rtw_proxim_send_packet(_adapter *padapter, u8 *pbuf, u16 len, u8 m_rate);
 #endif /* CONFIG_INTEL_PROXIM */
 
+#define GET_ARP_HTYPE(_arp)	BE_BITS_TO_2BYTE(((u8 *)(_arp)) + 0, 0, 16)
+#define GET_ARP_PTYPE(_arp)	BE_BITS_TO_2BYTE(((u8 *)(_arp)) + 2, 0, 16)
+#define GET_ARP_HLEN(_arp)	BE_BITS_TO_1BYTE(((u8 *)(_arp)) + 4, 0, 8)
+#define GET_ARP_PLEN(_arp)	BE_BITS_TO_1BYTE(((u8 *)(_arp)) + 5, 0, 8)
+#define GET_ARP_OPER(_arp)	BE_BITS_TO_2BYTE(((u8 *)(_arp)) + 6, 0, 16)
+
+#define SET_ARP_HTYPE(_arp, _val)	SET_BITS_TO_BE_2BYTE(((u8 *)(_arp)) + 0, 0, 16, _val)
+#define SET_ARP_PTYPE(_arp, _val)	SET_BITS_TO_BE_2BYTE(((u8 *)(_arp)) + 2, 0, 16, _val)
+#define SET_ARP_HLEN(_arp, _val)	SET_BITS_TO_BE_1BYTE(((u8 *)(_arp)) + 4, 0, 8, _val)
+#define SET_ARP_PLEN(_arp, _val)	SET_BITS_TO_BE_1BYTE(((u8 *)(_arp)) + 5, 0, 8, _val)
+#define SET_ARP_OPER(_arp, _val)	SET_BITS_TO_BE_2BYTE(((u8 *)(_arp)) + 6, 0, 16, _val)
+
+#define ARP_SHA(_arp, _hlen, _plen)	(((u8 *)(_arp)) + 8)
+#define ARP_SPA(_arp, _hlen, _plen)	(((u8 *)(_arp)) + 8 + (_hlen))
+#define ARP_THA(_arp, _hlen, _plen)	(((u8 *)(_arp)) + 8 + (_hlen) + (_plen))
+#define ARP_TPA(_arp, _hlen, _plen)	(((u8 *)(_arp)) + 8 + 2 * (_hlen) + (_plen))
+
+#define ARP_SENDER_MAC_ADDR(_arp)	ARP_SHA(_arp, ETH_ALEN, RTW_IP_ADDR_LEN)
+#define ARP_SENDER_IP_ADDR(_arp)	ARP_SPA(_arp, ETH_ALEN, RTW_IP_ADDR_LEN)
+#define ARP_TARGET_MAC_ADDR(_arp)	ARP_THA(_arp, ETH_ALEN, RTW_IP_ADDR_LEN)
+#define ARP_TARGET_IP_ADDR(_arp)	ARP_TPA(_arp, ETH_ALEN, RTW_IP_ADDR_LEN)
+
+#define GET_ARP_SENDER_MAC_ADDR(_arp, _val)	_rtw_memcpy(_val, ARP_SENDER_MAC_ADDR(_arp), ETH_ALEN)
+#define GET_ARP_SENDER_IP_ADDR(_arp, _val)	_rtw_memcpy(_val, ARP_SENDER_IP_ADDR(_arp), RTW_IP_ADDR_LEN)
+#define GET_ARP_TARGET_MAC_ADDR(_arp, _val)	_rtw_memcpy(_val, ARP_TARGET_MAC_ADDR(_arp), ETH_ALEN)
+#define GET_ARP_TARGET_IP_ADDR(_arp, _val)	_rtw_memcpy(_val, ARP_TARGET_IP_ADDR(_arp), RTW_IP_ADDR_LEN)
+
+#define SET_ARP_SENDER_MAC_ADDR(_arp, _val)	_rtw_memcpy(ARP_SENDER_MAC_ADDR(_arp), _val, ETH_ALEN)
+#define SET_ARP_SENDER_IP_ADDR(_arp, _val)	_rtw_memcpy(ARP_SENDER_IP_ADDR(_arp), _val, RTW_IP_ADDR_LEN)
+#define SET_ARP_TARGET_MAC_ADDR(_arp, _val)	_rtw_memcpy(ARP_TARGET_MAC_ADDR(_arp), _val, ETH_ALEN)
+#define SET_ARP_TARGET_IP_ADDR(_arp, _val)	_rtw_memcpy(ARP_TARGET_IP_ADDR(_arp), _val, RTW_IP_ADDR_LEN)
+
+void dump_arp_pkt(void *sel, u8 *da, u8 *sa, u8 *arp, bool tx);
+
 #define IPV4_SRC(_iphdr)			(((u8 *)(_iphdr)) + 12)
 #define IPV4_DST(_iphdr)			(((u8 *)(_iphdr)) + 16)
 #define GET_IPV4_IHL(_iphdr)		BE_BITS_TO_1BYTE(((u8 *)(_iphdr)) + 0, 0, 4)
diff --git a/rtl8723DS/include/rtw_mlme_ext.h b/rtl8723DS/include/rtw_mlme_ext.h
index 6e58489..8e04f5c 100755..100644
--- a/rtl8723DS/include/rtw_mlme_ext.h
+++ b/rtl8723DS/include/rtw_mlme_ext.h
@@ -88,140 +88,11 @@ extern unsigned char P2P_OUI[];
 extern unsigned char WMM_INFO_OUI[];
 extern unsigned char WMM_PARA_OUI[];
 
-typedef enum _RT_CHANNEL_DOMAIN {
-	/* ===== 0x00 ~ 0x1F, legacy channel plan ===== */
-	RTW_CHPLAN_FCC = 0x00,
-	RTW_CHPLAN_IC = 0x01,
-	RTW_CHPLAN_ETSI = 0x02,
-	RTW_CHPLAN_SPAIN = 0x03,
-	RTW_CHPLAN_FRANCE = 0x04,
-	RTW_CHPLAN_MKK = 0x05,
-	RTW_CHPLAN_MKK1 = 0x06,
-	RTW_CHPLAN_ISRAEL = 0x07,
-	RTW_CHPLAN_TELEC = 0x08,
-	RTW_CHPLAN_GLOBAL_DOAMIN = 0x09,
-	RTW_CHPLAN_WORLD_WIDE_13 = 0x0A,
-	RTW_CHPLAN_TAIWAN = 0x0B,
-	RTW_CHPLAN_CHINA = 0x0C,
-	RTW_CHPLAN_SINGAPORE_INDIA_MEXICO = 0x0D,
-	RTW_CHPLAN_KOREA = 0x0E,
-	RTW_CHPLAN_TURKEY = 0x0F,
-	RTW_CHPLAN_JAPAN = 0x10,
-	RTW_CHPLAN_FCC_NO_DFS = 0x11,
-	RTW_CHPLAN_JAPAN_NO_DFS = 0x12,
-	RTW_CHPLAN_WORLD_WIDE_5G = 0x13,
-	RTW_CHPLAN_TAIWAN_NO_DFS = 0x14,
-
-	/* ===== 0x20 ~ 0x7F, new channel plan ===== */
-	RTW_CHPLAN_WORLD_NULL = 0x20,
-	RTW_CHPLAN_ETSI1_NULL = 0x21,
-	RTW_CHPLAN_FCC1_NULL = 0x22,
-	RTW_CHPLAN_MKK1_NULL = 0x23,
-	RTW_CHPLAN_ETSI2_NULL = 0x24,
-	RTW_CHPLAN_FCC1_FCC1 = 0x25,
-	RTW_CHPLAN_WORLD_ETSI1 = 0x26,
-	RTW_CHPLAN_MKK1_MKK1 = 0x27,
-	RTW_CHPLAN_WORLD_KCC1 = 0x28,
-	RTW_CHPLAN_WORLD_FCC2 = 0x29,
-	RTW_CHPLAN_FCC2_NULL = 0x2A,
-	RTW_CHPLAN_IC1_IC2 = 0x2B,
-	RTW_CHPLAN_MKK2_NULL = 0x2C,
-	RTW_CHPLAN_WORLD_CHILE1= 0x2D,
-	RTW_CHPLAN_WORLD_FCC3 = 0x30,
-	RTW_CHPLAN_WORLD_FCC4 = 0x31,
-	RTW_CHPLAN_WORLD_FCC5 = 0x32,
-	RTW_CHPLAN_WORLD_FCC6 = 0x33,
-	RTW_CHPLAN_FCC1_FCC7 = 0x34,
-	RTW_CHPLAN_WORLD_ETSI2 = 0x35,
-	RTW_CHPLAN_WORLD_ETSI3 = 0x36,
-	RTW_CHPLAN_MKK1_MKK2 = 0x37,
-	RTW_CHPLAN_MKK1_MKK3 = 0x38,
-	RTW_CHPLAN_FCC1_NCC1 = 0x39,
-	RTW_CHPLAN_FCC1_NCC2 = 0x40,
-	RTW_CHPLAN_GLOBAL_NULL = 0x41,
-	RTW_CHPLAN_ETSI1_ETSI4 = 0x42,
-	RTW_CHPLAN_FCC1_FCC2 = 0x43,
-	RTW_CHPLAN_FCC1_NCC3 = 0x44,
-	RTW_CHPLAN_WORLD_ACMA1 = 0x45,
-	RTW_CHPLAN_FCC1_FCC8 = 0x46,
-	RTW_CHPLAN_WORLD_ETSI6 = 0x47,
-	RTW_CHPLAN_WORLD_ETSI7 = 0x48,
-	RTW_CHPLAN_WORLD_ETSI8 = 0x49,
-	RTW_CHPLAN_WORLD_ETSI9 = 0x50,
-	RTW_CHPLAN_WORLD_ETSI10 = 0x51,
-	RTW_CHPLAN_WORLD_ETSI11 = 0x52,
-	RTW_CHPLAN_FCC1_NCC4 = 0x53,
-	RTW_CHPLAN_WORLD_ETSI12 = 0x54,
-	RTW_CHPLAN_FCC1_FCC9 = 0x55,
-	RTW_CHPLAN_WORLD_ETSI13 = 0x56,
-	RTW_CHPLAN_FCC1_FCC10 = 0x57,
-	RTW_CHPLAN_MKK2_MKK4 = 0x58,
-	RTW_CHPLAN_WORLD_ETSI14 = 0x59,
-	RTW_CHPLAN_FCC1_FCC5 = 0x60,
-	RTW_CHPLAN_FCC2_FCC7 = 0x61,
-	RTW_CHPLAN_FCC2_FCC1 = 0x62,
-	RTW_CHPLAN_WORLD_ETSI15 = 0x63,
-	RTW_CHPLAN_MKK2_MKK5 = 0x64,
-	RTW_CHPLAN_ETSI1_ETSI16 = 0x65,
-	RTW_CHPLAN_FCC1_FCC14 = 0x66,
-	RTW_CHPLAN_FCC1_FCC12 = 0x67,
-	RTW_CHPLAN_FCC2_FCC14 = 0x68,
-	RTW_CHPLAN_FCC2_FCC12 = 0x69,
-	RTW_CHPLAN_ETSI1_ETSI17 = 0x6A,
-	RTW_CHPLAN_WORLD_FCC16 = 0x6B,
-	RTW_CHPLAN_WORLD_FCC13 = 0x6C,
-	RTW_CHPLAN_FCC2_FCC15 = 0x6D,
-	RTW_CHPLAN_WORLD_FCC12 = 0x6E,
-	RTW_CHPLAN_NULL_ETSI8 = 0x6F,
-	RTW_CHPLAN_NULL_ETSI18 = 0x70,
-	RTW_CHPLAN_NULL_ETSI17 = 0x71,
-	RTW_CHPLAN_NULL_ETSI19 = 0x72,
-	RTW_CHPLAN_WORLD_FCC7 = 0x73,
-	RTW_CHPLAN_FCC2_FCC17 = 0x74,
-	RTW_CHPLAN_WORLD_ETSI20 = 0x75,
-	RTW_CHPLAN_FCC2_FCC11 = 0x76,
-	RTW_CHPLAN_WORLD_ETSI21 = 0x77,
-	RTW_CHPLAN_FCC1_FCC18 = 0x78,
-	RTW_CHPLAN_MKK2_MKK1 = 0x79,
-
-	RTW_CHPLAN_MAX,
-	RTW_CHPLAN_REALTEK_DEFINE = 0x7F,
-	RTW_CHPLAN_UNSPECIFIED = 0xFF,
-} RT_CHANNEL_DOMAIN, *PRT_CHANNEL_DOMAIN;
-
-bool rtw_chplan_is_empty(u8 id);
-#define rtw_is_channel_plan_valid(chplan) (((chplan) < RTW_CHPLAN_MAX || (chplan) == RTW_CHPLAN_REALTEK_DEFINE) && !rtw_chplan_is_empty(chplan))
-#define rtw_is_legacy_channel_plan(chplan) ((chplan) < 0x20)
-
 typedef struct _RT_CHANNEL_PLAN {
 	unsigned char	Channel[MAX_CHANNEL_NUM];
 	unsigned char	Len;
 } RT_CHANNEL_PLAN, *PRT_CHANNEL_PLAN;
 
-struct ch_list_t {
-	u8 *len_ch;
-};
-
-#define CH_LIST_ENT(_len, arg...) \
-	{.len_ch = (u8[_len + 1]) {_len, ##arg}, }
-
-#define CH_LIST_LEN(_ch_list) (_ch_list.len_ch[0])
-#define CH_LIST_CH(_ch_list, _i) (_ch_list.len_ch[_i + 1])
-
-typedef struct _RT_CHANNEL_PLAN_MAP {
-	u8 Index2G;
-#ifdef CONFIG_IEEE80211_BAND_5GHZ
-	u8 Index5G;
-#endif
-	u8 regd; /* value of REGULATION_TXPWR_LMT */
-} RT_CHANNEL_PLAN_MAP, *PRT_CHANNEL_PLAN_MAP;
-
-#ifdef CONFIG_IEEE80211_BAND_5GHZ
-#define CHPLAN_ENT(i2g, i5g, regd) {i2g, i5g, regd}
-#else
-#define CHPLAN_ENT(i2g, i5g, regd) {i2g, regd}
-#endif
-
 enum Associated_AP {
 	atherosAP	= 0,
 	broadcomAP	= 1,
@@ -256,6 +127,24 @@ typedef enum _HT_IOT_PEER {
 	HT_IOT_PEER_MAX				= 18
 } HT_IOT_PEER_E, *PHTIOT_PEER_E;
 
+
+typedef enum _RT_HT_INF0_CAP {
+	RT_HT_CAP_USE_TURBO_AGGR = 0x01,
+	RT_HT_CAP_USE_LONG_PREAMBLE = 0x02,
+	RT_HT_CAP_USE_AMPDU = 0x04,
+	RT_HT_CAP_USE_WOW = 0x8,
+	RT_HT_CAP_USE_SOFTAP = 0x10,
+	RT_HT_CAP_USE_92SE = 0x20,
+	RT_HT_CAP_USE_88C_92C = 0x40,
+	RT_HT_CAP_USE_AP_CLIENT_MODE = 0x80,	/* AP team request to reserve this bit, by Emily */
+} RT_HT_INF0_CAPBILITY, *PRT_HT_INF0_CAPBILITY;
+
+typedef enum _RT_HT_INF1_CAP {
+	RT_HT_CAP_USE_VIDEO_CLIENT = 0x01,
+	RT_HT_CAP_USE_JAGUAR_BCUT = 0x02,
+	RT_HT_CAP_USE_JAGUAR_CCUT = 0x04,
+} RT_HT_INF1_CAPBILITY, *PRT_HT_INF1_CAPBILITY;
+
 struct mlme_handler {
 	unsigned int   num;
 	char *str;
@@ -319,7 +208,12 @@ struct ss_res {
 	u8 igi_before_scan; /* used for restoring IGI value without enable DIG & FA_CNT */
 #ifdef CONFIG_SCAN_BACKOP
 	u8 backop_flags_sta; /* policy for station mode*/
+	#ifdef CONFIG_AP_MODE
 	u8 backop_flags_ap; /* policy for ap mode */
+	#endif
+	#ifdef CONFIG_RTW_MESH
+	u8 backop_flags_mesh; /* policy for mesh mode */
+	#endif
 	u8 backop_flags; /* per backop runtime decision */
 	u8 scan_cnt;
 	u8 scan_cnt_max;
@@ -421,6 +315,7 @@ struct mlme_ext_info {
 	u32	link_count;
 	u32	auth_seq;
 	u32	auth_algo;	/* 802.11 auth, could be open, shared, auto */
+	u16 auth_status;
 	u32	authModeToggle;
 	u32	enc_algo;/* encrypt algorithm; */
 	u32	key_index;	/* this is only valid for legendary wep, 0~3 for key id. */
@@ -460,6 +355,11 @@ struct mlme_ext_info {
 	struct HT_caps_element	HT_caps;
 	struct HT_info_element		HT_info;
 	WLAN_BSSID_EX			network;/* join network or bss_network, if in ap mode, it is the same to cur_network.network */
+#ifdef ROKU_PRIVATE
+	/*infra mode, store supported rates from AssocRsp*/
+	NDIS_802_11_RATES_EX	SupportedRates_infra_ap;
+	u8 ht_vht_received;/*ht_vht_received used to show debug msg BIT(0):HT BIT(1):VHT */
+#endif /* ROKU_PRIVATE */
 };
 
 /* The channel information about this channel including joining, scanning, and power constraints. */
@@ -480,7 +380,6 @@ typedef struct _RT_CHANNEL_INFO {
 #endif
 } RT_CHANNEL_INFO, *PRT_CHANNEL_INFO;
 
-#define DFS_MASTER_TIMER_MS 100
 #define CAC_TIME_MS (60*1000)
 #define CAC_TIME_CE_MS (10*60*1000)
 #define NON_OCP_TIME_MS (30*60*1000)
@@ -493,19 +392,22 @@ void rtw_rfctl_deinit(_adapter *adapter);
 
 #ifdef CONFIG_DFS_MASTER
 struct rf_ctl_t;
-#define CH_IS_NON_OCP(rt_ch_info) (time_after((rt_ch_info)->non_ocp_end_time, rtw_get_current_time()))
-bool rtw_is_cac_reset_needed(_adapter *adapter, u8 ch, u8 bw, u8 offset);
+#define CH_IS_NON_OCP(rt_ch_info) (rtw_time_after((rt_ch_info)->non_ocp_end_time, rtw_get_current_time()))
+bool rtw_is_cac_reset_needed(struct rf_ctl_t *rfctl, u8 ch, u8 bw, u8 offset);
 bool _rtw_rfctl_overlap_radar_detect_ch(struct rf_ctl_t *rfctl, u8 ch, u8 bw, u8 offset);
 bool rtw_rfctl_overlap_radar_detect_ch(struct rf_ctl_t *rfctl);
 bool rtw_rfctl_is_tx_blocked_by_ch_waiting(struct rf_ctl_t *rfctl);
-bool rtw_chset_is_ch_non_ocp(RT_CHANNEL_INFO *ch_set, u8 ch, u8 bw, u8 offset);
+bool rtw_chset_is_chbw_non_ocp(RT_CHANNEL_INFO *ch_set, u8 ch, u8 bw, u8 offset);
+bool rtw_chset_is_ch_non_ocp(RT_CHANNEL_INFO *ch_set, u8 ch);
 void rtw_chset_update_non_ocp(RT_CHANNEL_INFO *ch_set, u8 ch, u8 bw, u8 offset);
 void rtw_chset_update_non_ocp_ms(RT_CHANNEL_INFO *ch_set, u8 ch, u8 bw, u8 offset, int ms);
-u32 rtw_get_ch_waiting_ms(_adapter *adapter, u8 ch, u8 bw, u8 offset, u32 *r_non_ocp_ms, u32 *r_cac_ms);
-void rtw_reset_cac(_adapter *adapter, u8 ch, u8 bw, u8 offset);
+u32 rtw_get_ch_waiting_ms(struct rf_ctl_t *rfctl, u8 ch, u8 bw, u8 offset, u32 *r_non_ocp_ms, u32 *r_cac_ms);
+void rtw_reset_cac(struct rf_ctl_t *rfctl, u8 ch, u8 bw, u8 offset);
+u32 rtw_force_stop_cac(struct rf_ctl_t *rfctl, u32 timeout_ms);
 #else
 #define CH_IS_NON_OCP(rt_ch_info) 0
-#define rtw_chset_is_ch_non_ocp(ch_set, ch, bw, offset) _FALSE
+#define rtw_chset_is_chbw_non_ocp(ch_set, ch, bw, offset) _FALSE
+#define rtw_chset_is_ch_non_ocp(ch_set, ch) _FALSE
 #define rtw_rfctl_is_tx_blocked_by_ch_waiting(rfctl) _FALSE
 #endif
 
@@ -519,17 +421,17 @@ enum {
 	RTW_CHF_NON_OCP = BIT6,
 };
 
-bool rtw_choose_shortest_waiting_ch(_adapter *adapter, u8 req_bw, u8 *dec_ch, u8 *dec_bw, u8 *dec_offset, u8 d_flags);
+bool rtw_choose_shortest_waiting_ch(struct rf_ctl_t *rfctl, u8 sel_ch, u8 max_bw
+	, u8 *dec_ch, u8 *dec_bw, u8 *dec_offset
+	, u8 d_flags, u8 cur_ch, u8 same_band_prefer, u8 mesh_only);
 
-void dump_country_chplan(void *sel, const struct country_chplan *ent);
-void dump_country_chplan_map(void *sel);
-void dump_chplan_id_list(void *sel);
-void dump_chplan_test(void *sel);
 void dump_chset(void *sel, RT_CHANNEL_INFO *ch_set);
-void dump_cur_chset(void *sel, _adapter *adapter);
+void dump_cur_chset(void *sel, struct rf_ctl_t *rfctl);
 
 int rtw_chset_search_ch(RT_CHANNEL_INFO *ch_set, const u32 ch);
 u8 rtw_chset_is_chbw_valid(RT_CHANNEL_INFO *ch_set, u8 ch, u8 bw, u8 offset);
+void rtw_chset_sync_chbw(RT_CHANNEL_INFO *ch_set, u8 *req_ch, u8 *req_bw, u8 *req_offset
+	, u8 *g_ch, u8 *g_bw, u8 *g_offset);
 
 bool rtw_mlme_band_check(_adapter *adapter, const u32 ch);
 
@@ -620,15 +522,16 @@ struct mlme_ext_priv {
 	u32	retry; /* retry for issue probereq */
 
 	u64 TSFValue;
-
-	/* for LPS-32K to adaptive bcn early and timeout */
-	u8 adaptive_tsf_done;
-	u32 bcn_delay_cnt[9];
-	u32 bcn_delay_ratio[9];
 	u32 bcn_cnt;
-	u8 DrvBcnEarly;
-	u8 DrvBcnTimeOut;
-
+	u32 last_bcn_cnt;
+	u8 cur_bcn_cnt;/*2s*/
+	u8 dtim;/*DTIM Period*/
+#ifdef DBG_RX_BCN
+	u8 tim[4];
+#endif
+#ifdef CONFIG_BCN_RECV_TIME
+	u16 bcn_rx_time;
+#endif
 #ifdef CONFIG_AP_MODE
 	unsigned char bstart_bss;
 #endif
@@ -646,8 +549,34 @@ struct mlme_ext_priv {
 #ifdef DBG_FIXED_CHAN
 	u8 fixed_chan;
 #endif
-	/* set hw sync bcn tsf register or not */
-	u8 en_hw_update_tsf;
+
+	u8 tsf_update_required:1;
+	u8 en_hw_update_tsf:1; /* set hw sync bcn tsf register or not */
+	systime tsf_update_pause_stime;
+	u8 tsf_update_pause_factor; /* num of bcn intervals to stay TSF update pause status */
+	u8 tsf_update_restore_factor; /* num of bcn interval to stay TSF update restore status */
+#ifdef CONFIG_SUPPORT_STATIC_SMPS
+	u8 ssmps_en;
+	u16 ssmps_tx_tp_th;/*Mbps*/
+	u16 ssmps_rx_tp_th;/*Mbps*/
+	#ifdef DBG_STATIC_SMPS
+	u8 ssmps_test;
+	u8 ssmps_test_en;
+	#endif
+#endif
+#ifdef CONFIG_CTRL_TXSS_BY_TP
+	u8 txss_ctrl_en;
+	u16 txss_tp_th;/*Mbps*/
+	u8 txss_tp_chk_cnt;/*unit 2s*/
+	u8 txss_1ss;
+	u8 txss_momi_type_bk;
+#endif
+};
+
+struct support_rate_handler {
+	u8 rate;
+	bool basic;
+	bool existence;
 };
 
 static inline u8 check_mlmeinfo_state(struct mlme_ext_priv *plmeext, sint state)
@@ -695,13 +624,6 @@ void sitesurvey_set_offch_state(_adapter *adapter, u8 scan_state);
 	do { \
 		((mlmeext)->sitesurvey_res.backop_flags_sta = (flags)); \
 	} while (0)
-
-#define mlmeext_scan_backop_flags_ap(mlmeext) ((mlmeext)->sitesurvey_res.backop_flags_ap)
-#define mlmeext_chk_scan_backop_flags_ap(mlmeext, flags) ((mlmeext)->sitesurvey_res.backop_flags_ap & (flags))
-#define mlmeext_assign_scan_backop_flags_ap(mlmeext, flags) \
-	do { \
-		((mlmeext)->sitesurvey_res.backop_flags_ap = (flags)); \
-	} while (0)
 #else
 #define mlmeext_scan_backop_flags(mlmeext) (0)
 #define mlmeext_chk_scan_backop_flags(mlmeext, flags) (0)
@@ -710,11 +632,34 @@ void sitesurvey_set_offch_state(_adapter *adapter, u8 scan_state);
 #define mlmeext_scan_backop_flags_sta(mlmeext) (0)
 #define mlmeext_chk_scan_backop_flags_sta(mlmeext, flags) (0)
 #define mlmeext_assign_scan_backop_flags_sta(mlmeext, flags) do {} while (0)
+#endif /* CONFIG_SCAN_BACKOP */
 
+#if defined(CONFIG_SCAN_BACKOP) && defined(CONFIG_AP_MODE)
+#define mlmeext_scan_backop_flags_ap(mlmeext) ((mlmeext)->sitesurvey_res.backop_flags_ap)
+#define mlmeext_chk_scan_backop_flags_ap(mlmeext, flags) ((mlmeext)->sitesurvey_res.backop_flags_ap & (flags))
+#define mlmeext_assign_scan_backop_flags_ap(mlmeext, flags) \
+	do { \
+		((mlmeext)->sitesurvey_res.backop_flags_ap = (flags)); \
+	} while (0)
+#else
 #define mlmeext_scan_backop_flags_ap(mlmeext) (0)
 #define mlmeext_chk_scan_backop_flags_ap(mlmeext, flags) (0)
 #define mlmeext_assign_scan_backop_flags_ap(mlmeext, flags) do {} while (0)
-#endif
+#endif /* defined(CONFIG_SCAN_BACKOP) && defined(CONFIG_AP_MODE) */
+
+#if defined(CONFIG_SCAN_BACKOP) && defined(CONFIG_RTW_MESH)
+#define mlmeext_scan_backop_flags_mesh(mlmeext) ((mlmeext)->sitesurvey_res.backop_flags_mesh)
+#define mlmeext_chk_scan_backop_flags_mesh(mlmeext, flags) ((mlmeext)->sitesurvey_res.backop_flags_mesh & (flags))
+#define mlmeext_assign_scan_backop_flags_mesh(mlmeext, flags) \
+	do { \
+		((mlmeext)->sitesurvey_res.backop_flags_mesh = (flags)); \
+	} while (0)
+#else
+#define mlmeext_scan_backop_flags_mesh(mlmeext) (0)
+#define mlmeext_chk_scan_backop_flags_mesh(mlmeext, flags) (0)
+#define mlmeext_assign_scan_backop_flags_mesh(mlmeext, flags) do {} while (0)
+#endif /* defined(CONFIG_SCAN_BACKOP) && defined(CONFIG_RTW_MESH) */
+
 u32 rtw_scan_timeout_decision(_adapter *padapter);
 
 void init_mlme_default_rate_set(_adapter *padapter);
@@ -745,7 +690,6 @@ systime rtw_get_on_oper_ch_time(_adapter *adapter);
 systime rtw_get_on_cur_ch_time(_adapter *adapter);
 
 u8 rtw_get_offset_by_chbw(u8 ch, u8 bw, u8 *r_offset);
-u8 rtw_get_offset_by_ch(u8 channel);
 
 void set_channel_bwmode(_adapter *padapter, unsigned char channel, unsigned char channel_offset, unsigned short bwmode);
 
@@ -784,6 +728,13 @@ int is_client_associated_to_ibss(_adapter *padapter);
 int is_IBSS_empty(_adapter *padapter);
 
 unsigned char check_assoc_AP(u8 *pframe, uint len);
+void get_assoc_AP_Vendor(char *vendor, u8 assoc_AP_vendor);
+#ifdef CONFIG_RTS_FULL_BW
+void rtw_parse_sta_vendor_ie_8812(_adapter *adapter, struct sta_info *sta, u8 *tlv_ies, u16 tlv_ies_len);
+#endif/*CONFIG_RTS_FULL_BW*/
+#ifdef CONFIG_80211AC_VHT
+unsigned char get_vht_mu_bfer_cap(u8 *pframe, uint len);
+#endif
 
 int WMM_param_handler(_adapter *padapter, PNDIS_802_11_VARIABLE_IEs	pIE);
 #ifdef CONFIG_WFD
@@ -793,13 +744,24 @@ void rtw_process_wfd_ies(_adapter *adapter, u8 *ies, u8 ies_len, const char *tag
 void WMMOnAssocRsp(_adapter *padapter);
 
 void HT_caps_handler(_adapter *padapter, PNDIS_802_11_VARIABLE_IEs pIE);
+#ifdef ROKU_PRIVATE
+void HT_caps_handler_infra_ap(_adapter *padapter, PNDIS_802_11_VARIABLE_IEs pIE);
+#endif
 void HT_info_handler(_adapter *padapter, PNDIS_802_11_VARIABLE_IEs pIE);
 void HTOnAssocRsp(_adapter *padapter);
 
+#ifdef ROKU_PRIVATE
+void Supported_rate_infra_ap(_adapter *padapter, PNDIS_802_11_VARIABLE_IEs pIE);
+void Extended_Supported_rate_infra_ap(_adapter *padapter, PNDIS_802_11_VARIABLE_IEs pIE);
+#endif
+
 void ERP_IE_handler(_adapter *padapter, PNDIS_802_11_VARIABLE_IEs pIE);
 void VCS_update(_adapter *padapter, struct sta_info *psta);
 void	update_ldpc_stbc_cap(struct sta_info *psta);
 
+bool rtw_validate_value(u16 EID, u8 *p, u16 len);
+bool hidden_ssid_ap(WLAN_BSSID_EX *snetwork);
+void rtw_absorb_ssid_ifneed(_adapter *padapter, WLAN_BSSID_EX *bssid, u8 *pframe);
 int rtw_get_bcn_keys(ADAPTER *Adapter, u8 *pframe, u32 packet_len,
 		struct beacon_keys *recv_beacon);
 int validate_beacon_len(u8 *pframe, uint len);
@@ -807,7 +769,7 @@ void rtw_dump_bcn_keys(struct beacon_keys *recv_beacon);
 int rtw_check_bcn_info(ADAPTER *Adapter, u8 *pframe, u32 packet_len);
 void update_beacon_info(_adapter *padapter, u8 *pframe, uint len, struct sta_info *psta);
 #ifdef CONFIG_DFS
-void process_csa_ie(_adapter *padapter, u8 *pframe, uint len);
+void process_csa_ie(_adapter *padapter, u8 *ies, uint ies_len);
 #endif /* CONFIG_DFS */
 void update_capinfo(PADAPTER Adapter, u16 updateCap);
 void update_wireless_mode(_adapter *padapter);
@@ -833,6 +795,8 @@ unsigned int is_ap_in_tkip(_adapter *padapter);
 unsigned int is_ap_in_wep(_adapter *padapter);
 unsigned int should_forbid_n_rate(_adapter *padapter);
 
+void parsing_eapol_packet(_adapter *padapter, u8 *key_payload, struct sta_info *psta, u8 trx_type);
+
 bool _rtw_camctl_chk_cap(_adapter *adapter, u8 cap);
 void _rtw_camctl_set_flags(_adapter *adapter, u32 flags);
 void rtw_camctl_set_flags(_adapter *adapter, u32 flags);
@@ -847,7 +811,7 @@ void rtw_sec_cam_map_clr_all(struct sec_cam_bmp *map);
 bool _rtw_camid_is_gk(_adapter *adapter, u8 cam_id);
 bool rtw_camid_is_gk(_adapter *adapter, u8 cam_id);
 s16 rtw_camid_search(_adapter *adapter, u8 *addr, s16 kid, s8 gk);
-s16 rtw_camid_alloc(_adapter *adapter, struct sta_info *sta, u8 kid, bool *used);
+s16 rtw_camid_alloc(_adapter *adapter, struct sta_info *sta, u8 kid, u8 gk, bool *used);
 void rtw_camid_free(_adapter *adapter, u8 cam_id);
 u8 rtw_get_sec_camid(_adapter *adapter, u8 max_bk_key_num, u8 *sec_key_id);
 
@@ -855,6 +819,7 @@ struct macid_bmp;
 struct macid_ctl_t;
 void dump_macid_map(void *sel, struct macid_bmp *map, u8 max_num);
 bool rtw_macid_is_set(struct macid_bmp *map, u8 id);
+void rtw_macid_map_clr(struct macid_bmp *map, u8 id);
 bool rtw_macid_is_used(struct macid_ctl_t *macid_ctl, u8 id);
 bool rtw_macid_is_bmc(struct macid_ctl_t *macid_ctl, u8 id);
 u8 rtw_macid_get_iface_bmp(struct macid_ctl_t *macid_ctl, u8 id);
@@ -874,7 +839,9 @@ void rtw_macid_ctl_init(struct macid_ctl_t *macid_ctl);
 void rtw_macid_ctl_deinit(struct macid_ctl_t *macid_ctl);
 u8 rtw_iface_bcmc_id_get(_adapter *padapter);
 void rtw_iface_bcmc_id_set(_adapter *padapter, u8 mac_id);
-
+#if defined(DBG_CONFIG_ERROR_RESET) && defined(CONFIG_CONCURRENT_MODE)
+void rtw_iface_bcmc_sec_cam_map_restore(_adapter *adapter);
+#endif
 bool rtw_bmp_is_set(const u8 *bmp, u8 bmp_len, u8 id);
 void rtw_bmp_set(u8 *bmp, u8 bmp_len, u8 id);
 void rtw_bmp_clear(u8 *bmp, u8 bmp_len, u8 id);
@@ -889,7 +856,7 @@ bool rtw_tim_map_anyone_be_set(_adapter *padapter, const u8 *map);
 bool rtw_tim_map_anyone_be_set_exclude_aid0(_adapter *padapter, const u8 *map);
 #endif /* CONFIG_AP_MODE */
 
-u32 report_join_res(_adapter *padapter, int res);
+u32 report_join_res(_adapter *padapter, int aid_res, u16 status);
 void report_survey_event(_adapter *padapter, union recv_frame *precv_frame);
 void report_surveydone_event(_adapter *padapter);
 u32 report_del_sta_event(_adapter *padapter, unsigned char *MacAddr, unsigned short reason, bool enqueue, u8 locally_generated);
@@ -927,10 +894,10 @@ void issue_assocreq(_adapter *padapter);
 void issue_reassocreq(_adapter *padapter);
 void issue_asocrsp(_adapter *padapter, unsigned short status, struct sta_info *pstat, int pkt_type);
 void issue_auth(_adapter *padapter, struct sta_info *psta, unsigned short status);
-void issue_probereq(_adapter *padapter, NDIS_802_11_SSID *pssid, u8 *da);
-s32 issue_probereq_ex(_adapter *padapter, NDIS_802_11_SSID *pssid, u8 *da, u8 ch, bool append_wps, int try_cnt, int wait_ms);
+void issue_probereq(_adapter *padapter, const NDIS_802_11_SSID *pssid, const u8 *da);
+s32 issue_probereq_ex(_adapter *padapter, const NDIS_802_11_SSID *pssid, const u8 *da, u8 ch, bool append_wps, int try_cnt, int wait_ms);
 int issue_nulldata(_adapter *padapter, unsigned char *da, unsigned int power_mode, int try_cnt, int wait_ms);
-int issue_qos_nulldata(_adapter *padapter, unsigned char *da, u16 tid, int try_cnt, int wait_ms);
+int issue_qos_nulldata(_adapter *padapter, unsigned char *da, u16 tid, u8 ps, int try_cnt, int wait_ms);
 int issue_deauth(_adapter *padapter, unsigned char *da, unsigned short reason);
 int issue_deauth_ex(_adapter *padapter, u8 *da, unsigned short reason, int try_cnt, int wait_ms);
 void issue_action_spct_ch_switch(_adapter *padapter, u8 *ra, u8 new_ch, u8 ch_offset);
@@ -1042,6 +1009,10 @@ void mlmeext_sta_add_event_callback(_adapter *padapter, struct sta_info *psta);
 
 void linked_status_chk(_adapter *padapter, u8 from_timer);
 
+#define rtw_get_bcn_cnt(adapter)	(adapter->mlmeextpriv.cur_bcn_cnt)
+#define rtw_get_bcn_dtim_period(adapter)	(adapter->mlmeextpriv.dtim)
+void rtw_collect_bcn_info(_adapter *adapter);
+
 void _linked_info_dump(_adapter *padapter);
 
 void survey_timer_hdl(void *ctx);
@@ -1070,14 +1041,20 @@ void reassoc_timer_hdl(_adapter *padapter);
 		_set_timer(&(mlmeext)->link_timer, (ms)); \
 	} while (0)
 
+bool rtw_is_basic_rate_cck(u8 rate);
+bool rtw_is_basic_rate_ofdm(u8 rate);
+bool rtw_is_basic_rate_mix(u8 rate);
+
 extern int cckrates_included(unsigned char *rate, int ratelen);
 extern int cckratesonly_included(unsigned char *rate, int ratelen);
 
 extern void process_addba_req(_adapter *padapter, u8 *paddba_req, u8 *addr);
 
 extern void update_TSF(struct mlme_ext_priv *pmlmeext, u8 *pframe, uint len);
-extern void correct_TSF(_adapter *padapter, struct mlme_ext_priv *pmlmeext);
-extern void adaptive_early_32k(struct mlme_ext_priv *pmlmeext, u8 *pframe, uint len);
+extern void correct_TSF(_adapter *padapter, u8 mlme_state);
+#ifdef CONFIG_BCN_RECV_TIME
+void rtw_rx_bcn_time_update(_adapter *adapter, uint bcn_len, u8 data_rate);
+#endif
 extern u8 traffic_status_watchdog(_adapter *padapter, u8 from_timer);
 
 void rtw_process_bar_frame(_adapter *padapter, union recv_frame *precv_frame);
@@ -1205,7 +1182,7 @@ struct cmd_hdl wlancmds[] = {
 	GEN_MLME_EXT_HANDLER(sizeof(struct SetChannelPlan_param), set_chplan_hdl) /*59*/
 	GEN_MLME_EXT_HANDLER(sizeof(struct LedBlink_param), led_blink_hdl) /*60*/
 
-	GEN_MLME_EXT_HANDLER(sizeof(struct SetChannelSwitch_param), set_csa_hdl) /*61*/
+	GEN_MLME_EXT_HANDLER(0, set_csa_hdl) /*61*/
 	GEN_MLME_EXT_HANDLER(sizeof(struct TDLSoption_param), tdls_hdl) /*62*/
 	GEN_MLME_EXT_HANDLER(0, chk_bmc_sleepq_hdl) /*63*/
 	GEN_MLME_EXT_HANDLER(sizeof(struct RunInThread_param), run_in_thread_hdl) /*64*/
diff --git a/rtl8723DS/include/rtw_mp.h b/rtl8723DS/include/rtw_mp.h
index 4300bea..6dbdd87 100755..100644
--- a/rtl8723DS/include/rtw_mp.h
+++ b/rtl8723DS/include/rtw_mp.h
@@ -271,6 +271,7 @@ enum {
 	MP_STOP,
 	MP_RATE,
 	MP_CHANNEL,
+	MP_CHL_OFFSET,
 	MP_BANDWIDTH,
 	MP_TXPOWER,
 	MP_ANT_TX,
@@ -351,6 +352,7 @@ struct mp_priv {
 	u32 rx_pktloss;
 	BOOLEAN  rx_bindicatePkt;
 	struct recv_stat rxstat;
+	BOOLEAN brx_filter_beacon;
 
 	/* RF/BB relative */
 	u8 channel;
@@ -421,6 +423,7 @@ struct mp_priv {
 
 
 	u8		*TXradomBuffer;
+	u8		CureFuseBTCoex;
 };
 
 typedef struct _IOCMD_STRUCT_ {
@@ -822,6 +825,9 @@ int rtw_mp_rate(struct net_device *dev,
 int rtw_mp_channel(struct net_device *dev,
 		struct iw_request_info *info,
 		struct iw_point *wrqu, char *extra);
+int rtw_mp_ch_offset(struct net_device *dev,
+		struct iw_request_info *info,
+		struct iw_point *wrqu, char *extra);
 int rtw_mp_bandwidth(struct net_device *dev,
 		struct iw_request_info *info,
 		struct iw_point *wrqu, char *extra);
@@ -926,7 +932,7 @@ u8 HwRateToMPTRate(u8 rate);
 int rtw_mp_iqk(struct net_device *dev,
 		 struct iw_request_info *info,
 		 struct iw_point *wrqu, char *extra);
-int rtw_mp_lck(struct net_device *dev, 
-		struct iw_request_info *info, 
+int rtw_mp_lck(struct net_device *dev,
+		struct iw_request_info *info,
 		struct iw_point *wrqu, char *extra);
 #endif /* _RTW_MP_H_ */
diff --git a/rtl8723DS/include/rtw_mp_ioctl.h b/rtl8723DS/include/rtw_mp_ioctl.h
index a9dabfc..a9dabfc 100755..100644
--- a/rtl8723DS/include/rtw_mp_ioctl.h
+++ b/rtl8723DS/include/rtw_mp_ioctl.h
diff --git a/rtl8723DS/include/rtw_mp_phy_regdef.h b/rtl8723DS/include/rtw_mp_phy_regdef.h
index be62780..be62780 100755..100644
--- a/rtl8723DS/include/rtw_mp_phy_regdef.h
+++ b/rtl8723DS/include/rtw_mp_phy_regdef.h
diff --git a/rtl8723DS/include/rtw_odm.h b/rtl8723DS/include/rtw_odm.h
index 4ce6fe1..15fa2b9 100755..100644
--- a/rtl8723DS/include/rtw_odm.h
+++ b/rtl8723DS/include/rtw_odm.h
@@ -77,18 +77,19 @@ void rtw_odm_adaptivity_config_msg(void *sel, _adapter *adapter);
 
 bool rtw_odm_adaptivity_needed(_adapter *adapter);
 void rtw_odm_adaptivity_parm_msg(void *sel, _adapter *adapter);
-void rtw_odm_adaptivity_parm_set(_adapter *adapter, s8 th_l2h_ini, s8 th_edcca_hl_diff, s8 th_l2h_ini_mode2, s8 th_edcca_hl_diff_mode2, u8 edcca_enable);
+void rtw_odm_adaptivity_parm_set(_adapter *adapter, s8 th_l2h_ini, s8 th_edcca_hl_diff);
 void rtw_odm_get_perpkt_rssi(void *sel, _adapter *adapter);
 void rtw_odm_acquirespinlock(_adapter *adapter,	enum rt_spinlock_type type);
 void rtw_odm_releasespinlock(_adapter *adapter,	enum rt_spinlock_type type);
 
-u8 rtw_odm_get_dfs_domain(_adapter *adapter);
-u8 rtw_odm_dfs_domain_unknown(_adapter *adapter);
+u8 rtw_odm_get_dfs_domain(struct dvobj_priv *dvobj);
+u8 rtw_odm_dfs_domain_unknown(struct dvobj_priv *dvobj);
 #ifdef CONFIG_DFS_MASTER
 VOID rtw_odm_radar_detect_reset(_adapter *adapter);
 VOID rtw_odm_radar_detect_disable(_adapter *adapter);
 VOID rtw_odm_radar_detect_enable(_adapter *adapter);
 BOOLEAN rtw_odm_radar_detect(_adapter *adapter);
+u8 rtw_odm_radar_detect_polling_int_ms(struct dvobj_priv *dvobj);
 #endif /* CONFIG_DFS_MASTER */
 
 void rtw_odm_parse_rx_phy_status_chinfo(union recv_frame *rframe, u8 *phys);
diff --git a/rtl8723DS/include/rtw_p2p.h b/rtl8723DS/include/rtw_p2p.h
index 203886b..1f985ad 100755..100644
--- a/rtl8723DS/include/rtw_p2p.h
+++ b/rtl8723DS/include/rtw_p2p.h
@@ -102,11 +102,8 @@ static inline void _rtw_p2p_restore_state(struct wifidirect_info *wdinfo)
 	}
 }
 #endif
-static inline void _rtw_p2p_set_role(struct wifidirect_info *wdinfo, enum P2P_ROLE role)
-{
-	if (wdinfo->role != role)
-		wdinfo->role = role;
-}
+void _rtw_p2p_set_role(struct wifidirect_info *wdinfo, enum P2P_ROLE role);
+
 static inline int _rtw_p2p_state(struct wifidirect_info *wdinfo)
 {
 	return wdinfo->p2p_state;
diff --git a/rtl8723DS/include/rtw_pwrctrl.h b/rtl8723DS/include/rtw_pwrctrl.h
index 696ff70..8eac094 100755..100644
--- a/rtl8723DS/include/rtw_pwrctrl.h
+++ b/rtl8723DS/include/rtw_pwrctrl.h
@@ -305,7 +305,9 @@ struct aoac_report {
 	u8 security_type;
 	u8 wow_pattern_idx;
 	u8 version_info;
-	u8 reserved[4];
+	u8 rekey_ok:1;
+	u8 dummy:7;
+	u8 reserved[3];
 	u8 rxptk_iv[8];
 	u8 rxgtk_iv[4][8];
 };
@@ -317,11 +319,23 @@ struct pwrctrl_priv {
 	volatile u8 cpwm; /* fw current power state. updated when 1. read from HCPWM 2. driver lowers power level */
 	volatile u8 tog; /* toggling */
 	volatile u8 cpwm_tog; /* toggling */
+	u8 rpwm_retry;
 
 	u8	pwr_mode;
 	u8	smart_ps;
 	u8	bcn_ant_mode;
 	u8	dtim;
+#ifdef CONFIG_LPS_CHK_BY_TP
+	u8	lps_chk_by_tp;
+	u16	lps_tx_tp_th;/*Mbps*/
+	u16	lps_rx_tp_th;/*Mbps*/
+	u16	lps_bi_tp_th;/*Mbps*//*TRX TP*/
+	int	lps_chk_cnt_th;
+	int	lps_chk_cnt;
+	u32	lps_tx_pkts;
+	u32	lps_rx_pkts;
+
+#endif
 
 #ifdef CONFIG_WMMPS_STA
 	u8 wmm_smart_ps;
@@ -397,6 +411,7 @@ struct pwrctrl_priv {
 #ifdef CONFIG_GPIO_WAKEUP
 	u8		is_high_active;
 #endif /* CONFIG_GPIO_WAKEUP */
+	u8		hst2dev_high_active;
 #ifdef CONFIG_WOWLAN
 	bool		default_patterns_en;
 #ifdef CONFIG_IPV6
@@ -529,16 +544,22 @@ rt_rf_power_state RfOnOffDetect(IN	PADAPTER pAdapter);
 #endif
 
 
+#ifdef DBG_CHECK_FW_PS_STATE
 int rtw_fw_ps_state(PADAPTER padapter);
+#endif
 
 #ifdef CONFIG_LPS
-s32 LPS_RF_ON_check(PADAPTER padapter, u32 delay_ms);
 void LPS_Enter(PADAPTER padapter, const char *msg);
 void LPS_Leave(PADAPTER padapter, const char *msg);
+#ifdef CONFIG_CHECK_LEAVE_LPS
+#ifdef CONFIG_LPS_CHK_BY_TP
+void traffic_check_for_leave_lps_by_tp(PADAPTER padapter, u8 tx, struct sta_info *sta);
+#endif
 void traffic_check_for_leave_lps(PADAPTER padapter, u8 tx, u32 tx_packets);
+#endif /*CONFIG_CHECK_LEAVE_LPS*/
 void rtw_set_ps_mode(PADAPTER padapter, u8 ps_mode, u8 smart_ps, u8 bcn_ant_mode, const char *msg);
 void rtw_set_fw_in_ips_mode(PADAPTER padapter, u8 enable);
-void rtw_set_rpwm(_adapter *padapter, u8 val8);
+u8 rtw_set_rpwm(_adapter *padapter, u8 val8);
 void rtw_wow_lps_level_decide(_adapter *adapter, u8 wow_en);
 #endif
 
@@ -583,4 +604,6 @@ void rtw_wow_pattern_sw_reset(_adapter *adapter);
 u8 rtw_set_default_pattern(_adapter *adapter);
 void rtw_wow_pattern_sw_dump(_adapter *adapter);
 #endif /* CONFIG_WOWLAN */
+void rtw_ssmps_enter(_adapter *adapter, struct sta_info *sta);
+void rtw_ssmps_leave(_adapter *adapter, struct sta_info *sta);
 #endif /* __RTL871X_PWRCTRL_H_ */
diff --git a/rtl8723DS/include/rtw_qos.h b/rtl8723DS/include/rtw_qos.h
index 8e1d013..8e1d013 100755..100644
--- a/rtl8723DS/include/rtw_qos.h
+++ b/rtl8723DS/include/rtw_qos.h
diff --git a/rtl8723DS/include/rtw_recv.h b/rtl8723DS/include/rtw_recv.h
index e09b442..ca0ebc3 100755..100644
--- a/rtl8723DS/include/rtw_recv.h
+++ b/rtl8723DS/include/rtw_recv.h
@@ -15,6 +15,10 @@
 #ifndef _RTW_RECV_H_
 #define _RTW_RECV_H_
 
+#define RTW_RX_MSDU_ACT_NONE		0
+#define RTW_RX_MSDU_ACT_INDICATE	BIT0
+#define RTW_RX_MSDU_ACT_FORWARD		BIT1
+
 #ifdef PLATFORM_OS_XP
 	#ifdef CONFIG_SDIO_HCI
 		#define NR_RECVBUFF 1024/* 512 */ /* 128 */
@@ -80,20 +84,10 @@
 #define RX_CMD_QUEUE				1
 #define RX_MAX_QUEUE				2
 
-static u8 SNAP_ETH_TYPE_IPX[2] = {0x81, 0x37};
-
-static u8 SNAP_ETH_TYPE_APPLETALK_AARP[2] = {0x80, 0xf3};
-static u8 SNAP_ETH_TYPE_APPLETALK_DDP[2] = {0x80, 0x9b};
-static u8 SNAP_ETH_TYPE_TDLS[2] = {0x89, 0x0d};
-static u8 SNAP_HDR_APPLETALK_DDP[3] = {0x08, 0x00, 0x07}; /* Datagram Delivery Protocol */
-
-static u8 oui_8021h[] = {0x00, 0x00, 0xf8};
-static u8 oui_rfc1042[] = {0x00, 0x00, 0x00};
-
 #define MAX_SUBFRAME_COUNT	64
-static u8 rtw_rfc1042_header[] = { 0xaa, 0xaa, 0x03, 0x00, 0x00, 0x00 };
 /* Bridge-Tunnel header (for EtherTypes ETH_P_AARP and ETH_P_IPX) */
-static u8 rtw_bridge_tunnel_header[] = { 0xaa, 0xaa, 0x03, 0x00, 0x00, 0xf8 };
+extern u8 rtw_bridge_tunnel_header[];
+extern u8 rtw_rfc1042_header[];
 
 /* for Rx reordering buffer control */
 struct recv_reorder_ctrl {
@@ -194,6 +188,12 @@ struct rx_pkt_attrib	{
 	u8	ta[ETH_ALEN];
 	u8	ra[ETH_ALEN];
 	u8	bssid[ETH_ALEN];
+#ifdef CONFIG_RTW_MESH
+	u8	msa[ETH_ALEN]; /* mesh sa */
+	u8	mda[ETH_ALEN]; /* mesh da */
+	u8 mesh_ctrl_present;
+	u8	mesh_ctrl_len; /* length of mesh control field */
+#endif
 
 	u8	ack_policy;
 
@@ -211,8 +211,19 @@ struct rx_pkt_attrib	{
 	u8	ppdu_cnt;
 	u32 	free_cnt;		/* free run counter */
 	struct phydm_phyinfo_struct phy_info;
+
+#ifdef CONFIG_TCP_CSUM_OFFLOAD_RX
+	/* checksum offload realted varaiables */
+	u8 csum_valid;		/* Checksum valid, 0: not check, 1: checked */
+	u8 csum_err;		/* Checksum Error occurs */
+#endif /* CONFIG_TCP_CSUM_OFFLOAD_RX */
 };
 
+#ifdef CONFIG_RTW_MESH
+#define RATTRIB_GET_MCTRL_LEN(rattrib) ((rattrib)->mesh_ctrl_len)
+#else
+#define RATTRIB_GET_MCTRL_LEN(rattrib) 0
+#endif
 
 /* These definition is used for Rx packet reordering. */
 #define SN_LESS(a, b)		(((a-b) & 0x800) != 0)
@@ -221,7 +232,11 @@ struct rx_pkt_attrib	{
 /* #define REORDER_ENTRY_NUM	128 */
 #define REORDER_WAIT_TIME	(50) /* (ms) */
 
-#define RECVBUFF_ALIGN_SZ 8
+#if defined(CONFIG_PLATFORM_RTK390X) && defined(CONFIG_USB_HCI)
+	#define RECVBUFF_ALIGN_SZ 32
+#else
+	#define RECVBUFF_ALIGN_SZ 8
+#endif
 
 #ifdef CONFIG_TRX_BD_ARCH
 	#define RX_WIFI_INFO_SIZE	24
@@ -485,6 +500,9 @@ struct sta_recv_priv {
 	_queue defrag_q;	 /* keeping the fragment frame until defrag */
 
 	struct	stainfo_rxcache rxcache;
+	u16	bmc_tid_rxseq[16];
+	u16	nonqos_rxseq;
+	u16	nonqos_bmc_rxseq;
 
 	/* uint	sta_rx_bytes; */
 	/* uint	sta_rx_pkts; */
@@ -848,15 +866,8 @@ __inline static s32 translate_percentage_to_dbm(u32 SignalStrengthIndex)
 {
 	s32	SignalPower; /* in dBm. */
 
-#ifdef CONFIG_SIGNAL_SCALE_MAPPING
-	/* Translate to dBm (x=0.5y-95). */
-	SignalPower = (s32)((SignalStrengthIndex + 1) >> 1);
-	SignalPower -= 95;
-#else
 	/* Translate to dBm (x=y-100) */
 	SignalPower = SignalStrengthIndex - 100;
-#endif
-
 	return SignalPower;
 }
 
@@ -868,5 +879,6 @@ extern void  mgt_dispatcher(_adapter *padapter, union recv_frame *precv_frame);
 
 u8 adapter_allow_bmc_data_rx(_adapter *adapter);
 s32 pre_recv_entry(union recv_frame *precvframe, u8 *pphy_status);
+void count_rx_stats(_adapter *padapter, union recv_frame *prframe, struct sta_info *sta);
 
 #endif
diff --git a/rtl8723DS/include/rtw_rf.h b/rtl8723DS/include/rtw_rf.h
index c526cb2..5882b90 100755..100644
--- a/rtl8723DS/include/rtw_rf.h
+++ b/rtl8723DS/include/rtw_rf.h
@@ -16,7 +16,9 @@
 #define __RTW_RF_H_
 
 #define NumRates	(13)
-
+#define	B_MODE_RATE_NUM	(4)
+#define	G_MODE_RATE_NUM	(8)
+#define	G_MODE_BASIC_RATE_NUM	(3)
 /* slot time for 11g */
 #define SHORT_SLOT_TIME					9
 #define NON_SHORT_SLOT_TIME				20
@@ -149,45 +151,6 @@ int rtw_ch2freq(int chan);
 int rtw_freq2ch(int freq);
 bool rtw_chbw_to_freq_range(u8 ch, u8 bw, u8 offset, u32 *hi, u32 *lo);
 
-#define RTW_MODULE_RTL8821AE_HMC_M2		BIT0	/* RTL8821AE(HMC + M.2) */
-#define RTW_MODULE_RTL8821AU			BIT1	/* RTL8821AU */
-#define RTW_MODULE_RTL8812AENF_NGFF		BIT2	/* RTL8812AENF(8812AE+8761)_NGFF */
-#define RTW_MODULE_RTL8812AEBT_HMC		BIT3	/* RTL8812AEBT(8812AE+8761)_HMC */
-#define RTW_MODULE_RTL8188EE_HMC_M2		BIT4	/* RTL8188EE(HMC + M.2) */
-#define RTW_MODULE_RTL8723BE_HMC_M2		BIT5	/* RTL8723BE(HMC + M.2) */
-#define RTW_MODULE_RTL8723BS_NGFF1216	BIT6	/* RTL8723BS(NGFF1216) */
-#define RTW_MODULE_RTL8192EEBT_HMC_M2	BIT7	/* RTL8192EEBT(8192EE+8761AU)_(HMC + M.2) */
-#define RTW_MODULE_RTL8723DE_NGFF1630	BIT8	/* RTL8723DE(NGFF1630) */
-#define RTW_MODULE_RTL8822BE			BIT9	/* RTL8822BE */
-#define RTW_MODULE_RTL8821CE			BIT10	/* RTL8821CE */
-
-#define IS_ALPHA2_NO_SPECIFIED(_alpha2) ((*((u16 *)(_alpha2))) == 0xFFFF)
-
-struct country_chplan {
-	char alpha2[2];
-	u8 chplan;
-#ifdef CONFIG_80211AC_VHT
-	u8 en_11ac;
-#endif
-#if RTW_DEF_MODULE_REGULATORY_CERT
-	u16 def_module_flags; /* RTW_MODULE_RTLXXX */
-#endif
-};
-
-#ifdef CONFIG_80211AC_VHT
-#define COUNTRY_CHPLAN_EN_11AC(_ent) ((_ent)->en_11ac)
-#else
-#define COUNTRY_CHPLAN_EN_11AC(_ent) 0
-#endif
-
-#if RTW_DEF_MODULE_REGULATORY_CERT
-#define COUNTRY_CHPLAN_DEF_MODULE_FALGS(_ent) ((_ent)->def_module_flags)
-#else
-#define COUNTRY_CHPLAN_DEF_MODULE_FALGS(_ent) 0
-#endif
-
-const struct country_chplan *rtw_get_chplan_from_country(const char *country_code);
-
 struct rf_ctl_t;
 
 typedef enum _REGULATION_TXPWR_LMT {
@@ -249,10 +212,22 @@ int rtw_ch_to_bb_gain_sel(int ch);
 void rtw_rf_set_tx_gain_offset(_adapter *adapter, u8 path, s8 offset);
 void rtw_rf_apply_tx_gain_offset(_adapter *adapter, u8 ch);
 
-u8 rtw_is_5g_band1(u8 ch);
-u8 rtw_is_5g_band2(u8 ch);
-u8 rtw_is_5g_band3(u8 ch);
-u8 rtw_is_5g_band4(u8 ch);
+/* only check channel ranges */
+#define rtw_is_2g_ch(ch) (ch >= 1 && ch <= 14)
+#define rtw_is_5g_ch(ch) ((ch) >= 36 && (ch) <= 177)
+#define rtw_is_same_band(a, b) \
+	((rtw_is_2g_ch(a) && rtw_is_2g_ch(b)) \
+	|| (rtw_is_5g_ch(a) && rtw_is_5g_ch(b)))
+
+#define rtw_is_5g_band1(ch) ((ch) >= 36 && (ch) <= 48)
+#define rtw_is_5g_band2(ch) ((ch) >= 52 && (ch) <= 64)
+#define rtw_is_5g_band3(ch) ((ch) >= 100 && (ch) <= 144)
+#define rtw_is_5g_band4(ch) ((ch) >= 149 && (ch) <= 177)
+#define rtw_is_same_5g_band(a, b) \
+	((rtw_is_5g_band1(a) && rtw_is_5g_band1(b)) \
+	|| (rtw_is_5g_band2(a) && rtw_is_5g_band2(b)) \
+	|| (rtw_is_5g_band3(a) && rtw_is_5g_band3(b)) \
+	|| (rtw_is_5g_band4(a) && rtw_is_5g_band4(b)))
 
 u8 rtw_is_dfs_range(u32 hi, u32 lo);
 u8 rtw_is_dfs_ch(u8 ch);
diff --git a/rtl8723DS/include/rtw_rm.h b/rtl8723DS/include/rtw_rm.h
index 9efcf13..9efcf13 100755..100644
--- a/rtl8723DS/include/rtw_rm.h
+++ b/rtl8723DS/include/rtw_rm.h
diff --git a/rtl8723DS/include/rtw_rm_fsm.h b/rtl8723DS/include/rtw_rm_fsm.h
index ba903a9..ba903a9 100755..100644
--- a/rtl8723DS/include/rtw_rm_fsm.h
+++ b/rtl8723DS/include/rtw_rm_fsm.h
diff --git a/rtl8723DS/include/rtw_rson.h b/rtl8723DS/include/rtw_rson.h
index 6996738..6996738 100755..100644
--- a/rtl8723DS/include/rtw_rson.h
+++ b/rtl8723DS/include/rtw_rson.h
diff --git a/rtl8723DS/include/rtw_sdio.h b/rtl8723DS/include/rtw_sdio.h
index 7490b54..7490b54 100755..100644
--- a/rtl8723DS/include/rtw_sdio.h
+++ b/rtl8723DS/include/rtw_sdio.h
diff --git a/rtl8723DS/include/rtw_security.h b/rtl8723DS/include/rtw_security.h
index 682bdf4..ac8432e 100755..100644
--- a/rtl8723DS/include/rtw_security.h
+++ b/rtl8723DS/include/rtw_security.h
@@ -446,6 +446,12 @@ static const unsigned long K[64] = {
 #ifdef CONFIG_IEEE80211W
 int omac1_aes_128(const u8 *key, const u8 *data, size_t data_len, u8 *mac);
 #endif /* CONFIG_IEEE80211W */
+#ifdef CONFIG_RTW_MESH_AEK
+int aes_siv_encrypt(const u8 *key, const u8 *pw, size_t pwlen
+	, size_t num_elem, const u8 *addr[], const size_t *len, u8 *out);
+int aes_siv_decrypt(const u8 *key, const u8 *iv_crypt, size_t iv_c_len
+	, size_t num_elem, const u8 *addr[], const size_t *len, u8 *out);
+#endif
 void rtw_secmicsetkey(struct mic_data *pmicdata, u8 *key);
 void rtw_secmicappendbyte(struct mic_data *pmicdata, u8 b);
 void rtw_secmicappend(struct mic_data *pmicdata, u8 *src, u32 nBytes);
diff --git a/rtl8723DS/include/rtw_sreset.h b/rtl8723DS/include/rtw_sreset.h
index f02cfb6..1fd999a 100755..100644
--- a/rtl8723DS/include/rtw_sreset.h
+++ b/rtl8723DS/include/rtw_sreset.h
@@ -21,6 +21,7 @@ enum {
 	SRESET_TGP_NULL = 0,
 	SRESET_TGP_XMIT_STATUS = 1,
 	SRESET_TGP_LINK_STATUS = 2,
+	SRESET_TGP_INFO = 99,
 };
 
 struct sreset_priv {
@@ -34,15 +35,12 @@ struct sreset_priv {
 	u64 self_dect_tx_cnt;
 	u64 self_dect_rx_cnt;
 	u64 self_dect_fw_cnt;
-	u64 self_dect_scan_cnt;
-	u64 txbuf_empty_cnt;
 	u64 tx_dma_status_cnt;
 	u64 rx_dma_status_cnt;
 	u8 rx_cnt;
 	u8 self_dect_fw;
-	u8 self_dect_scan;
-	u8 is_txbuf_empty;
 	u8 self_dect_case;
+	u16 last_mac_rxff_ptr;
 	u8 dbg_sreset_ctrl;
 };
 
diff --git a/rtl8723DS/include/rtw_tdls.h b/rtl8723DS/include/rtw_tdls.h
index 5c23e4e..5c23e4e 100755..100644
--- a/rtl8723DS/include/rtw_tdls.h
+++ b/rtl8723DS/include/rtw_tdls.h
diff --git a/rtl8723DS/include/rtw_version.h b/rtl8723DS/include/rtw_version.h
index e370437..0245c19 100755..100644
--- a/rtl8723DS/include/rtw_version.h
+++ b/rtl8723DS/include/rtw_version.h
@@ -1,2 +1,2 @@
-#define DRIVERVERSION	"v5.2.15.2_27196.20180321_COEX20171212-2222"
-#define BTCOEXVERSION	"COEX20171212-2222"
+#define DRIVERVERSION	"v5.6.5_31752.20181221_COEX20181130-2e2e"
+#define BTCOEXVERSION	"COEX20181130-2e2e"
diff --git a/rtl8723DS/include/rtw_vht.h b/rtl8723DS/include/rtw_vht.h
index 40df177..8812222 100755..100644
--- a/rtl8723DS/include/rtw_vht.h
+++ b/rtl8723DS/include/rtw_vht.h
@@ -121,16 +121,35 @@ struct vht_priv {
 	u8	ldpc_cap;
 	u8	stbc_cap;
 	u16	beamform_cap;
+	u8	ap_is_mu_bfer;
 
 	u8	sgi_80m;/* short GI */
 	u8	ampdu_len;
 
-	u8	vht_op_mode_notify;
 	u8	vht_highest_rate;
 	u8	vht_mcs_map[2];
 
-	u8	vht_cap[32];
+	u8 op_present:1; /* vht_op is present */
+	u8 notify_present:1; /* vht_op_mode_notify is present */
+
+	u8 vht_cap[32];
+	u8 vht_op[VHT_OP_IE_LEN];
+	u8 vht_op_mode_notify;
+};
+
+#ifdef ROKU_PRIVATE
+struct vht_priv_infra_ap {
+
+	/* Infra mode, only store for AP's info, not intersection of STA and AP*/
+	u8	ldpc_cap_infra_ap;
+	u8	stbc_cap_infra_ap;
+	u16	beamform_cap_infra_ap;
+	u8	vht_mcs_map_infra_ap[2];
+	u8	vht_mcs_map_tx_infra_ap[2];
+	u8	channel_width_infra_ap;
+	u8	number_of_streams_infra_ap;
 };
+#endif /* ROKU_PRIVATE */
 
 u8	rtw_get_vht_highest_rate(u8 *pvht_mcs_map);
 u16	rtw_vht_mcs_to_data_rate(u8 bw, u8 short_GI, u8 vht_mcs_rate);
@@ -142,6 +161,9 @@ u32	rtw_build_vht_cap_ie(_adapter *padapter, u8 *pbuf);
 void	update_sta_vht_info_apmode(_adapter *padapter, PVOID psta);
 void	update_hw_vht_param(_adapter *padapter);
 void	VHT_caps_handler(_adapter *padapter, PNDIS_802_11_VARIABLE_IEs pIE);
+#ifdef ROKU_PRIVATE
+void	VHT_caps_handler_infra_ap(_adapter *padapter, PNDIS_802_11_VARIABLE_IEs pIE);
+#endif /* ROKU_PRIVATE */
 void	VHT_operation_handler(_adapter *padapter, PNDIS_802_11_VARIABLE_IEs pIE);
 void	rtw_process_vht_op_mode_notify(_adapter *padapter, u8 *pframe, PVOID sta);
 u32	rtw_restructure_vht_ie(_adapter *padapter, u8 *in_ie, u8 *out_ie, uint in_len, uint *pout_len);
@@ -150,4 +172,5 @@ u8	rtw_vht_mcsmap_to_nss(u8 *pvht_mcs_map);
 void rtw_vht_nss_to_mcsmap(u8 nss, u8 *target_mcs_map, u8 *cur_mcs_map);
 void rtw_vht_ies_attach(_adapter *padapter, WLAN_BSSID_EX *pcur_network);
 void rtw_vht_ies_detach(_adapter *padapter, WLAN_BSSID_EX *pcur_network);
+void rtw_check_for_vht20(_adapter *adapter, u8 *ies, int ies_len);
 #endif /* _RTW_VHT_H_ */
diff --git a/rtl8723DS/include/rtw_wapi.h b/rtl8723DS/include/rtw_wapi.h
index 512bb7f..512bb7f 100755..100644
--- a/rtl8723DS/include/rtw_wapi.h
+++ b/rtl8723DS/include/rtw_wapi.h
diff --git a/rtl8723DS/include/rtw_wifi_regd.h b/rtl8723DS/include/rtw_wifi_regd.h
index f56008c..8e42fce 100755..100644
--- a/rtl8723DS/include/rtw_wifi_regd.h
+++ b/rtl8723DS/include/rtw_wifi_regd.h
@@ -28,7 +28,7 @@ enum country_code_type_t {
 	COUNTRY_CODE_MAX
 };
 
-int rtw_regd_init(_adapter *padapter);
-void rtw_reg_notify_by_driver(_adapter *adapter);
+void rtw_regd_apply_flags(struct wiphy *wiphy);
+int rtw_regd_init(struct wiphy *wiphy);
 
 #endif /* __RTW_WIFI_REGD_H__ */
diff --git a/rtl8723DS/include/rtw_xmit.h b/rtl8723DS/include/rtw_xmit.h
index 7b49b27..6c718d5 100755..100644
--- a/rtl8723DS/include/rtw_xmit.h
+++ b/rtl8723DS/include/rtw_xmit.h
@@ -27,6 +27,7 @@
 
 	#if defined CONFIG_SDIO_HCI
 		#define NR_XMITBUFF	(16)
+		#define SDIO_TX_DIV_NUM (2)
 	#endif
 	#if defined(CONFIG_GSPI_HCI)
 		#define NR_XMITBUFF	(128)
@@ -84,13 +85,15 @@
 #endif
 
 #ifdef CONFIG_RTL8812A
-	#define MAX_CMDBUF_SZ	(512 * 17)
+	#define MAX_CMDBUF_SZ	(512 * 18)
 #elif defined(CONFIG_RTL8723D) && defined(CONFIG_LPS_POFF)
 	#define MAX_CMDBUF_SZ	(128*70) /*(8960)*/
 #else
 	#define MAX_CMDBUF_SZ	(5120)	/* (4096) */
 #endif
 
+#define MAX_BEACON_LEN	512
+
 #define MAX_NUMBLKS		(1)
 
 #define XMIT_VO_QUEUE (0)
@@ -182,7 +185,8 @@
 #if defined(CONFIG_RTL8812A) || defined(CONFIG_RTL8821A) ||\
 	defined(CONFIG_RTL8723B) || defined(CONFIG_RTL8192E) ||\
 	defined(CONFIG_RTL8814A) || defined(CONFIG_RTL8703B) ||\
-	defined(CONFIG_RTL8188F) || defined(CONFIG_RTL8723D)
+	defined(CONFIG_RTL8188F) || defined(CONFIG_RTL8188GTV) || defined(CONFIG_RTL8723D) ||\
+	defined(CONFIG_RTL8710B) || defined(CONFIG_RTL8192F)
 	#define TXDESC_SIZE 40
 #elif defined(CONFIG_RTL8822B)
 	#define TXDESC_SIZE 48		/* HALMAC_TX_DESC_SIZE_8822B */
@@ -236,7 +240,8 @@ enum TXDESC_SC {
 		#define TXDESC_64_BYTES
 	#endif
 #elif defined(CONFIG_RTL8812A) || defined(CONFIG_RTL8821A) || defined(CONFIG_RTL8723B) \
-	|| defined(CONFIG_RTL8188F) || defined(CONFIG_RTL8723D)
+	|| defined(CONFIG_RTL8188F) || defined(CONFIG_RTL8188GTV) || defined(CONFIG_RTL8723D) \
+	|| defined(CONFIG_RTL8192F)
 	#define TXDESC_40_BYTES
 #endif
 
@@ -390,9 +395,6 @@ struct pkt_attrib {
 	u16	seqnum;
 
 	struct sta_info *psta;
-#ifdef CONFIG_TCP_CSUM_OFFLOAD_TX
-	u8	hw_tcp_csum;
-#endif
 };
 #else
 /* reduce size */
@@ -425,6 +427,20 @@ struct pkt_attrib {
 	u8	src[ETH_ALEN];
 	u8	ta[ETH_ALEN];
 	u8	ra[ETH_ALEN];
+#ifdef CONFIG_RTW_MESH
+	u8	mda[ETH_ALEN];	/* mesh da */
+	u8	msa[ETH_ALEN];	/* mesh sa */
+	u8	meshctrl_len;	/* Length of Mesh Control field */
+	u8	mesh_frame_mode;
+	#if CONFIG_RTW_MESH_DATA_BMC_TO_UC
+	u8 mb2u;
+	#endif
+	u8 mfwd_ttl;
+	u32 mseq;
+#endif
+#ifdef CONFIG_TX_CSUM_OFFLOAD
+	u8	hw_csum;
+#endif
 	u8	key_idx;
 	u8	qos_en;
 	u8	ht_en;
@@ -453,9 +469,6 @@ struct pkt_attrib {
 #endif /* CONFIG_WMMPS_STA */
 	
 	struct sta_info *psta;
-#ifdef CONFIG_TCP_CSUM_OFFLOAD_TX
-	u8	hw_tcp_csum;
-#endif
 
 	u8 rtsen;
 	u8 cts2self;
@@ -487,6 +500,12 @@ struct pkt_attrib {
 };
 #endif
 
+#ifdef CONFIG_RTW_MESH
+#define XATTRIB_GET_MCTRL_LEN(xattrib) ((xattrib)->meshctrl_len)
+#else
+#define XATTRIB_GET_MCTRL_LEN(xattrib) 0
+#endif
+
 #ifdef CONFIG_TX_AMSDU
 enum {
 	RTW_AMSDU_TIMER_UNSET = 0,
@@ -888,6 +907,30 @@ extern struct xmit_frame *__rtw_alloc_cmdxmitframe_8822be(struct xmit_priv *pxmi
 extern struct xmit_frame *__rtw_alloc_cmdxmitframe_8821ce(struct xmit_priv *pxmitpriv,
 		enum cmdbuf_type buf_type);
 #define rtw_alloc_bcnxmitframe(p) __rtw_alloc_cmdxmitframe_8821ce(p, CMDBUF_BEACON)
+#elif defined(CONFIG_RTL8192F) && defined(CONFIG_PCI_HCI)
+extern struct xmit_frame *__rtw_alloc_cmdxmitframe_8192fe(struct xmit_priv *pxmitpriv,
+		enum cmdbuf_type buf_type);
+#define rtw_alloc_bcnxmitframe(p) __rtw_alloc_cmdxmitframe_8192fe(p, CMDBUF_BEACON)
+#elif defined(CONFIG_RTL8812A) && defined(CONFIG_PCI_HCI)
+extern struct xmit_frame *__rtw_alloc_cmdxmitframe_8812ae(struct xmit_priv *pxmitpriv,
+		enum cmdbuf_type buf_type);
+#define rtw_alloc_bcnxmitframe(p) __rtw_alloc_cmdxmitframe_8812ae(p, CMDBUF_BEACON)
+#elif defined(CONFIG_RTL8723D) && defined(CONFIG_PCI_HCI)
+extern struct xmit_frame *__rtw_alloc_cmdxmitframe_8723de(struct xmit_priv *pxmitpriv,
+		enum cmdbuf_type buf_type);
+#define rtw_alloc_bcnxmitframe(p) __rtw_alloc_cmdxmitframe_8723de(p, CMDBUF_BEACON)
+#elif defined(CONFIG_RTL8723B) && defined(CONFIG_PCI_HCI)
+extern struct xmit_frame *__rtw_alloc_cmdxmitframe_8723be(struct xmit_priv *pxmitpriv,
+		enum cmdbuf_type buf_type);
+#define rtw_alloc_bcnxmitframe(p) __rtw_alloc_cmdxmitframe_8723be(p, CMDBUF_BEACON)
+#elif defined(CONFIG_RTL8814A) && defined(CONFIG_PCI_HCI)
+extern struct xmit_frame *__rtw_alloc_cmdxmitframe_8814ae(struct xmit_priv *pxmitpriv,
+		enum cmdbuf_type buf_type);
+#define rtw_alloc_bcnxmitframe(p) __rtw_alloc_cmdxmitframe_8814ae(p, CMDBUF_BEACON)
+#elif defined(CONFIG_RTL8188E) && defined(CONFIG_PCI_HCI)
+extern struct xmit_frame *__rtw_alloc_cmdxmitframe_8188ee(struct xmit_priv *pxmitpriv,
+		enum cmdbuf_type buf_type);
+#define rtw_alloc_bcnxmitframe(p) __rtw_alloc_cmdxmitframe_8188ee(p, CMDBUF_BEACON)
 #else
 #define rtw_alloc_bcnxmitframe(p) __rtw_alloc_cmdxmitframe(p, CMDBUF_BEACON)
 #endif
@@ -900,8 +943,6 @@ extern s32 rtw_free_xmitbuf(struct xmit_priv *pxmitpriv, struct xmit_buf *pxmitb
 
 void rtw_count_tx_stats(_adapter *padapter, struct xmit_frame *pxmitframe, int sz);
 extern void rtw_update_protection(_adapter *padapter, u8 *ie, uint ie_len);
-static s32 update_attrib_sec_info(_adapter *padapter, struct pkt_attrib *pattrib, struct sta_info *psta);
-static void update_attrib_phy_info(_adapter *padapter, struct pkt_attrib *pattrib, struct sta_info *psta);
 
 #ifdef CONFIG_WMMPS_STA
 static void update_attrib_trigger_frame_info(_adapter *padapter, struct pkt_attrib *pattrib);
@@ -949,6 +990,7 @@ void rtw_free_hwxmits(_adapter *padapter);
 #if (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 24))
 s32 rtw_monitor_xmit_entry(struct sk_buff *skb, struct net_device *ndev);
 #endif
+s32 rtw_xmit_posthandle(_adapter *padapter, struct xmit_frame *pxmitframe, _pkt *pkt);
 s32 rtw_xmit(_adapter *padapter, _pkt **pkt);
 bool xmitframe_hiq_filter(struct xmit_frame *xmitframe);
 #if defined(CONFIG_AP_MODE) || defined(CONFIG_TDLS)
@@ -1004,7 +1046,6 @@ void rtw_tx_desc_backup_reset(void);
 u8 rtw_get_tx_desc_backup(_adapter *padapter, u8 hwq, struct rtw_tx_desc_backup **pbak);
 #endif
 
-static void do_queue_select(_adapter *padapter, struct pkt_attrib *pattrib);
 u32	rtw_get_ff_hwaddr(struct xmit_frame	*pxmitframe);
 
 #ifdef CONFIG_XMIT_ACK
diff --git a/rtl8723DS/include/sdio_hal.h b/rtl8723DS/include/sdio_hal.h
index 62e7f79..6e49835 100755..100644
--- a/rtl8723DS/include/sdio_hal.h
+++ b/rtl8723DS/include/sdio_hal.h
@@ -46,4 +46,12 @@ void rtl8723ds_set_hal_ops(PADAPTER padapter);
 void rtl8188fs_set_hal_ops(PADAPTER padapter);
 #endif
 
+#ifdef CONFIG_RTL8188GTV
+void rtl8188gtvs_set_hal_ops(PADAPTER padapter);
+#endif
+
+#ifdef CONFIG_RTL8192F
+void rtl8192fs_set_hal_ops(PADAPTER padapter);
+#endif
+
 #endif /* __SDIO_HAL_H__ */
diff --git a/rtl8723DS/include/sdio_ops.h b/rtl8723DS/include/sdio_ops.h
index 95d34d6..613613d 100755..100644
--- a/rtl8723DS/include/sdio_ops.h
+++ b/rtl8723DS/include/sdio_ops.h
@@ -146,6 +146,20 @@ extern void ClearInterrupt8723DSdio(PADAPTER padapter);
 #endif /* CONFIG_WOWLAN */
 #endif
 
+#ifdef CONFIG_RTL8192F
+extern void InitInterrupt8192FSdio(PADAPTER padapter);
+extern void InitSysInterrupt8192FSdio(PADAPTER padapter);
+extern void EnableInterrupt8192FSdio(PADAPTER padapter);
+extern void DisableInterrupt8192FSdio(PADAPTER padapter);
+extern void UpdateInterruptMask8192FSdio(PADAPTER padapter, u32 AddMSR, u32 RemoveMSR);
+extern u8 HalQueryTxBufferStatus8192FSdio(PADAPTER padapter);
+extern u8 HalQueryTxOQTBufferStatus8192FSdio(PADAPTER padapter);
+#if defined(CONFIG_WOWLAN) || defined(CONFIG_AP_WOWLAN)
+extern void DisableInterruptButCpwm2192fSdio(PADAPTER padapter);
+extern void ClearInterrupt8192FSdio(PADAPTER padapter);
+#endif /* CONFIG_WOWLAN */
+#endif
+
 #ifdef CONFIG_RTL8188F
 extern void InitInterrupt8188FSdio(PADAPTER padapter);
 extern void InitSysInterrupt8188FSdio(PADAPTER padapter);
@@ -159,4 +173,52 @@ extern void ClearInterrupt8188FSdio(PADAPTER padapter);
 #endif /* defined(CONFIG_WOWLAN) || defined(CONFIG_AP_WOWLAN) */
 #endif
 
+#ifdef CONFIG_RTL8188GTV
+extern void InitInterrupt8188GTVSdio(PADAPTER padapter);
+extern void InitSysInterrupt8188GTVSdio(PADAPTER padapter);
+extern void EnableInterrupt8188GTVSdio(PADAPTER padapter);
+extern void DisableInterrupt8188GTVSdio(PADAPTER padapter);
+extern u8 HalQueryTxBufferStatus8188GTVSdio(PADAPTER padapter);
+extern u8 HalQueryTxOQTBufferStatus8188GTVSdio(PADAPTER padapter);
+#if defined(CONFIG_WOWLAN) || defined(CONFIG_AP_WOWLAN)
+extern void DisableInterruptButCpwm28188GTVSdio(PADAPTER padapter);
+extern void ClearInterrupt8188GTVSdio(PADAPTER padapter);
+#endif /* defined(CONFIG_WOWLAN) || defined(CONFIG_AP_WOWLAN) */
+#endif
+
+/**
+ * rtw_sdio_get_block_size() - Get block size of SDIO transfer
+ * @d		struct dvobj_priv*
+ *
+ * The unit of return value is byte.
+ */
+static inline u32 rtw_sdio_get_block_size(struct dvobj_priv *d)
+{
+	return d->intf_data.block_transfer_len;
+}
+
+/**
+ * rtw_sdio_cmd53_align_size() - Align size to one CMD53 could complete
+ * @d		struct dvobj_priv*
+ * @len		length to align
+ *
+ * Adjust len to align block size, and the new size could be transfered by one
+ * CMD53.
+ * If len < block size, it would keep original value, otherwise the value
+ * would be rounded up by block size.
+ *
+ * Return adjusted length.
+ */
+static inline size_t rtw_sdio_cmd53_align_size(struct dvobj_priv *d, size_t len)
+{
+	u32 blk_sz;
+
+
+	blk_sz = rtw_sdio_get_block_size(d);
+	if (len <= blk_sz)
+		return len;
+
+	return _RND(len, blk_sz);
+}
+
 #endif /* !__SDIO_OPS_H__ */
diff --git a/rtl8723DS/include/sdio_ops_ce.h b/rtl8723DS/include/sdio_ops_ce.h
index d542cb7..d542cb7 100755..100644
--- a/rtl8723DS/include/sdio_ops_ce.h
+++ b/rtl8723DS/include/sdio_ops_ce.h
diff --git a/rtl8723DS/include/sdio_ops_linux.h b/rtl8723DS/include/sdio_ops_linux.h
index 4bbd8fe..4bbd8fe 100755..100644
--- a/rtl8723DS/include/sdio_ops_linux.h
+++ b/rtl8723DS/include/sdio_ops_linux.h
diff --git a/rtl8723DS/include/sdio_ops_xp.h b/rtl8723DS/include/sdio_ops_xp.h
index d3d8764..d3d8764 100755..100644
--- a/rtl8723DS/include/sdio_ops_xp.h
+++ b/rtl8723DS/include/sdio_ops_xp.h
diff --git a/rtl8723DS/include/sdio_osintf.h b/rtl8723DS/include/sdio_osintf.h
index 7c2abd1..7c2abd1 100755..100644
--- a/rtl8723DS/include/sdio_osintf.h
+++ b/rtl8723DS/include/sdio_osintf.h
diff --git a/rtl8723DS/include/sta_info.h b/rtl8723DS/include/sta_info.h
index 001b164..9e100cb 100755..100644
--- a/rtl8723DS/include/sta_info.h
+++ b/rtl8723DS/include/sta_info.h
@@ -29,14 +29,21 @@
 #endif
 
 #define NUM_ACL 16
+
+#define RTW_ACL_PERIOD_DEV 0
+#define RTW_ACL_PERIOD_BSS 1
+#define RTW_ACL_PERIOD_NUM 2
+
 #define RTW_ACL_MODE_DISABLED				0
 #define RTW_ACL_MODE_ACCEPT_UNLESS_LISTED	1
 #define RTW_ACL_MODE_DENY_UNLESS_LISTED		2
 #define RTW_ACL_MODE_MAX					3
 
 #if CONFIG_RTW_MACADDR_ACL
-extern const char *const _acl_mode_str[];
-#define acl_mode_str(mode) (((mode) >= RTW_ACL_MODE_MAX) ? _acl_mode_str[RTW_ACL_MODE_DISABLED] : _acl_mode_str[(mode)])
+extern const char *const _acl_period_str[RTW_ACL_PERIOD_NUM];
+#define acl_period_str(mode) (((mode) >= RTW_ACL_PERIOD_NUM) ? "INVALID" : _acl_period_str[(mode)])
+extern const char *const _acl_mode_str[RTW_ACL_MODE_MAX];
+#define acl_mode_str(mode) (((mode) >= RTW_ACL_MODE_MAX) ? "INVALID" : _acl_mode_str[(mode)])
 #endif
 
 #ifndef RTW_PRE_LINK_STA_NUM
@@ -89,29 +96,30 @@ struct wlan_acl_pool {
 };
 
 struct	stainfo_stats	{
+	systime last_rx_time;
 
 	u64 rx_mgnt_pkts;
-		u64 rx_beacon_pkts;
-		u64 rx_probereq_pkts;
-		u64 rx_probersp_pkts; /* unicast to self */
-		u64 rx_probersp_bm_pkts;
-		u64 rx_probersp_uo_pkts; /* unicast to others */
+	u64 rx_beacon_pkts;
+	u64 rx_probereq_pkts;
+	u64 rx_probersp_pkts; /* unicast to self */
+	u64 rx_probersp_bm_pkts;
+	u64 rx_probersp_uo_pkts; /* unicast to others */
 	u64 rx_ctrl_pkts;
 	u64 rx_data_pkts;
-		u64 rx_data_bc_pkts;
-		u64 rx_data_mc_pkts;
+	u64 rx_data_bc_pkts;
+	u64 rx_data_mc_pkts;
 	u64 rx_data_qos_pkts[TID_NUM]; /* unicast only */
 
 	u64	last_rx_mgnt_pkts;
-		u64 last_rx_beacon_pkts;
-		u64 last_rx_probereq_pkts;
-		u64 last_rx_probersp_pkts; /* unicast to self */
-		u64 last_rx_probersp_bm_pkts;
-		u64 last_rx_probersp_uo_pkts; /* unicast to others */
+	u64 last_rx_beacon_pkts;
+	u64 last_rx_probereq_pkts;
+	u64 last_rx_probersp_pkts; /* unicast to self */
+	u64 last_rx_probersp_bm_pkts;
+	u64 last_rx_probersp_uo_pkts; /* unicast to others */
 	u64	last_rx_ctrl_pkts;
 	u64	last_rx_data_pkts;
-		u64 last_rx_data_bc_pkts;
-		u64 last_rx_data_mc_pkts;
+	u64 last_rx_data_bc_pkts;
+	u64 last_rx_data_mc_pkts;
 	u64 last_rx_data_qos_pkts[TID_NUM]; /* unicast only */
 
 #ifdef CONFIG_TDLS
@@ -120,13 +128,14 @@ struct	stainfo_stats	{
 #endif
 
 	u64	rx_bytes;
-		u64	rx_bc_bytes;
-		u64	rx_mc_bytes;
+	u64	rx_bc_bytes;
+	u64	rx_mc_bytes;
 	u64	last_rx_bytes;
-		u64 last_rx_bc_bytes;
-		u64 last_rx_mc_bytes;
+	u64 last_rx_bc_bytes;
+	u64 last_rx_mc_bytes;
 	u64	rx_drops; /* TBD */
-	u16 rx_tp_mbytes;
+	u32 rx_tp_kbits;
+	u32 smooth_rx_tp_kbits;
 
 	u64	tx_pkts;
 	u64	last_tx_pkts;
@@ -134,7 +143,13 @@ struct	stainfo_stats	{
 	u64	tx_bytes;
 	u64	last_tx_bytes;
 	u64 tx_drops; /* TBD */
-	u16 tx_tp_mbytes;
+	u32 tx_tp_kbits;
+	u32 smooth_tx_tp_kbits;
+
+#ifdef CONFIG_LPS_CHK_BY_TP
+	u64 acc_tx_bytes;
+	u64 acc_rx_bytes;
+#endif
 
 	/* unicast only */
 	u64 last_rx_data_uc_pkts; /* For Read & Clear requirement in proc_get_rx_stat() */
@@ -143,6 +158,10 @@ struct	stainfo_stats	{
 	u32 tx_ok_cnt;		/* Read & Clear, in proc_get_tx_stat() */
 	u32 tx_fail_cnt;	/* Read & Clear, in proc_get_tx_stat() */
 	u32 tx_retry_cnt;	/* Read & Clear, in proc_get_tx_stat() */
+#ifdef CONFIG_RTW_MESH
+	u32 rx_hwmp_pkts;
+	u32 last_rx_hwmp_pkts;
+#endif
 };
 
 #ifndef DBG_SESSION_TRACKER
@@ -224,6 +243,21 @@ struct sta_recv_dframe_info {
 };
 #endif
 
+#ifdef CONFIG_RTW_MESH
+struct mesh_plink_ent;
+struct rtw_ewma_err_rate {
+	unsigned long internal;
+};
+
+/* Mesh airtime link metrics parameters */
+struct rtw_atlm_param {
+	struct rtw_ewma_err_rate err_rate; /* Now is PACKET error rate */
+	u16 data_rate; /* The unit is 100Kbps */
+	u16 total_pkt;
+	u16 overhead; /* Channel access overhead */
+};
+#endif
+
 struct sta_info {
 
 	_lock	lock;
@@ -261,6 +295,20 @@ struct sta_info {
 	union Keytype	dot118021x_UncstKey;
 	union pn48		dot11txpn;			/* PN48 used for Unicast xmit */
 	union pn48		dot11rxpn;			/* PN48 used for Unicast recv. */
+#ifdef CONFIG_RTW_MESH
+	/* peer's GTK, RX only */
+	u8 group_privacy;
+	u8 gtk_bmp;
+	union Keytype gtk;
+	union pn48 gtk_pn;
+	#ifdef CONFIG_IEEE80211W
+	/* peer's IGTK, RX only */
+	u8 igtk_bmp;
+	u8 igtk_id;
+	union Keytype igtk;
+	union pn48 igtk_pn;
+	#endif /* CONFIG_IEEE80211W */
+#endif /* CONFIG_RTW_MESH */
 #ifdef CONFIG_GTK_OL
 	u8 kek[RTW_KEK_LEN];
 	u8 kck[RTW_KCK_LEN];
@@ -419,6 +467,16 @@ struct sta_info {
 
 #endif /* CONFIG_AP_MODE	 */
 
+#ifdef CONFIG_RTW_MESH
+	struct mesh_plink_ent *plink;
+
+	u8 local_mps;
+	u8 peer_mps;
+	u8 nonpeer_mps;
+
+	struct rtw_atlm_param metrics;
+#endif
+
 #ifdef CONFIG_IOCTL_CFG80211
 	u8 *passoc_req;
 	u32 assoc_req_len;
@@ -436,8 +494,17 @@ struct sta_info {
 	u8 max_agg_num_minimal_record; /*keep minimal tx desc max_agg_num setting*/
 	u8 curr_rx_rate;
 	u8 curr_rx_rate_bmc;
+#ifdef CONFIG_RTS_FULL_BW
+	bool vendor_8812;
+#endif
 };
 
+#ifdef CONFIG_RTW_MESH
+#define STA_SET_MESH_PLINK(sta, link) (sta)->plink = link
+#else
+#define STA_SET_MESH_PLINK(sta, link) do {} while (0)
+#endif
+
 #define sta_tx_pkts(sta) \
 	(sta->sta_stats.tx_pkts)
 
@@ -502,6 +569,15 @@ struct sta_info {
 #define sta_last_rx_probersp_uo_pkts(sta) \
 	(sta->sta_stats.last_rx_probersp_uo_pkts)
 
+#ifdef CONFIG_RTW_MESH
+#define update_last_rx_hwmp_pkts(sta) \
+	do { \
+		sta->sta_stats.last_rx_hwmp_pkts = sta->sta_stats.rx_hwmp_pkts; \
+	} while(0)
+#else
+#define update_last_rx_hwmp_pkts(sta) do {} while(0)
+#endif
+
 #define sta_update_last_rx_pkts(sta) \
 	do { \
 		int __i; \
@@ -513,6 +589,7 @@ struct sta_info {
 		sta->sta_stats.last_rx_probersp_bm_pkts = sta->sta_stats.rx_probersp_bm_pkts; \
 		sta->sta_stats.last_rx_probersp_uo_pkts = sta->sta_stats.rx_probersp_uo_pkts; \
 		sta->sta_stats.last_rx_ctrl_pkts = sta->sta_stats.rx_ctrl_pkts; \
+		update_last_rx_hwmp_pkts(sta); \
 		\
 		sta->sta_stats.last_rx_data_pkts = sta->sta_stats.rx_data_pkts; \
 		sta->sta_stats.last_rx_data_bc_pkts = sta->sta_stats.rx_data_bc_pkts; \
@@ -594,7 +671,7 @@ struct	sta_priv {
 	u16 max_num_sta;
 
 #if CONFIG_RTW_MACADDR_ACL
-	struct wlan_acl_pool acl_list;
+	struct wlan_acl_pool acl_list[RTW_ACL_PERIOD_NUM];
 #endif
 
 	#if CONFIG_RTW_PRE_LINK_STA
@@ -606,7 +683,8 @@ struct	sta_priv {
 #ifdef CONFIG_ATMEL_RC_PATCH
 	u8 atmel_rc_pattern[6];
 #endif
-	struct sta_info *c2h_sta;
+	u8 c2h_sta_mac[ETH_ALEN];
+	u8 c2h_adapter_id;
 	struct submit_ctx *gotc2h;
 };
 
@@ -649,7 +727,7 @@ void dump_aid_status(void *sel, _adapter *adapter);
 #endif
 
 #if CONFIG_RTW_MACADDR_ACL
-extern u8 rtw_access_ctrl(_adapter *adapter, u8 *mac_addr);
+extern u8 rtw_access_ctrl(_adapter *adapter, const u8 *mac_addr);
 void dump_macaddr_acl(void *sel, _adapter *adapter);
 #endif
 
diff --git a/rtl8723DS/include/usb_hal.h b/rtl8723DS/include/usb_hal.h
index a5af048..0074d3f 100755..100644
--- a/rtl8723DS/include/usb_hal.h
+++ b/rtl8723DS/include/usb_hal.h
@@ -48,6 +48,10 @@ void rtl8814au_set_hal_ops(_adapter *padapter);
 void rtl8188fu_set_hal_ops(_adapter *padapter);
 #endif
 
+#ifdef CONFIG_RTL8188GTV
+void rtl8188gtvu_set_hal_ops(_adapter *padapter);
+#endif
+
 #ifdef CONFIG_RTL8703B
 void rtl8703bu_set_hal_ops(_adapter *padapter);
 #endif
@@ -56,6 +60,14 @@ void rtl8703bu_set_hal_ops(_adapter *padapter);
 void rtl8723du_set_hal_ops(_adapter *padapter);
 #endif
 
+#ifdef CONFIG_RTL8710B
+void rtl8710bu_set_hal_ops(_adapter *padapter);
+#endif
+
+#ifdef CONFIG_RTL8192F
+void rtl8192fu_set_hal_ops(_adapter *padapter);
+#endif /* CONFIG_RTL8192F */
+
 #ifdef CONFIG_INTEL_PROXIM
 extern _adapter  *rtw_usb_get_sw_pointer(void);
 #endif /* CONFIG_INTEL_PROXIM */
diff --git a/rtl8723DS/include/usb_ops.h b/rtl8723DS/include/usb_ops.h
index a0238f1..6d5435d 100755..100644
--- a/rtl8723DS/include/usb_ops.h
+++ b/rtl8723DS/include/usb_ops.h
@@ -70,6 +70,13 @@ void interrupt_handler_8188fu(_adapter *padapter, u16 pkt_len, u8 *pbuf);
 #endif
 #endif
 
+#ifdef CONFIG_RTL8188GTV
+void rtl8188gtvu_set_hw_type(struct dvobj_priv *pdvobj);
+#ifdef CONFIG_SUPPORT_USB_INT
+void interrupt_handler_8188gtvu(_adapter *padapter, u16 pkt_len, u8 *pbuf);
+#endif
+#endif
+
 #ifdef CONFIG_RTL8723B
 void rtl8723bu_set_hw_type(struct dvobj_priv *pdvobj);
 #ifdef CONFIG_SUPPORT_USB_INT
@@ -96,6 +103,24 @@ void interrupt_handler_8723du(_adapter *padapter, u16 pkt_len, u8 *pbuf);
 #endif /* CONFIG_SUPPORT_USB_INT */
 #endif /* CONFIG_RTL8723D */
 
+#ifdef CONFIG_RTL8710B
+void rtl8710bu_set_hw_type(struct dvobj_priv *pdvobj);
+void rtl8710bu_set_intf_ops(struct _io_ops *pops);
+void rtl8710bu_recv_tasklet(void *priv);
+void rtl8710bu_xmit_tasklet(void *priv);
+#ifdef CONFIG_SUPPORT_USB_INT
+void interrupt_handler_8710bu(_adapter *padapter, u16 pkt_len, u8 *pbuf);
+#endif /* CONFIG_SUPPORT_USB_INT */
+#endif /* CONFIG_RTL8710B */
+
+#ifdef CONFIG_RTL8192F
+void rtl8192fu_set_hw_type(struct dvobj_priv *pdvobj);
+void rtl8192fu_xmit_tasklet(void *priv);
+#ifdef CONFIG_SUPPORT_USB_INT
+void rtl8192fu_interrupt_handler(_adapter *padapter, u16 pkt_len, u8 *pbuf);
+#endif /* CONFIG_SUPPORT_USB_INT */
+#endif /* CONFIG_RTL8192F */
+
 enum RTW_USB_SPEED {
 	RTW_USB_SPEED_UNKNOWN	= 0,
 	RTW_USB_SPEED_1_1	= 1,
diff --git a/rtl8723DS/include/usb_ops_linux.h b/rtl8723DS/include/usb_ops_linux.h
index bf59ca0..bf59ca0 100755..100644
--- a/rtl8723DS/include/usb_ops_linux.h
+++ b/rtl8723DS/include/usb_ops_linux.h
diff --git a/rtl8723DS/include/usb_osintf.h b/rtl8723DS/include/usb_osintf.h
index 7e5feed..7e5feed 100755..100644
--- a/rtl8723DS/include/usb_osintf.h
+++ b/rtl8723DS/include/usb_osintf.h
diff --git a/rtl8723DS/include/usb_vendor_req.h b/rtl8723DS/include/usb_vendor_req.h
index a003bfb..a003bfb 100755..100644
--- a/rtl8723DS/include/usb_vendor_req.h
+++ b/rtl8723DS/include/usb_vendor_req.h
diff --git a/rtl8723DS/include/wifi.h b/rtl8723DS/include/wifi.h
index 1fb6e70..0039aa7 100755..100644
--- a/rtl8723DS/include/wifi.h
+++ b/rtl8723DS/include/wifi.h
@@ -16,11 +16,9 @@
 #define _WIFI_H_
 
 
-#ifdef BIT
-/* #error	"BIT define occurred earlier elsewhere!\n" */
-#undef BIT
-#endif
+#ifndef BIT
 #define BIT(x)	(1 << (x))
+#endif
 
 
 #define WLAN_ETHHDR_LEN		14
@@ -44,6 +42,7 @@
 #define WLAN_MAX_ETHFRM_LEN	1514
 #define WLAN_ETHHDR_LEN		14
 #define WLAN_WMM_LEN		24
+#define VENDOR_NAME_LEN		20
 
 #ifdef CONFIG_APPEND_VENDOR_IE_ENABLE
 #define WLAN_MAX_VENDOR_IE_LEN 255
@@ -53,6 +52,13 @@
 #define WIFI_PROBERESP_VENDOR_IE_BIT BIT(2)
 #define WIFI_ASSOCREQ_VENDOR_IE_BIT BIT(3)
 #define WIFI_ASSOCRESP_VENDOR_IE_BIT BIT(4)
+#ifdef CONFIG_P2P
+#define WIFI_P2P_PROBEREQ_VENDOR_IE_BIT BIT(5)
+#define WIFI_P2P_PROBERESP_VENDOR_IE_BIT BIT(6)
+#define WLAN_MAX_VENDOR_IE_MASK_MAX 7
+#else
+#define WLAN_MAX_VENDOR_IE_MASK_MAX 5
+#endif
 #endif
 
 #define P80211CAPTURE_VERSION	0x80211001
@@ -401,31 +407,26 @@ enum WIFI_REG_DOMAIN {
 	} while (0)
 
 
-#define SetPriority(pbuf, tid)	\
-	do	{	\
-		*(unsigned short *)(pbuf) |= cpu_to_le16(tid & 0xf); \
-	} while (0)
-
-#define GetPriority(pbuf)	((le16_to_cpu(*(unsigned short *)(pbuf))) & 0xf)
-
-#define SetEOSP(pbuf, eosp)	\
-	do	{	\
-		*(unsigned short *)(pbuf) |= cpu_to_le16((eosp & 1) << 4); \
-	} while (0)
+/* QoS control field */
+#define SetPriority(qc, tid)	SET_BITS_TO_LE_2BYTE(((u8 *)(qc)), 0, 4, tid)
+#define SetEOSP(qc, eosp)		SET_BITS_TO_LE_2BYTE(((u8 *)(qc)), 4, 1, eosp)
+#define SetAckpolicy(qc, ack)	SET_BITS_TO_LE_2BYTE(((u8 *)(qc)), 5, 2, ack)
+#define SetAMsdu(qc, amsdu)		SET_BITS_TO_LE_2BYTE(((u8 *)(qc)), 7, 1, amsdu)
 
-#define SetAckpolicy(pbuf, ack)	\
-	do	{	\
-		*(unsigned short *)(pbuf) |= cpu_to_le16((ack & 3) << 5); \
-	} while (0)
+#define GetPriority(qc)		LE_BITS_TO_2BYTE(((u8 *)(qc)), 0, 4)
+#define GetEOSP(qc)			LE_BITS_TO_2BYTE(((u8 *)(qc)), 4, 1)
+#define GetAckpolicy(qc)	LE_BITS_TO_2BYTE(((u8 *)(qc)), 5, 2)
+#define GetAMsdu(qc)		LE_BITS_TO_2BYTE(((u8 *)(qc)), 7, 1)
 
-#define GetAckpolicy(pbuf) (((le16_to_cpu(*(unsigned short *)pbuf)) >> 5) & 0x3)
+/* QoS control field (MSTA only) */
+#define set_mctrl_present(qc, p)	SET_BITS_TO_LE_2BYTE(((u8 *)(qc)), 8, 1, p)
+#define set_mps_lv(qc, lv)			SET_BITS_TO_LE_2BYTE(((u8 *)(qc)), 9, 1, lv)
+#define set_rspi(qc, rspi)			SET_BITS_TO_LE_2BYTE(((u8 *)(qc)), 10, 1, rspi)
 
-#define GetAMsdu(pbuf) (((le16_to_cpu(*(unsigned short *)pbuf)) >> 7) & 0x1)
+#define get_mctrl_present(qc)	LE_BITS_TO_2BYTE(((u8 *)(qc)), 8, 1)
+#define get_mps_lv(qc)			LE_BITS_TO_2BYTE(((u8 *)(qc)), 9, 1)
+#define get_rspi(qc)			LE_BITS_TO_2BYTE(((u8 *)(qc)), 10, 1)
 
-#define SetAMsdu(pbuf, amsdu)	\
-	do	{	\
-		*(unsigned short *)(pbuf) |= cpu_to_le16((amsdu & 1) << 7); \
-	} while (0)
 
 #define GetAid(pbuf)	(cpu_to_le16(*(unsigned short *)((SIZE_PTR)(pbuf) + 2)) & 0x3fff)
 
@@ -759,9 +760,8 @@ typedef	enum _ELEMENT_ID {
 #define _WEP_WPA_MIXED_PRIVACY_ 6	/*  WEP + WPA */
 #endif
 
-#ifdef CONFIG_IEEE80211W
 #define _MME_IE_LENGTH_  18
-#endif /* CONFIG_IEEE80211W */
+
 /*-----------------------------------------------------------------------------
 				Below is the definition for WMM
 ------------------------------------------------------------------------------*/
@@ -1379,10 +1379,8 @@ enum P2P_PS_MODE {
 #define	WFD_DEVINFO_PC_TDLS					0x0080
 #define	WFD_DEVINFO_HDCP_SUPPORT			0x0100
 
-#ifdef CONFIG_TX_MCAST2UNI
 #define IP_MCAST_MAC(mac)		((mac[0] == 0x01) && (mac[1] == 0x00) && (mac[2] == 0x5e))
 #define ICMPV6_MCAST_MAC(mac)	((mac[0] == 0x33) && (mac[1] == 0x33) && (mac[2] != 0xff))
-#endif /* CONFIG_TX_MCAST2UNI */
 
 #ifdef CONFIG_IOCTL_CFG80211
 /* Regulatroy Domain */
diff --git a/rtl8723DS/include/wlan_bssdef.h b/rtl8723DS/include/wlan_bssdef.h
index 76408d1..b3296d5 100755..100644
--- a/rtl8723DS/include/wlan_bssdef.h
+++ b/rtl8723DS/include/wlan_bssdef.h
@@ -25,7 +25,7 @@
 #define NDIS_802_11_LENGTH_RATES        8
 #define NDIS_802_11_LENGTH_RATES_EX     16
 
-typedef unsigned char   NDIS_802_11_MAC_ADDRESS[6];
+typedef unsigned char   NDIS_802_11_MAC_ADDRESS[ETH_ALEN];
 typedef long    		NDIS_802_11_RSSI;           /* in dBm */
 typedef unsigned char   NDIS_802_11_RATES[NDIS_802_11_LENGTH_RATES];        /* Set of 8 data rates */
 typedef unsigned char   NDIS_802_11_RATES_EX[NDIS_802_11_LENGTH_RATES_EX];  /* Set of 16 data rates */
@@ -77,6 +77,7 @@ typedef enum _NDIS_802_11_NETWORK_INFRASTRUCTURE {
 	Ndis802_11InfrastructureMax,     /* Not a real value, defined as upper bound */
 	Ndis802_11APMode,
 	Ndis802_11Monitor,
+	Ndis802_11_mesh,
 } NDIS_802_11_NETWORK_INFRASTRUCTURE, *PNDIS_802_11_NETWORK_INFRASTRUCTURE;
 
 
@@ -274,7 +275,7 @@ typedef struct _NDIS_802_11_TEST {
 #define NDIS_802_11_LENGTH_RATES        8
 #define NDIS_802_11_LENGTH_RATES_EX     16
 
-typedef unsigned char   NDIS_802_11_MAC_ADDRESS[6];
+typedef unsigned char   NDIS_802_11_MAC_ADDRESS[ETH_ALEN];
 typedef long    		NDIS_802_11_RSSI;           /* in dBm */
 typedef unsigned char   NDIS_802_11_RATES[NDIS_802_11_LENGTH_RATES];        /* Set of 8 data rates */
 typedef unsigned char   NDIS_802_11_RATES_EX[NDIS_802_11_LENGTH_RATES_EX];  /* Set of 16 data rates */
@@ -561,6 +562,7 @@ typedef struct _WLAN_BSSID_EX {
 	NDIS_802_11_MAC_ADDRESS  MacAddress;
 	UCHAR  Reserved[2];/* [0]: IS beacon frame , bss_type*/
 	NDIS_802_11_SSID  Ssid;
+	NDIS_802_11_SSID  mesh_id;
 	ULONG  Privacy;
 	NDIS_802_11_RSSI  Rssi;/* (in dBM,raw data ,get from PHY) */
 	NDIS_802_11_NETWORK_TYPE  NetworkTypeInUse;
@@ -616,6 +618,12 @@ struct	wlan_network {
 	int	network_type;	/* refer to ieee80211.h for WIRELESS_11A/B/G */
 	int	fixed;			/* set to fixed when not to be removed as site-surveying */
 	systime last_scanned; /* timestamp for the network */
+#ifdef CONFIG_RTW_MESH
+#if CONFIG_RTW_MESH_ACNODE_PREVENT
+	systime acnode_stime;
+	systime acnode_notify_etime;
+#endif
+#endif
 	int	aid;			/* will only be valid when a BSS is joinned. */
 	int	join_res;
 	WLAN_BSSID_EX	network; /* must be the last item */
diff --git a/rtl8723DS/include/xmit_osdep.h b/rtl8723DS/include/xmit_osdep.h
index 70070a8..70070a8 100755..100644
--- a/rtl8723DS/include/xmit_osdep.h
+++ b/rtl8723DS/include/xmit_osdep.h
diff --git a/rtl8723DS/os_dep/linux/custom_gpio_linux.c b/rtl8723DS/os_dep/linux/custom_gpio_linux.c
index 23401b7..23401b7 100755..100644
--- a/rtl8723DS/os_dep/linux/custom_gpio_linux.c
+++ b/rtl8723DS/os_dep/linux/custom_gpio_linux.c
diff --git a/rtl8723DS/os_dep/linux/ioctl_cfg80211.c b/rtl8723DS/os_dep/linux/ioctl_cfg80211.c
index 1087891..da54dd0 100755
--- a/rtl8723DS/os_dep/linux/ioctl_cfg80211.c
+++ b/rtl8723DS/os_dep/linux/ioctl_cfg80211.c
@@ -19,12 +19,27 @@
 
 #ifdef CONFIG_IOCTL_CFG80211
 
+#ifndef DBG_RTW_CFG80211_STA_PARAM
+#define DBG_RTW_CFG80211_STA_PARAM 0
+#endif
+
+#ifndef DBG_RTW_CFG80211_MESH_CONF
+#define DBG_RTW_CFG80211_MESH_CONF 0
+#endif
+
 #if (LINUX_VERSION_CODE >= KERNEL_VERSION(4, 0, 0))
-#define STATION_INFO_SIGNAL		BIT(NL80211_STA_INFO_SIGNAL)
+#define STATION_INFO_INACTIVE_TIME	BIT(NL80211_STA_INFO_INACTIVE_TIME)
+#define STATION_INFO_LLID			BIT(NL80211_STA_INFO_LLID)
+#define STATION_INFO_PLID			BIT(NL80211_STA_INFO_PLID)
+#define STATION_INFO_PLINK_STATE	BIT(NL80211_STA_INFO_PLINK_STATE)
+#define STATION_INFO_SIGNAL			BIT(NL80211_STA_INFO_SIGNAL)
 #define STATION_INFO_TX_BITRATE		BIT(NL80211_STA_INFO_TX_BITRATE)
 #define STATION_INFO_RX_PACKETS		BIT(NL80211_STA_INFO_RX_PACKETS)
 #define STATION_INFO_TX_PACKETS		BIT(NL80211_STA_INFO_TX_PACKETS)
 #define STATION_INFO_TX_FAILED		BIT(NL80211_STA_INFO_TX_FAILED)
+#define STATION_INFO_LOCAL_PM		BIT(NL80211_STA_INFO_LOCAL_PM)
+#define STATION_INFO_PEER_PM		BIT(NL80211_STA_INFO_PEER_PM)
+#define STATION_INFO_NONPEER_PM		BIT(NL80211_STA_INFO_NONPEER_PM)
 #define STATION_INFO_ASSOC_REQ_IES	0
 #endif /* Linux kernel >= 4.0.0 */
 
@@ -59,10 +74,21 @@
 
 #endif /* CONFIG_WAPI_SUPPORT */
 
+#if (LINUX_VERSION_CODE <= KERNEL_VERSION(4, 11, 12))
 #ifdef CONFIG_RTW_80211R
 #define WLAN_AKM_SUITE_FT_8021X		0x000FAC03
 #define WLAN_AKM_SUITE_FT_PSK			0x000FAC04
 #endif
+#endif
+
+/*
+ * In the current design of Wi-Fi driver, it will return success to the system (e.g. supplicant) 
+ * when Wi-Fi driver decides to abort the scan request in the scan flow by default.
+ * Defining this flag makes Wi-Fi driver to return -EBUSY to the system if Wi-Fi driver is too busy to do the scan.
+ */
+#ifndef CONFIG_NOTIFY_SCAN_ABORT_WITH_BUSY
+	#define CONFIG_NOTIFY_SCAN_ABORT_WITH_BUSY 0
+#endif
 
 static const u32 rtw_cipher_suites[] = {
 	WLAN_CIPHER_SUITE_WEP40,
@@ -556,6 +582,14 @@ static const struct ieee80211_txrx_stypes
 			BIT(IEEE80211_STYPE_PROBE_REQ >> 4)
 	},
 #endif
+#if defined(CONFIG_RTW_MESH)
+	[NL80211_IFTYPE_MESH_POINT] = {
+		.tx = 0xffff,
+		.rx = BIT(IEEE80211_STYPE_ACTION >> 4)
+			| BIT(IEEE80211_STYPE_AUTH >> 4)
+	},
+#endif
+
 };
 #endif
 
@@ -579,6 +613,11 @@ NDIS_802_11_NETWORK_INFRASTRUCTURE nl80211_iftype_to_rtw_network_type(enum nl802
 		return Ndis802_11APMode;
 #endif
 
+#ifdef CONFIG_RTW_MESH
+	case NL80211_IFTYPE_MESH_POINT:
+		return Ndis802_11_mesh;
+#endif
+
 	case NL80211_IFTYPE_MONITOR:
 		return Ndis802_11Monitor;
 
@@ -607,6 +646,11 @@ u32 nl80211_iftype_to_rtw_mlme_state(enum nl80211_iftype type)
 		return WIFI_AP_STATE;
 #endif
 
+#ifdef CONFIG_RTW_MESH
+	case NL80211_IFTYPE_MESH_POINT:
+		return WIFI_MESH_STATE;
+#endif
+
 	case NL80211_IFTYPE_MONITOR:
 		return WIFI_MONITOR_STATE;
 
@@ -658,7 +702,6 @@ static u64 rtw_get_systime_us(void)
 /* Try to remove non target BSS's SR to reduce PBC overlap rate */
 static int rtw_cfg80211_clear_wps_sr_of_non_target_bss(_adapter *padapter, struct wlan_network *pnetwork, struct cfg80211_ssid *req_ssid)
 {
-	struct rtw_wdev_priv *wdev_data = adapter_wdev_data(padapter);
 	int ret = 0;
 	u8 *psr = NULL, sr = 0;
 	NDIS_802_11_SSID *pssid = &pnetwork->network.Ssid;
@@ -899,7 +942,6 @@ void rtw_cfg80211_ibss_indicate_connect(_adapter *padapter)
 	struct mlme_priv *pmlmepriv = &padapter->mlmepriv;
 	struct wlan_network  *cur_network = &(pmlmepriv->cur_network);
 	struct wireless_dev *pwdev = padapter->rtw_wdev;
-	struct cfg80211_bss *bss = NULL;
 #if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 15, 0))
 	struct wiphy *wiphy = pwdev->wiphy;
 	int freq = 2412;
@@ -908,13 +950,6 @@ void rtw_cfg80211_ibss_indicate_connect(_adapter *padapter)
 
 	RTW_INFO(FUNC_ADPT_FMT"\n", FUNC_ADPT_ARG(padapter));
 
-#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 15, 0))
-	freq = rtw_ch2freq(cur_network->network.Configuration.DSConfig);
-
-	if (0)
-		RTW_INFO("chan: %d, freq: %d\n", cur_network->network.Configuration.DSConfig, freq);
-#endif
-
 	if (pwdev->iftype != NL80211_IFTYPE_ADHOC)
 		return;
 
@@ -957,6 +992,9 @@ void rtw_cfg80211_ibss_indicate_connect(_adapter *padapter)
 	}
 	/* notify cfg80211 that device joined an IBSS */
 #if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 15, 0))
+	freq = rtw_ch2freq(cur_network->network.Configuration.DSConfig);
+	if (1)
+		RTW_INFO("chan: %d, freq: %d\n", cur_network->network.Configuration.DSConfig, freq);
 	notify_channel = ieee80211_get_channel(wiphy, freq);
 	cfg80211_ibss_joined(padapter->pnetdev, cur_network->network.MacAddress, notify_channel, GFP_ATOMIC);
 #else
@@ -974,8 +1012,6 @@ void rtw_cfg80211_indicate_connect(_adapter *padapter)
 #ifdef CONFIG_P2P
 	struct wifidirect_info *pwdinfo = &(padapter->wdinfo);
 #endif
-	struct cfg80211_bss *bss = NULL;
-
 #if LINUX_VERSION_CODE >= KERNEL_VERSION(4, 12, 0)
 	struct cfg80211_roam_info roam_info ={};
 #endif
@@ -1100,7 +1136,6 @@ check_bss:
 
 void rtw_cfg80211_indicate_disconnect(_adapter *padapter, u16 reason, u8 locally_generated)
 {
-	struct mlme_priv *pmlmepriv = &padapter->mlmepriv;
 	struct wireless_dev *pwdev = padapter->rtw_wdev;
 	struct rtw_wdev_priv *pwdev_priv = adapter_wdev_data(padapter);
 	_irqL irqL;
@@ -1150,7 +1185,7 @@ void rtw_cfg80211_indicate_disconnect(_adapter *padapter, u16 reason, u8 locally
 		if (pwdev->sme_state == CFG80211_SME_CONNECTING) {
 			RTW_INFO(FUNC_ADPT_FMT" call cfg80211_connect_result\n", FUNC_ADPT_ARG(padapter));
 			rtw_cfg80211_connect_result(pwdev, NULL, NULL, 0, NULL, 0,
-				WLAN_STATUS_UNSPECIFIED_FAILURE, GFP_ATOMIC);
+				reason, GFP_ATOMIC);
 		} else if (pwdev->sme_state == CFG80211_SME_CONNECTED) {
 			RTW_INFO(FUNC_ADPT_FMT" call cfg80211_disconnected\n", FUNC_ADPT_ARG(padapter));
 			rtw_cfg80211_disconnected(pwdev, reason, NULL, 0, locally_generated, GFP_ATOMIC);
@@ -1161,7 +1196,7 @@ void rtw_cfg80211_indicate_disconnect(_adapter *padapter, u16 reason, u8 locally
 		if (pwdev_priv->connect_req) {
 			RTW_INFO(FUNC_ADPT_FMT" call cfg80211_connect_result\n", FUNC_ADPT_ARG(padapter));
 			rtw_cfg80211_connect_result(pwdev, NULL, NULL, 0, NULL, 0,
-				WLAN_STATUS_UNSPECIFIED_FAILURE, GFP_ATOMIC);
+				reason, GFP_ATOMIC);
 		} else {
 			RTW_INFO(FUNC_ADPT_FMT" call cfg80211_disconnected\n", FUNC_ADPT_ARG(padapter));
 			rtw_cfg80211_disconnected(pwdev, reason, NULL, 0, locally_generated, GFP_ATOMIC);
@@ -1179,10 +1214,10 @@ void rtw_cfg80211_indicate_disconnect(_adapter *padapter, u16 reason, u8 locally
 static int rtw_cfg80211_ap_set_encryption(struct net_device *dev, struct ieee_param *param)
 {
 	int ret = 0;
-	u32 wep_key_idx, wep_key_len, wep_total_len;
+	u32 wep_key_idx, wep_key_len;
 	struct sta_info *psta = NULL, *pbcmc_sta = NULL;
 	_adapter *padapter = (_adapter *)rtw_netdev_priv(dev);
-	struct mlme_priv	*pmlmepriv = &padapter->mlmepriv;
+	struct mlme_priv *pmlmepriv = &padapter->mlmepriv;
 	struct security_priv *psecuritypriv = &(padapter->securitypriv);
 	struct sta_priv *pstapriv = &padapter->stapriv;
 
@@ -1368,14 +1403,58 @@ static int rtw_cfg80211_ap_set_encryption(struct net_device *dev, struct ieee_pa
 			psta->dot11txpn.val = RTW_GET_LE64(param->u.crypt.seq);
 			psta->dot11rxpn.val = RTW_GET_LE64(param->u.crypt.seq);
 			psta->ieee8021x_blocked = _FALSE;
-			psta->bpairwise_key_installed = _TRUE;
-			rtw_ap_set_pairwise_key(padapter, psta);
 
+			if (psta->dot118021XPrivacy != _NO_PRIVACY_) {
+				psta->bpairwise_key_installed = _TRUE;
+
+				/* WPA2 key-handshake has completed */
+				if (psecuritypriv->ndisauthtype == Ndis802_11AuthModeWPA2PSK)
+					psta->state &= (~WIFI_UNDER_KEY_HANDSHAKE);
+			}
+
+			rtw_ap_set_pairwise_key(padapter, psta);
 		} else {
 			/* peer's group key, RX only */
-			RTW_WARN(FUNC_ADPT_FMT" set group key of "MAC_FMT", not support\n"
-				, FUNC_ADPT_ARG(padapter), MAC_ARG(psta->cmn.mac_addr));
-			goto exit;
+			#ifdef CONFIG_RTW_MESH
+			if (strcmp(param->u.crypt.alg, "CCMP") == 0) {
+				RTW_INFO(FUNC_ADPT_FMT" set CCMP GTK of "MAC_FMT", idx:%u, len:%u\n"
+					, FUNC_ADPT_ARG(padapter), MAC_ARG(psta->cmn.mac_addr)
+					, param->u.crypt.idx, param->u.crypt.key_len);
+				psta->group_privacy = _AES_;
+				_rtw_memcpy(psta->gtk.skey, param->u.crypt.key, (param->u.crypt.key_len > 16 ? 16 : param->u.crypt.key_len));
+				psta->gtk_bmp |= BIT(param->u.crypt.idx);
+				psta->gtk_pn.val = RTW_GET_LE64(param->u.crypt.seq);
+
+			#ifdef CONFIG_IEEE80211W
+			} else if (strcmp(param->u.crypt.alg, "BIP") == 0) {
+				RTW_INFO(FUNC_ADPT_FMT" set IGTK of "MAC_FMT", idx:%u, len:%u\n"
+					, FUNC_ADPT_ARG(padapter), MAC_ARG(psta->cmn.mac_addr)
+					, param->u.crypt.idx, param->u.crypt.key_len);
+				_rtw_memcpy(psta->igtk.skey, param->u.crypt.key, (param->u.crypt.key_len > 16 ? 16 : param->u.crypt.key_len));
+				psta->igtk_bmp |= BIT(param->u.crypt.idx);
+				psta->igtk_id = param->u.crypt.idx;
+				psta->igtk_pn.val = RTW_GET_LE64(param->u.crypt.seq);
+				goto exit;
+			#endif /* CONFIG_IEEE80211W */
+
+			} else if (strcmp(param->u.crypt.alg, "none") == 0) {
+				RTW_INFO(FUNC_ADPT_FMT" clear group key of "MAC_FMT", idx:%u\n"
+					, FUNC_ADPT_ARG(padapter), MAC_ARG(psta->cmn.mac_addr)
+					, param->u.crypt.idx);
+				psta->group_privacy = _NO_PRIVACY_;
+				psta->gtk_bmp &= ~BIT(param->u.crypt.idx);
+			} else
+			#endif /* CONFIG_RTW_MESH */
+			{
+				RTW_WARN(FUNC_ADPT_FMT" set group key of "MAC_FMT", not support\n"
+					, FUNC_ADPT_ARG(padapter), MAC_ARG(psta->cmn.mac_addr));
+				goto exit;
+			}
+
+			#ifdef CONFIG_RTW_MESH
+			rtw_ap_set_sta_key(padapter, psta->cmn.mac_addr, psta->group_privacy
+				, param->u.crypt.key, param->u.crypt.idx, 1);
+			#endif
 		}
 
 	}
@@ -1388,7 +1467,7 @@ exit:
 static int rtw_cfg80211_set_encryption(struct net_device *dev, struct ieee_param *param)
 {
 	int ret = 0;
-	u32 wep_key_idx, wep_key_len, wep_total_len;
+	u32 wep_key_idx, wep_key_len;
 	_adapter *padapter = (_adapter *)rtw_netdev_priv(dev);
 	struct mlme_priv	*pmlmepriv = &padapter->mlmepriv;
 	struct security_priv *psecuritypriv = &padapter->securitypriv;
@@ -1533,6 +1612,9 @@ static int rtw_cfg80211_set_encryption(struct net_device *dev, struct ieee_param
 					}
 #endif /* CONFIG_P2P */
 
+					/* WPA/WPA2 key-handshake has completed */
+					clr_fwstate(pmlmepriv, WIFI_UNDER_KEY_HANDSHAKE);
+
 				}
 			}
 
@@ -1685,7 +1767,7 @@ static int cfg80211_rtw_add_key(struct wiphy *wiphy, struct net_device *ndev
 		}
 #endif /* CONFIG_TDLS */
 		ret = rtw_cfg80211_set_encryption(ndev, param);
-	} else if (check_fwstate(pmlmepriv, WIFI_AP_STATE) == _TRUE) {
+	} else if (MLME_IS_AP(padapter) || MLME_IS_MESH(padapter)) {
 #ifdef CONFIG_AP_MODE
 		if (mac_addr)
 			_rtw_memcpy(param->sta_addr, (void *)mac_addr, ETH_ALEN);
@@ -1793,6 +1875,21 @@ static int cfg80211_rtw_get_key(struct wiphy *wiphy, struct net_device *ndev
 				goto exit;
 			cipher = sta->dot118021XPrivacy;
 			key = &sta->dot118021x_UncstKey;
+		#ifdef CONFIG_RTW_MESH
+		} else if (keyid < WEP_KEYS && !pairwise) {
+			if (!(sta->gtk_bmp & BIT(keyid)))
+				goto exit;
+			cipher = sta->group_privacy;
+			key = &sta->gtk;
+		#ifdef CONFIG_IEEE80211W
+		} else if (keyid < BIP_MAX_KEYID && !pairwise) {
+			if (!(sta->igtk_bmp & BIT(keyid)))
+				goto exit;
+			cipher = _BIP_;
+			key = &sta->igtk;
+			pn = &sta->igtk_pn.val;
+		#endif
+		#endif /* CONFIG_RTW_MESH */
 		}
 	}
 
@@ -1978,6 +2075,101 @@ static int cfg80211_rtw_set_rekey_data(struct wiphy *wiphy,
 	return 0;
 }
 #endif /*CONFIG_GTK_OL*/
+
+#ifdef CONFIG_RTW_MESH
+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 9, 0))
+static enum nl80211_mesh_power_mode rtw_mesh_ps_to_nl80211_mesh_power_mode(u8 ps)
+{
+	if (ps == RTW_MESH_PS_UNKNOWN)
+		return NL80211_MESH_POWER_UNKNOWN;
+	if (ps == RTW_MESH_PS_ACTIVE)
+		return NL80211_MESH_POWER_ACTIVE;
+	if (ps == RTW_MESH_PS_LSLEEP)
+		return NL80211_MESH_POWER_LIGHT_SLEEP;
+	if (ps == RTW_MESH_PS_DSLEEP)
+		return NL80211_MESH_POWER_DEEP_SLEEP;
+
+	rtw_warn_on(1);
+	return NL80211_MESH_POWER_UNKNOWN;
+}
+#endif
+
+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 0, 0))
+enum nl80211_plink_state rtw_plink_state_to_nl80211_plink_state(u8 plink_state)
+{
+	if (plink_state == RTW_MESH_PLINK_UNKNOWN)
+		return NUM_NL80211_PLINK_STATES;
+	if (plink_state == RTW_MESH_PLINK_LISTEN)
+		return NL80211_PLINK_LISTEN;
+	if (plink_state == RTW_MESH_PLINK_OPN_SNT)
+		return NL80211_PLINK_OPN_SNT;
+	if (plink_state == RTW_MESH_PLINK_OPN_RCVD)
+		return NL80211_PLINK_OPN_RCVD;
+	if (plink_state == RTW_MESH_PLINK_CNF_RCVD)
+		return NL80211_PLINK_CNF_RCVD;
+	if (plink_state == RTW_MESH_PLINK_ESTAB)
+		return NL80211_PLINK_ESTAB;
+	if (plink_state == RTW_MESH_PLINK_HOLDING)
+		return NL80211_PLINK_HOLDING;
+	if (plink_state == RTW_MESH_PLINK_BLOCKED)
+		return NL80211_PLINK_BLOCKED;
+
+	rtw_warn_on(1);
+	return NUM_NL80211_PLINK_STATES;
+}
+
+u8 nl80211_plink_state_to_rtw_plink_state(enum nl80211_plink_state plink_state)
+{
+	if (plink_state == NL80211_PLINK_LISTEN)
+		return RTW_MESH_PLINK_LISTEN;
+	if (plink_state == NL80211_PLINK_OPN_SNT)
+		return RTW_MESH_PLINK_OPN_SNT;
+	if (plink_state == NL80211_PLINK_OPN_RCVD)
+		return RTW_MESH_PLINK_OPN_RCVD;
+	if (plink_state == NL80211_PLINK_CNF_RCVD)
+		return RTW_MESH_PLINK_CNF_RCVD;
+	if (plink_state == NL80211_PLINK_ESTAB)
+		return RTW_MESH_PLINK_ESTAB;
+	if (plink_state == NL80211_PLINK_HOLDING)
+		return RTW_MESH_PLINK_HOLDING;
+	if (plink_state == NL80211_PLINK_BLOCKED)
+		return RTW_MESH_PLINK_BLOCKED;
+
+	rtw_warn_on(1);
+	return RTW_MESH_PLINK_UNKNOWN;
+}
+#endif
+
+static void rtw_cfg80211_fill_mesh_only_sta_info(struct mesh_plink_ent *plink, struct sta_info *sta, struct station_info *sinfo)
+{
+	sinfo->filled |= STATION_INFO_LLID;
+	sinfo->llid = plink->llid;
+	sinfo->filled |= STATION_INFO_PLID;
+	sinfo->plid = plink->plid;
+	sinfo->filled |= STATION_INFO_PLINK_STATE;
+	sinfo->plink_state = rtw_plink_state_to_nl80211_plink_state(plink->plink_state);
+	if (!sta && plink->scanned) {
+		sinfo->filled |= STATION_INFO_SIGNAL;
+		sinfo->signal = translate_percentage_to_dbm(plink->scanned->network.PhyInfo.SignalStrength);
+		sinfo->filled |= STATION_INFO_INACTIVE_TIME;
+		if (plink->plink_state == RTW_MESH_PLINK_UNKNOWN)
+			sinfo->inactive_time = 0 - 1;
+		else
+			sinfo->inactive_time = rtw_get_passing_time_ms(plink->scanned->last_scanned);
+	}
+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 9, 0))
+	if (sta) {
+		sinfo->filled |= STATION_INFO_LOCAL_PM;
+		sinfo->local_pm = rtw_mesh_ps_to_nl80211_mesh_power_mode(sta->local_mps);
+		sinfo->filled |= STATION_INFO_PEER_PM;
+		sinfo->peer_pm = rtw_mesh_ps_to_nl80211_mesh_power_mode(sta->peer_mps);
+		sinfo->filled |= STATION_INFO_NONPEER_PM;
+		sinfo->nonpeer_pm = rtw_mesh_ps_to_nl80211_mesh_power_mode(sta->nonpeer_mps);
+	}
+#endif
+}
+#endif /* CONFIG_RTW_MESH */
+
 static int cfg80211_rtw_get_station(struct wiphy *wiphy,
 	struct net_device *ndev,
 #if (LINUX_VERSION_CODE < KERNEL_VERSION(3, 16, 0))
@@ -1992,6 +2184,9 @@ static int cfg80211_rtw_get_station(struct wiphy *wiphy,
 	struct mlme_priv *pmlmepriv = &padapter->mlmepriv;
 	struct sta_info *psta = NULL;
 	struct sta_priv *pstapriv = &padapter->stapriv;
+#ifdef CONFIG_RTW_MESH
+	struct mesh_plink_ent *plink = NULL;
+#endif
 
 	sinfo->filled = 0;
 
@@ -2001,9 +2196,23 @@ static int cfg80211_rtw_get_station(struct wiphy *wiphy,
 		goto exit;
 	}
 
-	psta = rtw_get_stainfo(pstapriv, (u8 *)mac);
-	if (psta == NULL) {
-		RTW_INFO("%s, sta_info is null\n", __func__);
+	psta = rtw_get_stainfo(pstapriv, mac);
+#ifdef CONFIG_RTW_MESH
+	if (MLME_IS_MESH(padapter)) {
+		if (psta)
+			plink = psta->plink;
+		if (!plink)
+			plink = rtw_mesh_plink_get(padapter, mac);
+	}
+#endif /* CONFIG_RTW_MESH */
+
+	if ((!MLME_IS_MESH(padapter) && !psta)
+		#ifdef CONFIG_RTW_MESH
+		|| (MLME_IS_MESH(padapter) && !plink)
+		#endif
+	) {
+		RTW_INFO(FUNC_NDEV_FMT" no sta info for mac="MAC_FMT"\n"
+			, FUNC_NDEV_ARG(ndev), MAC_ARG(mac));
 		ret = -ENOENT;
 		goto exit;
 	}
@@ -2029,26 +2238,29 @@ static int cfg80211_rtw_get_station(struct wiphy *wiphy,
 
 		sinfo->filled |= STATION_INFO_TX_BITRATE;
 		sinfo->txrate.legacy = rtw_get_cur_max_rate(padapter);
+	}
 
+	if (psta) {
+		if (check_fwstate(pmlmepriv, WIFI_STATION_STATE) == _FALSE
+			|| check_fwstate(pmlmepriv, _FW_LINKED) == _FALSE
+		) {
+			sinfo->filled |= STATION_INFO_SIGNAL;
+			sinfo->signal = translate_percentage_to_dbm(psta->cmn.rssi_stat.rssi);
+		}
+		sinfo->filled |= STATION_INFO_INACTIVE_TIME;
+		sinfo->inactive_time = rtw_get_passing_time_ms(psta->sta_stats.last_rx_time);
 		sinfo->filled |= STATION_INFO_RX_PACKETS;
 		sinfo->rx_packets = sta_rx_data_pkts(psta);
-
 		sinfo->filled |= STATION_INFO_TX_PACKETS;
 		sinfo->tx_packets = psta->sta_stats.tx_pkts;
-
-        sinfo->filled |= STATION_INFO_TX_FAILED;
-        sinfo->tx_failed = psta->sta_stats.tx_fail_cnt;
-
+		sinfo->filled |= STATION_INFO_TX_FAILED;
+		sinfo->tx_failed = psta->sta_stats.tx_fail_cnt;
 	}
 
-	/* for Ad-Hoc/AP mode */
-	if ((check_fwstate(pmlmepriv, WIFI_ADHOC_STATE)
-		|| check_fwstate(pmlmepriv, WIFI_ADHOC_MASTER_STATE)
-		|| check_fwstate(pmlmepriv, WIFI_AP_STATE))
-		&& check_fwstate(pmlmepriv, _FW_LINKED)
-	) {
-		/* TODO: should acquire station info... */
-	}
+#ifdef CONFIG_RTW_MESH
+	if (MLME_IS_MESH(padapter))
+		rtw_cfg80211_fill_mesh_only_sta_info(plink, psta, sinfo);
+#endif
 
 exit:
 	return ret;
@@ -2090,6 +2302,9 @@ static int cfg80211_rtw_change_iface(struct wiphy *wiphy,
 	struct wifidirect_info *pwdinfo = &(padapter->wdinfo);
 	u8 is_p2p = _FALSE;
 #endif
+#ifdef CONFIG_MONITOR_MODE_XMIT
+	struct mlme_priv	*pmlmepriv = &(padapter->mlmepriv);
+#endif
 	int ret = 0;
 	u8 change = _FALSE;
 
@@ -2191,6 +2406,12 @@ static int cfg80211_rtw_change_iface(struct wiphy *wiphy,
 
 		break;
 
+#ifdef CONFIG_RTW_MESH
+	case NL80211_IFTYPE_MESH_POINT:
+		networkType = Ndis802_11_mesh;
+		break;
+#endif
+
 	case NL80211_IFTYPE_MONITOR:
 		networkType = Ndis802_11Monitor;
 #if 0
@@ -2212,7 +2433,10 @@ static int cfg80211_rtw_change_iface(struct wiphy *wiphy,
 	}
 
 	rtw_setopmode_cmd(padapter, networkType, RTW_CMDF_WAIT_ACK);
-
+#ifdef CONFIG_MONITOR_MODE_XMIT
+	if (check_fwstate(pmlmepriv, WIFI_MONITOR_STATE) == _TRUE)
+		rtw_indicate_connect(padapter);
+#endif
 exit:
 
 	RTW_INFO(FUNC_NDEV_FMT" ret:%d\n", FUNC_NDEV_ARG(ndev), ret);
@@ -2338,17 +2562,17 @@ exit:
 
 static void _rtw_cfg80211_surveydone_event_callback(_adapter *padapter, struct cfg80211_scan_request *scan_req)
 {
+	struct rf_ctl_t *rfctl = adapter_to_rfctl(padapter);
+	RT_CHANNEL_INFO *chset = rfctl->channel_set;
 	_irqL	irqL;
 	_list					*plist, *phead;
 	struct	mlme_priv	*pmlmepriv = &(padapter->mlmepriv);
 	_queue				*queue	= &(pmlmepriv->scanned_queue);
 	struct	wlan_network	*pnetwork = NULL;
-	u32 cnt = 0;
-	u32 wait_for_surveydone;
-	sint wait_status;
 	struct rtw_wdev_priv *pwdev_priv = adapter_wdev_data(padapter);
 	struct cfg80211_ssid target_ssid;
 	u8 target_wps_scan = 0;
+	u8 ch;
 
 #ifdef CONFIG_DEBUG_CFG80211
 	RTW_INFO("%s\n", __func__);
@@ -2373,11 +2597,15 @@ static void _rtw_cfg80211_surveydone_event_callback(_adapter *padapter, struct c
 			break;
 
 		pnetwork = LIST_CONTAINOR(plist, struct wlan_network, list);
+		ch = pnetwork->network.Configuration.DSConfig;
 
 		/* report network only if the current channel set contains the channel to which this network belongs */
-		if (rtw_chset_search_ch(adapter_to_chset(padapter), pnetwork->network.Configuration.DSConfig) >= 0
-			&& rtw_mlme_band_check(padapter, pnetwork->network.Configuration.DSConfig) == _TRUE
+		if (rtw_chset_search_ch(chset, ch) >= 0
+			&& rtw_mlme_band_check(padapter, ch) == _TRUE
 			&& _TRUE == rtw_validate_ssid(&(pnetwork->network.Ssid))
+			&& (!IS_DFS_SLAVE_WITH_RD(rfctl)
+				|| rtw_odm_dfs_domain_unknown(rfctl_to_dvobj(rfctl))
+				|| !rtw_chset_is_ch_non_ocp(chset, ch))
 		) {
 			if (target_wps_scan)
 				rtw_cfg80211_clear_wps_sr_of_non_target_bss(padapter, pnetwork, &target_ssid);
@@ -2578,10 +2806,11 @@ void rtw_cfg80211_indicate_scan_done_for_buddy(_adapter *padapter, bool bscan_ab
 
 			indicate_buddy_scan = _FALSE;
 			_enter_critical_bh(&wdev_priv->scan_req_lock, &irqL);
-			if (wdev_priv->scan_request && mlmepriv->scanning_via_buddy_intf == _TRUE) {
+			if (mlmepriv->scanning_via_buddy_intf == _TRUE) {
 				mlmepriv->scanning_via_buddy_intf = _FALSE;
 				clr_fwstate(mlmepriv, _FW_UNDER_SURVEY);
-				indicate_buddy_scan = _TRUE;
+				if (wdev_priv->scan_request)
+					indicate_buddy_scan = _TRUE;
 			}
 			_exit_critical_bh(&wdev_priv->scan_req_lock, &irqL);
 
@@ -2601,26 +2830,22 @@ static int cfg80211_rtw_scan(struct wiphy *wiphy
 	#endif
 	, struct cfg80211_scan_request *request)
 {
-	int i, chan_num = 0;
+	int i;
 	u8 _status = _FALSE;
 	int ret = 0;
 	struct sitesurvey_parm parm;
 	_irqL	irqL;
-	u8 *wps_ie = NULL;
-	uint wps_ielen = 0;
-	u8 *p2p_ie = NULL;
-	uint p2p_ielen = 0;
 	u8 survey_times = 3;
 	u8 survey_times_for_one_ch = 6;
 	struct cfg80211_ssid *ssids = request->ssids;
 	int social_channel = 0, j = 0;
 	bool need_indicate_scan_done = _FALSE;
 	bool ps_denied = _FALSE;
-
+	u8 ssc_chk;
 	_adapter *padapter;
 	struct wireless_dev *wdev;
 	struct rtw_wdev_priv *pwdev_priv;
-	struct mlme_priv *pmlmepriv;
+	struct mlme_priv *pmlmepriv = NULL;
 #ifdef CONFIG_P2P
 	struct wifidirect_info *pwdinfo;
 #endif /* CONFIG_P2P */
@@ -2656,26 +2881,103 @@ static int cfg80211_rtw_scan(struct wiphy *wiphy
 	RTW_INFO(FUNC_ADPT_FMT"%s\n", FUNC_ADPT_ARG(padapter)
 		, wdev == wiphy_to_pd_wdev(wiphy) ? " PD" : "");
 
-#ifdef CONFIG_MP_INCLUDED
-	if (rtw_mp_mode_check(padapter)) {
-		RTW_INFO("MP mode block Scan request\n");
-		ret = -EPERM;
-		goto exit;
-	}
+#if 1
+	ssc_chk = rtw_sitesurvey_condition_check(padapter, _TRUE);
+
+	if (ssc_chk == SS_DENY_MP_MODE)
+		goto bypass_p2p_chk;
+#ifdef DBG_LA_MODE
+	if (ssc_chk == SS_DENY_LA_MODE)
+		goto bypass_p2p_chk;
 #endif
+#ifdef CONFIG_P2P
+	if (pwdinfo->driver_interface == DRIVER_CFG80211) {
+		if (ssids->ssid != NULL
+			&& _rtw_memcmp(ssids->ssid, "DIRECT-", 7)
+			&& rtw_get_p2p_ie((u8 *)request->ie, request->ie_len, NULL, NULL)
+		) {
+			if (rtw_p2p_chk_state(pwdinfo, P2P_STATE_NONE))
+				rtw_p2p_enable(padapter, P2P_ROLE_DEVICE);
+			else {
+				rtw_p2p_set_pre_state(pwdinfo, rtw_p2p_state(pwdinfo));
+				#ifdef CONFIG_DEBUG_CFG80211
+				RTW_INFO("%s, role=%d, p2p_state=%d\n", __func__, rtw_p2p_role(pwdinfo), rtw_p2p_state(pwdinfo));
+				#endif
+			}
+			rtw_p2p_set_state(pwdinfo, P2P_STATE_LISTEN);
 
-#ifdef CONFIG_RTW_REPEATER_SON
-	if (padapter->rtw_rson_scanstage == RSON_SCAN_PROCESS) {
-		RTW_INFO(FUNC_ADPT_FMT" blocking scan for under rson scanning process\n", FUNC_ADPT_ARG(padapter));
-		need_indicate_scan_done = _TRUE;
-		goto check_need_indicate_scan_done;
+			if (request->n_channels == 3 &&
+				request->channels[0]->hw_value == 1 &&
+				request->channels[1]->hw_value == 6 &&
+				request->channels[2]->hw_value == 11
+			)
+				social_channel = 1;
+		}
 	}
-#endif
+#endif /*CONFIG_P2P*/
 
-	if (adapter_wdev_data(padapter)->block_scan == _TRUE) {
-		RTW_INFO(FUNC_ADPT_FMT" wdev_priv.block_scan is set\n", FUNC_ADPT_ARG(padapter));
-		need_indicate_scan_done = _TRUE;
-		goto check_need_indicate_scan_done;
+	if (request->ie && request->ie_len > 0)
+		rtw_cfg80211_set_probe_req_wpsp2pie(padapter, (u8 *)request->ie, request->ie_len);
+
+bypass_p2p_chk:
+
+	switch (ssc_chk) {
+		case SS_ALLOW :
+			break;
+
+		case SS_DENY_MP_MODE:
+			ret = -EPERM;
+			goto exit;
+		#ifdef DBG_LA_MODE
+		case SS_DENY_LA_MODE:
+			ret = -EPERM;
+			goto exit;
+		#endif
+		#ifdef CONFIG_RTW_REPEATER_SON
+		case SS_DENY_RSON_SCANING :
+		#endif
+		case SS_DENY_BLOCK_SCAN :
+		case SS_DENY_SELF_AP_UNDER_WPS :
+		case SS_DENY_SELF_AP_UNDER_LINKING :
+		case SS_DENY_SELF_AP_UNDER_SURVEY :
+		case SS_DENY_SELF_STA_UNDER_SURVEY :
+		#ifdef CONFIG_CONCURRENT_MODE
+		case SS_DENY_BUDDY_UNDER_LINK_WPS :
+		#endif
+		case SS_DENY_BUSY_TRAFFIC :
+			need_indicate_scan_done = _TRUE;
+			goto check_need_indicate_scan_done;
+
+		case SS_DENY_BY_DRV :
+			#if CONFIG_NOTIFY_SCAN_ABORT_WITH_BUSY
+			ret = -EBUSY;
+			goto exit;
+			#else
+			need_indicate_scan_done = _TRUE;
+			goto check_need_indicate_scan_done;
+			#endif
+			break;
+
+		case SS_DENY_SELF_STA_UNDER_LINKING :
+			ret = -EBUSY;
+			goto check_need_indicate_scan_done;
+
+		#ifdef CONFIG_CONCURRENT_MODE
+		case SS_DENY_BUDDY_UNDER_SURVEY :
+			{
+				bool scan_via_buddy = rtw_cfg80211_scan_via_buddy(padapter, request);
+
+				if (scan_via_buddy == _FALSE)
+					need_indicate_scan_done = _TRUE;
+
+				goto check_need_indicate_scan_done;
+			}
+		#endif
+
+		default :
+			RTW_ERR("site survey check code (%d) unknown\n", ssc_chk);
+			need_indicate_scan_done = _TRUE;
+			goto check_need_indicate_scan_done;
 	}
 
 	rtw_ps_deny(padapter, PS_DENY_SCAN);
@@ -2685,6 +2987,17 @@ static int cfg80211_rtw_scan(struct wiphy *wiphy
 		goto check_need_indicate_scan_done;
 	}
 
+#else
+
+
+#ifdef CONFIG_MP_INCLUDED
+	if (rtw_mp_mode_check(padapter)) {
+		RTW_INFO("MP mode block Scan request\n");
+		ret = -EPERM;
+		goto exit;
+	}
+#endif
+
 #ifdef CONFIG_P2P
 	if (pwdinfo->driver_interface == DRIVER_CFG80211) {
 		if (ssids->ssid != NULL
@@ -2714,10 +3027,36 @@ static int cfg80211_rtw_scan(struct wiphy *wiphy
 	if (request->ie && request->ie_len > 0)
 		rtw_cfg80211_set_probe_req_wpsp2pie(padapter, (u8 *)request->ie, request->ie_len);
 
+#ifdef CONFIG_RTW_REPEATER_SON
+	if (padapter->rtw_rson_scanstage == RSON_SCAN_PROCESS) {
+		RTW_INFO(FUNC_ADPT_FMT" blocking scan for under rson scanning process\n", FUNC_ADPT_ARG(padapter));
+		need_indicate_scan_done = _TRUE;
+		goto check_need_indicate_scan_done;
+	}
+#endif
+
+	if (adapter_wdev_data(padapter)->block_scan == _TRUE) {
+		RTW_INFO(FUNC_ADPT_FMT" wdev_priv.block_scan is set\n", FUNC_ADPT_ARG(padapter));
+		need_indicate_scan_done = _TRUE;
+		goto check_need_indicate_scan_done;
+	}
+
+	rtw_ps_deny(padapter, PS_DENY_SCAN);
+	ps_denied = _TRUE;
+	if (_FAIL == rtw_pwr_wakeup(padapter)) {
+		need_indicate_scan_done = _TRUE;
+		goto check_need_indicate_scan_done;
+	}
+
 	if (rtw_is_scan_deny(padapter)) {
 		RTW_INFO(FUNC_ADPT_FMT	": scan deny\n", FUNC_ADPT_ARG(padapter));
+#if CONFIG_NOTIFY_SCAN_ABORT_WITH_BUSY
+		ret = -EBUSY;
+		goto exit;
+#else
 		need_indicate_scan_done = _TRUE;
 		goto check_need_indicate_scan_done;
+#endif
 	}
 
 	/* check fw state*/
@@ -2769,11 +3108,11 @@ static int cfg80211_rtw_scan(struct wiphy *wiphy
 		need_indicate_scan_done = _TRUE;
 		goto check_need_indicate_scan_done;
 	}
+#endif
 
 #ifdef CONFIG_P2P
 	if (!rtw_p2p_chk_state(pwdinfo, P2P_STATE_NONE) && !rtw_p2p_chk_state(pwdinfo, P2P_STATE_IDLE)) {
 		rtw_p2p_set_state(pwdinfo, P2P_STATE_FIND_PHASE_SEARCH);
-		rtw_free_network_queue(padapter, _TRUE);
 
 		if (social_channel == 0)
 			rtw_p2p_findphase_ex_set(pwdinfo, P2P_FINDPHASE_EX_NONE);
@@ -2847,8 +3186,10 @@ cancel_ps_deny:
 		rtw_ps_deny_cancel(padapter, PS_DENY_SCAN);
 
 exit:
-	return ret;
+	if (pmlmepriv)
+		pmlmepriv->lastscantime = rtw_get_current_time();
 
+	return ret;
 }
 
 static int cfg80211_rtw_set_wiphy_params(struct wiphy *wiphy, u32 changed)
@@ -3057,7 +3398,6 @@ static int rtw_cfg80211_set_key_mgt(struct security_priv *psecuritypriv, u32 key
 static int rtw_cfg80211_set_wpa_ie(_adapter *padapter, u8 *pie, size_t ielen)
 {
 	u8 *buf = NULL, *pos = NULL;
-	u32 left;
 	int group_cipher = 0, pairwise_cipher = 0;
 	u8 mfp_opt = MFP_NO;
 	int ret = 0;
@@ -3260,10 +3600,7 @@ static int cfg80211_rtw_join_ibss(struct wiphy *wiphy, struct net_device *ndev,
 	_adapter *padapter = (_adapter *)rtw_netdev_priv(ndev);
 	NDIS_802_11_SSID ndis_ssid;
 	struct security_priv *psecuritypriv = &padapter->securitypriv;
-	struct mlme_priv *pmlmepriv = &padapter->mlmepriv;
 	struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv;
-	struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info);
-	WLAN_BSSID_EX *pnetwork = (WLAN_BSSID_EX *)(&(pmlmeinfo->network));
 #if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 8, 0))
 	struct cfg80211_chan_def *pch_def;
 #endif
@@ -3336,13 +3673,14 @@ static int cfg80211_rtw_leave_ibss(struct wiphy *wiphy, struct net_device *ndev)
 {
 	_adapter *padapter = (_adapter *)rtw_netdev_priv(ndev);
 	struct wireless_dev *rtw_wdev = padapter->rtw_wdev;
-	struct rtw_wdev_priv *pwdev_priv = adapter_wdev_data(padapter);
 	enum nl80211_iftype old_type;
 	int ret = 0;
 
 	RTW_INFO(FUNC_NDEV_FMT"\n", FUNC_NDEV_ARG(ndev));
 
-	rtw_wdev_set_not_indic_disco(pwdev_priv, 1);
+#if (RTW_CFG80211_BLOCK_STA_DISCON_EVENT & RTW_CFG80211_BLOCK_DISCON_WHEN_DISCONNECT)
+	rtw_wdev_set_not_indic_disco(adapter_wdev_data(padapter), 1);
+#endif
 
 	old_type = rtw_wdev->iftype;
 
@@ -3363,7 +3701,9 @@ static int cfg80211_rtw_leave_ibss(struct wiphy *wiphy, struct net_device *ndev)
 	}
 
 leave_ibss:
-	rtw_wdev_set_not_indic_disco(pwdev_priv, 0);
+#if (RTW_CFG80211_BLOCK_STA_DISCON_EVENT & RTW_CFG80211_BLOCK_DISCON_WHEN_DISCONNECT)
+	rtw_wdev_set_not_indic_disco(adapter_wdev_data(padapter), 0);
+#endif
 
 	return 0;
 }
@@ -3381,39 +3721,76 @@ bool rtw_cfg80211_is_connect_requested(_adapter *adapter)
 	return requested;
 }
 
+static int _rtw_disconnect(struct wiphy *wiphy, struct net_device *ndev)
+{
+	_adapter *padapter = (_adapter *)rtw_netdev_priv(ndev);
+
+
+	/* if(check_fwstate(&padapter->mlmepriv, _FW_LINKED)) */
+	{
+		rtw_scan_abort(padapter);
+		rtw_join_abort_timeout(padapter, 300);
+		LeaveAllPowerSaveMode(padapter);
+		rtw_disassoc_cmd(padapter, 500, RTW_CMDF_WAIT_ACK);
+#ifdef CONFIG_RTW_REPEATER_SON
+		rtw_rson_do_disconnect(padapter);
+#endif
+		RTW_INFO("%s...call rtw_indicate_disconnect\n", __func__);
+
+		rtw_free_assoc_resources_cmd(padapter, _TRUE, RTW_CMDF_WAIT_ACK);
+
+		/* indicate locally_generated = 0 when suspend */
+		#if (LINUX_VERSION_CODE >= KERNEL_VERSION(4, 2, 0))
+		rtw_indicate_disconnect(padapter, 0, wiphy->dev.power.is_prepared ? _FALSE : _TRUE);
+		#else
+		/*
+		* for kernel < 4.2, DISCONNECT event is hardcoded with
+		* NL80211_ATTR_DISCONNECTED_BY_AP=1 in NL80211 layer
+		* no need to judge if under suspend
+		*/
+		rtw_indicate_disconnect(padapter, 0, _TRUE);
+		#endif
+
+		rtw_pwr_wakeup(padapter);
+	}
+	return 0;
+}
+
 static int cfg80211_rtw_connect(struct wiphy *wiphy, struct net_device *ndev,
 				struct cfg80211_connect_params *sme)
 {
 	int ret = 0;
-	struct wlan_network *pnetwork = NULL;
 	NDIS_802_11_AUTHENTICATION_MODE authmode;
 	NDIS_802_11_SSID ndis_ssid;
-	u8 *dst_ssid, *src_ssid;
-	u8 *dst_bssid, *src_bssid;
 	/* u8 matched_by_bssid=_FALSE; */
 	/* u8 matched_by_ssid=_FALSE; */
-	u8 matched = _FALSE;
 	_adapter *padapter = (_adapter *)rtw_netdev_priv(ndev);
-	struct mlme_priv *pmlmepriv = &padapter->mlmepriv;
 	struct security_priv *psecuritypriv = &padapter->securitypriv;
-	_queue *queue = &pmlmepriv->scanned_queue;
-	struct wireless_dev *pwdev = padapter->rtw_wdev;
 	struct rtw_wdev_priv *pwdev_priv = adapter_wdev_data(padapter);
+	struct mlme_priv *pmlmepriv = &(padapter->mlmepriv);
 	_irqL irqL;
 
+#if (RTW_CFG80211_BLOCK_STA_DISCON_EVENT & RTW_CFG80211_BLOCK_DISCON_WHEN_CONNECT)
 	rtw_wdev_set_not_indic_disco(pwdev_priv, 1);
+#endif
 
 	RTW_INFO("=>"FUNC_NDEV_FMT" - Start to Connection\n", FUNC_NDEV_ARG(ndev));
 	RTW_INFO("privacy=%d, key=%p, key_len=%d, key_idx=%d, auth_type=%d\n",
 		sme->privacy, sme->key, sme->key_len, sme->key_idx, sme->auth_type);
 
-
 	if (pwdev_priv->block == _TRUE) {
 		ret = -EBUSY;
 		RTW_INFO("%s wdev_priv.block is set\n", __FUNCTION__);
 		goto exit;
 	}
 
+       if (check_fwstate(pmlmepriv, _FW_LINKED | _FW_UNDER_LINKING) == _TRUE) {
+
+		_rtw_disconnect(wiphy, ndev);
+		RTW_INFO("%s disconnect before connecting! fw_state=0x%x\n",
+			__FUNCTION__, pmlmepriv->fw_state);
+	}
+
 #ifdef CONFIG_PLATFORM_MSTAR_SCAN_BEFORE_CONNECT
 	printk("MStar Android!\n");
 	if (pwdev_priv->bandroid_scan == _FALSE) {
@@ -3622,7 +3999,9 @@ cancel_ps_deny:
 exit:
 	RTW_INFO("<=%s, ret %d\n", __FUNCTION__, ret);
 
+#if (RTW_CFG80211_BLOCK_STA_DISCON_EVENT & RTW_CFG80211_BLOCK_DISCON_WHEN_CONNECT)
 	rtw_wdev_set_not_indic_disco(pwdev_priv, 0);
+#endif
 
 	return ret;
 }
@@ -3631,35 +4010,26 @@ static int cfg80211_rtw_disconnect(struct wiphy *wiphy, struct net_device *ndev,
 				   u16 reason_code)
 {
 	_adapter *padapter = (_adapter *)rtw_netdev_priv(ndev);
-	struct rtw_wdev_priv *pwdev_priv = adapter_wdev_data(padapter);
 
 	RTW_INFO(FUNC_NDEV_FMT" - Start to Disconnect\n", FUNC_NDEV_ARG(ndev));
 
-#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 11, 0))
+#if (RTW_CFG80211_BLOCK_STA_DISCON_EVENT & RTW_CFG80211_BLOCK_DISCON_WHEN_DISCONNECT)
+	#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 11, 0))
 	if (!wiphy->dev.power.is_prepared)
+	#endif
+		rtw_wdev_set_not_indic_disco(adapter_wdev_data(padapter), 1);
 #endif
-		rtw_wdev_set_not_indic_disco(pwdev_priv, 1);
 
 	rtw_set_to_roam(padapter, 0);
 
 	/* if(check_fwstate(&padapter->mlmepriv, _FW_LINKED)) */
 	{
-		rtw_scan_abort(padapter);
-		rtw_join_abort_timeout(padapter, 300);
-		LeaveAllPowerSaveMode(padapter);
-		rtw_disassoc_cmd(padapter, 500, RTW_CMDF_WAIT_ACK);
-#ifdef CONFIG_RTW_REPEATER_SON
-		rtw_rson_do_disconnect(padapter);
-#endif
-		RTW_INFO("%s...call rtw_indicate_disconnect\n", __func__);
-
-		rtw_free_assoc_resources(padapter, 1);
-		rtw_indicate_disconnect(padapter, 0, wiphy->dev.power.is_prepared ? _FALSE : _TRUE);
-
-		rtw_pwr_wakeup(padapter);
+		_rtw_disconnect(wiphy, ndev);
 	}
 
-	rtw_wdev_set_not_indic_disco(pwdev_priv, 0);
+#if (RTW_CFG80211_BLOCK_STA_DISCON_EVENT & RTW_CFG80211_BLOCK_DISCON_WHEN_DISCONNECT)
+	rtw_wdev_set_not_indic_disco(adapter_wdev_data(padapter), 0);
+#endif
 
 	RTW_INFO(FUNC_NDEV_FMT" return 0\n", FUNC_NDEV_ARG(ndev));
 	return 0;
@@ -3847,10 +4217,12 @@ static int cfg80211_rtw_flush_pmksa(struct wiphy *wiphy,
 #ifdef CONFIG_AP_MODE
 void rtw_cfg80211_indicate_sta_assoc(_adapter *padapter, u8 *pmgmt_frame, uint frame_len)
 {
+#if !defined(RTW_USE_CFG80211_STA_EVENT) && !defined(COMPAT_KERNEL_RELEASE)
 	s32 freq;
 	int channel;
 	struct wireless_dev *pwdev = padapter->rtw_wdev;
 	struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv);
+#endif
 	struct net_device *ndev = padapter->pnetdev;
 
 	RTW_INFO(FUNC_ADPT_FMT"\n", FUNC_ADPT_ARG(padapter));
@@ -3895,8 +4267,9 @@ void rtw_cfg80211_indicate_sta_assoc(_adapter *padapter, u8 *pmgmt_frame, uint f
 
 }
 
-void rtw_cfg80211_indicate_sta_disassoc(_adapter *padapter, unsigned char *da, unsigned short reason)
+void rtw_cfg80211_indicate_sta_disassoc(_adapter *padapter, const u8 *da, unsigned short reason)
 {
+#if !defined(RTW_USE_CFG80211_STA_EVENT) && !defined(COMPAT_KERNEL_RELEASE)
 	s32 freq;
 	int channel;
 	u8 *pmgmt_frame;
@@ -3907,6 +4280,7 @@ void rtw_cfg80211_indicate_sta_disassoc(_adapter *padapter, unsigned char *da, u
 	struct mlme_ext_priv	*pmlmeext = &(padapter->mlmeextpriv);
 	struct mlme_ext_info	*pmlmeinfo = &(pmlmeext->mlmext_info);
 	struct wireless_dev *wdev = padapter->rtw_wdev;
+#endif
 	struct net_device *ndev = padapter->pnetdev;
 
 	RTW_INFO(FUNC_ADPT_FMT"\n", FUNC_ADPT_ARG(padapter));
@@ -3975,12 +4349,14 @@ static int rtw_cfg80211_monitor_if_xmit_entry(struct sk_buff *skb, struct net_de
 	int snap_len = 6;
 	unsigned char *pdata;
 	u16 frame_ctl;
-	unsigned char src_mac_addr[6];
-	unsigned char dst_mac_addr[6];
+	unsigned char src_mac_addr[ETH_ALEN];
+	unsigned char dst_mac_addr[ETH_ALEN];
 	struct rtw_ieee80211_hdr *dot11_hdr;
 	struct ieee80211_radiotap_header *rtap_hdr;
 	_adapter *padapter = (_adapter *)rtw_netdev_priv(ndev);
+#ifdef CONFIG_DFS_MASTER
 	struct rf_ctl_t *rfctl = adapter_to_rfctl(padapter);
+#endif
 
 	RTW_INFO(FUNC_NDEV_FMT"\n", FUNC_NDEV_ARG(ndev));
 
@@ -4281,6 +4657,9 @@ static int
 #endif
 	case NL80211_IFTYPE_STATION:
 	case NL80211_IFTYPE_AP:
+#ifdef CONFIG_RTW_MESH
+	case NL80211_IFTYPE_MESH_POINT:
+#endif
 		padapter = dvobj_get_unregisterd_adapter(dvobj);
 		if (!padapter) {
 			RTW_WARN("adapter pool empty!\n");
@@ -4309,7 +4688,6 @@ static int
 	case NL80211_IFTYPE_ADHOC:
 	case NL80211_IFTYPE_AP_VLAN:
 	case NL80211_IFTYPE_WDS:
-	case NL80211_IFTYPE_MESH_POINT:
 	default:
 		ret = -ENODEV;
 		RTW_INFO("Unsupported interface type\n");
@@ -4390,7 +4768,6 @@ static int rtw_add_beacon(_adapter *adapter, const u8 *head, size_t head_len, co
 	u8 *pbuf = NULL;
 	uint len, wps_ielen = 0;
 	uint p2p_ielen = 0;
-	u8 *p2p_ie;
 	u8 got_p2p_ie = _FALSE;
 	struct mlme_priv *pmlmepriv = &(adapter->mlmepriv);
 	/* struct sta_priv *pstapriv = &padapter->stapriv; */
@@ -4405,6 +4782,12 @@ static int rtw_add_beacon(_adapter *adapter, const u8 *head, size_t head_len, co
 	if (head_len < 24)
 		return -EINVAL;
 
+	#ifdef CONFIG_FW_HANDLE_TXBCN
+	if (!rtw_ap_nums_check(adapter)) {
+		RTW_ERR(FUNC_ADPT_FMT"failed, con't support over %d BCN\n", FUNC_ADPT_ARG(adapter), CONFIG_LIMITED_AP_NUM);
+		return -EINVAL;
+	}
+	#endif /*CONFIG_FW_HANDLE_TXBCN*/
 
 	pbuf = rtw_zmalloc(head_len + tail_len);
 	if (!pbuf)
@@ -4430,7 +4813,6 @@ static int rtw_add_beacon(_adapter *adapter, const u8 *head, size_t head_len, co
 	if (adapter->wdinfo.driver_interface == DRIVER_CFG80211) {
 		/* check p2p if enable */
 		if (rtw_get_p2p_ie(pbuf + _FIXED_IE_LENGTH_, len - _FIXED_IE_LENGTH_, NULL, &p2p_ielen)) {
-			struct mlme_ext_priv *pmlmeext = &adapter->mlmeextpriv;
 			struct wifidirect_info *pwdinfo = &(adapter->wdinfo);
 
 			RTW_INFO("got p2p_ie, len=%d\n", p2p_ielen);
@@ -4489,7 +4871,8 @@ static int cfg80211_rtw_add_beacon(struct wiphy *wiphy, struct net_device *ndev,
 		ret = -ENOTSUPP;
 		goto exit;
 	}
-
+	rtw_mi_scan_abort(adapter, _TRUE);
+	rtw_mi_buddy_set_scan_deny(adapter, 300);
 	ret = rtw_add_beacon(adapter, info->head, info->head_len, info->tail, info->tail_len);
 
 exit:
@@ -4536,7 +4919,8 @@ static int cfg80211_rtw_start_ap(struct wiphy *wiphy, struct net_device *ndev,
 		ret = -ENOTSUPP;
 		goto exit;
 	}
-
+	rtw_mi_scan_abort(adapter, _TRUE);
+	rtw_mi_buddy_set_scan_deny(adapter, 300);
 	ret = rtw_add_beacon(adapter, settings->beacon.head, settings->beacon.head_len,
 		settings->beacon.tail, settings->beacon.tail_len);
 
@@ -4603,6 +4987,7 @@ static int cfg80211_rtw_set_mac_acl(struct wiphy *wiphy, struct net_device *ndev
 
 	if (!params) {
 		RTW_WARN(FUNC_ADPT_FMT" params NULL\n", FUNC_ADPT_ARG(adapter));
+		rtw_macaddr_acl_clear(adapter, RTW_ACL_PERIOD_BSS);
 		goto exit;
 	}
 
@@ -4614,25 +4999,197 @@ static int cfg80211_rtw_set_mac_acl(struct wiphy *wiphy, struct net_device *ndev
 	else if (params->acl_policy == NL80211_ACL_POLICY_DENY_UNLESS_LISTED)
 		acl_mode = RTW_ACL_MODE_DENY_UNLESS_LISTED;
 
-	if (!params->n_acl_entries) {
-		if (acl_mode != RTW_ACL_MODE_DISABLED)
-			RTW_WARN(FUNC_ADPT_FMT" acl_policy:%d with no entry\n"
-				, FUNC_ADPT_ARG(adapter), params->acl_policy);
-		acl_mode = RTW_ACL_MODE_DISABLED;
-		goto exit;
-	}
+	rtw_macaddr_acl_clear(adapter, RTW_ACL_PERIOD_BSS);
+
+	rtw_set_macaddr_acl(adapter, RTW_ACL_PERIOD_BSS, acl_mode);
 
 	for (i = 0; i < params->n_acl_entries; i++)
-		rtw_acl_add_sta(adapter, params->mac_addrs[i].addr);
+		rtw_acl_add_sta(adapter, RTW_ACL_PERIOD_BSS, params->mac_addrs[i].addr);
 
 	ret = 0;
 
 exit:
-	rtw_set_macaddr_acl(adapter, acl_mode);
 	return ret;
 }
 #endif /* CONFIG_RTW_MACADDR_ACL && (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 9, 0)) */
 
+const char *_nl80211_sta_flags_str[] = {
+	"INVALID",
+	"AUTHORIZED",
+	"SHORT_PREAMBLE",
+	"WME",
+	"MFP",
+	"AUTHENTICATED",
+	"TDLS_PEER",
+	"ASSOCIATED",
+};
+
+#define nl80211_sta_flags_str(_f) ((_f <= NL80211_STA_FLAG_MAX) ? _nl80211_sta_flags_str[_f] : _nl80211_sta_flags_str[0])
+
+const char *_nl80211_plink_state_str[] = {
+	"LISTEN",
+	"OPN_SNT",
+	"OPN_RCVD",
+	"CNF_RCVD",
+	"ESTAB",
+	"HOLDING",
+	"BLOCKED",
+	"UNKNOWN",
+};
+
+#define nl80211_plink_state_str(_s) ((_s < NUM_NL80211_PLINK_STATES) ? _nl80211_plink_state_str[_s] : _nl80211_plink_state_str[NUM_NL80211_PLINK_STATES])
+
+#if (LINUX_VERSION_CODE < KERNEL_VERSION(3, 10, 0))
+#define NL80211_PLINK_ACTION_NO_ACTION PLINK_ACTION_INVALID
+#define NL80211_PLINK_ACTION_OPEN PLINK_ACTION_OPEN
+#define NL80211_PLINK_ACTION_BLOCK PLINK_ACTION_BLOCK
+#define NUM_NL80211_PLINK_ACTIONS 3
+#endif
+
+const char *_nl80211_plink_actions_str[] = {
+	"NO_ACTION",
+	"OPEN",
+	"BLOCK",
+	"UNKNOWN",
+};
+
+#define nl80211_plink_actions_str(_a) ((_a < NUM_NL80211_PLINK_ACTIONS) ? _nl80211_plink_actions_str[_a] : _nl80211_plink_actions_str[NUM_NL80211_PLINK_ACTIONS])
+
+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 9, 0))
+const char *_nl80211_mesh_power_mode_str[] = {
+	"UNKNOWN",
+	"ACTIVE",
+	"LIGHT_SLEEP",
+	"DEEP_SLEEP",
+};
+
+#define nl80211_mesh_power_mode_str(_p) ((_p <= NL80211_MESH_POWER_MAX) ? _nl80211_mesh_power_mode_str[_p] : _nl80211_mesh_power_mode_str[0])
+#endif
+
+void dump_station_parameters(void *sel, struct wiphy *wiphy, const struct station_parameters *params)
+{
+#if DBG_RTW_CFG80211_STA_PARAM
+	if (params->supported_rates_len) {
+		#define SUPP_RATES_BUF_LEN (3 * RTW_G_RATES_NUM + 1)
+		int i;
+		char supp_rates_buf[SUPP_RATES_BUF_LEN] = {0};
+		u8 cnt = 0;
+
+		rtw_warn_on(params->supported_rates_len > RTW_G_RATES_NUM);
+
+		for (i = 0; i < params->supported_rates_len; i++) {
+			if (i >= RTW_G_RATES_NUM)
+				break;
+			cnt += snprintf(supp_rates_buf + cnt, SUPP_RATES_BUF_LEN - cnt -1
+				, "%02X ", params->supported_rates[i]);
+			if (cnt >= SUPP_RATES_BUF_LEN - 1)
+				break;
+		}
+
+		RTW_PRINT_SEL(sel, "supported_rates:%s\n", supp_rates_buf);
+	}
+
+	if (params->vlan)
+		RTW_PRINT_SEL(sel, "vlan:"NDEV_FMT"\n", NDEV_ARG(params->vlan));
+
+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 31))
+	if (params->sta_flags_mask) {
+		#define STA_FLAGS_BUF_LEN 128
+		int i = 0;
+		char sta_flags_buf[STA_FLAGS_BUF_LEN] = {0};
+		u8 cnt = 0;
+
+		for (i = 1; i <= NL80211_STA_FLAG_MAX; i++) {
+			if (params->sta_flags_mask & BIT(i)) {
+				cnt += snprintf(sta_flags_buf + cnt, STA_FLAGS_BUF_LEN - cnt -1, "%s=%u "
+					, nl80211_sta_flags_str(i), (params->sta_flags_set & BIT(i)) ? 1 : 0);
+				if (cnt >= STA_FLAGS_BUF_LEN - 1)
+					break;
+			}
+		}
+
+		RTW_PRINT_SEL(sel, "sta_flags:%s\n", sta_flags_buf);
+	}
+#else
+	u32 station_flags;
+	#error "TBD\n"
+#endif
+
+	if (params->listen_interval != -1)
+		RTW_PRINT_SEL(sel, "listen_interval:%d\n", params->listen_interval);
+
+	if (params->aid)
+		RTW_PRINT_SEL(sel, "aid:%u\n", params->aid);
+
+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(4, 8, 0))
+	if (params->peer_aid)
+		RTW_PRINT_SEL(sel, "peer_aid:%u\n", params->peer_aid);
+#endif
+
+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 26))
+	if (params->plink_action != NL80211_PLINK_ACTION_NO_ACTION)
+		RTW_PRINT_SEL(sel, "plink_action:%s\n", nl80211_plink_actions_str(params->plink_action));
+#endif
+
+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 0, 0))
+	#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 10, 0))
+	if (params->sta_modify_mask & STATION_PARAM_APPLY_PLINK_STATE)
+	#endif
+		RTW_PRINT_SEL(sel, "plink_state:%s\n"
+			, nl80211_plink_state_str(params->plink_state));
+#endif
+
+#if 0 /* TODO */
+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 28))
+	const struct ieee80211_ht_cap *ht_capa;
+#endif
+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 8, 0))
+	const struct ieee80211_vht_cap *vht_capa;
+#endif
+#endif
+
+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 2, 0))
+	if (params->sta_modify_mask & STATION_PARAM_APPLY_UAPSD)
+		RTW_PRINT_SEL(sel, "uapsd_queues:0x%02x\n", params->uapsd_queues);
+	if (params->max_sp)
+		RTW_PRINT_SEL(sel, "max_sp:%u\n", params->max_sp);
+#endif
+
+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 9, 0))
+	if (params->local_pm != NL80211_MESH_POWER_UNKNOWN) {
+		RTW_PRINT_SEL(sel, "local_pm:%s\n"
+			, nl80211_mesh_power_mode_str(params->local_pm));
+	}
+
+	if (params->sta_modify_mask & STATION_PARAM_APPLY_CAPABILITY)
+		RTW_PRINT_SEL(sel, "capability:0x%04x\n", params->capability);
+
+#if 0 /* TODO */
+	const u8 *ext_capab;
+	u8 ext_capab_len;
+#endif
+#endif
+
+#if 0 /* TODO */
+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 13, 0))
+	const u8 *supported_channels;
+	u8 supported_channels_len;
+	const u8 *supported_oper_classes;
+	u8 supported_oper_classes_len;
+#endif
+
+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 14, 0))
+	u8 opmode_notif;
+	bool opmode_notif_used;
+#endif
+
+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(4, 7, 0))
+	int support_p2p_ps;
+#endif
+#endif
+#endif /* DBG_RTW_CFG80211_STA_PARAM */
+}
+
 static int	cfg80211_rtw_add_station(struct wiphy *wiphy, struct net_device *ndev,
 #if (LINUX_VERSION_CODE < KERNEL_VERSION(3, 16, 0))
 	u8 *mac,
@@ -4642,12 +5199,148 @@ static int	cfg80211_rtw_add_station(struct wiphy *wiphy, struct net_device *ndev
 	struct station_parameters *params)
 {
 	int ret = 0;
-#ifdef CONFIG_TDLS
 	_adapter *padapter = (_adapter *)rtw_netdev_priv(ndev);
+#if defined(CONFIG_TDLS) || defined(CONFIG_RTW_MESH)
 	struct sta_priv *pstapriv = &padapter->stapriv;
+#endif
+#ifdef CONFIG_TDLS
 	struct sta_info *psta;
 #endif /* CONFIG_TDLS */
-	RTW_INFO(FUNC_NDEV_FMT"\n", FUNC_NDEV_ARG(ndev));
+
+	RTW_INFO(FUNC_NDEV_FMT" mac:"MAC_FMT"\n", FUNC_NDEV_ARG(ndev), MAC_ARG(mac));
+
+#if CONFIG_RTW_MACADDR_ACL
+	if (rtw_access_ctrl(padapter, mac) == _FALSE) {
+		RTW_INFO(FUNC_NDEV_FMT" deny by macaddr ACL\n", FUNC_NDEV_ARG(ndev));
+		ret = -EINVAL;
+		goto exit;
+	}
+#endif
+
+	dump_station_parameters(RTW_DBGDUMP, wiphy, params);
+
+#ifdef CONFIG_RTW_MESH
+	if (MLME_IS_MESH(padapter)) {
+		struct rtw_mesh_cfg *mcfg = &padapter->mesh_cfg;
+		struct rtw_mesh_info *minfo = &padapter->mesh_info;
+		struct mesh_plink_pool *plink_ctl = &minfo->plink_ctl;
+		struct mesh_plink_ent *plink = NULL;
+		struct wlan_network *scanned = NULL;
+		bool acnode = 0;
+		u8 add_new_sta = 0, probe_req = 0;
+		_irqL irqL;
+
+		if (params->plink_state != NL80211_PLINK_LISTEN) {
+			RTW_WARN(FUNC_NDEV_FMT" %s\n", FUNC_NDEV_ARG(ndev), nl80211_plink_state_str(params->plink_state));
+			rtw_warn_on(1);
+		}
+		if (!params->aid || params->aid > pstapriv->max_aid) {
+			RTW_WARN(FUNC_NDEV_FMT" invalid aid:%u\n", FUNC_NDEV_ARG(ndev), params->aid);
+			rtw_warn_on(1);
+			ret = -EINVAL;
+			goto exit;
+		}
+
+		_enter_critical_bh(&(plink_ctl->lock), &irqL);
+
+		plink = _rtw_mesh_plink_get(padapter, mac);
+		if (plink)
+			goto release_plink_ctl;
+
+		#if CONFIG_RTW_MESH_PEER_BLACKLIST
+		if (rtw_mesh_peer_blacklist_search(padapter, mac)) {
+			RTW_INFO(FUNC_NDEV_FMT" deny by peer blacklist\n"
+				, FUNC_NDEV_ARG(ndev));
+			ret = -EINVAL;
+			goto release_plink_ctl;
+		}
+		#endif
+
+		scanned = rtw_find_network(&padapter->mlmepriv.scanned_queue, mac);
+		if (!scanned
+			|| rtw_get_passing_time_ms(scanned->last_scanned) >= mcfg->peer_sel_policy.scanr_exp_ms
+		) {
+			if (!scanned)
+				RTW_INFO(FUNC_NDEV_FMT" corresponding network not found\n", FUNC_NDEV_ARG(ndev));
+			else
+				RTW_INFO(FUNC_NDEV_FMT" corresponding network too old\n", FUNC_NDEV_ARG(ndev));
+
+			if (adapter_to_rfctl(padapter)->offch_state == OFFCHS_NONE)
+				probe_req = 1;
+
+			ret = -EINVAL;
+			goto release_plink_ctl;
+		}
+
+		#if CONFIG_RTW_MESH_ACNODE_PREVENT
+		if (plink_ctl->acnode_rsvd)
+			acnode = rtw_mesh_scanned_is_acnode_confirmed(padapter, scanned);
+		#endif
+
+		/* wpa_supplicant's auto peer will initiate peering when candidate peer is reported without max_peer_links consideration */
+		if (plink_ctl->num >= mcfg->max_peer_links + acnode ? 1 : 0) {
+			RTW_INFO(FUNC_NDEV_FMT" exceed max_peer_links:%u%s\n"
+				, FUNC_NDEV_ARG(ndev), mcfg->max_peer_links, acnode ? " acn" : "");
+			ret = -EINVAL;
+			goto release_plink_ctl;
+		}
+
+		if (!rtw_bss_is_candidate_mesh_peer(&padapter->mlmepriv.cur_network.network, &scanned->network, 1, 1)) {
+			RTW_WARN(FUNC_NDEV_FMT" corresponding network is not candidate with same ch\n"
+				, FUNC_NDEV_ARG(ndev));
+			ret = -EINVAL;
+			goto release_plink_ctl;
+		}
+
+		#if CONFIG_RTW_MESH_CTO_MGATE_BLACKLIST
+		if (!rtw_mesh_cto_mgate_network_filter(padapter, scanned)) {
+			RTW_INFO(FUNC_NDEV_FMT" peer filtered out by cto_mgate check\n"
+				, FUNC_NDEV_ARG(ndev));
+			ret = -EINVAL;
+			goto release_plink_ctl;
+		}
+		#endif
+
+		if (_rtw_mesh_plink_add(padapter, mac) == _SUCCESS) {
+			/* hook corresponding network in scan queue */
+			plink = _rtw_mesh_plink_get(padapter, mac);
+			plink->aid = params->aid;
+			plink->scanned = scanned;
+
+			#if CONFIG_RTW_MESH_ACNODE_PREVENT
+			if (acnode) {
+				RTW_INFO(FUNC_ADPT_FMT" acnode "MAC_FMT"\n"
+				, FUNC_ADPT_ARG(padapter), MAC_ARG(scanned->network.MacAddress));
+			}
+			#endif
+
+			add_new_sta = 1;
+		} else {
+			RTW_WARN(FUNC_NDEV_FMT" rtw_mesh_plink_add not success\n"
+				, FUNC_NDEV_ARG(ndev));
+			ret = -EINVAL;
+		}
+release_plink_ctl:
+		_exit_critical_bh(&(plink_ctl->lock), &irqL);
+
+		if (probe_req)
+			issue_probereq(padapter, &padapter->mlmepriv.cur_network.network.mesh_id, mac);
+
+		if (add_new_sta) {
+			struct station_info sinfo;
+
+			#ifdef CONFIG_DFS_MASTER
+			if (IS_UNDER_CAC(adapter_to_rfctl(padapter)))
+				rtw_force_stop_cac(adapter_to_rfctl(padapter), 300);
+			#endif
+
+			/* indicate new sta */
+			_rtw_memset(&sinfo, 0, sizeof(sinfo));
+			cfg80211_new_sta(ndev, mac, &sinfo, GFP_ATOMIC);
+		}
+		goto exit;
+	}
+#endif /* CONFIG_RTW_MESH */
 
 #ifdef CONFIG_TDLS
 	psta = rtw_get_stainfo(pstapriv, (u8 *)mac);
@@ -4738,6 +5431,7 @@ static int	cfg80211_rtw_del_station(struct wiphy *wiphy, struct net_device *ndev
 
 				rtw_list_delete(&psta->asoc_list);
 				pstapriv->asoc_list_cnt--;
+				STA_SET_MESH_PLINK(psta, NULL);
 
 				/* _exit_critical_bh(&pstapriv->asoc_list_lock, &irqL); */
 				if (MLME_IS_AP(padapter))
@@ -4759,6 +5453,11 @@ static int	cfg80211_rtw_del_station(struct wiphy *wiphy, struct net_device *ndev
 
 	associated_clients_update(padapter, updated, STA_INFO_UPDATE_ALL);
 
+#ifdef CONFIG_RTW_MESH
+	if (MLME_IS_MESH(padapter))
+		rtw_mesh_plink_del(padapter, target_mac);
+#endif
+
 	RTW_INFO("-"FUNC_NDEV_FMT"\n", FUNC_NDEV_ARG(ndev));
 
 	return ret;
@@ -4773,15 +5472,131 @@ static int	cfg80211_rtw_change_station(struct wiphy *wiphy, struct net_device *n
 #endif
 	struct station_parameters *params)
 {
-	RTW_INFO(FUNC_NDEV_FMT"\n", FUNC_NDEV_ARG(ndev));
+#ifdef CONFIG_RTW_MESH
+	_adapter *adapter = (_adapter *)rtw_netdev_priv(ndev);
+	struct sta_priv *stapriv = &adapter->stapriv;
+	struct sta_info *sta = NULL;
+	_irqL irqL;
+#endif
+	int ret = 0;
 
-	return 0;
-}
+	RTW_INFO(FUNC_NDEV_FMT" mac:"MAC_FMT"\n", FUNC_NDEV_ARG(ndev), MAC_ARG(mac));
 
-struct sta_info *rtw_sta_info_get_by_idx(const int idx, struct sta_priv *pstapriv)
+	dump_station_parameters(RTW_DBGDUMP, wiphy, params);
 
-{
+#ifdef CONFIG_RTW_MESH
+	if (MLME_IS_MESH(adapter)) {
+		enum cfg80211_station_type sta_type = CFG80211_STA_MESH_PEER_USER;
+		struct rtw_mesh_info *minfo = &adapter->mesh_info;
+		struct mesh_plink_pool *plink_ctl = &minfo->plink_ctl;
+		struct mesh_plink_ent *plink = NULL;
+		_irqL irqL2;
+		struct sta_info *del_sta = NULL;
+
+		ret = cfg80211_check_station_change(wiphy, params, sta_type);
+		if (ret) {
+			RTW_INFO("cfg80211_check_station_change return %d\n", ret);
+			goto exit;
+		}
+
+		_enter_critical_bh(&(plink_ctl->lock), &irqL2);
+
+		plink = _rtw_mesh_plink_get(adapter, mac);
+		if (!plink) {
+			ret = -ENOENT;
+			goto release_plink_ctl;
+		}
+
+		plink->plink_state = nl80211_plink_state_to_rtw_plink_state(params->plink_state);
 
+		#if CONFIG_RTW_MESH_ACNODE_PREVENT
+		if (params->plink_state == NL80211_PLINK_OPN_SNT
+			#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 10, 0))
+			&& (params->sta_modify_mask & STATION_PARAM_APPLY_PLINK_STATE)
+			#endif
+		) {
+			if (rtw_mesh_scanned_is_acnode_confirmed(adapter, plink->scanned)
+				&& rtw_mesh_acnode_prevent_allow_sacrifice(adapter)
+			) {
+				struct sta_info *sac = rtw_mesh_acnode_prevent_pick_sacrifice(adapter);
+
+				if (sac) {
+					del_sta = sac;
+					_enter_critical_bh(&stapriv->asoc_list_lock, &irqL);
+					if (!rtw_is_list_empty(&del_sta->asoc_list)) {
+						rtw_list_delete(&del_sta->asoc_list);
+						stapriv->asoc_list_cnt--;
+						STA_SET_MESH_PLINK(del_sta, NULL);
+					}
+					_exit_critical_bh(&stapriv->asoc_list_lock, &irqL);
+					RTW_INFO(FUNC_ADPT_FMT" sacrifice "MAC_FMT" for acnode\n"
+						, FUNC_ADPT_ARG(adapter), MAC_ARG(del_sta->cmn.mac_addr));
+				}
+			}
+		} else
+		#endif
+		if ((params->plink_state == NL80211_PLINK_OPN_RCVD
+				|| params->plink_state == NL80211_PLINK_CNF_RCVD
+				|| params->plink_state == NL80211_PLINK_ESTAB)
+			#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 10, 0))
+			&& (params->sta_modify_mask & STATION_PARAM_APPLY_PLINK_STATE)
+			#endif
+		) {
+			sta = rtw_get_stainfo(stapriv, mac);
+			if (!sta) {
+				sta = rtw_alloc_stainfo(stapriv, mac);
+				if (!sta)
+					goto release_plink_ctl;
+			}
+
+			if (params->plink_state == NL80211_PLINK_ESTAB) {
+				if (rtw_mesh_peer_establish(adapter, plink, sta) != _SUCCESS) {
+					rtw_free_stainfo(adapter, sta);
+					ret = -ENOENT;
+					goto release_plink_ctl;
+				}
+			}
+		}
+		else if (params->plink_state == NL80211_PLINK_HOLDING
+			#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 10, 0))
+			&& (params->sta_modify_mask & STATION_PARAM_APPLY_PLINK_STATE)
+			#endif
+		) {
+			del_sta = rtw_get_stainfo(stapriv, mac);
+			if (!del_sta)
+				goto release_plink_ctl;
+
+			_enter_critical_bh(&stapriv->asoc_list_lock, &irqL);
+			if (!rtw_is_list_empty(&del_sta->asoc_list)) {
+				rtw_list_delete(&del_sta->asoc_list);
+				stapriv->asoc_list_cnt--;
+				STA_SET_MESH_PLINK(del_sta, NULL);
+			}
+			_exit_critical_bh(&stapriv->asoc_list_lock, &irqL);
+		}
+
+release_plink_ctl:
+		_exit_critical_bh(&(plink_ctl->lock), &irqL2);
+
+		if (del_sta) {
+			u8 sta_addr[ETH_ALEN];
+			u8 updated = _FALSE;
+			
+			_rtw_memcpy(sta_addr, del_sta->cmn.mac_addr, ETH_ALEN);
+			updated = ap_free_sta(adapter, del_sta, 0, 0, 1);
+			rtw_mesh_expire_peer(stapriv->padapter, sta_addr);
+
+			associated_clients_update(adapter, updated, STA_INFO_UPDATE_ALL);
+		}
+	}
+#endif /* CONFIG_RTW_MESH */
+
+exit:
+	return ret;
+}
+
+struct sta_info *rtw_sta_info_get_by_idx(struct sta_priv *pstapriv, const int idx, u8 *asoc_list_num)
+{
 	_list	*phead, *plist;
 	struct sta_info *psta = NULL;
 	int i = 0;
@@ -4796,32 +5611,75 @@ struct sta_info *rtw_sta_info_get_by_idx(const int idx, struct sta_priv *pstapri
 		plist = get_next(plist);
 		i++;
 	}
+
+	if (asoc_list_num)
+		*asoc_list_num = i;
+
 	return psta;
 }
 
 static int	cfg80211_rtw_dump_station(struct wiphy *wiphy, struct net_device *ndev,
 		int idx, u8 *mac, struct station_info *sinfo)
 {
+#define DBG_DUMP_STATION 0
 
 	int ret = 0;
 	_irqL irqL;
 	_adapter *padapter = (_adapter *)rtw_netdev_priv(ndev);
-	struct sta_info *psta = NULL;
 	struct sta_priv *pstapriv = &padapter->stapriv;
-	RTW_INFO(FUNC_NDEV_FMT"\n", FUNC_NDEV_ARG(ndev));
+	struct sta_info *psta = NULL;
+#ifdef CONFIG_RTW_MESH
+	struct mesh_plink_ent *plink = NULL;
+#endif
+	u8 asoc_list_num;
+
+	if (DBG_DUMP_STATION)
+		RTW_INFO(FUNC_NDEV_FMT"\n", FUNC_NDEV_ARG(ndev));
 
 	_enter_critical_bh(&pstapriv->asoc_list_lock, &irqL);
-	psta = rtw_sta_info_get_by_idx(idx, pstapriv);
+	psta = rtw_sta_info_get_by_idx(pstapriv, idx, &asoc_list_num);
 	_exit_critical_bh(&pstapriv->asoc_list_lock, &irqL);
-	if (NULL == psta) {
-		RTW_INFO("Station is not found\n");
+
+#ifdef CONFIG_RTW_MESH
+	if (MLME_IS_MESH(padapter)) {
+		if (psta)
+			plink = psta->plink;
+		if (!plink)
+			plink = rtw_mesh_plink_get_no_estab_by_idx(padapter, idx - asoc_list_num);
+	}
+#endif /* CONFIG_RTW_MESH */
+
+	if ((!MLME_IS_MESH(padapter) && !psta)
+		#ifdef CONFIG_RTW_MESH
+		|| (MLME_IS_MESH(padapter) && !plink)
+		#endif
+	) {
+		if (DBG_DUMP_STATION)
+			RTW_INFO(FUNC_NDEV_FMT" end with idx:%d\n", FUNC_NDEV_ARG(ndev), idx);
 		ret = -ENOENT;
 		goto exit;
 	}
-	_rtw_memcpy(mac, psta->cmn.mac_addr, ETH_ALEN);
+
+	if (psta)
+		_rtw_memcpy(mac, psta->cmn.mac_addr, ETH_ALEN);
+	#ifdef CONFIG_RTW_MESH
+	else
+		_rtw_memcpy(mac, plink->addr, ETH_ALEN);
+	#endif
+	
 	sinfo->filled = 0;
-	sinfo->filled |= STATION_INFO_SIGNAL;
-	sinfo->signal = translate_percentage_to_dbm(psta->cmn.rssi_stat.rssi);
+
+	if (psta) {
+		sinfo->filled |= STATION_INFO_SIGNAL;
+		sinfo->signal = translate_percentage_to_dbm(psta->cmn.rssi_stat.rssi);
+		sinfo->filled |= STATION_INFO_INACTIVE_TIME;
+		sinfo->inactive_time = rtw_get_passing_time_ms(psta->sta_stats.last_rx_time);
+	}
+
+#ifdef CONFIG_RTW_MESH
+	if (MLME_IS_MESH(padapter))
+		rtw_cfg80211_fill_mesh_only_sta_info(plink, psta, sinfo);
+#endif
 
 exit:
 	return ret;
@@ -4830,8 +5688,6 @@ exit:
 static int	cfg80211_rtw_change_bss(struct wiphy *wiphy, struct net_device *ndev,
 		struct bss_parameters *params)
 {
-	u8 i;
-
 	RTW_INFO(FUNC_NDEV_FMT"\n", FUNC_NDEV_ARG(ndev));
 /*
 	RTW_INFO("use_cts_prot=%d\n", params->use_cts_prot);
@@ -4847,6 +5703,97 @@ static int	cfg80211_rtw_change_bss(struct wiphy *wiphy, struct net_device *ndev,
 
 }
 
+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 29))
+static int	cfg80211_rtw_set_txq_params(struct wiphy *wiphy
+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 2, 0))
+	, struct net_device *ndev
+#endif
+	, struct ieee80211_txq_params *params)
+{
+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 2, 0))
+	_adapter *padapter = rtw_netdev_priv(ndev);
+#else
+	_adapter *padapter = wiphy_to_adapter(wiphy);
+#endif
+	struct mlme_ext_priv	*pmlmeext = &padapter->mlmeextpriv;
+	struct mlme_ext_info	*pmlmeinfo = &(pmlmeext->mlmext_info);
+	u8	ac, AIFS, ECWMin, ECWMax, aSifsTime;
+	u16	TXOP;
+	u8	shift_count = 0;
+	u32	acParm;
+
+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 5, 0))
+	ac = params->ac;
+#else
+	ac = params->queue;
+#endif
+
+#if 0
+	RTW_INFO("ac=%d\n", ac);
+	RTW_INFO("txop=%u\n", params->txop);
+	RTW_INFO("cwmin=%u\n", params->cwmin);
+	RTW_INFO("cwmax=%u\n", params->cwmax);
+	RTW_INFO("aifs=%u\n", params->aifs);
+#endif
+
+	if (is_supported_5g(pmlmeext->cur_wireless_mode) ||
+	    (pmlmeext->cur_wireless_mode & WIRELESS_11_24N))
+		aSifsTime = 16;
+	else
+		aSifsTime = 10;
+
+	AIFS = params->aifs * pmlmeinfo->slotTime + aSifsTime;
+
+	while ((params->cwmin + 1) >> shift_count != 1) {
+		shift_count++;
+		if (shift_count == 15)
+			break;
+	}
+
+	ECWMin = shift_count;
+
+	shift_count = 0;
+	while ((params->cwmax + 1) >> shift_count != 1) {
+		shift_count++;
+		if (shift_count == 15)
+			break;
+	}
+
+	ECWMax = shift_count;
+
+	TXOP = le16_to_cpu(params->txop);
+
+	acParm = AIFS | (ECWMin << 8) | (ECWMax << 12) | (TXOP << 16);
+
+	switch (ac) {
+	case NL80211_TXQ_Q_VO:
+		RTW_INFO(FUNC_NDEV_FMT" AC_VO = 0x%08x\n", FUNC_ADPT_ARG(padapter), acParm);
+		rtw_hal_set_hwreg(padapter, HW_VAR_AC_PARAM_VO, (u8 *)(&acParm));
+		break;
+
+	case NL80211_TXQ_Q_VI:
+		RTW_INFO(FUNC_NDEV_FMT" AC_VI = 0x%08x\n", FUNC_ADPT_ARG(padapter), acParm);
+		rtw_hal_set_hwreg(padapter, HW_VAR_AC_PARAM_VI, (u8 *)(&acParm));
+		break;
+
+	case NL80211_TXQ_Q_BE:
+		RTW_INFO(FUNC_NDEV_FMT" AC_BE = 0x%08x\n", FUNC_ADPT_ARG(padapter), acParm);
+		rtw_hal_set_hwreg(padapter, HW_VAR_AC_PARAM_BE, (u8 *)(&acParm));
+		break;
+
+	case NL80211_TXQ_Q_BK:
+		RTW_INFO(FUNC_NDEV_FMT" AC_BK = 0x%08x\n", FUNC_ADPT_ARG(padapter), acParm);
+		rtw_hal_set_hwreg(padapter, HW_VAR_AC_PARAM_BK, (u8 *)(&acParm));
+		break;
+
+	default:
+		break;
+	}
+
+	return 0;
+}
+#endif /* (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 29)) */
+
 static int	cfg80211_rtw_set_channel(struct wiphy *wiphy
 	#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 35))
 	, struct net_device *ndev
@@ -5013,7 +5960,6 @@ static int	cfg80211_rtw_assoc(struct wiphy *wiphy, struct net_device *ndev,
 void rtw_cfg80211_rx_probe_request(_adapter *adapter, union recv_frame *rframe)
 {
 	struct wireless_dev *wdev = adapter->rtw_wdev;
-	struct rtw_wdev_priv *pwdev_priv = adapter_wdev_data(adapter);
 	u8 *frame = get_recvframe_data(rframe);
 	uint frame_len = rframe->u.hdr.len;
 	s32 freq;
@@ -5110,6 +6056,7 @@ void rtw_cfg80211_rx_p2p_action_public(_adapter *adapter, union recv_frame *rfra
 			break;
 		case P2P_PROVISION_DISC_RESP:
 		case P2P_INVIT_RESP:
+			rtw_clear_scan_deny(adapter);
 			#if !RTW_P2P_GROUP_INTERFACE
 			rtw_mi_buddy_set_scan_deny(adapter, 2000);
 			#endif
@@ -5138,12 +6085,12 @@ indicate:
 void rtw_cfg80211_rx_action(_adapter *adapter, union recv_frame *rframe, const char *msg)
 {
 	struct wireless_dev *wdev = adapter->rtw_wdev;
-	struct rtw_wdev_priv *pwdev_priv = adapter_wdev_data(adapter);
 	u8 *frame = get_recvframe_data(rframe);
 	uint frame_len = rframe->u.hdr.len;
 	s32 freq;
 	u8 ch, sch = rtw_get_oper_ch(adapter);
 	u8 category, action;
+	int type = -1;
 
 	ch = rframe->u.hdr.attrib.ch ? rframe->u.hdr.attrib.ch : sch;
 	freq = rtw_ch2freq(ch);
@@ -5151,6 +6098,13 @@ void rtw_cfg80211_rx_action(_adapter *adapter, union recv_frame *rframe, const c
 	RTW_INFO("RTW_Rx:ch=%d(%d), ta="MAC_FMT"\n"
 		, ch, sch, MAC_ARG(get_addr2_ptr(frame)));
 
+#ifdef CONFIG_RTW_MESH
+	if (MLME_IS_MESH(adapter)) {
+		type = rtw_mesh_check_frames_rx(adapter, frame, frame_len);
+		if (type >= 0)
+			goto indicate;
+	}
+#endif
 	rtw_action_frame_parse(frame, frame_len, &category, &action);
 	if (category == RTW_WLAN_CATEGORY_PUBLIC) {
 		if (action == ACT_PUBLIC_GAS_INITIAL_REQ) {
@@ -5159,16 +6113,19 @@ void rtw_cfg80211_rx_action(_adapter *adapter, union recv_frame *rframe, const c
 		}
 	}
 
+indicate:
 #if (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 37)) || defined(COMPAT_KERNEL_RELEASE)
 	rtw_cfg80211_rx_mgmt(wdev, freq, 0, frame, frame_len, GFP_ATOMIC);
 #else
 	cfg80211_rx_action(adapter->pnetdev, freq, frame, frame_len, GFP_ATOMIC);
 #endif
 
-	if (msg)
-		RTW_INFO("RTW_Rx:%s\n", msg);
-	else
-		RTW_INFO("RTW_Rx:category(%u), action(%u)\n", category, action);
+	if (type == -1) {
+		if (msg)
+			RTW_INFO("RTW_Rx:%s\n", msg);
+		else
+			RTW_INFO("RTW_Rx:category(%u), action(%u)\n", category, action);
+	}
 }
 
 #ifdef CONFIG_RTW_80211K
@@ -5177,10 +6134,10 @@ void rtw_cfg80211_rx_rrm_action(_adapter *adapter, union recv_frame *rframe)
 	struct wireless_dev *wdev = adapter->rtw_wdev;
 	u8 *frame = get_recvframe_data(rframe);
 	uint frame_len = rframe->u.hdr.len;
-	s32 ch, freq;
-
+	s32 freq;
+	u8 ch, sch = rtw_get_oper_ch(adapter);
 
-	ch = rtw_get_oper_ch(adapter);
+	ch = rframe->u.hdr.attrib.ch ? rframe->u.hdr.attrib.ch : sch;
 	freq = rtw_ch2freq(ch);
 
 #if (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 37)) || defined(COMPAT_KERNEL_RELEASE)
@@ -5188,10 +6145,40 @@ void rtw_cfg80211_rx_rrm_action(_adapter *adapter, union recv_frame *rframe)
 #else
 	cfg80211_rx_action(adapter->pnetdev, freq, frame, frame_len, GFP_ATOMIC);
 #endif
-	RTW_INFO("RTW_Rx:ch=%d, freq=%d\n", ch, freq);
+	RTW_INFO("RTW_Rx:ch=%d(%d), ta="MAC_FMT"\n"
+		, ch, sch, MAC_ARG(get_addr2_ptr(frame)));
 }
 #endif /* CONFIG_RTW_80211K */
 
+void rtw_cfg80211_rx_mframe(_adapter *adapter, union recv_frame *rframe, const char *msg)
+{
+	struct wireless_dev *wdev = adapter->rtw_wdev;
+	u8 *frame = get_recvframe_data(rframe);
+	uint frame_len = rframe->u.hdr.len;
+	s32 freq;
+	u8 ch, sch = rtw_get_oper_ch(adapter);
+
+	ch = rframe->u.hdr.attrib.ch ? rframe->u.hdr.attrib.ch : sch;
+	freq = rtw_ch2freq(ch);
+
+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 37)) || defined(COMPAT_KERNEL_RELEASE)
+	rtw_cfg80211_rx_mgmt(wdev, freq, 0, frame, frame_len, GFP_ATOMIC);
+#else
+	cfg80211_rx_action(adapter->pnetdev, freq, frame, frame_len, GFP_ATOMIC);
+#endif
+
+	RTW_INFO("RTW_Rx:ch=%d(%d), ta="MAC_FMT"\n", ch, sch, MAC_ARG(get_addr2_ptr(frame)));
+	#ifdef CONFIG_RTW_MESH
+	if (!rtw_sae_check_frames(adapter, frame, frame_len, _FALSE))
+	#endif
+	{
+		if (msg)
+			RTW_INFO("RTW_Rx:%s\n", msg);
+		else
+			RTW_INFO("RTW_Rx:frame_control:0x%02x\n", le16_to_cpu(((struct rtw_ieee80211_hdr_3addr *)rframe)->frame_ctl));
+	}
+}
+
 #ifdef CONFIG_P2P
 void rtw_cfg80211_issue_p2p_provision_request(_adapter *padapter, const u8 *buf, size_t len)
 {
@@ -5222,7 +6209,6 @@ void rtw_cfg80211_issue_p2p_provision_request(_adapter *padapter, const u8 *buf,
 	unsigned short				*fctrl;
 	struct xmit_priv			*pxmitpriv = &(padapter->xmitpriv);
 	struct mlme_ext_priv	*pmlmeext = &(padapter->mlmeextpriv);
-	struct mlme_ext_info	*pmlmeinfo = &(pmlmeext->mlmext_info);
 
 	struct wifidirect_info *pwdinfo = &(padapter->wdinfo);
 	u8 *frame_body = (unsigned char *)(buf + sizeof(struct rtw_ieee80211_hdr_3addr));
@@ -5468,6 +6454,24 @@ inline bool rtw_cfg80211_get_is_roch(_adapter *adapter)
 	return adapter->cfg80211_wdinfo.is_ro_ch;
 }
 
+inline bool rtw_cfg80211_is_ro_ch_once(_adapter *adapter)
+{
+	return adapter->cfg80211_wdinfo.last_ro_ch_time ? 1 : 0;
+}
+
+inline void rtw_cfg80211_set_last_ro_ch_time(_adapter *adapter)
+{
+	adapter->cfg80211_wdinfo.last_ro_ch_time = rtw_get_current_time();
+
+	if (!adapter->cfg80211_wdinfo.last_ro_ch_time)
+		adapter->cfg80211_wdinfo.last_ro_ch_time++;
+}
+
+inline s32 rtw_cfg80211_get_last_ro_ch_passing_ms(_adapter *adapter)
+{
+	return rtw_get_passing_time_ms(adapter->cfg80211_wdinfo.last_ro_ch_time);
+}
+
 static s32 cfg80211_rtw_remain_on_channel(struct wiphy *wiphy,
 #if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 6, 0))
 	struct wireless_dev *wdev,
@@ -5482,13 +6486,13 @@ static s32 cfg80211_rtw_remain_on_channel(struct wiphy *wiphy,
 {
 	s32 err = 0;
 	u8 remain_ch = (u8) ieee80211_frequency_to_channel(channel->center_freq);
-	u8 union_ch = 0, union_bw = 0, union_offset = 0;
-	u8 i;
 	_adapter *padapter = NULL;
 	struct rtw_wdev_priv *pwdev_priv;
 	struct wifidirect_info *pwdinfo;
 	struct cfg80211_wifidirect_info *pcfg80211_wdinfo;
+#ifdef CONFIG_CONCURRENT_MODE
 	u8 is_p2p_find = _FALSE;
+#endif
 
 #if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 6, 0))
 	#if defined(RTW_DEDICATED_P2P_DEVICE)
@@ -5598,7 +6602,7 @@ static s32 cfg80211_rtw_remain_on_channel(struct wiphy *wiphy,
 	rtw_cfg80211_set_is_roch(padapter, _TRUE);
 	pcfg80211_wdinfo->ro_ch_wdev = wdev;
 	pcfg80211_wdinfo->remain_on_ch_cookie = *cookie;
-	pcfg80211_wdinfo->last_ro_ch_time = rtw_get_current_time();
+	rtw_cfg80211_set_last_ro_ch_time(padapter);
 	_rtw_memcpy(&pcfg80211_wdinfo->remain_on_ch_channel, channel, sizeof(struct ieee80211_channel));
 	#if (LINUX_VERSION_CODE < KERNEL_VERSION(3, 8, 0))
 	pcfg80211_wdinfo->remain_on_ch_type = channel_type;
@@ -5669,9 +6673,6 @@ exit:
 
 inline int rtw_cfg80211_iface_has_p2p_group_cap(_adapter *adapter)
 {
-	struct wiphy *wiphy = adapter_to_wiphy(adapter);
-	struct rtw_wdev_priv *wdev_data = adapter_wdev_data(adapter);
-
 #if RTW_P2P_GROUP_INTERFACE
 	if (is_primary_adapter(adapter))
 		return 0;
@@ -5868,15 +6869,18 @@ static int _cfg80211_rtw_mgmt_tx(_adapter *padapter, u8 tx_ch, u8 no_cck, const
 	int ret = _FAIL;
 	bool ack = _TRUE;
 	struct rtw_ieee80211_hdr *pwlanhdr;
+#if defined(RTW_ROCH_BACK_OP) && defined(CONFIG_P2P) && defined(CONFIG_CONCURRENT_MODE)
 	struct rtw_wdev_priv *pwdev_priv = adapter_wdev_data(padapter);
+#endif
 	struct xmit_priv	*pxmitpriv = &(padapter->xmitpriv);
-	struct mlme_priv *pmlmepriv = &(padapter->mlmepriv);
 	struct mlme_ext_priv	*pmlmeext = &(padapter->mlmeextpriv);
 	u8 u_ch = rtw_mi_get_union_chan(padapter);
 	u8 leave_op = 0;
 #ifdef CONFIG_P2P
 	struct cfg80211_wifidirect_info *pcfg80211_wdinfo = &padapter->cfg80211_wdinfo;
+	#ifdef CONFIG_CONCURRENT_MODE
 	struct wifidirect_info *pwdinfo = &padapter->wdinfo;
+	#endif
 #endif
 
 	rtw_cfg80211_set_is_mgmt_tx(padapter, 1);
@@ -5981,7 +6985,8 @@ issue_mgmt_frame:
 		} else {
 
 #ifdef CONFIG_XMIT_ACK
-			rtw_msleep_os(50);
+			if (!MLME_IS_MESH(padapter)) /* TODO: remove this sleep for all mode */
+				rtw_msleep_os(50);
 #endif
 #ifdef CONFIG_DEBUG_CFG80211
 			RTW_INFO("%s, ack=%d, ok!\n", __func__, ack);
@@ -6075,12 +7080,9 @@ static int cfg80211_rtw_mgmt_tx(struct wiphy *wiphy,
 {
 #if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 14, 0)) || defined(COMPAT_KERNEL_RELEASE)
 	struct ieee80211_channel *chan = params->chan;
-	bool offchan = params->offchan;
-	unsigned int wait = params->wait;
 	const u8 *buf = params->buf;
 	size_t len = params->len;
 	bool no_cck = params->no_cck;
-	bool dont_wait_for_ack = params->dont_wait_for_ack;
 #endif
 #if (LINUX_VERSION_CODE < KERNEL_VERSION(3, 2, 0))
 	bool no_cck = 0;
@@ -6088,6 +7090,8 @@ static int cfg80211_rtw_mgmt_tx(struct wiphy *wiphy,
 	int ret = 0;
 	u8 tx_ret;
 	int wait_ack = 1;
+	const u8 *dump_buf = buf;
+	size_t dump_len = len;
 	u32 dump_limit = RTW_MAX_MGMT_TX_CNT;
 	u32 dump_cnt = 0;
 	u32 sleep_ms = 0;
@@ -6185,6 +7189,15 @@ static int cfg80211_rtw_mgmt_tx(struct wiphy *wiphy,
 		wait_ack = 0;
 		goto dump;
 	}
+#ifdef CONFIG_RTW_MESH
+	else if (frame_styp == RTW_IEEE80211_STYPE_AUTH) {
+		RTW_INFO("RTW_Tx:tx_ch=%d, no_cck=%u, da="MAC_FMT"\n", tx_ch, no_cck, MAC_ARG(GetAddr1Ptr(buf)));
+		if (!rtw_sae_check_frames(padapter, buf, len, _TRUE))
+			RTW_INFO("RTW_Tx:AUTH\n");
+		dump_limit = 1;
+		goto dump;
+	}
+#endif
 
 	if (rtw_action_frame_parse(buf, len, &category, &action) == _FALSE) {
 		RTW_INFO(FUNC_ADPT_FMT" frame_control:0x%02x\n", FUNC_ADPT_ARG(padapter),
@@ -6201,6 +7214,15 @@ static int cfg80211_rtw_mgmt_tx(struct wiphy *wiphy,
 		goto dump;
 	}
 #endif
+#ifdef CONFIG_RTW_MESH
+	if (MLME_IS_MESH(padapter)) {
+		type = rtw_mesh_check_frames_tx(padapter, &dump_buf, &dump_len);
+		if (type >= 0) {
+			dump_limit = 1;
+			goto dump;
+		}
+	}
+#endif
 	if (category == RTW_WLAN_CATEGORY_PUBLIC) {
 		RTW_INFO("RTW_Tx:%s\n", action_public_str(action));
 		switch (action) {
@@ -6231,7 +7253,7 @@ dump:
 
 		rtw_mi_set_scan_deny(padapter, 1000);
 		rtw_mi_scan_abort(padapter, _TRUE);
-		tx_ret = rtw_mgnt_tx_cmd(padapter, tx_ch, no_cck, buf, len, wait_ack, RTW_CMDF_WAIT_ACK);
+		tx_ret = rtw_mgnt_tx_cmd(padapter, tx_ch, no_cck, dump_buf, dump_len, wait_ack, RTW_CMDF_WAIT_ACK);
 		if (tx_ret == _SUCCESS
 			|| (dump_cnt >= dump_limit && rtw_get_passing_time_ms(start) >= retry_guarantee_ms))
 			break;
@@ -6273,6 +7295,7 @@ dump:
 			if (pwdev_priv->invit_info.flags & BIT(0)
 				&& pwdev_priv->invit_info.status == 0
 			) {
+				rtw_clear_scan_deny(padapter);
 				RTW_INFO(FUNC_ADPT_FMT" agree with invitation of persistent group\n",
 					FUNC_ADPT_ARG(padapter));
 				#if !RTW_P2P_GROUP_INTERFACE
@@ -6287,6 +7310,9 @@ dump:
 
 cancel_ps_deny:
 	rtw_ps_deny_cancel(padapter, PS_DENY_MGNT_TX);
+
+	if (dump_buf != buf)
+		rtw_mfree((u8 *)dump_buf, dump_len);
 exit:
 	return ret;
 }
@@ -6520,6 +7546,987 @@ static int cfg80211_rtw_tdls_oper(struct wiphy *wiphy,
 }
 #endif /* CONFIG_TDLS */
 
+#if defined(CONFIG_RTW_MESH) && (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 38))
+
+#if DBG_RTW_CFG80211_MESH_CONF
+#define LEGACY_RATES_STR_LEN (RTW_G_RATES_NUM * 5 + 1)
+int get_legacy_rates_str(struct wiphy *wiphy, enum nl80211_band band, u32 mask, char *buf)
+{
+	int i;
+	int cnt = 0;
+
+	for (i = 0; i < wiphy->bands[band]->n_bitrates; i++) {
+		if (mask & BIT(i)) {
+			cnt += snprintf(buf + cnt, LEGACY_RATES_STR_LEN - cnt -1, "%d.%d "
+				, wiphy->bands[band]->bitrates[i].bitrate / 10
+				, wiphy->bands[band]->bitrates[i].bitrate % 10);
+			if (cnt >= LEGACY_RATES_STR_LEN - 1)
+				break;
+		}
+	}
+
+	return cnt;
+}
+
+void dump_mesh_setup(void *sel, struct wiphy *wiphy, const struct mesh_setup *setup)
+{
+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 6, 0))
+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 8, 0))
+	struct cfg80211_chan_def *chdef = (struct cfg80211_chan_def *)(&setup->chandef);
+#endif
+	struct ieee80211_channel *chan;
+#endif
+
+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 8, 0))
+	chan = (struct ieee80211_channel *)chdef->chan;
+#elif (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 6, 0))
+	chan = (struct ieee80211_channel *)setup->channel;
+#endif
+
+	RTW_PRINT_SEL(sel, "mesh_id:\"%s\", len:%u\n", setup->mesh_id, setup->mesh_id_len);
+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 5, 0))
+	RTW_PRINT_SEL(sel, "sync_method:%u\n", setup->sync_method);
+#endif
+	RTW_PRINT_SEL(sel, "path_sel_proto:%u, path_metric:%u\n", setup->path_sel_proto, setup->path_metric);
+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 11, 0))
+	RTW_PRINT_SEL(sel, "auth_id:%u\n", setup->auth_id);
+#endif
+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 0, 0))
+	if (setup->ie && setup->ie_len) {
+		RTW_PRINT_SEL(sel, "ie:%p, len:%u\n", setup->ie, setup->ie_len);
+		dump_ies(RTW_DBGDUMP, setup->ie, setup->ie_len);
+	}
+#else
+	if (setup->vendor_ie && setup->vendor_ie_len) {
+		RTW_PRINT_SEL(sel, "ie:%p, len:%u\n", setup->vendor_ie, setup->vendor_ie_len);
+		dump_ies(RTW_DBGDUMP, setup->vendor_ie, setup->vendor_ie_len);
+	}
+#endif
+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 0, 0))
+	RTW_PRINT_SEL(sel, "is_authenticated:%d, is_secure:%d\n", setup->is_authenticated, setup->is_secure);
+#endif
+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 10, 0))
+	RTW_PRINT_SEL(sel, "user_mpm:%d\n", setup->user_mpm);
+#endif
+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 9, 0))
+	RTW_PRINT_SEL(sel, "dtim_period:%u, beacon_interval:%u\n", setup->dtim_period, setup->beacon_interval);
+#endif
+
+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 6, 0))
+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 8, 0))
+	RTW_PRINT_SEL(sel, "center_freq:%u, ch:%u, width:%s, cfreq1:%u, cfreq2:%u\n"
+		, chan->center_freq, chan->hw_value, nl80211_chan_width_str(chdef->width), chdef->center_freq1, chdef->center_freq2);
+#else
+	RTW_PRINT_SEL(sel, "center_freq:%u, ch:%u, channel_type:%s\n"
+		, chan->center_freq, chan->hw_value, nl80211_channel_type_str(setup->channel_type));
+#endif
+#endif
+
+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 3, 0))
+	if (setup->mcast_rate[chan->band]) {
+		RTW_PRINT_SEL(sel, "mcast_rate:%d.%d\n"
+			, wiphy->bands[chan->band]->bitrates[setup->mcast_rate[chan->band] - 1].bitrate / 10
+			, wiphy->bands[chan->band]->bitrates[setup->mcast_rate[chan->band] - 1].bitrate % 10
+		);
+	}
+#endif
+
+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 11, 0))
+	if (setup->basic_rates) {
+		char buf[LEGACY_RATES_STR_LEN] = {0};
+
+		get_legacy_rates_str(wiphy, chan->band, setup->basic_rates, buf);
+		RTW_PRINT_SEL(sel, "basic_rates:%s\n", buf);
+	}
+#endif
+
+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(4, 9, 0))
+	if (setup->beacon_rate.control[chan->band].legacy) {
+		char buf[LEGACY_RATES_STR_LEN] = {0};
+
+		get_legacy_rates_str(wiphy, chan->band, setup->beacon_rate.control[chan->band].legacy, buf);
+		RTW_PRINT_SEL(sel, "beacon_rate.legacy:%s\n", buf);
+	}
+	if (*((u32 *)&(setup->beacon_rate.control[chan->band].ht_mcs[0]))
+		|| *((u32 *)&(setup->beacon_rate.control[chan->band].ht_mcs[4]))
+		|| *((u16 *)&(setup->beacon_rate.control[chan->band].ht_mcs[8]))
+	) {
+		RTW_PRINT_SEL(sel, "beacon_rate.ht_mcs:"HT_RX_MCS_BMP_FMT"\n"
+			, HT_RX_MCS_BMP_ARG(setup->beacon_rate.control[chan->band].ht_mcs));
+	}
+
+	if (setup->beacon_rate.control[chan->band].vht_mcs[0]
+		|| setup->beacon_rate.control[chan->band].vht_mcs[1]
+		|| setup->beacon_rate.control[chan->band].vht_mcs[2]
+		|| setup->beacon_rate.control[chan->band].vht_mcs[3]
+	) {
+		int i;
+
+		for (i = 0; i < 4; i++) {/* parsing up to 4SS */
+			u16 mcs_mask = setup->beacon_rate.control[chan->band].vht_mcs[i];
+
+			RTW_PRINT_SEL(sel, "beacon_rate.vht_mcs[%d]:%s\n", i
+				, mcs_mask == 0x00FF ? "0~7" : mcs_mask == 0x01FF ? "0~8" : mcs_mask == 0x03FF ? "0~9" : "invalid");
+		}
+	}
+
+	if (setup->beacon_rate.control[chan->band].gi) {
+		RTW_PRINT_SEL(sel, "beacon_rate.gi:%s\n"
+			, setup->beacon_rate.control[chan->band].gi == NL80211_TXRATE_FORCE_SGI ? "SGI" :
+				setup->beacon_rate.control[chan->band].gi == NL80211_TXRATE_FORCE_LGI ? "LGI" : "invalid"
+		);
+	}
+#endif
+}
+
+void dump_mesh_config(void *sel, const struct mesh_config *conf)
+{
+	RTW_PRINT_SEL(sel, "dot11MeshRetryTimeout:%u\n", conf->dot11MeshRetryTimeout);
+	RTW_PRINT_SEL(sel, "dot11MeshConfirmTimeout:%u\n", conf->dot11MeshConfirmTimeout);
+	RTW_PRINT_SEL(sel, "dot11MeshHoldingTimeout:%u\n", conf->dot11MeshHoldingTimeout);
+	RTW_PRINT_SEL(sel, "dot11MeshMaxPeerLinks:%u\n", conf->dot11MeshMaxPeerLinks);
+	RTW_PRINT_SEL(sel, "dot11MeshMaxRetries:%u\n", conf->dot11MeshMaxRetries);
+	RTW_PRINT_SEL(sel, "dot11MeshTTL:%u\n", conf->dot11MeshTTL);
+	RTW_PRINT_SEL(sel, "element_ttl:%u\n", conf->element_ttl);
+	RTW_PRINT_SEL(sel, "auto_open_plinks:%d\n", conf->auto_open_plinks);
+
+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 5, 0))
+	RTW_PRINT_SEL(sel, "dot11MeshNbrOffsetMaxNeighbor:%u\n", conf->dot11MeshNbrOffsetMaxNeighbor);
+#endif
+
+	RTW_PRINT_SEL(sel, "dot11MeshHWMPmaxPREQretries:%u\n", conf->dot11MeshHWMPmaxPREQretries);
+	RTW_PRINT_SEL(sel, "path_refresh_time:%u\n", conf->path_refresh_time);
+	RTW_PRINT_SEL(sel, "min_discovery_timeout:%u\n", conf->min_discovery_timeout);
+	RTW_PRINT_SEL(sel, "dot11MeshHWMPactivePathTimeout:%u\n", conf->dot11MeshHWMPactivePathTimeout);
+	RTW_PRINT_SEL(sel, "dot11MeshHWMPpreqMinInterval:%u\n", conf->dot11MeshHWMPpreqMinInterval);	
+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 3, 0))
+	RTW_PRINT_SEL(sel, "dot11MeshHWMPperrMinInterval:%u\n", conf->dot11MeshHWMPperrMinInterval);
+#endif
+	RTW_PRINT_SEL(sel, "dot11MeshHWMPnetDiameterTraversalTime:%u\n", conf->dot11MeshHWMPnetDiameterTraversalTime);
+	RTW_PRINT_SEL(sel, "dot11MeshHWMPRootMode:%u\n", conf->dot11MeshHWMPRootMode);
+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 2, 0))
+	RTW_PRINT_SEL(sel, "dot11MeshHWMPRannInterval:%u\n", conf->dot11MeshHWMPRannInterval);
+	RTW_PRINT_SEL(sel, "dot11MeshGateAnnouncementProtocol:%d\n", conf->dot11MeshGateAnnouncementProtocol);
+#endif
+
+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 4, 0))
+	RTW_PRINT_SEL(sel, "dot11MeshForwarding:%d\n", conf->dot11MeshForwarding);
+	RTW_PRINT_SEL(sel, "rssi_threshold:%d\n", conf->rssi_threshold);
+#endif
+	
+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 5, 0))
+	RTW_PRINT_SEL(sel, "ht_opmode:0x%04x\n", conf->ht_opmode);
+#endif
+	
+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 6, 0))
+	RTW_PRINT_SEL(sel, "dot11MeshHWMPactivePathToRootTimeout:%u\n", conf->dot11MeshHWMPactivePathToRootTimeout);
+	RTW_PRINT_SEL(sel, "dot11MeshHWMProotInterval:%u\n", conf->dot11MeshHWMProotInterval);
+	RTW_PRINT_SEL(sel, "dot11MeshHWMPconfirmationInterval:%u\n", conf->dot11MeshHWMPconfirmationInterval);
+#endif
+
+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 9, 0))
+	RTW_PRINT_SEL(sel, "power_mode:%s\n", nl80211_mesh_power_mode_str(conf->power_mode));
+	RTW_PRINT_SEL(sel, "dot11MeshAwakeWindowDuration:%u\n", conf->dot11MeshAwakeWindowDuration);
+#endif
+	
+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 11, 0))
+	RTW_PRINT_SEL(sel, "plink_timeout:%u\n", conf->plink_timeout);
+#endif
+}
+#endif /* DBG_RTW_CFG80211_MESH_CONF */
+
+static void rtw_cfg80211_mesh_info_set_profile(struct rtw_mesh_info *minfo, const struct mesh_setup *setup)
+{
+	_rtw_memcpy(minfo->mesh_id, setup->mesh_id, setup->mesh_id_len);
+	minfo->mesh_id_len = setup->mesh_id_len;
+	minfo->mesh_pp_id = setup->path_sel_proto;
+	minfo->mesh_pm_id = setup->path_metric;
+	minfo->mesh_cc_id = 0;
+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 5, 0))
+	minfo->mesh_sp_id = setup->sync_method;
+#endif
+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 11, 0))
+	minfo->mesh_auth_id = setup->auth_id;
+#else
+	if (setup->is_authenticated) {
+		u8 *rsn_ie;
+		sint rsn_ie_len;
+		struct rsne_info info;
+		u8 *akm;
+		u8 AKM_SUITE_SAE[4] = {0x00, 0x0F, 0xAC, 0x08};
+
+		rsn_ie = rtw_get_ie(setup->ie, WLAN_EID_RSN, &rsn_ie_len, setup->ie_len);
+		if (!rsn_ie || !rsn_ie_len) {
+			rtw_warn_on(1);
+			return;
+		}
+
+		if (rtw_rsne_info_parse(rsn_ie, rsn_ie_len + 2, &info) != _SUCCESS) {
+			rtw_warn_on(1);
+			return;
+		}
+
+		if (!info.akm_list || !info.akm_cnt) {
+			rtw_warn_on(1);
+			return;
+		}
+
+		akm = info.akm_list;
+		while (akm < info.akm_list + info.akm_cnt * 4) {
+			if (_rtw_memcmp(akm, AKM_SUITE_SAE, 4) == _TRUE) {
+				minfo->mesh_auth_id = 0x01;
+				break;
+			}
+		}
+
+		if (!minfo->mesh_auth_id) {
+			rtw_warn_on(1);
+			return;
+		}
+	}
+#endif
+}
+
+static inline bool chk_mesh_attr(enum nl80211_meshconf_params parm, u32 mask)
+{
+	return (mask >> (parm - 1)) & 0x1;
+}
+
+static void rtw_cfg80211_mesh_cfg_set(_adapter *adapter, const struct mesh_config *conf, u32 mask)
+{
+	struct rtw_mesh_cfg *mcfg = &adapter->mesh_cfg;
+
+#if 0 /* driver MPM */
+	if (chk_mesh_attr(NL80211_MESHCONF_RETRY_TIMEOUT, mask));
+	if (chk_mesh_attr(NL80211_MESHCONF_CONFIRM_TIMEOUT, mask));
+	if (chk_mesh_attr(NL80211_MESHCONF_HOLDING_TIMEOUT, mask));
+	if (chk_mesh_attr(NL80211_MESHCONF_MAX_PEER_LINKS, mask));
+	if (chk_mesh_attr(NL80211_MESHCONF_MAX_RETRIES, mask));
+#endif
+
+	if (chk_mesh_attr(NL80211_MESHCONF_TTL, mask))
+		mcfg->dot11MeshTTL = conf->dot11MeshTTL;
+	if (chk_mesh_attr(NL80211_MESHCONF_ELEMENT_TTL, mask))
+		mcfg->element_ttl = conf->element_ttl;
+
+#if 0 /* driver MPM */
+	if (chk_mesh_attr(NL80211_MESHCONF_AUTO_OPEN_PLINKS, mask));
+#endif
+
+#if 0 /* TBD: synchronization */
+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 5, 0))
+	if (chk_mesh_attr(NL80211_MESHCONF_SYNC_OFFSET_MAX_NEIGHBOR, mask));
+#endif
+#endif
+
+	if (chk_mesh_attr(NL80211_MESHCONF_HWMP_MAX_PREQ_RETRIES, mask))
+		mcfg->dot11MeshHWMPmaxPREQretries = conf->dot11MeshHWMPmaxPREQretries;
+	if (chk_mesh_attr(NL80211_MESHCONF_PATH_REFRESH_TIME, mask))
+		mcfg->path_refresh_time = conf->path_refresh_time;
+	if (chk_mesh_attr(NL80211_MESHCONF_MIN_DISCOVERY_TIMEOUT, mask))
+		mcfg->min_discovery_timeout = conf->min_discovery_timeout;
+	if (chk_mesh_attr(NL80211_MESHCONF_HWMP_ACTIVE_PATH_TIMEOUT, mask))
+		mcfg->dot11MeshHWMPactivePathTimeout = conf->dot11MeshHWMPactivePathTimeout;
+	if (chk_mesh_attr(NL80211_MESHCONF_HWMP_PREQ_MIN_INTERVAL, mask))
+		mcfg->dot11MeshHWMPpreqMinInterval = conf->dot11MeshHWMPpreqMinInterval;
+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 3, 0))
+	if (chk_mesh_attr(NL80211_MESHCONF_HWMP_PERR_MIN_INTERVAL, mask))
+		mcfg->dot11MeshHWMPperrMinInterval = conf->dot11MeshHWMPperrMinInterval;
+#endif
+	if (chk_mesh_attr(NL80211_MESHCONF_HWMP_NET_DIAM_TRVS_TIME, mask))
+		mcfg->dot11MeshHWMPnetDiameterTraversalTime = conf->dot11MeshHWMPnetDiameterTraversalTime;
+
+	if (chk_mesh_attr(NL80211_MESHCONF_HWMP_ROOTMODE, mask))
+		mcfg->dot11MeshHWMPRootMode = conf->dot11MeshHWMPRootMode;
+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 2, 0))
+	if (chk_mesh_attr(NL80211_MESHCONF_GATE_ANNOUNCEMENTS, mask))
+		mcfg->dot11MeshGateAnnouncementProtocol = conf->dot11MeshGateAnnouncementProtocol;
+	/* our current gate annc implementation rides on root annc with gate annc bit in PREQ flags */
+	if (mcfg->dot11MeshGateAnnouncementProtocol
+		&& mcfg->dot11MeshHWMPRootMode <= RTW_IEEE80211_ROOTMODE_ROOT
+	) {
+		mcfg->dot11MeshHWMPRootMode = RTW_IEEE80211_PROACTIVE_RANN;
+		RTW_INFO(ADPT_FMT" enable PROACTIVE_RANN becaue gate annc is needed\n", ADPT_ARG(adapter));
+	}
+	if (chk_mesh_attr(NL80211_MESHCONF_HWMP_RANN_INTERVAL, mask))
+		mcfg->dot11MeshHWMPRannInterval = conf->dot11MeshHWMPRannInterval;
+#endif
+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 4, 0))
+	if (chk_mesh_attr(NL80211_MESHCONF_FORWARDING, mask))
+		mcfg->dot11MeshForwarding = conf->dot11MeshForwarding;
+
+	if (chk_mesh_attr(NL80211_MESHCONF_RSSI_THRESHOLD, mask))
+		mcfg->rssi_threshold = conf->rssi_threshold;
+#endif
+
+#if 0 /* controlled by driver */
+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 5, 0))
+	if (chk_mesh_attr(NL80211_MESHCONF_HT_OPMODE, mask));
+#endif
+#endif
+	
+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 6, 0))
+	if (chk_mesh_attr(NL80211_MESHCONF_HWMP_PATH_TO_ROOT_TIMEOUT, mask))
+		mcfg->dot11MeshHWMPactivePathToRootTimeout = conf->dot11MeshHWMPactivePathToRootTimeout;
+	if (chk_mesh_attr(NL80211_MESHCONF_HWMP_ROOT_INTERVAL, mask))
+		mcfg->dot11MeshHWMProotInterval = conf->dot11MeshHWMProotInterval;
+	if (chk_mesh_attr(NL80211_MESHCONF_HWMP_CONFIRMATION_INTERVAL, mask))
+		mcfg->dot11MeshHWMPconfirmationInterval = conf->dot11MeshHWMPconfirmationInterval;	
+#endif
+
+#if 0 /* TBD */
+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 9, 0))
+	if (chk_mesh_attr(NL80211_MESHCONF_POWER_MODE, mask));
+	if (chk_mesh_attr(NL80211_MESHCONF_AWAKE_WINDOW, mask));
+#endif
+#endif
+
+#if 0 /* driver MPM */
+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 11, 0))
+	if (chk_mesh_attr(NL80211_MESHCONF_PLINK_TIMEOUT, mask));
+#endif
+#endif
+}
+
+u8 *rtw_cfg80211_construct_mesh_beacon_ies(struct wiphy *wiphy, _adapter *adapter
+	, const struct mesh_config *conf, const struct mesh_setup *setup
+	, uint *ies_len)
+{
+	struct rtw_mesh_info *minfo = &adapter->mesh_info;
+	struct rtw_mesh_cfg *mcfg = &adapter->mesh_cfg;
+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 6, 0))
+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 8, 0))
+	struct cfg80211_chan_def *chdef = (struct cfg80211_chan_def *)(&setup->chandef);
+#endif
+	struct ieee80211_channel *chan;
+	u8 ch, bw, offset;
+#endif
+	uint len;
+	u8 n_bitrates;
+	u8 ht = 0;
+	u8 vht = 0;
+	u8 *rsn_ie = NULL;
+	sint rsn_ie_len = 0;
+	u8 *ies = NULL, *c;
+	u8 supported_rates[RTW_G_RATES_NUM] = {0};
+	int i;
+
+	*ies_len = 0;
+
+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 8, 0))
+	chan = (struct ieee80211_channel *)chdef->chan;
+#elif (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 6, 0))
+	chan = (struct ieee80211_channel *)setup->channel;
+#endif
+
+	n_bitrates = wiphy->bands[chan->band]->n_bitrates;
+
+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 6, 0))
+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 8, 0))
+	rtw_get_chbw_from_cfg80211_chan_def(chdef, &ht, &ch, &bw, &offset);
+#else
+	rtw_get_chbw_from_nl80211_channel_type(chan, setup->channel_type, &ht, &ch, &bw, &offset);
+#endif
+	if (!ch)
+		goto exit;
+	
+#if defined(CONFIG_80211AC_VHT) && (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 6, 0))
+	vht = ht && ch > 14 && bw >= CHANNEL_WIDTH_80; /* VHT40/VHT20? */
+#endif
+
+	RTW_INFO(FUNC_ADPT_FMT" => ch:%u,%u,%u, ht:%u, vht:%u\n"
+		, FUNC_ADPT_ARG(adapter), ch, bw, offset, ht, vht);
+#endif
+
+	rsn_ie = rtw_get_ie(setup->ie, WLAN_EID_RSN, &rsn_ie_len, setup->ie_len);
+	if (rsn_ie && !rsn_ie_len) {
+		rtw_warn_on(1);
+		rsn_ie = NULL;
+	}
+
+	len = _BEACON_IE_OFFSET_
+		+ 2 /* 0-length SSID */
+		+ (n_bitrates >= 8 ? 8 : n_bitrates) + 2 /* Supported Rates */
+		+ 3 /* DS parameter set */
+		+ 6 /* TIM  */
+		+ (n_bitrates > 8 ? n_bitrates - 8 + 2 : 0) /* Extended Supported Rates */
+		+ (rsn_ie ? rsn_ie_len + 2 : 0) /* RSN */
+		#if defined(CONFIG_80211N_HT)
+		+ (ht ? HT_CAP_IE_LEN + 2 + HT_OP_IE_LEN + 2 : 0) /* HT */
+		#endif
+		#if defined(CONFIG_80211AC_VHT) && (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 6, 0))
+		+ (vht ? VHT_CAP_IE_LEN + 2 + VHT_OP_IE_LEN + 2 : 0) /* VHT */
+		#endif
+		+ minfo->mesh_id_len + 2 /* Mesh ID */
+		+ 9 /* Mesh configuration */
+		;
+
+	ies = rtw_zmalloc(len);
+	if (!ies)
+		goto exit;
+
+	/* timestamp */
+	c = ies + 8;
+
+	/* beacon interval */
+	RTW_PUT_LE16(c , setup->beacon_interval);
+	c += 2;
+
+	/* capability */
+	if (rsn_ie)
+		*((u16 *)c) |= cpu_to_le16(cap_Privacy);
+	c += 2;
+
+	/* SSID */
+	c = rtw_set_ie(c, WLAN_EID_SSID, 0, NULL, NULL);
+
+	/* Supported Rates */
+	for (i = 0; i < n_bitrates; i++) {
+		supported_rates[i] = wiphy->bands[chan->band]->bitrates[i].bitrate / 5;
+		#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 11, 0))
+		if (setup->basic_rates & BIT(i))
+		#else
+		if (rtw_is_basic_rate_mix(supported_rates[i]))
+		#endif
+			supported_rates[i] |= IEEE80211_BASIC_RATE_MASK;
+	}
+	c = rtw_set_ie(c, WLAN_EID_SUPP_RATES, (n_bitrates >= 8 ? 8 : n_bitrates), supported_rates, NULL);
+
+	/* DS parameter set */
+	c = rtw_set_ie(c, WLAN_EID_DS_PARAMS, 1, &ch, NULL);
+
+	/* TIM */
+	*c = WLAN_EID_TIM;
+	*(c + 1) = 4;
+	c += 6;
+	//c = rtw_set_ie(c, _TIM_IE_, 4, NULL, NULL);
+
+	/* Extended Supported Rates */
+	if (n_bitrates > 8)
+		c = rtw_set_ie(c, WLAN_EID_EXT_SUPP_RATES, n_bitrates - 8, supported_rates + 8, NULL);
+
+	/* RSN */
+	if (rsn_ie)
+		c = rtw_set_ie(c, WLAN_EID_RSN, rsn_ie_len, rsn_ie + 2, NULL);
+
+#if defined(CONFIG_80211N_HT)
+	if (ht) {
+		struct ieee80211_sta_ht_cap *sta_ht_cap = &wiphy->bands[chan->band]->ht_cap;
+		u8 ht_cap[HT_CAP_IE_LEN];
+		u8 ht_op[HT_OP_IE_LEN];
+
+		_rtw_memset(ht_cap, 0, HT_CAP_IE_LEN);
+		_rtw_memset(ht_op, 0, HT_OP_IE_LEN);
+
+		/* WLAN_EID_HT_CAP */
+		RTW_PUT_LE16(HT_CAP_ELE_CAP_INFO(ht_cap), sta_ht_cap->cap);
+		SET_HT_CAP_ELE_MAX_AMPDU_LEN_EXP(ht_cap, sta_ht_cap->ampdu_factor);
+		SET_HT_CAP_ELE_MIN_MPDU_S_SPACE(ht_cap, sta_ht_cap->ampdu_density);
+		_rtw_memcpy(HT_CAP_ELE_SUP_MCS_SET(ht_cap), &sta_ht_cap->mcs, 16);
+		c = rtw_set_ie(c, WLAN_EID_HT_CAP, HT_CAP_IE_LEN, ht_cap, NULL);
+
+		/* WLAN_EID_HT_OPERATION */
+		SET_HT_OP_ELE_PRI_CHL(ht_op, ch);
+		switch (offset) {
+		case HAL_PRIME_CHNL_OFFSET_LOWER:
+			SET_HT_OP_ELE_2ND_CHL_OFFSET(ht_op, SCA);
+			break;
+		case HAL_PRIME_CHNL_OFFSET_UPPER:
+			SET_HT_OP_ELE_2ND_CHL_OFFSET(ht_op, SCB);
+			break;
+		case HAL_PRIME_CHNL_OFFSET_DONT_CARE:
+		default:
+			SET_HT_OP_ELE_2ND_CHL_OFFSET(ht_op, SCN);
+			break;
+		}
+		if (bw >= CHANNEL_WIDTH_40)
+			SET_HT_OP_ELE_STA_CHL_WIDTH(ht_op, 1);
+		else
+			SET_HT_OP_ELE_STA_CHL_WIDTH(ht_op, 0);
+		c = rtw_set_ie(c, WLAN_EID_HT_OPERATION, HT_OP_IE_LEN, ht_op, NULL);
+	}
+#endif /* defined(CONFIG_80211N_HT) */
+
+#if defined(CONFIG_80211AC_VHT) && (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 6, 0))
+	if (vht) {
+		struct ieee80211_sta_vht_cap *sta_vht_cap = &wiphy->bands[chan->band]->vht_cap;
+		u8 vht_cap[VHT_CAP_IE_LEN];
+		u8 vht_op[VHT_OP_IE_LEN];
+		u8 cch = rtw_get_center_ch(ch, bw, offset);
+
+		_rtw_memset(vht_op, 0, VHT_OP_IE_LEN);
+
+		/* WLAN_EID_VHT_CAPABILITY */
+		_rtw_memcpy(vht_cap, &sta_vht_cap->cap, 4);
+		_rtw_memcpy(vht_cap + 4, &sta_vht_cap->vht_mcs, 8);
+		c = rtw_set_ie(c, WLAN_EID_VHT_CAPABILITY, VHT_CAP_IE_LEN, vht_cap, NULL);
+
+		/* WLAN_EID_VHT_OPERATION */
+		if (bw < CHANNEL_WIDTH_80) {
+			SET_VHT_OPERATION_ELE_CHL_WIDTH(vht_op, 0);
+			SET_VHT_OPERATION_ELE_CHL_CENTER_FREQ1(vht_op, 0);
+			SET_VHT_OPERATION_ELE_CHL_CENTER_FREQ2(vht_op, 0);
+		} else if (bw == CHANNEL_WIDTH_80) {
+			SET_VHT_OPERATION_ELE_CHL_WIDTH(vht_op, 1);
+			SET_VHT_OPERATION_ELE_CHL_CENTER_FREQ1(vht_op, cch);
+			SET_VHT_OPERATION_ELE_CHL_CENTER_FREQ2(vht_op, 0);
+		} else {
+			RTW_ERR(FUNC_ADPT_FMT" unsupported BW:%u\n", FUNC_ADPT_ARG(adapter), bw);
+			rtw_warn_on(1);
+			rtw_mfree(ies, len);
+			goto exit;
+		}
+
+		/* Hard code 1 stream, MCS0-7 is a min Basic VHT MCS rates */
+		vht_op[3] = 0xfc;
+		vht_op[4] = 0xff;
+		c = rtw_set_ie(c, WLAN_EID_VHT_OPERATION, VHT_OP_IE_LEN, vht_op, NULL);
+	}
+#endif /* defined(CONFIG_80211AC_VHT) && (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 6, 0)) */
+
+	/* Mesh ID */
+	c = rtw_set_ie_mesh_id(c, NULL, minfo->mesh_id, minfo->mesh_id_len);
+
+	/* Mesh configuration */
+	c = rtw_set_ie_mesh_config(c, NULL
+		, minfo->mesh_pp_id
+		, minfo->mesh_pm_id
+		, minfo->mesh_cc_id
+		, minfo->mesh_sp_id
+		, minfo->mesh_auth_id
+		, 0, 0, 0
+		, 1
+		, 0, 0
+		, mcfg->dot11MeshForwarding
+		, 0, 0, 0
+	);
+
+#if DBG_RTW_CFG80211_MESH_CONF
+	RTW_INFO(FUNC_ADPT_FMT" ies_len:%u\n", FUNC_ADPT_ARG(adapter), len);
+	dump_ies(RTW_DBGDUMP, ies + _BEACON_IE_OFFSET_, len - _BEACON_IE_OFFSET_);
+#endif
+
+exit:
+	if (ies)
+		*ies_len = len;
+	return ies;
+}
+
+static int cfg80211_rtw_get_mesh_config(struct wiphy *wiphy, struct net_device *dev
+	, struct mesh_config *conf)
+{
+	_adapter *adapter = (_adapter *)rtw_netdev_priv(dev);
+	struct rtw_mesh_cfg *mesh_cfg = &adapter->mesh_cfg;
+	int ret = 0;
+
+	RTW_INFO(FUNC_ADPT_FMT"\n", FUNC_ADPT_ARG(adapter));
+
+	/* driver MPM */
+	conf->dot11MeshRetryTimeout = 0;
+	conf->dot11MeshConfirmTimeout = 0;
+	conf->dot11MeshHoldingTimeout = 0;
+	conf->dot11MeshMaxPeerLinks = mesh_cfg->max_peer_links;
+	conf->dot11MeshMaxRetries = 0;
+
+	conf->dot11MeshTTL = mesh_cfg->dot11MeshTTL;
+	conf->element_ttl = mesh_cfg->element_ttl;
+
+	/* driver MPM */
+	conf->auto_open_plinks = 0;
+
+	/* TBD: synchronization */
+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 5, 0))
+	conf->dot11MeshNbrOffsetMaxNeighbor = 0;
+#endif
+
+	conf->dot11MeshHWMPmaxPREQretries = mesh_cfg->dot11MeshHWMPmaxPREQretries;
+	conf->path_refresh_time = mesh_cfg->path_refresh_time;
+	conf->min_discovery_timeout = mesh_cfg->min_discovery_timeout;
+	conf->dot11MeshHWMPactivePathTimeout = mesh_cfg->dot11MeshHWMPactivePathTimeout;
+	conf->dot11MeshHWMPpreqMinInterval = mesh_cfg->dot11MeshHWMPpreqMinInterval;
+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 3, 0))
+	conf->dot11MeshHWMPperrMinInterval = mesh_cfg->dot11MeshHWMPperrMinInterval;
+#endif
+	conf->dot11MeshHWMPnetDiameterTraversalTime = mesh_cfg->dot11MeshHWMPnetDiameterTraversalTime;
+	conf->dot11MeshHWMPRootMode = mesh_cfg->dot11MeshHWMPRootMode;
+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 2, 0))
+	conf->dot11MeshHWMPRannInterval = mesh_cfg->dot11MeshHWMPRannInterval;
+#endif
+	conf->dot11MeshGateAnnouncementProtocol = mesh_cfg->dot11MeshGateAnnouncementProtocol;
+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 4, 0))
+	conf->dot11MeshForwarding = mesh_cfg->dot11MeshForwarding;
+	conf->rssi_threshold = mesh_cfg->rssi_threshold;
+#endif
+
+	/* TBD */
+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 5, 0))
+	conf->ht_opmode = 0xffff;
+#endif
+
+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 6, 0))
+	conf->dot11MeshHWMPactivePathToRootTimeout = mesh_cfg->dot11MeshHWMPactivePathToRootTimeout;
+	conf->dot11MeshHWMProotInterval = mesh_cfg->dot11MeshHWMProotInterval;
+	conf->dot11MeshHWMPconfirmationInterval = mesh_cfg->dot11MeshHWMPconfirmationInterval;
+#endif
+
+	/* TBD: power save */
+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 9, 0))
+	conf->power_mode = NL80211_MESH_POWER_ACTIVE;
+	conf->dot11MeshAwakeWindowDuration = 0;
+#endif
+
+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 11, 0))
+	conf->plink_timeout = mesh_cfg->plink_timeout;
+#endif
+
+	return ret;
+}
+
+static void rtw_mbss_info_change_notify(_adapter *adapter, bool minfo_changed, bool need_work)
+{
+	if (need_work)
+		rtw_mesh_work(&adapter->mesh_work);
+}
+
+static int cfg80211_rtw_update_mesh_config(struct wiphy *wiphy, struct net_device *dev
+	, u32 mask, const struct mesh_config *nconf)
+{
+	_adapter *adapter = (_adapter *)rtw_netdev_priv(dev);
+	int ret = 0;
+	bool minfo_changed = _FALSE, need_work = _FALSE;
+
+	RTW_INFO(FUNC_ADPT_FMT" mask:0x%08x\n", FUNC_ADPT_ARG(adapter), mask);
+
+	rtw_cfg80211_mesh_cfg_set(adapter, nconf, mask);
+	update_beacon(adapter, WLAN_EID_MESH_CONFIG, NULL, _TRUE);
+#if CONFIG_RTW_MESH_CTO_MGATE_CARRIER
+	if (rtw_mesh_cto_mgate_required(adapter))
+		rtw_netif_carrier_off(adapter->pnetdev);
+	else
+		rtw_netif_carrier_on(adapter->pnetdev);
+#endif
+	need_work = rtw_ieee80211_mesh_root_setup(adapter);
+
+	rtw_mbss_info_change_notify(adapter, minfo_changed, need_work);
+
+	return ret;
+}
+
+static int cfg80211_rtw_join_mesh(struct wiphy *wiphy, struct net_device *dev,
+	const struct mesh_config *conf, const struct mesh_setup *setup)
+{
+	_adapter *adapter = (_adapter *)rtw_netdev_priv(dev);
+	u8 *ies = NULL;
+	uint ies_len;
+	int ret = 0;
+
+	RTW_INFO(FUNC_ADPT_FMT"\n", FUNC_ADPT_ARG(adapter));
+
+#if DBG_RTW_CFG80211_MESH_CONF
+	RTW_INFO(FUNC_ADPT_FMT" mesh_setup:\n", FUNC_ADPT_ARG(adapter));
+	dump_mesh_setup(RTW_DBGDUMP, wiphy, setup);
+	RTW_INFO(FUNC_ADPT_FMT" mesh_config:\n", FUNC_ADPT_ARG(adapter));
+	dump_mesh_config(RTW_DBGDUMP, conf);
+#endif
+
+	if (rtw_cfg80211_sync_iftype(adapter) != _SUCCESS) {
+		ret = -ENOTSUPP;
+		goto exit;
+	}
+
+	/* initialization */
+	rtw_mesh_init_mesh_info(adapter);
+
+	/* apply cfg80211 settings*/
+	rtw_cfg80211_mesh_info_set_profile(&adapter->mesh_info, setup);
+	rtw_cfg80211_mesh_cfg_set(adapter, conf, 0xFFFFFFFF);
+
+	/* apply cfg80211 settings (join only) */
+	rtw_mesh_cfg_init_max_peer_links(adapter, conf->dot11MeshMaxPeerLinks);
+	#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 11, 0))
+	rtw_mesh_cfg_init_plink_timeout(adapter, conf->plink_timeout);
+	#endif
+
+	rtw_ieee80211_mesh_root_setup(adapter);
+
+	ies = rtw_cfg80211_construct_mesh_beacon_ies(wiphy, adapter, conf, setup, &ies_len);
+	if (!ies) {
+		ret = -EINVAL;
+		goto exit;
+	}
+
+	/* start mbss */
+	if (rtw_check_beacon_data(adapter, ies,  ies_len) != _SUCCESS) {
+		ret = -EINVAL;
+		goto exit;
+	}
+	
+	rtw_mesh_work(&adapter->mesh_work);
+
+exit:
+	if (ies)
+		rtw_mfree(ies, ies_len);
+	if (ret)
+		rtw_mesh_deinit_mesh_info(adapter);
+
+	return ret;
+}
+
+static int cfg80211_rtw_leave_mesh(struct wiphy *wiphy, struct net_device *dev)
+{
+	_adapter *adapter = (_adapter *)rtw_netdev_priv(dev);
+	int ret = 0;
+
+	RTW_INFO(FUNC_ADPT_FMT"\n", FUNC_ADPT_ARG(adapter));
+
+	rtw_mesh_deinit_mesh_info(adapter);
+
+	rtw_set_802_11_infrastructure_mode(adapter, Ndis802_11Infrastructure);
+	rtw_setopmode_cmd(adapter, Ndis802_11Infrastructure, RTW_CMDF_WAIT_ACK);
+
+	return ret;
+}
+
+static int cfg80211_rtw_add_mpath(struct wiphy *wiphy, struct net_device *dev
+	#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 16, 0))
+	, const u8 *dst, const u8 *next_hop
+	#else
+	, u8 *dst, u8 *next_hop
+	#endif
+)
+{
+	_adapter *adapter = (_adapter *)rtw_netdev_priv(dev);
+	struct sta_priv *stapriv = &adapter->stapriv;
+	struct sta_info *sta;
+	struct rtw_mesh_path *mpath;
+	int ret = 0;
+
+	rtw_rcu_read_lock();
+
+	sta = rtw_get_stainfo(stapriv, next_hop);
+	if (!sta) {
+		ret = -ENOENT;
+		goto exit;
+	}
+
+	mpath = rtw_mesh_path_add(adapter, dst);
+	if (!mpath) {
+		ret = -ENOENT;
+		goto exit;
+	}
+
+	rtw_mesh_path_fix_nexthop(mpath, sta);
+
+exit:
+	rtw_rcu_read_unlock();
+
+	return ret;
+}
+
+static int cfg80211_rtw_del_mpath(struct wiphy *wiphy, struct net_device *dev
+	#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 16, 0))
+	, const u8 *dst
+	#else
+	, u8 *dst
+	#endif
+)
+{
+	_adapter *adapter = (_adapter *)rtw_netdev_priv(dev);
+	int ret = 0;
+
+	if (dst) {
+		if (rtw_mesh_path_del(adapter, dst)) {
+			ret = -ENOENT;
+			goto exit;
+		}
+	} else {
+		rtw_mesh_path_flush_by_iface(adapter);
+	}	
+
+exit:
+	return ret;
+}
+
+static int cfg80211_rtw_change_mpath(struct wiphy *wiphy, struct net_device *dev
+	#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 16, 0))
+	, const u8 *dst, const u8 *next_hop
+	#else
+	, u8 *dst, u8 *next_hop
+	#endif
+)
+{
+	_adapter *adapter = (_adapter *)rtw_netdev_priv(dev);
+	struct sta_priv *stapriv = &adapter->stapriv;
+	struct sta_info *sta;
+	struct rtw_mesh_path *mpath;
+	int ret = 0;
+
+	rtw_rcu_read_lock();
+
+	sta = rtw_get_stainfo(stapriv, next_hop);
+	if (!sta) {
+		ret = -ENOENT;
+		goto exit;
+	}
+
+	mpath = rtw_mesh_path_lookup(adapter, dst);
+	if (!mpath) {
+		ret = -ENOENT;
+		goto exit;
+	}
+
+	rtw_mesh_path_fix_nexthop(mpath, sta);
+
+exit:
+	rtw_rcu_read_unlock();
+
+	return ret;
+}
+
+static void rtw_cfg80211_mpath_set_pinfo(struct rtw_mesh_path *mpath, u8 *next_hop, struct mpath_info *pinfo)
+{
+	struct sta_info *next_hop_sta = rtw_rcu_dereference(mpath->next_hop);
+
+	if (next_hop_sta)
+		_rtw_memcpy(next_hop, next_hop_sta->cmn.mac_addr, ETH_ALEN);
+	else
+		_rtw_memset(next_hop, 0, ETH_ALEN);
+
+	_rtw_memset(pinfo, 0, sizeof(*pinfo));
+
+	pinfo->generation = mpath->adapter->mesh_info.mesh_paths_generation;
+
+	pinfo->filled = 0
+		| MPATH_INFO_FRAME_QLEN
+		| MPATH_INFO_SN
+		| MPATH_INFO_METRIC
+		| MPATH_INFO_EXPTIME
+		| MPATH_INFO_DISCOVERY_TIMEOUT
+		| MPATH_INFO_DISCOVERY_RETRIES
+		| MPATH_INFO_FLAGS
+		;
+
+	pinfo->frame_qlen = mpath->frame_queue_len;
+	pinfo->sn = mpath->sn;
+	pinfo->metric = mpath->metric;
+	if (rtw_time_after(mpath->exp_time, rtw_get_current_time()))
+		pinfo->exptime = rtw_get_remaining_time_ms(mpath->exp_time);
+	pinfo->discovery_timeout = rtw_systime_to_ms(mpath->discovery_timeout);
+	pinfo->discovery_retries = mpath->discovery_retries;
+	if (mpath->flags & RTW_MESH_PATH_ACTIVE)
+		pinfo->flags |= NL80211_MPATH_FLAG_ACTIVE;
+	if (mpath->flags & RTW_MESH_PATH_RESOLVING)
+		pinfo->flags |= NL80211_MPATH_FLAG_RESOLVING;
+	if (mpath->flags & RTW_MESH_PATH_SN_VALID)
+		pinfo->flags |= NL80211_MPATH_FLAG_SN_VALID;
+	if (mpath->flags & RTW_MESH_PATH_FIXED)
+		pinfo->flags |= NL80211_MPATH_FLAG_FIXED;
+	if (mpath->flags & RTW_MESH_PATH_RESOLVED)
+		pinfo->flags |= NL80211_MPATH_FLAG_RESOLVED;
+}
+
+static int cfg80211_rtw_get_mpath(struct wiphy *wiphy, struct net_device *dev, u8 *dst, u8 *next_hop, struct mpath_info *pinfo)
+{
+	_adapter *adapter = (_adapter *)rtw_netdev_priv(dev);
+	struct rtw_mesh_path *mpath;
+	int ret = 0;
+
+	rtw_rcu_read_lock();
+
+	mpath = rtw_mesh_path_lookup(adapter, dst);
+	if (!mpath) {
+		ret = -ENOENT;
+		goto exit;
+	}
+
+	rtw_cfg80211_mpath_set_pinfo(mpath, next_hop, pinfo);
+
+exit:
+	rtw_rcu_read_unlock();
+
+	return ret;
+}
+
+static int cfg80211_rtw_dump_mpath(struct wiphy *wiphy, struct net_device *dev, int idx, u8 *dst, u8 *next_hop, struct mpath_info *pinfo)
+{
+	_adapter *adapter = (_adapter *)rtw_netdev_priv(dev);
+	struct rtw_mesh_path *mpath;
+	int ret = 0;
+
+	rtw_rcu_read_lock();
+
+	mpath = rtw_mesh_path_lookup_by_idx(adapter, idx);
+	if (!mpath) {
+		ret = -ENOENT;
+		goto exit;
+	}
+
+	_rtw_memcpy(dst, mpath->dst, ETH_ALEN);
+	rtw_cfg80211_mpath_set_pinfo(mpath, next_hop, pinfo);
+
+exit:
+	rtw_rcu_read_unlock();
+
+	return ret;
+}
+
+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 19, 0))
+static void rtw_cfg80211_mpp_set_pinfo(struct rtw_mesh_path *mpath, u8 *mpp, struct mpath_info *pinfo)
+{
+	_rtw_memcpy(mpp, mpath->mpp, ETH_ALEN);
+
+	_rtw_memset(pinfo, 0, sizeof(*pinfo));
+	pinfo->generation = mpath->adapter->mesh_info.mpp_paths_generation;
+}
+
+static int cfg80211_rtw_get_mpp(struct wiphy *wiphy, struct net_device *dev, u8 *dst, u8 *mpp, struct mpath_info *pinfo)
+{
+	_adapter *adapter = (_adapter *)rtw_netdev_priv(dev);
+	struct rtw_mesh_path *mpath;
+	int ret = 0;
+
+	rtw_rcu_read_lock();
+
+	mpath = rtw_mpp_path_lookup(adapter, dst);
+	if (!mpath) {
+		ret = -ENOENT;
+		goto exit;
+	}
+
+	rtw_cfg80211_mpp_set_pinfo(mpath, mpp, pinfo);
+
+exit:
+	rtw_rcu_read_unlock();
+
+	return ret;
+}
+
+static int cfg80211_rtw_dump_mpp(struct wiphy *wiphy, struct net_device *dev, int idx, u8 *dst, u8 *mpp, struct mpath_info *pinfo)
+{
+	_adapter *adapter = (_adapter *)rtw_netdev_priv(dev);
+	struct rtw_mesh_path *mpath;
+	int ret = 0;
+
+	rtw_rcu_read_lock();
+
+	mpath = rtw_mpp_path_lookup_by_idx(adapter, idx);
+	if (!mpath) {
+		ret = -ENOENT;
+		goto exit;
+	}
+
+	_rtw_memcpy(dst, mpath->dst, ETH_ALEN);
+	rtw_cfg80211_mpp_set_pinfo(mpath, mpp, pinfo);
+
+exit:
+	rtw_rcu_read_unlock();
+
+	return ret;
+}
+#endif /* (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 19, 0)) */
+
+#endif /* defined(CONFIG_RTW_MESH) */
+
 #if defined(CONFIG_PNO_SUPPORT) && (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 0, 0))
 static int cfg80211_rtw_sched_scan_start(struct wiphy *wiphy,
 		struct net_device *dev,
@@ -6551,7 +8558,12 @@ static int cfg80211_rtw_sched_scan_start(struct wiphy *wiphy,
 		return -EINVAL;
 	}
 #if LINUX_VERSION_CODE >= KERNEL_VERSION(3, 2, 0)
+
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(4, 4, 0)
+	interval = request->scan_plans->interval;
+#else
 	interval = request->interval;
+#endif
 	n_ssids = request->n_match_sets;
 	ssids = (struct cfg80211_ssid *)rtw_zmalloc(n_ssids * sizeof(struct cfg80211_ssid));
 	if(ssids == NULL) {
@@ -6621,11 +8633,9 @@ int	cfg80211_rtw_resume(struct wiphy *wiphy) {
 		for (i=0;i<pwrpriv->pnlo_info->ssid_num && i < RTW_SSID_SCAN_AMOUNT; i++) {
 			len = pwrpriv->pno_ssid_list->node[i].SSID_len;
 			_rtw_memcpy(&parm.ssid[i].Ssid, pwrpriv->pno_ssid_list->node[i].SSID, len);
-			parm->ssid[i].SsidLength = len;
+			parm.ssid[i].SsidLength = len;
 		}
-		prm->ssid_num = pwrpriv->pnlo_info->ssid_num;
-
-		rtw_lock_ext_suspend_timeout(10000);
+		parm.ssid_num = pwrpriv->pnlo_info->ssid_num;
 
 		_enter_critical_bh(&pmlmepriv->lock, &irqL);
 		//This modification fix PNO wakeup reconnect issue with hidden SSID AP.
@@ -7060,10 +9070,14 @@ static void rtw_cfg80211_init_ht_capab_ex(_adapter *padapter
 static void rtw_cfg80211_init_ht_capab(_adapter *padapter
 	, struct ieee80211_sta_ht_cap *ht_cap, BAND_TYPE band, u8 rf_type)
 {
+	struct registry_priv *regsty = &padapter->registrypriv;
 	struct hal_spec_t *hal_spec = GET_HAL_SPEC(padapter);
 	u8 rx_nss = 0;
 
-	ht_cap->ht_supported = _TRUE;
+	if (!regsty->ht_enable || !is_supported_ht(regsty->wireless_mode))
+		return;
+
+	ht_cap->ht_supported = 1;
 
 	ht_cap->cap = IEEE80211_HT_CAP_SUP_WIDTH_20_40 |
 				IEEE80211_HT_CAP_SGI_40 | IEEE80211_HT_CAP_SGI_20 |
@@ -7114,6 +9128,26 @@ static void rtw_cfg80211_init_ht_capab(_adapter *padapter
 }
 #endif /* CONFIG_80211N_HT */
 
+#if defined(CONFIG_80211AC_VHT) && (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 6, 0))
+static void rtw_cfg80211_init_vht_capab(_adapter *padapter
+	, struct ieee80211_sta_vht_cap *sta_vht_cap, BAND_TYPE band, u8 rf_type)
+{
+	struct registry_priv *regsty = &padapter->registrypriv;
+	u8 vht_cap_ie[2 + 12] = {0};
+
+	if (!REGSTY_IS_11AC_ENABLE(regsty) || !is_supported_vht(regsty->wireless_mode))
+		return;
+
+	rtw_vht_use_default_setting(padapter);
+	rtw_build_vht_cap_ie(padapter, vht_cap_ie);
+
+	sta_vht_cap->vht_supported = 1;
+
+	_rtw_memcpy(&sta_vht_cap->cap, vht_cap_ie + 2, 4);
+	_rtw_memcpy(&sta_vht_cap->vht_mcs, vht_cap_ie + 2 + 4, 8);
+}
+#endif /* defined(CONFIG_80211AC_VHT) && (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 6, 0)) */
+
 void rtw_cfg80211_init_wdev_data(_adapter *padapter)
 {
 #ifdef CONFIG_CONCURRENT_MODE
@@ -7149,11 +9183,12 @@ void rtw_cfg80211_init_wiphy(_adapter *padapter)
 			#if defined(CONFIG_80211N_HT)
 			rtw_cfg80211_init_ht_capab(padapter, &band->ht_cap, BAND_ON_5G, rf_type);
 			#endif
+			#if defined(CONFIG_80211AC_VHT) && (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 6, 0))
+			rtw_cfg80211_init_vht_capab(padapter, &band->vht_cap, BAND_ON_5G, rf_type);
+			#endif
 		}
 	}
 #endif
-	/* init regulary domain */
-	rtw_regd_init(padapter);
 
 	/* copy mac_addr to wiphy */
 	_rtw_memcpy(wiphy->perm_addr, adapter_mac_addr(padapter), ETH_ALEN);
@@ -7182,7 +9217,13 @@ struct ieee80211_iface_limit rtw_limits[] = {
 	{
 		.max = 1,
 		.types = BIT(NL80211_IFTYPE_P2P_DEVICE)
-	}
+	},
+	#endif
+	#if defined(CONFIG_RTW_MESH)
+	{
+		.max = 1,
+		.types = BIT(NL80211_IFTYPE_MESH_POINT)
+	},
 	#endif
 };
 
@@ -7234,8 +9275,18 @@ static void rtw_cfg80211_preinit_wiphy(_adapter *adapter, struct wiphy *wiphy)
 								| BIT(NL80211_IFTYPE_P2P_DEVICE)
 								#endif
 #endif
+#ifdef CONFIG_RTW_MESH
+								| BIT(NL80211_IFTYPE_MESH_POINT) /* 2.6.26 */
+#endif
 								;
 
+#if defined(CONFIG_ANDROID) && !defined(RTW_SINGLE_WIPHY)
+        if (is_primary_adapter(adapter)) {
+                wiphy->interface_modes &= ~(BIT(NL80211_IFTYPE_P2P_GO) | BIT(NL80211_IFTYPE_P2P_CLIENT));
+                RTW_INFO("%s primary- don't set p2p capability\n", __func__);
+        }
+#endif
+
 #if (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 37)) || defined(COMPAT_KERNEL_RELEASE)
 #ifdef CONFIG_AP_MODE
 	wiphy->mgmt_stypes = rtw_cfg80211_default_mgmt_stypes;
@@ -7310,6 +9361,25 @@ static void rtw_cfg80211_preinit_wiphy(_adapter *adapter, struct wiphy *wiphy)
 #if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 2, 0))
 	/* wiphy->flags |= WIPHY_FLAG_SUPPORTS_FW_ROAM; */
 #endif
+
+#ifdef CONFIG_RTW_MESH
+	wiphy->flags |= 0
+		#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 37))
+		| WIPHY_FLAG_IBSS_RSN
+		#endif
+		#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 0, 0))
+		| WIPHY_FLAG_MESH_AUTH
+		#endif
+		;
+
+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 3, 0))
+	wiphy->features |= 0
+		#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 10, 0))
+		| NL80211_FEATURE_USERSPACE_MPM
+		#endif
+		;
+#endif /* (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 3, 0)) */
+#endif /* CONFIG_RTW_MESH */
 }
 
 #ifdef CONFIG_RFKILL_POLL
@@ -7532,6 +9602,9 @@ static struct cfg80211_ops rtw_cfg80211_ops = {
 	.change_station = cfg80211_rtw_change_station,
 	.dump_station = cfg80211_rtw_dump_station,
 	.change_bss = cfg80211_rtw_change_bss,
+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 29))
+	.set_txq_params = cfg80211_rtw_set_txq_params,
+#endif
 #if (LINUX_VERSION_CODE < KERNEL_VERSION(3, 6, 0))
 	.set_channel = cfg80211_rtw_set_channel,
 #endif
@@ -7539,6 +9612,22 @@ static struct cfg80211_ops rtw_cfg80211_ops = {
 	/* .assoc = cfg80211_rtw_assoc,	 */
 #endif /* CONFIG_AP_MODE */
 
+#if defined(CONFIG_RTW_MESH) && (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 38))
+	.get_mesh_config = cfg80211_rtw_get_mesh_config,
+	.update_mesh_config = cfg80211_rtw_update_mesh_config,
+	.join_mesh = cfg80211_rtw_join_mesh,
+	.leave_mesh = cfg80211_rtw_leave_mesh,
+	.add_mpath = cfg80211_rtw_add_mpath,
+	.del_mpath = cfg80211_rtw_del_mpath,
+	.change_mpath = cfg80211_rtw_change_mpath,
+	.get_mpath = cfg80211_rtw_get_mpath,
+	.dump_mpath = cfg80211_rtw_dump_mpath,
+	#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 19, 0))
+	.get_mpp = cfg80211_rtw_get_mpp,
+	.dump_mpp = cfg80211_rtw_dump_mpp,
+	#endif
+#endif
+
 #if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 6, 0))
 	.set_monitor_channel = cfg80211_rtw_set_monitor_channel,
 #endif
@@ -7637,6 +9726,8 @@ int rtw_wiphy_register(struct wiphy *wiphy)
 	rtw_cfgvendor_attach(wiphy);
 #endif
 
+	rtw_regd_init(wiphy);
+
 	return wiphy_register(wiphy);
 }
 
@@ -7673,11 +9764,7 @@ int rtw_wdev_alloc(_adapter *padapter, struct wiphy *wiphy)
 	}
 	wdev->wiphy = wiphy;
 	wdev->netdev = pnetdev;
-
-	wdev->iftype = NL80211_IFTYPE_STATION;	/* will be init in rtw_hal_init() */
-											/* Must sync with _rtw_init_mlme_priv() */
-											/* pmlmepriv->fw_state = WIFI_STATION_STATE */
-	/* wdev->iftype = NL80211_IFTYPE_MONITOR; */ /* for rtw_setopmode_cmd() in cfg80211_rtw_change_iface() */
+	wdev->iftype = NL80211_IFTYPE_STATION;
 	padapter->rtw_wdev = wdev;
 	pnetdev->ieee80211_ptr = wdev;
 
@@ -7711,6 +9798,13 @@ int rtw_wdev_alloc(_adapter *padapter, struct wiphy *wiphy)
 	ATOMIC_SET(&pwdev_priv->switch_ch_to, 1);
 #endif
 
+#ifdef CONFIG_RTW_CFGVEDNOR_RSSIMONITOR
+        pwdev_priv->rssi_monitor_enable = 0;
+        pwdev_priv->rssi_monitor_max = 0;
+        pwdev_priv->rssi_monitor_min = 0;
+#endif
+
+
 exit:
 	return ret;
 }
diff --git a/rtl8723DS/os_dep/linux/ioctl_cfg80211.h b/rtl8723DS/os_dep/linux/ioctl_cfg80211.h
index c17bbe5..d16cfdd 100755..100644
--- a/rtl8723DS/os_dep/linux/ioctl_cfg80211.h
+++ b/rtl8723DS/os_dep/linux/ioctl_cfg80211.h
@@ -15,11 +15,14 @@
 #ifndef __IOCTL_CFG80211_H__
 #define __IOCTL_CFG80211_H__
 
-#ifndef RTW_CFG80211_ALWAYS_INFORM_STA_DISCONNECT_EVENT
+#define RTW_CFG80211_BLOCK_DISCON_WHEN_CONNECT		BIT0
+#define RTW_CFG80211_BLOCK_DISCON_WHEN_DISCONNECT	BIT1
+
+#ifndef RTW_CFG80211_BLOCK_STA_DISCON_EVENT
 #if (LINUX_VERSION_CODE >= KERNEL_VERSION(4, 2, 0))
-#define RTW_CFG80211_ALWAYS_INFORM_STA_DISCONNECT_EVENT 1
+#define RTW_CFG80211_BLOCK_STA_DISCON_EVENT (RTW_CFG80211_BLOCK_DISCON_WHEN_CONNECT)
 #else
-#define RTW_CFG80211_ALWAYS_INFORM_STA_DISCONNECT_EVENT 0
+#define RTW_CFG80211_BLOCK_STA_DISCON_EVENT (RTW_CFG80211_BLOCK_DISCON_WHEN_CONNECT | RTW_CFG80211_BLOCK_DISCON_WHEN_DISCONNECT)
 #endif
 #endif
 
@@ -70,6 +73,12 @@
 	#error "RTW_DEDICATED_P2P_DEVICE can't be enabled when kernel < 3.7.0\n"
 #endif
 
+#ifdef CONFIG_RTW_MESH
+	#if (LINUX_VERSION_CODE < KERNEL_VERSION(3, 10, 0))
+		#error "CONFIG_RTW_MESH can't be enabled when kernel < 3.10.0\n"
+	#endif
+#endif
+
 struct rtw_wdev_invit_info {
 	u8 state; /* 0: req, 1:rep */
 	u8 peer_mac[ETH_ALEN];
@@ -133,7 +142,7 @@ struct rtw_wdev_priv {
 
 	_adapter *padapter;
 
-	#if !RTW_CFG80211_ALWAYS_INFORM_STA_DISCONNECT_EVENT
+	#if RTW_CFG80211_BLOCK_STA_DISCON_EVENT
 	u8 not_indic_disco;
 	#endif
 
@@ -171,16 +180,27 @@ struct rtw_wdev_priv {
 	ATOMIC_T switch_ch_to;
 #endif
 
+#ifdef CONFIG_RTW_CFGVENDOR_RANDOM_MAC_OUI
+	u8 pno_mac_addr[ETH_ALEN];
+	u16 pno_scan_seq_num;
+#endif
+
+#ifdef CONFIG_RTW_CFGVEDNOR_RSSIMONITOR
+        s8 rssi_monitor_max;
+        s8 rssi_monitor_min;
+        u8 rssi_monitor_enable;
+#endif
+
 };
 
 bool rtw_cfg80211_is_connect_requested(_adapter *adapter);
 
-#if RTW_CFG80211_ALWAYS_INFORM_STA_DISCONNECT_EVENT
-#define rtw_wdev_not_indic_disco(rtw_wdev_data) 0
-#define rtw_wdev_set_not_indic_disco(rtw_wdev_data, val) do {} while (0)
-#else
+#if RTW_CFG80211_BLOCK_STA_DISCON_EVENT
 #define rtw_wdev_not_indic_disco(rtw_wdev_data) ((rtw_wdev_data)->not_indic_disco)
 #define rtw_wdev_set_not_indic_disco(rtw_wdev_data, val) do { (rtw_wdev_data)->not_indic_disco = (val); } while (0)
+#else
+#define rtw_wdev_not_indic_disco(rtw_wdev_data) 0
+#define rtw_wdev_set_not_indic_disco(rtw_wdev_data, val) do {} while (0)
 #endif
 
 #define rtw_wdev_free_connect_req(rtw_wdev_data) \
@@ -268,12 +288,15 @@ void rtw_cfg80211_indicate_scan_done_for_buddy(_adapter *padapter, bool bscan_ab
 
 #ifdef CONFIG_AP_MODE
 void rtw_cfg80211_indicate_sta_assoc(_adapter *padapter, u8 *pmgmt_frame, uint frame_len);
-void rtw_cfg80211_indicate_sta_disassoc(_adapter *padapter, unsigned char *da, unsigned short reason);
+void rtw_cfg80211_indicate_sta_disassoc(_adapter *padapter, const u8 *da, unsigned short reason);
 #endif /* CONFIG_AP_MODE */
 
 #ifdef CONFIG_P2P
 void rtw_cfg80211_set_is_roch(_adapter *adapter, bool val);
 bool rtw_cfg80211_get_is_roch(_adapter *adapter);
+bool rtw_cfg80211_is_ro_ch_once(_adapter *adapter);
+void rtw_cfg80211_set_last_ro_ch_time(_adapter *adapter);
+s32 rtw_cfg80211_get_last_ro_ch_passing_ms(_adapter *adapter);
 
 int rtw_cfg80211_iface_has_p2p_group_cap(_adapter *adapter);
 int rtw_cfg80211_is_p2p_scan(_adapter *adapter);
@@ -294,6 +317,7 @@ void rtw_cfg80211_issue_p2p_provision_request(_adapter *padapter, const u8 *buf,
 void rtw_cfg80211_rx_p2p_action_public(_adapter *padapter, union recv_frame *rframe);
 void rtw_cfg80211_rx_action_p2p(_adapter *padapter, union recv_frame *rframe);
 void rtw_cfg80211_rx_action(_adapter *adapter, union recv_frame *rframe, const char *msg);
+void rtw_cfg80211_rx_mframe(_adapter *adapter, union recv_frame *rframe, const char *msg);
 void rtw_cfg80211_rx_probe_request(_adapter *padapter, union recv_frame *rframe);
 
 int rtw_cfg80211_set_mgnt_wpsp2pie(struct net_device *net, char *buf, int len, int type);
@@ -345,7 +369,7 @@ void rtw_cfg80211_deinit_rfkill(struct wiphy *wiphy);
 
 #define rtw_cfg80211_connect_result(wdev, bssid, req_ie, req_ie_len, resp_ie, resp_ie_len, status, gfp) cfg80211_connect_result(wdev_to_ndev(wdev), bssid, req_ie, req_ie_len, resp_ie, resp_ie_len, status, gfp)
 
-#if (LINUX_VERSION_CODE < KERNEL_VERSION(4, 2, 0)) && !defined(CONFIG_PLATFORM_INTEL_CHT_ANDROID60)
+#if (LINUX_VERSION_CODE < KERNEL_VERSION(4, 2, 0))
 #define rtw_cfg80211_disconnected(wdev, reason, ie, ie_len, locally_generated, gfp) cfg80211_disconnected(wdev_to_ndev(wdev), reason, ie, ie_len, gfp)
 #else
 #define rtw_cfg80211_disconnected(wdev, reason, ie, ie_len, locally_generated, gfp) cfg80211_disconnected(wdev_to_ndev(wdev), reason, ie, ie_len, locally_generated, gfp)
@@ -359,6 +383,10 @@ void rtw_cfg80211_deinit_rfkill(struct wiphy *wiphy);
 #endif
 #endif
 
+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 0, 0))
+#define rtw_cfg80211_notify_new_peer_candidate(wdev, addr, ie, ie_len, gfp) cfg80211_notify_new_peer_candidate(wdev_to_ndev(wdev), addr, ie, ie_len, gfp)
+#endif
+
 #if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 5, 0))
 u8 rtw_cfg80211_ch_switch_notify(_adapter *adapter, u8 ch, u8 bw, u8 offset, u8 ht);
 #endif
diff --git a/rtl8723DS/os_dep/linux/ioctl_linux.c b/rtl8723DS/os_dep/linux/ioctl_linux.c
index 5480d70..27215cd 100755..100644
--- a/rtl8723DS/os_dep/linux/ioctl_linux.c
+++ b/rtl8723DS/os_dep/linux/ioctl_linux.c
@@ -37,6 +37,7 @@ extern int rtw_ht_enable;
 #define SCAN_ITEM_SIZE 768
 #define MAX_CUSTOM_LEN 64
 #define RATE_COUNT 4
+#define MAX_SCAN_BUFFER_LEN 65535
 
 #ifdef CONFIG_GLOBAL_UI_PID
 extern int ui_pid[3];
@@ -97,7 +98,7 @@ static int hwaddr_aton_i(const char *txt, u8 *addr)
 
 static void indicate_wx_custom_event(_adapter *padapter, char *msg)
 {
-	u8 *buff, *p;
+	u8 *buff;
 	union iwreq_data wrqu;
 
 	if (strlen(msg) > IW_CUSTOM_MAX) {
@@ -184,7 +185,6 @@ void rtw_request_wps_pbc_event(_adapter *padapter)
 void indicate_wx_scan_complete_event(_adapter *padapter)
 {
 	union iwreq_data wrqu;
-	struct	mlme_priv *pmlmepriv = &padapter->mlmepriv;
 
 	_rtw_memset(&wrqu, 0, sizeof(union iwreq_data));
 
@@ -420,16 +420,22 @@ static inline char *iwe_stream_protocol_process(_adapter *padapter,
 	char *p;
 	u8 ie_offset = (pnetwork->network.Reserved[0] == BSS_TYPE_PROB_REQ ? 0 : 12); /* Probe Request	 */
 
+#ifdef CONFIG_80211N_HT
 	/* parsing HT_CAP_IE	 */
-	p = rtw_get_ie(&pnetwork->network.IEs[ie_offset], _HT_CAPABILITY_IE_, &ht_ielen, pnetwork->network.IELength - ie_offset);
-	if (p && ht_ielen > 0)
-		ht_cap = _TRUE;
+	if(padapter->registrypriv.ht_enable && is_supported_ht(padapter->registrypriv.wireless_mode)) {
+		p = rtw_get_ie(&pnetwork->network.IEs[ie_offset], _HT_CAPABILITY_IE_, &ht_ielen, pnetwork->network.IELength - ie_offset);
+		if (p && ht_ielen > 0)
+			ht_cap = _TRUE;
+	}
+#endif
 
 #ifdef CONFIG_80211AC_VHT
 	/* parsing VHT_CAP_IE */
-	p = rtw_get_ie(&pnetwork->network.IEs[ie_offset], EID_VHTCapability, &vht_ielen, pnetwork->network.IELength - ie_offset);
-	if (p && vht_ielen > 0)
-		vht_cap = _TRUE;
+	if(padapter->registrypriv.wireless_mode & WIRELESS_11AC) {
+		p = rtw_get_ie(&pnetwork->network.IEs[ie_offset], EID_VHTCapability, &vht_ielen, pnetwork->network.IELength - ie_offset);
+		if (p && vht_ielen > 0)
+			vht_cap = _TRUE;
+	}
 #endif
 	/* Add the protocol name */
 	iwe->cmd = SIOCGIWNAME;
@@ -481,33 +487,36 @@ static inline char *iwe_stream_rate_process(_adapter *padapter,
 	u8 ie_offset = (pnetwork->network.Reserved[0] == BSS_TYPE_PROB_REQ ? 0 : 12); /* Probe Request	 */
 
 	/* parsing HT_CAP_IE	 */
-	p = rtw_get_ie(&pnetwork->network.IEs[ie_offset], _HT_CAPABILITY_IE_, &ht_ielen, pnetwork->network.IELength - ie_offset);
-	if (p && ht_ielen > 0) {
-		struct rtw_ieee80211_ht_cap *pht_capie;
-		ht_cap = _TRUE;
-		pht_capie = (struct rtw_ieee80211_ht_cap *)(p + 2);
-		_rtw_memcpy(&mcs_rate , pht_capie->supp_mcs_set, 2);
-		bw_40MHz = (pht_capie->cap_info & IEEE80211_HT_CAP_SUP_WIDTH) ? 1 : 0;
-		short_GI = (pht_capie->cap_info & (IEEE80211_HT_CAP_SGI_20 | IEEE80211_HT_CAP_SGI_40)) ? 1 : 0;
+	if(is_supported_ht(padapter->registrypriv.wireless_mode)) {
+		p = rtw_get_ie(&pnetwork->network.IEs[ie_offset], _HT_CAPABILITY_IE_, &ht_ielen, pnetwork->network.IELength - ie_offset);
+		if (p && ht_ielen > 0) {
+			struct rtw_ieee80211_ht_cap *pht_capie;
+			ht_cap = _TRUE;
+			pht_capie = (struct rtw_ieee80211_ht_cap *)(p + 2);
+			_rtw_memcpy(&mcs_rate , pht_capie->supp_mcs_set, 2);
+			bw_40MHz = (pht_capie->cap_info & IEEE80211_HT_CAP_SUP_WIDTH) ? 1 : 0;
+			short_GI = (pht_capie->cap_info & (IEEE80211_HT_CAP_SGI_20 | IEEE80211_HT_CAP_SGI_40)) ? 1 : 0;
+		}
 	}
-
 #ifdef CONFIG_80211AC_VHT
 	/* parsing VHT_CAP_IE */
-	p = rtw_get_ie(&pnetwork->network.IEs[ie_offset], EID_VHTCapability, &vht_ielen, pnetwork->network.IELength - ie_offset);
-	if (p && vht_ielen > 0) {
-		u8	mcs_map[2];
-
-		vht_cap = _TRUE;
-		bw_160MHz = GET_VHT_CAPABILITY_ELE_CHL_WIDTH(p + 2);
-		if (bw_160MHz)
-			short_GI = GET_VHT_CAPABILITY_ELE_SHORT_GI160M(p + 2);
-		else
-			short_GI = GET_VHT_CAPABILITY_ELE_SHORT_GI80M(p + 2);
+	if(padapter->registrypriv.wireless_mode & WIRELESS_11AC){
+		p = rtw_get_ie(&pnetwork->network.IEs[ie_offset], EID_VHTCapability, &vht_ielen, pnetwork->network.IELength - ie_offset);
+		if (p && vht_ielen > 0) {
+			u8	mcs_map[2];
+
+			vht_cap = _TRUE;
+			bw_160MHz = GET_VHT_CAPABILITY_ELE_CHL_WIDTH(p + 2);
+			if (bw_160MHz)
+				short_GI = GET_VHT_CAPABILITY_ELE_SHORT_GI160M(p + 2);
+			else
+				short_GI = GET_VHT_CAPABILITY_ELE_SHORT_GI80M(p + 2);
 
-		_rtw_memcpy(mcs_map, GET_VHT_CAPABILITY_ELE_TX_MCS(p + 2), 2);
+			_rtw_memcpy(mcs_map, GET_VHT_CAPABILITY_ELE_TX_MCS(p + 2), 2);
 
-		vht_highest_rate = rtw_get_vht_highest_rate(mcs_map);
-		vht_data_rate = rtw_vht_mcs_to_data_rate(CHANNEL_WIDTH_80, short_GI, vht_highest_rate);
+			vht_highest_rate = rtw_get_vht_highest_rate(mcs_map);
+			vht_data_rate = rtw_vht_mcs_to_data_rate(CHANNEL_WIDTH_80, short_GI, vht_highest_rate);
+		}
 	}
 #endif
 
@@ -697,8 +706,10 @@ static inline char   *iwe_stream_rssi_process(_adapter *padapter,
 		char *start, char *stop, struct iw_event *iwe)
 {
 	u8 ss, sq;
-	s16 noise = 0;
 	struct mlme_priv *pmlmepriv = &(padapter->mlmepriv);
+#ifdef CONFIG_BACKGROUND_NOISE_MONITOR
+	s16 noise = 0;
+#endif
 
 	/* Add quality statistics */
 	iwe->cmd = IWEVQUAL;
@@ -726,17 +737,7 @@ static inline char   *iwe_stream_rssi_process(_adapter *padapter,
 #ifdef CONFIG_SIGNAL_DISPLAY_DBM
 	iwe->u.qual.level = (u8) translate_percentage_to_dbm(ss); /* dbm */
 #else
-#ifdef CONFIG_SIGNAL_SCALE_MAPPING
 	iwe->u.qual.level = (u8)ss; /* % */
-#else
-	{
-		/* Do signal scale mapping when using percentage as the unit of signal strength, since the scale mapping is skipped in odm */
-
-		HAL_DATA_TYPE *pHal = GET_HAL_DATA(padapter);
-
-		iwe->u.qual.level = (u8)phydm_signal_scale_mapping(&pHal->odmpriv, ss);
-	}
-#endif
 #endif
 
 	iwe->u.qual.qual = (u8)sq;   /* signal quality */
@@ -769,7 +770,6 @@ static inline char   *iwe_stream_net_rsv_process(_adapter *padapter,
 {
 	u8 buf[32] = {0};
 	u8 *p, *pos;
-	int len;
 	p = buf;
 	pos = pnetwork->network.Reserved;
 
@@ -863,7 +863,7 @@ static int wpa_set_auth_algs(struct net_device *dev, u32 value)
 static int wpa_set_encryption(struct net_device *dev, struct ieee_param *param, u32 param_len)
 {
 	int ret = 0;
-	u32 wep_key_idx, wep_key_len, wep_total_len;
+	u32 wep_key_idx, wep_key_len;
 	_adapter *padapter = (_adapter *)rtw_netdev_priv(dev);
 	struct mlme_priv	*pmlmepriv = &padapter->mlmepriv;
 	struct security_priv *psecuritypriv = &padapter->securitypriv;
@@ -936,6 +936,7 @@ static int wpa_set_encryption(struct net_device *dev, struct ieee_param *param,
 
 		psecuritypriv->key_mask |= BIT(wep_key_idx);
 
+		padapter->mlmeextpriv.mlmext_info.key_index = wep_key_idx;
 		goto exit;
 	}
 
@@ -982,7 +983,7 @@ static int wpa_set_encryption(struct net_device *dev, struct ieee_param *param,
 							_rtw_memcpy(padapter->securitypriv.dot118021XGrprxmickey[param->u.crypt.idx].skey, &(param->u.crypt.key[24]), 8);
 						}
 						padapter->securitypriv.binstallGrpkey = _TRUE;
-						if (param->u.crypt.idx < 4) 
+						if (param->u.crypt.idx < 4)
 							_rtw_memcpy(padapter->securitypriv.iv_seq[param->u.crypt.idx], param->u.crypt.seq, 8);
 						padapter->securitypriv.dot118021XGrpKeyid = param->u.crypt.idx;
 						rtw_set_key(padapter, &padapter->securitypriv, param->u.crypt.idx, 1, _TRUE);
@@ -1005,6 +1006,8 @@ static int wpa_set_encryption(struct net_device *dev, struct ieee_param *param,
 						rtw_p2p_set_state(pwdinfo, P2P_STATE_PROVISIONING_DONE);
 #endif /* CONFIG_P2P */
 
+					/* WPA/WPA2 key-handshake has completed */
+					clr_fwstate(pmlmepriv, WIFI_UNDER_KEY_HANDSHAKE);
 				}
 			}
 
@@ -1038,7 +1041,6 @@ exit:
 static int rtw_set_wpa_ie(_adapter *padapter, char *pie, unsigned short ielen)
 {
 	u8 *buf = NULL, *pos = NULL;
-	u32 left;
 	int group_cipher = 0, pairwise_cipher = 0;
 	u8 mfp_opt = MFP_NO;
 	int ret = 0;
@@ -1201,7 +1203,6 @@ static int rtw_wx_get_name(struct net_device *dev,
 			   union iwreq_data *wrqu, char *extra)
 {
 	_adapter *padapter = (_adapter *)rtw_netdev_priv(dev);
-	u16 cap;
 	u32 ht_ielen = 0;
 	char *p;
 	u8 ht_cap = _FALSE, vht_cap = _FALSE;
@@ -1213,17 +1214,18 @@ static int rtw_wx_get_name(struct net_device *dev,
 
 	if (check_fwstate(pmlmepriv, _FW_LINKED | WIFI_ADHOC_MASTER_STATE) == _TRUE) {
 		/* parsing HT_CAP_IE */
-		p = rtw_get_ie(&pcur_bss->IEs[12], _HT_CAPABILITY_IE_, &ht_ielen, pcur_bss->IELength - 12);
-		if (p && ht_ielen > 0)
-			ht_cap = _TRUE;
-
+		if( is_supported_ht(padapter->registrypriv.wireless_mode)&&(padapter->registrypriv.ht_enable)) {
+			p = rtw_get_ie(&pcur_bss->IEs[12], _HT_CAPABILITY_IE_, &ht_ielen, pcur_bss->IELength - 12);
+			if (p && ht_ielen > 0 )
+				ht_cap = _TRUE;
+		}
 #ifdef CONFIG_80211AC_VHT
-		if (pmlmepriv->vhtpriv.vht_option == _TRUE)
+		if ((padapter->registrypriv.wireless_mode & WIRELESS_11AC) &&
+			(pmlmepriv->vhtpriv.vht_option == _TRUE))
 			vht_cap = _TRUE;
 #endif
 
 		prates = &pcur_bss->SupportedRates;
-
 		if (rtw_is_cckratesonly_included((u8 *)prates) == _TRUE) {
 			if (ht_cap == _TRUE)
 				snprintf(wrqu->name, IFNAMSIZ, "IEEE 802.11bn");
@@ -1232,8 +1234,12 @@ static int rtw_wx_get_name(struct net_device *dev,
 		} else if ((rtw_is_cckrates_included((u8 *)prates)) == _TRUE) {
 			if (ht_cap == _TRUE)
 				snprintf(wrqu->name, IFNAMSIZ, "IEEE 802.11bgn");
-			else
-				snprintf(wrqu->name, IFNAMSIZ, "IEEE 802.11bg");
+			else {
+				if(padapter->registrypriv.wireless_mode & WIRELESS_11G)
+					snprintf(wrqu->name, IFNAMSIZ, "IEEE 802.11bg");
+				else
+					snprintf(wrqu->name, IFNAMSIZ, "IEEE 802.11b");
+			}
 		} else {
 			if (pcur_bss->Configuration.DSConfig > 14) {
 #ifdef CONFIG_80211AC_VHT
@@ -1270,12 +1276,8 @@ static int rtw_wx_set_freq(struct net_device *dev,
 {
 
 	_adapter *padapter = (_adapter *)rtw_netdev_priv(dev);
-	HAL_DATA_TYPE *hal_data = GET_HAL_DATA(padapter);
-	struct	mlme_priv	*pmlmepriv = &(padapter->mlmepriv);
-	struct wlan_network  *cur_network = &(pmlmepriv->cur_network);
 	int exp = 1, freq = 0, div = 0;
 
-
 	rtw_ps_deny(padapter, PS_DENY_IOCTL);
 	if (rtw_pwr_wakeup(padapter) == _FALSE)
 		goto exit;
@@ -1468,7 +1470,6 @@ static int rtw_wx_set_pmkid(struct net_device *dev,
 	_adapter *padapter = (_adapter *)rtw_netdev_priv(dev);
 	u8          j, blInserted = _FALSE;
 	int         intReturn = _FALSE;
-	struct mlme_priv  *pmlmepriv = &padapter->mlmepriv;
 	struct security_priv *psecuritypriv = &padapter->securitypriv;
 	struct iw_pmksa  *pPMK = (struct iw_pmksa *) extra;
 	u8     strZeroMacAddress[ETH_ALEN] = { 0x00 };
@@ -1577,8 +1578,6 @@ static int rtw_wx_get_range(struct net_device *dev,
 	struct iw_range *range = (struct iw_range *)extra;
 	_adapter *padapter = (_adapter *)rtw_netdev_priv(dev);
 	struct rf_ctl_t *rfctl = adapter_to_rfctl(padapter);
-	struct mlme_ext_priv	*pmlmeext = &padapter->mlmeextpriv;
-
 	u16 val;
 	int i;
 
@@ -1619,7 +1618,6 @@ static int rtw_wx_get_range(struct net_device *dev,
 	 * If percentage range is 0~100
 	 * Signal strength dbm range logical is -100 ~ 0
 	 * but usually value is -90 ~ -20
-	 * When CONFIG_SIGNAL_SCALE_MAPPING is defined, dbm range is -95 ~ -45
 	 */
 	range->max_qual.qual = 100;
 #ifdef CONFIG_SIGNAL_DISPLAY_DBM
@@ -1929,18 +1927,53 @@ static int rtw_wx_set_scan(struct net_device *dev, struct iw_request_info *a,
 	u8 _status = _FALSE;
 	int ret = 0;
 	_adapter *padapter = (_adapter *)rtw_netdev_priv(dev);
-	struct mlme_priv *pmlmepriv = &padapter->mlmepriv;
+	/*struct mlme_priv *pmlmepriv = &padapter->mlmepriv;*/
 	struct sitesurvey_parm parm;
-
+	u8 ssc_chk;
 #ifdef CONFIG_P2P
 	struct wifidirect_info *pwdinfo = &(padapter->wdinfo);
 #endif /* CONFIG_P2P */
 
-
 #ifdef DBG_IOCTL
 	RTW_INFO("DBG_IOCTL %s:%d\n", __FUNCTION__, __LINE__);
 #endif
 
+#if 1
+	ssc_chk = rtw_sitesurvey_condition_check(padapter, _FALSE);
+
+	#ifdef CONFIG_DOSCAN_IN_BUSYTRAFFIC
+	if ((ssc_chk != SS_ALLOW) && (ssc_chk != SS_DENY_BUSY_TRAFFIC))
+	#else
+	/* When Busy Traffic, driver do not site survey. So driver return success. */
+	/* wpa_supplicant will not issue SIOCSIWSCAN cmd again after scan timeout. */
+	/* modify by thomas 2011-02-22. */
+	if (ssc_chk != SS_ALLOW)
+	#endif
+	{
+		if (ssc_chk == SS_DENY_MP_MODE)
+			ret = -EPERM;
+		#ifdef DBG_LA_MODE
+		else if (ssc_chk == SS_DENY_LA_MODE)
+			ret = -EPERM;
+		#endif
+		else
+			indicate_wx_scan_complete_event(padapter);
+
+		goto exit;
+	} else
+		RTW_INFO(FUNC_ADPT_FMT"\n", FUNC_ADPT_ARG(padapter));
+
+	rtw_ps_deny(padapter, PS_DENY_SCAN);
+	if (_FAIL == rtw_pwr_wakeup(padapter)) {
+		ret = -1;
+		goto cancel_ps_deny;
+	}
+	if (!rtw_is_adapter_up(padapter)) {
+		ret = -1;
+		goto cancel_ps_deny;
+	}
+#else
+
 #ifdef CONFIG_MP_INCLUDED
 	if (rtw_mp_mode_check(padapter)) {
 		RTW_INFO("MP mode block Scan request\n");
@@ -1999,6 +2032,7 @@ static int rtw_wx_set_scan(struct net_device *dev, struct iw_request_info *a,
 		goto cancel_ps_deny;
 	}
 #endif
+#endif
 
 #ifdef CONFIG_P2P
 	if (pwdinfo->p2p_state != P2P_STATE_NONE) {
@@ -2140,15 +2174,17 @@ static int rtw_wx_get_scan(struct net_device *dev, struct iw_request_info *a,
 	_irqL	irqL;
 	_list					*plist, *phead;
 	_adapter *padapter = (_adapter *)rtw_netdev_priv(dev);
+	struct rf_ctl_t *rfctl = adapter_to_rfctl(padapter);
+	RT_CHANNEL_INFO *chset = rfctl->channel_set;
 	struct	mlme_priv	*pmlmepriv = &(padapter->mlmepriv);
 	_queue				*queue	= &(pmlmepriv->scanned_queue);
 	struct	wlan_network	*pnetwork = NULL;
 	char *ev = extra;
 	char *stop = ev + wrqu->data.length;
 	u32 ret = 0;
-	u32 cnt = 0;
 	u32 wait_for_surveydone;
 	sint wait_status;
+	u8 ch;
 
 #ifdef CONFIG_P2P
 	struct	wifidirect_info	*pwdinfo = &padapter->wdinfo;
@@ -2210,17 +2246,26 @@ static int rtw_wx_get_scan(struct net_device *dev, struct iw_request_info *a,
 			break;
 
 		if ((stop - ev) < SCAN_ITEM_SIZE) {
+			if(wrqu->data.length == MAX_SCAN_BUFFER_LEN){ /*max buffer len defined by iwlist*/
+				ret = 0;
+				RTW_INFO("%s: Scan results incomplete\n", __FUNCTION__);
+				break;
+			}
 			ret = -E2BIG;
 			break;
 		}
 
 		pnetwork = LIST_CONTAINOR(plist, struct wlan_network, list);
+		ch = pnetwork->network.Configuration.DSConfig;
 
 		/* report network only if the current channel set contains the channel to which this network belongs */
-		if (rtw_chset_search_ch(adapter_to_chset(padapter), pnetwork->network.Configuration.DSConfig) >= 0
-		    && rtw_mlme_band_check(padapter, pnetwork->network.Configuration.DSConfig) == _TRUE
-		    && _TRUE == rtw_validate_ssid(&(pnetwork->network.Ssid))
-		   )
+		if (rtw_chset_search_ch(chset, ch) >= 0
+			&& rtw_mlme_band_check(padapter, ch) == _TRUE
+			&& _TRUE == rtw_validate_ssid(&(pnetwork->network.Ssid))
+			&& (!IS_DFS_SLAVE_WITH_RD(rfctl)
+				|| rtw_odm_dfs_domain_unknown(rfctl_to_dvobj(rfctl))
+				|| !rtw_chset_is_ch_non_ocp(chset, ch))
+		)
 			ev = translate_scan(padapter, a, pnetwork, ev, stop);
 
 		plist = get_next(plist);
@@ -2257,7 +2302,6 @@ static int rtw_wx_set_essid(struct net_device *dev,
 	struct mlme_priv *pmlmepriv = &padapter->mlmepriv;
 	_queue *queue = &pmlmepriv->scanned_queue;
 	_list *phead;
-	s8 status = _TRUE;
 	struct wlan_network *pnetwork = NULL;
 	NDIS_802_11_AUTHENTICATION_MODE authmode;
 	NDIS_802_11_SSID ndis_ssid;
@@ -2898,11 +2942,14 @@ static int rtw_wx_set_auth(struct net_device *dev,
 {
 	_adapter *padapter = (_adapter *)rtw_netdev_priv(dev);
 	struct iw_param *param = (struct iw_param *)&(wrqu->param);
-	struct mlme_priv	*pmlmepriv = &padapter->mlmepriv;
-	struct security_priv *psecuritypriv = &padapter->securitypriv;
+#ifdef CONFIG_WAPI_SUPPORT
+#ifndef CONFIG_IOCTL_CFG80211
 	struct mlme_ext_priv	*pmlmeext = &padapter->mlmeextpriv;
 	struct mlme_ext_info	*pmlmeinfo = &(pmlmeext->mlmext_info);
+	struct security_priv *psecuritypriv = &padapter->securitypriv;
 	u32 value = param->value;
+#endif
+#endif
 	int ret = 0;
 
 	switch (param->flags & IW_AUTH_INDEX) {
@@ -2992,10 +3039,10 @@ static int rtw_wx_set_auth(struct net_device *dev,
 		*/
 		if (check_fwstate(&padapter->mlmepriv, _FW_LINKED)) {
 			LeaveAllPowerSaveMode(padapter);
-			rtw_disassoc_cmd(padapter, 500, RTW_CMDF_DIRECTLY);
+			rtw_disassoc_cmd(padapter, 500, RTW_CMDF_WAIT_ACK);
 			RTW_INFO("%s...call rtw_indicate_disconnect\n ", __FUNCTION__);
 			rtw_indicate_disconnect(padapter, 0, _FALSE);
-			rtw_free_assoc_resources(padapter, 1);
+			rtw_free_assoc_resources_cmd(padapter, _TRUE, RTW_CMDF_WAIT_ACK);
 		}
 #endif
 
@@ -3400,7 +3447,6 @@ static int rtw_wx_set_channel_plan(struct net_device *dev,
 				   union iwreq_data *wrqu, char *extra)
 {
 	_adapter *padapter = (_adapter *)rtw_netdev_priv(dev);
-	struct mlme_priv *pmlmepriv = &padapter->mlmepriv;
 	u8 channel_plan_req = (u8)(*((int *)wrqu));
 
 	if (_SUCCESS != rtw_set_channel_plan(padapter, channel_plan_req))
@@ -3659,7 +3705,7 @@ static int rtw_get_ap_info(struct net_device *dev,
 			   struct iw_request_info *info,
 			   union iwreq_data *wrqu, char *extra)
 {
-	int bssid_match, ret = 0;
+	int ret = 0;
 	u32 cnt = 0, wpa_ielen;
 	_irqL	irqL;
 	_list	*plist, *phead;
@@ -3833,8 +3879,6 @@ static int rtw_wext_p2p_enable(struct net_device *dev,
 
 	int ret = 0;
 	_adapter *padapter = (_adapter *)rtw_netdev_priv(dev);
-	struct mlme_priv *pmlmepriv = &(padapter->mlmepriv);
-	struct iw_point *pdata = &wrqu->data;
 	struct wifidirect_info *pwdinfo = &(padapter->wdinfo);
 	struct mlme_ext_priv	*pmlmeext = &padapter->mlmeextpriv;
 	enum P2P_ROLE init_role = P2P_ROLE_DISABLE;
@@ -3900,8 +3944,6 @@ static int rtw_p2p_set_go_nego_ssid(struct net_device *dev,
 
 	int ret = 0;
 	_adapter *padapter = (_adapter *)rtw_netdev_priv(dev);
-	struct mlme_priv *pmlmepriv = &(padapter->mlmepriv);
-	struct iw_point *pdata = &wrqu->data;
 	struct wifidirect_info *pwdinfo = &(padapter->wdinfo);
 
 	RTW_INFO("[%s] ssid = %s, len = %zu\n", __FUNCTION__, extra, strlen(extra));
@@ -4066,7 +4108,6 @@ static int rtw_p2p_get_status(struct net_device *dev,
 
 	int ret = 0;
 	_adapter *padapter = (_adapter *)rtw_netdev_priv(dev);
-	struct iw_point *pdata = &wrqu->data;
 	struct wifidirect_info	*pwdinfo = &(padapter->wdinfo);
 
 	if (padapter->bShowGetP2PState) {
@@ -4097,7 +4138,6 @@ static int rtw_p2p_get_req_cm(struct net_device *dev,
 
 	int ret = 0;
 	_adapter *padapter = (_adapter *)rtw_netdev_priv(dev);
-	struct iw_point *pdata = &wrqu->data;
 	struct wifidirect_info	*pwdinfo = &(padapter->wdinfo);
 
 	sprintf(extra, "\n\nCM=%s\n", pwdinfo->rx_prov_disc_info.strconfig_method_desc_of_prov_disc_req);
@@ -4114,10 +4154,8 @@ static int rtw_p2p_get_role(struct net_device *dev,
 
 	int ret = 0;
 	_adapter *padapter = (_adapter *)rtw_netdev_priv(dev);
-	struct iw_point *pdata = &wrqu->data;
 	struct wifidirect_info	*pwdinfo = &(padapter->wdinfo);
 
-
 	RTW_INFO("[%s] Role = %d, Status = %d, peer addr = %.2X:%.2X:%.2X:%.2X:%.2X:%.2X\n", __FUNCTION__, rtw_p2p_role(pwdinfo), rtw_p2p_state(pwdinfo),
 		pwdinfo->p2p_peer_interface_addr[0], pwdinfo->p2p_peer_interface_addr[1], pwdinfo->p2p_peer_interface_addr[2],
 		pwdinfo->p2p_peer_interface_addr[3], pwdinfo->p2p_peer_interface_addr[4], pwdinfo->p2p_peer_interface_addr[5]);
@@ -4136,7 +4174,6 @@ static int rtw_p2p_get_peer_ifaddr(struct net_device *dev,
 
 	int ret = 0;
 	_adapter *padapter = (_adapter *)rtw_netdev_priv(dev);
-	struct iw_point *pdata = &wrqu->data;
 	struct wifidirect_info	*pwdinfo = &(padapter->wdinfo);
 
 
@@ -4160,7 +4197,6 @@ static int rtw_p2p_get_peer_devaddr(struct net_device *dev,
 
 	int ret = 0;
 	_adapter *padapter = (_adapter *)rtw_netdev_priv(dev);
-	struct iw_point *pdata = &wrqu->data;
 	struct wifidirect_info	*pwdinfo = &(padapter->wdinfo);
 
 	RTW_INFO("[%s] Role = %d, Status = %d, peer addr = %.2X:%.2X:%.2X:%.2X:%.2X:%.2X\n", __FUNCTION__, rtw_p2p_role(pwdinfo), rtw_p2p_state(pwdinfo),
@@ -4184,7 +4220,6 @@ static int rtw_p2p_get_peer_devaddr_by_invitation(struct net_device *dev,
 
 	int ret = 0;
 	_adapter *padapter = (_adapter *)rtw_netdev_priv(dev);
-	struct iw_point *pdata = &wrqu->data;
 	struct wifidirect_info	*pwdinfo = &(padapter->wdinfo);
 
 	RTW_INFO("[%s] Role = %d, Status = %d, peer addr = %.2X:%.2X:%.2X:%.2X:%.2X:%.2X\n", __FUNCTION__, rtw_p2p_role(pwdinfo), rtw_p2p_state(pwdinfo),
@@ -4208,7 +4243,6 @@ static int rtw_p2p_get_groupid(struct net_device *dev,
 
 	int ret = 0;
 	_adapter *padapter = (_adapter *)rtw_netdev_priv(dev);
-	struct iw_point *pdata = &wrqu->data;
 	struct wifidirect_info	*pwdinfo = &(padapter->wdinfo);
 
 	sprintf(extra, "\n%.2X:%.2X:%.2X:%.2X:%.2X:%.2X %s",
@@ -4229,7 +4263,6 @@ static int rtw_p2p_get_op_ch(struct net_device *dev,
 
 	int ret = 0;
 	_adapter *padapter = (_adapter *)rtw_netdev_priv(dev);
-	struct iw_point *pdata = &wrqu->data;
 	struct wifidirect_info	*pwdinfo = &(padapter->wdinfo);
 
 
@@ -4321,7 +4354,6 @@ static int rtw_p2p_get_peer_wfd_port(struct net_device *dev,
 
 	int ret = 0;
 	_adapter *padapter = (_adapter *)rtw_netdev_priv(dev);
-	struct iw_point *pdata = &wrqu->data;
 	struct wifidirect_info	*pwdinfo = &(padapter->wdinfo);
 
 	RTW_INFO("[%s] p2p_state = %d\n", __FUNCTION__, rtw_p2p_state(pwdinfo));
@@ -4341,7 +4373,6 @@ static int rtw_p2p_get_peer_wfd_preferred_connection(struct net_device *dev,
 
 	int ret = 0;
 	_adapter *padapter = (_adapter *)rtw_netdev_priv(dev);
-	struct iw_point *pdata = &wrqu->data;
 	struct wifidirect_info	*pwdinfo = &(padapter->wdinfo);
 
 	sprintf(extra, "\n\nwfd_pc=%d\n", pwdinfo->wfd_info->wfd_pc);
@@ -4360,7 +4391,6 @@ static int rtw_p2p_get_peer_wfd_session_available(struct net_device *dev,
 
 	int ret = 0;
 	_adapter *padapter = (_adapter *)rtw_netdev_priv(dev);
-	struct iw_point *pdata = &wrqu->data;
 	struct wifidirect_info	*pwdinfo = &(padapter->wdinfo);
 
 	sprintf(extra, "\n\nwfd_sa=%d\n", pwdinfo->wfd_info->peer_session_avail);
@@ -4694,7 +4724,6 @@ static int rtw_p2p_connect(struct net_device *dev,
 	struct wifidirect_info	*pwdinfo = &(padapter->wdinfo);
 	u8					peerMAC[ETH_ALEN] = { 0x00 };
 	int					jj, kk;
-	u8					peerMACStr[ETH_ALEN * 2] = { 0x00 };
 	struct mlme_priv		*pmlmepriv = &padapter->mlmepriv;
 	_irqL				irqL;
 	_list					*plist, *phead;
@@ -4830,16 +4859,14 @@ static int rtw_p2p_invite_req(struct net_device *dev,
 
 	int ret = 0;
 	_adapter					*padapter = (_adapter *)rtw_netdev_priv(dev);
-	struct iw_point			*pdata = &wrqu->data;
 	struct wifidirect_info		*pwdinfo = &(padapter->wdinfo);
 	int						jj, kk;
-	u8						peerMACStr[ETH_ALEN * 2] = { 0x00 };
 	struct mlme_priv			*pmlmepriv = &padapter->mlmepriv;
 	_list						*plist, *phead;
 	_queue					*queue	= &(pmlmepriv->scanned_queue);
 	struct	wlan_network		*pnetwork = NULL;
 	uint						uintPeerChannel = 0;
-	u8						attr_content[50] = { 0x00 }, _status = 0;
+	u8						attr_content[50] = { 0x00 };
 	u8						*p2pie;
 	uint						p2pielen = 0, attr_contentlen = 0;
 	_irqL					irqL;
@@ -5013,20 +5040,7 @@ static int rtw_p2p_set_persistent(struct net_device *dev,
 
 	int ret = 0;
 	_adapter					*padapter = (_adapter *)rtw_netdev_priv(dev);
-	struct iw_point			*pdata = &wrqu->data;
 	struct wifidirect_info		*pwdinfo = &(padapter->wdinfo);
-	int						jj, kk;
-	u8						peerMACStr[ETH_ALEN * 2] = { 0x00 };
-	struct mlme_priv			*pmlmepriv = &padapter->mlmepriv;
-	_list						*plist, *phead;
-	_queue					*queue	= &(pmlmepriv->scanned_queue);
-	struct	wlan_network		*pnetwork = NULL;
-	uint						uintPeerChannel = 0;
-	u8						attr_content[50] = { 0x00 }, _status = 0;
-	u8						*p2pie;
-	uint						p2pielen = 0, attr_contentlen = 0;
-	_irqL					irqL;
-	struct tx_invite_req_info	*pinvite_req_info = &pwdinfo->invitereq_info;
 
 	/*	Commented by Albert 20120328 */
 	/*	The input data is 0 or 1 */
@@ -5117,16 +5131,14 @@ static int rtw_p2p_set_pc(struct net_device *dev,
 
 	int ret = 0;
 	_adapter				*padapter = (_adapter *)rtw_netdev_priv(dev);
-	struct iw_point		*pdata = &wrqu->data;
 	struct wifidirect_info	*pwdinfo = &(padapter->wdinfo);
 	u8					peerMAC[ETH_ALEN] = { 0x00 };
 	int					jj, kk;
-	u8					peerMACStr[ETH_ALEN * 2] = { 0x00 };
 	struct mlme_priv		*pmlmepriv = &padapter->mlmepriv;
 	_list					*plist, *phead;
 	_queue				*queue	= &(pmlmepriv->scanned_queue);
 	struct	wlan_network	*pnetwork = NULL;
-	u8					attr_content[50] = { 0x00 }, _status = 0;
+	u8					attr_content[50] = { 0x00 };
 	u8 *p2pie;
 	uint					p2pielen = 0, attr_contentlen = 0;
 	_irqL				irqL;
@@ -5233,7 +5245,6 @@ static int rtw_p2p_set_wfd_device_type(struct net_device *dev,
 
 	int ret = 0;
 	_adapter					*padapter = (_adapter *)rtw_netdev_priv(dev);
-	struct iw_point			*pdata = &wrqu->data;
 	struct wifidirect_info		*pwdinfo = &(padapter->wdinfo);
 	struct wifi_display_info		*pwfd_info = pwdinfo->wfd_info;
 
@@ -5307,9 +5318,7 @@ static int rtw_p2p_set_sa(struct net_device *dev,
 
 	int ret = 0;
 	_adapter					*padapter = (_adapter *)rtw_netdev_priv(dev);
-	struct iw_point			*pdata = &wrqu->data;
 	struct wifidirect_info		*pwdinfo = &(padapter->wdinfo);
-	struct wifi_display_info		*pwfd_info = pwdinfo->wfd_info;
 
 	RTW_INFO("[%s] data = %s\n", __FUNCTION__, extra);
 
@@ -5342,13 +5351,12 @@ static int rtw_p2p_prov_disc(struct net_device *dev,
 	struct wifidirect_info	*pwdinfo = &(padapter->wdinfo);
 	u8					peerMAC[ETH_ALEN] = { 0x00 };
 	int					jj, kk;
-	u8					peerMACStr[ETH_ALEN * 2] = { 0x00 };
 	struct mlme_priv		*pmlmepriv = &padapter->mlmepriv;
 	_list					*plist, *phead;
 	_queue				*queue	= &(pmlmepriv->scanned_queue);
 	struct	wlan_network	*pnetwork = NULL;
 	uint					uintPeerChannel = 0;
-	u8					attr_content[100] = { 0x00 }, _status = 0;
+	u8					attr_content[100] = { 0x00 };
 	u8 *p2pie;
 	uint					p2pielen = 0, attr_contentlen = 0;
 	_irqL				irqL;
@@ -5602,15 +5610,9 @@ static int rtw_p2p_set(struct net_device *dev,
 		       struct iw_request_info *info,
 		       union iwreq_data *wrqu, char *extra)
 {
-
 	int ret = 0;
 #ifdef CONFIG_P2P
-
 	_adapter *padapter = (_adapter *)rtw_netdev_priv(dev);
-	struct mlme_priv *pmlmepriv = &(padapter->mlmepriv);
-	struct iw_point *pdata = &wrqu->data;
-	struct wifidirect_info *pwdinfo = &(padapter->wdinfo);
-	struct mlme_ext_priv	*pmlmeext = &padapter->mlmeextpriv;
 
 	RTW_INFO("[%s] extra = %s\n", __FUNCTION__, extra);
 
@@ -5696,16 +5698,9 @@ static int rtw_p2p_get(struct net_device *dev,
 		       struct iw_request_info *info,
 		       union iwreq_data *wrqu, char *extra)
 {
-
 	int ret = 0;
-
 #ifdef CONFIG_P2P
-
 	_adapter *padapter = (_adapter *)rtw_netdev_priv(dev);
-	struct mlme_priv *pmlmepriv = &(padapter->mlmepriv);
-	struct iw_point *pdata = &wrqu->data;
-	struct wifidirect_info *pwdinfo = &(padapter->wdinfo);
-	struct mlme_ext_priv	*pmlmeext = &padapter->mlmeextpriv;
 
 	if (padapter->bShowGetP2PState)
 		RTW_INFO("[%s] extra = %s\n", __FUNCTION__, (char *) wrqu->data.pointer);
@@ -5856,10 +5851,6 @@ static int rtw_rereg_nd_name(struct net_device *dev,
 		goto exit;
 
 	if (_rtw_memcmp(rereg_priv->old_ifname, "disable%d", 9) == _TRUE) {
-		#ifdef CONFIG_RTW_SW_LED
-		padapter->ledpriv.bRegUseLed = rereg_priv->old_bRegUseLed;
-		rtw_hal_sw_led_init(padapter);
-		#endif
 		/* rtw_ips_mode_req(&padapter->pwrctrlpriv, rereg_priv->old_ips_mode); */
 	}
 
@@ -5872,13 +5863,6 @@ static int rtw_rereg_nd_name(struct net_device *dev,
 		/* free network queue for Android's timming issue */
 		rtw_free_network_queue(padapter, _TRUE);
 
-		/* close led */
-		rtw_led_control(padapter, LED_CTL_POWER_OFF);
-		#ifdef CONFIG_RTW_SW_LED
-		rereg_priv->old_bRegUseLed = padapter->ledpriv.bRegUseLed;
-		padapter->ledpriv.bRegUseLed = _FALSE;
-		rtw_hal_sw_led_deinit(padapter);
-		#endif
 		/* the interface is being "disabled", we can do deeper IPS */
 		/* rereg_priv->old_ips_mode = rtw_get_ips_mode_req(&padapter->pwrctrlpriv); */
 		/* rtw_ips_mode_req(&padapter->pwrctrlpriv, IPS_NORMAL); */
@@ -5897,11 +5881,7 @@ exit:
 #ifdef DBG_CMD_QUEUE
 u8 dump_cmd_id = 0;
 #endif
-/*
-#ifdef DBG_DUMP_TSF_BY_PORT
-extern void get_tsf_by_port(_adapter *adapter, u8 *tsftr, u8 hw_port);
-#endif
-*/
+
 static int rtw_dbg_port(struct net_device *dev,
 			struct iw_request_info *info,
 			union iwreq_data *wrqu, char *extra)
@@ -6185,11 +6165,6 @@ static int rtw_dbg_port(struct net_device *dev,
 				psecuritypriv->dot11AuthAlgrthm, psecuritypriv->dot11PrivacyAlgrthm,
 				psecuritypriv->ndisauthtype, psecuritypriv->ndisencryptstatus);
 			break;
-		case 0x02:
-			RTW_INFO("pmlmeinfo->state=0x%x\n", pmlmeinfo->state);
-			RTW_INFO("DrvBcnEarly=%d\n", pmlmeext->DrvBcnEarly);
-			RTW_INFO("DrvBcnTimeOut=%d\n", pmlmeext->DrvBcnTimeOut);
-			break;
 		case 0x03:
 			RTW_INFO("qos_option=%d\n", pmlmepriv->qospriv.qos_option);
 #ifdef CONFIG_80211N_HT
@@ -6228,12 +6203,10 @@ static int rtw_dbg_port(struct net_device *dev,
 				RTW_INFO("can't get sta's macaddr, cur_network's macaddr:" MAC_FMT "\n", MAC_ARG(cur_network->network.MacAddress));
 			break;
 		case 0x06: {
-				#ifdef DBG_DUMP_TSF_BY_PORT
 				u64 tsf = 0;
 
-				get_tsf_by_port(padapter, (u8 *)&tsf, extra_arg);
-				RTW_INFO(" PORT-%d TSF :%lld\n", extra_arg, tsf);
-				#endif
+				tsf = rtw_hal_get_tsftr_by_port(padapter, extra_arg);
+				RTW_INFO(" PORT-%d TSF :%21lld\n", extra_arg, tsf);
 		}
 			break;
 		case 0x07:
@@ -6590,9 +6563,6 @@ static int rtw_dbg_port(struct net_device *dev,
 			{
 				if (arg == 0xAA) {
 					u8 page_offset, page_num;
-					u32 page_size = 0;
-					u8 *buffer = NULL;
-					u32 buf_size = 0;
 
 					page_offset = (u8)(extra_arg >> 16);
 					page_num = (u8)(extra_arg & 0xFF);
@@ -6745,7 +6715,6 @@ static int rtw_dbg_port(struct net_device *dev,
 static int wpa_set_param(struct net_device *dev, u8 name, u32 value)
 {
 	uint ret = 0;
-	u32 flags;
 	_adapter *padapter = (_adapter *)rtw_netdev_priv(dev);
 
 	switch (name) {
@@ -7187,9 +7156,16 @@ static int rtw_set_encryption(struct net_device *dev, struct ieee_param *param,
 				psta->dot11txpn.val = RTW_GET_LE64(param->u.crypt.seq);
 				psta->dot11rxpn.val = RTW_GET_LE64(param->u.crypt.seq);
 				psta->ieee8021x_blocked = _FALSE;
-				psta->bpairwise_key_installed = _TRUE;
-				rtw_ap_set_pairwise_key(padapter, psta);
 
+				if (psta->dot118021XPrivacy != _NO_PRIVACY_) {
+					psta->bpairwise_key_installed = _TRUE;
+
+					/* WPA2 key-handshake has completed */
+					if (psecuritypriv->ndisauthtype == Ndis802_11AuthModeWPA2PSK)
+						psta->state &= (~WIFI_UNDER_KEY_HANDSHAKE);
+				}
+
+				rtw_ap_set_pairwise_key(padapter, psta);
 			} else {
 				RTW_WARN(FUNC_ADPT_FMT" set group key of "MAC_FMT", not support\n"
 					, FUNC_ADPT_ARG(padapter), MAC_ARG(psta->cmn.mac_addr));
@@ -7260,7 +7236,6 @@ static int rtw_hostapd_sta_flush(struct net_device *dev)
 
 static int rtw_add_sta(struct net_device *dev, struct ieee_param *param)
 {
-	_irqL irqL;
 	int ret = 0;
 	struct sta_info *psta = NULL;
 	_adapter *padapter = (_adapter *)rtw_netdev_priv(dev);
@@ -7312,7 +7287,9 @@ static int rtw_add_sta(struct net_device *dev, struct ieee_param *param)
 
 #ifdef CONFIG_80211N_HT
 		/* chec 802.11n ht cap. */
-		if (WLAN_STA_HT & flags) {
+		if (padapter->registrypriv.ht_enable &&
+			is_supported_ht(padapter->registrypriv.wireless_mode) &&
+			(WLAN_STA_HT & flags)) {
 			psta->htpriv.ht_option = _TRUE;
 			psta->qos_option = 1;
 			_rtw_memcpy((void *)&psta->htpriv.ht_cap, (void *)&param->u.add_sta.ht_cap, sizeof(struct rtw_ieee80211_ht_cap));
@@ -7321,6 +7298,7 @@ static int rtw_add_sta(struct net_device *dev, struct ieee_param *param)
 
 		if (pmlmepriv->htpriv.ht_option == _FALSE)
 			psta->htpriv.ht_option = _FALSE;
+
 #endif
 
 
@@ -7445,7 +7423,8 @@ static int rtw_ioctl_get_sta_data(struct net_device *dev, struct ieee_param *par
 		psta_data->tx_supp_rates_len =  psta->bssratelen;
 		_rtw_memcpy(psta_data->tx_supp_rates, psta->bssrateset, psta->bssratelen);
 #ifdef CONFIG_80211N_HT
-		_rtw_memcpy(&psta_data->ht_cap, &psta->htpriv.ht_cap, sizeof(struct rtw_ieee80211_ht_cap));
+		if(padapter->registrypriv.ht_enable && is_supported_ht(padapter->registrypriv.wireless_mode))
+			_rtw_memcpy(&psta_data->ht_cap, &psta->htpriv.ht_cap, sizeof(struct rtw_ieee80211_ht_cap));
 #endif /* CONFIG_80211N_HT */
 		psta_data->rx_pkts = psta->sta_stats.rx_data_pkts;
 		psta_data->rx_bytes = psta->sta_stats.rx_bytes;
@@ -7512,7 +7491,6 @@ static int rtw_set_wps_beacon(struct net_device *dev, struct ieee_param *param,
 	_adapter *padapter = (_adapter *)rtw_netdev_priv(dev);
 	struct mlme_priv *pmlmepriv = &(padapter->mlmepriv);
 	struct mlme_ext_priv	*pmlmeext = &(padapter->mlmeextpriv);
-	struct mlme_ext_info	*pmlmeinfo = &(pmlmeext->mlmext_info);
 	int ie_len;
 
 	RTW_INFO("%s, len=%d\n", __FUNCTION__, len);
@@ -7689,7 +7667,7 @@ static int rtw_ioctl_acl_remove_sta(struct net_device *dev, struct ieee_param *p
 	    param->sta_addr[4] == 0xff && param->sta_addr[5] == 0xff)
 		return -EINVAL;
 
-	ret = rtw_acl_remove_sta(padapter, param->sta_addr);
+	ret = rtw_acl_remove_sta(padapter, RTW_ACL_PERIOD_BSS, param->sta_addr);
 
 	return ret;
 
@@ -7709,7 +7687,7 @@ static int rtw_ioctl_acl_add_sta(struct net_device *dev, struct ieee_param *para
 	    param->sta_addr[4] == 0xff && param->sta_addr[5] == 0xff)
 		return -EINVAL;
 
-	ret = rtw_acl_add_sta(padapter, param->sta_addr);
+	ret = rtw_acl_add_sta(padapter, RTW_ACL_PERIOD_BSS, param->sta_addr);
 
 	return ret;
 
@@ -7724,7 +7702,7 @@ static int rtw_ioctl_set_macaddr_acl(struct net_device *dev, struct ieee_param *
 	if (check_fwstate(pmlmepriv, WIFI_AP_STATE) != _TRUE)
 		return -EINVAL;
 
-	rtw_set_macaddr_acl(padapter, param->u.mlme.command);
+	rtw_set_macaddr_acl(padapter, RTW_ACL_PERIOD_BSS, param->u.mlme.command);
 
 	return ret;
 }
@@ -7881,7 +7859,9 @@ static int rtw_wx_set_priv(struct net_device *dev,
 	int ret = 0;
 	int len = 0;
 	char *ext;
+#ifdef CONFIG_ANDROID
 	int i;
+#endif
 
 	_adapter *padapter = (_adapter *)rtw_netdev_priv(dev);
 	struct iw_point *dwrq = (struct iw_point *)awrq;
@@ -8052,7 +8032,8 @@ static int rtw_wowlan_ctrl(struct net_device *dev,
 	RTW_INFO("+rtw_wowlan_ctrl: %s\n", extra);
 
 	if (!check_fwstate(pmlmepriv, _FW_LINKED) &&
-	    check_fwstate(pmlmepriv, WIFI_STATION_STATE)) {
+		check_fwstate(pmlmepriv, WIFI_STATION_STATE) &&
+		!WOWLAN_IS_STA_MIX_MODE(padapter)) {
 #ifdef CONFIG_PNO_SUPPORT
 		pwrctrlpriv->wowlan_pno_enable = _TRUE;
 #else
@@ -8311,6 +8292,12 @@ int rtw_vendor_ie_get_data(struct net_device *dev, int vendor_ie_num, char *extr
 		pstring += sprintf(pstring , "[Assoc Req]");
 	if (vendor_ie_mask & WIFI_ASSOCRESP_VENDOR_IE_BIT)
 		pstring += sprintf(pstring , "[Assoc Resp]");
+#ifdef CONFIG_P2P
+	if (vendor_ie_mask & WIFI_P2P_PROBEREQ_VENDOR_IE_BIT)
+		pstring += sprintf(pstring , "[P2P_Probe Req]");
+	if (vendor_ie_mask & WIFI_P2P_PROBERESP_VENDOR_IE_BIT)
+		pstring += sprintf(pstring , "[P2P_Probe Resp]");
+#endif
 
 	pstring += sprintf(pstring , "\nVendor IE:\n");
 	for (j = 0 ; j < pmlmepriv->vendor_ielen[vendor_ie_num]  ; j++)
@@ -8361,6 +8348,7 @@ int rtw_vendor_ie_set(struct net_device *dev, struct iw_request_info *info, unio
 	struct mlme_priv *pmlmepriv = &(padapter->mlmepriv);
 	u32 vendor_ie_mask = 0;
 	u32 vendor_ie_num = 0;
+	u32 vendor_ie_mask_max = BIT(WLAN_MAX_VENDOR_IE_MASK_MAX) - 1;
 	u32 id, elen;
 
 	ret = sscanf(extra, "%d,%x,%*s", &vendor_ie_num , &vendor_ie_mask);
@@ -8369,10 +8357,10 @@ int rtw_vendor_ie_set(struct net_device *dev, struct iw_request_info *info, unio
 	else
 		return -EINVAL;
 	totoal_ie_len = strlen(extra);
-	RTW_INFO("[%s] vendor_ie_num = %d , vendor_ie_mask = %x , vendor_ie = %s , len = %d\n", __func__ , vendor_ie_num , vendor_ie_mask , extra  , totoal_ie_len);
+	RTW_INFO("[%s] vendor_ie_num = %d , vendor_ie_mask = 0x%x , vendor_ie = %s , len = %d\n", __func__ , vendor_ie_num , vendor_ie_mask , extra  , totoal_ie_len);
 
 	if (vendor_ie_num  > WLAN_MAX_VENDOR_IE_NUM - 1) {
-		RTW_INFO("[%s] only support %d vendor ie\n", __func__ , WLAN_MAX_VENDOR_IE_NUM);
+		RTW_INFO("[%s] Fail, only support %d vendor ie\n", __func__ , WLAN_MAX_VENDOR_IE_NUM);
 		return -EFAULT;
 	}
 
@@ -8381,6 +8369,11 @@ int rtw_vendor_ie_set(struct net_device *dev, struct iw_request_info *info, unio
 		return -EFAULT;
 	}
 
+	if (vendor_ie_mask > vendor_ie_mask_max) {
+		RTW_INFO("[%s] Fail, not support vendor_ie_mask more than 0x%x\n", __func__ , vendor_ie_mask_max);
+		return -EFAULT;
+	}
+
 	if (vendor_ie_mask == 0) {
 		RTW_INFO("[%s] Clear vendor_ie_num %d group\n", __func__ , vendor_ie_num);
 		goto _clear_path;
@@ -8422,11 +8415,17 @@ int rtw_vendor_ie_set(struct net_device *dev, struct iw_request_info *info, unio
 	if (vendor_ie_mask & WIFI_PROBEREQ_VENDOR_IE_BIT)
 		RTW_INFO("[%s] Probe Req append vendor ie\n", __func__);
 	if (vendor_ie_mask & WIFI_PROBERESP_VENDOR_IE_BIT)
-		RTW_INFO("[%s] Probe Resp  append vendor ie\n", __func__);
+		RTW_INFO("[%s] Probe Resp append vendor ie\n", __func__);
 	if (vendor_ie_mask & WIFI_ASSOCREQ_VENDOR_IE_BIT)
 		RTW_INFO("[%s] Assoc Req append vendor ie\n", __func__);
 	if (vendor_ie_mask & WIFI_ASSOCRESP_VENDOR_IE_BIT)
 		RTW_INFO("[%s] Assoc Resp append vendor ie\n", __func__);
+#ifdef CONFIG_P2P
+	if (vendor_ie_mask & WIFI_P2P_PROBEREQ_VENDOR_IE_BIT)
+		RTW_INFO("[%s] P2P Probe Req append vendor ie\n", __func__);
+	if (vendor_ie_mask & WIFI_P2P_PROBERESP_VENDOR_IE_BIT)
+		RTW_INFO("[%s] P2P Probe Resp append vendor ie\n", __func__);
+#endif
 
 	pmlmepriv->vendor_ie_mask[vendor_ie_num] = vendor_ie_mask;
 
@@ -8450,7 +8449,6 @@ static int rtw_mp_efuse_get(struct net_device *dev,
 	PEFUSE_HAL pEfuseHal;
 	struct iw_point *wrqu;
 
-	u8	*PROMContent = pHalData->efuse_eeprom_data;
 	u8 ips_mode = IPS_NUM; /* init invalid value */
 	u8 lps_mode = PS_MODE_NUM; /* init invalid value */
 	struct pwrctrl_priv *pwrctrlpriv ;
@@ -8792,6 +8790,10 @@ static int rtw_mp_efuse_get(struct net_device *dev,
 		addr = EEPROM_VID_8188FU;
 #endif /* CONFIG_RTL8188F */
 
+#ifdef CONFIG_RTL8188GTV
+		addr = EEPROM_VID_8188GTVU;
+#endif
+
 #ifdef CONFIG_RTL8703B
 #ifdef CONFIG_USB_HCI
 		addr = EEPROM_VID_8703BU;
@@ -9145,6 +9147,8 @@ static int rtw_mp_efuse_set(struct net_device *dev,
 	u16 addr = 0xFF, cnts = 0, BTStatus = 0 , max_available_len = 0;
 	u16 wifimaplen;
 	int err;
+	boolean bcmpchk = _TRUE;
+
 
 	wrqu = (struct iw_point *)wdata;
 	padapter = rtw_netdev_priv(dev);
@@ -9431,6 +9435,10 @@ static int rtw_mp_efuse_set(struct net_device *dev,
 		addr = EEPROM_VID_8188FU;
 #endif
 
+#ifdef CONFIG_RTL8188GTV
+		addr = EEPROM_VID_8188GTVU;
+#endif
+
 #ifdef CONFIG_RTL8703B
 #ifdef CONFIG_USB_HCI
 		addr = EEPROM_VID_8703BU;
@@ -9671,7 +9679,8 @@ static int rtw_mp_efuse_set(struct net_device *dev,
 
 		if (padapter->registrypriv.bFileMaskEfuse != _TRUE && pmp_priv->bloadefusemap == _TRUE) {
 			RTW_INFO("%s: File eFuse mask file not to be loaded\n", __FUNCTION__);
-			sprintf(extra, "Not load eFuse mask file yet, Please use the efuse_mask CMD.\n");
+			sprintf(extra, "Not load eFuse mask file yet, Please use the efuse_mask CMD, now remove the interface !!!!\n");
+			rtw_set_surprise_removed(padapter);
 			err = 0;
 			goto exit;
 		}
@@ -9687,18 +9696,42 @@ static int rtw_mp_efuse_set(struct net_device *dev,
 		}
 
 		if (rtw_efuse_mask_map_read(padapter, 0x00, wifimaplen, ShadowMapWiFi) == _SUCCESS) {
-			if (_rtw_memcmp((void *)ShadowMapWiFi , (void *)pEfuseHal->fakeEfuseModifiedMap, cnts)) {
-				RTW_INFO("%s: WiFi write map afterf compare OK\n", __FUNCTION__);
-				sprintf(extra, "WiFi write map compare OK\n");
-				err = 0;
-				goto exit;
-			} else {
-				sprintf(extra, "WiFi write map compare FAIL\n");
-				RTW_INFO("%s: WiFi write map compare Fail\n", __FUNCTION__);
-				err = 0;
-				goto exit;
+			addr = 0x00;
+			err = _TRUE;
+
+			for (i = 0; i < cnts; i++) {
+				if (padapter->registrypriv.boffefusemask == 0) {
+					if (padapter->registrypriv.bFileMaskEfuse == _TRUE) {
+						if (rtw_file_efuse_IsMasked(padapter, addr + i) == _TRUE)	/*use file efuse mask. */
+							bcmpchk = _FALSE;
+					} else {
+						if (efuse_IsMasked(padapter, addr + i) == _TRUE)
+							bcmpchk = _FALSE;
+					}
+				}
+
+				if (bcmpchk == _TRUE) {
+					RTW_INFO("compare readMapWiFi[0x%02x] = %x, ModifiedMap = %x\n", addr + i, ShadowMapWiFi[ addr + i], pEfuseHal->fakeEfuseModifiedMap[addr + i]);
+					if (_rtw_memcmp((void *) &ShadowMapWiFi[addr + i], (void *)&pEfuseHal->fakeEfuseModifiedMap[addr + i], 1) == _FALSE){
+						err = _FALSE;
+						break;
+					}
+				}
+				bcmpchk = _TRUE;
 			}
 		}
+
+		if (err) {
+			RTW_INFO("%s: WiFi write map afterf compare OK\n", __FUNCTION__);
+			sprintf(extra, "WiFi write map compare OK\n");
+			err = 0;
+			goto exit;
+		} else {
+			sprintf(extra, "WiFi write map compare FAIL\n");
+			RTW_INFO("%s: WiFi write map compare Fail\n", __FUNCTION__);
+			err = 0;
+			goto exit;
+		}
 	} else if (strcmp(tmp[0], "wlwfake") == 0) {
 		if ((tmp[1] == NULL) || (tmp[2] == NULL)) {
 			err = -EINVAL;
@@ -9842,7 +9875,7 @@ static int rtw_mp_customer_str(
 		|| !adapter->registrypriv.mp_customer_str)
 		return -EFAULT;
 
-	len = wrqu->data.length;
+	len = wrqu->data.length + 1;
 
 	pbuf = (u8 *)rtw_zmalloc(len);
 	if (pbuf == NULL) {
@@ -9850,7 +9883,7 @@ static int rtw_mp_customer_str(
 		return -ENOMEM;
 	}
 
-	if (copy_from_user(pbuf, wrqu->data.pointer, len)) {
+	if (copy_from_user(pbuf, wrqu->data.pointer, wrqu->data.length)) {
 		rtw_mfree(pbuf, len);
 		RTW_WARN("%s: copy from user fail!\n", __func__);
 		return -EFAULT;
@@ -9926,7 +9959,9 @@ static int rtw_priv_mp_set(struct net_device *dev,
 
 	struct iw_point *wrqu = (struct iw_point *)wdata;
 	u32 subcmd = wrqu->flags;
+#ifdef CONFIG_CONCURRENT_MODE
 	PADAPTER padapter = rtw_netdev_priv(dev);
+#endif
 
 	if (!is_primary_adapter(padapter)) {
 		RTW_INFO("MP mode only primary Adapter support\n");
@@ -9965,7 +10000,9 @@ static int rtw_priv_mp_get(struct net_device *dev,
 
 	struct iw_point *wrqu = (struct iw_point *)wdata;
 	u32 subcmd = wrqu->flags;
+#ifdef CONFIG_CONCURRENT_MODE
 	PADAPTER padapter = rtw_netdev_priv(dev);
+#endif
 
 	if (!is_primary_adapter(padapter)) {
 		RTW_INFO("MP mode only primary Adapter support\n");
@@ -10007,6 +10044,10 @@ static int rtw_priv_mp_get(struct net_device *dev,
 		RTW_INFO("set case mp_channel\n");
 		rtw_mp_channel(dev , info, wrqu, extra);
 		break;
+    	case  MP_CHL_OFFSET:
+       		RTW_INFO("set case mp_ch_offset\n");
+        	rtw_mp_ch_offset(dev , info, wrqu, extra);
+        	break;
 	case READ_REG:
 		RTW_INFO("mp_get  READ_REG\n");
 		rtw_mp_read_reg(dev, info, wrqu, extra);
@@ -10368,7 +10409,7 @@ static int rtw_priv_get(struct net_device *dev,
 	if (subcmd < MP_NULL) {
 #ifdef CONFIG_MP_INCLUDED
 		rtw_priv_mp_get(dev, info, wdata, extra);
-#endif		
+#endif
 		return 0;
 	}
 
@@ -11067,7 +11108,6 @@ static int rtw_tdls_get_best_ch(struct net_device *dev,
 #ifdef CONFIG_FIND_BEST_CHANNEL
 	_adapter *padapter = (_adapter *)rtw_netdev_priv(dev);
 	struct rf_ctl_t *rfctl = adapter_to_rfctl(padapter);
-	struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv;
 	u32 i, best_channel_24G = 1, best_channel_5G = 36, index_24G = 0, index_5G = 0;
 
 	for (i = 0; i < rfctl->max_chan_nums && rfctl->channel_set[i].ChannelNum != 0; i++) {
@@ -11319,6 +11359,11 @@ extern void rtl8723b_fill_default_txdesc(struct xmit_frame *pxmitframe, u8 *pbuf
 #define fill_default_txdesc rtl8723d_fill_default_txdesc
 #endif /* CONFIG_RTL8723D */
 
+#if defined(CONFIG_RTL8710B)
+#define cal_txdesc_chksum rtl8710b_cal_txdesc_chksum
+#define fill_default_txdesc rtl8710b_fill_default_txdesc
+#endif /* CONFIG_RTL8710B */
+
 #if defined(CONFIG_RTL8192E)
 extern void rtl8192e_cal_txdesc_chksum(struct tx_desc *ptxdesc);
 #define cal_txdesc_chksum rtl8192e_cal_txdesc_chksum
@@ -11328,6 +11373,13 @@ extern void rtl8192es_fill_default_txdesc(struct xmit_frame *pxmitframe, u8 *pbu
 #endif /* CONFIG_SDIO_HCI */
 #endif /* CONFIG_RTL8192E */
 
+#if defined(CONFIG_RTL8192F)
+/* extern void rtl8192f_cal_txdesc_chksum(struct tx_desc *ptxdesc); */
+#define cal_txdesc_chksum rtl8192f_cal_txdesc_chksum
+/* extern void rtl8192f_fill_default_txdesc(struct xmit_frame *pxmitframe, u8 *pbuf); */
+#define fill_default_txdesc rtl8192f_fill_default_txdesc
+#endif /* CONFIG_RTL8192F */
+
 static s32 initLoopback(PADAPTER padapter)
 {
 	PLOOPBACKDATA ploopback;
@@ -11874,7 +11926,7 @@ static int rtw_test(
 	}
 
 	pbuf[len] = '\0';
-	
+
 	RTW_INFO("%s: string=\"%s\"\n", __func__, pbuf);
 
 	ptmp = (char *)pbuf;
@@ -12185,6 +12237,7 @@ static const struct iw_priv_args rtw_mp_private_args[] = {
 	{ MP_PHYPARA, IW_PRIV_TYPE_CHAR | 1024, IW_PRIV_TYPE_CHAR | IW_PRIV_SIZE_MASK, "mp_phypara" },
 	{ MP_STOP , IW_PRIV_TYPE_CHAR | 1024, IW_PRIV_TYPE_CHAR | IW_PRIV_SIZE_MASK, "mp_stop" },
 	{ MP_CHANNEL , IW_PRIV_TYPE_CHAR | 1024 , IW_PRIV_TYPE_CHAR | IW_PRIV_SIZE_MASK, "mp_channel" },
+	{ MP_CHL_OFFSET , IW_PRIV_TYPE_CHAR | 1024 , IW_PRIV_TYPE_CHAR | IW_PRIV_SIZE_MASK, "mp_ch_offset" },
 	{ MP_BANDWIDTH , IW_PRIV_TYPE_CHAR | 1024, IW_PRIV_TYPE_CHAR | IW_PRIV_SIZE_MASK, "mp_bandwidth"},
 	{ MP_RATE , IW_PRIV_TYPE_CHAR | 1024, IW_PRIV_TYPE_CHAR | IW_PRIV_SIZE_MASK, "mp_rate" },
 	{ MP_RESET_STATS , IW_PRIV_TYPE_CHAR | 1024, IW_PRIV_TYPE_CHAR | IW_PRIV_SIZE_MASK, "mp_reset_stats"},
@@ -12280,7 +12333,7 @@ static iw_handler rtw_private_handler[] = {
 	rtw_wx_priv_null,				/* 0x19 */
 #ifdef CONFIG_MP_INCLUDED
 	rtw_wx_priv_null,				/* 0x1A */
-	rtw_wx_priv_null,				/* 0x1B */	
+	rtw_wx_priv_null,				/* 0x1B */
 #else
 	rtw_wx_priv_null,				/* 0x1A */
 	rtw_mp_efuse_get,				/* 0x1B */
@@ -12311,17 +12364,7 @@ static struct iw_statistics *rtw_get_wireless_stats(struct net_device *dev)
 #ifdef CONFIG_SIGNAL_DISPLAY_DBM
 		tmp_level = translate_percentage_to_dbm(padapter->recvpriv.signal_strength);
 #else
-#ifdef CONFIG_SIGNAL_SCALE_MAPPING
 		tmp_level = padapter->recvpriv.signal_strength;
-#else
-		{
-			/* Do signal scale mapping when using percentage as the unit of signal strength, since the scale mapping is skipped in odm */
-
-			HAL_DATA_TYPE *pHal = GET_HAL_DATA(padapter);
-
-			tmp_level = (u8)phydm_signal_scale_mapping(&pHal->odmpriv, padapter->recvpriv.signal_strength);
-		}
-#endif
 #endif
 
 		tmp_qual = padapter->recvpriv.signal_qual;
@@ -12781,7 +12824,6 @@ static int rtw_ioctl_compat_wext_private(struct net_device *dev, struct ifreq *r
 static int rtw_ioctl_standard_wext_private(struct net_device *dev, struct ifreq *rq)
 {
 	struct iw_point *iwp;
-	struct ifreq ifrq;
 	union iwreq_data wrq_data;
 	int err = 0;
 	iwp = &wrq_data.data;
diff --git a/rtl8723DS/os_dep/linux/ioctl_mp.c b/rtl8723DS/os_dep/linux/ioctl_mp.c
index 3873a64..c88e4d5 100755..100644
--- a/rtl8723DS/os_dep/linux/ioctl_mp.c
+++ b/rtl8723DS/os_dep/linux/ioctl_mp.c
@@ -37,9 +37,9 @@ int rtw_mp_write_reg(struct net_device *dev,
 		     struct iw_request_info *info,
 		     struct iw_point *wrqu, char *extra)
 {
-	char *pch, *pnext, *ptmp;
+	char *pch, *pnext;
 	char *width_str;
-	char width, buf[5];
+	char width;
 	u32 addr, data;
 	int ret;
 	PADAPTER padapter = rtw_netdev_priv(dev);
@@ -130,10 +130,10 @@ int rtw_mp_read_reg(struct net_device *dev,
 		    struct iw_point *wrqu, char *extra)
 {
 	char input[wrqu->length + 1];
-	char *pch, *pnext, *ptmp;
+	char *pch, *pnext;
 	char *width_str;
 	char width;
-	char data[20], tmp[20], buf[3];
+	char data[20], tmp[20];
 	u32 addr = 0, strtout = 0;
 	u32 i = 0, j = 0, ret = 0, data32 = 0;
 	PADAPTER padapter = rtw_netdev_priv(dev);
@@ -306,8 +306,8 @@ int rtw_mp_read_rf(struct net_device *dev,
 		   struct iw_point *wrqu, char *extra)
 {
 	char input[wrqu->length];
-	char *pch, *pnext, *ptmp;
-	char data[20], tmp[20], buf[3];
+	char *pch, *pnext;
+	char data[20], tmp[20];
 	u32 path, addr, strtou;
 	u32 ret, i = 0 , j = 0;
 	PADAPTER padapter = rtw_netdev_priv(dev);
@@ -367,10 +367,7 @@ int rtw_mp_start(struct net_device *dev,
 		 struct iw_point *wrqu, char *extra)
 {
 	int ret = 0;
-	u8 val8;
 	PADAPTER padapter = rtw_netdev_priv(dev);
-	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(padapter);
-	struct hal_ops *pHalFunc = &padapter->hal_func;
 
 	rtw_pm_set_ips(padapter, IPS_NONE);
 	LeaveAllPowerSaveMode(padapter);
@@ -396,7 +393,6 @@ int rtw_mp_stop(struct net_device *dev,
 {
 	int ret = 0;
 	PADAPTER padapter = rtw_netdev_priv(dev);
-	struct hal_ops *pHalFunc = &padapter->hal_func;
 
 	if (rtw_mp_cmd(padapter, MP_STOP, RTW_CMDF_WAIT_ACK) != _SUCCESS)
 		ret = -EPERM;
@@ -466,7 +462,6 @@ int rtw_mp_channel(struct net_device *dev,
 	HAL_DATA_TYPE	*pHalData	= GET_HAL_DATA(padapter);
 	u8		input[wrqu->length + 1];
 	u32	channel = 1;
-	int cur_ch_offset;
 
 	_rtw_memset(input, 0, sizeof(input));
 	if (copy_from_user(input, wrqu->pointer, wrqu->length))
@@ -486,12 +481,37 @@ int rtw_mp_channel(struct net_device *dev,
 }
 
 
+int rtw_mp_ch_offset(struct net_device *dev,
+		   struct iw_request_info *info,
+		   struct iw_point *wrqu, char *extra)
+{
+
+	PADAPTER padapter = rtw_netdev_priv(dev);
+	u8		input[wrqu->length + 1];
+	u32	ch_offset = 0;
+
+	_rtw_memset(input, 0, sizeof(input));
+	if (copy_from_user(input, wrqu->pointer, wrqu->length))
+		return -EFAULT;
+
+	input[wrqu->length] = '\0';
+	ch_offset = rtw_atoi(input);
+	/*RTW_INFO("%s: channel=%d\n", __func__, channel);*/
+	_rtw_memset(extra, 0, wrqu->length);
+	sprintf(extra, "Change prime channel offset %d to %d", padapter->mppriv.prime_channel_offset , ch_offset);
+	padapter->mppriv.prime_channel_offset = ch_offset;
+	SetChannel(padapter);
+
+	wrqu->length = strlen(extra);
+	return 0;
+}
+
+
 int rtw_mp_bandwidth(struct net_device *dev,
 		     struct iw_request_info *info,
 		     struct iw_point *wrqu, char *extra)
 {
 	u32 bandwidth = 0, sg = 0;
-	int cur_ch_offset;
 	PADAPTER padapter = rtw_netdev_priv(dev);
 	HAL_DATA_TYPE	*pHalData	= GET_HAL_DATA(padapter);
 	u8		input[wrqu->length];
@@ -514,8 +534,7 @@ int rtw_mp_bandwidth(struct net_device *dev,
 
 	SetBandwidth(padapter);
 	pHalData->current_channel_bw = bandwidth;
-	/*cur_ch_offset =  rtw_get_offset_by_ch(padapter->mppriv.channel);*/
-	/*set_channel_bwmode(padapter, padapter->mppriv.channel, cur_ch_offset, bandwidth);*/
+
 	wrqu->length = strlen(extra);
 
 	return 0;
@@ -527,6 +546,7 @@ int rtw_mp_txpower_index(struct net_device *dev,
 			 struct iw_point *wrqu, char *extra)
 {
 	PADAPTER padapter = rtw_netdev_priv(dev);
+ 	HAL_DATA_TYPE	*phal_data	= GET_HAL_DATA(padapter);
 	char input[wrqu->length + 1];
 	u32 rfpath;
 	u32 txpower_inx;
@@ -541,9 +561,26 @@ int rtw_mp_txpower_index(struct net_device *dev,
 
 	input[wrqu->length] = '\0';
 
-	rfpath = rtw_atoi(input);
-	txpower_inx = mpt_ProQueryCalTxPower(padapter, rfpath);
-	sprintf(extra, " %d", txpower_inx);
+	if (wrqu->length == 2) {
+		rfpath = rtw_atoi(input);
+		txpower_inx = mpt_ProQueryCalTxPower(padapter, rfpath);
+		sprintf(extra, " %d", txpower_inx);
+	} else {
+		txpower_inx = mpt_ProQueryCalTxPower(padapter, 0);
+		sprintf(extra, "patha=%d", txpower_inx);
+		if (phal_data->rf_type > RF_1T2R) {
+			txpower_inx = mpt_ProQueryCalTxPower(padapter, 1);
+			sprintf(extra, "%s,pathb=%d", extra, txpower_inx);
+		}
+		if (phal_data->rf_type > RF_2T4R) {
+			txpower_inx = mpt_ProQueryCalTxPower(padapter, 2);
+			sprintf(extra, "%s,pathc=%d", extra, txpower_inx);
+		}
+		if (phal_data->rf_type > RF_3T4R) {
+			txpower_inx = mpt_ProQueryCalTxPower(padapter, 3);
+			sprintf(extra, "%s,pathd=%d", extra, txpower_inx);
+		}
+	}
 	wrqu->length = strlen(extra);
 
 	return 0;
@@ -554,7 +591,7 @@ int rtw_mp_txpower(struct net_device *dev,
 		   struct iw_request_info *info,
 		   struct iw_point *wrqu, char *extra)
 {
-	u32 idx_a = 0, idx_b = 0, idx_c = 0, idx_d = 0, status = 0;
+	u32 idx_a = 0, idx_b = 0, idx_c = 0, idx_d = 0;
 	int MsetPower = 1;
 	u8		input[wrqu->length];
 
@@ -818,15 +855,15 @@ int rtw_mp_disable_bt_coexist(struct net_device *dev,
 			      struct iw_request_info *info,
 			      union iwreq_data *wrqu, char *extra)
 {
+#ifdef CONFIG_BT_COEXIST
 	PADAPTER padapter = (PADAPTER)rtw_netdev_priv(dev);
-	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(padapter);
-	struct hal_ops *pHalFunc = &padapter->hal_func;
 
+#endif
 	u8 input[wrqu->data.length + 1];
 	u32 bt_coexist;
 
 	_rtw_memset(input, 0, sizeof(input));
-	
+
 	if (copy_from_user(input, wrqu->data.pointer, wrqu->data.length))
 		return -EFAULT;
 
@@ -858,11 +895,11 @@ int rtw_mp_arx(struct net_device *dev,
 	       struct iw_request_info *info,
 	       struct iw_point *wrqu, char *extra)
 {
-	int bStartRx = 0, bStopRx = 0, bQueryPhy = 0, bQueryMac = 0, bSetBssid = 0;
-	int bmac_filter = 0, bfilter_init = 0, bmon = 0, bSmpCfg = 0, bloopbk = 0;
+	int bStartRx = 0, bStopRx = 0, bQueryPhy = 0, bQueryMac = 0, bSetBssid = 0, bSetRxframe = 0;
+	int bmac_filter = 0, bmon = 0, bSmpCfg = 0;
 	u8		input[wrqu->length];
-	char *pch, *ptmp, *token, *tmp[2] = {0x00, 0x00};
-	u32 i = 0, ii = 0, jj = 0, kk = 0, cnts = 0, ret;
+	char *pch, *token, *tmp[2] = {0x00, 0x00};
+	u32 i = 0, jj = 0, kk = 0, cnts = 0, ret;
 	PADAPTER padapter = rtw_netdev_priv(dev);
 	struct mp_priv *pmppriv = &padapter->mppriv;
 	struct dbg_rx_counter rx_counter;
@@ -883,6 +920,7 @@ int rtw_mp_arx(struct net_device *dev,
 	bQueryPhy = (strncmp(input, "phy", 3) == 0) ? 1 : 0; /* strncmp TRUE is 0*/
 	bQueryMac = (strncmp(input, "mac", 3) == 0) ? 1 : 0; /* strncmp TRUE is 0*/
 	bSetBssid = (strncmp(input, "setbssid=", 8) == 0) ? 1 : 0; /* strncmp TRUE is 0*/
+	bSetRxframe = (strncmp(input, "frametype", 9) == 0) ? 1 : 0;
 	/*bfilter_init = (strncmp(input, "filter_init",11)==0)?1:0;*/
 	bmac_filter = (strncmp(input, "accept_mac", 10) == 0) ? 1 : 0;
 	bmon = (strncmp(input, "mon=", 4) == 0) ? 1 : 0;
@@ -912,6 +950,12 @@ int rtw_mp_arx(struct net_device *dev,
 
 		pmppriv->bSetRxBssid = _TRUE;
 	}
+	if (bSetRxframe) {
+		if (strncmp(input, "frametype beacon", 16) == 0)
+			pmppriv->brx_filter_beacon = _TRUE;
+		else
+			pmppriv->brx_filter_beacon = _FALSE;
+	}
 
 	if (bmac_filter) {
 		pmppriv->bmac_filter = bmac_filter;
@@ -1038,7 +1082,6 @@ int rtw_mp_pwrtrk(struct net_device *dev,
 	u32 thermal;
 	s32 ret;
 	PADAPTER padapter = rtw_netdev_priv(dev);
-	HAL_DATA_TYPE			*pHalData = GET_HAL_DATA(padapter);
 	u8		input[wrqu->length];
 
 	if (copy_from_user(input, wrqu->pointer, wrqu->length))
@@ -1108,6 +1151,9 @@ int rtw_mp_thermal(struct net_device *dev,
 #ifdef CONFIG_RTL8192E
 	u16 addr = EEPROM_THERMAL_METER_8192E;
 #endif
+#ifdef CONFIG_RTL8192F
+	u16 addr = EEPROM_THERMAL_METER_8192F;
+#endif
 #ifdef CONFIG_RTL8723B
 	u16 addr = EEPROM_THERMAL_METER_8723B;
 #endif
@@ -1120,12 +1166,18 @@ int rtw_mp_thermal(struct net_device *dev,
 #ifdef CONFIG_RTL8188F
 	u16 addr = EEPROM_THERMAL_METER_8188F;
 #endif
+#ifdef CONFIG_RTL8188GTV
+	u16 addr = EEPROM_THERMAL_METER_8188GTV;
+#endif
 #ifdef CONFIG_RTL8822B
 	u16 addr = EEPROM_THERMAL_METER_8822B;
 #endif
 #ifdef CONFIG_RTL8821C
 	u16 addr = EEPROM_THERMAL_METER_8821C;
 #endif
+#ifdef CONFIG_RTL8710B
+	u16 addr = EEPROM_THERMAL_METER_8710B;
+#endif
 	u16 cnt = 1;
 	u16 max_available_size = 0;
 	PADAPTER padapter = rtw_netdev_priv(dev);
@@ -1163,7 +1215,6 @@ int rtw_mp_reset_stats(struct net_device *dev,
 		       struct iw_point *wrqu, char *extra)
 {
 	struct mp_priv *pmp_priv;
-	struct pkt_attrib *pattrib;
 	PADAPTER padapter = rtw_netdev_priv(dev);
 
 	pmp_priv = &padapter->mppriv;
@@ -1190,11 +1241,7 @@ int rtw_mp_dump(struct net_device *dev,
 		struct iw_point *wrqu, char *extra)
 {
 	struct mp_priv *pmp_priv;
-	struct pkt_attrib *pattrib;
-	u32 value;
 	u8		input[wrqu->length];
-	u8 rf_type, path_nums = 0;
-	u32 i, j = 1, path;
 	PADAPTER padapter = rtw_netdev_priv(dev);
 
 	pmp_priv = &padapter->mppriv;
@@ -1246,7 +1293,9 @@ int rtw_mp_SetRFPath(struct net_device *dev,
 	PADAPTER padapter = rtw_netdev_priv(dev);
 	char	input[wrqu->length];
 	int		bMain = 1, bTurnoff = 1;
+#ifdef CONFIG_ANTENNA_DIVERSITY
 	u8 ret = _TRUE;
+#endif
 
 	RTW_INFO("%s:iwpriv in=%s\n", __func__, input);
 
@@ -1475,7 +1524,7 @@ int rtw_mp_mon(struct net_device *dev,
 		if (check_fwstate(pmlmepriv, _FW_LINKED) == _TRUE) {
 			rtw_disassoc_cmd(padapter, 500, 0);
 			rtw_indicate_disconnect(padapter, 0, _FALSE);
-			/*rtw_free_assoc_resources(padapter, 1);*/
+			/*rtw_free_assoc_resources_cmd(padapter, _TRUE, 0);*/
 		}
 		rtw_pm_set_ips(padapter, IPS_NORMAL);
 		sprintf(extra, "monitor mode Stop\n");
@@ -1487,9 +1536,7 @@ int rtw_mp_mon(struct net_device *dev,
 
 int rtw_mp_pretx_proc(PADAPTER padapter, u8 bStartTest, char *extra)
 {
-	HAL_DATA_TYPE	*pHalData	= GET_HAL_DATA(padapter);
 	struct mp_priv *pmp_priv = &padapter->mppriv;
-	PMPT_CONTEXT		pMptCtx = &(padapter->mppriv.mpt_ctx);
 	char *pextra = extra;
 
 	switch (pmp_priv->mode) {
@@ -1545,7 +1592,9 @@ int rtw_mp_pretx_proc(PADAPTER padapter, u8 bStartTest, char *extra)
 			rtw_msleep_os(5);
 		}
 #ifdef CONFIG_80211N_HT
-		pmp_priv->tx.attrib.ht_en = 1;
+		if(padapter->registrypriv.ht_enable &&
+			is_supported_ht(padapter->registrypriv.wireless_mode))
+			pmp_priv->tx.attrib.ht_en = 1;
 #endif
 		pmp_priv->tx.stop = 0;
 		pmp_priv->tx.count = 1;
@@ -1575,10 +1624,12 @@ int rtw_mp_tx(struct net_device *dev,
 	HAL_DATA_TYPE	*pHalData	= GET_HAL_DATA(padapter);
 	struct mp_priv *pmp_priv = &padapter->mppriv;
 	PMPT_CONTEXT		pMptCtx = &(padapter->mppriv.mpt_ctx);
-	struct registry_priv	*pregistrypriv = &padapter->registrypriv;
 	char *pextra = extra;
 	u32 bandwidth = 0, sg = 0, channel = 6, txpower = 40, rate = 108, ant = 0, txmode = 1, count = 0;
-	u8 i = 0, j = 0, bStartTest = 1, status = 0, Idx = 0, tmpU1B = 0;
+	u8 bStartTest = 1, status = 0;
+#ifdef CONFIG_MP_VHT_HW_TX_MODE
+	u8 Idx = 0, tmpU1B;
+#endif
 	u16 antenna = 0;
 
 	if (copy_from_user(extra, wrqu->data.pointer, wrqu->data.length))
@@ -1895,7 +1946,6 @@ int rtw_mp_rx(struct net_device *dev,
 	PADAPTER padapter = rtw_netdev_priv(dev);
 	HAL_DATA_TYPE	*pHalData	= GET_HAL_DATA(padapter);
 	struct mp_priv *pmp_priv = &padapter->mppriv;
-	PMPT_CONTEXT		pMptCtx = &(padapter->mppriv.mpt_ctx);
 	char *pextra = extra;
 	u32 bandwidth = 0, sg = 0, channel = 6, ant = 0;
 	u16 antenna = 0;
@@ -2016,7 +2066,6 @@ int rtw_mp_hwtx(struct net_device *dev,
 		union iwreq_data *wrqu, char *extra)
 {
 	PADAPTER padapter = rtw_netdev_priv(dev);
-	HAL_DATA_TYPE	*pHalData	= GET_HAL_DATA(padapter);
 	struct mp_priv *pmp_priv = &padapter->mppriv;
 	PMPT_CONTEXT		pMptCtx = &(padapter->mppriv.mpt_ctx);
 
@@ -2028,10 +2077,16 @@ int rtw_mp_hwtx(struct net_device *dev,
 
 	_rtw_memset(&pMptCtx->PMacTxInfo, 0, sizeof(RT_PMAC_TX_INFO));
 	_rtw_memcpy((void *)&pMptCtx->PMacTxInfo, (void *)input, sizeof(RT_PMAC_TX_INFO));
+	_rtw_memset(wrqu->data.pointer, 0, wrqu->data.length);
 
-	mpt_ProSetPMacTx(padapter);
-	sprintf(extra, "Set PMac Tx Mode start\n");
-
+	if (pMptCtx->PMacTxInfo.bEnPMacTx == 1 && pmp_priv->mode != MP_ON) {
+		sprintf(extra, "MP Tx Running, Please Set PMac Tx Mode Stop\n");
+		RTW_INFO("Error !!! MP Tx Running, Please Set PMac Tx Mode Stop\n");
+	} else {
+		RTW_INFO("To set MAC Tx mode\n");
+		mpt_ProSetPMacTx(padapter);
+		sprintf(extra, "Set PMac Tx Mode OK\n");
+	}
 	wrqu->data.length = strlen(extra);
 #endif
 	return 0;
@@ -2122,11 +2177,10 @@ int rtw_efuse_mask_file(struct net_device *dev,
 		return 0;
 	}
 	if (strncmp(extra, "data,", 5) == 0) {
-		u8	*pch, *pdata;
+		u8	*pch;
 		char	*ptmp, tmp;
 		u8	count = 0;
 		u8	i = 0;
-		u32	datalen = 0;
 
 		ptmp = extra;
 		pch = strsep(&ptmp, ",");
@@ -2285,7 +2339,7 @@ int rtw_mp_SetBT(struct net_device *dev,
 		return -EFAULT;
 
 	*(extra + wrqu->data.length) = '\0';
-	
+
 	if (strlen(extra) < 1)
 		return -EFAULT;
 
diff --git a/rtl8723DS/os_dep/linux/mlme_linux.c b/rtl8723DS/os_dep/linux/mlme_linux.c
index 418fd69..39c0ac1 100755..100644
--- a/rtl8723DS/os_dep/linux/mlme_linux.c
+++ b/rtl8723DS/os_dep/linux/mlme_linux.c
@@ -67,7 +67,13 @@ void rtw_os_indicate_connect(_adapter *adapter)
 #endif /* CONFIG_IOCTL_CFG80211 */
 
 	rtw_indicate_wx_assoc_event(adapter);
-	rtw_netif_carrier_on(adapter->pnetdev);
+
+#ifdef CONFIG_RTW_MESH
+#if CONFIG_RTW_MESH_CTO_MGATE_CARRIER
+	if (!rtw_mesh_cto_mgate_required(adapter))
+#endif
+#endif
+		rtw_netif_carrier_on(adapter->pnetdev);
 
 	if (adapter->pid[2] != 0)
 		rtw_signal_process(adapter->pid[2], SIGALRM);
@@ -96,7 +102,6 @@ void rtw_reset_securitypriv(_adapter *adapter)
 	u32	backupTKIPcountermeasure_time = 0;
 	/* add for CONFIG_IEEE80211W, none 11w also can use */
 	_irqL irqL;
-	struct mlme_ext_priv	*pmlmeext = &adapter->mlmeextpriv;
 
 	_enter_critical_bh(&adapter->security_key_mutex, &irqL);
 
@@ -378,9 +383,6 @@ int hostapd_mode_init(_adapter *padapter)
 
 	/* pnetdev->wireless_handlers = NULL; */
 
-#ifdef CONFIG_TCP_CSUM_OFFLOAD_TX
-	pnetdev->features |= NETIF_F_IP_CSUM;
-#endif
 
 
 
diff --git a/rtl8723DS/os_dep/linux/os_intfs.c b/rtl8723DS/os_dep/linux/os_intfs.c
index 19ae08d..b02171f 100755..100644
--- a/rtl8723DS/os_dep/linux/os_intfs.c
+++ b/rtl8723DS/os_dep/linux/os_intfs.c
@@ -33,20 +33,21 @@ MODULE_VERSION(DRIVERVERSION);
 int rtw_chip_version = 0x00;
 int rtw_rfintfs = HWPI;
 int rtw_lbkmode = 0;/* RTL8712_AIR_TRX; */
-
-
+#ifdef DBG_LA_MODE
+int rtw_la_mode_en=1;
+module_param(rtw_la_mode_en, int, 0644);
+#endif
 int rtw_network_mode = Ndis802_11IBSS;/* Ndis802_11Infrastructure; */ /* infra, ad-hoc, auto */
 /* NDIS_802_11_SSID	ssid; */
 int rtw_channel = 1;/* ad-hoc support requirement */
 int rtw_wireless_mode = WIRELESS_MODE_MAX;
+module_param(rtw_wireless_mode, int, 0644);
 int rtw_vrtl_carrier_sense = AUTO_VCS;
 int rtw_vcs_type = RTS_CTS;
 int rtw_rts_thresh = 2347;
 int rtw_frag_thresh = 2346;
 int rtw_preamble = PREAMBLE_LONG;/* long, short, auto */
 int rtw_scan_mode = 1;/* active, passive */
-int rtw_adhoc_tx_pwr = 1;
-int rtw_soft_ap = 0;
 /* int smart_ps = 1; */
 #ifdef CONFIG_POWER_SAVING
 	int rtw_power_mgnt = PS_MODE_MAX;
@@ -62,16 +63,20 @@ int rtw_soft_ap = 0;
 		#if defined(CONFIG_LPS_PG)
 			/*int rtw_lps_level = LPS_PG;*//*FW not support yet*/
 			int rtw_lps_level = LPS_LCLK;
+		#elif defined(CONFIG_LPS_PG_DDMA)
+			int rtw_lps_level = LPS_PG;
 		#elif defined(CONFIG_LPS_LCLK)
 			int rtw_lps_level = LPS_LCLK;
 		#else
 			int rtw_lps_level = LPS_NORMAL;
 		#endif
 	#endif/*CONFIG_USB_HCI*/
+	int rtw_lps_chk_by_tp = 1;
 #else /* !CONFIG_POWER_SAVING */
 	int rtw_power_mgnt = PS_MODE_ACTIVE;
 	int rtw_ips_mode = IPS_NONE;
 	int rtw_lps_level = LPS_NORMAL;
+	int rtw_lps_chk_by_tp = 0;
 #endif /* CONFIG_POWER_SAVING */
 
 
@@ -81,6 +86,8 @@ MODULE_PARM_DESC(rtw_ips_mode, "The default IPS mode");
 module_param(rtw_lps_level, int, 0644);
 MODULE_PARM_DESC(rtw_lps_level, "The default LPS level");
 
+module_param(rtw_lps_chk_by_tp, int, 0644);
+
 /* LPS: 
  * rtw_smart_ps = 0 => TX: pwr bit = 1, RX: PS_Poll
  * rtw_smart_ps = 1 => TX: pwr bit = 0, RX: PS_Poll
@@ -88,6 +95,8 @@ MODULE_PARM_DESC(rtw_lps_level, "The default LPS level");
 */
 int rtw_smart_ps = 2;
 
+int rtw_max_bss_cnt = 0;
+module_param(rtw_max_bss_cnt, int, 0644);
 #ifdef CONFIG_WMMPS_STA	
 /* WMMPS: 
  * rtw_smart_ps = 0 => Only for fw test
@@ -112,6 +121,7 @@ module_param(rtw_dynamic_agg_enable, int, 0644);
 /* set log level when inserting driver module, default log level is _DRV_INFO_ = 4,
 * please refer to "How_to_set_driver_debug_log_level.doc" to set the available level.
 */
+#ifdef CONFIG_RTW_DEBUG
 #ifdef RTW_LOG_LEVEL
 	uint rtw_drv_log_level = (uint)RTW_LOG_LEVEL; /* from Makefile */
 #else
@@ -119,7 +129,7 @@ module_param(rtw_dynamic_agg_enable, int, 0644);
 #endif
 module_param(rtw_drv_log_level, uint, 0644);
 MODULE_PARM_DESC(rtw_drv_log_level, "set log level when insert driver module, default log level is _DRV_INFO_ = 4");
-
+#endif
 int rtw_radio_enable = 1;
 int rtw_long_retry_lmt = 7;
 int rtw_short_retry_lmt = 7;
@@ -163,6 +173,11 @@ uint rtw_tx_bw_mode = 0x21;
 module_param(rtw_tx_bw_mode, uint, 0644);
 MODULE_PARM_DESC(rtw_tx_bw_mode, "The max tx bw for 2.4G and 5G. format is the same as rtw_bw_mode");
 
+#ifdef CONFIG_FW_HANDLE_TXBCN
+uint rtw_tbtt_rpt = 0;	/*ROOT AP - BIT0, VAP1 - BIT1, VAP2 - BIT2, VAP3 - VAP3, FW report TBTT INT by C2H*/
+module_param(rtw_tbtt_rpt, uint, 0644);
+#endif
+
 #ifdef CONFIG_80211N_HT
 int rtw_ht_enable = 1;
 /* 0: 20 MHz, 1: 40 MHz, 2: 80 MHz, 3: 160MHz, 4: 80+80MHz
@@ -177,6 +192,8 @@ int rtw_ampdu_enable = 1;/* for enable tx_ampdu , */ /* 0: disable, 0x1:enable *
 int rtw_rx_stbc = 1;/* 0: disable, bit(0):enable 2.4g, bit(1):enable 5g, default is set to enable 2.4GHZ for IOT issue with bufflao's AP at 5GHZ */
 #if (defined(CONFIG_RTL8814A) || defined(CONFIG_RTL8822B)) && defined(CONFIG_PCI_HCI)
 int rtw_rx_ampdu_amsdu = 2;/* 0: disabled, 1:enabled, 2:auto . There is an IOT issu with DLINK DIR-629 when the flag turn on */
+#elif (defined(CONFIG_RTL8822B) && defined(CONFIG_SDIO_HCI))
+int rtw_rx_ampdu_amsdu = 1;
 #else
 int rtw_rx_ampdu_amsdu;/* 0: disabled, 1:enabled, 2:auto . There is an IOT issu with DLINK DIR-629 when the flag turn on */
 #endif
@@ -217,6 +234,7 @@ int rtw_short_gi = 0xf;
 int rtw_ldpc_cap = 0x33;
 /* BIT0: Enable VHT STBC Rx, BIT1: Enable VHT STBC Tx, BIT4: Enable HT STBC Rx, BIT5: Enable HT STBC Tx */
 int rtw_stbc_cap = 0x13;
+
 /*
 * BIT0: Enable VHT SU Beamformer
 * BIT1: Enable VHT SU Beamformee
@@ -251,11 +269,7 @@ module_param(rtw_rf_config, int, 0644);
 int rtw_check_hw_status = 0;
 
 int rtw_low_power = 0;
-#ifdef CONFIG_WIFI_TEST
-	int rtw_wifi_spec = 1;/* for wifi test */
-#else
-	int rtw_wifi_spec = 0;
-#endif
+int rtw_wifi_spec = 0;
 
 int rtw_special_rf_path = 0; /* 0: 2T2R ,1: only turn on path A 1T1R */
 
@@ -390,6 +404,12 @@ char *rtw_initmac = 0;  /* temp mac address if users want to use instead of the
 #ifdef CONFIG_AP_MODE
 u8 rtw_bmc_tx_rate = MGN_UNKNOWN;
 #endif
+#ifdef RTW_WOW_STA_MIX
+int rtw_wowlan_sta_mix_mode = 1;
+#else
+int rtw_wowlan_sta_mix_mode = 0;
+#endif
+module_param(rtw_wowlan_sta_mix_mode, int, 0644);
 module_param(rtw_pwrtrim_enable, int, 0644);
 module_param(rtw_initmac, charp, 0644);
 module_param(rtw_special_rf_path, int, 0644);
@@ -518,14 +538,6 @@ uint rtw_adaptivity_mode = CONFIG_RTW_ADAPTIVITY_MODE;
 module_param(rtw_adaptivity_mode, uint, 0644);
 MODULE_PARM_DESC(rtw_adaptivity_mode, "0:normal, 1:carrier sense");
 
-uint rtw_adaptivity_dml = CONFIG_RTW_ADAPTIVITY_DML;
-module_param(rtw_adaptivity_dml, uint, 0644);
-MODULE_PARM_DESC(rtw_adaptivity_dml, "0:disable, 1:enable");
-
-uint rtw_adaptivity_dc_backoff = CONFIG_RTW_ADAPTIVITY_DC_BACKOFF;
-module_param(rtw_adaptivity_dc_backoff, uint, 0644);
-MODULE_PARM_DESC(rtw_adaptivity_dc_backoff, "DC backoff for Adaptivity");
-
 int rtw_adaptivity_th_l2h_ini = CONFIG_RTW_ADAPTIVITY_TH_L2H_INI;
 module_param(rtw_adaptivity_th_l2h_ini, int, 0644);
 MODULE_PARM_DESC(rtw_adaptivity_th_l2h_ini, "th_l2h_ini for Adaptivity");
@@ -648,6 +660,14 @@ module_param_array(rtw_target_tx_pwr_5g_d, int, &rtw_target_tx_pwr_5g_d_num, 064
 MODULE_PARM_DESC(rtw_target_tx_pwr_5g_d, "5G target tx power (unit:dBm) of RF path D for each rate section, should match the real calibrate power, -1: undefined");
 #endif /* CONFIG_IEEE80211_BAND_5GHZ */
 
+int rtw_tsf_update_pause_factor = CONFIG_TSF_UPDATE_PAUSE_FACTOR;
+module_param(rtw_tsf_update_pause_factor, int, 0644);
+MODULE_PARM_DESC(rtw_tsf_update_pause_factor, "num of bcn intervals to stay TSF update pause status");
+
+int rtw_tsf_update_restore_factor = CONFIG_TSF_UPDATE_RESTORE_FACTOR;
+module_param(rtw_tsf_update_restore_factor, int, 0644);
+MODULE_PARM_DESC(rtw_tsf_update_restore_factor, "num of bcn intervals to stay TSF update restore status");
+
 #ifdef CONFIG_LOAD_PHY_PARA_FROM_FILE
 char *rtw_phy_file_path = REALTEK_CONFIG_PATH;
 module_param(rtw_phy_file_path, charp, 0644);
@@ -678,11 +698,34 @@ module_param(rtw_trx_share_mode, int, 0644);
 MODULE_PARM_DESC(rtw_trx_share_mode, "TRx FIFO Shared");
 #endif
 
+#ifdef CONFIG_DYNAMIC_SOML
+uint rtw_dynamic_soml_en = 1;
+module_param(rtw_dynamic_soml_en, int, 0644);
+MODULE_PARM_DESC(rtw_dynamic_soml_en, "0: disable, 1: enable with default param, 2: enable with specified param.");
+
+uint rtw_dynamic_soml_train_num = 0;
+module_param(rtw_dynamic_soml_train_num, int, 0644);
+MODULE_PARM_DESC(rtw_dynamic_soml_train_num, "SOML training number");
+
+uint rtw_dynamic_soml_interval = 0;
+module_param(rtw_dynamic_soml_interval, int, 0644);
+MODULE_PARM_DESC(rtw_dynamic_soml_interval, "SOML training interval");
+
+uint rtw_dynamic_soml_period = 0;
+module_param(rtw_dynamic_soml_period, int, 0644);
+MODULE_PARM_DESC(rtw_dynamic_soml_period, "SOML training period");
+
+uint rtw_dynamic_soml_delay = 0;
+module_param(rtw_dynamic_soml_delay, int, 0644);
+MODULE_PARM_DESC(rtw_dynamic_soml_delay, "SOML training delay");
+#endif
+
+
 int _netdev_open(struct net_device *pnetdev);
 int netdev_open(struct net_device *pnetdev);
 static int netdev_close(struct net_device *pnetdev);
-#if defined(CONFIG_PLATFORM_INTEL_BYT) && defined(CONFIG_SDIO_HCI)
-extern int rtw_sdio_set_power(struct sdio_func *func, int on);
+#ifdef CONFIG_PLATFORM_INTEL_BYT
+extern int rtw_sdio_set_power(int on);
 #endif /* CONFIG_PLATFORM_INTEL_BYT */
 
 #ifdef CONFIG_MCC_MODE
@@ -736,10 +779,10 @@ int rtw_iqk_fw_offload;
 module_param(rtw_iqk_fw_offload, int, 0644);
 
 #ifdef RTW_CHANNEL_SWITCH_OFFLOAD
-int rtw_ch_switch_offload = 1;
+int rtw_ch_switch_offload = 0;
 #else
 int rtw_ch_switch_offload;
-#endif /* RTW_IQK_FW_OFFLOAD */
+#endif /* RTW_CHANNEL_SWITCH_OFFLOAD */
 module_param(rtw_ch_switch_offload, int, 0644);
 
 #ifdef CONFIG_TDLS
@@ -752,6 +795,19 @@ int rtw_fw_param_init = 1;
 module_param(rtw_fw_param_init, int, 0644);
 #endif
 
+#ifdef CONFIG_TDMADIG
+int rtw_tdmadig_en = 1;
+/*
+1:MODE_PERFORMANCE
+2:MODE_COVERAGE
+*/
+int rtw_tdmadig_mode = 1;
+int rtw_dynamic_tdmadig = 0;
+module_param(rtw_tdmadig_en, int, 0644);
+module_param(rtw_tdmadig_mode, int, 0644);
+module_param(rtw_dynamic_tdmadig, int, 0644);
+#endif/*CONFIG_TDMADIG*/
+
 #ifdef CONFIG_WOWLAN
 /*
  * bit[0]: magic packet wake up
@@ -760,6 +816,13 @@ module_param(rtw_fw_param_init, int, 0644);
  */
 uint rtw_wakeup_event = RTW_WAKEUP_EVENT;
 module_param(rtw_wakeup_event, uint, 0644);
+/*
+ * 0: common WOWLAN
+ * bit[0]: disable BB RF
+ * bit[1]: For wireless remote controller with or without connection
+ */
+uint rtw_suspend_type = RTW_SUSPEND_TYPE;
+module_param(rtw_suspend_type, uint, 0644);
 #endif
 
 void rtw_regsty_load_target_tx_power(struct registry_priv *regsty)
@@ -869,17 +932,25 @@ uint loadparam(_adapter *padapter)
 	registry_par->frag_thresh = (u16)rtw_frag_thresh;
 	registry_par->preamble = (u8)rtw_preamble;
 	registry_par->scan_mode = (u8)rtw_scan_mode;
-	registry_par->adhoc_tx_pwr = (u8)rtw_adhoc_tx_pwr;
-	registry_par->soft_ap = (u8)rtw_soft_ap;
 	registry_par->smart_ps = (u8)rtw_smart_ps;
 	registry_par->check_fw_ps = (u8)rtw_check_fw_ps;
-	registry_par->power_mgnt = (u8)rtw_power_mgnt;
-	registry_par->ips_mode = (u8)rtw_ips_mode;
+	#ifdef CONFIG_TDMADIG
+		registry_par->tdmadig_en = (u8)rtw_tdmadig_en;
+		registry_par->tdmadig_mode = (u8)rtw_tdmadig_mode;
+		registry_par->tdmadig_dynamic = (u8) rtw_dynamic_tdmadig;
+		registry_par->power_mgnt = PS_MODE_ACTIVE;
+		registry_par->ips_mode = IPS_NONE;
+	#else
+		registry_par->power_mgnt = (u8)rtw_power_mgnt;
+		registry_par->ips_mode = (u8)rtw_ips_mode;
+	#endif/*CONFIG_TDMADIG*/
 	registry_par->lps_level = (u8)rtw_lps_level;
+	registry_par->lps_chk_by_tp = (u8)rtw_lps_chk_by_tp;
 	registry_par->radio_enable = (u8)rtw_radio_enable;
 	registry_par->long_retry_lmt = (u8)rtw_long_retry_lmt;
 	registry_par->short_retry_lmt = (u8)rtw_short_retry_lmt;
 	registry_par->busy_thresh = (u16)rtw_busy_thresh;
+	registry_par->max_bss_cnt = (u16)rtw_max_bss_cnt;
 	/* registry_par->qos_enable = (u8)rtw_qos_enable; */
 	registry_par->ack_policy = (u8)rtw_ack_policy;
 	registry_par->mp_mode = (u8)rtw_mp_mode;
@@ -909,20 +980,32 @@ uint loadparam(_adapter *padapter)
 
 #ifdef CONFIG_80211N_HT
 	registry_par->ht_enable = (u8)rtw_ht_enable;
-	registry_par->bw_mode = (u8)rtw_bw_mode;
-	registry_par->ampdu_enable = (u8)rtw_ampdu_enable;
-	registry_par->rx_stbc = (u8)rtw_rx_stbc;
-	registry_par->rx_ampdu_amsdu = (u8)rtw_rx_ampdu_amsdu;
-	registry_par->tx_ampdu_amsdu = (u8)rtw_tx_ampdu_amsdu;
-	registry_par->short_gi = (u8)rtw_short_gi;
-	registry_par->ldpc_cap = (u8)rtw_ldpc_cap;
-	registry_par->stbc_cap = (u8)rtw_stbc_cap;
-	registry_par->beamform_cap = (u8)rtw_beamform_cap;
-	registry_par->beamformer_rf_num = (u8)rtw_bfer_rf_number;
-	registry_par->beamformee_rf_num = (u8)rtw_bfee_rf_number;
-	rtw_regsty_init_rx_ampdu_sz_limit(registry_par);
+	if (registry_par->ht_enable && is_supported_ht(registry_par->wireless_mode)) {
+		registry_par->bw_mode = (u8)rtw_bw_mode;
+		registry_par->ampdu_enable = (u8)rtw_ampdu_enable;
+		registry_par->rx_stbc = (u8)rtw_rx_stbc;
+		registry_par->rx_ampdu_amsdu = (u8)rtw_rx_ampdu_amsdu;
+		registry_par->tx_ampdu_amsdu = (u8)rtw_tx_ampdu_amsdu;
+		registry_par->short_gi = (u8)rtw_short_gi;
+		registry_par->ldpc_cap = (u8)rtw_ldpc_cap;
+#if defined(CONFIG_CUSTOMER01_SMART_ANTENNA)
+		rtw_stbc_cap = 0x0;
+#elif defined(CONFIG_RTW_TX_2PATH_EN)
+		rtw_stbc_cap &= ~(BIT1|BIT5);
+#endif
+		registry_par->stbc_cap = (u8)rtw_stbc_cap;
+#if defined(CONFIG_RTW_TX_2PATH_EN)
+		rtw_beamform_cap &= ~(BIT0|BIT2|BIT4);
+#endif
+		registry_par->beamform_cap = (u8)rtw_beamform_cap;
+		registry_par->beamformer_rf_num = (u8)rtw_bfer_rf_number;
+		registry_par->beamformee_rf_num = (u8)rtw_bfee_rf_number;
+		rtw_regsty_init_rx_ampdu_sz_limit(registry_par);
+	}
+#endif
+#ifdef DBG_LA_MODE
+	registry_par->la_mode_en = (u8)rtw_la_mode_en;
 #endif
-
 #ifdef CONFIG_80211AC_VHT
 	registry_par->vht_enable = (u8)rtw_vht_enable;
 	registry_par->ampdu_factor = (u8)rtw_ampdu_factor;
@@ -1022,6 +1105,9 @@ uint loadparam(_adapter *padapter)
 
 	rtw_regsty_load_target_tx_power(registry_par);
 
+	registry_par->tsf_update_pause_factor = (u8)rtw_tsf_update_pause_factor;
+	registry_par->tsf_update_restore_factor = (u8)rtw_tsf_update_restore_factor;
+
 	registry_par->TxBBSwing_2G = (s8)rtw_TxBBSwing_2G;
 	registry_par->TxBBSwing_5G = (s8)rtw_TxBBSwing_5G;
 	registry_par->bEn_RFE = 1;
@@ -1040,11 +1126,17 @@ uint loadparam(_adapter *padapter)
 
 	registry_par->adaptivity_en = (u8)rtw_adaptivity_en;
 	registry_par->adaptivity_mode = (u8)rtw_adaptivity_mode;
-	registry_par->adaptivity_dml = (u8)rtw_adaptivity_dml;
-	registry_par->adaptivity_dc_backoff = (u8)rtw_adaptivity_dc_backoff;
 	registry_par->adaptivity_th_l2h_ini = (s8)rtw_adaptivity_th_l2h_ini;
 	registry_par->adaptivity_th_edcca_hl_diff = (s8)rtw_adaptivity_th_edcca_hl_diff;
 
+#ifdef CONFIG_DYNAMIC_SOML
+	registry_par->dyn_soml_en = (u8)rtw_dynamic_soml_en;
+	registry_par->dyn_soml_train_num = (u8)rtw_dynamic_soml_train_num;
+	registry_par->dyn_soml_interval = (u8)rtw_dynamic_soml_interval;
+	registry_par->dyn_soml_period = (u8)rtw_dynamic_soml_period;
+	registry_par->dyn_soml_delay = (u8)rtw_dynamic_soml_delay;
+#endif
+
 	registry_par->boffefusemask = (u8)rtw_OffEfuseMask;
 	registry_par->bFileMaskEfuse = (u8)rtw_FileMaskEfuse;
 
@@ -1080,11 +1172,13 @@ uint loadparam(_adapter *padapter)
 
 #ifdef CONFIG_WOWLAN
 	registry_par->wakeup_event = rtw_wakeup_event;
+	registry_par->suspend_type = rtw_suspend_type;
 #endif
 
 #ifdef CONFIG_SUPPORT_TRX_SHARED
 	registry_par->trx_share_mode = rtw_trx_share_mode;
 #endif
+	registry_par->wowlan_sta_mix_mode = rtw_wowlan_sta_mix_mode;
 
 #ifdef CONFIG_PCI_HCI
 	registry_par->pci_aspm_config = rtw_pci_aspm_enable;
@@ -1120,6 +1214,10 @@ uint loadparam(_adapter *padapter)
 #ifdef CONFIG_AP_MODE
 	registry_par->bmc_tx_rate = rtw_bmc_tx_rate;
 #endif
+#ifdef CONFIG_FW_HANDLE_TXBCN
+	registry_par->fw_tbtt_rpt = rtw_tbtt_rpt;
+#endif
+
 	return status;
 }
 
@@ -1346,6 +1444,15 @@ static int rtw_ndev_notifier_call(struct notifier_block *nb, unsigned long state
 	case NETDEV_CHANGENAME:
 		rtw_adapter_proc_replace(ndev);
 		break;
+	#ifdef CONFIG_NEW_NETDEV_HDL
+	case NETDEV_PRE_UP :
+		{
+			_adapter *adapter = rtw_netdev_priv(ndev);
+
+			rtw_pwr_wakeup(adapter);
+		}
+		break;
+	#endif
 	}
 
 	return NOTIFY_DONE;
@@ -1405,9 +1512,8 @@ static const struct net_device_ops rtw_netdev_ops = {
 
 int rtw_init_netdev_name(struct net_device *pnetdev, const char *ifname)
 {
-	_adapter *padapter = rtw_netdev_priv(pnetdev);
-
 #ifdef CONFIG_EASY_REPLACEMENT
+	_adapter *padapter = rtw_netdev_priv(pnetdev);
 	struct net_device	*TargetNetdev = NULL;
 	_adapter			*TargetAdapter = NULL;
 	struct net		*devnet = NULL;
@@ -1495,10 +1601,27 @@ struct net_device *rtw_init_netdev(_adapter *old_padapter)
 		rtw_hook_vir_if_ops(pnetdev);
 #endif /* CONFIG_CONCURRENT_MODE */
 
-#ifdef CONFIG_TCP_CSUM_OFFLOAD_TX
-	pnetdev->features |= NETIF_F_IP_CSUM;
+
+#ifdef CONFIG_TX_CSUM_OFFLOAD
+        pnetdev->features |= (NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM);
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 39)
+        pnetdev->hw_features |= (NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM);
+#endif
+#endif
+
+#ifdef CONFIG_RTW_NETIF_SG
+        pnetdev->features |= NETIF_F_SG;
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 39)
+        pnetdev->hw_features |= NETIF_F_SG;
+#endif
 #endif
 
+	if ((pnetdev->features & NETIF_F_SG) && (pnetdev->features & NETIF_F_IP_CSUM)) {
+		pnetdev->features |= (NETIF_F_TSO | NETIF_F_GSO);
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 39)
+		pnetdev->hw_features |= (NETIF_F_TSO | NETIF_F_GSO);
+#endif
+	}
 	/* pnetdev->tx_timeout = NULL; */
 	pnetdev->watchdog_timeo = HZ * 3; /* 3 second timeout */
 
@@ -1556,6 +1679,12 @@ void rtw_os_ndev_free(_adapter *adapter)
 	rtw_cfg80211_ndev_res_free(adapter);
 #endif
 
+	/* free the old_pnetdev */
+	if (adapter->rereg_nd_name_priv.old_pnetdev) {
+		rtw_free_netdev(adapter->rereg_nd_name_priv.old_pnetdev);
+		adapter->rereg_nd_name_priv.old_pnetdev = NULL;
+	}
+
 	if (adapter->pnetdev) {
 		rtw_free_netdev(adapter->pnetdev);
 		adapter->pnetdev = NULL;
@@ -1580,7 +1709,9 @@ int rtw_os_ndev_register(_adapter *adapter, const char *name)
 		goto exit;
 	}
 #endif
-
+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 19, 0)) && defined(CONFIG_PCI_HCI)
+	ndev->gro_flush_timeout = 100000;
+#endif
 	/* alloc netdev name */
 	rtw_init_netdev_name(ndev, name);
 
@@ -1780,6 +1911,7 @@ u32 rtw_start_drv_threads(_adapter *padapter)
 {
 	u32 _status = _SUCCESS;
 
+	RTW_INFO(FUNC_ADPT_FMT" enter\n", FUNC_ADPT_ARG(padapter));
 
 #ifdef CONFIG_XMIT_THREAD_MODE
 #if defined(CONFIG_SDIO_HCI)
@@ -1842,7 +1974,7 @@ u32 rtw_start_drv_threads(_adapter *padapter)
 
 void rtw_stop_drv_threads(_adapter *padapter)
 {
-
+	RTW_INFO(FUNC_ADPT_FMT" enter\n", FUNC_ADPT_ARG(padapter));
 	if (is_primary_adapter(padapter))
 		rtw_stop_cmd_thread(padapter);
 
@@ -1881,13 +2013,11 @@ void rtw_stop_drv_threads(_adapter *padapter)
 	rtw_hal_stop_thread(padapter);
 }
 
-u8 rtw_init_default_value(_adapter *padapter);
 u8 rtw_init_default_value(_adapter *padapter)
 {
 	u8 ret  = _SUCCESS;
 	struct registry_priv *pregistrypriv = &padapter->registrypriv;
 	struct xmit_priv	*pxmitpriv = &padapter->xmitpriv;
-	struct mlme_priv *pmlmepriv = &padapter->mlmepriv;
 	struct security_priv *psecuritypriv = &padapter->securitypriv;
 
 	/* xmit_priv */
@@ -1977,8 +2107,6 @@ u8 rtw_init_default_value(_adapter *padapter)
 #ifdef CONFIG_RTW_NAPI
 	padapter->napi_state = NAPI_DISABLE;
 #endif
-	padapter->tsf.sync_port =  MAX_HW_PORT;
-	padapter->tsf.offset = 0;
 
 #ifdef CONFIG_RTW_ACS
 	if (pregistrypriv->acs_mode)
@@ -1994,6 +2122,10 @@ u8 rtw_init_default_value(_adapter *padapter)
 #endif
 	return ret;
 }
+#ifdef CONFIG_CLIENT_PORT_CFG
+extern void rtw_clt_port_init(struct clt_port_t  *cltp);
+extern void rtw_clt_port_deinit(struct clt_port_t  *cltp);
+#endif
 
 struct dvobj_priv *devobj_init(void)
 {
@@ -2011,7 +2143,9 @@ struct dvobj_priv *devobj_init(void)
 #ifdef CONFIG_SDIO_INDIRECT_ACCESS
 	_rtw_mutex_init(&pdvobj->sd_indirect_access_mutex);
 #endif
-
+#ifdef CONFIG_SYSON_INDIRECT_ACCESS
+	_rtw_mutex_init(&pdvobj->syson_indirect_access_mutex);
+#endif
 #ifdef CONFIG_RTW_CUSTOMER_STR
 	_rtw_mutex_init(&pdvobj->customer_str_mutex);
 	_rtw_memset(pdvobj->customer_str, 0xFF, RTW_CUSTOMER_STR_LEN);
@@ -2022,6 +2156,9 @@ struct dvobj_priv *devobj_init(void)
 	ATOMIC_SET(&pdvobj->disable_func, 0);
 
 	rtw_macid_ctl_init(&pdvobj->macid_ctl);
+#ifdef CONFIG_CLIENT_PORT_CFG
+	rtw_clt_port_init(&pdvobj->clt_port);
+#endif
 	_rtw_spinlock_init(&pdvobj->cam_ctl.lock);
 	_rtw_mutex_init(&pdvobj->cam_ctl.sec_cam_access_mutex);
 #if defined(RTK_129X_PLATFORM) && defined(CONFIG_PCI_HCI)
@@ -2032,18 +2169,23 @@ struct dvobj_priv *devobj_init(void)
 #endif
 
 #ifdef CONFIG_AP_MODE
+	#ifdef CONFIG_SUPPORT_MULTI_BCN
 	pdvobj->nr_ap_if = 0;
 	pdvobj->inter_bcn_space = DEFAULT_BCN_INTERVAL; /* default value is equal to the default beacon_interval (100ms) */
 	_rtw_init_queue(&pdvobj->ap_if_q);
-#ifdef CONFIG_SWTIMER_BASED_TXBCN
+	pdvobj->vap_map = 0;
+	#endif /*CONFIG_SUPPORT_MULTI_BCN*/
+	#ifdef CONFIG_SWTIMER_BASED_TXBCN
 	rtw_init_timer(&(pdvobj->txbcn_timer), NULL, tx_beacon_timer_handlder, pdvobj);
-#endif
+	#endif
 #endif
 
 	rtw_init_timer(&(pdvobj->dynamic_chk_timer), NULL, rtw_dynamic_check_timer_handlder, pdvobj);
+	rtw_init_timer(&(pdvobj->periodic_tsf_update_end_timer), NULL, rtw_hal_periodic_tsf_update_end_timer_hdl, pdvobj);
 
 #ifdef CONFIG_MCC_MODE
 	_rtw_mutex_init(&(pdvobj->mcc_objpriv.mcc_mutex));
+	_rtw_mutex_init(&(pdvobj->mcc_objpriv.mcc_tsf_req_mutex));
 	_rtw_spinlock_init(&pdvobj->mcc_objpriv.mcc_lock);
 #endif /* CONFIG_MCC_MODE */
 
@@ -2052,6 +2194,13 @@ struct dvobj_priv *devobj_init(void)
 #endif /* CONFIG_RTW_NAPI_DYNAMIC */
 
 
+#ifdef CONFIG_RTW_TPT_MODE
+	pdvobj->tpt_mode = 0;
+	pdvobj->edca_be_ul = 0x5ea42b;
+	pdvobj->edca_be_dl = 0x00a42b;
+#endif 
+	pdvobj->scan_deny = _FALSE;
+
 	return pdvobj;
 
 }
@@ -2068,6 +2217,7 @@ void devobj_deinit(struct dvobj_priv *pdvobj)
 
 #ifdef CONFIG_MCC_MODE
 	_rtw_mutex_free(&(pdvobj->mcc_objpriv.mcc_mutex));
+	_rtw_mutex_free(&(pdvobj->mcc_objpriv.mcc_tsf_req_mutex));
 	_rtw_spinlock_free(&pdvobj->mcc_objpriv.mcc_lock);
 #endif /* CONFIG_MCC_MODE */
 
@@ -2084,8 +2234,15 @@ void devobj_deinit(struct dvobj_priv *pdvobj)
 #ifdef CONFIG_SDIO_INDIRECT_ACCESS
 	_rtw_mutex_free(&pdvobj->sd_indirect_access_mutex);
 #endif
+#ifdef CONFIG_SYSON_INDIRECT_ACCESS
+	_rtw_mutex_free(&pdvobj->syson_indirect_access_mutex);
+#endif
 
 	rtw_macid_ctl_deinit(&pdvobj->macid_ctl);
+#ifdef CONFIG_CLIENT_PORT_CFG
+	rtw_clt_port_deinit(&pdvobj->clt_port);
+#endif
+
 	_rtw_spinlock_free(&pdvobj->cam_ctl.lock);
 	_rtw_mutex_free(&pdvobj->cam_ctl.sec_cam_access_mutex);
 
@@ -2095,9 +2252,9 @@ void devobj_deinit(struct dvobj_priv *pdvobj)
 #ifdef CONFIG_MBSSID_CAM
 	rtw_mbid_cam_deinit(pdvobj);
 #endif
-
+#ifdef CONFIG_SUPPORT_MULTI_BCN
 	_rtw_spinlock_free(&(pdvobj->ap_if_q.lock));
-
+#endif
 	rtw_mfree((u8 *)pdvobj, sizeof(*pdvobj));
 }
 
@@ -2142,15 +2299,11 @@ u8 rtw_reset_drv_sw(_adapter *padapter)
 	struct pwrctrl_priv *pwrctrlpriv = adapter_to_pwrctl(padapter);
 
 	/* hal_priv */
-	if (is_primary_adapter(padapter))
-		rtw_hal_def_value_init(padapter);
+	rtw_hal_def_value_init(padapter);
 
 	RTW_ENABLE_FUNC(padapter, DF_RX_BIT);
 	RTW_ENABLE_FUNC(padapter, DF_TX_BIT);
 
-	padapter->tsf.sync_port =  MAX_HW_PORT;
-	padapter->tsf.offset = 0;
-
 	padapter->bLinkInfoDump = 0;
 
 	padapter->xmitpriv.tx_pkts = 0;
@@ -2189,12 +2342,25 @@ u8 rtw_reset_drv_sw(_adapter *padapter)
 
 u8 rtw_init_drv_sw(_adapter *padapter)
 {
-
 	u8	ret8 = _SUCCESS;
 
+#ifdef CONFIG_RTW_CFGVENDOR_RANDOM_MAC_OUI
+	struct rtw_wdev_priv *pwdev_priv = adapter_wdev_data(padapter);
+#endif
 
-
+	#if defined(CONFIG_AP_MODE) && defined(CONFIG_SUPPORT_MULTI_BCN)
 	_rtw_init_listhead(&padapter->list);
+	#ifdef CONFIG_FW_HANDLE_TXBCN
+	padapter->vap_id = CONFIG_LIMITED_AP_NUM;
+	if (is_primary_adapter(padapter))
+		adapter_to_dvobj(padapter)->vap_tbtt_rpt_map = adapter_to_regsty(padapter)->fw_tbtt_rpt;
+	#endif
+	#endif
+
+	#ifdef CONFIG_CLIENT_PORT_CFG
+	padapter->client_id = MAX_CLIENT_PORT_NUM;
+	padapter->client_port = CLT_PORT_INVALID;
+	#endif
 
 	ret8 = rtw_init_default_value(padapter);
 
@@ -2244,6 +2410,10 @@ u8 rtw_init_drv_sw(_adapter *padapter)
 	}
 #endif /* CONFIG_TDLS */
 
+#ifdef CONFIG_RTW_MESH
+	rtw_mesh_cfg_init(padapter);
+#endif
+
 	if (_rtw_init_xmit_priv(&padapter->xmitpriv, padapter) == _FAIL) {
 		RTW_INFO("Can't _rtw_init_xmit_priv\n");
 		ret8 = _FAIL;
@@ -2332,6 +2502,10 @@ u8 rtw_init_drv_sw(_adapter *padapter)
 	rtw_init_rm(padapter);
 #endif
 
+#ifdef CONFIG_RTW_CFGVENDOR_RANDOM_MAC_OUI
+	memset(pwdev_priv->pno_mac_addr, 0xFF, ETH_ALEN);
+#endif
+
 exit:
 
 
@@ -2355,10 +2529,11 @@ void rtw_cancel_all_timer(_adapter *padapter)
 	_cancel_timer_ex(&padapter->mlmepriv.scan_to_timer);
 
 #ifdef CONFIG_DFS_MASTER
-	_cancel_timer_ex(&padapter->mlmepriv.dfs_master_timer);
+	_cancel_timer_ex(&adapter_to_rfctl(padapter)->radar_detect_timer);
 #endif
 
 	_cancel_timer_ex(&adapter_to_dvobj(padapter)->dynamic_chk_timer);
+	_cancel_timer_ex(&adapter_to_dvobj(padapter)->periodic_tsf_update_end_timer);
 #ifdef CONFIG_RTW_SW_LED
 	/* cancel sw led timer */
 	rtw_hal_sw_led_deinit(padapter);
@@ -2467,13 +2642,6 @@ u8 rtw_free_drv_sw(_adapter *padapter)
 
 	rtw_hal_free_data(padapter);
 
-
-	/* free the old_pnetdev */
-	if (padapter->rereg_nd_name_priv.old_pnetdev) {
-		free_netdev(padapter->rereg_nd_name_priv.old_pnetdev);
-		padapter->rereg_nd_name_priv.old_pnetdev = NULL;
-	}
-
 	return _SUCCESS;
 
 }
@@ -2489,6 +2657,7 @@ void rtw_intf_stop(_adapter *adapter)
 }
 
 #ifdef CONFIG_CONCURRENT_MODE
+#ifndef CONFIG_NEW_NETDEV_HDL
 int _netdev_vir_if_open(struct net_device *pnetdev)
 {
 	_adapter *padapter = (_adapter *)rtw_netdev_priv(pnetdev);
@@ -2623,13 +2792,19 @@ static int netdev_vir_if_close(struct net_device *pnetdev)
 
 	return 0;
 }
+#endif /*#ifndef CONFIG_NEW_NETDEV_HDL*/
 
 #if (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 29))
 static const struct net_device_ops rtw_netdev_vir_if_ops = {
 	.ndo_init = rtw_ndev_init,
 	.ndo_uninit = rtw_ndev_uninit,
+	#ifdef CONFIG_NEW_NETDEV_HDL
+	.ndo_open = netdev_open,
+	.ndo_stop = netdev_close,
+	#else
 	.ndo_open = netdev_vir_if_open,
 	.ndo_stop = netdev_vir_if_close,
+	#endif
 	.ndo_start_xmit = rtw_xmit_entry,
 	.ndo_set_mac_address = rtw_net_set_mac_address,
 	.ndo_get_stats = rtw_net_get_stats,
@@ -2647,8 +2822,14 @@ static void rtw_hook_vir_if_ops(struct net_device *ndev)
 #else
 	ndev->init = rtw_ndev_init;
 	ndev->uninit = rtw_ndev_uninit;
+	#ifdef CONFIG_NEW_NETDEV_HDL
+	ndev->open = netdev_open;
+	ndev->stop = netdev_close;
+	#else
 	ndev->open = netdev_vir_if_open;
 	ndev->stop = netdev_vir_if_close;
+	#endif
+
 	ndev->set_mac_address = rtw_net_set_mac_address;
 #endif
 }
@@ -2725,6 +2906,10 @@ _adapter *rtw_drv_add_vir_if(_adapter *primary_padapter,
 #ifdef CONFIG_P2P
 	rtw_init_wifidirect_addrs(padapter, adapter_mac_addr(padapter), adapter_mac_addr(padapter));
 #endif
+
+	rtw_led_set_ctl_en_mask_virtual(padapter);
+	rtw_led_set_iface_en(padapter, 1);
+
 	res = _SUCCESS;
 
 free_drv_sw:
@@ -2746,6 +2931,7 @@ void rtw_drv_stop_vir_if(_adapter *padapter)
 
 	if (padapter == NULL)
 		return;
+	RTW_INFO(FUNC_ADPT_FMT" enter\n", FUNC_ADPT_ARG(padapter));
 
 	pnetdev = padapter->pnetdev;
 
@@ -2768,11 +2954,14 @@ void rtw_drv_stop_vir_if(_adapter *padapter)
 		#endif
 
 		rtw_intf_stop(padapter);
-
+	#ifndef CONFIG_NEW_NETDEV_HDL
 		rtw_stop_drv_threads(padapter);
-
+	#endif
 		padapter->bup = _FALSE;
 	}
+	#ifdef CONFIG_NEW_NETDEV_HDL
+	rtw_stop_drv_threads(padapter);
+	#endif
 	/* cancel timer after thread stop */
 	rtw_cancel_all_timer(padapter);
 }
@@ -2808,21 +2997,6 @@ void rtw_drv_free_vir_ifaces(struct dvobj_priv *dvobj)
 		rtw_drv_free_vir_if(dvobj->padapters[i]);
 }
 
-void rtw_drv_del_vir_if(_adapter *padapter)
-{
-	rtw_drv_stop_vir_if(padapter);
-	rtw_drv_free_vir_if(padapter);
-}
-
-void rtw_drv_del_vir_ifaces(_adapter *primary_padapter)
-{
-	int i;
-	struct dvobj_priv *dvobj = primary_padapter->dvobj;
-
-	for (i = VIF_START_ID; i < dvobj->iface_nums; i++)
-		rtw_drv_del_vir_if(dvobj->padapters[i]);
-
-}
 
 #endif /*end of CONFIG_CONCURRENT_MODE*/
 
@@ -2877,7 +3051,6 @@ static int rtw_inet6addr_notifier_call(struct notifier_block *nb,
 {
 	struct inet6_ifaddr *inet6_ifa = data;
 	struct net_device *ndev;
-	struct ipv6_addr *_ipv6_addr = NULL;
 	struct pwrctrl_priv *pwrctl = NULL;
 	struct mlme_ext_priv *pmlmeext = NULL;
 	struct mlme_ext_info *pmlmeinfo = NULL;
@@ -3124,14 +3297,121 @@ void netdev_br_init(struct net_device *netdev)
 }
 #endif /* CONFIG_BR_EXT */
 
+#ifdef CONFIG_NEW_NETDEV_HDL
+int _netdev_open(struct net_device *pnetdev)
+{
+	uint status;
+	_adapter *padapter = (_adapter *)rtw_netdev_priv(pnetdev);
+	struct pwrctrl_priv *pwrctrlpriv = adapter_to_pwrctl(padapter);
+
+	RTW_INFO(FUNC_NDEV_FMT" start\n", FUNC_NDEV_ARG(pnetdev));
+
+	#ifdef CONFIG_AUTOSUSPEND
+	if (pwrctrlpriv->ps_flag == _TRUE) {
+		padapter->net_closed = _FALSE;
+		goto netdev_open_normal_process;
+	}
+	#endif /*CONFIG_AUTOSUSPEND*/
+
+	if (!rtw_is_hw_init_completed(padapter)) { // ips 
+		rtw_clr_surprise_removed(padapter);
+		rtw_clr_drv_stopped(padapter);
+		RTW_ENABLE_FUNC(padapter, DF_RX_BIT);
+		RTW_ENABLE_FUNC(padapter, DF_TX_BIT);
+		status = rtw_hal_init(padapter);
+		if (status == _FAIL)
+			goto netdev_open_error;
+		rtw_led_control(padapter, LED_CTL_NO_LINK);
+		#ifndef RTW_HALMAC
+		status = rtw_mi_start_drv_threads(padapter);
+		if (status == _FAIL) {
+			RTW_ERR(FUNC_NDEV_FMT "Initialize driver thread failed!\n", FUNC_NDEV_ARG(pnetdev));
+			goto netdev_open_error;
+		}
+
+		rtw_intf_start(GET_PRIMARY_ADAPTER(padapter));
+		#endif /* !RTW_HALMAC */
+
+		{
+	#ifdef CONFIG_BT_COEXIST_SOCKET_TRX
+			_adapter *prim_adpt = GET_PRIMARY_ADAPTER(padapter);
+		
+			if (prim_adpt && (_TRUE == prim_adpt->EEPROMBluetoothCoexist)) {
+				rtw_btcoex_init_socket(prim_adpt);
+				prim_adpt->coex_info.BtMgnt.ExtConfig.HCIExtensionVer = 0x04;
+				rtw_btcoex_SetHciVersion(prim_adpt, 0x04);
+			}
+	#endif /* CONFIG_BT_COEXIST_SOCKET_TRX */
+
+			_set_timer(&adapter_to_dvobj(padapter)->dynamic_chk_timer, 2000);
+
+	#ifndef CONFIG_IPS_CHECK_IN_WD
+			rtw_set_pwr_state_check_timer(pwrctrlpriv);
+	#endif /*CONFIG_IPS_CHECK_IN_WD*/
+		}
+
+	}
+
+	/*if (padapter->bup == _FALSE) */
+	{
+		rtw_hal_iface_init(padapter);
+
+		#ifdef CONFIG_RTW_NAPI
+		if(padapter->napi_state == NAPI_DISABLE) {
+			napi_enable(&padapter->napi);
+			padapter->napi_state = NAPI_ENABLE;
+		}
+		#endif
+
+		#ifdef CONFIG_IOCTL_CFG80211
+		rtw_cfg80211_init_wiphy(padapter);
+		rtw_cfg80211_init_wdev_data(padapter);
+		#endif
+		/* rtw_netif_carrier_on(pnetdev); */ /* call this func when rtw_joinbss_event_callback return success */
+		rtw_netif_wake_queue(pnetdev);
+
+		#ifdef CONFIG_BR_EXT
+		if (is_primary_adapter(padapter))
+			netdev_br_init(pnetdev);
+		#endif /* CONFIG_BR_EXT */
+
+
+		padapter->bup = _TRUE;
+		padapter->net_closed = _FALSE;
+		padapter->netif_up = _TRUE;
+		pwrctrlpriv->bips_processing = _FALSE;
+	}
+
+
+netdev_open_normal_process:
+	RTW_INFO(FUNC_NDEV_FMT" Success (bup=%d)\n", FUNC_NDEV_ARG(pnetdev), padapter->bup);
+	return 0;
+
+netdev_open_error:
+	padapter->bup = _FALSE;
+
+	#ifdef CONFIG_RTW_NAPI
+	if(padapter->napi_state == NAPI_ENABLE) {
+		napi_disable(&padapter->napi);
+		padapter->napi_state = NAPI_DISABLE;
+	}
+	#endif
+
+	rtw_netif_carrier_off(pnetdev);
+	rtw_netif_stop_queue(pnetdev);
+
+	RTW_ERR(FUNC_NDEV_FMT" Failed!! (bup=%d)\n", FUNC_NDEV_ARG(pnetdev), padapter->bup);
+
+	return -1;
+
+}
+
+#else
 int _netdev_open(struct net_device *pnetdev)
 {
 	uint status;
 	_adapter *padapter = (_adapter *)rtw_netdev_priv(pnetdev);
 	struct pwrctrl_priv *pwrctrlpriv = adapter_to_pwrctl(padapter);
-#if defined(CONFIG_PLATFORM_INTEL_BYT) && defined(CONFIG_SDIO_HCI)
-	struct sdio_func *func = padapter->dvobj->intf_data.func;
-#endif /* CONFIG_PLATFORM_INTEL_BYT */
 #ifdef CONFIG_BT_COEXIST_SOCKET_TRX
 	HAL_DATA_TYPE		*pHalData = GET_HAL_DATA(padapter);
 #endif /* CONFIG_BT_COEXIST_SOCKET_TRX */
@@ -3141,6 +3421,10 @@ int _netdev_open(struct net_device *pnetdev)
 
 	padapter->netif_up = _TRUE;
 
+#ifdef CONFIG_PLATFORM_INTEL_BYT
+	rtw_sdio_set_power(1);
+#endif /* CONFIG_PLATFORM_INTEL_BYT */
+
 	#ifdef CONFIG_AUTOSUSPEND
 	if (pwrctrlpriv->ps_flag == _TRUE) {
 		padapter->net_closed = _FALSE;
@@ -3156,9 +3440,6 @@ int _netdev_open(struct net_device *pnetdev)
 #endif
 		rtw_init_wifidirect_addrs(padapter, adapter_mac_addr(padapter), adapter_mac_addr(padapter));
 		_rtw_memcpy(pnetdev->dev_addr, adapter_mac_addr(padapter), ETH_ALEN);
-#if defined(CONFIG_SDIO_HCI)
-		rtw_sdio_set_power(func,1);
-#endif
 #endif /* CONFIG_PLATFORM_INTEL_BYT */
 
 		rtw_clr_surprise_removed(padapter);
@@ -3279,7 +3560,7 @@ netdev_open_error:
 	return -1;
 
 }
-
+#endif
 int netdev_open(struct net_device *pnetdev)
 {
 	int ret = _FALSE;
@@ -3292,12 +3573,16 @@ int netdev_open(struct net_device *pnetdev)
 	}
 
 	_enter_critical_mutex(&(adapter_to_dvobj(padapter)->hw_init_mutex), NULL);
+#ifdef CONFIG_NEW_NETDEV_HDL
+	ret = _netdev_open(pnetdev);
+#else
 	if (is_primary_adapter(padapter))
 		ret = _netdev_open(pnetdev);
 #ifdef CONFIG_CONCURRENT_MODE
 	else
 		ret = _netdev_vir_if_open(pnetdev);
 #endif
+#endif
 	_exit_critical_mutex(&(adapter_to_dvobj(padapter)->hw_init_mutex), NULL);
 
 
@@ -3322,13 +3607,22 @@ int  ips_netdrv_open(_adapter *padapter)
 
 	rtw_clr_drv_stopped(padapter);
 	/* padapter->bup = _TRUE; */
-
+#ifdef CONFIG_NEW_NETDEV_HDL
+	if (!rtw_is_hw_init_completed(padapter)) {
+		status = rtw_hal_init(padapter);
+		if (status == _FAIL) {
+			goto netdev_open_error;
+		}
+		rtw_mi_hal_iface_init(padapter);
+	}
+#else
 	status = rtw_hal_init(padapter);
 	if (status == _FAIL) {
 		goto netdev_open_error;
 	}
+#endif
 #if 0
-	rtw_restore_mac_addr(padapter);
+	rtw_mi_set_mac_addr(padapter);
 #endif
 #ifndef RTW_HALMAC
 	rtw_intf_start(padapter);
@@ -3351,10 +3645,12 @@ netdev_open_error:
 int rtw_ips_pwr_up(_adapter *padapter)
 {
 	int result;
-	PHAL_DATA_TYPE pHalData = GET_HAL_DATA(padapter);
+#if defined(CONFIG_SWLPS_IN_IPS) || defined(CONFIG_FWLPS_IN_IPS)
 #ifdef DBG_CONFIG_ERROR_DETECT
+	PHAL_DATA_TYPE pHalData = GET_HAL_DATA(padapter);
 	struct sreset_priv *psrtpriv = &pHalData->srestpriv;
 #endif/* #ifdef DBG_CONFIG_ERROR_DETECT */
+#endif /* defined(CONFIG_SWLPS_IN_IPS) || defined(CONFIG_FWLPS_IN_IPS) */
 	systime start_time = rtw_get_current_time();
 	RTW_INFO("===>  rtw_ips_pwr_up..............\n");
 
@@ -3387,12 +3683,12 @@ void rtw_ips_pwr_down(_adapter *padapter)
 #endif
 void rtw_ips_dev_unload(_adapter *padapter)
 {
-	struct net_device *pnetdev = (struct net_device *)padapter->pnetdev;
-	struct xmit_priv	*pxmitpriv = &(padapter->xmitpriv);
-	PHAL_DATA_TYPE pHalData = GET_HAL_DATA(padapter);
+#if defined(CONFIG_SWLPS_IN_IPS) || defined(CONFIG_FWLPS_IN_IPS)
 #ifdef DBG_CONFIG_ERROR_DETECT
+	PHAL_DATA_TYPE pHalData = GET_HAL_DATA(padapter);
 	struct sreset_priv *psrtpriv = &pHalData->srestpriv;
 #endif/* #ifdef DBG_CONFIG_ERROR_DETECT */
+#endif /* defined(CONFIG_SWLPS_IN_IPS) || defined(CONFIG_FWLPS_IN_IPS) */
 	RTW_INFO("====> %s...\n", __FUNCTION__);
 
 
@@ -3410,7 +3706,97 @@ void rtw_ips_dev_unload(_adapter *padapter)
 		rtw_hal_deinit(padapter);
 
 }
+#ifdef CONFIG_NEW_NETDEV_HDL
+int _pm_netdev_open(_adapter *padapter)
+{
+	uint status;
+	struct pwrctrl_priv *pwrctrlpriv = adapter_to_pwrctl(padapter);
+	struct net_device *pnetdev = padapter->pnetdev;
+
+	RTW_INFO(FUNC_NDEV_FMT" start\n", FUNC_NDEV_ARG(pnetdev));
+
+	#ifdef CONFIG_AUTOSUSPEND
+	if (pwrctrlpriv->ps_flag == _TRUE) {
+		padapter->net_closed = _FALSE;
+		goto netdev_open_normal_process;
+	}
+	#endif /*CONFIG_AUTOSUSPEND*/
+
+	if (!rtw_is_hw_init_completed(padapter)) { // ips 
+		rtw_clr_surprise_removed(padapter);
+		rtw_clr_drv_stopped(padapter);
+		status = rtw_hal_init(padapter);
+		if (status == _FAIL)
+			goto netdev_open_error;
+		rtw_led_control(padapter, LED_CTL_NO_LINK);
+		#ifndef RTW_HALMAC
+		status = rtw_mi_start_drv_threads(padapter);
+		if (status == _FAIL) {
+			RTW_ERR(FUNC_NDEV_FMT "Initialize driver thread failed!\n", FUNC_NDEV_ARG(pnetdev));
+			goto netdev_open_error;
+		}
+
+		rtw_intf_start(GET_PRIMARY_ADAPTER(padapter));
+		#endif /* !RTW_HALMAC */
+
+		{
+			_set_timer(&adapter_to_dvobj(padapter)->dynamic_chk_timer, 2000);
+
+	#ifndef CONFIG_IPS_CHECK_IN_WD
+			rtw_set_pwr_state_check_timer(pwrctrlpriv);
+	#endif /*CONFIG_IPS_CHECK_IN_WD*/
+		}
+
+	}
+
+	/*if (padapter->bup == _FALSE) */
+	{
+		rtw_hal_iface_init(padapter);
+
+		padapter->bup = _TRUE;
+		padapter->net_closed = _FALSE;
+		padapter->netif_up = _TRUE;
+		pwrctrlpriv->bips_processing = _FALSE;
+	}
+
+
+netdev_open_normal_process:
+	RTW_INFO(FUNC_NDEV_FMT" Success (bup=%d)\n", FUNC_NDEV_ARG(pnetdev), padapter->bup);
+	return 0;
+
+netdev_open_error:
+	padapter->bup = _FALSE;
+
+	rtw_netif_carrier_off(pnetdev);
+	rtw_netif_stop_queue(pnetdev);
+
+	RTW_ERR(FUNC_NDEV_FMT" Failed!! (bup=%d)\n", FUNC_NDEV_ARG(pnetdev), padapter->bup);
+
+	return -1;
+
+}
+int _mi_pm_netdev_open(struct net_device *pnetdev)
+{
+	int i;
+	int status = 0;
+	_adapter *padapter = (_adapter *)rtw_netdev_priv(pnetdev);
+	_adapter *iface;
+	struct dvobj_priv *dvobj = adapter_to_dvobj(padapter);
+
+	for (i = 0; i < dvobj->iface_nums; i++) {
+		iface = dvobj->padapters[i];
+		if (iface->netif_up) {
+			status = _pm_netdev_open(iface);
+			if (status == -1) {
+				RTW_ERR("%s failled\n", __func__);
+				break;
+			}
+		}
+	}
 
+	return status;
+}
+#endif /*CONFIG_NEW_NETDEV_HDL*/
 int pm_netdev_open(struct net_device *pnetdev, u8 bnormal)
 {
 	int status = 0;
@@ -3419,10 +3805,11 @@ int pm_netdev_open(struct net_device *pnetdev, u8 bnormal)
 
 	if (_TRUE == bnormal) {
 		_enter_critical_mutex(&(adapter_to_dvobj(padapter)->hw_init_mutex), NULL);
+		#ifdef CONFIG_NEW_NETDEV_HDL
+		status = _mi_pm_netdev_open(pnetdev);
+		#else
 		status = _netdev_open(pnetdev);
-#if 0
-		rtw_restore_mac_addr(padapter);
-#endif
+		#endif
 		_exit_critical_mutex(&(adapter_to_dvobj(padapter)->hw_init_mutex), NULL);
 	}
 #ifdef CONFIG_IPS
@@ -3432,15 +3819,14 @@ int pm_netdev_open(struct net_device *pnetdev, u8 bnormal)
 
 	return status;
 }
-
+#ifdef CONFIG_CLIENT_PORT_CFG
+extern void rtw_hw_client_port_release(_adapter *adapter);
+#endif
 static int netdev_close(struct net_device *pnetdev)
 {
 	_adapter *padapter = (_adapter *)rtw_netdev_priv(pnetdev);
 	struct pwrctrl_priv *pwrctl = adapter_to_pwrctl(padapter);
 	struct mlme_priv	*pmlmepriv = &padapter->mlmepriv;
-#if defined(CONFIG_PLATFORM_INTEL_BYT) && defined(CONFIG_SDIO_HCI)
-	struct sdio_func *func = padapter->dvobj->intf_data.func;
-#endif /* CONFIG_PLATFORM_INTEL_BYT */
 #ifdef CONFIG_BT_COEXIST_SOCKET_TRX
 	HAL_DATA_TYPE		*pHalData = GET_HAL_DATA(padapter);
 #endif /* CONFIG_BT_COEXIST_SOCKET_TRX */
@@ -3458,6 +3844,10 @@ static int netdev_close(struct net_device *pnetdev)
 	padapter->netif_up = _FALSE;
 	pmlmepriv->LinkDetectInfo.bBusyTraffic = _FALSE;
 
+#ifdef CONFIG_CLIENT_PORT_CFG
+	if (MLME_IS_STA(padapter))
+		rtw_hw_client_port_release(padapter);
+#endif
 	/*	if (!rtw_is_hw_init_completed(padapter)) {
 			RTW_INFO("(1)871x_drv - drv_close, bup=%d, hw_init_completed=%s\n", padapter->bup, rtw_is_hw_init_completed(padapter)?"_TRUE":"_FALSE");
 
@@ -3476,16 +3866,14 @@ static int netdev_close(struct net_device *pnetdev)
 #ifndef CONFIG_ANDROID
 		/* s2. */
 		LeaveAllPowerSaveMode(padapter);
-		rtw_disassoc_cmd(padapter, 500, RTW_CMDF_DIRECTLY);
+		rtw_disassoc_cmd(padapter, 500, RTW_CMDF_WAIT_ACK);
 		/* s2-2.  indicate disconnect to os */
 		rtw_indicate_disconnect(padapter, 0, _FALSE);
 		/* s2-3. */
-		rtw_free_assoc_resources(padapter, 1);
+		rtw_free_assoc_resources_cmd(padapter, _TRUE, RTW_CMDF_WAIT_ACK);
 		/* s2-4. */
 		rtw_free_network_queue(padapter, _TRUE);
 #endif
-		/* Close LED */
-		rtw_led_control(padapter, LED_CTL_POWER_OFF);
 	}
 
 #ifdef CONFIG_BR_EXT
@@ -3501,8 +3889,8 @@ static int netdev_close(struct net_device *pnetdev)
 		rtw_p2p_enable(padapter, P2P_ROLE_DISABLE);
 #endif /* CONFIG_P2P */
 
+	rtw_scan_abort(padapter); /* stop scanning process before wifi is going to down */
 #ifdef CONFIG_IOCTL_CFG80211
-	rtw_scan_abort(padapter);
 	rtw_cfg80211_wait_scan_req_empty(padapter, 200);
 	adapter_wdev_data(padapter)->bandroid_scan = _FALSE;
 	/* padapter->rtw_wdev->iftype = NL80211_IFTYPE_MONITOR; */ /* set this at the end */
@@ -3534,9 +3922,8 @@ static int netdev_close(struct net_device *pnetdev)
 		rtw_msleep_os(1);
 
 	rtw_dev_unload(padapter);
-#if defined(CONFIG_SDIO_HCI)
-	rtw_sdio_set_power(func,0);
-#endif
+	rtw_sdio_set_power(0);
+
 #endif /* !CONFIG_PLATFORM_INTEL_BYT */
 
 	RTW_INFO("-871x_drv - drv_close, bup=%d\n", padapter->bup);
@@ -3688,7 +4075,11 @@ restart:
 
 		oldfs = get_fs();
 		set_fs(KERNEL_DS);
+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(4, 7, 0))
+		err = sock_recvmsg(sock, &msg, MSG_DONTWAIT);
+#else
 		err = sock_recvmsg(sock, &msg, PAGE_SIZE, MSG_DONTWAIT);
+#endif
 		set_fs(oldfs);
 
 		if (err < 0)
@@ -3846,7 +4237,7 @@ int	rtw_gw_addr_query(_adapter *padapter)
 		pmlmepriv->gw_ip[1] = (gw_addr & 0xff00) >> 8;
 		pmlmepriv->gw_ip[2] = (gw_addr & 0xff0000) >> 16;
 		pmlmepriv->gw_ip[3] = (gw_addr & 0xff000000) >> 24;
-		_rtw_memcpy(pmlmepriv->gw_mac_addr, gw_mac, 6);
+		_rtw_memcpy(pmlmepriv->gw_mac_addr, gw_mac, ETH_ALEN);
 		RTW_INFO("%s Gateway Mac:\t" MAC_FMT "\n", __FUNCTION__, MAC_ARG(pmlmepriv->gw_mac_addr));
 		RTW_INFO("%s Gateway IP:\t" IP_FMT "\n", __FUNCTION__, IP_ARG(pmlmepriv->gw_ip));
 	} else
@@ -3858,13 +4249,10 @@ int	rtw_gw_addr_query(_adapter *padapter)
 
 void rtw_dev_unload(PADAPTER padapter)
 {
-	struct net_device *pnetdev = (struct net_device *)padapter->pnetdev;
 	struct pwrctrl_priv *pwrctl = adapter_to_pwrctl(padapter);
 	struct dvobj_priv *pobjpriv = padapter->dvobj;
 	struct debug_priv *pdbgpriv = &pobjpriv->drv_dbg;
 	struct cmd_priv *pcmdpriv = &padapter->cmdpriv;
-	u8 cnt = 0;
-
 
 	if (padapter->bup == _TRUE) {
 		RTW_INFO("==> "FUNC_ADPT_FMT"\n", FUNC_ADPT_ARG(padapter));
@@ -3932,7 +4320,6 @@ void rtw_dev_unload(PADAPTER padapter)
 int rtw_suspend_free_assoc_resource(_adapter *padapter)
 {
 	struct mlme_priv *pmlmepriv = &padapter->mlmepriv;
-	struct net_device *pnetdev = padapter->pnetdev;
 #ifdef CONFIG_P2P
 	struct wifidirect_info	*pwdinfo = &padapter->wdinfo;
 #endif /* CONFIG_P2P */
@@ -3970,7 +4357,7 @@ int rtw_suspend_free_assoc_resource(_adapter *padapter)
 #endif
 
 	/* s2-3. */
-	rtw_free_assoc_resources(padapter, 1);
+	rtw_free_assoc_resources(padapter, _TRUE);
 
 	/* s2-4. */
 #ifdef CONFIG_AUTOSUSPEND
@@ -4226,8 +4613,6 @@ int rtw_suspend_ap_wow(_adapter *padapter)
 
 int rtw_suspend_normal(_adapter *padapter)
 {
-	struct mlme_priv *pmlmepriv = &padapter->mlmepriv;
-	struct pwrctrl_priv *pwrpriv = adapter_to_pwrctl(padapter);
 	int ret = _SUCCESS;
 
 	RTW_INFO("==> "FUNC_ADPT_FMT" entry....\n", FUNC_ADPT_ARG(padapter));
@@ -4270,7 +4655,9 @@ int rtw_suspend_common(_adapter *padapter)
 	struct dvobj_priv *dvobj = padapter->dvobj;
 	struct debug_priv *pdbgpriv = &dvobj->drv_dbg;
 	struct pwrctrl_priv *pwrpriv = dvobj_to_pwrctl(dvobj);
+#ifdef CONFIG_WOWLAN
 	struct mlme_priv *pmlmepriv = &padapter->mlmepriv;
+#endif
 
 	int ret = 0;
 	systime start_time = rtw_get_current_time();
@@ -4311,7 +4698,7 @@ int rtw_suspend_common(_adapter *padapter)
 
 	if (rtw_mi_check_status(padapter, MI_AP_MODE) == _FALSE) {
 #ifdef CONFIG_WOWLAN
-		if (check_fwstate(pmlmepriv, _FW_LINKED))
+		if (check_fwstate(pmlmepriv, _FW_LINKED) || WOWLAN_IS_STA_MIX_MODE(padapter))
 			pwrpriv->wowlan_mode = _TRUE;
 		else if (pwrpriv->wowlan_pno_enable == _TRUE)
 			pwrpriv->wowlan_mode |= pwrpriv->wowlan_pno_enable;
@@ -4358,6 +4745,7 @@ int rtw_resume_process_wow(_adapter *padapter)
 	struct debug_priv *pdbgpriv = &psdpriv->drv_dbg;
 	struct wowlan_ioctl_param poidparam;
 	struct sta_info	*psta = NULL;
+	struct registry_priv  *registry_par = &padapter->registrypriv;
 	int ret = _SUCCESS;
 
 	RTW_INFO("==> "FUNC_ADPT_FMT" entry....\n", FUNC_ADPT_ARG(padapter));
@@ -4429,6 +4817,14 @@ int rtw_resume_process_wow(_adapter *padapter)
 		rtw_mi_start_drv_threads(padapter);
 
 		rtw_mi_intf_start(padapter);
+		
+		if(registry_par->suspend_type == FW_IPS_DISABLE_BBRF && !check_fwstate(pmlmepriv, _FW_LINKED)) {
+			if (!rtw_is_surprise_removed(padapter)) {
+				rtw_hal_deinit(padapter);
+				rtw_hal_init(padapter);
+			}
+			RTW_INFO("FW_IPS_DISABLE_BBRF hal deinit, hal init \n");
+		}
 
 #ifdef CONFIG_CONCURRENT_MODE
 		rtw_mi_buddy_netif_carrier_on(padapter);
@@ -4459,7 +4855,7 @@ int rtw_resume_process_wow(_adapter *padapter)
 					 rtw_get_stainfo(&padapter->stapriv,
 					 get_bssid(&padapter->mlmepriv)), 0);
 
-			rtw_free_assoc_resources(padapter, 1);
+			rtw_free_assoc_resources(padapter, _TRUE);
 			pmlmeinfo->state = WIFI_FW_NULL_STATE;
 
 		} else {
@@ -4468,14 +4864,6 @@ int rtw_resume_process_wow(_adapter *padapter)
 		}
 	}
 
-	if (pwrpriv->wowlan_wake_reason == FW_DECISION_DISCONNECT)
-		rtw_lock_ext_suspend_timeout(2000);
-
-	if (pwrpriv->wowlan_wake_reason == RX_GTK ||
-	    pwrpriv->wowlan_wake_reason == RX_DISASSOC||
-	    pwrpriv->wowlan_wake_reason == RX_DEAUTH)
-		rtw_lock_ext_suspend_timeout(8000);
-
 	if (pwrpriv->wowlan_mode == _TRUE) {
 		pwrpriv->bips_processing = _FALSE;
 		_set_timer(&adapter_to_dvobj(padapter)->dynamic_chk_timer, 2000);
@@ -4610,9 +4998,6 @@ int rtw_resume_process_ap_wow(_adapter *padapter)
 	/* rtw_unlock_suspend(); */
 #endif /* CONFIG_RESUME_IN_WORKQUEUE */
 
-	if (pwrpriv->wowlan_wake_reason == AP_OFFLOAD_WAKEUP)
-		rtw_lock_ext_suspend_timeout(8000);
-
 	pwrpriv->bips_processing = _FALSE;
 	_set_timer(&adapter_to_dvobj(padapter)->dynamic_chk_timer, 2000);
 #ifndef CONFIG_IPS_CHECK_IN_WD
@@ -4744,8 +5129,6 @@ int rtw_resume_common(_adapter *padapter)
 	int ret = 0;
 	systime start_time = rtw_get_current_time();
 	struct pwrctrl_priv *pwrpriv = adapter_to_pwrctl(padapter);
-	struct mlme_priv *pmlmepriv = &padapter->mlmepriv;
-
 
 	if (pwrpriv->bInSuspend == _FALSE)
 		return 0;
diff --git a/rtl8723DS/os_dep/linux/recv_linux.c b/rtl8723DS/os_dep/linux/recv_linux.c
index 9f4dbea..2f7b3e3 100755..100644
--- a/rtl8723DS/os_dep/linux/recv_linux.c
+++ b/rtl8723DS/os_dep/linux/recv_linux.c
@@ -20,7 +20,6 @@ int rtw_os_recvframe_duplicate_skb(_adapter *padapter, union recv_frame *pclonef
 {
 	int res = _SUCCESS;
 	_pkt	*pkt_copy = NULL;
-	struct rx_pkt_attrib *pattrib = &pcloneframe->u.hdr.attrib;
 
 	if (pskb == NULL) {
 		RTW_INFO("%s [WARN] skb == NULL, drop frag frame\n", __func__);
@@ -215,8 +214,10 @@ int rtw_os_recvbuf_resource_alloc(_adapter *padapter, struct recv_buf *precvbuf)
 	int res = _SUCCESS;
 
 #ifdef CONFIG_USB_HCI
+#ifdef CONFIG_USE_USB_BUFFER_ALLOC_RX
 	struct dvobj_priv	*pdvobjpriv = adapter_to_dvobj(padapter);
 	struct usb_device	*pusbd = pdvobjpriv->pusbdev;
+#endif
 
 	precvbuf->irp_pending = _FALSE;
 	precvbuf->purb = usb_alloc_urb(0, GFP_KERNEL);
@@ -281,7 +282,7 @@ int rtw_os_recvbuf_resource_free(_adapter *padapter, struct recv_buf *precvbuf)
 
 }
 
-_pkt *rtw_os_alloc_msdu_pkt(union recv_frame *prframe, u16 nSubframe_Length, u8 *pdata)
+_pkt *rtw_os_alloc_msdu_pkt(union recv_frame *prframe, const u8 *da, const u8 *sa, u8 *msdu ,u16 msdu_len)
 {
 	u16	eth_type;
 	u8	*data_ptr;
@@ -291,19 +292,19 @@ _pkt *rtw_os_alloc_msdu_pkt(union recv_frame *prframe, u16 nSubframe_Length, u8
 	pattrib = &prframe->u.hdr.attrib;
 
 #ifdef CONFIG_SKB_COPY
-	sub_skb = rtw_skb_alloc(nSubframe_Length + 14);
+	sub_skb = rtw_skb_alloc(msdu_len + 14);
 	if (sub_skb) {
 		skb_reserve(sub_skb, 14);
-		data_ptr = (u8 *)skb_put(sub_skb, nSubframe_Length);
-		_rtw_memcpy(data_ptr, (pdata + ETH_HLEN), nSubframe_Length);
+		data_ptr = (u8 *)skb_put(sub_skb, msdu_len);
+		_rtw_memcpy(data_ptr, msdu, msdu_len);
 	} else
 #endif /* CONFIG_SKB_COPY */
 	{
 		sub_skb = rtw_skb_clone(prframe->u.hdr.pkt);
 		if (sub_skb) {
-			sub_skb->data = pdata + ETH_HLEN;
-			sub_skb->len = nSubframe_Length;
-			skb_set_tail_pointer(sub_skb, nSubframe_Length);
+			sub_skb->data = msdu;
+			sub_skb->len = msdu_len;
+			skb_set_tail_pointer(sub_skb, msdu_len);
 		} else {
 			RTW_INFO("%s(): rtw_skb_clone() Fail!!!\n", __FUNCTION__);
 			return NULL;
@@ -312,21 +313,23 @@ _pkt *rtw_os_alloc_msdu_pkt(union recv_frame *prframe, u16 nSubframe_Length, u8
 
 	eth_type = RTW_GET_BE16(&sub_skb->data[6]);
 
-	if (sub_skb->len >= 8 &&
-	    ((_rtw_memcmp(sub_skb->data, rtw_rfc1042_header, SNAP_SIZE) &&
-	      eth_type != ETH_P_AARP && eth_type != ETH_P_IPX) ||
-	     _rtw_memcmp(sub_skb->data, rtw_bridge_tunnel_header, SNAP_SIZE))) {
+	if (sub_skb->len >= 8
+		&& ((_rtw_memcmp(sub_skb->data, rtw_rfc1042_header, SNAP_SIZE)
+				&& eth_type != ETH_P_AARP && eth_type != ETH_P_IPX)
+			|| _rtw_memcmp(sub_skb->data, rtw_bridge_tunnel_header, SNAP_SIZE))
+	) {
 		/* remove RFC1042 or Bridge-Tunnel encapsulation and replace EtherType */
 		skb_pull(sub_skb, SNAP_SIZE);
-		_rtw_memcpy(skb_push(sub_skb, ETH_ALEN), pdata + 6, ETH_ALEN);
-		_rtw_memcpy(skb_push(sub_skb, ETH_ALEN), pdata, ETH_ALEN);
+		_rtw_memcpy(skb_push(sub_skb, ETH_ALEN), sa, ETH_ALEN);
+		_rtw_memcpy(skb_push(sub_skb, ETH_ALEN), da, ETH_ALEN);
 	} else {
-		u16 len;
 		/* Leave Ethernet header part of hdr and full payload */
+		u16 len;
+
 		len = htons(sub_skb->len);
 		_rtw_memcpy(skb_push(sub_skb, 2), &len, 2);
-		_rtw_memcpy(skb_push(sub_skb, ETH_ALEN), pdata + 6, ETH_ALEN);
-		_rtw_memcpy(skb_push(sub_skb, ETH_ALEN), pdata, ETH_ALEN);
+		_rtw_memcpy(skb_push(sub_skb, ETH_ALEN), sa, ETH_ALEN);
+		_rtw_memcpy(skb_push(sub_skb, ETH_ALEN), da, ETH_ALEN);
 	}
 
 	return sub_skb;
@@ -382,13 +385,36 @@ int rtw_recv_napi_poll(struct napi_struct *napi, int budget)
 
 	work_done = napi_recv(padapter, budget);
 	if (work_done < budget) {
+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 19, 0)) && defined(CONFIG_PCI_HCI)
+		napi_complete_done(napi, work_done);
+#else
 		napi_complete(napi);
+#endif
 		if (!skb_queue_empty(&precvpriv->rx_napi_skb_queue))
 			napi_schedule(napi);
 	}
 
 	return work_done;
 }
+
+#ifdef CONFIG_RTW_NAPI_DYNAMIC
+void dynamic_napi_th_chk (_adapter *adapter)
+{
+
+	if (adapter->registrypriv.en_napi) {
+		struct dvobj_priv *dvobj;
+		struct registry_priv *registry;
+	
+		dvobj = adapter_to_dvobj(adapter);
+		registry = &adapter->registrypriv;
+		if (dvobj->traffic_stat.cur_rx_tp > registry->napi_threshold)
+			dvobj->en_napi_dynamic = 1;
+		else
+			dvobj->en_napi_dynamic = 0;
+	}
+
+}
+#endif /* CONFIG_RTW_NAPI_DYNAMIC */
 #endif /* CONFIG_RTW_NAPI */
 
 void rtw_os_recv_indicate_pkt(_adapter *padapter, _pkt *pkt, union recv_frame *rframe)
@@ -485,8 +511,20 @@ void rtw_os_recv_indicate_pkt(_adapter *padapter, _pkt *pkt, union recv_frame *r
 		pkt->protocol = eth_type_trans(pkt, padapter->pnetdev);
 		pkt->dev = padapter->pnetdev;
 		pkt->ip_summed = CHECKSUM_NONE; /* CONFIG_TCP_CSUM_OFFLOAD_RX */
+#ifdef CONFIG_TCP_CSUM_OFFLOAD_RX
+		if ((rframe->u.hdr.attrib.csum_valid == 1)
+		    && (rframe->u.hdr.attrib.csum_err == 0))
+			pkt->ip_summed = CHECKSUM_UNNECESSARY;
+#endif /* CONFIG_TCP_CSUM_OFFLOAD_RX */
 
 #ifdef CONFIG_RTW_NAPI
+#ifdef CONFIG_RTW_NAPI_DYNAMIC
+		if (!skb_queue_empty(&precvpriv->rx_napi_skb_queue)
+			&& !adapter_to_dvobj(padapter)->en_napi_dynamic			
+			)
+			napi_recv(padapter, RTL_NAPI_WEIGHT);
+#endif
+
 		if (pregistrypriv->en_napi
 			#ifdef CONFIG_RTW_NAPI_DYNAMIC
 			&& adapter_to_dvobj(padapter)->en_napi_dynamic
@@ -515,7 +553,6 @@ void rtw_handle_tkip_mic_err(_adapter *padapter, struct sta_info *sta, u8 bgroup
 #endif
 	union iwreq_data wrqu;
 	struct iw_michaelmicfailure    ev;
-	struct mlme_priv              *pmlmepriv  = &padapter->mlmepriv;
 	struct security_priv	*psecuritypriv = &padapter->securitypriv;
 	systime cur_time = 0;
 
@@ -604,7 +641,6 @@ int rtw_recv_monitor(_adapter *padapter, union recv_frame *precv_frame)
 	struct recv_priv *precvpriv;
 	_queue	*pfree_recv_queue;
 	_pkt *skb;
-	struct mlme_priv *pmlmepriv = &padapter->mlmepriv;
 	struct rx_pkt_attrib *pattrib;
 
 	if (NULL == precv_frame)
@@ -644,25 +680,27 @@ _recv_drop:
 
 }
 
+inline void rtw_rframe_set_os_pkt(union recv_frame *rframe)
+{
+	_pkt *skb = rframe->u.hdr.pkt;
+
+	skb->data = rframe->u.hdr.rx_data;
+	skb_set_tail_pointer(skb, rframe->u.hdr.len);
+	skb->len = rframe->u.hdr.len;
+}
+
 int rtw_recv_indicatepkt(_adapter *padapter, union recv_frame *precv_frame)
 {
 	struct recv_priv *precvpriv;
 	_queue	*pfree_recv_queue;
-	_pkt *skb;
-	struct mlme_priv *pmlmepriv = &padapter->mlmepriv;
 
 	precvpriv = &(padapter->recvpriv);
 	pfree_recv_queue = &(precvpriv->free_recv_queue);
 
-	skb = precv_frame->u.hdr.pkt;
-	if (skb == NULL)
+	if (precv_frame->u.hdr.pkt == NULL)
 		goto _recv_indicatepkt_drop;
 
-	skb->data = precv_frame->u.hdr.rx_data;
-	skb_set_tail_pointer(skb, precv_frame->u.hdr.len);
-	skb->len = precv_frame->u.hdr.len;
-
-	rtw_os_recv_indicate_pkt(padapter, skb, precv_frame);
+	rtw_os_recv_indicate_pkt(padapter, precv_frame->u.hdr.pkt, precv_frame);
 
 _recv_indicatepkt_end:
 	precv_frame->u.hdr.pkt = NULL;
diff --git a/rtl8723DS/os_dep/linux/rhashtable.c b/rtl8723DS/os_dep/linux/rhashtable.c
new file mode 100644
index 0000000..af9c9ae
--- a/dev/null
+++ b/rtl8723DS/os_dep/linux/rhashtable.c
@@ -0,0 +1,844 @@
+/*

+ * Resizable, Scalable, Concurrent Hash Table

+ *

+ * Copyright (c) 2015 Herbert Xu <herbert@gondor.apana.org.au>

+ * Copyright (c) 2014-2015 Thomas Graf <tgraf@suug.ch>

+ * Copyright (c) 2008-2014 Patrick McHardy <kaber@trash.net>

+ *

+ * Code partially derived from nft_hash

+ * Rewritten with rehash code from br_multicast plus single list

+ * pointer as suggested by Josh Triplett

+ *

+ * This program is free software; you can redistribute it and/or modify

+ * it under the terms of the GNU General Public License version 2 as

+ * published by the Free Software Foundation.

+ */

+

+#include <linux/atomic.h>

+#include <linux/kernel.h>

+#include <linux/init.h>

+#include <linux/log2.h>

+#include <linux/sched.h>

+#include <linux/slab.h>

+#include <linux/vmalloc.h>

+#include <linux/mm.h>

+#include <linux/jhash.h>

+#include <linux/random.h>

+#include <linux/err.h>

+#include <linux/export.h>

+

+#define HASH_DEFAULT_SIZE	64UL

+#define HASH_MIN_SIZE		4U

+#define BUCKET_LOCKS_PER_CPU   128UL

+

+static u32 head_hashfn(struct rhashtable *ht,

+		       const struct bucket_table *tbl,

+		       const struct rhash_head *he)

+{

+	return rht_head_hashfn(ht, tbl, he, ht->p);

+}

+

+#ifdef CONFIG_PROVE_LOCKING

+#define ASSERT_RHT_MUTEX(HT) BUG_ON(!lockdep_rht_mutex_is_held(HT))

+

+int lockdep_rht_mutex_is_held(struct rhashtable *ht)

+{

+	return (debug_locks) ? lockdep_is_held(&ht->mutex) : 1;

+}

+

+int lockdep_rht_bucket_is_held(const struct bucket_table *tbl, u32 hash)

+{

+	spinlock_t *lock = rht_bucket_lock(tbl, hash);

+

+	return (debug_locks) ? lockdep_is_held(lock) : 1;

+}

+#else

+#define ASSERT_RHT_MUTEX(HT)

+#endif

+

+

+static int alloc_bucket_locks(struct rhashtable *ht, struct bucket_table *tbl,

+			      gfp_t gfp)

+{

+	unsigned int i, size;

+#if defined(CONFIG_PROVE_LOCKING)

+	unsigned int nr_pcpus = 2;

+#else

+	unsigned int nr_pcpus = num_possible_cpus();

+#endif

+

+	nr_pcpus = min_t(unsigned int, nr_pcpus, 32UL);

+	size = roundup_pow_of_two(nr_pcpus * ht->p.locks_mul);

+

+	/* Never allocate more than 0.5 locks per bucket */

+	size = min_t(unsigned int, size, tbl->size >> 1);

+

+	if (sizeof(spinlock_t) != 0) {

+#ifdef CONFIG_NUMA

+		if (size * sizeof(spinlock_t) > PAGE_SIZE &&

+		    gfp == GFP_KERNEL)

+			tbl->locks = vmalloc(size * sizeof(spinlock_t));

+		else

+#endif

+		tbl->locks = kmalloc_array(size, sizeof(spinlock_t),

+					   gfp);

+		if (!tbl->locks)

+			return -ENOMEM;

+		for (i = 0; i < size; i++)

+			spin_lock_init(&tbl->locks[i]);

+	}

+	tbl->locks_mask = size - 1;

+

+	return 0;

+}

+

+static void bucket_table_free(const struct bucket_table *tbl)

+{

+	if (tbl)

+		kvfree(tbl->locks);

+

+	kvfree(tbl);

+}

+

+static void bucket_table_free_rcu(struct rcu_head *head)

+{

+	bucket_table_free(container_of(head, struct bucket_table, rcu));

+}

+

+static struct bucket_table *bucket_table_alloc(struct rhashtable *ht,

+					       size_t nbuckets,

+					       gfp_t gfp)

+{

+	struct bucket_table *tbl = NULL;

+	size_t size;

+	int i;

+

+	size = sizeof(*tbl) + nbuckets * sizeof(tbl->buckets[0]);

+	if (size <= (PAGE_SIZE << PAGE_ALLOC_COSTLY_ORDER) ||

+	    gfp != GFP_KERNEL)

+		tbl = kzalloc(size, gfp | __GFP_NOWARN | __GFP_NORETRY);

+	if (tbl == NULL && gfp == GFP_KERNEL)

+		tbl = vzalloc(size);

+	if (tbl == NULL)

+		return NULL;

+

+	tbl->size = nbuckets;

+

+	if (alloc_bucket_locks(ht, tbl, gfp) < 0) {

+		bucket_table_free(tbl);

+		return NULL;

+	}

+

+	INIT_LIST_HEAD(&tbl->walkers);

+

+	get_random_bytes(&tbl->hash_rnd, sizeof(tbl->hash_rnd));

+

+	for (i = 0; i < nbuckets; i++)

+		INIT_RHT_NULLS_HEAD(tbl->buckets[i], ht, i);

+

+	return tbl;

+}

+

+static struct bucket_table *rhashtable_last_table(struct rhashtable *ht,

+						  struct bucket_table *tbl)

+{

+	struct bucket_table *new_tbl;

+

+	do {

+		new_tbl = tbl;

+		tbl = rht_dereference_rcu(tbl->future_tbl, ht);

+	} while (tbl);

+

+	return new_tbl;

+}

+

+static int rhashtable_rehash_one(struct rhashtable *ht, unsigned int old_hash)

+{

+	struct bucket_table *old_tbl = rht_dereference(ht->tbl, ht);

+	struct bucket_table *new_tbl = rhashtable_last_table(ht,

+		rht_dereference_rcu(old_tbl->future_tbl, ht));

+	struct rhash_head __rcu **pprev = &old_tbl->buckets[old_hash];

+	int err = -ENOENT;

+	struct rhash_head *head, *next, *entry;

+	spinlock_t *new_bucket_lock;

+	unsigned int new_hash;

+

+	rht_for_each(entry, old_tbl, old_hash) {

+		err = 0;

+		next = rht_dereference_bucket(entry->next, old_tbl, old_hash);

+

+		if (rht_is_a_nulls(next))

+			break;

+

+		pprev = &entry->next;

+	}

+

+	if (err)

+		goto out;

+

+	new_hash = head_hashfn(ht, new_tbl, entry);

+

+	new_bucket_lock = rht_bucket_lock(new_tbl, new_hash);

+

+	spin_lock_nested(new_bucket_lock, SINGLE_DEPTH_NESTING);

+	head = rht_dereference_bucket(new_tbl->buckets[new_hash],

+				      new_tbl, new_hash);

+

+	RCU_INIT_POINTER(entry->next, head);

+

+	rcu_assign_pointer(new_tbl->buckets[new_hash], entry);

+	spin_unlock(new_bucket_lock);

+

+	rcu_assign_pointer(*pprev, next);

+

+out:

+	return err;

+}

+

+static void rhashtable_rehash_chain(struct rhashtable *ht,

+				    unsigned int old_hash)

+{

+	struct bucket_table *old_tbl = rht_dereference(ht->tbl, ht);

+	spinlock_t *old_bucket_lock;

+

+	old_bucket_lock = rht_bucket_lock(old_tbl, old_hash);

+

+	spin_lock_bh(old_bucket_lock);

+	while (!rhashtable_rehash_one(ht, old_hash))

+		;

+	old_tbl->rehash++;

+	spin_unlock_bh(old_bucket_lock);

+}

+

+static int rhashtable_rehash_attach(struct rhashtable *ht,

+				    struct bucket_table *old_tbl,

+				    struct bucket_table *new_tbl)

+{

+	/* Protect future_tbl using the first bucket lock. */

+	spin_lock_bh(old_tbl->locks);

+

+	/* Did somebody beat us to it? */

+	if (rcu_access_pointer(old_tbl->future_tbl)) {

+		spin_unlock_bh(old_tbl->locks);

+		return -EEXIST;

+	}

+

+	/* Make insertions go into the new, empty table right away. Deletions

+	 * and lookups will be attempted in both tables until we synchronize.

+	 */

+	rcu_assign_pointer(old_tbl->future_tbl, new_tbl);

+

+	/* Ensure the new table is visible to readers. */

+	smp_wmb();

+

+	spin_unlock_bh(old_tbl->locks);

+

+	return 0;

+}

+

+static int rhashtable_rehash_table(struct rhashtable *ht)

+{

+	struct bucket_table *old_tbl = rht_dereference(ht->tbl, ht);

+	struct bucket_table *new_tbl;

+	struct rhashtable_walker *walker;

+	unsigned int old_hash;

+

+	new_tbl = rht_dereference(old_tbl->future_tbl, ht);

+	if (!new_tbl)

+		return 0;

+

+	for (old_hash = 0; old_hash < old_tbl->size; old_hash++)

+		rhashtable_rehash_chain(ht, old_hash);

+

+	/* Publish the new table pointer. */

+	rcu_assign_pointer(ht->tbl, new_tbl);

+

+	spin_lock(&ht->lock);

+	list_for_each_entry(walker, &old_tbl->walkers, list)

+		walker->tbl = NULL;

+	spin_unlock(&ht->lock);

+

+	/* Wait for readers. All new readers will see the new

+	 * table, and thus no references to the old table will

+	 * remain.

+	 */

+	call_rcu(&old_tbl->rcu, bucket_table_free_rcu);

+

+	return rht_dereference(new_tbl->future_tbl, ht) ? -EAGAIN : 0;

+}

+

+/**

+ * rhashtable_expand - Expand hash table while allowing concurrent lookups

+ * @ht:		the hash table to expand

+ *

+ * A secondary bucket array is allocated and the hash entries are migrated.

+ *

+ * This function may only be called in a context where it is safe to call

+ * synchronize_rcu(), e.g. not within a rcu_read_lock() section.

+ *

+ * The caller must ensure that no concurrent resizing occurs by holding

+ * ht->mutex.

+ *

+ * It is valid to have concurrent insertions and deletions protected by per

+ * bucket locks or concurrent RCU protected lookups and traversals.

+ */

+static int rhashtable_expand(struct rhashtable *ht)

+{

+	struct bucket_table *new_tbl, *old_tbl = rht_dereference(ht->tbl, ht);

+	int err;

+

+	ASSERT_RHT_MUTEX(ht);

+

+	old_tbl = rhashtable_last_table(ht, old_tbl);

+

+	new_tbl = bucket_table_alloc(ht, old_tbl->size * 2, GFP_KERNEL);

+	if (new_tbl == NULL)

+		return -ENOMEM;

+

+	err = rhashtable_rehash_attach(ht, old_tbl, new_tbl);

+	if (err)

+		bucket_table_free(new_tbl);

+

+	return err;

+}

+

+/**

+ * rhashtable_shrink - Shrink hash table while allowing concurrent lookups

+ * @ht:		the hash table to shrink

+ *

+ * This function shrinks the hash table to fit, i.e., the smallest

+ * size would not cause it to expand right away automatically.

+ *

+ * The caller must ensure that no concurrent resizing occurs by holding

+ * ht->mutex.

+ *

+ * The caller must ensure that no concurrent table mutations take place.

+ * It is however valid to have concurrent lookups if they are RCU protected.

+ *

+ * It is valid to have concurrent insertions and deletions protected by per

+ * bucket locks or concurrent RCU protected lookups and traversals.

+ */

+static int rhashtable_shrink(struct rhashtable *ht)

+{

+	struct bucket_table *new_tbl, *old_tbl = rht_dereference(ht->tbl, ht);

+	unsigned int size;

+	int err;

+

+	ASSERT_RHT_MUTEX(ht);

+

+	size = roundup_pow_of_two(atomic_read(&ht->nelems) * 3 / 2);

+	if (size < ht->p.min_size)

+		size = ht->p.min_size;

+

+	if (old_tbl->size <= size)

+		return 0;

+

+	if (rht_dereference(old_tbl->future_tbl, ht))

+		return -EEXIST;

+

+	new_tbl = bucket_table_alloc(ht, size, GFP_KERNEL);

+	if (new_tbl == NULL)

+		return -ENOMEM;

+

+	err = rhashtable_rehash_attach(ht, old_tbl, new_tbl);

+	if (err)

+		bucket_table_free(new_tbl);

+

+	return err;

+}

+

+static void rht_deferred_worker(struct work_struct *work)

+{

+	struct rhashtable *ht;

+	struct bucket_table *tbl;

+	int err = 0;

+

+	ht = container_of(work, struct rhashtable, run_work);

+	mutex_lock(&ht->mutex);

+

+	tbl = rht_dereference(ht->tbl, ht);

+	tbl = rhashtable_last_table(ht, tbl);

+

+	if (rht_grow_above_75(ht, tbl))

+		rhashtable_expand(ht);

+	else if (ht->p.automatic_shrinking && rht_shrink_below_30(ht, tbl))

+		rhashtable_shrink(ht);

+

+	err = rhashtable_rehash_table(ht);

+

+	mutex_unlock(&ht->mutex);

+

+	if (err)

+		schedule_work(&ht->run_work);

+}

+

+static bool rhashtable_check_elasticity(struct rhashtable *ht,

+					struct bucket_table *tbl,

+					unsigned int hash)

+{

+	unsigned int elasticity = ht->elasticity;

+	struct rhash_head *head;

+

+	rht_for_each(head, tbl, hash)

+		if (!--elasticity)

+			return true;

+

+	return false;

+}

+

+int rhashtable_insert_rehash(struct rhashtable *ht,

+			     struct bucket_table *tbl)

+{

+	struct bucket_table *old_tbl;

+	struct bucket_table *new_tbl;

+	unsigned int size;

+	int err;

+

+	old_tbl = rht_dereference_rcu(ht->tbl, ht);

+

+	size = tbl->size;

+

+	err = -EBUSY;

+

+	if (rht_grow_above_75(ht, tbl))

+		size *= 2;

+	/* Do not schedule more than one rehash */

+	else if (old_tbl != tbl)

+		goto fail;

+

+	err = -ENOMEM;

+

+	new_tbl = bucket_table_alloc(ht, size, GFP_ATOMIC);

+	if (new_tbl == NULL)

+		goto fail;

+

+	err = rhashtable_rehash_attach(ht, tbl, new_tbl);

+	if (err) {

+		bucket_table_free(new_tbl);

+		if (err == -EEXIST)

+			err = 0;

+	} else

+		schedule_work(&ht->run_work);

+

+	return err;

+

+fail:

+	/* Do not fail the insert if someone else did a rehash. */

+	if (likely(rcu_dereference_raw(tbl->future_tbl)))

+		return 0;

+

+	/* Schedule async rehash to retry allocation in process context. */

+	if (err == -ENOMEM)

+		schedule_work(&ht->run_work);

+

+	return err;

+}

+

+struct bucket_table *rhashtable_insert_slow(struct rhashtable *ht,

+					    const void *key,

+					    struct rhash_head *obj,

+					    struct bucket_table *tbl)

+{

+	struct rhash_head *head;

+	unsigned int hash;

+	int err;

+

+	tbl = rhashtable_last_table(ht, tbl);

+	hash = head_hashfn(ht, tbl, obj);

+	spin_lock_nested(rht_bucket_lock(tbl, hash), SINGLE_DEPTH_NESTING);

+

+	err = -EEXIST;

+	if (key && rhashtable_lookup_fast(ht, key, ht->p))

+		goto exit;

+

+	err = -E2BIG;

+	if (unlikely(rht_grow_above_max(ht, tbl)))

+		goto exit;

+

+	err = -EAGAIN;

+	if (rhashtable_check_elasticity(ht, tbl, hash) ||

+	    rht_grow_above_100(ht, tbl))

+		goto exit;

+

+	err = 0;

+

+	head = rht_dereference_bucket(tbl->buckets[hash], tbl, hash);

+

+	RCU_INIT_POINTER(obj->next, head);

+

+	rcu_assign_pointer(tbl->buckets[hash], obj);

+

+	atomic_inc(&ht->nelems);

+

+exit:

+	spin_unlock(rht_bucket_lock(tbl, hash));

+

+	if (err == 0)

+		return NULL;

+	else if (err == -EAGAIN)

+		return tbl;

+	else

+		return ERR_PTR(err);

+}

+

+/**

+ * rhashtable_walk_init - Initialise an iterator

+ * @ht:		Table to walk over

+ * @iter:	Hash table Iterator

+ *

+ * This function prepares a hash table walk.

+ *

+ * Note that if you restart a walk after rhashtable_walk_stop you

+ * may see the same object twice.  Also, you may miss objects if

+ * there are removals in between rhashtable_walk_stop and the next

+ * call to rhashtable_walk_start.

+ *

+ * For a completely stable walk you should construct your own data

+ * structure outside the hash table.

+ *

+ * This function may sleep so you must not call it from interrupt

+ * context or with spin locks held.

+ *

+ * You must call rhashtable_walk_exit if this function returns

+ * successfully.

+ */

+int rhashtable_walk_init(struct rhashtable *ht, struct rhashtable_iter *iter)

+{

+	iter->ht = ht;

+	iter->p = NULL;

+	iter->slot = 0;

+	iter->skip = 0;

+

+	iter->walker = kmalloc(sizeof(*iter->walker), GFP_KERNEL);

+	if (!iter->walker)

+		return -ENOMEM;

+

+	spin_lock(&ht->lock);

+	iter->walker->tbl =

+		rcu_dereference_protected(ht->tbl, lockdep_is_held(&ht->lock));

+	list_add(&iter->walker->list, &iter->walker->tbl->walkers);

+	spin_unlock(&ht->lock);

+

+	return 0;

+}

+

+/**

+ * rhashtable_walk_exit - Free an iterator

+ * @iter:	Hash table Iterator

+ *

+ * This function frees resources allocated by rhashtable_walk_init.

+ */

+void rhashtable_walk_exit(struct rhashtable_iter *iter)

+{

+	spin_lock(&iter->ht->lock);

+	if (iter->walker->tbl)

+		list_del(&iter->walker->list);

+	spin_unlock(&iter->ht->lock);

+	kfree(iter->walker);

+}

+

+/**

+ * rhashtable_walk_start - Start a hash table walk

+ * @iter:	Hash table iterator

+ *

+ * Start a hash table walk.  Note that we take the RCU lock in all

+ * cases including when we return an error.  So you must always call

+ * rhashtable_walk_stop to clean up.

+ *

+ * Returns zero if successful.

+ *

+ * Returns -EAGAIN if resize event occured.  Note that the iterator

+ * will rewind back to the beginning and you may use it immediately

+ * by calling rhashtable_walk_next.

+ */

+int rhashtable_walk_start(struct rhashtable_iter *iter)

+	__acquires(RCU)

+{

+	struct rhashtable *ht = iter->ht;

+

+	rcu_read_lock();

+

+	spin_lock(&ht->lock);

+	if (iter->walker->tbl)

+		list_del(&iter->walker->list);

+	spin_unlock(&ht->lock);

+

+	if (!iter->walker->tbl) {

+		iter->walker->tbl = rht_dereference_rcu(ht->tbl, ht);

+		return -EAGAIN;

+	}

+

+	return 0;

+}

+

+/**

+ * rhashtable_walk_next - Return the next object and advance the iterator

+ * @iter:	Hash table iterator

+ *

+ * Note that you must call rhashtable_walk_stop when you are finished

+ * with the walk.

+ *

+ * Returns the next object or NULL when the end of the table is reached.

+ *

+ * Returns -EAGAIN if resize event occured.  Note that the iterator

+ * will rewind back to the beginning and you may continue to use it.

+ */

+void *rhashtable_walk_next(struct rhashtable_iter *iter)

+{

+	struct bucket_table *tbl = iter->walker->tbl;

+	struct rhashtable *ht = iter->ht;

+	struct rhash_head *p = iter->p;

+

+	if (p) {

+		p = rht_dereference_bucket_rcu(p->next, tbl, iter->slot);

+		goto next;

+	}

+

+	for (; iter->slot < tbl->size; iter->slot++) {

+		int skip = iter->skip;

+

+		rht_for_each_rcu(p, tbl, iter->slot) {

+			if (!skip)

+				break;

+			skip--;

+		}

+

+next:

+		if (!rht_is_a_nulls(p)) {

+			iter->skip++;

+			iter->p = p;

+			return rht_obj(ht, p);

+		}

+

+		iter->skip = 0;

+	}

+

+	iter->p = NULL;

+

+	/* Ensure we see any new tables. */

+	smp_rmb();

+

+	iter->walker->tbl = rht_dereference_rcu(tbl->future_tbl, ht);

+	if (iter->walker->tbl) {

+		iter->slot = 0;

+		iter->skip = 0;

+		return ERR_PTR(-EAGAIN);

+	}

+

+	return NULL;

+}

+

+/**

+ * rhashtable_walk_stop - Finish a hash table walk

+ * @iter:	Hash table iterator

+ *

+ * Finish a hash table walk.

+ */

+void rhashtable_walk_stop(struct rhashtable_iter *iter)

+	__releases(RCU)

+{

+	struct rhashtable *ht;

+	struct bucket_table *tbl = iter->walker->tbl;

+

+	if (!tbl)

+		goto out;

+

+	ht = iter->ht;

+

+	spin_lock(&ht->lock);

+	if (tbl->rehash < tbl->size)

+		list_add(&iter->walker->list, &tbl->walkers);

+	else

+		iter->walker->tbl = NULL;

+	spin_unlock(&ht->lock);

+

+	iter->p = NULL;

+

+out:

+	rcu_read_unlock();

+}

+

+static size_t rounded_hashtable_size(const struct rhashtable_params *params)

+{

+	return max(roundup_pow_of_two(params->nelem_hint * 4 / 3),

+		   (unsigned long)params->min_size);

+}

+

+static u32 rhashtable_jhash2(const void *key, u32 length, u32 seed)

+{

+	return jhash2(key, length, seed);

+}

+

+/**

+ * rhashtable_init - initialize a new hash table

+ * @ht:		hash table to be initialized

+ * @params:	configuration parameters

+ *

+ * Initializes a new hash table based on the provided configuration

+ * parameters. A table can be configured either with a variable or

+ * fixed length key:

+ *

+ * Configuration Example 1: Fixed length keys

+ * struct test_obj {

+ *	int			key;

+ *	void *			my_member;

+ *	struct rhash_head	node;

+ * };

+ *

+ * struct rhashtable_params params = {

+ *	.head_offset = offsetof(struct test_obj, node),

+ *	.key_offset = offsetof(struct test_obj, key),

+ *	.key_len = sizeof(int),

+ *	.hashfn = jhash,

+ *	.nulls_base = (1U << RHT_BASE_SHIFT),

+ * };

+ *

+ * Configuration Example 2: Variable length keys

+ * struct test_obj {

+ *	[...]

+ *	struct rhash_head	node;

+ * };

+ *

+ * u32 my_hash_fn(const void *data, u32 len, u32 seed)

+ * {

+ *	struct test_obj *obj = data;

+ *

+ *	return [... hash ...];

+ * }

+ *

+ * struct rhashtable_params params = {

+ *	.head_offset = offsetof(struct test_obj, node),

+ *	.hashfn = jhash,

+ *	.obj_hashfn = my_hash_fn,

+ * };

+ */

+int rhashtable_init(struct rhashtable *ht,

+		    const struct rhashtable_params *params)

+{

+	struct bucket_table *tbl;

+	size_t size;

+

+	size = HASH_DEFAULT_SIZE;

+

+	if ((!params->key_len && !params->obj_hashfn) ||

+	    (params->obj_hashfn && !params->obj_cmpfn))

+		return -EINVAL;

+

+	if (params->nulls_base && params->nulls_base < (1U << RHT_BASE_SHIFT))

+		return -EINVAL;

+

+	memset(ht, 0, sizeof(*ht));

+	mutex_init(&ht->mutex);

+	spin_lock_init(&ht->lock);

+	memcpy(&ht->p, params, sizeof(*params));

+

+	if (params->min_size)

+		ht->p.min_size = roundup_pow_of_two(params->min_size);

+

+	if (params->max_size)

+		ht->p.max_size = rounddown_pow_of_two(params->max_size);

+

+	if (params->insecure_max_entries)

+		ht->p.insecure_max_entries =

+			rounddown_pow_of_two(params->insecure_max_entries);

+	else

+		ht->p.insecure_max_entries = ht->p.max_size * 2;

+

+	ht->p.min_size = max(ht->p.min_size, HASH_MIN_SIZE);

+

+	if (params->nelem_hint)

+		size = rounded_hashtable_size(&ht->p);

+

+	/* The maximum (not average) chain length grows with the

+	 * size of the hash table, at a rate of (log N)/(log log N).

+	 * The value of 16 is selected so that even if the hash

+	 * table grew to 2^32 you would not expect the maximum

+	 * chain length to exceed it unless we are under attack

+	 * (or extremely unlucky).

+	 *

+	 * As this limit is only to detect attacks, we don't need

+	 * to set it to a lower value as you'd need the chain

+	 * length to vastly exceed 16 to have any real effect

+	 * on the system.

+	 */

+	if (!params->insecure_elasticity)

+		ht->elasticity = 16;

+

+	if (params->locks_mul)

+		ht->p.locks_mul = roundup_pow_of_two(params->locks_mul);

+	else

+		ht->p.locks_mul = BUCKET_LOCKS_PER_CPU;

+

+	ht->key_len = ht->p.key_len;

+	if (!params->hashfn) {

+		ht->p.hashfn = jhash;

+

+		if (!(ht->key_len & (sizeof(u32) - 1))) {

+			ht->key_len /= sizeof(u32);

+			ht->p.hashfn = rhashtable_jhash2;

+		}

+	}

+

+	tbl = bucket_table_alloc(ht, size, GFP_KERNEL);

+	if (tbl == NULL)

+		return -ENOMEM;

+

+	atomic_set(&ht->nelems, 0);

+

+	RCU_INIT_POINTER(ht->tbl, tbl);

+

+	INIT_WORK(&ht->run_work, rht_deferred_worker);

+

+	return 0;

+}

+

+/**

+ * rhashtable_free_and_destroy - free elements and destroy hash table

+ * @ht:		the hash table to destroy

+ * @free_fn:	callback to release resources of element

+ * @arg:	pointer passed to free_fn

+ *

+ * Stops an eventual async resize. If defined, invokes free_fn for each

+ * element to releasal resources. Please note that RCU protected

+ * readers may still be accessing the elements. Releasing of resources

+ * must occur in a compatible manner. Then frees the bucket array.

+ *

+ * This function will eventually sleep to wait for an async resize

+ * to complete. The caller is responsible that no further write operations

+ * occurs in parallel.

+ */

+void rhashtable_free_and_destroy(struct rhashtable *ht,

+				 void (*free_fn)(void *ptr, void *arg),

+				 void *arg)

+{

+	const struct bucket_table *tbl;

+	unsigned int i;

+

+	cancel_work_sync(&ht->run_work);

+

+	mutex_lock(&ht->mutex);

+	tbl = rht_dereference(ht->tbl, ht);

+	if (free_fn) {

+		for (i = 0; i < tbl->size; i++) {

+			struct rhash_head *pos, *next;

+

+			for (pos = rht_dereference(tbl->buckets[i], ht),

+			     next = !rht_is_a_nulls(pos) ?

+					rht_dereference(pos->next, ht) : NULL;

+			     !rht_is_a_nulls(pos);

+			     pos = next,

+			     next = !rht_is_a_nulls(pos) ?

+					rht_dereference(pos->next, ht) : NULL)

+				free_fn(rht_obj(ht, pos), arg);

+		}

+	}

+

+	bucket_table_free(tbl);

+	mutex_unlock(&ht->mutex);

+}

+

+void rhashtable_destroy(struct rhashtable *ht)

+{

+	return rhashtable_free_and_destroy(ht, NULL, NULL);

+}

+

diff --git a/rtl8723DS/os_dep/linux/rhashtable.h b/rtl8723DS/os_dep/linux/rhashtable.h
new file mode 100644
index 0000000..a6db325
--- a/dev/null
+++ b/rtl8723DS/os_dep/linux/rhashtable.h
@@ -0,0 +1,827 @@
+/*

+ * Resizable, Scalable, Concurrent Hash Table

+ *

+ * Copyright (c) 2015 Herbert Xu <herbert@gondor.apana.org.au>

+ * Copyright (c) 2014-2015 Thomas Graf <tgraf@suug.ch>

+ * Copyright (c) 2008-2014 Patrick McHardy <kaber@trash.net>

+ *

+ * Code partially derived from nft_hash

+ * Rewritten with rehash code from br_multicast plus single list

+ * pointer as suggested by Josh Triplett

+ *

+ * This program is free software; you can redistribute it and/or modify

+ * it under the terms of the GNU General Public License version 2 as

+ * published by the Free Software Foundation.

+ */

+

+#ifndef _LINUX_RHASHTABLE_H

+#define _LINUX_RHASHTABLE_H

+

+#include <linux/atomic.h>

+#include <linux/compiler.h>

+#include <linux/err.h>

+#include <linux/errno.h>

+#include <linux/jhash.h>

+#include <linux/list_nulls.h>

+#include <linux/workqueue.h>

+#include <linux/mutex.h>

+#include <linux/rcupdate.h>

+

+/*

+ * The end of the chain is marked with a special nulls marks which has

+ * the following format:

+ *

+ * +-------+-----------------------------------------------------+-+

+ * | Base  |                      Hash                           |1|

+ * +-------+-----------------------------------------------------+-+

+ *

+ * Base (4 bits) : Reserved to distinguish between multiple tables.

+ *                 Specified via &struct rhashtable_params.nulls_base.

+ * Hash (27 bits): Full hash (unmasked) of first element added to bucket

+ * 1 (1 bit)     : Nulls marker (always set)

+ *

+ * The remaining bits of the next pointer remain unused for now.

+ */

+#define RHT_BASE_BITS		4

+#define RHT_HASH_BITS		27

+#define RHT_BASE_SHIFT		RHT_HASH_BITS

+

+/* Base bits plus 1 bit for nulls marker */

+#define RHT_HASH_RESERVED_SPACE	(RHT_BASE_BITS + 1)

+

+struct rhash_head {

+	struct rhash_head __rcu		*next;

+};

+

+/**

+ * struct bucket_table - Table of hash buckets

+ * @size: Number of hash buckets

+ * @rehash: Current bucket being rehashed

+ * @hash_rnd: Random seed to fold into hash

+ * @locks_mask: Mask to apply before accessing locks[]

+ * @locks: Array of spinlocks protecting individual buckets

+ * @walkers: List of active walkers

+ * @rcu: RCU structure for freeing the table

+ * @future_tbl: Table under construction during rehashing

+ * @buckets: size * hash buckets

+ */

+struct bucket_table {

+	unsigned int		size;

+	unsigned int		rehash;

+	u32			hash_rnd;

+	unsigned int		locks_mask;

+	spinlock_t		*locks;

+	struct list_head	walkers;

+	struct rcu_head		rcu;

+

+	struct bucket_table __rcu *future_tbl;

+

+	struct rhash_head __rcu	*buckets[] ____cacheline_aligned_in_smp;

+};

+

+/**

+ * struct rhashtable_compare_arg - Key for the function rhashtable_compare

+ * @ht: Hash table

+ * @key: Key to compare against

+ */

+struct rhashtable_compare_arg {

+	struct rhashtable *ht;

+	const void *key;

+};

+

+typedef u32 (*rht_hashfn_t)(const void *data, u32 len, u32 seed);

+typedef u32 (*rht_obj_hashfn_t)(const void *data, u32 len, u32 seed);

+typedef int (*rht_obj_cmpfn_t)(struct rhashtable_compare_arg *arg,

+			       const void *obj);

+

+struct rhashtable;

+

+/**

+ * struct rhashtable_params - Hash table construction parameters

+ * @nelem_hint: Hint on number of elements, should be 75% of desired size

+ * @key_len: Length of key

+ * @key_offset: Offset of key in struct to be hashed

+ * @head_offset: Offset of rhash_head in struct to be hashed

+ * @insecure_max_entries: Maximum number of entries (may be exceeded)

+ * @max_size: Maximum size while expanding

+ * @min_size: Minimum size while shrinking

+ * @nulls_base: Base value to generate nulls marker

+ * @insecure_elasticity: Set to true to disable chain length checks

+ * @automatic_shrinking: Enable automatic shrinking of tables

+ * @locks_mul: Number of bucket locks to allocate per cpu (default: 128)

+ * @hashfn: Hash function (default: jhash2 if !(key_len % 4), or jhash)

+ * @obj_hashfn: Function to hash object

+ * @obj_cmpfn: Function to compare key with object

+ */

+struct rhashtable_params {

+	size_t			nelem_hint;

+	size_t			key_len;

+	size_t			key_offset;

+	size_t			head_offset;

+	unsigned int		insecure_max_entries;

+	unsigned int		max_size;

+	unsigned int		min_size;

+	u32			nulls_base;

+	bool			insecure_elasticity;

+	bool			automatic_shrinking;

+	size_t			locks_mul;

+	rht_hashfn_t		hashfn;

+	rht_obj_hashfn_t	obj_hashfn;

+	rht_obj_cmpfn_t		obj_cmpfn;

+};

+

+/**

+ * struct rhashtable - Hash table handle

+ * @tbl: Bucket table

+ * @nelems: Number of elements in table

+ * @key_len: Key length for hashfn

+ * @elasticity: Maximum chain length before rehash

+ * @p: Configuration parameters

+ * @run_work: Deferred worker to expand/shrink asynchronously

+ * @mutex: Mutex to protect current/future table swapping

+ * @lock: Spin lock to protect walker list

+ */

+struct rhashtable {

+	struct bucket_table __rcu	*tbl;

+	atomic_t			nelems;

+	unsigned int			key_len;

+	unsigned int			elasticity;

+	struct rhashtable_params	p;

+	struct work_struct		run_work;

+	struct mutex                    mutex;

+	spinlock_t			lock;

+};

+

+/**

+ * struct rhashtable_walker - Hash table walker

+ * @list: List entry on list of walkers

+ * @tbl: The table that we were walking over

+ */

+struct rhashtable_walker {

+	struct list_head list;

+	struct bucket_table *tbl;

+};

+

+/**

+ * struct rhashtable_iter - Hash table iterator, fits into netlink cb

+ * @ht: Table to iterate through

+ * @p: Current pointer

+ * @walker: Associated rhashtable walker

+ * @slot: Current slot

+ * @skip: Number of entries to skip in slot

+ */

+struct rhashtable_iter {

+	struct rhashtable *ht;

+	struct rhash_head *p;

+	struct rhashtable_walker *walker;

+	unsigned int slot;

+	unsigned int skip;

+};

+

+static inline unsigned long rht_marker(const struct rhashtable *ht, u32 hash)

+{

+	return NULLS_MARKER(ht->p.nulls_base + hash);

+}

+

+#define INIT_RHT_NULLS_HEAD(ptr, ht, hash) \

+	((ptr) = (typeof(ptr)) rht_marker(ht, hash))

+

+static inline bool rht_is_a_nulls(const struct rhash_head *ptr)

+{

+	return ((unsigned long) ptr & 1);

+}

+

+static inline unsigned long rht_get_nulls_value(const struct rhash_head *ptr)

+{

+	return ((unsigned long) ptr) >> 1;

+}

+

+static inline void *rht_obj(const struct rhashtable *ht,

+			    const struct rhash_head *he)

+{

+	return (char *)he - ht->p.head_offset;

+}

+

+static inline unsigned int rht_bucket_index(const struct bucket_table *tbl,

+					    unsigned int hash)

+{

+	return (hash >> RHT_HASH_RESERVED_SPACE) & (tbl->size - 1);

+}

+

+static inline unsigned int rht_key_hashfn(

+	struct rhashtable *ht, const struct bucket_table *tbl,

+	const void *key, const struct rhashtable_params params)

+{

+	unsigned int hash;

+

+	/* params must be equal to ht->p if it isn't constant. */

+	if (!__builtin_constant_p(params.key_len))

+		hash = ht->p.hashfn(key, ht->key_len, tbl->hash_rnd);

+	else if (params.key_len) {

+		unsigned int key_len = params.key_len;

+

+		if (params.hashfn)

+			hash = params.hashfn(key, key_len, tbl->hash_rnd);

+		else if (key_len & (sizeof(u32) - 1))

+			hash = jhash(key, key_len, tbl->hash_rnd);

+		else

+			hash = jhash2(key, key_len / sizeof(u32),

+				      tbl->hash_rnd);

+	} else {

+		unsigned int key_len = ht->p.key_len;

+

+		if (params.hashfn)

+			hash = params.hashfn(key, key_len, tbl->hash_rnd);

+		else

+			hash = jhash(key, key_len, tbl->hash_rnd);

+	}

+

+	return rht_bucket_index(tbl, hash);

+}

+

+static inline unsigned int rht_head_hashfn(

+	struct rhashtable *ht, const struct bucket_table *tbl,

+	const struct rhash_head *he, const struct rhashtable_params params)

+{

+	const char *ptr = rht_obj(ht, he);

+

+	return likely(params.obj_hashfn) ?

+	       rht_bucket_index(tbl, params.obj_hashfn(ptr, params.key_len ?:

+							    ht->p.key_len,

+						       tbl->hash_rnd)) :

+	       rht_key_hashfn(ht, tbl, ptr + params.key_offset, params);

+}

+

+/**

+ * rht_grow_above_75 - returns true if nelems > 0.75 * table-size

+ * @ht:		hash table

+ * @tbl:	current table

+ */

+static inline bool rht_grow_above_75(const struct rhashtable *ht,

+				     const struct bucket_table *tbl)

+{

+	/* Expand table when exceeding 75% load */

+	return atomic_read(&ht->nelems) > (tbl->size / 4 * 3) &&

+	       (!ht->p.max_size || tbl->size < ht->p.max_size);

+}

+

+/**

+ * rht_shrink_below_30 - returns true if nelems < 0.3 * table-size

+ * @ht:		hash table

+ * @tbl:	current table

+ */

+static inline bool rht_shrink_below_30(const struct rhashtable *ht,

+				       const struct bucket_table *tbl)

+{

+	/* Shrink table beneath 30% load */

+	return atomic_read(&ht->nelems) < (tbl->size * 3 / 10) &&

+	       tbl->size > ht->p.min_size;

+}

+

+/**

+ * rht_grow_above_100 - returns true if nelems > table-size

+ * @ht:		hash table

+ * @tbl:	current table

+ */

+static inline bool rht_grow_above_100(const struct rhashtable *ht,

+				      const struct bucket_table *tbl)

+{

+	return atomic_read(&ht->nelems) > tbl->size &&

+		(!ht->p.max_size || tbl->size < ht->p.max_size);

+}

+

+/**

+ * rht_grow_above_max - returns true if table is above maximum

+ * @ht:		hash table

+ * @tbl:	current table

+ */

+static inline bool rht_grow_above_max(const struct rhashtable *ht,

+				      const struct bucket_table *tbl)

+{

+	return ht->p.insecure_max_entries &&

+	       atomic_read(&ht->nelems) >= ht->p.insecure_max_entries;

+}

+

+/* The bucket lock is selected based on the hash and protects mutations

+ * on a group of hash buckets.

+ *

+ * A maximum of tbl->size/2 bucket locks is allocated. This ensures that

+ * a single lock always covers both buckets which may both contains

+ * entries which link to the same bucket of the old table during resizing.

+ * This allows to simplify the locking as locking the bucket in both

+ * tables during resize always guarantee protection.

+ *

+ * IMPORTANT: When holding the bucket lock of both the old and new table

+ * during expansions and shrinking, the old bucket lock must always be

+ * acquired first.

+ */

+static inline spinlock_t *rht_bucket_lock(const struct bucket_table *tbl,

+					  unsigned int hash)

+{

+	return &tbl->locks[hash & tbl->locks_mask];

+}

+

+#ifdef CONFIG_PROVE_LOCKING

+int lockdep_rht_mutex_is_held(struct rhashtable *ht);

+int lockdep_rht_bucket_is_held(const struct bucket_table *tbl, u32 hash);

+#else

+static inline int lockdep_rht_mutex_is_held(struct rhashtable *ht)

+{

+	return 1;

+}

+

+static inline int lockdep_rht_bucket_is_held(const struct bucket_table *tbl,

+					     u32 hash)

+{

+	return 1;

+}

+#endif /* CONFIG_PROVE_LOCKING */

+

+int rhashtable_init(struct rhashtable *ht,

+		    const struct rhashtable_params *params);

+

+struct bucket_table *rhashtable_insert_slow(struct rhashtable *ht,

+					    const void *key,

+					    struct rhash_head *obj,

+					    struct bucket_table *old_tbl);

+int rhashtable_insert_rehash(struct rhashtable *ht, struct bucket_table *tbl);

+

+int rhashtable_walk_init(struct rhashtable *ht, struct rhashtable_iter *iter);

+void rhashtable_walk_exit(struct rhashtable_iter *iter);

+int rhashtable_walk_start(struct rhashtable_iter *iter) __acquires(RCU);

+void *rhashtable_walk_next(struct rhashtable_iter *iter);

+void rhashtable_walk_stop(struct rhashtable_iter *iter) __releases(RCU);

+

+void rhashtable_free_and_destroy(struct rhashtable *ht,

+				 void (*free_fn)(void *ptr, void *arg),

+				 void *arg);

+void rhashtable_destroy(struct rhashtable *ht);

+

+#define rht_dereference(p, ht) \

+	rcu_dereference_protected(p, lockdep_rht_mutex_is_held(ht))

+

+#define rht_dereference_rcu(p, ht) \

+	rcu_dereference_check(p, lockdep_rht_mutex_is_held(ht))

+

+#define rht_dereference_bucket(p, tbl, hash) \

+	rcu_dereference_protected(p, lockdep_rht_bucket_is_held(tbl, hash))

+

+#define rht_dereference_bucket_rcu(p, tbl, hash) \

+	rcu_dereference_check(p, lockdep_rht_bucket_is_held(tbl, hash))

+

+#define rht_entry(tpos, pos, member) \

+	({ tpos = container_of(pos, typeof(*tpos), member); 1; })

+

+/**

+ * rht_for_each_continue - continue iterating over hash chain

+ * @pos:	the &struct rhash_head to use as a loop cursor.

+ * @head:	the previous &struct rhash_head to continue from

+ * @tbl:	the &struct bucket_table

+ * @hash:	the hash value / bucket index

+ */

+#define rht_for_each_continue(pos, head, tbl, hash) \

+	for (pos = rht_dereference_bucket(head, tbl, hash); \

+	     !rht_is_a_nulls(pos); \

+	     pos = rht_dereference_bucket((pos)->next, tbl, hash))

+

+/**

+ * rht_for_each - iterate over hash chain

+ * @pos:	the &struct rhash_head to use as a loop cursor.

+ * @tbl:	the &struct bucket_table

+ * @hash:	the hash value / bucket index

+ */

+#define rht_for_each(pos, tbl, hash) \

+	rht_for_each_continue(pos, (tbl)->buckets[hash], tbl, hash)

+

+/**

+ * rht_for_each_entry_continue - continue iterating over hash chain

+ * @tpos:	the type * to use as a loop cursor.

+ * @pos:	the &struct rhash_head to use as a loop cursor.

+ * @head:	the previous &struct rhash_head to continue from

+ * @tbl:	the &struct bucket_table

+ * @hash:	the hash value / bucket index

+ * @member:	name of the &struct rhash_head within the hashable struct.

+ */

+#define rht_for_each_entry_continue(tpos, pos, head, tbl, hash, member)	\

+	for (pos = rht_dereference_bucket(head, tbl, hash);		\

+	     (!rht_is_a_nulls(pos)) && rht_entry(tpos, pos, member);	\

+	     pos = rht_dereference_bucket((pos)->next, tbl, hash))

+

+/**

+ * rht_for_each_entry - iterate over hash chain of given type

+ * @tpos:	the type * to use as a loop cursor.

+ * @pos:	the &struct rhash_head to use as a loop cursor.

+ * @tbl:	the &struct bucket_table

+ * @hash:	the hash value / bucket index

+ * @member:	name of the &struct rhash_head within the hashable struct.

+ */

+#define rht_for_each_entry(tpos, pos, tbl, hash, member)		\

+	rht_for_each_entry_continue(tpos, pos, (tbl)->buckets[hash],	\

+				    tbl, hash, member)

+

+/**

+ * rht_for_each_entry_safe - safely iterate over hash chain of given type

+ * @tpos:	the type * to use as a loop cursor.

+ * @pos:	the &struct rhash_head to use as a loop cursor.

+ * @next:	the &struct rhash_head to use as next in loop cursor.

+ * @tbl:	the &struct bucket_table

+ * @hash:	the hash value / bucket index

+ * @member:	name of the &struct rhash_head within the hashable struct.

+ *

+ * This hash chain list-traversal primitive allows for the looped code to

+ * remove the loop cursor from the list.

+ */

+#define rht_for_each_entry_safe(tpos, pos, next, tbl, hash, member)	    \

+	for (pos = rht_dereference_bucket((tbl)->buckets[hash], tbl, hash), \

+	     next = !rht_is_a_nulls(pos) ?				    \

+		       rht_dereference_bucket(pos->next, tbl, hash) : NULL; \

+	     (!rht_is_a_nulls(pos)) && rht_entry(tpos, pos, member);	    \

+	     pos = next,						    \

+	     next = !rht_is_a_nulls(pos) ?				    \

+		       rht_dereference_bucket(pos->next, tbl, hash) : NULL)

+

+/**

+ * rht_for_each_rcu_continue - continue iterating over rcu hash chain

+ * @pos:	the &struct rhash_head to use as a loop cursor.

+ * @head:	the previous &struct rhash_head to continue from

+ * @tbl:	the &struct bucket_table

+ * @hash:	the hash value / bucket index

+ *

+ * This hash chain list-traversal primitive may safely run concurrently with

+ * the _rcu mutation primitives such as rhashtable_insert() as long as the

+ * traversal is guarded by rcu_read_lock().

+ */

+#define rht_for_each_rcu_continue(pos, head, tbl, hash)			\

+	for (({barrier(); }),						\

+	     pos = rht_dereference_bucket_rcu(head, tbl, hash);		\

+	     !rht_is_a_nulls(pos);					\

+	     pos = rcu_dereference_raw(pos->next))

+

+/**

+ * rht_for_each_rcu - iterate over rcu hash chain

+ * @pos:	the &struct rhash_head to use as a loop cursor.

+ * @tbl:	the &struct bucket_table

+ * @hash:	the hash value / bucket index

+ *

+ * This hash chain list-traversal primitive may safely run concurrently with

+ * the _rcu mutation primitives such as rhashtable_insert() as long as the

+ * traversal is guarded by rcu_read_lock().

+ */

+#define rht_for_each_rcu(pos, tbl, hash)				\

+	rht_for_each_rcu_continue(pos, (tbl)->buckets[hash], tbl, hash)

+

+/**

+ * rht_for_each_entry_rcu_continue - continue iterating over rcu hash chain

+ * @tpos:	the type * to use as a loop cursor.

+ * @pos:	the &struct rhash_head to use as a loop cursor.

+ * @head:	the previous &struct rhash_head to continue from

+ * @tbl:	the &struct bucket_table

+ * @hash:	the hash value / bucket index

+ * @member:	name of the &struct rhash_head within the hashable struct.

+ *

+ * This hash chain list-traversal primitive may safely run concurrently with

+ * the _rcu mutation primitives such as rhashtable_insert() as long as the

+ * traversal is guarded by rcu_read_lock().

+ */

+#define rht_for_each_entry_rcu_continue(tpos, pos, head, tbl, hash, member) \

+	for (({barrier(); }),						    \

+	     pos = rht_dereference_bucket_rcu(head, tbl, hash);		    \

+	     (!rht_is_a_nulls(pos)) && rht_entry(tpos, pos, member);	    \

+	     pos = rht_dereference_bucket_rcu(pos->next, tbl, hash))

+

+/**

+ * rht_for_each_entry_rcu - iterate over rcu hash chain of given type

+ * @tpos:	the type * to use as a loop cursor.

+ * @pos:	the &struct rhash_head to use as a loop cursor.

+ * @tbl:	the &struct bucket_table

+ * @hash:	the hash value / bucket index

+ * @member:	name of the &struct rhash_head within the hashable struct.

+ *

+ * This hash chain list-traversal primitive may safely run concurrently with

+ * the _rcu mutation primitives such as rhashtable_insert() as long as the

+ * traversal is guarded by rcu_read_lock().

+ */

+#define rht_for_each_entry_rcu(tpos, pos, tbl, hash, member)		\

+	rht_for_each_entry_rcu_continue(tpos, pos, (tbl)->buckets[hash],\

+					tbl, hash, member)

+

+static inline int rhashtable_compare(struct rhashtable_compare_arg *arg,

+				     const void *obj)

+{

+	struct rhashtable *ht = arg->ht;

+	const char *ptr = obj;

+

+	return memcmp(ptr + ht->p.key_offset, arg->key, ht->p.key_len);

+}

+

+/**

+ * rhashtable_lookup_fast - search hash table, inlined version

+ * @ht:		hash table

+ * @key:	the pointer to the key

+ * @params:	hash table parameters

+ *

+ * Computes the hash value for the key and traverses the bucket chain looking

+ * for a entry with an identical key. The first matching entry is returned.

+ *

+ * Returns the first entry on which the compare function returned true.

+ */

+static inline void *rhashtable_lookup_fast(

+	struct rhashtable *ht, const void *key,

+	const struct rhashtable_params params)

+{

+	struct rhashtable_compare_arg arg = {

+		.ht = ht,

+		.key = key,

+	};

+	const struct bucket_table *tbl;

+	struct rhash_head *he;

+	unsigned int hash;

+

+	rcu_read_lock();

+

+	tbl = rht_dereference_rcu(ht->tbl, ht);

+restart:

+	hash = rht_key_hashfn(ht, tbl, key, params);

+	rht_for_each_rcu(he, tbl, hash) {

+		if (params.obj_cmpfn ?

+		    params.obj_cmpfn(&arg, rht_obj(ht, he)) :

+		    rhashtable_compare(&arg, rht_obj(ht, he)))

+			continue;

+		rcu_read_unlock();

+		return rht_obj(ht, he);

+	}

+

+	/* Ensure we see any new tables. */

+	smp_rmb();

+

+	tbl = rht_dereference_rcu(tbl->future_tbl, ht);

+	if (unlikely(tbl))

+		goto restart;

+	rcu_read_unlock();

+

+	return NULL;

+}

+

+/* Internal function, please use rhashtable_insert_fast() instead */

+static inline int __rhashtable_insert_fast(

+	struct rhashtable *ht, const void *key, struct rhash_head *obj,

+	const struct rhashtable_params params)

+{

+	struct rhashtable_compare_arg arg = {

+		.ht = ht,

+		.key = key,

+	};

+	struct bucket_table *tbl, *new_tbl;

+	struct rhash_head *head;

+	spinlock_t *lock;

+	unsigned int elasticity;

+	unsigned int hash;

+	int err;

+

+restart:

+	rcu_read_lock();

+

+	tbl = rht_dereference_rcu(ht->tbl, ht);

+

+	/* All insertions must grab the oldest table containing

+	 * the hashed bucket that is yet to be rehashed.

+	 */

+	for (;;) {

+		hash = rht_head_hashfn(ht, tbl, obj, params);

+		lock = rht_bucket_lock(tbl, hash);

+		spin_lock_bh(lock);

+

+		if (tbl->rehash <= hash)

+			break;

+

+		spin_unlock_bh(lock);

+		tbl = rht_dereference_rcu(tbl->future_tbl, ht);

+	}

+

+	new_tbl = rht_dereference_rcu(tbl->future_tbl, ht);

+	if (unlikely(new_tbl)) {

+		tbl = rhashtable_insert_slow(ht, key, obj, new_tbl);

+		if (!IS_ERR_OR_NULL(tbl))

+			goto slow_path;

+

+		err = PTR_ERR(tbl);

+		goto out;

+	}

+

+	err = -E2BIG;

+	if (unlikely(rht_grow_above_max(ht, tbl)))

+		goto out;

+

+	if (unlikely(rht_grow_above_100(ht, tbl))) {

+slow_path:

+		spin_unlock_bh(lock);

+		err = rhashtable_insert_rehash(ht, tbl);

+		rcu_read_unlock();

+		if (err)

+			return err;

+

+		goto restart;

+	}

+

+	err = -EEXIST;

+	elasticity = ht->elasticity;

+	rht_for_each(head, tbl, hash) {

+		if (key &&

+		    unlikely(!(params.obj_cmpfn ?

+			       params.obj_cmpfn(&arg, rht_obj(ht, head)) :

+			       rhashtable_compare(&arg, rht_obj(ht, head)))))

+			goto out;

+		if (!--elasticity)

+			goto slow_path;

+	}

+

+	err = 0;

+

+	head = rht_dereference_bucket(tbl->buckets[hash], tbl, hash);

+

+	RCU_INIT_POINTER(obj->next, head);

+

+	rcu_assign_pointer(tbl->buckets[hash], obj);

+

+	atomic_inc(&ht->nelems);

+	if (rht_grow_above_75(ht, tbl))

+		schedule_work(&ht->run_work);

+

+out:

+	spin_unlock_bh(lock);

+	rcu_read_unlock();

+

+	return err;

+}

+

+/**

+ * rhashtable_insert_fast - insert object into hash table

+ * @ht:		hash table

+ * @obj:	pointer to hash head inside object

+ * @params:	hash table parameters

+ *

+ * Will take a per bucket spinlock to protect against mutual mutations

+ * on the same bucket. Multiple insertions may occur in parallel unless

+ * they map to the same bucket lock.

+ *

+ * It is safe to call this function from atomic context.

+ *

+ * Will trigger an automatic deferred table resizing if the size grows

+ * beyond the watermark indicated by grow_decision() which can be passed

+ * to rhashtable_init().

+ */

+static inline int rhashtable_insert_fast(

+	struct rhashtable *ht, struct rhash_head *obj,

+	const struct rhashtable_params params)

+{

+	return __rhashtable_insert_fast(ht, NULL, obj, params);

+}

+

+/**

+ * rhashtable_lookup_insert_fast - lookup and insert object into hash table

+ * @ht:		hash table

+ * @obj:	pointer to hash head inside object

+ * @params:	hash table parameters

+ *

+ * Locks down the bucket chain in both the old and new table if a resize

+ * is in progress to ensure that writers can't remove from the old table

+ * and can't insert to the new table during the atomic operation of search

+ * and insertion. Searches for duplicates in both the old and new table if

+ * a resize is in progress.

+ *

+ * This lookup function may only be used for fixed key hash table (key_len

+ * parameter set). It will BUG() if used inappropriately.

+ *

+ * It is safe to call this function from atomic context.

+ *

+ * Will trigger an automatic deferred table resizing if the size grows

+ * beyond the watermark indicated by grow_decision() which can be passed

+ * to rhashtable_init().

+ */

+static inline int rhashtable_lookup_insert_fast(

+	struct rhashtable *ht, struct rhash_head *obj,

+	const struct rhashtable_params params)

+{

+	const char *key = rht_obj(ht, obj);

+

+	BUG_ON(ht->p.obj_hashfn);

+

+	return __rhashtable_insert_fast(ht, key + ht->p.key_offset, obj,

+					params);

+}

+

+/**

+ * rhashtable_lookup_insert_key - search and insert object to hash table

+ *				  with explicit key

+ * @ht:		hash table

+ * @key:	key

+ * @obj:	pointer to hash head inside object

+ * @params:	hash table parameters

+ *

+ * Locks down the bucket chain in both the old and new table if a resize

+ * is in progress to ensure that writers can't remove from the old table

+ * and can't insert to the new table during the atomic operation of search

+ * and insertion. Searches for duplicates in both the old and new table if

+ * a resize is in progress.

+ *

+ * Lookups may occur in parallel with hashtable mutations and resizing.

+ *

+ * Will trigger an automatic deferred table resizing if the size grows

+ * beyond the watermark indicated by grow_decision() which can be passed

+ * to rhashtable_init().

+ *

+ * Returns zero on success.

+ */

+static inline int rhashtable_lookup_insert_key(

+	struct rhashtable *ht, const void *key, struct rhash_head *obj,

+	const struct rhashtable_params params)

+{

+	BUG_ON(!ht->p.obj_hashfn || !key);

+

+	return __rhashtable_insert_fast(ht, key, obj, params);

+}

+

+/* Internal function, please use rhashtable_remove_fast() instead */

+static inline int __rhashtable_remove_fast(

+	struct rhashtable *ht, struct bucket_table *tbl,

+	struct rhash_head *obj, const struct rhashtable_params params)

+{

+	struct rhash_head __rcu **pprev;

+	struct rhash_head *he;

+	spinlock_t * lock;

+	unsigned int hash;

+	int err = -ENOENT;

+

+	hash = rht_head_hashfn(ht, tbl, obj, params);

+	lock = rht_bucket_lock(tbl, hash);

+

+	spin_lock_bh(lock);

+

+	pprev = &tbl->buckets[hash];

+	rht_for_each(he, tbl, hash) {

+		if (he != obj) {

+			pprev = &he->next;

+			continue;

+		}

+

+		rcu_assign_pointer(*pprev, obj->next);

+		err = 0;

+		break;

+	}

+

+	spin_unlock_bh(lock);

+

+	return err;

+}

+

+/**

+ * rhashtable_remove_fast - remove object from hash table

+ * @ht:		hash table

+ * @obj:	pointer to hash head inside object

+ * @params:	hash table parameters

+ *

+ * Since the hash chain is single linked, the removal operation needs to

+ * walk the bucket chain upon removal. The removal operation is thus

+ * considerable slow if the hash table is not correctly sized.

+ *

+ * Will automatically shrink the table via rhashtable_expand() if the

+ * shrink_decision function specified at rhashtable_init() returns true.

+ *

+ * Returns zero on success, -ENOENT if the entry could not be found.

+ */

+static inline int rhashtable_remove_fast(

+	struct rhashtable *ht, struct rhash_head *obj,

+	const struct rhashtable_params params)

+{

+	struct bucket_table *tbl;

+	int err;

+

+	rcu_read_lock();

+

+	tbl = rht_dereference_rcu(ht->tbl, ht);

+

+	/* Because we have already taken (and released) the bucket

+	 * lock in old_tbl, if we find that future_tbl is not yet

+	 * visible then that guarantees the entry to still be in

+	 * the old tbl if it exists.

+	 */

+	while ((err = __rhashtable_remove_fast(ht, tbl, obj, params)) &&

+	       (tbl = rht_dereference_rcu(tbl->future_tbl, ht)))

+		;

+

+	if (err)

+		goto out;

+

+	atomic_dec(&ht->nelems);

+	if (unlikely(ht->p.automatic_shrinking &&

+		     rht_shrink_below_30(ht, tbl)))

+		schedule_work(&ht->run_work);

+

+out:

+	rcu_read_unlock();

+

+	return err;

+}

+

+#endif /* _LINUX_RHASHTABLE_H */

+

diff --git a/rtl8723DS/os_dep/linux/rtw_android.c b/rtl8723DS/os_dep/linux/rtw_android.c
index adcd824..d364721 100755..100644
--- a/rtl8723DS/os_dep/linux/rtw_android.c
+++ b/rtl8723DS/os_dep/linux/rtw_android.c
@@ -55,6 +55,7 @@ const char *android_wifi_cmd_str[ANDROID_WIFI_CMD_MAX] = {
 	"BTCOEXSCAN-START",
 	"BTCOEXSCAN-STOP",
 	"BTCOEXMODE",
+	"SETSUSPENDMODE",
 	"SETSUSPENDOPT",
 	"P2P_DEV_ADDR",
 	"SETFWPATH",
@@ -93,6 +94,7 @@ const char *android_wifi_cmd_str[ANDROID_WIFI_CMD_MAX] = {
 #endif /* CONFIG_GTK_OL */
 /*	Private command for	P2P disable*/
 	"P2P_DISABLE",
+	"SET_AEK",
 	"DRIVER_VERSION"
 };
 
@@ -379,8 +381,6 @@ int rtw_android_get_rssi(struct net_device *net, char *command, int total_len)
 int rtw_android_get_link_speed(struct net_device *net, char *command, int total_len)
 {
 	_adapter *padapter = (_adapter *)rtw_netdev_priv(net);
-	struct	mlme_priv	*pmlmepriv = &(padapter->mlmepriv);
-	struct	wlan_network	*pcur_network = &pmlmepriv->cur_network;
 	int bytes_written = 0;
 	u16 link_speed = 0;
 
@@ -392,7 +392,6 @@ int rtw_android_get_link_speed(struct net_device *net, char *command, int total_
 
 int rtw_android_get_macaddr(struct net_device *net, char *command, int total_len)
 {
-	_adapter *adapter = (_adapter *)rtw_netdev_priv(net);
 	int bytes_written = 0;
 
 	bytes_written = snprintf(command, total_len, "Macaddr = "MAC_FMT, MAC_ARG(net->dev_addr));
@@ -564,8 +563,41 @@ int rtw_gtk_offload(struct net_device *net, u8 *cmd_ptr)
 }
 #endif /* CONFIG_GTK_OL */
 
+#ifdef CONFIG_RTW_MESH_AEK
+static int rtw_android_set_aek(struct net_device *ndev, char *command, int total_len)
+{
+#define SET_AEK_DATA_LEN (ETH_ALEN + 32)
+
+	_adapter *adapter = (_adapter *)rtw_netdev_priv(ndev);
+	u8 *addr;
+	u8 *aek;
+	int err = 0;
+
+	if (total_len - strlen(android_wifi_cmd_str[ANDROID_WIFI_CMD_SET_AEK]) - 1 != SET_AEK_DATA_LEN) {
+		err = -EINVAL;
+		goto exit;
+	}
+
+	addr = command + strlen(android_wifi_cmd_str[ANDROID_WIFI_CMD_SET_AEK]) + 1;
+	aek = addr + ETH_ALEN;
+
+	RTW_PRINT(FUNC_NDEV_FMT" addr="MAC_FMT"\n"
+		, FUNC_NDEV_ARG(ndev), MAC_ARG(addr));
+	if (0)
+		RTW_PRINT(FUNC_NDEV_FMT" aek="KEY_FMT KEY_FMT"\n"
+			, FUNC_NDEV_ARG(ndev), KEY_ARG(aek), KEY_ARG(aek + 16));
+
+	if (rtw_mesh_plink_set_aek(adapter, addr, aek) != _SUCCESS)
+		err = -ENOENT;
+
+exit:
+	return err;
+}
+#endif /* CONFIG_RTW_MESH_AEK */
+
 int rtw_android_priv_cmd(struct net_device *net, struct ifreq *ifr, int cmd)
 {
+	#define PRIVATE_COMMAND_MAX_LEN        8192
 	int ret = 0;
 	char *command = NULL;
 	int cmd_num;
@@ -617,7 +649,14 @@ int rtw_android_priv_cmd(struct net_device *net, struct ifreq *ifr, int cmd)
 		goto exit;
 	}
 	/*RTW_INFO("%s priv_cmd.buf=%p priv_cmd.total_len=%d  priv_cmd.used_len=%d\n",__func__,priv_cmd.buf,priv_cmd.total_len,priv_cmd.used_len);*/
-	command = rtw_zmalloc(priv_cmd.total_len);
+	if (priv_cmd.total_len > PRIVATE_COMMAND_MAX_LEN || priv_cmd.total_len < 0) {
+		RTW_WARN("%s: invalid private command (%d)\n", __FUNCTION__,
+			priv_cmd.total_len);
+		ret = -EFAULT;
+		goto exit;
+	}
+	
+	command = rtw_zmalloc(priv_cmd.total_len+1);
 	if (!command) {
 		RTW_INFO("%s: failed to allocate memory\n", __FUNCTION__);
 		ret = -ENOMEM;
@@ -633,7 +672,7 @@ int rtw_android_priv_cmd(struct net_device *net, struct ifreq *ifr, int cmd)
 		ret = -EFAULT;
 		goto exit;
 	}
-
+	command[priv_cmd.total_len] = '\0';
 	RTW_INFO("%s: Android private cmd \"%s\" on %s\n"
 		 , __FUNCTION__, command, ifr->ifr_name);
 
@@ -736,6 +775,9 @@ int rtw_android_priv_cmd(struct net_device *net, struct ifreq *ifr, int cmd)
 #endif
 		break;
 
+	case ANDROID_WIFI_CMD_SETSUSPENDMODE:
+		break;
+
 	case ANDROID_WIFI_CMD_SETSUSPENDOPT:
 		/* bytes_written = wl_android_set_suspendopt(net, command, priv_cmd.total_len); */
 		break;
@@ -820,7 +862,7 @@ int rtw_android_priv_cmd(struct net_device *net, struct ifreq *ifr, int cmd)
 		/*	wpa_cli driver wfd-set-tcpport = 554 */
 
 		if (padapter->wdinfo.driver_interface == DRIVER_CFG80211)
-			rtw_wfd_set_ctrl_port(padapter, (u16)get_int_from_command(priv_cmd.buf));
+			rtw_wfd_set_ctrl_port(padapter, (u16)get_int_from_command(command));
 		break;
 	}
 	case ANDROID_WIFI_CMD_WFD_SET_MAX_TPUT: {
@@ -832,7 +874,7 @@ int rtw_android_priv_cmd(struct net_device *net, struct ifreq *ifr, int cmd)
 
 		pwfd_info = &padapter->wfd_info;
 		if (padapter->wdinfo.driver_interface == DRIVER_CFG80211) {
-			pwfd_info->wfd_device_type = (u8) get_int_from_command(priv_cmd.buf);
+			pwfd_info->wfd_device_type = (u8) get_int_from_command(command);
 			pwfd_info->wfd_device_type &= WFD_DEVINFO_DUAL;
 		}
 		break;
@@ -841,7 +883,7 @@ int rtw_android_priv_cmd(struct net_device *net, struct ifreq *ifr, int cmd)
 	case ANDROID_WIFI_CMD_CHANGE_DTIM: {
 #ifdef CONFIG_LPS
 		u8 dtim;
-		u8 *ptr = (u8 *) &priv_cmd.buf;
+		u8 *ptr = (u8 *) command;
 
 		ptr += 9;/* string command length of  "SET_DTIM"; */
 
@@ -856,19 +898,19 @@ int rtw_android_priv_cmd(struct net_device *net, struct ifreq *ifr, int cmd)
 
 #if CONFIG_RTW_MACADDR_ACL
 	case ANDROID_WIFI_CMD_HOSTAPD_SET_MACADDR_ACL: {
-		rtw_set_macaddr_acl(padapter, get_int_from_command(command));
+		rtw_set_macaddr_acl(padapter, RTW_ACL_PERIOD_BSS, get_int_from_command(command));
 		break;
 	}
 	case ANDROID_WIFI_CMD_HOSTAPD_ACL_ADD_STA: {
 		u8 addr[ETH_ALEN] = {0x00};
 		macstr2num(addr, command + strlen("HOSTAPD_ACL_ADD_STA") + 3);	/* 3 is space bar + "=" + space bar these 3 chars */
-		rtw_acl_add_sta(padapter, addr);
+		rtw_acl_add_sta(padapter, RTW_ACL_PERIOD_BSS, addr);
 		break;
 	}
 	case ANDROID_WIFI_CMD_HOSTAPD_ACL_REMOVE_STA: {
 		u8 addr[ETH_ALEN] = {0x00};
 		macstr2num(addr, command + strlen("HOSTAPD_ACL_REMOVE_STA") + 3);	/* 3 is space bar + "=" + space bar these 3 chars */
-		rtw_acl_remove_sta(padapter, addr);
+		rtw_acl_remove_sta(padapter, RTW_ACL_PERIOD_BSS, addr);
 		break;
 	}
 #endif /* CONFIG_RTW_MACADDR_ACL */
@@ -879,14 +921,17 @@ int rtw_android_priv_cmd(struct net_device *net, struct ifreq *ifr, int cmd)
 #endif /* CONFIG_GTK_OL		 */
 	case ANDROID_WIFI_CMD_P2P_DISABLE: {
 #ifdef CONFIG_P2P
-		struct mlme_ext_priv	*pmlmeext = &padapter->mlmeextpriv;
-		u8 channel, ch_offset;
-		u16 bwmode;
-
 		rtw_p2p_enable(padapter, P2P_ROLE_DISABLE);
 #endif /* CONFIG_P2P */
 		break;
 	}
+
+#ifdef CONFIG_RTW_MESH_AEK
+	case ANDROID_WIFI_CMD_SET_AEK:
+		bytes_written = rtw_android_set_aek(net, command, priv_cmd.total_len);
+		break;
+#endif
+	
 	case ANDROID_WIFI_CMD_DRIVERVERSION: {
 		bytes_written = strlen(DRIVERVERSION);
 		snprintf(command, bytes_written + 1, DRIVERVERSION);
@@ -1080,6 +1125,81 @@ static int wifi_probe(struct platform_device *pdev)
 	return 0;
 }
 
+#ifdef RTW_SUPPORT_PLATFORM_SHUTDOWN
+extern PADAPTER g_test_adapter;
+
+static void shutdown_card(void)
+{
+	u32 addr;
+	u8 tmp8, cnt = 0;
+
+	if (NULL == g_test_adapter) {
+		RTW_INFO("%s: padapter==NULL\n", __FUNCTION__);
+		return;
+	}
+
+#ifdef CONFIG_FWLPS_IN_IPS
+	LeaveAllPowerSaveMode(g_test_adapter);
+#endif /* CONFIG_FWLPS_IN_IPS */
+
+#ifdef CONFIG_WOWLAN
+#ifdef CONFIG_GPIO_WAKEUP
+	/*default wake up pin change to BT*/
+	RTW_INFO("%s:default wake up pin change to BT\n", __FUNCTION__);
+	rtw_hal_switch_gpio_wl_ctrl(g_test_adapter, WAKEUP_GPIO_IDX, _FALSE);
+#endif /* CONFIG_GPIO_WAKEUP */
+#endif /* CONFIG_WOWLAN */
+
+	/* Leave SDIO HCI Suspend */
+	addr = 0x10250086;
+	rtw_write8(g_test_adapter, addr, 0);
+	do {
+		tmp8 = rtw_read8(g_test_adapter, addr);
+		cnt++;
+		RTW_INFO(FUNC_ADPT_FMT ": polling SDIO_HSUS_CTRL(0x%x)=0x%x, cnt=%d\n",
+			 FUNC_ADPT_ARG(g_test_adapter), addr, tmp8, cnt);
+
+		if (tmp8 & BIT(1))
+			break;
+
+		if (cnt >= 100) {
+			RTW_INFO(FUNC_ADPT_FMT ": polling 0x%x[1]==1 FAIL!!\n",
+				 FUNC_ADPT_ARG(g_test_adapter), addr);
+			break;
+		}
+
+		rtw_mdelay_os(10);
+	} while (1);
+
+	/* unlock register I/O */
+	rtw_write8(g_test_adapter, 0x1C, 0);
+
+	/* enable power down function */
+	/* 0x04[4] = 1 */
+	/* 0x05[7] = 1 */
+	addr = 0x04;
+	tmp8 = rtw_read8(g_test_adapter, addr);
+	tmp8 |= BIT(4);
+	rtw_write8(g_test_adapter, addr, tmp8);
+	RTW_INFO(FUNC_ADPT_FMT ": read after write 0x%x=0x%x\n",
+		FUNC_ADPT_ARG(g_test_adapter), addr, rtw_read8(g_test_adapter, addr));
+
+	addr = 0x05;
+	tmp8 = rtw_read8(g_test_adapter, addr);
+	tmp8 |= BIT(7);
+	rtw_write8(g_test_adapter, addr, tmp8);
+	RTW_INFO(FUNC_ADPT_FMT ": read after write 0x%x=0x%x\n",
+		FUNC_ADPT_ARG(g_test_adapter), addr, rtw_read8(g_test_adapter, addr));
+
+	/* lock register page0 0x0~0xB read/write */
+	rtw_write8(g_test_adapter, 0x1C, 0x0E);
+
+	rtw_set_surprise_removed(g_test_adapter);
+	RTW_INFO(FUNC_ADPT_FMT ": bSurpriseRemoved=%s\n",
+		FUNC_ADPT_ARG(g_test_adapter), rtw_is_surprise_removed(g_test_adapter) ? "True" : "False");
+}
+#endif /* RTW_SUPPORT_PLATFORM_SHUTDOWN */
+
 static int wifi_remove(struct platform_device *pdev)
 {
 	struct wifi_platform_data *wifi_ctrl =
@@ -1095,6 +1215,23 @@ static int wifi_remove(struct platform_device *pdev)
 	return 0;
 }
 
+#ifdef RTW_SUPPORT_PLATFORM_SHUTDOWN
+static void wifi_shutdown(struct platform_device *pdev)
+{
+	struct wifi_platform_data *wifi_ctrl =
+		(struct wifi_platform_data *)(pdev->dev.platform_data);
+
+
+	RTW_INFO("## %s\n", __FUNCTION__);
+
+	wifi_control_data = wifi_ctrl;
+
+	shutdown_card();
+	wifi_set_power(0, 0);	/* Power Off */
+	wifi_set_carddetect(0);	/* CardDetect (1->0) */
+}
+#endif /* RTW_SUPPORT_PLATFORM_SHUTDOWN */
+
 static int wifi_suspend(struct platform_device *pdev, pm_message_t state)
 {
 	RTW_INFO("##> %s\n", __FUNCTION__);
@@ -1120,6 +1257,9 @@ static struct platform_driver wifi_device = {
 	.remove         = wifi_remove,
 	.suspend        = wifi_suspend,
 	.resume         = wifi_resume,
+#ifdef RTW_SUPPORT_PLATFORM_SHUTDOWN
+	.shutdown       = wifi_shutdown,
+#endif /* RTW_SUPPORT_PLATFORM_SHUTDOWN */
 	.driver         = {
 		.name   = "bcmdhd_wlan",
 	}
diff --git a/rtl8723DS/os_dep/linux/rtw_cfgvendor.c b/rtl8723DS/os_dep/linux/rtw_cfgvendor.c
index 29faabc..d906163 100755..100644
--- a/rtl8723DS/os_dep/linux/rtw_cfgvendor.c
+++ b/rtl8723DS/os_dep/linux/rtw_cfgvendor.c
@@ -244,6 +244,8 @@ static int rtw_cfgvendor_send_cmd_reply(struct wiphy *wiphy,
 int rtw_dev_get_feature_set(struct net_device *dev)
 {
 	_adapter *adapter = (_adapter *)rtw_netdev_priv(dev);
+	HAL_DATA_TYPE *HalData = GET_HAL_DATA(adapter);
+	HAL_VERSION *hal_ver = &HalData->version_id;
 
 	int feature_set = 0;
 
@@ -262,6 +264,19 @@ int rtw_dev_get_feature_set(struct net_device *dev)
 	feature_set |= WIFI_FEATURE_LINK_LAYER_STATS;
 #endif /* CONFIG_RTW_CFGVEDNOR_LLSTATS */
 
+#ifdef CONFIG_RTW_CFGVEDNOR_RSSIMONITOR
+        feature_set |= WIFI_FEATURE_RSSI_MONITOR;
+#endif
+
+#ifdef CONFIG_RTW_CFGVENDOR_WIFI_LOGGER
+	feature_set |= WIFI_FEATURE_LOGGER;
+#endif
+
+#ifdef CONFIG_RTW_WIFI_HAL
+	feature_set |= WIFI_FEATURE_CONFIG_NDO;
+	feature_set |= WIFI_FEATURE_SCAN_RAND;
+#endif
+
 	return feature_set;
 }
 
@@ -1130,6 +1145,8 @@ enum {
 };
 static void LinkLayerStats(_adapter *padapter)
 {
+	struct xmit_priv		*pxmitpriv = &(padapter->xmitpriv);
+	struct recv_priv		*precvpriv = &(padapter->recvpriv);
 	struct pwrctrl_priv *pwrpriv = adapter_to_pwrctl(padapter);
 	struct dvobj_priv	*pdvobjpriv = adapter_to_dvobj(padapter);
 	u32 ps_time, trx_total_time;
@@ -1174,7 +1191,7 @@ static void LinkLayerStats(_adapter *padapter)
 		trx_total_bytes = tx_bytes + rx_bytes;
 
 		trx_total_time = pwrpriv->on_time - ps_time;
-		
+
 		if ( trx_total_bytes == 0) {
 			pwrpriv->tx_time = 0;
 			pwrpriv->rx_time = 0;
@@ -1182,7 +1199,7 @@ static void LinkLayerStats(_adapter *padapter)
 
 			/* tx_time = (trx_total_time * tx_total_bytes) / trx_total_bytes; */
 			/* rx_time = (trx_total_time * rx_total_bytes) / trx_total_bytes; */
-		
+
 			tmp = (tx_bytes * trx_total_time);
 			tmp = rtw_division64(tmp, trx_total_bytes);
 			pwrpriv->tx_time = tmp;
@@ -1192,7 +1209,7 @@ static void LinkLayerStats(_adapter *padapter)
 			pwrpriv->rx_time = tmp;		
 
 		}
-		
+	
 	}
 	else {
 			pwrpriv->on_time = 0;
@@ -1201,12 +1218,12 @@ static void LinkLayerStats(_adapter *padapter)
 	}
 
 #ifdef CONFIG_RTW_WIFI_HAL_DEBUG
-		RTW_INFO("- tx_bytes : %llu rx_bytes : %llu total bytes : %llu\n", tx_bytes, rx_bytes, trx_total_bytes);
-		RTW_INFO("- netif_up=%s, on_time : %u ms\n", padapter->netif_up ? "1":"0", pwrpriv->on_time);
-		RTW_INFO("- pwr_saving_time : %u (%u) ms\n", pwrpriv->pwr_saving_time, ps_time);
-		RTW_INFO("- trx_total_time : %u ms\n", trx_total_time);		
-		RTW_INFO("- tx_time : %u ms\n", pwrpriv->tx_time);
-		RTW_INFO("- rx_time : %u ms\n", pwrpriv->rx_time);
+	RTW_INFO("- tx_bytes : %llu rx_bytes : %llu total bytes : %llu\n", tx_bytes, rx_bytes, trx_total_bytes);
+	RTW_INFO("- netif_up = %s, on_time : %u ms\n", padapter->netif_up ? "1":"0", pwrpriv->on_time);
+	RTW_INFO("- pwr_saving_time : %u (%u) ms\n", pwrpriv->pwr_saving_time, ps_time);
+	RTW_INFO("- trx_total_time : %u ms\n", trx_total_time);		
+	RTW_INFO("- tx_time : %u ms\n", pwrpriv->tx_time);
+	RTW_INFO("- rx_time : %u ms\n", pwrpriv->rx_time);	
 #endif /* CONFIG_RTW_WIFI_HAL_DEBUG */
 
 }
@@ -1218,15 +1235,16 @@ static int rtw_cfgvendor_lstats_get_info(struct wiphy *wiphy,
 	int err = 0;
 	_adapter *padapter = GET_PRIMARY_ADAPTER(wiphy_to_adapter(wiphy));
 	struct pwrctrl_priv *pwrpriv = adapter_to_pwrctl(padapter);
-	wifi_radio_stat *radio;
+	wifi_radio_stat_internal *radio;
+	wifi_iface_stat *iface;
 	char *output;
 
-	output = rtw_malloc(sizeof(wifi_radio_stat) + sizeof(wifi_iface_stat)+1);
+	output = rtw_malloc(sizeof(wifi_radio_stat_internal) + sizeof(wifi_iface_stat));
 	if (output == NULL) {
 		RTW_DBG("Allocate lstats info buffer fail!\n");
 	}
 
-	radio = (wifi_radio_stat *)output;
+	radio = (wifi_radio_stat_internal *)output;
 
 	radio->num_channels = 0;
 	radio->radio = 1;
@@ -1237,12 +1255,6 @@ static int rtw_cfgvendor_lstats_get_info(struct wiphy *wiphy,
 	radio->on_time = pwrpriv->on_time;
 	radio->tx_time = pwrpriv->tx_time;
 	radio->rx_time = pwrpriv->rx_time;
-	
-	radio->num_tx_levels = 1;
-	radio->tx_time_per_levels = NULL;
-	radio->tx_time_per_levels = (u32*)(output+sizeof(wifi_radio_stat) + sizeof(wifi_iface_stat));
-	*(radio->tx_time_per_levels) = DUMMY_TIME_STATICS;
-
 	radio->on_time_scan = 0;
 	radio->on_time_nbd = 0;
 	radio->on_time_gscan = 0;
@@ -1257,16 +1269,15 @@ static int rtw_cfgvendor_lstats_get_info(struct wiphy *wiphy,
 	RTW_INFO("radio->on_time :  %u ms\n", (radio->on_time));
 	RTW_INFO("radio->tx_time :  %u ms\n", (radio->tx_time));
 	RTW_INFO("radio->rx_time :  %u ms\n", (radio->rx_time));
-	RTW_INFO("radio->tx_time_per_levels value :  %u ms\n", *(radio->tx_time_per_levels));
 	#endif /* CONFIG_RTW_WIFI_HAL_DEBUG */
 	
 	RTW_DBG(FUNC_NDEV_FMT" %s\n", FUNC_NDEV_ARG(wdev_to_ndev(wdev)), (char*)data);
 	err =  rtw_cfgvendor_send_cmd_reply(wiphy, wdev_to_ndev(wdev), 
-		output, sizeof(wifi_iface_stat) + sizeof(wifi_radio_stat)+1);
+		output, sizeof(wifi_iface_stat) + sizeof(wifi_radio_stat_internal));
 	if (unlikely(err))
 		RTW_ERR(FUNC_NDEV_FMT"Vendor Command reply failed ret:%d \n"
 			, FUNC_NDEV_ARG(wdev_to_ndev(wdev)), err);
-	rtw_mfree(output, sizeof(wifi_iface_stat) + sizeof(wifi_radio_stat)+1);
+	rtw_mfree(output, sizeof(wifi_iface_stat) + sizeof(wifi_radio_stat_internal));
 	return err;
 }
 static int rtw_cfgvendor_lstats_set_info(struct wiphy *wiphy,	
@@ -1284,6 +1295,450 @@ static int rtw_cfgvendor_lstats_clear_info(struct wiphy *wiphy,
 	return err;
 }
 #endif /* CONFIG_RTW_CFGVEDNOR_LLSTATS */
+#ifdef CONFIG_RTW_CFGVEDNOR_RSSIMONITOR
+static int rtw_cfgvendor_set_rssi_monitor(struct wiphy *wiphy,
+	struct wireless_dev *wdev, const void  *data, int len)
+{
+        _adapter *padapter = GET_PRIMARY_ADAPTER(wiphy_to_adapter(wiphy));
+        struct rtw_wdev_priv *pwdev_priv = adapter_wdev_data(padapter);
+
+        struct recv_priv *precvpriv = &padapter->recvpriv;
+	int err = 0, rem, type;
+        const struct nlattr *iter;
+
+        RTW_DBG(FUNC_NDEV_FMT" %s\n", FUNC_NDEV_ARG(wdev_to_ndev(wdev)), (char*)data);
+
+	nla_for_each_attr(iter, data, len, rem) {
+		type = nla_type(iter);
+
+		switch (type) {
+        		case RSSI_MONITOR_ATTRIBUTE_MAX_RSSI:
+                                pwdev_priv->rssi_monitor_max = (s8)nla_get_u32(iter);;
+	        		break;
+		        case RSSI_MONITOR_ATTRIBUTE_MIN_RSSI:
+                                pwdev_priv->rssi_monitor_min = (s8)nla_get_u32(iter);
+			        break;
+        		case RSSI_MONITOR_ATTRIBUTE_START:
+                                pwdev_priv->rssi_monitor_enable = (u8)nla_get_u32(iter);
+	        		break;
+		}
+	}
+
+	return err;
+}
+
+void rtw_cfgvendor_rssi_monitor_evt(_adapter *padapter) {
+	struct wireless_dev *wdev =  padapter->rtw_wdev;
+	struct wiphy *wiphy= wdev->wiphy;
+        struct recv_priv *precvpriv = &padapter->recvpriv;
+	struct	mlme_priv	*pmlmepriv = &(padapter->mlmepriv);
+	struct	wlan_network	*pcur_network = &pmlmepriv->cur_network;
+        struct rtw_wdev_priv *pwdev_priv = adapter_wdev_data(padapter);
+	struct sk_buff *skb;
+	u32 tot_len = NLMSG_DEFAULT_SIZE;
+	gfp_t kflags;
+        rssi_monitor_evt data ;
+        s8 rssi = precvpriv->rssi;
+
+        if (pwdev_priv->rssi_monitor_enable == 0 || check_fwstate(pmlmepriv, _FW_LINKED) != _TRUE)
+                return;
+
+        if (rssi < pwdev_priv->rssi_monitor_max || rssi > pwdev_priv->rssi_monitor_min)
+                return;
+
+	kflags = in_atomic() ? GFP_ATOMIC : GFP_KERNEL;
+
+	/* Alloc the SKB for vendor_event */
+	skb = rtw_cfg80211_vendor_event_alloc(wiphy, wdev, tot_len, GOOGLE_RSSI_MONITOR_EVENT, kflags);
+	if (!skb) {
+		goto exit;
+	}
+
+        _rtw_memset(&data, 0, sizeof(data));
+
+        data.version = RSSI_MONITOR_EVT_VERSION;
+        data.cur_rssi = rssi;
+        _rtw_memcpy(data.BSSID, pcur_network->network.MacAddress, sizeof(mac_addr));
+
+        nla_append(skb, sizeof(data), &data);
+
+	rtw_cfg80211_vendor_event(skb, kflags);
+exit:
+	return;
+}
+#endif /* CONFIG_RTW_CFGVEDNOR_RSSIMONITR */
+
+#ifdef CONFIG_RTW_CFGVENDOR_WIFI_LOGGER
+static int rtw_cfgvendor_logger_start_logging(struct wiphy *wiphy,
+	struct wireless_dev *wdev, const void  *data, int len)
+{
+	int ret = 0, rem, type;
+	char ring_name[32] = {0};
+	int log_level = 0, flags = 0, time_intval = 0, threshold = 0;
+	const struct nlattr *iter;
+
+	nla_for_each_attr(iter, data, len, rem) {
+		type = nla_type(iter);
+		switch (type) {
+			case LOGGER_ATTRIBUTE_RING_NAME:
+				strncpy(ring_name, nla_data(iter),
+					MIN(sizeof(ring_name) -1, nla_len(iter)));
+				break;
+			case LOGGER_ATTRIBUTE_LOG_LEVEL:
+				log_level = nla_get_u32(iter);
+				break;
+			case LOGGER_ATTRIBUTE_RING_FLAGS:
+				flags = nla_get_u32(iter);
+				break;
+			case LOGGER_ATTRIBUTE_LOG_TIME_INTVAL:
+				time_intval = nla_get_u32(iter);
+				break;
+			case LOGGER_ATTRIBUTE_LOG_MIN_DATA_SIZE:
+				threshold = nla_get_u32(iter);
+				break;
+			default:
+				RTW_ERR("Unknown type: %d\n", type);
+				ret = WIFI_ERROR_INVALID_ARGS;
+				goto exit;
+		}
+	}
+
+exit:
+	return ret;
+}
+static int rtw_cfgvendor_logger_get_feature(struct wiphy *wiphy,
+	struct wireless_dev *wdev, const void *data, int len)
+{
+	int err = 0;
+	u32 supported_features = 0;
+
+	err =  rtw_cfgvendor_send_cmd_reply(wiphy, wdev_to_ndev(wdev), &supported_features, sizeof(supported_features));
+
+	if (unlikely(err))
+		RTW_ERR(FUNC_NDEV_FMT" Vendor Command reply failed ret:%d\n"
+			, FUNC_NDEV_ARG(wdev_to_ndev(wdev)), err);
+
+	return err;
+}
+static int rtw_cfgvendor_logger_get_version(struct wiphy *wiphy,
+	struct wireless_dev *wdev, const void *data, int len)
+{
+	_adapter *padapter = GET_PRIMARY_ADAPTER(wiphy_to_adapter(wiphy));
+	HAL_DATA_TYPE *hal = GET_HAL_DATA(padapter);
+	int ret = 0, rem, type;
+	int buf_len = 1024;
+	char *buf_ptr;
+	const struct nlattr *iter;
+	gfp_t kflags;
+
+	kflags = in_atomic() ? GFP_ATOMIC : GFP_KERNEL;
+	buf_ptr = kzalloc(buf_len, kflags);
+	if (!buf_ptr) {
+		RTW_ERR("failed to allocate the buffer for version n");
+		ret = -ENOMEM;
+		goto exit;
+	}
+	nla_for_each_attr(iter, data, len, rem) {
+		type = nla_type(iter);
+		switch (type) {
+			case LOGGER_ATTRIBUTE_GET_DRIVER:
+				memcpy(buf_ptr, DRIVERVERSION, strlen(DRIVERVERSION)+1);
+				break;
+			case LOGGER_ATTRIBUTE_GET_FW:
+				sprintf(buf_ptr, "v%d.%d", hal->firmware_version, hal->firmware_sub_version);
+				break;
+			default:
+				RTW_ERR("Unknown type: %d\n", type);
+				ret = -EINVAL;
+				goto exit;
+		}
+	}
+	if (ret < 0) {
+		RTW_ERR("failed to get the version %d\n", ret);
+		goto exit;
+	}
+
+
+	ret =  rtw_cfgvendor_send_cmd_reply(wiphy, wdev_to_ndev(wdev), buf_ptr, strlen(buf_ptr));
+exit:
+	kfree(buf_ptr);
+	return ret;
+}
+
+static int rtw_cfgvendor_logger_get_ring_status(struct wiphy *wiphy,
+	struct wireless_dev *wdev, const void  *data, int len)
+{
+	int ret = 0;
+	int ring_id;
+	char ring_buf_name[] = "RTW_RING_BUFFER";
+
+	struct sk_buff *skb;
+	wifi_ring_buffer_status ring_status;
+
+
+	_rtw_memcpy(ring_status.name, ring_buf_name, strlen(ring_buf_name)+1);
+	ring_status.ring_id = 1;
+	/* Alloc the SKB for vendor_event */
+	skb = cfg80211_vendor_cmd_alloc_reply_skb(wiphy,
+		sizeof(wifi_ring_buffer_status));
+	if (!skb) {
+		RTW_ERR("skb allocation is failed\n");
+		ret = FAIL;
+		goto exit;
+	}
+
+	nla_put_u32(skb, LOGGER_ATTRIBUTE_RING_NUM, 1);
+	nla_put(skb, LOGGER_ATTRIBUTE_RING_STATUS, sizeof(wifi_ring_buffer_status),
+				&ring_status);
+	ret = cfg80211_vendor_cmd_reply(skb);
+
+	if (ret) {
+		RTW_ERR("Vendor Command reply failed ret:%d \n", ret);
+	}
+exit:
+	return ret;
+}
+
+static int rtw_cfgvendor_logger_get_ring_data(struct wiphy *wiphy,
+	struct wireless_dev *wdev, const void  *data, int len)
+{
+	int ret = 0, rem, type;
+	char ring_name[32] = {0};
+	const struct nlattr *iter;
+
+	nla_for_each_attr(iter, data, len, rem) {
+		type = nla_type(iter);
+		switch (type) {
+			case LOGGER_ATTRIBUTE_RING_NAME:
+				strncpy(ring_name, nla_data(iter),
+					MIN(sizeof(ring_name) -1, nla_len(iter)));
+				RTW_INFO(" %s LOGGER_ATTRIBUTE_RING_NAME : %s\n", __func__, ring_name);
+				break;
+			default:
+				RTW_ERR("Unknown type: %d\n", type);
+				return ret;
+		}
+	}
+
+
+	return ret;
+}
+
+static int rtw_cfgvendor_logger_get_firmware_memory_dump(struct wiphy *wiphy,
+	struct wireless_dev *wdev, const void  *data, int len)
+{
+	int ret = WIFI_ERROR_NOT_SUPPORTED;
+
+	return ret;
+}
+
+static int rtw_cfgvendor_logger_start_pkt_fate_monitoring(struct wiphy *wiphy,
+	struct wireless_dev *wdev, const void  *data, int len)
+{
+	int ret = WIFI_SUCCESS;
+
+	return ret;
+}
+
+static int rtw_cfgvendor_logger_get_tx_pkt_fates(struct wiphy *wiphy,
+	struct wireless_dev *wdev, const void  *data, int len)
+{
+	int ret = WIFI_SUCCESS;
+
+	return ret;
+}
+
+static int rtw_cfgvendor_logger_get_rx_pkt_fates(struct wiphy *wiphy,
+	struct wireless_dev *wdev, const void  *data, int len)
+{
+	int ret = WIFI_SUCCESS;
+
+	return ret;
+}
+
+#endif /* CONFIG_RTW_CFGVENDOR_WIFI_LOGGER */
+#ifdef CONFIG_RTW_WIFI_HAL
+#ifdef CONFIG_RTW_CFGVENDOR_RANDOM_MAC_OUI
+
+#ifndef ETHER_ISMULTI
+#define ETHER_ISMULTI(ea) (((const u8 *)(ea))[0] & 1)
+#endif
+
+
+static u8 null_addr[ETH_ALEN] = {0};
+static void rtw_hal_random_gen_mac_addr(u8 *mac_addr)
+{
+	do {
+		get_random_bytes(&mac_addr[3], ETH_ALEN-3);
+		if (memcmp(mac_addr, null_addr, ETH_ALEN) != 0)
+			break;
+	} while(1);
+}
+
+void rtw_hal_pno_random_gen_mac_addr(PADAPTER adapter)
+{
+	u8 mac_addr[ETH_ALEN];
+	struct rtw_wdev_priv *pwdev_priv = adapter_wdev_data(adapter);
+
+	memcpy(mac_addr, pwdev_priv->pno_mac_addr, ETH_ALEN);
+	if (mac_addr[0] == 0xFF) return;
+	rtw_hal_random_gen_mac_addr(mac_addr);
+	memcpy(pwdev_priv->pno_mac_addr, mac_addr, ETH_ALEN);
+#ifdef CONFIG_RTW_DEBUG
+	print_hex_dump(KERN_DEBUG, "pno_mac_addr: ",
+		       DUMP_PREFIX_OFFSET, 16, 1, pwdev_priv->pno_mac_addr,
+		       ETH_ALEN, 1);
+#endif
+}
+
+void rtw_hal_set_hw_mac_addr(PADAPTER adapter, u8 *mac_addr)
+{
+	rtw_ps_deny(adapter, PS_DENY_IOCTL);
+	LeaveAllPowerSaveModeDirect(adapter);
+
+	rtw_hal_set_hwreg(adapter, HW_VAR_MAC_ADDR, mac_addr);
+#ifdef CONFIG_RTW_DEBUG
+	rtw_hal_dump_macaddr(RTW_DBGDUMP, adapter);
+#endif
+	rtw_ps_deny_cancel(adapter, PS_DENY_IOCTL);
+}
+
+static int rtw_cfgvendor_set_rand_mac_oui(struct wiphy *wiphy,
+		struct wireless_dev *wdev, const void  *data, int len)
+{
+	int err = 0;
+	PADAPTER adapter;
+	void *devaddr;
+	struct net_device *netdev;
+	int type, mac_len;
+	u8 pno_random_mac_oui[3];
+	u8 mac_addr[ETH_ALEN] = {0};
+	struct pwrctrl_priv *pwrctl;
+	struct rtw_wdev_priv *pwdev_priv;
+
+	type = nla_type(data);
+	mac_len = nla_len(data);
+	if (mac_len != 3) {
+		RTW_ERR("%s oui len error %d != 3\n", __func__, mac_len);
+		return -1;
+	}
+
+	if (type == ANDR_WIFI_ATTRIBUTE_RANDOM_MAC_OUI) {
+		memcpy(pno_random_mac_oui, nla_data(data), 3);
+		print_hex_dump(KERN_DEBUG, "pno_random_mac_oui: ",
+			       DUMP_PREFIX_OFFSET, 16, 1, pno_random_mac_oui,
+			       3, 1);
+
+		if (ETHER_ISMULTI(pno_random_mac_oui)) {
+			pr_err("%s: oui is multicast address\n", __func__);
+			return -1;
+		}
+
+		adapter = wiphy_to_adapter(wiphy);
+		if (adapter == NULL) {
+			pr_err("%s: wiphy_to_adapter == NULL\n", __func__);
+			return -1;
+		}
+
+		pwdev_priv = adapter_wdev_data(adapter);
+
+		memcpy(mac_addr, pno_random_mac_oui, 3);
+		rtw_hal_random_gen_mac_addr(mac_addr);
+		memcpy(pwdev_priv->pno_mac_addr, mac_addr, ETH_ALEN);
+#ifdef CONFIG_RTW_DEBUG
+		print_hex_dump(KERN_DEBUG, "pno_mac_addr: ",
+			       DUMP_PREFIX_OFFSET, 16, 1, pwdev_priv->pno_mac_addr,
+			       ETH_ALEN, 1);
+#endif
+	} else {
+		RTW_ERR("%s oui type error %x != 0x2\n", __func__, type);
+		err = -1;
+	}
+
+
+	return err;
+}
+
+#endif
+
+
+static int rtw_cfgvendor_set_nodfs_flag(struct wiphy *wiphy,
+	struct wireless_dev *wdev, const void *data, int len)
+{
+	int err = 0;	
+	int type;
+	u32 nodfs = 0;
+	_adapter *padapter = GET_PRIMARY_ADAPTER(wiphy_to_adapter(wiphy));
+
+	RTW_DBG(FUNC_NDEV_FMT" %s\n", FUNC_NDEV_ARG(wdev_to_ndev(wdev)), (char*)data);
+
+	type = nla_type(data);
+	if (type == ANDR_WIFI_ATTRIBUTE_NODFS_SET) {
+		nodfs = nla_get_u32(data);
+		adapter_to_dvobj(padapter)->nodfs = nodfs;
+	} else {
+		err = -EINVAL;
+	}
+
+	RTW_INFO("%s nodfs=%d, err=%d\n", __func__, nodfs, err);
+	
+	return err;
+}
+
+static int rtw_cfgvendor_set_country(struct wiphy *wiphy,
+	struct wireless_dev *wdev, const void  *data, int len)
+{
+#define CNTRY_BUF_SZ	4	/* Country string is 3 bytes + NUL */
+	int err = 0, rem, type;
+	char country_code[CNTRY_BUF_SZ] = {0};
+	const struct nlattr *iter;
+	_adapter *padapter = GET_PRIMARY_ADAPTER(wiphy_to_adapter(wiphy));
+
+	RTW_DBG(FUNC_NDEV_FMT" %s\n", FUNC_NDEV_ARG(wdev_to_ndev(wdev)), (char*)data);
+
+	nla_for_each_attr(iter, data, len, rem) {
+		type = nla_type(iter);
+		switch (type) {
+			case ANDR_WIFI_ATTRIBUTE_COUNTRY:
+				_rtw_memcpy(country_code, nla_data(iter),
+					MIN(nla_len(iter), CNTRY_BUF_SZ));
+				break;
+			default:
+				RTW_ERR("Unknown type: %d\n", type);
+				return -EINVAL;
+		}
+	}
+
+	RTW_INFO("%s country_code:\"%c%c\" \n", __func__, country_code[0], country_code[1]);
+
+	rtw_set_country(padapter, country_code);
+
+	return err;
+}
+
+static int rtw_cfgvendor_set_nd_offload(struct wiphy *wiphy,
+	struct wireless_dev *wdev, const void *data, int len)
+{
+	int err = 0;	
+	int type;
+	u8 nd_en = 0;
+	_adapter *padapter = GET_PRIMARY_ADAPTER(wiphy_to_adapter(wiphy));
+
+	RTW_DBG(FUNC_NDEV_FMT" %s\n", FUNC_NDEV_ARG(wdev_to_ndev(wdev)), (char*)data);
+
+	type = nla_type(data);
+	if (type == ANDR_WIFI_ATTRIBUTE_ND_OFFLOAD_VALUE) {
+		nd_en = nla_get_u8(data);
+		/* ND has been enabled when wow is enabled */
+	} else {
+		err = -EINVAL;
+	}
+
+	RTW_INFO("%s nd_en=%d, err=%d\n", __func__, nd_en, err);
+	
+	return err;
+}
+#endif /* CONFIG_RTW_WIFI_HAL */
 
 static const struct wiphy_vendor_command rtw_vendor_cmds[] = {
 #if defined(GSCAN_SUPPORT) && 0
@@ -1412,6 +1867,127 @@ static const struct wiphy_vendor_command rtw_vendor_cmds[] = {
 		.doit = rtw_cfgvendor_lstats_clear_info
 	},
 #endif /* CONFIG_RTW_CFGVEDNOR_LLSTATS */
+#ifdef CONFIG_RTW_CFGVEDNOR_RSSIMONITOR
+        {
+                {
+                        .vendor_id = OUI_GOOGLE,
+                        .subcmd = WIFI_SUBCMD_SET_RSSI_MONITOR
+                },
+                .flags = WIPHY_VENDOR_CMD_NEED_WDEV | WIPHY_VENDOR_CMD_NEED_NETDEV,
+                .doit = rtw_cfgvendor_set_rssi_monitor
+        },
+#endif /* CONFIG_RTW_CFGVEDNOR_RSSIMONITOR */
+#ifdef CONFIG_RTW_CFGVENDOR_WIFI_LOGGER
+	{
+		{
+			.vendor_id = OUI_GOOGLE,
+			.subcmd = LOGGER_START_LOGGING
+		},
+		.flags = WIPHY_VENDOR_CMD_NEED_WDEV | WIPHY_VENDOR_CMD_NEED_NETDEV,
+		.doit = rtw_cfgvendor_logger_start_logging
+	},
+	{
+		{
+			.vendor_id = OUI_GOOGLE,
+			.subcmd = LOGGER_GET_FEATURE
+		},
+		.flags = WIPHY_VENDOR_CMD_NEED_WDEV | WIPHY_VENDOR_CMD_NEED_NETDEV,
+		.doit = rtw_cfgvendor_logger_get_feature
+	},
+	{
+		{
+			.vendor_id = OUI_GOOGLE,
+			.subcmd = LOGGER_GET_VER
+		},
+		.flags = WIPHY_VENDOR_CMD_NEED_WDEV | WIPHY_VENDOR_CMD_NEED_NETDEV,
+		.doit = rtw_cfgvendor_logger_get_version
+	},
+	{
+		{
+			.vendor_id = OUI_GOOGLE,
+			.subcmd = LOGGER_GET_RING_STATUS
+		},
+		.flags = WIPHY_VENDOR_CMD_NEED_WDEV | WIPHY_VENDOR_CMD_NEED_NETDEV,
+		.doit = rtw_cfgvendor_logger_get_ring_status
+	},
+	{
+		{
+			.vendor_id = OUI_GOOGLE,
+			.subcmd = LOGGER_GET_RING_DATA
+		},
+		.flags = WIPHY_VENDOR_CMD_NEED_WDEV | WIPHY_VENDOR_CMD_NEED_NETDEV,
+		.doit = rtw_cfgvendor_logger_get_ring_data
+	},
+	{
+		{
+			.vendor_id = OUI_GOOGLE,
+			.subcmd = LOGGER_TRIGGER_MEM_DUMP
+		},
+		.flags = WIPHY_VENDOR_CMD_NEED_WDEV | WIPHY_VENDOR_CMD_NEED_NETDEV,
+		.doit = rtw_cfgvendor_logger_get_firmware_memory_dump
+	},
+	{
+		{
+			.vendor_id = OUI_GOOGLE,
+			.subcmd = LOGGER_START_PKT_FATE_MONITORING
+		},
+		.flags = WIPHY_VENDOR_CMD_NEED_WDEV | WIPHY_VENDOR_CMD_NEED_NETDEV,
+		.doit = rtw_cfgvendor_logger_start_pkt_fate_monitoring
+	},
+	{
+		{
+			.vendor_id = OUI_GOOGLE,
+			.subcmd = LOGGER_GET_TX_PKT_FATES
+		},
+		.flags = WIPHY_VENDOR_CMD_NEED_WDEV | WIPHY_VENDOR_CMD_NEED_NETDEV,
+		.doit = rtw_cfgvendor_logger_get_tx_pkt_fates
+	},
+	{
+		{
+			.vendor_id = OUI_GOOGLE,
+			.subcmd = LOGGER_GET_RX_PKT_FATES
+		},
+		.flags = WIPHY_VENDOR_CMD_NEED_WDEV | WIPHY_VENDOR_CMD_NEED_NETDEV,
+		.doit = rtw_cfgvendor_logger_get_rx_pkt_fates
+	},	
+#endif /* CONFIG_RTW_CFGVENDOR_WIFI_LOGGER */
+#ifdef CONFIG_RTW_WIFI_HAL
+#ifdef CONFIG_RTW_CFGVENDOR_RANDOM_MAC_OUI
+	{
+		{
+			.vendor_id = OUI_GOOGLE,
+			.subcmd = WIFI_SUBCMD_SET_PNO_RANDOM_MAC_OUI
+		},
+		.flags = WIPHY_VENDOR_CMD_NEED_WDEV | WIPHY_VENDOR_CMD_NEED_NETDEV,
+		.doit = rtw_cfgvendor_set_rand_mac_oui
+	},
+#endif
+	{
+		{
+			.vendor_id = OUI_GOOGLE,
+			.subcmd = WIFI_SUBCMD_NODFS_SET
+		},
+		.flags = WIPHY_VENDOR_CMD_NEED_WDEV | WIPHY_VENDOR_CMD_NEED_NETDEV,
+		.doit = rtw_cfgvendor_set_nodfs_flag
+
+	},
+	{
+		{
+			.vendor_id = OUI_GOOGLE,
+			.subcmd = WIFI_SUBCMD_SET_COUNTRY_CODE
+		},
+		.flags = WIPHY_VENDOR_CMD_NEED_WDEV | WIPHY_VENDOR_CMD_NEED_NETDEV,
+		.doit = rtw_cfgvendor_set_country
+	},
+	{
+		{
+			.vendor_id = OUI_GOOGLE,
+			.subcmd = WIFI_SUBCMD_CONFIG_ND_OFFLOAD
+		},
+		.flags = WIPHY_VENDOR_CMD_NEED_WDEV | WIPHY_VENDOR_CMD_NEED_NETDEV,
+		.doit = rtw_cfgvendor_set_nd_offload
+	},
+#endif /* CONFIG_RTW_WIFI_HAL */
 	{
 		{
 			.vendor_id = OUI_GOOGLE,
@@ -1440,6 +2016,11 @@ static const struct  nl80211_vendor_cmd_info rtw_vendor_events[] = {
 #if defined(RTT_SUPPORT) && 0
 	{ OUI_GOOGLE, RTT_EVENT_COMPLETE },
 #endif /* RTT_SUPPORT */
+
+#ifdef CONFIG_RTW_CFGVEDNOR_RSSIMONITOR
+	{ OUI_GOOGLE, GOOGLE_RSSI_MONITOR_EVENT },
+#endif /* RTW_CFGVEDNOR_RSSIMONITR */
+
 #if defined(GSCAN_SUPPORT) && 0
 	{ OUI_GOOGLE, GSCAN_EVENT_COMPLETE_SCAN },
 	{ OUI_GOOGLE, GSCAN_EVENT_HOTLIST_RESULTS_LOST }
diff --git a/rtl8723DS/os_dep/linux/rtw_cfgvendor.h b/rtl8723DS/os_dep/linux/rtw_cfgvendor.h
index d5157b3..af423fc 100755..100644
--- a/rtl8723DS/os_dep/linux/rtw_cfgvendor.h
+++ b/rtl8723DS/os_dep/linux/rtw_cfgvendor.h
@@ -122,6 +122,22 @@ enum rtw_vendor_subcmd {
 
     APF_SUBCMD_GET_CAPABILITIES = ANDROID_NL80211_SUBCMD_PKT_FILTER_RANGE_START,
     APF_SUBCMD_SET_FILTER,
+    
+    LOGGER_START_LOGGING = ANDROID_NL80211_SUBCMD_DEBUG_RANGE_START,
+    LOGGER_TRIGGER_MEM_DUMP,
+    LOGGER_GET_MEM_DUMP,
+    LOGGER_GET_VER,
+    LOGGER_GET_RING_STATUS,
+    LOGGER_GET_RING_DATA,
+    LOGGER_GET_FEATURE,
+    LOGGER_RESET_LOGGING,
+    LOGGER_TRIGGER_DRIVER_MEM_DUMP,
+    LOGGER_GET_DRIVER_MEM_DUMP,
+    LOGGER_START_PKT_FATE_MONITORING,
+    LOGGER_GET_TX_PKT_FATES,
+    LOGGER_GET_RX_PKT_FATES,
+
+	VENDOR_SUBCMD_MAX
 };
 
 enum gscan_attributes {
@@ -199,6 +215,13 @@ enum gscan_ch_attributes {
 	GSCAN_ATTRIBUTE_CH_ID_7
 };
 
+enum wifi_rssi_monitor_attr {
+        RSSI_MONITOR_ATTRIBUTE_MAX_RSSI,
+        RSSI_MONITOR_ATTRIBUTE_MIN_RSSI,
+        RSSI_MONITOR_ATTRIBUTE_START,
+};
+
+
 enum rtt_attributes {
 	RTT_ATTRIBUTE_TARGET_CNT,
 	RTT_ATTRIBUTE_TARGET_INFO,
@@ -213,6 +236,21 @@ enum rtt_attributes {
 	RTT_ATTRIBUTE_TARGET_NUM_RETRY
 };
 
+enum logger_attributes {
+	LOGGER_ATTRIBUTE_GET_DRIVER,
+	LOGGER_ATTRIBUTE_GET_FW,
+	LOGGER_ATTRIBUTE_RING_ID,
+	LOGGER_ATTRIBUTE_RING_NAME,
+	LOGGER_ATTRIBUTE_RING_FLAGS,
+	LOGGER_ATTRIBUTE_LOG_LEVEL,
+	LOGGER_ATTRIBUTE_LOG_TIME_INTVAL,
+	LOGGER_ATTRIBUTE_LOG_MIN_DATA_SIZE,
+	LOGGER_ATTRIBUTE_FW_DUMP_LEN,
+	LOGGER_ATTRIBUTE_FW_DUMP_DATA,
+	LOGGERG_ATTRIBUTE_RING_DATA,
+	LOGGER_ATTRIBUTE_RING_STATUS,
+	LOGGER_ATTRIBUTE_RING_NUM
+};
 typedef enum rtw_vendor_event {
     RTK_RESERVED1,
     RTK_RESERVED2,
@@ -232,7 +270,12 @@ typedef enum rtw_vendor_event {
 
 enum andr_wifi_feature_set_attr {
 	ANDR_WIFI_ATTRIBUTE_NUM_FEATURE_SET,
-	ANDR_WIFI_ATTRIBUTE_FEATURE_SET
+	ANDR_WIFI_ATTRIBUTE_FEATURE_SET,
+	ANDR_WIFI_ATTRIBUTE_RANDOM_MAC_OUI,
+	ANDR_WIFI_ATTRIBUTE_NODFS_SET,
+	ANDR_WIFI_ATTRIBUTE_COUNTRY,
+	ANDR_WIFI_ATTRIBUTE_ND_OFFLOAD_VALUE
+	// Add more attribute here
 };
 
 typedef enum rtw_vendor_gscan_attribute {
@@ -314,6 +357,29 @@ typedef enum {
     WIFI_ERROR_BUSY = -10,
 } wifi_error;
 
+typedef int wifi_ring_buffer_id;
+/* ring buffer params */
+/**
+ * written_bytes and read_bytes implement a producer consumer API
+ *     hence written_bytes >= read_bytes
+ * a modulo arithmetic of the buffer size has to be applied to those counters:
+ * actual offset into ring buffer = written_bytes % ring_buffer_byte_size
+ *
+ */
+typedef struct {
+    u8 name[32];
+    u32 flags;
+    wifi_ring_buffer_id ring_id; // unique integer representing the ring
+    u32 ring_buffer_byte_size;   // total memory size allocated for the buffer
+    u32 verbose_level;           // verbose level for ring buffer
+    u32 written_bytes;           // number of bytes that was written to the buffer by driver,
+                                 // monotonously increasing integer
+    u32 read_bytes;              // number of bytes that was read from the buffer by user land,
+                                 // monotonously increasing integer
+    u32 written_records;         // number of records that was written to the buffer by driver,
+                                 // monotonously increasing integer
+} wifi_ring_buffer_status;
+
 #ifdef CONFIG_RTW_CFGVEDNOR_LLSTATS
 #define STATS_MAJOR_VERSION      1
 #define STATS_MINOR_VERSION      0
@@ -392,14 +458,11 @@ typedef struct {
 // Max number of tx power levels. The actual number vary per device and is specified by |num_tx_levels|
 #define RADIO_STAT_MAX_TX_LEVELS 256
 
-/* radio statistics */
+/* Internal radio statistics structure in the driver */
 typedef struct {
    wifi_radio radio;                      // wifi radio (if multiple radio supported)
    u32 on_time;                           // msecs the radio is awake (32 bits number accruing over time)
    u32 tx_time;                           // msecs the radio is transmitting (32 bits number accruing over time)
-   u32 num_tx_levels;                     // number of radio transmit power levels
-   u32* tx_time_per_levels;               // pointer to an array of radio transmit per power levels in
-                                          // msecs accured over time
    u32 rx_time;                           // msecs the radio is in active receive (32 bits number accruing over time)
    u32 on_time_scan;                      // msecs the radio is awake due to all scan (32 bits number accruing over time)
    u32 on_time_nbd;                       // msecs the radio is awake due to NAN (32 bits number accruing over time)
@@ -409,7 +472,7 @@ typedef struct {
    u32 on_time_hs20;                      // msecs the radio is awake due to HS2.0 scans and GAS exchange (32 bits number accruing over time)
    u32 num_channels;                      // number of channels
    wifi_channel_stat channels[];          // channel statistics
-} wifi_radio_stat;
+} wifi_radio_stat_internal;
 
 /**
  * Packet statistics reporting by firmware is performed on MPDU basi (i.e. counters increase by 1 for each MPDU)
@@ -525,11 +588,12 @@ typedef struct {
    u32 aggressive_statistics_gathering; // set for field debug mode. Driver should collect all statistics regardless of performance impact.
 } wifi_link_layer_params;
 
-/* callback for reporting link layer stats */
+#define RSSI_MONITOR_EVT_VERSION   1
 typedef struct {
-  void (*on_link_stats_results) (wifi_request_id id, wifi_iface_stat *iface_stat,
-         int num_radios, wifi_radio_stat *radio_stat);
-} wifi_stats_result_handler;
+    u8 version;
+    s8 cur_rssi;
+    mac_addr BSSID;
+} rssi_monitor_evt;
 
 
 /* wifi statistics bitmap  */
@@ -556,4 +620,14 @@ extern int rtw_cfgvendor_send_hotlist_event(struct wiphy *wiphy,
 #endif
 #endif /* (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 14, 0)) || defined(RTW_VENDOR_EXT_SUPPORT) */
 
+#ifdef CONFIG_RTW_CFGVEDNOR_RSSIMONITOR
+void rtw_cfgvendor_rssi_monitor_evt(_adapter *padapter);
+#endif
+
+#ifdef CONFIG_RTW_CFGVENDOR_RANDOM_MAC_OUI
+void rtw_hal_pno_random_gen_mac_addr(PADAPTER adapter);
+void rtw_hal_set_hw_mac_addr(PADAPTER adapter, u8 *mac_addr);
+#endif
+
+
 #endif /* _RTW_CFGVENDOR_H_ */
diff --git a/rtl8723DS/os_dep/linux/rtw_proc.c b/rtl8723DS/os_dep/linux/rtw_proc.c
index 8ad15a3..c5af5ff 100755..100644
--- a/rtl8723DS/os_dep/linux/rtw_proc.c
+++ b/rtl8723DS/os_dep/linux/rtw_proc.c
@@ -120,7 +120,8 @@ static ssize_t proc_set_log_level(struct file *file, const char __user *buffer,
 
 		int num = sscanf(tmp, "%d ", &log_level);
 
-		if (log_level >= _DRV_NONE_ && log_level <= _DRV_MAX_) {
+		if (num == 1 &&
+		    log_level >= _DRV_NONE_ && log_level <= _DRV_MAX_) {
 			rtw_drv_log_level = log_level;
 			printk("rtw_drv_log_level:%d\n", rtw_drv_log_level);
 		}
@@ -159,6 +160,12 @@ static int proc_get_chplan_test(struct seq_file *m, void *v)
 	return 0;
 }
 
+static int proc_get_chplan_ver(struct seq_file *m, void *v)
+{
+	dump_chplan_ver(m);
+	return 0;
+}
+
 #ifdef RTW_HALMAC
 extern void rtw_halmac_get_version(char *str, u32 len);
 
@@ -188,6 +195,7 @@ const struct rtw_proc_hdl drv_proc_hdls[] = {
 	RTW_PROC_HDL_SSEQ("country_chplan_map", proc_get_country_chplan_map, NULL),
 	RTW_PROC_HDL_SSEQ("chplan_id_list", proc_get_chplan_id_list, NULL),
 	RTW_PROC_HDL_SSEQ("chplan_test", proc_get_chplan_test, NULL),
+	RTW_PROC_HDL_SSEQ("chplan_ver", proc_get_chplan_ver, NULL),
 #ifdef RTW_HALMAC
 	RTW_PROC_HDL_SSEQ("halmac_info", proc_get_halmac_info, NULL),
 #endif /* RTW_HALMAC */
@@ -441,6 +449,48 @@ static int proc_get_rf_reg_dump(struct seq_file *m, void *v)
 	return 0;
 }
 
+#ifdef CONFIG_RTW_LED
+int proc_get_led_config(struct seq_file *m, void *v)
+{
+	struct net_device *dev = m->private;
+	_adapter *adapter = (_adapter *)rtw_netdev_priv(dev);
+
+	dump_led_config(m, adapter);
+
+	return 0;
+}
+
+ssize_t proc_set_led_config(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data)
+{
+	struct net_device *dev = data;
+	_adapter *adapter = (_adapter *)rtw_netdev_priv(dev);
+
+	char tmp[32];
+	u8 strategy;
+	u8 iface_en_mask;
+
+	if (count < 1)
+		return -EFAULT;
+
+	if (count > sizeof(tmp)) {
+		rtw_warn_on(1);
+		return -EFAULT;
+	}
+
+	if (buffer && !copy_from_user(tmp, buffer, count)) {
+
+		int num = sscanf(tmp, "%hhu %hhx", &strategy, &iface_en_mask);
+
+		if (num >= 1)
+			rtw_led_set_strategy(adapter, strategy);
+		if (num >= 2)
+			rtw_led_set_iface_en_mask(adapter, iface_en_mask);
+	}
+
+	return count;
+}
+#endif /* CONFIG_RTW_LED */
+
 #ifdef CONFIG_AP_MODE
 int proc_get_aid_status(struct seq_file *m, void *v)
 {
@@ -528,6 +578,130 @@ exit:
 }
 #endif /* CONFIG_RTW_CUSTOMER_STR */
 
+#ifdef CONFIG_SCAN_BACKOP
+static int proc_get_backop_flags_sta(struct seq_file *m, void *v)
+{
+	struct net_device *dev = m->private;
+	_adapter *adapter = (_adapter *)rtw_netdev_priv(dev);
+	struct mlme_ext_priv *mlmeext = &adapter->mlmeextpriv;
+
+	RTW_PRINT_SEL(m, "0x%02x\n", mlmeext_scan_backop_flags_sta(mlmeext));
+
+	return 0;
+}
+
+static ssize_t proc_set_backop_flags_sta(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data)
+{
+	struct net_device *dev = data;
+	_adapter *adapter = (_adapter *)rtw_netdev_priv(dev);
+	struct mlme_ext_priv *mlmeext = &adapter->mlmeextpriv;
+
+	char tmp[32];
+	u8 flags;
+
+	if (count < 1)
+		return -EFAULT;
+
+	if (count > sizeof(tmp)) {
+		rtw_warn_on(1);
+		return -EFAULT;
+	}
+
+	if (buffer && !copy_from_user(tmp, buffer, count)) {
+
+		int num = sscanf(tmp, "%hhx", &flags);
+
+		if (num == 1)
+			mlmeext_assign_scan_backop_flags_sta(mlmeext, flags);
+	}
+
+	return count;
+}
+
+#ifdef CONFIG_AP_MODE
+static int proc_get_backop_flags_ap(struct seq_file *m, void *v)
+{
+	struct net_device *dev = m->private;
+	_adapter *adapter = (_adapter *)rtw_netdev_priv(dev);
+	struct mlme_ext_priv *mlmeext = &adapter->mlmeextpriv;
+
+	RTW_PRINT_SEL(m, "0x%02x\n", mlmeext_scan_backop_flags_ap(mlmeext));
+
+	return 0;
+}
+
+static ssize_t proc_set_backop_flags_ap(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data)
+{
+	struct net_device *dev = data;
+	_adapter *adapter = (_adapter *)rtw_netdev_priv(dev);
+	struct mlme_ext_priv *mlmeext = &adapter->mlmeextpriv;
+
+	char tmp[32];
+	u8 flags;
+
+	if (count < 1)
+		return -EFAULT;
+
+	if (count > sizeof(tmp)) {
+		rtw_warn_on(1);
+		return -EFAULT;
+	}
+
+	if (buffer && !copy_from_user(tmp, buffer, count)) {
+
+		int num = sscanf(tmp, "%hhx", &flags);
+
+		if (num == 1)
+			mlmeext_assign_scan_backop_flags_ap(mlmeext, flags);
+	}
+
+	return count;
+}
+#endif /* CONFIG_AP_MODE */
+
+#ifdef CONFIG_RTW_MESH
+static int proc_get_backop_flags_mesh(struct seq_file *m, void *v)
+{
+	struct net_device *dev = m->private;
+	_adapter *adapter = (_adapter *)rtw_netdev_priv(dev);
+	struct mlme_ext_priv *mlmeext = &adapter->mlmeextpriv;
+
+	RTW_PRINT_SEL(m, "0x%02x\n", mlmeext_scan_backop_flags_mesh(mlmeext));
+
+	return 0;
+}
+
+static ssize_t proc_set_backop_flags_mesh(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data)
+{
+	struct net_device *dev = data;
+	_adapter *adapter = (_adapter *)rtw_netdev_priv(dev);
+	struct mlme_ext_priv *mlmeext = &adapter->mlmeextpriv;
+
+	char tmp[32];
+	u8 flags;
+
+	if (count < 1)
+		return -EFAULT;
+
+	if (count > sizeof(tmp)) {
+		rtw_warn_on(1);
+		return -EFAULT;
+	}
+
+	if (buffer && !copy_from_user(tmp, buffer, count)) {
+
+		int num = sscanf(tmp, "%hhx", &flags);
+
+		if (num == 1)
+			mlmeext_assign_scan_backop_flags_mesh(mlmeext, flags);
+	}
+
+	return count;
+}
+#endif /* CONFIG_RTW_MESH */
+
+#endif /* CONFIG_SCAN_BACKOP */
+
 /* gpio setting */
 #ifdef CONFIG_GPIO_API
 static ssize_t proc_set_config_gpio(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data)
@@ -645,7 +819,8 @@ static ssize_t proc_set_rx_info_msg(struct file *file, const char __user *buffer
 	if (buffer && !copy_from_user(tmp, buffer, count)) {
 		int num = sscanf(tmp, "%d", &phy_info_flag);
 
-		precvpriv->store_law_data_flag = (BOOLEAN) phy_info_flag;
+		if (num == 1)
+			precvpriv->store_law_data_flag = (BOOLEAN) phy_info_flag;
 
 		/*RTW_INFO("precvpriv->store_law_data_flag = %d\n",( BOOLEAN )(precvpriv->store_law_data_flag));*/
 	}
@@ -664,11 +839,9 @@ static int proc_get_tx_info_msg(struct seq_file *m, void *v)
 	_irqL irqL;
 	struct net_device *dev = m->private;
 	_adapter *adapter = (_adapter *)rtw_netdev_priv(dev);
-	struct dvobj_priv *dvobj = adapter_to_dvobj(adapter);
-	struct macid_ctl_t *macid_ctl = dvobj_to_macidctl(dvobj);
 	struct sta_info *psta;
-	u8 bc_addr[6] = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff};
-	u8 null_addr[6] = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00};
+	u8 bc_addr[ETH_ALEN] = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff};
+	u8 null_addr[ETH_ALEN] = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00};
 	_adapter *padapter = (_adapter *)rtw_netdev_priv(dev);
 	struct sta_priv *pstapriv = &padapter->stapriv;
 	int i;
@@ -698,9 +871,9 @@ static int proc_get_tx_info_msg(struct seq_file *m, void *v)
 
 			plist = get_next(plist);
 
-			if ((_rtw_memcmp(psta->cmn.mac_addr, bc_addr, 6)  !=  _TRUE)
-				&& (_rtw_memcmp(psta->cmn.mac_addr, null_addr, 6) != _TRUE)
-				&& (_rtw_memcmp(psta->cmn.mac_addr, adapter_mac_addr(padapter), 6) != _TRUE)) {
+			if ((_rtw_memcmp(psta->cmn.mac_addr, bc_addr, ETH_ALEN)  !=  _TRUE)
+				&& (_rtw_memcmp(psta->cmn.mac_addr, null_addr, ETH_ALEN) != _TRUE)
+				&& (_rtw_memcmp(psta->cmn.mac_addr, adapter_mac_addr(padapter), ETH_ALEN) != _TRUE)) {
 
 				switch (psta->cmn.bw_mode) {
 
@@ -855,8 +1028,21 @@ static int proc_get_turboedca_ctrl(struct seq_file *m, void *v)
 	_adapter *padapter = (_adapter *)rtw_netdev_priv(dev);
 	HAL_DATA_TYPE *hal_data = GET_HAL_DATA(padapter);
 
-	if (hal_data)
-		RTW_PRINT_SEL(m, "Turbo-EDCA :%s\n", (hal_data->dis_turboedca) ? "Disable" : "Enable");
+	if (hal_data) {
+
+		u32 edca_param;
+
+		if (hal_data->dis_turboedca == 0)
+			RTW_PRINT_SEL(m, "Turbo-EDCA : %s\n", "Enable"); 
+		else 		
+			RTW_PRINT_SEL(m, "Turbo-EDCA : %s, mode=%d, edca_param_mode=0x%x\n", "Disable", hal_data->dis_turboedca, hal_data->edca_param_mode);
+
+
+		rtw_hal_get_hwreg(padapter, HW_VAR_AC_PARAM_BE, (u8 *)(&edca_param));
+
+		_RTW_PRINT_SEL(m, "PARAM_BE:0x%x\n", edca_param);
+		
+	}
 
 	return 0;
 }
@@ -866,9 +1052,9 @@ static ssize_t proc_set_turboedca_ctrl(struct file *file, const char __user *buf
 	struct net_device *dev = data;
 	_adapter *padapter = (_adapter *)rtw_netdev_priv(dev);
 	HAL_DATA_TYPE *hal_data = GET_HAL_DATA(padapter);
-
 	char tmp[32] = {0};
 	int mode = 0, num = 0;
+	u32 param_mode = 0;
 
 	if (count < 1)
 		return -EFAULT;
@@ -878,15 +1064,38 @@ static ssize_t proc_set_turboedca_ctrl(struct file *file, const char __user *buf
 
 	if (buffer && !copy_from_user(tmp, buffer, count)) {
 
-		num	= sscanf(tmp, "%d ", &mode);
+		num = sscanf(tmp, "%d %x", &mode, &param_mode);
 
-		if (num != 1) {
+		if (num < 1 || num > 2) {
 			RTW_INFO("argument number is wrong\n");
 			return -EFAULT;
 		}
+
+		/*  0: enable turboedca,
+			1: disable turboedca, 
+			2: disable turboedca and setting EDCA parameter based on the input parameter
+			> 2 : currently reset to 0 */ 
+			
+		if (mode > 2) 
+			mode = 0;
+
 		hal_data->dis_turboedca = mode;
+		
+		hal_data->edca_param_mode = 0; /* init. value */
+
+		RTW_INFO("dis_turboedca mode = 0x%x\n", hal_data->dis_turboedca);
+		
+		if (num == 2) {
+
+			hal_data->edca_param_mode = param_mode;			
+
+			RTW_INFO("param_mode = 0x%x\n", param_mode);
+		}
+		
 	}
+	
 	return count;
+
 }
 #ifdef CONFIG_WOWLAN
 static int proc_get_wow_lps_ctrl(struct seq_file *m, void *v)
@@ -956,7 +1165,7 @@ static int proc_get_chan_plan(struct seq_file *m, void *v)
 	struct net_device *dev = m->private;
 	_adapter *adapter = (_adapter *)rtw_netdev_priv(dev);
 
-	dump_cur_chset(m, adapter);
+	dump_cur_chset(m, adapter_to_rfctl(adapter));
 
 	return 0;
 }
@@ -1049,12 +1258,26 @@ ssize_t proc_set_macaddr_acl(struct file *file, const char __user *buffer, size_
 {
 	struct net_device *dev = data;
 	_adapter *adapter = (_adapter *)rtw_netdev_priv(dev);
-	struct mlme_priv *mlme = &adapter->mlmepriv;
-	struct mlme_ext_priv *mlmeext = &adapter->mlmeextpriv;
 	char tmp[17 * NUM_ACL + 32] = {0};
+	u8 period;
+	char cmd[32];
 	u8 mode;
 	u8 addr[ETH_ALEN];
 
+#define MAC_ACL_CMD_MODE	0
+#define MAC_ACL_CMD_ADD		1
+#define MAC_ACL_CMD_DEL		2
+#define MAC_ACL_CMD_CLR		3
+#define MAC_ACL_CMD_NUM		4
+	
+	static const char * const mac_acl_cmd_str[] = {
+		"mode",
+		"add",
+		"del",
+		"clr",
+	};
+	u8 cmd_id = MAC_ACL_CMD_NUM;
+
 	if (count < 1)
 		return -EFAULT;
 
@@ -1064,36 +1287,93 @@ ssize_t proc_set_macaddr_acl(struct file *file, const char __user *buffer, size_
 	}
 
 	if (buffer && !copy_from_user(tmp, buffer, count)) {
-		/* mode [<macaddr>] */
+		/*
+		* <period> mode <mode> <macaddr> [<macaddr>]
+		* <period> mode <mode>
+		* <period> add <macaddr> [<macaddr>]
+		* <period> del <macaddr> [<macaddr>]
+		* <period> clr
+		*/
 		char *c, *next;
+		int i;
+		u8 is_bcast;
 
 		next = tmp;
 		c = strsep(&next, " \t");
+		if (!c || sscanf(c, "%hhu", &period) != 1)
+			goto exit;
 
-		if (sscanf(c, "%hhu", &mode) != 1)
-			return count;
+		if (period >= RTW_ACL_PERIOD_NUM) {
+			RTW_WARN(FUNC_ADPT_FMT" invalid period:%u", FUNC_ADPT_ARG(adapter), period);
+			goto exit;
+		}
 
-		if (mode >= RTW_ACL_MODE_MAX)
-			mode = RTW_ACL_MODE_DISABLED;
+		c = strsep(&next, " \t");
+		if (!c || sscanf(c, "%s", cmd) != 1)
+			goto exit;
 
-		rtw_set_macaddr_acl(adapter, RTW_ACL_MODE_DISABLED); /* deinit first */
-		if (mode == RTW_ACL_MODE_DISABLED)
-			return count;
+		for (i = 0; i < MAC_ACL_CMD_NUM; i++)
+			if (strcmp(mac_acl_cmd_str[i], cmd) == 0)
+				cmd_id = i;
+
+		switch (cmd_id) {
+		case MAC_ACL_CMD_MODE:
+			c = strsep(&next, " \t");
+			if (!c || sscanf(c, "%hhu", &mode) != 1)
+				goto exit;
+
+			if (mode >= RTW_ACL_MODE_MAX) {
+				RTW_WARN(FUNC_ADPT_FMT" invalid mode:%u", FUNC_ADPT_ARG(adapter), mode);
+				goto exit;
+			}
+			break;
 
-		rtw_set_macaddr_acl(adapter, mode);
+		case MAC_ACL_CMD_ADD:
+		case MAC_ACL_CMD_DEL:
+			break;
 
-		/* macaddr list */
+		case MAC_ACL_CMD_CLR:
+			/* clear settings */
+			rtw_macaddr_acl_clear(adapter, period);
+			goto exit;
+
+		default:
+			RTW_WARN(FUNC_ADPT_FMT" invalid cmd:\"%s\"", FUNC_ADPT_ARG(adapter), cmd);
+			goto exit;
+		}
+
+		/* check for macaddr list */
 		c = strsep(&next, " \t");
+		if (!c && cmd_id == MAC_ACL_CMD_MODE) {
+			/* set mode only  */
+			rtw_set_macaddr_acl(adapter, period, mode);
+			goto exit;
+		}
+
+		if (cmd_id == MAC_ACL_CMD_MODE) {
+			/* set mode and entire macaddr list */
+			rtw_macaddr_acl_clear(adapter, period);
+			rtw_set_macaddr_acl(adapter, period, mode);
+		}
+
 		while (c != NULL) {
 			if (sscanf(c, MAC_SFMT, MAC_SARG(addr)) != 6)
 				break;
 
-			if (rtw_check_invalid_mac_address(addr, 0) == _FALSE)
-				rtw_acl_add_sta(adapter, addr);
-
+			is_bcast = is_broadcast_mac_addr(addr);
+			if (is_bcast
+				|| rtw_check_invalid_mac_address(addr, 0) == _FALSE
+			) {
+				if (cmd_id == MAC_ACL_CMD_DEL) {
+					rtw_acl_remove_sta(adapter, period, addr);
+					if (is_bcast)
+						break;
+				 } else if (!is_bcast)
+					rtw_acl_add_sta(adapter, period, addr);
+			}
+		
 			c = strsep(&next, " \t");
 		}
-
 	}
 
 exit:
@@ -1189,7 +1469,92 @@ exit:
 }
 #endif /* CONFIG_RTW_PRE_LINK_STA */
 
+static int proc_get_ch_sel_policy(struct seq_file *m, void *v)
+{
+	struct net_device *dev = m->private;
+	_adapter *adapter = (_adapter *)rtw_netdev_priv(dev);
+	struct rf_ctl_t *rfctl = adapter_to_rfctl(adapter);
+
+	RTW_PRINT_SEL(m, "%-16s\n", "same_band_prefer");
+
+	RTW_PRINT_SEL(m, "%16u\n", rfctl->ch_sel_same_band_prefer);
+
+	return 0;
+}
+
+static ssize_t proc_set_ch_sel_policy(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data)
+{
+	struct net_device *dev = data;
+	_adapter *adapter = (_adapter *)rtw_netdev_priv(dev);
+	struct rf_ctl_t *rfctl = adapter_to_rfctl(adapter);
+	char tmp[32];
+	u8 sb_prefer;
+	int num;
+
+	if (count < 1)
+		return -EFAULT;
+
+	if (count > sizeof(tmp)) {
+		rtw_warn_on(1);
+		return -EFAULT;
+	}
+
+	if (!buffer || copy_from_user(tmp, buffer, count))
+		goto exit;
+
+	num = sscanf(tmp, "%hhu", &sb_prefer);
+	if (num >=	1)
+		rfctl->ch_sel_same_band_prefer = sb_prefer;
+
+exit:
+	return count;
+}
+
 #ifdef CONFIG_DFS_MASTER
+static int proc_get_dfs_test_case(struct seq_file *m, void *v)
+{
+	struct net_device *dev = m->private;
+	_adapter *adapter = (_adapter *)rtw_netdev_priv(dev);
+	struct rf_ctl_t *rfctl = adapter_to_rfctl(adapter);
+
+	RTW_PRINT_SEL(m, "%-24s %-19s\n", "radar_detect_trigger_non", "choose_dfs_ch_first");
+	RTW_PRINT_SEL(m, "%24hhu %19hhu\n"
+		, rfctl->dbg_dfs_radar_detect_trigger_non
+		, rfctl->dbg_dfs_choose_dfs_ch_first
+	);
+
+	return 0;
+}
+
+static ssize_t proc_set_dfs_test_case(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data)
+{
+	struct net_device *dev = data;
+	_adapter *adapter = (_adapter *)rtw_netdev_priv(dev);
+	struct rf_ctl_t *rfctl = adapter_to_rfctl(adapter);
+	char tmp[32];
+	u8 radar_detect_trigger_non;
+	u8 choose_dfs_ch_first;
+
+	if (count < 1)
+		return -EFAULT;
+
+	if (count > sizeof(tmp)) {
+		rtw_warn_on(1);
+		return -EFAULT;
+	}
+
+	if (buffer && !copy_from_user(tmp, buffer, count)) {
+		int num = sscanf(tmp, "%hhu %hhu", &radar_detect_trigger_non, &choose_dfs_ch_first);
+
+		if (num >= 1)
+			rfctl->dbg_dfs_radar_detect_trigger_non = radar_detect_trigger_non;
+		if (num >= 2)
+			rfctl->dbg_dfs_choose_dfs_ch_first = choose_dfs_ch_first;
+	}
+
+	return count;
+}
+
 ssize_t proc_set_update_non_ocp(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data)
 {
 	struct net_device *dev = data;
@@ -1249,7 +1614,7 @@ ssize_t proc_set_radar_detect(struct file *file, const char __user *buffer, size
 		if (num < 1)
 			goto exit;
 
-		rfctl->dbg_dfs_master_fake_radar_detect_cnt = fake_radar_detect_cnt;
+		rfctl->dbg_dfs_fake_radar_detect_cnt = fake_radar_detect_cnt;
 	}
 
 exit:
@@ -1288,7 +1653,7 @@ static ssize_t proc_set_dfs_ch_sel_d_flags(struct file *file, const char __user
 		goto exit;
 
 	num = sscanf(tmp, "%hhx", &d_flags);
-	if (num !=	1)
+	if (num != 1)
 		goto exit;
 
 	rfctl->dfs_ch_sel_d_flags = d_flags;
@@ -1296,6 +1661,54 @@ static ssize_t proc_set_dfs_ch_sel_d_flags(struct file *file, const char __user
 exit:
 	return count;
 }
+
+#ifdef CONFIG_DFS_SLAVE_WITH_RADAR_DETECT
+static int proc_get_dfs_slave_with_rd(struct seq_file *m, void *v)
+{
+	struct net_device *dev = m->private;
+	_adapter *adapter = (_adapter *)rtw_netdev_priv(dev);
+	struct rf_ctl_t *rfctl = adapter_to_rfctl(adapter);
+
+	RTW_PRINT_SEL(m, "%u\n", rfctl->dfs_slave_with_rd);
+
+	return 0;
+}
+
+static ssize_t proc_set_dfs_slave_with_rd(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data)
+{
+	struct net_device *dev = data;
+	_adapter *adapter = (_adapter *)rtw_netdev_priv(dev);
+	struct rf_ctl_t *rfctl = adapter_to_rfctl(adapter);
+	char tmp[32];
+	u8 rd;
+	int num;
+
+	if (count < 1)
+		return -EFAULT;
+
+	if (count > sizeof(tmp)) {
+		rtw_warn_on(1);
+		return -EFAULT;
+	}
+
+	if (!buffer || copy_from_user(tmp, buffer, count))
+		goto exit;
+
+	num = sscanf(tmp, "%hhu", &rd);
+	if (num != 1)
+		goto exit;
+
+	rd = rd ? 1 : 0;
+
+	if (rfctl->dfs_slave_with_rd != rd) {
+		rfctl->dfs_slave_with_rd = rd;
+		rtw_dfs_rd_en_decision_cmd(adapter);
+	}
+
+exit:
+	return count;
+}
+#endif /* CONFIG_DFS_SLAVE_WITH_RADAR_DETECT */
 #endif /* CONFIG_DFS_MASTER */
 
 #ifdef CONFIG_80211N_HT
@@ -1554,11 +1967,12 @@ static ssize_t proc_set_change_bss_chbw(struct file *file, const char __user *bu
 {
 	struct net_device *dev = data;
 	_adapter *adapter = (_adapter *)rtw_netdev_priv(dev);
-	struct mlme_priv *mlme = &(adapter->mlmepriv);
-	struct mlme_ext_priv *mlmeext = &(adapter->mlmeextpriv);
+	struct dvobj_priv *dvobj = adapter_to_dvobj(adapter);
+	int i;
 	char tmp[32];
 	s16 ch;
-	s8 bw = -1, offset = -1;
+	s8 bw = REQ_BW_NONE, offset = REQ_OFFSET_NONE;
+	u8 ifbmp = 0;
 
 	if (count < 1)
 		return -EFAULT;
@@ -1570,14 +1984,27 @@ static ssize_t proc_set_change_bss_chbw(struct file *file, const char __user *bu
 
 	if (buffer && !copy_from_user(tmp, buffer, count)) {
 
-		int num = sscanf(tmp, "%hd %hhd %hhd", &ch, &bw, &offset);
+		int num = sscanf(tmp, "%hd %hhd %hhd %hhx", &ch, &bw, &offset, &ifbmp);
 
 		if (num < 1 || (bw != CHANNEL_WIDTH_20 && num < 3))
 			goto exit;
 
-		if ((MLME_IS_AP(adapter) || MLME_IS_MESH(adapter))
-			&& check_fwstate(mlme, WIFI_ASOC_STATE))
-			rtw_change_bss_chbw_cmd(adapter, RTW_CMDF_WAIT_ACK, ch, bw, offset);
+		if (num < 4)
+			ifbmp = BIT(adapter->iface_id);
+		else
+			ifbmp &= (1 << dvobj->iface_nums) - 1;
+
+		for (i = 0; i < dvobj->iface_nums; i++) {
+			if (!(ifbmp & BIT(i)) || !dvobj->padapters[i])
+				continue;
+
+			if (!CHK_MLME_STATE(dvobj->padapters[i], WIFI_AP_STATE | WIFI_MESH_STATE)
+				|| !MLME_IS_ASOC(dvobj->padapters[i]))
+				ifbmp &= ~BIT(i);
+		}
+
+		if (ifbmp)
+			rtw_change_bss_chbw_cmd(adapter, RTW_CMDF_WAIT_ACK, ifbmp, 0, ch, bw, offset);
 	}
 
 exit:
@@ -1596,13 +2023,38 @@ static int proc_get_tx_bw_mode(struct seq_file *m, void *v)
 	return 0;
 }
 
+static void rtw_set_tx_bw_mode(struct _ADAPTER *adapter, u8 bw_mode)
+{
+	struct mlme_priv *mlme = &(adapter->mlmepriv);
+	struct mlme_ext_priv *mlmeext = &(adapter->mlmeextpriv);
+	struct macid_ctl_t *macid_ctl = &adapter->dvobj->macid_ctl;
+	u8 update = _FALSE;
+
+	if ((MLME_STATE(adapter) & WIFI_ASOC_STATE)
+		&& ((mlmeext->cur_channel <= 14 && BW_MODE_2G(bw_mode) != ADAPTER_TX_BW_2G(adapter))
+			|| (mlmeext->cur_channel >= 36 && BW_MODE_5G(bw_mode) != ADAPTER_TX_BW_5G(adapter)))
+	) {
+		/* RA mask update needed */
+		update = _TRUE;
+	}		
+	adapter->driver_tx_bw_mode = bw_mode;
+
+	if (update == _TRUE) {
+		struct sta_info *sta;
+		int i;
+
+		for (i = 0; i < MACID_NUM_SW_LIMIT; i++) {
+			sta = macid_ctl->sta[i];
+			if (sta && !is_broadcast_mac_addr(sta->cmn.mac_addr))
+				rtw_dm_ra_mask_wk_cmd(adapter, (u8 *)sta);
+		}
+	}
+}
+
 static ssize_t proc_set_tx_bw_mode(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data)
 {
 	struct net_device *dev = data;
 	_adapter *adapter = (_adapter *)rtw_netdev_priv(dev);
-	struct macid_ctl_t *macid_ctl = &adapter->dvobj->macid_ctl;
-	struct mlme_priv *mlme = &(adapter->mlmepriv);
-	struct mlme_ext_priv *mlmeext = &(adapter->mlmeextpriv);
 	char tmp[32];
 	u8 bw_mode;
 
@@ -1616,31 +2068,12 @@ static ssize_t proc_set_tx_bw_mode(struct file *file, const char __user *buffer,
 
 	if (buffer && !copy_from_user(tmp, buffer, count)) {
 
-		u8 update = _FALSE;
 		int num = sscanf(tmp, "%hhx", &bw_mode);
 
 		if (num < 1 || bw_mode == adapter->driver_tx_bw_mode)
 			goto exit;
 
-		if ((MLME_STATE(adapter) & WIFI_ASOC_STATE)
-			&& ((mlmeext->cur_channel <= 14 && BW_MODE_2G(bw_mode) != ADAPTER_TX_BW_2G(adapter))
-				|| (mlmeext->cur_channel >= 36 && BW_MODE_5G(bw_mode) != ADAPTER_TX_BW_5G(adapter)))
-		) {
-			/* RA mask update needed */
-			update = _TRUE;
-		}
-		adapter->driver_tx_bw_mode = bw_mode;
-
-		if (update == _TRUE) {
-			struct sta_info *sta;
-			int i;
-
-			for (i = 0; i < MACID_NUM_SW_LIMIT; i++) {
-				sta = macid_ctl->sta[i];
-				if (sta && !is_broadcast_mac_addr(sta->cmn.mac_addr))
-					rtw_dm_ra_mask_wk_cmd(adapter, (u8 *)sta);
-			}
-		}
+		rtw_set_tx_bw_mode(adapter, bw_mode);
 	}
 
 exit:
@@ -1748,10 +2181,7 @@ clear_ps_deny:
 
 static void *proc_start_tx_power_idx(struct seq_file *m, loff_t *pos)
 {
-	struct net_device *dev = m->private;
-	_adapter *adapter = (_adapter *)rtw_netdev_priv(dev);
 	u8 path = ((*pos) & 0xFF00) >> 8;
-	u8 rs = *pos & 0xFF;
 
 	if (path >= RF_PATH_MAX)
 		return NULL;
@@ -1760,14 +2190,10 @@ static void *proc_start_tx_power_idx(struct seq_file *m, loff_t *pos)
 }
 static void proc_stop_tx_power_idx(struct seq_file *m, void *v)
 {
-	struct net_device *dev = m->private;
-	_adapter *adapter = (_adapter *)rtw_netdev_priv(dev);
 }
 
 static void *proc_next_tx_power_idx(struct seq_file *m, void *v, loff_t *pos)
 {
-	struct net_device *dev = m->private;
-	_adapter *adapter = (_adapter *)rtw_netdev_priv(dev);
 	u8 path = ((*pos) & 0xFF00) >> 8;
 	u8 rs = *pos & 0xFF;
 
@@ -1882,10 +2308,9 @@ static ssize_t proc_set_kfree_bb_gain(struct file *file, const char __user *buff
 {
 	struct net_device *dev = data;
 	_adapter *adapter = (_adapter *)rtw_netdev_priv(dev);
-	HAL_DATA_TYPE *hal_data = GET_HAL_DATA(adapter);
 	struct kfree_data_t *kfree_data = GET_KFREE_DATA(adapter);
 	char tmp[BB_GAIN_NUM * RF_PATH_MAX] = {0};
-	u8 path, chidx;
+	u8 chidx;
 	s8 bb_gain[BB_GAIN_NUM];
 	char ch_band_Group[6];
 
@@ -1997,7 +2422,6 @@ static ssize_t proc_set_tx_gain_offset(struct file *file, const char __user *buf
 	}
 
 	if (buffer && !copy_from_user(tmp, buffer, count)) {
-		u8 write_value;
 		int num = sscanf(tmp, "%hhu %hhd", &rf_path, &offset);
 
 		if (num < 2)
@@ -2377,16 +2801,23 @@ static int proc_get_best_chan(struct seq_file *m, void *v)
 	struct net_device *dev = m->private;
 	_adapter *adapter = (_adapter *)rtw_netdev_priv(dev);
 
-	rtw_acs_info_dump(m, adapter);
+	if (IS_ACS_ENABLE(adapter))
+		rtw_acs_info_dump(m, adapter);
+	else
+		_RTW_PRINT_SEL(m,"ACS disabled\n");
 	return 0;
 }
 
 static ssize_t proc_set_acs(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data)
 {
+#ifdef CONFIG_RTW_ACS_DBG
 	struct net_device *dev = data;
 	_adapter *padapter = (_adapter *)rtw_netdev_priv(dev);
 	char tmp[32];
 	u8 acs_state = 0;
+	u16 scan_ch_ms= 0, acs_scan_ch_ms = 0;
+	u8 scan_type = SCAN_ACTIVE, igi= 0, bw = 0;
+	u8 acs_scan_type = SCAN_ACTIVE, acs_igi= 0, acs_bw = 0;
 
 	if (count < 1)
 		return -EFAULT;
@@ -2397,7 +2828,8 @@ static ssize_t proc_set_acs(struct file *file, const char __user *buffer, size_t
 	}
 	if (buffer && !copy_from_user(tmp, buffer, count)) {
 
-		int num = sscanf(tmp, "%hhu", &acs_state);
+		int num = sscanf(tmp, "%hhu %hhu %hu %hhx %hhu",
+			&acs_state, &scan_type, &scan_ch_ms, &igi, &bw);
 
 		if (num < 1)
 			return -EINVAL;
@@ -2406,8 +2838,21 @@ static ssize_t proc_set_acs(struct file *file, const char __user *buffer, size_t
 			rtw_acs_start(padapter);
 		else
 			rtw_acs_stop(padapter);
-
+		num = num -1;
+
+		if(num) {
+			if (num-- > 0)
+				acs_scan_type = scan_type;
+			if (num-- > 0)
+				acs_scan_ch_ms = scan_ch_ms;
+			if (num-- > 0)
+				acs_igi = igi;
+			if (num-- > 0)
+				acs_bw = bw;
+			rtw_acs_adv_setting(padapter, acs_scan_type, acs_scan_ch_ms, acs_igi, acs_bw);
+		}
 	}
+#endif /*CONFIG_RTW_ACS_DBG*/
 	return count;
 }
 #endif /*CONFIG_RTW_ACS*/
@@ -2468,8 +2913,10 @@ static int proc_get_phy_cap(struct seq_file *m, void *v)
 	_adapter *adapter = (_adapter *)rtw_netdev_priv(dev);
 
 	rtw_dump_phy_cap(m, adapter);
+#ifdef CONFIG_80211N_HT
 	rtw_dump_drv_phy_cap(m, adapter);
 	rtw_get_dft_phy_cap(m, adapter);
+#endif /* CONFIG_80211N_HT */
 	return 0;
 }
 
@@ -2626,9 +3073,11 @@ static ssize_t proc_set_napi_th(struct file *file, const char __user *buffer, si
 	struct net_device *dev = data;
 	struct _ADAPTER *adapter = (struct _ADAPTER *)rtw_netdev_priv(dev);
 	struct registry_priv *registry = &adapter->registrypriv;
+	struct dvobj_priv *dvobj = adapter_to_dvobj(adapter);
+	PADAPTER iface = NULL;
 	char tmp[32] = {0};
 	int thrshld = 0;
-	int num = 0;
+	int num = 0, i = 0;
 
 
 	if (count < 1)
@@ -2641,11 +3090,18 @@ static ssize_t proc_set_napi_th(struct file *file, const char __user *buffer, si
 
 	RTW_INFO("%s: Last threshold = %d Mbps\n", __FUNCTION__, registry->napi_threshold);
 
-	if (buffer && !copy_from_user(tmp, buffer, count)) {
-		num = sscanf(tmp, "%d", &thrshld);
-		if (num > 0) {
-			if (thrshld > 0)
-				registry->napi_threshold = thrshld;
+
+	for (i = 0; i < dvobj->iface_nums; i++) {
+		iface = dvobj->padapters[i];
+		if (iface) {	
+			if (buffer && !copy_from_user(tmp, buffer, count)) {
+				registry = &iface->registrypriv;
+				num = sscanf(tmp, "%d", &thrshld);
+				if (num > 0) {
+					if (thrshld > 0)
+						registry->napi_threshold = thrshld;
+				}
+			}
 		}
 	}
 	RTW_INFO("%s: New threshold = %d Mbps\n", __FUNCTION__, registry->napi_threshold);
@@ -2705,6 +3161,587 @@ static int proc_get_dynamic_agg_enable(struct seq_file *m, void *v)
 	return 0;
 }
 
+#ifdef CONFIG_RTW_MESH
+static int proc_get_mesh_peer_sel_policy(struct seq_file *m, void *v)
+{
+	struct net_device *dev = m->private;
+	_adapter *adapter = (_adapter *)rtw_netdev_priv(dev);
+
+	dump_mesh_peer_sel_policy(m, adapter);
+
+	return 0;
+}
+
+#if CONFIG_RTW_MESH_ACNODE_PREVENT
+static int proc_get_mesh_acnode_prevent(struct seq_file *m, void *v)
+{
+	struct net_device *dev = m->private;
+	_adapter *adapter = (_adapter *)rtw_netdev_priv(dev);
+
+	if (MLME_IS_MESH(adapter))
+		dump_mesh_acnode_prevent_settings(m, adapter);
+
+	return 0;
+}
+
+static ssize_t proc_set_mesh_acnode_prevent(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data)
+{
+	struct net_device *dev = data;
+	_adapter *adapter = (_adapter *)rtw_netdev_priv(dev);
+	char tmp[32];
+
+	if (count < 1)
+		return -EFAULT;
+
+	if (count > sizeof(tmp)) {
+		rtw_warn_on(1);
+		return -EFAULT;
+	}
+
+	if (buffer && !copy_from_user(tmp, buffer, count)) {
+		struct mesh_peer_sel_policy *peer_sel_policy = &adapter->mesh_cfg.peer_sel_policy;
+		u8 enable;
+		u32 conf_timeout_ms;
+		u32 notify_timeout_ms;
+		int num = sscanf(tmp, "%hhu %u %u", &enable, &conf_timeout_ms, &notify_timeout_ms);
+
+		if (num >= 1)
+			peer_sel_policy->acnode_prevent = enable;
+		if (num >= 2)
+			peer_sel_policy->acnode_conf_timeout_ms = conf_timeout_ms;
+		if (num >= 3)
+			peer_sel_policy->acnode_notify_timeout_ms = notify_timeout_ms;
+	}
+
+exit:
+	return count;
+}
+#endif /* CONFIG_RTW_MESH_ACNODE_PREVENT */
+
+#if CONFIG_RTW_MESH_OFFCH_CAND
+static int proc_get_mesh_offch_cand(struct seq_file *m, void *v)
+{
+	struct net_device *dev = m->private;
+	_adapter *adapter = (_adapter *)rtw_netdev_priv(dev);
+
+	if (MLME_IS_MESH(adapter))
+		dump_mesh_offch_cand_settings(m, adapter);
+
+	return 0;
+}
+
+static ssize_t proc_set_mesh_offch_cand(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data)
+{
+	struct net_device *dev = data;
+	_adapter *adapter = (_adapter *)rtw_netdev_priv(dev);
+	char tmp[32];
+
+	if (count < 1)
+		return -EFAULT;
+
+	if (count > sizeof(tmp)) {
+		rtw_warn_on(1);
+		return -EFAULT;
+	}
+
+	if (buffer && !copy_from_user(tmp, buffer, count)) {
+		struct mesh_peer_sel_policy *peer_sel_policy = &adapter->mesh_cfg.peer_sel_policy;
+		u8 enable;
+		u32 find_int_ms;
+		int num = sscanf(tmp, "%hhu %u", &enable, &find_int_ms);
+
+		if (num >= 1)
+			peer_sel_policy->offch_cand = enable;
+		if (num >= 2)
+			peer_sel_policy->offch_find_int_ms = find_int_ms;
+	}
+
+exit:
+	return count;
+}
+#endif /* CONFIG_RTW_MESH_OFFCH_CAND */
+
+#if CONFIG_RTW_MESH_PEER_BLACKLIST
+static int proc_get_mesh_peer_blacklist(struct seq_file *m, void *v)
+{
+	struct net_device *dev = m->private;
+	_adapter *adapter = (_adapter *)rtw_netdev_priv(dev);
+
+	if (MLME_IS_MESH(adapter)) {
+		dump_mesh_peer_blacklist_settings(m, adapter);
+		if (MLME_IS_ASOC(adapter))
+			dump_mesh_peer_blacklist(m, adapter);
+	}
+
+	return 0;
+}
+
+static ssize_t proc_set_mesh_peer_blacklist(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data)
+{
+	struct net_device *dev = data;
+	_adapter *adapter = (_adapter *)rtw_netdev_priv(dev);
+	char tmp[32];
+
+	if (count < 1)
+		return -EFAULT;
+
+	if (count > sizeof(tmp)) {
+		rtw_warn_on(1);
+		return -EFAULT;
+	}
+
+	if (buffer && !copy_from_user(tmp, buffer, count)) {
+		struct mesh_peer_sel_policy *peer_sel_policy = &adapter->mesh_cfg.peer_sel_policy;
+		u32 conf_timeout_ms;
+		u32 blacklist_timeout_ms;
+		int num = sscanf(tmp, "%u %u", &conf_timeout_ms, &blacklist_timeout_ms);
+
+		if (num >= 1)
+			peer_sel_policy->peer_conf_timeout_ms = conf_timeout_ms;
+		if (num >= 2)
+			peer_sel_policy->peer_blacklist_timeout_ms = blacklist_timeout_ms;
+	}
+
+exit:
+	return count;
+}
+#endif /* CONFIG_RTW_MESH_PEER_BLACKLIST */
+
+#if CONFIG_RTW_MESH_CTO_MGATE_BLACKLIST
+static int proc_get_mesh_cto_mgate_require(struct seq_file *m, void *v)
+{
+	struct net_device *dev = m->private;
+	_adapter *adapter = (_adapter *)rtw_netdev_priv(dev);
+
+	if (MLME_IS_MESH(adapter))
+		RTW_PRINT_SEL(m, "%u\n", adapter->mesh_cfg.peer_sel_policy.cto_mgate_require);
+
+	return 0;
+}
+
+static ssize_t proc_set_mesh_cto_mgate_require(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data)
+{
+	struct net_device *dev = data;
+	_adapter *adapter = (_adapter *)rtw_netdev_priv(dev);
+	char tmp[32];
+
+	if (count < 1)
+		return -EFAULT;
+
+	if (count > sizeof(tmp)) {
+		rtw_warn_on(1);
+		return -EFAULT;
+	}
+
+	if (buffer && !copy_from_user(tmp, buffer, count)) {
+		struct mesh_peer_sel_policy *peer_sel_policy = &adapter->mesh_cfg.peer_sel_policy;
+		u8 require;
+		int num = sscanf(tmp, "%hhu", &require);
+
+		if (num >= 1) {
+			peer_sel_policy->cto_mgate_require = require;
+			#if CONFIG_RTW_MESH_CTO_MGATE_CARRIER
+			if (rtw_mesh_cto_mgate_required(adapter))
+				rtw_netif_carrier_off(adapter->pnetdev);
+			else
+				rtw_netif_carrier_on(adapter->pnetdev);
+			#endif
+		}
+	}
+
+exit:
+	return count;
+}
+
+static int proc_get_mesh_cto_mgate_blacklist(struct seq_file *m, void *v)
+{
+	struct net_device *dev = m->private;
+	_adapter *adapter = (_adapter *)rtw_netdev_priv(dev);
+
+	if (MLME_IS_MESH(adapter)) {
+		dump_mesh_cto_mgate_blacklist_settings(m, adapter);
+		if (MLME_IS_ASOC(adapter))
+			dump_mesh_cto_mgate_blacklist(m, adapter);
+	}
+
+	return 0;
+}
+
+static ssize_t proc_set_mesh_cto_mgate_blacklist(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data)
+{
+	struct net_device *dev = data;
+	_adapter *adapter = (_adapter *)rtw_netdev_priv(dev);
+	char tmp[32];
+
+	if (count < 1)
+		return -EFAULT;
+
+	if (count > sizeof(tmp)) {
+		rtw_warn_on(1);
+		return -EFAULT;
+	}
+
+	if (buffer && !copy_from_user(tmp, buffer, count)) {
+		struct mesh_peer_sel_policy *peer_sel_policy = &adapter->mesh_cfg.peer_sel_policy;
+		u32 conf_timeout_ms;
+		u32 blacklist_timeout_ms;
+		int num = sscanf(tmp, "%u %u", &conf_timeout_ms, &blacklist_timeout_ms);
+
+		if (num >= 1)
+			peer_sel_policy->cto_mgate_conf_timeout_ms = conf_timeout_ms;
+		if (num >= 2)
+			peer_sel_policy->cto_mgate_blacklist_timeout_ms = blacklist_timeout_ms;
+	}
+
+exit:
+	return count;
+}
+#endif /* CONFIG_RTW_MESH_CTO_MGATE_BLACKLIST */
+
+static int proc_get_mesh_networks(struct seq_file *m, void *v)
+{
+	struct net_device *dev = m->private;
+	_adapter *adapter = (_adapter *)rtw_netdev_priv(dev);
+
+	dump_mesh_networks(m, adapter);
+
+	return 0;
+}
+
+static int proc_get_mesh_plink_ctl(struct seq_file *m, void *v)
+{
+	struct net_device *dev = m->private;
+	_adapter *adapter = (_adapter *)rtw_netdev_priv(dev);
+
+	if (MLME_IS_MESH(adapter))
+		dump_mesh_plink_ctl(m, adapter);
+
+	return 0;
+}
+
+static int proc_get_mesh_mpath(struct seq_file *m, void *v)
+{
+	struct net_device *dev = m->private;
+	_adapter *adapter = (_adapter *)rtw_netdev_priv(dev);
+
+	if (MLME_IS_MESH(adapter) && MLME_IS_ASOC(adapter))
+		dump_mpath(m, adapter);
+
+	return 0;
+}
+
+static int proc_get_mesh_mpp(struct seq_file *m, void *v)
+{
+	struct net_device *dev = m->private;
+	_adapter *adapter = (_adapter *)rtw_netdev_priv(dev);
+
+	if (MLME_IS_MESH(adapter) && MLME_IS_ASOC(adapter))
+		dump_mpp(m, adapter);
+
+	return 0;
+}
+
+static int proc_get_mesh_known_gates(struct seq_file *m, void *v)
+{
+	struct net_device *dev = m->private;
+	_adapter *adapter = (_adapter *)rtw_netdev_priv(dev);
+
+	if (MLME_IS_MESH(adapter))
+		dump_known_gates(m, adapter);
+
+	return 0;
+}
+
+#if CONFIG_RTW_MESH_DATA_BMC_TO_UC
+static int proc_get_mesh_b2u_flags(struct seq_file *m, void *v)
+{
+	struct net_device *dev = m->private;
+	_adapter *adapter = (_adapter *)rtw_netdev_priv(dev);
+
+	if (MLME_IS_MESH(adapter))
+		dump_mesh_b2u_flags(m, adapter);
+
+	return 0;
+}
+
+static ssize_t proc_set_mesh_b2u_flags(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data)
+{
+	struct net_device *dev = data;
+	_adapter *adapter = (_adapter *)rtw_netdev_priv(dev);
+	char tmp[32];
+
+	if (count < 1)
+		return -EFAULT;
+
+	if (count > sizeof(tmp)) {
+		rtw_warn_on(1);
+		return -EFAULT;
+	}
+
+	if (buffer && !copy_from_user(tmp, buffer, count)) {
+		struct rtw_mesh_cfg *mcfg = &adapter->mesh_cfg;
+		u8 msrc, mfwd;
+		int num = sscanf(tmp, "%hhx %hhx", &msrc, &mfwd);
+
+		if (num >= 1)
+			mcfg->b2u_flags_msrc = msrc;
+		if (num >= 2)
+			mcfg->b2u_flags_mfwd = mfwd;
+	}
+
+exit:
+	return count;
+}
+#endif /* CONFIG_RTW_MESH_DATA_BMC_TO_UC */
+
+static int proc_get_mesh_stats(struct seq_file *m, void *v)
+{
+	struct net_device *dev = m->private;
+	_adapter *adapter = (_adapter *)rtw_netdev_priv(dev);
+
+	if (MLME_IS_MESH(adapter))
+		dump_mesh_stats(m, adapter);
+
+	return 0;
+}
+
+static int proc_get_mesh_gate_timeout(struct seq_file *m, void *v)
+{
+	struct net_device *dev = m->private;
+	_adapter *adapter = (_adapter *)rtw_netdev_priv(dev);
+
+	if (MLME_IS_MESH(adapter))
+		RTW_PRINT_SEL(m, "%u factor\n",
+			       adapter->mesh_cfg.path_gate_timeout_factor);
+
+	return 0;
+}
+
+static ssize_t proc_set_mesh_gate_timeout(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data)
+{
+	struct net_device *dev = data;
+	_adapter *adapter = (_adapter *)rtw_netdev_priv(dev);
+	char tmp[32];
+
+	if (count < 1)
+		return -EFAULT;
+
+	if (count > sizeof(tmp)) {
+		rtw_warn_on(1);
+		return -EFAULT;
+	}
+
+	if (buffer && !copy_from_user(tmp, buffer, count)) {
+		struct rtw_mesh_cfg *mcfg = &adapter->mesh_cfg;
+		u32 timeout;
+		int num = sscanf(tmp, "%u", &timeout);
+
+		if (num < 1)
+			goto exit;
+
+		mcfg->path_gate_timeout_factor = timeout;
+	}
+
+exit:
+	return count;
+}
+
+static int proc_get_mesh_gate_state(struct seq_file *m, void *v)
+{
+	struct net_device *dev = m->private;
+	_adapter *adapter = (_adapter *)rtw_netdev_priv(dev);
+	struct rtw_mesh_cfg *mcfg = &adapter->mesh_cfg;
+	u8 cto_mgate = 0;
+
+	if (MLME_IS_MESH(adapter)) {
+		if (rtw_mesh_is_primary_gate(adapter))
+			RTW_PRINT_SEL(m, "PG\n");
+		else if (mcfg->dot11MeshGateAnnouncementProtocol)
+			RTW_PRINT_SEL(m, "G\n");
+		else if (rtw_mesh_gate_num(adapter))
+			RTW_PRINT_SEL(m, "C\n");
+		else
+			RTW_PRINT_SEL(m, "N\n");
+	}
+
+	return 0;
+}
+
+#endif /* CONFIG_RTW_MESH */
+
+static int proc_get_scan_deny(struct seq_file *m, void *v)
+{
+	struct net_device *dev = m->private;
+	struct _ADAPTER *adapter= (_adapter *)rtw_netdev_priv(dev);
+	struct dvobj_priv *dvobj = adapter_to_dvobj(adapter);
+
+	RTW_PRINT_SEL(m, "scan_deny is %s\n", (dvobj->scan_deny == _TRUE) ? "enable":"disable");
+
+	return 0;
+}
+
+static ssize_t proc_set_scan_deny(struct file *file, const char __user *buffer,
+				size_t count, loff_t *pos, void *data)
+{
+	struct net_device *dev = data;
+	struct _ADAPTER *adapter = (_adapter *)rtw_netdev_priv(dev);
+	struct dvobj_priv *dvobj = adapter_to_dvobj(adapter);
+	char tmp[8];
+	int num = 0;
+	int enable = 0;
+
+	if (count > sizeof(tmp)) {
+		rtw_warn_on(1);
+		return -EFAULT;
+	}
+
+	if (!buffer || copy_from_user(tmp, buffer, count))
+		goto exit;
+
+	num = sscanf(tmp, "%d", &enable);
+	if (num !=  1) {
+		RTW_ERR("%s: invalid parameter!\n", __FUNCTION__);
+		goto exit;
+	}
+
+	dvobj->scan_deny = enable ? _TRUE : _FALSE;
+
+	RTW_PRINT("%s: scan_deny is %s\n",
+		  __FUNCTION__, (dvobj->scan_deny == _TRUE) ? "enable":"disable");
+
+exit:
+	return count;
+}
+
+#ifdef CONFIG_RTW_TPT_MODE
+static int proc_get_tpt_mode(struct seq_file *m, void *v)
+{
+	struct net_device *dev = m->private;
+	struct _ADAPTER *adapter= (_adapter *)rtw_netdev_priv(dev);
+	struct dvobj_priv *dvobj = adapter_to_dvobj(adapter);
+
+	RTW_PRINT_SEL(m, "current tpt_mode = %d\n", dvobj->tpt_mode);
+
+	return 0;
+}
+
+static void tpt_mode_default(struct _ADAPTER *adapter)
+{
+	struct dvobj_priv *dvobj = adapter_to_dvobj(adapter);
+
+	/* 1. disable scan deny */
+	dvobj->scan_deny = _FALSE;
+
+	/* 2. back to original LPS mode */
+#ifdef CONFIG_LPS		
+	rtw_pm_set_lps(adapter, adapter->registrypriv.power_mgnt);
+#endif
+
+	/* 3. back to original 2.4 tx bw mode */
+	rtw_set_tx_bw_mode(adapter, adapter->registrypriv.tx_bw_mode);
+}
+
+static void rtw_tpt_mode(struct _ADAPTER *adapter)
+{
+	struct dvobj_priv *dvobj = adapter_to_dvobj(adapter);
+	struct pwrctrl_priv *pwrctrlpriv = adapter_to_pwrctl(adapter);
+
+	if (dvobj->tpt_mode > 0) {
+
+		/* when enable each tpt mode 
+			1. scan deny
+			2. disable LPS */
+			
+		dvobj->scan_deny = _TRUE;
+
+#ifdef CONFIG_LPS		
+		rtw_pm_set_lps(adapter, PS_MODE_ACTIVE);
+#endif
+
+	}
+
+	switch (dvobj->tpt_mode) {
+		case 0: /* default mode */
+			tpt_mode_default(adapter);
+			break;
+		case 1: /* High TP*/
+			/*tpt_mode1(adapter);*/			 
+			dvobj->edca_be_ul = 0x5e431c;
+			dvobj->edca_be_dl = 0x00431c;			 
+			break;
+		case 2: /* noise */
+			/* tpt_mode2(adapter); */
+			dvobj->edca_be_ul = 0x00431c;
+			dvobj->edca_be_dl = 0x00431c;
+
+			rtw_set_tx_bw_mode(adapter, 0x20); /* for 2.4g, fixed tx_bw_mode to 20Mhz */
+			break;
+		case 3: /* long distance */
+			/* tpt_mode3(adapter); */
+			dvobj->edca_be_ul = 0x00431c;
+			dvobj->edca_be_dl = 0x00431c;
+
+			rtw_set_tx_bw_mode(adapter, 0x20); /* for 2.4g, fixed tx_bw_mode to 20Mhz */
+			break;
+		case 4: /* noise + long distance */
+			/* tpt_mode4(adapter); */
+			dvobj->edca_be_ul = 0x00431c;
+			dvobj->edca_be_dl = 0x00431c;
+
+			rtw_set_tx_bw_mode(adapter, 0x20); /* for 2.4g, fixed tx_bw_mode to 20Mhz */
+			break;
+		default: /* default mode */
+			tpt_mode_default(adapter);		
+			break;
+	}
+
+}
+
+static ssize_t proc_set_tpt_mode(struct file *file, const char __user *buffer,
+				size_t count, loff_t *pos, void *data)
+{
+	struct net_device *dev = data;
+	struct _ADAPTER *adapter = (_adapter *)rtw_netdev_priv(dev);
+	struct dvobj_priv *dvobj = adapter_to_dvobj(adapter);
+	char tmp[32];
+	int num = 0;
+	int mode = 0;
+
+#define MAX_TPT_MODE_NUM 4
+
+	if (count > sizeof(tmp)) {
+		rtw_warn_on(1);
+		return -EFAULT;
+	}
+
+	if (!buffer || copy_from_user(tmp, buffer, count))
+		goto exit;
+
+	num = sscanf(tmp, "%d", &mode);
+	if (num !=  1) {
+		RTW_ERR("%s: invalid parameter!\n", __FUNCTION__);
+		goto exit;
+	}
+
+	if (mode > MAX_TPT_MODE_NUM )
+		mode = 0;	
+
+	RTW_PRINT("%s: previous mode =  %d\n",
+		  __FUNCTION__, dvobj->tpt_mode);
+
+	RTW_PRINT("%s: enabled mode = %d\n",
+		  __FUNCTION__, mode);
+
+	dvobj->tpt_mode = mode;
+
+	rtw_tpt_mode(adapter);
+
+exit:
+	return count;
+
+}
+#endif /* CONFIG_RTW_TPT_MODE */
+
 /*
 * rtw_adapter_proc:
 * init/deinit when register/unregister net_device
@@ -2730,18 +3767,25 @@ const struct rtw_proc_hdl adapter_proc_hdls[] = {
 	RTW_PROC_HDL_SSEQ("scan_abort", proc_get_scan_abort, NULL),
 #ifdef CONFIG_SCAN_BACKOP
 	RTW_PROC_HDL_SSEQ("backop_flags_sta", proc_get_backop_flags_sta, proc_set_backop_flags_sta),
+	#ifdef CONFIG_AP_MODE
 	RTW_PROC_HDL_SSEQ("backop_flags_ap", proc_get_backop_flags_ap, proc_set_backop_flags_ap),
+	#endif
+	#ifdef CONFIG_RTW_MESH
+	RTW_PROC_HDL_SSEQ("backop_flags_mesh", proc_get_backop_flags_mesh, proc_set_backop_flags_mesh),
+	#endif
 #endif
 #ifdef CONFIG_RTW_REPEATER_SON
 	RTW_PROC_HDL_SSEQ("rson_data", proc_get_rson_data, proc_set_rson_data),
 #endif
 	RTW_PROC_HDL_SSEQ("survey_info", proc_get_survey_info, proc_set_survey_info),
 	RTW_PROC_HDL_SSEQ("ap_info", proc_get_ap_info, NULL),
+#ifdef ROKU_PRIVATE
+	RTW_PROC_HDL_SSEQ("infra_ap", proc_get_infra_ap, NULL),
+#endif /* ROKU_PRIVATE */
 	RTW_PROC_HDL_SSEQ("trx_info", proc_get_trx_info, proc_reset_trx_info),
 	RTW_PROC_HDL_SSEQ("tx_power_offset", proc_get_tx_power_offset, proc_set_tx_power_offset),
 	RTW_PROC_HDL_SSEQ("rate_ctl", proc_get_rate_ctl, proc_set_rate_ctl),
 	RTW_PROC_HDL_SSEQ("bw_ctl", proc_get_bw_ctl, proc_set_bw_ctl),
-	RTW_PROC_HDL_SSEQ("dis_pwt_ctl", proc_get_dis_pwt, proc_set_dis_pwt),
 	RTW_PROC_HDL_SSEQ("mac_qinfo", proc_get_mac_qinfo, NULL),
 	RTW_PROC_HDL_SSEQ("macid_info", proc_get_macid_info, NULL),
 	RTW_PROC_HDL_SSEQ("bcmc_info", proc_get_mi_ap_bc_info, NULL),
@@ -2769,12 +3813,19 @@ const struct rtw_proc_hdl adapter_proc_hdls[] = {
 	RTW_PROC_HDL_SSEQ("del_rx_ampdu_test_case", NULL, proc_set_del_rx_ampdu_test_case),
 	RTW_PROC_HDL_SSEQ("wait_hiq_empty", NULL, proc_set_wait_hiq_empty),
 	RTW_PROC_HDL_SSEQ("sta_linking_test", NULL, proc_set_sta_linking_test),
+#ifdef CONFIG_AP_MODE
+	RTW_PROC_HDL_SSEQ("ap_linking_test", NULL, proc_set_ap_linking_test),
+#endif
 
 	RTW_PROC_HDL_SSEQ("mac_reg_dump", proc_get_mac_reg_dump, NULL),
 	RTW_PROC_HDL_SSEQ("bb_reg_dump", proc_get_bb_reg_dump, NULL),
 	RTW_PROC_HDL_SSEQ("bb_reg_dump_ex", proc_get_bb_reg_dump_ex, NULL),
 	RTW_PROC_HDL_SSEQ("rf_reg_dump", proc_get_rf_reg_dump, NULL),
 
+#ifdef CONFIG_RTW_LED
+	RTW_PROC_HDL_SSEQ("led_config", proc_get_led_config, proc_set_led_config),
+#endif
+
 #ifdef CONFIG_AP_MODE
 	RTW_PROC_HDL_SSEQ("aid_status", proc_get_aid_status, proc_set_aid_status),
 	RTW_PROC_HDL_SSEQ("all_sta_info", proc_get_all_sta_info, NULL),
@@ -2791,7 +3842,7 @@ const struct rtw_proc_hdl adapter_proc_hdls[] = {
 
 	RTW_PROC_HDL_SSEQ("rx_signal", proc_get_rx_signal, proc_set_rx_signal),
 	RTW_PROC_HDL_SSEQ("hw_info", proc_get_hw_status, proc_set_hw_status),
-
+	RTW_PROC_HDL_SSEQ("mac_rptbuf", proc_get_mac_rptbuf, NULL),
 #ifdef CONFIG_80211N_HT
 	RTW_PROC_HDL_SSEQ("ht_enable", proc_get_ht_enable, proc_set_ht_enable),
 	RTW_PROC_HDL_SSEQ("bw_mode", proc_get_bw_mode, proc_set_bw_mode),
@@ -2801,15 +3852,14 @@ const struct rtw_proc_hdl adapter_proc_hdls[] = {
 	RTW_PROC_HDL_SSEQ("rx_ampdu_factor", proc_get_rx_ampdu_factor, proc_set_rx_ampdu_factor),
 	RTW_PROC_HDL_SSEQ("rx_ampdu_density", proc_get_rx_ampdu_density, proc_set_rx_ampdu_density),
 	RTW_PROC_HDL_SSEQ("tx_ampdu_density", proc_get_tx_ampdu_density, proc_set_tx_ampdu_density),
+	RTW_PROC_HDL_SSEQ("tx_max_agg_num", proc_get_tx_max_agg_num, proc_set_tx_max_agg_num),
 #ifdef CONFIG_TX_AMSDU
 	RTW_PROC_HDL_SSEQ("tx_amsdu", proc_get_tx_amsdu, proc_set_tx_amsdu),
 	RTW_PROC_HDL_SSEQ("tx_amsdu_rate", proc_get_tx_amsdu_rate, proc_set_tx_amsdu_rate),
 #endif
 #endif /* CONFIG_80211N_HT */
-	RTW_PROC_HDL_SSEQ("tx_max_agg_num", proc_get_tx_max_agg_num, proc_set_tx_max_agg_num),
 
 	RTW_PROC_HDL_SSEQ("en_fwps", proc_get_en_fwps, proc_set_en_fwps),
-	RTW_PROC_HDL_SSEQ("mac_rptbuf", proc_get_mac_rptbuf, NULL),
 
 	/* RTW_PROC_HDL_SSEQ("path_rssi", proc_get_two_path_rssi, NULL),
 	* 	RTW_PROC_HDL_SSEQ("rssi_disp",proc_get_rssi_disp, proc_set_rssi_disp), */
@@ -2829,6 +3879,10 @@ const struct rtw_proc_hdl adapter_proc_hdls[] = {
 	RTW_PROC_HDL_SSEQ("sreset", proc_get_sreset, proc_set_sreset),
 #endif /* DBG_CONFIG_ERROR_DETECT */
 	RTW_PROC_HDL_SSEQ("trx_info_debug", proc_get_trx_info_debug, NULL),
+
+#ifdef CONFIG_HUAWEI_PROC
+	RTW_PROC_HDL_SSEQ("huawei_trx_info", proc_get_huawei_trx_info, NULL),
+#endif
 	RTW_PROC_HDL_SSEQ("linked_info_dump", proc_get_linked_info_dump, proc_set_linked_info_dump),
 	RTW_PROC_HDL_SSEQ("sta_tp_dump", proc_get_sta_tp_dump, proc_set_sta_tp_dump),
 	RTW_PROC_HDL_SSEQ("sta_tp_info", proc_get_sta_tp_info, NULL),
@@ -2860,6 +3914,11 @@ const struct rtw_proc_hdl adapter_proc_hdls[] = {
 	RTW_PROC_HDL_SSEQ("tx_ring_ext", proc_get_tx_ring_ext, proc_set_tx_ring_ext),
 #endif
 	RTW_PROC_HDL_SSEQ("pci_aspm", proc_get_pci_aspm, NULL),
+
+	RTW_PROC_HDL_SSEQ("pci_conf_space", proc_get_pci_conf_space, proc_set_pci_conf_space),
+
+	RTW_PROC_HDL_SSEQ("pci_bridge_conf_space", proc_get_pci_bridge_conf_space, proc_set_pci_bridge_conf_space),
+
 #endif
 
 #ifdef CONFIG_WOWLAN
@@ -2887,13 +3946,19 @@ const struct rtw_proc_hdl adapter_proc_hdls[] = {
 #if CONFIG_RTW_PRE_LINK_STA
 	RTW_PROC_HDL_SSEQ("pre_link_sta", proc_get_pre_link_sta, proc_set_pre_link_sta),
 #endif
+	RTW_PROC_HDL_SSEQ("ch_sel_policy", proc_get_ch_sel_policy, proc_set_ch_sel_policy),
 #ifdef CONFIG_DFS_MASTER
-	RTW_PROC_HDL_SSEQ("dfs_master_test_case", proc_get_dfs_master_test_case, proc_set_dfs_master_test_case),
+	RTW_PROC_HDL_SSEQ("dfs_test_case", proc_get_dfs_test_case, proc_set_dfs_test_case),
 	RTW_PROC_HDL_SSEQ("update_non_ocp", NULL, proc_set_update_non_ocp),
 	RTW_PROC_HDL_SSEQ("radar_detect", NULL, proc_set_radar_detect),
 	RTW_PROC_HDL_SSEQ("dfs_ch_sel_d_flags", proc_get_dfs_ch_sel_d_flags, proc_set_dfs_ch_sel_d_flags),
+	#ifdef CONFIG_DFS_SLAVE_WITH_RADAR_DETECT
+	RTW_PROC_HDL_SSEQ("dfs_slave_with_rd", proc_get_dfs_slave_with_rd, proc_set_dfs_slave_with_rd),
+	#endif
 #endif
+#ifdef CONFIG_BCN_CNT_CONFIRM_HDL
 	RTW_PROC_HDL_SSEQ("new_bcn_max", proc_get_new_bcn_max, proc_set_new_bcn_max),
+#endif
 	RTW_PROC_HDL_SSEQ("sink_udpport", proc_get_udpport, proc_set_udpport),
 #ifdef DBG_RX_COUNTER_DUMP
 	RTW_PROC_HDL_SSEQ("dump_rx_cnt_mode", proc_get_rx_cnt_dump, proc_set_rx_cnt_dump),
@@ -2915,7 +3980,7 @@ const struct rtw_proc_hdl adapter_proc_hdls[] = {
 	RTW_PROC_HDL_SSEQ("kfree_thermal", proc_get_kfree_thermal, proc_set_kfree_thermal),
 #endif
 #ifdef CONFIG_POWER_SAVING
-	RTW_PROC_HDL_SSEQ("ps_info", proc_get_ps_info, NULL),
+	RTW_PROC_HDL_SSEQ("ps_info", proc_get_ps_info, proc_set_ps_info),
 #ifdef CONFIG_WMMPS_STA
 	RTW_PROC_HDL_SSEQ("wmmps_info", proc_get_wmmps_info, proc_set_wmmps_info),
 #endif /* CONFIG_WMMPS_STA */	
@@ -2945,6 +4010,10 @@ const struct rtw_proc_hdl adapter_proc_hdls[] = {
 	RTW_PROC_HDL_SSEQ("11w_tx_auth", proc_get_tx_auth, proc_set_tx_auth),
 #endif /* CONFIG_IEEE80211W */
 
+#ifdef CONFIG_CUSTOMER01_SMART_ANTENNA
+	RTW_PROC_HDL_SSEQ("pathb_phase", proc_get_pathb_phase, proc_set_pathb_phase),
+#endif
+
 #ifdef CONFIG_MBSSID_CAM
 	RTW_PROC_HDL_SSEQ("mbid_cam", proc_get_mbid_cam_cache, NULL),
 #endif
@@ -2957,10 +4026,11 @@ const struct rtw_proc_hdl adapter_proc_hdls[] = {
 	RTW_PROC_HDL_SSEQ("tx_stat", proc_get_tx_stat, NULL),
 	/**** PHY Capability ****/
 	RTW_PROC_HDL_SSEQ("phy_cap", proc_get_phy_cap, NULL),
-
+#ifdef CONFIG_80211N_HT
 	RTW_PROC_HDL_SSEQ("rx_stbc", proc_get_rx_stbc, proc_set_rx_stbc),
 	RTW_PROC_HDL_SSEQ("stbc_cap", proc_get_stbc_cap, proc_set_stbc_cap),
 	RTW_PROC_HDL_SSEQ("ldpc_cap", proc_get_ldpc_cap, proc_set_ldpc_cap),
+#endif /* CONFIG_80211N_HT */
 #ifdef CONFIG_BEAMFORMING
 	RTW_PROC_HDL_SSEQ("txbf_cap", proc_get_txbf_cap, proc_set_txbf_cap),
 #endif
@@ -2989,6 +4059,55 @@ const struct rtw_proc_hdl adapter_proc_hdls[] = {
 	RTW_PROC_HDL_SSEQ("dynamic_agg_enable", proc_get_dynamic_agg_enable, proc_set_dynamic_agg_enable),
 	RTW_PROC_HDL_SSEQ("fw_offload", proc_get_fw_offload, proc_set_fw_offload),
 
+#ifdef CONFIG_RTW_MESH
+	#if CONFIG_RTW_MESH_ACNODE_PREVENT
+	RTW_PROC_HDL_SSEQ("mesh_acnode_prevent", proc_get_mesh_acnode_prevent, proc_set_mesh_acnode_prevent),
+	#endif
+	#if CONFIG_RTW_MESH_OFFCH_CAND
+	RTW_PROC_HDL_SSEQ("mesh_offch_cand", proc_get_mesh_offch_cand, proc_set_mesh_offch_cand),
+	#endif
+	#if CONFIG_RTW_MESH_PEER_BLACKLIST
+	RTW_PROC_HDL_SSEQ("mesh_peer_blacklist", proc_get_mesh_peer_blacklist, proc_set_mesh_peer_blacklist),
+	#endif
+	#if CONFIG_RTW_MESH_CTO_MGATE_BLACKLIST
+	RTW_PROC_HDL_SSEQ("mesh_cto_mgate_require", proc_get_mesh_cto_mgate_require, proc_set_mesh_cto_mgate_require),
+	RTW_PROC_HDL_SSEQ("mesh_cto_mgate_blacklist", proc_get_mesh_cto_mgate_blacklist, proc_set_mesh_cto_mgate_blacklist),
+	#endif
+	RTW_PROC_HDL_SSEQ("mesh_peer_sel_policy", proc_get_mesh_peer_sel_policy, NULL),
+	RTW_PROC_HDL_SSEQ("mesh_networks", proc_get_mesh_networks, NULL),
+	RTW_PROC_HDL_SSEQ("mesh_plink_ctl", proc_get_mesh_plink_ctl, NULL),
+	RTW_PROC_HDL_SSEQ("mesh_mpath", proc_get_mesh_mpath, NULL),
+	RTW_PROC_HDL_SSEQ("mesh_mpp", proc_get_mesh_mpp, NULL),
+	RTW_PROC_HDL_SSEQ("mesh_known_gates", proc_get_mesh_known_gates, NULL),
+	#if CONFIG_RTW_MESH_DATA_BMC_TO_UC
+	RTW_PROC_HDL_SSEQ("mesh_b2u_flags", proc_get_mesh_b2u_flags, proc_set_mesh_b2u_flags),
+	#endif
+	RTW_PROC_HDL_SSEQ("mesh_stats", proc_get_mesh_stats, NULL),
+	RTW_PROC_HDL_SSEQ("mesh_gate_timeout_factor", proc_get_mesh_gate_timeout, proc_set_mesh_gate_timeout),
+	RTW_PROC_HDL_SSEQ("mesh_gate_state", proc_get_mesh_gate_state, NULL),
+#endif
+#ifdef CONFIG_FW_HANDLE_TXBCN
+	RTW_PROC_HDL_SSEQ("fw_tbtt_rpt", proc_get_fw_tbtt_rpt, proc_set_fw_tbtt_rpt),
+#endif
+#ifdef CONFIG_LPS_CHK_BY_TP
+	RTW_PROC_HDL_SSEQ("lps_chk_tp", proc_get_lps_chk_tp, proc_set_lps_chk_tp),
+#endif
+#ifdef CONFIG_SUPPORT_STATIC_SMPS
+	RTW_PROC_HDL_SSEQ("smps", proc_get_smps, proc_set_smps),
+#endif
+
+	RTW_PROC_HDL_SSEQ("scan_deny", proc_get_scan_deny, proc_set_scan_deny),
+#ifdef CONFIG_RTW_TPT_MODE
+	RTW_PROC_HDL_SSEQ("tpt_mode", proc_get_tpt_mode, proc_set_tpt_mode),
+#endif
+
+#ifdef CONFIG_CTRL_TXSS_BY_TP
+	RTW_PROC_HDL_SSEQ("txss_tp", proc_get_txss_tp, proc_set_txss_tp),
+	#ifdef DBG_CTRL_TXSS
+	RTW_PROC_HDL_SSEQ("txss_ctrl", proc_get_txss_ctrl, proc_set_txss_ctrl),
+	#endif
+#endif
+
 };
 
 const int adapter_proc_hdls_num = sizeof(adapter_proc_hdls) / sizeof(struct rtw_proc_hdl);
@@ -3061,10 +4180,7 @@ ssize_t proc_set_odm_adaptivity(struct file *file, const char __user *buffer, si
 	_adapter *padapter = (_adapter *)rtw_netdev_priv(dev);
 	char tmp[32];
 	u32 th_l2h_ini;
-	u32 th_l2h_ini_mode2;
 	s8 th_edcca_hl_diff;
-	s8 th_edcca_hl_diff_mode2;
-	u8 edcca_enable;
 
 	if (count < 1)
 		return -EFAULT;
@@ -3076,12 +4192,12 @@ ssize_t proc_set_odm_adaptivity(struct file *file, const char __user *buffer, si
 
 	if (buffer && !copy_from_user(tmp, buffer, count)) {
 
-		int num = sscanf(tmp, "%x %hhd %x %hhd %hhu", &th_l2h_ini, &th_edcca_hl_diff, &th_l2h_ini_mode2, &th_edcca_hl_diff_mode2, &edcca_enable);
+		int num = sscanf(tmp, "%x %hhd", &th_l2h_ini, &th_edcca_hl_diff);
 
-		if (num != 5)
+		if (num != 2)
 			return count;
 
-		rtw_odm_adaptivity_parm_set(padapter, (s8)th_l2h_ini, th_edcca_hl_diff, (s8)th_l2h_ini_mode2, th_edcca_hl_diff_mode2, edcca_enable);
+		rtw_odm_adaptivity_parm_set(padapter, (s8)th_l2h_ini, th_edcca_hl_diff);
 	}
 
 	return count;
@@ -3094,7 +4210,7 @@ int proc_get_phydm_cmd(struct seq_file *m, void *v)
 {
 	struct net_device *netdev;
 	PADAPTER padapter;
-	struct PHY_DM_STRUCT *phydm;
+	struct dm_struct *phydm;
 
 
 	netdev = m->private;
@@ -3121,7 +4237,7 @@ ssize_t proc_set_phydm_cmd(struct file *file, const char __user *buffer, size_t
 {
 	struct net_device *netdev;
 	PADAPTER padapter;
-	struct PHY_DM_STRUCT *phydm;
+	struct dm_struct *phydm;
 	char tmp[64] = {0};
 
 
@@ -3428,7 +4544,6 @@ struct proc_dir_entry *rtw_adapter_proc_init(struct net_device *dev)
 	struct proc_dir_entry *dir_dev = NULL;
 	struct proc_dir_entry *entry = NULL;
 	_adapter *adapter = rtw_netdev_priv(dev);
-	u8 rf_type;
 	ssize_t i;
 
 	if (drv_proc == NULL) {
diff --git a/rtl8723DS/os_dep/linux/rtw_proc.h b/rtl8723DS/os_dep/linux/rtw_proc.h
index c2c7c8e..c2c7c8e 100755..100644
--- a/rtl8723DS/os_dep/linux/rtw_proc.h
+++ b/rtl8723DS/os_dep/linux/rtw_proc.h
diff --git a/rtl8723DS/os_dep/linux/rtw_rhashtable.c b/rtl8723DS/os_dep/linux/rtw_rhashtable.c
new file mode 100644
index 0000000..4d51f04
--- a/dev/null
+++ b/rtl8723DS/os_dep/linux/rtw_rhashtable.c
@@ -0,0 +1,74 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2007 - 2017 Realtek Corporation.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ *****************************************************************************/
+
+#ifdef CONFIG_RTW_MESH /* for now, only promised for kernel versions we support mesh */
+
+#include <drv_types.h>
+
+int rtw_rhashtable_walk_enter(rtw_rhashtable *ht, rtw_rhashtable_iter *iter)
+{
+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(4, 7, 0))
+	return rhashtable_walk_init((ht), (iter), GFP_ATOMIC);
+#else
+	/* kernel >= 4.4.0 rhashtable_walk_init use GFP_KERNEL to alloc, spin_lock for assignment */
+	iter->ht = ht;
+	iter->p = NULL;
+	iter->slot = 0;
+	iter->skip = 0;
+
+	iter->walker = kmalloc(sizeof(*iter->walker), GFP_ATOMIC);
+	if (!iter->walker)
+		return -ENOMEM;
+
+	spin_lock(&ht->lock);
+	iter->walker->tbl =
+		rcu_dereference_protected(ht->tbl, lockdep_is_held(&ht->lock));
+	list_add(&iter->walker->list, &iter->walker->tbl->walkers);
+	spin_unlock(&ht->lock);
+
+	return 0;
+#endif
+}
+
+#if (LINUX_VERSION_CODE < KERNEL_VERSION(4, 4, 0))
+#if (LINUX_VERSION_CODE < KERNEL_VERSION(3, 15, 0))
+#if (LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 25))
+static inline int is_vmalloc_addr(const void *x)
+{
+#ifdef CONFIG_MMU
+	unsigned long addr = (unsigned long)x;
+
+	return addr >= VMALLOC_START && addr < VMALLOC_END;
+#else
+	return 0;
+#endif
+}
+#endif /* (LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 25)) */
+
+void kvfree(const void *addr)
+{
+	if (is_vmalloc_addr(addr))
+		vfree(addr);
+	else
+		kfree(addr);
+}
+#endif /* (LINUX_VERSION_CODE < KERNEL_VERSION(3, 15, 0)) */
+
+#include "rhashtable.c"
+
+#endif /* (LINUX_VERSION_CODE < KERNEL_VERSION(4, 4, 0)) */
+
+#endif /* CONFIG_RTW_MESH */
+
diff --git a/rtl8723DS/os_dep/linux/rtw_rhashtable.h b/rtl8723DS/os_dep/linux/rtw_rhashtable.h
new file mode 100644
index 0000000..567ab39
--- a/dev/null
+++ b/rtl8723DS/os_dep/linux/rtw_rhashtable.h
@@ -0,0 +1,55 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2007 - 2017 Realtek Corporation.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ *****************************************************************************/
+#ifndef __RTW_RHASHTABLE_H__
+#define __RTW_RHASHTABLE_H__
+
+#ifdef CONFIG_RTW_MESH /* for now, only promised for kernel versions we support mesh */
+
+/* directly reference rhashtable in kernel */
+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(4, 4, 0))
+#include <linux/rhashtable.h>
+#endif /* (LINUX_VERSION_CODE >= KERNEL_VERSION(4, 4, 0)) */
+
+/* Use rhashtable from kernel 4.4 */
+#if (LINUX_VERSION_CODE < KERNEL_VERSION(4, 4, 0))
+#if (LINUX_VERSION_CODE < KERNEL_VERSION(4, 0, 0))
+#define NULLS_MARKER(value) (1UL | (((long)value) << 1))
+#endif
+#include "rhashtable.h"
+#endif /* (LINUX_VERSION_CODE < KERNEL_VERSION(4, 4, 0)) */
+
+typedef struct rhashtable rtw_rhashtable;
+typedef struct rhash_head rtw_rhash_head;
+typedef struct rhashtable_params rtw_rhashtable_params;
+
+#define rtw_rhashtable_init(ht, params) rhashtable_init(ht, params)
+
+typedef struct rhashtable_iter rtw_rhashtable_iter;
+
+int rtw_rhashtable_walk_enter(rtw_rhashtable *ht, rtw_rhashtable_iter *iter);
+#define rtw_rhashtable_walk_exit(iter) rhashtable_walk_exit(iter)
+#define rtw_rhashtable_walk_start(iter) rhashtable_walk_start(iter)
+#define rtw_rhashtable_walk_next(iter) rhashtable_walk_next(iter)
+#define rtw_rhashtable_walk_stop(iter) rhashtable_walk_stop(iter)
+
+#define rtw_rhashtable_free_and_destroy(ht, free_fn, arg) rhashtable_free_and_destroy((ht), (free_fn), (arg))
+#define rtw_rhashtable_lookup_fast(ht, key, params) rhashtable_lookup_fast((ht), (key), (params))
+#define rtw_rhashtable_lookup_insert_fast(ht, obj, params) rhashtable_lookup_insert_fast((ht), (obj), (params))
+#define rtw_rhashtable_remove_fast(ht, obj, params) rhashtable_remove_fast((ht), (obj), (params))
+
+#endif /* CONFIG_RTW_MESH */
+
+#endif /* __RTW_RHASHTABLE_H__ */
+
diff --git a/rtl8723DS/os_dep/linux/sdio_intf.c b/rtl8723DS/os_dep/linux/sdio_intf.c
index e864d57..812c9a8 100755..100644
--- a/rtl8723DS/os_dep/linux/sdio_intf.c
+++ b/rtl8723DS/os_dep/linux/sdio_intf.c
@@ -29,14 +29,7 @@
 #ifdef CONFIG_PLATFORM_INTEL_BYT
 #ifdef CONFIG_ACPI
 #include <linux/acpi.h>
-#ifdef CONFIG_GPIO_WAKEUP
-#include <linux/gpio.h>
-#endif
-#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3,14,0))
-#include <linux/gpio/consumer.h>
-#else
 #include <linux/acpi_gpio.h>
-#endif
 #include "rtw_android.h"
 #endif
 static int wlan_en_gpio = -1;
@@ -46,7 +39,9 @@ static int wlan_en_gpio = -1;
 #define dev_to_sdio_func(d)     container_of(d, struct sdio_func, dev)
 #endif
 
+#ifdef CONFIG_WOWLAN
 static struct mmc_host *mmc_host = NULL;
+#endif
 
 static const struct sdio_device_id sdio_ids[] = {
 #ifdef CONFIG_RTL8723B
@@ -71,6 +66,11 @@ static const struct sdio_device_id sdio_ids[] = {
 #ifdef CONFIG_RTL8188F
 	{SDIO_DEVICE(0x024c, 0xF179), .driver_data = RTL8188F},
 #endif
+
+#ifdef CONFIG_RTL8188GTV
+	{SDIO_DEVICE(0x024c, 0x018C), .driver_data = RTL8188GTV},
+#endif
+
 #ifdef CONFIG_RTL8822B
 	{SDIO_DEVICE(0x024c, 0xB822), .driver_data = RTL8822B},
 #endif
@@ -80,6 +80,11 @@ static const struct sdio_device_id sdio_ids[] = {
 	{ SDIO_DEVICE(0x024c, 0xD724), .driver_data = RTL8723D},
 #endif
 
+#ifdef CONFIG_RTL8192F
+	{ SDIO_DEVICE(0x024c, 0x818C), .driver_data = RTL8192F},/*A CUT*/
+	{ SDIO_DEVICE(0x024c, 0xF192), .driver_data = RTL8192F},/*B CUT*/
+#endif /* CONFIG_RTL8192F */
+
 #ifdef CONFIG_RTL8821C
 	{SDIO_DEVICE(0x024C, 0xB821), .driver_data = RTL8821C},
 	{SDIO_DEVICE(0x024C, 0xC821), .driver_data = RTL8821C},
@@ -97,11 +102,8 @@ static int rtw_drv_init(struct sdio_func *func, const struct sdio_device_id *id)
 static void rtw_dev_remove(struct sdio_func *func);
 static int rtw_sdio_resume(struct device *dev);
 static int rtw_sdio_suspend(struct device *dev);
-static void rtw_sdio_shutdown(struct device *dev);
 extern void rtw_dev_unload(PADAPTER padapter);
-#if defined(CONFIG_PLATFORM_INTEL_BYT)
-int rtw_sdio_set_power(struct sdio_func *func, int on);
-#endif /* CONFIG_PLATFORM_INTEL_BYT */
+
 #if (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 29))
 static const struct dev_pm_ops rtw_sdio_pm_ops = {
 	.suspend	= rtw_sdio_suspend,
@@ -121,7 +123,6 @@ static struct sdio_drv_priv sdio_drvpriv = {
 	.r871xs_drv.id_table = sdio_ids,
 #if (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 29))
 	.r871xs_drv.drv = {
-		.shutdown = rtw_sdio_shutdown,
 		.pm = &rtw_sdio_pm_ops,
 	}
 #endif
@@ -229,7 +230,7 @@ static u8 gpio_hostwakeup_alloc_irq(PADAPTER padapter)
 	status = IRQF_NO_SUSPEND;
 #endif
 
-	if (HIGH_ACTIVE)
+	if (HIGH_ACTIVE_DEV2HST)
 		status |= IRQF_TRIGGER_RISING;
 	else
 		status |= IRQF_TRIGGER_FALLING;
@@ -461,6 +462,13 @@ static void rtw_decide_chip_type_by_device_id(struct dvobj_priv *dvobj, const st
 	}
 #endif
 
+#if defined(CONFIG_RTL8188GTV)
+	if (dvobj->chip_type == RTL8188GTV) {
+		dvobj->HardwareType = HARDWARE_TYPE_RTL8188GTVS;
+		RTW_INFO("CHIP TYPE: RTL8188GTV\n");
+	}
+#endif
+
 #if defined(CONFIG_RTL8822B)
 	if (dvobj->chip_type == RTL8822B) {
 		dvobj->HardwareType = HARDWARE_TYPE_RTL8822BS;
@@ -474,6 +482,13 @@ static void rtw_decide_chip_type_by_device_id(struct dvobj_priv *dvobj, const st
 		RTW_INFO("CHIP TYPE: RTL8821C\n");
 	}
 #endif
+
+#if defined(CONFIG_RTL8192F)
+	if (dvobj->chip_type == RTL8192F) {
+		dvobj->HardwareType = HARDWARE_TYPE_RTL8192FS;
+		RTW_INFO("CHIP TYPE: RTL8192F\n");
+	}
+#endif
 }
 
 static struct dvobj_priv *sdio_dvobj_init(struct sdio_func *func, const struct sdio_device_id  *pdid)
@@ -569,6 +584,11 @@ u8 rtw_set_hal_ops(PADAPTER padapter)
 		rtl8188fs_set_hal_ops(padapter);
 #endif
 
+#if defined(CONFIG_RTL8188GTV)
+	if (rtw_get_chip_type(padapter) == RTL8188GTV)
+		rtl8188gtvs_set_hal_ops(padapter);
+#endif
+
 #if defined(CONFIG_RTL8822B)
 	if (rtw_get_chip_type(padapter) == RTL8822B)
 		rtl8822bs_set_hal_ops(padapter);
@@ -581,6 +601,11 @@ u8 rtw_set_hal_ops(PADAPTER padapter)
 	}
 #endif
 
+#if defined(CONFIG_RTL8192F)
+	if (rtw_get_chip_type(padapter) == RTL8192F)
+		rtl8192fs_set_hal_ops(padapter);
+#endif
+
 	if (rtw_hal_ops_check(padapter) == _FAIL)
 		return _FAIL;
 
@@ -612,6 +637,11 @@ static void sd_intf_stop(PADAPTER padapter)
 	rtw_hal_disable_interrupt(padapter);
 }
 
+
+#ifdef RTW_SUPPORT_PLATFORM_SHUTDOWN
+PADAPTER g_test_adapter = NULL;
+#endif /* RTW_SUPPORT_PLATFORM_SHUTDOWN */
+
 _adapter *rtw_sdio_primary_adapter_init(struct dvobj_priv *dvobj)
 {
 	int status = _FAIL;
@@ -624,6 +654,9 @@ _adapter *rtw_sdio_primary_adapter_init(struct dvobj_priv *dvobj)
 	if (loadparam(padapter) != _SUCCESS)
 		goto free_adapter;
 
+#ifdef RTW_SUPPORT_PLATFORM_SHUTDOWN
+	g_test_adapter = padapter;
+#endif /* RTW_SUPPORT_PLATFORM_SHUTDOWN */
 	padapter->dvobj = dvobj;
 
 	rtw_set_drv_stopped(padapter);/*init*/
@@ -700,6 +733,9 @@ free_hal_data:
 
 free_adapter:
 	if (status != _SUCCESS && padapter) {
+		#ifdef RTW_HALMAC
+		rtw_halmac_deinit_adapter(dvobj);
+		#endif
 		rtw_vmfree((u8 *)padapter, sizeof(*padapter));
 		padapter = NULL;
 	}
@@ -758,6 +794,9 @@ static void rtw_sdio_primary_adapter_deinit(_adapter *padapter)
 	rtd2885_wlan_netlink_sendMsg("linkdown", "8712");
 #endif
 
+#ifdef RTW_SUPPORT_PLATFORM_SHUTDOWN
+	g_test_adapter = NULL;
+#endif /* RTW_SUPPORT_PLATFORM_SHUTDOWN */
 }
 
 /*
@@ -789,38 +828,6 @@ static int rtw_drv_init(
 	handle = ACPI_HANDLE(&func->dev);
 
 	if (handle) {
-#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3,14,0))
-		struct gpio_desc *oob_gpio = NULL;
-		/* Dont try to do acpi pm for the wifi module */
-		if (!handle || acpi_bus_get_device(handle, &adev))
-			RTW_INFO("Could not get acpi pointer!\n");
-		else {
-			adev->power.flags.ignore_parent = 1;
-			adev->flags.power_manageable = 0;
-			RTW_INFO("Disabling ACPI power management support!\n");
-		}
-		//oob_irq = acpi_get_gpio_by_index(&func->dev, 0, NULL);
-		// KERNEL_VERSION >= 3.14 (change to how gpio index is found for irq, the
-		// acpi_get_gpio_by_index() is no longer an EXPORT_SYMBOL_GPL
-		oob_gpio = devm_gpiod_get_index(&func->dev,
-						"rtw_wifi_gpio_wakeup", 0);
-		if (IS_ERR_OR_NULL(oob_gpio)) {
-			pr_err("%s: failed to get GPIO descriptor\n", __func__);
-			goto exit;
-		}
-
-		if (gpiod_direction_input(oob_gpio)) {
-			pr_err("## %s Cannot set GPIO direction input\n", __FUNCTION__);
-			goto exit;
-		}
-
-		if ((oob_irq = gpiod_to_irq(oob_gpio)) < 0) {
-			pr_err("## %s Cannot convert GPIO to IRQ\n", __FUNCTION__);
-			goto exit;
-		}
-
-		RTW_INFO("## %s OOB_IRQ=%d\n", __FUNCTION__, oob_irq);
-#else
 		/* Dont try to do acpi pm for the wifi module */
 		if (!handle || acpi_bus_get_device(handle, &adev))
 			RTW_INFO("Could not get acpi pointer!\n");
@@ -831,12 +838,11 @@ static int rtw_drv_init(
 		oob_gpio = acpi_get_gpio_by_index(&func->dev, 0, NULL);
 		RTW_INFO("rtw_drv_init: ACPI_HANDLE found oob_gpio %d!\n", oob_gpio);
 		wifi_configure_gpio();
-#endif
 	} else
 		RTW_INFO("rtw_drv_init: ACPI_HANDLE NOT found!\n");
 #endif
 
-#if defined(CONFIG_ACPI) && (LINUX_VERSION_CODE < KERNEL_VERSION(3,14,0))
+#if defined(CONFIG_ACPI)
 	if (&func->dev && ACPI_HANDLE(&func->dev)) {
 		wlan_en_gpio = acpi_get_gpio_by_index(&func->dev, 1, NULL);
 		RTW_INFO("rtw_drv_init: ACPI_HANDLE found wlan_en %d!\n", wlan_en_gpio);
@@ -845,13 +851,7 @@ static int rtw_drv_init(
 #endif
 #endif /* CONFIG_PLATFORM_INTEL_BYT */
 
-#ifdef CONFIG_PM
-	if (func->card->host) {
-		mmc_host = func->card->host;
-		RTW_INFO("forbid runtime pm when sdio probe\n");
-		pm_runtime_forbid(mmc_host->parent);
-	}
-#endif
+
 
 	dvobj = sdio_dvobj_init(func, id);
 	if (dvobj == NULL) {
@@ -932,9 +932,6 @@ free_dvobj:
 	if (status != _SUCCESS)
 		sdio_dvobj_deinit(func);
 exit:
-#if defined(CONFIG_PLATFORM_INTEL_BYT)
-	rtw_sdio_set_power(func,0);
-#endif /* CONFIG_PLATFORM_INTEL_BYT */
 	return status == _SUCCESS ? 0 : -ENODEV;
 }
 
@@ -996,17 +993,6 @@ static void rtw_dev_remove(struct sdio_func *func)
 
 	sdio_dvobj_deinit(func);
 
-#ifdef CONFIG_PM
-	if (mmc_host && func->card->host == mmc_host) {
-		RTW_INFO("allow runtime pm after dev remove\n");
-		pm_runtime_allow(mmc_host->parent);
-	} else if (func->card->host) {
-		RTW_INFO("(1)allow runtime pm after dev remove\n");
-		mmc_host = func->card->host;
-		pm_runtime_allow(mmc_host->parent);
-	}
-#endif /*CONFIG_PM*/
-
 
 }
 extern int pm_netdev_open(struct net_device *pnetdev, u8 bnormal);
@@ -1125,51 +1111,6 @@ static int rtw_sdio_resume(struct device *dev)
 
 }
 
-static void rtw_sdio_shutdown(struct device *dev)
-{
-	struct sdio_func *func = dev_to_sdio_func(dev);
-	struct dvobj_priv *psdpriv = sdio_get_drvdata(func);
-	_adapter *padapter = psdpriv->padapters[IFACE_ID0];
-
-	u32 addr;
-	u8 tmp8, cnt = 0;
-
-	RTW_INFO("%s: enter\n", __func__);
-
-#ifdef CONFIG_FWLPS_IN_IPS
-	rtw_ps_deny(padapter, PS_DENY_DRV_REMOVE);
-	rtw_pm_set_ips(padapter, IPS_NONE);
-	rtw_pm_set_lps(padapter, PS_MODE_ACTIVE);
-	LeaveAllPowerSaveMode(padapter);
-#endif /* CONFIG_FWLPS_IN_IPS */
-
-#ifdef CONFIG_BT_COEXIST
-#ifdef CONFIG_BT_COEXIST_SOCKET_TRX
-	if (GET_HAL_DATA(padapter)->EEPROMBluetoothCoexist)
-		rtw_btcoex_close_socket(padapter);
-#endif
-	rtw_btcoex_HaltNotify(padapter);
-#endif
-
-	/* enable power down function */
-	/* 0x04[4] = 1 */
-	/* 0x05[7] = 1 */
-	addr = 0x04;
-	tmp8 = rtw_read8(padapter, addr);
-	tmp8 |= BIT(4);
-	rtw_write8(padapter, addr, tmp8);
-	RTW_INFO(FUNC_ADPT_FMT ": read after write 0x%x=0x%x\n",
-		FUNC_ADPT_ARG(padapter), addr, rtw_read8(padapter, addr));
-
-	addr = 0x05;
-	tmp8 = rtw_read8(padapter, addr);
-	tmp8 |= BIT(7);
-	rtw_write8(padapter, addr, tmp8);
-	RTW_INFO(FUNC_ADPT_FMT ": read after write 0x%x=0x%x\n",
-		FUNC_ADPT_ARG(padapter), addr, rtw_read8(padapter, addr));
-
-}
-
 static int __init rtw_drv_entry(void)
 {
 	int ret = 0;
@@ -1240,39 +1181,19 @@ static void __exit rtw_drv_halt(void)
 	rtw_mstat_dump(RTW_DBGDUMP);
 }
 
-#if defined(CONFIG_PLATFORM_INTEL_BYT)
-int rtw_sdio_set_power(struct sdio_func *func, int on)
+#ifdef CONFIG_PLATFORM_INTEL_BYT
+int rtw_sdio_set_power(int on)
 {
-#if defined(CONFIG_ACPI)
-	acpi_handle *handle;
-	struct acpi_device *adev = NULL;
-	int ret;
-
-	handle = ACPI_HANDLE(&func->dev);
-	if (IS_ERR_OR_NULL(handle))
-		return -ENOENT;
 
-	acpi_bus_get_device(handle, &adev);
-	if (!adev)
-		return -ENOENT;
-
-	RTW_INFO("turn wifi %s\n", on ? "on" : "off");
-
-	adev->flags.power_manageable = 1;
-
-	if (on)
-		ret = acpi_device_set_power(adev, ACPI_STATE_D0);
-	else
-		ret = acpi_device_set_power(adev, ACPI_STATE_D3_COLD);
-
-	adev->flags.power_manageable = 0;
+	if (wlan_en_gpio >= 0) {
+		if (on)
+			gpio_set_value(wlan_en_gpio, 1);
+		else
+			gpio_set_value(wlan_en_gpio, 0);
+	}
 
-	return ret;
-#else
 	return 0;
-#endif
 }
-
 #endif /* CONFIG_PLATFORM_INTEL_BYT */
 
 module_init(rtw_drv_entry);
diff --git a/rtl8723DS/os_dep/linux/sdio_ops_linux.c b/rtl8723DS/os_dep/linux/sdio_ops_linux.c
index 5836418..41898f8 100755..100644
--- a/rtl8723DS/os_dep/linux/sdio_ops_linux.c
+++ b/rtl8723DS/os_dep/linux/sdio_ops_linux.c
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2007 - 2017 Realtek Corporation.
+ * Copyright(c) 2007 - 2018 Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -864,6 +864,13 @@ s32 sd_write(struct intf_hdl *pintfhdl, u32 addr, u32 cnt, void *pdata)
 
 #if 1
 /*#define RTW_SDIO_DUMP*/
+#ifdef RTW_SDIO_DUMP
+#define DUMP_LEN_LMT	0	/* buffer dump size limit */
+				/* unit: byte, 0 for no limit */
+#else 
+#define DUMP_LEN_LMT	32
+#endif
+#define GET_DUMP_LEN(len)	(DUMP_LEN_LMT ? MIN(len, DUMP_LEN_LMT) : len)
 
 /**
  *	Returns driver error code,
@@ -982,7 +989,7 @@ int __must_check rtw_sdio_raw_read(struct dvobj_priv *d, unsigned int addr,
 #ifdef RTW_SDIO_DUMP
 	print_hex_dump(KERN_DEBUG, "rtw_sdio: READ ",
 		       DUMP_PREFIX_OFFSET, 16, 1,
-		       buf, len, false);
+		       buf, GET_DUMP_LEN(len), false);
 #endif /* RTW_SDIO_DUMP */
 
 	if (WARN_ON(error)) {
@@ -997,7 +1004,7 @@ int __must_check rtw_sdio_raw_read(struct dvobj_priv *d, unsigned int addr,
 		dev_err(&func->dev, "rtw_sdio: READ from 0x%05x, %zu bytes\n", addr, len);
 		print_hex_dump(KERN_ERR, "rtw_sdio: READ ",
 			       DUMP_PREFIX_OFFSET, 16, 1,
-			       buf, len, false);
+			       buf, GET_DUMP_LEN(len), false);
 #endif /* !RTW_SDIO_DUMP */
 	}
 
@@ -1049,7 +1056,7 @@ int __must_check rtw_sdio_raw_write(struct dvobj_priv *d, unsigned int addr,
 	dev_dbg(&func->dev, "rtw_sdio: WRITE to 0x%05x\n", addr);
 	print_hex_dump(KERN_DEBUG, "rtw_sdio: WRITE ",
 		       DUMP_PREFIX_OFFSET, 16, 1,
-		       buf, len, false);
+		       buf, GET_DUMP_LEN(len), false);
 #endif /* RTW_SDIO_DUMP */
 
 	if (claim_needed)
@@ -1111,7 +1118,7 @@ int __must_check rtw_sdio_raw_write(struct dvobj_priv *d, unsigned int addr,
 		dev_err(&func->dev, "rtw_sdio: WRITE to 0x%05x, %zu bytes\n", addr, len);
 		print_hex_dump(KERN_ERR, "rtw_sdio: WRITE ",
 			       DUMP_PREFIX_OFFSET, 16, 1,
-			       buf, len, false);
+			       buf, GET_DUMP_LEN(len), false);
 #endif /* !RTW_SDIO_DUMP */
 	}
 
diff --git a/rtl8723DS/os_dep/linux/wifi_regd.c b/rtl8723DS/os_dep/linux/wifi_regd.c
index c710b25..4c10f84 100755..100644
--- a/rtl8723DS/os_dep/linux/wifi_regd.c
+++ b/rtl8723DS/os_dep/linux/wifi_regd.c
@@ -252,66 +252,10 @@ static void _rtw_reg_apply_active_scan_flags(struct wiphy *wiphy,
 }
 #endif
 
-/*
- * Always apply Radar/DFS rules on
- * freq range 5260 MHz - 5700 MHz
- */
-static void _rtw_reg_apply_radar_flags(struct wiphy *wiphy)
+void rtw_regd_apply_flags(struct wiphy *wiphy)
 {
-	struct ieee80211_supported_band *sband;
-	struct ieee80211_channel *ch;
-	unsigned int i;
-
-	if (!wiphy->bands[NL80211_BAND_5GHZ])
-		return;
-
-	sband = wiphy->bands[NL80211_BAND_5GHZ];
-
-	for (i = 0; i < sband->n_channels; i++) {
-		ch = &sband->channels[i];
-		if (!rtw_is_dfs_ch(ch->hw_value))
-			continue;
-#ifdef CONFIG_DFS
-		if (!(ch->flags & IEEE80211_CHAN_DISABLED)
-			#if defined(CONFIG_DFS_MASTER)
-			&& rtw_odm_dfs_domain_unknown(wiphy_to_adapter(wiphy))
-			#endif
-		) {
-			ch->flags |= IEEE80211_CHAN_RADAR;
-			#if (LINUX_VERSION_CODE < KERNEL_VERSION(3, 14, 0))
-			ch->flags |= (IEEE80211_CHAN_NO_IBSS | IEEE80211_CHAN_PASSIVE_SCAN);
-			#else
-			ch->flags |= IEEE80211_CHAN_NO_IR;
-			#endif
-		}
-#endif /* CONFIG_DFS */
-
-#if 0
-		/*
-		 * We always enable radar detection/DFS on this
-		 * frequency range. Additionally we also apply on
-		 * this frequency range:
-		 * - If STA mode does not yet have DFS supports disable
-		 *  active scanning
-		 * - If adhoc mode does not support DFS yet then disable
-		 *  adhoc in the frequency.
-		 * - If AP mode does not yet support radar detection/DFS
-		 *  do not allow AP mode
-		 */
-		if (!(ch->flags & IEEE80211_CHAN_DISABLED))
-			ch->flags |= IEEE80211_CHAN_RADAR |
-				     IEEE80211_CHAN_NO_IBSS |
-				     IEEE80211_CHAN_PASSIVE_SCAN;
-#endif
-	}
-}
-
-static void _rtw_reg_apply_flags(struct wiphy *wiphy)
-{
-#if 1				/* by channel plan */
-	_adapter *padapter = wiphy_to_adapter(wiphy);
-	struct rf_ctl_t *rfctl = adapter_to_rfctl(padapter);
-	u8 channel_plan = rfctl->ChannelPlan;
+	struct dvobj_priv *dvobj = wiphy_to_dvobj(wiphy);
+	struct rf_ctl_t *rfctl = dvobj_to_rfctl(dvobj);
 	RT_CHANNEL_INFO *channel_set = rfctl->channel_set;
 	u8 max_chan_nums = rfctl->max_chan_nums;
 
@@ -341,109 +285,37 @@ static void _rtw_reg_apply_flags(struct wiphy *wiphy)
 		freq = rtw_ch2freq(channel);
 
 		ch = ieee80211_get_channel(wiphy, freq);
-		if (ch) {
-			if (channel_set[i].ScanType == SCAN_PASSIVE
-				#if defined(CONFIG_DFS_MASTER)
-				&& rtw_odm_dfs_domain_unknown(wiphy_to_adapter(wiphy))
-				#endif
-			) {
-				#if (LINUX_VERSION_CODE < KERNEL_VERSION(3, 14, 0))
-				ch->flags = (IEEE80211_CHAN_NO_IBSS | IEEE80211_CHAN_PASSIVE_SCAN);
-				#else
-				ch->flags = IEEE80211_CHAN_NO_IR;
-				#endif
-			} else
-				ch->flags = 0;
-		}
-	}
-
-#else
-	struct ieee80211_supported_band *sband;
-	struct ieee80211_channel *ch;
-	unsigned int i, j;
-	u16 channels[37] = {
-		1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 36, 40, 44, 48, 52, 56,
-		60, 64, 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140,
-		149, 153,
-		157, 161, 165
-	};
-	u16 channel;
-	u32 freq;
-
-	for (i = 0; i < NUM_NL80211_BANDS; i++) {
-		sband = wiphy->bands[i];
-
-		if (sband)
-			for (j = 0; j < sband->n_channels; j++) {
-				ch = &sband->channels[j];
-
-				if (ch)
-					ch->flags = IEEE80211_CHAN_DISABLED;
-			}
-	}
+		if (!ch)
+			continue;
 
-	for (i = 0; i < 37; i++) {
-		channel = channels[i];
-		freq = rtw_ch2freq(channel);
+		if (channel_set[i].ScanType == SCAN_PASSIVE
+			#if defined(CONFIG_DFS_MASTER)
+			&& rtw_odm_dfs_domain_unknown(dvobj)
+			#endif
+		) {
+			#if (LINUX_VERSION_CODE < KERNEL_VERSION(3, 14, 0))
+			ch->flags = (IEEE80211_CHAN_NO_IBSS | IEEE80211_CHAN_PASSIVE_SCAN);
+			#else
+			ch->flags = IEEE80211_CHAN_NO_IR;
+			#endif
+		} else
+			ch->flags = 0;
 
-		ch = ieee80211_get_channel(wiphy, freq);
-		if (ch) {
-			if (channel <= 11)
-				ch->flags = 0;
-			else
-				ch->flags = 0;	/* IEEE80211_CHAN_PASSIVE_SCAN; */
+		#ifdef CONFIG_DFS
+		if (rtw_is_dfs_ch(ch->hw_value)
+			#if defined(CONFIG_DFS_MASTER)
+			&& rtw_odm_dfs_domain_unknown(dvobj)
+			#endif
+		) {
+			ch->flags |= IEEE80211_CHAN_RADAR;
+			#if (LINUX_VERSION_CODE < KERNEL_VERSION(3, 14, 0))
+			ch->flags |= (IEEE80211_CHAN_NO_IBSS | IEEE80211_CHAN_PASSIVE_SCAN);
+			#else
+			ch->flags |= IEEE80211_CHAN_NO_IR;
+			#endif
 		}
-		/* printk("%s: freq %d(%d) flag 0x%02X\n", __func__, freq, channel, ch->flags); */
-	}
-#endif
-}
-
-static void _rtw_reg_apply_world_flags(struct wiphy *wiphy,
-				       enum nl80211_reg_initiator initiator,
-				       struct rtw_regulatory *reg)
-{
-	/* _rtw_reg_apply_beaconing_flags(wiphy, initiator); */
-	/* _rtw_reg_apply_active_scan_flags(wiphy, initiator); */
-	return;
-}
-
-static int _rtw_reg_notifier_apply(struct wiphy *wiphy,
-				   struct regulatory_request *request,
-				   struct rtw_regulatory *reg)
-{
-
-	/* Hard code flags */
-	_rtw_reg_apply_flags(wiphy);
-
-	/* We always apply this */
-	_rtw_reg_apply_radar_flags(wiphy);
-
-	switch (request->initiator) {
-	case NL80211_REGDOM_SET_BY_DRIVER:
-		RTW_INFO("%s: %s\n", __func__, "NL80211_REGDOM_SET_BY_DRIVER");
-		_rtw_reg_apply_world_flags(wiphy, NL80211_REGDOM_SET_BY_DRIVER,
-					   reg);
-		break;
-	case NL80211_REGDOM_SET_BY_CORE:
-		RTW_INFO("%s: %s\n", __func__,
-			 "NL80211_REGDOM_SET_BY_CORE to DRV");
-		_rtw_reg_apply_world_flags(wiphy, NL80211_REGDOM_SET_BY_DRIVER,
-					   reg);
-		break;
-	case NL80211_REGDOM_SET_BY_USER:
-		RTW_INFO("%s: %s\n", __func__,
-			 "NL80211_REGDOM_SET_BY_USER to DRV");
-		_rtw_reg_apply_world_flags(wiphy, NL80211_REGDOM_SET_BY_DRIVER,
-					   reg);
-		break;
-	case NL80211_REGDOM_SET_BY_COUNTRY_IE:
-		RTW_INFO("%s: %s\n", __func__,
-			 "NL80211_REGDOM_SET_BY_COUNTRY_IE");
-		_rtw_reg_apply_world_flags(wiphy, request->initiator, reg);
-		break;
+		#endif /* CONFIG_DFS */
 	}
-
-	return 0;
 }
 
 static const struct ieee80211_regdomain *_rtw_regdomain_select(struct
@@ -461,41 +333,45 @@ static const struct ieee80211_regdomain *_rtw_regdomain_select(struct
 #endif
 }
 
-void _rtw_reg_notifier(struct wiphy *wiphy, struct regulatory_request *request)
+static void rtw_reg_notifier(struct wiphy *wiphy, struct regulatory_request *request)
 {
-	struct rtw_regulatory *reg = NULL;
-
-	RTW_INFO("%s\n", __func__);
+	switch (request->initiator) {
+	case NL80211_REGDOM_SET_BY_DRIVER:
+		RTW_INFO("%s: %s\n", __func__, "NL80211_REGDOM_SET_BY_DRIVER");
+		break;
+	case NL80211_REGDOM_SET_BY_CORE:
+		RTW_INFO("%s: %s\n", __func__, "NL80211_REGDOM_SET_BY_CORE");
+		break;
+	case NL80211_REGDOM_SET_BY_USER:
+		RTW_INFO("%s: %s alpha2:%c%c\n", __func__, "NL80211_REGDOM_SET_BY_USER"
+			, request->alpha2[0], request->alpha2[1]);
+		rtw_set_country(wiphy_to_adapter(wiphy), request->alpha2);
+		break;
+	case NL80211_REGDOM_SET_BY_COUNTRY_IE:
+		RTW_INFO("%s: %s\n", __func__, "NL80211_REGDOM_SET_BY_COUNTRY_IE");
+		break;
+	}
 
-	_rtw_reg_notifier_apply(wiphy, request, reg);
+	rtw_regd_apply_flags(wiphy);
 }
 
 #if (LINUX_VERSION_CODE < KERNEL_VERSION(3, 9, 0))
-int rtw_reg_notifier(struct wiphy *wiphy, struct regulatory_request *request)
-#else
-void rtw_reg_notifier(struct wiphy *wiphy, struct regulatory_request *request)
-#endif
+static int rtw_reg_notifier_return(struct wiphy *wiphy, struct regulatory_request *request)
 {
-	_rtw_reg_notifier(wiphy, request);
-#if (LINUX_VERSION_CODE < KERNEL_VERSION(3, 9, 0))
+	rtw_reg_notifier(wiphy, request);
 	return 0;
-#endif
-}
-
-void rtw_reg_notify_by_driver(_adapter *adapter)
-{
-	if ((adapter->rtw_wdev != NULL) && (adapter->rtw_wdev->wiphy)) {
-		struct regulatory_request request;
-		request.initiator = NL80211_REGDOM_SET_BY_DRIVER;
-		rtw_reg_notifier(adapter->rtw_wdev->wiphy, &request);
-	}
 }
+#endif
 
 static void _rtw_regd_init_wiphy(struct rtw_regulatory *reg, struct wiphy *wiphy)
 {
 	const struct ieee80211_regdomain *regd;
 
+#if (LINUX_VERSION_CODE < KERNEL_VERSION(3, 9, 0))
+	wiphy->reg_notifier = rtw_reg_notifier_return;
+#else
 	wiphy->reg_notifier = rtw_reg_notifier;
+#endif
 
 #if (LINUX_VERSION_CODE < KERNEL_VERSION(3, 14, 0))
 	wiphy->flags |= WIPHY_FLAG_CUSTOM_REGULATORY;
@@ -510,10 +386,7 @@ static void _rtw_regd_init_wiphy(struct rtw_regulatory *reg, struct wiphy *wiphy
 	regd = _rtw_regdomain_select(reg);
 	wiphy_apply_custom_regulatory(wiphy, regd);
 
-	/* Hard code flags */
-	_rtw_reg_apply_flags(wiphy);
-	_rtw_reg_apply_radar_flags(wiphy);
-	_rtw_reg_apply_world_flags(wiphy, NL80211_REGDOM_SET_BY_DRIVER, reg);
+	rtw_regd_apply_flags(wiphy);
 }
 
 static struct country_code_to_enum_rd *_rtw_regd_find_country(u16 countrycode)
@@ -527,10 +400,8 @@ static struct country_code_to_enum_rd *_rtw_regd_find_country(u16 countrycode)
 	return NULL;
 }
 
-int rtw_regd_init(_adapter *padapter)
+int rtw_regd_init(struct wiphy *wiphy)
 {
-	struct wiphy *wiphy = padapter->rtw_wdev->wiphy;
-
 #if 0
 	if (rtw_regd == NULL) {
 		rtw_regd = (struct rtw_regulatory *)
diff --git a/rtl8723DS/os_dep/linux/xmit_linux.c b/rtl8723DS/os_dep/linux/xmit_linux.c
index 570249c..ebbf1f0 100755..100644
--- a/rtl8723DS/os_dep/linux/xmit_linux.c
+++ b/rtl8723DS/os_dep/linux/xmit_linux.c
@@ -65,36 +65,41 @@ sint rtw_endofpktfile(struct pkt_file *pfile)
 
 void rtw_set_tx_chksum_offload(_pkt *pkt, struct pkt_attrib *pattrib)
 {
-
-#ifdef CONFIG_TCP_CSUM_OFFLOAD_TX
+#ifdef CONFIG_TX_CSUM_OFFLOAD	
 	struct sk_buff *skb = (struct sk_buff *)pkt;
-	pattrib->hw_tcp_csum = 0;
-
-	if (skb->ip_summed == CHECKSUM_PARTIAL) {
-		if (skb_shinfo(skb)->nr_frags == 0) {
-			const struct iphdr *ip = ip_hdr(skb);
-			if (ip->protocol == IPPROTO_TCP) {
-				/* TCP checksum offload by HW */
-				RTW_INFO("CHECKSUM_PARTIAL TCP\n");
-				pattrib->hw_tcp_csum = 1;
-				/* skb_checksum_help(skb); */
-			} else if (ip->protocol == IPPROTO_UDP) {
-				/* RTW_INFO("CHECKSUM_PARTIAL UDP\n"); */
-#if 1
-				skb_checksum_help(skb);
-#else
-				/* Set UDP checksum = 0 to skip checksum check */
-				struct udphdr *udp = skb_transport_header(skb);
-				udp->check = 0;
-#endif
-			} else {
-				RTW_INFO("%s-%d TCP CSUM offload Error!!\n", __FUNCTION__, __LINE__);
-				WARN_ON(1);     /* we need a WARN() */
-			}
-		} else { /* IP fragmentation case */
-			RTW_INFO("%s-%d nr_frags != 0, using skb_checksum_help(skb);!!\n", __FUNCTION__, __LINE__);
-			skb_checksum_help(skb);
-		}
+	struct iphdr *iph = NULL;
+	struct ipv6hdr *i6ph = NULL;
+	struct udphdr *uh = NULL;
+	struct tcphdr *th = NULL;
+	u8 	protocol = 0xFF;
+
+	if (skb->protocol == htons(ETH_P_IP)) {
+		iph = (struct iphdr *)skb_network_header(skb);
+		protocol = iph->protocol;
+	} else if (skb->protocol == htons(ETH_P_IPV6)) {
+		i6ph = (struct ipv6hdr *)skb_network_header(skb);
+		protocol = i6ph->nexthdr;
+	} else
+		{}
+
+	/*	For HW rule, clear ipv4_csum & UDP/TCP_csum if it is UDP/TCP packet	*/
+	switch (protocol) {
+	case IPPROTO_UDP:
+		uh = (struct udphdr *)skb_transport_header(skb);
+		uh->check = 0;
+		if (iph)
+			iph->check = 0;
+		pattrib->hw_csum = _TRUE;
+		break;
+	case IPPROTO_TCP:
+		th = (struct tcphdr *)skb_transport_header(skb);
+		th->check = 0;
+		if (iph)
+			iph->check = 0;
+		pattrib->hw_csum = _TRUE;
+		break;
+	default:
+		break;
 	}
 #endif
 
@@ -313,7 +318,6 @@ void rtw_os_xmit_schedule(_adapter *padapter)
 static bool rtw_check_xmit_resource(_adapter *padapter, _pkt *pkt)
 {
 	bool busy = _FALSE;
-	struct xmit_priv *pxmitpriv = &padapter->xmitpriv;
 #if (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 35))
 	u16	qidx;
 
@@ -404,9 +408,9 @@ int rtw_mlcst2unicst(_adapter *padapter, struct sk_buff *skb)
 		}
 
 		/* avoid come from STA1 and send back STA1 */
-		if (_rtw_memcmp(psta->cmn.mac_addr, &skb->data[6], 6) == _TRUE
-			|| _rtw_memcmp(psta->cmn.mac_addr, null_addr, 6) == _TRUE
-			|| _rtw_memcmp(psta->cmn.mac_addr, bc_addr, 6) == _TRUE
+		if (_rtw_memcmp(psta->cmn.mac_addr, &skb->data[6], ETH_ALEN) == _TRUE
+			|| _rtw_memcmp(psta->cmn.mac_addr, null_addr, ETH_ALEN) == _TRUE
+			|| _rtw_memcmp(psta->cmn.mac_addr, bc_addr, ETH_ALEN) == _TRUE
 		) {
 			DBG_COUNTER(padapter->tx_logs.os_tx_m2u_ignore_self);
 			continue;
@@ -417,7 +421,7 @@ int rtw_mlcst2unicst(_adapter *padapter, struct sk_buff *skb)
 		newskb = rtw_skb_copy(skb);
 
 		if (newskb) {
-			_rtw_memcpy(newskb->data, psta->cmn.mac_addr, 6);
+			_rtw_memcpy(newskb->data, psta->cmn.mac_addr, ETH_ALEN);
 			res = rtw_xmit(padapter, &newskb);
 			if (res < 0) {
 				DBG_COUNTER(padapter->tx_logs.os_tx_m2u_entry_err_xmit);
@@ -445,14 +449,14 @@ int _rtw_xmit_entry(_pkt *pkt, _nic_hdl pnetdev)
 	_adapter *padapter = (_adapter *)rtw_netdev_priv(pnetdev);
 	struct xmit_priv *pxmitpriv = &padapter->xmitpriv;
 #ifdef CONFIG_TX_MCAST2UNI
-	struct mlme_priv	*pmlmepriv = &padapter->mlmepriv;
 	extern int rtw_mc2u_disable;
 #endif /* CONFIG_TX_MCAST2UNI	 */
-	s32 res = 0;
-#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 35))
-	u16 queue;
+#ifdef CONFIG_TX_CSUM_OFFLOAD	
+	struct sk_buff *skb = pkt;
+	struct sk_buff *segs, *nskb;
+	netdev_features_t features = padapter->pnetdev->features;
 #endif
-
+	s32 res = 0;
 
 	if (padapter->registrypriv.mp_mode) {
 		RTW_INFO("MP_TX_DROP_OS_FRAME\n");
@@ -472,7 +476,7 @@ int _rtw_xmit_entry(_pkt *pkt, _nic_hdl pnetdev)
 
 #ifdef CONFIG_TX_MCAST2UNI
 	if (!rtw_mc2u_disable
-		&& (MLME_IS_AP(padapter) || MLME_IS_MESH(padapter))
+		&& MLME_IS_AP(padapter)
 		&& (IP_MCAST_MAC(pkt->data)
 			|| ICMPV6_MCAST_MAC(pkt->data)
 			#ifdef CONFIG_TX_BCAST2UNI
@@ -493,6 +497,33 @@ int _rtw_xmit_entry(_pkt *pkt, _nic_hdl pnetdev)
 	}
 #endif /* CONFIG_TX_MCAST2UNI	 */
 
+#ifdef CONFIG_TX_CSUM_OFFLOAD
+	if (skb_shinfo(skb)->gso_size) {
+	/*	split a big(65k) skb into several small(1.5k) skbs */
+		features &= ~(NETIF_F_TSO | NETIF_F_TSO6);
+		segs = skb_gso_segment(skb, features);
+		if (IS_ERR(segs) || !segs)
+			goto drop_packet;
+
+		do {
+			nskb = segs;
+			segs = segs->next;
+			nskb->next = NULL;
+			rtw_mstat_update( MSTAT_TYPE_SKB, MSTAT_ALLOC_SUCCESS, nskb->truesize);
+			res = rtw_xmit(padapter, &nskb);
+			if (res < 0) {
+				#ifdef DBG_TX_DROP_FRAME
+				RTW_INFO("DBG_TX_DROP_FRAME %s rtw_xmit fail\n", __FUNCTION__);
+				#endif
+				pxmitpriv->tx_drop++;
+				rtw_os_pkt_complete(padapter, nskb);
+			}
+		} while (segs);
+		rtw_os_pkt_complete(padapter, skb);
+		goto exit;
+	}
+#endif
+
 	res = rtw_xmit(padapter, &pkt);
 	if (res < 0) {
 		#ifdef DBG_TX_DROP_FRAME
diff --git a/rtl8723DS/os_dep/osdep_service.c b/rtl8723DS/os_dep/osdep_service.c
index 3ad80ec..83c7640 100755..100644
--- a/rtl8723DS/os_dep/osdep_service.c
+++ b/rtl8723DS/os_dep/osdep_service.c
@@ -889,6 +889,17 @@ inline void rtw_os_pkt_free(_pkt *pkt)
 #endif
 }
 
+inline _pkt *rtw_os_pkt_copy(_pkt *pkt)
+{
+#if defined(PLATFORM_LINUX)
+	return rtw_skb_copy(pkt);
+#elif defined(PLATFORM_FREEBSD)
+	return m_dup(pkt, M_NOWAIT);
+#else
+	#error "TBD\n"
+#endif
+}
+
 inline void *rtw_os_pkt_data(_pkt *pkt)
 {
 #if defined(PLATFORM_LINUX)
@@ -933,7 +944,7 @@ inline void _rtw_memmove(void *dst, const void *src, u32 sz)
 #if defined(PLATFORM_LINUX)
 	memmove(dst, src, sz);
 #else
-	#warning "no implementation\n"
+	#error "TBD\n"
 #endif
 }
 
@@ -1093,6 +1104,83 @@ void rtw_list_insert_tail(_list *plist, _list *phead)
 
 }
 
+inline void rtw_list_splice(_list *list, _list *head)
+{
+#ifdef PLATFORM_LINUX
+	list_splice(list, head);
+#else
+	#error "TBD\n"
+#endif
+}
+
+inline void rtw_list_splice_init(_list *list, _list *head)
+{
+#ifdef PLATFORM_LINUX
+	list_splice_init(list, head);
+#else
+	#error "TBD\n"
+#endif
+}
+
+inline void rtw_list_splice_tail(_list *list, _list *head)
+{
+#ifdef PLATFORM_LINUX
+	#if (LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 27))
+	if (!list_empty(list))
+		__list_splice(list, head);
+	#else
+	list_splice_tail(list, head);
+	#endif
+#else
+	#error "TBD\n"
+#endif
+}
+
+inline void rtw_hlist_head_init(rtw_hlist_head *h)
+{
+#ifdef PLATFORM_LINUX
+	INIT_HLIST_HEAD(h);
+#else
+	#error "TBD\n"
+#endif
+}
+
+inline void rtw_hlist_add_head(rtw_hlist_node *n, rtw_hlist_head *h)
+{
+#ifdef PLATFORM_LINUX
+	hlist_add_head(n, h);
+#else
+	#error "TBD\n"
+#endif
+}
+
+inline void rtw_hlist_del(rtw_hlist_node *n)
+{
+#ifdef PLATFORM_LINUX
+	hlist_del(n);
+#else
+	#error "TBD\n"
+#endif
+}
+
+inline void rtw_hlist_add_head_rcu(rtw_hlist_node *n, rtw_hlist_head *h)
+{
+#ifdef PLATFORM_LINUX
+	hlist_add_head_rcu(n, h);
+#else
+	#error "TBD\n"
+#endif
+}
+
+inline void rtw_hlist_del_rcu(rtw_hlist_node *n)
+{
+#ifdef PLATFORM_LINUX
+	hlist_del_rcu(n);
+#else
+	#error "TBD\n"
+#endif
+}
+
 void rtw_init_timer(_timer *ptimer, void *padapter, void *pfunc, void *ctx)
 {
 	_adapter *adapter = (_adapter *)padapter;
@@ -1491,17 +1579,40 @@ inline systime _rtw_ms_to_systime(u32 ms)
 #endif
 }
 
+inline systime _rtw_us_to_systime(u32 us)
+{
+#ifdef PLATFORM_LINUX
+	return usecs_to_jiffies(us);
+#else
+	#error "TBD\n"
+#endif
+}
+
 /* the input parameter start use the same unit as returned by rtw_get_current_time */
 inline s32 _rtw_get_passing_time_ms(systime start)
 {
 	return _rtw_systime_to_ms(_rtw_get_current_time() - start);
 }
 
+inline s32 _rtw_get_remaining_time_ms(systime end)
+{
+	return _rtw_systime_to_ms(end - _rtw_get_current_time());
+}
+
 inline s32 _rtw_get_time_interval_ms(systime start, systime end)
 {
 	return _rtw_systime_to_ms(end - start);
 }
 
+inline bool _rtw_time_after(systime a, systime b)
+{
+#ifdef PLATFORM_LINUX
+	return time_after(a, b);
+#else
+	#error "TBD\n"
+#endif
+}
+
 void rtw_sleep_schedulable(int ms)
 {
 
@@ -1697,56 +1808,49 @@ void rtw_yield_os(void)
 #endif
 }
 
+bool rtw_macaddr_is_larger(const u8 *a, const u8 *b)
+{
+	u32 va, vb;
+
+	va = be32_to_cpu(*((u32 *)a));
+	vb = be32_to_cpu(*((u32 *)b));
+	if (va > vb)
+		return 1;
+	else if (va < vb)
+		return 0;
+
+	return be16_to_cpu(*((u16 *)(a + 4))) > be16_to_cpu(*((u16 *)(b + 4)));
+}
+
 #define RTW_SUSPEND_LOCK_NAME "rtw_wifi"
-#define RTW_SUSPEND_EXT_LOCK_NAME "rtw_wifi_ext"
-#define RTW_SUSPEND_RX_LOCK_NAME "rtw_wifi_rx"
 #define RTW_SUSPEND_TRAFFIC_LOCK_NAME "rtw_wifi_traffic"
 #define RTW_SUSPEND_RESUME_LOCK_NAME "rtw_wifi_resume"
-#define RTW_RESUME_SCAN_LOCK_NAME "rtw_wifi_scan"
 #ifdef CONFIG_WAKELOCK
 static struct wake_lock rtw_suspend_lock;
-static struct wake_lock rtw_suspend_ext_lock;
-static struct wake_lock rtw_suspend_rx_lock;
 static struct wake_lock rtw_suspend_traffic_lock;
 static struct wake_lock rtw_suspend_resume_lock;
-static struct wake_lock rtw_resume_scan_lock;
 #elif defined(CONFIG_ANDROID_POWER)
 static android_suspend_lock_t rtw_suspend_lock = {
 	.name = RTW_SUSPEND_LOCK_NAME
 };
-static android_suspend_lock_t rtw_suspend_ext_lock = {
-	.name = RTW_SUSPEND_EXT_LOCK_NAME
-};
-static android_suspend_lock_t rtw_suspend_rx_lock = {
-	.name = RTW_SUSPEND_RX_LOCK_NAME
-};
 static android_suspend_lock_t rtw_suspend_traffic_lock = {
 	.name = RTW_SUSPEND_TRAFFIC_LOCK_NAME
 };
 static android_suspend_lock_t rtw_suspend_resume_lock = {
 	.name = RTW_SUSPEND_RESUME_LOCK_NAME
 };
-static android_suspend_lock_t rtw_resume_scan_lock = {
-	.name = RTW_RESUME_SCAN_LOCK_NAME
-};
 #endif
 
 inline void rtw_suspend_lock_init(void)
 {
 #ifdef CONFIG_WAKELOCK
 	wake_lock_init(&rtw_suspend_lock, WAKE_LOCK_SUSPEND, RTW_SUSPEND_LOCK_NAME);
-	wake_lock_init(&rtw_suspend_ext_lock, WAKE_LOCK_SUSPEND, RTW_SUSPEND_EXT_LOCK_NAME);
-	wake_lock_init(&rtw_suspend_rx_lock, WAKE_LOCK_SUSPEND, RTW_SUSPEND_RX_LOCK_NAME);
 	wake_lock_init(&rtw_suspend_traffic_lock, WAKE_LOCK_SUSPEND, RTW_SUSPEND_TRAFFIC_LOCK_NAME);
 	wake_lock_init(&rtw_suspend_resume_lock, WAKE_LOCK_SUSPEND, RTW_SUSPEND_RESUME_LOCK_NAME);
-	wake_lock_init(&rtw_resume_scan_lock, WAKE_LOCK_SUSPEND, RTW_RESUME_SCAN_LOCK_NAME);
 #elif defined(CONFIG_ANDROID_POWER)
 	android_init_suspend_lock(&rtw_suspend_lock);
-	android_init_suspend_lock(&rtw_suspend_ext_lock);
-	android_init_suspend_lock(&rtw_suspend_rx_lock);
 	android_init_suspend_lock(&rtw_suspend_traffic_lock);
 	android_init_suspend_lock(&rtw_suspend_resume_lock);
-	android_init_suspend_lock(&rtw_resume_scan_lock);
 #endif
 }
 
@@ -1754,18 +1858,12 @@ inline void rtw_suspend_lock_uninit(void)
 {
 #ifdef CONFIG_WAKELOCK
 	wake_lock_destroy(&rtw_suspend_lock);
-	wake_lock_destroy(&rtw_suspend_ext_lock);
-	wake_lock_destroy(&rtw_suspend_rx_lock);
 	wake_lock_destroy(&rtw_suspend_traffic_lock);
 	wake_lock_destroy(&rtw_suspend_resume_lock);
-	wake_lock_destroy(&rtw_resume_scan_lock);
 #elif defined(CONFIG_ANDROID_POWER)
 	android_uninit_suspend_lock(&rtw_suspend_lock);
-	android_uninit_suspend_lock(&rtw_suspend_ext_lock);
-	android_uninit_suspend_lock(&rtw_suspend_rx_lock);
 	android_uninit_suspend_lock(&rtw_suspend_traffic_lock);
 	android_uninit_suspend_lock(&rtw_suspend_resume_lock);
-	android_uninit_suspend_lock(&rtw_resume_scan_lock);
 #endif
 }
 
@@ -1830,45 +1928,42 @@ inline void rtw_lock_suspend_timeout(u32 timeout_ms)
 #endif
 }
 
-inline void rtw_lock_ext_suspend_timeout(u32 timeout_ms)
+
+inline void rtw_lock_traffic_suspend_timeout(u32 timeout_ms)
 {
 #ifdef CONFIG_WAKELOCK
-	wake_lock_timeout(&rtw_suspend_ext_lock, rtw_ms_to_systime(timeout_ms));
+	wake_lock_timeout(&rtw_suspend_traffic_lock, rtw_ms_to_systime(timeout_ms));
 #elif defined(CONFIG_ANDROID_POWER)
-	android_lock_suspend_auto_expire(&rtw_suspend_ext_lock, rtw_ms_to_systime(timeout_ms));
+	android_lock_suspend_auto_expire(&rtw_suspend_traffic_lock, rtw_ms_to_systime(timeout_ms));
 #endif
-	/* RTW_INFO("EXT lock timeout:%d\n", timeout_ms); */
+	/* RTW_INFO("traffic lock timeout:%d\n", timeout_ms); */
 }
 
-inline void rtw_lock_rx_suspend_timeout(u32 timeout_ms)
+inline void rtw_set_bit(int nr, unsigned long *addr)
 {
-#ifdef CONFIG_WAKELOCK
-	wake_lock_timeout(&rtw_suspend_rx_lock, rtw_ms_to_systime(timeout_ms));
-#elif defined(CONFIG_ANDROID_POWER)
-	android_lock_suspend_auto_expire(&rtw_suspend_rx_lock, rtw_ms_to_systime(timeout_ms));
+#ifdef PLATFORM_LINUX
+	set_bit(nr, addr);
+#else
+	#error "TBD\n";
 #endif
-	/* RTW_INFO("RX lock timeout:%d\n", timeout_ms); */
 }
 
-
-inline void rtw_lock_traffic_suspend_timeout(u32 timeout_ms)
+inline void rtw_clear_bit(int nr, unsigned long *addr)
 {
-#ifdef CONFIG_WAKELOCK
-	wake_lock_timeout(&rtw_suspend_traffic_lock, rtw_ms_to_systime(timeout_ms));
-#elif defined(CONFIG_ANDROID_POWER)
-	android_lock_suspend_auto_expire(&rtw_suspend_traffic_lock, rtw_ms_to_systime(timeout_ms));
+#ifdef PLATFORM_LINUX
+	clear_bit(nr, addr);
+#else
+	#error "TBD\n";
 #endif
-	/* RTW_INFO("traffic lock timeout:%d\n", timeout_ms); */
 }
 
-inline void rtw_lock_resume_scan_timeout(u32 timeout_ms)
+inline int rtw_test_and_clear_bit(int nr, unsigned long *addr)
 {
-#ifdef CONFIG_WAKELOCK
-	wake_lock_timeout(&rtw_resume_scan_lock, rtw_ms_to_systime(timeout_ms));
-#elif defined(CONFIG_ANDROID_POWER)
-	android_lock_suspend_auto_expire(&rtw_resume_scan_lock, rtw_ms_to_systime(timeout_ms));
+#ifdef PLATFORM_LINUX
+	return test_and_clear_bit(nr, addr);
+#else
+	#error "TBD\n";
 #endif
-	/* RTW_INFO("resume scan lock:%d\n", timeout_ms); */
 }
 
 inline void ATOMIC_SET(ATOMIC_T *v, int i)
@@ -1984,6 +2079,23 @@ inline int ATOMIC_DEC_RETURN(ATOMIC_T *v)
 #endif
 }
 
+inline bool ATOMIC_INC_UNLESS(ATOMIC_T *v, int u)
+{
+#ifdef PLATFORM_LINUX
+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 15))
+	return atomic_add_unless(v, 1, u);
+#else
+	/* only make sure not exceed after this function */
+	if (ATOMIC_INC_RETURN(v) > u) {
+		ATOMIC_DEC(v);
+		return 0;
+	}
+	return 1;
+#endif
+#else
+	#error "TBD\n"
+#endif
+}
 
 #ifdef PLATFORM_LINUX
 /*
@@ -2031,7 +2143,9 @@ static int readFile(struct file *fp, char *buf, int len)
 		return -EPERM;
 
 	while (sum < len) {
-#if (LINUX_VERSION_CODE >= KERNEL_VERSION(4, 1, 0))
+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(4, 14, 0))
+		rlen = kernel_read(fp, buf + sum, len - sum, &fp->f_pos);
+#elif (LINUX_VERSION_CODE >= KERNEL_VERSION(4, 1, 0))
 		rlen = __vfs_read(fp, buf + sum, len - sum, &fp->f_pos);
 #else
 		rlen = fp->f_op->read(fp, buf + sum, len - sum, &fp->f_pos);
@@ -2730,6 +2844,167 @@ exit:
 	return val;
 }
 
+int rtw_blacklist_add(_queue *blist, const u8 *addr, u32 timeout_ms)
+{
+	struct blacklist_ent *ent;
+	_list *list, *head;
+	u8 exist = _FALSE, timeout = _FALSE;
+
+	enter_critical_bh(&blist->lock);
+
+	head = &blist->queue;
+	list = get_next(head);
+	while (rtw_end_of_queue_search(head, list) == _FALSE) {
+		ent = LIST_CONTAINOR(list, struct blacklist_ent, list);
+		list = get_next(list);
+
+		if (_rtw_memcmp(ent->addr, addr, ETH_ALEN) == _TRUE) {
+			exist = _TRUE;
+			if (rtw_time_after(rtw_get_current_time(), ent->exp_time))
+				timeout = _TRUE;
+			ent->exp_time = rtw_get_current_time()
+				+ rtw_ms_to_systime(timeout_ms);
+			break;
+		}
+
+		if (rtw_time_after(rtw_get_current_time(), ent->exp_time)) {
+			rtw_list_delete(&ent->list);
+			rtw_mfree(ent, sizeof(struct blacklist_ent));
+		}
+	}
+
+	if (exist == _FALSE) {
+		ent = rtw_malloc(sizeof(struct blacklist_ent));
+		if (ent) {
+			_rtw_memcpy(ent->addr, addr, ETH_ALEN);
+			ent->exp_time = rtw_get_current_time()
+				+ rtw_ms_to_systime(timeout_ms);
+			rtw_list_insert_tail(&ent->list, head);
+		}
+	}
+
+	exit_critical_bh(&blist->lock);
+
+exit:
+	return (exist == _TRUE && timeout == _FALSE) ? RTW_ALREADY : (ent ? _SUCCESS : _FAIL);
+}
+
+int rtw_blacklist_del(_queue *blist, const u8 *addr)
+{
+	struct blacklist_ent *ent = NULL;
+	_list *list, *head;
+	u8 exist = _FALSE;
+
+	enter_critical_bh(&blist->lock);
+	head = &blist->queue;
+	list = get_next(head);
+	while (rtw_end_of_queue_search(head, list) == _FALSE) {
+		ent = LIST_CONTAINOR(list, struct blacklist_ent, list);
+		list = get_next(list);
+
+		if (_rtw_memcmp(ent->addr, addr, ETH_ALEN) == _TRUE) {
+			rtw_list_delete(&ent->list);
+			rtw_mfree(ent, sizeof(struct blacklist_ent));
+			exist = _TRUE;
+			break;
+		}
+
+		if (rtw_time_after(rtw_get_current_time(), ent->exp_time)) {
+			rtw_list_delete(&ent->list);
+			rtw_mfree(ent, sizeof(struct blacklist_ent));
+		}
+	}
+
+	exit_critical_bh(&blist->lock);
+
+exit:
+	return exist == _TRUE ? _SUCCESS : RTW_ALREADY;
+}
+
+int rtw_blacklist_search(_queue *blist, const u8 *addr)
+{
+	struct blacklist_ent *ent = NULL;
+	_list *list, *head;
+	u8 exist = _FALSE;
+
+	enter_critical_bh(&blist->lock);
+	head = &blist->queue;
+	list = get_next(head);
+	while (rtw_end_of_queue_search(head, list) == _FALSE) {
+		ent = LIST_CONTAINOR(list, struct blacklist_ent, list);
+		list = get_next(list);
+
+		if (_rtw_memcmp(ent->addr, addr, ETH_ALEN) == _TRUE) {
+			if (rtw_time_after(rtw_get_current_time(), ent->exp_time)) {
+				rtw_list_delete(&ent->list);
+				rtw_mfree(ent, sizeof(struct blacklist_ent));
+			} else
+				exist = _TRUE;
+			break;
+		}
+
+		if (rtw_time_after(rtw_get_current_time(), ent->exp_time)) {
+			rtw_list_delete(&ent->list);
+			rtw_mfree(ent, sizeof(struct blacklist_ent));
+		}
+	}
+
+	exit_critical_bh(&blist->lock);
+
+exit:
+	return exist;
+}
+
+void rtw_blacklist_flush(_queue *blist)
+{
+	struct blacklist_ent *ent;
+	_list *list, *head;
+	_list tmp;
+
+	_rtw_init_listhead(&tmp);
+
+	enter_critical_bh(&blist->lock);
+	rtw_list_splice_init(&blist->queue, &tmp);
+	exit_critical_bh(&blist->lock);
+
+	head = &tmp;
+	list = get_next(head);
+	while (rtw_end_of_queue_search(head, list) == _FALSE) {
+		ent = LIST_CONTAINOR(list, struct blacklist_ent, list);
+		list = get_next(list);
+		rtw_list_delete(&ent->list);
+		rtw_mfree(ent, sizeof(struct blacklist_ent));
+	}
+}
+
+void dump_blacklist(void *sel, _queue *blist, const char *title)
+{
+	struct blacklist_ent *ent = NULL;
+	_list *list, *head;
+
+	enter_critical_bh(&blist->lock);
+	head = &blist->queue;
+	list = get_next(head);
+
+	if (rtw_end_of_queue_search(head, list) == _FALSE) {
+		if (title)
+			RTW_PRINT_SEL(sel, "%s:\n", title);
+	
+		while (rtw_end_of_queue_search(head, list) == _FALSE) {
+			ent = LIST_CONTAINOR(list, struct blacklist_ent, list);
+			list = get_next(list);
+
+			if (rtw_time_after(rtw_get_current_time(), ent->exp_time))
+				RTW_PRINT_SEL(sel, MAC_FMT" expired\n", MAC_ARG(ent->addr));
+			else
+				RTW_PRINT_SEL(sel, MAC_FMT" %u\n", MAC_ARG(ent->addr)
+					, rtw_get_remaining_time_ms(ent->exp_time));
+		}
+
+	}
+	exit_critical_bh(&blist->lock);
+}
+
 /**
 * is_null -
 *
diff --git a/rtl8723DS/platform/custom_country_chplan.h b/rtl8723DS/platform/custom_country_chplan.h
index f8cc13b..f8cc13b 100755..100644
--- a/rtl8723DS/platform/custom_country_chplan.h
+++ b/rtl8723DS/platform/custom_country_chplan.h
diff --git a/rtl8723DS/platform/platform_ARM_SUN50IW1P1_sdio.c b/rtl8723DS/platform/platform_ARM_SUN50IW1P1_sdio.c
index 2586455..2586455 100755..100644
--- a/rtl8723DS/platform/platform_ARM_SUN50IW1P1_sdio.c
+++ b/rtl8723DS/platform/platform_ARM_SUN50IW1P1_sdio.c
diff --git a/rtl8723DS/platform/platform_ARM_SUNnI_sdio.c b/rtl8723DS/platform/platform_ARM_SUNnI_sdio.c
index 8a52aa9..8a52aa9 100755..100644
--- a/rtl8723DS/platform/platform_ARM_SUNnI_sdio.c
+++ b/rtl8723DS/platform/platform_ARM_SUNnI_sdio.c
diff --git a/rtl8723DS/platform/platform_ARM_SUNxI_sdio.c b/rtl8723DS/platform/platform_ARM_SUNxI_sdio.c
index 795b7e7..795b7e7 100755..100644
--- a/rtl8723DS/platform/platform_ARM_SUNxI_sdio.c
+++ b/rtl8723DS/platform/platform_ARM_SUNxI_sdio.c
diff --git a/rtl8723DS/platform/platform_ARM_SUNxI_usb.c b/rtl8723DS/platform/platform_ARM_SUNxI_usb.c
index 9c2abc4..9c2abc4 100755..100644
--- a/rtl8723DS/platform/platform_ARM_SUNxI_usb.c
+++ b/rtl8723DS/platform/platform_ARM_SUNxI_usb.c
diff --git a/rtl8723DS/platform/platform_ARM_WMT_sdio.c b/rtl8723DS/platform/platform_ARM_WMT_sdio.c
index d85002c..d85002c 100755..100644
--- a/rtl8723DS/platform/platform_ARM_WMT_sdio.c
+++ b/rtl8723DS/platform/platform_ARM_WMT_sdio.c
diff --git a/rtl8723DS/platform/platform_RTK_DMP_usb.c b/rtl8723DS/platform/platform_RTK_DMP_usb.c
index cb740b2..cb740b2 100755..100644
--- a/rtl8723DS/platform/platform_RTK_DMP_usb.c
+++ b/rtl8723DS/platform/platform_RTK_DMP_usb.c
diff --git a/rtl8723DS/platform/platform_AML_S905_sdio.c b/rtl8723DS/platform/platform_aml_s905_sdio.c
index 6786e74..66cb4da 100755..100644
--- a/rtl8723DS/platform/platform_AML_S905_sdio.c
+++ b/rtl8723DS/platform/platform_aml_s905_sdio.c
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2013 Realtek Corporation. All rights reserved.
+ * Copyright(c) 2016 - 2018 Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -11,62 +11,44 @@
  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  * more details.
  *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
- *
- *
- ******************************************************************************/
-#ifdef CONFIG_PLATFORM_AML_S905
-#include <linux/version.h>	/* Linux vresion */
-#include <linux/printk.h>       /* printk() */
-#include <linux/delay.h>	/* msleep() */
-
-extern void sdio_reinit(void);
-extern void extern_wifi_set_enable(int is_on);
-
-#if (LINUX_VERSION_CODE < KERNEL_VERSION(3, 14, 0))
-extern void wifi_teardown_dt(void);
-extern int wifi_setup_dt(void);
-#endif /* kernel < 3.14.0 */
-#endif /* CONFIG_PLATFORM_AML_S905 */
+ *****************************************************************************/
+#include <linux/printk.h>		/* pr_info(() */
+#include <linux/delay.h>		/* msleep() */
+#include "platform_aml_s905_sdio.h"	/* sdio_reinit() and etc */
 
 
 /*
  * Return:
  *	0:	power on successfully
- *	others: power on failed
+ *	others:	power on failed
  */
 int platform_wifi_power_on(void)
 {
 	int ret = 0;
 
-#ifdef CONFIG_PLATFORM_AML_S905
 #if (LINUX_VERSION_CODE < KERNEL_VERSION(3, 14, 0))
 	ret = wifi_setup_dt();
 	if (ret) {
-		printk("%s: setup dt failed!!(%d)\n", __func__, ret);
+		pr_err("%s: setup dt failed!!(%d)\n", __func__, ret);
 		return -1;
 	}
 #endif /* kernel < 3.14.0 */
 
-/* Seems redundancy? Already done before insert driver */
-	printk("######%s: \n",__func__);
+//#if 0 /* Seems redundancy? Already done before insert driver */
+	pr_info("######%s:\n", __func__);
 	extern_wifi_set_enable(0);
 	msleep(500);
 	extern_wifi_set_enable(1);
 	msleep(500);
 	sdio_reinit();
-#endif /* CONFIG_PLATFORM_AML_S905 */
+//#endif
 
 	return ret;
 }
 
 void platform_wifi_power_off(void)
 {
-#ifdef CONFIG_PLATFORM_AML_S905
 #if (LINUX_VERSION_CODE < KERNEL_VERSION(3, 14, 0))
 	wifi_teardown_dt();
 #endif /* kernel < 3.14.0 */
-#endif /* CONFIG_PLATFORM_AML_S905 */
 }
diff --git a/rtl8723DS/platform/platform_aml_s905_sdio.h b/rtl8723DS/platform/platform_aml_s905_sdio.h
new file mode 100644
index 0000000..2b87576
--- a/dev/null
+++ b/rtl8723DS/platform/platform_aml_s905_sdio.h
@@ -0,0 +1,28 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2016 - 2018 Realtek Corporation.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ *****************************************************************************/
+#ifndef __PLATFORM_AML_S905_SDIO_H__
+#define __PLATFORM_AML_S905_SDIO_H__
+
+#include <linux/version.h>	/* Linux vresion */
+
+extern void sdio_reinit(void);
+extern void extern_wifi_set_enable(int is_on);
+
+#if (LINUX_VERSION_CODE < KERNEL_VERSION(3, 14, 0))
+extern void wifi_teardown_dt(void);
+extern int wifi_setup_dt(void);
+#endif /* kernel < 3.14.0 */
+
+#endif /* __PLATFORM_AML_S905_SDIO_H__ */
diff --git a/rtl8723DS/platform/platform_arm_act_sdio.c b/rtl8723DS/platform/platform_arm_act_sdio.c
index ad7b6cf..ad7b6cf 100755..100644
--- a/rtl8723DS/platform/platform_arm_act_sdio.c
+++ b/rtl8723DS/platform/platform_arm_act_sdio.c
diff --git a/rtl8723DS/platform/platform_hisilicon_hi3798_sdio.c b/rtl8723DS/platform/platform_hisilicon_hi3798_sdio.c
new file mode 100644
index 0000000..11a0832
--- a/dev/null
+++ b/rtl8723DS/platform/platform_hisilicon_hi3798_sdio.c
@@ -0,0 +1,110 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2017 - 2018 Realtek Corporation.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ *****************************************************************************/
+#include <linux/delay.h>		/* mdelay() */
+#include <mach/hardware.h>		/* __io_address(), readl(), writel() */
+#include "platform_hisilicon_hi3798_sdio.h"	/* HI_S32() and etc. */
+
+typedef enum hi_GPIO_DIR_E {
+	HI_DIR_OUT = 0,
+	HI_DIR_IN  = 1,
+} HI_GPIO_DIR_E;
+
+#define RTL_REG_ON_GPIO		(4*8 + 3)
+
+#define REG_BASE_CTRL		__io_address(0xf8a20008)
+
+int gpio_wlan_reg_on = RTL_REG_ON_GPIO;
+#if 0
+module_param(gpio_wlan_reg_on, uint, 0644);
+MODULE_PARM_DESC(gpio_wlan_reg_on, "wlan reg_on gpio num (default:gpio4_3)");
+#endif
+
+static int hi_gpio_set_value(u32 gpio, u32 value)
+{
+	HI_S32 s32Status;
+
+	s32Status = HI_DRV_GPIO_SetDirBit(gpio, HI_DIR_OUT);
+	if (s32Status != HI_SUCCESS) {
+		pr_err("gpio(%d) HI_DRV_GPIO_SetDirBit HI_DIR_OUT failed\n",
+			gpio);
+		return -1;
+	}
+
+	s32Status = HI_DRV_GPIO_WriteBit(gpio, value);
+	if (s32Status != HI_SUCCESS) {
+		pr_err("gpio(%d) HI_DRV_GPIO_WriteBit value(%d) failed\n",
+			gpio, value);
+		return -1;
+	}
+
+	return 0;
+}
+
+static int hisi_wlan_set_carddetect(bool present)
+{
+	u32 regval;
+	u32 mask;
+
+
+#ifndef CONFIG_HISI_SDIO_ID
+	return;
+#endif
+	pr_info("SDIO ID=%d\n", CONFIG_HISI_SDIO_ID);
+#if (CONFIG_HISI_SDIO_ID == 1)
+	mask = 1;
+#elif (CONFIG_HISI_SDIO_ID == 0)
+	mask = 2;
+#endif
+
+	regval = readl(REG_BASE_CTRL);
+	if (present) {
+		pr_info("====== Card detection to detect SDIO card! ======\n");
+		/* set card_detect low to detect card */
+		regval |= mask;
+	} else {
+		pr_info("====== Card detection to remove SDIO card! ======\n");
+		/* set card_detect high to remove card */
+		regval &= ~(mask);
+	}
+	writel(regval, REG_BASE_CTRL);
+
+	return 0;
+}
+
+/*
+ * Return:
+ *	0:	power on successfully
+ *	others: power on failed
+ */
+int platform_wifi_power_on(void)
+{
+	int ret = 0;
+
+
+	hi_gpio_set_value(gpio_wlan_reg_on, 1);
+	mdelay(100);
+	hisi_wlan_set_carddetect(1);
+	mdelay(2000);
+	pr_info("======== set_carddetect delay 2s! ========\n");
+
+	return ret;
+}
+
+void platform_wifi_power_off(void)
+{
+	hisi_wlan_set_carddetect(0);
+	mdelay(100);
+	hi_gpio_set_value(gpio_wlan_reg_on, 0);
+}
diff --git a/rtl8723DS/platform/platform_hisilicon_hi3798_sdio.h b/rtl8723DS/platform/platform_hisilicon_hi3798_sdio.h
new file mode 100644
index 0000000..1ad4240
--- a/dev/null
+++ b/rtl8723DS/platform/platform_hisilicon_hi3798_sdio.h
@@ -0,0 +1,28 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2017 - 2018 Realtek Corporation.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ *****************************************************************************/
+#ifndef __PLATFORM_HISILICON_HI3798_SDIO_H__
+#define __PLATFORM_HISILICON_HI3798_SDIO_H__
+
+typedef unsigned int	HI_U32;
+
+typedef int		HI_S32;
+
+#define HI_SUCCESS	0
+#define HI_FAILURE	(-1)
+
+extern HI_S32 HI_DRV_GPIO_SetDirBit(HI_U32 u32GpioNo, HI_U32 u32DirBit);
+extern HI_S32 HI_DRV_GPIO_WriteBit(HI_U32 u32GpioNo, HI_U32 u32BitValue);
+
+#endif /* __PLATFORM_HISILICON_HI3798_SDIO_H__ */
diff --git a/rtl8723DS/platform/platform_ops.c b/rtl8723DS/platform/platform_ops.c
index 10766aa..10766aa 100755..100644
--- a/rtl8723DS/platform/platform_ops.c
+++ b/rtl8723DS/platform/platform_ops.c
diff --git a/rtl8723DS/platform/platform_ops.h b/rtl8723DS/platform/platform_ops.h
index 12caf3c..12caf3c 100755..100644
--- a/rtl8723DS/platform/platform_ops.h
+++ b/rtl8723DS/platform/platform_ops.h
diff --git a/rtl8723DS/platform/platform_sprd_sdio.c b/rtl8723DS/platform/platform_sprd_sdio.c
index 34061d0..34061d0 100755..100644
--- a/rtl8723DS/platform/platform_sprd_sdio.c
+++ b/rtl8723DS/platform/platform_sprd_sdio.c
diff --git a/rtl8723DS/platform/platform_zte_zx296716_sdio.c b/rtl8723DS/platform/platform_zte_zx296716_sdio.c
new file mode 100644
index 0000000..472d24d
--- a/dev/null
+++ b/rtl8723DS/platform/platform_zte_zx296716_sdio.c
@@ -0,0 +1,53 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2016 - 2018 Realtek Corporation.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ *****************************************************************************/
+#include <linux/printk.h>		/* pr_info(() */
+#include <linux/delay.h>		/* msleep() */
+#include "platform_zte_zx296716_sdio.h"	/* sdio_reinit() and etc */
+
+
+/*
+ * Return:
+ *	0:	power on successfully
+ *	others:	power on failed
+ */
+int platform_wifi_power_on(void)
+{
+	int ret = 0;
+
+	pr_info("######%s: disable--1--\n", __func__);
+	extern_wifi_set_enable(0);
+	/*msleep(500);*/ /* add in function:extern_wifi_set_enable */
+	pr_info("######%s: enable--2---\n", __func__);
+	extern_wifi_set_enable(1);
+	/*msleep(500);*/
+	sdio_reinit();
+
+	return ret;
+}
+
+void platform_wifi_power_off(void)
+{
+	int card_val;
+
+	pr_info("######%s:\n", __func__);
+#ifdef CONFIG_A16T03_BOARD
+	card_val = sdio_host_is_null();
+	if (card_val)
+		remove_card();
+#endif /* CONFIG_A16T03_BOARD */
+	extern_wifi_set_enable(0);
+
+	/*msleep(500);*/
+}
diff --git a/rtl8723DS/platform/platform_zte_zx296716_sdio.h b/rtl8723DS/platform/platform_zte_zx296716_sdio.h
new file mode 100644
index 0000000..3a4fba1
--- a/dev/null
+++ b/rtl8723DS/platform/platform_zte_zx296716_sdio.h
@@ -0,0 +1,25 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2016 - 2018 Realtek Corporation.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ *****************************************************************************/
+#ifndef __PLATFORM_ZTE_ZX296716_SDIO_H__
+#define __PLATFORM_ZTE_ZX296716_SDIO_H__
+
+extern void sdio_reinit(void);
+extern void extern_wifi_set_enable(int val);
+#ifdef CONFIG_A16T03_BOARD
+extern int sdio_host_is_null(void);
+extern void remove_card(void);
+#endif /* CONFIG_A16T03_BOARD */
+
+#endif /* __PLATFORM_ZTE_ZX296716_SDIO_H__ */
diff --git a/rtl8723DS/runwpa b/rtl8723DS/runwpa
index f825e8b..f825e8b 100755..100644
--- a/rtl8723DS/runwpa
+++ b/rtl8723DS/runwpa
diff --git a/rtl8723DS/wlan0dhcp b/rtl8723DS/wlan0dhcp
index 6043382..6043382 100755..100644
--- a/rtl8723DS/wlan0dhcp
+++ b/rtl8723DS/wlan0dhcp